diff --git a/kampela-display-common/src/display_def.rs b/kampela-display-common/src/display_def.rs index 791a017..03c49a2 100644 --- a/kampela-display-common/src/display_def.rs +++ b/kampela-display-common/src/display_def.rs @@ -1,6 +1,10 @@ use embedded_graphics_core::{geometry::{Point, Size}, primitives::Rectangle}; pub const SCREEN_SIZE_X: u32 = 264; pub const SCREEN_SIZE_Y: u32 = 176; +pub const SCREEN_RESOLUTION: u32 = SCREEN_SIZE_X * SCREEN_SIZE_Y; +pub const SCREEN_BIT_DEPTH: usize = 1; +pub const SCREEN_BIT_SIZE: usize = SCREEN_RESOLUTION as usize * SCREEN_BIT_DEPTH; +pub const SCREEN_BUFFER_SIZE: usize = SCREEN_BIT_SIZE / 8; pub const SCREEN_SIZE: Size = Size{width: SCREEN_SIZE_X, height: SCREEN_SIZE_Y}; pub const SCREEN_ZERO: Point = Point{x: 0, y: 0}; pub const SCREEN_AREA: Rectangle = Rectangle{top_left: SCREEN_ZERO, size: SCREEN_SIZE}; diff --git a/kampela-system/Cargo.lock b/kampela-system/Cargo.lock index 475cd78..9162f5d 100644 --- a/kampela-system/Cargo.lock +++ b/kampela-system/Cargo.lock @@ -1,12 +1,39 @@ # This file is automatically @generated by Cargo. # It is not intended for manual editing. -version = 3 +version = 4 + +[[package]] +name = "ahash" +version = "0.8.11" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "e89da841a80418a9b391ebaea17f5c112ffaaa96f621d2c285b5174da76b9011" +dependencies = [ + "cfg-if", + "once_cell", + "version_check", + "zerocopy", +] + +[[package]] +name = "aho-corasick" +version = "1.1.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "8e60d3430d3a69478ad0993f19238d2df97c507009a52b3c10addcd7f6bcb916" +dependencies = [ + "memchr", +] + +[[package]] +name = "allocator-api2" +version = "0.2.21" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "683d7910e743518b0e34f1186f92494becacb047c7b6bf616c96772180fef923" [[package]] name = "arrayref" -version = "0.3.7" +version = "0.3.9" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6b4930d2cb77ce62f89ee5d5289b4ac049559b1c45539271f5ed4fdc7db34545" +checksum = "76a2e8124351fda1ef8aaaa3bbd7ebbcb486bbcd4225aca0aa0d84bb2db8fecb" [[package]] name = "arrayvec" @@ -19,15 +46,15 @@ dependencies = [ [[package]] name = "arrayvec" -version = "0.7.4" +version = "0.7.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "96d30a06541fbafbc7f82ed10c06164cfbd2c401138f6addd8404629c4b16711" +checksum = "7c02d123df017efcdfbd739ef81735b36c5ba83ec3c59c80a9d7ecc718f92e50" [[package]] name = "autocfg" -version = "1.1.0" +version = "1.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d468802bab17cbc0cc575e9b053f41e72aa36bfa6b7f55e3529ffa43161b97fa" +checksum = "ace50bade8e6234aa140d9a2f552bbee1db4d353f69b8217bc503490fc1a9f26" [[package]] name = "az" @@ -44,12 +71,24 @@ dependencies = [ "rustc_version 0.2.3", ] +[[package]] +name = "base16ct" +version = "0.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "4c7f02d4ea65f2c1853089ffd8d2787bdbc63de2f0d29dedbcf8ccdfa0ccd4cf" + [[package]] name = "base58" version = "0.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "6107fe1be6682a68940da878d9e9f5e90ca5745b3dec9fd1bb393c8777d4f581" +[[package]] +name = "base64ct" +version = "1.6.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "8c3c1a368f70d6cf7302d78f8f7093da241fb8e8807c05cc9e51a125895a6d5b" + [[package]] name = "bitfield" version = "0.13.2" @@ -68,15 +107,6 @@ dependencies = [ "wyz", ] -[[package]] -name = "blake2" -version = "0.10.6" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "46502ad458c9a52b69d4d4d32775c788b7a1b85e8bc9d482d92250fc0e3f8efe" -dependencies = [ - "digest", -] - [[package]] name = "blake2-rfc" version = "0.2.18" @@ -94,8 +124,8 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "23285ad32269793932e830392f2fe2f83e26488fd3ec778883a93c8323735780" dependencies = [ "arrayref", - "arrayvec 0.7.4", - "constant_time_eq 0.3.0", + "arrayvec 0.7.6", + "constant_time_eq 0.3.1", ] [[package]] @@ -125,6 +155,18 @@ version = "1.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd" +[[package]] +name = "common-path" +version = "1.0.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "2382f75942f4b3be3690fe4f86365e9c853c1587d6ee58212cebf6e2a9ccd101" + +[[package]] +name = "const-oid" +version = "0.9.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "c2459377285ad874054d797f3ccebf984978aa39129f6eafde5cdc8315b612f8" + [[package]] name = "constant_time_eq" version = "0.1.5" @@ -133,9 +175,9 @@ checksum = "245097e9a4535ee1e3e3931fcfcd55a796a44c643e8596ff6566d68f09b87bbc" [[package]] name = "constant_time_eq" -version = "0.3.0" +version = "0.3.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f7144d30dcf0fafbce74250a3963025d8d52177934239851c917d29f1df280c2" +checksum = "7c74b8349d32d297c9134b8c88677813a227df8f779daa29bfc29c183fe3dca6" [[package]] name = "cortex-m" @@ -152,38 +194,38 @@ dependencies = [ [[package]] name = "cortex-m-rt" -version = "0.7.3" +version = "0.7.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ee84e813d593101b1723e13ec38b6ab6abbdbaaa4546553f5395ed274079ddb1" +checksum = "801d4dec46b34c299ccf6b036717ae0fce602faa4f4fe816d9013b9a7c9f5ba6" dependencies = [ "cortex-m-rt-macros", ] [[package]] name = "cortex-m-rt-macros" -version = "0.7.0" +version = "0.7.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f0f6f3e36f203cfedbc78b357fb28730aa2c6dc1ab060ee5c2405e843988d3c7" +checksum = "e37549a379a9e0e6e576fd208ee60394ccb8be963889eebba3ffe0980364f472" dependencies = [ "proc-macro2", "quote", - "syn 1.0.109", + "syn 2.0.87", ] [[package]] name = "cpufeatures" -version = "0.2.9" +version = "0.2.15" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a17b76ff3a4162b0b27f354a0c87015ddad39d35f9c0c36607a3bdd175dde1f1" +checksum = "0ca741a962e1b0bff6d724a1a0958b686406e853bb14061f218562e1896f95e6" dependencies = [ "libc", ] [[package]] name = "critical-section" -version = "1.1.2" +version = "1.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7059fff8937831a9ae6f0fe4d658ffabf58f2ca96aa9dec1c889f936f705f216" +checksum = "790eea4361631c5e7d22598ecd5723ff611904e3344ce8720784c93e3d83d40b" [[package]] name = "crunchy" @@ -191,6 +233,18 @@ version = "0.2.2" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "7a81dae078cea95a014a339291cec439d2f232ebe854a9d672b796c6afafa9b7" +[[package]] +name = "crypto-bigint" +version = "0.5.5" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0dc92fb57ca44df6db8059111ab3af99a63d5d0f8375d9972e319a379c6bab76" +dependencies = [ + "generic-array", + "rand_core", + "subtle", + "zeroize", +] + [[package]] name = "crypto-common" version = "0.1.6" @@ -212,7 +266,7 @@ dependencies = [ "curve25519-dalek-derive", "digest", "fiat-crypto", - "rustc_version 0.4.0", + "rustc_version 0.4.1", "subtle", "zeroize", ] @@ -225,18 +279,48 @@ checksum = "f46882e17999c6cc590af592290432be3bce0428cb0d5f8b6715e4dc7b383eb3" dependencies = [ "proc-macro2", "quote", - "syn 2.0.43", + "syn 2.0.87", +] + +[[package]] +name = "der" +version = "0.7.9" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f55bf8e7b65898637379c1b74eb1551107c8294ed26d855ceb9fd1a09cfc9bc0" +dependencies = [ + "const-oid", + "zeroize", +] + +[[package]] +name = "derive-syn-parse" +version = "0.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d65d7ce8132b7c0e54497a4d9a55a1c2a0912a0d786cf894472ba818fba45762" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.87", ] [[package]] name = "derive_more" -version = "0.99.17" +version = "1.0.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "4a9b99b9cbbe49445b21764dc0625032a89b145a2642e67603e1c936f5458d05" +dependencies = [ + "derive_more-impl", +] + +[[package]] +name = "derive_more-impl" +version = "1.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4fb810d30a7c1953f91334de7244731fc3f3c10d7fe163338a35b9f640960321" +checksum = "cb7330aeadfbe296029522e6c40f315320aba36fc43a5b3632f3795348f3bd22" dependencies = [ "proc-macro2", "quote", - "syn 1.0.109", + "syn 2.0.87", ] [[package]] @@ -246,10 +330,76 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "9ed9a281f7bc9b7576e61468ba615a66a5c8cfdff42420a70aa82701a3b1e292" dependencies = [ "block-buffer", + "const-oid", "crypto-common", "subtle", ] +[[package]] +name = "docify" +version = "0.2.9" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a772b62b1837c8f060432ddcc10b17aae1453ef17617a99bc07789252d2a5896" +dependencies = [ + "docify_macros", +] + +[[package]] +name = "docify_macros" +version = "0.2.9" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "60e6be249b0a462a14784a99b19bf35a667bb5e09de611738bb7362fa4c95ff7" +dependencies = [ + "common-path", + "derive-syn-parse", + "once_cell", + "proc-macro2", + "quote", + "regex", + "syn 2.0.87", + "termcolor", + "toml", + "walkdir", +] + +[[package]] +name = "ecdsa" +version = "0.16.9" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ee27f32b5c5292967d2d4a9d7f1e0b0aed2c15daded5a60300e4abb9d8020bca" +dependencies = [ + "der", + "digest", + "elliptic-curve", + "rfc6979", + "signature", + "spki", +] + +[[package]] +name = "ed25519" +version = "2.2.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "115531babc129696a58c64a4fef0a8bf9e9698629fb97e9e40767d235cfbcd53" +dependencies = [ + "signature", +] + +[[package]] +name = "ed25519-zebra" +version = "4.0.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "7d9ce6874da5d4415896cd45ffbc4d1cfc0c4f9c079427bd870742c30f2f65a9" +dependencies = [ + "curve25519-dalek", + "ed25519", + "hashbrown 0.14.5", + "hex", + "rand_core", + "sha2", + "zeroize", +] + [[package]] name = "efm32pg23_fix" version = "0.1.0" @@ -260,6 +410,25 @@ dependencies = [ "vcell", ] +[[package]] +name = "elliptic-curve" +version = "0.13.8" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "b5e6043086bf7973472e0c7dff2142ea0b680d30e18d9cc40f267efbf222bd47" +dependencies = [ + "base16ct", + "crypto-bigint", + "digest", + "ff", + "generic-array", + "group", + "pkcs8", + "rand_core", + "sec1", + "subtle", + "zeroize", +] + [[package]] name = "embedded-graphics" version = "0.7.1" @@ -316,6 +485,16 @@ version = "0.1.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "cf172ba7bfe5412e03c4dfd7d8e4b5f1e6cd0b7087fd61fa274b73f87ad94854" +[[package]] +name = "ff" +version = "0.13.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ded41244b729663b1e574f1b4fb731469f69f79c17667b5d776b16cda0479449" +dependencies = [ + "rand_core", + "subtle", +] + [[package]] name = "fiat-crypto" version = "0.2.9" @@ -342,9 +521,9 @@ dependencies = [ [[package]] name = "frame-metadata" -version = "16.0.0" +version = "18.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "87cf1549fba25a6fcac22785b61698317d958e96cac72a59102ea45b9ae64692" +checksum = "daaf440c68eb2c3d88e5760fe8c7af3f9fee9181fab6c2f2c4e7cc48dcc40bb8" dependencies = [ "cfg-if", "parity-scale-codec", @@ -365,6 +544,7 @@ checksum = "85649ca51fd72272d7821adaf274ad91c288277713d9c18820d8499a7ff69e9a" dependencies = [ "typenum", "version_check", + "zeroize", ] [[package]] @@ -376,11 +556,32 @@ dependencies = [ "rand_core", ] +[[package]] +name = "group" +version = "0.13.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f0f9ef7462f7c099f518d754361858f86d8a07af53ba9af0fe635bbccb151a63" +dependencies = [ + "ff", + "rand_core", + "subtle", +] + +[[package]] +name = "hashbrown" +version = "0.14.5" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "e5274423e17b7c9fc20b6e7e208532f9b19825d82dfd615708b70edd83df41f1" +dependencies = [ + "ahash", + "allocator-api2", +] + [[package]] name = "hashbrown" -version = "0.14.1" +version = "0.15.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7dfda62a12f55daeae5015f81b0baea145391cb4520f86c248fc615d72640d12" +checksum = "3a9bfc1af68b1726ea47d3d5109de126281def866b33970e10fbab11b5dafab3" [[package]] name = "hex" @@ -410,12 +611,12 @@ dependencies = [ [[package]] name = "indexmap" -version = "2.0.2" +version = "2.6.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "8adf3ddd720272c6ea8bf59463c04e0f93d0bbf7c5439b691bca2987e0270897" +checksum = "707907fe3c25f5424cce2cb7e1cbcafee6bdbe735ca90ef77c29e84591e5b9da" dependencies = [ "equivalent", - "hashbrown", + "hashbrown 0.15.1", ] [[package]] @@ -427,6 +628,18 @@ dependencies = [ "num-traits", ] +[[package]] +name = "k256" +version = "0.13.4" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f6e3919bbaa2945715f0bb6d3934a173d1e9a59ac23767fbaaef277265a7411b" +dependencies = [ + "cfg-if", + "ecdsa", + "elliptic-curve", + "sha2", +] + [[package]] name = "kampela-display-common" version = "0.1.0" @@ -445,6 +658,7 @@ dependencies = [ "embedded-text", "external-memory-tools", "kampela-display-common", + "kampela-ui", "lazy_static", "lt-codes", "mnemonic-external", @@ -457,34 +671,50 @@ dependencies = [ "substrate_parser", ] +[[package]] +name = "kampela-ui" +version = "0.1.0" +dependencies = [ + "embedded-graphics", + "embedded-text", + "hex", + "kampela-display-common", + "lazy_static", + "mnemonic-external", + "qrcodegen-no-heap", + "rand", + "substrate-crypto-light", + "substrate_parser", +] + [[package]] name = "keccak" -version = "0.1.4" +version = "0.1.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "8f6d5ed8676d904364de097082f4e7d240b571b67989ced0240f08b7f966f940" +checksum = "ecc2af9a1119c51f12a14607e783cb977bde58bc069ff0c3da1095e635d70654" dependencies = [ "cpufeatures", ] [[package]] name = "lazy_static" -version = "1.4.0" +version = "1.5.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e2abad23fbc42b3700f2f279844dc832adb2b2eb069b2df918f455c4e18cc646" +checksum = "bbd2bcb4c963f2ddae06a2efc7e9f3591312473c50c6685e1f298068316e66fe" dependencies = [ "spin", ] [[package]] name = "libc" -version = "0.2.149" +version = "0.2.164" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a08173bc88b7955d1b3145aa561539096c421ac8debde8cbc3612ec635fee29b" +checksum = "433bfe06b8c75da9b2e3fbea6e5329ff87748f0b144ef75306e674c3f6f7c13f" [[package]] name = "lt-codes" version = "0.1.0" -source = "git+https://github.com/Alzymologist/LT-codes#39eb0a14f2a226688431d6b0c3202200b504651d" +source = "git+https://github.com/Alzymologist/LT-codes#3998d2ef9995b2888c75a2a439434e89080d57cb" dependencies = [ "blake2-rfc", "rand", @@ -494,9 +724,9 @@ dependencies = [ [[package]] name = "memchr" -version = "2.6.4" +version = "2.7.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f665ee40bc4a3c5590afb1e9677db74a508659dfd71e126420da8274909a0167" +checksum = "78ca9ab1a0babb1e7d5695e3530886289c18cf2f87ec19a575a0abdce112e3a3" [[package]] name = "merlin" @@ -519,10 +749,11 @@ checksum = "bc4010833aea396656c2f91ee704d51a6f1329ec2ab56ffd00bfd56f7481ea94" [[package]] name = "mnemonic-external" version = "0.1.0" -source = "git+https://github.com/Alzymologist/mnemonic-external#ac8b4f027adec591ae16a4e284ca25c0ffda6c3d" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "acd8b607d24e1721a79eb4e30054fe776bf3956a87bd57f59c15fa1f72ad8721" dependencies = [ - "bitvec", "sha2", + "zeroize", ] [[package]] @@ -548,22 +779,20 @@ checksum = "72ef4a56884ca558e5ddb05a1d1e7e1bfd9a68d9ed024c21704cc98872dae1bb" [[package]] name = "num-bigint" -version = "0.4.4" +version = "0.4.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "608e7659b5c3d7cba262d894801b9ec9d00de989e8a82bd4bef91d08da45cdc0" +checksum = "a5e44f723f1133c9deac646763579fdb3ac745e418f2a7af9cd0c431da1f20b9" dependencies = [ - "autocfg", "num-integer", "num-traits", ] [[package]] name = "num-integer" -version = "0.1.45" +version = "0.1.46" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "225d3389fb3509a24c93f5c29eb6bde2586b98d9f016636dff58d7c6f7569cd9" +checksum = "7969661fd2958a5cb096e56c8e1ad0444ac2bbcd0061bd28660485a44879858f" dependencies = [ - "autocfg", "num-traits", ] @@ -582,29 +811,36 @@ version = "0.1.3" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "41af26158b0f5530f7b79955006c2727cd23d0d8e7c3109dc316db0a919784dd" +[[package]] +name = "once_cell" +version = "1.20.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "1261fe7e33c73b354eab43b1273a57c8f967d0391e80353e51f764ac02cf6775" + [[package]] name = "parity-scale-codec" -version = "3.6.12" +version = "3.7.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "306800abfa29c7f16596b5970a588435e3d5b3149683d00c12b699cc19f895ee" +checksum = "8be4817d39f3272f69c59fe05d0535ae6456c2dc2fa1ba02910296c7e0a5c590" dependencies = [ - "arrayvec 0.7.4", + "arrayvec 0.7.6", "bitvec", "byte-slice-cast", "impl-trait-for-tuples", "parity-scale-codec-derive", + "rustversion", ] [[package]] name = "parity-scale-codec-derive" -version = "3.6.12" +version = "3.7.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d830939c76d294956402033aee57a6da7b438f2294eb94864c37b0569053a42c" +checksum = "8781a75c6205af67215f382092b6e0a4ff3734798523e69073d4bcd294ec767b" dependencies = [ "proc-macro-crate", "proc-macro2", "quote", - "syn 1.0.109", + "syn 2.0.87", ] [[package]] @@ -616,11 +852,21 @@ dependencies = [ "digest", ] +[[package]] +name = "pkcs8" +version = "0.10.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f950b2377845cebe5cf8b5165cb3cc1a5e0fa5cfa3e1f7f55707d8fd82e0a7b7" +dependencies = [ + "der", + "spki", +] + [[package]] name = "primitive-types" -version = "0.12.2" +version = "0.13.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "0b34d9fd68ae0b74a41b21c03c2f62847aa0ffea044eee893b4c140b37e244e2" +checksum = "d15600a7d856470b7d278b3fe0e311fe28c2526348549f8ef2ff7db3299c87f5" dependencies = [ "fixed-hash", "uint", @@ -628,18 +874,18 @@ dependencies = [ [[package]] name = "proc-macro-crate" -version = "3.1.0" +version = "3.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6d37c51ca738a55da99dc0c4a34860fd675453b8b36209178c2249bb13651284" +checksum = "8ecf48c7ca261d60b74ab1a7b20da18bede46776b2e55535cb958eb595c5fa7b" dependencies = [ "toml_edit", ] [[package]] name = "proc-macro2" -version = "1.0.86" +version = "1.0.89" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5e719e8df665df0d1c8fbfd238015744736151d4445ec0836b8e628aae103b77" +checksum = "f139b0662de085916d1fb67d2b4169d1addddda1919e696f3252b740b629986e" dependencies = [ "unicode-ident", ] @@ -652,9 +898,9 @@ checksum = "d0e2c0bf8be8a1c4a4f48973dabf26943f05da2bfc2d3180aae62409dbba6f0c" [[package]] name = "quote" -version = "1.0.33" +version = "1.0.37" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5267fca4496028628a95160fc423a33e8b2e6af8a5302579e322e4b520293cae" +checksum = "b5b9d34b8991d19d98081b46eacdd8eb58c6f2b201139f7c5f643cc155a633af" dependencies = [ "proc-macro2", ] @@ -691,28 +937,42 @@ dependencies = [ [[package]] name = "regex" -version = "1.10.6" +version = "1.11.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4219d74c6b67a3654a9fbebc4b419e22126d13d2f3c4a07ee0cb61ff79a79619" +checksum = "b544ef1b4eac5dc2db33ea63606ae9ffcfac26c1416a2806ae0bf5f56b201191" dependencies = [ + "aho-corasick", + "memchr", "regex-automata", "regex-syntax", ] [[package]] name = "regex-automata" -version = "0.4.7" +version = "0.4.9" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "38caf58cc5ef2fed281f89292ef23f6365465ed9a41b7a7754eb4e26496c92df" +checksum = "809e8dc61f6de73b46c85f4c96486310fe304c434cfa43669d7b40f711150908" dependencies = [ + "aho-corasick", + "memchr", "regex-syntax", ] [[package]] name = "regex-syntax" -version = "0.8.4" +version = "0.8.5" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "2b15c43186be67a4fd63bee50d0303afffcef381492ebe2c5d87f324e1b8815c" + +[[package]] +name = "rfc6979" +version = "0.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7a66a03ae7c801facd77a29370b4faec201768915ac14a721ba36f20bc9c209b" +checksum = "f8dd2a808d456c4a54e300a23e9f5a67e122c3024119acbfd73e3bf664491cb2" +dependencies = [ + "hmac", + "subtle", +] [[package]] name = "rustc_version" @@ -725,18 +985,33 @@ dependencies = [ [[package]] name = "rustc_version" -version = "0.4.0" +version = "0.4.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "bfa0f585226d2e68097d4f95d113b15b83a82e819ab25717ec0590d9584ef366" +checksum = "cfcb3a22ef46e85b45de6ee7e79d063319ebb6594faafcf1c225ea92ab6e9b92" dependencies = [ "semver 1.0.23", ] +[[package]] +name = "rustversion" +version = "1.0.18" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0e819f2bc632f285be6d7cd36e25940d45b2391dd6d9b939e79de557f7014248" + +[[package]] +name = "same-file" +version = "1.0.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "93fc1dc3aaa9bfed95e02e6eadabb4baf7e3078b0bd1b4d7b6b0b68378900502" +dependencies = [ + "winapi-util", +] + [[package]] name = "scale-info" -version = "2.11.3" +version = "2.11.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "eca070c12893629e2cc820a9761bedf6ce1dcddc9852984d1dc734b8bd9bd024" +checksum = "1aa7ffc1c0ef49b0452c6e2986abf2b07743320641ffd5fc63d552458e3b779b" dependencies = [ "cfg-if", "derive_more", @@ -746,14 +1021,14 @@ dependencies = [ [[package]] name = "scale-info-derive" -version = "2.11.3" +version = "2.11.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "2d35494501194174bda522a32605929eefc9ecf7e0a326c26db1fdd85881eb62" +checksum = "46385cc24172cf615450267463f937c10072516359b3ff1cb24228a4a08bf951" dependencies = [ "proc-macro-crate", "proc-macro2", "quote", - "syn 1.0.109", + "syn 2.0.87", ] [[package]] @@ -763,7 +1038,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "8de18f6d8ba0aad7045f5feae07ec29899c1112584a38509a84ad7b04451eaa0" dependencies = [ "arrayref", - "arrayvec 0.7.4", + "arrayvec 0.7.6", "curve25519-dalek", "getrandom_or_panic", "merlin", @@ -773,6 +1048,20 @@ dependencies = [ "zeroize", ] +[[package]] +name = "sec1" +version = "0.7.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d3e97a565f76233a6003f9f5c54be1d9c5bdfa3eccfb189469f11ec4901c47dc" +dependencies = [ + "base16ct", + "der", + "generic-array", + "pkcs8", + "subtle", + "zeroize", +] + [[package]] name = "semver" version = "0.9.0" @@ -794,6 +1083,35 @@ version = "0.7.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "388a1df253eca08550bef6c72392cfe7c30914bf41df5269b68cbd6ff8f570a3" +[[package]] +name = "serde" +version = "1.0.215" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "6513c1ad0b11a9376da888e3e0baa0077f1aed55c17f50e7b2397136129fb88f" +dependencies = [ + "serde_derive", +] + +[[package]] +name = "serde_derive" +version = "1.0.215" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ad1e866f866923f252f05c889987993144fb74e722403468a4ebd70c3cd756c0" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.87", +] + +[[package]] +name = "serde_spanned" +version = "0.6.8" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "87607cb1398ed59d48732e575a4c28a7a8ebf2454b964fe3f224f2afc07909e1" +dependencies = [ + "serde", +] + [[package]] name = "sha2" version = "0.10.8" @@ -815,12 +1133,23 @@ dependencies = [ "keccak", ] +[[package]] +name = "signature" +version = "2.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "77549399552de45a898a580c1b41d445bf730df867cc44e6c0233bbc4b8329de" +dependencies = [ + "digest", + "rand_core", +] + [[package]] name = "sp-arithmetic" -version = "25.0.0" +version = "26.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "910c07fa263b20bf7271fdd4adcb5d3217dfdac14270592e0780223542e7e114" +checksum = "46d0d0a4c591c421d3231ddd5e27d828618c24456d51445d21a1f79fcee97c23" dependencies = [ + "docify", "integer-sqrt", "num-traits", "parity-scale-codec", @@ -851,9 +1180,19 @@ checksum = "12f8ee986414b0a9ad741776762f4083cd3a5128449b982a3919c4df36874834" [[package]] name = "spin" -version = "0.5.2" +version = "0.9.8" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "6980e8d7511241f8acf4aebddbb1ff938df5eebe98691418c4468d0b72a96a67" + +[[package]] +name = "spki" +version = "0.7.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6e63cff320ae2c57904679ba7cb63280a3dc4613885beafb148ee7bf9aa9042d" +checksum = "d91ed6c858b01f942cd56b37a94b3e0a1798290327d1236e4d9cf4eaca44d29d" +dependencies = [ + "base64ct", + "der", +] [[package]] name = "static_assertions" @@ -864,11 +1203,14 @@ checksum = "a2eb9349b6444b326872e140eb1cf5e7c522154d69e7a0ffb0fb81c06b37543f" [[package]] name = "substrate-crypto-light" version = "0.1.0" -source = "git+https://github.com/Alzymologist/substrate-crypto-light#406354cf2309f98699ef5efe66699fc098a3ee19" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "86eaa081c10ed391947506525a50da570841ccf93f83a642ff91f36732e91b51" dependencies = [ "base58", "blake2b_simd", + "ed25519-zebra", "hmac", + "k256", "lazy_static", "parity-scale-codec", "pbkdf2", @@ -881,12 +1223,11 @@ dependencies = [ [[package]] name = "substrate_parser" -version = "0.6.1" -source = "git+https://github.com/Alzymologist/substrate-parser?rev=65de6a4fe207a64f9857247af4e9f7509fa6de4f#65de6a4fe207a64f9857247af4e9f7509fa6de4f" +version = "0.7.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "b7608864a21e2c356727f7ac0206252fb2c1cc4cee7c8539216528c6b54efca5" dependencies = [ - "base58", "bitvec", - "blake2", "external-memory-tools", "frame-metadata", "hex", @@ -896,13 +1237,14 @@ dependencies = [ "scale-info", "sp-arithmetic", "sp-crypto-hashing", + "substrate-crypto-light", ] [[package]] name = "subtle" -version = "2.5.0" +version = "2.6.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "81cdd64d312baedb58e21336b31bc043b77e01cc99033ce76ef539f78e965ebc" +checksum = "13c2bddecc57b384dee18652358fb23172facb8a2c51ccc10d74c157bdea3292" [[package]] name = "syn" @@ -917,9 +1259,9 @@ dependencies = [ [[package]] name = "syn" -version = "2.0.43" +version = "2.0.87" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ee659fb5f3d355364e1f3e5bc10fb82068efbf824a1e9d1c9504244a6469ad53" +checksum = "25aa4ce346d03a6dcd68dd8b4010bcb74e54e62c90c573f394c46eae99aba32d" dependencies = [ "proc-macro2", "quote", @@ -932,19 +1274,45 @@ version = "1.0.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "55937e1799185b12863d447f42597ed69d9928686b8d88a1df17376a097d8369" +[[package]] +name = "termcolor" +version = "1.4.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "06794f8f6c5c898b3275aebefa6b8a1cb24cd2c6c79397ab15774837a0bc5755" +dependencies = [ + "winapi-util", +] + +[[package]] +name = "toml" +version = "0.8.19" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a1ed1f98e3fdc28d6d910e6737ae6ab1a93bf1985935a1193e68f93eeb68d24e" +dependencies = [ + "serde", + "serde_spanned", + "toml_datetime", + "toml_edit", +] + [[package]] name = "toml_datetime" version = "0.6.8" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "0dd7358ecb8fc2f8d014bf86f6f638ce72ba252a2c3a2572f2a795f1d23efb41" +dependencies = [ + "serde", +] [[package]] name = "toml_edit" -version = "0.21.1" +version = "0.22.22" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6a8534fd7f78b5405e860340ad6575217ce99f38d4d5c8f2442cb5ecb50090e1" +checksum = "4ae48d6208a266e853d946088ed816055e556cc6028c5e8e2b84d9fa5dd7c7f5" dependencies = [ "indexmap", + "serde", + "serde_spanned", "toml_datetime", "winnow", ] @@ -968,9 +1336,9 @@ checksum = "42ff0bf0c66b8238c6f3b578df37d0b7848e55df8577b3f74f92a69acceeb825" [[package]] name = "uint" -version = "0.9.5" +version = "0.10.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "76f64bba2c53b04fcab63c01a7d7427eadc821e3bc48c34dc9ba29c501164b52" +checksum = "909988d098b2f738727b161a106cfc7cab00c539c2687a8836f8e565976fb53e" dependencies = [ "byteorder", "crunchy", @@ -980,9 +1348,9 @@ dependencies = [ [[package]] name = "unicode-ident" -version = "1.0.12" +version = "1.0.13" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3354b9ac3fae1ff6755cb6db53683adb661634f67557942dea4facebec0fee4b" +checksum = "e91b56cd4cadaeb79bbf1a5645f6b4f8dc5bde8834ad5894a8db35fda9efa1fe" [[package]] name = "vcell" @@ -992,9 +1360,9 @@ checksum = "77439c1b53d2303b20d9459b1ade71a83c716e3f9c34f3228c00e6f185d6c002" [[package]] name = "version_check" -version = "0.9.4" +version = "0.9.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "49874b5167b65d7193b8aba1567f5c7d93d001cafc34600cee003eda787e483f" +checksum = "0b928f33d975fc6ad9f86c8f283853ad26bdd5b10b7f1542aa2fa15e2289105a" [[package]] name = "void" @@ -1004,18 +1372,110 @@ checksum = "6a02e4885ed3bc0f2de90ea6dd45ebcbb66dacffe03547fadbb0eeae2770887d" [[package]] name = "volatile-register" -version = "0.2.1" +version = "0.2.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "9ee8f19f9d74293faf70901bc20ad067dc1ad390d2cbf1e3f75f721ffee908b6" +checksum = "de437e2a6208b014ab52972a27e59b33fa2920d3e00fe05026167a1c509d19cc" dependencies = [ "vcell", ] +[[package]] +name = "walkdir" +version = "2.5.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "29790946404f91d9c5d06f9874efddea1dc06c5efe94541a7d6863108e3a5e4b" +dependencies = [ + "same-file", + "winapi-util", +] + +[[package]] +name = "winapi-util" +version = "0.1.9" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "cf221c93e13a30d793f7645a0e7762c55d169dbb0a49671918a2319d289b10bb" +dependencies = [ + "windows-sys", +] + +[[package]] +name = "windows-sys" +version = "0.59.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "1e38bc4d79ed67fd075bcc251a1c39b32a1776bbe92e5bef1f0bf1f8c531853b" +dependencies = [ + "windows-targets", +] + +[[package]] +name = "windows-targets" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "9b724f72796e036ab90c1021d4780d4d3d648aca59e491e6b98e725b84e99973" +dependencies = [ + "windows_aarch64_gnullvm", + "windows_aarch64_msvc", + "windows_i686_gnu", + "windows_i686_gnullvm", + "windows_i686_msvc", + "windows_x86_64_gnu", + "windows_x86_64_gnullvm", + "windows_x86_64_msvc", +] + +[[package]] +name = "windows_aarch64_gnullvm" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "32a4622180e7a0ec044bb555404c800bc9fd9ec262ec147edd5989ccd0c02cd3" + +[[package]] +name = "windows_aarch64_msvc" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "09ec2a7bb152e2252b53fa7803150007879548bc709c039df7627cabbd05d469" + +[[package]] +name = "windows_i686_gnu" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "8e9b5ad5ab802e97eb8e295ac6720e509ee4c243f69d781394014ebfe8bbfa0b" + +[[package]] +name = "windows_i686_gnullvm" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0eee52d38c090b3caa76c563b86c3a4bd71ef1a819287c19d586d7334ae8ed66" + +[[package]] +name = "windows_i686_msvc" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "240948bc05c5e7c6dabba28bf89d89ffce3e303022809e73deaefe4f6ec56c66" + +[[package]] +name = "windows_x86_64_gnu" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "147a5c80aabfbf0c7d901cb5895d1de30ef2907eb21fbbab29ca94c5b08b1a78" + +[[package]] +name = "windows_x86_64_gnullvm" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "24d5b23dc417412679681396f2b49f3de8c1473deb516bd34410872eff51ed0d" + +[[package]] +name = "windows_x86_64_msvc" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "589f6da84c646204747d1270a2a5661ea66ed1cced2631d546fdfb155959f9ec" + [[package]] name = "winnow" -version = "0.5.16" +version = "0.6.20" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "037711d82167854aff2018dfd193aa0fef5370f456732f0d5a0c59b0f1b4b907" +checksum = "36c1fec1a2bb5866f07c25f68c26e565c4c200aebb96d7e55710c19d3e8ac49b" dependencies = [ "memchr", ] @@ -1029,6 +1489,26 @@ dependencies = [ "tap", ] +[[package]] +name = "zerocopy" +version = "0.7.35" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "1b9b4fd18abc82b8136838da5d50bae7bdea537c574d8dc1a34ed098d6c166f0" +dependencies = [ + "zerocopy-derive", +] + +[[package]] +name = "zerocopy-derive" +version = "0.7.35" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "fa4f8080344d4671fb4e831a13ad1e68092748387dfc4f55e356242fae12ce3e" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.87", +] + [[package]] name = "zeroize" version = "1.8.1" @@ -1046,5 +1526,5 @@ checksum = "ce36e65b0d2999d2aafac989fb249189a141aee1f53c612c1f37d72631959f69" dependencies = [ "proc-macro2", "quote", - "syn 2.0.43", + "syn 2.0.87", ] diff --git a/kampela-system/Cargo.toml b/kampela-system/Cargo.toml index 778d412..9a74ec6 100644 --- a/kampela-system/Cargo.toml +++ b/kampela-system/Cargo.toml @@ -6,22 +6,23 @@ version = "0.1.0" [dependencies] bitvec = {version = "1.0.1", default-features = false, features = ["alloc"]} -cortex-m = { version = "0.7.6", features = ["critical-section-single-core"]} +cortex-m = { version = "0.7.7", features = ["critical-section-single-core"]} efm32pg23_fix = {path = "../kampela_experiments_efm32pg23/efm32pg23_fix", features = ["critical-section", "rt"]} embedded-graphics = "0.7.1" embedded-text = {version = "0.5.0", default-features = false} external-memory-tools = {version = "0.1.1", default-features = false} kampela-display-common = { path = "../kampela-display-common" } +kampela-ui = { path = "../kampela-ui" , default-features = false } lazy_static = { version = "1.4.0", default_features = false, features = ["spin_no_std"]} lt-codes = {git = "https://github.com/Alzymologist/LT-codes", default-features = false} -mnemonic-external = {git = "https://github.com/Alzymologist/mnemonic-external", default-features = false} +mnemonic-external = { version = "0.1.0", default-features = false } parity-scale-codec = {version = "3.6.4", default-features = false, features = ["derive", "bit-vec"]} -primitive-types = {version = "0.12.1", default-features = false} +primitive-types = {version = "0.13.1", default-features = false} qrcodegen-no-heap = { version = "1.8.1" } rand_core = {version = "0.6.4", default-features = false} scale-info = {version = "2.9.0", default-features = false} -substrate-crypto-light = {git = "https://github.com/Alzymologist/substrate-crypto-light", default-features = false, features = ["sr25519"]} -substrate_parser = {git = "https://github.com/Alzymologist/substrate-parser", default-features = false, rev = "65de6a4fe207a64f9857247af4e9f7509fa6de4f"} +substrate-crypto-light = { version = "0.1.0", default-features = false, features = ["sr25519"] } +substrate_parser = { version = "0.7.0", default-features = false } [profile.release] codegen-units = 1 diff --git a/kampela-system/src/debug_display.rs b/kampela-system/src/debug_display.rs index f801de5..974f652 100644 --- a/kampela-system/src/debug_display.rs +++ b/kampela-system/src/debug_display.rs @@ -1,4 +1,4 @@ -use alloc::string::String; +use alloc::{boxed::Box, string::String}; use efm32pg23_fix::Peripherals; use cortex_m::asm::delay; @@ -26,8 +26,7 @@ use crate::devices::display_transmission::{ epaper_hw_init_cs, epaper_reset, epaper_write_command, - epaper_write_data, - BUFSIZE + epaper_write_data }; use crate::draw::FrameBuffer; //**** Debug stuff ****// @@ -42,9 +41,9 @@ pub fn burning_tank(peripherals: &mut Peripherals, text: String) { /// see this fn make_text(peripherals: &mut Peripherals, text: &str) { - let mut buffer = FrameBuffer::new_white(); + let mut buffer = Box::new(FrameBuffer::new_white()); let to_print = TextToPrint{line: text}; - to_print.draw(&mut buffer).unwrap(); + to_print.draw(buffer.as_mut()).unwrap(); buffer.apply(peripherals); } @@ -99,8 +98,8 @@ pub fn epaper_update_part(peripherals: &mut Peripherals) { /// Normal drawing protocol, with full screen clearing -pub fn epaper_draw_stuff_differently(peripherals: &mut Peripherals, stuff: [u8; BUFSIZE]) { - epaper_reset(&mut peripherals.GPIO_S); +pub fn epaper_draw_stuff_differently(peripherals: &mut Peripherals, stuff: [u8; SCREEN_BUFFER_SIZE]) { + epaper_reset(&mut peripherals.gpio_s); epaper_write_command(peripherals, &[0x4E]); epaper_write_data(peripherals, &[0x00]); epaper_write_command(peripherals, &[0x4F]); @@ -113,8 +112,8 @@ pub fn epaper_draw_stuff_differently(peripherals: &mut Peripherals, stuff: [u8; } /// Fast and dirty refresh drawing -pub fn epaper_draw_stuff_quickly(peripherals: &mut Peripherals, stuff: [u8; BUFSIZE]) { - epaper_reset(&mut peripherals.GPIO_S); +pub fn epaper_draw_stuff_quickly(peripherals: &mut Peripherals, stuff: [u8; SCREEN_BUFFER_SIZE]) { + epaper_reset(&mut peripherals.gpio_s); epaper_write_command(peripherals, &[0x4E]); epaper_write_data(peripherals, &[0x00]); epaper_write_command(peripherals, &[0x4F]); diff --git a/kampela-system/src/devices/display.rs b/kampela-system/src/devices/display.rs index 084da43..0ae59cd 100644 --- a/kampela-system/src/devices/display.rs +++ b/kampela-system/src/devices/display.rs @@ -1,502 +1,853 @@ //! display control functions - use crate::peripherals::usart::*; use crate::peripherals::gpio_pins::{display_res_clear, display_res_set}; use crate::in_free; -use crate::parallel::Operation; -use crate::devices::display_transmission::{display_is_busy, EPDCommand, EPDData, EPDDataB, EPDDataPart, BUFSIZE}; +use crate::parallel::{AsyncOperation, Threads, Timer, DELAY}; +use crate::devices::display_transmission::{display_is_busy, EPDCommand, EPDData, EPDDataBuffer}; +use kampela_ui::display_def::*; + +const LUT_LEN: usize = 0x99; +const FAST_LUT: [u8; LUT_LEN] = [ + 0xA0, 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // LUT 0 + 0x50, 0xA0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // LUT 1 + 0xA0, 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // LUT 2 + 0x50, 0xA0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // LUT 3 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // LUT 4 +// TPA TPB SRAB TPC TPD SRCD RP + 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + + 0x77, 0x00, 0x00, 0x00, 0x00, 0x00, // FR + 0x00, 0x00, 0x00, // XON +]; +const ULTRAFAST_LUT: [u8; LUT_LEN] = [ + 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // LUT 0 + 0xA0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // LUT 1 + 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // LUT 2 + 0xA0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // LUT 3 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // LUT 4 +// TPA TPB SRAB TPC TPD SRCD RP + 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + + 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, // FR + 0x00, 0x00, 0x00, // XON +]; +const ULTRAFAST_SELECTIVE_LUT: [u8; LUT_LEN] = [ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // LUT 0 + 0xA0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // LUT 1 + 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // LUT 2 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // LUT 3 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // LUT 4 +// TPA TPB SRAB TPC TPD SRCD RP + 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + + 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, // FR + 0x00, 0x00, 0x00, // XON +]; + +pub type Bounds = (u8, u8, u16, u16); /// Draw sequence /// /// Iterate through this to perform drawing and send display to proper sleep mode -pub struct Request { - state: RequestState, +pub struct Request where + R: for <'a> RequestType< + Init = ::Init, + Input<'a> = (), + Output = Option, + > +{ + threads: Threads, 1>, + part_options: Option, + selective_refresh: Option, } -pub enum RequestState { - Init(EPDInit), - Draw(R), +enum RequestState where + R: for <'a> RequestType< + Init = ::Init, + Input<'a> = (), + Output = Option, + > +{ + Init(Option), + PrepareDraw(Option), + Update(Option), + PostUpdate(Option), + DeepSleepEnter(Option), + End, + Error, } -impl Operation for Request where +impl Default for RequestState where R: for <'a> RequestType< - Init = (), - Output = bool, + Init = ::Init, + Input<'a> = (), + Output = Option, > { - type Init = (); - type Input<'a> = R::Input<'a>; - type Output = bool; - type StateEnum = RequestState; + fn default() -> Self { RequestState::::Error } +} - fn new(_: ()) -> Self { +impl AsyncOperation for Request where + R: for <'a> RequestType< + Init = ::Init, + Input<'a> = (), + Output = Option, + > +{ + type Init = (Option, Option); + type Input<'a> = ::Input<'a>; + type Output = Option; + + fn new((part_options, selective_refresh): Self::Init) -> Self { Self { - state: RequestState::Init(EPDInit::new(())), + threads: Threads::new(RequestState::Init(None)), + part_options, + selective_refresh, } } - fn wind(&mut self, state: RequestState, _delay: usize) { - self.state = state; - } - - fn advance(&mut self, data: Self::Input<'_>) -> bool { - match self.state { - RequestState::Init(ref mut a) => { - if a.advance(()) { - let new_state = RequestState::Draw(R::new(())); - self.wind_d(new_state); - }; - false - }, - RequestState::Draw(ref mut a) => { - if display_is_busy() != Ok(false) { return false }; - a.advance(data) - /* - epaper_draw_stuff_quickly(peripherals, self.data.into_inner()); - or - epaper_draw_stuff_differently(peripherals, self.data.into_inner()); - */ + fn advance(&mut self, data: Self::Input<'_>) -> Self::Output { + match self.threads.turn() { + RequestState::Init(state) => { + match state { + None => { + self.threads.change(RequestState::Init(Some(EPDInit::new(())))); + }, + Some(a) => { + match a.advance(()) { + Some(true) => { + self.threads.change(RequestState::PrepareDraw(None)); + }, + r => return r + }; + } + } + Some(false) + }, + RequestState::PrepareDraw(state) => { + match state { + None => { + self.threads.change(RequestState::PrepareDraw( + Some( + PrepareDraw::new(( + self.part_options, + self.selective_refresh.unwrap_or(false) + )) + ) + )); + }, + Some(a) => { + match a.advance(data) { + Some(true) => { + self.threads.change(RequestState::Update(None)); + }, + r => return r + }; + } + } + Some(false) + }, + RequestState::Update(state) => { + match state { + None => { + self.threads.change(RequestState::Update(Some(R::new(self.selective_refresh.is_some())))); + }, + Some(a) => { + match a.advance(()) { + Some(true) => { + self.threads.change(RequestState::PostUpdate(None)); + }, + r => return r + } + } + } + Some(false) + }, + RequestState::PostUpdate(state) => { + match state { + None => { + self.threads.change(RequestState::PostUpdate( + Some( + PostUpdate::new(( + self.part_options, + self.selective_refresh.unwrap_or(false) + )) + ) + )); + }, + Some(a) => { + match a.advance(data) { + Some(true) => { + self.threads.change(RequestState::DeepSleepEnter(None)); + }, + r => return r + } + } + } + Some(false) + }, + RequestState::DeepSleepEnter(state) => { + match state { + None => { + self.threads.change(RequestState::DeepSleepEnter(Some(EPDDeepSleepEnter::new(())))); + }, + Some(a) => { + match a.advance(()) { + Some(true) => { + self.threads.change(RequestState::End); + return Some(true) + }, + r => return r + } + } + } + Some(false) + }, + RequestState::End => { + Some(true) + }, + RequestState::Error => { + panic!("Unknown RequestState while display") } } } } -/// EPD init to wake up display -pub struct EPDInit { - state: EPDInitState, -} -pub enum EPDInitState { - Reset(Reset), - WakeUp(EPDCommand<0x12>), -} -impl Operation for EPDInit { - type Init = (); - type Input<'a> = (); - type Output = bool; - type StateEnum = EPDInitState; - - fn new(_: ()) -> Self { - Self { - state: EPDInitState::Reset(Reset::new(())), - } - } - - fn wind(&mut self, state: EPDInitState, _: usize) { - self.state = state; - } +/// EPD init to wake up display +struct EPDInit { + threads: Threads, +} - fn advance(&mut self, _: ()) -> bool { - match self.state{ - EPDInitState::Reset(ref mut a) => { - if a.advance(()) { - self.wind(EPDInitState::WakeUp(EPDCommand::<0x12>::new(())), 10) - } - false - }, - EPDInitState::WakeUp(ref mut a) => { - if display_is_busy() != Ok(false) { return false }; - a.advance(()) - } - } - } +enum EPDInitState { + ResSet(Option), + ResClr(Option), + WakeUp(Option>), + End, + Error, } -/// Reset display -/// -/// notably used for waking up -pub struct Reset { - state: ResetState, - timer: usize, -} - -pub enum ResetState { - R0, - R1, - R2, - R3, -} - -impl Reset { - fn count(&mut self) -> bool { - if self.timer == 0 { - false - } else { - self.timer -= 1; - true - } - } +impl Default for EPDInitState { + fn default() -> Self { EPDInitState::Error } } -impl Operation for Reset { +impl AsyncOperation for EPDInit { type Init = (); type Input<'a> = (); - type Output = bool; - type StateEnum = ResetState; + type Output = Option; fn new(_: ()) -> Self { Self { - state: ResetState::R0, - timer: 0 + threads: Threads::new(EPDInitState::ResSet(None)), } } - - fn wind(&mut self, state: ResetState, delay: usize) { - self.state = state; - self.timer = delay; - } - - - fn advance(&mut self, _: ()) -> bool { - if self.count() { return false }; - match self.state { - ResetState::R0 => { - in_free(|peripherals| display_res_clear(&mut peripherals.GPIO_S)); - self.wind_d(ResetState::R1); - false + fn advance(&mut self, _: ()) -> Self::Output { + match self.threads.turn() { + EPDInitState::ResSet(state) => { + match state { + None => { + in_free(|peripherals| { + deselect_display(&mut peripherals.gpio_s); + display_res_set(&mut peripherals.gpio_s); + }); + self.threads.change(EPDInitState::ResSet(Some(Timer::new(DELAY)))); + }, + Some(t) => { + if t.tick() { + return None + } + self.threads.change(EPDInitState::ResClr(None)); + } + } + Some(false) }, - ResetState::R1 => { - in_free(|peripherals| display_res_set(&mut peripherals.GPIO_S)); - self.wind_d(ResetState::R2); - false + EPDInitState::ResClr(state) => { + match state { + None => { + in_free(|peripherals| { + select_display(&mut peripherals.gpio_s); + display_res_clear(&mut peripherals.gpio_s); + }); + self.threads.change(EPDInitState::ResClr(Some(Timer::new(DELAY)))); + }, + Some(t) => { + if t.tick() { + return None + } + self.threads.change(EPDInitState::WakeUp(None)); + } + } + Some(false) }, - ResetState::R2 => { - in_free(|peripherals| display_res_clear(&mut peripherals.GPIO_S)); - self.wind_d(ResetState::R3); - false + EPDInitState::WakeUp(state) => { + match state { + None => { + self.threads.change(EPDInitState::WakeUp(Some(EPDCommand::new(())))); + }, + Some(a) => { + match a.advance(()) { + Some(true) => { + if display_is_busy() != Ok(false) { + return None + } + self.threads.change(EPDInitState::End); + return Some(true) + }, + r => return r + }; + } + } + Some(false) }, - ResetState::R3 => { // TODO: this is not ZERO operation, should it be here? - in_free(|peripherals| deselect_display(&mut peripherals.GPIO_S)); - true + EPDInitState::End => { + Some(true) + } + EPDInitState::Error => { + panic!("Unknown EPDInitState while display") }, } } } - -pub trait RequestType: Operation {} -impl RequestType for FastDraw {} -impl RequestType for FullDraw {} -impl RequestType for PartDraw {} - -/// Fast draw sequence without full refresh -/// -/// display should be awake -pub struct FastDraw { - state: FastDrawState, - timer: usize, +/// Write opposite RAM with the same data +struct PostUpdate { + threads: Threads, + bounds: as AsyncOperation>::Init, + last_black: bool, } -pub enum FastDrawState { - PrepareC1(EPDCommand<0x4E>), - PrepareD1(EPDDataB<0x00>), - PrepareC2(EPDCommand<0x4F>), - PrepareD2(EPDDataB<0x07>), - - SendC1(EPDCommand<0x24>), - SendD1(EPDData), +enum PostUpdateState { + WriteRamBlackOrRed(Option), + SendBufferData(Option>), + End, + Error, +} - Update(UpdateFast), +impl Default for PostUpdateState { + fn default() -> Self { PostUpdateState::Error } } -impl Operation for FastDraw { - type Init = (); - type Input<'a> = &'a [u8]; - type Output = bool; - type StateEnum = FastDrawState; +impl AsyncOperation for PostUpdate { + type Init = ( as AsyncOperation>::Init, bool); + type Input<'a> = &'a [u8; SCREEN_BUFFER_SIZE]; + type Output = Option; - fn new(_: ()) -> Self { + fn new((bounds, last_black): Self::Init) -> Self { Self { - state: FastDrawState::PrepareC1(EPDCommand::<0x4E>::new(())), - timer: 0, + threads: Threads::new(PostUpdateState::WriteRamBlackOrRed(None)), + bounds, + last_black, } } - fn wind(&mut self, state: FastDrawState, delay: usize) { - self.state = state; - self.timer = delay; - } - - fn advance(&mut self, data: Self::Input<'_>) -> bool { - match self.state{ - FastDrawState::PrepareC1(ref mut a) => { - if a.advance(()) { - self.change(FastDrawState::PrepareD1(EPDDataB::<0x00>::new(()))); - } - false - }, - FastDrawState::PrepareD1(ref mut a) => { - if a.advance(()) { - self.change(FastDrawState::PrepareC2(EPDCommand::<0x4F>::new(()))); - } - false - }, - FastDrawState::PrepareC2(ref mut a) => { - if a.advance(()) { - self.change(FastDrawState::PrepareD2(EPDDataB::<0x07>::new(()))); - } - false - }, - FastDrawState::PrepareD2(ref mut a) => { - if a.advance(()) { - self.change(FastDrawState::SendC1(EPDCommand::<0x24>::new(()))); - } - false - }, - FastDrawState::SendC1(ref mut a) => { - if display_is_busy() != Ok(false) { return false }; - if a.advance(()) { - self.change(FastDrawState::SendD1(EPDData::::new(()))); + fn advance(&mut self, data: Self::Input<'_>) -> Self::Output { + match self.threads.turn() { + PostUpdateState::WriteRamBlackOrRed(state) => { + match state { + None => { + let epd_command = if self.last_black { + WriteBlackOrRed::Black(EPDCommand::new(())) + } else { + WriteBlackOrRed::Red(EPDCommand::new(())) + }; + self.threads.change(PostUpdateState::WriteRamBlackOrRed(Some(epd_command))); + }, + Some(a) => { + let b = match a { + WriteBlackOrRed::Black(a) => a.advance(()), + WriteBlackOrRed::Red(a) => a.advance(()), + }; + match b { + Some(true) => self.threads.change(PostUpdateState::SendBufferData(None)), + r => return r + }; + } } - false + Some(false) }, - FastDrawState::SendD1(ref mut a) => { - if a.advance(data) { - self.change(FastDrawState::Update(UpdateFast::new(()))); + PostUpdateState::SendBufferData(state) => { + match state { + None => { + self.threads.change(PostUpdateState::SendBufferData(Some(EPDDataBuffer::::new(self.bounds)))); + }, + Some(a) => { + match a.advance(data) { + Some(true) => { + self.threads.change(PostUpdateState::End); + return Some(true) + }, + r => return r + }; + } } - false + Some(false) }, - FastDrawState::Update(ref mut a) => { - a.advance(()) + PostUpdateState::End => { + Some(true) } + PostUpdateState::Error => { + panic!("Unknown EPDInitState while display") + }, } } +} +/// Set EPD to sleep saving ram data +struct EPDDeepSleepEnter { + threads: Threads, } -/// Slow drawing sequence with full refresh; -/// -/// display should be awake -pub struct FullDraw { - state: FullDrawState, - timer: usize, +enum EPDDeepSleepEnterState { + DeepSleepMode(Option>), + // Retain RAM data + EnterDeepSleepMode1(Option>), + End, + Error, } -pub enum FullDrawState { - PrepareC1(EPDCommand<0x4E>), - PrepareD1(EPDDataB<0x00>), - PrepareC2(EPDCommand<0x4F>), - PrepareD2(EPDDataB<0x07>), - SendC1(EPDCommand<0x24>), - SendD1(EPDData), - Update(UpdateFull), +impl Default for EPDDeepSleepEnterState { + fn default() -> Self { EPDDeepSleepEnterState::Error } } -impl Operation for FullDraw { +impl AsyncOperation for EPDDeepSleepEnter { type Init = (); - type Input<'a> = &'a [u8]; - type Output = bool; - type StateEnum = FullDrawState; + type Input<'a> = (); + type Output = Option; fn new(_: ()) -> Self { Self { - state: FullDrawState::PrepareC1(EPDCommand::<0x4E>::new(())), - timer: 0, + threads: Threads::new(EPDDeepSleepEnterState::DeepSleepMode(None)), } } - fn wind(&mut self, state: FullDrawState, delay: usize) { - self.state = state; - self.timer = delay; - } - - fn advance(&mut self, data: Self::Input<'_>) -> bool { - match self.state{ - FullDrawState::PrepareC1(ref mut a) => { - if a.advance(()) { - self.change(FullDrawState::PrepareD1(EPDDataB::<0x00>::new(()))); - } - false - }, - FullDrawState::PrepareD1(ref mut a) => { - if a.advance(()) { - self.change(FullDrawState::PrepareC2(EPDCommand::<0x4F>::new(()))); - } - false - }, - FullDrawState::PrepareC2(ref mut a) => { - if a.advance(()) { - self.change(FullDrawState::PrepareD2(EPDDataB::<0x07>::new(()))); + fn advance(&mut self, _: ()) -> Self::Output { + match self.threads.turn() { + EPDDeepSleepEnterState::DeepSleepMode(state) => { + match state { + None => { + self.threads.change(EPDDeepSleepEnterState::DeepSleepMode(Some(EPDCommand::new(())))); + }, + Some(a) => { + match a.advance(()) { + Some(true) => { + self.threads.change(EPDDeepSleepEnterState::EnterDeepSleepMode1(None)); + }, + r => return r + } + } } - false + Some(false) }, - FullDrawState::PrepareD2(ref mut a) => { - if a.advance(()) { - self.change(FullDrawState::SendC1(EPDCommand::<0x24>::new(()))); + EPDDeepSleepEnterState::EnterDeepSleepMode1(state) => { + match state { + None => { + self.threads.change(EPDDeepSleepEnterState::EnterDeepSleepMode1(Some(EPDData::new(())))); + }, + Some(a) => { + match a.advance(&[0x01]) { + Some(true) => { + in_free(|peripherals| { + deselect_display(&mut peripherals.gpio_s); + }); + self.threads.change(EPDDeepSleepEnterState::End); + return Some(true) + }, + r => return r + } + } } - false + Some(false) }, - FullDrawState::SendC1(ref mut a) => { - if a.advance(()) { - self.change(FullDrawState::SendD1(EPDData::::new(()))); - } - false - }, - FullDrawState::SendD1(ref mut a) => { - if a.advance(data) { - self.change(FullDrawState::Update(UpdateFull::new(()))); - } - false - }, - FullDrawState::Update(ref mut a) => { - a.advance(()) + EPDDeepSleepEnterState::End => { + Some(true) } + EPDDeepSleepEnterState::Error => { + panic!("Unknown EPDInitState while display") + }, } } } -pub struct PartDraw { - state: PartDrawState, - timer: usize, +pub trait RequestType: AsyncOperation {} +impl RequestType for UpdateFast {} +impl RequestType for UpdateFull {} +impl RequestType for UpdateUltraFast {} + +pub struct PrepareDraw { + threads: Threads, + bounds: as AsyncOperation>::Init, + last_black: bool, } -pub enum PartDrawState { - //BorderWavefrom, - PrepareC1(EPDCommand<0x3C>), - PrepareD1(EPDDataB<0x80>), +enum WriteBlackOrRed { + Black(EPDCommand<0x24>), + Red(EPDCommand<0x26>), +} + +enum PrepareDrawState { //Set RAM X address start/end postition (which is Y due to orientation) - PrepareC2(EPDCommand<0x44>), - PrepareD21(EPDData<1>), - PrepareD22(EPDData<1>), + SetRamXAddress(Option>), + RamXStartEnd(Option<(EPDData<2>, [u8; 2])>), //Set RAM Y address start/end postition (which is X due to orientation) - PrepareC3(EPDCommand<0x45>), - PrepareD31(EPDData<2>), - PrepareD32(EPDData<2>), + SetRamYAddress(Option>), + RamYStartEnd(Option<(EPDData<4>, [u8; 4])>), //Set RAM X&Y address write starting position - PrepareC4(EPDCommand<0x4E>), - PrepareD4(EPDData<1>), - PrepareC5(EPDCommand<0x4F>), - PrepareD5(EPDData<2>), + SetRamXAddressCounter(Option>), + RamXAddressCounter(Option<(EPDData<1>, [u8; 1])>), + SetRamYAddressCounter(Option>), + RamYAddressCounter(Option<(EPDData<2>, [u8; 2])>), + //BorderWavefrom, + BorderWaveformControl(Option>), + VBDasVCOM(Option>), + + DisplayUpdateControl1(Option>), + InverseRedInverseBlackRam(Option>), - SendC1(EPDCommand<0x24>), - SendD1(EPDDataPart), - SendC2(EPDCommand<0x26>), //for some reason red ram still used in mode 2 - SendD2(EPDDataPart), + WriteRamBlackOrRed(Option), + SendBufferData(Option>), - Update(UpdateUltraFast), + End, + Error, } -impl Operation for PartDraw { - type Init = (); - type Input<'a> = (&'a [u8], (u8, u8, u16, u16)); - type Output = bool; - type StateEnum = PartDrawState; +impl Default for PrepareDrawState { + fn default() -> Self { PrepareDrawState::Error } +} - fn new(_: ()) -> Self { +impl AsyncOperation for PrepareDraw { + type Init = ( as AsyncOperation>::Init, bool); + type Input<'a> = &'a [u8; SCREEN_BUFFER_SIZE]; + type Output = Option; + + fn new((bounds, last_black): Self::Init) -> Self { + let init_state = match bounds { + //skip bounds addresses transmission + None => { + PrepareDrawState::SetRamXAddressCounter(None) + }, + Some(_) => { + PrepareDrawState::SetRamXAddress(None) + } + }; Self { - state: PartDrawState::PrepareC1(EPDCommand::<0x3C>::new(())), - timer: 0, + threads: Threads::new(init_state), + bounds, + last_black, } } - fn wind(&mut self, state: PartDrawState, delay: usize) { - self.state = state; - self.timer = delay; - } - - fn advance(&mut self, data: Self::Input<'_>) -> bool { - match self.state{ - PartDrawState::PrepareC1(ref mut a) => { - if a.advance(()) { - self.change(PartDrawState::PrepareD1(EPDDataB::<0x80>::new(()))); - } - false - }, - PartDrawState::PrepareD1(ref mut a) => { - if a.advance(()) { - self.change(PartDrawState::PrepareC2(EPDCommand::<0x44>::new(()))); + fn advance(&mut self, data: Self::Input<'_>) -> Self::Output { + match self.threads.turn() { + PrepareDrawState::SetRamXAddress(state) => { + match state { + None => { + self.threads.change(PrepareDrawState::SetRamXAddress(Some(EPDCommand::new(())))); + }, + Some(a) => { + match a.advance(()) { + Some(true) => { + self.threads.change(PrepareDrawState::RamXStartEnd(None)); + }, + r => return r + }; + } } - false + Some(false) }, - PartDrawState::PrepareC2(ref mut a) => { - if a.advance(()) { - self.change(PartDrawState::PrepareD21(EPDData::<1>::new(()))); + PrepareDrawState::RamXStartEnd(state) => { + match state { + None => { + let mut start_end = [0; 2]; + if let Some(b) = self.bounds { + start_end[0..1].copy_from_slice(&(b.0).to_le_bytes()); + start_end[1..2].copy_from_slice(&(b.1).to_le_bytes()); + } + + self.threads.change(PrepareDrawState::RamXStartEnd( + Some( + ( + EPDData::new(()), + start_end + ) + ) + )); + }, + Some((a, b)) => { + match a.advance(&b) { + Some(true) => { + self.threads.change(PrepareDrawState::SetRamYAddress(None)); + }, + r => return r + }; + } } - false + Some(false) }, - PartDrawState::PrepareD21(ref mut a) => { - if a.advance(&data.1.0.to_le_bytes()) { - self.change(PartDrawState::PrepareD22(EPDData::<1>::new(()))); + PrepareDrawState::SetRamYAddress(state) => { + match state { + None => { + self.threads.change(PrepareDrawState::SetRamYAddress(Some(EPDCommand::new(())))); + }, + Some(a) => { + match a.advance(()) { + Some(true) => { + self.threads.change(PrepareDrawState::RamYStartEnd(None)); + }, + r => return r + }; + } } - false + Some(false) }, - PartDrawState::PrepareD22(ref mut a) => { - if a.advance(&data.1.1.to_le_bytes()) { - self.change(PartDrawState::PrepareC3(EPDCommand::<0x45>::new(()))); + PrepareDrawState::RamYStartEnd(state) => { + match state { + None => { + let mut start_end = [0; 4]; + if let Some(b) = self.bounds { + start_end[0..2].copy_from_slice(&(b.2).to_le_bytes()); + start_end[2..4].copy_from_slice(&(b.3).to_le_bytes()); + } + + self.threads.change(PrepareDrawState::RamYStartEnd( + Some( + ( + EPDData::new(()), + start_end + ) + ) + )); + }, + Some((a, b)) => { + match a.advance(&b) { + Some(true) => { + self.threads.change(PrepareDrawState::SetRamXAddressCounter(None)); + }, + r => return r + }; + } } - false + Some(false) }, - PartDrawState::PrepareC3(ref mut a) => { - if a.advance(()) { - self.change(PartDrawState::PrepareD31(EPDData::<2>::new(()))); + PrepareDrawState::SetRamXAddressCounter(state) => { + match state { + None => { + self.threads.change(PrepareDrawState::SetRamXAddressCounter(Some(EPDCommand::new(())))); + }, + Some(a) => { + match a.advance(()) { + Some(true) => { + self.threads.change(PrepareDrawState::RamXAddressCounter(None)); + }, + r => return r + }; + } } - false + Some(false) }, - PartDrawState::PrepareD31(ref mut a) => { - if a.advance(&data.1.2.to_le_bytes()) { - self.change(PartDrawState::PrepareD32(EPDData::<2>::new(()))); + PrepareDrawState::RamXAddressCounter(state) => { + match state { + None => { + let x = match self.bounds { + None => [0], + Some(b) => b.0.to_le_bytes() + }; + self.threads.change(PrepareDrawState::RamXAddressCounter(Some((EPDData::new(()), x)))); + }, + Some((a, x)) => { + match a.advance(x) { + Some(true) => { + self.threads.change(PrepareDrawState::SetRamYAddressCounter(None)); + }, + r => return r + }; + } } - false + Some(false) }, - PartDrawState::PrepareD32(ref mut a) => { - if a.advance(&data.1.3.to_le_bytes()) { - self.change(PartDrawState::PrepareC4(EPDCommand::<0x4E>::new(()))); + PrepareDrawState::SetRamYAddressCounter(state) => { + match state { + None => { + self.threads.change(PrepareDrawState::SetRamYAddressCounter(Some(EPDCommand::new(())))); + }, + Some(a) => { + match a.advance(()) { + Some(true) => { + self.threads.change(PrepareDrawState::RamYAddressCounter(None)); + }, + r => return r + }; + } } - false + Some(false) }, - PartDrawState::PrepareC4(ref mut a) => { - if a.advance(()) { - self.change(PartDrawState::PrepareD4(EPDData::<1>::new(()))); + PrepareDrawState::RamYAddressCounter(state) => { + match state { + None => { + let y = match self.bounds { + None => (SCREEN_SIZE_X as u16 - 1).to_le_bytes(), + Some(b) => b.2.to_le_bytes() + }; + self.threads.change(PrepareDrawState::RamYAddressCounter(Some((EPDData::new(()), y)))); + }, + Some((a, y)) => { + match a.advance(y) { + Some(true) => { + self.threads.change(PrepareDrawState::BorderWaveformControl(None)); + }, + r => return r + }; + } } - false + Some(false) }, - PartDrawState::PrepareD4(ref mut a) => { - if a.advance(&data.1.0.to_le_bytes()) { - self.change(PartDrawState::PrepareC5(EPDCommand::<0x4F>::new(()))); + PrepareDrawState::BorderWaveformControl(state) => { + match state { + None => { + self.threads.change(PrepareDrawState::BorderWaveformControl(Some(EPDCommand::new(())))); + }, + Some(a) => { + match a.advance(()) { + Some(true) => { + self.threads.change(PrepareDrawState::VBDasVCOM(None)); + }, + r => return r + }; + } } - false + Some(false) }, - PartDrawState::PrepareC5(ref mut a) => { - if a.advance(()) { - self.change(PartDrawState::PrepareD5(EPDData::<2>::new(()))); + PrepareDrawState::VBDasVCOM(state) => { + match state { + None => { + self.threads.change(PrepareDrawState::VBDasVCOM(Some(EPDData::new(())))); + }, + Some(a) => { + match a.advance(&[0x01]) { + Some(true) => { + self.threads.change(PrepareDrawState::DisplayUpdateControl1(None)); + }, + r => return r + }; + } } - false - }, - PartDrawState::PrepareD5(ref mut a) => { - if a.advance(&data.1.2.to_le_bytes()) { - self.change(PartDrawState::SendC1(EPDCommand::<0x24>::new(()))); + Some(false) + } + PrepareDrawState::DisplayUpdateControl1(state) => { + match state { + None => { + if self.last_black { + self.threads.change(PrepareDrawState::DisplayUpdateControl1(Some(EPDCommand::new(())))); + } else { + self.threads.change(PrepareDrawState::WriteRamBlackOrRed(None)); // skip inverse + } + }, + Some(a) => { + match a.advance(()) { + Some(true) => { + self.threads.change(PrepareDrawState::InverseRedInverseBlackRam(None)); + }, + r => return r + }; + } } - false + Some(false) }, - PartDrawState::SendC1(ref mut a) => { - if a.advance(()) { - self.change(PartDrawState::SendD1(EPDDataPart::::new(data.1))); + PrepareDrawState::InverseRedInverseBlackRam(state) => { + match state { + None => { + self.threads.change(PrepareDrawState::InverseRedInverseBlackRam(Some(EPDData::new(())))); + }, + Some(a) => { + match a.advance(&[0x88, 0x00]) { + Some(true) => { + self.threads.change(PrepareDrawState::WriteRamBlackOrRed(None)); + }, + r => return r + }; + } } - false - }, - PartDrawState::SendD1(ref mut a) => { - if a.advance(data.0) { - self.change(PartDrawState::SendC2(EPDCommand::<0x26>::new(()))); + Some(false) + } + PrepareDrawState::WriteRamBlackOrRed(state) => { + match state { + None => { + let epd_command = if self.last_black { + WriteBlackOrRed::Red(EPDCommand::new(())) + } else { + WriteBlackOrRed::Black(EPDCommand::new(())) + }; + self.threads.change(PrepareDrawState::WriteRamBlackOrRed(Some(epd_command))); + }, + Some(a) => { + let b = match a { + WriteBlackOrRed::Black(a) => a.advance(()), + WriteBlackOrRed::Red(a) => a.advance(()), + }; + match b { + Some(true) => self.threads.change(PrepareDrawState::SendBufferData(None)), + r => return r + }; + } } - false + Some(false) }, - PartDrawState::SendC2(ref mut a) => { - if a.advance(()) { - self.change(PartDrawState::SendD2(EPDDataPart::::new(data.1))); + PrepareDrawState::SendBufferData(state) => { + match state { + None => { + self.threads.change(PrepareDrawState::SendBufferData(Some(EPDDataBuffer::::new(self.bounds)))); + }, + Some(a) => { + match a.advance(data) { + Some(true) => { + self.threads.change(PrepareDrawState::End); + }, + r => return r + }; + } } - false + Some(false) }, - PartDrawState::SendD2(ref mut a) => { - if a.advance(data.0) { - self.change(PartDrawState::Update(UpdateUltraFast::new(()))); - } - false + PrepareDrawState::End => { + Some(true) }, - PartDrawState::Update(ref mut a) => { - a.advance(()) + PrepareDrawState::Error => { + panic!("Unknown PrepareDrawState while display") } } } @@ -504,348 +855,395 @@ impl Operation for PartDraw { pub struct UpdateFull { - state: UpdateFullState, - timer: usize, + threads: Threads, } -pub enum UpdateFullState { - //bypass RED RAM - UpdateC1(EPDCommand<0x21>), - UpdateD11(EPDDataB<0x40>), - UpdateD12(EPDDataB<0x00>), +enum UpdateFullState { // set read temperature from internal TS - UpdateC2(EPDCommand<0x18>), - UpdateD2(EPDDataB<0x80>), + TempSensorControl(Option>), + InternalTempSensor(Option>), - UpdateC3(EPDCommand<0x22>), - UpdateD3(EPDDataB<0xF7>), + DisplayUpdateControl2(Option>), + DisplayMode1(Option>), + + MasterActivation(Option>), - UpdateC4(EPDCommand<0x20>), + End, + Error, } -impl UpdateFull { - fn count(&mut self) -> bool { - if self.timer == 0 { - false - } else { - self.timer -= 1; - true - } - } +impl Default for UpdateFullState { + fn default() -> Self { UpdateFullState::Error } } -impl Operation for UpdateFull { - type Init = (); +impl AsyncOperation for UpdateFull { + type Init = ::Init; type Input<'a> = (); - type Output = bool; - type StateEnum = UpdateFullState; + type Output = Option; - fn new(_: ()) -> Self { + fn new(_: Self::Init) -> Self { Self { - state: UpdateFullState::UpdateC1(EPDCommand::<0x21>::new(())), - timer: 0 + threads: Threads::new(UpdateFullState::TempSensorControl(None)), } } - - fn wind(&mut self, state: UpdateFullState, delay: usize) { - self.state = state; - self.timer = delay; - } - - fn advance(&mut self, _: ()) -> bool { - if self.count() { return false }; - match self.state { - UpdateFullState::UpdateC1(ref mut a) => { - if a.advance(()) { - self.change(UpdateFullState::UpdateD11(EPDDataB::<0x40>::new(()))); + fn advance(&mut self, _: ()) -> Self::Output { + match self.threads.turn() { + UpdateFullState::TempSensorControl(state) => { + match state { + None => { + self.threads.change(UpdateFullState::TempSensorControl(Some(EPDCommand::new(())))); + }, + Some(a) => { + match a.advance(()) { + Some(true) => { + self.threads.change(UpdateFullState::InternalTempSensor(None)); + }, + r => return r + }; + } } - false + Some(false) }, - UpdateFullState::UpdateD11(ref mut a) => { - if a.advance(()) { - self.change(UpdateFullState::UpdateD12(EPDDataB::<0x00>::new(()))); + UpdateFullState::InternalTempSensor(state) => { + match state { + None => { + self.threads.change(UpdateFullState::InternalTempSensor(Some(EPDData::new(())))); + }, + Some(a) => { + match a.advance(&[0x80]) { + Some(true) => { + self.threads.change(UpdateFullState::DisplayUpdateControl2(None)); + }, + r => return r + }; + } } - false + Some(false) }, - UpdateFullState::UpdateD12(ref mut a) => { - if a.advance(()) { - self.change(UpdateFullState::UpdateC2(EPDCommand::<0x18>::new(()))); + UpdateFullState::DisplayUpdateControl2(state) => { + match state { + None => { + self.threads.change(UpdateFullState::DisplayUpdateControl2(Some(EPDCommand::new(())))); + }, + Some(a) => { + match a.advance(()) { + Some(true) => { + self.threads.change(UpdateFullState::DisplayMode1(None)); + }, + r => return r + }; + } } - false + Some(false) }, - UpdateFullState::UpdateC2(ref mut a) => { - if a.advance(()) { - self.change(UpdateFullState::UpdateD2(EPDDataB::<0x80>::new(()))); + UpdateFullState::DisplayMode1(state) => { + match state { + None => { + self.threads.change(UpdateFullState::DisplayMode1(Some(EPDData::new(())))); + }, + Some(a) => { + match a.advance(&[0xF7]) { + Some(true) => { + self.threads.change(UpdateFullState::MasterActivation(None)); + }, + r => return r + }; + } } - false + Some(false) }, - UpdateFullState::UpdateD2(ref mut a) => { - if a.advance(()) { - self.change(UpdateFullState::UpdateC3(EPDCommand::<0x22>::new(()))); + UpdateFullState::MasterActivation(state) => { + match state { + None => { + self.threads.change(UpdateFullState::MasterActivation(Some(EPDCommand::new(())))); + }, + Some(a) => { + match a.advance(()) { + Some(true) => { + if display_is_busy() != Ok(false) { + return None + } + self.threads.change(UpdateFullState::End); + return Some(true) + }, + r => return r + } + } } - false + Some(false) }, - UpdateFullState::UpdateC3(ref mut a) => { - if a.advance(()) { - self.change(UpdateFullState::UpdateD3(EPDDataB::<0xF7>::new(()))); - } - false - }, - UpdateFullState::UpdateD3(ref mut a) => { - if a.advance(()) { - self.change(UpdateFullState::UpdateC4(EPDCommand::<0x20>::new(()))); - } - false - }, - UpdateFullState::UpdateC4(ref mut a) => { - if display_is_busy() != Ok(false) { return false }; - if a.advance(()) { - true - } else { - false - } + UpdateFullState::End => { + Some(true) }, + UpdateFullState::Error => { + panic!("Unknown UpdateFullState while display") + } } } } pub struct UpdateFast { - state: UpdateFastState, - timer: usize, -} - -pub enum UpdateFastState { - //set read from internal temperature sensor - PrepareC1(EPDCommand<0x18>), - PrepareD1(EPDDataB<0x80>), - //set temperature register at 100deg - PrepareC2(EPDCommand<0x1A>), - PrepareD21(EPDDataB<0x64>), - PrepareD22(EPDDataB<0x00>), - //load LUT with new temperature value - PrepareC3(EPDCommand<0x22>), - PrepareD3(EPDDataB<0x91>), - PrepareC4(EPDCommand<0x20>), - // bypass RED RAM - UpdateC1(EPDCommand<0x21>), - UpdateD11(EPDDataB<0x40>), - UpdateD12(EPDDataB<0x00>), - // set to display with new LUT - UpdateC2(EPDCommand<0x22>), - UpdateD2(EPDDataB<0xC7>), - - UpdateC3(EPDCommand<0x20>), -} - -impl UpdateFast { - fn count(&mut self) -> bool { - if self.timer == 0 { - false - } else { - self.timer -= 1; - true - } - } + threads: Threads, } -impl Operation for UpdateFast { - type Init = (); +enum UpdateFastState { + // Load custom LUT + WtiteLUTRegister(Option>), + CustomLUTData(Option>), + // Display with mode 1 + DisplayUpdateControl2(Option>), + DisplayMode1NoLoadLUT(Option>), + + MasterActivation(Option>), + + End, + Error, +} + +impl Default for UpdateFastState { + fn default() -> Self { UpdateFastState::Error } +} + +impl AsyncOperation for UpdateFast { + type Init = ::Init; type Input<'a> = (); - type Output = bool; - type StateEnum = UpdateFastState; + type Output = Option; - fn new(_: ()) -> Self { + fn new(_: Self::Init) -> Self { Self { - state: UpdateFastState::PrepareC1(EPDCommand::<0x18>::new(())), - timer: 0 + threads: Threads::new(UpdateFastState::WtiteLUTRegister(None)), } } - - fn wind(&mut self, state: UpdateFastState, delay: usize) { - self.state = state; - self.timer = delay; - } - fn advance(&mut self, _: ()) -> bool { - if self.count() { return false }; - match self.state { - UpdateFastState::PrepareC1(ref mut a) => { - if a.advance(()) { - self.change(UpdateFastState::PrepareD1(EPDDataB::<0x80>::new(()))); - } - false - }, - UpdateFastState::PrepareD1(ref mut a) => { - if a.advance(()) { - self.change(UpdateFastState::PrepareC2(EPDCommand::<0x1A>::new(()))); - } - false - }, - UpdateFastState::PrepareC2(ref mut a) => { - if a.advance(()) { - self.change(UpdateFastState::PrepareD21(EPDDataB::<0x64>::new(()))); + fn advance(&mut self, _: ()) -> Self::Output { + match self.threads.turn() { + UpdateFastState::WtiteLUTRegister(state) => { + match state { + None => { + self.threads.change(UpdateFastState::WtiteLUTRegister(Some(EPDCommand::new(())))); + }, + Some(a) => { + match a.advance(()) { + Some(true) => { + self.threads.change(UpdateFastState::CustomLUTData(None)); + }, + r => return r + }; + } } - false + Some(false) }, - UpdateFastState::PrepareD21(ref mut a) => { - if a.advance(()) { - self.change(UpdateFastState::PrepareD22(EPDDataB::<0x00>::new(()))); + UpdateFastState::CustomLUTData(state) => { + match state { + None => { + self.threads.change(UpdateFastState::CustomLUTData(Some(EPDData::new(())))); + }, + Some(a) => { + match a.advance(&FAST_LUT) { + Some(true) => { + self.threads.change(UpdateFastState::DisplayUpdateControl2(None)); + }, + r => return r + }; + } } - false + Some(false) }, - UpdateFastState::PrepareD22(ref mut a) => { - if a.advance(()) { - self.change(UpdateFastState::PrepareC3(EPDCommand::<0x22>::new(()))); + UpdateFastState::DisplayUpdateControl2(state) => { + match state { + None => { + self.threads.change(UpdateFastState::DisplayUpdateControl2(Some(EPDCommand::new(())))); + }, + Some(a) => { + match a.advance(()) { + Some(true) => { + self.threads.change(UpdateFastState::DisplayMode1NoLoadLUT(None)); + }, + r => return r + }; + } } - false + Some(false) }, - UpdateFastState::PrepareC3(ref mut a) => { - if a.advance(()) { - self.change(UpdateFastState::PrepareD3(EPDDataB::<0x91>::new(()))); + UpdateFastState::DisplayMode1NoLoadLUT(state) => { + match state { + None => { + self.threads.change(UpdateFastState::DisplayMode1NoLoadLUT(Some(EPDData::new(())))); + }, + Some(a) => { + match a.advance(&[0xC7]) { + Some(true) => { + self.threads.change(UpdateFastState::MasterActivation(None)); + }, + r => return r + }; + } } - false + Some(false) }, - UpdateFastState::PrepareD3(ref mut a) => { - if a.advance(()) { - self.change(UpdateFastState::PrepareC4(EPDCommand::<0x20>::new(()))); + UpdateFastState::MasterActivation(state) => { + match state { + None => { + self.threads.change(UpdateFastState::MasterActivation(Some(EPDCommand::new(())))); + }, + Some(a) => { + match a.advance(()) { + Some(true) => { + if display_is_busy() != Ok(false) { + return None + } + self.threads.change(UpdateFastState::End); + return Some(true) + }, + r => return r + } + } } - false + Some(false) }, - UpdateFastState::PrepareC4(ref mut a) => { - if display_is_busy() != Ok(false) { return false }; - if a.advance(()) { - self.change(UpdateFastState::UpdateC1(EPDCommand::<0x21>::new(()))); - } - false - }, - UpdateFastState::UpdateC1(ref mut a) => { - if a.advance(()) { - self.change(UpdateFastState::UpdateD11(EPDDataB::<0x40>::new(()))); - } - false - }, - UpdateFastState::UpdateD11(ref mut a) => { - if a.advance(()) { - self.change(UpdateFastState::UpdateD12(EPDDataB::<0x00>::new(()))); - } - false - }, - UpdateFastState::UpdateD12(ref mut a) => { - if a.advance(()) { - self.change(UpdateFastState::UpdateC2(EPDCommand::<0x22>::new(()))); - } - false - }, - UpdateFastState::UpdateC2(ref mut a) => { - if display_is_busy() != Ok(false) { return false }; - if a.advance(()) { - self.change(UpdateFastState::UpdateD2(EPDDataB::<0xC7>::new(()))); - } - false - }, - UpdateFastState::UpdateD2(ref mut a) => { - if a.advance(()) { - self.change(UpdateFastState::UpdateC3(EPDCommand::<0x20>::new(()))); - } - false - }, - UpdateFastState::UpdateC3(ref mut a) => { - if display_is_busy() != Ok(false) { return false }; - a.advance(()) + UpdateFastState::End => { + Some(true) }, + UpdateFastState::Error => { + panic!("Unknown UpdateFastState while display") + } } } } pub struct UpdateUltraFast { - state: UpdateUltraFastState, - timer: usize, + threads: Threads, + part_mode: ::Init } -pub enum UpdateUltraFastState { - //inverse RED RAM (for some reason red ram still used in mode 2) - UpdateC1(EPDCommand<0x21>), - UpdateD11(EPDDataB<0x80>), - UpdateD12(EPDDataB<0x00>), - - UpdateC2(EPDCommand<0x22>), - UpdateD2(EPDDataB<0xFF>), +enum UpdateUltraFastState { + // Load custom LUT + WtiteLUTRegister(Option>), + CustomLUTData(Option>), + // Display with mode 1 + DisplayUpdateControl2(Option>), + DisplayMode1NoLoadLUT(Option>), - UpdateC3(EPDCommand<0x20>), + MasterActivation(Option>), + + End, + Error, } -impl UpdateUltraFast { - fn count(&mut self) -> bool { - if self.timer == 0 { - false - } else { - self.timer -= 1; - true - } - } +impl Default for UpdateUltraFastState { + fn default() -> Self { UpdateUltraFastState::Error } } -impl Operation for UpdateUltraFast { - type Init = (); +impl AsyncOperation for UpdateUltraFast { + type Init = bool; type Input<'a> = (); - type Output = bool; - type StateEnum = UpdateUltraFastState; + type Output = Option; - fn new(_: ()) -> Self { + fn new(part_mode: Self::Init) -> Self { Self { - state: UpdateUltraFastState::UpdateC1(EPDCommand::<0x21>::new(())), - timer: 0 + threads: Threads::new(UpdateUltraFastState::WtiteLUTRegister(None)), + part_mode } } - - fn wind(&mut self, state: UpdateUltraFastState, delay: usize) { - self.state = state; - self.timer = delay; - } - fn advance(&mut self, _: ()) -> bool { - if self.count() { return false }; - match self.state { - UpdateUltraFastState::UpdateC1(ref mut a) => { - if a.advance(()) { - self.change(UpdateUltraFastState::UpdateD11(EPDDataB::<0x80>::new(()))); + fn advance(&mut self, _: ()) -> Self::Output { + match self.threads.turn() { + UpdateUltraFastState::WtiteLUTRegister(state) => { + match state { + None => { + self.threads.change(UpdateUltraFastState::WtiteLUTRegister(Some(EPDCommand::new(())))); + }, + Some(a) => { + match a.advance(()) { + Some(true) => { + self.threads.change(UpdateUltraFastState::CustomLUTData(None)); + }, + r => return r + }; + } } - false + Some(false) }, - UpdateUltraFastState::UpdateD11(ref mut a) => { - if a.advance(()) { - self.change(UpdateUltraFastState::UpdateD12(EPDDataB::<0x00>::new(()))); + UpdateUltraFastState::CustomLUTData(state) => { + match state { + None => { + self.threads.change(UpdateUltraFastState::CustomLUTData(Some(EPDData::new(())))); + }, + Some(a) => { + let lut = if self.part_mode { + &ULTRAFAST_SELECTIVE_LUT + } else { + &ULTRAFAST_LUT + }; + match a.advance(lut) { + Some(true) => { + self.threads.change(UpdateUltraFastState::DisplayUpdateControl2(None)); + }, + r => return r + }; + } } - false + Some(false) }, - UpdateUltraFastState::UpdateD12(ref mut a) => { - if a.advance(()) { - self.change(UpdateUltraFastState::UpdateC2(EPDCommand::<0x22>::new(()))); + UpdateUltraFastState::DisplayUpdateControl2(state) => { + match state { + None => { + self.threads.change(UpdateUltraFastState::DisplayUpdateControl2(Some(EPDCommand::new(())))); + }, + Some(a) => { + match a.advance(()) { + Some(true) => { + self.threads.change(UpdateUltraFastState::DisplayMode1NoLoadLUT(None)); + }, + r => return r + }; + } } - false + Some(false) }, - UpdateUltraFastState::UpdateC2(ref mut a) => { - if a.advance(()) { - self.change(UpdateUltraFastState::UpdateD2(EPDDataB::<0xFF>::new(()))); + UpdateUltraFastState::DisplayMode1NoLoadLUT(state) => { + match state { + None => { + self.threads.change(UpdateUltraFastState::DisplayMode1NoLoadLUT(Some(EPDData::new(())))); + }, + Some(a) => { + match a.advance(&[0xC7]) { + Some(true) => { + self.threads.change(UpdateUltraFastState::MasterActivation(None)); + }, + r => return r + }; + } } - false + Some(false) }, - UpdateUltraFastState::UpdateD2(ref mut a) => { - if a.advance(()) { - self.change(UpdateUltraFastState::UpdateC3(EPDCommand::<0x20>::new(()))); + UpdateUltraFastState::MasterActivation(state) => { + match state { + None => { + self.threads.change(UpdateUltraFastState::MasterActivation(Some(EPDCommand::new(())))); + }, + Some(a) => { + match a.advance(()) { + Some(true) => { + if display_is_busy() != Ok(false) { + return None + } + self.threads.change(UpdateUltraFastState::End); + return Some(true) + }, + r => return r + } + } } - false + Some(false) }, - - UpdateUltraFastState::UpdateC3(ref mut a) => { - if display_is_busy() != Ok(false) { return false }; - if a.advance(()) { - true - } else { - false - } + UpdateUltraFastState::End => { + Some(true) }, + UpdateUltraFastState::Error => { + panic!("Unknown UpdateUltraFastState while display") + } } } } \ No newline at end of file diff --git a/kampela-system/src/devices/display_transmission.rs b/kampela-system/src/devices/display_transmission.rs index 2f00453..59be0ac 100644 --- a/kampela-system/src/devices/display_transmission.rs +++ b/kampela-system/src/devices/display_transmission.rs @@ -1,25 +1,25 @@ -use efm32pg23_fix::{GPIO_S, Peripherals}; +use efm32pg23_fix::{GpioS, Peripherals}; use cortex_m::asm::delay; use crate::peripherals::usart::*; use crate::peripherals::gpio_pins::{display_res_clear, display_res_set}; use crate::{FreeError, if_in_free, in_free}; -use crate::parallel::Operation; -use kampela_display_common::display_def::*; +use crate::parallel::{AsyncOperation, Threads}; -pub const BUFSIZE: usize = 5808; +use crate::devices::display::Bounds; +use kampela_display_common::display_def::*; const X_ADDRESS_WIDTH: usize = (SCREEN_SIZE_Y / 8) as usize; /// BUSY is on port B, pin [`SPI_BUSY_PIN`]. pub fn display_is_busy() -> Result { - if_in_free(|peripherals| spi_is_busy(&mut peripherals.GPIO_S)) + if_in_free(|peripherals| spi_is_busy(&mut peripherals.gpio_s)) } /// BUSY is on port B, pin [`SPI_BUSY_PIN`]. /// /// Blocking variant to be called from critical section (init, panic) pub fn display_is_busy_cs(peripherals: &mut Peripherals) -> bool { - spi_is_busy(&mut peripherals.GPIO_S) + spi_is_busy(&mut peripherals.gpio_s) } /// Send EPD to low power state; should be performed when screen is not drawing at all times to @@ -34,7 +34,7 @@ pub fn epaper_deep_sleep(peripherals: &mut Peripherals) { /// /// used within critical section pub fn epaper_hw_init_cs(peripherals: &mut Peripherals) { - epaper_reset(&mut peripherals.GPIO_S); + epaper_reset(&mut peripherals.gpio_s); while display_is_busy_cs(peripherals) {} epaper_write_command(peripherals, &[0x12]); delay(10000); @@ -46,7 +46,7 @@ pub fn epaper_hw_init_cs(peripherals: &mut Peripherals) { /// for critical section /// /// Why these specific numbers for delays? -pub fn epaper_reset(gpio: &mut GPIO_S) { +pub fn epaper_reset(gpio: &mut GpioS) { delay(1000); display_res_clear(gpio); delay(5000); @@ -64,378 +64,316 @@ pub fn epaper_reset(gpio: &mut GPIO_S) { pub fn epaper_write_command(peripherals: &mut Peripherals, command_set: &[u8]) { // CS clear corresponds to selected chip, see epaper docs - deselect_display(&mut peripherals.GPIO_S); - select_display(&mut peripherals.GPIO_S); // not necessary if state is known and default at start + deselect_display(&mut peripherals.gpio_s); + select_display(&mut peripherals.gpio_s); // not necessary if state is known and default at start - display_select_command(&mut peripherals.GPIO_S); + display_select_command(&mut peripherals.gpio_s); for command in command_set.iter() { write_to_usart(peripherals, *command); } - deselect_display(&mut peripherals.GPIO_S); + deselect_display(&mut peripherals.gpio_s); } /// Send data to EPD /// /// for critical section pub fn epaper_write_data(peripherals: &mut Peripherals, data_set: &[u8]) { - deselect_display(&mut peripherals.GPIO_S); - select_display(&mut peripherals.GPIO_S); // not necessary if state is known and default at start + deselect_display(&mut peripherals.gpio_s); + select_display(&mut peripherals.gpio_s); // not necessary if state is known and default at start - display_select_data(&mut peripherals.GPIO_S); + display_select_data(&mut peripherals.gpio_s); for data in data_set.iter() { write_to_usart(peripherals, *data); } - deselect_display(&mut peripherals.GPIO_S); + deselect_display(&mut peripherals.gpio_s); // display_data_command_clear(peripherals); } /// Send command `C` to EPD pub struct EPDCommand{ - state: EPDByteState, - timer: usize, + threads: Threads, } pub enum EPDByteState { - /// State where command is actually sent Init, + /// State where command is actually sent + Send, /// Receive something to keep protocol running and close connection - Aftermath, + WaitSend, + End, } -impl Operation for EPDCommand { +impl Default for EPDByteState { + fn default() -> Self { EPDByteState::End } +} + +impl AsyncOperation for EPDCommand { type Init = (); type Input<'a> = (); - type Output = bool; - type StateEnum = EPDByteState; + type Output = Option; fn new(_: ()) -> Self { Self { - state: EPDByteState::Init, - timer: 0, + threads: Threads::new(EPDByteState::Init), } } - - fn wind(&mut self, state: EPDByteState, delay: usize) { - self.state = state; - self.timer = delay; - } - fn advance(&mut self, _: ()) -> bool { - match self.state { + fn advance(&mut self, _: ()) -> Self::Output { + match self.threads.turn() { EPDByteState::Init => { in_free(|peripherals| { - deselect_display(&mut peripherals.GPIO_S); - select_display(&mut peripherals.GPIO_S); // not necessary if state is known and default at start - display_select_command(&mut peripherals.GPIO_S); + display_select_command(&mut peripherals.gpio_s); }); + self.threads.change(EPDByteState::Send); + Some(false) + }, + EPDByteState::Send => { if if_in_free(|peripherals| - peripherals.USART0_S.status.read().txbl().bit_is_clear() - ) == Ok(false) { - in_free(|peripherals| - peripherals - .USART0_S - .txdata - .write(|w_reg| w_reg.txdata().variant(C)) - ); - self.change(EPDByteState::Aftermath); + peripherals.usart0_s.status().read().txbl().bit_is_set() + ) != Ok(true) { + return None } - false - }, - EPDByteState::Aftermath => { + in_free(|peripherals| + peripherals + .usart0_s + .txdata() + .write(|w_reg| unsafe { w_reg.txdata().bits(C) }) + ); + self.threads.change(EPDByteState::WaitSend); + Some(false) + } + EPDByteState::WaitSend => { if if_in_free(|peripherals| peripherals - .USART0_S - .status + .usart0_s + .status() .read() .txc() .bit_is_set() - ) == Ok(false) { - false - } else { - in_free(|peripherals| { - peripherals - .USART0_S - .rxdata - .read() - .rxdata() - .bits(); - deselect_display(&mut peripherals.GPIO_S); - }); - true + ) != Ok(true) { + return None } - }, - } - } -} - - - -/// Send data byte `B` to EPD -pub struct EPDDataB{ - state: EPDByteState, - timer: usize, -} - -impl Operation for EPDDataB { - type Init = (); - type Input<'a> = (); - type Output = bool; - type StateEnum = EPDByteState; - - fn new(_: ()) -> Self { - Self { - state: EPDByteState::Init, - timer: 0, - } - } - - fn wind(&mut self, state: EPDByteState, delay: usize) { - self.state = state; - self.timer = delay; - } - - fn advance(&mut self, _: ()) -> bool { - match self.state { - EPDByteState::Init => { in_free(|peripherals| { - deselect_display(&mut peripherals.GPIO_S); - select_display(&mut peripherals.GPIO_S); // not necessary if state is known and default at start - display_select_data(&mut peripherals.GPIO_S); - }); - if if_in_free(|peripherals| - peripherals.USART0_S.status.read().txbl().bit_is_clear() - ) == Ok(false) { - in_free(|peripherals| - peripherals - .USART0_S - .txdata - .write(|w_reg| w_reg.txdata().variant(B)) - ); - self.change(EPDByteState::Aftermath); - } - false - }, - EPDByteState::Aftermath => { - if if_in_free(|peripherals| peripherals - .USART0_S - .status + .usart0_s + .rxdata() .read() - .txc() - .bit_is_set() - ) == Ok(false) { - false - } else { - in_free(|peripherals| { - peripherals - .USART0_S - .rxdata - .read() - .rxdata() - .bits(); - deselect_display(&mut peripherals.GPIO_S); - }); - true - } + .rxdata() + .bits(); + }); + self.threads.change(EPDByteState::End); + Some(true) + }, + EPDByteState::End => { + Some(true) }, } } } -/// Send data byte `B` to EPD -pub struct EPDData{ - state: EPDDataState, - position: usize, - timer: usize, -} - +/// Send data array to EPD pub enum EPDDataState { - /// State where command is actually sent Init, + /// Send byte Send, - WaitSend, /// Receive something to keep protocol running and close connection - Aftermath, + WaitSend, + + End, +} + +impl Default for EPDDataState { + fn default() -> Self { EPDDataState::End } +} + +pub struct EPDData{ + threads: Threads, + position: usize, } -impl Operation for EPDData { +impl AsyncOperation for EPDData { type Init = (); - type Input<'a> = &'a [u8]; - type Output = bool; - type StateEnum = EPDDataState; + type Input<'a> = &'a [u8; LEN]; + type Output = Option; - fn new(_: ()) -> Self { + fn new(_: Self::Init) -> Self { Self { - state: EPDDataState::Init, + threads: Threads::new(EPDDataState::Init), position: 0, - timer: 0, } } - fn wind(&mut self, state: EPDDataState, delay: usize) { - self.state = state; - self.timer = delay; - } - - fn advance(&mut self, data: Self::Input<'_>) -> bool { - match self.state { + fn advance(&mut self, data: Self::Input<'_>) -> Self::Output { + match self.threads.turn() { EPDDataState::Init => { in_free(|peripherals| { - deselect_display(&mut peripherals.GPIO_S); - select_display(&mut peripherals.GPIO_S); // not necessary if state is known and default at start - display_select_data(&mut peripherals.GPIO_S); + display_select_data(&mut peripherals.gpio_s); }); - if if_in_free(|peripherals| - peripherals.USART0_S.status.read().txbl().bit_is_clear() - ) == Ok(false) { - self.change(EPDDataState::Send); - } - false + self.threads.change(EPDDataState::Send); + Some(false) }, EPDDataState::Send => { + if if_in_free(|peripherals| + peripherals.usart0_s.status().read().txbl().bit_is_set() + ) != Ok(true) { + return None + } in_free(|peripherals| peripherals - .USART0_S - .txdata - .write(|w_reg| w_reg.txdata().variant(data[self.position])) + .usart0_s + .txdata() + .write(|w_reg| unsafe { w_reg.txdata().bits(data[self.position]) }) ); - self.change(EPDDataState::WaitSend); - false + self.threads.change(EPDDataState::WaitSend); + Some(false) }, EPDDataState::WaitSend => { if if_in_free(|peripherals| peripherals - .USART0_S - .status + .usart0_s + .status() .read() .txc() .bit_is_set() - ) == Ok(true) { - in_free(|peripherals| { - peripherals - .USART0_S - .rxdata - .read() - .rxdata() - .bits(); - }); - if self.position < LEN-1 { - self.position += 1; - self.change(EPDDataState::Send); - } else { - self.change(EPDDataState::Aftermath); - } + ) != Ok(true) { + return None } - false - }, - EPDDataState::Aftermath => { in_free(|peripherals| { - deselect_display(&mut peripherals.GPIO_S); + peripherals + .usart0_s + .rxdata() + .read() + .rxdata() + .bits(); }); - true + if self.position < LEN-1 { + self.position += 1; + self.threads.change(EPDDataState::Send); + } else { + self.threads.change(EPDDataState::End); + } + Some(false) + }, + EPDDataState::End => { + Some(true) }, } } } -pub struct EPDDataPart{ - state: EPDDataState, +pub struct EPDDataBuffer{ + threads: Threads, position: usize, - x_start_position: usize, - x_end_position: usize, - y_end_position: usize, - timer: usize, + position_borders: Option<[usize;3]>, } - - -impl Operation for EPDDataPart { - type Init = (u8, u8, u16, u16); - type Input<'a> = &'a [u8]; - type Output = bool; - type StateEnum = EPDDataState; +impl AsyncOperation for EPDDataBuffer { + type Init = Option; // Borders of 2D array + type Input<'a> = &'a [u8; LEN]; + type Output = Option; fn new(addresses: Self::Init) -> Self { - let x_start_position = addresses.0 as usize; - let y_start_position = (SCREEN_SIZE_X - 1) as usize - addresses.2 as usize; //Y coordinates inversed for some reason + let (position, position_borders) = match addresses { + None => { + (0, None) + }, + Some(b) => { + let x_start_position = b.0 as usize; + let x_end_position = b.1 as usize; + let y_start_position = (SCREEN_SIZE_X - 1) as usize - b.2 as usize; //Y coordinates inversed for some reason + let y_end_position = (SCREEN_SIZE_X - 1) as usize - b.3 as usize; + + let end_position = X_ADDRESS_WIDTH * y_end_position + x_end_position; + ( + y_start_position * X_ADDRESS_WIDTH as usize + x_start_position, + Some([x_start_position, x_end_position, end_position]), + ) + } + }; + Self { - state: EPDDataState::Init, - position: y_start_position * X_ADDRESS_WIDTH as usize + x_start_position, - x_start_position, - x_end_position: addresses.1 as usize, - y_end_position: (SCREEN_SIZE_X - 1) as usize - addresses.3 as usize, - timer: 0, + threads: Threads::new(EPDDataState::Init), + position, + position_borders, } } - fn wind(&mut self, state: EPDDataState, delay: usize) { - self.state = state; - self.timer = delay; - } - - fn advance(&mut self, data: Self::Input<'_>) -> bool { - match self.state { + fn advance(&mut self, data: Self::Input<'_>) -> Self::Output { + match self.threads.turn() { EPDDataState::Init => { in_free(|peripherals| { - deselect_display(&mut peripherals.GPIO_S); - select_display(&mut peripherals.GPIO_S); // not necessary if state is known and default at start - display_select_data(&mut peripherals.GPIO_S); + display_select_data(&mut peripherals.gpio_s); }); - if if_in_free(|peripherals| - peripherals.USART0_S.status.read().txbl().bit_is_clear() - ) == Ok(false) { - self.change(EPDDataState::Send); - } - false + self.threads.change(EPDDataState::Send); + Some(false) }, EPDDataState::Send => { + if if_in_free(|peripherals| + peripherals.usart0_s.status().read().txbl().bit_is_set() + ) != Ok(true) { + return None + } in_free(|peripherals| peripherals - .USART0_S - .txdata - .write(|w_reg| w_reg.txdata().variant(data[self.position])) + .usart0_s + .txdata() + .write(|w_reg| unsafe { w_reg.txdata().bits(data[self.position]) }) ); - self.change(EPDDataState::WaitSend); - false + self.threads.change(EPDDataState::WaitSend); + Some(false) }, EPDDataState::WaitSend => { if if_in_free(|peripherals| peripherals - .USART0_S - .status + .usart0_s + .status() .read() .txc() .bit_is_set() - ) == Ok(true) { - in_free(|peripherals| { - peripherals - .USART0_S - .rxdata - .read() - .rxdata() - .bits(); - }); - if self.position < X_ADDRESS_WIDTH * self.y_end_position + self.x_end_position { - let y_position = self.position / X_ADDRESS_WIDTH; - let x_position = self.position - y_position * X_ADDRESS_WIDTH; - - if x_position >= self.x_end_position { - self.position = (y_position + 1) * X_ADDRESS_WIDTH + self.x_start_position; - } else { + ) != Ok(true) { + return None + } + in_free(|peripherals| { + peripherals + .usart0_s + .rxdata() + .read() + .rxdata() + .bits(); + }); + match self.position_borders { + None => { + if self.position < LEN-1 { self.position += 1; + self.threads.change(EPDDataState::Send); + if self.position % X_ADDRESS_WIDTH == 0 { + return None // unblock thread + } + } else { + self.threads.change(EPDDataState::End); + } + }, + Some(b) => { + if self.position < b[2] { + let x_position = self.position % X_ADDRESS_WIDTH; + + self.threads.change(EPDDataState::Send); + if x_position >= b[1] { + let y_position = self.position / X_ADDRESS_WIDTH; + self.position = (y_position + 1) * X_ADDRESS_WIDTH + b[0]; + return None // unblock thread + } else { + self.position += 1; + } + } else { + self.threads.change(EPDDataState::End); } - self.change(EPDDataState::Send); - } else { - self.change(EPDDataState::Aftermath); } } - false + Some(false) }, - EPDDataState::Aftermath => { - in_free(|peripherals| { - deselect_display(&mut peripherals.GPIO_S); - }); - true + EPDDataState::End => { + Some(true) }, } } diff --git a/kampela-system/src/devices/flash.rs b/kampela-system/src/devices/flash.rs index 95bba43..fcdb98c 100644 --- a/kampela-system/src/devices/flash.rs +++ b/kampela-system/src/devices/flash.rs @@ -175,48 +175,48 @@ fn flash_read_u32(peripherals: &mut Peripherals) -> u32 { pub fn flash_init(peripherals: &mut Peripherals) { - deselect_flash(&mut peripherals.GPIO_S); + deselect_flash(&mut peripherals.gpio_s); write_to_usart(peripherals, 0); // for delay - select_flash(&mut peripherals.GPIO_S); + select_flash(&mut peripherals.gpio_s); flash_cmd(peripherals, FlashCommand::EnableSoftReset); - deselect_flash(&mut peripherals.GPIO_S); + deselect_flash(&mut peripherals.gpio_s); write_to_usart(peripherals, 0); // for delay - select_flash(&mut peripherals.GPIO_S); + select_flash(&mut peripherals.gpio_s); flash_cmd(peripherals, FlashCommand::SoftReset); - deselect_flash(&mut peripherals.GPIO_S); + deselect_flash(&mut peripherals.gpio_s); // TODO: check if it's possible to determine readiness instead of using delay delay(10000); } pub fn flash_sleep(peripherals: &mut Peripherals) { - select_flash(&mut peripherals.GPIO_S); + select_flash(&mut peripherals.gpio_s); flash_cmd(peripherals, FlashCommand::UltraDeepPowerDown); - deselect_flash(&mut peripherals.GPIO_S); + deselect_flash(&mut peripherals.gpio_s); } pub fn flash_wakeup(peripherals: &mut Peripherals) { for _ in 0..2 { - select_flash(&mut peripherals.GPIO_S); + select_flash(&mut peripherals.gpio_s); flash_cmd(peripherals, FlashCommand::ResumeFromPowerDown); - deselect_flash(&mut peripherals.GPIO_S); + deselect_flash(&mut peripherals.gpio_s); // TODO: check if it's possible to determine readiness instead of using delay delay(10000); } } pub fn flash_unlock(peripherals: &mut Peripherals) { - select_flash(&mut peripherals.GPIO_S); + select_flash(&mut peripherals.gpio_s); flash_cmd(peripherals, FlashCommand::WriteEnable); - deselect_flash(&mut peripherals.GPIO_S); + deselect_flash(&mut peripherals.gpio_s); } pub fn flash_lock(peripherals: &mut Peripherals) { - select_flash(&mut peripherals.GPIO_S); + select_flash(&mut peripherals.gpio_s); flash_cmd(peripherals, FlashCommand::WriteDisable); - deselect_flash(&mut peripherals.GPIO_S); + deselect_flash(&mut peripherals.gpio_s); } macro_rules! flash_write_addr { @@ -315,12 +315,12 @@ pub fn flash_read_sr(peripherals: &mut Peripherals) -> [u8;6] { let mut res = [0u8; 6]; for i in 0..6 { - select_flash(&mut peripherals.GPIO_S); + select_flash(&mut peripherals.gpio_s); flash_cmd(peripherals, FlashCommand::ReadStatusRegisterAdressed); flash_write_some(peripherals, &[i+1 as u8, 0u8]); let ind = i as usize; flash_read_some(peripherals, &mut res[ind..ind+1]); - deselect_flash(&mut peripherals.GPIO_S); + deselect_flash(&mut peripherals.gpio_s); } res @@ -328,42 +328,42 @@ pub fn flash_read_sr(peripherals: &mut Peripherals) -> [u8;6] { pub fn flash_clear_sr(peripherals: &mut Peripherals) { for i in 0..6 { - select_flash(&mut peripherals.GPIO_S); + select_flash(&mut peripherals.gpio_s); flash_cmd(peripherals, FlashCommand::WriteStatusRegisterAdressed); flash_write_some(peripherals, &[i+1 as u8, 0u8]); - deselect_flash(&mut peripherals.GPIO_S); + deselect_flash(&mut peripherals.gpio_s); } } pub fn flash_wait_ready(peripherals: &mut Peripherals) { // while flash_read_status(peripherals, StatusRegister::SR1) & (StatusRegister1::BusyStatus as u8) != 0 {} - select_flash(&mut peripherals.GPIO_S); + select_flash(&mut peripherals.gpio_s); flash_cmd(peripherals, FlashCommand::ActiveStatus); flash_write_some(peripherals, &[0_u8, 3]); while write_to_usart(peripherals, 0) != 0 {} - deselect_flash(&mut peripherals.GPIO_S); + deselect_flash(&mut peripherals.gpio_s); } pub fn flash_erase_page(peripherals: &mut Peripherals, addr: u32) { - select_flash(&mut peripherals.GPIO_S); + select_flash(&mut peripherals.gpio_s); flash_cmd(peripherals, FlashCommand::ErasePage); flash_write_addr!(peripherals, addr); - deselect_flash(&mut peripherals.GPIO_S); + deselect_flash(&mut peripherals.gpio_s); } pub fn flash_write_page(peripherals: &mut Peripherals, addr: u32, data: &[u8]) { - select_flash(&mut peripherals.GPIO_S); + select_flash(&mut peripherals.gpio_s); flash_cmd(peripherals, FlashCommand::WritePage); flash_write_addr!(peripherals, addr); let xfer_len = if PAGE_SIZE < data.len() { PAGE_SIZE } else { data.len() }; flash_write_some(peripherals, &data[0..xfer_len]); - deselect_flash(&mut peripherals.GPIO_S); + deselect_flash(&mut peripherals.gpio_s); } pub fn flash_get_size(peripherals: &mut Peripherals) -> u32 { - select_flash(&mut peripherals.GPIO_S); + select_flash(&mut peripherals.gpio_s); flash_cmd(peripherals, FlashCommand::ReadDiscoverableParameters); let mut jdt_head: [u8; 12] = [0; 12]; flash_read_some(peripherals, &mut jdt_head); @@ -372,23 +372,23 @@ pub fn flash_get_size(peripherals: &mut Peripherals) -> u32 { write_to_usart(peripherals, 0); } let res = flash_read_u32(peripherals); - deselect_flash(&mut peripherals.GPIO_S); + deselect_flash(&mut peripherals.gpio_s); (res + 1) >> 13 } pub fn flash_get_id(peripherals: &mut Peripherals) -> u32 { - select_flash(&mut peripherals.GPIO_S); + select_flash(&mut peripherals.gpio_s); flash_cmd(peripherals, FlashCommand::ReadId); let res = flash_read_u32(peripherals); - deselect_flash(&mut peripherals.GPIO_S); + deselect_flash(&mut peripherals.gpio_s); res } pub fn flash_read(peripherals: &mut Peripherals, addr: u32, data: &mut [u8]) { - select_flash(&mut peripherals.GPIO_S); + select_flash(&mut peripherals.gpio_s); flash_cmd(peripherals, FlashCommand::Read); flash_write_addr!(peripherals, addr); // flash_write_some(peripherals, &[0u8, 0u8, 0u8]); flash_read_some(peripherals, data); - deselect_flash(&mut peripherals.GPIO_S); + deselect_flash(&mut peripherals.gpio_s); } \ No newline at end of file diff --git a/kampela-system/src/devices/power.rs b/kampela-system/src/devices/power.rs index 60258ba..da10cdf 100644 --- a/kampela-system/src/devices/power.rs +++ b/kampela-system/src/devices/power.rs @@ -1,10 +1,10 @@ //! Power measurement unit -use crate::{if_in_free, parallel::Operation, peripherals::adc}; +use crate::{if_in_free, parallel::{AsyncOperation, Threads}, peripherals::adc}; pub struct ADC { - state: ADCState, + threads: Threads, last_value: i32, } @@ -13,40 +13,42 @@ pub enum ADCState { Request, } +impl Default for ADCState { + fn default() -> Self { + ADCState::Request + } +} + impl ADC { pub fn read(&self) -> i32 { self.last_value * 211 / 10000 } } -impl Operation for ADC { +impl AsyncOperation for ADC { type Init = (); type Input<'a> = (); type Output = (); - type StateEnum = ADCState; fn new(_: ()) -> Self { Self{ - state: ADCState::Ready, + threads: Threads::new(ADCState::Ready), last_value: 0, } } - fn wind(&mut self, state: ADCState, _delay: usize) { - self.state = state; - } - fn advance(&mut self, _: Self::Input<'_>) { - match self.state { + match self.threads.turn() { ADCState::Ready => { adc::reset_int_flags(); adc::request_adc_measure(); - self.state = ADCState::Request; + self.threads.change(ADCState::Request); }, ADCState::Request => { if if_in_free(|peripherals| adc::read_int_flag(peripherals)) == Ok(true) { self.last_value = adc::read_adc(); - self.state = ADCState::Ready; + adc::reset_int_flags(); + adc::request_adc_measure(); } }, } diff --git a/kampela-system/src/devices/psram.rs b/kampela-system/src/devices/psram.rs index 12ab254..69789c2 100644 --- a/kampela-system/src/devices/psram.rs +++ b/kampela-system/src/devices/psram.rs @@ -114,26 +114,28 @@ pub fn read_from_psram(psram_access: &PsramAccess) -> Vec { } pub fn psram_reset(peripherals: &mut Peripherals) { - deselect_psram(&mut peripherals.GPIO_S); - select_psram(&mut peripherals.GPIO_S); + deselect_psram(&mut peripherals.gpio_s); + select_psram(&mut peripherals.gpio_s); psram_write_read_byte(peripherals, PSRAM_RESET_ENABLE); - deselect_psram(&mut peripherals.GPIO_S); - select_psram(&mut peripherals.GPIO_S); + deselect_psram(&mut peripherals.gpio_s); + select_psram(&mut peripherals.gpio_s); psram_write_read_byte(peripherals, PSRAM_RESET); - deselect_psram(&mut peripherals.GPIO_S); + deselect_psram(&mut peripherals.gpio_s); } pub fn psram_write_read_byte(peripherals: &mut Peripherals, byte: u8) -> u8 { - while peripherals.EUSART2_S.status.read().txfl().bit_is_clear() {} - peripherals.EUSART2_S.txdata.write({|w_reg| - w_reg + while peripherals.eusart2_s.status().read().txfl().bit_is_clear() {} + peripherals.eusart2_s.txdata().write({|w_reg| + unsafe { + w_reg // EUSART tx and rx are u16, // single byte is used here because of the commands, // setting used is `.databits().eight()` - .txdata().variant(byte as u16) + .txdata().bits(byte as u16) + } }); - while peripherals.EUSART2_S.status.read().rxfl().bit_is_clear() {} - peripherals.EUSART2_S.rxdata.read().rxdata().bits().try_into().expect("configured frame for 8 data bits") + while peripherals.eusart2_s.status().read().rxfl().bit_is_clear() {} + peripherals.eusart2_s.rxdata().read().rxdata().bits().try_into().expect("configured frame for 8 data bits") } /// PSRAM dummy command, to send a new item in rx. @@ -142,7 +144,7 @@ pub fn psram_write_read_byte(peripherals: &mut Peripherals, byte: u8) -> u8 { pub const PSRAM_DUMMY: u8 = 0xff; pub fn psram_read_id(peripherals: &mut Peripherals) -> [u8; ID_LEN] { - select_psram(&mut peripherals.GPIO_S); + select_psram(&mut peripherals.gpio_s); psram_write_read_byte(peripherals, PSRAM_READ_ID); psram_write_slice(peripherals, &[PSRAM_DUMMY; ADDR_LEN]); psram_read_vec(peripherals, ID_LEN).try_into().expect("static length, always fits") @@ -217,11 +219,11 @@ pub fn psram_read_at_address_native(peripherals: &mut Peripherals, address: Addr } fn psram_read_at_address_helper(peripherals: &mut Peripherals, address: AddressPsram, len: usize) -> Vec { - select_psram(&mut peripherals.GPIO_S); + select_psram(&mut peripherals.gpio_s); psram_write_read_byte(peripherals, PSRAM_READ); psram_write_slice(peripherals, &address.inner()); let out = psram_read_vec(peripherals, len); - deselect_psram(&mut peripherals.GPIO_S); + deselect_psram(&mut peripherals.gpio_s); out } pub fn psram_read_at_address(peripherals: &mut Peripherals, address: AddressPsram, len: usize) -> Result, MemoryError> { @@ -265,11 +267,11 @@ pub fn psram_write_at_address_native(peripherals: &mut Peripherals, address: Add /// /// Use only as a part of function with reset. fn psram_write_at_address_helper(peripherals: &mut Peripherals, address: AddressPsram, slice: &[u8]) { - select_psram(&mut peripherals.GPIO_S); + select_psram(&mut peripherals.gpio_s); psram_write_read_byte(peripherals, PSRAM_WRITE); psram_write_slice(peripherals, &address.inner()); psram_write_slice(peripherals, slice); - deselect_psram(&mut peripherals.GPIO_S); + deselect_psram(&mut peripherals.gpio_s); } /// Write at address seamlessly, i.e. without wrapping. /// @@ -311,7 +313,7 @@ pub const PSRAM_PAGE_SIZE: u32 = 1024; /// Limits maximum address available to `AddressPsram([0x8f, ff, ff])`. pub const PSRAM_TOTAL_SIZE: u32 = 67_108_864; -#[derive(Debug)] +#[derive(Debug, Clone)] pub struct PsramAccess { pub start_address: AddressPsram, pub total_len: usize, diff --git a/kampela-system/src/devices/touch.rs b/kampela-system/src/devices/touch.rs index cb893b3..374affd 100644 --- a/kampela-system/src/devices/touch.rs +++ b/kampela-system/src/devices/touch.rs @@ -5,9 +5,9 @@ use efm32pg23_fix::Peripherals; use cortex_m::asm::delay; use crate::peripherals::i2c::{acknowledge_i2c_tx, acknowledge_i2c_tx_free, check_i2c_errors, check_i2c_errors_free, I2CError, mstop_i2c_wait_and_clear, mstop_i2c_wait_and_clear_free, ReadI2C}; -use crate::peripherals::gpio_pins::{touch_res_set, touch_res_clear, is_touch_int}; -use crate::parallel::{DELAY, Operation}; -use crate::{FreeError, in_free, if_in_free}; +use crate::peripherals::gpio_pins::{disable_touch_int_flag, enable_touch_int_flag, touch_res_clear}; +use crate::parallel::{AsyncOperation, Timer, DELAY, Threads, WithDelay}; +use crate::{in_free, if_in_free}; pub const FT6X36_REG_CHIPID: u8 = 0xA3; pub const LEN_CHIPID: usize = 1; @@ -21,14 +21,14 @@ pub const LEN_NUM_TOUCHES: usize = 5; pub fn ft6336_write_to(peripherals: &mut Peripherals, position: u8, data: u8) -> Result<(), I2CError> { // abort unexpected processes if peripherals - .I2C0_S + .i2c0_s .state .read() .busy() .bit_is_set() { peripherals - .I2C0_S + .i2c0_s .cmd .write(|w_reg| w_reg.abort().set_bit()); delay(10000); @@ -36,21 +36,21 @@ pub fn ft6336_write_to(peripherals: &mut Peripherals, position: u8, data: u8) -> // clear pending commands and tx peripherals - .I2C0_S + .i2c0_s .cmd .write(|w_reg| w_reg.clearpc().set_bit().cleartx().set_bit()); delay(10000); // clear rx buffer content while peripherals - .I2C0_S + .i2c0_s .status .read() .rxdatav() .bit_is_set() { let _dummy_data = peripherals - .I2C0_S + .i2c0_s .rxdata .read() .bits(); @@ -59,13 +59,13 @@ pub fn ft6336_write_to(peripherals: &mut Peripherals, position: u8, data: u8) -> // clear interrupt flags peripherals - .I2C0_S + .i2c0_s .if_ .reset(); // enable interrupts sources peripherals - .I2C0_S + .i2c0_s .ien .write(|w_reg| w_reg.nack().set_bit().ack().set_bit().mstop().set_bit().rxdatav().set_bit().arblost().set_bit().buserr().set_bit()); @@ -75,12 +75,12 @@ pub fn ft6336_write_to(peripherals: &mut Peripherals, position: u8, data: u8) -> // send address `0x38 << 1`, for writing data peripherals - .I2C0_S + .i2c0_s .txdata .write(|w_reg| w_reg.txdata().variant(0b1110000)); delay(10000); peripherals - .I2C0_S + .i2c0_s .cmd .write(|w_reg| w_reg.start().set_bit()); delay(10000); @@ -89,7 +89,7 @@ pub fn ft6336_write_to(peripherals: &mut Peripherals, position: u8, data: u8) -> // send position, single byte peripherals - .I2C0_S + .i2c0_s .txdata .write(|w_reg| w_reg.txdata().variant(position)); delay(10000); @@ -98,7 +98,7 @@ pub fn ft6336_write_to(peripherals: &mut Peripherals, position: u8, data: u8) -> // send data to record at position, single byte peripherals - .I2C0_S + .i2c0_s .txdata .write(|w_reg| w_reg.txdata().variant(data)); delay(10000); @@ -106,7 +106,7 @@ pub fn ft6336_write_to(peripherals: &mut Peripherals, position: u8, data: u8) -> acknowledge_i2c_tx(peripherals)?; peripherals - .I2C0_S + .i2c0_s .cmd .write(|w_reg| w_reg.stop().set_bit()); delay(10000); @@ -115,7 +115,7 @@ pub fn ft6336_write_to(peripherals: &mut Peripherals, position: u8, data: u8) -> // disable interrupts sources peripherals - .I2C0_S + .i2c0_s .ien .reset(); @@ -128,14 +128,14 @@ pub fn ft6336_write_to(peripherals: &mut Peripherals, position: u8, data: u8) -> pub fn ft6336_read_at(peripherals: &mut Peripherals, position: u8) -> Result<[u8; LEN], I2CError> { // abort unexpected processes if peripherals - .I2C0_S + .i2c0_s .state .read() .busy() .bit_is_set() { peripherals - .I2C0_S + .i2c0_s .cmd .write(|w_reg| w_reg.abort().set_bit()); delay(10000); @@ -143,21 +143,21 @@ pub fn ft6336_read_at(peripherals: &mut Peripherals, position: // clear pending commands and tx peripherals - .I2C0_S + .i2c0_s .cmd .write(|w_reg| w_reg.clearpc().set_bit().cleartx().set_bit()); delay(10000); // clear rx buffer content while peripherals - .I2C0_S + .i2c0_s .status .read() .rxdatav() .bit_is_set() { let _dummy_data = peripherals - .I2C0_S + .i2c0_s .rxdata .read() .bits(); @@ -166,13 +166,13 @@ pub fn ft6336_read_at(peripherals: &mut Peripherals, position: // clear interrupt flags peripherals - .I2C0_S + .i2c0_s .if_ .reset(); // enable interrupts sources peripherals - .I2C0_S + .i2c0_s .ien .write(|w_reg| w_reg.nack().set_bit().ack().set_bit().mstop().set_bit().rxdatav().set_bit().arblost().set_bit().buserr().set_bit()); @@ -182,12 +182,12 @@ pub fn ft6336_read_at(peripherals: &mut Peripherals, position: // send address `0x38 << 1`, for writing data peripherals - .I2C0_S + .i2c0_s .txdata .write(|w_reg| w_reg.txdata().variant(0b1110000)); delay(10000); peripherals - .I2C0_S + .i2c0_s .cmd .write(|w_reg| w_reg.start().set_bit()); delay(10000); @@ -196,7 +196,7 @@ pub fn ft6336_read_at(peripherals: &mut Peripherals, position: // transfer write data, single byte peripherals - .I2C0_S + .i2c0_s .txdata .write(|w_reg| w_reg.txdata().variant(position)); delay(10000); @@ -205,12 +205,12 @@ pub fn ft6336_read_at(peripherals: &mut Peripherals, position: // send address `(0x38 << 1)|1`, for reading data peripherals - .I2C0_S + .i2c0_s .cmd .write(|w_reg| w_reg.start().set_bit()); delay(10000); peripherals - .I2C0_S + .i2c0_s .txdata .write(|w_reg| w_reg.txdata().variant(0b1110001)); delay(10000); @@ -223,18 +223,18 @@ pub fn ft6336_read_at(peripherals: &mut Peripherals, position: rx_data_collected.push(read_i2c_rx(peripherals)?); if i == LEN-1 { peripherals - .I2C0_S + .i2c0_s .cmd .write(|w_reg| w_reg.nack().set_bit()); delay(10000); peripherals - .I2C0_S + .i2c0_s .cmd .write(|w_reg| w_reg.stop().set_bit()); delay(10000); } else { peripherals - .I2C0_S + .i2c0_s .cmd .write(|w_reg| w_reg.ack().set_bit()); delay(10000); @@ -245,56 +245,79 @@ pub fn ft6336_read_at(peripherals: &mut Peripherals, position: // disable interrupts sources peripherals - .I2C0_S + .i2c0_s .ien .reset(); Ok(rx_data_collected.try_into().expect("constant size, always fit")) } */ +pub fn clear_touch_if() { + in_free(|peripherals| { + peripherals + .gpio_s + .if_clr() + .write(|w_reg| w_reg.extif0().set_bit()); + }) +} + +pub fn is_touch_int() -> bool { + if_in_free(|peripherals| { + peripherals + .gpio_s + .if_() + .read() + .extif0() + .bit_is_set() + }).unwrap_or(false) +} -pub fn touch_detected() -> Result { - if_in_free(|peripherals| { //TODO: use Interupt Flag - is_touch_int(&mut peripherals.GPIO_S) +pub fn enable_touch_int() { + in_free(|peripherals| { //TODO: use Interupt Flag + enable_touch_int_flag(&mut peripherals.gpio_s) + }) +} + +pub fn disable_touch_int() { + in_free(|peripherals| { //TODO: use Interupt Flag + disable_touch_int_flag(&mut peripherals.gpio_s) }) } pub fn init_touch(peripherals: &mut Peripherals) { - touch_res_set(&mut peripherals.GPIO_S); // datasheet: pulse width >=1ms - delay(10000); - touch_res_clear(&mut peripherals.GPIO_S); - delay(4000000); // picked up timing + touch_res_clear(&mut peripherals.gpio_s); + delay(6000000); // datasheet: 300ms after resetting // abort previous operations if peripherals - .I2C0_S - .state + .i2c0_s + .state() .read() .busy() .bit_is_set() { peripherals - .I2C0_S - .cmd + .i2c0_s + .cmd() .write(|w_reg| w_reg.abort().set_bit()); delay(10000); } // clear command and tx peripherals - .I2C0_S - .cmd + .i2c0_s + .cmd() .write(|w_reg| w_reg.clearpc().set_bit().cleartx().set_bit()); delay(10000); // clear interrupt flags peripherals - .I2C0_S - .if_ + .i2c0_s + .if_() .reset(); // enable interrupts sources peripherals - .I2C0_S - .ien + .i2c0_s + .ien() .write(|w_reg| w_reg .nack().set_bit() @@ -303,49 +326,50 @@ pub fn init_touch(peripherals: &mut Peripherals) { .arblost().set_bit() .buserr().set_bit() ); - // sending device ID + + // i2c transfer sequence peripherals - .I2C0_S - .cmd + .i2c0_s + .cmd() .write(|w_reg| w_reg.start().set_bit()); delay(10000); - // i2c transfer sequence + // sending device ID check_i2c_errors_free(peripherals).unwrap(); // send address `0x38 << 1`, for writing data peripherals - .I2C0_S - .txdata - .write(|w_reg| w_reg.txdata().variant(0b1110000)); + .i2c0_s + .txdata() + .write(|w_reg| unsafe {w_reg.txdata().bits(0b1110000) }); delay(10000); // Send address to write data acknowledge_i2c_tx_free(peripherals).unwrap(); peripherals - .I2C0_S - .txdata - .write(|w_reg| w_reg.txdata().variant(0xA4)); + .i2c0_s + .txdata() + .write(|w_reg| unsafe { w_reg.txdata().bits(0xA4) }); delay(10000); // send data acknowledge_i2c_tx_free(peripherals).unwrap(); peripherals - .I2C0_S - .txdata - .write(|w_reg| w_reg.txdata().variant(0x00)); + .i2c0_s + .txdata() + .write(|w_reg| unsafe { w_reg.txdata().bits(0x00) }); delay(10000); // stop communication peripherals - .I2C0_S - .cmd + .i2c0_s + .cmd() .write(|w_reg| w_reg.stop().set_bit()); mstop_i2c_wait_and_clear_free(peripherals).unwrap(); // cleanup peripherals - .I2C0_S - .ien + .i2c0_s + .ien() .reset(); } @@ -353,9 +377,8 @@ pub fn init_touch(peripherals: &mut Peripherals) { /// weirdness - on count to 0 operation is supposed to be executed. Timer check does not capture /// critical section, operation does. pub struct Read { - state: ReadState, buffer: [u8; LEN], - timer: usize, + threads: Threads, 1>, } pub enum ReadState { @@ -367,288 +390,354 @@ pub enum ReadState { ClearCommand, /// Make sure Rx is clear and start operation by preparing to send device address ClearRx, - /// Initiate write communication by sending device ID (address) - SendId, - /// Prepare address to write data - PrepareAddress, - /// Send address to write data - SendAddress, - /// Transmit read address to device - PrepareRead, - /// Initiate read communication - Read(ReadLoop), + /// Prepare sending address to read data + PrepareAddress(Option), + /// Initiate address write communication by sending device ID + AddressSendId(Option<()>), + /// Send data to write address + SendAddress(Option>), + /// Prepare reading answer + PrepareRead(Option), + /// Initiate read communication by sending device ID + ReadSendId(Option<()>), + /// Reading + Read(Option>), /// Final state, to cleanup and report result Aftermath, + + Error, +} + +impl Default for ReadState { + fn default() -> Self { ReadState::Error } } impl Read { - fn count(&mut self) -> bool { - if self.timer == 0 { - false - } else { - self.timer -= 1; - true - } - } + } -impl Operation for Read { +impl AsyncOperation for Read { type Init = (); type Input<'a> = (); - type Output = Result, I2CError>; - type StateEnum = ReadState; + type Output = Result>, I2CError>; fn new(_: ()) -> Self { Self { - state: ReadState::Init, buffer: [0; LEN], - timer: 0, + threads: Threads::new(ReadState::Init), // better to calculate maximum simultaneous threads and initiate with capacity } } - fn wind(&mut self, state: ReadState, delay: usize) { - self.state = state; - self.timer = delay; - } - - fn advance(&mut self, _: ()) -> Result, I2CError> { - if self.count() { return Ok(None) }; - match self.state { + fn advance(&mut self, _: ()) -> Self::Output { + match self.threads.turn() { ReadState::Init => { // abort unexpected processes in_free(|peripherals| - if peripherals - .I2C0_S - .state - .read() - .busy() - .bit_is_set() - { - peripherals - .I2C0_S - .cmd - .write(|w_reg| w_reg.abort().set_bit()); - self.wind_d(ReadState::ClearCommand); - } else { self.change(ReadState::ClearCommand); } + if peripherals + .i2c0_s + .state() + .read() + .busy() + .bit_is_set() + { + peripherals + .i2c0_s + .cmd() + .write(|w_reg| w_reg.abort().set_bit()); + } ); - Ok(None) + self.threads.change(ReadState::ClearCommand); + Ok(Some(None)) }, ReadState::ClearCommand => { in_free(|peripherals| - peripherals - .I2C0_S - .cmd - .write(|w_reg| w_reg.clearpc().set_bit().cleartx().set_bit()) - ); - self.wind_d(ReadState::ClearRx); - Ok(None) + peripherals + .i2c0_s + .cmd() + .write(|w_reg| w_reg.clearpc().set_bit().cleartx().set_bit()) + ); + self.threads.change(ReadState::ClearRx); + Ok(Some(None)) }, ReadState::ClearRx => { if if_in_free(|peripherals| peripherals - .I2C0_S - .status + .i2c0_s + .status() .read() .rxdatav() .bit_is_set() )? { in_free(|peripherals| { let _dummy_data = peripherals - .I2C0_S - .rxdata + .i2c0_s + .rxdata() .read() .bits(); }); - self.wind_d(ReadState::ClearRx); + return Ok(None) } else { in_free(|peripherals| { // clear interrupt flags peripherals - .I2C0_S - .if_ + .i2c0_s + .if_() .reset(); - + // enable interrupts sources peripherals - .I2C0_S - .ien + .i2c0_s + .ien() .write(|w_reg| w_reg .nack().set_bit() .ack().set_bit() .mstop().set_bit() - .rxdatav().set_bit() .arblost().set_bit() .buserr().set_bit() ); }); - - // i2c transfer sequence - - check_i2c_errors()?; - // send address `0x38 << 1`, for writing data - in_free(|peripherals| - peripherals - .I2C0_S - .txdata - .write(|w_reg| w_reg.txdata().variant(0b1110000)) - ); - self.wind_d(ReadState::SendId); - }; - Ok(None) + self.threads.change(ReadState::PrepareAddress(None)); + } + Ok(Some(None)) }, - ReadState::SendId => { - in_free(|peripherals| - peripherals - .I2C0_S - .cmd - .write(|w_reg| w_reg.start().set_bit()) - ); - self.wind_d(ReadState::PrepareAddress); + ReadState::PrepareAddress(state) => { + match state { + None => { + in_free(|peripherals| + peripherals + .i2c0_s + .cmd() + .write(|w_reg| w_reg.start().set_bit()) + ); + self.threads.change(ReadState::PrepareAddress(Some(Timer::new(DELAY)))); // setup time 4.7μs + }, + Some(t) => { + if t.tick() { + return Ok(None) + } + self.threads.change(ReadState::AddressSendId(None)); + } + } + Ok(Some(None)) + } + ReadState::AddressSendId(state) => { + match state { + None => { + // i2c transfer sequence + check_i2c_errors()?; + // send address `0x38 << 1`, for writing data + in_free(|peripherals| + peripherals + .i2c0_s + .txdata() + .write(|w_reg| unsafe { w_reg.txdata().bits(0b1110000) }) + ); + self.threads.change(ReadState::AddressSendId(Some(()))); + }, + Some(_) => { + if !acknowledge_i2c_tx()? { + return Ok(None) + } + self.threads.change(ReadState::SendAddress(None)); + } + } Ok(None) }, - ReadState::PrepareAddress => { //TODO expand this - acknowledge_i2c_tx()?; - in_free(|peripherals| - peripherals - .I2C0_S - .txdata - .write(|w_reg| w_reg.txdata().variant(POS)) - ); - self.wind_d(ReadState::SendAddress); - Ok(None) + ReadState::SendAddress(state) => { //TODO expand this + match state { + None => { + in_free(|peripherals| + peripherals + .i2c0_s + .txdata() + .write(|w_reg| unsafe { w_reg.txdata().bits(POS) }) + ); + self.threads.change(ReadState::SendAddress(Some(WithDelay::Do(())))); + }, + Some(w) => { + match w { + WithDelay::Do(_) => { + if !acknowledge_i2c_tx()? { + return Ok(None) + }; + self.threads.change(ReadState::SendAddress(Some(WithDelay::Wait(Timer::new(DELAY))))); + }, + WithDelay::Wait(t) => { + if t.tick() { + return Ok(None) + } + self.threads.change(ReadState::PrepareRead(None)); + } + } + } + } + Ok(Some(None)) }, - ReadState::SendAddress => { - acknowledge_i2c_tx()?; - in_free(|peripherals| - peripherals - .I2C0_S - .cmd - .write(|w_reg| w_reg.start().set_bit()) - ); - self.wind_d(ReadState::PrepareRead); - Ok(None) + ReadState::PrepareRead(state) => { + match state { + None => { + in_free(|peripherals| + peripherals + .i2c0_s + .cmd() + .write(|w_reg| w_reg.start().set_bit()) + ); + self.threads.change(ReadState::PrepareRead(Some(Timer::new(DELAY)))); // setup time 4.7μs + }, + Some(t) => { + if t.tick() { + return Ok(None) + } + self.threads.change(ReadState::ReadSendId(None)); + } + } + Ok(Some(None)) }, - ReadState::PrepareRead => { - in_free(|peripherals| - peripherals - .I2C0_S - .txdata - .write(|w_reg| w_reg.txdata().variant(0b1110001)) - ); - self.change(ReadState::Read(ReadLoop::::new(()))); - Ok(None) + ReadState::ReadSendId(state) => { + match state { + None => { + // i2c transfer sequence + check_i2c_errors()?; + in_free(|peripherals| + peripherals + .i2c0_s + .txdata() + .write(|w_reg| unsafe {w_reg.txdata().bits(0b1110001) }) + ); + self.threads.change(ReadState::ReadSendId(Some(()))); + }, + Some(_) => { + if !acknowledge_i2c_tx()? { + return Ok(None) + }; + self.threads.change(ReadState::Read(None)); + } + } + Ok(Some(None)) }, - ReadState::Read(ref mut a) => { - if let Some (b) = a.advance(())? { - self.buffer = b; - self.wind_d(ReadState::Aftermath); - }; - Ok(None) + ReadState::Read(state) => { + match state { + None => { + self.threads.change(ReadState::Read(Some(ReadLoop::::new(())))); + }, + Some(a) => { + match a.advance(())? { + Some(Some(b)) => { + self.buffer = b; + self.threads.change(ReadState::Aftermath); + }, + Some(None) => { + return Ok(Some(None)) + }, + None => { + return Ok(None) + } + } + } + } + Ok(Some(None)) }, ReadState::Aftermath => { - mstop_i2c_wait_and_clear()?; + if !mstop_i2c_wait_and_clear()? { + return Ok(None) + }; in_free(|peripherals| peripherals - .I2C0_S - .ien + .i2c0_s + .ien() .reset() ); - self.change(ReadState::Init); - Ok(Some(self.buffer)) + Ok(Some(Some(self.buffer))) }, + ReadState::Error => { + panic!("Unknown ReadState while reading touch") + } } } } pub struct ReadLoop { - position: usize, + threads: Threads, value: [u8; LEN], - state: ReadLoopState, - timer: usize, } pub enum ReadLoopState { - /// Wait and ack - AckRead, /// Read cycle - Read(ReadI2C), + Read(Option<(ReadI2C, usize)>), /// Stop reading and report result Aftermath, + Error, } -impl ReadLoop { - fn count(&mut self) -> bool { - if self.timer == 0 { - false - } else { - self.timer -= 1; - true - } - } +impl Default for ReadLoopState { + fn default() -> Self { ReadLoopState::Error } } -impl Operation for ReadLoop { +impl AsyncOperation for ReadLoop { type Init = (); type Input<'a> = (); - type Output = Result, I2CError>; - type StateEnum = ReadLoopState; + type Output = Result>, I2CError>; fn new(_: ()) -> Self { Self { - position: 0, + threads: Threads::new(ReadLoopState::Read(None)), value: [0; LEN], - state: ReadLoopState::AckRead, - timer: DELAY, } } - fn wind(&mut self, state: ReadLoopState, delay: usize) { - self.state = state; - self.timer = delay; - } - - - fn advance(&mut self, _: ()) -> Result, I2CError> { - if self.count() { return Ok(None) }; - match self.state { - ReadLoopState::AckRead => { - acknowledge_i2c_tx()?; - self.change(ReadLoopState::Read(ReadI2C::new(()))); - Ok(None) - }, - ReadLoopState::Read(ref mut a) => { - if let Some(b) = a.advance(())? { - self.value[self.position] = b; - if self.position == LEN-1 { - in_free(|peripherals| - peripherals - .I2C0_S - .cmd - .write(|w_reg| w_reg.nack().set_bit()) - ); - self.wind_d(ReadLoopState::Aftermath); - } else { - in_free(|peripherals| - peripherals - .I2C0_S - .cmd - .write(|w_reg| w_reg.ack().set_bit()) - ); - self.wind_d(ReadLoopState::Read(ReadI2C::new(()))); - self.position += 1; + fn advance(&mut self, _: ()) -> Self::Output { + match self.threads.turn() { + ReadLoopState::Read(ref mut state) => { + match state { + None => { + self.threads.change(ReadLoopState::Read(Some((ReadI2C::new(()), 0)))); + }, + Some((a, i)) => { + match a.advance(())? { + Some(Some(b)) => { + self.value[*i] = b; + *a = ReadI2C::new(()); + if *i == LEN-1 { + in_free(|peripherals| + peripherals + .i2c0_s + .cmd() + .write(|w_reg| w_reg.nack().set_bit()) + ); + self.threads.change(ReadLoopState::Aftermath); + } else { + in_free(|peripherals| + peripherals + .i2c0_s + .cmd() + .write(|w_reg| w_reg.ack().set_bit()) + ); + *i += 1; + } + }, + Some(None) => { + return Ok(Some(None)) + }, + None => { + return Ok(None) + } + } } } - Ok(None) + Ok(Some(None)) }, ReadLoopState::Aftermath => { in_free(|peripherals| peripherals - .I2C0_S - .cmd + .i2c0_s + .cmd() .write(|w_reg| w_reg.stop().set_bit()) ); - Ok(Some(self.value)) + Ok(Some(Some(self.value))) + }, + ReadLoopState::Error => { + panic!("Unknown ReadLoopState while reading touch") } } } diff --git a/kampela-system/src/draw.rs b/kampela-system/src/draw.rs index 79ef197..425a945 100644 --- a/kampela-system/src/draw.rs +++ b/kampela-system/src/draw.rs @@ -1,5 +1,6 @@ -use bitvec::prelude::{BitArr, Msb0, bitarr}; +use alloc::borrow::ToOwned; +use bitvec::prelude::{BitArr, Msb0, bitarr}; use efm32pg23_fix::Peripherals; use embedded_graphics::{ draw_target::DrawTarget, @@ -13,16 +14,17 @@ use embedded_graphics::{ use kampela_display_common::display_def::*; use qrcodegen_no_heap::{QrCode, QrCodeEcc, Version}; -use crate::devices::display::{FastDraw, FullDraw, PartDraw, Request}; -use crate::devices::display_transmission::{epaper_deep_sleep, display_is_busy}; +use crate::{ + devices::{display::{ + Bounds, Request, UpdateFast, UpdateFull, UpdateUltraFast + }, touch::{disable_touch_int, enable_touch_int}}, + parallel::{AsyncOperation, Threads} +}; +use kampela_ui::uistate::UpdateRequest; use crate::debug_display::epaper_draw_stuff_differently; -const SCREEN_SIZE_VALUE: usize = (SCREEN_SIZE_X*SCREEN_SIZE_Y) as usize; - -use crate::{in_free, parallel::Operation}; - // x and y of framebuffer and display RAM address are inversed -fn refreshable_area_address(refreshable_area: Rectangle) -> (u8, u8, u16, u16) { +fn refreshable_area_address(refreshable_area: Rectangle) -> Bounds { let x_start_address: u8 = if refreshable_area.top_left.y < 0 { 0 } else if refreshable_area.top_left.y > (SCREEN_SIZE_Y - 1) as i32 { @@ -32,21 +34,21 @@ fn refreshable_area_address(refreshable_area: Rectangle) -> (u8, u8, u16, u16) { }; let y_start_address: u16 = if refreshable_area.top_left.x < 0 { - (SCREEN_SIZE_X - 1) as u16 + (SCREEN_SIZE_X) as u16 } else if refreshable_area.top_left.x > (SCREEN_SIZE_X - 1) as i32{ 0 } else { - ((SCREEN_SIZE_X - 1) as i32 - refreshable_area.top_left.x) as u16 + ((SCREEN_SIZE_X) as i32 - refreshable_area.top_left.x) as u16 }; - let bottom_right = refreshable_area.top_left + refreshable_area.size; + let bottom_right = refreshable_area.top_left + refreshable_area.size - Point{x: 1, y: 1}; let x_end_address: u8 = if bottom_right.y > (SCREEN_SIZE_Y - 1) as i32 { (SCREEN_SIZE_Y / 8 - 1) as u8 } else if bottom_right.y < 0 { 0 } else { - ((bottom_right.y / 8 + (bottom_right.y % 8).signum()) - 1) as u8 + (bottom_right.y / 8) as u8 }; let y_end_address: u16 = if bottom_right.x > (SCREEN_SIZE_X - 1) as i32 { @@ -54,7 +56,7 @@ fn refreshable_area_address(refreshable_area: Rectangle) -> (u8, u8, u16, u16) { } else if bottom_right.x < 0 { (SCREEN_SIZE_X - 1) as u16 } else { - (SCREEN_SIZE_X as i32 - bottom_right.x) as u16 + ((SCREEN_SIZE_X - 1) as i32 - bottom_right.x) as u16 }; (x_start_address, x_end_address, y_start_address, y_end_address) @@ -71,57 +73,122 @@ const FAST_REFRESH_POWER: i32 = 5000; const FULL_REFRESH_POWER: i32 = 5000; const PART_REFRESH_POWER: i32 = 5000; +const SEQUENCIAL_SELECTIVE_LIMIT: usize = 5; // more sequencial selective refreshes cause to leave traces, less cause artefacts /// Virtual display data storage -type PixelData = BitArr!(for SCREEN_SIZE_VALUE, in u8, Msb0); +type PixelData = BitArr!(for SCREEN_RESOLUTION as usize, in u8, Msb0); /// A virtual display that could be written to EPD simultaneously pub struct FrameBuffer { data: PixelData, - display_state: DisplayState, - timer: usize, } -impl FrameBuffer { - /// Create new virtual display and fill it with ON pixels - pub fn new_white() -> Self { - Self { - data: bitarr!(u8, Msb0; 1; SCREEN_SIZE_X as usize*SCREEN_SIZE_Y as usize), - display_state: DisplayState::Idle, - timer: 0, +pub struct DisplayOperationThreads{ + threads: Threads, + next: Option, + last_black: bool, + selective_counter: usize, +} + +impl core::ops::Deref for DisplayOperationThreads { + type Target = Threads; + + fn deref(&self) -> &Self::Target { + &self.threads + } +} + +impl core::ops::DerefMut for DisplayOperationThreads { + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.threads + } +} + +impl DisplayOperationThreads { + pub fn new() -> Self { + Self{ + threads: Threads::new(DisplayState::IdleOrPending), + next: None, + last_black: false, + selective_counter: 0, } } - fn count(&mut self) -> bool { - if self.timer == 0 { + pub fn try_add_next(&mut self, next: UpdateRequest) -> bool { + if self.next.is_none() { + self.next = Some(next); + true + } else { + false + } + } + + pub fn is_pending(&self) -> bool { + if self.next.is_none() { false } else { - self.timer -= 1; true } } + /// Start part display update sequence with white draw + pub fn request(&mut self, voltage: i32) -> Option { + if let Some(u) = &self.next { + match u { + UpdateRequest::Slow => { + if voltage > FULL_REFRESH_POWER { + self.change(DisplayState::FullOperating(None)); + disable_touch_int(); + return Some(false) + } + }, + UpdateRequest::Fast => { + if voltage > FAST_REFRESH_POWER { + self.change(DisplayState::FastOperating(None)); + return Some(false) + } + }, + UpdateRequest::UltraFast => { + if voltage > PART_REFRESH_POWER { + self.change(DisplayState::UltraFastOperating((None, None, false))); + return Some(false) + } + }, + UpdateRequest::UltraFastSelective => { + if voltage > PART_REFRESH_POWER { + self.change(DisplayState::UltraFastOperating((None, None, true))); + return Some(false) + } + }, + UpdateRequest::Part(r) => { + if voltage > PART_REFRESH_POWER { + let part_options = Some(refreshable_area_address(*r)); + self.change(DisplayState::UltraFastOperating((None, part_options, true))); + return Some(false) + } + }, + _ => {} + } + return None + } + Some(true) + } +} + +impl FrameBuffer { + /// Create new virtual display and fill it with ON pixels + pub fn new_white() -> Self { + Self { + data: bitarr!(u8, Msb0; 1; SCREEN_RESOLUTION as usize), + } + } + /// Send display data to real EPD; invokes full screen refresh /// /// this is for cs environment; do not use otherwise pub fn apply(&self, peripherals: &mut Peripherals) { epaper_draw_stuff_differently(peripherals, self.data.into_inner()); } - - /// Start full display update sequence - pub fn request_full(&mut self) { - self.display_state = DisplayState::FullRequested; - } - - /// Start partial fast display update sequence - pub fn request_fast(&mut self) { - self.display_state = DisplayState::FastRequested; - } - - /// Start partial fast display update sequence - pub fn request_part(&mut self, area: Rectangle) { - self.display_state = DisplayState::PartRequested(area); - } } /// Display's updating progress @@ -130,82 +197,106 @@ impl FrameBuffer { /// reallocations made in new item creation. pub enum DisplayState { /// Initial state, where we can change framebuffer. If this was typestate, this would be Zero. - Idle, - /// Fast update was requested; waiting for power - FastRequested, - FastOperating(Request), + IdleOrPending, /// Slow update was requested; waiting for power - FullRequested, - FullOperating(Request), + FullOperating(Option>), + /// Fast update was requested; waiting for power + FastOperating(Option>), /// Part update was requested; waiting for power - PartRequested(Rectangle), - PartOperating(Request, (u8, u8, u16, u16)), + UltraFastOperating((Option>, Option, bool)), /// Display not available due to update cycle - UpdatingNow, + End, +} + +impl Default for DisplayState { + fn default() -> Self { DisplayState::IdleOrPending } } -impl Operation for FrameBuffer { +impl AsyncOperation for FrameBuffer { type Init = (); - type Input<'a> = i32; + type Input<'a> = (i32, &'a mut DisplayOperationThreads); type Output = Option; - type StateEnum = DisplayState; fn new(_: ()) -> Self { Self::new_white() } - fn wind(&mut self, state: DisplayState, delay: usize) { - self.display_state = state; - self.timer = delay; - } - /// Move through display update progress - fn advance(&mut self, voltage: i32) -> Option { - if self.count() { return None }; - - match self.display_state { - DisplayState::Idle => Some(true), - DisplayState::FastRequested => { - if voltage > FAST_REFRESH_POWER { - self.display_state = DisplayState::FastOperating(Request::::new(())); - }; - None - }, - DisplayState::FastOperating(ref mut a) => { - if a.advance(&self.data.data) { - self.wind(DisplayState::UpdatingNow, 0) + fn advance<'a>(&mut self, (voltage, threads): Self::Input<'a>) -> Self::Output { + match threads.turn() { + DisplayState::IdleOrPending => { + let r = threads.request(voltage); + if r == Some(false) { + threads.next = None; } - Some(false) - }, - DisplayState::FullRequested => { - if voltage > FULL_REFRESH_POWER { - self.display_state = DisplayState::FullOperating(Request::::new(())); - }; - None + return r }, - DisplayState::FullOperating(ref mut a) => { - if a.advance(&self.data.data) { - self.wind(DisplayState::UpdatingNow, 0) + DisplayState::FullOperating(state) => { + match state { + None => { + threads.change(DisplayState::FullOperating(Some(Request::::new((None, None))))); + threads.last_black =true; + threads.selective_counter = 0; + Some(false) + }, + Some(a) => { + let r = a.advance(&self.data.data); + if r == Some(true) { + threads.change(DisplayState::End); + return Some(false) + } + r + } } - Some(false) }, - DisplayState::PartRequested(r) => { - if voltage > PART_REFRESH_POWER { - let d: (u8, u8, u16, u16) = refreshable_area_address(r); - self.display_state = DisplayState::PartOperating(Request::::new(()), d); - }; - None + DisplayState::FastOperating(state) => { + match state { + None => { + threads.change(DisplayState::FastOperating(Some(Request::::new((None, None))))); + threads.last_black =true; + threads.selective_counter = 0; + Some(false) + }, + Some(a) => { + let r = a.advance(&self.data.data); + if r == Some(true) { + threads.change(DisplayState::End); + return Some(false) + } + r + } + } }, - DisplayState::PartOperating(ref mut a, bounds) => { - if a.advance((&self.data.data, bounds)) { - self.wind(DisplayState::UpdatingNow, 0) + DisplayState::UltraFastOperating((state, part_options, selective_refresh)) => { + match state { + None => { + let p = part_options.take(); + let selective = selective_refresh.to_owned(); + let r = if selective && threads.selective_counter < SEQUENCIAL_SELECTIVE_LIMIT { + threads.selective_counter += 1; + threads.last_black = !threads.last_black; + Some(!threads.last_black) + } else { + threads.selective_counter = 0; + threads.last_black = true; + None + }; + threads.change(DisplayState::UltraFastOperating((Some(Request::::new((p, r))), None, false))); + Some(false) + }, + Some(a) => { + let r = a.advance(&self.data.data); + if r == Some(true) { + threads.change(DisplayState::End); + return Some(false) + } + r + } } - Some(false) }, - DisplayState::UpdatingNow => { - if display_is_busy() == Ok(true) { return Some(false) }; - in_free(|peripherals| epaper_deep_sleep(peripherals)); - self.display_state = DisplayState::Idle; + DisplayState::End => { + enable_touch_int(); + threads.change(DisplayState::IdleOrPending); Some(false) }, } diff --git a/kampela-system/src/flash_mnemonic.rs b/kampela-system/src/flash_mnemonic.rs index 3597fa0..91f1397 100644 --- a/kampela-system/src/flash_mnemonic.rs +++ b/kampela-system/src/flash_mnemonic.rs @@ -1,10 +1,9 @@ -#[cfg(not(feature = "std"))] use alloc::{vec::Vec, string::String, collections::VecDeque}; use core::cell::RefCell; //use crate::wordlist::WORDLIST_ENGLISH; -use mnemonic_external::{AsWordList, Bits11, WordListElement, TOTAL_WORDS, WORD_MAX_LEN, error::ErrorWordList}; +use mnemonic_external::{AsWordList, Bits11, WordListElement, TOTAL_WORDS, WORD_MAX_LEN, error::ErrorMnemonic}; use crate::devices::flash::read_data; const WORDLIST_STARTS: [usize; 26] = [ @@ -55,13 +54,13 @@ impl FlashWordList { impl AsWordList for FlashWordList { type Word = String; - fn get_word(&self, bits: Bits11) -> Result { + fn get_word(&self, bits: Bits11) -> Result { let word_order = bits.bits() as usize; let chunk_index = word_order / 32; let index_inchunk = word_order - chunk_index * 32; let chunk = self.read_wordlist_chunk(chunk_index); if chunk_index >= 64 { - Err(ErrorWordList::InvalidWordNumber) + Err(ErrorMnemonic::InvalidWordNumber) } else { let word_bytes = &chunk[index_inchunk * WORD_MAX_LEN..(index_inchunk + 1) * WORD_MAX_LEN].to_vec(); let word_bytes_stripped = word_bytes.iter().take_while(|&ch| *ch != b' ').cloned().collect(); @@ -70,7 +69,7 @@ impl AsWordList for FlashWordList { } } - fn get_words_by_prefix(&self, prefix: &str) -> Result>, ErrorWordList> { + fn get_words_by_prefix(&self, prefix: &str) -> Result>, ErrorMnemonic> { let mut out = Vec::>::new(); let first_letter = prefix.as_bytes().get(0).unwrap(); @@ -106,7 +105,7 @@ impl AsWordList for FlashWordList { Ok(out) } - fn bits11_for_word(&self, word: &str) -> Result { + fn bits11_for_word(&self, word: &str) -> Result { let first_letter = word.as_bytes().get(0).unwrap(); let start_chunk = WORDLIST_STARTS[(first_letter - FIRST_WORDLIST_STARTS) as usize]; let mut matches_max: usize = 0; @@ -129,7 +128,7 @@ impl AsWordList for FlashWordList { } } } - Err(ErrorWordList::NoWord) + Err(ErrorMnemonic::NoWord) } } /* diff --git a/kampela-system/src/init.rs b/kampela-system/src/init.rs index 2d7c5a8..f21cb96 100644 --- a/kampela-system/src/init.rs +++ b/kampela-system/src/init.rs @@ -19,10 +19,10 @@ use crate::devices::flash::{flash_init,flash_sleep}; /// All peripheral initializations pub fn init_peripherals(peripherals: &mut Peripherals, nfc_descriptor_address: *const NfcXferBlock) { // first, start clocking - init_cmu(&mut peripherals.CMU_S); + init_cmu(&mut peripherals.cmu_s); // map GPIO pins to their functions and set their starting values - init_gpio(&mut peripherals.GPIO_S); + init_gpio(&mut peripherals.gpio_s); // Setting up USART0, for epaper display and flash memory init_usart(peripherals); diff --git a/kampela-system/src/parallel.rs b/kampela-system/src/parallel.rs index 1c8850a..fdc1eb3 100644 --- a/kampela-system/src/parallel.rs +++ b/kampela-system/src/parallel.rs @@ -1,33 +1,234 @@ //! Asynchronous operation generic code +use core::array; + +use efm32pg23_fix::SYST; /// Default (non-blocking) delay for operation start -pub const DELAY: usize = 100; //100 This is magic; don't change without testing or UI will get mean +pub const DELAY: u32 = 1; //1ms + +pub struct Timer { + count: u32, + last_clock_value: u32, +} + +impl Timer { + /// New timer starts counting from initiation, timer set in ms + pub fn new(count: u32) -> Self { + Self { + count: (count * SYST::get_ticks_per_10ms()).div_ceil(10), + last_clock_value: SYST::get_current(), + } + } + /// Returns true if timer is on + pub fn tick(&mut self) -> bool { + if self.count == 0 { + return false + }; + + let current = SYST::get_current(); + let diff = if current < self.last_clock_value { + self.last_clock_value - current + } else { + SYST::get_ticks_per_10ms() + self.last_clock_value - current //manage reload, should work if tick < 10ms + }; + self.last_clock_value = current; + + if self.count <= diff { + self.count = 0; + false + } else { + self.count -= diff; + true + } + } +} +/// Do things with delay before or after the task +pub enum WithDelay { + Do(A), + Wait(Timer), +} + +/// Pool of threads that take turn when advance_states() called +/// +/// StateEnum must implement default state that returns error or if expected value to cancel calls of advance() in function above +pub struct Threads where + StateEnum: Default, +{ + threads_pool: [StateEnum; CAPACITY], + active: usize, + index: usize, + repeat: bool, +} + +impl Threads where + StateEnum: Default { + pub fn new(initial: StateEnum) -> Self { + let mut threads_pool: [StateEnum; CAPACITY] = array::from_fn(|_| StateEnum::default()); + threads_pool[0] = initial; + Self { + threads_pool, + active: 1, + index: 0, + repeat: true + } + } + + pub fn from(states: [StateEnum; N]) -> Self { + let mut threads_pool: [StateEnum; CAPACITY] = array::from_fn(|_| StateEnum::default()); + for (i, state) in states.into_iter().enumerate() { + threads_pool[i] = state + } + + Self { + threads_pool, + active: !usize::MAX.overflowing_shl(N as u32).0, + index: 0, + repeat: true, + } + } + + pub fn turn(&mut self) -> &mut StateEnum { + if self.active == 0 { // return default + self.index = 0; + self.repeat = false; + self.threads_pool.get_mut(0).expect("threads pool shouldn't be zero sized") + } else { + if self.repeat { + self.repeat = false; + } else { + if self.index >= self.active_len() - 1 { + self.index = 0; + } else { + self.index += 1; + }; + } + self.threads_pool.get_mut(self.index).expect("index overflow should be checked") + } + } + + /// Starting new thread for state + pub fn wind(&mut self, state: StateEnum) { + let l = self.active_len(); + + if l >= self.threads_pool.len() { + panic!("there is not enough thread slots in the pool {} requested but {} available", l + 1, self.threads_pool.len()); + } else { + self.threads_pool[l] = state; + self.active |= 1 << l; + } + } + + /// Change current thread state + /// Be aware that thread won't turn right after the change + /// If change in default acts like wind() + pub fn change(&mut self, state: StateEnum) { + self.hold(); + self.switch(state); + } + + /// Schedule to switch current thread state + /// If switch in default acts like wind() + pub fn switch(&mut self, state: StateEnum) { + if self.active & (1 << self.index) != 0 { + self.threads_pool[self.index] = state; + } else { + self.wind(state); + } + } + + /// Mark end state of current thread + fn sync_any(&mut self, index: usize) { + if self.active & (1 << index) != 0 { + self.threads_pool[index] = StateEnum::default(); + + for i in index..self.active_len() - 1 { + self.threads_pool.swap(i, i +1); + } + let masked = self.active & !usize::MAX.overflowing_shl(index as u32).0; + self.active = masked | self.active.overflowing_shr(1).0 & usize::MAX.overflowing_shl(index as u32).0; + + // to preserve order + if index == self.index { + self.repeat = true; + } + if self.index >= self.active_len() { + self.index = 0; + } + } + } + pub fn sync(&mut self) { + self.sync_any(self.index); + } + + pub fn hold(&mut self) { + self.repeat = true; + } + /// Ends mathced thread, make sure thread is safe to terminate, true if success, false if not found + pub fn try_terminate_any bool>(&mut self, condition: F) -> bool { + let mut index_to_terminate = None; + for (index, thread) in self.threads_pool.iter().enumerate() { + if condition(thread) { + index_to_terminate = Some(index); + } + } + if let Some(i) = index_to_terminate { + self.sync_any(i); + } + true + } + + /// Uses closure on every running thread, make sure the thread is safe to change from outside, match thread first + pub fn try_change_any(&mut self, mut closure: F) -> bool { + for thread in self.threads_pool.iter_mut() { + closure(thread) + } + true + } + + /// Returns true until all matched treads are running + /// Possible to stuck if two or more threads are waiting each other + pub fn is_all_running(&self, conditions: &[fn(&StateEnum) -> bool]) -> bool { + 'awaiting: for condition in conditions { + for thread in self.threads_pool.iter() { + if condition(thread) { + continue 'awaiting + } + } + return false + } + true + } + + /// Returns true until any other thread is running + /// Possible to stuck if two or more threads are waiting each other + pub fn is_other_running(&self) -> bool { + self.active & !(1 << self.index) != 0 + } + /// Returns true until any thread is running + pub fn is_any_running(&self) -> bool { + self.active != 0 + } + + fn active_len(&self) -> usize { + if self.active == 0 { + 0 + } else { + self.active.ilog2() as usize + 1 + } + } +} /// Asynchronous procedures should implement this. /// /// To call, iterate over advance() -pub trait Operation { +pub trait AsyncOperation { type Init; type Input<'a>; type Output; - type StateEnum; fn new(data: Self::Init) -> Self; - /// Generally delayed state transition - fn wind(&mut self, state: Self::StateEnum, delay: usize); - /// Call this repeatedly to progress through operation fn advance<'a>(&mut self, data: Self::Input<'a>) -> Self::Output; - - /// change state instantly - fn change(&mut self, state: Self::StateEnum) { - self.wind(state, 0); - } - - /// delayed change state with default delay - fn wind_d(&mut self, state: Self::StateEnum) { - self.wind(state, DELAY); - } } diff --git a/kampela-system/src/peripherals/adc.rs b/kampela-system/src/peripherals/adc.rs index 01d28a7..c25ffdc 100644 --- a/kampela-system/src/peripherals/adc.rs +++ b/kampela-system/src/peripherals/adc.rs @@ -7,8 +7,8 @@ use crate::in_free; pub fn request_adc_measure() { in_free(|peripherals| peripherals - .IADC0_S - .cmd + .iadc0_s + .cmd() .write(|w_reg| w_reg.singlestart().set_bit()) ); } @@ -17,7 +17,7 @@ pub fn request_adc_measure() { pub fn read_adc() -> i32 { let mut value = 0; in_free(|peripherals| - value = peripherals.IADC0_S.singledata.read().data().bits() & 0x00FFFFFF + value = peripherals.iadc0_s.singledata().read().data().bits() & 0x00FFFFFF ); (if value & 0x00800000 == 0 { value @@ -28,8 +28,8 @@ pub fn read_adc() -> i32 { pub fn read_int_flag(peripherals: &mut Peripherals) -> bool { peripherals - .IADC0_S - .if_ + .iadc0_s + .if_() .read() .singledone() .bit() @@ -38,8 +38,8 @@ pub fn read_int_flag(peripherals: &mut Peripherals) -> bool { pub fn reset_int_flags() { in_free(|peripherals| peripherals - .IADC0_S - .if_ + .iadc0_s + .if_() .reset() ); } @@ -53,34 +53,35 @@ pub fn init_adc(peripherals: &mut Peripherals) { //CMU clockselectset peripherals - .CMU_S - .iadcclkctrl + .cmu_s + .iadcclkctrl() .write(|w_reg| w_reg.clksel().fsrco()); disable_adc(peripherals); // actually init peripherals - .IADC0_S - .ctrl + .iadc0_s + .ctrl() .write(|w_reg| { w_reg .adcclksuspend0().prswudis() .adcclksuspend1().prswudis() .dbghalt().normal() .warmupmode().keepwarm() - .timebase().variant(18) - .hsclkrate().div1() + .hsclkrate().div1(); + unsafe { + w_reg.timebase().bits(18) + } }); - peripherals - .IADC0_S - .timer - .write(|w_reg| w_reg.timer().variant(0)); + .iadc0_s + .timer() + .write(|w_reg| unsafe { w_reg.timer().bits(0) }); peripherals - .IADC0_S - .cmpthr + .iadc0_s + .cmpthr() .reset(); cfg0_set(peripherals); @@ -95,14 +96,14 @@ pub fn init_adc(peripherals: &mut Peripherals) { // set gpio peripherals - .GPIO_S - .abusalloc + .gpio_s + .abusalloc() .write(|w_reg| w_reg.aeven0().adc0()); //enable interrupts peripherals - .IADC0_S - .ien + .iadc0_s + .ien() .write(|w_reg| { w_reg .singledone().set_bit() @@ -115,8 +116,8 @@ pub fn init_adc(peripherals: &mut Peripherals) { // This allows debugger to stay connected while Kampela sleeps in EM2 and waits for power to // replenish peripherals - .EMU_S - .ctrl + .emu_s + .ctrl() .write(|w_reg| w_reg.em2dbgen().set_bit()); } @@ -138,20 +139,20 @@ impl CalibrationData { // // things are complicated... let ui_gain = peripherals - .DEVINFO - .iadc0gain0 + .devinfo + .iadc0gain0() .read() .gaincana1() .bits(); let offset1 = peripherals - .DEVINFO - .iadc0normaloffsetcal1 + .devinfo + .iadc0normaloffsetcal1() .read() .offsetana3norm() .bits() as i16; // C reference did this let offset0 = peripherals - .DEVINFO - .iadc0normaloffsetcal0 + .devinfo + .iadc0normaloffsetcal0() .read() .bits() as i16; // C reference did this @@ -183,13 +184,12 @@ impl CalibrationData { /// Set up cfg0 for ADC. fn cfg0_set(peripherals: &mut Peripherals) { peripherals - .IADC0_S - .cfg0 + .iadc0_s + .cfg0() .write(|w_reg| { w_reg .adcmode().normal() .osrhs().hispd32() - .osrha().hiacc92() .analoggain().anagain0p5() .refsel().vbgr() .digavg().avg16() @@ -199,54 +199,56 @@ fn cfg0_set(peripherals: &mut Peripherals) { let calibrations = CalibrationData::new(peripherals, 16); peripherals - .IADC0_S - .scale0 + .iadc0_s + .scale0() .write(|w_reg| { - let prefab = w_reg - .offset().variant(calibrations.offset_truncated) - .gain13lsb().variant(calibrations.ui_gain_value) - .gain3msb(); + unsafe { + w_reg + .offset().bits(calibrations.offset_truncated) + .gain13lsb().bits(calibrations.ui_gain_value); + } + let prefab = w_reg.gain3msb(); if calibrations.ui_gain_sign { prefab.gain100() } else { prefab.gain011() } }); - peripherals - .IADC0_S - .sched0 - .write(|w_reg| w_reg.prescale().variant(1)); + .iadc0_s + .sched0() + .write(|w_reg| unsafe { w_reg.prescale().bits(1) }); } /// Set up cfg1 for ADC. Not sure it is even used. fn cfg1_set(peripherals: &mut Peripherals) { peripherals - .IADC0_S - .cfg1 + .iadc0_s + .cfg1() .reset(); let calibrations = CalibrationData::new(peripherals, 4); peripherals - .IADC0_S - .scale1 + .iadc0_s + .scale1() .write(|w_reg| { - let prefab = w_reg - .offset().variant(calibrations.offset_truncated) - .gain13lsb().variant(calibrations.ui_gain_value) - .gain3msb(); + unsafe { + w_reg + .offset().bits(calibrations.offset_truncated) + .gain13lsb().bits(calibrations.ui_gain_value); + } + let prefab = w_reg.gain3msb(); if calibrations.ui_gain_sign { prefab.gain100() } else { prefab.gain011() } }); - peripherals - .IADC0_S - .sched1 - .write(|w_reg| w_reg.prescale().variant(1)); + .iadc0_s + .sched1() + .write(|w_reg| unsafe { w_reg.prescale().bits(1)}); } /// Initialize single ADC read config @@ -254,8 +256,8 @@ fn init_adc_single_reader(peripherals: &mut Peripherals) { disable_adc(peripherals); peripherals - .IADC0_S - .singlefifocfg + .iadc0_s + .singlefifocfg() .write(|w_reg| { w_reg .alignment().right20() @@ -265,8 +267,8 @@ fn init_adc_single_reader(peripherals: &mut Peripherals) { }); peripherals - .IADC0_S - .trigger + .iadc0_s + .trigger() .modify(|_, w_reg| { w_reg .singletrigsel().immediate() @@ -278,15 +280,17 @@ fn init_adc_single_reader(peripherals: &mut Peripherals) { // measure between GND and PA0 peripherals - .IADC0_S - .single + .iadc0_s + .single() .write(|w_reg| { w_reg .portneg().gnd() - .pinpos().variant(0) .portpos().porta() .cfg().config0() - .cmp().clear_bit() + .cmp().clear_bit(); + unsafe { + w_reg.pinpos().bits(0) + } }); disable_adc(peripherals); @@ -295,8 +299,8 @@ fn init_adc_single_reader(peripherals: &mut Peripherals) { /// Enable ADC fn enable_adc(peripherals: &mut Peripherals) { peripherals - .IADC0_S - .en + .iadc0_s + .en() .write(|w_reg| w_reg.en().enable()); } @@ -304,21 +308,21 @@ fn enable_adc(peripherals: &mut Peripherals) { fn disable_adc(peripherals: &mut Peripherals) { while peripherals - .IADC0_S - .status + .iadc0_s + .status() .read() .syncbusy() .bit_is_set() {} peripherals - .IADC0_S - .en + .iadc0_s + .en() .write(|w_reg| w_reg.en().disable()); while peripherals - .IADC0_S - .en + .iadc0_s + .en() .read() .disabling() .bit_is_set() @@ -329,8 +333,8 @@ fn disable_adc(peripherals: &mut Peripherals) { fn reset_adc(peripherals: &mut Peripherals) { enable_adc(peripherals); peripherals - .IADC0_S - .cmd + .iadc0_s + .cmd() .write(|w_reg| { w_reg .singlestop().set_bit() @@ -338,177 +342,177 @@ fn reset_adc(peripherals: &mut Peripherals) { .timerdis().set_bit() }); while - peripherals.IADC0_S.status.read().singlequeuepending().bit_is_set() | - peripherals.IADC0_S.status.read().scanqueuepending().bit_is_set() | - peripherals.IADC0_S.status.read().converting().bit_is_set() | - peripherals.IADC0_S.status.read().timeractive().bit_is_set() + peripherals.iadc0_s.status().read().singlequeuepending().bit_is_set() | + peripherals.iadc0_s.status().read().scanqueuepending().bit_is_set() | + peripherals.iadc0_s.status().read().converting().bit_is_set() | + peripherals.iadc0_s.status().read().timeractive().bit_is_set() {} peripherals - .IADC0_S - .maskreq + .iadc0_s + .maskreq() .reset(); peripherals - .IADC0_S - .single + .iadc0_s + .single() .reset(); while - peripherals.IADC0_S.status.read().singlewritepending().bit_is_set() | - peripherals.IADC0_S.status.read().maskreqwritepending().bit_is_set() + peripherals.iadc0_s.status().read().singlewritepending().bit_is_set() | + peripherals.iadc0_s.status().read().maskreqwritepending().bit_is_set() {} while - peripherals.IADC0_S.status.read().singlefifodv().bit_is_set() | - peripherals.IADC0_S.singlefifostat.read().fiforeadcnt().ne(&0) + peripherals.iadc0_s.status().read().singlefifodv().bit_is_set() | + peripherals.iadc0_s.singlefifostat().read().fiforeadcnt().ne(&0) { let _dummy_data = peripherals - .IADC0_S - .singlefifodata + .iadc0_s + .singlefifodata() .read() .data(); } while - peripherals.IADC0_S.status.read().scanfifodv().bit_is_set() | - peripherals.IADC0_S.scanfifostat.read().fiforeadcnt().ne(&0) + peripherals.iadc0_s.status().read().scanfifodv().bit_is_set() | + peripherals.iadc0_s.scanfifostat().read().fiforeadcnt().ne(&0) { let _dummy_data = peripherals - .IADC0_S - .scanfifodata + .iadc0_s + .scanfifodata() .read() .data(); } let _dummy_data = peripherals - .IADC0_S - .singledata + .iadc0_s + .singledata() .read() .data(); let _dummy_data = peripherals - .IADC0_S - .scandata + .iadc0_s + .scandata() .read() .data(); disable_adc(peripherals); peripherals - .IADC0_S - .ctrl + .iadc0_s + .ctrl() .reset(); peripherals - .IADC0_S - .timer + .iadc0_s + .timer() .reset(); peripherals - .IADC0_S - .trigger + .iadc0_s + .trigger() .reset(); peripherals - .IADC0_S - .cmpthr + .iadc0_s + .cmpthr() .reset(); peripherals - .IADC0_S - .singlefifocfg + .iadc0_s + .singlefifocfg() .reset(); peripherals - .IADC0_S - .scanfifocfg + .iadc0_s + .scanfifocfg() .reset(); peripherals - .IADC0_S - .cfg0 + .iadc0_s + .cfg0() .reset(); peripherals - .IADC0_S - .scale0 + .iadc0_s + .scale0() .reset(); peripherals - .IADC0_S - .sched0 + .iadc0_s + .sched0() .reset(); peripherals - .IADC0_S - .cfg1 + .iadc0_s + .cfg1() .reset(); peripherals - .IADC0_S - .scale1 + .iadc0_s + .scale1() .reset(); peripherals - .IADC0_S - .sched1 + .iadc0_s + .sched1() .reset(); peripherals - .IADC0_S - .scan0 + .iadc0_s + .scan0() .reset(); peripherals - .IADC0_S - .scan1 + .iadc0_s + .scan1() .reset(); peripherals - .IADC0_S - .scan2 + .iadc0_s + .scan2() .reset(); peripherals - .IADC0_S - .scan3 + .iadc0_s + .scan3() .reset(); peripherals - .IADC0_S - .scan4 + .iadc0_s + .scan4() .reset(); peripherals - .IADC0_S - .scan5 + .iadc0_s + .scan5() .reset(); peripherals - .IADC0_S - .scan6 + .iadc0_s + .scan6() .reset(); peripherals - .IADC0_S - .scan7 + .iadc0_s + .scan7() .reset(); peripherals - .IADC0_S - .scan8 + .iadc0_s + .scan8() .reset(); peripherals - .IADC0_S - .scan9 + .iadc0_s + .scan9() .reset(); peripherals - .IADC0_S - .scan10 + .iadc0_s + .scan10() .reset(); peripherals - .IADC0_S - .scan11 + .iadc0_s + .scan11() .reset(); peripherals - .IADC0_S - .scan12 + .iadc0_s + .scan12() .reset(); peripherals - .IADC0_S - .scan13 + .iadc0_s + .scan13() .reset(); peripherals - .IADC0_S - .scan14 + .iadc0_s + .scan14() .reset(); peripherals - .IADC0_S - .scan15 + .iadc0_s + .scan15() .reset(); peripherals - .IADC0_S - .if_ + .iadc0_s + .if_() .reset(); peripherals - .IADC0_S - .ien + .iadc0_s + .ien() .reset(); } diff --git a/kampela-system/src/peripherals/cmu.rs b/kampela-system/src/peripherals/cmu.rs index 7b3abf4..7d6e3ee 100644 --- a/kampela-system/src/peripherals/cmu.rs +++ b/kampela-system/src/peripherals/cmu.rs @@ -1,11 +1,11 @@ //! Clock management unit initializations -use efm32pg23_fix::CMU_S; +use efm32pg23_fix::CmuS; /// Initialize all needed clock units -pub fn init_cmu(cmu: &mut CMU_S) { +pub fn init_cmu(cmu: &mut CmuS) { cmu - .clken0 + .clken0() .write(|w_reg| { w_reg .gpio().set_bit() @@ -19,7 +19,7 @@ pub fn init_cmu(cmu: &mut CMU_S) { }); cmu - .clken1 + .clken1() .write(|w_reg| { w_reg .eusart2().set_bit() diff --git a/kampela-system/src/peripherals/eusart.rs b/kampela-system/src/peripherals/eusart.rs index d6b5cc0..3620f18 100644 --- a/kampela-system/src/peripherals/eusart.rs +++ b/kampela-system/src/peripherals/eusart.rs @@ -1,17 +1,17 @@ //! EUSART interface -use efm32pg23_fix::{GPIO_S, Peripherals}; +use efm32pg23_fix::{GpioS, Peripherals}; use crate::peripherals::gpio_pins::*; pub const BAUDRATE_EUSART: u32 = 10_000_000; /// Enable psram channel -pub fn select_psram(gpio: &mut GPIO_S) { +pub fn select_psram(gpio: &mut GpioS) { psram_chip_select_clear(gpio); } /// Disable psram channel -pub fn deselect_psram(gpio: &mut GPIO_S) { +pub fn deselect_psram(gpio: &mut GpioS) { psram_chip_select_set(gpio); } @@ -21,35 +21,35 @@ pub fn deselect_psram(gpio: &mut GPIO_S) { pub fn init_eusart(peripherals: &mut Peripherals) { // PSRAM MOSI peripherals - .GPIO_S - .eusart2_txroute - .write(|w_reg| { + .gpio_s + .eusart2_txroute() + .write(|w_reg| unsafe { w_reg - .port().variant(2) - .pin().variant(PSRAM_MOSI_PIN) + .port().bits(PORT_C) + .pin().bits(PSRAM_MOSI_PIN) }); // PSRAM MISO peripherals - .GPIO_S - .eusart2_rxroute - .write(|w_reg| { + .gpio_s + .eusart2_rxroute() + .write(|w_reg| unsafe { w_reg - .port().variant(2) - .pin().variant(PSRAM_MISO_PIN) + .port().bits(PORT_C) + .pin().bits(PSRAM_MISO_PIN) }); // PSRAM SCK peripherals - .GPIO_S - .eusart2_sclkroute - .write(|w_reg| { + .gpio_s + .eusart2_sclkroute() + .write(|w_reg| unsafe { w_reg - .port().variant(2) - .pin().variant(PSRAM_SCK_PIN) + .port().bits(PORT_C) + .pin().bits(PSRAM_SCK_PIN) }); // route enable peripherals - .GPIO_S - .eusart2_routeen + .gpio_s + .eusart2_routeen() .write(|w_reg| { w_reg .txpen().set_bit() @@ -59,13 +59,13 @@ pub fn init_eusart(peripherals: &mut Peripherals) { // EUSART2 init if peripherals - .EUSART2_S - .en + .eusart2_s + .en() .read() .bits() .ne(&0) { - while peripherals.EUSART2_S.syncbusy.read().bits().ne(&0) {} + while peripherals.eusart2_s.syncbusy().read().bits().ne(&0) {} } // reset EUSART @@ -76,9 +76,9 @@ pub fn init_eusart(peripherals: &mut Peripherals) { // configure peripherals - .EUSART2_S - .cfg2 - .write(|w_reg| + .eusart2_s + .cfg2() + .write(|w_reg| { w_reg .master().master() .clkpol().idlelow() @@ -87,20 +87,22 @@ pub fn init_eusart(peripherals: &mut Peripherals) { .autotx().clear_bit() .autocs().set_bit() .clkprsen().clear_bit() - .forceload().set_bit() - .sdiv().variant(clkdiv) - ); + .forceload().set_bit(); + unsafe { + w_reg.sdiv().bits(clkdiv) + } + }); peripherals - .EUSART2_S - .cfg1 + .eusart2_s + .cfg1() .write(|w_reg| w_reg .txfiw().oneframe() .rxfiw().oneframe() ); peripherals - .EUSART2_S - .cfg0 + .eusart2_s + .cfg0() .write(|w_reg| w_reg .sync().sync() @@ -110,78 +112,79 @@ pub fn init_eusart(peripherals: &mut Peripherals) { .msbf().enable() ); peripherals - .EUSART2_S - .timingcfg - .write(|w_reg| + .eusart2_s + .timingcfg() + .write(|w_reg| { w_reg .cssetup().zero() .cshold().zero() - .ics().zero() - .setupwindow().variant(4) - ); + .ics().zero(); + unsafe { + w_reg.setupwindow().bits(4) + } + }); peripherals - .EUSART2_S - .framecfg + .eusart2_s + .framecfg() .write(|w_reg| w_reg .databits().eight() ); peripherals - .EUSART2_S - .dtxdatcfg - .write(|w_reg| - w_reg - .dtxdat().variant(0) - ); + .eusart2_s + .dtxdatcfg() + .write(|w_reg| unsafe { + w_reg.dtxdat().bits(0) + }); eusart_enable(peripherals); - while peripherals.EUSART2_S.status.read().rxidle().bit_is_clear() - | peripherals.EUSART2_S.status.read().txidle().bit_is_clear() {} + while peripherals.eusart2_s.status().read().rxidle().bit_is_clear() + | peripherals.eusart2_s.status().read().txidle().bit_is_clear() {} // remember to reset connected ram device here later, right after setup } fn eusart_disable(peripherals: &mut Peripherals) { if peripherals - .EUSART2_S - .en + .eusart2_s + .en() .read() .en() .bit_is_set() { - if peripherals.EUSART2_S.cfg0.read().sync().bit_is_clear() | peripherals.EUSART2_S.cfg2.read().master().bit_is_set() { + if peripherals.eusart2_s.cfg0().read().sync().bit_is_clear() | peripherals.eusart2_s.cfg2().read().master().bit_is_set() { // disable TX and RX - peripherals.EUSART2_S.cmd.write(|w_reg| w_reg.rxdis().set_bit().txdis().set_bit()); + peripherals.eusart2_s.cmd().write(|w_reg| w_reg.rxdis().set_bit().txdis().set_bit()); // wait for TXDIS and RXDIS to pass - while peripherals.EUSART2_S.syncbusy.read().rxdis().bit_is_set() | peripherals.EUSART2_S.syncbusy.read().txdis().bit_is_set() {} + while peripherals.eusart2_s.syncbusy().read().rxdis().bit_is_set() | peripherals.eusart2_s.syncbusy().read().txdis().bit_is_set() {} // wait for TX and RX enable status to go low - while peripherals.EUSART2_S.status.read().rxens().bit_is_set() | peripherals.EUSART2_S.status.read().txens().bit_is_set() {} + while peripherals.eusart2_s.status().read().rxens().bit_is_set() | peripherals.eusart2_s.status().read().txens().bit_is_set() {} } peripherals - .EUSART2_S - .en + .eusart2_s + .en() .write(|w_reg| w_reg.en().clear_bit()); // wait for disabling to clear - while peripherals.EUSART2_S.en.read().disabling().bit_is_set() {} + while peripherals.eusart2_s.en().read().disabling().bit_is_set() {} } } fn eusart_enable(peripherals: &mut Peripherals) { peripherals - .EUSART2_S - .en + .eusart2_s + .en() .write(|w_reg| w_reg.en().set_bit()); - while peripherals.EUSART2_S.syncbusy.read().bits().ne(&0) {} + while peripherals.eusart2_s.syncbusy().read().bits().ne(&0) {} peripherals - .EUSART2_S - .cmd + .eusart2_s + .cmd() .write(|w_reg| { w_reg .rxen().set_bit() @@ -192,17 +195,17 @@ fn eusart_enable(peripherals: &mut Peripherals) { // .rxblocken().clear_bit() // added }); - while peripherals.EUSART2_S.syncbusy.read().rxen().bit_is_set() - | peripherals.EUSART2_S.syncbusy.read().rxdis().bit_is_set() - | peripherals.EUSART2_S.syncbusy.read().txen().bit_is_set() - | peripherals.EUSART2_S.syncbusy.read().txdis().bit_is_set() -// | peripherals.EUSART2_S.syncbusy.read().rxblockdis().bit_is_set() // added -// | peripherals.EUSART2_S.syncbusy.read().rxblocken().bit_is_set() // added + while peripherals.eusart2_s.syncbusy().read().rxen().bit_is_set() + | peripherals.eusart2_s.syncbusy().read().rxdis().bit_is_set() + | peripherals.eusart2_s.syncbusy().read().txen().bit_is_set() + | peripherals.eusart2_s.syncbusy().read().txdis().bit_is_set() +// | peripherals.eusart2_s.syncbusy.read().rxblockdis().bit_is_set() // added +// | peripherals.eusart2_s.syncbusy.read().rxblocken().bit_is_set() // added {} - while peripherals.EUSART2_S.status.read().rxens().bit_is_clear() - | peripherals.EUSART2_S.status.read().txens().bit_is_clear() -// | peripherals.EUSART2_S.status.read().rxblock().bit_is_set() // added + while peripherals.eusart2_s.status().read().rxens().bit_is_clear() + | peripherals.eusart2_s.status().read().txens().bit_is_clear() +// | peripherals.eusart2_s.status.read().rxblock().bit_is_set() // added {} } @@ -210,23 +213,23 @@ fn eusart_reset(peripherals: &mut Peripherals) { eusart_disable(peripherals); for _i in 0..4 { - peripherals.EUSART2_S.cfg2.write(|w_reg| w_reg.clkpha().set_bit()); - peripherals.EUSART2_S.cfg2.write(|w_reg| w_reg.clkpha().clear_bit()); + peripherals.eusart2_s.cfg2().write(|w_reg| w_reg.clkpha().set_bit()); + peripherals.eusart2_s.cfg2().write(|w_reg| w_reg.clkpha().clear_bit()); } - peripherals.EUSART2_S.cfg2.reset(); - peripherals.EUSART2_S.cfg1.reset(); - peripherals.EUSART2_S.cfg0.reset(); - peripherals.EUSART2_S.framecfg.reset(); - peripherals.EUSART2_S.dtxdatcfg.reset(); - peripherals.EUSART2_S.timingcfg.reset(); - peripherals.EUSART2_S.irhfcfg.reset(); - peripherals.EUSART2_S.startframecfg.reset(); - peripherals.EUSART2_S.sigframecfg.reset(); - peripherals.EUSART2_S.trigctrl.reset(); - peripherals.EUSART2_S.ien.reset(); - peripherals.EUSART2_S.if_.reset(); - peripherals.EUSART2_S.clkdiv.reset(); + peripherals.eusart2_s.cfg2().reset(); + peripherals.eusart2_s.cfg1().reset(); + peripherals.eusart2_s.cfg0().reset(); + peripherals.eusart2_s.framecfg().reset(); + peripherals.eusart2_s.dtxdatcfg().reset(); + peripherals.eusart2_s.timingcfg().reset(); + peripherals.eusart2_s.irhfcfg().reset(); + peripherals.eusart2_s.startframecfg().reset(); + peripherals.eusart2_s.sigframecfg().reset(); + peripherals.eusart2_s.trigctrl().reset(); + peripherals.eusart2_s.ien().reset(); + peripherals.eusart2_s.if_().reset(); + peripherals.eusart2_s.clkdiv().reset(); } diff --git a/kampela-system/src/peripherals/gpio_pins.rs b/kampela-system/src/peripherals/gpio_pins.rs index 551e79c..64b40e8 100644 --- a/kampela-system/src/peripherals/gpio_pins.rs +++ b/kampela-system/src/peripherals/gpio_pins.rs @@ -3,9 +3,9 @@ #![allow(dead_code)] use cortex_m::asm::delay; -use efm32pg23_fix::GPIO_S; +use efm32pg23_fix::GpioS; -// PA +pub const PORT_A: u8 = 0; pub const MCU_OK: u8 = 3; pub const SCL_PIN: u8 = 4; @@ -15,12 +15,13 @@ pub const TOUCH_RES_PIN: u8 = 7; pub const NFC_PIN: u8 = 8; pub const POW_PIN: u8 = 9; -// PB +pub const PORT_B: u8 = 1; pub const TOUCH_INT_PIN: u8 = 1; pub const SPI_BUSY_PIN: u8 = 4; -// PC +pub const PORT_C: u8 = 2; + pub const FLASH_CS_PIN: u8 = 0; pub const E_MISO_PIN: u8 = 1; pub const E_MOSI_PIN: u8 = 2; @@ -30,7 +31,8 @@ pub const PSRAM_MISO_PIN: u8 = 5; pub const PSRAM_MOSI_PIN: u8 = 6; pub const PSRAM_SCK_PIN: u8 = 7; -// PD +pub const PORT_D: u8 = 3; + pub const DISP_CS_PIN: u8 = 2; pub const DISP_DC_PIN: u8 = 3; @@ -46,18 +48,18 @@ macro_rules! gpio_pin { $( #[$attr_set] #[$attr_common] - pub fn $func_set(gpio: &mut GPIO_S) { + pub fn $func_set(gpio: &mut GpioS) { gpio - .$port - .modify(|r, w| w.dout().variant(r.dout().bits() | (1 << $pin))); + .$port() + .modify(|r, w| unsafe { w.dout().bits(r.dout().bits() | (1 << $pin)) }); } #[$attr_clear] #[$attr_common] - pub fn $func_clear(gpio: &mut GPIO_S) { + pub fn $func_clear(gpio: &mut GpioS) { gpio - .$port - .modify(|r, w| w.dout().variant(r.dout().bits() & !(1 << $pin))); + .$port() + .modify(|r, w| unsafe { w.dout().bits(r.dout().bits() & !(1 << $pin)) }); } )* } @@ -236,16 +238,15 @@ gpio_pin!( ); /// GPIO initializations -pub fn init_gpio(gpio: &mut GPIO_S) { +pub fn init_gpio(gpio: &mut GpioS) { map_gpio(gpio); set_gpio_pins(gpio); - set_external_interrupts(gpio); } /// Set GPIO functions -fn map_gpio(gpio: &mut GPIO_S) { +fn map_gpio(gpio: &mut GpioS) { gpio - .porta_model + .porta_model() .write(|w_reg| { w_reg .mode3().pushpull() // MCU operational indicator @@ -255,21 +256,27 @@ fn map_gpio(gpio: &mut GPIO_S) { .mode7().pushpull() // Touch reset }); gpio - .porta_modeh + .porta_modeh() .write(|w_reg| { w_reg .mode0().inputpullfilter() // NFC .mode1().pushpull() // Power 2.8 V }); gpio - .portb_model + .portb_model() .write(|w_reg| { w_reg - .mode1().input() // interrupts from display sensor + .mode1().inputpullfilter() // interrupts from display sensor .mode4().input() // BUSY spi }); gpio - .portc_model + .portb_dout() + .write(|w_reg| unsafe { + w_reg + .dout().bits(1 << TOUCH_INT_PIN) //pull-up display sensor pin + }); + gpio + .portc_model() .write(|w_reg| { w_reg .mode0().pushpull() // Flash chip select @@ -282,7 +289,7 @@ fn map_gpio(gpio: &mut GPIO_S) { .mode7().pushpull() // PSRAM SCK }); gpio - .portd_model + .portd_model() .write(|w_reg| { w_reg .mode2().inputpull() // Display chip select @@ -291,7 +298,7 @@ fn map_gpio(gpio: &mut GPIO_S) { } /// Set GPIO pins to their starting values -fn set_gpio_pins(gpio: &mut GPIO_S) { +fn set_gpio_pins(gpio: &mut GpioS) { mcu_ok_clear(gpio); mcu_ok_clear(gpio); pow_set(gpio); @@ -299,7 +306,7 @@ fn set_gpio_pins(gpio: &mut GPIO_S) { display_chip_select_set(gpio); spi_data_command_clear(gpio); display_res_clear(gpio); - touch_res_clear(gpio); + touch_res_set(gpio); sda_set(gpio); scl_set(gpio); flash_chip_select_set(gpio); @@ -313,29 +320,30 @@ fn set_gpio_pins(gpio: &mut GPIO_S) { nfc_pin_clear(gpio); } -pub fn is_touch_int(gpio: &mut GPIO_S) -> bool { - gpio - .portb_din - .read() - .din() - .bits() & 1 << TOUCH_INT_PIN == 0 -} - /// Set up external interrupt pins (used to get touch events from touch pad) -fn set_external_interrupts(gpio: &mut GPIO_S) { +pub fn enable_touch_int_flag(gpio: &mut GpioS) { + gpio + .if_clr() + .write(|w_reg| w_reg.extif0().set_bit()); gpio - .extipsell + .extipsell() .write(|w_reg| w_reg.extipsel0().portb()); gpio - .extipinsell + .extipinsell() .write(|w_reg| w_reg.extipinsel0().pin1()); gpio - .extirise - .write(|w_reg| w_reg.extirise().variant(0)); + .extirise() + .modify(|r_reg, w_reg| unsafe { w_reg.extirise().bits(r_reg.extirise().bits() & !(1 << 0)) }); + gpio + .extifall() + .modify(|r_reg, w_reg| unsafe { w_reg.extifall().bits(r_reg.extifall().bits() | (1 << 0)) }); gpio - .extifall - .write(|w_reg| w_reg.extifall().variant(1 << 0)); + .ien() + .write(|w_reg| w_reg.extien0().set_bit()) +} + +pub fn disable_touch_int_flag(gpio: &mut GpioS) { gpio - .ien - .write(|w_reg| w_reg.extien0().set_bit()); + .ien() + .write(|w_reg| w_reg.extien0().clear_bit()) } diff --git a/kampela-system/src/peripherals/i2c.rs b/kampela-system/src/peripherals/i2c.rs index 8ec52b8..8fcea54 100644 --- a/kampela-system/src/peripherals/i2c.rs +++ b/kampela-system/src/peripherals/i2c.rs @@ -3,7 +3,7 @@ use efm32pg23_fix::Peripherals; use crate::peripherals::gpio_pins::*; use cortex_m::asm::delay; use crate::{if_in_free, in_free, FreeError}; -use crate::parallel::Operation; +use crate::parallel::{AsyncOperation, Threads}; #[derive(Debug)] @@ -25,189 +25,114 @@ impl From for I2CError { pub fn init_i2c(peripherals: &mut Peripherals) { peripherals - .GPIO_S - .i2c0_routeen + .gpio_s + .i2c0_routeen() .write(|w_reg| w_reg.sclpen().set_bit().sdapen().set_bit()); peripherals - .GPIO_S - .i2c0_sdaroute - .write(|w_reg| w_reg.port().variant(0).pin().variant(SDA_PIN)); + .gpio_s + .i2c0_sdaroute() + .write(|w_reg| unsafe { w_reg.port().bits(PORT_A).pin().bits(SDA_PIN) }); peripherals - .GPIO_S - .i2c0_sclroute - .write(|w_reg| w_reg.port().variant(0).pin().variant(SCL_PIN)); + .gpio_s + .i2c0_sclroute() + .write(|w_reg| unsafe { w_reg.port().bits(PORT_A).pin().bits(SCL_PIN) }); peripherals - .I2C0_S - .ien + .i2c0_s + .ien() .reset(); peripherals - .I2C0_S - .if_ + .i2c0_s + .if_() .reset(); peripherals - .I2C0_S - .ctrl + .i2c0_s + .ctrl() .write(|w_reg| w_reg.slave().disable().clhr().standard()); peripherals - .I2C0_S - .clkdiv - .write(|w_reg| w_reg.div().variant(12)); // divider calculated as 10, set to 12 for debug + .i2c0_s + .clkdiv() + .write(|w_reg| unsafe { w_reg.div().bits(12) }); // divider calculated as 10, set to 12 for debug peripherals - .I2C0_S - .en + .i2c0_s + .en() .write(|w_reg| w_reg.en().enable()); peripherals - .I2C0_S - .ctrl + .i2c0_s + .ctrl() .write(|w_reg| w_reg.corerst().enable()); delay(10000); peripherals - .I2C0_S - .ctrl + .i2c0_s + .ctrl() .write(|w_reg| w_reg.corerst().disable()); delay(100000); } /// I2C bus reader for our touchpad, not generalized until someone needs it pub struct ReadI2C { - state: ReadI2CState, + threads: Threads, value: Option, - timer: usize } pub enum ReadI2CState { - /// Initial state; here the read is done - Init, - /// Handle errata and cleanup after read; output - ErrataCleanup1, - /// Another operation for errata cleanup, usually not entered; Also outputs. - ErrataCleanup2, + /// Read data register + Read, + /// Clean state registers and output data + OutputData } -impl ReadI2C { - fn count(&mut self) -> bool { - if self.timer == 0 { - false - } else { - self.timer -= 1; - true - } - } +impl Default for ReadI2CState { + fn default() -> Self { ReadI2CState::OutputData } } -impl Operation for ReadI2C { +impl AsyncOperation for ReadI2C { type Init = (); type Input<'a> = (); - type Output = Result, I2CError>; - type StateEnum = ReadI2CState; + type Output = Result>, I2CError>; fn new(_: ()) -> Self { Self { - state: ReadI2CState::Init, + threads: Threads::new(ReadI2CState::Read), value: None, - timer: 0, } } - fn wind(&mut self, state: ReadI2CState, delay: usize) { - self.state = state; - self.timer = delay; - } - fn advance(&mut self, _: ()) -> Self::Output { - if self.count() { return Ok(None) }; - match self.state { - ReadI2CState::Init => { + match self.threads.turn() { + ReadI2CState::Read => { check_i2c_errors()?; - if !if_in_free(|peripherals| + if if_in_free(|peripherals| peripherals - .I2C0_S - .if_ + .i2c0_s + .status() .read() .rxdatav() - .bit_is_clear() + .bit_is_set() )? { in_free(|peripherals| self.value = Some( peripherals - .I2C0_S - .rxdata + .i2c0_s + .rxdata() .read() .rxdata() .bits() ) ); - self.wind_d(ReadI2CState::ErrataCleanup1); - } - Ok(None) - }, - ReadI2CState::ErrataCleanup1 => { - // Errata I2C_E303, patch follows sdk - if if_in_free(|peripherals| - peripherals - .I2C0_S - .status - .read() - .rxdatav() - .bit_is_clear() - & - peripherals - .I2C0_S - .status - .read() - .rxfull() - .bit_is_set() - )? { - in_free(|peripherals| { - let _dummy_data = peripherals - .I2C0_S - .rxdata - .read() - .bits(); - } - ); - self.wind_d(ReadI2CState::ErrataCleanup2); - Ok(None) + self.threads.change(ReadI2CState::OutputData); + Ok(Some(None)) } else { - in_free(|peripherals| - peripherals - .I2C0_S - .if_ - .write(|w_reg| w_reg.rxdatav().clear_bit().rxfull().clear_bit()) - ); - - if let Some(out) = self.value { - Ok(Some(out)) - } else { - Err(I2CError::SequenceError) - } + Ok(None) } }, - ReadI2CState::ErrataCleanup2 => { - in_free(|peripherals| { - peripherals - .I2C0_S - .if_ - .write(|w_reg| w_reg.rxuf().clear_bit()); - peripherals - .I2C0_S - .if_ - .write(|w_reg| - w_reg - .rxdatav() - .clear_bit() - .rxfull() - .clear_bit() - ); - }); - + ReadI2CState::OutputData => { if let Some(out) = self.value { - Ok(Some(out)) + Ok(Some(Some(out))) } else { Err(I2CError::SequenceError) } - }, + } } } } @@ -231,26 +156,84 @@ pub fn check_i2c_errors() -> Result<(), I2CError> { out } -pub fn acknowledge_i2c_tx() -> Result<(), I2CError> { - let mut out = Ok(()); - in_free(|peripherals| { - out = acknowledge_i2c_tx_free(peripherals) - }); - out +pub fn acknowledge_i2c_tx() -> Result { + check_i2c_errors()?; + + if if_in_free(|peripherals| + peripherals + .i2c0_s + .if_() + .read() + .ack() + .bit_is_clear() + ).unwrap() { + check_i2c_errors()?; + + if if_in_free(|peripherals| + peripherals + .i2c0_s + .if_() + .read() + .nack() + .bit_is_set() + ).unwrap() { + in_free(|peripherals| { + // clear interrupt flag + peripherals + .i2c0_s + .if_() + .write(|w_reg| w_reg.nack().clear_bit()); + // stop + peripherals + .i2c0_s + .cmd() + .write(|w_reg| w_reg.stop().set_bit()); + }); + + delay(100000); + return Err(I2CError::TransferNack) + } + + Ok(false) + } else { + in_free(|peripherals| + // clear interrupt flag + peripherals + .i2c0_s + .if_() + .write(|w_reg| w_reg.ack().clear_bit()) + ); + Ok(true) + } } -pub fn mstop_i2c_wait_and_clear() -> Result<(), I2CError> { - let mut out = Ok(()); - in_free(|peripherals| { - out = check_i2c_errors_free(peripherals) - }); - out +pub fn mstop_i2c_wait_and_clear() -> Result { + check_i2c_errors()?; + if if_in_free(|peripherals| + peripherals + .i2c0_s + .if_() + .read() + .mstop() + .bit_is_clear() + ).unwrap() { + check_i2c_errors()?; + Ok(false) + } else { + in_free(|peripherals| + peripherals + .i2c0_s + .if_() + .write(|w_reg| w_reg.mstop().clear_bit()) + ); + Ok(true) + } } pub fn check_i2c_errors_free(peripherals: &mut Peripherals) -> Result<(), I2CError> { let if_read = peripherals - .I2C0_S - .if_ + .i2c0_s + .if_() .read(); if if_read.arblost().bit_is_set() {return Err(I2CError::ArbitrationLost)} if if_read.buserr().bit_is_set() {return Err(I2CError::BusError)} @@ -260,8 +243,8 @@ pub fn check_i2c_errors_free(peripherals: &mut Peripherals) -> Result<(), I2CErr pub fn acknowledge_i2c_tx_free(peripherals: &mut Peripherals) -> Result<(), I2CError> { check_i2c_errors_free(peripherals)?; while peripherals - .I2C0_S - .if_ + .i2c0_s + .if_() .read() .ack() .bit_is_clear() @@ -269,21 +252,21 @@ pub fn acknowledge_i2c_tx_free(peripherals: &mut Peripherals) -> Result<(), I2CE check_i2c_errors_free(peripherals)?; if peripherals - .I2C0_S - .if_ + .i2c0_s + .if_() .read() .nack() .bit_is_set() { // clear interrupt flag peripherals - .I2C0_S - .if_ + .i2c0_s + .if_() .write(|w_reg| w_reg.nack().clear_bit()); // stop peripherals - .I2C0_S - .cmd + .i2c0_s + .cmd() .write(|w_reg| w_reg.stop().set_bit()); delay(100000); return Err(I2CError::TransferNack) @@ -291,8 +274,8 @@ pub fn acknowledge_i2c_tx_free(peripherals: &mut Peripherals) -> Result<(), I2CE } // clear interrupt flag peripherals - .I2C0_S - .if_ + .i2c0_s + .if_() .write(|w_reg| w_reg.ack().clear_bit()); Ok(()) @@ -301,8 +284,8 @@ pub fn acknowledge_i2c_tx_free(peripherals: &mut Peripherals) -> Result<(), I2CE pub fn mstop_i2c_wait_and_clear_free(peripherals: &mut Peripherals) -> Result<(), I2CError> { check_i2c_errors_free(peripherals)?; while peripherals - .I2C0_S - .if_ + .i2c0_s + .if_() .read() .mstop() .bit_is_clear() @@ -310,8 +293,8 @@ pub fn mstop_i2c_wait_and_clear_free(peripherals: &mut Peripherals) -> Result<() check_i2c_errors_free(peripherals)?; } peripherals - .I2C0_S - .if_ + .i2c0_s + .if_() .write(|w_reg| w_reg.mstop().clear_bit()); Ok(()) } diff --git a/kampela-system/src/peripherals/ldma.rs b/kampela-system/src/peripherals/ldma.rs index 4362bf6..0e90d29 100644 --- a/kampela-system/src/peripherals/ldma.rs +++ b/kampela-system/src/peripherals/ldma.rs @@ -31,71 +31,71 @@ pub struct NfcXferBlock { pub fn init_ldma(peripherals: &mut Peripherals, nfc_descriptor_address: *const NfcXferBlock) { // set up ldma peripherals - .LDMA_S - .en + .ldma_s + .en() .write(|w_reg| { w_reg .en().set_bit() }); peripherals - .LDMA_S - .ctrl - .write(|w_reg| { + .ldma_s + .ctrl() + .write(|w_reg| unsafe { w_reg - .numfixed().variant(0) + .numfixed().bits(0) }); peripherals - .LDMA_S - .synchwen - .write(|w_reg| { + .ldma_s + .synchwen() + .write(|w_reg| unsafe { w_reg - .syncseten().variant(0) - .syncclren().variant(0) + .syncseten().bits(0) + .syncclren().bits(0) }); peripherals - .LDMA_S - .chdis - .write(|w_reg| { + .ldma_s + .chdis() + .write(|w_reg| unsafe { w_reg - .chdis().variant(0xFF) + .chdis().bits(0xFF) }); peripherals - .LDMA_S - .dbghalt - .write(|w_reg| { + .ldma_s + .dbghalt() + .write(|w_reg| unsafe { w_reg - .dbghalt().variant(0) + .dbghalt().bits(0) }); peripherals - .LDMA_S - .reqdis - .write(|w_reg| { + .ldma_s + .reqdis() + .write(|w_reg| unsafe { w_reg - .reqdis().variant(0) + .reqdis().bits(0) }); peripherals - .LDMA_S - .ien + .ldma_s + .ien() .write(|w_reg| { w_reg .error().set_bit() }); peripherals - .LDMA_S - .if_ + .ldma_s + .if_() .reset(); // start ldma transfer peripherals - .LDMA_S - .if_ + .ldma_s + .if_() .modify(|_, w_reg| { w_reg .done7().clear_bit() @@ -103,27 +103,27 @@ pub fn init_ldma(peripherals: &mut Peripherals, nfc_descriptor_address: *const N ); peripherals - .LDMAXBAR_S - .ch7_reqsel - .write(|w_reg| { + .ldmaxbar_s + .ch7_reqsel() + .write(|w_reg| unsafe { w_reg - .sigsel().variant(0) // _LDMAXBAR_CH_REQSEL_SIGSEL_TIMER0CC0 - .sourcesel().variant(2) // _LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER0 + .sigsel().bits(0) // _LDMAXBAR_CH_REQSEL_SIGSEL_TIMER0CC0 + .sourcesel().bits(2) // _LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER0 } ); peripherals - .LDMA_S - .ch7_loop - .write(|w_reg| { + .ldma_s + .ch7_loop() + .write(|w_reg| unsafe { w_reg - .loopcnt().variant(0) + .loopcnt().bits(0) } ); peripherals - .LDMA_S - .ch7_cfg + .ldma_s + .ch7_cfg() .write(|w_reg| { w_reg .arbslots().one() @@ -133,34 +133,36 @@ pub fn init_ldma(peripherals: &mut Peripherals, nfc_descriptor_address: *const N ); peripherals - .LDMA_S - .ch7_link + .ldma_s + .ch7_link() .write(|w_reg| { w_reg - .link().clear_bit() - .linkaddr().variant(nfc_descriptor_address as u32 >> 2) + .link().clear_bit(); + unsafe { + w_reg.linkaddr().bits(nfc_descriptor_address as u32 >> 2) + } } ); // there starts a critical section free(|_cs| { peripherals - .LDMA_S - .ien - .write(|w_reg| { + .ldma_s + .ien() + .write(|w_reg| unsafe { w_reg - .chdone().variant(1 << CH_TIM0) + .chdone().bits(1 << CH_TIM0) } ); peripherals - .LDMA_S - .synchwen + .ldma_s + .synchwen() .reset(); // default values, i.e. 0 for clr_off, clr_on, set_off, set_on peripherals - .LDMA_S - .chdone + .ldma_s + .chdone() .write(|w_reg| { w_reg .chdone7().clear_bit() @@ -168,11 +170,11 @@ pub fn init_ldma(peripherals: &mut Peripherals, nfc_descriptor_address: *const N ); peripherals - .LDMA_S - .linkload - .write(|w_reg| { + .ldma_s + .linkload() + .write(|w_reg| unsafe { w_reg - .linkload().variant(1 << CH_TIM0) + .linkload().bits(1 << CH_TIM0) } ); }); diff --git a/kampela-system/src/peripherals/se_command.rs b/kampela-system/src/peripherals/se_command.rs index 0579719..5cc66aa 100644 --- a/kampela-system/src/peripherals/se_command.rs +++ b/kampela-system/src/peripherals/se_command.rs @@ -85,8 +85,8 @@ impl<'a> SeCommand<'a> { // TXINT bit is set when there is space in FIFO for at least 16 words. // Wait for it here. while peripherals - .SEMAILBOX_S_HOST - .tx_status + .semailbox_s_host + .tx_status() .read() .txint() .bit_is_clear() @@ -102,17 +102,17 @@ impl<'a> SeCommand<'a> { // Header is sent into TX_HEADER register. peripherals - .SEMAILBOX_S_HOST - .tx_header - .write(|w_reg| w_reg.txheader().variant(into_header as u32)); + .semailbox_s_host + .tx_header() + .write(|w_reg| unsafe { w_reg.txheader().bits(into_header as u32) }); rembytes -= REMBYTES_DECREMENT; expect_rembytes(peripherals, rembytes); // Command word is sent into FIFO register. peripherals - .SEMAILBOX_S_HOST - .fifo - .write(|w_reg| w_reg.fifo().variant(self.command_word)); + .semailbox_s_host + .fifo() + .write(|w_reg| unsafe { w_reg.fifo().bits(self.command_word) }); rembytes -= REMBYTES_DECREMENT; expect_rembytes(peripherals, rembytes); @@ -121,9 +121,9 @@ impl<'a> SeCommand<'a> { // SE gets further input elements through pointers in [`DataTransfer`]. // Input ends when `SE_DATATRANSFER_STOP` is encoutered. peripherals - .SEMAILBOX_S_HOST - .fifo - .write(|w_reg| w_reg.fifo().variant(self.data_in)); + .semailbox_s_host + .fifo() + .write(|w_reg| unsafe { w_reg.fifo().bits(self.data_in) }); rembytes -= REMBYTES_DECREMENT; expect_rembytes(peripherals, rembytes); @@ -132,18 +132,18 @@ impl<'a> SeCommand<'a> { // SE gets further input elements through pointers in [`DataTransfer`]. // Output ends when `SE_DATATRANSFER_STOP` is encoutered. peripherals - .SEMAILBOX_S_HOST - .fifo - .write(|w_reg| w_reg.fifo().variant(self.data_out)); + .semailbox_s_host + .fifo() + .write(|w_reg| unsafe { w_reg.fifo().bits(self.data_out) }); rembytes -= REMBYTES_DECREMENT; expect_rembytes(peripherals, rembytes); // Parameters are sent into FIFO register. for param in self.parameters.iter() { peripherals - .SEMAILBOX_S_HOST - .fifo - .write(|w_reg| w_reg.fifo().variant(*param)); + .semailbox_s_host + .fifo() + .write(|w_reg| unsafe { w_reg.fifo().bits(*param) }); rembytes -= REMBYTES_DECREMENT; expect_rembytes(peripherals, rembytes); } @@ -152,8 +152,8 @@ impl<'a> SeCommand<'a> { // final word of the message is present in the FIFO. // Wait for it here. while peripherals - .SEMAILBOX_S_HOST - .rx_status + .semailbox_s_host + .rx_status() .read() .rxint() .bit_is_clear() @@ -164,15 +164,15 @@ impl<'a> SeCommand<'a> { // This does not work properly without the delay. // Minimal delay is sufficient. delay(1); - let rx_header = peripherals.SEMAILBOX_S_HOST.rx_header.read().bits(); + let rx_header = peripherals.semailbox_s_host.rx_header().read().bits(); if rx_header.eq(&0) { break; } } match peripherals - .SEMAILBOX_S_HOST - .rx_status + .semailbox_s_host + .rx_status() .read() .msginfo() .bits() @@ -212,8 +212,8 @@ pub enum RxError { /// Wait for expected remaining bytes value. fn expect_rembytes(peripherals: &mut Peripherals, rembytes: u16) { while peripherals - .SEMAILBOX_S_HOST - .tx_status + .semailbox_s_host + .tx_status() .read() .rembytes() .bits() diff --git a/kampela-system/src/peripherals/timers.rs b/kampela-system/src/peripherals/timers.rs index b7ac36a..ea85ddd 100644 --- a/kampela-system/src/peripherals/timers.rs +++ b/kampela-system/src/peripherals/timers.rs @@ -10,31 +10,31 @@ pub fn init_timers(peripherals: &mut Peripherals) { /// set up TIMER0 for NFC reading fn init_timer0(peripherals: &mut Peripherals) { peripherals - .GPIO_S - .timer0_routeen + .gpio_s + .timer0_routeen() .write(|w_reg| w_reg.cc0pen().set_bit()); peripherals - .GPIO_S - .timer0_cc0route - .write(|w_reg| { + .gpio_s + .timer0_cc0route() + .write(|w_reg| unsafe { w_reg - .port().variant(0) - .pin().variant(NFC_PIN) + .port().bits(PORT_A) + .pin().bits(NFC_PIN) }); // synchronizing - while peripherals.TIMER0_S.en.read().en().bit_is_set() & peripherals.TIMER0_S.status.read().syncbusy().bit_is_set() {} + while peripherals.timer0_s.en().read().en().bit_is_set() & peripherals.timer0_s.status().read().syncbusy().bit_is_set() {} peripherals - .TIMER0_S - .en + .timer0_s + .en() .write(|w_reg| w_reg.en().clear_bit()); - while peripherals.TIMER0_S.en.read().disabling().bit_is_set() {} + while peripherals.timer0_s.en().read().disabling().bit_is_set() {} peripherals - .TIMER0_S - .cc0_cfg + .timer0_s + .cc0_cfg() .write(|w_reg| { w_reg .mode().inputcapture() @@ -44,8 +44,8 @@ fn init_timer0(peripherals: &mut Peripherals) { }); peripherals - .TIMER0_S - .cfg + .timer0_s + .cfg() .write(|w_reg| { w_reg .mode().up() @@ -62,13 +62,13 @@ fn init_timer0(peripherals: &mut Peripherals) { }); peripherals - .TIMER0_S - .en + .timer0_s + .en() .write(|w_reg| w_reg.en().set_bit()); peripherals - .TIMER0_S - .cc0_ctrl + .timer0_s + .cc0_ctrl() .write(|w_reg| { w_reg .icevctrl().falling() @@ -80,18 +80,18 @@ fn init_timer0(peripherals: &mut Peripherals) { }); peripherals - .TIMER0_S - .cmd + .timer0_s + .cmd() .write(|w_reg| w_reg.stop().set_bit()); peripherals - .TIMER0_S - .cnt + .timer0_s + .cnt() .reset(); peripherals - .TIMER0_S - .ctrl + .timer0_s + .ctrl() .write(|w_reg| { w_reg .risea().none() diff --git a/kampela-system/src/peripherals/usart.rs b/kampela-system/src/peripherals/usart.rs index dbde52f..a197757 100644 --- a/kampela-system/src/peripherals/usart.rs +++ b/kampela-system/src/peripherals/usart.rs @@ -1,44 +1,44 @@ //! all low level usart operations -use efm32pg23_fix::{GPIO_S, Peripherals}; +use efm32pg23_fix::{GpioS, Peripherals}; use crate::peripherals::gpio_pins::*; pub const BAUDRATE_USART: u32 = 10_000_000; /// Select display channel -pub fn select_display(gpio: &mut GPIO_S) { +pub fn select_display(gpio: &mut GpioS) { display_chip_select_clear(gpio); } /// Deselect display channel -pub fn deselect_display(gpio: &mut GPIO_S) { +pub fn deselect_display(gpio: &mut GpioS) { display_chip_select_set(gpio); } /// Select flash channel -pub fn select_flash(gpio: &mut GPIO_S) { +pub fn select_flash(gpio: &mut GpioS) { flash_chip_select_clear(gpio); } /// Deselect flash channel -pub fn deselect_flash(gpio: &mut GPIO_S) { +pub fn deselect_flash(gpio: &mut GpioS) { flash_chip_select_set(gpio); } /// Indicate that command is sent -pub fn display_select_command(gpio: &mut GPIO_S) { +pub fn display_select_command(gpio: &mut GpioS) { spi_data_command_clear(gpio); } /// Indicate that data is sent -pub fn display_select_data(gpio: &mut GPIO_S) { +pub fn display_select_data(gpio: &mut GpioS) { spi_data_command_set(gpio); } /// BUSY is on port B, pin [`SPI_BUSY_PIN`]. -pub fn spi_is_busy(gpio: &mut GPIO_S) -> bool { - let portb_din_bits = gpio.portb_din.read().din().bits(); +pub fn spi_is_busy(gpio: &mut GpioS) -> bool { + let portb_din_bits = gpio.portb_din().read().din().bits(); portb_din_bits & (1 << SPI_BUSY_PIN) == (1 << SPI_BUSY_PIN) } @@ -47,15 +47,15 @@ pub fn spi_is_busy(gpio: &mut GPIO_S) -> bool { /// Assumes that clocks are enabled pub fn init_usart(peripherals: &mut Peripherals) { peripherals - .USART0_S - .en + .usart0_s + .en() .write(|w_reg| { w_reg .en().set_bit() }); peripherals - .USART0_S - .ctrl + .usart0_s + .ctrl() .write(|w_reg| { w_reg .sync().enable() @@ -64,8 +64,8 @@ pub fn init_usart(peripherals: &mut Peripherals) { .autotx().clear_bit() }); peripherals - .USART0_S - .frame + .usart0_s + .frame() .write(|w_reg| { w_reg .databits().eight() @@ -77,15 +77,15 @@ pub fn init_usart(peripherals: &mut Peripherals) { let clkdiv = ((19_000_000 - 1)/(2*BAUDRATE_USART)) << 8; peripherals - .USART0_S - .clkdiv - .write(|w_reg| { + .usart0_s + .clkdiv() + .write(|w_reg| unsafe { w_reg - .div().variant(clkdiv) + .div().bits(clkdiv) }); peripherals - .USART0_S - .cmd + .usart0_s + .cmd() .write(|w_reg| { w_reg .masteren().set_bit() @@ -94,35 +94,35 @@ pub fn init_usart(peripherals: &mut Peripherals) { }); // display MOSI peripherals - .GPIO_S - .usart0_txroute - .write(|w_reg| { + .gpio_s + .usart0_txroute() + .write(|w_reg| unsafe { w_reg - .port().variant(2) - .pin().variant(E_MOSI_PIN) + .port().bits(PORT_C) + .pin().bits(E_MOSI_PIN) }); // display MISO peripherals - .GPIO_S - .usart0_rxroute - .write(|w_reg| { + .gpio_s + .usart0_rxroute() + .write(|w_reg| unsafe { w_reg - .port().variant(2) - .pin().variant(E_MISO_PIN) + .port().bits(PORT_C) + .pin().bits(E_MISO_PIN) }); // display SCK peripherals - .GPIO_S - .usart0_clkroute - .write(|w_reg| { + .gpio_s + .usart0_clkroute() + .write(|w_reg| unsafe { w_reg - .port().variant(2) - .pin().variant(E_SCK_PIN) + .port().bits(PORT_C) + .pin().bits(E_SCK_PIN) }); // route enable peripherals - .GPIO_S - .usart0_routeen + .gpio_s + .usart0_routeen() .write(|w_reg| { w_reg .txpen().set_bit() @@ -136,15 +136,15 @@ pub fn init_usart(peripherals: &mut Peripherals) { /// /// At this point USART must be already clocked from elsewhere. pub fn write_to_usart(peripherals: &mut Peripherals, data: u8) -> u8 { - while peripherals.USART0_S.status.read().txbl().bit_is_clear() {} + while peripherals.usart0_s.status().read().txbl().bit_is_clear() {} peripherals - .USART0_S - .txdata - .write(|w_reg| w_reg.txdata().variant(data)); + .usart0_s + .txdata() + .write(|w_reg| unsafe { w_reg.txdata().bits(data) }); - while peripherals.USART0_S.status.read().txc().bit_is_clear() {} + while peripherals.usart0_s.status().read().txc().bit_is_clear() {} - peripherals.USART0_S.rxdata.read().rxdata().bits() + peripherals.usart0_s.rxdata().read().rxdata().bits() } diff --git a/kampela-ui/Cargo.lock b/kampela-ui/Cargo.lock index b5a771e..25b87a5 100644 --- a/kampela-ui/Cargo.lock +++ b/kampela-ui/Cargo.lock @@ -1,24 +1,51 @@ # This file is automatically @generated by Cargo. # It is not intended for manual editing. -version = 3 +version = 4 + +[[package]] +name = "ahash" +version = "0.8.11" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "e89da841a80418a9b391ebaea17f5c112ffaaa96f621d2c285b5174da76b9011" +dependencies = [ + "cfg-if", + "once_cell", + "version_check", + "zerocopy", +] + +[[package]] +name = "aho-corasick" +version = "1.1.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "8e60d3430d3a69478ad0993f19238d2df97c507009a52b3c10addcd7f6bcb916" +dependencies = [ + "memchr", +] + +[[package]] +name = "allocator-api2" +version = "0.2.21" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "683d7910e743518b0e34f1186f92494becacb047c7b6bf616c96772180fef923" [[package]] name = "arrayref" -version = "0.3.7" +version = "0.3.9" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6b4930d2cb77ce62f89ee5d5289b4ac049559b1c45539271f5ed4fdc7db34545" +checksum = "76a2e8124351fda1ef8aaaa3bbd7ebbcb486bbcd4225aca0aa0d84bb2db8fecb" [[package]] name = "arrayvec" -version = "0.7.4" +version = "0.7.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "96d30a06541fbafbc7f82ed10c06164cfbd2c401138f6addd8404629c4b16711" +checksum = "7c02d123df017efcdfbd739ef81735b36c5ba83ec3c59c80a9d7ecc718f92e50" [[package]] name = "autocfg" -version = "1.1.0" +version = "1.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d468802bab17cbc0cc575e9b053f41e72aa36bfa6b7f55e3529ffa43161b97fa" +checksum = "ace50bade8e6234aa140d9a2f552bbee1db4d353f69b8217bc503490fc1a9f26" [[package]] name = "az" @@ -26,12 +53,24 @@ version = "1.2.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "7b7e4c2464d97fe331d41de9d5db0def0a96f4d823b8b32a2efd503578988973" +[[package]] +name = "base16ct" +version = "0.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "4c7f02d4ea65f2c1853089ffd8d2787bdbc63de2f0d29dedbcf8ccdfa0ccd4cf" + [[package]] name = "base58" version = "0.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "6107fe1be6682a68940da878d9e9f5e90ca5745b3dec9fd1bb393c8777d4f581" +[[package]] +name = "base64ct" +version = "1.6.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "8c3c1a368f70d6cf7302d78f8f7093da241fb8e8807c05cc9e51a125895a6d5b" + [[package]] name = "bitvec" version = "1.0.1" @@ -44,15 +83,6 @@ dependencies = [ "wyz", ] -[[package]] -name = "blake2" -version = "0.10.6" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "46502ad458c9a52b69d4d4d32775c788b7a1b85e8bc9d482d92250fc0e3f8efe" -dependencies = [ - "digest", -] - [[package]] name = "blake2b_simd" version = "1.0.2" @@ -81,9 +111,9 @@ checksum = "c3ac9f8b63eca6fd385229b3675f6cc0dc5c8a5c8a54a59d4f52ffd670d87b0c" [[package]] name = "byteorder" -version = "1.4.3" +version = "1.5.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "14c189c53d098945499cdfa7ecc63567cf3886b3332b312a5b4585d8d3a6a610" +checksum = "1fd0f2584146f6f2ef48085050886acf353beff7305ebd1ae69500e27c67f64b" [[package]] name = "cfg-if" @@ -91,17 +121,29 @@ version = "1.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd" +[[package]] +name = "common-path" +version = "1.0.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "2382f75942f4b3be3690fe4f86365e9c853c1587d6ee58212cebf6e2a9ccd101" + +[[package]] +name = "const-oid" +version = "0.9.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "c2459377285ad874054d797f3ccebf984978aa39129f6eafde5cdc8315b612f8" + [[package]] name = "constant_time_eq" -version = "0.3.0" +version = "0.3.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f7144d30dcf0fafbce74250a3963025d8d52177934239851c917d29f1df280c2" +checksum = "7c74b8349d32d297c9134b8c88677813a227df8f779daa29bfc29c183fe3dca6" [[package]] name = "cpufeatures" -version = "0.2.9" +version = "0.2.15" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a17b76ff3a4162b0b27f354a0c87015ddad39d35f9c0c36607a3bdd175dde1f1" +checksum = "0ca741a962e1b0bff6d724a1a0958b686406e853bb14061f218562e1896f95e6" dependencies = [ "libc", ] @@ -112,6 +154,18 @@ version = "0.2.2" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "7a81dae078cea95a014a339291cec439d2f232ebe854a9d672b796c6afafa9b7" +[[package]] +name = "crypto-bigint" +version = "0.5.5" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0dc92fb57ca44df6db8059111ab3af99a63d5d0f8375d9972e319a379c6bab76" +dependencies = [ + "generic-array", + "rand_core", + "subtle", + "zeroize", +] + [[package]] name = "crypto-common" version = "0.1.6" @@ -146,18 +200,48 @@ checksum = "f46882e17999c6cc590af592290432be3bce0428cb0d5f8b6715e4dc7b383eb3" dependencies = [ "proc-macro2", "quote", - "syn 2.0.43", + "syn 2.0.87", +] + +[[package]] +name = "der" +version = "0.7.9" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f55bf8e7b65898637379c1b74eb1551107c8294ed26d855ceb9fd1a09cfc9bc0" +dependencies = [ + "const-oid", + "zeroize", +] + +[[package]] +name = "derive-syn-parse" +version = "0.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d65d7ce8132b7c0e54497a4d9a55a1c2a0912a0d786cf894472ba818fba45762" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.87", ] [[package]] name = "derive_more" -version = "0.99.17" +version = "1.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4fb810d30a7c1953f91334de7244731fc3f3c10d7fe163338a35b9f640960321" +checksum = "4a9b99b9cbbe49445b21764dc0625032a89b145a2642e67603e1c936f5458d05" +dependencies = [ + "derive_more-impl", +] + +[[package]] +name = "derive_more-impl" +version = "1.0.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "cb7330aeadfbe296029522e6c40f315320aba36fc43a5b3632f3795348f3bd22" dependencies = [ "proc-macro2", "quote", - "syn 1.0.109", + "syn 2.0.87", ] [[package]] @@ -167,10 +251,95 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "9ed9a281f7bc9b7576e61468ba615a66a5c8cfdff42420a70aa82701a3b1e292" dependencies = [ "block-buffer", + "const-oid", "crypto-common", "subtle", ] +[[package]] +name = "docify" +version = "0.2.9" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a772b62b1837c8f060432ddcc10b17aae1453ef17617a99bc07789252d2a5896" +dependencies = [ + "docify_macros", +] + +[[package]] +name = "docify_macros" +version = "0.2.9" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "60e6be249b0a462a14784a99b19bf35a667bb5e09de611738bb7362fa4c95ff7" +dependencies = [ + "common-path", + "derive-syn-parse", + "once_cell", + "proc-macro2", + "quote", + "regex", + "syn 2.0.87", + "termcolor", + "toml", + "walkdir", +] + +[[package]] +name = "ecdsa" +version = "0.16.9" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ee27f32b5c5292967d2d4a9d7f1e0b0aed2c15daded5a60300e4abb9d8020bca" +dependencies = [ + "der", + "digest", + "elliptic-curve", + "rfc6979", + "signature", + "spki", +] + +[[package]] +name = "ed25519" +version = "2.2.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "115531babc129696a58c64a4fef0a8bf9e9698629fb97e9e40767d235cfbcd53" +dependencies = [ + "signature", +] + +[[package]] +name = "ed25519-zebra" +version = "4.0.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "7d9ce6874da5d4415896cd45ffbc4d1cfc0c4f9c079427bd870742c30f2f65a9" +dependencies = [ + "curve25519-dalek", + "ed25519", + "hashbrown 0.14.5", + "hex", + "rand_core", + "sha2", + "zeroize", +] + +[[package]] +name = "elliptic-curve" +version = "0.13.8" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "b5e6043086bf7973472e0c7dff2142ea0b680d30e18d9cc40f267efbf222bd47" +dependencies = [ + "base16ct", + "crypto-bigint", + "digest", + "ff", + "generic-array", + "group", + "pkcs8", + "rand_core", + "sec1", + "subtle", + "zeroize", +] + [[package]] name = "embedded-graphics" version = "0.7.1" @@ -217,6 +386,16 @@ version = "0.1.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "cf172ba7bfe5412e03c4dfd7d8e4b5f1e6cd0b7087fd61fa274b73f87ad94854" +[[package]] +name = "ff" +version = "0.13.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ded41244b729663b1e574f1b4fb731469f69f79c17667b5d776b16cda0479449" +dependencies = [ + "rand_core", + "subtle", +] + [[package]] name = "fiat-crypto" version = "0.2.9" @@ -243,9 +422,9 @@ dependencies = [ [[package]] name = "frame-metadata" -version = "16.0.0" +version = "18.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "87cf1549fba25a6fcac22785b61698317d958e96cac72a59102ea45b9ae64692" +checksum = "daaf440c68eb2c3d88e5760fe8c7af3f9fee9181fab6c2f2c4e7cc48dcc40bb8" dependencies = [ "cfg-if", "parity-scale-codec", @@ -260,19 +439,20 @@ checksum = "e6d5a32815ae3f33302d95fdcb2ce17862f8c65363dcfd29360480ba1001fc9c" [[package]] name = "generic-array" -version = "0.14.6" +version = "0.14.7" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "bff49e947297f3312447abdca79f45f4738097cc82b06e72054d2223f601f1b9" +checksum = "85649ca51fd72272d7821adaf274ad91c288277713d9c18820d8499a7ff69e9a" dependencies = [ "typenum", "version_check", + "zeroize", ] [[package]] name = "getrandom" -version = "0.2.8" +version = "0.2.15" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c05aeb6a22b8f62540c194aac980f2115af067bfe15a0734d7277a768d396b31" +checksum = "c4567c8db10ae91089c99af84c68c38da3ec2f087c3f82960bcdbf3656b6f4d7" dependencies = [ "cfg-if", "libc", @@ -288,11 +468,32 @@ dependencies = [ "rand_core", ] +[[package]] +name = "group" +version = "0.13.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f0f9ef7462f7c099f518d754361858f86d8a07af53ba9af0fe635bbccb151a63" +dependencies = [ + "ff", + "rand_core", + "subtle", +] + [[package]] name = "hashbrown" version = "0.14.5" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "e5274423e17b7c9fc20b6e7e208532f9b19825d82dfd615708b70edd83df41f1" +dependencies = [ + "ahash", + "allocator-api2", +] + +[[package]] +name = "hashbrown" +version = "0.15.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "3a9bfc1af68b1726ea47d3d5109de126281def866b33970e10fbab11b5dafab3" [[package]] name = "hex" @@ -322,12 +523,12 @@ dependencies = [ [[package]] name = "indexmap" -version = "2.4.0" +version = "2.6.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "93ead53efc7ea8ed3cfb0c79fc8023fbb782a5432b52830b6518941cebe6505c" +checksum = "707907fe3c25f5424cce2cb7e1cbcafee6bdbe735ca90ef77c29e84591e5b9da" dependencies = [ "equivalent", - "hashbrown", + "hashbrown 0.15.1", ] [[package]] @@ -339,6 +540,18 @@ dependencies = [ "num-traits", ] +[[package]] +name = "k256" +version = "0.13.4" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f6e3919bbaa2945715f0bb6d3934a173d1e9a59ac23767fbaaef277265a7411b" +dependencies = [ + "cfg-if", + "ecdsa", + "elliptic-curve", + "sha2", +] + [[package]] name = "kampela-display-common" version = "0.1.0" @@ -364,33 +577,33 @@ dependencies = [ [[package]] name = "keccak" -version = "0.1.3" +version = "0.1.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3afef3b6eff9ce9d8ff9b3601125eec7f0c8cbac7abd14f355d053fa56c98768" +checksum = "ecc2af9a1119c51f12a14607e783cb977bde58bc069ff0c3da1095e635d70654" dependencies = [ "cpufeatures", ] [[package]] name = "lazy_static" -version = "1.4.0" +version = "1.5.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e2abad23fbc42b3700f2f279844dc832adb2b2eb069b2df918f455c4e18cc646" +checksum = "bbd2bcb4c963f2ddae06a2efc7e9f3591312473c50c6685e1f298068316e66fe" dependencies = [ "spin", ] [[package]] name = "libc" -version = "0.2.141" +version = "0.2.164" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3304a64d199bb964be99741b7a14d26972741915b3649639149b2479bb46f4b5" +checksum = "433bfe06b8c75da9b2e3fbea6e5329ff87748f0b144ef75306e674c3f6f7c13f" [[package]] name = "memchr" -version = "2.5.0" +version = "2.7.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "2dffe52ecf27772e601905b7522cb4ef790d2cc203488bbd0e2fe85fcb74566d" +checksum = "78ca9ab1a0babb1e7d5695e3530886289c18cf2f87ec19a575a0abdce112e3a3" [[package]] name = "merlin" @@ -413,30 +626,29 @@ checksum = "bc4010833aea396656c2f91ee704d51a6f1329ec2ab56ffd00bfd56f7481ea94" [[package]] name = "mnemonic-external" version = "0.1.0" -source = "git+https://github.com/Alzymologist/mnemonic-external#ac8b4f027adec591ae16a4e284ca25c0ffda6c3d" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "acd8b607d24e1721a79eb4e30054fe776bf3956a87bd57f59c15fa1f72ad8721" dependencies = [ - "bitvec", "sha2", + "zeroize", ] [[package]] name = "num-bigint" -version = "0.4.4" +version = "0.4.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "608e7659b5c3d7cba262d894801b9ec9d00de989e8a82bd4bef91d08da45cdc0" +checksum = "a5e44f723f1133c9deac646763579fdb3ac745e418f2a7af9cd0c431da1f20b9" dependencies = [ - "autocfg", "num-integer", "num-traits", ] [[package]] name = "num-integer" -version = "0.1.45" +version = "0.1.46" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "225d3389fb3509a24c93f5c29eb6bde2586b98d9f016636dff58d7c6f7569cd9" +checksum = "7969661fd2958a5cb096e56c8e1ad0444ac2bbcd0061bd28660485a44879858f" dependencies = [ - "autocfg", "num-traits", ] @@ -455,29 +667,36 @@ version = "0.1.3" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "41af26158b0f5530f7b79955006c2727cd23d0d8e7c3109dc316db0a919784dd" +[[package]] +name = "once_cell" +version = "1.20.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "1261fe7e33c73b354eab43b1273a57c8f967d0391e80353e51f764ac02cf6775" + [[package]] name = "parity-scale-codec" -version = "3.6.12" +version = "3.7.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "306800abfa29c7f16596b5970a588435e3d5b3149683d00c12b699cc19f895ee" +checksum = "8be4817d39f3272f69c59fe05d0535ae6456c2dc2fa1ba02910296c7e0a5c590" dependencies = [ "arrayvec", "bitvec", "byte-slice-cast", "impl-trait-for-tuples", "parity-scale-codec-derive", + "rustversion", ] [[package]] name = "parity-scale-codec-derive" -version = "3.6.12" +version = "3.7.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d830939c76d294956402033aee57a6da7b438f2294eb94864c37b0569053a42c" +checksum = "8781a75c6205af67215f382092b6e0a4ff3734798523e69073d4bcd294ec767b" dependencies = [ "proc-macro-crate", "proc-macro2", "quote", - "syn 1.0.109", + "syn 2.0.87", ] [[package]] @@ -489,17 +708,30 @@ dependencies = [ "digest", ] +[[package]] +name = "pkcs8" +version = "0.10.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f950b2377845cebe5cf8b5165cb3cc1a5e0fa5cfa3e1f7f55707d8fd82e0a7b7" +dependencies = [ + "der", + "spki", +] + [[package]] name = "ppv-lite86" -version = "0.2.17" +version = "0.2.20" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5b40af805b3121feab8a3c29f04d8ad262fa8e0561883e7653e024ae4479e6de" +checksum = "77957b295656769bb8ad2b6a6b09d897d94f05c41b069aede1fcdaa675eaea04" +dependencies = [ + "zerocopy", +] [[package]] name = "primitive-types" -version = "0.12.2" +version = "0.13.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "0b34d9fd68ae0b74a41b21c03c2f62847aa0ffea044eee893b4c140b37e244e2" +checksum = "d15600a7d856470b7d278b3fe0e311fe28c2526348549f8ef2ff7db3299c87f5" dependencies = [ "fixed-hash", "uint", @@ -507,18 +739,18 @@ dependencies = [ [[package]] name = "proc-macro-crate" -version = "3.1.0" +version = "3.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6d37c51ca738a55da99dc0c4a34860fd675453b8b36209178c2249bb13651284" +checksum = "8ecf48c7ca261d60b74ab1a7b20da18bede46776b2e55535cb958eb595c5fa7b" dependencies = [ "toml_edit", ] [[package]] name = "proc-macro2" -version = "1.0.86" +version = "1.0.89" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5e719e8df665df0d1c8fbfd238015744736151d4445ec0836b8e628aae103b77" +checksum = "f139b0662de085916d1fb67d2b4169d1addddda1919e696f3252b740b629986e" dependencies = [ "unicode-ident", ] @@ -531,9 +763,9 @@ checksum = "d0e2c0bf8be8a1c4a4f48973dabf26943f05da2bfc2d3180aae62409dbba6f0c" [[package]] name = "quote" -version = "1.0.33" +version = "1.0.37" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5267fca4496028628a95160fc423a33e8b2e6af8a5302579e322e4b520293cae" +checksum = "b5b9d34b8991d19d98081b46eacdd8eb58c6f2b201139f7c5f643cc155a633af" dependencies = [ "proc-macro2", ] @@ -576,43 +808,72 @@ dependencies = [ [[package]] name = "regex" -version = "1.10.6" +version = "1.11.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4219d74c6b67a3654a9fbebc4b419e22126d13d2f3c4a07ee0cb61ff79a79619" +checksum = "b544ef1b4eac5dc2db33ea63606ae9ffcfac26c1416a2806ae0bf5f56b201191" dependencies = [ + "aho-corasick", + "memchr", "regex-automata", "regex-syntax", ] [[package]] name = "regex-automata" -version = "0.4.7" +version = "0.4.9" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "38caf58cc5ef2fed281f89292ef23f6365465ed9a41b7a7754eb4e26496c92df" +checksum = "809e8dc61f6de73b46c85f4c96486310fe304c434cfa43669d7b40f711150908" dependencies = [ + "aho-corasick", + "memchr", "regex-syntax", ] [[package]] name = "regex-syntax" -version = "0.8.4" +version = "0.8.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7a66a03ae7c801facd77a29370b4faec201768915ac14a721ba36f20bc9c209b" +checksum = "2b15c43186be67a4fd63bee50d0303afffcef381492ebe2c5d87f324e1b8815c" [[package]] -name = "rustc_version" +name = "rfc6979" version = "0.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "bfa0f585226d2e68097d4f95d113b15b83a82e819ab25717ec0590d9584ef366" +checksum = "f8dd2a808d456c4a54e300a23e9f5a67e122c3024119acbfd73e3bf664491cb2" +dependencies = [ + "hmac", + "subtle", +] + +[[package]] +name = "rustc_version" +version = "0.4.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "cfcb3a22ef46e85b45de6ee7e79d063319ebb6594faafcf1c225ea92ab6e9b92" dependencies = [ "semver", ] +[[package]] +name = "rustversion" +version = "1.0.18" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0e819f2bc632f285be6d7cd36e25940d45b2391dd6d9b939e79de557f7014248" + +[[package]] +name = "same-file" +version = "1.0.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "93fc1dc3aaa9bfed95e02e6eadabb4baf7e3078b0bd1b4d7b6b0b68378900502" +dependencies = [ + "winapi-util", +] + [[package]] name = "scale-info" -version = "2.11.3" +version = "2.11.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "eca070c12893629e2cc820a9761bedf6ce1dcddc9852984d1dc734b8bd9bd024" +checksum = "1aa7ffc1c0ef49b0452c6e2986abf2b07743320641ffd5fc63d552458e3b779b" dependencies = [ "cfg-if", "derive_more", @@ -622,14 +883,14 @@ dependencies = [ [[package]] name = "scale-info-derive" -version = "2.11.3" +version = "2.11.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "2d35494501194174bda522a32605929eefc9ecf7e0a326c26db1fdd85881eb62" +checksum = "46385cc24172cf615450267463f937c10072516359b3ff1cb24228a4a08bf951" dependencies = [ "proc-macro-crate", "proc-macro2", "quote", - "syn 1.0.109", + "syn 2.0.87", ] [[package]] @@ -649,12 +910,55 @@ dependencies = [ "zeroize", ] +[[package]] +name = "sec1" +version = "0.7.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d3e97a565f76233a6003f9f5c54be1d9c5bdfa3eccfb189469f11ec4901c47dc" +dependencies = [ + "base16ct", + "der", + "generic-array", + "pkcs8", + "subtle", + "zeroize", +] + [[package]] name = "semver" version = "1.0.23" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "61697e0a1c7e512e84a621326239844a24d8207b4669b41bc18b32ea5cbf988b" +[[package]] +name = "serde" +version = "1.0.215" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "6513c1ad0b11a9376da888e3e0baa0077f1aed55c17f50e7b2397136129fb88f" +dependencies = [ + "serde_derive", +] + +[[package]] +name = "serde_derive" +version = "1.0.215" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ad1e866f866923f252f05c889987993144fb74e722403468a4ebd70c3cd756c0" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.87", +] + +[[package]] +name = "serde_spanned" +version = "0.6.8" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "87607cb1398ed59d48732e575a4c28a7a8ebf2454b964fe3f224f2afc07909e1" +dependencies = [ + "serde", +] + [[package]] name = "sha2" version = "0.10.8" @@ -668,20 +972,31 @@ dependencies = [ [[package]] name = "sha3" -version = "0.10.6" +version = "0.10.8" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "bdf0c33fae925bdc080598b84bc15c55e7b9a4a43b3c704da051f977469691c9" +checksum = "75872d278a8f37ef87fa0ddbda7802605cb18344497949862c0d4dcb291eba60" dependencies = [ "digest", "keccak", ] +[[package]] +name = "signature" +version = "2.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "77549399552de45a898a580c1b41d445bf730df867cc44e6c0233bbc4b8329de" +dependencies = [ + "digest", + "rand_core", +] + [[package]] name = "sp-arithmetic" -version = "25.0.0" +version = "26.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "910c07fa263b20bf7271fdd4adcb5d3217dfdac14270592e0780223542e7e114" +checksum = "46d0d0a4c591c421d3231ddd5e27d828618c24456d51445d21a1f79fcee97c23" dependencies = [ + "docify", "integer-sqrt", "num-traits", "parity-scale-codec", @@ -712,9 +1027,19 @@ checksum = "12f8ee986414b0a9ad741776762f4083cd3a5128449b982a3919c4df36874834" [[package]] name = "spin" -version = "0.5.2" +version = "0.9.8" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6e63cff320ae2c57904679ba7cb63280a3dc4613885beafb148ee7bf9aa9042d" +checksum = "6980e8d7511241f8acf4aebddbb1ff938df5eebe98691418c4468d0b72a96a67" + +[[package]] +name = "spki" +version = "0.7.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d91ed6c858b01f942cd56b37a94b3e0a1798290327d1236e4d9cf4eaca44d29d" +dependencies = [ + "base64ct", + "der", +] [[package]] name = "static_assertions" @@ -725,11 +1050,14 @@ checksum = "a2eb9349b6444b326872e140eb1cf5e7c522154d69e7a0ffb0fb81c06b37543f" [[package]] name = "substrate-crypto-light" version = "0.1.0" -source = "git+https://github.com/Alzymologist/substrate-crypto-light#406354cf2309f98699ef5efe66699fc098a3ee19" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "86eaa081c10ed391947506525a50da570841ccf93f83a642ff91f36732e91b51" dependencies = [ "base58", "blake2b_simd", + "ed25519-zebra", "hmac", + "k256", "lazy_static", "parity-scale-codec", "pbkdf2", @@ -742,12 +1070,11 @@ dependencies = [ [[package]] name = "substrate_parser" -version = "0.6.1" -source = "git+https://github.com/Alzymologist/substrate-parser?rev=65de6a4fe207a64f9857247af4e9f7509fa6de4f#65de6a4fe207a64f9857247af4e9f7509fa6de4f" +version = "0.7.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "b7608864a21e2c356727f7ac0206252fb2c1cc4cee7c8539216528c6b54efca5" dependencies = [ - "base58", "bitvec", - "blake2", "external-memory-tools", "frame-metadata", "hex", @@ -757,13 +1084,14 @@ dependencies = [ "scale-info", "sp-arithmetic", "sp-crypto-hashing", + "substrate-crypto-light", ] [[package]] name = "subtle" -version = "2.5.0" +version = "2.6.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "81cdd64d312baedb58e21336b31bc043b77e01cc99033ce76ef539f78e965ebc" +checksum = "13c2bddecc57b384dee18652358fb23172facb8a2c51ccc10d74c157bdea3292" [[package]] name = "syn" @@ -778,9 +1106,9 @@ dependencies = [ [[package]] name = "syn" -version = "2.0.43" +version = "2.0.87" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ee659fb5f3d355364e1f3e5bc10fb82068efbf824a1e9d1c9504244a6469ad53" +checksum = "25aa4ce346d03a6dcd68dd8b4010bcb74e54e62c90c573f394c46eae99aba32d" dependencies = [ "proc-macro2", "quote", @@ -793,19 +1121,45 @@ version = "1.0.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "55937e1799185b12863d447f42597ed69d9928686b8d88a1df17376a097d8369" +[[package]] +name = "termcolor" +version = "1.4.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "06794f8f6c5c898b3275aebefa6b8a1cb24cd2c6c79397ab15774837a0bc5755" +dependencies = [ + "winapi-util", +] + +[[package]] +name = "toml" +version = "0.8.19" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a1ed1f98e3fdc28d6d910e6737ae6ab1a93bf1985935a1193e68f93eeb68d24e" +dependencies = [ + "serde", + "serde_spanned", + "toml_datetime", + "toml_edit", +] + [[package]] name = "toml_datetime" version = "0.6.8" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "0dd7358ecb8fc2f8d014bf86f6f638ce72ba252a2c3a2572f2a795f1d23efb41" +dependencies = [ + "serde", +] [[package]] name = "toml_edit" -version = "0.21.1" +version = "0.22.22" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6a8534fd7f78b5405e860340ad6575217ce99f38d4d5c8f2442cb5ecb50090e1" +checksum = "4ae48d6208a266e853d946088ed816055e556cc6028c5e8e2b84d9fa5dd7c7f5" dependencies = [ "indexmap", + "serde", + "serde_spanned", "toml_datetime", "winnow", ] @@ -823,15 +1177,15 @@ dependencies = [ [[package]] name = "typenum" -version = "1.16.0" +version = "1.17.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "497961ef93d974e23eb6f433eb5fe1b7930b659f06d12dec6fc44a8f554c0bba" +checksum = "42ff0bf0c66b8238c6f3b578df37d0b7848e55df8577b3f74f92a69acceeb825" [[package]] name = "uint" -version = "0.9.5" +version = "0.10.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "76f64bba2c53b04fcab63c01a7d7427eadc821e3bc48c34dc9ba29c501164b52" +checksum = "909988d098b2f738727b161a106cfc7cab00c539c2687a8836f8e565976fb53e" dependencies = [ "byteorder", "crunchy", @@ -841,15 +1195,25 @@ dependencies = [ [[package]] name = "unicode-ident" -version = "1.0.8" +version = "1.0.13" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e5464a87b239f13a63a501f2701565754bae92d243d4bb7eb12f6d57d2269bf4" +checksum = "e91b56cd4cadaeb79bbf1a5645f6b4f8dc5bde8834ad5894a8db35fda9efa1fe" [[package]] name = "version_check" -version = "0.9.4" +version = "0.9.5" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0b928f33d975fc6ad9f86c8f283853ad26bdd5b10b7f1542aa2fa15e2289105a" + +[[package]] +name = "walkdir" +version = "2.5.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "49874b5167b65d7193b8aba1567f5c7d93d001cafc34600cee003eda787e483f" +checksum = "29790946404f91d9c5d06f9874efddea1dc06c5efe94541a7d6863108e3a5e4b" +dependencies = [ + "same-file", + "winapi-util", +] [[package]] name = "wasi" @@ -857,11 +1221,93 @@ version = "0.11.0+wasi-snapshot-preview1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "9c8d87e72b64a3b4db28d11ce29237c246188f4f51057d65a7eab63b7987e423" +[[package]] +name = "winapi-util" +version = "0.1.9" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "cf221c93e13a30d793f7645a0e7762c55d169dbb0a49671918a2319d289b10bb" +dependencies = [ + "windows-sys", +] + +[[package]] +name = "windows-sys" +version = "0.59.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "1e38bc4d79ed67fd075bcc251a1c39b32a1776bbe92e5bef1f0bf1f8c531853b" +dependencies = [ + "windows-targets", +] + +[[package]] +name = "windows-targets" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "9b724f72796e036ab90c1021d4780d4d3d648aca59e491e6b98e725b84e99973" +dependencies = [ + "windows_aarch64_gnullvm", + "windows_aarch64_msvc", + "windows_i686_gnu", + "windows_i686_gnullvm", + "windows_i686_msvc", + "windows_x86_64_gnu", + "windows_x86_64_gnullvm", + "windows_x86_64_msvc", +] + +[[package]] +name = "windows_aarch64_gnullvm" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "32a4622180e7a0ec044bb555404c800bc9fd9ec262ec147edd5989ccd0c02cd3" + +[[package]] +name = "windows_aarch64_msvc" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "09ec2a7bb152e2252b53fa7803150007879548bc709c039df7627cabbd05d469" + +[[package]] +name = "windows_i686_gnu" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "8e9b5ad5ab802e97eb8e295ac6720e509ee4c243f69d781394014ebfe8bbfa0b" + +[[package]] +name = "windows_i686_gnullvm" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0eee52d38c090b3caa76c563b86c3a4bd71ef1a819287c19d586d7334ae8ed66" + +[[package]] +name = "windows_i686_msvc" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "240948bc05c5e7c6dabba28bf89d89ffce3e303022809e73deaefe4f6ec56c66" + +[[package]] +name = "windows_x86_64_gnu" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "147a5c80aabfbf0c7d901cb5895d1de30ef2907eb21fbbab29ca94c5b08b1a78" + +[[package]] +name = "windows_x86_64_gnullvm" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "24d5b23dc417412679681396f2b49f3de8c1473deb516bd34410872eff51ed0d" + +[[package]] +name = "windows_x86_64_msvc" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "589f6da84c646204747d1270a2a5661ea66ed1cced2631d546fdfb155959f9ec" + [[package]] name = "winnow" -version = "0.5.40" +version = "0.6.20" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f593a95398737aeed53e489c785df13f3618e41dbcd6718c6addbf1395aa6876" +checksum = "36c1fec1a2bb5866f07c25f68c26e565c4c200aebb96d7e55710c19d3e8ac49b" dependencies = [ "memchr", ] @@ -875,6 +1321,27 @@ dependencies = [ "tap", ] +[[package]] +name = "zerocopy" +version = "0.7.35" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "1b9b4fd18abc82b8136838da5d50bae7bdea537c574d8dc1a34ed098d6c166f0" +dependencies = [ + "byteorder", + "zerocopy-derive", +] + +[[package]] +name = "zerocopy-derive" +version = "0.7.35" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "fa4f8080344d4671fb4e831a13ad1e68092748387dfc4f55e356242fae12ce3e" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.87", +] + [[package]] name = "zeroize" version = "1.8.1" @@ -892,5 +1359,5 @@ checksum = "ce36e65b0d2999d2aafac989fb249189a141aee1f53c612c1f37d72631959f69" dependencies = [ "proc-macro2", "quote", - "syn 2.0.43", + "syn 2.0.87", ] diff --git a/kampela-ui/Cargo.toml b/kampela-ui/Cargo.toml index 7a872c3..f9a174b 100644 --- a/kampela-ui/Cargo.toml +++ b/kampela-ui/Cargo.toml @@ -9,11 +9,11 @@ embedded-text = {version = "0.5.0", default-features = false} hex = {version = "0.4.3", default-features = false, features = ["alloc"]} kampela-display-common = { path = "../kampela-display-common" } lazy_static = { version = "1.4.0", default_features = false } -mnemonic-external = {git = "https://github.com/Alzymologist/mnemonic-external", default-features = false} +mnemonic-external = { version = "0.1.0", default-features = false } qrcodegen-no-heap = { version = "1.8.1" } rand = { version = "0.8.5", default_features = false } -substrate-crypto-light = {git = "https://github.com/Alzymologist/substrate-crypto-light", default-features = false, features = ["sr25519"]} -substrate_parser = {git = "https://github.com/Alzymologist/substrate-parser", default-features = false, rev = "65de6a4fe207a64f9857247af4e9f7509fa6de4f"} +substrate-crypto-light = { version = "0.1.0", default-features = false, features = ["sr25519"] } +substrate_parser = { version = "0.7.0", default-features = false} #ux = { version = "0.1.3", default_features = false } [features] diff --git a/kampela-ui/simulator/Cargo.lock b/kampela-ui/simulator/Cargo.lock index 01b2eb3..d4a01c3 100644 --- a/kampela-ui/simulator/Cargo.lock +++ b/kampela-ui/simulator/Cargo.lock @@ -1,6 +1,6 @@ # This file is automatically @generated by Cargo. # It is not intended for manual editing. -version = 3 +version = 4 [[package]] name = "adler" @@ -26,6 +26,15 @@ dependencies = [ "zerocopy", ] +[[package]] +name = "aho-corasick" +version = "1.1.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "8e60d3430d3a69478ad0993f19238d2df97c507009a52b3c10addcd7f6bcb916" +dependencies = [ + "memchr", +] + [[package]] name = "allocator-api2" version = "0.2.20" @@ -34,47 +43,48 @@ checksum = "45862d1c77f2228b9e10bc609d5bc203d86ebc9b87ad8d5d5167a6c9abf739d9" [[package]] name = "anstream" -version = "0.6.13" +version = "0.6.18" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d96bd03f33fe50a863e394ee9718a706f988b9079b20c3784fb726e7678b62fb" +checksum = "8acc5369981196006228e28809f761875c0327210a891e941f4c683b3a99529b" dependencies = [ "anstyle", "anstyle-parse", "anstyle-query", "anstyle-wincon", "colorchoice", + "is_terminal_polyfill", "utf8parse", ] [[package]] name = "anstyle" -version = "1.0.6" +version = "1.0.10" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "8901269c6307e8d93993578286ac0edf7f195079ffff5ebdeea6a59ffb7e36bc" +checksum = "55cc3b69f167a1ef2e161439aa98aed94e6028e5f9a59be9a6ffb47aef1651f9" [[package]] name = "anstyle-parse" -version = "0.2.3" +version = "0.2.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c75ac65da39e5fe5ab759307499ddad880d724eed2f6ce5b5e8a26f4f387928c" +checksum = "3b2d16507662817a6a20a9ea92df6652ee4f94f914589377d69f3b21bc5798a9" dependencies = [ "utf8parse", ] [[package]] name = "anstyle-query" -version = "1.0.2" +version = "1.1.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e28923312444cdd728e4738b3f9c9cac739500909bb3d3c94b43551b16517648" +checksum = "79947af37f4177cfead1110013d678905c37501914fba0efea834c3fe9a8d60c" dependencies = [ "windows-sys", ] [[package]] name = "anstyle-wincon" -version = "3.0.2" +version = "3.0.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1cd54b81ec8d6180e24654d0b371ad22fc3dd083b6ff8ba325b72e00c87660a7" +checksum = "2109dbce0e72be3ec00bed26e6a7479ca384ad226efdd66db8fa2e3a38c83125" dependencies = [ "anstyle", "windows-sys", @@ -82,15 +92,15 @@ dependencies = [ [[package]] name = "arrayref" -version = "0.3.7" +version = "0.3.9" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6b4930d2cb77ce62f89ee5d5289b4ac049559b1c45539271f5ed4fdc7db34545" +checksum = "76a2e8124351fda1ef8aaaa3bbd7ebbcb486bbcd4225aca0aa0d84bb2db8fecb" [[package]] name = "arrayvec" -version = "0.7.4" +version = "0.7.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "96d30a06541fbafbc7f82ed10c06164cfbd2c401138f6addd8404629c4b16711" +checksum = "7c02d123df017efcdfbd739ef81735b36c5ba83ec3c59c80a9d7ecc718f92e50" [[package]] name = "autocfg" @@ -98,14 +108,14 @@ version = "0.1.8" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "0dde43e75fd43e8a1bf86103336bc699aa8d17ad1be60c76c0bdfd4828e19b78" dependencies = [ - "autocfg 1.1.0", + "autocfg 1.4.0", ] [[package]] name = "autocfg" -version = "1.1.0" +version = "1.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d468802bab17cbc0cc575e9b053f41e72aa36bfa6b7f55e3529ffa43161b97fa" +checksum = "ace50bade8e6234aa140d9a2f552bbee1db4d353f69b8217bc503490fc1a9f26" [[package]] name = "az" @@ -155,15 +165,6 @@ dependencies = [ "wyz", ] -[[package]] -name = "blake2" -version = "0.10.6" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "46502ad458c9a52b69d4d4d32775c788b7a1b85e8bc9d482d92250fc0e3f8efe" -dependencies = [ - "digest", -] - [[package]] name = "blake2b_simd" version = "1.0.2" @@ -192,9 +193,9 @@ checksum = "c3ac9f8b63eca6fd385229b3675f6cc0dc5c8a5c8a54a59d4f52ffd670d87b0c" [[package]] name = "bytemuck" -version = "1.14.3" +version = "1.20.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a2ef034f05691a48569bd920a96c81b9d91bbad1ab5ac7c4616c1f6ef36cb79f" +checksum = "8b37c88a63ffd85d15b406896cc343916d7cf57838a847b3a6f2ca5d39a5695a" [[package]] name = "byteorder" @@ -216,9 +217,9 @@ checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd" [[package]] name = "clap" -version = "4.5.2" +version = "4.5.21" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b230ab84b0ffdf890d5a10abdbc8b83ae1c4918275daea1ab8801f71536b2651" +checksum = "fb3b4b9e5a7c7514dfa52869339ee98b3156b0bfb4e8a77c4ff4babb64b1604f" dependencies = [ "clap_builder", "clap_derive", @@ -226,9 +227,9 @@ dependencies = [ [[package]] name = "clap_builder" -version = "4.5.2" +version = "4.5.21" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ae129e2e766ae0ec03484e609954119f123cc1fe650337e155d03b022f24f7b4" +checksum = "b17a95aa67cc7b5ebd32aa5370189aa0d79069ef1c64ce893bd30fb24bff20ec" dependencies = [ "anstream", "anstyle", @@ -238,21 +239,21 @@ dependencies = [ [[package]] name = "clap_derive" -version = "4.5.0" +version = "4.5.18" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "307bc0538d5f0f83b8248db3087aa92fe504e4691294d0c96c0eabc33f47ba47" +checksum = "4ac6a0c7b1a9e9a5186361f67dfa1b88213572f427fb9ab038efb2bd8c582dab" dependencies = [ "heck", "proc-macro2", "quote", - "syn 2.0.52", + "syn 2.0.87", ] [[package]] name = "clap_lex" -version = "0.7.0" +version = "0.7.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "98cc8fbded0c607b7ba9dd60cd98df59af97e84d24e49c8557331cfc26d301ce" +checksum = "afb84c814227b90d6895e01398aee0d8033c00e7466aca416fb6a8e0eb19d8a7" [[package]] name = "cloudabi" @@ -271,9 +272,15 @@ checksum = "3d7b894f5411737b7867f4827955924d7c254fc9f4d91a6aad6b097804b1018b" [[package]] name = "colorchoice" +version = "1.0.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "5b63caa9aa9397e2d9480a9b13673856c78d8ac123288526c37d7839f2a86990" + +[[package]] +name = "common-path" version = "1.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "acbf1af155f9b9ef647e42cdc158db4b64a1b61f743629225fde6f3e0be2a7c7" +checksum = "2382f75942f4b3be3690fe4f86365e9c853c1587d6ee58212cebf6e2a9ccd101" [[package]] name = "const-oid" @@ -283,24 +290,24 @@ checksum = "c2459377285ad874054d797f3ccebf984978aa39129f6eafde5cdc8315b612f8" [[package]] name = "constant_time_eq" -version = "0.3.0" +version = "0.3.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f7144d30dcf0fafbce74250a3963025d8d52177934239851c917d29f1df280c2" +checksum = "7c74b8349d32d297c9134b8c88677813a227df8f779daa29bfc29c183fe3dca6" [[package]] name = "cpufeatures" -version = "0.2.12" +version = "0.2.15" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "53fe5e26ff1b7aef8bca9c6080520cfb8d9333c7568e1829cef191a9723e5504" +checksum = "0ca741a962e1b0bff6d724a1a0958b686406e853bb14061f218562e1896f95e6" dependencies = [ "libc", ] [[package]] name = "crc32fast" -version = "1.4.0" +version = "1.4.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b3855a8a784b474f333699ef2bbca9db2c4a1f6d9088a90a2d25b1eb53111eaa" +checksum = "a97769d94ddab943e4510d138150169a2758b5ef3eb191a9ee688de3e23ef7b3" dependencies = [ "cfg-if 1.0.0", ] @@ -326,9 +333,9 @@ dependencies = [ [[package]] name = "crossbeam-utils" -version = "0.8.19" +version = "0.8.20" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "248e3bacc7dc6baa3b21e405ee045c3047101a49145e7e9eca583ab4c2ca5345" +checksum = "22ec99545bb0ed0ea7bb9b8e1e9122ea386ff8a48c0922e43f36d45ab09e0e80" [[package]] name = "crunchy" @@ -382,7 +389,7 @@ checksum = "f46882e17999c6cc590af592290432be3bce0428cb0d5f8b6715e4dc7b383eb3" dependencies = [ "proc-macro2", "quote", - "syn 2.0.52", + "syn 2.0.87", ] [[package]] @@ -405,15 +412,35 @@ dependencies = [ "zeroize", ] +[[package]] +name = "derive-syn-parse" +version = "0.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d65d7ce8132b7c0e54497a4d9a55a1c2a0912a0d786cf894472ba818fba45762" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.87", +] + [[package]] name = "derive_more" -version = "0.99.17" +version = "1.0.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "4a9b99b9cbbe49445b21764dc0625032a89b145a2642e67603e1c936f5458d05" +dependencies = [ + "derive_more-impl", +] + +[[package]] +name = "derive_more-impl" +version = "1.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4fb810d30a7c1953f91334de7244731fc3f3c10d7fe163338a35b9f640960321" +checksum = "cb7330aeadfbe296029522e6c40f315320aba36fc43a5b3632f3795348f3bd22" dependencies = [ "proc-macro2", "quote", - "syn 1.0.109", + "syn 2.0.87", ] [[package]] @@ -428,6 +455,33 @@ dependencies = [ "subtle", ] +[[package]] +name = "docify" +version = "0.2.9" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a772b62b1837c8f060432ddcc10b17aae1453ef17617a99bc07789252d2a5896" +dependencies = [ + "docify_macros", +] + +[[package]] +name = "docify_macros" +version = "0.2.9" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "60e6be249b0a462a14784a99b19bf35a667bb5e09de611738bb7362fa4c95ff7" +dependencies = [ + "common-path", + "derive-syn-parse", + "once_cell", + "proc-macro2", + "quote", + "regex", + "syn 2.0.87", + "termcolor", + "toml", + "walkdir", +] + [[package]] name = "ecdsa" version = "0.16.9" @@ -459,7 +513,7 @@ checksum = "7d9ce6874da5d4415896cd45ffbc4d1cfc0c4f9c079427bd870742c30f2f65a9" dependencies = [ "curve25519-dalek", "ed25519", - "hashbrown", + "hashbrown 0.14.5", "hex", "rand_core 0.6.4", "sha2", @@ -468,9 +522,9 @@ dependencies = [ [[package]] name = "either" -version = "1.10.0" +version = "1.13.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "11157ac094ffbdde99aa67b23417ebdd801842852b500e395a45a9c0aac03e4a" +checksum = "60b1af1c220855b6ceac025d3f6ecdd2b7c4894bfe9cd9bda4fbb4bc7c0d4cf0" [[package]] name = "elliptic-curve" @@ -585,9 +639,9 @@ dependencies = [ [[package]] name = "frame-metadata" -version = "16.0.0" +version = "18.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "87cf1549fba25a6fcac22785b61698317d958e96cac72a59102ea45b9ae64692" +checksum = "daaf440c68eb2c3d88e5760fe8c7af3f9fee9181fab6c2f2c4e7cc48dcc40bb8" dependencies = [ "cfg-if 1.0.0", "parity-scale-codec", @@ -619,9 +673,9 @@ dependencies = [ [[package]] name = "getrandom" -version = "0.2.12" +version = "0.2.15" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "190092ea657667030ac6a35e305e62fc4dd69fd98ac98631e5d3a2b1575a12b5" +checksum = "c4567c8db10ae91089c99af84c68c38da3ec2f087c3f82960bcdbf3656b6f4d7" dependencies = [ "cfg-if 1.0.0", "libc", @@ -660,19 +714,25 @@ dependencies = [ [[package]] name = "hashbrown" -version = "0.14.3" +version = "0.14.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "290f1a1d9242c78d09ce40a5e87e7554ee637af1351968159f4952f028f75604" +checksum = "e5274423e17b7c9fc20b6e7e208532f9b19825d82dfd615708b70edd83df41f1" dependencies = [ "ahash", "allocator-api2", ] +[[package]] +name = "hashbrown" +version = "0.15.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "3a9bfc1af68b1726ea47d3d5109de126281def866b33970e10fbab11b5dafab3" + [[package]] name = "heck" -version = "0.4.1" +version = "0.5.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "95505c38b4572b2d910cecb0281560f54b440a19336cbbcb27bf6ce6adc6f5a8" +checksum = "2304e00983f87ffb38b55b444b5e3b60a884b5d30c0fca7d82fe33449bbe55ea" [[package]] name = "hex" @@ -721,12 +781,12 @@ dependencies = [ [[package]] name = "indexmap" -version = "2.2.5" +version = "2.6.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7b0b929d511467233429c45a44ac1dcaa21ba0f5ba11e4879e6ed28ddb4f9df4" +checksum = "707907fe3c25f5424cce2cb7e1cbcafee6bdbe735ca90ef77c29e84591e5b9da" dependencies = [ "equivalent", - "hashbrown", + "hashbrown 0.15.1", ] [[package]] @@ -738,6 +798,12 @@ dependencies = [ "num-traits", ] +[[package]] +name = "is_terminal_polyfill" +version = "1.70.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "7943c866cc5cd64cbc25b2e01621d07fa8eb2a1a23160ee81ce38704e97b8ecf" + [[package]] name = "jpeg-decoder" version = "0.1.22" @@ -806,24 +872,24 @@ dependencies = [ [[package]] name = "lazy_static" -version = "1.4.0" +version = "1.5.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e2abad23fbc42b3700f2f279844dc832adb2b2eb069b2df918f455c4e18cc646" +checksum = "bbd2bcb4c963f2ddae06a2efc7e9f3591312473c50c6685e1f298068316e66fe" dependencies = [ "spin", ] [[package]] name = "libc" -version = "0.2.153" +version = "0.2.164" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "9c198f91728a82281a64e1f4f9eeb25d82cb32a5de251c6bd1b5154d63a8e7bd" +checksum = "433bfe06b8c75da9b2e3fbea6e5329ff87748f0b144ef75306e674c3f6f7c13f" [[package]] name = "memchr" -version = "2.7.1" +version = "2.7.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "523dc4f511e55ab87b694dc30d0f820d60906ef06413f93d4d7a1385599cc149" +checksum = "78ca9ab1a0babb1e7d5695e3530886289c18cf2f87ec19a575a0abdce112e3a3" [[package]] name = "merlin" @@ -859,17 +925,17 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "a92518e98c078586bc6c934028adcca4c92a53d6a958196de835170a01d84e4b" dependencies = [ "adler", - "autocfg 1.1.0", + "autocfg 1.4.0", ] [[package]] name = "mnemonic-external" version = "0.1.0" -source = "git+https://github.com/Alzymologist/mnemonic-external#ac8b4f027adec591ae16a4e284ca25c0ffda6c3d" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "acd8b607d24e1721a79eb4e30054fe776bf3956a87bd57f59c15fa1f72ad8721" dependencies = [ - "bitvec", "sha2", - "thiserror", + "zeroize", ] [[package]] @@ -885,11 +951,10 @@ dependencies = [ [[package]] name = "num-bigint" -version = "0.4.4" +version = "0.4.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "608e7659b5c3d7cba262d894801b9ec9d00de989e8a82bd4bef91d08da45cdc0" +checksum = "a5e44f723f1133c9deac646763579fdb3ac745e418f2a7af9cd0c431da1f20b9" dependencies = [ - "autocfg 1.1.0", "num-integer", "num-traits", ] @@ -905,11 +970,11 @@ dependencies = [ [[package]] name = "num-iter" -version = "0.1.44" +version = "0.1.45" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d869c01cc0c455284163fd0092f1f93835385ccab5a98a0dcc497b2f8bf055a9" +checksum = "1429034a0490724d0075ebb2bc9e875d6503c3cf69e235a8941aa757d83ef5bf" dependencies = [ - "autocfg 1.1.0", + "autocfg 1.4.0", "num-integer", "num-traits", ] @@ -920,18 +985,18 @@ version = "0.3.2" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "12ac428b1cb17fce6f731001d307d351ec70a6d202fc2e60f7d4c5e42d8f4f07" dependencies = [ - "autocfg 1.1.0", + "autocfg 1.4.0", "num-integer", "num-traits", ] [[package]] name = "num-traits" -version = "0.2.18" +version = "0.2.19" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "da0df0e5185db44f69b44f26786fe401b6c293d1907744beaa7fa62b2e5a517a" +checksum = "071dfc062690e90b734c0b2273ce72ad0ffa95f0c74596bc250dcfd960262841" dependencies = [ - "autocfg 1.1.0", + "autocfg 1.4.0", ] [[package]] @@ -942,33 +1007,34 @@ checksum = "41af26158b0f5530f7b79955006c2727cd23d0d8e7c3109dc316db0a919784dd" [[package]] name = "once_cell" -version = "1.19.0" +version = "1.20.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3fdb12b2476b595f9358c5161aa467c2438859caa136dec86c26fdd2efe17b92" +checksum = "1261fe7e33c73b354eab43b1273a57c8f967d0391e80353e51f764ac02cf6775" [[package]] name = "parity-scale-codec" -version = "3.6.9" +version = "3.7.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "881331e34fa842a2fb61cc2db9643a8fedc615e47cfcc52597d1af0db9a7e8fe" +checksum = "8be4817d39f3272f69c59fe05d0535ae6456c2dc2fa1ba02910296c7e0a5c590" dependencies = [ "arrayvec", "bitvec", "byte-slice-cast", "impl-trait-for-tuples", "parity-scale-codec-derive", + "rustversion", ] [[package]] name = "parity-scale-codec-derive" -version = "3.6.9" +version = "3.7.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "be30eaf4b0a9fba5336683b38de57bb86d179a35862ba6bfcf57625d006bde5b" +checksum = "8781a75c6205af67215f382092b6e0a4ff3734798523e69073d4bcd294ec767b" dependencies = [ - "proc-macro-crate 2.0.2", + "proc-macro-crate", "proc-macro2", "quote", - "syn 1.0.109", + "syn 2.0.87", ] [[package]] @@ -1004,15 +1070,18 @@ dependencies = [ [[package]] name = "ppv-lite86" -version = "0.2.17" +version = "0.2.20" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5b40af805b3121feab8a3c29f04d8ad262fa8e0561883e7653e024ae4479e6de" +checksum = "77957b295656769bb8ad2b6a6b09d897d94f05c41b069aede1fcdaa675eaea04" +dependencies = [ + "zerocopy", +] [[package]] name = "primitive-types" -version = "0.12.2" +version = "0.13.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "0b34d9fd68ae0b74a41b21c03c2f62847aa0ffea044eee893b4c140b37e244e2" +checksum = "d15600a7d856470b7d278b3fe0e311fe28c2526348549f8ef2ff7db3299c87f5" dependencies = [ "fixed-hash", "uint", @@ -1020,29 +1089,18 @@ dependencies = [ [[package]] name = "proc-macro-crate" -version = "1.3.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7f4c021e1093a56626774e81216a4ce732a735e5bad4868a03f3ed65ca0c3919" -dependencies = [ - "once_cell", - "toml_edit 0.19.15", -] - -[[package]] -name = "proc-macro-crate" -version = "2.0.2" +version = "3.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b00f26d3400549137f92511a46ac1cd8ce37cb5598a96d382381458b992a5d24" +checksum = "8ecf48c7ca261d60b74ab1a7b20da18bede46776b2e55535cb958eb595c5fa7b" dependencies = [ - "toml_datetime", - "toml_edit 0.20.2", + "toml_edit", ] [[package]] name = "proc-macro2" -version = "1.0.78" +version = "1.0.89" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e2422ad645d89c99f8f3e6b88a9fdeca7fabeac836b1002371c4367c8f984aae" +checksum = "f139b0662de085916d1fb67d2b4169d1addddda1919e696f3252b740b629986e" dependencies = [ "unicode-ident", ] @@ -1055,9 +1113,9 @@ checksum = "d0e2c0bf8be8a1c4a4f48973dabf26943f05da2bfc2d3180aae62409dbba6f0c" [[package]] name = "quote" -version = "1.0.35" +version = "1.0.37" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "291ec9ab5efd934aaf503a6466c5d5251535d108ee747472c3977cc5acc868ef" +checksum = "b5b9d34b8991d19d98081b46eacdd8eb58c6f2b201139f7c5f643cc155a633af" dependencies = [ "proc-macro2", ] @@ -1206,9 +1264,9 @@ dependencies = [ [[package]] name = "rayon" -version = "1.9.0" +version = "1.10.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e4963ed1bc86e4f3ee217022bd855b297cef07fb9eac5dfa1f788b220b49b3bd" +checksum = "b418a60154510ca1a002a752ca9714984e21e4241e804d32555251faf8b78ffa" dependencies = [ "either", "rayon-core", @@ -1235,28 +1293,32 @@ dependencies = [ [[package]] name = "regex" -version = "1.10.6" +version = "1.11.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4219d74c6b67a3654a9fbebc4b419e22126d13d2f3c4a07ee0cb61ff79a79619" +checksum = "b544ef1b4eac5dc2db33ea63606ae9ffcfac26c1416a2806ae0bf5f56b201191" dependencies = [ + "aho-corasick", + "memchr", "regex-automata", "regex-syntax", ] [[package]] name = "regex-automata" -version = "0.4.7" +version = "0.4.9" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "38caf58cc5ef2fed281f89292ef23f6365465ed9a41b7a7754eb4e26496c92df" +checksum = "809e8dc61f6de73b46c85f4c96486310fe304c434cfa43669d7b40f711150908" dependencies = [ + "aho-corasick", + "memchr", "regex-syntax", ] [[package]] name = "regex-syntax" -version = "0.8.4" +version = "0.8.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7a66a03ae7c801facd77a29370b4faec201768915ac14a721ba36f20bc9c209b" +checksum = "2b15c43186be67a4fd63bee50d0303afffcef381492ebe2c5d87f324e1b8815c" [[package]] name = "rfc6979" @@ -1270,18 +1332,33 @@ dependencies = [ [[package]] name = "rustc_version" -version = "0.4.0" +version = "0.4.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "bfa0f585226d2e68097d4f95d113b15b83a82e819ab25717ec0590d9584ef366" +checksum = "cfcb3a22ef46e85b45de6ee7e79d063319ebb6594faafcf1c225ea92ab6e9b92" dependencies = [ "semver", ] +[[package]] +name = "rustversion" +version = "1.0.18" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0e819f2bc632f285be6d7cd36e25940d45b2391dd6d9b939e79de557f7014248" + +[[package]] +name = "same-file" +version = "1.0.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "93fc1dc3aaa9bfed95e02e6eadabb4baf7e3078b0bd1b4d7b6b0b68378900502" +dependencies = [ + "winapi-util", +] + [[package]] name = "scale-info" -version = "2.10.0" +version = "2.11.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7f7d66a1128282b7ef025a8ead62a4a9fcf017382ec53b8ffbf4d7bf77bd3c60" +checksum = "1aa7ffc1c0ef49b0452c6e2986abf2b07743320641ffd5fc63d552458e3b779b" dependencies = [ "cfg-if 1.0.0", "derive_more", @@ -1291,14 +1368,14 @@ dependencies = [ [[package]] name = "scale-info-derive" -version = "2.10.0" +version = "2.11.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "abf2c68b89cafb3b8d918dd07b42be0da66ff202cf1155c5739a4e0c1ea0dc19" +checksum = "46385cc24172cf615450267463f937c10072516359b3ff1cb24228a4a08bf951" dependencies = [ - "proc-macro-crate 1.3.1", + "proc-macro-crate", "proc-macro2", "quote", - "syn 1.0.109", + "syn 2.0.87", ] [[package]] @@ -1368,6 +1445,35 @@ version = "1.0.23" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "61697e0a1c7e512e84a621326239844a24d8207b4669b41bc18b32ea5cbf988b" +[[package]] +name = "serde" +version = "1.0.215" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "6513c1ad0b11a9376da888e3e0baa0077f1aed55c17f50e7b2397136129fb88f" +dependencies = [ + "serde_derive", +] + +[[package]] +name = "serde_derive" +version = "1.0.215" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ad1e866f866923f252f05c889987993144fb74e722403468a4ebd70c3cd756c0" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.87", +] + +[[package]] +name = "serde_spanned" +version = "0.6.8" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "87607cb1398ed59d48732e575a4c28a7a8ebf2454b964fe3f224f2afc07909e1" +dependencies = [ + "serde", +] + [[package]] name = "sha2" version = "0.10.8" @@ -1401,10 +1507,11 @@ dependencies = [ [[package]] name = "sp-arithmetic" -version = "25.0.0" +version = "26.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "910c07fa263b20bf7271fdd4adcb5d3217dfdac14270592e0780223542e7e114" +checksum = "46d0d0a4c591c421d3231ddd5e27d828618c24456d51445d21a1f79fcee97c23" dependencies = [ + "docify", "integer-sqrt", "num-traits", "parity-scale-codec", @@ -1435,9 +1542,9 @@ checksum = "12f8ee986414b0a9ad741776762f4083cd3a5128449b982a3919c4df36874834" [[package]] name = "spin" -version = "0.5.2" +version = "0.9.8" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6e63cff320ae2c57904679ba7cb63280a3dc4613885beafb148ee7bf9aa9042d" +checksum = "6980e8d7511241f8acf4aebddbb1ff938df5eebe98691418c4468d0b72a96a67" [[package]] name = "spki" @@ -1457,14 +1564,15 @@ checksum = "a2eb9349b6444b326872e140eb1cf5e7c522154d69e7a0ffb0fb81c06b37543f" [[package]] name = "strsim" -version = "0.11.0" +version = "0.11.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5ee073c9e4cd00e28217186dbe12796d692868f432bf2e97ee73bed0c56dfa01" +checksum = "7da8b5736845d9f2fcb837ea5d9e2628564b3b043a70948a3f0b778838c5fb4f" [[package]] name = "substrate-crypto-light" version = "0.1.0" -source = "git+https://github.com/Alzymologist/substrate-crypto-light#406354cf2309f98699ef5efe66699fc098a3ee19" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "86eaa081c10ed391947506525a50da570841ccf93f83a642ff91f36732e91b51" dependencies = [ "base58", "blake2b_simd", @@ -1478,18 +1586,16 @@ dependencies = [ "regex", "schnorrkel", "sha2", - "thiserror", "zeroize", ] [[package]] name = "substrate_parser" -version = "0.6.1" -source = "git+https://github.com/Alzymologist/substrate-parser?rev=65de6a4fe207a64f9857247af4e9f7509fa6de4f#65de6a4fe207a64f9857247af4e9f7509fa6de4f" +version = "0.7.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "b7608864a21e2c356727f7ac0206252fb2c1cc4cee7c8539216528c6b54efca5" dependencies = [ - "base58", "bitvec", - "blake2", "external-memory-tools", "frame-metadata", "hex", @@ -1499,13 +1605,14 @@ dependencies = [ "scale-info", "sp-arithmetic", "sp-crypto-hashing", + "substrate-crypto-light", ] [[package]] name = "subtle" -version = "2.5.0" +version = "2.6.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "81cdd64d312baedb58e21336b31bc043b77e01cc99033ce76ef539f78e965ebc" +checksum = "13c2bddecc57b384dee18652358fb23172facb8a2c51ccc10d74c157bdea3292" [[package]] name = "syn" @@ -1520,9 +1627,9 @@ dependencies = [ [[package]] name = "syn" -version = "2.0.52" +version = "2.0.87" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b699d15b36d1f02c3e7c69f8ffef53de37aefae075d8488d4ba1a7788d574a07" +checksum = "25aa4ce346d03a6dcd68dd8b4010bcb74e54e62c90c573f394c46eae99aba32d" dependencies = [ "proc-macro2", "quote", @@ -1536,23 +1643,12 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "55937e1799185b12863d447f42597ed69d9928686b8d88a1df17376a097d8369" [[package]] -name = "thiserror" -version = "1.0.65" +name = "termcolor" +version = "1.4.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5d11abd9594d9b38965ef50805c5e469ca9cc6f197f883f717e0269a3057b3d5" +checksum = "06794f8f6c5c898b3275aebefa6b8a1cb24cd2c6c79397ab15774837a0bc5755" dependencies = [ - "thiserror-impl", -] - -[[package]] -name = "thiserror-impl" -version = "1.0.65" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ae71770322cbd277e69d762a16c444af02aa0575ac0d174f0b9562d3b37f8602" -dependencies = [ - "proc-macro2", - "quote", - "syn 2.0.52", + "winapi-util", ] [[package]] @@ -1567,29 +1663,35 @@ dependencies = [ ] [[package]] -name = "toml_datetime" -version = "0.6.3" +name = "toml" +version = "0.8.19" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7cda73e2f1397b1262d6dfdcef8aafae14d1de7748d66822d3bfeeb6d03e5e4b" +checksum = "a1ed1f98e3fdc28d6d910e6737ae6ab1a93bf1985935a1193e68f93eeb68d24e" +dependencies = [ + "serde", + "serde_spanned", + "toml_datetime", + "toml_edit", +] [[package]] -name = "toml_edit" -version = "0.19.15" +name = "toml_datetime" +version = "0.6.8" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1b5bb770da30e5cbfde35a2d7b9b8a2c4b8ef89548a7a6aeab5c9a576e3e7421" +checksum = "0dd7358ecb8fc2f8d014bf86f6f638ce72ba252a2c3a2572f2a795f1d23efb41" dependencies = [ - "indexmap", - "toml_datetime", - "winnow", + "serde", ] [[package]] name = "toml_edit" -version = "0.20.2" +version = "0.22.22" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "396e4d48bbb2b7554c944bde63101b5ae446cff6ec4a24227428f15eb72ef338" +checksum = "4ae48d6208a266e853d946088ed816055e556cc6028c5e8e2b84d9fa5dd7c7f5" dependencies = [ "indexmap", + "serde", + "serde_spanned", "toml_datetime", "winnow", ] @@ -1613,9 +1715,9 @@ checksum = "42ff0bf0c66b8238c6f3b578df37d0b7848e55df8577b3f74f92a69acceeb825" [[package]] name = "uint" -version = "0.9.5" +version = "0.10.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "76f64bba2c53b04fcab63c01a7d7427eadc821e3bc48c34dc9ba29c501164b52" +checksum = "909988d098b2f738727b161a106cfc7cab00c539c2687a8836f8e565976fb53e" dependencies = [ "byteorder", "crunchy", @@ -1625,21 +1727,31 @@ dependencies = [ [[package]] name = "unicode-ident" -version = "1.0.12" +version = "1.0.13" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3354b9ac3fae1ff6755cb6db53683adb661634f67557942dea4facebec0fee4b" +checksum = "e91b56cd4cadaeb79bbf1a5645f6b4f8dc5bde8834ad5894a8db35fda9efa1fe" [[package]] name = "utf8parse" -version = "0.2.1" +version = "0.2.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "711b9620af191e0cdc7468a8d14e709c3dcdb115b36f838e601583af800a370a" +checksum = "06abde3611657adf66d383f00b093d7faecc7fa57071cce2578660c9f1010821" [[package]] name = "version_check" -version = "0.9.4" +version = "0.9.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "49874b5167b65d7193b8aba1567f5c7d93d001cafc34600cee003eda787e483f" +checksum = "0b928f33d975fc6ad9f86c8f283853ad26bdd5b10b7f1542aa2fa15e2289105a" + +[[package]] +name = "walkdir" +version = "2.5.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "29790946404f91d9c5d06f9874efddea1dc06c5efe94541a7d6863108e3a5e4b" +dependencies = [ + "same-file", + "winapi-util", +] [[package]] name = "wasi" @@ -1669,6 +1781,15 @@ version = "0.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "ac3b87c63620426dd9b991e5ce0329eff545bccbbb34f3be09ff6fb6ab51b7b6" +[[package]] +name = "winapi-util" +version = "0.1.9" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "cf221c93e13a30d793f7645a0e7762c55d169dbb0a49671918a2319d289b10bb" +dependencies = [ + "windows-sys", +] + [[package]] name = "winapi-x86_64-pc-windows-gnu" version = "0.4.0" @@ -1677,22 +1798,23 @@ checksum = "712e227841d057c1ee1cd2fb22fa7e5a5461ae8e48fa2ca79ec42cfc1931183f" [[package]] name = "windows-sys" -version = "0.52.0" +version = "0.59.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "282be5f36a8ce781fad8c8ae18fa3f9beff57ec1b52cb3de0789201425d9a33d" +checksum = "1e38bc4d79ed67fd075bcc251a1c39b32a1776bbe92e5bef1f0bf1f8c531853b" dependencies = [ "windows-targets", ] [[package]] name = "windows-targets" -version = "0.52.4" +version = "0.52.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7dd37b7e5ab9018759f893a1952c9420d060016fc19a472b4bb20d1bdd694d1b" +checksum = "9b724f72796e036ab90c1021d4780d4d3d648aca59e491e6b98e725b84e99973" dependencies = [ "windows_aarch64_gnullvm", "windows_aarch64_msvc", "windows_i686_gnu", + "windows_i686_gnullvm", "windows_i686_msvc", "windows_x86_64_gnu", "windows_x86_64_gnullvm", @@ -1701,51 +1823,57 @@ dependencies = [ [[package]] name = "windows_aarch64_gnullvm" -version = "0.52.4" +version = "0.52.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "bcf46cf4c365c6f2d1cc93ce535f2c8b244591df96ceee75d8e83deb70a9cac9" +checksum = "32a4622180e7a0ec044bb555404c800bc9fd9ec262ec147edd5989ccd0c02cd3" [[package]] name = "windows_aarch64_msvc" -version = "0.52.4" +version = "0.52.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "da9f259dd3bcf6990b55bffd094c4f7235817ba4ceebde8e6d11cd0c5633b675" +checksum = "09ec2a7bb152e2252b53fa7803150007879548bc709c039df7627cabbd05d469" [[package]] name = "windows_i686_gnu" -version = "0.52.4" +version = "0.52.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b474d8268f99e0995f25b9f095bc7434632601028cf86590aea5c8a5cb7801d3" +checksum = "8e9b5ad5ab802e97eb8e295ac6720e509ee4c243f69d781394014ebfe8bbfa0b" + +[[package]] +name = "windows_i686_gnullvm" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0eee52d38c090b3caa76c563b86c3a4bd71ef1a819287c19d586d7334ae8ed66" [[package]] name = "windows_i686_msvc" -version = "0.52.4" +version = "0.52.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1515e9a29e5bed743cb4415a9ecf5dfca648ce85ee42e15873c3cd8610ff8e02" +checksum = "240948bc05c5e7c6dabba28bf89d89ffce3e303022809e73deaefe4f6ec56c66" [[package]] name = "windows_x86_64_gnu" -version = "0.52.4" +version = "0.52.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5eee091590e89cc02ad514ffe3ead9eb6b660aedca2183455434b93546371a03" +checksum = "147a5c80aabfbf0c7d901cb5895d1de30ef2907eb21fbbab29ca94c5b08b1a78" [[package]] name = "windows_x86_64_gnullvm" -version = "0.52.4" +version = "0.52.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "77ca79f2451b49fa9e2af39f0747fe999fcda4f5e241b2898624dca97a1f2177" +checksum = "24d5b23dc417412679681396f2b49f3de8c1473deb516bd34410872eff51ed0d" [[package]] name = "windows_x86_64_msvc" -version = "0.52.4" +version = "0.52.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "32b752e52a2da0ddfbdbcc6fceadfeede4c939ed16d13e648833a61dfb611ed8" +checksum = "589f6da84c646204747d1270a2a5661ea66ed1cced2631d546fdfb155959f9ec" [[package]] name = "winnow" -version = "0.5.40" +version = "0.6.20" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f593a95398737aeed53e489c785df13f3618e41dbcd6718c6addbf1395aa6876" +checksum = "36c1fec1a2bb5866f07c25f68c26e565c4c200aebb96d7e55710c19d3e8ac49b" dependencies = [ "memchr", ] @@ -1765,6 +1893,7 @@ version = "0.7.35" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "1b9b4fd18abc82b8136838da5d50bae7bdea537c574d8dc1a34ed098d6c166f0" dependencies = [ + "byteorder", "zerocopy-derive", ] @@ -1776,7 +1905,7 @@ checksum = "fa4f8080344d4671fb4e831a13ad1e68092748387dfc4f55e356242fae12ce3e" dependencies = [ "proc-macro2", "quote", - "syn 2.0.52", + "syn 2.0.87", ] [[package]] @@ -1796,5 +1925,5 @@ checksum = "ce36e65b0d2999d2aafac989fb249189a141aee1f53c612c1f37d72631959f69" dependencies = [ "proc-macro2", "quote", - "syn 2.0.52", + "syn 2.0.87", ] diff --git a/kampela-ui/simulator/Cargo.toml b/kampela-ui/simulator/Cargo.toml index a0ec8a7..a28aa0b 100644 --- a/kampela-ui/simulator/Cargo.toml +++ b/kampela-ui/simulator/Cargo.toml @@ -7,8 +7,8 @@ edition = "2021" clap = { version = "4.2.1", features = ["derive"] } embedded-graphics-core = "0.3.3" embedded-graphics-simulator = { version = "0.3.0" } -mnemonic-external = {git = "https://github.com/Alzymologist/mnemonic-external", features = ["sufficient-memory"]} -substrate-crypto-light = {git = "https://github.com/Alzymologist/substrate-crypto-light", features = ["sr25519"]} +mnemonic-external = { version = "0.1.0", default-features = false, features = ["sufficient-memory"] } +substrate-crypto-light = { version = "0.1.0", default-features = false, features = ["sr25519"] } kampela-ui = {path = "../"} rand = { version = "0.8.5" } diff --git a/kampela-ui/simulator/src/main.rs b/kampela-ui/simulator/src/main.rs index e68d415..dc77da1 100644 --- a/kampela-ui/simulator/src/main.rs +++ b/kampela-ui/simulator/src/main.rs @@ -1,10 +1,7 @@ //! This is simulator to develop Kampela UI mocks #![deny(unused_crate_dependencies)] use embedded_graphics_core::{ - primitives::PointsIter, - Drawable, - pixelcolor::BinaryColor, - Pixel, + pixelcolor::BinaryColor, prelude::Point, primitives::{PointsIter, Rectangle}, Drawable, Pixel }; use embedded_graphics_simulator::{ @@ -232,6 +229,7 @@ fn main() { if let Some(u) = update.take() { sleep(UPDATE_DELAY_TIME); let is_clear_update = matches!(u, UpdateRequest::Slow) || matches!(u, UpdateRequest::Fast); + let mut previous = state.display.clone(); match state.render(is_clear_update, &mut h) { Ok(a) => update.propagate(a), Err(e) => println!("{:?}", e), @@ -273,9 +271,18 @@ fn main() { println!("ultrafast update"); sleep(ULTRAFAST_UPDATE_TIME); }, - UpdateRequest::Part(a) => { + UpdateRequest::UltraFastSelective => { + draw_selective(&mut previous, &state.display, None); + state.display = previous; window.update(&state.display); - println!("part update of area {:?}", a); + println!("ultrafast selective update"); + sleep(ULTRAFAST_UPDATE_TIME); + }, + UpdateRequest::Part(ref a) => { + draw_selective(&mut previous, &state.display, Some(a)); + state.display = previous; + window.update(&state.display); + println!("part update with white of area {:?}", a); sleep(ULTRAFAST_UPDATE_TIME); }, } @@ -308,7 +315,54 @@ fn main() { fn invert_display(display: &mut SimulatorDisplay) { for point in SCREEN_AREA.points() { - let dot = Pixel::(point, display.get_pixel(point).invert()); - dot.draw(display).unwrap(); + let pixel = Pixel::(point, display.get_pixel(point).invert()); + pixel.draw(display).unwrap(); + }; +} + +fn draw_selective(display: &mut SimulatorDisplay, new_display: &SimulatorDisplay, area: Option<&Rectangle>) { + // simulate partial write window + let mut area = area.unwrap_or(&SCREEN_AREA).clone(); + area.top_left.y = if area.top_left.y < 0 { + 0 + } else if area.top_left.y > (SCREEN_SIZE_Y - 1) as i32 { + (SCREEN_SIZE_Y as i32 / 8 - 1) * 8 + } else { + (area.top_left.y / 8) * 8 + }; + + area.top_left.x = if area.top_left.x < 0 { + 0 + } else if area.top_left.x > (SCREEN_SIZE_X - 1) as i32{ + SCREEN_SIZE_X as i32 - 1 + } else { + area.top_left.x + }; + + let bottom_right = area.top_left + area.size - Point{x: 1, y: 1}; + + area.size.height = if bottom_right.y > (SCREEN_SIZE_Y - 1) as i32 { + (SCREEN_SIZE_Y as u32 / 8) * 8 - area.top_left.y as u32 + } else if bottom_right.y < 0 { + 0 + } else { + (bottom_right.y as u32 / 8 + 1) * 8 - area.top_left.y as u32 + }; + + area.size.width = if bottom_right.x > (SCREEN_SIZE_X - 1) as i32 { + (SCREEN_SIZE_X as u32) - area.top_left.x as u32 + } else if bottom_right.x < 0 { + 0 + } else { + (bottom_right.x as u32 + 1) - area.top_left.x as u32 + }; + // simulate selective update mode + for point in area.points() { + let pixel = Pixel::(point, new_display.get_pixel(point)); + let old_pixel = Pixel::(point, display.get_pixel(point)); + if (pixel.1.is_on() && old_pixel.1.is_off()) || + (pixel.1.is_off() && old_pixel.1.is_on()) { + pixel.draw(display).unwrap(); + } }; } \ No newline at end of file diff --git a/kampela-ui/src/backup.rs b/kampela-ui/src/backup.rs index f8ba1ce..e3adc9a 100644 --- a/kampela-ui/src/backup.rs +++ b/kampela-ui/src/backup.rs @@ -171,7 +171,7 @@ impl ViewScreen for Backup

{ )?; }, BackupState::Storing => { - entropy = Some(self.get_entropy().unwrap()); + entropy = self.get_entropy(); state = Some(UnitScreen::QRAddress); request = Some(UpdateRequest::Slow); }, diff --git a/kampela-ui/src/pin/pin.rs b/kampela-ui/src/pin/pin.rs index 1a09669..693a22b 100644 --- a/kampela-ui/src/pin/pin.rs +++ b/kampela-ui/src/pin/pin.rs @@ -117,18 +117,13 @@ impl

ViewScreen for Pincode

where } let t = self.switch_tapped(); - let filled = if t { - PrimitiveStyle::with_fill(BinaryColor::On) - } else { - PrimitiveStyle::with_fill(BinaryColor::Off) - }; + let filled = PrimitiveStyle::with_fill(BinaryColor::Off); target.bounding_box().into_styled(filled).draw(target)?; - - self.pindots.draw(target, (self.entered_nums.len(), t))?; + self.pindots.draw(target, self.entered_nums.len())?; self.pinpad.draw(target, (t, h))?; if t { - request = Some(UpdateRequest::UltraFast); + request = Some(UpdateRequest::UltraFastSelective); } Ok((EventResult { request, state }, false)) @@ -140,9 +135,9 @@ impl

ViewScreen for Pincode

where if !matches!(self.tapped, PinpadState::Initial) { // ignore taps until permutated return (EventResult{ request, state }, ()); } - if let Some(b) = self.pinpad.handle_tap(point, ()) { + if let Some((b, r)) = self.pinpad.handle_tap(point, ()) { self.tapped = PinpadState::Tapped; - request = Some(UpdateRequest::UltraFast); + request = Some(UpdateRequest::Part(r)); self.push_entered(self.pinpad.buttons[b].num()); self.check_pin(pin); } diff --git a/kampela-ui/src/pin/pinbutton.rs b/kampela-ui/src/pin/pinbutton.rs index 9dd68d8..440c883 100644 --- a/kampela-ui/src/pin/pinbutton.rs +++ b/kampela-ui/src/pin/pinbutton.rs @@ -58,7 +58,7 @@ impl PinButton { } impl View for PinButton { - type DrawInput<'a> = bool; + type DrawInput<'a> = (); type DrawOutput = (); type TapInput<'a> = (); type TapOutput = bool; @@ -68,13 +68,13 @@ impl View for PinButton { fn bounding_box_absolut(&self) -> Rectangle { self.widget.bounding_box_absolute() } - fn draw_view<'a, D: DrawTarget>(&mut self, target: &mut DrawView, t: Self::DrawInput<'_>) -> Result + fn draw_view<'a, D: DrawTarget>(&mut self, target: &mut DrawView, _: Self::DrawInput<'_>) -> Result where Self: 'a { let this_tapped = self.reset_tapped(); if this_tapped { self.draw_tapped(target)?; } else { - self.draw_initial(target, t)?; + self.draw_initial(target)?; } Ok(()) } @@ -85,15 +85,10 @@ impl View for PinButton { } impl PinButton { - fn draw_initial>(&self, target: &mut D, t: bool) -> Result<(), D::Error> { - let (on, off) = if t { - (BinaryColor::Off, BinaryColor::On) - } else { - (BinaryColor::On, BinaryColor::Off) - }; - let filled = PrimitiveStyle::with_fill(off); + fn draw_initial>(&self, target: &mut D) -> Result<(), D::Error> { + let filled = PrimitiveStyle::with_fill(BinaryColor::Off); let thin_stroke = PrimitiveStyleBuilder::new() - .stroke_color(on) + .stroke_color(BinaryColor::On) .stroke_width(2) .stroke_alignment(StrokeAlignment::Inside) .build(); @@ -106,26 +101,24 @@ impl PinButton { rounded.into_styled(filled).draw(target)?; rounded.into_styled(thin_stroke).draw(target)?; - if t == false { - let character_style = MonoTextStyle::new(&BUTTON_FONT, BinaryColor::On); - let textbox_style = TextBoxStyleBuilder::new() - .alignment(HorizontalAlignment::Center) - .vertical_alignment(VerticalAlignment::Middle) - .build(); - - TextBox::with_textbox_style( - &self.num.to_string(), - bounds, - character_style, - textbox_style, - ) - .draw(target)?; - } + let character_style = MonoTextStyle::new(&BUTTON_FONT, BinaryColor::On); + let textbox_style = TextBoxStyleBuilder::new() + .alignment(HorizontalAlignment::Center) + .vertical_alignment(VerticalAlignment::Middle) + .build(); + + TextBox::with_textbox_style( + &self.num.to_string(), + bounds, + character_style, + textbox_style, + ) + .draw(target)?; Ok(()) } fn draw_tapped>(&self, target: &mut DrawView) -> Result<(), D::Error> { - let filled = PrimitiveStyle::with_fill(BinaryColor::Off); + let filled = PrimitiveStyle::with_fill(BinaryColor::On); let area = self.bounding_box_view(); let rounded = RoundedRectangle::new( @@ -134,7 +127,7 @@ impl PinButton { ); rounded.into_styled(filled).draw(target)?; - let character_style = MonoTextStyle::new(&BUTTON_FONT, BinaryColor::On); + let character_style = MonoTextStyle::new(&BUTTON_FONT, BinaryColor::Off); let textbox_style = TextBoxStyleBuilder::new() .alignment(HorizontalAlignment::Center) .vertical_alignment(VerticalAlignment::Middle) diff --git a/kampela-ui/src/pin/pindots.rs b/kampela-ui/src/pin/pindots.rs index 0751a01..5c39c85 100644 --- a/kampela-ui/src/pin/pindots.rs +++ b/kampela-ui/src/pin/pindots.rs @@ -39,7 +39,7 @@ impl Pindots { } impl View for Pindots { - type DrawInput<'a> = (usize, bool); + type DrawInput<'a> = usize; type DrawOutput = (); type TapInput<'a> = (); type TapOutput = (); @@ -49,23 +49,17 @@ impl View for Pindots { fn bounding_box_absolut(&self) -> Rectangle { PINDOTS_WIDGET.bounding_box_absolute() } - fn draw_view<'a, D>(&mut self, target: &mut DrawView, (dots, t): Self::DrawInput<'_>) -> Result<(),D::Error> + fn draw_view<'a, D>(&mut self, target: &mut DrawView, dots: Self::DrawInput<'_>) -> Result<(),D::Error> where D: DrawTarget, Self: 'a, { - let (on, _) = if t { - (BinaryColor::Off, BinaryColor::On) - } else { - (BinaryColor::On, BinaryColor::Off) - }; - let thin_stroke = PrimitiveStyleBuilder::new() - .stroke_color(on) + .stroke_color(BinaryColor::On) .stroke_width(2) .stroke_alignment(StrokeAlignment::Inside) .build(); - let filled = PrimitiveStyle::with_fill(on); + let filled = PrimitiveStyle::with_fill(BinaryColor::On); let area = self.bounding_box_view(); for i in 0..PIN_LEN { let dot = Circle::new( diff --git a/kampela-ui/src/pin/pinpad.rs b/kampela-ui/src/pin/pinpad.rs index b218636..aacc487 100644 --- a/kampela-ui/src/pin/pinpad.rs +++ b/kampela-ui/src/pin/pinpad.rs @@ -105,7 +105,7 @@ impl

View for Pinpad

where type DrawInput<'a> = (bool, &'a mut

::HAL) where Self: 'a; type DrawOutput = (); type TapInput<'a> = () where Self: 'a,; - type TapOutput = usize; + type TapOutput = (usize, Rectangle); fn bounding_box(&self) -> Rectangle { PINPAD_WIDGET.bounding_box() } @@ -115,21 +115,23 @@ impl

View for Pinpad

where fn draw_view<'a, D: DrawTarget>(&mut self, target: &mut DrawView, (t, h): Self::DrawInput<'a>) -> Result<(), D::Error> where Self: 'a { for button in self.buttons.iter_mut() { - button.draw(target, t)?; + button.draw(target, ())?; } if t { self.shuffle(h); } Ok(()) } - fn handle_tap_view<'a>(&mut self, point: Point, _: ()) -> usize + fn handle_tap_view<'a>(&mut self, point: Point, _: ()) -> Self::TapOutput where Self: 'a { let mut tapped = 0; + let mut area = self.bounding_box_absolut(); for (i, button) in self.buttons.iter_mut().enumerate() { if button.handle_tap(point, ()).is_some() { tapped = i; + area = button.bounding_box_absolut(); } } - tapped + (tapped, area) } } \ No newline at end of file diff --git a/kampela-ui/src/seed_entry/key.rs b/kampela-ui/src/seed_entry/key.rs index e5ae781..cced2bb 100644 --- a/kampela-ui/src/seed_entry/key.rs +++ b/kampela-ui/src/seed_entry/key.rs @@ -15,7 +15,6 @@ use embedded_graphics::{ PrimitiveStyleBuilder, Rectangle, RoundedRectangle, - StrokeAlignment }, Drawable }; @@ -51,7 +50,7 @@ impl Key { } impl View for Key { - type DrawInput<'a> = bool; + type DrawInput<'a> = (bool, bool); type DrawOutput = bool; type TapInput<'a> = (); type TapOutput = char; @@ -64,16 +63,20 @@ impl View for Key { self.widget.bounding_box_absolute() } - fn draw_view<'a, D>(&mut self, target: &mut DrawView, n: Self::DrawInput<'_>) -> Result + fn draw_view<'a, D>(&mut self, target: &mut DrawView, (t, n): Self::DrawInput<'_>) -> Result where D: DrawTarget, Self: 'a, { let mut was_tapped = false; - self.draw_initial(target, n)?; + + if !t { + self.draw_initial(target, n)?; + } if self.this_tapped { was_tapped = true; self.draw_tapped(target, n)?; + self.draw_initial(target, !n)?; } Ok(was_tapped) } @@ -121,17 +124,15 @@ impl Key { (BinaryColor::On, BinaryColor::Off) }; self.this_tapped = false; - let thin_stroke = PrimitiveStyleBuilder::new() - .stroke_color(on) - .stroke_width(2) - .stroke_alignment(StrokeAlignment::Inside) + let flll = PrimitiveStyleBuilder::new() + .fill_color(on) .build(); let area = self.bounding_box_view(); let rounded = RoundedRectangle::new( area, CornerRadii::new(Size::new(KEY_RADIUS, KEY_RADIUS)) ); - rounded.into_styled(thin_stroke).draw(target)?; + rounded.into_styled(flll).draw(target)?; Ok(()) } diff --git a/kampela-ui/src/seed_entry/keyboard.rs b/kampela-ui/src/seed_entry/keyboard.rs index d909cfe..fd06faa 100644 --- a/kampela-ui/src/seed_entry/keyboard.rs +++ b/kampela-ui/src/seed_entry/keyboard.rs @@ -114,10 +114,10 @@ impl Keyboard { } impl View for Keyboard { - type DrawInput<'a> = bool; + type DrawInput<'a> = (bool, bool); type DrawOutput = Option; type TapInput<'a> = (); - type TapOutput = Option>; + type TapOutput = Option<(Vec, Rectangle)>; fn bounding_box(&self) -> Rectangle { KEYBOARD_WIDGET.bounding_box() @@ -127,14 +127,14 @@ impl View for Keyboard { KEYBOARD_WIDGET.bounding_box_absolute() } - fn draw_view<'a, D>(&mut self, target: &mut DrawView, n: Self::DrawInput<'_>) -> Result + fn draw_view<'a, D>(&mut self, target: &mut DrawView, (t, n): Self::DrawInput<'_>) -> Result where D: DrawTarget, Self: 'a, { let mut was_tapped = None; for key in self.keys.iter_mut() { - if key.draw(target, n)? { + if key.draw(target, (t, n))? { was_tapped = Some(key.bounding_box_absolut()); } } @@ -145,9 +145,12 @@ impl View for Keyboard { where Self: 'a { let mut nearest = Vec::new(); - + let mut rectangle = SCREEN_AREA; for key in self.keys.iter_mut() { - key.handle_tap(p, ()); + if key.handle_tap(p, ()).is_some() { + rectangle = key.bounding_box_absolut(); + }; + let b = &key.bounding_box(); //calculating square(to avoid sqrt) of distance to edge or vertex of bounding box @@ -179,7 +182,7 @@ impl View for Keyboard { //if neither key is pressed None } else { - Some(nearest.iter_mut().map(|k| k.0).collect()) + Some((nearest.iter_mut().map(|k| k.0).collect(), rectangle)) } } } \ No newline at end of file diff --git a/kampela-ui/src/seed_entry/proposal.rs b/kampela-ui/src/seed_entry/proposal.rs index bab167b..b964fe9 100644 --- a/kampela-ui/src/seed_entry/proposal.rs +++ b/kampela-ui/src/seed_entry/proposal.rs @@ -78,7 +78,6 @@ pub struct Proposal

where entered_count: usize, variants: Vec, guess: Vec>, - guess_depth: usize, wordlist: P::AsWordList, } @@ -89,7 +88,6 @@ impl Proposal

{ entered_count: 0, variants: Vec::new(), guess: Vec::new(), - guess_depth: 0, wordlist, } } @@ -99,7 +97,6 @@ impl Proposal

{ self.entered_count = 0; self.variants = Vec::new(); self.guess = Vec::new(); - self.guess_depth = 0; } pub fn add_letters(&mut self, letters: Vec) { if self.entered.len() < ENOUGH_LEN { @@ -125,7 +122,7 @@ impl Proposal

{ fn make_guess(&mut self) { let mut guess = Vec::>::new(); - if self.variants.len() < 4 { + if self.variants.len() <= MAX_PROPOSAL { self.variants = Vec::new(); } let variants = Variants::new(&self.entered, &self.variants); @@ -144,8 +141,7 @@ impl Proposal

{ guess.append(&mut g); // break if there too many guesses to display // and if at least found two variants - // except if all variants needed, hence !guessed_variants_is_some - if guess.len() >= MAX_PROPOSAL && new_variants.len() > 1 { + if guess.len() >= MAX_PROPOSAL && (new_variants.len() > 1 || self.entered.len() <= 1) { break; } } @@ -157,7 +153,7 @@ impl Proposal

{ } impl View for Proposal

{ - type DrawInput<'a> = (bool, bool) where P: 'a; + type DrawInput<'a> = bool where P: 'a; type DrawOutput = (); type TapInput<'a> = () where P: 'a; type TapOutput = Option>; @@ -170,48 +166,43 @@ impl View for Proposal

{ PROPOSAL_WIDGET.bounding_box_absolute() } - fn draw_view<'a, D>(&mut self, target: &mut DrawView, (t, n): Self::DrawInput<'a>) -> Result<(), D::Error> + fn draw_view<'a, D>(&mut self, target: &mut DrawView, n: Self::DrawInput<'a>) -> Result<(), D::Error> where D: DrawTarget, Self: 'a, { - if t == false { - let (on, _) = if n { - (BinaryColor::Off, BinaryColor::On) - } else { - (BinaryColor::On, BinaryColor::Off) - }; + let (on, _) = if n { + (BinaryColor::Off, BinaryColor::On) + } else { + (BinaryColor::On, BinaryColor::Off) + }; - if self.guess_depth != self.entered.len() { // to guess only first draw in row - self.guess_depth = self.entered.len(); - self.make_guess(); - } - - let character_style = MonoTextStyleBuilder::new() - .font(&PROPOSAL_FONT) - .text_color(on) - .underline() - .build(); + self.make_guess(); - let textbox_style = TextBoxStyleBuilder::new() - .alignment(HorizontalAlignment::Center) - .vertical_alignment(VerticalAlignment::Middle) - .build(); - for (i, section) in PROPOSAL_SECTIONS.iter().enumerate() { - let text = match self.guess.get(i) { - Some(w) => { - w.word.as_ref() - }, - None => "", - }; - TextBox::with_textbox_style( - &text, - *section, - character_style, - textbox_style, - ).draw(target)?; - } + let character_style = MonoTextStyleBuilder::new() + .font(&PROPOSAL_FONT) + .text_color(on) + .underline() + .build(); + + let textbox_style = TextBoxStyleBuilder::new() + .alignment(HorizontalAlignment::Center) + .vertical_alignment(VerticalAlignment::Middle) + .build(); + for (i, section) in PROPOSAL_SECTIONS.iter().enumerate() { + let text = match self.guess.get(i) { + Some(w) => { + w.word.as_ref() + }, + None => "", + }; + TextBox::with_textbox_style( + &text, + *section, + character_style, + textbox_style, + ).draw(target)?; } Ok(()) diff --git a/kampela-ui/src/seed_entry/seed_entry.rs b/kampela-ui/src/seed_entry/seed_entry.rs index 003c4e6..b1824f5 100644 --- a/kampela-ui/src/seed_entry/seed_entry.rs +++ b/kampela-ui/src/seed_entry/seed_entry.rs @@ -33,7 +33,6 @@ enum KeyboardState { Initial, Tapped, DrawTapped, - InitialInverse, } pub struct SeedEntry

where @@ -47,7 +46,6 @@ pub struct SeedEntry

where navbar_entry: NavBar, navbar_phrase: NavBar, tapped: KeyboardState, - negative: bool, } impl SeedEntry

{ @@ -70,7 +68,6 @@ impl SeedEntry

{ navbar_entry: NavBar::new(("clear", "")), navbar_phrase: NavBar::new(("back", "")), tapped: KeyboardState::Initial, - negative: false, }; Self::update_navbar_phrase(&mut state); state @@ -90,24 +87,13 @@ impl SeedEntry

{ match self.tapped { KeyboardState::Initial => false, KeyboardState::Tapped => { - if self.negative { - self.tapped = KeyboardState::InitialInverse; - } else { - self.tapped = KeyboardState::DrawTapped; - } - self.negative = !self.negative; + self.tapped = KeyboardState::DrawTapped; true }, KeyboardState::DrawTapped => { self.tapped = KeyboardState::Initial; - self.negative = false; false }, - KeyboardState::InitialInverse => { - self.tapped = KeyboardState::DrawTapped; - self.negative = true; - false - } } } fn update_navbar_phrase(&mut self) { @@ -134,33 +120,28 @@ impl ViewScreen for SeedEntry

{ let mut request = None; let t = self.switch_tapped(); + if !t { + target.bounding_box().into_styled(PrimitiveStyle::with_fill(BinaryColor::Off)).draw(target)?; + } - let filled = if self.negative { - PrimitiveStyle::with_fill(BinaryColor::On) - } else { - PrimitiveStyle::with_fill(BinaryColor::Off) - }; - target.bounding_box().into_styled(filled).draw(target)?; - - self.remove.draw(target, self.negative)?; - self.keyboard.draw(target, self.negative)?; + self.remove.draw(target, (t, false))?; + self.keyboard.draw(target, (t, false))?; - if self.entry.is_empty() { - self.phrase.draw(target, self.negative)?; - self.navbar_phrase.draw(target, self.negative)?; - } else { - self.entry.draw(target, self.negative)?; - self.proposal.draw(target, (t, self.negative))?; - self.navbar_entry.draw(target, self.negative)?; + if matches!(self.tapped, KeyboardState::Initial) { + if self.entry.is_empty() { + self.phrase.draw(target, false)?; + self.navbar_phrase.draw(target, false)?; + } else { + self.entry.draw(target, false)?; + self.proposal.draw(target, false)?; + self.navbar_entry.draw(target, false)?; + } } - match self.tapped { - KeyboardState::DrawTapped | - KeyboardState::InitialInverse => { - request = Some(UpdateRequest::UltraFast); - }, - _ => {}, + if matches!(self.tapped, KeyboardState::DrawTapped) { + request = Some(UpdateRequest::UltraFastSelective); } + Ok((EventResult { request, state }, ())) } @@ -171,7 +152,7 @@ impl ViewScreen for SeedEntry

{ let mut state = None; let mut request = None; - if let Some(Some(c)) = self.keyboard.handle_tap(point, ()) { + if let Some(Some((c, r))) = self.keyboard.handle_tap(point, ()) { if !self.phrase.is_maxed() { if !self.entry.is_maxed() { self.entry.add_letter(c[0]); @@ -183,7 +164,7 @@ impl ViewScreen for SeedEntry

{ self.phrase.set_invalid(); } self.tapped = KeyboardState::Tapped; - request = Some(UpdateRequest::UltraFast); + request = Some(UpdateRequest::Part(r)); }; if self.entry.is_empty() && matches!(self.tapped, KeyboardState::Initial) { @@ -191,7 +172,7 @@ impl ViewScreen for SeedEntry

{ self.phrase.remove_word(); self.update_navbar_phrase(); self.tapped = KeyboardState::Tapped; - request = Some(UpdateRequest::UltraFast); + request = Some(UpdateRequest::Part(self.remove.bounding_box_absolut())); } } if !self.entry.is_empty() { @@ -199,14 +180,14 @@ impl ViewScreen for SeedEntry

{ self.proposal.remove_letter(); self.entry.remove_letter(); self.tapped = KeyboardState::Tapped; - request = Some(UpdateRequest::UltraFast); + request = Some(UpdateRequest::Part(self.remove.bounding_box_absolut())); } } if let Some(Some(guess)) = self.proposal.handle_tap(point, ()) { self.phrase.add_word(guess); self.entry.clear(); self.update_navbar_phrase(); - request = Some(UpdateRequest::Fast); + request = Some(UpdateRequest::UltraFastSelective); } if self.entry.is_empty() { if let Some(Some(c)) = self.navbar_phrase.handle_tap(point, ()) { @@ -250,7 +231,7 @@ impl ViewScreen for SeedEntry

{ if matches!(self.navbar_entry.handle_tap(point, ()), Some(Some(NavCommand::Left))) { self.entry.clear(); self.proposal.clear(); - request = Some(UpdateRequest::Fast); + request = Some(UpdateRequest::UltraFastSelective); } } diff --git a/kampela-ui/src/uistate.rs b/kampela-ui/src/uistate.rs index 3ffa367..c55b568 100644 --- a/kampela-ui/src/uistate.rs +++ b/kampela-ui/src/uistate.rs @@ -54,6 +54,7 @@ pub enum UpdateRequest { Slow, Fast, UltraFast, + UltraFastSelective, Part(Rectangle), } diff --git a/kampela/Cargo.lock b/kampela/Cargo.lock index 69bb850..20918c1 100644 --- a/kampela/Cargo.lock +++ b/kampela/Cargo.lock @@ -1,6 +1,33 @@ # This file is automatically @generated by Cargo. # It is not intended for manual editing. -version = 3 +version = 4 + +[[package]] +name = "ahash" +version = "0.8.11" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "e89da841a80418a9b391ebaea17f5c112ffaaa96f621d2c285b5174da76b9011" +dependencies = [ + "cfg-if", + "once_cell", + "version_check", + "zerocopy", +] + +[[package]] +name = "aho-corasick" +version = "1.1.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "8e60d3430d3a69478ad0993f19238d2df97c507009a52b3c10addcd7f6bcb916" +dependencies = [ + "memchr", +] + +[[package]] +name = "allocator-api2" +version = "0.2.21" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "683d7910e743518b0e34f1186f92494becacb047c7b6bf616c96772180fef923" [[package]] name = "app" @@ -33,9 +60,9 @@ dependencies = [ [[package]] name = "arrayref" -version = "0.3.7" +version = "0.3.9" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6b4930d2cb77ce62f89ee5d5289b4ac049559b1c45539271f5ed4fdc7db34545" +checksum = "76a2e8124351fda1ef8aaaa3bbd7ebbcb486bbcd4225aca0aa0d84bb2db8fecb" [[package]] name = "arrayvec" @@ -48,15 +75,15 @@ dependencies = [ [[package]] name = "arrayvec" -version = "0.7.4" +version = "0.7.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "96d30a06541fbafbc7f82ed10c06164cfbd2c401138f6addd8404629c4b16711" +checksum = "7c02d123df017efcdfbd739ef81735b36c5ba83ec3c59c80a9d7ecc718f92e50" [[package]] name = "autocfg" -version = "1.1.0" +version = "1.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d468802bab17cbc0cc575e9b053f41e72aa36bfa6b7f55e3529ffa43161b97fa" +checksum = "ace50bade8e6234aa140d9a2f552bbee1db4d353f69b8217bc503490fc1a9f26" [[package]] name = "az" @@ -73,12 +100,24 @@ dependencies = [ "rustc_version 0.2.3", ] +[[package]] +name = "base16ct" +version = "0.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "4c7f02d4ea65f2c1853089ffd8d2787bdbc63de2f0d29dedbcf8ccdfa0ccd4cf" + [[package]] name = "base58" version = "0.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "6107fe1be6682a68940da878d9e9f5e90ca5745b3dec9fd1bb393c8777d4f581" +[[package]] +name = "base64ct" +version = "1.6.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "8c3c1a368f70d6cf7302d78f8f7093da241fb8e8807c05cc9e51a125895a6d5b" + [[package]] name = "bitfield" version = "0.13.2" @@ -97,15 +136,6 @@ dependencies = [ "wyz", ] -[[package]] -name = "blake2" -version = "0.10.6" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "46502ad458c9a52b69d4d4d32775c788b7a1b85e8bc9d482d92250fc0e3f8efe" -dependencies = [ - "digest", -] - [[package]] name = "blake2-rfc" version = "0.2.18" @@ -123,8 +153,8 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "23285ad32269793932e830392f2fe2f83e26488fd3ec778883a93c8323735780" dependencies = [ "arrayref", - "arrayvec 0.7.4", - "constant_time_eq 0.3.0", + "arrayvec 0.7.6", + "constant_time_eq 0.3.1", ] [[package]] @@ -154,6 +184,18 @@ version = "1.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd" +[[package]] +name = "common-path" +version = "1.0.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "2382f75942f4b3be3690fe4f86365e9c853c1587d6ee58212cebf6e2a9ccd101" + +[[package]] +name = "const-oid" +version = "0.9.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "c2459377285ad874054d797f3ccebf984978aa39129f6eafde5cdc8315b612f8" + [[package]] name = "constant_time_eq" version = "0.1.5" @@ -162,9 +204,9 @@ checksum = "245097e9a4535ee1e3e3931fcfcd55a796a44c643e8596ff6566d68f09b87bbc" [[package]] name = "constant_time_eq" -version = "0.3.0" +version = "0.3.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f7144d30dcf0fafbce74250a3963025d8d52177934239851c917d29f1df280c2" +checksum = "7c74b8349d32d297c9134b8c88677813a227df8f779daa29bfc29c183fe3dca6" [[package]] name = "cortex-m" @@ -181,38 +223,38 @@ dependencies = [ [[package]] name = "cortex-m-rt" -version = "0.7.3" +version = "0.7.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ee84e813d593101b1723e13ec38b6ab6abbdbaaa4546553f5395ed274079ddb1" +checksum = "801d4dec46b34c299ccf6b036717ae0fce602faa4f4fe816d9013b9a7c9f5ba6" dependencies = [ "cortex-m-rt-macros", ] [[package]] name = "cortex-m-rt-macros" -version = "0.7.0" +version = "0.7.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f0f6f3e36f203cfedbc78b357fb28730aa2c6dc1ab060ee5c2405e843988d3c7" +checksum = "e37549a379a9e0e6e576fd208ee60394ccb8be963889eebba3ffe0980364f472" dependencies = [ "proc-macro2", "quote", - "syn 1.0.109", + "syn 2.0.87", ] [[package]] name = "cpufeatures" -version = "0.2.12" +version = "0.2.15" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "53fe5e26ff1b7aef8bca9c6080520cfb8d9333c7568e1829cef191a9723e5504" +checksum = "0ca741a962e1b0bff6d724a1a0958b686406e853bb14061f218562e1896f95e6" dependencies = [ "libc", ] [[package]] name = "crc" -version = "3.0.1" +version = "3.2.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "86ec7a15cbe22e59248fc7eadb1907dab5ba09372595da4d73dd805ed4417dfe" +checksum = "69e6e4d7b33a94f0991c26729976b10ebde1d34c3ee82408fb536164fa10d636" dependencies = [ "crc-catalog", ] @@ -225,9 +267,9 @@ checksum = "19d374276b40fb8bbdee95aef7c7fa6b5316ec764510eb64b8dd0e2ed0d7e7f5" [[package]] name = "critical-section" -version = "1.1.2" +version = "1.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7059fff8937831a9ae6f0fe4d658ffabf58f2ca96aa9dec1c889f936f705f216" +checksum = "790eea4361631c5e7d22598ecd5723ff611904e3344ce8720784c93e3d83d40b" [[package]] name = "crunchy" @@ -235,6 +277,18 @@ version = "0.2.2" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "7a81dae078cea95a014a339291cec439d2f232ebe854a9d672b796c6afafa9b7" +[[package]] +name = "crypto-bigint" +version = "0.5.5" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0dc92fb57ca44df6db8059111ab3af99a63d5d0f8375d9972e319a379c6bab76" +dependencies = [ + "generic-array", + "rand_core", + "subtle", + "zeroize", +] + [[package]] name = "crypto-common" version = "0.1.6" @@ -247,17 +301,16 @@ dependencies = [ [[package]] name = "curve25519-dalek" -version = "4.1.2" +version = "4.1.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "0a677b8922c94e01bdbb12126b0bc852f00447528dee1782229af9c720c3f348" +checksum = "97fb8b7c4503de7d6ae7b42ab72a5a59857b4c937ec27a3d4539dba95b5ab2be" dependencies = [ "cfg-if", "cpufeatures", "curve25519-dalek-derive", "digest", "fiat-crypto", - "platforms", - "rustc_version 0.4.0", + "rustc_version 0.4.1", "subtle", "zeroize", ] @@ -270,18 +323,48 @@ checksum = "f46882e17999c6cc590af592290432be3bce0428cb0d5f8b6715e4dc7b383eb3" dependencies = [ "proc-macro2", "quote", - "syn 2.0.52", + "syn 2.0.87", +] + +[[package]] +name = "der" +version = "0.7.9" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f55bf8e7b65898637379c1b74eb1551107c8294ed26d855ceb9fd1a09cfc9bc0" +dependencies = [ + "const-oid", + "zeroize", +] + +[[package]] +name = "derive-syn-parse" +version = "0.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d65d7ce8132b7c0e54497a4d9a55a1c2a0912a0d786cf894472ba818fba45762" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.87", ] [[package]] name = "derive_more" -version = "0.99.17" +version = "1.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4fb810d30a7c1953f91334de7244731fc3f3c10d7fe163338a35b9f640960321" +checksum = "4a9b99b9cbbe49445b21764dc0625032a89b145a2642e67603e1c936f5458d05" +dependencies = [ + "derive_more-impl", +] + +[[package]] +name = "derive_more-impl" +version = "1.0.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "cb7330aeadfbe296029522e6c40f315320aba36fc43a5b3632f3795348f3bd22" dependencies = [ "proc-macro2", "quote", - "syn 1.0.109", + "syn 2.0.87", ] [[package]] @@ -291,10 +374,76 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "9ed9a281f7bc9b7576e61468ba615a66a5c8cfdff42420a70aa82701a3b1e292" dependencies = [ "block-buffer", + "const-oid", "crypto-common", "subtle", ] +[[package]] +name = "docify" +version = "0.2.9" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a772b62b1837c8f060432ddcc10b17aae1453ef17617a99bc07789252d2a5896" +dependencies = [ + "docify_macros", +] + +[[package]] +name = "docify_macros" +version = "0.2.9" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "60e6be249b0a462a14784a99b19bf35a667bb5e09de611738bb7362fa4c95ff7" +dependencies = [ + "common-path", + "derive-syn-parse", + "once_cell", + "proc-macro2", + "quote", + "regex", + "syn 2.0.87", + "termcolor", + "toml", + "walkdir", +] + +[[package]] +name = "ecdsa" +version = "0.16.9" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ee27f32b5c5292967d2d4a9d7f1e0b0aed2c15daded5a60300e4abb9d8020bca" +dependencies = [ + "der", + "digest", + "elliptic-curve", + "rfc6979", + "signature", + "spki", +] + +[[package]] +name = "ed25519" +version = "2.2.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "115531babc129696a58c64a4fef0a8bf9e9698629fb97e9e40767d235cfbcd53" +dependencies = [ + "signature", +] + +[[package]] +name = "ed25519-zebra" +version = "4.0.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "7d9ce6874da5d4415896cd45ffbc4d1cfc0c4f9c079427bd870742c30f2f65a9" +dependencies = [ + "curve25519-dalek", + "ed25519", + "hashbrown 0.14.5", + "hex", + "rand_core", + "sha2", + "zeroize", +] + [[package]] name = "efm32pg23_fix" version = "0.1.0" @@ -305,6 +454,25 @@ dependencies = [ "vcell", ] +[[package]] +name = "elliptic-curve" +version = "0.13.8" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "b5e6043086bf7973472e0c7dff2142ea0b680d30e18d9cc40f267efbf222bd47" +dependencies = [ + "base16ct", + "crypto-bigint", + "digest", + "ff", + "generic-array", + "group", + "pkcs8", + "rand_core", + "sec1", + "subtle", + "zeroize", +] + [[package]] name = "embedded-alloc" version = "0.5.1" @@ -371,11 +539,21 @@ version = "0.1.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "cf172ba7bfe5412e03c4dfd7d8e4b5f1e6cd0b7087fd61fa274b73f87ad94854" +[[package]] +name = "ff" +version = "0.13.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ded41244b729663b1e574f1b4fb731469f69f79c17667b5d776b16cda0479449" +dependencies = [ + "rand_core", + "subtle", +] + [[package]] name = "fiat-crypto" -version = "0.2.6" +version = "0.2.9" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1676f435fc1dadde4d03e43f5d62b259e1ce5f40bd4ffb21db2b42ebe59c1382" +checksum = "28dea519a9695b9977216879a3ebfddf92f1c08c05d984f8996aecd6ecdc811d" [[package]] name = "fixed-hash" @@ -397,9 +575,9 @@ dependencies = [ [[package]] name = "frame-metadata" -version = "16.0.0" +version = "18.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "87cf1549fba25a6fcac22785b61698317d958e96cac72a59102ea45b9ae64692" +checksum = "daaf440c68eb2c3d88e5760fe8c7af3f9fee9181fab6c2f2c4e7cc48dcc40bb8" dependencies = [ "cfg-if", "parity-scale-codec", @@ -420,6 +598,7 @@ checksum = "85649ca51fd72272d7821adaf274ad91c288277713d9c18820d8499a7ff69e9a" dependencies = [ "typenum", "version_check", + "zeroize", ] [[package]] @@ -431,11 +610,32 @@ dependencies = [ "rand_core", ] +[[package]] +name = "group" +version = "0.13.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f0f9ef7462f7c099f518d754361858f86d8a07af53ba9af0fe635bbccb151a63" +dependencies = [ + "ff", + "rand_core", + "subtle", +] + [[package]] name = "hashbrown" -version = "0.14.3" +version = "0.14.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "290f1a1d9242c78d09ce40a5e87e7554ee637af1351968159f4952f028f75604" +checksum = "e5274423e17b7c9fc20b6e7e208532f9b19825d82dfd615708b70edd83df41f1" +dependencies = [ + "ahash", + "allocator-api2", +] + +[[package]] +name = "hashbrown" +version = "0.15.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "3a9bfc1af68b1726ea47d3d5109de126281def866b33970e10fbab11b5dafab3" [[package]] name = "hex" @@ -465,12 +665,12 @@ dependencies = [ [[package]] name = "indexmap" -version = "2.2.5" +version = "2.6.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7b0b929d511467233429c45a44ac1dcaa21ba0f5ba11e4879e6ed28ddb4f9df4" +checksum = "707907fe3c25f5424cce2cb7e1cbcafee6bdbe735ca90ef77c29e84591e5b9da" dependencies = [ "equivalent", - "hashbrown", + "hashbrown 0.15.1", ] [[package]] @@ -482,6 +682,18 @@ dependencies = [ "num-traits", ] +[[package]] +name = "k256" +version = "0.13.4" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f6e3919bbaa2945715f0bb6d3934a173d1e9a59ac23767fbaaef277265a7411b" +dependencies = [ + "cfg-if", + "ecdsa", + "elliptic-curve", + "sha2", +] + [[package]] name = "kampela-display-common" version = "0.1.0" @@ -500,6 +712,7 @@ dependencies = [ "embedded-text", "external-memory-tools", "kampela-display-common", + "kampela-ui", "lazy_static", "lt-codes", "mnemonic-external", @@ -539,24 +752,24 @@ dependencies = [ [[package]] name = "lazy_static" -version = "1.4.0" +version = "1.5.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e2abad23fbc42b3700f2f279844dc832adb2b2eb069b2df918f455c4e18cc646" +checksum = "bbd2bcb4c963f2ddae06a2efc7e9f3591312473c50c6685e1f298068316e66fe" dependencies = [ "spin", ] [[package]] name = "libc" -version = "0.2.153" +version = "0.2.164" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "9c198f91728a82281a64e1f4f9eeb25d82cb32a5de251c6bd1b5154d63a8e7bd" +checksum = "433bfe06b8c75da9b2e3fbea6e5329ff87748f0b144ef75306e674c3f6f7c13f" [[package]] name = "libm" -version = "0.2.8" +version = "0.2.11" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4ec2a862134d2a7d32d7983ddcdd1c4923530833c9f2ea1a44fc5fa473989058" +checksum = "8355be11b20d696c8f18f6cc018c4e372165b1fa8126cef092399c9951984ffa" [[package]] name = "linked_list_allocator" @@ -577,9 +790,9 @@ dependencies = [ [[package]] name = "memchr" -version = "2.7.1" +version = "2.7.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "523dc4f511e55ab87b694dc30d0f820d60906ef06413f93d4d7a1385599cc149" +checksum = "78ca9ab1a0babb1e7d5695e3530886289c18cf2f87ec19a575a0abdce112e3a3" [[package]] name = "merlin" @@ -602,17 +815,18 @@ checksum = "bc4010833aea396656c2f91ee704d51a6f1329ec2ab56ffd00bfd56f7481ea94" [[package]] name = "mnemonic-external" version = "0.1.0" -source = "git+https://github.com/Alzymologist/mnemonic-external#ac8b4f027adec591ae16a4e284ca25c0ffda6c3d" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "acd8b607d24e1721a79eb4e30054fe776bf3956a87bd57f59c15fa1f72ad8721" dependencies = [ - "bitvec", "sha2", + "zeroize", ] [[package]] name = "nalgebra" -version = "0.32.4" +version = "0.32.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4541eb06dce09c0241ebbaab7102f0a01a0c8994afed2e5d0d66775016e25ac2" +checksum = "7b5c17de023a86f59ed79891b2e5d5a94c705dbe904a5b5c9c952ea6221b03e4" dependencies = [ "approx", "num-complex", @@ -654,20 +868,19 @@ checksum = "72ef4a56884ca558e5ddb05a1d1e7e1bfd9a68d9ed024c21704cc98872dae1bb" [[package]] name = "num-bigint" -version = "0.4.4" +version = "0.4.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "608e7659b5c3d7cba262d894801b9ec9d00de989e8a82bd4bef91d08da45cdc0" +checksum = "a5e44f723f1133c9deac646763579fdb3ac745e418f2a7af9cd0c431da1f20b9" dependencies = [ - "autocfg", "num-integer", "num-traits", ] [[package]] name = "num-complex" -version = "0.4.5" +version = "0.4.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "23c6602fda94a57c990fe0df199a035d83576b496aa29f4e634a8ac6004e68a6" +checksum = "73f88a1307638156682bada9d7604135552957b7818057dcef22705b4d509495" dependencies = [ "num-traits", ] @@ -683,20 +896,19 @@ dependencies = [ [[package]] name = "num-rational" -version = "0.4.1" +version = "0.4.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "0638a1c9d0a3c0914158145bc76cff373a75a627e6ecbfb71cbe6f453a5a19b0" +checksum = "f83d14da390562dca69fc84082e73e548e1ad308d24accdedd2720017cb37824" dependencies = [ - "autocfg", "num-integer", "num-traits", ] [[package]] name = "num-traits" -version = "0.2.18" +version = "0.2.19" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "da0df0e5185db44f69b44f26786fe401b6c293d1907744beaa7fa62b2e5a517a" +checksum = "071dfc062690e90b734c0b2273ce72ad0ffa95f0c74596bc250dcfd960262841" dependencies = [ "autocfg", "libm", @@ -710,40 +922,41 @@ checksum = "41af26158b0f5530f7b79955006c2727cd23d0d8e7c3109dc316db0a919784dd" [[package]] name = "once_cell" -version = "1.19.0" +version = "1.20.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3fdb12b2476b595f9358c5161aa467c2438859caa136dec86c26fdd2efe17b92" +checksum = "1261fe7e33c73b354eab43b1273a57c8f967d0391e80353e51f764ac02cf6775" [[package]] name = "parity-scale-codec" -version = "3.6.9" +version = "3.7.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "881331e34fa842a2fb61cc2db9643a8fedc615e47cfcc52597d1af0db9a7e8fe" +checksum = "8be4817d39f3272f69c59fe05d0535ae6456c2dc2fa1ba02910296c7e0a5c590" dependencies = [ - "arrayvec 0.7.4", + "arrayvec 0.7.6", "bitvec", "byte-slice-cast", "impl-trait-for-tuples", "parity-scale-codec-derive", + "rustversion", ] [[package]] name = "parity-scale-codec-derive" -version = "3.6.9" +version = "3.7.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "be30eaf4b0a9fba5336683b38de57bb86d179a35862ba6bfcf57625d006bde5b" +checksum = "8781a75c6205af67215f382092b6e0a4ff3734798523e69073d4bcd294ec767b" dependencies = [ - "proc-macro-crate 2.0.2", + "proc-macro-crate", "proc-macro2", "quote", - "syn 1.0.109", + "syn 2.0.87", ] [[package]] name = "paste" -version = "1.0.14" +version = "1.0.15" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "de3145af08024dea9fa9914f381a17b8fc6034dfb00f3a84013f7ff43f29ed4c" +checksum = "57c0d7b74b563b49d38dae00a0c37d4d6de9b432382b2892f0574ddcae73fd0a" [[package]] name = "pbkdf2" @@ -755,16 +968,20 @@ dependencies = [ ] [[package]] -name = "platforms" -version = "3.3.0" +name = "pkcs8" +version = "0.10.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "626dec3cac7cc0e1577a2ec3fc496277ec2baa084bebad95bb6fdbfae235f84c" +checksum = "f950b2377845cebe5cf8b5165cb3cc1a5e0fa5cfa3e1f7f55707d8fd82e0a7b7" +dependencies = [ + "der", + "spki", +] [[package]] name = "primitive-types" -version = "0.12.2" +version = "0.13.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "0b34d9fd68ae0b74a41b21c03c2f62847aa0ffea044eee893b4c140b37e244e2" +checksum = "d15600a7d856470b7d278b3fe0e311fe28c2526348549f8ef2ff7db3299c87f5" dependencies = [ "fixed-hash", "uint", @@ -772,29 +989,18 @@ dependencies = [ [[package]] name = "proc-macro-crate" -version = "1.3.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7f4c021e1093a56626774e81216a4ce732a735e5bad4868a03f3ed65ca0c3919" -dependencies = [ - "once_cell", - "toml_edit 0.19.15", -] - -[[package]] -name = "proc-macro-crate" -version = "2.0.2" +version = "3.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b00f26d3400549137f92511a46ac1cd8ce37cb5598a96d382381458b992a5d24" +checksum = "8ecf48c7ca261d60b74ab1a7b20da18bede46776b2e55535cb958eb595c5fa7b" dependencies = [ - "toml_datetime", - "toml_edit 0.20.2", + "toml_edit", ] [[package]] name = "proc-macro2" -version = "1.0.78" +version = "1.0.89" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e2422ad645d89c99f8f3e6b88a9fdeca7fabeac836b1002371c4367c8f984aae" +checksum = "f139b0662de085916d1fb67d2b4169d1addddda1919e696f3252b740b629986e" dependencies = [ "unicode-ident", ] @@ -807,9 +1013,9 @@ checksum = "d0e2c0bf8be8a1c4a4f48973dabf26943f05da2bfc2d3180aae62409dbba6f0c" [[package]] name = "quote" -version = "1.0.35" +version = "1.0.37" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "291ec9ab5efd934aaf503a6466c5d5251535d108ee747472c3977cc5acc868ef" +checksum = "b5b9d34b8991d19d98081b46eacdd8eb58c6f2b201139f7c5f643cc155a633af" dependencies = [ "proc-macro2", ] @@ -846,28 +1052,42 @@ dependencies = [ [[package]] name = "regex" -version = "1.10.3" +version = "1.11.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b62dbe01f0b06f9d8dc7d49e05a0785f153b00b2c227856282f671e0318c9b15" +checksum = "b544ef1b4eac5dc2db33ea63606ae9ffcfac26c1416a2806ae0bf5f56b201191" dependencies = [ + "aho-corasick", + "memchr", "regex-automata", "regex-syntax", ] [[package]] name = "regex-automata" -version = "0.4.6" +version = "0.4.9" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "86b83b8b9847f9bf95ef68afb0b8e6cdb80f498442f5179a29fad448fcc1eaea" +checksum = "809e8dc61f6de73b46c85f4c96486310fe304c434cfa43669d7b40f711150908" dependencies = [ + "aho-corasick", + "memchr", "regex-syntax", ] [[package]] name = "regex-syntax" -version = "0.8.2" +version = "0.8.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c08c74e62047bb2de4ff487b251e4a92e24f48745648451635cec7d591162d9f" +checksum = "2b15c43186be67a4fd63bee50d0303afffcef381492ebe2c5d87f324e1b8815c" + +[[package]] +name = "rfc6979" +version = "0.4.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f8dd2a808d456c4a54e300a23e9f5a67e122c3024119acbfd73e3bf664491cb2" +dependencies = [ + "hmac", + "subtle", +] [[package]] name = "rustc_version" @@ -880,18 +1100,33 @@ dependencies = [ [[package]] name = "rustc_version" -version = "0.4.0" +version = "0.4.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "bfa0f585226d2e68097d4f95d113b15b83a82e819ab25717ec0590d9584ef366" +checksum = "cfcb3a22ef46e85b45de6ee7e79d063319ebb6594faafcf1c225ea92ab6e9b92" dependencies = [ - "semver 1.0.22", + "semver 1.0.23", +] + +[[package]] +name = "rustversion" +version = "1.0.18" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0e819f2bc632f285be6d7cd36e25940d45b2391dd6d9b939e79de557f7014248" + +[[package]] +name = "same-file" +version = "1.0.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "93fc1dc3aaa9bfed95e02e6eadabb4baf7e3078b0bd1b4d7b6b0b68378900502" +dependencies = [ + "winapi-util", ] [[package]] name = "scale-info" -version = "2.10.0" +version = "2.11.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7f7d66a1128282b7ef025a8ead62a4a9fcf017382ec53b8ffbf4d7bf77bd3c60" +checksum = "1aa7ffc1c0ef49b0452c6e2986abf2b07743320641ffd5fc63d552458e3b779b" dependencies = [ "cfg-if", "derive_more", @@ -901,14 +1136,14 @@ dependencies = [ [[package]] name = "scale-info-derive" -version = "2.10.0" +version = "2.11.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "abf2c68b89cafb3b8d918dd07b42be0da66ff202cf1155c5739a4e0c1ea0dc19" +checksum = "46385cc24172cf615450267463f937c10072516359b3ff1cb24228a4a08bf951" dependencies = [ - "proc-macro-crate 1.3.1", + "proc-macro-crate", "proc-macro2", "quote", - "syn 1.0.109", + "syn 2.0.87", ] [[package]] @@ -918,7 +1153,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "8de18f6d8ba0aad7045f5feae07ec29899c1112584a38509a84ad7b04451eaa0" dependencies = [ "arrayref", - "arrayvec 0.7.4", + "arrayvec 0.7.6", "curve25519-dalek", "getrandom_or_panic", "merlin", @@ -928,6 +1163,20 @@ dependencies = [ "zeroize", ] +[[package]] +name = "sec1" +version = "0.7.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d3e97a565f76233a6003f9f5c54be1d9c5bdfa3eccfb189469f11ec4901c47dc" +dependencies = [ + "base16ct", + "der", + "generic-array", + "pkcs8", + "subtle", + "zeroize", +] + [[package]] name = "semver" version = "0.9.0" @@ -939,9 +1188,9 @@ dependencies = [ [[package]] name = "semver" -version = "1.0.22" +version = "1.0.23" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "92d43fe69e652f3df9bdc2b85b2854a0825b86e4fb76bc44d945137d053639ca" +checksum = "61697e0a1c7e512e84a621326239844a24d8207b4669b41bc18b32ea5cbf988b" [[package]] name = "semver-parser" @@ -949,6 +1198,35 @@ version = "0.7.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "388a1df253eca08550bef6c72392cfe7c30914bf41df5269b68cbd6ff8f570a3" +[[package]] +name = "serde" +version = "1.0.215" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "6513c1ad0b11a9376da888e3e0baa0077f1aed55c17f50e7b2397136129fb88f" +dependencies = [ + "serde_derive", +] + +[[package]] +name = "serde_derive" +version = "1.0.215" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ad1e866f866923f252f05c889987993144fb74e722403468a4ebd70c3cd756c0" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.87", +] + +[[package]] +name = "serde_spanned" +version = "0.6.8" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "87607cb1398ed59d48732e575a4c28a7a8ebf2454b964fe3f224f2afc07909e1" +dependencies = [ + "serde", +] + [[package]] name = "sha2" version = "0.10.8" @@ -970,6 +1248,16 @@ dependencies = [ "keccak", ] +[[package]] +name = "signature" +version = "2.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "77549399552de45a898a580c1b41d445bf730df867cc44e6c0233bbc4b8329de" +dependencies = [ + "digest", + "rand_core", +] + [[package]] name = "simba" version = "0.8.1" @@ -984,10 +1272,11 @@ dependencies = [ [[package]] name = "sp-arithmetic" -version = "25.0.0" +version = "26.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "910c07fa263b20bf7271fdd4adcb5d3217dfdac14270592e0780223542e7e114" +checksum = "46d0d0a4c591c421d3231ddd5e27d828618c24456d51445d21a1f79fcee97c23" dependencies = [ + "docify", "integer-sqrt", "num-traits", "parity-scale-codec", @@ -1018,9 +1307,19 @@ checksum = "12f8ee986414b0a9ad741776762f4083cd3a5128449b982a3919c4df36874834" [[package]] name = "spin" -version = "0.5.2" +version = "0.9.8" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6e63cff320ae2c57904679ba7cb63280a3dc4613885beafb148ee7bf9aa9042d" +checksum = "6980e8d7511241f8acf4aebddbb1ff938df5eebe98691418c4468d0b72a96a67" + +[[package]] +name = "spki" +version = "0.7.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d91ed6c858b01f942cd56b37a94b3e0a1798290327d1236e4d9cf4eaca44d29d" +dependencies = [ + "base64ct", + "der", +] [[package]] name = "static_assertions" @@ -1031,11 +1330,14 @@ checksum = "a2eb9349b6444b326872e140eb1cf5e7c522154d69e7a0ffb0fb81c06b37543f" [[package]] name = "substrate-crypto-light" version = "0.1.0" -source = "git+https://github.com/Alzymologist/substrate-crypto-light#7d933807f0ffaf150a069266083e8b2fc9cadf69" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "86eaa081c10ed391947506525a50da570841ccf93f83a642ff91f36732e91b51" dependencies = [ "base58", "blake2b_simd", + "ed25519-zebra", "hmac", + "k256", "lazy_static", "parity-scale-codec", "pbkdf2", @@ -1048,12 +1350,11 @@ dependencies = [ [[package]] name = "substrate_parser" -version = "0.6.1" -source = "git+https://github.com/Alzymologist/substrate-parser?rev=65de6a4fe207a64f9857247af4e9f7509fa6de4f#65de6a4fe207a64f9857247af4e9f7509fa6de4f" +version = "0.7.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "b7608864a21e2c356727f7ac0206252fb2c1cc4cee7c8539216528c6b54efca5" dependencies = [ - "base58", "bitvec", - "blake2", "external-memory-tools", "frame-metadata", "hex", @@ -1063,13 +1364,14 @@ dependencies = [ "scale-info", "sp-arithmetic", "sp-crypto-hashing", + "substrate-crypto-light", ] [[package]] name = "subtle" -version = "2.5.0" +version = "2.6.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "81cdd64d312baedb58e21336b31bc043b77e01cc99033ce76ef539f78e965ebc" +checksum = "13c2bddecc57b384dee18652358fb23172facb8a2c51ccc10d74c157bdea3292" [[package]] name = "syn" @@ -1084,9 +1386,9 @@ dependencies = [ [[package]] name = "syn" -version = "2.0.52" +version = "2.0.87" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b699d15b36d1f02c3e7c69f8ffef53de37aefae075d8488d4ba1a7788d574a07" +checksum = "25aa4ce346d03a6dcd68dd8b4010bcb74e54e62c90c573f394c46eae99aba32d" dependencies = [ "proc-macro2", "quote", @@ -1100,29 +1402,44 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "55937e1799185b12863d447f42597ed69d9928686b8d88a1df17376a097d8369" [[package]] -name = "toml_datetime" -version = "0.6.3" +name = "termcolor" +version = "1.4.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7cda73e2f1397b1262d6dfdcef8aafae14d1de7748d66822d3bfeeb6d03e5e4b" +checksum = "06794f8f6c5c898b3275aebefa6b8a1cb24cd2c6c79397ab15774837a0bc5755" +dependencies = [ + "winapi-util", +] [[package]] -name = "toml_edit" -version = "0.19.15" +name = "toml" +version = "0.8.19" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1b5bb770da30e5cbfde35a2d7b9b8a2c4b8ef89548a7a6aeab5c9a576e3e7421" +checksum = "a1ed1f98e3fdc28d6d910e6737ae6ab1a93bf1985935a1193e68f93eeb68d24e" dependencies = [ - "indexmap", + "serde", + "serde_spanned", "toml_datetime", - "winnow", + "toml_edit", +] + +[[package]] +name = "toml_datetime" +version = "0.6.8" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0dd7358ecb8fc2f8d014bf86f6f638ce72ba252a2c3a2572f2a795f1d23efb41" +dependencies = [ + "serde", ] [[package]] name = "toml_edit" -version = "0.20.2" +version = "0.22.22" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "396e4d48bbb2b7554c944bde63101b5ae446cff6ec4a24227428f15eb72ef338" +checksum = "4ae48d6208a266e853d946088ed816055e556cc6028c5e8e2b84d9fa5dd7c7f5" dependencies = [ "indexmap", + "serde", + "serde_spanned", "toml_datetime", "winnow", ] @@ -1146,9 +1463,9 @@ checksum = "42ff0bf0c66b8238c6f3b578df37d0b7848e55df8577b3f74f92a69acceeb825" [[package]] name = "uint" -version = "0.9.5" +version = "0.10.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "76f64bba2c53b04fcab63c01a7d7427eadc821e3bc48c34dc9ba29c501164b52" +checksum = "909988d098b2f738727b161a106cfc7cab00c539c2687a8836f8e565976fb53e" dependencies = [ "byteorder", "crunchy", @@ -1158,9 +1475,9 @@ dependencies = [ [[package]] name = "unicode-ident" -version = "1.0.12" +version = "1.0.13" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3354b9ac3fae1ff6755cb6db53683adb661634f67557942dea4facebec0fee4b" +checksum = "e91b56cd4cadaeb79bbf1a5645f6b4f8dc5bde8834ad5894a8db35fda9efa1fe" [[package]] name = "vcell" @@ -1170,9 +1487,9 @@ checksum = "77439c1b53d2303b20d9459b1ade71a83c716e3f9c34f3228c00e6f185d6c002" [[package]] name = "version_check" -version = "0.9.4" +version = "0.9.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "49874b5167b65d7193b8aba1567f5c7d93d001cafc34600cee003eda787e483f" +checksum = "0b928f33d975fc6ad9f86c8f283853ad26bdd5b10b7f1542aa2fa15e2289105a" [[package]] name = "void" @@ -1189,11 +1506,103 @@ dependencies = [ "vcell", ] +[[package]] +name = "walkdir" +version = "2.5.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "29790946404f91d9c5d06f9874efddea1dc06c5efe94541a7d6863108e3a5e4b" +dependencies = [ + "same-file", + "winapi-util", +] + +[[package]] +name = "winapi-util" +version = "0.1.9" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "cf221c93e13a30d793f7645a0e7762c55d169dbb0a49671918a2319d289b10bb" +dependencies = [ + "windows-sys", +] + +[[package]] +name = "windows-sys" +version = "0.59.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "1e38bc4d79ed67fd075bcc251a1c39b32a1776bbe92e5bef1f0bf1f8c531853b" +dependencies = [ + "windows-targets", +] + +[[package]] +name = "windows-targets" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "9b724f72796e036ab90c1021d4780d4d3d648aca59e491e6b98e725b84e99973" +dependencies = [ + "windows_aarch64_gnullvm", + "windows_aarch64_msvc", + "windows_i686_gnu", + "windows_i686_gnullvm", + "windows_i686_msvc", + "windows_x86_64_gnu", + "windows_x86_64_gnullvm", + "windows_x86_64_msvc", +] + +[[package]] +name = "windows_aarch64_gnullvm" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "32a4622180e7a0ec044bb555404c800bc9fd9ec262ec147edd5989ccd0c02cd3" + +[[package]] +name = "windows_aarch64_msvc" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "09ec2a7bb152e2252b53fa7803150007879548bc709c039df7627cabbd05d469" + +[[package]] +name = "windows_i686_gnu" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "8e9b5ad5ab802e97eb8e295ac6720e509ee4c243f69d781394014ebfe8bbfa0b" + +[[package]] +name = "windows_i686_gnullvm" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0eee52d38c090b3caa76c563b86c3a4bd71ef1a819287c19d586d7334ae8ed66" + +[[package]] +name = "windows_i686_msvc" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "240948bc05c5e7c6dabba28bf89d89ffce3e303022809e73deaefe4f6ec56c66" + +[[package]] +name = "windows_x86_64_gnu" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "147a5c80aabfbf0c7d901cb5895d1de30ef2907eb21fbbab29ca94c5b08b1a78" + +[[package]] +name = "windows_x86_64_gnullvm" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "24d5b23dc417412679681396f2b49f3de8c1473deb516bd34410872eff51ed0d" + +[[package]] +name = "windows_x86_64_msvc" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "589f6da84c646204747d1270a2a5661ea66ed1cced2631d546fdfb155959f9ec" + [[package]] name = "winnow" -version = "0.5.40" +version = "0.6.20" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f593a95398737aeed53e489c785df13f3618e41dbcd6718c6addbf1395aa6876" +checksum = "36c1fec1a2bb5866f07c25f68c26e565c4c200aebb96d7e55710c19d3e8ac49b" dependencies = [ "memchr", ] @@ -1207,11 +1616,31 @@ dependencies = [ "tap", ] +[[package]] +name = "zerocopy" +version = "0.7.35" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "1b9b4fd18abc82b8136838da5d50bae7bdea537c574d8dc1a34ed098d6c166f0" +dependencies = [ + "zerocopy-derive", +] + +[[package]] +name = "zerocopy-derive" +version = "0.7.35" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "fa4f8080344d4671fb4e831a13ad1e68092748387dfc4f55e356242fae12ce3e" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.87", +] + [[package]] name = "zeroize" -version = "1.7.0" +version = "1.8.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "525b4ec142c6b68a2d10f01f7bbf6755599ca3f81ea53b8431b7dd348f5fdb2d" +checksum = "ced3678a2879b30306d323f4542626697a464a97c0a07c9aebf7ebca65cd4dde" dependencies = [ "zeroize_derive", ] @@ -1224,5 +1653,5 @@ checksum = "ce36e65b0d2999d2aafac989fb249189a141aee1f53c612c1f37d72631959f69" dependencies = [ "proc-macro2", "quote", - "syn 2.0.52", + "syn 2.0.87", ] diff --git a/kampela/Cargo.toml b/kampela/Cargo.toml index 018d992..731e328 100644 --- a/kampela/Cargo.toml +++ b/kampela/Cargo.toml @@ -5,8 +5,8 @@ name = "app" version = "0.10.0" [dependencies] -cortex-m = { version = "0.7.6", features = ["critical-section-single-core"]} -cortex-m-rt = "0.7.2" +cortex-m = { version = "0.7.7", features = ["critical-section-single-core"]} +cortex-m-rt = "0.7.3" efm32pg23_fix = {path = "../kampela_experiments_efm32pg23/efm32pg23_fix", features = ["critical-section", "rt"]} embedded-alloc = "0.5.0" # embedded-alloc required nightly! embedded-graphics = "0.7.1" @@ -17,9 +17,10 @@ lazy_static = { version = "1.4.0", default-features = false, features = ["spin_n lt-codes = {git = "https://github.com/Alzymologist/LT-codes", default-features = false} nalgebra = { version = "0.32.2", default-features = false, features = ["libm"] } nfca-parser = { git = "https://github.com/Alzymologist/NfcA-parser", default-features = false } -substrate-crypto-light = {git = "https://github.com/Alzymologist/substrate-crypto-light", default-features = false, features = ["sr25519"]} -substrate_parser = {git = "https://github.com/Alzymologist/substrate-parser", default-features = false, rev = "65de6a4fe207a64f9857247af4e9f7509fa6de4f"} +substrate-crypto-light = { version = "0.1.0", default-features = false, features = ["sr25519"] } +substrate_parser = { version = "0.7.0", default-features = false } [profile.release] codegen-units = 1 +opt-level = 2 lto = true diff --git a/kampela/src/main.rs b/kampela/src/main.rs index f9294e1..d21d73d 100644 --- a/kampela/src/main.rs +++ b/kampela/src/main.rs @@ -6,38 +6,36 @@ extern crate alloc; extern crate core; -use alloc::{borrow::ToOwned, format}; -use core::{alloc::Layout, panic::PanicInfo}; -use core::ptr::addr_of; -use cortex_m::asm::delay; +use alloc::{borrow::ToOwned, boxed::Box, format}; +use core::{alloc::Layout, cell::RefCell, ops::DerefMut, panic::PanicInfo, ptr::addr_of}; +use cortex_m::{interrupt::{free, Mutex}, asm::delay}; use cortex_m_rt::{entry, exception, ExceptionFrame}; + use embedded_alloc::Heap; use lazy_static::lazy_static; -use efm32pg23_fix::{interrupt, Interrupt, NVIC, Peripherals}; -use kampela_ui::platform::Platform; +use kampela_system::{ + debug_display::burning_tank, devices::{power::ADC, touch::{clear_touch_if, enable_touch_int, is_touch_int, Read, FT6X36_REG_NUM_TOUCHES, LEN_NUM_TOUCHES}}, init::init_peripherals, parallel::{AsyncOperation, Threads}, NfcXfer, NfcXferBlock, BUF_THIRD, CH_TIM0, CORE_PERIPHERALS, LINK_1, LINK_2, LINK_DESCRIPTORS, PERIPHERALS, TIMER0_CC0_ICF +}; +use efm32pg23_fix::{interrupt, Interrupt, Peripherals, NVIC, SYST}; mod ui; -use ui::UI; +use ui::{UIOperationThreads, UI}; mod nfc; use nfc::{BufferStatus, NfcReceiver, NfcStateOutput, NfcResult, NfcError}; +mod touch; +use touch::Touches; #[global_allocator] static HEAP: Heap = Heap::empty(); -use kampela_system::{ - PERIPHERALS, CORE_PERIPHERALS, - devices::power::ADC, - debug_display::burning_tank, - init::init_peripherals, - parallel::Operation, - BUF_THIRD, CH_TIM0, LINK_1, LINK_2, LINK_DESCRIPTORS, TIMER0_CC0_ICF, NfcXfer, NfcXferBlock, -}; +use core::mem::MaybeUninit; +const HEAP_SIZE: usize = 0x6500; +static mut HEAP_MEM: [MaybeUninit; HEAP_SIZE] = [MaybeUninit::uninit(); HEAP_SIZE]; -use core::cell::RefCell; -use core::ops::DerefMut; -use cortex_m::interrupt::free; -use cortex_m::interrupt::Mutex; +unsafe fn init_heap() { + HEAP.init(HEAP_MEM.as_ptr() as usize, HEAP_SIZE) +} lazy_static!{ #[derive(Debug)] @@ -60,6 +58,7 @@ fn oom(l: Layout) -> ! { #[panic_handler] fn panic(panic: &PanicInfo<'_>) -> ! { let mut peripherals = unsafe{Peripherals::steal()}; + unsafe { init_heap(); } // free up heap for critical drawing buffer burning_tank(&mut peripherals, format!("{:?}", panic)); loop {} } @@ -73,12 +72,12 @@ unsafe fn HardFault(exception_frame: &ExceptionFrame) -> ! { fn LDMA() { free(|cs| { if let Some(ref mut peripherals) = PERIPHERALS.borrow(cs).borrow_mut().deref_mut() { - peripherals.LDMA_S.if_.reset(); + peripherals.ldma_s.if_().reset(); let mut buffer_status = BUFFER_STATUS.borrow(cs).borrow_mut(); match buffer_status.pass_if_done7() { Ok(_) => { if !buffer_status.is_write_halted() { - peripherals.LDMA_S.linkload.write(|w_reg| w_reg.linkload().variant(1 << CH_TIM0)); + peripherals.ldma_s.linkload().write(|w_reg| unsafe { w_reg.linkload().bits(1 << CH_TIM0) }); } }, Err(_) => {} @@ -90,13 +89,7 @@ fn LDMA() { #[entry] fn main() -> ! { - { - use core::mem::MaybeUninit; - const HEAP_SIZE: usize = 0x6500; - static mut HEAP_MEM: [MaybeUninit; HEAP_SIZE] = [MaybeUninit::uninit(); HEAP_SIZE]; - unsafe { HEAP.init(HEAP_MEM.as_ptr() as usize, HEAP_SIZE) } - } - + unsafe { init_heap(); } let nfc_buffer: [u16; 3*BUF_THIRD] = [1; 3*BUF_THIRD]; @@ -127,8 +120,20 @@ fn main() -> ! { delay(1000); + free(|cs| { + PERIPHERALS.borrow(cs).replace(Some(peripherals)); + }); + + delay(1000); + free(|cs| { let mut core_periph = CORE_PERIPHERALS.borrow(cs).borrow_mut(); + // Errata CUR_E302 fix + // enable FPU to reduce power consumption in EM1 + unsafe { + core_periph.SCB.cpacr.modify(|w_reg| w_reg | (3 << 20) | (3 << 22)); + } + NVIC::unpend(Interrupt::LDMA); NVIC::mask(Interrupt::LDMA); unsafe { @@ -137,13 +142,6 @@ fn main() -> ! { } }); - delay(1000); - - - free(|cs| { - PERIPHERALS.borrow(cs).replace(Some(peripherals)); - }); - //let pair_derived = Keypair::from_bytes(ALICE_KAMPELA_KEY).unwrap(); // Development: erase seed when Pilkki can't @@ -158,9 +156,6 @@ fn main() -> ! { }); */ - let mut ui = UI::init(); - let mut adc = ADC::new(()); - // hard derivation //let junction = DeriveJunction::hard("kampela"); // let pair_derived = pair @@ -168,85 +163,165 @@ fn main() -> ! { // .0 // .expand_to_keypair(ExpansionMode::Ed25519); + // initialize SYST for Timer + free(|cs| { + let mut core_periph = CORE_PERIPHERALS.borrow(cs).borrow_mut(); + core_periph.SYST.set_clock_source(cortex_m::peripheral::syst::SystClkSource::Core); + core_periph.SYST.set_reload(SYST::get_ticks_per_10ms()); + core_periph.SYST.clear_current(); + core_periph.SYST.enable_counter(); + }); - let mut nfc = NfcReceiver::new(&nfc_buffer, ui.state.platform.public().map(|a| a.0)); + let mut main_state = MainState::new(&nfc_buffer); loop { - adc.advance(()); - let nfc_state = nfc.advance(adc.read()); - if let Some(s) = nfc_state { - match s { - Err(e) => { - match e { - NfcError::InvalidAddress => { - ui.handle_message("Invalid sender address".to_owned()) - } - } - while !ui.advance(adc.read()).is_some_and(|c| c == true) { - adc.advance(()); - } - break - } - Ok(s) => { + main_state.advance(()); + } +} + +enum MainStatus<'a> { + ADCProbe, + NFCRead(NfcReceiver<'a>), + Display(Option, Box), + TouchRead(Option>), +} + +impl<'a> Default for MainStatus<'a> { + fn default() -> Self { + MainStatus::ADCProbe + } +} + +struct MainState<'a> { + threads: Threads, 3>, + adc: ADC, + ui: Option>, + touches: Touches, +} + +impl<'a> AsyncOperation for MainState<'a> { + type Init = &'a [u16; 3*BUF_THIRD]; + type Input<'b> = (); + type Output = (); + /// Start of UI. + fn new(nfc_buffer: Self::Init) -> Self { + let ui = UI::new(()); + let receiver = NfcReceiver::new(nfc_buffer); + clear_touch_if(); + + return Self { + threads: Threads::from([ + MainStatus::ADCProbe, + MainStatus::NFCRead(receiver), + ]), + adc: ADC::new(()), + ui: Some(Box::new(ui)), + touches: Touches::new() + } + } + + /// Call in event loop to progress through Kampela states + fn advance(&mut self, _: ()) { + match self.threads.turn() { + MainStatus::ADCProbe => { + self.adc.advance(()); + }, + MainStatus::NFCRead(receiver) => { + if let Some(s) = receiver.advance(self.adc.read()) { match s { - NfcStateOutput::Operational(i) => { - if i == 1 { - ui.handle_message("Receiving NFC packets...".to_owned()); + Err(e) => { + match e { + NfcError::InvalidAddress => { + if let Some(ref mut u) = self.ui { + u.handle_message("Invalid sender address".to_owned()) + } + } } - while !ui.advance(adc.read()).is_some_and(|c| c == false) { - adc.advance(()); + if let Some(u) = self.ui.take() { + self.threads.change(MainStatus::Display(None, u)); } - }, - NfcStateOutput::Done(r) => { - match r { - NfcResult::Empty => {break}, - NfcResult::DisplayAddress => { - ui.handle_address([0;76]); - break + } + Ok(s) => { + match s { + NfcStateOutput::Operational(i) => { + if i == 1 { + if let Some(ref mut u) = self.ui { + u.handle_message("Receiving NFC packets...".to_owned()); + } + if !self.threads.is_all_running(&[ + |s| matches!(s, MainStatus::Display(..)) + ]) { + if let Some(u) = self.ui.take() { + self.threads.wind(MainStatus::Display(None, u)); + } + }; + } }, - NfcResult::Transaction(transaction) => { - ui.handle_transaction(transaction); - break - - - /* // calculate correct hash of the payload - { - let mut hasher = sha2::Sha256::new(); - in_free(|peripherals| { - for shift in 0..nfc_payload.encoded_data.total_len { - let address = nfc_payload.encoded_data.start_address.try_shift(shift).unwrap(); - let single_element_vec = psram_read_at_address(peripherals, address, 1usize).unwrap(); - if shift == 0 {first_byte = Some(single_element_vec[0])} - hasher.update(&single_element_vec); + NfcStateOutput::Done(r) => { + match r { + NfcResult::Empty => { + if !self.threads.is_all_running(&[ + |s| matches!(s, MainStatus::Display(..)) + ]) { + if let Some(u) = self.ui.take() { + self.threads.wind(MainStatus::Display(None, u)); + } + }; + }, + NfcResult::DisplayAddress => { + self.threads.try_change_any(|status| { + if let MainStatus::Display(_, ui) = status { + ui.handle_address([0;76]); + } + }); + }, + NfcResult::Transaction(transaction) => { + self.threads.try_change_any(|status| { + if let MainStatus::Display(_, ui) = status { + ui.handle_transaction(transaction.clone()); + } + }); + } + } + enable_touch_int(); + self.threads.change(MainStatus::TouchRead(None)); } - }); - let hash = hasher.finalize(); - - // transform signature and verifying key from der-encoding into usable form - let signature = Signature::from_der(&nfc_payload.companion_signature).unwrap(); - let verifying_key = VerifyingKey::from_public_key_der(&nfc_payload.companion_public_key).unwrap(); - - // and check - assert!(verifying_key - .verify_prehash(&hash, &signature) - .is_ok()); - - } - */ - - }, } } } } - } - - + }, + MainStatus::Display(state, ui) => { + match state { + None => { + *state = Some(UIOperationThreads::new()); + } + Some(t) => { + if ui.advance((self.adc.read(), &mut self.touches, t)) == Some(false) { + self.threads.hold(); + } + } + } + }, + MainStatus::TouchRead(state) => { + match state { + None => { + if is_touch_int() { + self.threads.change(MainStatus::TouchRead(Some(Read::new(())))); + } + }, + Some(reader) => { + match reader.advance(()) { + Ok(Some(Some(touch))) => { + self.touches.try_push_touch_data(touch); + self.threads.change(MainStatus::TouchRead(None)); + }, + Ok(Some(None)) => {self.threads.hold()}, + Ok(None) => {} + Err(e) => panic!("{:?}", e), + } + } + } + }, } } - loop { - adc.advance(()); - ui.advance(adc.read()); - } } - - diff --git a/kampela/src/nfc.rs b/kampela/src/nfc.rs index abe1637..0bfdc9a 100644 --- a/kampela/src/nfc.rs +++ b/kampela/src/nfc.rs @@ -1,12 +1,12 @@ //! NFC packet collector and decoder use nfca_parser::frame::Frame; -use alloc::vec::Vec; use kampela_system::{ PERIPHERALS, in_free, BUF_THIRD, CH_TIM0, }; use cortex_m::interrupt::free; +use substrate_crypto_light::sr25519::PUBLIC_LEN; use crate::BUFFER_STATUS; use efm32pg23_fix::{NVIC,Interrupt}; @@ -140,7 +140,7 @@ pub fn turn_nfc_collector_correctly(collector: &mut NfcCollector, nfc_buffer: &[ buffer_status.pass_read_done().expect("to do"); if was_write_halted & ! buffer_status.is_write_halted() { if let Some(ref mut peripherals) = PERIPHERALS.borrow(cs).borrow_mut().deref_mut() { - peripherals.LDMA_S.linkload.write(|w_reg| w_reg.linkload().variant(1 << CH_TIM0)); + peripherals.ldma_s.linkload().write(|w_reg| unsafe { w_reg.linkload().bits(1 << CH_TIM0) }); } else {panic!("can not borrow peripherals, buffer_status: {:?}, got some new frames", buffer_status)} } @@ -270,13 +270,16 @@ pub fn process_nfc_payload(completed_collector: &ExternalData) -> */ } +#[derive(Clone)] pub struct NfcTransactionPsramAccess { + pub sender_public_key_psram_access: PsramAccess, pub call_psram_access: PsramAccess, pub extension_psram_access: PsramAccess, pub metadata_psram_access: PsramAccess, pub genesis_hash_bytes_psram_access: PsramAccess, } +//TODO: implement more error cases, i.e. old specs pub enum NfcError { InvalidAddress, } @@ -301,25 +304,14 @@ pub struct NfcReceiver <'a> { buffer: &'a [u16; 3*BUF_THIRD], collector: NfcCollector, state: NfcState, - public_memory: [u8; 32], } impl <'a> NfcReceiver<'a> { - pub fn new(nfc_buffer: &'a [u16; 3*BUF_THIRD], public_memory: Option<[u8; 32]>) -> Self { - match public_memory { - Some(a) => Self { - buffer: nfc_buffer, - collector: NfcCollector::new(), - state: NfcState::Operational(0), - public_memory: a, - }, - None => - Self { - buffer: nfc_buffer, - collector: NfcCollector::new(), - state: NfcState::Done, - public_memory: [0u8; 32], - }, + pub fn new(nfc_buffer: &'a [u16; 3*BUF_THIRD]) -> Self { + Self { + buffer: nfc_buffer, + collector: NfcCollector::new(), + state: NfcState::Operational(0), } } @@ -387,31 +379,17 @@ impl <'a> NfcReceiver<'a> { let call_to_sign_psram_access = PsramAccess{start_address: call_address_to_sign, total_len: compact_call.compact as usize}; let extension_to_sign_psram_access = PsramAccess{start_address: extension_address_to_sign, total_len: extension_len_to_sign}; - data_to_sign_psram_access = Some((call_to_sign_psram_access, extension_to_sign_psram_access)); position = compact_transaction_2.start_next_unit + compact_transaction_2.compact as usize; - }); - let (call_to_sign_psram_access, extension_to_sign_psram_access) = data_to_sign_psram_access.unwrap(); - let mut public_key: Option> = None; - in_free(|peripherals| { let start_address = payload.encoded_data.start_address.try_shift(position).unwrap(); - let k = psram_read_at_address(peripherals, start_address, 32usize).unwrap(); - public_key = Some(k); + let sender_public_key_psram_access = PsramAccess{start_address, total_len: PUBLIC_LEN}; + data_to_sign_psram_access = Some((sender_public_key_psram_access, call_to_sign_psram_access, extension_to_sign_psram_access)); }); - // TODO: check address differently - match public_key { - None => { - return Some(Err(NfcError::InvalidAddress)) - }, - Some(k) => { - if k != self.public_memory { - return Some(Err(NfcError::InvalidAddress)) - } - } - } + let (sender_public_key_psram_access, call_to_sign_psram_access, extension_to_sign_psram_access) = data_to_sign_psram_access.unwrap(); return Some(Ok(NfcResult::Transaction(NfcTransactionPsramAccess{ + sender_public_key_psram_access, call_psram_access: call_to_sign_psram_access, extension_psram_access: extension_to_sign_psram_access, metadata_psram_access, diff --git a/kampela/src/touch.rs b/kampela/src/touch.rs index edde79c..8983db6 100644 --- a/kampela/src/touch.rs +++ b/kampela/src/touch.rs @@ -1,48 +1,113 @@ -//! Asynchronous touchpad query +use alloc::collections::vec_deque::VecDeque; +use nalgebra::{Affine2, OMatrix, Point2, RowVector3}; +use lazy_static::lazy_static; +use embedded_graphics::prelude::Point; -pub struct TouchState { - state: touch::Read, +use kampela_system::devices::touch::{clear_touch_if, LEN_NUM_TOUCHES}; +use kampela_ui::display_def::*; + +pub const MAX_TOUCH_QUEUE: usize = 2; + +lazy_static! { + // MAGIC calibration numbers obtained through KOLIBRI tool + static ref AFFINE_MATRIX: Affine2 = Affine2::from_matrix_unchecked( + OMatrix::from_rows(&[ + RowVector3::::new(1.0022, -0.0216, -4.2725), + RowVector3::::new(0.0061, 1.1433, -13.7305), + RowVector3::::new(0.0, 0.0, 1.0), + ]) + ); } -impl TouchState { - pub fn new(&mut self) -> Self { - Self { - state: touch::Read::new(); - } +pub struct Touches(VecDeque); + +impl Touches { + pub fn new() -> Self { + Self(VecDeque::with_capacity(MAX_TOUCH_QUEUE)) } - pub fn query_touch(&mut self, peripherals: &mut Peripherals) -> Option { - - if let Some(touch_data) = self.advance() { - peripherals - .GPIO_S - .if_ - .write(|w_reg| w_reg.extif0().clear_bit()); - if touch_data[0] == 1 { - let detected_y = (((touch_data[1] as u16 & 0b00001111) << 8) | touch_data[2] as u16) as i32; - let detected_x = (((touch_data[3] as u16 & 0b00001111) << 8) | touch_data[4] as u16) as i32; - let touch = Point::new(SCREEN_SIZE_X as i32 - detected_x, detected_y); - - let touch_as_point2 = Point2::new(touch.x as f32, touch.y as f32); - let display_as_point2 = affine_matrix.transform_point(&touch_as_point2); - - Some( Point { - x: display_as_point2.coords[0] as i32, - y: display_as_point2.coords[1] as i32, - }) - } else { None } - } else { None } + pub fn try_push_touch_data(&mut self, touch_data: [u8; LEN_NUM_TOUCHES]) -> bool { + clear_touch_if(); + if self.0.len() < MAX_TOUCH_QUEUE { + if let Some(point) = convert(touch_data) { + self.0.push_back(point); + return true + } + } + false } + + pub fn take_touch_point(&mut self) -> Option { + self.0.pop_front() + } +} + +pub fn convert(touch_data: [u8; LEN_NUM_TOUCHES]) -> Option { + if touch_data[0] == 1 { + let detected_y = (((touch_data[1] as u16 & 0b00001111) << 8) | touch_data[2] as u16) as i32; + let detected_x = (((touch_data[3] as u16 & 0b00001111) << 8) | touch_data[4] as u16) as i32; + let touch = Point::new(SCREEN_SIZE_X as i32 - detected_x, detected_y); - fn advance(&mut self) -> Option<[u8; LEN_NUM_TOUCHES]> { -free(|cs| { - if let Some(ref mut peripherals) = PERIPHERALS.borrow(cs).borrow_mut().deref_mut() { - if peripherals.GPIO_S.if_.read().extif0().bit_is_set() { - self.status = UIStatus::TouchState(ft6336_read_at::(peripherals, FT6X36_REG_NUM_TOUCHES).unwrap()); + let touch_as_point2 = Point2::new(touch.x as f32, touch.y as f32); + let display_as_point2 = AFFINE_MATRIX.transform_point(&touch_as_point2); + + Some( + Point { + x: display_as_point2.coords[0] as i32, + y: display_as_point2.coords[1] as i32, + } + ) + } else { None } +} +/* +fn blocking_touch_read() -> Point { + let mut state: Option> = None; + clear_touch_if(); + let touch_data = loop { + match &mut state { + None => { + if is_touch_int() { + state = Some(Read::new(())); + } + }, + Some(reader) => { + match reader.advance(()) { + Ok(Some(Some(touch))) => { + break touch; + }, + Ok(Some(None)) => {}, + Ok(None) => {} + Err(e) => panic!("{:?}", e), } } + } + }; + + let detected_y = (((touch_data[1] as u16 & 0b00001111) << 8) | touch_data[2] as u16) as i32; + let detected_x = (((touch_data[3] as u16 & 0b00001111) << 8) | touch_data[4] as u16) as i32; + Point::new(SCREEN_SIZE_X as i32 - detected_x, detected_y) +} + +pub fn kolibri_test() { + // Prepare + let mut display = FrameBuffer::new_white(); + + let mut rng = se_rng::SeRng{}; + + let mut state = UIState::init(&mut rng); + + let mut do_update = true; + loop { + if do_update { + state.render(&mut display).unwrap(); + do_update = false; + } + in_free(|peripherals| { + display.apply(peripherals); }); - None + let point = blocking_touch_read(); + do_update = state.process_touch(point, &mut rng).unwrap(); } } +*/ \ No newline at end of file diff --git a/kampela/src/ui.rs b/kampela/src/ui.rs index c89a1c6..8d24467 100644 --- a/kampela/src/ui.rs +++ b/kampela/src/ui.rs @@ -1,129 +1,74 @@ //! Everything high-level related to interfacing with user - -use nalgebra::{Affine2, OMatrix, Point2, RowVector3}; -use alloc::{collections::VecDeque, string::String, vec::Vec}; -use lazy_static::lazy_static; -use substrate_crypto_light::sr25519::{Pair, Public}; -use embedded_graphics::{ - prelude::Point, - geometry::Dimensions, -}; +use alloc::{borrow::ToOwned, string::String, vec::Vec}; +use substrate_crypto_light::sr25519::Public; use kampela_system::{ devices::{ + flash::{read_encoded_entropy, store_encoded_entopy}, psram::{psram_decode_call, psram_decode_extension, read_from_psram, PsramAccess}, se_aes_gcm::{decode_entropy, encode_entropy, Protected}, - se_rng, - touch::{touch_detected, Read, FT6X36_REG_NUM_TOUCHES, LEN_NUM_TOUCHES} - }, draw::FrameBuffer, flash_mnemonic::FlashWordList, parallel::Operation + se_rng + }, + draw::{DisplayOperationThreads, FrameBuffer}, + flash_mnemonic::FlashWordList, + parallel::{AsyncOperation, Threads} }; -use kampela_system::devices::flash::*; -use crate::nfc::NfcTransactionPsramAccess; +use crate::{nfc::NfcTransactionPsramAccess, touch::Touches}; use kampela_ui::{ - display_def::*, platform::{PinCode, Platform}, uistate::{UIState, UpdateRequest, UpdateRequestMutate} }; -const MAX_TOUCH_QUEUE: usize = 2; - /// UI handler pub struct UI { pub state: UIState, - status: UIStatus, - touches: VecDeque, - touched: bool, update_request: Option, + display_threads: DisplayOperationThreads, } -impl UI { - /// Start of UI. - pub fn init() -> Self { - let hardware = Hardware::new(); - let display = FrameBuffer::new_white(); - let state = UIState::new(hardware, display, &mut ()); - return Self { - state, - status: UIStatus::DisplayOrListen(UIStatusDisplay::Listen), - touches: VecDeque::new(), - touched: false, - update_request: Some(UpdateRequest::Slow), - } +pub struct UIOperationThreads(Threads); + +impl core::ops::Deref for UIOperationThreads { + type Target = Threads; + + fn deref(&self) -> &Self::Target { + &self.0 } +} - /// Call in event loop to progress through UI state - pub fn advance(&mut self, voltage: i32) -> Option { - match self.status { - UIStatus::DisplayOrListen(ref mut status) => { - // read input if possible - if touch_detected().unwrap_or(false) { - if self.touched == false && !matches!(status, UIStatusDisplay::DisplayOperation(UpdateRequest::Slow)) { - self.touched = true; - self.status = UIStatus::TouchOperation(Read::new(()), core::mem::take( status)); - return None - } - } else { - self.touched = false; - } - match status { - UIStatusDisplay::Listen => { - self.listen(); - Some(true) // done operations - }, - UIStatusDisplay::DisplayOperation(_) => { - match self.state.display.advance(voltage) { - Some(c) => { - if c { - self.status = UIStatus::DisplayOrListen(UIStatusDisplay::Listen); - } - Some(false) - }, - None => None, // not enough energy to start screen update - } - }, - } - } - UIStatus::TouchOperation(ref mut touch, ref mut next) => { - match touch.advance(()) { - Ok(Some(touch)) => { - if self.touches.len() < MAX_TOUCH_QUEUE { - if let Some(point) = convert(touch) { - self.touches.push_back(point); - } - } - self.status = UIStatus::DisplayOrListen(core::mem::take(next)); - None - }, - Ok(None) => {None}, - Err(e) => panic!("{:?}", e), - } - }, - } +impl core::ops::DerefMut for UIOperationThreads { + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} + +impl UIOperationThreads { + pub fn new() -> Self { + Self(Threads::new(UIStatus::Listen)) } +} - fn listen(&mut self) { - if let Some(point) = self.touches.pop_front() { +impl UI { + fn listen(&mut self, threads: &mut UIOperationThreads, touches: &mut Touches) -> Option { + // update ui if needed + if let Some(point) = touches.take_touch_point() { self.update_request.propagate(self.state.handle_tap(point, &mut ())); } - // update ui if needed - if let Some(u) = self.update_request.take() { + if let Some(u) = &self.update_request { let is_clear_update = matches!(u, UpdateRequest::Slow) || matches!(u, UpdateRequest::Fast); - self.update_request.propagate(self.state.render(is_clear_update, &mut ()).expect("guaranteed to work, no errors implemented")); - - match u { - UpdateRequest::Hidden => (), - UpdateRequest::Slow => self.state.display.request_full(), - UpdateRequest::Fast => self.state.display.request_fast(), - UpdateRequest::UltraFast => { - let a = self.state.display.bounding_box(); - self.state.display.request_part(a); - }, - UpdateRequest::Part(a) => self.state.display.request_part(a), - } if !matches!(u, UpdateRequest::Hidden) { - self.status = UIStatus::DisplayOrListen(UIStatusDisplay::DisplayOperation(u)); + if self.display_threads.try_add_next(u.clone()) { + if !threads.is_other_running() { + threads.wind(UIStatus::DisplayOperation); + } + threads.sync(); + } else { + return None + } } + self.update_request = self.state.render(is_clear_update, &mut ()).expect("guaranteed to work, no errors implemented"); } + None } pub fn handle_message(&mut self, message: String) { @@ -131,6 +76,10 @@ impl UI { } pub fn handle_transaction(&mut self, transaction: NfcTransactionPsramAccess) { + let k = read_from_psram(&transaction.sender_public_key_psram_access); + if self.state.platform.public().map(|p| p.0 != *k).unwrap_or(true) { + return self.handle_message("Invalid sender address".to_owned()); + } self.state.platform.set_transaction(transaction); self.update_request.propagate(self.state.handle_transaction(&mut ())); } @@ -140,25 +89,66 @@ impl UI { } } +impl AsyncOperation for UI { + type Init = (); + type Input<'a> = (i32, &'a mut Touches, &'a mut UIOperationThreads); + type Output = Option; + + /// Start of UI. + fn new(_: Self::Init) -> Self { + let hardware = Hardware::new(); + let display = FrameBuffer::new_white(); + let state = UIState::new(hardware, display, &mut ()); + + let display_threads = DisplayOperationThreads::new(); + return Self { + state, + update_request: Some(UpdateRequest::Slow), + display_threads + } + } + /// Call in event loop to progress through UI state + fn advance<'a>(&mut self, (voltage, touches, threads): Self::Input<'a>) -> Self::Output { + match threads.turn() { + UIStatus::Listen => { + let a = self.listen(threads, touches); + if a.unwrap_or(false) { + //cortex_m::asm::wfi(); // sleep waiting for tocuh irq + } + a + }, + UIStatus::DisplayOperation => { + let r = self.state.display.advance((voltage, &mut self.display_threads)); + if r == Some(true) { + if !threads.is_other_running() { + threads.wind(UIStatus::Listen) + } else if self.display_threads.is_any_running() { + threads.sync(); + } + } + if r == Some(false) { + threads.hold(); + } + r + }, + } + } +} + /// General status of UI /// /// There is no sense in reading input while screen processes last event, nor refreshing the screen /// before touch was parsed - -enum UIStatusDisplay { +pub enum UIStatus { /// Event listening state, default Listen, /// Screen update started - DisplayOperation(UpdateRequest), + DisplayOperation, } -impl Default for UIStatusDisplay { - fn default() -> Self { UIStatusDisplay::Listen } -} -enum UIStatus { - DisplayOrListen(UIStatusDisplay), - /// Touch event processing - TouchOperation(Read, UIStatusDisplay), +impl Default for UIStatus { + fn default() -> Self { UIStatus::Listen } } + pub struct Hardware { pin: PinCode, protected: Option, @@ -217,19 +207,11 @@ impl Platform for Hardware { } fn public(&self) -> Option { - if let Some(e) = self.entropy() { - Some(Pair::from_entropy_and_pwd(&e, "").unwrap().public()) - } else { - None - } + self.pair().map(|p| p.public()) } fn entropy(&self) -> Option> { - if let Some(p) = &self.protected { - Some(decode_entropy(&p)) - } else { - None - } + self.protected.as_ref().map(|p| decode_entropy(p)) } fn set_address(&mut self, addr: [u8; 76]) { @@ -327,36 +309,3 @@ impl Platform for Hardware { } } - -lazy_static! { - // MAGIC calibration numbers obtained through KOLIBRI tool - static ref AFFINE_MATRIX: Affine2 = Affine2::from_matrix_unchecked( - OMatrix::from_rows(&[ - RowVector3::::new(1.0022, -0.0216, -4.2725), - RowVector3::::new(0.0061, 1.1433, -13.7305), - RowVector3::::new(0.0, 0.0, 1.0), - ]) - ); -} - - - -pub fn convert(touch_data: [u8; LEN_NUM_TOUCHES]) -> Option { - if touch_data[0] == 1 { - let detected_y = (((touch_data[1] as u16 & 0b00001111) << 8) | touch_data[2] as u16) as i32; - let detected_x = (((touch_data[3] as u16 & 0b00001111) << 8) | touch_data[4] as u16) as i32; - let touch = Point::new(SCREEN_SIZE_X as i32 - detected_x, detected_y); - - let touch_as_point2 = Point2::new(touch.x as f32, touch.y as f32); - let display_as_point2 = AFFINE_MATRIX.transform_point(&touch_as_point2); - - Some( - Point { - x: display_as_point2.coords[0] as i32, - y: display_as_point2.coords[1] as i32, - } - ) - } else { None } -} - - diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/Cargo.lock b/kampela_experiments_efm32pg23/efm32pg23_fix/Cargo.lock index ccf3505..a5e3a47 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/Cargo.lock +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/Cargo.lock @@ -19,9 +19,9 @@ checksum = "46afbd2983a5d5a7bd740ccb198caf5b82f45c40c09c0eed36052d91cb92e719" [[package]] name = "cortex-m" -version = "0.7.6" +version = "0.7.7" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "70858629a458fdfd39f9675c4dc309411f2a3f83bede76988d81bf1a0ecee9e0" +checksum = "8ec610d8f49840a5b376c69663b6369e71f4b34484b9b2eb29fb918d92516cb9" dependencies = [ "bare-metal", "bitfield", @@ -31,9 +31,9 @@ dependencies = [ [[package]] name = "cortex-m-rt" -version = "0.7.2" +version = "0.7.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d6d3328b8b5534f0c90acd66b68950f2763b37e0173cac4d8b4937c4a80761f9" +checksum = "ee84e813d593101b1723e13ec38b6ab6abbdbaaa4546553f5395ed274079ddb1" dependencies = [ "cortex-m-rt-macros", ] @@ -51,9 +51,9 @@ dependencies = [ [[package]] name = "critical-section" -version = "1.1.1" +version = "1.1.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6548a0ad5d2549e111e1f6a11a6c2e2d00ce6a3dafe22948d67c2b443f775e52" +checksum = "f64009896348fc5af4222e9cf7d7d82a95a256c634ebcf61c53e4ea461422242" [[package]] name = "efm32pg23_fix" diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/Cargo.toml b/kampela_experiments_efm32pg23/efm32pg23_fix/Cargo.toml index afbb4d7..fee2130 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/Cargo.toml +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/Cargo.toml @@ -6,10 +6,10 @@ edition = "2021" # See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html [dependencies] -critical-section = { version = "1.0", optional = true } -cortex-m = "0.7.6" -cortex-m-rt = { version = "0.7.2", optional = true } -vcell = "0.1.2" +critical-section = { version = "1.1.2", optional = true } +cortex-m = "0.7.7" +cortex-m-rt = { version = "0.7.3", optional = true } +vcell = "0.1.3" [features] rt = ["cortex-m-rt/device"] diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/README.md b/kampela_experiments_efm32pg23/efm32pg23_fix/README.md index d3fa753..75fbc06 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/README.md +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/README.md @@ -1,3 +1,3 @@ -This file is auto-generated with `svd2rust` tool using the `svd` file . +This file is auto-generated with `svd2rust` tool using the `svd` file . Original `svd` file has some overlapping enum descriptors for LESENSE module, to produce working crate those were (temporarily?) left out. diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/build.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/build.rs index 597923f..d0781ac 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/build.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/build.rs @@ -1,3 +1,4 @@ +#![doc = r" Builder file for Peripheral access crate generated by svd2rust tool"] use std::env; use std::fs::File; use std::io::Write; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns.rs index 65a8f39..39e9c36 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns.rs @@ -1,64 +1,126 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + swrst: Swrst, + cfg: Cfg, + ctrl: Ctrl, + inputctrl: Inputctrl, + status: Status, + if_: If, + ien: Ien, + syncbusy: Syncbusy, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub swrst: SWRST, + #[inline(always)] + pub const fn swrst(&self) -> &Swrst { + &self.swrst + } #[doc = "0x0c - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x10 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x14 - No Description"] - pub inputctrl: INPUTCTRL, + #[inline(always)] + pub const fn inputctrl(&self) -> &Inputctrl { + &self.inputctrl + } #[doc = "0x18 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x1c - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x20 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x24 - No Description"] - pub syncbusy: SYNCBUSY, + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "SWRST (rw) register accessor: an alias for `Reg`"] -pub type SWRST = crate::Reg; +#[doc = "SWRST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swrst`] +module"] +#[doc(alias = "SWRST")] +pub type Swrst = crate::Reg; #[doc = "No Description"] pub mod swrst; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "INPUTCTRL (rw) register accessor: an alias for `Reg`"] -pub type INPUTCTRL = crate::Reg; +#[doc = "INPUTCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`inputctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inputctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inputctrl`] +module"] +#[doc(alias = "INPUTCTRL")] +pub type Inputctrl = crate::Reg; #[doc = "No Description"] pub mod inputctrl; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "No Description"] pub mod syncbusy; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/cfg.rs index dc7241f..40db7a3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/cfg.rs @@ -1,369 +1,343 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `BIAS` reader - Bias Configuration"] -pub type BIAS_R = crate::FieldReader; +pub type BiasR = crate::FieldReader; #[doc = "Field `BIAS` writer - Bias Configuration"] -pub type BIAS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, u8, 3, O>; -#[doc = "Field `HYST` reader - Hysteresis mode"] -pub type HYST_R = crate::FieldReader; +pub type BiasW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Hysteresis mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HYST_A { +pub enum Hyst { #[doc = "0: Hysteresis disabled"] - DISABLED = 0, + Disabled = 0, #[doc = "1: 10mV symmetrical hysteresis"] - SYM10MV = 1, + Sym10mv = 1, #[doc = "2: 20mV symmetrical hysteresis"] - SYM20MV = 2, + Sym20mv = 2, #[doc = "3: 30mV symmetrical hysteresis"] - SYM30MV = 3, + Sym30mv = 3, #[doc = "4: 10mV hysteresis on positive edge transitions"] - POS10MV = 4, + Pos10mv = 4, #[doc = "5: 20mV hysteresis on positive edge transitions"] - POS20MV = 5, + Pos20mv = 5, #[doc = "6: 30mV hysteresis on positive edge transitions"] - POS30MV = 6, + Pos30mv = 6, #[doc = "8: 10mV hysteresis on negative edge transitions"] - NEG10MV = 8, + Neg10mv = 8, #[doc = "9: 20mV hysteresis on negative edge transitions"] - NEG20MV = 9, + Neg20mv = 9, #[doc = "10: 30mV hysteresis on negative edge transitions"] - NEG30MV = 10, + Neg30mv = 10, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HYST_A) -> Self { + fn from(variant: Hyst) -> Self { variant as _ } } -impl HYST_R { +impl crate::FieldSpec for Hyst { + type Ux = u8; +} +impl crate::IsEnum for Hyst {} +#[doc = "Field `HYST` reader - Hysteresis mode"] +pub type HystR = crate::FieldReader; +impl HystR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HYST_A::DISABLED), - 1 => Some(HYST_A::SYM10MV), - 2 => Some(HYST_A::SYM20MV), - 3 => Some(HYST_A::SYM30MV), - 4 => Some(HYST_A::POS10MV), - 5 => Some(HYST_A::POS20MV), - 6 => Some(HYST_A::POS30MV), - 8 => Some(HYST_A::NEG10MV), - 9 => Some(HYST_A::NEG20MV), - 10 => Some(HYST_A::NEG30MV), + 0 => Some(Hyst::Disabled), + 1 => Some(Hyst::Sym10mv), + 2 => Some(Hyst::Sym20mv), + 3 => Some(Hyst::Sym30mv), + 4 => Some(Hyst::Pos10mv), + 5 => Some(Hyst::Pos20mv), + 6 => Some(Hyst::Pos30mv), + 8 => Some(Hyst::Neg10mv), + 9 => Some(Hyst::Neg20mv), + 10 => Some(Hyst::Neg30mv), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Hysteresis disabled"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == HYST_A::DISABLED + *self == Hyst::Disabled } - #[doc = "Checks if the value of the field is `SYM10MV`"] + #[doc = "10mV symmetrical hysteresis"] #[inline(always)] pub fn is_sym10mv(&self) -> bool { - *self == HYST_A::SYM10MV + *self == Hyst::Sym10mv } - #[doc = "Checks if the value of the field is `SYM20MV`"] + #[doc = "20mV symmetrical hysteresis"] #[inline(always)] pub fn is_sym20mv(&self) -> bool { - *self == HYST_A::SYM20MV + *self == Hyst::Sym20mv } - #[doc = "Checks if the value of the field is `SYM30MV`"] + #[doc = "30mV symmetrical hysteresis"] #[inline(always)] pub fn is_sym30mv(&self) -> bool { - *self == HYST_A::SYM30MV + *self == Hyst::Sym30mv } - #[doc = "Checks if the value of the field is `POS10MV`"] + #[doc = "10mV hysteresis on positive edge transitions"] #[inline(always)] pub fn is_pos10mv(&self) -> bool { - *self == HYST_A::POS10MV + *self == Hyst::Pos10mv } - #[doc = "Checks if the value of the field is `POS20MV`"] + #[doc = "20mV hysteresis on positive edge transitions"] #[inline(always)] pub fn is_pos20mv(&self) -> bool { - *self == HYST_A::POS20MV + *self == Hyst::Pos20mv } - #[doc = "Checks if the value of the field is `POS30MV`"] + #[doc = "30mV hysteresis on positive edge transitions"] #[inline(always)] pub fn is_pos30mv(&self) -> bool { - *self == HYST_A::POS30MV + *self == Hyst::Pos30mv } - #[doc = "Checks if the value of the field is `NEG10MV`"] + #[doc = "10mV hysteresis on negative edge transitions"] #[inline(always)] pub fn is_neg10mv(&self) -> bool { - *self == HYST_A::NEG10MV + *self == Hyst::Neg10mv } - #[doc = "Checks if the value of the field is `NEG20MV`"] + #[doc = "20mV hysteresis on negative edge transitions"] #[inline(always)] pub fn is_neg20mv(&self) -> bool { - *self == HYST_A::NEG20MV + *self == Hyst::Neg20mv } - #[doc = "Checks if the value of the field is `NEG30MV`"] + #[doc = "30mV hysteresis on negative edge transitions"] #[inline(always)] pub fn is_neg30mv(&self) -> bool { - *self == HYST_A::NEG30MV + *self == Hyst::Neg30mv } } #[doc = "Field `HYST` writer - Hysteresis mode"] -pub type HYST_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, HYST_A, 4, O>; -impl<'a, const O: u8> HYST_W<'a, O> { +pub type HystW<'a, REG> = crate::FieldWriter<'a, REG, 4, Hyst>; +impl<'a, REG> HystW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Hysteresis disabled"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(HYST_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Hyst::Disabled) } #[doc = "10mV symmetrical hysteresis"] #[inline(always)] - pub fn sym10mv(self) -> &'a mut W { - self.variant(HYST_A::SYM10MV) + pub fn sym10mv(self) -> &'a mut crate::W { + self.variant(Hyst::Sym10mv) } #[doc = "20mV symmetrical hysteresis"] #[inline(always)] - pub fn sym20mv(self) -> &'a mut W { - self.variant(HYST_A::SYM20MV) + pub fn sym20mv(self) -> &'a mut crate::W { + self.variant(Hyst::Sym20mv) } #[doc = "30mV symmetrical hysteresis"] #[inline(always)] - pub fn sym30mv(self) -> &'a mut W { - self.variant(HYST_A::SYM30MV) + pub fn sym30mv(self) -> &'a mut crate::W { + self.variant(Hyst::Sym30mv) } #[doc = "10mV hysteresis on positive edge transitions"] #[inline(always)] - pub fn pos10mv(self) -> &'a mut W { - self.variant(HYST_A::POS10MV) + pub fn pos10mv(self) -> &'a mut crate::W { + self.variant(Hyst::Pos10mv) } #[doc = "20mV hysteresis on positive edge transitions"] #[inline(always)] - pub fn pos20mv(self) -> &'a mut W { - self.variant(HYST_A::POS20MV) + pub fn pos20mv(self) -> &'a mut crate::W { + self.variant(Hyst::Pos20mv) } #[doc = "30mV hysteresis on positive edge transitions"] #[inline(always)] - pub fn pos30mv(self) -> &'a mut W { - self.variant(HYST_A::POS30MV) + pub fn pos30mv(self) -> &'a mut crate::W { + self.variant(Hyst::Pos30mv) } #[doc = "10mV hysteresis on negative edge transitions"] #[inline(always)] - pub fn neg10mv(self) -> &'a mut W { - self.variant(HYST_A::NEG10MV) + pub fn neg10mv(self) -> &'a mut crate::W { + self.variant(Hyst::Neg10mv) } #[doc = "20mV hysteresis on negative edge transitions"] #[inline(always)] - pub fn neg20mv(self) -> &'a mut W { - self.variant(HYST_A::NEG20MV) + pub fn neg20mv(self) -> &'a mut crate::W { + self.variant(Hyst::Neg20mv) } #[doc = "30mV hysteresis on negative edge transitions"] #[inline(always)] - pub fn neg30mv(self) -> &'a mut W { - self.variant(HYST_A::NEG30MV) + pub fn neg30mv(self) -> &'a mut crate::W { + self.variant(Hyst::Neg30mv) } } -#[doc = "Field `INPUTRANGE` reader - Input Range"] -pub type INPUTRANGE_R = crate::BitReader; #[doc = "Input Range\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum INPUTRANGE_A { +pub enum Inputrange { #[doc = "0: Use this setting when the input to the comparator core can be from 0 to AVDD."] - FULL = 0, + Full = 0, #[doc = "1: It is recommended to use this setting when the input to the comparator core will always be less than AVDD-0.7V."] - REDUCED = 1, + Reduced = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: INPUTRANGE_A) -> Self { + fn from(variant: Inputrange) -> Self { variant as u8 != 0 } } -impl INPUTRANGE_R { +#[doc = "Field `INPUTRANGE` reader - Input Range"] +pub type InputrangeR = crate::BitReader; +impl InputrangeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INPUTRANGE_A { + pub const fn variant(&self) -> Inputrange { match self.bits { - false => INPUTRANGE_A::FULL, - true => INPUTRANGE_A::REDUCED, + false => Inputrange::Full, + true => Inputrange::Reduced, } } - #[doc = "Checks if the value of the field is `FULL`"] + #[doc = "Use this setting when the input to the comparator core can be from 0 to AVDD."] #[inline(always)] pub fn is_full(&self) -> bool { - *self == INPUTRANGE_A::FULL + *self == Inputrange::Full } - #[doc = "Checks if the value of the field is `REDUCED`"] + #[doc = "It is recommended to use this setting when the input to the comparator core will always be less than AVDD-0.7V."] #[inline(always)] pub fn is_reduced(&self) -> bool { - *self == INPUTRANGE_A::REDUCED + *self == Inputrange::Reduced } } #[doc = "Field `INPUTRANGE` writer - Input Range"] -pub type INPUTRANGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, INPUTRANGE_A, O>; -impl<'a, const O: u8> INPUTRANGE_W<'a, O> { +pub type InputrangeW<'a, REG> = crate::BitWriter<'a, REG, Inputrange>; +impl<'a, REG> InputrangeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use this setting when the input to the comparator core can be from 0 to AVDD."] #[inline(always)] - pub fn full(self) -> &'a mut W { - self.variant(INPUTRANGE_A::FULL) + pub fn full(self) -> &'a mut crate::W { + self.variant(Inputrange::Full) } #[doc = "It is recommended to use this setting when the input to the comparator core will always be less than AVDD-0.7V."] #[inline(always)] - pub fn reduced(self) -> &'a mut W { - self.variant(INPUTRANGE_A::REDUCED) + pub fn reduced(self) -> &'a mut crate::W { + self.variant(Inputrange::Reduced) } } -#[doc = "Field `ACCURACY` reader - ACMP accuracy mode"] -pub type ACCURACY_R = crate::BitReader; #[doc = "ACMP accuracy mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ACCURACY_A { +pub enum Accuracy { #[doc = "0: ACMP operates in low-accuracy mode but consumes less current."] - LOW = 0, + Low = 0, #[doc = "1: ACMP operates in high-accuracy mode but consumes more current."] - HIGH = 1, + High = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ACCURACY_A) -> Self { + fn from(variant: Accuracy) -> Self { variant as u8 != 0 } } -impl ACCURACY_R { +#[doc = "Field `ACCURACY` reader - ACMP accuracy mode"] +pub type AccuracyR = crate::BitReader; +impl AccuracyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ACCURACY_A { + pub const fn variant(&self) -> Accuracy { match self.bits { - false => ACCURACY_A::LOW, - true => ACCURACY_A::HIGH, + false => Accuracy::Low, + true => Accuracy::High, } } - #[doc = "Checks if the value of the field is `LOW`"] + #[doc = "ACMP operates in low-accuracy mode but consumes less current."] #[inline(always)] pub fn is_low(&self) -> bool { - *self == ACCURACY_A::LOW + *self == Accuracy::Low } - #[doc = "Checks if the value of the field is `HIGH`"] + #[doc = "ACMP operates in high-accuracy mode but consumes more current."] #[inline(always)] pub fn is_high(&self) -> bool { - *self == ACCURACY_A::HIGH + *self == Accuracy::High } } #[doc = "Field `ACCURACY` writer - ACMP accuracy mode"] -pub type ACCURACY_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, ACCURACY_A, O>; -impl<'a, const O: u8> ACCURACY_W<'a, O> { +pub type AccuracyW<'a, REG> = crate::BitWriter<'a, REG, Accuracy>; +impl<'a, REG> AccuracyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "ACMP operates in low-accuracy mode but consumes less current."] #[inline(always)] - pub fn low(self) -> &'a mut W { - self.variant(ACCURACY_A::LOW) + pub fn low(self) -> &'a mut crate::W { + self.variant(Accuracy::Low) } #[doc = "ACMP operates in high-accuracy mode but consumes more current."] #[inline(always)] - pub fn high(self) -> &'a mut W { - self.variant(ACCURACY_A::HIGH) + pub fn high(self) -> &'a mut crate::W { + self.variant(Accuracy::High) } } impl R { #[doc = "Bits 0:2 - Bias Configuration"] #[inline(always)] - pub fn bias(&self) -> BIAS_R { - BIAS_R::new((self.bits & 7) as u8) + pub fn bias(&self) -> BiasR { + BiasR::new((self.bits & 7) as u8) } #[doc = "Bits 8:11 - Hysteresis mode"] #[inline(always)] - pub fn hyst(&self) -> HYST_R { - HYST_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn hyst(&self) -> HystR { + HystR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bit 16 - Input Range"] #[inline(always)] - pub fn inputrange(&self) -> INPUTRANGE_R { - INPUTRANGE_R::new(((self.bits >> 16) & 1) != 0) + pub fn inputrange(&self) -> InputrangeR { + InputrangeR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - ACMP accuracy mode"] #[inline(always)] - pub fn accuracy(&self) -> ACCURACY_R { - ACCURACY_R::new(((self.bits >> 17) & 1) != 0) + pub fn accuracy(&self) -> AccuracyR { + AccuracyR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Bias Configuration"] #[inline(always)] #[must_use] - pub fn bias(&mut self) -> BIAS_W<0> { - BIAS_W::new(self) + pub fn bias(&mut self) -> BiasW { + BiasW::new(self, 0) } #[doc = "Bits 8:11 - Hysteresis mode"] #[inline(always)] #[must_use] - pub fn hyst(&mut self) -> HYST_W<8> { - HYST_W::new(self) + pub fn hyst(&mut self) -> HystW { + HystW::new(self, 8) } #[doc = "Bit 16 - Input Range"] #[inline(always)] #[must_use] - pub fn inputrange(&mut self) -> INPUTRANGE_W<16> { - INPUTRANGE_W::new(self) + pub fn inputrange(&mut self) -> InputrangeW { + InputrangeW::new(self, 16) } #[doc = "Bit 17 - ACMP accuracy mode"] #[inline(always)] #[must_use] - pub fn accuracy(&mut self) -> ACCURACY_W<17> { - ACCURACY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn accuracy(&mut self) -> AccuracyW { + AccuracyW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0x04"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x04; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0x04; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/ctrl.rs index a69e6f8..e096f46 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/ctrl.rs @@ -1,187 +1,153 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `NOTRDYVAL` reader - Not Ready Value"] -pub type NOTRDYVAL_R = crate::BitReader; +pub type W = crate::W; #[doc = "Not Ready Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum NOTRDYVAL_A { +pub enum Notrdyval { #[doc = "0: ACMP output is 0 when the ACMP is not ready."] - LOW = 0, + Low = 0, #[doc = "1: ACMP output is 1 when the ACMP is not ready."] - HIGH = 1, + High = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: NOTRDYVAL_A) -> Self { + fn from(variant: Notrdyval) -> Self { variant as u8 != 0 } } -impl NOTRDYVAL_R { +#[doc = "Field `NOTRDYVAL` reader - Not Ready Value"] +pub type NotrdyvalR = crate::BitReader; +impl NotrdyvalR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> NOTRDYVAL_A { + pub const fn variant(&self) -> Notrdyval { match self.bits { - false => NOTRDYVAL_A::LOW, - true => NOTRDYVAL_A::HIGH, + false => Notrdyval::Low, + true => Notrdyval::High, } } - #[doc = "Checks if the value of the field is `LOW`"] + #[doc = "ACMP output is 0 when the ACMP is not ready."] #[inline(always)] pub fn is_low(&self) -> bool { - *self == NOTRDYVAL_A::LOW + *self == Notrdyval::Low } - #[doc = "Checks if the value of the field is `HIGH`"] + #[doc = "ACMP output is 1 when the ACMP is not ready."] #[inline(always)] pub fn is_high(&self) -> bool { - *self == NOTRDYVAL_A::HIGH + *self == Notrdyval::High } } #[doc = "Field `NOTRDYVAL` writer - Not Ready Value"] -pub type NOTRDYVAL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, NOTRDYVAL_A, O>; -impl<'a, const O: u8> NOTRDYVAL_W<'a, O> { +pub type NotrdyvalW<'a, REG> = crate::BitWriter<'a, REG, Notrdyval>; +impl<'a, REG> NotrdyvalW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "ACMP output is 0 when the ACMP is not ready."] #[inline(always)] - pub fn low(self) -> &'a mut W { - self.variant(NOTRDYVAL_A::LOW) + pub fn low(self) -> &'a mut crate::W { + self.variant(Notrdyval::Low) } #[doc = "ACMP output is 1 when the ACMP is not ready."] #[inline(always)] - pub fn high(self) -> &'a mut W { - self.variant(NOTRDYVAL_A::HIGH) + pub fn high(self) -> &'a mut crate::W { + self.variant(Notrdyval::High) } } -#[doc = "Field `GPIOINV` reader - Comparator GPIO Output Invert"] -pub type GPIOINV_R = crate::BitReader; #[doc = "Comparator GPIO Output Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GPIOINV_A { +pub enum Gpioinv { #[doc = "0: The comparator output to GPIO is not inverted"] - NOTINV = 0, + Notinv = 0, #[doc = "1: The comparator output to GPIO is inverted"] - INV = 1, + Inv = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GPIOINV_A) -> Self { + fn from(variant: Gpioinv) -> Self { variant as u8 != 0 } } -impl GPIOINV_R { +#[doc = "Field `GPIOINV` reader - Comparator GPIO Output Invert"] +pub type GpioinvR = crate::BitReader; +impl GpioinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> GPIOINV_A { + pub const fn variant(&self) -> Gpioinv { match self.bits { - false => GPIOINV_A::NOTINV, - true => GPIOINV_A::INV, + false => Gpioinv::Notinv, + true => Gpioinv::Inv, } } - #[doc = "Checks if the value of the field is `NOTINV`"] + #[doc = "The comparator output to GPIO is not inverted"] #[inline(always)] pub fn is_notinv(&self) -> bool { - *self == GPIOINV_A::NOTINV + *self == Gpioinv::Notinv } - #[doc = "Checks if the value of the field is `INV`"] + #[doc = "The comparator output to GPIO is inverted"] #[inline(always)] pub fn is_inv(&self) -> bool { - *self == GPIOINV_A::INV + *self == Gpioinv::Inv } } #[doc = "Field `GPIOINV` writer - Comparator GPIO Output Invert"] -pub type GPIOINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, GPIOINV_A, O>; -impl<'a, const O: u8> GPIOINV_W<'a, O> { +pub type GpioinvW<'a, REG> = crate::BitWriter<'a, REG, Gpioinv>; +impl<'a, REG> GpioinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The comparator output to GPIO is not inverted"] #[inline(always)] - pub fn notinv(self) -> &'a mut W { - self.variant(GPIOINV_A::NOTINV) + pub fn notinv(self) -> &'a mut crate::W { + self.variant(Gpioinv::Notinv) } #[doc = "The comparator output to GPIO is inverted"] #[inline(always)] - pub fn inv(self) -> &'a mut W { - self.variant(GPIOINV_A::INV) + pub fn inv(self) -> &'a mut crate::W { + self.variant(Gpioinv::Inv) } } impl R { #[doc = "Bit 0 - Not Ready Value"] #[inline(always)] - pub fn notrdyval(&self) -> NOTRDYVAL_R { - NOTRDYVAL_R::new((self.bits & 1) != 0) + pub fn notrdyval(&self) -> NotrdyvalR { + NotrdyvalR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Comparator GPIO Output Invert"] #[inline(always)] - pub fn gpioinv(&self) -> GPIOINV_R { - GPIOINV_R::new(((self.bits >> 1) & 1) != 0) + pub fn gpioinv(&self) -> GpioinvR { + GpioinvR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Not Ready Value"] #[inline(always)] #[must_use] - pub fn notrdyval(&mut self) -> NOTRDYVAL_W<0> { - NOTRDYVAL_W::new(self) + pub fn notrdyval(&mut self) -> NotrdyvalW { + NotrdyvalW::new(self, 0) } #[doc = "Bit 1 - Comparator GPIO Output Invert"] #[inline(always)] #[must_use] - pub fn gpioinv(&mut self) -> GPIOINV_W<1> { - GPIOINV_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn gpioinv(&mut self) -> GpioinvW { + GpioinvW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/en.rs index f15bf65..7298843 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Module enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Module enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Module enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Module enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/ien.rs index 23882fa..27a6bdf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/ien.rs @@ -1,140 +1,100 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RISE` reader - Rising edge interrupt enable"] -pub type RISE_R = crate::BitReader; +pub type RiseR = crate::BitReader; #[doc = "Field `RISE` writer - Rising edge interrupt enable"] -pub type RISE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RiseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FALL` reader - Falling edge interrupt enable"] -pub type FALL_R = crate::BitReader; +pub type FallR = crate::BitReader; #[doc = "Field `FALL` writer - Falling edge interrupt enable"] -pub type FALL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FallW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMPRDY` reader - ACMP ready interrupt enable"] -pub type ACMPRDY_R = crate::BitReader; +pub type AcmprdyR = crate::BitReader; #[doc = "Field `ACMPRDY` writer - ACMP ready interrupt enable"] -pub type ACMPRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AcmprdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INPUTCONFLICT` reader - Input conflict interrupt enable"] -pub type INPUTCONFLICT_R = crate::BitReader; +pub type InputconflictR = crate::BitReader; #[doc = "Field `INPUTCONFLICT` writer - Input conflict interrupt enable"] -pub type INPUTCONFLICT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type InputconflictW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PORTALLOCERR` reader - Port allocation error interrupt enable"] -pub type PORTALLOCERR_R = crate::BitReader; +pub type PortallocerrR = crate::BitReader; #[doc = "Field `PORTALLOCERR` writer - Port allocation error interrupt enable"] -pub type PORTALLOCERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PortallocerrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Rising edge interrupt enable"] #[inline(always)] - pub fn rise(&self) -> RISE_R { - RISE_R::new((self.bits & 1) != 0) + pub fn rise(&self) -> RiseR { + RiseR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Falling edge interrupt enable"] #[inline(always)] - pub fn fall(&self) -> FALL_R { - FALL_R::new(((self.bits >> 1) & 1) != 0) + pub fn fall(&self) -> FallR { + FallR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - ACMP ready interrupt enable"] #[inline(always)] - pub fn acmprdy(&self) -> ACMPRDY_R { - ACMPRDY_R::new(((self.bits >> 2) & 1) != 0) + pub fn acmprdy(&self) -> AcmprdyR { + AcmprdyR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Input conflict interrupt enable"] #[inline(always)] - pub fn inputconflict(&self) -> INPUTCONFLICT_R { - INPUTCONFLICT_R::new(((self.bits >> 3) & 1) != 0) + pub fn inputconflict(&self) -> InputconflictR { + InputconflictR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port allocation error interrupt enable"] #[inline(always)] - pub fn portallocerr(&self) -> PORTALLOCERR_R { - PORTALLOCERR_R::new(((self.bits >> 4) & 1) != 0) + pub fn portallocerr(&self) -> PortallocerrR { + PortallocerrR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - Rising edge interrupt enable"] #[inline(always)] #[must_use] - pub fn rise(&mut self) -> RISE_W<0> { - RISE_W::new(self) + pub fn rise(&mut self) -> RiseW { + RiseW::new(self, 0) } #[doc = "Bit 1 - Falling edge interrupt enable"] #[inline(always)] #[must_use] - pub fn fall(&mut self) -> FALL_W<1> { - FALL_W::new(self) + pub fn fall(&mut self) -> FallW { + FallW::new(self, 1) } #[doc = "Bit 2 - ACMP ready interrupt enable"] #[inline(always)] #[must_use] - pub fn acmprdy(&mut self) -> ACMPRDY_W<2> { - ACMPRDY_W::new(self) + pub fn acmprdy(&mut self) -> AcmprdyW { + AcmprdyW::new(self, 2) } #[doc = "Bit 3 - Input conflict interrupt enable"] #[inline(always)] #[must_use] - pub fn inputconflict(&mut self) -> INPUTCONFLICT_W<3> { - INPUTCONFLICT_W::new(self) + pub fn inputconflict(&mut self) -> InputconflictW { + InputconflictW::new(self, 3) } #[doc = "Bit 4 - Port allocation error interrupt enable"] #[inline(always)] #[must_use] - pub fn portallocerr(&mut self) -> PORTALLOCERR_W<4> { - PORTALLOCERR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn portallocerr(&mut self) -> PortallocerrW { + PortallocerrW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/if_.rs index 0133f4a..c3b5907 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/if_.rs @@ -1,140 +1,100 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RISE` reader - Rising Edge Triggered Interrupt Flag"] -pub type RISE_R = crate::BitReader; +pub type RiseR = crate::BitReader; #[doc = "Field `RISE` writer - Rising Edge Triggered Interrupt Flag"] -pub type RISE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RiseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FALL` reader - Falling Edge Triggered Interrupt Flag"] -pub type FALL_R = crate::BitReader; +pub type FallR = crate::BitReader; #[doc = "Field `FALL` writer - Falling Edge Triggered Interrupt Flag"] -pub type FALL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FallW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMPRDY` reader - ACMP ready Interrupt flag"] -pub type ACMPRDY_R = crate::BitReader; +pub type AcmprdyR = crate::BitReader; #[doc = "Field `ACMPRDY` writer - ACMP ready Interrupt flag"] -pub type ACMPRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AcmprdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INPUTCONFLICT` reader - Input conflict"] -pub type INPUTCONFLICT_R = crate::BitReader; +pub type InputconflictR = crate::BitReader; #[doc = "Field `INPUTCONFLICT` writer - Input conflict"] -pub type INPUTCONFLICT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type InputconflictW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PORTALLOCERR` reader - Port allocation error"] -pub type PORTALLOCERR_R = crate::BitReader; +pub type PortallocerrR = crate::BitReader; #[doc = "Field `PORTALLOCERR` writer - Port allocation error"] -pub type PORTALLOCERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PortallocerrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Rising Edge Triggered Interrupt Flag"] #[inline(always)] - pub fn rise(&self) -> RISE_R { - RISE_R::new((self.bits & 1) != 0) + pub fn rise(&self) -> RiseR { + RiseR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Falling Edge Triggered Interrupt Flag"] #[inline(always)] - pub fn fall(&self) -> FALL_R { - FALL_R::new(((self.bits >> 1) & 1) != 0) + pub fn fall(&self) -> FallR { + FallR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - ACMP ready Interrupt flag"] #[inline(always)] - pub fn acmprdy(&self) -> ACMPRDY_R { - ACMPRDY_R::new(((self.bits >> 2) & 1) != 0) + pub fn acmprdy(&self) -> AcmprdyR { + AcmprdyR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Input conflict"] #[inline(always)] - pub fn inputconflict(&self) -> INPUTCONFLICT_R { - INPUTCONFLICT_R::new(((self.bits >> 3) & 1) != 0) + pub fn inputconflict(&self) -> InputconflictR { + InputconflictR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port allocation error"] #[inline(always)] - pub fn portallocerr(&self) -> PORTALLOCERR_R { - PORTALLOCERR_R::new(((self.bits >> 4) & 1) != 0) + pub fn portallocerr(&self) -> PortallocerrR { + PortallocerrR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - Rising Edge Triggered Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rise(&mut self) -> RISE_W<0> { - RISE_W::new(self) + pub fn rise(&mut self) -> RiseW { + RiseW::new(self, 0) } #[doc = "Bit 1 - Falling Edge Triggered Interrupt Flag"] #[inline(always)] #[must_use] - pub fn fall(&mut self) -> FALL_W<1> { - FALL_W::new(self) + pub fn fall(&mut self) -> FallW { + FallW::new(self, 1) } #[doc = "Bit 2 - ACMP ready Interrupt flag"] #[inline(always)] #[must_use] - pub fn acmprdy(&mut self) -> ACMPRDY_W<2> { - ACMPRDY_W::new(self) + pub fn acmprdy(&mut self) -> AcmprdyW { + AcmprdyW::new(self, 2) } #[doc = "Bit 3 - Input conflict"] #[inline(always)] #[must_use] - pub fn inputconflict(&mut self) -> INPUTCONFLICT_W<3> { - INPUTCONFLICT_W::new(self) + pub fn inputconflict(&mut self) -> InputconflictW { + InputconflictW::new(self, 3) } #[doc = "Bit 4 - Port allocation error"] #[inline(always)] #[must_use] - pub fn portallocerr(&mut self) -> PORTALLOCERR_W<4> { - PORTALLOCERR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn portallocerr(&mut self) -> PortallocerrW { + PortallocerrW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/inputctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/inputctrl.rs index 5a67c46..524a2ae 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/inputctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/inputctrl.rs @@ -1,2352 +1,2333 @@ #[doc = "Register `INPUTCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `INPUTCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `POSSEL` reader - Positive Input Select"] -pub type POSSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Positive Input Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum POSSEL_A { +pub enum Possel { #[doc = "0: VSS"] - VSS = 0, + Vss = 0, #[doc = "16: Divided AVDD"] - VREFDIVAVDD = 16, + Vrefdivavdd = 16, #[doc = "17: Low-Power Divided AVDD"] - VREFDIVAVDDLP = 17, + Vrefdivavddlp = 17, #[doc = "18: Divided 1V25 reference"] - VREFDIV1V25 = 18, + Vrefdiv1v25 = 18, #[doc = "19: Low-power Divided 1V25 reference"] - VREFDIV1V25LP = 19, + Vrefdiv1v25lp = 19, #[doc = "20: Divided 2V5 reference"] - VREFDIV2V5 = 20, + Vrefdiv2v5 = 20, #[doc = "21: Low-power Divided 2V5 reference"] - VREFDIV2V5LP = 21, + Vrefdiv2v5lp = 21, #[doc = "32: VSENSE0 divided by 4"] - VSENSE01DIV4 = 32, + Vsense01div4 = 32, #[doc = "33: Low-power VSENSE0 divided by 4"] - VSENSE01DIV4LP = 33, + Vsense01div4lp = 33, #[doc = "34: VSENSE1 divided by 4"] - VSENSE11DIV4 = 34, + Vsense11div4 = 34, #[doc = "35: Low-power VSENSE1 divided by 4"] - VSENSE11DIV4LP = 35, + Vsense11div4lp = 35, #[doc = "64: VDAC0 channel 0 output"] - VDACOUT0 = 64, + Vdacout0 = 64, #[doc = "65: VDAC0 channel 1 output"] - VDACOUT1 = 65, + Vdacout1 = 65, #[doc = "80: External interface, base is PA0."] - EXTPA = 80, + Extpa = 80, #[doc = "81: External interface, base is PB0."] - EXTPB = 81, + Extpb = 81, #[doc = "82: External interface, base is PC0."] - EXTPC = 82, + Extpc = 82, #[doc = "83: External interface, base is PD0."] - EXTPD = 83, + Extpd = 83, #[doc = "128: Port A, Pin0"] - PA0 = 128, + Pa0 = 128, #[doc = "129: Port A, Pin1"] - PA1 = 129, + Pa1 = 129, #[doc = "130: Port A, Pin2"] - PA2 = 130, + Pa2 = 130, #[doc = "131: Port A, Pin3"] - PA3 = 131, + Pa3 = 131, #[doc = "132: Port A, Pin4"] - PA4 = 132, + Pa4 = 132, #[doc = "133: Port A, Pin5"] - PA5 = 133, + Pa5 = 133, #[doc = "134: Port A, Pin6"] - PA6 = 134, + Pa6 = 134, #[doc = "135: Port A, Pin7"] - PA7 = 135, + Pa7 = 135, #[doc = "136: Port A, Pin8"] - PA8 = 136, + Pa8 = 136, #[doc = "137: Port A, Pin9"] - PA9 = 137, + Pa9 = 137, #[doc = "138: Port A, Pin10"] - PA10 = 138, + Pa10 = 138, #[doc = "139: Port A, Pin11"] - PA11 = 139, + Pa11 = 139, #[doc = "140: Port A, Pin12"] - PA12 = 140, + Pa12 = 140, #[doc = "141: Port A, Pin13"] - PA13 = 141, + Pa13 = 141, #[doc = "142: Port A, Pin14"] - PA14 = 142, + Pa14 = 142, #[doc = "143: Port A, Pin15"] - PA15 = 143, + Pa15 = 143, #[doc = "144: Port B, Pin0"] - PB0 = 144, + Pb0 = 144, #[doc = "145: Port B, Pin1"] - PB1 = 145, + Pb1 = 145, #[doc = "146: Port B, Pin2"] - PB2 = 146, + Pb2 = 146, #[doc = "147: Port B, Pin3"] - PB3 = 147, + Pb3 = 147, #[doc = "148: Port B, Pin4"] - PB4 = 148, + Pb4 = 148, #[doc = "149: Port B, Pin5"] - PB5 = 149, + Pb5 = 149, #[doc = "150: Port B, Pin6"] - PB6 = 150, + Pb6 = 150, #[doc = "151: Port B, Pin7"] - PB7 = 151, + Pb7 = 151, #[doc = "152: Port B, Pin8"] - PB8 = 152, + Pb8 = 152, #[doc = "153: Port B, Pin9"] - PB9 = 153, + Pb9 = 153, #[doc = "154: Port B, Pin10"] - PB10 = 154, + Pb10 = 154, #[doc = "155: Port B, Pin11"] - PB11 = 155, + Pb11 = 155, #[doc = "156: Port B, Pin12"] - PB12 = 156, + Pb12 = 156, #[doc = "157: Port B, Pin13"] - PB13 = 157, + Pb13 = 157, #[doc = "158: Port B, Pin14"] - PB14 = 158, + Pb14 = 158, #[doc = "159: Port B, Pin15"] - PB15 = 159, + Pb15 = 159, #[doc = "160: Port C, Pin0"] - PC0 = 160, + Pc0 = 160, #[doc = "161: Port C, Pin1"] - PC1 = 161, + Pc1 = 161, #[doc = "162: Port C, Pin2"] - PC2 = 162, + Pc2 = 162, #[doc = "163: Port C, Pin3"] - PC3 = 163, + Pc3 = 163, #[doc = "164: Port C, Pin4"] - PC4 = 164, + Pc4 = 164, #[doc = "165: Port C, Pin5"] - PC5 = 165, + Pc5 = 165, #[doc = "166: Port C, Pin6"] - PC6 = 166, + Pc6 = 166, #[doc = "167: Port C, Pin7"] - PC7 = 167, + Pc7 = 167, #[doc = "168: Port C, Pin8"] - PC8 = 168, + Pc8 = 168, #[doc = "169: Port C, Pin9"] - PC9 = 169, + Pc9 = 169, #[doc = "170: Port C, Pin10"] - PC10 = 170, + Pc10 = 170, #[doc = "171: Port C, Pin11"] - PC11 = 171, + Pc11 = 171, #[doc = "172: Port C, Pin12"] - PC12 = 172, + Pc12 = 172, #[doc = "173: Port C, Pin13"] - PC13 = 173, + Pc13 = 173, #[doc = "174: Port C, Pin14"] - PC14 = 174, + Pc14 = 174, #[doc = "175: Port C, Pin15"] - PC15 = 175, + Pc15 = 175, #[doc = "176: Port D, Pin0"] - PD0 = 176, + Pd0 = 176, #[doc = "177: Port D, Pin1"] - PD1 = 177, + Pd1 = 177, #[doc = "178: Port D, Pin2"] - PD2 = 178, + Pd2 = 178, #[doc = "179: Port D, Pin3"] - PD3 = 179, + Pd3 = 179, #[doc = "180: Port D, Pin4"] - PD4 = 180, + Pd4 = 180, #[doc = "181: Port D, Pin5"] - PD5 = 181, + Pd5 = 181, #[doc = "182: Port D, Pin6"] - PD6 = 182, + Pd6 = 182, #[doc = "183: Port D, Pin7"] - PD7 = 183, + Pd7 = 183, #[doc = "184: Port D, Pin8"] - PD8 = 184, + Pd8 = 184, #[doc = "185: Port D, Pin9"] - PD9 = 185, + Pd9 = 185, #[doc = "186: Port D, Pin10"] - PD10 = 186, + Pd10 = 186, #[doc = "187: Port D, Pin11"] - PD11 = 187, + Pd11 = 187, #[doc = "188: Port D, Pin12"] - PD12 = 188, + Pd12 = 188, #[doc = "189: Port D, Pin13"] - PD13 = 189, + Pd13 = 189, #[doc = "190: Port D, Pin14"] - PD14 = 190, + Pd14 = 190, #[doc = "191: Port D, Pin15"] - PD15 = 191, + Pd15 = 191, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: POSSEL_A) -> Self { + fn from(variant: Possel) -> Self { variant as _ } } -impl POSSEL_R { +impl crate::FieldSpec for Possel { + type Ux = u8; +} +impl crate::IsEnum for Possel {} +#[doc = "Field `POSSEL` reader - Positive Input Select"] +pub type PosselR = crate::FieldReader; +impl PosselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(POSSEL_A::VSS), - 16 => Some(POSSEL_A::VREFDIVAVDD), - 17 => Some(POSSEL_A::VREFDIVAVDDLP), - 18 => Some(POSSEL_A::VREFDIV1V25), - 19 => Some(POSSEL_A::VREFDIV1V25LP), - 20 => Some(POSSEL_A::VREFDIV2V5), - 21 => Some(POSSEL_A::VREFDIV2V5LP), - 32 => Some(POSSEL_A::VSENSE01DIV4), - 33 => Some(POSSEL_A::VSENSE01DIV4LP), - 34 => Some(POSSEL_A::VSENSE11DIV4), - 35 => Some(POSSEL_A::VSENSE11DIV4LP), - 64 => Some(POSSEL_A::VDACOUT0), - 65 => Some(POSSEL_A::VDACOUT1), - 80 => Some(POSSEL_A::EXTPA), - 81 => Some(POSSEL_A::EXTPB), - 82 => Some(POSSEL_A::EXTPC), - 83 => Some(POSSEL_A::EXTPD), - 128 => Some(POSSEL_A::PA0), - 129 => Some(POSSEL_A::PA1), - 130 => Some(POSSEL_A::PA2), - 131 => Some(POSSEL_A::PA3), - 132 => Some(POSSEL_A::PA4), - 133 => Some(POSSEL_A::PA5), - 134 => Some(POSSEL_A::PA6), - 135 => Some(POSSEL_A::PA7), - 136 => Some(POSSEL_A::PA8), - 137 => Some(POSSEL_A::PA9), - 138 => Some(POSSEL_A::PA10), - 139 => Some(POSSEL_A::PA11), - 140 => Some(POSSEL_A::PA12), - 141 => Some(POSSEL_A::PA13), - 142 => Some(POSSEL_A::PA14), - 143 => Some(POSSEL_A::PA15), - 144 => Some(POSSEL_A::PB0), - 145 => Some(POSSEL_A::PB1), - 146 => Some(POSSEL_A::PB2), - 147 => Some(POSSEL_A::PB3), - 148 => Some(POSSEL_A::PB4), - 149 => Some(POSSEL_A::PB5), - 150 => Some(POSSEL_A::PB6), - 151 => Some(POSSEL_A::PB7), - 152 => Some(POSSEL_A::PB8), - 153 => Some(POSSEL_A::PB9), - 154 => Some(POSSEL_A::PB10), - 155 => Some(POSSEL_A::PB11), - 156 => Some(POSSEL_A::PB12), - 157 => Some(POSSEL_A::PB13), - 158 => Some(POSSEL_A::PB14), - 159 => Some(POSSEL_A::PB15), - 160 => Some(POSSEL_A::PC0), - 161 => Some(POSSEL_A::PC1), - 162 => Some(POSSEL_A::PC2), - 163 => Some(POSSEL_A::PC3), - 164 => Some(POSSEL_A::PC4), - 165 => Some(POSSEL_A::PC5), - 166 => Some(POSSEL_A::PC6), - 167 => Some(POSSEL_A::PC7), - 168 => Some(POSSEL_A::PC8), - 169 => Some(POSSEL_A::PC9), - 170 => Some(POSSEL_A::PC10), - 171 => Some(POSSEL_A::PC11), - 172 => Some(POSSEL_A::PC12), - 173 => Some(POSSEL_A::PC13), - 174 => Some(POSSEL_A::PC14), - 175 => Some(POSSEL_A::PC15), - 176 => Some(POSSEL_A::PD0), - 177 => Some(POSSEL_A::PD1), - 178 => Some(POSSEL_A::PD2), - 179 => Some(POSSEL_A::PD3), - 180 => Some(POSSEL_A::PD4), - 181 => Some(POSSEL_A::PD5), - 182 => Some(POSSEL_A::PD6), - 183 => Some(POSSEL_A::PD7), - 184 => Some(POSSEL_A::PD8), - 185 => Some(POSSEL_A::PD9), - 186 => Some(POSSEL_A::PD10), - 187 => Some(POSSEL_A::PD11), - 188 => Some(POSSEL_A::PD12), - 189 => Some(POSSEL_A::PD13), - 190 => Some(POSSEL_A::PD14), - 191 => Some(POSSEL_A::PD15), + 0 => Some(Possel::Vss), + 16 => Some(Possel::Vrefdivavdd), + 17 => Some(Possel::Vrefdivavddlp), + 18 => Some(Possel::Vrefdiv1v25), + 19 => Some(Possel::Vrefdiv1v25lp), + 20 => Some(Possel::Vrefdiv2v5), + 21 => Some(Possel::Vrefdiv2v5lp), + 32 => Some(Possel::Vsense01div4), + 33 => Some(Possel::Vsense01div4lp), + 34 => Some(Possel::Vsense11div4), + 35 => Some(Possel::Vsense11div4lp), + 64 => Some(Possel::Vdacout0), + 65 => Some(Possel::Vdacout1), + 80 => Some(Possel::Extpa), + 81 => Some(Possel::Extpb), + 82 => Some(Possel::Extpc), + 83 => Some(Possel::Extpd), + 128 => Some(Possel::Pa0), + 129 => Some(Possel::Pa1), + 130 => Some(Possel::Pa2), + 131 => Some(Possel::Pa3), + 132 => Some(Possel::Pa4), + 133 => Some(Possel::Pa5), + 134 => Some(Possel::Pa6), + 135 => Some(Possel::Pa7), + 136 => Some(Possel::Pa8), + 137 => Some(Possel::Pa9), + 138 => Some(Possel::Pa10), + 139 => Some(Possel::Pa11), + 140 => Some(Possel::Pa12), + 141 => Some(Possel::Pa13), + 142 => Some(Possel::Pa14), + 143 => Some(Possel::Pa15), + 144 => Some(Possel::Pb0), + 145 => Some(Possel::Pb1), + 146 => Some(Possel::Pb2), + 147 => Some(Possel::Pb3), + 148 => Some(Possel::Pb4), + 149 => Some(Possel::Pb5), + 150 => Some(Possel::Pb6), + 151 => Some(Possel::Pb7), + 152 => Some(Possel::Pb8), + 153 => Some(Possel::Pb9), + 154 => Some(Possel::Pb10), + 155 => Some(Possel::Pb11), + 156 => Some(Possel::Pb12), + 157 => Some(Possel::Pb13), + 158 => Some(Possel::Pb14), + 159 => Some(Possel::Pb15), + 160 => Some(Possel::Pc0), + 161 => Some(Possel::Pc1), + 162 => Some(Possel::Pc2), + 163 => Some(Possel::Pc3), + 164 => Some(Possel::Pc4), + 165 => Some(Possel::Pc5), + 166 => Some(Possel::Pc6), + 167 => Some(Possel::Pc7), + 168 => Some(Possel::Pc8), + 169 => Some(Possel::Pc9), + 170 => Some(Possel::Pc10), + 171 => Some(Possel::Pc11), + 172 => Some(Possel::Pc12), + 173 => Some(Possel::Pc13), + 174 => Some(Possel::Pc14), + 175 => Some(Possel::Pc15), + 176 => Some(Possel::Pd0), + 177 => Some(Possel::Pd1), + 178 => Some(Possel::Pd2), + 179 => Some(Possel::Pd3), + 180 => Some(Possel::Pd4), + 181 => Some(Possel::Pd5), + 182 => Some(Possel::Pd6), + 183 => Some(Possel::Pd7), + 184 => Some(Possel::Pd8), + 185 => Some(Possel::Pd9), + 186 => Some(Possel::Pd10), + 187 => Some(Possel::Pd11), + 188 => Some(Possel::Pd12), + 189 => Some(Possel::Pd13), + 190 => Some(Possel::Pd14), + 191 => Some(Possel::Pd15), _ => None, } } - #[doc = "Checks if the value of the field is `VSS`"] + #[doc = "VSS"] #[inline(always)] pub fn is_vss(&self) -> bool { - *self == POSSEL_A::VSS + *self == Possel::Vss } - #[doc = "Checks if the value of the field is `VREFDIVAVDD`"] + #[doc = "Divided AVDD"] #[inline(always)] pub fn is_vrefdivavdd(&self) -> bool { - *self == POSSEL_A::VREFDIVAVDD + *self == Possel::Vrefdivavdd } - #[doc = "Checks if the value of the field is `VREFDIVAVDDLP`"] + #[doc = "Low-Power Divided AVDD"] #[inline(always)] pub fn is_vrefdivavddlp(&self) -> bool { - *self == POSSEL_A::VREFDIVAVDDLP + *self == Possel::Vrefdivavddlp } - #[doc = "Checks if the value of the field is `VREFDIV1V25`"] + #[doc = "Divided 1V25 reference"] #[inline(always)] pub fn is_vrefdiv1v25(&self) -> bool { - *self == POSSEL_A::VREFDIV1V25 + *self == Possel::Vrefdiv1v25 } - #[doc = "Checks if the value of the field is `VREFDIV1V25LP`"] + #[doc = "Low-power Divided 1V25 reference"] #[inline(always)] pub fn is_vrefdiv1v25lp(&self) -> bool { - *self == POSSEL_A::VREFDIV1V25LP + *self == Possel::Vrefdiv1v25lp } - #[doc = "Checks if the value of the field is `VREFDIV2V5`"] + #[doc = "Divided 2V5 reference"] #[inline(always)] pub fn is_vrefdiv2v5(&self) -> bool { - *self == POSSEL_A::VREFDIV2V5 + *self == Possel::Vrefdiv2v5 } - #[doc = "Checks if the value of the field is `VREFDIV2V5LP`"] + #[doc = "Low-power Divided 2V5 reference"] #[inline(always)] pub fn is_vrefdiv2v5lp(&self) -> bool { - *self == POSSEL_A::VREFDIV2V5LP + *self == Possel::Vrefdiv2v5lp } - #[doc = "Checks if the value of the field is `VSENSE01DIV4`"] + #[doc = "VSENSE0 divided by 4"] #[inline(always)] pub fn is_vsense01div4(&self) -> bool { - *self == POSSEL_A::VSENSE01DIV4 + *self == Possel::Vsense01div4 } - #[doc = "Checks if the value of the field is `VSENSE01DIV4LP`"] + #[doc = "Low-power VSENSE0 divided by 4"] #[inline(always)] pub fn is_vsense01div4lp(&self) -> bool { - *self == POSSEL_A::VSENSE01DIV4LP + *self == Possel::Vsense01div4lp } - #[doc = "Checks if the value of the field is `VSENSE11DIV4`"] + #[doc = "VSENSE1 divided by 4"] #[inline(always)] pub fn is_vsense11div4(&self) -> bool { - *self == POSSEL_A::VSENSE11DIV4 + *self == Possel::Vsense11div4 } - #[doc = "Checks if the value of the field is `VSENSE11DIV4LP`"] + #[doc = "Low-power VSENSE1 divided by 4"] #[inline(always)] pub fn is_vsense11div4lp(&self) -> bool { - *self == POSSEL_A::VSENSE11DIV4LP + *self == Possel::Vsense11div4lp } - #[doc = "Checks if the value of the field is `VDACOUT0`"] + #[doc = "VDAC0 channel 0 output"] #[inline(always)] pub fn is_vdacout0(&self) -> bool { - *self == POSSEL_A::VDACOUT0 + *self == Possel::Vdacout0 } - #[doc = "Checks if the value of the field is `VDACOUT1`"] + #[doc = "VDAC0 channel 1 output"] #[inline(always)] pub fn is_vdacout1(&self) -> bool { - *self == POSSEL_A::VDACOUT1 + *self == Possel::Vdacout1 } - #[doc = "Checks if the value of the field is `EXTPA`"] + #[doc = "External interface, base is PA0."] #[inline(always)] pub fn is_extpa(&self) -> bool { - *self == POSSEL_A::EXTPA + *self == Possel::Extpa } - #[doc = "Checks if the value of the field is `EXTPB`"] + #[doc = "External interface, base is PB0."] #[inline(always)] pub fn is_extpb(&self) -> bool { - *self == POSSEL_A::EXTPB + *self == Possel::Extpb } - #[doc = "Checks if the value of the field is `EXTPC`"] + #[doc = "External interface, base is PC0."] #[inline(always)] pub fn is_extpc(&self) -> bool { - *self == POSSEL_A::EXTPC + *self == Possel::Extpc } - #[doc = "Checks if the value of the field is `EXTPD`"] + #[doc = "External interface, base is PD0."] #[inline(always)] pub fn is_extpd(&self) -> bool { - *self == POSSEL_A::EXTPD + *self == Possel::Extpd } - #[doc = "Checks if the value of the field is `PA0`"] + #[doc = "Port A, Pin0"] #[inline(always)] pub fn is_pa0(&self) -> bool { - *self == POSSEL_A::PA0 + *self == Possel::Pa0 } - #[doc = "Checks if the value of the field is `PA1`"] + #[doc = "Port A, Pin1"] #[inline(always)] pub fn is_pa1(&self) -> bool { - *self == POSSEL_A::PA1 + *self == Possel::Pa1 } - #[doc = "Checks if the value of the field is `PA2`"] + #[doc = "Port A, Pin2"] #[inline(always)] pub fn is_pa2(&self) -> bool { - *self == POSSEL_A::PA2 + *self == Possel::Pa2 } - #[doc = "Checks if the value of the field is `PA3`"] + #[doc = "Port A, Pin3"] #[inline(always)] pub fn is_pa3(&self) -> bool { - *self == POSSEL_A::PA3 + *self == Possel::Pa3 } - #[doc = "Checks if the value of the field is `PA4`"] + #[doc = "Port A, Pin4"] #[inline(always)] pub fn is_pa4(&self) -> bool { - *self == POSSEL_A::PA4 + *self == Possel::Pa4 } - #[doc = "Checks if the value of the field is `PA5`"] + #[doc = "Port A, Pin5"] #[inline(always)] pub fn is_pa5(&self) -> bool { - *self == POSSEL_A::PA5 + *self == Possel::Pa5 } - #[doc = "Checks if the value of the field is `PA6`"] + #[doc = "Port A, Pin6"] #[inline(always)] pub fn is_pa6(&self) -> bool { - *self == POSSEL_A::PA6 + *self == Possel::Pa6 } - #[doc = "Checks if the value of the field is `PA7`"] + #[doc = "Port A, Pin7"] #[inline(always)] pub fn is_pa7(&self) -> bool { - *self == POSSEL_A::PA7 + *self == Possel::Pa7 } - #[doc = "Checks if the value of the field is `PA8`"] + #[doc = "Port A, Pin8"] #[inline(always)] pub fn is_pa8(&self) -> bool { - *self == POSSEL_A::PA8 + *self == Possel::Pa8 } - #[doc = "Checks if the value of the field is `PA9`"] + #[doc = "Port A, Pin9"] #[inline(always)] pub fn is_pa9(&self) -> bool { - *self == POSSEL_A::PA9 + *self == Possel::Pa9 } - #[doc = "Checks if the value of the field is `PA10`"] + #[doc = "Port A, Pin10"] #[inline(always)] pub fn is_pa10(&self) -> bool { - *self == POSSEL_A::PA10 + *self == Possel::Pa10 } - #[doc = "Checks if the value of the field is `PA11`"] + #[doc = "Port A, Pin11"] #[inline(always)] pub fn is_pa11(&self) -> bool { - *self == POSSEL_A::PA11 + *self == Possel::Pa11 } - #[doc = "Checks if the value of the field is `PA12`"] + #[doc = "Port A, Pin12"] #[inline(always)] pub fn is_pa12(&self) -> bool { - *self == POSSEL_A::PA12 + *self == Possel::Pa12 } - #[doc = "Checks if the value of the field is `PA13`"] + #[doc = "Port A, Pin13"] #[inline(always)] pub fn is_pa13(&self) -> bool { - *self == POSSEL_A::PA13 + *self == Possel::Pa13 } - #[doc = "Checks if the value of the field is `PA14`"] + #[doc = "Port A, Pin14"] #[inline(always)] pub fn is_pa14(&self) -> bool { - *self == POSSEL_A::PA14 + *self == Possel::Pa14 } - #[doc = "Checks if the value of the field is `PA15`"] + #[doc = "Port A, Pin15"] #[inline(always)] pub fn is_pa15(&self) -> bool { - *self == POSSEL_A::PA15 + *self == Possel::Pa15 } - #[doc = "Checks if the value of the field is `PB0`"] + #[doc = "Port B, Pin0"] #[inline(always)] pub fn is_pb0(&self) -> bool { - *self == POSSEL_A::PB0 + *self == Possel::Pb0 } - #[doc = "Checks if the value of the field is `PB1`"] + #[doc = "Port B, Pin1"] #[inline(always)] pub fn is_pb1(&self) -> bool { - *self == POSSEL_A::PB1 + *self == Possel::Pb1 } - #[doc = "Checks if the value of the field is `PB2`"] + #[doc = "Port B, Pin2"] #[inline(always)] pub fn is_pb2(&self) -> bool { - *self == POSSEL_A::PB2 + *self == Possel::Pb2 } - #[doc = "Checks if the value of the field is `PB3`"] + #[doc = "Port B, Pin3"] #[inline(always)] pub fn is_pb3(&self) -> bool { - *self == POSSEL_A::PB3 + *self == Possel::Pb3 } - #[doc = "Checks if the value of the field is `PB4`"] + #[doc = "Port B, Pin4"] #[inline(always)] pub fn is_pb4(&self) -> bool { - *self == POSSEL_A::PB4 + *self == Possel::Pb4 } - #[doc = "Checks if the value of the field is `PB5`"] + #[doc = "Port B, Pin5"] #[inline(always)] pub fn is_pb5(&self) -> bool { - *self == POSSEL_A::PB5 + *self == Possel::Pb5 } - #[doc = "Checks if the value of the field is `PB6`"] + #[doc = "Port B, Pin6"] #[inline(always)] pub fn is_pb6(&self) -> bool { - *self == POSSEL_A::PB6 + *self == Possel::Pb6 } - #[doc = "Checks if the value of the field is `PB7`"] + #[doc = "Port B, Pin7"] #[inline(always)] pub fn is_pb7(&self) -> bool { - *self == POSSEL_A::PB7 + *self == Possel::Pb7 } - #[doc = "Checks if the value of the field is `PB8`"] + #[doc = "Port B, Pin8"] #[inline(always)] pub fn is_pb8(&self) -> bool { - *self == POSSEL_A::PB8 + *self == Possel::Pb8 } - #[doc = "Checks if the value of the field is `PB9`"] + #[doc = "Port B, Pin9"] #[inline(always)] pub fn is_pb9(&self) -> bool { - *self == POSSEL_A::PB9 + *self == Possel::Pb9 } - #[doc = "Checks if the value of the field is `PB10`"] + #[doc = "Port B, Pin10"] #[inline(always)] pub fn is_pb10(&self) -> bool { - *self == POSSEL_A::PB10 + *self == Possel::Pb10 } - #[doc = "Checks if the value of the field is `PB11`"] + #[doc = "Port B, Pin11"] #[inline(always)] pub fn is_pb11(&self) -> bool { - *self == POSSEL_A::PB11 + *self == Possel::Pb11 } - #[doc = "Checks if the value of the field is `PB12`"] + #[doc = "Port B, Pin12"] #[inline(always)] pub fn is_pb12(&self) -> bool { - *self == POSSEL_A::PB12 + *self == Possel::Pb12 } - #[doc = "Checks if the value of the field is `PB13`"] + #[doc = "Port B, Pin13"] #[inline(always)] pub fn is_pb13(&self) -> bool { - *self == POSSEL_A::PB13 + *self == Possel::Pb13 } - #[doc = "Checks if the value of the field is `PB14`"] + #[doc = "Port B, Pin14"] #[inline(always)] pub fn is_pb14(&self) -> bool { - *self == POSSEL_A::PB14 + *self == Possel::Pb14 } - #[doc = "Checks if the value of the field is `PB15`"] + #[doc = "Port B, Pin15"] #[inline(always)] pub fn is_pb15(&self) -> bool { - *self == POSSEL_A::PB15 + *self == Possel::Pb15 } - #[doc = "Checks if the value of the field is `PC0`"] + #[doc = "Port C, Pin0"] #[inline(always)] pub fn is_pc0(&self) -> bool { - *self == POSSEL_A::PC0 + *self == Possel::Pc0 } - #[doc = "Checks if the value of the field is `PC1`"] + #[doc = "Port C, Pin1"] #[inline(always)] pub fn is_pc1(&self) -> bool { - *self == POSSEL_A::PC1 + *self == Possel::Pc1 } - #[doc = "Checks if the value of the field is `PC2`"] + #[doc = "Port C, Pin2"] #[inline(always)] pub fn is_pc2(&self) -> bool { - *self == POSSEL_A::PC2 + *self == Possel::Pc2 } - #[doc = "Checks if the value of the field is `PC3`"] + #[doc = "Port C, Pin3"] #[inline(always)] pub fn is_pc3(&self) -> bool { - *self == POSSEL_A::PC3 + *self == Possel::Pc3 } - #[doc = "Checks if the value of the field is `PC4`"] + #[doc = "Port C, Pin4"] #[inline(always)] pub fn is_pc4(&self) -> bool { - *self == POSSEL_A::PC4 + *self == Possel::Pc4 } - #[doc = "Checks if the value of the field is `PC5`"] + #[doc = "Port C, Pin5"] #[inline(always)] pub fn is_pc5(&self) -> bool { - *self == POSSEL_A::PC5 + *self == Possel::Pc5 } - #[doc = "Checks if the value of the field is `PC6`"] + #[doc = "Port C, Pin6"] #[inline(always)] pub fn is_pc6(&self) -> bool { - *self == POSSEL_A::PC6 + *self == Possel::Pc6 } - #[doc = "Checks if the value of the field is `PC7`"] + #[doc = "Port C, Pin7"] #[inline(always)] pub fn is_pc7(&self) -> bool { - *self == POSSEL_A::PC7 + *self == Possel::Pc7 } - #[doc = "Checks if the value of the field is `PC8`"] + #[doc = "Port C, Pin8"] #[inline(always)] pub fn is_pc8(&self) -> bool { - *self == POSSEL_A::PC8 + *self == Possel::Pc8 } - #[doc = "Checks if the value of the field is `PC9`"] + #[doc = "Port C, Pin9"] #[inline(always)] pub fn is_pc9(&self) -> bool { - *self == POSSEL_A::PC9 + *self == Possel::Pc9 } - #[doc = "Checks if the value of the field is `PC10`"] + #[doc = "Port C, Pin10"] #[inline(always)] pub fn is_pc10(&self) -> bool { - *self == POSSEL_A::PC10 + *self == Possel::Pc10 } - #[doc = "Checks if the value of the field is `PC11`"] + #[doc = "Port C, Pin11"] #[inline(always)] pub fn is_pc11(&self) -> bool { - *self == POSSEL_A::PC11 + *self == Possel::Pc11 } - #[doc = "Checks if the value of the field is `PC12`"] + #[doc = "Port C, Pin12"] #[inline(always)] pub fn is_pc12(&self) -> bool { - *self == POSSEL_A::PC12 + *self == Possel::Pc12 } - #[doc = "Checks if the value of the field is `PC13`"] + #[doc = "Port C, Pin13"] #[inline(always)] pub fn is_pc13(&self) -> bool { - *self == POSSEL_A::PC13 + *self == Possel::Pc13 } - #[doc = "Checks if the value of the field is `PC14`"] + #[doc = "Port C, Pin14"] #[inline(always)] pub fn is_pc14(&self) -> bool { - *self == POSSEL_A::PC14 + *self == Possel::Pc14 } - #[doc = "Checks if the value of the field is `PC15`"] + #[doc = "Port C, Pin15"] #[inline(always)] pub fn is_pc15(&self) -> bool { - *self == POSSEL_A::PC15 + *self == Possel::Pc15 } - #[doc = "Checks if the value of the field is `PD0`"] + #[doc = "Port D, Pin0"] #[inline(always)] pub fn is_pd0(&self) -> bool { - *self == POSSEL_A::PD0 + *self == Possel::Pd0 } - #[doc = "Checks if the value of the field is `PD1`"] + #[doc = "Port D, Pin1"] #[inline(always)] pub fn is_pd1(&self) -> bool { - *self == POSSEL_A::PD1 + *self == Possel::Pd1 } - #[doc = "Checks if the value of the field is `PD2`"] + #[doc = "Port D, Pin2"] #[inline(always)] pub fn is_pd2(&self) -> bool { - *self == POSSEL_A::PD2 + *self == Possel::Pd2 } - #[doc = "Checks if the value of the field is `PD3`"] + #[doc = "Port D, Pin3"] #[inline(always)] pub fn is_pd3(&self) -> bool { - *self == POSSEL_A::PD3 + *self == Possel::Pd3 } - #[doc = "Checks if the value of the field is `PD4`"] + #[doc = "Port D, Pin4"] #[inline(always)] pub fn is_pd4(&self) -> bool { - *self == POSSEL_A::PD4 + *self == Possel::Pd4 } - #[doc = "Checks if the value of the field is `PD5`"] + #[doc = "Port D, Pin5"] #[inline(always)] pub fn is_pd5(&self) -> bool { - *self == POSSEL_A::PD5 + *self == Possel::Pd5 } - #[doc = "Checks if the value of the field is `PD6`"] + #[doc = "Port D, Pin6"] #[inline(always)] pub fn is_pd6(&self) -> bool { - *self == POSSEL_A::PD6 + *self == Possel::Pd6 } - #[doc = "Checks if the value of the field is `PD7`"] + #[doc = "Port D, Pin7"] #[inline(always)] pub fn is_pd7(&self) -> bool { - *self == POSSEL_A::PD7 + *self == Possel::Pd7 } - #[doc = "Checks if the value of the field is `PD8`"] + #[doc = "Port D, Pin8"] #[inline(always)] pub fn is_pd8(&self) -> bool { - *self == POSSEL_A::PD8 + *self == Possel::Pd8 } - #[doc = "Checks if the value of the field is `PD9`"] + #[doc = "Port D, Pin9"] #[inline(always)] pub fn is_pd9(&self) -> bool { - *self == POSSEL_A::PD9 + *self == Possel::Pd9 } - #[doc = "Checks if the value of the field is `PD10`"] + #[doc = "Port D, Pin10"] #[inline(always)] pub fn is_pd10(&self) -> bool { - *self == POSSEL_A::PD10 + *self == Possel::Pd10 } - #[doc = "Checks if the value of the field is `PD11`"] + #[doc = "Port D, Pin11"] #[inline(always)] pub fn is_pd11(&self) -> bool { - *self == POSSEL_A::PD11 + *self == Possel::Pd11 } - #[doc = "Checks if the value of the field is `PD12`"] + #[doc = "Port D, Pin12"] #[inline(always)] pub fn is_pd12(&self) -> bool { - *self == POSSEL_A::PD12 + *self == Possel::Pd12 } - #[doc = "Checks if the value of the field is `PD13`"] + #[doc = "Port D, Pin13"] #[inline(always)] pub fn is_pd13(&self) -> bool { - *self == POSSEL_A::PD13 + *self == Possel::Pd13 } - #[doc = "Checks if the value of the field is `PD14`"] + #[doc = "Port D, Pin14"] #[inline(always)] pub fn is_pd14(&self) -> bool { - *self == POSSEL_A::PD14 + *self == Possel::Pd14 } - #[doc = "Checks if the value of the field is `PD15`"] + #[doc = "Port D, Pin15"] #[inline(always)] pub fn is_pd15(&self) -> bool { - *self == POSSEL_A::PD15 + *self == Possel::Pd15 } } #[doc = "Field `POSSEL` writer - Positive Input Select"] -pub type POSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, INPUTCTRL_SPEC, u8, POSSEL_A, 8, O>; -impl<'a, const O: u8> POSSEL_W<'a, O> { +pub type PosselW<'a, REG> = crate::FieldWriter<'a, REG, 8, Possel>; +impl<'a, REG> PosselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "VSS"] #[inline(always)] - pub fn vss(self) -> &'a mut W { - self.variant(POSSEL_A::VSS) + pub fn vss(self) -> &'a mut crate::W { + self.variant(Possel::Vss) } #[doc = "Divided AVDD"] #[inline(always)] - pub fn vrefdivavdd(self) -> &'a mut W { - self.variant(POSSEL_A::VREFDIVAVDD) + pub fn vrefdivavdd(self) -> &'a mut crate::W { + self.variant(Possel::Vrefdivavdd) } #[doc = "Low-Power Divided AVDD"] #[inline(always)] - pub fn vrefdivavddlp(self) -> &'a mut W { - self.variant(POSSEL_A::VREFDIVAVDDLP) + pub fn vrefdivavddlp(self) -> &'a mut crate::W { + self.variant(Possel::Vrefdivavddlp) } #[doc = "Divided 1V25 reference"] #[inline(always)] - pub fn vrefdiv1v25(self) -> &'a mut W { - self.variant(POSSEL_A::VREFDIV1V25) + pub fn vrefdiv1v25(self) -> &'a mut crate::W { + self.variant(Possel::Vrefdiv1v25) } #[doc = "Low-power Divided 1V25 reference"] #[inline(always)] - pub fn vrefdiv1v25lp(self) -> &'a mut W { - self.variant(POSSEL_A::VREFDIV1V25LP) + pub fn vrefdiv1v25lp(self) -> &'a mut crate::W { + self.variant(Possel::Vrefdiv1v25lp) } #[doc = "Divided 2V5 reference"] #[inline(always)] - pub fn vrefdiv2v5(self) -> &'a mut W { - self.variant(POSSEL_A::VREFDIV2V5) + pub fn vrefdiv2v5(self) -> &'a mut crate::W { + self.variant(Possel::Vrefdiv2v5) } #[doc = "Low-power Divided 2V5 reference"] #[inline(always)] - pub fn vrefdiv2v5lp(self) -> &'a mut W { - self.variant(POSSEL_A::VREFDIV2V5LP) + pub fn vrefdiv2v5lp(self) -> &'a mut crate::W { + self.variant(Possel::Vrefdiv2v5lp) } #[doc = "VSENSE0 divided by 4"] #[inline(always)] - pub fn vsense01div4(self) -> &'a mut W { - self.variant(POSSEL_A::VSENSE01DIV4) + pub fn vsense01div4(self) -> &'a mut crate::W { + self.variant(Possel::Vsense01div4) } #[doc = "Low-power VSENSE0 divided by 4"] #[inline(always)] - pub fn vsense01div4lp(self) -> &'a mut W { - self.variant(POSSEL_A::VSENSE01DIV4LP) + pub fn vsense01div4lp(self) -> &'a mut crate::W { + self.variant(Possel::Vsense01div4lp) } #[doc = "VSENSE1 divided by 4"] #[inline(always)] - pub fn vsense11div4(self) -> &'a mut W { - self.variant(POSSEL_A::VSENSE11DIV4) + pub fn vsense11div4(self) -> &'a mut crate::W { + self.variant(Possel::Vsense11div4) } #[doc = "Low-power VSENSE1 divided by 4"] #[inline(always)] - pub fn vsense11div4lp(self) -> &'a mut W { - self.variant(POSSEL_A::VSENSE11DIV4LP) + pub fn vsense11div4lp(self) -> &'a mut crate::W { + self.variant(Possel::Vsense11div4lp) } #[doc = "VDAC0 channel 0 output"] #[inline(always)] - pub fn vdacout0(self) -> &'a mut W { - self.variant(POSSEL_A::VDACOUT0) + pub fn vdacout0(self) -> &'a mut crate::W { + self.variant(Possel::Vdacout0) } #[doc = "VDAC0 channel 1 output"] #[inline(always)] - pub fn vdacout1(self) -> &'a mut W { - self.variant(POSSEL_A::VDACOUT1) + pub fn vdacout1(self) -> &'a mut crate::W { + self.variant(Possel::Vdacout1) } #[doc = "External interface, base is PA0."] #[inline(always)] - pub fn extpa(self) -> &'a mut W { - self.variant(POSSEL_A::EXTPA) + pub fn extpa(self) -> &'a mut crate::W { + self.variant(Possel::Extpa) } #[doc = "External interface, base is PB0."] #[inline(always)] - pub fn extpb(self) -> &'a mut W { - self.variant(POSSEL_A::EXTPB) + pub fn extpb(self) -> &'a mut crate::W { + self.variant(Possel::Extpb) } #[doc = "External interface, base is PC0."] #[inline(always)] - pub fn extpc(self) -> &'a mut W { - self.variant(POSSEL_A::EXTPC) + pub fn extpc(self) -> &'a mut crate::W { + self.variant(Possel::Extpc) } #[doc = "External interface, base is PD0."] #[inline(always)] - pub fn extpd(self) -> &'a mut W { - self.variant(POSSEL_A::EXTPD) + pub fn extpd(self) -> &'a mut crate::W { + self.variant(Possel::Extpd) } #[doc = "Port A, Pin0"] #[inline(always)] - pub fn pa0(self) -> &'a mut W { - self.variant(POSSEL_A::PA0) + pub fn pa0(self) -> &'a mut crate::W { + self.variant(Possel::Pa0) } #[doc = "Port A, Pin1"] #[inline(always)] - pub fn pa1(self) -> &'a mut W { - self.variant(POSSEL_A::PA1) + pub fn pa1(self) -> &'a mut crate::W { + self.variant(Possel::Pa1) } #[doc = "Port A, Pin2"] #[inline(always)] - pub fn pa2(self) -> &'a mut W { - self.variant(POSSEL_A::PA2) + pub fn pa2(self) -> &'a mut crate::W { + self.variant(Possel::Pa2) } #[doc = "Port A, Pin3"] #[inline(always)] - pub fn pa3(self) -> &'a mut W { - self.variant(POSSEL_A::PA3) + pub fn pa3(self) -> &'a mut crate::W { + self.variant(Possel::Pa3) } #[doc = "Port A, Pin4"] #[inline(always)] - pub fn pa4(self) -> &'a mut W { - self.variant(POSSEL_A::PA4) + pub fn pa4(self) -> &'a mut crate::W { + self.variant(Possel::Pa4) } #[doc = "Port A, Pin5"] #[inline(always)] - pub fn pa5(self) -> &'a mut W { - self.variant(POSSEL_A::PA5) + pub fn pa5(self) -> &'a mut crate::W { + self.variant(Possel::Pa5) } #[doc = "Port A, Pin6"] #[inline(always)] - pub fn pa6(self) -> &'a mut W { - self.variant(POSSEL_A::PA6) + pub fn pa6(self) -> &'a mut crate::W { + self.variant(Possel::Pa6) } #[doc = "Port A, Pin7"] #[inline(always)] - pub fn pa7(self) -> &'a mut W { - self.variant(POSSEL_A::PA7) + pub fn pa7(self) -> &'a mut crate::W { + self.variant(Possel::Pa7) } #[doc = "Port A, Pin8"] #[inline(always)] - pub fn pa8(self) -> &'a mut W { - self.variant(POSSEL_A::PA8) + pub fn pa8(self) -> &'a mut crate::W { + self.variant(Possel::Pa8) } #[doc = "Port A, Pin9"] #[inline(always)] - pub fn pa9(self) -> &'a mut W { - self.variant(POSSEL_A::PA9) + pub fn pa9(self) -> &'a mut crate::W { + self.variant(Possel::Pa9) } #[doc = "Port A, Pin10"] #[inline(always)] - pub fn pa10(self) -> &'a mut W { - self.variant(POSSEL_A::PA10) + pub fn pa10(self) -> &'a mut crate::W { + self.variant(Possel::Pa10) } #[doc = "Port A, Pin11"] #[inline(always)] - pub fn pa11(self) -> &'a mut W { - self.variant(POSSEL_A::PA11) + pub fn pa11(self) -> &'a mut crate::W { + self.variant(Possel::Pa11) } #[doc = "Port A, Pin12"] #[inline(always)] - pub fn pa12(self) -> &'a mut W { - self.variant(POSSEL_A::PA12) + pub fn pa12(self) -> &'a mut crate::W { + self.variant(Possel::Pa12) } #[doc = "Port A, Pin13"] #[inline(always)] - pub fn pa13(self) -> &'a mut W { - self.variant(POSSEL_A::PA13) + pub fn pa13(self) -> &'a mut crate::W { + self.variant(Possel::Pa13) } #[doc = "Port A, Pin14"] #[inline(always)] - pub fn pa14(self) -> &'a mut W { - self.variant(POSSEL_A::PA14) + pub fn pa14(self) -> &'a mut crate::W { + self.variant(Possel::Pa14) } #[doc = "Port A, Pin15"] #[inline(always)] - pub fn pa15(self) -> &'a mut W { - self.variant(POSSEL_A::PA15) + pub fn pa15(self) -> &'a mut crate::W { + self.variant(Possel::Pa15) } #[doc = "Port B, Pin0"] #[inline(always)] - pub fn pb0(self) -> &'a mut W { - self.variant(POSSEL_A::PB0) + pub fn pb0(self) -> &'a mut crate::W { + self.variant(Possel::Pb0) } #[doc = "Port B, Pin1"] #[inline(always)] - pub fn pb1(self) -> &'a mut W { - self.variant(POSSEL_A::PB1) + pub fn pb1(self) -> &'a mut crate::W { + self.variant(Possel::Pb1) } #[doc = "Port B, Pin2"] #[inline(always)] - pub fn pb2(self) -> &'a mut W { - self.variant(POSSEL_A::PB2) + pub fn pb2(self) -> &'a mut crate::W { + self.variant(Possel::Pb2) } #[doc = "Port B, Pin3"] #[inline(always)] - pub fn pb3(self) -> &'a mut W { - self.variant(POSSEL_A::PB3) + pub fn pb3(self) -> &'a mut crate::W { + self.variant(Possel::Pb3) } #[doc = "Port B, Pin4"] #[inline(always)] - pub fn pb4(self) -> &'a mut W { - self.variant(POSSEL_A::PB4) + pub fn pb4(self) -> &'a mut crate::W { + self.variant(Possel::Pb4) } #[doc = "Port B, Pin5"] #[inline(always)] - pub fn pb5(self) -> &'a mut W { - self.variant(POSSEL_A::PB5) + pub fn pb5(self) -> &'a mut crate::W { + self.variant(Possel::Pb5) } #[doc = "Port B, Pin6"] #[inline(always)] - pub fn pb6(self) -> &'a mut W { - self.variant(POSSEL_A::PB6) + pub fn pb6(self) -> &'a mut crate::W { + self.variant(Possel::Pb6) } #[doc = "Port B, Pin7"] #[inline(always)] - pub fn pb7(self) -> &'a mut W { - self.variant(POSSEL_A::PB7) + pub fn pb7(self) -> &'a mut crate::W { + self.variant(Possel::Pb7) } #[doc = "Port B, Pin8"] #[inline(always)] - pub fn pb8(self) -> &'a mut W { - self.variant(POSSEL_A::PB8) + pub fn pb8(self) -> &'a mut crate::W { + self.variant(Possel::Pb8) } #[doc = "Port B, Pin9"] #[inline(always)] - pub fn pb9(self) -> &'a mut W { - self.variant(POSSEL_A::PB9) + pub fn pb9(self) -> &'a mut crate::W { + self.variant(Possel::Pb9) } #[doc = "Port B, Pin10"] #[inline(always)] - pub fn pb10(self) -> &'a mut W { - self.variant(POSSEL_A::PB10) + pub fn pb10(self) -> &'a mut crate::W { + self.variant(Possel::Pb10) } #[doc = "Port B, Pin11"] #[inline(always)] - pub fn pb11(self) -> &'a mut W { - self.variant(POSSEL_A::PB11) + pub fn pb11(self) -> &'a mut crate::W { + self.variant(Possel::Pb11) } #[doc = "Port B, Pin12"] #[inline(always)] - pub fn pb12(self) -> &'a mut W { - self.variant(POSSEL_A::PB12) + pub fn pb12(self) -> &'a mut crate::W { + self.variant(Possel::Pb12) } #[doc = "Port B, Pin13"] #[inline(always)] - pub fn pb13(self) -> &'a mut W { - self.variant(POSSEL_A::PB13) + pub fn pb13(self) -> &'a mut crate::W { + self.variant(Possel::Pb13) } #[doc = "Port B, Pin14"] #[inline(always)] - pub fn pb14(self) -> &'a mut W { - self.variant(POSSEL_A::PB14) + pub fn pb14(self) -> &'a mut crate::W { + self.variant(Possel::Pb14) } #[doc = "Port B, Pin15"] #[inline(always)] - pub fn pb15(self) -> &'a mut W { - self.variant(POSSEL_A::PB15) + pub fn pb15(self) -> &'a mut crate::W { + self.variant(Possel::Pb15) } #[doc = "Port C, Pin0"] #[inline(always)] - pub fn pc0(self) -> &'a mut W { - self.variant(POSSEL_A::PC0) + pub fn pc0(self) -> &'a mut crate::W { + self.variant(Possel::Pc0) } #[doc = "Port C, Pin1"] #[inline(always)] - pub fn pc1(self) -> &'a mut W { - self.variant(POSSEL_A::PC1) + pub fn pc1(self) -> &'a mut crate::W { + self.variant(Possel::Pc1) } #[doc = "Port C, Pin2"] #[inline(always)] - pub fn pc2(self) -> &'a mut W { - self.variant(POSSEL_A::PC2) + pub fn pc2(self) -> &'a mut crate::W { + self.variant(Possel::Pc2) } #[doc = "Port C, Pin3"] #[inline(always)] - pub fn pc3(self) -> &'a mut W { - self.variant(POSSEL_A::PC3) + pub fn pc3(self) -> &'a mut crate::W { + self.variant(Possel::Pc3) } #[doc = "Port C, Pin4"] #[inline(always)] - pub fn pc4(self) -> &'a mut W { - self.variant(POSSEL_A::PC4) + pub fn pc4(self) -> &'a mut crate::W { + self.variant(Possel::Pc4) } #[doc = "Port C, Pin5"] #[inline(always)] - pub fn pc5(self) -> &'a mut W { - self.variant(POSSEL_A::PC5) + pub fn pc5(self) -> &'a mut crate::W { + self.variant(Possel::Pc5) } #[doc = "Port C, Pin6"] #[inline(always)] - pub fn pc6(self) -> &'a mut W { - self.variant(POSSEL_A::PC6) + pub fn pc6(self) -> &'a mut crate::W { + self.variant(Possel::Pc6) } #[doc = "Port C, Pin7"] #[inline(always)] - pub fn pc7(self) -> &'a mut W { - self.variant(POSSEL_A::PC7) + pub fn pc7(self) -> &'a mut crate::W { + self.variant(Possel::Pc7) } #[doc = "Port C, Pin8"] #[inline(always)] - pub fn pc8(self) -> &'a mut W { - self.variant(POSSEL_A::PC8) + pub fn pc8(self) -> &'a mut crate::W { + self.variant(Possel::Pc8) } #[doc = "Port C, Pin9"] #[inline(always)] - pub fn pc9(self) -> &'a mut W { - self.variant(POSSEL_A::PC9) + pub fn pc9(self) -> &'a mut crate::W { + self.variant(Possel::Pc9) } #[doc = "Port C, Pin10"] #[inline(always)] - pub fn pc10(self) -> &'a mut W { - self.variant(POSSEL_A::PC10) + pub fn pc10(self) -> &'a mut crate::W { + self.variant(Possel::Pc10) } #[doc = "Port C, Pin11"] #[inline(always)] - pub fn pc11(self) -> &'a mut W { - self.variant(POSSEL_A::PC11) + pub fn pc11(self) -> &'a mut crate::W { + self.variant(Possel::Pc11) } #[doc = "Port C, Pin12"] #[inline(always)] - pub fn pc12(self) -> &'a mut W { - self.variant(POSSEL_A::PC12) + pub fn pc12(self) -> &'a mut crate::W { + self.variant(Possel::Pc12) } #[doc = "Port C, Pin13"] #[inline(always)] - pub fn pc13(self) -> &'a mut W { - self.variant(POSSEL_A::PC13) + pub fn pc13(self) -> &'a mut crate::W { + self.variant(Possel::Pc13) } #[doc = "Port C, Pin14"] #[inline(always)] - pub fn pc14(self) -> &'a mut W { - self.variant(POSSEL_A::PC14) + pub fn pc14(self) -> &'a mut crate::W { + self.variant(Possel::Pc14) } #[doc = "Port C, Pin15"] #[inline(always)] - pub fn pc15(self) -> &'a mut W { - self.variant(POSSEL_A::PC15) + pub fn pc15(self) -> &'a mut crate::W { + self.variant(Possel::Pc15) } #[doc = "Port D, Pin0"] #[inline(always)] - pub fn pd0(self) -> &'a mut W { - self.variant(POSSEL_A::PD0) + pub fn pd0(self) -> &'a mut crate::W { + self.variant(Possel::Pd0) } #[doc = "Port D, Pin1"] #[inline(always)] - pub fn pd1(self) -> &'a mut W { - self.variant(POSSEL_A::PD1) + pub fn pd1(self) -> &'a mut crate::W { + self.variant(Possel::Pd1) } #[doc = "Port D, Pin2"] #[inline(always)] - pub fn pd2(self) -> &'a mut W { - self.variant(POSSEL_A::PD2) + pub fn pd2(self) -> &'a mut crate::W { + self.variant(Possel::Pd2) } #[doc = "Port D, Pin3"] #[inline(always)] - pub fn pd3(self) -> &'a mut W { - self.variant(POSSEL_A::PD3) + pub fn pd3(self) -> &'a mut crate::W { + self.variant(Possel::Pd3) } #[doc = "Port D, Pin4"] #[inline(always)] - pub fn pd4(self) -> &'a mut W { - self.variant(POSSEL_A::PD4) + pub fn pd4(self) -> &'a mut crate::W { + self.variant(Possel::Pd4) } #[doc = "Port D, Pin5"] #[inline(always)] - pub fn pd5(self) -> &'a mut W { - self.variant(POSSEL_A::PD5) + pub fn pd5(self) -> &'a mut crate::W { + self.variant(Possel::Pd5) } #[doc = "Port D, Pin6"] #[inline(always)] - pub fn pd6(self) -> &'a mut W { - self.variant(POSSEL_A::PD6) + pub fn pd6(self) -> &'a mut crate::W { + self.variant(Possel::Pd6) } #[doc = "Port D, Pin7"] #[inline(always)] - pub fn pd7(self) -> &'a mut W { - self.variant(POSSEL_A::PD7) + pub fn pd7(self) -> &'a mut crate::W { + self.variant(Possel::Pd7) } #[doc = "Port D, Pin8"] #[inline(always)] - pub fn pd8(self) -> &'a mut W { - self.variant(POSSEL_A::PD8) + pub fn pd8(self) -> &'a mut crate::W { + self.variant(Possel::Pd8) } #[doc = "Port D, Pin9"] #[inline(always)] - pub fn pd9(self) -> &'a mut W { - self.variant(POSSEL_A::PD9) + pub fn pd9(self) -> &'a mut crate::W { + self.variant(Possel::Pd9) } #[doc = "Port D, Pin10"] #[inline(always)] - pub fn pd10(self) -> &'a mut W { - self.variant(POSSEL_A::PD10) + pub fn pd10(self) -> &'a mut crate::W { + self.variant(Possel::Pd10) } #[doc = "Port D, Pin11"] #[inline(always)] - pub fn pd11(self) -> &'a mut W { - self.variant(POSSEL_A::PD11) + pub fn pd11(self) -> &'a mut crate::W { + self.variant(Possel::Pd11) } #[doc = "Port D, Pin12"] #[inline(always)] - pub fn pd12(self) -> &'a mut W { - self.variant(POSSEL_A::PD12) + pub fn pd12(self) -> &'a mut crate::W { + self.variant(Possel::Pd12) } #[doc = "Port D, Pin13"] #[inline(always)] - pub fn pd13(self) -> &'a mut W { - self.variant(POSSEL_A::PD13) + pub fn pd13(self) -> &'a mut crate::W { + self.variant(Possel::Pd13) } #[doc = "Port D, Pin14"] #[inline(always)] - pub fn pd14(self) -> &'a mut W { - self.variant(POSSEL_A::PD14) + pub fn pd14(self) -> &'a mut crate::W { + self.variant(Possel::Pd14) } #[doc = "Port D, Pin15"] #[inline(always)] - pub fn pd15(self) -> &'a mut W { - self.variant(POSSEL_A::PD15) + pub fn pd15(self) -> &'a mut crate::W { + self.variant(Possel::Pd15) } } -#[doc = "Field `NEGSEL` reader - Negative Input Select"] -pub type NEGSEL_R = crate::FieldReader; #[doc = "Negative Input Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum NEGSEL_A { +pub enum Negsel { #[doc = "0: VSS"] - VSS = 0, + Vss = 0, #[doc = "16: Divided AVDD"] - VREFDIVAVDD = 16, + Vrefdivavdd = 16, #[doc = "17: Low-Power Divided AVDD"] - VREFDIVAVDDLP = 17, + Vrefdivavddlp = 17, #[doc = "18: Divided 1V25 reference"] - VREFDIV1V25 = 18, + Vrefdiv1v25 = 18, #[doc = "19: Low-power Divided 1V25 reference"] - VREFDIV1V25LP = 19, + Vrefdiv1v25lp = 19, #[doc = "20: Divided 2V5 reference"] - VREFDIV2V5 = 20, + Vrefdiv2v5 = 20, #[doc = "21: Low-power Divided 2V5 reference"] - VREFDIV2V5LP = 21, + Vrefdiv2v5lp = 21, #[doc = "32: VSENSE0 divided by 4"] - VSENSE01DIV4 = 32, + Vsense01div4 = 32, #[doc = "33: Low-power VSENSE0 divided by 4"] - VSENSE01DIV4LP = 33, + Vsense01div4lp = 33, #[doc = "34: VSENSE1 divided by 4"] - VSENSE11DIV4 = 34, + Vsense11div4 = 34, #[doc = "35: Low-power VSENSE1 divided by 4"] - VSENSE11DIV4LP = 35, - #[doc = "48: Capsense mode"] - CAPSENSE = 48, + Vsense11div4lp = 35, + #[doc = "48: Deprecated capacitive sensing feature, not recommended for new designs"] + Capsense = 48, #[doc = "64: VDAC0 channel 0 output"] - VDACOUT0 = 64, + Vdacout0 = 64, #[doc = "65: VDAC0 channel 1 output"] - VDACOUT1 = 65, + Vdacout1 = 65, #[doc = "128: Port A, Pin0"] - PA0 = 128, + Pa0 = 128, #[doc = "129: Port A, Pin1"] - PA1 = 129, + Pa1 = 129, #[doc = "130: Port A, Pin2"] - PA2 = 130, + Pa2 = 130, #[doc = "131: Port A, Pin3"] - PA3 = 131, + Pa3 = 131, #[doc = "132: Port A, Pin4"] - PA4 = 132, + Pa4 = 132, #[doc = "133: Port A, Pin5"] - PA5 = 133, + Pa5 = 133, #[doc = "134: Port A, Pin6"] - PA6 = 134, + Pa6 = 134, #[doc = "135: Port A, Pin7"] - PA7 = 135, + Pa7 = 135, #[doc = "136: Port A, Pin8"] - PA8 = 136, + Pa8 = 136, #[doc = "137: Port A, Pin9"] - PA9 = 137, + Pa9 = 137, #[doc = "138: Port A, Pin10"] - PA10 = 138, + Pa10 = 138, #[doc = "139: Port A, Pin11"] - PA11 = 139, + Pa11 = 139, #[doc = "140: Port A, Pin12"] - PA12 = 140, + Pa12 = 140, #[doc = "141: Port A, Pin13"] - PA13 = 141, + Pa13 = 141, #[doc = "142: Port A, Pin14"] - PA14 = 142, + Pa14 = 142, #[doc = "143: Port A, Pin15"] - PA15 = 143, + Pa15 = 143, #[doc = "144: Port B, Pin0"] - PB0 = 144, + Pb0 = 144, #[doc = "145: Port B, Pin1"] - PB1 = 145, + Pb1 = 145, #[doc = "146: Port B, Pin2"] - PB2 = 146, + Pb2 = 146, #[doc = "147: Port B, Pin3"] - PB3 = 147, + Pb3 = 147, #[doc = "148: Port B, Pin4"] - PB4 = 148, + Pb4 = 148, #[doc = "149: Port B, Pin5"] - PB5 = 149, + Pb5 = 149, #[doc = "150: Port B, Pin6"] - PB6 = 150, + Pb6 = 150, #[doc = "151: Port B, Pin7"] - PB7 = 151, + Pb7 = 151, #[doc = "152: Port B, Pin8"] - PB8 = 152, + Pb8 = 152, #[doc = "153: Port B, Pin9"] - PB9 = 153, + Pb9 = 153, #[doc = "154: Port B, Pin10"] - PB10 = 154, + Pb10 = 154, #[doc = "155: Port B, Pin11"] - PB11 = 155, + Pb11 = 155, #[doc = "156: Port B, Pin12"] - PB12 = 156, + Pb12 = 156, #[doc = "157: Port B, Pin13"] - PB13 = 157, + Pb13 = 157, #[doc = "158: Port B, Pin14"] - PB14 = 158, + Pb14 = 158, #[doc = "159: Port B, Pin15"] - PB15 = 159, + Pb15 = 159, #[doc = "160: Port C, Pin0"] - PC0 = 160, + Pc0 = 160, #[doc = "161: Port C, Pin1"] - PC1 = 161, + Pc1 = 161, #[doc = "162: Port C, Pin2"] - PC2 = 162, + Pc2 = 162, #[doc = "163: Port C, Pin3"] - PC3 = 163, + Pc3 = 163, #[doc = "164: Port C, Pin4"] - PC4 = 164, + Pc4 = 164, #[doc = "165: Port C, Pin5"] - PC5 = 165, + Pc5 = 165, #[doc = "166: Port C, Pin6"] - PC6 = 166, + Pc6 = 166, #[doc = "167: Port C, Pin7"] - PC7 = 167, + Pc7 = 167, #[doc = "168: Port C, Pin8"] - PC8 = 168, + Pc8 = 168, #[doc = "169: Port C, Pin9"] - PC9 = 169, + Pc9 = 169, #[doc = "170: Port C, Pin10"] - PC10 = 170, + Pc10 = 170, #[doc = "171: Port C, Pin11"] - PC11 = 171, + Pc11 = 171, #[doc = "172: Port C, Pin12"] - PC12 = 172, + Pc12 = 172, #[doc = "173: Port C, Pin13"] - PC13 = 173, + Pc13 = 173, #[doc = "174: Port C, Pin14"] - PC14 = 174, + Pc14 = 174, #[doc = "175: Port C, Pin15"] - PC15 = 175, + Pc15 = 175, #[doc = "176: Port D, Pin0"] - PD0 = 176, + Pd0 = 176, #[doc = "177: Port D, Pin1"] - PD1 = 177, + Pd1 = 177, #[doc = "178: Port D, Pin2"] - PD2 = 178, + Pd2 = 178, #[doc = "179: Port D, Pin3"] - PD3 = 179, + Pd3 = 179, #[doc = "180: Port D, Pin4"] - PD4 = 180, + Pd4 = 180, #[doc = "181: Port D, Pin5"] - PD5 = 181, + Pd5 = 181, #[doc = "182: Port D, Pin6"] - PD6 = 182, + Pd6 = 182, #[doc = "183: Port D, Pin7"] - PD7 = 183, + Pd7 = 183, #[doc = "184: Port D, Pin8"] - PD8 = 184, + Pd8 = 184, #[doc = "185: Port D, Pin9"] - PD9 = 185, + Pd9 = 185, #[doc = "186: Port D, Pin10"] - PD10 = 186, + Pd10 = 186, #[doc = "187: Port D, Pin11"] - PD11 = 187, + Pd11 = 187, #[doc = "188: Port D, Pin12"] - PD12 = 188, + Pd12 = 188, #[doc = "189: Port D, Pin13"] - PD13 = 189, + Pd13 = 189, #[doc = "190: Port D, Pin14"] - PD14 = 190, + Pd14 = 190, #[doc = "191: Port D, Pin15"] - PD15 = 191, + Pd15 = 191, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: NEGSEL_A) -> Self { + fn from(variant: Negsel) -> Self { variant as _ } } -impl NEGSEL_R { +impl crate::FieldSpec for Negsel { + type Ux = u8; +} +impl crate::IsEnum for Negsel {} +#[doc = "Field `NEGSEL` reader - Negative Input Select"] +pub type NegselR = crate::FieldReader; +impl NegselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(NEGSEL_A::VSS), - 16 => Some(NEGSEL_A::VREFDIVAVDD), - 17 => Some(NEGSEL_A::VREFDIVAVDDLP), - 18 => Some(NEGSEL_A::VREFDIV1V25), - 19 => Some(NEGSEL_A::VREFDIV1V25LP), - 20 => Some(NEGSEL_A::VREFDIV2V5), - 21 => Some(NEGSEL_A::VREFDIV2V5LP), - 32 => Some(NEGSEL_A::VSENSE01DIV4), - 33 => Some(NEGSEL_A::VSENSE01DIV4LP), - 34 => Some(NEGSEL_A::VSENSE11DIV4), - 35 => Some(NEGSEL_A::VSENSE11DIV4LP), - 48 => Some(NEGSEL_A::CAPSENSE), - 64 => Some(NEGSEL_A::VDACOUT0), - 65 => Some(NEGSEL_A::VDACOUT1), - 128 => Some(NEGSEL_A::PA0), - 129 => Some(NEGSEL_A::PA1), - 130 => Some(NEGSEL_A::PA2), - 131 => Some(NEGSEL_A::PA3), - 132 => Some(NEGSEL_A::PA4), - 133 => Some(NEGSEL_A::PA5), - 134 => Some(NEGSEL_A::PA6), - 135 => Some(NEGSEL_A::PA7), - 136 => Some(NEGSEL_A::PA8), - 137 => Some(NEGSEL_A::PA9), - 138 => Some(NEGSEL_A::PA10), - 139 => Some(NEGSEL_A::PA11), - 140 => Some(NEGSEL_A::PA12), - 141 => Some(NEGSEL_A::PA13), - 142 => Some(NEGSEL_A::PA14), - 143 => Some(NEGSEL_A::PA15), - 144 => Some(NEGSEL_A::PB0), - 145 => Some(NEGSEL_A::PB1), - 146 => Some(NEGSEL_A::PB2), - 147 => Some(NEGSEL_A::PB3), - 148 => Some(NEGSEL_A::PB4), - 149 => Some(NEGSEL_A::PB5), - 150 => Some(NEGSEL_A::PB6), - 151 => Some(NEGSEL_A::PB7), - 152 => Some(NEGSEL_A::PB8), - 153 => Some(NEGSEL_A::PB9), - 154 => Some(NEGSEL_A::PB10), - 155 => Some(NEGSEL_A::PB11), - 156 => Some(NEGSEL_A::PB12), - 157 => Some(NEGSEL_A::PB13), - 158 => Some(NEGSEL_A::PB14), - 159 => Some(NEGSEL_A::PB15), - 160 => Some(NEGSEL_A::PC0), - 161 => Some(NEGSEL_A::PC1), - 162 => Some(NEGSEL_A::PC2), - 163 => Some(NEGSEL_A::PC3), - 164 => Some(NEGSEL_A::PC4), - 165 => Some(NEGSEL_A::PC5), - 166 => Some(NEGSEL_A::PC6), - 167 => Some(NEGSEL_A::PC7), - 168 => Some(NEGSEL_A::PC8), - 169 => Some(NEGSEL_A::PC9), - 170 => Some(NEGSEL_A::PC10), - 171 => Some(NEGSEL_A::PC11), - 172 => Some(NEGSEL_A::PC12), - 173 => Some(NEGSEL_A::PC13), - 174 => Some(NEGSEL_A::PC14), - 175 => Some(NEGSEL_A::PC15), - 176 => Some(NEGSEL_A::PD0), - 177 => Some(NEGSEL_A::PD1), - 178 => Some(NEGSEL_A::PD2), - 179 => Some(NEGSEL_A::PD3), - 180 => Some(NEGSEL_A::PD4), - 181 => Some(NEGSEL_A::PD5), - 182 => Some(NEGSEL_A::PD6), - 183 => Some(NEGSEL_A::PD7), - 184 => Some(NEGSEL_A::PD8), - 185 => Some(NEGSEL_A::PD9), - 186 => Some(NEGSEL_A::PD10), - 187 => Some(NEGSEL_A::PD11), - 188 => Some(NEGSEL_A::PD12), - 189 => Some(NEGSEL_A::PD13), - 190 => Some(NEGSEL_A::PD14), - 191 => Some(NEGSEL_A::PD15), + 0 => Some(Negsel::Vss), + 16 => Some(Negsel::Vrefdivavdd), + 17 => Some(Negsel::Vrefdivavddlp), + 18 => Some(Negsel::Vrefdiv1v25), + 19 => Some(Negsel::Vrefdiv1v25lp), + 20 => Some(Negsel::Vrefdiv2v5), + 21 => Some(Negsel::Vrefdiv2v5lp), + 32 => Some(Negsel::Vsense01div4), + 33 => Some(Negsel::Vsense01div4lp), + 34 => Some(Negsel::Vsense11div4), + 35 => Some(Negsel::Vsense11div4lp), + 48 => Some(Negsel::Capsense), + 64 => Some(Negsel::Vdacout0), + 65 => Some(Negsel::Vdacout1), + 128 => Some(Negsel::Pa0), + 129 => Some(Negsel::Pa1), + 130 => Some(Negsel::Pa2), + 131 => Some(Negsel::Pa3), + 132 => Some(Negsel::Pa4), + 133 => Some(Negsel::Pa5), + 134 => Some(Negsel::Pa6), + 135 => Some(Negsel::Pa7), + 136 => Some(Negsel::Pa8), + 137 => Some(Negsel::Pa9), + 138 => Some(Negsel::Pa10), + 139 => Some(Negsel::Pa11), + 140 => Some(Negsel::Pa12), + 141 => Some(Negsel::Pa13), + 142 => Some(Negsel::Pa14), + 143 => Some(Negsel::Pa15), + 144 => Some(Negsel::Pb0), + 145 => Some(Negsel::Pb1), + 146 => Some(Negsel::Pb2), + 147 => Some(Negsel::Pb3), + 148 => Some(Negsel::Pb4), + 149 => Some(Negsel::Pb5), + 150 => Some(Negsel::Pb6), + 151 => Some(Negsel::Pb7), + 152 => Some(Negsel::Pb8), + 153 => Some(Negsel::Pb9), + 154 => Some(Negsel::Pb10), + 155 => Some(Negsel::Pb11), + 156 => Some(Negsel::Pb12), + 157 => Some(Negsel::Pb13), + 158 => Some(Negsel::Pb14), + 159 => Some(Negsel::Pb15), + 160 => Some(Negsel::Pc0), + 161 => Some(Negsel::Pc1), + 162 => Some(Negsel::Pc2), + 163 => Some(Negsel::Pc3), + 164 => Some(Negsel::Pc4), + 165 => Some(Negsel::Pc5), + 166 => Some(Negsel::Pc6), + 167 => Some(Negsel::Pc7), + 168 => Some(Negsel::Pc8), + 169 => Some(Negsel::Pc9), + 170 => Some(Negsel::Pc10), + 171 => Some(Negsel::Pc11), + 172 => Some(Negsel::Pc12), + 173 => Some(Negsel::Pc13), + 174 => Some(Negsel::Pc14), + 175 => Some(Negsel::Pc15), + 176 => Some(Negsel::Pd0), + 177 => Some(Negsel::Pd1), + 178 => Some(Negsel::Pd2), + 179 => Some(Negsel::Pd3), + 180 => Some(Negsel::Pd4), + 181 => Some(Negsel::Pd5), + 182 => Some(Negsel::Pd6), + 183 => Some(Negsel::Pd7), + 184 => Some(Negsel::Pd8), + 185 => Some(Negsel::Pd9), + 186 => Some(Negsel::Pd10), + 187 => Some(Negsel::Pd11), + 188 => Some(Negsel::Pd12), + 189 => Some(Negsel::Pd13), + 190 => Some(Negsel::Pd14), + 191 => Some(Negsel::Pd15), _ => None, } } - #[doc = "Checks if the value of the field is `VSS`"] + #[doc = "VSS"] #[inline(always)] pub fn is_vss(&self) -> bool { - *self == NEGSEL_A::VSS + *self == Negsel::Vss } - #[doc = "Checks if the value of the field is `VREFDIVAVDD`"] + #[doc = "Divided AVDD"] #[inline(always)] pub fn is_vrefdivavdd(&self) -> bool { - *self == NEGSEL_A::VREFDIVAVDD + *self == Negsel::Vrefdivavdd } - #[doc = "Checks if the value of the field is `VREFDIVAVDDLP`"] + #[doc = "Low-Power Divided AVDD"] #[inline(always)] pub fn is_vrefdivavddlp(&self) -> bool { - *self == NEGSEL_A::VREFDIVAVDDLP + *self == Negsel::Vrefdivavddlp } - #[doc = "Checks if the value of the field is `VREFDIV1V25`"] + #[doc = "Divided 1V25 reference"] #[inline(always)] pub fn is_vrefdiv1v25(&self) -> bool { - *self == NEGSEL_A::VREFDIV1V25 + *self == Negsel::Vrefdiv1v25 } - #[doc = "Checks if the value of the field is `VREFDIV1V25LP`"] + #[doc = "Low-power Divided 1V25 reference"] #[inline(always)] pub fn is_vrefdiv1v25lp(&self) -> bool { - *self == NEGSEL_A::VREFDIV1V25LP + *self == Negsel::Vrefdiv1v25lp } - #[doc = "Checks if the value of the field is `VREFDIV2V5`"] + #[doc = "Divided 2V5 reference"] #[inline(always)] pub fn is_vrefdiv2v5(&self) -> bool { - *self == NEGSEL_A::VREFDIV2V5 + *self == Negsel::Vrefdiv2v5 } - #[doc = "Checks if the value of the field is `VREFDIV2V5LP`"] + #[doc = "Low-power Divided 2V5 reference"] #[inline(always)] pub fn is_vrefdiv2v5lp(&self) -> bool { - *self == NEGSEL_A::VREFDIV2V5LP + *self == Negsel::Vrefdiv2v5lp } - #[doc = "Checks if the value of the field is `VSENSE01DIV4`"] + #[doc = "VSENSE0 divided by 4"] #[inline(always)] pub fn is_vsense01div4(&self) -> bool { - *self == NEGSEL_A::VSENSE01DIV4 + *self == Negsel::Vsense01div4 } - #[doc = "Checks if the value of the field is `VSENSE01DIV4LP`"] + #[doc = "Low-power VSENSE0 divided by 4"] #[inline(always)] pub fn is_vsense01div4lp(&self) -> bool { - *self == NEGSEL_A::VSENSE01DIV4LP + *self == Negsel::Vsense01div4lp } - #[doc = "Checks if the value of the field is `VSENSE11DIV4`"] + #[doc = "VSENSE1 divided by 4"] #[inline(always)] pub fn is_vsense11div4(&self) -> bool { - *self == NEGSEL_A::VSENSE11DIV4 + *self == Negsel::Vsense11div4 } - #[doc = "Checks if the value of the field is `VSENSE11DIV4LP`"] + #[doc = "Low-power VSENSE1 divided by 4"] #[inline(always)] pub fn is_vsense11div4lp(&self) -> bool { - *self == NEGSEL_A::VSENSE11DIV4LP + *self == Negsel::Vsense11div4lp } - #[doc = "Checks if the value of the field is `CAPSENSE`"] + #[doc = "Deprecated capacitive sensing feature, not recommended for new designs"] #[inline(always)] pub fn is_capsense(&self) -> bool { - *self == NEGSEL_A::CAPSENSE + *self == Negsel::Capsense } - #[doc = "Checks if the value of the field is `VDACOUT0`"] + #[doc = "VDAC0 channel 0 output"] #[inline(always)] pub fn is_vdacout0(&self) -> bool { - *self == NEGSEL_A::VDACOUT0 + *self == Negsel::Vdacout0 } - #[doc = "Checks if the value of the field is `VDACOUT1`"] + #[doc = "VDAC0 channel 1 output"] #[inline(always)] pub fn is_vdacout1(&self) -> bool { - *self == NEGSEL_A::VDACOUT1 + *self == Negsel::Vdacout1 } - #[doc = "Checks if the value of the field is `PA0`"] + #[doc = "Port A, Pin0"] #[inline(always)] pub fn is_pa0(&self) -> bool { - *self == NEGSEL_A::PA0 + *self == Negsel::Pa0 } - #[doc = "Checks if the value of the field is `PA1`"] + #[doc = "Port A, Pin1"] #[inline(always)] pub fn is_pa1(&self) -> bool { - *self == NEGSEL_A::PA1 + *self == Negsel::Pa1 } - #[doc = "Checks if the value of the field is `PA2`"] + #[doc = "Port A, Pin2"] #[inline(always)] pub fn is_pa2(&self) -> bool { - *self == NEGSEL_A::PA2 + *self == Negsel::Pa2 } - #[doc = "Checks if the value of the field is `PA3`"] + #[doc = "Port A, Pin3"] #[inline(always)] pub fn is_pa3(&self) -> bool { - *self == NEGSEL_A::PA3 + *self == Negsel::Pa3 } - #[doc = "Checks if the value of the field is `PA4`"] + #[doc = "Port A, Pin4"] #[inline(always)] pub fn is_pa4(&self) -> bool { - *self == NEGSEL_A::PA4 + *self == Negsel::Pa4 } - #[doc = "Checks if the value of the field is `PA5`"] + #[doc = "Port A, Pin5"] #[inline(always)] pub fn is_pa5(&self) -> bool { - *self == NEGSEL_A::PA5 + *self == Negsel::Pa5 } - #[doc = "Checks if the value of the field is `PA6`"] + #[doc = "Port A, Pin6"] #[inline(always)] pub fn is_pa6(&self) -> bool { - *self == NEGSEL_A::PA6 + *self == Negsel::Pa6 } - #[doc = "Checks if the value of the field is `PA7`"] + #[doc = "Port A, Pin7"] #[inline(always)] pub fn is_pa7(&self) -> bool { - *self == NEGSEL_A::PA7 + *self == Negsel::Pa7 } - #[doc = "Checks if the value of the field is `PA8`"] + #[doc = "Port A, Pin8"] #[inline(always)] pub fn is_pa8(&self) -> bool { - *self == NEGSEL_A::PA8 + *self == Negsel::Pa8 } - #[doc = "Checks if the value of the field is `PA9`"] + #[doc = "Port A, Pin9"] #[inline(always)] pub fn is_pa9(&self) -> bool { - *self == NEGSEL_A::PA9 + *self == Negsel::Pa9 } - #[doc = "Checks if the value of the field is `PA10`"] + #[doc = "Port A, Pin10"] #[inline(always)] pub fn is_pa10(&self) -> bool { - *self == NEGSEL_A::PA10 + *self == Negsel::Pa10 } - #[doc = "Checks if the value of the field is `PA11`"] + #[doc = "Port A, Pin11"] #[inline(always)] pub fn is_pa11(&self) -> bool { - *self == NEGSEL_A::PA11 + *self == Negsel::Pa11 } - #[doc = "Checks if the value of the field is `PA12`"] + #[doc = "Port A, Pin12"] #[inline(always)] pub fn is_pa12(&self) -> bool { - *self == NEGSEL_A::PA12 + *self == Negsel::Pa12 } - #[doc = "Checks if the value of the field is `PA13`"] + #[doc = "Port A, Pin13"] #[inline(always)] pub fn is_pa13(&self) -> bool { - *self == NEGSEL_A::PA13 + *self == Negsel::Pa13 } - #[doc = "Checks if the value of the field is `PA14`"] + #[doc = "Port A, Pin14"] #[inline(always)] pub fn is_pa14(&self) -> bool { - *self == NEGSEL_A::PA14 + *self == Negsel::Pa14 } - #[doc = "Checks if the value of the field is `PA15`"] + #[doc = "Port A, Pin15"] #[inline(always)] pub fn is_pa15(&self) -> bool { - *self == NEGSEL_A::PA15 + *self == Negsel::Pa15 } - #[doc = "Checks if the value of the field is `PB0`"] + #[doc = "Port B, Pin0"] #[inline(always)] pub fn is_pb0(&self) -> bool { - *self == NEGSEL_A::PB0 + *self == Negsel::Pb0 } - #[doc = "Checks if the value of the field is `PB1`"] + #[doc = "Port B, Pin1"] #[inline(always)] pub fn is_pb1(&self) -> bool { - *self == NEGSEL_A::PB1 + *self == Negsel::Pb1 } - #[doc = "Checks if the value of the field is `PB2`"] + #[doc = "Port B, Pin2"] #[inline(always)] pub fn is_pb2(&self) -> bool { - *self == NEGSEL_A::PB2 + *self == Negsel::Pb2 } - #[doc = "Checks if the value of the field is `PB3`"] + #[doc = "Port B, Pin3"] #[inline(always)] pub fn is_pb3(&self) -> bool { - *self == NEGSEL_A::PB3 + *self == Negsel::Pb3 } - #[doc = "Checks if the value of the field is `PB4`"] + #[doc = "Port B, Pin4"] #[inline(always)] pub fn is_pb4(&self) -> bool { - *self == NEGSEL_A::PB4 + *self == Negsel::Pb4 } - #[doc = "Checks if the value of the field is `PB5`"] + #[doc = "Port B, Pin5"] #[inline(always)] pub fn is_pb5(&self) -> bool { - *self == NEGSEL_A::PB5 + *self == Negsel::Pb5 } - #[doc = "Checks if the value of the field is `PB6`"] + #[doc = "Port B, Pin6"] #[inline(always)] pub fn is_pb6(&self) -> bool { - *self == NEGSEL_A::PB6 + *self == Negsel::Pb6 } - #[doc = "Checks if the value of the field is `PB7`"] + #[doc = "Port B, Pin7"] #[inline(always)] pub fn is_pb7(&self) -> bool { - *self == NEGSEL_A::PB7 + *self == Negsel::Pb7 } - #[doc = "Checks if the value of the field is `PB8`"] + #[doc = "Port B, Pin8"] #[inline(always)] pub fn is_pb8(&self) -> bool { - *self == NEGSEL_A::PB8 + *self == Negsel::Pb8 } - #[doc = "Checks if the value of the field is `PB9`"] + #[doc = "Port B, Pin9"] #[inline(always)] pub fn is_pb9(&self) -> bool { - *self == NEGSEL_A::PB9 + *self == Negsel::Pb9 } - #[doc = "Checks if the value of the field is `PB10`"] + #[doc = "Port B, Pin10"] #[inline(always)] pub fn is_pb10(&self) -> bool { - *self == NEGSEL_A::PB10 + *self == Negsel::Pb10 } - #[doc = "Checks if the value of the field is `PB11`"] + #[doc = "Port B, Pin11"] #[inline(always)] pub fn is_pb11(&self) -> bool { - *self == NEGSEL_A::PB11 + *self == Negsel::Pb11 } - #[doc = "Checks if the value of the field is `PB12`"] + #[doc = "Port B, Pin12"] #[inline(always)] pub fn is_pb12(&self) -> bool { - *self == NEGSEL_A::PB12 + *self == Negsel::Pb12 } - #[doc = "Checks if the value of the field is `PB13`"] + #[doc = "Port B, Pin13"] #[inline(always)] pub fn is_pb13(&self) -> bool { - *self == NEGSEL_A::PB13 + *self == Negsel::Pb13 } - #[doc = "Checks if the value of the field is `PB14`"] + #[doc = "Port B, Pin14"] #[inline(always)] pub fn is_pb14(&self) -> bool { - *self == NEGSEL_A::PB14 + *self == Negsel::Pb14 } - #[doc = "Checks if the value of the field is `PB15`"] + #[doc = "Port B, Pin15"] #[inline(always)] pub fn is_pb15(&self) -> bool { - *self == NEGSEL_A::PB15 + *self == Negsel::Pb15 } - #[doc = "Checks if the value of the field is `PC0`"] + #[doc = "Port C, Pin0"] #[inline(always)] pub fn is_pc0(&self) -> bool { - *self == NEGSEL_A::PC0 + *self == Negsel::Pc0 } - #[doc = "Checks if the value of the field is `PC1`"] + #[doc = "Port C, Pin1"] #[inline(always)] pub fn is_pc1(&self) -> bool { - *self == NEGSEL_A::PC1 + *self == Negsel::Pc1 } - #[doc = "Checks if the value of the field is `PC2`"] + #[doc = "Port C, Pin2"] #[inline(always)] pub fn is_pc2(&self) -> bool { - *self == NEGSEL_A::PC2 + *self == Negsel::Pc2 } - #[doc = "Checks if the value of the field is `PC3`"] + #[doc = "Port C, Pin3"] #[inline(always)] pub fn is_pc3(&self) -> bool { - *self == NEGSEL_A::PC3 + *self == Negsel::Pc3 } - #[doc = "Checks if the value of the field is `PC4`"] + #[doc = "Port C, Pin4"] #[inline(always)] pub fn is_pc4(&self) -> bool { - *self == NEGSEL_A::PC4 + *self == Negsel::Pc4 } - #[doc = "Checks if the value of the field is `PC5`"] + #[doc = "Port C, Pin5"] #[inline(always)] pub fn is_pc5(&self) -> bool { - *self == NEGSEL_A::PC5 + *self == Negsel::Pc5 } - #[doc = "Checks if the value of the field is `PC6`"] + #[doc = "Port C, Pin6"] #[inline(always)] pub fn is_pc6(&self) -> bool { - *self == NEGSEL_A::PC6 + *self == Negsel::Pc6 } - #[doc = "Checks if the value of the field is `PC7`"] + #[doc = "Port C, Pin7"] #[inline(always)] pub fn is_pc7(&self) -> bool { - *self == NEGSEL_A::PC7 + *self == Negsel::Pc7 } - #[doc = "Checks if the value of the field is `PC8`"] + #[doc = "Port C, Pin8"] #[inline(always)] pub fn is_pc8(&self) -> bool { - *self == NEGSEL_A::PC8 + *self == Negsel::Pc8 } - #[doc = "Checks if the value of the field is `PC9`"] + #[doc = "Port C, Pin9"] #[inline(always)] pub fn is_pc9(&self) -> bool { - *self == NEGSEL_A::PC9 + *self == Negsel::Pc9 } - #[doc = "Checks if the value of the field is `PC10`"] + #[doc = "Port C, Pin10"] #[inline(always)] pub fn is_pc10(&self) -> bool { - *self == NEGSEL_A::PC10 + *self == Negsel::Pc10 } - #[doc = "Checks if the value of the field is `PC11`"] + #[doc = "Port C, Pin11"] #[inline(always)] pub fn is_pc11(&self) -> bool { - *self == NEGSEL_A::PC11 + *self == Negsel::Pc11 } - #[doc = "Checks if the value of the field is `PC12`"] + #[doc = "Port C, Pin12"] #[inline(always)] pub fn is_pc12(&self) -> bool { - *self == NEGSEL_A::PC12 + *self == Negsel::Pc12 } - #[doc = "Checks if the value of the field is `PC13`"] + #[doc = "Port C, Pin13"] #[inline(always)] pub fn is_pc13(&self) -> bool { - *self == NEGSEL_A::PC13 + *self == Negsel::Pc13 } - #[doc = "Checks if the value of the field is `PC14`"] + #[doc = "Port C, Pin14"] #[inline(always)] pub fn is_pc14(&self) -> bool { - *self == NEGSEL_A::PC14 + *self == Negsel::Pc14 } - #[doc = "Checks if the value of the field is `PC15`"] + #[doc = "Port C, Pin15"] #[inline(always)] pub fn is_pc15(&self) -> bool { - *self == NEGSEL_A::PC15 + *self == Negsel::Pc15 } - #[doc = "Checks if the value of the field is `PD0`"] + #[doc = "Port D, Pin0"] #[inline(always)] pub fn is_pd0(&self) -> bool { - *self == NEGSEL_A::PD0 + *self == Negsel::Pd0 } - #[doc = "Checks if the value of the field is `PD1`"] + #[doc = "Port D, Pin1"] #[inline(always)] pub fn is_pd1(&self) -> bool { - *self == NEGSEL_A::PD1 + *self == Negsel::Pd1 } - #[doc = "Checks if the value of the field is `PD2`"] + #[doc = "Port D, Pin2"] #[inline(always)] pub fn is_pd2(&self) -> bool { - *self == NEGSEL_A::PD2 + *self == Negsel::Pd2 } - #[doc = "Checks if the value of the field is `PD3`"] + #[doc = "Port D, Pin3"] #[inline(always)] pub fn is_pd3(&self) -> bool { - *self == NEGSEL_A::PD3 + *self == Negsel::Pd3 } - #[doc = "Checks if the value of the field is `PD4`"] + #[doc = "Port D, Pin4"] #[inline(always)] pub fn is_pd4(&self) -> bool { - *self == NEGSEL_A::PD4 + *self == Negsel::Pd4 } - #[doc = "Checks if the value of the field is `PD5`"] + #[doc = "Port D, Pin5"] #[inline(always)] pub fn is_pd5(&self) -> bool { - *self == NEGSEL_A::PD5 + *self == Negsel::Pd5 } - #[doc = "Checks if the value of the field is `PD6`"] + #[doc = "Port D, Pin6"] #[inline(always)] pub fn is_pd6(&self) -> bool { - *self == NEGSEL_A::PD6 + *self == Negsel::Pd6 } - #[doc = "Checks if the value of the field is `PD7`"] + #[doc = "Port D, Pin7"] #[inline(always)] pub fn is_pd7(&self) -> bool { - *self == NEGSEL_A::PD7 + *self == Negsel::Pd7 } - #[doc = "Checks if the value of the field is `PD8`"] + #[doc = "Port D, Pin8"] #[inline(always)] pub fn is_pd8(&self) -> bool { - *self == NEGSEL_A::PD8 + *self == Negsel::Pd8 } - #[doc = "Checks if the value of the field is `PD9`"] + #[doc = "Port D, Pin9"] #[inline(always)] pub fn is_pd9(&self) -> bool { - *self == NEGSEL_A::PD9 + *self == Negsel::Pd9 } - #[doc = "Checks if the value of the field is `PD10`"] + #[doc = "Port D, Pin10"] #[inline(always)] pub fn is_pd10(&self) -> bool { - *self == NEGSEL_A::PD10 + *self == Negsel::Pd10 } - #[doc = "Checks if the value of the field is `PD11`"] + #[doc = "Port D, Pin11"] #[inline(always)] pub fn is_pd11(&self) -> bool { - *self == NEGSEL_A::PD11 + *self == Negsel::Pd11 } - #[doc = "Checks if the value of the field is `PD12`"] + #[doc = "Port D, Pin12"] #[inline(always)] pub fn is_pd12(&self) -> bool { - *self == NEGSEL_A::PD12 + *self == Negsel::Pd12 } - #[doc = "Checks if the value of the field is `PD13`"] + #[doc = "Port D, Pin13"] #[inline(always)] pub fn is_pd13(&self) -> bool { - *self == NEGSEL_A::PD13 + *self == Negsel::Pd13 } - #[doc = "Checks if the value of the field is `PD14`"] + #[doc = "Port D, Pin14"] #[inline(always)] pub fn is_pd14(&self) -> bool { - *self == NEGSEL_A::PD14 + *self == Negsel::Pd14 } - #[doc = "Checks if the value of the field is `PD15`"] + #[doc = "Port D, Pin15"] #[inline(always)] pub fn is_pd15(&self) -> bool { - *self == NEGSEL_A::PD15 + *self == Negsel::Pd15 } } #[doc = "Field `NEGSEL` writer - Negative Input Select"] -pub type NEGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, INPUTCTRL_SPEC, u8, NEGSEL_A, 8, O>; -impl<'a, const O: u8> NEGSEL_W<'a, O> { +pub type NegselW<'a, REG> = crate::FieldWriter<'a, REG, 8, Negsel>; +impl<'a, REG> NegselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "VSS"] #[inline(always)] - pub fn vss(self) -> &'a mut W { - self.variant(NEGSEL_A::VSS) + pub fn vss(self) -> &'a mut crate::W { + self.variant(Negsel::Vss) } #[doc = "Divided AVDD"] #[inline(always)] - pub fn vrefdivavdd(self) -> &'a mut W { - self.variant(NEGSEL_A::VREFDIVAVDD) + pub fn vrefdivavdd(self) -> &'a mut crate::W { + self.variant(Negsel::Vrefdivavdd) } #[doc = "Low-Power Divided AVDD"] #[inline(always)] - pub fn vrefdivavddlp(self) -> &'a mut W { - self.variant(NEGSEL_A::VREFDIVAVDDLP) + pub fn vrefdivavddlp(self) -> &'a mut crate::W { + self.variant(Negsel::Vrefdivavddlp) } #[doc = "Divided 1V25 reference"] #[inline(always)] - pub fn vrefdiv1v25(self) -> &'a mut W { - self.variant(NEGSEL_A::VREFDIV1V25) + pub fn vrefdiv1v25(self) -> &'a mut crate::W { + self.variant(Negsel::Vrefdiv1v25) } #[doc = "Low-power Divided 1V25 reference"] #[inline(always)] - pub fn vrefdiv1v25lp(self) -> &'a mut W { - self.variant(NEGSEL_A::VREFDIV1V25LP) + pub fn vrefdiv1v25lp(self) -> &'a mut crate::W { + self.variant(Negsel::Vrefdiv1v25lp) } #[doc = "Divided 2V5 reference"] #[inline(always)] - pub fn vrefdiv2v5(self) -> &'a mut W { - self.variant(NEGSEL_A::VREFDIV2V5) + pub fn vrefdiv2v5(self) -> &'a mut crate::W { + self.variant(Negsel::Vrefdiv2v5) } #[doc = "Low-power Divided 2V5 reference"] #[inline(always)] - pub fn vrefdiv2v5lp(self) -> &'a mut W { - self.variant(NEGSEL_A::VREFDIV2V5LP) + pub fn vrefdiv2v5lp(self) -> &'a mut crate::W { + self.variant(Negsel::Vrefdiv2v5lp) } #[doc = "VSENSE0 divided by 4"] #[inline(always)] - pub fn vsense01div4(self) -> &'a mut W { - self.variant(NEGSEL_A::VSENSE01DIV4) + pub fn vsense01div4(self) -> &'a mut crate::W { + self.variant(Negsel::Vsense01div4) } #[doc = "Low-power VSENSE0 divided by 4"] #[inline(always)] - pub fn vsense01div4lp(self) -> &'a mut W { - self.variant(NEGSEL_A::VSENSE01DIV4LP) + pub fn vsense01div4lp(self) -> &'a mut crate::W { + self.variant(Negsel::Vsense01div4lp) } #[doc = "VSENSE1 divided by 4"] #[inline(always)] - pub fn vsense11div4(self) -> &'a mut W { - self.variant(NEGSEL_A::VSENSE11DIV4) + pub fn vsense11div4(self) -> &'a mut crate::W { + self.variant(Negsel::Vsense11div4) } #[doc = "Low-power VSENSE1 divided by 4"] #[inline(always)] - pub fn vsense11div4lp(self) -> &'a mut W { - self.variant(NEGSEL_A::VSENSE11DIV4LP) + pub fn vsense11div4lp(self) -> &'a mut crate::W { + self.variant(Negsel::Vsense11div4lp) } - #[doc = "Capsense mode"] + #[doc = "Deprecated capacitive sensing feature, not recommended for new designs"] #[inline(always)] - pub fn capsense(self) -> &'a mut W { - self.variant(NEGSEL_A::CAPSENSE) + pub fn capsense(self) -> &'a mut crate::W { + self.variant(Negsel::Capsense) } #[doc = "VDAC0 channel 0 output"] #[inline(always)] - pub fn vdacout0(self) -> &'a mut W { - self.variant(NEGSEL_A::VDACOUT0) + pub fn vdacout0(self) -> &'a mut crate::W { + self.variant(Negsel::Vdacout0) } #[doc = "VDAC0 channel 1 output"] #[inline(always)] - pub fn vdacout1(self) -> &'a mut W { - self.variant(NEGSEL_A::VDACOUT1) + pub fn vdacout1(self) -> &'a mut crate::W { + self.variant(Negsel::Vdacout1) } #[doc = "Port A, Pin0"] #[inline(always)] - pub fn pa0(self) -> &'a mut W { - self.variant(NEGSEL_A::PA0) + pub fn pa0(self) -> &'a mut crate::W { + self.variant(Negsel::Pa0) } #[doc = "Port A, Pin1"] #[inline(always)] - pub fn pa1(self) -> &'a mut W { - self.variant(NEGSEL_A::PA1) + pub fn pa1(self) -> &'a mut crate::W { + self.variant(Negsel::Pa1) } #[doc = "Port A, Pin2"] #[inline(always)] - pub fn pa2(self) -> &'a mut W { - self.variant(NEGSEL_A::PA2) + pub fn pa2(self) -> &'a mut crate::W { + self.variant(Negsel::Pa2) } #[doc = "Port A, Pin3"] #[inline(always)] - pub fn pa3(self) -> &'a mut W { - self.variant(NEGSEL_A::PA3) + pub fn pa3(self) -> &'a mut crate::W { + self.variant(Negsel::Pa3) } #[doc = "Port A, Pin4"] #[inline(always)] - pub fn pa4(self) -> &'a mut W { - self.variant(NEGSEL_A::PA4) + pub fn pa4(self) -> &'a mut crate::W { + self.variant(Negsel::Pa4) } #[doc = "Port A, Pin5"] #[inline(always)] - pub fn pa5(self) -> &'a mut W { - self.variant(NEGSEL_A::PA5) + pub fn pa5(self) -> &'a mut crate::W { + self.variant(Negsel::Pa5) } #[doc = "Port A, Pin6"] #[inline(always)] - pub fn pa6(self) -> &'a mut W { - self.variant(NEGSEL_A::PA6) + pub fn pa6(self) -> &'a mut crate::W { + self.variant(Negsel::Pa6) } #[doc = "Port A, Pin7"] #[inline(always)] - pub fn pa7(self) -> &'a mut W { - self.variant(NEGSEL_A::PA7) + pub fn pa7(self) -> &'a mut crate::W { + self.variant(Negsel::Pa7) } #[doc = "Port A, Pin8"] #[inline(always)] - pub fn pa8(self) -> &'a mut W { - self.variant(NEGSEL_A::PA8) + pub fn pa8(self) -> &'a mut crate::W { + self.variant(Negsel::Pa8) } #[doc = "Port A, Pin9"] #[inline(always)] - pub fn pa9(self) -> &'a mut W { - self.variant(NEGSEL_A::PA9) + pub fn pa9(self) -> &'a mut crate::W { + self.variant(Negsel::Pa9) } #[doc = "Port A, Pin10"] #[inline(always)] - pub fn pa10(self) -> &'a mut W { - self.variant(NEGSEL_A::PA10) + pub fn pa10(self) -> &'a mut crate::W { + self.variant(Negsel::Pa10) } #[doc = "Port A, Pin11"] #[inline(always)] - pub fn pa11(self) -> &'a mut W { - self.variant(NEGSEL_A::PA11) + pub fn pa11(self) -> &'a mut crate::W { + self.variant(Negsel::Pa11) } #[doc = "Port A, Pin12"] #[inline(always)] - pub fn pa12(self) -> &'a mut W { - self.variant(NEGSEL_A::PA12) + pub fn pa12(self) -> &'a mut crate::W { + self.variant(Negsel::Pa12) } #[doc = "Port A, Pin13"] #[inline(always)] - pub fn pa13(self) -> &'a mut W { - self.variant(NEGSEL_A::PA13) + pub fn pa13(self) -> &'a mut crate::W { + self.variant(Negsel::Pa13) } #[doc = "Port A, Pin14"] #[inline(always)] - pub fn pa14(self) -> &'a mut W { - self.variant(NEGSEL_A::PA14) + pub fn pa14(self) -> &'a mut crate::W { + self.variant(Negsel::Pa14) } #[doc = "Port A, Pin15"] #[inline(always)] - pub fn pa15(self) -> &'a mut W { - self.variant(NEGSEL_A::PA15) + pub fn pa15(self) -> &'a mut crate::W { + self.variant(Negsel::Pa15) } #[doc = "Port B, Pin0"] #[inline(always)] - pub fn pb0(self) -> &'a mut W { - self.variant(NEGSEL_A::PB0) + pub fn pb0(self) -> &'a mut crate::W { + self.variant(Negsel::Pb0) } #[doc = "Port B, Pin1"] #[inline(always)] - pub fn pb1(self) -> &'a mut W { - self.variant(NEGSEL_A::PB1) + pub fn pb1(self) -> &'a mut crate::W { + self.variant(Negsel::Pb1) } #[doc = "Port B, Pin2"] #[inline(always)] - pub fn pb2(self) -> &'a mut W { - self.variant(NEGSEL_A::PB2) + pub fn pb2(self) -> &'a mut crate::W { + self.variant(Negsel::Pb2) } #[doc = "Port B, Pin3"] #[inline(always)] - pub fn pb3(self) -> &'a mut W { - self.variant(NEGSEL_A::PB3) + pub fn pb3(self) -> &'a mut crate::W { + self.variant(Negsel::Pb3) } #[doc = "Port B, Pin4"] #[inline(always)] - pub fn pb4(self) -> &'a mut W { - self.variant(NEGSEL_A::PB4) + pub fn pb4(self) -> &'a mut crate::W { + self.variant(Negsel::Pb4) } #[doc = "Port B, Pin5"] #[inline(always)] - pub fn pb5(self) -> &'a mut W { - self.variant(NEGSEL_A::PB5) + pub fn pb5(self) -> &'a mut crate::W { + self.variant(Negsel::Pb5) } #[doc = "Port B, Pin6"] #[inline(always)] - pub fn pb6(self) -> &'a mut W { - self.variant(NEGSEL_A::PB6) + pub fn pb6(self) -> &'a mut crate::W { + self.variant(Negsel::Pb6) } #[doc = "Port B, Pin7"] #[inline(always)] - pub fn pb7(self) -> &'a mut W { - self.variant(NEGSEL_A::PB7) + pub fn pb7(self) -> &'a mut crate::W { + self.variant(Negsel::Pb7) } #[doc = "Port B, Pin8"] #[inline(always)] - pub fn pb8(self) -> &'a mut W { - self.variant(NEGSEL_A::PB8) + pub fn pb8(self) -> &'a mut crate::W { + self.variant(Negsel::Pb8) } #[doc = "Port B, Pin9"] #[inline(always)] - pub fn pb9(self) -> &'a mut W { - self.variant(NEGSEL_A::PB9) + pub fn pb9(self) -> &'a mut crate::W { + self.variant(Negsel::Pb9) } #[doc = "Port B, Pin10"] #[inline(always)] - pub fn pb10(self) -> &'a mut W { - self.variant(NEGSEL_A::PB10) + pub fn pb10(self) -> &'a mut crate::W { + self.variant(Negsel::Pb10) } #[doc = "Port B, Pin11"] #[inline(always)] - pub fn pb11(self) -> &'a mut W { - self.variant(NEGSEL_A::PB11) + pub fn pb11(self) -> &'a mut crate::W { + self.variant(Negsel::Pb11) } #[doc = "Port B, Pin12"] #[inline(always)] - pub fn pb12(self) -> &'a mut W { - self.variant(NEGSEL_A::PB12) + pub fn pb12(self) -> &'a mut crate::W { + self.variant(Negsel::Pb12) } #[doc = "Port B, Pin13"] #[inline(always)] - pub fn pb13(self) -> &'a mut W { - self.variant(NEGSEL_A::PB13) + pub fn pb13(self) -> &'a mut crate::W { + self.variant(Negsel::Pb13) } #[doc = "Port B, Pin14"] #[inline(always)] - pub fn pb14(self) -> &'a mut W { - self.variant(NEGSEL_A::PB14) + pub fn pb14(self) -> &'a mut crate::W { + self.variant(Negsel::Pb14) } #[doc = "Port B, Pin15"] #[inline(always)] - pub fn pb15(self) -> &'a mut W { - self.variant(NEGSEL_A::PB15) + pub fn pb15(self) -> &'a mut crate::W { + self.variant(Negsel::Pb15) } #[doc = "Port C, Pin0"] #[inline(always)] - pub fn pc0(self) -> &'a mut W { - self.variant(NEGSEL_A::PC0) + pub fn pc0(self) -> &'a mut crate::W { + self.variant(Negsel::Pc0) } #[doc = "Port C, Pin1"] #[inline(always)] - pub fn pc1(self) -> &'a mut W { - self.variant(NEGSEL_A::PC1) + pub fn pc1(self) -> &'a mut crate::W { + self.variant(Negsel::Pc1) } #[doc = "Port C, Pin2"] #[inline(always)] - pub fn pc2(self) -> &'a mut W { - self.variant(NEGSEL_A::PC2) + pub fn pc2(self) -> &'a mut crate::W { + self.variant(Negsel::Pc2) } #[doc = "Port C, Pin3"] #[inline(always)] - pub fn pc3(self) -> &'a mut W { - self.variant(NEGSEL_A::PC3) + pub fn pc3(self) -> &'a mut crate::W { + self.variant(Negsel::Pc3) } #[doc = "Port C, Pin4"] #[inline(always)] - pub fn pc4(self) -> &'a mut W { - self.variant(NEGSEL_A::PC4) + pub fn pc4(self) -> &'a mut crate::W { + self.variant(Negsel::Pc4) } #[doc = "Port C, Pin5"] #[inline(always)] - pub fn pc5(self) -> &'a mut W { - self.variant(NEGSEL_A::PC5) + pub fn pc5(self) -> &'a mut crate::W { + self.variant(Negsel::Pc5) } #[doc = "Port C, Pin6"] #[inline(always)] - pub fn pc6(self) -> &'a mut W { - self.variant(NEGSEL_A::PC6) + pub fn pc6(self) -> &'a mut crate::W { + self.variant(Negsel::Pc6) } #[doc = "Port C, Pin7"] #[inline(always)] - pub fn pc7(self) -> &'a mut W { - self.variant(NEGSEL_A::PC7) + pub fn pc7(self) -> &'a mut crate::W { + self.variant(Negsel::Pc7) } #[doc = "Port C, Pin8"] #[inline(always)] - pub fn pc8(self) -> &'a mut W { - self.variant(NEGSEL_A::PC8) + pub fn pc8(self) -> &'a mut crate::W { + self.variant(Negsel::Pc8) } #[doc = "Port C, Pin9"] #[inline(always)] - pub fn pc9(self) -> &'a mut W { - self.variant(NEGSEL_A::PC9) + pub fn pc9(self) -> &'a mut crate::W { + self.variant(Negsel::Pc9) } #[doc = "Port C, Pin10"] #[inline(always)] - pub fn pc10(self) -> &'a mut W { - self.variant(NEGSEL_A::PC10) + pub fn pc10(self) -> &'a mut crate::W { + self.variant(Negsel::Pc10) } #[doc = "Port C, Pin11"] #[inline(always)] - pub fn pc11(self) -> &'a mut W { - self.variant(NEGSEL_A::PC11) + pub fn pc11(self) -> &'a mut crate::W { + self.variant(Negsel::Pc11) } #[doc = "Port C, Pin12"] #[inline(always)] - pub fn pc12(self) -> &'a mut W { - self.variant(NEGSEL_A::PC12) + pub fn pc12(self) -> &'a mut crate::W { + self.variant(Negsel::Pc12) } #[doc = "Port C, Pin13"] #[inline(always)] - pub fn pc13(self) -> &'a mut W { - self.variant(NEGSEL_A::PC13) + pub fn pc13(self) -> &'a mut crate::W { + self.variant(Negsel::Pc13) } #[doc = "Port C, Pin14"] #[inline(always)] - pub fn pc14(self) -> &'a mut W { - self.variant(NEGSEL_A::PC14) + pub fn pc14(self) -> &'a mut crate::W { + self.variant(Negsel::Pc14) } #[doc = "Port C, Pin15"] #[inline(always)] - pub fn pc15(self) -> &'a mut W { - self.variant(NEGSEL_A::PC15) + pub fn pc15(self) -> &'a mut crate::W { + self.variant(Negsel::Pc15) } #[doc = "Port D, Pin0"] #[inline(always)] - pub fn pd0(self) -> &'a mut W { - self.variant(NEGSEL_A::PD0) + pub fn pd0(self) -> &'a mut crate::W { + self.variant(Negsel::Pd0) } #[doc = "Port D, Pin1"] #[inline(always)] - pub fn pd1(self) -> &'a mut W { - self.variant(NEGSEL_A::PD1) + pub fn pd1(self) -> &'a mut crate::W { + self.variant(Negsel::Pd1) } #[doc = "Port D, Pin2"] #[inline(always)] - pub fn pd2(self) -> &'a mut W { - self.variant(NEGSEL_A::PD2) + pub fn pd2(self) -> &'a mut crate::W { + self.variant(Negsel::Pd2) } #[doc = "Port D, Pin3"] #[inline(always)] - pub fn pd3(self) -> &'a mut W { - self.variant(NEGSEL_A::PD3) + pub fn pd3(self) -> &'a mut crate::W { + self.variant(Negsel::Pd3) } #[doc = "Port D, Pin4"] #[inline(always)] - pub fn pd4(self) -> &'a mut W { - self.variant(NEGSEL_A::PD4) + pub fn pd4(self) -> &'a mut crate::W { + self.variant(Negsel::Pd4) } #[doc = "Port D, Pin5"] #[inline(always)] - pub fn pd5(self) -> &'a mut W { - self.variant(NEGSEL_A::PD5) + pub fn pd5(self) -> &'a mut crate::W { + self.variant(Negsel::Pd5) } #[doc = "Port D, Pin6"] #[inline(always)] - pub fn pd6(self) -> &'a mut W { - self.variant(NEGSEL_A::PD6) + pub fn pd6(self) -> &'a mut crate::W { + self.variant(Negsel::Pd6) } #[doc = "Port D, Pin7"] #[inline(always)] - pub fn pd7(self) -> &'a mut W { - self.variant(NEGSEL_A::PD7) + pub fn pd7(self) -> &'a mut crate::W { + self.variant(Negsel::Pd7) } #[doc = "Port D, Pin8"] #[inline(always)] - pub fn pd8(self) -> &'a mut W { - self.variant(NEGSEL_A::PD8) + pub fn pd8(self) -> &'a mut crate::W { + self.variant(Negsel::Pd8) } #[doc = "Port D, Pin9"] #[inline(always)] - pub fn pd9(self) -> &'a mut W { - self.variant(NEGSEL_A::PD9) + pub fn pd9(self) -> &'a mut crate::W { + self.variant(Negsel::Pd9) } #[doc = "Port D, Pin10"] #[inline(always)] - pub fn pd10(self) -> &'a mut W { - self.variant(NEGSEL_A::PD10) + pub fn pd10(self) -> &'a mut crate::W { + self.variant(Negsel::Pd10) } #[doc = "Port D, Pin11"] #[inline(always)] - pub fn pd11(self) -> &'a mut W { - self.variant(NEGSEL_A::PD11) + pub fn pd11(self) -> &'a mut crate::W { + self.variant(Negsel::Pd11) } #[doc = "Port D, Pin12"] #[inline(always)] - pub fn pd12(self) -> &'a mut W { - self.variant(NEGSEL_A::PD12) + pub fn pd12(self) -> &'a mut crate::W { + self.variant(Negsel::Pd12) } #[doc = "Port D, Pin13"] #[inline(always)] - pub fn pd13(self) -> &'a mut W { - self.variant(NEGSEL_A::PD13) + pub fn pd13(self) -> &'a mut crate::W { + self.variant(Negsel::Pd13) } #[doc = "Port D, Pin14"] #[inline(always)] - pub fn pd14(self) -> &'a mut W { - self.variant(NEGSEL_A::PD14) + pub fn pd14(self) -> &'a mut crate::W { + self.variant(Negsel::Pd14) } #[doc = "Port D, Pin15"] #[inline(always)] - pub fn pd15(self) -> &'a mut W { - self.variant(NEGSEL_A::PD15) + pub fn pd15(self) -> &'a mut crate::W { + self.variant(Negsel::Pd15) } } #[doc = "Field `VREFDIV` reader - VREF division"] -pub type VREFDIV_R = crate::FieldReader; +pub type VrefdivR = crate::FieldReader; #[doc = "Field `VREFDIV` writer - VREF division"] -pub type VREFDIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, INPUTCTRL_SPEC, u8, u8, 6, O>; -#[doc = "Field `CSRESSEL` reader - Capacitive Sense Mode Internal Resistor"] -pub type CSRESSEL_R = crate::FieldReader; +pub type VrefdivW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Capacitive Sense Mode Internal Resistor\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CSRESSEL_A { +pub enum Csressel { #[doc = "0: Internal capacitive sense resistor value 0"] - RES0 = 0, + Res0 = 0, #[doc = "1: Internal capacitive sense resistor value 1"] - RES1 = 1, + Res1 = 1, #[doc = "2: Internal capacitive sense resistor value 2"] - RES2 = 2, + Res2 = 2, #[doc = "3: Internal capacitive sense resistor value 3"] - RES3 = 3, + Res3 = 3, #[doc = "4: Internal capacitive sense resistor value 4"] - RES4 = 4, + Res4 = 4, #[doc = "5: Internal capacitive sense resistor value 5"] - RES5 = 5, + Res5 = 5, #[doc = "6: Internal capacitive sense resistor value 6"] - RES6 = 6, + Res6 = 6, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CSRESSEL_A) -> Self { + fn from(variant: Csressel) -> Self { variant as _ } } -impl CSRESSEL_R { +impl crate::FieldSpec for Csressel { + type Ux = u8; +} +impl crate::IsEnum for Csressel {} +#[doc = "Field `CSRESSEL` reader - Capacitive Sense Mode Internal Resistor"] +pub type CsresselR = crate::FieldReader; +impl CsresselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CSRESSEL_A::RES0), - 1 => Some(CSRESSEL_A::RES1), - 2 => Some(CSRESSEL_A::RES2), - 3 => Some(CSRESSEL_A::RES3), - 4 => Some(CSRESSEL_A::RES4), - 5 => Some(CSRESSEL_A::RES5), - 6 => Some(CSRESSEL_A::RES6), + 0 => Some(Csressel::Res0), + 1 => Some(Csressel::Res1), + 2 => Some(Csressel::Res2), + 3 => Some(Csressel::Res3), + 4 => Some(Csressel::Res4), + 5 => Some(Csressel::Res5), + 6 => Some(Csressel::Res6), _ => None, } } - #[doc = "Checks if the value of the field is `RES0`"] + #[doc = "Internal capacitive sense resistor value 0"] #[inline(always)] pub fn is_res0(&self) -> bool { - *self == CSRESSEL_A::RES0 + *self == Csressel::Res0 } - #[doc = "Checks if the value of the field is `RES1`"] + #[doc = "Internal capacitive sense resistor value 1"] #[inline(always)] pub fn is_res1(&self) -> bool { - *self == CSRESSEL_A::RES1 + *self == Csressel::Res1 } - #[doc = "Checks if the value of the field is `RES2`"] + #[doc = "Internal capacitive sense resistor value 2"] #[inline(always)] pub fn is_res2(&self) -> bool { - *self == CSRESSEL_A::RES2 + *self == Csressel::Res2 } - #[doc = "Checks if the value of the field is `RES3`"] + #[doc = "Internal capacitive sense resistor value 3"] #[inline(always)] pub fn is_res3(&self) -> bool { - *self == CSRESSEL_A::RES3 + *self == Csressel::Res3 } - #[doc = "Checks if the value of the field is `RES4`"] + #[doc = "Internal capacitive sense resistor value 4"] #[inline(always)] pub fn is_res4(&self) -> bool { - *self == CSRESSEL_A::RES4 + *self == Csressel::Res4 } - #[doc = "Checks if the value of the field is `RES5`"] + #[doc = "Internal capacitive sense resistor value 5"] #[inline(always)] pub fn is_res5(&self) -> bool { - *self == CSRESSEL_A::RES5 + *self == Csressel::Res5 } - #[doc = "Checks if the value of the field is `RES6`"] + #[doc = "Internal capacitive sense resistor value 6"] #[inline(always)] pub fn is_res6(&self) -> bool { - *self == CSRESSEL_A::RES6 + *self == Csressel::Res6 } } #[doc = "Field `CSRESSEL` writer - Capacitive Sense Mode Internal Resistor"] -pub type CSRESSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, INPUTCTRL_SPEC, u8, CSRESSEL_A, 3, O>; -impl<'a, const O: u8> CSRESSEL_W<'a, O> { +pub type CsresselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Csressel>; +impl<'a, REG> CsresselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Internal capacitive sense resistor value 0"] #[inline(always)] - pub fn res0(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES0) + pub fn res0(self) -> &'a mut crate::W { + self.variant(Csressel::Res0) } #[doc = "Internal capacitive sense resistor value 1"] #[inline(always)] - pub fn res1(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES1) + pub fn res1(self) -> &'a mut crate::W { + self.variant(Csressel::Res1) } #[doc = "Internal capacitive sense resistor value 2"] #[inline(always)] - pub fn res2(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES2) + pub fn res2(self) -> &'a mut crate::W { + self.variant(Csressel::Res2) } #[doc = "Internal capacitive sense resistor value 3"] #[inline(always)] - pub fn res3(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES3) + pub fn res3(self) -> &'a mut crate::W { + self.variant(Csressel::Res3) } #[doc = "Internal capacitive sense resistor value 4"] #[inline(always)] - pub fn res4(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES4) + pub fn res4(self) -> &'a mut crate::W { + self.variant(Csressel::Res4) } #[doc = "Internal capacitive sense resistor value 5"] #[inline(always)] - pub fn res5(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES5) + pub fn res5(self) -> &'a mut crate::W { + self.variant(Csressel::Res5) } #[doc = "Internal capacitive sense resistor value 6"] #[inline(always)] - pub fn res6(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES6) + pub fn res6(self) -> &'a mut crate::W { + self.variant(Csressel::Res6) } } impl R { #[doc = "Bits 0:7 - Positive Input Select"] #[inline(always)] - pub fn possel(&self) -> POSSEL_R { - POSSEL_R::new((self.bits & 0xff) as u8) + pub fn possel(&self) -> PosselR { + PosselR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Negative Input Select"] #[inline(always)] - pub fn negsel(&self) -> NEGSEL_R { - NEGSEL_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn negsel(&self) -> NegselR { + NegselR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:21 - VREF division"] #[inline(always)] - pub fn vrefdiv(&self) -> VREFDIV_R { - VREFDIV_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn vrefdiv(&self) -> VrefdivR { + VrefdivR::new(((self.bits >> 16) & 0x3f) as u8) } #[doc = "Bits 28:30 - Capacitive Sense Mode Internal Resistor"] #[inline(always)] - pub fn csressel(&self) -> CSRESSEL_R { - CSRESSEL_R::new(((self.bits >> 28) & 7) as u8) + pub fn csressel(&self) -> CsresselR { + CsresselR::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:7 - Positive Input Select"] #[inline(always)] #[must_use] - pub fn possel(&mut self) -> POSSEL_W<0> { - POSSEL_W::new(self) + pub fn possel(&mut self) -> PosselW { + PosselW::new(self, 0) } #[doc = "Bits 8:15 - Negative Input Select"] #[inline(always)] #[must_use] - pub fn negsel(&mut self) -> NEGSEL_W<8> { - NEGSEL_W::new(self) + pub fn negsel(&mut self) -> NegselW { + NegselW::new(self, 8) } #[doc = "Bits 16:21 - VREF division"] #[inline(always)] #[must_use] - pub fn vrefdiv(&mut self) -> VREFDIV_W<16> { - VREFDIV_W::new(self) + pub fn vrefdiv(&mut self) -> VrefdivW { + VrefdivW::new(self, 16) } #[doc = "Bits 28:30 - Capacitive Sense Mode Internal Resistor"] #[inline(always)] #[must_use] - pub fn csressel(&mut self) -> CSRESSEL_W<28> { - CSRESSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn csressel(&mut self) -> CsresselW { + CsresselW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [inputctrl](index.html) module"] -pub struct INPUTCTRL_SPEC; -impl crate::RegisterSpec for INPUTCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`inputctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inputctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct InputctrlSpec; +impl crate::RegisterSpec for InputctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [inputctrl::R](R) reader structure"] -impl crate::Readable for INPUTCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [inputctrl::W](W) writer structure"] -impl crate::Writable for INPUTCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`inputctrl::R`](R) reader structure"] +impl crate::Readable for InputctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`inputctrl::W`](W) writer structure"] +impl crate::Writable for InputctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets INPUTCTRL to value 0"] -impl crate::Resettable for INPUTCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for InputctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/ipversion.rs index 85cb381..0068345 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/status.rs index 742088c..7088050 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/status.rs @@ -1,58 +1,43 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ACMPOUT` reader - Analog Comparator Output"] -pub type ACMPOUT_R = crate::BitReader; +pub type AcmpoutR = crate::BitReader; #[doc = "Field `ACMPRDY` reader - Analog Comparator Ready"] -pub type ACMPRDY_R = crate::BitReader; +pub type AcmprdyR = crate::BitReader; #[doc = "Field `INPUTCONFLICT` reader - INPUT conflict"] -pub type INPUTCONFLICT_R = crate::BitReader; +pub type InputconflictR = crate::BitReader; #[doc = "Field `PORTALLOCERR` reader - Port allocation error"] -pub type PORTALLOCERR_R = crate::BitReader; +pub type PortallocerrR = crate::BitReader; impl R { #[doc = "Bit 0 - Analog Comparator Output"] #[inline(always)] - pub fn acmpout(&self) -> ACMPOUT_R { - ACMPOUT_R::new((self.bits & 1) != 0) + pub fn acmpout(&self) -> AcmpoutR { + AcmpoutR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - Analog Comparator Ready"] #[inline(always)] - pub fn acmprdy(&self) -> ACMPRDY_R { - ACMPRDY_R::new(((self.bits >> 2) & 1) != 0) + pub fn acmprdy(&self) -> AcmprdyR { + AcmprdyR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - INPUT conflict"] #[inline(always)] - pub fn inputconflict(&self) -> INPUTCONFLICT_R { - INPUTCONFLICT_R::new(((self.bits >> 3) & 1) != 0) + pub fn inputconflict(&self) -> InputconflictR { + InputconflictR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port allocation error"] #[inline(always)] - pub fn portallocerr(&self) -> PORTALLOCERR_R { - PORTALLOCERR_R::new(((self.bits >> 4) & 1) != 0) + pub fn portallocerr(&self) -> PortallocerrR { + PortallocerrR::new(((self.bits >> 4) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/swrst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/swrst.rs index a74aa75..3b73e52 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/swrst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/swrst.rs @@ -1,80 +1,40 @@ #[doc = "Register `SWRST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SWRST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SWRST` writer - Software reset"] -pub type SWRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, SWRST_SPEC, bool, O>; +pub type SwrstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESETTING` reader - Software reset busy status"] -pub type RESETTING_R = crate::BitReader; +pub type ResettingR = crate::BitReader; impl R { #[doc = "Bit 1 - Software reset busy status"] #[inline(always)] - pub fn resetting(&self) -> RESETTING_R { - RESETTING_R::new(((self.bits >> 1) & 1) != 0) + pub fn resetting(&self) -> ResettingR { + ResettingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Software reset"] #[inline(always)] #[must_use] - pub fn swrst(&mut self) -> SWRST_W<0> { - SWRST_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn swrst(&mut self) -> SwrstW { + SwrstW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swrst](index.html) module"] -pub struct SWRST_SPEC; -impl crate::RegisterSpec for SWRST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SwrstSpec; +impl crate::RegisterSpec for SwrstSpec { type Ux = u32; } -#[doc = "`read()` method returns [swrst::R](R) reader structure"] -impl crate::Readable for SWRST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [swrst::W](W) writer structure"] -impl crate::Writable for SWRST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`swrst::R`](R) reader structure"] +impl crate::Readable for SwrstSpec {} +#[doc = "`write(|w| ..)` method takes [`swrst::W`](W) writer structure"] +impl crate::Writable for SwrstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWRST to value 0"] -impl crate::Resettable for SWRST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SwrstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/syncbusy.rs index 5a6bf41..9ff78b9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_ns/syncbusy.rs @@ -1,37 +1,22 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `INPUTCTRL` reader - Syncbusy for INPUTCTRL"] -pub type INPUTCTRL_R = crate::BitReader; +pub type InputctrlR = crate::BitReader; impl R { #[doc = "Bit 0 - Syncbusy for INPUTCTRL"] #[inline(always)] - pub fn inputctrl(&self) -> INPUTCTRL_R { - INPUTCTRL_R::new((self.bits & 1) != 0) + pub fn inputctrl(&self) -> InputctrlR { + InputctrlR::new((self.bits & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s.rs index 65a8f39..39e9c36 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s.rs @@ -1,64 +1,126 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + swrst: Swrst, + cfg: Cfg, + ctrl: Ctrl, + inputctrl: Inputctrl, + status: Status, + if_: If, + ien: Ien, + syncbusy: Syncbusy, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub swrst: SWRST, + #[inline(always)] + pub const fn swrst(&self) -> &Swrst { + &self.swrst + } #[doc = "0x0c - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x10 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x14 - No Description"] - pub inputctrl: INPUTCTRL, + #[inline(always)] + pub const fn inputctrl(&self) -> &Inputctrl { + &self.inputctrl + } #[doc = "0x18 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x1c - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x20 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x24 - No Description"] - pub syncbusy: SYNCBUSY, + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "SWRST (rw) register accessor: an alias for `Reg`"] -pub type SWRST = crate::Reg; +#[doc = "SWRST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swrst`] +module"] +#[doc(alias = "SWRST")] +pub type Swrst = crate::Reg; #[doc = "No Description"] pub mod swrst; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "INPUTCTRL (rw) register accessor: an alias for `Reg`"] -pub type INPUTCTRL = crate::Reg; +#[doc = "INPUTCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`inputctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inputctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inputctrl`] +module"] +#[doc(alias = "INPUTCTRL")] +pub type Inputctrl = crate::Reg; #[doc = "No Description"] pub mod inputctrl; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "No Description"] pub mod syncbusy; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/cfg.rs index dc7241f..40db7a3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/cfg.rs @@ -1,369 +1,343 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `BIAS` reader - Bias Configuration"] -pub type BIAS_R = crate::FieldReader; +pub type BiasR = crate::FieldReader; #[doc = "Field `BIAS` writer - Bias Configuration"] -pub type BIAS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, u8, 3, O>; -#[doc = "Field `HYST` reader - Hysteresis mode"] -pub type HYST_R = crate::FieldReader; +pub type BiasW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Hysteresis mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HYST_A { +pub enum Hyst { #[doc = "0: Hysteresis disabled"] - DISABLED = 0, + Disabled = 0, #[doc = "1: 10mV symmetrical hysteresis"] - SYM10MV = 1, + Sym10mv = 1, #[doc = "2: 20mV symmetrical hysteresis"] - SYM20MV = 2, + Sym20mv = 2, #[doc = "3: 30mV symmetrical hysteresis"] - SYM30MV = 3, + Sym30mv = 3, #[doc = "4: 10mV hysteresis on positive edge transitions"] - POS10MV = 4, + Pos10mv = 4, #[doc = "5: 20mV hysteresis on positive edge transitions"] - POS20MV = 5, + Pos20mv = 5, #[doc = "6: 30mV hysteresis on positive edge transitions"] - POS30MV = 6, + Pos30mv = 6, #[doc = "8: 10mV hysteresis on negative edge transitions"] - NEG10MV = 8, + Neg10mv = 8, #[doc = "9: 20mV hysteresis on negative edge transitions"] - NEG20MV = 9, + Neg20mv = 9, #[doc = "10: 30mV hysteresis on negative edge transitions"] - NEG30MV = 10, + Neg30mv = 10, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HYST_A) -> Self { + fn from(variant: Hyst) -> Self { variant as _ } } -impl HYST_R { +impl crate::FieldSpec for Hyst { + type Ux = u8; +} +impl crate::IsEnum for Hyst {} +#[doc = "Field `HYST` reader - Hysteresis mode"] +pub type HystR = crate::FieldReader; +impl HystR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HYST_A::DISABLED), - 1 => Some(HYST_A::SYM10MV), - 2 => Some(HYST_A::SYM20MV), - 3 => Some(HYST_A::SYM30MV), - 4 => Some(HYST_A::POS10MV), - 5 => Some(HYST_A::POS20MV), - 6 => Some(HYST_A::POS30MV), - 8 => Some(HYST_A::NEG10MV), - 9 => Some(HYST_A::NEG20MV), - 10 => Some(HYST_A::NEG30MV), + 0 => Some(Hyst::Disabled), + 1 => Some(Hyst::Sym10mv), + 2 => Some(Hyst::Sym20mv), + 3 => Some(Hyst::Sym30mv), + 4 => Some(Hyst::Pos10mv), + 5 => Some(Hyst::Pos20mv), + 6 => Some(Hyst::Pos30mv), + 8 => Some(Hyst::Neg10mv), + 9 => Some(Hyst::Neg20mv), + 10 => Some(Hyst::Neg30mv), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Hysteresis disabled"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == HYST_A::DISABLED + *self == Hyst::Disabled } - #[doc = "Checks if the value of the field is `SYM10MV`"] + #[doc = "10mV symmetrical hysteresis"] #[inline(always)] pub fn is_sym10mv(&self) -> bool { - *self == HYST_A::SYM10MV + *self == Hyst::Sym10mv } - #[doc = "Checks if the value of the field is `SYM20MV`"] + #[doc = "20mV symmetrical hysteresis"] #[inline(always)] pub fn is_sym20mv(&self) -> bool { - *self == HYST_A::SYM20MV + *self == Hyst::Sym20mv } - #[doc = "Checks if the value of the field is `SYM30MV`"] + #[doc = "30mV symmetrical hysteresis"] #[inline(always)] pub fn is_sym30mv(&self) -> bool { - *self == HYST_A::SYM30MV + *self == Hyst::Sym30mv } - #[doc = "Checks if the value of the field is `POS10MV`"] + #[doc = "10mV hysteresis on positive edge transitions"] #[inline(always)] pub fn is_pos10mv(&self) -> bool { - *self == HYST_A::POS10MV + *self == Hyst::Pos10mv } - #[doc = "Checks if the value of the field is `POS20MV`"] + #[doc = "20mV hysteresis on positive edge transitions"] #[inline(always)] pub fn is_pos20mv(&self) -> bool { - *self == HYST_A::POS20MV + *self == Hyst::Pos20mv } - #[doc = "Checks if the value of the field is `POS30MV`"] + #[doc = "30mV hysteresis on positive edge transitions"] #[inline(always)] pub fn is_pos30mv(&self) -> bool { - *self == HYST_A::POS30MV + *self == Hyst::Pos30mv } - #[doc = "Checks if the value of the field is `NEG10MV`"] + #[doc = "10mV hysteresis on negative edge transitions"] #[inline(always)] pub fn is_neg10mv(&self) -> bool { - *self == HYST_A::NEG10MV + *self == Hyst::Neg10mv } - #[doc = "Checks if the value of the field is `NEG20MV`"] + #[doc = "20mV hysteresis on negative edge transitions"] #[inline(always)] pub fn is_neg20mv(&self) -> bool { - *self == HYST_A::NEG20MV + *self == Hyst::Neg20mv } - #[doc = "Checks if the value of the field is `NEG30MV`"] + #[doc = "30mV hysteresis on negative edge transitions"] #[inline(always)] pub fn is_neg30mv(&self) -> bool { - *self == HYST_A::NEG30MV + *self == Hyst::Neg30mv } } #[doc = "Field `HYST` writer - Hysteresis mode"] -pub type HYST_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, HYST_A, 4, O>; -impl<'a, const O: u8> HYST_W<'a, O> { +pub type HystW<'a, REG> = crate::FieldWriter<'a, REG, 4, Hyst>; +impl<'a, REG> HystW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Hysteresis disabled"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(HYST_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Hyst::Disabled) } #[doc = "10mV symmetrical hysteresis"] #[inline(always)] - pub fn sym10mv(self) -> &'a mut W { - self.variant(HYST_A::SYM10MV) + pub fn sym10mv(self) -> &'a mut crate::W { + self.variant(Hyst::Sym10mv) } #[doc = "20mV symmetrical hysteresis"] #[inline(always)] - pub fn sym20mv(self) -> &'a mut W { - self.variant(HYST_A::SYM20MV) + pub fn sym20mv(self) -> &'a mut crate::W { + self.variant(Hyst::Sym20mv) } #[doc = "30mV symmetrical hysteresis"] #[inline(always)] - pub fn sym30mv(self) -> &'a mut W { - self.variant(HYST_A::SYM30MV) + pub fn sym30mv(self) -> &'a mut crate::W { + self.variant(Hyst::Sym30mv) } #[doc = "10mV hysteresis on positive edge transitions"] #[inline(always)] - pub fn pos10mv(self) -> &'a mut W { - self.variant(HYST_A::POS10MV) + pub fn pos10mv(self) -> &'a mut crate::W { + self.variant(Hyst::Pos10mv) } #[doc = "20mV hysteresis on positive edge transitions"] #[inline(always)] - pub fn pos20mv(self) -> &'a mut W { - self.variant(HYST_A::POS20MV) + pub fn pos20mv(self) -> &'a mut crate::W { + self.variant(Hyst::Pos20mv) } #[doc = "30mV hysteresis on positive edge transitions"] #[inline(always)] - pub fn pos30mv(self) -> &'a mut W { - self.variant(HYST_A::POS30MV) + pub fn pos30mv(self) -> &'a mut crate::W { + self.variant(Hyst::Pos30mv) } #[doc = "10mV hysteresis on negative edge transitions"] #[inline(always)] - pub fn neg10mv(self) -> &'a mut W { - self.variant(HYST_A::NEG10MV) + pub fn neg10mv(self) -> &'a mut crate::W { + self.variant(Hyst::Neg10mv) } #[doc = "20mV hysteresis on negative edge transitions"] #[inline(always)] - pub fn neg20mv(self) -> &'a mut W { - self.variant(HYST_A::NEG20MV) + pub fn neg20mv(self) -> &'a mut crate::W { + self.variant(Hyst::Neg20mv) } #[doc = "30mV hysteresis on negative edge transitions"] #[inline(always)] - pub fn neg30mv(self) -> &'a mut W { - self.variant(HYST_A::NEG30MV) + pub fn neg30mv(self) -> &'a mut crate::W { + self.variant(Hyst::Neg30mv) } } -#[doc = "Field `INPUTRANGE` reader - Input Range"] -pub type INPUTRANGE_R = crate::BitReader; #[doc = "Input Range\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum INPUTRANGE_A { +pub enum Inputrange { #[doc = "0: Use this setting when the input to the comparator core can be from 0 to AVDD."] - FULL = 0, + Full = 0, #[doc = "1: It is recommended to use this setting when the input to the comparator core will always be less than AVDD-0.7V."] - REDUCED = 1, + Reduced = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: INPUTRANGE_A) -> Self { + fn from(variant: Inputrange) -> Self { variant as u8 != 0 } } -impl INPUTRANGE_R { +#[doc = "Field `INPUTRANGE` reader - Input Range"] +pub type InputrangeR = crate::BitReader; +impl InputrangeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INPUTRANGE_A { + pub const fn variant(&self) -> Inputrange { match self.bits { - false => INPUTRANGE_A::FULL, - true => INPUTRANGE_A::REDUCED, + false => Inputrange::Full, + true => Inputrange::Reduced, } } - #[doc = "Checks if the value of the field is `FULL`"] + #[doc = "Use this setting when the input to the comparator core can be from 0 to AVDD."] #[inline(always)] pub fn is_full(&self) -> bool { - *self == INPUTRANGE_A::FULL + *self == Inputrange::Full } - #[doc = "Checks if the value of the field is `REDUCED`"] + #[doc = "It is recommended to use this setting when the input to the comparator core will always be less than AVDD-0.7V."] #[inline(always)] pub fn is_reduced(&self) -> bool { - *self == INPUTRANGE_A::REDUCED + *self == Inputrange::Reduced } } #[doc = "Field `INPUTRANGE` writer - Input Range"] -pub type INPUTRANGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, INPUTRANGE_A, O>; -impl<'a, const O: u8> INPUTRANGE_W<'a, O> { +pub type InputrangeW<'a, REG> = crate::BitWriter<'a, REG, Inputrange>; +impl<'a, REG> InputrangeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use this setting when the input to the comparator core can be from 0 to AVDD."] #[inline(always)] - pub fn full(self) -> &'a mut W { - self.variant(INPUTRANGE_A::FULL) + pub fn full(self) -> &'a mut crate::W { + self.variant(Inputrange::Full) } #[doc = "It is recommended to use this setting when the input to the comparator core will always be less than AVDD-0.7V."] #[inline(always)] - pub fn reduced(self) -> &'a mut W { - self.variant(INPUTRANGE_A::REDUCED) + pub fn reduced(self) -> &'a mut crate::W { + self.variant(Inputrange::Reduced) } } -#[doc = "Field `ACCURACY` reader - ACMP accuracy mode"] -pub type ACCURACY_R = crate::BitReader; #[doc = "ACMP accuracy mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ACCURACY_A { +pub enum Accuracy { #[doc = "0: ACMP operates in low-accuracy mode but consumes less current."] - LOW = 0, + Low = 0, #[doc = "1: ACMP operates in high-accuracy mode but consumes more current."] - HIGH = 1, + High = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ACCURACY_A) -> Self { + fn from(variant: Accuracy) -> Self { variant as u8 != 0 } } -impl ACCURACY_R { +#[doc = "Field `ACCURACY` reader - ACMP accuracy mode"] +pub type AccuracyR = crate::BitReader; +impl AccuracyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ACCURACY_A { + pub const fn variant(&self) -> Accuracy { match self.bits { - false => ACCURACY_A::LOW, - true => ACCURACY_A::HIGH, + false => Accuracy::Low, + true => Accuracy::High, } } - #[doc = "Checks if the value of the field is `LOW`"] + #[doc = "ACMP operates in low-accuracy mode but consumes less current."] #[inline(always)] pub fn is_low(&self) -> bool { - *self == ACCURACY_A::LOW + *self == Accuracy::Low } - #[doc = "Checks if the value of the field is `HIGH`"] + #[doc = "ACMP operates in high-accuracy mode but consumes more current."] #[inline(always)] pub fn is_high(&self) -> bool { - *self == ACCURACY_A::HIGH + *self == Accuracy::High } } #[doc = "Field `ACCURACY` writer - ACMP accuracy mode"] -pub type ACCURACY_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, ACCURACY_A, O>; -impl<'a, const O: u8> ACCURACY_W<'a, O> { +pub type AccuracyW<'a, REG> = crate::BitWriter<'a, REG, Accuracy>; +impl<'a, REG> AccuracyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "ACMP operates in low-accuracy mode but consumes less current."] #[inline(always)] - pub fn low(self) -> &'a mut W { - self.variant(ACCURACY_A::LOW) + pub fn low(self) -> &'a mut crate::W { + self.variant(Accuracy::Low) } #[doc = "ACMP operates in high-accuracy mode but consumes more current."] #[inline(always)] - pub fn high(self) -> &'a mut W { - self.variant(ACCURACY_A::HIGH) + pub fn high(self) -> &'a mut crate::W { + self.variant(Accuracy::High) } } impl R { #[doc = "Bits 0:2 - Bias Configuration"] #[inline(always)] - pub fn bias(&self) -> BIAS_R { - BIAS_R::new((self.bits & 7) as u8) + pub fn bias(&self) -> BiasR { + BiasR::new((self.bits & 7) as u8) } #[doc = "Bits 8:11 - Hysteresis mode"] #[inline(always)] - pub fn hyst(&self) -> HYST_R { - HYST_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn hyst(&self) -> HystR { + HystR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bit 16 - Input Range"] #[inline(always)] - pub fn inputrange(&self) -> INPUTRANGE_R { - INPUTRANGE_R::new(((self.bits >> 16) & 1) != 0) + pub fn inputrange(&self) -> InputrangeR { + InputrangeR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - ACMP accuracy mode"] #[inline(always)] - pub fn accuracy(&self) -> ACCURACY_R { - ACCURACY_R::new(((self.bits >> 17) & 1) != 0) + pub fn accuracy(&self) -> AccuracyR { + AccuracyR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Bias Configuration"] #[inline(always)] #[must_use] - pub fn bias(&mut self) -> BIAS_W<0> { - BIAS_W::new(self) + pub fn bias(&mut self) -> BiasW { + BiasW::new(self, 0) } #[doc = "Bits 8:11 - Hysteresis mode"] #[inline(always)] #[must_use] - pub fn hyst(&mut self) -> HYST_W<8> { - HYST_W::new(self) + pub fn hyst(&mut self) -> HystW { + HystW::new(self, 8) } #[doc = "Bit 16 - Input Range"] #[inline(always)] #[must_use] - pub fn inputrange(&mut self) -> INPUTRANGE_W<16> { - INPUTRANGE_W::new(self) + pub fn inputrange(&mut self) -> InputrangeW { + InputrangeW::new(self, 16) } #[doc = "Bit 17 - ACMP accuracy mode"] #[inline(always)] #[must_use] - pub fn accuracy(&mut self) -> ACCURACY_W<17> { - ACCURACY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn accuracy(&mut self) -> AccuracyW { + AccuracyW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0x04"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x04; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0x04; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/ctrl.rs index a69e6f8..e096f46 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/ctrl.rs @@ -1,187 +1,153 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `NOTRDYVAL` reader - Not Ready Value"] -pub type NOTRDYVAL_R = crate::BitReader; +pub type W = crate::W; #[doc = "Not Ready Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum NOTRDYVAL_A { +pub enum Notrdyval { #[doc = "0: ACMP output is 0 when the ACMP is not ready."] - LOW = 0, + Low = 0, #[doc = "1: ACMP output is 1 when the ACMP is not ready."] - HIGH = 1, + High = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: NOTRDYVAL_A) -> Self { + fn from(variant: Notrdyval) -> Self { variant as u8 != 0 } } -impl NOTRDYVAL_R { +#[doc = "Field `NOTRDYVAL` reader - Not Ready Value"] +pub type NotrdyvalR = crate::BitReader; +impl NotrdyvalR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> NOTRDYVAL_A { + pub const fn variant(&self) -> Notrdyval { match self.bits { - false => NOTRDYVAL_A::LOW, - true => NOTRDYVAL_A::HIGH, + false => Notrdyval::Low, + true => Notrdyval::High, } } - #[doc = "Checks if the value of the field is `LOW`"] + #[doc = "ACMP output is 0 when the ACMP is not ready."] #[inline(always)] pub fn is_low(&self) -> bool { - *self == NOTRDYVAL_A::LOW + *self == Notrdyval::Low } - #[doc = "Checks if the value of the field is `HIGH`"] + #[doc = "ACMP output is 1 when the ACMP is not ready."] #[inline(always)] pub fn is_high(&self) -> bool { - *self == NOTRDYVAL_A::HIGH + *self == Notrdyval::High } } #[doc = "Field `NOTRDYVAL` writer - Not Ready Value"] -pub type NOTRDYVAL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, NOTRDYVAL_A, O>; -impl<'a, const O: u8> NOTRDYVAL_W<'a, O> { +pub type NotrdyvalW<'a, REG> = crate::BitWriter<'a, REG, Notrdyval>; +impl<'a, REG> NotrdyvalW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "ACMP output is 0 when the ACMP is not ready."] #[inline(always)] - pub fn low(self) -> &'a mut W { - self.variant(NOTRDYVAL_A::LOW) + pub fn low(self) -> &'a mut crate::W { + self.variant(Notrdyval::Low) } #[doc = "ACMP output is 1 when the ACMP is not ready."] #[inline(always)] - pub fn high(self) -> &'a mut W { - self.variant(NOTRDYVAL_A::HIGH) + pub fn high(self) -> &'a mut crate::W { + self.variant(Notrdyval::High) } } -#[doc = "Field `GPIOINV` reader - Comparator GPIO Output Invert"] -pub type GPIOINV_R = crate::BitReader; #[doc = "Comparator GPIO Output Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GPIOINV_A { +pub enum Gpioinv { #[doc = "0: The comparator output to GPIO is not inverted"] - NOTINV = 0, + Notinv = 0, #[doc = "1: The comparator output to GPIO is inverted"] - INV = 1, + Inv = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GPIOINV_A) -> Self { + fn from(variant: Gpioinv) -> Self { variant as u8 != 0 } } -impl GPIOINV_R { +#[doc = "Field `GPIOINV` reader - Comparator GPIO Output Invert"] +pub type GpioinvR = crate::BitReader; +impl GpioinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> GPIOINV_A { + pub const fn variant(&self) -> Gpioinv { match self.bits { - false => GPIOINV_A::NOTINV, - true => GPIOINV_A::INV, + false => Gpioinv::Notinv, + true => Gpioinv::Inv, } } - #[doc = "Checks if the value of the field is `NOTINV`"] + #[doc = "The comparator output to GPIO is not inverted"] #[inline(always)] pub fn is_notinv(&self) -> bool { - *self == GPIOINV_A::NOTINV + *self == Gpioinv::Notinv } - #[doc = "Checks if the value of the field is `INV`"] + #[doc = "The comparator output to GPIO is inverted"] #[inline(always)] pub fn is_inv(&self) -> bool { - *self == GPIOINV_A::INV + *self == Gpioinv::Inv } } #[doc = "Field `GPIOINV` writer - Comparator GPIO Output Invert"] -pub type GPIOINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, GPIOINV_A, O>; -impl<'a, const O: u8> GPIOINV_W<'a, O> { +pub type GpioinvW<'a, REG> = crate::BitWriter<'a, REG, Gpioinv>; +impl<'a, REG> GpioinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The comparator output to GPIO is not inverted"] #[inline(always)] - pub fn notinv(self) -> &'a mut W { - self.variant(GPIOINV_A::NOTINV) + pub fn notinv(self) -> &'a mut crate::W { + self.variant(Gpioinv::Notinv) } #[doc = "The comparator output to GPIO is inverted"] #[inline(always)] - pub fn inv(self) -> &'a mut W { - self.variant(GPIOINV_A::INV) + pub fn inv(self) -> &'a mut crate::W { + self.variant(Gpioinv::Inv) } } impl R { #[doc = "Bit 0 - Not Ready Value"] #[inline(always)] - pub fn notrdyval(&self) -> NOTRDYVAL_R { - NOTRDYVAL_R::new((self.bits & 1) != 0) + pub fn notrdyval(&self) -> NotrdyvalR { + NotrdyvalR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Comparator GPIO Output Invert"] #[inline(always)] - pub fn gpioinv(&self) -> GPIOINV_R { - GPIOINV_R::new(((self.bits >> 1) & 1) != 0) + pub fn gpioinv(&self) -> GpioinvR { + GpioinvR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Not Ready Value"] #[inline(always)] #[must_use] - pub fn notrdyval(&mut self) -> NOTRDYVAL_W<0> { - NOTRDYVAL_W::new(self) + pub fn notrdyval(&mut self) -> NotrdyvalW { + NotrdyvalW::new(self, 0) } #[doc = "Bit 1 - Comparator GPIO Output Invert"] #[inline(always)] #[must_use] - pub fn gpioinv(&mut self) -> GPIOINV_W<1> { - GPIOINV_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn gpioinv(&mut self) -> GpioinvW { + GpioinvW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/en.rs index f15bf65..7298843 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Module enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Module enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Module enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Module enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/ien.rs index 23882fa..27a6bdf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/ien.rs @@ -1,140 +1,100 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RISE` reader - Rising edge interrupt enable"] -pub type RISE_R = crate::BitReader; +pub type RiseR = crate::BitReader; #[doc = "Field `RISE` writer - Rising edge interrupt enable"] -pub type RISE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RiseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FALL` reader - Falling edge interrupt enable"] -pub type FALL_R = crate::BitReader; +pub type FallR = crate::BitReader; #[doc = "Field `FALL` writer - Falling edge interrupt enable"] -pub type FALL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FallW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMPRDY` reader - ACMP ready interrupt enable"] -pub type ACMPRDY_R = crate::BitReader; +pub type AcmprdyR = crate::BitReader; #[doc = "Field `ACMPRDY` writer - ACMP ready interrupt enable"] -pub type ACMPRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AcmprdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INPUTCONFLICT` reader - Input conflict interrupt enable"] -pub type INPUTCONFLICT_R = crate::BitReader; +pub type InputconflictR = crate::BitReader; #[doc = "Field `INPUTCONFLICT` writer - Input conflict interrupt enable"] -pub type INPUTCONFLICT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type InputconflictW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PORTALLOCERR` reader - Port allocation error interrupt enable"] -pub type PORTALLOCERR_R = crate::BitReader; +pub type PortallocerrR = crate::BitReader; #[doc = "Field `PORTALLOCERR` writer - Port allocation error interrupt enable"] -pub type PORTALLOCERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PortallocerrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Rising edge interrupt enable"] #[inline(always)] - pub fn rise(&self) -> RISE_R { - RISE_R::new((self.bits & 1) != 0) + pub fn rise(&self) -> RiseR { + RiseR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Falling edge interrupt enable"] #[inline(always)] - pub fn fall(&self) -> FALL_R { - FALL_R::new(((self.bits >> 1) & 1) != 0) + pub fn fall(&self) -> FallR { + FallR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - ACMP ready interrupt enable"] #[inline(always)] - pub fn acmprdy(&self) -> ACMPRDY_R { - ACMPRDY_R::new(((self.bits >> 2) & 1) != 0) + pub fn acmprdy(&self) -> AcmprdyR { + AcmprdyR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Input conflict interrupt enable"] #[inline(always)] - pub fn inputconflict(&self) -> INPUTCONFLICT_R { - INPUTCONFLICT_R::new(((self.bits >> 3) & 1) != 0) + pub fn inputconflict(&self) -> InputconflictR { + InputconflictR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port allocation error interrupt enable"] #[inline(always)] - pub fn portallocerr(&self) -> PORTALLOCERR_R { - PORTALLOCERR_R::new(((self.bits >> 4) & 1) != 0) + pub fn portallocerr(&self) -> PortallocerrR { + PortallocerrR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - Rising edge interrupt enable"] #[inline(always)] #[must_use] - pub fn rise(&mut self) -> RISE_W<0> { - RISE_W::new(self) + pub fn rise(&mut self) -> RiseW { + RiseW::new(self, 0) } #[doc = "Bit 1 - Falling edge interrupt enable"] #[inline(always)] #[must_use] - pub fn fall(&mut self) -> FALL_W<1> { - FALL_W::new(self) + pub fn fall(&mut self) -> FallW { + FallW::new(self, 1) } #[doc = "Bit 2 - ACMP ready interrupt enable"] #[inline(always)] #[must_use] - pub fn acmprdy(&mut self) -> ACMPRDY_W<2> { - ACMPRDY_W::new(self) + pub fn acmprdy(&mut self) -> AcmprdyW { + AcmprdyW::new(self, 2) } #[doc = "Bit 3 - Input conflict interrupt enable"] #[inline(always)] #[must_use] - pub fn inputconflict(&mut self) -> INPUTCONFLICT_W<3> { - INPUTCONFLICT_W::new(self) + pub fn inputconflict(&mut self) -> InputconflictW { + InputconflictW::new(self, 3) } #[doc = "Bit 4 - Port allocation error interrupt enable"] #[inline(always)] #[must_use] - pub fn portallocerr(&mut self) -> PORTALLOCERR_W<4> { - PORTALLOCERR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn portallocerr(&mut self) -> PortallocerrW { + PortallocerrW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/if_.rs index 0133f4a..c3b5907 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/if_.rs @@ -1,140 +1,100 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RISE` reader - Rising Edge Triggered Interrupt Flag"] -pub type RISE_R = crate::BitReader; +pub type RiseR = crate::BitReader; #[doc = "Field `RISE` writer - Rising Edge Triggered Interrupt Flag"] -pub type RISE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RiseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FALL` reader - Falling Edge Triggered Interrupt Flag"] -pub type FALL_R = crate::BitReader; +pub type FallR = crate::BitReader; #[doc = "Field `FALL` writer - Falling Edge Triggered Interrupt Flag"] -pub type FALL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FallW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMPRDY` reader - ACMP ready Interrupt flag"] -pub type ACMPRDY_R = crate::BitReader; +pub type AcmprdyR = crate::BitReader; #[doc = "Field `ACMPRDY` writer - ACMP ready Interrupt flag"] -pub type ACMPRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AcmprdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INPUTCONFLICT` reader - Input conflict"] -pub type INPUTCONFLICT_R = crate::BitReader; +pub type InputconflictR = crate::BitReader; #[doc = "Field `INPUTCONFLICT` writer - Input conflict"] -pub type INPUTCONFLICT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type InputconflictW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PORTALLOCERR` reader - Port allocation error"] -pub type PORTALLOCERR_R = crate::BitReader; +pub type PortallocerrR = crate::BitReader; #[doc = "Field `PORTALLOCERR` writer - Port allocation error"] -pub type PORTALLOCERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PortallocerrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Rising Edge Triggered Interrupt Flag"] #[inline(always)] - pub fn rise(&self) -> RISE_R { - RISE_R::new((self.bits & 1) != 0) + pub fn rise(&self) -> RiseR { + RiseR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Falling Edge Triggered Interrupt Flag"] #[inline(always)] - pub fn fall(&self) -> FALL_R { - FALL_R::new(((self.bits >> 1) & 1) != 0) + pub fn fall(&self) -> FallR { + FallR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - ACMP ready Interrupt flag"] #[inline(always)] - pub fn acmprdy(&self) -> ACMPRDY_R { - ACMPRDY_R::new(((self.bits >> 2) & 1) != 0) + pub fn acmprdy(&self) -> AcmprdyR { + AcmprdyR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Input conflict"] #[inline(always)] - pub fn inputconflict(&self) -> INPUTCONFLICT_R { - INPUTCONFLICT_R::new(((self.bits >> 3) & 1) != 0) + pub fn inputconflict(&self) -> InputconflictR { + InputconflictR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port allocation error"] #[inline(always)] - pub fn portallocerr(&self) -> PORTALLOCERR_R { - PORTALLOCERR_R::new(((self.bits >> 4) & 1) != 0) + pub fn portallocerr(&self) -> PortallocerrR { + PortallocerrR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - Rising Edge Triggered Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rise(&mut self) -> RISE_W<0> { - RISE_W::new(self) + pub fn rise(&mut self) -> RiseW { + RiseW::new(self, 0) } #[doc = "Bit 1 - Falling Edge Triggered Interrupt Flag"] #[inline(always)] #[must_use] - pub fn fall(&mut self) -> FALL_W<1> { - FALL_W::new(self) + pub fn fall(&mut self) -> FallW { + FallW::new(self, 1) } #[doc = "Bit 2 - ACMP ready Interrupt flag"] #[inline(always)] #[must_use] - pub fn acmprdy(&mut self) -> ACMPRDY_W<2> { - ACMPRDY_W::new(self) + pub fn acmprdy(&mut self) -> AcmprdyW { + AcmprdyW::new(self, 2) } #[doc = "Bit 3 - Input conflict"] #[inline(always)] #[must_use] - pub fn inputconflict(&mut self) -> INPUTCONFLICT_W<3> { - INPUTCONFLICT_W::new(self) + pub fn inputconflict(&mut self) -> InputconflictW { + InputconflictW::new(self, 3) } #[doc = "Bit 4 - Port allocation error"] #[inline(always)] #[must_use] - pub fn portallocerr(&mut self) -> PORTALLOCERR_W<4> { - PORTALLOCERR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn portallocerr(&mut self) -> PortallocerrW { + PortallocerrW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/inputctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/inputctrl.rs index 5a67c46..524a2ae 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/inputctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/inputctrl.rs @@ -1,2352 +1,2333 @@ #[doc = "Register `INPUTCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `INPUTCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `POSSEL` reader - Positive Input Select"] -pub type POSSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Positive Input Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum POSSEL_A { +pub enum Possel { #[doc = "0: VSS"] - VSS = 0, + Vss = 0, #[doc = "16: Divided AVDD"] - VREFDIVAVDD = 16, + Vrefdivavdd = 16, #[doc = "17: Low-Power Divided AVDD"] - VREFDIVAVDDLP = 17, + Vrefdivavddlp = 17, #[doc = "18: Divided 1V25 reference"] - VREFDIV1V25 = 18, + Vrefdiv1v25 = 18, #[doc = "19: Low-power Divided 1V25 reference"] - VREFDIV1V25LP = 19, + Vrefdiv1v25lp = 19, #[doc = "20: Divided 2V5 reference"] - VREFDIV2V5 = 20, + Vrefdiv2v5 = 20, #[doc = "21: Low-power Divided 2V5 reference"] - VREFDIV2V5LP = 21, + Vrefdiv2v5lp = 21, #[doc = "32: VSENSE0 divided by 4"] - VSENSE01DIV4 = 32, + Vsense01div4 = 32, #[doc = "33: Low-power VSENSE0 divided by 4"] - VSENSE01DIV4LP = 33, + Vsense01div4lp = 33, #[doc = "34: VSENSE1 divided by 4"] - VSENSE11DIV4 = 34, + Vsense11div4 = 34, #[doc = "35: Low-power VSENSE1 divided by 4"] - VSENSE11DIV4LP = 35, + Vsense11div4lp = 35, #[doc = "64: VDAC0 channel 0 output"] - VDACOUT0 = 64, + Vdacout0 = 64, #[doc = "65: VDAC0 channel 1 output"] - VDACOUT1 = 65, + Vdacout1 = 65, #[doc = "80: External interface, base is PA0."] - EXTPA = 80, + Extpa = 80, #[doc = "81: External interface, base is PB0."] - EXTPB = 81, + Extpb = 81, #[doc = "82: External interface, base is PC0."] - EXTPC = 82, + Extpc = 82, #[doc = "83: External interface, base is PD0."] - EXTPD = 83, + Extpd = 83, #[doc = "128: Port A, Pin0"] - PA0 = 128, + Pa0 = 128, #[doc = "129: Port A, Pin1"] - PA1 = 129, + Pa1 = 129, #[doc = "130: Port A, Pin2"] - PA2 = 130, + Pa2 = 130, #[doc = "131: Port A, Pin3"] - PA3 = 131, + Pa3 = 131, #[doc = "132: Port A, Pin4"] - PA4 = 132, + Pa4 = 132, #[doc = "133: Port A, Pin5"] - PA5 = 133, + Pa5 = 133, #[doc = "134: Port A, Pin6"] - PA6 = 134, + Pa6 = 134, #[doc = "135: Port A, Pin7"] - PA7 = 135, + Pa7 = 135, #[doc = "136: Port A, Pin8"] - PA8 = 136, + Pa8 = 136, #[doc = "137: Port A, Pin9"] - PA9 = 137, + Pa9 = 137, #[doc = "138: Port A, Pin10"] - PA10 = 138, + Pa10 = 138, #[doc = "139: Port A, Pin11"] - PA11 = 139, + Pa11 = 139, #[doc = "140: Port A, Pin12"] - PA12 = 140, + Pa12 = 140, #[doc = "141: Port A, Pin13"] - PA13 = 141, + Pa13 = 141, #[doc = "142: Port A, Pin14"] - PA14 = 142, + Pa14 = 142, #[doc = "143: Port A, Pin15"] - PA15 = 143, + Pa15 = 143, #[doc = "144: Port B, Pin0"] - PB0 = 144, + Pb0 = 144, #[doc = "145: Port B, Pin1"] - PB1 = 145, + Pb1 = 145, #[doc = "146: Port B, Pin2"] - PB2 = 146, + Pb2 = 146, #[doc = "147: Port B, Pin3"] - PB3 = 147, + Pb3 = 147, #[doc = "148: Port B, Pin4"] - PB4 = 148, + Pb4 = 148, #[doc = "149: Port B, Pin5"] - PB5 = 149, + Pb5 = 149, #[doc = "150: Port B, Pin6"] - PB6 = 150, + Pb6 = 150, #[doc = "151: Port B, Pin7"] - PB7 = 151, + Pb7 = 151, #[doc = "152: Port B, Pin8"] - PB8 = 152, + Pb8 = 152, #[doc = "153: Port B, Pin9"] - PB9 = 153, + Pb9 = 153, #[doc = "154: Port B, Pin10"] - PB10 = 154, + Pb10 = 154, #[doc = "155: Port B, Pin11"] - PB11 = 155, + Pb11 = 155, #[doc = "156: Port B, Pin12"] - PB12 = 156, + Pb12 = 156, #[doc = "157: Port B, Pin13"] - PB13 = 157, + Pb13 = 157, #[doc = "158: Port B, Pin14"] - PB14 = 158, + Pb14 = 158, #[doc = "159: Port B, Pin15"] - PB15 = 159, + Pb15 = 159, #[doc = "160: Port C, Pin0"] - PC0 = 160, + Pc0 = 160, #[doc = "161: Port C, Pin1"] - PC1 = 161, + Pc1 = 161, #[doc = "162: Port C, Pin2"] - PC2 = 162, + Pc2 = 162, #[doc = "163: Port C, Pin3"] - PC3 = 163, + Pc3 = 163, #[doc = "164: Port C, Pin4"] - PC4 = 164, + Pc4 = 164, #[doc = "165: Port C, Pin5"] - PC5 = 165, + Pc5 = 165, #[doc = "166: Port C, Pin6"] - PC6 = 166, + Pc6 = 166, #[doc = "167: Port C, Pin7"] - PC7 = 167, + Pc7 = 167, #[doc = "168: Port C, Pin8"] - PC8 = 168, + Pc8 = 168, #[doc = "169: Port C, Pin9"] - PC9 = 169, + Pc9 = 169, #[doc = "170: Port C, Pin10"] - PC10 = 170, + Pc10 = 170, #[doc = "171: Port C, Pin11"] - PC11 = 171, + Pc11 = 171, #[doc = "172: Port C, Pin12"] - PC12 = 172, + Pc12 = 172, #[doc = "173: Port C, Pin13"] - PC13 = 173, + Pc13 = 173, #[doc = "174: Port C, Pin14"] - PC14 = 174, + Pc14 = 174, #[doc = "175: Port C, Pin15"] - PC15 = 175, + Pc15 = 175, #[doc = "176: Port D, Pin0"] - PD0 = 176, + Pd0 = 176, #[doc = "177: Port D, Pin1"] - PD1 = 177, + Pd1 = 177, #[doc = "178: Port D, Pin2"] - PD2 = 178, + Pd2 = 178, #[doc = "179: Port D, Pin3"] - PD3 = 179, + Pd3 = 179, #[doc = "180: Port D, Pin4"] - PD4 = 180, + Pd4 = 180, #[doc = "181: Port D, Pin5"] - PD5 = 181, + Pd5 = 181, #[doc = "182: Port D, Pin6"] - PD6 = 182, + Pd6 = 182, #[doc = "183: Port D, Pin7"] - PD7 = 183, + Pd7 = 183, #[doc = "184: Port D, Pin8"] - PD8 = 184, + Pd8 = 184, #[doc = "185: Port D, Pin9"] - PD9 = 185, + Pd9 = 185, #[doc = "186: Port D, Pin10"] - PD10 = 186, + Pd10 = 186, #[doc = "187: Port D, Pin11"] - PD11 = 187, + Pd11 = 187, #[doc = "188: Port D, Pin12"] - PD12 = 188, + Pd12 = 188, #[doc = "189: Port D, Pin13"] - PD13 = 189, + Pd13 = 189, #[doc = "190: Port D, Pin14"] - PD14 = 190, + Pd14 = 190, #[doc = "191: Port D, Pin15"] - PD15 = 191, + Pd15 = 191, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: POSSEL_A) -> Self { + fn from(variant: Possel) -> Self { variant as _ } } -impl POSSEL_R { +impl crate::FieldSpec for Possel { + type Ux = u8; +} +impl crate::IsEnum for Possel {} +#[doc = "Field `POSSEL` reader - Positive Input Select"] +pub type PosselR = crate::FieldReader; +impl PosselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(POSSEL_A::VSS), - 16 => Some(POSSEL_A::VREFDIVAVDD), - 17 => Some(POSSEL_A::VREFDIVAVDDLP), - 18 => Some(POSSEL_A::VREFDIV1V25), - 19 => Some(POSSEL_A::VREFDIV1V25LP), - 20 => Some(POSSEL_A::VREFDIV2V5), - 21 => Some(POSSEL_A::VREFDIV2V5LP), - 32 => Some(POSSEL_A::VSENSE01DIV4), - 33 => Some(POSSEL_A::VSENSE01DIV4LP), - 34 => Some(POSSEL_A::VSENSE11DIV4), - 35 => Some(POSSEL_A::VSENSE11DIV4LP), - 64 => Some(POSSEL_A::VDACOUT0), - 65 => Some(POSSEL_A::VDACOUT1), - 80 => Some(POSSEL_A::EXTPA), - 81 => Some(POSSEL_A::EXTPB), - 82 => Some(POSSEL_A::EXTPC), - 83 => Some(POSSEL_A::EXTPD), - 128 => Some(POSSEL_A::PA0), - 129 => Some(POSSEL_A::PA1), - 130 => Some(POSSEL_A::PA2), - 131 => Some(POSSEL_A::PA3), - 132 => Some(POSSEL_A::PA4), - 133 => Some(POSSEL_A::PA5), - 134 => Some(POSSEL_A::PA6), - 135 => Some(POSSEL_A::PA7), - 136 => Some(POSSEL_A::PA8), - 137 => Some(POSSEL_A::PA9), - 138 => Some(POSSEL_A::PA10), - 139 => Some(POSSEL_A::PA11), - 140 => Some(POSSEL_A::PA12), - 141 => Some(POSSEL_A::PA13), - 142 => Some(POSSEL_A::PA14), - 143 => Some(POSSEL_A::PA15), - 144 => Some(POSSEL_A::PB0), - 145 => Some(POSSEL_A::PB1), - 146 => Some(POSSEL_A::PB2), - 147 => Some(POSSEL_A::PB3), - 148 => Some(POSSEL_A::PB4), - 149 => Some(POSSEL_A::PB5), - 150 => Some(POSSEL_A::PB6), - 151 => Some(POSSEL_A::PB7), - 152 => Some(POSSEL_A::PB8), - 153 => Some(POSSEL_A::PB9), - 154 => Some(POSSEL_A::PB10), - 155 => Some(POSSEL_A::PB11), - 156 => Some(POSSEL_A::PB12), - 157 => Some(POSSEL_A::PB13), - 158 => Some(POSSEL_A::PB14), - 159 => Some(POSSEL_A::PB15), - 160 => Some(POSSEL_A::PC0), - 161 => Some(POSSEL_A::PC1), - 162 => Some(POSSEL_A::PC2), - 163 => Some(POSSEL_A::PC3), - 164 => Some(POSSEL_A::PC4), - 165 => Some(POSSEL_A::PC5), - 166 => Some(POSSEL_A::PC6), - 167 => Some(POSSEL_A::PC7), - 168 => Some(POSSEL_A::PC8), - 169 => Some(POSSEL_A::PC9), - 170 => Some(POSSEL_A::PC10), - 171 => Some(POSSEL_A::PC11), - 172 => Some(POSSEL_A::PC12), - 173 => Some(POSSEL_A::PC13), - 174 => Some(POSSEL_A::PC14), - 175 => Some(POSSEL_A::PC15), - 176 => Some(POSSEL_A::PD0), - 177 => Some(POSSEL_A::PD1), - 178 => Some(POSSEL_A::PD2), - 179 => Some(POSSEL_A::PD3), - 180 => Some(POSSEL_A::PD4), - 181 => Some(POSSEL_A::PD5), - 182 => Some(POSSEL_A::PD6), - 183 => Some(POSSEL_A::PD7), - 184 => Some(POSSEL_A::PD8), - 185 => Some(POSSEL_A::PD9), - 186 => Some(POSSEL_A::PD10), - 187 => Some(POSSEL_A::PD11), - 188 => Some(POSSEL_A::PD12), - 189 => Some(POSSEL_A::PD13), - 190 => Some(POSSEL_A::PD14), - 191 => Some(POSSEL_A::PD15), + 0 => Some(Possel::Vss), + 16 => Some(Possel::Vrefdivavdd), + 17 => Some(Possel::Vrefdivavddlp), + 18 => Some(Possel::Vrefdiv1v25), + 19 => Some(Possel::Vrefdiv1v25lp), + 20 => Some(Possel::Vrefdiv2v5), + 21 => Some(Possel::Vrefdiv2v5lp), + 32 => Some(Possel::Vsense01div4), + 33 => Some(Possel::Vsense01div4lp), + 34 => Some(Possel::Vsense11div4), + 35 => Some(Possel::Vsense11div4lp), + 64 => Some(Possel::Vdacout0), + 65 => Some(Possel::Vdacout1), + 80 => Some(Possel::Extpa), + 81 => Some(Possel::Extpb), + 82 => Some(Possel::Extpc), + 83 => Some(Possel::Extpd), + 128 => Some(Possel::Pa0), + 129 => Some(Possel::Pa1), + 130 => Some(Possel::Pa2), + 131 => Some(Possel::Pa3), + 132 => Some(Possel::Pa4), + 133 => Some(Possel::Pa5), + 134 => Some(Possel::Pa6), + 135 => Some(Possel::Pa7), + 136 => Some(Possel::Pa8), + 137 => Some(Possel::Pa9), + 138 => Some(Possel::Pa10), + 139 => Some(Possel::Pa11), + 140 => Some(Possel::Pa12), + 141 => Some(Possel::Pa13), + 142 => Some(Possel::Pa14), + 143 => Some(Possel::Pa15), + 144 => Some(Possel::Pb0), + 145 => Some(Possel::Pb1), + 146 => Some(Possel::Pb2), + 147 => Some(Possel::Pb3), + 148 => Some(Possel::Pb4), + 149 => Some(Possel::Pb5), + 150 => Some(Possel::Pb6), + 151 => Some(Possel::Pb7), + 152 => Some(Possel::Pb8), + 153 => Some(Possel::Pb9), + 154 => Some(Possel::Pb10), + 155 => Some(Possel::Pb11), + 156 => Some(Possel::Pb12), + 157 => Some(Possel::Pb13), + 158 => Some(Possel::Pb14), + 159 => Some(Possel::Pb15), + 160 => Some(Possel::Pc0), + 161 => Some(Possel::Pc1), + 162 => Some(Possel::Pc2), + 163 => Some(Possel::Pc3), + 164 => Some(Possel::Pc4), + 165 => Some(Possel::Pc5), + 166 => Some(Possel::Pc6), + 167 => Some(Possel::Pc7), + 168 => Some(Possel::Pc8), + 169 => Some(Possel::Pc9), + 170 => Some(Possel::Pc10), + 171 => Some(Possel::Pc11), + 172 => Some(Possel::Pc12), + 173 => Some(Possel::Pc13), + 174 => Some(Possel::Pc14), + 175 => Some(Possel::Pc15), + 176 => Some(Possel::Pd0), + 177 => Some(Possel::Pd1), + 178 => Some(Possel::Pd2), + 179 => Some(Possel::Pd3), + 180 => Some(Possel::Pd4), + 181 => Some(Possel::Pd5), + 182 => Some(Possel::Pd6), + 183 => Some(Possel::Pd7), + 184 => Some(Possel::Pd8), + 185 => Some(Possel::Pd9), + 186 => Some(Possel::Pd10), + 187 => Some(Possel::Pd11), + 188 => Some(Possel::Pd12), + 189 => Some(Possel::Pd13), + 190 => Some(Possel::Pd14), + 191 => Some(Possel::Pd15), _ => None, } } - #[doc = "Checks if the value of the field is `VSS`"] + #[doc = "VSS"] #[inline(always)] pub fn is_vss(&self) -> bool { - *self == POSSEL_A::VSS + *self == Possel::Vss } - #[doc = "Checks if the value of the field is `VREFDIVAVDD`"] + #[doc = "Divided AVDD"] #[inline(always)] pub fn is_vrefdivavdd(&self) -> bool { - *self == POSSEL_A::VREFDIVAVDD + *self == Possel::Vrefdivavdd } - #[doc = "Checks if the value of the field is `VREFDIVAVDDLP`"] + #[doc = "Low-Power Divided AVDD"] #[inline(always)] pub fn is_vrefdivavddlp(&self) -> bool { - *self == POSSEL_A::VREFDIVAVDDLP + *self == Possel::Vrefdivavddlp } - #[doc = "Checks if the value of the field is `VREFDIV1V25`"] + #[doc = "Divided 1V25 reference"] #[inline(always)] pub fn is_vrefdiv1v25(&self) -> bool { - *self == POSSEL_A::VREFDIV1V25 + *self == Possel::Vrefdiv1v25 } - #[doc = "Checks if the value of the field is `VREFDIV1V25LP`"] + #[doc = "Low-power Divided 1V25 reference"] #[inline(always)] pub fn is_vrefdiv1v25lp(&self) -> bool { - *self == POSSEL_A::VREFDIV1V25LP + *self == Possel::Vrefdiv1v25lp } - #[doc = "Checks if the value of the field is `VREFDIV2V5`"] + #[doc = "Divided 2V5 reference"] #[inline(always)] pub fn is_vrefdiv2v5(&self) -> bool { - *self == POSSEL_A::VREFDIV2V5 + *self == Possel::Vrefdiv2v5 } - #[doc = "Checks if the value of the field is `VREFDIV2V5LP`"] + #[doc = "Low-power Divided 2V5 reference"] #[inline(always)] pub fn is_vrefdiv2v5lp(&self) -> bool { - *self == POSSEL_A::VREFDIV2V5LP + *self == Possel::Vrefdiv2v5lp } - #[doc = "Checks if the value of the field is `VSENSE01DIV4`"] + #[doc = "VSENSE0 divided by 4"] #[inline(always)] pub fn is_vsense01div4(&self) -> bool { - *self == POSSEL_A::VSENSE01DIV4 + *self == Possel::Vsense01div4 } - #[doc = "Checks if the value of the field is `VSENSE01DIV4LP`"] + #[doc = "Low-power VSENSE0 divided by 4"] #[inline(always)] pub fn is_vsense01div4lp(&self) -> bool { - *self == POSSEL_A::VSENSE01DIV4LP + *self == Possel::Vsense01div4lp } - #[doc = "Checks if the value of the field is `VSENSE11DIV4`"] + #[doc = "VSENSE1 divided by 4"] #[inline(always)] pub fn is_vsense11div4(&self) -> bool { - *self == POSSEL_A::VSENSE11DIV4 + *self == Possel::Vsense11div4 } - #[doc = "Checks if the value of the field is `VSENSE11DIV4LP`"] + #[doc = "Low-power VSENSE1 divided by 4"] #[inline(always)] pub fn is_vsense11div4lp(&self) -> bool { - *self == POSSEL_A::VSENSE11DIV4LP + *self == Possel::Vsense11div4lp } - #[doc = "Checks if the value of the field is `VDACOUT0`"] + #[doc = "VDAC0 channel 0 output"] #[inline(always)] pub fn is_vdacout0(&self) -> bool { - *self == POSSEL_A::VDACOUT0 + *self == Possel::Vdacout0 } - #[doc = "Checks if the value of the field is `VDACOUT1`"] + #[doc = "VDAC0 channel 1 output"] #[inline(always)] pub fn is_vdacout1(&self) -> bool { - *self == POSSEL_A::VDACOUT1 + *self == Possel::Vdacout1 } - #[doc = "Checks if the value of the field is `EXTPA`"] + #[doc = "External interface, base is PA0."] #[inline(always)] pub fn is_extpa(&self) -> bool { - *self == POSSEL_A::EXTPA + *self == Possel::Extpa } - #[doc = "Checks if the value of the field is `EXTPB`"] + #[doc = "External interface, base is PB0."] #[inline(always)] pub fn is_extpb(&self) -> bool { - *self == POSSEL_A::EXTPB + *self == Possel::Extpb } - #[doc = "Checks if the value of the field is `EXTPC`"] + #[doc = "External interface, base is PC0."] #[inline(always)] pub fn is_extpc(&self) -> bool { - *self == POSSEL_A::EXTPC + *self == Possel::Extpc } - #[doc = "Checks if the value of the field is `EXTPD`"] + #[doc = "External interface, base is PD0."] #[inline(always)] pub fn is_extpd(&self) -> bool { - *self == POSSEL_A::EXTPD + *self == Possel::Extpd } - #[doc = "Checks if the value of the field is `PA0`"] + #[doc = "Port A, Pin0"] #[inline(always)] pub fn is_pa0(&self) -> bool { - *self == POSSEL_A::PA0 + *self == Possel::Pa0 } - #[doc = "Checks if the value of the field is `PA1`"] + #[doc = "Port A, Pin1"] #[inline(always)] pub fn is_pa1(&self) -> bool { - *self == POSSEL_A::PA1 + *self == Possel::Pa1 } - #[doc = "Checks if the value of the field is `PA2`"] + #[doc = "Port A, Pin2"] #[inline(always)] pub fn is_pa2(&self) -> bool { - *self == POSSEL_A::PA2 + *self == Possel::Pa2 } - #[doc = "Checks if the value of the field is `PA3`"] + #[doc = "Port A, Pin3"] #[inline(always)] pub fn is_pa3(&self) -> bool { - *self == POSSEL_A::PA3 + *self == Possel::Pa3 } - #[doc = "Checks if the value of the field is `PA4`"] + #[doc = "Port A, Pin4"] #[inline(always)] pub fn is_pa4(&self) -> bool { - *self == POSSEL_A::PA4 + *self == Possel::Pa4 } - #[doc = "Checks if the value of the field is `PA5`"] + #[doc = "Port A, Pin5"] #[inline(always)] pub fn is_pa5(&self) -> bool { - *self == POSSEL_A::PA5 + *self == Possel::Pa5 } - #[doc = "Checks if the value of the field is `PA6`"] + #[doc = "Port A, Pin6"] #[inline(always)] pub fn is_pa6(&self) -> bool { - *self == POSSEL_A::PA6 + *self == Possel::Pa6 } - #[doc = "Checks if the value of the field is `PA7`"] + #[doc = "Port A, Pin7"] #[inline(always)] pub fn is_pa7(&self) -> bool { - *self == POSSEL_A::PA7 + *self == Possel::Pa7 } - #[doc = "Checks if the value of the field is `PA8`"] + #[doc = "Port A, Pin8"] #[inline(always)] pub fn is_pa8(&self) -> bool { - *self == POSSEL_A::PA8 + *self == Possel::Pa8 } - #[doc = "Checks if the value of the field is `PA9`"] + #[doc = "Port A, Pin9"] #[inline(always)] pub fn is_pa9(&self) -> bool { - *self == POSSEL_A::PA9 + *self == Possel::Pa9 } - #[doc = "Checks if the value of the field is `PA10`"] + #[doc = "Port A, Pin10"] #[inline(always)] pub fn is_pa10(&self) -> bool { - *self == POSSEL_A::PA10 + *self == Possel::Pa10 } - #[doc = "Checks if the value of the field is `PA11`"] + #[doc = "Port A, Pin11"] #[inline(always)] pub fn is_pa11(&self) -> bool { - *self == POSSEL_A::PA11 + *self == Possel::Pa11 } - #[doc = "Checks if the value of the field is `PA12`"] + #[doc = "Port A, Pin12"] #[inline(always)] pub fn is_pa12(&self) -> bool { - *self == POSSEL_A::PA12 + *self == Possel::Pa12 } - #[doc = "Checks if the value of the field is `PA13`"] + #[doc = "Port A, Pin13"] #[inline(always)] pub fn is_pa13(&self) -> bool { - *self == POSSEL_A::PA13 + *self == Possel::Pa13 } - #[doc = "Checks if the value of the field is `PA14`"] + #[doc = "Port A, Pin14"] #[inline(always)] pub fn is_pa14(&self) -> bool { - *self == POSSEL_A::PA14 + *self == Possel::Pa14 } - #[doc = "Checks if the value of the field is `PA15`"] + #[doc = "Port A, Pin15"] #[inline(always)] pub fn is_pa15(&self) -> bool { - *self == POSSEL_A::PA15 + *self == Possel::Pa15 } - #[doc = "Checks if the value of the field is `PB0`"] + #[doc = "Port B, Pin0"] #[inline(always)] pub fn is_pb0(&self) -> bool { - *self == POSSEL_A::PB0 + *self == Possel::Pb0 } - #[doc = "Checks if the value of the field is `PB1`"] + #[doc = "Port B, Pin1"] #[inline(always)] pub fn is_pb1(&self) -> bool { - *self == POSSEL_A::PB1 + *self == Possel::Pb1 } - #[doc = "Checks if the value of the field is `PB2`"] + #[doc = "Port B, Pin2"] #[inline(always)] pub fn is_pb2(&self) -> bool { - *self == POSSEL_A::PB2 + *self == Possel::Pb2 } - #[doc = "Checks if the value of the field is `PB3`"] + #[doc = "Port B, Pin3"] #[inline(always)] pub fn is_pb3(&self) -> bool { - *self == POSSEL_A::PB3 + *self == Possel::Pb3 } - #[doc = "Checks if the value of the field is `PB4`"] + #[doc = "Port B, Pin4"] #[inline(always)] pub fn is_pb4(&self) -> bool { - *self == POSSEL_A::PB4 + *self == Possel::Pb4 } - #[doc = "Checks if the value of the field is `PB5`"] + #[doc = "Port B, Pin5"] #[inline(always)] pub fn is_pb5(&self) -> bool { - *self == POSSEL_A::PB5 + *self == Possel::Pb5 } - #[doc = "Checks if the value of the field is `PB6`"] + #[doc = "Port B, Pin6"] #[inline(always)] pub fn is_pb6(&self) -> bool { - *self == POSSEL_A::PB6 + *self == Possel::Pb6 } - #[doc = "Checks if the value of the field is `PB7`"] + #[doc = "Port B, Pin7"] #[inline(always)] pub fn is_pb7(&self) -> bool { - *self == POSSEL_A::PB7 + *self == Possel::Pb7 } - #[doc = "Checks if the value of the field is `PB8`"] + #[doc = "Port B, Pin8"] #[inline(always)] pub fn is_pb8(&self) -> bool { - *self == POSSEL_A::PB8 + *self == Possel::Pb8 } - #[doc = "Checks if the value of the field is `PB9`"] + #[doc = "Port B, Pin9"] #[inline(always)] pub fn is_pb9(&self) -> bool { - *self == POSSEL_A::PB9 + *self == Possel::Pb9 } - #[doc = "Checks if the value of the field is `PB10`"] + #[doc = "Port B, Pin10"] #[inline(always)] pub fn is_pb10(&self) -> bool { - *self == POSSEL_A::PB10 + *self == Possel::Pb10 } - #[doc = "Checks if the value of the field is `PB11`"] + #[doc = "Port B, Pin11"] #[inline(always)] pub fn is_pb11(&self) -> bool { - *self == POSSEL_A::PB11 + *self == Possel::Pb11 } - #[doc = "Checks if the value of the field is `PB12`"] + #[doc = "Port B, Pin12"] #[inline(always)] pub fn is_pb12(&self) -> bool { - *self == POSSEL_A::PB12 + *self == Possel::Pb12 } - #[doc = "Checks if the value of the field is `PB13`"] + #[doc = "Port B, Pin13"] #[inline(always)] pub fn is_pb13(&self) -> bool { - *self == POSSEL_A::PB13 + *self == Possel::Pb13 } - #[doc = "Checks if the value of the field is `PB14`"] + #[doc = "Port B, Pin14"] #[inline(always)] pub fn is_pb14(&self) -> bool { - *self == POSSEL_A::PB14 + *self == Possel::Pb14 } - #[doc = "Checks if the value of the field is `PB15`"] + #[doc = "Port B, Pin15"] #[inline(always)] pub fn is_pb15(&self) -> bool { - *self == POSSEL_A::PB15 + *self == Possel::Pb15 } - #[doc = "Checks if the value of the field is `PC0`"] + #[doc = "Port C, Pin0"] #[inline(always)] pub fn is_pc0(&self) -> bool { - *self == POSSEL_A::PC0 + *self == Possel::Pc0 } - #[doc = "Checks if the value of the field is `PC1`"] + #[doc = "Port C, Pin1"] #[inline(always)] pub fn is_pc1(&self) -> bool { - *self == POSSEL_A::PC1 + *self == Possel::Pc1 } - #[doc = "Checks if the value of the field is `PC2`"] + #[doc = "Port C, Pin2"] #[inline(always)] pub fn is_pc2(&self) -> bool { - *self == POSSEL_A::PC2 + *self == Possel::Pc2 } - #[doc = "Checks if the value of the field is `PC3`"] + #[doc = "Port C, Pin3"] #[inline(always)] pub fn is_pc3(&self) -> bool { - *self == POSSEL_A::PC3 + *self == Possel::Pc3 } - #[doc = "Checks if the value of the field is `PC4`"] + #[doc = "Port C, Pin4"] #[inline(always)] pub fn is_pc4(&self) -> bool { - *self == POSSEL_A::PC4 + *self == Possel::Pc4 } - #[doc = "Checks if the value of the field is `PC5`"] + #[doc = "Port C, Pin5"] #[inline(always)] pub fn is_pc5(&self) -> bool { - *self == POSSEL_A::PC5 + *self == Possel::Pc5 } - #[doc = "Checks if the value of the field is `PC6`"] + #[doc = "Port C, Pin6"] #[inline(always)] pub fn is_pc6(&self) -> bool { - *self == POSSEL_A::PC6 + *self == Possel::Pc6 } - #[doc = "Checks if the value of the field is `PC7`"] + #[doc = "Port C, Pin7"] #[inline(always)] pub fn is_pc7(&self) -> bool { - *self == POSSEL_A::PC7 + *self == Possel::Pc7 } - #[doc = "Checks if the value of the field is `PC8`"] + #[doc = "Port C, Pin8"] #[inline(always)] pub fn is_pc8(&self) -> bool { - *self == POSSEL_A::PC8 + *self == Possel::Pc8 } - #[doc = "Checks if the value of the field is `PC9`"] + #[doc = "Port C, Pin9"] #[inline(always)] pub fn is_pc9(&self) -> bool { - *self == POSSEL_A::PC9 + *self == Possel::Pc9 } - #[doc = "Checks if the value of the field is `PC10`"] + #[doc = "Port C, Pin10"] #[inline(always)] pub fn is_pc10(&self) -> bool { - *self == POSSEL_A::PC10 + *self == Possel::Pc10 } - #[doc = "Checks if the value of the field is `PC11`"] + #[doc = "Port C, Pin11"] #[inline(always)] pub fn is_pc11(&self) -> bool { - *self == POSSEL_A::PC11 + *self == Possel::Pc11 } - #[doc = "Checks if the value of the field is `PC12`"] + #[doc = "Port C, Pin12"] #[inline(always)] pub fn is_pc12(&self) -> bool { - *self == POSSEL_A::PC12 + *self == Possel::Pc12 } - #[doc = "Checks if the value of the field is `PC13`"] + #[doc = "Port C, Pin13"] #[inline(always)] pub fn is_pc13(&self) -> bool { - *self == POSSEL_A::PC13 + *self == Possel::Pc13 } - #[doc = "Checks if the value of the field is `PC14`"] + #[doc = "Port C, Pin14"] #[inline(always)] pub fn is_pc14(&self) -> bool { - *self == POSSEL_A::PC14 + *self == Possel::Pc14 } - #[doc = "Checks if the value of the field is `PC15`"] + #[doc = "Port C, Pin15"] #[inline(always)] pub fn is_pc15(&self) -> bool { - *self == POSSEL_A::PC15 + *self == Possel::Pc15 } - #[doc = "Checks if the value of the field is `PD0`"] + #[doc = "Port D, Pin0"] #[inline(always)] pub fn is_pd0(&self) -> bool { - *self == POSSEL_A::PD0 + *self == Possel::Pd0 } - #[doc = "Checks if the value of the field is `PD1`"] + #[doc = "Port D, Pin1"] #[inline(always)] pub fn is_pd1(&self) -> bool { - *self == POSSEL_A::PD1 + *self == Possel::Pd1 } - #[doc = "Checks if the value of the field is `PD2`"] + #[doc = "Port D, Pin2"] #[inline(always)] pub fn is_pd2(&self) -> bool { - *self == POSSEL_A::PD2 + *self == Possel::Pd2 } - #[doc = "Checks if the value of the field is `PD3`"] + #[doc = "Port D, Pin3"] #[inline(always)] pub fn is_pd3(&self) -> bool { - *self == POSSEL_A::PD3 + *self == Possel::Pd3 } - #[doc = "Checks if the value of the field is `PD4`"] + #[doc = "Port D, Pin4"] #[inline(always)] pub fn is_pd4(&self) -> bool { - *self == POSSEL_A::PD4 + *self == Possel::Pd4 } - #[doc = "Checks if the value of the field is `PD5`"] + #[doc = "Port D, Pin5"] #[inline(always)] pub fn is_pd5(&self) -> bool { - *self == POSSEL_A::PD5 + *self == Possel::Pd5 } - #[doc = "Checks if the value of the field is `PD6`"] + #[doc = "Port D, Pin6"] #[inline(always)] pub fn is_pd6(&self) -> bool { - *self == POSSEL_A::PD6 + *self == Possel::Pd6 } - #[doc = "Checks if the value of the field is `PD7`"] + #[doc = "Port D, Pin7"] #[inline(always)] pub fn is_pd7(&self) -> bool { - *self == POSSEL_A::PD7 + *self == Possel::Pd7 } - #[doc = "Checks if the value of the field is `PD8`"] + #[doc = "Port D, Pin8"] #[inline(always)] pub fn is_pd8(&self) -> bool { - *self == POSSEL_A::PD8 + *self == Possel::Pd8 } - #[doc = "Checks if the value of the field is `PD9`"] + #[doc = "Port D, Pin9"] #[inline(always)] pub fn is_pd9(&self) -> bool { - *self == POSSEL_A::PD9 + *self == Possel::Pd9 } - #[doc = "Checks if the value of the field is `PD10`"] + #[doc = "Port D, Pin10"] #[inline(always)] pub fn is_pd10(&self) -> bool { - *self == POSSEL_A::PD10 + *self == Possel::Pd10 } - #[doc = "Checks if the value of the field is `PD11`"] + #[doc = "Port D, Pin11"] #[inline(always)] pub fn is_pd11(&self) -> bool { - *self == POSSEL_A::PD11 + *self == Possel::Pd11 } - #[doc = "Checks if the value of the field is `PD12`"] + #[doc = "Port D, Pin12"] #[inline(always)] pub fn is_pd12(&self) -> bool { - *self == POSSEL_A::PD12 + *self == Possel::Pd12 } - #[doc = "Checks if the value of the field is `PD13`"] + #[doc = "Port D, Pin13"] #[inline(always)] pub fn is_pd13(&self) -> bool { - *self == POSSEL_A::PD13 + *self == Possel::Pd13 } - #[doc = "Checks if the value of the field is `PD14`"] + #[doc = "Port D, Pin14"] #[inline(always)] pub fn is_pd14(&self) -> bool { - *self == POSSEL_A::PD14 + *self == Possel::Pd14 } - #[doc = "Checks if the value of the field is `PD15`"] + #[doc = "Port D, Pin15"] #[inline(always)] pub fn is_pd15(&self) -> bool { - *self == POSSEL_A::PD15 + *self == Possel::Pd15 } } #[doc = "Field `POSSEL` writer - Positive Input Select"] -pub type POSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, INPUTCTRL_SPEC, u8, POSSEL_A, 8, O>; -impl<'a, const O: u8> POSSEL_W<'a, O> { +pub type PosselW<'a, REG> = crate::FieldWriter<'a, REG, 8, Possel>; +impl<'a, REG> PosselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "VSS"] #[inline(always)] - pub fn vss(self) -> &'a mut W { - self.variant(POSSEL_A::VSS) + pub fn vss(self) -> &'a mut crate::W { + self.variant(Possel::Vss) } #[doc = "Divided AVDD"] #[inline(always)] - pub fn vrefdivavdd(self) -> &'a mut W { - self.variant(POSSEL_A::VREFDIVAVDD) + pub fn vrefdivavdd(self) -> &'a mut crate::W { + self.variant(Possel::Vrefdivavdd) } #[doc = "Low-Power Divided AVDD"] #[inline(always)] - pub fn vrefdivavddlp(self) -> &'a mut W { - self.variant(POSSEL_A::VREFDIVAVDDLP) + pub fn vrefdivavddlp(self) -> &'a mut crate::W { + self.variant(Possel::Vrefdivavddlp) } #[doc = "Divided 1V25 reference"] #[inline(always)] - pub fn vrefdiv1v25(self) -> &'a mut W { - self.variant(POSSEL_A::VREFDIV1V25) + pub fn vrefdiv1v25(self) -> &'a mut crate::W { + self.variant(Possel::Vrefdiv1v25) } #[doc = "Low-power Divided 1V25 reference"] #[inline(always)] - pub fn vrefdiv1v25lp(self) -> &'a mut W { - self.variant(POSSEL_A::VREFDIV1V25LP) + pub fn vrefdiv1v25lp(self) -> &'a mut crate::W { + self.variant(Possel::Vrefdiv1v25lp) } #[doc = "Divided 2V5 reference"] #[inline(always)] - pub fn vrefdiv2v5(self) -> &'a mut W { - self.variant(POSSEL_A::VREFDIV2V5) + pub fn vrefdiv2v5(self) -> &'a mut crate::W { + self.variant(Possel::Vrefdiv2v5) } #[doc = "Low-power Divided 2V5 reference"] #[inline(always)] - pub fn vrefdiv2v5lp(self) -> &'a mut W { - self.variant(POSSEL_A::VREFDIV2V5LP) + pub fn vrefdiv2v5lp(self) -> &'a mut crate::W { + self.variant(Possel::Vrefdiv2v5lp) } #[doc = "VSENSE0 divided by 4"] #[inline(always)] - pub fn vsense01div4(self) -> &'a mut W { - self.variant(POSSEL_A::VSENSE01DIV4) + pub fn vsense01div4(self) -> &'a mut crate::W { + self.variant(Possel::Vsense01div4) } #[doc = "Low-power VSENSE0 divided by 4"] #[inline(always)] - pub fn vsense01div4lp(self) -> &'a mut W { - self.variant(POSSEL_A::VSENSE01DIV4LP) + pub fn vsense01div4lp(self) -> &'a mut crate::W { + self.variant(Possel::Vsense01div4lp) } #[doc = "VSENSE1 divided by 4"] #[inline(always)] - pub fn vsense11div4(self) -> &'a mut W { - self.variant(POSSEL_A::VSENSE11DIV4) + pub fn vsense11div4(self) -> &'a mut crate::W { + self.variant(Possel::Vsense11div4) } #[doc = "Low-power VSENSE1 divided by 4"] #[inline(always)] - pub fn vsense11div4lp(self) -> &'a mut W { - self.variant(POSSEL_A::VSENSE11DIV4LP) + pub fn vsense11div4lp(self) -> &'a mut crate::W { + self.variant(Possel::Vsense11div4lp) } #[doc = "VDAC0 channel 0 output"] #[inline(always)] - pub fn vdacout0(self) -> &'a mut W { - self.variant(POSSEL_A::VDACOUT0) + pub fn vdacout0(self) -> &'a mut crate::W { + self.variant(Possel::Vdacout0) } #[doc = "VDAC0 channel 1 output"] #[inline(always)] - pub fn vdacout1(self) -> &'a mut W { - self.variant(POSSEL_A::VDACOUT1) + pub fn vdacout1(self) -> &'a mut crate::W { + self.variant(Possel::Vdacout1) } #[doc = "External interface, base is PA0."] #[inline(always)] - pub fn extpa(self) -> &'a mut W { - self.variant(POSSEL_A::EXTPA) + pub fn extpa(self) -> &'a mut crate::W { + self.variant(Possel::Extpa) } #[doc = "External interface, base is PB0."] #[inline(always)] - pub fn extpb(self) -> &'a mut W { - self.variant(POSSEL_A::EXTPB) + pub fn extpb(self) -> &'a mut crate::W { + self.variant(Possel::Extpb) } #[doc = "External interface, base is PC0."] #[inline(always)] - pub fn extpc(self) -> &'a mut W { - self.variant(POSSEL_A::EXTPC) + pub fn extpc(self) -> &'a mut crate::W { + self.variant(Possel::Extpc) } #[doc = "External interface, base is PD0."] #[inline(always)] - pub fn extpd(self) -> &'a mut W { - self.variant(POSSEL_A::EXTPD) + pub fn extpd(self) -> &'a mut crate::W { + self.variant(Possel::Extpd) } #[doc = "Port A, Pin0"] #[inline(always)] - pub fn pa0(self) -> &'a mut W { - self.variant(POSSEL_A::PA0) + pub fn pa0(self) -> &'a mut crate::W { + self.variant(Possel::Pa0) } #[doc = "Port A, Pin1"] #[inline(always)] - pub fn pa1(self) -> &'a mut W { - self.variant(POSSEL_A::PA1) + pub fn pa1(self) -> &'a mut crate::W { + self.variant(Possel::Pa1) } #[doc = "Port A, Pin2"] #[inline(always)] - pub fn pa2(self) -> &'a mut W { - self.variant(POSSEL_A::PA2) + pub fn pa2(self) -> &'a mut crate::W { + self.variant(Possel::Pa2) } #[doc = "Port A, Pin3"] #[inline(always)] - pub fn pa3(self) -> &'a mut W { - self.variant(POSSEL_A::PA3) + pub fn pa3(self) -> &'a mut crate::W { + self.variant(Possel::Pa3) } #[doc = "Port A, Pin4"] #[inline(always)] - pub fn pa4(self) -> &'a mut W { - self.variant(POSSEL_A::PA4) + pub fn pa4(self) -> &'a mut crate::W { + self.variant(Possel::Pa4) } #[doc = "Port A, Pin5"] #[inline(always)] - pub fn pa5(self) -> &'a mut W { - self.variant(POSSEL_A::PA5) + pub fn pa5(self) -> &'a mut crate::W { + self.variant(Possel::Pa5) } #[doc = "Port A, Pin6"] #[inline(always)] - pub fn pa6(self) -> &'a mut W { - self.variant(POSSEL_A::PA6) + pub fn pa6(self) -> &'a mut crate::W { + self.variant(Possel::Pa6) } #[doc = "Port A, Pin7"] #[inline(always)] - pub fn pa7(self) -> &'a mut W { - self.variant(POSSEL_A::PA7) + pub fn pa7(self) -> &'a mut crate::W { + self.variant(Possel::Pa7) } #[doc = "Port A, Pin8"] #[inline(always)] - pub fn pa8(self) -> &'a mut W { - self.variant(POSSEL_A::PA8) + pub fn pa8(self) -> &'a mut crate::W { + self.variant(Possel::Pa8) } #[doc = "Port A, Pin9"] #[inline(always)] - pub fn pa9(self) -> &'a mut W { - self.variant(POSSEL_A::PA9) + pub fn pa9(self) -> &'a mut crate::W { + self.variant(Possel::Pa9) } #[doc = "Port A, Pin10"] #[inline(always)] - pub fn pa10(self) -> &'a mut W { - self.variant(POSSEL_A::PA10) + pub fn pa10(self) -> &'a mut crate::W { + self.variant(Possel::Pa10) } #[doc = "Port A, Pin11"] #[inline(always)] - pub fn pa11(self) -> &'a mut W { - self.variant(POSSEL_A::PA11) + pub fn pa11(self) -> &'a mut crate::W { + self.variant(Possel::Pa11) } #[doc = "Port A, Pin12"] #[inline(always)] - pub fn pa12(self) -> &'a mut W { - self.variant(POSSEL_A::PA12) + pub fn pa12(self) -> &'a mut crate::W { + self.variant(Possel::Pa12) } #[doc = "Port A, Pin13"] #[inline(always)] - pub fn pa13(self) -> &'a mut W { - self.variant(POSSEL_A::PA13) + pub fn pa13(self) -> &'a mut crate::W { + self.variant(Possel::Pa13) } #[doc = "Port A, Pin14"] #[inline(always)] - pub fn pa14(self) -> &'a mut W { - self.variant(POSSEL_A::PA14) + pub fn pa14(self) -> &'a mut crate::W { + self.variant(Possel::Pa14) } #[doc = "Port A, Pin15"] #[inline(always)] - pub fn pa15(self) -> &'a mut W { - self.variant(POSSEL_A::PA15) + pub fn pa15(self) -> &'a mut crate::W { + self.variant(Possel::Pa15) } #[doc = "Port B, Pin0"] #[inline(always)] - pub fn pb0(self) -> &'a mut W { - self.variant(POSSEL_A::PB0) + pub fn pb0(self) -> &'a mut crate::W { + self.variant(Possel::Pb0) } #[doc = "Port B, Pin1"] #[inline(always)] - pub fn pb1(self) -> &'a mut W { - self.variant(POSSEL_A::PB1) + pub fn pb1(self) -> &'a mut crate::W { + self.variant(Possel::Pb1) } #[doc = "Port B, Pin2"] #[inline(always)] - pub fn pb2(self) -> &'a mut W { - self.variant(POSSEL_A::PB2) + pub fn pb2(self) -> &'a mut crate::W { + self.variant(Possel::Pb2) } #[doc = "Port B, Pin3"] #[inline(always)] - pub fn pb3(self) -> &'a mut W { - self.variant(POSSEL_A::PB3) + pub fn pb3(self) -> &'a mut crate::W { + self.variant(Possel::Pb3) } #[doc = "Port B, Pin4"] #[inline(always)] - pub fn pb4(self) -> &'a mut W { - self.variant(POSSEL_A::PB4) + pub fn pb4(self) -> &'a mut crate::W { + self.variant(Possel::Pb4) } #[doc = "Port B, Pin5"] #[inline(always)] - pub fn pb5(self) -> &'a mut W { - self.variant(POSSEL_A::PB5) + pub fn pb5(self) -> &'a mut crate::W { + self.variant(Possel::Pb5) } #[doc = "Port B, Pin6"] #[inline(always)] - pub fn pb6(self) -> &'a mut W { - self.variant(POSSEL_A::PB6) + pub fn pb6(self) -> &'a mut crate::W { + self.variant(Possel::Pb6) } #[doc = "Port B, Pin7"] #[inline(always)] - pub fn pb7(self) -> &'a mut W { - self.variant(POSSEL_A::PB7) + pub fn pb7(self) -> &'a mut crate::W { + self.variant(Possel::Pb7) } #[doc = "Port B, Pin8"] #[inline(always)] - pub fn pb8(self) -> &'a mut W { - self.variant(POSSEL_A::PB8) + pub fn pb8(self) -> &'a mut crate::W { + self.variant(Possel::Pb8) } #[doc = "Port B, Pin9"] #[inline(always)] - pub fn pb9(self) -> &'a mut W { - self.variant(POSSEL_A::PB9) + pub fn pb9(self) -> &'a mut crate::W { + self.variant(Possel::Pb9) } #[doc = "Port B, Pin10"] #[inline(always)] - pub fn pb10(self) -> &'a mut W { - self.variant(POSSEL_A::PB10) + pub fn pb10(self) -> &'a mut crate::W { + self.variant(Possel::Pb10) } #[doc = "Port B, Pin11"] #[inline(always)] - pub fn pb11(self) -> &'a mut W { - self.variant(POSSEL_A::PB11) + pub fn pb11(self) -> &'a mut crate::W { + self.variant(Possel::Pb11) } #[doc = "Port B, Pin12"] #[inline(always)] - pub fn pb12(self) -> &'a mut W { - self.variant(POSSEL_A::PB12) + pub fn pb12(self) -> &'a mut crate::W { + self.variant(Possel::Pb12) } #[doc = "Port B, Pin13"] #[inline(always)] - pub fn pb13(self) -> &'a mut W { - self.variant(POSSEL_A::PB13) + pub fn pb13(self) -> &'a mut crate::W { + self.variant(Possel::Pb13) } #[doc = "Port B, Pin14"] #[inline(always)] - pub fn pb14(self) -> &'a mut W { - self.variant(POSSEL_A::PB14) + pub fn pb14(self) -> &'a mut crate::W { + self.variant(Possel::Pb14) } #[doc = "Port B, Pin15"] #[inline(always)] - pub fn pb15(self) -> &'a mut W { - self.variant(POSSEL_A::PB15) + pub fn pb15(self) -> &'a mut crate::W { + self.variant(Possel::Pb15) } #[doc = "Port C, Pin0"] #[inline(always)] - pub fn pc0(self) -> &'a mut W { - self.variant(POSSEL_A::PC0) + pub fn pc0(self) -> &'a mut crate::W { + self.variant(Possel::Pc0) } #[doc = "Port C, Pin1"] #[inline(always)] - pub fn pc1(self) -> &'a mut W { - self.variant(POSSEL_A::PC1) + pub fn pc1(self) -> &'a mut crate::W { + self.variant(Possel::Pc1) } #[doc = "Port C, Pin2"] #[inline(always)] - pub fn pc2(self) -> &'a mut W { - self.variant(POSSEL_A::PC2) + pub fn pc2(self) -> &'a mut crate::W { + self.variant(Possel::Pc2) } #[doc = "Port C, Pin3"] #[inline(always)] - pub fn pc3(self) -> &'a mut W { - self.variant(POSSEL_A::PC3) + pub fn pc3(self) -> &'a mut crate::W { + self.variant(Possel::Pc3) } #[doc = "Port C, Pin4"] #[inline(always)] - pub fn pc4(self) -> &'a mut W { - self.variant(POSSEL_A::PC4) + pub fn pc4(self) -> &'a mut crate::W { + self.variant(Possel::Pc4) } #[doc = "Port C, Pin5"] #[inline(always)] - pub fn pc5(self) -> &'a mut W { - self.variant(POSSEL_A::PC5) + pub fn pc5(self) -> &'a mut crate::W { + self.variant(Possel::Pc5) } #[doc = "Port C, Pin6"] #[inline(always)] - pub fn pc6(self) -> &'a mut W { - self.variant(POSSEL_A::PC6) + pub fn pc6(self) -> &'a mut crate::W { + self.variant(Possel::Pc6) } #[doc = "Port C, Pin7"] #[inline(always)] - pub fn pc7(self) -> &'a mut W { - self.variant(POSSEL_A::PC7) + pub fn pc7(self) -> &'a mut crate::W { + self.variant(Possel::Pc7) } #[doc = "Port C, Pin8"] #[inline(always)] - pub fn pc8(self) -> &'a mut W { - self.variant(POSSEL_A::PC8) + pub fn pc8(self) -> &'a mut crate::W { + self.variant(Possel::Pc8) } #[doc = "Port C, Pin9"] #[inline(always)] - pub fn pc9(self) -> &'a mut W { - self.variant(POSSEL_A::PC9) + pub fn pc9(self) -> &'a mut crate::W { + self.variant(Possel::Pc9) } #[doc = "Port C, Pin10"] #[inline(always)] - pub fn pc10(self) -> &'a mut W { - self.variant(POSSEL_A::PC10) + pub fn pc10(self) -> &'a mut crate::W { + self.variant(Possel::Pc10) } #[doc = "Port C, Pin11"] #[inline(always)] - pub fn pc11(self) -> &'a mut W { - self.variant(POSSEL_A::PC11) + pub fn pc11(self) -> &'a mut crate::W { + self.variant(Possel::Pc11) } #[doc = "Port C, Pin12"] #[inline(always)] - pub fn pc12(self) -> &'a mut W { - self.variant(POSSEL_A::PC12) + pub fn pc12(self) -> &'a mut crate::W { + self.variant(Possel::Pc12) } #[doc = "Port C, Pin13"] #[inline(always)] - pub fn pc13(self) -> &'a mut W { - self.variant(POSSEL_A::PC13) + pub fn pc13(self) -> &'a mut crate::W { + self.variant(Possel::Pc13) } #[doc = "Port C, Pin14"] #[inline(always)] - pub fn pc14(self) -> &'a mut W { - self.variant(POSSEL_A::PC14) + pub fn pc14(self) -> &'a mut crate::W { + self.variant(Possel::Pc14) } #[doc = "Port C, Pin15"] #[inline(always)] - pub fn pc15(self) -> &'a mut W { - self.variant(POSSEL_A::PC15) + pub fn pc15(self) -> &'a mut crate::W { + self.variant(Possel::Pc15) } #[doc = "Port D, Pin0"] #[inline(always)] - pub fn pd0(self) -> &'a mut W { - self.variant(POSSEL_A::PD0) + pub fn pd0(self) -> &'a mut crate::W { + self.variant(Possel::Pd0) } #[doc = "Port D, Pin1"] #[inline(always)] - pub fn pd1(self) -> &'a mut W { - self.variant(POSSEL_A::PD1) + pub fn pd1(self) -> &'a mut crate::W { + self.variant(Possel::Pd1) } #[doc = "Port D, Pin2"] #[inline(always)] - pub fn pd2(self) -> &'a mut W { - self.variant(POSSEL_A::PD2) + pub fn pd2(self) -> &'a mut crate::W { + self.variant(Possel::Pd2) } #[doc = "Port D, Pin3"] #[inline(always)] - pub fn pd3(self) -> &'a mut W { - self.variant(POSSEL_A::PD3) + pub fn pd3(self) -> &'a mut crate::W { + self.variant(Possel::Pd3) } #[doc = "Port D, Pin4"] #[inline(always)] - pub fn pd4(self) -> &'a mut W { - self.variant(POSSEL_A::PD4) + pub fn pd4(self) -> &'a mut crate::W { + self.variant(Possel::Pd4) } #[doc = "Port D, Pin5"] #[inline(always)] - pub fn pd5(self) -> &'a mut W { - self.variant(POSSEL_A::PD5) + pub fn pd5(self) -> &'a mut crate::W { + self.variant(Possel::Pd5) } #[doc = "Port D, Pin6"] #[inline(always)] - pub fn pd6(self) -> &'a mut W { - self.variant(POSSEL_A::PD6) + pub fn pd6(self) -> &'a mut crate::W { + self.variant(Possel::Pd6) } #[doc = "Port D, Pin7"] #[inline(always)] - pub fn pd7(self) -> &'a mut W { - self.variant(POSSEL_A::PD7) + pub fn pd7(self) -> &'a mut crate::W { + self.variant(Possel::Pd7) } #[doc = "Port D, Pin8"] #[inline(always)] - pub fn pd8(self) -> &'a mut W { - self.variant(POSSEL_A::PD8) + pub fn pd8(self) -> &'a mut crate::W { + self.variant(Possel::Pd8) } #[doc = "Port D, Pin9"] #[inline(always)] - pub fn pd9(self) -> &'a mut W { - self.variant(POSSEL_A::PD9) + pub fn pd9(self) -> &'a mut crate::W { + self.variant(Possel::Pd9) } #[doc = "Port D, Pin10"] #[inline(always)] - pub fn pd10(self) -> &'a mut W { - self.variant(POSSEL_A::PD10) + pub fn pd10(self) -> &'a mut crate::W { + self.variant(Possel::Pd10) } #[doc = "Port D, Pin11"] #[inline(always)] - pub fn pd11(self) -> &'a mut W { - self.variant(POSSEL_A::PD11) + pub fn pd11(self) -> &'a mut crate::W { + self.variant(Possel::Pd11) } #[doc = "Port D, Pin12"] #[inline(always)] - pub fn pd12(self) -> &'a mut W { - self.variant(POSSEL_A::PD12) + pub fn pd12(self) -> &'a mut crate::W { + self.variant(Possel::Pd12) } #[doc = "Port D, Pin13"] #[inline(always)] - pub fn pd13(self) -> &'a mut W { - self.variant(POSSEL_A::PD13) + pub fn pd13(self) -> &'a mut crate::W { + self.variant(Possel::Pd13) } #[doc = "Port D, Pin14"] #[inline(always)] - pub fn pd14(self) -> &'a mut W { - self.variant(POSSEL_A::PD14) + pub fn pd14(self) -> &'a mut crate::W { + self.variant(Possel::Pd14) } #[doc = "Port D, Pin15"] #[inline(always)] - pub fn pd15(self) -> &'a mut W { - self.variant(POSSEL_A::PD15) + pub fn pd15(self) -> &'a mut crate::W { + self.variant(Possel::Pd15) } } -#[doc = "Field `NEGSEL` reader - Negative Input Select"] -pub type NEGSEL_R = crate::FieldReader; #[doc = "Negative Input Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum NEGSEL_A { +pub enum Negsel { #[doc = "0: VSS"] - VSS = 0, + Vss = 0, #[doc = "16: Divided AVDD"] - VREFDIVAVDD = 16, + Vrefdivavdd = 16, #[doc = "17: Low-Power Divided AVDD"] - VREFDIVAVDDLP = 17, + Vrefdivavddlp = 17, #[doc = "18: Divided 1V25 reference"] - VREFDIV1V25 = 18, + Vrefdiv1v25 = 18, #[doc = "19: Low-power Divided 1V25 reference"] - VREFDIV1V25LP = 19, + Vrefdiv1v25lp = 19, #[doc = "20: Divided 2V5 reference"] - VREFDIV2V5 = 20, + Vrefdiv2v5 = 20, #[doc = "21: Low-power Divided 2V5 reference"] - VREFDIV2V5LP = 21, + Vrefdiv2v5lp = 21, #[doc = "32: VSENSE0 divided by 4"] - VSENSE01DIV4 = 32, + Vsense01div4 = 32, #[doc = "33: Low-power VSENSE0 divided by 4"] - VSENSE01DIV4LP = 33, + Vsense01div4lp = 33, #[doc = "34: VSENSE1 divided by 4"] - VSENSE11DIV4 = 34, + Vsense11div4 = 34, #[doc = "35: Low-power VSENSE1 divided by 4"] - VSENSE11DIV4LP = 35, - #[doc = "48: Capsense mode"] - CAPSENSE = 48, + Vsense11div4lp = 35, + #[doc = "48: Deprecated capacitive sensing feature, not recommended for new designs"] + Capsense = 48, #[doc = "64: VDAC0 channel 0 output"] - VDACOUT0 = 64, + Vdacout0 = 64, #[doc = "65: VDAC0 channel 1 output"] - VDACOUT1 = 65, + Vdacout1 = 65, #[doc = "128: Port A, Pin0"] - PA0 = 128, + Pa0 = 128, #[doc = "129: Port A, Pin1"] - PA1 = 129, + Pa1 = 129, #[doc = "130: Port A, Pin2"] - PA2 = 130, + Pa2 = 130, #[doc = "131: Port A, Pin3"] - PA3 = 131, + Pa3 = 131, #[doc = "132: Port A, Pin4"] - PA4 = 132, + Pa4 = 132, #[doc = "133: Port A, Pin5"] - PA5 = 133, + Pa5 = 133, #[doc = "134: Port A, Pin6"] - PA6 = 134, + Pa6 = 134, #[doc = "135: Port A, Pin7"] - PA7 = 135, + Pa7 = 135, #[doc = "136: Port A, Pin8"] - PA8 = 136, + Pa8 = 136, #[doc = "137: Port A, Pin9"] - PA9 = 137, + Pa9 = 137, #[doc = "138: Port A, Pin10"] - PA10 = 138, + Pa10 = 138, #[doc = "139: Port A, Pin11"] - PA11 = 139, + Pa11 = 139, #[doc = "140: Port A, Pin12"] - PA12 = 140, + Pa12 = 140, #[doc = "141: Port A, Pin13"] - PA13 = 141, + Pa13 = 141, #[doc = "142: Port A, Pin14"] - PA14 = 142, + Pa14 = 142, #[doc = "143: Port A, Pin15"] - PA15 = 143, + Pa15 = 143, #[doc = "144: Port B, Pin0"] - PB0 = 144, + Pb0 = 144, #[doc = "145: Port B, Pin1"] - PB1 = 145, + Pb1 = 145, #[doc = "146: Port B, Pin2"] - PB2 = 146, + Pb2 = 146, #[doc = "147: Port B, Pin3"] - PB3 = 147, + Pb3 = 147, #[doc = "148: Port B, Pin4"] - PB4 = 148, + Pb4 = 148, #[doc = "149: Port B, Pin5"] - PB5 = 149, + Pb5 = 149, #[doc = "150: Port B, Pin6"] - PB6 = 150, + Pb6 = 150, #[doc = "151: Port B, Pin7"] - PB7 = 151, + Pb7 = 151, #[doc = "152: Port B, Pin8"] - PB8 = 152, + Pb8 = 152, #[doc = "153: Port B, Pin9"] - PB9 = 153, + Pb9 = 153, #[doc = "154: Port B, Pin10"] - PB10 = 154, + Pb10 = 154, #[doc = "155: Port B, Pin11"] - PB11 = 155, + Pb11 = 155, #[doc = "156: Port B, Pin12"] - PB12 = 156, + Pb12 = 156, #[doc = "157: Port B, Pin13"] - PB13 = 157, + Pb13 = 157, #[doc = "158: Port B, Pin14"] - PB14 = 158, + Pb14 = 158, #[doc = "159: Port B, Pin15"] - PB15 = 159, + Pb15 = 159, #[doc = "160: Port C, Pin0"] - PC0 = 160, + Pc0 = 160, #[doc = "161: Port C, Pin1"] - PC1 = 161, + Pc1 = 161, #[doc = "162: Port C, Pin2"] - PC2 = 162, + Pc2 = 162, #[doc = "163: Port C, Pin3"] - PC3 = 163, + Pc3 = 163, #[doc = "164: Port C, Pin4"] - PC4 = 164, + Pc4 = 164, #[doc = "165: Port C, Pin5"] - PC5 = 165, + Pc5 = 165, #[doc = "166: Port C, Pin6"] - PC6 = 166, + Pc6 = 166, #[doc = "167: Port C, Pin7"] - PC7 = 167, + Pc7 = 167, #[doc = "168: Port C, Pin8"] - PC8 = 168, + Pc8 = 168, #[doc = "169: Port C, Pin9"] - PC9 = 169, + Pc9 = 169, #[doc = "170: Port C, Pin10"] - PC10 = 170, + Pc10 = 170, #[doc = "171: Port C, Pin11"] - PC11 = 171, + Pc11 = 171, #[doc = "172: Port C, Pin12"] - PC12 = 172, + Pc12 = 172, #[doc = "173: Port C, Pin13"] - PC13 = 173, + Pc13 = 173, #[doc = "174: Port C, Pin14"] - PC14 = 174, + Pc14 = 174, #[doc = "175: Port C, Pin15"] - PC15 = 175, + Pc15 = 175, #[doc = "176: Port D, Pin0"] - PD0 = 176, + Pd0 = 176, #[doc = "177: Port D, Pin1"] - PD1 = 177, + Pd1 = 177, #[doc = "178: Port D, Pin2"] - PD2 = 178, + Pd2 = 178, #[doc = "179: Port D, Pin3"] - PD3 = 179, + Pd3 = 179, #[doc = "180: Port D, Pin4"] - PD4 = 180, + Pd4 = 180, #[doc = "181: Port D, Pin5"] - PD5 = 181, + Pd5 = 181, #[doc = "182: Port D, Pin6"] - PD6 = 182, + Pd6 = 182, #[doc = "183: Port D, Pin7"] - PD7 = 183, + Pd7 = 183, #[doc = "184: Port D, Pin8"] - PD8 = 184, + Pd8 = 184, #[doc = "185: Port D, Pin9"] - PD9 = 185, + Pd9 = 185, #[doc = "186: Port D, Pin10"] - PD10 = 186, + Pd10 = 186, #[doc = "187: Port D, Pin11"] - PD11 = 187, + Pd11 = 187, #[doc = "188: Port D, Pin12"] - PD12 = 188, + Pd12 = 188, #[doc = "189: Port D, Pin13"] - PD13 = 189, + Pd13 = 189, #[doc = "190: Port D, Pin14"] - PD14 = 190, + Pd14 = 190, #[doc = "191: Port D, Pin15"] - PD15 = 191, + Pd15 = 191, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: NEGSEL_A) -> Self { + fn from(variant: Negsel) -> Self { variant as _ } } -impl NEGSEL_R { +impl crate::FieldSpec for Negsel { + type Ux = u8; +} +impl crate::IsEnum for Negsel {} +#[doc = "Field `NEGSEL` reader - Negative Input Select"] +pub type NegselR = crate::FieldReader; +impl NegselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(NEGSEL_A::VSS), - 16 => Some(NEGSEL_A::VREFDIVAVDD), - 17 => Some(NEGSEL_A::VREFDIVAVDDLP), - 18 => Some(NEGSEL_A::VREFDIV1V25), - 19 => Some(NEGSEL_A::VREFDIV1V25LP), - 20 => Some(NEGSEL_A::VREFDIV2V5), - 21 => Some(NEGSEL_A::VREFDIV2V5LP), - 32 => Some(NEGSEL_A::VSENSE01DIV4), - 33 => Some(NEGSEL_A::VSENSE01DIV4LP), - 34 => Some(NEGSEL_A::VSENSE11DIV4), - 35 => Some(NEGSEL_A::VSENSE11DIV4LP), - 48 => Some(NEGSEL_A::CAPSENSE), - 64 => Some(NEGSEL_A::VDACOUT0), - 65 => Some(NEGSEL_A::VDACOUT1), - 128 => Some(NEGSEL_A::PA0), - 129 => Some(NEGSEL_A::PA1), - 130 => Some(NEGSEL_A::PA2), - 131 => Some(NEGSEL_A::PA3), - 132 => Some(NEGSEL_A::PA4), - 133 => Some(NEGSEL_A::PA5), - 134 => Some(NEGSEL_A::PA6), - 135 => Some(NEGSEL_A::PA7), - 136 => Some(NEGSEL_A::PA8), - 137 => Some(NEGSEL_A::PA9), - 138 => Some(NEGSEL_A::PA10), - 139 => Some(NEGSEL_A::PA11), - 140 => Some(NEGSEL_A::PA12), - 141 => Some(NEGSEL_A::PA13), - 142 => Some(NEGSEL_A::PA14), - 143 => Some(NEGSEL_A::PA15), - 144 => Some(NEGSEL_A::PB0), - 145 => Some(NEGSEL_A::PB1), - 146 => Some(NEGSEL_A::PB2), - 147 => Some(NEGSEL_A::PB3), - 148 => Some(NEGSEL_A::PB4), - 149 => Some(NEGSEL_A::PB5), - 150 => Some(NEGSEL_A::PB6), - 151 => Some(NEGSEL_A::PB7), - 152 => Some(NEGSEL_A::PB8), - 153 => Some(NEGSEL_A::PB9), - 154 => Some(NEGSEL_A::PB10), - 155 => Some(NEGSEL_A::PB11), - 156 => Some(NEGSEL_A::PB12), - 157 => Some(NEGSEL_A::PB13), - 158 => Some(NEGSEL_A::PB14), - 159 => Some(NEGSEL_A::PB15), - 160 => Some(NEGSEL_A::PC0), - 161 => Some(NEGSEL_A::PC1), - 162 => Some(NEGSEL_A::PC2), - 163 => Some(NEGSEL_A::PC3), - 164 => Some(NEGSEL_A::PC4), - 165 => Some(NEGSEL_A::PC5), - 166 => Some(NEGSEL_A::PC6), - 167 => Some(NEGSEL_A::PC7), - 168 => Some(NEGSEL_A::PC8), - 169 => Some(NEGSEL_A::PC9), - 170 => Some(NEGSEL_A::PC10), - 171 => Some(NEGSEL_A::PC11), - 172 => Some(NEGSEL_A::PC12), - 173 => Some(NEGSEL_A::PC13), - 174 => Some(NEGSEL_A::PC14), - 175 => Some(NEGSEL_A::PC15), - 176 => Some(NEGSEL_A::PD0), - 177 => Some(NEGSEL_A::PD1), - 178 => Some(NEGSEL_A::PD2), - 179 => Some(NEGSEL_A::PD3), - 180 => Some(NEGSEL_A::PD4), - 181 => Some(NEGSEL_A::PD5), - 182 => Some(NEGSEL_A::PD6), - 183 => Some(NEGSEL_A::PD7), - 184 => Some(NEGSEL_A::PD8), - 185 => Some(NEGSEL_A::PD9), - 186 => Some(NEGSEL_A::PD10), - 187 => Some(NEGSEL_A::PD11), - 188 => Some(NEGSEL_A::PD12), - 189 => Some(NEGSEL_A::PD13), - 190 => Some(NEGSEL_A::PD14), - 191 => Some(NEGSEL_A::PD15), + 0 => Some(Negsel::Vss), + 16 => Some(Negsel::Vrefdivavdd), + 17 => Some(Negsel::Vrefdivavddlp), + 18 => Some(Negsel::Vrefdiv1v25), + 19 => Some(Negsel::Vrefdiv1v25lp), + 20 => Some(Negsel::Vrefdiv2v5), + 21 => Some(Negsel::Vrefdiv2v5lp), + 32 => Some(Negsel::Vsense01div4), + 33 => Some(Negsel::Vsense01div4lp), + 34 => Some(Negsel::Vsense11div4), + 35 => Some(Negsel::Vsense11div4lp), + 48 => Some(Negsel::Capsense), + 64 => Some(Negsel::Vdacout0), + 65 => Some(Negsel::Vdacout1), + 128 => Some(Negsel::Pa0), + 129 => Some(Negsel::Pa1), + 130 => Some(Negsel::Pa2), + 131 => Some(Negsel::Pa3), + 132 => Some(Negsel::Pa4), + 133 => Some(Negsel::Pa5), + 134 => Some(Negsel::Pa6), + 135 => Some(Negsel::Pa7), + 136 => Some(Negsel::Pa8), + 137 => Some(Negsel::Pa9), + 138 => Some(Negsel::Pa10), + 139 => Some(Negsel::Pa11), + 140 => Some(Negsel::Pa12), + 141 => Some(Negsel::Pa13), + 142 => Some(Negsel::Pa14), + 143 => Some(Negsel::Pa15), + 144 => Some(Negsel::Pb0), + 145 => Some(Negsel::Pb1), + 146 => Some(Negsel::Pb2), + 147 => Some(Negsel::Pb3), + 148 => Some(Negsel::Pb4), + 149 => Some(Negsel::Pb5), + 150 => Some(Negsel::Pb6), + 151 => Some(Negsel::Pb7), + 152 => Some(Negsel::Pb8), + 153 => Some(Negsel::Pb9), + 154 => Some(Negsel::Pb10), + 155 => Some(Negsel::Pb11), + 156 => Some(Negsel::Pb12), + 157 => Some(Negsel::Pb13), + 158 => Some(Negsel::Pb14), + 159 => Some(Negsel::Pb15), + 160 => Some(Negsel::Pc0), + 161 => Some(Negsel::Pc1), + 162 => Some(Negsel::Pc2), + 163 => Some(Negsel::Pc3), + 164 => Some(Negsel::Pc4), + 165 => Some(Negsel::Pc5), + 166 => Some(Negsel::Pc6), + 167 => Some(Negsel::Pc7), + 168 => Some(Negsel::Pc8), + 169 => Some(Negsel::Pc9), + 170 => Some(Negsel::Pc10), + 171 => Some(Negsel::Pc11), + 172 => Some(Negsel::Pc12), + 173 => Some(Negsel::Pc13), + 174 => Some(Negsel::Pc14), + 175 => Some(Negsel::Pc15), + 176 => Some(Negsel::Pd0), + 177 => Some(Negsel::Pd1), + 178 => Some(Negsel::Pd2), + 179 => Some(Negsel::Pd3), + 180 => Some(Negsel::Pd4), + 181 => Some(Negsel::Pd5), + 182 => Some(Negsel::Pd6), + 183 => Some(Negsel::Pd7), + 184 => Some(Negsel::Pd8), + 185 => Some(Negsel::Pd9), + 186 => Some(Negsel::Pd10), + 187 => Some(Negsel::Pd11), + 188 => Some(Negsel::Pd12), + 189 => Some(Negsel::Pd13), + 190 => Some(Negsel::Pd14), + 191 => Some(Negsel::Pd15), _ => None, } } - #[doc = "Checks if the value of the field is `VSS`"] + #[doc = "VSS"] #[inline(always)] pub fn is_vss(&self) -> bool { - *self == NEGSEL_A::VSS + *self == Negsel::Vss } - #[doc = "Checks if the value of the field is `VREFDIVAVDD`"] + #[doc = "Divided AVDD"] #[inline(always)] pub fn is_vrefdivavdd(&self) -> bool { - *self == NEGSEL_A::VREFDIVAVDD + *self == Negsel::Vrefdivavdd } - #[doc = "Checks if the value of the field is `VREFDIVAVDDLP`"] + #[doc = "Low-Power Divided AVDD"] #[inline(always)] pub fn is_vrefdivavddlp(&self) -> bool { - *self == NEGSEL_A::VREFDIVAVDDLP + *self == Negsel::Vrefdivavddlp } - #[doc = "Checks if the value of the field is `VREFDIV1V25`"] + #[doc = "Divided 1V25 reference"] #[inline(always)] pub fn is_vrefdiv1v25(&self) -> bool { - *self == NEGSEL_A::VREFDIV1V25 + *self == Negsel::Vrefdiv1v25 } - #[doc = "Checks if the value of the field is `VREFDIV1V25LP`"] + #[doc = "Low-power Divided 1V25 reference"] #[inline(always)] pub fn is_vrefdiv1v25lp(&self) -> bool { - *self == NEGSEL_A::VREFDIV1V25LP + *self == Negsel::Vrefdiv1v25lp } - #[doc = "Checks if the value of the field is `VREFDIV2V5`"] + #[doc = "Divided 2V5 reference"] #[inline(always)] pub fn is_vrefdiv2v5(&self) -> bool { - *self == NEGSEL_A::VREFDIV2V5 + *self == Negsel::Vrefdiv2v5 } - #[doc = "Checks if the value of the field is `VREFDIV2V5LP`"] + #[doc = "Low-power Divided 2V5 reference"] #[inline(always)] pub fn is_vrefdiv2v5lp(&self) -> bool { - *self == NEGSEL_A::VREFDIV2V5LP + *self == Negsel::Vrefdiv2v5lp } - #[doc = "Checks if the value of the field is `VSENSE01DIV4`"] + #[doc = "VSENSE0 divided by 4"] #[inline(always)] pub fn is_vsense01div4(&self) -> bool { - *self == NEGSEL_A::VSENSE01DIV4 + *self == Negsel::Vsense01div4 } - #[doc = "Checks if the value of the field is `VSENSE01DIV4LP`"] + #[doc = "Low-power VSENSE0 divided by 4"] #[inline(always)] pub fn is_vsense01div4lp(&self) -> bool { - *self == NEGSEL_A::VSENSE01DIV4LP + *self == Negsel::Vsense01div4lp } - #[doc = "Checks if the value of the field is `VSENSE11DIV4`"] + #[doc = "VSENSE1 divided by 4"] #[inline(always)] pub fn is_vsense11div4(&self) -> bool { - *self == NEGSEL_A::VSENSE11DIV4 + *self == Negsel::Vsense11div4 } - #[doc = "Checks if the value of the field is `VSENSE11DIV4LP`"] + #[doc = "Low-power VSENSE1 divided by 4"] #[inline(always)] pub fn is_vsense11div4lp(&self) -> bool { - *self == NEGSEL_A::VSENSE11DIV4LP + *self == Negsel::Vsense11div4lp } - #[doc = "Checks if the value of the field is `CAPSENSE`"] + #[doc = "Deprecated capacitive sensing feature, not recommended for new designs"] #[inline(always)] pub fn is_capsense(&self) -> bool { - *self == NEGSEL_A::CAPSENSE + *self == Negsel::Capsense } - #[doc = "Checks if the value of the field is `VDACOUT0`"] + #[doc = "VDAC0 channel 0 output"] #[inline(always)] pub fn is_vdacout0(&self) -> bool { - *self == NEGSEL_A::VDACOUT0 + *self == Negsel::Vdacout0 } - #[doc = "Checks if the value of the field is `VDACOUT1`"] + #[doc = "VDAC0 channel 1 output"] #[inline(always)] pub fn is_vdacout1(&self) -> bool { - *self == NEGSEL_A::VDACOUT1 + *self == Negsel::Vdacout1 } - #[doc = "Checks if the value of the field is `PA0`"] + #[doc = "Port A, Pin0"] #[inline(always)] pub fn is_pa0(&self) -> bool { - *self == NEGSEL_A::PA0 + *self == Negsel::Pa0 } - #[doc = "Checks if the value of the field is `PA1`"] + #[doc = "Port A, Pin1"] #[inline(always)] pub fn is_pa1(&self) -> bool { - *self == NEGSEL_A::PA1 + *self == Negsel::Pa1 } - #[doc = "Checks if the value of the field is `PA2`"] + #[doc = "Port A, Pin2"] #[inline(always)] pub fn is_pa2(&self) -> bool { - *self == NEGSEL_A::PA2 + *self == Negsel::Pa2 } - #[doc = "Checks if the value of the field is `PA3`"] + #[doc = "Port A, Pin3"] #[inline(always)] pub fn is_pa3(&self) -> bool { - *self == NEGSEL_A::PA3 + *self == Negsel::Pa3 } - #[doc = "Checks if the value of the field is `PA4`"] + #[doc = "Port A, Pin4"] #[inline(always)] pub fn is_pa4(&self) -> bool { - *self == NEGSEL_A::PA4 + *self == Negsel::Pa4 } - #[doc = "Checks if the value of the field is `PA5`"] + #[doc = "Port A, Pin5"] #[inline(always)] pub fn is_pa5(&self) -> bool { - *self == NEGSEL_A::PA5 + *self == Negsel::Pa5 } - #[doc = "Checks if the value of the field is `PA6`"] + #[doc = "Port A, Pin6"] #[inline(always)] pub fn is_pa6(&self) -> bool { - *self == NEGSEL_A::PA6 + *self == Negsel::Pa6 } - #[doc = "Checks if the value of the field is `PA7`"] + #[doc = "Port A, Pin7"] #[inline(always)] pub fn is_pa7(&self) -> bool { - *self == NEGSEL_A::PA7 + *self == Negsel::Pa7 } - #[doc = "Checks if the value of the field is `PA8`"] + #[doc = "Port A, Pin8"] #[inline(always)] pub fn is_pa8(&self) -> bool { - *self == NEGSEL_A::PA8 + *self == Negsel::Pa8 } - #[doc = "Checks if the value of the field is `PA9`"] + #[doc = "Port A, Pin9"] #[inline(always)] pub fn is_pa9(&self) -> bool { - *self == NEGSEL_A::PA9 + *self == Negsel::Pa9 } - #[doc = "Checks if the value of the field is `PA10`"] + #[doc = "Port A, Pin10"] #[inline(always)] pub fn is_pa10(&self) -> bool { - *self == NEGSEL_A::PA10 + *self == Negsel::Pa10 } - #[doc = "Checks if the value of the field is `PA11`"] + #[doc = "Port A, Pin11"] #[inline(always)] pub fn is_pa11(&self) -> bool { - *self == NEGSEL_A::PA11 + *self == Negsel::Pa11 } - #[doc = "Checks if the value of the field is `PA12`"] + #[doc = "Port A, Pin12"] #[inline(always)] pub fn is_pa12(&self) -> bool { - *self == NEGSEL_A::PA12 + *self == Negsel::Pa12 } - #[doc = "Checks if the value of the field is `PA13`"] + #[doc = "Port A, Pin13"] #[inline(always)] pub fn is_pa13(&self) -> bool { - *self == NEGSEL_A::PA13 + *self == Negsel::Pa13 } - #[doc = "Checks if the value of the field is `PA14`"] + #[doc = "Port A, Pin14"] #[inline(always)] pub fn is_pa14(&self) -> bool { - *self == NEGSEL_A::PA14 + *self == Negsel::Pa14 } - #[doc = "Checks if the value of the field is `PA15`"] + #[doc = "Port A, Pin15"] #[inline(always)] pub fn is_pa15(&self) -> bool { - *self == NEGSEL_A::PA15 + *self == Negsel::Pa15 } - #[doc = "Checks if the value of the field is `PB0`"] + #[doc = "Port B, Pin0"] #[inline(always)] pub fn is_pb0(&self) -> bool { - *self == NEGSEL_A::PB0 + *self == Negsel::Pb0 } - #[doc = "Checks if the value of the field is `PB1`"] + #[doc = "Port B, Pin1"] #[inline(always)] pub fn is_pb1(&self) -> bool { - *self == NEGSEL_A::PB1 + *self == Negsel::Pb1 } - #[doc = "Checks if the value of the field is `PB2`"] + #[doc = "Port B, Pin2"] #[inline(always)] pub fn is_pb2(&self) -> bool { - *self == NEGSEL_A::PB2 + *self == Negsel::Pb2 } - #[doc = "Checks if the value of the field is `PB3`"] + #[doc = "Port B, Pin3"] #[inline(always)] pub fn is_pb3(&self) -> bool { - *self == NEGSEL_A::PB3 + *self == Negsel::Pb3 } - #[doc = "Checks if the value of the field is `PB4`"] + #[doc = "Port B, Pin4"] #[inline(always)] pub fn is_pb4(&self) -> bool { - *self == NEGSEL_A::PB4 + *self == Negsel::Pb4 } - #[doc = "Checks if the value of the field is `PB5`"] + #[doc = "Port B, Pin5"] #[inline(always)] pub fn is_pb5(&self) -> bool { - *self == NEGSEL_A::PB5 + *self == Negsel::Pb5 } - #[doc = "Checks if the value of the field is `PB6`"] + #[doc = "Port B, Pin6"] #[inline(always)] pub fn is_pb6(&self) -> bool { - *self == NEGSEL_A::PB6 + *self == Negsel::Pb6 } - #[doc = "Checks if the value of the field is `PB7`"] + #[doc = "Port B, Pin7"] #[inline(always)] pub fn is_pb7(&self) -> bool { - *self == NEGSEL_A::PB7 + *self == Negsel::Pb7 } - #[doc = "Checks if the value of the field is `PB8`"] + #[doc = "Port B, Pin8"] #[inline(always)] pub fn is_pb8(&self) -> bool { - *self == NEGSEL_A::PB8 + *self == Negsel::Pb8 } - #[doc = "Checks if the value of the field is `PB9`"] + #[doc = "Port B, Pin9"] #[inline(always)] pub fn is_pb9(&self) -> bool { - *self == NEGSEL_A::PB9 + *self == Negsel::Pb9 } - #[doc = "Checks if the value of the field is `PB10`"] + #[doc = "Port B, Pin10"] #[inline(always)] pub fn is_pb10(&self) -> bool { - *self == NEGSEL_A::PB10 + *self == Negsel::Pb10 } - #[doc = "Checks if the value of the field is `PB11`"] + #[doc = "Port B, Pin11"] #[inline(always)] pub fn is_pb11(&self) -> bool { - *self == NEGSEL_A::PB11 + *self == Negsel::Pb11 } - #[doc = "Checks if the value of the field is `PB12`"] + #[doc = "Port B, Pin12"] #[inline(always)] pub fn is_pb12(&self) -> bool { - *self == NEGSEL_A::PB12 + *self == Negsel::Pb12 } - #[doc = "Checks if the value of the field is `PB13`"] + #[doc = "Port B, Pin13"] #[inline(always)] pub fn is_pb13(&self) -> bool { - *self == NEGSEL_A::PB13 + *self == Negsel::Pb13 } - #[doc = "Checks if the value of the field is `PB14`"] + #[doc = "Port B, Pin14"] #[inline(always)] pub fn is_pb14(&self) -> bool { - *self == NEGSEL_A::PB14 + *self == Negsel::Pb14 } - #[doc = "Checks if the value of the field is `PB15`"] + #[doc = "Port B, Pin15"] #[inline(always)] pub fn is_pb15(&self) -> bool { - *self == NEGSEL_A::PB15 + *self == Negsel::Pb15 } - #[doc = "Checks if the value of the field is `PC0`"] + #[doc = "Port C, Pin0"] #[inline(always)] pub fn is_pc0(&self) -> bool { - *self == NEGSEL_A::PC0 + *self == Negsel::Pc0 } - #[doc = "Checks if the value of the field is `PC1`"] + #[doc = "Port C, Pin1"] #[inline(always)] pub fn is_pc1(&self) -> bool { - *self == NEGSEL_A::PC1 + *self == Negsel::Pc1 } - #[doc = "Checks if the value of the field is `PC2`"] + #[doc = "Port C, Pin2"] #[inline(always)] pub fn is_pc2(&self) -> bool { - *self == NEGSEL_A::PC2 + *self == Negsel::Pc2 } - #[doc = "Checks if the value of the field is `PC3`"] + #[doc = "Port C, Pin3"] #[inline(always)] pub fn is_pc3(&self) -> bool { - *self == NEGSEL_A::PC3 + *self == Negsel::Pc3 } - #[doc = "Checks if the value of the field is `PC4`"] + #[doc = "Port C, Pin4"] #[inline(always)] pub fn is_pc4(&self) -> bool { - *self == NEGSEL_A::PC4 + *self == Negsel::Pc4 } - #[doc = "Checks if the value of the field is `PC5`"] + #[doc = "Port C, Pin5"] #[inline(always)] pub fn is_pc5(&self) -> bool { - *self == NEGSEL_A::PC5 + *self == Negsel::Pc5 } - #[doc = "Checks if the value of the field is `PC6`"] + #[doc = "Port C, Pin6"] #[inline(always)] pub fn is_pc6(&self) -> bool { - *self == NEGSEL_A::PC6 + *self == Negsel::Pc6 } - #[doc = "Checks if the value of the field is `PC7`"] + #[doc = "Port C, Pin7"] #[inline(always)] pub fn is_pc7(&self) -> bool { - *self == NEGSEL_A::PC7 + *self == Negsel::Pc7 } - #[doc = "Checks if the value of the field is `PC8`"] + #[doc = "Port C, Pin8"] #[inline(always)] pub fn is_pc8(&self) -> bool { - *self == NEGSEL_A::PC8 + *self == Negsel::Pc8 } - #[doc = "Checks if the value of the field is `PC9`"] + #[doc = "Port C, Pin9"] #[inline(always)] pub fn is_pc9(&self) -> bool { - *self == NEGSEL_A::PC9 + *self == Negsel::Pc9 } - #[doc = "Checks if the value of the field is `PC10`"] + #[doc = "Port C, Pin10"] #[inline(always)] pub fn is_pc10(&self) -> bool { - *self == NEGSEL_A::PC10 + *self == Negsel::Pc10 } - #[doc = "Checks if the value of the field is `PC11`"] + #[doc = "Port C, Pin11"] #[inline(always)] pub fn is_pc11(&self) -> bool { - *self == NEGSEL_A::PC11 + *self == Negsel::Pc11 } - #[doc = "Checks if the value of the field is `PC12`"] + #[doc = "Port C, Pin12"] #[inline(always)] pub fn is_pc12(&self) -> bool { - *self == NEGSEL_A::PC12 + *self == Negsel::Pc12 } - #[doc = "Checks if the value of the field is `PC13`"] + #[doc = "Port C, Pin13"] #[inline(always)] pub fn is_pc13(&self) -> bool { - *self == NEGSEL_A::PC13 + *self == Negsel::Pc13 } - #[doc = "Checks if the value of the field is `PC14`"] + #[doc = "Port C, Pin14"] #[inline(always)] pub fn is_pc14(&self) -> bool { - *self == NEGSEL_A::PC14 + *self == Negsel::Pc14 } - #[doc = "Checks if the value of the field is `PC15`"] + #[doc = "Port C, Pin15"] #[inline(always)] pub fn is_pc15(&self) -> bool { - *self == NEGSEL_A::PC15 + *self == Negsel::Pc15 } - #[doc = "Checks if the value of the field is `PD0`"] + #[doc = "Port D, Pin0"] #[inline(always)] pub fn is_pd0(&self) -> bool { - *self == NEGSEL_A::PD0 + *self == Negsel::Pd0 } - #[doc = "Checks if the value of the field is `PD1`"] + #[doc = "Port D, Pin1"] #[inline(always)] pub fn is_pd1(&self) -> bool { - *self == NEGSEL_A::PD1 + *self == Negsel::Pd1 } - #[doc = "Checks if the value of the field is `PD2`"] + #[doc = "Port D, Pin2"] #[inline(always)] pub fn is_pd2(&self) -> bool { - *self == NEGSEL_A::PD2 + *self == Negsel::Pd2 } - #[doc = "Checks if the value of the field is `PD3`"] + #[doc = "Port D, Pin3"] #[inline(always)] pub fn is_pd3(&self) -> bool { - *self == NEGSEL_A::PD3 + *self == Negsel::Pd3 } - #[doc = "Checks if the value of the field is `PD4`"] + #[doc = "Port D, Pin4"] #[inline(always)] pub fn is_pd4(&self) -> bool { - *self == NEGSEL_A::PD4 + *self == Negsel::Pd4 } - #[doc = "Checks if the value of the field is `PD5`"] + #[doc = "Port D, Pin5"] #[inline(always)] pub fn is_pd5(&self) -> bool { - *self == NEGSEL_A::PD5 + *self == Negsel::Pd5 } - #[doc = "Checks if the value of the field is `PD6`"] + #[doc = "Port D, Pin6"] #[inline(always)] pub fn is_pd6(&self) -> bool { - *self == NEGSEL_A::PD6 + *self == Negsel::Pd6 } - #[doc = "Checks if the value of the field is `PD7`"] + #[doc = "Port D, Pin7"] #[inline(always)] pub fn is_pd7(&self) -> bool { - *self == NEGSEL_A::PD7 + *self == Negsel::Pd7 } - #[doc = "Checks if the value of the field is `PD8`"] + #[doc = "Port D, Pin8"] #[inline(always)] pub fn is_pd8(&self) -> bool { - *self == NEGSEL_A::PD8 + *self == Negsel::Pd8 } - #[doc = "Checks if the value of the field is `PD9`"] + #[doc = "Port D, Pin9"] #[inline(always)] pub fn is_pd9(&self) -> bool { - *self == NEGSEL_A::PD9 + *self == Negsel::Pd9 } - #[doc = "Checks if the value of the field is `PD10`"] + #[doc = "Port D, Pin10"] #[inline(always)] pub fn is_pd10(&self) -> bool { - *self == NEGSEL_A::PD10 + *self == Negsel::Pd10 } - #[doc = "Checks if the value of the field is `PD11`"] + #[doc = "Port D, Pin11"] #[inline(always)] pub fn is_pd11(&self) -> bool { - *self == NEGSEL_A::PD11 + *self == Negsel::Pd11 } - #[doc = "Checks if the value of the field is `PD12`"] + #[doc = "Port D, Pin12"] #[inline(always)] pub fn is_pd12(&self) -> bool { - *self == NEGSEL_A::PD12 + *self == Negsel::Pd12 } - #[doc = "Checks if the value of the field is `PD13`"] + #[doc = "Port D, Pin13"] #[inline(always)] pub fn is_pd13(&self) -> bool { - *self == NEGSEL_A::PD13 + *self == Negsel::Pd13 } - #[doc = "Checks if the value of the field is `PD14`"] + #[doc = "Port D, Pin14"] #[inline(always)] pub fn is_pd14(&self) -> bool { - *self == NEGSEL_A::PD14 + *self == Negsel::Pd14 } - #[doc = "Checks if the value of the field is `PD15`"] + #[doc = "Port D, Pin15"] #[inline(always)] pub fn is_pd15(&self) -> bool { - *self == NEGSEL_A::PD15 + *self == Negsel::Pd15 } } #[doc = "Field `NEGSEL` writer - Negative Input Select"] -pub type NEGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, INPUTCTRL_SPEC, u8, NEGSEL_A, 8, O>; -impl<'a, const O: u8> NEGSEL_W<'a, O> { +pub type NegselW<'a, REG> = crate::FieldWriter<'a, REG, 8, Negsel>; +impl<'a, REG> NegselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "VSS"] #[inline(always)] - pub fn vss(self) -> &'a mut W { - self.variant(NEGSEL_A::VSS) + pub fn vss(self) -> &'a mut crate::W { + self.variant(Negsel::Vss) } #[doc = "Divided AVDD"] #[inline(always)] - pub fn vrefdivavdd(self) -> &'a mut W { - self.variant(NEGSEL_A::VREFDIVAVDD) + pub fn vrefdivavdd(self) -> &'a mut crate::W { + self.variant(Negsel::Vrefdivavdd) } #[doc = "Low-Power Divided AVDD"] #[inline(always)] - pub fn vrefdivavddlp(self) -> &'a mut W { - self.variant(NEGSEL_A::VREFDIVAVDDLP) + pub fn vrefdivavddlp(self) -> &'a mut crate::W { + self.variant(Negsel::Vrefdivavddlp) } #[doc = "Divided 1V25 reference"] #[inline(always)] - pub fn vrefdiv1v25(self) -> &'a mut W { - self.variant(NEGSEL_A::VREFDIV1V25) + pub fn vrefdiv1v25(self) -> &'a mut crate::W { + self.variant(Negsel::Vrefdiv1v25) } #[doc = "Low-power Divided 1V25 reference"] #[inline(always)] - pub fn vrefdiv1v25lp(self) -> &'a mut W { - self.variant(NEGSEL_A::VREFDIV1V25LP) + pub fn vrefdiv1v25lp(self) -> &'a mut crate::W { + self.variant(Negsel::Vrefdiv1v25lp) } #[doc = "Divided 2V5 reference"] #[inline(always)] - pub fn vrefdiv2v5(self) -> &'a mut W { - self.variant(NEGSEL_A::VREFDIV2V5) + pub fn vrefdiv2v5(self) -> &'a mut crate::W { + self.variant(Negsel::Vrefdiv2v5) } #[doc = "Low-power Divided 2V5 reference"] #[inline(always)] - pub fn vrefdiv2v5lp(self) -> &'a mut W { - self.variant(NEGSEL_A::VREFDIV2V5LP) + pub fn vrefdiv2v5lp(self) -> &'a mut crate::W { + self.variant(Negsel::Vrefdiv2v5lp) } #[doc = "VSENSE0 divided by 4"] #[inline(always)] - pub fn vsense01div4(self) -> &'a mut W { - self.variant(NEGSEL_A::VSENSE01DIV4) + pub fn vsense01div4(self) -> &'a mut crate::W { + self.variant(Negsel::Vsense01div4) } #[doc = "Low-power VSENSE0 divided by 4"] #[inline(always)] - pub fn vsense01div4lp(self) -> &'a mut W { - self.variant(NEGSEL_A::VSENSE01DIV4LP) + pub fn vsense01div4lp(self) -> &'a mut crate::W { + self.variant(Negsel::Vsense01div4lp) } #[doc = "VSENSE1 divided by 4"] #[inline(always)] - pub fn vsense11div4(self) -> &'a mut W { - self.variant(NEGSEL_A::VSENSE11DIV4) + pub fn vsense11div4(self) -> &'a mut crate::W { + self.variant(Negsel::Vsense11div4) } #[doc = "Low-power VSENSE1 divided by 4"] #[inline(always)] - pub fn vsense11div4lp(self) -> &'a mut W { - self.variant(NEGSEL_A::VSENSE11DIV4LP) + pub fn vsense11div4lp(self) -> &'a mut crate::W { + self.variant(Negsel::Vsense11div4lp) } - #[doc = "Capsense mode"] + #[doc = "Deprecated capacitive sensing feature, not recommended for new designs"] #[inline(always)] - pub fn capsense(self) -> &'a mut W { - self.variant(NEGSEL_A::CAPSENSE) + pub fn capsense(self) -> &'a mut crate::W { + self.variant(Negsel::Capsense) } #[doc = "VDAC0 channel 0 output"] #[inline(always)] - pub fn vdacout0(self) -> &'a mut W { - self.variant(NEGSEL_A::VDACOUT0) + pub fn vdacout0(self) -> &'a mut crate::W { + self.variant(Negsel::Vdacout0) } #[doc = "VDAC0 channel 1 output"] #[inline(always)] - pub fn vdacout1(self) -> &'a mut W { - self.variant(NEGSEL_A::VDACOUT1) + pub fn vdacout1(self) -> &'a mut crate::W { + self.variant(Negsel::Vdacout1) } #[doc = "Port A, Pin0"] #[inline(always)] - pub fn pa0(self) -> &'a mut W { - self.variant(NEGSEL_A::PA0) + pub fn pa0(self) -> &'a mut crate::W { + self.variant(Negsel::Pa0) } #[doc = "Port A, Pin1"] #[inline(always)] - pub fn pa1(self) -> &'a mut W { - self.variant(NEGSEL_A::PA1) + pub fn pa1(self) -> &'a mut crate::W { + self.variant(Negsel::Pa1) } #[doc = "Port A, Pin2"] #[inline(always)] - pub fn pa2(self) -> &'a mut W { - self.variant(NEGSEL_A::PA2) + pub fn pa2(self) -> &'a mut crate::W { + self.variant(Negsel::Pa2) } #[doc = "Port A, Pin3"] #[inline(always)] - pub fn pa3(self) -> &'a mut W { - self.variant(NEGSEL_A::PA3) + pub fn pa3(self) -> &'a mut crate::W { + self.variant(Negsel::Pa3) } #[doc = "Port A, Pin4"] #[inline(always)] - pub fn pa4(self) -> &'a mut W { - self.variant(NEGSEL_A::PA4) + pub fn pa4(self) -> &'a mut crate::W { + self.variant(Negsel::Pa4) } #[doc = "Port A, Pin5"] #[inline(always)] - pub fn pa5(self) -> &'a mut W { - self.variant(NEGSEL_A::PA5) + pub fn pa5(self) -> &'a mut crate::W { + self.variant(Negsel::Pa5) } #[doc = "Port A, Pin6"] #[inline(always)] - pub fn pa6(self) -> &'a mut W { - self.variant(NEGSEL_A::PA6) + pub fn pa6(self) -> &'a mut crate::W { + self.variant(Negsel::Pa6) } #[doc = "Port A, Pin7"] #[inline(always)] - pub fn pa7(self) -> &'a mut W { - self.variant(NEGSEL_A::PA7) + pub fn pa7(self) -> &'a mut crate::W { + self.variant(Negsel::Pa7) } #[doc = "Port A, Pin8"] #[inline(always)] - pub fn pa8(self) -> &'a mut W { - self.variant(NEGSEL_A::PA8) + pub fn pa8(self) -> &'a mut crate::W { + self.variant(Negsel::Pa8) } #[doc = "Port A, Pin9"] #[inline(always)] - pub fn pa9(self) -> &'a mut W { - self.variant(NEGSEL_A::PA9) + pub fn pa9(self) -> &'a mut crate::W { + self.variant(Negsel::Pa9) } #[doc = "Port A, Pin10"] #[inline(always)] - pub fn pa10(self) -> &'a mut W { - self.variant(NEGSEL_A::PA10) + pub fn pa10(self) -> &'a mut crate::W { + self.variant(Negsel::Pa10) } #[doc = "Port A, Pin11"] #[inline(always)] - pub fn pa11(self) -> &'a mut W { - self.variant(NEGSEL_A::PA11) + pub fn pa11(self) -> &'a mut crate::W { + self.variant(Negsel::Pa11) } #[doc = "Port A, Pin12"] #[inline(always)] - pub fn pa12(self) -> &'a mut W { - self.variant(NEGSEL_A::PA12) + pub fn pa12(self) -> &'a mut crate::W { + self.variant(Negsel::Pa12) } #[doc = "Port A, Pin13"] #[inline(always)] - pub fn pa13(self) -> &'a mut W { - self.variant(NEGSEL_A::PA13) + pub fn pa13(self) -> &'a mut crate::W { + self.variant(Negsel::Pa13) } #[doc = "Port A, Pin14"] #[inline(always)] - pub fn pa14(self) -> &'a mut W { - self.variant(NEGSEL_A::PA14) + pub fn pa14(self) -> &'a mut crate::W { + self.variant(Negsel::Pa14) } #[doc = "Port A, Pin15"] #[inline(always)] - pub fn pa15(self) -> &'a mut W { - self.variant(NEGSEL_A::PA15) + pub fn pa15(self) -> &'a mut crate::W { + self.variant(Negsel::Pa15) } #[doc = "Port B, Pin0"] #[inline(always)] - pub fn pb0(self) -> &'a mut W { - self.variant(NEGSEL_A::PB0) + pub fn pb0(self) -> &'a mut crate::W { + self.variant(Negsel::Pb0) } #[doc = "Port B, Pin1"] #[inline(always)] - pub fn pb1(self) -> &'a mut W { - self.variant(NEGSEL_A::PB1) + pub fn pb1(self) -> &'a mut crate::W { + self.variant(Negsel::Pb1) } #[doc = "Port B, Pin2"] #[inline(always)] - pub fn pb2(self) -> &'a mut W { - self.variant(NEGSEL_A::PB2) + pub fn pb2(self) -> &'a mut crate::W { + self.variant(Negsel::Pb2) } #[doc = "Port B, Pin3"] #[inline(always)] - pub fn pb3(self) -> &'a mut W { - self.variant(NEGSEL_A::PB3) + pub fn pb3(self) -> &'a mut crate::W { + self.variant(Negsel::Pb3) } #[doc = "Port B, Pin4"] #[inline(always)] - pub fn pb4(self) -> &'a mut W { - self.variant(NEGSEL_A::PB4) + pub fn pb4(self) -> &'a mut crate::W { + self.variant(Negsel::Pb4) } #[doc = "Port B, Pin5"] #[inline(always)] - pub fn pb5(self) -> &'a mut W { - self.variant(NEGSEL_A::PB5) + pub fn pb5(self) -> &'a mut crate::W { + self.variant(Negsel::Pb5) } #[doc = "Port B, Pin6"] #[inline(always)] - pub fn pb6(self) -> &'a mut W { - self.variant(NEGSEL_A::PB6) + pub fn pb6(self) -> &'a mut crate::W { + self.variant(Negsel::Pb6) } #[doc = "Port B, Pin7"] #[inline(always)] - pub fn pb7(self) -> &'a mut W { - self.variant(NEGSEL_A::PB7) + pub fn pb7(self) -> &'a mut crate::W { + self.variant(Negsel::Pb7) } #[doc = "Port B, Pin8"] #[inline(always)] - pub fn pb8(self) -> &'a mut W { - self.variant(NEGSEL_A::PB8) + pub fn pb8(self) -> &'a mut crate::W { + self.variant(Negsel::Pb8) } #[doc = "Port B, Pin9"] #[inline(always)] - pub fn pb9(self) -> &'a mut W { - self.variant(NEGSEL_A::PB9) + pub fn pb9(self) -> &'a mut crate::W { + self.variant(Negsel::Pb9) } #[doc = "Port B, Pin10"] #[inline(always)] - pub fn pb10(self) -> &'a mut W { - self.variant(NEGSEL_A::PB10) + pub fn pb10(self) -> &'a mut crate::W { + self.variant(Negsel::Pb10) } #[doc = "Port B, Pin11"] #[inline(always)] - pub fn pb11(self) -> &'a mut W { - self.variant(NEGSEL_A::PB11) + pub fn pb11(self) -> &'a mut crate::W { + self.variant(Negsel::Pb11) } #[doc = "Port B, Pin12"] #[inline(always)] - pub fn pb12(self) -> &'a mut W { - self.variant(NEGSEL_A::PB12) + pub fn pb12(self) -> &'a mut crate::W { + self.variant(Negsel::Pb12) } #[doc = "Port B, Pin13"] #[inline(always)] - pub fn pb13(self) -> &'a mut W { - self.variant(NEGSEL_A::PB13) + pub fn pb13(self) -> &'a mut crate::W { + self.variant(Negsel::Pb13) } #[doc = "Port B, Pin14"] #[inline(always)] - pub fn pb14(self) -> &'a mut W { - self.variant(NEGSEL_A::PB14) + pub fn pb14(self) -> &'a mut crate::W { + self.variant(Negsel::Pb14) } #[doc = "Port B, Pin15"] #[inline(always)] - pub fn pb15(self) -> &'a mut W { - self.variant(NEGSEL_A::PB15) + pub fn pb15(self) -> &'a mut crate::W { + self.variant(Negsel::Pb15) } #[doc = "Port C, Pin0"] #[inline(always)] - pub fn pc0(self) -> &'a mut W { - self.variant(NEGSEL_A::PC0) + pub fn pc0(self) -> &'a mut crate::W { + self.variant(Negsel::Pc0) } #[doc = "Port C, Pin1"] #[inline(always)] - pub fn pc1(self) -> &'a mut W { - self.variant(NEGSEL_A::PC1) + pub fn pc1(self) -> &'a mut crate::W { + self.variant(Negsel::Pc1) } #[doc = "Port C, Pin2"] #[inline(always)] - pub fn pc2(self) -> &'a mut W { - self.variant(NEGSEL_A::PC2) + pub fn pc2(self) -> &'a mut crate::W { + self.variant(Negsel::Pc2) } #[doc = "Port C, Pin3"] #[inline(always)] - pub fn pc3(self) -> &'a mut W { - self.variant(NEGSEL_A::PC3) + pub fn pc3(self) -> &'a mut crate::W { + self.variant(Negsel::Pc3) } #[doc = "Port C, Pin4"] #[inline(always)] - pub fn pc4(self) -> &'a mut W { - self.variant(NEGSEL_A::PC4) + pub fn pc4(self) -> &'a mut crate::W { + self.variant(Negsel::Pc4) } #[doc = "Port C, Pin5"] #[inline(always)] - pub fn pc5(self) -> &'a mut W { - self.variant(NEGSEL_A::PC5) + pub fn pc5(self) -> &'a mut crate::W { + self.variant(Negsel::Pc5) } #[doc = "Port C, Pin6"] #[inline(always)] - pub fn pc6(self) -> &'a mut W { - self.variant(NEGSEL_A::PC6) + pub fn pc6(self) -> &'a mut crate::W { + self.variant(Negsel::Pc6) } #[doc = "Port C, Pin7"] #[inline(always)] - pub fn pc7(self) -> &'a mut W { - self.variant(NEGSEL_A::PC7) + pub fn pc7(self) -> &'a mut crate::W { + self.variant(Negsel::Pc7) } #[doc = "Port C, Pin8"] #[inline(always)] - pub fn pc8(self) -> &'a mut W { - self.variant(NEGSEL_A::PC8) + pub fn pc8(self) -> &'a mut crate::W { + self.variant(Negsel::Pc8) } #[doc = "Port C, Pin9"] #[inline(always)] - pub fn pc9(self) -> &'a mut W { - self.variant(NEGSEL_A::PC9) + pub fn pc9(self) -> &'a mut crate::W { + self.variant(Negsel::Pc9) } #[doc = "Port C, Pin10"] #[inline(always)] - pub fn pc10(self) -> &'a mut W { - self.variant(NEGSEL_A::PC10) + pub fn pc10(self) -> &'a mut crate::W { + self.variant(Negsel::Pc10) } #[doc = "Port C, Pin11"] #[inline(always)] - pub fn pc11(self) -> &'a mut W { - self.variant(NEGSEL_A::PC11) + pub fn pc11(self) -> &'a mut crate::W { + self.variant(Negsel::Pc11) } #[doc = "Port C, Pin12"] #[inline(always)] - pub fn pc12(self) -> &'a mut W { - self.variant(NEGSEL_A::PC12) + pub fn pc12(self) -> &'a mut crate::W { + self.variant(Negsel::Pc12) } #[doc = "Port C, Pin13"] #[inline(always)] - pub fn pc13(self) -> &'a mut W { - self.variant(NEGSEL_A::PC13) + pub fn pc13(self) -> &'a mut crate::W { + self.variant(Negsel::Pc13) } #[doc = "Port C, Pin14"] #[inline(always)] - pub fn pc14(self) -> &'a mut W { - self.variant(NEGSEL_A::PC14) + pub fn pc14(self) -> &'a mut crate::W { + self.variant(Negsel::Pc14) } #[doc = "Port C, Pin15"] #[inline(always)] - pub fn pc15(self) -> &'a mut W { - self.variant(NEGSEL_A::PC15) + pub fn pc15(self) -> &'a mut crate::W { + self.variant(Negsel::Pc15) } #[doc = "Port D, Pin0"] #[inline(always)] - pub fn pd0(self) -> &'a mut W { - self.variant(NEGSEL_A::PD0) + pub fn pd0(self) -> &'a mut crate::W { + self.variant(Negsel::Pd0) } #[doc = "Port D, Pin1"] #[inline(always)] - pub fn pd1(self) -> &'a mut W { - self.variant(NEGSEL_A::PD1) + pub fn pd1(self) -> &'a mut crate::W { + self.variant(Negsel::Pd1) } #[doc = "Port D, Pin2"] #[inline(always)] - pub fn pd2(self) -> &'a mut W { - self.variant(NEGSEL_A::PD2) + pub fn pd2(self) -> &'a mut crate::W { + self.variant(Negsel::Pd2) } #[doc = "Port D, Pin3"] #[inline(always)] - pub fn pd3(self) -> &'a mut W { - self.variant(NEGSEL_A::PD3) + pub fn pd3(self) -> &'a mut crate::W { + self.variant(Negsel::Pd3) } #[doc = "Port D, Pin4"] #[inline(always)] - pub fn pd4(self) -> &'a mut W { - self.variant(NEGSEL_A::PD4) + pub fn pd4(self) -> &'a mut crate::W { + self.variant(Negsel::Pd4) } #[doc = "Port D, Pin5"] #[inline(always)] - pub fn pd5(self) -> &'a mut W { - self.variant(NEGSEL_A::PD5) + pub fn pd5(self) -> &'a mut crate::W { + self.variant(Negsel::Pd5) } #[doc = "Port D, Pin6"] #[inline(always)] - pub fn pd6(self) -> &'a mut W { - self.variant(NEGSEL_A::PD6) + pub fn pd6(self) -> &'a mut crate::W { + self.variant(Negsel::Pd6) } #[doc = "Port D, Pin7"] #[inline(always)] - pub fn pd7(self) -> &'a mut W { - self.variant(NEGSEL_A::PD7) + pub fn pd7(self) -> &'a mut crate::W { + self.variant(Negsel::Pd7) } #[doc = "Port D, Pin8"] #[inline(always)] - pub fn pd8(self) -> &'a mut W { - self.variant(NEGSEL_A::PD8) + pub fn pd8(self) -> &'a mut crate::W { + self.variant(Negsel::Pd8) } #[doc = "Port D, Pin9"] #[inline(always)] - pub fn pd9(self) -> &'a mut W { - self.variant(NEGSEL_A::PD9) + pub fn pd9(self) -> &'a mut crate::W { + self.variant(Negsel::Pd9) } #[doc = "Port D, Pin10"] #[inline(always)] - pub fn pd10(self) -> &'a mut W { - self.variant(NEGSEL_A::PD10) + pub fn pd10(self) -> &'a mut crate::W { + self.variant(Negsel::Pd10) } #[doc = "Port D, Pin11"] #[inline(always)] - pub fn pd11(self) -> &'a mut W { - self.variant(NEGSEL_A::PD11) + pub fn pd11(self) -> &'a mut crate::W { + self.variant(Negsel::Pd11) } #[doc = "Port D, Pin12"] #[inline(always)] - pub fn pd12(self) -> &'a mut W { - self.variant(NEGSEL_A::PD12) + pub fn pd12(self) -> &'a mut crate::W { + self.variant(Negsel::Pd12) } #[doc = "Port D, Pin13"] #[inline(always)] - pub fn pd13(self) -> &'a mut W { - self.variant(NEGSEL_A::PD13) + pub fn pd13(self) -> &'a mut crate::W { + self.variant(Negsel::Pd13) } #[doc = "Port D, Pin14"] #[inline(always)] - pub fn pd14(self) -> &'a mut W { - self.variant(NEGSEL_A::PD14) + pub fn pd14(self) -> &'a mut crate::W { + self.variant(Negsel::Pd14) } #[doc = "Port D, Pin15"] #[inline(always)] - pub fn pd15(self) -> &'a mut W { - self.variant(NEGSEL_A::PD15) + pub fn pd15(self) -> &'a mut crate::W { + self.variant(Negsel::Pd15) } } #[doc = "Field `VREFDIV` reader - VREF division"] -pub type VREFDIV_R = crate::FieldReader; +pub type VrefdivR = crate::FieldReader; #[doc = "Field `VREFDIV` writer - VREF division"] -pub type VREFDIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, INPUTCTRL_SPEC, u8, u8, 6, O>; -#[doc = "Field `CSRESSEL` reader - Capacitive Sense Mode Internal Resistor"] -pub type CSRESSEL_R = crate::FieldReader; +pub type VrefdivW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Capacitive Sense Mode Internal Resistor\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CSRESSEL_A { +pub enum Csressel { #[doc = "0: Internal capacitive sense resistor value 0"] - RES0 = 0, + Res0 = 0, #[doc = "1: Internal capacitive sense resistor value 1"] - RES1 = 1, + Res1 = 1, #[doc = "2: Internal capacitive sense resistor value 2"] - RES2 = 2, + Res2 = 2, #[doc = "3: Internal capacitive sense resistor value 3"] - RES3 = 3, + Res3 = 3, #[doc = "4: Internal capacitive sense resistor value 4"] - RES4 = 4, + Res4 = 4, #[doc = "5: Internal capacitive sense resistor value 5"] - RES5 = 5, + Res5 = 5, #[doc = "6: Internal capacitive sense resistor value 6"] - RES6 = 6, + Res6 = 6, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CSRESSEL_A) -> Self { + fn from(variant: Csressel) -> Self { variant as _ } } -impl CSRESSEL_R { +impl crate::FieldSpec for Csressel { + type Ux = u8; +} +impl crate::IsEnum for Csressel {} +#[doc = "Field `CSRESSEL` reader - Capacitive Sense Mode Internal Resistor"] +pub type CsresselR = crate::FieldReader; +impl CsresselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CSRESSEL_A::RES0), - 1 => Some(CSRESSEL_A::RES1), - 2 => Some(CSRESSEL_A::RES2), - 3 => Some(CSRESSEL_A::RES3), - 4 => Some(CSRESSEL_A::RES4), - 5 => Some(CSRESSEL_A::RES5), - 6 => Some(CSRESSEL_A::RES6), + 0 => Some(Csressel::Res0), + 1 => Some(Csressel::Res1), + 2 => Some(Csressel::Res2), + 3 => Some(Csressel::Res3), + 4 => Some(Csressel::Res4), + 5 => Some(Csressel::Res5), + 6 => Some(Csressel::Res6), _ => None, } } - #[doc = "Checks if the value of the field is `RES0`"] + #[doc = "Internal capacitive sense resistor value 0"] #[inline(always)] pub fn is_res0(&self) -> bool { - *self == CSRESSEL_A::RES0 + *self == Csressel::Res0 } - #[doc = "Checks if the value of the field is `RES1`"] + #[doc = "Internal capacitive sense resistor value 1"] #[inline(always)] pub fn is_res1(&self) -> bool { - *self == CSRESSEL_A::RES1 + *self == Csressel::Res1 } - #[doc = "Checks if the value of the field is `RES2`"] + #[doc = "Internal capacitive sense resistor value 2"] #[inline(always)] pub fn is_res2(&self) -> bool { - *self == CSRESSEL_A::RES2 + *self == Csressel::Res2 } - #[doc = "Checks if the value of the field is `RES3`"] + #[doc = "Internal capacitive sense resistor value 3"] #[inline(always)] pub fn is_res3(&self) -> bool { - *self == CSRESSEL_A::RES3 + *self == Csressel::Res3 } - #[doc = "Checks if the value of the field is `RES4`"] + #[doc = "Internal capacitive sense resistor value 4"] #[inline(always)] pub fn is_res4(&self) -> bool { - *self == CSRESSEL_A::RES4 + *self == Csressel::Res4 } - #[doc = "Checks if the value of the field is `RES5`"] + #[doc = "Internal capacitive sense resistor value 5"] #[inline(always)] pub fn is_res5(&self) -> bool { - *self == CSRESSEL_A::RES5 + *self == Csressel::Res5 } - #[doc = "Checks if the value of the field is `RES6`"] + #[doc = "Internal capacitive sense resistor value 6"] #[inline(always)] pub fn is_res6(&self) -> bool { - *self == CSRESSEL_A::RES6 + *self == Csressel::Res6 } } #[doc = "Field `CSRESSEL` writer - Capacitive Sense Mode Internal Resistor"] -pub type CSRESSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, INPUTCTRL_SPEC, u8, CSRESSEL_A, 3, O>; -impl<'a, const O: u8> CSRESSEL_W<'a, O> { +pub type CsresselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Csressel>; +impl<'a, REG> CsresselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Internal capacitive sense resistor value 0"] #[inline(always)] - pub fn res0(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES0) + pub fn res0(self) -> &'a mut crate::W { + self.variant(Csressel::Res0) } #[doc = "Internal capacitive sense resistor value 1"] #[inline(always)] - pub fn res1(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES1) + pub fn res1(self) -> &'a mut crate::W { + self.variant(Csressel::Res1) } #[doc = "Internal capacitive sense resistor value 2"] #[inline(always)] - pub fn res2(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES2) + pub fn res2(self) -> &'a mut crate::W { + self.variant(Csressel::Res2) } #[doc = "Internal capacitive sense resistor value 3"] #[inline(always)] - pub fn res3(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES3) + pub fn res3(self) -> &'a mut crate::W { + self.variant(Csressel::Res3) } #[doc = "Internal capacitive sense resistor value 4"] #[inline(always)] - pub fn res4(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES4) + pub fn res4(self) -> &'a mut crate::W { + self.variant(Csressel::Res4) } #[doc = "Internal capacitive sense resistor value 5"] #[inline(always)] - pub fn res5(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES5) + pub fn res5(self) -> &'a mut crate::W { + self.variant(Csressel::Res5) } #[doc = "Internal capacitive sense resistor value 6"] #[inline(always)] - pub fn res6(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES6) + pub fn res6(self) -> &'a mut crate::W { + self.variant(Csressel::Res6) } } impl R { #[doc = "Bits 0:7 - Positive Input Select"] #[inline(always)] - pub fn possel(&self) -> POSSEL_R { - POSSEL_R::new((self.bits & 0xff) as u8) + pub fn possel(&self) -> PosselR { + PosselR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Negative Input Select"] #[inline(always)] - pub fn negsel(&self) -> NEGSEL_R { - NEGSEL_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn negsel(&self) -> NegselR { + NegselR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:21 - VREF division"] #[inline(always)] - pub fn vrefdiv(&self) -> VREFDIV_R { - VREFDIV_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn vrefdiv(&self) -> VrefdivR { + VrefdivR::new(((self.bits >> 16) & 0x3f) as u8) } #[doc = "Bits 28:30 - Capacitive Sense Mode Internal Resistor"] #[inline(always)] - pub fn csressel(&self) -> CSRESSEL_R { - CSRESSEL_R::new(((self.bits >> 28) & 7) as u8) + pub fn csressel(&self) -> CsresselR { + CsresselR::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:7 - Positive Input Select"] #[inline(always)] #[must_use] - pub fn possel(&mut self) -> POSSEL_W<0> { - POSSEL_W::new(self) + pub fn possel(&mut self) -> PosselW { + PosselW::new(self, 0) } #[doc = "Bits 8:15 - Negative Input Select"] #[inline(always)] #[must_use] - pub fn negsel(&mut self) -> NEGSEL_W<8> { - NEGSEL_W::new(self) + pub fn negsel(&mut self) -> NegselW { + NegselW::new(self, 8) } #[doc = "Bits 16:21 - VREF division"] #[inline(always)] #[must_use] - pub fn vrefdiv(&mut self) -> VREFDIV_W<16> { - VREFDIV_W::new(self) + pub fn vrefdiv(&mut self) -> VrefdivW { + VrefdivW::new(self, 16) } #[doc = "Bits 28:30 - Capacitive Sense Mode Internal Resistor"] #[inline(always)] #[must_use] - pub fn csressel(&mut self) -> CSRESSEL_W<28> { - CSRESSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn csressel(&mut self) -> CsresselW { + CsresselW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [inputctrl](index.html) module"] -pub struct INPUTCTRL_SPEC; -impl crate::RegisterSpec for INPUTCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`inputctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inputctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct InputctrlSpec; +impl crate::RegisterSpec for InputctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [inputctrl::R](R) reader structure"] -impl crate::Readable for INPUTCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [inputctrl::W](W) writer structure"] -impl crate::Writable for INPUTCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`inputctrl::R`](R) reader structure"] +impl crate::Readable for InputctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`inputctrl::W`](W) writer structure"] +impl crate::Writable for InputctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets INPUTCTRL to value 0"] -impl crate::Resettable for INPUTCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for InputctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/ipversion.rs index 85cb381..0068345 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/status.rs index 742088c..7088050 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/status.rs @@ -1,58 +1,43 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ACMPOUT` reader - Analog Comparator Output"] -pub type ACMPOUT_R = crate::BitReader; +pub type AcmpoutR = crate::BitReader; #[doc = "Field `ACMPRDY` reader - Analog Comparator Ready"] -pub type ACMPRDY_R = crate::BitReader; +pub type AcmprdyR = crate::BitReader; #[doc = "Field `INPUTCONFLICT` reader - INPUT conflict"] -pub type INPUTCONFLICT_R = crate::BitReader; +pub type InputconflictR = crate::BitReader; #[doc = "Field `PORTALLOCERR` reader - Port allocation error"] -pub type PORTALLOCERR_R = crate::BitReader; +pub type PortallocerrR = crate::BitReader; impl R { #[doc = "Bit 0 - Analog Comparator Output"] #[inline(always)] - pub fn acmpout(&self) -> ACMPOUT_R { - ACMPOUT_R::new((self.bits & 1) != 0) + pub fn acmpout(&self) -> AcmpoutR { + AcmpoutR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - Analog Comparator Ready"] #[inline(always)] - pub fn acmprdy(&self) -> ACMPRDY_R { - ACMPRDY_R::new(((self.bits >> 2) & 1) != 0) + pub fn acmprdy(&self) -> AcmprdyR { + AcmprdyR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - INPUT conflict"] #[inline(always)] - pub fn inputconflict(&self) -> INPUTCONFLICT_R { - INPUTCONFLICT_R::new(((self.bits >> 3) & 1) != 0) + pub fn inputconflict(&self) -> InputconflictR { + InputconflictR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port allocation error"] #[inline(always)] - pub fn portallocerr(&self) -> PORTALLOCERR_R { - PORTALLOCERR_R::new(((self.bits >> 4) & 1) != 0) + pub fn portallocerr(&self) -> PortallocerrR { + PortallocerrR::new(((self.bits >> 4) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/swrst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/swrst.rs index a74aa75..3b73e52 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/swrst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/swrst.rs @@ -1,80 +1,40 @@ #[doc = "Register `SWRST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SWRST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SWRST` writer - Software reset"] -pub type SWRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, SWRST_SPEC, bool, O>; +pub type SwrstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESETTING` reader - Software reset busy status"] -pub type RESETTING_R = crate::BitReader; +pub type ResettingR = crate::BitReader; impl R { #[doc = "Bit 1 - Software reset busy status"] #[inline(always)] - pub fn resetting(&self) -> RESETTING_R { - RESETTING_R::new(((self.bits >> 1) & 1) != 0) + pub fn resetting(&self) -> ResettingR { + ResettingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Software reset"] #[inline(always)] #[must_use] - pub fn swrst(&mut self) -> SWRST_W<0> { - SWRST_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn swrst(&mut self) -> SwrstW { + SwrstW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swrst](index.html) module"] -pub struct SWRST_SPEC; -impl crate::RegisterSpec for SWRST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SwrstSpec; +impl crate::RegisterSpec for SwrstSpec { type Ux = u32; } -#[doc = "`read()` method returns [swrst::R](R) reader structure"] -impl crate::Readable for SWRST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [swrst::W](W) writer structure"] -impl crate::Writable for SWRST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`swrst::R`](R) reader structure"] +impl crate::Readable for SwrstSpec {} +#[doc = "`write(|w| ..)` method takes [`swrst::W`](W) writer structure"] +impl crate::Writable for SwrstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWRST to value 0"] -impl crate::Resettable for SWRST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SwrstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/syncbusy.rs index 5a6bf41..9ff78b9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp0_s/syncbusy.rs @@ -1,37 +1,22 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `INPUTCTRL` reader - Syncbusy for INPUTCTRL"] -pub type INPUTCTRL_R = crate::BitReader; +pub type InputctrlR = crate::BitReader; impl R { #[doc = "Bit 0 - Syncbusy for INPUTCTRL"] #[inline(always)] - pub fn inputctrl(&self) -> INPUTCTRL_R { - INPUTCTRL_R::new((self.bits & 1) != 0) + pub fn inputctrl(&self) -> InputctrlR { + InputctrlR::new((self.bits & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns.rs index 65a8f39..39e9c36 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns.rs @@ -1,64 +1,126 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + swrst: Swrst, + cfg: Cfg, + ctrl: Ctrl, + inputctrl: Inputctrl, + status: Status, + if_: If, + ien: Ien, + syncbusy: Syncbusy, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub swrst: SWRST, + #[inline(always)] + pub const fn swrst(&self) -> &Swrst { + &self.swrst + } #[doc = "0x0c - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x10 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x14 - No Description"] - pub inputctrl: INPUTCTRL, + #[inline(always)] + pub const fn inputctrl(&self) -> &Inputctrl { + &self.inputctrl + } #[doc = "0x18 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x1c - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x20 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x24 - No Description"] - pub syncbusy: SYNCBUSY, + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "SWRST (rw) register accessor: an alias for `Reg`"] -pub type SWRST = crate::Reg; +#[doc = "SWRST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swrst`] +module"] +#[doc(alias = "SWRST")] +pub type Swrst = crate::Reg; #[doc = "No Description"] pub mod swrst; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "INPUTCTRL (rw) register accessor: an alias for `Reg`"] -pub type INPUTCTRL = crate::Reg; +#[doc = "INPUTCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`inputctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inputctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inputctrl`] +module"] +#[doc(alias = "INPUTCTRL")] +pub type Inputctrl = crate::Reg; #[doc = "No Description"] pub mod inputctrl; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "No Description"] pub mod syncbusy; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/cfg.rs index dc7241f..40db7a3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/cfg.rs @@ -1,369 +1,343 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `BIAS` reader - Bias Configuration"] -pub type BIAS_R = crate::FieldReader; +pub type BiasR = crate::FieldReader; #[doc = "Field `BIAS` writer - Bias Configuration"] -pub type BIAS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, u8, 3, O>; -#[doc = "Field `HYST` reader - Hysteresis mode"] -pub type HYST_R = crate::FieldReader; +pub type BiasW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Hysteresis mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HYST_A { +pub enum Hyst { #[doc = "0: Hysteresis disabled"] - DISABLED = 0, + Disabled = 0, #[doc = "1: 10mV symmetrical hysteresis"] - SYM10MV = 1, + Sym10mv = 1, #[doc = "2: 20mV symmetrical hysteresis"] - SYM20MV = 2, + Sym20mv = 2, #[doc = "3: 30mV symmetrical hysteresis"] - SYM30MV = 3, + Sym30mv = 3, #[doc = "4: 10mV hysteresis on positive edge transitions"] - POS10MV = 4, + Pos10mv = 4, #[doc = "5: 20mV hysteresis on positive edge transitions"] - POS20MV = 5, + Pos20mv = 5, #[doc = "6: 30mV hysteresis on positive edge transitions"] - POS30MV = 6, + Pos30mv = 6, #[doc = "8: 10mV hysteresis on negative edge transitions"] - NEG10MV = 8, + Neg10mv = 8, #[doc = "9: 20mV hysteresis on negative edge transitions"] - NEG20MV = 9, + Neg20mv = 9, #[doc = "10: 30mV hysteresis on negative edge transitions"] - NEG30MV = 10, + Neg30mv = 10, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HYST_A) -> Self { + fn from(variant: Hyst) -> Self { variant as _ } } -impl HYST_R { +impl crate::FieldSpec for Hyst { + type Ux = u8; +} +impl crate::IsEnum for Hyst {} +#[doc = "Field `HYST` reader - Hysteresis mode"] +pub type HystR = crate::FieldReader; +impl HystR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HYST_A::DISABLED), - 1 => Some(HYST_A::SYM10MV), - 2 => Some(HYST_A::SYM20MV), - 3 => Some(HYST_A::SYM30MV), - 4 => Some(HYST_A::POS10MV), - 5 => Some(HYST_A::POS20MV), - 6 => Some(HYST_A::POS30MV), - 8 => Some(HYST_A::NEG10MV), - 9 => Some(HYST_A::NEG20MV), - 10 => Some(HYST_A::NEG30MV), + 0 => Some(Hyst::Disabled), + 1 => Some(Hyst::Sym10mv), + 2 => Some(Hyst::Sym20mv), + 3 => Some(Hyst::Sym30mv), + 4 => Some(Hyst::Pos10mv), + 5 => Some(Hyst::Pos20mv), + 6 => Some(Hyst::Pos30mv), + 8 => Some(Hyst::Neg10mv), + 9 => Some(Hyst::Neg20mv), + 10 => Some(Hyst::Neg30mv), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Hysteresis disabled"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == HYST_A::DISABLED + *self == Hyst::Disabled } - #[doc = "Checks if the value of the field is `SYM10MV`"] + #[doc = "10mV symmetrical hysteresis"] #[inline(always)] pub fn is_sym10mv(&self) -> bool { - *self == HYST_A::SYM10MV + *self == Hyst::Sym10mv } - #[doc = "Checks if the value of the field is `SYM20MV`"] + #[doc = "20mV symmetrical hysteresis"] #[inline(always)] pub fn is_sym20mv(&self) -> bool { - *self == HYST_A::SYM20MV + *self == Hyst::Sym20mv } - #[doc = "Checks if the value of the field is `SYM30MV`"] + #[doc = "30mV symmetrical hysteresis"] #[inline(always)] pub fn is_sym30mv(&self) -> bool { - *self == HYST_A::SYM30MV + *self == Hyst::Sym30mv } - #[doc = "Checks if the value of the field is `POS10MV`"] + #[doc = "10mV hysteresis on positive edge transitions"] #[inline(always)] pub fn is_pos10mv(&self) -> bool { - *self == HYST_A::POS10MV + *self == Hyst::Pos10mv } - #[doc = "Checks if the value of the field is `POS20MV`"] + #[doc = "20mV hysteresis on positive edge transitions"] #[inline(always)] pub fn is_pos20mv(&self) -> bool { - *self == HYST_A::POS20MV + *self == Hyst::Pos20mv } - #[doc = "Checks if the value of the field is `POS30MV`"] + #[doc = "30mV hysteresis on positive edge transitions"] #[inline(always)] pub fn is_pos30mv(&self) -> bool { - *self == HYST_A::POS30MV + *self == Hyst::Pos30mv } - #[doc = "Checks if the value of the field is `NEG10MV`"] + #[doc = "10mV hysteresis on negative edge transitions"] #[inline(always)] pub fn is_neg10mv(&self) -> bool { - *self == HYST_A::NEG10MV + *self == Hyst::Neg10mv } - #[doc = "Checks if the value of the field is `NEG20MV`"] + #[doc = "20mV hysteresis on negative edge transitions"] #[inline(always)] pub fn is_neg20mv(&self) -> bool { - *self == HYST_A::NEG20MV + *self == Hyst::Neg20mv } - #[doc = "Checks if the value of the field is `NEG30MV`"] + #[doc = "30mV hysteresis on negative edge transitions"] #[inline(always)] pub fn is_neg30mv(&self) -> bool { - *self == HYST_A::NEG30MV + *self == Hyst::Neg30mv } } #[doc = "Field `HYST` writer - Hysteresis mode"] -pub type HYST_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, HYST_A, 4, O>; -impl<'a, const O: u8> HYST_W<'a, O> { +pub type HystW<'a, REG> = crate::FieldWriter<'a, REG, 4, Hyst>; +impl<'a, REG> HystW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Hysteresis disabled"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(HYST_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Hyst::Disabled) } #[doc = "10mV symmetrical hysteresis"] #[inline(always)] - pub fn sym10mv(self) -> &'a mut W { - self.variant(HYST_A::SYM10MV) + pub fn sym10mv(self) -> &'a mut crate::W { + self.variant(Hyst::Sym10mv) } #[doc = "20mV symmetrical hysteresis"] #[inline(always)] - pub fn sym20mv(self) -> &'a mut W { - self.variant(HYST_A::SYM20MV) + pub fn sym20mv(self) -> &'a mut crate::W { + self.variant(Hyst::Sym20mv) } #[doc = "30mV symmetrical hysteresis"] #[inline(always)] - pub fn sym30mv(self) -> &'a mut W { - self.variant(HYST_A::SYM30MV) + pub fn sym30mv(self) -> &'a mut crate::W { + self.variant(Hyst::Sym30mv) } #[doc = "10mV hysteresis on positive edge transitions"] #[inline(always)] - pub fn pos10mv(self) -> &'a mut W { - self.variant(HYST_A::POS10MV) + pub fn pos10mv(self) -> &'a mut crate::W { + self.variant(Hyst::Pos10mv) } #[doc = "20mV hysteresis on positive edge transitions"] #[inline(always)] - pub fn pos20mv(self) -> &'a mut W { - self.variant(HYST_A::POS20MV) + pub fn pos20mv(self) -> &'a mut crate::W { + self.variant(Hyst::Pos20mv) } #[doc = "30mV hysteresis on positive edge transitions"] #[inline(always)] - pub fn pos30mv(self) -> &'a mut W { - self.variant(HYST_A::POS30MV) + pub fn pos30mv(self) -> &'a mut crate::W { + self.variant(Hyst::Pos30mv) } #[doc = "10mV hysteresis on negative edge transitions"] #[inline(always)] - pub fn neg10mv(self) -> &'a mut W { - self.variant(HYST_A::NEG10MV) + pub fn neg10mv(self) -> &'a mut crate::W { + self.variant(Hyst::Neg10mv) } #[doc = "20mV hysteresis on negative edge transitions"] #[inline(always)] - pub fn neg20mv(self) -> &'a mut W { - self.variant(HYST_A::NEG20MV) + pub fn neg20mv(self) -> &'a mut crate::W { + self.variant(Hyst::Neg20mv) } #[doc = "30mV hysteresis on negative edge transitions"] #[inline(always)] - pub fn neg30mv(self) -> &'a mut W { - self.variant(HYST_A::NEG30MV) + pub fn neg30mv(self) -> &'a mut crate::W { + self.variant(Hyst::Neg30mv) } } -#[doc = "Field `INPUTRANGE` reader - Input Range"] -pub type INPUTRANGE_R = crate::BitReader; #[doc = "Input Range\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum INPUTRANGE_A { +pub enum Inputrange { #[doc = "0: Use this setting when the input to the comparator core can be from 0 to AVDD."] - FULL = 0, + Full = 0, #[doc = "1: It is recommended to use this setting when the input to the comparator core will always be less than AVDD-0.7V."] - REDUCED = 1, + Reduced = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: INPUTRANGE_A) -> Self { + fn from(variant: Inputrange) -> Self { variant as u8 != 0 } } -impl INPUTRANGE_R { +#[doc = "Field `INPUTRANGE` reader - Input Range"] +pub type InputrangeR = crate::BitReader; +impl InputrangeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INPUTRANGE_A { + pub const fn variant(&self) -> Inputrange { match self.bits { - false => INPUTRANGE_A::FULL, - true => INPUTRANGE_A::REDUCED, + false => Inputrange::Full, + true => Inputrange::Reduced, } } - #[doc = "Checks if the value of the field is `FULL`"] + #[doc = "Use this setting when the input to the comparator core can be from 0 to AVDD."] #[inline(always)] pub fn is_full(&self) -> bool { - *self == INPUTRANGE_A::FULL + *self == Inputrange::Full } - #[doc = "Checks if the value of the field is `REDUCED`"] + #[doc = "It is recommended to use this setting when the input to the comparator core will always be less than AVDD-0.7V."] #[inline(always)] pub fn is_reduced(&self) -> bool { - *self == INPUTRANGE_A::REDUCED + *self == Inputrange::Reduced } } #[doc = "Field `INPUTRANGE` writer - Input Range"] -pub type INPUTRANGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, INPUTRANGE_A, O>; -impl<'a, const O: u8> INPUTRANGE_W<'a, O> { +pub type InputrangeW<'a, REG> = crate::BitWriter<'a, REG, Inputrange>; +impl<'a, REG> InputrangeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use this setting when the input to the comparator core can be from 0 to AVDD."] #[inline(always)] - pub fn full(self) -> &'a mut W { - self.variant(INPUTRANGE_A::FULL) + pub fn full(self) -> &'a mut crate::W { + self.variant(Inputrange::Full) } #[doc = "It is recommended to use this setting when the input to the comparator core will always be less than AVDD-0.7V."] #[inline(always)] - pub fn reduced(self) -> &'a mut W { - self.variant(INPUTRANGE_A::REDUCED) + pub fn reduced(self) -> &'a mut crate::W { + self.variant(Inputrange::Reduced) } } -#[doc = "Field `ACCURACY` reader - ACMP accuracy mode"] -pub type ACCURACY_R = crate::BitReader; #[doc = "ACMP accuracy mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ACCURACY_A { +pub enum Accuracy { #[doc = "0: ACMP operates in low-accuracy mode but consumes less current."] - LOW = 0, + Low = 0, #[doc = "1: ACMP operates in high-accuracy mode but consumes more current."] - HIGH = 1, + High = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ACCURACY_A) -> Self { + fn from(variant: Accuracy) -> Self { variant as u8 != 0 } } -impl ACCURACY_R { +#[doc = "Field `ACCURACY` reader - ACMP accuracy mode"] +pub type AccuracyR = crate::BitReader; +impl AccuracyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ACCURACY_A { + pub const fn variant(&self) -> Accuracy { match self.bits { - false => ACCURACY_A::LOW, - true => ACCURACY_A::HIGH, + false => Accuracy::Low, + true => Accuracy::High, } } - #[doc = "Checks if the value of the field is `LOW`"] + #[doc = "ACMP operates in low-accuracy mode but consumes less current."] #[inline(always)] pub fn is_low(&self) -> bool { - *self == ACCURACY_A::LOW + *self == Accuracy::Low } - #[doc = "Checks if the value of the field is `HIGH`"] + #[doc = "ACMP operates in high-accuracy mode but consumes more current."] #[inline(always)] pub fn is_high(&self) -> bool { - *self == ACCURACY_A::HIGH + *self == Accuracy::High } } #[doc = "Field `ACCURACY` writer - ACMP accuracy mode"] -pub type ACCURACY_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, ACCURACY_A, O>; -impl<'a, const O: u8> ACCURACY_W<'a, O> { +pub type AccuracyW<'a, REG> = crate::BitWriter<'a, REG, Accuracy>; +impl<'a, REG> AccuracyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "ACMP operates in low-accuracy mode but consumes less current."] #[inline(always)] - pub fn low(self) -> &'a mut W { - self.variant(ACCURACY_A::LOW) + pub fn low(self) -> &'a mut crate::W { + self.variant(Accuracy::Low) } #[doc = "ACMP operates in high-accuracy mode but consumes more current."] #[inline(always)] - pub fn high(self) -> &'a mut W { - self.variant(ACCURACY_A::HIGH) + pub fn high(self) -> &'a mut crate::W { + self.variant(Accuracy::High) } } impl R { #[doc = "Bits 0:2 - Bias Configuration"] #[inline(always)] - pub fn bias(&self) -> BIAS_R { - BIAS_R::new((self.bits & 7) as u8) + pub fn bias(&self) -> BiasR { + BiasR::new((self.bits & 7) as u8) } #[doc = "Bits 8:11 - Hysteresis mode"] #[inline(always)] - pub fn hyst(&self) -> HYST_R { - HYST_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn hyst(&self) -> HystR { + HystR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bit 16 - Input Range"] #[inline(always)] - pub fn inputrange(&self) -> INPUTRANGE_R { - INPUTRANGE_R::new(((self.bits >> 16) & 1) != 0) + pub fn inputrange(&self) -> InputrangeR { + InputrangeR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - ACMP accuracy mode"] #[inline(always)] - pub fn accuracy(&self) -> ACCURACY_R { - ACCURACY_R::new(((self.bits >> 17) & 1) != 0) + pub fn accuracy(&self) -> AccuracyR { + AccuracyR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Bias Configuration"] #[inline(always)] #[must_use] - pub fn bias(&mut self) -> BIAS_W<0> { - BIAS_W::new(self) + pub fn bias(&mut self) -> BiasW { + BiasW::new(self, 0) } #[doc = "Bits 8:11 - Hysteresis mode"] #[inline(always)] #[must_use] - pub fn hyst(&mut self) -> HYST_W<8> { - HYST_W::new(self) + pub fn hyst(&mut self) -> HystW { + HystW::new(self, 8) } #[doc = "Bit 16 - Input Range"] #[inline(always)] #[must_use] - pub fn inputrange(&mut self) -> INPUTRANGE_W<16> { - INPUTRANGE_W::new(self) + pub fn inputrange(&mut self) -> InputrangeW { + InputrangeW::new(self, 16) } #[doc = "Bit 17 - ACMP accuracy mode"] #[inline(always)] #[must_use] - pub fn accuracy(&mut self) -> ACCURACY_W<17> { - ACCURACY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn accuracy(&mut self) -> AccuracyW { + AccuracyW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0x04"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x04; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0x04; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/ctrl.rs index a69e6f8..e096f46 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/ctrl.rs @@ -1,187 +1,153 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `NOTRDYVAL` reader - Not Ready Value"] -pub type NOTRDYVAL_R = crate::BitReader; +pub type W = crate::W; #[doc = "Not Ready Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum NOTRDYVAL_A { +pub enum Notrdyval { #[doc = "0: ACMP output is 0 when the ACMP is not ready."] - LOW = 0, + Low = 0, #[doc = "1: ACMP output is 1 when the ACMP is not ready."] - HIGH = 1, + High = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: NOTRDYVAL_A) -> Self { + fn from(variant: Notrdyval) -> Self { variant as u8 != 0 } } -impl NOTRDYVAL_R { +#[doc = "Field `NOTRDYVAL` reader - Not Ready Value"] +pub type NotrdyvalR = crate::BitReader; +impl NotrdyvalR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> NOTRDYVAL_A { + pub const fn variant(&self) -> Notrdyval { match self.bits { - false => NOTRDYVAL_A::LOW, - true => NOTRDYVAL_A::HIGH, + false => Notrdyval::Low, + true => Notrdyval::High, } } - #[doc = "Checks if the value of the field is `LOW`"] + #[doc = "ACMP output is 0 when the ACMP is not ready."] #[inline(always)] pub fn is_low(&self) -> bool { - *self == NOTRDYVAL_A::LOW + *self == Notrdyval::Low } - #[doc = "Checks if the value of the field is `HIGH`"] + #[doc = "ACMP output is 1 when the ACMP is not ready."] #[inline(always)] pub fn is_high(&self) -> bool { - *self == NOTRDYVAL_A::HIGH + *self == Notrdyval::High } } #[doc = "Field `NOTRDYVAL` writer - Not Ready Value"] -pub type NOTRDYVAL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, NOTRDYVAL_A, O>; -impl<'a, const O: u8> NOTRDYVAL_W<'a, O> { +pub type NotrdyvalW<'a, REG> = crate::BitWriter<'a, REG, Notrdyval>; +impl<'a, REG> NotrdyvalW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "ACMP output is 0 when the ACMP is not ready."] #[inline(always)] - pub fn low(self) -> &'a mut W { - self.variant(NOTRDYVAL_A::LOW) + pub fn low(self) -> &'a mut crate::W { + self.variant(Notrdyval::Low) } #[doc = "ACMP output is 1 when the ACMP is not ready."] #[inline(always)] - pub fn high(self) -> &'a mut W { - self.variant(NOTRDYVAL_A::HIGH) + pub fn high(self) -> &'a mut crate::W { + self.variant(Notrdyval::High) } } -#[doc = "Field `GPIOINV` reader - Comparator GPIO Output Invert"] -pub type GPIOINV_R = crate::BitReader; #[doc = "Comparator GPIO Output Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GPIOINV_A { +pub enum Gpioinv { #[doc = "0: The comparator output to GPIO is not inverted"] - NOTINV = 0, + Notinv = 0, #[doc = "1: The comparator output to GPIO is inverted"] - INV = 1, + Inv = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GPIOINV_A) -> Self { + fn from(variant: Gpioinv) -> Self { variant as u8 != 0 } } -impl GPIOINV_R { +#[doc = "Field `GPIOINV` reader - Comparator GPIO Output Invert"] +pub type GpioinvR = crate::BitReader; +impl GpioinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> GPIOINV_A { + pub const fn variant(&self) -> Gpioinv { match self.bits { - false => GPIOINV_A::NOTINV, - true => GPIOINV_A::INV, + false => Gpioinv::Notinv, + true => Gpioinv::Inv, } } - #[doc = "Checks if the value of the field is `NOTINV`"] + #[doc = "The comparator output to GPIO is not inverted"] #[inline(always)] pub fn is_notinv(&self) -> bool { - *self == GPIOINV_A::NOTINV + *self == Gpioinv::Notinv } - #[doc = "Checks if the value of the field is `INV`"] + #[doc = "The comparator output to GPIO is inverted"] #[inline(always)] pub fn is_inv(&self) -> bool { - *self == GPIOINV_A::INV + *self == Gpioinv::Inv } } #[doc = "Field `GPIOINV` writer - Comparator GPIO Output Invert"] -pub type GPIOINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, GPIOINV_A, O>; -impl<'a, const O: u8> GPIOINV_W<'a, O> { +pub type GpioinvW<'a, REG> = crate::BitWriter<'a, REG, Gpioinv>; +impl<'a, REG> GpioinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The comparator output to GPIO is not inverted"] #[inline(always)] - pub fn notinv(self) -> &'a mut W { - self.variant(GPIOINV_A::NOTINV) + pub fn notinv(self) -> &'a mut crate::W { + self.variant(Gpioinv::Notinv) } #[doc = "The comparator output to GPIO is inverted"] #[inline(always)] - pub fn inv(self) -> &'a mut W { - self.variant(GPIOINV_A::INV) + pub fn inv(self) -> &'a mut crate::W { + self.variant(Gpioinv::Inv) } } impl R { #[doc = "Bit 0 - Not Ready Value"] #[inline(always)] - pub fn notrdyval(&self) -> NOTRDYVAL_R { - NOTRDYVAL_R::new((self.bits & 1) != 0) + pub fn notrdyval(&self) -> NotrdyvalR { + NotrdyvalR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Comparator GPIO Output Invert"] #[inline(always)] - pub fn gpioinv(&self) -> GPIOINV_R { - GPIOINV_R::new(((self.bits >> 1) & 1) != 0) + pub fn gpioinv(&self) -> GpioinvR { + GpioinvR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Not Ready Value"] #[inline(always)] #[must_use] - pub fn notrdyval(&mut self) -> NOTRDYVAL_W<0> { - NOTRDYVAL_W::new(self) + pub fn notrdyval(&mut self) -> NotrdyvalW { + NotrdyvalW::new(self, 0) } #[doc = "Bit 1 - Comparator GPIO Output Invert"] #[inline(always)] #[must_use] - pub fn gpioinv(&mut self) -> GPIOINV_W<1> { - GPIOINV_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn gpioinv(&mut self) -> GpioinvW { + GpioinvW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/en.rs index f15bf65..7298843 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Module enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Module enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Module enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Module enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/ien.rs index 23882fa..27a6bdf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/ien.rs @@ -1,140 +1,100 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RISE` reader - Rising edge interrupt enable"] -pub type RISE_R = crate::BitReader; +pub type RiseR = crate::BitReader; #[doc = "Field `RISE` writer - Rising edge interrupt enable"] -pub type RISE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RiseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FALL` reader - Falling edge interrupt enable"] -pub type FALL_R = crate::BitReader; +pub type FallR = crate::BitReader; #[doc = "Field `FALL` writer - Falling edge interrupt enable"] -pub type FALL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FallW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMPRDY` reader - ACMP ready interrupt enable"] -pub type ACMPRDY_R = crate::BitReader; +pub type AcmprdyR = crate::BitReader; #[doc = "Field `ACMPRDY` writer - ACMP ready interrupt enable"] -pub type ACMPRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AcmprdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INPUTCONFLICT` reader - Input conflict interrupt enable"] -pub type INPUTCONFLICT_R = crate::BitReader; +pub type InputconflictR = crate::BitReader; #[doc = "Field `INPUTCONFLICT` writer - Input conflict interrupt enable"] -pub type INPUTCONFLICT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type InputconflictW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PORTALLOCERR` reader - Port allocation error interrupt enable"] -pub type PORTALLOCERR_R = crate::BitReader; +pub type PortallocerrR = crate::BitReader; #[doc = "Field `PORTALLOCERR` writer - Port allocation error interrupt enable"] -pub type PORTALLOCERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PortallocerrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Rising edge interrupt enable"] #[inline(always)] - pub fn rise(&self) -> RISE_R { - RISE_R::new((self.bits & 1) != 0) + pub fn rise(&self) -> RiseR { + RiseR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Falling edge interrupt enable"] #[inline(always)] - pub fn fall(&self) -> FALL_R { - FALL_R::new(((self.bits >> 1) & 1) != 0) + pub fn fall(&self) -> FallR { + FallR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - ACMP ready interrupt enable"] #[inline(always)] - pub fn acmprdy(&self) -> ACMPRDY_R { - ACMPRDY_R::new(((self.bits >> 2) & 1) != 0) + pub fn acmprdy(&self) -> AcmprdyR { + AcmprdyR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Input conflict interrupt enable"] #[inline(always)] - pub fn inputconflict(&self) -> INPUTCONFLICT_R { - INPUTCONFLICT_R::new(((self.bits >> 3) & 1) != 0) + pub fn inputconflict(&self) -> InputconflictR { + InputconflictR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port allocation error interrupt enable"] #[inline(always)] - pub fn portallocerr(&self) -> PORTALLOCERR_R { - PORTALLOCERR_R::new(((self.bits >> 4) & 1) != 0) + pub fn portallocerr(&self) -> PortallocerrR { + PortallocerrR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - Rising edge interrupt enable"] #[inline(always)] #[must_use] - pub fn rise(&mut self) -> RISE_W<0> { - RISE_W::new(self) + pub fn rise(&mut self) -> RiseW { + RiseW::new(self, 0) } #[doc = "Bit 1 - Falling edge interrupt enable"] #[inline(always)] #[must_use] - pub fn fall(&mut self) -> FALL_W<1> { - FALL_W::new(self) + pub fn fall(&mut self) -> FallW { + FallW::new(self, 1) } #[doc = "Bit 2 - ACMP ready interrupt enable"] #[inline(always)] #[must_use] - pub fn acmprdy(&mut self) -> ACMPRDY_W<2> { - ACMPRDY_W::new(self) + pub fn acmprdy(&mut self) -> AcmprdyW { + AcmprdyW::new(self, 2) } #[doc = "Bit 3 - Input conflict interrupt enable"] #[inline(always)] #[must_use] - pub fn inputconflict(&mut self) -> INPUTCONFLICT_W<3> { - INPUTCONFLICT_W::new(self) + pub fn inputconflict(&mut self) -> InputconflictW { + InputconflictW::new(self, 3) } #[doc = "Bit 4 - Port allocation error interrupt enable"] #[inline(always)] #[must_use] - pub fn portallocerr(&mut self) -> PORTALLOCERR_W<4> { - PORTALLOCERR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn portallocerr(&mut self) -> PortallocerrW { + PortallocerrW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/if_.rs index 0133f4a..c3b5907 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/if_.rs @@ -1,140 +1,100 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RISE` reader - Rising Edge Triggered Interrupt Flag"] -pub type RISE_R = crate::BitReader; +pub type RiseR = crate::BitReader; #[doc = "Field `RISE` writer - Rising Edge Triggered Interrupt Flag"] -pub type RISE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RiseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FALL` reader - Falling Edge Triggered Interrupt Flag"] -pub type FALL_R = crate::BitReader; +pub type FallR = crate::BitReader; #[doc = "Field `FALL` writer - Falling Edge Triggered Interrupt Flag"] -pub type FALL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FallW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMPRDY` reader - ACMP ready Interrupt flag"] -pub type ACMPRDY_R = crate::BitReader; +pub type AcmprdyR = crate::BitReader; #[doc = "Field `ACMPRDY` writer - ACMP ready Interrupt flag"] -pub type ACMPRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AcmprdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INPUTCONFLICT` reader - Input conflict"] -pub type INPUTCONFLICT_R = crate::BitReader; +pub type InputconflictR = crate::BitReader; #[doc = "Field `INPUTCONFLICT` writer - Input conflict"] -pub type INPUTCONFLICT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type InputconflictW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PORTALLOCERR` reader - Port allocation error"] -pub type PORTALLOCERR_R = crate::BitReader; +pub type PortallocerrR = crate::BitReader; #[doc = "Field `PORTALLOCERR` writer - Port allocation error"] -pub type PORTALLOCERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PortallocerrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Rising Edge Triggered Interrupt Flag"] #[inline(always)] - pub fn rise(&self) -> RISE_R { - RISE_R::new((self.bits & 1) != 0) + pub fn rise(&self) -> RiseR { + RiseR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Falling Edge Triggered Interrupt Flag"] #[inline(always)] - pub fn fall(&self) -> FALL_R { - FALL_R::new(((self.bits >> 1) & 1) != 0) + pub fn fall(&self) -> FallR { + FallR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - ACMP ready Interrupt flag"] #[inline(always)] - pub fn acmprdy(&self) -> ACMPRDY_R { - ACMPRDY_R::new(((self.bits >> 2) & 1) != 0) + pub fn acmprdy(&self) -> AcmprdyR { + AcmprdyR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Input conflict"] #[inline(always)] - pub fn inputconflict(&self) -> INPUTCONFLICT_R { - INPUTCONFLICT_R::new(((self.bits >> 3) & 1) != 0) + pub fn inputconflict(&self) -> InputconflictR { + InputconflictR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port allocation error"] #[inline(always)] - pub fn portallocerr(&self) -> PORTALLOCERR_R { - PORTALLOCERR_R::new(((self.bits >> 4) & 1) != 0) + pub fn portallocerr(&self) -> PortallocerrR { + PortallocerrR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - Rising Edge Triggered Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rise(&mut self) -> RISE_W<0> { - RISE_W::new(self) + pub fn rise(&mut self) -> RiseW { + RiseW::new(self, 0) } #[doc = "Bit 1 - Falling Edge Triggered Interrupt Flag"] #[inline(always)] #[must_use] - pub fn fall(&mut self) -> FALL_W<1> { - FALL_W::new(self) + pub fn fall(&mut self) -> FallW { + FallW::new(self, 1) } #[doc = "Bit 2 - ACMP ready Interrupt flag"] #[inline(always)] #[must_use] - pub fn acmprdy(&mut self) -> ACMPRDY_W<2> { - ACMPRDY_W::new(self) + pub fn acmprdy(&mut self) -> AcmprdyW { + AcmprdyW::new(self, 2) } #[doc = "Bit 3 - Input conflict"] #[inline(always)] #[must_use] - pub fn inputconflict(&mut self) -> INPUTCONFLICT_W<3> { - INPUTCONFLICT_W::new(self) + pub fn inputconflict(&mut self) -> InputconflictW { + InputconflictW::new(self, 3) } #[doc = "Bit 4 - Port allocation error"] #[inline(always)] #[must_use] - pub fn portallocerr(&mut self) -> PORTALLOCERR_W<4> { - PORTALLOCERR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn portallocerr(&mut self) -> PortallocerrW { + PortallocerrW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/inputctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/inputctrl.rs index 5a67c46..524a2ae 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/inputctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/inputctrl.rs @@ -1,2352 +1,2333 @@ #[doc = "Register `INPUTCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `INPUTCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `POSSEL` reader - Positive Input Select"] -pub type POSSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Positive Input Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum POSSEL_A { +pub enum Possel { #[doc = "0: VSS"] - VSS = 0, + Vss = 0, #[doc = "16: Divided AVDD"] - VREFDIVAVDD = 16, + Vrefdivavdd = 16, #[doc = "17: Low-Power Divided AVDD"] - VREFDIVAVDDLP = 17, + Vrefdivavddlp = 17, #[doc = "18: Divided 1V25 reference"] - VREFDIV1V25 = 18, + Vrefdiv1v25 = 18, #[doc = "19: Low-power Divided 1V25 reference"] - VREFDIV1V25LP = 19, + Vrefdiv1v25lp = 19, #[doc = "20: Divided 2V5 reference"] - VREFDIV2V5 = 20, + Vrefdiv2v5 = 20, #[doc = "21: Low-power Divided 2V5 reference"] - VREFDIV2V5LP = 21, + Vrefdiv2v5lp = 21, #[doc = "32: VSENSE0 divided by 4"] - VSENSE01DIV4 = 32, + Vsense01div4 = 32, #[doc = "33: Low-power VSENSE0 divided by 4"] - VSENSE01DIV4LP = 33, + Vsense01div4lp = 33, #[doc = "34: VSENSE1 divided by 4"] - VSENSE11DIV4 = 34, + Vsense11div4 = 34, #[doc = "35: Low-power VSENSE1 divided by 4"] - VSENSE11DIV4LP = 35, + Vsense11div4lp = 35, #[doc = "64: VDAC0 channel 0 output"] - VDACOUT0 = 64, + Vdacout0 = 64, #[doc = "65: VDAC0 channel 1 output"] - VDACOUT1 = 65, + Vdacout1 = 65, #[doc = "80: External interface, base is PA0."] - EXTPA = 80, + Extpa = 80, #[doc = "81: External interface, base is PB0."] - EXTPB = 81, + Extpb = 81, #[doc = "82: External interface, base is PC0."] - EXTPC = 82, + Extpc = 82, #[doc = "83: External interface, base is PD0."] - EXTPD = 83, + Extpd = 83, #[doc = "128: Port A, Pin0"] - PA0 = 128, + Pa0 = 128, #[doc = "129: Port A, Pin1"] - PA1 = 129, + Pa1 = 129, #[doc = "130: Port A, Pin2"] - PA2 = 130, + Pa2 = 130, #[doc = "131: Port A, Pin3"] - PA3 = 131, + Pa3 = 131, #[doc = "132: Port A, Pin4"] - PA4 = 132, + Pa4 = 132, #[doc = "133: Port A, Pin5"] - PA5 = 133, + Pa5 = 133, #[doc = "134: Port A, Pin6"] - PA6 = 134, + Pa6 = 134, #[doc = "135: Port A, Pin7"] - PA7 = 135, + Pa7 = 135, #[doc = "136: Port A, Pin8"] - PA8 = 136, + Pa8 = 136, #[doc = "137: Port A, Pin9"] - PA9 = 137, + Pa9 = 137, #[doc = "138: Port A, Pin10"] - PA10 = 138, + Pa10 = 138, #[doc = "139: Port A, Pin11"] - PA11 = 139, + Pa11 = 139, #[doc = "140: Port A, Pin12"] - PA12 = 140, + Pa12 = 140, #[doc = "141: Port A, Pin13"] - PA13 = 141, + Pa13 = 141, #[doc = "142: Port A, Pin14"] - PA14 = 142, + Pa14 = 142, #[doc = "143: Port A, Pin15"] - PA15 = 143, + Pa15 = 143, #[doc = "144: Port B, Pin0"] - PB0 = 144, + Pb0 = 144, #[doc = "145: Port B, Pin1"] - PB1 = 145, + Pb1 = 145, #[doc = "146: Port B, Pin2"] - PB2 = 146, + Pb2 = 146, #[doc = "147: Port B, Pin3"] - PB3 = 147, + Pb3 = 147, #[doc = "148: Port B, Pin4"] - PB4 = 148, + Pb4 = 148, #[doc = "149: Port B, Pin5"] - PB5 = 149, + Pb5 = 149, #[doc = "150: Port B, Pin6"] - PB6 = 150, + Pb6 = 150, #[doc = "151: Port B, Pin7"] - PB7 = 151, + Pb7 = 151, #[doc = "152: Port B, Pin8"] - PB8 = 152, + Pb8 = 152, #[doc = "153: Port B, Pin9"] - PB9 = 153, + Pb9 = 153, #[doc = "154: Port B, Pin10"] - PB10 = 154, + Pb10 = 154, #[doc = "155: Port B, Pin11"] - PB11 = 155, + Pb11 = 155, #[doc = "156: Port B, Pin12"] - PB12 = 156, + Pb12 = 156, #[doc = "157: Port B, Pin13"] - PB13 = 157, + Pb13 = 157, #[doc = "158: Port B, Pin14"] - PB14 = 158, + Pb14 = 158, #[doc = "159: Port B, Pin15"] - PB15 = 159, + Pb15 = 159, #[doc = "160: Port C, Pin0"] - PC0 = 160, + Pc0 = 160, #[doc = "161: Port C, Pin1"] - PC1 = 161, + Pc1 = 161, #[doc = "162: Port C, Pin2"] - PC2 = 162, + Pc2 = 162, #[doc = "163: Port C, Pin3"] - PC3 = 163, + Pc3 = 163, #[doc = "164: Port C, Pin4"] - PC4 = 164, + Pc4 = 164, #[doc = "165: Port C, Pin5"] - PC5 = 165, + Pc5 = 165, #[doc = "166: Port C, Pin6"] - PC6 = 166, + Pc6 = 166, #[doc = "167: Port C, Pin7"] - PC7 = 167, + Pc7 = 167, #[doc = "168: Port C, Pin8"] - PC8 = 168, + Pc8 = 168, #[doc = "169: Port C, Pin9"] - PC9 = 169, + Pc9 = 169, #[doc = "170: Port C, Pin10"] - PC10 = 170, + Pc10 = 170, #[doc = "171: Port C, Pin11"] - PC11 = 171, + Pc11 = 171, #[doc = "172: Port C, Pin12"] - PC12 = 172, + Pc12 = 172, #[doc = "173: Port C, Pin13"] - PC13 = 173, + Pc13 = 173, #[doc = "174: Port C, Pin14"] - PC14 = 174, + Pc14 = 174, #[doc = "175: Port C, Pin15"] - PC15 = 175, + Pc15 = 175, #[doc = "176: Port D, Pin0"] - PD0 = 176, + Pd0 = 176, #[doc = "177: Port D, Pin1"] - PD1 = 177, + Pd1 = 177, #[doc = "178: Port D, Pin2"] - PD2 = 178, + Pd2 = 178, #[doc = "179: Port D, Pin3"] - PD3 = 179, + Pd3 = 179, #[doc = "180: Port D, Pin4"] - PD4 = 180, + Pd4 = 180, #[doc = "181: Port D, Pin5"] - PD5 = 181, + Pd5 = 181, #[doc = "182: Port D, Pin6"] - PD6 = 182, + Pd6 = 182, #[doc = "183: Port D, Pin7"] - PD7 = 183, + Pd7 = 183, #[doc = "184: Port D, Pin8"] - PD8 = 184, + Pd8 = 184, #[doc = "185: Port D, Pin9"] - PD9 = 185, + Pd9 = 185, #[doc = "186: Port D, Pin10"] - PD10 = 186, + Pd10 = 186, #[doc = "187: Port D, Pin11"] - PD11 = 187, + Pd11 = 187, #[doc = "188: Port D, Pin12"] - PD12 = 188, + Pd12 = 188, #[doc = "189: Port D, Pin13"] - PD13 = 189, + Pd13 = 189, #[doc = "190: Port D, Pin14"] - PD14 = 190, + Pd14 = 190, #[doc = "191: Port D, Pin15"] - PD15 = 191, + Pd15 = 191, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: POSSEL_A) -> Self { + fn from(variant: Possel) -> Self { variant as _ } } -impl POSSEL_R { +impl crate::FieldSpec for Possel { + type Ux = u8; +} +impl crate::IsEnum for Possel {} +#[doc = "Field `POSSEL` reader - Positive Input Select"] +pub type PosselR = crate::FieldReader; +impl PosselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(POSSEL_A::VSS), - 16 => Some(POSSEL_A::VREFDIVAVDD), - 17 => Some(POSSEL_A::VREFDIVAVDDLP), - 18 => Some(POSSEL_A::VREFDIV1V25), - 19 => Some(POSSEL_A::VREFDIV1V25LP), - 20 => Some(POSSEL_A::VREFDIV2V5), - 21 => Some(POSSEL_A::VREFDIV2V5LP), - 32 => Some(POSSEL_A::VSENSE01DIV4), - 33 => Some(POSSEL_A::VSENSE01DIV4LP), - 34 => Some(POSSEL_A::VSENSE11DIV4), - 35 => Some(POSSEL_A::VSENSE11DIV4LP), - 64 => Some(POSSEL_A::VDACOUT0), - 65 => Some(POSSEL_A::VDACOUT1), - 80 => Some(POSSEL_A::EXTPA), - 81 => Some(POSSEL_A::EXTPB), - 82 => Some(POSSEL_A::EXTPC), - 83 => Some(POSSEL_A::EXTPD), - 128 => Some(POSSEL_A::PA0), - 129 => Some(POSSEL_A::PA1), - 130 => Some(POSSEL_A::PA2), - 131 => Some(POSSEL_A::PA3), - 132 => Some(POSSEL_A::PA4), - 133 => Some(POSSEL_A::PA5), - 134 => Some(POSSEL_A::PA6), - 135 => Some(POSSEL_A::PA7), - 136 => Some(POSSEL_A::PA8), - 137 => Some(POSSEL_A::PA9), - 138 => Some(POSSEL_A::PA10), - 139 => Some(POSSEL_A::PA11), - 140 => Some(POSSEL_A::PA12), - 141 => Some(POSSEL_A::PA13), - 142 => Some(POSSEL_A::PA14), - 143 => Some(POSSEL_A::PA15), - 144 => Some(POSSEL_A::PB0), - 145 => Some(POSSEL_A::PB1), - 146 => Some(POSSEL_A::PB2), - 147 => Some(POSSEL_A::PB3), - 148 => Some(POSSEL_A::PB4), - 149 => Some(POSSEL_A::PB5), - 150 => Some(POSSEL_A::PB6), - 151 => Some(POSSEL_A::PB7), - 152 => Some(POSSEL_A::PB8), - 153 => Some(POSSEL_A::PB9), - 154 => Some(POSSEL_A::PB10), - 155 => Some(POSSEL_A::PB11), - 156 => Some(POSSEL_A::PB12), - 157 => Some(POSSEL_A::PB13), - 158 => Some(POSSEL_A::PB14), - 159 => Some(POSSEL_A::PB15), - 160 => Some(POSSEL_A::PC0), - 161 => Some(POSSEL_A::PC1), - 162 => Some(POSSEL_A::PC2), - 163 => Some(POSSEL_A::PC3), - 164 => Some(POSSEL_A::PC4), - 165 => Some(POSSEL_A::PC5), - 166 => Some(POSSEL_A::PC6), - 167 => Some(POSSEL_A::PC7), - 168 => Some(POSSEL_A::PC8), - 169 => Some(POSSEL_A::PC9), - 170 => Some(POSSEL_A::PC10), - 171 => Some(POSSEL_A::PC11), - 172 => Some(POSSEL_A::PC12), - 173 => Some(POSSEL_A::PC13), - 174 => Some(POSSEL_A::PC14), - 175 => Some(POSSEL_A::PC15), - 176 => Some(POSSEL_A::PD0), - 177 => Some(POSSEL_A::PD1), - 178 => Some(POSSEL_A::PD2), - 179 => Some(POSSEL_A::PD3), - 180 => Some(POSSEL_A::PD4), - 181 => Some(POSSEL_A::PD5), - 182 => Some(POSSEL_A::PD6), - 183 => Some(POSSEL_A::PD7), - 184 => Some(POSSEL_A::PD8), - 185 => Some(POSSEL_A::PD9), - 186 => Some(POSSEL_A::PD10), - 187 => Some(POSSEL_A::PD11), - 188 => Some(POSSEL_A::PD12), - 189 => Some(POSSEL_A::PD13), - 190 => Some(POSSEL_A::PD14), - 191 => Some(POSSEL_A::PD15), + 0 => Some(Possel::Vss), + 16 => Some(Possel::Vrefdivavdd), + 17 => Some(Possel::Vrefdivavddlp), + 18 => Some(Possel::Vrefdiv1v25), + 19 => Some(Possel::Vrefdiv1v25lp), + 20 => Some(Possel::Vrefdiv2v5), + 21 => Some(Possel::Vrefdiv2v5lp), + 32 => Some(Possel::Vsense01div4), + 33 => Some(Possel::Vsense01div4lp), + 34 => Some(Possel::Vsense11div4), + 35 => Some(Possel::Vsense11div4lp), + 64 => Some(Possel::Vdacout0), + 65 => Some(Possel::Vdacout1), + 80 => Some(Possel::Extpa), + 81 => Some(Possel::Extpb), + 82 => Some(Possel::Extpc), + 83 => Some(Possel::Extpd), + 128 => Some(Possel::Pa0), + 129 => Some(Possel::Pa1), + 130 => Some(Possel::Pa2), + 131 => Some(Possel::Pa3), + 132 => Some(Possel::Pa4), + 133 => Some(Possel::Pa5), + 134 => Some(Possel::Pa6), + 135 => Some(Possel::Pa7), + 136 => Some(Possel::Pa8), + 137 => Some(Possel::Pa9), + 138 => Some(Possel::Pa10), + 139 => Some(Possel::Pa11), + 140 => Some(Possel::Pa12), + 141 => Some(Possel::Pa13), + 142 => Some(Possel::Pa14), + 143 => Some(Possel::Pa15), + 144 => Some(Possel::Pb0), + 145 => Some(Possel::Pb1), + 146 => Some(Possel::Pb2), + 147 => Some(Possel::Pb3), + 148 => Some(Possel::Pb4), + 149 => Some(Possel::Pb5), + 150 => Some(Possel::Pb6), + 151 => Some(Possel::Pb7), + 152 => Some(Possel::Pb8), + 153 => Some(Possel::Pb9), + 154 => Some(Possel::Pb10), + 155 => Some(Possel::Pb11), + 156 => Some(Possel::Pb12), + 157 => Some(Possel::Pb13), + 158 => Some(Possel::Pb14), + 159 => Some(Possel::Pb15), + 160 => Some(Possel::Pc0), + 161 => Some(Possel::Pc1), + 162 => Some(Possel::Pc2), + 163 => Some(Possel::Pc3), + 164 => Some(Possel::Pc4), + 165 => Some(Possel::Pc5), + 166 => Some(Possel::Pc6), + 167 => Some(Possel::Pc7), + 168 => Some(Possel::Pc8), + 169 => Some(Possel::Pc9), + 170 => Some(Possel::Pc10), + 171 => Some(Possel::Pc11), + 172 => Some(Possel::Pc12), + 173 => Some(Possel::Pc13), + 174 => Some(Possel::Pc14), + 175 => Some(Possel::Pc15), + 176 => Some(Possel::Pd0), + 177 => Some(Possel::Pd1), + 178 => Some(Possel::Pd2), + 179 => Some(Possel::Pd3), + 180 => Some(Possel::Pd4), + 181 => Some(Possel::Pd5), + 182 => Some(Possel::Pd6), + 183 => Some(Possel::Pd7), + 184 => Some(Possel::Pd8), + 185 => Some(Possel::Pd9), + 186 => Some(Possel::Pd10), + 187 => Some(Possel::Pd11), + 188 => Some(Possel::Pd12), + 189 => Some(Possel::Pd13), + 190 => Some(Possel::Pd14), + 191 => Some(Possel::Pd15), _ => None, } } - #[doc = "Checks if the value of the field is `VSS`"] + #[doc = "VSS"] #[inline(always)] pub fn is_vss(&self) -> bool { - *self == POSSEL_A::VSS + *self == Possel::Vss } - #[doc = "Checks if the value of the field is `VREFDIVAVDD`"] + #[doc = "Divided AVDD"] #[inline(always)] pub fn is_vrefdivavdd(&self) -> bool { - *self == POSSEL_A::VREFDIVAVDD + *self == Possel::Vrefdivavdd } - #[doc = "Checks if the value of the field is `VREFDIVAVDDLP`"] + #[doc = "Low-Power Divided AVDD"] #[inline(always)] pub fn is_vrefdivavddlp(&self) -> bool { - *self == POSSEL_A::VREFDIVAVDDLP + *self == Possel::Vrefdivavddlp } - #[doc = "Checks if the value of the field is `VREFDIV1V25`"] + #[doc = "Divided 1V25 reference"] #[inline(always)] pub fn is_vrefdiv1v25(&self) -> bool { - *self == POSSEL_A::VREFDIV1V25 + *self == Possel::Vrefdiv1v25 } - #[doc = "Checks if the value of the field is `VREFDIV1V25LP`"] + #[doc = "Low-power Divided 1V25 reference"] #[inline(always)] pub fn is_vrefdiv1v25lp(&self) -> bool { - *self == POSSEL_A::VREFDIV1V25LP + *self == Possel::Vrefdiv1v25lp } - #[doc = "Checks if the value of the field is `VREFDIV2V5`"] + #[doc = "Divided 2V5 reference"] #[inline(always)] pub fn is_vrefdiv2v5(&self) -> bool { - *self == POSSEL_A::VREFDIV2V5 + *self == Possel::Vrefdiv2v5 } - #[doc = "Checks if the value of the field is `VREFDIV2V5LP`"] + #[doc = "Low-power Divided 2V5 reference"] #[inline(always)] pub fn is_vrefdiv2v5lp(&self) -> bool { - *self == POSSEL_A::VREFDIV2V5LP + *self == Possel::Vrefdiv2v5lp } - #[doc = "Checks if the value of the field is `VSENSE01DIV4`"] + #[doc = "VSENSE0 divided by 4"] #[inline(always)] pub fn is_vsense01div4(&self) -> bool { - *self == POSSEL_A::VSENSE01DIV4 + *self == Possel::Vsense01div4 } - #[doc = "Checks if the value of the field is `VSENSE01DIV4LP`"] + #[doc = "Low-power VSENSE0 divided by 4"] #[inline(always)] pub fn is_vsense01div4lp(&self) -> bool { - *self == POSSEL_A::VSENSE01DIV4LP + *self == Possel::Vsense01div4lp } - #[doc = "Checks if the value of the field is `VSENSE11DIV4`"] + #[doc = "VSENSE1 divided by 4"] #[inline(always)] pub fn is_vsense11div4(&self) -> bool { - *self == POSSEL_A::VSENSE11DIV4 + *self == Possel::Vsense11div4 } - #[doc = "Checks if the value of the field is `VSENSE11DIV4LP`"] + #[doc = "Low-power VSENSE1 divided by 4"] #[inline(always)] pub fn is_vsense11div4lp(&self) -> bool { - *self == POSSEL_A::VSENSE11DIV4LP + *self == Possel::Vsense11div4lp } - #[doc = "Checks if the value of the field is `VDACOUT0`"] + #[doc = "VDAC0 channel 0 output"] #[inline(always)] pub fn is_vdacout0(&self) -> bool { - *self == POSSEL_A::VDACOUT0 + *self == Possel::Vdacout0 } - #[doc = "Checks if the value of the field is `VDACOUT1`"] + #[doc = "VDAC0 channel 1 output"] #[inline(always)] pub fn is_vdacout1(&self) -> bool { - *self == POSSEL_A::VDACOUT1 + *self == Possel::Vdacout1 } - #[doc = "Checks if the value of the field is `EXTPA`"] + #[doc = "External interface, base is PA0."] #[inline(always)] pub fn is_extpa(&self) -> bool { - *self == POSSEL_A::EXTPA + *self == Possel::Extpa } - #[doc = "Checks if the value of the field is `EXTPB`"] + #[doc = "External interface, base is PB0."] #[inline(always)] pub fn is_extpb(&self) -> bool { - *self == POSSEL_A::EXTPB + *self == Possel::Extpb } - #[doc = "Checks if the value of the field is `EXTPC`"] + #[doc = "External interface, base is PC0."] #[inline(always)] pub fn is_extpc(&self) -> bool { - *self == POSSEL_A::EXTPC + *self == Possel::Extpc } - #[doc = "Checks if the value of the field is `EXTPD`"] + #[doc = "External interface, base is PD0."] #[inline(always)] pub fn is_extpd(&self) -> bool { - *self == POSSEL_A::EXTPD + *self == Possel::Extpd } - #[doc = "Checks if the value of the field is `PA0`"] + #[doc = "Port A, Pin0"] #[inline(always)] pub fn is_pa0(&self) -> bool { - *self == POSSEL_A::PA0 + *self == Possel::Pa0 } - #[doc = "Checks if the value of the field is `PA1`"] + #[doc = "Port A, Pin1"] #[inline(always)] pub fn is_pa1(&self) -> bool { - *self == POSSEL_A::PA1 + *self == Possel::Pa1 } - #[doc = "Checks if the value of the field is `PA2`"] + #[doc = "Port A, Pin2"] #[inline(always)] pub fn is_pa2(&self) -> bool { - *self == POSSEL_A::PA2 + *self == Possel::Pa2 } - #[doc = "Checks if the value of the field is `PA3`"] + #[doc = "Port A, Pin3"] #[inline(always)] pub fn is_pa3(&self) -> bool { - *self == POSSEL_A::PA3 + *self == Possel::Pa3 } - #[doc = "Checks if the value of the field is `PA4`"] + #[doc = "Port A, Pin4"] #[inline(always)] pub fn is_pa4(&self) -> bool { - *self == POSSEL_A::PA4 + *self == Possel::Pa4 } - #[doc = "Checks if the value of the field is `PA5`"] + #[doc = "Port A, Pin5"] #[inline(always)] pub fn is_pa5(&self) -> bool { - *self == POSSEL_A::PA5 + *self == Possel::Pa5 } - #[doc = "Checks if the value of the field is `PA6`"] + #[doc = "Port A, Pin6"] #[inline(always)] pub fn is_pa6(&self) -> bool { - *self == POSSEL_A::PA6 + *self == Possel::Pa6 } - #[doc = "Checks if the value of the field is `PA7`"] + #[doc = "Port A, Pin7"] #[inline(always)] pub fn is_pa7(&self) -> bool { - *self == POSSEL_A::PA7 + *self == Possel::Pa7 } - #[doc = "Checks if the value of the field is `PA8`"] + #[doc = "Port A, Pin8"] #[inline(always)] pub fn is_pa8(&self) -> bool { - *self == POSSEL_A::PA8 + *self == Possel::Pa8 } - #[doc = "Checks if the value of the field is `PA9`"] + #[doc = "Port A, Pin9"] #[inline(always)] pub fn is_pa9(&self) -> bool { - *self == POSSEL_A::PA9 + *self == Possel::Pa9 } - #[doc = "Checks if the value of the field is `PA10`"] + #[doc = "Port A, Pin10"] #[inline(always)] pub fn is_pa10(&self) -> bool { - *self == POSSEL_A::PA10 + *self == Possel::Pa10 } - #[doc = "Checks if the value of the field is `PA11`"] + #[doc = "Port A, Pin11"] #[inline(always)] pub fn is_pa11(&self) -> bool { - *self == POSSEL_A::PA11 + *self == Possel::Pa11 } - #[doc = "Checks if the value of the field is `PA12`"] + #[doc = "Port A, Pin12"] #[inline(always)] pub fn is_pa12(&self) -> bool { - *self == POSSEL_A::PA12 + *self == Possel::Pa12 } - #[doc = "Checks if the value of the field is `PA13`"] + #[doc = "Port A, Pin13"] #[inline(always)] pub fn is_pa13(&self) -> bool { - *self == POSSEL_A::PA13 + *self == Possel::Pa13 } - #[doc = "Checks if the value of the field is `PA14`"] + #[doc = "Port A, Pin14"] #[inline(always)] pub fn is_pa14(&self) -> bool { - *self == POSSEL_A::PA14 + *self == Possel::Pa14 } - #[doc = "Checks if the value of the field is `PA15`"] + #[doc = "Port A, Pin15"] #[inline(always)] pub fn is_pa15(&self) -> bool { - *self == POSSEL_A::PA15 + *self == Possel::Pa15 } - #[doc = "Checks if the value of the field is `PB0`"] + #[doc = "Port B, Pin0"] #[inline(always)] pub fn is_pb0(&self) -> bool { - *self == POSSEL_A::PB0 + *self == Possel::Pb0 } - #[doc = "Checks if the value of the field is `PB1`"] + #[doc = "Port B, Pin1"] #[inline(always)] pub fn is_pb1(&self) -> bool { - *self == POSSEL_A::PB1 + *self == Possel::Pb1 } - #[doc = "Checks if the value of the field is `PB2`"] + #[doc = "Port B, Pin2"] #[inline(always)] pub fn is_pb2(&self) -> bool { - *self == POSSEL_A::PB2 + *self == Possel::Pb2 } - #[doc = "Checks if the value of the field is `PB3`"] + #[doc = "Port B, Pin3"] #[inline(always)] pub fn is_pb3(&self) -> bool { - *self == POSSEL_A::PB3 + *self == Possel::Pb3 } - #[doc = "Checks if the value of the field is `PB4`"] + #[doc = "Port B, Pin4"] #[inline(always)] pub fn is_pb4(&self) -> bool { - *self == POSSEL_A::PB4 + *self == Possel::Pb4 } - #[doc = "Checks if the value of the field is `PB5`"] + #[doc = "Port B, Pin5"] #[inline(always)] pub fn is_pb5(&self) -> bool { - *self == POSSEL_A::PB5 + *self == Possel::Pb5 } - #[doc = "Checks if the value of the field is `PB6`"] + #[doc = "Port B, Pin6"] #[inline(always)] pub fn is_pb6(&self) -> bool { - *self == POSSEL_A::PB6 + *self == Possel::Pb6 } - #[doc = "Checks if the value of the field is `PB7`"] + #[doc = "Port B, Pin7"] #[inline(always)] pub fn is_pb7(&self) -> bool { - *self == POSSEL_A::PB7 + *self == Possel::Pb7 } - #[doc = "Checks if the value of the field is `PB8`"] + #[doc = "Port B, Pin8"] #[inline(always)] pub fn is_pb8(&self) -> bool { - *self == POSSEL_A::PB8 + *self == Possel::Pb8 } - #[doc = "Checks if the value of the field is `PB9`"] + #[doc = "Port B, Pin9"] #[inline(always)] pub fn is_pb9(&self) -> bool { - *self == POSSEL_A::PB9 + *self == Possel::Pb9 } - #[doc = "Checks if the value of the field is `PB10`"] + #[doc = "Port B, Pin10"] #[inline(always)] pub fn is_pb10(&self) -> bool { - *self == POSSEL_A::PB10 + *self == Possel::Pb10 } - #[doc = "Checks if the value of the field is `PB11`"] + #[doc = "Port B, Pin11"] #[inline(always)] pub fn is_pb11(&self) -> bool { - *self == POSSEL_A::PB11 + *self == Possel::Pb11 } - #[doc = "Checks if the value of the field is `PB12`"] + #[doc = "Port B, Pin12"] #[inline(always)] pub fn is_pb12(&self) -> bool { - *self == POSSEL_A::PB12 + *self == Possel::Pb12 } - #[doc = "Checks if the value of the field is `PB13`"] + #[doc = "Port B, Pin13"] #[inline(always)] pub fn is_pb13(&self) -> bool { - *self == POSSEL_A::PB13 + *self == Possel::Pb13 } - #[doc = "Checks if the value of the field is `PB14`"] + #[doc = "Port B, Pin14"] #[inline(always)] pub fn is_pb14(&self) -> bool { - *self == POSSEL_A::PB14 + *self == Possel::Pb14 } - #[doc = "Checks if the value of the field is `PB15`"] + #[doc = "Port B, Pin15"] #[inline(always)] pub fn is_pb15(&self) -> bool { - *self == POSSEL_A::PB15 + *self == Possel::Pb15 } - #[doc = "Checks if the value of the field is `PC0`"] + #[doc = "Port C, Pin0"] #[inline(always)] pub fn is_pc0(&self) -> bool { - *self == POSSEL_A::PC0 + *self == Possel::Pc0 } - #[doc = "Checks if the value of the field is `PC1`"] + #[doc = "Port C, Pin1"] #[inline(always)] pub fn is_pc1(&self) -> bool { - *self == POSSEL_A::PC1 + *self == Possel::Pc1 } - #[doc = "Checks if the value of the field is `PC2`"] + #[doc = "Port C, Pin2"] #[inline(always)] pub fn is_pc2(&self) -> bool { - *self == POSSEL_A::PC2 + *self == Possel::Pc2 } - #[doc = "Checks if the value of the field is `PC3`"] + #[doc = "Port C, Pin3"] #[inline(always)] pub fn is_pc3(&self) -> bool { - *self == POSSEL_A::PC3 + *self == Possel::Pc3 } - #[doc = "Checks if the value of the field is `PC4`"] + #[doc = "Port C, Pin4"] #[inline(always)] pub fn is_pc4(&self) -> bool { - *self == POSSEL_A::PC4 + *self == Possel::Pc4 } - #[doc = "Checks if the value of the field is `PC5`"] + #[doc = "Port C, Pin5"] #[inline(always)] pub fn is_pc5(&self) -> bool { - *self == POSSEL_A::PC5 + *self == Possel::Pc5 } - #[doc = "Checks if the value of the field is `PC6`"] + #[doc = "Port C, Pin6"] #[inline(always)] pub fn is_pc6(&self) -> bool { - *self == POSSEL_A::PC6 + *self == Possel::Pc6 } - #[doc = "Checks if the value of the field is `PC7`"] + #[doc = "Port C, Pin7"] #[inline(always)] pub fn is_pc7(&self) -> bool { - *self == POSSEL_A::PC7 + *self == Possel::Pc7 } - #[doc = "Checks if the value of the field is `PC8`"] + #[doc = "Port C, Pin8"] #[inline(always)] pub fn is_pc8(&self) -> bool { - *self == POSSEL_A::PC8 + *self == Possel::Pc8 } - #[doc = "Checks if the value of the field is `PC9`"] + #[doc = "Port C, Pin9"] #[inline(always)] pub fn is_pc9(&self) -> bool { - *self == POSSEL_A::PC9 + *self == Possel::Pc9 } - #[doc = "Checks if the value of the field is `PC10`"] + #[doc = "Port C, Pin10"] #[inline(always)] pub fn is_pc10(&self) -> bool { - *self == POSSEL_A::PC10 + *self == Possel::Pc10 } - #[doc = "Checks if the value of the field is `PC11`"] + #[doc = "Port C, Pin11"] #[inline(always)] pub fn is_pc11(&self) -> bool { - *self == POSSEL_A::PC11 + *self == Possel::Pc11 } - #[doc = "Checks if the value of the field is `PC12`"] + #[doc = "Port C, Pin12"] #[inline(always)] pub fn is_pc12(&self) -> bool { - *self == POSSEL_A::PC12 + *self == Possel::Pc12 } - #[doc = "Checks if the value of the field is `PC13`"] + #[doc = "Port C, Pin13"] #[inline(always)] pub fn is_pc13(&self) -> bool { - *self == POSSEL_A::PC13 + *self == Possel::Pc13 } - #[doc = "Checks if the value of the field is `PC14`"] + #[doc = "Port C, Pin14"] #[inline(always)] pub fn is_pc14(&self) -> bool { - *self == POSSEL_A::PC14 + *self == Possel::Pc14 } - #[doc = "Checks if the value of the field is `PC15`"] + #[doc = "Port C, Pin15"] #[inline(always)] pub fn is_pc15(&self) -> bool { - *self == POSSEL_A::PC15 + *self == Possel::Pc15 } - #[doc = "Checks if the value of the field is `PD0`"] + #[doc = "Port D, Pin0"] #[inline(always)] pub fn is_pd0(&self) -> bool { - *self == POSSEL_A::PD0 + *self == Possel::Pd0 } - #[doc = "Checks if the value of the field is `PD1`"] + #[doc = "Port D, Pin1"] #[inline(always)] pub fn is_pd1(&self) -> bool { - *self == POSSEL_A::PD1 + *self == Possel::Pd1 } - #[doc = "Checks if the value of the field is `PD2`"] + #[doc = "Port D, Pin2"] #[inline(always)] pub fn is_pd2(&self) -> bool { - *self == POSSEL_A::PD2 + *self == Possel::Pd2 } - #[doc = "Checks if the value of the field is `PD3`"] + #[doc = "Port D, Pin3"] #[inline(always)] pub fn is_pd3(&self) -> bool { - *self == POSSEL_A::PD3 + *self == Possel::Pd3 } - #[doc = "Checks if the value of the field is `PD4`"] + #[doc = "Port D, Pin4"] #[inline(always)] pub fn is_pd4(&self) -> bool { - *self == POSSEL_A::PD4 + *self == Possel::Pd4 } - #[doc = "Checks if the value of the field is `PD5`"] + #[doc = "Port D, Pin5"] #[inline(always)] pub fn is_pd5(&self) -> bool { - *self == POSSEL_A::PD5 + *self == Possel::Pd5 } - #[doc = "Checks if the value of the field is `PD6`"] + #[doc = "Port D, Pin6"] #[inline(always)] pub fn is_pd6(&self) -> bool { - *self == POSSEL_A::PD6 + *self == Possel::Pd6 } - #[doc = "Checks if the value of the field is `PD7`"] + #[doc = "Port D, Pin7"] #[inline(always)] pub fn is_pd7(&self) -> bool { - *self == POSSEL_A::PD7 + *self == Possel::Pd7 } - #[doc = "Checks if the value of the field is `PD8`"] + #[doc = "Port D, Pin8"] #[inline(always)] pub fn is_pd8(&self) -> bool { - *self == POSSEL_A::PD8 + *self == Possel::Pd8 } - #[doc = "Checks if the value of the field is `PD9`"] + #[doc = "Port D, Pin9"] #[inline(always)] pub fn is_pd9(&self) -> bool { - *self == POSSEL_A::PD9 + *self == Possel::Pd9 } - #[doc = "Checks if the value of the field is `PD10`"] + #[doc = "Port D, Pin10"] #[inline(always)] pub fn is_pd10(&self) -> bool { - *self == POSSEL_A::PD10 + *self == Possel::Pd10 } - #[doc = "Checks if the value of the field is `PD11`"] + #[doc = "Port D, Pin11"] #[inline(always)] pub fn is_pd11(&self) -> bool { - *self == POSSEL_A::PD11 + *self == Possel::Pd11 } - #[doc = "Checks if the value of the field is `PD12`"] + #[doc = "Port D, Pin12"] #[inline(always)] pub fn is_pd12(&self) -> bool { - *self == POSSEL_A::PD12 + *self == Possel::Pd12 } - #[doc = "Checks if the value of the field is `PD13`"] + #[doc = "Port D, Pin13"] #[inline(always)] pub fn is_pd13(&self) -> bool { - *self == POSSEL_A::PD13 + *self == Possel::Pd13 } - #[doc = "Checks if the value of the field is `PD14`"] + #[doc = "Port D, Pin14"] #[inline(always)] pub fn is_pd14(&self) -> bool { - *self == POSSEL_A::PD14 + *self == Possel::Pd14 } - #[doc = "Checks if the value of the field is `PD15`"] + #[doc = "Port D, Pin15"] #[inline(always)] pub fn is_pd15(&self) -> bool { - *self == POSSEL_A::PD15 + *self == Possel::Pd15 } } #[doc = "Field `POSSEL` writer - Positive Input Select"] -pub type POSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, INPUTCTRL_SPEC, u8, POSSEL_A, 8, O>; -impl<'a, const O: u8> POSSEL_W<'a, O> { +pub type PosselW<'a, REG> = crate::FieldWriter<'a, REG, 8, Possel>; +impl<'a, REG> PosselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "VSS"] #[inline(always)] - pub fn vss(self) -> &'a mut W { - self.variant(POSSEL_A::VSS) + pub fn vss(self) -> &'a mut crate::W { + self.variant(Possel::Vss) } #[doc = "Divided AVDD"] #[inline(always)] - pub fn vrefdivavdd(self) -> &'a mut W { - self.variant(POSSEL_A::VREFDIVAVDD) + pub fn vrefdivavdd(self) -> &'a mut crate::W { + self.variant(Possel::Vrefdivavdd) } #[doc = "Low-Power Divided AVDD"] #[inline(always)] - pub fn vrefdivavddlp(self) -> &'a mut W { - self.variant(POSSEL_A::VREFDIVAVDDLP) + pub fn vrefdivavddlp(self) -> &'a mut crate::W { + self.variant(Possel::Vrefdivavddlp) } #[doc = "Divided 1V25 reference"] #[inline(always)] - pub fn vrefdiv1v25(self) -> &'a mut W { - self.variant(POSSEL_A::VREFDIV1V25) + pub fn vrefdiv1v25(self) -> &'a mut crate::W { + self.variant(Possel::Vrefdiv1v25) } #[doc = "Low-power Divided 1V25 reference"] #[inline(always)] - pub fn vrefdiv1v25lp(self) -> &'a mut W { - self.variant(POSSEL_A::VREFDIV1V25LP) + pub fn vrefdiv1v25lp(self) -> &'a mut crate::W { + self.variant(Possel::Vrefdiv1v25lp) } #[doc = "Divided 2V5 reference"] #[inline(always)] - pub fn vrefdiv2v5(self) -> &'a mut W { - self.variant(POSSEL_A::VREFDIV2V5) + pub fn vrefdiv2v5(self) -> &'a mut crate::W { + self.variant(Possel::Vrefdiv2v5) } #[doc = "Low-power Divided 2V5 reference"] #[inline(always)] - pub fn vrefdiv2v5lp(self) -> &'a mut W { - self.variant(POSSEL_A::VREFDIV2V5LP) + pub fn vrefdiv2v5lp(self) -> &'a mut crate::W { + self.variant(Possel::Vrefdiv2v5lp) } #[doc = "VSENSE0 divided by 4"] #[inline(always)] - pub fn vsense01div4(self) -> &'a mut W { - self.variant(POSSEL_A::VSENSE01DIV4) + pub fn vsense01div4(self) -> &'a mut crate::W { + self.variant(Possel::Vsense01div4) } #[doc = "Low-power VSENSE0 divided by 4"] #[inline(always)] - pub fn vsense01div4lp(self) -> &'a mut W { - self.variant(POSSEL_A::VSENSE01DIV4LP) + pub fn vsense01div4lp(self) -> &'a mut crate::W { + self.variant(Possel::Vsense01div4lp) } #[doc = "VSENSE1 divided by 4"] #[inline(always)] - pub fn vsense11div4(self) -> &'a mut W { - self.variant(POSSEL_A::VSENSE11DIV4) + pub fn vsense11div4(self) -> &'a mut crate::W { + self.variant(Possel::Vsense11div4) } #[doc = "Low-power VSENSE1 divided by 4"] #[inline(always)] - pub fn vsense11div4lp(self) -> &'a mut W { - self.variant(POSSEL_A::VSENSE11DIV4LP) + pub fn vsense11div4lp(self) -> &'a mut crate::W { + self.variant(Possel::Vsense11div4lp) } #[doc = "VDAC0 channel 0 output"] #[inline(always)] - pub fn vdacout0(self) -> &'a mut W { - self.variant(POSSEL_A::VDACOUT0) + pub fn vdacout0(self) -> &'a mut crate::W { + self.variant(Possel::Vdacout0) } #[doc = "VDAC0 channel 1 output"] #[inline(always)] - pub fn vdacout1(self) -> &'a mut W { - self.variant(POSSEL_A::VDACOUT1) + pub fn vdacout1(self) -> &'a mut crate::W { + self.variant(Possel::Vdacout1) } #[doc = "External interface, base is PA0."] #[inline(always)] - pub fn extpa(self) -> &'a mut W { - self.variant(POSSEL_A::EXTPA) + pub fn extpa(self) -> &'a mut crate::W { + self.variant(Possel::Extpa) } #[doc = "External interface, base is PB0."] #[inline(always)] - pub fn extpb(self) -> &'a mut W { - self.variant(POSSEL_A::EXTPB) + pub fn extpb(self) -> &'a mut crate::W { + self.variant(Possel::Extpb) } #[doc = "External interface, base is PC0."] #[inline(always)] - pub fn extpc(self) -> &'a mut W { - self.variant(POSSEL_A::EXTPC) + pub fn extpc(self) -> &'a mut crate::W { + self.variant(Possel::Extpc) } #[doc = "External interface, base is PD0."] #[inline(always)] - pub fn extpd(self) -> &'a mut W { - self.variant(POSSEL_A::EXTPD) + pub fn extpd(self) -> &'a mut crate::W { + self.variant(Possel::Extpd) } #[doc = "Port A, Pin0"] #[inline(always)] - pub fn pa0(self) -> &'a mut W { - self.variant(POSSEL_A::PA0) + pub fn pa0(self) -> &'a mut crate::W { + self.variant(Possel::Pa0) } #[doc = "Port A, Pin1"] #[inline(always)] - pub fn pa1(self) -> &'a mut W { - self.variant(POSSEL_A::PA1) + pub fn pa1(self) -> &'a mut crate::W { + self.variant(Possel::Pa1) } #[doc = "Port A, Pin2"] #[inline(always)] - pub fn pa2(self) -> &'a mut W { - self.variant(POSSEL_A::PA2) + pub fn pa2(self) -> &'a mut crate::W { + self.variant(Possel::Pa2) } #[doc = "Port A, Pin3"] #[inline(always)] - pub fn pa3(self) -> &'a mut W { - self.variant(POSSEL_A::PA3) + pub fn pa3(self) -> &'a mut crate::W { + self.variant(Possel::Pa3) } #[doc = "Port A, Pin4"] #[inline(always)] - pub fn pa4(self) -> &'a mut W { - self.variant(POSSEL_A::PA4) + pub fn pa4(self) -> &'a mut crate::W { + self.variant(Possel::Pa4) } #[doc = "Port A, Pin5"] #[inline(always)] - pub fn pa5(self) -> &'a mut W { - self.variant(POSSEL_A::PA5) + pub fn pa5(self) -> &'a mut crate::W { + self.variant(Possel::Pa5) } #[doc = "Port A, Pin6"] #[inline(always)] - pub fn pa6(self) -> &'a mut W { - self.variant(POSSEL_A::PA6) + pub fn pa6(self) -> &'a mut crate::W { + self.variant(Possel::Pa6) } #[doc = "Port A, Pin7"] #[inline(always)] - pub fn pa7(self) -> &'a mut W { - self.variant(POSSEL_A::PA7) + pub fn pa7(self) -> &'a mut crate::W { + self.variant(Possel::Pa7) } #[doc = "Port A, Pin8"] #[inline(always)] - pub fn pa8(self) -> &'a mut W { - self.variant(POSSEL_A::PA8) + pub fn pa8(self) -> &'a mut crate::W { + self.variant(Possel::Pa8) } #[doc = "Port A, Pin9"] #[inline(always)] - pub fn pa9(self) -> &'a mut W { - self.variant(POSSEL_A::PA9) + pub fn pa9(self) -> &'a mut crate::W { + self.variant(Possel::Pa9) } #[doc = "Port A, Pin10"] #[inline(always)] - pub fn pa10(self) -> &'a mut W { - self.variant(POSSEL_A::PA10) + pub fn pa10(self) -> &'a mut crate::W { + self.variant(Possel::Pa10) } #[doc = "Port A, Pin11"] #[inline(always)] - pub fn pa11(self) -> &'a mut W { - self.variant(POSSEL_A::PA11) + pub fn pa11(self) -> &'a mut crate::W { + self.variant(Possel::Pa11) } #[doc = "Port A, Pin12"] #[inline(always)] - pub fn pa12(self) -> &'a mut W { - self.variant(POSSEL_A::PA12) + pub fn pa12(self) -> &'a mut crate::W { + self.variant(Possel::Pa12) } #[doc = "Port A, Pin13"] #[inline(always)] - pub fn pa13(self) -> &'a mut W { - self.variant(POSSEL_A::PA13) + pub fn pa13(self) -> &'a mut crate::W { + self.variant(Possel::Pa13) } #[doc = "Port A, Pin14"] #[inline(always)] - pub fn pa14(self) -> &'a mut W { - self.variant(POSSEL_A::PA14) + pub fn pa14(self) -> &'a mut crate::W { + self.variant(Possel::Pa14) } #[doc = "Port A, Pin15"] #[inline(always)] - pub fn pa15(self) -> &'a mut W { - self.variant(POSSEL_A::PA15) + pub fn pa15(self) -> &'a mut crate::W { + self.variant(Possel::Pa15) } #[doc = "Port B, Pin0"] #[inline(always)] - pub fn pb0(self) -> &'a mut W { - self.variant(POSSEL_A::PB0) + pub fn pb0(self) -> &'a mut crate::W { + self.variant(Possel::Pb0) } #[doc = "Port B, Pin1"] #[inline(always)] - pub fn pb1(self) -> &'a mut W { - self.variant(POSSEL_A::PB1) + pub fn pb1(self) -> &'a mut crate::W { + self.variant(Possel::Pb1) } #[doc = "Port B, Pin2"] #[inline(always)] - pub fn pb2(self) -> &'a mut W { - self.variant(POSSEL_A::PB2) + pub fn pb2(self) -> &'a mut crate::W { + self.variant(Possel::Pb2) } #[doc = "Port B, Pin3"] #[inline(always)] - pub fn pb3(self) -> &'a mut W { - self.variant(POSSEL_A::PB3) + pub fn pb3(self) -> &'a mut crate::W { + self.variant(Possel::Pb3) } #[doc = "Port B, Pin4"] #[inline(always)] - pub fn pb4(self) -> &'a mut W { - self.variant(POSSEL_A::PB4) + pub fn pb4(self) -> &'a mut crate::W { + self.variant(Possel::Pb4) } #[doc = "Port B, Pin5"] #[inline(always)] - pub fn pb5(self) -> &'a mut W { - self.variant(POSSEL_A::PB5) + pub fn pb5(self) -> &'a mut crate::W { + self.variant(Possel::Pb5) } #[doc = "Port B, Pin6"] #[inline(always)] - pub fn pb6(self) -> &'a mut W { - self.variant(POSSEL_A::PB6) + pub fn pb6(self) -> &'a mut crate::W { + self.variant(Possel::Pb6) } #[doc = "Port B, Pin7"] #[inline(always)] - pub fn pb7(self) -> &'a mut W { - self.variant(POSSEL_A::PB7) + pub fn pb7(self) -> &'a mut crate::W { + self.variant(Possel::Pb7) } #[doc = "Port B, Pin8"] #[inline(always)] - pub fn pb8(self) -> &'a mut W { - self.variant(POSSEL_A::PB8) + pub fn pb8(self) -> &'a mut crate::W { + self.variant(Possel::Pb8) } #[doc = "Port B, Pin9"] #[inline(always)] - pub fn pb9(self) -> &'a mut W { - self.variant(POSSEL_A::PB9) + pub fn pb9(self) -> &'a mut crate::W { + self.variant(Possel::Pb9) } #[doc = "Port B, Pin10"] #[inline(always)] - pub fn pb10(self) -> &'a mut W { - self.variant(POSSEL_A::PB10) + pub fn pb10(self) -> &'a mut crate::W { + self.variant(Possel::Pb10) } #[doc = "Port B, Pin11"] #[inline(always)] - pub fn pb11(self) -> &'a mut W { - self.variant(POSSEL_A::PB11) + pub fn pb11(self) -> &'a mut crate::W { + self.variant(Possel::Pb11) } #[doc = "Port B, Pin12"] #[inline(always)] - pub fn pb12(self) -> &'a mut W { - self.variant(POSSEL_A::PB12) + pub fn pb12(self) -> &'a mut crate::W { + self.variant(Possel::Pb12) } #[doc = "Port B, Pin13"] #[inline(always)] - pub fn pb13(self) -> &'a mut W { - self.variant(POSSEL_A::PB13) + pub fn pb13(self) -> &'a mut crate::W { + self.variant(Possel::Pb13) } #[doc = "Port B, Pin14"] #[inline(always)] - pub fn pb14(self) -> &'a mut W { - self.variant(POSSEL_A::PB14) + pub fn pb14(self) -> &'a mut crate::W { + self.variant(Possel::Pb14) } #[doc = "Port B, Pin15"] #[inline(always)] - pub fn pb15(self) -> &'a mut W { - self.variant(POSSEL_A::PB15) + pub fn pb15(self) -> &'a mut crate::W { + self.variant(Possel::Pb15) } #[doc = "Port C, Pin0"] #[inline(always)] - pub fn pc0(self) -> &'a mut W { - self.variant(POSSEL_A::PC0) + pub fn pc0(self) -> &'a mut crate::W { + self.variant(Possel::Pc0) } #[doc = "Port C, Pin1"] #[inline(always)] - pub fn pc1(self) -> &'a mut W { - self.variant(POSSEL_A::PC1) + pub fn pc1(self) -> &'a mut crate::W { + self.variant(Possel::Pc1) } #[doc = "Port C, Pin2"] #[inline(always)] - pub fn pc2(self) -> &'a mut W { - self.variant(POSSEL_A::PC2) + pub fn pc2(self) -> &'a mut crate::W { + self.variant(Possel::Pc2) } #[doc = "Port C, Pin3"] #[inline(always)] - pub fn pc3(self) -> &'a mut W { - self.variant(POSSEL_A::PC3) + pub fn pc3(self) -> &'a mut crate::W { + self.variant(Possel::Pc3) } #[doc = "Port C, Pin4"] #[inline(always)] - pub fn pc4(self) -> &'a mut W { - self.variant(POSSEL_A::PC4) + pub fn pc4(self) -> &'a mut crate::W { + self.variant(Possel::Pc4) } #[doc = "Port C, Pin5"] #[inline(always)] - pub fn pc5(self) -> &'a mut W { - self.variant(POSSEL_A::PC5) + pub fn pc5(self) -> &'a mut crate::W { + self.variant(Possel::Pc5) } #[doc = "Port C, Pin6"] #[inline(always)] - pub fn pc6(self) -> &'a mut W { - self.variant(POSSEL_A::PC6) + pub fn pc6(self) -> &'a mut crate::W { + self.variant(Possel::Pc6) } #[doc = "Port C, Pin7"] #[inline(always)] - pub fn pc7(self) -> &'a mut W { - self.variant(POSSEL_A::PC7) + pub fn pc7(self) -> &'a mut crate::W { + self.variant(Possel::Pc7) } #[doc = "Port C, Pin8"] #[inline(always)] - pub fn pc8(self) -> &'a mut W { - self.variant(POSSEL_A::PC8) + pub fn pc8(self) -> &'a mut crate::W { + self.variant(Possel::Pc8) } #[doc = "Port C, Pin9"] #[inline(always)] - pub fn pc9(self) -> &'a mut W { - self.variant(POSSEL_A::PC9) + pub fn pc9(self) -> &'a mut crate::W { + self.variant(Possel::Pc9) } #[doc = "Port C, Pin10"] #[inline(always)] - pub fn pc10(self) -> &'a mut W { - self.variant(POSSEL_A::PC10) + pub fn pc10(self) -> &'a mut crate::W { + self.variant(Possel::Pc10) } #[doc = "Port C, Pin11"] #[inline(always)] - pub fn pc11(self) -> &'a mut W { - self.variant(POSSEL_A::PC11) + pub fn pc11(self) -> &'a mut crate::W { + self.variant(Possel::Pc11) } #[doc = "Port C, Pin12"] #[inline(always)] - pub fn pc12(self) -> &'a mut W { - self.variant(POSSEL_A::PC12) + pub fn pc12(self) -> &'a mut crate::W { + self.variant(Possel::Pc12) } #[doc = "Port C, Pin13"] #[inline(always)] - pub fn pc13(self) -> &'a mut W { - self.variant(POSSEL_A::PC13) + pub fn pc13(self) -> &'a mut crate::W { + self.variant(Possel::Pc13) } #[doc = "Port C, Pin14"] #[inline(always)] - pub fn pc14(self) -> &'a mut W { - self.variant(POSSEL_A::PC14) + pub fn pc14(self) -> &'a mut crate::W { + self.variant(Possel::Pc14) } #[doc = "Port C, Pin15"] #[inline(always)] - pub fn pc15(self) -> &'a mut W { - self.variant(POSSEL_A::PC15) + pub fn pc15(self) -> &'a mut crate::W { + self.variant(Possel::Pc15) } #[doc = "Port D, Pin0"] #[inline(always)] - pub fn pd0(self) -> &'a mut W { - self.variant(POSSEL_A::PD0) + pub fn pd0(self) -> &'a mut crate::W { + self.variant(Possel::Pd0) } #[doc = "Port D, Pin1"] #[inline(always)] - pub fn pd1(self) -> &'a mut W { - self.variant(POSSEL_A::PD1) + pub fn pd1(self) -> &'a mut crate::W { + self.variant(Possel::Pd1) } #[doc = "Port D, Pin2"] #[inline(always)] - pub fn pd2(self) -> &'a mut W { - self.variant(POSSEL_A::PD2) + pub fn pd2(self) -> &'a mut crate::W { + self.variant(Possel::Pd2) } #[doc = "Port D, Pin3"] #[inline(always)] - pub fn pd3(self) -> &'a mut W { - self.variant(POSSEL_A::PD3) + pub fn pd3(self) -> &'a mut crate::W { + self.variant(Possel::Pd3) } #[doc = "Port D, Pin4"] #[inline(always)] - pub fn pd4(self) -> &'a mut W { - self.variant(POSSEL_A::PD4) + pub fn pd4(self) -> &'a mut crate::W { + self.variant(Possel::Pd4) } #[doc = "Port D, Pin5"] #[inline(always)] - pub fn pd5(self) -> &'a mut W { - self.variant(POSSEL_A::PD5) + pub fn pd5(self) -> &'a mut crate::W { + self.variant(Possel::Pd5) } #[doc = "Port D, Pin6"] #[inline(always)] - pub fn pd6(self) -> &'a mut W { - self.variant(POSSEL_A::PD6) + pub fn pd6(self) -> &'a mut crate::W { + self.variant(Possel::Pd6) } #[doc = "Port D, Pin7"] #[inline(always)] - pub fn pd7(self) -> &'a mut W { - self.variant(POSSEL_A::PD7) + pub fn pd7(self) -> &'a mut crate::W { + self.variant(Possel::Pd7) } #[doc = "Port D, Pin8"] #[inline(always)] - pub fn pd8(self) -> &'a mut W { - self.variant(POSSEL_A::PD8) + pub fn pd8(self) -> &'a mut crate::W { + self.variant(Possel::Pd8) } #[doc = "Port D, Pin9"] #[inline(always)] - pub fn pd9(self) -> &'a mut W { - self.variant(POSSEL_A::PD9) + pub fn pd9(self) -> &'a mut crate::W { + self.variant(Possel::Pd9) } #[doc = "Port D, Pin10"] #[inline(always)] - pub fn pd10(self) -> &'a mut W { - self.variant(POSSEL_A::PD10) + pub fn pd10(self) -> &'a mut crate::W { + self.variant(Possel::Pd10) } #[doc = "Port D, Pin11"] #[inline(always)] - pub fn pd11(self) -> &'a mut W { - self.variant(POSSEL_A::PD11) + pub fn pd11(self) -> &'a mut crate::W { + self.variant(Possel::Pd11) } #[doc = "Port D, Pin12"] #[inline(always)] - pub fn pd12(self) -> &'a mut W { - self.variant(POSSEL_A::PD12) + pub fn pd12(self) -> &'a mut crate::W { + self.variant(Possel::Pd12) } #[doc = "Port D, Pin13"] #[inline(always)] - pub fn pd13(self) -> &'a mut W { - self.variant(POSSEL_A::PD13) + pub fn pd13(self) -> &'a mut crate::W { + self.variant(Possel::Pd13) } #[doc = "Port D, Pin14"] #[inline(always)] - pub fn pd14(self) -> &'a mut W { - self.variant(POSSEL_A::PD14) + pub fn pd14(self) -> &'a mut crate::W { + self.variant(Possel::Pd14) } #[doc = "Port D, Pin15"] #[inline(always)] - pub fn pd15(self) -> &'a mut W { - self.variant(POSSEL_A::PD15) + pub fn pd15(self) -> &'a mut crate::W { + self.variant(Possel::Pd15) } } -#[doc = "Field `NEGSEL` reader - Negative Input Select"] -pub type NEGSEL_R = crate::FieldReader; #[doc = "Negative Input Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum NEGSEL_A { +pub enum Negsel { #[doc = "0: VSS"] - VSS = 0, + Vss = 0, #[doc = "16: Divided AVDD"] - VREFDIVAVDD = 16, + Vrefdivavdd = 16, #[doc = "17: Low-Power Divided AVDD"] - VREFDIVAVDDLP = 17, + Vrefdivavddlp = 17, #[doc = "18: Divided 1V25 reference"] - VREFDIV1V25 = 18, + Vrefdiv1v25 = 18, #[doc = "19: Low-power Divided 1V25 reference"] - VREFDIV1V25LP = 19, + Vrefdiv1v25lp = 19, #[doc = "20: Divided 2V5 reference"] - VREFDIV2V5 = 20, + Vrefdiv2v5 = 20, #[doc = "21: Low-power Divided 2V5 reference"] - VREFDIV2V5LP = 21, + Vrefdiv2v5lp = 21, #[doc = "32: VSENSE0 divided by 4"] - VSENSE01DIV4 = 32, + Vsense01div4 = 32, #[doc = "33: Low-power VSENSE0 divided by 4"] - VSENSE01DIV4LP = 33, + Vsense01div4lp = 33, #[doc = "34: VSENSE1 divided by 4"] - VSENSE11DIV4 = 34, + Vsense11div4 = 34, #[doc = "35: Low-power VSENSE1 divided by 4"] - VSENSE11DIV4LP = 35, - #[doc = "48: Capsense mode"] - CAPSENSE = 48, + Vsense11div4lp = 35, + #[doc = "48: Deprecated capacitive sensing feature, not recommended for new designs"] + Capsense = 48, #[doc = "64: VDAC0 channel 0 output"] - VDACOUT0 = 64, + Vdacout0 = 64, #[doc = "65: VDAC0 channel 1 output"] - VDACOUT1 = 65, + Vdacout1 = 65, #[doc = "128: Port A, Pin0"] - PA0 = 128, + Pa0 = 128, #[doc = "129: Port A, Pin1"] - PA1 = 129, + Pa1 = 129, #[doc = "130: Port A, Pin2"] - PA2 = 130, + Pa2 = 130, #[doc = "131: Port A, Pin3"] - PA3 = 131, + Pa3 = 131, #[doc = "132: Port A, Pin4"] - PA4 = 132, + Pa4 = 132, #[doc = "133: Port A, Pin5"] - PA5 = 133, + Pa5 = 133, #[doc = "134: Port A, Pin6"] - PA6 = 134, + Pa6 = 134, #[doc = "135: Port A, Pin7"] - PA7 = 135, + Pa7 = 135, #[doc = "136: Port A, Pin8"] - PA8 = 136, + Pa8 = 136, #[doc = "137: Port A, Pin9"] - PA9 = 137, + Pa9 = 137, #[doc = "138: Port A, Pin10"] - PA10 = 138, + Pa10 = 138, #[doc = "139: Port A, Pin11"] - PA11 = 139, + Pa11 = 139, #[doc = "140: Port A, Pin12"] - PA12 = 140, + Pa12 = 140, #[doc = "141: Port A, Pin13"] - PA13 = 141, + Pa13 = 141, #[doc = "142: Port A, Pin14"] - PA14 = 142, + Pa14 = 142, #[doc = "143: Port A, Pin15"] - PA15 = 143, + Pa15 = 143, #[doc = "144: Port B, Pin0"] - PB0 = 144, + Pb0 = 144, #[doc = "145: Port B, Pin1"] - PB1 = 145, + Pb1 = 145, #[doc = "146: Port B, Pin2"] - PB2 = 146, + Pb2 = 146, #[doc = "147: Port B, Pin3"] - PB3 = 147, + Pb3 = 147, #[doc = "148: Port B, Pin4"] - PB4 = 148, + Pb4 = 148, #[doc = "149: Port B, Pin5"] - PB5 = 149, + Pb5 = 149, #[doc = "150: Port B, Pin6"] - PB6 = 150, + Pb6 = 150, #[doc = "151: Port B, Pin7"] - PB7 = 151, + Pb7 = 151, #[doc = "152: Port B, Pin8"] - PB8 = 152, + Pb8 = 152, #[doc = "153: Port B, Pin9"] - PB9 = 153, + Pb9 = 153, #[doc = "154: Port B, Pin10"] - PB10 = 154, + Pb10 = 154, #[doc = "155: Port B, Pin11"] - PB11 = 155, + Pb11 = 155, #[doc = "156: Port B, Pin12"] - PB12 = 156, + Pb12 = 156, #[doc = "157: Port B, Pin13"] - PB13 = 157, + Pb13 = 157, #[doc = "158: Port B, Pin14"] - PB14 = 158, + Pb14 = 158, #[doc = "159: Port B, Pin15"] - PB15 = 159, + Pb15 = 159, #[doc = "160: Port C, Pin0"] - PC0 = 160, + Pc0 = 160, #[doc = "161: Port C, Pin1"] - PC1 = 161, + Pc1 = 161, #[doc = "162: Port C, Pin2"] - PC2 = 162, + Pc2 = 162, #[doc = "163: Port C, Pin3"] - PC3 = 163, + Pc3 = 163, #[doc = "164: Port C, Pin4"] - PC4 = 164, + Pc4 = 164, #[doc = "165: Port C, Pin5"] - PC5 = 165, + Pc5 = 165, #[doc = "166: Port C, Pin6"] - PC6 = 166, + Pc6 = 166, #[doc = "167: Port C, Pin7"] - PC7 = 167, + Pc7 = 167, #[doc = "168: Port C, Pin8"] - PC8 = 168, + Pc8 = 168, #[doc = "169: Port C, Pin9"] - PC9 = 169, + Pc9 = 169, #[doc = "170: Port C, Pin10"] - PC10 = 170, + Pc10 = 170, #[doc = "171: Port C, Pin11"] - PC11 = 171, + Pc11 = 171, #[doc = "172: Port C, Pin12"] - PC12 = 172, + Pc12 = 172, #[doc = "173: Port C, Pin13"] - PC13 = 173, + Pc13 = 173, #[doc = "174: Port C, Pin14"] - PC14 = 174, + Pc14 = 174, #[doc = "175: Port C, Pin15"] - PC15 = 175, + Pc15 = 175, #[doc = "176: Port D, Pin0"] - PD0 = 176, + Pd0 = 176, #[doc = "177: Port D, Pin1"] - PD1 = 177, + Pd1 = 177, #[doc = "178: Port D, Pin2"] - PD2 = 178, + Pd2 = 178, #[doc = "179: Port D, Pin3"] - PD3 = 179, + Pd3 = 179, #[doc = "180: Port D, Pin4"] - PD4 = 180, + Pd4 = 180, #[doc = "181: Port D, Pin5"] - PD5 = 181, + Pd5 = 181, #[doc = "182: Port D, Pin6"] - PD6 = 182, + Pd6 = 182, #[doc = "183: Port D, Pin7"] - PD7 = 183, + Pd7 = 183, #[doc = "184: Port D, Pin8"] - PD8 = 184, + Pd8 = 184, #[doc = "185: Port D, Pin9"] - PD9 = 185, + Pd9 = 185, #[doc = "186: Port D, Pin10"] - PD10 = 186, + Pd10 = 186, #[doc = "187: Port D, Pin11"] - PD11 = 187, + Pd11 = 187, #[doc = "188: Port D, Pin12"] - PD12 = 188, + Pd12 = 188, #[doc = "189: Port D, Pin13"] - PD13 = 189, + Pd13 = 189, #[doc = "190: Port D, Pin14"] - PD14 = 190, + Pd14 = 190, #[doc = "191: Port D, Pin15"] - PD15 = 191, + Pd15 = 191, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: NEGSEL_A) -> Self { + fn from(variant: Negsel) -> Self { variant as _ } } -impl NEGSEL_R { +impl crate::FieldSpec for Negsel { + type Ux = u8; +} +impl crate::IsEnum for Negsel {} +#[doc = "Field `NEGSEL` reader - Negative Input Select"] +pub type NegselR = crate::FieldReader; +impl NegselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(NEGSEL_A::VSS), - 16 => Some(NEGSEL_A::VREFDIVAVDD), - 17 => Some(NEGSEL_A::VREFDIVAVDDLP), - 18 => Some(NEGSEL_A::VREFDIV1V25), - 19 => Some(NEGSEL_A::VREFDIV1V25LP), - 20 => Some(NEGSEL_A::VREFDIV2V5), - 21 => Some(NEGSEL_A::VREFDIV2V5LP), - 32 => Some(NEGSEL_A::VSENSE01DIV4), - 33 => Some(NEGSEL_A::VSENSE01DIV4LP), - 34 => Some(NEGSEL_A::VSENSE11DIV4), - 35 => Some(NEGSEL_A::VSENSE11DIV4LP), - 48 => Some(NEGSEL_A::CAPSENSE), - 64 => Some(NEGSEL_A::VDACOUT0), - 65 => Some(NEGSEL_A::VDACOUT1), - 128 => Some(NEGSEL_A::PA0), - 129 => Some(NEGSEL_A::PA1), - 130 => Some(NEGSEL_A::PA2), - 131 => Some(NEGSEL_A::PA3), - 132 => Some(NEGSEL_A::PA4), - 133 => Some(NEGSEL_A::PA5), - 134 => Some(NEGSEL_A::PA6), - 135 => Some(NEGSEL_A::PA7), - 136 => Some(NEGSEL_A::PA8), - 137 => Some(NEGSEL_A::PA9), - 138 => Some(NEGSEL_A::PA10), - 139 => Some(NEGSEL_A::PA11), - 140 => Some(NEGSEL_A::PA12), - 141 => Some(NEGSEL_A::PA13), - 142 => Some(NEGSEL_A::PA14), - 143 => Some(NEGSEL_A::PA15), - 144 => Some(NEGSEL_A::PB0), - 145 => Some(NEGSEL_A::PB1), - 146 => Some(NEGSEL_A::PB2), - 147 => Some(NEGSEL_A::PB3), - 148 => Some(NEGSEL_A::PB4), - 149 => Some(NEGSEL_A::PB5), - 150 => Some(NEGSEL_A::PB6), - 151 => Some(NEGSEL_A::PB7), - 152 => Some(NEGSEL_A::PB8), - 153 => Some(NEGSEL_A::PB9), - 154 => Some(NEGSEL_A::PB10), - 155 => Some(NEGSEL_A::PB11), - 156 => Some(NEGSEL_A::PB12), - 157 => Some(NEGSEL_A::PB13), - 158 => Some(NEGSEL_A::PB14), - 159 => Some(NEGSEL_A::PB15), - 160 => Some(NEGSEL_A::PC0), - 161 => Some(NEGSEL_A::PC1), - 162 => Some(NEGSEL_A::PC2), - 163 => Some(NEGSEL_A::PC3), - 164 => Some(NEGSEL_A::PC4), - 165 => Some(NEGSEL_A::PC5), - 166 => Some(NEGSEL_A::PC6), - 167 => Some(NEGSEL_A::PC7), - 168 => Some(NEGSEL_A::PC8), - 169 => Some(NEGSEL_A::PC9), - 170 => Some(NEGSEL_A::PC10), - 171 => Some(NEGSEL_A::PC11), - 172 => Some(NEGSEL_A::PC12), - 173 => Some(NEGSEL_A::PC13), - 174 => Some(NEGSEL_A::PC14), - 175 => Some(NEGSEL_A::PC15), - 176 => Some(NEGSEL_A::PD0), - 177 => Some(NEGSEL_A::PD1), - 178 => Some(NEGSEL_A::PD2), - 179 => Some(NEGSEL_A::PD3), - 180 => Some(NEGSEL_A::PD4), - 181 => Some(NEGSEL_A::PD5), - 182 => Some(NEGSEL_A::PD6), - 183 => Some(NEGSEL_A::PD7), - 184 => Some(NEGSEL_A::PD8), - 185 => Some(NEGSEL_A::PD9), - 186 => Some(NEGSEL_A::PD10), - 187 => Some(NEGSEL_A::PD11), - 188 => Some(NEGSEL_A::PD12), - 189 => Some(NEGSEL_A::PD13), - 190 => Some(NEGSEL_A::PD14), - 191 => Some(NEGSEL_A::PD15), + 0 => Some(Negsel::Vss), + 16 => Some(Negsel::Vrefdivavdd), + 17 => Some(Negsel::Vrefdivavddlp), + 18 => Some(Negsel::Vrefdiv1v25), + 19 => Some(Negsel::Vrefdiv1v25lp), + 20 => Some(Negsel::Vrefdiv2v5), + 21 => Some(Negsel::Vrefdiv2v5lp), + 32 => Some(Negsel::Vsense01div4), + 33 => Some(Negsel::Vsense01div4lp), + 34 => Some(Negsel::Vsense11div4), + 35 => Some(Negsel::Vsense11div4lp), + 48 => Some(Negsel::Capsense), + 64 => Some(Negsel::Vdacout0), + 65 => Some(Negsel::Vdacout1), + 128 => Some(Negsel::Pa0), + 129 => Some(Negsel::Pa1), + 130 => Some(Negsel::Pa2), + 131 => Some(Negsel::Pa3), + 132 => Some(Negsel::Pa4), + 133 => Some(Negsel::Pa5), + 134 => Some(Negsel::Pa6), + 135 => Some(Negsel::Pa7), + 136 => Some(Negsel::Pa8), + 137 => Some(Negsel::Pa9), + 138 => Some(Negsel::Pa10), + 139 => Some(Negsel::Pa11), + 140 => Some(Negsel::Pa12), + 141 => Some(Negsel::Pa13), + 142 => Some(Negsel::Pa14), + 143 => Some(Negsel::Pa15), + 144 => Some(Negsel::Pb0), + 145 => Some(Negsel::Pb1), + 146 => Some(Negsel::Pb2), + 147 => Some(Negsel::Pb3), + 148 => Some(Negsel::Pb4), + 149 => Some(Negsel::Pb5), + 150 => Some(Negsel::Pb6), + 151 => Some(Negsel::Pb7), + 152 => Some(Negsel::Pb8), + 153 => Some(Negsel::Pb9), + 154 => Some(Negsel::Pb10), + 155 => Some(Negsel::Pb11), + 156 => Some(Negsel::Pb12), + 157 => Some(Negsel::Pb13), + 158 => Some(Negsel::Pb14), + 159 => Some(Negsel::Pb15), + 160 => Some(Negsel::Pc0), + 161 => Some(Negsel::Pc1), + 162 => Some(Negsel::Pc2), + 163 => Some(Negsel::Pc3), + 164 => Some(Negsel::Pc4), + 165 => Some(Negsel::Pc5), + 166 => Some(Negsel::Pc6), + 167 => Some(Negsel::Pc7), + 168 => Some(Negsel::Pc8), + 169 => Some(Negsel::Pc9), + 170 => Some(Negsel::Pc10), + 171 => Some(Negsel::Pc11), + 172 => Some(Negsel::Pc12), + 173 => Some(Negsel::Pc13), + 174 => Some(Negsel::Pc14), + 175 => Some(Negsel::Pc15), + 176 => Some(Negsel::Pd0), + 177 => Some(Negsel::Pd1), + 178 => Some(Negsel::Pd2), + 179 => Some(Negsel::Pd3), + 180 => Some(Negsel::Pd4), + 181 => Some(Negsel::Pd5), + 182 => Some(Negsel::Pd6), + 183 => Some(Negsel::Pd7), + 184 => Some(Negsel::Pd8), + 185 => Some(Negsel::Pd9), + 186 => Some(Negsel::Pd10), + 187 => Some(Negsel::Pd11), + 188 => Some(Negsel::Pd12), + 189 => Some(Negsel::Pd13), + 190 => Some(Negsel::Pd14), + 191 => Some(Negsel::Pd15), _ => None, } } - #[doc = "Checks if the value of the field is `VSS`"] + #[doc = "VSS"] #[inline(always)] pub fn is_vss(&self) -> bool { - *self == NEGSEL_A::VSS + *self == Negsel::Vss } - #[doc = "Checks if the value of the field is `VREFDIVAVDD`"] + #[doc = "Divided AVDD"] #[inline(always)] pub fn is_vrefdivavdd(&self) -> bool { - *self == NEGSEL_A::VREFDIVAVDD + *self == Negsel::Vrefdivavdd } - #[doc = "Checks if the value of the field is `VREFDIVAVDDLP`"] + #[doc = "Low-Power Divided AVDD"] #[inline(always)] pub fn is_vrefdivavddlp(&self) -> bool { - *self == NEGSEL_A::VREFDIVAVDDLP + *self == Negsel::Vrefdivavddlp } - #[doc = "Checks if the value of the field is `VREFDIV1V25`"] + #[doc = "Divided 1V25 reference"] #[inline(always)] pub fn is_vrefdiv1v25(&self) -> bool { - *self == NEGSEL_A::VREFDIV1V25 + *self == Negsel::Vrefdiv1v25 } - #[doc = "Checks if the value of the field is `VREFDIV1V25LP`"] + #[doc = "Low-power Divided 1V25 reference"] #[inline(always)] pub fn is_vrefdiv1v25lp(&self) -> bool { - *self == NEGSEL_A::VREFDIV1V25LP + *self == Negsel::Vrefdiv1v25lp } - #[doc = "Checks if the value of the field is `VREFDIV2V5`"] + #[doc = "Divided 2V5 reference"] #[inline(always)] pub fn is_vrefdiv2v5(&self) -> bool { - *self == NEGSEL_A::VREFDIV2V5 + *self == Negsel::Vrefdiv2v5 } - #[doc = "Checks if the value of the field is `VREFDIV2V5LP`"] + #[doc = "Low-power Divided 2V5 reference"] #[inline(always)] pub fn is_vrefdiv2v5lp(&self) -> bool { - *self == NEGSEL_A::VREFDIV2V5LP + *self == Negsel::Vrefdiv2v5lp } - #[doc = "Checks if the value of the field is `VSENSE01DIV4`"] + #[doc = "VSENSE0 divided by 4"] #[inline(always)] pub fn is_vsense01div4(&self) -> bool { - *self == NEGSEL_A::VSENSE01DIV4 + *self == Negsel::Vsense01div4 } - #[doc = "Checks if the value of the field is `VSENSE01DIV4LP`"] + #[doc = "Low-power VSENSE0 divided by 4"] #[inline(always)] pub fn is_vsense01div4lp(&self) -> bool { - *self == NEGSEL_A::VSENSE01DIV4LP + *self == Negsel::Vsense01div4lp } - #[doc = "Checks if the value of the field is `VSENSE11DIV4`"] + #[doc = "VSENSE1 divided by 4"] #[inline(always)] pub fn is_vsense11div4(&self) -> bool { - *self == NEGSEL_A::VSENSE11DIV4 + *self == Negsel::Vsense11div4 } - #[doc = "Checks if the value of the field is `VSENSE11DIV4LP`"] + #[doc = "Low-power VSENSE1 divided by 4"] #[inline(always)] pub fn is_vsense11div4lp(&self) -> bool { - *self == NEGSEL_A::VSENSE11DIV4LP + *self == Negsel::Vsense11div4lp } - #[doc = "Checks if the value of the field is `CAPSENSE`"] + #[doc = "Deprecated capacitive sensing feature, not recommended for new designs"] #[inline(always)] pub fn is_capsense(&self) -> bool { - *self == NEGSEL_A::CAPSENSE + *self == Negsel::Capsense } - #[doc = "Checks if the value of the field is `VDACOUT0`"] + #[doc = "VDAC0 channel 0 output"] #[inline(always)] pub fn is_vdacout0(&self) -> bool { - *self == NEGSEL_A::VDACOUT0 + *self == Negsel::Vdacout0 } - #[doc = "Checks if the value of the field is `VDACOUT1`"] + #[doc = "VDAC0 channel 1 output"] #[inline(always)] pub fn is_vdacout1(&self) -> bool { - *self == NEGSEL_A::VDACOUT1 + *self == Negsel::Vdacout1 } - #[doc = "Checks if the value of the field is `PA0`"] + #[doc = "Port A, Pin0"] #[inline(always)] pub fn is_pa0(&self) -> bool { - *self == NEGSEL_A::PA0 + *self == Negsel::Pa0 } - #[doc = "Checks if the value of the field is `PA1`"] + #[doc = "Port A, Pin1"] #[inline(always)] pub fn is_pa1(&self) -> bool { - *self == NEGSEL_A::PA1 + *self == Negsel::Pa1 } - #[doc = "Checks if the value of the field is `PA2`"] + #[doc = "Port A, Pin2"] #[inline(always)] pub fn is_pa2(&self) -> bool { - *self == NEGSEL_A::PA2 + *self == Negsel::Pa2 } - #[doc = "Checks if the value of the field is `PA3`"] + #[doc = "Port A, Pin3"] #[inline(always)] pub fn is_pa3(&self) -> bool { - *self == NEGSEL_A::PA3 + *self == Negsel::Pa3 } - #[doc = "Checks if the value of the field is `PA4`"] + #[doc = "Port A, Pin4"] #[inline(always)] pub fn is_pa4(&self) -> bool { - *self == NEGSEL_A::PA4 + *self == Negsel::Pa4 } - #[doc = "Checks if the value of the field is `PA5`"] + #[doc = "Port A, Pin5"] #[inline(always)] pub fn is_pa5(&self) -> bool { - *self == NEGSEL_A::PA5 + *self == Negsel::Pa5 } - #[doc = "Checks if the value of the field is `PA6`"] + #[doc = "Port A, Pin6"] #[inline(always)] pub fn is_pa6(&self) -> bool { - *self == NEGSEL_A::PA6 + *self == Negsel::Pa6 } - #[doc = "Checks if the value of the field is `PA7`"] + #[doc = "Port A, Pin7"] #[inline(always)] pub fn is_pa7(&self) -> bool { - *self == NEGSEL_A::PA7 + *self == Negsel::Pa7 } - #[doc = "Checks if the value of the field is `PA8`"] + #[doc = "Port A, Pin8"] #[inline(always)] pub fn is_pa8(&self) -> bool { - *self == NEGSEL_A::PA8 + *self == Negsel::Pa8 } - #[doc = "Checks if the value of the field is `PA9`"] + #[doc = "Port A, Pin9"] #[inline(always)] pub fn is_pa9(&self) -> bool { - *self == NEGSEL_A::PA9 + *self == Negsel::Pa9 } - #[doc = "Checks if the value of the field is `PA10`"] + #[doc = "Port A, Pin10"] #[inline(always)] pub fn is_pa10(&self) -> bool { - *self == NEGSEL_A::PA10 + *self == Negsel::Pa10 } - #[doc = "Checks if the value of the field is `PA11`"] + #[doc = "Port A, Pin11"] #[inline(always)] pub fn is_pa11(&self) -> bool { - *self == NEGSEL_A::PA11 + *self == Negsel::Pa11 } - #[doc = "Checks if the value of the field is `PA12`"] + #[doc = "Port A, Pin12"] #[inline(always)] pub fn is_pa12(&self) -> bool { - *self == NEGSEL_A::PA12 + *self == Negsel::Pa12 } - #[doc = "Checks if the value of the field is `PA13`"] + #[doc = "Port A, Pin13"] #[inline(always)] pub fn is_pa13(&self) -> bool { - *self == NEGSEL_A::PA13 + *self == Negsel::Pa13 } - #[doc = "Checks if the value of the field is `PA14`"] + #[doc = "Port A, Pin14"] #[inline(always)] pub fn is_pa14(&self) -> bool { - *self == NEGSEL_A::PA14 + *self == Negsel::Pa14 } - #[doc = "Checks if the value of the field is `PA15`"] + #[doc = "Port A, Pin15"] #[inline(always)] pub fn is_pa15(&self) -> bool { - *self == NEGSEL_A::PA15 + *self == Negsel::Pa15 } - #[doc = "Checks if the value of the field is `PB0`"] + #[doc = "Port B, Pin0"] #[inline(always)] pub fn is_pb0(&self) -> bool { - *self == NEGSEL_A::PB0 + *self == Negsel::Pb0 } - #[doc = "Checks if the value of the field is `PB1`"] + #[doc = "Port B, Pin1"] #[inline(always)] pub fn is_pb1(&self) -> bool { - *self == NEGSEL_A::PB1 + *self == Negsel::Pb1 } - #[doc = "Checks if the value of the field is `PB2`"] + #[doc = "Port B, Pin2"] #[inline(always)] pub fn is_pb2(&self) -> bool { - *self == NEGSEL_A::PB2 + *self == Negsel::Pb2 } - #[doc = "Checks if the value of the field is `PB3`"] + #[doc = "Port B, Pin3"] #[inline(always)] pub fn is_pb3(&self) -> bool { - *self == NEGSEL_A::PB3 + *self == Negsel::Pb3 } - #[doc = "Checks if the value of the field is `PB4`"] + #[doc = "Port B, Pin4"] #[inline(always)] pub fn is_pb4(&self) -> bool { - *self == NEGSEL_A::PB4 + *self == Negsel::Pb4 } - #[doc = "Checks if the value of the field is `PB5`"] + #[doc = "Port B, Pin5"] #[inline(always)] pub fn is_pb5(&self) -> bool { - *self == NEGSEL_A::PB5 + *self == Negsel::Pb5 } - #[doc = "Checks if the value of the field is `PB6`"] + #[doc = "Port B, Pin6"] #[inline(always)] pub fn is_pb6(&self) -> bool { - *self == NEGSEL_A::PB6 + *self == Negsel::Pb6 } - #[doc = "Checks if the value of the field is `PB7`"] + #[doc = "Port B, Pin7"] #[inline(always)] pub fn is_pb7(&self) -> bool { - *self == NEGSEL_A::PB7 + *self == Negsel::Pb7 } - #[doc = "Checks if the value of the field is `PB8`"] + #[doc = "Port B, Pin8"] #[inline(always)] pub fn is_pb8(&self) -> bool { - *self == NEGSEL_A::PB8 + *self == Negsel::Pb8 } - #[doc = "Checks if the value of the field is `PB9`"] + #[doc = "Port B, Pin9"] #[inline(always)] pub fn is_pb9(&self) -> bool { - *self == NEGSEL_A::PB9 + *self == Negsel::Pb9 } - #[doc = "Checks if the value of the field is `PB10`"] + #[doc = "Port B, Pin10"] #[inline(always)] pub fn is_pb10(&self) -> bool { - *self == NEGSEL_A::PB10 + *self == Negsel::Pb10 } - #[doc = "Checks if the value of the field is `PB11`"] + #[doc = "Port B, Pin11"] #[inline(always)] pub fn is_pb11(&self) -> bool { - *self == NEGSEL_A::PB11 + *self == Negsel::Pb11 } - #[doc = "Checks if the value of the field is `PB12`"] + #[doc = "Port B, Pin12"] #[inline(always)] pub fn is_pb12(&self) -> bool { - *self == NEGSEL_A::PB12 + *self == Negsel::Pb12 } - #[doc = "Checks if the value of the field is `PB13`"] + #[doc = "Port B, Pin13"] #[inline(always)] pub fn is_pb13(&self) -> bool { - *self == NEGSEL_A::PB13 + *self == Negsel::Pb13 } - #[doc = "Checks if the value of the field is `PB14`"] + #[doc = "Port B, Pin14"] #[inline(always)] pub fn is_pb14(&self) -> bool { - *self == NEGSEL_A::PB14 + *self == Negsel::Pb14 } - #[doc = "Checks if the value of the field is `PB15`"] + #[doc = "Port B, Pin15"] #[inline(always)] pub fn is_pb15(&self) -> bool { - *self == NEGSEL_A::PB15 + *self == Negsel::Pb15 } - #[doc = "Checks if the value of the field is `PC0`"] + #[doc = "Port C, Pin0"] #[inline(always)] pub fn is_pc0(&self) -> bool { - *self == NEGSEL_A::PC0 + *self == Negsel::Pc0 } - #[doc = "Checks if the value of the field is `PC1`"] + #[doc = "Port C, Pin1"] #[inline(always)] pub fn is_pc1(&self) -> bool { - *self == NEGSEL_A::PC1 + *self == Negsel::Pc1 } - #[doc = "Checks if the value of the field is `PC2`"] + #[doc = "Port C, Pin2"] #[inline(always)] pub fn is_pc2(&self) -> bool { - *self == NEGSEL_A::PC2 + *self == Negsel::Pc2 } - #[doc = "Checks if the value of the field is `PC3`"] + #[doc = "Port C, Pin3"] #[inline(always)] pub fn is_pc3(&self) -> bool { - *self == NEGSEL_A::PC3 + *self == Negsel::Pc3 } - #[doc = "Checks if the value of the field is `PC4`"] + #[doc = "Port C, Pin4"] #[inline(always)] pub fn is_pc4(&self) -> bool { - *self == NEGSEL_A::PC4 + *self == Negsel::Pc4 } - #[doc = "Checks if the value of the field is `PC5`"] + #[doc = "Port C, Pin5"] #[inline(always)] pub fn is_pc5(&self) -> bool { - *self == NEGSEL_A::PC5 + *self == Negsel::Pc5 } - #[doc = "Checks if the value of the field is `PC6`"] + #[doc = "Port C, Pin6"] #[inline(always)] pub fn is_pc6(&self) -> bool { - *self == NEGSEL_A::PC6 + *self == Negsel::Pc6 } - #[doc = "Checks if the value of the field is `PC7`"] + #[doc = "Port C, Pin7"] #[inline(always)] pub fn is_pc7(&self) -> bool { - *self == NEGSEL_A::PC7 + *self == Negsel::Pc7 } - #[doc = "Checks if the value of the field is `PC8`"] + #[doc = "Port C, Pin8"] #[inline(always)] pub fn is_pc8(&self) -> bool { - *self == NEGSEL_A::PC8 + *self == Negsel::Pc8 } - #[doc = "Checks if the value of the field is `PC9`"] + #[doc = "Port C, Pin9"] #[inline(always)] pub fn is_pc9(&self) -> bool { - *self == NEGSEL_A::PC9 + *self == Negsel::Pc9 } - #[doc = "Checks if the value of the field is `PC10`"] + #[doc = "Port C, Pin10"] #[inline(always)] pub fn is_pc10(&self) -> bool { - *self == NEGSEL_A::PC10 + *self == Negsel::Pc10 } - #[doc = "Checks if the value of the field is `PC11`"] + #[doc = "Port C, Pin11"] #[inline(always)] pub fn is_pc11(&self) -> bool { - *self == NEGSEL_A::PC11 + *self == Negsel::Pc11 } - #[doc = "Checks if the value of the field is `PC12`"] + #[doc = "Port C, Pin12"] #[inline(always)] pub fn is_pc12(&self) -> bool { - *self == NEGSEL_A::PC12 + *self == Negsel::Pc12 } - #[doc = "Checks if the value of the field is `PC13`"] + #[doc = "Port C, Pin13"] #[inline(always)] pub fn is_pc13(&self) -> bool { - *self == NEGSEL_A::PC13 + *self == Negsel::Pc13 } - #[doc = "Checks if the value of the field is `PC14`"] + #[doc = "Port C, Pin14"] #[inline(always)] pub fn is_pc14(&self) -> bool { - *self == NEGSEL_A::PC14 + *self == Negsel::Pc14 } - #[doc = "Checks if the value of the field is `PC15`"] + #[doc = "Port C, Pin15"] #[inline(always)] pub fn is_pc15(&self) -> bool { - *self == NEGSEL_A::PC15 + *self == Negsel::Pc15 } - #[doc = "Checks if the value of the field is `PD0`"] + #[doc = "Port D, Pin0"] #[inline(always)] pub fn is_pd0(&self) -> bool { - *self == NEGSEL_A::PD0 + *self == Negsel::Pd0 } - #[doc = "Checks if the value of the field is `PD1`"] + #[doc = "Port D, Pin1"] #[inline(always)] pub fn is_pd1(&self) -> bool { - *self == NEGSEL_A::PD1 + *self == Negsel::Pd1 } - #[doc = "Checks if the value of the field is `PD2`"] + #[doc = "Port D, Pin2"] #[inline(always)] pub fn is_pd2(&self) -> bool { - *self == NEGSEL_A::PD2 + *self == Negsel::Pd2 } - #[doc = "Checks if the value of the field is `PD3`"] + #[doc = "Port D, Pin3"] #[inline(always)] pub fn is_pd3(&self) -> bool { - *self == NEGSEL_A::PD3 + *self == Negsel::Pd3 } - #[doc = "Checks if the value of the field is `PD4`"] + #[doc = "Port D, Pin4"] #[inline(always)] pub fn is_pd4(&self) -> bool { - *self == NEGSEL_A::PD4 + *self == Negsel::Pd4 } - #[doc = "Checks if the value of the field is `PD5`"] + #[doc = "Port D, Pin5"] #[inline(always)] pub fn is_pd5(&self) -> bool { - *self == NEGSEL_A::PD5 + *self == Negsel::Pd5 } - #[doc = "Checks if the value of the field is `PD6`"] + #[doc = "Port D, Pin6"] #[inline(always)] pub fn is_pd6(&self) -> bool { - *self == NEGSEL_A::PD6 + *self == Negsel::Pd6 } - #[doc = "Checks if the value of the field is `PD7`"] + #[doc = "Port D, Pin7"] #[inline(always)] pub fn is_pd7(&self) -> bool { - *self == NEGSEL_A::PD7 + *self == Negsel::Pd7 } - #[doc = "Checks if the value of the field is `PD8`"] + #[doc = "Port D, Pin8"] #[inline(always)] pub fn is_pd8(&self) -> bool { - *self == NEGSEL_A::PD8 + *self == Negsel::Pd8 } - #[doc = "Checks if the value of the field is `PD9`"] + #[doc = "Port D, Pin9"] #[inline(always)] pub fn is_pd9(&self) -> bool { - *self == NEGSEL_A::PD9 + *self == Negsel::Pd9 } - #[doc = "Checks if the value of the field is `PD10`"] + #[doc = "Port D, Pin10"] #[inline(always)] pub fn is_pd10(&self) -> bool { - *self == NEGSEL_A::PD10 + *self == Negsel::Pd10 } - #[doc = "Checks if the value of the field is `PD11`"] + #[doc = "Port D, Pin11"] #[inline(always)] pub fn is_pd11(&self) -> bool { - *self == NEGSEL_A::PD11 + *self == Negsel::Pd11 } - #[doc = "Checks if the value of the field is `PD12`"] + #[doc = "Port D, Pin12"] #[inline(always)] pub fn is_pd12(&self) -> bool { - *self == NEGSEL_A::PD12 + *self == Negsel::Pd12 } - #[doc = "Checks if the value of the field is `PD13`"] + #[doc = "Port D, Pin13"] #[inline(always)] pub fn is_pd13(&self) -> bool { - *self == NEGSEL_A::PD13 + *self == Negsel::Pd13 } - #[doc = "Checks if the value of the field is `PD14`"] + #[doc = "Port D, Pin14"] #[inline(always)] pub fn is_pd14(&self) -> bool { - *self == NEGSEL_A::PD14 + *self == Negsel::Pd14 } - #[doc = "Checks if the value of the field is `PD15`"] + #[doc = "Port D, Pin15"] #[inline(always)] pub fn is_pd15(&self) -> bool { - *self == NEGSEL_A::PD15 + *self == Negsel::Pd15 } } #[doc = "Field `NEGSEL` writer - Negative Input Select"] -pub type NEGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, INPUTCTRL_SPEC, u8, NEGSEL_A, 8, O>; -impl<'a, const O: u8> NEGSEL_W<'a, O> { +pub type NegselW<'a, REG> = crate::FieldWriter<'a, REG, 8, Negsel>; +impl<'a, REG> NegselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "VSS"] #[inline(always)] - pub fn vss(self) -> &'a mut W { - self.variant(NEGSEL_A::VSS) + pub fn vss(self) -> &'a mut crate::W { + self.variant(Negsel::Vss) } #[doc = "Divided AVDD"] #[inline(always)] - pub fn vrefdivavdd(self) -> &'a mut W { - self.variant(NEGSEL_A::VREFDIVAVDD) + pub fn vrefdivavdd(self) -> &'a mut crate::W { + self.variant(Negsel::Vrefdivavdd) } #[doc = "Low-Power Divided AVDD"] #[inline(always)] - pub fn vrefdivavddlp(self) -> &'a mut W { - self.variant(NEGSEL_A::VREFDIVAVDDLP) + pub fn vrefdivavddlp(self) -> &'a mut crate::W { + self.variant(Negsel::Vrefdivavddlp) } #[doc = "Divided 1V25 reference"] #[inline(always)] - pub fn vrefdiv1v25(self) -> &'a mut W { - self.variant(NEGSEL_A::VREFDIV1V25) + pub fn vrefdiv1v25(self) -> &'a mut crate::W { + self.variant(Negsel::Vrefdiv1v25) } #[doc = "Low-power Divided 1V25 reference"] #[inline(always)] - pub fn vrefdiv1v25lp(self) -> &'a mut W { - self.variant(NEGSEL_A::VREFDIV1V25LP) + pub fn vrefdiv1v25lp(self) -> &'a mut crate::W { + self.variant(Negsel::Vrefdiv1v25lp) } #[doc = "Divided 2V5 reference"] #[inline(always)] - pub fn vrefdiv2v5(self) -> &'a mut W { - self.variant(NEGSEL_A::VREFDIV2V5) + pub fn vrefdiv2v5(self) -> &'a mut crate::W { + self.variant(Negsel::Vrefdiv2v5) } #[doc = "Low-power Divided 2V5 reference"] #[inline(always)] - pub fn vrefdiv2v5lp(self) -> &'a mut W { - self.variant(NEGSEL_A::VREFDIV2V5LP) + pub fn vrefdiv2v5lp(self) -> &'a mut crate::W { + self.variant(Negsel::Vrefdiv2v5lp) } #[doc = "VSENSE0 divided by 4"] #[inline(always)] - pub fn vsense01div4(self) -> &'a mut W { - self.variant(NEGSEL_A::VSENSE01DIV4) + pub fn vsense01div4(self) -> &'a mut crate::W { + self.variant(Negsel::Vsense01div4) } #[doc = "Low-power VSENSE0 divided by 4"] #[inline(always)] - pub fn vsense01div4lp(self) -> &'a mut W { - self.variant(NEGSEL_A::VSENSE01DIV4LP) + pub fn vsense01div4lp(self) -> &'a mut crate::W { + self.variant(Negsel::Vsense01div4lp) } #[doc = "VSENSE1 divided by 4"] #[inline(always)] - pub fn vsense11div4(self) -> &'a mut W { - self.variant(NEGSEL_A::VSENSE11DIV4) + pub fn vsense11div4(self) -> &'a mut crate::W { + self.variant(Negsel::Vsense11div4) } #[doc = "Low-power VSENSE1 divided by 4"] #[inline(always)] - pub fn vsense11div4lp(self) -> &'a mut W { - self.variant(NEGSEL_A::VSENSE11DIV4LP) + pub fn vsense11div4lp(self) -> &'a mut crate::W { + self.variant(Negsel::Vsense11div4lp) } - #[doc = "Capsense mode"] + #[doc = "Deprecated capacitive sensing feature, not recommended for new designs"] #[inline(always)] - pub fn capsense(self) -> &'a mut W { - self.variant(NEGSEL_A::CAPSENSE) + pub fn capsense(self) -> &'a mut crate::W { + self.variant(Negsel::Capsense) } #[doc = "VDAC0 channel 0 output"] #[inline(always)] - pub fn vdacout0(self) -> &'a mut W { - self.variant(NEGSEL_A::VDACOUT0) + pub fn vdacout0(self) -> &'a mut crate::W { + self.variant(Negsel::Vdacout0) } #[doc = "VDAC0 channel 1 output"] #[inline(always)] - pub fn vdacout1(self) -> &'a mut W { - self.variant(NEGSEL_A::VDACOUT1) + pub fn vdacout1(self) -> &'a mut crate::W { + self.variant(Negsel::Vdacout1) } #[doc = "Port A, Pin0"] #[inline(always)] - pub fn pa0(self) -> &'a mut W { - self.variant(NEGSEL_A::PA0) + pub fn pa0(self) -> &'a mut crate::W { + self.variant(Negsel::Pa0) } #[doc = "Port A, Pin1"] #[inline(always)] - pub fn pa1(self) -> &'a mut W { - self.variant(NEGSEL_A::PA1) + pub fn pa1(self) -> &'a mut crate::W { + self.variant(Negsel::Pa1) } #[doc = "Port A, Pin2"] #[inline(always)] - pub fn pa2(self) -> &'a mut W { - self.variant(NEGSEL_A::PA2) + pub fn pa2(self) -> &'a mut crate::W { + self.variant(Negsel::Pa2) } #[doc = "Port A, Pin3"] #[inline(always)] - pub fn pa3(self) -> &'a mut W { - self.variant(NEGSEL_A::PA3) + pub fn pa3(self) -> &'a mut crate::W { + self.variant(Negsel::Pa3) } #[doc = "Port A, Pin4"] #[inline(always)] - pub fn pa4(self) -> &'a mut W { - self.variant(NEGSEL_A::PA4) + pub fn pa4(self) -> &'a mut crate::W { + self.variant(Negsel::Pa4) } #[doc = "Port A, Pin5"] #[inline(always)] - pub fn pa5(self) -> &'a mut W { - self.variant(NEGSEL_A::PA5) + pub fn pa5(self) -> &'a mut crate::W { + self.variant(Negsel::Pa5) } #[doc = "Port A, Pin6"] #[inline(always)] - pub fn pa6(self) -> &'a mut W { - self.variant(NEGSEL_A::PA6) + pub fn pa6(self) -> &'a mut crate::W { + self.variant(Negsel::Pa6) } #[doc = "Port A, Pin7"] #[inline(always)] - pub fn pa7(self) -> &'a mut W { - self.variant(NEGSEL_A::PA7) + pub fn pa7(self) -> &'a mut crate::W { + self.variant(Negsel::Pa7) } #[doc = "Port A, Pin8"] #[inline(always)] - pub fn pa8(self) -> &'a mut W { - self.variant(NEGSEL_A::PA8) + pub fn pa8(self) -> &'a mut crate::W { + self.variant(Negsel::Pa8) } #[doc = "Port A, Pin9"] #[inline(always)] - pub fn pa9(self) -> &'a mut W { - self.variant(NEGSEL_A::PA9) + pub fn pa9(self) -> &'a mut crate::W { + self.variant(Negsel::Pa9) } #[doc = "Port A, Pin10"] #[inline(always)] - pub fn pa10(self) -> &'a mut W { - self.variant(NEGSEL_A::PA10) + pub fn pa10(self) -> &'a mut crate::W { + self.variant(Negsel::Pa10) } #[doc = "Port A, Pin11"] #[inline(always)] - pub fn pa11(self) -> &'a mut W { - self.variant(NEGSEL_A::PA11) + pub fn pa11(self) -> &'a mut crate::W { + self.variant(Negsel::Pa11) } #[doc = "Port A, Pin12"] #[inline(always)] - pub fn pa12(self) -> &'a mut W { - self.variant(NEGSEL_A::PA12) + pub fn pa12(self) -> &'a mut crate::W { + self.variant(Negsel::Pa12) } #[doc = "Port A, Pin13"] #[inline(always)] - pub fn pa13(self) -> &'a mut W { - self.variant(NEGSEL_A::PA13) + pub fn pa13(self) -> &'a mut crate::W { + self.variant(Negsel::Pa13) } #[doc = "Port A, Pin14"] #[inline(always)] - pub fn pa14(self) -> &'a mut W { - self.variant(NEGSEL_A::PA14) + pub fn pa14(self) -> &'a mut crate::W { + self.variant(Negsel::Pa14) } #[doc = "Port A, Pin15"] #[inline(always)] - pub fn pa15(self) -> &'a mut W { - self.variant(NEGSEL_A::PA15) + pub fn pa15(self) -> &'a mut crate::W { + self.variant(Negsel::Pa15) } #[doc = "Port B, Pin0"] #[inline(always)] - pub fn pb0(self) -> &'a mut W { - self.variant(NEGSEL_A::PB0) + pub fn pb0(self) -> &'a mut crate::W { + self.variant(Negsel::Pb0) } #[doc = "Port B, Pin1"] #[inline(always)] - pub fn pb1(self) -> &'a mut W { - self.variant(NEGSEL_A::PB1) + pub fn pb1(self) -> &'a mut crate::W { + self.variant(Negsel::Pb1) } #[doc = "Port B, Pin2"] #[inline(always)] - pub fn pb2(self) -> &'a mut W { - self.variant(NEGSEL_A::PB2) + pub fn pb2(self) -> &'a mut crate::W { + self.variant(Negsel::Pb2) } #[doc = "Port B, Pin3"] #[inline(always)] - pub fn pb3(self) -> &'a mut W { - self.variant(NEGSEL_A::PB3) + pub fn pb3(self) -> &'a mut crate::W { + self.variant(Negsel::Pb3) } #[doc = "Port B, Pin4"] #[inline(always)] - pub fn pb4(self) -> &'a mut W { - self.variant(NEGSEL_A::PB4) + pub fn pb4(self) -> &'a mut crate::W { + self.variant(Negsel::Pb4) } #[doc = "Port B, Pin5"] #[inline(always)] - pub fn pb5(self) -> &'a mut W { - self.variant(NEGSEL_A::PB5) + pub fn pb5(self) -> &'a mut crate::W { + self.variant(Negsel::Pb5) } #[doc = "Port B, Pin6"] #[inline(always)] - pub fn pb6(self) -> &'a mut W { - self.variant(NEGSEL_A::PB6) + pub fn pb6(self) -> &'a mut crate::W { + self.variant(Negsel::Pb6) } #[doc = "Port B, Pin7"] #[inline(always)] - pub fn pb7(self) -> &'a mut W { - self.variant(NEGSEL_A::PB7) + pub fn pb7(self) -> &'a mut crate::W { + self.variant(Negsel::Pb7) } #[doc = "Port B, Pin8"] #[inline(always)] - pub fn pb8(self) -> &'a mut W { - self.variant(NEGSEL_A::PB8) + pub fn pb8(self) -> &'a mut crate::W { + self.variant(Negsel::Pb8) } #[doc = "Port B, Pin9"] #[inline(always)] - pub fn pb9(self) -> &'a mut W { - self.variant(NEGSEL_A::PB9) + pub fn pb9(self) -> &'a mut crate::W { + self.variant(Negsel::Pb9) } #[doc = "Port B, Pin10"] #[inline(always)] - pub fn pb10(self) -> &'a mut W { - self.variant(NEGSEL_A::PB10) + pub fn pb10(self) -> &'a mut crate::W { + self.variant(Negsel::Pb10) } #[doc = "Port B, Pin11"] #[inline(always)] - pub fn pb11(self) -> &'a mut W { - self.variant(NEGSEL_A::PB11) + pub fn pb11(self) -> &'a mut crate::W { + self.variant(Negsel::Pb11) } #[doc = "Port B, Pin12"] #[inline(always)] - pub fn pb12(self) -> &'a mut W { - self.variant(NEGSEL_A::PB12) + pub fn pb12(self) -> &'a mut crate::W { + self.variant(Negsel::Pb12) } #[doc = "Port B, Pin13"] #[inline(always)] - pub fn pb13(self) -> &'a mut W { - self.variant(NEGSEL_A::PB13) + pub fn pb13(self) -> &'a mut crate::W { + self.variant(Negsel::Pb13) } #[doc = "Port B, Pin14"] #[inline(always)] - pub fn pb14(self) -> &'a mut W { - self.variant(NEGSEL_A::PB14) + pub fn pb14(self) -> &'a mut crate::W { + self.variant(Negsel::Pb14) } #[doc = "Port B, Pin15"] #[inline(always)] - pub fn pb15(self) -> &'a mut W { - self.variant(NEGSEL_A::PB15) + pub fn pb15(self) -> &'a mut crate::W { + self.variant(Negsel::Pb15) } #[doc = "Port C, Pin0"] #[inline(always)] - pub fn pc0(self) -> &'a mut W { - self.variant(NEGSEL_A::PC0) + pub fn pc0(self) -> &'a mut crate::W { + self.variant(Negsel::Pc0) } #[doc = "Port C, Pin1"] #[inline(always)] - pub fn pc1(self) -> &'a mut W { - self.variant(NEGSEL_A::PC1) + pub fn pc1(self) -> &'a mut crate::W { + self.variant(Negsel::Pc1) } #[doc = "Port C, Pin2"] #[inline(always)] - pub fn pc2(self) -> &'a mut W { - self.variant(NEGSEL_A::PC2) + pub fn pc2(self) -> &'a mut crate::W { + self.variant(Negsel::Pc2) } #[doc = "Port C, Pin3"] #[inline(always)] - pub fn pc3(self) -> &'a mut W { - self.variant(NEGSEL_A::PC3) + pub fn pc3(self) -> &'a mut crate::W { + self.variant(Negsel::Pc3) } #[doc = "Port C, Pin4"] #[inline(always)] - pub fn pc4(self) -> &'a mut W { - self.variant(NEGSEL_A::PC4) + pub fn pc4(self) -> &'a mut crate::W { + self.variant(Negsel::Pc4) } #[doc = "Port C, Pin5"] #[inline(always)] - pub fn pc5(self) -> &'a mut W { - self.variant(NEGSEL_A::PC5) + pub fn pc5(self) -> &'a mut crate::W { + self.variant(Negsel::Pc5) } #[doc = "Port C, Pin6"] #[inline(always)] - pub fn pc6(self) -> &'a mut W { - self.variant(NEGSEL_A::PC6) + pub fn pc6(self) -> &'a mut crate::W { + self.variant(Negsel::Pc6) } #[doc = "Port C, Pin7"] #[inline(always)] - pub fn pc7(self) -> &'a mut W { - self.variant(NEGSEL_A::PC7) + pub fn pc7(self) -> &'a mut crate::W { + self.variant(Negsel::Pc7) } #[doc = "Port C, Pin8"] #[inline(always)] - pub fn pc8(self) -> &'a mut W { - self.variant(NEGSEL_A::PC8) + pub fn pc8(self) -> &'a mut crate::W { + self.variant(Negsel::Pc8) } #[doc = "Port C, Pin9"] #[inline(always)] - pub fn pc9(self) -> &'a mut W { - self.variant(NEGSEL_A::PC9) + pub fn pc9(self) -> &'a mut crate::W { + self.variant(Negsel::Pc9) } #[doc = "Port C, Pin10"] #[inline(always)] - pub fn pc10(self) -> &'a mut W { - self.variant(NEGSEL_A::PC10) + pub fn pc10(self) -> &'a mut crate::W { + self.variant(Negsel::Pc10) } #[doc = "Port C, Pin11"] #[inline(always)] - pub fn pc11(self) -> &'a mut W { - self.variant(NEGSEL_A::PC11) + pub fn pc11(self) -> &'a mut crate::W { + self.variant(Negsel::Pc11) } #[doc = "Port C, Pin12"] #[inline(always)] - pub fn pc12(self) -> &'a mut W { - self.variant(NEGSEL_A::PC12) + pub fn pc12(self) -> &'a mut crate::W { + self.variant(Negsel::Pc12) } #[doc = "Port C, Pin13"] #[inline(always)] - pub fn pc13(self) -> &'a mut W { - self.variant(NEGSEL_A::PC13) + pub fn pc13(self) -> &'a mut crate::W { + self.variant(Negsel::Pc13) } #[doc = "Port C, Pin14"] #[inline(always)] - pub fn pc14(self) -> &'a mut W { - self.variant(NEGSEL_A::PC14) + pub fn pc14(self) -> &'a mut crate::W { + self.variant(Negsel::Pc14) } #[doc = "Port C, Pin15"] #[inline(always)] - pub fn pc15(self) -> &'a mut W { - self.variant(NEGSEL_A::PC15) + pub fn pc15(self) -> &'a mut crate::W { + self.variant(Negsel::Pc15) } #[doc = "Port D, Pin0"] #[inline(always)] - pub fn pd0(self) -> &'a mut W { - self.variant(NEGSEL_A::PD0) + pub fn pd0(self) -> &'a mut crate::W { + self.variant(Negsel::Pd0) } #[doc = "Port D, Pin1"] #[inline(always)] - pub fn pd1(self) -> &'a mut W { - self.variant(NEGSEL_A::PD1) + pub fn pd1(self) -> &'a mut crate::W { + self.variant(Negsel::Pd1) } #[doc = "Port D, Pin2"] #[inline(always)] - pub fn pd2(self) -> &'a mut W { - self.variant(NEGSEL_A::PD2) + pub fn pd2(self) -> &'a mut crate::W { + self.variant(Negsel::Pd2) } #[doc = "Port D, Pin3"] #[inline(always)] - pub fn pd3(self) -> &'a mut W { - self.variant(NEGSEL_A::PD3) + pub fn pd3(self) -> &'a mut crate::W { + self.variant(Negsel::Pd3) } #[doc = "Port D, Pin4"] #[inline(always)] - pub fn pd4(self) -> &'a mut W { - self.variant(NEGSEL_A::PD4) + pub fn pd4(self) -> &'a mut crate::W { + self.variant(Negsel::Pd4) } #[doc = "Port D, Pin5"] #[inline(always)] - pub fn pd5(self) -> &'a mut W { - self.variant(NEGSEL_A::PD5) + pub fn pd5(self) -> &'a mut crate::W { + self.variant(Negsel::Pd5) } #[doc = "Port D, Pin6"] #[inline(always)] - pub fn pd6(self) -> &'a mut W { - self.variant(NEGSEL_A::PD6) + pub fn pd6(self) -> &'a mut crate::W { + self.variant(Negsel::Pd6) } #[doc = "Port D, Pin7"] #[inline(always)] - pub fn pd7(self) -> &'a mut W { - self.variant(NEGSEL_A::PD7) + pub fn pd7(self) -> &'a mut crate::W { + self.variant(Negsel::Pd7) } #[doc = "Port D, Pin8"] #[inline(always)] - pub fn pd8(self) -> &'a mut W { - self.variant(NEGSEL_A::PD8) + pub fn pd8(self) -> &'a mut crate::W { + self.variant(Negsel::Pd8) } #[doc = "Port D, Pin9"] #[inline(always)] - pub fn pd9(self) -> &'a mut W { - self.variant(NEGSEL_A::PD9) + pub fn pd9(self) -> &'a mut crate::W { + self.variant(Negsel::Pd9) } #[doc = "Port D, Pin10"] #[inline(always)] - pub fn pd10(self) -> &'a mut W { - self.variant(NEGSEL_A::PD10) + pub fn pd10(self) -> &'a mut crate::W { + self.variant(Negsel::Pd10) } #[doc = "Port D, Pin11"] #[inline(always)] - pub fn pd11(self) -> &'a mut W { - self.variant(NEGSEL_A::PD11) + pub fn pd11(self) -> &'a mut crate::W { + self.variant(Negsel::Pd11) } #[doc = "Port D, Pin12"] #[inline(always)] - pub fn pd12(self) -> &'a mut W { - self.variant(NEGSEL_A::PD12) + pub fn pd12(self) -> &'a mut crate::W { + self.variant(Negsel::Pd12) } #[doc = "Port D, Pin13"] #[inline(always)] - pub fn pd13(self) -> &'a mut W { - self.variant(NEGSEL_A::PD13) + pub fn pd13(self) -> &'a mut crate::W { + self.variant(Negsel::Pd13) } #[doc = "Port D, Pin14"] #[inline(always)] - pub fn pd14(self) -> &'a mut W { - self.variant(NEGSEL_A::PD14) + pub fn pd14(self) -> &'a mut crate::W { + self.variant(Negsel::Pd14) } #[doc = "Port D, Pin15"] #[inline(always)] - pub fn pd15(self) -> &'a mut W { - self.variant(NEGSEL_A::PD15) + pub fn pd15(self) -> &'a mut crate::W { + self.variant(Negsel::Pd15) } } #[doc = "Field `VREFDIV` reader - VREF division"] -pub type VREFDIV_R = crate::FieldReader; +pub type VrefdivR = crate::FieldReader; #[doc = "Field `VREFDIV` writer - VREF division"] -pub type VREFDIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, INPUTCTRL_SPEC, u8, u8, 6, O>; -#[doc = "Field `CSRESSEL` reader - Capacitive Sense Mode Internal Resistor"] -pub type CSRESSEL_R = crate::FieldReader; +pub type VrefdivW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Capacitive Sense Mode Internal Resistor\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CSRESSEL_A { +pub enum Csressel { #[doc = "0: Internal capacitive sense resistor value 0"] - RES0 = 0, + Res0 = 0, #[doc = "1: Internal capacitive sense resistor value 1"] - RES1 = 1, + Res1 = 1, #[doc = "2: Internal capacitive sense resistor value 2"] - RES2 = 2, + Res2 = 2, #[doc = "3: Internal capacitive sense resistor value 3"] - RES3 = 3, + Res3 = 3, #[doc = "4: Internal capacitive sense resistor value 4"] - RES4 = 4, + Res4 = 4, #[doc = "5: Internal capacitive sense resistor value 5"] - RES5 = 5, + Res5 = 5, #[doc = "6: Internal capacitive sense resistor value 6"] - RES6 = 6, + Res6 = 6, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CSRESSEL_A) -> Self { + fn from(variant: Csressel) -> Self { variant as _ } } -impl CSRESSEL_R { +impl crate::FieldSpec for Csressel { + type Ux = u8; +} +impl crate::IsEnum for Csressel {} +#[doc = "Field `CSRESSEL` reader - Capacitive Sense Mode Internal Resistor"] +pub type CsresselR = crate::FieldReader; +impl CsresselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CSRESSEL_A::RES0), - 1 => Some(CSRESSEL_A::RES1), - 2 => Some(CSRESSEL_A::RES2), - 3 => Some(CSRESSEL_A::RES3), - 4 => Some(CSRESSEL_A::RES4), - 5 => Some(CSRESSEL_A::RES5), - 6 => Some(CSRESSEL_A::RES6), + 0 => Some(Csressel::Res0), + 1 => Some(Csressel::Res1), + 2 => Some(Csressel::Res2), + 3 => Some(Csressel::Res3), + 4 => Some(Csressel::Res4), + 5 => Some(Csressel::Res5), + 6 => Some(Csressel::Res6), _ => None, } } - #[doc = "Checks if the value of the field is `RES0`"] + #[doc = "Internal capacitive sense resistor value 0"] #[inline(always)] pub fn is_res0(&self) -> bool { - *self == CSRESSEL_A::RES0 + *self == Csressel::Res0 } - #[doc = "Checks if the value of the field is `RES1`"] + #[doc = "Internal capacitive sense resistor value 1"] #[inline(always)] pub fn is_res1(&self) -> bool { - *self == CSRESSEL_A::RES1 + *self == Csressel::Res1 } - #[doc = "Checks if the value of the field is `RES2`"] + #[doc = "Internal capacitive sense resistor value 2"] #[inline(always)] pub fn is_res2(&self) -> bool { - *self == CSRESSEL_A::RES2 + *self == Csressel::Res2 } - #[doc = "Checks if the value of the field is `RES3`"] + #[doc = "Internal capacitive sense resistor value 3"] #[inline(always)] pub fn is_res3(&self) -> bool { - *self == CSRESSEL_A::RES3 + *self == Csressel::Res3 } - #[doc = "Checks if the value of the field is `RES4`"] + #[doc = "Internal capacitive sense resistor value 4"] #[inline(always)] pub fn is_res4(&self) -> bool { - *self == CSRESSEL_A::RES4 + *self == Csressel::Res4 } - #[doc = "Checks if the value of the field is `RES5`"] + #[doc = "Internal capacitive sense resistor value 5"] #[inline(always)] pub fn is_res5(&self) -> bool { - *self == CSRESSEL_A::RES5 + *self == Csressel::Res5 } - #[doc = "Checks if the value of the field is `RES6`"] + #[doc = "Internal capacitive sense resistor value 6"] #[inline(always)] pub fn is_res6(&self) -> bool { - *self == CSRESSEL_A::RES6 + *self == Csressel::Res6 } } #[doc = "Field `CSRESSEL` writer - Capacitive Sense Mode Internal Resistor"] -pub type CSRESSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, INPUTCTRL_SPEC, u8, CSRESSEL_A, 3, O>; -impl<'a, const O: u8> CSRESSEL_W<'a, O> { +pub type CsresselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Csressel>; +impl<'a, REG> CsresselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Internal capacitive sense resistor value 0"] #[inline(always)] - pub fn res0(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES0) + pub fn res0(self) -> &'a mut crate::W { + self.variant(Csressel::Res0) } #[doc = "Internal capacitive sense resistor value 1"] #[inline(always)] - pub fn res1(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES1) + pub fn res1(self) -> &'a mut crate::W { + self.variant(Csressel::Res1) } #[doc = "Internal capacitive sense resistor value 2"] #[inline(always)] - pub fn res2(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES2) + pub fn res2(self) -> &'a mut crate::W { + self.variant(Csressel::Res2) } #[doc = "Internal capacitive sense resistor value 3"] #[inline(always)] - pub fn res3(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES3) + pub fn res3(self) -> &'a mut crate::W { + self.variant(Csressel::Res3) } #[doc = "Internal capacitive sense resistor value 4"] #[inline(always)] - pub fn res4(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES4) + pub fn res4(self) -> &'a mut crate::W { + self.variant(Csressel::Res4) } #[doc = "Internal capacitive sense resistor value 5"] #[inline(always)] - pub fn res5(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES5) + pub fn res5(self) -> &'a mut crate::W { + self.variant(Csressel::Res5) } #[doc = "Internal capacitive sense resistor value 6"] #[inline(always)] - pub fn res6(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES6) + pub fn res6(self) -> &'a mut crate::W { + self.variant(Csressel::Res6) } } impl R { #[doc = "Bits 0:7 - Positive Input Select"] #[inline(always)] - pub fn possel(&self) -> POSSEL_R { - POSSEL_R::new((self.bits & 0xff) as u8) + pub fn possel(&self) -> PosselR { + PosselR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Negative Input Select"] #[inline(always)] - pub fn negsel(&self) -> NEGSEL_R { - NEGSEL_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn negsel(&self) -> NegselR { + NegselR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:21 - VREF division"] #[inline(always)] - pub fn vrefdiv(&self) -> VREFDIV_R { - VREFDIV_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn vrefdiv(&self) -> VrefdivR { + VrefdivR::new(((self.bits >> 16) & 0x3f) as u8) } #[doc = "Bits 28:30 - Capacitive Sense Mode Internal Resistor"] #[inline(always)] - pub fn csressel(&self) -> CSRESSEL_R { - CSRESSEL_R::new(((self.bits >> 28) & 7) as u8) + pub fn csressel(&self) -> CsresselR { + CsresselR::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:7 - Positive Input Select"] #[inline(always)] #[must_use] - pub fn possel(&mut self) -> POSSEL_W<0> { - POSSEL_W::new(self) + pub fn possel(&mut self) -> PosselW { + PosselW::new(self, 0) } #[doc = "Bits 8:15 - Negative Input Select"] #[inline(always)] #[must_use] - pub fn negsel(&mut self) -> NEGSEL_W<8> { - NEGSEL_W::new(self) + pub fn negsel(&mut self) -> NegselW { + NegselW::new(self, 8) } #[doc = "Bits 16:21 - VREF division"] #[inline(always)] #[must_use] - pub fn vrefdiv(&mut self) -> VREFDIV_W<16> { - VREFDIV_W::new(self) + pub fn vrefdiv(&mut self) -> VrefdivW { + VrefdivW::new(self, 16) } #[doc = "Bits 28:30 - Capacitive Sense Mode Internal Resistor"] #[inline(always)] #[must_use] - pub fn csressel(&mut self) -> CSRESSEL_W<28> { - CSRESSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn csressel(&mut self) -> CsresselW { + CsresselW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [inputctrl](index.html) module"] -pub struct INPUTCTRL_SPEC; -impl crate::RegisterSpec for INPUTCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`inputctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inputctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct InputctrlSpec; +impl crate::RegisterSpec for InputctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [inputctrl::R](R) reader structure"] -impl crate::Readable for INPUTCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [inputctrl::W](W) writer structure"] -impl crate::Writable for INPUTCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`inputctrl::R`](R) reader structure"] +impl crate::Readable for InputctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`inputctrl::W`](W) writer structure"] +impl crate::Writable for InputctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets INPUTCTRL to value 0"] -impl crate::Resettable for INPUTCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for InputctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/ipversion.rs index 85cb381..0068345 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/status.rs index 742088c..7088050 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/status.rs @@ -1,58 +1,43 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ACMPOUT` reader - Analog Comparator Output"] -pub type ACMPOUT_R = crate::BitReader; +pub type AcmpoutR = crate::BitReader; #[doc = "Field `ACMPRDY` reader - Analog Comparator Ready"] -pub type ACMPRDY_R = crate::BitReader; +pub type AcmprdyR = crate::BitReader; #[doc = "Field `INPUTCONFLICT` reader - INPUT conflict"] -pub type INPUTCONFLICT_R = crate::BitReader; +pub type InputconflictR = crate::BitReader; #[doc = "Field `PORTALLOCERR` reader - Port allocation error"] -pub type PORTALLOCERR_R = crate::BitReader; +pub type PortallocerrR = crate::BitReader; impl R { #[doc = "Bit 0 - Analog Comparator Output"] #[inline(always)] - pub fn acmpout(&self) -> ACMPOUT_R { - ACMPOUT_R::new((self.bits & 1) != 0) + pub fn acmpout(&self) -> AcmpoutR { + AcmpoutR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - Analog Comparator Ready"] #[inline(always)] - pub fn acmprdy(&self) -> ACMPRDY_R { - ACMPRDY_R::new(((self.bits >> 2) & 1) != 0) + pub fn acmprdy(&self) -> AcmprdyR { + AcmprdyR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - INPUT conflict"] #[inline(always)] - pub fn inputconflict(&self) -> INPUTCONFLICT_R { - INPUTCONFLICT_R::new(((self.bits >> 3) & 1) != 0) + pub fn inputconflict(&self) -> InputconflictR { + InputconflictR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port allocation error"] #[inline(always)] - pub fn portallocerr(&self) -> PORTALLOCERR_R { - PORTALLOCERR_R::new(((self.bits >> 4) & 1) != 0) + pub fn portallocerr(&self) -> PortallocerrR { + PortallocerrR::new(((self.bits >> 4) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/swrst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/swrst.rs index a74aa75..3b73e52 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/swrst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/swrst.rs @@ -1,80 +1,40 @@ #[doc = "Register `SWRST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SWRST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SWRST` writer - Software reset"] -pub type SWRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, SWRST_SPEC, bool, O>; +pub type SwrstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESETTING` reader - Software reset busy status"] -pub type RESETTING_R = crate::BitReader; +pub type ResettingR = crate::BitReader; impl R { #[doc = "Bit 1 - Software reset busy status"] #[inline(always)] - pub fn resetting(&self) -> RESETTING_R { - RESETTING_R::new(((self.bits >> 1) & 1) != 0) + pub fn resetting(&self) -> ResettingR { + ResettingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Software reset"] #[inline(always)] #[must_use] - pub fn swrst(&mut self) -> SWRST_W<0> { - SWRST_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn swrst(&mut self) -> SwrstW { + SwrstW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swrst](index.html) module"] -pub struct SWRST_SPEC; -impl crate::RegisterSpec for SWRST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SwrstSpec; +impl crate::RegisterSpec for SwrstSpec { type Ux = u32; } -#[doc = "`read()` method returns [swrst::R](R) reader structure"] -impl crate::Readable for SWRST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [swrst::W](W) writer structure"] -impl crate::Writable for SWRST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`swrst::R`](R) reader structure"] +impl crate::Readable for SwrstSpec {} +#[doc = "`write(|w| ..)` method takes [`swrst::W`](W) writer structure"] +impl crate::Writable for SwrstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWRST to value 0"] -impl crate::Resettable for SWRST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SwrstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/syncbusy.rs index 5a6bf41..9ff78b9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_ns/syncbusy.rs @@ -1,37 +1,22 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `INPUTCTRL` reader - Syncbusy for INPUTCTRL"] -pub type INPUTCTRL_R = crate::BitReader; +pub type InputctrlR = crate::BitReader; impl R { #[doc = "Bit 0 - Syncbusy for INPUTCTRL"] #[inline(always)] - pub fn inputctrl(&self) -> INPUTCTRL_R { - INPUTCTRL_R::new((self.bits & 1) != 0) + pub fn inputctrl(&self) -> InputctrlR { + InputctrlR::new((self.bits & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s.rs index 65a8f39..39e9c36 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s.rs @@ -1,64 +1,126 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + swrst: Swrst, + cfg: Cfg, + ctrl: Ctrl, + inputctrl: Inputctrl, + status: Status, + if_: If, + ien: Ien, + syncbusy: Syncbusy, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub swrst: SWRST, + #[inline(always)] + pub const fn swrst(&self) -> &Swrst { + &self.swrst + } #[doc = "0x0c - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x10 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x14 - No Description"] - pub inputctrl: INPUTCTRL, + #[inline(always)] + pub const fn inputctrl(&self) -> &Inputctrl { + &self.inputctrl + } #[doc = "0x18 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x1c - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x20 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x24 - No Description"] - pub syncbusy: SYNCBUSY, + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "SWRST (rw) register accessor: an alias for `Reg`"] -pub type SWRST = crate::Reg; +#[doc = "SWRST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swrst`] +module"] +#[doc(alias = "SWRST")] +pub type Swrst = crate::Reg; #[doc = "No Description"] pub mod swrst; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "INPUTCTRL (rw) register accessor: an alias for `Reg`"] -pub type INPUTCTRL = crate::Reg; +#[doc = "INPUTCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`inputctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inputctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inputctrl`] +module"] +#[doc(alias = "INPUTCTRL")] +pub type Inputctrl = crate::Reg; #[doc = "No Description"] pub mod inputctrl; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "No Description"] pub mod syncbusy; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/cfg.rs index dc7241f..40db7a3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/cfg.rs @@ -1,369 +1,343 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `BIAS` reader - Bias Configuration"] -pub type BIAS_R = crate::FieldReader; +pub type BiasR = crate::FieldReader; #[doc = "Field `BIAS` writer - Bias Configuration"] -pub type BIAS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, u8, 3, O>; -#[doc = "Field `HYST` reader - Hysteresis mode"] -pub type HYST_R = crate::FieldReader; +pub type BiasW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Hysteresis mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HYST_A { +pub enum Hyst { #[doc = "0: Hysteresis disabled"] - DISABLED = 0, + Disabled = 0, #[doc = "1: 10mV symmetrical hysteresis"] - SYM10MV = 1, + Sym10mv = 1, #[doc = "2: 20mV symmetrical hysteresis"] - SYM20MV = 2, + Sym20mv = 2, #[doc = "3: 30mV symmetrical hysteresis"] - SYM30MV = 3, + Sym30mv = 3, #[doc = "4: 10mV hysteresis on positive edge transitions"] - POS10MV = 4, + Pos10mv = 4, #[doc = "5: 20mV hysteresis on positive edge transitions"] - POS20MV = 5, + Pos20mv = 5, #[doc = "6: 30mV hysteresis on positive edge transitions"] - POS30MV = 6, + Pos30mv = 6, #[doc = "8: 10mV hysteresis on negative edge transitions"] - NEG10MV = 8, + Neg10mv = 8, #[doc = "9: 20mV hysteresis on negative edge transitions"] - NEG20MV = 9, + Neg20mv = 9, #[doc = "10: 30mV hysteresis on negative edge transitions"] - NEG30MV = 10, + Neg30mv = 10, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HYST_A) -> Self { + fn from(variant: Hyst) -> Self { variant as _ } } -impl HYST_R { +impl crate::FieldSpec for Hyst { + type Ux = u8; +} +impl crate::IsEnum for Hyst {} +#[doc = "Field `HYST` reader - Hysteresis mode"] +pub type HystR = crate::FieldReader; +impl HystR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HYST_A::DISABLED), - 1 => Some(HYST_A::SYM10MV), - 2 => Some(HYST_A::SYM20MV), - 3 => Some(HYST_A::SYM30MV), - 4 => Some(HYST_A::POS10MV), - 5 => Some(HYST_A::POS20MV), - 6 => Some(HYST_A::POS30MV), - 8 => Some(HYST_A::NEG10MV), - 9 => Some(HYST_A::NEG20MV), - 10 => Some(HYST_A::NEG30MV), + 0 => Some(Hyst::Disabled), + 1 => Some(Hyst::Sym10mv), + 2 => Some(Hyst::Sym20mv), + 3 => Some(Hyst::Sym30mv), + 4 => Some(Hyst::Pos10mv), + 5 => Some(Hyst::Pos20mv), + 6 => Some(Hyst::Pos30mv), + 8 => Some(Hyst::Neg10mv), + 9 => Some(Hyst::Neg20mv), + 10 => Some(Hyst::Neg30mv), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Hysteresis disabled"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == HYST_A::DISABLED + *self == Hyst::Disabled } - #[doc = "Checks if the value of the field is `SYM10MV`"] + #[doc = "10mV symmetrical hysteresis"] #[inline(always)] pub fn is_sym10mv(&self) -> bool { - *self == HYST_A::SYM10MV + *self == Hyst::Sym10mv } - #[doc = "Checks if the value of the field is `SYM20MV`"] + #[doc = "20mV symmetrical hysteresis"] #[inline(always)] pub fn is_sym20mv(&self) -> bool { - *self == HYST_A::SYM20MV + *self == Hyst::Sym20mv } - #[doc = "Checks if the value of the field is `SYM30MV`"] + #[doc = "30mV symmetrical hysteresis"] #[inline(always)] pub fn is_sym30mv(&self) -> bool { - *self == HYST_A::SYM30MV + *self == Hyst::Sym30mv } - #[doc = "Checks if the value of the field is `POS10MV`"] + #[doc = "10mV hysteresis on positive edge transitions"] #[inline(always)] pub fn is_pos10mv(&self) -> bool { - *self == HYST_A::POS10MV + *self == Hyst::Pos10mv } - #[doc = "Checks if the value of the field is `POS20MV`"] + #[doc = "20mV hysteresis on positive edge transitions"] #[inline(always)] pub fn is_pos20mv(&self) -> bool { - *self == HYST_A::POS20MV + *self == Hyst::Pos20mv } - #[doc = "Checks if the value of the field is `POS30MV`"] + #[doc = "30mV hysteresis on positive edge transitions"] #[inline(always)] pub fn is_pos30mv(&self) -> bool { - *self == HYST_A::POS30MV + *self == Hyst::Pos30mv } - #[doc = "Checks if the value of the field is `NEG10MV`"] + #[doc = "10mV hysteresis on negative edge transitions"] #[inline(always)] pub fn is_neg10mv(&self) -> bool { - *self == HYST_A::NEG10MV + *self == Hyst::Neg10mv } - #[doc = "Checks if the value of the field is `NEG20MV`"] + #[doc = "20mV hysteresis on negative edge transitions"] #[inline(always)] pub fn is_neg20mv(&self) -> bool { - *self == HYST_A::NEG20MV + *self == Hyst::Neg20mv } - #[doc = "Checks if the value of the field is `NEG30MV`"] + #[doc = "30mV hysteresis on negative edge transitions"] #[inline(always)] pub fn is_neg30mv(&self) -> bool { - *self == HYST_A::NEG30MV + *self == Hyst::Neg30mv } } #[doc = "Field `HYST` writer - Hysteresis mode"] -pub type HYST_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, HYST_A, 4, O>; -impl<'a, const O: u8> HYST_W<'a, O> { +pub type HystW<'a, REG> = crate::FieldWriter<'a, REG, 4, Hyst>; +impl<'a, REG> HystW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Hysteresis disabled"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(HYST_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Hyst::Disabled) } #[doc = "10mV symmetrical hysteresis"] #[inline(always)] - pub fn sym10mv(self) -> &'a mut W { - self.variant(HYST_A::SYM10MV) + pub fn sym10mv(self) -> &'a mut crate::W { + self.variant(Hyst::Sym10mv) } #[doc = "20mV symmetrical hysteresis"] #[inline(always)] - pub fn sym20mv(self) -> &'a mut W { - self.variant(HYST_A::SYM20MV) + pub fn sym20mv(self) -> &'a mut crate::W { + self.variant(Hyst::Sym20mv) } #[doc = "30mV symmetrical hysteresis"] #[inline(always)] - pub fn sym30mv(self) -> &'a mut W { - self.variant(HYST_A::SYM30MV) + pub fn sym30mv(self) -> &'a mut crate::W { + self.variant(Hyst::Sym30mv) } #[doc = "10mV hysteresis on positive edge transitions"] #[inline(always)] - pub fn pos10mv(self) -> &'a mut W { - self.variant(HYST_A::POS10MV) + pub fn pos10mv(self) -> &'a mut crate::W { + self.variant(Hyst::Pos10mv) } #[doc = "20mV hysteresis on positive edge transitions"] #[inline(always)] - pub fn pos20mv(self) -> &'a mut W { - self.variant(HYST_A::POS20MV) + pub fn pos20mv(self) -> &'a mut crate::W { + self.variant(Hyst::Pos20mv) } #[doc = "30mV hysteresis on positive edge transitions"] #[inline(always)] - pub fn pos30mv(self) -> &'a mut W { - self.variant(HYST_A::POS30MV) + pub fn pos30mv(self) -> &'a mut crate::W { + self.variant(Hyst::Pos30mv) } #[doc = "10mV hysteresis on negative edge transitions"] #[inline(always)] - pub fn neg10mv(self) -> &'a mut W { - self.variant(HYST_A::NEG10MV) + pub fn neg10mv(self) -> &'a mut crate::W { + self.variant(Hyst::Neg10mv) } #[doc = "20mV hysteresis on negative edge transitions"] #[inline(always)] - pub fn neg20mv(self) -> &'a mut W { - self.variant(HYST_A::NEG20MV) + pub fn neg20mv(self) -> &'a mut crate::W { + self.variant(Hyst::Neg20mv) } #[doc = "30mV hysteresis on negative edge transitions"] #[inline(always)] - pub fn neg30mv(self) -> &'a mut W { - self.variant(HYST_A::NEG30MV) + pub fn neg30mv(self) -> &'a mut crate::W { + self.variant(Hyst::Neg30mv) } } -#[doc = "Field `INPUTRANGE` reader - Input Range"] -pub type INPUTRANGE_R = crate::BitReader; #[doc = "Input Range\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum INPUTRANGE_A { +pub enum Inputrange { #[doc = "0: Use this setting when the input to the comparator core can be from 0 to AVDD."] - FULL = 0, + Full = 0, #[doc = "1: It is recommended to use this setting when the input to the comparator core will always be less than AVDD-0.7V."] - REDUCED = 1, + Reduced = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: INPUTRANGE_A) -> Self { + fn from(variant: Inputrange) -> Self { variant as u8 != 0 } } -impl INPUTRANGE_R { +#[doc = "Field `INPUTRANGE` reader - Input Range"] +pub type InputrangeR = crate::BitReader; +impl InputrangeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INPUTRANGE_A { + pub const fn variant(&self) -> Inputrange { match self.bits { - false => INPUTRANGE_A::FULL, - true => INPUTRANGE_A::REDUCED, + false => Inputrange::Full, + true => Inputrange::Reduced, } } - #[doc = "Checks if the value of the field is `FULL`"] + #[doc = "Use this setting when the input to the comparator core can be from 0 to AVDD."] #[inline(always)] pub fn is_full(&self) -> bool { - *self == INPUTRANGE_A::FULL + *self == Inputrange::Full } - #[doc = "Checks if the value of the field is `REDUCED`"] + #[doc = "It is recommended to use this setting when the input to the comparator core will always be less than AVDD-0.7V."] #[inline(always)] pub fn is_reduced(&self) -> bool { - *self == INPUTRANGE_A::REDUCED + *self == Inputrange::Reduced } } #[doc = "Field `INPUTRANGE` writer - Input Range"] -pub type INPUTRANGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, INPUTRANGE_A, O>; -impl<'a, const O: u8> INPUTRANGE_W<'a, O> { +pub type InputrangeW<'a, REG> = crate::BitWriter<'a, REG, Inputrange>; +impl<'a, REG> InputrangeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use this setting when the input to the comparator core can be from 0 to AVDD."] #[inline(always)] - pub fn full(self) -> &'a mut W { - self.variant(INPUTRANGE_A::FULL) + pub fn full(self) -> &'a mut crate::W { + self.variant(Inputrange::Full) } #[doc = "It is recommended to use this setting when the input to the comparator core will always be less than AVDD-0.7V."] #[inline(always)] - pub fn reduced(self) -> &'a mut W { - self.variant(INPUTRANGE_A::REDUCED) + pub fn reduced(self) -> &'a mut crate::W { + self.variant(Inputrange::Reduced) } } -#[doc = "Field `ACCURACY` reader - ACMP accuracy mode"] -pub type ACCURACY_R = crate::BitReader; #[doc = "ACMP accuracy mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ACCURACY_A { +pub enum Accuracy { #[doc = "0: ACMP operates in low-accuracy mode but consumes less current."] - LOW = 0, + Low = 0, #[doc = "1: ACMP operates in high-accuracy mode but consumes more current."] - HIGH = 1, + High = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ACCURACY_A) -> Self { + fn from(variant: Accuracy) -> Self { variant as u8 != 0 } } -impl ACCURACY_R { +#[doc = "Field `ACCURACY` reader - ACMP accuracy mode"] +pub type AccuracyR = crate::BitReader; +impl AccuracyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ACCURACY_A { + pub const fn variant(&self) -> Accuracy { match self.bits { - false => ACCURACY_A::LOW, - true => ACCURACY_A::HIGH, + false => Accuracy::Low, + true => Accuracy::High, } } - #[doc = "Checks if the value of the field is `LOW`"] + #[doc = "ACMP operates in low-accuracy mode but consumes less current."] #[inline(always)] pub fn is_low(&self) -> bool { - *self == ACCURACY_A::LOW + *self == Accuracy::Low } - #[doc = "Checks if the value of the field is `HIGH`"] + #[doc = "ACMP operates in high-accuracy mode but consumes more current."] #[inline(always)] pub fn is_high(&self) -> bool { - *self == ACCURACY_A::HIGH + *self == Accuracy::High } } #[doc = "Field `ACCURACY` writer - ACMP accuracy mode"] -pub type ACCURACY_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, ACCURACY_A, O>; -impl<'a, const O: u8> ACCURACY_W<'a, O> { +pub type AccuracyW<'a, REG> = crate::BitWriter<'a, REG, Accuracy>; +impl<'a, REG> AccuracyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "ACMP operates in low-accuracy mode but consumes less current."] #[inline(always)] - pub fn low(self) -> &'a mut W { - self.variant(ACCURACY_A::LOW) + pub fn low(self) -> &'a mut crate::W { + self.variant(Accuracy::Low) } #[doc = "ACMP operates in high-accuracy mode but consumes more current."] #[inline(always)] - pub fn high(self) -> &'a mut W { - self.variant(ACCURACY_A::HIGH) + pub fn high(self) -> &'a mut crate::W { + self.variant(Accuracy::High) } } impl R { #[doc = "Bits 0:2 - Bias Configuration"] #[inline(always)] - pub fn bias(&self) -> BIAS_R { - BIAS_R::new((self.bits & 7) as u8) + pub fn bias(&self) -> BiasR { + BiasR::new((self.bits & 7) as u8) } #[doc = "Bits 8:11 - Hysteresis mode"] #[inline(always)] - pub fn hyst(&self) -> HYST_R { - HYST_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn hyst(&self) -> HystR { + HystR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bit 16 - Input Range"] #[inline(always)] - pub fn inputrange(&self) -> INPUTRANGE_R { - INPUTRANGE_R::new(((self.bits >> 16) & 1) != 0) + pub fn inputrange(&self) -> InputrangeR { + InputrangeR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - ACMP accuracy mode"] #[inline(always)] - pub fn accuracy(&self) -> ACCURACY_R { - ACCURACY_R::new(((self.bits >> 17) & 1) != 0) + pub fn accuracy(&self) -> AccuracyR { + AccuracyR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Bias Configuration"] #[inline(always)] #[must_use] - pub fn bias(&mut self) -> BIAS_W<0> { - BIAS_W::new(self) + pub fn bias(&mut self) -> BiasW { + BiasW::new(self, 0) } #[doc = "Bits 8:11 - Hysteresis mode"] #[inline(always)] #[must_use] - pub fn hyst(&mut self) -> HYST_W<8> { - HYST_W::new(self) + pub fn hyst(&mut self) -> HystW { + HystW::new(self, 8) } #[doc = "Bit 16 - Input Range"] #[inline(always)] #[must_use] - pub fn inputrange(&mut self) -> INPUTRANGE_W<16> { - INPUTRANGE_W::new(self) + pub fn inputrange(&mut self) -> InputrangeW { + InputrangeW::new(self, 16) } #[doc = "Bit 17 - ACMP accuracy mode"] #[inline(always)] #[must_use] - pub fn accuracy(&mut self) -> ACCURACY_W<17> { - ACCURACY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn accuracy(&mut self) -> AccuracyW { + AccuracyW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0x04"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x04; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0x04; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/ctrl.rs index a69e6f8..e096f46 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/ctrl.rs @@ -1,187 +1,153 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `NOTRDYVAL` reader - Not Ready Value"] -pub type NOTRDYVAL_R = crate::BitReader; +pub type W = crate::W; #[doc = "Not Ready Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum NOTRDYVAL_A { +pub enum Notrdyval { #[doc = "0: ACMP output is 0 when the ACMP is not ready."] - LOW = 0, + Low = 0, #[doc = "1: ACMP output is 1 when the ACMP is not ready."] - HIGH = 1, + High = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: NOTRDYVAL_A) -> Self { + fn from(variant: Notrdyval) -> Self { variant as u8 != 0 } } -impl NOTRDYVAL_R { +#[doc = "Field `NOTRDYVAL` reader - Not Ready Value"] +pub type NotrdyvalR = crate::BitReader; +impl NotrdyvalR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> NOTRDYVAL_A { + pub const fn variant(&self) -> Notrdyval { match self.bits { - false => NOTRDYVAL_A::LOW, - true => NOTRDYVAL_A::HIGH, + false => Notrdyval::Low, + true => Notrdyval::High, } } - #[doc = "Checks if the value of the field is `LOW`"] + #[doc = "ACMP output is 0 when the ACMP is not ready."] #[inline(always)] pub fn is_low(&self) -> bool { - *self == NOTRDYVAL_A::LOW + *self == Notrdyval::Low } - #[doc = "Checks if the value of the field is `HIGH`"] + #[doc = "ACMP output is 1 when the ACMP is not ready."] #[inline(always)] pub fn is_high(&self) -> bool { - *self == NOTRDYVAL_A::HIGH + *self == Notrdyval::High } } #[doc = "Field `NOTRDYVAL` writer - Not Ready Value"] -pub type NOTRDYVAL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, NOTRDYVAL_A, O>; -impl<'a, const O: u8> NOTRDYVAL_W<'a, O> { +pub type NotrdyvalW<'a, REG> = crate::BitWriter<'a, REG, Notrdyval>; +impl<'a, REG> NotrdyvalW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "ACMP output is 0 when the ACMP is not ready."] #[inline(always)] - pub fn low(self) -> &'a mut W { - self.variant(NOTRDYVAL_A::LOW) + pub fn low(self) -> &'a mut crate::W { + self.variant(Notrdyval::Low) } #[doc = "ACMP output is 1 when the ACMP is not ready."] #[inline(always)] - pub fn high(self) -> &'a mut W { - self.variant(NOTRDYVAL_A::HIGH) + pub fn high(self) -> &'a mut crate::W { + self.variant(Notrdyval::High) } } -#[doc = "Field `GPIOINV` reader - Comparator GPIO Output Invert"] -pub type GPIOINV_R = crate::BitReader; #[doc = "Comparator GPIO Output Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GPIOINV_A { +pub enum Gpioinv { #[doc = "0: The comparator output to GPIO is not inverted"] - NOTINV = 0, + Notinv = 0, #[doc = "1: The comparator output to GPIO is inverted"] - INV = 1, + Inv = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GPIOINV_A) -> Self { + fn from(variant: Gpioinv) -> Self { variant as u8 != 0 } } -impl GPIOINV_R { +#[doc = "Field `GPIOINV` reader - Comparator GPIO Output Invert"] +pub type GpioinvR = crate::BitReader; +impl GpioinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> GPIOINV_A { + pub const fn variant(&self) -> Gpioinv { match self.bits { - false => GPIOINV_A::NOTINV, - true => GPIOINV_A::INV, + false => Gpioinv::Notinv, + true => Gpioinv::Inv, } } - #[doc = "Checks if the value of the field is `NOTINV`"] + #[doc = "The comparator output to GPIO is not inverted"] #[inline(always)] pub fn is_notinv(&self) -> bool { - *self == GPIOINV_A::NOTINV + *self == Gpioinv::Notinv } - #[doc = "Checks if the value of the field is `INV`"] + #[doc = "The comparator output to GPIO is inverted"] #[inline(always)] pub fn is_inv(&self) -> bool { - *self == GPIOINV_A::INV + *self == Gpioinv::Inv } } #[doc = "Field `GPIOINV` writer - Comparator GPIO Output Invert"] -pub type GPIOINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, GPIOINV_A, O>; -impl<'a, const O: u8> GPIOINV_W<'a, O> { +pub type GpioinvW<'a, REG> = crate::BitWriter<'a, REG, Gpioinv>; +impl<'a, REG> GpioinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The comparator output to GPIO is not inverted"] #[inline(always)] - pub fn notinv(self) -> &'a mut W { - self.variant(GPIOINV_A::NOTINV) + pub fn notinv(self) -> &'a mut crate::W { + self.variant(Gpioinv::Notinv) } #[doc = "The comparator output to GPIO is inverted"] #[inline(always)] - pub fn inv(self) -> &'a mut W { - self.variant(GPIOINV_A::INV) + pub fn inv(self) -> &'a mut crate::W { + self.variant(Gpioinv::Inv) } } impl R { #[doc = "Bit 0 - Not Ready Value"] #[inline(always)] - pub fn notrdyval(&self) -> NOTRDYVAL_R { - NOTRDYVAL_R::new((self.bits & 1) != 0) + pub fn notrdyval(&self) -> NotrdyvalR { + NotrdyvalR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Comparator GPIO Output Invert"] #[inline(always)] - pub fn gpioinv(&self) -> GPIOINV_R { - GPIOINV_R::new(((self.bits >> 1) & 1) != 0) + pub fn gpioinv(&self) -> GpioinvR { + GpioinvR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Not Ready Value"] #[inline(always)] #[must_use] - pub fn notrdyval(&mut self) -> NOTRDYVAL_W<0> { - NOTRDYVAL_W::new(self) + pub fn notrdyval(&mut self) -> NotrdyvalW { + NotrdyvalW::new(self, 0) } #[doc = "Bit 1 - Comparator GPIO Output Invert"] #[inline(always)] #[must_use] - pub fn gpioinv(&mut self) -> GPIOINV_W<1> { - GPIOINV_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn gpioinv(&mut self) -> GpioinvW { + GpioinvW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/en.rs index f15bf65..7298843 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Module enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Module enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Module enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Module enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/ien.rs index 23882fa..27a6bdf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/ien.rs @@ -1,140 +1,100 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RISE` reader - Rising edge interrupt enable"] -pub type RISE_R = crate::BitReader; +pub type RiseR = crate::BitReader; #[doc = "Field `RISE` writer - Rising edge interrupt enable"] -pub type RISE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RiseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FALL` reader - Falling edge interrupt enable"] -pub type FALL_R = crate::BitReader; +pub type FallR = crate::BitReader; #[doc = "Field `FALL` writer - Falling edge interrupt enable"] -pub type FALL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FallW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMPRDY` reader - ACMP ready interrupt enable"] -pub type ACMPRDY_R = crate::BitReader; +pub type AcmprdyR = crate::BitReader; #[doc = "Field `ACMPRDY` writer - ACMP ready interrupt enable"] -pub type ACMPRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AcmprdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INPUTCONFLICT` reader - Input conflict interrupt enable"] -pub type INPUTCONFLICT_R = crate::BitReader; +pub type InputconflictR = crate::BitReader; #[doc = "Field `INPUTCONFLICT` writer - Input conflict interrupt enable"] -pub type INPUTCONFLICT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type InputconflictW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PORTALLOCERR` reader - Port allocation error interrupt enable"] -pub type PORTALLOCERR_R = crate::BitReader; +pub type PortallocerrR = crate::BitReader; #[doc = "Field `PORTALLOCERR` writer - Port allocation error interrupt enable"] -pub type PORTALLOCERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PortallocerrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Rising edge interrupt enable"] #[inline(always)] - pub fn rise(&self) -> RISE_R { - RISE_R::new((self.bits & 1) != 0) + pub fn rise(&self) -> RiseR { + RiseR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Falling edge interrupt enable"] #[inline(always)] - pub fn fall(&self) -> FALL_R { - FALL_R::new(((self.bits >> 1) & 1) != 0) + pub fn fall(&self) -> FallR { + FallR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - ACMP ready interrupt enable"] #[inline(always)] - pub fn acmprdy(&self) -> ACMPRDY_R { - ACMPRDY_R::new(((self.bits >> 2) & 1) != 0) + pub fn acmprdy(&self) -> AcmprdyR { + AcmprdyR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Input conflict interrupt enable"] #[inline(always)] - pub fn inputconflict(&self) -> INPUTCONFLICT_R { - INPUTCONFLICT_R::new(((self.bits >> 3) & 1) != 0) + pub fn inputconflict(&self) -> InputconflictR { + InputconflictR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port allocation error interrupt enable"] #[inline(always)] - pub fn portallocerr(&self) -> PORTALLOCERR_R { - PORTALLOCERR_R::new(((self.bits >> 4) & 1) != 0) + pub fn portallocerr(&self) -> PortallocerrR { + PortallocerrR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - Rising edge interrupt enable"] #[inline(always)] #[must_use] - pub fn rise(&mut self) -> RISE_W<0> { - RISE_W::new(self) + pub fn rise(&mut self) -> RiseW { + RiseW::new(self, 0) } #[doc = "Bit 1 - Falling edge interrupt enable"] #[inline(always)] #[must_use] - pub fn fall(&mut self) -> FALL_W<1> { - FALL_W::new(self) + pub fn fall(&mut self) -> FallW { + FallW::new(self, 1) } #[doc = "Bit 2 - ACMP ready interrupt enable"] #[inline(always)] #[must_use] - pub fn acmprdy(&mut self) -> ACMPRDY_W<2> { - ACMPRDY_W::new(self) + pub fn acmprdy(&mut self) -> AcmprdyW { + AcmprdyW::new(self, 2) } #[doc = "Bit 3 - Input conflict interrupt enable"] #[inline(always)] #[must_use] - pub fn inputconflict(&mut self) -> INPUTCONFLICT_W<3> { - INPUTCONFLICT_W::new(self) + pub fn inputconflict(&mut self) -> InputconflictW { + InputconflictW::new(self, 3) } #[doc = "Bit 4 - Port allocation error interrupt enable"] #[inline(always)] #[must_use] - pub fn portallocerr(&mut self) -> PORTALLOCERR_W<4> { - PORTALLOCERR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn portallocerr(&mut self) -> PortallocerrW { + PortallocerrW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/if_.rs index 0133f4a..c3b5907 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/if_.rs @@ -1,140 +1,100 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RISE` reader - Rising Edge Triggered Interrupt Flag"] -pub type RISE_R = crate::BitReader; +pub type RiseR = crate::BitReader; #[doc = "Field `RISE` writer - Rising Edge Triggered Interrupt Flag"] -pub type RISE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RiseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FALL` reader - Falling Edge Triggered Interrupt Flag"] -pub type FALL_R = crate::BitReader; +pub type FallR = crate::BitReader; #[doc = "Field `FALL` writer - Falling Edge Triggered Interrupt Flag"] -pub type FALL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FallW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMPRDY` reader - ACMP ready Interrupt flag"] -pub type ACMPRDY_R = crate::BitReader; +pub type AcmprdyR = crate::BitReader; #[doc = "Field `ACMPRDY` writer - ACMP ready Interrupt flag"] -pub type ACMPRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AcmprdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INPUTCONFLICT` reader - Input conflict"] -pub type INPUTCONFLICT_R = crate::BitReader; +pub type InputconflictR = crate::BitReader; #[doc = "Field `INPUTCONFLICT` writer - Input conflict"] -pub type INPUTCONFLICT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type InputconflictW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PORTALLOCERR` reader - Port allocation error"] -pub type PORTALLOCERR_R = crate::BitReader; +pub type PortallocerrR = crate::BitReader; #[doc = "Field `PORTALLOCERR` writer - Port allocation error"] -pub type PORTALLOCERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PortallocerrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Rising Edge Triggered Interrupt Flag"] #[inline(always)] - pub fn rise(&self) -> RISE_R { - RISE_R::new((self.bits & 1) != 0) + pub fn rise(&self) -> RiseR { + RiseR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Falling Edge Triggered Interrupt Flag"] #[inline(always)] - pub fn fall(&self) -> FALL_R { - FALL_R::new(((self.bits >> 1) & 1) != 0) + pub fn fall(&self) -> FallR { + FallR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - ACMP ready Interrupt flag"] #[inline(always)] - pub fn acmprdy(&self) -> ACMPRDY_R { - ACMPRDY_R::new(((self.bits >> 2) & 1) != 0) + pub fn acmprdy(&self) -> AcmprdyR { + AcmprdyR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Input conflict"] #[inline(always)] - pub fn inputconflict(&self) -> INPUTCONFLICT_R { - INPUTCONFLICT_R::new(((self.bits >> 3) & 1) != 0) + pub fn inputconflict(&self) -> InputconflictR { + InputconflictR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port allocation error"] #[inline(always)] - pub fn portallocerr(&self) -> PORTALLOCERR_R { - PORTALLOCERR_R::new(((self.bits >> 4) & 1) != 0) + pub fn portallocerr(&self) -> PortallocerrR { + PortallocerrR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - Rising Edge Triggered Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rise(&mut self) -> RISE_W<0> { - RISE_W::new(self) + pub fn rise(&mut self) -> RiseW { + RiseW::new(self, 0) } #[doc = "Bit 1 - Falling Edge Triggered Interrupt Flag"] #[inline(always)] #[must_use] - pub fn fall(&mut self) -> FALL_W<1> { - FALL_W::new(self) + pub fn fall(&mut self) -> FallW { + FallW::new(self, 1) } #[doc = "Bit 2 - ACMP ready Interrupt flag"] #[inline(always)] #[must_use] - pub fn acmprdy(&mut self) -> ACMPRDY_W<2> { - ACMPRDY_W::new(self) + pub fn acmprdy(&mut self) -> AcmprdyW { + AcmprdyW::new(self, 2) } #[doc = "Bit 3 - Input conflict"] #[inline(always)] #[must_use] - pub fn inputconflict(&mut self) -> INPUTCONFLICT_W<3> { - INPUTCONFLICT_W::new(self) + pub fn inputconflict(&mut self) -> InputconflictW { + InputconflictW::new(self, 3) } #[doc = "Bit 4 - Port allocation error"] #[inline(always)] #[must_use] - pub fn portallocerr(&mut self) -> PORTALLOCERR_W<4> { - PORTALLOCERR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn portallocerr(&mut self) -> PortallocerrW { + PortallocerrW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/inputctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/inputctrl.rs index 5a67c46..524a2ae 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/inputctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/inputctrl.rs @@ -1,2352 +1,2333 @@ #[doc = "Register `INPUTCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `INPUTCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `POSSEL` reader - Positive Input Select"] -pub type POSSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Positive Input Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum POSSEL_A { +pub enum Possel { #[doc = "0: VSS"] - VSS = 0, + Vss = 0, #[doc = "16: Divided AVDD"] - VREFDIVAVDD = 16, + Vrefdivavdd = 16, #[doc = "17: Low-Power Divided AVDD"] - VREFDIVAVDDLP = 17, + Vrefdivavddlp = 17, #[doc = "18: Divided 1V25 reference"] - VREFDIV1V25 = 18, + Vrefdiv1v25 = 18, #[doc = "19: Low-power Divided 1V25 reference"] - VREFDIV1V25LP = 19, + Vrefdiv1v25lp = 19, #[doc = "20: Divided 2V5 reference"] - VREFDIV2V5 = 20, + Vrefdiv2v5 = 20, #[doc = "21: Low-power Divided 2V5 reference"] - VREFDIV2V5LP = 21, + Vrefdiv2v5lp = 21, #[doc = "32: VSENSE0 divided by 4"] - VSENSE01DIV4 = 32, + Vsense01div4 = 32, #[doc = "33: Low-power VSENSE0 divided by 4"] - VSENSE01DIV4LP = 33, + Vsense01div4lp = 33, #[doc = "34: VSENSE1 divided by 4"] - VSENSE11DIV4 = 34, + Vsense11div4 = 34, #[doc = "35: Low-power VSENSE1 divided by 4"] - VSENSE11DIV4LP = 35, + Vsense11div4lp = 35, #[doc = "64: VDAC0 channel 0 output"] - VDACOUT0 = 64, + Vdacout0 = 64, #[doc = "65: VDAC0 channel 1 output"] - VDACOUT1 = 65, + Vdacout1 = 65, #[doc = "80: External interface, base is PA0."] - EXTPA = 80, + Extpa = 80, #[doc = "81: External interface, base is PB0."] - EXTPB = 81, + Extpb = 81, #[doc = "82: External interface, base is PC0."] - EXTPC = 82, + Extpc = 82, #[doc = "83: External interface, base is PD0."] - EXTPD = 83, + Extpd = 83, #[doc = "128: Port A, Pin0"] - PA0 = 128, + Pa0 = 128, #[doc = "129: Port A, Pin1"] - PA1 = 129, + Pa1 = 129, #[doc = "130: Port A, Pin2"] - PA2 = 130, + Pa2 = 130, #[doc = "131: Port A, Pin3"] - PA3 = 131, + Pa3 = 131, #[doc = "132: Port A, Pin4"] - PA4 = 132, + Pa4 = 132, #[doc = "133: Port A, Pin5"] - PA5 = 133, + Pa5 = 133, #[doc = "134: Port A, Pin6"] - PA6 = 134, + Pa6 = 134, #[doc = "135: Port A, Pin7"] - PA7 = 135, + Pa7 = 135, #[doc = "136: Port A, Pin8"] - PA8 = 136, + Pa8 = 136, #[doc = "137: Port A, Pin9"] - PA9 = 137, + Pa9 = 137, #[doc = "138: Port A, Pin10"] - PA10 = 138, + Pa10 = 138, #[doc = "139: Port A, Pin11"] - PA11 = 139, + Pa11 = 139, #[doc = "140: Port A, Pin12"] - PA12 = 140, + Pa12 = 140, #[doc = "141: Port A, Pin13"] - PA13 = 141, + Pa13 = 141, #[doc = "142: Port A, Pin14"] - PA14 = 142, + Pa14 = 142, #[doc = "143: Port A, Pin15"] - PA15 = 143, + Pa15 = 143, #[doc = "144: Port B, Pin0"] - PB0 = 144, + Pb0 = 144, #[doc = "145: Port B, Pin1"] - PB1 = 145, + Pb1 = 145, #[doc = "146: Port B, Pin2"] - PB2 = 146, + Pb2 = 146, #[doc = "147: Port B, Pin3"] - PB3 = 147, + Pb3 = 147, #[doc = "148: Port B, Pin4"] - PB4 = 148, + Pb4 = 148, #[doc = "149: Port B, Pin5"] - PB5 = 149, + Pb5 = 149, #[doc = "150: Port B, Pin6"] - PB6 = 150, + Pb6 = 150, #[doc = "151: Port B, Pin7"] - PB7 = 151, + Pb7 = 151, #[doc = "152: Port B, Pin8"] - PB8 = 152, + Pb8 = 152, #[doc = "153: Port B, Pin9"] - PB9 = 153, + Pb9 = 153, #[doc = "154: Port B, Pin10"] - PB10 = 154, + Pb10 = 154, #[doc = "155: Port B, Pin11"] - PB11 = 155, + Pb11 = 155, #[doc = "156: Port B, Pin12"] - PB12 = 156, + Pb12 = 156, #[doc = "157: Port B, Pin13"] - PB13 = 157, + Pb13 = 157, #[doc = "158: Port B, Pin14"] - PB14 = 158, + Pb14 = 158, #[doc = "159: Port B, Pin15"] - PB15 = 159, + Pb15 = 159, #[doc = "160: Port C, Pin0"] - PC0 = 160, + Pc0 = 160, #[doc = "161: Port C, Pin1"] - PC1 = 161, + Pc1 = 161, #[doc = "162: Port C, Pin2"] - PC2 = 162, + Pc2 = 162, #[doc = "163: Port C, Pin3"] - PC3 = 163, + Pc3 = 163, #[doc = "164: Port C, Pin4"] - PC4 = 164, + Pc4 = 164, #[doc = "165: Port C, Pin5"] - PC5 = 165, + Pc5 = 165, #[doc = "166: Port C, Pin6"] - PC6 = 166, + Pc6 = 166, #[doc = "167: Port C, Pin7"] - PC7 = 167, + Pc7 = 167, #[doc = "168: Port C, Pin8"] - PC8 = 168, + Pc8 = 168, #[doc = "169: Port C, Pin9"] - PC9 = 169, + Pc9 = 169, #[doc = "170: Port C, Pin10"] - PC10 = 170, + Pc10 = 170, #[doc = "171: Port C, Pin11"] - PC11 = 171, + Pc11 = 171, #[doc = "172: Port C, Pin12"] - PC12 = 172, + Pc12 = 172, #[doc = "173: Port C, Pin13"] - PC13 = 173, + Pc13 = 173, #[doc = "174: Port C, Pin14"] - PC14 = 174, + Pc14 = 174, #[doc = "175: Port C, Pin15"] - PC15 = 175, + Pc15 = 175, #[doc = "176: Port D, Pin0"] - PD0 = 176, + Pd0 = 176, #[doc = "177: Port D, Pin1"] - PD1 = 177, + Pd1 = 177, #[doc = "178: Port D, Pin2"] - PD2 = 178, + Pd2 = 178, #[doc = "179: Port D, Pin3"] - PD3 = 179, + Pd3 = 179, #[doc = "180: Port D, Pin4"] - PD4 = 180, + Pd4 = 180, #[doc = "181: Port D, Pin5"] - PD5 = 181, + Pd5 = 181, #[doc = "182: Port D, Pin6"] - PD6 = 182, + Pd6 = 182, #[doc = "183: Port D, Pin7"] - PD7 = 183, + Pd7 = 183, #[doc = "184: Port D, Pin8"] - PD8 = 184, + Pd8 = 184, #[doc = "185: Port D, Pin9"] - PD9 = 185, + Pd9 = 185, #[doc = "186: Port D, Pin10"] - PD10 = 186, + Pd10 = 186, #[doc = "187: Port D, Pin11"] - PD11 = 187, + Pd11 = 187, #[doc = "188: Port D, Pin12"] - PD12 = 188, + Pd12 = 188, #[doc = "189: Port D, Pin13"] - PD13 = 189, + Pd13 = 189, #[doc = "190: Port D, Pin14"] - PD14 = 190, + Pd14 = 190, #[doc = "191: Port D, Pin15"] - PD15 = 191, + Pd15 = 191, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: POSSEL_A) -> Self { + fn from(variant: Possel) -> Self { variant as _ } } -impl POSSEL_R { +impl crate::FieldSpec for Possel { + type Ux = u8; +} +impl crate::IsEnum for Possel {} +#[doc = "Field `POSSEL` reader - Positive Input Select"] +pub type PosselR = crate::FieldReader; +impl PosselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(POSSEL_A::VSS), - 16 => Some(POSSEL_A::VREFDIVAVDD), - 17 => Some(POSSEL_A::VREFDIVAVDDLP), - 18 => Some(POSSEL_A::VREFDIV1V25), - 19 => Some(POSSEL_A::VREFDIV1V25LP), - 20 => Some(POSSEL_A::VREFDIV2V5), - 21 => Some(POSSEL_A::VREFDIV2V5LP), - 32 => Some(POSSEL_A::VSENSE01DIV4), - 33 => Some(POSSEL_A::VSENSE01DIV4LP), - 34 => Some(POSSEL_A::VSENSE11DIV4), - 35 => Some(POSSEL_A::VSENSE11DIV4LP), - 64 => Some(POSSEL_A::VDACOUT0), - 65 => Some(POSSEL_A::VDACOUT1), - 80 => Some(POSSEL_A::EXTPA), - 81 => Some(POSSEL_A::EXTPB), - 82 => Some(POSSEL_A::EXTPC), - 83 => Some(POSSEL_A::EXTPD), - 128 => Some(POSSEL_A::PA0), - 129 => Some(POSSEL_A::PA1), - 130 => Some(POSSEL_A::PA2), - 131 => Some(POSSEL_A::PA3), - 132 => Some(POSSEL_A::PA4), - 133 => Some(POSSEL_A::PA5), - 134 => Some(POSSEL_A::PA6), - 135 => Some(POSSEL_A::PA7), - 136 => Some(POSSEL_A::PA8), - 137 => Some(POSSEL_A::PA9), - 138 => Some(POSSEL_A::PA10), - 139 => Some(POSSEL_A::PA11), - 140 => Some(POSSEL_A::PA12), - 141 => Some(POSSEL_A::PA13), - 142 => Some(POSSEL_A::PA14), - 143 => Some(POSSEL_A::PA15), - 144 => Some(POSSEL_A::PB0), - 145 => Some(POSSEL_A::PB1), - 146 => Some(POSSEL_A::PB2), - 147 => Some(POSSEL_A::PB3), - 148 => Some(POSSEL_A::PB4), - 149 => Some(POSSEL_A::PB5), - 150 => Some(POSSEL_A::PB6), - 151 => Some(POSSEL_A::PB7), - 152 => Some(POSSEL_A::PB8), - 153 => Some(POSSEL_A::PB9), - 154 => Some(POSSEL_A::PB10), - 155 => Some(POSSEL_A::PB11), - 156 => Some(POSSEL_A::PB12), - 157 => Some(POSSEL_A::PB13), - 158 => Some(POSSEL_A::PB14), - 159 => Some(POSSEL_A::PB15), - 160 => Some(POSSEL_A::PC0), - 161 => Some(POSSEL_A::PC1), - 162 => Some(POSSEL_A::PC2), - 163 => Some(POSSEL_A::PC3), - 164 => Some(POSSEL_A::PC4), - 165 => Some(POSSEL_A::PC5), - 166 => Some(POSSEL_A::PC6), - 167 => Some(POSSEL_A::PC7), - 168 => Some(POSSEL_A::PC8), - 169 => Some(POSSEL_A::PC9), - 170 => Some(POSSEL_A::PC10), - 171 => Some(POSSEL_A::PC11), - 172 => Some(POSSEL_A::PC12), - 173 => Some(POSSEL_A::PC13), - 174 => Some(POSSEL_A::PC14), - 175 => Some(POSSEL_A::PC15), - 176 => Some(POSSEL_A::PD0), - 177 => Some(POSSEL_A::PD1), - 178 => Some(POSSEL_A::PD2), - 179 => Some(POSSEL_A::PD3), - 180 => Some(POSSEL_A::PD4), - 181 => Some(POSSEL_A::PD5), - 182 => Some(POSSEL_A::PD6), - 183 => Some(POSSEL_A::PD7), - 184 => Some(POSSEL_A::PD8), - 185 => Some(POSSEL_A::PD9), - 186 => Some(POSSEL_A::PD10), - 187 => Some(POSSEL_A::PD11), - 188 => Some(POSSEL_A::PD12), - 189 => Some(POSSEL_A::PD13), - 190 => Some(POSSEL_A::PD14), - 191 => Some(POSSEL_A::PD15), + 0 => Some(Possel::Vss), + 16 => Some(Possel::Vrefdivavdd), + 17 => Some(Possel::Vrefdivavddlp), + 18 => Some(Possel::Vrefdiv1v25), + 19 => Some(Possel::Vrefdiv1v25lp), + 20 => Some(Possel::Vrefdiv2v5), + 21 => Some(Possel::Vrefdiv2v5lp), + 32 => Some(Possel::Vsense01div4), + 33 => Some(Possel::Vsense01div4lp), + 34 => Some(Possel::Vsense11div4), + 35 => Some(Possel::Vsense11div4lp), + 64 => Some(Possel::Vdacout0), + 65 => Some(Possel::Vdacout1), + 80 => Some(Possel::Extpa), + 81 => Some(Possel::Extpb), + 82 => Some(Possel::Extpc), + 83 => Some(Possel::Extpd), + 128 => Some(Possel::Pa0), + 129 => Some(Possel::Pa1), + 130 => Some(Possel::Pa2), + 131 => Some(Possel::Pa3), + 132 => Some(Possel::Pa4), + 133 => Some(Possel::Pa5), + 134 => Some(Possel::Pa6), + 135 => Some(Possel::Pa7), + 136 => Some(Possel::Pa8), + 137 => Some(Possel::Pa9), + 138 => Some(Possel::Pa10), + 139 => Some(Possel::Pa11), + 140 => Some(Possel::Pa12), + 141 => Some(Possel::Pa13), + 142 => Some(Possel::Pa14), + 143 => Some(Possel::Pa15), + 144 => Some(Possel::Pb0), + 145 => Some(Possel::Pb1), + 146 => Some(Possel::Pb2), + 147 => Some(Possel::Pb3), + 148 => Some(Possel::Pb4), + 149 => Some(Possel::Pb5), + 150 => Some(Possel::Pb6), + 151 => Some(Possel::Pb7), + 152 => Some(Possel::Pb8), + 153 => Some(Possel::Pb9), + 154 => Some(Possel::Pb10), + 155 => Some(Possel::Pb11), + 156 => Some(Possel::Pb12), + 157 => Some(Possel::Pb13), + 158 => Some(Possel::Pb14), + 159 => Some(Possel::Pb15), + 160 => Some(Possel::Pc0), + 161 => Some(Possel::Pc1), + 162 => Some(Possel::Pc2), + 163 => Some(Possel::Pc3), + 164 => Some(Possel::Pc4), + 165 => Some(Possel::Pc5), + 166 => Some(Possel::Pc6), + 167 => Some(Possel::Pc7), + 168 => Some(Possel::Pc8), + 169 => Some(Possel::Pc9), + 170 => Some(Possel::Pc10), + 171 => Some(Possel::Pc11), + 172 => Some(Possel::Pc12), + 173 => Some(Possel::Pc13), + 174 => Some(Possel::Pc14), + 175 => Some(Possel::Pc15), + 176 => Some(Possel::Pd0), + 177 => Some(Possel::Pd1), + 178 => Some(Possel::Pd2), + 179 => Some(Possel::Pd3), + 180 => Some(Possel::Pd4), + 181 => Some(Possel::Pd5), + 182 => Some(Possel::Pd6), + 183 => Some(Possel::Pd7), + 184 => Some(Possel::Pd8), + 185 => Some(Possel::Pd9), + 186 => Some(Possel::Pd10), + 187 => Some(Possel::Pd11), + 188 => Some(Possel::Pd12), + 189 => Some(Possel::Pd13), + 190 => Some(Possel::Pd14), + 191 => Some(Possel::Pd15), _ => None, } } - #[doc = "Checks if the value of the field is `VSS`"] + #[doc = "VSS"] #[inline(always)] pub fn is_vss(&self) -> bool { - *self == POSSEL_A::VSS + *self == Possel::Vss } - #[doc = "Checks if the value of the field is `VREFDIVAVDD`"] + #[doc = "Divided AVDD"] #[inline(always)] pub fn is_vrefdivavdd(&self) -> bool { - *self == POSSEL_A::VREFDIVAVDD + *self == Possel::Vrefdivavdd } - #[doc = "Checks if the value of the field is `VREFDIVAVDDLP`"] + #[doc = "Low-Power Divided AVDD"] #[inline(always)] pub fn is_vrefdivavddlp(&self) -> bool { - *self == POSSEL_A::VREFDIVAVDDLP + *self == Possel::Vrefdivavddlp } - #[doc = "Checks if the value of the field is `VREFDIV1V25`"] + #[doc = "Divided 1V25 reference"] #[inline(always)] pub fn is_vrefdiv1v25(&self) -> bool { - *self == POSSEL_A::VREFDIV1V25 + *self == Possel::Vrefdiv1v25 } - #[doc = "Checks if the value of the field is `VREFDIV1V25LP`"] + #[doc = "Low-power Divided 1V25 reference"] #[inline(always)] pub fn is_vrefdiv1v25lp(&self) -> bool { - *self == POSSEL_A::VREFDIV1V25LP + *self == Possel::Vrefdiv1v25lp } - #[doc = "Checks if the value of the field is `VREFDIV2V5`"] + #[doc = "Divided 2V5 reference"] #[inline(always)] pub fn is_vrefdiv2v5(&self) -> bool { - *self == POSSEL_A::VREFDIV2V5 + *self == Possel::Vrefdiv2v5 } - #[doc = "Checks if the value of the field is `VREFDIV2V5LP`"] + #[doc = "Low-power Divided 2V5 reference"] #[inline(always)] pub fn is_vrefdiv2v5lp(&self) -> bool { - *self == POSSEL_A::VREFDIV2V5LP + *self == Possel::Vrefdiv2v5lp } - #[doc = "Checks if the value of the field is `VSENSE01DIV4`"] + #[doc = "VSENSE0 divided by 4"] #[inline(always)] pub fn is_vsense01div4(&self) -> bool { - *self == POSSEL_A::VSENSE01DIV4 + *self == Possel::Vsense01div4 } - #[doc = "Checks if the value of the field is `VSENSE01DIV4LP`"] + #[doc = "Low-power VSENSE0 divided by 4"] #[inline(always)] pub fn is_vsense01div4lp(&self) -> bool { - *self == POSSEL_A::VSENSE01DIV4LP + *self == Possel::Vsense01div4lp } - #[doc = "Checks if the value of the field is `VSENSE11DIV4`"] + #[doc = "VSENSE1 divided by 4"] #[inline(always)] pub fn is_vsense11div4(&self) -> bool { - *self == POSSEL_A::VSENSE11DIV4 + *self == Possel::Vsense11div4 } - #[doc = "Checks if the value of the field is `VSENSE11DIV4LP`"] + #[doc = "Low-power VSENSE1 divided by 4"] #[inline(always)] pub fn is_vsense11div4lp(&self) -> bool { - *self == POSSEL_A::VSENSE11DIV4LP + *self == Possel::Vsense11div4lp } - #[doc = "Checks if the value of the field is `VDACOUT0`"] + #[doc = "VDAC0 channel 0 output"] #[inline(always)] pub fn is_vdacout0(&self) -> bool { - *self == POSSEL_A::VDACOUT0 + *self == Possel::Vdacout0 } - #[doc = "Checks if the value of the field is `VDACOUT1`"] + #[doc = "VDAC0 channel 1 output"] #[inline(always)] pub fn is_vdacout1(&self) -> bool { - *self == POSSEL_A::VDACOUT1 + *self == Possel::Vdacout1 } - #[doc = "Checks if the value of the field is `EXTPA`"] + #[doc = "External interface, base is PA0."] #[inline(always)] pub fn is_extpa(&self) -> bool { - *self == POSSEL_A::EXTPA + *self == Possel::Extpa } - #[doc = "Checks if the value of the field is `EXTPB`"] + #[doc = "External interface, base is PB0."] #[inline(always)] pub fn is_extpb(&self) -> bool { - *self == POSSEL_A::EXTPB + *self == Possel::Extpb } - #[doc = "Checks if the value of the field is `EXTPC`"] + #[doc = "External interface, base is PC0."] #[inline(always)] pub fn is_extpc(&self) -> bool { - *self == POSSEL_A::EXTPC + *self == Possel::Extpc } - #[doc = "Checks if the value of the field is `EXTPD`"] + #[doc = "External interface, base is PD0."] #[inline(always)] pub fn is_extpd(&self) -> bool { - *self == POSSEL_A::EXTPD + *self == Possel::Extpd } - #[doc = "Checks if the value of the field is `PA0`"] + #[doc = "Port A, Pin0"] #[inline(always)] pub fn is_pa0(&self) -> bool { - *self == POSSEL_A::PA0 + *self == Possel::Pa0 } - #[doc = "Checks if the value of the field is `PA1`"] + #[doc = "Port A, Pin1"] #[inline(always)] pub fn is_pa1(&self) -> bool { - *self == POSSEL_A::PA1 + *self == Possel::Pa1 } - #[doc = "Checks if the value of the field is `PA2`"] + #[doc = "Port A, Pin2"] #[inline(always)] pub fn is_pa2(&self) -> bool { - *self == POSSEL_A::PA2 + *self == Possel::Pa2 } - #[doc = "Checks if the value of the field is `PA3`"] + #[doc = "Port A, Pin3"] #[inline(always)] pub fn is_pa3(&self) -> bool { - *self == POSSEL_A::PA3 + *self == Possel::Pa3 } - #[doc = "Checks if the value of the field is `PA4`"] + #[doc = "Port A, Pin4"] #[inline(always)] pub fn is_pa4(&self) -> bool { - *self == POSSEL_A::PA4 + *self == Possel::Pa4 } - #[doc = "Checks if the value of the field is `PA5`"] + #[doc = "Port A, Pin5"] #[inline(always)] pub fn is_pa5(&self) -> bool { - *self == POSSEL_A::PA5 + *self == Possel::Pa5 } - #[doc = "Checks if the value of the field is `PA6`"] + #[doc = "Port A, Pin6"] #[inline(always)] pub fn is_pa6(&self) -> bool { - *self == POSSEL_A::PA6 + *self == Possel::Pa6 } - #[doc = "Checks if the value of the field is `PA7`"] + #[doc = "Port A, Pin7"] #[inline(always)] pub fn is_pa7(&self) -> bool { - *self == POSSEL_A::PA7 + *self == Possel::Pa7 } - #[doc = "Checks if the value of the field is `PA8`"] + #[doc = "Port A, Pin8"] #[inline(always)] pub fn is_pa8(&self) -> bool { - *self == POSSEL_A::PA8 + *self == Possel::Pa8 } - #[doc = "Checks if the value of the field is `PA9`"] + #[doc = "Port A, Pin9"] #[inline(always)] pub fn is_pa9(&self) -> bool { - *self == POSSEL_A::PA9 + *self == Possel::Pa9 } - #[doc = "Checks if the value of the field is `PA10`"] + #[doc = "Port A, Pin10"] #[inline(always)] pub fn is_pa10(&self) -> bool { - *self == POSSEL_A::PA10 + *self == Possel::Pa10 } - #[doc = "Checks if the value of the field is `PA11`"] + #[doc = "Port A, Pin11"] #[inline(always)] pub fn is_pa11(&self) -> bool { - *self == POSSEL_A::PA11 + *self == Possel::Pa11 } - #[doc = "Checks if the value of the field is `PA12`"] + #[doc = "Port A, Pin12"] #[inline(always)] pub fn is_pa12(&self) -> bool { - *self == POSSEL_A::PA12 + *self == Possel::Pa12 } - #[doc = "Checks if the value of the field is `PA13`"] + #[doc = "Port A, Pin13"] #[inline(always)] pub fn is_pa13(&self) -> bool { - *self == POSSEL_A::PA13 + *self == Possel::Pa13 } - #[doc = "Checks if the value of the field is `PA14`"] + #[doc = "Port A, Pin14"] #[inline(always)] pub fn is_pa14(&self) -> bool { - *self == POSSEL_A::PA14 + *self == Possel::Pa14 } - #[doc = "Checks if the value of the field is `PA15`"] + #[doc = "Port A, Pin15"] #[inline(always)] pub fn is_pa15(&self) -> bool { - *self == POSSEL_A::PA15 + *self == Possel::Pa15 } - #[doc = "Checks if the value of the field is `PB0`"] + #[doc = "Port B, Pin0"] #[inline(always)] pub fn is_pb0(&self) -> bool { - *self == POSSEL_A::PB0 + *self == Possel::Pb0 } - #[doc = "Checks if the value of the field is `PB1`"] + #[doc = "Port B, Pin1"] #[inline(always)] pub fn is_pb1(&self) -> bool { - *self == POSSEL_A::PB1 + *self == Possel::Pb1 } - #[doc = "Checks if the value of the field is `PB2`"] + #[doc = "Port B, Pin2"] #[inline(always)] pub fn is_pb2(&self) -> bool { - *self == POSSEL_A::PB2 + *self == Possel::Pb2 } - #[doc = "Checks if the value of the field is `PB3`"] + #[doc = "Port B, Pin3"] #[inline(always)] pub fn is_pb3(&self) -> bool { - *self == POSSEL_A::PB3 + *self == Possel::Pb3 } - #[doc = "Checks if the value of the field is `PB4`"] + #[doc = "Port B, Pin4"] #[inline(always)] pub fn is_pb4(&self) -> bool { - *self == POSSEL_A::PB4 + *self == Possel::Pb4 } - #[doc = "Checks if the value of the field is `PB5`"] + #[doc = "Port B, Pin5"] #[inline(always)] pub fn is_pb5(&self) -> bool { - *self == POSSEL_A::PB5 + *self == Possel::Pb5 } - #[doc = "Checks if the value of the field is `PB6`"] + #[doc = "Port B, Pin6"] #[inline(always)] pub fn is_pb6(&self) -> bool { - *self == POSSEL_A::PB6 + *self == Possel::Pb6 } - #[doc = "Checks if the value of the field is `PB7`"] + #[doc = "Port B, Pin7"] #[inline(always)] pub fn is_pb7(&self) -> bool { - *self == POSSEL_A::PB7 + *self == Possel::Pb7 } - #[doc = "Checks if the value of the field is `PB8`"] + #[doc = "Port B, Pin8"] #[inline(always)] pub fn is_pb8(&self) -> bool { - *self == POSSEL_A::PB8 + *self == Possel::Pb8 } - #[doc = "Checks if the value of the field is `PB9`"] + #[doc = "Port B, Pin9"] #[inline(always)] pub fn is_pb9(&self) -> bool { - *self == POSSEL_A::PB9 + *self == Possel::Pb9 } - #[doc = "Checks if the value of the field is `PB10`"] + #[doc = "Port B, Pin10"] #[inline(always)] pub fn is_pb10(&self) -> bool { - *self == POSSEL_A::PB10 + *self == Possel::Pb10 } - #[doc = "Checks if the value of the field is `PB11`"] + #[doc = "Port B, Pin11"] #[inline(always)] pub fn is_pb11(&self) -> bool { - *self == POSSEL_A::PB11 + *self == Possel::Pb11 } - #[doc = "Checks if the value of the field is `PB12`"] + #[doc = "Port B, Pin12"] #[inline(always)] pub fn is_pb12(&self) -> bool { - *self == POSSEL_A::PB12 + *self == Possel::Pb12 } - #[doc = "Checks if the value of the field is `PB13`"] + #[doc = "Port B, Pin13"] #[inline(always)] pub fn is_pb13(&self) -> bool { - *self == POSSEL_A::PB13 + *self == Possel::Pb13 } - #[doc = "Checks if the value of the field is `PB14`"] + #[doc = "Port B, Pin14"] #[inline(always)] pub fn is_pb14(&self) -> bool { - *self == POSSEL_A::PB14 + *self == Possel::Pb14 } - #[doc = "Checks if the value of the field is `PB15`"] + #[doc = "Port B, Pin15"] #[inline(always)] pub fn is_pb15(&self) -> bool { - *self == POSSEL_A::PB15 + *self == Possel::Pb15 } - #[doc = "Checks if the value of the field is `PC0`"] + #[doc = "Port C, Pin0"] #[inline(always)] pub fn is_pc0(&self) -> bool { - *self == POSSEL_A::PC0 + *self == Possel::Pc0 } - #[doc = "Checks if the value of the field is `PC1`"] + #[doc = "Port C, Pin1"] #[inline(always)] pub fn is_pc1(&self) -> bool { - *self == POSSEL_A::PC1 + *self == Possel::Pc1 } - #[doc = "Checks if the value of the field is `PC2`"] + #[doc = "Port C, Pin2"] #[inline(always)] pub fn is_pc2(&self) -> bool { - *self == POSSEL_A::PC2 + *self == Possel::Pc2 } - #[doc = "Checks if the value of the field is `PC3`"] + #[doc = "Port C, Pin3"] #[inline(always)] pub fn is_pc3(&self) -> bool { - *self == POSSEL_A::PC3 + *self == Possel::Pc3 } - #[doc = "Checks if the value of the field is `PC4`"] + #[doc = "Port C, Pin4"] #[inline(always)] pub fn is_pc4(&self) -> bool { - *self == POSSEL_A::PC4 + *self == Possel::Pc4 } - #[doc = "Checks if the value of the field is `PC5`"] + #[doc = "Port C, Pin5"] #[inline(always)] pub fn is_pc5(&self) -> bool { - *self == POSSEL_A::PC5 + *self == Possel::Pc5 } - #[doc = "Checks if the value of the field is `PC6`"] + #[doc = "Port C, Pin6"] #[inline(always)] pub fn is_pc6(&self) -> bool { - *self == POSSEL_A::PC6 + *self == Possel::Pc6 } - #[doc = "Checks if the value of the field is `PC7`"] + #[doc = "Port C, Pin7"] #[inline(always)] pub fn is_pc7(&self) -> bool { - *self == POSSEL_A::PC7 + *self == Possel::Pc7 } - #[doc = "Checks if the value of the field is `PC8`"] + #[doc = "Port C, Pin8"] #[inline(always)] pub fn is_pc8(&self) -> bool { - *self == POSSEL_A::PC8 + *self == Possel::Pc8 } - #[doc = "Checks if the value of the field is `PC9`"] + #[doc = "Port C, Pin9"] #[inline(always)] pub fn is_pc9(&self) -> bool { - *self == POSSEL_A::PC9 + *self == Possel::Pc9 } - #[doc = "Checks if the value of the field is `PC10`"] + #[doc = "Port C, Pin10"] #[inline(always)] pub fn is_pc10(&self) -> bool { - *self == POSSEL_A::PC10 + *self == Possel::Pc10 } - #[doc = "Checks if the value of the field is `PC11`"] + #[doc = "Port C, Pin11"] #[inline(always)] pub fn is_pc11(&self) -> bool { - *self == POSSEL_A::PC11 + *self == Possel::Pc11 } - #[doc = "Checks if the value of the field is `PC12`"] + #[doc = "Port C, Pin12"] #[inline(always)] pub fn is_pc12(&self) -> bool { - *self == POSSEL_A::PC12 + *self == Possel::Pc12 } - #[doc = "Checks if the value of the field is `PC13`"] + #[doc = "Port C, Pin13"] #[inline(always)] pub fn is_pc13(&self) -> bool { - *self == POSSEL_A::PC13 + *self == Possel::Pc13 } - #[doc = "Checks if the value of the field is `PC14`"] + #[doc = "Port C, Pin14"] #[inline(always)] pub fn is_pc14(&self) -> bool { - *self == POSSEL_A::PC14 + *self == Possel::Pc14 } - #[doc = "Checks if the value of the field is `PC15`"] + #[doc = "Port C, Pin15"] #[inline(always)] pub fn is_pc15(&self) -> bool { - *self == POSSEL_A::PC15 + *self == Possel::Pc15 } - #[doc = "Checks if the value of the field is `PD0`"] + #[doc = "Port D, Pin0"] #[inline(always)] pub fn is_pd0(&self) -> bool { - *self == POSSEL_A::PD0 + *self == Possel::Pd0 } - #[doc = "Checks if the value of the field is `PD1`"] + #[doc = "Port D, Pin1"] #[inline(always)] pub fn is_pd1(&self) -> bool { - *self == POSSEL_A::PD1 + *self == Possel::Pd1 } - #[doc = "Checks if the value of the field is `PD2`"] + #[doc = "Port D, Pin2"] #[inline(always)] pub fn is_pd2(&self) -> bool { - *self == POSSEL_A::PD2 + *self == Possel::Pd2 } - #[doc = "Checks if the value of the field is `PD3`"] + #[doc = "Port D, Pin3"] #[inline(always)] pub fn is_pd3(&self) -> bool { - *self == POSSEL_A::PD3 + *self == Possel::Pd3 } - #[doc = "Checks if the value of the field is `PD4`"] + #[doc = "Port D, Pin4"] #[inline(always)] pub fn is_pd4(&self) -> bool { - *self == POSSEL_A::PD4 + *self == Possel::Pd4 } - #[doc = "Checks if the value of the field is `PD5`"] + #[doc = "Port D, Pin5"] #[inline(always)] pub fn is_pd5(&self) -> bool { - *self == POSSEL_A::PD5 + *self == Possel::Pd5 } - #[doc = "Checks if the value of the field is `PD6`"] + #[doc = "Port D, Pin6"] #[inline(always)] pub fn is_pd6(&self) -> bool { - *self == POSSEL_A::PD6 + *self == Possel::Pd6 } - #[doc = "Checks if the value of the field is `PD7`"] + #[doc = "Port D, Pin7"] #[inline(always)] pub fn is_pd7(&self) -> bool { - *self == POSSEL_A::PD7 + *self == Possel::Pd7 } - #[doc = "Checks if the value of the field is `PD8`"] + #[doc = "Port D, Pin8"] #[inline(always)] pub fn is_pd8(&self) -> bool { - *self == POSSEL_A::PD8 + *self == Possel::Pd8 } - #[doc = "Checks if the value of the field is `PD9`"] + #[doc = "Port D, Pin9"] #[inline(always)] pub fn is_pd9(&self) -> bool { - *self == POSSEL_A::PD9 + *self == Possel::Pd9 } - #[doc = "Checks if the value of the field is `PD10`"] + #[doc = "Port D, Pin10"] #[inline(always)] pub fn is_pd10(&self) -> bool { - *self == POSSEL_A::PD10 + *self == Possel::Pd10 } - #[doc = "Checks if the value of the field is `PD11`"] + #[doc = "Port D, Pin11"] #[inline(always)] pub fn is_pd11(&self) -> bool { - *self == POSSEL_A::PD11 + *self == Possel::Pd11 } - #[doc = "Checks if the value of the field is `PD12`"] + #[doc = "Port D, Pin12"] #[inline(always)] pub fn is_pd12(&self) -> bool { - *self == POSSEL_A::PD12 + *self == Possel::Pd12 } - #[doc = "Checks if the value of the field is `PD13`"] + #[doc = "Port D, Pin13"] #[inline(always)] pub fn is_pd13(&self) -> bool { - *self == POSSEL_A::PD13 + *self == Possel::Pd13 } - #[doc = "Checks if the value of the field is `PD14`"] + #[doc = "Port D, Pin14"] #[inline(always)] pub fn is_pd14(&self) -> bool { - *self == POSSEL_A::PD14 + *self == Possel::Pd14 } - #[doc = "Checks if the value of the field is `PD15`"] + #[doc = "Port D, Pin15"] #[inline(always)] pub fn is_pd15(&self) -> bool { - *self == POSSEL_A::PD15 + *self == Possel::Pd15 } } #[doc = "Field `POSSEL` writer - Positive Input Select"] -pub type POSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, INPUTCTRL_SPEC, u8, POSSEL_A, 8, O>; -impl<'a, const O: u8> POSSEL_W<'a, O> { +pub type PosselW<'a, REG> = crate::FieldWriter<'a, REG, 8, Possel>; +impl<'a, REG> PosselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "VSS"] #[inline(always)] - pub fn vss(self) -> &'a mut W { - self.variant(POSSEL_A::VSS) + pub fn vss(self) -> &'a mut crate::W { + self.variant(Possel::Vss) } #[doc = "Divided AVDD"] #[inline(always)] - pub fn vrefdivavdd(self) -> &'a mut W { - self.variant(POSSEL_A::VREFDIVAVDD) + pub fn vrefdivavdd(self) -> &'a mut crate::W { + self.variant(Possel::Vrefdivavdd) } #[doc = "Low-Power Divided AVDD"] #[inline(always)] - pub fn vrefdivavddlp(self) -> &'a mut W { - self.variant(POSSEL_A::VREFDIVAVDDLP) + pub fn vrefdivavddlp(self) -> &'a mut crate::W { + self.variant(Possel::Vrefdivavddlp) } #[doc = "Divided 1V25 reference"] #[inline(always)] - pub fn vrefdiv1v25(self) -> &'a mut W { - self.variant(POSSEL_A::VREFDIV1V25) + pub fn vrefdiv1v25(self) -> &'a mut crate::W { + self.variant(Possel::Vrefdiv1v25) } #[doc = "Low-power Divided 1V25 reference"] #[inline(always)] - pub fn vrefdiv1v25lp(self) -> &'a mut W { - self.variant(POSSEL_A::VREFDIV1V25LP) + pub fn vrefdiv1v25lp(self) -> &'a mut crate::W { + self.variant(Possel::Vrefdiv1v25lp) } #[doc = "Divided 2V5 reference"] #[inline(always)] - pub fn vrefdiv2v5(self) -> &'a mut W { - self.variant(POSSEL_A::VREFDIV2V5) + pub fn vrefdiv2v5(self) -> &'a mut crate::W { + self.variant(Possel::Vrefdiv2v5) } #[doc = "Low-power Divided 2V5 reference"] #[inline(always)] - pub fn vrefdiv2v5lp(self) -> &'a mut W { - self.variant(POSSEL_A::VREFDIV2V5LP) + pub fn vrefdiv2v5lp(self) -> &'a mut crate::W { + self.variant(Possel::Vrefdiv2v5lp) } #[doc = "VSENSE0 divided by 4"] #[inline(always)] - pub fn vsense01div4(self) -> &'a mut W { - self.variant(POSSEL_A::VSENSE01DIV4) + pub fn vsense01div4(self) -> &'a mut crate::W { + self.variant(Possel::Vsense01div4) } #[doc = "Low-power VSENSE0 divided by 4"] #[inline(always)] - pub fn vsense01div4lp(self) -> &'a mut W { - self.variant(POSSEL_A::VSENSE01DIV4LP) + pub fn vsense01div4lp(self) -> &'a mut crate::W { + self.variant(Possel::Vsense01div4lp) } #[doc = "VSENSE1 divided by 4"] #[inline(always)] - pub fn vsense11div4(self) -> &'a mut W { - self.variant(POSSEL_A::VSENSE11DIV4) + pub fn vsense11div4(self) -> &'a mut crate::W { + self.variant(Possel::Vsense11div4) } #[doc = "Low-power VSENSE1 divided by 4"] #[inline(always)] - pub fn vsense11div4lp(self) -> &'a mut W { - self.variant(POSSEL_A::VSENSE11DIV4LP) + pub fn vsense11div4lp(self) -> &'a mut crate::W { + self.variant(Possel::Vsense11div4lp) } #[doc = "VDAC0 channel 0 output"] #[inline(always)] - pub fn vdacout0(self) -> &'a mut W { - self.variant(POSSEL_A::VDACOUT0) + pub fn vdacout0(self) -> &'a mut crate::W { + self.variant(Possel::Vdacout0) } #[doc = "VDAC0 channel 1 output"] #[inline(always)] - pub fn vdacout1(self) -> &'a mut W { - self.variant(POSSEL_A::VDACOUT1) + pub fn vdacout1(self) -> &'a mut crate::W { + self.variant(Possel::Vdacout1) } #[doc = "External interface, base is PA0."] #[inline(always)] - pub fn extpa(self) -> &'a mut W { - self.variant(POSSEL_A::EXTPA) + pub fn extpa(self) -> &'a mut crate::W { + self.variant(Possel::Extpa) } #[doc = "External interface, base is PB0."] #[inline(always)] - pub fn extpb(self) -> &'a mut W { - self.variant(POSSEL_A::EXTPB) + pub fn extpb(self) -> &'a mut crate::W { + self.variant(Possel::Extpb) } #[doc = "External interface, base is PC0."] #[inline(always)] - pub fn extpc(self) -> &'a mut W { - self.variant(POSSEL_A::EXTPC) + pub fn extpc(self) -> &'a mut crate::W { + self.variant(Possel::Extpc) } #[doc = "External interface, base is PD0."] #[inline(always)] - pub fn extpd(self) -> &'a mut W { - self.variant(POSSEL_A::EXTPD) + pub fn extpd(self) -> &'a mut crate::W { + self.variant(Possel::Extpd) } #[doc = "Port A, Pin0"] #[inline(always)] - pub fn pa0(self) -> &'a mut W { - self.variant(POSSEL_A::PA0) + pub fn pa0(self) -> &'a mut crate::W { + self.variant(Possel::Pa0) } #[doc = "Port A, Pin1"] #[inline(always)] - pub fn pa1(self) -> &'a mut W { - self.variant(POSSEL_A::PA1) + pub fn pa1(self) -> &'a mut crate::W { + self.variant(Possel::Pa1) } #[doc = "Port A, Pin2"] #[inline(always)] - pub fn pa2(self) -> &'a mut W { - self.variant(POSSEL_A::PA2) + pub fn pa2(self) -> &'a mut crate::W { + self.variant(Possel::Pa2) } #[doc = "Port A, Pin3"] #[inline(always)] - pub fn pa3(self) -> &'a mut W { - self.variant(POSSEL_A::PA3) + pub fn pa3(self) -> &'a mut crate::W { + self.variant(Possel::Pa3) } #[doc = "Port A, Pin4"] #[inline(always)] - pub fn pa4(self) -> &'a mut W { - self.variant(POSSEL_A::PA4) + pub fn pa4(self) -> &'a mut crate::W { + self.variant(Possel::Pa4) } #[doc = "Port A, Pin5"] #[inline(always)] - pub fn pa5(self) -> &'a mut W { - self.variant(POSSEL_A::PA5) + pub fn pa5(self) -> &'a mut crate::W { + self.variant(Possel::Pa5) } #[doc = "Port A, Pin6"] #[inline(always)] - pub fn pa6(self) -> &'a mut W { - self.variant(POSSEL_A::PA6) + pub fn pa6(self) -> &'a mut crate::W { + self.variant(Possel::Pa6) } #[doc = "Port A, Pin7"] #[inline(always)] - pub fn pa7(self) -> &'a mut W { - self.variant(POSSEL_A::PA7) + pub fn pa7(self) -> &'a mut crate::W { + self.variant(Possel::Pa7) } #[doc = "Port A, Pin8"] #[inline(always)] - pub fn pa8(self) -> &'a mut W { - self.variant(POSSEL_A::PA8) + pub fn pa8(self) -> &'a mut crate::W { + self.variant(Possel::Pa8) } #[doc = "Port A, Pin9"] #[inline(always)] - pub fn pa9(self) -> &'a mut W { - self.variant(POSSEL_A::PA9) + pub fn pa9(self) -> &'a mut crate::W { + self.variant(Possel::Pa9) } #[doc = "Port A, Pin10"] #[inline(always)] - pub fn pa10(self) -> &'a mut W { - self.variant(POSSEL_A::PA10) + pub fn pa10(self) -> &'a mut crate::W { + self.variant(Possel::Pa10) } #[doc = "Port A, Pin11"] #[inline(always)] - pub fn pa11(self) -> &'a mut W { - self.variant(POSSEL_A::PA11) + pub fn pa11(self) -> &'a mut crate::W { + self.variant(Possel::Pa11) } #[doc = "Port A, Pin12"] #[inline(always)] - pub fn pa12(self) -> &'a mut W { - self.variant(POSSEL_A::PA12) + pub fn pa12(self) -> &'a mut crate::W { + self.variant(Possel::Pa12) } #[doc = "Port A, Pin13"] #[inline(always)] - pub fn pa13(self) -> &'a mut W { - self.variant(POSSEL_A::PA13) + pub fn pa13(self) -> &'a mut crate::W { + self.variant(Possel::Pa13) } #[doc = "Port A, Pin14"] #[inline(always)] - pub fn pa14(self) -> &'a mut W { - self.variant(POSSEL_A::PA14) + pub fn pa14(self) -> &'a mut crate::W { + self.variant(Possel::Pa14) } #[doc = "Port A, Pin15"] #[inline(always)] - pub fn pa15(self) -> &'a mut W { - self.variant(POSSEL_A::PA15) + pub fn pa15(self) -> &'a mut crate::W { + self.variant(Possel::Pa15) } #[doc = "Port B, Pin0"] #[inline(always)] - pub fn pb0(self) -> &'a mut W { - self.variant(POSSEL_A::PB0) + pub fn pb0(self) -> &'a mut crate::W { + self.variant(Possel::Pb0) } #[doc = "Port B, Pin1"] #[inline(always)] - pub fn pb1(self) -> &'a mut W { - self.variant(POSSEL_A::PB1) + pub fn pb1(self) -> &'a mut crate::W { + self.variant(Possel::Pb1) } #[doc = "Port B, Pin2"] #[inline(always)] - pub fn pb2(self) -> &'a mut W { - self.variant(POSSEL_A::PB2) + pub fn pb2(self) -> &'a mut crate::W { + self.variant(Possel::Pb2) } #[doc = "Port B, Pin3"] #[inline(always)] - pub fn pb3(self) -> &'a mut W { - self.variant(POSSEL_A::PB3) + pub fn pb3(self) -> &'a mut crate::W { + self.variant(Possel::Pb3) } #[doc = "Port B, Pin4"] #[inline(always)] - pub fn pb4(self) -> &'a mut W { - self.variant(POSSEL_A::PB4) + pub fn pb4(self) -> &'a mut crate::W { + self.variant(Possel::Pb4) } #[doc = "Port B, Pin5"] #[inline(always)] - pub fn pb5(self) -> &'a mut W { - self.variant(POSSEL_A::PB5) + pub fn pb5(self) -> &'a mut crate::W { + self.variant(Possel::Pb5) } #[doc = "Port B, Pin6"] #[inline(always)] - pub fn pb6(self) -> &'a mut W { - self.variant(POSSEL_A::PB6) + pub fn pb6(self) -> &'a mut crate::W { + self.variant(Possel::Pb6) } #[doc = "Port B, Pin7"] #[inline(always)] - pub fn pb7(self) -> &'a mut W { - self.variant(POSSEL_A::PB7) + pub fn pb7(self) -> &'a mut crate::W { + self.variant(Possel::Pb7) } #[doc = "Port B, Pin8"] #[inline(always)] - pub fn pb8(self) -> &'a mut W { - self.variant(POSSEL_A::PB8) + pub fn pb8(self) -> &'a mut crate::W { + self.variant(Possel::Pb8) } #[doc = "Port B, Pin9"] #[inline(always)] - pub fn pb9(self) -> &'a mut W { - self.variant(POSSEL_A::PB9) + pub fn pb9(self) -> &'a mut crate::W { + self.variant(Possel::Pb9) } #[doc = "Port B, Pin10"] #[inline(always)] - pub fn pb10(self) -> &'a mut W { - self.variant(POSSEL_A::PB10) + pub fn pb10(self) -> &'a mut crate::W { + self.variant(Possel::Pb10) } #[doc = "Port B, Pin11"] #[inline(always)] - pub fn pb11(self) -> &'a mut W { - self.variant(POSSEL_A::PB11) + pub fn pb11(self) -> &'a mut crate::W { + self.variant(Possel::Pb11) } #[doc = "Port B, Pin12"] #[inline(always)] - pub fn pb12(self) -> &'a mut W { - self.variant(POSSEL_A::PB12) + pub fn pb12(self) -> &'a mut crate::W { + self.variant(Possel::Pb12) } #[doc = "Port B, Pin13"] #[inline(always)] - pub fn pb13(self) -> &'a mut W { - self.variant(POSSEL_A::PB13) + pub fn pb13(self) -> &'a mut crate::W { + self.variant(Possel::Pb13) } #[doc = "Port B, Pin14"] #[inline(always)] - pub fn pb14(self) -> &'a mut W { - self.variant(POSSEL_A::PB14) + pub fn pb14(self) -> &'a mut crate::W { + self.variant(Possel::Pb14) } #[doc = "Port B, Pin15"] #[inline(always)] - pub fn pb15(self) -> &'a mut W { - self.variant(POSSEL_A::PB15) + pub fn pb15(self) -> &'a mut crate::W { + self.variant(Possel::Pb15) } #[doc = "Port C, Pin0"] #[inline(always)] - pub fn pc0(self) -> &'a mut W { - self.variant(POSSEL_A::PC0) + pub fn pc0(self) -> &'a mut crate::W { + self.variant(Possel::Pc0) } #[doc = "Port C, Pin1"] #[inline(always)] - pub fn pc1(self) -> &'a mut W { - self.variant(POSSEL_A::PC1) + pub fn pc1(self) -> &'a mut crate::W { + self.variant(Possel::Pc1) } #[doc = "Port C, Pin2"] #[inline(always)] - pub fn pc2(self) -> &'a mut W { - self.variant(POSSEL_A::PC2) + pub fn pc2(self) -> &'a mut crate::W { + self.variant(Possel::Pc2) } #[doc = "Port C, Pin3"] #[inline(always)] - pub fn pc3(self) -> &'a mut W { - self.variant(POSSEL_A::PC3) + pub fn pc3(self) -> &'a mut crate::W { + self.variant(Possel::Pc3) } #[doc = "Port C, Pin4"] #[inline(always)] - pub fn pc4(self) -> &'a mut W { - self.variant(POSSEL_A::PC4) + pub fn pc4(self) -> &'a mut crate::W { + self.variant(Possel::Pc4) } #[doc = "Port C, Pin5"] #[inline(always)] - pub fn pc5(self) -> &'a mut W { - self.variant(POSSEL_A::PC5) + pub fn pc5(self) -> &'a mut crate::W { + self.variant(Possel::Pc5) } #[doc = "Port C, Pin6"] #[inline(always)] - pub fn pc6(self) -> &'a mut W { - self.variant(POSSEL_A::PC6) + pub fn pc6(self) -> &'a mut crate::W { + self.variant(Possel::Pc6) } #[doc = "Port C, Pin7"] #[inline(always)] - pub fn pc7(self) -> &'a mut W { - self.variant(POSSEL_A::PC7) + pub fn pc7(self) -> &'a mut crate::W { + self.variant(Possel::Pc7) } #[doc = "Port C, Pin8"] #[inline(always)] - pub fn pc8(self) -> &'a mut W { - self.variant(POSSEL_A::PC8) + pub fn pc8(self) -> &'a mut crate::W { + self.variant(Possel::Pc8) } #[doc = "Port C, Pin9"] #[inline(always)] - pub fn pc9(self) -> &'a mut W { - self.variant(POSSEL_A::PC9) + pub fn pc9(self) -> &'a mut crate::W { + self.variant(Possel::Pc9) } #[doc = "Port C, Pin10"] #[inline(always)] - pub fn pc10(self) -> &'a mut W { - self.variant(POSSEL_A::PC10) + pub fn pc10(self) -> &'a mut crate::W { + self.variant(Possel::Pc10) } #[doc = "Port C, Pin11"] #[inline(always)] - pub fn pc11(self) -> &'a mut W { - self.variant(POSSEL_A::PC11) + pub fn pc11(self) -> &'a mut crate::W { + self.variant(Possel::Pc11) } #[doc = "Port C, Pin12"] #[inline(always)] - pub fn pc12(self) -> &'a mut W { - self.variant(POSSEL_A::PC12) + pub fn pc12(self) -> &'a mut crate::W { + self.variant(Possel::Pc12) } #[doc = "Port C, Pin13"] #[inline(always)] - pub fn pc13(self) -> &'a mut W { - self.variant(POSSEL_A::PC13) + pub fn pc13(self) -> &'a mut crate::W { + self.variant(Possel::Pc13) } #[doc = "Port C, Pin14"] #[inline(always)] - pub fn pc14(self) -> &'a mut W { - self.variant(POSSEL_A::PC14) + pub fn pc14(self) -> &'a mut crate::W { + self.variant(Possel::Pc14) } #[doc = "Port C, Pin15"] #[inline(always)] - pub fn pc15(self) -> &'a mut W { - self.variant(POSSEL_A::PC15) + pub fn pc15(self) -> &'a mut crate::W { + self.variant(Possel::Pc15) } #[doc = "Port D, Pin0"] #[inline(always)] - pub fn pd0(self) -> &'a mut W { - self.variant(POSSEL_A::PD0) + pub fn pd0(self) -> &'a mut crate::W { + self.variant(Possel::Pd0) } #[doc = "Port D, Pin1"] #[inline(always)] - pub fn pd1(self) -> &'a mut W { - self.variant(POSSEL_A::PD1) + pub fn pd1(self) -> &'a mut crate::W { + self.variant(Possel::Pd1) } #[doc = "Port D, Pin2"] #[inline(always)] - pub fn pd2(self) -> &'a mut W { - self.variant(POSSEL_A::PD2) + pub fn pd2(self) -> &'a mut crate::W { + self.variant(Possel::Pd2) } #[doc = "Port D, Pin3"] #[inline(always)] - pub fn pd3(self) -> &'a mut W { - self.variant(POSSEL_A::PD3) + pub fn pd3(self) -> &'a mut crate::W { + self.variant(Possel::Pd3) } #[doc = "Port D, Pin4"] #[inline(always)] - pub fn pd4(self) -> &'a mut W { - self.variant(POSSEL_A::PD4) + pub fn pd4(self) -> &'a mut crate::W { + self.variant(Possel::Pd4) } #[doc = "Port D, Pin5"] #[inline(always)] - pub fn pd5(self) -> &'a mut W { - self.variant(POSSEL_A::PD5) + pub fn pd5(self) -> &'a mut crate::W { + self.variant(Possel::Pd5) } #[doc = "Port D, Pin6"] #[inline(always)] - pub fn pd6(self) -> &'a mut W { - self.variant(POSSEL_A::PD6) + pub fn pd6(self) -> &'a mut crate::W { + self.variant(Possel::Pd6) } #[doc = "Port D, Pin7"] #[inline(always)] - pub fn pd7(self) -> &'a mut W { - self.variant(POSSEL_A::PD7) + pub fn pd7(self) -> &'a mut crate::W { + self.variant(Possel::Pd7) } #[doc = "Port D, Pin8"] #[inline(always)] - pub fn pd8(self) -> &'a mut W { - self.variant(POSSEL_A::PD8) + pub fn pd8(self) -> &'a mut crate::W { + self.variant(Possel::Pd8) } #[doc = "Port D, Pin9"] #[inline(always)] - pub fn pd9(self) -> &'a mut W { - self.variant(POSSEL_A::PD9) + pub fn pd9(self) -> &'a mut crate::W { + self.variant(Possel::Pd9) } #[doc = "Port D, Pin10"] #[inline(always)] - pub fn pd10(self) -> &'a mut W { - self.variant(POSSEL_A::PD10) + pub fn pd10(self) -> &'a mut crate::W { + self.variant(Possel::Pd10) } #[doc = "Port D, Pin11"] #[inline(always)] - pub fn pd11(self) -> &'a mut W { - self.variant(POSSEL_A::PD11) + pub fn pd11(self) -> &'a mut crate::W { + self.variant(Possel::Pd11) } #[doc = "Port D, Pin12"] #[inline(always)] - pub fn pd12(self) -> &'a mut W { - self.variant(POSSEL_A::PD12) + pub fn pd12(self) -> &'a mut crate::W { + self.variant(Possel::Pd12) } #[doc = "Port D, Pin13"] #[inline(always)] - pub fn pd13(self) -> &'a mut W { - self.variant(POSSEL_A::PD13) + pub fn pd13(self) -> &'a mut crate::W { + self.variant(Possel::Pd13) } #[doc = "Port D, Pin14"] #[inline(always)] - pub fn pd14(self) -> &'a mut W { - self.variant(POSSEL_A::PD14) + pub fn pd14(self) -> &'a mut crate::W { + self.variant(Possel::Pd14) } #[doc = "Port D, Pin15"] #[inline(always)] - pub fn pd15(self) -> &'a mut W { - self.variant(POSSEL_A::PD15) + pub fn pd15(self) -> &'a mut crate::W { + self.variant(Possel::Pd15) } } -#[doc = "Field `NEGSEL` reader - Negative Input Select"] -pub type NEGSEL_R = crate::FieldReader; #[doc = "Negative Input Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum NEGSEL_A { +pub enum Negsel { #[doc = "0: VSS"] - VSS = 0, + Vss = 0, #[doc = "16: Divided AVDD"] - VREFDIVAVDD = 16, + Vrefdivavdd = 16, #[doc = "17: Low-Power Divided AVDD"] - VREFDIVAVDDLP = 17, + Vrefdivavddlp = 17, #[doc = "18: Divided 1V25 reference"] - VREFDIV1V25 = 18, + Vrefdiv1v25 = 18, #[doc = "19: Low-power Divided 1V25 reference"] - VREFDIV1V25LP = 19, + Vrefdiv1v25lp = 19, #[doc = "20: Divided 2V5 reference"] - VREFDIV2V5 = 20, + Vrefdiv2v5 = 20, #[doc = "21: Low-power Divided 2V5 reference"] - VREFDIV2V5LP = 21, + Vrefdiv2v5lp = 21, #[doc = "32: VSENSE0 divided by 4"] - VSENSE01DIV4 = 32, + Vsense01div4 = 32, #[doc = "33: Low-power VSENSE0 divided by 4"] - VSENSE01DIV4LP = 33, + Vsense01div4lp = 33, #[doc = "34: VSENSE1 divided by 4"] - VSENSE11DIV4 = 34, + Vsense11div4 = 34, #[doc = "35: Low-power VSENSE1 divided by 4"] - VSENSE11DIV4LP = 35, - #[doc = "48: Capsense mode"] - CAPSENSE = 48, + Vsense11div4lp = 35, + #[doc = "48: Deprecated capacitive sensing feature, not recommended for new designs"] + Capsense = 48, #[doc = "64: VDAC0 channel 0 output"] - VDACOUT0 = 64, + Vdacout0 = 64, #[doc = "65: VDAC0 channel 1 output"] - VDACOUT1 = 65, + Vdacout1 = 65, #[doc = "128: Port A, Pin0"] - PA0 = 128, + Pa0 = 128, #[doc = "129: Port A, Pin1"] - PA1 = 129, + Pa1 = 129, #[doc = "130: Port A, Pin2"] - PA2 = 130, + Pa2 = 130, #[doc = "131: Port A, Pin3"] - PA3 = 131, + Pa3 = 131, #[doc = "132: Port A, Pin4"] - PA4 = 132, + Pa4 = 132, #[doc = "133: Port A, Pin5"] - PA5 = 133, + Pa5 = 133, #[doc = "134: Port A, Pin6"] - PA6 = 134, + Pa6 = 134, #[doc = "135: Port A, Pin7"] - PA7 = 135, + Pa7 = 135, #[doc = "136: Port A, Pin8"] - PA8 = 136, + Pa8 = 136, #[doc = "137: Port A, Pin9"] - PA9 = 137, + Pa9 = 137, #[doc = "138: Port A, Pin10"] - PA10 = 138, + Pa10 = 138, #[doc = "139: Port A, Pin11"] - PA11 = 139, + Pa11 = 139, #[doc = "140: Port A, Pin12"] - PA12 = 140, + Pa12 = 140, #[doc = "141: Port A, Pin13"] - PA13 = 141, + Pa13 = 141, #[doc = "142: Port A, Pin14"] - PA14 = 142, + Pa14 = 142, #[doc = "143: Port A, Pin15"] - PA15 = 143, + Pa15 = 143, #[doc = "144: Port B, Pin0"] - PB0 = 144, + Pb0 = 144, #[doc = "145: Port B, Pin1"] - PB1 = 145, + Pb1 = 145, #[doc = "146: Port B, Pin2"] - PB2 = 146, + Pb2 = 146, #[doc = "147: Port B, Pin3"] - PB3 = 147, + Pb3 = 147, #[doc = "148: Port B, Pin4"] - PB4 = 148, + Pb4 = 148, #[doc = "149: Port B, Pin5"] - PB5 = 149, + Pb5 = 149, #[doc = "150: Port B, Pin6"] - PB6 = 150, + Pb6 = 150, #[doc = "151: Port B, Pin7"] - PB7 = 151, + Pb7 = 151, #[doc = "152: Port B, Pin8"] - PB8 = 152, + Pb8 = 152, #[doc = "153: Port B, Pin9"] - PB9 = 153, + Pb9 = 153, #[doc = "154: Port B, Pin10"] - PB10 = 154, + Pb10 = 154, #[doc = "155: Port B, Pin11"] - PB11 = 155, + Pb11 = 155, #[doc = "156: Port B, Pin12"] - PB12 = 156, + Pb12 = 156, #[doc = "157: Port B, Pin13"] - PB13 = 157, + Pb13 = 157, #[doc = "158: Port B, Pin14"] - PB14 = 158, + Pb14 = 158, #[doc = "159: Port B, Pin15"] - PB15 = 159, + Pb15 = 159, #[doc = "160: Port C, Pin0"] - PC0 = 160, + Pc0 = 160, #[doc = "161: Port C, Pin1"] - PC1 = 161, + Pc1 = 161, #[doc = "162: Port C, Pin2"] - PC2 = 162, + Pc2 = 162, #[doc = "163: Port C, Pin3"] - PC3 = 163, + Pc3 = 163, #[doc = "164: Port C, Pin4"] - PC4 = 164, + Pc4 = 164, #[doc = "165: Port C, Pin5"] - PC5 = 165, + Pc5 = 165, #[doc = "166: Port C, Pin6"] - PC6 = 166, + Pc6 = 166, #[doc = "167: Port C, Pin7"] - PC7 = 167, + Pc7 = 167, #[doc = "168: Port C, Pin8"] - PC8 = 168, + Pc8 = 168, #[doc = "169: Port C, Pin9"] - PC9 = 169, + Pc9 = 169, #[doc = "170: Port C, Pin10"] - PC10 = 170, + Pc10 = 170, #[doc = "171: Port C, Pin11"] - PC11 = 171, + Pc11 = 171, #[doc = "172: Port C, Pin12"] - PC12 = 172, + Pc12 = 172, #[doc = "173: Port C, Pin13"] - PC13 = 173, + Pc13 = 173, #[doc = "174: Port C, Pin14"] - PC14 = 174, + Pc14 = 174, #[doc = "175: Port C, Pin15"] - PC15 = 175, + Pc15 = 175, #[doc = "176: Port D, Pin0"] - PD0 = 176, + Pd0 = 176, #[doc = "177: Port D, Pin1"] - PD1 = 177, + Pd1 = 177, #[doc = "178: Port D, Pin2"] - PD2 = 178, + Pd2 = 178, #[doc = "179: Port D, Pin3"] - PD3 = 179, + Pd3 = 179, #[doc = "180: Port D, Pin4"] - PD4 = 180, + Pd4 = 180, #[doc = "181: Port D, Pin5"] - PD5 = 181, + Pd5 = 181, #[doc = "182: Port D, Pin6"] - PD6 = 182, + Pd6 = 182, #[doc = "183: Port D, Pin7"] - PD7 = 183, + Pd7 = 183, #[doc = "184: Port D, Pin8"] - PD8 = 184, + Pd8 = 184, #[doc = "185: Port D, Pin9"] - PD9 = 185, + Pd9 = 185, #[doc = "186: Port D, Pin10"] - PD10 = 186, + Pd10 = 186, #[doc = "187: Port D, Pin11"] - PD11 = 187, + Pd11 = 187, #[doc = "188: Port D, Pin12"] - PD12 = 188, + Pd12 = 188, #[doc = "189: Port D, Pin13"] - PD13 = 189, + Pd13 = 189, #[doc = "190: Port D, Pin14"] - PD14 = 190, + Pd14 = 190, #[doc = "191: Port D, Pin15"] - PD15 = 191, + Pd15 = 191, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: NEGSEL_A) -> Self { + fn from(variant: Negsel) -> Self { variant as _ } } -impl NEGSEL_R { +impl crate::FieldSpec for Negsel { + type Ux = u8; +} +impl crate::IsEnum for Negsel {} +#[doc = "Field `NEGSEL` reader - Negative Input Select"] +pub type NegselR = crate::FieldReader; +impl NegselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(NEGSEL_A::VSS), - 16 => Some(NEGSEL_A::VREFDIVAVDD), - 17 => Some(NEGSEL_A::VREFDIVAVDDLP), - 18 => Some(NEGSEL_A::VREFDIV1V25), - 19 => Some(NEGSEL_A::VREFDIV1V25LP), - 20 => Some(NEGSEL_A::VREFDIV2V5), - 21 => Some(NEGSEL_A::VREFDIV2V5LP), - 32 => Some(NEGSEL_A::VSENSE01DIV4), - 33 => Some(NEGSEL_A::VSENSE01DIV4LP), - 34 => Some(NEGSEL_A::VSENSE11DIV4), - 35 => Some(NEGSEL_A::VSENSE11DIV4LP), - 48 => Some(NEGSEL_A::CAPSENSE), - 64 => Some(NEGSEL_A::VDACOUT0), - 65 => Some(NEGSEL_A::VDACOUT1), - 128 => Some(NEGSEL_A::PA0), - 129 => Some(NEGSEL_A::PA1), - 130 => Some(NEGSEL_A::PA2), - 131 => Some(NEGSEL_A::PA3), - 132 => Some(NEGSEL_A::PA4), - 133 => Some(NEGSEL_A::PA5), - 134 => Some(NEGSEL_A::PA6), - 135 => Some(NEGSEL_A::PA7), - 136 => Some(NEGSEL_A::PA8), - 137 => Some(NEGSEL_A::PA9), - 138 => Some(NEGSEL_A::PA10), - 139 => Some(NEGSEL_A::PA11), - 140 => Some(NEGSEL_A::PA12), - 141 => Some(NEGSEL_A::PA13), - 142 => Some(NEGSEL_A::PA14), - 143 => Some(NEGSEL_A::PA15), - 144 => Some(NEGSEL_A::PB0), - 145 => Some(NEGSEL_A::PB1), - 146 => Some(NEGSEL_A::PB2), - 147 => Some(NEGSEL_A::PB3), - 148 => Some(NEGSEL_A::PB4), - 149 => Some(NEGSEL_A::PB5), - 150 => Some(NEGSEL_A::PB6), - 151 => Some(NEGSEL_A::PB7), - 152 => Some(NEGSEL_A::PB8), - 153 => Some(NEGSEL_A::PB9), - 154 => Some(NEGSEL_A::PB10), - 155 => Some(NEGSEL_A::PB11), - 156 => Some(NEGSEL_A::PB12), - 157 => Some(NEGSEL_A::PB13), - 158 => Some(NEGSEL_A::PB14), - 159 => Some(NEGSEL_A::PB15), - 160 => Some(NEGSEL_A::PC0), - 161 => Some(NEGSEL_A::PC1), - 162 => Some(NEGSEL_A::PC2), - 163 => Some(NEGSEL_A::PC3), - 164 => Some(NEGSEL_A::PC4), - 165 => Some(NEGSEL_A::PC5), - 166 => Some(NEGSEL_A::PC6), - 167 => Some(NEGSEL_A::PC7), - 168 => Some(NEGSEL_A::PC8), - 169 => Some(NEGSEL_A::PC9), - 170 => Some(NEGSEL_A::PC10), - 171 => Some(NEGSEL_A::PC11), - 172 => Some(NEGSEL_A::PC12), - 173 => Some(NEGSEL_A::PC13), - 174 => Some(NEGSEL_A::PC14), - 175 => Some(NEGSEL_A::PC15), - 176 => Some(NEGSEL_A::PD0), - 177 => Some(NEGSEL_A::PD1), - 178 => Some(NEGSEL_A::PD2), - 179 => Some(NEGSEL_A::PD3), - 180 => Some(NEGSEL_A::PD4), - 181 => Some(NEGSEL_A::PD5), - 182 => Some(NEGSEL_A::PD6), - 183 => Some(NEGSEL_A::PD7), - 184 => Some(NEGSEL_A::PD8), - 185 => Some(NEGSEL_A::PD9), - 186 => Some(NEGSEL_A::PD10), - 187 => Some(NEGSEL_A::PD11), - 188 => Some(NEGSEL_A::PD12), - 189 => Some(NEGSEL_A::PD13), - 190 => Some(NEGSEL_A::PD14), - 191 => Some(NEGSEL_A::PD15), + 0 => Some(Negsel::Vss), + 16 => Some(Negsel::Vrefdivavdd), + 17 => Some(Negsel::Vrefdivavddlp), + 18 => Some(Negsel::Vrefdiv1v25), + 19 => Some(Negsel::Vrefdiv1v25lp), + 20 => Some(Negsel::Vrefdiv2v5), + 21 => Some(Negsel::Vrefdiv2v5lp), + 32 => Some(Negsel::Vsense01div4), + 33 => Some(Negsel::Vsense01div4lp), + 34 => Some(Negsel::Vsense11div4), + 35 => Some(Negsel::Vsense11div4lp), + 48 => Some(Negsel::Capsense), + 64 => Some(Negsel::Vdacout0), + 65 => Some(Negsel::Vdacout1), + 128 => Some(Negsel::Pa0), + 129 => Some(Negsel::Pa1), + 130 => Some(Negsel::Pa2), + 131 => Some(Negsel::Pa3), + 132 => Some(Negsel::Pa4), + 133 => Some(Negsel::Pa5), + 134 => Some(Negsel::Pa6), + 135 => Some(Negsel::Pa7), + 136 => Some(Negsel::Pa8), + 137 => Some(Negsel::Pa9), + 138 => Some(Negsel::Pa10), + 139 => Some(Negsel::Pa11), + 140 => Some(Negsel::Pa12), + 141 => Some(Negsel::Pa13), + 142 => Some(Negsel::Pa14), + 143 => Some(Negsel::Pa15), + 144 => Some(Negsel::Pb0), + 145 => Some(Negsel::Pb1), + 146 => Some(Negsel::Pb2), + 147 => Some(Negsel::Pb3), + 148 => Some(Negsel::Pb4), + 149 => Some(Negsel::Pb5), + 150 => Some(Negsel::Pb6), + 151 => Some(Negsel::Pb7), + 152 => Some(Negsel::Pb8), + 153 => Some(Negsel::Pb9), + 154 => Some(Negsel::Pb10), + 155 => Some(Negsel::Pb11), + 156 => Some(Negsel::Pb12), + 157 => Some(Negsel::Pb13), + 158 => Some(Negsel::Pb14), + 159 => Some(Negsel::Pb15), + 160 => Some(Negsel::Pc0), + 161 => Some(Negsel::Pc1), + 162 => Some(Negsel::Pc2), + 163 => Some(Negsel::Pc3), + 164 => Some(Negsel::Pc4), + 165 => Some(Negsel::Pc5), + 166 => Some(Negsel::Pc6), + 167 => Some(Negsel::Pc7), + 168 => Some(Negsel::Pc8), + 169 => Some(Negsel::Pc9), + 170 => Some(Negsel::Pc10), + 171 => Some(Negsel::Pc11), + 172 => Some(Negsel::Pc12), + 173 => Some(Negsel::Pc13), + 174 => Some(Negsel::Pc14), + 175 => Some(Negsel::Pc15), + 176 => Some(Negsel::Pd0), + 177 => Some(Negsel::Pd1), + 178 => Some(Negsel::Pd2), + 179 => Some(Negsel::Pd3), + 180 => Some(Negsel::Pd4), + 181 => Some(Negsel::Pd5), + 182 => Some(Negsel::Pd6), + 183 => Some(Negsel::Pd7), + 184 => Some(Negsel::Pd8), + 185 => Some(Negsel::Pd9), + 186 => Some(Negsel::Pd10), + 187 => Some(Negsel::Pd11), + 188 => Some(Negsel::Pd12), + 189 => Some(Negsel::Pd13), + 190 => Some(Negsel::Pd14), + 191 => Some(Negsel::Pd15), _ => None, } } - #[doc = "Checks if the value of the field is `VSS`"] + #[doc = "VSS"] #[inline(always)] pub fn is_vss(&self) -> bool { - *self == NEGSEL_A::VSS + *self == Negsel::Vss } - #[doc = "Checks if the value of the field is `VREFDIVAVDD`"] + #[doc = "Divided AVDD"] #[inline(always)] pub fn is_vrefdivavdd(&self) -> bool { - *self == NEGSEL_A::VREFDIVAVDD + *self == Negsel::Vrefdivavdd } - #[doc = "Checks if the value of the field is `VREFDIVAVDDLP`"] + #[doc = "Low-Power Divided AVDD"] #[inline(always)] pub fn is_vrefdivavddlp(&self) -> bool { - *self == NEGSEL_A::VREFDIVAVDDLP + *self == Negsel::Vrefdivavddlp } - #[doc = "Checks if the value of the field is `VREFDIV1V25`"] + #[doc = "Divided 1V25 reference"] #[inline(always)] pub fn is_vrefdiv1v25(&self) -> bool { - *self == NEGSEL_A::VREFDIV1V25 + *self == Negsel::Vrefdiv1v25 } - #[doc = "Checks if the value of the field is `VREFDIV1V25LP`"] + #[doc = "Low-power Divided 1V25 reference"] #[inline(always)] pub fn is_vrefdiv1v25lp(&self) -> bool { - *self == NEGSEL_A::VREFDIV1V25LP + *self == Negsel::Vrefdiv1v25lp } - #[doc = "Checks if the value of the field is `VREFDIV2V5`"] + #[doc = "Divided 2V5 reference"] #[inline(always)] pub fn is_vrefdiv2v5(&self) -> bool { - *self == NEGSEL_A::VREFDIV2V5 + *self == Negsel::Vrefdiv2v5 } - #[doc = "Checks if the value of the field is `VREFDIV2V5LP`"] + #[doc = "Low-power Divided 2V5 reference"] #[inline(always)] pub fn is_vrefdiv2v5lp(&self) -> bool { - *self == NEGSEL_A::VREFDIV2V5LP + *self == Negsel::Vrefdiv2v5lp } - #[doc = "Checks if the value of the field is `VSENSE01DIV4`"] + #[doc = "VSENSE0 divided by 4"] #[inline(always)] pub fn is_vsense01div4(&self) -> bool { - *self == NEGSEL_A::VSENSE01DIV4 + *self == Negsel::Vsense01div4 } - #[doc = "Checks if the value of the field is `VSENSE01DIV4LP`"] + #[doc = "Low-power VSENSE0 divided by 4"] #[inline(always)] pub fn is_vsense01div4lp(&self) -> bool { - *self == NEGSEL_A::VSENSE01DIV4LP + *self == Negsel::Vsense01div4lp } - #[doc = "Checks if the value of the field is `VSENSE11DIV4`"] + #[doc = "VSENSE1 divided by 4"] #[inline(always)] pub fn is_vsense11div4(&self) -> bool { - *self == NEGSEL_A::VSENSE11DIV4 + *self == Negsel::Vsense11div4 } - #[doc = "Checks if the value of the field is `VSENSE11DIV4LP`"] + #[doc = "Low-power VSENSE1 divided by 4"] #[inline(always)] pub fn is_vsense11div4lp(&self) -> bool { - *self == NEGSEL_A::VSENSE11DIV4LP + *self == Negsel::Vsense11div4lp } - #[doc = "Checks if the value of the field is `CAPSENSE`"] + #[doc = "Deprecated capacitive sensing feature, not recommended for new designs"] #[inline(always)] pub fn is_capsense(&self) -> bool { - *self == NEGSEL_A::CAPSENSE + *self == Negsel::Capsense } - #[doc = "Checks if the value of the field is `VDACOUT0`"] + #[doc = "VDAC0 channel 0 output"] #[inline(always)] pub fn is_vdacout0(&self) -> bool { - *self == NEGSEL_A::VDACOUT0 + *self == Negsel::Vdacout0 } - #[doc = "Checks if the value of the field is `VDACOUT1`"] + #[doc = "VDAC0 channel 1 output"] #[inline(always)] pub fn is_vdacout1(&self) -> bool { - *self == NEGSEL_A::VDACOUT1 + *self == Negsel::Vdacout1 } - #[doc = "Checks if the value of the field is `PA0`"] + #[doc = "Port A, Pin0"] #[inline(always)] pub fn is_pa0(&self) -> bool { - *self == NEGSEL_A::PA0 + *self == Negsel::Pa0 } - #[doc = "Checks if the value of the field is `PA1`"] + #[doc = "Port A, Pin1"] #[inline(always)] pub fn is_pa1(&self) -> bool { - *self == NEGSEL_A::PA1 + *self == Negsel::Pa1 } - #[doc = "Checks if the value of the field is `PA2`"] + #[doc = "Port A, Pin2"] #[inline(always)] pub fn is_pa2(&self) -> bool { - *self == NEGSEL_A::PA2 + *self == Negsel::Pa2 } - #[doc = "Checks if the value of the field is `PA3`"] + #[doc = "Port A, Pin3"] #[inline(always)] pub fn is_pa3(&self) -> bool { - *self == NEGSEL_A::PA3 + *self == Negsel::Pa3 } - #[doc = "Checks if the value of the field is `PA4`"] + #[doc = "Port A, Pin4"] #[inline(always)] pub fn is_pa4(&self) -> bool { - *self == NEGSEL_A::PA4 + *self == Negsel::Pa4 } - #[doc = "Checks if the value of the field is `PA5`"] + #[doc = "Port A, Pin5"] #[inline(always)] pub fn is_pa5(&self) -> bool { - *self == NEGSEL_A::PA5 + *self == Negsel::Pa5 } - #[doc = "Checks if the value of the field is `PA6`"] + #[doc = "Port A, Pin6"] #[inline(always)] pub fn is_pa6(&self) -> bool { - *self == NEGSEL_A::PA6 + *self == Negsel::Pa6 } - #[doc = "Checks if the value of the field is `PA7`"] + #[doc = "Port A, Pin7"] #[inline(always)] pub fn is_pa7(&self) -> bool { - *self == NEGSEL_A::PA7 + *self == Negsel::Pa7 } - #[doc = "Checks if the value of the field is `PA8`"] + #[doc = "Port A, Pin8"] #[inline(always)] pub fn is_pa8(&self) -> bool { - *self == NEGSEL_A::PA8 + *self == Negsel::Pa8 } - #[doc = "Checks if the value of the field is `PA9`"] + #[doc = "Port A, Pin9"] #[inline(always)] pub fn is_pa9(&self) -> bool { - *self == NEGSEL_A::PA9 + *self == Negsel::Pa9 } - #[doc = "Checks if the value of the field is `PA10`"] + #[doc = "Port A, Pin10"] #[inline(always)] pub fn is_pa10(&self) -> bool { - *self == NEGSEL_A::PA10 + *self == Negsel::Pa10 } - #[doc = "Checks if the value of the field is `PA11`"] + #[doc = "Port A, Pin11"] #[inline(always)] pub fn is_pa11(&self) -> bool { - *self == NEGSEL_A::PA11 + *self == Negsel::Pa11 } - #[doc = "Checks if the value of the field is `PA12`"] + #[doc = "Port A, Pin12"] #[inline(always)] pub fn is_pa12(&self) -> bool { - *self == NEGSEL_A::PA12 + *self == Negsel::Pa12 } - #[doc = "Checks if the value of the field is `PA13`"] + #[doc = "Port A, Pin13"] #[inline(always)] pub fn is_pa13(&self) -> bool { - *self == NEGSEL_A::PA13 + *self == Negsel::Pa13 } - #[doc = "Checks if the value of the field is `PA14`"] + #[doc = "Port A, Pin14"] #[inline(always)] pub fn is_pa14(&self) -> bool { - *self == NEGSEL_A::PA14 + *self == Negsel::Pa14 } - #[doc = "Checks if the value of the field is `PA15`"] + #[doc = "Port A, Pin15"] #[inline(always)] pub fn is_pa15(&self) -> bool { - *self == NEGSEL_A::PA15 + *self == Negsel::Pa15 } - #[doc = "Checks if the value of the field is `PB0`"] + #[doc = "Port B, Pin0"] #[inline(always)] pub fn is_pb0(&self) -> bool { - *self == NEGSEL_A::PB0 + *self == Negsel::Pb0 } - #[doc = "Checks if the value of the field is `PB1`"] + #[doc = "Port B, Pin1"] #[inline(always)] pub fn is_pb1(&self) -> bool { - *self == NEGSEL_A::PB1 + *self == Negsel::Pb1 } - #[doc = "Checks if the value of the field is `PB2`"] + #[doc = "Port B, Pin2"] #[inline(always)] pub fn is_pb2(&self) -> bool { - *self == NEGSEL_A::PB2 + *self == Negsel::Pb2 } - #[doc = "Checks if the value of the field is `PB3`"] + #[doc = "Port B, Pin3"] #[inline(always)] pub fn is_pb3(&self) -> bool { - *self == NEGSEL_A::PB3 + *self == Negsel::Pb3 } - #[doc = "Checks if the value of the field is `PB4`"] + #[doc = "Port B, Pin4"] #[inline(always)] pub fn is_pb4(&self) -> bool { - *self == NEGSEL_A::PB4 + *self == Negsel::Pb4 } - #[doc = "Checks if the value of the field is `PB5`"] + #[doc = "Port B, Pin5"] #[inline(always)] pub fn is_pb5(&self) -> bool { - *self == NEGSEL_A::PB5 + *self == Negsel::Pb5 } - #[doc = "Checks if the value of the field is `PB6`"] + #[doc = "Port B, Pin6"] #[inline(always)] pub fn is_pb6(&self) -> bool { - *self == NEGSEL_A::PB6 + *self == Negsel::Pb6 } - #[doc = "Checks if the value of the field is `PB7`"] + #[doc = "Port B, Pin7"] #[inline(always)] pub fn is_pb7(&self) -> bool { - *self == NEGSEL_A::PB7 + *self == Negsel::Pb7 } - #[doc = "Checks if the value of the field is `PB8`"] + #[doc = "Port B, Pin8"] #[inline(always)] pub fn is_pb8(&self) -> bool { - *self == NEGSEL_A::PB8 + *self == Negsel::Pb8 } - #[doc = "Checks if the value of the field is `PB9`"] + #[doc = "Port B, Pin9"] #[inline(always)] pub fn is_pb9(&self) -> bool { - *self == NEGSEL_A::PB9 + *self == Negsel::Pb9 } - #[doc = "Checks if the value of the field is `PB10`"] + #[doc = "Port B, Pin10"] #[inline(always)] pub fn is_pb10(&self) -> bool { - *self == NEGSEL_A::PB10 + *self == Negsel::Pb10 } - #[doc = "Checks if the value of the field is `PB11`"] + #[doc = "Port B, Pin11"] #[inline(always)] pub fn is_pb11(&self) -> bool { - *self == NEGSEL_A::PB11 + *self == Negsel::Pb11 } - #[doc = "Checks if the value of the field is `PB12`"] + #[doc = "Port B, Pin12"] #[inline(always)] pub fn is_pb12(&self) -> bool { - *self == NEGSEL_A::PB12 + *self == Negsel::Pb12 } - #[doc = "Checks if the value of the field is `PB13`"] + #[doc = "Port B, Pin13"] #[inline(always)] pub fn is_pb13(&self) -> bool { - *self == NEGSEL_A::PB13 + *self == Negsel::Pb13 } - #[doc = "Checks if the value of the field is `PB14`"] + #[doc = "Port B, Pin14"] #[inline(always)] pub fn is_pb14(&self) -> bool { - *self == NEGSEL_A::PB14 + *self == Negsel::Pb14 } - #[doc = "Checks if the value of the field is `PB15`"] + #[doc = "Port B, Pin15"] #[inline(always)] pub fn is_pb15(&self) -> bool { - *self == NEGSEL_A::PB15 + *self == Negsel::Pb15 } - #[doc = "Checks if the value of the field is `PC0`"] + #[doc = "Port C, Pin0"] #[inline(always)] pub fn is_pc0(&self) -> bool { - *self == NEGSEL_A::PC0 + *self == Negsel::Pc0 } - #[doc = "Checks if the value of the field is `PC1`"] + #[doc = "Port C, Pin1"] #[inline(always)] pub fn is_pc1(&self) -> bool { - *self == NEGSEL_A::PC1 + *self == Negsel::Pc1 } - #[doc = "Checks if the value of the field is `PC2`"] + #[doc = "Port C, Pin2"] #[inline(always)] pub fn is_pc2(&self) -> bool { - *self == NEGSEL_A::PC2 + *self == Negsel::Pc2 } - #[doc = "Checks if the value of the field is `PC3`"] + #[doc = "Port C, Pin3"] #[inline(always)] pub fn is_pc3(&self) -> bool { - *self == NEGSEL_A::PC3 + *self == Negsel::Pc3 } - #[doc = "Checks if the value of the field is `PC4`"] + #[doc = "Port C, Pin4"] #[inline(always)] pub fn is_pc4(&self) -> bool { - *self == NEGSEL_A::PC4 + *self == Negsel::Pc4 } - #[doc = "Checks if the value of the field is `PC5`"] + #[doc = "Port C, Pin5"] #[inline(always)] pub fn is_pc5(&self) -> bool { - *self == NEGSEL_A::PC5 + *self == Negsel::Pc5 } - #[doc = "Checks if the value of the field is `PC6`"] + #[doc = "Port C, Pin6"] #[inline(always)] pub fn is_pc6(&self) -> bool { - *self == NEGSEL_A::PC6 + *self == Negsel::Pc6 } - #[doc = "Checks if the value of the field is `PC7`"] + #[doc = "Port C, Pin7"] #[inline(always)] pub fn is_pc7(&self) -> bool { - *self == NEGSEL_A::PC7 + *self == Negsel::Pc7 } - #[doc = "Checks if the value of the field is `PC8`"] + #[doc = "Port C, Pin8"] #[inline(always)] pub fn is_pc8(&self) -> bool { - *self == NEGSEL_A::PC8 + *self == Negsel::Pc8 } - #[doc = "Checks if the value of the field is `PC9`"] + #[doc = "Port C, Pin9"] #[inline(always)] pub fn is_pc9(&self) -> bool { - *self == NEGSEL_A::PC9 + *self == Negsel::Pc9 } - #[doc = "Checks if the value of the field is `PC10`"] + #[doc = "Port C, Pin10"] #[inline(always)] pub fn is_pc10(&self) -> bool { - *self == NEGSEL_A::PC10 + *self == Negsel::Pc10 } - #[doc = "Checks if the value of the field is `PC11`"] + #[doc = "Port C, Pin11"] #[inline(always)] pub fn is_pc11(&self) -> bool { - *self == NEGSEL_A::PC11 + *self == Negsel::Pc11 } - #[doc = "Checks if the value of the field is `PC12`"] + #[doc = "Port C, Pin12"] #[inline(always)] pub fn is_pc12(&self) -> bool { - *self == NEGSEL_A::PC12 + *self == Negsel::Pc12 } - #[doc = "Checks if the value of the field is `PC13`"] + #[doc = "Port C, Pin13"] #[inline(always)] pub fn is_pc13(&self) -> bool { - *self == NEGSEL_A::PC13 + *self == Negsel::Pc13 } - #[doc = "Checks if the value of the field is `PC14`"] + #[doc = "Port C, Pin14"] #[inline(always)] pub fn is_pc14(&self) -> bool { - *self == NEGSEL_A::PC14 + *self == Negsel::Pc14 } - #[doc = "Checks if the value of the field is `PC15`"] + #[doc = "Port C, Pin15"] #[inline(always)] pub fn is_pc15(&self) -> bool { - *self == NEGSEL_A::PC15 + *self == Negsel::Pc15 } - #[doc = "Checks if the value of the field is `PD0`"] + #[doc = "Port D, Pin0"] #[inline(always)] pub fn is_pd0(&self) -> bool { - *self == NEGSEL_A::PD0 + *self == Negsel::Pd0 } - #[doc = "Checks if the value of the field is `PD1`"] + #[doc = "Port D, Pin1"] #[inline(always)] pub fn is_pd1(&self) -> bool { - *self == NEGSEL_A::PD1 + *self == Negsel::Pd1 } - #[doc = "Checks if the value of the field is `PD2`"] + #[doc = "Port D, Pin2"] #[inline(always)] pub fn is_pd2(&self) -> bool { - *self == NEGSEL_A::PD2 + *self == Negsel::Pd2 } - #[doc = "Checks if the value of the field is `PD3`"] + #[doc = "Port D, Pin3"] #[inline(always)] pub fn is_pd3(&self) -> bool { - *self == NEGSEL_A::PD3 + *self == Negsel::Pd3 } - #[doc = "Checks if the value of the field is `PD4`"] + #[doc = "Port D, Pin4"] #[inline(always)] pub fn is_pd4(&self) -> bool { - *self == NEGSEL_A::PD4 + *self == Negsel::Pd4 } - #[doc = "Checks if the value of the field is `PD5`"] + #[doc = "Port D, Pin5"] #[inline(always)] pub fn is_pd5(&self) -> bool { - *self == NEGSEL_A::PD5 + *self == Negsel::Pd5 } - #[doc = "Checks if the value of the field is `PD6`"] + #[doc = "Port D, Pin6"] #[inline(always)] pub fn is_pd6(&self) -> bool { - *self == NEGSEL_A::PD6 + *self == Negsel::Pd6 } - #[doc = "Checks if the value of the field is `PD7`"] + #[doc = "Port D, Pin7"] #[inline(always)] pub fn is_pd7(&self) -> bool { - *self == NEGSEL_A::PD7 + *self == Negsel::Pd7 } - #[doc = "Checks if the value of the field is `PD8`"] + #[doc = "Port D, Pin8"] #[inline(always)] pub fn is_pd8(&self) -> bool { - *self == NEGSEL_A::PD8 + *self == Negsel::Pd8 } - #[doc = "Checks if the value of the field is `PD9`"] + #[doc = "Port D, Pin9"] #[inline(always)] pub fn is_pd9(&self) -> bool { - *self == NEGSEL_A::PD9 + *self == Negsel::Pd9 } - #[doc = "Checks if the value of the field is `PD10`"] + #[doc = "Port D, Pin10"] #[inline(always)] pub fn is_pd10(&self) -> bool { - *self == NEGSEL_A::PD10 + *self == Negsel::Pd10 } - #[doc = "Checks if the value of the field is `PD11`"] + #[doc = "Port D, Pin11"] #[inline(always)] pub fn is_pd11(&self) -> bool { - *self == NEGSEL_A::PD11 + *self == Negsel::Pd11 } - #[doc = "Checks if the value of the field is `PD12`"] + #[doc = "Port D, Pin12"] #[inline(always)] pub fn is_pd12(&self) -> bool { - *self == NEGSEL_A::PD12 + *self == Negsel::Pd12 } - #[doc = "Checks if the value of the field is `PD13`"] + #[doc = "Port D, Pin13"] #[inline(always)] pub fn is_pd13(&self) -> bool { - *self == NEGSEL_A::PD13 + *self == Negsel::Pd13 } - #[doc = "Checks if the value of the field is `PD14`"] + #[doc = "Port D, Pin14"] #[inline(always)] pub fn is_pd14(&self) -> bool { - *self == NEGSEL_A::PD14 + *self == Negsel::Pd14 } - #[doc = "Checks if the value of the field is `PD15`"] + #[doc = "Port D, Pin15"] #[inline(always)] pub fn is_pd15(&self) -> bool { - *self == NEGSEL_A::PD15 + *self == Negsel::Pd15 } } #[doc = "Field `NEGSEL` writer - Negative Input Select"] -pub type NEGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, INPUTCTRL_SPEC, u8, NEGSEL_A, 8, O>; -impl<'a, const O: u8> NEGSEL_W<'a, O> { +pub type NegselW<'a, REG> = crate::FieldWriter<'a, REG, 8, Negsel>; +impl<'a, REG> NegselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "VSS"] #[inline(always)] - pub fn vss(self) -> &'a mut W { - self.variant(NEGSEL_A::VSS) + pub fn vss(self) -> &'a mut crate::W { + self.variant(Negsel::Vss) } #[doc = "Divided AVDD"] #[inline(always)] - pub fn vrefdivavdd(self) -> &'a mut W { - self.variant(NEGSEL_A::VREFDIVAVDD) + pub fn vrefdivavdd(self) -> &'a mut crate::W { + self.variant(Negsel::Vrefdivavdd) } #[doc = "Low-Power Divided AVDD"] #[inline(always)] - pub fn vrefdivavddlp(self) -> &'a mut W { - self.variant(NEGSEL_A::VREFDIVAVDDLP) + pub fn vrefdivavddlp(self) -> &'a mut crate::W { + self.variant(Negsel::Vrefdivavddlp) } #[doc = "Divided 1V25 reference"] #[inline(always)] - pub fn vrefdiv1v25(self) -> &'a mut W { - self.variant(NEGSEL_A::VREFDIV1V25) + pub fn vrefdiv1v25(self) -> &'a mut crate::W { + self.variant(Negsel::Vrefdiv1v25) } #[doc = "Low-power Divided 1V25 reference"] #[inline(always)] - pub fn vrefdiv1v25lp(self) -> &'a mut W { - self.variant(NEGSEL_A::VREFDIV1V25LP) + pub fn vrefdiv1v25lp(self) -> &'a mut crate::W { + self.variant(Negsel::Vrefdiv1v25lp) } #[doc = "Divided 2V5 reference"] #[inline(always)] - pub fn vrefdiv2v5(self) -> &'a mut W { - self.variant(NEGSEL_A::VREFDIV2V5) + pub fn vrefdiv2v5(self) -> &'a mut crate::W { + self.variant(Negsel::Vrefdiv2v5) } #[doc = "Low-power Divided 2V5 reference"] #[inline(always)] - pub fn vrefdiv2v5lp(self) -> &'a mut W { - self.variant(NEGSEL_A::VREFDIV2V5LP) + pub fn vrefdiv2v5lp(self) -> &'a mut crate::W { + self.variant(Negsel::Vrefdiv2v5lp) } #[doc = "VSENSE0 divided by 4"] #[inline(always)] - pub fn vsense01div4(self) -> &'a mut W { - self.variant(NEGSEL_A::VSENSE01DIV4) + pub fn vsense01div4(self) -> &'a mut crate::W { + self.variant(Negsel::Vsense01div4) } #[doc = "Low-power VSENSE0 divided by 4"] #[inline(always)] - pub fn vsense01div4lp(self) -> &'a mut W { - self.variant(NEGSEL_A::VSENSE01DIV4LP) + pub fn vsense01div4lp(self) -> &'a mut crate::W { + self.variant(Negsel::Vsense01div4lp) } #[doc = "VSENSE1 divided by 4"] #[inline(always)] - pub fn vsense11div4(self) -> &'a mut W { - self.variant(NEGSEL_A::VSENSE11DIV4) + pub fn vsense11div4(self) -> &'a mut crate::W { + self.variant(Negsel::Vsense11div4) } #[doc = "Low-power VSENSE1 divided by 4"] #[inline(always)] - pub fn vsense11div4lp(self) -> &'a mut W { - self.variant(NEGSEL_A::VSENSE11DIV4LP) + pub fn vsense11div4lp(self) -> &'a mut crate::W { + self.variant(Negsel::Vsense11div4lp) } - #[doc = "Capsense mode"] + #[doc = "Deprecated capacitive sensing feature, not recommended for new designs"] #[inline(always)] - pub fn capsense(self) -> &'a mut W { - self.variant(NEGSEL_A::CAPSENSE) + pub fn capsense(self) -> &'a mut crate::W { + self.variant(Negsel::Capsense) } #[doc = "VDAC0 channel 0 output"] #[inline(always)] - pub fn vdacout0(self) -> &'a mut W { - self.variant(NEGSEL_A::VDACOUT0) + pub fn vdacout0(self) -> &'a mut crate::W { + self.variant(Negsel::Vdacout0) } #[doc = "VDAC0 channel 1 output"] #[inline(always)] - pub fn vdacout1(self) -> &'a mut W { - self.variant(NEGSEL_A::VDACOUT1) + pub fn vdacout1(self) -> &'a mut crate::W { + self.variant(Negsel::Vdacout1) } #[doc = "Port A, Pin0"] #[inline(always)] - pub fn pa0(self) -> &'a mut W { - self.variant(NEGSEL_A::PA0) + pub fn pa0(self) -> &'a mut crate::W { + self.variant(Negsel::Pa0) } #[doc = "Port A, Pin1"] #[inline(always)] - pub fn pa1(self) -> &'a mut W { - self.variant(NEGSEL_A::PA1) + pub fn pa1(self) -> &'a mut crate::W { + self.variant(Negsel::Pa1) } #[doc = "Port A, Pin2"] #[inline(always)] - pub fn pa2(self) -> &'a mut W { - self.variant(NEGSEL_A::PA2) + pub fn pa2(self) -> &'a mut crate::W { + self.variant(Negsel::Pa2) } #[doc = "Port A, Pin3"] #[inline(always)] - pub fn pa3(self) -> &'a mut W { - self.variant(NEGSEL_A::PA3) + pub fn pa3(self) -> &'a mut crate::W { + self.variant(Negsel::Pa3) } #[doc = "Port A, Pin4"] #[inline(always)] - pub fn pa4(self) -> &'a mut W { - self.variant(NEGSEL_A::PA4) + pub fn pa4(self) -> &'a mut crate::W { + self.variant(Negsel::Pa4) } #[doc = "Port A, Pin5"] #[inline(always)] - pub fn pa5(self) -> &'a mut W { - self.variant(NEGSEL_A::PA5) + pub fn pa5(self) -> &'a mut crate::W { + self.variant(Negsel::Pa5) } #[doc = "Port A, Pin6"] #[inline(always)] - pub fn pa6(self) -> &'a mut W { - self.variant(NEGSEL_A::PA6) + pub fn pa6(self) -> &'a mut crate::W { + self.variant(Negsel::Pa6) } #[doc = "Port A, Pin7"] #[inline(always)] - pub fn pa7(self) -> &'a mut W { - self.variant(NEGSEL_A::PA7) + pub fn pa7(self) -> &'a mut crate::W { + self.variant(Negsel::Pa7) } #[doc = "Port A, Pin8"] #[inline(always)] - pub fn pa8(self) -> &'a mut W { - self.variant(NEGSEL_A::PA8) + pub fn pa8(self) -> &'a mut crate::W { + self.variant(Negsel::Pa8) } #[doc = "Port A, Pin9"] #[inline(always)] - pub fn pa9(self) -> &'a mut W { - self.variant(NEGSEL_A::PA9) + pub fn pa9(self) -> &'a mut crate::W { + self.variant(Negsel::Pa9) } #[doc = "Port A, Pin10"] #[inline(always)] - pub fn pa10(self) -> &'a mut W { - self.variant(NEGSEL_A::PA10) + pub fn pa10(self) -> &'a mut crate::W { + self.variant(Negsel::Pa10) } #[doc = "Port A, Pin11"] #[inline(always)] - pub fn pa11(self) -> &'a mut W { - self.variant(NEGSEL_A::PA11) + pub fn pa11(self) -> &'a mut crate::W { + self.variant(Negsel::Pa11) } #[doc = "Port A, Pin12"] #[inline(always)] - pub fn pa12(self) -> &'a mut W { - self.variant(NEGSEL_A::PA12) + pub fn pa12(self) -> &'a mut crate::W { + self.variant(Negsel::Pa12) } #[doc = "Port A, Pin13"] #[inline(always)] - pub fn pa13(self) -> &'a mut W { - self.variant(NEGSEL_A::PA13) + pub fn pa13(self) -> &'a mut crate::W { + self.variant(Negsel::Pa13) } #[doc = "Port A, Pin14"] #[inline(always)] - pub fn pa14(self) -> &'a mut W { - self.variant(NEGSEL_A::PA14) + pub fn pa14(self) -> &'a mut crate::W { + self.variant(Negsel::Pa14) } #[doc = "Port A, Pin15"] #[inline(always)] - pub fn pa15(self) -> &'a mut W { - self.variant(NEGSEL_A::PA15) + pub fn pa15(self) -> &'a mut crate::W { + self.variant(Negsel::Pa15) } #[doc = "Port B, Pin0"] #[inline(always)] - pub fn pb0(self) -> &'a mut W { - self.variant(NEGSEL_A::PB0) + pub fn pb0(self) -> &'a mut crate::W { + self.variant(Negsel::Pb0) } #[doc = "Port B, Pin1"] #[inline(always)] - pub fn pb1(self) -> &'a mut W { - self.variant(NEGSEL_A::PB1) + pub fn pb1(self) -> &'a mut crate::W { + self.variant(Negsel::Pb1) } #[doc = "Port B, Pin2"] #[inline(always)] - pub fn pb2(self) -> &'a mut W { - self.variant(NEGSEL_A::PB2) + pub fn pb2(self) -> &'a mut crate::W { + self.variant(Negsel::Pb2) } #[doc = "Port B, Pin3"] #[inline(always)] - pub fn pb3(self) -> &'a mut W { - self.variant(NEGSEL_A::PB3) + pub fn pb3(self) -> &'a mut crate::W { + self.variant(Negsel::Pb3) } #[doc = "Port B, Pin4"] #[inline(always)] - pub fn pb4(self) -> &'a mut W { - self.variant(NEGSEL_A::PB4) + pub fn pb4(self) -> &'a mut crate::W { + self.variant(Negsel::Pb4) } #[doc = "Port B, Pin5"] #[inline(always)] - pub fn pb5(self) -> &'a mut W { - self.variant(NEGSEL_A::PB5) + pub fn pb5(self) -> &'a mut crate::W { + self.variant(Negsel::Pb5) } #[doc = "Port B, Pin6"] #[inline(always)] - pub fn pb6(self) -> &'a mut W { - self.variant(NEGSEL_A::PB6) + pub fn pb6(self) -> &'a mut crate::W { + self.variant(Negsel::Pb6) } #[doc = "Port B, Pin7"] #[inline(always)] - pub fn pb7(self) -> &'a mut W { - self.variant(NEGSEL_A::PB7) + pub fn pb7(self) -> &'a mut crate::W { + self.variant(Negsel::Pb7) } #[doc = "Port B, Pin8"] #[inline(always)] - pub fn pb8(self) -> &'a mut W { - self.variant(NEGSEL_A::PB8) + pub fn pb8(self) -> &'a mut crate::W { + self.variant(Negsel::Pb8) } #[doc = "Port B, Pin9"] #[inline(always)] - pub fn pb9(self) -> &'a mut W { - self.variant(NEGSEL_A::PB9) + pub fn pb9(self) -> &'a mut crate::W { + self.variant(Negsel::Pb9) } #[doc = "Port B, Pin10"] #[inline(always)] - pub fn pb10(self) -> &'a mut W { - self.variant(NEGSEL_A::PB10) + pub fn pb10(self) -> &'a mut crate::W { + self.variant(Negsel::Pb10) } #[doc = "Port B, Pin11"] #[inline(always)] - pub fn pb11(self) -> &'a mut W { - self.variant(NEGSEL_A::PB11) + pub fn pb11(self) -> &'a mut crate::W { + self.variant(Negsel::Pb11) } #[doc = "Port B, Pin12"] #[inline(always)] - pub fn pb12(self) -> &'a mut W { - self.variant(NEGSEL_A::PB12) + pub fn pb12(self) -> &'a mut crate::W { + self.variant(Negsel::Pb12) } #[doc = "Port B, Pin13"] #[inline(always)] - pub fn pb13(self) -> &'a mut W { - self.variant(NEGSEL_A::PB13) + pub fn pb13(self) -> &'a mut crate::W { + self.variant(Negsel::Pb13) } #[doc = "Port B, Pin14"] #[inline(always)] - pub fn pb14(self) -> &'a mut W { - self.variant(NEGSEL_A::PB14) + pub fn pb14(self) -> &'a mut crate::W { + self.variant(Negsel::Pb14) } #[doc = "Port B, Pin15"] #[inline(always)] - pub fn pb15(self) -> &'a mut W { - self.variant(NEGSEL_A::PB15) + pub fn pb15(self) -> &'a mut crate::W { + self.variant(Negsel::Pb15) } #[doc = "Port C, Pin0"] #[inline(always)] - pub fn pc0(self) -> &'a mut W { - self.variant(NEGSEL_A::PC0) + pub fn pc0(self) -> &'a mut crate::W { + self.variant(Negsel::Pc0) } #[doc = "Port C, Pin1"] #[inline(always)] - pub fn pc1(self) -> &'a mut W { - self.variant(NEGSEL_A::PC1) + pub fn pc1(self) -> &'a mut crate::W { + self.variant(Negsel::Pc1) } #[doc = "Port C, Pin2"] #[inline(always)] - pub fn pc2(self) -> &'a mut W { - self.variant(NEGSEL_A::PC2) + pub fn pc2(self) -> &'a mut crate::W { + self.variant(Negsel::Pc2) } #[doc = "Port C, Pin3"] #[inline(always)] - pub fn pc3(self) -> &'a mut W { - self.variant(NEGSEL_A::PC3) + pub fn pc3(self) -> &'a mut crate::W { + self.variant(Negsel::Pc3) } #[doc = "Port C, Pin4"] #[inline(always)] - pub fn pc4(self) -> &'a mut W { - self.variant(NEGSEL_A::PC4) + pub fn pc4(self) -> &'a mut crate::W { + self.variant(Negsel::Pc4) } #[doc = "Port C, Pin5"] #[inline(always)] - pub fn pc5(self) -> &'a mut W { - self.variant(NEGSEL_A::PC5) + pub fn pc5(self) -> &'a mut crate::W { + self.variant(Negsel::Pc5) } #[doc = "Port C, Pin6"] #[inline(always)] - pub fn pc6(self) -> &'a mut W { - self.variant(NEGSEL_A::PC6) + pub fn pc6(self) -> &'a mut crate::W { + self.variant(Negsel::Pc6) } #[doc = "Port C, Pin7"] #[inline(always)] - pub fn pc7(self) -> &'a mut W { - self.variant(NEGSEL_A::PC7) + pub fn pc7(self) -> &'a mut crate::W { + self.variant(Negsel::Pc7) } #[doc = "Port C, Pin8"] #[inline(always)] - pub fn pc8(self) -> &'a mut W { - self.variant(NEGSEL_A::PC8) + pub fn pc8(self) -> &'a mut crate::W { + self.variant(Negsel::Pc8) } #[doc = "Port C, Pin9"] #[inline(always)] - pub fn pc9(self) -> &'a mut W { - self.variant(NEGSEL_A::PC9) + pub fn pc9(self) -> &'a mut crate::W { + self.variant(Negsel::Pc9) } #[doc = "Port C, Pin10"] #[inline(always)] - pub fn pc10(self) -> &'a mut W { - self.variant(NEGSEL_A::PC10) + pub fn pc10(self) -> &'a mut crate::W { + self.variant(Negsel::Pc10) } #[doc = "Port C, Pin11"] #[inline(always)] - pub fn pc11(self) -> &'a mut W { - self.variant(NEGSEL_A::PC11) + pub fn pc11(self) -> &'a mut crate::W { + self.variant(Negsel::Pc11) } #[doc = "Port C, Pin12"] #[inline(always)] - pub fn pc12(self) -> &'a mut W { - self.variant(NEGSEL_A::PC12) + pub fn pc12(self) -> &'a mut crate::W { + self.variant(Negsel::Pc12) } #[doc = "Port C, Pin13"] #[inline(always)] - pub fn pc13(self) -> &'a mut W { - self.variant(NEGSEL_A::PC13) + pub fn pc13(self) -> &'a mut crate::W { + self.variant(Negsel::Pc13) } #[doc = "Port C, Pin14"] #[inline(always)] - pub fn pc14(self) -> &'a mut W { - self.variant(NEGSEL_A::PC14) + pub fn pc14(self) -> &'a mut crate::W { + self.variant(Negsel::Pc14) } #[doc = "Port C, Pin15"] #[inline(always)] - pub fn pc15(self) -> &'a mut W { - self.variant(NEGSEL_A::PC15) + pub fn pc15(self) -> &'a mut crate::W { + self.variant(Negsel::Pc15) } #[doc = "Port D, Pin0"] #[inline(always)] - pub fn pd0(self) -> &'a mut W { - self.variant(NEGSEL_A::PD0) + pub fn pd0(self) -> &'a mut crate::W { + self.variant(Negsel::Pd0) } #[doc = "Port D, Pin1"] #[inline(always)] - pub fn pd1(self) -> &'a mut W { - self.variant(NEGSEL_A::PD1) + pub fn pd1(self) -> &'a mut crate::W { + self.variant(Negsel::Pd1) } #[doc = "Port D, Pin2"] #[inline(always)] - pub fn pd2(self) -> &'a mut W { - self.variant(NEGSEL_A::PD2) + pub fn pd2(self) -> &'a mut crate::W { + self.variant(Negsel::Pd2) } #[doc = "Port D, Pin3"] #[inline(always)] - pub fn pd3(self) -> &'a mut W { - self.variant(NEGSEL_A::PD3) + pub fn pd3(self) -> &'a mut crate::W { + self.variant(Negsel::Pd3) } #[doc = "Port D, Pin4"] #[inline(always)] - pub fn pd4(self) -> &'a mut W { - self.variant(NEGSEL_A::PD4) + pub fn pd4(self) -> &'a mut crate::W { + self.variant(Negsel::Pd4) } #[doc = "Port D, Pin5"] #[inline(always)] - pub fn pd5(self) -> &'a mut W { - self.variant(NEGSEL_A::PD5) + pub fn pd5(self) -> &'a mut crate::W { + self.variant(Negsel::Pd5) } #[doc = "Port D, Pin6"] #[inline(always)] - pub fn pd6(self) -> &'a mut W { - self.variant(NEGSEL_A::PD6) + pub fn pd6(self) -> &'a mut crate::W { + self.variant(Negsel::Pd6) } #[doc = "Port D, Pin7"] #[inline(always)] - pub fn pd7(self) -> &'a mut W { - self.variant(NEGSEL_A::PD7) + pub fn pd7(self) -> &'a mut crate::W { + self.variant(Negsel::Pd7) } #[doc = "Port D, Pin8"] #[inline(always)] - pub fn pd8(self) -> &'a mut W { - self.variant(NEGSEL_A::PD8) + pub fn pd8(self) -> &'a mut crate::W { + self.variant(Negsel::Pd8) } #[doc = "Port D, Pin9"] #[inline(always)] - pub fn pd9(self) -> &'a mut W { - self.variant(NEGSEL_A::PD9) + pub fn pd9(self) -> &'a mut crate::W { + self.variant(Negsel::Pd9) } #[doc = "Port D, Pin10"] #[inline(always)] - pub fn pd10(self) -> &'a mut W { - self.variant(NEGSEL_A::PD10) + pub fn pd10(self) -> &'a mut crate::W { + self.variant(Negsel::Pd10) } #[doc = "Port D, Pin11"] #[inline(always)] - pub fn pd11(self) -> &'a mut W { - self.variant(NEGSEL_A::PD11) + pub fn pd11(self) -> &'a mut crate::W { + self.variant(Negsel::Pd11) } #[doc = "Port D, Pin12"] #[inline(always)] - pub fn pd12(self) -> &'a mut W { - self.variant(NEGSEL_A::PD12) + pub fn pd12(self) -> &'a mut crate::W { + self.variant(Negsel::Pd12) } #[doc = "Port D, Pin13"] #[inline(always)] - pub fn pd13(self) -> &'a mut W { - self.variant(NEGSEL_A::PD13) + pub fn pd13(self) -> &'a mut crate::W { + self.variant(Negsel::Pd13) } #[doc = "Port D, Pin14"] #[inline(always)] - pub fn pd14(self) -> &'a mut W { - self.variant(NEGSEL_A::PD14) + pub fn pd14(self) -> &'a mut crate::W { + self.variant(Negsel::Pd14) } #[doc = "Port D, Pin15"] #[inline(always)] - pub fn pd15(self) -> &'a mut W { - self.variant(NEGSEL_A::PD15) + pub fn pd15(self) -> &'a mut crate::W { + self.variant(Negsel::Pd15) } } #[doc = "Field `VREFDIV` reader - VREF division"] -pub type VREFDIV_R = crate::FieldReader; +pub type VrefdivR = crate::FieldReader; #[doc = "Field `VREFDIV` writer - VREF division"] -pub type VREFDIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, INPUTCTRL_SPEC, u8, u8, 6, O>; -#[doc = "Field `CSRESSEL` reader - Capacitive Sense Mode Internal Resistor"] -pub type CSRESSEL_R = crate::FieldReader; +pub type VrefdivW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Capacitive Sense Mode Internal Resistor\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CSRESSEL_A { +pub enum Csressel { #[doc = "0: Internal capacitive sense resistor value 0"] - RES0 = 0, + Res0 = 0, #[doc = "1: Internal capacitive sense resistor value 1"] - RES1 = 1, + Res1 = 1, #[doc = "2: Internal capacitive sense resistor value 2"] - RES2 = 2, + Res2 = 2, #[doc = "3: Internal capacitive sense resistor value 3"] - RES3 = 3, + Res3 = 3, #[doc = "4: Internal capacitive sense resistor value 4"] - RES4 = 4, + Res4 = 4, #[doc = "5: Internal capacitive sense resistor value 5"] - RES5 = 5, + Res5 = 5, #[doc = "6: Internal capacitive sense resistor value 6"] - RES6 = 6, + Res6 = 6, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CSRESSEL_A) -> Self { + fn from(variant: Csressel) -> Self { variant as _ } } -impl CSRESSEL_R { +impl crate::FieldSpec for Csressel { + type Ux = u8; +} +impl crate::IsEnum for Csressel {} +#[doc = "Field `CSRESSEL` reader - Capacitive Sense Mode Internal Resistor"] +pub type CsresselR = crate::FieldReader; +impl CsresselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CSRESSEL_A::RES0), - 1 => Some(CSRESSEL_A::RES1), - 2 => Some(CSRESSEL_A::RES2), - 3 => Some(CSRESSEL_A::RES3), - 4 => Some(CSRESSEL_A::RES4), - 5 => Some(CSRESSEL_A::RES5), - 6 => Some(CSRESSEL_A::RES6), + 0 => Some(Csressel::Res0), + 1 => Some(Csressel::Res1), + 2 => Some(Csressel::Res2), + 3 => Some(Csressel::Res3), + 4 => Some(Csressel::Res4), + 5 => Some(Csressel::Res5), + 6 => Some(Csressel::Res6), _ => None, } } - #[doc = "Checks if the value of the field is `RES0`"] + #[doc = "Internal capacitive sense resistor value 0"] #[inline(always)] pub fn is_res0(&self) -> bool { - *self == CSRESSEL_A::RES0 + *self == Csressel::Res0 } - #[doc = "Checks if the value of the field is `RES1`"] + #[doc = "Internal capacitive sense resistor value 1"] #[inline(always)] pub fn is_res1(&self) -> bool { - *self == CSRESSEL_A::RES1 + *self == Csressel::Res1 } - #[doc = "Checks if the value of the field is `RES2`"] + #[doc = "Internal capacitive sense resistor value 2"] #[inline(always)] pub fn is_res2(&self) -> bool { - *self == CSRESSEL_A::RES2 + *self == Csressel::Res2 } - #[doc = "Checks if the value of the field is `RES3`"] + #[doc = "Internal capacitive sense resistor value 3"] #[inline(always)] pub fn is_res3(&self) -> bool { - *self == CSRESSEL_A::RES3 + *self == Csressel::Res3 } - #[doc = "Checks if the value of the field is `RES4`"] + #[doc = "Internal capacitive sense resistor value 4"] #[inline(always)] pub fn is_res4(&self) -> bool { - *self == CSRESSEL_A::RES4 + *self == Csressel::Res4 } - #[doc = "Checks if the value of the field is `RES5`"] + #[doc = "Internal capacitive sense resistor value 5"] #[inline(always)] pub fn is_res5(&self) -> bool { - *self == CSRESSEL_A::RES5 + *self == Csressel::Res5 } - #[doc = "Checks if the value of the field is `RES6`"] + #[doc = "Internal capacitive sense resistor value 6"] #[inline(always)] pub fn is_res6(&self) -> bool { - *self == CSRESSEL_A::RES6 + *self == Csressel::Res6 } } #[doc = "Field `CSRESSEL` writer - Capacitive Sense Mode Internal Resistor"] -pub type CSRESSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, INPUTCTRL_SPEC, u8, CSRESSEL_A, 3, O>; -impl<'a, const O: u8> CSRESSEL_W<'a, O> { +pub type CsresselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Csressel>; +impl<'a, REG> CsresselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Internal capacitive sense resistor value 0"] #[inline(always)] - pub fn res0(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES0) + pub fn res0(self) -> &'a mut crate::W { + self.variant(Csressel::Res0) } #[doc = "Internal capacitive sense resistor value 1"] #[inline(always)] - pub fn res1(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES1) + pub fn res1(self) -> &'a mut crate::W { + self.variant(Csressel::Res1) } #[doc = "Internal capacitive sense resistor value 2"] #[inline(always)] - pub fn res2(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES2) + pub fn res2(self) -> &'a mut crate::W { + self.variant(Csressel::Res2) } #[doc = "Internal capacitive sense resistor value 3"] #[inline(always)] - pub fn res3(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES3) + pub fn res3(self) -> &'a mut crate::W { + self.variant(Csressel::Res3) } #[doc = "Internal capacitive sense resistor value 4"] #[inline(always)] - pub fn res4(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES4) + pub fn res4(self) -> &'a mut crate::W { + self.variant(Csressel::Res4) } #[doc = "Internal capacitive sense resistor value 5"] #[inline(always)] - pub fn res5(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES5) + pub fn res5(self) -> &'a mut crate::W { + self.variant(Csressel::Res5) } #[doc = "Internal capacitive sense resistor value 6"] #[inline(always)] - pub fn res6(self) -> &'a mut W { - self.variant(CSRESSEL_A::RES6) + pub fn res6(self) -> &'a mut crate::W { + self.variant(Csressel::Res6) } } impl R { #[doc = "Bits 0:7 - Positive Input Select"] #[inline(always)] - pub fn possel(&self) -> POSSEL_R { - POSSEL_R::new((self.bits & 0xff) as u8) + pub fn possel(&self) -> PosselR { + PosselR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Negative Input Select"] #[inline(always)] - pub fn negsel(&self) -> NEGSEL_R { - NEGSEL_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn negsel(&self) -> NegselR { + NegselR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:21 - VREF division"] #[inline(always)] - pub fn vrefdiv(&self) -> VREFDIV_R { - VREFDIV_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn vrefdiv(&self) -> VrefdivR { + VrefdivR::new(((self.bits >> 16) & 0x3f) as u8) } #[doc = "Bits 28:30 - Capacitive Sense Mode Internal Resistor"] #[inline(always)] - pub fn csressel(&self) -> CSRESSEL_R { - CSRESSEL_R::new(((self.bits >> 28) & 7) as u8) + pub fn csressel(&self) -> CsresselR { + CsresselR::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:7 - Positive Input Select"] #[inline(always)] #[must_use] - pub fn possel(&mut self) -> POSSEL_W<0> { - POSSEL_W::new(self) + pub fn possel(&mut self) -> PosselW { + PosselW::new(self, 0) } #[doc = "Bits 8:15 - Negative Input Select"] #[inline(always)] #[must_use] - pub fn negsel(&mut self) -> NEGSEL_W<8> { - NEGSEL_W::new(self) + pub fn negsel(&mut self) -> NegselW { + NegselW::new(self, 8) } #[doc = "Bits 16:21 - VREF division"] #[inline(always)] #[must_use] - pub fn vrefdiv(&mut self) -> VREFDIV_W<16> { - VREFDIV_W::new(self) + pub fn vrefdiv(&mut self) -> VrefdivW { + VrefdivW::new(self, 16) } #[doc = "Bits 28:30 - Capacitive Sense Mode Internal Resistor"] #[inline(always)] #[must_use] - pub fn csressel(&mut self) -> CSRESSEL_W<28> { - CSRESSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn csressel(&mut self) -> CsresselW { + CsresselW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [inputctrl](index.html) module"] -pub struct INPUTCTRL_SPEC; -impl crate::RegisterSpec for INPUTCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`inputctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inputctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct InputctrlSpec; +impl crate::RegisterSpec for InputctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [inputctrl::R](R) reader structure"] -impl crate::Readable for INPUTCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [inputctrl::W](W) writer structure"] -impl crate::Writable for INPUTCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`inputctrl::R`](R) reader structure"] +impl crate::Readable for InputctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`inputctrl::W`](W) writer structure"] +impl crate::Writable for InputctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets INPUTCTRL to value 0"] -impl crate::Resettable for INPUTCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for InputctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/ipversion.rs index 85cb381..0068345 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/status.rs index 742088c..7088050 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/status.rs @@ -1,58 +1,43 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ACMPOUT` reader - Analog Comparator Output"] -pub type ACMPOUT_R = crate::BitReader; +pub type AcmpoutR = crate::BitReader; #[doc = "Field `ACMPRDY` reader - Analog Comparator Ready"] -pub type ACMPRDY_R = crate::BitReader; +pub type AcmprdyR = crate::BitReader; #[doc = "Field `INPUTCONFLICT` reader - INPUT conflict"] -pub type INPUTCONFLICT_R = crate::BitReader; +pub type InputconflictR = crate::BitReader; #[doc = "Field `PORTALLOCERR` reader - Port allocation error"] -pub type PORTALLOCERR_R = crate::BitReader; +pub type PortallocerrR = crate::BitReader; impl R { #[doc = "Bit 0 - Analog Comparator Output"] #[inline(always)] - pub fn acmpout(&self) -> ACMPOUT_R { - ACMPOUT_R::new((self.bits & 1) != 0) + pub fn acmpout(&self) -> AcmpoutR { + AcmpoutR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - Analog Comparator Ready"] #[inline(always)] - pub fn acmprdy(&self) -> ACMPRDY_R { - ACMPRDY_R::new(((self.bits >> 2) & 1) != 0) + pub fn acmprdy(&self) -> AcmprdyR { + AcmprdyR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - INPUT conflict"] #[inline(always)] - pub fn inputconflict(&self) -> INPUTCONFLICT_R { - INPUTCONFLICT_R::new(((self.bits >> 3) & 1) != 0) + pub fn inputconflict(&self) -> InputconflictR { + InputconflictR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port allocation error"] #[inline(always)] - pub fn portallocerr(&self) -> PORTALLOCERR_R { - PORTALLOCERR_R::new(((self.bits >> 4) & 1) != 0) + pub fn portallocerr(&self) -> PortallocerrR { + PortallocerrR::new(((self.bits >> 4) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/swrst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/swrst.rs index a74aa75..3b73e52 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/swrst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/swrst.rs @@ -1,80 +1,40 @@ #[doc = "Register `SWRST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SWRST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SWRST` writer - Software reset"] -pub type SWRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, SWRST_SPEC, bool, O>; +pub type SwrstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESETTING` reader - Software reset busy status"] -pub type RESETTING_R = crate::BitReader; +pub type ResettingR = crate::BitReader; impl R { #[doc = "Bit 1 - Software reset busy status"] #[inline(always)] - pub fn resetting(&self) -> RESETTING_R { - RESETTING_R::new(((self.bits >> 1) & 1) != 0) + pub fn resetting(&self) -> ResettingR { + ResettingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Software reset"] #[inline(always)] #[must_use] - pub fn swrst(&mut self) -> SWRST_W<0> { - SWRST_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn swrst(&mut self) -> SwrstW { + SwrstW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swrst](index.html) module"] -pub struct SWRST_SPEC; -impl crate::RegisterSpec for SWRST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SwrstSpec; +impl crate::RegisterSpec for SwrstSpec { type Ux = u32; } -#[doc = "`read()` method returns [swrst::R](R) reader structure"] -impl crate::Readable for SWRST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [swrst::W](W) writer structure"] -impl crate::Writable for SWRST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`swrst::R`](R) reader structure"] +impl crate::Readable for SwrstSpec {} +#[doc = "`write(|w| ..)` method takes [`swrst::W`](W) writer structure"] +impl crate::Writable for SwrstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWRST to value 0"] -impl crate::Resettable for SWRST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SwrstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/syncbusy.rs index 5a6bf41..9ff78b9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/acmp1_s/syncbusy.rs @@ -1,37 +1,22 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `INPUTCTRL` reader - Syncbusy for INPUTCTRL"] -pub type INPUTCTRL_R = crate::BitReader; +pub type InputctrlR = crate::BitReader; impl R { #[doc = "Bit 0 - Syncbusy for INPUTCTRL"] #[inline(always)] - pub fn inputctrl(&self) -> INPUTCTRL_R { - INPUTCTRL_R::new((self.bits & 1) != 0) + pub fn inputctrl(&self) -> InputctrlR { + InputctrlR::new((self.bits & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns.rs index d17e0bd..8ae0005 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns.rs @@ -1,196 +1,390 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ret0_reg: Ret0Reg, + ret1_reg: Ret1Reg, + ret2_reg: Ret2Reg, + ret3_reg: Ret3Reg, + ret4_reg: Ret4Reg, + ret5_reg: Ret5Reg, + ret6_reg: Ret6Reg, + ret7_reg: Ret7Reg, + ret8_reg: Ret8Reg, + ret9_reg: Ret9Reg, + ret10_reg: Ret10Reg, + ret11_reg: Ret11Reg, + ret12_reg: Ret12Reg, + ret13_reg: Ret13Reg, + ret14_reg: Ret14Reg, + ret15_reg: Ret15Reg, + ret16_reg: Ret16Reg, + ret17_reg: Ret17Reg, + ret18_reg: Ret18Reg, + ret19_reg: Ret19Reg, + ret20_reg: Ret20Reg, + ret21_reg: Ret21Reg, + ret22_reg: Ret22Reg, + ret23_reg: Ret23Reg, + ret24_reg: Ret24Reg, + ret25_reg: Ret25Reg, + ret26_reg: Ret26Reg, + ret27_reg: Ret27Reg, + ret28_reg: Ret28Reg, + ret29_reg: Ret29Reg, + ret30_reg: Ret30Reg, + ret31_reg: Ret31Reg, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ret0_reg: RET0_REG, + #[inline(always)] + pub const fn ret0_reg(&self) -> &Ret0Reg { + &self.ret0_reg + } #[doc = "0x04 - No Description"] - pub ret1_reg: RET1_REG, + #[inline(always)] + pub const fn ret1_reg(&self) -> &Ret1Reg { + &self.ret1_reg + } #[doc = "0x08 - No Description"] - pub ret2_reg: RET2_REG, + #[inline(always)] + pub const fn ret2_reg(&self) -> &Ret2Reg { + &self.ret2_reg + } #[doc = "0x0c - No Description"] - pub ret3_reg: RET3_REG, + #[inline(always)] + pub const fn ret3_reg(&self) -> &Ret3Reg { + &self.ret3_reg + } #[doc = "0x10 - No Description"] - pub ret4_reg: RET4_REG, + #[inline(always)] + pub const fn ret4_reg(&self) -> &Ret4Reg { + &self.ret4_reg + } #[doc = "0x14 - No Description"] - pub ret5_reg: RET5_REG, + #[inline(always)] + pub const fn ret5_reg(&self) -> &Ret5Reg { + &self.ret5_reg + } #[doc = "0x18 - No Description"] - pub ret6_reg: RET6_REG, + #[inline(always)] + pub const fn ret6_reg(&self) -> &Ret6Reg { + &self.ret6_reg + } #[doc = "0x1c - No Description"] - pub ret7_reg: RET7_REG, + #[inline(always)] + pub const fn ret7_reg(&self) -> &Ret7Reg { + &self.ret7_reg + } #[doc = "0x20 - No Description"] - pub ret8_reg: RET8_REG, + #[inline(always)] + pub const fn ret8_reg(&self) -> &Ret8Reg { + &self.ret8_reg + } #[doc = "0x24 - No Description"] - pub ret9_reg: RET9_REG, + #[inline(always)] + pub const fn ret9_reg(&self) -> &Ret9Reg { + &self.ret9_reg + } #[doc = "0x28 - No Description"] - pub ret10_reg: RET10_REG, + #[inline(always)] + pub const fn ret10_reg(&self) -> &Ret10Reg { + &self.ret10_reg + } #[doc = "0x2c - No Description"] - pub ret11_reg: RET11_REG, + #[inline(always)] + pub const fn ret11_reg(&self) -> &Ret11Reg { + &self.ret11_reg + } #[doc = "0x30 - No Description"] - pub ret12_reg: RET12_REG, + #[inline(always)] + pub const fn ret12_reg(&self) -> &Ret12Reg { + &self.ret12_reg + } #[doc = "0x34 - No Description"] - pub ret13_reg: RET13_REG, + #[inline(always)] + pub const fn ret13_reg(&self) -> &Ret13Reg { + &self.ret13_reg + } #[doc = "0x38 - No Description"] - pub ret14_reg: RET14_REG, + #[inline(always)] + pub const fn ret14_reg(&self) -> &Ret14Reg { + &self.ret14_reg + } #[doc = "0x3c - No Description"] - pub ret15_reg: RET15_REG, + #[inline(always)] + pub const fn ret15_reg(&self) -> &Ret15Reg { + &self.ret15_reg + } #[doc = "0x40 - No Description"] - pub ret16_reg: RET16_REG, + #[inline(always)] + pub const fn ret16_reg(&self) -> &Ret16Reg { + &self.ret16_reg + } #[doc = "0x44 - No Description"] - pub ret17_reg: RET17_REG, + #[inline(always)] + pub const fn ret17_reg(&self) -> &Ret17Reg { + &self.ret17_reg + } #[doc = "0x48 - No Description"] - pub ret18_reg: RET18_REG, + #[inline(always)] + pub const fn ret18_reg(&self) -> &Ret18Reg { + &self.ret18_reg + } #[doc = "0x4c - No Description"] - pub ret19_reg: RET19_REG, + #[inline(always)] + pub const fn ret19_reg(&self) -> &Ret19Reg { + &self.ret19_reg + } #[doc = "0x50 - No Description"] - pub ret20_reg: RET20_REG, + #[inline(always)] + pub const fn ret20_reg(&self) -> &Ret20Reg { + &self.ret20_reg + } #[doc = "0x54 - No Description"] - pub ret21_reg: RET21_REG, + #[inline(always)] + pub const fn ret21_reg(&self) -> &Ret21Reg { + &self.ret21_reg + } #[doc = "0x58 - No Description"] - pub ret22_reg: RET22_REG, + #[inline(always)] + pub const fn ret22_reg(&self) -> &Ret22Reg { + &self.ret22_reg + } #[doc = "0x5c - No Description"] - pub ret23_reg: RET23_REG, + #[inline(always)] + pub const fn ret23_reg(&self) -> &Ret23Reg { + &self.ret23_reg + } #[doc = "0x60 - No Description"] - pub ret24_reg: RET24_REG, + #[inline(always)] + pub const fn ret24_reg(&self) -> &Ret24Reg { + &self.ret24_reg + } #[doc = "0x64 - No Description"] - pub ret25_reg: RET25_REG, + #[inline(always)] + pub const fn ret25_reg(&self) -> &Ret25Reg { + &self.ret25_reg + } #[doc = "0x68 - No Description"] - pub ret26_reg: RET26_REG, + #[inline(always)] + pub const fn ret26_reg(&self) -> &Ret26Reg { + &self.ret26_reg + } #[doc = "0x6c - No Description"] - pub ret27_reg: RET27_REG, + #[inline(always)] + pub const fn ret27_reg(&self) -> &Ret27Reg { + &self.ret27_reg + } #[doc = "0x70 - No Description"] - pub ret28_reg: RET28_REG, + #[inline(always)] + pub const fn ret28_reg(&self) -> &Ret28Reg { + &self.ret28_reg + } #[doc = "0x74 - No Description"] - pub ret29_reg: RET29_REG, + #[inline(always)] + pub const fn ret29_reg(&self) -> &Ret29Reg { + &self.ret29_reg + } #[doc = "0x78 - No Description"] - pub ret30_reg: RET30_REG, + #[inline(always)] + pub const fn ret30_reg(&self) -> &Ret30Reg { + &self.ret30_reg + } #[doc = "0x7c - No Description"] - pub ret31_reg: RET31_REG, + #[inline(always)] + pub const fn ret31_reg(&self) -> &Ret31Reg { + &self.ret31_reg + } } -#[doc = "RET0_REG (rw) register accessor: an alias for `Reg`"] -pub type RET0_REG = crate::Reg; +#[doc = "RET0_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret0_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret0_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret0_reg`] +module"] +#[doc(alias = "RET0_REG")] +pub type Ret0Reg = crate::Reg; #[doc = "No Description"] pub mod ret0_reg; -#[doc = "RET1_REG (rw) register accessor: an alias for `Reg`"] -pub type RET1_REG = crate::Reg; +#[doc = "RET1_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret1_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret1_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret1_reg`] +module"] +#[doc(alias = "RET1_REG")] +pub type Ret1Reg = crate::Reg; #[doc = "No Description"] pub mod ret1_reg; -#[doc = "RET2_REG (rw) register accessor: an alias for `Reg`"] -pub type RET2_REG = crate::Reg; +#[doc = "RET2_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret2_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret2_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret2_reg`] +module"] +#[doc(alias = "RET2_REG")] +pub type Ret2Reg = crate::Reg; #[doc = "No Description"] pub mod ret2_reg; -#[doc = "RET3_REG (rw) register accessor: an alias for `Reg`"] -pub type RET3_REG = crate::Reg; +#[doc = "RET3_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret3_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret3_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret3_reg`] +module"] +#[doc(alias = "RET3_REG")] +pub type Ret3Reg = crate::Reg; #[doc = "No Description"] pub mod ret3_reg; -#[doc = "RET4_REG (rw) register accessor: an alias for `Reg`"] -pub type RET4_REG = crate::Reg; +#[doc = "RET4_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret4_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret4_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret4_reg`] +module"] +#[doc(alias = "RET4_REG")] +pub type Ret4Reg = crate::Reg; #[doc = "No Description"] pub mod ret4_reg; -#[doc = "RET5_REG (rw) register accessor: an alias for `Reg`"] -pub type RET5_REG = crate::Reg; +#[doc = "RET5_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret5_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret5_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret5_reg`] +module"] +#[doc(alias = "RET5_REG")] +pub type Ret5Reg = crate::Reg; #[doc = "No Description"] pub mod ret5_reg; -#[doc = "RET6_REG (rw) register accessor: an alias for `Reg`"] -pub type RET6_REG = crate::Reg; +#[doc = "RET6_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret6_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret6_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret6_reg`] +module"] +#[doc(alias = "RET6_REG")] +pub type Ret6Reg = crate::Reg; #[doc = "No Description"] pub mod ret6_reg; -#[doc = "RET7_REG (rw) register accessor: an alias for `Reg`"] -pub type RET7_REG = crate::Reg; +#[doc = "RET7_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret7_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret7_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret7_reg`] +module"] +#[doc(alias = "RET7_REG")] +pub type Ret7Reg = crate::Reg; #[doc = "No Description"] pub mod ret7_reg; -#[doc = "RET8_REG (rw) register accessor: an alias for `Reg`"] -pub type RET8_REG = crate::Reg; +#[doc = "RET8_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret8_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret8_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret8_reg`] +module"] +#[doc(alias = "RET8_REG")] +pub type Ret8Reg = crate::Reg; #[doc = "No Description"] pub mod ret8_reg; -#[doc = "RET9_REG (rw) register accessor: an alias for `Reg`"] -pub type RET9_REG = crate::Reg; +#[doc = "RET9_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret9_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret9_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret9_reg`] +module"] +#[doc(alias = "RET9_REG")] +pub type Ret9Reg = crate::Reg; #[doc = "No Description"] pub mod ret9_reg; -#[doc = "RET10_REG (rw) register accessor: an alias for `Reg`"] -pub type RET10_REG = crate::Reg; +#[doc = "RET10_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret10_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret10_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret10_reg`] +module"] +#[doc(alias = "RET10_REG")] +pub type Ret10Reg = crate::Reg; #[doc = "No Description"] pub mod ret10_reg; -#[doc = "RET11_REG (rw) register accessor: an alias for `Reg`"] -pub type RET11_REG = crate::Reg; +#[doc = "RET11_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret11_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret11_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret11_reg`] +module"] +#[doc(alias = "RET11_REG")] +pub type Ret11Reg = crate::Reg; #[doc = "No Description"] pub mod ret11_reg; -#[doc = "RET12_REG (rw) register accessor: an alias for `Reg`"] -pub type RET12_REG = crate::Reg; +#[doc = "RET12_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret12_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret12_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret12_reg`] +module"] +#[doc(alias = "RET12_REG")] +pub type Ret12Reg = crate::Reg; #[doc = "No Description"] pub mod ret12_reg; -#[doc = "RET13_REG (rw) register accessor: an alias for `Reg`"] -pub type RET13_REG = crate::Reg; +#[doc = "RET13_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret13_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret13_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret13_reg`] +module"] +#[doc(alias = "RET13_REG")] +pub type Ret13Reg = crate::Reg; #[doc = "No Description"] pub mod ret13_reg; -#[doc = "RET14_REG (rw) register accessor: an alias for `Reg`"] -pub type RET14_REG = crate::Reg; +#[doc = "RET14_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret14_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret14_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret14_reg`] +module"] +#[doc(alias = "RET14_REG")] +pub type Ret14Reg = crate::Reg; #[doc = "No Description"] pub mod ret14_reg; -#[doc = "RET15_REG (rw) register accessor: an alias for `Reg`"] -pub type RET15_REG = crate::Reg; +#[doc = "RET15_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret15_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret15_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret15_reg`] +module"] +#[doc(alias = "RET15_REG")] +pub type Ret15Reg = crate::Reg; #[doc = "No Description"] pub mod ret15_reg; -#[doc = "RET16_REG (rw) register accessor: an alias for `Reg`"] -pub type RET16_REG = crate::Reg; +#[doc = "RET16_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret16_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret16_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret16_reg`] +module"] +#[doc(alias = "RET16_REG")] +pub type Ret16Reg = crate::Reg; #[doc = "No Description"] pub mod ret16_reg; -#[doc = "RET17_REG (rw) register accessor: an alias for `Reg`"] -pub type RET17_REG = crate::Reg; +#[doc = "RET17_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret17_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret17_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret17_reg`] +module"] +#[doc(alias = "RET17_REG")] +pub type Ret17Reg = crate::Reg; #[doc = "No Description"] pub mod ret17_reg; -#[doc = "RET18_REG (rw) register accessor: an alias for `Reg`"] -pub type RET18_REG = crate::Reg; +#[doc = "RET18_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret18_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret18_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret18_reg`] +module"] +#[doc(alias = "RET18_REG")] +pub type Ret18Reg = crate::Reg; #[doc = "No Description"] pub mod ret18_reg; -#[doc = "RET19_REG (rw) register accessor: an alias for `Reg`"] -pub type RET19_REG = crate::Reg; +#[doc = "RET19_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret19_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret19_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret19_reg`] +module"] +#[doc(alias = "RET19_REG")] +pub type Ret19Reg = crate::Reg; #[doc = "No Description"] pub mod ret19_reg; -#[doc = "RET20_REG (rw) register accessor: an alias for `Reg`"] -pub type RET20_REG = crate::Reg; +#[doc = "RET20_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret20_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret20_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret20_reg`] +module"] +#[doc(alias = "RET20_REG")] +pub type Ret20Reg = crate::Reg; #[doc = "No Description"] pub mod ret20_reg; -#[doc = "RET21_REG (rw) register accessor: an alias for `Reg`"] -pub type RET21_REG = crate::Reg; +#[doc = "RET21_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret21_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret21_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret21_reg`] +module"] +#[doc(alias = "RET21_REG")] +pub type Ret21Reg = crate::Reg; #[doc = "No Description"] pub mod ret21_reg; -#[doc = "RET22_REG (rw) register accessor: an alias for `Reg`"] -pub type RET22_REG = crate::Reg; +#[doc = "RET22_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret22_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret22_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret22_reg`] +module"] +#[doc(alias = "RET22_REG")] +pub type Ret22Reg = crate::Reg; #[doc = "No Description"] pub mod ret22_reg; -#[doc = "RET23_REG (rw) register accessor: an alias for `Reg`"] -pub type RET23_REG = crate::Reg; +#[doc = "RET23_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret23_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret23_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret23_reg`] +module"] +#[doc(alias = "RET23_REG")] +pub type Ret23Reg = crate::Reg; #[doc = "No Description"] pub mod ret23_reg; -#[doc = "RET24_REG (rw) register accessor: an alias for `Reg`"] -pub type RET24_REG = crate::Reg; +#[doc = "RET24_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret24_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret24_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret24_reg`] +module"] +#[doc(alias = "RET24_REG")] +pub type Ret24Reg = crate::Reg; #[doc = "No Description"] pub mod ret24_reg; -#[doc = "RET25_REG (rw) register accessor: an alias for `Reg`"] -pub type RET25_REG = crate::Reg; +#[doc = "RET25_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret25_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret25_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret25_reg`] +module"] +#[doc(alias = "RET25_REG")] +pub type Ret25Reg = crate::Reg; #[doc = "No Description"] pub mod ret25_reg; -#[doc = "RET26_REG (rw) register accessor: an alias for `Reg`"] -pub type RET26_REG = crate::Reg; +#[doc = "RET26_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret26_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret26_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret26_reg`] +module"] +#[doc(alias = "RET26_REG")] +pub type Ret26Reg = crate::Reg; #[doc = "No Description"] pub mod ret26_reg; -#[doc = "RET27_REG (rw) register accessor: an alias for `Reg`"] -pub type RET27_REG = crate::Reg; +#[doc = "RET27_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret27_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret27_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret27_reg`] +module"] +#[doc(alias = "RET27_REG")] +pub type Ret27Reg = crate::Reg; #[doc = "No Description"] pub mod ret27_reg; -#[doc = "RET28_REG (rw) register accessor: an alias for `Reg`"] -pub type RET28_REG = crate::Reg; +#[doc = "RET28_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret28_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret28_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret28_reg`] +module"] +#[doc(alias = "RET28_REG")] +pub type Ret28Reg = crate::Reg; #[doc = "No Description"] pub mod ret28_reg; -#[doc = "RET29_REG (rw) register accessor: an alias for `Reg`"] -pub type RET29_REG = crate::Reg; +#[doc = "RET29_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret29_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret29_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret29_reg`] +module"] +#[doc(alias = "RET29_REG")] +pub type Ret29Reg = crate::Reg; #[doc = "No Description"] pub mod ret29_reg; -#[doc = "RET30_REG (rw) register accessor: an alias for `Reg`"] -pub type RET30_REG = crate::Reg; +#[doc = "RET30_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret30_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret30_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret30_reg`] +module"] +#[doc(alias = "RET30_REG")] +pub type Ret30Reg = crate::Reg; #[doc = "No Description"] pub mod ret30_reg; -#[doc = "RET31_REG (rw) register accessor: an alias for `Reg`"] -pub type RET31_REG = crate::Reg; +#[doc = "RET31_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret31_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret31_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret31_reg`] +module"] +#[doc(alias = "RET31_REG")] +pub type Ret31Reg = crate::Reg; #[doc = "No Description"] pub mod ret31_reg; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret0_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret0_reg.rs index df06c08..76087a4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret0_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret0_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET0_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET0_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET0_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret0_reg](index.html) module"] -pub struct RET0_REG_SPEC; -impl crate::RegisterSpec for RET0_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret0_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret0_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret0RegSpec; +impl crate::RegisterSpec for Ret0RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret0_reg::R](R) reader structure"] -impl crate::Readable for RET0_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret0_reg::W](W) writer structure"] -impl crate::Writable for RET0_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret0_reg::R`](R) reader structure"] +impl crate::Readable for Ret0RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret0_reg::W`](W) writer structure"] +impl crate::Writable for Ret0RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET0_REG to value 0"] -impl crate::Resettable for RET0_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret0RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret10_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret10_reg.rs index 756ddef..9f58a98 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret10_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret10_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET10_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET10_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET10_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret10_reg](index.html) module"] -pub struct RET10_REG_SPEC; -impl crate::RegisterSpec for RET10_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret10_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret10_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret10RegSpec; +impl crate::RegisterSpec for Ret10RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret10_reg::R](R) reader structure"] -impl crate::Readable for RET10_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret10_reg::W](W) writer structure"] -impl crate::Writable for RET10_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret10_reg::R`](R) reader structure"] +impl crate::Readable for Ret10RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret10_reg::W`](W) writer structure"] +impl crate::Writable for Ret10RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET10_REG to value 0"] -impl crate::Resettable for RET10_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret10RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret11_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret11_reg.rs index b9ac6b8..ca56b86 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret11_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret11_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET11_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET11_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET11_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret11_reg](index.html) module"] -pub struct RET11_REG_SPEC; -impl crate::RegisterSpec for RET11_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret11_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret11_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret11RegSpec; +impl crate::RegisterSpec for Ret11RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret11_reg::R](R) reader structure"] -impl crate::Readable for RET11_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret11_reg::W](W) writer structure"] -impl crate::Writable for RET11_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret11_reg::R`](R) reader structure"] +impl crate::Readable for Ret11RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret11_reg::W`](W) writer structure"] +impl crate::Writable for Ret11RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET11_REG to value 0"] -impl crate::Resettable for RET11_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret11RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret12_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret12_reg.rs index cc60570..7b7f672 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret12_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret12_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET12_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET12_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET12_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret12_reg](index.html) module"] -pub struct RET12_REG_SPEC; -impl crate::RegisterSpec for RET12_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret12_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret12_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret12RegSpec; +impl crate::RegisterSpec for Ret12RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret12_reg::R](R) reader structure"] -impl crate::Readable for RET12_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret12_reg::W](W) writer structure"] -impl crate::Writable for RET12_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret12_reg::R`](R) reader structure"] +impl crate::Readable for Ret12RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret12_reg::W`](W) writer structure"] +impl crate::Writable for Ret12RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET12_REG to value 0"] -impl crate::Resettable for RET12_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret12RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret13_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret13_reg.rs index 44049c5..09a5cc5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret13_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret13_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET13_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET13_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET13_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret13_reg](index.html) module"] -pub struct RET13_REG_SPEC; -impl crate::RegisterSpec for RET13_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret13_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret13_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret13RegSpec; +impl crate::RegisterSpec for Ret13RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret13_reg::R](R) reader structure"] -impl crate::Readable for RET13_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret13_reg::W](W) writer structure"] -impl crate::Writable for RET13_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret13_reg::R`](R) reader structure"] +impl crate::Readable for Ret13RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret13_reg::W`](W) writer structure"] +impl crate::Writable for Ret13RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET13_REG to value 0"] -impl crate::Resettable for RET13_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret13RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret14_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret14_reg.rs index 1d84e33..e9d6b5b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret14_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret14_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET14_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET14_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET14_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret14_reg](index.html) module"] -pub struct RET14_REG_SPEC; -impl crate::RegisterSpec for RET14_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret14_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret14_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret14RegSpec; +impl crate::RegisterSpec for Ret14RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret14_reg::R](R) reader structure"] -impl crate::Readable for RET14_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret14_reg::W](W) writer structure"] -impl crate::Writable for RET14_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret14_reg::R`](R) reader structure"] +impl crate::Readable for Ret14RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret14_reg::W`](W) writer structure"] +impl crate::Writable for Ret14RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET14_REG to value 0"] -impl crate::Resettable for RET14_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret14RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret15_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret15_reg.rs index f0ae8ec..59d89d6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret15_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret15_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET15_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET15_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET15_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret15_reg](index.html) module"] -pub struct RET15_REG_SPEC; -impl crate::RegisterSpec for RET15_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret15_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret15_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret15RegSpec; +impl crate::RegisterSpec for Ret15RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret15_reg::R](R) reader structure"] -impl crate::Readable for RET15_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret15_reg::W](W) writer structure"] -impl crate::Writable for RET15_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret15_reg::R`](R) reader structure"] +impl crate::Readable for Ret15RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret15_reg::W`](W) writer structure"] +impl crate::Writable for Ret15RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET15_REG to value 0"] -impl crate::Resettable for RET15_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret15RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret16_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret16_reg.rs index 703af14..0b6089d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret16_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret16_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET16_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET16_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET16_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret16_reg](index.html) module"] -pub struct RET16_REG_SPEC; -impl crate::RegisterSpec for RET16_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret16_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret16_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret16RegSpec; +impl crate::RegisterSpec for Ret16RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret16_reg::R](R) reader structure"] -impl crate::Readable for RET16_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret16_reg::W](W) writer structure"] -impl crate::Writable for RET16_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret16_reg::R`](R) reader structure"] +impl crate::Readable for Ret16RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret16_reg::W`](W) writer structure"] +impl crate::Writable for Ret16RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET16_REG to value 0"] -impl crate::Resettable for RET16_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret16RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret17_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret17_reg.rs index bdd76f3..083b961 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret17_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret17_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET17_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET17_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET17_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret17_reg](index.html) module"] -pub struct RET17_REG_SPEC; -impl crate::RegisterSpec for RET17_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret17_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret17_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret17RegSpec; +impl crate::RegisterSpec for Ret17RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret17_reg::R](R) reader structure"] -impl crate::Readable for RET17_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret17_reg::W](W) writer structure"] -impl crate::Writable for RET17_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret17_reg::R`](R) reader structure"] +impl crate::Readable for Ret17RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret17_reg::W`](W) writer structure"] +impl crate::Writable for Ret17RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET17_REG to value 0"] -impl crate::Resettable for RET17_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret17RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret18_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret18_reg.rs index 66ba1c2..0415219 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret18_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret18_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET18_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET18_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET18_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret18_reg](index.html) module"] -pub struct RET18_REG_SPEC; -impl crate::RegisterSpec for RET18_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret18_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret18_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret18RegSpec; +impl crate::RegisterSpec for Ret18RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret18_reg::R](R) reader structure"] -impl crate::Readable for RET18_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret18_reg::W](W) writer structure"] -impl crate::Writable for RET18_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret18_reg::R`](R) reader structure"] +impl crate::Readable for Ret18RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret18_reg::W`](W) writer structure"] +impl crate::Writable for Ret18RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET18_REG to value 0"] -impl crate::Resettable for RET18_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret18RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret19_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret19_reg.rs index d49bfe2..db0459b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret19_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret19_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET19_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET19_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET19_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret19_reg](index.html) module"] -pub struct RET19_REG_SPEC; -impl crate::RegisterSpec for RET19_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret19_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret19_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret19RegSpec; +impl crate::RegisterSpec for Ret19RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret19_reg::R](R) reader structure"] -impl crate::Readable for RET19_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret19_reg::W](W) writer structure"] -impl crate::Writable for RET19_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret19_reg::R`](R) reader structure"] +impl crate::Readable for Ret19RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret19_reg::W`](W) writer structure"] +impl crate::Writable for Ret19RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET19_REG to value 0"] -impl crate::Resettable for RET19_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret19RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret1_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret1_reg.rs index 2307bcc..6c0889a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret1_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret1_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET1_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET1_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET1_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret1_reg](index.html) module"] -pub struct RET1_REG_SPEC; -impl crate::RegisterSpec for RET1_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret1_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret1_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret1RegSpec; +impl crate::RegisterSpec for Ret1RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret1_reg::R](R) reader structure"] -impl crate::Readable for RET1_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret1_reg::W](W) writer structure"] -impl crate::Writable for RET1_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret1_reg::R`](R) reader structure"] +impl crate::Readable for Ret1RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret1_reg::W`](W) writer structure"] +impl crate::Writable for Ret1RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET1_REG to value 0"] -impl crate::Resettable for RET1_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret1RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret20_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret20_reg.rs index 661c42e..47e0a43 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret20_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret20_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET20_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET20_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET20_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret20_reg](index.html) module"] -pub struct RET20_REG_SPEC; -impl crate::RegisterSpec for RET20_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret20_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret20_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret20RegSpec; +impl crate::RegisterSpec for Ret20RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret20_reg::R](R) reader structure"] -impl crate::Readable for RET20_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret20_reg::W](W) writer structure"] -impl crate::Writable for RET20_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret20_reg::R`](R) reader structure"] +impl crate::Readable for Ret20RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret20_reg::W`](W) writer structure"] +impl crate::Writable for Ret20RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET20_REG to value 0"] -impl crate::Resettable for RET20_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret20RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret21_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret21_reg.rs index 412caaf..9887cc0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret21_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret21_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET21_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET21_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET21_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret21_reg](index.html) module"] -pub struct RET21_REG_SPEC; -impl crate::RegisterSpec for RET21_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret21_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret21_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret21RegSpec; +impl crate::RegisterSpec for Ret21RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret21_reg::R](R) reader structure"] -impl crate::Readable for RET21_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret21_reg::W](W) writer structure"] -impl crate::Writable for RET21_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret21_reg::R`](R) reader structure"] +impl crate::Readable for Ret21RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret21_reg::W`](W) writer structure"] +impl crate::Writable for Ret21RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET21_REG to value 0"] -impl crate::Resettable for RET21_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret21RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret22_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret22_reg.rs index f12ed32..04ad443 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret22_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret22_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET22_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET22_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET22_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret22_reg](index.html) module"] -pub struct RET22_REG_SPEC; -impl crate::RegisterSpec for RET22_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret22_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret22_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret22RegSpec; +impl crate::RegisterSpec for Ret22RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret22_reg::R](R) reader structure"] -impl crate::Readable for RET22_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret22_reg::W](W) writer structure"] -impl crate::Writable for RET22_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret22_reg::R`](R) reader structure"] +impl crate::Readable for Ret22RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret22_reg::W`](W) writer structure"] +impl crate::Writable for Ret22RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET22_REG to value 0"] -impl crate::Resettable for RET22_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret22RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret23_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret23_reg.rs index b20f3b8..74d986e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret23_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret23_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET23_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET23_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET23_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret23_reg](index.html) module"] -pub struct RET23_REG_SPEC; -impl crate::RegisterSpec for RET23_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret23_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret23_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret23RegSpec; +impl crate::RegisterSpec for Ret23RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret23_reg::R](R) reader structure"] -impl crate::Readable for RET23_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret23_reg::W](W) writer structure"] -impl crate::Writable for RET23_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret23_reg::R`](R) reader structure"] +impl crate::Readable for Ret23RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret23_reg::W`](W) writer structure"] +impl crate::Writable for Ret23RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET23_REG to value 0"] -impl crate::Resettable for RET23_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret23RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret24_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret24_reg.rs index d970863..cd8bab5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret24_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret24_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET24_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET24_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET24_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret24_reg](index.html) module"] -pub struct RET24_REG_SPEC; -impl crate::RegisterSpec for RET24_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret24_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret24_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret24RegSpec; +impl crate::RegisterSpec for Ret24RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret24_reg::R](R) reader structure"] -impl crate::Readable for RET24_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret24_reg::W](W) writer structure"] -impl crate::Writable for RET24_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret24_reg::R`](R) reader structure"] +impl crate::Readable for Ret24RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret24_reg::W`](W) writer structure"] +impl crate::Writable for Ret24RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET24_REG to value 0"] -impl crate::Resettable for RET24_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret24RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret25_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret25_reg.rs index e641a1f..b6a1fd7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret25_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret25_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET25_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET25_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET25_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret25_reg](index.html) module"] -pub struct RET25_REG_SPEC; -impl crate::RegisterSpec for RET25_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret25_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret25_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret25RegSpec; +impl crate::RegisterSpec for Ret25RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret25_reg::R](R) reader structure"] -impl crate::Readable for RET25_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret25_reg::W](W) writer structure"] -impl crate::Writable for RET25_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret25_reg::R`](R) reader structure"] +impl crate::Readable for Ret25RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret25_reg::W`](W) writer structure"] +impl crate::Writable for Ret25RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET25_REG to value 0"] -impl crate::Resettable for RET25_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret25RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret26_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret26_reg.rs index c18e82a..e0fbbac 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret26_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret26_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET26_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET26_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET26_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret26_reg](index.html) module"] -pub struct RET26_REG_SPEC; -impl crate::RegisterSpec for RET26_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret26_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret26_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret26RegSpec; +impl crate::RegisterSpec for Ret26RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret26_reg::R](R) reader structure"] -impl crate::Readable for RET26_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret26_reg::W](W) writer structure"] -impl crate::Writable for RET26_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret26_reg::R`](R) reader structure"] +impl crate::Readable for Ret26RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret26_reg::W`](W) writer structure"] +impl crate::Writable for Ret26RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET26_REG to value 0"] -impl crate::Resettable for RET26_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret26RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret27_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret27_reg.rs index 5780580..b4da49f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret27_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret27_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET27_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET27_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET27_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret27_reg](index.html) module"] -pub struct RET27_REG_SPEC; -impl crate::RegisterSpec for RET27_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret27_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret27_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret27RegSpec; +impl crate::RegisterSpec for Ret27RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret27_reg::R](R) reader structure"] -impl crate::Readable for RET27_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret27_reg::W](W) writer structure"] -impl crate::Writable for RET27_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret27_reg::R`](R) reader structure"] +impl crate::Readable for Ret27RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret27_reg::W`](W) writer structure"] +impl crate::Writable for Ret27RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET27_REG to value 0"] -impl crate::Resettable for RET27_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret27RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret28_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret28_reg.rs index 6dff6ca..3bc4129 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret28_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret28_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET28_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET28_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET28_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret28_reg](index.html) module"] -pub struct RET28_REG_SPEC; -impl crate::RegisterSpec for RET28_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret28_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret28_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret28RegSpec; +impl crate::RegisterSpec for Ret28RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret28_reg::R](R) reader structure"] -impl crate::Readable for RET28_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret28_reg::W](W) writer structure"] -impl crate::Writable for RET28_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret28_reg::R`](R) reader structure"] +impl crate::Readable for Ret28RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret28_reg::W`](W) writer structure"] +impl crate::Writable for Ret28RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET28_REG to value 0"] -impl crate::Resettable for RET28_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret28RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret29_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret29_reg.rs index e14a98c..781f267 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret29_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret29_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET29_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET29_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET29_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret29_reg](index.html) module"] -pub struct RET29_REG_SPEC; -impl crate::RegisterSpec for RET29_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret29_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret29_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret29RegSpec; +impl crate::RegisterSpec for Ret29RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret29_reg::R](R) reader structure"] -impl crate::Readable for RET29_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret29_reg::W](W) writer structure"] -impl crate::Writable for RET29_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret29_reg::R`](R) reader structure"] +impl crate::Readable for Ret29RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret29_reg::W`](W) writer structure"] +impl crate::Writable for Ret29RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET29_REG to value 0"] -impl crate::Resettable for RET29_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret29RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret2_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret2_reg.rs index 88c9167..33631cf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret2_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret2_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET2_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET2_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET2_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret2_reg](index.html) module"] -pub struct RET2_REG_SPEC; -impl crate::RegisterSpec for RET2_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret2_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret2_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret2RegSpec; +impl crate::RegisterSpec for Ret2RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret2_reg::R](R) reader structure"] -impl crate::Readable for RET2_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret2_reg::W](W) writer structure"] -impl crate::Writable for RET2_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret2_reg::R`](R) reader structure"] +impl crate::Readable for Ret2RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret2_reg::W`](W) writer structure"] +impl crate::Writable for Ret2RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET2_REG to value 0"] -impl crate::Resettable for RET2_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret2RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret30_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret30_reg.rs index 63b44ca..ba77915 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret30_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret30_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET30_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET30_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET30_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret30_reg](index.html) module"] -pub struct RET30_REG_SPEC; -impl crate::RegisterSpec for RET30_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret30_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret30_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret30RegSpec; +impl crate::RegisterSpec for Ret30RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret30_reg::R](R) reader structure"] -impl crate::Readable for RET30_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret30_reg::W](W) writer structure"] -impl crate::Writable for RET30_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret30_reg::R`](R) reader structure"] +impl crate::Readable for Ret30RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret30_reg::W`](W) writer structure"] +impl crate::Writable for Ret30RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET30_REG to value 0"] -impl crate::Resettable for RET30_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret30RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret31_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret31_reg.rs index 30f4af2..15a9bcd 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret31_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret31_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET31_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET31_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET31_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret31_reg](index.html) module"] -pub struct RET31_REG_SPEC; -impl crate::RegisterSpec for RET31_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret31_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret31_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret31RegSpec; +impl crate::RegisterSpec for Ret31RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret31_reg::R](R) reader structure"] -impl crate::Readable for RET31_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret31_reg::W](W) writer structure"] -impl crate::Writable for RET31_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret31_reg::R`](R) reader structure"] +impl crate::Readable for Ret31RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret31_reg::W`](W) writer structure"] +impl crate::Writable for Ret31RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET31_REG to value 0"] -impl crate::Resettable for RET31_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret31RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret3_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret3_reg.rs index e75af7a..c17551f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret3_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret3_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET3_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET3_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET3_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret3_reg](index.html) module"] -pub struct RET3_REG_SPEC; -impl crate::RegisterSpec for RET3_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret3_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret3_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret3RegSpec; +impl crate::RegisterSpec for Ret3RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret3_reg::R](R) reader structure"] -impl crate::Readable for RET3_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret3_reg::W](W) writer structure"] -impl crate::Writable for RET3_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret3_reg::R`](R) reader structure"] +impl crate::Readable for Ret3RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret3_reg::W`](W) writer structure"] +impl crate::Writable for Ret3RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET3_REG to value 0"] -impl crate::Resettable for RET3_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret3RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret4_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret4_reg.rs index b9aebbd..8637ccf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret4_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret4_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET4_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET4_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET4_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret4_reg](index.html) module"] -pub struct RET4_REG_SPEC; -impl crate::RegisterSpec for RET4_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret4_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret4_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret4RegSpec; +impl crate::RegisterSpec for Ret4RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret4_reg::R](R) reader structure"] -impl crate::Readable for RET4_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret4_reg::W](W) writer structure"] -impl crate::Writable for RET4_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret4_reg::R`](R) reader structure"] +impl crate::Readable for Ret4RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret4_reg::W`](W) writer structure"] +impl crate::Writable for Ret4RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET4_REG to value 0"] -impl crate::Resettable for RET4_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret4RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret5_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret5_reg.rs index 47a2cba..b8c7ed9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret5_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret5_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET5_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET5_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET5_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret5_reg](index.html) module"] -pub struct RET5_REG_SPEC; -impl crate::RegisterSpec for RET5_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret5_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret5_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret5RegSpec; +impl crate::RegisterSpec for Ret5RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret5_reg::R](R) reader structure"] -impl crate::Readable for RET5_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret5_reg::W](W) writer structure"] -impl crate::Writable for RET5_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret5_reg::R`](R) reader structure"] +impl crate::Readable for Ret5RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret5_reg::W`](W) writer structure"] +impl crate::Writable for Ret5RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET5_REG to value 0"] -impl crate::Resettable for RET5_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret5RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret6_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret6_reg.rs index df49b3e..c4bc801 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret6_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret6_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET6_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET6_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET6_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret6_reg](index.html) module"] -pub struct RET6_REG_SPEC; -impl crate::RegisterSpec for RET6_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret6_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret6_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret6RegSpec; +impl crate::RegisterSpec for Ret6RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret6_reg::R](R) reader structure"] -impl crate::Readable for RET6_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret6_reg::W](W) writer structure"] -impl crate::Writable for RET6_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret6_reg::R`](R) reader structure"] +impl crate::Readable for Ret6RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret6_reg::W`](W) writer structure"] +impl crate::Writable for Ret6RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET6_REG to value 0"] -impl crate::Resettable for RET6_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret6RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret7_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret7_reg.rs index c6e3ed5..9465459 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret7_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret7_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET7_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET7_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET7_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret7_reg](index.html) module"] -pub struct RET7_REG_SPEC; -impl crate::RegisterSpec for RET7_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret7_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret7_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret7RegSpec; +impl crate::RegisterSpec for Ret7RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret7_reg::R](R) reader structure"] -impl crate::Readable for RET7_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret7_reg::W](W) writer structure"] -impl crate::Writable for RET7_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret7_reg::R`](R) reader structure"] +impl crate::Readable for Ret7RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret7_reg::W`](W) writer structure"] +impl crate::Writable for Ret7RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET7_REG to value 0"] -impl crate::Resettable for RET7_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret7RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret8_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret8_reg.rs index 7f1cedf..54cc7db 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret8_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret8_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET8_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET8_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET8_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret8_reg](index.html) module"] -pub struct RET8_REG_SPEC; -impl crate::RegisterSpec for RET8_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret8_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret8_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret8RegSpec; +impl crate::RegisterSpec for Ret8RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret8_reg::R](R) reader structure"] -impl crate::Readable for RET8_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret8_reg::W](W) writer structure"] -impl crate::Writable for RET8_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret8_reg::R`](R) reader structure"] +impl crate::Readable for Ret8RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret8_reg::W`](W) writer structure"] +impl crate::Writable for Ret8RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET8_REG to value 0"] -impl crate::Resettable for RET8_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret8RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret9_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret9_reg.rs index 848ae28..f52b6e0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret9_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_ns/ret9_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET9_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET9_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET9_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret9_reg](index.html) module"] -pub struct RET9_REG_SPEC; -impl crate::RegisterSpec for RET9_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret9_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret9_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret9RegSpec; +impl crate::RegisterSpec for Ret9RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret9_reg::R](R) reader structure"] -impl crate::Readable for RET9_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret9_reg::W](W) writer structure"] -impl crate::Writable for RET9_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret9_reg::R`](R) reader structure"] +impl crate::Readable for Ret9RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret9_reg::W`](W) writer structure"] +impl crate::Writable for Ret9RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET9_REG to value 0"] -impl crate::Resettable for RET9_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret9RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s.rs index d17e0bd..8ae0005 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s.rs @@ -1,196 +1,390 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ret0_reg: Ret0Reg, + ret1_reg: Ret1Reg, + ret2_reg: Ret2Reg, + ret3_reg: Ret3Reg, + ret4_reg: Ret4Reg, + ret5_reg: Ret5Reg, + ret6_reg: Ret6Reg, + ret7_reg: Ret7Reg, + ret8_reg: Ret8Reg, + ret9_reg: Ret9Reg, + ret10_reg: Ret10Reg, + ret11_reg: Ret11Reg, + ret12_reg: Ret12Reg, + ret13_reg: Ret13Reg, + ret14_reg: Ret14Reg, + ret15_reg: Ret15Reg, + ret16_reg: Ret16Reg, + ret17_reg: Ret17Reg, + ret18_reg: Ret18Reg, + ret19_reg: Ret19Reg, + ret20_reg: Ret20Reg, + ret21_reg: Ret21Reg, + ret22_reg: Ret22Reg, + ret23_reg: Ret23Reg, + ret24_reg: Ret24Reg, + ret25_reg: Ret25Reg, + ret26_reg: Ret26Reg, + ret27_reg: Ret27Reg, + ret28_reg: Ret28Reg, + ret29_reg: Ret29Reg, + ret30_reg: Ret30Reg, + ret31_reg: Ret31Reg, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ret0_reg: RET0_REG, + #[inline(always)] + pub const fn ret0_reg(&self) -> &Ret0Reg { + &self.ret0_reg + } #[doc = "0x04 - No Description"] - pub ret1_reg: RET1_REG, + #[inline(always)] + pub const fn ret1_reg(&self) -> &Ret1Reg { + &self.ret1_reg + } #[doc = "0x08 - No Description"] - pub ret2_reg: RET2_REG, + #[inline(always)] + pub const fn ret2_reg(&self) -> &Ret2Reg { + &self.ret2_reg + } #[doc = "0x0c - No Description"] - pub ret3_reg: RET3_REG, + #[inline(always)] + pub const fn ret3_reg(&self) -> &Ret3Reg { + &self.ret3_reg + } #[doc = "0x10 - No Description"] - pub ret4_reg: RET4_REG, + #[inline(always)] + pub const fn ret4_reg(&self) -> &Ret4Reg { + &self.ret4_reg + } #[doc = "0x14 - No Description"] - pub ret5_reg: RET5_REG, + #[inline(always)] + pub const fn ret5_reg(&self) -> &Ret5Reg { + &self.ret5_reg + } #[doc = "0x18 - No Description"] - pub ret6_reg: RET6_REG, + #[inline(always)] + pub const fn ret6_reg(&self) -> &Ret6Reg { + &self.ret6_reg + } #[doc = "0x1c - No Description"] - pub ret7_reg: RET7_REG, + #[inline(always)] + pub const fn ret7_reg(&self) -> &Ret7Reg { + &self.ret7_reg + } #[doc = "0x20 - No Description"] - pub ret8_reg: RET8_REG, + #[inline(always)] + pub const fn ret8_reg(&self) -> &Ret8Reg { + &self.ret8_reg + } #[doc = "0x24 - No Description"] - pub ret9_reg: RET9_REG, + #[inline(always)] + pub const fn ret9_reg(&self) -> &Ret9Reg { + &self.ret9_reg + } #[doc = "0x28 - No Description"] - pub ret10_reg: RET10_REG, + #[inline(always)] + pub const fn ret10_reg(&self) -> &Ret10Reg { + &self.ret10_reg + } #[doc = "0x2c - No Description"] - pub ret11_reg: RET11_REG, + #[inline(always)] + pub const fn ret11_reg(&self) -> &Ret11Reg { + &self.ret11_reg + } #[doc = "0x30 - No Description"] - pub ret12_reg: RET12_REG, + #[inline(always)] + pub const fn ret12_reg(&self) -> &Ret12Reg { + &self.ret12_reg + } #[doc = "0x34 - No Description"] - pub ret13_reg: RET13_REG, + #[inline(always)] + pub const fn ret13_reg(&self) -> &Ret13Reg { + &self.ret13_reg + } #[doc = "0x38 - No Description"] - pub ret14_reg: RET14_REG, + #[inline(always)] + pub const fn ret14_reg(&self) -> &Ret14Reg { + &self.ret14_reg + } #[doc = "0x3c - No Description"] - pub ret15_reg: RET15_REG, + #[inline(always)] + pub const fn ret15_reg(&self) -> &Ret15Reg { + &self.ret15_reg + } #[doc = "0x40 - No Description"] - pub ret16_reg: RET16_REG, + #[inline(always)] + pub const fn ret16_reg(&self) -> &Ret16Reg { + &self.ret16_reg + } #[doc = "0x44 - No Description"] - pub ret17_reg: RET17_REG, + #[inline(always)] + pub const fn ret17_reg(&self) -> &Ret17Reg { + &self.ret17_reg + } #[doc = "0x48 - No Description"] - pub ret18_reg: RET18_REG, + #[inline(always)] + pub const fn ret18_reg(&self) -> &Ret18Reg { + &self.ret18_reg + } #[doc = "0x4c - No Description"] - pub ret19_reg: RET19_REG, + #[inline(always)] + pub const fn ret19_reg(&self) -> &Ret19Reg { + &self.ret19_reg + } #[doc = "0x50 - No Description"] - pub ret20_reg: RET20_REG, + #[inline(always)] + pub const fn ret20_reg(&self) -> &Ret20Reg { + &self.ret20_reg + } #[doc = "0x54 - No Description"] - pub ret21_reg: RET21_REG, + #[inline(always)] + pub const fn ret21_reg(&self) -> &Ret21Reg { + &self.ret21_reg + } #[doc = "0x58 - No Description"] - pub ret22_reg: RET22_REG, + #[inline(always)] + pub const fn ret22_reg(&self) -> &Ret22Reg { + &self.ret22_reg + } #[doc = "0x5c - No Description"] - pub ret23_reg: RET23_REG, + #[inline(always)] + pub const fn ret23_reg(&self) -> &Ret23Reg { + &self.ret23_reg + } #[doc = "0x60 - No Description"] - pub ret24_reg: RET24_REG, + #[inline(always)] + pub const fn ret24_reg(&self) -> &Ret24Reg { + &self.ret24_reg + } #[doc = "0x64 - No Description"] - pub ret25_reg: RET25_REG, + #[inline(always)] + pub const fn ret25_reg(&self) -> &Ret25Reg { + &self.ret25_reg + } #[doc = "0x68 - No Description"] - pub ret26_reg: RET26_REG, + #[inline(always)] + pub const fn ret26_reg(&self) -> &Ret26Reg { + &self.ret26_reg + } #[doc = "0x6c - No Description"] - pub ret27_reg: RET27_REG, + #[inline(always)] + pub const fn ret27_reg(&self) -> &Ret27Reg { + &self.ret27_reg + } #[doc = "0x70 - No Description"] - pub ret28_reg: RET28_REG, + #[inline(always)] + pub const fn ret28_reg(&self) -> &Ret28Reg { + &self.ret28_reg + } #[doc = "0x74 - No Description"] - pub ret29_reg: RET29_REG, + #[inline(always)] + pub const fn ret29_reg(&self) -> &Ret29Reg { + &self.ret29_reg + } #[doc = "0x78 - No Description"] - pub ret30_reg: RET30_REG, + #[inline(always)] + pub const fn ret30_reg(&self) -> &Ret30Reg { + &self.ret30_reg + } #[doc = "0x7c - No Description"] - pub ret31_reg: RET31_REG, + #[inline(always)] + pub const fn ret31_reg(&self) -> &Ret31Reg { + &self.ret31_reg + } } -#[doc = "RET0_REG (rw) register accessor: an alias for `Reg`"] -pub type RET0_REG = crate::Reg; +#[doc = "RET0_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret0_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret0_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret0_reg`] +module"] +#[doc(alias = "RET0_REG")] +pub type Ret0Reg = crate::Reg; #[doc = "No Description"] pub mod ret0_reg; -#[doc = "RET1_REG (rw) register accessor: an alias for `Reg`"] -pub type RET1_REG = crate::Reg; +#[doc = "RET1_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret1_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret1_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret1_reg`] +module"] +#[doc(alias = "RET1_REG")] +pub type Ret1Reg = crate::Reg; #[doc = "No Description"] pub mod ret1_reg; -#[doc = "RET2_REG (rw) register accessor: an alias for `Reg`"] -pub type RET2_REG = crate::Reg; +#[doc = "RET2_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret2_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret2_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret2_reg`] +module"] +#[doc(alias = "RET2_REG")] +pub type Ret2Reg = crate::Reg; #[doc = "No Description"] pub mod ret2_reg; -#[doc = "RET3_REG (rw) register accessor: an alias for `Reg`"] -pub type RET3_REG = crate::Reg; +#[doc = "RET3_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret3_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret3_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret3_reg`] +module"] +#[doc(alias = "RET3_REG")] +pub type Ret3Reg = crate::Reg; #[doc = "No Description"] pub mod ret3_reg; -#[doc = "RET4_REG (rw) register accessor: an alias for `Reg`"] -pub type RET4_REG = crate::Reg; +#[doc = "RET4_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret4_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret4_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret4_reg`] +module"] +#[doc(alias = "RET4_REG")] +pub type Ret4Reg = crate::Reg; #[doc = "No Description"] pub mod ret4_reg; -#[doc = "RET5_REG (rw) register accessor: an alias for `Reg`"] -pub type RET5_REG = crate::Reg; +#[doc = "RET5_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret5_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret5_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret5_reg`] +module"] +#[doc(alias = "RET5_REG")] +pub type Ret5Reg = crate::Reg; #[doc = "No Description"] pub mod ret5_reg; -#[doc = "RET6_REG (rw) register accessor: an alias for `Reg`"] -pub type RET6_REG = crate::Reg; +#[doc = "RET6_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret6_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret6_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret6_reg`] +module"] +#[doc(alias = "RET6_REG")] +pub type Ret6Reg = crate::Reg; #[doc = "No Description"] pub mod ret6_reg; -#[doc = "RET7_REG (rw) register accessor: an alias for `Reg`"] -pub type RET7_REG = crate::Reg; +#[doc = "RET7_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret7_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret7_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret7_reg`] +module"] +#[doc(alias = "RET7_REG")] +pub type Ret7Reg = crate::Reg; #[doc = "No Description"] pub mod ret7_reg; -#[doc = "RET8_REG (rw) register accessor: an alias for `Reg`"] -pub type RET8_REG = crate::Reg; +#[doc = "RET8_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret8_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret8_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret8_reg`] +module"] +#[doc(alias = "RET8_REG")] +pub type Ret8Reg = crate::Reg; #[doc = "No Description"] pub mod ret8_reg; -#[doc = "RET9_REG (rw) register accessor: an alias for `Reg`"] -pub type RET9_REG = crate::Reg; +#[doc = "RET9_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret9_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret9_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret9_reg`] +module"] +#[doc(alias = "RET9_REG")] +pub type Ret9Reg = crate::Reg; #[doc = "No Description"] pub mod ret9_reg; -#[doc = "RET10_REG (rw) register accessor: an alias for `Reg`"] -pub type RET10_REG = crate::Reg; +#[doc = "RET10_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret10_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret10_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret10_reg`] +module"] +#[doc(alias = "RET10_REG")] +pub type Ret10Reg = crate::Reg; #[doc = "No Description"] pub mod ret10_reg; -#[doc = "RET11_REG (rw) register accessor: an alias for `Reg`"] -pub type RET11_REG = crate::Reg; +#[doc = "RET11_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret11_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret11_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret11_reg`] +module"] +#[doc(alias = "RET11_REG")] +pub type Ret11Reg = crate::Reg; #[doc = "No Description"] pub mod ret11_reg; -#[doc = "RET12_REG (rw) register accessor: an alias for `Reg`"] -pub type RET12_REG = crate::Reg; +#[doc = "RET12_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret12_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret12_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret12_reg`] +module"] +#[doc(alias = "RET12_REG")] +pub type Ret12Reg = crate::Reg; #[doc = "No Description"] pub mod ret12_reg; -#[doc = "RET13_REG (rw) register accessor: an alias for `Reg`"] -pub type RET13_REG = crate::Reg; +#[doc = "RET13_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret13_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret13_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret13_reg`] +module"] +#[doc(alias = "RET13_REG")] +pub type Ret13Reg = crate::Reg; #[doc = "No Description"] pub mod ret13_reg; -#[doc = "RET14_REG (rw) register accessor: an alias for `Reg`"] -pub type RET14_REG = crate::Reg; +#[doc = "RET14_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret14_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret14_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret14_reg`] +module"] +#[doc(alias = "RET14_REG")] +pub type Ret14Reg = crate::Reg; #[doc = "No Description"] pub mod ret14_reg; -#[doc = "RET15_REG (rw) register accessor: an alias for `Reg`"] -pub type RET15_REG = crate::Reg; +#[doc = "RET15_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret15_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret15_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret15_reg`] +module"] +#[doc(alias = "RET15_REG")] +pub type Ret15Reg = crate::Reg; #[doc = "No Description"] pub mod ret15_reg; -#[doc = "RET16_REG (rw) register accessor: an alias for `Reg`"] -pub type RET16_REG = crate::Reg; +#[doc = "RET16_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret16_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret16_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret16_reg`] +module"] +#[doc(alias = "RET16_REG")] +pub type Ret16Reg = crate::Reg; #[doc = "No Description"] pub mod ret16_reg; -#[doc = "RET17_REG (rw) register accessor: an alias for `Reg`"] -pub type RET17_REG = crate::Reg; +#[doc = "RET17_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret17_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret17_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret17_reg`] +module"] +#[doc(alias = "RET17_REG")] +pub type Ret17Reg = crate::Reg; #[doc = "No Description"] pub mod ret17_reg; -#[doc = "RET18_REG (rw) register accessor: an alias for `Reg`"] -pub type RET18_REG = crate::Reg; +#[doc = "RET18_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret18_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret18_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret18_reg`] +module"] +#[doc(alias = "RET18_REG")] +pub type Ret18Reg = crate::Reg; #[doc = "No Description"] pub mod ret18_reg; -#[doc = "RET19_REG (rw) register accessor: an alias for `Reg`"] -pub type RET19_REG = crate::Reg; +#[doc = "RET19_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret19_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret19_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret19_reg`] +module"] +#[doc(alias = "RET19_REG")] +pub type Ret19Reg = crate::Reg; #[doc = "No Description"] pub mod ret19_reg; -#[doc = "RET20_REG (rw) register accessor: an alias for `Reg`"] -pub type RET20_REG = crate::Reg; +#[doc = "RET20_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret20_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret20_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret20_reg`] +module"] +#[doc(alias = "RET20_REG")] +pub type Ret20Reg = crate::Reg; #[doc = "No Description"] pub mod ret20_reg; -#[doc = "RET21_REG (rw) register accessor: an alias for `Reg`"] -pub type RET21_REG = crate::Reg; +#[doc = "RET21_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret21_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret21_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret21_reg`] +module"] +#[doc(alias = "RET21_REG")] +pub type Ret21Reg = crate::Reg; #[doc = "No Description"] pub mod ret21_reg; -#[doc = "RET22_REG (rw) register accessor: an alias for `Reg`"] -pub type RET22_REG = crate::Reg; +#[doc = "RET22_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret22_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret22_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret22_reg`] +module"] +#[doc(alias = "RET22_REG")] +pub type Ret22Reg = crate::Reg; #[doc = "No Description"] pub mod ret22_reg; -#[doc = "RET23_REG (rw) register accessor: an alias for `Reg`"] -pub type RET23_REG = crate::Reg; +#[doc = "RET23_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret23_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret23_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret23_reg`] +module"] +#[doc(alias = "RET23_REG")] +pub type Ret23Reg = crate::Reg; #[doc = "No Description"] pub mod ret23_reg; -#[doc = "RET24_REG (rw) register accessor: an alias for `Reg`"] -pub type RET24_REG = crate::Reg; +#[doc = "RET24_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret24_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret24_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret24_reg`] +module"] +#[doc(alias = "RET24_REG")] +pub type Ret24Reg = crate::Reg; #[doc = "No Description"] pub mod ret24_reg; -#[doc = "RET25_REG (rw) register accessor: an alias for `Reg`"] -pub type RET25_REG = crate::Reg; +#[doc = "RET25_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret25_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret25_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret25_reg`] +module"] +#[doc(alias = "RET25_REG")] +pub type Ret25Reg = crate::Reg; #[doc = "No Description"] pub mod ret25_reg; -#[doc = "RET26_REG (rw) register accessor: an alias for `Reg`"] -pub type RET26_REG = crate::Reg; +#[doc = "RET26_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret26_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret26_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret26_reg`] +module"] +#[doc(alias = "RET26_REG")] +pub type Ret26Reg = crate::Reg; #[doc = "No Description"] pub mod ret26_reg; -#[doc = "RET27_REG (rw) register accessor: an alias for `Reg`"] -pub type RET27_REG = crate::Reg; +#[doc = "RET27_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret27_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret27_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret27_reg`] +module"] +#[doc(alias = "RET27_REG")] +pub type Ret27Reg = crate::Reg; #[doc = "No Description"] pub mod ret27_reg; -#[doc = "RET28_REG (rw) register accessor: an alias for `Reg`"] -pub type RET28_REG = crate::Reg; +#[doc = "RET28_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret28_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret28_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret28_reg`] +module"] +#[doc(alias = "RET28_REG")] +pub type Ret28Reg = crate::Reg; #[doc = "No Description"] pub mod ret28_reg; -#[doc = "RET29_REG (rw) register accessor: an alias for `Reg`"] -pub type RET29_REG = crate::Reg; +#[doc = "RET29_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret29_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret29_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret29_reg`] +module"] +#[doc(alias = "RET29_REG")] +pub type Ret29Reg = crate::Reg; #[doc = "No Description"] pub mod ret29_reg; -#[doc = "RET30_REG (rw) register accessor: an alias for `Reg`"] -pub type RET30_REG = crate::Reg; +#[doc = "RET30_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret30_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret30_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret30_reg`] +module"] +#[doc(alias = "RET30_REG")] +pub type Ret30Reg = crate::Reg; #[doc = "No Description"] pub mod ret30_reg; -#[doc = "RET31_REG (rw) register accessor: an alias for `Reg`"] -pub type RET31_REG = crate::Reg; +#[doc = "RET31_REG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret31_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret31_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ret31_reg`] +module"] +#[doc(alias = "RET31_REG")] +pub type Ret31Reg = crate::Reg; #[doc = "No Description"] pub mod ret31_reg; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret0_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret0_reg.rs index df06c08..76087a4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret0_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret0_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET0_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET0_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET0_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret0_reg](index.html) module"] -pub struct RET0_REG_SPEC; -impl crate::RegisterSpec for RET0_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret0_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret0_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret0RegSpec; +impl crate::RegisterSpec for Ret0RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret0_reg::R](R) reader structure"] -impl crate::Readable for RET0_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret0_reg::W](W) writer structure"] -impl crate::Writable for RET0_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret0_reg::R`](R) reader structure"] +impl crate::Readable for Ret0RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret0_reg::W`](W) writer structure"] +impl crate::Writable for Ret0RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET0_REG to value 0"] -impl crate::Resettable for RET0_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret0RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret10_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret10_reg.rs index 756ddef..9f58a98 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret10_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret10_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET10_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET10_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET10_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret10_reg](index.html) module"] -pub struct RET10_REG_SPEC; -impl crate::RegisterSpec for RET10_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret10_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret10_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret10RegSpec; +impl crate::RegisterSpec for Ret10RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret10_reg::R](R) reader structure"] -impl crate::Readable for RET10_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret10_reg::W](W) writer structure"] -impl crate::Writable for RET10_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret10_reg::R`](R) reader structure"] +impl crate::Readable for Ret10RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret10_reg::W`](W) writer structure"] +impl crate::Writable for Ret10RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET10_REG to value 0"] -impl crate::Resettable for RET10_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret10RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret11_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret11_reg.rs index b9ac6b8..ca56b86 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret11_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret11_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET11_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET11_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET11_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret11_reg](index.html) module"] -pub struct RET11_REG_SPEC; -impl crate::RegisterSpec for RET11_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret11_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret11_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret11RegSpec; +impl crate::RegisterSpec for Ret11RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret11_reg::R](R) reader structure"] -impl crate::Readable for RET11_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret11_reg::W](W) writer structure"] -impl crate::Writable for RET11_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret11_reg::R`](R) reader structure"] +impl crate::Readable for Ret11RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret11_reg::W`](W) writer structure"] +impl crate::Writable for Ret11RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET11_REG to value 0"] -impl crate::Resettable for RET11_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret11RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret12_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret12_reg.rs index cc60570..7b7f672 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret12_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret12_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET12_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET12_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET12_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret12_reg](index.html) module"] -pub struct RET12_REG_SPEC; -impl crate::RegisterSpec for RET12_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret12_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret12_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret12RegSpec; +impl crate::RegisterSpec for Ret12RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret12_reg::R](R) reader structure"] -impl crate::Readable for RET12_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret12_reg::W](W) writer structure"] -impl crate::Writable for RET12_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret12_reg::R`](R) reader structure"] +impl crate::Readable for Ret12RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret12_reg::W`](W) writer structure"] +impl crate::Writable for Ret12RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET12_REG to value 0"] -impl crate::Resettable for RET12_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret12RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret13_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret13_reg.rs index 44049c5..09a5cc5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret13_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret13_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET13_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET13_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET13_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret13_reg](index.html) module"] -pub struct RET13_REG_SPEC; -impl crate::RegisterSpec for RET13_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret13_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret13_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret13RegSpec; +impl crate::RegisterSpec for Ret13RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret13_reg::R](R) reader structure"] -impl crate::Readable for RET13_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret13_reg::W](W) writer structure"] -impl crate::Writable for RET13_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret13_reg::R`](R) reader structure"] +impl crate::Readable for Ret13RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret13_reg::W`](W) writer structure"] +impl crate::Writable for Ret13RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET13_REG to value 0"] -impl crate::Resettable for RET13_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret13RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret14_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret14_reg.rs index 1d84e33..e9d6b5b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret14_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret14_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET14_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET14_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET14_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret14_reg](index.html) module"] -pub struct RET14_REG_SPEC; -impl crate::RegisterSpec for RET14_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret14_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret14_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret14RegSpec; +impl crate::RegisterSpec for Ret14RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret14_reg::R](R) reader structure"] -impl crate::Readable for RET14_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret14_reg::W](W) writer structure"] -impl crate::Writable for RET14_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret14_reg::R`](R) reader structure"] +impl crate::Readable for Ret14RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret14_reg::W`](W) writer structure"] +impl crate::Writable for Ret14RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET14_REG to value 0"] -impl crate::Resettable for RET14_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret14RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret15_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret15_reg.rs index f0ae8ec..59d89d6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret15_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret15_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET15_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET15_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET15_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret15_reg](index.html) module"] -pub struct RET15_REG_SPEC; -impl crate::RegisterSpec for RET15_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret15_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret15_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret15RegSpec; +impl crate::RegisterSpec for Ret15RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret15_reg::R](R) reader structure"] -impl crate::Readable for RET15_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret15_reg::W](W) writer structure"] -impl crate::Writable for RET15_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret15_reg::R`](R) reader structure"] +impl crate::Readable for Ret15RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret15_reg::W`](W) writer structure"] +impl crate::Writable for Ret15RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET15_REG to value 0"] -impl crate::Resettable for RET15_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret15RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret16_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret16_reg.rs index 703af14..0b6089d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret16_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret16_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET16_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET16_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET16_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret16_reg](index.html) module"] -pub struct RET16_REG_SPEC; -impl crate::RegisterSpec for RET16_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret16_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret16_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret16RegSpec; +impl crate::RegisterSpec for Ret16RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret16_reg::R](R) reader structure"] -impl crate::Readable for RET16_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret16_reg::W](W) writer structure"] -impl crate::Writable for RET16_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret16_reg::R`](R) reader structure"] +impl crate::Readable for Ret16RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret16_reg::W`](W) writer structure"] +impl crate::Writable for Ret16RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET16_REG to value 0"] -impl crate::Resettable for RET16_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret16RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret17_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret17_reg.rs index bdd76f3..083b961 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret17_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret17_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET17_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET17_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET17_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret17_reg](index.html) module"] -pub struct RET17_REG_SPEC; -impl crate::RegisterSpec for RET17_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret17_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret17_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret17RegSpec; +impl crate::RegisterSpec for Ret17RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret17_reg::R](R) reader structure"] -impl crate::Readable for RET17_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret17_reg::W](W) writer structure"] -impl crate::Writable for RET17_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret17_reg::R`](R) reader structure"] +impl crate::Readable for Ret17RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret17_reg::W`](W) writer structure"] +impl crate::Writable for Ret17RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET17_REG to value 0"] -impl crate::Resettable for RET17_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret17RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret18_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret18_reg.rs index 66ba1c2..0415219 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret18_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret18_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET18_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET18_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET18_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret18_reg](index.html) module"] -pub struct RET18_REG_SPEC; -impl crate::RegisterSpec for RET18_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret18_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret18_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret18RegSpec; +impl crate::RegisterSpec for Ret18RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret18_reg::R](R) reader structure"] -impl crate::Readable for RET18_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret18_reg::W](W) writer structure"] -impl crate::Writable for RET18_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret18_reg::R`](R) reader structure"] +impl crate::Readable for Ret18RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret18_reg::W`](W) writer structure"] +impl crate::Writable for Ret18RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET18_REG to value 0"] -impl crate::Resettable for RET18_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret18RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret19_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret19_reg.rs index d49bfe2..db0459b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret19_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret19_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET19_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET19_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET19_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret19_reg](index.html) module"] -pub struct RET19_REG_SPEC; -impl crate::RegisterSpec for RET19_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret19_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret19_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret19RegSpec; +impl crate::RegisterSpec for Ret19RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret19_reg::R](R) reader structure"] -impl crate::Readable for RET19_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret19_reg::W](W) writer structure"] -impl crate::Writable for RET19_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret19_reg::R`](R) reader structure"] +impl crate::Readable for Ret19RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret19_reg::W`](W) writer structure"] +impl crate::Writable for Ret19RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET19_REG to value 0"] -impl crate::Resettable for RET19_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret19RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret1_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret1_reg.rs index 2307bcc..6c0889a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret1_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret1_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET1_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET1_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET1_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret1_reg](index.html) module"] -pub struct RET1_REG_SPEC; -impl crate::RegisterSpec for RET1_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret1_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret1_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret1RegSpec; +impl crate::RegisterSpec for Ret1RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret1_reg::R](R) reader structure"] -impl crate::Readable for RET1_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret1_reg::W](W) writer structure"] -impl crate::Writable for RET1_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret1_reg::R`](R) reader structure"] +impl crate::Readable for Ret1RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret1_reg::W`](W) writer structure"] +impl crate::Writable for Ret1RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET1_REG to value 0"] -impl crate::Resettable for RET1_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret1RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret20_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret20_reg.rs index 661c42e..47e0a43 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret20_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret20_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET20_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET20_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET20_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret20_reg](index.html) module"] -pub struct RET20_REG_SPEC; -impl crate::RegisterSpec for RET20_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret20_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret20_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret20RegSpec; +impl crate::RegisterSpec for Ret20RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret20_reg::R](R) reader structure"] -impl crate::Readable for RET20_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret20_reg::W](W) writer structure"] -impl crate::Writable for RET20_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret20_reg::R`](R) reader structure"] +impl crate::Readable for Ret20RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret20_reg::W`](W) writer structure"] +impl crate::Writable for Ret20RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET20_REG to value 0"] -impl crate::Resettable for RET20_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret20RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret21_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret21_reg.rs index 412caaf..9887cc0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret21_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret21_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET21_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET21_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET21_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret21_reg](index.html) module"] -pub struct RET21_REG_SPEC; -impl crate::RegisterSpec for RET21_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret21_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret21_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret21RegSpec; +impl crate::RegisterSpec for Ret21RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret21_reg::R](R) reader structure"] -impl crate::Readable for RET21_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret21_reg::W](W) writer structure"] -impl crate::Writable for RET21_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret21_reg::R`](R) reader structure"] +impl crate::Readable for Ret21RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret21_reg::W`](W) writer structure"] +impl crate::Writable for Ret21RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET21_REG to value 0"] -impl crate::Resettable for RET21_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret21RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret22_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret22_reg.rs index f12ed32..04ad443 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret22_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret22_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET22_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET22_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET22_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret22_reg](index.html) module"] -pub struct RET22_REG_SPEC; -impl crate::RegisterSpec for RET22_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret22_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret22_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret22RegSpec; +impl crate::RegisterSpec for Ret22RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret22_reg::R](R) reader structure"] -impl crate::Readable for RET22_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret22_reg::W](W) writer structure"] -impl crate::Writable for RET22_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret22_reg::R`](R) reader structure"] +impl crate::Readable for Ret22RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret22_reg::W`](W) writer structure"] +impl crate::Writable for Ret22RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET22_REG to value 0"] -impl crate::Resettable for RET22_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret22RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret23_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret23_reg.rs index b20f3b8..74d986e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret23_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret23_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET23_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET23_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET23_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret23_reg](index.html) module"] -pub struct RET23_REG_SPEC; -impl crate::RegisterSpec for RET23_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret23_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret23_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret23RegSpec; +impl crate::RegisterSpec for Ret23RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret23_reg::R](R) reader structure"] -impl crate::Readable for RET23_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret23_reg::W](W) writer structure"] -impl crate::Writable for RET23_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret23_reg::R`](R) reader structure"] +impl crate::Readable for Ret23RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret23_reg::W`](W) writer structure"] +impl crate::Writable for Ret23RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET23_REG to value 0"] -impl crate::Resettable for RET23_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret23RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret24_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret24_reg.rs index d970863..cd8bab5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret24_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret24_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET24_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET24_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET24_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret24_reg](index.html) module"] -pub struct RET24_REG_SPEC; -impl crate::RegisterSpec for RET24_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret24_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret24_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret24RegSpec; +impl crate::RegisterSpec for Ret24RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret24_reg::R](R) reader structure"] -impl crate::Readable for RET24_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret24_reg::W](W) writer structure"] -impl crate::Writable for RET24_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret24_reg::R`](R) reader structure"] +impl crate::Readable for Ret24RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret24_reg::W`](W) writer structure"] +impl crate::Writable for Ret24RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET24_REG to value 0"] -impl crate::Resettable for RET24_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret24RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret25_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret25_reg.rs index e641a1f..b6a1fd7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret25_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret25_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET25_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET25_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET25_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret25_reg](index.html) module"] -pub struct RET25_REG_SPEC; -impl crate::RegisterSpec for RET25_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret25_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret25_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret25RegSpec; +impl crate::RegisterSpec for Ret25RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret25_reg::R](R) reader structure"] -impl crate::Readable for RET25_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret25_reg::W](W) writer structure"] -impl crate::Writable for RET25_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret25_reg::R`](R) reader structure"] +impl crate::Readable for Ret25RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret25_reg::W`](W) writer structure"] +impl crate::Writable for Ret25RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET25_REG to value 0"] -impl crate::Resettable for RET25_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret25RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret26_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret26_reg.rs index c18e82a..e0fbbac 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret26_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret26_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET26_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET26_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET26_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret26_reg](index.html) module"] -pub struct RET26_REG_SPEC; -impl crate::RegisterSpec for RET26_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret26_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret26_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret26RegSpec; +impl crate::RegisterSpec for Ret26RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret26_reg::R](R) reader structure"] -impl crate::Readable for RET26_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret26_reg::W](W) writer structure"] -impl crate::Writable for RET26_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret26_reg::R`](R) reader structure"] +impl crate::Readable for Ret26RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret26_reg::W`](W) writer structure"] +impl crate::Writable for Ret26RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET26_REG to value 0"] -impl crate::Resettable for RET26_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret26RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret27_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret27_reg.rs index 5780580..b4da49f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret27_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret27_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET27_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET27_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET27_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret27_reg](index.html) module"] -pub struct RET27_REG_SPEC; -impl crate::RegisterSpec for RET27_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret27_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret27_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret27RegSpec; +impl crate::RegisterSpec for Ret27RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret27_reg::R](R) reader structure"] -impl crate::Readable for RET27_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret27_reg::W](W) writer structure"] -impl crate::Writable for RET27_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret27_reg::R`](R) reader structure"] +impl crate::Readable for Ret27RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret27_reg::W`](W) writer structure"] +impl crate::Writable for Ret27RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET27_REG to value 0"] -impl crate::Resettable for RET27_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret27RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret28_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret28_reg.rs index 6dff6ca..3bc4129 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret28_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret28_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET28_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET28_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET28_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret28_reg](index.html) module"] -pub struct RET28_REG_SPEC; -impl crate::RegisterSpec for RET28_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret28_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret28_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret28RegSpec; +impl crate::RegisterSpec for Ret28RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret28_reg::R](R) reader structure"] -impl crate::Readable for RET28_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret28_reg::W](W) writer structure"] -impl crate::Writable for RET28_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret28_reg::R`](R) reader structure"] +impl crate::Readable for Ret28RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret28_reg::W`](W) writer structure"] +impl crate::Writable for Ret28RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET28_REG to value 0"] -impl crate::Resettable for RET28_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret28RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret29_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret29_reg.rs index e14a98c..781f267 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret29_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret29_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET29_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET29_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET29_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret29_reg](index.html) module"] -pub struct RET29_REG_SPEC; -impl crate::RegisterSpec for RET29_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret29_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret29_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret29RegSpec; +impl crate::RegisterSpec for Ret29RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret29_reg::R](R) reader structure"] -impl crate::Readable for RET29_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret29_reg::W](W) writer structure"] -impl crate::Writable for RET29_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret29_reg::R`](R) reader structure"] +impl crate::Readable for Ret29RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret29_reg::W`](W) writer structure"] +impl crate::Writable for Ret29RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET29_REG to value 0"] -impl crate::Resettable for RET29_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret29RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret2_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret2_reg.rs index 88c9167..33631cf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret2_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret2_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET2_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET2_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET2_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret2_reg](index.html) module"] -pub struct RET2_REG_SPEC; -impl crate::RegisterSpec for RET2_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret2_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret2_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret2RegSpec; +impl crate::RegisterSpec for Ret2RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret2_reg::R](R) reader structure"] -impl crate::Readable for RET2_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret2_reg::W](W) writer structure"] -impl crate::Writable for RET2_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret2_reg::R`](R) reader structure"] +impl crate::Readable for Ret2RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret2_reg::W`](W) writer structure"] +impl crate::Writable for Ret2RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET2_REG to value 0"] -impl crate::Resettable for RET2_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret2RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret30_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret30_reg.rs index 63b44ca..ba77915 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret30_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret30_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET30_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET30_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET30_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret30_reg](index.html) module"] -pub struct RET30_REG_SPEC; -impl crate::RegisterSpec for RET30_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret30_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret30_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret30RegSpec; +impl crate::RegisterSpec for Ret30RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret30_reg::R](R) reader structure"] -impl crate::Readable for RET30_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret30_reg::W](W) writer structure"] -impl crate::Writable for RET30_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret30_reg::R`](R) reader structure"] +impl crate::Readable for Ret30RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret30_reg::W`](W) writer structure"] +impl crate::Writable for Ret30RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET30_REG to value 0"] -impl crate::Resettable for RET30_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret30RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret31_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret31_reg.rs index 30f4af2..15a9bcd 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret31_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret31_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET31_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET31_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET31_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret31_reg](index.html) module"] -pub struct RET31_REG_SPEC; -impl crate::RegisterSpec for RET31_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret31_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret31_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret31RegSpec; +impl crate::RegisterSpec for Ret31RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret31_reg::R](R) reader structure"] -impl crate::Readable for RET31_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret31_reg::W](W) writer structure"] -impl crate::Writable for RET31_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret31_reg::R`](R) reader structure"] +impl crate::Readable for Ret31RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret31_reg::W`](W) writer structure"] +impl crate::Writable for Ret31RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET31_REG to value 0"] -impl crate::Resettable for RET31_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret31RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret3_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret3_reg.rs index e75af7a..c17551f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret3_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret3_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET3_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET3_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET3_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret3_reg](index.html) module"] -pub struct RET3_REG_SPEC; -impl crate::RegisterSpec for RET3_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret3_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret3_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret3RegSpec; +impl crate::RegisterSpec for Ret3RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret3_reg::R](R) reader structure"] -impl crate::Readable for RET3_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret3_reg::W](W) writer structure"] -impl crate::Writable for RET3_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret3_reg::R`](R) reader structure"] +impl crate::Readable for Ret3RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret3_reg::W`](W) writer structure"] +impl crate::Writable for Ret3RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET3_REG to value 0"] -impl crate::Resettable for RET3_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret3RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret4_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret4_reg.rs index b9aebbd..8637ccf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret4_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret4_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET4_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET4_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET4_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret4_reg](index.html) module"] -pub struct RET4_REG_SPEC; -impl crate::RegisterSpec for RET4_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret4_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret4_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret4RegSpec; +impl crate::RegisterSpec for Ret4RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret4_reg::R](R) reader structure"] -impl crate::Readable for RET4_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret4_reg::W](W) writer structure"] -impl crate::Writable for RET4_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret4_reg::R`](R) reader structure"] +impl crate::Readable for Ret4RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret4_reg::W`](W) writer structure"] +impl crate::Writable for Ret4RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET4_REG to value 0"] -impl crate::Resettable for RET4_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret4RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret5_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret5_reg.rs index 47a2cba..b8c7ed9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret5_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret5_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET5_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET5_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET5_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret5_reg](index.html) module"] -pub struct RET5_REG_SPEC; -impl crate::RegisterSpec for RET5_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret5_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret5_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret5RegSpec; +impl crate::RegisterSpec for Ret5RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret5_reg::R](R) reader structure"] -impl crate::Readable for RET5_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret5_reg::W](W) writer structure"] -impl crate::Writable for RET5_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret5_reg::R`](R) reader structure"] +impl crate::Readable for Ret5RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret5_reg::W`](W) writer structure"] +impl crate::Writable for Ret5RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET5_REG to value 0"] -impl crate::Resettable for RET5_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret5RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret6_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret6_reg.rs index df49b3e..c4bc801 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret6_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret6_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET6_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET6_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET6_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret6_reg](index.html) module"] -pub struct RET6_REG_SPEC; -impl crate::RegisterSpec for RET6_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret6_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret6_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret6RegSpec; +impl crate::RegisterSpec for Ret6RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret6_reg::R](R) reader structure"] -impl crate::Readable for RET6_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret6_reg::W](W) writer structure"] -impl crate::Writable for RET6_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret6_reg::R`](R) reader structure"] +impl crate::Readable for Ret6RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret6_reg::W`](W) writer structure"] +impl crate::Writable for Ret6RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET6_REG to value 0"] -impl crate::Resettable for RET6_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret6RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret7_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret7_reg.rs index c6e3ed5..9465459 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret7_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret7_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET7_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET7_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET7_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret7_reg](index.html) module"] -pub struct RET7_REG_SPEC; -impl crate::RegisterSpec for RET7_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret7_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret7_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret7RegSpec; +impl crate::RegisterSpec for Ret7RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret7_reg::R](R) reader structure"] -impl crate::Readable for RET7_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret7_reg::W](W) writer structure"] -impl crate::Writable for RET7_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret7_reg::R`](R) reader structure"] +impl crate::Readable for Ret7RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret7_reg::W`](W) writer structure"] +impl crate::Writable for Ret7RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET7_REG to value 0"] -impl crate::Resettable for RET7_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret7RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret8_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret8_reg.rs index 7f1cedf..54cc7db 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret8_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret8_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET8_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET8_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET8_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret8_reg](index.html) module"] -pub struct RET8_REG_SPEC; -impl crate::RegisterSpec for RET8_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret8_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret8_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret8RegSpec; +impl crate::RegisterSpec for Ret8RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret8_reg::R](R) reader structure"] -impl crate::Readable for RET8_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret8_reg::W](W) writer structure"] -impl crate::Writable for RET8_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret8_reg::R`](R) reader structure"] +impl crate::Readable for Ret8RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret8_reg::W`](W) writer structure"] +impl crate::Writable for Ret8RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET8_REG to value 0"] -impl crate::Resettable for RET8_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret8RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret9_reg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret9_reg.rs index 848ae28..f52b6e0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret9_reg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/buram_s/ret9_reg.rs @@ -1,80 +1,40 @@ #[doc = "Register `RET9_REG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RET9_REG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RETREG` reader - Latch based Retention register"] -pub type RETREG_R = crate::FieldReader; +pub type RetregR = crate::FieldReader; #[doc = "Field `RETREG` writer - Latch based Retention register"] -pub type RETREG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RET9_REG_SPEC, u32, u32, 32, O>; +pub type RetregW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] - pub fn retreg(&self) -> RETREG_R { - RETREG_R::new(self.bits) + pub fn retreg(&self) -> RetregR { + RetregR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Latch based Retention register"] #[inline(always)] #[must_use] - pub fn retreg(&mut self) -> RETREG_W<0> { - RETREG_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn retreg(&mut self) -> RetregW { + RetregW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ret9_reg](index.html) module"] -pub struct RET9_REG_SPEC; -impl crate::RegisterSpec for RET9_REG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ret9_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ret9_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ret9RegSpec; +impl crate::RegisterSpec for Ret9RegSpec { type Ux = u32; } -#[doc = "`read()` method returns [ret9_reg::R](R) reader structure"] -impl crate::Readable for RET9_REG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ret9_reg::W](W) writer structure"] -impl crate::Writable for RET9_REG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ret9_reg::R`](R) reader structure"] +impl crate::Readable for Ret9RegSpec {} +#[doc = "`write(|w| ..)` method takes [`ret9_reg::W`](W) writer structure"] +impl crate::Writable for Ret9RegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RET9_REG to value 0"] -impl crate::Resettable for RET9_REG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ret9RegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns.rs index d750043..9f6372e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns.rs @@ -1,82 +1,162 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + cfg: Cfg, + cmd: Cmd, + status: Status, + if_: If, + ien: Ien, + precnt: Precnt, + cnt: Cnt, + em4wuen: Em4wuen, + syncbusy: Syncbusy, + lock: Lock, + comp: Comp, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x0c - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x10 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x14 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x18 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x1c - No Description"] - pub precnt: PRECNT, + #[inline(always)] + pub const fn precnt(&self) -> &Precnt { + &self.precnt + } #[doc = "0x20 - No Description"] - pub cnt: CNT, + #[inline(always)] + pub const fn cnt(&self) -> &Cnt { + &self.cnt + } #[doc = "0x24 - No Description"] - pub em4wuen: EM4WUEN, + #[inline(always)] + pub const fn em4wuen(&self) -> &Em4wuen { + &self.em4wuen + } #[doc = "0x28 - No Description"] - pub syncbusy: SYNCBUSY, + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } #[doc = "0x2c - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x30 - No Description"] - pub comp: COMP, + #[inline(always)] + pub const fn comp(&self) -> &Comp { + &self.comp + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "PRECNT (rw) register accessor: an alias for `Reg`"] -pub type PRECNT = crate::Reg; +#[doc = "PRECNT (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`precnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`precnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@precnt`] +module"] +#[doc(alias = "PRECNT")] +pub type Precnt = crate::Reg; #[doc = "No Description"] pub mod precnt; -#[doc = "CNT (rw) register accessor: an alias for `Reg`"] -pub type CNT = crate::Reg; +#[doc = "CNT (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnt`] +module"] +#[doc(alias = "CNT")] +pub type Cnt = crate::Reg; #[doc = "No Description"] pub mod cnt; -#[doc = "EM4WUEN (rw) register accessor: an alias for `Reg`"] -pub type EM4WUEN = crate::Reg; +#[doc = "EM4WUEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em4wuen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em4wuen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@em4wuen`] +module"] +#[doc(alias = "EM4WUEN")] +pub type Em4wuen = crate::Reg; #[doc = "No Description"] pub mod em4wuen; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "No Description"] pub mod syncbusy; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "COMP (rw) register accessor: an alias for `Reg`"] -pub type COMP = crate::Reg; +#[doc = "COMP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`comp::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`comp::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@comp`] +module"] +#[doc(alias = "COMP")] +pub type Comp = crate::Reg; #[doc = "No Description"] pub mod comp; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/cfg.rs index 5d27dbb..dcc39ca 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/cfg.rs @@ -1,433 +1,406 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] -pub type DEBUGRUN_R = crate::BitReader; +pub type W = crate::W; #[doc = "Debug Mode Run Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DEBUGRUN_A { +pub enum Debugrun { #[doc = "0: BURTC is frozen in debug mode"] X0 = 0, #[doc = "1: BURTC is running in debug mode"] X1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DEBUGRUN_A) -> Self { + fn from(variant: Debugrun) -> Self { variant as u8 != 0 } } -impl DEBUGRUN_R { +#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] +pub type DebugrunR = crate::BitReader; +impl DebugrunR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DEBUGRUN_A { + pub const fn variant(&self) -> Debugrun { match self.bits { - false => DEBUGRUN_A::X0, - true => DEBUGRUN_A::X1, + false => Debugrun::X0, + true => Debugrun::X1, } } - #[doc = "Checks if the value of the field is `X0`"] + #[doc = "BURTC is frozen in debug mode"] #[inline(always)] pub fn is_x0(&self) -> bool { - *self == DEBUGRUN_A::X0 + *self == Debugrun::X0 } - #[doc = "Checks if the value of the field is `X1`"] + #[doc = "BURTC is running in debug mode"] #[inline(always)] pub fn is_x1(&self) -> bool { - *self == DEBUGRUN_A::X1 + *self == Debugrun::X1 } } #[doc = "Field `DEBUGRUN` writer - Debug Mode Run Enable"] -pub type DEBUGRUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DEBUGRUN_A, O>; -impl<'a, const O: u8> DEBUGRUN_W<'a, O> { +pub type DebugrunW<'a, REG> = crate::BitWriter<'a, REG, Debugrun>; +impl<'a, REG> DebugrunW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "BURTC is frozen in debug mode"] #[inline(always)] - pub fn x0(self) -> &'a mut W { - self.variant(DEBUGRUN_A::X0) + pub fn x0(self) -> &'a mut crate::W { + self.variant(Debugrun::X0) } #[doc = "BURTC is running in debug mode"] #[inline(always)] - pub fn x1(self) -> &'a mut W { - self.variant(DEBUGRUN_A::X1) + pub fn x1(self) -> &'a mut crate::W { + self.variant(Debugrun::X1) } } -#[doc = "Field `COMPTOP` reader - Compare Channel is Top Value"] -pub type COMPTOP_R = crate::BitReader; #[doc = "Compare Channel is Top Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum COMPTOP_A { +pub enum Comptop { #[doc = "0: The top value of the BURTC is 4294967295 (0xFFFFFFFF)"] - DISABLE = 0, + Disable = 0, #[doc = "1: The top value of the BURTC is given by COMP"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: COMPTOP_A) -> Self { + fn from(variant: Comptop) -> Self { variant as u8 != 0 } } -impl COMPTOP_R { +#[doc = "Field `COMPTOP` reader - Compare Channel is Top Value"] +pub type ComptopR = crate::BitReader; +impl ComptopR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COMPTOP_A { + pub const fn variant(&self) -> Comptop { match self.bits { - false => COMPTOP_A::DISABLE, - true => COMPTOP_A::ENABLE, + false => Comptop::Disable, + true => Comptop::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The top value of the BURTC is 4294967295 (0xFFFFFFFF)"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == COMPTOP_A::DISABLE + *self == Comptop::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The top value of the BURTC is given by COMP"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == COMPTOP_A::ENABLE + *self == Comptop::Enable } } #[doc = "Field `COMPTOP` writer - Compare Channel is Top Value"] -pub type COMPTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, COMPTOP_A, O>; -impl<'a, const O: u8> COMPTOP_W<'a, O> { +pub type ComptopW<'a, REG> = crate::BitWriter<'a, REG, Comptop>; +impl<'a, REG> ComptopW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The top value of the BURTC is 4294967295 (0xFFFFFFFF)"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(COMPTOP_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Comptop::Disable) } #[doc = "The top value of the BURTC is given by COMP"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(COMPTOP_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Comptop::Enable) } } -#[doc = "Field `CNTPRESC` reader - Counter prescaler value."] -pub type CNTPRESC_R = crate::FieldReader; #[doc = "Counter prescaler value.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CNTPRESC_A { +pub enum Cntpresc { #[doc = "0: CLK_CNT = (BURTC LF CLK)/1"] - DIV1 = 0, + Div1 = 0, #[doc = "1: CLK_CNT = (BURTC LF CLK)/2"] - DIV2 = 1, + Div2 = 1, #[doc = "2: CLK_CNT = (BURTC LF CLK)/4"] - DIV4 = 2, + Div4 = 2, #[doc = "3: CLK_CNT = (BURTC LF CLK)/8"] - DIV8 = 3, + Div8 = 3, #[doc = "4: CLK_CNT = (BURTC LF CLK)/16"] - DIV16 = 4, + Div16 = 4, #[doc = "5: CLK_CNT = (BURTC LF CLK)/32"] - DIV32 = 5, + Div32 = 5, #[doc = "6: CLK_CNT = (BURTC LF CLK)/64"] - DIV64 = 6, + Div64 = 6, #[doc = "7: CLK_CNT = (BURTC LF CLK)/128"] - DIV128 = 7, + Div128 = 7, #[doc = "8: CLK_CNT = (BURTC LF CLK)/256"] - DIV256 = 8, + Div256 = 8, #[doc = "9: CLK_CNT = (BURTC LF CLK)/512"] - DIV512 = 9, + Div512 = 9, #[doc = "10: CLK_CNT = (BURTC LF CLK)/1024"] - DIV1024 = 10, + Div1024 = 10, #[doc = "11: CLK_CNT = (BURTC LF CLK)/2048"] - DIV2048 = 11, + Div2048 = 11, #[doc = "12: CLK_CNT = (BURTC LF CLK)/4096"] - DIV4096 = 12, + Div4096 = 12, #[doc = "13: CLK_CNT = (BURTC LF CLK)/8192"] - DIV8192 = 13, + Div8192 = 13, #[doc = "14: CLK_CNT = (BURTC LF CLK)/16384"] - DIV16384 = 14, + Div16384 = 14, #[doc = "15: CLK_CNT = (BURTC LF CLK)/32768"] - DIV32768 = 15, + Div32768 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CNTPRESC_A) -> Self { + fn from(variant: Cntpresc) -> Self { variant as _ } } -impl CNTPRESC_R { +impl crate::FieldSpec for Cntpresc { + type Ux = u8; +} +impl crate::IsEnum for Cntpresc {} +#[doc = "Field `CNTPRESC` reader - Counter prescaler value."] +pub type CntprescR = crate::FieldReader; +impl CntprescR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CNTPRESC_A { + pub const fn variant(&self) -> Cntpresc { match self.bits { - 0 => CNTPRESC_A::DIV1, - 1 => CNTPRESC_A::DIV2, - 2 => CNTPRESC_A::DIV4, - 3 => CNTPRESC_A::DIV8, - 4 => CNTPRESC_A::DIV16, - 5 => CNTPRESC_A::DIV32, - 6 => CNTPRESC_A::DIV64, - 7 => CNTPRESC_A::DIV128, - 8 => CNTPRESC_A::DIV256, - 9 => CNTPRESC_A::DIV512, - 10 => CNTPRESC_A::DIV1024, - 11 => CNTPRESC_A::DIV2048, - 12 => CNTPRESC_A::DIV4096, - 13 => CNTPRESC_A::DIV8192, - 14 => CNTPRESC_A::DIV16384, - 15 => CNTPRESC_A::DIV32768, + 0 => Cntpresc::Div1, + 1 => Cntpresc::Div2, + 2 => Cntpresc::Div4, + 3 => Cntpresc::Div8, + 4 => Cntpresc::Div16, + 5 => Cntpresc::Div32, + 6 => Cntpresc::Div64, + 7 => Cntpresc::Div128, + 8 => Cntpresc::Div256, + 9 => Cntpresc::Div512, + 10 => Cntpresc::Div1024, + 11 => Cntpresc::Div2048, + 12 => Cntpresc::Div4096, + 13 => Cntpresc::Div8192, + 14 => Cntpresc::Div16384, + 15 => Cntpresc::Div32768, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/1"] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == CNTPRESC_A::DIV1 + *self == Cntpresc::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/2"] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == CNTPRESC_A::DIV2 + *self == Cntpresc::Div2 } - #[doc = "Checks if the value of the field is `DIV4`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/4"] #[inline(always)] pub fn is_div4(&self) -> bool { - *self == CNTPRESC_A::DIV4 + *self == Cntpresc::Div4 } - #[doc = "Checks if the value of the field is `DIV8`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/8"] #[inline(always)] pub fn is_div8(&self) -> bool { - *self == CNTPRESC_A::DIV8 + *self == Cntpresc::Div8 } - #[doc = "Checks if the value of the field is `DIV16`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/16"] #[inline(always)] pub fn is_div16(&self) -> bool { - *self == CNTPRESC_A::DIV16 + *self == Cntpresc::Div16 } - #[doc = "Checks if the value of the field is `DIV32`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/32"] #[inline(always)] pub fn is_div32(&self) -> bool { - *self == CNTPRESC_A::DIV32 + *self == Cntpresc::Div32 } - #[doc = "Checks if the value of the field is `DIV64`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/64"] #[inline(always)] pub fn is_div64(&self) -> bool { - *self == CNTPRESC_A::DIV64 + *self == Cntpresc::Div64 } - #[doc = "Checks if the value of the field is `DIV128`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/128"] #[inline(always)] pub fn is_div128(&self) -> bool { - *self == CNTPRESC_A::DIV128 + *self == Cntpresc::Div128 } - #[doc = "Checks if the value of the field is `DIV256`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/256"] #[inline(always)] pub fn is_div256(&self) -> bool { - *self == CNTPRESC_A::DIV256 + *self == Cntpresc::Div256 } - #[doc = "Checks if the value of the field is `DIV512`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/512"] #[inline(always)] pub fn is_div512(&self) -> bool { - *self == CNTPRESC_A::DIV512 + *self == Cntpresc::Div512 } - #[doc = "Checks if the value of the field is `DIV1024`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/1024"] #[inline(always)] pub fn is_div1024(&self) -> bool { - *self == CNTPRESC_A::DIV1024 + *self == Cntpresc::Div1024 } - #[doc = "Checks if the value of the field is `DIV2048`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/2048"] #[inline(always)] pub fn is_div2048(&self) -> bool { - *self == CNTPRESC_A::DIV2048 + *self == Cntpresc::Div2048 } - #[doc = "Checks if the value of the field is `DIV4096`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/4096"] #[inline(always)] pub fn is_div4096(&self) -> bool { - *self == CNTPRESC_A::DIV4096 + *self == Cntpresc::Div4096 } - #[doc = "Checks if the value of the field is `DIV8192`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/8192"] #[inline(always)] pub fn is_div8192(&self) -> bool { - *self == CNTPRESC_A::DIV8192 + *self == Cntpresc::Div8192 } - #[doc = "Checks if the value of the field is `DIV16384`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/16384"] #[inline(always)] pub fn is_div16384(&self) -> bool { - *self == CNTPRESC_A::DIV16384 + *self == Cntpresc::Div16384 } - #[doc = "Checks if the value of the field is `DIV32768`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/32768"] #[inline(always)] pub fn is_div32768(&self) -> bool { - *self == CNTPRESC_A::DIV32768 + *self == Cntpresc::Div32768 } } #[doc = "Field `CNTPRESC` writer - Counter prescaler value."] -pub type CNTPRESC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, CNTPRESC_A, 4, O>; -impl<'a, const O: u8> CNTPRESC_W<'a, O> { +pub type CntprescW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cntpresc, crate::Safe>; +impl<'a, REG> CntprescW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "CLK_CNT = (BURTC LF CLK)/1"] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div1) } #[doc = "CLK_CNT = (BURTC LF CLK)/2"] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div2) } #[doc = "CLK_CNT = (BURTC LF CLK)/4"] #[inline(always)] - pub fn div4(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV4) + pub fn div4(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div4) } #[doc = "CLK_CNT = (BURTC LF CLK)/8"] #[inline(always)] - pub fn div8(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV8) + pub fn div8(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div8) } #[doc = "CLK_CNT = (BURTC LF CLK)/16"] #[inline(always)] - pub fn div16(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV16) + pub fn div16(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div16) } #[doc = "CLK_CNT = (BURTC LF CLK)/32"] #[inline(always)] - pub fn div32(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV32) + pub fn div32(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div32) } #[doc = "CLK_CNT = (BURTC LF CLK)/64"] #[inline(always)] - pub fn div64(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV64) + pub fn div64(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div64) } #[doc = "CLK_CNT = (BURTC LF CLK)/128"] #[inline(always)] - pub fn div128(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV128) + pub fn div128(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div128) } #[doc = "CLK_CNT = (BURTC LF CLK)/256"] #[inline(always)] - pub fn div256(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV256) + pub fn div256(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div256) } #[doc = "CLK_CNT = (BURTC LF CLK)/512"] #[inline(always)] - pub fn div512(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV512) + pub fn div512(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div512) } #[doc = "CLK_CNT = (BURTC LF CLK)/1024"] #[inline(always)] - pub fn div1024(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV1024) + pub fn div1024(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div1024) } #[doc = "CLK_CNT = (BURTC LF CLK)/2048"] #[inline(always)] - pub fn div2048(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV2048) + pub fn div2048(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div2048) } #[doc = "CLK_CNT = (BURTC LF CLK)/4096"] #[inline(always)] - pub fn div4096(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV4096) + pub fn div4096(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div4096) } #[doc = "CLK_CNT = (BURTC LF CLK)/8192"] #[inline(always)] - pub fn div8192(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV8192) + pub fn div8192(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div8192) } #[doc = "CLK_CNT = (BURTC LF CLK)/16384"] #[inline(always)] - pub fn div16384(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV16384) + pub fn div16384(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div16384) } #[doc = "CLK_CNT = (BURTC LF CLK)/32768"] #[inline(always)] - pub fn div32768(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV32768) + pub fn div32768(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div32768) } } impl R { #[doc = "Bit 0 - Debug Mode Run Enable"] #[inline(always)] - pub fn debugrun(&self) -> DEBUGRUN_R { - DEBUGRUN_R::new((self.bits & 1) != 0) + pub fn debugrun(&self) -> DebugrunR { + DebugrunR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Compare Channel is Top Value"] #[inline(always)] - pub fn comptop(&self) -> COMPTOP_R { - COMPTOP_R::new(((self.bits >> 1) & 1) != 0) + pub fn comptop(&self) -> ComptopR { + ComptopR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 4:7 - Counter prescaler value."] #[inline(always)] - pub fn cntpresc(&self) -> CNTPRESC_R { - CNTPRESC_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn cntpresc(&self) -> CntprescR { + CntprescR::new(((self.bits >> 4) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - Debug Mode Run Enable"] #[inline(always)] #[must_use] - pub fn debugrun(&mut self) -> DEBUGRUN_W<0> { - DEBUGRUN_W::new(self) + pub fn debugrun(&mut self) -> DebugrunW { + DebugrunW::new(self, 0) } #[doc = "Bit 1 - Compare Channel is Top Value"] #[inline(always)] #[must_use] - pub fn comptop(&mut self) -> COMPTOP_W<1> { - COMPTOP_W::new(self) + pub fn comptop(&mut self) -> ComptopW { + ComptopW::new(self, 1) } #[doc = "Bits 4:7 - Counter prescaler value."] #[inline(always)] #[must_use] - pub fn cntpresc(&mut self) -> CNTPRESC_W<4> { - CNTPRESC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cntpresc(&mut self) -> CntprescW { + CntprescW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/cmd.rs index 58d0453..304f1da 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/cmd.rs @@ -1,60 +1,35 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` writer - Start BURTC counter"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STOP` writer - Stop BURTC counter"] -pub type STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StopW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Start BURTC counter"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Stop BURTC counter"] #[inline(always)] #[must_use] - pub fn stop(&mut self) -> STOP_W<1> { - STOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stop(&mut self) -> StopW { + StopW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/cnt.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/cnt.rs index 6e69c3d..4064743 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/cnt.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/cnt.rs @@ -1,80 +1,40 @@ #[doc = "Register `CNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CNT` reader - Counter Value"] -pub type CNT_R = crate::FieldReader; +pub type CntR = crate::FieldReader; #[doc = "Field `CNT` writer - Counter Value"] -pub type CNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CNT_SPEC, u32, u32, 32, O>; +pub type CntW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Counter Value"] #[inline(always)] - pub fn cnt(&self) -> CNT_R { - CNT_R::new(self.bits) + pub fn cnt(&self) -> CntR { + CntR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Counter Value"] #[inline(always)] #[must_use] - pub fn cnt(&mut self) -> CNT_W<0> { - CNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cnt(&mut self) -> CntW { + CntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](index.html) module"] -pub struct CNT_SPEC; -impl crate::RegisterSpec for CNT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CntSpec; +impl crate::RegisterSpec for CntSpec { type Ux = u32; } -#[doc = "`read()` method returns [cnt::R](R) reader structure"] -impl crate::Readable for CNT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnt::W](W) writer structure"] -impl crate::Writable for CNT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cnt::R`](R) reader structure"] +impl crate::Readable for CntSpec {} +#[doc = "`write(|w| ..)` method takes [`cnt::W`](W) writer structure"] +impl crate::Writable for CntSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNT to value 0"] -impl crate::Resettable for CNT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CntSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/comp.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/comp.rs index 29e346c..b5a734a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/comp.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/comp.rs @@ -1,80 +1,40 @@ #[doc = "Register `COMP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `COMP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `COMP` reader - Compare Value"] -pub type COMP_R = crate::FieldReader; +pub type CompR = crate::FieldReader; #[doc = "Field `COMP` writer - Compare Value"] -pub type COMP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, COMP_SPEC, u32, u32, 32, O>; +pub type CompW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Compare Value"] #[inline(always)] - pub fn comp(&self) -> COMP_R { - COMP_R::new(self.bits) + pub fn comp(&self) -> CompR { + CompR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Compare Value"] #[inline(always)] #[must_use] - pub fn comp(&mut self) -> COMP_W<0> { - COMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn comp(&mut self) -> CompW { + CompW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [comp](index.html) module"] -pub struct COMP_SPEC; -impl crate::RegisterSpec for COMP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`comp::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`comp::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CompSpec; +impl crate::RegisterSpec for CompSpec { type Ux = u32; } -#[doc = "`read()` method returns [comp::R](R) reader structure"] -impl crate::Readable for COMP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [comp::W](W) writer structure"] -impl crate::Writable for COMP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`comp::R`](R) reader structure"] +impl crate::Readable for CompSpec {} +#[doc = "`write(|w| ..)` method takes [`comp::W`](W) writer structure"] +impl crate::Writable for CompSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets COMP to value 0"] -impl crate::Resettable for COMP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CompSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/em4wuen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/em4wuen.rs index ae7c93f..b4cd8b7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/em4wuen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/em4wuen.rs @@ -1,95 +1,55 @@ #[doc = "Register `EM4WUEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EM4WUEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OFEM4WUEN` reader - Overflow EM4 Wakeup Enable"] -pub type OFEM4WUEN_R = crate::BitReader; +pub type Ofem4wuenR = crate::BitReader; #[doc = "Field `OFEM4WUEN` writer - Overflow EM4 Wakeup Enable"] -pub type OFEM4WUEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EM4WUEN_SPEC, bool, O>; +pub type Ofem4wuenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COMPEM4WUEN` reader - Compare Match EM4 Wakeup Enable"] -pub type COMPEM4WUEN_R = crate::BitReader; +pub type Compem4wuenR = crate::BitReader; #[doc = "Field `COMPEM4WUEN` writer - Compare Match EM4 Wakeup Enable"] -pub type COMPEM4WUEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EM4WUEN_SPEC, bool, O>; +pub type Compem4wuenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow EM4 Wakeup Enable"] #[inline(always)] - pub fn ofem4wuen(&self) -> OFEM4WUEN_R { - OFEM4WUEN_R::new((self.bits & 1) != 0) + pub fn ofem4wuen(&self) -> Ofem4wuenR { + Ofem4wuenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Compare Match EM4 Wakeup Enable"] #[inline(always)] - pub fn compem4wuen(&self) -> COMPEM4WUEN_R { - COMPEM4WUEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn compem4wuen(&self) -> Compem4wuenR { + Compem4wuenR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow EM4 Wakeup Enable"] #[inline(always)] #[must_use] - pub fn ofem4wuen(&mut self) -> OFEM4WUEN_W<0> { - OFEM4WUEN_W::new(self) + pub fn ofem4wuen(&mut self) -> Ofem4wuenW { + Ofem4wuenW::new(self, 0) } #[doc = "Bit 1 - Compare Match EM4 Wakeup Enable"] #[inline(always)] #[must_use] - pub fn compem4wuen(&mut self) -> COMPEM4WUEN_W<1> { - COMPEM4WUEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn compem4wuen(&mut self) -> Compem4wuenW { + Compem4wuenW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [em4wuen](index.html) module"] -pub struct EM4WUEN_SPEC; -impl crate::RegisterSpec for EM4WUEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em4wuen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em4wuen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Em4wuenSpec; +impl crate::RegisterSpec for Em4wuenSpec { type Ux = u32; } -#[doc = "`read()` method returns [em4wuen::R](R) reader structure"] -impl crate::Readable for EM4WUEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [em4wuen::W](W) writer structure"] -impl crate::Writable for EM4WUEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`em4wuen::R`](R) reader structure"] +impl crate::Readable for Em4wuenSpec {} +#[doc = "`write(|w| ..)` method takes [`em4wuen::W`](W) writer structure"] +impl crate::Writable for Em4wuenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EM4WUEN to value 0"] -impl crate::Resettable for EM4WUEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Em4wuenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/en.rs index fe9f84e..f41b07e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - BURTC Enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - BURTC Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - BURTC Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - BURTC Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/ien.rs index dc608a5..1c66ad2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/ien.rs @@ -1,95 +1,55 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OF` reader - Overflow Interrupt Flag"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Flag"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COMP` reader - Compare Match Interrupt Flag"] -pub type COMP_R = crate::BitReader; +pub type CompR = crate::BitReader; #[doc = "Field `COMP` writer - Compare Match Interrupt Flag"] -pub type COMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type CompW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new((self.bits & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Compare Match Interrupt Flag"] #[inline(always)] - pub fn comp(&self) -> COMP_R { - COMP_R::new(((self.bits >> 1) & 1) != 0) + pub fn comp(&self) -> CompR { + CompR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<0> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 0) } #[doc = "Bit 1 - Compare Match Interrupt Flag"] #[inline(always)] #[must_use] - pub fn comp(&mut self) -> COMP_W<1> { - COMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn comp(&mut self) -> CompW { + CompW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/if_.rs index fc66fe0..8d09380 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/if_.rs @@ -1,95 +1,55 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OF` reader - Overflow Interrupt Flag"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Flag"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COMP` reader - Compare Match Interrupt Flag"] -pub type COMP_R = crate::BitReader; +pub type CompR = crate::BitReader; #[doc = "Field `COMP` writer - Compare Match Interrupt Flag"] -pub type COMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type CompW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new((self.bits & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Compare Match Interrupt Flag"] #[inline(always)] - pub fn comp(&self) -> COMP_R { - COMP_R::new(((self.bits >> 1) & 1) != 0) + pub fn comp(&self) -> CompR { + CompR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<0> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 0) } #[doc = "Bit 1 - Compare Match Interrupt Flag"] #[inline(always)] #[must_use] - pub fn comp(&mut self) -> COMP_W<1> { - COMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn comp(&mut self) -> CompW { + CompW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/ipversion.rs index fd8f758..0b161f8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/lock.rs index 2b14130..800a0b1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Configuration Lock Key\n\nValue on reset: 44776"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "44776: Write to unlock all BURTC lockable registers"] - UNLOCK = 44776, + Unlock = 44776, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Configuration Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unlock all BURTC lockable registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Configuration Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0xaee8"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0xaee8; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0xaee8; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/precnt.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/precnt.rs index 3a236cb..5d2d35d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/precnt.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/precnt.rs @@ -1,80 +1,40 @@ #[doc = "Register `PRECNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRECNT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRECNT` reader - Pre-Counter Value"] -pub type PRECNT_R = crate::FieldReader; +pub type PrecntR = crate::FieldReader; #[doc = "Field `PRECNT` writer - Pre-Counter Value"] -pub type PRECNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRECNT_SPEC, u16, u16, 15, O>; +pub type PrecntW<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; impl R { #[doc = "Bits 0:14 - Pre-Counter Value"] #[inline(always)] - pub fn precnt(&self) -> PRECNT_R { - PRECNT_R::new((self.bits & 0x7fff) as u16) + pub fn precnt(&self) -> PrecntR { + PrecntR::new((self.bits & 0x7fff) as u16) } } impl W { #[doc = "Bits 0:14 - Pre-Counter Value"] #[inline(always)] #[must_use] - pub fn precnt(&mut self) -> PRECNT_W<0> { - PRECNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn precnt(&mut self) -> PrecntW { + PrecntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [precnt](index.html) module"] -pub struct PRECNT_SPEC; -impl crate::RegisterSpec for PRECNT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`precnt::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`precnt::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PrecntSpec; +impl crate::RegisterSpec for PrecntSpec { type Ux = u32; } -#[doc = "`read()` method returns [precnt::R](R) reader structure"] -impl crate::Readable for PRECNT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [precnt::W](W) writer structure"] -impl crate::Writable for PRECNT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`precnt::R`](R) reader structure"] +impl crate::Readable for PrecntSpec {} +#[doc = "`write(|w| ..)` method takes [`precnt::W`](W) writer structure"] +impl crate::Writable for PrecntSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRECNT to value 0"] -impl crate::Resettable for PRECNT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PrecntSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/status.rs index 4c35171..5e2f78f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/status.rs @@ -1,78 +1,63 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RUNNING` reader - BURTC running status"] -pub type RUNNING_R = crate::BitReader; -#[doc = "Field `LOCK` reader - Configuration Lock Status"] -pub type LOCK_R = crate::BitReader; +pub type RunningR = crate::BitReader; #[doc = "Configuration Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCK_A { +pub enum Lock { #[doc = "0: All BURTC lockable registers are unlocked."] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: All BURTC lockable registers are locked."] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCK_A) -> Self { + fn from(variant: Lock) -> Self { variant as u8 != 0 } } -impl LOCK_R { +#[doc = "Field `LOCK` reader - Configuration Lock Status"] +pub type LockR = crate::BitReader; +impl LockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCK_A { + pub const fn variant(&self) -> Lock { match self.bits { - false => LOCK_A::UNLOCKED, - true => LOCK_A::LOCKED, + false => Lock::Unlocked, + true => Lock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "All BURTC lockable registers are unlocked."] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCK_A::UNLOCKED + *self == Lock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "All BURTC lockable registers are locked."] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCK_A::LOCKED + *self == Lock::Locked } } impl R { #[doc = "Bit 0 - BURTC running status"] #[inline(always)] - pub fn running(&self) -> RUNNING_R { - RUNNING_R::new((self.bits & 1) != 0) + pub fn running(&self) -> RunningR { + RunningR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Configuration Lock Status"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new(((self.bits >> 1) & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new(((self.bits >> 1) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/syncbusy.rs index fe430a9..ac4543c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_ns/syncbusy.rs @@ -1,65 +1,50 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `START` reader - Sync busy for START"] -pub type START_R = crate::BitReader; +pub type StartR = crate::BitReader; #[doc = "Field `STOP` reader - Sync busy for STOP"] -pub type STOP_R = crate::BitReader; +pub type StopR = crate::BitReader; #[doc = "Field `PRECNT` reader - Sync busy for PRECNT"] -pub type PRECNT_R = crate::BitReader; +pub type PrecntR = crate::BitReader; #[doc = "Field `CNT` reader - Sync busy for CNT"] -pub type CNT_R = crate::BitReader; +pub type CntR = crate::BitReader; #[doc = "Field `COMP` reader - Sync busy for COMP"] -pub type COMP_R = crate::BitReader; +pub type CompR = crate::BitReader; impl R { #[doc = "Bit 0 - Sync busy for START"] #[inline(always)] - pub fn start(&self) -> START_R { - START_R::new((self.bits & 1) != 0) + pub fn start(&self) -> StartR { + StartR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Sync busy for STOP"] #[inline(always)] - pub fn stop(&self) -> STOP_R { - STOP_R::new(((self.bits >> 1) & 1) != 0) + pub fn stop(&self) -> StopR { + StopR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Sync busy for PRECNT"] #[inline(always)] - pub fn precnt(&self) -> PRECNT_R { - PRECNT_R::new(((self.bits >> 2) & 1) != 0) + pub fn precnt(&self) -> PrecntR { + PrecntR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Sync busy for CNT"] #[inline(always)] - pub fn cnt(&self) -> CNT_R { - CNT_R::new(((self.bits >> 3) & 1) != 0) + pub fn cnt(&self) -> CntR { + CntR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Sync busy for COMP"] #[inline(always)] - pub fn comp(&self) -> COMP_R { - COMP_R::new(((self.bits >> 4) & 1) != 0) + pub fn comp(&self) -> CompR { + CompR::new(((self.bits >> 4) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s.rs index d750043..9f6372e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s.rs @@ -1,82 +1,162 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + cfg: Cfg, + cmd: Cmd, + status: Status, + if_: If, + ien: Ien, + precnt: Precnt, + cnt: Cnt, + em4wuen: Em4wuen, + syncbusy: Syncbusy, + lock: Lock, + comp: Comp, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x0c - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x10 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x14 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x18 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x1c - No Description"] - pub precnt: PRECNT, + #[inline(always)] + pub const fn precnt(&self) -> &Precnt { + &self.precnt + } #[doc = "0x20 - No Description"] - pub cnt: CNT, + #[inline(always)] + pub const fn cnt(&self) -> &Cnt { + &self.cnt + } #[doc = "0x24 - No Description"] - pub em4wuen: EM4WUEN, + #[inline(always)] + pub const fn em4wuen(&self) -> &Em4wuen { + &self.em4wuen + } #[doc = "0x28 - No Description"] - pub syncbusy: SYNCBUSY, + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } #[doc = "0x2c - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x30 - No Description"] - pub comp: COMP, + #[inline(always)] + pub const fn comp(&self) -> &Comp { + &self.comp + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "PRECNT (rw) register accessor: an alias for `Reg`"] -pub type PRECNT = crate::Reg; +#[doc = "PRECNT (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`precnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`precnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@precnt`] +module"] +#[doc(alias = "PRECNT")] +pub type Precnt = crate::Reg; #[doc = "No Description"] pub mod precnt; -#[doc = "CNT (rw) register accessor: an alias for `Reg`"] -pub type CNT = crate::Reg; +#[doc = "CNT (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnt`] +module"] +#[doc(alias = "CNT")] +pub type Cnt = crate::Reg; #[doc = "No Description"] pub mod cnt; -#[doc = "EM4WUEN (rw) register accessor: an alias for `Reg`"] -pub type EM4WUEN = crate::Reg; +#[doc = "EM4WUEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em4wuen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em4wuen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@em4wuen`] +module"] +#[doc(alias = "EM4WUEN")] +pub type Em4wuen = crate::Reg; #[doc = "No Description"] pub mod em4wuen; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "No Description"] pub mod syncbusy; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "COMP (rw) register accessor: an alias for `Reg`"] -pub type COMP = crate::Reg; +#[doc = "COMP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`comp::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`comp::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@comp`] +module"] +#[doc(alias = "COMP")] +pub type Comp = crate::Reg; #[doc = "No Description"] pub mod comp; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/cfg.rs index 5d27dbb..dcc39ca 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/cfg.rs @@ -1,433 +1,406 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] -pub type DEBUGRUN_R = crate::BitReader; +pub type W = crate::W; #[doc = "Debug Mode Run Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DEBUGRUN_A { +pub enum Debugrun { #[doc = "0: BURTC is frozen in debug mode"] X0 = 0, #[doc = "1: BURTC is running in debug mode"] X1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DEBUGRUN_A) -> Self { + fn from(variant: Debugrun) -> Self { variant as u8 != 0 } } -impl DEBUGRUN_R { +#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] +pub type DebugrunR = crate::BitReader; +impl DebugrunR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DEBUGRUN_A { + pub const fn variant(&self) -> Debugrun { match self.bits { - false => DEBUGRUN_A::X0, - true => DEBUGRUN_A::X1, + false => Debugrun::X0, + true => Debugrun::X1, } } - #[doc = "Checks if the value of the field is `X0`"] + #[doc = "BURTC is frozen in debug mode"] #[inline(always)] pub fn is_x0(&self) -> bool { - *self == DEBUGRUN_A::X0 + *self == Debugrun::X0 } - #[doc = "Checks if the value of the field is `X1`"] + #[doc = "BURTC is running in debug mode"] #[inline(always)] pub fn is_x1(&self) -> bool { - *self == DEBUGRUN_A::X1 + *self == Debugrun::X1 } } #[doc = "Field `DEBUGRUN` writer - Debug Mode Run Enable"] -pub type DEBUGRUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DEBUGRUN_A, O>; -impl<'a, const O: u8> DEBUGRUN_W<'a, O> { +pub type DebugrunW<'a, REG> = crate::BitWriter<'a, REG, Debugrun>; +impl<'a, REG> DebugrunW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "BURTC is frozen in debug mode"] #[inline(always)] - pub fn x0(self) -> &'a mut W { - self.variant(DEBUGRUN_A::X0) + pub fn x0(self) -> &'a mut crate::W { + self.variant(Debugrun::X0) } #[doc = "BURTC is running in debug mode"] #[inline(always)] - pub fn x1(self) -> &'a mut W { - self.variant(DEBUGRUN_A::X1) + pub fn x1(self) -> &'a mut crate::W { + self.variant(Debugrun::X1) } } -#[doc = "Field `COMPTOP` reader - Compare Channel is Top Value"] -pub type COMPTOP_R = crate::BitReader; #[doc = "Compare Channel is Top Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum COMPTOP_A { +pub enum Comptop { #[doc = "0: The top value of the BURTC is 4294967295 (0xFFFFFFFF)"] - DISABLE = 0, + Disable = 0, #[doc = "1: The top value of the BURTC is given by COMP"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: COMPTOP_A) -> Self { + fn from(variant: Comptop) -> Self { variant as u8 != 0 } } -impl COMPTOP_R { +#[doc = "Field `COMPTOP` reader - Compare Channel is Top Value"] +pub type ComptopR = crate::BitReader; +impl ComptopR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COMPTOP_A { + pub const fn variant(&self) -> Comptop { match self.bits { - false => COMPTOP_A::DISABLE, - true => COMPTOP_A::ENABLE, + false => Comptop::Disable, + true => Comptop::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The top value of the BURTC is 4294967295 (0xFFFFFFFF)"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == COMPTOP_A::DISABLE + *self == Comptop::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The top value of the BURTC is given by COMP"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == COMPTOP_A::ENABLE + *self == Comptop::Enable } } #[doc = "Field `COMPTOP` writer - Compare Channel is Top Value"] -pub type COMPTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, COMPTOP_A, O>; -impl<'a, const O: u8> COMPTOP_W<'a, O> { +pub type ComptopW<'a, REG> = crate::BitWriter<'a, REG, Comptop>; +impl<'a, REG> ComptopW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The top value of the BURTC is 4294967295 (0xFFFFFFFF)"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(COMPTOP_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Comptop::Disable) } #[doc = "The top value of the BURTC is given by COMP"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(COMPTOP_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Comptop::Enable) } } -#[doc = "Field `CNTPRESC` reader - Counter prescaler value."] -pub type CNTPRESC_R = crate::FieldReader; #[doc = "Counter prescaler value.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CNTPRESC_A { +pub enum Cntpresc { #[doc = "0: CLK_CNT = (BURTC LF CLK)/1"] - DIV1 = 0, + Div1 = 0, #[doc = "1: CLK_CNT = (BURTC LF CLK)/2"] - DIV2 = 1, + Div2 = 1, #[doc = "2: CLK_CNT = (BURTC LF CLK)/4"] - DIV4 = 2, + Div4 = 2, #[doc = "3: CLK_CNT = (BURTC LF CLK)/8"] - DIV8 = 3, + Div8 = 3, #[doc = "4: CLK_CNT = (BURTC LF CLK)/16"] - DIV16 = 4, + Div16 = 4, #[doc = "5: CLK_CNT = (BURTC LF CLK)/32"] - DIV32 = 5, + Div32 = 5, #[doc = "6: CLK_CNT = (BURTC LF CLK)/64"] - DIV64 = 6, + Div64 = 6, #[doc = "7: CLK_CNT = (BURTC LF CLK)/128"] - DIV128 = 7, + Div128 = 7, #[doc = "8: CLK_CNT = (BURTC LF CLK)/256"] - DIV256 = 8, + Div256 = 8, #[doc = "9: CLK_CNT = (BURTC LF CLK)/512"] - DIV512 = 9, + Div512 = 9, #[doc = "10: CLK_CNT = (BURTC LF CLK)/1024"] - DIV1024 = 10, + Div1024 = 10, #[doc = "11: CLK_CNT = (BURTC LF CLK)/2048"] - DIV2048 = 11, + Div2048 = 11, #[doc = "12: CLK_CNT = (BURTC LF CLK)/4096"] - DIV4096 = 12, + Div4096 = 12, #[doc = "13: CLK_CNT = (BURTC LF CLK)/8192"] - DIV8192 = 13, + Div8192 = 13, #[doc = "14: CLK_CNT = (BURTC LF CLK)/16384"] - DIV16384 = 14, + Div16384 = 14, #[doc = "15: CLK_CNT = (BURTC LF CLK)/32768"] - DIV32768 = 15, + Div32768 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CNTPRESC_A) -> Self { + fn from(variant: Cntpresc) -> Self { variant as _ } } -impl CNTPRESC_R { +impl crate::FieldSpec for Cntpresc { + type Ux = u8; +} +impl crate::IsEnum for Cntpresc {} +#[doc = "Field `CNTPRESC` reader - Counter prescaler value."] +pub type CntprescR = crate::FieldReader; +impl CntprescR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CNTPRESC_A { + pub const fn variant(&self) -> Cntpresc { match self.bits { - 0 => CNTPRESC_A::DIV1, - 1 => CNTPRESC_A::DIV2, - 2 => CNTPRESC_A::DIV4, - 3 => CNTPRESC_A::DIV8, - 4 => CNTPRESC_A::DIV16, - 5 => CNTPRESC_A::DIV32, - 6 => CNTPRESC_A::DIV64, - 7 => CNTPRESC_A::DIV128, - 8 => CNTPRESC_A::DIV256, - 9 => CNTPRESC_A::DIV512, - 10 => CNTPRESC_A::DIV1024, - 11 => CNTPRESC_A::DIV2048, - 12 => CNTPRESC_A::DIV4096, - 13 => CNTPRESC_A::DIV8192, - 14 => CNTPRESC_A::DIV16384, - 15 => CNTPRESC_A::DIV32768, + 0 => Cntpresc::Div1, + 1 => Cntpresc::Div2, + 2 => Cntpresc::Div4, + 3 => Cntpresc::Div8, + 4 => Cntpresc::Div16, + 5 => Cntpresc::Div32, + 6 => Cntpresc::Div64, + 7 => Cntpresc::Div128, + 8 => Cntpresc::Div256, + 9 => Cntpresc::Div512, + 10 => Cntpresc::Div1024, + 11 => Cntpresc::Div2048, + 12 => Cntpresc::Div4096, + 13 => Cntpresc::Div8192, + 14 => Cntpresc::Div16384, + 15 => Cntpresc::Div32768, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/1"] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == CNTPRESC_A::DIV1 + *self == Cntpresc::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/2"] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == CNTPRESC_A::DIV2 + *self == Cntpresc::Div2 } - #[doc = "Checks if the value of the field is `DIV4`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/4"] #[inline(always)] pub fn is_div4(&self) -> bool { - *self == CNTPRESC_A::DIV4 + *self == Cntpresc::Div4 } - #[doc = "Checks if the value of the field is `DIV8`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/8"] #[inline(always)] pub fn is_div8(&self) -> bool { - *self == CNTPRESC_A::DIV8 + *self == Cntpresc::Div8 } - #[doc = "Checks if the value of the field is `DIV16`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/16"] #[inline(always)] pub fn is_div16(&self) -> bool { - *self == CNTPRESC_A::DIV16 + *self == Cntpresc::Div16 } - #[doc = "Checks if the value of the field is `DIV32`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/32"] #[inline(always)] pub fn is_div32(&self) -> bool { - *self == CNTPRESC_A::DIV32 + *self == Cntpresc::Div32 } - #[doc = "Checks if the value of the field is `DIV64`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/64"] #[inline(always)] pub fn is_div64(&self) -> bool { - *self == CNTPRESC_A::DIV64 + *self == Cntpresc::Div64 } - #[doc = "Checks if the value of the field is `DIV128`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/128"] #[inline(always)] pub fn is_div128(&self) -> bool { - *self == CNTPRESC_A::DIV128 + *self == Cntpresc::Div128 } - #[doc = "Checks if the value of the field is `DIV256`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/256"] #[inline(always)] pub fn is_div256(&self) -> bool { - *self == CNTPRESC_A::DIV256 + *self == Cntpresc::Div256 } - #[doc = "Checks if the value of the field is `DIV512`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/512"] #[inline(always)] pub fn is_div512(&self) -> bool { - *self == CNTPRESC_A::DIV512 + *self == Cntpresc::Div512 } - #[doc = "Checks if the value of the field is `DIV1024`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/1024"] #[inline(always)] pub fn is_div1024(&self) -> bool { - *self == CNTPRESC_A::DIV1024 + *self == Cntpresc::Div1024 } - #[doc = "Checks if the value of the field is `DIV2048`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/2048"] #[inline(always)] pub fn is_div2048(&self) -> bool { - *self == CNTPRESC_A::DIV2048 + *self == Cntpresc::Div2048 } - #[doc = "Checks if the value of the field is `DIV4096`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/4096"] #[inline(always)] pub fn is_div4096(&self) -> bool { - *self == CNTPRESC_A::DIV4096 + *self == Cntpresc::Div4096 } - #[doc = "Checks if the value of the field is `DIV8192`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/8192"] #[inline(always)] pub fn is_div8192(&self) -> bool { - *self == CNTPRESC_A::DIV8192 + *self == Cntpresc::Div8192 } - #[doc = "Checks if the value of the field is `DIV16384`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/16384"] #[inline(always)] pub fn is_div16384(&self) -> bool { - *self == CNTPRESC_A::DIV16384 + *self == Cntpresc::Div16384 } - #[doc = "Checks if the value of the field is `DIV32768`"] + #[doc = "CLK_CNT = (BURTC LF CLK)/32768"] #[inline(always)] pub fn is_div32768(&self) -> bool { - *self == CNTPRESC_A::DIV32768 + *self == Cntpresc::Div32768 } } #[doc = "Field `CNTPRESC` writer - Counter prescaler value."] -pub type CNTPRESC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, CNTPRESC_A, 4, O>; -impl<'a, const O: u8> CNTPRESC_W<'a, O> { +pub type CntprescW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cntpresc, crate::Safe>; +impl<'a, REG> CntprescW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "CLK_CNT = (BURTC LF CLK)/1"] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div1) } #[doc = "CLK_CNT = (BURTC LF CLK)/2"] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div2) } #[doc = "CLK_CNT = (BURTC LF CLK)/4"] #[inline(always)] - pub fn div4(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV4) + pub fn div4(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div4) } #[doc = "CLK_CNT = (BURTC LF CLK)/8"] #[inline(always)] - pub fn div8(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV8) + pub fn div8(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div8) } #[doc = "CLK_CNT = (BURTC LF CLK)/16"] #[inline(always)] - pub fn div16(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV16) + pub fn div16(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div16) } #[doc = "CLK_CNT = (BURTC LF CLK)/32"] #[inline(always)] - pub fn div32(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV32) + pub fn div32(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div32) } #[doc = "CLK_CNT = (BURTC LF CLK)/64"] #[inline(always)] - pub fn div64(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV64) + pub fn div64(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div64) } #[doc = "CLK_CNT = (BURTC LF CLK)/128"] #[inline(always)] - pub fn div128(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV128) + pub fn div128(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div128) } #[doc = "CLK_CNT = (BURTC LF CLK)/256"] #[inline(always)] - pub fn div256(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV256) + pub fn div256(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div256) } #[doc = "CLK_CNT = (BURTC LF CLK)/512"] #[inline(always)] - pub fn div512(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV512) + pub fn div512(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div512) } #[doc = "CLK_CNT = (BURTC LF CLK)/1024"] #[inline(always)] - pub fn div1024(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV1024) + pub fn div1024(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div1024) } #[doc = "CLK_CNT = (BURTC LF CLK)/2048"] #[inline(always)] - pub fn div2048(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV2048) + pub fn div2048(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div2048) } #[doc = "CLK_CNT = (BURTC LF CLK)/4096"] #[inline(always)] - pub fn div4096(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV4096) + pub fn div4096(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div4096) } #[doc = "CLK_CNT = (BURTC LF CLK)/8192"] #[inline(always)] - pub fn div8192(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV8192) + pub fn div8192(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div8192) } #[doc = "CLK_CNT = (BURTC LF CLK)/16384"] #[inline(always)] - pub fn div16384(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV16384) + pub fn div16384(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div16384) } #[doc = "CLK_CNT = (BURTC LF CLK)/32768"] #[inline(always)] - pub fn div32768(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV32768) + pub fn div32768(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div32768) } } impl R { #[doc = "Bit 0 - Debug Mode Run Enable"] #[inline(always)] - pub fn debugrun(&self) -> DEBUGRUN_R { - DEBUGRUN_R::new((self.bits & 1) != 0) + pub fn debugrun(&self) -> DebugrunR { + DebugrunR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Compare Channel is Top Value"] #[inline(always)] - pub fn comptop(&self) -> COMPTOP_R { - COMPTOP_R::new(((self.bits >> 1) & 1) != 0) + pub fn comptop(&self) -> ComptopR { + ComptopR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 4:7 - Counter prescaler value."] #[inline(always)] - pub fn cntpresc(&self) -> CNTPRESC_R { - CNTPRESC_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn cntpresc(&self) -> CntprescR { + CntprescR::new(((self.bits >> 4) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - Debug Mode Run Enable"] #[inline(always)] #[must_use] - pub fn debugrun(&mut self) -> DEBUGRUN_W<0> { - DEBUGRUN_W::new(self) + pub fn debugrun(&mut self) -> DebugrunW { + DebugrunW::new(self, 0) } #[doc = "Bit 1 - Compare Channel is Top Value"] #[inline(always)] #[must_use] - pub fn comptop(&mut self) -> COMPTOP_W<1> { - COMPTOP_W::new(self) + pub fn comptop(&mut self) -> ComptopW { + ComptopW::new(self, 1) } #[doc = "Bits 4:7 - Counter prescaler value."] #[inline(always)] #[must_use] - pub fn cntpresc(&mut self) -> CNTPRESC_W<4> { - CNTPRESC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cntpresc(&mut self) -> CntprescW { + CntprescW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/cmd.rs index 58d0453..304f1da 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/cmd.rs @@ -1,60 +1,35 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` writer - Start BURTC counter"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STOP` writer - Stop BURTC counter"] -pub type STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StopW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Start BURTC counter"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Stop BURTC counter"] #[inline(always)] #[must_use] - pub fn stop(&mut self) -> STOP_W<1> { - STOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stop(&mut self) -> StopW { + StopW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/cnt.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/cnt.rs index 6e69c3d..4064743 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/cnt.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/cnt.rs @@ -1,80 +1,40 @@ #[doc = "Register `CNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CNT` reader - Counter Value"] -pub type CNT_R = crate::FieldReader; +pub type CntR = crate::FieldReader; #[doc = "Field `CNT` writer - Counter Value"] -pub type CNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CNT_SPEC, u32, u32, 32, O>; +pub type CntW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Counter Value"] #[inline(always)] - pub fn cnt(&self) -> CNT_R { - CNT_R::new(self.bits) + pub fn cnt(&self) -> CntR { + CntR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Counter Value"] #[inline(always)] #[must_use] - pub fn cnt(&mut self) -> CNT_W<0> { - CNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cnt(&mut self) -> CntW { + CntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](index.html) module"] -pub struct CNT_SPEC; -impl crate::RegisterSpec for CNT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CntSpec; +impl crate::RegisterSpec for CntSpec { type Ux = u32; } -#[doc = "`read()` method returns [cnt::R](R) reader structure"] -impl crate::Readable for CNT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnt::W](W) writer structure"] -impl crate::Writable for CNT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cnt::R`](R) reader structure"] +impl crate::Readable for CntSpec {} +#[doc = "`write(|w| ..)` method takes [`cnt::W`](W) writer structure"] +impl crate::Writable for CntSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNT to value 0"] -impl crate::Resettable for CNT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CntSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/comp.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/comp.rs index 29e346c..b5a734a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/comp.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/comp.rs @@ -1,80 +1,40 @@ #[doc = "Register `COMP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `COMP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `COMP` reader - Compare Value"] -pub type COMP_R = crate::FieldReader; +pub type CompR = crate::FieldReader; #[doc = "Field `COMP` writer - Compare Value"] -pub type COMP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, COMP_SPEC, u32, u32, 32, O>; +pub type CompW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Compare Value"] #[inline(always)] - pub fn comp(&self) -> COMP_R { - COMP_R::new(self.bits) + pub fn comp(&self) -> CompR { + CompR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Compare Value"] #[inline(always)] #[must_use] - pub fn comp(&mut self) -> COMP_W<0> { - COMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn comp(&mut self) -> CompW { + CompW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [comp](index.html) module"] -pub struct COMP_SPEC; -impl crate::RegisterSpec for COMP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`comp::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`comp::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CompSpec; +impl crate::RegisterSpec for CompSpec { type Ux = u32; } -#[doc = "`read()` method returns [comp::R](R) reader structure"] -impl crate::Readable for COMP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [comp::W](W) writer structure"] -impl crate::Writable for COMP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`comp::R`](R) reader structure"] +impl crate::Readable for CompSpec {} +#[doc = "`write(|w| ..)` method takes [`comp::W`](W) writer structure"] +impl crate::Writable for CompSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets COMP to value 0"] -impl crate::Resettable for COMP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CompSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/em4wuen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/em4wuen.rs index ae7c93f..b4cd8b7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/em4wuen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/em4wuen.rs @@ -1,95 +1,55 @@ #[doc = "Register `EM4WUEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EM4WUEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OFEM4WUEN` reader - Overflow EM4 Wakeup Enable"] -pub type OFEM4WUEN_R = crate::BitReader; +pub type Ofem4wuenR = crate::BitReader; #[doc = "Field `OFEM4WUEN` writer - Overflow EM4 Wakeup Enable"] -pub type OFEM4WUEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EM4WUEN_SPEC, bool, O>; +pub type Ofem4wuenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COMPEM4WUEN` reader - Compare Match EM4 Wakeup Enable"] -pub type COMPEM4WUEN_R = crate::BitReader; +pub type Compem4wuenR = crate::BitReader; #[doc = "Field `COMPEM4WUEN` writer - Compare Match EM4 Wakeup Enable"] -pub type COMPEM4WUEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EM4WUEN_SPEC, bool, O>; +pub type Compem4wuenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow EM4 Wakeup Enable"] #[inline(always)] - pub fn ofem4wuen(&self) -> OFEM4WUEN_R { - OFEM4WUEN_R::new((self.bits & 1) != 0) + pub fn ofem4wuen(&self) -> Ofem4wuenR { + Ofem4wuenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Compare Match EM4 Wakeup Enable"] #[inline(always)] - pub fn compem4wuen(&self) -> COMPEM4WUEN_R { - COMPEM4WUEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn compem4wuen(&self) -> Compem4wuenR { + Compem4wuenR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow EM4 Wakeup Enable"] #[inline(always)] #[must_use] - pub fn ofem4wuen(&mut self) -> OFEM4WUEN_W<0> { - OFEM4WUEN_W::new(self) + pub fn ofem4wuen(&mut self) -> Ofem4wuenW { + Ofem4wuenW::new(self, 0) } #[doc = "Bit 1 - Compare Match EM4 Wakeup Enable"] #[inline(always)] #[must_use] - pub fn compem4wuen(&mut self) -> COMPEM4WUEN_W<1> { - COMPEM4WUEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn compem4wuen(&mut self) -> Compem4wuenW { + Compem4wuenW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [em4wuen](index.html) module"] -pub struct EM4WUEN_SPEC; -impl crate::RegisterSpec for EM4WUEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em4wuen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em4wuen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Em4wuenSpec; +impl crate::RegisterSpec for Em4wuenSpec { type Ux = u32; } -#[doc = "`read()` method returns [em4wuen::R](R) reader structure"] -impl crate::Readable for EM4WUEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [em4wuen::W](W) writer structure"] -impl crate::Writable for EM4WUEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`em4wuen::R`](R) reader structure"] +impl crate::Readable for Em4wuenSpec {} +#[doc = "`write(|w| ..)` method takes [`em4wuen::W`](W) writer structure"] +impl crate::Writable for Em4wuenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EM4WUEN to value 0"] -impl crate::Resettable for EM4WUEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Em4wuenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/en.rs index fe9f84e..f41b07e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - BURTC Enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - BURTC Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - BURTC Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - BURTC Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/ien.rs index dc608a5..1c66ad2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/ien.rs @@ -1,95 +1,55 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OF` reader - Overflow Interrupt Flag"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Flag"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COMP` reader - Compare Match Interrupt Flag"] -pub type COMP_R = crate::BitReader; +pub type CompR = crate::BitReader; #[doc = "Field `COMP` writer - Compare Match Interrupt Flag"] -pub type COMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type CompW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new((self.bits & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Compare Match Interrupt Flag"] #[inline(always)] - pub fn comp(&self) -> COMP_R { - COMP_R::new(((self.bits >> 1) & 1) != 0) + pub fn comp(&self) -> CompR { + CompR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<0> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 0) } #[doc = "Bit 1 - Compare Match Interrupt Flag"] #[inline(always)] #[must_use] - pub fn comp(&mut self) -> COMP_W<1> { - COMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn comp(&mut self) -> CompW { + CompW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/if_.rs index fc66fe0..8d09380 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/if_.rs @@ -1,95 +1,55 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OF` reader - Overflow Interrupt Flag"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Flag"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COMP` reader - Compare Match Interrupt Flag"] -pub type COMP_R = crate::BitReader; +pub type CompR = crate::BitReader; #[doc = "Field `COMP` writer - Compare Match Interrupt Flag"] -pub type COMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type CompW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new((self.bits & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Compare Match Interrupt Flag"] #[inline(always)] - pub fn comp(&self) -> COMP_R { - COMP_R::new(((self.bits >> 1) & 1) != 0) + pub fn comp(&self) -> CompR { + CompR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<0> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 0) } #[doc = "Bit 1 - Compare Match Interrupt Flag"] #[inline(always)] #[must_use] - pub fn comp(&mut self) -> COMP_W<1> { - COMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn comp(&mut self) -> CompW { + CompW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/ipversion.rs index fd8f758..0b161f8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/lock.rs index 2b14130..800a0b1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Configuration Lock Key\n\nValue on reset: 44776"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "44776: Write to unlock all BURTC lockable registers"] - UNLOCK = 44776, + Unlock = 44776, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Configuration Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unlock all BURTC lockable registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Configuration Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0xaee8"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0xaee8; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0xaee8; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/precnt.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/precnt.rs index 3a236cb..5d2d35d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/precnt.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/precnt.rs @@ -1,80 +1,40 @@ #[doc = "Register `PRECNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRECNT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRECNT` reader - Pre-Counter Value"] -pub type PRECNT_R = crate::FieldReader; +pub type PrecntR = crate::FieldReader; #[doc = "Field `PRECNT` writer - Pre-Counter Value"] -pub type PRECNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRECNT_SPEC, u16, u16, 15, O>; +pub type PrecntW<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; impl R { #[doc = "Bits 0:14 - Pre-Counter Value"] #[inline(always)] - pub fn precnt(&self) -> PRECNT_R { - PRECNT_R::new((self.bits & 0x7fff) as u16) + pub fn precnt(&self) -> PrecntR { + PrecntR::new((self.bits & 0x7fff) as u16) } } impl W { #[doc = "Bits 0:14 - Pre-Counter Value"] #[inline(always)] #[must_use] - pub fn precnt(&mut self) -> PRECNT_W<0> { - PRECNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn precnt(&mut self) -> PrecntW { + PrecntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [precnt](index.html) module"] -pub struct PRECNT_SPEC; -impl crate::RegisterSpec for PRECNT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`precnt::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`precnt::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PrecntSpec; +impl crate::RegisterSpec for PrecntSpec { type Ux = u32; } -#[doc = "`read()` method returns [precnt::R](R) reader structure"] -impl crate::Readable for PRECNT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [precnt::W](W) writer structure"] -impl crate::Writable for PRECNT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`precnt::R`](R) reader structure"] +impl crate::Readable for PrecntSpec {} +#[doc = "`write(|w| ..)` method takes [`precnt::W`](W) writer structure"] +impl crate::Writable for PrecntSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRECNT to value 0"] -impl crate::Resettable for PRECNT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PrecntSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/status.rs index 4c35171..5e2f78f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/status.rs @@ -1,78 +1,63 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RUNNING` reader - BURTC running status"] -pub type RUNNING_R = crate::BitReader; -#[doc = "Field `LOCK` reader - Configuration Lock Status"] -pub type LOCK_R = crate::BitReader; +pub type RunningR = crate::BitReader; #[doc = "Configuration Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCK_A { +pub enum Lock { #[doc = "0: All BURTC lockable registers are unlocked."] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: All BURTC lockable registers are locked."] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCK_A) -> Self { + fn from(variant: Lock) -> Self { variant as u8 != 0 } } -impl LOCK_R { +#[doc = "Field `LOCK` reader - Configuration Lock Status"] +pub type LockR = crate::BitReader; +impl LockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCK_A { + pub const fn variant(&self) -> Lock { match self.bits { - false => LOCK_A::UNLOCKED, - true => LOCK_A::LOCKED, + false => Lock::Unlocked, + true => Lock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "All BURTC lockable registers are unlocked."] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCK_A::UNLOCKED + *self == Lock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "All BURTC lockable registers are locked."] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCK_A::LOCKED + *self == Lock::Locked } } impl R { #[doc = "Bit 0 - BURTC running status"] #[inline(always)] - pub fn running(&self) -> RUNNING_R { - RUNNING_R::new((self.bits & 1) != 0) + pub fn running(&self) -> RunningR { + RunningR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Configuration Lock Status"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new(((self.bits >> 1) & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new(((self.bits >> 1) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/syncbusy.rs index fe430a9..ac4543c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/burtc_s/syncbusy.rs @@ -1,65 +1,50 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `START` reader - Sync busy for START"] -pub type START_R = crate::BitReader; +pub type StartR = crate::BitReader; #[doc = "Field `STOP` reader - Sync busy for STOP"] -pub type STOP_R = crate::BitReader; +pub type StopR = crate::BitReader; #[doc = "Field `PRECNT` reader - Sync busy for PRECNT"] -pub type PRECNT_R = crate::BitReader; +pub type PrecntR = crate::BitReader; #[doc = "Field `CNT` reader - Sync busy for CNT"] -pub type CNT_R = crate::BitReader; +pub type CntR = crate::BitReader; #[doc = "Field `COMP` reader - Sync busy for COMP"] -pub type COMP_R = crate::BitReader; +pub type CompR = crate::BitReader; impl R { #[doc = "Bit 0 - Sync busy for START"] #[inline(always)] - pub fn start(&self) -> START_R { - START_R::new((self.bits & 1) != 0) + pub fn start(&self) -> StartR { + StartR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Sync busy for STOP"] #[inline(always)] - pub fn stop(&self) -> STOP_R { - STOP_R::new(((self.bits >> 1) & 1) != 0) + pub fn stop(&self) -> StopR { + StopR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Sync busy for PRECNT"] #[inline(always)] - pub fn precnt(&self) -> PRECNT_R { - PRECNT_R::new(((self.bits >> 2) & 1) != 0) + pub fn precnt(&self) -> PrecntR { + PrecntR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Sync busy for CNT"] #[inline(always)] - pub fn cnt(&self) -> CNT_R { - CNT_R::new(((self.bits >> 3) & 1) != 0) + pub fn cnt(&self) -> CntR { + CntR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Sync busy for COMP"] #[inline(always)] - pub fn comp(&self) -> COMP_R { - COMP_R::new(((self.bits >> 4) & 1) != 0) + pub fn comp(&self) -> CompR { + CompR::new(((self.bits >> 4) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns.rs index 17330eb..e505a3f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns.rs @@ -1,194 +1,364 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + ipversion: Ipversion, _reserved1: [u8; 0x04], - #[doc = "0x08 - No Description"] - pub status: STATUS, + status: Status, _reserved2: [u8; 0x04], + lock: Lock, + wdoglock: Wdoglock, + _reserved4: [u8; 0x08], + if_: If, + ien: Ien, + _reserved6: [u8; 0x28], + calcmd: Calcmd, + calctrl: Calctrl, + calcnt: Calcnt, + _reserved9: [u8; 0x08], + clken0: Clken0, + clken1: Clken1, + _reserved11: [u8; 0x04], + sysclkctrl: Sysclkctrl, + _reserved12: [u8; 0x0c], + traceclkctrl: Traceclkctrl, + _reserved13: [u8; 0x0c], + exportclkctrl: Exportclkctrl, + _reserved14: [u8; 0x6c], + dpllrefclkctrl: Dpllrefclkctrl, + _reserved15: [u8; 0x1c], + em01grpaclkctrl: Em01grpaclkctrl, + _reserved16: [u8; 0x04], + em01grpcclkctrl: Em01grpcclkctrl, + _reserved17: [u8; 0x14], + em23grpaclkctrl: Em23grpaclkctrl, + _reserved18: [u8; 0x1c], + em4grpaclkctrl: Em4grpaclkctrl, + _reserved19: [u8; 0x1c], + iadcclkctrl: Iadcclkctrl, + _reserved20: [u8; 0x7c], + wdog0clkctrl: Wdog0clkctrl, + _reserved21: [u8; 0x04], + wdog1clkctrl: Wdog1clkctrl, + _reserved22: [u8; 0x14], + eusart0clkctrl: Eusart0clkctrl, + _reserved23: [u8; 0x1c], + sysrtc0clkctrl: Sysrtc0clkctrl, + _reserved24: [u8; 0x0c], + lcdclkctrl: Lcdclkctrl, + _reserved25: [u8; 0x0c], + vdac0clkctrl: Vdac0clkctrl, + _reserved26: [u8; 0x0c], + pcnt0clkctrl: Pcnt0clkctrl, + _reserved27: [u8; 0x1c], + lesensehfclkctrl: Lesensehfclkctrl, +} +impl RegisterBlock { + #[doc = "0x00 - No Description"] + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } + #[doc = "0x08 - No Description"] + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x10 - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x14 - No Description"] - pub wdoglock: WDOGLOCK, - _reserved4: [u8; 0x08], + #[inline(always)] + pub const fn wdoglock(&self) -> &Wdoglock { + &self.wdoglock + } #[doc = "0x20 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x24 - No Description"] - pub ien: IEN, - _reserved6: [u8; 0x28], + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x50 - No Description"] - pub calcmd: CALCMD, + #[inline(always)] + pub const fn calcmd(&self) -> &Calcmd { + &self.calcmd + } #[doc = "0x54 - No Description"] - pub calctrl: CALCTRL, + #[inline(always)] + pub const fn calctrl(&self) -> &Calctrl { + &self.calctrl + } #[doc = "0x58 - No Description"] - pub calcnt: CALCNT, - _reserved9: [u8; 0x08], + #[inline(always)] + pub const fn calcnt(&self) -> &Calcnt { + &self.calcnt + } #[doc = "0x64 - No Description"] - pub clken0: CLKEN0, + #[inline(always)] + pub const fn clken0(&self) -> &Clken0 { + &self.clken0 + } #[doc = "0x68 - No Description"] - pub clken1: CLKEN1, - _reserved11: [u8; 0x04], + #[inline(always)] + pub const fn clken1(&self) -> &Clken1 { + &self.clken1 + } #[doc = "0x70 - No Description"] - pub sysclkctrl: SYSCLKCTRL, - _reserved12: [u8; 0x0c], + #[inline(always)] + pub const fn sysclkctrl(&self) -> &Sysclkctrl { + &self.sysclkctrl + } #[doc = "0x80 - No Description"] - pub traceclkctrl: TRACECLKCTRL, - _reserved13: [u8; 0x0c], + #[inline(always)] + pub const fn traceclkctrl(&self) -> &Traceclkctrl { + &self.traceclkctrl + } #[doc = "0x90 - No Description"] - pub exportclkctrl: EXPORTCLKCTRL, - _reserved14: [u8; 0x6c], + #[inline(always)] + pub const fn exportclkctrl(&self) -> &Exportclkctrl { + &self.exportclkctrl + } #[doc = "0x100 - No Description"] - pub dpllrefclkctrl: DPLLREFCLKCTRL, - _reserved15: [u8; 0x1c], + #[inline(always)] + pub const fn dpllrefclkctrl(&self) -> &Dpllrefclkctrl { + &self.dpllrefclkctrl + } #[doc = "0x120 - No Description"] - pub em01grpaclkctrl: EM01GRPACLKCTRL, - _reserved16: [u8; 0x04], + #[inline(always)] + pub const fn em01grpaclkctrl(&self) -> &Em01grpaclkctrl { + &self.em01grpaclkctrl + } #[doc = "0x128 - No Description"] - pub em01grpcclkctrl: EM01GRPCCLKCTRL, - _reserved17: [u8; 0x14], + #[inline(always)] + pub const fn em01grpcclkctrl(&self) -> &Em01grpcclkctrl { + &self.em01grpcclkctrl + } #[doc = "0x140 - No Description"] - pub em23grpaclkctrl: EM23GRPACLKCTRL, - _reserved18: [u8; 0x1c], + #[inline(always)] + pub const fn em23grpaclkctrl(&self) -> &Em23grpaclkctrl { + &self.em23grpaclkctrl + } #[doc = "0x160 - No Description"] - pub em4grpaclkctrl: EM4GRPACLKCTRL, - _reserved19: [u8; 0x1c], + #[inline(always)] + pub const fn em4grpaclkctrl(&self) -> &Em4grpaclkctrl { + &self.em4grpaclkctrl + } #[doc = "0x180 - No Description"] - pub iadcclkctrl: IADCCLKCTRL, - _reserved20: [u8; 0x7c], + #[inline(always)] + pub const fn iadcclkctrl(&self) -> &Iadcclkctrl { + &self.iadcclkctrl + } #[doc = "0x200 - No Description"] - pub wdog0clkctrl: WDOG0CLKCTRL, - _reserved21: [u8; 0x04], + #[inline(always)] + pub const fn wdog0clkctrl(&self) -> &Wdog0clkctrl { + &self.wdog0clkctrl + } #[doc = "0x208 - No Description"] - pub wdog1clkctrl: WDOG1CLKCTRL, - _reserved22: [u8; 0x14], + #[inline(always)] + pub const fn wdog1clkctrl(&self) -> &Wdog1clkctrl { + &self.wdog1clkctrl + } #[doc = "0x220 - No Description"] - pub eusart0clkctrl: EUSART0CLKCTRL, - _reserved23: [u8; 0x1c], + #[inline(always)] + pub const fn eusart0clkctrl(&self) -> &Eusart0clkctrl { + &self.eusart0clkctrl + } #[doc = "0x240 - No Description"] - pub sysrtc0clkctrl: SYSRTC0CLKCTRL, - _reserved24: [u8; 0x0c], + #[inline(always)] + pub const fn sysrtc0clkctrl(&self) -> &Sysrtc0clkctrl { + &self.sysrtc0clkctrl + } #[doc = "0x250 - No Description"] - pub lcdclkctrl: LCDCLKCTRL, - _reserved25: [u8; 0x0c], + #[inline(always)] + pub const fn lcdclkctrl(&self) -> &Lcdclkctrl { + &self.lcdclkctrl + } #[doc = "0x260 - No Description"] - pub vdac0clkctrl: VDAC0CLKCTRL, - _reserved26: [u8; 0x0c], + #[inline(always)] + pub const fn vdac0clkctrl(&self) -> &Vdac0clkctrl { + &self.vdac0clkctrl + } #[doc = "0x270 - No Description"] - pub pcnt0clkctrl: PCNT0CLKCTRL, - _reserved27: [u8; 0x1c], + #[inline(always)] + pub const fn pcnt0clkctrl(&self) -> &Pcnt0clkctrl { + &self.pcnt0clkctrl + } #[doc = "0x290 - No Description"] - pub lesensehfclkctrl: LESENSEHFCLKCTRL, + #[inline(always)] + pub const fn lesensehfclkctrl(&self) -> &Lesensehfclkctrl { + &self.lesensehfclkctrl + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "WDOGLOCK (w) register accessor: an alias for `Reg`"] -pub type WDOGLOCK = crate::Reg; +#[doc = "WDOGLOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdoglock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdoglock`] +module"] +#[doc(alias = "WDOGLOCK")] +pub type Wdoglock = crate::Reg; #[doc = "No Description"] pub mod wdoglock; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "CALCMD (w) register accessor: an alias for `Reg`"] -pub type CALCMD = crate::Reg; +#[doc = "CALCMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`calcmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@calcmd`] +module"] +#[doc(alias = "CALCMD")] +pub type Calcmd = crate::Reg; #[doc = "No Description"] pub mod calcmd; -#[doc = "CALCTRL (rw) register accessor: an alias for `Reg`"] -pub type CALCTRL = crate::Reg; +#[doc = "CALCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`calctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`calctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@calctrl`] +module"] +#[doc(alias = "CALCTRL")] +pub type Calctrl = crate::Reg; #[doc = "No Description"] pub mod calctrl; -#[doc = "CALCNT (r) register accessor: an alias for `Reg`"] -pub type CALCNT = crate::Reg; +#[doc = "CALCNT (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`calcnt::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@calcnt`] +module"] +#[doc(alias = "CALCNT")] +pub type Calcnt = crate::Reg; #[doc = "No Description"] pub mod calcnt; -#[doc = "CLKEN0 (rw) register accessor: an alias for `Reg`"] -pub type CLKEN0 = crate::Reg; +#[doc = "CLKEN0 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clken0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clken0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clken0`] +module"] +#[doc(alias = "CLKEN0")] +pub type Clken0 = crate::Reg; #[doc = "No Description"] pub mod clken0; -#[doc = "CLKEN1 (rw) register accessor: an alias for `Reg`"] -pub type CLKEN1 = crate::Reg; +#[doc = "CLKEN1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clken1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clken1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clken1`] +module"] +#[doc(alias = "CLKEN1")] +pub type Clken1 = crate::Reg; #[doc = "No Description"] pub mod clken1; -#[doc = "SYSCLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type SYSCLKCTRL = crate::Reg; +#[doc = "SYSCLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sysclkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sysclkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sysclkctrl`] +module"] +#[doc(alias = "SYSCLKCTRL")] +pub type Sysclkctrl = crate::Reg; #[doc = "No Description"] pub mod sysclkctrl; -#[doc = "TRACECLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type TRACECLKCTRL = crate::Reg; +#[doc = "TRACECLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`traceclkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`traceclkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@traceclkctrl`] +module"] +#[doc(alias = "TRACECLKCTRL")] +pub type Traceclkctrl = crate::Reg; #[doc = "No Description"] pub mod traceclkctrl; -#[doc = "EXPORTCLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type EXPORTCLKCTRL = crate::Reg; +#[doc = "EXPORTCLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`exportclkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`exportclkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@exportclkctrl`] +module"] +#[doc(alias = "EXPORTCLKCTRL")] +pub type Exportclkctrl = crate::Reg; #[doc = "No Description"] pub mod exportclkctrl; -#[doc = "DPLLREFCLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type DPLLREFCLKCTRL = crate::Reg; +#[doc = "DPLLREFCLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dpllrefclkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dpllrefclkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dpllrefclkctrl`] +module"] +#[doc(alias = "DPLLREFCLKCTRL")] +pub type Dpllrefclkctrl = crate::Reg; #[doc = "No Description"] pub mod dpllrefclkctrl; -#[doc = "EM01GRPACLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type EM01GRPACLKCTRL = crate::Reg; +#[doc = "EM01GRPACLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em01grpaclkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em01grpaclkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@em01grpaclkctrl`] +module"] +#[doc(alias = "EM01GRPACLKCTRL")] +pub type Em01grpaclkctrl = crate::Reg; #[doc = "No Description"] pub mod em01grpaclkctrl; -#[doc = "EM01GRPCCLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type EM01GRPCCLKCTRL = crate::Reg; +#[doc = "EM01GRPCCLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em01grpcclkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em01grpcclkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@em01grpcclkctrl`] +module"] +#[doc(alias = "EM01GRPCCLKCTRL")] +pub type Em01grpcclkctrl = crate::Reg; #[doc = "No Description"] pub mod em01grpcclkctrl; -#[doc = "EM23GRPACLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type EM23GRPACLKCTRL = crate::Reg; +#[doc = "EM23GRPACLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em23grpaclkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em23grpaclkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@em23grpaclkctrl`] +module"] +#[doc(alias = "EM23GRPACLKCTRL")] +pub type Em23grpaclkctrl = crate::Reg; #[doc = "No Description"] pub mod em23grpaclkctrl; -#[doc = "EM4GRPACLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type EM4GRPACLKCTRL = crate::Reg; +#[doc = "EM4GRPACLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em4grpaclkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em4grpaclkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@em4grpaclkctrl`] +module"] +#[doc(alias = "EM4GRPACLKCTRL")] +pub type Em4grpaclkctrl = crate::Reg; #[doc = "No Description"] pub mod em4grpaclkctrl; -#[doc = "IADCCLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type IADCCLKCTRL = crate::Reg; +#[doc = "IADCCLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`iadcclkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iadcclkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iadcclkctrl`] +module"] +#[doc(alias = "IADCCLKCTRL")] +pub type Iadcclkctrl = crate::Reg; #[doc = "No Description"] pub mod iadcclkctrl; -#[doc = "WDOG0CLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type WDOG0CLKCTRL = crate::Reg; +#[doc = "WDOG0CLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`wdog0clkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdog0clkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdog0clkctrl`] +module"] +#[doc(alias = "WDOG0CLKCTRL")] +pub type Wdog0clkctrl = crate::Reg; #[doc = "No Description"] pub mod wdog0clkctrl; -#[doc = "WDOG1CLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type WDOG1CLKCTRL = crate::Reg; +#[doc = "WDOG1CLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`wdog1clkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdog1clkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdog1clkctrl`] +module"] +#[doc(alias = "WDOG1CLKCTRL")] +pub type Wdog1clkctrl = crate::Reg; #[doc = "No Description"] pub mod wdog1clkctrl; -#[doc = "EUSART0CLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type EUSART0CLKCTRL = crate::Reg; +#[doc = "EUSART0CLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0clkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0clkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart0clkctrl`] +module"] +#[doc(alias = "EUSART0CLKCTRL")] +pub type Eusart0clkctrl = crate::Reg; #[doc = "No Description"] pub mod eusart0clkctrl; -#[doc = "SYSRTC0CLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type SYSRTC0CLKCTRL = crate::Reg; +#[doc = "SYSRTC0CLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sysrtc0clkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sysrtc0clkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sysrtc0clkctrl`] +module"] +#[doc(alias = "SYSRTC0CLKCTRL")] +pub type Sysrtc0clkctrl = crate::Reg; #[doc = "No Description"] pub mod sysrtc0clkctrl; -#[doc = "LCDCLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type LCDCLKCTRL = crate::Reg; +#[doc = "LCDCLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`lcdclkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lcdclkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lcdclkctrl`] +module"] +#[doc(alias = "LCDCLKCTRL")] +pub type Lcdclkctrl = crate::Reg; #[doc = "No Description"] pub mod lcdclkctrl; -#[doc = "VDAC0CLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type VDAC0CLKCTRL = crate::Reg; +#[doc = "VDAC0CLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`vdac0clkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`vdac0clkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vdac0clkctrl`] +module"] +#[doc(alias = "VDAC0CLKCTRL")] +pub type Vdac0clkctrl = crate::Reg; #[doc = "No Description"] pub mod vdac0clkctrl; -#[doc = "PCNT0CLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type PCNT0CLKCTRL = crate::Reg; +#[doc = "PCNT0CLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pcnt0clkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcnt0clkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcnt0clkctrl`] +module"] +#[doc(alias = "PCNT0CLKCTRL")] +pub type Pcnt0clkctrl = crate::Reg; #[doc = "No Description"] pub mod pcnt0clkctrl; -#[doc = "LESENSEHFCLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type LESENSEHFCLKCTRL = crate::Reg; +#[doc = "LESENSEHFCLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`lesensehfclkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesensehfclkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesensehfclkctrl`] +module"] +#[doc(alias = "LESENSEHFCLKCTRL")] +pub type Lesensehfclkctrl = crate::Reg; #[doc = "No Description"] pub mod lesensehfclkctrl; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/calcmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/calcmd.rs index e461f05..dae996c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/calcmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/calcmd.rs @@ -1,60 +1,35 @@ #[doc = "Register `CALCMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CALSTART` writer - Calibration Start"] -pub type CALSTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, CALCMD_SPEC, bool, O>; +pub type CalstartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CALSTOP` writer - Calibration Stop"] -pub type CALSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CALCMD_SPEC, bool, O>; +pub type CalstopW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Calibration Start"] #[inline(always)] #[must_use] - pub fn calstart(&mut self) -> CALSTART_W<0> { - CALSTART_W::new(self) + pub fn calstart(&mut self) -> CalstartW { + CalstartW::new(self, 0) } #[doc = "Bit 1 - Calibration Stop"] #[inline(always)] #[must_use] - pub fn calstop(&mut self) -> CALSTOP_W<1> { - CALSTOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn calstop(&mut self) -> CalstopW { + CalstopW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [calcmd](index.html) module"] -pub struct CALCMD_SPEC; -impl crate::RegisterSpec for CALCMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`calcmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CalcmdSpec; +impl crate::RegisterSpec for CalcmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [calcmd::W](W) writer structure"] -impl crate::Writable for CALCMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`calcmd::W`](W) writer structure"] +impl crate::Writable for CalcmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CALCMD to value 0"] -impl crate::Resettable for CALCMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CalcmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/calcnt.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/calcnt.rs index 83b6e03..6d727f6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/calcnt.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/calcnt.rs @@ -1,37 +1,22 @@ #[doc = "Register `CALCNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CALCNT` reader - Calibration Result Counter Value"] -pub type CALCNT_R = crate::FieldReader; +pub type CalcntR = crate::FieldReader; impl R { #[doc = "Bits 0:19 - Calibration Result Counter Value"] #[inline(always)] - pub fn calcnt(&self) -> CALCNT_R { - CALCNT_R::new(self.bits & 0x000f_ffff) + pub fn calcnt(&self) -> CalcntR { + CalcntR::new(self.bits & 0x000f_ffff) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [calcnt](index.html) module"] -pub struct CALCNT_SPEC; -impl crate::RegisterSpec for CALCNT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`calcnt::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CalcntSpec; +impl crate::RegisterSpec for CalcntSpec { type Ux = u32; } -#[doc = "`read()` method returns [calcnt::R](R) reader structure"] -impl crate::Readable for CALCNT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`calcnt::R`](R) reader structure"] +impl crate::Readable for CalcntSpec {} #[doc = "`reset()` method sets CALCNT to value 0"] -impl crate::Resettable for CALCNT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CalcntSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/calctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/calctrl.rs index 63cf5d2..27769af 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/calctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/calctrl.rs @@ -1,417 +1,392 @@ #[doc = "Register `CALCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CALCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CALTOP` reader - Calibration Counter Top Value"] -pub type CALTOP_R = crate::FieldReader; +pub type CaltopR = crate::FieldReader; #[doc = "Field `CALTOP` writer - Calibration Counter Top Value"] -pub type CALTOP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CALCTRL_SPEC, u32, u32, 20, O>; +pub type CaltopW<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; #[doc = "Field `CONT` reader - Continuous Calibration"] -pub type CONT_R = crate::BitReader; +pub type ContR = crate::BitReader; #[doc = "Field `CONT` writer - Continuous Calibration"] -pub type CONT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CALCTRL_SPEC, bool, O>; -#[doc = "Field `UPSEL` reader - Calibration Up-counter Select"] -pub type UPSEL_R = crate::FieldReader; +pub type ContW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Calibration Up-counter Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum UPSEL_A { +pub enum Upsel { #[doc = "0: Up-counter is not clocked"] - DISABLED = 0, + Disabled = 0, #[doc = "1: PRS CMU_CALUP consumer is clocking up-counter"] - PRS = 1, + Prs = 1, #[doc = "2: HFXO is clocking up-counter"] - HFXO = 2, + Hfxo = 2, #[doc = "3: LFXO is clocking up-counter"] - LFXO = 3, + Lfxo = 3, #[doc = "4: HFRCODPLL is clocking up-counter"] - HFRCODPLL = 4, + Hfrcodpll = 4, #[doc = "5: HFRCOEM23 is clocking up-counter"] - HFRCOEM23 = 5, + Hfrcoem23 = 5, #[doc = "8: FSRCO is clocking up-counter"] - FSRCO = 8, + Fsrco = 8, #[doc = "9: LFRCO is clocking up-counter"] - LFRCO = 9, + Lfrco = 9, #[doc = "10: ULFRCO is clocking up-counter"] - ULFRCO = 10, + Ulfrco = 10, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: UPSEL_A) -> Self { + fn from(variant: Upsel) -> Self { variant as _ } } -impl UPSEL_R { +impl crate::FieldSpec for Upsel { + type Ux = u8; +} +impl crate::IsEnum for Upsel {} +#[doc = "Field `UPSEL` reader - Calibration Up-counter Select"] +pub type UpselR = crate::FieldReader; +impl UpselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(UPSEL_A::DISABLED), - 1 => Some(UPSEL_A::PRS), - 2 => Some(UPSEL_A::HFXO), - 3 => Some(UPSEL_A::LFXO), - 4 => Some(UPSEL_A::HFRCODPLL), - 5 => Some(UPSEL_A::HFRCOEM23), - 8 => Some(UPSEL_A::FSRCO), - 9 => Some(UPSEL_A::LFRCO), - 10 => Some(UPSEL_A::ULFRCO), + 0 => Some(Upsel::Disabled), + 1 => Some(Upsel::Prs), + 2 => Some(Upsel::Hfxo), + 3 => Some(Upsel::Lfxo), + 4 => Some(Upsel::Hfrcodpll), + 5 => Some(Upsel::Hfrcoem23), + 8 => Some(Upsel::Fsrco), + 9 => Some(Upsel::Lfrco), + 10 => Some(Upsel::Ulfrco), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Up-counter is not clocked"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == UPSEL_A::DISABLED + *self == Upsel::Disabled } - #[doc = "Checks if the value of the field is `PRS`"] + #[doc = "PRS CMU_CALUP consumer is clocking up-counter"] #[inline(always)] pub fn is_prs(&self) -> bool { - *self == UPSEL_A::PRS + *self == Upsel::Prs } - #[doc = "Checks if the value of the field is `HFXO`"] + #[doc = "HFXO is clocking up-counter"] #[inline(always)] pub fn is_hfxo(&self) -> bool { - *self == UPSEL_A::HFXO + *self == Upsel::Hfxo } - #[doc = "Checks if the value of the field is `LFXO`"] + #[doc = "LFXO is clocking up-counter"] #[inline(always)] pub fn is_lfxo(&self) -> bool { - *self == UPSEL_A::LFXO + *self == Upsel::Lfxo } - #[doc = "Checks if the value of the field is `HFRCODPLL`"] + #[doc = "HFRCODPLL is clocking up-counter"] #[inline(always)] pub fn is_hfrcodpll(&self) -> bool { - *self == UPSEL_A::HFRCODPLL + *self == Upsel::Hfrcodpll } - #[doc = "Checks if the value of the field is `HFRCOEM23`"] + #[doc = "HFRCOEM23 is clocking up-counter"] #[inline(always)] pub fn is_hfrcoem23(&self) -> bool { - *self == UPSEL_A::HFRCOEM23 + *self == Upsel::Hfrcoem23 } - #[doc = "Checks if the value of the field is `FSRCO`"] + #[doc = "FSRCO is clocking up-counter"] #[inline(always)] pub fn is_fsrco(&self) -> bool { - *self == UPSEL_A::FSRCO + *self == Upsel::Fsrco } - #[doc = "Checks if the value of the field is `LFRCO`"] + #[doc = "LFRCO is clocking up-counter"] #[inline(always)] pub fn is_lfrco(&self) -> bool { - *self == UPSEL_A::LFRCO + *self == Upsel::Lfrco } - #[doc = "Checks if the value of the field is `ULFRCO`"] + #[doc = "ULFRCO is clocking up-counter"] #[inline(always)] pub fn is_ulfrco(&self) -> bool { - *self == UPSEL_A::ULFRCO + *self == Upsel::Ulfrco } } #[doc = "Field `UPSEL` writer - Calibration Up-counter Select"] -pub type UPSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CALCTRL_SPEC, u8, UPSEL_A, 4, O>; -impl<'a, const O: u8> UPSEL_W<'a, O> { +pub type UpselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Upsel>; +impl<'a, REG> UpselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Up-counter is not clocked"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(UPSEL_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Upsel::Disabled) } #[doc = "PRS CMU_CALUP consumer is clocking up-counter"] #[inline(always)] - pub fn prs(self) -> &'a mut W { - self.variant(UPSEL_A::PRS) + pub fn prs(self) -> &'a mut crate::W { + self.variant(Upsel::Prs) } #[doc = "HFXO is clocking up-counter"] #[inline(always)] - pub fn hfxo(self) -> &'a mut W { - self.variant(UPSEL_A::HFXO) + pub fn hfxo(self) -> &'a mut crate::W { + self.variant(Upsel::Hfxo) } #[doc = "LFXO is clocking up-counter"] #[inline(always)] - pub fn lfxo(self) -> &'a mut W { - self.variant(UPSEL_A::LFXO) + pub fn lfxo(self) -> &'a mut crate::W { + self.variant(Upsel::Lfxo) } #[doc = "HFRCODPLL is clocking up-counter"] #[inline(always)] - pub fn hfrcodpll(self) -> &'a mut W { - self.variant(UPSEL_A::HFRCODPLL) + pub fn hfrcodpll(self) -> &'a mut crate::W { + self.variant(Upsel::Hfrcodpll) } #[doc = "HFRCOEM23 is clocking up-counter"] #[inline(always)] - pub fn hfrcoem23(self) -> &'a mut W { - self.variant(UPSEL_A::HFRCOEM23) + pub fn hfrcoem23(self) -> &'a mut crate::W { + self.variant(Upsel::Hfrcoem23) } #[doc = "FSRCO is clocking up-counter"] #[inline(always)] - pub fn fsrco(self) -> &'a mut W { - self.variant(UPSEL_A::FSRCO) + pub fn fsrco(self) -> &'a mut crate::W { + self.variant(Upsel::Fsrco) } #[doc = "LFRCO is clocking up-counter"] #[inline(always)] - pub fn lfrco(self) -> &'a mut W { - self.variant(UPSEL_A::LFRCO) + pub fn lfrco(self) -> &'a mut crate::W { + self.variant(Upsel::Lfrco) } #[doc = "ULFRCO is clocking up-counter"] #[inline(always)] - pub fn ulfrco(self) -> &'a mut W { - self.variant(UPSEL_A::ULFRCO) + pub fn ulfrco(self) -> &'a mut crate::W { + self.variant(Upsel::Ulfrco) } } -#[doc = "Field `DOWNSEL` reader - Calibration Down-counter Select"] -pub type DOWNSEL_R = crate::FieldReader; #[doc = "Calibration Down-counter Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DOWNSEL_A { +pub enum Downsel { #[doc = "0: Down-counter is not clocked"] - DISABLED = 0, + Disabled = 0, #[doc = "1: HCLK is clocking down-counter"] - HCLK = 1, + Hclk = 1, #[doc = "2: PRS CMU_CALDN consumer is clocking down-counter"] - PRS = 2, + Prs = 2, #[doc = "3: HFXO is clocking down-counter"] - HFXO = 3, + Hfxo = 3, #[doc = "4: LFXO is clocking down-counter"] - LFXO = 4, + Lfxo = 4, #[doc = "5: HFRCODPLL is clocking down-counter"] - HFRCODPLL = 5, + Hfrcodpll = 5, #[doc = "6: HFRCOEM23 is clocking down-counter"] - HFRCOEM23 = 6, + Hfrcoem23 = 6, #[doc = "9: FSRCO is clocking down-counter"] - FSRCO = 9, + Fsrco = 9, #[doc = "10: LFRCO is clocking down-counter"] - LFRCO = 10, + Lfrco = 10, #[doc = "11: ULFRCO is clocking down-counter"] - ULFRCO = 11, + Ulfrco = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DOWNSEL_A) -> Self { + fn from(variant: Downsel) -> Self { variant as _ } } -impl DOWNSEL_R { +impl crate::FieldSpec for Downsel { + type Ux = u8; +} +impl crate::IsEnum for Downsel {} +#[doc = "Field `DOWNSEL` reader - Calibration Down-counter Select"] +pub type DownselR = crate::FieldReader; +impl DownselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(DOWNSEL_A::DISABLED), - 1 => Some(DOWNSEL_A::HCLK), - 2 => Some(DOWNSEL_A::PRS), - 3 => Some(DOWNSEL_A::HFXO), - 4 => Some(DOWNSEL_A::LFXO), - 5 => Some(DOWNSEL_A::HFRCODPLL), - 6 => Some(DOWNSEL_A::HFRCOEM23), - 9 => Some(DOWNSEL_A::FSRCO), - 10 => Some(DOWNSEL_A::LFRCO), - 11 => Some(DOWNSEL_A::ULFRCO), + 0 => Some(Downsel::Disabled), + 1 => Some(Downsel::Hclk), + 2 => Some(Downsel::Prs), + 3 => Some(Downsel::Hfxo), + 4 => Some(Downsel::Lfxo), + 5 => Some(Downsel::Hfrcodpll), + 6 => Some(Downsel::Hfrcoem23), + 9 => Some(Downsel::Fsrco), + 10 => Some(Downsel::Lfrco), + 11 => Some(Downsel::Ulfrco), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Down-counter is not clocked"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == DOWNSEL_A::DISABLED + *self == Downsel::Disabled } - #[doc = "Checks if the value of the field is `HCLK`"] + #[doc = "HCLK is clocking down-counter"] #[inline(always)] pub fn is_hclk(&self) -> bool { - *self == DOWNSEL_A::HCLK + *self == Downsel::Hclk } - #[doc = "Checks if the value of the field is `PRS`"] + #[doc = "PRS CMU_CALDN consumer is clocking down-counter"] #[inline(always)] pub fn is_prs(&self) -> bool { - *self == DOWNSEL_A::PRS + *self == Downsel::Prs } - #[doc = "Checks if the value of the field is `HFXO`"] + #[doc = "HFXO is clocking down-counter"] #[inline(always)] pub fn is_hfxo(&self) -> bool { - *self == DOWNSEL_A::HFXO + *self == Downsel::Hfxo } - #[doc = "Checks if the value of the field is `LFXO`"] + #[doc = "LFXO is clocking down-counter"] #[inline(always)] pub fn is_lfxo(&self) -> bool { - *self == DOWNSEL_A::LFXO + *self == Downsel::Lfxo } - #[doc = "Checks if the value of the field is `HFRCODPLL`"] + #[doc = "HFRCODPLL is clocking down-counter"] #[inline(always)] pub fn is_hfrcodpll(&self) -> bool { - *self == DOWNSEL_A::HFRCODPLL + *self == Downsel::Hfrcodpll } - #[doc = "Checks if the value of the field is `HFRCOEM23`"] + #[doc = "HFRCOEM23 is clocking down-counter"] #[inline(always)] pub fn is_hfrcoem23(&self) -> bool { - *self == DOWNSEL_A::HFRCOEM23 + *self == Downsel::Hfrcoem23 } - #[doc = "Checks if the value of the field is `FSRCO`"] + #[doc = "FSRCO is clocking down-counter"] #[inline(always)] pub fn is_fsrco(&self) -> bool { - *self == DOWNSEL_A::FSRCO + *self == Downsel::Fsrco } - #[doc = "Checks if the value of the field is `LFRCO`"] + #[doc = "LFRCO is clocking down-counter"] #[inline(always)] pub fn is_lfrco(&self) -> bool { - *self == DOWNSEL_A::LFRCO + *self == Downsel::Lfrco } - #[doc = "Checks if the value of the field is `ULFRCO`"] + #[doc = "ULFRCO is clocking down-counter"] #[inline(always)] pub fn is_ulfrco(&self) -> bool { - *self == DOWNSEL_A::ULFRCO + *self == Downsel::Ulfrco } } #[doc = "Field `DOWNSEL` writer - Calibration Down-counter Select"] -pub type DOWNSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CALCTRL_SPEC, u8, DOWNSEL_A, 4, O>; -impl<'a, const O: u8> DOWNSEL_W<'a, O> { +pub type DownselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Downsel>; +impl<'a, REG> DownselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Down-counter is not clocked"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(DOWNSEL_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Downsel::Disabled) } #[doc = "HCLK is clocking down-counter"] #[inline(always)] - pub fn hclk(self) -> &'a mut W { - self.variant(DOWNSEL_A::HCLK) + pub fn hclk(self) -> &'a mut crate::W { + self.variant(Downsel::Hclk) } #[doc = "PRS CMU_CALDN consumer is clocking down-counter"] #[inline(always)] - pub fn prs(self) -> &'a mut W { - self.variant(DOWNSEL_A::PRS) + pub fn prs(self) -> &'a mut crate::W { + self.variant(Downsel::Prs) } #[doc = "HFXO is clocking down-counter"] #[inline(always)] - pub fn hfxo(self) -> &'a mut W { - self.variant(DOWNSEL_A::HFXO) + pub fn hfxo(self) -> &'a mut crate::W { + self.variant(Downsel::Hfxo) } #[doc = "LFXO is clocking down-counter"] #[inline(always)] - pub fn lfxo(self) -> &'a mut W { - self.variant(DOWNSEL_A::LFXO) + pub fn lfxo(self) -> &'a mut crate::W { + self.variant(Downsel::Lfxo) } #[doc = "HFRCODPLL is clocking down-counter"] #[inline(always)] - pub fn hfrcodpll(self) -> &'a mut W { - self.variant(DOWNSEL_A::HFRCODPLL) + pub fn hfrcodpll(self) -> &'a mut crate::W { + self.variant(Downsel::Hfrcodpll) } #[doc = "HFRCOEM23 is clocking down-counter"] #[inline(always)] - pub fn hfrcoem23(self) -> &'a mut W { - self.variant(DOWNSEL_A::HFRCOEM23) + pub fn hfrcoem23(self) -> &'a mut crate::W { + self.variant(Downsel::Hfrcoem23) } #[doc = "FSRCO is clocking down-counter"] #[inline(always)] - pub fn fsrco(self) -> &'a mut W { - self.variant(DOWNSEL_A::FSRCO) + pub fn fsrco(self) -> &'a mut crate::W { + self.variant(Downsel::Fsrco) } #[doc = "LFRCO is clocking down-counter"] #[inline(always)] - pub fn lfrco(self) -> &'a mut W { - self.variant(DOWNSEL_A::LFRCO) + pub fn lfrco(self) -> &'a mut crate::W { + self.variant(Downsel::Lfrco) } #[doc = "ULFRCO is clocking down-counter"] #[inline(always)] - pub fn ulfrco(self) -> &'a mut W { - self.variant(DOWNSEL_A::ULFRCO) + pub fn ulfrco(self) -> &'a mut crate::W { + self.variant(Downsel::Ulfrco) } } impl R { #[doc = "Bits 0:19 - Calibration Counter Top Value"] #[inline(always)] - pub fn caltop(&self) -> CALTOP_R { - CALTOP_R::new(self.bits & 0x000f_ffff) + pub fn caltop(&self) -> CaltopR { + CaltopR::new(self.bits & 0x000f_ffff) } #[doc = "Bit 23 - Continuous Calibration"] #[inline(always)] - pub fn cont(&self) -> CONT_R { - CONT_R::new(((self.bits >> 23) & 1) != 0) + pub fn cont(&self) -> ContR { + ContR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:27 - Calibration Up-counter Select"] #[inline(always)] - pub fn upsel(&self) -> UPSEL_R { - UPSEL_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn upsel(&self) -> UpselR { + UpselR::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 28:31 - Calibration Down-counter Select"] #[inline(always)] - pub fn downsel(&self) -> DOWNSEL_R { - DOWNSEL_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn downsel(&self) -> DownselR { + DownselR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:19 - Calibration Counter Top Value"] #[inline(always)] #[must_use] - pub fn caltop(&mut self) -> CALTOP_W<0> { - CALTOP_W::new(self) + pub fn caltop(&mut self) -> CaltopW { + CaltopW::new(self, 0) } #[doc = "Bit 23 - Continuous Calibration"] #[inline(always)] #[must_use] - pub fn cont(&mut self) -> CONT_W<23> { - CONT_W::new(self) + pub fn cont(&mut self) -> ContW { + ContW::new(self, 23) } #[doc = "Bits 24:27 - Calibration Up-counter Select"] #[inline(always)] #[must_use] - pub fn upsel(&mut self) -> UPSEL_W<24> { - UPSEL_W::new(self) + pub fn upsel(&mut self) -> UpselW { + UpselW::new(self, 24) } #[doc = "Bits 28:31 - Calibration Down-counter Select"] #[inline(always)] #[must_use] - pub fn downsel(&mut self) -> DOWNSEL_W<28> { - DOWNSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn downsel(&mut self) -> DownselW { + DownselW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [calctrl](index.html) module"] -pub struct CALCTRL_SPEC; -impl crate::RegisterSpec for CALCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`calctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`calctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CalctrlSpec; +impl crate::RegisterSpec for CalctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [calctrl::R](R) reader structure"] -impl crate::Readable for CALCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [calctrl::W](W) writer structure"] -impl crate::Writable for CALCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`calctrl::R`](R) reader structure"] +impl crate::Readable for CalctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`calctrl::W`](W) writer structure"] +impl crate::Writable for CalctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CALCTRL to value 0"] -impl crate::Resettable for CALCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CalctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/clken0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/clken0.rs index 1e6d50b..e7ffcc9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/clken0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/clken0.rs @@ -1,530 +1,490 @@ #[doc = "Register `CLKEN0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKEN0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LDMA` reader - Enable Bus Clock"] -pub type LDMA_R = crate::BitReader; +pub type LdmaR = crate::BitReader; #[doc = "Field `LDMA` writer - Enable Bus Clock"] -pub type LDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type LdmaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LDMAXBAR` reader - Enable Bus Clock"] -pub type LDMAXBAR_R = crate::BitReader; +pub type LdmaxbarR = crate::BitReader; #[doc = "Field `LDMAXBAR` writer - Enable Bus Clock"] -pub type LDMAXBAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type LdmaxbarW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GPCRC` reader - Enable Bus Clock"] -pub type GPCRC_R = crate::BitReader; +pub type GpcrcR = crate::BitReader; #[doc = "Field `GPCRC` writer - Enable Bus Clock"] -pub type GPCRC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type GpcrcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER0` reader - Enable Bus Clock"] -pub type TIMER0_R = crate::BitReader; +pub type Timer0R = crate::BitReader; #[doc = "Field `TIMER0` writer - Enable Bus Clock"] -pub type TIMER0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Timer0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER1` reader - Enable Bus Clock"] -pub type TIMER1_R = crate::BitReader; +pub type Timer1R = crate::BitReader; #[doc = "Field `TIMER1` writer - Enable Bus Clock"] -pub type TIMER1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Timer1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER2` reader - Enable Bus Clock"] -pub type TIMER2_R = crate::BitReader; +pub type Timer2R = crate::BitReader; #[doc = "Field `TIMER2` writer - Enable Bus Clock"] -pub type TIMER2_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Timer2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER3` reader - Enable Bus Clock"] -pub type TIMER3_R = crate::BitReader; +pub type Timer3R = crate::BitReader; #[doc = "Field `TIMER3` writer - Enable Bus Clock"] -pub type TIMER3_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Timer3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER4` reader - Enable Bus Clock"] -pub type TIMER4_R = crate::BitReader; +pub type Timer4R = crate::BitReader; #[doc = "Field `TIMER4` writer - Enable Bus Clock"] -pub type TIMER4_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Timer4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USART0` reader - Enable Bus Clock"] -pub type USART0_R = crate::BitReader; +pub type Usart0R = crate::BitReader; #[doc = "Field `USART0` writer - Enable Bus Clock"] -pub type USART0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Usart0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IADC0` reader - Enable Bus Clock"] -pub type IADC0_R = crate::BitReader; +pub type Iadc0R = crate::BitReader; #[doc = "Field `IADC0` writer - Enable Bus Clock"] -pub type IADC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Iadc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AMUXCP0` reader - Enable Bus Clock"] -pub type AMUXCP0_R = crate::BitReader; +pub type Amuxcp0R = crate::BitReader; #[doc = "Field `AMUXCP0` writer - Enable Bus Clock"] -pub type AMUXCP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Amuxcp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LETIMER0` reader - Enable Bus Clock"] -pub type LETIMER0_R = crate::BitReader; +pub type Letimer0R = crate::BitReader; #[doc = "Field `LETIMER0` writer - Enable Bus Clock"] -pub type LETIMER0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Letimer0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WDOG0` reader - Enable Bus Clock"] -pub type WDOG0_R = crate::BitReader; +pub type Wdog0R = crate::BitReader; #[doc = "Field `WDOG0` writer - Enable Bus Clock"] -pub type WDOG0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Wdog0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C0` reader - Enable Bus Clock"] -pub type I2C0_R = crate::BitReader; +pub type I2c0R = crate::BitReader; #[doc = "Field `I2C0` writer - Enable Bus Clock"] -pub type I2C0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type I2c0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C1` reader - Enable Bus Clock"] -pub type I2C1_R = crate::BitReader; +pub type I2c1R = crate::BitReader; #[doc = "Field `I2C1` writer - Enable Bus Clock"] -pub type I2C1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type I2c1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYSCFG` reader - Enable Bus Clock"] -pub type SYSCFG_R = crate::BitReader; +pub type SyscfgR = crate::BitReader; #[doc = "Field `SYSCFG` writer - Enable Bus Clock"] -pub type SYSCFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type SyscfgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DPLL0` reader - Enable Bus Clock"] -pub type DPLL0_R = crate::BitReader; +pub type Dpll0R = crate::BitReader; #[doc = "Field `DPLL0` writer - Enable Bus Clock"] -pub type DPLL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Dpll0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HFRCO0` reader - Enable Bus Clock"] -pub type HFRCO0_R = crate::BitReader; +pub type Hfrco0R = crate::BitReader; #[doc = "Field `HFRCO0` writer - Enable Bus Clock"] -pub type HFRCO0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Hfrco0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HFRCOEM23` reader - Enable Bus Clock"] -pub type HFRCOEM23_R = crate::BitReader; +pub type Hfrcoem23R = crate::BitReader; #[doc = "Field `HFRCOEM23` writer - Enable Bus Clock"] -pub type HFRCOEM23_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Hfrcoem23W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HFXO0` reader - Enable Bus Clock"] -pub type HFXO0_R = crate::BitReader; +pub type Hfxo0R = crate::BitReader; #[doc = "Field `HFXO0` writer - Enable Bus Clock"] -pub type HFXO0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Hfxo0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FSRCO` reader - Enable Bus Clock"] -pub type FSRCO_R = crate::BitReader; +pub type FsrcoR = crate::BitReader; #[doc = "Field `FSRCO` writer - Enable Bus Clock"] -pub type FSRCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type FsrcoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LFRCO` reader - Enable Bus Clock"] -pub type LFRCO_R = crate::BitReader; +pub type LfrcoR = crate::BitReader; #[doc = "Field `LFRCO` writer - Enable Bus Clock"] -pub type LFRCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type LfrcoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LFXO` reader - Enable Bus Clock"] -pub type LFXO_R = crate::BitReader; +pub type LfxoR = crate::BitReader; #[doc = "Field `LFXO` writer - Enable Bus Clock"] -pub type LFXO_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type LfxoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ULFRCO` reader - Enable Bus Clock"] -pub type ULFRCO_R = crate::BitReader; +pub type UlfrcoR = crate::BitReader; #[doc = "Field `ULFRCO` writer - Enable Bus Clock"] -pub type ULFRCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type UlfrcoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LESENSE` reader - Enable Bus Clock"] -pub type LESENSE_R = crate::BitReader; +pub type LesenseR = crate::BitReader; #[doc = "Field `LESENSE` writer - Enable Bus Clock"] -pub type LESENSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type LesenseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GPIO` reader - Enable Bus Clock"] -pub type GPIO_R = crate::BitReader; +pub type GpioR = crate::BitReader; #[doc = "Field `GPIO` writer - Enable Bus Clock"] -pub type GPIO_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type GpioW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRS` reader - Enable Bus Clock"] -pub type PRS_R = crate::BitReader; +pub type PrsR = crate::BitReader; #[doc = "Field `PRS` writer - Enable Bus Clock"] -pub type PRS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type PrsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BURAM` reader - Enable Bus Clock"] -pub type BURAM_R = crate::BitReader; +pub type BuramR = crate::BitReader; #[doc = "Field `BURAM` writer - Enable Bus Clock"] -pub type BURAM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type BuramW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BURTC` reader - Enable Bus Clock"] -pub type BURTC_R = crate::BitReader; +pub type BurtcR = crate::BitReader; #[doc = "Field `BURTC` writer - Enable Bus Clock"] -pub type BURTC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type BurtcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYSRTC0` reader - Enable Bus Clock"] -pub type SYSRTC0_R = crate::BitReader; +pub type Sysrtc0R = crate::BitReader; #[doc = "Field `SYSRTC0` writer - Enable Bus Clock"] -pub type SYSRTC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Sysrtc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCDC` reader - Enable Bus Clock"] -pub type DCDC_R = crate::BitReader; +pub type DcdcR = crate::BitReader; #[doc = "Field `DCDC` writer - Enable Bus Clock"] -pub type DCDC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type DcdcW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Enable Bus Clock"] #[inline(always)] - pub fn ldma(&self) -> LDMA_R { - LDMA_R::new((self.bits & 1) != 0) + pub fn ldma(&self) -> LdmaR { + LdmaR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Enable Bus Clock"] #[inline(always)] - pub fn ldmaxbar(&self) -> LDMAXBAR_R { - LDMAXBAR_R::new(((self.bits >> 1) & 1) != 0) + pub fn ldmaxbar(&self) -> LdmaxbarR { + LdmaxbarR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - Enable Bus Clock"] #[inline(always)] - pub fn gpcrc(&self) -> GPCRC_R { - GPCRC_R::new(((self.bits >> 3) & 1) != 0) + pub fn gpcrc(&self) -> GpcrcR { + GpcrcR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Enable Bus Clock"] #[inline(always)] - pub fn timer0(&self) -> TIMER0_R { - TIMER0_R::new(((self.bits >> 4) & 1) != 0) + pub fn timer0(&self) -> Timer0R { + Timer0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Enable Bus Clock"] #[inline(always)] - pub fn timer1(&self) -> TIMER1_R { - TIMER1_R::new(((self.bits >> 5) & 1) != 0) + pub fn timer1(&self) -> Timer1R { + Timer1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Enable Bus Clock"] #[inline(always)] - pub fn timer2(&self) -> TIMER2_R { - TIMER2_R::new(((self.bits >> 6) & 1) != 0) + pub fn timer2(&self) -> Timer2R { + Timer2R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Enable Bus Clock"] #[inline(always)] - pub fn timer3(&self) -> TIMER3_R { - TIMER3_R::new(((self.bits >> 7) & 1) != 0) + pub fn timer3(&self) -> Timer3R { + Timer3R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Enable Bus Clock"] #[inline(always)] - pub fn timer4(&self) -> TIMER4_R { - TIMER4_R::new(((self.bits >> 8) & 1) != 0) + pub fn timer4(&self) -> Timer4R { + Timer4R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Enable Bus Clock"] #[inline(always)] - pub fn usart0(&self) -> USART0_R { - USART0_R::new(((self.bits >> 9) & 1) != 0) + pub fn usart0(&self) -> Usart0R { + Usart0R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Enable Bus Clock"] #[inline(always)] - pub fn iadc0(&self) -> IADC0_R { - IADC0_R::new(((self.bits >> 10) & 1) != 0) + pub fn iadc0(&self) -> Iadc0R { + Iadc0R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Enable Bus Clock"] #[inline(always)] - pub fn amuxcp0(&self) -> AMUXCP0_R { - AMUXCP0_R::new(((self.bits >> 11) & 1) != 0) + pub fn amuxcp0(&self) -> Amuxcp0R { + Amuxcp0R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Enable Bus Clock"] #[inline(always)] - pub fn letimer0(&self) -> LETIMER0_R { - LETIMER0_R::new(((self.bits >> 12) & 1) != 0) + pub fn letimer0(&self) -> Letimer0R { + Letimer0R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Enable Bus Clock"] #[inline(always)] - pub fn wdog0(&self) -> WDOG0_R { - WDOG0_R::new(((self.bits >> 13) & 1) != 0) + pub fn wdog0(&self) -> Wdog0R { + Wdog0R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Enable Bus Clock"] #[inline(always)] - pub fn i2c0(&self) -> I2C0_R { - I2C0_R::new(((self.bits >> 14) & 1) != 0) + pub fn i2c0(&self) -> I2c0R { + I2c0R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Enable Bus Clock"] #[inline(always)] - pub fn i2c1(&self) -> I2C1_R { - I2C1_R::new(((self.bits >> 15) & 1) != 0) + pub fn i2c1(&self) -> I2c1R { + I2c1R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Enable Bus Clock"] #[inline(always)] - pub fn syscfg(&self) -> SYSCFG_R { - SYSCFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn syscfg(&self) -> SyscfgR { + SyscfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Enable Bus Clock"] #[inline(always)] - pub fn dpll0(&self) -> DPLL0_R { - DPLL0_R::new(((self.bits >> 17) & 1) != 0) + pub fn dpll0(&self) -> Dpll0R { + Dpll0R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Enable Bus Clock"] #[inline(always)] - pub fn hfrco0(&self) -> HFRCO0_R { - HFRCO0_R::new(((self.bits >> 18) & 1) != 0) + pub fn hfrco0(&self) -> Hfrco0R { + Hfrco0R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Enable Bus Clock"] #[inline(always)] - pub fn hfrcoem23(&self) -> HFRCOEM23_R { - HFRCOEM23_R::new(((self.bits >> 19) & 1) != 0) + pub fn hfrcoem23(&self) -> Hfrcoem23R { + Hfrcoem23R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Enable Bus Clock"] #[inline(always)] - pub fn hfxo0(&self) -> HFXO0_R { - HFXO0_R::new(((self.bits >> 20) & 1) != 0) + pub fn hfxo0(&self) -> Hfxo0R { + Hfxo0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Enable Bus Clock"] #[inline(always)] - pub fn fsrco(&self) -> FSRCO_R { - FSRCO_R::new(((self.bits >> 21) & 1) != 0) + pub fn fsrco(&self) -> FsrcoR { + FsrcoR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Enable Bus Clock"] #[inline(always)] - pub fn lfrco(&self) -> LFRCO_R { - LFRCO_R::new(((self.bits >> 22) & 1) != 0) + pub fn lfrco(&self) -> LfrcoR { + LfrcoR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Enable Bus Clock"] #[inline(always)] - pub fn lfxo(&self) -> LFXO_R { - LFXO_R::new(((self.bits >> 23) & 1) != 0) + pub fn lfxo(&self) -> LfxoR { + LfxoR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - Enable Bus Clock"] #[inline(always)] - pub fn ulfrco(&self) -> ULFRCO_R { - ULFRCO_R::new(((self.bits >> 24) & 1) != 0) + pub fn ulfrco(&self) -> UlfrcoR { + UlfrcoR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Enable Bus Clock"] #[inline(always)] - pub fn lesense(&self) -> LESENSE_R { - LESENSE_R::new(((self.bits >> 25) & 1) != 0) + pub fn lesense(&self) -> LesenseR { + LesenseR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Enable Bus Clock"] #[inline(always)] - pub fn gpio(&self) -> GPIO_R { - GPIO_R::new(((self.bits >> 26) & 1) != 0) + pub fn gpio(&self) -> GpioR { + GpioR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - Enable Bus Clock"] #[inline(always)] - pub fn prs(&self) -> PRS_R { - PRS_R::new(((self.bits >> 27) & 1) != 0) + pub fn prs(&self) -> PrsR { + PrsR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - Enable Bus Clock"] #[inline(always)] - pub fn buram(&self) -> BURAM_R { - BURAM_R::new(((self.bits >> 28) & 1) != 0) + pub fn buram(&self) -> BuramR { + BuramR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Enable Bus Clock"] #[inline(always)] - pub fn burtc(&self) -> BURTC_R { - BURTC_R::new(((self.bits >> 29) & 1) != 0) + pub fn burtc(&self) -> BurtcR { + BurtcR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Enable Bus Clock"] #[inline(always)] - pub fn sysrtc0(&self) -> SYSRTC0_R { - SYSRTC0_R::new(((self.bits >> 30) & 1) != 0) + pub fn sysrtc0(&self) -> Sysrtc0R { + Sysrtc0R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Enable Bus Clock"] #[inline(always)] - pub fn dcdc(&self) -> DCDC_R { - DCDC_R::new(((self.bits >> 31) & 1) != 0) + pub fn dcdc(&self) -> DcdcR { + DcdcR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn ldma(&mut self) -> LDMA_W<0> { - LDMA_W::new(self) + pub fn ldma(&mut self) -> LdmaW { + LdmaW::new(self, 0) } #[doc = "Bit 1 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn ldmaxbar(&mut self) -> LDMAXBAR_W<1> { - LDMAXBAR_W::new(self) + pub fn ldmaxbar(&mut self) -> LdmaxbarW { + LdmaxbarW::new(self, 1) } #[doc = "Bit 3 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn gpcrc(&mut self) -> GPCRC_W<3> { - GPCRC_W::new(self) + pub fn gpcrc(&mut self) -> GpcrcW { + GpcrcW::new(self, 3) } #[doc = "Bit 4 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn timer0(&mut self) -> TIMER0_W<4> { - TIMER0_W::new(self) + pub fn timer0(&mut self) -> Timer0W { + Timer0W::new(self, 4) } #[doc = "Bit 5 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn timer1(&mut self) -> TIMER1_W<5> { - TIMER1_W::new(self) + pub fn timer1(&mut self) -> Timer1W { + Timer1W::new(self, 5) } #[doc = "Bit 6 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn timer2(&mut self) -> TIMER2_W<6> { - TIMER2_W::new(self) + pub fn timer2(&mut self) -> Timer2W { + Timer2W::new(self, 6) } #[doc = "Bit 7 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn timer3(&mut self) -> TIMER3_W<7> { - TIMER3_W::new(self) + pub fn timer3(&mut self) -> Timer3W { + Timer3W::new(self, 7) } #[doc = "Bit 8 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn timer4(&mut self) -> TIMER4_W<8> { - TIMER4_W::new(self) + pub fn timer4(&mut self) -> Timer4W { + Timer4W::new(self, 8) } #[doc = "Bit 9 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn usart0(&mut self) -> USART0_W<9> { - USART0_W::new(self) + pub fn usart0(&mut self) -> Usart0W { + Usart0W::new(self, 9) } #[doc = "Bit 10 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn iadc0(&mut self) -> IADC0_W<10> { - IADC0_W::new(self) + pub fn iadc0(&mut self) -> Iadc0W { + Iadc0W::new(self, 10) } #[doc = "Bit 11 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn amuxcp0(&mut self) -> AMUXCP0_W<11> { - AMUXCP0_W::new(self) + pub fn amuxcp0(&mut self) -> Amuxcp0W { + Amuxcp0W::new(self, 11) } #[doc = "Bit 12 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn letimer0(&mut self) -> LETIMER0_W<12> { - LETIMER0_W::new(self) + pub fn letimer0(&mut self) -> Letimer0W { + Letimer0W::new(self, 12) } #[doc = "Bit 13 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn wdog0(&mut self) -> WDOG0_W<13> { - WDOG0_W::new(self) + pub fn wdog0(&mut self) -> Wdog0W { + Wdog0W::new(self, 13) } #[doc = "Bit 14 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn i2c0(&mut self) -> I2C0_W<14> { - I2C0_W::new(self) + pub fn i2c0(&mut self) -> I2c0W { + I2c0W::new(self, 14) } #[doc = "Bit 15 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn i2c1(&mut self) -> I2C1_W<15> { - I2C1_W::new(self) + pub fn i2c1(&mut self) -> I2c1W { + I2c1W::new(self, 15) } #[doc = "Bit 16 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn syscfg(&mut self) -> SYSCFG_W<16> { - SYSCFG_W::new(self) + pub fn syscfg(&mut self) -> SyscfgW { + SyscfgW::new(self, 16) } #[doc = "Bit 17 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn dpll0(&mut self) -> DPLL0_W<17> { - DPLL0_W::new(self) + pub fn dpll0(&mut self) -> Dpll0W { + Dpll0W::new(self, 17) } #[doc = "Bit 18 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn hfrco0(&mut self) -> HFRCO0_W<18> { - HFRCO0_W::new(self) + pub fn hfrco0(&mut self) -> Hfrco0W { + Hfrco0W::new(self, 18) } #[doc = "Bit 19 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn hfrcoem23(&mut self) -> HFRCOEM23_W<19> { - HFRCOEM23_W::new(self) + pub fn hfrcoem23(&mut self) -> Hfrcoem23W { + Hfrcoem23W::new(self, 19) } #[doc = "Bit 20 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn hfxo0(&mut self) -> HFXO0_W<20> { - HFXO0_W::new(self) + pub fn hfxo0(&mut self) -> Hfxo0W { + Hfxo0W::new(self, 20) } #[doc = "Bit 21 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn fsrco(&mut self) -> FSRCO_W<21> { - FSRCO_W::new(self) + pub fn fsrco(&mut self) -> FsrcoW { + FsrcoW::new(self, 21) } #[doc = "Bit 22 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn lfrco(&mut self) -> LFRCO_W<22> { - LFRCO_W::new(self) + pub fn lfrco(&mut self) -> LfrcoW { + LfrcoW::new(self, 22) } #[doc = "Bit 23 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn lfxo(&mut self) -> LFXO_W<23> { - LFXO_W::new(self) + pub fn lfxo(&mut self) -> LfxoW { + LfxoW::new(self, 23) } #[doc = "Bit 24 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn ulfrco(&mut self) -> ULFRCO_W<24> { - ULFRCO_W::new(self) + pub fn ulfrco(&mut self) -> UlfrcoW { + UlfrcoW::new(self, 24) } #[doc = "Bit 25 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn lesense(&mut self) -> LESENSE_W<25> { - LESENSE_W::new(self) + pub fn lesense(&mut self) -> LesenseW { + LesenseW::new(self, 25) } #[doc = "Bit 26 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn gpio(&mut self) -> GPIO_W<26> { - GPIO_W::new(self) + pub fn gpio(&mut self) -> GpioW { + GpioW::new(self, 26) } #[doc = "Bit 27 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn prs(&mut self) -> PRS_W<27> { - PRS_W::new(self) + pub fn prs(&mut self) -> PrsW { + PrsW::new(self, 27) } #[doc = "Bit 28 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn buram(&mut self) -> BURAM_W<28> { - BURAM_W::new(self) + pub fn buram(&mut self) -> BuramW { + BuramW::new(self, 28) } #[doc = "Bit 29 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn burtc(&mut self) -> BURTC_W<29> { - BURTC_W::new(self) + pub fn burtc(&mut self) -> BurtcW { + BurtcW::new(self, 29) } #[doc = "Bit 30 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn sysrtc0(&mut self) -> SYSRTC0_W<30> { - SYSRTC0_W::new(self) + pub fn sysrtc0(&mut self) -> Sysrtc0W { + Sysrtc0W::new(self, 30) } #[doc = "Bit 31 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn dcdc(&mut self) -> DCDC_W<31> { - DCDC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dcdc(&mut self) -> DcdcW { + DcdcW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clken0](index.html) module"] -pub struct CLKEN0_SPEC; -impl crate::RegisterSpec for CLKEN0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clken0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clken0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Clken0Spec; +impl crate::RegisterSpec for Clken0Spec { type Ux = u32; } -#[doc = "`read()` method returns [clken0::R](R) reader structure"] -impl crate::Readable for CLKEN0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clken0::W](W) writer structure"] -impl crate::Writable for CLKEN0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`clken0::R`](R) reader structure"] +impl crate::Readable for Clken0Spec {} +#[doc = "`write(|w| ..)` method takes [`clken0::W`](W) writer structure"] +impl crate::Writable for Clken0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKEN0 to value 0"] -impl crate::Resettable for CLKEN0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Clken0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/clken1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/clken1.rs index 6976271..a82d3bc 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/clken1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/clken1.rs @@ -1,305 +1,265 @@ #[doc = "Register `CLKEN1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKEN1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `HOSTMAILBOX` reader - Enable Bus Clock"] -pub type HOSTMAILBOX_R = crate::BitReader; +pub type HostmailboxR = crate::BitReader; #[doc = "Field `HOSTMAILBOX` writer - Enable Bus Clock"] -pub type HOSTMAILBOX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type HostmailboxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SEMAILBOXHOST` reader - Enable Bus Clock"] -pub type SEMAILBOXHOST_R = crate::BitReader; +pub type SemailboxhostR = crate::BitReader; #[doc = "Field `SEMAILBOXHOST` writer - Enable Bus Clock"] -pub type SEMAILBOXHOST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type SemailboxhostW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LCD` reader - Enable Bus Clock"] -pub type LCD_R = crate::BitReader; +pub type LcdR = crate::BitReader; #[doc = "Field `LCD` writer - Enable Bus Clock"] -pub type LCD_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type LcdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `KEYSCAN` reader - Enable Bus Clock"] -pub type KEYSCAN_R = crate::BitReader; +pub type KeyscanR = crate::BitReader; #[doc = "Field `KEYSCAN` writer - Enable Bus Clock"] -pub type KEYSCAN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type KeyscanW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SMU` reader - Enable Bus Clock"] -pub type SMU_R = crate::BitReader; +pub type SmuR = crate::BitReader; #[doc = "Field `SMU` writer - Enable Bus Clock"] -pub type SMU_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type SmuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICACHE0` reader - Enable Bus Clock"] -pub type ICACHE0_R = crate::BitReader; +pub type Icache0R = crate::BitReader; #[doc = "Field `ICACHE0` writer - Enable Bus Clock"] -pub type ICACHE0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type Icache0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MSC` reader - Enable Bus Clock"] -pub type MSC_R = crate::BitReader; +pub type MscR = crate::BitReader; #[doc = "Field `MSC` writer - Enable Bus Clock"] -pub type MSC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type MscW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WDOG1` reader - Enable Bus Clock"] -pub type WDOG1_R = crate::BitReader; +pub type Wdog1R = crate::BitReader; #[doc = "Field `WDOG1` writer - Enable Bus Clock"] -pub type WDOG1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type Wdog1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMP0` reader - Enable Bus Clock"] -pub type ACMP0_R = crate::BitReader; +pub type Acmp0R = crate::BitReader; #[doc = "Field `ACMP0` writer - Enable Bus Clock"] -pub type ACMP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type Acmp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMP1` reader - Enable Bus Clock"] -pub type ACMP1_R = crate::BitReader; +pub type Acmp1R = crate::BitReader; #[doc = "Field `ACMP1` writer - Enable Bus Clock"] -pub type ACMP1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type Acmp1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VDAC0` reader - Enable Bus Clock"] -pub type VDAC0_R = crate::BitReader; +pub type Vdac0R = crate::BitReader; #[doc = "Field `VDAC0` writer - Enable Bus Clock"] -pub type VDAC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type Vdac0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PCNT0` reader - Enable Bus Clock"] -pub type PCNT0_R = crate::BitReader; +pub type Pcnt0R = crate::BitReader; #[doc = "Field `PCNT0` writer - Enable Bus Clock"] -pub type PCNT0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type Pcnt0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EUSART0` reader - Enable Bus Clock"] -pub type EUSART0_R = crate::BitReader; +pub type Eusart0R = crate::BitReader; #[doc = "Field `EUSART0` writer - Enable Bus Clock"] -pub type EUSART0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type Eusart0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EUSART1` reader - Enable Bus Clock"] -pub type EUSART1_R = crate::BitReader; +pub type Eusart1R = crate::BitReader; #[doc = "Field `EUSART1` writer - Enable Bus Clock"] -pub type EUSART1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type Eusart1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EUSART2` reader - Enable Bus Clock"] -pub type EUSART2_R = crate::BitReader; +pub type Eusart2R = crate::BitReader; #[doc = "Field `EUSART2` writer - Enable Bus Clock"] -pub type EUSART2_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type Eusart2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMEM` reader - Enable Bus Clock"] -pub type DMEM_R = crate::BitReader; +pub type DmemR = crate::BitReader; #[doc = "Field `DMEM` writer - Enable Bus Clock"] -pub type DMEM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type DmemW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 8 - Enable Bus Clock"] #[inline(always)] - pub fn hostmailbox(&self) -> HOSTMAILBOX_R { - HOSTMAILBOX_R::new(((self.bits >> 8) & 1) != 0) + pub fn hostmailbox(&self) -> HostmailboxR { + HostmailboxR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 10 - Enable Bus Clock"] #[inline(always)] - pub fn semailboxhost(&self) -> SEMAILBOXHOST_R { - SEMAILBOXHOST_R::new(((self.bits >> 10) & 1) != 0) + pub fn semailboxhost(&self) -> SemailboxhostR { + SemailboxhostR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 12 - Enable Bus Clock"] #[inline(always)] - pub fn lcd(&self) -> LCD_R { - LCD_R::new(((self.bits >> 12) & 1) != 0) + pub fn lcd(&self) -> LcdR { + LcdR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Enable Bus Clock"] #[inline(always)] - pub fn keyscan(&self) -> KEYSCAN_R { - KEYSCAN_R::new(((self.bits >> 13) & 1) != 0) + pub fn keyscan(&self) -> KeyscanR { + KeyscanR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Enable Bus Clock"] #[inline(always)] - pub fn smu(&self) -> SMU_R { - SMU_R::new(((self.bits >> 14) & 1) != 0) + pub fn smu(&self) -> SmuR { + SmuR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Enable Bus Clock"] #[inline(always)] - pub fn icache0(&self) -> ICACHE0_R { - ICACHE0_R::new(((self.bits >> 15) & 1) != 0) + pub fn icache0(&self) -> Icache0R { + Icache0R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Enable Bus Clock"] #[inline(always)] - pub fn msc(&self) -> MSC_R { - MSC_R::new(((self.bits >> 16) & 1) != 0) + pub fn msc(&self) -> MscR { + MscR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Enable Bus Clock"] #[inline(always)] - pub fn wdog1(&self) -> WDOG1_R { - WDOG1_R::new(((self.bits >> 17) & 1) != 0) + pub fn wdog1(&self) -> Wdog1R { + Wdog1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Enable Bus Clock"] #[inline(always)] - pub fn acmp0(&self) -> ACMP0_R { - ACMP0_R::new(((self.bits >> 18) & 1) != 0) + pub fn acmp0(&self) -> Acmp0R { + Acmp0R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Enable Bus Clock"] #[inline(always)] - pub fn acmp1(&self) -> ACMP1_R { - ACMP1_R::new(((self.bits >> 19) & 1) != 0) + pub fn acmp1(&self) -> Acmp1R { + Acmp1R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Enable Bus Clock"] #[inline(always)] - pub fn vdac0(&self) -> VDAC0_R { - VDAC0_R::new(((self.bits >> 20) & 1) != 0) + pub fn vdac0(&self) -> Vdac0R { + Vdac0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Enable Bus Clock"] #[inline(always)] - pub fn pcnt0(&self) -> PCNT0_R { - PCNT0_R::new(((self.bits >> 21) & 1) != 0) + pub fn pcnt0(&self) -> Pcnt0R { + Pcnt0R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Enable Bus Clock"] #[inline(always)] - pub fn eusart0(&self) -> EUSART0_R { - EUSART0_R::new(((self.bits >> 22) & 1) != 0) + pub fn eusart0(&self) -> Eusart0R { + Eusart0R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Enable Bus Clock"] #[inline(always)] - pub fn eusart1(&self) -> EUSART1_R { - EUSART1_R::new(((self.bits >> 23) & 1) != 0) + pub fn eusart1(&self) -> Eusart1R { + Eusart1R::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - Enable Bus Clock"] #[inline(always)] - pub fn eusart2(&self) -> EUSART2_R { - EUSART2_R::new(((self.bits >> 24) & 1) != 0) + pub fn eusart2(&self) -> Eusart2R { + Eusart2R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 27 - Enable Bus Clock"] #[inline(always)] - pub fn dmem(&self) -> DMEM_R { - DMEM_R::new(((self.bits >> 27) & 1) != 0) + pub fn dmem(&self) -> DmemR { + DmemR::new(((self.bits >> 27) & 1) != 0) } } impl W { #[doc = "Bit 8 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn hostmailbox(&mut self) -> HOSTMAILBOX_W<8> { - HOSTMAILBOX_W::new(self) + pub fn hostmailbox(&mut self) -> HostmailboxW { + HostmailboxW::new(self, 8) } #[doc = "Bit 10 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn semailboxhost(&mut self) -> SEMAILBOXHOST_W<10> { - SEMAILBOXHOST_W::new(self) + pub fn semailboxhost(&mut self) -> SemailboxhostW { + SemailboxhostW::new(self, 10) } #[doc = "Bit 12 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn lcd(&mut self) -> LCD_W<12> { - LCD_W::new(self) + pub fn lcd(&mut self) -> LcdW { + LcdW::new(self, 12) } #[doc = "Bit 13 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn keyscan(&mut self) -> KEYSCAN_W<13> { - KEYSCAN_W::new(self) + pub fn keyscan(&mut self) -> KeyscanW { + KeyscanW::new(self, 13) } #[doc = "Bit 14 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn smu(&mut self) -> SMU_W<14> { - SMU_W::new(self) + pub fn smu(&mut self) -> SmuW { + SmuW::new(self, 14) } #[doc = "Bit 15 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn icache0(&mut self) -> ICACHE0_W<15> { - ICACHE0_W::new(self) + pub fn icache0(&mut self) -> Icache0W { + Icache0W::new(self, 15) } #[doc = "Bit 16 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn msc(&mut self) -> MSC_W<16> { - MSC_W::new(self) + pub fn msc(&mut self) -> MscW { + MscW::new(self, 16) } #[doc = "Bit 17 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn wdog1(&mut self) -> WDOG1_W<17> { - WDOG1_W::new(self) + pub fn wdog1(&mut self) -> Wdog1W { + Wdog1W::new(self, 17) } #[doc = "Bit 18 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn acmp0(&mut self) -> ACMP0_W<18> { - ACMP0_W::new(self) + pub fn acmp0(&mut self) -> Acmp0W { + Acmp0W::new(self, 18) } #[doc = "Bit 19 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn acmp1(&mut self) -> ACMP1_W<19> { - ACMP1_W::new(self) + pub fn acmp1(&mut self) -> Acmp1W { + Acmp1W::new(self, 19) } #[doc = "Bit 20 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn vdac0(&mut self) -> VDAC0_W<20> { - VDAC0_W::new(self) + pub fn vdac0(&mut self) -> Vdac0W { + Vdac0W::new(self, 20) } #[doc = "Bit 21 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn pcnt0(&mut self) -> PCNT0_W<21> { - PCNT0_W::new(self) + pub fn pcnt0(&mut self) -> Pcnt0W { + Pcnt0W::new(self, 21) } #[doc = "Bit 22 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn eusart0(&mut self) -> EUSART0_W<22> { - EUSART0_W::new(self) + pub fn eusart0(&mut self) -> Eusart0W { + Eusart0W::new(self, 22) } #[doc = "Bit 23 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn eusart1(&mut self) -> EUSART1_W<23> { - EUSART1_W::new(self) + pub fn eusart1(&mut self) -> Eusart1W { + Eusart1W::new(self, 23) } #[doc = "Bit 24 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn eusart2(&mut self) -> EUSART2_W<24> { - EUSART2_W::new(self) + pub fn eusart2(&mut self) -> Eusart2W { + Eusart2W::new(self, 24) } #[doc = "Bit 27 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn dmem(&mut self) -> DMEM_W<27> { - DMEM_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dmem(&mut self) -> DmemW { + DmemW::new(self, 27) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clken1](index.html) module"] -pub struct CLKEN1_SPEC; -impl crate::RegisterSpec for CLKEN1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clken1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clken1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Clken1Spec; +impl crate::RegisterSpec for Clken1Spec { type Ux = u32; } -#[doc = "`read()` method returns [clken1::R](R) reader structure"] -impl crate::Readable for CLKEN1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clken1::W](W) writer structure"] -impl crate::Writable for CLKEN1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`clken1::R`](R) reader structure"] +impl crate::Readable for Clken1Spec {} +#[doc = "`write(|w| ..)` method takes [`clken1::W`](W) writer structure"] +impl crate::Writable for Clken1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKEN1 to value 0"] -impl crate::Resettable for CLKEN1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Clken1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/dpllrefclkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/dpllrefclkctrl.rs index ff43384..253a6a5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/dpllrefclkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/dpllrefclkctrl.rs @@ -1,155 +1,122 @@ #[doc = "Register `DPLLREFCLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DPLLREFCLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "0: DPLLREFCLK is not clocked"] - DISABLED = 0, + Disabled = 0, #[doc = "1: HFXO is clocking DPLLREFCLK"] - HFXO = 1, + Hfxo = 1, #[doc = "2: LFXO is clocking DPLLREFCLK"] - LFXO = 2, + Lfxo = 2, #[doc = "3: CLKIN0 is clocking DPLLREFCLK"] - CLKIN0 = 3, + Clkin0 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CLKSEL_A { + pub const fn variant(&self) -> Clksel { match self.bits { - 0 => CLKSEL_A::DISABLED, - 1 => CLKSEL_A::HFXO, - 2 => CLKSEL_A::LFXO, - 3 => CLKSEL_A::CLKIN0, + 0 => Clksel::Disabled, + 1 => Clksel::Hfxo, + 2 => Clksel::Lfxo, + 3 => Clksel::Clkin0, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "DPLLREFCLK is not clocked"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == CLKSEL_A::DISABLED + *self == Clksel::Disabled } - #[doc = "Checks if the value of the field is `HFXO`"] + #[doc = "HFXO is clocking DPLLREFCLK"] #[inline(always)] pub fn is_hfxo(&self) -> bool { - *self == CLKSEL_A::HFXO + *self == Clksel::Hfxo } - #[doc = "Checks if the value of the field is `LFXO`"] + #[doc = "LFXO is clocking DPLLREFCLK"] #[inline(always)] pub fn is_lfxo(&self) -> bool { - *self == CLKSEL_A::LFXO + *self == Clksel::Lfxo } - #[doc = "Checks if the value of the field is `CLKIN0`"] + #[doc = "CLKIN0 is clocking DPLLREFCLK"] #[inline(always)] pub fn is_clkin0(&self) -> bool { - *self == CLKSEL_A::CLKIN0 + *self == Clksel::Clkin0 } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, DPLLREFCLKCTRL_SPEC, u8, CLKSEL_A, 2, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel, crate::Safe>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "DPLLREFCLK is not clocked"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(CLKSEL_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Clksel::Disabled) } #[doc = "HFXO is clocking DPLLREFCLK"] #[inline(always)] - pub fn hfxo(self) -> &'a mut W { - self.variant(CLKSEL_A::HFXO) + pub fn hfxo(self) -> &'a mut crate::W { + self.variant(Clksel::Hfxo) } #[doc = "LFXO is clocking DPLLREFCLK"] #[inline(always)] - pub fn lfxo(self) -> &'a mut W { - self.variant(CLKSEL_A::LFXO) + pub fn lfxo(self) -> &'a mut crate::W { + self.variant(Clksel::Lfxo) } #[doc = "CLKIN0 is clocking DPLLREFCLK"] #[inline(always)] - pub fn clkin0(self) -> &'a mut W { - self.variant(CLKSEL_A::CLKIN0) + pub fn clkin0(self) -> &'a mut crate::W { + self.variant(Clksel::Clkin0) } } impl R { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 3) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dpllrefclkctrl](index.html) module"] -pub struct DPLLREFCLKCTRL_SPEC; -impl crate::RegisterSpec for DPLLREFCLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dpllrefclkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dpllrefclkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DpllrefclkctrlSpec; +impl crate::RegisterSpec for DpllrefclkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [dpllrefclkctrl::R](R) reader structure"] -impl crate::Readable for DPLLREFCLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dpllrefclkctrl::W](W) writer structure"] -impl crate::Writable for DPLLREFCLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dpllrefclkctrl::R`](R) reader structure"] +impl crate::Readable for DpllrefclkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`dpllrefclkctrl::W`](W) writer structure"] +impl crate::Writable for DpllrefclkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DPLLREFCLKCTRL to value 0"] -impl crate::Resettable for DPLLREFCLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DpllrefclkctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/em01grpaclkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/em01grpaclkctrl.rs index 88d5ec5..d8c98f0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/em01grpaclkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/em01grpaclkctrl.rs @@ -1,181 +1,148 @@ #[doc = "Register `EM01GRPACLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EM01GRPACLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "1: HFRCODPLL is clocking EM01GRPACLK"] - HFRCODPLL = 1, + Hfrcodpll = 1, #[doc = "2: HFXO is clocking EM01GRPACLK"] - HFXO = 2, + Hfxo = 2, #[doc = "3: FSRCO is clocking EM01GRPACLK"] - FSRCO = 3, + Fsrco = 3, #[doc = "4: HFRCOEM23 is clocking EM01GRPACLK"] - HFRCOEM23 = 4, + Hfrcoem23 = 4, #[doc = "5: HFRCODPLL (retimed) is clocking EM01GRPACLK. Check with datasheet for frequency limitation when using retiming with voltage scaling."] - HFRCODPLLRT = 5, + Hfrcodpllrt = 5, #[doc = "6: HFXO (retimed) is clocking EM01GRPACLK. Check with datasheet for frequency limitation when using retiming with voltage scaling."] - HFXORT = 6, + Hfxort = 6, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(CLKSEL_A::HFRCODPLL), - 2 => Some(CLKSEL_A::HFXO), - 3 => Some(CLKSEL_A::FSRCO), - 4 => Some(CLKSEL_A::HFRCOEM23), - 5 => Some(CLKSEL_A::HFRCODPLLRT), - 6 => Some(CLKSEL_A::HFXORT), + 1 => Some(Clksel::Hfrcodpll), + 2 => Some(Clksel::Hfxo), + 3 => Some(Clksel::Fsrco), + 4 => Some(Clksel::Hfrcoem23), + 5 => Some(Clksel::Hfrcodpllrt), + 6 => Some(Clksel::Hfxort), _ => None, } } - #[doc = "Checks if the value of the field is `HFRCODPLL`"] + #[doc = "HFRCODPLL is clocking EM01GRPACLK"] #[inline(always)] pub fn is_hfrcodpll(&self) -> bool { - *self == CLKSEL_A::HFRCODPLL + *self == Clksel::Hfrcodpll } - #[doc = "Checks if the value of the field is `HFXO`"] + #[doc = "HFXO is clocking EM01GRPACLK"] #[inline(always)] pub fn is_hfxo(&self) -> bool { - *self == CLKSEL_A::HFXO + *self == Clksel::Hfxo } - #[doc = "Checks if the value of the field is `FSRCO`"] + #[doc = "FSRCO is clocking EM01GRPACLK"] #[inline(always)] pub fn is_fsrco(&self) -> bool { - *self == CLKSEL_A::FSRCO + *self == Clksel::Fsrco } - #[doc = "Checks if the value of the field is `HFRCOEM23`"] + #[doc = "HFRCOEM23 is clocking EM01GRPACLK"] #[inline(always)] pub fn is_hfrcoem23(&self) -> bool { - *self == CLKSEL_A::HFRCOEM23 + *self == Clksel::Hfrcoem23 } - #[doc = "Checks if the value of the field is `HFRCODPLLRT`"] + #[doc = "HFRCODPLL (retimed) is clocking EM01GRPACLK. Check with datasheet for frequency limitation when using retiming with voltage scaling."] #[inline(always)] pub fn is_hfrcodpllrt(&self) -> bool { - *self == CLKSEL_A::HFRCODPLLRT + *self == Clksel::Hfrcodpllrt } - #[doc = "Checks if the value of the field is `HFXORT`"] + #[doc = "HFXO (retimed) is clocking EM01GRPACLK. Check with datasheet for frequency limitation when using retiming with voltage scaling."] #[inline(always)] pub fn is_hfxort(&self) -> bool { - *self == CLKSEL_A::HFXORT + *self == Clksel::Hfxort } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EM01GRPACLKCTRL_SPEC, u8, CLKSEL_A, 3, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "HFRCODPLL is clocking EM01GRPACLK"] #[inline(always)] - pub fn hfrcodpll(self) -> &'a mut W { - self.variant(CLKSEL_A::HFRCODPLL) + pub fn hfrcodpll(self) -> &'a mut crate::W { + self.variant(Clksel::Hfrcodpll) } #[doc = "HFXO is clocking EM01GRPACLK"] #[inline(always)] - pub fn hfxo(self) -> &'a mut W { - self.variant(CLKSEL_A::HFXO) + pub fn hfxo(self) -> &'a mut crate::W { + self.variant(Clksel::Hfxo) } #[doc = "FSRCO is clocking EM01GRPACLK"] #[inline(always)] - pub fn fsrco(self) -> &'a mut W { - self.variant(CLKSEL_A::FSRCO) + pub fn fsrco(self) -> &'a mut crate::W { + self.variant(Clksel::Fsrco) } #[doc = "HFRCOEM23 is clocking EM01GRPACLK"] #[inline(always)] - pub fn hfrcoem23(self) -> &'a mut W { - self.variant(CLKSEL_A::HFRCOEM23) + pub fn hfrcoem23(self) -> &'a mut crate::W { + self.variant(Clksel::Hfrcoem23) } #[doc = "HFRCODPLL (retimed) is clocking EM01GRPACLK. Check with datasheet for frequency limitation when using retiming with voltage scaling."] #[inline(always)] - pub fn hfrcodpllrt(self) -> &'a mut W { - self.variant(CLKSEL_A::HFRCODPLLRT) + pub fn hfrcodpllrt(self) -> &'a mut crate::W { + self.variant(Clksel::Hfrcodpllrt) } #[doc = "HFXO (retimed) is clocking EM01GRPACLK. Check with datasheet for frequency limitation when using retiming with voltage scaling."] #[inline(always)] - pub fn hfxort(self) -> &'a mut W { - self.variant(CLKSEL_A::HFXORT) + pub fn hfxort(self) -> &'a mut crate::W { + self.variant(Clksel::Hfxort) } } impl R { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 7) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [em01grpaclkctrl](index.html) module"] -pub struct EM01GRPACLKCTRL_SPEC; -impl crate::RegisterSpec for EM01GRPACLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em01grpaclkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em01grpaclkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Em01grpaclkctrlSpec; +impl crate::RegisterSpec for Em01grpaclkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [em01grpaclkctrl::R](R) reader structure"] -impl crate::Readable for EM01GRPACLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [em01grpaclkctrl::W](W) writer structure"] -impl crate::Writable for EM01GRPACLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`em01grpaclkctrl::R`](R) reader structure"] +impl crate::Readable for Em01grpaclkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`em01grpaclkctrl::W`](W) writer structure"] +impl crate::Writable for Em01grpaclkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EM01GRPACLKCTRL to value 0x01"] -impl crate::Resettable for EM01GRPACLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for Em01grpaclkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/em01grpcclkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/em01grpcclkctrl.rs index dd9019e..50f556d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/em01grpcclkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/em01grpcclkctrl.rs @@ -1,181 +1,148 @@ #[doc = "Register `EM01GRPCCLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EM01GRPCCLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "1: HFRCODPLL is clocking EM01GRPCCLK"] - HFRCODPLL = 1, + Hfrcodpll = 1, #[doc = "2: HFXO is clocking EM01GRPCCLK"] - HFXO = 2, + Hfxo = 2, #[doc = "3: FSRCO is clocking EM01GRPCCLK"] - FSRCO = 3, + Fsrco = 3, #[doc = "4: HFRCOEM23 is clocking EM01GRPCCLK"] - HFRCOEM23 = 4, + Hfrcoem23 = 4, #[doc = "5: HFRCODPLL (retimed) is clocking EM01GRPCCLK. Check with datasheet for frequency limitation when using retiming with voltage scaling."] - HFRCODPLLRT = 5, + Hfrcodpllrt = 5, #[doc = "6: HFXO (retimed) is clocking EM01GRPCCLK. Check with datasheet for frequency limitation when using retiming with voltage scaling."] - HFXORT = 6, + Hfxort = 6, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(CLKSEL_A::HFRCODPLL), - 2 => Some(CLKSEL_A::HFXO), - 3 => Some(CLKSEL_A::FSRCO), - 4 => Some(CLKSEL_A::HFRCOEM23), - 5 => Some(CLKSEL_A::HFRCODPLLRT), - 6 => Some(CLKSEL_A::HFXORT), + 1 => Some(Clksel::Hfrcodpll), + 2 => Some(Clksel::Hfxo), + 3 => Some(Clksel::Fsrco), + 4 => Some(Clksel::Hfrcoem23), + 5 => Some(Clksel::Hfrcodpllrt), + 6 => Some(Clksel::Hfxort), _ => None, } } - #[doc = "Checks if the value of the field is `HFRCODPLL`"] + #[doc = "HFRCODPLL is clocking EM01GRPCCLK"] #[inline(always)] pub fn is_hfrcodpll(&self) -> bool { - *self == CLKSEL_A::HFRCODPLL + *self == Clksel::Hfrcodpll } - #[doc = "Checks if the value of the field is `HFXO`"] + #[doc = "HFXO is clocking EM01GRPCCLK"] #[inline(always)] pub fn is_hfxo(&self) -> bool { - *self == CLKSEL_A::HFXO + *self == Clksel::Hfxo } - #[doc = "Checks if the value of the field is `FSRCO`"] + #[doc = "FSRCO is clocking EM01GRPCCLK"] #[inline(always)] pub fn is_fsrco(&self) -> bool { - *self == CLKSEL_A::FSRCO + *self == Clksel::Fsrco } - #[doc = "Checks if the value of the field is `HFRCOEM23`"] + #[doc = "HFRCOEM23 is clocking EM01GRPCCLK"] #[inline(always)] pub fn is_hfrcoem23(&self) -> bool { - *self == CLKSEL_A::HFRCOEM23 + *self == Clksel::Hfrcoem23 } - #[doc = "Checks if the value of the field is `HFRCODPLLRT`"] + #[doc = "HFRCODPLL (retimed) is clocking EM01GRPCCLK. Check with datasheet for frequency limitation when using retiming with voltage scaling."] #[inline(always)] pub fn is_hfrcodpllrt(&self) -> bool { - *self == CLKSEL_A::HFRCODPLLRT + *self == Clksel::Hfrcodpllrt } - #[doc = "Checks if the value of the field is `HFXORT`"] + #[doc = "HFXO (retimed) is clocking EM01GRPCCLK. Check with datasheet for frequency limitation when using retiming with voltage scaling."] #[inline(always)] pub fn is_hfxort(&self) -> bool { - *self == CLKSEL_A::HFXORT + *self == Clksel::Hfxort } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EM01GRPCCLKCTRL_SPEC, u8, CLKSEL_A, 3, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "HFRCODPLL is clocking EM01GRPCCLK"] #[inline(always)] - pub fn hfrcodpll(self) -> &'a mut W { - self.variant(CLKSEL_A::HFRCODPLL) + pub fn hfrcodpll(self) -> &'a mut crate::W { + self.variant(Clksel::Hfrcodpll) } #[doc = "HFXO is clocking EM01GRPCCLK"] #[inline(always)] - pub fn hfxo(self) -> &'a mut W { - self.variant(CLKSEL_A::HFXO) + pub fn hfxo(self) -> &'a mut crate::W { + self.variant(Clksel::Hfxo) } #[doc = "FSRCO is clocking EM01GRPCCLK"] #[inline(always)] - pub fn fsrco(self) -> &'a mut W { - self.variant(CLKSEL_A::FSRCO) + pub fn fsrco(self) -> &'a mut crate::W { + self.variant(Clksel::Fsrco) } #[doc = "HFRCOEM23 is clocking EM01GRPCCLK"] #[inline(always)] - pub fn hfrcoem23(self) -> &'a mut W { - self.variant(CLKSEL_A::HFRCOEM23) + pub fn hfrcoem23(self) -> &'a mut crate::W { + self.variant(Clksel::Hfrcoem23) } #[doc = "HFRCODPLL (retimed) is clocking EM01GRPCCLK. Check with datasheet for frequency limitation when using retiming with voltage scaling."] #[inline(always)] - pub fn hfrcodpllrt(self) -> &'a mut W { - self.variant(CLKSEL_A::HFRCODPLLRT) + pub fn hfrcodpllrt(self) -> &'a mut crate::W { + self.variant(Clksel::Hfrcodpllrt) } #[doc = "HFXO (retimed) is clocking EM01GRPCCLK. Check with datasheet for frequency limitation when using retiming with voltage scaling."] #[inline(always)] - pub fn hfxort(self) -> &'a mut W { - self.variant(CLKSEL_A::HFXORT) + pub fn hfxort(self) -> &'a mut crate::W { + self.variant(Clksel::Hfxort) } } impl R { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 7) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [em01grpcclkctrl](index.html) module"] -pub struct EM01GRPCCLKCTRL_SPEC; -impl crate::RegisterSpec for EM01GRPCCLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em01grpcclkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em01grpcclkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Em01grpcclkctrlSpec; +impl crate::RegisterSpec for Em01grpcclkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [em01grpcclkctrl::R](R) reader structure"] -impl crate::Readable for EM01GRPCCLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [em01grpcclkctrl::W](W) writer structure"] -impl crate::Writable for EM01GRPCCLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`em01grpcclkctrl::R`](R) reader structure"] +impl crate::Readable for Em01grpcclkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`em01grpcclkctrl::W`](W) writer structure"] +impl crate::Writable for Em01grpcclkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EM01GRPCCLKCTRL to value 0x01"] -impl crate::Resettable for EM01GRPCCLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for Em01grpcclkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/em23grpaclkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/em23grpaclkctrl.rs index a5b3a78..8cc818b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/em23grpaclkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/em23grpaclkctrl.rs @@ -1,142 +1,109 @@ #[doc = "Register `EM23GRPACLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EM23GRPACLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "1: LFRCO is clocking EM23GRPACLK"] - LFRCO = 1, + Lfrco = 1, #[doc = "2: LFXO is clocking EM23GRPACLK"] - LFXO = 2, + Lfxo = 2, #[doc = "3: ULFRCO is clocking EM23GRPACLK"] - ULFRCO = 3, + Ulfrco = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(CLKSEL_A::LFRCO), - 2 => Some(CLKSEL_A::LFXO), - 3 => Some(CLKSEL_A::ULFRCO), + 1 => Some(Clksel::Lfrco), + 2 => Some(Clksel::Lfxo), + 3 => Some(Clksel::Ulfrco), _ => None, } } - #[doc = "Checks if the value of the field is `LFRCO`"] + #[doc = "LFRCO is clocking EM23GRPACLK"] #[inline(always)] pub fn is_lfrco(&self) -> bool { - *self == CLKSEL_A::LFRCO + *self == Clksel::Lfrco } - #[doc = "Checks if the value of the field is `LFXO`"] + #[doc = "LFXO is clocking EM23GRPACLK"] #[inline(always)] pub fn is_lfxo(&self) -> bool { - *self == CLKSEL_A::LFXO + *self == Clksel::Lfxo } - #[doc = "Checks if the value of the field is `ULFRCO`"] + #[doc = "ULFRCO is clocking EM23GRPACLK"] #[inline(always)] pub fn is_ulfrco(&self) -> bool { - *self == CLKSEL_A::ULFRCO + *self == Clksel::Ulfrco } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EM23GRPACLKCTRL_SPEC, u8, CLKSEL_A, 2, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "LFRCO is clocking EM23GRPACLK"] #[inline(always)] - pub fn lfrco(self) -> &'a mut W { - self.variant(CLKSEL_A::LFRCO) + pub fn lfrco(self) -> &'a mut crate::W { + self.variant(Clksel::Lfrco) } #[doc = "LFXO is clocking EM23GRPACLK"] #[inline(always)] - pub fn lfxo(self) -> &'a mut W { - self.variant(CLKSEL_A::LFXO) + pub fn lfxo(self) -> &'a mut crate::W { + self.variant(Clksel::Lfxo) } #[doc = "ULFRCO is clocking EM23GRPACLK"] #[inline(always)] - pub fn ulfrco(self) -> &'a mut W { - self.variant(CLKSEL_A::ULFRCO) + pub fn ulfrco(self) -> &'a mut crate::W { + self.variant(Clksel::Ulfrco) } } impl R { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 3) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [em23grpaclkctrl](index.html) module"] -pub struct EM23GRPACLKCTRL_SPEC; -impl crate::RegisterSpec for EM23GRPACLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em23grpaclkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em23grpaclkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Em23grpaclkctrlSpec; +impl crate::RegisterSpec for Em23grpaclkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [em23grpaclkctrl::R](R) reader structure"] -impl crate::Readable for EM23GRPACLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [em23grpaclkctrl::W](W) writer structure"] -impl crate::Writable for EM23GRPACLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`em23grpaclkctrl::R`](R) reader structure"] +impl crate::Readable for Em23grpaclkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`em23grpaclkctrl::W`](W) writer structure"] +impl crate::Writable for Em23grpaclkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EM23GRPACLKCTRL to value 0x01"] -impl crate::Resettable for EM23GRPACLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for Em23grpaclkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/em4grpaclkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/em4grpaclkctrl.rs index 5993f70..7c56ae2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/em4grpaclkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/em4grpaclkctrl.rs @@ -1,142 +1,109 @@ #[doc = "Register `EM4GRPACLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EM4GRPACLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "1: LFRCO is clocking EM4GRPACLK"] - LFRCO = 1, + Lfrco = 1, #[doc = "2: LFXO is clocking EM4GRPACLK"] - LFXO = 2, + Lfxo = 2, #[doc = "3: ULFRCO is clocking EM4GRPACLK"] - ULFRCO = 3, + Ulfrco = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(CLKSEL_A::LFRCO), - 2 => Some(CLKSEL_A::LFXO), - 3 => Some(CLKSEL_A::ULFRCO), + 1 => Some(Clksel::Lfrco), + 2 => Some(Clksel::Lfxo), + 3 => Some(Clksel::Ulfrco), _ => None, } } - #[doc = "Checks if the value of the field is `LFRCO`"] + #[doc = "LFRCO is clocking EM4GRPACLK"] #[inline(always)] pub fn is_lfrco(&self) -> bool { - *self == CLKSEL_A::LFRCO + *self == Clksel::Lfrco } - #[doc = "Checks if the value of the field is `LFXO`"] + #[doc = "LFXO is clocking EM4GRPACLK"] #[inline(always)] pub fn is_lfxo(&self) -> bool { - *self == CLKSEL_A::LFXO + *self == Clksel::Lfxo } - #[doc = "Checks if the value of the field is `ULFRCO`"] + #[doc = "ULFRCO is clocking EM4GRPACLK"] #[inline(always)] pub fn is_ulfrco(&self) -> bool { - *self == CLKSEL_A::ULFRCO + *self == Clksel::Ulfrco } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EM4GRPACLKCTRL_SPEC, u8, CLKSEL_A, 2, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "LFRCO is clocking EM4GRPACLK"] #[inline(always)] - pub fn lfrco(self) -> &'a mut W { - self.variant(CLKSEL_A::LFRCO) + pub fn lfrco(self) -> &'a mut crate::W { + self.variant(Clksel::Lfrco) } #[doc = "LFXO is clocking EM4GRPACLK"] #[inline(always)] - pub fn lfxo(self) -> &'a mut W { - self.variant(CLKSEL_A::LFXO) + pub fn lfxo(self) -> &'a mut crate::W { + self.variant(Clksel::Lfxo) } #[doc = "ULFRCO is clocking EM4GRPACLK"] #[inline(always)] - pub fn ulfrco(self) -> &'a mut W { - self.variant(CLKSEL_A::ULFRCO) + pub fn ulfrco(self) -> &'a mut crate::W { + self.variant(Clksel::Ulfrco) } } impl R { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 3) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [em4grpaclkctrl](index.html) module"] -pub struct EM4GRPACLKCTRL_SPEC; -impl crate::RegisterSpec for EM4GRPACLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em4grpaclkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em4grpaclkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Em4grpaclkctrlSpec; +impl crate::RegisterSpec for Em4grpaclkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [em4grpaclkctrl::R](R) reader structure"] -impl crate::Readable for EM4GRPACLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [em4grpaclkctrl::W](W) writer structure"] -impl crate::Writable for EM4GRPACLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`em4grpaclkctrl::R`](R) reader structure"] +impl crate::Readable for Em4grpaclkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`em4grpaclkctrl::W`](W) writer structure"] +impl crate::Writable for Em4grpaclkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EM4GRPACLKCTRL to value 0x01"] -impl crate::Resettable for EM4GRPACLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for Em4grpaclkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/eusart0clkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/eusart0clkctrl.rs index f4b2edb..372f023 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/eusart0clkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/eusart0clkctrl.rs @@ -1,168 +1,135 @@ #[doc = "Register `EUSART0CLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART0CLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "0: EUSART0 is not clocked"] - DISABLED = 0, + Disabled = 0, #[doc = "1: EM01GRPCCLK is clocking EUSART0"] - EM01GRPCCLK = 1, + Em01grpcclk = 1, #[doc = "2: HFRCOEM23 is clocking EUSART0"] - HFRCOEM23 = 2, + Hfrcoem23 = 2, #[doc = "3: LFRCO is clocking EUSART0"] - LFRCO = 3, + Lfrco = 3, #[doc = "4: LFXO is clocking EUSART0"] - LFXO = 4, + Lfxo = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKSEL_A::DISABLED), - 1 => Some(CLKSEL_A::EM01GRPCCLK), - 2 => Some(CLKSEL_A::HFRCOEM23), - 3 => Some(CLKSEL_A::LFRCO), - 4 => Some(CLKSEL_A::LFXO), + 0 => Some(Clksel::Disabled), + 1 => Some(Clksel::Em01grpcclk), + 2 => Some(Clksel::Hfrcoem23), + 3 => Some(Clksel::Lfrco), + 4 => Some(Clksel::Lfxo), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "EUSART0 is not clocked"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == CLKSEL_A::DISABLED + *self == Clksel::Disabled } - #[doc = "Checks if the value of the field is `EM01GRPCCLK`"] + #[doc = "EM01GRPCCLK is clocking EUSART0"] #[inline(always)] pub fn is_em01grpcclk(&self) -> bool { - *self == CLKSEL_A::EM01GRPCCLK + *self == Clksel::Em01grpcclk } - #[doc = "Checks if the value of the field is `HFRCOEM23`"] + #[doc = "HFRCOEM23 is clocking EUSART0"] #[inline(always)] pub fn is_hfrcoem23(&self) -> bool { - *self == CLKSEL_A::HFRCOEM23 + *self == Clksel::Hfrcoem23 } - #[doc = "Checks if the value of the field is `LFRCO`"] + #[doc = "LFRCO is clocking EUSART0"] #[inline(always)] pub fn is_lfrco(&self) -> bool { - *self == CLKSEL_A::LFRCO + *self == Clksel::Lfrco } - #[doc = "Checks if the value of the field is `LFXO`"] + #[doc = "LFXO is clocking EUSART0"] #[inline(always)] pub fn is_lfxo(&self) -> bool { - *self == CLKSEL_A::LFXO + *self == Clksel::Lfxo } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EUSART0CLKCTRL_SPEC, u8, CLKSEL_A, 3, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "EUSART0 is not clocked"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(CLKSEL_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Clksel::Disabled) } #[doc = "EM01GRPCCLK is clocking EUSART0"] #[inline(always)] - pub fn em01grpcclk(self) -> &'a mut W { - self.variant(CLKSEL_A::EM01GRPCCLK) + pub fn em01grpcclk(self) -> &'a mut crate::W { + self.variant(Clksel::Em01grpcclk) } #[doc = "HFRCOEM23 is clocking EUSART0"] #[inline(always)] - pub fn hfrcoem23(self) -> &'a mut W { - self.variant(CLKSEL_A::HFRCOEM23) + pub fn hfrcoem23(self) -> &'a mut crate::W { + self.variant(Clksel::Hfrcoem23) } #[doc = "LFRCO is clocking EUSART0"] #[inline(always)] - pub fn lfrco(self) -> &'a mut W { - self.variant(CLKSEL_A::LFRCO) + pub fn lfrco(self) -> &'a mut crate::W { + self.variant(Clksel::Lfrco) } #[doc = "LFXO is clocking EUSART0"] #[inline(always)] - pub fn lfxo(self) -> &'a mut W { - self.variant(CLKSEL_A::LFXO) + pub fn lfxo(self) -> &'a mut crate::W { + self.variant(Clksel::Lfxo) } } impl R { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 7) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart0clkctrl](index.html) module"] -pub struct EUSART0CLKCTRL_SPEC; -impl crate::RegisterSpec for EUSART0CLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0clkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0clkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart0clkctrlSpec; +impl crate::RegisterSpec for Eusart0clkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart0clkctrl::R](R) reader structure"] -impl crate::Readable for EUSART0CLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart0clkctrl::W](W) writer structure"] -impl crate::Writable for EUSART0CLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart0clkctrl::R`](R) reader structure"] +impl crate::Readable for Eusart0clkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart0clkctrl::W`](W) writer structure"] +impl crate::Writable for Eusart0clkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART0CLKCTRL to value 0x01"] -impl crate::Resettable for EUSART0CLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for Eusart0clkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/exportclkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/exportclkctrl.rs index 4956446..3baca69 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/exportclkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/exportclkctrl.rs @@ -1,584 +1,565 @@ #[doc = "Register `EXPORTCLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EXPORTCLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKOUTSEL0` reader - Clock Output Select 0"] -pub type CLKOUTSEL0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Output Select 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKOUTSEL0_A { +pub enum Clkoutsel0 { #[doc = "0: CLKOUT0 is not clocked"] - DISABLED = 0, + Disabled = 0, #[doc = "1: HCLK is clocking CLKOUT0"] - HCLK = 1, + Hclk = 1, #[doc = "2: EXPORTCLK is clocking CLKOUT0"] - HFEXPCLK = 2, + Hfexpclk = 2, #[doc = "3: ULFRCO is clocking CLKOUT0"] - ULFRCO = 3, + Ulfrco = 3, #[doc = "4: LFRCO is clocking CLKOUT0"] - LFRCO = 4, + Lfrco = 4, #[doc = "5: LFXO is clocking CLKOUT0"] - LFXO = 5, + Lfxo = 5, #[doc = "6: HFRCODPLL is clocking CLKOUT0"] - HFRCODPLL = 6, + Hfrcodpll = 6, #[doc = "7: HFXO is clocking CLKOUT0"] - HFXO = 7, + Hfxo = 7, #[doc = "8: FSRCO is clocking CLKOUT0"] - FSRCO = 8, + Fsrco = 8, #[doc = "9: HFRCOEM23 is clocking CLKOUT0"] - HFRCOEM23 = 9, + Hfrcoem23 = 9, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKOUTSEL0_A) -> Self { + fn from(variant: Clkoutsel0) -> Self { variant as _ } } -impl CLKOUTSEL0_R { +impl crate::FieldSpec for Clkoutsel0 { + type Ux = u8; +} +impl crate::IsEnum for Clkoutsel0 {} +#[doc = "Field `CLKOUTSEL0` reader - Clock Output Select 0"] +pub type Clkoutsel0R = crate::FieldReader; +impl Clkoutsel0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKOUTSEL0_A::DISABLED), - 1 => Some(CLKOUTSEL0_A::HCLK), - 2 => Some(CLKOUTSEL0_A::HFEXPCLK), - 3 => Some(CLKOUTSEL0_A::ULFRCO), - 4 => Some(CLKOUTSEL0_A::LFRCO), - 5 => Some(CLKOUTSEL0_A::LFXO), - 6 => Some(CLKOUTSEL0_A::HFRCODPLL), - 7 => Some(CLKOUTSEL0_A::HFXO), - 8 => Some(CLKOUTSEL0_A::FSRCO), - 9 => Some(CLKOUTSEL0_A::HFRCOEM23), + 0 => Some(Clkoutsel0::Disabled), + 1 => Some(Clkoutsel0::Hclk), + 2 => Some(Clkoutsel0::Hfexpclk), + 3 => Some(Clkoutsel0::Ulfrco), + 4 => Some(Clkoutsel0::Lfrco), + 5 => Some(Clkoutsel0::Lfxo), + 6 => Some(Clkoutsel0::Hfrcodpll), + 7 => Some(Clkoutsel0::Hfxo), + 8 => Some(Clkoutsel0::Fsrco), + 9 => Some(Clkoutsel0::Hfrcoem23), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "CLKOUT0 is not clocked"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == CLKOUTSEL0_A::DISABLED + *self == Clkoutsel0::Disabled } - #[doc = "Checks if the value of the field is `HCLK`"] + #[doc = "HCLK is clocking CLKOUT0"] #[inline(always)] pub fn is_hclk(&self) -> bool { - *self == CLKOUTSEL0_A::HCLK + *self == Clkoutsel0::Hclk } - #[doc = "Checks if the value of the field is `HFEXPCLK`"] + #[doc = "EXPORTCLK is clocking CLKOUT0"] #[inline(always)] pub fn is_hfexpclk(&self) -> bool { - *self == CLKOUTSEL0_A::HFEXPCLK + *self == Clkoutsel0::Hfexpclk } - #[doc = "Checks if the value of the field is `ULFRCO`"] + #[doc = "ULFRCO is clocking CLKOUT0"] #[inline(always)] pub fn is_ulfrco(&self) -> bool { - *self == CLKOUTSEL0_A::ULFRCO + *self == Clkoutsel0::Ulfrco } - #[doc = "Checks if the value of the field is `LFRCO`"] + #[doc = "LFRCO is clocking CLKOUT0"] #[inline(always)] pub fn is_lfrco(&self) -> bool { - *self == CLKOUTSEL0_A::LFRCO + *self == Clkoutsel0::Lfrco } - #[doc = "Checks if the value of the field is `LFXO`"] + #[doc = "LFXO is clocking CLKOUT0"] #[inline(always)] pub fn is_lfxo(&self) -> bool { - *self == CLKOUTSEL0_A::LFXO + *self == Clkoutsel0::Lfxo } - #[doc = "Checks if the value of the field is `HFRCODPLL`"] + #[doc = "HFRCODPLL is clocking CLKOUT0"] #[inline(always)] pub fn is_hfrcodpll(&self) -> bool { - *self == CLKOUTSEL0_A::HFRCODPLL + *self == Clkoutsel0::Hfrcodpll } - #[doc = "Checks if the value of the field is `HFXO`"] + #[doc = "HFXO is clocking CLKOUT0"] #[inline(always)] pub fn is_hfxo(&self) -> bool { - *self == CLKOUTSEL0_A::HFXO + *self == Clkoutsel0::Hfxo } - #[doc = "Checks if the value of the field is `FSRCO`"] + #[doc = "FSRCO is clocking CLKOUT0"] #[inline(always)] pub fn is_fsrco(&self) -> bool { - *self == CLKOUTSEL0_A::FSRCO + *self == Clkoutsel0::Fsrco } - #[doc = "Checks if the value of the field is `HFRCOEM23`"] + #[doc = "HFRCOEM23 is clocking CLKOUT0"] #[inline(always)] pub fn is_hfrcoem23(&self) -> bool { - *self == CLKOUTSEL0_A::HFRCOEM23 + *self == Clkoutsel0::Hfrcoem23 } } #[doc = "Field `CLKOUTSEL0` writer - Clock Output Select 0"] -pub type CLKOUTSEL0_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EXPORTCLKCTRL_SPEC, u8, CLKOUTSEL0_A, 4, O>; -impl<'a, const O: u8> CLKOUTSEL0_W<'a, O> { +pub type Clkoutsel0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Clkoutsel0>; +impl<'a, REG> Clkoutsel0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "CLKOUT0 is not clocked"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(CLKOUTSEL0_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Clkoutsel0::Disabled) } #[doc = "HCLK is clocking CLKOUT0"] #[inline(always)] - pub fn hclk(self) -> &'a mut W { - self.variant(CLKOUTSEL0_A::HCLK) + pub fn hclk(self) -> &'a mut crate::W { + self.variant(Clkoutsel0::Hclk) } #[doc = "EXPORTCLK is clocking CLKOUT0"] #[inline(always)] - pub fn hfexpclk(self) -> &'a mut W { - self.variant(CLKOUTSEL0_A::HFEXPCLK) + pub fn hfexpclk(self) -> &'a mut crate::W { + self.variant(Clkoutsel0::Hfexpclk) } #[doc = "ULFRCO is clocking CLKOUT0"] #[inline(always)] - pub fn ulfrco(self) -> &'a mut W { - self.variant(CLKOUTSEL0_A::ULFRCO) + pub fn ulfrco(self) -> &'a mut crate::W { + self.variant(Clkoutsel0::Ulfrco) } #[doc = "LFRCO is clocking CLKOUT0"] #[inline(always)] - pub fn lfrco(self) -> &'a mut W { - self.variant(CLKOUTSEL0_A::LFRCO) + pub fn lfrco(self) -> &'a mut crate::W { + self.variant(Clkoutsel0::Lfrco) } #[doc = "LFXO is clocking CLKOUT0"] #[inline(always)] - pub fn lfxo(self) -> &'a mut W { - self.variant(CLKOUTSEL0_A::LFXO) + pub fn lfxo(self) -> &'a mut crate::W { + self.variant(Clkoutsel0::Lfxo) } #[doc = "HFRCODPLL is clocking CLKOUT0"] #[inline(always)] - pub fn hfrcodpll(self) -> &'a mut W { - self.variant(CLKOUTSEL0_A::HFRCODPLL) + pub fn hfrcodpll(self) -> &'a mut crate::W { + self.variant(Clkoutsel0::Hfrcodpll) } #[doc = "HFXO is clocking CLKOUT0"] #[inline(always)] - pub fn hfxo(self) -> &'a mut W { - self.variant(CLKOUTSEL0_A::HFXO) + pub fn hfxo(self) -> &'a mut crate::W { + self.variant(Clkoutsel0::Hfxo) } #[doc = "FSRCO is clocking CLKOUT0"] #[inline(always)] - pub fn fsrco(self) -> &'a mut W { - self.variant(CLKOUTSEL0_A::FSRCO) + pub fn fsrco(self) -> &'a mut crate::W { + self.variant(Clkoutsel0::Fsrco) } #[doc = "HFRCOEM23 is clocking CLKOUT0"] #[inline(always)] - pub fn hfrcoem23(self) -> &'a mut W { - self.variant(CLKOUTSEL0_A::HFRCOEM23) + pub fn hfrcoem23(self) -> &'a mut crate::W { + self.variant(Clkoutsel0::Hfrcoem23) } } -#[doc = "Field `CLKOUTSEL1` reader - Clock Output Select 1"] -pub type CLKOUTSEL1_R = crate::FieldReader; #[doc = "Clock Output Select 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKOUTSEL1_A { +pub enum Clkoutsel1 { #[doc = "0: CLKOUT1 is not clocked"] - DISABLED = 0, + Disabled = 0, #[doc = "1: HCLK is clocking CLKOUT1"] - HCLK = 1, + Hclk = 1, #[doc = "2: EXPORTCLK is clocking CLKOUT1"] - HFEXPCLK = 2, + Hfexpclk = 2, #[doc = "3: ULFRCO is clocking CLKOUT1"] - ULFRCO = 3, + Ulfrco = 3, #[doc = "4: LFRCO is clocking CLKOUT1"] - LFRCO = 4, + Lfrco = 4, #[doc = "5: LFXO is clocking CLKOUT1"] - LFXO = 5, + Lfxo = 5, #[doc = "6: HFRCODPLL is clocking CLKOUT1"] - HFRCODPLL = 6, + Hfrcodpll = 6, #[doc = "7: HFXO is clocking CLKOUT1"] - HFXO = 7, + Hfxo = 7, #[doc = "8: FSRCO is clocking CLKOUT1"] - FSRCO = 8, + Fsrco = 8, #[doc = "9: HFRCOEM23 is clocking CLKOUT1"] - HFRCOEM23 = 9, + Hfrcoem23 = 9, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKOUTSEL1_A) -> Self { + fn from(variant: Clkoutsel1) -> Self { variant as _ } } -impl CLKOUTSEL1_R { +impl crate::FieldSpec for Clkoutsel1 { + type Ux = u8; +} +impl crate::IsEnum for Clkoutsel1 {} +#[doc = "Field `CLKOUTSEL1` reader - Clock Output Select 1"] +pub type Clkoutsel1R = crate::FieldReader; +impl Clkoutsel1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKOUTSEL1_A::DISABLED), - 1 => Some(CLKOUTSEL1_A::HCLK), - 2 => Some(CLKOUTSEL1_A::HFEXPCLK), - 3 => Some(CLKOUTSEL1_A::ULFRCO), - 4 => Some(CLKOUTSEL1_A::LFRCO), - 5 => Some(CLKOUTSEL1_A::LFXO), - 6 => Some(CLKOUTSEL1_A::HFRCODPLL), - 7 => Some(CLKOUTSEL1_A::HFXO), - 8 => Some(CLKOUTSEL1_A::FSRCO), - 9 => Some(CLKOUTSEL1_A::HFRCOEM23), + 0 => Some(Clkoutsel1::Disabled), + 1 => Some(Clkoutsel1::Hclk), + 2 => Some(Clkoutsel1::Hfexpclk), + 3 => Some(Clkoutsel1::Ulfrco), + 4 => Some(Clkoutsel1::Lfrco), + 5 => Some(Clkoutsel1::Lfxo), + 6 => Some(Clkoutsel1::Hfrcodpll), + 7 => Some(Clkoutsel1::Hfxo), + 8 => Some(Clkoutsel1::Fsrco), + 9 => Some(Clkoutsel1::Hfrcoem23), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "CLKOUT1 is not clocked"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == CLKOUTSEL1_A::DISABLED + *self == Clkoutsel1::Disabled } - #[doc = "Checks if the value of the field is `HCLK`"] + #[doc = "HCLK is clocking CLKOUT1"] #[inline(always)] pub fn is_hclk(&self) -> bool { - *self == CLKOUTSEL1_A::HCLK + *self == Clkoutsel1::Hclk } - #[doc = "Checks if the value of the field is `HFEXPCLK`"] + #[doc = "EXPORTCLK is clocking CLKOUT1"] #[inline(always)] pub fn is_hfexpclk(&self) -> bool { - *self == CLKOUTSEL1_A::HFEXPCLK + *self == Clkoutsel1::Hfexpclk } - #[doc = "Checks if the value of the field is `ULFRCO`"] + #[doc = "ULFRCO is clocking CLKOUT1"] #[inline(always)] pub fn is_ulfrco(&self) -> bool { - *self == CLKOUTSEL1_A::ULFRCO + *self == Clkoutsel1::Ulfrco } - #[doc = "Checks if the value of the field is `LFRCO`"] + #[doc = "LFRCO is clocking CLKOUT1"] #[inline(always)] pub fn is_lfrco(&self) -> bool { - *self == CLKOUTSEL1_A::LFRCO + *self == Clkoutsel1::Lfrco } - #[doc = "Checks if the value of the field is `LFXO`"] + #[doc = "LFXO is clocking CLKOUT1"] #[inline(always)] pub fn is_lfxo(&self) -> bool { - *self == CLKOUTSEL1_A::LFXO + *self == Clkoutsel1::Lfxo } - #[doc = "Checks if the value of the field is `HFRCODPLL`"] + #[doc = "HFRCODPLL is clocking CLKOUT1"] #[inline(always)] pub fn is_hfrcodpll(&self) -> bool { - *self == CLKOUTSEL1_A::HFRCODPLL + *self == Clkoutsel1::Hfrcodpll } - #[doc = "Checks if the value of the field is `HFXO`"] + #[doc = "HFXO is clocking CLKOUT1"] #[inline(always)] pub fn is_hfxo(&self) -> bool { - *self == CLKOUTSEL1_A::HFXO + *self == Clkoutsel1::Hfxo } - #[doc = "Checks if the value of the field is `FSRCO`"] + #[doc = "FSRCO is clocking CLKOUT1"] #[inline(always)] pub fn is_fsrco(&self) -> bool { - *self == CLKOUTSEL1_A::FSRCO + *self == Clkoutsel1::Fsrco } - #[doc = "Checks if the value of the field is `HFRCOEM23`"] + #[doc = "HFRCOEM23 is clocking CLKOUT1"] #[inline(always)] pub fn is_hfrcoem23(&self) -> bool { - *self == CLKOUTSEL1_A::HFRCOEM23 + *self == Clkoutsel1::Hfrcoem23 } } #[doc = "Field `CLKOUTSEL1` writer - Clock Output Select 1"] -pub type CLKOUTSEL1_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EXPORTCLKCTRL_SPEC, u8, CLKOUTSEL1_A, 4, O>; -impl<'a, const O: u8> CLKOUTSEL1_W<'a, O> { +pub type Clkoutsel1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Clkoutsel1>; +impl<'a, REG> Clkoutsel1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "CLKOUT1 is not clocked"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(CLKOUTSEL1_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Clkoutsel1::Disabled) } #[doc = "HCLK is clocking CLKOUT1"] #[inline(always)] - pub fn hclk(self) -> &'a mut W { - self.variant(CLKOUTSEL1_A::HCLK) + pub fn hclk(self) -> &'a mut crate::W { + self.variant(Clkoutsel1::Hclk) } #[doc = "EXPORTCLK is clocking CLKOUT1"] #[inline(always)] - pub fn hfexpclk(self) -> &'a mut W { - self.variant(CLKOUTSEL1_A::HFEXPCLK) + pub fn hfexpclk(self) -> &'a mut crate::W { + self.variant(Clkoutsel1::Hfexpclk) } #[doc = "ULFRCO is clocking CLKOUT1"] #[inline(always)] - pub fn ulfrco(self) -> &'a mut W { - self.variant(CLKOUTSEL1_A::ULFRCO) + pub fn ulfrco(self) -> &'a mut crate::W { + self.variant(Clkoutsel1::Ulfrco) } #[doc = "LFRCO is clocking CLKOUT1"] #[inline(always)] - pub fn lfrco(self) -> &'a mut W { - self.variant(CLKOUTSEL1_A::LFRCO) + pub fn lfrco(self) -> &'a mut crate::W { + self.variant(Clkoutsel1::Lfrco) } #[doc = "LFXO is clocking CLKOUT1"] #[inline(always)] - pub fn lfxo(self) -> &'a mut W { - self.variant(CLKOUTSEL1_A::LFXO) + pub fn lfxo(self) -> &'a mut crate::W { + self.variant(Clkoutsel1::Lfxo) } #[doc = "HFRCODPLL is clocking CLKOUT1"] #[inline(always)] - pub fn hfrcodpll(self) -> &'a mut W { - self.variant(CLKOUTSEL1_A::HFRCODPLL) + pub fn hfrcodpll(self) -> &'a mut crate::W { + self.variant(Clkoutsel1::Hfrcodpll) } #[doc = "HFXO is clocking CLKOUT1"] #[inline(always)] - pub fn hfxo(self) -> &'a mut W { - self.variant(CLKOUTSEL1_A::HFXO) + pub fn hfxo(self) -> &'a mut crate::W { + self.variant(Clkoutsel1::Hfxo) } #[doc = "FSRCO is clocking CLKOUT1"] #[inline(always)] - pub fn fsrco(self) -> &'a mut W { - self.variant(CLKOUTSEL1_A::FSRCO) + pub fn fsrco(self) -> &'a mut crate::W { + self.variant(Clkoutsel1::Fsrco) } #[doc = "HFRCOEM23 is clocking CLKOUT1"] #[inline(always)] - pub fn hfrcoem23(self) -> &'a mut W { - self.variant(CLKOUTSEL1_A::HFRCOEM23) + pub fn hfrcoem23(self) -> &'a mut crate::W { + self.variant(Clkoutsel1::Hfrcoem23) } } -#[doc = "Field `CLKOUTSEL2` reader - Clock Output Select 2"] -pub type CLKOUTSEL2_R = crate::FieldReader; #[doc = "Clock Output Select 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKOUTSEL2_A { +pub enum Clkoutsel2 { #[doc = "0: CLKOUT2 is not clocked"] - DISABLED = 0, + Disabled = 0, #[doc = "1: HCLK is clocking CLKOUT2"] - HCLK = 1, + Hclk = 1, #[doc = "2: EXPORTCLK is clocking CLKOUT2"] - HFEXPCLK = 2, + Hfexpclk = 2, #[doc = "3: ULFRCO is clocking CLKOUT2"] - ULFRCO = 3, + Ulfrco = 3, #[doc = "4: LFRCO is clocking CLKOUT2"] - LFRCO = 4, + Lfrco = 4, #[doc = "5: LFXO is clocking CLKOUT2"] - LFXO = 5, + Lfxo = 5, #[doc = "6: HFRCODPLL is clocking CLKOUT2"] - HFRCODPLL = 6, + Hfrcodpll = 6, #[doc = "7: HFXO is clocking CLKOUT2"] - HFXO = 7, + Hfxo = 7, #[doc = "8: FSRCO is clocking CLKOUT2"] - FSRCO = 8, + Fsrco = 8, #[doc = "9: HFRCOEM23 is clocking CLKOUT2"] - HFRCOEM23 = 9, + Hfrcoem23 = 9, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKOUTSEL2_A) -> Self { + fn from(variant: Clkoutsel2) -> Self { variant as _ } } -impl CLKOUTSEL2_R { +impl crate::FieldSpec for Clkoutsel2 { + type Ux = u8; +} +impl crate::IsEnum for Clkoutsel2 {} +#[doc = "Field `CLKOUTSEL2` reader - Clock Output Select 2"] +pub type Clkoutsel2R = crate::FieldReader; +impl Clkoutsel2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKOUTSEL2_A::DISABLED), - 1 => Some(CLKOUTSEL2_A::HCLK), - 2 => Some(CLKOUTSEL2_A::HFEXPCLK), - 3 => Some(CLKOUTSEL2_A::ULFRCO), - 4 => Some(CLKOUTSEL2_A::LFRCO), - 5 => Some(CLKOUTSEL2_A::LFXO), - 6 => Some(CLKOUTSEL2_A::HFRCODPLL), - 7 => Some(CLKOUTSEL2_A::HFXO), - 8 => Some(CLKOUTSEL2_A::FSRCO), - 9 => Some(CLKOUTSEL2_A::HFRCOEM23), + 0 => Some(Clkoutsel2::Disabled), + 1 => Some(Clkoutsel2::Hclk), + 2 => Some(Clkoutsel2::Hfexpclk), + 3 => Some(Clkoutsel2::Ulfrco), + 4 => Some(Clkoutsel2::Lfrco), + 5 => Some(Clkoutsel2::Lfxo), + 6 => Some(Clkoutsel2::Hfrcodpll), + 7 => Some(Clkoutsel2::Hfxo), + 8 => Some(Clkoutsel2::Fsrco), + 9 => Some(Clkoutsel2::Hfrcoem23), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "CLKOUT2 is not clocked"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == CLKOUTSEL2_A::DISABLED + *self == Clkoutsel2::Disabled } - #[doc = "Checks if the value of the field is `HCLK`"] + #[doc = "HCLK is clocking CLKOUT2"] #[inline(always)] pub fn is_hclk(&self) -> bool { - *self == CLKOUTSEL2_A::HCLK + *self == Clkoutsel2::Hclk } - #[doc = "Checks if the value of the field is `HFEXPCLK`"] + #[doc = "EXPORTCLK is clocking CLKOUT2"] #[inline(always)] pub fn is_hfexpclk(&self) -> bool { - *self == CLKOUTSEL2_A::HFEXPCLK + *self == Clkoutsel2::Hfexpclk } - #[doc = "Checks if the value of the field is `ULFRCO`"] + #[doc = "ULFRCO is clocking CLKOUT2"] #[inline(always)] pub fn is_ulfrco(&self) -> bool { - *self == CLKOUTSEL2_A::ULFRCO + *self == Clkoutsel2::Ulfrco } - #[doc = "Checks if the value of the field is `LFRCO`"] + #[doc = "LFRCO is clocking CLKOUT2"] #[inline(always)] pub fn is_lfrco(&self) -> bool { - *self == CLKOUTSEL2_A::LFRCO + *self == Clkoutsel2::Lfrco } - #[doc = "Checks if the value of the field is `LFXO`"] + #[doc = "LFXO is clocking CLKOUT2"] #[inline(always)] pub fn is_lfxo(&self) -> bool { - *self == CLKOUTSEL2_A::LFXO + *self == Clkoutsel2::Lfxo } - #[doc = "Checks if the value of the field is `HFRCODPLL`"] + #[doc = "HFRCODPLL is clocking CLKOUT2"] #[inline(always)] pub fn is_hfrcodpll(&self) -> bool { - *self == CLKOUTSEL2_A::HFRCODPLL + *self == Clkoutsel2::Hfrcodpll } - #[doc = "Checks if the value of the field is `HFXO`"] + #[doc = "HFXO is clocking CLKOUT2"] #[inline(always)] pub fn is_hfxo(&self) -> bool { - *self == CLKOUTSEL2_A::HFXO + *self == Clkoutsel2::Hfxo } - #[doc = "Checks if the value of the field is `FSRCO`"] + #[doc = "FSRCO is clocking CLKOUT2"] #[inline(always)] pub fn is_fsrco(&self) -> bool { - *self == CLKOUTSEL2_A::FSRCO + *self == Clkoutsel2::Fsrco } - #[doc = "Checks if the value of the field is `HFRCOEM23`"] + #[doc = "HFRCOEM23 is clocking CLKOUT2"] #[inline(always)] pub fn is_hfrcoem23(&self) -> bool { - *self == CLKOUTSEL2_A::HFRCOEM23 + *self == Clkoutsel2::Hfrcoem23 } } #[doc = "Field `CLKOUTSEL2` writer - Clock Output Select 2"] -pub type CLKOUTSEL2_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EXPORTCLKCTRL_SPEC, u8, CLKOUTSEL2_A, 4, O>; -impl<'a, const O: u8> CLKOUTSEL2_W<'a, O> { +pub type Clkoutsel2W<'a, REG> = crate::FieldWriter<'a, REG, 4, Clkoutsel2>; +impl<'a, REG> Clkoutsel2W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "CLKOUT2 is not clocked"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(CLKOUTSEL2_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Clkoutsel2::Disabled) } #[doc = "HCLK is clocking CLKOUT2"] #[inline(always)] - pub fn hclk(self) -> &'a mut W { - self.variant(CLKOUTSEL2_A::HCLK) + pub fn hclk(self) -> &'a mut crate::W { + self.variant(Clkoutsel2::Hclk) } #[doc = "EXPORTCLK is clocking CLKOUT2"] #[inline(always)] - pub fn hfexpclk(self) -> &'a mut W { - self.variant(CLKOUTSEL2_A::HFEXPCLK) + pub fn hfexpclk(self) -> &'a mut crate::W { + self.variant(Clkoutsel2::Hfexpclk) } #[doc = "ULFRCO is clocking CLKOUT2"] #[inline(always)] - pub fn ulfrco(self) -> &'a mut W { - self.variant(CLKOUTSEL2_A::ULFRCO) + pub fn ulfrco(self) -> &'a mut crate::W { + self.variant(Clkoutsel2::Ulfrco) } #[doc = "LFRCO is clocking CLKOUT2"] #[inline(always)] - pub fn lfrco(self) -> &'a mut W { - self.variant(CLKOUTSEL2_A::LFRCO) + pub fn lfrco(self) -> &'a mut crate::W { + self.variant(Clkoutsel2::Lfrco) } #[doc = "LFXO is clocking CLKOUT2"] #[inline(always)] - pub fn lfxo(self) -> &'a mut W { - self.variant(CLKOUTSEL2_A::LFXO) + pub fn lfxo(self) -> &'a mut crate::W { + self.variant(Clkoutsel2::Lfxo) } #[doc = "HFRCODPLL is clocking CLKOUT2"] #[inline(always)] - pub fn hfrcodpll(self) -> &'a mut W { - self.variant(CLKOUTSEL2_A::HFRCODPLL) + pub fn hfrcodpll(self) -> &'a mut crate::W { + self.variant(Clkoutsel2::Hfrcodpll) } #[doc = "HFXO is clocking CLKOUT2"] #[inline(always)] - pub fn hfxo(self) -> &'a mut W { - self.variant(CLKOUTSEL2_A::HFXO) + pub fn hfxo(self) -> &'a mut crate::W { + self.variant(Clkoutsel2::Hfxo) } #[doc = "FSRCO is clocking CLKOUT2"] #[inline(always)] - pub fn fsrco(self) -> &'a mut W { - self.variant(CLKOUTSEL2_A::FSRCO) + pub fn fsrco(self) -> &'a mut crate::W { + self.variant(Clkoutsel2::Fsrco) } #[doc = "HFRCOEM23 is clocking CLKOUT2"] #[inline(always)] - pub fn hfrcoem23(self) -> &'a mut W { - self.variant(CLKOUTSEL2_A::HFRCOEM23) + pub fn hfrcoem23(self) -> &'a mut crate::W { + self.variant(Clkoutsel2::Hfrcoem23) } } #[doc = "Field `PRESC` reader - EXPORTCLK Prescaler"] -pub type PRESC_R = crate::FieldReader; +pub type PrescR = crate::FieldReader; #[doc = "Field `PRESC` writer - EXPORTCLK Prescaler"] -pub type PRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EXPORTCLKCTRL_SPEC, u8, u8, 5, O>; +pub type PrescW<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bits 0:3 - Clock Output Select 0"] #[inline(always)] - pub fn clkoutsel0(&self) -> CLKOUTSEL0_R { - CLKOUTSEL0_R::new((self.bits & 0x0f) as u8) + pub fn clkoutsel0(&self) -> Clkoutsel0R { + Clkoutsel0R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:11 - Clock Output Select 1"] #[inline(always)] - pub fn clkoutsel1(&self) -> CLKOUTSEL1_R { - CLKOUTSEL1_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn clkoutsel1(&self) -> Clkoutsel1R { + Clkoutsel1R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 16:19 - Clock Output Select 2"] #[inline(always)] - pub fn clkoutsel2(&self) -> CLKOUTSEL2_R { - CLKOUTSEL2_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn clkoutsel2(&self) -> Clkoutsel2R { + Clkoutsel2R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:28 - EXPORTCLK Prescaler"] #[inline(always)] - pub fn presc(&self) -> PRESC_R { - PRESC_R::new(((self.bits >> 24) & 0x1f) as u8) + pub fn presc(&self) -> PrescR { + PrescR::new(((self.bits >> 24) & 0x1f) as u8) } } impl W { #[doc = "Bits 0:3 - Clock Output Select 0"] #[inline(always)] #[must_use] - pub fn clkoutsel0(&mut self) -> CLKOUTSEL0_W<0> { - CLKOUTSEL0_W::new(self) + pub fn clkoutsel0(&mut self) -> Clkoutsel0W { + Clkoutsel0W::new(self, 0) } #[doc = "Bits 8:11 - Clock Output Select 1"] #[inline(always)] #[must_use] - pub fn clkoutsel1(&mut self) -> CLKOUTSEL1_W<8> { - CLKOUTSEL1_W::new(self) + pub fn clkoutsel1(&mut self) -> Clkoutsel1W { + Clkoutsel1W::new(self, 8) } #[doc = "Bits 16:19 - Clock Output Select 2"] #[inline(always)] #[must_use] - pub fn clkoutsel2(&mut self) -> CLKOUTSEL2_W<16> { - CLKOUTSEL2_W::new(self) + pub fn clkoutsel2(&mut self) -> Clkoutsel2W { + Clkoutsel2W::new(self, 16) } #[doc = "Bits 24:28 - EXPORTCLK Prescaler"] #[inline(always)] #[must_use] - pub fn presc(&mut self) -> PRESC_W<24> { - PRESC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn presc(&mut self) -> PrescW { + PrescW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [exportclkctrl](index.html) module"] -pub struct EXPORTCLKCTRL_SPEC; -impl crate::RegisterSpec for EXPORTCLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`exportclkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`exportclkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ExportclkctrlSpec; +impl crate::RegisterSpec for ExportclkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [exportclkctrl::R](R) reader structure"] -impl crate::Readable for EXPORTCLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [exportclkctrl::W](W) writer structure"] -impl crate::Writable for EXPORTCLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`exportclkctrl::R`](R) reader structure"] +impl crate::Readable for ExportclkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`exportclkctrl::W`](W) writer structure"] +impl crate::Writable for ExportclkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EXPORTCLKCTRL to value 0"] -impl crate::Resettable for EXPORTCLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ExportclkctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/iadcclkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/iadcclkctrl.rs index d4186ef..5f214bc 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/iadcclkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/iadcclkctrl.rs @@ -1,142 +1,109 @@ #[doc = "Register `IADCCLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IADCCLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "1: EM01GRPACLK is clocking IADCCLK"] - EM01GRPACLK = 1, + Em01grpaclk = 1, #[doc = "2: FSRCO is clocking IADCCLK"] - FSRCO = 2, + Fsrco = 2, #[doc = "3: HFRCOEM23 is clocking IADCCLK"] - HFRCOEM23 = 3, + Hfrcoem23 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(CLKSEL_A::EM01GRPACLK), - 2 => Some(CLKSEL_A::FSRCO), - 3 => Some(CLKSEL_A::HFRCOEM23), + 1 => Some(Clksel::Em01grpaclk), + 2 => Some(Clksel::Fsrco), + 3 => Some(Clksel::Hfrcoem23), _ => None, } } - #[doc = "Checks if the value of the field is `EM01GRPACLK`"] + #[doc = "EM01GRPACLK is clocking IADCCLK"] #[inline(always)] pub fn is_em01grpaclk(&self) -> bool { - *self == CLKSEL_A::EM01GRPACLK + *self == Clksel::Em01grpaclk } - #[doc = "Checks if the value of the field is `FSRCO`"] + #[doc = "FSRCO is clocking IADCCLK"] #[inline(always)] pub fn is_fsrco(&self) -> bool { - *self == CLKSEL_A::FSRCO + *self == Clksel::Fsrco } - #[doc = "Checks if the value of the field is `HFRCOEM23`"] + #[doc = "HFRCOEM23 is clocking IADCCLK"] #[inline(always)] pub fn is_hfrcoem23(&self) -> bool { - *self == CLKSEL_A::HFRCOEM23 + *self == Clksel::Hfrcoem23 } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, IADCCLKCTRL_SPEC, u8, CLKSEL_A, 2, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "EM01GRPACLK is clocking IADCCLK"] #[inline(always)] - pub fn em01grpaclk(self) -> &'a mut W { - self.variant(CLKSEL_A::EM01GRPACLK) + pub fn em01grpaclk(self) -> &'a mut crate::W { + self.variant(Clksel::Em01grpaclk) } #[doc = "FSRCO is clocking IADCCLK"] #[inline(always)] - pub fn fsrco(self) -> &'a mut W { - self.variant(CLKSEL_A::FSRCO) + pub fn fsrco(self) -> &'a mut crate::W { + self.variant(Clksel::Fsrco) } #[doc = "HFRCOEM23 is clocking IADCCLK"] #[inline(always)] - pub fn hfrcoem23(self) -> &'a mut W { - self.variant(CLKSEL_A::HFRCOEM23) + pub fn hfrcoem23(self) -> &'a mut crate::W { + self.variant(Clksel::Hfrcoem23) } } impl R { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 3) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [iadcclkctrl](index.html) module"] -pub struct IADCCLKCTRL_SPEC; -impl crate::RegisterSpec for IADCCLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`iadcclkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iadcclkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IadcclkctrlSpec; +impl crate::RegisterSpec for IadcclkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [iadcclkctrl::R](R) reader structure"] -impl crate::Readable for IADCCLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [iadcclkctrl::W](W) writer structure"] -impl crate::Writable for IADCCLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`iadcclkctrl::R`](R) reader structure"] +impl crate::Readable for IadcclkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`iadcclkctrl::W`](W) writer structure"] +impl crate::Writable for IadcclkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IADCCLKCTRL to value 0x01"] -impl crate::Resettable for IADCCLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IadcclkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/ien.rs index 76b7cdd..7fc1d59 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/ien.rs @@ -1,95 +1,55 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CALRDY` reader - Calibration Ready Interrupt Enable"] -pub type CALRDY_R = crate::BitReader; +pub type CalrdyR = crate::BitReader; #[doc = "Field `CALRDY` writer - Calibration Ready Interrupt Enable"] -pub type CALRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type CalrdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CALOF` reader - Calibration Overflow Interrupt Enable"] -pub type CALOF_R = crate::BitReader; +pub type CalofR = crate::BitReader; #[doc = "Field `CALOF` writer - Calibration Overflow Interrupt Enable"] -pub type CALOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type CalofW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Calibration Ready Interrupt Enable"] #[inline(always)] - pub fn calrdy(&self) -> CALRDY_R { - CALRDY_R::new((self.bits & 1) != 0) + pub fn calrdy(&self) -> CalrdyR { + CalrdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Calibration Overflow Interrupt Enable"] #[inline(always)] - pub fn calof(&self) -> CALOF_R { - CALOF_R::new(((self.bits >> 1) & 1) != 0) + pub fn calof(&self) -> CalofR { + CalofR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Calibration Ready Interrupt Enable"] #[inline(always)] #[must_use] - pub fn calrdy(&mut self) -> CALRDY_W<0> { - CALRDY_W::new(self) + pub fn calrdy(&mut self) -> CalrdyW { + CalrdyW::new(self, 0) } #[doc = "Bit 1 - Calibration Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn calof(&mut self) -> CALOF_W<1> { - CALOF_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn calof(&mut self) -> CalofW { + CalofW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/if_.rs index 1d472d5..8b8677c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/if_.rs @@ -1,95 +1,55 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CALRDY` reader - Calibration Ready Interrupt Flag"] -pub type CALRDY_R = crate::BitReader; +pub type CalrdyR = crate::BitReader; #[doc = "Field `CALRDY` writer - Calibration Ready Interrupt Flag"] -pub type CALRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type CalrdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CALOF` reader - Calibration Overflow Interrupt Flag"] -pub type CALOF_R = crate::BitReader; +pub type CalofR = crate::BitReader; #[doc = "Field `CALOF` writer - Calibration Overflow Interrupt Flag"] -pub type CALOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type CalofW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Calibration Ready Interrupt Flag"] #[inline(always)] - pub fn calrdy(&self) -> CALRDY_R { - CALRDY_R::new((self.bits & 1) != 0) + pub fn calrdy(&self) -> CalrdyR { + CalrdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Calibration Overflow Interrupt Flag"] #[inline(always)] - pub fn calof(&self) -> CALOF_R { - CALOF_R::new(((self.bits >> 1) & 1) != 0) + pub fn calof(&self) -> CalofR { + CalofR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Calibration Ready Interrupt Flag"] #[inline(always)] #[must_use] - pub fn calrdy(&mut self) -> CALRDY_W<0> { - CALRDY_W::new(self) + pub fn calrdy(&mut self) -> CalrdyW { + CalrdyW::new(self, 0) } #[doc = "Bit 1 - Calibration Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn calof(&mut self) -> CALOF_W<1> { - CALOF_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn calof(&mut self) -> CalofW { + CalofW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/ipversion.rs index 1c8b3f7..dc1f830 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x02"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/lcdclkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/lcdclkctrl.rs index 78ed56e..e42661b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/lcdclkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/lcdclkctrl.rs @@ -1,142 +1,109 @@ #[doc = "Register `LCDCLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LCDCLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "1: LFRCO is clocking LCDCLK"] - LFRCO = 1, + Lfrco = 1, #[doc = "2: LFXO is clocking LCDCLK"] - LFXO = 2, + Lfxo = 2, #[doc = "3: ULFRCO is clocking LCDCLK"] - ULFRCO = 3, + Ulfrco = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(CLKSEL_A::LFRCO), - 2 => Some(CLKSEL_A::LFXO), - 3 => Some(CLKSEL_A::ULFRCO), + 1 => Some(Clksel::Lfrco), + 2 => Some(Clksel::Lfxo), + 3 => Some(Clksel::Ulfrco), _ => None, } } - #[doc = "Checks if the value of the field is `LFRCO`"] + #[doc = "LFRCO is clocking LCDCLK"] #[inline(always)] pub fn is_lfrco(&self) -> bool { - *self == CLKSEL_A::LFRCO + *self == Clksel::Lfrco } - #[doc = "Checks if the value of the field is `LFXO`"] + #[doc = "LFXO is clocking LCDCLK"] #[inline(always)] pub fn is_lfxo(&self) -> bool { - *self == CLKSEL_A::LFXO + *self == Clksel::Lfxo } - #[doc = "Checks if the value of the field is `ULFRCO`"] + #[doc = "ULFRCO is clocking LCDCLK"] #[inline(always)] pub fn is_ulfrco(&self) -> bool { - *self == CLKSEL_A::ULFRCO + *self == Clksel::Ulfrco } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LCDCLKCTRL_SPEC, u8, CLKSEL_A, 2, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "LFRCO is clocking LCDCLK"] #[inline(always)] - pub fn lfrco(self) -> &'a mut W { - self.variant(CLKSEL_A::LFRCO) + pub fn lfrco(self) -> &'a mut crate::W { + self.variant(Clksel::Lfrco) } #[doc = "LFXO is clocking LCDCLK"] #[inline(always)] - pub fn lfxo(self) -> &'a mut W { - self.variant(CLKSEL_A::LFXO) + pub fn lfxo(self) -> &'a mut crate::W { + self.variant(Clksel::Lfxo) } #[doc = "ULFRCO is clocking LCDCLK"] #[inline(always)] - pub fn ulfrco(self) -> &'a mut W { - self.variant(CLKSEL_A::ULFRCO) + pub fn ulfrco(self) -> &'a mut crate::W { + self.variant(Clksel::Ulfrco) } } impl R { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 3) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lcdclkctrl](index.html) module"] -pub struct LCDCLKCTRL_SPEC; -impl crate::RegisterSpec for LCDCLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`lcdclkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lcdclkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LcdclkctrlSpec; +impl crate::RegisterSpec for LcdclkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [lcdclkctrl::R](R) reader structure"] -impl crate::Readable for LCDCLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lcdclkctrl::W](W) writer structure"] -impl crate::Writable for LCDCLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lcdclkctrl::R`](R) reader structure"] +impl crate::Readable for LcdclkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`lcdclkctrl::W`](W) writer structure"] +impl crate::Writable for LcdclkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LCDCLKCTRL to value 0x01"] -impl crate::Resettable for LCDCLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for LcdclkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/lesensehfclkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/lesensehfclkctrl.rs index 88d742e..f097506 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/lesensehfclkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/lesensehfclkctrl.rs @@ -1,129 +1,96 @@ #[doc = "Register `LESENSEHFCLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSEHFCLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "1: FSRCO is clocking LESENSEHFCLK"] - FSRCO = 1, + Fsrco = 1, #[doc = "2: HFRCOEM23 is clocking LESENSEHFCLK"] - HFRCOEM23 = 2, + Hfrcoem23 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(CLKSEL_A::FSRCO), - 2 => Some(CLKSEL_A::HFRCOEM23), + 1 => Some(Clksel::Fsrco), + 2 => Some(Clksel::Hfrcoem23), _ => None, } } - #[doc = "Checks if the value of the field is `FSRCO`"] + #[doc = "FSRCO is clocking LESENSEHFCLK"] #[inline(always)] pub fn is_fsrco(&self) -> bool { - *self == CLKSEL_A::FSRCO + *self == Clksel::Fsrco } - #[doc = "Checks if the value of the field is `HFRCOEM23`"] + #[doc = "HFRCOEM23 is clocking LESENSEHFCLK"] #[inline(always)] pub fn is_hfrcoem23(&self) -> bool { - *self == CLKSEL_A::HFRCOEM23 + *self == Clksel::Hfrcoem23 } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSEHFCLKCTRL_SPEC, u8, CLKSEL_A, 2, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "FSRCO is clocking LESENSEHFCLK"] #[inline(always)] - pub fn fsrco(self) -> &'a mut W { - self.variant(CLKSEL_A::FSRCO) + pub fn fsrco(self) -> &'a mut crate::W { + self.variant(Clksel::Fsrco) } #[doc = "HFRCOEM23 is clocking LESENSEHFCLK"] #[inline(always)] - pub fn hfrcoem23(self) -> &'a mut W { - self.variant(CLKSEL_A::HFRCOEM23) + pub fn hfrcoem23(self) -> &'a mut crate::W { + self.variant(Clksel::Hfrcoem23) } } impl R { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 3) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesensehfclkctrl](index.html) module"] -pub struct LESENSEHFCLKCTRL_SPEC; -impl crate::RegisterSpec for LESENSEHFCLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`lesensehfclkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesensehfclkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesensehfclkctrlSpec; +impl crate::RegisterSpec for LesensehfclkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesensehfclkctrl::R](R) reader structure"] -impl crate::Readable for LESENSEHFCLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesensehfclkctrl::W](W) writer structure"] -impl crate::Writable for LESENSEHFCLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesensehfclkctrl::R`](R) reader structure"] +impl crate::Readable for LesensehfclkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`lesensehfclkctrl::W`](W) writer structure"] +impl crate::Writable for LesensehfclkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSEHFCLKCTRL to value 0x01"] -impl crate::Resettable for LESENSEHFCLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for LesensehfclkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/lock.rs index 1aa1089..0bf05f9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Configuration Lock Key\n\nValue on reset: 37879"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "37879: Write this value to unlock"] - UNLOCK = 37879, + Unlock = 37879, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Configuration Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write this value to unlock"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Configuration Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0x93f7"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0x93f7; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0x93f7; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/pcnt0clkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/pcnt0clkctrl.rs index 3e7b88c..4fca51c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/pcnt0clkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/pcnt0clkctrl.rs @@ -1,142 +1,109 @@ #[doc = "Register `PCNT0CLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PCNT0CLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "0: PCNT0 is not clocked"] - DISABLED = 0, + Disabled = 0, #[doc = "1: EM23GRPACLK is clocking PCNT0"] - EM23GRPACLK = 1, + Em23grpaclk = 1, #[doc = "2: External pin PCNT_S0 is clocking PCNT0"] - PCNTS0 = 2, + Pcnts0 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKSEL_A::DISABLED), - 1 => Some(CLKSEL_A::EM23GRPACLK), - 2 => Some(CLKSEL_A::PCNTS0), + 0 => Some(Clksel::Disabled), + 1 => Some(Clksel::Em23grpaclk), + 2 => Some(Clksel::Pcnts0), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "PCNT0 is not clocked"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == CLKSEL_A::DISABLED + *self == Clksel::Disabled } - #[doc = "Checks if the value of the field is `EM23GRPACLK`"] + #[doc = "EM23GRPACLK is clocking PCNT0"] #[inline(always)] pub fn is_em23grpaclk(&self) -> bool { - *self == CLKSEL_A::EM23GRPACLK + *self == Clksel::Em23grpaclk } - #[doc = "Checks if the value of the field is `PCNTS0`"] + #[doc = "External pin PCNT_S0 is clocking PCNT0"] #[inline(always)] pub fn is_pcnts0(&self) -> bool { - *self == CLKSEL_A::PCNTS0 + *self == Clksel::Pcnts0 } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PCNT0CLKCTRL_SPEC, u8, CLKSEL_A, 2, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PCNT0 is not clocked"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(CLKSEL_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Clksel::Disabled) } #[doc = "EM23GRPACLK is clocking PCNT0"] #[inline(always)] - pub fn em23grpaclk(self) -> &'a mut W { - self.variant(CLKSEL_A::EM23GRPACLK) + pub fn em23grpaclk(self) -> &'a mut crate::W { + self.variant(Clksel::Em23grpaclk) } #[doc = "External pin PCNT_S0 is clocking PCNT0"] #[inline(always)] - pub fn pcnts0(self) -> &'a mut W { - self.variant(CLKSEL_A::PCNTS0) + pub fn pcnts0(self) -> &'a mut crate::W { + self.variant(Clksel::Pcnts0) } } impl R { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 3) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pcnt0clkctrl](index.html) module"] -pub struct PCNT0CLKCTRL_SPEC; -impl crate::RegisterSpec for PCNT0CLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pcnt0clkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcnt0clkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Pcnt0clkctrlSpec; +impl crate::RegisterSpec for Pcnt0clkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [pcnt0clkctrl::R](R) reader structure"] -impl crate::Readable for PCNT0CLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [pcnt0clkctrl::W](W) writer structure"] -impl crate::Writable for PCNT0CLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`pcnt0clkctrl::R`](R) reader structure"] +impl crate::Readable for Pcnt0clkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`pcnt0clkctrl::W`](W) writer structure"] +impl crate::Writable for Pcnt0clkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PCNT0CLKCTRL to value 0x01"] -impl crate::Resettable for PCNT0CLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for Pcnt0clkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/status.rs index 062cc62..14cb98d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/status.rs @@ -1,119 +1,104 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CALRDY` reader - Calibration Ready"] -pub type CALRDY_R = crate::BitReader; -#[doc = "Field `WDOGLOCK` reader - Configuration Lock Status for WDOG"] -pub type WDOGLOCK_R = crate::BitReader; +pub type CalrdyR = crate::BitReader; #[doc = "Configuration Lock Status for WDOG\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WDOGLOCK_A { +pub enum Wdoglock { #[doc = "0: WDOG configuration lock is unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: WDOG configuration lock is locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WDOGLOCK_A) -> Self { + fn from(variant: Wdoglock) -> Self { variant as u8 != 0 } } -impl WDOGLOCK_R { +#[doc = "Field `WDOGLOCK` reader - Configuration Lock Status for WDOG"] +pub type WdoglockR = crate::BitReader; +impl WdoglockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> WDOGLOCK_A { + pub const fn variant(&self) -> Wdoglock { match self.bits { - false => WDOGLOCK_A::UNLOCKED, - true => WDOGLOCK_A::LOCKED, + false => Wdoglock::Unlocked, + true => Wdoglock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "WDOG configuration lock is unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == WDOGLOCK_A::UNLOCKED + *self == Wdoglock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "WDOG configuration lock is locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == WDOGLOCK_A::LOCKED + *self == Wdoglock::Locked } } -#[doc = "Field `LOCK` reader - Configuration Lock Status"] -pub type LOCK_R = crate::BitReader; #[doc = "Configuration Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCK_A { +pub enum Lock { #[doc = "0: Configuration lock is unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: Configuration lock is locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCK_A) -> Self { + fn from(variant: Lock) -> Self { variant as u8 != 0 } } -impl LOCK_R { +#[doc = "Field `LOCK` reader - Configuration Lock Status"] +pub type LockR = crate::BitReader; +impl LockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCK_A { + pub const fn variant(&self) -> Lock { match self.bits { - false => LOCK_A::UNLOCKED, - true => LOCK_A::LOCKED, + false => Lock::Unlocked, + true => Lock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "Configuration lock is unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCK_A::UNLOCKED + *self == Lock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "Configuration lock is locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCK_A::LOCKED + *self == Lock::Locked } } impl R { #[doc = "Bit 0 - Calibration Ready"] #[inline(always)] - pub fn calrdy(&self) -> CALRDY_R { - CALRDY_R::new((self.bits & 1) != 0) + pub fn calrdy(&self) -> CalrdyR { + CalrdyR::new((self.bits & 1) != 0) } #[doc = "Bit 30 - Configuration Lock Status for WDOG"] #[inline(always)] - pub fn wdoglock(&self) -> WDOGLOCK_R { - WDOGLOCK_R::new(((self.bits >> 30) & 1) != 0) + pub fn wdoglock(&self) -> WdoglockR { + WdoglockR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Configuration Lock Status"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new(((self.bits >> 31) & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/sysclkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/sysclkctrl.rs index 62090ae..ee4ee7a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/sysclkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/sysclkctrl.rs @@ -1,319 +1,296 @@ #[doc = "Register `SYSCLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SYSCLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "1: FSRCO is clocking SYSCLK"] - FSRCO = 1, + Fsrco = 1, #[doc = "2: HFRCODPLL is clocking SYSCLK"] - HFRCODPLL = 2, + Hfrcodpll = 2, #[doc = "3: HFXO is clocking SYSCLK"] - HFXO = 3, + Hfxo = 3, #[doc = "4: CLKIN0 is clocking SYSCLK"] - CLKIN0 = 4, + Clkin0 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(CLKSEL_A::FSRCO), - 2 => Some(CLKSEL_A::HFRCODPLL), - 3 => Some(CLKSEL_A::HFXO), - 4 => Some(CLKSEL_A::CLKIN0), + 1 => Some(Clksel::Fsrco), + 2 => Some(Clksel::Hfrcodpll), + 3 => Some(Clksel::Hfxo), + 4 => Some(Clksel::Clkin0), _ => None, } } - #[doc = "Checks if the value of the field is `FSRCO`"] + #[doc = "FSRCO is clocking SYSCLK"] #[inline(always)] pub fn is_fsrco(&self) -> bool { - *self == CLKSEL_A::FSRCO + *self == Clksel::Fsrco } - #[doc = "Checks if the value of the field is `HFRCODPLL`"] + #[doc = "HFRCODPLL is clocking SYSCLK"] #[inline(always)] pub fn is_hfrcodpll(&self) -> bool { - *self == CLKSEL_A::HFRCODPLL + *self == Clksel::Hfrcodpll } - #[doc = "Checks if the value of the field is `HFXO`"] + #[doc = "HFXO is clocking SYSCLK"] #[inline(always)] pub fn is_hfxo(&self) -> bool { - *self == CLKSEL_A::HFXO + *self == Clksel::Hfxo } - #[doc = "Checks if the value of the field is `CLKIN0`"] + #[doc = "CLKIN0 is clocking SYSCLK"] #[inline(always)] pub fn is_clkin0(&self) -> bool { - *self == CLKSEL_A::CLKIN0 + *self == Clksel::Clkin0 } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYSCLKCTRL_SPEC, u8, CLKSEL_A, 3, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "FSRCO is clocking SYSCLK"] #[inline(always)] - pub fn fsrco(self) -> &'a mut W { - self.variant(CLKSEL_A::FSRCO) + pub fn fsrco(self) -> &'a mut crate::W { + self.variant(Clksel::Fsrco) } #[doc = "HFRCODPLL is clocking SYSCLK"] #[inline(always)] - pub fn hfrcodpll(self) -> &'a mut W { - self.variant(CLKSEL_A::HFRCODPLL) + pub fn hfrcodpll(self) -> &'a mut crate::W { + self.variant(Clksel::Hfrcodpll) } #[doc = "HFXO is clocking SYSCLK"] #[inline(always)] - pub fn hfxo(self) -> &'a mut W { - self.variant(CLKSEL_A::HFXO) + pub fn hfxo(self) -> &'a mut crate::W { + self.variant(Clksel::Hfxo) } #[doc = "CLKIN0 is clocking SYSCLK"] #[inline(always)] - pub fn clkin0(self) -> &'a mut W { - self.variant(CLKSEL_A::CLKIN0) + pub fn clkin0(self) -> &'a mut crate::W { + self.variant(Clksel::Clkin0) } } -#[doc = "Field `PCLKPRESC` reader - PCLK Prescaler"] -pub type PCLKPRESC_R = crate::BitReader; #[doc = "PCLK Prescaler\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PCLKPRESC_A { +pub enum Pclkpresc { #[doc = "0: PCLK is HCLK divided by 1"] - DIV1 = 0, + Div1 = 0, #[doc = "1: PCLK is HCLK divided by 2"] - DIV2 = 1, + Div2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PCLKPRESC_A) -> Self { + fn from(variant: Pclkpresc) -> Self { variant as u8 != 0 } } -impl PCLKPRESC_R { +#[doc = "Field `PCLKPRESC` reader - PCLK Prescaler"] +pub type PclkprescR = crate::BitReader; +impl PclkprescR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PCLKPRESC_A { + pub const fn variant(&self) -> Pclkpresc { match self.bits { - false => PCLKPRESC_A::DIV1, - true => PCLKPRESC_A::DIV2, + false => Pclkpresc::Div1, + true => Pclkpresc::Div2, } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "PCLK is HCLK divided by 1"] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == PCLKPRESC_A::DIV1 + *self == Pclkpresc::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "PCLK is HCLK divided by 2"] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == PCLKPRESC_A::DIV2 + *self == Pclkpresc::Div2 } } #[doc = "Field `PCLKPRESC` writer - PCLK Prescaler"] -pub type PCLKPRESC_W<'a, const O: u8> = crate::BitWriter<'a, u32, SYSCLKCTRL_SPEC, PCLKPRESC_A, O>; -impl<'a, const O: u8> PCLKPRESC_W<'a, O> { +pub type PclkprescW<'a, REG> = crate::BitWriter<'a, REG, Pclkpresc>; +impl<'a, REG> PclkprescW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "PCLK is HCLK divided by 1"] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(PCLKPRESC_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Pclkpresc::Div1) } #[doc = "PCLK is HCLK divided by 2"] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(PCLKPRESC_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Pclkpresc::Div2) } } -#[doc = "Field `HCLKPRESC` reader - HCLK Prescaler"] -pub type HCLKPRESC_R = crate::FieldReader; #[doc = "HCLK Prescaler\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HCLKPRESC_A { +pub enum Hclkpresc { #[doc = "0: HCLK is SYSCLK divided by 1"] - DIV1 = 0, + Div1 = 0, #[doc = "1: HCLK is SYSCLK divided by 2"] - DIV2 = 1, + Div2 = 1, #[doc = "3: HCLK is SYSCLK divided by 4"] - DIV4 = 3, + Div4 = 3, #[doc = "7: HCLK is SYSCLK divided by 8"] - DIV8 = 7, + Div8 = 7, #[doc = "15: HCLK is SYSCLK divided by 16"] - DIV16 = 15, + Div16 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HCLKPRESC_A) -> Self { + fn from(variant: Hclkpresc) -> Self { variant as _ } } -impl HCLKPRESC_R { +impl crate::FieldSpec for Hclkpresc { + type Ux = u8; +} +impl crate::IsEnum for Hclkpresc {} +#[doc = "Field `HCLKPRESC` reader - HCLK Prescaler"] +pub type HclkprescR = crate::FieldReader; +impl HclkprescR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HCLKPRESC_A::DIV1), - 1 => Some(HCLKPRESC_A::DIV2), - 3 => Some(HCLKPRESC_A::DIV4), - 7 => Some(HCLKPRESC_A::DIV8), - 15 => Some(HCLKPRESC_A::DIV16), + 0 => Some(Hclkpresc::Div1), + 1 => Some(Hclkpresc::Div2), + 3 => Some(Hclkpresc::Div4), + 7 => Some(Hclkpresc::Div8), + 15 => Some(Hclkpresc::Div16), _ => None, } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "HCLK is SYSCLK divided by 1"] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == HCLKPRESC_A::DIV1 + *self == Hclkpresc::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "HCLK is SYSCLK divided by 2"] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == HCLKPRESC_A::DIV2 + *self == Hclkpresc::Div2 } - #[doc = "Checks if the value of the field is `DIV4`"] + #[doc = "HCLK is SYSCLK divided by 4"] #[inline(always)] pub fn is_div4(&self) -> bool { - *self == HCLKPRESC_A::DIV4 + *self == Hclkpresc::Div4 } - #[doc = "Checks if the value of the field is `DIV8`"] + #[doc = "HCLK is SYSCLK divided by 8"] #[inline(always)] pub fn is_div8(&self) -> bool { - *self == HCLKPRESC_A::DIV8 + *self == Hclkpresc::Div8 } - #[doc = "Checks if the value of the field is `DIV16`"] + #[doc = "HCLK is SYSCLK divided by 16"] #[inline(always)] pub fn is_div16(&self) -> bool { - *self == HCLKPRESC_A::DIV16 + *self == Hclkpresc::Div16 } } #[doc = "Field `HCLKPRESC` writer - HCLK Prescaler"] -pub type HCLKPRESC_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYSCLKCTRL_SPEC, u8, HCLKPRESC_A, 4, O>; -impl<'a, const O: u8> HCLKPRESC_W<'a, O> { +pub type HclkprescW<'a, REG> = crate::FieldWriter<'a, REG, 4, Hclkpresc>; +impl<'a, REG> HclkprescW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "HCLK is SYSCLK divided by 1"] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(HCLKPRESC_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Hclkpresc::Div1) } #[doc = "HCLK is SYSCLK divided by 2"] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(HCLKPRESC_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Hclkpresc::Div2) } #[doc = "HCLK is SYSCLK divided by 4"] #[inline(always)] - pub fn div4(self) -> &'a mut W { - self.variant(HCLKPRESC_A::DIV4) + pub fn div4(self) -> &'a mut crate::W { + self.variant(Hclkpresc::Div4) } #[doc = "HCLK is SYSCLK divided by 8"] #[inline(always)] - pub fn div8(self) -> &'a mut W { - self.variant(HCLKPRESC_A::DIV8) + pub fn div8(self) -> &'a mut crate::W { + self.variant(Hclkpresc::Div8) } #[doc = "HCLK is SYSCLK divided by 16"] #[inline(always)] - pub fn div16(self) -> &'a mut W { - self.variant(HCLKPRESC_A::DIV16) + pub fn div16(self) -> &'a mut crate::W { + self.variant(Hclkpresc::Div16) } } impl R { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 7) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 7) as u8) } #[doc = "Bit 10 - PCLK Prescaler"] #[inline(always)] - pub fn pclkpresc(&self) -> PCLKPRESC_R { - PCLKPRESC_R::new(((self.bits >> 10) & 1) != 0) + pub fn pclkpresc(&self) -> PclkprescR { + PclkprescR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bits 12:15 - HCLK Prescaler"] #[inline(always)] - pub fn hclkpresc(&self) -> HCLKPRESC_R { - HCLKPRESC_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn hclkpresc(&self) -> HclkprescR { + HclkprescR::new(((self.bits >> 12) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } #[doc = "Bit 10 - PCLK Prescaler"] #[inline(always)] #[must_use] - pub fn pclkpresc(&mut self) -> PCLKPRESC_W<10> { - PCLKPRESC_W::new(self) + pub fn pclkpresc(&mut self) -> PclkprescW { + PclkprescW::new(self, 10) } #[doc = "Bits 12:15 - HCLK Prescaler"] #[inline(always)] #[must_use] - pub fn hclkpresc(&mut self) -> HCLKPRESC_W<12> { - HCLKPRESC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn hclkpresc(&mut self) -> HclkprescW { + HclkprescW::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysclkctrl](index.html) module"] -pub struct SYSCLKCTRL_SPEC; -impl crate::RegisterSpec for SYSCLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sysclkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sysclkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SysclkctrlSpec; +impl crate::RegisterSpec for SysclkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [sysclkctrl::R](R) reader structure"] -impl crate::Readable for SYSCLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sysclkctrl::W](W) writer structure"] -impl crate::Writable for SYSCLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`sysclkctrl::R`](R) reader structure"] +impl crate::Readable for SysclkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`sysclkctrl::W`](W) writer structure"] +impl crate::Writable for SysclkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYSCLKCTRL to value 0x01"] -impl crate::Resettable for SYSCLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for SysclkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/sysrtc0clkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/sysrtc0clkctrl.rs index 5b99711..64d6b6e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/sysrtc0clkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/sysrtc0clkctrl.rs @@ -1,142 +1,109 @@ #[doc = "Register `SYSRTC0CLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SYSRTC0CLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "1: LFRCO is clocking SYSRTC0CLK"] - LFRCO = 1, + Lfrco = 1, #[doc = "2: LFXO is clocking SYSRTC0CLK"] - LFXO = 2, + Lfxo = 2, #[doc = "3: ULFRCO is clocking SYSRTC0CLK"] - ULFRCO = 3, + Ulfrco = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(CLKSEL_A::LFRCO), - 2 => Some(CLKSEL_A::LFXO), - 3 => Some(CLKSEL_A::ULFRCO), + 1 => Some(Clksel::Lfrco), + 2 => Some(Clksel::Lfxo), + 3 => Some(Clksel::Ulfrco), _ => None, } } - #[doc = "Checks if the value of the field is `LFRCO`"] + #[doc = "LFRCO is clocking SYSRTC0CLK"] #[inline(always)] pub fn is_lfrco(&self) -> bool { - *self == CLKSEL_A::LFRCO + *self == Clksel::Lfrco } - #[doc = "Checks if the value of the field is `LFXO`"] + #[doc = "LFXO is clocking SYSRTC0CLK"] #[inline(always)] pub fn is_lfxo(&self) -> bool { - *self == CLKSEL_A::LFXO + *self == Clksel::Lfxo } - #[doc = "Checks if the value of the field is `ULFRCO`"] + #[doc = "ULFRCO is clocking SYSRTC0CLK"] #[inline(always)] pub fn is_ulfrco(&self) -> bool { - *self == CLKSEL_A::ULFRCO + *self == Clksel::Ulfrco } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYSRTC0CLKCTRL_SPEC, u8, CLKSEL_A, 2, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "LFRCO is clocking SYSRTC0CLK"] #[inline(always)] - pub fn lfrco(self) -> &'a mut W { - self.variant(CLKSEL_A::LFRCO) + pub fn lfrco(self) -> &'a mut crate::W { + self.variant(Clksel::Lfrco) } #[doc = "LFXO is clocking SYSRTC0CLK"] #[inline(always)] - pub fn lfxo(self) -> &'a mut W { - self.variant(CLKSEL_A::LFXO) + pub fn lfxo(self) -> &'a mut crate::W { + self.variant(Clksel::Lfxo) } #[doc = "ULFRCO is clocking SYSRTC0CLK"] #[inline(always)] - pub fn ulfrco(self) -> &'a mut W { - self.variant(CLKSEL_A::ULFRCO) + pub fn ulfrco(self) -> &'a mut crate::W { + self.variant(Clksel::Ulfrco) } } impl R { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 3) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysrtc0clkctrl](index.html) module"] -pub struct SYSRTC0CLKCTRL_SPEC; -impl crate::RegisterSpec for SYSRTC0CLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sysrtc0clkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sysrtc0clkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Sysrtc0clkctrlSpec; +impl crate::RegisterSpec for Sysrtc0clkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [sysrtc0clkctrl::R](R) reader structure"] -impl crate::Readable for SYSRTC0CLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sysrtc0clkctrl::W](W) writer structure"] -impl crate::Writable for SYSRTC0CLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`sysrtc0clkctrl::R`](R) reader structure"] +impl crate::Readable for Sysrtc0clkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`sysrtc0clkctrl::W`](W) writer structure"] +impl crate::Writable for Sysrtc0clkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYSRTC0CLKCTRL to value 0x01"] -impl crate::Resettable for SYSRTC0CLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for Sysrtc0clkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/traceclkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/traceclkctrl.rs index 5a26e23..0c711fa 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/traceclkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/traceclkctrl.rs @@ -1,142 +1,109 @@ #[doc = "Register `TRACECLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TRACECLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `PRESC` reader - TRACECLK Prescaler"] -pub type PRESC_R = crate::FieldReader; +pub type W = crate::W; #[doc = "TRACECLK Prescaler\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PRESC_A { +pub enum Presc { #[doc = "0: TRACECLK is SYSCLK divided by 1"] - DIV1 = 0, + Div1 = 0, #[doc = "1: TRACECLK is SYSCLK divided by 2"] - DIV2 = 1, + Div2 = 1, #[doc = "3: TRACECLK is SYSCLK divided by 4"] - DIV4 = 3, + Div4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PRESC_A) -> Self { + fn from(variant: Presc) -> Self { variant as _ } } -impl PRESC_R { +impl crate::FieldSpec for Presc { + type Ux = u8; +} +impl crate::IsEnum for Presc {} +#[doc = "Field `PRESC` reader - TRACECLK Prescaler"] +pub type PrescR = crate::FieldReader; +impl PrescR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PRESC_A::DIV1), - 1 => Some(PRESC_A::DIV2), - 3 => Some(PRESC_A::DIV4), + 0 => Some(Presc::Div1), + 1 => Some(Presc::Div2), + 3 => Some(Presc::Div4), _ => None, } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "TRACECLK is SYSCLK divided by 1"] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == PRESC_A::DIV1 + *self == Presc::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "TRACECLK is SYSCLK divided by 2"] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == PRESC_A::DIV2 + *self == Presc::Div2 } - #[doc = "Checks if the value of the field is `DIV4`"] + #[doc = "TRACECLK is SYSCLK divided by 4"] #[inline(always)] pub fn is_div4(&self) -> bool { - *self == PRESC_A::DIV4 + *self == Presc::Div4 } } #[doc = "Field `PRESC` writer - TRACECLK Prescaler"] -pub type PRESC_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TRACECLKCTRL_SPEC, u8, PRESC_A, 2, O>; -impl<'a, const O: u8> PRESC_W<'a, O> { +pub type PrescW<'a, REG> = crate::FieldWriter<'a, REG, 2, Presc>; +impl<'a, REG> PrescW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TRACECLK is SYSCLK divided by 1"] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(PRESC_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Presc::Div1) } #[doc = "TRACECLK is SYSCLK divided by 2"] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(PRESC_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Presc::Div2) } #[doc = "TRACECLK is SYSCLK divided by 4"] #[inline(always)] - pub fn div4(self) -> &'a mut W { - self.variant(PRESC_A::DIV4) + pub fn div4(self) -> &'a mut crate::W { + self.variant(Presc::Div4) } } impl R { #[doc = "Bits 4:5 - TRACECLK Prescaler"] #[inline(always)] - pub fn presc(&self) -> PRESC_R { - PRESC_R::new(((self.bits >> 4) & 3) as u8) + pub fn presc(&self) -> PrescR { + PrescR::new(((self.bits >> 4) & 3) as u8) } } impl W { #[doc = "Bits 4:5 - TRACECLK Prescaler"] #[inline(always)] #[must_use] - pub fn presc(&mut self) -> PRESC_W<4> { - PRESC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn presc(&mut self) -> PrescW { + PrescW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [traceclkctrl](index.html) module"] -pub struct TRACECLKCTRL_SPEC; -impl crate::RegisterSpec for TRACECLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`traceclkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`traceclkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TraceclkctrlSpec; +impl crate::RegisterSpec for TraceclkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [traceclkctrl::R](R) reader structure"] -impl crate::Readable for TRACECLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [traceclkctrl::W](W) writer structure"] -impl crate::Writable for TRACECLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`traceclkctrl::R`](R) reader structure"] +impl crate::Readable for TraceclkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`traceclkctrl::W`](W) writer structure"] +impl crate::Writable for TraceclkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TRACECLKCTRL to value 0"] -impl crate::Resettable for TRACECLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TraceclkctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/vdac0clkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/vdac0clkctrl.rs index 6113a5a..361855e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/vdac0clkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/vdac0clkctrl.rs @@ -1,168 +1,135 @@ #[doc = "Register `VDAC0CLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `VDAC0CLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "0: VDAC is not clocked"] - DISABLED = 0, + Disabled = 0, #[doc = "1: EM01GRPACLK is clocking VDAC"] - EM01GRPACLK = 1, + Em01grpaclk = 1, #[doc = "2: EM23GRPACLK is clocking VDAC"] - EM23GRPACLK = 2, + Em23grpaclk = 2, #[doc = "3: FSRCO is clocking VDAC"] - FSRCO = 3, + Fsrco = 3, #[doc = "4: HFRCOEM23 is clocking VDAC"] - HFRCOEM23 = 4, + Hfrcoem23 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKSEL_A::DISABLED), - 1 => Some(CLKSEL_A::EM01GRPACLK), - 2 => Some(CLKSEL_A::EM23GRPACLK), - 3 => Some(CLKSEL_A::FSRCO), - 4 => Some(CLKSEL_A::HFRCOEM23), + 0 => Some(Clksel::Disabled), + 1 => Some(Clksel::Em01grpaclk), + 2 => Some(Clksel::Em23grpaclk), + 3 => Some(Clksel::Fsrco), + 4 => Some(Clksel::Hfrcoem23), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "VDAC is not clocked"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == CLKSEL_A::DISABLED + *self == Clksel::Disabled } - #[doc = "Checks if the value of the field is `EM01GRPACLK`"] + #[doc = "EM01GRPACLK is clocking VDAC"] #[inline(always)] pub fn is_em01grpaclk(&self) -> bool { - *self == CLKSEL_A::EM01GRPACLK + *self == Clksel::Em01grpaclk } - #[doc = "Checks if the value of the field is `EM23GRPACLK`"] + #[doc = "EM23GRPACLK is clocking VDAC"] #[inline(always)] pub fn is_em23grpaclk(&self) -> bool { - *self == CLKSEL_A::EM23GRPACLK + *self == Clksel::Em23grpaclk } - #[doc = "Checks if the value of the field is `FSRCO`"] + #[doc = "FSRCO is clocking VDAC"] #[inline(always)] pub fn is_fsrco(&self) -> bool { - *self == CLKSEL_A::FSRCO + *self == Clksel::Fsrco } - #[doc = "Checks if the value of the field is `HFRCOEM23`"] + #[doc = "HFRCOEM23 is clocking VDAC"] #[inline(always)] pub fn is_hfrcoem23(&self) -> bool { - *self == CLKSEL_A::HFRCOEM23 + *self == Clksel::Hfrcoem23 } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, VDAC0CLKCTRL_SPEC, u8, CLKSEL_A, 3, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "VDAC is not clocked"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(CLKSEL_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Clksel::Disabled) } #[doc = "EM01GRPACLK is clocking VDAC"] #[inline(always)] - pub fn em01grpaclk(self) -> &'a mut W { - self.variant(CLKSEL_A::EM01GRPACLK) + pub fn em01grpaclk(self) -> &'a mut crate::W { + self.variant(Clksel::Em01grpaclk) } #[doc = "EM23GRPACLK is clocking VDAC"] #[inline(always)] - pub fn em23grpaclk(self) -> &'a mut W { - self.variant(CLKSEL_A::EM23GRPACLK) + pub fn em23grpaclk(self) -> &'a mut crate::W { + self.variant(Clksel::Em23grpaclk) } #[doc = "FSRCO is clocking VDAC"] #[inline(always)] - pub fn fsrco(self) -> &'a mut W { - self.variant(CLKSEL_A::FSRCO) + pub fn fsrco(self) -> &'a mut crate::W { + self.variant(Clksel::Fsrco) } #[doc = "HFRCOEM23 is clocking VDAC"] #[inline(always)] - pub fn hfrcoem23(self) -> &'a mut W { - self.variant(CLKSEL_A::HFRCOEM23) + pub fn hfrcoem23(self) -> &'a mut crate::W { + self.variant(Clksel::Hfrcoem23) } } impl R { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 7) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [vdac0clkctrl](index.html) module"] -pub struct VDAC0CLKCTRL_SPEC; -impl crate::RegisterSpec for VDAC0CLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`vdac0clkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`vdac0clkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Vdac0clkctrlSpec; +impl crate::RegisterSpec for Vdac0clkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [vdac0clkctrl::R](R) reader structure"] -impl crate::Readable for VDAC0CLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [vdac0clkctrl::W](W) writer structure"] -impl crate::Writable for VDAC0CLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`vdac0clkctrl::R`](R) reader structure"] +impl crate::Readable for Vdac0clkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`vdac0clkctrl::W`](W) writer structure"] +impl crate::Writable for Vdac0clkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets VDAC0CLKCTRL to value 0x01"] -impl crate::Resettable for VDAC0CLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for Vdac0clkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/wdog0clkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/wdog0clkctrl.rs index 463d231..1bf0cbd 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/wdog0clkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/wdog0clkctrl.rs @@ -1,155 +1,122 @@ #[doc = "Register `WDOG0CLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `WDOG0CLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "1: LFRCO is clocking WDOG0CLK"] - LFRCO = 1, + Lfrco = 1, #[doc = "2: LFXO is clocking WDOG0CLK"] - LFXO = 2, + Lfxo = 2, #[doc = "3: ULFRCO is clocking WDOG0CLK"] - ULFRCO = 3, + Ulfrco = 3, #[doc = "4: HCLKDIV1024 is clocking WDOG0CLK"] - HCLKDIV1024 = 4, + Hclkdiv1024 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(CLKSEL_A::LFRCO), - 2 => Some(CLKSEL_A::LFXO), - 3 => Some(CLKSEL_A::ULFRCO), - 4 => Some(CLKSEL_A::HCLKDIV1024), + 1 => Some(Clksel::Lfrco), + 2 => Some(Clksel::Lfxo), + 3 => Some(Clksel::Ulfrco), + 4 => Some(Clksel::Hclkdiv1024), _ => None, } } - #[doc = "Checks if the value of the field is `LFRCO`"] + #[doc = "LFRCO is clocking WDOG0CLK"] #[inline(always)] pub fn is_lfrco(&self) -> bool { - *self == CLKSEL_A::LFRCO + *self == Clksel::Lfrco } - #[doc = "Checks if the value of the field is `LFXO`"] + #[doc = "LFXO is clocking WDOG0CLK"] #[inline(always)] pub fn is_lfxo(&self) -> bool { - *self == CLKSEL_A::LFXO + *self == Clksel::Lfxo } - #[doc = "Checks if the value of the field is `ULFRCO`"] + #[doc = "ULFRCO is clocking WDOG0CLK"] #[inline(always)] pub fn is_ulfrco(&self) -> bool { - *self == CLKSEL_A::ULFRCO + *self == Clksel::Ulfrco } - #[doc = "Checks if the value of the field is `HCLKDIV1024`"] + #[doc = "HCLKDIV1024 is clocking WDOG0CLK"] #[inline(always)] pub fn is_hclkdiv1024(&self) -> bool { - *self == CLKSEL_A::HCLKDIV1024 + *self == Clksel::Hclkdiv1024 } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, WDOG0CLKCTRL_SPEC, u8, CLKSEL_A, 3, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "LFRCO is clocking WDOG0CLK"] #[inline(always)] - pub fn lfrco(self) -> &'a mut W { - self.variant(CLKSEL_A::LFRCO) + pub fn lfrco(self) -> &'a mut crate::W { + self.variant(Clksel::Lfrco) } #[doc = "LFXO is clocking WDOG0CLK"] #[inline(always)] - pub fn lfxo(self) -> &'a mut W { - self.variant(CLKSEL_A::LFXO) + pub fn lfxo(self) -> &'a mut crate::W { + self.variant(Clksel::Lfxo) } #[doc = "ULFRCO is clocking WDOG0CLK"] #[inline(always)] - pub fn ulfrco(self) -> &'a mut W { - self.variant(CLKSEL_A::ULFRCO) + pub fn ulfrco(self) -> &'a mut crate::W { + self.variant(Clksel::Ulfrco) } #[doc = "HCLKDIV1024 is clocking WDOG0CLK"] #[inline(always)] - pub fn hclkdiv1024(self) -> &'a mut W { - self.variant(CLKSEL_A::HCLKDIV1024) + pub fn hclkdiv1024(self) -> &'a mut crate::W { + self.variant(Clksel::Hclkdiv1024) } } impl R { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 7) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdog0clkctrl](index.html) module"] -pub struct WDOG0CLKCTRL_SPEC; -impl crate::RegisterSpec for WDOG0CLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`wdog0clkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdog0clkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Wdog0clkctrlSpec; +impl crate::RegisterSpec for Wdog0clkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [wdog0clkctrl::R](R) reader structure"] -impl crate::Readable for WDOG0CLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [wdog0clkctrl::W](W) writer structure"] -impl crate::Writable for WDOG0CLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`wdog0clkctrl::R`](R) reader structure"] +impl crate::Readable for Wdog0clkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`wdog0clkctrl::W`](W) writer structure"] +impl crate::Writable for Wdog0clkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WDOG0CLKCTRL to value 0x01"] -impl crate::Resettable for WDOG0CLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for Wdog0clkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/wdog1clkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/wdog1clkctrl.rs index 8124868..bd596e7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/wdog1clkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/wdog1clkctrl.rs @@ -1,155 +1,122 @@ #[doc = "Register `WDOG1CLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `WDOG1CLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "1: LFRCO is clocking WDOG0CLK"] - LFRCO = 1, + Lfrco = 1, #[doc = "2: LFXO is clocking WDOG0CLK"] - LFXO = 2, + Lfxo = 2, #[doc = "3: ULFRCO is clocking WDOG0CLK"] - ULFRCO = 3, + Ulfrco = 3, #[doc = "4: HCLKDIV1024 is clocking WDOG0CLK"] - HCLKDIV1024 = 4, + Hclkdiv1024 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(CLKSEL_A::LFRCO), - 2 => Some(CLKSEL_A::LFXO), - 3 => Some(CLKSEL_A::ULFRCO), - 4 => Some(CLKSEL_A::HCLKDIV1024), + 1 => Some(Clksel::Lfrco), + 2 => Some(Clksel::Lfxo), + 3 => Some(Clksel::Ulfrco), + 4 => Some(Clksel::Hclkdiv1024), _ => None, } } - #[doc = "Checks if the value of the field is `LFRCO`"] + #[doc = "LFRCO is clocking WDOG0CLK"] #[inline(always)] pub fn is_lfrco(&self) -> bool { - *self == CLKSEL_A::LFRCO + *self == Clksel::Lfrco } - #[doc = "Checks if the value of the field is `LFXO`"] + #[doc = "LFXO is clocking WDOG0CLK"] #[inline(always)] pub fn is_lfxo(&self) -> bool { - *self == CLKSEL_A::LFXO + *self == Clksel::Lfxo } - #[doc = "Checks if the value of the field is `ULFRCO`"] + #[doc = "ULFRCO is clocking WDOG0CLK"] #[inline(always)] pub fn is_ulfrco(&self) -> bool { - *self == CLKSEL_A::ULFRCO + *self == Clksel::Ulfrco } - #[doc = "Checks if the value of the field is `HCLKDIV1024`"] + #[doc = "HCLKDIV1024 is clocking WDOG0CLK"] #[inline(always)] pub fn is_hclkdiv1024(&self) -> bool { - *self == CLKSEL_A::HCLKDIV1024 + *self == Clksel::Hclkdiv1024 } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, WDOG1CLKCTRL_SPEC, u8, CLKSEL_A, 3, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "LFRCO is clocking WDOG0CLK"] #[inline(always)] - pub fn lfrco(self) -> &'a mut W { - self.variant(CLKSEL_A::LFRCO) + pub fn lfrco(self) -> &'a mut crate::W { + self.variant(Clksel::Lfrco) } #[doc = "LFXO is clocking WDOG0CLK"] #[inline(always)] - pub fn lfxo(self) -> &'a mut W { - self.variant(CLKSEL_A::LFXO) + pub fn lfxo(self) -> &'a mut crate::W { + self.variant(Clksel::Lfxo) } #[doc = "ULFRCO is clocking WDOG0CLK"] #[inline(always)] - pub fn ulfrco(self) -> &'a mut W { - self.variant(CLKSEL_A::ULFRCO) + pub fn ulfrco(self) -> &'a mut crate::W { + self.variant(Clksel::Ulfrco) } #[doc = "HCLKDIV1024 is clocking WDOG0CLK"] #[inline(always)] - pub fn hclkdiv1024(self) -> &'a mut W { - self.variant(CLKSEL_A::HCLKDIV1024) + pub fn hclkdiv1024(self) -> &'a mut crate::W { + self.variant(Clksel::Hclkdiv1024) } } impl R { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 7) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdog1clkctrl](index.html) module"] -pub struct WDOG1CLKCTRL_SPEC; -impl crate::RegisterSpec for WDOG1CLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`wdog1clkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdog1clkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Wdog1clkctrlSpec; +impl crate::RegisterSpec for Wdog1clkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [wdog1clkctrl::R](R) reader structure"] -impl crate::Readable for WDOG1CLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [wdog1clkctrl::W](W) writer structure"] -impl crate::Writable for WDOG1CLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`wdog1clkctrl::R`](R) reader structure"] +impl crate::Readable for Wdog1clkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`wdog1clkctrl::W`](W) writer structure"] +impl crate::Writable for Wdog1clkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WDOG1CLKCTRL to value 0x01"] -impl crate::Resettable for WDOG1CLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for Wdog1clkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/wdoglock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/wdoglock.rs index cd28d57..f47304f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/wdoglock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_ns/wdoglock.rs @@ -1,73 +1,55 @@ #[doc = "Register `WDOGLOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Configuration Lock Key\n\nValue on reset: 21079"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "37879: Write this value to unlock"] - UNLOCK = 37879, + Unlock = 37879, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Configuration Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, WDOGLOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write this value to unlock"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Configuration Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdoglock](index.html) module"] -pub struct WDOGLOCK_SPEC; -impl crate::RegisterSpec for WDOGLOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdoglock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct WdoglockSpec; +impl crate::RegisterSpec for WdoglockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [wdoglock::W](W) writer structure"] -impl crate::Writable for WDOGLOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`wdoglock::W`](W) writer structure"] +impl crate::Writable for WdoglockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WDOGLOCK to value 0x5257"] -impl crate::Resettable for WDOGLOCK_SPEC { - const RESET_VALUE: Self::Ux = 0x5257; +impl crate::Resettable for WdoglockSpec { + const RESET_VALUE: u32 = 0x5257; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s.rs index 17330eb..e505a3f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s.rs @@ -1,194 +1,364 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + ipversion: Ipversion, _reserved1: [u8; 0x04], - #[doc = "0x08 - No Description"] - pub status: STATUS, + status: Status, _reserved2: [u8; 0x04], + lock: Lock, + wdoglock: Wdoglock, + _reserved4: [u8; 0x08], + if_: If, + ien: Ien, + _reserved6: [u8; 0x28], + calcmd: Calcmd, + calctrl: Calctrl, + calcnt: Calcnt, + _reserved9: [u8; 0x08], + clken0: Clken0, + clken1: Clken1, + _reserved11: [u8; 0x04], + sysclkctrl: Sysclkctrl, + _reserved12: [u8; 0x0c], + traceclkctrl: Traceclkctrl, + _reserved13: [u8; 0x0c], + exportclkctrl: Exportclkctrl, + _reserved14: [u8; 0x6c], + dpllrefclkctrl: Dpllrefclkctrl, + _reserved15: [u8; 0x1c], + em01grpaclkctrl: Em01grpaclkctrl, + _reserved16: [u8; 0x04], + em01grpcclkctrl: Em01grpcclkctrl, + _reserved17: [u8; 0x14], + em23grpaclkctrl: Em23grpaclkctrl, + _reserved18: [u8; 0x1c], + em4grpaclkctrl: Em4grpaclkctrl, + _reserved19: [u8; 0x1c], + iadcclkctrl: Iadcclkctrl, + _reserved20: [u8; 0x7c], + wdog0clkctrl: Wdog0clkctrl, + _reserved21: [u8; 0x04], + wdog1clkctrl: Wdog1clkctrl, + _reserved22: [u8; 0x14], + eusart0clkctrl: Eusart0clkctrl, + _reserved23: [u8; 0x1c], + sysrtc0clkctrl: Sysrtc0clkctrl, + _reserved24: [u8; 0x0c], + lcdclkctrl: Lcdclkctrl, + _reserved25: [u8; 0x0c], + vdac0clkctrl: Vdac0clkctrl, + _reserved26: [u8; 0x0c], + pcnt0clkctrl: Pcnt0clkctrl, + _reserved27: [u8; 0x1c], + lesensehfclkctrl: Lesensehfclkctrl, +} +impl RegisterBlock { + #[doc = "0x00 - No Description"] + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } + #[doc = "0x08 - No Description"] + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x10 - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x14 - No Description"] - pub wdoglock: WDOGLOCK, - _reserved4: [u8; 0x08], + #[inline(always)] + pub const fn wdoglock(&self) -> &Wdoglock { + &self.wdoglock + } #[doc = "0x20 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x24 - No Description"] - pub ien: IEN, - _reserved6: [u8; 0x28], + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x50 - No Description"] - pub calcmd: CALCMD, + #[inline(always)] + pub const fn calcmd(&self) -> &Calcmd { + &self.calcmd + } #[doc = "0x54 - No Description"] - pub calctrl: CALCTRL, + #[inline(always)] + pub const fn calctrl(&self) -> &Calctrl { + &self.calctrl + } #[doc = "0x58 - No Description"] - pub calcnt: CALCNT, - _reserved9: [u8; 0x08], + #[inline(always)] + pub const fn calcnt(&self) -> &Calcnt { + &self.calcnt + } #[doc = "0x64 - No Description"] - pub clken0: CLKEN0, + #[inline(always)] + pub const fn clken0(&self) -> &Clken0 { + &self.clken0 + } #[doc = "0x68 - No Description"] - pub clken1: CLKEN1, - _reserved11: [u8; 0x04], + #[inline(always)] + pub const fn clken1(&self) -> &Clken1 { + &self.clken1 + } #[doc = "0x70 - No Description"] - pub sysclkctrl: SYSCLKCTRL, - _reserved12: [u8; 0x0c], + #[inline(always)] + pub const fn sysclkctrl(&self) -> &Sysclkctrl { + &self.sysclkctrl + } #[doc = "0x80 - No Description"] - pub traceclkctrl: TRACECLKCTRL, - _reserved13: [u8; 0x0c], + #[inline(always)] + pub const fn traceclkctrl(&self) -> &Traceclkctrl { + &self.traceclkctrl + } #[doc = "0x90 - No Description"] - pub exportclkctrl: EXPORTCLKCTRL, - _reserved14: [u8; 0x6c], + #[inline(always)] + pub const fn exportclkctrl(&self) -> &Exportclkctrl { + &self.exportclkctrl + } #[doc = "0x100 - No Description"] - pub dpllrefclkctrl: DPLLREFCLKCTRL, - _reserved15: [u8; 0x1c], + #[inline(always)] + pub const fn dpllrefclkctrl(&self) -> &Dpllrefclkctrl { + &self.dpllrefclkctrl + } #[doc = "0x120 - No Description"] - pub em01grpaclkctrl: EM01GRPACLKCTRL, - _reserved16: [u8; 0x04], + #[inline(always)] + pub const fn em01grpaclkctrl(&self) -> &Em01grpaclkctrl { + &self.em01grpaclkctrl + } #[doc = "0x128 - No Description"] - pub em01grpcclkctrl: EM01GRPCCLKCTRL, - _reserved17: [u8; 0x14], + #[inline(always)] + pub const fn em01grpcclkctrl(&self) -> &Em01grpcclkctrl { + &self.em01grpcclkctrl + } #[doc = "0x140 - No Description"] - pub em23grpaclkctrl: EM23GRPACLKCTRL, - _reserved18: [u8; 0x1c], + #[inline(always)] + pub const fn em23grpaclkctrl(&self) -> &Em23grpaclkctrl { + &self.em23grpaclkctrl + } #[doc = "0x160 - No Description"] - pub em4grpaclkctrl: EM4GRPACLKCTRL, - _reserved19: [u8; 0x1c], + #[inline(always)] + pub const fn em4grpaclkctrl(&self) -> &Em4grpaclkctrl { + &self.em4grpaclkctrl + } #[doc = "0x180 - No Description"] - pub iadcclkctrl: IADCCLKCTRL, - _reserved20: [u8; 0x7c], + #[inline(always)] + pub const fn iadcclkctrl(&self) -> &Iadcclkctrl { + &self.iadcclkctrl + } #[doc = "0x200 - No Description"] - pub wdog0clkctrl: WDOG0CLKCTRL, - _reserved21: [u8; 0x04], + #[inline(always)] + pub const fn wdog0clkctrl(&self) -> &Wdog0clkctrl { + &self.wdog0clkctrl + } #[doc = "0x208 - No Description"] - pub wdog1clkctrl: WDOG1CLKCTRL, - _reserved22: [u8; 0x14], + #[inline(always)] + pub const fn wdog1clkctrl(&self) -> &Wdog1clkctrl { + &self.wdog1clkctrl + } #[doc = "0x220 - No Description"] - pub eusart0clkctrl: EUSART0CLKCTRL, - _reserved23: [u8; 0x1c], + #[inline(always)] + pub const fn eusart0clkctrl(&self) -> &Eusart0clkctrl { + &self.eusart0clkctrl + } #[doc = "0x240 - No Description"] - pub sysrtc0clkctrl: SYSRTC0CLKCTRL, - _reserved24: [u8; 0x0c], + #[inline(always)] + pub const fn sysrtc0clkctrl(&self) -> &Sysrtc0clkctrl { + &self.sysrtc0clkctrl + } #[doc = "0x250 - No Description"] - pub lcdclkctrl: LCDCLKCTRL, - _reserved25: [u8; 0x0c], + #[inline(always)] + pub const fn lcdclkctrl(&self) -> &Lcdclkctrl { + &self.lcdclkctrl + } #[doc = "0x260 - No Description"] - pub vdac0clkctrl: VDAC0CLKCTRL, - _reserved26: [u8; 0x0c], + #[inline(always)] + pub const fn vdac0clkctrl(&self) -> &Vdac0clkctrl { + &self.vdac0clkctrl + } #[doc = "0x270 - No Description"] - pub pcnt0clkctrl: PCNT0CLKCTRL, - _reserved27: [u8; 0x1c], + #[inline(always)] + pub const fn pcnt0clkctrl(&self) -> &Pcnt0clkctrl { + &self.pcnt0clkctrl + } #[doc = "0x290 - No Description"] - pub lesensehfclkctrl: LESENSEHFCLKCTRL, + #[inline(always)] + pub const fn lesensehfclkctrl(&self) -> &Lesensehfclkctrl { + &self.lesensehfclkctrl + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "WDOGLOCK (w) register accessor: an alias for `Reg`"] -pub type WDOGLOCK = crate::Reg; +#[doc = "WDOGLOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdoglock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdoglock`] +module"] +#[doc(alias = "WDOGLOCK")] +pub type Wdoglock = crate::Reg; #[doc = "No Description"] pub mod wdoglock; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "CALCMD (w) register accessor: an alias for `Reg`"] -pub type CALCMD = crate::Reg; +#[doc = "CALCMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`calcmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@calcmd`] +module"] +#[doc(alias = "CALCMD")] +pub type Calcmd = crate::Reg; #[doc = "No Description"] pub mod calcmd; -#[doc = "CALCTRL (rw) register accessor: an alias for `Reg`"] -pub type CALCTRL = crate::Reg; +#[doc = "CALCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`calctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`calctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@calctrl`] +module"] +#[doc(alias = "CALCTRL")] +pub type Calctrl = crate::Reg; #[doc = "No Description"] pub mod calctrl; -#[doc = "CALCNT (r) register accessor: an alias for `Reg`"] -pub type CALCNT = crate::Reg; +#[doc = "CALCNT (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`calcnt::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@calcnt`] +module"] +#[doc(alias = "CALCNT")] +pub type Calcnt = crate::Reg; #[doc = "No Description"] pub mod calcnt; -#[doc = "CLKEN0 (rw) register accessor: an alias for `Reg`"] -pub type CLKEN0 = crate::Reg; +#[doc = "CLKEN0 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clken0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clken0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clken0`] +module"] +#[doc(alias = "CLKEN0")] +pub type Clken0 = crate::Reg; #[doc = "No Description"] pub mod clken0; -#[doc = "CLKEN1 (rw) register accessor: an alias for `Reg`"] -pub type CLKEN1 = crate::Reg; +#[doc = "CLKEN1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clken1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clken1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clken1`] +module"] +#[doc(alias = "CLKEN1")] +pub type Clken1 = crate::Reg; #[doc = "No Description"] pub mod clken1; -#[doc = "SYSCLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type SYSCLKCTRL = crate::Reg; +#[doc = "SYSCLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sysclkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sysclkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sysclkctrl`] +module"] +#[doc(alias = "SYSCLKCTRL")] +pub type Sysclkctrl = crate::Reg; #[doc = "No Description"] pub mod sysclkctrl; -#[doc = "TRACECLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type TRACECLKCTRL = crate::Reg; +#[doc = "TRACECLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`traceclkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`traceclkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@traceclkctrl`] +module"] +#[doc(alias = "TRACECLKCTRL")] +pub type Traceclkctrl = crate::Reg; #[doc = "No Description"] pub mod traceclkctrl; -#[doc = "EXPORTCLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type EXPORTCLKCTRL = crate::Reg; +#[doc = "EXPORTCLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`exportclkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`exportclkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@exportclkctrl`] +module"] +#[doc(alias = "EXPORTCLKCTRL")] +pub type Exportclkctrl = crate::Reg; #[doc = "No Description"] pub mod exportclkctrl; -#[doc = "DPLLREFCLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type DPLLREFCLKCTRL = crate::Reg; +#[doc = "DPLLREFCLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dpllrefclkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dpllrefclkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dpllrefclkctrl`] +module"] +#[doc(alias = "DPLLREFCLKCTRL")] +pub type Dpllrefclkctrl = crate::Reg; #[doc = "No Description"] pub mod dpllrefclkctrl; -#[doc = "EM01GRPACLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type EM01GRPACLKCTRL = crate::Reg; +#[doc = "EM01GRPACLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em01grpaclkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em01grpaclkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@em01grpaclkctrl`] +module"] +#[doc(alias = "EM01GRPACLKCTRL")] +pub type Em01grpaclkctrl = crate::Reg; #[doc = "No Description"] pub mod em01grpaclkctrl; -#[doc = "EM01GRPCCLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type EM01GRPCCLKCTRL = crate::Reg; +#[doc = "EM01GRPCCLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em01grpcclkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em01grpcclkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@em01grpcclkctrl`] +module"] +#[doc(alias = "EM01GRPCCLKCTRL")] +pub type Em01grpcclkctrl = crate::Reg; #[doc = "No Description"] pub mod em01grpcclkctrl; -#[doc = "EM23GRPACLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type EM23GRPACLKCTRL = crate::Reg; +#[doc = "EM23GRPACLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em23grpaclkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em23grpaclkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@em23grpaclkctrl`] +module"] +#[doc(alias = "EM23GRPACLKCTRL")] +pub type Em23grpaclkctrl = crate::Reg; #[doc = "No Description"] pub mod em23grpaclkctrl; -#[doc = "EM4GRPACLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type EM4GRPACLKCTRL = crate::Reg; +#[doc = "EM4GRPACLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em4grpaclkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em4grpaclkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@em4grpaclkctrl`] +module"] +#[doc(alias = "EM4GRPACLKCTRL")] +pub type Em4grpaclkctrl = crate::Reg; #[doc = "No Description"] pub mod em4grpaclkctrl; -#[doc = "IADCCLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type IADCCLKCTRL = crate::Reg; +#[doc = "IADCCLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`iadcclkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iadcclkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iadcclkctrl`] +module"] +#[doc(alias = "IADCCLKCTRL")] +pub type Iadcclkctrl = crate::Reg; #[doc = "No Description"] pub mod iadcclkctrl; -#[doc = "WDOG0CLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type WDOG0CLKCTRL = crate::Reg; +#[doc = "WDOG0CLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`wdog0clkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdog0clkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdog0clkctrl`] +module"] +#[doc(alias = "WDOG0CLKCTRL")] +pub type Wdog0clkctrl = crate::Reg; #[doc = "No Description"] pub mod wdog0clkctrl; -#[doc = "WDOG1CLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type WDOG1CLKCTRL = crate::Reg; +#[doc = "WDOG1CLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`wdog1clkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdog1clkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdog1clkctrl`] +module"] +#[doc(alias = "WDOG1CLKCTRL")] +pub type Wdog1clkctrl = crate::Reg; #[doc = "No Description"] pub mod wdog1clkctrl; -#[doc = "EUSART0CLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type EUSART0CLKCTRL = crate::Reg; +#[doc = "EUSART0CLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0clkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0clkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart0clkctrl`] +module"] +#[doc(alias = "EUSART0CLKCTRL")] +pub type Eusart0clkctrl = crate::Reg; #[doc = "No Description"] pub mod eusart0clkctrl; -#[doc = "SYSRTC0CLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type SYSRTC0CLKCTRL = crate::Reg; +#[doc = "SYSRTC0CLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sysrtc0clkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sysrtc0clkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sysrtc0clkctrl`] +module"] +#[doc(alias = "SYSRTC0CLKCTRL")] +pub type Sysrtc0clkctrl = crate::Reg; #[doc = "No Description"] pub mod sysrtc0clkctrl; -#[doc = "LCDCLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type LCDCLKCTRL = crate::Reg; +#[doc = "LCDCLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`lcdclkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lcdclkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lcdclkctrl`] +module"] +#[doc(alias = "LCDCLKCTRL")] +pub type Lcdclkctrl = crate::Reg; #[doc = "No Description"] pub mod lcdclkctrl; -#[doc = "VDAC0CLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type VDAC0CLKCTRL = crate::Reg; +#[doc = "VDAC0CLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`vdac0clkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`vdac0clkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vdac0clkctrl`] +module"] +#[doc(alias = "VDAC0CLKCTRL")] +pub type Vdac0clkctrl = crate::Reg; #[doc = "No Description"] pub mod vdac0clkctrl; -#[doc = "PCNT0CLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type PCNT0CLKCTRL = crate::Reg; +#[doc = "PCNT0CLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pcnt0clkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcnt0clkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcnt0clkctrl`] +module"] +#[doc(alias = "PCNT0CLKCTRL")] +pub type Pcnt0clkctrl = crate::Reg; #[doc = "No Description"] pub mod pcnt0clkctrl; -#[doc = "LESENSEHFCLKCTRL (rw) register accessor: an alias for `Reg`"] -pub type LESENSEHFCLKCTRL = crate::Reg; +#[doc = "LESENSEHFCLKCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`lesensehfclkctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesensehfclkctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesensehfclkctrl`] +module"] +#[doc(alias = "LESENSEHFCLKCTRL")] +pub type Lesensehfclkctrl = crate::Reg; #[doc = "No Description"] pub mod lesensehfclkctrl; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/calcmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/calcmd.rs index e461f05..dae996c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/calcmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/calcmd.rs @@ -1,60 +1,35 @@ #[doc = "Register `CALCMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CALSTART` writer - Calibration Start"] -pub type CALSTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, CALCMD_SPEC, bool, O>; +pub type CalstartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CALSTOP` writer - Calibration Stop"] -pub type CALSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CALCMD_SPEC, bool, O>; +pub type CalstopW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Calibration Start"] #[inline(always)] #[must_use] - pub fn calstart(&mut self) -> CALSTART_W<0> { - CALSTART_W::new(self) + pub fn calstart(&mut self) -> CalstartW { + CalstartW::new(self, 0) } #[doc = "Bit 1 - Calibration Stop"] #[inline(always)] #[must_use] - pub fn calstop(&mut self) -> CALSTOP_W<1> { - CALSTOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn calstop(&mut self) -> CalstopW { + CalstopW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [calcmd](index.html) module"] -pub struct CALCMD_SPEC; -impl crate::RegisterSpec for CALCMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`calcmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CalcmdSpec; +impl crate::RegisterSpec for CalcmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [calcmd::W](W) writer structure"] -impl crate::Writable for CALCMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`calcmd::W`](W) writer structure"] +impl crate::Writable for CalcmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CALCMD to value 0"] -impl crate::Resettable for CALCMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CalcmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/calcnt.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/calcnt.rs index 83b6e03..6d727f6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/calcnt.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/calcnt.rs @@ -1,37 +1,22 @@ #[doc = "Register `CALCNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CALCNT` reader - Calibration Result Counter Value"] -pub type CALCNT_R = crate::FieldReader; +pub type CalcntR = crate::FieldReader; impl R { #[doc = "Bits 0:19 - Calibration Result Counter Value"] #[inline(always)] - pub fn calcnt(&self) -> CALCNT_R { - CALCNT_R::new(self.bits & 0x000f_ffff) + pub fn calcnt(&self) -> CalcntR { + CalcntR::new(self.bits & 0x000f_ffff) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [calcnt](index.html) module"] -pub struct CALCNT_SPEC; -impl crate::RegisterSpec for CALCNT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`calcnt::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CalcntSpec; +impl crate::RegisterSpec for CalcntSpec { type Ux = u32; } -#[doc = "`read()` method returns [calcnt::R](R) reader structure"] -impl crate::Readable for CALCNT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`calcnt::R`](R) reader structure"] +impl crate::Readable for CalcntSpec {} #[doc = "`reset()` method sets CALCNT to value 0"] -impl crate::Resettable for CALCNT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CalcntSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/calctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/calctrl.rs index 63cf5d2..27769af 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/calctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/calctrl.rs @@ -1,417 +1,392 @@ #[doc = "Register `CALCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CALCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CALTOP` reader - Calibration Counter Top Value"] -pub type CALTOP_R = crate::FieldReader; +pub type CaltopR = crate::FieldReader; #[doc = "Field `CALTOP` writer - Calibration Counter Top Value"] -pub type CALTOP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CALCTRL_SPEC, u32, u32, 20, O>; +pub type CaltopW<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; #[doc = "Field `CONT` reader - Continuous Calibration"] -pub type CONT_R = crate::BitReader; +pub type ContR = crate::BitReader; #[doc = "Field `CONT` writer - Continuous Calibration"] -pub type CONT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CALCTRL_SPEC, bool, O>; -#[doc = "Field `UPSEL` reader - Calibration Up-counter Select"] -pub type UPSEL_R = crate::FieldReader; +pub type ContW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Calibration Up-counter Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum UPSEL_A { +pub enum Upsel { #[doc = "0: Up-counter is not clocked"] - DISABLED = 0, + Disabled = 0, #[doc = "1: PRS CMU_CALUP consumer is clocking up-counter"] - PRS = 1, + Prs = 1, #[doc = "2: HFXO is clocking up-counter"] - HFXO = 2, + Hfxo = 2, #[doc = "3: LFXO is clocking up-counter"] - LFXO = 3, + Lfxo = 3, #[doc = "4: HFRCODPLL is clocking up-counter"] - HFRCODPLL = 4, + Hfrcodpll = 4, #[doc = "5: HFRCOEM23 is clocking up-counter"] - HFRCOEM23 = 5, + Hfrcoem23 = 5, #[doc = "8: FSRCO is clocking up-counter"] - FSRCO = 8, + Fsrco = 8, #[doc = "9: LFRCO is clocking up-counter"] - LFRCO = 9, + Lfrco = 9, #[doc = "10: ULFRCO is clocking up-counter"] - ULFRCO = 10, + Ulfrco = 10, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: UPSEL_A) -> Self { + fn from(variant: Upsel) -> Self { variant as _ } } -impl UPSEL_R { +impl crate::FieldSpec for Upsel { + type Ux = u8; +} +impl crate::IsEnum for Upsel {} +#[doc = "Field `UPSEL` reader - Calibration Up-counter Select"] +pub type UpselR = crate::FieldReader; +impl UpselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(UPSEL_A::DISABLED), - 1 => Some(UPSEL_A::PRS), - 2 => Some(UPSEL_A::HFXO), - 3 => Some(UPSEL_A::LFXO), - 4 => Some(UPSEL_A::HFRCODPLL), - 5 => Some(UPSEL_A::HFRCOEM23), - 8 => Some(UPSEL_A::FSRCO), - 9 => Some(UPSEL_A::LFRCO), - 10 => Some(UPSEL_A::ULFRCO), + 0 => Some(Upsel::Disabled), + 1 => Some(Upsel::Prs), + 2 => Some(Upsel::Hfxo), + 3 => Some(Upsel::Lfxo), + 4 => Some(Upsel::Hfrcodpll), + 5 => Some(Upsel::Hfrcoem23), + 8 => Some(Upsel::Fsrco), + 9 => Some(Upsel::Lfrco), + 10 => Some(Upsel::Ulfrco), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Up-counter is not clocked"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == UPSEL_A::DISABLED + *self == Upsel::Disabled } - #[doc = "Checks if the value of the field is `PRS`"] + #[doc = "PRS CMU_CALUP consumer is clocking up-counter"] #[inline(always)] pub fn is_prs(&self) -> bool { - *self == UPSEL_A::PRS + *self == Upsel::Prs } - #[doc = "Checks if the value of the field is `HFXO`"] + #[doc = "HFXO is clocking up-counter"] #[inline(always)] pub fn is_hfxo(&self) -> bool { - *self == UPSEL_A::HFXO + *self == Upsel::Hfxo } - #[doc = "Checks if the value of the field is `LFXO`"] + #[doc = "LFXO is clocking up-counter"] #[inline(always)] pub fn is_lfxo(&self) -> bool { - *self == UPSEL_A::LFXO + *self == Upsel::Lfxo } - #[doc = "Checks if the value of the field is `HFRCODPLL`"] + #[doc = "HFRCODPLL is clocking up-counter"] #[inline(always)] pub fn is_hfrcodpll(&self) -> bool { - *self == UPSEL_A::HFRCODPLL + *self == Upsel::Hfrcodpll } - #[doc = "Checks if the value of the field is `HFRCOEM23`"] + #[doc = "HFRCOEM23 is clocking up-counter"] #[inline(always)] pub fn is_hfrcoem23(&self) -> bool { - *self == UPSEL_A::HFRCOEM23 + *self == Upsel::Hfrcoem23 } - #[doc = "Checks if the value of the field is `FSRCO`"] + #[doc = "FSRCO is clocking up-counter"] #[inline(always)] pub fn is_fsrco(&self) -> bool { - *self == UPSEL_A::FSRCO + *self == Upsel::Fsrco } - #[doc = "Checks if the value of the field is `LFRCO`"] + #[doc = "LFRCO is clocking up-counter"] #[inline(always)] pub fn is_lfrco(&self) -> bool { - *self == UPSEL_A::LFRCO + *self == Upsel::Lfrco } - #[doc = "Checks if the value of the field is `ULFRCO`"] + #[doc = "ULFRCO is clocking up-counter"] #[inline(always)] pub fn is_ulfrco(&self) -> bool { - *self == UPSEL_A::ULFRCO + *self == Upsel::Ulfrco } } #[doc = "Field `UPSEL` writer - Calibration Up-counter Select"] -pub type UPSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CALCTRL_SPEC, u8, UPSEL_A, 4, O>; -impl<'a, const O: u8> UPSEL_W<'a, O> { +pub type UpselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Upsel>; +impl<'a, REG> UpselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Up-counter is not clocked"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(UPSEL_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Upsel::Disabled) } #[doc = "PRS CMU_CALUP consumer is clocking up-counter"] #[inline(always)] - pub fn prs(self) -> &'a mut W { - self.variant(UPSEL_A::PRS) + pub fn prs(self) -> &'a mut crate::W { + self.variant(Upsel::Prs) } #[doc = "HFXO is clocking up-counter"] #[inline(always)] - pub fn hfxo(self) -> &'a mut W { - self.variant(UPSEL_A::HFXO) + pub fn hfxo(self) -> &'a mut crate::W { + self.variant(Upsel::Hfxo) } #[doc = "LFXO is clocking up-counter"] #[inline(always)] - pub fn lfxo(self) -> &'a mut W { - self.variant(UPSEL_A::LFXO) + pub fn lfxo(self) -> &'a mut crate::W { + self.variant(Upsel::Lfxo) } #[doc = "HFRCODPLL is clocking up-counter"] #[inline(always)] - pub fn hfrcodpll(self) -> &'a mut W { - self.variant(UPSEL_A::HFRCODPLL) + pub fn hfrcodpll(self) -> &'a mut crate::W { + self.variant(Upsel::Hfrcodpll) } #[doc = "HFRCOEM23 is clocking up-counter"] #[inline(always)] - pub fn hfrcoem23(self) -> &'a mut W { - self.variant(UPSEL_A::HFRCOEM23) + pub fn hfrcoem23(self) -> &'a mut crate::W { + self.variant(Upsel::Hfrcoem23) } #[doc = "FSRCO is clocking up-counter"] #[inline(always)] - pub fn fsrco(self) -> &'a mut W { - self.variant(UPSEL_A::FSRCO) + pub fn fsrco(self) -> &'a mut crate::W { + self.variant(Upsel::Fsrco) } #[doc = "LFRCO is clocking up-counter"] #[inline(always)] - pub fn lfrco(self) -> &'a mut W { - self.variant(UPSEL_A::LFRCO) + pub fn lfrco(self) -> &'a mut crate::W { + self.variant(Upsel::Lfrco) } #[doc = "ULFRCO is clocking up-counter"] #[inline(always)] - pub fn ulfrco(self) -> &'a mut W { - self.variant(UPSEL_A::ULFRCO) + pub fn ulfrco(self) -> &'a mut crate::W { + self.variant(Upsel::Ulfrco) } } -#[doc = "Field `DOWNSEL` reader - Calibration Down-counter Select"] -pub type DOWNSEL_R = crate::FieldReader; #[doc = "Calibration Down-counter Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DOWNSEL_A { +pub enum Downsel { #[doc = "0: Down-counter is not clocked"] - DISABLED = 0, + Disabled = 0, #[doc = "1: HCLK is clocking down-counter"] - HCLK = 1, + Hclk = 1, #[doc = "2: PRS CMU_CALDN consumer is clocking down-counter"] - PRS = 2, + Prs = 2, #[doc = "3: HFXO is clocking down-counter"] - HFXO = 3, + Hfxo = 3, #[doc = "4: LFXO is clocking down-counter"] - LFXO = 4, + Lfxo = 4, #[doc = "5: HFRCODPLL is clocking down-counter"] - HFRCODPLL = 5, + Hfrcodpll = 5, #[doc = "6: HFRCOEM23 is clocking down-counter"] - HFRCOEM23 = 6, + Hfrcoem23 = 6, #[doc = "9: FSRCO is clocking down-counter"] - FSRCO = 9, + Fsrco = 9, #[doc = "10: LFRCO is clocking down-counter"] - LFRCO = 10, + Lfrco = 10, #[doc = "11: ULFRCO is clocking down-counter"] - ULFRCO = 11, + Ulfrco = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DOWNSEL_A) -> Self { + fn from(variant: Downsel) -> Self { variant as _ } } -impl DOWNSEL_R { +impl crate::FieldSpec for Downsel { + type Ux = u8; +} +impl crate::IsEnum for Downsel {} +#[doc = "Field `DOWNSEL` reader - Calibration Down-counter Select"] +pub type DownselR = crate::FieldReader; +impl DownselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(DOWNSEL_A::DISABLED), - 1 => Some(DOWNSEL_A::HCLK), - 2 => Some(DOWNSEL_A::PRS), - 3 => Some(DOWNSEL_A::HFXO), - 4 => Some(DOWNSEL_A::LFXO), - 5 => Some(DOWNSEL_A::HFRCODPLL), - 6 => Some(DOWNSEL_A::HFRCOEM23), - 9 => Some(DOWNSEL_A::FSRCO), - 10 => Some(DOWNSEL_A::LFRCO), - 11 => Some(DOWNSEL_A::ULFRCO), + 0 => Some(Downsel::Disabled), + 1 => Some(Downsel::Hclk), + 2 => Some(Downsel::Prs), + 3 => Some(Downsel::Hfxo), + 4 => Some(Downsel::Lfxo), + 5 => Some(Downsel::Hfrcodpll), + 6 => Some(Downsel::Hfrcoem23), + 9 => Some(Downsel::Fsrco), + 10 => Some(Downsel::Lfrco), + 11 => Some(Downsel::Ulfrco), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Down-counter is not clocked"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == DOWNSEL_A::DISABLED + *self == Downsel::Disabled } - #[doc = "Checks if the value of the field is `HCLK`"] + #[doc = "HCLK is clocking down-counter"] #[inline(always)] pub fn is_hclk(&self) -> bool { - *self == DOWNSEL_A::HCLK + *self == Downsel::Hclk } - #[doc = "Checks if the value of the field is `PRS`"] + #[doc = "PRS CMU_CALDN consumer is clocking down-counter"] #[inline(always)] pub fn is_prs(&self) -> bool { - *self == DOWNSEL_A::PRS + *self == Downsel::Prs } - #[doc = "Checks if the value of the field is `HFXO`"] + #[doc = "HFXO is clocking down-counter"] #[inline(always)] pub fn is_hfxo(&self) -> bool { - *self == DOWNSEL_A::HFXO + *self == Downsel::Hfxo } - #[doc = "Checks if the value of the field is `LFXO`"] + #[doc = "LFXO is clocking down-counter"] #[inline(always)] pub fn is_lfxo(&self) -> bool { - *self == DOWNSEL_A::LFXO + *self == Downsel::Lfxo } - #[doc = "Checks if the value of the field is `HFRCODPLL`"] + #[doc = "HFRCODPLL is clocking down-counter"] #[inline(always)] pub fn is_hfrcodpll(&self) -> bool { - *self == DOWNSEL_A::HFRCODPLL + *self == Downsel::Hfrcodpll } - #[doc = "Checks if the value of the field is `HFRCOEM23`"] + #[doc = "HFRCOEM23 is clocking down-counter"] #[inline(always)] pub fn is_hfrcoem23(&self) -> bool { - *self == DOWNSEL_A::HFRCOEM23 + *self == Downsel::Hfrcoem23 } - #[doc = "Checks if the value of the field is `FSRCO`"] + #[doc = "FSRCO is clocking down-counter"] #[inline(always)] pub fn is_fsrco(&self) -> bool { - *self == DOWNSEL_A::FSRCO + *self == Downsel::Fsrco } - #[doc = "Checks if the value of the field is `LFRCO`"] + #[doc = "LFRCO is clocking down-counter"] #[inline(always)] pub fn is_lfrco(&self) -> bool { - *self == DOWNSEL_A::LFRCO + *self == Downsel::Lfrco } - #[doc = "Checks if the value of the field is `ULFRCO`"] + #[doc = "ULFRCO is clocking down-counter"] #[inline(always)] pub fn is_ulfrco(&self) -> bool { - *self == DOWNSEL_A::ULFRCO + *self == Downsel::Ulfrco } } #[doc = "Field `DOWNSEL` writer - Calibration Down-counter Select"] -pub type DOWNSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CALCTRL_SPEC, u8, DOWNSEL_A, 4, O>; -impl<'a, const O: u8> DOWNSEL_W<'a, O> { +pub type DownselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Downsel>; +impl<'a, REG> DownselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Down-counter is not clocked"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(DOWNSEL_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Downsel::Disabled) } #[doc = "HCLK is clocking down-counter"] #[inline(always)] - pub fn hclk(self) -> &'a mut W { - self.variant(DOWNSEL_A::HCLK) + pub fn hclk(self) -> &'a mut crate::W { + self.variant(Downsel::Hclk) } #[doc = "PRS CMU_CALDN consumer is clocking down-counter"] #[inline(always)] - pub fn prs(self) -> &'a mut W { - self.variant(DOWNSEL_A::PRS) + pub fn prs(self) -> &'a mut crate::W { + self.variant(Downsel::Prs) } #[doc = "HFXO is clocking down-counter"] #[inline(always)] - pub fn hfxo(self) -> &'a mut W { - self.variant(DOWNSEL_A::HFXO) + pub fn hfxo(self) -> &'a mut crate::W { + self.variant(Downsel::Hfxo) } #[doc = "LFXO is clocking down-counter"] #[inline(always)] - pub fn lfxo(self) -> &'a mut W { - self.variant(DOWNSEL_A::LFXO) + pub fn lfxo(self) -> &'a mut crate::W { + self.variant(Downsel::Lfxo) } #[doc = "HFRCODPLL is clocking down-counter"] #[inline(always)] - pub fn hfrcodpll(self) -> &'a mut W { - self.variant(DOWNSEL_A::HFRCODPLL) + pub fn hfrcodpll(self) -> &'a mut crate::W { + self.variant(Downsel::Hfrcodpll) } #[doc = "HFRCOEM23 is clocking down-counter"] #[inline(always)] - pub fn hfrcoem23(self) -> &'a mut W { - self.variant(DOWNSEL_A::HFRCOEM23) + pub fn hfrcoem23(self) -> &'a mut crate::W { + self.variant(Downsel::Hfrcoem23) } #[doc = "FSRCO is clocking down-counter"] #[inline(always)] - pub fn fsrco(self) -> &'a mut W { - self.variant(DOWNSEL_A::FSRCO) + pub fn fsrco(self) -> &'a mut crate::W { + self.variant(Downsel::Fsrco) } #[doc = "LFRCO is clocking down-counter"] #[inline(always)] - pub fn lfrco(self) -> &'a mut W { - self.variant(DOWNSEL_A::LFRCO) + pub fn lfrco(self) -> &'a mut crate::W { + self.variant(Downsel::Lfrco) } #[doc = "ULFRCO is clocking down-counter"] #[inline(always)] - pub fn ulfrco(self) -> &'a mut W { - self.variant(DOWNSEL_A::ULFRCO) + pub fn ulfrco(self) -> &'a mut crate::W { + self.variant(Downsel::Ulfrco) } } impl R { #[doc = "Bits 0:19 - Calibration Counter Top Value"] #[inline(always)] - pub fn caltop(&self) -> CALTOP_R { - CALTOP_R::new(self.bits & 0x000f_ffff) + pub fn caltop(&self) -> CaltopR { + CaltopR::new(self.bits & 0x000f_ffff) } #[doc = "Bit 23 - Continuous Calibration"] #[inline(always)] - pub fn cont(&self) -> CONT_R { - CONT_R::new(((self.bits >> 23) & 1) != 0) + pub fn cont(&self) -> ContR { + ContR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:27 - Calibration Up-counter Select"] #[inline(always)] - pub fn upsel(&self) -> UPSEL_R { - UPSEL_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn upsel(&self) -> UpselR { + UpselR::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 28:31 - Calibration Down-counter Select"] #[inline(always)] - pub fn downsel(&self) -> DOWNSEL_R { - DOWNSEL_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn downsel(&self) -> DownselR { + DownselR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:19 - Calibration Counter Top Value"] #[inline(always)] #[must_use] - pub fn caltop(&mut self) -> CALTOP_W<0> { - CALTOP_W::new(self) + pub fn caltop(&mut self) -> CaltopW { + CaltopW::new(self, 0) } #[doc = "Bit 23 - Continuous Calibration"] #[inline(always)] #[must_use] - pub fn cont(&mut self) -> CONT_W<23> { - CONT_W::new(self) + pub fn cont(&mut self) -> ContW { + ContW::new(self, 23) } #[doc = "Bits 24:27 - Calibration Up-counter Select"] #[inline(always)] #[must_use] - pub fn upsel(&mut self) -> UPSEL_W<24> { - UPSEL_W::new(self) + pub fn upsel(&mut self) -> UpselW { + UpselW::new(self, 24) } #[doc = "Bits 28:31 - Calibration Down-counter Select"] #[inline(always)] #[must_use] - pub fn downsel(&mut self) -> DOWNSEL_W<28> { - DOWNSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn downsel(&mut self) -> DownselW { + DownselW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [calctrl](index.html) module"] -pub struct CALCTRL_SPEC; -impl crate::RegisterSpec for CALCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`calctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`calctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CalctrlSpec; +impl crate::RegisterSpec for CalctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [calctrl::R](R) reader structure"] -impl crate::Readable for CALCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [calctrl::W](W) writer structure"] -impl crate::Writable for CALCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`calctrl::R`](R) reader structure"] +impl crate::Readable for CalctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`calctrl::W`](W) writer structure"] +impl crate::Writable for CalctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CALCTRL to value 0"] -impl crate::Resettable for CALCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CalctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/clken0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/clken0.rs index 1e6d50b..e7ffcc9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/clken0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/clken0.rs @@ -1,530 +1,490 @@ #[doc = "Register `CLKEN0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKEN0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LDMA` reader - Enable Bus Clock"] -pub type LDMA_R = crate::BitReader; +pub type LdmaR = crate::BitReader; #[doc = "Field `LDMA` writer - Enable Bus Clock"] -pub type LDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type LdmaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LDMAXBAR` reader - Enable Bus Clock"] -pub type LDMAXBAR_R = crate::BitReader; +pub type LdmaxbarR = crate::BitReader; #[doc = "Field `LDMAXBAR` writer - Enable Bus Clock"] -pub type LDMAXBAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type LdmaxbarW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GPCRC` reader - Enable Bus Clock"] -pub type GPCRC_R = crate::BitReader; +pub type GpcrcR = crate::BitReader; #[doc = "Field `GPCRC` writer - Enable Bus Clock"] -pub type GPCRC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type GpcrcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER0` reader - Enable Bus Clock"] -pub type TIMER0_R = crate::BitReader; +pub type Timer0R = crate::BitReader; #[doc = "Field `TIMER0` writer - Enable Bus Clock"] -pub type TIMER0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Timer0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER1` reader - Enable Bus Clock"] -pub type TIMER1_R = crate::BitReader; +pub type Timer1R = crate::BitReader; #[doc = "Field `TIMER1` writer - Enable Bus Clock"] -pub type TIMER1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Timer1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER2` reader - Enable Bus Clock"] -pub type TIMER2_R = crate::BitReader; +pub type Timer2R = crate::BitReader; #[doc = "Field `TIMER2` writer - Enable Bus Clock"] -pub type TIMER2_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Timer2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER3` reader - Enable Bus Clock"] -pub type TIMER3_R = crate::BitReader; +pub type Timer3R = crate::BitReader; #[doc = "Field `TIMER3` writer - Enable Bus Clock"] -pub type TIMER3_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Timer3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER4` reader - Enable Bus Clock"] -pub type TIMER4_R = crate::BitReader; +pub type Timer4R = crate::BitReader; #[doc = "Field `TIMER4` writer - Enable Bus Clock"] -pub type TIMER4_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Timer4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USART0` reader - Enable Bus Clock"] -pub type USART0_R = crate::BitReader; +pub type Usart0R = crate::BitReader; #[doc = "Field `USART0` writer - Enable Bus Clock"] -pub type USART0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Usart0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IADC0` reader - Enable Bus Clock"] -pub type IADC0_R = crate::BitReader; +pub type Iadc0R = crate::BitReader; #[doc = "Field `IADC0` writer - Enable Bus Clock"] -pub type IADC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Iadc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AMUXCP0` reader - Enable Bus Clock"] -pub type AMUXCP0_R = crate::BitReader; +pub type Amuxcp0R = crate::BitReader; #[doc = "Field `AMUXCP0` writer - Enable Bus Clock"] -pub type AMUXCP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Amuxcp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LETIMER0` reader - Enable Bus Clock"] -pub type LETIMER0_R = crate::BitReader; +pub type Letimer0R = crate::BitReader; #[doc = "Field `LETIMER0` writer - Enable Bus Clock"] -pub type LETIMER0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Letimer0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WDOG0` reader - Enable Bus Clock"] -pub type WDOG0_R = crate::BitReader; +pub type Wdog0R = crate::BitReader; #[doc = "Field `WDOG0` writer - Enable Bus Clock"] -pub type WDOG0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Wdog0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C0` reader - Enable Bus Clock"] -pub type I2C0_R = crate::BitReader; +pub type I2c0R = crate::BitReader; #[doc = "Field `I2C0` writer - Enable Bus Clock"] -pub type I2C0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type I2c0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C1` reader - Enable Bus Clock"] -pub type I2C1_R = crate::BitReader; +pub type I2c1R = crate::BitReader; #[doc = "Field `I2C1` writer - Enable Bus Clock"] -pub type I2C1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type I2c1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYSCFG` reader - Enable Bus Clock"] -pub type SYSCFG_R = crate::BitReader; +pub type SyscfgR = crate::BitReader; #[doc = "Field `SYSCFG` writer - Enable Bus Clock"] -pub type SYSCFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type SyscfgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DPLL0` reader - Enable Bus Clock"] -pub type DPLL0_R = crate::BitReader; +pub type Dpll0R = crate::BitReader; #[doc = "Field `DPLL0` writer - Enable Bus Clock"] -pub type DPLL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Dpll0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HFRCO0` reader - Enable Bus Clock"] -pub type HFRCO0_R = crate::BitReader; +pub type Hfrco0R = crate::BitReader; #[doc = "Field `HFRCO0` writer - Enable Bus Clock"] -pub type HFRCO0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Hfrco0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HFRCOEM23` reader - Enable Bus Clock"] -pub type HFRCOEM23_R = crate::BitReader; +pub type Hfrcoem23R = crate::BitReader; #[doc = "Field `HFRCOEM23` writer - Enable Bus Clock"] -pub type HFRCOEM23_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Hfrcoem23W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HFXO0` reader - Enable Bus Clock"] -pub type HFXO0_R = crate::BitReader; +pub type Hfxo0R = crate::BitReader; #[doc = "Field `HFXO0` writer - Enable Bus Clock"] -pub type HFXO0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Hfxo0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FSRCO` reader - Enable Bus Clock"] -pub type FSRCO_R = crate::BitReader; +pub type FsrcoR = crate::BitReader; #[doc = "Field `FSRCO` writer - Enable Bus Clock"] -pub type FSRCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type FsrcoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LFRCO` reader - Enable Bus Clock"] -pub type LFRCO_R = crate::BitReader; +pub type LfrcoR = crate::BitReader; #[doc = "Field `LFRCO` writer - Enable Bus Clock"] -pub type LFRCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type LfrcoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LFXO` reader - Enable Bus Clock"] -pub type LFXO_R = crate::BitReader; +pub type LfxoR = crate::BitReader; #[doc = "Field `LFXO` writer - Enable Bus Clock"] -pub type LFXO_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type LfxoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ULFRCO` reader - Enable Bus Clock"] -pub type ULFRCO_R = crate::BitReader; +pub type UlfrcoR = crate::BitReader; #[doc = "Field `ULFRCO` writer - Enable Bus Clock"] -pub type ULFRCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type UlfrcoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LESENSE` reader - Enable Bus Clock"] -pub type LESENSE_R = crate::BitReader; +pub type LesenseR = crate::BitReader; #[doc = "Field `LESENSE` writer - Enable Bus Clock"] -pub type LESENSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type LesenseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GPIO` reader - Enable Bus Clock"] -pub type GPIO_R = crate::BitReader; +pub type GpioR = crate::BitReader; #[doc = "Field `GPIO` writer - Enable Bus Clock"] -pub type GPIO_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type GpioW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRS` reader - Enable Bus Clock"] -pub type PRS_R = crate::BitReader; +pub type PrsR = crate::BitReader; #[doc = "Field `PRS` writer - Enable Bus Clock"] -pub type PRS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type PrsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BURAM` reader - Enable Bus Clock"] -pub type BURAM_R = crate::BitReader; +pub type BuramR = crate::BitReader; #[doc = "Field `BURAM` writer - Enable Bus Clock"] -pub type BURAM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type BuramW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BURTC` reader - Enable Bus Clock"] -pub type BURTC_R = crate::BitReader; +pub type BurtcR = crate::BitReader; #[doc = "Field `BURTC` writer - Enable Bus Clock"] -pub type BURTC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type BurtcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYSRTC0` reader - Enable Bus Clock"] -pub type SYSRTC0_R = crate::BitReader; +pub type Sysrtc0R = crate::BitReader; #[doc = "Field `SYSRTC0` writer - Enable Bus Clock"] -pub type SYSRTC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type Sysrtc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCDC` reader - Enable Bus Clock"] -pub type DCDC_R = crate::BitReader; +pub type DcdcR = crate::BitReader; #[doc = "Field `DCDC` writer - Enable Bus Clock"] -pub type DCDC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN0_SPEC, bool, O>; +pub type DcdcW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Enable Bus Clock"] #[inline(always)] - pub fn ldma(&self) -> LDMA_R { - LDMA_R::new((self.bits & 1) != 0) + pub fn ldma(&self) -> LdmaR { + LdmaR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Enable Bus Clock"] #[inline(always)] - pub fn ldmaxbar(&self) -> LDMAXBAR_R { - LDMAXBAR_R::new(((self.bits >> 1) & 1) != 0) + pub fn ldmaxbar(&self) -> LdmaxbarR { + LdmaxbarR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - Enable Bus Clock"] #[inline(always)] - pub fn gpcrc(&self) -> GPCRC_R { - GPCRC_R::new(((self.bits >> 3) & 1) != 0) + pub fn gpcrc(&self) -> GpcrcR { + GpcrcR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Enable Bus Clock"] #[inline(always)] - pub fn timer0(&self) -> TIMER0_R { - TIMER0_R::new(((self.bits >> 4) & 1) != 0) + pub fn timer0(&self) -> Timer0R { + Timer0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Enable Bus Clock"] #[inline(always)] - pub fn timer1(&self) -> TIMER1_R { - TIMER1_R::new(((self.bits >> 5) & 1) != 0) + pub fn timer1(&self) -> Timer1R { + Timer1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Enable Bus Clock"] #[inline(always)] - pub fn timer2(&self) -> TIMER2_R { - TIMER2_R::new(((self.bits >> 6) & 1) != 0) + pub fn timer2(&self) -> Timer2R { + Timer2R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Enable Bus Clock"] #[inline(always)] - pub fn timer3(&self) -> TIMER3_R { - TIMER3_R::new(((self.bits >> 7) & 1) != 0) + pub fn timer3(&self) -> Timer3R { + Timer3R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Enable Bus Clock"] #[inline(always)] - pub fn timer4(&self) -> TIMER4_R { - TIMER4_R::new(((self.bits >> 8) & 1) != 0) + pub fn timer4(&self) -> Timer4R { + Timer4R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Enable Bus Clock"] #[inline(always)] - pub fn usart0(&self) -> USART0_R { - USART0_R::new(((self.bits >> 9) & 1) != 0) + pub fn usart0(&self) -> Usart0R { + Usart0R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Enable Bus Clock"] #[inline(always)] - pub fn iadc0(&self) -> IADC0_R { - IADC0_R::new(((self.bits >> 10) & 1) != 0) + pub fn iadc0(&self) -> Iadc0R { + Iadc0R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Enable Bus Clock"] #[inline(always)] - pub fn amuxcp0(&self) -> AMUXCP0_R { - AMUXCP0_R::new(((self.bits >> 11) & 1) != 0) + pub fn amuxcp0(&self) -> Amuxcp0R { + Amuxcp0R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Enable Bus Clock"] #[inline(always)] - pub fn letimer0(&self) -> LETIMER0_R { - LETIMER0_R::new(((self.bits >> 12) & 1) != 0) + pub fn letimer0(&self) -> Letimer0R { + Letimer0R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Enable Bus Clock"] #[inline(always)] - pub fn wdog0(&self) -> WDOG0_R { - WDOG0_R::new(((self.bits >> 13) & 1) != 0) + pub fn wdog0(&self) -> Wdog0R { + Wdog0R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Enable Bus Clock"] #[inline(always)] - pub fn i2c0(&self) -> I2C0_R { - I2C0_R::new(((self.bits >> 14) & 1) != 0) + pub fn i2c0(&self) -> I2c0R { + I2c0R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Enable Bus Clock"] #[inline(always)] - pub fn i2c1(&self) -> I2C1_R { - I2C1_R::new(((self.bits >> 15) & 1) != 0) + pub fn i2c1(&self) -> I2c1R { + I2c1R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Enable Bus Clock"] #[inline(always)] - pub fn syscfg(&self) -> SYSCFG_R { - SYSCFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn syscfg(&self) -> SyscfgR { + SyscfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Enable Bus Clock"] #[inline(always)] - pub fn dpll0(&self) -> DPLL0_R { - DPLL0_R::new(((self.bits >> 17) & 1) != 0) + pub fn dpll0(&self) -> Dpll0R { + Dpll0R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Enable Bus Clock"] #[inline(always)] - pub fn hfrco0(&self) -> HFRCO0_R { - HFRCO0_R::new(((self.bits >> 18) & 1) != 0) + pub fn hfrco0(&self) -> Hfrco0R { + Hfrco0R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Enable Bus Clock"] #[inline(always)] - pub fn hfrcoem23(&self) -> HFRCOEM23_R { - HFRCOEM23_R::new(((self.bits >> 19) & 1) != 0) + pub fn hfrcoem23(&self) -> Hfrcoem23R { + Hfrcoem23R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Enable Bus Clock"] #[inline(always)] - pub fn hfxo0(&self) -> HFXO0_R { - HFXO0_R::new(((self.bits >> 20) & 1) != 0) + pub fn hfxo0(&self) -> Hfxo0R { + Hfxo0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Enable Bus Clock"] #[inline(always)] - pub fn fsrco(&self) -> FSRCO_R { - FSRCO_R::new(((self.bits >> 21) & 1) != 0) + pub fn fsrco(&self) -> FsrcoR { + FsrcoR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Enable Bus Clock"] #[inline(always)] - pub fn lfrco(&self) -> LFRCO_R { - LFRCO_R::new(((self.bits >> 22) & 1) != 0) + pub fn lfrco(&self) -> LfrcoR { + LfrcoR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Enable Bus Clock"] #[inline(always)] - pub fn lfxo(&self) -> LFXO_R { - LFXO_R::new(((self.bits >> 23) & 1) != 0) + pub fn lfxo(&self) -> LfxoR { + LfxoR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - Enable Bus Clock"] #[inline(always)] - pub fn ulfrco(&self) -> ULFRCO_R { - ULFRCO_R::new(((self.bits >> 24) & 1) != 0) + pub fn ulfrco(&self) -> UlfrcoR { + UlfrcoR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Enable Bus Clock"] #[inline(always)] - pub fn lesense(&self) -> LESENSE_R { - LESENSE_R::new(((self.bits >> 25) & 1) != 0) + pub fn lesense(&self) -> LesenseR { + LesenseR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Enable Bus Clock"] #[inline(always)] - pub fn gpio(&self) -> GPIO_R { - GPIO_R::new(((self.bits >> 26) & 1) != 0) + pub fn gpio(&self) -> GpioR { + GpioR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - Enable Bus Clock"] #[inline(always)] - pub fn prs(&self) -> PRS_R { - PRS_R::new(((self.bits >> 27) & 1) != 0) + pub fn prs(&self) -> PrsR { + PrsR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - Enable Bus Clock"] #[inline(always)] - pub fn buram(&self) -> BURAM_R { - BURAM_R::new(((self.bits >> 28) & 1) != 0) + pub fn buram(&self) -> BuramR { + BuramR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Enable Bus Clock"] #[inline(always)] - pub fn burtc(&self) -> BURTC_R { - BURTC_R::new(((self.bits >> 29) & 1) != 0) + pub fn burtc(&self) -> BurtcR { + BurtcR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Enable Bus Clock"] #[inline(always)] - pub fn sysrtc0(&self) -> SYSRTC0_R { - SYSRTC0_R::new(((self.bits >> 30) & 1) != 0) + pub fn sysrtc0(&self) -> Sysrtc0R { + Sysrtc0R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Enable Bus Clock"] #[inline(always)] - pub fn dcdc(&self) -> DCDC_R { - DCDC_R::new(((self.bits >> 31) & 1) != 0) + pub fn dcdc(&self) -> DcdcR { + DcdcR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn ldma(&mut self) -> LDMA_W<0> { - LDMA_W::new(self) + pub fn ldma(&mut self) -> LdmaW { + LdmaW::new(self, 0) } #[doc = "Bit 1 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn ldmaxbar(&mut self) -> LDMAXBAR_W<1> { - LDMAXBAR_W::new(self) + pub fn ldmaxbar(&mut self) -> LdmaxbarW { + LdmaxbarW::new(self, 1) } #[doc = "Bit 3 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn gpcrc(&mut self) -> GPCRC_W<3> { - GPCRC_W::new(self) + pub fn gpcrc(&mut self) -> GpcrcW { + GpcrcW::new(self, 3) } #[doc = "Bit 4 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn timer0(&mut self) -> TIMER0_W<4> { - TIMER0_W::new(self) + pub fn timer0(&mut self) -> Timer0W { + Timer0W::new(self, 4) } #[doc = "Bit 5 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn timer1(&mut self) -> TIMER1_W<5> { - TIMER1_W::new(self) + pub fn timer1(&mut self) -> Timer1W { + Timer1W::new(self, 5) } #[doc = "Bit 6 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn timer2(&mut self) -> TIMER2_W<6> { - TIMER2_W::new(self) + pub fn timer2(&mut self) -> Timer2W { + Timer2W::new(self, 6) } #[doc = "Bit 7 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn timer3(&mut self) -> TIMER3_W<7> { - TIMER3_W::new(self) + pub fn timer3(&mut self) -> Timer3W { + Timer3W::new(self, 7) } #[doc = "Bit 8 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn timer4(&mut self) -> TIMER4_W<8> { - TIMER4_W::new(self) + pub fn timer4(&mut self) -> Timer4W { + Timer4W::new(self, 8) } #[doc = "Bit 9 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn usart0(&mut self) -> USART0_W<9> { - USART0_W::new(self) + pub fn usart0(&mut self) -> Usart0W { + Usart0W::new(self, 9) } #[doc = "Bit 10 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn iadc0(&mut self) -> IADC0_W<10> { - IADC0_W::new(self) + pub fn iadc0(&mut self) -> Iadc0W { + Iadc0W::new(self, 10) } #[doc = "Bit 11 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn amuxcp0(&mut self) -> AMUXCP0_W<11> { - AMUXCP0_W::new(self) + pub fn amuxcp0(&mut self) -> Amuxcp0W { + Amuxcp0W::new(self, 11) } #[doc = "Bit 12 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn letimer0(&mut self) -> LETIMER0_W<12> { - LETIMER0_W::new(self) + pub fn letimer0(&mut self) -> Letimer0W { + Letimer0W::new(self, 12) } #[doc = "Bit 13 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn wdog0(&mut self) -> WDOG0_W<13> { - WDOG0_W::new(self) + pub fn wdog0(&mut self) -> Wdog0W { + Wdog0W::new(self, 13) } #[doc = "Bit 14 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn i2c0(&mut self) -> I2C0_W<14> { - I2C0_W::new(self) + pub fn i2c0(&mut self) -> I2c0W { + I2c0W::new(self, 14) } #[doc = "Bit 15 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn i2c1(&mut self) -> I2C1_W<15> { - I2C1_W::new(self) + pub fn i2c1(&mut self) -> I2c1W { + I2c1W::new(self, 15) } #[doc = "Bit 16 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn syscfg(&mut self) -> SYSCFG_W<16> { - SYSCFG_W::new(self) + pub fn syscfg(&mut self) -> SyscfgW { + SyscfgW::new(self, 16) } #[doc = "Bit 17 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn dpll0(&mut self) -> DPLL0_W<17> { - DPLL0_W::new(self) + pub fn dpll0(&mut self) -> Dpll0W { + Dpll0W::new(self, 17) } #[doc = "Bit 18 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn hfrco0(&mut self) -> HFRCO0_W<18> { - HFRCO0_W::new(self) + pub fn hfrco0(&mut self) -> Hfrco0W { + Hfrco0W::new(self, 18) } #[doc = "Bit 19 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn hfrcoem23(&mut self) -> HFRCOEM23_W<19> { - HFRCOEM23_W::new(self) + pub fn hfrcoem23(&mut self) -> Hfrcoem23W { + Hfrcoem23W::new(self, 19) } #[doc = "Bit 20 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn hfxo0(&mut self) -> HFXO0_W<20> { - HFXO0_W::new(self) + pub fn hfxo0(&mut self) -> Hfxo0W { + Hfxo0W::new(self, 20) } #[doc = "Bit 21 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn fsrco(&mut self) -> FSRCO_W<21> { - FSRCO_W::new(self) + pub fn fsrco(&mut self) -> FsrcoW { + FsrcoW::new(self, 21) } #[doc = "Bit 22 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn lfrco(&mut self) -> LFRCO_W<22> { - LFRCO_W::new(self) + pub fn lfrco(&mut self) -> LfrcoW { + LfrcoW::new(self, 22) } #[doc = "Bit 23 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn lfxo(&mut self) -> LFXO_W<23> { - LFXO_W::new(self) + pub fn lfxo(&mut self) -> LfxoW { + LfxoW::new(self, 23) } #[doc = "Bit 24 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn ulfrco(&mut self) -> ULFRCO_W<24> { - ULFRCO_W::new(self) + pub fn ulfrco(&mut self) -> UlfrcoW { + UlfrcoW::new(self, 24) } #[doc = "Bit 25 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn lesense(&mut self) -> LESENSE_W<25> { - LESENSE_W::new(self) + pub fn lesense(&mut self) -> LesenseW { + LesenseW::new(self, 25) } #[doc = "Bit 26 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn gpio(&mut self) -> GPIO_W<26> { - GPIO_W::new(self) + pub fn gpio(&mut self) -> GpioW { + GpioW::new(self, 26) } #[doc = "Bit 27 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn prs(&mut self) -> PRS_W<27> { - PRS_W::new(self) + pub fn prs(&mut self) -> PrsW { + PrsW::new(self, 27) } #[doc = "Bit 28 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn buram(&mut self) -> BURAM_W<28> { - BURAM_W::new(self) + pub fn buram(&mut self) -> BuramW { + BuramW::new(self, 28) } #[doc = "Bit 29 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn burtc(&mut self) -> BURTC_W<29> { - BURTC_W::new(self) + pub fn burtc(&mut self) -> BurtcW { + BurtcW::new(self, 29) } #[doc = "Bit 30 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn sysrtc0(&mut self) -> SYSRTC0_W<30> { - SYSRTC0_W::new(self) + pub fn sysrtc0(&mut self) -> Sysrtc0W { + Sysrtc0W::new(self, 30) } #[doc = "Bit 31 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn dcdc(&mut self) -> DCDC_W<31> { - DCDC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dcdc(&mut self) -> DcdcW { + DcdcW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clken0](index.html) module"] -pub struct CLKEN0_SPEC; -impl crate::RegisterSpec for CLKEN0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clken0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clken0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Clken0Spec; +impl crate::RegisterSpec for Clken0Spec { type Ux = u32; } -#[doc = "`read()` method returns [clken0::R](R) reader structure"] -impl crate::Readable for CLKEN0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clken0::W](W) writer structure"] -impl crate::Writable for CLKEN0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`clken0::R`](R) reader structure"] +impl crate::Readable for Clken0Spec {} +#[doc = "`write(|w| ..)` method takes [`clken0::W`](W) writer structure"] +impl crate::Writable for Clken0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKEN0 to value 0"] -impl crate::Resettable for CLKEN0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Clken0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/clken1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/clken1.rs index 6976271..a82d3bc 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/clken1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/clken1.rs @@ -1,305 +1,265 @@ #[doc = "Register `CLKEN1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKEN1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `HOSTMAILBOX` reader - Enable Bus Clock"] -pub type HOSTMAILBOX_R = crate::BitReader; +pub type HostmailboxR = crate::BitReader; #[doc = "Field `HOSTMAILBOX` writer - Enable Bus Clock"] -pub type HOSTMAILBOX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type HostmailboxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SEMAILBOXHOST` reader - Enable Bus Clock"] -pub type SEMAILBOXHOST_R = crate::BitReader; +pub type SemailboxhostR = crate::BitReader; #[doc = "Field `SEMAILBOXHOST` writer - Enable Bus Clock"] -pub type SEMAILBOXHOST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type SemailboxhostW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LCD` reader - Enable Bus Clock"] -pub type LCD_R = crate::BitReader; +pub type LcdR = crate::BitReader; #[doc = "Field `LCD` writer - Enable Bus Clock"] -pub type LCD_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type LcdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `KEYSCAN` reader - Enable Bus Clock"] -pub type KEYSCAN_R = crate::BitReader; +pub type KeyscanR = crate::BitReader; #[doc = "Field `KEYSCAN` writer - Enable Bus Clock"] -pub type KEYSCAN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type KeyscanW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SMU` reader - Enable Bus Clock"] -pub type SMU_R = crate::BitReader; +pub type SmuR = crate::BitReader; #[doc = "Field `SMU` writer - Enable Bus Clock"] -pub type SMU_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type SmuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICACHE0` reader - Enable Bus Clock"] -pub type ICACHE0_R = crate::BitReader; +pub type Icache0R = crate::BitReader; #[doc = "Field `ICACHE0` writer - Enable Bus Clock"] -pub type ICACHE0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type Icache0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MSC` reader - Enable Bus Clock"] -pub type MSC_R = crate::BitReader; +pub type MscR = crate::BitReader; #[doc = "Field `MSC` writer - Enable Bus Clock"] -pub type MSC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type MscW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WDOG1` reader - Enable Bus Clock"] -pub type WDOG1_R = crate::BitReader; +pub type Wdog1R = crate::BitReader; #[doc = "Field `WDOG1` writer - Enable Bus Clock"] -pub type WDOG1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type Wdog1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMP0` reader - Enable Bus Clock"] -pub type ACMP0_R = crate::BitReader; +pub type Acmp0R = crate::BitReader; #[doc = "Field `ACMP0` writer - Enable Bus Clock"] -pub type ACMP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type Acmp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMP1` reader - Enable Bus Clock"] -pub type ACMP1_R = crate::BitReader; +pub type Acmp1R = crate::BitReader; #[doc = "Field `ACMP1` writer - Enable Bus Clock"] -pub type ACMP1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type Acmp1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VDAC0` reader - Enable Bus Clock"] -pub type VDAC0_R = crate::BitReader; +pub type Vdac0R = crate::BitReader; #[doc = "Field `VDAC0` writer - Enable Bus Clock"] -pub type VDAC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type Vdac0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PCNT0` reader - Enable Bus Clock"] -pub type PCNT0_R = crate::BitReader; +pub type Pcnt0R = crate::BitReader; #[doc = "Field `PCNT0` writer - Enable Bus Clock"] -pub type PCNT0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type Pcnt0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EUSART0` reader - Enable Bus Clock"] -pub type EUSART0_R = crate::BitReader; +pub type Eusart0R = crate::BitReader; #[doc = "Field `EUSART0` writer - Enable Bus Clock"] -pub type EUSART0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type Eusart0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EUSART1` reader - Enable Bus Clock"] -pub type EUSART1_R = crate::BitReader; +pub type Eusart1R = crate::BitReader; #[doc = "Field `EUSART1` writer - Enable Bus Clock"] -pub type EUSART1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type Eusart1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EUSART2` reader - Enable Bus Clock"] -pub type EUSART2_R = crate::BitReader; +pub type Eusart2R = crate::BitReader; #[doc = "Field `EUSART2` writer - Enable Bus Clock"] -pub type EUSART2_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type Eusart2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMEM` reader - Enable Bus Clock"] -pub type DMEM_R = crate::BitReader; +pub type DmemR = crate::BitReader; #[doc = "Field `DMEM` writer - Enable Bus Clock"] -pub type DMEM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKEN1_SPEC, bool, O>; +pub type DmemW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 8 - Enable Bus Clock"] #[inline(always)] - pub fn hostmailbox(&self) -> HOSTMAILBOX_R { - HOSTMAILBOX_R::new(((self.bits >> 8) & 1) != 0) + pub fn hostmailbox(&self) -> HostmailboxR { + HostmailboxR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 10 - Enable Bus Clock"] #[inline(always)] - pub fn semailboxhost(&self) -> SEMAILBOXHOST_R { - SEMAILBOXHOST_R::new(((self.bits >> 10) & 1) != 0) + pub fn semailboxhost(&self) -> SemailboxhostR { + SemailboxhostR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 12 - Enable Bus Clock"] #[inline(always)] - pub fn lcd(&self) -> LCD_R { - LCD_R::new(((self.bits >> 12) & 1) != 0) + pub fn lcd(&self) -> LcdR { + LcdR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Enable Bus Clock"] #[inline(always)] - pub fn keyscan(&self) -> KEYSCAN_R { - KEYSCAN_R::new(((self.bits >> 13) & 1) != 0) + pub fn keyscan(&self) -> KeyscanR { + KeyscanR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Enable Bus Clock"] #[inline(always)] - pub fn smu(&self) -> SMU_R { - SMU_R::new(((self.bits >> 14) & 1) != 0) + pub fn smu(&self) -> SmuR { + SmuR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Enable Bus Clock"] #[inline(always)] - pub fn icache0(&self) -> ICACHE0_R { - ICACHE0_R::new(((self.bits >> 15) & 1) != 0) + pub fn icache0(&self) -> Icache0R { + Icache0R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Enable Bus Clock"] #[inline(always)] - pub fn msc(&self) -> MSC_R { - MSC_R::new(((self.bits >> 16) & 1) != 0) + pub fn msc(&self) -> MscR { + MscR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Enable Bus Clock"] #[inline(always)] - pub fn wdog1(&self) -> WDOG1_R { - WDOG1_R::new(((self.bits >> 17) & 1) != 0) + pub fn wdog1(&self) -> Wdog1R { + Wdog1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Enable Bus Clock"] #[inline(always)] - pub fn acmp0(&self) -> ACMP0_R { - ACMP0_R::new(((self.bits >> 18) & 1) != 0) + pub fn acmp0(&self) -> Acmp0R { + Acmp0R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Enable Bus Clock"] #[inline(always)] - pub fn acmp1(&self) -> ACMP1_R { - ACMP1_R::new(((self.bits >> 19) & 1) != 0) + pub fn acmp1(&self) -> Acmp1R { + Acmp1R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Enable Bus Clock"] #[inline(always)] - pub fn vdac0(&self) -> VDAC0_R { - VDAC0_R::new(((self.bits >> 20) & 1) != 0) + pub fn vdac0(&self) -> Vdac0R { + Vdac0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Enable Bus Clock"] #[inline(always)] - pub fn pcnt0(&self) -> PCNT0_R { - PCNT0_R::new(((self.bits >> 21) & 1) != 0) + pub fn pcnt0(&self) -> Pcnt0R { + Pcnt0R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Enable Bus Clock"] #[inline(always)] - pub fn eusart0(&self) -> EUSART0_R { - EUSART0_R::new(((self.bits >> 22) & 1) != 0) + pub fn eusart0(&self) -> Eusart0R { + Eusart0R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Enable Bus Clock"] #[inline(always)] - pub fn eusart1(&self) -> EUSART1_R { - EUSART1_R::new(((self.bits >> 23) & 1) != 0) + pub fn eusart1(&self) -> Eusart1R { + Eusart1R::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - Enable Bus Clock"] #[inline(always)] - pub fn eusart2(&self) -> EUSART2_R { - EUSART2_R::new(((self.bits >> 24) & 1) != 0) + pub fn eusart2(&self) -> Eusart2R { + Eusart2R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 27 - Enable Bus Clock"] #[inline(always)] - pub fn dmem(&self) -> DMEM_R { - DMEM_R::new(((self.bits >> 27) & 1) != 0) + pub fn dmem(&self) -> DmemR { + DmemR::new(((self.bits >> 27) & 1) != 0) } } impl W { #[doc = "Bit 8 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn hostmailbox(&mut self) -> HOSTMAILBOX_W<8> { - HOSTMAILBOX_W::new(self) + pub fn hostmailbox(&mut self) -> HostmailboxW { + HostmailboxW::new(self, 8) } #[doc = "Bit 10 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn semailboxhost(&mut self) -> SEMAILBOXHOST_W<10> { - SEMAILBOXHOST_W::new(self) + pub fn semailboxhost(&mut self) -> SemailboxhostW { + SemailboxhostW::new(self, 10) } #[doc = "Bit 12 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn lcd(&mut self) -> LCD_W<12> { - LCD_W::new(self) + pub fn lcd(&mut self) -> LcdW { + LcdW::new(self, 12) } #[doc = "Bit 13 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn keyscan(&mut self) -> KEYSCAN_W<13> { - KEYSCAN_W::new(self) + pub fn keyscan(&mut self) -> KeyscanW { + KeyscanW::new(self, 13) } #[doc = "Bit 14 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn smu(&mut self) -> SMU_W<14> { - SMU_W::new(self) + pub fn smu(&mut self) -> SmuW { + SmuW::new(self, 14) } #[doc = "Bit 15 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn icache0(&mut self) -> ICACHE0_W<15> { - ICACHE0_W::new(self) + pub fn icache0(&mut self) -> Icache0W { + Icache0W::new(self, 15) } #[doc = "Bit 16 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn msc(&mut self) -> MSC_W<16> { - MSC_W::new(self) + pub fn msc(&mut self) -> MscW { + MscW::new(self, 16) } #[doc = "Bit 17 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn wdog1(&mut self) -> WDOG1_W<17> { - WDOG1_W::new(self) + pub fn wdog1(&mut self) -> Wdog1W { + Wdog1W::new(self, 17) } #[doc = "Bit 18 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn acmp0(&mut self) -> ACMP0_W<18> { - ACMP0_W::new(self) + pub fn acmp0(&mut self) -> Acmp0W { + Acmp0W::new(self, 18) } #[doc = "Bit 19 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn acmp1(&mut self) -> ACMP1_W<19> { - ACMP1_W::new(self) + pub fn acmp1(&mut self) -> Acmp1W { + Acmp1W::new(self, 19) } #[doc = "Bit 20 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn vdac0(&mut self) -> VDAC0_W<20> { - VDAC0_W::new(self) + pub fn vdac0(&mut self) -> Vdac0W { + Vdac0W::new(self, 20) } #[doc = "Bit 21 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn pcnt0(&mut self) -> PCNT0_W<21> { - PCNT0_W::new(self) + pub fn pcnt0(&mut self) -> Pcnt0W { + Pcnt0W::new(self, 21) } #[doc = "Bit 22 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn eusart0(&mut self) -> EUSART0_W<22> { - EUSART0_W::new(self) + pub fn eusart0(&mut self) -> Eusart0W { + Eusart0W::new(self, 22) } #[doc = "Bit 23 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn eusart1(&mut self) -> EUSART1_W<23> { - EUSART1_W::new(self) + pub fn eusart1(&mut self) -> Eusart1W { + Eusart1W::new(self, 23) } #[doc = "Bit 24 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn eusart2(&mut self) -> EUSART2_W<24> { - EUSART2_W::new(self) + pub fn eusart2(&mut self) -> Eusart2W { + Eusart2W::new(self, 24) } #[doc = "Bit 27 - Enable Bus Clock"] #[inline(always)] #[must_use] - pub fn dmem(&mut self) -> DMEM_W<27> { - DMEM_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dmem(&mut self) -> DmemW { + DmemW::new(self, 27) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clken1](index.html) module"] -pub struct CLKEN1_SPEC; -impl crate::RegisterSpec for CLKEN1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clken1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clken1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Clken1Spec; +impl crate::RegisterSpec for Clken1Spec { type Ux = u32; } -#[doc = "`read()` method returns [clken1::R](R) reader structure"] -impl crate::Readable for CLKEN1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clken1::W](W) writer structure"] -impl crate::Writable for CLKEN1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`clken1::R`](R) reader structure"] +impl crate::Readable for Clken1Spec {} +#[doc = "`write(|w| ..)` method takes [`clken1::W`](W) writer structure"] +impl crate::Writable for Clken1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKEN1 to value 0"] -impl crate::Resettable for CLKEN1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Clken1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/dpllrefclkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/dpllrefclkctrl.rs index ff43384..253a6a5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/dpllrefclkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/dpllrefclkctrl.rs @@ -1,155 +1,122 @@ #[doc = "Register `DPLLREFCLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DPLLREFCLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "0: DPLLREFCLK is not clocked"] - DISABLED = 0, + Disabled = 0, #[doc = "1: HFXO is clocking DPLLREFCLK"] - HFXO = 1, + Hfxo = 1, #[doc = "2: LFXO is clocking DPLLREFCLK"] - LFXO = 2, + Lfxo = 2, #[doc = "3: CLKIN0 is clocking DPLLREFCLK"] - CLKIN0 = 3, + Clkin0 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CLKSEL_A { + pub const fn variant(&self) -> Clksel { match self.bits { - 0 => CLKSEL_A::DISABLED, - 1 => CLKSEL_A::HFXO, - 2 => CLKSEL_A::LFXO, - 3 => CLKSEL_A::CLKIN0, + 0 => Clksel::Disabled, + 1 => Clksel::Hfxo, + 2 => Clksel::Lfxo, + 3 => Clksel::Clkin0, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "DPLLREFCLK is not clocked"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == CLKSEL_A::DISABLED + *self == Clksel::Disabled } - #[doc = "Checks if the value of the field is `HFXO`"] + #[doc = "HFXO is clocking DPLLREFCLK"] #[inline(always)] pub fn is_hfxo(&self) -> bool { - *self == CLKSEL_A::HFXO + *self == Clksel::Hfxo } - #[doc = "Checks if the value of the field is `LFXO`"] + #[doc = "LFXO is clocking DPLLREFCLK"] #[inline(always)] pub fn is_lfxo(&self) -> bool { - *self == CLKSEL_A::LFXO + *self == Clksel::Lfxo } - #[doc = "Checks if the value of the field is `CLKIN0`"] + #[doc = "CLKIN0 is clocking DPLLREFCLK"] #[inline(always)] pub fn is_clkin0(&self) -> bool { - *self == CLKSEL_A::CLKIN0 + *self == Clksel::Clkin0 } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, DPLLREFCLKCTRL_SPEC, u8, CLKSEL_A, 2, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel, crate::Safe>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "DPLLREFCLK is not clocked"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(CLKSEL_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Clksel::Disabled) } #[doc = "HFXO is clocking DPLLREFCLK"] #[inline(always)] - pub fn hfxo(self) -> &'a mut W { - self.variant(CLKSEL_A::HFXO) + pub fn hfxo(self) -> &'a mut crate::W { + self.variant(Clksel::Hfxo) } #[doc = "LFXO is clocking DPLLREFCLK"] #[inline(always)] - pub fn lfxo(self) -> &'a mut W { - self.variant(CLKSEL_A::LFXO) + pub fn lfxo(self) -> &'a mut crate::W { + self.variant(Clksel::Lfxo) } #[doc = "CLKIN0 is clocking DPLLREFCLK"] #[inline(always)] - pub fn clkin0(self) -> &'a mut W { - self.variant(CLKSEL_A::CLKIN0) + pub fn clkin0(self) -> &'a mut crate::W { + self.variant(Clksel::Clkin0) } } impl R { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 3) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dpllrefclkctrl](index.html) module"] -pub struct DPLLREFCLKCTRL_SPEC; -impl crate::RegisterSpec for DPLLREFCLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dpllrefclkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dpllrefclkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DpllrefclkctrlSpec; +impl crate::RegisterSpec for DpllrefclkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [dpllrefclkctrl::R](R) reader structure"] -impl crate::Readable for DPLLREFCLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dpllrefclkctrl::W](W) writer structure"] -impl crate::Writable for DPLLREFCLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dpllrefclkctrl::R`](R) reader structure"] +impl crate::Readable for DpllrefclkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`dpllrefclkctrl::W`](W) writer structure"] +impl crate::Writable for DpllrefclkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DPLLREFCLKCTRL to value 0"] -impl crate::Resettable for DPLLREFCLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DpllrefclkctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/em01grpaclkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/em01grpaclkctrl.rs index 88d5ec5..d8c98f0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/em01grpaclkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/em01grpaclkctrl.rs @@ -1,181 +1,148 @@ #[doc = "Register `EM01GRPACLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EM01GRPACLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "1: HFRCODPLL is clocking EM01GRPACLK"] - HFRCODPLL = 1, + Hfrcodpll = 1, #[doc = "2: HFXO is clocking EM01GRPACLK"] - HFXO = 2, + Hfxo = 2, #[doc = "3: FSRCO is clocking EM01GRPACLK"] - FSRCO = 3, + Fsrco = 3, #[doc = "4: HFRCOEM23 is clocking EM01GRPACLK"] - HFRCOEM23 = 4, + Hfrcoem23 = 4, #[doc = "5: HFRCODPLL (retimed) is clocking EM01GRPACLK. Check with datasheet for frequency limitation when using retiming with voltage scaling."] - HFRCODPLLRT = 5, + Hfrcodpllrt = 5, #[doc = "6: HFXO (retimed) is clocking EM01GRPACLK. Check with datasheet for frequency limitation when using retiming with voltage scaling."] - HFXORT = 6, + Hfxort = 6, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(CLKSEL_A::HFRCODPLL), - 2 => Some(CLKSEL_A::HFXO), - 3 => Some(CLKSEL_A::FSRCO), - 4 => Some(CLKSEL_A::HFRCOEM23), - 5 => Some(CLKSEL_A::HFRCODPLLRT), - 6 => Some(CLKSEL_A::HFXORT), + 1 => Some(Clksel::Hfrcodpll), + 2 => Some(Clksel::Hfxo), + 3 => Some(Clksel::Fsrco), + 4 => Some(Clksel::Hfrcoem23), + 5 => Some(Clksel::Hfrcodpllrt), + 6 => Some(Clksel::Hfxort), _ => None, } } - #[doc = "Checks if the value of the field is `HFRCODPLL`"] + #[doc = "HFRCODPLL is clocking EM01GRPACLK"] #[inline(always)] pub fn is_hfrcodpll(&self) -> bool { - *self == CLKSEL_A::HFRCODPLL + *self == Clksel::Hfrcodpll } - #[doc = "Checks if the value of the field is `HFXO`"] + #[doc = "HFXO is clocking EM01GRPACLK"] #[inline(always)] pub fn is_hfxo(&self) -> bool { - *self == CLKSEL_A::HFXO + *self == Clksel::Hfxo } - #[doc = "Checks if the value of the field is `FSRCO`"] + #[doc = "FSRCO is clocking EM01GRPACLK"] #[inline(always)] pub fn is_fsrco(&self) -> bool { - *self == CLKSEL_A::FSRCO + *self == Clksel::Fsrco } - #[doc = "Checks if the value of the field is `HFRCOEM23`"] + #[doc = "HFRCOEM23 is clocking EM01GRPACLK"] #[inline(always)] pub fn is_hfrcoem23(&self) -> bool { - *self == CLKSEL_A::HFRCOEM23 + *self == Clksel::Hfrcoem23 } - #[doc = "Checks if the value of the field is `HFRCODPLLRT`"] + #[doc = "HFRCODPLL (retimed) is clocking EM01GRPACLK. Check with datasheet for frequency limitation when using retiming with voltage scaling."] #[inline(always)] pub fn is_hfrcodpllrt(&self) -> bool { - *self == CLKSEL_A::HFRCODPLLRT + *self == Clksel::Hfrcodpllrt } - #[doc = "Checks if the value of the field is `HFXORT`"] + #[doc = "HFXO (retimed) is clocking EM01GRPACLK. Check with datasheet for frequency limitation when using retiming with voltage scaling."] #[inline(always)] pub fn is_hfxort(&self) -> bool { - *self == CLKSEL_A::HFXORT + *self == Clksel::Hfxort } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EM01GRPACLKCTRL_SPEC, u8, CLKSEL_A, 3, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "HFRCODPLL is clocking EM01GRPACLK"] #[inline(always)] - pub fn hfrcodpll(self) -> &'a mut W { - self.variant(CLKSEL_A::HFRCODPLL) + pub fn hfrcodpll(self) -> &'a mut crate::W { + self.variant(Clksel::Hfrcodpll) } #[doc = "HFXO is clocking EM01GRPACLK"] #[inline(always)] - pub fn hfxo(self) -> &'a mut W { - self.variant(CLKSEL_A::HFXO) + pub fn hfxo(self) -> &'a mut crate::W { + self.variant(Clksel::Hfxo) } #[doc = "FSRCO is clocking EM01GRPACLK"] #[inline(always)] - pub fn fsrco(self) -> &'a mut W { - self.variant(CLKSEL_A::FSRCO) + pub fn fsrco(self) -> &'a mut crate::W { + self.variant(Clksel::Fsrco) } #[doc = "HFRCOEM23 is clocking EM01GRPACLK"] #[inline(always)] - pub fn hfrcoem23(self) -> &'a mut W { - self.variant(CLKSEL_A::HFRCOEM23) + pub fn hfrcoem23(self) -> &'a mut crate::W { + self.variant(Clksel::Hfrcoem23) } #[doc = "HFRCODPLL (retimed) is clocking EM01GRPACLK. Check with datasheet for frequency limitation when using retiming with voltage scaling."] #[inline(always)] - pub fn hfrcodpllrt(self) -> &'a mut W { - self.variant(CLKSEL_A::HFRCODPLLRT) + pub fn hfrcodpllrt(self) -> &'a mut crate::W { + self.variant(Clksel::Hfrcodpllrt) } #[doc = "HFXO (retimed) is clocking EM01GRPACLK. Check with datasheet for frequency limitation when using retiming with voltage scaling."] #[inline(always)] - pub fn hfxort(self) -> &'a mut W { - self.variant(CLKSEL_A::HFXORT) + pub fn hfxort(self) -> &'a mut crate::W { + self.variant(Clksel::Hfxort) } } impl R { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 7) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [em01grpaclkctrl](index.html) module"] -pub struct EM01GRPACLKCTRL_SPEC; -impl crate::RegisterSpec for EM01GRPACLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em01grpaclkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em01grpaclkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Em01grpaclkctrlSpec; +impl crate::RegisterSpec for Em01grpaclkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [em01grpaclkctrl::R](R) reader structure"] -impl crate::Readable for EM01GRPACLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [em01grpaclkctrl::W](W) writer structure"] -impl crate::Writable for EM01GRPACLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`em01grpaclkctrl::R`](R) reader structure"] +impl crate::Readable for Em01grpaclkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`em01grpaclkctrl::W`](W) writer structure"] +impl crate::Writable for Em01grpaclkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EM01GRPACLKCTRL to value 0x01"] -impl crate::Resettable for EM01GRPACLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for Em01grpaclkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/em01grpcclkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/em01grpcclkctrl.rs index dd9019e..50f556d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/em01grpcclkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/em01grpcclkctrl.rs @@ -1,181 +1,148 @@ #[doc = "Register `EM01GRPCCLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EM01GRPCCLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "1: HFRCODPLL is clocking EM01GRPCCLK"] - HFRCODPLL = 1, + Hfrcodpll = 1, #[doc = "2: HFXO is clocking EM01GRPCCLK"] - HFXO = 2, + Hfxo = 2, #[doc = "3: FSRCO is clocking EM01GRPCCLK"] - FSRCO = 3, + Fsrco = 3, #[doc = "4: HFRCOEM23 is clocking EM01GRPCCLK"] - HFRCOEM23 = 4, + Hfrcoem23 = 4, #[doc = "5: HFRCODPLL (retimed) is clocking EM01GRPCCLK. Check with datasheet for frequency limitation when using retiming with voltage scaling."] - HFRCODPLLRT = 5, + Hfrcodpllrt = 5, #[doc = "6: HFXO (retimed) is clocking EM01GRPCCLK. Check with datasheet for frequency limitation when using retiming with voltage scaling."] - HFXORT = 6, + Hfxort = 6, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(CLKSEL_A::HFRCODPLL), - 2 => Some(CLKSEL_A::HFXO), - 3 => Some(CLKSEL_A::FSRCO), - 4 => Some(CLKSEL_A::HFRCOEM23), - 5 => Some(CLKSEL_A::HFRCODPLLRT), - 6 => Some(CLKSEL_A::HFXORT), + 1 => Some(Clksel::Hfrcodpll), + 2 => Some(Clksel::Hfxo), + 3 => Some(Clksel::Fsrco), + 4 => Some(Clksel::Hfrcoem23), + 5 => Some(Clksel::Hfrcodpllrt), + 6 => Some(Clksel::Hfxort), _ => None, } } - #[doc = "Checks if the value of the field is `HFRCODPLL`"] + #[doc = "HFRCODPLL is clocking EM01GRPCCLK"] #[inline(always)] pub fn is_hfrcodpll(&self) -> bool { - *self == CLKSEL_A::HFRCODPLL + *self == Clksel::Hfrcodpll } - #[doc = "Checks if the value of the field is `HFXO`"] + #[doc = "HFXO is clocking EM01GRPCCLK"] #[inline(always)] pub fn is_hfxo(&self) -> bool { - *self == CLKSEL_A::HFXO + *self == Clksel::Hfxo } - #[doc = "Checks if the value of the field is `FSRCO`"] + #[doc = "FSRCO is clocking EM01GRPCCLK"] #[inline(always)] pub fn is_fsrco(&self) -> bool { - *self == CLKSEL_A::FSRCO + *self == Clksel::Fsrco } - #[doc = "Checks if the value of the field is `HFRCOEM23`"] + #[doc = "HFRCOEM23 is clocking EM01GRPCCLK"] #[inline(always)] pub fn is_hfrcoem23(&self) -> bool { - *self == CLKSEL_A::HFRCOEM23 + *self == Clksel::Hfrcoem23 } - #[doc = "Checks if the value of the field is `HFRCODPLLRT`"] + #[doc = "HFRCODPLL (retimed) is clocking EM01GRPCCLK. Check with datasheet for frequency limitation when using retiming with voltage scaling."] #[inline(always)] pub fn is_hfrcodpllrt(&self) -> bool { - *self == CLKSEL_A::HFRCODPLLRT + *self == Clksel::Hfrcodpllrt } - #[doc = "Checks if the value of the field is `HFXORT`"] + #[doc = "HFXO (retimed) is clocking EM01GRPCCLK. Check with datasheet for frequency limitation when using retiming with voltage scaling."] #[inline(always)] pub fn is_hfxort(&self) -> bool { - *self == CLKSEL_A::HFXORT + *self == Clksel::Hfxort } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EM01GRPCCLKCTRL_SPEC, u8, CLKSEL_A, 3, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "HFRCODPLL is clocking EM01GRPCCLK"] #[inline(always)] - pub fn hfrcodpll(self) -> &'a mut W { - self.variant(CLKSEL_A::HFRCODPLL) + pub fn hfrcodpll(self) -> &'a mut crate::W { + self.variant(Clksel::Hfrcodpll) } #[doc = "HFXO is clocking EM01GRPCCLK"] #[inline(always)] - pub fn hfxo(self) -> &'a mut W { - self.variant(CLKSEL_A::HFXO) + pub fn hfxo(self) -> &'a mut crate::W { + self.variant(Clksel::Hfxo) } #[doc = "FSRCO is clocking EM01GRPCCLK"] #[inline(always)] - pub fn fsrco(self) -> &'a mut W { - self.variant(CLKSEL_A::FSRCO) + pub fn fsrco(self) -> &'a mut crate::W { + self.variant(Clksel::Fsrco) } #[doc = "HFRCOEM23 is clocking EM01GRPCCLK"] #[inline(always)] - pub fn hfrcoem23(self) -> &'a mut W { - self.variant(CLKSEL_A::HFRCOEM23) + pub fn hfrcoem23(self) -> &'a mut crate::W { + self.variant(Clksel::Hfrcoem23) } #[doc = "HFRCODPLL (retimed) is clocking EM01GRPCCLK. Check with datasheet for frequency limitation when using retiming with voltage scaling."] #[inline(always)] - pub fn hfrcodpllrt(self) -> &'a mut W { - self.variant(CLKSEL_A::HFRCODPLLRT) + pub fn hfrcodpllrt(self) -> &'a mut crate::W { + self.variant(Clksel::Hfrcodpllrt) } #[doc = "HFXO (retimed) is clocking EM01GRPCCLK. Check with datasheet for frequency limitation when using retiming with voltage scaling."] #[inline(always)] - pub fn hfxort(self) -> &'a mut W { - self.variant(CLKSEL_A::HFXORT) + pub fn hfxort(self) -> &'a mut crate::W { + self.variant(Clksel::Hfxort) } } impl R { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 7) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [em01grpcclkctrl](index.html) module"] -pub struct EM01GRPCCLKCTRL_SPEC; -impl crate::RegisterSpec for EM01GRPCCLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em01grpcclkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em01grpcclkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Em01grpcclkctrlSpec; +impl crate::RegisterSpec for Em01grpcclkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [em01grpcclkctrl::R](R) reader structure"] -impl crate::Readable for EM01GRPCCLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [em01grpcclkctrl::W](W) writer structure"] -impl crate::Writable for EM01GRPCCLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`em01grpcclkctrl::R`](R) reader structure"] +impl crate::Readable for Em01grpcclkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`em01grpcclkctrl::W`](W) writer structure"] +impl crate::Writable for Em01grpcclkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EM01GRPCCLKCTRL to value 0x01"] -impl crate::Resettable for EM01GRPCCLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for Em01grpcclkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/em23grpaclkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/em23grpaclkctrl.rs index a5b3a78..8cc818b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/em23grpaclkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/em23grpaclkctrl.rs @@ -1,142 +1,109 @@ #[doc = "Register `EM23GRPACLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EM23GRPACLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "1: LFRCO is clocking EM23GRPACLK"] - LFRCO = 1, + Lfrco = 1, #[doc = "2: LFXO is clocking EM23GRPACLK"] - LFXO = 2, + Lfxo = 2, #[doc = "3: ULFRCO is clocking EM23GRPACLK"] - ULFRCO = 3, + Ulfrco = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(CLKSEL_A::LFRCO), - 2 => Some(CLKSEL_A::LFXO), - 3 => Some(CLKSEL_A::ULFRCO), + 1 => Some(Clksel::Lfrco), + 2 => Some(Clksel::Lfxo), + 3 => Some(Clksel::Ulfrco), _ => None, } } - #[doc = "Checks if the value of the field is `LFRCO`"] + #[doc = "LFRCO is clocking EM23GRPACLK"] #[inline(always)] pub fn is_lfrco(&self) -> bool { - *self == CLKSEL_A::LFRCO + *self == Clksel::Lfrco } - #[doc = "Checks if the value of the field is `LFXO`"] + #[doc = "LFXO is clocking EM23GRPACLK"] #[inline(always)] pub fn is_lfxo(&self) -> bool { - *self == CLKSEL_A::LFXO + *self == Clksel::Lfxo } - #[doc = "Checks if the value of the field is `ULFRCO`"] + #[doc = "ULFRCO is clocking EM23GRPACLK"] #[inline(always)] pub fn is_ulfrco(&self) -> bool { - *self == CLKSEL_A::ULFRCO + *self == Clksel::Ulfrco } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EM23GRPACLKCTRL_SPEC, u8, CLKSEL_A, 2, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "LFRCO is clocking EM23GRPACLK"] #[inline(always)] - pub fn lfrco(self) -> &'a mut W { - self.variant(CLKSEL_A::LFRCO) + pub fn lfrco(self) -> &'a mut crate::W { + self.variant(Clksel::Lfrco) } #[doc = "LFXO is clocking EM23GRPACLK"] #[inline(always)] - pub fn lfxo(self) -> &'a mut W { - self.variant(CLKSEL_A::LFXO) + pub fn lfxo(self) -> &'a mut crate::W { + self.variant(Clksel::Lfxo) } #[doc = "ULFRCO is clocking EM23GRPACLK"] #[inline(always)] - pub fn ulfrco(self) -> &'a mut W { - self.variant(CLKSEL_A::ULFRCO) + pub fn ulfrco(self) -> &'a mut crate::W { + self.variant(Clksel::Ulfrco) } } impl R { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 3) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [em23grpaclkctrl](index.html) module"] -pub struct EM23GRPACLKCTRL_SPEC; -impl crate::RegisterSpec for EM23GRPACLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em23grpaclkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em23grpaclkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Em23grpaclkctrlSpec; +impl crate::RegisterSpec for Em23grpaclkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [em23grpaclkctrl::R](R) reader structure"] -impl crate::Readable for EM23GRPACLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [em23grpaclkctrl::W](W) writer structure"] -impl crate::Writable for EM23GRPACLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`em23grpaclkctrl::R`](R) reader structure"] +impl crate::Readable for Em23grpaclkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`em23grpaclkctrl::W`](W) writer structure"] +impl crate::Writable for Em23grpaclkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EM23GRPACLKCTRL to value 0x01"] -impl crate::Resettable for EM23GRPACLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for Em23grpaclkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/em4grpaclkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/em4grpaclkctrl.rs index 5993f70..7c56ae2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/em4grpaclkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/em4grpaclkctrl.rs @@ -1,142 +1,109 @@ #[doc = "Register `EM4GRPACLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EM4GRPACLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "1: LFRCO is clocking EM4GRPACLK"] - LFRCO = 1, + Lfrco = 1, #[doc = "2: LFXO is clocking EM4GRPACLK"] - LFXO = 2, + Lfxo = 2, #[doc = "3: ULFRCO is clocking EM4GRPACLK"] - ULFRCO = 3, + Ulfrco = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(CLKSEL_A::LFRCO), - 2 => Some(CLKSEL_A::LFXO), - 3 => Some(CLKSEL_A::ULFRCO), + 1 => Some(Clksel::Lfrco), + 2 => Some(Clksel::Lfxo), + 3 => Some(Clksel::Ulfrco), _ => None, } } - #[doc = "Checks if the value of the field is `LFRCO`"] + #[doc = "LFRCO is clocking EM4GRPACLK"] #[inline(always)] pub fn is_lfrco(&self) -> bool { - *self == CLKSEL_A::LFRCO + *self == Clksel::Lfrco } - #[doc = "Checks if the value of the field is `LFXO`"] + #[doc = "LFXO is clocking EM4GRPACLK"] #[inline(always)] pub fn is_lfxo(&self) -> bool { - *self == CLKSEL_A::LFXO + *self == Clksel::Lfxo } - #[doc = "Checks if the value of the field is `ULFRCO`"] + #[doc = "ULFRCO is clocking EM4GRPACLK"] #[inline(always)] pub fn is_ulfrco(&self) -> bool { - *self == CLKSEL_A::ULFRCO + *self == Clksel::Ulfrco } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EM4GRPACLKCTRL_SPEC, u8, CLKSEL_A, 2, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "LFRCO is clocking EM4GRPACLK"] #[inline(always)] - pub fn lfrco(self) -> &'a mut W { - self.variant(CLKSEL_A::LFRCO) + pub fn lfrco(self) -> &'a mut crate::W { + self.variant(Clksel::Lfrco) } #[doc = "LFXO is clocking EM4GRPACLK"] #[inline(always)] - pub fn lfxo(self) -> &'a mut W { - self.variant(CLKSEL_A::LFXO) + pub fn lfxo(self) -> &'a mut crate::W { + self.variant(Clksel::Lfxo) } #[doc = "ULFRCO is clocking EM4GRPACLK"] #[inline(always)] - pub fn ulfrco(self) -> &'a mut W { - self.variant(CLKSEL_A::ULFRCO) + pub fn ulfrco(self) -> &'a mut crate::W { + self.variant(Clksel::Ulfrco) } } impl R { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 3) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [em4grpaclkctrl](index.html) module"] -pub struct EM4GRPACLKCTRL_SPEC; -impl crate::RegisterSpec for EM4GRPACLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em4grpaclkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em4grpaclkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Em4grpaclkctrlSpec; +impl crate::RegisterSpec for Em4grpaclkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [em4grpaclkctrl::R](R) reader structure"] -impl crate::Readable for EM4GRPACLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [em4grpaclkctrl::W](W) writer structure"] -impl crate::Writable for EM4GRPACLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`em4grpaclkctrl::R`](R) reader structure"] +impl crate::Readable for Em4grpaclkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`em4grpaclkctrl::W`](W) writer structure"] +impl crate::Writable for Em4grpaclkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EM4GRPACLKCTRL to value 0x01"] -impl crate::Resettable for EM4GRPACLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for Em4grpaclkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/eusart0clkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/eusart0clkctrl.rs index f4b2edb..372f023 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/eusart0clkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/eusart0clkctrl.rs @@ -1,168 +1,135 @@ #[doc = "Register `EUSART0CLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART0CLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "0: EUSART0 is not clocked"] - DISABLED = 0, + Disabled = 0, #[doc = "1: EM01GRPCCLK is clocking EUSART0"] - EM01GRPCCLK = 1, + Em01grpcclk = 1, #[doc = "2: HFRCOEM23 is clocking EUSART0"] - HFRCOEM23 = 2, + Hfrcoem23 = 2, #[doc = "3: LFRCO is clocking EUSART0"] - LFRCO = 3, + Lfrco = 3, #[doc = "4: LFXO is clocking EUSART0"] - LFXO = 4, + Lfxo = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKSEL_A::DISABLED), - 1 => Some(CLKSEL_A::EM01GRPCCLK), - 2 => Some(CLKSEL_A::HFRCOEM23), - 3 => Some(CLKSEL_A::LFRCO), - 4 => Some(CLKSEL_A::LFXO), + 0 => Some(Clksel::Disabled), + 1 => Some(Clksel::Em01grpcclk), + 2 => Some(Clksel::Hfrcoem23), + 3 => Some(Clksel::Lfrco), + 4 => Some(Clksel::Lfxo), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "EUSART0 is not clocked"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == CLKSEL_A::DISABLED + *self == Clksel::Disabled } - #[doc = "Checks if the value of the field is `EM01GRPCCLK`"] + #[doc = "EM01GRPCCLK is clocking EUSART0"] #[inline(always)] pub fn is_em01grpcclk(&self) -> bool { - *self == CLKSEL_A::EM01GRPCCLK + *self == Clksel::Em01grpcclk } - #[doc = "Checks if the value of the field is `HFRCOEM23`"] + #[doc = "HFRCOEM23 is clocking EUSART0"] #[inline(always)] pub fn is_hfrcoem23(&self) -> bool { - *self == CLKSEL_A::HFRCOEM23 + *self == Clksel::Hfrcoem23 } - #[doc = "Checks if the value of the field is `LFRCO`"] + #[doc = "LFRCO is clocking EUSART0"] #[inline(always)] pub fn is_lfrco(&self) -> bool { - *self == CLKSEL_A::LFRCO + *self == Clksel::Lfrco } - #[doc = "Checks if the value of the field is `LFXO`"] + #[doc = "LFXO is clocking EUSART0"] #[inline(always)] pub fn is_lfxo(&self) -> bool { - *self == CLKSEL_A::LFXO + *self == Clksel::Lfxo } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EUSART0CLKCTRL_SPEC, u8, CLKSEL_A, 3, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "EUSART0 is not clocked"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(CLKSEL_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Clksel::Disabled) } #[doc = "EM01GRPCCLK is clocking EUSART0"] #[inline(always)] - pub fn em01grpcclk(self) -> &'a mut W { - self.variant(CLKSEL_A::EM01GRPCCLK) + pub fn em01grpcclk(self) -> &'a mut crate::W { + self.variant(Clksel::Em01grpcclk) } #[doc = "HFRCOEM23 is clocking EUSART0"] #[inline(always)] - pub fn hfrcoem23(self) -> &'a mut W { - self.variant(CLKSEL_A::HFRCOEM23) + pub fn hfrcoem23(self) -> &'a mut crate::W { + self.variant(Clksel::Hfrcoem23) } #[doc = "LFRCO is clocking EUSART0"] #[inline(always)] - pub fn lfrco(self) -> &'a mut W { - self.variant(CLKSEL_A::LFRCO) + pub fn lfrco(self) -> &'a mut crate::W { + self.variant(Clksel::Lfrco) } #[doc = "LFXO is clocking EUSART0"] #[inline(always)] - pub fn lfxo(self) -> &'a mut W { - self.variant(CLKSEL_A::LFXO) + pub fn lfxo(self) -> &'a mut crate::W { + self.variant(Clksel::Lfxo) } } impl R { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 7) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart0clkctrl](index.html) module"] -pub struct EUSART0CLKCTRL_SPEC; -impl crate::RegisterSpec for EUSART0CLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0clkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0clkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart0clkctrlSpec; +impl crate::RegisterSpec for Eusart0clkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart0clkctrl::R](R) reader structure"] -impl crate::Readable for EUSART0CLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart0clkctrl::W](W) writer structure"] -impl crate::Writable for EUSART0CLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart0clkctrl::R`](R) reader structure"] +impl crate::Readable for Eusart0clkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart0clkctrl::W`](W) writer structure"] +impl crate::Writable for Eusart0clkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART0CLKCTRL to value 0x01"] -impl crate::Resettable for EUSART0CLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for Eusart0clkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/exportclkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/exportclkctrl.rs index 4956446..3baca69 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/exportclkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/exportclkctrl.rs @@ -1,584 +1,565 @@ #[doc = "Register `EXPORTCLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EXPORTCLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKOUTSEL0` reader - Clock Output Select 0"] -pub type CLKOUTSEL0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Output Select 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKOUTSEL0_A { +pub enum Clkoutsel0 { #[doc = "0: CLKOUT0 is not clocked"] - DISABLED = 0, + Disabled = 0, #[doc = "1: HCLK is clocking CLKOUT0"] - HCLK = 1, + Hclk = 1, #[doc = "2: EXPORTCLK is clocking CLKOUT0"] - HFEXPCLK = 2, + Hfexpclk = 2, #[doc = "3: ULFRCO is clocking CLKOUT0"] - ULFRCO = 3, + Ulfrco = 3, #[doc = "4: LFRCO is clocking CLKOUT0"] - LFRCO = 4, + Lfrco = 4, #[doc = "5: LFXO is clocking CLKOUT0"] - LFXO = 5, + Lfxo = 5, #[doc = "6: HFRCODPLL is clocking CLKOUT0"] - HFRCODPLL = 6, + Hfrcodpll = 6, #[doc = "7: HFXO is clocking CLKOUT0"] - HFXO = 7, + Hfxo = 7, #[doc = "8: FSRCO is clocking CLKOUT0"] - FSRCO = 8, + Fsrco = 8, #[doc = "9: HFRCOEM23 is clocking CLKOUT0"] - HFRCOEM23 = 9, + Hfrcoem23 = 9, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKOUTSEL0_A) -> Self { + fn from(variant: Clkoutsel0) -> Self { variant as _ } } -impl CLKOUTSEL0_R { +impl crate::FieldSpec for Clkoutsel0 { + type Ux = u8; +} +impl crate::IsEnum for Clkoutsel0 {} +#[doc = "Field `CLKOUTSEL0` reader - Clock Output Select 0"] +pub type Clkoutsel0R = crate::FieldReader; +impl Clkoutsel0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKOUTSEL0_A::DISABLED), - 1 => Some(CLKOUTSEL0_A::HCLK), - 2 => Some(CLKOUTSEL0_A::HFEXPCLK), - 3 => Some(CLKOUTSEL0_A::ULFRCO), - 4 => Some(CLKOUTSEL0_A::LFRCO), - 5 => Some(CLKOUTSEL0_A::LFXO), - 6 => Some(CLKOUTSEL0_A::HFRCODPLL), - 7 => Some(CLKOUTSEL0_A::HFXO), - 8 => Some(CLKOUTSEL0_A::FSRCO), - 9 => Some(CLKOUTSEL0_A::HFRCOEM23), + 0 => Some(Clkoutsel0::Disabled), + 1 => Some(Clkoutsel0::Hclk), + 2 => Some(Clkoutsel0::Hfexpclk), + 3 => Some(Clkoutsel0::Ulfrco), + 4 => Some(Clkoutsel0::Lfrco), + 5 => Some(Clkoutsel0::Lfxo), + 6 => Some(Clkoutsel0::Hfrcodpll), + 7 => Some(Clkoutsel0::Hfxo), + 8 => Some(Clkoutsel0::Fsrco), + 9 => Some(Clkoutsel0::Hfrcoem23), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "CLKOUT0 is not clocked"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == CLKOUTSEL0_A::DISABLED + *self == Clkoutsel0::Disabled } - #[doc = "Checks if the value of the field is `HCLK`"] + #[doc = "HCLK is clocking CLKOUT0"] #[inline(always)] pub fn is_hclk(&self) -> bool { - *self == CLKOUTSEL0_A::HCLK + *self == Clkoutsel0::Hclk } - #[doc = "Checks if the value of the field is `HFEXPCLK`"] + #[doc = "EXPORTCLK is clocking CLKOUT0"] #[inline(always)] pub fn is_hfexpclk(&self) -> bool { - *self == CLKOUTSEL0_A::HFEXPCLK + *self == Clkoutsel0::Hfexpclk } - #[doc = "Checks if the value of the field is `ULFRCO`"] + #[doc = "ULFRCO is clocking CLKOUT0"] #[inline(always)] pub fn is_ulfrco(&self) -> bool { - *self == CLKOUTSEL0_A::ULFRCO + *self == Clkoutsel0::Ulfrco } - #[doc = "Checks if the value of the field is `LFRCO`"] + #[doc = "LFRCO is clocking CLKOUT0"] #[inline(always)] pub fn is_lfrco(&self) -> bool { - *self == CLKOUTSEL0_A::LFRCO + *self == Clkoutsel0::Lfrco } - #[doc = "Checks if the value of the field is `LFXO`"] + #[doc = "LFXO is clocking CLKOUT0"] #[inline(always)] pub fn is_lfxo(&self) -> bool { - *self == CLKOUTSEL0_A::LFXO + *self == Clkoutsel0::Lfxo } - #[doc = "Checks if the value of the field is `HFRCODPLL`"] + #[doc = "HFRCODPLL is clocking CLKOUT0"] #[inline(always)] pub fn is_hfrcodpll(&self) -> bool { - *self == CLKOUTSEL0_A::HFRCODPLL + *self == Clkoutsel0::Hfrcodpll } - #[doc = "Checks if the value of the field is `HFXO`"] + #[doc = "HFXO is clocking CLKOUT0"] #[inline(always)] pub fn is_hfxo(&self) -> bool { - *self == CLKOUTSEL0_A::HFXO + *self == Clkoutsel0::Hfxo } - #[doc = "Checks if the value of the field is `FSRCO`"] + #[doc = "FSRCO is clocking CLKOUT0"] #[inline(always)] pub fn is_fsrco(&self) -> bool { - *self == CLKOUTSEL0_A::FSRCO + *self == Clkoutsel0::Fsrco } - #[doc = "Checks if the value of the field is `HFRCOEM23`"] + #[doc = "HFRCOEM23 is clocking CLKOUT0"] #[inline(always)] pub fn is_hfrcoem23(&self) -> bool { - *self == CLKOUTSEL0_A::HFRCOEM23 + *self == Clkoutsel0::Hfrcoem23 } } #[doc = "Field `CLKOUTSEL0` writer - Clock Output Select 0"] -pub type CLKOUTSEL0_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EXPORTCLKCTRL_SPEC, u8, CLKOUTSEL0_A, 4, O>; -impl<'a, const O: u8> CLKOUTSEL0_W<'a, O> { +pub type Clkoutsel0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Clkoutsel0>; +impl<'a, REG> Clkoutsel0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "CLKOUT0 is not clocked"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(CLKOUTSEL0_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Clkoutsel0::Disabled) } #[doc = "HCLK is clocking CLKOUT0"] #[inline(always)] - pub fn hclk(self) -> &'a mut W { - self.variant(CLKOUTSEL0_A::HCLK) + pub fn hclk(self) -> &'a mut crate::W { + self.variant(Clkoutsel0::Hclk) } #[doc = "EXPORTCLK is clocking CLKOUT0"] #[inline(always)] - pub fn hfexpclk(self) -> &'a mut W { - self.variant(CLKOUTSEL0_A::HFEXPCLK) + pub fn hfexpclk(self) -> &'a mut crate::W { + self.variant(Clkoutsel0::Hfexpclk) } #[doc = "ULFRCO is clocking CLKOUT0"] #[inline(always)] - pub fn ulfrco(self) -> &'a mut W { - self.variant(CLKOUTSEL0_A::ULFRCO) + pub fn ulfrco(self) -> &'a mut crate::W { + self.variant(Clkoutsel0::Ulfrco) } #[doc = "LFRCO is clocking CLKOUT0"] #[inline(always)] - pub fn lfrco(self) -> &'a mut W { - self.variant(CLKOUTSEL0_A::LFRCO) + pub fn lfrco(self) -> &'a mut crate::W { + self.variant(Clkoutsel0::Lfrco) } #[doc = "LFXO is clocking CLKOUT0"] #[inline(always)] - pub fn lfxo(self) -> &'a mut W { - self.variant(CLKOUTSEL0_A::LFXO) + pub fn lfxo(self) -> &'a mut crate::W { + self.variant(Clkoutsel0::Lfxo) } #[doc = "HFRCODPLL is clocking CLKOUT0"] #[inline(always)] - pub fn hfrcodpll(self) -> &'a mut W { - self.variant(CLKOUTSEL0_A::HFRCODPLL) + pub fn hfrcodpll(self) -> &'a mut crate::W { + self.variant(Clkoutsel0::Hfrcodpll) } #[doc = "HFXO is clocking CLKOUT0"] #[inline(always)] - pub fn hfxo(self) -> &'a mut W { - self.variant(CLKOUTSEL0_A::HFXO) + pub fn hfxo(self) -> &'a mut crate::W { + self.variant(Clkoutsel0::Hfxo) } #[doc = "FSRCO is clocking CLKOUT0"] #[inline(always)] - pub fn fsrco(self) -> &'a mut W { - self.variant(CLKOUTSEL0_A::FSRCO) + pub fn fsrco(self) -> &'a mut crate::W { + self.variant(Clkoutsel0::Fsrco) } #[doc = "HFRCOEM23 is clocking CLKOUT0"] #[inline(always)] - pub fn hfrcoem23(self) -> &'a mut W { - self.variant(CLKOUTSEL0_A::HFRCOEM23) + pub fn hfrcoem23(self) -> &'a mut crate::W { + self.variant(Clkoutsel0::Hfrcoem23) } } -#[doc = "Field `CLKOUTSEL1` reader - Clock Output Select 1"] -pub type CLKOUTSEL1_R = crate::FieldReader; #[doc = "Clock Output Select 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKOUTSEL1_A { +pub enum Clkoutsel1 { #[doc = "0: CLKOUT1 is not clocked"] - DISABLED = 0, + Disabled = 0, #[doc = "1: HCLK is clocking CLKOUT1"] - HCLK = 1, + Hclk = 1, #[doc = "2: EXPORTCLK is clocking CLKOUT1"] - HFEXPCLK = 2, + Hfexpclk = 2, #[doc = "3: ULFRCO is clocking CLKOUT1"] - ULFRCO = 3, + Ulfrco = 3, #[doc = "4: LFRCO is clocking CLKOUT1"] - LFRCO = 4, + Lfrco = 4, #[doc = "5: LFXO is clocking CLKOUT1"] - LFXO = 5, + Lfxo = 5, #[doc = "6: HFRCODPLL is clocking CLKOUT1"] - HFRCODPLL = 6, + Hfrcodpll = 6, #[doc = "7: HFXO is clocking CLKOUT1"] - HFXO = 7, + Hfxo = 7, #[doc = "8: FSRCO is clocking CLKOUT1"] - FSRCO = 8, + Fsrco = 8, #[doc = "9: HFRCOEM23 is clocking CLKOUT1"] - HFRCOEM23 = 9, + Hfrcoem23 = 9, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKOUTSEL1_A) -> Self { + fn from(variant: Clkoutsel1) -> Self { variant as _ } } -impl CLKOUTSEL1_R { +impl crate::FieldSpec for Clkoutsel1 { + type Ux = u8; +} +impl crate::IsEnum for Clkoutsel1 {} +#[doc = "Field `CLKOUTSEL1` reader - Clock Output Select 1"] +pub type Clkoutsel1R = crate::FieldReader; +impl Clkoutsel1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKOUTSEL1_A::DISABLED), - 1 => Some(CLKOUTSEL1_A::HCLK), - 2 => Some(CLKOUTSEL1_A::HFEXPCLK), - 3 => Some(CLKOUTSEL1_A::ULFRCO), - 4 => Some(CLKOUTSEL1_A::LFRCO), - 5 => Some(CLKOUTSEL1_A::LFXO), - 6 => Some(CLKOUTSEL1_A::HFRCODPLL), - 7 => Some(CLKOUTSEL1_A::HFXO), - 8 => Some(CLKOUTSEL1_A::FSRCO), - 9 => Some(CLKOUTSEL1_A::HFRCOEM23), + 0 => Some(Clkoutsel1::Disabled), + 1 => Some(Clkoutsel1::Hclk), + 2 => Some(Clkoutsel1::Hfexpclk), + 3 => Some(Clkoutsel1::Ulfrco), + 4 => Some(Clkoutsel1::Lfrco), + 5 => Some(Clkoutsel1::Lfxo), + 6 => Some(Clkoutsel1::Hfrcodpll), + 7 => Some(Clkoutsel1::Hfxo), + 8 => Some(Clkoutsel1::Fsrco), + 9 => Some(Clkoutsel1::Hfrcoem23), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "CLKOUT1 is not clocked"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == CLKOUTSEL1_A::DISABLED + *self == Clkoutsel1::Disabled } - #[doc = "Checks if the value of the field is `HCLK`"] + #[doc = "HCLK is clocking CLKOUT1"] #[inline(always)] pub fn is_hclk(&self) -> bool { - *self == CLKOUTSEL1_A::HCLK + *self == Clkoutsel1::Hclk } - #[doc = "Checks if the value of the field is `HFEXPCLK`"] + #[doc = "EXPORTCLK is clocking CLKOUT1"] #[inline(always)] pub fn is_hfexpclk(&self) -> bool { - *self == CLKOUTSEL1_A::HFEXPCLK + *self == Clkoutsel1::Hfexpclk } - #[doc = "Checks if the value of the field is `ULFRCO`"] + #[doc = "ULFRCO is clocking CLKOUT1"] #[inline(always)] pub fn is_ulfrco(&self) -> bool { - *self == CLKOUTSEL1_A::ULFRCO + *self == Clkoutsel1::Ulfrco } - #[doc = "Checks if the value of the field is `LFRCO`"] + #[doc = "LFRCO is clocking CLKOUT1"] #[inline(always)] pub fn is_lfrco(&self) -> bool { - *self == CLKOUTSEL1_A::LFRCO + *self == Clkoutsel1::Lfrco } - #[doc = "Checks if the value of the field is `LFXO`"] + #[doc = "LFXO is clocking CLKOUT1"] #[inline(always)] pub fn is_lfxo(&self) -> bool { - *self == CLKOUTSEL1_A::LFXO + *self == Clkoutsel1::Lfxo } - #[doc = "Checks if the value of the field is `HFRCODPLL`"] + #[doc = "HFRCODPLL is clocking CLKOUT1"] #[inline(always)] pub fn is_hfrcodpll(&self) -> bool { - *self == CLKOUTSEL1_A::HFRCODPLL + *self == Clkoutsel1::Hfrcodpll } - #[doc = "Checks if the value of the field is `HFXO`"] + #[doc = "HFXO is clocking CLKOUT1"] #[inline(always)] pub fn is_hfxo(&self) -> bool { - *self == CLKOUTSEL1_A::HFXO + *self == Clkoutsel1::Hfxo } - #[doc = "Checks if the value of the field is `FSRCO`"] + #[doc = "FSRCO is clocking CLKOUT1"] #[inline(always)] pub fn is_fsrco(&self) -> bool { - *self == CLKOUTSEL1_A::FSRCO + *self == Clkoutsel1::Fsrco } - #[doc = "Checks if the value of the field is `HFRCOEM23`"] + #[doc = "HFRCOEM23 is clocking CLKOUT1"] #[inline(always)] pub fn is_hfrcoem23(&self) -> bool { - *self == CLKOUTSEL1_A::HFRCOEM23 + *self == Clkoutsel1::Hfrcoem23 } } #[doc = "Field `CLKOUTSEL1` writer - Clock Output Select 1"] -pub type CLKOUTSEL1_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EXPORTCLKCTRL_SPEC, u8, CLKOUTSEL1_A, 4, O>; -impl<'a, const O: u8> CLKOUTSEL1_W<'a, O> { +pub type Clkoutsel1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Clkoutsel1>; +impl<'a, REG> Clkoutsel1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "CLKOUT1 is not clocked"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(CLKOUTSEL1_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Clkoutsel1::Disabled) } #[doc = "HCLK is clocking CLKOUT1"] #[inline(always)] - pub fn hclk(self) -> &'a mut W { - self.variant(CLKOUTSEL1_A::HCLK) + pub fn hclk(self) -> &'a mut crate::W { + self.variant(Clkoutsel1::Hclk) } #[doc = "EXPORTCLK is clocking CLKOUT1"] #[inline(always)] - pub fn hfexpclk(self) -> &'a mut W { - self.variant(CLKOUTSEL1_A::HFEXPCLK) + pub fn hfexpclk(self) -> &'a mut crate::W { + self.variant(Clkoutsel1::Hfexpclk) } #[doc = "ULFRCO is clocking CLKOUT1"] #[inline(always)] - pub fn ulfrco(self) -> &'a mut W { - self.variant(CLKOUTSEL1_A::ULFRCO) + pub fn ulfrco(self) -> &'a mut crate::W { + self.variant(Clkoutsel1::Ulfrco) } #[doc = "LFRCO is clocking CLKOUT1"] #[inline(always)] - pub fn lfrco(self) -> &'a mut W { - self.variant(CLKOUTSEL1_A::LFRCO) + pub fn lfrco(self) -> &'a mut crate::W { + self.variant(Clkoutsel1::Lfrco) } #[doc = "LFXO is clocking CLKOUT1"] #[inline(always)] - pub fn lfxo(self) -> &'a mut W { - self.variant(CLKOUTSEL1_A::LFXO) + pub fn lfxo(self) -> &'a mut crate::W { + self.variant(Clkoutsel1::Lfxo) } #[doc = "HFRCODPLL is clocking CLKOUT1"] #[inline(always)] - pub fn hfrcodpll(self) -> &'a mut W { - self.variant(CLKOUTSEL1_A::HFRCODPLL) + pub fn hfrcodpll(self) -> &'a mut crate::W { + self.variant(Clkoutsel1::Hfrcodpll) } #[doc = "HFXO is clocking CLKOUT1"] #[inline(always)] - pub fn hfxo(self) -> &'a mut W { - self.variant(CLKOUTSEL1_A::HFXO) + pub fn hfxo(self) -> &'a mut crate::W { + self.variant(Clkoutsel1::Hfxo) } #[doc = "FSRCO is clocking CLKOUT1"] #[inline(always)] - pub fn fsrco(self) -> &'a mut W { - self.variant(CLKOUTSEL1_A::FSRCO) + pub fn fsrco(self) -> &'a mut crate::W { + self.variant(Clkoutsel1::Fsrco) } #[doc = "HFRCOEM23 is clocking CLKOUT1"] #[inline(always)] - pub fn hfrcoem23(self) -> &'a mut W { - self.variant(CLKOUTSEL1_A::HFRCOEM23) + pub fn hfrcoem23(self) -> &'a mut crate::W { + self.variant(Clkoutsel1::Hfrcoem23) } } -#[doc = "Field `CLKOUTSEL2` reader - Clock Output Select 2"] -pub type CLKOUTSEL2_R = crate::FieldReader; #[doc = "Clock Output Select 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKOUTSEL2_A { +pub enum Clkoutsel2 { #[doc = "0: CLKOUT2 is not clocked"] - DISABLED = 0, + Disabled = 0, #[doc = "1: HCLK is clocking CLKOUT2"] - HCLK = 1, + Hclk = 1, #[doc = "2: EXPORTCLK is clocking CLKOUT2"] - HFEXPCLK = 2, + Hfexpclk = 2, #[doc = "3: ULFRCO is clocking CLKOUT2"] - ULFRCO = 3, + Ulfrco = 3, #[doc = "4: LFRCO is clocking CLKOUT2"] - LFRCO = 4, + Lfrco = 4, #[doc = "5: LFXO is clocking CLKOUT2"] - LFXO = 5, + Lfxo = 5, #[doc = "6: HFRCODPLL is clocking CLKOUT2"] - HFRCODPLL = 6, + Hfrcodpll = 6, #[doc = "7: HFXO is clocking CLKOUT2"] - HFXO = 7, + Hfxo = 7, #[doc = "8: FSRCO is clocking CLKOUT2"] - FSRCO = 8, + Fsrco = 8, #[doc = "9: HFRCOEM23 is clocking CLKOUT2"] - HFRCOEM23 = 9, + Hfrcoem23 = 9, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKOUTSEL2_A) -> Self { + fn from(variant: Clkoutsel2) -> Self { variant as _ } } -impl CLKOUTSEL2_R { +impl crate::FieldSpec for Clkoutsel2 { + type Ux = u8; +} +impl crate::IsEnum for Clkoutsel2 {} +#[doc = "Field `CLKOUTSEL2` reader - Clock Output Select 2"] +pub type Clkoutsel2R = crate::FieldReader; +impl Clkoutsel2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKOUTSEL2_A::DISABLED), - 1 => Some(CLKOUTSEL2_A::HCLK), - 2 => Some(CLKOUTSEL2_A::HFEXPCLK), - 3 => Some(CLKOUTSEL2_A::ULFRCO), - 4 => Some(CLKOUTSEL2_A::LFRCO), - 5 => Some(CLKOUTSEL2_A::LFXO), - 6 => Some(CLKOUTSEL2_A::HFRCODPLL), - 7 => Some(CLKOUTSEL2_A::HFXO), - 8 => Some(CLKOUTSEL2_A::FSRCO), - 9 => Some(CLKOUTSEL2_A::HFRCOEM23), + 0 => Some(Clkoutsel2::Disabled), + 1 => Some(Clkoutsel2::Hclk), + 2 => Some(Clkoutsel2::Hfexpclk), + 3 => Some(Clkoutsel2::Ulfrco), + 4 => Some(Clkoutsel2::Lfrco), + 5 => Some(Clkoutsel2::Lfxo), + 6 => Some(Clkoutsel2::Hfrcodpll), + 7 => Some(Clkoutsel2::Hfxo), + 8 => Some(Clkoutsel2::Fsrco), + 9 => Some(Clkoutsel2::Hfrcoem23), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "CLKOUT2 is not clocked"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == CLKOUTSEL2_A::DISABLED + *self == Clkoutsel2::Disabled } - #[doc = "Checks if the value of the field is `HCLK`"] + #[doc = "HCLK is clocking CLKOUT2"] #[inline(always)] pub fn is_hclk(&self) -> bool { - *self == CLKOUTSEL2_A::HCLK + *self == Clkoutsel2::Hclk } - #[doc = "Checks if the value of the field is `HFEXPCLK`"] + #[doc = "EXPORTCLK is clocking CLKOUT2"] #[inline(always)] pub fn is_hfexpclk(&self) -> bool { - *self == CLKOUTSEL2_A::HFEXPCLK + *self == Clkoutsel2::Hfexpclk } - #[doc = "Checks if the value of the field is `ULFRCO`"] + #[doc = "ULFRCO is clocking CLKOUT2"] #[inline(always)] pub fn is_ulfrco(&self) -> bool { - *self == CLKOUTSEL2_A::ULFRCO + *self == Clkoutsel2::Ulfrco } - #[doc = "Checks if the value of the field is `LFRCO`"] + #[doc = "LFRCO is clocking CLKOUT2"] #[inline(always)] pub fn is_lfrco(&self) -> bool { - *self == CLKOUTSEL2_A::LFRCO + *self == Clkoutsel2::Lfrco } - #[doc = "Checks if the value of the field is `LFXO`"] + #[doc = "LFXO is clocking CLKOUT2"] #[inline(always)] pub fn is_lfxo(&self) -> bool { - *self == CLKOUTSEL2_A::LFXO + *self == Clkoutsel2::Lfxo } - #[doc = "Checks if the value of the field is `HFRCODPLL`"] + #[doc = "HFRCODPLL is clocking CLKOUT2"] #[inline(always)] pub fn is_hfrcodpll(&self) -> bool { - *self == CLKOUTSEL2_A::HFRCODPLL + *self == Clkoutsel2::Hfrcodpll } - #[doc = "Checks if the value of the field is `HFXO`"] + #[doc = "HFXO is clocking CLKOUT2"] #[inline(always)] pub fn is_hfxo(&self) -> bool { - *self == CLKOUTSEL2_A::HFXO + *self == Clkoutsel2::Hfxo } - #[doc = "Checks if the value of the field is `FSRCO`"] + #[doc = "FSRCO is clocking CLKOUT2"] #[inline(always)] pub fn is_fsrco(&self) -> bool { - *self == CLKOUTSEL2_A::FSRCO + *self == Clkoutsel2::Fsrco } - #[doc = "Checks if the value of the field is `HFRCOEM23`"] + #[doc = "HFRCOEM23 is clocking CLKOUT2"] #[inline(always)] pub fn is_hfrcoem23(&self) -> bool { - *self == CLKOUTSEL2_A::HFRCOEM23 + *self == Clkoutsel2::Hfrcoem23 } } #[doc = "Field `CLKOUTSEL2` writer - Clock Output Select 2"] -pub type CLKOUTSEL2_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EXPORTCLKCTRL_SPEC, u8, CLKOUTSEL2_A, 4, O>; -impl<'a, const O: u8> CLKOUTSEL2_W<'a, O> { +pub type Clkoutsel2W<'a, REG> = crate::FieldWriter<'a, REG, 4, Clkoutsel2>; +impl<'a, REG> Clkoutsel2W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "CLKOUT2 is not clocked"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(CLKOUTSEL2_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Clkoutsel2::Disabled) } #[doc = "HCLK is clocking CLKOUT2"] #[inline(always)] - pub fn hclk(self) -> &'a mut W { - self.variant(CLKOUTSEL2_A::HCLK) + pub fn hclk(self) -> &'a mut crate::W { + self.variant(Clkoutsel2::Hclk) } #[doc = "EXPORTCLK is clocking CLKOUT2"] #[inline(always)] - pub fn hfexpclk(self) -> &'a mut W { - self.variant(CLKOUTSEL2_A::HFEXPCLK) + pub fn hfexpclk(self) -> &'a mut crate::W { + self.variant(Clkoutsel2::Hfexpclk) } #[doc = "ULFRCO is clocking CLKOUT2"] #[inline(always)] - pub fn ulfrco(self) -> &'a mut W { - self.variant(CLKOUTSEL2_A::ULFRCO) + pub fn ulfrco(self) -> &'a mut crate::W { + self.variant(Clkoutsel2::Ulfrco) } #[doc = "LFRCO is clocking CLKOUT2"] #[inline(always)] - pub fn lfrco(self) -> &'a mut W { - self.variant(CLKOUTSEL2_A::LFRCO) + pub fn lfrco(self) -> &'a mut crate::W { + self.variant(Clkoutsel2::Lfrco) } #[doc = "LFXO is clocking CLKOUT2"] #[inline(always)] - pub fn lfxo(self) -> &'a mut W { - self.variant(CLKOUTSEL2_A::LFXO) + pub fn lfxo(self) -> &'a mut crate::W { + self.variant(Clkoutsel2::Lfxo) } #[doc = "HFRCODPLL is clocking CLKOUT2"] #[inline(always)] - pub fn hfrcodpll(self) -> &'a mut W { - self.variant(CLKOUTSEL2_A::HFRCODPLL) + pub fn hfrcodpll(self) -> &'a mut crate::W { + self.variant(Clkoutsel2::Hfrcodpll) } #[doc = "HFXO is clocking CLKOUT2"] #[inline(always)] - pub fn hfxo(self) -> &'a mut W { - self.variant(CLKOUTSEL2_A::HFXO) + pub fn hfxo(self) -> &'a mut crate::W { + self.variant(Clkoutsel2::Hfxo) } #[doc = "FSRCO is clocking CLKOUT2"] #[inline(always)] - pub fn fsrco(self) -> &'a mut W { - self.variant(CLKOUTSEL2_A::FSRCO) + pub fn fsrco(self) -> &'a mut crate::W { + self.variant(Clkoutsel2::Fsrco) } #[doc = "HFRCOEM23 is clocking CLKOUT2"] #[inline(always)] - pub fn hfrcoem23(self) -> &'a mut W { - self.variant(CLKOUTSEL2_A::HFRCOEM23) + pub fn hfrcoem23(self) -> &'a mut crate::W { + self.variant(Clkoutsel2::Hfrcoem23) } } #[doc = "Field `PRESC` reader - EXPORTCLK Prescaler"] -pub type PRESC_R = crate::FieldReader; +pub type PrescR = crate::FieldReader; #[doc = "Field `PRESC` writer - EXPORTCLK Prescaler"] -pub type PRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EXPORTCLKCTRL_SPEC, u8, u8, 5, O>; +pub type PrescW<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bits 0:3 - Clock Output Select 0"] #[inline(always)] - pub fn clkoutsel0(&self) -> CLKOUTSEL0_R { - CLKOUTSEL0_R::new((self.bits & 0x0f) as u8) + pub fn clkoutsel0(&self) -> Clkoutsel0R { + Clkoutsel0R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:11 - Clock Output Select 1"] #[inline(always)] - pub fn clkoutsel1(&self) -> CLKOUTSEL1_R { - CLKOUTSEL1_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn clkoutsel1(&self) -> Clkoutsel1R { + Clkoutsel1R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 16:19 - Clock Output Select 2"] #[inline(always)] - pub fn clkoutsel2(&self) -> CLKOUTSEL2_R { - CLKOUTSEL2_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn clkoutsel2(&self) -> Clkoutsel2R { + Clkoutsel2R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:28 - EXPORTCLK Prescaler"] #[inline(always)] - pub fn presc(&self) -> PRESC_R { - PRESC_R::new(((self.bits >> 24) & 0x1f) as u8) + pub fn presc(&self) -> PrescR { + PrescR::new(((self.bits >> 24) & 0x1f) as u8) } } impl W { #[doc = "Bits 0:3 - Clock Output Select 0"] #[inline(always)] #[must_use] - pub fn clkoutsel0(&mut self) -> CLKOUTSEL0_W<0> { - CLKOUTSEL0_W::new(self) + pub fn clkoutsel0(&mut self) -> Clkoutsel0W { + Clkoutsel0W::new(self, 0) } #[doc = "Bits 8:11 - Clock Output Select 1"] #[inline(always)] #[must_use] - pub fn clkoutsel1(&mut self) -> CLKOUTSEL1_W<8> { - CLKOUTSEL1_W::new(self) + pub fn clkoutsel1(&mut self) -> Clkoutsel1W { + Clkoutsel1W::new(self, 8) } #[doc = "Bits 16:19 - Clock Output Select 2"] #[inline(always)] #[must_use] - pub fn clkoutsel2(&mut self) -> CLKOUTSEL2_W<16> { - CLKOUTSEL2_W::new(self) + pub fn clkoutsel2(&mut self) -> Clkoutsel2W { + Clkoutsel2W::new(self, 16) } #[doc = "Bits 24:28 - EXPORTCLK Prescaler"] #[inline(always)] #[must_use] - pub fn presc(&mut self) -> PRESC_W<24> { - PRESC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn presc(&mut self) -> PrescW { + PrescW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [exportclkctrl](index.html) module"] -pub struct EXPORTCLKCTRL_SPEC; -impl crate::RegisterSpec for EXPORTCLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`exportclkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`exportclkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ExportclkctrlSpec; +impl crate::RegisterSpec for ExportclkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [exportclkctrl::R](R) reader structure"] -impl crate::Readable for EXPORTCLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [exportclkctrl::W](W) writer structure"] -impl crate::Writable for EXPORTCLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`exportclkctrl::R`](R) reader structure"] +impl crate::Readable for ExportclkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`exportclkctrl::W`](W) writer structure"] +impl crate::Writable for ExportclkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EXPORTCLKCTRL to value 0"] -impl crate::Resettable for EXPORTCLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ExportclkctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/iadcclkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/iadcclkctrl.rs index d4186ef..5f214bc 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/iadcclkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/iadcclkctrl.rs @@ -1,142 +1,109 @@ #[doc = "Register `IADCCLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IADCCLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "1: EM01GRPACLK is clocking IADCCLK"] - EM01GRPACLK = 1, + Em01grpaclk = 1, #[doc = "2: FSRCO is clocking IADCCLK"] - FSRCO = 2, + Fsrco = 2, #[doc = "3: HFRCOEM23 is clocking IADCCLK"] - HFRCOEM23 = 3, + Hfrcoem23 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(CLKSEL_A::EM01GRPACLK), - 2 => Some(CLKSEL_A::FSRCO), - 3 => Some(CLKSEL_A::HFRCOEM23), + 1 => Some(Clksel::Em01grpaclk), + 2 => Some(Clksel::Fsrco), + 3 => Some(Clksel::Hfrcoem23), _ => None, } } - #[doc = "Checks if the value of the field is `EM01GRPACLK`"] + #[doc = "EM01GRPACLK is clocking IADCCLK"] #[inline(always)] pub fn is_em01grpaclk(&self) -> bool { - *self == CLKSEL_A::EM01GRPACLK + *self == Clksel::Em01grpaclk } - #[doc = "Checks if the value of the field is `FSRCO`"] + #[doc = "FSRCO is clocking IADCCLK"] #[inline(always)] pub fn is_fsrco(&self) -> bool { - *self == CLKSEL_A::FSRCO + *self == Clksel::Fsrco } - #[doc = "Checks if the value of the field is `HFRCOEM23`"] + #[doc = "HFRCOEM23 is clocking IADCCLK"] #[inline(always)] pub fn is_hfrcoem23(&self) -> bool { - *self == CLKSEL_A::HFRCOEM23 + *self == Clksel::Hfrcoem23 } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, IADCCLKCTRL_SPEC, u8, CLKSEL_A, 2, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "EM01GRPACLK is clocking IADCCLK"] #[inline(always)] - pub fn em01grpaclk(self) -> &'a mut W { - self.variant(CLKSEL_A::EM01GRPACLK) + pub fn em01grpaclk(self) -> &'a mut crate::W { + self.variant(Clksel::Em01grpaclk) } #[doc = "FSRCO is clocking IADCCLK"] #[inline(always)] - pub fn fsrco(self) -> &'a mut W { - self.variant(CLKSEL_A::FSRCO) + pub fn fsrco(self) -> &'a mut crate::W { + self.variant(Clksel::Fsrco) } #[doc = "HFRCOEM23 is clocking IADCCLK"] #[inline(always)] - pub fn hfrcoem23(self) -> &'a mut W { - self.variant(CLKSEL_A::HFRCOEM23) + pub fn hfrcoem23(self) -> &'a mut crate::W { + self.variant(Clksel::Hfrcoem23) } } impl R { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 3) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [iadcclkctrl](index.html) module"] -pub struct IADCCLKCTRL_SPEC; -impl crate::RegisterSpec for IADCCLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`iadcclkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iadcclkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IadcclkctrlSpec; +impl crate::RegisterSpec for IadcclkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [iadcclkctrl::R](R) reader structure"] -impl crate::Readable for IADCCLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [iadcclkctrl::W](W) writer structure"] -impl crate::Writable for IADCCLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`iadcclkctrl::R`](R) reader structure"] +impl crate::Readable for IadcclkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`iadcclkctrl::W`](W) writer structure"] +impl crate::Writable for IadcclkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IADCCLKCTRL to value 0x01"] -impl crate::Resettable for IADCCLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IadcclkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/ien.rs index 76b7cdd..7fc1d59 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/ien.rs @@ -1,95 +1,55 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CALRDY` reader - Calibration Ready Interrupt Enable"] -pub type CALRDY_R = crate::BitReader; +pub type CalrdyR = crate::BitReader; #[doc = "Field `CALRDY` writer - Calibration Ready Interrupt Enable"] -pub type CALRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type CalrdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CALOF` reader - Calibration Overflow Interrupt Enable"] -pub type CALOF_R = crate::BitReader; +pub type CalofR = crate::BitReader; #[doc = "Field `CALOF` writer - Calibration Overflow Interrupt Enable"] -pub type CALOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type CalofW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Calibration Ready Interrupt Enable"] #[inline(always)] - pub fn calrdy(&self) -> CALRDY_R { - CALRDY_R::new((self.bits & 1) != 0) + pub fn calrdy(&self) -> CalrdyR { + CalrdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Calibration Overflow Interrupt Enable"] #[inline(always)] - pub fn calof(&self) -> CALOF_R { - CALOF_R::new(((self.bits >> 1) & 1) != 0) + pub fn calof(&self) -> CalofR { + CalofR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Calibration Ready Interrupt Enable"] #[inline(always)] #[must_use] - pub fn calrdy(&mut self) -> CALRDY_W<0> { - CALRDY_W::new(self) + pub fn calrdy(&mut self) -> CalrdyW { + CalrdyW::new(self, 0) } #[doc = "Bit 1 - Calibration Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn calof(&mut self) -> CALOF_W<1> { - CALOF_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn calof(&mut self) -> CalofW { + CalofW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/if_.rs index 1d472d5..8b8677c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/if_.rs @@ -1,95 +1,55 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CALRDY` reader - Calibration Ready Interrupt Flag"] -pub type CALRDY_R = crate::BitReader; +pub type CalrdyR = crate::BitReader; #[doc = "Field `CALRDY` writer - Calibration Ready Interrupt Flag"] -pub type CALRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type CalrdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CALOF` reader - Calibration Overflow Interrupt Flag"] -pub type CALOF_R = crate::BitReader; +pub type CalofR = crate::BitReader; #[doc = "Field `CALOF` writer - Calibration Overflow Interrupt Flag"] -pub type CALOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type CalofW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Calibration Ready Interrupt Flag"] #[inline(always)] - pub fn calrdy(&self) -> CALRDY_R { - CALRDY_R::new((self.bits & 1) != 0) + pub fn calrdy(&self) -> CalrdyR { + CalrdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Calibration Overflow Interrupt Flag"] #[inline(always)] - pub fn calof(&self) -> CALOF_R { - CALOF_R::new(((self.bits >> 1) & 1) != 0) + pub fn calof(&self) -> CalofR { + CalofR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Calibration Ready Interrupt Flag"] #[inline(always)] #[must_use] - pub fn calrdy(&mut self) -> CALRDY_W<0> { - CALRDY_W::new(self) + pub fn calrdy(&mut self) -> CalrdyW { + CalrdyW::new(self, 0) } #[doc = "Bit 1 - Calibration Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn calof(&mut self) -> CALOF_W<1> { - CALOF_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn calof(&mut self) -> CalofW { + CalofW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/ipversion.rs index 1c8b3f7..dc1f830 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x02"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/lcdclkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/lcdclkctrl.rs index 78ed56e..e42661b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/lcdclkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/lcdclkctrl.rs @@ -1,142 +1,109 @@ #[doc = "Register `LCDCLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LCDCLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "1: LFRCO is clocking LCDCLK"] - LFRCO = 1, + Lfrco = 1, #[doc = "2: LFXO is clocking LCDCLK"] - LFXO = 2, + Lfxo = 2, #[doc = "3: ULFRCO is clocking LCDCLK"] - ULFRCO = 3, + Ulfrco = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(CLKSEL_A::LFRCO), - 2 => Some(CLKSEL_A::LFXO), - 3 => Some(CLKSEL_A::ULFRCO), + 1 => Some(Clksel::Lfrco), + 2 => Some(Clksel::Lfxo), + 3 => Some(Clksel::Ulfrco), _ => None, } } - #[doc = "Checks if the value of the field is `LFRCO`"] + #[doc = "LFRCO is clocking LCDCLK"] #[inline(always)] pub fn is_lfrco(&self) -> bool { - *self == CLKSEL_A::LFRCO + *self == Clksel::Lfrco } - #[doc = "Checks if the value of the field is `LFXO`"] + #[doc = "LFXO is clocking LCDCLK"] #[inline(always)] pub fn is_lfxo(&self) -> bool { - *self == CLKSEL_A::LFXO + *self == Clksel::Lfxo } - #[doc = "Checks if the value of the field is `ULFRCO`"] + #[doc = "ULFRCO is clocking LCDCLK"] #[inline(always)] pub fn is_ulfrco(&self) -> bool { - *self == CLKSEL_A::ULFRCO + *self == Clksel::Ulfrco } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LCDCLKCTRL_SPEC, u8, CLKSEL_A, 2, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "LFRCO is clocking LCDCLK"] #[inline(always)] - pub fn lfrco(self) -> &'a mut W { - self.variant(CLKSEL_A::LFRCO) + pub fn lfrco(self) -> &'a mut crate::W { + self.variant(Clksel::Lfrco) } #[doc = "LFXO is clocking LCDCLK"] #[inline(always)] - pub fn lfxo(self) -> &'a mut W { - self.variant(CLKSEL_A::LFXO) + pub fn lfxo(self) -> &'a mut crate::W { + self.variant(Clksel::Lfxo) } #[doc = "ULFRCO is clocking LCDCLK"] #[inline(always)] - pub fn ulfrco(self) -> &'a mut W { - self.variant(CLKSEL_A::ULFRCO) + pub fn ulfrco(self) -> &'a mut crate::W { + self.variant(Clksel::Ulfrco) } } impl R { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 3) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lcdclkctrl](index.html) module"] -pub struct LCDCLKCTRL_SPEC; -impl crate::RegisterSpec for LCDCLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`lcdclkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lcdclkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LcdclkctrlSpec; +impl crate::RegisterSpec for LcdclkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [lcdclkctrl::R](R) reader structure"] -impl crate::Readable for LCDCLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lcdclkctrl::W](W) writer structure"] -impl crate::Writable for LCDCLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lcdclkctrl::R`](R) reader structure"] +impl crate::Readable for LcdclkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`lcdclkctrl::W`](W) writer structure"] +impl crate::Writable for LcdclkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LCDCLKCTRL to value 0x01"] -impl crate::Resettable for LCDCLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for LcdclkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/lesensehfclkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/lesensehfclkctrl.rs index 88d742e..f097506 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/lesensehfclkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/lesensehfclkctrl.rs @@ -1,129 +1,96 @@ #[doc = "Register `LESENSEHFCLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSEHFCLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "1: FSRCO is clocking LESENSEHFCLK"] - FSRCO = 1, + Fsrco = 1, #[doc = "2: HFRCOEM23 is clocking LESENSEHFCLK"] - HFRCOEM23 = 2, + Hfrcoem23 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(CLKSEL_A::FSRCO), - 2 => Some(CLKSEL_A::HFRCOEM23), + 1 => Some(Clksel::Fsrco), + 2 => Some(Clksel::Hfrcoem23), _ => None, } } - #[doc = "Checks if the value of the field is `FSRCO`"] + #[doc = "FSRCO is clocking LESENSEHFCLK"] #[inline(always)] pub fn is_fsrco(&self) -> bool { - *self == CLKSEL_A::FSRCO + *self == Clksel::Fsrco } - #[doc = "Checks if the value of the field is `HFRCOEM23`"] + #[doc = "HFRCOEM23 is clocking LESENSEHFCLK"] #[inline(always)] pub fn is_hfrcoem23(&self) -> bool { - *self == CLKSEL_A::HFRCOEM23 + *self == Clksel::Hfrcoem23 } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSEHFCLKCTRL_SPEC, u8, CLKSEL_A, 2, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "FSRCO is clocking LESENSEHFCLK"] #[inline(always)] - pub fn fsrco(self) -> &'a mut W { - self.variant(CLKSEL_A::FSRCO) + pub fn fsrco(self) -> &'a mut crate::W { + self.variant(Clksel::Fsrco) } #[doc = "HFRCOEM23 is clocking LESENSEHFCLK"] #[inline(always)] - pub fn hfrcoem23(self) -> &'a mut W { - self.variant(CLKSEL_A::HFRCOEM23) + pub fn hfrcoem23(self) -> &'a mut crate::W { + self.variant(Clksel::Hfrcoem23) } } impl R { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 3) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesensehfclkctrl](index.html) module"] -pub struct LESENSEHFCLKCTRL_SPEC; -impl crate::RegisterSpec for LESENSEHFCLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`lesensehfclkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesensehfclkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesensehfclkctrlSpec; +impl crate::RegisterSpec for LesensehfclkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesensehfclkctrl::R](R) reader structure"] -impl crate::Readable for LESENSEHFCLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesensehfclkctrl::W](W) writer structure"] -impl crate::Writable for LESENSEHFCLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesensehfclkctrl::R`](R) reader structure"] +impl crate::Readable for LesensehfclkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`lesensehfclkctrl::W`](W) writer structure"] +impl crate::Writable for LesensehfclkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSEHFCLKCTRL to value 0x01"] -impl crate::Resettable for LESENSEHFCLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for LesensehfclkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/lock.rs index 1aa1089..0bf05f9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Configuration Lock Key\n\nValue on reset: 37879"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "37879: Write this value to unlock"] - UNLOCK = 37879, + Unlock = 37879, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Configuration Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write this value to unlock"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Configuration Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0x93f7"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0x93f7; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0x93f7; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/pcnt0clkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/pcnt0clkctrl.rs index 3e7b88c..4fca51c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/pcnt0clkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/pcnt0clkctrl.rs @@ -1,142 +1,109 @@ #[doc = "Register `PCNT0CLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PCNT0CLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "0: PCNT0 is not clocked"] - DISABLED = 0, + Disabled = 0, #[doc = "1: EM23GRPACLK is clocking PCNT0"] - EM23GRPACLK = 1, + Em23grpaclk = 1, #[doc = "2: External pin PCNT_S0 is clocking PCNT0"] - PCNTS0 = 2, + Pcnts0 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKSEL_A::DISABLED), - 1 => Some(CLKSEL_A::EM23GRPACLK), - 2 => Some(CLKSEL_A::PCNTS0), + 0 => Some(Clksel::Disabled), + 1 => Some(Clksel::Em23grpaclk), + 2 => Some(Clksel::Pcnts0), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "PCNT0 is not clocked"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == CLKSEL_A::DISABLED + *self == Clksel::Disabled } - #[doc = "Checks if the value of the field is `EM23GRPACLK`"] + #[doc = "EM23GRPACLK is clocking PCNT0"] #[inline(always)] pub fn is_em23grpaclk(&self) -> bool { - *self == CLKSEL_A::EM23GRPACLK + *self == Clksel::Em23grpaclk } - #[doc = "Checks if the value of the field is `PCNTS0`"] + #[doc = "External pin PCNT_S0 is clocking PCNT0"] #[inline(always)] pub fn is_pcnts0(&self) -> bool { - *self == CLKSEL_A::PCNTS0 + *self == Clksel::Pcnts0 } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PCNT0CLKCTRL_SPEC, u8, CLKSEL_A, 2, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PCNT0 is not clocked"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(CLKSEL_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Clksel::Disabled) } #[doc = "EM23GRPACLK is clocking PCNT0"] #[inline(always)] - pub fn em23grpaclk(self) -> &'a mut W { - self.variant(CLKSEL_A::EM23GRPACLK) + pub fn em23grpaclk(self) -> &'a mut crate::W { + self.variant(Clksel::Em23grpaclk) } #[doc = "External pin PCNT_S0 is clocking PCNT0"] #[inline(always)] - pub fn pcnts0(self) -> &'a mut W { - self.variant(CLKSEL_A::PCNTS0) + pub fn pcnts0(self) -> &'a mut crate::W { + self.variant(Clksel::Pcnts0) } } impl R { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 3) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pcnt0clkctrl](index.html) module"] -pub struct PCNT0CLKCTRL_SPEC; -impl crate::RegisterSpec for PCNT0CLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pcnt0clkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcnt0clkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Pcnt0clkctrlSpec; +impl crate::RegisterSpec for Pcnt0clkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [pcnt0clkctrl::R](R) reader structure"] -impl crate::Readable for PCNT0CLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [pcnt0clkctrl::W](W) writer structure"] -impl crate::Writable for PCNT0CLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`pcnt0clkctrl::R`](R) reader structure"] +impl crate::Readable for Pcnt0clkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`pcnt0clkctrl::W`](W) writer structure"] +impl crate::Writable for Pcnt0clkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PCNT0CLKCTRL to value 0x01"] -impl crate::Resettable for PCNT0CLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for Pcnt0clkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/status.rs index 062cc62..14cb98d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/status.rs @@ -1,119 +1,104 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CALRDY` reader - Calibration Ready"] -pub type CALRDY_R = crate::BitReader; -#[doc = "Field `WDOGLOCK` reader - Configuration Lock Status for WDOG"] -pub type WDOGLOCK_R = crate::BitReader; +pub type CalrdyR = crate::BitReader; #[doc = "Configuration Lock Status for WDOG\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WDOGLOCK_A { +pub enum Wdoglock { #[doc = "0: WDOG configuration lock is unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: WDOG configuration lock is locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WDOGLOCK_A) -> Self { + fn from(variant: Wdoglock) -> Self { variant as u8 != 0 } } -impl WDOGLOCK_R { +#[doc = "Field `WDOGLOCK` reader - Configuration Lock Status for WDOG"] +pub type WdoglockR = crate::BitReader; +impl WdoglockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> WDOGLOCK_A { + pub const fn variant(&self) -> Wdoglock { match self.bits { - false => WDOGLOCK_A::UNLOCKED, - true => WDOGLOCK_A::LOCKED, + false => Wdoglock::Unlocked, + true => Wdoglock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "WDOG configuration lock is unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == WDOGLOCK_A::UNLOCKED + *self == Wdoglock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "WDOG configuration lock is locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == WDOGLOCK_A::LOCKED + *self == Wdoglock::Locked } } -#[doc = "Field `LOCK` reader - Configuration Lock Status"] -pub type LOCK_R = crate::BitReader; #[doc = "Configuration Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCK_A { +pub enum Lock { #[doc = "0: Configuration lock is unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: Configuration lock is locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCK_A) -> Self { + fn from(variant: Lock) -> Self { variant as u8 != 0 } } -impl LOCK_R { +#[doc = "Field `LOCK` reader - Configuration Lock Status"] +pub type LockR = crate::BitReader; +impl LockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCK_A { + pub const fn variant(&self) -> Lock { match self.bits { - false => LOCK_A::UNLOCKED, - true => LOCK_A::LOCKED, + false => Lock::Unlocked, + true => Lock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "Configuration lock is unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCK_A::UNLOCKED + *self == Lock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "Configuration lock is locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCK_A::LOCKED + *self == Lock::Locked } } impl R { #[doc = "Bit 0 - Calibration Ready"] #[inline(always)] - pub fn calrdy(&self) -> CALRDY_R { - CALRDY_R::new((self.bits & 1) != 0) + pub fn calrdy(&self) -> CalrdyR { + CalrdyR::new((self.bits & 1) != 0) } #[doc = "Bit 30 - Configuration Lock Status for WDOG"] #[inline(always)] - pub fn wdoglock(&self) -> WDOGLOCK_R { - WDOGLOCK_R::new(((self.bits >> 30) & 1) != 0) + pub fn wdoglock(&self) -> WdoglockR { + WdoglockR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Configuration Lock Status"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new(((self.bits >> 31) & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/sysclkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/sysclkctrl.rs index 62090ae..ee4ee7a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/sysclkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/sysclkctrl.rs @@ -1,319 +1,296 @@ #[doc = "Register `SYSCLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SYSCLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "1: FSRCO is clocking SYSCLK"] - FSRCO = 1, + Fsrco = 1, #[doc = "2: HFRCODPLL is clocking SYSCLK"] - HFRCODPLL = 2, + Hfrcodpll = 2, #[doc = "3: HFXO is clocking SYSCLK"] - HFXO = 3, + Hfxo = 3, #[doc = "4: CLKIN0 is clocking SYSCLK"] - CLKIN0 = 4, + Clkin0 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(CLKSEL_A::FSRCO), - 2 => Some(CLKSEL_A::HFRCODPLL), - 3 => Some(CLKSEL_A::HFXO), - 4 => Some(CLKSEL_A::CLKIN0), + 1 => Some(Clksel::Fsrco), + 2 => Some(Clksel::Hfrcodpll), + 3 => Some(Clksel::Hfxo), + 4 => Some(Clksel::Clkin0), _ => None, } } - #[doc = "Checks if the value of the field is `FSRCO`"] + #[doc = "FSRCO is clocking SYSCLK"] #[inline(always)] pub fn is_fsrco(&self) -> bool { - *self == CLKSEL_A::FSRCO + *self == Clksel::Fsrco } - #[doc = "Checks if the value of the field is `HFRCODPLL`"] + #[doc = "HFRCODPLL is clocking SYSCLK"] #[inline(always)] pub fn is_hfrcodpll(&self) -> bool { - *self == CLKSEL_A::HFRCODPLL + *self == Clksel::Hfrcodpll } - #[doc = "Checks if the value of the field is `HFXO`"] + #[doc = "HFXO is clocking SYSCLK"] #[inline(always)] pub fn is_hfxo(&self) -> bool { - *self == CLKSEL_A::HFXO + *self == Clksel::Hfxo } - #[doc = "Checks if the value of the field is `CLKIN0`"] + #[doc = "CLKIN0 is clocking SYSCLK"] #[inline(always)] pub fn is_clkin0(&self) -> bool { - *self == CLKSEL_A::CLKIN0 + *self == Clksel::Clkin0 } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYSCLKCTRL_SPEC, u8, CLKSEL_A, 3, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "FSRCO is clocking SYSCLK"] #[inline(always)] - pub fn fsrco(self) -> &'a mut W { - self.variant(CLKSEL_A::FSRCO) + pub fn fsrco(self) -> &'a mut crate::W { + self.variant(Clksel::Fsrco) } #[doc = "HFRCODPLL is clocking SYSCLK"] #[inline(always)] - pub fn hfrcodpll(self) -> &'a mut W { - self.variant(CLKSEL_A::HFRCODPLL) + pub fn hfrcodpll(self) -> &'a mut crate::W { + self.variant(Clksel::Hfrcodpll) } #[doc = "HFXO is clocking SYSCLK"] #[inline(always)] - pub fn hfxo(self) -> &'a mut W { - self.variant(CLKSEL_A::HFXO) + pub fn hfxo(self) -> &'a mut crate::W { + self.variant(Clksel::Hfxo) } #[doc = "CLKIN0 is clocking SYSCLK"] #[inline(always)] - pub fn clkin0(self) -> &'a mut W { - self.variant(CLKSEL_A::CLKIN0) + pub fn clkin0(self) -> &'a mut crate::W { + self.variant(Clksel::Clkin0) } } -#[doc = "Field `PCLKPRESC` reader - PCLK Prescaler"] -pub type PCLKPRESC_R = crate::BitReader; #[doc = "PCLK Prescaler\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PCLKPRESC_A { +pub enum Pclkpresc { #[doc = "0: PCLK is HCLK divided by 1"] - DIV1 = 0, + Div1 = 0, #[doc = "1: PCLK is HCLK divided by 2"] - DIV2 = 1, + Div2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PCLKPRESC_A) -> Self { + fn from(variant: Pclkpresc) -> Self { variant as u8 != 0 } } -impl PCLKPRESC_R { +#[doc = "Field `PCLKPRESC` reader - PCLK Prescaler"] +pub type PclkprescR = crate::BitReader; +impl PclkprescR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PCLKPRESC_A { + pub const fn variant(&self) -> Pclkpresc { match self.bits { - false => PCLKPRESC_A::DIV1, - true => PCLKPRESC_A::DIV2, + false => Pclkpresc::Div1, + true => Pclkpresc::Div2, } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "PCLK is HCLK divided by 1"] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == PCLKPRESC_A::DIV1 + *self == Pclkpresc::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "PCLK is HCLK divided by 2"] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == PCLKPRESC_A::DIV2 + *self == Pclkpresc::Div2 } } #[doc = "Field `PCLKPRESC` writer - PCLK Prescaler"] -pub type PCLKPRESC_W<'a, const O: u8> = crate::BitWriter<'a, u32, SYSCLKCTRL_SPEC, PCLKPRESC_A, O>; -impl<'a, const O: u8> PCLKPRESC_W<'a, O> { +pub type PclkprescW<'a, REG> = crate::BitWriter<'a, REG, Pclkpresc>; +impl<'a, REG> PclkprescW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "PCLK is HCLK divided by 1"] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(PCLKPRESC_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Pclkpresc::Div1) } #[doc = "PCLK is HCLK divided by 2"] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(PCLKPRESC_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Pclkpresc::Div2) } } -#[doc = "Field `HCLKPRESC` reader - HCLK Prescaler"] -pub type HCLKPRESC_R = crate::FieldReader; #[doc = "HCLK Prescaler\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HCLKPRESC_A { +pub enum Hclkpresc { #[doc = "0: HCLK is SYSCLK divided by 1"] - DIV1 = 0, + Div1 = 0, #[doc = "1: HCLK is SYSCLK divided by 2"] - DIV2 = 1, + Div2 = 1, #[doc = "3: HCLK is SYSCLK divided by 4"] - DIV4 = 3, + Div4 = 3, #[doc = "7: HCLK is SYSCLK divided by 8"] - DIV8 = 7, + Div8 = 7, #[doc = "15: HCLK is SYSCLK divided by 16"] - DIV16 = 15, + Div16 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HCLKPRESC_A) -> Self { + fn from(variant: Hclkpresc) -> Self { variant as _ } } -impl HCLKPRESC_R { +impl crate::FieldSpec for Hclkpresc { + type Ux = u8; +} +impl crate::IsEnum for Hclkpresc {} +#[doc = "Field `HCLKPRESC` reader - HCLK Prescaler"] +pub type HclkprescR = crate::FieldReader; +impl HclkprescR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HCLKPRESC_A::DIV1), - 1 => Some(HCLKPRESC_A::DIV2), - 3 => Some(HCLKPRESC_A::DIV4), - 7 => Some(HCLKPRESC_A::DIV8), - 15 => Some(HCLKPRESC_A::DIV16), + 0 => Some(Hclkpresc::Div1), + 1 => Some(Hclkpresc::Div2), + 3 => Some(Hclkpresc::Div4), + 7 => Some(Hclkpresc::Div8), + 15 => Some(Hclkpresc::Div16), _ => None, } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "HCLK is SYSCLK divided by 1"] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == HCLKPRESC_A::DIV1 + *self == Hclkpresc::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "HCLK is SYSCLK divided by 2"] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == HCLKPRESC_A::DIV2 + *self == Hclkpresc::Div2 } - #[doc = "Checks if the value of the field is `DIV4`"] + #[doc = "HCLK is SYSCLK divided by 4"] #[inline(always)] pub fn is_div4(&self) -> bool { - *self == HCLKPRESC_A::DIV4 + *self == Hclkpresc::Div4 } - #[doc = "Checks if the value of the field is `DIV8`"] + #[doc = "HCLK is SYSCLK divided by 8"] #[inline(always)] pub fn is_div8(&self) -> bool { - *self == HCLKPRESC_A::DIV8 + *self == Hclkpresc::Div8 } - #[doc = "Checks if the value of the field is `DIV16`"] + #[doc = "HCLK is SYSCLK divided by 16"] #[inline(always)] pub fn is_div16(&self) -> bool { - *self == HCLKPRESC_A::DIV16 + *self == Hclkpresc::Div16 } } #[doc = "Field `HCLKPRESC` writer - HCLK Prescaler"] -pub type HCLKPRESC_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYSCLKCTRL_SPEC, u8, HCLKPRESC_A, 4, O>; -impl<'a, const O: u8> HCLKPRESC_W<'a, O> { +pub type HclkprescW<'a, REG> = crate::FieldWriter<'a, REG, 4, Hclkpresc>; +impl<'a, REG> HclkprescW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "HCLK is SYSCLK divided by 1"] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(HCLKPRESC_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Hclkpresc::Div1) } #[doc = "HCLK is SYSCLK divided by 2"] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(HCLKPRESC_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Hclkpresc::Div2) } #[doc = "HCLK is SYSCLK divided by 4"] #[inline(always)] - pub fn div4(self) -> &'a mut W { - self.variant(HCLKPRESC_A::DIV4) + pub fn div4(self) -> &'a mut crate::W { + self.variant(Hclkpresc::Div4) } #[doc = "HCLK is SYSCLK divided by 8"] #[inline(always)] - pub fn div8(self) -> &'a mut W { - self.variant(HCLKPRESC_A::DIV8) + pub fn div8(self) -> &'a mut crate::W { + self.variant(Hclkpresc::Div8) } #[doc = "HCLK is SYSCLK divided by 16"] #[inline(always)] - pub fn div16(self) -> &'a mut W { - self.variant(HCLKPRESC_A::DIV16) + pub fn div16(self) -> &'a mut crate::W { + self.variant(Hclkpresc::Div16) } } impl R { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 7) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 7) as u8) } #[doc = "Bit 10 - PCLK Prescaler"] #[inline(always)] - pub fn pclkpresc(&self) -> PCLKPRESC_R { - PCLKPRESC_R::new(((self.bits >> 10) & 1) != 0) + pub fn pclkpresc(&self) -> PclkprescR { + PclkprescR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bits 12:15 - HCLK Prescaler"] #[inline(always)] - pub fn hclkpresc(&self) -> HCLKPRESC_R { - HCLKPRESC_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn hclkpresc(&self) -> HclkprescR { + HclkprescR::new(((self.bits >> 12) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } #[doc = "Bit 10 - PCLK Prescaler"] #[inline(always)] #[must_use] - pub fn pclkpresc(&mut self) -> PCLKPRESC_W<10> { - PCLKPRESC_W::new(self) + pub fn pclkpresc(&mut self) -> PclkprescW { + PclkprescW::new(self, 10) } #[doc = "Bits 12:15 - HCLK Prescaler"] #[inline(always)] #[must_use] - pub fn hclkpresc(&mut self) -> HCLKPRESC_W<12> { - HCLKPRESC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn hclkpresc(&mut self) -> HclkprescW { + HclkprescW::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysclkctrl](index.html) module"] -pub struct SYSCLKCTRL_SPEC; -impl crate::RegisterSpec for SYSCLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sysclkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sysclkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SysclkctrlSpec; +impl crate::RegisterSpec for SysclkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [sysclkctrl::R](R) reader structure"] -impl crate::Readable for SYSCLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sysclkctrl::W](W) writer structure"] -impl crate::Writable for SYSCLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`sysclkctrl::R`](R) reader structure"] +impl crate::Readable for SysclkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`sysclkctrl::W`](W) writer structure"] +impl crate::Writable for SysclkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYSCLKCTRL to value 0x01"] -impl crate::Resettable for SYSCLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for SysclkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/sysrtc0clkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/sysrtc0clkctrl.rs index 5b99711..64d6b6e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/sysrtc0clkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/sysrtc0clkctrl.rs @@ -1,142 +1,109 @@ #[doc = "Register `SYSRTC0CLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SYSRTC0CLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "1: LFRCO is clocking SYSRTC0CLK"] - LFRCO = 1, + Lfrco = 1, #[doc = "2: LFXO is clocking SYSRTC0CLK"] - LFXO = 2, + Lfxo = 2, #[doc = "3: ULFRCO is clocking SYSRTC0CLK"] - ULFRCO = 3, + Ulfrco = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(CLKSEL_A::LFRCO), - 2 => Some(CLKSEL_A::LFXO), - 3 => Some(CLKSEL_A::ULFRCO), + 1 => Some(Clksel::Lfrco), + 2 => Some(Clksel::Lfxo), + 3 => Some(Clksel::Ulfrco), _ => None, } } - #[doc = "Checks if the value of the field is `LFRCO`"] + #[doc = "LFRCO is clocking SYSRTC0CLK"] #[inline(always)] pub fn is_lfrco(&self) -> bool { - *self == CLKSEL_A::LFRCO + *self == Clksel::Lfrco } - #[doc = "Checks if the value of the field is `LFXO`"] + #[doc = "LFXO is clocking SYSRTC0CLK"] #[inline(always)] pub fn is_lfxo(&self) -> bool { - *self == CLKSEL_A::LFXO + *self == Clksel::Lfxo } - #[doc = "Checks if the value of the field is `ULFRCO`"] + #[doc = "ULFRCO is clocking SYSRTC0CLK"] #[inline(always)] pub fn is_ulfrco(&self) -> bool { - *self == CLKSEL_A::ULFRCO + *self == Clksel::Ulfrco } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYSRTC0CLKCTRL_SPEC, u8, CLKSEL_A, 2, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "LFRCO is clocking SYSRTC0CLK"] #[inline(always)] - pub fn lfrco(self) -> &'a mut W { - self.variant(CLKSEL_A::LFRCO) + pub fn lfrco(self) -> &'a mut crate::W { + self.variant(Clksel::Lfrco) } #[doc = "LFXO is clocking SYSRTC0CLK"] #[inline(always)] - pub fn lfxo(self) -> &'a mut W { - self.variant(CLKSEL_A::LFXO) + pub fn lfxo(self) -> &'a mut crate::W { + self.variant(Clksel::Lfxo) } #[doc = "ULFRCO is clocking SYSRTC0CLK"] #[inline(always)] - pub fn ulfrco(self) -> &'a mut W { - self.variant(CLKSEL_A::ULFRCO) + pub fn ulfrco(self) -> &'a mut crate::W { + self.variant(Clksel::Ulfrco) } } impl R { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 3) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysrtc0clkctrl](index.html) module"] -pub struct SYSRTC0CLKCTRL_SPEC; -impl crate::RegisterSpec for SYSRTC0CLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sysrtc0clkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sysrtc0clkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Sysrtc0clkctrlSpec; +impl crate::RegisterSpec for Sysrtc0clkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [sysrtc0clkctrl::R](R) reader structure"] -impl crate::Readable for SYSRTC0CLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sysrtc0clkctrl::W](W) writer structure"] -impl crate::Writable for SYSRTC0CLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`sysrtc0clkctrl::R`](R) reader structure"] +impl crate::Readable for Sysrtc0clkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`sysrtc0clkctrl::W`](W) writer structure"] +impl crate::Writable for Sysrtc0clkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYSRTC0CLKCTRL to value 0x01"] -impl crate::Resettable for SYSRTC0CLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for Sysrtc0clkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/traceclkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/traceclkctrl.rs index 5a26e23..0c711fa 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/traceclkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/traceclkctrl.rs @@ -1,142 +1,109 @@ #[doc = "Register `TRACECLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TRACECLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `PRESC` reader - TRACECLK Prescaler"] -pub type PRESC_R = crate::FieldReader; +pub type W = crate::W; #[doc = "TRACECLK Prescaler\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PRESC_A { +pub enum Presc { #[doc = "0: TRACECLK is SYSCLK divided by 1"] - DIV1 = 0, + Div1 = 0, #[doc = "1: TRACECLK is SYSCLK divided by 2"] - DIV2 = 1, + Div2 = 1, #[doc = "3: TRACECLK is SYSCLK divided by 4"] - DIV4 = 3, + Div4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PRESC_A) -> Self { + fn from(variant: Presc) -> Self { variant as _ } } -impl PRESC_R { +impl crate::FieldSpec for Presc { + type Ux = u8; +} +impl crate::IsEnum for Presc {} +#[doc = "Field `PRESC` reader - TRACECLK Prescaler"] +pub type PrescR = crate::FieldReader; +impl PrescR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PRESC_A::DIV1), - 1 => Some(PRESC_A::DIV2), - 3 => Some(PRESC_A::DIV4), + 0 => Some(Presc::Div1), + 1 => Some(Presc::Div2), + 3 => Some(Presc::Div4), _ => None, } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "TRACECLK is SYSCLK divided by 1"] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == PRESC_A::DIV1 + *self == Presc::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "TRACECLK is SYSCLK divided by 2"] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == PRESC_A::DIV2 + *self == Presc::Div2 } - #[doc = "Checks if the value of the field is `DIV4`"] + #[doc = "TRACECLK is SYSCLK divided by 4"] #[inline(always)] pub fn is_div4(&self) -> bool { - *self == PRESC_A::DIV4 + *self == Presc::Div4 } } #[doc = "Field `PRESC` writer - TRACECLK Prescaler"] -pub type PRESC_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TRACECLKCTRL_SPEC, u8, PRESC_A, 2, O>; -impl<'a, const O: u8> PRESC_W<'a, O> { +pub type PrescW<'a, REG> = crate::FieldWriter<'a, REG, 2, Presc>; +impl<'a, REG> PrescW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TRACECLK is SYSCLK divided by 1"] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(PRESC_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Presc::Div1) } #[doc = "TRACECLK is SYSCLK divided by 2"] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(PRESC_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Presc::Div2) } #[doc = "TRACECLK is SYSCLK divided by 4"] #[inline(always)] - pub fn div4(self) -> &'a mut W { - self.variant(PRESC_A::DIV4) + pub fn div4(self) -> &'a mut crate::W { + self.variant(Presc::Div4) } } impl R { #[doc = "Bits 4:5 - TRACECLK Prescaler"] #[inline(always)] - pub fn presc(&self) -> PRESC_R { - PRESC_R::new(((self.bits >> 4) & 3) as u8) + pub fn presc(&self) -> PrescR { + PrescR::new(((self.bits >> 4) & 3) as u8) } } impl W { #[doc = "Bits 4:5 - TRACECLK Prescaler"] #[inline(always)] #[must_use] - pub fn presc(&mut self) -> PRESC_W<4> { - PRESC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn presc(&mut self) -> PrescW { + PrescW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [traceclkctrl](index.html) module"] -pub struct TRACECLKCTRL_SPEC; -impl crate::RegisterSpec for TRACECLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`traceclkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`traceclkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TraceclkctrlSpec; +impl crate::RegisterSpec for TraceclkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [traceclkctrl::R](R) reader structure"] -impl crate::Readable for TRACECLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [traceclkctrl::W](W) writer structure"] -impl crate::Writable for TRACECLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`traceclkctrl::R`](R) reader structure"] +impl crate::Readable for TraceclkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`traceclkctrl::W`](W) writer structure"] +impl crate::Writable for TraceclkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TRACECLKCTRL to value 0"] -impl crate::Resettable for TRACECLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TraceclkctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/vdac0clkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/vdac0clkctrl.rs index 6113a5a..361855e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/vdac0clkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/vdac0clkctrl.rs @@ -1,168 +1,135 @@ #[doc = "Register `VDAC0CLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `VDAC0CLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "0: VDAC is not clocked"] - DISABLED = 0, + Disabled = 0, #[doc = "1: EM01GRPACLK is clocking VDAC"] - EM01GRPACLK = 1, + Em01grpaclk = 1, #[doc = "2: EM23GRPACLK is clocking VDAC"] - EM23GRPACLK = 2, + Em23grpaclk = 2, #[doc = "3: FSRCO is clocking VDAC"] - FSRCO = 3, + Fsrco = 3, #[doc = "4: HFRCOEM23 is clocking VDAC"] - HFRCOEM23 = 4, + Hfrcoem23 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKSEL_A::DISABLED), - 1 => Some(CLKSEL_A::EM01GRPACLK), - 2 => Some(CLKSEL_A::EM23GRPACLK), - 3 => Some(CLKSEL_A::FSRCO), - 4 => Some(CLKSEL_A::HFRCOEM23), + 0 => Some(Clksel::Disabled), + 1 => Some(Clksel::Em01grpaclk), + 2 => Some(Clksel::Em23grpaclk), + 3 => Some(Clksel::Fsrco), + 4 => Some(Clksel::Hfrcoem23), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "VDAC is not clocked"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == CLKSEL_A::DISABLED + *self == Clksel::Disabled } - #[doc = "Checks if the value of the field is `EM01GRPACLK`"] + #[doc = "EM01GRPACLK is clocking VDAC"] #[inline(always)] pub fn is_em01grpaclk(&self) -> bool { - *self == CLKSEL_A::EM01GRPACLK + *self == Clksel::Em01grpaclk } - #[doc = "Checks if the value of the field is `EM23GRPACLK`"] + #[doc = "EM23GRPACLK is clocking VDAC"] #[inline(always)] pub fn is_em23grpaclk(&self) -> bool { - *self == CLKSEL_A::EM23GRPACLK + *self == Clksel::Em23grpaclk } - #[doc = "Checks if the value of the field is `FSRCO`"] + #[doc = "FSRCO is clocking VDAC"] #[inline(always)] pub fn is_fsrco(&self) -> bool { - *self == CLKSEL_A::FSRCO + *self == Clksel::Fsrco } - #[doc = "Checks if the value of the field is `HFRCOEM23`"] + #[doc = "HFRCOEM23 is clocking VDAC"] #[inline(always)] pub fn is_hfrcoem23(&self) -> bool { - *self == CLKSEL_A::HFRCOEM23 + *self == Clksel::Hfrcoem23 } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, VDAC0CLKCTRL_SPEC, u8, CLKSEL_A, 3, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "VDAC is not clocked"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(CLKSEL_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Clksel::Disabled) } #[doc = "EM01GRPACLK is clocking VDAC"] #[inline(always)] - pub fn em01grpaclk(self) -> &'a mut W { - self.variant(CLKSEL_A::EM01GRPACLK) + pub fn em01grpaclk(self) -> &'a mut crate::W { + self.variant(Clksel::Em01grpaclk) } #[doc = "EM23GRPACLK is clocking VDAC"] #[inline(always)] - pub fn em23grpaclk(self) -> &'a mut W { - self.variant(CLKSEL_A::EM23GRPACLK) + pub fn em23grpaclk(self) -> &'a mut crate::W { + self.variant(Clksel::Em23grpaclk) } #[doc = "FSRCO is clocking VDAC"] #[inline(always)] - pub fn fsrco(self) -> &'a mut W { - self.variant(CLKSEL_A::FSRCO) + pub fn fsrco(self) -> &'a mut crate::W { + self.variant(Clksel::Fsrco) } #[doc = "HFRCOEM23 is clocking VDAC"] #[inline(always)] - pub fn hfrcoem23(self) -> &'a mut W { - self.variant(CLKSEL_A::HFRCOEM23) + pub fn hfrcoem23(self) -> &'a mut crate::W { + self.variant(Clksel::Hfrcoem23) } } impl R { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 7) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [vdac0clkctrl](index.html) module"] -pub struct VDAC0CLKCTRL_SPEC; -impl crate::RegisterSpec for VDAC0CLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`vdac0clkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`vdac0clkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Vdac0clkctrlSpec; +impl crate::RegisterSpec for Vdac0clkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [vdac0clkctrl::R](R) reader structure"] -impl crate::Readable for VDAC0CLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [vdac0clkctrl::W](W) writer structure"] -impl crate::Writable for VDAC0CLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`vdac0clkctrl::R`](R) reader structure"] +impl crate::Readable for Vdac0clkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`vdac0clkctrl::W`](W) writer structure"] +impl crate::Writable for Vdac0clkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets VDAC0CLKCTRL to value 0x01"] -impl crate::Resettable for VDAC0CLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for Vdac0clkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/wdog0clkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/wdog0clkctrl.rs index 463d231..1bf0cbd 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/wdog0clkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/wdog0clkctrl.rs @@ -1,155 +1,122 @@ #[doc = "Register `WDOG0CLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `WDOG0CLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "1: LFRCO is clocking WDOG0CLK"] - LFRCO = 1, + Lfrco = 1, #[doc = "2: LFXO is clocking WDOG0CLK"] - LFXO = 2, + Lfxo = 2, #[doc = "3: ULFRCO is clocking WDOG0CLK"] - ULFRCO = 3, + Ulfrco = 3, #[doc = "4: HCLKDIV1024 is clocking WDOG0CLK"] - HCLKDIV1024 = 4, + Hclkdiv1024 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(CLKSEL_A::LFRCO), - 2 => Some(CLKSEL_A::LFXO), - 3 => Some(CLKSEL_A::ULFRCO), - 4 => Some(CLKSEL_A::HCLKDIV1024), + 1 => Some(Clksel::Lfrco), + 2 => Some(Clksel::Lfxo), + 3 => Some(Clksel::Ulfrco), + 4 => Some(Clksel::Hclkdiv1024), _ => None, } } - #[doc = "Checks if the value of the field is `LFRCO`"] + #[doc = "LFRCO is clocking WDOG0CLK"] #[inline(always)] pub fn is_lfrco(&self) -> bool { - *self == CLKSEL_A::LFRCO + *self == Clksel::Lfrco } - #[doc = "Checks if the value of the field is `LFXO`"] + #[doc = "LFXO is clocking WDOG0CLK"] #[inline(always)] pub fn is_lfxo(&self) -> bool { - *self == CLKSEL_A::LFXO + *self == Clksel::Lfxo } - #[doc = "Checks if the value of the field is `ULFRCO`"] + #[doc = "ULFRCO is clocking WDOG0CLK"] #[inline(always)] pub fn is_ulfrco(&self) -> bool { - *self == CLKSEL_A::ULFRCO + *self == Clksel::Ulfrco } - #[doc = "Checks if the value of the field is `HCLKDIV1024`"] + #[doc = "HCLKDIV1024 is clocking WDOG0CLK"] #[inline(always)] pub fn is_hclkdiv1024(&self) -> bool { - *self == CLKSEL_A::HCLKDIV1024 + *self == Clksel::Hclkdiv1024 } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, WDOG0CLKCTRL_SPEC, u8, CLKSEL_A, 3, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "LFRCO is clocking WDOG0CLK"] #[inline(always)] - pub fn lfrco(self) -> &'a mut W { - self.variant(CLKSEL_A::LFRCO) + pub fn lfrco(self) -> &'a mut crate::W { + self.variant(Clksel::Lfrco) } #[doc = "LFXO is clocking WDOG0CLK"] #[inline(always)] - pub fn lfxo(self) -> &'a mut W { - self.variant(CLKSEL_A::LFXO) + pub fn lfxo(self) -> &'a mut crate::W { + self.variant(Clksel::Lfxo) } #[doc = "ULFRCO is clocking WDOG0CLK"] #[inline(always)] - pub fn ulfrco(self) -> &'a mut W { - self.variant(CLKSEL_A::ULFRCO) + pub fn ulfrco(self) -> &'a mut crate::W { + self.variant(Clksel::Ulfrco) } #[doc = "HCLKDIV1024 is clocking WDOG0CLK"] #[inline(always)] - pub fn hclkdiv1024(self) -> &'a mut W { - self.variant(CLKSEL_A::HCLKDIV1024) + pub fn hclkdiv1024(self) -> &'a mut crate::W { + self.variant(Clksel::Hclkdiv1024) } } impl R { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 7) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdog0clkctrl](index.html) module"] -pub struct WDOG0CLKCTRL_SPEC; -impl crate::RegisterSpec for WDOG0CLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`wdog0clkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdog0clkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Wdog0clkctrlSpec; +impl crate::RegisterSpec for Wdog0clkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [wdog0clkctrl::R](R) reader structure"] -impl crate::Readable for WDOG0CLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [wdog0clkctrl::W](W) writer structure"] -impl crate::Writable for WDOG0CLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`wdog0clkctrl::R`](R) reader structure"] +impl crate::Readable for Wdog0clkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`wdog0clkctrl::W`](W) writer structure"] +impl crate::Writable for Wdog0clkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WDOG0CLKCTRL to value 0x01"] -impl crate::Resettable for WDOG0CLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for Wdog0clkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/wdog1clkctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/wdog1clkctrl.rs index 8124868..bd596e7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/wdog1clkctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/wdog1clkctrl.rs @@ -1,155 +1,122 @@ #[doc = "Register `WDOG1CLKCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `WDOG1CLKCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLKSEL` reader - Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "1: LFRCO is clocking WDOG0CLK"] - LFRCO = 1, + Lfrco = 1, #[doc = "2: LFXO is clocking WDOG0CLK"] - LFXO = 2, + Lfxo = 2, #[doc = "3: ULFRCO is clocking WDOG0CLK"] - ULFRCO = 3, + Ulfrco = 3, #[doc = "4: HCLKDIV1024 is clocking WDOG0CLK"] - HCLKDIV1024 = 4, + Hclkdiv1024 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(CLKSEL_A::LFRCO), - 2 => Some(CLKSEL_A::LFXO), - 3 => Some(CLKSEL_A::ULFRCO), - 4 => Some(CLKSEL_A::HCLKDIV1024), + 1 => Some(Clksel::Lfrco), + 2 => Some(Clksel::Lfxo), + 3 => Some(Clksel::Ulfrco), + 4 => Some(Clksel::Hclkdiv1024), _ => None, } } - #[doc = "Checks if the value of the field is `LFRCO`"] + #[doc = "LFRCO is clocking WDOG0CLK"] #[inline(always)] pub fn is_lfrco(&self) -> bool { - *self == CLKSEL_A::LFRCO + *self == Clksel::Lfrco } - #[doc = "Checks if the value of the field is `LFXO`"] + #[doc = "LFXO is clocking WDOG0CLK"] #[inline(always)] pub fn is_lfxo(&self) -> bool { - *self == CLKSEL_A::LFXO + *self == Clksel::Lfxo } - #[doc = "Checks if the value of the field is `ULFRCO`"] + #[doc = "ULFRCO is clocking WDOG0CLK"] #[inline(always)] pub fn is_ulfrco(&self) -> bool { - *self == CLKSEL_A::ULFRCO + *self == Clksel::Ulfrco } - #[doc = "Checks if the value of the field is `HCLKDIV1024`"] + #[doc = "HCLKDIV1024 is clocking WDOG0CLK"] #[inline(always)] pub fn is_hclkdiv1024(&self) -> bool { - *self == CLKSEL_A::HCLKDIV1024 + *self == Clksel::Hclkdiv1024 } } #[doc = "Field `CLKSEL` writer - Clock Select"] -pub type CLKSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, WDOG1CLKCTRL_SPEC, u8, CLKSEL_A, 3, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "LFRCO is clocking WDOG0CLK"] #[inline(always)] - pub fn lfrco(self) -> &'a mut W { - self.variant(CLKSEL_A::LFRCO) + pub fn lfrco(self) -> &'a mut crate::W { + self.variant(Clksel::Lfrco) } #[doc = "LFXO is clocking WDOG0CLK"] #[inline(always)] - pub fn lfxo(self) -> &'a mut W { - self.variant(CLKSEL_A::LFXO) + pub fn lfxo(self) -> &'a mut crate::W { + self.variant(Clksel::Lfxo) } #[doc = "ULFRCO is clocking WDOG0CLK"] #[inline(always)] - pub fn ulfrco(self) -> &'a mut W { - self.variant(CLKSEL_A::ULFRCO) + pub fn ulfrco(self) -> &'a mut crate::W { + self.variant(Clksel::Ulfrco) } #[doc = "HCLKDIV1024 is clocking WDOG0CLK"] #[inline(always)] - pub fn hclkdiv1024(self) -> &'a mut W { - self.variant(CLKSEL_A::HCLKDIV1024) + pub fn hclkdiv1024(self) -> &'a mut crate::W { + self.variant(Clksel::Hclkdiv1024) } } impl R { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 7) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<0> { - CLKSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdog1clkctrl](index.html) module"] -pub struct WDOG1CLKCTRL_SPEC; -impl crate::RegisterSpec for WDOG1CLKCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`wdog1clkctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdog1clkctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Wdog1clkctrlSpec; +impl crate::RegisterSpec for Wdog1clkctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [wdog1clkctrl::R](R) reader structure"] -impl crate::Readable for WDOG1CLKCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [wdog1clkctrl::W](W) writer structure"] -impl crate::Writable for WDOG1CLKCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`wdog1clkctrl::R`](R) reader structure"] +impl crate::Readable for Wdog1clkctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`wdog1clkctrl::W`](W) writer structure"] +impl crate::Writable for Wdog1clkctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WDOG1CLKCTRL to value 0x01"] -impl crate::Resettable for WDOG1CLKCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for Wdog1clkctrlSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/wdoglock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/wdoglock.rs index cd28d57..f47304f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/wdoglock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/cmu_s/wdoglock.rs @@ -1,73 +1,55 @@ #[doc = "Register `WDOGLOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Configuration Lock Key\n\nValue on reset: 21079"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "37879: Write this value to unlock"] - UNLOCK = 37879, + Unlock = 37879, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Configuration Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, WDOGLOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write this value to unlock"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Configuration Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdoglock](index.html) module"] -pub struct WDOGLOCK_SPEC; -impl crate::RegisterSpec for WDOGLOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdoglock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct WdoglockSpec; +impl crate::RegisterSpec for WdoglockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [wdoglock::W](W) writer structure"] -impl crate::Writable for WDOGLOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`wdoglock::W`](W) writer structure"] +impl crate::Writable for WdoglockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WDOGLOCK to value 0x5257"] -impl crate::Resettable for WDOGLOCK_SPEC { - const RESET_VALUE: Self::Ux = 0x5257; +impl crate::Resettable for WdoglockSpec { + const RESET_VALUE: u32 = 0x5257; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns.rs index 9eb7b39..6c0f3da 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns.rs @@ -1,74 +1,142 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + ctrl: Ctrl, + em01ctrl0: Em01ctrl0, + _reserved3: [u8; 0x04], + em23ctrl0: Em23ctrl0, + _reserved4: [u8; 0x0c], + pfmxctrl: Pfmxctrl, + _reserved5: [u8; 0x04], + if_: If, + ien: Ien, + status: Status, + syncbusy: Syncbusy, + _reserved9: [u8; 0x08], + lock: Lock, + lockstatus: Lockstatus, +} +impl RegisterBlock { #[doc = "0x00 - IPVERSION"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - Control"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x08 - EM01 Configurations"] - pub em01ctrl0: EM01CTRL0, - _reserved3: [u8; 0x04], + #[inline(always)] + pub const fn em01ctrl0(&self) -> &Em01ctrl0 { + &self.em01ctrl0 + } #[doc = "0x10 - EM23 Configurations"] - pub em23ctrl0: EM23CTRL0, - _reserved4: [u8; 0x0c], + #[inline(always)] + pub const fn em23ctrl0(&self) -> &Em23ctrl0 { + &self.em23ctrl0 + } #[doc = "0x20 - PFMX Control Register"] - pub pfmxctrl: PFMXCTRL, - _reserved5: [u8; 0x04], + #[inline(always)] + pub const fn pfmxctrl(&self) -> &Pfmxctrl { + &self.pfmxctrl + } #[doc = "0x28 - Interrupt Flags"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x2c - Interrupt Enable"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x30 - DCDC Status Register"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x34 - Syncbusy Status Register"] - pub syncbusy: SYNCBUSY, - _reserved9: [u8; 0x08], + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } #[doc = "0x40 - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x44 - No Description"] - pub lockstatus: LOCKSTATUS, + #[inline(always)] + pub const fn lockstatus(&self) -> &Lockstatus { + &self.lockstatus + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: IPVERSION\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "IPVERSION"] pub mod ipversion; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: Control\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "Control"] pub mod ctrl; -#[doc = "EM01CTRL0 (rw) register accessor: an alias for `Reg`"] -pub type EM01CTRL0 = crate::Reg; +#[doc = "EM01CTRL0 (rw) register accessor: EM01 Configurations\n\nYou can [`read`](crate::Reg::read) this register and get [`em01ctrl0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em01ctrl0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@em01ctrl0`] +module"] +#[doc(alias = "EM01CTRL0")] +pub type Em01ctrl0 = crate::Reg; #[doc = "EM01 Configurations"] pub mod em01ctrl0; -#[doc = "EM23CTRL0 (rw) register accessor: an alias for `Reg`"] -pub type EM23CTRL0 = crate::Reg; +#[doc = "EM23CTRL0 (rw) register accessor: EM23 Configurations\n\nYou can [`read`](crate::Reg::read) this register and get [`em23ctrl0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em23ctrl0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@em23ctrl0`] +module"] +#[doc(alias = "EM23CTRL0")] +pub type Em23ctrl0 = crate::Reg; #[doc = "EM23 Configurations"] pub mod em23ctrl0; -#[doc = "PFMXCTRL (rw) register accessor: an alias for `Reg`"] -pub type PFMXCTRL = crate::Reg; +#[doc = "PFMXCTRL (rw) register accessor: PFMX Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pfmxctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pfmxctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pfmxctrl`] +module"] +#[doc(alias = "PFMXCTRL")] +pub type Pfmxctrl = crate::Reg; #[doc = "PFMX Control Register"] pub mod pfmxctrl; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: Interrupt Flags\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "Interrupt Flags"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "Interrupt Enable"] pub mod ien; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: DCDC Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "DCDC Status Register"] pub mod status; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: Syncbusy Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "Syncbusy Status Register"] pub mod syncbusy; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "LOCKSTATUS (r) register accessor: an alias for `Reg`"] -pub type LOCKSTATUS = crate::Reg; +#[doc = "LOCKSTATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`lockstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lockstatus`] +module"] +#[doc(alias = "LOCKSTATUS")] +pub type Lockstatus = crate::Reg; #[doc = "No Description"] pub mod lockstatus; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/ctrl.rs index e6d8c72..9e269b9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/ctrl.rs @@ -1,141 +1,104 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - DCDC/Bypass Mode Control"] -pub type MODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "DCDC/Bypass Mode Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: DCDC is OFF, bypass switch is enabled"] - BYPASS = 0, + Bypass = 0, #[doc = "1: Request DCDC regulation, bypass switch disabled"] - DCDCREGULATION = 1, + Dcdcregulation = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as u8 != 0 } } -impl MODE_R { +#[doc = "Field `MODE` reader - DCDC/Bypass Mode Control"] +pub type ModeR = crate::BitReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - false => MODE_A::BYPASS, - true => MODE_A::DCDCREGULATION, + false => Mode::Bypass, + true => Mode::Dcdcregulation, } } - #[doc = "Checks if the value of the field is `BYPASS`"] + #[doc = "DCDC is OFF, bypass switch is enabled"] #[inline(always)] pub fn is_bypass(&self) -> bool { - *self == MODE_A::BYPASS + *self == Mode::Bypass } - #[doc = "Checks if the value of the field is `DCDCREGULATION`"] + #[doc = "Request DCDC regulation, bypass switch disabled"] #[inline(always)] pub fn is_dcdcregulation(&self) -> bool { - *self == MODE_A::DCDCREGULATION + *self == Mode::Dcdcregulation } } #[doc = "Field `MODE` writer - DCDC/Bypass Mode Control"] -pub type MODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, MODE_A, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::BitWriter<'a, REG, Mode>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "DCDC is OFF, bypass switch is enabled"] #[inline(always)] - pub fn bypass(self) -> &'a mut W { - self.variant(MODE_A::BYPASS) + pub fn bypass(self) -> &'a mut crate::W { + self.variant(Mode::Bypass) } #[doc = "Request DCDC regulation, bypass switch disabled"] #[inline(always)] - pub fn dcdcregulation(self) -> &'a mut W { - self.variant(MODE_A::DCDCREGULATION) + pub fn dcdcregulation(self) -> &'a mut crate::W { + self.variant(Mode::Dcdcregulation) } } #[doc = "Field `IPKTMAXCTRL` reader - Ton_max timeout control"] -pub type IPKTMAXCTRL_R = crate::FieldReader; +pub type IpktmaxctrlR = crate::FieldReader; #[doc = "Field `IPKTMAXCTRL` writer - Ton_max timeout control"] -pub type IPKTMAXCTRL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, u8, 5, O>; +pub type IpktmaxctrlW<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bit 0 - DCDC/Bypass Mode Control"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 1) != 0) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 1) != 0) } #[doc = "Bits 4:8 - Ton_max timeout control"] #[inline(always)] - pub fn ipktmaxctrl(&self) -> IPKTMAXCTRL_R { - IPKTMAXCTRL_R::new(((self.bits >> 4) & 0x1f) as u8) + pub fn ipktmaxctrl(&self) -> IpktmaxctrlR { + IpktmaxctrlR::new(((self.bits >> 4) & 0x1f) as u8) } } impl W { #[doc = "Bit 0 - DCDC/Bypass Mode Control"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bits 4:8 - Ton_max timeout control"] #[inline(always)] #[must_use] - pub fn ipktmaxctrl(&mut self) -> IPKTMAXCTRL_W<4> { - IPKTMAXCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ipktmaxctrl(&mut self) -> IpktmaxctrlW { + IpktmaxctrlW::new(self, 4) } } -#[doc = "Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "Control\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0x0100"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0100; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0x0100; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/em01ctrl0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/em01ctrl0.rs index 503526b..7177727 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/em01ctrl0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/em01ctrl0.rs @@ -1,284 +1,258 @@ #[doc = "Register `EM01CTRL0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EM01CTRL0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `IPKVAL` reader - EM01 Peak Current Setting"] -pub type IPKVAL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "EM01 Peak Current Setting\n\nValue on reset: 9"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum IPKVAL_A { +pub enum Ipkval { #[doc = "3: Ipeak = 90mA, Iload = 36mA"] - LOAD36M_A = 3, + Load36mA = 3, #[doc = "4: Ipeak = 100mA, Iload = 40mA"] - LOAD40M_A = 4, + Load40mA = 4, #[doc = "5: Ipeak = 110mA, Iload = 44mA"] - LOAD44M_A = 5, + Load44mA = 5, #[doc = "6: Ipeak = 120mA, Iload = 48mA"] - LOAD48M_A = 6, + Load48mA = 6, #[doc = "7: Ipeak = 130mA, Iload = 52mA"] - LOAD52M_A = 7, + Load52mA = 7, #[doc = "8: Ipeak = 140mA, Iload = 56mA"] - LOAD56M_A = 8, + Load56mA = 8, #[doc = "9: Ipeak = 150mA, Iload = 60mA"] - LOAD60M_A = 9, + Load60mA = 9, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: IPKVAL_A) -> Self { + fn from(variant: Ipkval) -> Self { variant as _ } } -impl IPKVAL_R { +impl crate::FieldSpec for Ipkval { + type Ux = u8; +} +impl crate::IsEnum for Ipkval {} +#[doc = "Field `IPKVAL` reader - EM01 Peak Current Setting"] +pub type IpkvalR = crate::FieldReader; +impl IpkvalR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 3 => Some(IPKVAL_A::LOAD36M_A), - 4 => Some(IPKVAL_A::LOAD40M_A), - 5 => Some(IPKVAL_A::LOAD44M_A), - 6 => Some(IPKVAL_A::LOAD48M_A), - 7 => Some(IPKVAL_A::LOAD52M_A), - 8 => Some(IPKVAL_A::LOAD56M_A), - 9 => Some(IPKVAL_A::LOAD60M_A), + 3 => Some(Ipkval::Load36mA), + 4 => Some(Ipkval::Load40mA), + 5 => Some(Ipkval::Load44mA), + 6 => Some(Ipkval::Load48mA), + 7 => Some(Ipkval::Load52mA), + 8 => Some(Ipkval::Load56mA), + 9 => Some(Ipkval::Load60mA), _ => None, } } - #[doc = "Checks if the value of the field is `LOAD36M_A`"] + #[doc = "Ipeak = 90mA, Iload = 36mA"] #[inline(always)] pub fn is_load36m_a(&self) -> bool { - *self == IPKVAL_A::LOAD36M_A + *self == Ipkval::Load36mA } - #[doc = "Checks if the value of the field is `LOAD40M_A`"] + #[doc = "Ipeak = 100mA, Iload = 40mA"] #[inline(always)] pub fn is_load40m_a(&self) -> bool { - *self == IPKVAL_A::LOAD40M_A + *self == Ipkval::Load40mA } - #[doc = "Checks if the value of the field is `LOAD44M_A`"] + #[doc = "Ipeak = 110mA, Iload = 44mA"] #[inline(always)] pub fn is_load44m_a(&self) -> bool { - *self == IPKVAL_A::LOAD44M_A + *self == Ipkval::Load44mA } - #[doc = "Checks if the value of the field is `LOAD48M_A`"] + #[doc = "Ipeak = 120mA, Iload = 48mA"] #[inline(always)] pub fn is_load48m_a(&self) -> bool { - *self == IPKVAL_A::LOAD48M_A + *self == Ipkval::Load48mA } - #[doc = "Checks if the value of the field is `LOAD52M_A`"] + #[doc = "Ipeak = 130mA, Iload = 52mA"] #[inline(always)] pub fn is_load52m_a(&self) -> bool { - *self == IPKVAL_A::LOAD52M_A + *self == Ipkval::Load52mA } - #[doc = "Checks if the value of the field is `LOAD56M_A`"] + #[doc = "Ipeak = 140mA, Iload = 56mA"] #[inline(always)] pub fn is_load56m_a(&self) -> bool { - *self == IPKVAL_A::LOAD56M_A + *self == Ipkval::Load56mA } - #[doc = "Checks if the value of the field is `LOAD60M_A`"] + #[doc = "Ipeak = 150mA, Iload = 60mA"] #[inline(always)] pub fn is_load60m_a(&self) -> bool { - *self == IPKVAL_A::LOAD60M_A + *self == Ipkval::Load60mA } } #[doc = "Field `IPKVAL` writer - EM01 Peak Current Setting"] -pub type IPKVAL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EM01CTRL0_SPEC, u8, IPKVAL_A, 4, O>; -impl<'a, const O: u8> IPKVAL_W<'a, O> { +pub type IpkvalW<'a, REG> = crate::FieldWriter<'a, REG, 4, Ipkval>; +impl<'a, REG> IpkvalW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ipeak = 90mA, Iload = 36mA"] #[inline(always)] - pub fn load36m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD36M_A) + pub fn load36m_a(self) -> &'a mut crate::W { + self.variant(Ipkval::Load36mA) } #[doc = "Ipeak = 100mA, Iload = 40mA"] #[inline(always)] - pub fn load40m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD40M_A) + pub fn load40m_a(self) -> &'a mut crate::W { + self.variant(Ipkval::Load40mA) } #[doc = "Ipeak = 110mA, Iload = 44mA"] #[inline(always)] - pub fn load44m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD44M_A) + pub fn load44m_a(self) -> &'a mut crate::W { + self.variant(Ipkval::Load44mA) } #[doc = "Ipeak = 120mA, Iload = 48mA"] #[inline(always)] - pub fn load48m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD48M_A) + pub fn load48m_a(self) -> &'a mut crate::W { + self.variant(Ipkval::Load48mA) } #[doc = "Ipeak = 130mA, Iload = 52mA"] #[inline(always)] - pub fn load52m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD52M_A) + pub fn load52m_a(self) -> &'a mut crate::W { + self.variant(Ipkval::Load52mA) } #[doc = "Ipeak = 140mA, Iload = 56mA"] #[inline(always)] - pub fn load56m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD56M_A) + pub fn load56m_a(self) -> &'a mut crate::W { + self.variant(Ipkval::Load56mA) } #[doc = "Ipeak = 150mA, Iload = 60mA"] #[inline(always)] - pub fn load60m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD60M_A) + pub fn load60m_a(self) -> &'a mut crate::W { + self.variant(Ipkval::Load60mA) } } -#[doc = "Field `DRVSPEED` reader - EM01 Drive Speed Setting"] -pub type DRVSPEED_R = crate::FieldReader; #[doc = "EM01 Drive Speed Setting\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DRVSPEED_A { - #[doc = "0: Lowest Efficiency, Lowest EMI.. Small decrease in efficiency from default setting"] - BEST_EMI = 0, - #[doc = "1: Default Efficiency, Acceptable EMI level"] - DEFAULT_SETTING = 1, - #[doc = "2: Small increase in efficiency from the default setting"] - INTERMEDIATE = 2, - #[doc = "3: Highest Efficiency, Highest EMI.. Small increase in efficiency from INTERMEDIATE setting"] - BEST_EFFICIENCY = 3, +pub enum Drvspeed { + #[doc = "0: Not recommended for use (no benefit to this setting)"] + BestEmi = 0, + #[doc = "1: Recommended for use for best efficiency and low EMI"] + DefaultSetting = 1, + #[doc = "2: Not recommended for use (no benefit to this setting)"] + Intermediate = 2, + #[doc = "3: Not recommended for use (no benefit to this setting)"] + BestEfficiency = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DRVSPEED_A) -> Self { + fn from(variant: Drvspeed) -> Self { variant as _ } } -impl DRVSPEED_R { +impl crate::FieldSpec for Drvspeed { + type Ux = u8; +} +impl crate::IsEnum for Drvspeed {} +#[doc = "Field `DRVSPEED` reader - EM01 Drive Speed Setting"] +pub type DrvspeedR = crate::FieldReader; +impl DrvspeedR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DRVSPEED_A { + pub const fn variant(&self) -> Drvspeed { match self.bits { - 0 => DRVSPEED_A::BEST_EMI, - 1 => DRVSPEED_A::DEFAULT_SETTING, - 2 => DRVSPEED_A::INTERMEDIATE, - 3 => DRVSPEED_A::BEST_EFFICIENCY, + 0 => Drvspeed::BestEmi, + 1 => Drvspeed::DefaultSetting, + 2 => Drvspeed::Intermediate, + 3 => Drvspeed::BestEfficiency, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `BEST_EMI`"] + #[doc = "Not recommended for use (no benefit to this setting)"] #[inline(always)] pub fn is_best_emi(&self) -> bool { - *self == DRVSPEED_A::BEST_EMI + *self == Drvspeed::BestEmi } - #[doc = "Checks if the value of the field is `DEFAULT_SETTING`"] + #[doc = "Recommended for use for best efficiency and low EMI"] #[inline(always)] pub fn is_default_setting(&self) -> bool { - *self == DRVSPEED_A::DEFAULT_SETTING + *self == Drvspeed::DefaultSetting } - #[doc = "Checks if the value of the field is `INTERMEDIATE`"] + #[doc = "Not recommended for use (no benefit to this setting)"] #[inline(always)] pub fn is_intermediate(&self) -> bool { - *self == DRVSPEED_A::INTERMEDIATE + *self == Drvspeed::Intermediate } - #[doc = "Checks if the value of the field is `BEST_EFFICIENCY`"] + #[doc = "Not recommended for use (no benefit to this setting)"] #[inline(always)] pub fn is_best_efficiency(&self) -> bool { - *self == DRVSPEED_A::BEST_EFFICIENCY + *self == Drvspeed::BestEfficiency } } #[doc = "Field `DRVSPEED` writer - EM01 Drive Speed Setting"] -pub type DRVSPEED_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EM01CTRL0_SPEC, u8, DRVSPEED_A, 2, O>; -impl<'a, const O: u8> DRVSPEED_W<'a, O> { - #[doc = "Lowest Efficiency, Lowest EMI.. Small decrease in efficiency from default setting"] +pub type DrvspeedW<'a, REG> = crate::FieldWriter<'a, REG, 2, Drvspeed, crate::Safe>; +impl<'a, REG> DrvspeedW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ + #[doc = "Not recommended for use (no benefit to this setting)"] #[inline(always)] - pub fn best_emi(self) -> &'a mut W { - self.variant(DRVSPEED_A::BEST_EMI) + pub fn best_emi(self) -> &'a mut crate::W { + self.variant(Drvspeed::BestEmi) } - #[doc = "Default Efficiency, Acceptable EMI level"] + #[doc = "Recommended for use for best efficiency and low EMI"] #[inline(always)] - pub fn default_setting(self) -> &'a mut W { - self.variant(DRVSPEED_A::DEFAULT_SETTING) + pub fn default_setting(self) -> &'a mut crate::W { + self.variant(Drvspeed::DefaultSetting) } - #[doc = "Small increase in efficiency from the default setting"] + #[doc = "Not recommended for use (no benefit to this setting)"] #[inline(always)] - pub fn intermediate(self) -> &'a mut W { - self.variant(DRVSPEED_A::INTERMEDIATE) + pub fn intermediate(self) -> &'a mut crate::W { + self.variant(Drvspeed::Intermediate) } - #[doc = "Highest Efficiency, Highest EMI.. Small increase in efficiency from INTERMEDIATE setting"] + #[doc = "Not recommended for use (no benefit to this setting)"] #[inline(always)] - pub fn best_efficiency(self) -> &'a mut W { - self.variant(DRVSPEED_A::BEST_EFFICIENCY) + pub fn best_efficiency(self) -> &'a mut crate::W { + self.variant(Drvspeed::BestEfficiency) } } impl R { #[doc = "Bits 0:3 - EM01 Peak Current Setting"] #[inline(always)] - pub fn ipkval(&self) -> IPKVAL_R { - IPKVAL_R::new((self.bits & 0x0f) as u8) + pub fn ipkval(&self) -> IpkvalR { + IpkvalR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - EM01 Drive Speed Setting"] #[inline(always)] - pub fn drvspeed(&self) -> DRVSPEED_R { - DRVSPEED_R::new(((self.bits >> 8) & 3) as u8) + pub fn drvspeed(&self) -> DrvspeedR { + DrvspeedR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - EM01 Peak Current Setting"] #[inline(always)] #[must_use] - pub fn ipkval(&mut self) -> IPKVAL_W<0> { - IPKVAL_W::new(self) + pub fn ipkval(&mut self) -> IpkvalW { + IpkvalW::new(self, 0) } #[doc = "Bits 8:9 - EM01 Drive Speed Setting"] #[inline(always)] #[must_use] - pub fn drvspeed(&mut self) -> DRVSPEED_W<8> { - DRVSPEED_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn drvspeed(&mut self) -> DrvspeedW { + DrvspeedW::new(self, 8) } } -#[doc = "EM01 Configurations\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [em01ctrl0](index.html) module"] -pub struct EM01CTRL0_SPEC; -impl crate::RegisterSpec for EM01CTRL0_SPEC { +#[doc = "EM01 Configurations\n\nYou can [`read`](crate::Reg::read) this register and get [`em01ctrl0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em01ctrl0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Em01ctrl0Spec; +impl crate::RegisterSpec for Em01ctrl0Spec { type Ux = u32; } -#[doc = "`read()` method returns [em01ctrl0::R](R) reader structure"] -impl crate::Readable for EM01CTRL0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [em01ctrl0::W](W) writer structure"] -impl crate::Writable for EM01CTRL0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`em01ctrl0::R`](R) reader structure"] +impl crate::Readable for Em01ctrl0Spec {} +#[doc = "`write(|w| ..)` method takes [`em01ctrl0::W`](W) writer structure"] +impl crate::Writable for Em01ctrl0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EM01CTRL0 to value 0x0109"] -impl crate::Resettable for EM01CTRL0_SPEC { - const RESET_VALUE: Self::Ux = 0x0109; +impl crate::Resettable for Em01ctrl0Spec { + const RESET_VALUE: u32 = 0x0109; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/em23ctrl0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/em23ctrl0.rs index d416313..6d06790 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/em23ctrl0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/em23ctrl0.rs @@ -1,284 +1,193 @@ #[doc = "Register `EM23CTRL0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EM23CTRL0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `IPKVAL` reader - EM23 Peak Current Setting"] -pub type IPKVAL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "EM23 Peak Current Setting\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum IPKVAL_A { - #[doc = "3: Ipeak = 90mA, Iload = 36mA"] - LOAD36M_A = 3, - #[doc = "4: Ipeak = 100mA, Iload = 40mA"] - LOAD40M_A = 4, - #[doc = "5: Ipeak = 110mA, Iload = 44mA"] - LOAD44M_A = 5, - #[doc = "6: Ipeak = 120mA, Iload = 48mA"] - LOAD48M_A = 6, - #[doc = "7: Ipeak = 130mA, Iload = 52mA"] - LOAD52M_A = 7, - #[doc = "8: Ipeak = 140mA, Iload = 56mA"] - LOAD56M_A = 8, - #[doc = "9: Ipeak = 150mA, Iload = 60mA"] - LOAD60M_A = 9, +pub enum Ipkval { + #[doc = "3: Ipeak = 90mA, Iload = 5 mA"] + Load5mA = 3, + #[doc = "9: Ipeak = 150mA, Iload = 10 mA"] + Load10mA = 9, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: IPKVAL_A) -> Self { + fn from(variant: Ipkval) -> Self { variant as _ } } -impl IPKVAL_R { +impl crate::FieldSpec for Ipkval { + type Ux = u8; +} +impl crate::IsEnum for Ipkval {} +#[doc = "Field `IPKVAL` reader - EM23 Peak Current Setting"] +pub type IpkvalR = crate::FieldReader; +impl IpkvalR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 3 => Some(IPKVAL_A::LOAD36M_A), - 4 => Some(IPKVAL_A::LOAD40M_A), - 5 => Some(IPKVAL_A::LOAD44M_A), - 6 => Some(IPKVAL_A::LOAD48M_A), - 7 => Some(IPKVAL_A::LOAD52M_A), - 8 => Some(IPKVAL_A::LOAD56M_A), - 9 => Some(IPKVAL_A::LOAD60M_A), + 3 => Some(Ipkval::Load5mA), + 9 => Some(Ipkval::Load10mA), _ => None, } } - #[doc = "Checks if the value of the field is `LOAD36M_A`"] - #[inline(always)] - pub fn is_load36m_a(&self) -> bool { - *self == IPKVAL_A::LOAD36M_A - } - #[doc = "Checks if the value of the field is `LOAD40M_A`"] - #[inline(always)] - pub fn is_load40m_a(&self) -> bool { - *self == IPKVAL_A::LOAD40M_A - } - #[doc = "Checks if the value of the field is `LOAD44M_A`"] - #[inline(always)] - pub fn is_load44m_a(&self) -> bool { - *self == IPKVAL_A::LOAD44M_A - } - #[doc = "Checks if the value of the field is `LOAD48M_A`"] - #[inline(always)] - pub fn is_load48m_a(&self) -> bool { - *self == IPKVAL_A::LOAD48M_A - } - #[doc = "Checks if the value of the field is `LOAD52M_A`"] + #[doc = "Ipeak = 90mA, Iload = 5 mA"] #[inline(always)] - pub fn is_load52m_a(&self) -> bool { - *self == IPKVAL_A::LOAD52M_A + pub fn is_load5m_a(&self) -> bool { + *self == Ipkval::Load5mA } - #[doc = "Checks if the value of the field is `LOAD56M_A`"] + #[doc = "Ipeak = 150mA, Iload = 10 mA"] #[inline(always)] - pub fn is_load56m_a(&self) -> bool { - *self == IPKVAL_A::LOAD56M_A - } - #[doc = "Checks if the value of the field is `LOAD60M_A`"] - #[inline(always)] - pub fn is_load60m_a(&self) -> bool { - *self == IPKVAL_A::LOAD60M_A + pub fn is_load10m_a(&self) -> bool { + *self == Ipkval::Load10mA } } #[doc = "Field `IPKVAL` writer - EM23 Peak Current Setting"] -pub type IPKVAL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EM23CTRL0_SPEC, u8, IPKVAL_A, 4, O>; -impl<'a, const O: u8> IPKVAL_W<'a, O> { - #[doc = "Ipeak = 90mA, Iload = 36mA"] - #[inline(always)] - pub fn load36m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD36M_A) - } - #[doc = "Ipeak = 100mA, Iload = 40mA"] - #[inline(always)] - pub fn load40m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD40M_A) - } - #[doc = "Ipeak = 110mA, Iload = 44mA"] +pub type IpkvalW<'a, REG> = crate::FieldWriter<'a, REG, 4, Ipkval>; +impl<'a, REG> IpkvalW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ + #[doc = "Ipeak = 90mA, Iload = 5 mA"] #[inline(always)] - pub fn load44m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD44M_A) + pub fn load5m_a(self) -> &'a mut crate::W { + self.variant(Ipkval::Load5mA) } - #[doc = "Ipeak = 120mA, Iload = 48mA"] + #[doc = "Ipeak = 150mA, Iload = 10 mA"] #[inline(always)] - pub fn load48m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD48M_A) - } - #[doc = "Ipeak = 130mA, Iload = 52mA"] - #[inline(always)] - pub fn load52m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD52M_A) - } - #[doc = "Ipeak = 140mA, Iload = 56mA"] - #[inline(always)] - pub fn load56m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD56M_A) - } - #[doc = "Ipeak = 150mA, Iload = 60mA"] - #[inline(always)] - pub fn load60m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD60M_A) + pub fn load10m_a(self) -> &'a mut crate::W { + self.variant(Ipkval::Load10mA) } } -#[doc = "Field `DRVSPEED` reader - EM23 Drive Speed Setting"] -pub type DRVSPEED_R = crate::FieldReader; #[doc = "EM23 Drive Speed Setting\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DRVSPEED_A { - #[doc = "0: Lowest Efficiency, Lowest EMI.. Small decrease in efficiency from default setting"] - BEST_EMI = 0, - #[doc = "1: Default Efficiency, Acceptable EMI level"] - DEFAULT_SETTING = 1, - #[doc = "2: Small increase in efficiency from the default setting"] - INTERMEDIATE = 2, - #[doc = "3: Highest Efficiency, Highest EMI.. Small increase in efficiency from INTERMEDIATE setting"] - BEST_EFFICIENCY = 3, -} -impl From for u8 { - #[inline(always)] - fn from(variant: DRVSPEED_A) -> Self { +pub enum Drvspeed { + #[doc = "0: Not recommended for use (no benefit to this setting)"] + BestEmi = 0, + #[doc = "1: Recommended for use for best efficiency and low EMI"] + DefaultSetting = 1, + #[doc = "2: Not recommended for use (no benefit to this setting)"] + Intermediate = 2, + #[doc = "3: Not recommended for use (no benefit to this setting)"] + BestEfficiency = 3, +} +impl From for u8 { + #[inline(always)] + fn from(variant: Drvspeed) -> Self { variant as _ } } -impl DRVSPEED_R { +impl crate::FieldSpec for Drvspeed { + type Ux = u8; +} +impl crate::IsEnum for Drvspeed {} +#[doc = "Field `DRVSPEED` reader - EM23 Drive Speed Setting"] +pub type DrvspeedR = crate::FieldReader; +impl DrvspeedR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DRVSPEED_A { + pub const fn variant(&self) -> Drvspeed { match self.bits { - 0 => DRVSPEED_A::BEST_EMI, - 1 => DRVSPEED_A::DEFAULT_SETTING, - 2 => DRVSPEED_A::INTERMEDIATE, - 3 => DRVSPEED_A::BEST_EFFICIENCY, + 0 => Drvspeed::BestEmi, + 1 => Drvspeed::DefaultSetting, + 2 => Drvspeed::Intermediate, + 3 => Drvspeed::BestEfficiency, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `BEST_EMI`"] + #[doc = "Not recommended for use (no benefit to this setting)"] #[inline(always)] pub fn is_best_emi(&self) -> bool { - *self == DRVSPEED_A::BEST_EMI + *self == Drvspeed::BestEmi } - #[doc = "Checks if the value of the field is `DEFAULT_SETTING`"] + #[doc = "Recommended for use for best efficiency and low EMI"] #[inline(always)] pub fn is_default_setting(&self) -> bool { - *self == DRVSPEED_A::DEFAULT_SETTING + *self == Drvspeed::DefaultSetting } - #[doc = "Checks if the value of the field is `INTERMEDIATE`"] + #[doc = "Not recommended for use (no benefit to this setting)"] #[inline(always)] pub fn is_intermediate(&self) -> bool { - *self == DRVSPEED_A::INTERMEDIATE + *self == Drvspeed::Intermediate } - #[doc = "Checks if the value of the field is `BEST_EFFICIENCY`"] + #[doc = "Not recommended for use (no benefit to this setting)"] #[inline(always)] pub fn is_best_efficiency(&self) -> bool { - *self == DRVSPEED_A::BEST_EFFICIENCY + *self == Drvspeed::BestEfficiency } } #[doc = "Field `DRVSPEED` writer - EM23 Drive Speed Setting"] -pub type DRVSPEED_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EM23CTRL0_SPEC, u8, DRVSPEED_A, 2, O>; -impl<'a, const O: u8> DRVSPEED_W<'a, O> { - #[doc = "Lowest Efficiency, Lowest EMI.. Small decrease in efficiency from default setting"] +pub type DrvspeedW<'a, REG> = crate::FieldWriter<'a, REG, 2, Drvspeed, crate::Safe>; +impl<'a, REG> DrvspeedW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ + #[doc = "Not recommended for use (no benefit to this setting)"] #[inline(always)] - pub fn best_emi(self) -> &'a mut W { - self.variant(DRVSPEED_A::BEST_EMI) + pub fn best_emi(self) -> &'a mut crate::W { + self.variant(Drvspeed::BestEmi) } - #[doc = "Default Efficiency, Acceptable EMI level"] + #[doc = "Recommended for use for best efficiency and low EMI"] #[inline(always)] - pub fn default_setting(self) -> &'a mut W { - self.variant(DRVSPEED_A::DEFAULT_SETTING) + pub fn default_setting(self) -> &'a mut crate::W { + self.variant(Drvspeed::DefaultSetting) } - #[doc = "Small increase in efficiency from the default setting"] + #[doc = "Not recommended for use (no benefit to this setting)"] #[inline(always)] - pub fn intermediate(self) -> &'a mut W { - self.variant(DRVSPEED_A::INTERMEDIATE) + pub fn intermediate(self) -> &'a mut crate::W { + self.variant(Drvspeed::Intermediate) } - #[doc = "Highest Efficiency, Highest EMI.. Small increase in efficiency from INTERMEDIATE setting"] + #[doc = "Not recommended for use (no benefit to this setting)"] #[inline(always)] - pub fn best_efficiency(self) -> &'a mut W { - self.variant(DRVSPEED_A::BEST_EFFICIENCY) + pub fn best_efficiency(self) -> &'a mut crate::W { + self.variant(Drvspeed::BestEfficiency) } } impl R { #[doc = "Bits 0:3 - EM23 Peak Current Setting"] #[inline(always)] - pub fn ipkval(&self) -> IPKVAL_R { - IPKVAL_R::new((self.bits & 0x0f) as u8) + pub fn ipkval(&self) -> IpkvalR { + IpkvalR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - EM23 Drive Speed Setting"] #[inline(always)] - pub fn drvspeed(&self) -> DRVSPEED_R { - DRVSPEED_R::new(((self.bits >> 8) & 3) as u8) + pub fn drvspeed(&self) -> DrvspeedR { + DrvspeedR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - EM23 Peak Current Setting"] #[inline(always)] #[must_use] - pub fn ipkval(&mut self) -> IPKVAL_W<0> { - IPKVAL_W::new(self) + pub fn ipkval(&mut self) -> IpkvalW { + IpkvalW::new(self, 0) } #[doc = "Bits 8:9 - EM23 Drive Speed Setting"] #[inline(always)] #[must_use] - pub fn drvspeed(&mut self) -> DRVSPEED_W<8> { - DRVSPEED_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn drvspeed(&mut self) -> DrvspeedW { + DrvspeedW::new(self, 8) } } -#[doc = "EM23 Configurations\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [em23ctrl0](index.html) module"] -pub struct EM23CTRL0_SPEC; -impl crate::RegisterSpec for EM23CTRL0_SPEC { +#[doc = "EM23 Configurations\n\nYou can [`read`](crate::Reg::read) this register and get [`em23ctrl0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em23ctrl0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Em23ctrl0Spec; +impl crate::RegisterSpec for Em23ctrl0Spec { type Ux = u32; } -#[doc = "`read()` method returns [em23ctrl0::R](R) reader structure"] -impl crate::Readable for EM23CTRL0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [em23ctrl0::W](W) writer structure"] -impl crate::Writable for EM23CTRL0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`em23ctrl0::R`](R) reader structure"] +impl crate::Readable for Em23ctrl0Spec {} +#[doc = "`write(|w| ..)` method takes [`em23ctrl0::W`](W) writer structure"] +impl crate::Writable for Em23ctrl0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EM23CTRL0 to value 0x0103"] -impl crate::Resettable for EM23CTRL0_SPEC { - const RESET_VALUE: Self::Ux = 0x0103; +impl crate::Resettable for Em23ctrl0Spec { + const RESET_VALUE: u32 = 0x0103; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/ien.rs index 5153d2f..3ae2911 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/ien.rs @@ -1,215 +1,175 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `BYPSW` reader - Bypass Switch Enabled Interrupt Enable"] -pub type BYPSW_R = crate::BitReader; +pub type BypswR = crate::BitReader; #[doc = "Field `BYPSW` writer - Bypass Switch Enabled Interrupt Enable"] -pub type BYPSW_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type BypswW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WARM` reader - DCDC Warmup Time Done Interrupt Enable"] -pub type WARM_R = crate::BitReader; +pub type WarmR = crate::BitReader; #[doc = "Field `WARM` writer - DCDC Warmup Time Done Interrupt Enable"] -pub type WARM_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type WarmW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RUNNING` reader - DCDC Running Interrupt Enable"] -pub type RUNNING_R = crate::BitReader; +pub type RunningR = crate::BitReader; #[doc = "Field `RUNNING` writer - DCDC Running Interrupt Enable"] -pub type RUNNING_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RunningW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VREGINLOW` reader - VREGIN below threshold Interrupt Enable"] -pub type VREGINLOW_R = crate::BitReader; +pub type VreginlowR = crate::BitReader; #[doc = "Field `VREGINLOW` writer - VREGIN below threshold Interrupt Enable"] -pub type VREGINLOW_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type VreginlowW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VREGINHIGH` reader - VREGIN above threshold Interrupt Enable"] -pub type VREGINHIGH_R = crate::BitReader; +pub type VreginhighR = crate::BitReader; #[doc = "Field `VREGINHIGH` writer - VREGIN above threshold Interrupt Enable"] -pub type VREGINHIGH_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type VreginhighW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REGULATION` reader - DCDC in Regulation Interrupt Enable"] -pub type REGULATION_R = crate::BitReader; +pub type RegulationR = crate::BitReader; #[doc = "Field `REGULATION` writer - DCDC in Regulation Interrupt Enable"] -pub type REGULATION_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RegulationW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TMAX` reader - Ton_max Timeout Interrupt Enable"] -pub type TMAX_R = crate::BitReader; +pub type TmaxR = crate::BitReader; #[doc = "Field `TMAX` writer - Ton_max Timeout Interrupt Enable"] -pub type TMAX_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TmaxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4ERR` reader - EM4 Entry Req Interrupt Enable"] -pub type EM4ERR_R = crate::BitReader; +pub type Em4errR = crate::BitReader; #[doc = "Field `EM4ERR` writer - EM4 Entry Req Interrupt Enable"] -pub type EM4ERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em4errW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PPMODE` reader - Pulse Pairing Mode Interrupt Enable"] -pub type PPMODE_R = crate::BitReader; +pub type PpmodeR = crate::BitReader; #[doc = "Field `PPMODE` writer - Pulse Pairing Mode Interrupt Enable"] -pub type PPMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PpmodeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PFMXMODE` reader - PFMX Mode Interrupt Enable"] -pub type PFMXMODE_R = crate::BitReader; +pub type PfmxmodeR = crate::BitReader; #[doc = "Field `PFMXMODE` writer - PFMX Mode Interrupt Enable"] -pub type PFMXMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PfmxmodeW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Bypass Switch Enabled Interrupt Enable"] #[inline(always)] - pub fn bypsw(&self) -> BYPSW_R { - BYPSW_R::new((self.bits & 1) != 0) + pub fn bypsw(&self) -> BypswR { + BypswR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DCDC Warmup Time Done Interrupt Enable"] #[inline(always)] - pub fn warm(&self) -> WARM_R { - WARM_R::new(((self.bits >> 1) & 1) != 0) + pub fn warm(&self) -> WarmR { + WarmR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DCDC Running Interrupt Enable"] #[inline(always)] - pub fn running(&self) -> RUNNING_R { - RUNNING_R::new(((self.bits >> 2) & 1) != 0) + pub fn running(&self) -> RunningR { + RunningR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - VREGIN below threshold Interrupt Enable"] #[inline(always)] - pub fn vreginlow(&self) -> VREGINLOW_R { - VREGINLOW_R::new(((self.bits >> 3) & 1) != 0) + pub fn vreginlow(&self) -> VreginlowR { + VreginlowR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - VREGIN above threshold Interrupt Enable"] #[inline(always)] - pub fn vreginhigh(&self) -> VREGINHIGH_R { - VREGINHIGH_R::new(((self.bits >> 4) & 1) != 0) + pub fn vreginhigh(&self) -> VreginhighR { + VreginhighR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DCDC in Regulation Interrupt Enable"] #[inline(always)] - pub fn regulation(&self) -> REGULATION_R { - REGULATION_R::new(((self.bits >> 5) & 1) != 0) + pub fn regulation(&self) -> RegulationR { + RegulationR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Ton_max Timeout Interrupt Enable"] #[inline(always)] - pub fn tmax(&self) -> TMAX_R { - TMAX_R::new(((self.bits >> 6) & 1) != 0) + pub fn tmax(&self) -> TmaxR { + TmaxR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - EM4 Entry Req Interrupt Enable"] #[inline(always)] - pub fn em4err(&self) -> EM4ERR_R { - EM4ERR_R::new(((self.bits >> 7) & 1) != 0) + pub fn em4err(&self) -> Em4errR { + Em4errR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Pulse Pairing Mode Interrupt Enable"] #[inline(always)] - pub fn ppmode(&self) -> PPMODE_R { - PPMODE_R::new(((self.bits >> 8) & 1) != 0) + pub fn ppmode(&self) -> PpmodeR { + PpmodeR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - PFMX Mode Interrupt Enable"] #[inline(always)] - pub fn pfmxmode(&self) -> PFMXMODE_R { - PFMXMODE_R::new(((self.bits >> 9) & 1) != 0) + pub fn pfmxmode(&self) -> PfmxmodeR { + PfmxmodeR::new(((self.bits >> 9) & 1) != 0) } } impl W { #[doc = "Bit 0 - Bypass Switch Enabled Interrupt Enable"] #[inline(always)] #[must_use] - pub fn bypsw(&mut self) -> BYPSW_W<0> { - BYPSW_W::new(self) + pub fn bypsw(&mut self) -> BypswW { + BypswW::new(self, 0) } #[doc = "Bit 1 - DCDC Warmup Time Done Interrupt Enable"] #[inline(always)] #[must_use] - pub fn warm(&mut self) -> WARM_W<1> { - WARM_W::new(self) + pub fn warm(&mut self) -> WarmW { + WarmW::new(self, 1) } #[doc = "Bit 2 - DCDC Running Interrupt Enable"] #[inline(always)] #[must_use] - pub fn running(&mut self) -> RUNNING_W<2> { - RUNNING_W::new(self) + pub fn running(&mut self) -> RunningW { + RunningW::new(self, 2) } #[doc = "Bit 3 - VREGIN below threshold Interrupt Enable"] #[inline(always)] #[must_use] - pub fn vreginlow(&mut self) -> VREGINLOW_W<3> { - VREGINLOW_W::new(self) + pub fn vreginlow(&mut self) -> VreginlowW { + VreginlowW::new(self, 3) } #[doc = "Bit 4 - VREGIN above threshold Interrupt Enable"] #[inline(always)] #[must_use] - pub fn vreginhigh(&mut self) -> VREGINHIGH_W<4> { - VREGINHIGH_W::new(self) + pub fn vreginhigh(&mut self) -> VreginhighW { + VreginhighW::new(self, 4) } #[doc = "Bit 5 - DCDC in Regulation Interrupt Enable"] #[inline(always)] #[must_use] - pub fn regulation(&mut self) -> REGULATION_W<5> { - REGULATION_W::new(self) + pub fn regulation(&mut self) -> RegulationW { + RegulationW::new(self, 5) } #[doc = "Bit 6 - Ton_max Timeout Interrupt Enable"] #[inline(always)] #[must_use] - pub fn tmax(&mut self) -> TMAX_W<6> { - TMAX_W::new(self) + pub fn tmax(&mut self) -> TmaxW { + TmaxW::new(self, 6) } #[doc = "Bit 7 - EM4 Entry Req Interrupt Enable"] #[inline(always)] #[must_use] - pub fn em4err(&mut self) -> EM4ERR_W<7> { - EM4ERR_W::new(self) + pub fn em4err(&mut self) -> Em4errW { + Em4errW::new(self, 7) } #[doc = "Bit 8 - Pulse Pairing Mode Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ppmode(&mut self) -> PPMODE_W<8> { - PPMODE_W::new(self) + pub fn ppmode(&mut self) -> PpmodeW { + PpmodeW::new(self, 8) } #[doc = "Bit 9 - PFMX Mode Interrupt Enable"] #[inline(always)] #[must_use] - pub fn pfmxmode(&mut self) -> PFMXMODE_W<9> { - PFMXMODE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pfmxmode(&mut self) -> PfmxmodeW { + PfmxmodeW::new(self, 9) } } -#[doc = "Interrupt Enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/if_.rs index c3fdb3a..a465181 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/if_.rs @@ -1,215 +1,175 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `BYPSW` reader - Bypass Switch Enabled"] -pub type BYPSW_R = crate::BitReader; +pub type BypswR = crate::BitReader; #[doc = "Field `BYPSW` writer - Bypass Switch Enabled"] -pub type BYPSW_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type BypswW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WARM` reader - DCDC Warmup Time Done"] -pub type WARM_R = crate::BitReader; +pub type WarmR = crate::BitReader; #[doc = "Field `WARM` writer - DCDC Warmup Time Done"] -pub type WARM_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type WarmW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RUNNING` reader - DCDC Running"] -pub type RUNNING_R = crate::BitReader; +pub type RunningR = crate::BitReader; #[doc = "Field `RUNNING` writer - DCDC Running"] -pub type RUNNING_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RunningW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VREGINLOW` reader - VREGIN below threshold"] -pub type VREGINLOW_R = crate::BitReader; +pub type VreginlowR = crate::BitReader; #[doc = "Field `VREGINLOW` writer - VREGIN below threshold"] -pub type VREGINLOW_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type VreginlowW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VREGINHIGH` reader - VREGIN above threshold"] -pub type VREGINHIGH_R = crate::BitReader; +pub type VreginhighR = crate::BitReader; #[doc = "Field `VREGINHIGH` writer - VREGIN above threshold"] -pub type VREGINHIGH_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type VreginhighW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REGULATION` reader - DCDC in regulation"] -pub type REGULATION_R = crate::BitReader; +pub type RegulationR = crate::BitReader; #[doc = "Field `REGULATION` writer - DCDC in regulation"] -pub type REGULATION_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RegulationW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TMAX` reader - Ton_max Timeout Reached"] -pub type TMAX_R = crate::BitReader; +pub type TmaxR = crate::BitReader; #[doc = "Field `TMAX` writer - Ton_max Timeout Reached"] -pub type TMAX_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TmaxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4ERR` reader - EM4 Entry Request Error"] -pub type EM4ERR_R = crate::BitReader; +pub type Em4errR = crate::BitReader; #[doc = "Field `EM4ERR` writer - EM4 Entry Request Error"] -pub type EM4ERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Em4errW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PPMODE` reader - Entered Pulse Pairing mode"] -pub type PPMODE_R = crate::BitReader; +pub type PpmodeR = crate::BitReader; #[doc = "Field `PPMODE` writer - Entered Pulse Pairing mode"] -pub type PPMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PpmodeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PFMXMODE` reader - Entered PFMX mode"] -pub type PFMXMODE_R = crate::BitReader; +pub type PfmxmodeR = crate::BitReader; #[doc = "Field `PFMXMODE` writer - Entered PFMX mode"] -pub type PFMXMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PfmxmodeW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Bypass Switch Enabled"] #[inline(always)] - pub fn bypsw(&self) -> BYPSW_R { - BYPSW_R::new((self.bits & 1) != 0) + pub fn bypsw(&self) -> BypswR { + BypswR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DCDC Warmup Time Done"] #[inline(always)] - pub fn warm(&self) -> WARM_R { - WARM_R::new(((self.bits >> 1) & 1) != 0) + pub fn warm(&self) -> WarmR { + WarmR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DCDC Running"] #[inline(always)] - pub fn running(&self) -> RUNNING_R { - RUNNING_R::new(((self.bits >> 2) & 1) != 0) + pub fn running(&self) -> RunningR { + RunningR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - VREGIN below threshold"] #[inline(always)] - pub fn vreginlow(&self) -> VREGINLOW_R { - VREGINLOW_R::new(((self.bits >> 3) & 1) != 0) + pub fn vreginlow(&self) -> VreginlowR { + VreginlowR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - VREGIN above threshold"] #[inline(always)] - pub fn vreginhigh(&self) -> VREGINHIGH_R { - VREGINHIGH_R::new(((self.bits >> 4) & 1) != 0) + pub fn vreginhigh(&self) -> VreginhighR { + VreginhighR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DCDC in regulation"] #[inline(always)] - pub fn regulation(&self) -> REGULATION_R { - REGULATION_R::new(((self.bits >> 5) & 1) != 0) + pub fn regulation(&self) -> RegulationR { + RegulationR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Ton_max Timeout Reached"] #[inline(always)] - pub fn tmax(&self) -> TMAX_R { - TMAX_R::new(((self.bits >> 6) & 1) != 0) + pub fn tmax(&self) -> TmaxR { + TmaxR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - EM4 Entry Request Error"] #[inline(always)] - pub fn em4err(&self) -> EM4ERR_R { - EM4ERR_R::new(((self.bits >> 7) & 1) != 0) + pub fn em4err(&self) -> Em4errR { + Em4errR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Entered Pulse Pairing mode"] #[inline(always)] - pub fn ppmode(&self) -> PPMODE_R { - PPMODE_R::new(((self.bits >> 8) & 1) != 0) + pub fn ppmode(&self) -> PpmodeR { + PpmodeR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Entered PFMX mode"] #[inline(always)] - pub fn pfmxmode(&self) -> PFMXMODE_R { - PFMXMODE_R::new(((self.bits >> 9) & 1) != 0) + pub fn pfmxmode(&self) -> PfmxmodeR { + PfmxmodeR::new(((self.bits >> 9) & 1) != 0) } } impl W { #[doc = "Bit 0 - Bypass Switch Enabled"] #[inline(always)] #[must_use] - pub fn bypsw(&mut self) -> BYPSW_W<0> { - BYPSW_W::new(self) + pub fn bypsw(&mut self) -> BypswW { + BypswW::new(self, 0) } #[doc = "Bit 1 - DCDC Warmup Time Done"] #[inline(always)] #[must_use] - pub fn warm(&mut self) -> WARM_W<1> { - WARM_W::new(self) + pub fn warm(&mut self) -> WarmW { + WarmW::new(self, 1) } #[doc = "Bit 2 - DCDC Running"] #[inline(always)] #[must_use] - pub fn running(&mut self) -> RUNNING_W<2> { - RUNNING_W::new(self) + pub fn running(&mut self) -> RunningW { + RunningW::new(self, 2) } #[doc = "Bit 3 - VREGIN below threshold"] #[inline(always)] #[must_use] - pub fn vreginlow(&mut self) -> VREGINLOW_W<3> { - VREGINLOW_W::new(self) + pub fn vreginlow(&mut self) -> VreginlowW { + VreginlowW::new(self, 3) } #[doc = "Bit 4 - VREGIN above threshold"] #[inline(always)] #[must_use] - pub fn vreginhigh(&mut self) -> VREGINHIGH_W<4> { - VREGINHIGH_W::new(self) + pub fn vreginhigh(&mut self) -> VreginhighW { + VreginhighW::new(self, 4) } #[doc = "Bit 5 - DCDC in regulation"] #[inline(always)] #[must_use] - pub fn regulation(&mut self) -> REGULATION_W<5> { - REGULATION_W::new(self) + pub fn regulation(&mut self) -> RegulationW { + RegulationW::new(self, 5) } #[doc = "Bit 6 - Ton_max Timeout Reached"] #[inline(always)] #[must_use] - pub fn tmax(&mut self) -> TMAX_W<6> { - TMAX_W::new(self) + pub fn tmax(&mut self) -> TmaxW { + TmaxW::new(self, 6) } #[doc = "Bit 7 - EM4 Entry Request Error"] #[inline(always)] #[must_use] - pub fn em4err(&mut self) -> EM4ERR_W<7> { - EM4ERR_W::new(self) + pub fn em4err(&mut self) -> Em4errW { + Em4errW::new(self, 7) } #[doc = "Bit 8 - Entered Pulse Pairing mode"] #[inline(always)] #[must_use] - pub fn ppmode(&mut self) -> PPMODE_W<8> { - PPMODE_W::new(self) + pub fn ppmode(&mut self) -> PpmodeW { + PpmodeW::new(self, 8) } #[doc = "Bit 9 - Entered PFMX mode"] #[inline(always)] #[must_use] - pub fn pfmxmode(&mut self) -> PFMXMODE_W<9> { - PFMXMODE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pfmxmode(&mut self) -> PfmxmodeW { + PfmxmodeW::new(self, 9) } } -#[doc = "Interrupt Flags\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "Interrupt Flags\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/ipversion.rs index 44b0ae3..09a3978 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IPVERSION"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IPVERSION"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "IPVERSION\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "IPVERSION\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/lock.rs index 182454f..a909296 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Configuration Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "43981: UNLOCKKEY"] - UNLOCKKEY = 43981, + Unlockkey = 43981, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Configuration Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "UNLOCKKEY"] #[inline(always)] - pub fn unlockkey(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCKKEY) + pub fn unlockkey(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlockkey) } } impl W { #[doc = "Bits 0:15 - Configuration Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/lockstatus.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/lockstatus.rs index 516b6c0..d4ab717 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/lockstatus.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/lockstatus.rs @@ -1,71 +1,56 @@ #[doc = "Register `LOCKSTATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `LOCK` reader - Lock Status"] -pub type LOCK_R = crate::BitReader; +pub type R = crate::R; #[doc = "Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCK_A { +pub enum Lock { #[doc = "0: Unlocked State"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: LOCKED STATE"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCK_A) -> Self { + fn from(variant: Lock) -> Self { variant as u8 != 0 } } -impl LOCK_R { +#[doc = "Field `LOCK` reader - Lock Status"] +pub type LockR = crate::BitReader; +impl LockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCK_A { + pub const fn variant(&self) -> Lock { match self.bits { - false => LOCK_A::UNLOCKED, - true => LOCK_A::LOCKED, + false => Lock::Unlocked, + true => Lock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "Unlocked State"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCK_A::UNLOCKED + *self == Lock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "LOCKED STATE"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCK_A::LOCKED + *self == Lock::Locked } } impl R { #[doc = "Bit 0 - Lock Status"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new((self.bits & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new((self.bits & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lockstatus](index.html) module"] -pub struct LOCKSTATUS_SPEC; -impl crate::RegisterSpec for LOCKSTATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`lockstatus::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockstatusSpec; +impl crate::RegisterSpec for LockstatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [lockstatus::R](R) reader structure"] -impl crate::Readable for LOCKSTATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`lockstatus::R`](R) reader structure"] +impl crate::Readable for LockstatusSpec {} #[doc = "`reset()` method sets LOCKSTATUS to value 0"] -impl crate::Resettable for LOCKSTATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LockstatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/pfmxctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/pfmxctrl.rs index 8efe48d..6403f45 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/pfmxctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/pfmxctrl.rs @@ -1,95 +1,215 @@ #[doc = "Register `PFMXCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; +pub type R = crate::R; +#[doc = "Register `PFMXCTRL` writer"] +pub type W = crate::W; +#[doc = "PFMX mode Peak Current Setting\n\nValue on reset: 12"] +#[derive(Clone, Copy, Debug, PartialEq, Eq)] +#[repr(u8)] +pub enum Ipkval { + #[doc = "3: Ipeak = 90 mA, Iload = 50 mA"] + Load50ma = 3, + #[doc = "4: Ipeak = 100 mA, Iload = 65 mA"] + Load65ma = 4, + #[doc = "5: Ipeak = 110 mA, Iload = 73 mA"] + Load73ma = 5, + #[doc = "6: Ipeak = 120 mA, Iload = 80 mA"] + Load80ma = 6, + #[doc = "7: Ipeak = 130 mA, Iload = 86 mA"] + Load86ma = 7, + #[doc = "8: Ipeak = 140 mA, Iload = 93 mA"] + Load93ma = 8, + #[doc = "9: Ipeak = 150 mA, Iload = 100 mA"] + Load100ma = 9, + #[doc = "10: Ipeak = 160 mA, Iload = 106 mA"] + Load106ma = 10, + #[doc = "11: Ipeak = 170 mA, Iload = 113 mA"] + Load113ma = 11, + #[doc = "12: Ipeak = 180 mA, Iload = 120 mA"] + Load120ma = 12, +} +impl From for u8 { #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 + fn from(variant: Ipkval) -> Self { + variant as _ } } -impl From> for R { +impl crate::FieldSpec for Ipkval { + type Ux = u8; +} +impl crate::IsEnum for Ipkval {} +#[doc = "Field `IPKVAL` reader - PFMX mode Peak Current Setting"] +pub type IpkvalR = crate::FieldReader; +impl IpkvalR { + #[doc = "Get enumerated values variant"] #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) + pub const fn variant(&self) -> Option { + match self.bits { + 3 => Some(Ipkval::Load50ma), + 4 => Some(Ipkval::Load65ma), + 5 => Some(Ipkval::Load73ma), + 6 => Some(Ipkval::Load80ma), + 7 => Some(Ipkval::Load86ma), + 8 => Some(Ipkval::Load93ma), + 9 => Some(Ipkval::Load100ma), + 10 => Some(Ipkval::Load106ma), + 11 => Some(Ipkval::Load113ma), + 12 => Some(Ipkval::Load120ma), + _ => None, + } } -} -#[doc = "Register `PFMXCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; + #[doc = "Ipeak = 90 mA, Iload = 50 mA"] #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 + pub fn is_load50ma(&self) -> bool { + *self == Ipkval::Load50ma } -} -impl core::ops::DerefMut for W { + #[doc = "Ipeak = 100 mA, Iload = 65 mA"] #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 + pub fn is_load65ma(&self) -> bool { + *self == Ipkval::Load65ma } -} -impl From> for W { + #[doc = "Ipeak = 110 mA, Iload = 73 mA"] + #[inline(always)] + pub fn is_load73ma(&self) -> bool { + *self == Ipkval::Load73ma + } + #[doc = "Ipeak = 120 mA, Iload = 80 mA"] + #[inline(always)] + pub fn is_load80ma(&self) -> bool { + *self == Ipkval::Load80ma + } + #[doc = "Ipeak = 130 mA, Iload = 86 mA"] #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) + pub fn is_load86ma(&self) -> bool { + *self == Ipkval::Load86ma + } + #[doc = "Ipeak = 140 mA, Iload = 93 mA"] + #[inline(always)] + pub fn is_load93ma(&self) -> bool { + *self == Ipkval::Load93ma + } + #[doc = "Ipeak = 150 mA, Iload = 100 mA"] + #[inline(always)] + pub fn is_load100ma(&self) -> bool { + *self == Ipkval::Load100ma + } + #[doc = "Ipeak = 160 mA, Iload = 106 mA"] + #[inline(always)] + pub fn is_load106ma(&self) -> bool { + *self == Ipkval::Load106ma + } + #[doc = "Ipeak = 170 mA, Iload = 113 mA"] + #[inline(always)] + pub fn is_load113ma(&self) -> bool { + *self == Ipkval::Load113ma + } + #[doc = "Ipeak = 180 mA, Iload = 120 mA"] + #[inline(always)] + pub fn is_load120ma(&self) -> bool { + *self == Ipkval::Load120ma } } -#[doc = "Field `IPKVAL` reader - PFMX mode Peak Current Setting"] -pub type IPKVAL_R = crate::FieldReader; #[doc = "Field `IPKVAL` writer - PFMX mode Peak Current Setting"] -pub type IPKVAL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PFMXCTRL_SPEC, u8, u8, 4, O>; +pub type IpkvalW<'a, REG> = crate::FieldWriter<'a, REG, 4, Ipkval>; +impl<'a, REG> IpkvalW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ + #[doc = "Ipeak = 90 mA, Iload = 50 mA"] + #[inline(always)] + pub fn load50ma(self) -> &'a mut crate::W { + self.variant(Ipkval::Load50ma) + } + #[doc = "Ipeak = 100 mA, Iload = 65 mA"] + #[inline(always)] + pub fn load65ma(self) -> &'a mut crate::W { + self.variant(Ipkval::Load65ma) + } + #[doc = "Ipeak = 110 mA, Iload = 73 mA"] + #[inline(always)] + pub fn load73ma(self) -> &'a mut crate::W { + self.variant(Ipkval::Load73ma) + } + #[doc = "Ipeak = 120 mA, Iload = 80 mA"] + #[inline(always)] + pub fn load80ma(self) -> &'a mut crate::W { + self.variant(Ipkval::Load80ma) + } + #[doc = "Ipeak = 130 mA, Iload = 86 mA"] + #[inline(always)] + pub fn load86ma(self) -> &'a mut crate::W { + self.variant(Ipkval::Load86ma) + } + #[doc = "Ipeak = 140 mA, Iload = 93 mA"] + #[inline(always)] + pub fn load93ma(self) -> &'a mut crate::W { + self.variant(Ipkval::Load93ma) + } + #[doc = "Ipeak = 150 mA, Iload = 100 mA"] + #[inline(always)] + pub fn load100ma(self) -> &'a mut crate::W { + self.variant(Ipkval::Load100ma) + } + #[doc = "Ipeak = 160 mA, Iload = 106 mA"] + #[inline(always)] + pub fn load106ma(self) -> &'a mut crate::W { + self.variant(Ipkval::Load106ma) + } + #[doc = "Ipeak = 170 mA, Iload = 113 mA"] + #[inline(always)] + pub fn load113ma(self) -> &'a mut crate::W { + self.variant(Ipkval::Load113ma) + } + #[doc = "Ipeak = 180 mA, Iload = 120 mA"] + #[inline(always)] + pub fn load120ma(self) -> &'a mut crate::W { + self.variant(Ipkval::Load120ma) + } +} #[doc = "Field `IPKTMAXCTRL` reader - Ton_max timeout control"] -pub type IPKTMAXCTRL_R = crate::FieldReader; +pub type IpktmaxctrlR = crate::FieldReader; #[doc = "Field `IPKTMAXCTRL` writer - Ton_max timeout control"] -pub type IPKTMAXCTRL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PFMXCTRL_SPEC, u8, u8, 5, O>; +pub type IpktmaxctrlW<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bits 0:3 - PFMX mode Peak Current Setting"] #[inline(always)] - pub fn ipkval(&self) -> IPKVAL_R { - IPKVAL_R::new((self.bits & 0x0f) as u8) + pub fn ipkval(&self) -> IpkvalR { + IpkvalR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:12 - Ton_max timeout control"] #[inline(always)] - pub fn ipktmaxctrl(&self) -> IPKTMAXCTRL_R { - IPKTMAXCTRL_R::new(((self.bits >> 8) & 0x1f) as u8) + pub fn ipktmaxctrl(&self) -> IpktmaxctrlR { + IpktmaxctrlR::new(((self.bits >> 8) & 0x1f) as u8) } } impl W { #[doc = "Bits 0:3 - PFMX mode Peak Current Setting"] #[inline(always)] #[must_use] - pub fn ipkval(&mut self) -> IPKVAL_W<0> { - IPKVAL_W::new(self) + pub fn ipkval(&mut self) -> IpkvalW { + IpkvalW::new(self, 0) } #[doc = "Bits 8:12 - Ton_max timeout control"] #[inline(always)] #[must_use] - pub fn ipktmaxctrl(&mut self) -> IPKTMAXCTRL_W<8> { - IPKTMAXCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ipktmaxctrl(&mut self) -> IpktmaxctrlW { + IpktmaxctrlW::new(self, 8) } } -#[doc = "PFMX Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pfmxctrl](index.html) module"] -pub struct PFMXCTRL_SPEC; -impl crate::RegisterSpec for PFMXCTRL_SPEC { +#[doc = "PFMX Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pfmxctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pfmxctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PfmxctrlSpec; +impl crate::RegisterSpec for PfmxctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [pfmxctrl::R](R) reader structure"] -impl crate::Readable for PFMXCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [pfmxctrl::W](W) writer structure"] -impl crate::Writable for PFMXCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`pfmxctrl::R`](R) reader structure"] +impl crate::Readable for PfmxctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`pfmxctrl::W`](W) writer structure"] +impl crate::Writable for PfmxctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } -#[doc = "`reset()` method sets PFMXCTRL to value 0x0b0c"] -impl crate::Resettable for PFMXCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0b0c; +#[doc = "`reset()` method sets PFMXCTRL to value 0x0c0c"] +impl crate::Resettable for PfmxctrlSpec { + const RESET_VALUE: u32 = 0x0c0c; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/status.rs index e8dc104..65b944d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/status.rs @@ -1,79 +1,64 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `BYPSW` reader - Bypass Switch is currently enabled"] -pub type BYPSW_R = crate::BitReader; +pub type BypswR = crate::BitReader; #[doc = "Field `WARM` reader - DCDC Warmup Done"] -pub type WARM_R = crate::BitReader; +pub type WarmR = crate::BitReader; #[doc = "Field `RUNNING` reader - DCDC is running"] -pub type RUNNING_R = crate::BitReader; -#[doc = "Field `VREGIN` reader - VREGIN comparator status"] -pub type VREGIN_R = crate::BitReader; +pub type RunningR = crate::BitReader; +#[doc = "Field `VREGIN` reader - VREGVDD comparator status"] +pub type VreginR = crate::BitReader; #[doc = "Field `BYPCMPOUT` reader - Bypass Comparator Output"] -pub type BYPCMPOUT_R = crate::BitReader; +pub type BypcmpoutR = crate::BitReader; #[doc = "Field `PPMODE` reader - DCDC in pulse-pairing mode"] -pub type PPMODE_R = crate::BitReader; +pub type PpmodeR = crate::BitReader; #[doc = "Field `PFMXMODE` reader - DCDC in PFMX mode"] -pub type PFMXMODE_R = crate::BitReader; +pub type PfmxmodeR = crate::BitReader; impl R { #[doc = "Bit 0 - Bypass Switch is currently enabled"] #[inline(always)] - pub fn bypsw(&self) -> BYPSW_R { - BYPSW_R::new((self.bits & 1) != 0) + pub fn bypsw(&self) -> BypswR { + BypswR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DCDC Warmup Done"] #[inline(always)] - pub fn warm(&self) -> WARM_R { - WARM_R::new(((self.bits >> 1) & 1) != 0) + pub fn warm(&self) -> WarmR { + WarmR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DCDC is running"] #[inline(always)] - pub fn running(&self) -> RUNNING_R { - RUNNING_R::new(((self.bits >> 2) & 1) != 0) + pub fn running(&self) -> RunningR { + RunningR::new(((self.bits >> 2) & 1) != 0) } - #[doc = "Bit 3 - VREGIN comparator status"] + #[doc = "Bit 3 - VREGVDD comparator status"] #[inline(always)] - pub fn vregin(&self) -> VREGIN_R { - VREGIN_R::new(((self.bits >> 3) & 1) != 0) + pub fn vregin(&self) -> VreginR { + VreginR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Bypass Comparator Output"] #[inline(always)] - pub fn bypcmpout(&self) -> BYPCMPOUT_R { - BYPCMPOUT_R::new(((self.bits >> 4) & 1) != 0) + pub fn bypcmpout(&self) -> BypcmpoutR { + BypcmpoutR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 8 - DCDC in pulse-pairing mode"] #[inline(always)] - pub fn ppmode(&self) -> PPMODE_R { - PPMODE_R::new(((self.bits >> 8) & 1) != 0) + pub fn ppmode(&self) -> PpmodeR { + PpmodeR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - DCDC in PFMX mode"] #[inline(always)] - pub fn pfmxmode(&self) -> PFMXMODE_R { - PFMXMODE_R::new(((self.bits >> 9) & 1) != 0) + pub fn pfmxmode(&self) -> PfmxmodeR { + PfmxmodeR::new(((self.bits >> 9) & 1) != 0) } } -#[doc = "DCDC Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "DCDC Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/syncbusy.rs index b3ea382..58af169 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_ns/syncbusy.rs @@ -1,65 +1,50 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CTRL` reader - CTRL Sync Busy Status"] -pub type CTRL_R = crate::BitReader; +pub type CtrlR = crate::BitReader; #[doc = "Field `EM01CTRL0` reader - EM01CTRL0 Sync Busy Status"] -pub type EM01CTRL0_R = crate::BitReader; +pub type Em01ctrl0R = crate::BitReader; #[doc = "Field `EM01CTRL1` reader - EM01CTRL1 Sync Bust Status"] -pub type EM01CTRL1_R = crate::BitReader; +pub type Em01ctrl1R = crate::BitReader; #[doc = "Field `EM23CTRL0` reader - EM23CTRL0 Sync Busy Status"] -pub type EM23CTRL0_R = crate::BitReader; +pub type Em23ctrl0R = crate::BitReader; #[doc = "Field `PFMXCTRL` reader - PFMXCTRL Sync Busy Status"] -pub type PFMXCTRL_R = crate::BitReader; +pub type PfmxctrlR = crate::BitReader; impl R { #[doc = "Bit 0 - CTRL Sync Busy Status"] #[inline(always)] - pub fn ctrl(&self) -> CTRL_R { - CTRL_R::new((self.bits & 1) != 0) + pub fn ctrl(&self) -> CtrlR { + CtrlR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - EM01CTRL0 Sync Busy Status"] #[inline(always)] - pub fn em01ctrl0(&self) -> EM01CTRL0_R { - EM01CTRL0_R::new(((self.bits >> 1) & 1) != 0) + pub fn em01ctrl0(&self) -> Em01ctrl0R { + Em01ctrl0R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - EM01CTRL1 Sync Bust Status"] #[inline(always)] - pub fn em01ctrl1(&self) -> EM01CTRL1_R { - EM01CTRL1_R::new(((self.bits >> 2) & 1) != 0) + pub fn em01ctrl1(&self) -> Em01ctrl1R { + Em01ctrl1R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - EM23CTRL0 Sync Busy Status"] #[inline(always)] - pub fn em23ctrl0(&self) -> EM23CTRL0_R { - EM23CTRL0_R::new(((self.bits >> 3) & 1) != 0) + pub fn em23ctrl0(&self) -> Em23ctrl0R { + Em23ctrl0R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 7 - PFMXCTRL Sync Busy Status"] #[inline(always)] - pub fn pfmxctrl(&self) -> PFMXCTRL_R { - PFMXCTRL_R::new(((self.bits >> 7) & 1) != 0) + pub fn pfmxctrl(&self) -> PfmxctrlR { + PfmxctrlR::new(((self.bits >> 7) & 1) != 0) } } -#[doc = "Syncbusy Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "Syncbusy Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s.rs index 9eb7b39..6c0f3da 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s.rs @@ -1,74 +1,142 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + ctrl: Ctrl, + em01ctrl0: Em01ctrl0, + _reserved3: [u8; 0x04], + em23ctrl0: Em23ctrl0, + _reserved4: [u8; 0x0c], + pfmxctrl: Pfmxctrl, + _reserved5: [u8; 0x04], + if_: If, + ien: Ien, + status: Status, + syncbusy: Syncbusy, + _reserved9: [u8; 0x08], + lock: Lock, + lockstatus: Lockstatus, +} +impl RegisterBlock { #[doc = "0x00 - IPVERSION"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - Control"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x08 - EM01 Configurations"] - pub em01ctrl0: EM01CTRL0, - _reserved3: [u8; 0x04], + #[inline(always)] + pub const fn em01ctrl0(&self) -> &Em01ctrl0 { + &self.em01ctrl0 + } #[doc = "0x10 - EM23 Configurations"] - pub em23ctrl0: EM23CTRL0, - _reserved4: [u8; 0x0c], + #[inline(always)] + pub const fn em23ctrl0(&self) -> &Em23ctrl0 { + &self.em23ctrl0 + } #[doc = "0x20 - PFMX Control Register"] - pub pfmxctrl: PFMXCTRL, - _reserved5: [u8; 0x04], + #[inline(always)] + pub const fn pfmxctrl(&self) -> &Pfmxctrl { + &self.pfmxctrl + } #[doc = "0x28 - Interrupt Flags"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x2c - Interrupt Enable"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x30 - DCDC Status Register"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x34 - Syncbusy Status Register"] - pub syncbusy: SYNCBUSY, - _reserved9: [u8; 0x08], + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } #[doc = "0x40 - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x44 - No Description"] - pub lockstatus: LOCKSTATUS, + #[inline(always)] + pub const fn lockstatus(&self) -> &Lockstatus { + &self.lockstatus + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: IPVERSION\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "IPVERSION"] pub mod ipversion; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: Control\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "Control"] pub mod ctrl; -#[doc = "EM01CTRL0 (rw) register accessor: an alias for `Reg`"] -pub type EM01CTRL0 = crate::Reg; +#[doc = "EM01CTRL0 (rw) register accessor: EM01 Configurations\n\nYou can [`read`](crate::Reg::read) this register and get [`em01ctrl0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em01ctrl0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@em01ctrl0`] +module"] +#[doc(alias = "EM01CTRL0")] +pub type Em01ctrl0 = crate::Reg; #[doc = "EM01 Configurations"] pub mod em01ctrl0; -#[doc = "EM23CTRL0 (rw) register accessor: an alias for `Reg`"] -pub type EM23CTRL0 = crate::Reg; +#[doc = "EM23CTRL0 (rw) register accessor: EM23 Configurations\n\nYou can [`read`](crate::Reg::read) this register and get [`em23ctrl0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em23ctrl0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@em23ctrl0`] +module"] +#[doc(alias = "EM23CTRL0")] +pub type Em23ctrl0 = crate::Reg; #[doc = "EM23 Configurations"] pub mod em23ctrl0; -#[doc = "PFMXCTRL (rw) register accessor: an alias for `Reg`"] -pub type PFMXCTRL = crate::Reg; +#[doc = "PFMXCTRL (rw) register accessor: PFMX Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pfmxctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pfmxctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pfmxctrl`] +module"] +#[doc(alias = "PFMXCTRL")] +pub type Pfmxctrl = crate::Reg; #[doc = "PFMX Control Register"] pub mod pfmxctrl; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: Interrupt Flags\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "Interrupt Flags"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "Interrupt Enable"] pub mod ien; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: DCDC Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "DCDC Status Register"] pub mod status; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: Syncbusy Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "Syncbusy Status Register"] pub mod syncbusy; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "LOCKSTATUS (r) register accessor: an alias for `Reg`"] -pub type LOCKSTATUS = crate::Reg; +#[doc = "LOCKSTATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`lockstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lockstatus`] +module"] +#[doc(alias = "LOCKSTATUS")] +pub type Lockstatus = crate::Reg; #[doc = "No Description"] pub mod lockstatus; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/ctrl.rs index e6d8c72..9e269b9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/ctrl.rs @@ -1,141 +1,104 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - DCDC/Bypass Mode Control"] -pub type MODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "DCDC/Bypass Mode Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: DCDC is OFF, bypass switch is enabled"] - BYPASS = 0, + Bypass = 0, #[doc = "1: Request DCDC regulation, bypass switch disabled"] - DCDCREGULATION = 1, + Dcdcregulation = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as u8 != 0 } } -impl MODE_R { +#[doc = "Field `MODE` reader - DCDC/Bypass Mode Control"] +pub type ModeR = crate::BitReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - false => MODE_A::BYPASS, - true => MODE_A::DCDCREGULATION, + false => Mode::Bypass, + true => Mode::Dcdcregulation, } } - #[doc = "Checks if the value of the field is `BYPASS`"] + #[doc = "DCDC is OFF, bypass switch is enabled"] #[inline(always)] pub fn is_bypass(&self) -> bool { - *self == MODE_A::BYPASS + *self == Mode::Bypass } - #[doc = "Checks if the value of the field is `DCDCREGULATION`"] + #[doc = "Request DCDC regulation, bypass switch disabled"] #[inline(always)] pub fn is_dcdcregulation(&self) -> bool { - *self == MODE_A::DCDCREGULATION + *self == Mode::Dcdcregulation } } #[doc = "Field `MODE` writer - DCDC/Bypass Mode Control"] -pub type MODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, MODE_A, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::BitWriter<'a, REG, Mode>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "DCDC is OFF, bypass switch is enabled"] #[inline(always)] - pub fn bypass(self) -> &'a mut W { - self.variant(MODE_A::BYPASS) + pub fn bypass(self) -> &'a mut crate::W { + self.variant(Mode::Bypass) } #[doc = "Request DCDC regulation, bypass switch disabled"] #[inline(always)] - pub fn dcdcregulation(self) -> &'a mut W { - self.variant(MODE_A::DCDCREGULATION) + pub fn dcdcregulation(self) -> &'a mut crate::W { + self.variant(Mode::Dcdcregulation) } } #[doc = "Field `IPKTMAXCTRL` reader - Ton_max timeout control"] -pub type IPKTMAXCTRL_R = crate::FieldReader; +pub type IpktmaxctrlR = crate::FieldReader; #[doc = "Field `IPKTMAXCTRL` writer - Ton_max timeout control"] -pub type IPKTMAXCTRL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, u8, 5, O>; +pub type IpktmaxctrlW<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bit 0 - DCDC/Bypass Mode Control"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 1) != 0) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 1) != 0) } #[doc = "Bits 4:8 - Ton_max timeout control"] #[inline(always)] - pub fn ipktmaxctrl(&self) -> IPKTMAXCTRL_R { - IPKTMAXCTRL_R::new(((self.bits >> 4) & 0x1f) as u8) + pub fn ipktmaxctrl(&self) -> IpktmaxctrlR { + IpktmaxctrlR::new(((self.bits >> 4) & 0x1f) as u8) } } impl W { #[doc = "Bit 0 - DCDC/Bypass Mode Control"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bits 4:8 - Ton_max timeout control"] #[inline(always)] #[must_use] - pub fn ipktmaxctrl(&mut self) -> IPKTMAXCTRL_W<4> { - IPKTMAXCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ipktmaxctrl(&mut self) -> IpktmaxctrlW { + IpktmaxctrlW::new(self, 4) } } -#[doc = "Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "Control\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0x0100"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0100; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0x0100; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/em01ctrl0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/em01ctrl0.rs index 503526b..7177727 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/em01ctrl0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/em01ctrl0.rs @@ -1,284 +1,258 @@ #[doc = "Register `EM01CTRL0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EM01CTRL0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `IPKVAL` reader - EM01 Peak Current Setting"] -pub type IPKVAL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "EM01 Peak Current Setting\n\nValue on reset: 9"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum IPKVAL_A { +pub enum Ipkval { #[doc = "3: Ipeak = 90mA, Iload = 36mA"] - LOAD36M_A = 3, + Load36mA = 3, #[doc = "4: Ipeak = 100mA, Iload = 40mA"] - LOAD40M_A = 4, + Load40mA = 4, #[doc = "5: Ipeak = 110mA, Iload = 44mA"] - LOAD44M_A = 5, + Load44mA = 5, #[doc = "6: Ipeak = 120mA, Iload = 48mA"] - LOAD48M_A = 6, + Load48mA = 6, #[doc = "7: Ipeak = 130mA, Iload = 52mA"] - LOAD52M_A = 7, + Load52mA = 7, #[doc = "8: Ipeak = 140mA, Iload = 56mA"] - LOAD56M_A = 8, + Load56mA = 8, #[doc = "9: Ipeak = 150mA, Iload = 60mA"] - LOAD60M_A = 9, + Load60mA = 9, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: IPKVAL_A) -> Self { + fn from(variant: Ipkval) -> Self { variant as _ } } -impl IPKVAL_R { +impl crate::FieldSpec for Ipkval { + type Ux = u8; +} +impl crate::IsEnum for Ipkval {} +#[doc = "Field `IPKVAL` reader - EM01 Peak Current Setting"] +pub type IpkvalR = crate::FieldReader; +impl IpkvalR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 3 => Some(IPKVAL_A::LOAD36M_A), - 4 => Some(IPKVAL_A::LOAD40M_A), - 5 => Some(IPKVAL_A::LOAD44M_A), - 6 => Some(IPKVAL_A::LOAD48M_A), - 7 => Some(IPKVAL_A::LOAD52M_A), - 8 => Some(IPKVAL_A::LOAD56M_A), - 9 => Some(IPKVAL_A::LOAD60M_A), + 3 => Some(Ipkval::Load36mA), + 4 => Some(Ipkval::Load40mA), + 5 => Some(Ipkval::Load44mA), + 6 => Some(Ipkval::Load48mA), + 7 => Some(Ipkval::Load52mA), + 8 => Some(Ipkval::Load56mA), + 9 => Some(Ipkval::Load60mA), _ => None, } } - #[doc = "Checks if the value of the field is `LOAD36M_A`"] + #[doc = "Ipeak = 90mA, Iload = 36mA"] #[inline(always)] pub fn is_load36m_a(&self) -> bool { - *self == IPKVAL_A::LOAD36M_A + *self == Ipkval::Load36mA } - #[doc = "Checks if the value of the field is `LOAD40M_A`"] + #[doc = "Ipeak = 100mA, Iload = 40mA"] #[inline(always)] pub fn is_load40m_a(&self) -> bool { - *self == IPKVAL_A::LOAD40M_A + *self == Ipkval::Load40mA } - #[doc = "Checks if the value of the field is `LOAD44M_A`"] + #[doc = "Ipeak = 110mA, Iload = 44mA"] #[inline(always)] pub fn is_load44m_a(&self) -> bool { - *self == IPKVAL_A::LOAD44M_A + *self == Ipkval::Load44mA } - #[doc = "Checks if the value of the field is `LOAD48M_A`"] + #[doc = "Ipeak = 120mA, Iload = 48mA"] #[inline(always)] pub fn is_load48m_a(&self) -> bool { - *self == IPKVAL_A::LOAD48M_A + *self == Ipkval::Load48mA } - #[doc = "Checks if the value of the field is `LOAD52M_A`"] + #[doc = "Ipeak = 130mA, Iload = 52mA"] #[inline(always)] pub fn is_load52m_a(&self) -> bool { - *self == IPKVAL_A::LOAD52M_A + *self == Ipkval::Load52mA } - #[doc = "Checks if the value of the field is `LOAD56M_A`"] + #[doc = "Ipeak = 140mA, Iload = 56mA"] #[inline(always)] pub fn is_load56m_a(&self) -> bool { - *self == IPKVAL_A::LOAD56M_A + *self == Ipkval::Load56mA } - #[doc = "Checks if the value of the field is `LOAD60M_A`"] + #[doc = "Ipeak = 150mA, Iload = 60mA"] #[inline(always)] pub fn is_load60m_a(&self) -> bool { - *self == IPKVAL_A::LOAD60M_A + *self == Ipkval::Load60mA } } #[doc = "Field `IPKVAL` writer - EM01 Peak Current Setting"] -pub type IPKVAL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EM01CTRL0_SPEC, u8, IPKVAL_A, 4, O>; -impl<'a, const O: u8> IPKVAL_W<'a, O> { +pub type IpkvalW<'a, REG> = crate::FieldWriter<'a, REG, 4, Ipkval>; +impl<'a, REG> IpkvalW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ipeak = 90mA, Iload = 36mA"] #[inline(always)] - pub fn load36m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD36M_A) + pub fn load36m_a(self) -> &'a mut crate::W { + self.variant(Ipkval::Load36mA) } #[doc = "Ipeak = 100mA, Iload = 40mA"] #[inline(always)] - pub fn load40m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD40M_A) + pub fn load40m_a(self) -> &'a mut crate::W { + self.variant(Ipkval::Load40mA) } #[doc = "Ipeak = 110mA, Iload = 44mA"] #[inline(always)] - pub fn load44m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD44M_A) + pub fn load44m_a(self) -> &'a mut crate::W { + self.variant(Ipkval::Load44mA) } #[doc = "Ipeak = 120mA, Iload = 48mA"] #[inline(always)] - pub fn load48m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD48M_A) + pub fn load48m_a(self) -> &'a mut crate::W { + self.variant(Ipkval::Load48mA) } #[doc = "Ipeak = 130mA, Iload = 52mA"] #[inline(always)] - pub fn load52m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD52M_A) + pub fn load52m_a(self) -> &'a mut crate::W { + self.variant(Ipkval::Load52mA) } #[doc = "Ipeak = 140mA, Iload = 56mA"] #[inline(always)] - pub fn load56m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD56M_A) + pub fn load56m_a(self) -> &'a mut crate::W { + self.variant(Ipkval::Load56mA) } #[doc = "Ipeak = 150mA, Iload = 60mA"] #[inline(always)] - pub fn load60m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD60M_A) + pub fn load60m_a(self) -> &'a mut crate::W { + self.variant(Ipkval::Load60mA) } } -#[doc = "Field `DRVSPEED` reader - EM01 Drive Speed Setting"] -pub type DRVSPEED_R = crate::FieldReader; #[doc = "EM01 Drive Speed Setting\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DRVSPEED_A { - #[doc = "0: Lowest Efficiency, Lowest EMI.. Small decrease in efficiency from default setting"] - BEST_EMI = 0, - #[doc = "1: Default Efficiency, Acceptable EMI level"] - DEFAULT_SETTING = 1, - #[doc = "2: Small increase in efficiency from the default setting"] - INTERMEDIATE = 2, - #[doc = "3: Highest Efficiency, Highest EMI.. Small increase in efficiency from INTERMEDIATE setting"] - BEST_EFFICIENCY = 3, +pub enum Drvspeed { + #[doc = "0: Not recommended for use (no benefit to this setting)"] + BestEmi = 0, + #[doc = "1: Recommended for use for best efficiency and low EMI"] + DefaultSetting = 1, + #[doc = "2: Not recommended for use (no benefit to this setting)"] + Intermediate = 2, + #[doc = "3: Not recommended for use (no benefit to this setting)"] + BestEfficiency = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DRVSPEED_A) -> Self { + fn from(variant: Drvspeed) -> Self { variant as _ } } -impl DRVSPEED_R { +impl crate::FieldSpec for Drvspeed { + type Ux = u8; +} +impl crate::IsEnum for Drvspeed {} +#[doc = "Field `DRVSPEED` reader - EM01 Drive Speed Setting"] +pub type DrvspeedR = crate::FieldReader; +impl DrvspeedR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DRVSPEED_A { + pub const fn variant(&self) -> Drvspeed { match self.bits { - 0 => DRVSPEED_A::BEST_EMI, - 1 => DRVSPEED_A::DEFAULT_SETTING, - 2 => DRVSPEED_A::INTERMEDIATE, - 3 => DRVSPEED_A::BEST_EFFICIENCY, + 0 => Drvspeed::BestEmi, + 1 => Drvspeed::DefaultSetting, + 2 => Drvspeed::Intermediate, + 3 => Drvspeed::BestEfficiency, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `BEST_EMI`"] + #[doc = "Not recommended for use (no benefit to this setting)"] #[inline(always)] pub fn is_best_emi(&self) -> bool { - *self == DRVSPEED_A::BEST_EMI + *self == Drvspeed::BestEmi } - #[doc = "Checks if the value of the field is `DEFAULT_SETTING`"] + #[doc = "Recommended for use for best efficiency and low EMI"] #[inline(always)] pub fn is_default_setting(&self) -> bool { - *self == DRVSPEED_A::DEFAULT_SETTING + *self == Drvspeed::DefaultSetting } - #[doc = "Checks if the value of the field is `INTERMEDIATE`"] + #[doc = "Not recommended for use (no benefit to this setting)"] #[inline(always)] pub fn is_intermediate(&self) -> bool { - *self == DRVSPEED_A::INTERMEDIATE + *self == Drvspeed::Intermediate } - #[doc = "Checks if the value of the field is `BEST_EFFICIENCY`"] + #[doc = "Not recommended for use (no benefit to this setting)"] #[inline(always)] pub fn is_best_efficiency(&self) -> bool { - *self == DRVSPEED_A::BEST_EFFICIENCY + *self == Drvspeed::BestEfficiency } } #[doc = "Field `DRVSPEED` writer - EM01 Drive Speed Setting"] -pub type DRVSPEED_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EM01CTRL0_SPEC, u8, DRVSPEED_A, 2, O>; -impl<'a, const O: u8> DRVSPEED_W<'a, O> { - #[doc = "Lowest Efficiency, Lowest EMI.. Small decrease in efficiency from default setting"] +pub type DrvspeedW<'a, REG> = crate::FieldWriter<'a, REG, 2, Drvspeed, crate::Safe>; +impl<'a, REG> DrvspeedW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ + #[doc = "Not recommended for use (no benefit to this setting)"] #[inline(always)] - pub fn best_emi(self) -> &'a mut W { - self.variant(DRVSPEED_A::BEST_EMI) + pub fn best_emi(self) -> &'a mut crate::W { + self.variant(Drvspeed::BestEmi) } - #[doc = "Default Efficiency, Acceptable EMI level"] + #[doc = "Recommended for use for best efficiency and low EMI"] #[inline(always)] - pub fn default_setting(self) -> &'a mut W { - self.variant(DRVSPEED_A::DEFAULT_SETTING) + pub fn default_setting(self) -> &'a mut crate::W { + self.variant(Drvspeed::DefaultSetting) } - #[doc = "Small increase in efficiency from the default setting"] + #[doc = "Not recommended for use (no benefit to this setting)"] #[inline(always)] - pub fn intermediate(self) -> &'a mut W { - self.variant(DRVSPEED_A::INTERMEDIATE) + pub fn intermediate(self) -> &'a mut crate::W { + self.variant(Drvspeed::Intermediate) } - #[doc = "Highest Efficiency, Highest EMI.. Small increase in efficiency from INTERMEDIATE setting"] + #[doc = "Not recommended for use (no benefit to this setting)"] #[inline(always)] - pub fn best_efficiency(self) -> &'a mut W { - self.variant(DRVSPEED_A::BEST_EFFICIENCY) + pub fn best_efficiency(self) -> &'a mut crate::W { + self.variant(Drvspeed::BestEfficiency) } } impl R { #[doc = "Bits 0:3 - EM01 Peak Current Setting"] #[inline(always)] - pub fn ipkval(&self) -> IPKVAL_R { - IPKVAL_R::new((self.bits & 0x0f) as u8) + pub fn ipkval(&self) -> IpkvalR { + IpkvalR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - EM01 Drive Speed Setting"] #[inline(always)] - pub fn drvspeed(&self) -> DRVSPEED_R { - DRVSPEED_R::new(((self.bits >> 8) & 3) as u8) + pub fn drvspeed(&self) -> DrvspeedR { + DrvspeedR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - EM01 Peak Current Setting"] #[inline(always)] #[must_use] - pub fn ipkval(&mut self) -> IPKVAL_W<0> { - IPKVAL_W::new(self) + pub fn ipkval(&mut self) -> IpkvalW { + IpkvalW::new(self, 0) } #[doc = "Bits 8:9 - EM01 Drive Speed Setting"] #[inline(always)] #[must_use] - pub fn drvspeed(&mut self) -> DRVSPEED_W<8> { - DRVSPEED_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn drvspeed(&mut self) -> DrvspeedW { + DrvspeedW::new(self, 8) } } -#[doc = "EM01 Configurations\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [em01ctrl0](index.html) module"] -pub struct EM01CTRL0_SPEC; -impl crate::RegisterSpec for EM01CTRL0_SPEC { +#[doc = "EM01 Configurations\n\nYou can [`read`](crate::Reg::read) this register and get [`em01ctrl0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em01ctrl0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Em01ctrl0Spec; +impl crate::RegisterSpec for Em01ctrl0Spec { type Ux = u32; } -#[doc = "`read()` method returns [em01ctrl0::R](R) reader structure"] -impl crate::Readable for EM01CTRL0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [em01ctrl0::W](W) writer structure"] -impl crate::Writable for EM01CTRL0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`em01ctrl0::R`](R) reader structure"] +impl crate::Readable for Em01ctrl0Spec {} +#[doc = "`write(|w| ..)` method takes [`em01ctrl0::W`](W) writer structure"] +impl crate::Writable for Em01ctrl0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EM01CTRL0 to value 0x0109"] -impl crate::Resettable for EM01CTRL0_SPEC { - const RESET_VALUE: Self::Ux = 0x0109; +impl crate::Resettable for Em01ctrl0Spec { + const RESET_VALUE: u32 = 0x0109; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/em23ctrl0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/em23ctrl0.rs index d416313..6d06790 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/em23ctrl0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/em23ctrl0.rs @@ -1,284 +1,193 @@ #[doc = "Register `EM23CTRL0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EM23CTRL0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `IPKVAL` reader - EM23 Peak Current Setting"] -pub type IPKVAL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "EM23 Peak Current Setting\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum IPKVAL_A { - #[doc = "3: Ipeak = 90mA, Iload = 36mA"] - LOAD36M_A = 3, - #[doc = "4: Ipeak = 100mA, Iload = 40mA"] - LOAD40M_A = 4, - #[doc = "5: Ipeak = 110mA, Iload = 44mA"] - LOAD44M_A = 5, - #[doc = "6: Ipeak = 120mA, Iload = 48mA"] - LOAD48M_A = 6, - #[doc = "7: Ipeak = 130mA, Iload = 52mA"] - LOAD52M_A = 7, - #[doc = "8: Ipeak = 140mA, Iload = 56mA"] - LOAD56M_A = 8, - #[doc = "9: Ipeak = 150mA, Iload = 60mA"] - LOAD60M_A = 9, +pub enum Ipkval { + #[doc = "3: Ipeak = 90mA, Iload = 5 mA"] + Load5mA = 3, + #[doc = "9: Ipeak = 150mA, Iload = 10 mA"] + Load10mA = 9, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: IPKVAL_A) -> Self { + fn from(variant: Ipkval) -> Self { variant as _ } } -impl IPKVAL_R { +impl crate::FieldSpec for Ipkval { + type Ux = u8; +} +impl crate::IsEnum for Ipkval {} +#[doc = "Field `IPKVAL` reader - EM23 Peak Current Setting"] +pub type IpkvalR = crate::FieldReader; +impl IpkvalR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 3 => Some(IPKVAL_A::LOAD36M_A), - 4 => Some(IPKVAL_A::LOAD40M_A), - 5 => Some(IPKVAL_A::LOAD44M_A), - 6 => Some(IPKVAL_A::LOAD48M_A), - 7 => Some(IPKVAL_A::LOAD52M_A), - 8 => Some(IPKVAL_A::LOAD56M_A), - 9 => Some(IPKVAL_A::LOAD60M_A), + 3 => Some(Ipkval::Load5mA), + 9 => Some(Ipkval::Load10mA), _ => None, } } - #[doc = "Checks if the value of the field is `LOAD36M_A`"] - #[inline(always)] - pub fn is_load36m_a(&self) -> bool { - *self == IPKVAL_A::LOAD36M_A - } - #[doc = "Checks if the value of the field is `LOAD40M_A`"] - #[inline(always)] - pub fn is_load40m_a(&self) -> bool { - *self == IPKVAL_A::LOAD40M_A - } - #[doc = "Checks if the value of the field is `LOAD44M_A`"] - #[inline(always)] - pub fn is_load44m_a(&self) -> bool { - *self == IPKVAL_A::LOAD44M_A - } - #[doc = "Checks if the value of the field is `LOAD48M_A`"] - #[inline(always)] - pub fn is_load48m_a(&self) -> bool { - *self == IPKVAL_A::LOAD48M_A - } - #[doc = "Checks if the value of the field is `LOAD52M_A`"] + #[doc = "Ipeak = 90mA, Iload = 5 mA"] #[inline(always)] - pub fn is_load52m_a(&self) -> bool { - *self == IPKVAL_A::LOAD52M_A + pub fn is_load5m_a(&self) -> bool { + *self == Ipkval::Load5mA } - #[doc = "Checks if the value of the field is `LOAD56M_A`"] + #[doc = "Ipeak = 150mA, Iload = 10 mA"] #[inline(always)] - pub fn is_load56m_a(&self) -> bool { - *self == IPKVAL_A::LOAD56M_A - } - #[doc = "Checks if the value of the field is `LOAD60M_A`"] - #[inline(always)] - pub fn is_load60m_a(&self) -> bool { - *self == IPKVAL_A::LOAD60M_A + pub fn is_load10m_a(&self) -> bool { + *self == Ipkval::Load10mA } } #[doc = "Field `IPKVAL` writer - EM23 Peak Current Setting"] -pub type IPKVAL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EM23CTRL0_SPEC, u8, IPKVAL_A, 4, O>; -impl<'a, const O: u8> IPKVAL_W<'a, O> { - #[doc = "Ipeak = 90mA, Iload = 36mA"] - #[inline(always)] - pub fn load36m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD36M_A) - } - #[doc = "Ipeak = 100mA, Iload = 40mA"] - #[inline(always)] - pub fn load40m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD40M_A) - } - #[doc = "Ipeak = 110mA, Iload = 44mA"] +pub type IpkvalW<'a, REG> = crate::FieldWriter<'a, REG, 4, Ipkval>; +impl<'a, REG> IpkvalW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ + #[doc = "Ipeak = 90mA, Iload = 5 mA"] #[inline(always)] - pub fn load44m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD44M_A) + pub fn load5m_a(self) -> &'a mut crate::W { + self.variant(Ipkval::Load5mA) } - #[doc = "Ipeak = 120mA, Iload = 48mA"] + #[doc = "Ipeak = 150mA, Iload = 10 mA"] #[inline(always)] - pub fn load48m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD48M_A) - } - #[doc = "Ipeak = 130mA, Iload = 52mA"] - #[inline(always)] - pub fn load52m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD52M_A) - } - #[doc = "Ipeak = 140mA, Iload = 56mA"] - #[inline(always)] - pub fn load56m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD56M_A) - } - #[doc = "Ipeak = 150mA, Iload = 60mA"] - #[inline(always)] - pub fn load60m_a(self) -> &'a mut W { - self.variant(IPKVAL_A::LOAD60M_A) + pub fn load10m_a(self) -> &'a mut crate::W { + self.variant(Ipkval::Load10mA) } } -#[doc = "Field `DRVSPEED` reader - EM23 Drive Speed Setting"] -pub type DRVSPEED_R = crate::FieldReader; #[doc = "EM23 Drive Speed Setting\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DRVSPEED_A { - #[doc = "0: Lowest Efficiency, Lowest EMI.. Small decrease in efficiency from default setting"] - BEST_EMI = 0, - #[doc = "1: Default Efficiency, Acceptable EMI level"] - DEFAULT_SETTING = 1, - #[doc = "2: Small increase in efficiency from the default setting"] - INTERMEDIATE = 2, - #[doc = "3: Highest Efficiency, Highest EMI.. Small increase in efficiency from INTERMEDIATE setting"] - BEST_EFFICIENCY = 3, -} -impl From for u8 { - #[inline(always)] - fn from(variant: DRVSPEED_A) -> Self { +pub enum Drvspeed { + #[doc = "0: Not recommended for use (no benefit to this setting)"] + BestEmi = 0, + #[doc = "1: Recommended for use for best efficiency and low EMI"] + DefaultSetting = 1, + #[doc = "2: Not recommended for use (no benefit to this setting)"] + Intermediate = 2, + #[doc = "3: Not recommended for use (no benefit to this setting)"] + BestEfficiency = 3, +} +impl From for u8 { + #[inline(always)] + fn from(variant: Drvspeed) -> Self { variant as _ } } -impl DRVSPEED_R { +impl crate::FieldSpec for Drvspeed { + type Ux = u8; +} +impl crate::IsEnum for Drvspeed {} +#[doc = "Field `DRVSPEED` reader - EM23 Drive Speed Setting"] +pub type DrvspeedR = crate::FieldReader; +impl DrvspeedR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DRVSPEED_A { + pub const fn variant(&self) -> Drvspeed { match self.bits { - 0 => DRVSPEED_A::BEST_EMI, - 1 => DRVSPEED_A::DEFAULT_SETTING, - 2 => DRVSPEED_A::INTERMEDIATE, - 3 => DRVSPEED_A::BEST_EFFICIENCY, + 0 => Drvspeed::BestEmi, + 1 => Drvspeed::DefaultSetting, + 2 => Drvspeed::Intermediate, + 3 => Drvspeed::BestEfficiency, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `BEST_EMI`"] + #[doc = "Not recommended for use (no benefit to this setting)"] #[inline(always)] pub fn is_best_emi(&self) -> bool { - *self == DRVSPEED_A::BEST_EMI + *self == Drvspeed::BestEmi } - #[doc = "Checks if the value of the field is `DEFAULT_SETTING`"] + #[doc = "Recommended for use for best efficiency and low EMI"] #[inline(always)] pub fn is_default_setting(&self) -> bool { - *self == DRVSPEED_A::DEFAULT_SETTING + *self == Drvspeed::DefaultSetting } - #[doc = "Checks if the value of the field is `INTERMEDIATE`"] + #[doc = "Not recommended for use (no benefit to this setting)"] #[inline(always)] pub fn is_intermediate(&self) -> bool { - *self == DRVSPEED_A::INTERMEDIATE + *self == Drvspeed::Intermediate } - #[doc = "Checks if the value of the field is `BEST_EFFICIENCY`"] + #[doc = "Not recommended for use (no benefit to this setting)"] #[inline(always)] pub fn is_best_efficiency(&self) -> bool { - *self == DRVSPEED_A::BEST_EFFICIENCY + *self == Drvspeed::BestEfficiency } } #[doc = "Field `DRVSPEED` writer - EM23 Drive Speed Setting"] -pub type DRVSPEED_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EM23CTRL0_SPEC, u8, DRVSPEED_A, 2, O>; -impl<'a, const O: u8> DRVSPEED_W<'a, O> { - #[doc = "Lowest Efficiency, Lowest EMI.. Small decrease in efficiency from default setting"] +pub type DrvspeedW<'a, REG> = crate::FieldWriter<'a, REG, 2, Drvspeed, crate::Safe>; +impl<'a, REG> DrvspeedW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ + #[doc = "Not recommended for use (no benefit to this setting)"] #[inline(always)] - pub fn best_emi(self) -> &'a mut W { - self.variant(DRVSPEED_A::BEST_EMI) + pub fn best_emi(self) -> &'a mut crate::W { + self.variant(Drvspeed::BestEmi) } - #[doc = "Default Efficiency, Acceptable EMI level"] + #[doc = "Recommended for use for best efficiency and low EMI"] #[inline(always)] - pub fn default_setting(self) -> &'a mut W { - self.variant(DRVSPEED_A::DEFAULT_SETTING) + pub fn default_setting(self) -> &'a mut crate::W { + self.variant(Drvspeed::DefaultSetting) } - #[doc = "Small increase in efficiency from the default setting"] + #[doc = "Not recommended for use (no benefit to this setting)"] #[inline(always)] - pub fn intermediate(self) -> &'a mut W { - self.variant(DRVSPEED_A::INTERMEDIATE) + pub fn intermediate(self) -> &'a mut crate::W { + self.variant(Drvspeed::Intermediate) } - #[doc = "Highest Efficiency, Highest EMI.. Small increase in efficiency from INTERMEDIATE setting"] + #[doc = "Not recommended for use (no benefit to this setting)"] #[inline(always)] - pub fn best_efficiency(self) -> &'a mut W { - self.variant(DRVSPEED_A::BEST_EFFICIENCY) + pub fn best_efficiency(self) -> &'a mut crate::W { + self.variant(Drvspeed::BestEfficiency) } } impl R { #[doc = "Bits 0:3 - EM23 Peak Current Setting"] #[inline(always)] - pub fn ipkval(&self) -> IPKVAL_R { - IPKVAL_R::new((self.bits & 0x0f) as u8) + pub fn ipkval(&self) -> IpkvalR { + IpkvalR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - EM23 Drive Speed Setting"] #[inline(always)] - pub fn drvspeed(&self) -> DRVSPEED_R { - DRVSPEED_R::new(((self.bits >> 8) & 3) as u8) + pub fn drvspeed(&self) -> DrvspeedR { + DrvspeedR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - EM23 Peak Current Setting"] #[inline(always)] #[must_use] - pub fn ipkval(&mut self) -> IPKVAL_W<0> { - IPKVAL_W::new(self) + pub fn ipkval(&mut self) -> IpkvalW { + IpkvalW::new(self, 0) } #[doc = "Bits 8:9 - EM23 Drive Speed Setting"] #[inline(always)] #[must_use] - pub fn drvspeed(&mut self) -> DRVSPEED_W<8> { - DRVSPEED_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn drvspeed(&mut self) -> DrvspeedW { + DrvspeedW::new(self, 8) } } -#[doc = "EM23 Configurations\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [em23ctrl0](index.html) module"] -pub struct EM23CTRL0_SPEC; -impl crate::RegisterSpec for EM23CTRL0_SPEC { +#[doc = "EM23 Configurations\n\nYou can [`read`](crate::Reg::read) this register and get [`em23ctrl0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em23ctrl0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Em23ctrl0Spec; +impl crate::RegisterSpec for Em23ctrl0Spec { type Ux = u32; } -#[doc = "`read()` method returns [em23ctrl0::R](R) reader structure"] -impl crate::Readable for EM23CTRL0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [em23ctrl0::W](W) writer structure"] -impl crate::Writable for EM23CTRL0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`em23ctrl0::R`](R) reader structure"] +impl crate::Readable for Em23ctrl0Spec {} +#[doc = "`write(|w| ..)` method takes [`em23ctrl0::W`](W) writer structure"] +impl crate::Writable for Em23ctrl0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EM23CTRL0 to value 0x0103"] -impl crate::Resettable for EM23CTRL0_SPEC { - const RESET_VALUE: Self::Ux = 0x0103; +impl crate::Resettable for Em23ctrl0Spec { + const RESET_VALUE: u32 = 0x0103; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/ien.rs index 5153d2f..3ae2911 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/ien.rs @@ -1,215 +1,175 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `BYPSW` reader - Bypass Switch Enabled Interrupt Enable"] -pub type BYPSW_R = crate::BitReader; +pub type BypswR = crate::BitReader; #[doc = "Field `BYPSW` writer - Bypass Switch Enabled Interrupt Enable"] -pub type BYPSW_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type BypswW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WARM` reader - DCDC Warmup Time Done Interrupt Enable"] -pub type WARM_R = crate::BitReader; +pub type WarmR = crate::BitReader; #[doc = "Field `WARM` writer - DCDC Warmup Time Done Interrupt Enable"] -pub type WARM_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type WarmW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RUNNING` reader - DCDC Running Interrupt Enable"] -pub type RUNNING_R = crate::BitReader; +pub type RunningR = crate::BitReader; #[doc = "Field `RUNNING` writer - DCDC Running Interrupt Enable"] -pub type RUNNING_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RunningW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VREGINLOW` reader - VREGIN below threshold Interrupt Enable"] -pub type VREGINLOW_R = crate::BitReader; +pub type VreginlowR = crate::BitReader; #[doc = "Field `VREGINLOW` writer - VREGIN below threshold Interrupt Enable"] -pub type VREGINLOW_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type VreginlowW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VREGINHIGH` reader - VREGIN above threshold Interrupt Enable"] -pub type VREGINHIGH_R = crate::BitReader; +pub type VreginhighR = crate::BitReader; #[doc = "Field `VREGINHIGH` writer - VREGIN above threshold Interrupt Enable"] -pub type VREGINHIGH_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type VreginhighW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REGULATION` reader - DCDC in Regulation Interrupt Enable"] -pub type REGULATION_R = crate::BitReader; +pub type RegulationR = crate::BitReader; #[doc = "Field `REGULATION` writer - DCDC in Regulation Interrupt Enable"] -pub type REGULATION_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RegulationW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TMAX` reader - Ton_max Timeout Interrupt Enable"] -pub type TMAX_R = crate::BitReader; +pub type TmaxR = crate::BitReader; #[doc = "Field `TMAX` writer - Ton_max Timeout Interrupt Enable"] -pub type TMAX_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TmaxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4ERR` reader - EM4 Entry Req Interrupt Enable"] -pub type EM4ERR_R = crate::BitReader; +pub type Em4errR = crate::BitReader; #[doc = "Field `EM4ERR` writer - EM4 Entry Req Interrupt Enable"] -pub type EM4ERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em4errW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PPMODE` reader - Pulse Pairing Mode Interrupt Enable"] -pub type PPMODE_R = crate::BitReader; +pub type PpmodeR = crate::BitReader; #[doc = "Field `PPMODE` writer - Pulse Pairing Mode Interrupt Enable"] -pub type PPMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PpmodeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PFMXMODE` reader - PFMX Mode Interrupt Enable"] -pub type PFMXMODE_R = crate::BitReader; +pub type PfmxmodeR = crate::BitReader; #[doc = "Field `PFMXMODE` writer - PFMX Mode Interrupt Enable"] -pub type PFMXMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PfmxmodeW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Bypass Switch Enabled Interrupt Enable"] #[inline(always)] - pub fn bypsw(&self) -> BYPSW_R { - BYPSW_R::new((self.bits & 1) != 0) + pub fn bypsw(&self) -> BypswR { + BypswR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DCDC Warmup Time Done Interrupt Enable"] #[inline(always)] - pub fn warm(&self) -> WARM_R { - WARM_R::new(((self.bits >> 1) & 1) != 0) + pub fn warm(&self) -> WarmR { + WarmR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DCDC Running Interrupt Enable"] #[inline(always)] - pub fn running(&self) -> RUNNING_R { - RUNNING_R::new(((self.bits >> 2) & 1) != 0) + pub fn running(&self) -> RunningR { + RunningR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - VREGIN below threshold Interrupt Enable"] #[inline(always)] - pub fn vreginlow(&self) -> VREGINLOW_R { - VREGINLOW_R::new(((self.bits >> 3) & 1) != 0) + pub fn vreginlow(&self) -> VreginlowR { + VreginlowR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - VREGIN above threshold Interrupt Enable"] #[inline(always)] - pub fn vreginhigh(&self) -> VREGINHIGH_R { - VREGINHIGH_R::new(((self.bits >> 4) & 1) != 0) + pub fn vreginhigh(&self) -> VreginhighR { + VreginhighR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DCDC in Regulation Interrupt Enable"] #[inline(always)] - pub fn regulation(&self) -> REGULATION_R { - REGULATION_R::new(((self.bits >> 5) & 1) != 0) + pub fn regulation(&self) -> RegulationR { + RegulationR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Ton_max Timeout Interrupt Enable"] #[inline(always)] - pub fn tmax(&self) -> TMAX_R { - TMAX_R::new(((self.bits >> 6) & 1) != 0) + pub fn tmax(&self) -> TmaxR { + TmaxR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - EM4 Entry Req Interrupt Enable"] #[inline(always)] - pub fn em4err(&self) -> EM4ERR_R { - EM4ERR_R::new(((self.bits >> 7) & 1) != 0) + pub fn em4err(&self) -> Em4errR { + Em4errR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Pulse Pairing Mode Interrupt Enable"] #[inline(always)] - pub fn ppmode(&self) -> PPMODE_R { - PPMODE_R::new(((self.bits >> 8) & 1) != 0) + pub fn ppmode(&self) -> PpmodeR { + PpmodeR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - PFMX Mode Interrupt Enable"] #[inline(always)] - pub fn pfmxmode(&self) -> PFMXMODE_R { - PFMXMODE_R::new(((self.bits >> 9) & 1) != 0) + pub fn pfmxmode(&self) -> PfmxmodeR { + PfmxmodeR::new(((self.bits >> 9) & 1) != 0) } } impl W { #[doc = "Bit 0 - Bypass Switch Enabled Interrupt Enable"] #[inline(always)] #[must_use] - pub fn bypsw(&mut self) -> BYPSW_W<0> { - BYPSW_W::new(self) + pub fn bypsw(&mut self) -> BypswW { + BypswW::new(self, 0) } #[doc = "Bit 1 - DCDC Warmup Time Done Interrupt Enable"] #[inline(always)] #[must_use] - pub fn warm(&mut self) -> WARM_W<1> { - WARM_W::new(self) + pub fn warm(&mut self) -> WarmW { + WarmW::new(self, 1) } #[doc = "Bit 2 - DCDC Running Interrupt Enable"] #[inline(always)] #[must_use] - pub fn running(&mut self) -> RUNNING_W<2> { - RUNNING_W::new(self) + pub fn running(&mut self) -> RunningW { + RunningW::new(self, 2) } #[doc = "Bit 3 - VREGIN below threshold Interrupt Enable"] #[inline(always)] #[must_use] - pub fn vreginlow(&mut self) -> VREGINLOW_W<3> { - VREGINLOW_W::new(self) + pub fn vreginlow(&mut self) -> VreginlowW { + VreginlowW::new(self, 3) } #[doc = "Bit 4 - VREGIN above threshold Interrupt Enable"] #[inline(always)] #[must_use] - pub fn vreginhigh(&mut self) -> VREGINHIGH_W<4> { - VREGINHIGH_W::new(self) + pub fn vreginhigh(&mut self) -> VreginhighW { + VreginhighW::new(self, 4) } #[doc = "Bit 5 - DCDC in Regulation Interrupt Enable"] #[inline(always)] #[must_use] - pub fn regulation(&mut self) -> REGULATION_W<5> { - REGULATION_W::new(self) + pub fn regulation(&mut self) -> RegulationW { + RegulationW::new(self, 5) } #[doc = "Bit 6 - Ton_max Timeout Interrupt Enable"] #[inline(always)] #[must_use] - pub fn tmax(&mut self) -> TMAX_W<6> { - TMAX_W::new(self) + pub fn tmax(&mut self) -> TmaxW { + TmaxW::new(self, 6) } #[doc = "Bit 7 - EM4 Entry Req Interrupt Enable"] #[inline(always)] #[must_use] - pub fn em4err(&mut self) -> EM4ERR_W<7> { - EM4ERR_W::new(self) + pub fn em4err(&mut self) -> Em4errW { + Em4errW::new(self, 7) } #[doc = "Bit 8 - Pulse Pairing Mode Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ppmode(&mut self) -> PPMODE_W<8> { - PPMODE_W::new(self) + pub fn ppmode(&mut self) -> PpmodeW { + PpmodeW::new(self, 8) } #[doc = "Bit 9 - PFMX Mode Interrupt Enable"] #[inline(always)] #[must_use] - pub fn pfmxmode(&mut self) -> PFMXMODE_W<9> { - PFMXMODE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pfmxmode(&mut self) -> PfmxmodeW { + PfmxmodeW::new(self, 9) } } -#[doc = "Interrupt Enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/if_.rs index c3fdb3a..a465181 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/if_.rs @@ -1,215 +1,175 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `BYPSW` reader - Bypass Switch Enabled"] -pub type BYPSW_R = crate::BitReader; +pub type BypswR = crate::BitReader; #[doc = "Field `BYPSW` writer - Bypass Switch Enabled"] -pub type BYPSW_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type BypswW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WARM` reader - DCDC Warmup Time Done"] -pub type WARM_R = crate::BitReader; +pub type WarmR = crate::BitReader; #[doc = "Field `WARM` writer - DCDC Warmup Time Done"] -pub type WARM_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type WarmW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RUNNING` reader - DCDC Running"] -pub type RUNNING_R = crate::BitReader; +pub type RunningR = crate::BitReader; #[doc = "Field `RUNNING` writer - DCDC Running"] -pub type RUNNING_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RunningW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VREGINLOW` reader - VREGIN below threshold"] -pub type VREGINLOW_R = crate::BitReader; +pub type VreginlowR = crate::BitReader; #[doc = "Field `VREGINLOW` writer - VREGIN below threshold"] -pub type VREGINLOW_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type VreginlowW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VREGINHIGH` reader - VREGIN above threshold"] -pub type VREGINHIGH_R = crate::BitReader; +pub type VreginhighR = crate::BitReader; #[doc = "Field `VREGINHIGH` writer - VREGIN above threshold"] -pub type VREGINHIGH_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type VreginhighW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REGULATION` reader - DCDC in regulation"] -pub type REGULATION_R = crate::BitReader; +pub type RegulationR = crate::BitReader; #[doc = "Field `REGULATION` writer - DCDC in regulation"] -pub type REGULATION_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RegulationW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TMAX` reader - Ton_max Timeout Reached"] -pub type TMAX_R = crate::BitReader; +pub type TmaxR = crate::BitReader; #[doc = "Field `TMAX` writer - Ton_max Timeout Reached"] -pub type TMAX_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TmaxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4ERR` reader - EM4 Entry Request Error"] -pub type EM4ERR_R = crate::BitReader; +pub type Em4errR = crate::BitReader; #[doc = "Field `EM4ERR` writer - EM4 Entry Request Error"] -pub type EM4ERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Em4errW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PPMODE` reader - Entered Pulse Pairing mode"] -pub type PPMODE_R = crate::BitReader; +pub type PpmodeR = crate::BitReader; #[doc = "Field `PPMODE` writer - Entered Pulse Pairing mode"] -pub type PPMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PpmodeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PFMXMODE` reader - Entered PFMX mode"] -pub type PFMXMODE_R = crate::BitReader; +pub type PfmxmodeR = crate::BitReader; #[doc = "Field `PFMXMODE` writer - Entered PFMX mode"] -pub type PFMXMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PfmxmodeW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Bypass Switch Enabled"] #[inline(always)] - pub fn bypsw(&self) -> BYPSW_R { - BYPSW_R::new((self.bits & 1) != 0) + pub fn bypsw(&self) -> BypswR { + BypswR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DCDC Warmup Time Done"] #[inline(always)] - pub fn warm(&self) -> WARM_R { - WARM_R::new(((self.bits >> 1) & 1) != 0) + pub fn warm(&self) -> WarmR { + WarmR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DCDC Running"] #[inline(always)] - pub fn running(&self) -> RUNNING_R { - RUNNING_R::new(((self.bits >> 2) & 1) != 0) + pub fn running(&self) -> RunningR { + RunningR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - VREGIN below threshold"] #[inline(always)] - pub fn vreginlow(&self) -> VREGINLOW_R { - VREGINLOW_R::new(((self.bits >> 3) & 1) != 0) + pub fn vreginlow(&self) -> VreginlowR { + VreginlowR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - VREGIN above threshold"] #[inline(always)] - pub fn vreginhigh(&self) -> VREGINHIGH_R { - VREGINHIGH_R::new(((self.bits >> 4) & 1) != 0) + pub fn vreginhigh(&self) -> VreginhighR { + VreginhighR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DCDC in regulation"] #[inline(always)] - pub fn regulation(&self) -> REGULATION_R { - REGULATION_R::new(((self.bits >> 5) & 1) != 0) + pub fn regulation(&self) -> RegulationR { + RegulationR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Ton_max Timeout Reached"] #[inline(always)] - pub fn tmax(&self) -> TMAX_R { - TMAX_R::new(((self.bits >> 6) & 1) != 0) + pub fn tmax(&self) -> TmaxR { + TmaxR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - EM4 Entry Request Error"] #[inline(always)] - pub fn em4err(&self) -> EM4ERR_R { - EM4ERR_R::new(((self.bits >> 7) & 1) != 0) + pub fn em4err(&self) -> Em4errR { + Em4errR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Entered Pulse Pairing mode"] #[inline(always)] - pub fn ppmode(&self) -> PPMODE_R { - PPMODE_R::new(((self.bits >> 8) & 1) != 0) + pub fn ppmode(&self) -> PpmodeR { + PpmodeR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Entered PFMX mode"] #[inline(always)] - pub fn pfmxmode(&self) -> PFMXMODE_R { - PFMXMODE_R::new(((self.bits >> 9) & 1) != 0) + pub fn pfmxmode(&self) -> PfmxmodeR { + PfmxmodeR::new(((self.bits >> 9) & 1) != 0) } } impl W { #[doc = "Bit 0 - Bypass Switch Enabled"] #[inline(always)] #[must_use] - pub fn bypsw(&mut self) -> BYPSW_W<0> { - BYPSW_W::new(self) + pub fn bypsw(&mut self) -> BypswW { + BypswW::new(self, 0) } #[doc = "Bit 1 - DCDC Warmup Time Done"] #[inline(always)] #[must_use] - pub fn warm(&mut self) -> WARM_W<1> { - WARM_W::new(self) + pub fn warm(&mut self) -> WarmW { + WarmW::new(self, 1) } #[doc = "Bit 2 - DCDC Running"] #[inline(always)] #[must_use] - pub fn running(&mut self) -> RUNNING_W<2> { - RUNNING_W::new(self) + pub fn running(&mut self) -> RunningW { + RunningW::new(self, 2) } #[doc = "Bit 3 - VREGIN below threshold"] #[inline(always)] #[must_use] - pub fn vreginlow(&mut self) -> VREGINLOW_W<3> { - VREGINLOW_W::new(self) + pub fn vreginlow(&mut self) -> VreginlowW { + VreginlowW::new(self, 3) } #[doc = "Bit 4 - VREGIN above threshold"] #[inline(always)] #[must_use] - pub fn vreginhigh(&mut self) -> VREGINHIGH_W<4> { - VREGINHIGH_W::new(self) + pub fn vreginhigh(&mut self) -> VreginhighW { + VreginhighW::new(self, 4) } #[doc = "Bit 5 - DCDC in regulation"] #[inline(always)] #[must_use] - pub fn regulation(&mut self) -> REGULATION_W<5> { - REGULATION_W::new(self) + pub fn regulation(&mut self) -> RegulationW { + RegulationW::new(self, 5) } #[doc = "Bit 6 - Ton_max Timeout Reached"] #[inline(always)] #[must_use] - pub fn tmax(&mut self) -> TMAX_W<6> { - TMAX_W::new(self) + pub fn tmax(&mut self) -> TmaxW { + TmaxW::new(self, 6) } #[doc = "Bit 7 - EM4 Entry Request Error"] #[inline(always)] #[must_use] - pub fn em4err(&mut self) -> EM4ERR_W<7> { - EM4ERR_W::new(self) + pub fn em4err(&mut self) -> Em4errW { + Em4errW::new(self, 7) } #[doc = "Bit 8 - Entered Pulse Pairing mode"] #[inline(always)] #[must_use] - pub fn ppmode(&mut self) -> PPMODE_W<8> { - PPMODE_W::new(self) + pub fn ppmode(&mut self) -> PpmodeW { + PpmodeW::new(self, 8) } #[doc = "Bit 9 - Entered PFMX mode"] #[inline(always)] #[must_use] - pub fn pfmxmode(&mut self) -> PFMXMODE_W<9> { - PFMXMODE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pfmxmode(&mut self) -> PfmxmodeW { + PfmxmodeW::new(self, 9) } } -#[doc = "Interrupt Flags\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "Interrupt Flags\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/ipversion.rs index 44b0ae3..09a3978 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IPVERSION"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IPVERSION"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "IPVERSION\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "IPVERSION\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/lock.rs index 182454f..a909296 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Configuration Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "43981: UNLOCKKEY"] - UNLOCKKEY = 43981, + Unlockkey = 43981, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Configuration Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "UNLOCKKEY"] #[inline(always)] - pub fn unlockkey(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCKKEY) + pub fn unlockkey(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlockkey) } } impl W { #[doc = "Bits 0:15 - Configuration Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/lockstatus.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/lockstatus.rs index 516b6c0..d4ab717 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/lockstatus.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/lockstatus.rs @@ -1,71 +1,56 @@ #[doc = "Register `LOCKSTATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `LOCK` reader - Lock Status"] -pub type LOCK_R = crate::BitReader; +pub type R = crate::R; #[doc = "Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCK_A { +pub enum Lock { #[doc = "0: Unlocked State"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: LOCKED STATE"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCK_A) -> Self { + fn from(variant: Lock) -> Self { variant as u8 != 0 } } -impl LOCK_R { +#[doc = "Field `LOCK` reader - Lock Status"] +pub type LockR = crate::BitReader; +impl LockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCK_A { + pub const fn variant(&self) -> Lock { match self.bits { - false => LOCK_A::UNLOCKED, - true => LOCK_A::LOCKED, + false => Lock::Unlocked, + true => Lock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "Unlocked State"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCK_A::UNLOCKED + *self == Lock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "LOCKED STATE"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCK_A::LOCKED + *self == Lock::Locked } } impl R { #[doc = "Bit 0 - Lock Status"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new((self.bits & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new((self.bits & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lockstatus](index.html) module"] -pub struct LOCKSTATUS_SPEC; -impl crate::RegisterSpec for LOCKSTATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`lockstatus::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockstatusSpec; +impl crate::RegisterSpec for LockstatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [lockstatus::R](R) reader structure"] -impl crate::Readable for LOCKSTATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`lockstatus::R`](R) reader structure"] +impl crate::Readable for LockstatusSpec {} #[doc = "`reset()` method sets LOCKSTATUS to value 0"] -impl crate::Resettable for LOCKSTATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LockstatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/pfmxctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/pfmxctrl.rs index 8efe48d..6403f45 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/pfmxctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/pfmxctrl.rs @@ -1,95 +1,215 @@ #[doc = "Register `PFMXCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; +pub type R = crate::R; +#[doc = "Register `PFMXCTRL` writer"] +pub type W = crate::W; +#[doc = "PFMX mode Peak Current Setting\n\nValue on reset: 12"] +#[derive(Clone, Copy, Debug, PartialEq, Eq)] +#[repr(u8)] +pub enum Ipkval { + #[doc = "3: Ipeak = 90 mA, Iload = 50 mA"] + Load50ma = 3, + #[doc = "4: Ipeak = 100 mA, Iload = 65 mA"] + Load65ma = 4, + #[doc = "5: Ipeak = 110 mA, Iload = 73 mA"] + Load73ma = 5, + #[doc = "6: Ipeak = 120 mA, Iload = 80 mA"] + Load80ma = 6, + #[doc = "7: Ipeak = 130 mA, Iload = 86 mA"] + Load86ma = 7, + #[doc = "8: Ipeak = 140 mA, Iload = 93 mA"] + Load93ma = 8, + #[doc = "9: Ipeak = 150 mA, Iload = 100 mA"] + Load100ma = 9, + #[doc = "10: Ipeak = 160 mA, Iload = 106 mA"] + Load106ma = 10, + #[doc = "11: Ipeak = 170 mA, Iload = 113 mA"] + Load113ma = 11, + #[doc = "12: Ipeak = 180 mA, Iload = 120 mA"] + Load120ma = 12, +} +impl From for u8 { #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 + fn from(variant: Ipkval) -> Self { + variant as _ } } -impl From> for R { +impl crate::FieldSpec for Ipkval { + type Ux = u8; +} +impl crate::IsEnum for Ipkval {} +#[doc = "Field `IPKVAL` reader - PFMX mode Peak Current Setting"] +pub type IpkvalR = crate::FieldReader; +impl IpkvalR { + #[doc = "Get enumerated values variant"] #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) + pub const fn variant(&self) -> Option { + match self.bits { + 3 => Some(Ipkval::Load50ma), + 4 => Some(Ipkval::Load65ma), + 5 => Some(Ipkval::Load73ma), + 6 => Some(Ipkval::Load80ma), + 7 => Some(Ipkval::Load86ma), + 8 => Some(Ipkval::Load93ma), + 9 => Some(Ipkval::Load100ma), + 10 => Some(Ipkval::Load106ma), + 11 => Some(Ipkval::Load113ma), + 12 => Some(Ipkval::Load120ma), + _ => None, + } } -} -#[doc = "Register `PFMXCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; + #[doc = "Ipeak = 90 mA, Iload = 50 mA"] #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 + pub fn is_load50ma(&self) -> bool { + *self == Ipkval::Load50ma } -} -impl core::ops::DerefMut for W { + #[doc = "Ipeak = 100 mA, Iload = 65 mA"] #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 + pub fn is_load65ma(&self) -> bool { + *self == Ipkval::Load65ma } -} -impl From> for W { + #[doc = "Ipeak = 110 mA, Iload = 73 mA"] + #[inline(always)] + pub fn is_load73ma(&self) -> bool { + *self == Ipkval::Load73ma + } + #[doc = "Ipeak = 120 mA, Iload = 80 mA"] + #[inline(always)] + pub fn is_load80ma(&self) -> bool { + *self == Ipkval::Load80ma + } + #[doc = "Ipeak = 130 mA, Iload = 86 mA"] #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) + pub fn is_load86ma(&self) -> bool { + *self == Ipkval::Load86ma + } + #[doc = "Ipeak = 140 mA, Iload = 93 mA"] + #[inline(always)] + pub fn is_load93ma(&self) -> bool { + *self == Ipkval::Load93ma + } + #[doc = "Ipeak = 150 mA, Iload = 100 mA"] + #[inline(always)] + pub fn is_load100ma(&self) -> bool { + *self == Ipkval::Load100ma + } + #[doc = "Ipeak = 160 mA, Iload = 106 mA"] + #[inline(always)] + pub fn is_load106ma(&self) -> bool { + *self == Ipkval::Load106ma + } + #[doc = "Ipeak = 170 mA, Iload = 113 mA"] + #[inline(always)] + pub fn is_load113ma(&self) -> bool { + *self == Ipkval::Load113ma + } + #[doc = "Ipeak = 180 mA, Iload = 120 mA"] + #[inline(always)] + pub fn is_load120ma(&self) -> bool { + *self == Ipkval::Load120ma } } -#[doc = "Field `IPKVAL` reader - PFMX mode Peak Current Setting"] -pub type IPKVAL_R = crate::FieldReader; #[doc = "Field `IPKVAL` writer - PFMX mode Peak Current Setting"] -pub type IPKVAL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PFMXCTRL_SPEC, u8, u8, 4, O>; +pub type IpkvalW<'a, REG> = crate::FieldWriter<'a, REG, 4, Ipkval>; +impl<'a, REG> IpkvalW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ + #[doc = "Ipeak = 90 mA, Iload = 50 mA"] + #[inline(always)] + pub fn load50ma(self) -> &'a mut crate::W { + self.variant(Ipkval::Load50ma) + } + #[doc = "Ipeak = 100 mA, Iload = 65 mA"] + #[inline(always)] + pub fn load65ma(self) -> &'a mut crate::W { + self.variant(Ipkval::Load65ma) + } + #[doc = "Ipeak = 110 mA, Iload = 73 mA"] + #[inline(always)] + pub fn load73ma(self) -> &'a mut crate::W { + self.variant(Ipkval::Load73ma) + } + #[doc = "Ipeak = 120 mA, Iload = 80 mA"] + #[inline(always)] + pub fn load80ma(self) -> &'a mut crate::W { + self.variant(Ipkval::Load80ma) + } + #[doc = "Ipeak = 130 mA, Iload = 86 mA"] + #[inline(always)] + pub fn load86ma(self) -> &'a mut crate::W { + self.variant(Ipkval::Load86ma) + } + #[doc = "Ipeak = 140 mA, Iload = 93 mA"] + #[inline(always)] + pub fn load93ma(self) -> &'a mut crate::W { + self.variant(Ipkval::Load93ma) + } + #[doc = "Ipeak = 150 mA, Iload = 100 mA"] + #[inline(always)] + pub fn load100ma(self) -> &'a mut crate::W { + self.variant(Ipkval::Load100ma) + } + #[doc = "Ipeak = 160 mA, Iload = 106 mA"] + #[inline(always)] + pub fn load106ma(self) -> &'a mut crate::W { + self.variant(Ipkval::Load106ma) + } + #[doc = "Ipeak = 170 mA, Iload = 113 mA"] + #[inline(always)] + pub fn load113ma(self) -> &'a mut crate::W { + self.variant(Ipkval::Load113ma) + } + #[doc = "Ipeak = 180 mA, Iload = 120 mA"] + #[inline(always)] + pub fn load120ma(self) -> &'a mut crate::W { + self.variant(Ipkval::Load120ma) + } +} #[doc = "Field `IPKTMAXCTRL` reader - Ton_max timeout control"] -pub type IPKTMAXCTRL_R = crate::FieldReader; +pub type IpktmaxctrlR = crate::FieldReader; #[doc = "Field `IPKTMAXCTRL` writer - Ton_max timeout control"] -pub type IPKTMAXCTRL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PFMXCTRL_SPEC, u8, u8, 5, O>; +pub type IpktmaxctrlW<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bits 0:3 - PFMX mode Peak Current Setting"] #[inline(always)] - pub fn ipkval(&self) -> IPKVAL_R { - IPKVAL_R::new((self.bits & 0x0f) as u8) + pub fn ipkval(&self) -> IpkvalR { + IpkvalR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:12 - Ton_max timeout control"] #[inline(always)] - pub fn ipktmaxctrl(&self) -> IPKTMAXCTRL_R { - IPKTMAXCTRL_R::new(((self.bits >> 8) & 0x1f) as u8) + pub fn ipktmaxctrl(&self) -> IpktmaxctrlR { + IpktmaxctrlR::new(((self.bits >> 8) & 0x1f) as u8) } } impl W { #[doc = "Bits 0:3 - PFMX mode Peak Current Setting"] #[inline(always)] #[must_use] - pub fn ipkval(&mut self) -> IPKVAL_W<0> { - IPKVAL_W::new(self) + pub fn ipkval(&mut self) -> IpkvalW { + IpkvalW::new(self, 0) } #[doc = "Bits 8:12 - Ton_max timeout control"] #[inline(always)] #[must_use] - pub fn ipktmaxctrl(&mut self) -> IPKTMAXCTRL_W<8> { - IPKTMAXCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ipktmaxctrl(&mut self) -> IpktmaxctrlW { + IpktmaxctrlW::new(self, 8) } } -#[doc = "PFMX Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pfmxctrl](index.html) module"] -pub struct PFMXCTRL_SPEC; -impl crate::RegisterSpec for PFMXCTRL_SPEC { +#[doc = "PFMX Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pfmxctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pfmxctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PfmxctrlSpec; +impl crate::RegisterSpec for PfmxctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [pfmxctrl::R](R) reader structure"] -impl crate::Readable for PFMXCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [pfmxctrl::W](W) writer structure"] -impl crate::Writable for PFMXCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`pfmxctrl::R`](R) reader structure"] +impl crate::Readable for PfmxctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`pfmxctrl::W`](W) writer structure"] +impl crate::Writable for PfmxctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } -#[doc = "`reset()` method sets PFMXCTRL to value 0x0b0c"] -impl crate::Resettable for PFMXCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0b0c; +#[doc = "`reset()` method sets PFMXCTRL to value 0x0c0c"] +impl crate::Resettable for PfmxctrlSpec { + const RESET_VALUE: u32 = 0x0c0c; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/status.rs index e8dc104..65b944d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/status.rs @@ -1,79 +1,64 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `BYPSW` reader - Bypass Switch is currently enabled"] -pub type BYPSW_R = crate::BitReader; +pub type BypswR = crate::BitReader; #[doc = "Field `WARM` reader - DCDC Warmup Done"] -pub type WARM_R = crate::BitReader; +pub type WarmR = crate::BitReader; #[doc = "Field `RUNNING` reader - DCDC is running"] -pub type RUNNING_R = crate::BitReader; -#[doc = "Field `VREGIN` reader - VREGIN comparator status"] -pub type VREGIN_R = crate::BitReader; +pub type RunningR = crate::BitReader; +#[doc = "Field `VREGIN` reader - VREGVDD comparator status"] +pub type VreginR = crate::BitReader; #[doc = "Field `BYPCMPOUT` reader - Bypass Comparator Output"] -pub type BYPCMPOUT_R = crate::BitReader; +pub type BypcmpoutR = crate::BitReader; #[doc = "Field `PPMODE` reader - DCDC in pulse-pairing mode"] -pub type PPMODE_R = crate::BitReader; +pub type PpmodeR = crate::BitReader; #[doc = "Field `PFMXMODE` reader - DCDC in PFMX mode"] -pub type PFMXMODE_R = crate::BitReader; +pub type PfmxmodeR = crate::BitReader; impl R { #[doc = "Bit 0 - Bypass Switch is currently enabled"] #[inline(always)] - pub fn bypsw(&self) -> BYPSW_R { - BYPSW_R::new((self.bits & 1) != 0) + pub fn bypsw(&self) -> BypswR { + BypswR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DCDC Warmup Done"] #[inline(always)] - pub fn warm(&self) -> WARM_R { - WARM_R::new(((self.bits >> 1) & 1) != 0) + pub fn warm(&self) -> WarmR { + WarmR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DCDC is running"] #[inline(always)] - pub fn running(&self) -> RUNNING_R { - RUNNING_R::new(((self.bits >> 2) & 1) != 0) + pub fn running(&self) -> RunningR { + RunningR::new(((self.bits >> 2) & 1) != 0) } - #[doc = "Bit 3 - VREGIN comparator status"] + #[doc = "Bit 3 - VREGVDD comparator status"] #[inline(always)] - pub fn vregin(&self) -> VREGIN_R { - VREGIN_R::new(((self.bits >> 3) & 1) != 0) + pub fn vregin(&self) -> VreginR { + VreginR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Bypass Comparator Output"] #[inline(always)] - pub fn bypcmpout(&self) -> BYPCMPOUT_R { - BYPCMPOUT_R::new(((self.bits >> 4) & 1) != 0) + pub fn bypcmpout(&self) -> BypcmpoutR { + BypcmpoutR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 8 - DCDC in pulse-pairing mode"] #[inline(always)] - pub fn ppmode(&self) -> PPMODE_R { - PPMODE_R::new(((self.bits >> 8) & 1) != 0) + pub fn ppmode(&self) -> PpmodeR { + PpmodeR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - DCDC in PFMX mode"] #[inline(always)] - pub fn pfmxmode(&self) -> PFMXMODE_R { - PFMXMODE_R::new(((self.bits >> 9) & 1) != 0) + pub fn pfmxmode(&self) -> PfmxmodeR { + PfmxmodeR::new(((self.bits >> 9) & 1) != 0) } } -#[doc = "DCDC Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "DCDC Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/syncbusy.rs index b3ea382..58af169 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dcdc_s/syncbusy.rs @@ -1,65 +1,50 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CTRL` reader - CTRL Sync Busy Status"] -pub type CTRL_R = crate::BitReader; +pub type CtrlR = crate::BitReader; #[doc = "Field `EM01CTRL0` reader - EM01CTRL0 Sync Busy Status"] -pub type EM01CTRL0_R = crate::BitReader; +pub type Em01ctrl0R = crate::BitReader; #[doc = "Field `EM01CTRL1` reader - EM01CTRL1 Sync Bust Status"] -pub type EM01CTRL1_R = crate::BitReader; +pub type Em01ctrl1R = crate::BitReader; #[doc = "Field `EM23CTRL0` reader - EM23CTRL0 Sync Busy Status"] -pub type EM23CTRL0_R = crate::BitReader; +pub type Em23ctrl0R = crate::BitReader; #[doc = "Field `PFMXCTRL` reader - PFMXCTRL Sync Busy Status"] -pub type PFMXCTRL_R = crate::BitReader; +pub type PfmxctrlR = crate::BitReader; impl R { #[doc = "Bit 0 - CTRL Sync Busy Status"] #[inline(always)] - pub fn ctrl(&self) -> CTRL_R { - CTRL_R::new((self.bits & 1) != 0) + pub fn ctrl(&self) -> CtrlR { + CtrlR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - EM01CTRL0 Sync Busy Status"] #[inline(always)] - pub fn em01ctrl0(&self) -> EM01CTRL0_R { - EM01CTRL0_R::new(((self.bits >> 1) & 1) != 0) + pub fn em01ctrl0(&self) -> Em01ctrl0R { + Em01ctrl0R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - EM01CTRL1 Sync Bust Status"] #[inline(always)] - pub fn em01ctrl1(&self) -> EM01CTRL1_R { - EM01CTRL1_R::new(((self.bits >> 2) & 1) != 0) + pub fn em01ctrl1(&self) -> Em01ctrl1R { + Em01ctrl1R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - EM23CTRL0 Sync Busy Status"] #[inline(always)] - pub fn em23ctrl0(&self) -> EM23CTRL0_R { - EM23CTRL0_R::new(((self.bits >> 3) & 1) != 0) + pub fn em23ctrl0(&self) -> Em23ctrl0R { + Em23ctrl0R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 7 - PFMXCTRL Sync Busy Status"] #[inline(always)] - pub fn pfmxctrl(&self) -> PFMXCTRL_R { - PFMXCTRL_R::new(((self.bits >> 7) & 1) != 0) + pub fn pfmxctrl(&self) -> PfmxctrlR { + PfmxctrlR::new(((self.bits >> 7) & 1) != 0) } } -#[doc = "Syncbusy Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "Syncbusy Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo.rs index d6165fc..b65dd05 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo.rs @@ -1,436 +1,864 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + info: Info, + part: Part, + meminfo: Meminfo, + msize: Msize, + pkginfo: Pkginfo, + custominfo: Custominfo, + swfix: Swfix, + swcapa0: Swcapa0, + swcapa1: Swcapa1, + _reserved9: [u8; 0x04], + extinfo: Extinfo, + _reserved10: [u8; 0x14], + eui48l: Eui48l, + eui48h: Eui48h, + eui64l: Eui64l, + eui64h: Eui64h, + caltemp: Caltemp, + emutemp: Emutemp, + hfrcodpllcal0: Hfrcodpllcal0, + hfrcodpllcal1: Hfrcodpllcal1, + hfrcodpllcal2: Hfrcodpllcal2, + hfrcodpllcal3: Hfrcodpllcal3, + hfrcodpllcal4: Hfrcodpllcal4, + hfrcodpllcal5: Hfrcodpllcal5, + hfrcodpllcal6: Hfrcodpllcal6, + hfrcodpllcal7: Hfrcodpllcal7, + hfrcodpllcal8: Hfrcodpllcal8, + hfrcodpllcal9: Hfrcodpllcal9, + hfrcodpllcal10: Hfrcodpllcal10, + hfrcodpllcal11: Hfrcodpllcal11, + hfrcodpllcal12: Hfrcodpllcal12, + hfrcodpllcal13: Hfrcodpllcal13, + hfrcodpllcal14: Hfrcodpllcal14, + hfrcodpllcal15: Hfrcodpllcal15, + hfrcodpllcal16: Hfrcodpllcal16, + hfrcodpllcal17: Hfrcodpllcal17, + hfrcoem23cal0: Hfrcoem23cal0, + hfrcoem23cal1: Hfrcoem23cal1, + hfrcoem23cal2: Hfrcoem23cal2, + hfrcoem23cal3: Hfrcoem23cal3, + hfrcoem23cal4: Hfrcoem23cal4, + hfrcoem23cal5: Hfrcoem23cal5, + hfrcoem23cal6: Hfrcoem23cal6, + hfrcoem23cal7: Hfrcoem23cal7, + hfrcoem23cal8: Hfrcoem23cal8, + hfrcoem23cal9: Hfrcoem23cal9, + hfrcoem23cal10: Hfrcoem23cal10, + hfrcoem23cal11: Hfrcoem23cal11, + hfrcoem23cal12: Hfrcoem23cal12, + hfrcoem23cal13: Hfrcoem23cal13, + hfrcoem23cal14: Hfrcoem23cal14, + hfrcoem23cal15: Hfrcoem23cal15, + hfrcoem23cal16: Hfrcoem23cal16, + hfrcoem23cal17: Hfrcoem23cal17, + _reserved52: [u8; 0x48], + modulename0: Modulename0, + modulename1: Modulename1, + modulename2: Modulename2, + modulename3: Modulename3, + modulename4: Modulename4, + modulename5: Modulename5, + modulename6: Modulename6, + moduleinfo: Moduleinfo, + modxocal: Modxocal, + _reserved61: [u8; 0x28], + hfxocal: Hfxocal, + iadc0gain0: Iadc0gain0, + iadc0gain1: Iadc0gain1, + iadc0offsetcal0: Iadc0offsetcal0, + iadc0normaloffsetcal0: Iadc0normaloffsetcal0, + iadc0normaloffsetcal1: Iadc0normaloffsetcal1, + iadc0hispdoffsetcal0: Iadc0hispdoffsetcal0, + iadc0hispdoffsetcal1: Iadc0hispdoffsetcal1, + _reserved69: [u8; 0x60], + legacy: Legacy, + _reserved70: [u8; 0x5c], + rtherm: Rtherm, +} +impl RegisterBlock { #[doc = "0x00 - Version of the device info structure being used"] - pub info: INFO, + #[inline(always)] + pub const fn info(&self) -> &Info { + &self.info + } #[doc = "0x04 - Part description"] - pub part: PART, + #[inline(always)] + pub const fn part(&self) -> &Part { + &self.part + } #[doc = "0x08 - Flash page size and misc. chip information"] - pub meminfo: MEMINFO, + #[inline(always)] + pub const fn meminfo(&self) -> &Meminfo { + &self.meminfo + } #[doc = "0x0c - Flash and SRAM Memory size in kB"] - pub msize: MSIZE, + #[inline(always)] + pub const fn msize(&self) -> &Msize { + &self.msize + } #[doc = "0x10 - Miscellaneous device information"] - pub pkginfo: PKGINFO, + #[inline(always)] + pub const fn pkginfo(&self) -> &Pkginfo { + &self.pkginfo + } #[doc = "0x14 - Custom information"] - pub custominfo: CUSTOMINFO, + #[inline(always)] + pub const fn custominfo(&self) -> &Custominfo { + &self.custominfo + } #[doc = "0x18 - Used to track s/w workaround info"] - pub swfix: SWFIX, + #[inline(always)] + pub const fn swfix(&self) -> &Swfix { + &self.swfix + } #[doc = "0x1c - Software Capability Vector 0"] - pub swcapa0: SWCAPA0, + #[inline(always)] + pub const fn swcapa0(&self) -> &Swcapa0 { + &self.swcapa0 + } #[doc = "0x20 - Software Capability Vector 1"] - pub swcapa1: SWCAPA1, - _reserved9: [u8; 0x04], + #[inline(always)] + pub const fn swcapa1(&self) -> &Swcapa1 { + &self.swcapa1 + } #[doc = "0x28 - External component description"] - pub extinfo: EXTINFO, - _reserved10: [u8; 0x14], + #[inline(always)] + pub const fn extinfo(&self) -> &Extinfo { + &self.extinfo + } #[doc = "0x40 - MA-L compliant EUI48 OUI (low bits) and Unique Identifier (24-bit)"] - pub eui48l: EUI48L, + #[inline(always)] + pub const fn eui48l(&self) -> &Eui48l { + &self.eui48l + } #[doc = "0x44 - MA-L compliant EUI48 OUI (high bits)"] - pub eui48h: EUI48H, + #[inline(always)] + pub const fn eui48h(&self) -> &Eui48h { + &self.eui48h + } #[doc = "0x48 - MA-L compliant EUI64 Unique Identifier (low bits)"] - pub eui64l: EUI64L, + #[inline(always)] + pub const fn eui64l(&self) -> &Eui64l { + &self.eui64l + } #[doc = "0x4c - MA-L compliant EUI64 OUI and Unique Identifier (high bits)"] - pub eui64h: EUI64H, + #[inline(always)] + pub const fn eui64h(&self) -> &Eui64h { + &self.eui64h + } #[doc = "0x50 - Calibration Temperature Information"] - pub caltemp: CALTEMP, + #[inline(always)] + pub const fn caltemp(&self) -> &Caltemp { + &self.caltemp + } #[doc = "0x54 - EMU Temperature Sensor Calibration"] - pub emutemp: EMUTEMP, + #[inline(always)] + pub const fn emutemp(&self) -> &Emutemp { + &self.emutemp + } #[doc = "0x58 - HFRCODPLL Calibration"] - pub hfrcodpllcal0: HFRCODPLLCAL0, + #[inline(always)] + pub const fn hfrcodpllcal0(&self) -> &Hfrcodpllcal0 { + &self.hfrcodpllcal0 + } #[doc = "0x5c - HFRCODPLL Calibration"] - pub hfrcodpllcal1: HFRCODPLLCAL1, + #[inline(always)] + pub const fn hfrcodpllcal1(&self) -> &Hfrcodpllcal1 { + &self.hfrcodpllcal1 + } #[doc = "0x60 - HFRCODPLL Calibration"] - pub hfrcodpllcal2: HFRCODPLLCAL2, + #[inline(always)] + pub const fn hfrcodpllcal2(&self) -> &Hfrcodpllcal2 { + &self.hfrcodpllcal2 + } #[doc = "0x64 - HFRCODPLL Calibration"] - pub hfrcodpllcal3: HFRCODPLLCAL3, + #[inline(always)] + pub const fn hfrcodpllcal3(&self) -> &Hfrcodpllcal3 { + &self.hfrcodpllcal3 + } #[doc = "0x68 - HFRCODPLL Calibration"] - pub hfrcodpllcal4: HFRCODPLLCAL4, + #[inline(always)] + pub const fn hfrcodpllcal4(&self) -> &Hfrcodpllcal4 { + &self.hfrcodpllcal4 + } #[doc = "0x6c - HFRCODPLL Calibration"] - pub hfrcodpllcal5: HFRCODPLLCAL5, + #[inline(always)] + pub const fn hfrcodpllcal5(&self) -> &Hfrcodpllcal5 { + &self.hfrcodpllcal5 + } #[doc = "0x70 - HFRCODPLL Calibration"] - pub hfrcodpllcal6: HFRCODPLLCAL6, + #[inline(always)] + pub const fn hfrcodpllcal6(&self) -> &Hfrcodpllcal6 { + &self.hfrcodpllcal6 + } #[doc = "0x74 - HFRCODPLL Calibration"] - pub hfrcodpllcal7: HFRCODPLLCAL7, + #[inline(always)] + pub const fn hfrcodpllcal7(&self) -> &Hfrcodpllcal7 { + &self.hfrcodpllcal7 + } #[doc = "0x78 - HFRCODPLL Calibration"] - pub hfrcodpllcal8: HFRCODPLLCAL8, + #[inline(always)] + pub const fn hfrcodpllcal8(&self) -> &Hfrcodpllcal8 { + &self.hfrcodpllcal8 + } #[doc = "0x7c - HFRCODPLL Calibration"] - pub hfrcodpllcal9: HFRCODPLLCAL9, + #[inline(always)] + pub const fn hfrcodpllcal9(&self) -> &Hfrcodpllcal9 { + &self.hfrcodpllcal9 + } #[doc = "0x80 - HFRCODPLL Calibration"] - pub hfrcodpllcal10: HFRCODPLLCAL10, + #[inline(always)] + pub const fn hfrcodpllcal10(&self) -> &Hfrcodpllcal10 { + &self.hfrcodpllcal10 + } #[doc = "0x84 - HFRCODPLL Calibration"] - pub hfrcodpllcal11: HFRCODPLLCAL11, + #[inline(always)] + pub const fn hfrcodpllcal11(&self) -> &Hfrcodpllcal11 { + &self.hfrcodpllcal11 + } #[doc = "0x88 - HFRCODPLL Calibration"] - pub hfrcodpllcal12: HFRCODPLLCAL12, + #[inline(always)] + pub const fn hfrcodpllcal12(&self) -> &Hfrcodpllcal12 { + &self.hfrcodpllcal12 + } #[doc = "0x8c - HFRCODPLL Calibration"] - pub hfrcodpllcal13: HFRCODPLLCAL13, + #[inline(always)] + pub const fn hfrcodpllcal13(&self) -> &Hfrcodpllcal13 { + &self.hfrcodpllcal13 + } #[doc = "0x90 - HFRCODPLL Calibration"] - pub hfrcodpllcal14: HFRCODPLLCAL14, + #[inline(always)] + pub const fn hfrcodpllcal14(&self) -> &Hfrcodpllcal14 { + &self.hfrcodpllcal14 + } #[doc = "0x94 - HFRCODPLL Calibration"] - pub hfrcodpllcal15: HFRCODPLLCAL15, + #[inline(always)] + pub const fn hfrcodpllcal15(&self) -> &Hfrcodpllcal15 { + &self.hfrcodpllcal15 + } #[doc = "0x98 - HFRCODPLL Calibration"] - pub hfrcodpllcal16: HFRCODPLLCAL16, + #[inline(always)] + pub const fn hfrcodpllcal16(&self) -> &Hfrcodpllcal16 { + &self.hfrcodpllcal16 + } #[doc = "0x9c - HFRCODPLL Calibration"] - pub hfrcodpllcal17: HFRCODPLLCAL17, + #[inline(always)] + pub const fn hfrcodpllcal17(&self) -> &Hfrcodpllcal17 { + &self.hfrcodpllcal17 + } #[doc = "0xa0 - HFRCOEM23 Calibration"] - pub hfrcoem23cal0: HFRCOEM23CAL0, + #[inline(always)] + pub const fn hfrcoem23cal0(&self) -> &Hfrcoem23cal0 { + &self.hfrcoem23cal0 + } #[doc = "0xa4 - HFRCOEM23 Calibration"] - pub hfrcoem23cal1: HFRCOEM23CAL1, + #[inline(always)] + pub const fn hfrcoem23cal1(&self) -> &Hfrcoem23cal1 { + &self.hfrcoem23cal1 + } #[doc = "0xa8 - HFRCOEM23 Calibration"] - pub hfrcoem23cal2: HFRCOEM23CAL2, + #[inline(always)] + pub const fn hfrcoem23cal2(&self) -> &Hfrcoem23cal2 { + &self.hfrcoem23cal2 + } #[doc = "0xac - HFRCOEM23 Calibration"] - pub hfrcoem23cal3: HFRCOEM23CAL3, + #[inline(always)] + pub const fn hfrcoem23cal3(&self) -> &Hfrcoem23cal3 { + &self.hfrcoem23cal3 + } #[doc = "0xb0 - HFRCOEM23 Calibration"] - pub hfrcoem23cal4: HFRCOEM23CAL4, + #[inline(always)] + pub const fn hfrcoem23cal4(&self) -> &Hfrcoem23cal4 { + &self.hfrcoem23cal4 + } #[doc = "0xb4 - HFRCOEM23 Calibration"] - pub hfrcoem23cal5: HFRCOEM23CAL5, + #[inline(always)] + pub const fn hfrcoem23cal5(&self) -> &Hfrcoem23cal5 { + &self.hfrcoem23cal5 + } #[doc = "0xb8 - HFRCOEM23 Calibration"] - pub hfrcoem23cal6: HFRCOEM23CAL6, + #[inline(always)] + pub const fn hfrcoem23cal6(&self) -> &Hfrcoem23cal6 { + &self.hfrcoem23cal6 + } #[doc = "0xbc - HFRCOEM23 Calibration"] - pub hfrcoem23cal7: HFRCOEM23CAL7, + #[inline(always)] + pub const fn hfrcoem23cal7(&self) -> &Hfrcoem23cal7 { + &self.hfrcoem23cal7 + } #[doc = "0xc0 - HFRCOEM23 Calibration"] - pub hfrcoem23cal8: HFRCOEM23CAL8, + #[inline(always)] + pub const fn hfrcoem23cal8(&self) -> &Hfrcoem23cal8 { + &self.hfrcoem23cal8 + } #[doc = "0xc4 - HFRCOEM23 Calibration"] - pub hfrcoem23cal9: HFRCOEM23CAL9, + #[inline(always)] + pub const fn hfrcoem23cal9(&self) -> &Hfrcoem23cal9 { + &self.hfrcoem23cal9 + } #[doc = "0xc8 - HFRCOEM23 Calibration"] - pub hfrcoem23cal10: HFRCOEM23CAL10, + #[inline(always)] + pub const fn hfrcoem23cal10(&self) -> &Hfrcoem23cal10 { + &self.hfrcoem23cal10 + } #[doc = "0xcc - HFRCOEM23 Calibration"] - pub hfrcoem23cal11: HFRCOEM23CAL11, + #[inline(always)] + pub const fn hfrcoem23cal11(&self) -> &Hfrcoem23cal11 { + &self.hfrcoem23cal11 + } #[doc = "0xd0 - HFRCOEM23 Calibration"] - pub hfrcoem23cal12: HFRCOEM23CAL12, + #[inline(always)] + pub const fn hfrcoem23cal12(&self) -> &Hfrcoem23cal12 { + &self.hfrcoem23cal12 + } #[doc = "0xd4 - HFRCOEM23 Calibration"] - pub hfrcoem23cal13: HFRCOEM23CAL13, + #[inline(always)] + pub const fn hfrcoem23cal13(&self) -> &Hfrcoem23cal13 { + &self.hfrcoem23cal13 + } #[doc = "0xd8 - HFRCOEM23 Calibration"] - pub hfrcoem23cal14: HFRCOEM23CAL14, + #[inline(always)] + pub const fn hfrcoem23cal14(&self) -> &Hfrcoem23cal14 { + &self.hfrcoem23cal14 + } #[doc = "0xdc - HFRCOEM23 Calibration"] - pub hfrcoem23cal15: HFRCOEM23CAL15, + #[inline(always)] + pub const fn hfrcoem23cal15(&self) -> &Hfrcoem23cal15 { + &self.hfrcoem23cal15 + } #[doc = "0xe0 - HFRCOEM23 Calibration"] - pub hfrcoem23cal16: HFRCOEM23CAL16, + #[inline(always)] + pub const fn hfrcoem23cal16(&self) -> &Hfrcoem23cal16 { + &self.hfrcoem23cal16 + } #[doc = "0xe4 - HFRCOEM23 Calibration"] - pub hfrcoem23cal17: HFRCOEM23CAL17, - _reserved52: [u8; 0x48], + #[inline(always)] + pub const fn hfrcoem23cal17(&self) -> &Hfrcoem23cal17 { + &self.hfrcoem23cal17 + } #[doc = "0x130 - Characters 1-4 of Module Name stored as a null terminated string"] - pub modulename0: MODULENAME0, + #[inline(always)] + pub const fn modulename0(&self) -> &Modulename0 { + &self.modulename0 + } #[doc = "0x134 - Characters 5-8 of Module Name stored as a null terminated string"] - pub modulename1: MODULENAME1, + #[inline(always)] + pub const fn modulename1(&self) -> &Modulename1 { + &self.modulename1 + } #[doc = "0x138 - Characters 9-12 of Module Name stored as a null terminated string"] - pub modulename2: MODULENAME2, + #[inline(always)] + pub const fn modulename2(&self) -> &Modulename2 { + &self.modulename2 + } #[doc = "0x13c - Characters 13-16 of Module Name stored as a null terminated string"] - pub modulename3: MODULENAME3, + #[inline(always)] + pub const fn modulename3(&self) -> &Modulename3 { + &self.modulename3 + } #[doc = "0x140 - Characters 17-20 of Module Name stored as a null terminated string"] - pub modulename4: MODULENAME4, + #[inline(always)] + pub const fn modulename4(&self) -> &Modulename4 { + &self.modulename4 + } #[doc = "0x144 - Characters 21-24 of Module Name stored as a null terminated string"] - pub modulename5: MODULENAME5, + #[inline(always)] + pub const fn modulename5(&self) -> &Modulename5 { + &self.modulename5 + } #[doc = "0x148 - Characters 25-26 of Module Name stored as a null terminated string"] - pub modulename6: MODULENAME6, + #[inline(always)] + pub const fn modulename6(&self) -> &Modulename6 { + &self.modulename6 + } #[doc = "0x14c - Module Information"] - pub moduleinfo: MODULEINFO, + #[inline(always)] + pub const fn moduleinfo(&self) -> &Moduleinfo { + &self.moduleinfo + } #[doc = "0x150 - Module Crystal Oscillator Calibration"] - pub modxocal: MODXOCAL, - _reserved61: [u8; 0x28], + #[inline(always)] + pub const fn modxocal(&self) -> &Modxocal { + &self.modxocal + } #[doc = "0x17c - High Frequency Crystal Oscillator Calibration data"] - pub hfxocal: HFXOCAL, + #[inline(always)] + pub const fn hfxocal(&self) -> &Hfxocal { + &self.hfxocal + } #[doc = "0x180 - IADC0 Gain Calibration Info"] - pub iadc0gain0: IADC0GAIN0, + #[inline(always)] + pub const fn iadc0gain0(&self) -> &Iadc0gain0 { + &self.iadc0gain0 + } #[doc = "0x184 - IADC0 Gain Calibration Info"] - pub iadc0gain1: IADC0GAIN1, + #[inline(always)] + pub const fn iadc0gain1(&self) -> &Iadc0gain1 { + &self.iadc0gain1 + } #[doc = "0x188 - IADC0 Offset Calibration Info"] - pub iadc0offsetcal0: IADC0OFFSETCAL0, + #[inline(always)] + pub const fn iadc0offsetcal0(&self) -> &Iadc0offsetcal0 { + &self.iadc0offsetcal0 + } #[doc = "0x18c - IADC0 Normal Offset Calibration Info"] - pub iadc0normaloffsetcal0: IADC0NORMALOFFSETCAL0, + #[inline(always)] + pub const fn iadc0normaloffsetcal0(&self) -> &Iadc0normaloffsetcal0 { + &self.iadc0normaloffsetcal0 + } #[doc = "0x190 - IADC0 Normal Offset Calibration Info"] - pub iadc0normaloffsetcal1: IADC0NORMALOFFSETCAL1, + #[inline(always)] + pub const fn iadc0normaloffsetcal1(&self) -> &Iadc0normaloffsetcal1 { + &self.iadc0normaloffsetcal1 + } #[doc = "0x194 - IADC High Speed Offset Calibration Info"] - pub iadc0hispdoffsetcal0: IADC0HISPDOFFSETCAL0, + #[inline(always)] + pub const fn iadc0hispdoffsetcal0(&self) -> &Iadc0hispdoffsetcal0 { + &self.iadc0hispdoffsetcal0 + } #[doc = "0x198 - IADC High Speed Offset Calibration Info"] - pub iadc0hispdoffsetcal1: IADC0HISPDOFFSETCAL1, - _reserved69: [u8; 0x60], + #[inline(always)] + pub const fn iadc0hispdoffsetcal1(&self) -> &Iadc0hispdoffsetcal1 { + &self.iadc0hispdoffsetcal1 + } #[doc = "0x1fc - This is the legacy device detection information for tools compatability"] - pub legacy: LEGACY, - _reserved70: [u8; 0x5c], + #[inline(always)] + pub const fn legacy(&self) -> &Legacy { + &self.legacy + } #[doc = "0x25c - RTHERM"] - pub rtherm: RTHERM, + #[inline(always)] + pub const fn rtherm(&self) -> &Rtherm { + &self.rtherm + } } -#[doc = "INFO (r) register accessor: an alias for `Reg`"] -pub type INFO = crate::Reg; +#[doc = "INFO (r) register accessor: Version of the device info structure being used\n\nYou can [`read`](crate::Reg::read) this register and get [`info::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@info`] +module"] +#[doc(alias = "INFO")] +pub type Info = crate::Reg; #[doc = "Version of the device info structure being used"] pub mod info; -#[doc = "PART (r) register accessor: an alias for `Reg`"] -pub type PART = crate::Reg; +#[doc = "PART (r) register accessor: Part description\n\nYou can [`read`](crate::Reg::read) this register and get [`part::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@part`] +module"] +#[doc(alias = "PART")] +pub type Part = crate::Reg; #[doc = "Part description"] pub mod part; -#[doc = "MEMINFO (r) register accessor: an alias for `Reg`"] -pub type MEMINFO = crate::Reg; +#[doc = "MEMINFO (r) register accessor: Flash page size and misc. chip information\n\nYou can [`read`](crate::Reg::read) this register and get [`meminfo::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@meminfo`] +module"] +#[doc(alias = "MEMINFO")] +pub type Meminfo = crate::Reg; #[doc = "Flash page size and misc. chip information"] pub mod meminfo; -#[doc = "MSIZE (r) register accessor: an alias for `Reg`"] -pub type MSIZE = crate::Reg; +#[doc = "MSIZE (r) register accessor: Flash and SRAM Memory size in kB\n\nYou can [`read`](crate::Reg::read) this register and get [`msize::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msize`] +module"] +#[doc(alias = "MSIZE")] +pub type Msize = crate::Reg; #[doc = "Flash and SRAM Memory size in kB"] pub mod msize; -#[doc = "PKGINFO (r) register accessor: an alias for `Reg`"] -pub type PKGINFO = crate::Reg; +#[doc = "PKGINFO (r) register accessor: Miscellaneous device information\n\nYou can [`read`](crate::Reg::read) this register and get [`pkginfo::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pkginfo`] +module"] +#[doc(alias = "PKGINFO")] +pub type Pkginfo = crate::Reg; #[doc = "Miscellaneous device information"] pub mod pkginfo; -#[doc = "CUSTOMINFO (r) register accessor: an alias for `Reg`"] -pub type CUSTOMINFO = crate::Reg; +#[doc = "CUSTOMINFO (r) register accessor: Custom information\n\nYou can [`read`](crate::Reg::read) this register and get [`custominfo::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@custominfo`] +module"] +#[doc(alias = "CUSTOMINFO")] +pub type Custominfo = crate::Reg; #[doc = "Custom information"] pub mod custominfo; -#[doc = "SWFIX (r) register accessor: an alias for `Reg`"] -pub type SWFIX = crate::Reg; +#[doc = "SWFIX (r) register accessor: Used to track s/w workaround info\n\nYou can [`read`](crate::Reg::read) this register and get [`swfix::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swfix`] +module"] +#[doc(alias = "SWFIX")] +pub type Swfix = crate::Reg; #[doc = "Used to track s/w workaround info"] pub mod swfix; -#[doc = "SWCAPA0 (r) register accessor: an alias for `Reg`"] -pub type SWCAPA0 = crate::Reg; +#[doc = "SWCAPA0 (r) register accessor: Software Capability Vector 0\n\nYou can [`read`](crate::Reg::read) this register and get [`swcapa0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swcapa0`] +module"] +#[doc(alias = "SWCAPA0")] +pub type Swcapa0 = crate::Reg; #[doc = "Software Capability Vector 0"] pub mod swcapa0; -#[doc = "SWCAPA1 (r) register accessor: an alias for `Reg`"] -pub type SWCAPA1 = crate::Reg; +#[doc = "SWCAPA1 (r) register accessor: Software Capability Vector 1\n\nYou can [`read`](crate::Reg::read) this register and get [`swcapa1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swcapa1`] +module"] +#[doc(alias = "SWCAPA1")] +pub type Swcapa1 = crate::Reg; #[doc = "Software Capability Vector 1"] pub mod swcapa1; -#[doc = "EXTINFO (r) register accessor: an alias for `Reg`"] -pub type EXTINFO = crate::Reg; +#[doc = "EXTINFO (r) register accessor: External component description\n\nYou can [`read`](crate::Reg::read) this register and get [`extinfo::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@extinfo`] +module"] +#[doc(alias = "EXTINFO")] +pub type Extinfo = crate::Reg; #[doc = "External component description"] pub mod extinfo; -#[doc = "EUI48L (r) register accessor: an alias for `Reg`"] -pub type EUI48L = crate::Reg; +#[doc = "EUI48L (r) register accessor: MA-L compliant EUI48 OUI (low bits) and Unique Identifier (24-bit)\n\nYou can [`read`](crate::Reg::read) this register and get [`eui48l::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eui48l`] +module"] +#[doc(alias = "EUI48L")] +pub type Eui48l = crate::Reg; #[doc = "MA-L compliant EUI48 OUI (low bits) and Unique Identifier (24-bit)"] pub mod eui48l; -#[doc = "EUI48H (r) register accessor: an alias for `Reg`"] -pub type EUI48H = crate::Reg; +#[doc = "EUI48H (r) register accessor: MA-L compliant EUI48 OUI (high bits)\n\nYou can [`read`](crate::Reg::read) this register and get [`eui48h::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eui48h`] +module"] +#[doc(alias = "EUI48H")] +pub type Eui48h = crate::Reg; #[doc = "MA-L compliant EUI48 OUI (high bits)"] pub mod eui48h; -#[doc = "EUI64L (r) register accessor: an alias for `Reg`"] -pub type EUI64L = crate::Reg; +#[doc = "EUI64L (r) register accessor: MA-L compliant EUI64 Unique Identifier (low bits)\n\nYou can [`read`](crate::Reg::read) this register and get [`eui64l::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eui64l`] +module"] +#[doc(alias = "EUI64L")] +pub type Eui64l = crate::Reg; #[doc = "MA-L compliant EUI64 Unique Identifier (low bits)"] pub mod eui64l; -#[doc = "EUI64H (r) register accessor: an alias for `Reg`"] -pub type EUI64H = crate::Reg; +#[doc = "EUI64H (r) register accessor: MA-L compliant EUI64 OUI and Unique Identifier (high bits)\n\nYou can [`read`](crate::Reg::read) this register and get [`eui64h::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eui64h`] +module"] +#[doc(alias = "EUI64H")] +pub type Eui64h = crate::Reg; #[doc = "MA-L compliant EUI64 OUI and Unique Identifier (high bits)"] pub mod eui64h; -#[doc = "CALTEMP (r) register accessor: an alias for `Reg`"] -pub type CALTEMP = crate::Reg; +#[doc = "CALTEMP (r) register accessor: Calibration Temperature Information\n\nYou can [`read`](crate::Reg::read) this register and get [`caltemp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@caltemp`] +module"] +#[doc(alias = "CALTEMP")] +pub type Caltemp = crate::Reg; #[doc = "Calibration Temperature Information"] pub mod caltemp; -#[doc = "EMUTEMP (r) register accessor: an alias for `Reg`"] -pub type EMUTEMP = crate::Reg; +#[doc = "EMUTEMP (r) register accessor: EMU Temperature Sensor Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`emutemp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emutemp`] +module"] +#[doc(alias = "EMUTEMP")] +pub type Emutemp = crate::Reg; #[doc = "EMU Temperature Sensor Calibration"] pub mod emutemp; -#[doc = "HFRCODPLLCAL0 (r) register accessor: an alias for `Reg`"] -pub type HFRCODPLLCAL0 = crate::Reg; +#[doc = "HFRCODPLLCAL0 (r) register accessor: HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcodpllcal0`] +module"] +#[doc(alias = "HFRCODPLLCAL0")] +pub type Hfrcodpllcal0 = crate::Reg; #[doc = "HFRCODPLL Calibration"] pub mod hfrcodpllcal0; -#[doc = "HFRCODPLLCAL1 (r) register accessor: an alias for `Reg`"] -pub type HFRCODPLLCAL1 = crate::Reg; +#[doc = "HFRCODPLLCAL1 (r) register accessor: HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcodpllcal1`] +module"] +#[doc(alias = "HFRCODPLLCAL1")] +pub type Hfrcodpllcal1 = crate::Reg; #[doc = "HFRCODPLL Calibration"] pub mod hfrcodpllcal1; -#[doc = "HFRCODPLLCAL2 (r) register accessor: an alias for `Reg`"] -pub type HFRCODPLLCAL2 = crate::Reg; +#[doc = "HFRCODPLLCAL2 (r) register accessor: HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcodpllcal2`] +module"] +#[doc(alias = "HFRCODPLLCAL2")] +pub type Hfrcodpllcal2 = crate::Reg; #[doc = "HFRCODPLL Calibration"] pub mod hfrcodpllcal2; -#[doc = "HFRCODPLLCAL3 (r) register accessor: an alias for `Reg`"] -pub type HFRCODPLLCAL3 = crate::Reg; +#[doc = "HFRCODPLLCAL3 (r) register accessor: HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcodpllcal3`] +module"] +#[doc(alias = "HFRCODPLLCAL3")] +pub type Hfrcodpllcal3 = crate::Reg; #[doc = "HFRCODPLL Calibration"] pub mod hfrcodpllcal3; -#[doc = "HFRCODPLLCAL4 (r) register accessor: an alias for `Reg`"] -pub type HFRCODPLLCAL4 = crate::Reg; +#[doc = "HFRCODPLLCAL4 (r) register accessor: HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal4::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcodpllcal4`] +module"] +#[doc(alias = "HFRCODPLLCAL4")] +pub type Hfrcodpllcal4 = crate::Reg; #[doc = "HFRCODPLL Calibration"] pub mod hfrcodpllcal4; -#[doc = "HFRCODPLLCAL5 (r) register accessor: an alias for `Reg`"] -pub type HFRCODPLLCAL5 = crate::Reg; +#[doc = "HFRCODPLLCAL5 (r) register accessor: HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal5::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcodpllcal5`] +module"] +#[doc(alias = "HFRCODPLLCAL5")] +pub type Hfrcodpllcal5 = crate::Reg; #[doc = "HFRCODPLL Calibration"] pub mod hfrcodpllcal5; -#[doc = "HFRCODPLLCAL6 (r) register accessor: an alias for `Reg`"] -pub type HFRCODPLLCAL6 = crate::Reg; +#[doc = "HFRCODPLLCAL6 (r) register accessor: HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal6::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcodpllcal6`] +module"] +#[doc(alias = "HFRCODPLLCAL6")] +pub type Hfrcodpllcal6 = crate::Reg; #[doc = "HFRCODPLL Calibration"] pub mod hfrcodpllcal6; -#[doc = "HFRCODPLLCAL7 (r) register accessor: an alias for `Reg`"] -pub type HFRCODPLLCAL7 = crate::Reg; +#[doc = "HFRCODPLLCAL7 (r) register accessor: HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal7::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcodpllcal7`] +module"] +#[doc(alias = "HFRCODPLLCAL7")] +pub type Hfrcodpllcal7 = crate::Reg; #[doc = "HFRCODPLL Calibration"] pub mod hfrcodpllcal7; -#[doc = "HFRCODPLLCAL8 (r) register accessor: an alias for `Reg`"] -pub type HFRCODPLLCAL8 = crate::Reg; +#[doc = "HFRCODPLLCAL8 (r) register accessor: HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal8::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcodpllcal8`] +module"] +#[doc(alias = "HFRCODPLLCAL8")] +pub type Hfrcodpllcal8 = crate::Reg; #[doc = "HFRCODPLL Calibration"] pub mod hfrcodpllcal8; -#[doc = "HFRCODPLLCAL9 (r) register accessor: an alias for `Reg`"] -pub type HFRCODPLLCAL9 = crate::Reg; +#[doc = "HFRCODPLLCAL9 (r) register accessor: HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal9::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcodpllcal9`] +module"] +#[doc(alias = "HFRCODPLLCAL9")] +pub type Hfrcodpllcal9 = crate::Reg; #[doc = "HFRCODPLL Calibration"] pub mod hfrcodpllcal9; -#[doc = "HFRCODPLLCAL10 (r) register accessor: an alias for `Reg`"] -pub type HFRCODPLLCAL10 = crate::Reg; +#[doc = "HFRCODPLLCAL10 (r) register accessor: HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal10::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcodpllcal10`] +module"] +#[doc(alias = "HFRCODPLLCAL10")] +pub type Hfrcodpllcal10 = crate::Reg; #[doc = "HFRCODPLL Calibration"] pub mod hfrcodpllcal10; -#[doc = "HFRCODPLLCAL11 (r) register accessor: an alias for `Reg`"] -pub type HFRCODPLLCAL11 = crate::Reg; +#[doc = "HFRCODPLLCAL11 (r) register accessor: HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal11::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcodpllcal11`] +module"] +#[doc(alias = "HFRCODPLLCAL11")] +pub type Hfrcodpllcal11 = crate::Reg; #[doc = "HFRCODPLL Calibration"] pub mod hfrcodpllcal11; -#[doc = "HFRCODPLLCAL12 (r) register accessor: an alias for `Reg`"] -pub type HFRCODPLLCAL12 = crate::Reg; +#[doc = "HFRCODPLLCAL12 (r) register accessor: HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal12::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcodpllcal12`] +module"] +#[doc(alias = "HFRCODPLLCAL12")] +pub type Hfrcodpllcal12 = crate::Reg; #[doc = "HFRCODPLL Calibration"] pub mod hfrcodpllcal12; -#[doc = "HFRCODPLLCAL13 (r) register accessor: an alias for `Reg`"] -pub type HFRCODPLLCAL13 = crate::Reg; +#[doc = "HFRCODPLLCAL13 (r) register accessor: HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal13::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcodpllcal13`] +module"] +#[doc(alias = "HFRCODPLLCAL13")] +pub type Hfrcodpllcal13 = crate::Reg; #[doc = "HFRCODPLL Calibration"] pub mod hfrcodpllcal13; -#[doc = "HFRCODPLLCAL14 (r) register accessor: an alias for `Reg`"] -pub type HFRCODPLLCAL14 = crate::Reg; +#[doc = "HFRCODPLLCAL14 (r) register accessor: HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal14::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcodpllcal14`] +module"] +#[doc(alias = "HFRCODPLLCAL14")] +pub type Hfrcodpllcal14 = crate::Reg; #[doc = "HFRCODPLL Calibration"] pub mod hfrcodpllcal14; -#[doc = "HFRCODPLLCAL15 (r) register accessor: an alias for `Reg`"] -pub type HFRCODPLLCAL15 = crate::Reg; +#[doc = "HFRCODPLLCAL15 (r) register accessor: HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal15::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcodpllcal15`] +module"] +#[doc(alias = "HFRCODPLLCAL15")] +pub type Hfrcodpllcal15 = crate::Reg; #[doc = "HFRCODPLL Calibration"] pub mod hfrcodpllcal15; -#[doc = "HFRCODPLLCAL16 (r) register accessor: an alias for `Reg`"] -pub type HFRCODPLLCAL16 = crate::Reg; +#[doc = "HFRCODPLLCAL16 (r) register accessor: HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal16::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcodpllcal16`] +module"] +#[doc(alias = "HFRCODPLLCAL16")] +pub type Hfrcodpllcal16 = crate::Reg; #[doc = "HFRCODPLL Calibration"] pub mod hfrcodpllcal16; -#[doc = "HFRCODPLLCAL17 (r) register accessor: an alias for `Reg`"] -pub type HFRCODPLLCAL17 = crate::Reg; +#[doc = "HFRCODPLLCAL17 (r) register accessor: HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal17::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcodpllcal17`] +module"] +#[doc(alias = "HFRCODPLLCAL17")] +pub type Hfrcodpllcal17 = crate::Reg; #[doc = "HFRCODPLL Calibration"] pub mod hfrcodpllcal17; -#[doc = "HFRCOEM23CAL0 (r) register accessor: an alias for `Reg`"] -pub type HFRCOEM23CAL0 = crate::Reg; +#[doc = "HFRCOEM23CAL0 (r) register accessor: HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcoem23cal0`] +module"] +#[doc(alias = "HFRCOEM23CAL0")] +pub type Hfrcoem23cal0 = crate::Reg; #[doc = "HFRCOEM23 Calibration"] pub mod hfrcoem23cal0; -#[doc = "HFRCOEM23CAL1 (r) register accessor: an alias for `Reg`"] -pub type HFRCOEM23CAL1 = crate::Reg; +#[doc = "HFRCOEM23CAL1 (r) register accessor: HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcoem23cal1`] +module"] +#[doc(alias = "HFRCOEM23CAL1")] +pub type Hfrcoem23cal1 = crate::Reg; #[doc = "HFRCOEM23 Calibration"] pub mod hfrcoem23cal1; -#[doc = "HFRCOEM23CAL2 (r) register accessor: an alias for `Reg`"] -pub type HFRCOEM23CAL2 = crate::Reg; +#[doc = "HFRCOEM23CAL2 (r) register accessor: HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcoem23cal2`] +module"] +#[doc(alias = "HFRCOEM23CAL2")] +pub type Hfrcoem23cal2 = crate::Reg; #[doc = "HFRCOEM23 Calibration"] pub mod hfrcoem23cal2; -#[doc = "HFRCOEM23CAL3 (r) register accessor: an alias for `Reg`"] -pub type HFRCOEM23CAL3 = crate::Reg; +#[doc = "HFRCOEM23CAL3 (r) register accessor: HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcoem23cal3`] +module"] +#[doc(alias = "HFRCOEM23CAL3")] +pub type Hfrcoem23cal3 = crate::Reg; #[doc = "HFRCOEM23 Calibration"] pub mod hfrcoem23cal3; -#[doc = "HFRCOEM23CAL4 (r) register accessor: an alias for `Reg`"] -pub type HFRCOEM23CAL4 = crate::Reg; +#[doc = "HFRCOEM23CAL4 (r) register accessor: HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal4::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcoem23cal4`] +module"] +#[doc(alias = "HFRCOEM23CAL4")] +pub type Hfrcoem23cal4 = crate::Reg; #[doc = "HFRCOEM23 Calibration"] pub mod hfrcoem23cal4; -#[doc = "HFRCOEM23CAL5 (r) register accessor: an alias for `Reg`"] -pub type HFRCOEM23CAL5 = crate::Reg; +#[doc = "HFRCOEM23CAL5 (r) register accessor: HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal5::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcoem23cal5`] +module"] +#[doc(alias = "HFRCOEM23CAL5")] +pub type Hfrcoem23cal5 = crate::Reg; #[doc = "HFRCOEM23 Calibration"] pub mod hfrcoem23cal5; -#[doc = "HFRCOEM23CAL6 (r) register accessor: an alias for `Reg`"] -pub type HFRCOEM23CAL6 = crate::Reg; +#[doc = "HFRCOEM23CAL6 (r) register accessor: HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal6::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcoem23cal6`] +module"] +#[doc(alias = "HFRCOEM23CAL6")] +pub type Hfrcoem23cal6 = crate::Reg; #[doc = "HFRCOEM23 Calibration"] pub mod hfrcoem23cal6; -#[doc = "HFRCOEM23CAL7 (r) register accessor: an alias for `Reg`"] -pub type HFRCOEM23CAL7 = crate::Reg; +#[doc = "HFRCOEM23CAL7 (r) register accessor: HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal7::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcoem23cal7`] +module"] +#[doc(alias = "HFRCOEM23CAL7")] +pub type Hfrcoem23cal7 = crate::Reg; #[doc = "HFRCOEM23 Calibration"] pub mod hfrcoem23cal7; -#[doc = "HFRCOEM23CAL8 (r) register accessor: an alias for `Reg`"] -pub type HFRCOEM23CAL8 = crate::Reg; +#[doc = "HFRCOEM23CAL8 (r) register accessor: HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal8::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcoem23cal8`] +module"] +#[doc(alias = "HFRCOEM23CAL8")] +pub type Hfrcoem23cal8 = crate::Reg; #[doc = "HFRCOEM23 Calibration"] pub mod hfrcoem23cal8; -#[doc = "HFRCOEM23CAL9 (r) register accessor: an alias for `Reg`"] -pub type HFRCOEM23CAL9 = crate::Reg; +#[doc = "HFRCOEM23CAL9 (r) register accessor: HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal9::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcoem23cal9`] +module"] +#[doc(alias = "HFRCOEM23CAL9")] +pub type Hfrcoem23cal9 = crate::Reg; #[doc = "HFRCOEM23 Calibration"] pub mod hfrcoem23cal9; -#[doc = "HFRCOEM23CAL10 (r) register accessor: an alias for `Reg`"] -pub type HFRCOEM23CAL10 = crate::Reg; +#[doc = "HFRCOEM23CAL10 (r) register accessor: HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal10::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcoem23cal10`] +module"] +#[doc(alias = "HFRCOEM23CAL10")] +pub type Hfrcoem23cal10 = crate::Reg; #[doc = "HFRCOEM23 Calibration"] pub mod hfrcoem23cal10; -#[doc = "HFRCOEM23CAL11 (r) register accessor: an alias for `Reg`"] -pub type HFRCOEM23CAL11 = crate::Reg; +#[doc = "HFRCOEM23CAL11 (r) register accessor: HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal11::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcoem23cal11`] +module"] +#[doc(alias = "HFRCOEM23CAL11")] +pub type Hfrcoem23cal11 = crate::Reg; #[doc = "HFRCOEM23 Calibration"] pub mod hfrcoem23cal11; -#[doc = "HFRCOEM23CAL12 (r) register accessor: an alias for `Reg`"] -pub type HFRCOEM23CAL12 = crate::Reg; +#[doc = "HFRCOEM23CAL12 (r) register accessor: HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal12::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcoem23cal12`] +module"] +#[doc(alias = "HFRCOEM23CAL12")] +pub type Hfrcoem23cal12 = crate::Reg; #[doc = "HFRCOEM23 Calibration"] pub mod hfrcoem23cal12; -#[doc = "HFRCOEM23CAL13 (r) register accessor: an alias for `Reg`"] -pub type HFRCOEM23CAL13 = crate::Reg; +#[doc = "HFRCOEM23CAL13 (r) register accessor: HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal13::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcoem23cal13`] +module"] +#[doc(alias = "HFRCOEM23CAL13")] +pub type Hfrcoem23cal13 = crate::Reg; #[doc = "HFRCOEM23 Calibration"] pub mod hfrcoem23cal13; -#[doc = "HFRCOEM23CAL14 (r) register accessor: an alias for `Reg`"] -pub type HFRCOEM23CAL14 = crate::Reg; +#[doc = "HFRCOEM23CAL14 (r) register accessor: HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal14::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcoem23cal14`] +module"] +#[doc(alias = "HFRCOEM23CAL14")] +pub type Hfrcoem23cal14 = crate::Reg; #[doc = "HFRCOEM23 Calibration"] pub mod hfrcoem23cal14; -#[doc = "HFRCOEM23CAL15 (r) register accessor: an alias for `Reg`"] -pub type HFRCOEM23CAL15 = crate::Reg; +#[doc = "HFRCOEM23CAL15 (r) register accessor: HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal15::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcoem23cal15`] +module"] +#[doc(alias = "HFRCOEM23CAL15")] +pub type Hfrcoem23cal15 = crate::Reg; #[doc = "HFRCOEM23 Calibration"] pub mod hfrcoem23cal15; -#[doc = "HFRCOEM23CAL16 (r) register accessor: an alias for `Reg`"] -pub type HFRCOEM23CAL16 = crate::Reg; +#[doc = "HFRCOEM23CAL16 (r) register accessor: HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal16::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcoem23cal16`] +module"] +#[doc(alias = "HFRCOEM23CAL16")] +pub type Hfrcoem23cal16 = crate::Reg; #[doc = "HFRCOEM23 Calibration"] pub mod hfrcoem23cal16; -#[doc = "HFRCOEM23CAL17 (r) register accessor: an alias for `Reg`"] -pub type HFRCOEM23CAL17 = crate::Reg; +#[doc = "HFRCOEM23CAL17 (r) register accessor: HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal17::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfrcoem23cal17`] +module"] +#[doc(alias = "HFRCOEM23CAL17")] +pub type Hfrcoem23cal17 = crate::Reg; #[doc = "HFRCOEM23 Calibration"] pub mod hfrcoem23cal17; -#[doc = "MODULENAME0 (r) register accessor: an alias for `Reg`"] -pub type MODULENAME0 = crate::Reg; +#[doc = "MODULENAME0 (r) register accessor: Characters 1-4 of Module Name stored as a null terminated string\n\nYou can [`read`](crate::Reg::read) this register and get [`modulename0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@modulename0`] +module"] +#[doc(alias = "MODULENAME0")] +pub type Modulename0 = crate::Reg; #[doc = "Characters 1-4 of Module Name stored as a null terminated string"] pub mod modulename0; -#[doc = "MODULENAME1 (r) register accessor: an alias for `Reg`"] -pub type MODULENAME1 = crate::Reg; +#[doc = "MODULENAME1 (r) register accessor: Characters 5-8 of Module Name stored as a null terminated string\n\nYou can [`read`](crate::Reg::read) this register and get [`modulename1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@modulename1`] +module"] +#[doc(alias = "MODULENAME1")] +pub type Modulename1 = crate::Reg; #[doc = "Characters 5-8 of Module Name stored as a null terminated string"] pub mod modulename1; -#[doc = "MODULENAME2 (r) register accessor: an alias for `Reg`"] -pub type MODULENAME2 = crate::Reg; +#[doc = "MODULENAME2 (r) register accessor: Characters 9-12 of Module Name stored as a null terminated string\n\nYou can [`read`](crate::Reg::read) this register and get [`modulename2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@modulename2`] +module"] +#[doc(alias = "MODULENAME2")] +pub type Modulename2 = crate::Reg; #[doc = "Characters 9-12 of Module Name stored as a null terminated string"] pub mod modulename2; -#[doc = "MODULENAME3 (r) register accessor: an alias for `Reg`"] -pub type MODULENAME3 = crate::Reg; +#[doc = "MODULENAME3 (r) register accessor: Characters 13-16 of Module Name stored as a null terminated string\n\nYou can [`read`](crate::Reg::read) this register and get [`modulename3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@modulename3`] +module"] +#[doc(alias = "MODULENAME3")] +pub type Modulename3 = crate::Reg; #[doc = "Characters 13-16 of Module Name stored as a null terminated string"] pub mod modulename3; -#[doc = "MODULENAME4 (r) register accessor: an alias for `Reg`"] -pub type MODULENAME4 = crate::Reg; +#[doc = "MODULENAME4 (r) register accessor: Characters 17-20 of Module Name stored as a null terminated string\n\nYou can [`read`](crate::Reg::read) this register and get [`modulename4::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@modulename4`] +module"] +#[doc(alias = "MODULENAME4")] +pub type Modulename4 = crate::Reg; #[doc = "Characters 17-20 of Module Name stored as a null terminated string"] pub mod modulename4; -#[doc = "MODULENAME5 (r) register accessor: an alias for `Reg`"] -pub type MODULENAME5 = crate::Reg; +#[doc = "MODULENAME5 (r) register accessor: Characters 21-24 of Module Name stored as a null terminated string\n\nYou can [`read`](crate::Reg::read) this register and get [`modulename5::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@modulename5`] +module"] +#[doc(alias = "MODULENAME5")] +pub type Modulename5 = crate::Reg; #[doc = "Characters 21-24 of Module Name stored as a null terminated string"] pub mod modulename5; -#[doc = "MODULENAME6 (r) register accessor: an alias for `Reg`"] -pub type MODULENAME6 = crate::Reg; +#[doc = "MODULENAME6 (r) register accessor: Characters 25-26 of Module Name stored as a null terminated string\n\nYou can [`read`](crate::Reg::read) this register and get [`modulename6::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@modulename6`] +module"] +#[doc(alias = "MODULENAME6")] +pub type Modulename6 = crate::Reg; #[doc = "Characters 25-26 of Module Name stored as a null terminated string"] pub mod modulename6; -#[doc = "MODULEINFO (r) register accessor: an alias for `Reg`"] -pub type MODULEINFO = crate::Reg; +#[doc = "MODULEINFO (r) register accessor: Module Information\n\nYou can [`read`](crate::Reg::read) this register and get [`moduleinfo::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@moduleinfo`] +module"] +#[doc(alias = "MODULEINFO")] +pub type Moduleinfo = crate::Reg; #[doc = "Module Information"] pub mod moduleinfo; -#[doc = "MODXOCAL (r) register accessor: an alias for `Reg`"] -pub type MODXOCAL = crate::Reg; +#[doc = "MODXOCAL (r) register accessor: Module Crystal Oscillator Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`modxocal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@modxocal`] +module"] +#[doc(alias = "MODXOCAL")] +pub type Modxocal = crate::Reg; #[doc = "Module Crystal Oscillator Calibration"] pub mod modxocal; -#[doc = "HFXOCAL (r) register accessor: an alias for `Reg`"] -pub type HFXOCAL = crate::Reg; +#[doc = "HFXOCAL (r) register accessor: High Frequency Crystal Oscillator Calibration data\n\nYou can [`read`](crate::Reg::read) this register and get [`hfxocal::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfxocal`] +module"] +#[doc(alias = "HFXOCAL")] +pub type Hfxocal = crate::Reg; #[doc = "High Frequency Crystal Oscillator Calibration data"] pub mod hfxocal; -#[doc = "IADC0GAIN0 (r) register accessor: an alias for `Reg`"] -pub type IADC0GAIN0 = crate::Reg; +#[doc = "IADC0GAIN0 (r) register accessor: IADC0 Gain Calibration Info\n\nYou can [`read`](crate::Reg::read) this register and get [`iadc0gain0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iadc0gain0`] +module"] +#[doc(alias = "IADC0GAIN0")] +pub type Iadc0gain0 = crate::Reg; #[doc = "IADC0 Gain Calibration Info"] pub mod iadc0gain0; -#[doc = "IADC0GAIN1 (r) register accessor: an alias for `Reg`"] -pub type IADC0GAIN1 = crate::Reg; +#[doc = "IADC0GAIN1 (r) register accessor: IADC0 Gain Calibration Info\n\nYou can [`read`](crate::Reg::read) this register and get [`iadc0gain1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iadc0gain1`] +module"] +#[doc(alias = "IADC0GAIN1")] +pub type Iadc0gain1 = crate::Reg; #[doc = "IADC0 Gain Calibration Info"] pub mod iadc0gain1; -#[doc = "IADC0OFFSETCAL0 (r) register accessor: an alias for `Reg`"] -pub type IADC0OFFSETCAL0 = crate::Reg; +#[doc = "IADC0OFFSETCAL0 (r) register accessor: IADC0 Offset Calibration Info\n\nYou can [`read`](crate::Reg::read) this register and get [`iadc0offsetcal0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iadc0offsetcal0`] +module"] +#[doc(alias = "IADC0OFFSETCAL0")] +pub type Iadc0offsetcal0 = crate::Reg; #[doc = "IADC0 Offset Calibration Info"] pub mod iadc0offsetcal0; -#[doc = "IADC0NORMALOFFSETCAL0 (r) register accessor: an alias for `Reg`"] -pub type IADC0NORMALOFFSETCAL0 = crate::Reg; +#[doc = "IADC0NORMALOFFSETCAL0 (r) register accessor: IADC0 Normal Offset Calibration Info\n\nYou can [`read`](crate::Reg::read) this register and get [`iadc0normaloffsetcal0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iadc0normaloffsetcal0`] +module"] +#[doc(alias = "IADC0NORMALOFFSETCAL0")] +pub type Iadc0normaloffsetcal0 = crate::Reg; #[doc = "IADC0 Normal Offset Calibration Info"] pub mod iadc0normaloffsetcal0; -#[doc = "IADC0NORMALOFFSETCAL1 (r) register accessor: an alias for `Reg`"] -pub type IADC0NORMALOFFSETCAL1 = crate::Reg; +#[doc = "IADC0NORMALOFFSETCAL1 (r) register accessor: IADC0 Normal Offset Calibration Info\n\nYou can [`read`](crate::Reg::read) this register and get [`iadc0normaloffsetcal1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iadc0normaloffsetcal1`] +module"] +#[doc(alias = "IADC0NORMALOFFSETCAL1")] +pub type Iadc0normaloffsetcal1 = crate::Reg; #[doc = "IADC0 Normal Offset Calibration Info"] pub mod iadc0normaloffsetcal1; -#[doc = "IADC0HISPDOFFSETCAL0 (r) register accessor: an alias for `Reg`"] -pub type IADC0HISPDOFFSETCAL0 = crate::Reg; +#[doc = "IADC0HISPDOFFSETCAL0 (r) register accessor: IADC High Speed Offset Calibration Info\n\nYou can [`read`](crate::Reg::read) this register and get [`iadc0hispdoffsetcal0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iadc0hispdoffsetcal0`] +module"] +#[doc(alias = "IADC0HISPDOFFSETCAL0")] +pub type Iadc0hispdoffsetcal0 = crate::Reg; #[doc = "IADC High Speed Offset Calibration Info"] pub mod iadc0hispdoffsetcal0; -#[doc = "IADC0HISPDOFFSETCAL1 (r) register accessor: an alias for `Reg`"] -pub type IADC0HISPDOFFSETCAL1 = crate::Reg; +#[doc = "IADC0HISPDOFFSETCAL1 (r) register accessor: IADC High Speed Offset Calibration Info\n\nYou can [`read`](crate::Reg::read) this register and get [`iadc0hispdoffsetcal1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iadc0hispdoffsetcal1`] +module"] +#[doc(alias = "IADC0HISPDOFFSETCAL1")] +pub type Iadc0hispdoffsetcal1 = crate::Reg; #[doc = "IADC High Speed Offset Calibration Info"] pub mod iadc0hispdoffsetcal1; -#[doc = "LEGACY (r) register accessor: an alias for `Reg`"] -pub type LEGACY = crate::Reg; +#[doc = "LEGACY (r) register accessor: This is the legacy device detection information for tools compatability\n\nYou can [`read`](crate::Reg::read) this register and get [`legacy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@legacy`] +module"] +#[doc(alias = "LEGACY")] +pub type Legacy = crate::Reg; #[doc = "This is the legacy device detection information for tools compatability"] pub mod legacy; -#[doc = "RTHERM (r) register accessor: an alias for `Reg`"] -pub type RTHERM = crate::Reg; +#[doc = "RTHERM (r) register accessor: RTHERM\n\nYou can [`read`](crate::Reg::read) this register and get [`rtherm::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rtherm`] +module"] +#[doc(alias = "RTHERM")] +pub type Rtherm = crate::Reg; #[doc = "RTHERM"] pub mod rtherm; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/caltemp.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/caltemp.rs index 7b9c4a5..87a9fd4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/caltemp.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/caltemp.rs @@ -1,37 +1,22 @@ #[doc = "Register `CALTEMP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TEMP` reader - Cal Temp"] -pub type TEMP_R = crate::FieldReader; +pub type TempR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Cal Temp"] #[inline(always)] - pub fn temp(&self) -> TEMP_R { - TEMP_R::new((self.bits & 0xff) as u8) + pub fn temp(&self) -> TempR { + TempR::new((self.bits & 0xff) as u8) } } -#[doc = "Calibration Temperature Information\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [caltemp](index.html) module"] -pub struct CALTEMP_SPEC; -impl crate::RegisterSpec for CALTEMP_SPEC { +#[doc = "Calibration Temperature Information\n\nYou can [`read`](crate::Reg::read) this register and get [`caltemp::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CaltempSpec; +impl crate::RegisterSpec for CaltempSpec { type Ux = u32; } -#[doc = "`read()` method returns [caltemp::R](R) reader structure"] -impl crate::Readable for CALTEMP_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`caltemp::R`](R) reader structure"] +impl crate::Readable for CaltempSpec {} #[doc = "`reset()` method sets CALTEMP to value 0"] -impl crate::Resettable for CALTEMP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CaltempSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/custominfo.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/custominfo.rs index 195c19f..58fa472 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/custominfo.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/custominfo.rs @@ -1,37 +1,22 @@ #[doc = "Register `CUSTOMINFO` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `PARTNO` reader - Part Number"] -pub type PARTNO_R = crate::FieldReader; +pub type PartnoR = crate::FieldReader; impl R { #[doc = "Bits 16:31 - Part Number"] #[inline(always)] - pub fn partno(&self) -> PARTNO_R { - PARTNO_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn partno(&self) -> PartnoR { + PartnoR::new(((self.bits >> 16) & 0xffff) as u16) } } -#[doc = "Custom information\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [custominfo](index.html) module"] -pub struct CUSTOMINFO_SPEC; -impl crate::RegisterSpec for CUSTOMINFO_SPEC { +#[doc = "Custom information\n\nYou can [`read`](crate::Reg::read) this register and get [`custominfo::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CustominfoSpec; +impl crate::RegisterSpec for CustominfoSpec { type Ux = u32; } -#[doc = "`read()` method returns [custominfo::R](R) reader structure"] -impl crate::Readable for CUSTOMINFO_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`custominfo::R`](R) reader structure"] +impl crate::Readable for CustominfoSpec {} #[doc = "`reset()` method sets CUSTOMINFO to value 0"] -impl crate::Resettable for CUSTOMINFO_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CustominfoSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/emutemp.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/emutemp.rs index fecc939..0ae2138 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/emutemp.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/emutemp.rs @@ -1,37 +1,22 @@ #[doc = "Register `EMUTEMP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `EMUTEMPROOM` reader - Emu Room Temperature"] -pub type EMUTEMPROOM_R = crate::FieldReader; +pub type EmutemproomR = crate::FieldReader; impl R { #[doc = "Bits 2:10 - Emu Room Temperature"] #[inline(always)] - pub fn emutemproom(&self) -> EMUTEMPROOM_R { - EMUTEMPROOM_R::new(((self.bits >> 2) & 0x01ff) as u16) + pub fn emutemproom(&self) -> EmutemproomR { + EmutemproomR::new(((self.bits >> 2) & 0x01ff) as u16) } } -#[doc = "EMU Temperature Sensor Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [emutemp](index.html) module"] -pub struct EMUTEMP_SPEC; -impl crate::RegisterSpec for EMUTEMP_SPEC { +#[doc = "EMU Temperature Sensor Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`emutemp::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EmutempSpec; +impl crate::RegisterSpec for EmutempSpec { type Ux = u32; } -#[doc = "`read()` method returns [emutemp::R](R) reader structure"] -impl crate::Readable for EMUTEMP_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`emutemp::R`](R) reader structure"] +impl crate::Readable for EmutempSpec {} #[doc = "`reset()` method sets EMUTEMP to value 0"] -impl crate::Resettable for EMUTEMP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EmutempSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/eui48h.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/eui48h.rs index 2767e33..248d63e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/eui48h.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/eui48h.rs @@ -1,37 +1,22 @@ #[doc = "Register `EUI48H` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `OUI48H` reader - OUI48H"] -pub type OUI48H_R = crate::FieldReader; +pub type Oui48hR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - OUI48H"] #[inline(always)] - pub fn oui48h(&self) -> OUI48H_R { - OUI48H_R::new((self.bits & 0xffff) as u16) + pub fn oui48h(&self) -> Oui48hR { + Oui48hR::new((self.bits & 0xffff) as u16) } } -#[doc = "MA-L compliant EUI48 OUI (high bits)\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eui48h](index.html) module"] -pub struct EUI48H_SPEC; -impl crate::RegisterSpec for EUI48H_SPEC { +#[doc = "MA-L compliant EUI48 OUI (high bits)\n\nYou can [`read`](crate::Reg::read) this register and get [`eui48h::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eui48hSpec; +impl crate::RegisterSpec for Eui48hSpec { type Ux = u32; } -#[doc = "`read()` method returns [eui48h::R](R) reader structure"] -impl crate::Readable for EUI48H_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`eui48h::R`](R) reader structure"] +impl crate::Readable for Eui48hSpec {} #[doc = "`reset()` method sets EUI48H to value 0xffff_0000"] -impl crate::Resettable for EUI48H_SPEC { - const RESET_VALUE: Self::Ux = 0xffff_0000; +impl crate::Resettable for Eui48hSpec { + const RESET_VALUE: u32 = 0xffff_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/eui48l.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/eui48l.rs index 68394b6..2919ed2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/eui48l.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/eui48l.rs @@ -1,44 +1,29 @@ #[doc = "Register `EUI48L` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `UNIQUEID` reader - Unique ID"] -pub type UNIQUEID_R = crate::FieldReader; +pub type UniqueidR = crate::FieldReader; #[doc = "Field `OUI48L` reader - OUI48L"] -pub type OUI48L_R = crate::FieldReader; +pub type Oui48lR = crate::FieldReader; impl R { #[doc = "Bits 0:23 - Unique ID"] #[inline(always)] - pub fn uniqueid(&self) -> UNIQUEID_R { - UNIQUEID_R::new(self.bits & 0x00ff_ffff) + pub fn uniqueid(&self) -> UniqueidR { + UniqueidR::new(self.bits & 0x00ff_ffff) } #[doc = "Bits 24:31 - OUI48L"] #[inline(always)] - pub fn oui48l(&self) -> OUI48L_R { - OUI48L_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn oui48l(&self) -> Oui48lR { + Oui48lR::new(((self.bits >> 24) & 0xff) as u8) } } -#[doc = "MA-L compliant EUI48 OUI (low bits) and Unique Identifier (24-bit)\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eui48l](index.html) module"] -pub struct EUI48L_SPEC; -impl crate::RegisterSpec for EUI48L_SPEC { +#[doc = "MA-L compliant EUI48 OUI (low bits) and Unique Identifier (24-bit)\n\nYou can [`read`](crate::Reg::read) this register and get [`eui48l::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eui48lSpec; +impl crate::RegisterSpec for Eui48lSpec { type Ux = u32; } -#[doc = "`read()` method returns [eui48l::R](R) reader structure"] -impl crate::Readable for EUI48L_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`eui48l::R`](R) reader structure"] +impl crate::Readable for Eui48lSpec {} #[doc = "`reset()` method sets EUI48L to value 0"] -impl crate::Resettable for EUI48L_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eui48lSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/eui64h.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/eui64h.rs index 1d0a8c1..0cd88c4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/eui64h.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/eui64h.rs @@ -1,44 +1,29 @@ #[doc = "Register `EUI64H` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `UNIQUEH` reader - UNIQUEH"] -pub type UNIQUEH_R = crate::FieldReader; +pub type UniquehR = crate::FieldReader; #[doc = "Field `OUI64` reader - OUI64"] -pub type OUI64_R = crate::FieldReader; +pub type Oui64R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - UNIQUEH"] #[inline(always)] - pub fn uniqueh(&self) -> UNIQUEH_R { - UNIQUEH_R::new((self.bits & 0xff) as u8) + pub fn uniqueh(&self) -> UniquehR { + UniquehR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:31 - OUI64"] #[inline(always)] - pub fn oui64(&self) -> OUI64_R { - OUI64_R::new((self.bits >> 8) & 0x00ff_ffff) + pub fn oui64(&self) -> Oui64R { + Oui64R::new((self.bits >> 8) & 0x00ff_ffff) } } -#[doc = "MA-L compliant EUI64 OUI and Unique Identifier (high bits)\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eui64h](index.html) module"] -pub struct EUI64H_SPEC; -impl crate::RegisterSpec for EUI64H_SPEC { +#[doc = "MA-L compliant EUI64 OUI and Unique Identifier (high bits)\n\nYou can [`read`](crate::Reg::read) this register and get [`eui64h::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eui64hSpec; +impl crate::RegisterSpec for Eui64hSpec { type Ux = u32; } -#[doc = "`read()` method returns [eui64h::R](R) reader structure"] -impl crate::Readable for EUI64H_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`eui64h::R`](R) reader structure"] +impl crate::Readable for Eui64hSpec {} #[doc = "`reset()` method sets EUI64H to value 0"] -impl crate::Resettable for EUI64H_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eui64hSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/eui64l.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/eui64l.rs index 2bff545..08d7549 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/eui64l.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/eui64l.rs @@ -1,37 +1,22 @@ #[doc = "Register `EUI64L` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `UNIQUEL` reader - UNIQUEL"] -pub type UNIQUEL_R = crate::FieldReader; +pub type UniquelR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - UNIQUEL"] #[inline(always)] - pub fn uniquel(&self) -> UNIQUEL_R { - UNIQUEL_R::new(self.bits) + pub fn uniquel(&self) -> UniquelR { + UniquelR::new(self.bits) } } -#[doc = "MA-L compliant EUI64 Unique Identifier (low bits)\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eui64l](index.html) module"] -pub struct EUI64L_SPEC; -impl crate::RegisterSpec for EUI64L_SPEC { +#[doc = "MA-L compliant EUI64 Unique Identifier (low bits)\n\nYou can [`read`](crate::Reg::read) this register and get [`eui64l::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eui64lSpec; +impl crate::RegisterSpec for Eui64lSpec { type Ux = u32; } -#[doc = "`read()` method returns [eui64l::R](R) reader structure"] -impl crate::Readable for EUI64L_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`eui64l::R`](R) reader structure"] +impl crate::Readable for Eui64lSpec {} #[doc = "`reset()` method sets EUI64L to value 0"] -impl crate::Resettable for EUI64L_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eui64lSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/extinfo.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/extinfo.rs index e19837b..9d1cb33 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/extinfo.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/extinfo.rs @@ -1,115 +1,108 @@ #[doc = "Register `EXTINFO` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `TYPE` reader - Type"] -pub type TYPE_R = crate::FieldReader; +pub type R = crate::R; #[doc = "Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TYPE_A { +pub enum Type { #[doc = "255: NONE"] - NONE = 255, + None = 255, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TYPE_A) -> Self { + fn from(variant: Type) -> Self { variant as _ } } -impl TYPE_R { +impl crate::FieldSpec for Type { + type Ux = u8; +} +impl crate::IsEnum for Type {} +#[doc = "Field `TYPE` reader - Type"] +pub type TypeR = crate::FieldReader; +impl TypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 255 => Some(TYPE_A::NONE), + 255 => Some(Type::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == TYPE_A::NONE + *self == Type::None } } -#[doc = "Field `CONNECTION` reader - Connection"] -pub type CONNECTION_R = crate::FieldReader; #[doc = "Connection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CONNECTION_A { +pub enum Connection { #[doc = "0: SPI control interface"] - SPI = 0, + Spi = 0, #[doc = "255: No interface"] - NONE = 255, + None = 255, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CONNECTION_A) -> Self { + fn from(variant: Connection) -> Self { variant as _ } } -impl CONNECTION_R { +impl crate::FieldSpec for Connection { + type Ux = u8; +} +impl crate::IsEnum for Connection {} +#[doc = "Field `CONNECTION` reader - Connection"] +pub type ConnectionR = crate::FieldReader; +impl ConnectionR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CONNECTION_A::SPI), - 255 => Some(CONNECTION_A::NONE), + 0 => Some(Connection::Spi), + 255 => Some(Connection::None), _ => None, } } - #[doc = "Checks if the value of the field is `SPI`"] + #[doc = "SPI control interface"] #[inline(always)] pub fn is_spi(&self) -> bool { - *self == CONNECTION_A::SPI + *self == Connection::Spi } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No interface"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CONNECTION_A::NONE + *self == Connection::None } } #[doc = "Field `REV` reader - Revision"] -pub type REV_R = crate::FieldReader; +pub type RevR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Type"] #[inline(always)] - pub fn type_(&self) -> TYPE_R { - TYPE_R::new((self.bits & 0xff) as u8) + pub fn type_(&self) -> TypeR { + TypeR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Connection"] #[inline(always)] - pub fn connection(&self) -> CONNECTION_R { - CONNECTION_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn connection(&self) -> ConnectionR { + ConnectionR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Revision"] #[inline(always)] - pub fn rev(&self) -> REV_R { - REV_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn rev(&self) -> RevR { + RevR::new(((self.bits >> 16) & 0xff) as u8) } } -#[doc = "External component description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [extinfo](index.html) module"] -pub struct EXTINFO_SPEC; -impl crate::RegisterSpec for EXTINFO_SPEC { +#[doc = "External component description\n\nYou can [`read`](crate::Reg::read) this register and get [`extinfo::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ExtinfoSpec; +impl crate::RegisterSpec for ExtinfoSpec { type Ux = u32; } -#[doc = "`read()` method returns [extinfo::R](R) reader structure"] -impl crate::Readable for EXTINFO_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`extinfo::R`](R) reader structure"] +impl crate::Readable for ExtinfoSpec {} #[doc = "`reset()` method sets EXTINFO to value 0"] -impl crate::Resettable for EXTINFO_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ExtinfoSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal0.rs index e3fb483..b0cd44d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal0.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCODPLLCAL0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCODPLL Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcodpllcal0](index.html) module"] -pub struct HFRCODPLLCAL0_SPEC; -impl crate::RegisterSpec for HFRCODPLLCAL0_SPEC { +#[doc = "HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcodpllcal0Spec; +impl crate::RegisterSpec for Hfrcodpllcal0Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcodpllcal0::R](R) reader structure"] -impl crate::Readable for HFRCODPLLCAL0_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcodpllcal0::R`](R) reader structure"] +impl crate::Readable for Hfrcodpllcal0Spec {} #[doc = "`reset()` method sets HFRCODPLLCAL0 to value 0"] -impl crate::Resettable for HFRCODPLLCAL0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcodpllcal0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal1.rs index 0965562..99cffab 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal1.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCODPLLCAL1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCODPLL Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcodpllcal1](index.html) module"] -pub struct HFRCODPLLCAL1_SPEC; -impl crate::RegisterSpec for HFRCODPLLCAL1_SPEC { +#[doc = "HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcodpllcal1Spec; +impl crate::RegisterSpec for Hfrcodpllcal1Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcodpllcal1::R](R) reader structure"] -impl crate::Readable for HFRCODPLLCAL1_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcodpllcal1::R`](R) reader structure"] +impl crate::Readable for Hfrcodpllcal1Spec {} #[doc = "`reset()` method sets HFRCODPLLCAL1 to value 0"] -impl crate::Resettable for HFRCODPLLCAL1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcodpllcal1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal10.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal10.rs index 4150bfa..accc57d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal10.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal10.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCODPLLCAL10` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCODPLL Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcodpllcal10](index.html) module"] -pub struct HFRCODPLLCAL10_SPEC; -impl crate::RegisterSpec for HFRCODPLLCAL10_SPEC { +#[doc = "HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal10::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcodpllcal10Spec; +impl crate::RegisterSpec for Hfrcodpllcal10Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcodpllcal10::R](R) reader structure"] -impl crate::Readable for HFRCODPLLCAL10_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcodpllcal10::R`](R) reader structure"] +impl crate::Readable for Hfrcodpllcal10Spec {} #[doc = "`reset()` method sets HFRCODPLLCAL10 to value 0"] -impl crate::Resettable for HFRCODPLLCAL10_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcodpllcal10Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal11.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal11.rs index 11f11d0..d73cbbf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal11.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal11.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCODPLLCAL11` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCODPLL Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcodpllcal11](index.html) module"] -pub struct HFRCODPLLCAL11_SPEC; -impl crate::RegisterSpec for HFRCODPLLCAL11_SPEC { +#[doc = "HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal11::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcodpllcal11Spec; +impl crate::RegisterSpec for Hfrcodpllcal11Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcodpllcal11::R](R) reader structure"] -impl crate::Readable for HFRCODPLLCAL11_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcodpllcal11::R`](R) reader structure"] +impl crate::Readable for Hfrcodpllcal11Spec {} #[doc = "`reset()` method sets HFRCODPLLCAL11 to value 0"] -impl crate::Resettable for HFRCODPLLCAL11_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcodpllcal11Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal12.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal12.rs index c15ac9f..87f188c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal12.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal12.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCODPLLCAL12` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCODPLL Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcodpllcal12](index.html) module"] -pub struct HFRCODPLLCAL12_SPEC; -impl crate::RegisterSpec for HFRCODPLLCAL12_SPEC { +#[doc = "HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal12::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcodpllcal12Spec; +impl crate::RegisterSpec for Hfrcodpllcal12Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcodpllcal12::R](R) reader structure"] -impl crate::Readable for HFRCODPLLCAL12_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcodpllcal12::R`](R) reader structure"] +impl crate::Readable for Hfrcodpllcal12Spec {} #[doc = "`reset()` method sets HFRCODPLLCAL12 to value 0"] -impl crate::Resettable for HFRCODPLLCAL12_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcodpllcal12Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal13.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal13.rs index ab8f3a5..7e91da1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal13.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal13.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCODPLLCAL13` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCODPLL Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcodpllcal13](index.html) module"] -pub struct HFRCODPLLCAL13_SPEC; -impl crate::RegisterSpec for HFRCODPLLCAL13_SPEC { +#[doc = "HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal13::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcodpllcal13Spec; +impl crate::RegisterSpec for Hfrcodpllcal13Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcodpllcal13::R](R) reader structure"] -impl crate::Readable for HFRCODPLLCAL13_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcodpllcal13::R`](R) reader structure"] +impl crate::Readable for Hfrcodpllcal13Spec {} #[doc = "`reset()` method sets HFRCODPLLCAL13 to value 0"] -impl crate::Resettable for HFRCODPLLCAL13_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcodpllcal13Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal14.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal14.rs index b28d039..793ee62 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal14.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal14.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCODPLLCAL14` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCODPLL Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcodpllcal14](index.html) module"] -pub struct HFRCODPLLCAL14_SPEC; -impl crate::RegisterSpec for HFRCODPLLCAL14_SPEC { +#[doc = "HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal14::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcodpllcal14Spec; +impl crate::RegisterSpec for Hfrcodpllcal14Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcodpllcal14::R](R) reader structure"] -impl crate::Readable for HFRCODPLLCAL14_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcodpllcal14::R`](R) reader structure"] +impl crate::Readable for Hfrcodpllcal14Spec {} #[doc = "`reset()` method sets HFRCODPLLCAL14 to value 0"] -impl crate::Resettable for HFRCODPLLCAL14_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcodpllcal14Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal15.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal15.rs index 182320e..2a5466e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal15.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal15.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCODPLLCAL15` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCODPLL Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcodpllcal15](index.html) module"] -pub struct HFRCODPLLCAL15_SPEC; -impl crate::RegisterSpec for HFRCODPLLCAL15_SPEC { +#[doc = "HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal15::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcodpllcal15Spec; +impl crate::RegisterSpec for Hfrcodpllcal15Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcodpllcal15::R](R) reader structure"] -impl crate::Readable for HFRCODPLLCAL15_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcodpllcal15::R`](R) reader structure"] +impl crate::Readable for Hfrcodpllcal15Spec {} #[doc = "`reset()` method sets HFRCODPLLCAL15 to value 0"] -impl crate::Resettable for HFRCODPLLCAL15_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcodpllcal15Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal16.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal16.rs index 490252e..8775e7f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal16.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal16.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCODPLLCAL16` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCODPLL Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcodpllcal16](index.html) module"] -pub struct HFRCODPLLCAL16_SPEC; -impl crate::RegisterSpec for HFRCODPLLCAL16_SPEC { +#[doc = "HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal16::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcodpllcal16Spec; +impl crate::RegisterSpec for Hfrcodpllcal16Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcodpllcal16::R](R) reader structure"] -impl crate::Readable for HFRCODPLLCAL16_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcodpllcal16::R`](R) reader structure"] +impl crate::Readable for Hfrcodpllcal16Spec {} #[doc = "`reset()` method sets HFRCODPLLCAL16 to value 0"] -impl crate::Resettable for HFRCODPLLCAL16_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcodpllcal16Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal17.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal17.rs index 596b43b..f78aded 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal17.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal17.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCODPLLCAL17` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCODPLL Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcodpllcal17](index.html) module"] -pub struct HFRCODPLLCAL17_SPEC; -impl crate::RegisterSpec for HFRCODPLLCAL17_SPEC { +#[doc = "HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal17::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcodpllcal17Spec; +impl crate::RegisterSpec for Hfrcodpllcal17Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcodpllcal17::R](R) reader structure"] -impl crate::Readable for HFRCODPLLCAL17_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcodpllcal17::R`](R) reader structure"] +impl crate::Readable for Hfrcodpllcal17Spec {} #[doc = "`reset()` method sets HFRCODPLLCAL17 to value 0"] -impl crate::Resettable for HFRCODPLLCAL17_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcodpllcal17Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal2.rs index 8bd0d6b..44c94d5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal2.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCODPLLCAL2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCODPLL Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcodpllcal2](index.html) module"] -pub struct HFRCODPLLCAL2_SPEC; -impl crate::RegisterSpec for HFRCODPLLCAL2_SPEC { +#[doc = "HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcodpllcal2Spec; +impl crate::RegisterSpec for Hfrcodpllcal2Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcodpllcal2::R](R) reader structure"] -impl crate::Readable for HFRCODPLLCAL2_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcodpllcal2::R`](R) reader structure"] +impl crate::Readable for Hfrcodpllcal2Spec {} #[doc = "`reset()` method sets HFRCODPLLCAL2 to value 0"] -impl crate::Resettable for HFRCODPLLCAL2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcodpllcal2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal3.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal3.rs index 636c5db..346e778 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal3.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal3.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCODPLLCAL3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCODPLL Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcodpllcal3](index.html) module"] -pub struct HFRCODPLLCAL3_SPEC; -impl crate::RegisterSpec for HFRCODPLLCAL3_SPEC { +#[doc = "HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal3::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcodpllcal3Spec; +impl crate::RegisterSpec for Hfrcodpllcal3Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcodpllcal3::R](R) reader structure"] -impl crate::Readable for HFRCODPLLCAL3_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcodpllcal3::R`](R) reader structure"] +impl crate::Readable for Hfrcodpllcal3Spec {} #[doc = "`reset()` method sets HFRCODPLLCAL3 to value 0"] -impl crate::Resettable for HFRCODPLLCAL3_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcodpllcal3Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal4.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal4.rs index 81bc5a5..a83cd2f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal4.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal4.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCODPLLCAL4` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCODPLL Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcodpllcal4](index.html) module"] -pub struct HFRCODPLLCAL4_SPEC; -impl crate::RegisterSpec for HFRCODPLLCAL4_SPEC { +#[doc = "HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal4::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcodpllcal4Spec; +impl crate::RegisterSpec for Hfrcodpllcal4Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcodpllcal4::R](R) reader structure"] -impl crate::Readable for HFRCODPLLCAL4_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcodpllcal4::R`](R) reader structure"] +impl crate::Readable for Hfrcodpllcal4Spec {} #[doc = "`reset()` method sets HFRCODPLLCAL4 to value 0"] -impl crate::Resettable for HFRCODPLLCAL4_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcodpllcal4Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal5.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal5.rs index 1645e28..3d724d0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal5.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal5.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCODPLLCAL5` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCODPLL Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcodpllcal5](index.html) module"] -pub struct HFRCODPLLCAL5_SPEC; -impl crate::RegisterSpec for HFRCODPLLCAL5_SPEC { +#[doc = "HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal5::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcodpllcal5Spec; +impl crate::RegisterSpec for Hfrcodpllcal5Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcodpllcal5::R](R) reader structure"] -impl crate::Readable for HFRCODPLLCAL5_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcodpllcal5::R`](R) reader structure"] +impl crate::Readable for Hfrcodpllcal5Spec {} #[doc = "`reset()` method sets HFRCODPLLCAL5 to value 0"] -impl crate::Resettable for HFRCODPLLCAL5_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcodpllcal5Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal6.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal6.rs index 7f7031c..ae58365 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal6.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal6.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCODPLLCAL6` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCODPLL Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcodpllcal6](index.html) module"] -pub struct HFRCODPLLCAL6_SPEC; -impl crate::RegisterSpec for HFRCODPLLCAL6_SPEC { +#[doc = "HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal6::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcodpllcal6Spec; +impl crate::RegisterSpec for Hfrcodpllcal6Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcodpllcal6::R](R) reader structure"] -impl crate::Readable for HFRCODPLLCAL6_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcodpllcal6::R`](R) reader structure"] +impl crate::Readable for Hfrcodpllcal6Spec {} #[doc = "`reset()` method sets HFRCODPLLCAL6 to value 0"] -impl crate::Resettable for HFRCODPLLCAL6_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcodpllcal6Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal7.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal7.rs index 0612af9..79bd270 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal7.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal7.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCODPLLCAL7` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCODPLL Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcodpllcal7](index.html) module"] -pub struct HFRCODPLLCAL7_SPEC; -impl crate::RegisterSpec for HFRCODPLLCAL7_SPEC { +#[doc = "HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal7::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcodpllcal7Spec; +impl crate::RegisterSpec for Hfrcodpllcal7Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcodpllcal7::R](R) reader structure"] -impl crate::Readable for HFRCODPLLCAL7_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcodpllcal7::R`](R) reader structure"] +impl crate::Readable for Hfrcodpllcal7Spec {} #[doc = "`reset()` method sets HFRCODPLLCAL7 to value 0"] -impl crate::Resettable for HFRCODPLLCAL7_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcodpllcal7Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal8.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal8.rs index 0c8e4b6..b327472 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal8.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal8.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCODPLLCAL8` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCODPLL Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcodpllcal8](index.html) module"] -pub struct HFRCODPLLCAL8_SPEC; -impl crate::RegisterSpec for HFRCODPLLCAL8_SPEC { +#[doc = "HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal8::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcodpllcal8Spec; +impl crate::RegisterSpec for Hfrcodpllcal8Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcodpllcal8::R](R) reader structure"] -impl crate::Readable for HFRCODPLLCAL8_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcodpllcal8::R`](R) reader structure"] +impl crate::Readable for Hfrcodpllcal8Spec {} #[doc = "`reset()` method sets HFRCODPLLCAL8 to value 0"] -impl crate::Resettable for HFRCODPLLCAL8_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcodpllcal8Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal9.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal9.rs index 88b01f7..0599af7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal9.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcodpllcal9.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCODPLLCAL9` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCODPLL Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcodpllcal9](index.html) module"] -pub struct HFRCODPLLCAL9_SPEC; -impl crate::RegisterSpec for HFRCODPLLCAL9_SPEC { +#[doc = "HFRCODPLL Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcodpllcal9::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcodpllcal9Spec; +impl crate::RegisterSpec for Hfrcodpllcal9Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcodpllcal9::R](R) reader structure"] -impl crate::Readable for HFRCODPLLCAL9_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcodpllcal9::R`](R) reader structure"] +impl crate::Readable for Hfrcodpllcal9Spec {} #[doc = "`reset()` method sets HFRCODPLLCAL9 to value 0"] -impl crate::Resettable for HFRCODPLLCAL9_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcodpllcal9Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal0.rs index a77b418..fe451da 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal0.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCOEM23CAL0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCOEM23 Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcoem23cal0](index.html) module"] -pub struct HFRCOEM23CAL0_SPEC; -impl crate::RegisterSpec for HFRCOEM23CAL0_SPEC { +#[doc = "HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcoem23cal0Spec; +impl crate::RegisterSpec for Hfrcoem23cal0Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcoem23cal0::R](R) reader structure"] -impl crate::Readable for HFRCOEM23CAL0_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcoem23cal0::R`](R) reader structure"] +impl crate::Readable for Hfrcoem23cal0Spec {} #[doc = "`reset()` method sets HFRCOEM23CAL0 to value 0"] -impl crate::Resettable for HFRCOEM23CAL0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcoem23cal0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal1.rs index 7028e5c..852df98 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal1.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCOEM23CAL1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCOEM23 Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcoem23cal1](index.html) module"] -pub struct HFRCOEM23CAL1_SPEC; -impl crate::RegisterSpec for HFRCOEM23CAL1_SPEC { +#[doc = "HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcoem23cal1Spec; +impl crate::RegisterSpec for Hfrcoem23cal1Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcoem23cal1::R](R) reader structure"] -impl crate::Readable for HFRCOEM23CAL1_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcoem23cal1::R`](R) reader structure"] +impl crate::Readable for Hfrcoem23cal1Spec {} #[doc = "`reset()` method sets HFRCOEM23CAL1 to value 0"] -impl crate::Resettable for HFRCOEM23CAL1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcoem23cal1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal10.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal10.rs index 5617cc5..bd9e82d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal10.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal10.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCOEM23CAL10` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCOEM23 Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcoem23cal10](index.html) module"] -pub struct HFRCOEM23CAL10_SPEC; -impl crate::RegisterSpec for HFRCOEM23CAL10_SPEC { +#[doc = "HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal10::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcoem23cal10Spec; +impl crate::RegisterSpec for Hfrcoem23cal10Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcoem23cal10::R](R) reader structure"] -impl crate::Readable for HFRCOEM23CAL10_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcoem23cal10::R`](R) reader structure"] +impl crate::Readable for Hfrcoem23cal10Spec {} #[doc = "`reset()` method sets HFRCOEM23CAL10 to value 0"] -impl crate::Resettable for HFRCOEM23CAL10_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcoem23cal10Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal11.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal11.rs index fc6014e..9f2a26e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal11.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal11.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCOEM23CAL11` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCOEM23 Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcoem23cal11](index.html) module"] -pub struct HFRCOEM23CAL11_SPEC; -impl crate::RegisterSpec for HFRCOEM23CAL11_SPEC { +#[doc = "HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal11::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcoem23cal11Spec; +impl crate::RegisterSpec for Hfrcoem23cal11Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcoem23cal11::R](R) reader structure"] -impl crate::Readable for HFRCOEM23CAL11_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcoem23cal11::R`](R) reader structure"] +impl crate::Readable for Hfrcoem23cal11Spec {} #[doc = "`reset()` method sets HFRCOEM23CAL11 to value 0"] -impl crate::Resettable for HFRCOEM23CAL11_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcoem23cal11Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal12.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal12.rs index 80f616c..a2797ab 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal12.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal12.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCOEM23CAL12` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCOEM23 Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcoem23cal12](index.html) module"] -pub struct HFRCOEM23CAL12_SPEC; -impl crate::RegisterSpec for HFRCOEM23CAL12_SPEC { +#[doc = "HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal12::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcoem23cal12Spec; +impl crate::RegisterSpec for Hfrcoem23cal12Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcoem23cal12::R](R) reader structure"] -impl crate::Readable for HFRCOEM23CAL12_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcoem23cal12::R`](R) reader structure"] +impl crate::Readable for Hfrcoem23cal12Spec {} #[doc = "`reset()` method sets HFRCOEM23CAL12 to value 0"] -impl crate::Resettable for HFRCOEM23CAL12_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcoem23cal12Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal13.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal13.rs index bc07ff6..ecd8dd3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal13.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal13.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCOEM23CAL13` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCOEM23 Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcoem23cal13](index.html) module"] -pub struct HFRCOEM23CAL13_SPEC; -impl crate::RegisterSpec for HFRCOEM23CAL13_SPEC { +#[doc = "HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal13::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcoem23cal13Spec; +impl crate::RegisterSpec for Hfrcoem23cal13Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcoem23cal13::R](R) reader structure"] -impl crate::Readable for HFRCOEM23CAL13_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcoem23cal13::R`](R) reader structure"] +impl crate::Readable for Hfrcoem23cal13Spec {} #[doc = "`reset()` method sets HFRCOEM23CAL13 to value 0"] -impl crate::Resettable for HFRCOEM23CAL13_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcoem23cal13Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal14.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal14.rs index 3b75557..9039b71 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal14.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal14.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCOEM23CAL14` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCOEM23 Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcoem23cal14](index.html) module"] -pub struct HFRCOEM23CAL14_SPEC; -impl crate::RegisterSpec for HFRCOEM23CAL14_SPEC { +#[doc = "HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal14::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcoem23cal14Spec; +impl crate::RegisterSpec for Hfrcoem23cal14Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcoem23cal14::R](R) reader structure"] -impl crate::Readable for HFRCOEM23CAL14_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcoem23cal14::R`](R) reader structure"] +impl crate::Readable for Hfrcoem23cal14Spec {} #[doc = "`reset()` method sets HFRCOEM23CAL14 to value 0"] -impl crate::Resettable for HFRCOEM23CAL14_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcoem23cal14Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal15.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal15.rs index 7ef8757..1223b10 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal15.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal15.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCOEM23CAL15` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCOEM23 Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcoem23cal15](index.html) module"] -pub struct HFRCOEM23CAL15_SPEC; -impl crate::RegisterSpec for HFRCOEM23CAL15_SPEC { +#[doc = "HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal15::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcoem23cal15Spec; +impl crate::RegisterSpec for Hfrcoem23cal15Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcoem23cal15::R](R) reader structure"] -impl crate::Readable for HFRCOEM23CAL15_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcoem23cal15::R`](R) reader structure"] +impl crate::Readable for Hfrcoem23cal15Spec {} #[doc = "`reset()` method sets HFRCOEM23CAL15 to value 0"] -impl crate::Resettable for HFRCOEM23CAL15_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcoem23cal15Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal16.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal16.rs index 020dca8..b29440e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal16.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal16.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCOEM23CAL16` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCOEM23 Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcoem23cal16](index.html) module"] -pub struct HFRCOEM23CAL16_SPEC; -impl crate::RegisterSpec for HFRCOEM23CAL16_SPEC { +#[doc = "HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal16::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcoem23cal16Spec; +impl crate::RegisterSpec for Hfrcoem23cal16Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcoem23cal16::R](R) reader structure"] -impl crate::Readable for HFRCOEM23CAL16_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcoem23cal16::R`](R) reader structure"] +impl crate::Readable for Hfrcoem23cal16Spec {} #[doc = "`reset()` method sets HFRCOEM23CAL16 to value 0"] -impl crate::Resettable for HFRCOEM23CAL16_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcoem23cal16Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal17.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal17.rs index 04a48cf..09239b4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal17.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal17.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCOEM23CAL17` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCOEM23 Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcoem23cal17](index.html) module"] -pub struct HFRCOEM23CAL17_SPEC; -impl crate::RegisterSpec for HFRCOEM23CAL17_SPEC { +#[doc = "HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal17::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcoem23cal17Spec; +impl crate::RegisterSpec for Hfrcoem23cal17Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcoem23cal17::R](R) reader structure"] -impl crate::Readable for HFRCOEM23CAL17_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcoem23cal17::R`](R) reader structure"] +impl crate::Readable for Hfrcoem23cal17Spec {} #[doc = "`reset()` method sets HFRCOEM23CAL17 to value 0"] -impl crate::Resettable for HFRCOEM23CAL17_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcoem23cal17Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal2.rs index 894adba..c16457e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal2.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCOEM23CAL2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCOEM23 Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcoem23cal2](index.html) module"] -pub struct HFRCOEM23CAL2_SPEC; -impl crate::RegisterSpec for HFRCOEM23CAL2_SPEC { +#[doc = "HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcoem23cal2Spec; +impl crate::RegisterSpec for Hfrcoem23cal2Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcoem23cal2::R](R) reader structure"] -impl crate::Readable for HFRCOEM23CAL2_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcoem23cal2::R`](R) reader structure"] +impl crate::Readable for Hfrcoem23cal2Spec {} #[doc = "`reset()` method sets HFRCOEM23CAL2 to value 0"] -impl crate::Resettable for HFRCOEM23CAL2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcoem23cal2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal3.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal3.rs index 380a469..04041c4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal3.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal3.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCOEM23CAL3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCOEM23 Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcoem23cal3](index.html) module"] -pub struct HFRCOEM23CAL3_SPEC; -impl crate::RegisterSpec for HFRCOEM23CAL3_SPEC { +#[doc = "HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal3::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcoem23cal3Spec; +impl crate::RegisterSpec for Hfrcoem23cal3Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcoem23cal3::R](R) reader structure"] -impl crate::Readable for HFRCOEM23CAL3_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcoem23cal3::R`](R) reader structure"] +impl crate::Readable for Hfrcoem23cal3Spec {} #[doc = "`reset()` method sets HFRCOEM23CAL3 to value 0"] -impl crate::Resettable for HFRCOEM23CAL3_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcoem23cal3Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal4.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal4.rs index 75a5729..4a0ab70 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal4.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal4.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCOEM23CAL4` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCOEM23 Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcoem23cal4](index.html) module"] -pub struct HFRCOEM23CAL4_SPEC; -impl crate::RegisterSpec for HFRCOEM23CAL4_SPEC { +#[doc = "HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal4::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcoem23cal4Spec; +impl crate::RegisterSpec for Hfrcoem23cal4Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcoem23cal4::R](R) reader structure"] -impl crate::Readable for HFRCOEM23CAL4_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcoem23cal4::R`](R) reader structure"] +impl crate::Readable for Hfrcoem23cal4Spec {} #[doc = "`reset()` method sets HFRCOEM23CAL4 to value 0"] -impl crate::Resettable for HFRCOEM23CAL4_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcoem23cal4Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal5.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal5.rs index c3501e1..40101b1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal5.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal5.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCOEM23CAL5` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCOEM23 Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcoem23cal5](index.html) module"] -pub struct HFRCOEM23CAL5_SPEC; -impl crate::RegisterSpec for HFRCOEM23CAL5_SPEC { +#[doc = "HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal5::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcoem23cal5Spec; +impl crate::RegisterSpec for Hfrcoem23cal5Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcoem23cal5::R](R) reader structure"] -impl crate::Readable for HFRCOEM23CAL5_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcoem23cal5::R`](R) reader structure"] +impl crate::Readable for Hfrcoem23cal5Spec {} #[doc = "`reset()` method sets HFRCOEM23CAL5 to value 0"] -impl crate::Resettable for HFRCOEM23CAL5_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcoem23cal5Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal6.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal6.rs index 5097191..bbe6a55 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal6.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal6.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCOEM23CAL6` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCOEM23 Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcoem23cal6](index.html) module"] -pub struct HFRCOEM23CAL6_SPEC; -impl crate::RegisterSpec for HFRCOEM23CAL6_SPEC { +#[doc = "HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal6::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcoem23cal6Spec; +impl crate::RegisterSpec for Hfrcoem23cal6Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcoem23cal6::R](R) reader structure"] -impl crate::Readable for HFRCOEM23CAL6_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcoem23cal6::R`](R) reader structure"] +impl crate::Readable for Hfrcoem23cal6Spec {} #[doc = "`reset()` method sets HFRCOEM23CAL6 to value 0"] -impl crate::Resettable for HFRCOEM23CAL6_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcoem23cal6Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal7.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal7.rs index db79ef6..bb18cd0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal7.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal7.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCOEM23CAL7` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCOEM23 Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcoem23cal7](index.html) module"] -pub struct HFRCOEM23CAL7_SPEC; -impl crate::RegisterSpec for HFRCOEM23CAL7_SPEC { +#[doc = "HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal7::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcoem23cal7Spec; +impl crate::RegisterSpec for Hfrcoem23cal7Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcoem23cal7::R](R) reader structure"] -impl crate::Readable for HFRCOEM23CAL7_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcoem23cal7::R`](R) reader structure"] +impl crate::Readable for Hfrcoem23cal7Spec {} #[doc = "`reset()` method sets HFRCOEM23CAL7 to value 0"] -impl crate::Resettable for HFRCOEM23CAL7_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcoem23cal7Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal8.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal8.rs index 86db6a9..482503b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal8.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal8.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCOEM23CAL8` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCOEM23 Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcoem23cal8](index.html) module"] -pub struct HFRCOEM23CAL8_SPEC; -impl crate::RegisterSpec for HFRCOEM23CAL8_SPEC { +#[doc = "HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal8::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcoem23cal8Spec; +impl crate::RegisterSpec for Hfrcoem23cal8Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcoem23cal8::R](R) reader structure"] -impl crate::Readable for HFRCOEM23CAL8_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcoem23cal8::R`](R) reader structure"] +impl crate::Readable for Hfrcoem23cal8Spec {} #[doc = "`reset()` method sets HFRCOEM23CAL8 to value 0"] -impl crate::Resettable for HFRCOEM23CAL8_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcoem23cal8Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal9.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal9.rs index 30ec6ea..fc5fc4f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal9.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfrcoem23cal9.rs @@ -1,86 +1,71 @@ #[doc = "Register `HFRCOEM23CAL9` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TUNING` reader - No Description"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `FINETUNING` reader - No Description"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `LDOHP` reader - No Description"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `FREQRANGE` reader - No Description"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `CMPBIAS` reader - No Description"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CLKDIV` reader - No Description"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CMPSEL` reader - No Description"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `IREFTC` reader - No Description"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - No Description"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - No Description"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - No Description"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - No Description"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - No Description"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - No Description"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - No Description"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "HFRCOEM23 Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcoem23cal9](index.html) module"] -pub struct HFRCOEM23CAL9_SPEC; -impl crate::RegisterSpec for HFRCOEM23CAL9_SPEC { +#[doc = "HFRCOEM23 Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`hfrcoem23cal9::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Hfrcoem23cal9Spec; +impl crate::RegisterSpec for Hfrcoem23cal9Spec { type Ux = u32; } -#[doc = "`read()` method returns [hfrcoem23cal9::R](R) reader structure"] -impl crate::Readable for HFRCOEM23CAL9_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfrcoem23cal9::R`](R) reader structure"] +impl crate::Readable for Hfrcoem23cal9Spec {} #[doc = "`reset()` method sets HFRCOEM23CAL9 to value 0"] -impl crate::Resettable for HFRCOEM23CAL9_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Hfrcoem23cal9Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfxocal.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfxocal.rs index 962ff3e..1304233 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfxocal.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/hfxocal.rs @@ -1,192 +1,181 @@ #[doc = "Register `HFXOCAL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `SHUNTBIASANA` reader - No Description"] -pub type SHUNTBIASANA_R = crate::FieldReader; +pub type R = crate::R; #[doc = "No Description\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SHUNTBIASANA_A { +pub enum Shuntbiasana { #[doc = "0: I20UA"] - I20UA = 0, + I20ua = 0, #[doc = "1: I30UA"] - I30UA = 1, + I30ua = 1, #[doc = "2: I40UA"] - I40UA = 2, + I40ua = 2, #[doc = "3: I50UA"] - I50UA = 3, + I50ua = 3, #[doc = "4: I60UA"] - I60UA = 4, + I60ua = 4, #[doc = "5: I70UA"] - I70UA = 5, + I70ua = 5, #[doc = "6: I80UA"] - I80UA = 6, + I80ua = 6, #[doc = "7: I90UA"] - I90UA = 7, + I90ua = 7, #[doc = "8: I100UA"] - I100UA = 8, + I100ua = 8, #[doc = "9: I110UA"] - I110UA = 9, + I110ua = 9, #[doc = "10: I120UA"] - I120UA = 10, + I120ua = 10, #[doc = "11: I130UA"] - I130UA = 11, + I130ua = 11, #[doc = "12: I140UA"] - I140UA = 12, + I140ua = 12, #[doc = "13: I150UA"] - I150UA = 13, + I150ua = 13, #[doc = "14: I160UA"] - I160UA = 14, + I160ua = 14, #[doc = "15: I170UA"] - I170UA = 15, + I170ua = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SHUNTBIASANA_A) -> Self { + fn from(variant: Shuntbiasana) -> Self { variant as _ } } -impl SHUNTBIASANA_R { +impl crate::FieldSpec for Shuntbiasana { + type Ux = u8; +} +impl crate::IsEnum for Shuntbiasana {} +#[doc = "Field `SHUNTBIASANA` reader - No Description"] +pub type ShuntbiasanaR = crate::FieldReader; +impl ShuntbiasanaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SHUNTBIASANA_A { + pub const fn variant(&self) -> Shuntbiasana { match self.bits { - 0 => SHUNTBIASANA_A::I20UA, - 1 => SHUNTBIASANA_A::I30UA, - 2 => SHUNTBIASANA_A::I40UA, - 3 => SHUNTBIASANA_A::I50UA, - 4 => SHUNTBIASANA_A::I60UA, - 5 => SHUNTBIASANA_A::I70UA, - 6 => SHUNTBIASANA_A::I80UA, - 7 => SHUNTBIASANA_A::I90UA, - 8 => SHUNTBIASANA_A::I100UA, - 9 => SHUNTBIASANA_A::I110UA, - 10 => SHUNTBIASANA_A::I120UA, - 11 => SHUNTBIASANA_A::I130UA, - 12 => SHUNTBIASANA_A::I140UA, - 13 => SHUNTBIASANA_A::I150UA, - 14 => SHUNTBIASANA_A::I160UA, - 15 => SHUNTBIASANA_A::I170UA, + 0 => Shuntbiasana::I20ua, + 1 => Shuntbiasana::I30ua, + 2 => Shuntbiasana::I40ua, + 3 => Shuntbiasana::I50ua, + 4 => Shuntbiasana::I60ua, + 5 => Shuntbiasana::I70ua, + 6 => Shuntbiasana::I80ua, + 7 => Shuntbiasana::I90ua, + 8 => Shuntbiasana::I100ua, + 9 => Shuntbiasana::I110ua, + 10 => Shuntbiasana::I120ua, + 11 => Shuntbiasana::I130ua, + 12 => Shuntbiasana::I140ua, + 13 => Shuntbiasana::I150ua, + 14 => Shuntbiasana::I160ua, + 15 => Shuntbiasana::I170ua, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `I20UA`"] + #[doc = "I20UA"] #[inline(always)] pub fn is_i20ua(&self) -> bool { - *self == SHUNTBIASANA_A::I20UA + *self == Shuntbiasana::I20ua } - #[doc = "Checks if the value of the field is `I30UA`"] + #[doc = "I30UA"] #[inline(always)] pub fn is_i30ua(&self) -> bool { - *self == SHUNTBIASANA_A::I30UA + *self == Shuntbiasana::I30ua } - #[doc = "Checks if the value of the field is `I40UA`"] + #[doc = "I40UA"] #[inline(always)] pub fn is_i40ua(&self) -> bool { - *self == SHUNTBIASANA_A::I40UA + *self == Shuntbiasana::I40ua } - #[doc = "Checks if the value of the field is `I50UA`"] + #[doc = "I50UA"] #[inline(always)] pub fn is_i50ua(&self) -> bool { - *self == SHUNTBIASANA_A::I50UA + *self == Shuntbiasana::I50ua } - #[doc = "Checks if the value of the field is `I60UA`"] + #[doc = "I60UA"] #[inline(always)] pub fn is_i60ua(&self) -> bool { - *self == SHUNTBIASANA_A::I60UA + *self == Shuntbiasana::I60ua } - #[doc = "Checks if the value of the field is `I70UA`"] + #[doc = "I70UA"] #[inline(always)] pub fn is_i70ua(&self) -> bool { - *self == SHUNTBIASANA_A::I70UA + *self == Shuntbiasana::I70ua } - #[doc = "Checks if the value of the field is `I80UA`"] + #[doc = "I80UA"] #[inline(always)] pub fn is_i80ua(&self) -> bool { - *self == SHUNTBIASANA_A::I80UA + *self == Shuntbiasana::I80ua } - #[doc = "Checks if the value of the field is `I90UA`"] + #[doc = "I90UA"] #[inline(always)] pub fn is_i90ua(&self) -> bool { - *self == SHUNTBIASANA_A::I90UA + *self == Shuntbiasana::I90ua } - #[doc = "Checks if the value of the field is `I100UA`"] + #[doc = "I100UA"] #[inline(always)] pub fn is_i100ua(&self) -> bool { - *self == SHUNTBIASANA_A::I100UA + *self == Shuntbiasana::I100ua } - #[doc = "Checks if the value of the field is `I110UA`"] + #[doc = "I110UA"] #[inline(always)] pub fn is_i110ua(&self) -> bool { - *self == SHUNTBIASANA_A::I110UA + *self == Shuntbiasana::I110ua } - #[doc = "Checks if the value of the field is `I120UA`"] + #[doc = "I120UA"] #[inline(always)] pub fn is_i120ua(&self) -> bool { - *self == SHUNTBIASANA_A::I120UA + *self == Shuntbiasana::I120ua } - #[doc = "Checks if the value of the field is `I130UA`"] + #[doc = "I130UA"] #[inline(always)] pub fn is_i130ua(&self) -> bool { - *self == SHUNTBIASANA_A::I130UA + *self == Shuntbiasana::I130ua } - #[doc = "Checks if the value of the field is `I140UA`"] + #[doc = "I140UA"] #[inline(always)] pub fn is_i140ua(&self) -> bool { - *self == SHUNTBIASANA_A::I140UA + *self == Shuntbiasana::I140ua } - #[doc = "Checks if the value of the field is `I150UA`"] + #[doc = "I150UA"] #[inline(always)] pub fn is_i150ua(&self) -> bool { - *self == SHUNTBIASANA_A::I150UA + *self == Shuntbiasana::I150ua } - #[doc = "Checks if the value of the field is `I160UA`"] + #[doc = "I160UA"] #[inline(always)] pub fn is_i160ua(&self) -> bool { - *self == SHUNTBIASANA_A::I160UA + *self == Shuntbiasana::I160ua } - #[doc = "Checks if the value of the field is `I170UA`"] + #[doc = "I170UA"] #[inline(always)] pub fn is_i170ua(&self) -> bool { - *self == SHUNTBIASANA_A::I170UA + *self == Shuntbiasana::I170ua } } #[doc = "Field `VTRTRIMANA` reader - No Description"] -pub type VTRTRIMANA_R = crate::FieldReader; +pub type VtrtrimanaR = crate::FieldReader; impl R { #[doc = "Bits 0:3 - No Description"] #[inline(always)] - pub fn shuntbiasana(&self) -> SHUNTBIASANA_R { - SHUNTBIASANA_R::new((self.bits & 0x0f) as u8) + pub fn shuntbiasana(&self) -> ShuntbiasanaR { + ShuntbiasanaR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - No Description"] #[inline(always)] - pub fn vtrtrimana(&self) -> VTRTRIMANA_R { - VTRTRIMANA_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn vtrtrimana(&self) -> VtrtrimanaR { + VtrtrimanaR::new(((self.bits >> 4) & 0x0f) as u8) } } -#[doc = "High Frequency Crystal Oscillator Calibration data\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfxocal](index.html) module"] -pub struct HFXOCAL_SPEC; -impl crate::RegisterSpec for HFXOCAL_SPEC { +#[doc = "High Frequency Crystal Oscillator Calibration data\n\nYou can [`read`](crate::Reg::read) this register and get [`hfxocal::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct HfxocalSpec; +impl crate::RegisterSpec for HfxocalSpec { type Ux = u32; } -#[doc = "`read()` method returns [hfxocal::R](R) reader structure"] -impl crate::Readable for HFXOCAL_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`hfxocal::R`](R) reader structure"] +impl crate::Readable for HfxocalSpec {} #[doc = "`reset()` method sets HFXOCAL to value 0xffff_ff00"] -impl crate::Resettable for HFXOCAL_SPEC { - const RESET_VALUE: Self::Ux = 0xffff_ff00; +impl crate::Resettable for HfxocalSpec { + const RESET_VALUE: u32 = 0xffff_ff00; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0gain0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0gain0.rs index faf1c94..76db362 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0gain0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0gain0.rs @@ -1,44 +1,29 @@ #[doc = "Register `IADC0GAIN0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `GAINCANA1` reader - No Description"] -pub type GAINCANA1_R = crate::FieldReader; +pub type Gaincana1R = crate::FieldReader; #[doc = "Field `GAINCANA2` reader - No Description"] -pub type GAINCANA2_R = crate::FieldReader; +pub type Gaincana2R = crate::FieldReader; impl R { #[doc = "Bits 0:15 - No Description"] #[inline(always)] - pub fn gaincana1(&self) -> GAINCANA1_R { - GAINCANA1_R::new((self.bits & 0xffff) as u16) + pub fn gaincana1(&self) -> Gaincana1R { + Gaincana1R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - No Description"] #[inline(always)] - pub fn gaincana2(&self) -> GAINCANA2_R { - GAINCANA2_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn gaincana2(&self) -> Gaincana2R { + Gaincana2R::new(((self.bits >> 16) & 0xffff) as u16) } } -#[doc = "IADC0 Gain Calibration Info\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [iadc0gain0](index.html) module"] -pub struct IADC0GAIN0_SPEC; -impl crate::RegisterSpec for IADC0GAIN0_SPEC { +#[doc = "IADC0 Gain Calibration Info\n\nYou can [`read`](crate::Reg::read) this register and get [`iadc0gain0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Iadc0gain0Spec; +impl crate::RegisterSpec for Iadc0gain0Spec { type Ux = u32; } -#[doc = "`read()` method returns [iadc0gain0::R](R) reader structure"] -impl crate::Readable for IADC0GAIN0_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`iadc0gain0::R`](R) reader structure"] +impl crate::Readable for Iadc0gain0Spec {} #[doc = "`reset()` method sets IADC0GAIN0 to value 0"] -impl crate::Resettable for IADC0GAIN0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Iadc0gain0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0gain1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0gain1.rs index d98e7d0..6c6f511 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0gain1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0gain1.rs @@ -1,44 +1,29 @@ #[doc = "Register `IADC0GAIN1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `GAINCANA3` reader - No Description"] -pub type GAINCANA3_R = crate::FieldReader; +pub type Gaincana3R = crate::FieldReader; #[doc = "Field `GAINCANA4` reader - No Description"] -pub type GAINCANA4_R = crate::FieldReader; +pub type Gaincana4R = crate::FieldReader; impl R { #[doc = "Bits 0:15 - No Description"] #[inline(always)] - pub fn gaincana3(&self) -> GAINCANA3_R { - GAINCANA3_R::new((self.bits & 0xffff) as u16) + pub fn gaincana3(&self) -> Gaincana3R { + Gaincana3R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - No Description"] #[inline(always)] - pub fn gaincana4(&self) -> GAINCANA4_R { - GAINCANA4_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn gaincana4(&self) -> Gaincana4R { + Gaincana4R::new(((self.bits >> 16) & 0xffff) as u16) } } -#[doc = "IADC0 Gain Calibration Info\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [iadc0gain1](index.html) module"] -pub struct IADC0GAIN1_SPEC; -impl crate::RegisterSpec for IADC0GAIN1_SPEC { +#[doc = "IADC0 Gain Calibration Info\n\nYou can [`read`](crate::Reg::read) this register and get [`iadc0gain1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Iadc0gain1Spec; +impl crate::RegisterSpec for Iadc0gain1Spec { type Ux = u32; } -#[doc = "`read()` method returns [iadc0gain1::R](R) reader structure"] -impl crate::Readable for IADC0GAIN1_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`iadc0gain1::R`](R) reader structure"] +impl crate::Readable for Iadc0gain1Spec {} #[doc = "`reset()` method sets IADC0GAIN1 to value 0"] -impl crate::Resettable for IADC0GAIN1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Iadc0gain1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0hispdoffsetcal0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0hispdoffsetcal0.rs index 2b18cd6..e30c191 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0hispdoffsetcal0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0hispdoffsetcal0.rs @@ -1,44 +1,29 @@ #[doc = "Register `IADC0HISPDOFFSETCAL0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `OFFSETANA1HISPD` reader - No Description"] -pub type OFFSETANA1HISPD_R = crate::FieldReader; +pub type Offsetana1hispdR = crate::FieldReader; #[doc = "Field `OFFSETANA2HISPD` reader - No Description"] -pub type OFFSETANA2HISPD_R = crate::FieldReader; +pub type Offsetana2hispdR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - No Description"] #[inline(always)] - pub fn offsetana1hispd(&self) -> OFFSETANA1HISPD_R { - OFFSETANA1HISPD_R::new((self.bits & 0xffff) as u16) + pub fn offsetana1hispd(&self) -> Offsetana1hispdR { + Offsetana1hispdR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - No Description"] #[inline(always)] - pub fn offsetana2hispd(&self) -> OFFSETANA2HISPD_R { - OFFSETANA2HISPD_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn offsetana2hispd(&self) -> Offsetana2hispdR { + Offsetana2hispdR::new(((self.bits >> 16) & 0xffff) as u16) } } -#[doc = "IADC High Speed Offset Calibration Info\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [iadc0hispdoffsetcal0](index.html) module"] -pub struct IADC0HISPDOFFSETCAL0_SPEC; -impl crate::RegisterSpec for IADC0HISPDOFFSETCAL0_SPEC { +#[doc = "IADC High Speed Offset Calibration Info\n\nYou can [`read`](crate::Reg::read) this register and get [`iadc0hispdoffsetcal0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Iadc0hispdoffsetcal0Spec; +impl crate::RegisterSpec for Iadc0hispdoffsetcal0Spec { type Ux = u32; } -#[doc = "`read()` method returns [iadc0hispdoffsetcal0::R](R) reader structure"] -impl crate::Readable for IADC0HISPDOFFSETCAL0_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`iadc0hispdoffsetcal0::R`](R) reader structure"] +impl crate::Readable for Iadc0hispdoffsetcal0Spec {} #[doc = "`reset()` method sets IADC0HISPDOFFSETCAL0 to value 0"] -impl crate::Resettable for IADC0HISPDOFFSETCAL0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Iadc0hispdoffsetcal0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0hispdoffsetcal1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0hispdoffsetcal1.rs index 1323028..a0b2e2a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0hispdoffsetcal1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0hispdoffsetcal1.rs @@ -1,37 +1,22 @@ #[doc = "Register `IADC0HISPDOFFSETCAL1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `OFFSETANA3HISPD` reader - No Description"] -pub type OFFSETANA3HISPD_R = crate::FieldReader; +pub type Offsetana3hispdR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - No Description"] #[inline(always)] - pub fn offsetana3hispd(&self) -> OFFSETANA3HISPD_R { - OFFSETANA3HISPD_R::new((self.bits & 0xffff) as u16) + pub fn offsetana3hispd(&self) -> Offsetana3hispdR { + Offsetana3hispdR::new((self.bits & 0xffff) as u16) } } -#[doc = "IADC High Speed Offset Calibration Info\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [iadc0hispdoffsetcal1](index.html) module"] -pub struct IADC0HISPDOFFSETCAL1_SPEC; -impl crate::RegisterSpec for IADC0HISPDOFFSETCAL1_SPEC { +#[doc = "IADC High Speed Offset Calibration Info\n\nYou can [`read`](crate::Reg::read) this register and get [`iadc0hispdoffsetcal1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Iadc0hispdoffsetcal1Spec; +impl crate::RegisterSpec for Iadc0hispdoffsetcal1Spec { type Ux = u32; } -#[doc = "`read()` method returns [iadc0hispdoffsetcal1::R](R) reader structure"] -impl crate::Readable for IADC0HISPDOFFSETCAL1_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`iadc0hispdoffsetcal1::R`](R) reader structure"] +impl crate::Readable for Iadc0hispdoffsetcal1Spec {} #[doc = "`reset()` method sets IADC0HISPDOFFSETCAL1 to value 0"] -impl crate::Resettable for IADC0HISPDOFFSETCAL1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Iadc0hispdoffsetcal1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0normaloffsetcal0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0normaloffsetcal0.rs index c023ac7..1171636 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0normaloffsetcal0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0normaloffsetcal0.rs @@ -1,44 +1,29 @@ #[doc = "Register `IADC0NORMALOFFSETCAL0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `OFFSETANA1NORM` reader - No Description"] -pub type OFFSETANA1NORM_R = crate::FieldReader; +pub type Offsetana1normR = crate::FieldReader; #[doc = "Field `OFFSETANA2NORM` reader - No Description"] -pub type OFFSETANA2NORM_R = crate::FieldReader; +pub type Offsetana2normR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - No Description"] #[inline(always)] - pub fn offsetana1norm(&self) -> OFFSETANA1NORM_R { - OFFSETANA1NORM_R::new((self.bits & 0xffff) as u16) + pub fn offsetana1norm(&self) -> Offsetana1normR { + Offsetana1normR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - No Description"] #[inline(always)] - pub fn offsetana2norm(&self) -> OFFSETANA2NORM_R { - OFFSETANA2NORM_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn offsetana2norm(&self) -> Offsetana2normR { + Offsetana2normR::new(((self.bits >> 16) & 0xffff) as u16) } } -#[doc = "IADC0 Normal Offset Calibration Info\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [iadc0normaloffsetcal0](index.html) module"] -pub struct IADC0NORMALOFFSETCAL0_SPEC; -impl crate::RegisterSpec for IADC0NORMALOFFSETCAL0_SPEC { +#[doc = "IADC0 Normal Offset Calibration Info\n\nYou can [`read`](crate::Reg::read) this register and get [`iadc0normaloffsetcal0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Iadc0normaloffsetcal0Spec; +impl crate::RegisterSpec for Iadc0normaloffsetcal0Spec { type Ux = u32; } -#[doc = "`read()` method returns [iadc0normaloffsetcal0::R](R) reader structure"] -impl crate::Readable for IADC0NORMALOFFSETCAL0_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`iadc0normaloffsetcal0::R`](R) reader structure"] +impl crate::Readable for Iadc0normaloffsetcal0Spec {} #[doc = "`reset()` method sets IADC0NORMALOFFSETCAL0 to value 0"] -impl crate::Resettable for IADC0NORMALOFFSETCAL0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Iadc0normaloffsetcal0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0normaloffsetcal1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0normaloffsetcal1.rs index 70ed619..0ba4529 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0normaloffsetcal1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0normaloffsetcal1.rs @@ -1,37 +1,22 @@ #[doc = "Register `IADC0NORMALOFFSETCAL1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `OFFSETANA3NORM` reader - No Description"] -pub type OFFSETANA3NORM_R = crate::FieldReader; +pub type Offsetana3normR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - No Description"] #[inline(always)] - pub fn offsetana3norm(&self) -> OFFSETANA3NORM_R { - OFFSETANA3NORM_R::new((self.bits & 0xffff) as u16) + pub fn offsetana3norm(&self) -> Offsetana3normR { + Offsetana3normR::new((self.bits & 0xffff) as u16) } } -#[doc = "IADC0 Normal Offset Calibration Info\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [iadc0normaloffsetcal1](index.html) module"] -pub struct IADC0NORMALOFFSETCAL1_SPEC; -impl crate::RegisterSpec for IADC0NORMALOFFSETCAL1_SPEC { +#[doc = "IADC0 Normal Offset Calibration Info\n\nYou can [`read`](crate::Reg::read) this register and get [`iadc0normaloffsetcal1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Iadc0normaloffsetcal1Spec; +impl crate::RegisterSpec for Iadc0normaloffsetcal1Spec { type Ux = u32; } -#[doc = "`read()` method returns [iadc0normaloffsetcal1::R](R) reader structure"] -impl crate::Readable for IADC0NORMALOFFSETCAL1_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`iadc0normaloffsetcal1::R`](R) reader structure"] +impl crate::Readable for Iadc0normaloffsetcal1Spec {} #[doc = "`reset()` method sets IADC0NORMALOFFSETCAL1 to value 0"] -impl crate::Resettable for IADC0NORMALOFFSETCAL1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Iadc0normaloffsetcal1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0offsetcal0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0offsetcal0.rs index dd4b749..ea8be98 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0offsetcal0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/iadc0offsetcal0.rs @@ -1,44 +1,29 @@ #[doc = "Register `IADC0OFFSETCAL0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `OFFSETANABASE` reader - No Description"] -pub type OFFSETANABASE_R = crate::FieldReader; +pub type OffsetanabaseR = crate::FieldReader; #[doc = "Field `OFFSETANA1HIACC` reader - No Description"] -pub type OFFSETANA1HIACC_R = crate::FieldReader; +pub type Offsetana1hiaccR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - No Description"] #[inline(always)] - pub fn offsetanabase(&self) -> OFFSETANABASE_R { - OFFSETANABASE_R::new((self.bits & 0xffff) as u16) + pub fn offsetanabase(&self) -> OffsetanabaseR { + OffsetanabaseR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - No Description"] #[inline(always)] - pub fn offsetana1hiacc(&self) -> OFFSETANA1HIACC_R { - OFFSETANA1HIACC_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn offsetana1hiacc(&self) -> Offsetana1hiaccR { + Offsetana1hiaccR::new(((self.bits >> 16) & 0xffff) as u16) } } -#[doc = "IADC0 Offset Calibration Info\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [iadc0offsetcal0](index.html) module"] -pub struct IADC0OFFSETCAL0_SPEC; -impl crate::RegisterSpec for IADC0OFFSETCAL0_SPEC { +#[doc = "IADC0 Offset Calibration Info\n\nYou can [`read`](crate::Reg::read) this register and get [`iadc0offsetcal0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Iadc0offsetcal0Spec; +impl crate::RegisterSpec for Iadc0offsetcal0Spec { type Ux = u32; } -#[doc = "`read()` method returns [iadc0offsetcal0::R](R) reader structure"] -impl crate::Readable for IADC0OFFSETCAL0_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`iadc0offsetcal0::R`](R) reader structure"] +impl crate::Readable for Iadc0offsetcal0Spec {} #[doc = "`reset()` method sets IADC0OFFSETCAL0 to value 0"] -impl crate::Resettable for IADC0OFFSETCAL0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Iadc0offsetcal0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/info.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/info.rs index 265bd40..f5d4a89 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/info.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/info.rs @@ -1,51 +1,36 @@ #[doc = "Register `INFO` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CRC` reader - CRC"] -pub type CRC_R = crate::FieldReader; +pub type CrcR = crate::FieldReader; #[doc = "Field `PRODREV` reader - Production Revision"] -pub type PRODREV_R = crate::FieldReader; +pub type ProdrevR = crate::FieldReader; #[doc = "Field `DEVINFOREV` reader - DI Page Version"] -pub type DEVINFOREV_R = crate::FieldReader; +pub type DevinforevR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - CRC"] #[inline(always)] - pub fn crc(&self) -> CRC_R { - CRC_R::new((self.bits & 0xffff) as u16) + pub fn crc(&self) -> CrcR { + CrcR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:23 - Production Revision"] #[inline(always)] - pub fn prodrev(&self) -> PRODREV_R { - PRODREV_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn prodrev(&self) -> ProdrevR { + ProdrevR::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - DI Page Version"] #[inline(always)] - pub fn devinforev(&self) -> DEVINFOREV_R { - DEVINFOREV_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn devinforev(&self) -> DevinforevR { + DevinforevR::new(((self.bits >> 24) & 0xff) as u8) } } -#[doc = "Version of the device info structure being used\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [info](index.html) module"] -pub struct INFO_SPEC; -impl crate::RegisterSpec for INFO_SPEC { +#[doc = "Version of the device info structure being used\n\nYou can [`read`](crate::Reg::read) this register and get [`info::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct InfoSpec; +impl crate::RegisterSpec for InfoSpec { type Ux = u32; } -#[doc = "`read()` method returns [info::R](R) reader structure"] -impl crate::Readable for INFO_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`info::R`](R) reader structure"] +impl crate::Readable for InfoSpec {} #[doc = "`reset()` method sets INFO to value 0x0c00_0000"] -impl crate::Resettable for INFO_SPEC { - const RESET_VALUE: Self::Ux = 0x0c00_0000; +impl crate::Resettable for InfoSpec { + const RESET_VALUE: u32 = 0x0c00_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/legacy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/legacy.rs index 4929849..4dc9004 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/legacy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/legacy.rs @@ -1,497 +1,486 @@ #[doc = "Register `LEGACY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `DEVICEFAMILY` reader - Device Family"] -pub type DEVICEFAMILY_R = crate::FieldReader; +pub type R = crate::R; #[doc = "Device Family\n\nValue on reset: 128"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DEVICEFAMILY_A { +pub enum Devicefamily { #[doc = "16: EFR32 Mighty Gecko Family Series 1 Device Config 1"] - EFR32MG1P = 16, + Efr32mg1p = 16, #[doc = "17: EFR32 Mighty Gecko Family Series 1 Device Config 1"] - EFR32MG1B = 17, + Efr32mg1b = 17, #[doc = "18: EFR32 Mighty Gecko Family Series 1 Device Config 1"] - EFR32MG1V = 18, + Efr32mg1v = 18, #[doc = "19: EFR32 Blue Gecko Family Series 1 Device Config 1"] - EFR32BG1P = 19, + Efr32bg1p = 19, #[doc = "20: EFR32 Blue Gecko Family Series 1 Device Config 1"] - EFR32BG1B = 20, + Efr32bg1b = 20, #[doc = "21: EFR32 Blue Gecko Family Series 1 Device Config 1"] - EFR32BG1V = 21, + Efr32bg1v = 21, #[doc = "25: EFR32 Flex Gecko Family Series 1 Device Config 1"] - EFR32FG1P = 25, + Efr32fg1p = 25, #[doc = "26: EFR32 Flex Gecko Family Series 1 Device Config 1"] - EFR32FG1B = 26, + Efr32fg1b = 26, #[doc = "27: EFR32 Flex Gecko Family Series 1 Device Config 1"] - EFR32FG1V = 27, + Efr32fg1v = 27, #[doc = "28: EFR32 Mighty Gecko Family Series 1 Device Config 2"] - EFR32MG12P = 28, + Efr32mg12p = 28, #[doc = "29: EFR32 Mighty Gecko Family Series 1 Device Config 2"] - EFR32MG12B = 29, + Efr32mg12b = 29, #[doc = "30: EFR32 Mighty Gecko Family Series 1 Device Config 2"] - EFR32MG12V = 30, + Efr32mg12v = 30, #[doc = "31: EFR32 Blue Gecko Family Series 1 Device Config 2"] - EFR32BG12P = 31, + Efr32bg12p = 31, #[doc = "32: EFR32 Blue Gecko Family Series 1 Device Config 2"] - EFR32BG12B = 32, + Efr32bg12b = 32, #[doc = "33: EFR32 Blue Gecko Family Series 1 Device Config 2"] - EFR32BG12V = 33, + Efr32bg12v = 33, #[doc = "37: EFR32 Flex Gecko Family Series 1 Device Config 2"] - EFR32FG12P = 37, + Efr32fg12p = 37, #[doc = "38: EFR32 Flex Gecko Family Series 1 Device Config 2"] - EFR32FG12B = 38, + Efr32fg12b = 38, #[doc = "39: EFR32 Flex Gecko Family Series 1 Device Config 2"] - EFR32FG12V = 39, + Efr32fg12v = 39, #[doc = "40: EFR32 Mighty Gecko Family Series 13 Device Config 3"] - EFR32MG13P = 40, + Efr32mg13p = 40, #[doc = "41: EFR32 Mighty Gecko Family Series 13 Device Config 3"] - EFR32MG13B = 41, + Efr32mg13b = 41, #[doc = "42: EFR32 Mighty Gecko Family Series 1 Device Config 3"] - EFR32MG13V = 42, + Efr32mg13v = 42, #[doc = "43: EFR32 Blue Gecko Family Series 1 Device Config 3"] - EFR32BG13P = 43, + Efr32bg13p = 43, #[doc = "44: EFR32 Blue Gecko Family Series 1 Device Config 3"] - EFR32BG13B = 44, + Efr32bg13b = 44, #[doc = "45: EFR32 Blue Gecko Family Series 1 Device Config 3"] - EFR32BG13V = 45, + Efr32bg13v = 45, #[doc = "49: EFR32 Flex Gecko Family Series 1 Device Config 3"] - EFR32FG13P = 49, + Efr32fg13p = 49, #[doc = "50: EFR32 Flex Gecko Family Series 1 Device Config 3"] - EFR32FG13B = 50, + Efr32fg13b = 50, #[doc = "51: EFR32 Flex Gecko Family Series 1 Device Config 3"] - EFR32FG13V = 51, + Efr32fg13v = 51, #[doc = "52: EFR32 Mighty Gecko Family Series 1 Device Config 4"] - EFR32MG14P = 52, + Efr32mg14p = 52, #[doc = "53: EFR32 Mighty Gecko Family Series 1 Device Config 4"] - EFR32MG14B = 53, + Efr32mg14b = 53, #[doc = "54: EFR32 Mighty Gecko Family Series 1 Device Config 4"] - EFR32MG14V = 54, + Efr32mg14v = 54, #[doc = "55: EFR32 Blue Gecko Family Series 1 Device Config 4"] - EFR32BG14P = 55, + Efr32bg14p = 55, #[doc = "56: EFR32 Blue Gecko Family Series 1 Device Config 4"] - EFR32BG14B = 56, + Efr32bg14b = 56, #[doc = "57: EFR32 Blue Gecko Family Series 1 Device Config 4"] - EFR32BG14V = 57, + Efr32bg14v = 57, #[doc = "61: EFR32 Flex Gecko Family Series 1 Device Config 4"] - EFR32FG14P = 61, + Efr32fg14p = 61, #[doc = "62: EFR32 Flex Gecko Family Series 1 Device Config 4"] - EFR32FG14B = 62, + Efr32fg14b = 62, #[doc = "63: EFR32 Flex Gecko Family Series 1 Device Config 4"] - EFR32FG14V = 63, + Efr32fg14v = 63, #[doc = "71: EFM32 Gecko Device Family"] - EFM32G = 71, + Efm32g = 71, #[doc = "72: EFM32 Giant Gecko Device Family"] - EFM32GG = 72, + Efm32gg = 72, #[doc = "73: EFM32 Tiny Gecko Device Family"] - EFM32TG = 73, + Efm32tg = 73, #[doc = "74: EFM32 Leopard Gecko Device Family"] - EFM32LG = 74, + Efm32lg = 74, #[doc = "75: EFM32 Wonder Gecko Device Family"] - EFM32WG = 75, + Efm32wg = 75, #[doc = "76: EFM32 Zero Gecko Device Family"] - EFM32ZG = 76, + Efm32zg = 76, #[doc = "77: EFM32 Happy Gecko Device Family"] - EFM32HG = 77, + Efm32hg = 77, #[doc = "81: EFM32 Pearl Gecko Device Family Series 1 Device Config 1"] - EFM32PG1B = 81, + Efm32pg1b = 81, #[doc = "83: EFM32 Jade Gecko Device Family Series 1 Device Config 1"] - EFM32JG1B = 83, + Efm32jg1b = 83, #[doc = "85: EFM32 Pearl Gecko Device Family Series 1 Device Config 2"] - EFM32PG12B = 85, + Efm32pg12b = 85, #[doc = "87: EFM32 Jade Gecko Device Family Series 1 Device Config 2"] - EFM32JG12B = 87, + Efm32jg12b = 87, #[doc = "89: EFM32 Pearl Gecko Device Family Series 1 Device Config 3"] - EFM32PG13B = 89, + Efm32pg13b = 89, #[doc = "91: EFM32 Jade Gecko Device Family Series 1 Device Config 3"] - EFM32JG13B = 91, + Efm32jg13b = 91, #[doc = "100: EFM32 Giant Gecko Device Family Series 1 Device Config 1"] - EFM32GG11B = 100, + Efm32gg11b = 100, #[doc = "103: EFM32 Giant Gecko Device Family Series 1 Device Config 1"] - EFM32TG11B = 103, + Efm32tg11b = 103, #[doc = "120: EZR32 Leopard Gecko Device Family"] - EZR32LG = 120, + Ezr32lg = 120, #[doc = "121: EZR32 Wonder Gecko Device Family"] - EZR32WG = 121, + Ezr32wg = 121, #[doc = "122: EZR32 Happy Gecko Device Family"] - EZR32HG = 122, + Ezr32hg = 122, #[doc = "128: DI page is encoded with the series 2 layout. Check alternate location."] - SERIES2V0 = 128, + Series2v0 = 128, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DEVICEFAMILY_A) -> Self { + fn from(variant: Devicefamily) -> Self { variant as _ } } -impl DEVICEFAMILY_R { +impl crate::FieldSpec for Devicefamily { + type Ux = u8; +} +impl crate::IsEnum for Devicefamily {} +#[doc = "Field `DEVICEFAMILY` reader - Device Family"] +pub type DevicefamilyR = crate::FieldReader; +impl DevicefamilyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 16 => Some(DEVICEFAMILY_A::EFR32MG1P), - 17 => Some(DEVICEFAMILY_A::EFR32MG1B), - 18 => Some(DEVICEFAMILY_A::EFR32MG1V), - 19 => Some(DEVICEFAMILY_A::EFR32BG1P), - 20 => Some(DEVICEFAMILY_A::EFR32BG1B), - 21 => Some(DEVICEFAMILY_A::EFR32BG1V), - 25 => Some(DEVICEFAMILY_A::EFR32FG1P), - 26 => Some(DEVICEFAMILY_A::EFR32FG1B), - 27 => Some(DEVICEFAMILY_A::EFR32FG1V), - 28 => Some(DEVICEFAMILY_A::EFR32MG12P), - 29 => Some(DEVICEFAMILY_A::EFR32MG12B), - 30 => Some(DEVICEFAMILY_A::EFR32MG12V), - 31 => Some(DEVICEFAMILY_A::EFR32BG12P), - 32 => Some(DEVICEFAMILY_A::EFR32BG12B), - 33 => Some(DEVICEFAMILY_A::EFR32BG12V), - 37 => Some(DEVICEFAMILY_A::EFR32FG12P), - 38 => Some(DEVICEFAMILY_A::EFR32FG12B), - 39 => Some(DEVICEFAMILY_A::EFR32FG12V), - 40 => Some(DEVICEFAMILY_A::EFR32MG13P), - 41 => Some(DEVICEFAMILY_A::EFR32MG13B), - 42 => Some(DEVICEFAMILY_A::EFR32MG13V), - 43 => Some(DEVICEFAMILY_A::EFR32BG13P), - 44 => Some(DEVICEFAMILY_A::EFR32BG13B), - 45 => Some(DEVICEFAMILY_A::EFR32BG13V), - 49 => Some(DEVICEFAMILY_A::EFR32FG13P), - 50 => Some(DEVICEFAMILY_A::EFR32FG13B), - 51 => Some(DEVICEFAMILY_A::EFR32FG13V), - 52 => Some(DEVICEFAMILY_A::EFR32MG14P), - 53 => Some(DEVICEFAMILY_A::EFR32MG14B), - 54 => Some(DEVICEFAMILY_A::EFR32MG14V), - 55 => Some(DEVICEFAMILY_A::EFR32BG14P), - 56 => Some(DEVICEFAMILY_A::EFR32BG14B), - 57 => Some(DEVICEFAMILY_A::EFR32BG14V), - 61 => Some(DEVICEFAMILY_A::EFR32FG14P), - 62 => Some(DEVICEFAMILY_A::EFR32FG14B), - 63 => Some(DEVICEFAMILY_A::EFR32FG14V), - 71 => Some(DEVICEFAMILY_A::EFM32G), - 72 => Some(DEVICEFAMILY_A::EFM32GG), - 73 => Some(DEVICEFAMILY_A::EFM32TG), - 74 => Some(DEVICEFAMILY_A::EFM32LG), - 75 => Some(DEVICEFAMILY_A::EFM32WG), - 76 => Some(DEVICEFAMILY_A::EFM32ZG), - 77 => Some(DEVICEFAMILY_A::EFM32HG), - 81 => Some(DEVICEFAMILY_A::EFM32PG1B), - 83 => Some(DEVICEFAMILY_A::EFM32JG1B), - 85 => Some(DEVICEFAMILY_A::EFM32PG12B), - 87 => Some(DEVICEFAMILY_A::EFM32JG12B), - 89 => Some(DEVICEFAMILY_A::EFM32PG13B), - 91 => Some(DEVICEFAMILY_A::EFM32JG13B), - 100 => Some(DEVICEFAMILY_A::EFM32GG11B), - 103 => Some(DEVICEFAMILY_A::EFM32TG11B), - 120 => Some(DEVICEFAMILY_A::EZR32LG), - 121 => Some(DEVICEFAMILY_A::EZR32WG), - 122 => Some(DEVICEFAMILY_A::EZR32HG), - 128 => Some(DEVICEFAMILY_A::SERIES2V0), + 16 => Some(Devicefamily::Efr32mg1p), + 17 => Some(Devicefamily::Efr32mg1b), + 18 => Some(Devicefamily::Efr32mg1v), + 19 => Some(Devicefamily::Efr32bg1p), + 20 => Some(Devicefamily::Efr32bg1b), + 21 => Some(Devicefamily::Efr32bg1v), + 25 => Some(Devicefamily::Efr32fg1p), + 26 => Some(Devicefamily::Efr32fg1b), + 27 => Some(Devicefamily::Efr32fg1v), + 28 => Some(Devicefamily::Efr32mg12p), + 29 => Some(Devicefamily::Efr32mg12b), + 30 => Some(Devicefamily::Efr32mg12v), + 31 => Some(Devicefamily::Efr32bg12p), + 32 => Some(Devicefamily::Efr32bg12b), + 33 => Some(Devicefamily::Efr32bg12v), + 37 => Some(Devicefamily::Efr32fg12p), + 38 => Some(Devicefamily::Efr32fg12b), + 39 => Some(Devicefamily::Efr32fg12v), + 40 => Some(Devicefamily::Efr32mg13p), + 41 => Some(Devicefamily::Efr32mg13b), + 42 => Some(Devicefamily::Efr32mg13v), + 43 => Some(Devicefamily::Efr32bg13p), + 44 => Some(Devicefamily::Efr32bg13b), + 45 => Some(Devicefamily::Efr32bg13v), + 49 => Some(Devicefamily::Efr32fg13p), + 50 => Some(Devicefamily::Efr32fg13b), + 51 => Some(Devicefamily::Efr32fg13v), + 52 => Some(Devicefamily::Efr32mg14p), + 53 => Some(Devicefamily::Efr32mg14b), + 54 => Some(Devicefamily::Efr32mg14v), + 55 => Some(Devicefamily::Efr32bg14p), + 56 => Some(Devicefamily::Efr32bg14b), + 57 => Some(Devicefamily::Efr32bg14v), + 61 => Some(Devicefamily::Efr32fg14p), + 62 => Some(Devicefamily::Efr32fg14b), + 63 => Some(Devicefamily::Efr32fg14v), + 71 => Some(Devicefamily::Efm32g), + 72 => Some(Devicefamily::Efm32gg), + 73 => Some(Devicefamily::Efm32tg), + 74 => Some(Devicefamily::Efm32lg), + 75 => Some(Devicefamily::Efm32wg), + 76 => Some(Devicefamily::Efm32zg), + 77 => Some(Devicefamily::Efm32hg), + 81 => Some(Devicefamily::Efm32pg1b), + 83 => Some(Devicefamily::Efm32jg1b), + 85 => Some(Devicefamily::Efm32pg12b), + 87 => Some(Devicefamily::Efm32jg12b), + 89 => Some(Devicefamily::Efm32pg13b), + 91 => Some(Devicefamily::Efm32jg13b), + 100 => Some(Devicefamily::Efm32gg11b), + 103 => Some(Devicefamily::Efm32tg11b), + 120 => Some(Devicefamily::Ezr32lg), + 121 => Some(Devicefamily::Ezr32wg), + 122 => Some(Devicefamily::Ezr32hg), + 128 => Some(Devicefamily::Series2v0), _ => None, } } - #[doc = "Checks if the value of the field is `EFR32MG1P`"] + #[doc = "EFR32 Mighty Gecko Family Series 1 Device Config 1"] #[inline(always)] pub fn is_efr32mg1p(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32MG1P + *self == Devicefamily::Efr32mg1p } - #[doc = "Checks if the value of the field is `EFR32MG1B`"] + #[doc = "EFR32 Mighty Gecko Family Series 1 Device Config 1"] #[inline(always)] pub fn is_efr32mg1b(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32MG1B + *self == Devicefamily::Efr32mg1b } - #[doc = "Checks if the value of the field is `EFR32MG1V`"] + #[doc = "EFR32 Mighty Gecko Family Series 1 Device Config 1"] #[inline(always)] pub fn is_efr32mg1v(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32MG1V + *self == Devicefamily::Efr32mg1v } - #[doc = "Checks if the value of the field is `EFR32BG1P`"] + #[doc = "EFR32 Blue Gecko Family Series 1 Device Config 1"] #[inline(always)] pub fn is_efr32bg1p(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32BG1P + *self == Devicefamily::Efr32bg1p } - #[doc = "Checks if the value of the field is `EFR32BG1B`"] + #[doc = "EFR32 Blue Gecko Family Series 1 Device Config 1"] #[inline(always)] pub fn is_efr32bg1b(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32BG1B + *self == Devicefamily::Efr32bg1b } - #[doc = "Checks if the value of the field is `EFR32BG1V`"] + #[doc = "EFR32 Blue Gecko Family Series 1 Device Config 1"] #[inline(always)] pub fn is_efr32bg1v(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32BG1V + *self == Devicefamily::Efr32bg1v } - #[doc = "Checks if the value of the field is `EFR32FG1P`"] + #[doc = "EFR32 Flex Gecko Family Series 1 Device Config 1"] #[inline(always)] pub fn is_efr32fg1p(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32FG1P + *self == Devicefamily::Efr32fg1p } - #[doc = "Checks if the value of the field is `EFR32FG1B`"] + #[doc = "EFR32 Flex Gecko Family Series 1 Device Config 1"] #[inline(always)] pub fn is_efr32fg1b(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32FG1B + *self == Devicefamily::Efr32fg1b } - #[doc = "Checks if the value of the field is `EFR32FG1V`"] + #[doc = "EFR32 Flex Gecko Family Series 1 Device Config 1"] #[inline(always)] pub fn is_efr32fg1v(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32FG1V + *self == Devicefamily::Efr32fg1v } - #[doc = "Checks if the value of the field is `EFR32MG12P`"] + #[doc = "EFR32 Mighty Gecko Family Series 1 Device Config 2"] #[inline(always)] pub fn is_efr32mg12p(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32MG12P + *self == Devicefamily::Efr32mg12p } - #[doc = "Checks if the value of the field is `EFR32MG12B`"] + #[doc = "EFR32 Mighty Gecko Family Series 1 Device Config 2"] #[inline(always)] pub fn is_efr32mg12b(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32MG12B + *self == Devicefamily::Efr32mg12b } - #[doc = "Checks if the value of the field is `EFR32MG12V`"] + #[doc = "EFR32 Mighty Gecko Family Series 1 Device Config 2"] #[inline(always)] pub fn is_efr32mg12v(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32MG12V + *self == Devicefamily::Efr32mg12v } - #[doc = "Checks if the value of the field is `EFR32BG12P`"] + #[doc = "EFR32 Blue Gecko Family Series 1 Device Config 2"] #[inline(always)] pub fn is_efr32bg12p(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32BG12P + *self == Devicefamily::Efr32bg12p } - #[doc = "Checks if the value of the field is `EFR32BG12B`"] + #[doc = "EFR32 Blue Gecko Family Series 1 Device Config 2"] #[inline(always)] pub fn is_efr32bg12b(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32BG12B + *self == Devicefamily::Efr32bg12b } - #[doc = "Checks if the value of the field is `EFR32BG12V`"] + #[doc = "EFR32 Blue Gecko Family Series 1 Device Config 2"] #[inline(always)] pub fn is_efr32bg12v(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32BG12V + *self == Devicefamily::Efr32bg12v } - #[doc = "Checks if the value of the field is `EFR32FG12P`"] + #[doc = "EFR32 Flex Gecko Family Series 1 Device Config 2"] #[inline(always)] pub fn is_efr32fg12p(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32FG12P + *self == Devicefamily::Efr32fg12p } - #[doc = "Checks if the value of the field is `EFR32FG12B`"] + #[doc = "EFR32 Flex Gecko Family Series 1 Device Config 2"] #[inline(always)] pub fn is_efr32fg12b(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32FG12B + *self == Devicefamily::Efr32fg12b } - #[doc = "Checks if the value of the field is `EFR32FG12V`"] + #[doc = "EFR32 Flex Gecko Family Series 1 Device Config 2"] #[inline(always)] pub fn is_efr32fg12v(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32FG12V + *self == Devicefamily::Efr32fg12v } - #[doc = "Checks if the value of the field is `EFR32MG13P`"] + #[doc = "EFR32 Mighty Gecko Family Series 13 Device Config 3"] #[inline(always)] pub fn is_efr32mg13p(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32MG13P + *self == Devicefamily::Efr32mg13p } - #[doc = "Checks if the value of the field is `EFR32MG13B`"] + #[doc = "EFR32 Mighty Gecko Family Series 13 Device Config 3"] #[inline(always)] pub fn is_efr32mg13b(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32MG13B + *self == Devicefamily::Efr32mg13b } - #[doc = "Checks if the value of the field is `EFR32MG13V`"] + #[doc = "EFR32 Mighty Gecko Family Series 1 Device Config 3"] #[inline(always)] pub fn is_efr32mg13v(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32MG13V + *self == Devicefamily::Efr32mg13v } - #[doc = "Checks if the value of the field is `EFR32BG13P`"] + #[doc = "EFR32 Blue Gecko Family Series 1 Device Config 3"] #[inline(always)] pub fn is_efr32bg13p(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32BG13P + *self == Devicefamily::Efr32bg13p } - #[doc = "Checks if the value of the field is `EFR32BG13B`"] + #[doc = "EFR32 Blue Gecko Family Series 1 Device Config 3"] #[inline(always)] pub fn is_efr32bg13b(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32BG13B + *self == Devicefamily::Efr32bg13b } - #[doc = "Checks if the value of the field is `EFR32BG13V`"] + #[doc = "EFR32 Blue Gecko Family Series 1 Device Config 3"] #[inline(always)] pub fn is_efr32bg13v(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32BG13V + *self == Devicefamily::Efr32bg13v } - #[doc = "Checks if the value of the field is `EFR32FG13P`"] + #[doc = "EFR32 Flex Gecko Family Series 1 Device Config 3"] #[inline(always)] pub fn is_efr32fg13p(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32FG13P + *self == Devicefamily::Efr32fg13p } - #[doc = "Checks if the value of the field is `EFR32FG13B`"] + #[doc = "EFR32 Flex Gecko Family Series 1 Device Config 3"] #[inline(always)] pub fn is_efr32fg13b(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32FG13B + *self == Devicefamily::Efr32fg13b } - #[doc = "Checks if the value of the field is `EFR32FG13V`"] + #[doc = "EFR32 Flex Gecko Family Series 1 Device Config 3"] #[inline(always)] pub fn is_efr32fg13v(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32FG13V + *self == Devicefamily::Efr32fg13v } - #[doc = "Checks if the value of the field is `EFR32MG14P`"] + #[doc = "EFR32 Mighty Gecko Family Series 1 Device Config 4"] #[inline(always)] pub fn is_efr32mg14p(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32MG14P + *self == Devicefamily::Efr32mg14p } - #[doc = "Checks if the value of the field is `EFR32MG14B`"] + #[doc = "EFR32 Mighty Gecko Family Series 1 Device Config 4"] #[inline(always)] pub fn is_efr32mg14b(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32MG14B + *self == Devicefamily::Efr32mg14b } - #[doc = "Checks if the value of the field is `EFR32MG14V`"] + #[doc = "EFR32 Mighty Gecko Family Series 1 Device Config 4"] #[inline(always)] pub fn is_efr32mg14v(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32MG14V + *self == Devicefamily::Efr32mg14v } - #[doc = "Checks if the value of the field is `EFR32BG14P`"] + #[doc = "EFR32 Blue Gecko Family Series 1 Device Config 4"] #[inline(always)] pub fn is_efr32bg14p(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32BG14P + *self == Devicefamily::Efr32bg14p } - #[doc = "Checks if the value of the field is `EFR32BG14B`"] + #[doc = "EFR32 Blue Gecko Family Series 1 Device Config 4"] #[inline(always)] pub fn is_efr32bg14b(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32BG14B + *self == Devicefamily::Efr32bg14b } - #[doc = "Checks if the value of the field is `EFR32BG14V`"] + #[doc = "EFR32 Blue Gecko Family Series 1 Device Config 4"] #[inline(always)] pub fn is_efr32bg14v(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32BG14V + *self == Devicefamily::Efr32bg14v } - #[doc = "Checks if the value of the field is `EFR32FG14P`"] + #[doc = "EFR32 Flex Gecko Family Series 1 Device Config 4"] #[inline(always)] pub fn is_efr32fg14p(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32FG14P + *self == Devicefamily::Efr32fg14p } - #[doc = "Checks if the value of the field is `EFR32FG14B`"] + #[doc = "EFR32 Flex Gecko Family Series 1 Device Config 4"] #[inline(always)] pub fn is_efr32fg14b(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32FG14B + *self == Devicefamily::Efr32fg14b } - #[doc = "Checks if the value of the field is `EFR32FG14V`"] + #[doc = "EFR32 Flex Gecko Family Series 1 Device Config 4"] #[inline(always)] pub fn is_efr32fg14v(&self) -> bool { - *self == DEVICEFAMILY_A::EFR32FG14V + *self == Devicefamily::Efr32fg14v } - #[doc = "Checks if the value of the field is `EFM32G`"] + #[doc = "EFM32 Gecko Device Family"] #[inline(always)] pub fn is_efm32g(&self) -> bool { - *self == DEVICEFAMILY_A::EFM32G + *self == Devicefamily::Efm32g } - #[doc = "Checks if the value of the field is `EFM32GG`"] + #[doc = "EFM32 Giant Gecko Device Family"] #[inline(always)] pub fn is_efm32gg(&self) -> bool { - *self == DEVICEFAMILY_A::EFM32GG + *self == Devicefamily::Efm32gg } - #[doc = "Checks if the value of the field is `EFM32TG`"] + #[doc = "EFM32 Tiny Gecko Device Family"] #[inline(always)] pub fn is_efm32tg(&self) -> bool { - *self == DEVICEFAMILY_A::EFM32TG + *self == Devicefamily::Efm32tg } - #[doc = "Checks if the value of the field is `EFM32LG`"] + #[doc = "EFM32 Leopard Gecko Device Family"] #[inline(always)] pub fn is_efm32lg(&self) -> bool { - *self == DEVICEFAMILY_A::EFM32LG + *self == Devicefamily::Efm32lg } - #[doc = "Checks if the value of the field is `EFM32WG`"] + #[doc = "EFM32 Wonder Gecko Device Family"] #[inline(always)] pub fn is_efm32wg(&self) -> bool { - *self == DEVICEFAMILY_A::EFM32WG + *self == Devicefamily::Efm32wg } - #[doc = "Checks if the value of the field is `EFM32ZG`"] + #[doc = "EFM32 Zero Gecko Device Family"] #[inline(always)] pub fn is_efm32zg(&self) -> bool { - *self == DEVICEFAMILY_A::EFM32ZG + *self == Devicefamily::Efm32zg } - #[doc = "Checks if the value of the field is `EFM32HG`"] + #[doc = "EFM32 Happy Gecko Device Family"] #[inline(always)] pub fn is_efm32hg(&self) -> bool { - *self == DEVICEFAMILY_A::EFM32HG + *self == Devicefamily::Efm32hg } - #[doc = "Checks if the value of the field is `EFM32PG1B`"] + #[doc = "EFM32 Pearl Gecko Device Family Series 1 Device Config 1"] #[inline(always)] pub fn is_efm32pg1b(&self) -> bool { - *self == DEVICEFAMILY_A::EFM32PG1B + *self == Devicefamily::Efm32pg1b } - #[doc = "Checks if the value of the field is `EFM32JG1B`"] + #[doc = "EFM32 Jade Gecko Device Family Series 1 Device Config 1"] #[inline(always)] pub fn is_efm32jg1b(&self) -> bool { - *self == DEVICEFAMILY_A::EFM32JG1B + *self == Devicefamily::Efm32jg1b } - #[doc = "Checks if the value of the field is `EFM32PG12B`"] + #[doc = "EFM32 Pearl Gecko Device Family Series 1 Device Config 2"] #[inline(always)] pub fn is_efm32pg12b(&self) -> bool { - *self == DEVICEFAMILY_A::EFM32PG12B + *self == Devicefamily::Efm32pg12b } - #[doc = "Checks if the value of the field is `EFM32JG12B`"] + #[doc = "EFM32 Jade Gecko Device Family Series 1 Device Config 2"] #[inline(always)] pub fn is_efm32jg12b(&self) -> bool { - *self == DEVICEFAMILY_A::EFM32JG12B + *self == Devicefamily::Efm32jg12b } - #[doc = "Checks if the value of the field is `EFM32PG13B`"] + #[doc = "EFM32 Pearl Gecko Device Family Series 1 Device Config 3"] #[inline(always)] pub fn is_efm32pg13b(&self) -> bool { - *self == DEVICEFAMILY_A::EFM32PG13B + *self == Devicefamily::Efm32pg13b } - #[doc = "Checks if the value of the field is `EFM32JG13B`"] + #[doc = "EFM32 Jade Gecko Device Family Series 1 Device Config 3"] #[inline(always)] pub fn is_efm32jg13b(&self) -> bool { - *self == DEVICEFAMILY_A::EFM32JG13B + *self == Devicefamily::Efm32jg13b } - #[doc = "Checks if the value of the field is `EFM32GG11B`"] + #[doc = "EFM32 Giant Gecko Device Family Series 1 Device Config 1"] #[inline(always)] pub fn is_efm32gg11b(&self) -> bool { - *self == DEVICEFAMILY_A::EFM32GG11B + *self == Devicefamily::Efm32gg11b } - #[doc = "Checks if the value of the field is `EFM32TG11B`"] + #[doc = "EFM32 Giant Gecko Device Family Series 1 Device Config 1"] #[inline(always)] pub fn is_efm32tg11b(&self) -> bool { - *self == DEVICEFAMILY_A::EFM32TG11B + *self == Devicefamily::Efm32tg11b } - #[doc = "Checks if the value of the field is `EZR32LG`"] + #[doc = "EZR32 Leopard Gecko Device Family"] #[inline(always)] pub fn is_ezr32lg(&self) -> bool { - *self == DEVICEFAMILY_A::EZR32LG + *self == Devicefamily::Ezr32lg } - #[doc = "Checks if the value of the field is `EZR32WG`"] + #[doc = "EZR32 Wonder Gecko Device Family"] #[inline(always)] pub fn is_ezr32wg(&self) -> bool { - *self == DEVICEFAMILY_A::EZR32WG + *self == Devicefamily::Ezr32wg } - #[doc = "Checks if the value of the field is `EZR32HG`"] + #[doc = "EZR32 Happy Gecko Device Family"] #[inline(always)] pub fn is_ezr32hg(&self) -> bool { - *self == DEVICEFAMILY_A::EZR32HG + *self == Devicefamily::Ezr32hg } - #[doc = "Checks if the value of the field is `SERIES2V0`"] + #[doc = "DI page is encoded with the series 2 layout. Check alternate location."] #[inline(always)] pub fn is_series2v0(&self) -> bool { - *self == DEVICEFAMILY_A::SERIES2V0 + *self == Devicefamily::Series2v0 } } impl R { #[doc = "Bits 16:23 - Device Family"] #[inline(always)] - pub fn devicefamily(&self) -> DEVICEFAMILY_R { - DEVICEFAMILY_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn devicefamily(&self) -> DevicefamilyR { + DevicefamilyR::new(((self.bits >> 16) & 0xff) as u8) } } -#[doc = "This is the legacy device detection information for tools compatability\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [legacy](index.html) module"] -pub struct LEGACY_SPEC; -impl crate::RegisterSpec for LEGACY_SPEC { +#[doc = "This is the legacy device detection information for tools compatability\n\nYou can [`read`](crate::Reg::read) this register and get [`legacy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LegacySpec; +impl crate::RegisterSpec for LegacySpec { type Ux = u32; } -#[doc = "`read()` method returns [legacy::R](R) reader structure"] -impl crate::Readable for LEGACY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`legacy::R`](R) reader structure"] +impl crate::Readable for LegacySpec {} #[doc = "`reset()` method sets LEGACY to value 0x0080_0000"] -impl crate::Resettable for LEGACY_SPEC { - const RESET_VALUE: Self::Ux = 0x0080_0000; +impl crate::Resettable for LegacySpec { + const RESET_VALUE: u32 = 0x0080_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/meminfo.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/meminfo.rs index d706875..bfdfcbf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/meminfo.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/meminfo.rs @@ -1,51 +1,36 @@ #[doc = "Register `MEMINFO` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `FLASHPAGESIZE` reader - Flash Page Size"] -pub type FLASHPAGESIZE_R = crate::FieldReader; +pub type FlashpagesizeR = crate::FieldReader; #[doc = "Field `UDPAGESIZE` reader - User Data Page Size"] -pub type UDPAGESIZE_R = crate::FieldReader; +pub type UdpagesizeR = crate::FieldReader; #[doc = "Field `DILEN` reader - Length of DI Page"] -pub type DILEN_R = crate::FieldReader; +pub type DilenR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Flash Page Size"] #[inline(always)] - pub fn flashpagesize(&self) -> FLASHPAGESIZE_R { - FLASHPAGESIZE_R::new((self.bits & 0xff) as u8) + pub fn flashpagesize(&self) -> FlashpagesizeR { + FlashpagesizeR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - User Data Page Size"] #[inline(always)] - pub fn udpagesize(&self) -> UDPAGESIZE_R { - UDPAGESIZE_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn udpagesize(&self) -> UdpagesizeR { + UdpagesizeR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Length of DI Page"] #[inline(always)] - pub fn dilen(&self) -> DILEN_R { - DILEN_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn dilen(&self) -> DilenR { + DilenR::new(((self.bits >> 16) & 0xffff) as u16) } } -#[doc = "Flash page size and misc. chip information\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [meminfo](index.html) module"] -pub struct MEMINFO_SPEC; -impl crate::RegisterSpec for MEMINFO_SPEC { +#[doc = "Flash page size and misc. chip information\n\nYou can [`read`](crate::Reg::read) this register and get [`meminfo::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct MeminfoSpec; +impl crate::RegisterSpec for MeminfoSpec { type Ux = u32; } -#[doc = "`read()` method returns [meminfo::R](R) reader structure"] -impl crate::Readable for MEMINFO_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`meminfo::R`](R) reader structure"] +impl crate::Readable for MeminfoSpec {} #[doc = "`reset()` method sets MEMINFO to value 0"] -impl crate::Resettable for MEMINFO_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for MeminfoSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/moduleinfo.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/moduleinfo.rs index 15b100e..781aaf1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/moduleinfo.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/moduleinfo.rs @@ -1,438 +1,427 @@ #[doc = "Register `MODULEINFO` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `HWREV` reader - No Description"] -pub type HWREV_R = crate::FieldReader; -#[doc = "Field `ANTENNA` reader - No Description"] -pub type ANTENNA_R = crate::FieldReader; +pub type HwrevR = crate::FieldReader; #[doc = "No Description\n\nValue on reset: 7"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ANTENNA_A { +pub enum Antenna { #[doc = "0: BUILTIN"] - BUILTIN = 0, + Builtin = 0, #[doc = "1: CONNECTOR"] - CONNECTOR = 1, + Connector = 1, #[doc = "2: RFPAD"] - RFPAD = 2, + Rfpad = 2, #[doc = "3: INVERTEDF"] - INVERTEDF = 3, + Invertedf = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ANTENNA_A) -> Self { + fn from(variant: Antenna) -> Self { variant as _ } } -impl ANTENNA_R { +impl crate::FieldSpec for Antenna { + type Ux = u8; +} +impl crate::IsEnum for Antenna {} +#[doc = "Field `ANTENNA` reader - No Description"] +pub type AntennaR = crate::FieldReader; +impl AntennaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ANTENNA_A::BUILTIN), - 1 => Some(ANTENNA_A::CONNECTOR), - 2 => Some(ANTENNA_A::RFPAD), - 3 => Some(ANTENNA_A::INVERTEDF), + 0 => Some(Antenna::Builtin), + 1 => Some(Antenna::Connector), + 2 => Some(Antenna::Rfpad), + 3 => Some(Antenna::Invertedf), _ => None, } } - #[doc = "Checks if the value of the field is `BUILTIN`"] + #[doc = "BUILTIN"] #[inline(always)] pub fn is_builtin(&self) -> bool { - *self == ANTENNA_A::BUILTIN + *self == Antenna::Builtin } - #[doc = "Checks if the value of the field is `CONNECTOR`"] + #[doc = "CONNECTOR"] #[inline(always)] pub fn is_connector(&self) -> bool { - *self == ANTENNA_A::CONNECTOR + *self == Antenna::Connector } - #[doc = "Checks if the value of the field is `RFPAD`"] + #[doc = "RFPAD"] #[inline(always)] pub fn is_rfpad(&self) -> bool { - *self == ANTENNA_A::RFPAD + *self == Antenna::Rfpad } - #[doc = "Checks if the value of the field is `INVERTEDF`"] + #[doc = "INVERTEDF"] #[inline(always)] pub fn is_invertedf(&self) -> bool { - *self == ANTENNA_A::INVERTEDF + *self == Antenna::Invertedf } } #[doc = "Field `MODNUMBER` reader - No Description"] -pub type MODNUMBER_R = crate::FieldReader; -#[doc = "Field `TYPE` reader - No Description"] -pub type TYPE_R = crate::BitReader; +pub type ModnumberR = crate::FieldReader; #[doc = "No Description\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TYPE_A { +pub enum Type { #[doc = "0: PCB"] - PCB = 0, + Pcb = 0, #[doc = "1: SIP"] - SIP = 1, + Sip = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TYPE_A) -> Self { + fn from(variant: Type) -> Self { variant as u8 != 0 } } -impl TYPE_R { +#[doc = "Field `TYPE` reader - No Description"] +pub type TypeR = crate::BitReader; +impl TypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TYPE_A { + pub const fn variant(&self) -> Type { match self.bits { - false => TYPE_A::PCB, - true => TYPE_A::SIP, + false => Type::Pcb, + true => Type::Sip, } } - #[doc = "Checks if the value of the field is `PCB`"] + #[doc = "PCB"] #[inline(always)] pub fn is_pcb(&self) -> bool { - *self == TYPE_A::PCB + *self == Type::Pcb } - #[doc = "Checks if the value of the field is `SIP`"] + #[doc = "SIP"] #[inline(always)] pub fn is_sip(&self) -> bool { - *self == TYPE_A::SIP + *self == Type::Sip } } -#[doc = "Field `LFXO` reader - No Description"] -pub type LFXO_R = crate::BitReader; #[doc = "No Description\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LFXO_A { +pub enum Lfxo { #[doc = "0: NONE"] - NONE = 0, + None = 0, #[doc = "1: PRESENT"] - PRESENT = 1, + Present = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LFXO_A) -> Self { + fn from(variant: Lfxo) -> Self { variant as u8 != 0 } } -impl LFXO_R { +#[doc = "Field `LFXO` reader - No Description"] +pub type LfxoR = crate::BitReader; +impl LfxoR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LFXO_A { + pub const fn variant(&self) -> Lfxo { match self.bits { - false => LFXO_A::NONE, - true => LFXO_A::PRESENT, + false => Lfxo::None, + true => Lfxo::Present, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == LFXO_A::NONE + *self == Lfxo::None } - #[doc = "Checks if the value of the field is `PRESENT`"] + #[doc = "PRESENT"] #[inline(always)] pub fn is_present(&self) -> bool { - *self == LFXO_A::PRESENT + *self == Lfxo::Present } } -#[doc = "Field `EXPRESS` reader - No Description"] -pub type EXPRESS_R = crate::BitReader; #[doc = "No Description\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EXPRESS_A { +pub enum Express { #[doc = "0: SUPPORTED"] - SUPPORTED = 0, + Supported = 0, #[doc = "1: NONE"] - NONE = 1, + None = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EXPRESS_A) -> Self { + fn from(variant: Express) -> Self { variant as u8 != 0 } } -impl EXPRESS_R { +#[doc = "Field `EXPRESS` reader - No Description"] +pub type ExpressR = crate::BitReader; +impl ExpressR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXPRESS_A { + pub const fn variant(&self) -> Express { match self.bits { - false => EXPRESS_A::SUPPORTED, - true => EXPRESS_A::NONE, + false => Express::Supported, + true => Express::None, } } - #[doc = "Checks if the value of the field is `SUPPORTED`"] + #[doc = "SUPPORTED"] #[inline(always)] pub fn is_supported(&self) -> bool { - *self == EXPRESS_A::SUPPORTED + *self == Express::Supported } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == EXPRESS_A::NONE + *self == Express::None } } -#[doc = "Field `LFXOCALVAL` reader - No Description"] -pub type LFXOCALVAL_R = crate::BitReader; #[doc = "No Description\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LFXOCALVAL_A { +pub enum Lfxocalval { #[doc = "0: VALID"] - VALID = 0, + Valid = 0, #[doc = "1: NOTVALID"] - NOTVALID = 1, + Notvalid = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LFXOCALVAL_A) -> Self { + fn from(variant: Lfxocalval) -> Self { variant as u8 != 0 } } -impl LFXOCALVAL_R { +#[doc = "Field `LFXOCALVAL` reader - No Description"] +pub type LfxocalvalR = crate::BitReader; +impl LfxocalvalR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LFXOCALVAL_A { + pub const fn variant(&self) -> Lfxocalval { match self.bits { - false => LFXOCALVAL_A::VALID, - true => LFXOCALVAL_A::NOTVALID, + false => Lfxocalval::Valid, + true => Lfxocalval::Notvalid, } } - #[doc = "Checks if the value of the field is `VALID`"] + #[doc = "VALID"] #[inline(always)] pub fn is_valid(&self) -> bool { - *self == LFXOCALVAL_A::VALID + *self == Lfxocalval::Valid } - #[doc = "Checks if the value of the field is `NOTVALID`"] + #[doc = "NOTVALID"] #[inline(always)] pub fn is_notvalid(&self) -> bool { - *self == LFXOCALVAL_A::NOTVALID + *self == Lfxocalval::Notvalid } } -#[doc = "Field `HFXOCALVAL` reader - No Description"] -pub type HFXOCALVAL_R = crate::BitReader; #[doc = "No Description\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HFXOCALVAL_A { +pub enum Hfxocalval { #[doc = "0: VALID"] - VALID = 0, + Valid = 0, #[doc = "1: NOTVALID"] - NOTVALID = 1, + Notvalid = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HFXOCALVAL_A) -> Self { + fn from(variant: Hfxocalval) -> Self { variant as u8 != 0 } } -impl HFXOCALVAL_R { +#[doc = "Field `HFXOCALVAL` reader - No Description"] +pub type HfxocalvalR = crate::BitReader; +impl HfxocalvalR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> HFXOCALVAL_A { + pub const fn variant(&self) -> Hfxocalval { match self.bits { - false => HFXOCALVAL_A::VALID, - true => HFXOCALVAL_A::NOTVALID, + false => Hfxocalval::Valid, + true => Hfxocalval::Notvalid, } } - #[doc = "Checks if the value of the field is `VALID`"] + #[doc = "VALID"] #[inline(always)] pub fn is_valid(&self) -> bool { - *self == HFXOCALVAL_A::VALID + *self == Hfxocalval::Valid } - #[doc = "Checks if the value of the field is `NOTVALID`"] + #[doc = "NOTVALID"] #[inline(always)] pub fn is_notvalid(&self) -> bool { - *self == HFXOCALVAL_A::NOTVALID + *self == Hfxocalval::Notvalid } } #[doc = "Field `MODNUMBERMSB` reader - No Description"] -pub type MODNUMBERMSB_R = crate::FieldReader; -#[doc = "Field `PADCDC` reader - No Description"] -pub type PADCDC_R = crate::BitReader; +pub type ModnumbermsbR = crate::FieldReader; #[doc = "No Description\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PADCDC_A { +pub enum Padcdc { #[doc = "0: VDCDC"] - VDCDC = 0, + Vdcdc = 0, #[doc = "1: OTHER"] - OTHER = 1, + Other = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PADCDC_A) -> Self { + fn from(variant: Padcdc) -> Self { variant as u8 != 0 } } -impl PADCDC_R { +#[doc = "Field `PADCDC` reader - No Description"] +pub type PadcdcR = crate::BitReader; +impl PadcdcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PADCDC_A { + pub const fn variant(&self) -> Padcdc { match self.bits { - false => PADCDC_A::VDCDC, - true => PADCDC_A::OTHER, + false => Padcdc::Vdcdc, + true => Padcdc::Other, } } - #[doc = "Checks if the value of the field is `VDCDC`"] + #[doc = "VDCDC"] #[inline(always)] pub fn is_vdcdc(&self) -> bool { - *self == PADCDC_A::VDCDC + *self == Padcdc::Vdcdc } - #[doc = "Checks if the value of the field is `OTHER`"] + #[doc = "OTHER"] #[inline(always)] pub fn is_other(&self) -> bool { - *self == PADCDC_A::OTHER + *self == Padcdc::Other } } -#[doc = "Field `PHYLIMITED` reader - No Description"] -pub type PHYLIMITED_R = crate::BitReader; #[doc = "No Description\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PHYLIMITED_A { +pub enum Phylimited { #[doc = "0: LIMITED"] - LIMITED = 0, + Limited = 0, #[doc = "1: UNLIMITED"] - UNLIMITED = 1, + Unlimited = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PHYLIMITED_A) -> Self { + fn from(variant: Phylimited) -> Self { variant as u8 != 0 } } -impl PHYLIMITED_R { +#[doc = "Field `PHYLIMITED` reader - No Description"] +pub type PhylimitedR = crate::BitReader; +impl PhylimitedR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PHYLIMITED_A { + pub const fn variant(&self) -> Phylimited { match self.bits { - false => PHYLIMITED_A::LIMITED, - true => PHYLIMITED_A::UNLIMITED, + false => Phylimited::Limited, + true => Phylimited::Unlimited, } } - #[doc = "Checks if the value of the field is `LIMITED`"] + #[doc = "LIMITED"] #[inline(always)] pub fn is_limited(&self) -> bool { - *self == PHYLIMITED_A::LIMITED + *self == Phylimited::Limited } - #[doc = "Checks if the value of the field is `UNLIMITED`"] + #[doc = "UNLIMITED"] #[inline(always)] pub fn is_unlimited(&self) -> bool { - *self == PHYLIMITED_A::UNLIMITED + *self == Phylimited::Unlimited } } -#[doc = "Field `EXTVALID` reader - No Description"] -pub type EXTVALID_R = crate::BitReader; #[doc = "No Description\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EXTVALID_A { +pub enum Extvalid { #[doc = "0: EXTUSED"] - EXTUSED = 0, + Extused = 0, #[doc = "1: EXTUNUSED"] - EXTUNUSED = 1, + Extunused = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EXTVALID_A) -> Self { + fn from(variant: Extvalid) -> Self { variant as u8 != 0 } } -impl EXTVALID_R { +#[doc = "Field `EXTVALID` reader - No Description"] +pub type ExtvalidR = crate::BitReader; +impl ExtvalidR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTVALID_A { + pub const fn variant(&self) -> Extvalid { match self.bits { - false => EXTVALID_A::EXTUSED, - true => EXTVALID_A::EXTUNUSED, + false => Extvalid::Extused, + true => Extvalid::Extunused, } } - #[doc = "Checks if the value of the field is `EXTUSED`"] + #[doc = "EXTUSED"] #[inline(always)] pub fn is_extused(&self) -> bool { - *self == EXTVALID_A::EXTUSED + *self == Extvalid::Extused } - #[doc = "Checks if the value of the field is `EXTUNUSED`"] + #[doc = "EXTUNUSED"] #[inline(always)] pub fn is_extunused(&self) -> bool { - *self == EXTVALID_A::EXTUNUSED + *self == Extvalid::Extunused } } impl R { #[doc = "Bits 0:4 - No Description"] #[inline(always)] - pub fn hwrev(&self) -> HWREV_R { - HWREV_R::new((self.bits & 0x1f) as u8) + pub fn hwrev(&self) -> HwrevR { + HwrevR::new((self.bits & 0x1f) as u8) } #[doc = "Bits 5:7 - No Description"] #[inline(always)] - pub fn antenna(&self) -> ANTENNA_R { - ANTENNA_R::new(((self.bits >> 5) & 7) as u8) + pub fn antenna(&self) -> AntennaR { + AntennaR::new(((self.bits >> 5) & 7) as u8) } #[doc = "Bits 8:14 - No Description"] #[inline(always)] - pub fn modnumber(&self) -> MODNUMBER_R { - MODNUMBER_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn modnumber(&self) -> ModnumberR { + ModnumberR::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bit 15 - No Description"] #[inline(always)] - pub fn type_(&self) -> TYPE_R { - TYPE_R::new(((self.bits >> 15) & 1) != 0) + pub fn type_(&self) -> TypeR { + TypeR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - No Description"] #[inline(always)] - pub fn lfxo(&self) -> LFXO_R { - LFXO_R::new(((self.bits >> 16) & 1) != 0) + pub fn lfxo(&self) -> LfxoR { + LfxoR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - No Description"] #[inline(always)] - pub fn express(&self) -> EXPRESS_R { - EXPRESS_R::new(((self.bits >> 17) & 1) != 0) + pub fn express(&self) -> ExpressR { + ExpressR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - No Description"] #[inline(always)] - pub fn lfxocalval(&self) -> LFXOCALVAL_R { - LFXOCALVAL_R::new(((self.bits >> 18) & 1) != 0) + pub fn lfxocalval(&self) -> LfxocalvalR { + LfxocalvalR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - No Description"] #[inline(always)] - pub fn hfxocalval(&self) -> HFXOCALVAL_R { - HFXOCALVAL_R::new(((self.bits >> 19) & 1) != 0) + pub fn hfxocalval(&self) -> HfxocalvalR { + HfxocalvalR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bits 20:28 - No Description"] #[inline(always)] - pub fn modnumbermsb(&self) -> MODNUMBERMSB_R { - MODNUMBERMSB_R::new(((self.bits >> 20) & 0x01ff) as u16) + pub fn modnumbermsb(&self) -> ModnumbermsbR { + ModnumbermsbR::new(((self.bits >> 20) & 0x01ff) as u16) } #[doc = "Bit 29 - No Description"] #[inline(always)] - pub fn padcdc(&self) -> PADCDC_R { - PADCDC_R::new(((self.bits >> 29) & 1) != 0) + pub fn padcdc(&self) -> PadcdcR { + PadcdcR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - No Description"] #[inline(always)] - pub fn phylimited(&self) -> PHYLIMITED_R { - PHYLIMITED_R::new(((self.bits >> 30) & 1) != 0) + pub fn phylimited(&self) -> PhylimitedR { + PhylimitedR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - No Description"] #[inline(always)] - pub fn extvalid(&self) -> EXTVALID_R { - EXTVALID_R::new(((self.bits >> 31) & 1) != 0) + pub fn extvalid(&self) -> ExtvalidR { + ExtvalidR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "Module Information\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [moduleinfo](index.html) module"] -pub struct MODULEINFO_SPEC; -impl crate::RegisterSpec for MODULEINFO_SPEC { +#[doc = "Module Information\n\nYou can [`read`](crate::Reg::read) this register and get [`moduleinfo::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ModuleinfoSpec; +impl crate::RegisterSpec for ModuleinfoSpec { type Ux = u32; } -#[doc = "`read()` method returns [moduleinfo::R](R) reader structure"] -impl crate::Readable for MODULEINFO_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`moduleinfo::R`](R) reader structure"] +impl crate::Readable for ModuleinfoSpec {} #[doc = "`reset()` method sets MODULEINFO to value 0xffff_ffff"] -impl crate::Resettable for MODULEINFO_SPEC { - const RESET_VALUE: Self::Ux = 0xffff_ffff; +impl crate::Resettable for ModuleinfoSpec { + const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename0.rs index 6b027e2..02cbe43 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename0.rs @@ -1,58 +1,43 @@ #[doc = "Register `MODULENAME0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `MODCHAR1` reader - No Description"] -pub type MODCHAR1_R = crate::FieldReader; +pub type Modchar1R = crate::FieldReader; #[doc = "Field `MODCHAR2` reader - No Description"] -pub type MODCHAR2_R = crate::FieldReader; +pub type Modchar2R = crate::FieldReader; #[doc = "Field `MODCHAR3` reader - No Description"] -pub type MODCHAR3_R = crate::FieldReader; +pub type Modchar3R = crate::FieldReader; #[doc = "Field `MODCHAR4` reader - No Description"] -pub type MODCHAR4_R = crate::FieldReader; +pub type Modchar4R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - No Description"] #[inline(always)] - pub fn modchar1(&self) -> MODCHAR1_R { - MODCHAR1_R::new((self.bits & 0xff) as u8) + pub fn modchar1(&self) -> Modchar1R { + Modchar1R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - No Description"] #[inline(always)] - pub fn modchar2(&self) -> MODCHAR2_R { - MODCHAR2_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn modchar2(&self) -> Modchar2R { + Modchar2R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - No Description"] #[inline(always)] - pub fn modchar3(&self) -> MODCHAR3_R { - MODCHAR3_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn modchar3(&self) -> Modchar3R { + Modchar3R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - No Description"] #[inline(always)] - pub fn modchar4(&self) -> MODCHAR4_R { - MODCHAR4_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn modchar4(&self) -> Modchar4R { + Modchar4R::new(((self.bits >> 24) & 0xff) as u8) } } -#[doc = "Characters 1-4 of Module Name stored as a null terminated string\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [modulename0](index.html) module"] -pub struct MODULENAME0_SPEC; -impl crate::RegisterSpec for MODULENAME0_SPEC { +#[doc = "Characters 1-4 of Module Name stored as a null terminated string\n\nYou can [`read`](crate::Reg::read) this register and get [`modulename0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Modulename0Spec; +impl crate::RegisterSpec for Modulename0Spec { type Ux = u32; } -#[doc = "`read()` method returns [modulename0::R](R) reader structure"] -impl crate::Readable for MODULENAME0_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`modulename0::R`](R) reader structure"] +impl crate::Readable for Modulename0Spec {} #[doc = "`reset()` method sets MODULENAME0 to value 0xffff_ffff"] -impl crate::Resettable for MODULENAME0_SPEC { - const RESET_VALUE: Self::Ux = 0xffff_ffff; +impl crate::Resettable for Modulename0Spec { + const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename1.rs index d7f42e9..de7adb5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename1.rs @@ -1,58 +1,43 @@ #[doc = "Register `MODULENAME1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `MODCHAR5` reader - No Description"] -pub type MODCHAR5_R = crate::FieldReader; +pub type Modchar5R = crate::FieldReader; #[doc = "Field `MODCHAR6` reader - No Description"] -pub type MODCHAR6_R = crate::FieldReader; +pub type Modchar6R = crate::FieldReader; #[doc = "Field `MODCHAR7` reader - No Description"] -pub type MODCHAR7_R = crate::FieldReader; +pub type Modchar7R = crate::FieldReader; #[doc = "Field `MODCHAR8` reader - No Description"] -pub type MODCHAR8_R = crate::FieldReader; +pub type Modchar8R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - No Description"] #[inline(always)] - pub fn modchar5(&self) -> MODCHAR5_R { - MODCHAR5_R::new((self.bits & 0xff) as u8) + pub fn modchar5(&self) -> Modchar5R { + Modchar5R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - No Description"] #[inline(always)] - pub fn modchar6(&self) -> MODCHAR6_R { - MODCHAR6_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn modchar6(&self) -> Modchar6R { + Modchar6R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - No Description"] #[inline(always)] - pub fn modchar7(&self) -> MODCHAR7_R { - MODCHAR7_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn modchar7(&self) -> Modchar7R { + Modchar7R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - No Description"] #[inline(always)] - pub fn modchar8(&self) -> MODCHAR8_R { - MODCHAR8_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn modchar8(&self) -> Modchar8R { + Modchar8R::new(((self.bits >> 24) & 0xff) as u8) } } -#[doc = "Characters 5-8 of Module Name stored as a null terminated string\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [modulename1](index.html) module"] -pub struct MODULENAME1_SPEC; -impl crate::RegisterSpec for MODULENAME1_SPEC { +#[doc = "Characters 5-8 of Module Name stored as a null terminated string\n\nYou can [`read`](crate::Reg::read) this register and get [`modulename1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Modulename1Spec; +impl crate::RegisterSpec for Modulename1Spec { type Ux = u32; } -#[doc = "`read()` method returns [modulename1::R](R) reader structure"] -impl crate::Readable for MODULENAME1_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`modulename1::R`](R) reader structure"] +impl crate::Readable for Modulename1Spec {} #[doc = "`reset()` method sets MODULENAME1 to value 0xffff_ffff"] -impl crate::Resettable for MODULENAME1_SPEC { - const RESET_VALUE: Self::Ux = 0xffff_ffff; +impl crate::Resettable for Modulename1Spec { + const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename2.rs index 9a9c998..e9dae91 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename2.rs @@ -1,58 +1,43 @@ #[doc = "Register `MODULENAME2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `MODCHAR9` reader - No Description"] -pub type MODCHAR9_R = crate::FieldReader; +pub type Modchar9R = crate::FieldReader; #[doc = "Field `MODCHAR10` reader - No Description"] -pub type MODCHAR10_R = crate::FieldReader; +pub type Modchar10R = crate::FieldReader; #[doc = "Field `MODCHAR11` reader - No Description"] -pub type MODCHAR11_R = crate::FieldReader; +pub type Modchar11R = crate::FieldReader; #[doc = "Field `MODCHAR12` reader - No Description"] -pub type MODCHAR12_R = crate::FieldReader; +pub type Modchar12R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - No Description"] #[inline(always)] - pub fn modchar9(&self) -> MODCHAR9_R { - MODCHAR9_R::new((self.bits & 0xff) as u8) + pub fn modchar9(&self) -> Modchar9R { + Modchar9R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - No Description"] #[inline(always)] - pub fn modchar10(&self) -> MODCHAR10_R { - MODCHAR10_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn modchar10(&self) -> Modchar10R { + Modchar10R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - No Description"] #[inline(always)] - pub fn modchar11(&self) -> MODCHAR11_R { - MODCHAR11_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn modchar11(&self) -> Modchar11R { + Modchar11R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - No Description"] #[inline(always)] - pub fn modchar12(&self) -> MODCHAR12_R { - MODCHAR12_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn modchar12(&self) -> Modchar12R { + Modchar12R::new(((self.bits >> 24) & 0xff) as u8) } } -#[doc = "Characters 9-12 of Module Name stored as a null terminated string\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [modulename2](index.html) module"] -pub struct MODULENAME2_SPEC; -impl crate::RegisterSpec for MODULENAME2_SPEC { +#[doc = "Characters 9-12 of Module Name stored as a null terminated string\n\nYou can [`read`](crate::Reg::read) this register and get [`modulename2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Modulename2Spec; +impl crate::RegisterSpec for Modulename2Spec { type Ux = u32; } -#[doc = "`read()` method returns [modulename2::R](R) reader structure"] -impl crate::Readable for MODULENAME2_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`modulename2::R`](R) reader structure"] +impl crate::Readable for Modulename2Spec {} #[doc = "`reset()` method sets MODULENAME2 to value 0xffff_ffff"] -impl crate::Resettable for MODULENAME2_SPEC { - const RESET_VALUE: Self::Ux = 0xffff_ffff; +impl crate::Resettable for Modulename2Spec { + const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename3.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename3.rs index d5bc760..0619ec2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename3.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename3.rs @@ -1,58 +1,43 @@ #[doc = "Register `MODULENAME3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `MODCHAR13` reader - No Description"] -pub type MODCHAR13_R = crate::FieldReader; +pub type Modchar13R = crate::FieldReader; #[doc = "Field `MODCHAR14` reader - No Description"] -pub type MODCHAR14_R = crate::FieldReader; +pub type Modchar14R = crate::FieldReader; #[doc = "Field `MODCHAR15` reader - No Description"] -pub type MODCHAR15_R = crate::FieldReader; +pub type Modchar15R = crate::FieldReader; #[doc = "Field `MODCHAR16` reader - No Description"] -pub type MODCHAR16_R = crate::FieldReader; +pub type Modchar16R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - No Description"] #[inline(always)] - pub fn modchar13(&self) -> MODCHAR13_R { - MODCHAR13_R::new((self.bits & 0xff) as u8) + pub fn modchar13(&self) -> Modchar13R { + Modchar13R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - No Description"] #[inline(always)] - pub fn modchar14(&self) -> MODCHAR14_R { - MODCHAR14_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn modchar14(&self) -> Modchar14R { + Modchar14R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - No Description"] #[inline(always)] - pub fn modchar15(&self) -> MODCHAR15_R { - MODCHAR15_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn modchar15(&self) -> Modchar15R { + Modchar15R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - No Description"] #[inline(always)] - pub fn modchar16(&self) -> MODCHAR16_R { - MODCHAR16_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn modchar16(&self) -> Modchar16R { + Modchar16R::new(((self.bits >> 24) & 0xff) as u8) } } -#[doc = "Characters 13-16 of Module Name stored as a null terminated string\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [modulename3](index.html) module"] -pub struct MODULENAME3_SPEC; -impl crate::RegisterSpec for MODULENAME3_SPEC { +#[doc = "Characters 13-16 of Module Name stored as a null terminated string\n\nYou can [`read`](crate::Reg::read) this register and get [`modulename3::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Modulename3Spec; +impl crate::RegisterSpec for Modulename3Spec { type Ux = u32; } -#[doc = "`read()` method returns [modulename3::R](R) reader structure"] -impl crate::Readable for MODULENAME3_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`modulename3::R`](R) reader structure"] +impl crate::Readable for Modulename3Spec {} #[doc = "`reset()` method sets MODULENAME3 to value 0xffff_ffff"] -impl crate::Resettable for MODULENAME3_SPEC { - const RESET_VALUE: Self::Ux = 0xffff_ffff; +impl crate::Resettable for Modulename3Spec { + const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename4.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename4.rs index 274b07b..ca94e70 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename4.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename4.rs @@ -1,58 +1,43 @@ #[doc = "Register `MODULENAME4` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `MODCHAR17` reader - No Description"] -pub type MODCHAR17_R = crate::FieldReader; +pub type Modchar17R = crate::FieldReader; #[doc = "Field `MODCHAR18` reader - No Description"] -pub type MODCHAR18_R = crate::FieldReader; +pub type Modchar18R = crate::FieldReader; #[doc = "Field `MODCHAR19` reader - No Description"] -pub type MODCHAR19_R = crate::FieldReader; +pub type Modchar19R = crate::FieldReader; #[doc = "Field `MODCHAR20` reader - No Description"] -pub type MODCHAR20_R = crate::FieldReader; +pub type Modchar20R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - No Description"] #[inline(always)] - pub fn modchar17(&self) -> MODCHAR17_R { - MODCHAR17_R::new((self.bits & 0xff) as u8) + pub fn modchar17(&self) -> Modchar17R { + Modchar17R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - No Description"] #[inline(always)] - pub fn modchar18(&self) -> MODCHAR18_R { - MODCHAR18_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn modchar18(&self) -> Modchar18R { + Modchar18R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - No Description"] #[inline(always)] - pub fn modchar19(&self) -> MODCHAR19_R { - MODCHAR19_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn modchar19(&self) -> Modchar19R { + Modchar19R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - No Description"] #[inline(always)] - pub fn modchar20(&self) -> MODCHAR20_R { - MODCHAR20_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn modchar20(&self) -> Modchar20R { + Modchar20R::new(((self.bits >> 24) & 0xff) as u8) } } -#[doc = "Characters 17-20 of Module Name stored as a null terminated string\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [modulename4](index.html) module"] -pub struct MODULENAME4_SPEC; -impl crate::RegisterSpec for MODULENAME4_SPEC { +#[doc = "Characters 17-20 of Module Name stored as a null terminated string\n\nYou can [`read`](crate::Reg::read) this register and get [`modulename4::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Modulename4Spec; +impl crate::RegisterSpec for Modulename4Spec { type Ux = u32; } -#[doc = "`read()` method returns [modulename4::R](R) reader structure"] -impl crate::Readable for MODULENAME4_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`modulename4::R`](R) reader structure"] +impl crate::Readable for Modulename4Spec {} #[doc = "`reset()` method sets MODULENAME4 to value 0xffff_ffff"] -impl crate::Resettable for MODULENAME4_SPEC { - const RESET_VALUE: Self::Ux = 0xffff_ffff; +impl crate::Resettable for Modulename4Spec { + const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename5.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename5.rs index b0202f4..ac33bc0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename5.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename5.rs @@ -1,58 +1,43 @@ #[doc = "Register `MODULENAME5` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `MODCHAR21` reader - No Description"] -pub type MODCHAR21_R = crate::FieldReader; +pub type Modchar21R = crate::FieldReader; #[doc = "Field `MODCHAR22` reader - No Description"] -pub type MODCHAR22_R = crate::FieldReader; +pub type Modchar22R = crate::FieldReader; #[doc = "Field `MODCHAR23` reader - No Description"] -pub type MODCHAR23_R = crate::FieldReader; +pub type Modchar23R = crate::FieldReader; #[doc = "Field `MODCHAR24` reader - No Description"] -pub type MODCHAR24_R = crate::FieldReader; +pub type Modchar24R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - No Description"] #[inline(always)] - pub fn modchar21(&self) -> MODCHAR21_R { - MODCHAR21_R::new((self.bits & 0xff) as u8) + pub fn modchar21(&self) -> Modchar21R { + Modchar21R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - No Description"] #[inline(always)] - pub fn modchar22(&self) -> MODCHAR22_R { - MODCHAR22_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn modchar22(&self) -> Modchar22R { + Modchar22R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - No Description"] #[inline(always)] - pub fn modchar23(&self) -> MODCHAR23_R { - MODCHAR23_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn modchar23(&self) -> Modchar23R { + Modchar23R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - No Description"] #[inline(always)] - pub fn modchar24(&self) -> MODCHAR24_R { - MODCHAR24_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn modchar24(&self) -> Modchar24R { + Modchar24R::new(((self.bits >> 24) & 0xff) as u8) } } -#[doc = "Characters 21-24 of Module Name stored as a null terminated string\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [modulename5](index.html) module"] -pub struct MODULENAME5_SPEC; -impl crate::RegisterSpec for MODULENAME5_SPEC { +#[doc = "Characters 21-24 of Module Name stored as a null terminated string\n\nYou can [`read`](crate::Reg::read) this register and get [`modulename5::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Modulename5Spec; +impl crate::RegisterSpec for Modulename5Spec { type Ux = u32; } -#[doc = "`read()` method returns [modulename5::R](R) reader structure"] -impl crate::Readable for MODULENAME5_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`modulename5::R`](R) reader structure"] +impl crate::Readable for Modulename5Spec {} #[doc = "`reset()` method sets MODULENAME5 to value 0xffff_ffff"] -impl crate::Resettable for MODULENAME5_SPEC { - const RESET_VALUE: Self::Ux = 0xffff_ffff; +impl crate::Resettable for Modulename5Spec { + const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename6.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename6.rs index 447889c..ac1b7bf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename6.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modulename6.rs @@ -1,51 +1,36 @@ #[doc = "Register `MODULENAME6` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `MODCHAR25` reader - No Description"] -pub type MODCHAR25_R = crate::FieldReader; +pub type Modchar25R = crate::FieldReader; #[doc = "Field `MODCHAR26` reader - No Description"] -pub type MODCHAR26_R = crate::FieldReader; +pub type Modchar26R = crate::FieldReader; #[doc = "Field `RSV` reader - No Description"] -pub type RSV_R = crate::FieldReader; +pub type RsvR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - No Description"] #[inline(always)] - pub fn modchar25(&self) -> MODCHAR25_R { - MODCHAR25_R::new((self.bits & 0xff) as u8) + pub fn modchar25(&self) -> Modchar25R { + Modchar25R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - No Description"] #[inline(always)] - pub fn modchar26(&self) -> MODCHAR26_R { - MODCHAR26_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn modchar26(&self) -> Modchar26R { + Modchar26R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - No Description"] #[inline(always)] - pub fn rsv(&self) -> RSV_R { - RSV_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn rsv(&self) -> RsvR { + RsvR::new(((self.bits >> 16) & 0xffff) as u16) } } -#[doc = "Characters 25-26 of Module Name stored as a null terminated string\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [modulename6](index.html) module"] -pub struct MODULENAME6_SPEC; -impl crate::RegisterSpec for MODULENAME6_SPEC { +#[doc = "Characters 25-26 of Module Name stored as a null terminated string\n\nYou can [`read`](crate::Reg::read) this register and get [`modulename6::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Modulename6Spec; +impl crate::RegisterSpec for Modulename6Spec { type Ux = u32; } -#[doc = "`read()` method returns [modulename6::R](R) reader structure"] -impl crate::Readable for MODULENAME6_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`modulename6::R`](R) reader structure"] +impl crate::Readable for Modulename6Spec {} #[doc = "`reset()` method sets MODULENAME6 to value 0xffff_ffff"] -impl crate::Resettable for MODULENAME6_SPEC { - const RESET_VALUE: Self::Ux = 0xffff_ffff; +impl crate::Resettable for Modulename6Spec { + const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modxocal.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modxocal.rs index de86a89..73a143b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modxocal.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/modxocal.rs @@ -1,51 +1,36 @@ #[doc = "Register `MODXOCAL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `HFXOCTUNEXIANA` reader - No Description"] -pub type HFXOCTUNEXIANA_R = crate::FieldReader; +pub type HfxoctunexianaR = crate::FieldReader; #[doc = "Field `HFXOCTUNEXOANA` reader - No Description"] -pub type HFXOCTUNEXOANA_R = crate::FieldReader; +pub type HfxoctunexoanaR = crate::FieldReader; #[doc = "Field `LFXOCAPTUNE` reader - No Description"] -pub type LFXOCAPTUNE_R = crate::FieldReader; +pub type LfxocaptuneR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - No Description"] #[inline(always)] - pub fn hfxoctunexiana(&self) -> HFXOCTUNEXIANA_R { - HFXOCTUNEXIANA_R::new((self.bits & 0xff) as u8) + pub fn hfxoctunexiana(&self) -> HfxoctunexianaR { + HfxoctunexianaR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - No Description"] #[inline(always)] - pub fn hfxoctunexoana(&self) -> HFXOCTUNEXOANA_R { - HFXOCTUNEXOANA_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn hfxoctunexoana(&self) -> HfxoctunexoanaR { + HfxoctunexoanaR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:22 - No Description"] #[inline(always)] - pub fn lfxocaptune(&self) -> LFXOCAPTUNE_R { - LFXOCAPTUNE_R::new(((self.bits >> 16) & 0x7f) as u8) + pub fn lfxocaptune(&self) -> LfxocaptuneR { + LfxocaptuneR::new(((self.bits >> 16) & 0x7f) as u8) } } -#[doc = "Module Crystal Oscillator Calibration\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [modxocal](index.html) module"] -pub struct MODXOCAL_SPEC; -impl crate::RegisterSpec for MODXOCAL_SPEC { +#[doc = "Module Crystal Oscillator Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`modxocal::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ModxocalSpec; +impl crate::RegisterSpec for ModxocalSpec { type Ux = u32; } -#[doc = "`read()` method returns [modxocal::R](R) reader structure"] -impl crate::Readable for MODXOCAL_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`modxocal::R`](R) reader structure"] +impl crate::Readable for ModxocalSpec {} #[doc = "`reset()` method sets MODXOCAL to value 0x007f_ffff"] -impl crate::Resettable for MODXOCAL_SPEC { - const RESET_VALUE: Self::Ux = 0x007f_ffff; +impl crate::Resettable for ModxocalSpec { + const RESET_VALUE: u32 = 0x007f_ffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/msize.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/msize.rs index 932be20..fa27eb3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/msize.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/msize.rs @@ -1,44 +1,29 @@ #[doc = "Register `MSIZE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `FLASH` reader - Flash Size"] -pub type FLASH_R = crate::FieldReader; +pub type FlashR = crate::FieldReader; #[doc = "Field `SRAM` reader - Sram Size"] -pub type SRAM_R = crate::FieldReader; +pub type SramR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Flash Size"] #[inline(always)] - pub fn flash(&self) -> FLASH_R { - FLASH_R::new((self.bits & 0xffff) as u16) + pub fn flash(&self) -> FlashR { + FlashR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:26 - Sram Size"] #[inline(always)] - pub fn sram(&self) -> SRAM_R { - SRAM_R::new(((self.bits >> 16) & 0x07ff) as u16) + pub fn sram(&self) -> SramR { + SramR::new(((self.bits >> 16) & 0x07ff) as u16) } } -#[doc = "Flash and SRAM Memory size in kB\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [msize](index.html) module"] -pub struct MSIZE_SPEC; -impl crate::RegisterSpec for MSIZE_SPEC { +#[doc = "Flash and SRAM Memory size in kB\n\nYou can [`read`](crate::Reg::read) this register and get [`msize::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct MsizeSpec; +impl crate::RegisterSpec for MsizeSpec { type Ux = u32; } -#[doc = "`read()` method returns [msize::R](R) reader structure"] -impl crate::Readable for MSIZE_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`msize::R`](R) reader structure"] +impl crate::Readable for MsizeSpec {} #[doc = "`reset()` method sets MSIZE to value 0"] -impl crate::Resettable for MSIZE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for MsizeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/part.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/part.rs index bddfd56..01c03bc 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/part.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/part.rs @@ -1,95 +1,92 @@ #[doc = "Register `PART` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DEVICENUM` reader - Device Number"] -pub type DEVICENUM_R = crate::FieldReader; +pub type DevicenumR = crate::FieldReader; #[doc = "Field `FAMILYNUM` reader - Device Family"] -pub type FAMILYNUM_R = crate::FieldReader; -#[doc = "Field `FAMILY` reader - Device Family"] -pub type FAMILY_R = crate::FieldReader; +pub type FamilynumR = crate::FieldReader; #[doc = "Device Family\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FAMILY_A { +pub enum Family { #[doc = "0: Flex Gecko"] - FG = 0, + Fg = 0, #[doc = "3: Z-Wave Gecko"] - ZG = 3, + Zg = 3, #[doc = "5: Pearl Gecko"] - PG = 5, + Pg = 5, + #[doc = "8: Sidewalk Gecko"] + Sg = 8, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FAMILY_A) -> Self { + fn from(variant: Family) -> Self { variant as _ } } -impl FAMILY_R { +impl crate::FieldSpec for Family { + type Ux = u8; +} +impl crate::IsEnum for Family {} +#[doc = "Field `FAMILY` reader - Device Family"] +pub type FamilyR = crate::FieldReader; +impl FamilyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(FAMILY_A::FG), - 3 => Some(FAMILY_A::ZG), - 5 => Some(FAMILY_A::PG), + 0 => Some(Family::Fg), + 3 => Some(Family::Zg), + 5 => Some(Family::Pg), + 8 => Some(Family::Sg), _ => None, } } - #[doc = "Checks if the value of the field is `FG`"] + #[doc = "Flex Gecko"] #[inline(always)] pub fn is_fg(&self) -> bool { - *self == FAMILY_A::FG + *self == Family::Fg } - #[doc = "Checks if the value of the field is `ZG`"] + #[doc = "Z-Wave Gecko"] #[inline(always)] pub fn is_zg(&self) -> bool { - *self == FAMILY_A::ZG + *self == Family::Zg } - #[doc = "Checks if the value of the field is `PG`"] + #[doc = "Pearl Gecko"] #[inline(always)] pub fn is_pg(&self) -> bool { - *self == FAMILY_A::PG + *self == Family::Pg + } + #[doc = "Sidewalk Gecko"] + #[inline(always)] + pub fn is_sg(&self) -> bool { + *self == Family::Sg } } impl R { #[doc = "Bits 0:15 - Device Number"] #[inline(always)] - pub fn devicenum(&self) -> DEVICENUM_R { - DEVICENUM_R::new((self.bits & 0xffff) as u16) + pub fn devicenum(&self) -> DevicenumR { + DevicenumR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:21 - Device Family"] #[inline(always)] - pub fn familynum(&self) -> FAMILYNUM_R { - FAMILYNUM_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn familynum(&self) -> FamilynumR { + FamilynumR::new(((self.bits >> 16) & 0x3f) as u8) } #[doc = "Bits 24:29 - Device Family"] #[inline(always)] - pub fn family(&self) -> FAMILY_R { - FAMILY_R::new(((self.bits >> 24) & 0x3f) as u8) + pub fn family(&self) -> FamilyR { + FamilyR::new(((self.bits >> 24) & 0x3f) as u8) } } -#[doc = "Part description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [part](index.html) module"] -pub struct PART_SPEC; -impl crate::RegisterSpec for PART_SPEC { +#[doc = "Part description\n\nYou can [`read`](crate::Reg::read) this register and get [`part::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PartSpec; +impl crate::RegisterSpec for PartSpec { type Ux = u32; } -#[doc = "`read()` method returns [part::R](R) reader structure"] -impl crate::Readable for PART_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`part::R`](R) reader structure"] +impl crate::Readable for PartSpec {} #[doc = "`reset()` method sets PART to value 0"] -impl crate::Resettable for PART_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PartSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/pkginfo.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/pkginfo.rs index 0da1e72..2e92e5c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/pkginfo.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/pkginfo.rs @@ -1,155 +1,148 @@ #[doc = "Register `PKGINFO` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `TEMPGRADE` reader - Temperature Grade"] -pub type TEMPGRADE_R = crate::FieldReader; +pub type R = crate::R; #[doc = "Temperature Grade\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TEMPGRADE_A { +pub enum Tempgrade { #[doc = "0: -40 to 85 degC"] - N40TO85 = 0, + N40to85 = 0, #[doc = "1: -40 to 125 degC"] - N40TO125 = 1, + N40to125 = 1, #[doc = "2: -40 to 105 degC"] - N40TO105 = 2, + N40to105 = 2, #[doc = "3: 0 to 70 degC"] - N0TO70 = 3, + N0to70 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TEMPGRADE_A) -> Self { + fn from(variant: Tempgrade) -> Self { variant as _ } } -impl TEMPGRADE_R { +impl crate::FieldSpec for Tempgrade { + type Ux = u8; +} +impl crate::IsEnum for Tempgrade {} +#[doc = "Field `TEMPGRADE` reader - Temperature Grade"] +pub type TempgradeR = crate::FieldReader; +impl TempgradeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TEMPGRADE_A::N40TO85), - 1 => Some(TEMPGRADE_A::N40TO125), - 2 => Some(TEMPGRADE_A::N40TO105), - 3 => Some(TEMPGRADE_A::N0TO70), + 0 => Some(Tempgrade::N40to85), + 1 => Some(Tempgrade::N40to125), + 2 => Some(Tempgrade::N40to105), + 3 => Some(Tempgrade::N0to70), _ => None, } } - #[doc = "Checks if the value of the field is `N40TO85`"] + #[doc = "-40 to 85 degC"] #[inline(always)] pub fn is_n40to85(&self) -> bool { - *self == TEMPGRADE_A::N40TO85 + *self == Tempgrade::N40to85 } - #[doc = "Checks if the value of the field is `N40TO125`"] + #[doc = "-40 to 125 degC"] #[inline(always)] pub fn is_n40to125(&self) -> bool { - *self == TEMPGRADE_A::N40TO125 + *self == Tempgrade::N40to125 } - #[doc = "Checks if the value of the field is `N40TO105`"] + #[doc = "-40 to 105 degC"] #[inline(always)] pub fn is_n40to105(&self) -> bool { - *self == TEMPGRADE_A::N40TO105 + *self == Tempgrade::N40to105 } - #[doc = "Checks if the value of the field is `N0TO70`"] + #[doc = "0 to 70 degC"] #[inline(always)] pub fn is_n0to70(&self) -> bool { - *self == TEMPGRADE_A::N0TO70 + *self == Tempgrade::N0to70 } } -#[doc = "Field `PKGTYPE` reader - Package Type"] -pub type PKGTYPE_R = crate::FieldReader; #[doc = "Package Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PKGTYPE_A { +pub enum Pkgtype { #[doc = "74: WLCSP package"] - WLCSP = 74, + Wlcsp = 74, #[doc = "76: BGA package"] - BGA = 76, + Bga = 76, #[doc = "77: QFN package"] - QFN = 77, + Qfn = 77, #[doc = "81: QFP package"] - QFP = 81, + Qfp = 81, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PKGTYPE_A) -> Self { + fn from(variant: Pkgtype) -> Self { variant as _ } } -impl PKGTYPE_R { +impl crate::FieldSpec for Pkgtype { + type Ux = u8; +} +impl crate::IsEnum for Pkgtype {} +#[doc = "Field `PKGTYPE` reader - Package Type"] +pub type PkgtypeR = crate::FieldReader; +impl PkgtypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 74 => Some(PKGTYPE_A::WLCSP), - 76 => Some(PKGTYPE_A::BGA), - 77 => Some(PKGTYPE_A::QFN), - 81 => Some(PKGTYPE_A::QFP), + 74 => Some(Pkgtype::Wlcsp), + 76 => Some(Pkgtype::Bga), + 77 => Some(Pkgtype::Qfn), + 81 => Some(Pkgtype::Qfp), _ => None, } } - #[doc = "Checks if the value of the field is `WLCSP`"] + #[doc = "WLCSP package"] #[inline(always)] pub fn is_wlcsp(&self) -> bool { - *self == PKGTYPE_A::WLCSP + *self == Pkgtype::Wlcsp } - #[doc = "Checks if the value of the field is `BGA`"] + #[doc = "BGA package"] #[inline(always)] pub fn is_bga(&self) -> bool { - *self == PKGTYPE_A::BGA + *self == Pkgtype::Bga } - #[doc = "Checks if the value of the field is `QFN`"] + #[doc = "QFN package"] #[inline(always)] pub fn is_qfn(&self) -> bool { - *self == PKGTYPE_A::QFN + *self == Pkgtype::Qfn } - #[doc = "Checks if the value of the field is `QFP`"] + #[doc = "QFP package"] #[inline(always)] pub fn is_qfp(&self) -> bool { - *self == PKGTYPE_A::QFP + *self == Pkgtype::Qfp } } #[doc = "Field `PINCOUNT` reader - Pin Count"] -pub type PINCOUNT_R = crate::FieldReader; +pub type PincountR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Temperature Grade"] #[inline(always)] - pub fn tempgrade(&self) -> TEMPGRADE_R { - TEMPGRADE_R::new((self.bits & 0xff) as u8) + pub fn tempgrade(&self) -> TempgradeR { + TempgradeR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Package Type"] #[inline(always)] - pub fn pkgtype(&self) -> PKGTYPE_R { - PKGTYPE_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pkgtype(&self) -> PkgtypeR { + PkgtypeR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Pin Count"] #[inline(always)] - pub fn pincount(&self) -> PINCOUNT_R { - PINCOUNT_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pincount(&self) -> PincountR { + PincountR::new(((self.bits >> 16) & 0xff) as u8) } } -#[doc = "Miscellaneous device information\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pkginfo](index.html) module"] -pub struct PKGINFO_SPEC; -impl crate::RegisterSpec for PKGINFO_SPEC { +#[doc = "Miscellaneous device information\n\nYou can [`read`](crate::Reg::read) this register and get [`pkginfo::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PkginfoSpec; +impl crate::RegisterSpec for PkginfoSpec { type Ux = u32; } -#[doc = "`read()` method returns [pkginfo::R](R) reader structure"] -impl crate::Readable for PKGINFO_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`pkginfo::R`](R) reader structure"] +impl crate::Readable for PkginfoSpec {} #[doc = "`reset()` method sets PKGINFO to value 0"] -impl crate::Resettable for PKGINFO_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PkginfoSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/rtherm.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/rtherm.rs index ada59a6..989bce5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/rtherm.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/rtherm.rs @@ -1,37 +1,22 @@ #[doc = "Register `RTHERM` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RTHERM` reader - No Description"] -pub type RTHERM_R = crate::FieldReader; +pub type RthermR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - No Description"] #[inline(always)] - pub fn rtherm(&self) -> RTHERM_R { - RTHERM_R::new((self.bits & 0xffff) as u16) + pub fn rtherm(&self) -> RthermR { + RthermR::new((self.bits & 0xffff) as u16) } } -#[doc = "RTHERM\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rtherm](index.html) module"] -pub struct RTHERM_SPEC; -impl crate::RegisterSpec for RTHERM_SPEC { +#[doc = "RTHERM\n\nYou can [`read`](crate::Reg::read) this register and get [`rtherm::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RthermSpec; +impl crate::RegisterSpec for RthermSpec { type Ux = u32; } -#[doc = "`read()` method returns [rtherm::R](R) reader structure"] -impl crate::Readable for RTHERM_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rtherm::R`](R) reader structure"] +impl crate::Readable for RthermSpec {} #[doc = "`reset()` method sets RTHERM to value 0"] -impl crate::Resettable for RTHERM_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RthermSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/swcapa0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/swcapa0.rs index 761c02a..f79e42a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/swcapa0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/swcapa0.rs @@ -1,451 +1,464 @@ #[doc = "Register `SWCAPA0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `ZIGBEE` reader - Zigbee Capability"] -pub type ZIGBEE_R = crate::FieldReader; +pub type R = crate::R; #[doc = "Zigbee Capability\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ZIGBEE_A { +pub enum Zigbee { #[doc = "0: ZigBee stack capability not available"] - LEVEL0 = 0, + Level0 = 0, #[doc = "1: GreenPower only"] - LEVEL1 = 1, + Level1 = 1, #[doc = "2: ZigBee and GreenPower"] - LEVEL2 = 2, + Level2 = 2, #[doc = "3: ZigBee Only"] - LEVEL3 = 3, + Level3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ZIGBEE_A) -> Self { + fn from(variant: Zigbee) -> Self { variant as _ } } -impl ZIGBEE_R { +impl crate::FieldSpec for Zigbee { + type Ux = u8; +} +impl crate::IsEnum for Zigbee {} +#[doc = "Field `ZIGBEE` reader - Zigbee Capability"] +pub type ZigbeeR = crate::FieldReader; +impl ZigbeeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ZIGBEE_A { + pub const fn variant(&self) -> Zigbee { match self.bits { - 0 => ZIGBEE_A::LEVEL0, - 1 => ZIGBEE_A::LEVEL1, - 2 => ZIGBEE_A::LEVEL2, - 3 => ZIGBEE_A::LEVEL3, + 0 => Zigbee::Level0, + 1 => Zigbee::Level1, + 2 => Zigbee::Level2, + 3 => Zigbee::Level3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LEVEL0`"] + #[doc = "ZigBee stack capability not available"] #[inline(always)] pub fn is_level0(&self) -> bool { - *self == ZIGBEE_A::LEVEL0 + *self == Zigbee::Level0 } - #[doc = "Checks if the value of the field is `LEVEL1`"] + #[doc = "GreenPower only"] #[inline(always)] pub fn is_level1(&self) -> bool { - *self == ZIGBEE_A::LEVEL1 + *self == Zigbee::Level1 } - #[doc = "Checks if the value of the field is `LEVEL2`"] + #[doc = "ZigBee and GreenPower"] #[inline(always)] pub fn is_level2(&self) -> bool { - *self == ZIGBEE_A::LEVEL2 + *self == Zigbee::Level2 } - #[doc = "Checks if the value of the field is `LEVEL3`"] + #[doc = "ZigBee Only"] #[inline(always)] pub fn is_level3(&self) -> bool { - *self == ZIGBEE_A::LEVEL3 + *self == Zigbee::Level3 } } -#[doc = "Field `THREAD` reader - Thread Capability"] -pub type THREAD_R = crate::FieldReader; #[doc = "Thread Capability\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum THREAD_A { +pub enum Thread { #[doc = "0: RF4CE stack capability not available"] - LEVEL0 = 0, + Level0 = 0, #[doc = "1: RF4CE stack enabled"] - LEVEL1 = 1, + Level1 = 1, #[doc = "2: N/A"] - LEVEL2 = 2, + Level2 = 2, #[doc = "3: N/A"] - LEVEL3 = 3, + Level3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: THREAD_A) -> Self { + fn from(variant: Thread) -> Self { variant as _ } } -impl THREAD_R { +impl crate::FieldSpec for Thread { + type Ux = u8; +} +impl crate::IsEnum for Thread {} +#[doc = "Field `THREAD` reader - Thread Capability"] +pub type ThreadR = crate::FieldReader; +impl ThreadR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> THREAD_A { + pub const fn variant(&self) -> Thread { match self.bits { - 0 => THREAD_A::LEVEL0, - 1 => THREAD_A::LEVEL1, - 2 => THREAD_A::LEVEL2, - 3 => THREAD_A::LEVEL3, + 0 => Thread::Level0, + 1 => Thread::Level1, + 2 => Thread::Level2, + 3 => Thread::Level3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LEVEL0`"] + #[doc = "RF4CE stack capability not available"] #[inline(always)] pub fn is_level0(&self) -> bool { - *self == THREAD_A::LEVEL0 + *self == Thread::Level0 } - #[doc = "Checks if the value of the field is `LEVEL1`"] + #[doc = "RF4CE stack enabled"] #[inline(always)] pub fn is_level1(&self) -> bool { - *self == THREAD_A::LEVEL1 + *self == Thread::Level1 } - #[doc = "Checks if the value of the field is `LEVEL2`"] + #[doc = "N/A"] #[inline(always)] pub fn is_level2(&self) -> bool { - *self == THREAD_A::LEVEL2 + *self == Thread::Level2 } - #[doc = "Checks if the value of the field is `LEVEL3`"] + #[doc = "N/A"] #[inline(always)] pub fn is_level3(&self) -> bool { - *self == THREAD_A::LEVEL3 + *self == Thread::Level3 } } -#[doc = "Field `RF4CE` reader - RF4CE Capability"] -pub type RF4CE_R = crate::FieldReader; #[doc = "RF4CE Capability\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RF4CE_A { +pub enum Rf4ce { #[doc = "0: Thread stack capability not available"] - LEVEL0 = 0, + Level0 = 0, #[doc = "1: Thread stack enabled"] - LEVEL1 = 1, + Level1 = 1, #[doc = "2: N/A"] - LEVEL2 = 2, + Level2 = 2, #[doc = "3: N/A"] - LEVEL3 = 3, + Level3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RF4CE_A) -> Self { + fn from(variant: Rf4ce) -> Self { variant as _ } } -impl RF4CE_R { +impl crate::FieldSpec for Rf4ce { + type Ux = u8; +} +impl crate::IsEnum for Rf4ce {} +#[doc = "Field `RF4CE` reader - RF4CE Capability"] +pub type Rf4ceR = crate::FieldReader; +impl Rf4ceR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RF4CE_A { + pub const fn variant(&self) -> Rf4ce { match self.bits { - 0 => RF4CE_A::LEVEL0, - 1 => RF4CE_A::LEVEL1, - 2 => RF4CE_A::LEVEL2, - 3 => RF4CE_A::LEVEL3, + 0 => Rf4ce::Level0, + 1 => Rf4ce::Level1, + 2 => Rf4ce::Level2, + 3 => Rf4ce::Level3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LEVEL0`"] + #[doc = "Thread stack capability not available"] #[inline(always)] pub fn is_level0(&self) -> bool { - *self == RF4CE_A::LEVEL0 + *self == Rf4ce::Level0 } - #[doc = "Checks if the value of the field is `LEVEL1`"] + #[doc = "Thread stack enabled"] #[inline(always)] pub fn is_level1(&self) -> bool { - *self == RF4CE_A::LEVEL1 + *self == Rf4ce::Level1 } - #[doc = "Checks if the value of the field is `LEVEL2`"] + #[doc = "N/A"] #[inline(always)] pub fn is_level2(&self) -> bool { - *self == RF4CE_A::LEVEL2 + *self == Rf4ce::Level2 } - #[doc = "Checks if the value of the field is `LEVEL3`"] + #[doc = "N/A"] #[inline(always)] pub fn is_level3(&self) -> bool { - *self == RF4CE_A::LEVEL3 + *self == Rf4ce::Level3 } } -#[doc = "Field `BTSMART` reader - Bluetooth Smart Capability"] -pub type BTSMART_R = crate::FieldReader; #[doc = "Bluetooth Smart Capability\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BTSMART_A { +pub enum Btsmart { #[doc = "0: Bluetooth SMART stack capability not available"] - LEVEL0 = 0, + Level0 = 0, #[doc = "1: Bluetooth SMART enabled"] - LEVEL1 = 1, + Level1 = 1, #[doc = "2: N/A"] - LEVEL2 = 2, + Level2 = 2, #[doc = "3: N/A"] - LEVEL3 = 3, + Level3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BTSMART_A) -> Self { + fn from(variant: Btsmart) -> Self { variant as _ } } -impl BTSMART_R { +impl crate::FieldSpec for Btsmart { + type Ux = u8; +} +impl crate::IsEnum for Btsmart {} +#[doc = "Field `BTSMART` reader - Bluetooth Smart Capability"] +pub type BtsmartR = crate::FieldReader; +impl BtsmartR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> BTSMART_A { + pub const fn variant(&self) -> Btsmart { match self.bits { - 0 => BTSMART_A::LEVEL0, - 1 => BTSMART_A::LEVEL1, - 2 => BTSMART_A::LEVEL2, - 3 => BTSMART_A::LEVEL3, + 0 => Btsmart::Level0, + 1 => Btsmart::Level1, + 2 => Btsmart::Level2, + 3 => Btsmart::Level3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LEVEL0`"] + #[doc = "Bluetooth SMART stack capability not available"] #[inline(always)] pub fn is_level0(&self) -> bool { - *self == BTSMART_A::LEVEL0 + *self == Btsmart::Level0 } - #[doc = "Checks if the value of the field is `LEVEL1`"] + #[doc = "Bluetooth SMART enabled"] #[inline(always)] pub fn is_level1(&self) -> bool { - *self == BTSMART_A::LEVEL1 + *self == Btsmart::Level1 } - #[doc = "Checks if the value of the field is `LEVEL2`"] + #[doc = "N/A"] #[inline(always)] pub fn is_level2(&self) -> bool { - *self == BTSMART_A::LEVEL2 + *self == Btsmart::Level2 } - #[doc = "Checks if the value of the field is `LEVEL3`"] + #[doc = "N/A"] #[inline(always)] pub fn is_level3(&self) -> bool { - *self == BTSMART_A::LEVEL3 + *self == Btsmart::Level3 } } -#[doc = "Field `CONNECT` reader - Connect Capability"] -pub type CONNECT_R = crate::FieldReader; #[doc = "Connect Capability\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CONNECT_A { +pub enum Connect { #[doc = "0: Connect stack capability not available"] - LEVEL0 = 0, + Level0 = 0, #[doc = "1: Connect enabled"] - LEVEL1 = 1, + Level1 = 1, #[doc = "2: N/A"] - LEVEL2 = 2, + Level2 = 2, #[doc = "3: N/A"] - LEVEL3 = 3, + Level3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CONNECT_A) -> Self { + fn from(variant: Connect) -> Self { variant as _ } } -impl CONNECT_R { +impl crate::FieldSpec for Connect { + type Ux = u8; +} +impl crate::IsEnum for Connect {} +#[doc = "Field `CONNECT` reader - Connect Capability"] +pub type ConnectR = crate::FieldReader; +impl ConnectR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CONNECT_A { + pub const fn variant(&self) -> Connect { match self.bits { - 0 => CONNECT_A::LEVEL0, - 1 => CONNECT_A::LEVEL1, - 2 => CONNECT_A::LEVEL2, - 3 => CONNECT_A::LEVEL3, + 0 => Connect::Level0, + 1 => Connect::Level1, + 2 => Connect::Level2, + 3 => Connect::Level3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LEVEL0`"] + #[doc = "Connect stack capability not available"] #[inline(always)] pub fn is_level0(&self) -> bool { - *self == CONNECT_A::LEVEL0 + *self == Connect::Level0 } - #[doc = "Checks if the value of the field is `LEVEL1`"] + #[doc = "Connect enabled"] #[inline(always)] pub fn is_level1(&self) -> bool { - *self == CONNECT_A::LEVEL1 + *self == Connect::Level1 } - #[doc = "Checks if the value of the field is `LEVEL2`"] + #[doc = "N/A"] #[inline(always)] pub fn is_level2(&self) -> bool { - *self == CONNECT_A::LEVEL2 + *self == Connect::Level2 } - #[doc = "Checks if the value of the field is `LEVEL3`"] + #[doc = "N/A"] #[inline(always)] pub fn is_level3(&self) -> bool { - *self == CONNECT_A::LEVEL3 + *self == Connect::Level3 } } -#[doc = "Field `SRI` reader - RAIL Capability"] -pub type SRI_R = crate::FieldReader; #[doc = "RAIL Capability\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SRI_A { +pub enum Sri { #[doc = "0: RAIL capability not available"] - LEVEL0 = 0, + Level0 = 0, #[doc = "1: RAIL enabled"] - LEVEL1 = 1, + Level1 = 1, #[doc = "2: N/A"] - LEVEL2 = 2, + Level2 = 2, #[doc = "3: N/A"] - LEVEL3 = 3, + Level3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SRI_A) -> Self { + fn from(variant: Sri) -> Self { variant as _ } } -impl SRI_R { +impl crate::FieldSpec for Sri { + type Ux = u8; +} +impl crate::IsEnum for Sri {} +#[doc = "Field `SRI` reader - RAIL Capability"] +pub type SriR = crate::FieldReader; +impl SriR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRI_A { + pub const fn variant(&self) -> Sri { match self.bits { - 0 => SRI_A::LEVEL0, - 1 => SRI_A::LEVEL1, - 2 => SRI_A::LEVEL2, - 3 => SRI_A::LEVEL3, + 0 => Sri::Level0, + 1 => Sri::Level1, + 2 => Sri::Level2, + 3 => Sri::Level3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LEVEL0`"] + #[doc = "RAIL capability not available"] #[inline(always)] pub fn is_level0(&self) -> bool { - *self == SRI_A::LEVEL0 + *self == Sri::Level0 } - #[doc = "Checks if the value of the field is `LEVEL1`"] + #[doc = "RAIL enabled"] #[inline(always)] pub fn is_level1(&self) -> bool { - *self == SRI_A::LEVEL1 + *self == Sri::Level1 } - #[doc = "Checks if the value of the field is `LEVEL2`"] + #[doc = "N/A"] #[inline(always)] pub fn is_level2(&self) -> bool { - *self == SRI_A::LEVEL2 + *self == Sri::Level2 } - #[doc = "Checks if the value of the field is `LEVEL3`"] + #[doc = "N/A"] #[inline(always)] pub fn is_level3(&self) -> bool { - *self == SRI_A::LEVEL3 + *self == Sri::Level3 } } -#[doc = "Field `ZWAVE` reader - Z-Wave Capability"] -pub type ZWAVE_R = crate::FieldReader; #[doc = "Z-Wave Capability\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ZWAVE_A { +pub enum Zwave { #[doc = "0: Z-Wave stack capability not available"] - LEVEL0 = 0, + Level0 = 0, #[doc = "1: Z-Wave Gateway"] - LEVEL1 = 1, + Level1 = 1, #[doc = "2: Z-Wave End Device"] - LEVEL2 = 2, + Level2 = 2, #[doc = "3: Z-Wave Sensor"] - LEVEL3 = 3, + Level3 = 3, #[doc = "4: Z-Wave Lighting"] - LEVEL4 = 4, + Level4 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ZWAVE_A) -> Self { + fn from(variant: Zwave) -> Self { variant as _ } } -impl ZWAVE_R { +impl crate::FieldSpec for Zwave { + type Ux = u8; +} +impl crate::IsEnum for Zwave {} +#[doc = "Field `ZWAVE` reader - Z-Wave Capability"] +pub type ZwaveR = crate::FieldReader; +impl ZwaveR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ZWAVE_A::LEVEL0), - 1 => Some(ZWAVE_A::LEVEL1), - 2 => Some(ZWAVE_A::LEVEL2), - 3 => Some(ZWAVE_A::LEVEL3), - 4 => Some(ZWAVE_A::LEVEL4), + 0 => Some(Zwave::Level0), + 1 => Some(Zwave::Level1), + 2 => Some(Zwave::Level2), + 3 => Some(Zwave::Level3), + 4 => Some(Zwave::Level4), _ => None, } } - #[doc = "Checks if the value of the field is `LEVEL0`"] + #[doc = "Z-Wave stack capability not available"] #[inline(always)] pub fn is_level0(&self) -> bool { - *self == ZWAVE_A::LEVEL0 + *self == Zwave::Level0 } - #[doc = "Checks if the value of the field is `LEVEL1`"] + #[doc = "Z-Wave Gateway"] #[inline(always)] pub fn is_level1(&self) -> bool { - *self == ZWAVE_A::LEVEL1 + *self == Zwave::Level1 } - #[doc = "Checks if the value of the field is `LEVEL2`"] + #[doc = "Z-Wave End Device"] #[inline(always)] pub fn is_level2(&self) -> bool { - *self == ZWAVE_A::LEVEL2 + *self == Zwave::Level2 } - #[doc = "Checks if the value of the field is `LEVEL3`"] + #[doc = "Z-Wave Sensor"] #[inline(always)] pub fn is_level3(&self) -> bool { - *self == ZWAVE_A::LEVEL3 + *self == Zwave::Level3 } - #[doc = "Checks if the value of the field is `LEVEL4`"] + #[doc = "Z-Wave Lighting"] #[inline(always)] pub fn is_level4(&self) -> bool { - *self == ZWAVE_A::LEVEL4 + *self == Zwave::Level4 } } impl R { #[doc = "Bits 0:1 - Zigbee Capability"] #[inline(always)] - pub fn zigbee(&self) -> ZIGBEE_R { - ZIGBEE_R::new((self.bits & 3) as u8) + pub fn zigbee(&self) -> ZigbeeR { + ZigbeeR::new((self.bits & 3) as u8) } #[doc = "Bits 4:5 - Thread Capability"] #[inline(always)] - pub fn thread(&self) -> THREAD_R { - THREAD_R::new(((self.bits >> 4) & 3) as u8) + pub fn thread(&self) -> ThreadR { + ThreadR::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 8:9 - RF4CE Capability"] #[inline(always)] - pub fn rf4ce(&self) -> RF4CE_R { - RF4CE_R::new(((self.bits >> 8) & 3) as u8) + pub fn rf4ce(&self) -> Rf4ceR { + Rf4ceR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 12:13 - Bluetooth Smart Capability"] #[inline(always)] - pub fn btsmart(&self) -> BTSMART_R { - BTSMART_R::new(((self.bits >> 12) & 3) as u8) + pub fn btsmart(&self) -> BtsmartR { + BtsmartR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 16:17 - Connect Capability"] #[inline(always)] - pub fn connect(&self) -> CONNECT_R { - CONNECT_R::new(((self.bits >> 16) & 3) as u8) + pub fn connect(&self) -> ConnectR { + ConnectR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 20:21 - RAIL Capability"] #[inline(always)] - pub fn sri(&self) -> SRI_R { - SRI_R::new(((self.bits >> 20) & 3) as u8) + pub fn sri(&self) -> SriR { + SriR::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 24:26 - Z-Wave Capability"] #[inline(always)] - pub fn zwave(&self) -> ZWAVE_R { - ZWAVE_R::new(((self.bits >> 24) & 7) as u8) + pub fn zwave(&self) -> ZwaveR { + ZwaveR::new(((self.bits >> 24) & 7) as u8) } } -#[doc = "Software Capability Vector 0\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swcapa0](index.html) module"] -pub struct SWCAPA0_SPEC; -impl crate::RegisterSpec for SWCAPA0_SPEC { +#[doc = "Software Capability Vector 0\n\nYou can [`read`](crate::Reg::read) this register and get [`swcapa0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Swcapa0Spec; +impl crate::RegisterSpec for Swcapa0Spec { type Ux = u32; } -#[doc = "`read()` method returns [swcapa0::R](R) reader structure"] -impl crate::Readable for SWCAPA0_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`swcapa0::R`](R) reader structure"] +impl crate::Readable for Swcapa0Spec {} #[doc = "`reset()` method sets SWCAPA0 to value 0"] -impl crate::Resettable for SWCAPA0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Swcapa0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/swcapa1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/swcapa1.rs index f3f733e..d4822b1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/swcapa1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/swcapa1.rs @@ -1,58 +1,43 @@ #[doc = "Register `SWCAPA1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RFMCUEN` reader - RF-MCU"] -pub type RFMCUEN_R = crate::BitReader; +pub type RfmcuenR = crate::BitReader; #[doc = "Field `NCPEN` reader - NCP"] -pub type NCPEN_R = crate::BitReader; +pub type NcpenR = crate::BitReader; #[doc = "Field `GWEN` reader - Gateway"] -pub type GWEN_R = crate::BitReader; +pub type GwenR = crate::BitReader; #[doc = "Field `XOUT` reader - XOUT"] -pub type XOUT_R = crate::BitReader; +pub type XoutR = crate::BitReader; impl R { #[doc = "Bit 0 - RF-MCU"] #[inline(always)] - pub fn rfmcuen(&self) -> RFMCUEN_R { - RFMCUEN_R::new((self.bits & 1) != 0) + pub fn rfmcuen(&self) -> RfmcuenR { + RfmcuenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - NCP"] #[inline(always)] - pub fn ncpen(&self) -> NCPEN_R { - NCPEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn ncpen(&self) -> NcpenR { + NcpenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Gateway"] #[inline(always)] - pub fn gwen(&self) -> GWEN_R { - GWEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn gwen(&self) -> GwenR { + GwenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - XOUT"] #[inline(always)] - pub fn xout(&self) -> XOUT_R { - XOUT_R::new(((self.bits >> 3) & 1) != 0) + pub fn xout(&self) -> XoutR { + XoutR::new(((self.bits >> 3) & 1) != 0) } } -#[doc = "Software Capability Vector 1\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swcapa1](index.html) module"] -pub struct SWCAPA1_SPEC; -impl crate::RegisterSpec for SWCAPA1_SPEC { +#[doc = "Software Capability Vector 1\n\nYou can [`read`](crate::Reg::read) this register and get [`swcapa1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Swcapa1Spec; +impl crate::RegisterSpec for Swcapa1Spec { type Ux = u32; } -#[doc = "`read()` method returns [swcapa1::R](R) reader structure"] -impl crate::Readable for SWCAPA1_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`swcapa1::R`](R) reader structure"] +impl crate::Readable for Swcapa1Spec {} #[doc = "`reset()` method sets SWCAPA1 to value 0"] -impl crate::Resettable for SWCAPA1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Swcapa1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/swfix.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/swfix.rs index b0ac6fb..8749454 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/swfix.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/devinfo/swfix.rs @@ -1,37 +1,22 @@ #[doc = "Register `SWFIX` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RSV` reader - Reserved"] -pub type RSV_R = crate::FieldReader; +pub type RsvR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Reserved"] #[inline(always)] - pub fn rsv(&self) -> RSV_R { - RSV_R::new(self.bits) + pub fn rsv(&self) -> RsvR { + RsvR::new(self.bits) } } -#[doc = "Used to track s/w workaround info\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swfix](index.html) module"] -pub struct SWFIX_SPEC; -impl crate::RegisterSpec for SWFIX_SPEC { +#[doc = "Used to track s/w workaround info\n\nYou can [`read`](crate::Reg::read) this register and get [`swfix::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SwfixSpec; +impl crate::RegisterSpec for SwfixSpec { type Ux = u32; } -#[doc = "`read()` method returns [swfix::R](R) reader structure"] -impl crate::Readable for SWFIX_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`swfix::R`](R) reader structure"] +impl crate::Readable for SwfixSpec {} #[doc = "`reset()` method sets SWFIX to value 0xffff_ffff"] -impl crate::Resettable for SWFIX_SPEC { - const RESET_VALUE: Self::Ux = 0xffff_ffff; +impl crate::Resettable for SwfixSpec { + const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns.rs index e541421..3450a2b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns.rs @@ -1,53 +1,103 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + cmd: Cmd, + ctrl: Ctrl, + eccerraddr0: Eccerraddr0, + eccerraddr1: Eccerraddr1, + _reserved5: [u8; 0x08], + eccmerrind: Eccmerrind, + if_: If, + ien: Ien, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x08 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x0c - No Description"] - pub eccerraddr0: ECCERRADDR0, + #[inline(always)] + pub const fn eccerraddr0(&self) -> &Eccerraddr0 { + &self.eccerraddr0 + } #[doc = "0x10 - No Description"] - pub eccerraddr1: ECCERRADDR1, - _reserved5: [u8; 0x08], + #[inline(always)] + pub const fn eccerraddr1(&self) -> &Eccerraddr1 { + &self.eccerraddr1 + } #[doc = "0x1c - No Description"] - pub eccmerrind: ECCMERRIND, + #[inline(always)] + pub const fn eccmerrind(&self) -> &Eccmerrind { + &self.eccmerrind + } #[doc = "0x20 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x24 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "ECCERRADDR0 (r) register accessor: an alias for `Reg`"] -pub type ECCERRADDR0 = crate::Reg; +#[doc = "ECCERRADDR0 (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`eccerraddr0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eccerraddr0`] +module"] +#[doc(alias = "ECCERRADDR0")] +pub type Eccerraddr0 = crate::Reg; #[doc = "No Description"] pub mod eccerraddr0; -#[doc = "ECCERRADDR1 (r) register accessor: an alias for `Reg`"] -pub type ECCERRADDR1 = crate::Reg; +#[doc = "ECCERRADDR1 (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`eccerraddr1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eccerraddr1`] +module"] +#[doc(alias = "ECCERRADDR1")] +pub type Eccerraddr1 = crate::Reg; #[doc = "No Description"] pub mod eccerraddr1; -#[doc = "ECCMERRIND (r) register accessor: an alias for `Reg`"] -pub type ECCMERRIND = crate::Reg; +#[doc = "ECCMERRIND (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`eccmerrind::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eccmerrind`] +module"] +#[doc(alias = "ECCMERRIND")] +pub type Eccmerrind = crate::Reg; #[doc = "No Description"] pub mod eccmerrind; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/cmd.rs index 3b5ad21..fceff7d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/cmd.rs @@ -1,60 +1,35 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CLEARECCADDR0` writer - Clear ECCERRADDR0"] -pub type CLEARECCADDR0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type Cleareccaddr0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEARECCADDR1` writer - Clear ECCERRADDR1"] -pub type CLEARECCADDR1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type Cleareccaddr1W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Clear ECCERRADDR0"] #[inline(always)] #[must_use] - pub fn cleareccaddr0(&mut self) -> CLEARECCADDR0_W<0> { - CLEARECCADDR0_W::new(self) + pub fn cleareccaddr0(&mut self) -> Cleareccaddr0W { + Cleareccaddr0W::new(self, 0) } #[doc = "Bit 1 - Clear ECCERRADDR1"] #[inline(always)] #[must_use] - pub fn cleareccaddr1(&mut self) -> CLEARECCADDR1_W<1> { - CLEARECCADDR1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cleareccaddr1(&mut self) -> Cleareccaddr1W { + Cleareccaddr1W::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/ctrl.rs index 3ae0d70..0a27b41 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/ctrl.rs @@ -1,202 +1,169 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ECCEN` reader - Enable ECC functionality"] -pub type ECCEN_R = crate::BitReader; +pub type EccenR = crate::BitReader; #[doc = "Field `ECCEN` writer - Enable ECC functionality"] -pub type ECCEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type EccenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ECCWEN` reader - Enable ECC syndrome writes"] -pub type ECCWEN_R = crate::BitReader; +pub type EccwenR = crate::BitReader; #[doc = "Field `ECCWEN` writer - Enable ECC syndrome writes"] -pub type ECCWEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type EccwenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ECCERRFAULTEN` reader - ECC Error bus fault enable"] -pub type ECCERRFAULTEN_R = crate::BitReader; +pub type EccerrfaultenR = crate::BitReader; #[doc = "Field `ECCERRFAULTEN` writer - ECC Error bus fault enable"] -pub type ECCERRFAULTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; -#[doc = "Field `AHBPORTPRIORITY` reader - AHB port arbitration priority"] -pub type AHBPORTPRIORITY_R = crate::FieldReader; +pub type EccerrfaultenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "AHB port arbitration priority\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum AHBPORTPRIORITY_A { +pub enum Ahbportpriority { #[doc = "0: No AHB port have raised priority."] - NONE = 0, + None = 0, #[doc = "1: AHB port 0 has raised priority."] - PORT0 = 1, + Port0 = 1, #[doc = "2: AHB port 1 has raised priority."] - PORT1 = 2, + Port1 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: AHBPORTPRIORITY_A) -> Self { + fn from(variant: Ahbportpriority) -> Self { variant as _ } } -impl AHBPORTPRIORITY_R { +impl crate::FieldSpec for Ahbportpriority { + type Ux = u8; +} +impl crate::IsEnum for Ahbportpriority {} +#[doc = "Field `AHBPORTPRIORITY` reader - AHB port arbitration priority"] +pub type AhbportpriorityR = crate::FieldReader; +impl AhbportpriorityR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(AHBPORTPRIORITY_A::NONE), - 1 => Some(AHBPORTPRIORITY_A::PORT0), - 2 => Some(AHBPORTPRIORITY_A::PORT1), + 0 => Some(Ahbportpriority::None), + 1 => Some(Ahbportpriority::Port0), + 2 => Some(Ahbportpriority::Port1), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No AHB port have raised priority."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == AHBPORTPRIORITY_A::NONE + *self == Ahbportpriority::None } - #[doc = "Checks if the value of the field is `PORT0`"] + #[doc = "AHB port 0 has raised priority."] #[inline(always)] pub fn is_port0(&self) -> bool { - *self == AHBPORTPRIORITY_A::PORT0 + *self == Ahbportpriority::Port0 } - #[doc = "Checks if the value of the field is `PORT1`"] + #[doc = "AHB port 1 has raised priority."] #[inline(always)] pub fn is_port1(&self) -> bool { - *self == AHBPORTPRIORITY_A::PORT1 + *self == Ahbportpriority::Port1 } } #[doc = "Field `AHBPORTPRIORITY` writer - AHB port arbitration priority"] -pub type AHBPORTPRIORITY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CTRL_SPEC, u8, AHBPORTPRIORITY_A, 3, O>; -impl<'a, const O: u8> AHBPORTPRIORITY_W<'a, O> { +pub type AhbportpriorityW<'a, REG> = crate::FieldWriter<'a, REG, 3, Ahbportpriority>; +impl<'a, REG> AhbportpriorityW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No AHB port have raised priority."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(AHBPORTPRIORITY_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Ahbportpriority::None) } #[doc = "AHB port 0 has raised priority."] #[inline(always)] - pub fn port0(self) -> &'a mut W { - self.variant(AHBPORTPRIORITY_A::PORT0) + pub fn port0(self) -> &'a mut crate::W { + self.variant(Ahbportpriority::Port0) } #[doc = "AHB port 1 has raised priority."] #[inline(always)] - pub fn port1(self) -> &'a mut W { - self.variant(AHBPORTPRIORITY_A::PORT1) + pub fn port1(self) -> &'a mut crate::W { + self.variant(Ahbportpriority::Port1) } } #[doc = "Field `ADDRFAULTEN` reader - Address fault bus fault enable"] -pub type ADDRFAULTEN_R = crate::BitReader; +pub type AddrfaultenR = crate::BitReader; #[doc = "Field `ADDRFAULTEN` writer - Address fault bus fault enable"] -pub type ADDRFAULTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type AddrfaultenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Enable ECC functionality"] #[inline(always)] - pub fn eccen(&self) -> ECCEN_R { - ECCEN_R::new((self.bits & 1) != 0) + pub fn eccen(&self) -> EccenR { + EccenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Enable ECC syndrome writes"] #[inline(always)] - pub fn eccwen(&self) -> ECCWEN_R { - ECCWEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn eccwen(&self) -> EccwenR { + EccwenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - ECC Error bus fault enable"] #[inline(always)] - pub fn eccerrfaulten(&self) -> ECCERRFAULTEN_R { - ECCERRFAULTEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn eccerrfaulten(&self) -> EccerrfaultenR { + EccerrfaultenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 3:5 - AHB port arbitration priority"] #[inline(always)] - pub fn ahbportpriority(&self) -> AHBPORTPRIORITY_R { - AHBPORTPRIORITY_R::new(((self.bits >> 3) & 7) as u8) + pub fn ahbportpriority(&self) -> AhbportpriorityR { + AhbportpriorityR::new(((self.bits >> 3) & 7) as u8) } #[doc = "Bit 6 - Address fault bus fault enable"] #[inline(always)] - pub fn addrfaulten(&self) -> ADDRFAULTEN_R { - ADDRFAULTEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn addrfaulten(&self) -> AddrfaultenR { + AddrfaultenR::new(((self.bits >> 6) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable ECC functionality"] #[inline(always)] #[must_use] - pub fn eccen(&mut self) -> ECCEN_W<0> { - ECCEN_W::new(self) + pub fn eccen(&mut self) -> EccenW { + EccenW::new(self, 0) } #[doc = "Bit 1 - Enable ECC syndrome writes"] #[inline(always)] #[must_use] - pub fn eccwen(&mut self) -> ECCWEN_W<1> { - ECCWEN_W::new(self) + pub fn eccwen(&mut self) -> EccwenW { + EccwenW::new(self, 1) } #[doc = "Bit 2 - ECC Error bus fault enable"] #[inline(always)] #[must_use] - pub fn eccerrfaulten(&mut self) -> ECCERRFAULTEN_W<2> { - ECCERRFAULTEN_W::new(self) + pub fn eccerrfaulten(&mut self) -> EccerrfaultenW { + EccerrfaultenW::new(self, 2) } #[doc = "Bits 3:5 - AHB port arbitration priority"] #[inline(always)] #[must_use] - pub fn ahbportpriority(&mut self) -> AHBPORTPRIORITY_W<3> { - AHBPORTPRIORITY_W::new(self) + pub fn ahbportpriority(&mut self) -> AhbportpriorityW { + AhbportpriorityW::new(self, 3) } #[doc = "Bit 6 - Address fault bus fault enable"] #[inline(always)] #[must_use] - pub fn addrfaulten(&mut self) -> ADDRFAULTEN_W<6> { - ADDRFAULTEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn addrfaulten(&mut self) -> AddrfaultenW { + AddrfaultenW::new(self, 6) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0x40"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x40; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0x40; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/eccerraddr0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/eccerraddr0.rs index 1962046..3d69096 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/eccerraddr0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/eccerraddr0.rs @@ -1,37 +1,22 @@ #[doc = "Register `ECCERRADDR0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ADDR` reader - ECC Error Address"] -pub type ADDR_R = crate::FieldReader; +pub type AddrR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - ECC Error Address"] #[inline(always)] - pub fn addr(&self) -> ADDR_R { - ADDR_R::new(self.bits) + pub fn addr(&self) -> AddrR { + AddrR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eccerraddr0](index.html) module"] -pub struct ECCERRADDR0_SPEC; -impl crate::RegisterSpec for ECCERRADDR0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`eccerraddr0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eccerraddr0Spec; +impl crate::RegisterSpec for Eccerraddr0Spec { type Ux = u32; } -#[doc = "`read()` method returns [eccerraddr0::R](R) reader structure"] -impl crate::Readable for ECCERRADDR0_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`eccerraddr0::R`](R) reader structure"] +impl crate::Readable for Eccerraddr0Spec {} #[doc = "`reset()` method sets ECCERRADDR0 to value 0"] -impl crate::Resettable for ECCERRADDR0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eccerraddr0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/eccerraddr1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/eccerraddr1.rs index a1d6d68..d607d6a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/eccerraddr1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/eccerraddr1.rs @@ -1,37 +1,22 @@ #[doc = "Register `ECCERRADDR1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ADDR` reader - ECC Error Address"] -pub type ADDR_R = crate::FieldReader; +pub type AddrR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - ECC Error Address"] #[inline(always)] - pub fn addr(&self) -> ADDR_R { - ADDR_R::new(self.bits) + pub fn addr(&self) -> AddrR { + AddrR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eccerraddr1](index.html) module"] -pub struct ECCERRADDR1_SPEC; -impl crate::RegisterSpec for ECCERRADDR1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`eccerraddr1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eccerraddr1Spec; +impl crate::RegisterSpec for Eccerraddr1Spec { type Ux = u32; } -#[doc = "`read()` method returns [eccerraddr1::R](R) reader structure"] -impl crate::Readable for ECCERRADDR1_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`eccerraddr1::R`](R) reader structure"] +impl crate::Readable for Eccerraddr1Spec {} #[doc = "`reset()` method sets ECCERRADDR1 to value 0"] -impl crate::Resettable for ECCERRADDR1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eccerraddr1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/eccmerrind.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/eccmerrind.rs index 36d9630..4cf8937 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/eccmerrind.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/eccmerrind.rs @@ -1,44 +1,29 @@ #[doc = "Register `ECCMERRIND` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `P0` reader - Multiple ECC errors on AHB port 0"] -pub type P0_R = crate::BitReader; +pub type P0R = crate::BitReader; #[doc = "Field `P1` reader - Multiple ECC errors on AHB port 1"] -pub type P1_R = crate::BitReader; +pub type P1R = crate::BitReader; impl R { #[doc = "Bit 0 - Multiple ECC errors on AHB port 0"] #[inline(always)] - pub fn p0(&self) -> P0_R { - P0_R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0R { + P0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Multiple ECC errors on AHB port 1"] #[inline(always)] - pub fn p1(&self) -> P1_R { - P1_R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1R { + P1R::new(((self.bits >> 1) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eccmerrind](index.html) module"] -pub struct ECCMERRIND_SPEC; -impl crate::RegisterSpec for ECCMERRIND_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`eccmerrind::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EccmerrindSpec; +impl crate::RegisterSpec for EccmerrindSpec { type Ux = u32; } -#[doc = "`read()` method returns [eccmerrind::R](R) reader structure"] -impl crate::Readable for ECCMERRIND_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`eccmerrind::R`](R) reader structure"] +impl crate::Readable for EccmerrindSpec {} #[doc = "`reset()` method sets ECCMERRIND to value 0"] -impl crate::Resettable for ECCMERRIND_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EccmerrindSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/ien.rs index ac2be2e..cbbdc68 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/ien.rs @@ -1,125 +1,85 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `AHB0ERR1B` reader - AHB0 1-bit ECC Error Interrupt Enable"] -pub type AHB0ERR1B_R = crate::BitReader; +pub type Ahb0err1bR = crate::BitReader; #[doc = "Field `AHB0ERR1B` writer - AHB0 1-bit ECC Error Interrupt Enable"] -pub type AHB0ERR1B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Ahb0err1bW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHB1ERR1B` reader - AHB1 1-bit ECC Error Interrupt Enable"] -pub type AHB1ERR1B_R = crate::BitReader; +pub type Ahb1err1bR = crate::BitReader; #[doc = "Field `AHB1ERR1B` writer - AHB1 1-bit ECC Error Interrupt Enable"] -pub type AHB1ERR1B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Ahb1err1bW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHB0ERR2B` reader - AHB0 2-bit ECC Error Interrupt Enable"] -pub type AHB0ERR2B_R = crate::BitReader; +pub type Ahb0err2bR = crate::BitReader; #[doc = "Field `AHB0ERR2B` writer - AHB0 2-bit ECC Error Interrupt Enable"] -pub type AHB0ERR2B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Ahb0err2bW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHB1ERR2B` reader - AHB1 2-bit ECC Error Interrupt Enable"] -pub type AHB1ERR2B_R = crate::BitReader; +pub type Ahb1err2bR = crate::BitReader; #[doc = "Field `AHB1ERR2B` writer - AHB1 2-bit ECC Error Interrupt Enable"] -pub type AHB1ERR2B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Ahb1err2bW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - AHB0 1-bit ECC Error Interrupt Enable"] #[inline(always)] - pub fn ahb0err1b(&self) -> AHB0ERR1B_R { - AHB0ERR1B_R::new((self.bits & 1) != 0) + pub fn ahb0err1b(&self) -> Ahb0err1bR { + Ahb0err1bR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - AHB1 1-bit ECC Error Interrupt Enable"] #[inline(always)] - pub fn ahb1err1b(&self) -> AHB1ERR1B_R { - AHB1ERR1B_R::new(((self.bits >> 1) & 1) != 0) + pub fn ahb1err1b(&self) -> Ahb1err1bR { + Ahb1err1bR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 4 - AHB0 2-bit ECC Error Interrupt Enable"] #[inline(always)] - pub fn ahb0err2b(&self) -> AHB0ERR2B_R { - AHB0ERR2B_R::new(((self.bits >> 4) & 1) != 0) + pub fn ahb0err2b(&self) -> Ahb0err2bR { + Ahb0err2bR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - AHB1 2-bit ECC Error Interrupt Enable"] #[inline(always)] - pub fn ahb1err2b(&self) -> AHB1ERR2B_R { - AHB1ERR2B_R::new(((self.bits >> 5) & 1) != 0) + pub fn ahb1err2b(&self) -> Ahb1err2bR { + Ahb1err2bR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - AHB0 1-bit ECC Error Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ahb0err1b(&mut self) -> AHB0ERR1B_W<0> { - AHB0ERR1B_W::new(self) + pub fn ahb0err1b(&mut self) -> Ahb0err1bW { + Ahb0err1bW::new(self, 0) } #[doc = "Bit 1 - AHB1 1-bit ECC Error Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ahb1err1b(&mut self) -> AHB1ERR1B_W<1> { - AHB1ERR1B_W::new(self) + pub fn ahb1err1b(&mut self) -> Ahb1err1bW { + Ahb1err1bW::new(self, 1) } #[doc = "Bit 4 - AHB0 2-bit ECC Error Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ahb0err2b(&mut self) -> AHB0ERR2B_W<4> { - AHB0ERR2B_W::new(self) + pub fn ahb0err2b(&mut self) -> Ahb0err2bW { + Ahb0err2bW::new(self, 4) } #[doc = "Bit 5 - AHB1 2-bit ECC Error Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ahb1err2b(&mut self) -> AHB1ERR2B_W<5> { - AHB1ERR2B_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ahb1err2b(&mut self) -> Ahb1err2bW { + Ahb1err2bW::new(self, 5) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/if_.rs index 600863e..a39f06e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/if_.rs @@ -1,125 +1,85 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `AHB0ERR1B` reader - AHB0 1-bit ECC Error Interrupt Flag"] -pub type AHB0ERR1B_R = crate::BitReader; +pub type Ahb0err1bR = crate::BitReader; #[doc = "Field `AHB0ERR1B` writer - AHB0 1-bit ECC Error Interrupt Flag"] -pub type AHB0ERR1B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Ahb0err1bW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHB1ERR1B` reader - AHB1 1-bit ECC Error Interrupt Flag"] -pub type AHB1ERR1B_R = crate::BitReader; +pub type Ahb1err1bR = crate::BitReader; #[doc = "Field `AHB1ERR1B` writer - AHB1 1-bit ECC Error Interrupt Flag"] -pub type AHB1ERR1B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Ahb1err1bW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHB0ERR2B` reader - AHB0 2-bit ECC Error Interrupt Flag"] -pub type AHB0ERR2B_R = crate::BitReader; +pub type Ahb0err2bR = crate::BitReader; #[doc = "Field `AHB0ERR2B` writer - AHB0 2-bit ECC Error Interrupt Flag"] -pub type AHB0ERR2B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Ahb0err2bW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHB1ERR2B` reader - AHB1 2-bit ECC Error Interrupt Flag"] -pub type AHB1ERR2B_R = crate::BitReader; +pub type Ahb1err2bR = crate::BitReader; #[doc = "Field `AHB1ERR2B` writer - AHB1 2-bit ECC Error Interrupt Flag"] -pub type AHB1ERR2B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Ahb1err2bW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - AHB0 1-bit ECC Error Interrupt Flag"] #[inline(always)] - pub fn ahb0err1b(&self) -> AHB0ERR1B_R { - AHB0ERR1B_R::new((self.bits & 1) != 0) + pub fn ahb0err1b(&self) -> Ahb0err1bR { + Ahb0err1bR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - AHB1 1-bit ECC Error Interrupt Flag"] #[inline(always)] - pub fn ahb1err1b(&self) -> AHB1ERR1B_R { - AHB1ERR1B_R::new(((self.bits >> 1) & 1) != 0) + pub fn ahb1err1b(&self) -> Ahb1err1bR { + Ahb1err1bR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 4 - AHB0 2-bit ECC Error Interrupt Flag"] #[inline(always)] - pub fn ahb0err2b(&self) -> AHB0ERR2B_R { - AHB0ERR2B_R::new(((self.bits >> 4) & 1) != 0) + pub fn ahb0err2b(&self) -> Ahb0err2bR { + Ahb0err2bR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - AHB1 2-bit ECC Error Interrupt Flag"] #[inline(always)] - pub fn ahb1err2b(&self) -> AHB1ERR2B_R { - AHB1ERR2B_R::new(((self.bits >> 5) & 1) != 0) + pub fn ahb1err2b(&self) -> Ahb1err2bR { + Ahb1err2bR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - AHB0 1-bit ECC Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ahb0err1b(&mut self) -> AHB0ERR1B_W<0> { - AHB0ERR1B_W::new(self) + pub fn ahb0err1b(&mut self) -> Ahb0err1bW { + Ahb0err1bW::new(self, 0) } #[doc = "Bit 1 - AHB1 1-bit ECC Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ahb1err1b(&mut self) -> AHB1ERR1B_W<1> { - AHB1ERR1B_W::new(self) + pub fn ahb1err1b(&mut self) -> Ahb1err1bW { + Ahb1err1bW::new(self, 1) } #[doc = "Bit 4 - AHB0 2-bit ECC Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ahb0err2b(&mut self) -> AHB0ERR2B_W<4> { - AHB0ERR2B_W::new(self) + pub fn ahb0err2b(&mut self) -> Ahb0err2bW { + Ahb0err2bW::new(self, 4) } #[doc = "Bit 5 - AHB1 2-bit ECC Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ahb1err2b(&mut self) -> AHB1ERR2B_W<5> { - AHB1ERR2B_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ahb1err2b(&mut self) -> Ahb1err2bW { + Ahb1err2bW::new(self, 5) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/ipversion.rs index e472c59..62298ff 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - New BitField"] -pub type IPVERSION_R = crate::BitReader; +pub type IpversionR = crate::BitReader; impl R { #[doc = "Bit 0 - New BitField"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new((self.bits & 1) != 0) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new((self.bits & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s.rs index e541421..3450a2b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s.rs @@ -1,53 +1,103 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + cmd: Cmd, + ctrl: Ctrl, + eccerraddr0: Eccerraddr0, + eccerraddr1: Eccerraddr1, + _reserved5: [u8; 0x08], + eccmerrind: Eccmerrind, + if_: If, + ien: Ien, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x08 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x0c - No Description"] - pub eccerraddr0: ECCERRADDR0, + #[inline(always)] + pub const fn eccerraddr0(&self) -> &Eccerraddr0 { + &self.eccerraddr0 + } #[doc = "0x10 - No Description"] - pub eccerraddr1: ECCERRADDR1, - _reserved5: [u8; 0x08], + #[inline(always)] + pub const fn eccerraddr1(&self) -> &Eccerraddr1 { + &self.eccerraddr1 + } #[doc = "0x1c - No Description"] - pub eccmerrind: ECCMERRIND, + #[inline(always)] + pub const fn eccmerrind(&self) -> &Eccmerrind { + &self.eccmerrind + } #[doc = "0x20 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x24 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "ECCERRADDR0 (r) register accessor: an alias for `Reg`"] -pub type ECCERRADDR0 = crate::Reg; +#[doc = "ECCERRADDR0 (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`eccerraddr0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eccerraddr0`] +module"] +#[doc(alias = "ECCERRADDR0")] +pub type Eccerraddr0 = crate::Reg; #[doc = "No Description"] pub mod eccerraddr0; -#[doc = "ECCERRADDR1 (r) register accessor: an alias for `Reg`"] -pub type ECCERRADDR1 = crate::Reg; +#[doc = "ECCERRADDR1 (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`eccerraddr1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eccerraddr1`] +module"] +#[doc(alias = "ECCERRADDR1")] +pub type Eccerraddr1 = crate::Reg; #[doc = "No Description"] pub mod eccerraddr1; -#[doc = "ECCMERRIND (r) register accessor: an alias for `Reg`"] -pub type ECCMERRIND = crate::Reg; +#[doc = "ECCMERRIND (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`eccmerrind::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eccmerrind`] +module"] +#[doc(alias = "ECCMERRIND")] +pub type Eccmerrind = crate::Reg; #[doc = "No Description"] pub mod eccmerrind; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/cmd.rs index 3b5ad21..fceff7d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/cmd.rs @@ -1,60 +1,35 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CLEARECCADDR0` writer - Clear ECCERRADDR0"] -pub type CLEARECCADDR0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type Cleareccaddr0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEARECCADDR1` writer - Clear ECCERRADDR1"] -pub type CLEARECCADDR1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type Cleareccaddr1W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Clear ECCERRADDR0"] #[inline(always)] #[must_use] - pub fn cleareccaddr0(&mut self) -> CLEARECCADDR0_W<0> { - CLEARECCADDR0_W::new(self) + pub fn cleareccaddr0(&mut self) -> Cleareccaddr0W { + Cleareccaddr0W::new(self, 0) } #[doc = "Bit 1 - Clear ECCERRADDR1"] #[inline(always)] #[must_use] - pub fn cleareccaddr1(&mut self) -> CLEARECCADDR1_W<1> { - CLEARECCADDR1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cleareccaddr1(&mut self) -> Cleareccaddr1W { + Cleareccaddr1W::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/ctrl.rs index 3ae0d70..0a27b41 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/ctrl.rs @@ -1,202 +1,169 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ECCEN` reader - Enable ECC functionality"] -pub type ECCEN_R = crate::BitReader; +pub type EccenR = crate::BitReader; #[doc = "Field `ECCEN` writer - Enable ECC functionality"] -pub type ECCEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type EccenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ECCWEN` reader - Enable ECC syndrome writes"] -pub type ECCWEN_R = crate::BitReader; +pub type EccwenR = crate::BitReader; #[doc = "Field `ECCWEN` writer - Enable ECC syndrome writes"] -pub type ECCWEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type EccwenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ECCERRFAULTEN` reader - ECC Error bus fault enable"] -pub type ECCERRFAULTEN_R = crate::BitReader; +pub type EccerrfaultenR = crate::BitReader; #[doc = "Field `ECCERRFAULTEN` writer - ECC Error bus fault enable"] -pub type ECCERRFAULTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; -#[doc = "Field `AHBPORTPRIORITY` reader - AHB port arbitration priority"] -pub type AHBPORTPRIORITY_R = crate::FieldReader; +pub type EccerrfaultenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "AHB port arbitration priority\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum AHBPORTPRIORITY_A { +pub enum Ahbportpriority { #[doc = "0: No AHB port have raised priority."] - NONE = 0, + None = 0, #[doc = "1: AHB port 0 has raised priority."] - PORT0 = 1, + Port0 = 1, #[doc = "2: AHB port 1 has raised priority."] - PORT1 = 2, + Port1 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: AHBPORTPRIORITY_A) -> Self { + fn from(variant: Ahbportpriority) -> Self { variant as _ } } -impl AHBPORTPRIORITY_R { +impl crate::FieldSpec for Ahbportpriority { + type Ux = u8; +} +impl crate::IsEnum for Ahbportpriority {} +#[doc = "Field `AHBPORTPRIORITY` reader - AHB port arbitration priority"] +pub type AhbportpriorityR = crate::FieldReader; +impl AhbportpriorityR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(AHBPORTPRIORITY_A::NONE), - 1 => Some(AHBPORTPRIORITY_A::PORT0), - 2 => Some(AHBPORTPRIORITY_A::PORT1), + 0 => Some(Ahbportpriority::None), + 1 => Some(Ahbportpriority::Port0), + 2 => Some(Ahbportpriority::Port1), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No AHB port have raised priority."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == AHBPORTPRIORITY_A::NONE + *self == Ahbportpriority::None } - #[doc = "Checks if the value of the field is `PORT0`"] + #[doc = "AHB port 0 has raised priority."] #[inline(always)] pub fn is_port0(&self) -> bool { - *self == AHBPORTPRIORITY_A::PORT0 + *self == Ahbportpriority::Port0 } - #[doc = "Checks if the value of the field is `PORT1`"] + #[doc = "AHB port 1 has raised priority."] #[inline(always)] pub fn is_port1(&self) -> bool { - *self == AHBPORTPRIORITY_A::PORT1 + *self == Ahbportpriority::Port1 } } #[doc = "Field `AHBPORTPRIORITY` writer - AHB port arbitration priority"] -pub type AHBPORTPRIORITY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CTRL_SPEC, u8, AHBPORTPRIORITY_A, 3, O>; -impl<'a, const O: u8> AHBPORTPRIORITY_W<'a, O> { +pub type AhbportpriorityW<'a, REG> = crate::FieldWriter<'a, REG, 3, Ahbportpriority>; +impl<'a, REG> AhbportpriorityW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No AHB port have raised priority."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(AHBPORTPRIORITY_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Ahbportpriority::None) } #[doc = "AHB port 0 has raised priority."] #[inline(always)] - pub fn port0(self) -> &'a mut W { - self.variant(AHBPORTPRIORITY_A::PORT0) + pub fn port0(self) -> &'a mut crate::W { + self.variant(Ahbportpriority::Port0) } #[doc = "AHB port 1 has raised priority."] #[inline(always)] - pub fn port1(self) -> &'a mut W { - self.variant(AHBPORTPRIORITY_A::PORT1) + pub fn port1(self) -> &'a mut crate::W { + self.variant(Ahbportpriority::Port1) } } #[doc = "Field `ADDRFAULTEN` reader - Address fault bus fault enable"] -pub type ADDRFAULTEN_R = crate::BitReader; +pub type AddrfaultenR = crate::BitReader; #[doc = "Field `ADDRFAULTEN` writer - Address fault bus fault enable"] -pub type ADDRFAULTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type AddrfaultenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Enable ECC functionality"] #[inline(always)] - pub fn eccen(&self) -> ECCEN_R { - ECCEN_R::new((self.bits & 1) != 0) + pub fn eccen(&self) -> EccenR { + EccenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Enable ECC syndrome writes"] #[inline(always)] - pub fn eccwen(&self) -> ECCWEN_R { - ECCWEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn eccwen(&self) -> EccwenR { + EccwenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - ECC Error bus fault enable"] #[inline(always)] - pub fn eccerrfaulten(&self) -> ECCERRFAULTEN_R { - ECCERRFAULTEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn eccerrfaulten(&self) -> EccerrfaultenR { + EccerrfaultenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 3:5 - AHB port arbitration priority"] #[inline(always)] - pub fn ahbportpriority(&self) -> AHBPORTPRIORITY_R { - AHBPORTPRIORITY_R::new(((self.bits >> 3) & 7) as u8) + pub fn ahbportpriority(&self) -> AhbportpriorityR { + AhbportpriorityR::new(((self.bits >> 3) & 7) as u8) } #[doc = "Bit 6 - Address fault bus fault enable"] #[inline(always)] - pub fn addrfaulten(&self) -> ADDRFAULTEN_R { - ADDRFAULTEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn addrfaulten(&self) -> AddrfaultenR { + AddrfaultenR::new(((self.bits >> 6) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable ECC functionality"] #[inline(always)] #[must_use] - pub fn eccen(&mut self) -> ECCEN_W<0> { - ECCEN_W::new(self) + pub fn eccen(&mut self) -> EccenW { + EccenW::new(self, 0) } #[doc = "Bit 1 - Enable ECC syndrome writes"] #[inline(always)] #[must_use] - pub fn eccwen(&mut self) -> ECCWEN_W<1> { - ECCWEN_W::new(self) + pub fn eccwen(&mut self) -> EccwenW { + EccwenW::new(self, 1) } #[doc = "Bit 2 - ECC Error bus fault enable"] #[inline(always)] #[must_use] - pub fn eccerrfaulten(&mut self) -> ECCERRFAULTEN_W<2> { - ECCERRFAULTEN_W::new(self) + pub fn eccerrfaulten(&mut self) -> EccerrfaultenW { + EccerrfaultenW::new(self, 2) } #[doc = "Bits 3:5 - AHB port arbitration priority"] #[inline(always)] #[must_use] - pub fn ahbportpriority(&mut self) -> AHBPORTPRIORITY_W<3> { - AHBPORTPRIORITY_W::new(self) + pub fn ahbportpriority(&mut self) -> AhbportpriorityW { + AhbportpriorityW::new(self, 3) } #[doc = "Bit 6 - Address fault bus fault enable"] #[inline(always)] #[must_use] - pub fn addrfaulten(&mut self) -> ADDRFAULTEN_W<6> { - ADDRFAULTEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn addrfaulten(&mut self) -> AddrfaultenW { + AddrfaultenW::new(self, 6) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0x40"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x40; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0x40; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/eccerraddr0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/eccerraddr0.rs index 1962046..3d69096 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/eccerraddr0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/eccerraddr0.rs @@ -1,37 +1,22 @@ #[doc = "Register `ECCERRADDR0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ADDR` reader - ECC Error Address"] -pub type ADDR_R = crate::FieldReader; +pub type AddrR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - ECC Error Address"] #[inline(always)] - pub fn addr(&self) -> ADDR_R { - ADDR_R::new(self.bits) + pub fn addr(&self) -> AddrR { + AddrR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eccerraddr0](index.html) module"] -pub struct ECCERRADDR0_SPEC; -impl crate::RegisterSpec for ECCERRADDR0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`eccerraddr0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eccerraddr0Spec; +impl crate::RegisterSpec for Eccerraddr0Spec { type Ux = u32; } -#[doc = "`read()` method returns [eccerraddr0::R](R) reader structure"] -impl crate::Readable for ECCERRADDR0_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`eccerraddr0::R`](R) reader structure"] +impl crate::Readable for Eccerraddr0Spec {} #[doc = "`reset()` method sets ECCERRADDR0 to value 0"] -impl crate::Resettable for ECCERRADDR0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eccerraddr0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/eccerraddr1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/eccerraddr1.rs index a1d6d68..d607d6a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/eccerraddr1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/eccerraddr1.rs @@ -1,37 +1,22 @@ #[doc = "Register `ECCERRADDR1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ADDR` reader - ECC Error Address"] -pub type ADDR_R = crate::FieldReader; +pub type AddrR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - ECC Error Address"] #[inline(always)] - pub fn addr(&self) -> ADDR_R { - ADDR_R::new(self.bits) + pub fn addr(&self) -> AddrR { + AddrR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eccerraddr1](index.html) module"] -pub struct ECCERRADDR1_SPEC; -impl crate::RegisterSpec for ECCERRADDR1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`eccerraddr1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eccerraddr1Spec; +impl crate::RegisterSpec for Eccerraddr1Spec { type Ux = u32; } -#[doc = "`read()` method returns [eccerraddr1::R](R) reader structure"] -impl crate::Readable for ECCERRADDR1_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`eccerraddr1::R`](R) reader structure"] +impl crate::Readable for Eccerraddr1Spec {} #[doc = "`reset()` method sets ECCERRADDR1 to value 0"] -impl crate::Resettable for ECCERRADDR1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eccerraddr1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/eccmerrind.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/eccmerrind.rs index 36d9630..4cf8937 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/eccmerrind.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/eccmerrind.rs @@ -1,44 +1,29 @@ #[doc = "Register `ECCMERRIND` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `P0` reader - Multiple ECC errors on AHB port 0"] -pub type P0_R = crate::BitReader; +pub type P0R = crate::BitReader; #[doc = "Field `P1` reader - Multiple ECC errors on AHB port 1"] -pub type P1_R = crate::BitReader; +pub type P1R = crate::BitReader; impl R { #[doc = "Bit 0 - Multiple ECC errors on AHB port 0"] #[inline(always)] - pub fn p0(&self) -> P0_R { - P0_R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0R { + P0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Multiple ECC errors on AHB port 1"] #[inline(always)] - pub fn p1(&self) -> P1_R { - P1_R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1R { + P1R::new(((self.bits >> 1) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eccmerrind](index.html) module"] -pub struct ECCMERRIND_SPEC; -impl crate::RegisterSpec for ECCMERRIND_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`eccmerrind::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EccmerrindSpec; +impl crate::RegisterSpec for EccmerrindSpec { type Ux = u32; } -#[doc = "`read()` method returns [eccmerrind::R](R) reader structure"] -impl crate::Readable for ECCMERRIND_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`eccmerrind::R`](R) reader structure"] +impl crate::Readable for EccmerrindSpec {} #[doc = "`reset()` method sets ECCMERRIND to value 0"] -impl crate::Resettable for ECCMERRIND_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EccmerrindSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/ien.rs index ac2be2e..cbbdc68 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/ien.rs @@ -1,125 +1,85 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `AHB0ERR1B` reader - AHB0 1-bit ECC Error Interrupt Enable"] -pub type AHB0ERR1B_R = crate::BitReader; +pub type Ahb0err1bR = crate::BitReader; #[doc = "Field `AHB0ERR1B` writer - AHB0 1-bit ECC Error Interrupt Enable"] -pub type AHB0ERR1B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Ahb0err1bW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHB1ERR1B` reader - AHB1 1-bit ECC Error Interrupt Enable"] -pub type AHB1ERR1B_R = crate::BitReader; +pub type Ahb1err1bR = crate::BitReader; #[doc = "Field `AHB1ERR1B` writer - AHB1 1-bit ECC Error Interrupt Enable"] -pub type AHB1ERR1B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Ahb1err1bW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHB0ERR2B` reader - AHB0 2-bit ECC Error Interrupt Enable"] -pub type AHB0ERR2B_R = crate::BitReader; +pub type Ahb0err2bR = crate::BitReader; #[doc = "Field `AHB0ERR2B` writer - AHB0 2-bit ECC Error Interrupt Enable"] -pub type AHB0ERR2B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Ahb0err2bW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHB1ERR2B` reader - AHB1 2-bit ECC Error Interrupt Enable"] -pub type AHB1ERR2B_R = crate::BitReader; +pub type Ahb1err2bR = crate::BitReader; #[doc = "Field `AHB1ERR2B` writer - AHB1 2-bit ECC Error Interrupt Enable"] -pub type AHB1ERR2B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Ahb1err2bW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - AHB0 1-bit ECC Error Interrupt Enable"] #[inline(always)] - pub fn ahb0err1b(&self) -> AHB0ERR1B_R { - AHB0ERR1B_R::new((self.bits & 1) != 0) + pub fn ahb0err1b(&self) -> Ahb0err1bR { + Ahb0err1bR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - AHB1 1-bit ECC Error Interrupt Enable"] #[inline(always)] - pub fn ahb1err1b(&self) -> AHB1ERR1B_R { - AHB1ERR1B_R::new(((self.bits >> 1) & 1) != 0) + pub fn ahb1err1b(&self) -> Ahb1err1bR { + Ahb1err1bR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 4 - AHB0 2-bit ECC Error Interrupt Enable"] #[inline(always)] - pub fn ahb0err2b(&self) -> AHB0ERR2B_R { - AHB0ERR2B_R::new(((self.bits >> 4) & 1) != 0) + pub fn ahb0err2b(&self) -> Ahb0err2bR { + Ahb0err2bR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - AHB1 2-bit ECC Error Interrupt Enable"] #[inline(always)] - pub fn ahb1err2b(&self) -> AHB1ERR2B_R { - AHB1ERR2B_R::new(((self.bits >> 5) & 1) != 0) + pub fn ahb1err2b(&self) -> Ahb1err2bR { + Ahb1err2bR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - AHB0 1-bit ECC Error Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ahb0err1b(&mut self) -> AHB0ERR1B_W<0> { - AHB0ERR1B_W::new(self) + pub fn ahb0err1b(&mut self) -> Ahb0err1bW { + Ahb0err1bW::new(self, 0) } #[doc = "Bit 1 - AHB1 1-bit ECC Error Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ahb1err1b(&mut self) -> AHB1ERR1B_W<1> { - AHB1ERR1B_W::new(self) + pub fn ahb1err1b(&mut self) -> Ahb1err1bW { + Ahb1err1bW::new(self, 1) } #[doc = "Bit 4 - AHB0 2-bit ECC Error Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ahb0err2b(&mut self) -> AHB0ERR2B_W<4> { - AHB0ERR2B_W::new(self) + pub fn ahb0err2b(&mut self) -> Ahb0err2bW { + Ahb0err2bW::new(self, 4) } #[doc = "Bit 5 - AHB1 2-bit ECC Error Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ahb1err2b(&mut self) -> AHB1ERR2B_W<5> { - AHB1ERR2B_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ahb1err2b(&mut self) -> Ahb1err2bW { + Ahb1err2bW::new(self, 5) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/if_.rs index 600863e..a39f06e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/if_.rs @@ -1,125 +1,85 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `AHB0ERR1B` reader - AHB0 1-bit ECC Error Interrupt Flag"] -pub type AHB0ERR1B_R = crate::BitReader; +pub type Ahb0err1bR = crate::BitReader; #[doc = "Field `AHB0ERR1B` writer - AHB0 1-bit ECC Error Interrupt Flag"] -pub type AHB0ERR1B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Ahb0err1bW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHB1ERR1B` reader - AHB1 1-bit ECC Error Interrupt Flag"] -pub type AHB1ERR1B_R = crate::BitReader; +pub type Ahb1err1bR = crate::BitReader; #[doc = "Field `AHB1ERR1B` writer - AHB1 1-bit ECC Error Interrupt Flag"] -pub type AHB1ERR1B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Ahb1err1bW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHB0ERR2B` reader - AHB0 2-bit ECC Error Interrupt Flag"] -pub type AHB0ERR2B_R = crate::BitReader; +pub type Ahb0err2bR = crate::BitReader; #[doc = "Field `AHB0ERR2B` writer - AHB0 2-bit ECC Error Interrupt Flag"] -pub type AHB0ERR2B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Ahb0err2bW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHB1ERR2B` reader - AHB1 2-bit ECC Error Interrupt Flag"] -pub type AHB1ERR2B_R = crate::BitReader; +pub type Ahb1err2bR = crate::BitReader; #[doc = "Field `AHB1ERR2B` writer - AHB1 2-bit ECC Error Interrupt Flag"] -pub type AHB1ERR2B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Ahb1err2bW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - AHB0 1-bit ECC Error Interrupt Flag"] #[inline(always)] - pub fn ahb0err1b(&self) -> AHB0ERR1B_R { - AHB0ERR1B_R::new((self.bits & 1) != 0) + pub fn ahb0err1b(&self) -> Ahb0err1bR { + Ahb0err1bR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - AHB1 1-bit ECC Error Interrupt Flag"] #[inline(always)] - pub fn ahb1err1b(&self) -> AHB1ERR1B_R { - AHB1ERR1B_R::new(((self.bits >> 1) & 1) != 0) + pub fn ahb1err1b(&self) -> Ahb1err1bR { + Ahb1err1bR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 4 - AHB0 2-bit ECC Error Interrupt Flag"] #[inline(always)] - pub fn ahb0err2b(&self) -> AHB0ERR2B_R { - AHB0ERR2B_R::new(((self.bits >> 4) & 1) != 0) + pub fn ahb0err2b(&self) -> Ahb0err2bR { + Ahb0err2bR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - AHB1 2-bit ECC Error Interrupt Flag"] #[inline(always)] - pub fn ahb1err2b(&self) -> AHB1ERR2B_R { - AHB1ERR2B_R::new(((self.bits >> 5) & 1) != 0) + pub fn ahb1err2b(&self) -> Ahb1err2bR { + Ahb1err2bR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - AHB0 1-bit ECC Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ahb0err1b(&mut self) -> AHB0ERR1B_W<0> { - AHB0ERR1B_W::new(self) + pub fn ahb0err1b(&mut self) -> Ahb0err1bW { + Ahb0err1bW::new(self, 0) } #[doc = "Bit 1 - AHB1 1-bit ECC Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ahb1err1b(&mut self) -> AHB1ERR1B_W<1> { - AHB1ERR1B_W::new(self) + pub fn ahb1err1b(&mut self) -> Ahb1err1bW { + Ahb1err1bW::new(self, 1) } #[doc = "Bit 4 - AHB0 2-bit ECC Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ahb0err2b(&mut self) -> AHB0ERR2B_W<4> { - AHB0ERR2B_W::new(self) + pub fn ahb0err2b(&mut self) -> Ahb0err2bW { + Ahb0err2bW::new(self, 4) } #[doc = "Bit 5 - AHB1 2-bit ECC Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ahb1err2b(&mut self) -> AHB1ERR2B_W<5> { - AHB1ERR2B_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ahb1err2b(&mut self) -> Ahb1err2bW { + Ahb1err2bW::new(self, 5) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/ipversion.rs index e472c59..62298ff 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dmem_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - New BitField"] -pub type IPVERSION_R = crate::BitReader; +pub type IpversionR = crate::BitReader; impl R { #[doc = "Bit 0 - New BitField"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new((self.bits & 1) != 0) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new((self.bits & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns.rs index 49f8657..601733a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns.rs @@ -1,53 +1,103 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + cfg: Cfg, + cfg1: Cfg1, + if_: If, + ien: Ien, + status: Status, + _reserved7: [u8; 0x08], + lock: Lock, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x0c - No Description"] - pub cfg1: CFG1, + #[inline(always)] + pub const fn cfg1(&self) -> &Cfg1 { + &self.cfg1 + } #[doc = "0x10 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x14 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x18 - No Description"] - pub status: STATUS, - _reserved7: [u8; 0x08], + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x24 - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CFG1 (rw) register accessor: an alias for `Reg`"] -pub type CFG1 = crate::Reg; +#[doc = "CFG1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg1`] +module"] +#[doc(alias = "CFG1")] +pub type Cfg1 = crate::Reg; #[doc = "No Description"] pub mod cfg1; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/cfg.rs index a88ce03..1fb257c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/cfg.rs @@ -1,171 +1,134 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - Operating Mode Control"] -pub type MODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Operating Mode Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Frequency Lock Mode"] - FLL = 0, + Fll = 0, #[doc = "1: Phase Lock Mode"] - PLL = 1, + Pll = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as u8 != 0 } } -impl MODE_R { +#[doc = "Field `MODE` reader - Operating Mode Control"] +pub type ModeR = crate::BitReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - false => MODE_A::FLL, - true => MODE_A::PLL, + false => Mode::Fll, + true => Mode::Pll, } } - #[doc = "Checks if the value of the field is `FLL`"] + #[doc = "Frequency Lock Mode"] #[inline(always)] pub fn is_fll(&self) -> bool { - *self == MODE_A::FLL + *self == Mode::Fll } - #[doc = "Checks if the value of the field is `PLL`"] + #[doc = "Phase Lock Mode"] #[inline(always)] pub fn is_pll(&self) -> bool { - *self == MODE_A::PLL + *self == Mode::Pll } } #[doc = "Field `MODE` writer - Operating Mode Control"] -pub type MODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, MODE_A, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::BitWriter<'a, REG, Mode>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Frequency Lock Mode"] #[inline(always)] - pub fn fll(self) -> &'a mut W { - self.variant(MODE_A::FLL) + pub fn fll(self) -> &'a mut crate::W { + self.variant(Mode::Fll) } #[doc = "Phase Lock Mode"] #[inline(always)] - pub fn pll(self) -> &'a mut W { - self.variant(MODE_A::PLL) + pub fn pll(self) -> &'a mut crate::W { + self.variant(Mode::Pll) } } #[doc = "Field `EDGESEL` reader - Reference Edge Select"] -pub type EDGESEL_R = crate::BitReader; +pub type EdgeselR = crate::BitReader; #[doc = "Field `EDGESEL` writer - Reference Edge Select"] -pub type EDGESEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type EdgeselW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTORECOVER` reader - Automatic Recovery Control"] -pub type AUTORECOVER_R = crate::BitReader; +pub type AutorecoverR = crate::BitReader; #[doc = "Field `AUTORECOVER` writer - Automatic Recovery Control"] -pub type AUTORECOVER_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type AutorecoverW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DITHEN` reader - Dither Enable Control"] -pub type DITHEN_R = crate::BitReader; +pub type DithenR = crate::BitReader; #[doc = "Field `DITHEN` writer - Dither Enable Control"] -pub type DITHEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type DithenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Operating Mode Control"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 1) != 0) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Reference Edge Select"] #[inline(always)] - pub fn edgesel(&self) -> EDGESEL_R { - EDGESEL_R::new(((self.bits >> 1) & 1) != 0) + pub fn edgesel(&self) -> EdgeselR { + EdgeselR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Automatic Recovery Control"] #[inline(always)] - pub fn autorecover(&self) -> AUTORECOVER_R { - AUTORECOVER_R::new(((self.bits >> 2) & 1) != 0) + pub fn autorecover(&self) -> AutorecoverR { + AutorecoverR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 6 - Dither Enable Control"] #[inline(always)] - pub fn dithen(&self) -> DITHEN_R { - DITHEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn dithen(&self) -> DithenR { + DithenR::new(((self.bits >> 6) & 1) != 0) } } impl W { #[doc = "Bit 0 - Operating Mode Control"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 1 - Reference Edge Select"] #[inline(always)] #[must_use] - pub fn edgesel(&mut self) -> EDGESEL_W<1> { - EDGESEL_W::new(self) + pub fn edgesel(&mut self) -> EdgeselW { + EdgeselW::new(self, 1) } #[doc = "Bit 2 - Automatic Recovery Control"] #[inline(always)] #[must_use] - pub fn autorecover(&mut self) -> AUTORECOVER_W<2> { - AUTORECOVER_W::new(self) + pub fn autorecover(&mut self) -> AutorecoverW { + AutorecoverW::new(self, 2) } #[doc = "Bit 6 - Dither Enable Control"] #[inline(always)] #[must_use] - pub fn dithen(&mut self) -> DITHEN_W<6> { - DITHEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dithen(&mut self) -> DithenW { + DithenW::new(self, 6) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/cfg1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/cfg1.rs index c73cae3..e45b6a6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/cfg1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/cfg1.rs @@ -1,95 +1,55 @@ #[doc = "Register `CFG1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `M` reader - Factor M"] -pub type M_R = crate::FieldReader; +pub type MR = crate::FieldReader; #[doc = "Field `M` writer - Factor M"] -pub type M_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG1_SPEC, u16, u16, 12, O>; +pub type MW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; #[doc = "Field `N` reader - Factor N"] -pub type N_R = crate::FieldReader; +pub type NR = crate::FieldReader; #[doc = "Field `N` writer - Factor N"] -pub type N_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG1_SPEC, u16, u16, 12, O>; +pub type NW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:11 - Factor M"] #[inline(always)] - pub fn m(&self) -> M_R { - M_R::new((self.bits & 0x0fff) as u16) + pub fn m(&self) -> MR { + MR::new((self.bits & 0x0fff) as u16) } #[doc = "Bits 16:27 - Factor N"] #[inline(always)] - pub fn n(&self) -> N_R { - N_R::new(((self.bits >> 16) & 0x0fff) as u16) + pub fn n(&self) -> NR { + NR::new(((self.bits >> 16) & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - Factor M"] #[inline(always)] #[must_use] - pub fn m(&mut self) -> M_W<0> { - M_W::new(self) + pub fn m(&mut self) -> MW { + MW::new(self, 0) } #[doc = "Bits 16:27 - Factor N"] #[inline(always)] #[must_use] - pub fn n(&mut self) -> N_W<16> { - N_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn n(&mut self) -> NW { + NW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg1](index.html) module"] -pub struct CFG1_SPEC; -impl crate::RegisterSpec for CFG1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cfg1Spec; +impl crate::RegisterSpec for Cfg1Spec { type Ux = u32; } -#[doc = "`read()` method returns [cfg1::R](R) reader structure"] -impl crate::Readable for CFG1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg1::W](W) writer structure"] -impl crate::Writable for CFG1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg1::R`](R) reader structure"] +impl crate::Readable for Cfg1Spec {} +#[doc = "`write(|w| ..)` method takes [`cfg1::W`](W) writer structure"] +impl crate::Writable for Cfg1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG1 to value 0"] -impl crate::Resettable for CFG1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cfg1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/en.rs index a5e4b1c..47af25a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Module Enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Module Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement Busy Status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Module Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement Busy Status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Module Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/ien.rs index df49f39..66d792e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/ien.rs @@ -1,110 +1,70 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOCK` reader - LOCK interrupt Enable"] -pub type LOCK_R = crate::BitReader; +pub type LockR = crate::BitReader; #[doc = "Field `LOCK` writer - LOCK interrupt Enable"] -pub type LOCK_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type LockW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOCKFAILLOW` reader - LOCKFAILLOW Interrupe Enable"] -pub type LOCKFAILLOW_R = crate::BitReader; +pub type LockfaillowR = crate::BitReader; #[doc = "Field `LOCKFAILLOW` writer - LOCKFAILLOW Interrupe Enable"] -pub type LOCKFAILLOW_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type LockfaillowW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOCKFAILHIGH` reader - LOCKFAILHIGH Interrupt Enable"] -pub type LOCKFAILHIGH_R = crate::BitReader; +pub type LockfailhighR = crate::BitReader; #[doc = "Field `LOCKFAILHIGH` writer - LOCKFAILHIGH Interrupt Enable"] -pub type LOCKFAILHIGH_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type LockfailhighW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - LOCK interrupt Enable"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new((self.bits & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - LOCKFAILLOW Interrupe Enable"] #[inline(always)] - pub fn lockfaillow(&self) -> LOCKFAILLOW_R { - LOCKFAILLOW_R::new(((self.bits >> 1) & 1) != 0) + pub fn lockfaillow(&self) -> LockfaillowR { + LockfaillowR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - LOCKFAILHIGH Interrupt Enable"] #[inline(always)] - pub fn lockfailhigh(&self) -> LOCKFAILHIGH_R { - LOCKFAILHIGH_R::new(((self.bits >> 2) & 1) != 0) + pub fn lockfailhigh(&self) -> LockfailhighR { + LockfailhighR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - LOCK interrupt Enable"] #[inline(always)] #[must_use] - pub fn lock(&mut self) -> LOCK_W<0> { - LOCK_W::new(self) + pub fn lock(&mut self) -> LockW { + LockW::new(self, 0) } #[doc = "Bit 1 - LOCKFAILLOW Interrupe Enable"] #[inline(always)] #[must_use] - pub fn lockfaillow(&mut self) -> LOCKFAILLOW_W<1> { - LOCKFAILLOW_W::new(self) + pub fn lockfaillow(&mut self) -> LockfaillowW { + LockfaillowW::new(self, 1) } #[doc = "Bit 2 - LOCKFAILHIGH Interrupt Enable"] #[inline(always)] #[must_use] - pub fn lockfailhigh(&mut self) -> LOCKFAILHIGH_W<2> { - LOCKFAILHIGH_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockfailhigh(&mut self) -> LockfailhighW { + LockfailhighW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/if_.rs index 9ef07b8..51de1b2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/if_.rs @@ -1,110 +1,70 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOCK` reader - Lock Interrupt Flag"] -pub type LOCK_R = crate::BitReader; +pub type LockR = crate::BitReader; #[doc = "Field `LOCK` writer - Lock Interrupt Flag"] -pub type LOCK_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type LockW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOCKFAILLOW` reader - Lock Failure Low Interrupt Flag"] -pub type LOCKFAILLOW_R = crate::BitReader; +pub type LockfaillowR = crate::BitReader; #[doc = "Field `LOCKFAILLOW` writer - Lock Failure Low Interrupt Flag"] -pub type LOCKFAILLOW_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type LockfaillowW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOCKFAILHIGH` reader - Lock Failure High Interrupt Flag"] -pub type LOCKFAILHIGH_R = crate::BitReader; +pub type LockfailhighR = crate::BitReader; #[doc = "Field `LOCKFAILHIGH` writer - Lock Failure High Interrupt Flag"] -pub type LOCKFAILHIGH_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type LockfailhighW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Lock Interrupt Flag"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new((self.bits & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Lock Failure Low Interrupt Flag"] #[inline(always)] - pub fn lockfaillow(&self) -> LOCKFAILLOW_R { - LOCKFAILLOW_R::new(((self.bits >> 1) & 1) != 0) + pub fn lockfaillow(&self) -> LockfaillowR { + LockfaillowR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Lock Failure High Interrupt Flag"] #[inline(always)] - pub fn lockfailhigh(&self) -> LOCKFAILHIGH_R { - LOCKFAILHIGH_R::new(((self.bits >> 2) & 1) != 0) + pub fn lockfailhigh(&self) -> LockfailhighR { + LockfailhighR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Lock Interrupt Flag"] #[inline(always)] #[must_use] - pub fn lock(&mut self) -> LOCK_W<0> { - LOCK_W::new(self) + pub fn lock(&mut self) -> LockW { + LockW::new(self, 0) } #[doc = "Bit 1 - Lock Failure Low Interrupt Flag"] #[inline(always)] #[must_use] - pub fn lockfaillow(&mut self) -> LOCKFAILLOW_W<1> { - LOCKFAILLOW_W::new(self) + pub fn lockfaillow(&mut self) -> LockfaillowW { + LockfaillowW::new(self, 1) } #[doc = "Bit 2 - Lock Failure High Interrupt Flag"] #[inline(always)] #[must_use] - pub fn lockfailhigh(&mut self) -> LOCKFAILHIGH_W<2> { - LOCKFAILHIGH_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockfailhigh(&mut self) -> LockfailhighW { + LockfailhighW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/ipversion.rs index fd8f758..0b161f8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/lock.rs index 5240aaa..e9d30ed 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Lock Key\n\nValue on reset: 28930"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "28930: Unlock code"] - UNLOCK = 28930, + Unlock = 28930, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Unlock code"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0x7102"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0x7102; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0x7102; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/status.rs index 92e16ad..ed4328d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_ns/status.rs @@ -1,85 +1,70 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RDY` reader - Ready Status"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `ENS` reader - Enable Status"] -pub type ENS_R = crate::BitReader; -#[doc = "Field `LOCK` reader - Lock Status"] -pub type LOCK_R = crate::BitReader; +pub type EnsR = crate::BitReader; #[doc = "Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCK_A { +pub enum Lock { #[doc = "0: DPLL is unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: DPLL is locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCK_A) -> Self { + fn from(variant: Lock) -> Self { variant as u8 != 0 } } -impl LOCK_R { +#[doc = "Field `LOCK` reader - Lock Status"] +pub type LockR = crate::BitReader; +impl LockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCK_A { + pub const fn variant(&self) -> Lock { match self.bits { - false => LOCK_A::UNLOCKED, - true => LOCK_A::LOCKED, + false => Lock::Unlocked, + true => Lock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "DPLL is unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCK_A::UNLOCKED + *self == Lock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "DPLL is locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCK_A::LOCKED + *self == Lock::Locked } } impl R { #[doc = "Bit 0 - Ready Status"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Enable Status"] #[inline(always)] - pub fn ens(&self) -> ENS_R { - ENS_R::new(((self.bits >> 1) & 1) != 0) + pub fn ens(&self) -> EnsR { + EnsR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 31 - Lock Status"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new(((self.bits >> 31) & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s.rs index 49f8657..601733a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s.rs @@ -1,53 +1,103 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + cfg: Cfg, + cfg1: Cfg1, + if_: If, + ien: Ien, + status: Status, + _reserved7: [u8; 0x08], + lock: Lock, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x0c - No Description"] - pub cfg1: CFG1, + #[inline(always)] + pub const fn cfg1(&self) -> &Cfg1 { + &self.cfg1 + } #[doc = "0x10 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x14 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x18 - No Description"] - pub status: STATUS, - _reserved7: [u8; 0x08], + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x24 - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CFG1 (rw) register accessor: an alias for `Reg`"] -pub type CFG1 = crate::Reg; +#[doc = "CFG1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg1`] +module"] +#[doc(alias = "CFG1")] +pub type Cfg1 = crate::Reg; #[doc = "No Description"] pub mod cfg1; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/cfg.rs index a88ce03..1fb257c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/cfg.rs @@ -1,171 +1,134 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - Operating Mode Control"] -pub type MODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Operating Mode Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Frequency Lock Mode"] - FLL = 0, + Fll = 0, #[doc = "1: Phase Lock Mode"] - PLL = 1, + Pll = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as u8 != 0 } } -impl MODE_R { +#[doc = "Field `MODE` reader - Operating Mode Control"] +pub type ModeR = crate::BitReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - false => MODE_A::FLL, - true => MODE_A::PLL, + false => Mode::Fll, + true => Mode::Pll, } } - #[doc = "Checks if the value of the field is `FLL`"] + #[doc = "Frequency Lock Mode"] #[inline(always)] pub fn is_fll(&self) -> bool { - *self == MODE_A::FLL + *self == Mode::Fll } - #[doc = "Checks if the value of the field is `PLL`"] + #[doc = "Phase Lock Mode"] #[inline(always)] pub fn is_pll(&self) -> bool { - *self == MODE_A::PLL + *self == Mode::Pll } } #[doc = "Field `MODE` writer - Operating Mode Control"] -pub type MODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, MODE_A, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::BitWriter<'a, REG, Mode>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Frequency Lock Mode"] #[inline(always)] - pub fn fll(self) -> &'a mut W { - self.variant(MODE_A::FLL) + pub fn fll(self) -> &'a mut crate::W { + self.variant(Mode::Fll) } #[doc = "Phase Lock Mode"] #[inline(always)] - pub fn pll(self) -> &'a mut W { - self.variant(MODE_A::PLL) + pub fn pll(self) -> &'a mut crate::W { + self.variant(Mode::Pll) } } #[doc = "Field `EDGESEL` reader - Reference Edge Select"] -pub type EDGESEL_R = crate::BitReader; +pub type EdgeselR = crate::BitReader; #[doc = "Field `EDGESEL` writer - Reference Edge Select"] -pub type EDGESEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type EdgeselW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTORECOVER` reader - Automatic Recovery Control"] -pub type AUTORECOVER_R = crate::BitReader; +pub type AutorecoverR = crate::BitReader; #[doc = "Field `AUTORECOVER` writer - Automatic Recovery Control"] -pub type AUTORECOVER_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type AutorecoverW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DITHEN` reader - Dither Enable Control"] -pub type DITHEN_R = crate::BitReader; +pub type DithenR = crate::BitReader; #[doc = "Field `DITHEN` writer - Dither Enable Control"] -pub type DITHEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type DithenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Operating Mode Control"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 1) != 0) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Reference Edge Select"] #[inline(always)] - pub fn edgesel(&self) -> EDGESEL_R { - EDGESEL_R::new(((self.bits >> 1) & 1) != 0) + pub fn edgesel(&self) -> EdgeselR { + EdgeselR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Automatic Recovery Control"] #[inline(always)] - pub fn autorecover(&self) -> AUTORECOVER_R { - AUTORECOVER_R::new(((self.bits >> 2) & 1) != 0) + pub fn autorecover(&self) -> AutorecoverR { + AutorecoverR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 6 - Dither Enable Control"] #[inline(always)] - pub fn dithen(&self) -> DITHEN_R { - DITHEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn dithen(&self) -> DithenR { + DithenR::new(((self.bits >> 6) & 1) != 0) } } impl W { #[doc = "Bit 0 - Operating Mode Control"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 1 - Reference Edge Select"] #[inline(always)] #[must_use] - pub fn edgesel(&mut self) -> EDGESEL_W<1> { - EDGESEL_W::new(self) + pub fn edgesel(&mut self) -> EdgeselW { + EdgeselW::new(self, 1) } #[doc = "Bit 2 - Automatic Recovery Control"] #[inline(always)] #[must_use] - pub fn autorecover(&mut self) -> AUTORECOVER_W<2> { - AUTORECOVER_W::new(self) + pub fn autorecover(&mut self) -> AutorecoverW { + AutorecoverW::new(self, 2) } #[doc = "Bit 6 - Dither Enable Control"] #[inline(always)] #[must_use] - pub fn dithen(&mut self) -> DITHEN_W<6> { - DITHEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dithen(&mut self) -> DithenW { + DithenW::new(self, 6) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/cfg1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/cfg1.rs index c73cae3..e45b6a6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/cfg1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/cfg1.rs @@ -1,95 +1,55 @@ #[doc = "Register `CFG1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `M` reader - Factor M"] -pub type M_R = crate::FieldReader; +pub type MR = crate::FieldReader; #[doc = "Field `M` writer - Factor M"] -pub type M_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG1_SPEC, u16, u16, 12, O>; +pub type MW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; #[doc = "Field `N` reader - Factor N"] -pub type N_R = crate::FieldReader; +pub type NR = crate::FieldReader; #[doc = "Field `N` writer - Factor N"] -pub type N_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG1_SPEC, u16, u16, 12, O>; +pub type NW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:11 - Factor M"] #[inline(always)] - pub fn m(&self) -> M_R { - M_R::new((self.bits & 0x0fff) as u16) + pub fn m(&self) -> MR { + MR::new((self.bits & 0x0fff) as u16) } #[doc = "Bits 16:27 - Factor N"] #[inline(always)] - pub fn n(&self) -> N_R { - N_R::new(((self.bits >> 16) & 0x0fff) as u16) + pub fn n(&self) -> NR { + NR::new(((self.bits >> 16) & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - Factor M"] #[inline(always)] #[must_use] - pub fn m(&mut self) -> M_W<0> { - M_W::new(self) + pub fn m(&mut self) -> MW { + MW::new(self, 0) } #[doc = "Bits 16:27 - Factor N"] #[inline(always)] #[must_use] - pub fn n(&mut self) -> N_W<16> { - N_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn n(&mut self) -> NW { + NW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg1](index.html) module"] -pub struct CFG1_SPEC; -impl crate::RegisterSpec for CFG1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cfg1Spec; +impl crate::RegisterSpec for Cfg1Spec { type Ux = u32; } -#[doc = "`read()` method returns [cfg1::R](R) reader structure"] -impl crate::Readable for CFG1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg1::W](W) writer structure"] -impl crate::Writable for CFG1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg1::R`](R) reader structure"] +impl crate::Readable for Cfg1Spec {} +#[doc = "`write(|w| ..)` method takes [`cfg1::W`](W) writer structure"] +impl crate::Writable for Cfg1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG1 to value 0"] -impl crate::Resettable for CFG1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cfg1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/en.rs index a5e4b1c..47af25a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Module Enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Module Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement Busy Status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Module Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement Busy Status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Module Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/ien.rs index df49f39..66d792e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/ien.rs @@ -1,110 +1,70 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOCK` reader - LOCK interrupt Enable"] -pub type LOCK_R = crate::BitReader; +pub type LockR = crate::BitReader; #[doc = "Field `LOCK` writer - LOCK interrupt Enable"] -pub type LOCK_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type LockW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOCKFAILLOW` reader - LOCKFAILLOW Interrupe Enable"] -pub type LOCKFAILLOW_R = crate::BitReader; +pub type LockfaillowR = crate::BitReader; #[doc = "Field `LOCKFAILLOW` writer - LOCKFAILLOW Interrupe Enable"] -pub type LOCKFAILLOW_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type LockfaillowW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOCKFAILHIGH` reader - LOCKFAILHIGH Interrupt Enable"] -pub type LOCKFAILHIGH_R = crate::BitReader; +pub type LockfailhighR = crate::BitReader; #[doc = "Field `LOCKFAILHIGH` writer - LOCKFAILHIGH Interrupt Enable"] -pub type LOCKFAILHIGH_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type LockfailhighW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - LOCK interrupt Enable"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new((self.bits & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - LOCKFAILLOW Interrupe Enable"] #[inline(always)] - pub fn lockfaillow(&self) -> LOCKFAILLOW_R { - LOCKFAILLOW_R::new(((self.bits >> 1) & 1) != 0) + pub fn lockfaillow(&self) -> LockfaillowR { + LockfaillowR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - LOCKFAILHIGH Interrupt Enable"] #[inline(always)] - pub fn lockfailhigh(&self) -> LOCKFAILHIGH_R { - LOCKFAILHIGH_R::new(((self.bits >> 2) & 1) != 0) + pub fn lockfailhigh(&self) -> LockfailhighR { + LockfailhighR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - LOCK interrupt Enable"] #[inline(always)] #[must_use] - pub fn lock(&mut self) -> LOCK_W<0> { - LOCK_W::new(self) + pub fn lock(&mut self) -> LockW { + LockW::new(self, 0) } #[doc = "Bit 1 - LOCKFAILLOW Interrupe Enable"] #[inline(always)] #[must_use] - pub fn lockfaillow(&mut self) -> LOCKFAILLOW_W<1> { - LOCKFAILLOW_W::new(self) + pub fn lockfaillow(&mut self) -> LockfaillowW { + LockfaillowW::new(self, 1) } #[doc = "Bit 2 - LOCKFAILHIGH Interrupt Enable"] #[inline(always)] #[must_use] - pub fn lockfailhigh(&mut self) -> LOCKFAILHIGH_W<2> { - LOCKFAILHIGH_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockfailhigh(&mut self) -> LockfailhighW { + LockfailhighW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/if_.rs index 9ef07b8..51de1b2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/if_.rs @@ -1,110 +1,70 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOCK` reader - Lock Interrupt Flag"] -pub type LOCK_R = crate::BitReader; +pub type LockR = crate::BitReader; #[doc = "Field `LOCK` writer - Lock Interrupt Flag"] -pub type LOCK_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type LockW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOCKFAILLOW` reader - Lock Failure Low Interrupt Flag"] -pub type LOCKFAILLOW_R = crate::BitReader; +pub type LockfaillowR = crate::BitReader; #[doc = "Field `LOCKFAILLOW` writer - Lock Failure Low Interrupt Flag"] -pub type LOCKFAILLOW_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type LockfaillowW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOCKFAILHIGH` reader - Lock Failure High Interrupt Flag"] -pub type LOCKFAILHIGH_R = crate::BitReader; +pub type LockfailhighR = crate::BitReader; #[doc = "Field `LOCKFAILHIGH` writer - Lock Failure High Interrupt Flag"] -pub type LOCKFAILHIGH_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type LockfailhighW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Lock Interrupt Flag"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new((self.bits & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Lock Failure Low Interrupt Flag"] #[inline(always)] - pub fn lockfaillow(&self) -> LOCKFAILLOW_R { - LOCKFAILLOW_R::new(((self.bits >> 1) & 1) != 0) + pub fn lockfaillow(&self) -> LockfaillowR { + LockfaillowR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Lock Failure High Interrupt Flag"] #[inline(always)] - pub fn lockfailhigh(&self) -> LOCKFAILHIGH_R { - LOCKFAILHIGH_R::new(((self.bits >> 2) & 1) != 0) + pub fn lockfailhigh(&self) -> LockfailhighR { + LockfailhighR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Lock Interrupt Flag"] #[inline(always)] #[must_use] - pub fn lock(&mut self) -> LOCK_W<0> { - LOCK_W::new(self) + pub fn lock(&mut self) -> LockW { + LockW::new(self, 0) } #[doc = "Bit 1 - Lock Failure Low Interrupt Flag"] #[inline(always)] #[must_use] - pub fn lockfaillow(&mut self) -> LOCKFAILLOW_W<1> { - LOCKFAILLOW_W::new(self) + pub fn lockfaillow(&mut self) -> LockfaillowW { + LockfaillowW::new(self, 1) } #[doc = "Bit 2 - Lock Failure High Interrupt Flag"] #[inline(always)] #[must_use] - pub fn lockfailhigh(&mut self) -> LOCKFAILHIGH_W<2> { - LOCKFAILHIGH_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockfailhigh(&mut self) -> LockfailhighW { + LockfailhighW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/ipversion.rs index fd8f758..0b161f8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/lock.rs index 5240aaa..e9d30ed 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Lock Key\n\nValue on reset: 28930"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "28930: Unlock code"] - UNLOCK = 28930, + Unlock = 28930, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Unlock code"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0x7102"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0x7102; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0x7102; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/status.rs index 92e16ad..ed4328d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/dpll0_s/status.rs @@ -1,85 +1,70 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RDY` reader - Ready Status"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `ENS` reader - Enable Status"] -pub type ENS_R = crate::BitReader; -#[doc = "Field `LOCK` reader - Lock Status"] -pub type LOCK_R = crate::BitReader; +pub type EnsR = crate::BitReader; #[doc = "Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCK_A { +pub enum Lock { #[doc = "0: DPLL is unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: DPLL is locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCK_A) -> Self { + fn from(variant: Lock) -> Self { variant as u8 != 0 } } -impl LOCK_R { +#[doc = "Field `LOCK` reader - Lock Status"] +pub type LockR = crate::BitReader; +impl LockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCK_A { + pub const fn variant(&self) -> Lock { match self.bits { - false => LOCK_A::UNLOCKED, - true => LOCK_A::LOCKED, + false => Lock::Unlocked, + true => Lock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "DPLL is unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCK_A::UNLOCKED + *self == Lock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "DPLL is locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCK_A::LOCKED + *self == Lock::Locked } } impl R { #[doc = "Bit 0 - Ready Status"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Enable Status"] #[inline(always)] - pub fn ens(&self) -> ENS_R { - ENS_R::new(((self.bits >> 1) & 1) != 0) + pub fn ens(&self) -> EnsR { + EnsR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 31 - Lock Status"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new(((self.bits >> 31) & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns.rs index fcbf16a..7ee8c81 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns.rs @@ -1,138 +1,266 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { _reserved0: [u8; 0x10], - #[doc = "0x10 - No Description"] - pub decbod: DECBOD, + decbod: Decbod, _reserved1: [u8; 0x0c], - #[doc = "0x20 - No Description"] - pub bod3sense: BOD3SENSE, + bod3sense: Bod3sense, _reserved2: [u8; 0x18], + vregvddcmpctrl: Vregvddcmpctrl, + pd1paretctrl: Pd1paretctrl, + _reserved4: [u8; 0x18], + ipversion: Ipversion, + lock: Lock, + if_: If, + ien: Ien, + em4ctrl: Em4ctrl, + cmd: Cmd, + ctrl: Ctrl, + templimits: Templimits, + _reserved12: [u8; 0x08], + status: Status, + temp: Temp, + _reserved14: [u8; 0x04], + rstctrl: Rstctrl, + rstcause: Rstcause, + tamperrstcause: Tamperrstcause, + _reserved17: [u8; 0x04], + dgif: Dgif, + dgien: Dgien, + _reserved19: [u8; 0x58], + efpif: Efpif, + efpien: Efpien, +} +impl RegisterBlock { + #[doc = "0x10 - No Description"] + #[inline(always)] + pub const fn decbod(&self) -> &Decbod { + &self.decbod + } + #[doc = "0x20 - No Description"] + #[inline(always)] + pub const fn bod3sense(&self) -> &Bod3sense { + &self.bod3sense + } #[doc = "0x3c - No Description"] - pub vregvddcmpctrl: VREGVDDCMPCTRL, + #[inline(always)] + pub const fn vregvddcmpctrl(&self) -> &Vregvddcmpctrl { + &self.vregvddcmpctrl + } #[doc = "0x40 - No Description"] - pub pd1paretctrl: PD1PARETCTRL, - _reserved4: [u8; 0x18], + #[inline(always)] + pub const fn pd1paretctrl(&self) -> &Pd1paretctrl { + &self.pd1paretctrl + } #[doc = "0x5c - IP Version"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x60 - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x64 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x68 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x6c - No Description"] - pub em4ctrl: EM4CTRL, + #[inline(always)] + pub const fn em4ctrl(&self) -> &Em4ctrl { + &self.em4ctrl + } #[doc = "0x70 - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x74 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x78 - No Description"] - pub templimits: TEMPLIMITS, - _reserved12: [u8; 0x08], + #[inline(always)] + pub const fn templimits(&self) -> &Templimits { + &self.templimits + } #[doc = "0x84 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x88 - No Description"] - pub temp: TEMP, - _reserved14: [u8; 0x04], + #[inline(always)] + pub const fn temp(&self) -> &Temp { + &self.temp + } #[doc = "0x90 - No Description"] - pub rstctrl: RSTCTRL, + #[inline(always)] + pub const fn rstctrl(&self) -> &Rstctrl { + &self.rstctrl + } #[doc = "0x94 - No Description"] - pub rstcause: RSTCAUSE, + #[inline(always)] + pub const fn rstcause(&self) -> &Rstcause { + &self.rstcause + } #[doc = "0x98 - No Description"] - pub tamperrstcause: TAMPERRSTCAUSE, - _reserved17: [u8; 0x04], + #[inline(always)] + pub const fn tamperrstcause(&self) -> &Tamperrstcause { + &self.tamperrstcause + } #[doc = "0xa0 - No Description"] - pub dgif: DGIF, + #[inline(always)] + pub const fn dgif(&self) -> &Dgif { + &self.dgif + } #[doc = "0xa4 - No Description"] - pub dgien: DGIEN, - _reserved19: [u8; 0x58], + #[inline(always)] + pub const fn dgien(&self) -> &Dgien { + &self.dgien + } #[doc = "0x100 - No Description"] - pub efpif: EFPIF, + #[inline(always)] + pub const fn efpif(&self) -> &Efpif { + &self.efpif + } #[doc = "0x104 - No Description"] - pub efpien: EFPIEN, + #[inline(always)] + pub const fn efpien(&self) -> &Efpien { + &self.efpien + } } -#[doc = "DECBOD (rw) register accessor: an alias for `Reg`"] -pub type DECBOD = crate::Reg; +#[doc = "DECBOD (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`decbod::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`decbod::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@decbod`] +module"] +#[doc(alias = "DECBOD")] +pub type Decbod = crate::Reg; #[doc = "No Description"] pub mod decbod; -#[doc = "BOD3SENSE (rw) register accessor: an alias for `Reg`"] -pub type BOD3SENSE = crate::Reg; +#[doc = "BOD3SENSE (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bod3sense::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bod3sense::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bod3sense`] +module"] +#[doc(alias = "BOD3SENSE")] +pub type Bod3sense = crate::Reg; #[doc = "No Description"] pub mod bod3sense; -#[doc = "VREGVDDCMPCTRL (rw) register accessor: an alias for `Reg`"] -pub type VREGVDDCMPCTRL = crate::Reg; +#[doc = "VREGVDDCMPCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`vregvddcmpctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`vregvddcmpctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vregvddcmpctrl`] +module"] +#[doc(alias = "VREGVDDCMPCTRL")] +pub type Vregvddcmpctrl = crate::Reg; #[doc = "No Description"] pub mod vregvddcmpctrl; -#[doc = "PD1PARETCTRL (rw) register accessor: an alias for `Reg`"] -pub type PD1PARETCTRL = crate::Reg; +#[doc = "PD1PARETCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pd1paretctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pd1paretctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pd1paretctrl`] +module"] +#[doc(alias = "PD1PARETCTRL")] +pub type Pd1paretctrl = crate::Reg; #[doc = "No Description"] pub mod pd1paretctrl; -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: IP Version\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "IP Version"] pub mod ipversion; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "EM4CTRL (rw) register accessor: an alias for `Reg`"] -pub type EM4CTRL = crate::Reg; +#[doc = "EM4CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em4ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em4ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@em4ctrl`] +module"] +#[doc(alias = "EM4CTRL")] +pub type Em4ctrl = crate::Reg; #[doc = "No Description"] pub mod em4ctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "TEMPLIMITS (rw) register accessor: an alias for `Reg`"] -pub type TEMPLIMITS = crate::Reg; +#[doc = "TEMPLIMITS (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`templimits::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`templimits::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@templimits`] +module"] +#[doc(alias = "TEMPLIMITS")] +pub type Templimits = crate::Reg; #[doc = "No Description"] pub mod templimits; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "TEMP (r) register accessor: an alias for `Reg`"] -pub type TEMP = crate::Reg; +#[doc = "TEMP (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`temp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@temp`] +module"] +#[doc(alias = "TEMP")] +pub type Temp = crate::Reg; #[doc = "No Description"] pub mod temp; -#[doc = "RSTCTRL (rw) register accessor: an alias for `Reg`"] -pub type RSTCTRL = crate::Reg; +#[doc = "RSTCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rstctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rstctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rstctrl`] +module"] +#[doc(alias = "RSTCTRL")] +pub type Rstctrl = crate::Reg; #[doc = "No Description"] pub mod rstctrl; -#[doc = "RSTCAUSE (r) register accessor: an alias for `Reg`"] -pub type RSTCAUSE = crate::Reg; +#[doc = "RSTCAUSE (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rstcause::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rstcause`] +module"] +#[doc(alias = "RSTCAUSE")] +pub type Rstcause = crate::Reg; #[doc = "No Description"] pub mod rstcause; -#[doc = "TAMPERRSTCAUSE (r) register accessor: an alias for `Reg`"] -pub type TAMPERRSTCAUSE = crate::Reg; +#[doc = "TAMPERRSTCAUSE (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`tamperrstcause::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tamperrstcause`] +module"] +#[doc(alias = "TAMPERRSTCAUSE")] +pub type Tamperrstcause = crate::Reg; #[doc = "No Description"] pub mod tamperrstcause; -#[doc = "DGIF (rw) register accessor: an alias for `Reg`"] -pub type DGIF = crate::Reg; +#[doc = "DGIF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dgif::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dgif::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dgif`] +module"] +#[doc(alias = "DGIF")] +pub type Dgif = crate::Reg; #[doc = "No Description"] pub mod dgif; -#[doc = "DGIEN (rw) register accessor: an alias for `Reg`"] -pub type DGIEN = crate::Reg; +#[doc = "DGIEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dgien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dgien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dgien`] +module"] +#[doc(alias = "DGIEN")] +pub type Dgien = crate::Reg; #[doc = "No Description"] pub mod dgien; -#[doc = "EFPIF (rw) register accessor: an alias for `Reg`"] -pub type EFPIF = crate::Reg; +#[doc = "EFPIF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`efpif::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`efpif::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@efpif`] +module"] +#[doc(alias = "EFPIF")] +pub type Efpif = crate::Reg; #[doc = "No Description"] pub mod efpif; -#[doc = "EFPIEN (rw) register accessor: an alias for `Reg`"] -pub type EFPIEN = crate::Reg; +#[doc = "EFPIEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`efpien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`efpien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@efpien`] +module"] +#[doc(alias = "EFPIEN")] +pub type Efpien = crate::Reg; #[doc = "No Description"] pub mod efpien; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/bod3sense.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/bod3sense.rs index d91422b..a638060 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/bod3sense.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/bod3sense.rs @@ -1,110 +1,70 @@ #[doc = "Register `BOD3SENSE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `BOD3SENSE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `AVDDBODEN` reader - AVDD BOD enable"] -pub type AVDDBODEN_R = crate::BitReader; +pub type AvddbodenR = crate::BitReader; #[doc = "Field `AVDDBODEN` writer - AVDD BOD enable"] -pub type AVDDBODEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, BOD3SENSE_SPEC, bool, O>; +pub type AvddbodenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VDDIO0BODEN` reader - VDDIO0 BOD enable"] -pub type VDDIO0BODEN_R = crate::BitReader; +pub type Vddio0bodenR = crate::BitReader; #[doc = "Field `VDDIO0BODEN` writer - VDDIO0 BOD enable"] -pub type VDDIO0BODEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, BOD3SENSE_SPEC, bool, O>; +pub type Vddio0bodenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VDDIO1BODEN` reader - VDDIO1 BOD enable"] -pub type VDDIO1BODEN_R = crate::BitReader; +pub type Vddio1bodenR = crate::BitReader; #[doc = "Field `VDDIO1BODEN` writer - VDDIO1 BOD enable"] -pub type VDDIO1BODEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, BOD3SENSE_SPEC, bool, O>; +pub type Vddio1bodenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - AVDD BOD enable"] #[inline(always)] - pub fn avddboden(&self) -> AVDDBODEN_R { - AVDDBODEN_R::new((self.bits & 1) != 0) + pub fn avddboden(&self) -> AvddbodenR { + AvddbodenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - VDDIO0 BOD enable"] #[inline(always)] - pub fn vddio0boden(&self) -> VDDIO0BODEN_R { - VDDIO0BODEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn vddio0boden(&self) -> Vddio0bodenR { + Vddio0bodenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - VDDIO1 BOD enable"] #[inline(always)] - pub fn vddio1boden(&self) -> VDDIO1BODEN_R { - VDDIO1BODEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn vddio1boden(&self) -> Vddio1bodenR { + Vddio1bodenR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - AVDD BOD enable"] #[inline(always)] #[must_use] - pub fn avddboden(&mut self) -> AVDDBODEN_W<0> { - AVDDBODEN_W::new(self) + pub fn avddboden(&mut self) -> AvddbodenW { + AvddbodenW::new(self, 0) } #[doc = "Bit 1 - VDDIO0 BOD enable"] #[inline(always)] #[must_use] - pub fn vddio0boden(&mut self) -> VDDIO0BODEN_W<1> { - VDDIO0BODEN_W::new(self) + pub fn vddio0boden(&mut self) -> Vddio0bodenW { + Vddio0bodenW::new(self, 1) } #[doc = "Bit 2 - VDDIO1 BOD enable"] #[inline(always)] #[must_use] - pub fn vddio1boden(&mut self) -> VDDIO1BODEN_W<2> { - VDDIO1BODEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn vddio1boden(&mut self) -> Vddio1bodenW { + Vddio1bodenW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bod3sense](index.html) module"] -pub struct BOD3SENSE_SPEC; -impl crate::RegisterSpec for BOD3SENSE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bod3sense::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bod3sense::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Bod3senseSpec; +impl crate::RegisterSpec for Bod3senseSpec { type Ux = u32; } -#[doc = "`read()` method returns [bod3sense::R](R) reader structure"] -impl crate::Readable for BOD3SENSE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [bod3sense::W](W) writer structure"] -impl crate::Writable for BOD3SENSE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`bod3sense::R`](R) reader structure"] +impl crate::Readable for Bod3senseSpec {} +#[doc = "`write(|w| ..)` method takes [`bod3sense::W`](W) writer structure"] +impl crate::Writable for Bod3senseSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BOD3SENSE to value 0"] -impl crate::Resettable for BOD3SENSE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Bod3senseSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/cmd.rs index d3243da..3cb4242 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/cmd.rs @@ -1,92 +1,67 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EM4UNLATCH` writer - EM4 unlatch"] -pub type EM4UNLATCH_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type Em4unlatchW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMPAVGREQ` writer - Temperature Average Request"] -pub type TEMPAVGREQ_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TempavgreqW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM01VSCALE1` writer - Scale voltage to Vscale1"] -pub type EM01VSCALE1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type Em01vscale1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM01VSCALE2` writer - Scale voltage to Vscale2"] -pub type EM01VSCALE2_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type Em01vscale2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RSTCAUSECLR` writer - Reset Cause Clear"] -pub type RSTCAUSECLR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RstcauseclrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TAMPERRCCLR` writer - Tamper Reset Cause Clear"] -pub type TAMPERRCCLR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TamperrcclrW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 1 - EM4 unlatch"] #[inline(always)] #[must_use] - pub fn em4unlatch(&mut self) -> EM4UNLATCH_W<1> { - EM4UNLATCH_W::new(self) + pub fn em4unlatch(&mut self) -> Em4unlatchW { + Em4unlatchW::new(self, 1) } #[doc = "Bit 4 - Temperature Average Request"] #[inline(always)] #[must_use] - pub fn tempavgreq(&mut self) -> TEMPAVGREQ_W<4> { - TEMPAVGREQ_W::new(self) + pub fn tempavgreq(&mut self) -> TempavgreqW { + TempavgreqW::new(self, 4) } #[doc = "Bit 10 - Scale voltage to Vscale1"] #[inline(always)] #[must_use] - pub fn em01vscale1(&mut self) -> EM01VSCALE1_W<10> { - EM01VSCALE1_W::new(self) + pub fn em01vscale1(&mut self) -> Em01vscale1W { + Em01vscale1W::new(self, 10) } #[doc = "Bit 11 - Scale voltage to Vscale2"] #[inline(always)] #[must_use] - pub fn em01vscale2(&mut self) -> EM01VSCALE2_W<11> { - EM01VSCALE2_W::new(self) + pub fn em01vscale2(&mut self) -> Em01vscale2W { + Em01vscale2W::new(self, 11) } #[doc = "Bit 17 - Reset Cause Clear"] #[inline(always)] #[must_use] - pub fn rstcauseclr(&mut self) -> RSTCAUSECLR_W<17> { - RSTCAUSECLR_W::new(self) + pub fn rstcauseclr(&mut self) -> RstcauseclrW { + RstcauseclrW::new(self, 17) } #[doc = "Bit 18 - Tamper Reset Cause Clear"] #[inline(always)] #[must_use] - pub fn tamperrcclr(&mut self) -> TAMPERRCCLR_W<18> { - TAMPERRCCLR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn tamperrcclr(&mut self) -> TamperrcclrW { + TamperrcclrW::new(self, 18) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/ctrl.rs index 07e83fa..a46f36e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/ctrl.rs @@ -1,278 +1,248 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EM2DBGEN` reader - Enable debugging in EM2"] -pub type EM2DBGEN_R = crate::BitReader; +pub type Em2dbgenR = crate::BitReader; #[doc = "Field `EM2DBGEN` writer - Enable debugging in EM2"] -pub type EM2DBGEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; -#[doc = "Field `TEMPAVGNUM` reader - Averaged Temperature samples num"] -pub type TEMPAVGNUM_R = crate::BitReader; +pub type Em2dbgenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Averaged Temperature samples num\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TEMPAVGNUM_A { +pub enum Tempavgnum { #[doc = "0: 16 measurements"] N16 = 0, #[doc = "1: 64 measurements"] N64 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TEMPAVGNUM_A) -> Self { + fn from(variant: Tempavgnum) -> Self { variant as u8 != 0 } } -impl TEMPAVGNUM_R { +#[doc = "Field `TEMPAVGNUM` reader - Averaged Temperature samples num"] +pub type TempavgnumR = crate::BitReader; +impl TempavgnumR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TEMPAVGNUM_A { + pub const fn variant(&self) -> Tempavgnum { match self.bits { - false => TEMPAVGNUM_A::N16, - true => TEMPAVGNUM_A::N64, + false => Tempavgnum::N16, + true => Tempavgnum::N64, } } - #[doc = "Checks if the value of the field is `N16`"] + #[doc = "16 measurements"] #[inline(always)] pub fn is_n16(&self) -> bool { - *self == TEMPAVGNUM_A::N16 + *self == Tempavgnum::N16 } - #[doc = "Checks if the value of the field is `N64`"] + #[doc = "64 measurements"] #[inline(always)] pub fn is_n64(&self) -> bool { - *self == TEMPAVGNUM_A::N64 + *self == Tempavgnum::N64 } } #[doc = "Field `TEMPAVGNUM` writer - Averaged Temperature samples num"] -pub type TEMPAVGNUM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, TEMPAVGNUM_A, O>; -impl<'a, const O: u8> TEMPAVGNUM_W<'a, O> { +pub type TempavgnumW<'a, REG> = crate::BitWriter<'a, REG, Tempavgnum>; +impl<'a, REG> TempavgnumW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "16 measurements"] #[inline(always)] - pub fn n16(self) -> &'a mut W { - self.variant(TEMPAVGNUM_A::N16) + pub fn n16(self) -> &'a mut crate::W { + self.variant(Tempavgnum::N16) } #[doc = "64 measurements"] #[inline(always)] - pub fn n64(self) -> &'a mut W { - self.variant(TEMPAVGNUM_A::N64) + pub fn n64(self) -> &'a mut crate::W { + self.variant(Tempavgnum::N64) } } -#[doc = "Field `EM23VSCALE` reader - EM2/EM3 Vscale"] -pub type EM23VSCALE_R = crate::FieldReader; #[doc = "EM2/EM3 Vscale\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EM23VSCALE_A { +pub enum Em23vscale { #[doc = "0: VSCALE0. 0.9v"] - VSCALE0 = 0, + Vscale0 = 0, #[doc = "1: VSCALE1. 1.0v"] - VSCALE1 = 1, + Vscale1 = 1, #[doc = "2: VSCALE2. 1.1v"] - VSCALE2 = 2, + Vscale2 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EM23VSCALE_A) -> Self { + fn from(variant: Em23vscale) -> Self { variant as _ } } -impl EM23VSCALE_R { +impl crate::FieldSpec for Em23vscale { + type Ux = u8; +} +impl crate::IsEnum for Em23vscale {} +#[doc = "Field `EM23VSCALE` reader - EM2/EM3 Vscale"] +pub type Em23vscaleR = crate::FieldReader; +impl Em23vscaleR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(EM23VSCALE_A::VSCALE0), - 1 => Some(EM23VSCALE_A::VSCALE1), - 2 => Some(EM23VSCALE_A::VSCALE2), + 0 => Some(Em23vscale::Vscale0), + 1 => Some(Em23vscale::Vscale1), + 2 => Some(Em23vscale::Vscale2), _ => None, } } - #[doc = "Checks if the value of the field is `VSCALE0`"] + #[doc = "VSCALE0. 0.9v"] #[inline(always)] pub fn is_vscale0(&self) -> bool { - *self == EM23VSCALE_A::VSCALE0 + *self == Em23vscale::Vscale0 } - #[doc = "Checks if the value of the field is `VSCALE1`"] + #[doc = "VSCALE1. 1.0v"] #[inline(always)] pub fn is_vscale1(&self) -> bool { - *self == EM23VSCALE_A::VSCALE1 + *self == Em23vscale::Vscale1 } - #[doc = "Checks if the value of the field is `VSCALE2`"] + #[doc = "VSCALE2. 1.1v"] #[inline(always)] pub fn is_vscale2(&self) -> bool { - *self == EM23VSCALE_A::VSCALE2 + *self == Em23vscale::Vscale2 } } #[doc = "Field `EM23VSCALE` writer - EM2/EM3 Vscale"] -pub type EM23VSCALE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CTRL_SPEC, u8, EM23VSCALE_A, 2, O>; -impl<'a, const O: u8> EM23VSCALE_W<'a, O> { +pub type Em23vscaleW<'a, REG> = crate::FieldWriter<'a, REG, 2, Em23vscale>; +impl<'a, REG> Em23vscaleW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "VSCALE0. 0.9v"] #[inline(always)] - pub fn vscale0(self) -> &'a mut W { - self.variant(EM23VSCALE_A::VSCALE0) + pub fn vscale0(self) -> &'a mut crate::W { + self.variant(Em23vscale::Vscale0) } #[doc = "VSCALE1. 1.0v"] #[inline(always)] - pub fn vscale1(self) -> &'a mut W { - self.variant(EM23VSCALE_A::VSCALE1) + pub fn vscale1(self) -> &'a mut crate::W { + self.variant(Em23vscale::Vscale1) } #[doc = "VSCALE2. 1.1v"] #[inline(always)] - pub fn vscale2(self) -> &'a mut W { - self.variant(EM23VSCALE_A::VSCALE2) + pub fn vscale2(self) -> &'a mut crate::W { + self.variant(Em23vscale::Vscale2) } } #[doc = "Field `FLASHPWRUPONDEMAND` reader - Enable flash on demand wakeup"] -pub type FLASHPWRUPONDEMAND_R = crate::BitReader; +pub type FlashpwrupondemandR = crate::BitReader; #[doc = "Field `FLASHPWRUPONDEMAND` writer - Enable flash on demand wakeup"] -pub type FLASHPWRUPONDEMAND_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type FlashpwrupondemandW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EFPDIRECTMODEEN` reader - EFP Direct Mode Enable"] -pub type EFPDIRECTMODEEN_R = crate::BitReader; +pub type EfpdirectmodeenR = crate::BitReader; #[doc = "Field `EFPDIRECTMODEEN` writer - EFP Direct Mode Enable"] -pub type EFPDIRECTMODEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type EfpdirectmodeenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EFPDRVDECOUPLE` reader - EFP drives DECOUPLE"] -pub type EFPDRVDECOUPLE_R = crate::BitReader; +pub type EfpdrvdecoupleR = crate::BitReader; #[doc = "Field `EFPDRVDECOUPLE` writer - EFP drives DECOUPLE"] -pub type EFPDRVDECOUPLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type EfpdrvdecoupleW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EFPDRVDVDD` reader - EFP drives DVDD"] -pub type EFPDRVDVDD_R = crate::BitReader; +pub type EfpdrvdvddR = crate::BitReader; #[doc = "Field `EFPDRVDVDD` writer - EFP drives DVDD"] -pub type EFPDRVDVDD_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type EfpdrvdvddW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Enable debugging in EM2"] #[inline(always)] - pub fn em2dbgen(&self) -> EM2DBGEN_R { - EM2DBGEN_R::new((self.bits & 1) != 0) + pub fn em2dbgen(&self) -> Em2dbgenR { + Em2dbgenR::new((self.bits & 1) != 0) } #[doc = "Bit 3 - Averaged Temperature samples num"] #[inline(always)] - pub fn tempavgnum(&self) -> TEMPAVGNUM_R { - TEMPAVGNUM_R::new(((self.bits >> 3) & 1) != 0) + pub fn tempavgnum(&self) -> TempavgnumR { + TempavgnumR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 8:9 - EM2/EM3 Vscale"] #[inline(always)] - pub fn em23vscale(&self) -> EM23VSCALE_R { - EM23VSCALE_R::new(((self.bits >> 8) & 3) as u8) + pub fn em23vscale(&self) -> Em23vscaleR { + Em23vscaleR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 16 - Enable flash on demand wakeup"] #[inline(always)] - pub fn flashpwrupondemand(&self) -> FLASHPWRUPONDEMAND_R { - FLASHPWRUPONDEMAND_R::new(((self.bits >> 16) & 1) != 0) + pub fn flashpwrupondemand(&self) -> FlashpwrupondemandR { + FlashpwrupondemandR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 29 - EFP Direct Mode Enable"] #[inline(always)] - pub fn efpdirectmodeen(&self) -> EFPDIRECTMODEEN_R { - EFPDIRECTMODEEN_R::new(((self.bits >> 29) & 1) != 0) + pub fn efpdirectmodeen(&self) -> EfpdirectmodeenR { + EfpdirectmodeenR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - EFP drives DECOUPLE"] #[inline(always)] - pub fn efpdrvdecouple(&self) -> EFPDRVDECOUPLE_R { - EFPDRVDECOUPLE_R::new(((self.bits >> 30) & 1) != 0) + pub fn efpdrvdecouple(&self) -> EfpdrvdecoupleR { + EfpdrvdecoupleR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - EFP drives DVDD"] #[inline(always)] - pub fn efpdrvdvdd(&self) -> EFPDRVDVDD_R { - EFPDRVDVDD_R::new(((self.bits >> 31) & 1) != 0) + pub fn efpdrvdvdd(&self) -> EfpdrvdvddR { + EfpdrvdvddR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable debugging in EM2"] #[inline(always)] #[must_use] - pub fn em2dbgen(&mut self) -> EM2DBGEN_W<0> { - EM2DBGEN_W::new(self) + pub fn em2dbgen(&mut self) -> Em2dbgenW { + Em2dbgenW::new(self, 0) } #[doc = "Bit 3 - Averaged Temperature samples num"] #[inline(always)] #[must_use] - pub fn tempavgnum(&mut self) -> TEMPAVGNUM_W<3> { - TEMPAVGNUM_W::new(self) + pub fn tempavgnum(&mut self) -> TempavgnumW { + TempavgnumW::new(self, 3) } #[doc = "Bits 8:9 - EM2/EM3 Vscale"] #[inline(always)] #[must_use] - pub fn em23vscale(&mut self) -> EM23VSCALE_W<8> { - EM23VSCALE_W::new(self) + pub fn em23vscale(&mut self) -> Em23vscaleW { + Em23vscaleW::new(self, 8) } #[doc = "Bit 16 - Enable flash on demand wakeup"] #[inline(always)] #[must_use] - pub fn flashpwrupondemand(&mut self) -> FLASHPWRUPONDEMAND_W<16> { - FLASHPWRUPONDEMAND_W::new(self) + pub fn flashpwrupondemand(&mut self) -> FlashpwrupondemandW { + FlashpwrupondemandW::new(self, 16) } #[doc = "Bit 29 - EFP Direct Mode Enable"] #[inline(always)] #[must_use] - pub fn efpdirectmodeen(&mut self) -> EFPDIRECTMODEEN_W<29> { - EFPDIRECTMODEEN_W::new(self) + pub fn efpdirectmodeen(&mut self) -> EfpdirectmodeenW { + EfpdirectmodeenW::new(self, 29) } #[doc = "Bit 30 - EFP drives DECOUPLE"] #[inline(always)] #[must_use] - pub fn efpdrvdecouple(&mut self) -> EFPDRVDECOUPLE_W<30> { - EFPDRVDECOUPLE_W::new(self) + pub fn efpdrvdecouple(&mut self) -> EfpdrvdecoupleW { + EfpdrvdecoupleW::new(self, 30) } #[doc = "Bit 31 - EFP drives DVDD"] #[inline(always)] #[must_use] - pub fn efpdrvdvdd(&mut self) -> EFPDRVDVDD_W<31> { - EFPDRVDVDD_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn efpdrvdvdd(&mut self) -> EfpdrvdvddW { + EfpdrvdvddW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0x0200"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0200; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0x0200; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/decbod.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/decbod.rs index 70bc9a1..6a1fd18 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/decbod.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/decbod.rs @@ -1,125 +1,85 @@ #[doc = "Register `DECBOD` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DECBOD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DECBODEN` reader - DECBOD enable"] -pub type DECBODEN_R = crate::BitReader; +pub type DecbodenR = crate::BitReader; #[doc = "Field `DECBODEN` writer - DECBOD enable"] -pub type DECBODEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DECBOD_SPEC, bool, O>; +pub type DecbodenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DECBODMASK` reader - DECBOD Mask"] -pub type DECBODMASK_R = crate::BitReader; +pub type DecbodmaskR = crate::BitReader; #[doc = "Field `DECBODMASK` writer - DECBOD Mask"] -pub type DECBODMASK_W<'a, const O: u8> = crate::BitWriter<'a, u32, DECBOD_SPEC, bool, O>; +pub type DecbodmaskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DECOVMBODEN` reader - Over Voltage Monitor enable"] -pub type DECOVMBODEN_R = crate::BitReader; +pub type DecovmbodenR = crate::BitReader; #[doc = "Field `DECOVMBODEN` writer - Over Voltage Monitor enable"] -pub type DECOVMBODEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DECBOD_SPEC, bool, O>; +pub type DecovmbodenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DECOVMBODMASK` reader - Over Voltage Monitor Mask"] -pub type DECOVMBODMASK_R = crate::BitReader; +pub type DecovmbodmaskR = crate::BitReader; #[doc = "Field `DECOVMBODMASK` writer - Over Voltage Monitor Mask"] -pub type DECOVMBODMASK_W<'a, const O: u8> = crate::BitWriter<'a, u32, DECBOD_SPEC, bool, O>; +pub type DecovmbodmaskW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DECBOD enable"] #[inline(always)] - pub fn decboden(&self) -> DECBODEN_R { - DECBODEN_R::new((self.bits & 1) != 0) + pub fn decboden(&self) -> DecbodenR { + DecbodenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DECBOD Mask"] #[inline(always)] - pub fn decbodmask(&self) -> DECBODMASK_R { - DECBODMASK_R::new(((self.bits >> 1) & 1) != 0) + pub fn decbodmask(&self) -> DecbodmaskR { + DecbodmaskR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 4 - Over Voltage Monitor enable"] #[inline(always)] - pub fn decovmboden(&self) -> DECOVMBODEN_R { - DECOVMBODEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn decovmboden(&self) -> DecovmbodenR { + DecovmbodenR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Over Voltage Monitor Mask"] #[inline(always)] - pub fn decovmbodmask(&self) -> DECOVMBODMASK_R { - DECOVMBODMASK_R::new(((self.bits >> 5) & 1) != 0) + pub fn decovmbodmask(&self) -> DecovmbodmaskR { + DecovmbodmaskR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - DECBOD enable"] #[inline(always)] #[must_use] - pub fn decboden(&mut self) -> DECBODEN_W<0> { - DECBODEN_W::new(self) + pub fn decboden(&mut self) -> DecbodenW { + DecbodenW::new(self, 0) } #[doc = "Bit 1 - DECBOD Mask"] #[inline(always)] #[must_use] - pub fn decbodmask(&mut self) -> DECBODMASK_W<1> { - DECBODMASK_W::new(self) + pub fn decbodmask(&mut self) -> DecbodmaskW { + DecbodmaskW::new(self, 1) } #[doc = "Bit 4 - Over Voltage Monitor enable"] #[inline(always)] #[must_use] - pub fn decovmboden(&mut self) -> DECOVMBODEN_W<4> { - DECOVMBODEN_W::new(self) + pub fn decovmboden(&mut self) -> DecovmbodenW { + DecovmbodenW::new(self, 4) } #[doc = "Bit 5 - Over Voltage Monitor Mask"] #[inline(always)] #[must_use] - pub fn decovmbodmask(&mut self) -> DECOVMBODMASK_W<5> { - DECOVMBODMASK_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn decovmbodmask(&mut self) -> DecovmbodmaskW { + DecovmbodmaskW::new(self, 5) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [decbod](index.html) module"] -pub struct DECBOD_SPEC; -impl crate::RegisterSpec for DECBOD_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`decbod::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`decbod::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DecbodSpec; +impl crate::RegisterSpec for DecbodSpec { type Ux = u32; } -#[doc = "`read()` method returns [decbod::R](R) reader structure"] -impl crate::Readable for DECBOD_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [decbod::W](W) writer structure"] -impl crate::Writable for DECBOD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`decbod::R`](R) reader structure"] +impl crate::Readable for DecbodSpec {} +#[doc = "`write(|w| ..)` method takes [`decbod::W`](W) writer structure"] +impl crate::Writable for DecbodSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DECBOD to value 0x22"] -impl crate::Resettable for DECBOD_SPEC { - const RESET_VALUE: Self::Ux = 0x22; +impl crate::Resettable for DecbodSpec { + const RESET_VALUE: u32 = 0x22; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/dgien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/dgien.rs index 5025d27..f0d6045 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/dgien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/dgien.rs @@ -1,125 +1,85 @@ #[doc = "Register `DGIEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DGIEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EM23WAKEUPDGIEN` reader - EM23 Wake up Interrupt enable"] -pub type EM23WAKEUPDGIEN_R = crate::BitReader; +pub type Em23wakeupdgienR = crate::BitReader; #[doc = "Field `EM23WAKEUPDGIEN` writer - EM23 Wake up Interrupt enable"] -pub type EM23WAKEUPDGIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DGIEN_SPEC, bool, O>; +pub type Em23wakeupdgienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMPDGIEN` reader - Temperature Interrupt enable"] -pub type TEMPDGIEN_R = crate::BitReader; +pub type TempdgienR = crate::BitReader; #[doc = "Field `TEMPDGIEN` writer - Temperature Interrupt enable"] -pub type TEMPDGIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DGIEN_SPEC, bool, O>; +pub type TempdgienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMPLOWDGIEN` reader - Temperature low Interrupt enable"] -pub type TEMPLOWDGIEN_R = crate::BitReader; +pub type TemplowdgienR = crate::BitReader; #[doc = "Field `TEMPLOWDGIEN` writer - Temperature low Interrupt enable"] -pub type TEMPLOWDGIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DGIEN_SPEC, bool, O>; +pub type TemplowdgienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMPHIGHDGIEN` reader - Temperature high Interrupt enable"] -pub type TEMPHIGHDGIEN_R = crate::BitReader; +pub type TemphighdgienR = crate::BitReader; #[doc = "Field `TEMPHIGHDGIEN` writer - Temperature high Interrupt enable"] -pub type TEMPHIGHDGIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DGIEN_SPEC, bool, O>; +pub type TemphighdgienW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 24 - EM23 Wake up Interrupt enable"] #[inline(always)] - pub fn em23wakeupdgien(&self) -> EM23WAKEUPDGIEN_R { - EM23WAKEUPDGIEN_R::new(((self.bits >> 24) & 1) != 0) + pub fn em23wakeupdgien(&self) -> Em23wakeupdgienR { + Em23wakeupdgienR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 29 - Temperature Interrupt enable"] #[inline(always)] - pub fn tempdgien(&self) -> TEMPDGIEN_R { - TEMPDGIEN_R::new(((self.bits >> 29) & 1) != 0) + pub fn tempdgien(&self) -> TempdgienR { + TempdgienR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Temperature low Interrupt enable"] #[inline(always)] - pub fn templowdgien(&self) -> TEMPLOWDGIEN_R { - TEMPLOWDGIEN_R::new(((self.bits >> 30) & 1) != 0) + pub fn templowdgien(&self) -> TemplowdgienR { + TemplowdgienR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Temperature high Interrupt enable"] #[inline(always)] - pub fn temphighdgien(&self) -> TEMPHIGHDGIEN_R { - TEMPHIGHDGIEN_R::new(((self.bits >> 31) & 1) != 0) + pub fn temphighdgien(&self) -> TemphighdgienR { + TemphighdgienR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 24 - EM23 Wake up Interrupt enable"] #[inline(always)] #[must_use] - pub fn em23wakeupdgien(&mut self) -> EM23WAKEUPDGIEN_W<24> { - EM23WAKEUPDGIEN_W::new(self) + pub fn em23wakeupdgien(&mut self) -> Em23wakeupdgienW { + Em23wakeupdgienW::new(self, 24) } #[doc = "Bit 29 - Temperature Interrupt enable"] #[inline(always)] #[must_use] - pub fn tempdgien(&mut self) -> TEMPDGIEN_W<29> { - TEMPDGIEN_W::new(self) + pub fn tempdgien(&mut self) -> TempdgienW { + TempdgienW::new(self, 29) } #[doc = "Bit 30 - Temperature low Interrupt enable"] #[inline(always)] #[must_use] - pub fn templowdgien(&mut self) -> TEMPLOWDGIEN_W<30> { - TEMPLOWDGIEN_W::new(self) + pub fn templowdgien(&mut self) -> TemplowdgienW { + TemplowdgienW::new(self, 30) } #[doc = "Bit 31 - Temperature high Interrupt enable"] #[inline(always)] #[must_use] - pub fn temphighdgien(&mut self) -> TEMPHIGHDGIEN_W<31> { - TEMPHIGHDGIEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn temphighdgien(&mut self) -> TemphighdgienW { + TemphighdgienW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dgien](index.html) module"] -pub struct DGIEN_SPEC; -impl crate::RegisterSpec for DGIEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dgien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dgien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DgienSpec; +impl crate::RegisterSpec for DgienSpec { type Ux = u32; } -#[doc = "`read()` method returns [dgien::R](R) reader structure"] -impl crate::Readable for DGIEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dgien::W](W) writer structure"] -impl crate::Writable for DGIEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dgien::R`](R) reader structure"] +impl crate::Readable for DgienSpec {} +#[doc = "`write(|w| ..)` method takes [`dgien::W`](W) writer structure"] +impl crate::Writable for DgienSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DGIEN to value 0"] -impl crate::Resettable for DGIEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DgienSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/dgif.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/dgif.rs index 8e2dc8d..0c63373 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/dgif.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/dgif.rs @@ -1,125 +1,85 @@ #[doc = "Register `DGIF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DGIF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EM23WAKEUPDGIF` reader - EM23 Wake up Interrupt flag"] -pub type EM23WAKEUPDGIF_R = crate::BitReader; +pub type Em23wakeupdgifR = crate::BitReader; #[doc = "Field `EM23WAKEUPDGIF` writer - EM23 Wake up Interrupt flag"] -pub type EM23WAKEUPDGIF_W<'a, const O: u8> = crate::BitWriter<'a, u32, DGIF_SPEC, bool, O>; +pub type Em23wakeupdgifW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMPDGIF` reader - Temperature Interrupt flag"] -pub type TEMPDGIF_R = crate::BitReader; +pub type TempdgifR = crate::BitReader; #[doc = "Field `TEMPDGIF` writer - Temperature Interrupt flag"] -pub type TEMPDGIF_W<'a, const O: u8> = crate::BitWriter<'a, u32, DGIF_SPEC, bool, O>; +pub type TempdgifW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMPLOWDGIF` reader - Temperature low Interrupt flag"] -pub type TEMPLOWDGIF_R = crate::BitReader; +pub type TemplowdgifR = crate::BitReader; #[doc = "Field `TEMPLOWDGIF` writer - Temperature low Interrupt flag"] -pub type TEMPLOWDGIF_W<'a, const O: u8> = crate::BitWriter<'a, u32, DGIF_SPEC, bool, O>; +pub type TemplowdgifW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMPHIGHDGIF` reader - Temperature high Interrupt flag"] -pub type TEMPHIGHDGIF_R = crate::BitReader; +pub type TemphighdgifR = crate::BitReader; #[doc = "Field `TEMPHIGHDGIF` writer - Temperature high Interrupt flag"] -pub type TEMPHIGHDGIF_W<'a, const O: u8> = crate::BitWriter<'a, u32, DGIF_SPEC, bool, O>; +pub type TemphighdgifW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 24 - EM23 Wake up Interrupt flag"] #[inline(always)] - pub fn em23wakeupdgif(&self) -> EM23WAKEUPDGIF_R { - EM23WAKEUPDGIF_R::new(((self.bits >> 24) & 1) != 0) + pub fn em23wakeupdgif(&self) -> Em23wakeupdgifR { + Em23wakeupdgifR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 29 - Temperature Interrupt flag"] #[inline(always)] - pub fn tempdgif(&self) -> TEMPDGIF_R { - TEMPDGIF_R::new(((self.bits >> 29) & 1) != 0) + pub fn tempdgif(&self) -> TempdgifR { + TempdgifR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Temperature low Interrupt flag"] #[inline(always)] - pub fn templowdgif(&self) -> TEMPLOWDGIF_R { - TEMPLOWDGIF_R::new(((self.bits >> 30) & 1) != 0) + pub fn templowdgif(&self) -> TemplowdgifR { + TemplowdgifR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Temperature high Interrupt flag"] #[inline(always)] - pub fn temphighdgif(&self) -> TEMPHIGHDGIF_R { - TEMPHIGHDGIF_R::new(((self.bits >> 31) & 1) != 0) + pub fn temphighdgif(&self) -> TemphighdgifR { + TemphighdgifR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 24 - EM23 Wake up Interrupt flag"] #[inline(always)] #[must_use] - pub fn em23wakeupdgif(&mut self) -> EM23WAKEUPDGIF_W<24> { - EM23WAKEUPDGIF_W::new(self) + pub fn em23wakeupdgif(&mut self) -> Em23wakeupdgifW { + Em23wakeupdgifW::new(self, 24) } #[doc = "Bit 29 - Temperature Interrupt flag"] #[inline(always)] #[must_use] - pub fn tempdgif(&mut self) -> TEMPDGIF_W<29> { - TEMPDGIF_W::new(self) + pub fn tempdgif(&mut self) -> TempdgifW { + TempdgifW::new(self, 29) } #[doc = "Bit 30 - Temperature low Interrupt flag"] #[inline(always)] #[must_use] - pub fn templowdgif(&mut self) -> TEMPLOWDGIF_W<30> { - TEMPLOWDGIF_W::new(self) + pub fn templowdgif(&mut self) -> TemplowdgifW { + TemplowdgifW::new(self, 30) } #[doc = "Bit 31 - Temperature high Interrupt flag"] #[inline(always)] #[must_use] - pub fn temphighdgif(&mut self) -> TEMPHIGHDGIF_W<31> { - TEMPHIGHDGIF_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn temphighdgif(&mut self) -> TemphighdgifW { + TemphighdgifW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dgif](index.html) module"] -pub struct DGIF_SPEC; -impl crate::RegisterSpec for DGIF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dgif::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dgif::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DgifSpec; +impl crate::RegisterSpec for DgifSpec { type Ux = u32; } -#[doc = "`read()` method returns [dgif::R](R) reader structure"] -impl crate::Readable for DGIF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dgif::W](W) writer structure"] -impl crate::Writable for DGIF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dgif::R`](R) reader structure"] +impl crate::Readable for DgifSpec {} +#[doc = "`write(|w| ..)` method takes [`dgif::W`](W) writer structure"] +impl crate::Writable for DgifSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DGIF to value 0"] -impl crate::Resettable for DGIF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DgifSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/efpien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/efpien.rs index 814f3eb..aee6c4b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/efpien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/efpien.rs @@ -1,80 +1,40 @@ #[doc = "Register `EFPIEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EFPIEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EFPIEN` reader - EFP Interrupt enable"] -pub type EFPIEN_R = crate::BitReader; +pub type EfpienR = crate::BitReader; #[doc = "Field `EFPIEN` writer - EFP Interrupt enable"] -pub type EFPIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EFPIEN_SPEC, bool, O>; +pub type EfpienW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - EFP Interrupt enable"] #[inline(always)] - pub fn efpien(&self) -> EFPIEN_R { - EFPIEN_R::new((self.bits & 1) != 0) + pub fn efpien(&self) -> EfpienR { + EfpienR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - EFP Interrupt enable"] #[inline(always)] #[must_use] - pub fn efpien(&mut self) -> EFPIEN_W<0> { - EFPIEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn efpien(&mut self) -> EfpienW { + EfpienW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [efpien](index.html) module"] -pub struct EFPIEN_SPEC; -impl crate::RegisterSpec for EFPIEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`efpien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`efpien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EfpienSpec; +impl crate::RegisterSpec for EfpienSpec { type Ux = u32; } -#[doc = "`read()` method returns [efpien::R](R) reader structure"] -impl crate::Readable for EFPIEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [efpien::W](W) writer structure"] -impl crate::Writable for EFPIEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`efpien::R`](R) reader structure"] +impl crate::Readable for EfpienSpec {} +#[doc = "`write(|w| ..)` method takes [`efpien::W`](W) writer structure"] +impl crate::Writable for EfpienSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EFPIEN to value 0"] -impl crate::Resettable for EFPIEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EfpienSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/efpif.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/efpif.rs index ae2f261..aa1dad8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/efpif.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/efpif.rs @@ -1,80 +1,40 @@ #[doc = "Register `EFPIF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EFPIF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EFPIF` reader - EFP Interrupt Flag"] -pub type EFPIF_R = crate::BitReader; +pub type EfpifR = crate::BitReader; #[doc = "Field `EFPIF` writer - EFP Interrupt Flag"] -pub type EFPIF_W<'a, const O: u8> = crate::BitWriter<'a, u32, EFPIF_SPEC, bool, O>; +pub type EfpifW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - EFP Interrupt Flag"] #[inline(always)] - pub fn efpif(&self) -> EFPIF_R { - EFPIF_R::new((self.bits & 1) != 0) + pub fn efpif(&self) -> EfpifR { + EfpifR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - EFP Interrupt Flag"] #[inline(always)] #[must_use] - pub fn efpif(&mut self) -> EFPIF_W<0> { - EFPIF_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn efpif(&mut self) -> EfpifW { + EfpifW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [efpif](index.html) module"] -pub struct EFPIF_SPEC; -impl crate::RegisterSpec for EFPIF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`efpif::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`efpif::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EfpifSpec; +impl crate::RegisterSpec for EfpifSpec { type Ux = u32; } -#[doc = "`read()` method returns [efpif::R](R) reader structure"] -impl crate::Readable for EFPIF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [efpif::W](W) writer structure"] -impl crate::Writable for EFPIF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`efpif::R`](R) reader structure"] +impl crate::Readable for EfpifSpec {} +#[doc = "`write(|w| ..)` method takes [`efpif::W`](W) writer structure"] +impl crate::Writable for EfpifSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EFPIF to value 0"] -impl crate::Resettable for EFPIF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EfpifSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/em4ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/em4ctrl.rs index b971f4d..9638dc2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/em4ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/em4ctrl.rs @@ -1,172 +1,139 @@ #[doc = "Register `EM4CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EM4CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EM4ENTRY` reader - EM4 entry request"] -pub type EM4ENTRY_R = crate::FieldReader; +pub type Em4entryR = crate::FieldReader; #[doc = "Field `EM4ENTRY` writer - EM4 entry request"] -pub type EM4ENTRY_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EM4CTRL_SPEC, u8, u8, 2, O>; -#[doc = "Field `EM4IORETMODE` reader - EM4 IO retention mode"] -pub type EM4IORETMODE_R = crate::FieldReader; +pub type Em4entryW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "EM4 IO retention mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EM4IORETMODE_A { +pub enum Em4ioretmode { #[doc = "0: No Retention: Pads enter reset state when entering EM4"] - DISABLE = 0, + Disable = 0, #[doc = "1: Retention through EM4: Pads enter reset state when exiting EM4"] - EM4EXIT = 1, + Em4exit = 1, #[doc = "2: Retention through EM4 and Wakeup: software writes UNLATCH register to remove retention"] - SWUNLATCH = 2, + Swunlatch = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EM4IORETMODE_A) -> Self { + fn from(variant: Em4ioretmode) -> Self { variant as _ } } -impl EM4IORETMODE_R { +impl crate::FieldSpec for Em4ioretmode { + type Ux = u8; +} +impl crate::IsEnum for Em4ioretmode {} +#[doc = "Field `EM4IORETMODE` reader - EM4 IO retention mode"] +pub type Em4ioretmodeR = crate::FieldReader; +impl Em4ioretmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(EM4IORETMODE_A::DISABLE), - 1 => Some(EM4IORETMODE_A::EM4EXIT), - 2 => Some(EM4IORETMODE_A::SWUNLATCH), + 0 => Some(Em4ioretmode::Disable), + 1 => Some(Em4ioretmode::Em4exit), + 2 => Some(Em4ioretmode::Swunlatch), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "No Retention: Pads enter reset state when entering EM4"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EM4IORETMODE_A::DISABLE + *self == Em4ioretmode::Disable } - #[doc = "Checks if the value of the field is `EM4EXIT`"] + #[doc = "Retention through EM4: Pads enter reset state when exiting EM4"] #[inline(always)] pub fn is_em4exit(&self) -> bool { - *self == EM4IORETMODE_A::EM4EXIT + *self == Em4ioretmode::Em4exit } - #[doc = "Checks if the value of the field is `SWUNLATCH`"] + #[doc = "Retention through EM4 and Wakeup: software writes UNLATCH register to remove retention"] #[inline(always)] pub fn is_swunlatch(&self) -> bool { - *self == EM4IORETMODE_A::SWUNLATCH + *self == Em4ioretmode::Swunlatch } } #[doc = "Field `EM4IORETMODE` writer - EM4 IO retention mode"] -pub type EM4IORETMODE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EM4CTRL_SPEC, u8, EM4IORETMODE_A, 2, O>; -impl<'a, const O: u8> EM4IORETMODE_W<'a, O> { +pub type Em4ioretmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Em4ioretmode>; +impl<'a, REG> Em4ioretmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No Retention: Pads enter reset state when entering EM4"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EM4IORETMODE_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Em4ioretmode::Disable) } #[doc = "Retention through EM4: Pads enter reset state when exiting EM4"] #[inline(always)] - pub fn em4exit(self) -> &'a mut W { - self.variant(EM4IORETMODE_A::EM4EXIT) + pub fn em4exit(self) -> &'a mut crate::W { + self.variant(Em4ioretmode::Em4exit) } #[doc = "Retention through EM4 and Wakeup: software writes UNLATCH register to remove retention"] #[inline(always)] - pub fn swunlatch(self) -> &'a mut W { - self.variant(EM4IORETMODE_A::SWUNLATCH) + pub fn swunlatch(self) -> &'a mut crate::W { + self.variant(Em4ioretmode::Swunlatch) } } #[doc = "Field `BOD3SENSEEM4WU` reader - Set BOD3SENSE as EM4 wakeup"] -pub type BOD3SENSEEM4WU_R = crate::BitReader; +pub type Bod3senseem4wuR = crate::BitReader; #[doc = "Field `BOD3SENSEEM4WU` writer - Set BOD3SENSE as EM4 wakeup"] -pub type BOD3SENSEEM4WU_W<'a, const O: u8> = crate::BitWriter<'a, u32, EM4CTRL_SPEC, bool, O>; +pub type Bod3senseem4wuW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - EM4 entry request"] #[inline(always)] - pub fn em4entry(&self) -> EM4ENTRY_R { - EM4ENTRY_R::new((self.bits & 3) as u8) + pub fn em4entry(&self) -> Em4entryR { + Em4entryR::new((self.bits & 3) as u8) } #[doc = "Bits 4:5 - EM4 IO retention mode"] #[inline(always)] - pub fn em4ioretmode(&self) -> EM4IORETMODE_R { - EM4IORETMODE_R::new(((self.bits >> 4) & 3) as u8) + pub fn em4ioretmode(&self) -> Em4ioretmodeR { + Em4ioretmodeR::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bit 8 - Set BOD3SENSE as EM4 wakeup"] #[inline(always)] - pub fn bod3senseem4wu(&self) -> BOD3SENSEEM4WU_R { - BOD3SENSEEM4WU_R::new(((self.bits >> 8) & 1) != 0) + pub fn bod3senseem4wu(&self) -> Bod3senseem4wuR { + Bod3senseem4wuR::new(((self.bits >> 8) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - EM4 entry request"] #[inline(always)] #[must_use] - pub fn em4entry(&mut self) -> EM4ENTRY_W<0> { - EM4ENTRY_W::new(self) + pub fn em4entry(&mut self) -> Em4entryW { + Em4entryW::new(self, 0) } #[doc = "Bits 4:5 - EM4 IO retention mode"] #[inline(always)] #[must_use] - pub fn em4ioretmode(&mut self) -> EM4IORETMODE_W<4> { - EM4IORETMODE_W::new(self) + pub fn em4ioretmode(&mut self) -> Em4ioretmodeW { + Em4ioretmodeW::new(self, 4) } #[doc = "Bit 8 - Set BOD3SENSE as EM4 wakeup"] #[inline(always)] #[must_use] - pub fn bod3senseem4wu(&mut self) -> BOD3SENSEEM4WU_W<8> { - BOD3SENSEEM4WU_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn bod3senseem4wu(&mut self) -> Bod3senseem4wuW { + Bod3senseem4wuW::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [em4ctrl](index.html) module"] -pub struct EM4CTRL_SPEC; -impl crate::RegisterSpec for EM4CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em4ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em4ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Em4ctrlSpec; +impl crate::RegisterSpec for Em4ctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [em4ctrl::R](R) reader structure"] -impl crate::Readable for EM4CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [em4ctrl::W](W) writer structure"] -impl crate::Writable for EM4CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`em4ctrl::R`](R) reader structure"] +impl crate::Readable for Em4ctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`em4ctrl::W`](W) writer structure"] +impl crate::Writable for Em4ctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EM4CTRL to value 0"] -impl crate::Resettable for EM4CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Em4ctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/ien.rs index 9552370..fbefbe5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/ien.rs @@ -1,185 +1,145 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `AVDDBOD` reader - AVDD BOD Interrupt enable"] -pub type AVDDBOD_R = crate::BitReader; +pub type AvddbodR = crate::BitReader; #[doc = "Field `AVDDBOD` writer - AVDD BOD Interrupt enable"] -pub type AVDDBOD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AvddbodW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IOVDD0BOD` reader - VDDIO0 BOD Interrupt enable"] -pub type IOVDD0BOD_R = crate::BitReader; +pub type Iovdd0bodR = crate::BitReader; #[doc = "Field `IOVDD0BOD` writer - VDDIO0 BOD Interrupt enable"] -pub type IOVDD0BOD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Iovdd0bodW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM23WAKEUP` reader - EM23 Wake up Interrupt enable"] -pub type EM23WAKEUP_R = crate::BitReader; +pub type Em23wakeupR = crate::BitReader; #[doc = "Field `EM23WAKEUP` writer - EM23 Wake up Interrupt enable"] -pub type EM23WAKEUP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em23wakeupW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VSCALEDONE` reader - Vscale done Interrupt enable"] -pub type VSCALEDONE_R = crate::BitReader; +pub type VscaledoneR = crate::BitReader; #[doc = "Field `VSCALEDONE` writer - Vscale done Interrupt enable"] -pub type VSCALEDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type VscaledoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMPAVG` reader - Temperature Interrupt enable"] -pub type TEMPAVG_R = crate::BitReader; +pub type TempavgR = crate::BitReader; #[doc = "Field `TEMPAVG` writer - Temperature Interrupt enable"] -pub type TEMPAVG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TempavgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMP` reader - Temperature Interrupt enable"] -pub type TEMP_R = crate::BitReader; +pub type TempR = crate::BitReader; #[doc = "Field `TEMP` writer - Temperature Interrupt enable"] -pub type TEMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TempW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMPLOW` reader - Temperature low Interrupt enable"] -pub type TEMPLOW_R = crate::BitReader; +pub type TemplowR = crate::BitReader; #[doc = "Field `TEMPLOW` writer - Temperature low Interrupt enable"] -pub type TEMPLOW_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TemplowW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMPHIGH` reader - Temperature high Interrupt enable"] -pub type TEMPHIGH_R = crate::BitReader; +pub type TemphighR = crate::BitReader; #[doc = "Field `TEMPHIGH` writer - Temperature high Interrupt enable"] -pub type TEMPHIGH_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TemphighW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 16 - AVDD BOD Interrupt enable"] #[inline(always)] - pub fn avddbod(&self) -> AVDDBOD_R { - AVDDBOD_R::new(((self.bits >> 16) & 1) != 0) + pub fn avddbod(&self) -> AvddbodR { + AvddbodR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - VDDIO0 BOD Interrupt enable"] #[inline(always)] - pub fn iovdd0bod(&self) -> IOVDD0BOD_R { - IOVDD0BOD_R::new(((self.bits >> 17) & 1) != 0) + pub fn iovdd0bod(&self) -> Iovdd0bodR { + Iovdd0bodR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 24 - EM23 Wake up Interrupt enable"] #[inline(always)] - pub fn em23wakeup(&self) -> EM23WAKEUP_R { - EM23WAKEUP_R::new(((self.bits >> 24) & 1) != 0) + pub fn em23wakeup(&self) -> Em23wakeupR { + Em23wakeupR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Vscale done Interrupt enable"] #[inline(always)] - pub fn vscaledone(&self) -> VSCALEDONE_R { - VSCALEDONE_R::new(((self.bits >> 25) & 1) != 0) + pub fn vscaledone(&self) -> VscaledoneR { + VscaledoneR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 27 - Temperature Interrupt enable"] #[inline(always)] - pub fn tempavg(&self) -> TEMPAVG_R { - TEMPAVG_R::new(((self.bits >> 27) & 1) != 0) + pub fn tempavg(&self) -> TempavgR { + TempavgR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 29 - Temperature Interrupt enable"] #[inline(always)] - pub fn temp(&self) -> TEMP_R { - TEMP_R::new(((self.bits >> 29) & 1) != 0) + pub fn temp(&self) -> TempR { + TempR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Temperature low Interrupt enable"] #[inline(always)] - pub fn templow(&self) -> TEMPLOW_R { - TEMPLOW_R::new(((self.bits >> 30) & 1) != 0) + pub fn templow(&self) -> TemplowR { + TemplowR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Temperature high Interrupt enable"] #[inline(always)] - pub fn temphigh(&self) -> TEMPHIGH_R { - TEMPHIGH_R::new(((self.bits >> 31) & 1) != 0) + pub fn temphigh(&self) -> TemphighR { + TemphighR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 16 - AVDD BOD Interrupt enable"] #[inline(always)] #[must_use] - pub fn avddbod(&mut self) -> AVDDBOD_W<16> { - AVDDBOD_W::new(self) + pub fn avddbod(&mut self) -> AvddbodW { + AvddbodW::new(self, 16) } #[doc = "Bit 17 - VDDIO0 BOD Interrupt enable"] #[inline(always)] #[must_use] - pub fn iovdd0bod(&mut self) -> IOVDD0BOD_W<17> { - IOVDD0BOD_W::new(self) + pub fn iovdd0bod(&mut self) -> Iovdd0bodW { + Iovdd0bodW::new(self, 17) } #[doc = "Bit 24 - EM23 Wake up Interrupt enable"] #[inline(always)] #[must_use] - pub fn em23wakeup(&mut self) -> EM23WAKEUP_W<24> { - EM23WAKEUP_W::new(self) + pub fn em23wakeup(&mut self) -> Em23wakeupW { + Em23wakeupW::new(self, 24) } #[doc = "Bit 25 - Vscale done Interrupt enable"] #[inline(always)] #[must_use] - pub fn vscaledone(&mut self) -> VSCALEDONE_W<25> { - VSCALEDONE_W::new(self) + pub fn vscaledone(&mut self) -> VscaledoneW { + VscaledoneW::new(self, 25) } #[doc = "Bit 27 - Temperature Interrupt enable"] #[inline(always)] #[must_use] - pub fn tempavg(&mut self) -> TEMPAVG_W<27> { - TEMPAVG_W::new(self) + pub fn tempavg(&mut self) -> TempavgW { + TempavgW::new(self, 27) } #[doc = "Bit 29 - Temperature Interrupt enable"] #[inline(always)] #[must_use] - pub fn temp(&mut self) -> TEMP_W<29> { - TEMP_W::new(self) + pub fn temp(&mut self) -> TempW { + TempW::new(self, 29) } #[doc = "Bit 30 - Temperature low Interrupt enable"] #[inline(always)] #[must_use] - pub fn templow(&mut self) -> TEMPLOW_W<30> { - TEMPLOW_W::new(self) + pub fn templow(&mut self) -> TemplowW { + TemplowW::new(self, 30) } #[doc = "Bit 31 - Temperature high Interrupt enable"] #[inline(always)] #[must_use] - pub fn temphigh(&mut self) -> TEMPHIGH_W<31> { - TEMPHIGH_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn temphigh(&mut self) -> TemphighW { + TemphighW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/if_.rs index 5a1cb8e..21e21a6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/if_.rs @@ -1,185 +1,145 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `AVDDBOD` reader - AVDD BOD Interrupt flag"] -pub type AVDDBOD_R = crate::BitReader; +pub type AvddbodR = crate::BitReader; #[doc = "Field `AVDDBOD` writer - AVDD BOD Interrupt flag"] -pub type AVDDBOD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AvddbodW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IOVDD0BOD` reader - VDDIO0 BOD Interrupt flag"] -pub type IOVDD0BOD_R = crate::BitReader; +pub type Iovdd0bodR = crate::BitReader; #[doc = "Field `IOVDD0BOD` writer - VDDIO0 BOD Interrupt flag"] -pub type IOVDD0BOD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Iovdd0bodW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM23WAKEUP` reader - EM23 Wake up Interrupt flag"] -pub type EM23WAKEUP_R = crate::BitReader; +pub type Em23wakeupR = crate::BitReader; #[doc = "Field `EM23WAKEUP` writer - EM23 Wake up Interrupt flag"] -pub type EM23WAKEUP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Em23wakeupW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VSCALEDONE` reader - Vscale done Interrupt flag"] -pub type VSCALEDONE_R = crate::BitReader; +pub type VscaledoneR = crate::BitReader; #[doc = "Field `VSCALEDONE` writer - Vscale done Interrupt flag"] -pub type VSCALEDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type VscaledoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMPAVG` reader - Temperature Average Interrupt flag"] -pub type TEMPAVG_R = crate::BitReader; +pub type TempavgR = crate::BitReader; #[doc = "Field `TEMPAVG` writer - Temperature Average Interrupt flag"] -pub type TEMPAVG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TempavgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMP` reader - Temperature Interrupt flag"] -pub type TEMP_R = crate::BitReader; +pub type TempR = crate::BitReader; #[doc = "Field `TEMP` writer - Temperature Interrupt flag"] -pub type TEMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TempW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMPLOW` reader - Temperature low Interrupt flag"] -pub type TEMPLOW_R = crate::BitReader; +pub type TemplowR = crate::BitReader; #[doc = "Field `TEMPLOW` writer - Temperature low Interrupt flag"] -pub type TEMPLOW_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TemplowW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMPHIGH` reader - Temperature high Interrupt flag"] -pub type TEMPHIGH_R = crate::BitReader; +pub type TemphighR = crate::BitReader; #[doc = "Field `TEMPHIGH` writer - Temperature high Interrupt flag"] -pub type TEMPHIGH_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TemphighW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 16 - AVDD BOD Interrupt flag"] #[inline(always)] - pub fn avddbod(&self) -> AVDDBOD_R { - AVDDBOD_R::new(((self.bits >> 16) & 1) != 0) + pub fn avddbod(&self) -> AvddbodR { + AvddbodR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - VDDIO0 BOD Interrupt flag"] #[inline(always)] - pub fn iovdd0bod(&self) -> IOVDD0BOD_R { - IOVDD0BOD_R::new(((self.bits >> 17) & 1) != 0) + pub fn iovdd0bod(&self) -> Iovdd0bodR { + Iovdd0bodR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 24 - EM23 Wake up Interrupt flag"] #[inline(always)] - pub fn em23wakeup(&self) -> EM23WAKEUP_R { - EM23WAKEUP_R::new(((self.bits >> 24) & 1) != 0) + pub fn em23wakeup(&self) -> Em23wakeupR { + Em23wakeupR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Vscale done Interrupt flag"] #[inline(always)] - pub fn vscaledone(&self) -> VSCALEDONE_R { - VSCALEDONE_R::new(((self.bits >> 25) & 1) != 0) + pub fn vscaledone(&self) -> VscaledoneR { + VscaledoneR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 27 - Temperature Average Interrupt flag"] #[inline(always)] - pub fn tempavg(&self) -> TEMPAVG_R { - TEMPAVG_R::new(((self.bits >> 27) & 1) != 0) + pub fn tempavg(&self) -> TempavgR { + TempavgR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 29 - Temperature Interrupt flag"] #[inline(always)] - pub fn temp(&self) -> TEMP_R { - TEMP_R::new(((self.bits >> 29) & 1) != 0) + pub fn temp(&self) -> TempR { + TempR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Temperature low Interrupt flag"] #[inline(always)] - pub fn templow(&self) -> TEMPLOW_R { - TEMPLOW_R::new(((self.bits >> 30) & 1) != 0) + pub fn templow(&self) -> TemplowR { + TemplowR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Temperature high Interrupt flag"] #[inline(always)] - pub fn temphigh(&self) -> TEMPHIGH_R { - TEMPHIGH_R::new(((self.bits >> 31) & 1) != 0) + pub fn temphigh(&self) -> TemphighR { + TemphighR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 16 - AVDD BOD Interrupt flag"] #[inline(always)] #[must_use] - pub fn avddbod(&mut self) -> AVDDBOD_W<16> { - AVDDBOD_W::new(self) + pub fn avddbod(&mut self) -> AvddbodW { + AvddbodW::new(self, 16) } #[doc = "Bit 17 - VDDIO0 BOD Interrupt flag"] #[inline(always)] #[must_use] - pub fn iovdd0bod(&mut self) -> IOVDD0BOD_W<17> { - IOVDD0BOD_W::new(self) + pub fn iovdd0bod(&mut self) -> Iovdd0bodW { + Iovdd0bodW::new(self, 17) } #[doc = "Bit 24 - EM23 Wake up Interrupt flag"] #[inline(always)] #[must_use] - pub fn em23wakeup(&mut self) -> EM23WAKEUP_W<24> { - EM23WAKEUP_W::new(self) + pub fn em23wakeup(&mut self) -> Em23wakeupW { + Em23wakeupW::new(self, 24) } #[doc = "Bit 25 - Vscale done Interrupt flag"] #[inline(always)] #[must_use] - pub fn vscaledone(&mut self) -> VSCALEDONE_W<25> { - VSCALEDONE_W::new(self) + pub fn vscaledone(&mut self) -> VscaledoneW { + VscaledoneW::new(self, 25) } #[doc = "Bit 27 - Temperature Average Interrupt flag"] #[inline(always)] #[must_use] - pub fn tempavg(&mut self) -> TEMPAVG_W<27> { - TEMPAVG_W::new(self) + pub fn tempavg(&mut self) -> TempavgW { + TempavgW::new(self, 27) } #[doc = "Bit 29 - Temperature Interrupt flag"] #[inline(always)] #[must_use] - pub fn temp(&mut self) -> TEMP_W<29> { - TEMP_W::new(self) + pub fn temp(&mut self) -> TempW { + TempW::new(self, 29) } #[doc = "Bit 30 - Temperature low Interrupt flag"] #[inline(always)] #[must_use] - pub fn templow(&mut self) -> TEMPLOW_W<30> { - TEMPLOW_W::new(self) + pub fn templow(&mut self) -> TemplowW { + TemplowW::new(self, 30) } #[doc = "Bit 31 - Temperature high Interrupt flag"] #[inline(always)] #[must_use] - pub fn temphigh(&mut self) -> TEMPHIGH_W<31> { - TEMPHIGH_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn temphigh(&mut self) -> TemphighW { + TemphighW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/ipversion.rs index 51dfe84..9b9c016 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "IP Version\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "IP Version\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x02"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/lock.rs index e312a5f..5981b7b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Lock Key\n\nValue on reset: 44520"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "44520: Unlock EMU register"] - UNLOCK = 44520, + Unlock = 44520, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Unlock EMU register"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0xade8"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0xade8; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0xade8; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/pd1paretctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/pd1paretctrl.rs index fd18bcf..58777d9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/pd1paretctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/pd1paretctrl.rs @@ -1,116 +1,83 @@ #[doc = "Register `PD1PARETCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PD1PARETCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `PD1PARETDIS` reader - Disable PD1 Partial Retention"] -pub type PD1PARETDIS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Disable PD1 Partial Retention\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum PD1PARETDIS_A { +pub enum Pd1paretdis { #[doc = "1: Retain associated registers when in EM2/3"] - PERIPHNORETAIN = 1, + Periphnoretain = 1, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: PD1PARETDIS_A) -> Self { + fn from(variant: Pd1paretdis) -> Self { variant as _ } } -impl PD1PARETDIS_R { +impl crate::FieldSpec for Pd1paretdis { + type Ux = u16; +} +impl crate::IsEnum for Pd1paretdis {} +#[doc = "Field `PD1PARETDIS` reader - Disable PD1 Partial Retention"] +pub type Pd1paretdisR = crate::FieldReader; +impl Pd1paretdisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(PD1PARETDIS_A::PERIPHNORETAIN), + 1 => Some(Pd1paretdis::Periphnoretain), _ => None, } } - #[doc = "Checks if the value of the field is `PERIPHNORETAIN`"] + #[doc = "Retain associated registers when in EM2/3"] #[inline(always)] pub fn is_periphnoretain(&self) -> bool { - *self == PD1PARETDIS_A::PERIPHNORETAIN + *self == Pd1paretdis::Periphnoretain } } #[doc = "Field `PD1PARETDIS` writer - Disable PD1 Partial Retention"] -pub type PD1PARETDIS_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PD1PARETCTRL_SPEC, u16, PD1PARETDIS_A, 16, O>; -impl<'a, const O: u8> PD1PARETDIS_W<'a, O> { +pub type Pd1paretdisW<'a, REG> = crate::FieldWriter<'a, REG, 16, Pd1paretdis>; +impl<'a, REG> Pd1paretdisW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Retain associated registers when in EM2/3"] #[inline(always)] - pub fn periphnoretain(self) -> &'a mut W { - self.variant(PD1PARETDIS_A::PERIPHNORETAIN) + pub fn periphnoretain(self) -> &'a mut crate::W { + self.variant(Pd1paretdis::Periphnoretain) } } impl R { #[doc = "Bits 0:15 - Disable PD1 Partial Retention"] #[inline(always)] - pub fn pd1paretdis(&self) -> PD1PARETDIS_R { - PD1PARETDIS_R::new((self.bits & 0xffff) as u16) + pub fn pd1paretdis(&self) -> Pd1paretdisR { + Pd1paretdisR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Disable PD1 Partial Retention"] #[inline(always)] #[must_use] - pub fn pd1paretdis(&mut self) -> PD1PARETDIS_W<0> { - PD1PARETDIS_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pd1paretdis(&mut self) -> Pd1paretdisW { + Pd1paretdisW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pd1paretctrl](index.html) module"] -pub struct PD1PARETCTRL_SPEC; -impl crate::RegisterSpec for PD1PARETCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pd1paretctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pd1paretctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Pd1paretctrlSpec; +impl crate::RegisterSpec for Pd1paretctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [pd1paretctrl::R](R) reader structure"] -impl crate::Readable for PD1PARETCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [pd1paretctrl::W](W) writer structure"] -impl crate::Writable for PD1PARETCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`pd1paretctrl::R`](R) reader structure"] +impl crate::Readable for Pd1paretctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`pd1paretctrl::W`](W) writer structure"] +impl crate::Writable for Pd1paretctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PD1PARETCTRL to value 0"] -impl crate::Resettable for PD1PARETCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Pd1paretctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/rstcause.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/rstcause.rs index af65c17..b8b08b8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/rstcause.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/rstcause.rs @@ -1,128 +1,113 @@ #[doc = "Register `RSTCAUSE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `POR` reader - Power On Reset"] -pub type POR_R = crate::BitReader; +pub type PorR = crate::BitReader; #[doc = "Field `PIN` reader - Pin Reset"] -pub type PIN_R = crate::BitReader; +pub type PinR = crate::BitReader; #[doc = "Field `EM4` reader - EM4 Wakeup Reset"] -pub type EM4_R = crate::BitReader; +pub type Em4R = crate::BitReader; #[doc = "Field `WDOG0` reader - Watchdog 0 Reset"] -pub type WDOG0_R = crate::BitReader; +pub type Wdog0R = crate::BitReader; #[doc = "Field `WDOG1` reader - Watchdog 1 Reset"] -pub type WDOG1_R = crate::BitReader; +pub type Wdog1R = crate::BitReader; #[doc = "Field `LOCKUP` reader - M33 Core Lockup Reset"] -pub type LOCKUP_R = crate::BitReader; +pub type LockupR = crate::BitReader; #[doc = "Field `SYSREQ` reader - M33 Core Sys Reset"] -pub type SYSREQ_R = crate::BitReader; +pub type SysreqR = crate::BitReader; #[doc = "Field `DVDDBOD` reader - HVBOD Reset"] -pub type DVDDBOD_R = crate::BitReader; +pub type DvddbodR = crate::BitReader; #[doc = "Field `DVDDLEBOD` reader - LEBOD Reset"] -pub type DVDDLEBOD_R = crate::BitReader; +pub type DvddlebodR = crate::BitReader; #[doc = "Field `DECBOD` reader - LVBOD Reset"] -pub type DECBOD_R = crate::BitReader; +pub type DecbodR = crate::BitReader; #[doc = "Field `AVDDBOD` reader - LEBOD1 Reset"] -pub type AVDDBOD_R = crate::BitReader; +pub type AvddbodR = crate::BitReader; #[doc = "Field `IOVDD0BOD` reader - LEBOD2 Reset"] -pub type IOVDD0BOD_R = crate::BitReader; +pub type Iovdd0bodR = crate::BitReader; #[doc = "Field `SETAMPER` reader - SE Tamper event Reset"] -pub type SETAMPER_R = crate::BitReader; +pub type SetamperR = crate::BitReader; #[doc = "Field `VREGIN` reader - DCDC VREGIN comparator"] -pub type VREGIN_R = crate::BitReader; +pub type VreginR = crate::BitReader; impl R { #[doc = "Bit 0 - Power On Reset"] #[inline(always)] - pub fn por(&self) -> POR_R { - POR_R::new((self.bits & 1) != 0) + pub fn por(&self) -> PorR { + PorR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Pin Reset"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 1) & 1) != 0) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - EM4 Wakeup Reset"] #[inline(always)] - pub fn em4(&self) -> EM4_R { - EM4_R::new(((self.bits >> 2) & 1) != 0) + pub fn em4(&self) -> Em4R { + Em4R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Watchdog 0 Reset"] #[inline(always)] - pub fn wdog0(&self) -> WDOG0_R { - WDOG0_R::new(((self.bits >> 3) & 1) != 0) + pub fn wdog0(&self) -> Wdog0R { + Wdog0R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Watchdog 1 Reset"] #[inline(always)] - pub fn wdog1(&self) -> WDOG1_R { - WDOG1_R::new(((self.bits >> 4) & 1) != 0) + pub fn wdog1(&self) -> Wdog1R { + Wdog1R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - M33 Core Lockup Reset"] #[inline(always)] - pub fn lockup(&self) -> LOCKUP_R { - LOCKUP_R::new(((self.bits >> 5) & 1) != 0) + pub fn lockup(&self) -> LockupR { + LockupR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - M33 Core Sys Reset"] #[inline(always)] - pub fn sysreq(&self) -> SYSREQ_R { - SYSREQ_R::new(((self.bits >> 6) & 1) != 0) + pub fn sysreq(&self) -> SysreqR { + SysreqR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - HVBOD Reset"] #[inline(always)] - pub fn dvddbod(&self) -> DVDDBOD_R { - DVDDBOD_R::new(((self.bits >> 7) & 1) != 0) + pub fn dvddbod(&self) -> DvddbodR { + DvddbodR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - LEBOD Reset"] #[inline(always)] - pub fn dvddlebod(&self) -> DVDDLEBOD_R { - DVDDLEBOD_R::new(((self.bits >> 8) & 1) != 0) + pub fn dvddlebod(&self) -> DvddlebodR { + DvddlebodR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - LVBOD Reset"] #[inline(always)] - pub fn decbod(&self) -> DECBOD_R { - DECBOD_R::new(((self.bits >> 9) & 1) != 0) + pub fn decbod(&self) -> DecbodR { + DecbodR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - LEBOD1 Reset"] #[inline(always)] - pub fn avddbod(&self) -> AVDDBOD_R { - AVDDBOD_R::new(((self.bits >> 10) & 1) != 0) + pub fn avddbod(&self) -> AvddbodR { + AvddbodR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - LEBOD2 Reset"] #[inline(always)] - pub fn iovdd0bod(&self) -> IOVDD0BOD_R { - IOVDD0BOD_R::new(((self.bits >> 11) & 1) != 0) + pub fn iovdd0bod(&self) -> Iovdd0bodR { + Iovdd0bodR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 13 - SE Tamper event Reset"] #[inline(always)] - pub fn setamper(&self) -> SETAMPER_R { - SETAMPER_R::new(((self.bits >> 13) & 1) != 0) + pub fn setamper(&self) -> SetamperR { + SetamperR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 31 - DCDC VREGIN comparator"] #[inline(always)] - pub fn vregin(&self) -> VREGIN_R { - VREGIN_R::new(((self.bits >> 31) & 1) != 0) + pub fn vregin(&self) -> VreginR { + VreginR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rstcause](index.html) module"] -pub struct RSTCAUSE_SPEC; -impl crate::RegisterSpec for RSTCAUSE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rstcause::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RstcauseSpec; +impl crate::RegisterSpec for RstcauseSpec { type Ux = u32; } -#[doc = "`read()` method returns [rstcause::R](R) reader structure"] -impl crate::Readable for RSTCAUSE_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rstcause::R`](R) reader structure"] +impl crate::Readable for RstcauseSpec {} #[doc = "`reset()` method sets RSTCAUSE to value 0"] -impl crate::Resettable for RSTCAUSE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RstcauseSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/rstctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/rstctrl.rs index 98989fb..9ca4800 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/rstctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/rstctrl.rs @@ -1,433 +1,409 @@ #[doc = "Register `RSTCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RSTCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `WDOG0RMODE` reader - Enable WDOG0 reset"] -pub type WDOG0RMODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Enable WDOG0 reset\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WDOG0RMODE_A { +pub enum Wdog0rmode { #[doc = "0: Reset request is blocked"] - DISABLED = 0, + Disabled = 0, #[doc = "1: The entire device is reset except some EMU registers"] - ENABLED = 1, + Enabled = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WDOG0RMODE_A) -> Self { + fn from(variant: Wdog0rmode) -> Self { variant as u8 != 0 } } -impl WDOG0RMODE_R { +#[doc = "Field `WDOG0RMODE` reader - Enable WDOG0 reset"] +pub type Wdog0rmodeR = crate::BitReader; +impl Wdog0rmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> WDOG0RMODE_A { + pub const fn variant(&self) -> Wdog0rmode { match self.bits { - false => WDOG0RMODE_A::DISABLED, - true => WDOG0RMODE_A::ENABLED, + false => Wdog0rmode::Disabled, + true => Wdog0rmode::Enabled, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Reset request is blocked"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == WDOG0RMODE_A::DISABLED + *self == Wdog0rmode::Disabled } - #[doc = "Checks if the value of the field is `ENABLED`"] + #[doc = "The entire device is reset except some EMU registers"] #[inline(always)] pub fn is_enabled(&self) -> bool { - *self == WDOG0RMODE_A::ENABLED + *self == Wdog0rmode::Enabled } } #[doc = "Field `WDOG0RMODE` writer - Enable WDOG0 reset"] -pub type WDOG0RMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, RSTCTRL_SPEC, WDOG0RMODE_A, O>; -impl<'a, const O: u8> WDOG0RMODE_W<'a, O> { +pub type Wdog0rmodeW<'a, REG> = crate::BitWriter<'a, REG, Wdog0rmode>; +impl<'a, REG> Wdog0rmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Reset request is blocked"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(WDOG0RMODE_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Wdog0rmode::Disabled) } #[doc = "The entire device is reset except some EMU registers"] #[inline(always)] - pub fn enabled(self) -> &'a mut W { - self.variant(WDOG0RMODE_A::ENABLED) + pub fn enabled(self) -> &'a mut crate::W { + self.variant(Wdog0rmode::Enabled) } } -#[doc = "Field `SYSRMODE` reader - Enable M33 System reset"] -pub type SYSRMODE_R = crate::BitReader; #[doc = "Enable M33 System reset\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYSRMODE_A { +pub enum Sysrmode { #[doc = "0: Reset request is blocked"] - DISABLED = 0, + Disabled = 0, #[doc = "1: Device is reset except some EMU registers"] - ENABLED = 1, + Enabled = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYSRMODE_A) -> Self { + fn from(variant: Sysrmode) -> Self { variant as u8 != 0 } } -impl SYSRMODE_R { +#[doc = "Field `SYSRMODE` reader - Enable M33 System reset"] +pub type SysrmodeR = crate::BitReader; +impl SysrmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SYSRMODE_A { + pub const fn variant(&self) -> Sysrmode { match self.bits { - false => SYSRMODE_A::DISABLED, - true => SYSRMODE_A::ENABLED, + false => Sysrmode::Disabled, + true => Sysrmode::Enabled, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Reset request is blocked"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == SYSRMODE_A::DISABLED + *self == Sysrmode::Disabled } - #[doc = "Checks if the value of the field is `ENABLED`"] + #[doc = "Device is reset except some EMU registers"] #[inline(always)] pub fn is_enabled(&self) -> bool { - *self == SYSRMODE_A::ENABLED + *self == Sysrmode::Enabled } } #[doc = "Field `SYSRMODE` writer - Enable M33 System reset"] -pub type SYSRMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, RSTCTRL_SPEC, SYSRMODE_A, O>; -impl<'a, const O: u8> SYSRMODE_W<'a, O> { +pub type SysrmodeW<'a, REG> = crate::BitWriter<'a, REG, Sysrmode>; +impl<'a, REG> SysrmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Reset request is blocked"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(SYSRMODE_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Sysrmode::Disabled) } #[doc = "Device is reset except some EMU registers"] #[inline(always)] - pub fn enabled(self) -> &'a mut W { - self.variant(SYSRMODE_A::ENABLED) + pub fn enabled(self) -> &'a mut crate::W { + self.variant(Sysrmode::Enabled) } } -#[doc = "Field `LOCKUPRMODE` reader - Enable M33 Lockup reset"] -pub type LOCKUPRMODE_R = crate::BitReader; #[doc = "Enable M33 Lockup reset\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCKUPRMODE_A { +pub enum Lockuprmode { #[doc = "0: Reset Request is Block"] - DISABLED = 0, + Disabled = 0, #[doc = "1: The entire device is reset except some EMU registers"] - ENABLED = 1, + Enabled = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCKUPRMODE_A) -> Self { + fn from(variant: Lockuprmode) -> Self { variant as u8 != 0 } } -impl LOCKUPRMODE_R { +#[doc = "Field `LOCKUPRMODE` reader - Enable M33 Lockup reset"] +pub type LockuprmodeR = crate::BitReader; +impl LockuprmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCKUPRMODE_A { + pub const fn variant(&self) -> Lockuprmode { match self.bits { - false => LOCKUPRMODE_A::DISABLED, - true => LOCKUPRMODE_A::ENABLED, + false => Lockuprmode::Disabled, + true => Lockuprmode::Enabled, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Reset Request is Block"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == LOCKUPRMODE_A::DISABLED + *self == Lockuprmode::Disabled } - #[doc = "Checks if the value of the field is `ENABLED`"] + #[doc = "The entire device is reset except some EMU registers"] #[inline(always)] pub fn is_enabled(&self) -> bool { - *self == LOCKUPRMODE_A::ENABLED + *self == Lockuprmode::Enabled } } #[doc = "Field `LOCKUPRMODE` writer - Enable M33 Lockup reset"] -pub type LOCKUPRMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, RSTCTRL_SPEC, LOCKUPRMODE_A, O>; -impl<'a, const O: u8> LOCKUPRMODE_W<'a, O> { +pub type LockuprmodeW<'a, REG> = crate::BitWriter<'a, REG, Lockuprmode>; +impl<'a, REG> LockuprmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Reset Request is Block"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(LOCKUPRMODE_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Lockuprmode::Disabled) } #[doc = "The entire device is reset except some EMU registers"] #[inline(always)] - pub fn enabled(self) -> &'a mut W { - self.variant(LOCKUPRMODE_A::ENABLED) + pub fn enabled(self) -> &'a mut crate::W { + self.variant(Lockuprmode::Enabled) } } -#[doc = "Field `AVDDBODRMODE` reader - Enable AVDD BOD reset"] -pub type AVDDBODRMODE_R = crate::BitReader; #[doc = "Enable AVDD BOD reset\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AVDDBODRMODE_A { +pub enum Avddbodrmode { #[doc = "0: Reset Request is block"] - DISABLED = 0, + Disabled = 0, #[doc = "1: The entire device is reset except some EMU registers"] - ENABLED = 1, + Enabled = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AVDDBODRMODE_A) -> Self { + fn from(variant: Avddbodrmode) -> Self { variant as u8 != 0 } } -impl AVDDBODRMODE_R { +#[doc = "Field `AVDDBODRMODE` reader - Enable AVDD BOD reset"] +pub type AvddbodrmodeR = crate::BitReader; +impl AvddbodrmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> AVDDBODRMODE_A { + pub const fn variant(&self) -> Avddbodrmode { match self.bits { - false => AVDDBODRMODE_A::DISABLED, - true => AVDDBODRMODE_A::ENABLED, + false => Avddbodrmode::Disabled, + true => Avddbodrmode::Enabled, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Reset Request is block"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == AVDDBODRMODE_A::DISABLED + *self == Avddbodrmode::Disabled } - #[doc = "Checks if the value of the field is `ENABLED`"] + #[doc = "The entire device is reset except some EMU registers"] #[inline(always)] pub fn is_enabled(&self) -> bool { - *self == AVDDBODRMODE_A::ENABLED + *self == Avddbodrmode::Enabled } } #[doc = "Field `AVDDBODRMODE` writer - Enable AVDD BOD reset"] -pub type AVDDBODRMODE_W<'a, const O: u8> = - crate::BitWriter<'a, u32, RSTCTRL_SPEC, AVDDBODRMODE_A, O>; -impl<'a, const O: u8> AVDDBODRMODE_W<'a, O> { +pub type AvddbodrmodeW<'a, REG> = crate::BitWriter<'a, REG, Avddbodrmode>; +impl<'a, REG> AvddbodrmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Reset Request is block"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(AVDDBODRMODE_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Avddbodrmode::Disabled) } #[doc = "The entire device is reset except some EMU registers"] #[inline(always)] - pub fn enabled(self) -> &'a mut W { - self.variant(AVDDBODRMODE_A::ENABLED) + pub fn enabled(self) -> &'a mut crate::W { + self.variant(Avddbodrmode::Enabled) } } -#[doc = "Field `IOVDD0BODRMODE` reader - Enable VDDIO0 BOD reset"] -pub type IOVDD0BODRMODE_R = crate::BitReader; #[doc = "Enable VDDIO0 BOD reset\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IOVDD0BODRMODE_A { +pub enum Iovdd0bodrmode { #[doc = "0: Reset request is blocked"] - DISABLED = 0, + Disabled = 0, #[doc = "1: The entire device is reset except some EMU registers"] - ENABLED = 1, + Enabled = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IOVDD0BODRMODE_A) -> Self { + fn from(variant: Iovdd0bodrmode) -> Self { variant as u8 != 0 } } -impl IOVDD0BODRMODE_R { +#[doc = "Field `IOVDD0BODRMODE` reader - Enable VDDIO0 BOD reset"] +pub type Iovdd0bodrmodeR = crate::BitReader; +impl Iovdd0bodrmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> IOVDD0BODRMODE_A { + pub const fn variant(&self) -> Iovdd0bodrmode { match self.bits { - false => IOVDD0BODRMODE_A::DISABLED, - true => IOVDD0BODRMODE_A::ENABLED, + false => Iovdd0bodrmode::Disabled, + true => Iovdd0bodrmode::Enabled, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Reset request is blocked"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == IOVDD0BODRMODE_A::DISABLED + *self == Iovdd0bodrmode::Disabled } - #[doc = "Checks if the value of the field is `ENABLED`"] + #[doc = "The entire device is reset except some EMU registers"] #[inline(always)] pub fn is_enabled(&self) -> bool { - *self == IOVDD0BODRMODE_A::ENABLED + *self == Iovdd0bodrmode::Enabled } } #[doc = "Field `IOVDD0BODRMODE` writer - Enable VDDIO0 BOD reset"] -pub type IOVDD0BODRMODE_W<'a, const O: u8> = - crate::BitWriter<'a, u32, RSTCTRL_SPEC, IOVDD0BODRMODE_A, O>; -impl<'a, const O: u8> IOVDD0BODRMODE_W<'a, O> { +pub type Iovdd0bodrmodeW<'a, REG> = crate::BitWriter<'a, REG, Iovdd0bodrmode>; +impl<'a, REG> Iovdd0bodrmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Reset request is blocked"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(IOVDD0BODRMODE_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Iovdd0bodrmode::Disabled) } #[doc = "The entire device is reset except some EMU registers"] #[inline(always)] - pub fn enabled(self) -> &'a mut W { - self.variant(IOVDD0BODRMODE_A::ENABLED) + pub fn enabled(self) -> &'a mut crate::W { + self.variant(Iovdd0bodrmode::Enabled) } } -#[doc = "Field `DECBODRMODE` reader - Enable DECBOD reset"] -pub type DECBODRMODE_R = crate::BitReader; #[doc = "Enable DECBOD reset\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DECBODRMODE_A { +pub enum Decbodrmode { #[doc = "0: Reset request is blocked"] - DISABLED = 0, + Disabled = 0, #[doc = "1: The entire device is reset"] - ENABLED = 1, + Enabled = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DECBODRMODE_A) -> Self { + fn from(variant: Decbodrmode) -> Self { variant as u8 != 0 } } -impl DECBODRMODE_R { +#[doc = "Field `DECBODRMODE` reader - Enable DECBOD reset"] +pub type DecbodrmodeR = crate::BitReader; +impl DecbodrmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DECBODRMODE_A { + pub const fn variant(&self) -> Decbodrmode { match self.bits { - false => DECBODRMODE_A::DISABLED, - true => DECBODRMODE_A::ENABLED, + false => Decbodrmode::Disabled, + true => Decbodrmode::Enabled, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Reset request is blocked"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == DECBODRMODE_A::DISABLED + *self == Decbodrmode::Disabled } - #[doc = "Checks if the value of the field is `ENABLED`"] + #[doc = "The entire device is reset"] #[inline(always)] pub fn is_enabled(&self) -> bool { - *self == DECBODRMODE_A::ENABLED + *self == Decbodrmode::Enabled } } #[doc = "Field `DECBODRMODE` writer - Enable DECBOD reset"] -pub type DECBODRMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, RSTCTRL_SPEC, DECBODRMODE_A, O>; -impl<'a, const O: u8> DECBODRMODE_W<'a, O> { +pub type DecbodrmodeW<'a, REG> = crate::BitWriter<'a, REG, Decbodrmode>; +impl<'a, REG> DecbodrmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Reset request is blocked"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(DECBODRMODE_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Decbodrmode::Disabled) } #[doc = "The entire device is reset"] #[inline(always)] - pub fn enabled(self) -> &'a mut W { - self.variant(DECBODRMODE_A::ENABLED) + pub fn enabled(self) -> &'a mut crate::W { + self.variant(Decbodrmode::Enabled) } } impl R { #[doc = "Bit 0 - Enable WDOG0 reset"] #[inline(always)] - pub fn wdog0rmode(&self) -> WDOG0RMODE_R { - WDOG0RMODE_R::new((self.bits & 1) != 0) + pub fn wdog0rmode(&self) -> Wdog0rmodeR { + Wdog0rmodeR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - Enable M33 System reset"] #[inline(always)] - pub fn sysrmode(&self) -> SYSRMODE_R { - SYSRMODE_R::new(((self.bits >> 2) & 1) != 0) + pub fn sysrmode(&self) -> SysrmodeR { + SysrmodeR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Enable M33 Lockup reset"] #[inline(always)] - pub fn lockuprmode(&self) -> LOCKUPRMODE_R { - LOCKUPRMODE_R::new(((self.bits >> 3) & 1) != 0) + pub fn lockuprmode(&self) -> LockuprmodeR { + LockuprmodeR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 6 - Enable AVDD BOD reset"] #[inline(always)] - pub fn avddbodrmode(&self) -> AVDDBODRMODE_R { - AVDDBODRMODE_R::new(((self.bits >> 6) & 1) != 0) + pub fn avddbodrmode(&self) -> AvddbodrmodeR { + AvddbodrmodeR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Enable VDDIO0 BOD reset"] #[inline(always)] - pub fn iovdd0bodrmode(&self) -> IOVDD0BODRMODE_R { - IOVDD0BODRMODE_R::new(((self.bits >> 7) & 1) != 0) + pub fn iovdd0bodrmode(&self) -> Iovdd0bodrmodeR { + Iovdd0bodrmodeR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 10 - Enable DECBOD reset"] #[inline(always)] - pub fn decbodrmode(&self) -> DECBODRMODE_R { - DECBODRMODE_R::new(((self.bits >> 10) & 1) != 0) + pub fn decbodrmode(&self) -> DecbodrmodeR { + DecbodrmodeR::new(((self.bits >> 10) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable WDOG0 reset"] #[inline(always)] #[must_use] - pub fn wdog0rmode(&mut self) -> WDOG0RMODE_W<0> { - WDOG0RMODE_W::new(self) + pub fn wdog0rmode(&mut self) -> Wdog0rmodeW { + Wdog0rmodeW::new(self, 0) } #[doc = "Bit 2 - Enable M33 System reset"] #[inline(always)] #[must_use] - pub fn sysrmode(&mut self) -> SYSRMODE_W<2> { - SYSRMODE_W::new(self) + pub fn sysrmode(&mut self) -> SysrmodeW { + SysrmodeW::new(self, 2) } #[doc = "Bit 3 - Enable M33 Lockup reset"] #[inline(always)] #[must_use] - pub fn lockuprmode(&mut self) -> LOCKUPRMODE_W<3> { - LOCKUPRMODE_W::new(self) + pub fn lockuprmode(&mut self) -> LockuprmodeW { + LockuprmodeW::new(self, 3) } #[doc = "Bit 6 - Enable AVDD BOD reset"] #[inline(always)] #[must_use] - pub fn avddbodrmode(&mut self) -> AVDDBODRMODE_W<6> { - AVDDBODRMODE_W::new(self) + pub fn avddbodrmode(&mut self) -> AvddbodrmodeW { + AvddbodrmodeW::new(self, 6) } #[doc = "Bit 7 - Enable VDDIO0 BOD reset"] #[inline(always)] #[must_use] - pub fn iovdd0bodrmode(&mut self) -> IOVDD0BODRMODE_W<7> { - IOVDD0BODRMODE_W::new(self) + pub fn iovdd0bodrmode(&mut self) -> Iovdd0bodrmodeW { + Iovdd0bodrmodeW::new(self, 7) } #[doc = "Bit 10 - Enable DECBOD reset"] #[inline(always)] #[must_use] - pub fn decbodrmode(&mut self) -> DECBODRMODE_W<10> { - DECBODRMODE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn decbodrmode(&mut self) -> DecbodrmodeW { + DecbodrmodeW::new(self, 10) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rstctrl](index.html) module"] -pub struct RSTCTRL_SPEC; -impl crate::RegisterSpec for RSTCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rstctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rstctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RstctrlSpec; +impl crate::RegisterSpec for RstctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [rstctrl::R](R) reader structure"] -impl crate::Readable for RSTCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rstctrl::W](W) writer structure"] -impl crate::Writable for RSTCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`rstctrl::R`](R) reader structure"] +impl crate::Readable for RstctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`rstctrl::W`](W) writer structure"] +impl crate::Writable for RstctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RSTCTRL to value 0x0006_0407"] -impl crate::Resettable for RSTCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0006_0407; +impl crate::Resettable for RstctrlSpec { + const RESET_VALUE: u32 = 0x0006_0407; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/status.rs index 29d69e4..4f940af 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/status.rs @@ -1,171 +1,160 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `LOCK` reader - Lock status"] -pub type LOCK_R = crate::BitReader; +pub type R = crate::R; #[doc = "Lock status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCK_A { +pub enum Lock { #[doc = "0: All EMU lockable registers are unlocked."] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: All EMU lockable registers are locked."] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCK_A) -> Self { + fn from(variant: Lock) -> Self { variant as u8 != 0 } } -impl LOCK_R { +#[doc = "Field `LOCK` reader - Lock status"] +pub type LockR = crate::BitReader; +impl LockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCK_A { + pub const fn variant(&self) -> Lock { match self.bits { - false => LOCK_A::UNLOCKED, - true => LOCK_A::LOCKED, + false => Lock::Unlocked, + true => Lock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "All EMU lockable registers are unlocked."] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCK_A::UNLOCKED + *self == Lock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "All EMU lockable registers are locked."] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCK_A::LOCKED + *self == Lock::Locked } } #[doc = "Field `FIRSTTEMPDONE` reader - First Temp done"] -pub type FIRSTTEMPDONE_R = crate::BitReader; +pub type FirsttempdoneR = crate::BitReader; #[doc = "Field `TEMPACTIVE` reader - Temp active"] -pub type TEMPACTIVE_R = crate::BitReader; +pub type TempactiveR = crate::BitReader; #[doc = "Field `TEMPAVGACTIVE` reader - Temp Average active"] -pub type TEMPAVGACTIVE_R = crate::BitReader; +pub type TempavgactiveR = crate::BitReader; #[doc = "Field `VSCALEBUSY` reader - Vscale busy"] -pub type VSCALEBUSY_R = crate::BitReader; +pub type VscalebusyR = crate::BitReader; #[doc = "Field `VSCALEFAILED` reader - Vscale failed"] -pub type VSCALEFAILED_R = crate::BitReader; -#[doc = "Field `VSCALE` reader - Vscale status"] -pub type VSCALE_R = crate::FieldReader; +pub type VscalefailedR = crate::BitReader; #[doc = "Vscale status\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum VSCALE_A { +pub enum Vscale { #[doc = "0: Voltage scaling set to 0.9v"] - VSCALE0 = 0, + Vscale0 = 0, #[doc = "1: Voltage scaling set to 1.0v"] - VSCALE1 = 1, + Vscale1 = 1, #[doc = "2: Voltage scaling set to 1.1v"] - VSCALE2 = 2, + Vscale2 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: VSCALE_A) -> Self { + fn from(variant: Vscale) -> Self { variant as _ } } -impl VSCALE_R { +impl crate::FieldSpec for Vscale { + type Ux = u8; +} +impl crate::IsEnum for Vscale {} +#[doc = "Field `VSCALE` reader - Vscale status"] +pub type VscaleR = crate::FieldReader; +impl VscaleR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(VSCALE_A::VSCALE0), - 1 => Some(VSCALE_A::VSCALE1), - 2 => Some(VSCALE_A::VSCALE2), + 0 => Some(Vscale::Vscale0), + 1 => Some(Vscale::Vscale1), + 2 => Some(Vscale::Vscale2), _ => None, } } - #[doc = "Checks if the value of the field is `VSCALE0`"] + #[doc = "Voltage scaling set to 0.9v"] #[inline(always)] pub fn is_vscale0(&self) -> bool { - *self == VSCALE_A::VSCALE0 + *self == Vscale::Vscale0 } - #[doc = "Checks if the value of the field is `VSCALE1`"] + #[doc = "Voltage scaling set to 1.0v"] #[inline(always)] pub fn is_vscale1(&self) -> bool { - *self == VSCALE_A::VSCALE1 + *self == Vscale::Vscale1 } - #[doc = "Checks if the value of the field is `VSCALE2`"] + #[doc = "Voltage scaling set to 1.1v"] #[inline(always)] pub fn is_vscale2(&self) -> bool { - *self == VSCALE_A::VSCALE2 + *self == Vscale::Vscale2 } } #[doc = "Field `EM4IORET` reader - EM4 IO retention status"] -pub type EM4IORET_R = crate::BitReader; +pub type Em4ioretR = crate::BitReader; #[doc = "Field `EM2ENTERED` reader - EM2 entered"] -pub type EM2ENTERED_R = crate::BitReader; +pub type Em2enteredR = crate::BitReader; impl R { #[doc = "Bit 0 - Lock status"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new((self.bits & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - First Temp done"] #[inline(always)] - pub fn firsttempdone(&self) -> FIRSTTEMPDONE_R { - FIRSTTEMPDONE_R::new(((self.bits >> 1) & 1) != 0) + pub fn firsttempdone(&self) -> FirsttempdoneR { + FirsttempdoneR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Temp active"] #[inline(always)] - pub fn tempactive(&self) -> TEMPACTIVE_R { - TEMPACTIVE_R::new(((self.bits >> 2) & 1) != 0) + pub fn tempactive(&self) -> TempactiveR { + TempactiveR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Temp Average active"] #[inline(always)] - pub fn tempavgactive(&self) -> TEMPAVGACTIVE_R { - TEMPAVGACTIVE_R::new(((self.bits >> 3) & 1) != 0) + pub fn tempavgactive(&self) -> TempavgactiveR { + TempavgactiveR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Vscale busy"] #[inline(always)] - pub fn vscalebusy(&self) -> VSCALEBUSY_R { - VSCALEBUSY_R::new(((self.bits >> 4) & 1) != 0) + pub fn vscalebusy(&self) -> VscalebusyR { + VscalebusyR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Vscale failed"] #[inline(always)] - pub fn vscalefailed(&self) -> VSCALEFAILED_R { - VSCALEFAILED_R::new(((self.bits >> 5) & 1) != 0) + pub fn vscalefailed(&self) -> VscalefailedR { + VscalefailedR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bits 6:7 - Vscale status"] #[inline(always)] - pub fn vscale(&self) -> VSCALE_R { - VSCALE_R::new(((self.bits >> 6) & 3) as u8) + pub fn vscale(&self) -> VscaleR { + VscaleR::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bit 12 - EM4 IO retention status"] #[inline(always)] - pub fn em4ioret(&self) -> EM4IORET_R { - EM4IORET_R::new(((self.bits >> 12) & 1) != 0) + pub fn em4ioret(&self) -> Em4ioretR { + Em4ioretR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 14 - EM2 entered"] #[inline(always)] - pub fn em2entered(&self) -> EM2ENTERED_R { - EM2ENTERED_R::new(((self.bits >> 14) & 1) != 0) + pub fn em2entered(&self) -> Em2enteredR { + Em2enteredR::new(((self.bits >> 14) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0x80"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0x80; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0x80; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/tamperrstcause.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/tamperrstcause.rs index 25d9383..3368be1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/tamperrstcause.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/tamperrstcause.rs @@ -1,37 +1,22 @@ #[doc = "Register `TAMPERRSTCAUSE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TAMPERRST` reader - Tamper reset vector"] -pub type TAMPERRST_R = crate::FieldReader; +pub type TamperrstR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Tamper reset vector"] #[inline(always)] - pub fn tamperrst(&self) -> TAMPERRST_R { - TAMPERRST_R::new(self.bits) + pub fn tamperrst(&self) -> TamperrstR { + TamperrstR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tamperrstcause](index.html) module"] -pub struct TAMPERRSTCAUSE_SPEC; -impl crate::RegisterSpec for TAMPERRSTCAUSE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`tamperrstcause::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TamperrstcauseSpec; +impl crate::RegisterSpec for TamperrstcauseSpec { type Ux = u32; } -#[doc = "`read()` method returns [tamperrstcause::R](R) reader structure"] -impl crate::Readable for TAMPERRSTCAUSE_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`tamperrstcause::R`](R) reader structure"] +impl crate::Readable for TamperrstcauseSpec {} #[doc = "`reset()` method sets TAMPERRSTCAUSE to value 0"] -impl crate::Resettable for TAMPERRSTCAUSE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TamperrstcauseSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/temp.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/temp.rs index 7407b37..326a878 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/temp.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/temp.rs @@ -1,51 +1,36 @@ #[doc = "Register `TEMP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TEMPLSB` reader - Temperature measured decimal part"] -pub type TEMPLSB_R = crate::FieldReader; +pub type TemplsbR = crate::FieldReader; #[doc = "Field `TEMP` reader - Temperature measured"] -pub type TEMP_R = crate::FieldReader; +pub type TempR = crate::FieldReader; #[doc = "Field `TEMPAVG` reader - Averaged Temperature"] -pub type TEMPAVG_R = crate::FieldReader; +pub type TempavgR = crate::FieldReader; impl R { #[doc = "Bits 0:1 - Temperature measured decimal part"] #[inline(always)] - pub fn templsb(&self) -> TEMPLSB_R { - TEMPLSB_R::new((self.bits & 3) as u8) + pub fn templsb(&self) -> TemplsbR { + TemplsbR::new((self.bits & 3) as u8) } #[doc = "Bits 2:10 - Temperature measured"] #[inline(always)] - pub fn temp(&self) -> TEMP_R { - TEMP_R::new(((self.bits >> 2) & 0x01ff) as u16) + pub fn temp(&self) -> TempR { + TempR::new(((self.bits >> 2) & 0x01ff) as u16) } #[doc = "Bits 16:26 - Averaged Temperature"] #[inline(always)] - pub fn tempavg(&self) -> TEMPAVG_R { - TEMPAVG_R::new(((self.bits >> 16) & 0x07ff) as u16) + pub fn tempavg(&self) -> TempavgR { + TempavgR::new(((self.bits >> 16) & 0x07ff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [temp](index.html) module"] -pub struct TEMP_SPEC; -impl crate::RegisterSpec for TEMP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`temp::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TempSpec; +impl crate::RegisterSpec for TempSpec { type Ux = u32; } -#[doc = "`read()` method returns [temp::R](R) reader structure"] -impl crate::Readable for TEMP_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`temp::R`](R) reader structure"] +impl crate::Readable for TempSpec {} #[doc = "`reset()` method sets TEMP to value 0"] -impl crate::Resettable for TEMP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TempSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/templimits.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/templimits.rs index ba7913e..11dc849 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/templimits.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/templimits.rs @@ -1,95 +1,55 @@ #[doc = "Register `TEMPLIMITS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TEMPLIMITS` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TEMPLOW` reader - Temp Low limit"] -pub type TEMPLOW_R = crate::FieldReader; +pub type TemplowR = crate::FieldReader; #[doc = "Field `TEMPLOW` writer - Temp Low limit"] -pub type TEMPLOW_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TEMPLIMITS_SPEC, u16, u16, 9, O>; +pub type TemplowW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; #[doc = "Field `TEMPHIGH` reader - Temp High limit"] -pub type TEMPHIGH_R = crate::FieldReader; +pub type TemphighR = crate::FieldReader; #[doc = "Field `TEMPHIGH` writer - Temp High limit"] -pub type TEMPHIGH_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TEMPLIMITS_SPEC, u16, u16, 9, O>; +pub type TemphighW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; impl R { #[doc = "Bits 0:8 - Temp Low limit"] #[inline(always)] - pub fn templow(&self) -> TEMPLOW_R { - TEMPLOW_R::new((self.bits & 0x01ff) as u16) + pub fn templow(&self) -> TemplowR { + TemplowR::new((self.bits & 0x01ff) as u16) } #[doc = "Bits 16:24 - Temp High limit"] #[inline(always)] - pub fn temphigh(&self) -> TEMPHIGH_R { - TEMPHIGH_R::new(((self.bits >> 16) & 0x01ff) as u16) + pub fn temphigh(&self) -> TemphighR { + TemphighR::new(((self.bits >> 16) & 0x01ff) as u16) } } impl W { #[doc = "Bits 0:8 - Temp Low limit"] #[inline(always)] #[must_use] - pub fn templow(&mut self) -> TEMPLOW_W<0> { - TEMPLOW_W::new(self) + pub fn templow(&mut self) -> TemplowW { + TemplowW::new(self, 0) } #[doc = "Bits 16:24 - Temp High limit"] #[inline(always)] #[must_use] - pub fn temphigh(&mut self) -> TEMPHIGH_W<16> { - TEMPHIGH_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn temphigh(&mut self) -> TemphighW { + TemphighW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [templimits](index.html) module"] -pub struct TEMPLIMITS_SPEC; -impl crate::RegisterSpec for TEMPLIMITS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`templimits::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`templimits::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TemplimitsSpec; +impl crate::RegisterSpec for TemplimitsSpec { type Ux = u32; } -#[doc = "`read()` method returns [templimits::R](R) reader structure"] -impl crate::Readable for TEMPLIMITS_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [templimits::W](W) writer structure"] -impl crate::Writable for TEMPLIMITS_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`templimits::R`](R) reader structure"] +impl crate::Readable for TemplimitsSpec {} +#[doc = "`write(|w| ..)` method takes [`templimits::W`](W) writer structure"] +impl crate::Writable for TemplimitsSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TEMPLIMITS to value 0x01ff_0000"] -impl crate::Resettable for TEMPLIMITS_SPEC { - const RESET_VALUE: Self::Ux = 0x01ff_0000; +impl crate::Resettable for TemplimitsSpec { + const RESET_VALUE: u32 = 0x01ff_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/vregvddcmpctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/vregvddcmpctrl.rs index 5af3d3e..5d8bb59 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/vregvddcmpctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_ns/vregvddcmpctrl.rs @@ -1,96 +1,55 @@ #[doc = "Register `VREGVDDCMPCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `VREGVDDCMPCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `VREGINCMPEN` reader - VREGVDD comparator enable"] -pub type VREGINCMPEN_R = crate::BitReader; +pub type VregincmpenR = crate::BitReader; #[doc = "Field `VREGINCMPEN` writer - VREGVDD comparator enable"] -pub type VREGINCMPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, VREGVDDCMPCTRL_SPEC, bool, O>; +pub type VregincmpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `THRESSEL` reader - VREGVDD comparator threshold programming"] -pub type THRESSEL_R = crate::FieldReader; +pub type ThresselR = crate::FieldReader; #[doc = "Field `THRESSEL` writer - VREGVDD comparator threshold programming"] -pub type THRESSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, VREGVDDCMPCTRL_SPEC, u8, u8, 2, O>; +pub type ThresselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bit 0 - VREGVDD comparator enable"] #[inline(always)] - pub fn vregincmpen(&self) -> VREGINCMPEN_R { - VREGINCMPEN_R::new((self.bits & 1) != 0) + pub fn vregincmpen(&self) -> VregincmpenR { + VregincmpenR::new((self.bits & 1) != 0) } #[doc = "Bits 1:2 - VREGVDD comparator threshold programming"] #[inline(always)] - pub fn thressel(&self) -> THRESSEL_R { - THRESSEL_R::new(((self.bits >> 1) & 3) as u8) + pub fn thressel(&self) -> ThresselR { + ThresselR::new(((self.bits >> 1) & 3) as u8) } } impl W { #[doc = "Bit 0 - VREGVDD comparator enable"] #[inline(always)] #[must_use] - pub fn vregincmpen(&mut self) -> VREGINCMPEN_W<0> { - VREGINCMPEN_W::new(self) + pub fn vregincmpen(&mut self) -> VregincmpenW { + VregincmpenW::new(self, 0) } #[doc = "Bits 1:2 - VREGVDD comparator threshold programming"] #[inline(always)] #[must_use] - pub fn thressel(&mut self) -> THRESSEL_W<1> { - THRESSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn thressel(&mut self) -> ThresselW { + ThresselW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [vregvddcmpctrl](index.html) module"] -pub struct VREGVDDCMPCTRL_SPEC; -impl crate::RegisterSpec for VREGVDDCMPCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`vregvddcmpctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`vregvddcmpctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct VregvddcmpctrlSpec; +impl crate::RegisterSpec for VregvddcmpctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [vregvddcmpctrl::R](R) reader structure"] -impl crate::Readable for VREGVDDCMPCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [vregvddcmpctrl::W](W) writer structure"] -impl crate::Writable for VREGVDDCMPCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`vregvddcmpctrl::R`](R) reader structure"] +impl crate::Readable for VregvddcmpctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`vregvddcmpctrl::W`](W) writer structure"] +impl crate::Writable for VregvddcmpctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets VREGVDDCMPCTRL to value 0x06"] -impl crate::Resettable for VREGVDDCMPCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x06; +impl crate::Resettable for VregvddcmpctrlSpec { + const RESET_VALUE: u32 = 0x06; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s.rs index fcbf16a..7ee8c81 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s.rs @@ -1,138 +1,266 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { _reserved0: [u8; 0x10], - #[doc = "0x10 - No Description"] - pub decbod: DECBOD, + decbod: Decbod, _reserved1: [u8; 0x0c], - #[doc = "0x20 - No Description"] - pub bod3sense: BOD3SENSE, + bod3sense: Bod3sense, _reserved2: [u8; 0x18], + vregvddcmpctrl: Vregvddcmpctrl, + pd1paretctrl: Pd1paretctrl, + _reserved4: [u8; 0x18], + ipversion: Ipversion, + lock: Lock, + if_: If, + ien: Ien, + em4ctrl: Em4ctrl, + cmd: Cmd, + ctrl: Ctrl, + templimits: Templimits, + _reserved12: [u8; 0x08], + status: Status, + temp: Temp, + _reserved14: [u8; 0x04], + rstctrl: Rstctrl, + rstcause: Rstcause, + tamperrstcause: Tamperrstcause, + _reserved17: [u8; 0x04], + dgif: Dgif, + dgien: Dgien, + _reserved19: [u8; 0x58], + efpif: Efpif, + efpien: Efpien, +} +impl RegisterBlock { + #[doc = "0x10 - No Description"] + #[inline(always)] + pub const fn decbod(&self) -> &Decbod { + &self.decbod + } + #[doc = "0x20 - No Description"] + #[inline(always)] + pub const fn bod3sense(&self) -> &Bod3sense { + &self.bod3sense + } #[doc = "0x3c - No Description"] - pub vregvddcmpctrl: VREGVDDCMPCTRL, + #[inline(always)] + pub const fn vregvddcmpctrl(&self) -> &Vregvddcmpctrl { + &self.vregvddcmpctrl + } #[doc = "0x40 - No Description"] - pub pd1paretctrl: PD1PARETCTRL, - _reserved4: [u8; 0x18], + #[inline(always)] + pub const fn pd1paretctrl(&self) -> &Pd1paretctrl { + &self.pd1paretctrl + } #[doc = "0x5c - IP Version"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x60 - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x64 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x68 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x6c - No Description"] - pub em4ctrl: EM4CTRL, + #[inline(always)] + pub const fn em4ctrl(&self) -> &Em4ctrl { + &self.em4ctrl + } #[doc = "0x70 - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x74 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x78 - No Description"] - pub templimits: TEMPLIMITS, - _reserved12: [u8; 0x08], + #[inline(always)] + pub const fn templimits(&self) -> &Templimits { + &self.templimits + } #[doc = "0x84 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x88 - No Description"] - pub temp: TEMP, - _reserved14: [u8; 0x04], + #[inline(always)] + pub const fn temp(&self) -> &Temp { + &self.temp + } #[doc = "0x90 - No Description"] - pub rstctrl: RSTCTRL, + #[inline(always)] + pub const fn rstctrl(&self) -> &Rstctrl { + &self.rstctrl + } #[doc = "0x94 - No Description"] - pub rstcause: RSTCAUSE, + #[inline(always)] + pub const fn rstcause(&self) -> &Rstcause { + &self.rstcause + } #[doc = "0x98 - No Description"] - pub tamperrstcause: TAMPERRSTCAUSE, - _reserved17: [u8; 0x04], + #[inline(always)] + pub const fn tamperrstcause(&self) -> &Tamperrstcause { + &self.tamperrstcause + } #[doc = "0xa0 - No Description"] - pub dgif: DGIF, + #[inline(always)] + pub const fn dgif(&self) -> &Dgif { + &self.dgif + } #[doc = "0xa4 - No Description"] - pub dgien: DGIEN, - _reserved19: [u8; 0x58], + #[inline(always)] + pub const fn dgien(&self) -> &Dgien { + &self.dgien + } #[doc = "0x100 - No Description"] - pub efpif: EFPIF, + #[inline(always)] + pub const fn efpif(&self) -> &Efpif { + &self.efpif + } #[doc = "0x104 - No Description"] - pub efpien: EFPIEN, + #[inline(always)] + pub const fn efpien(&self) -> &Efpien { + &self.efpien + } } -#[doc = "DECBOD (rw) register accessor: an alias for `Reg`"] -pub type DECBOD = crate::Reg; +#[doc = "DECBOD (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`decbod::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`decbod::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@decbod`] +module"] +#[doc(alias = "DECBOD")] +pub type Decbod = crate::Reg; #[doc = "No Description"] pub mod decbod; -#[doc = "BOD3SENSE (rw) register accessor: an alias for `Reg`"] -pub type BOD3SENSE = crate::Reg; +#[doc = "BOD3SENSE (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bod3sense::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bod3sense::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bod3sense`] +module"] +#[doc(alias = "BOD3SENSE")] +pub type Bod3sense = crate::Reg; #[doc = "No Description"] pub mod bod3sense; -#[doc = "VREGVDDCMPCTRL (rw) register accessor: an alias for `Reg`"] -pub type VREGVDDCMPCTRL = crate::Reg; +#[doc = "VREGVDDCMPCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`vregvddcmpctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`vregvddcmpctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vregvddcmpctrl`] +module"] +#[doc(alias = "VREGVDDCMPCTRL")] +pub type Vregvddcmpctrl = crate::Reg; #[doc = "No Description"] pub mod vregvddcmpctrl; -#[doc = "PD1PARETCTRL (rw) register accessor: an alias for `Reg`"] -pub type PD1PARETCTRL = crate::Reg; +#[doc = "PD1PARETCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pd1paretctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pd1paretctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pd1paretctrl`] +module"] +#[doc(alias = "PD1PARETCTRL")] +pub type Pd1paretctrl = crate::Reg; #[doc = "No Description"] pub mod pd1paretctrl; -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: IP Version\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "IP Version"] pub mod ipversion; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "EM4CTRL (rw) register accessor: an alias for `Reg`"] -pub type EM4CTRL = crate::Reg; +#[doc = "EM4CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em4ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em4ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@em4ctrl`] +module"] +#[doc(alias = "EM4CTRL")] +pub type Em4ctrl = crate::Reg; #[doc = "No Description"] pub mod em4ctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "TEMPLIMITS (rw) register accessor: an alias for `Reg`"] -pub type TEMPLIMITS = crate::Reg; +#[doc = "TEMPLIMITS (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`templimits::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`templimits::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@templimits`] +module"] +#[doc(alias = "TEMPLIMITS")] +pub type Templimits = crate::Reg; #[doc = "No Description"] pub mod templimits; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "TEMP (r) register accessor: an alias for `Reg`"] -pub type TEMP = crate::Reg; +#[doc = "TEMP (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`temp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@temp`] +module"] +#[doc(alias = "TEMP")] +pub type Temp = crate::Reg; #[doc = "No Description"] pub mod temp; -#[doc = "RSTCTRL (rw) register accessor: an alias for `Reg`"] -pub type RSTCTRL = crate::Reg; +#[doc = "RSTCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rstctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rstctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rstctrl`] +module"] +#[doc(alias = "RSTCTRL")] +pub type Rstctrl = crate::Reg; #[doc = "No Description"] pub mod rstctrl; -#[doc = "RSTCAUSE (r) register accessor: an alias for `Reg`"] -pub type RSTCAUSE = crate::Reg; +#[doc = "RSTCAUSE (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rstcause::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rstcause`] +module"] +#[doc(alias = "RSTCAUSE")] +pub type Rstcause = crate::Reg; #[doc = "No Description"] pub mod rstcause; -#[doc = "TAMPERRSTCAUSE (r) register accessor: an alias for `Reg`"] -pub type TAMPERRSTCAUSE = crate::Reg; +#[doc = "TAMPERRSTCAUSE (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`tamperrstcause::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tamperrstcause`] +module"] +#[doc(alias = "TAMPERRSTCAUSE")] +pub type Tamperrstcause = crate::Reg; #[doc = "No Description"] pub mod tamperrstcause; -#[doc = "DGIF (rw) register accessor: an alias for `Reg`"] -pub type DGIF = crate::Reg; +#[doc = "DGIF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dgif::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dgif::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dgif`] +module"] +#[doc(alias = "DGIF")] +pub type Dgif = crate::Reg; #[doc = "No Description"] pub mod dgif; -#[doc = "DGIEN (rw) register accessor: an alias for `Reg`"] -pub type DGIEN = crate::Reg; +#[doc = "DGIEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dgien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dgien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dgien`] +module"] +#[doc(alias = "DGIEN")] +pub type Dgien = crate::Reg; #[doc = "No Description"] pub mod dgien; -#[doc = "EFPIF (rw) register accessor: an alias for `Reg`"] -pub type EFPIF = crate::Reg; +#[doc = "EFPIF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`efpif::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`efpif::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@efpif`] +module"] +#[doc(alias = "EFPIF")] +pub type Efpif = crate::Reg; #[doc = "No Description"] pub mod efpif; -#[doc = "EFPIEN (rw) register accessor: an alias for `Reg`"] -pub type EFPIEN = crate::Reg; +#[doc = "EFPIEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`efpien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`efpien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@efpien`] +module"] +#[doc(alias = "EFPIEN")] +pub type Efpien = crate::Reg; #[doc = "No Description"] pub mod efpien; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/bod3sense.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/bod3sense.rs index d91422b..a638060 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/bod3sense.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/bod3sense.rs @@ -1,110 +1,70 @@ #[doc = "Register `BOD3SENSE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `BOD3SENSE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `AVDDBODEN` reader - AVDD BOD enable"] -pub type AVDDBODEN_R = crate::BitReader; +pub type AvddbodenR = crate::BitReader; #[doc = "Field `AVDDBODEN` writer - AVDD BOD enable"] -pub type AVDDBODEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, BOD3SENSE_SPEC, bool, O>; +pub type AvddbodenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VDDIO0BODEN` reader - VDDIO0 BOD enable"] -pub type VDDIO0BODEN_R = crate::BitReader; +pub type Vddio0bodenR = crate::BitReader; #[doc = "Field `VDDIO0BODEN` writer - VDDIO0 BOD enable"] -pub type VDDIO0BODEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, BOD3SENSE_SPEC, bool, O>; +pub type Vddio0bodenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VDDIO1BODEN` reader - VDDIO1 BOD enable"] -pub type VDDIO1BODEN_R = crate::BitReader; +pub type Vddio1bodenR = crate::BitReader; #[doc = "Field `VDDIO1BODEN` writer - VDDIO1 BOD enable"] -pub type VDDIO1BODEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, BOD3SENSE_SPEC, bool, O>; +pub type Vddio1bodenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - AVDD BOD enable"] #[inline(always)] - pub fn avddboden(&self) -> AVDDBODEN_R { - AVDDBODEN_R::new((self.bits & 1) != 0) + pub fn avddboden(&self) -> AvddbodenR { + AvddbodenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - VDDIO0 BOD enable"] #[inline(always)] - pub fn vddio0boden(&self) -> VDDIO0BODEN_R { - VDDIO0BODEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn vddio0boden(&self) -> Vddio0bodenR { + Vddio0bodenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - VDDIO1 BOD enable"] #[inline(always)] - pub fn vddio1boden(&self) -> VDDIO1BODEN_R { - VDDIO1BODEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn vddio1boden(&self) -> Vddio1bodenR { + Vddio1bodenR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - AVDD BOD enable"] #[inline(always)] #[must_use] - pub fn avddboden(&mut self) -> AVDDBODEN_W<0> { - AVDDBODEN_W::new(self) + pub fn avddboden(&mut self) -> AvddbodenW { + AvddbodenW::new(self, 0) } #[doc = "Bit 1 - VDDIO0 BOD enable"] #[inline(always)] #[must_use] - pub fn vddio0boden(&mut self) -> VDDIO0BODEN_W<1> { - VDDIO0BODEN_W::new(self) + pub fn vddio0boden(&mut self) -> Vddio0bodenW { + Vddio0bodenW::new(self, 1) } #[doc = "Bit 2 - VDDIO1 BOD enable"] #[inline(always)] #[must_use] - pub fn vddio1boden(&mut self) -> VDDIO1BODEN_W<2> { - VDDIO1BODEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn vddio1boden(&mut self) -> Vddio1bodenW { + Vddio1bodenW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bod3sense](index.html) module"] -pub struct BOD3SENSE_SPEC; -impl crate::RegisterSpec for BOD3SENSE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bod3sense::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bod3sense::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Bod3senseSpec; +impl crate::RegisterSpec for Bod3senseSpec { type Ux = u32; } -#[doc = "`read()` method returns [bod3sense::R](R) reader structure"] -impl crate::Readable for BOD3SENSE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [bod3sense::W](W) writer structure"] -impl crate::Writable for BOD3SENSE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`bod3sense::R`](R) reader structure"] +impl crate::Readable for Bod3senseSpec {} +#[doc = "`write(|w| ..)` method takes [`bod3sense::W`](W) writer structure"] +impl crate::Writable for Bod3senseSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BOD3SENSE to value 0"] -impl crate::Resettable for BOD3SENSE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Bod3senseSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/cmd.rs index d3243da..3cb4242 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/cmd.rs @@ -1,92 +1,67 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EM4UNLATCH` writer - EM4 unlatch"] -pub type EM4UNLATCH_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type Em4unlatchW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMPAVGREQ` writer - Temperature Average Request"] -pub type TEMPAVGREQ_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TempavgreqW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM01VSCALE1` writer - Scale voltage to Vscale1"] -pub type EM01VSCALE1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type Em01vscale1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM01VSCALE2` writer - Scale voltage to Vscale2"] -pub type EM01VSCALE2_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type Em01vscale2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RSTCAUSECLR` writer - Reset Cause Clear"] -pub type RSTCAUSECLR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RstcauseclrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TAMPERRCCLR` writer - Tamper Reset Cause Clear"] -pub type TAMPERRCCLR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TamperrcclrW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 1 - EM4 unlatch"] #[inline(always)] #[must_use] - pub fn em4unlatch(&mut self) -> EM4UNLATCH_W<1> { - EM4UNLATCH_W::new(self) + pub fn em4unlatch(&mut self) -> Em4unlatchW { + Em4unlatchW::new(self, 1) } #[doc = "Bit 4 - Temperature Average Request"] #[inline(always)] #[must_use] - pub fn tempavgreq(&mut self) -> TEMPAVGREQ_W<4> { - TEMPAVGREQ_W::new(self) + pub fn tempavgreq(&mut self) -> TempavgreqW { + TempavgreqW::new(self, 4) } #[doc = "Bit 10 - Scale voltage to Vscale1"] #[inline(always)] #[must_use] - pub fn em01vscale1(&mut self) -> EM01VSCALE1_W<10> { - EM01VSCALE1_W::new(self) + pub fn em01vscale1(&mut self) -> Em01vscale1W { + Em01vscale1W::new(self, 10) } #[doc = "Bit 11 - Scale voltage to Vscale2"] #[inline(always)] #[must_use] - pub fn em01vscale2(&mut self) -> EM01VSCALE2_W<11> { - EM01VSCALE2_W::new(self) + pub fn em01vscale2(&mut self) -> Em01vscale2W { + Em01vscale2W::new(self, 11) } #[doc = "Bit 17 - Reset Cause Clear"] #[inline(always)] #[must_use] - pub fn rstcauseclr(&mut self) -> RSTCAUSECLR_W<17> { - RSTCAUSECLR_W::new(self) + pub fn rstcauseclr(&mut self) -> RstcauseclrW { + RstcauseclrW::new(self, 17) } #[doc = "Bit 18 - Tamper Reset Cause Clear"] #[inline(always)] #[must_use] - pub fn tamperrcclr(&mut self) -> TAMPERRCCLR_W<18> { - TAMPERRCCLR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn tamperrcclr(&mut self) -> TamperrcclrW { + TamperrcclrW::new(self, 18) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/ctrl.rs index 07e83fa..a46f36e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/ctrl.rs @@ -1,278 +1,248 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EM2DBGEN` reader - Enable debugging in EM2"] -pub type EM2DBGEN_R = crate::BitReader; +pub type Em2dbgenR = crate::BitReader; #[doc = "Field `EM2DBGEN` writer - Enable debugging in EM2"] -pub type EM2DBGEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; -#[doc = "Field `TEMPAVGNUM` reader - Averaged Temperature samples num"] -pub type TEMPAVGNUM_R = crate::BitReader; +pub type Em2dbgenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Averaged Temperature samples num\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TEMPAVGNUM_A { +pub enum Tempavgnum { #[doc = "0: 16 measurements"] N16 = 0, #[doc = "1: 64 measurements"] N64 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TEMPAVGNUM_A) -> Self { + fn from(variant: Tempavgnum) -> Self { variant as u8 != 0 } } -impl TEMPAVGNUM_R { +#[doc = "Field `TEMPAVGNUM` reader - Averaged Temperature samples num"] +pub type TempavgnumR = crate::BitReader; +impl TempavgnumR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TEMPAVGNUM_A { + pub const fn variant(&self) -> Tempavgnum { match self.bits { - false => TEMPAVGNUM_A::N16, - true => TEMPAVGNUM_A::N64, + false => Tempavgnum::N16, + true => Tempavgnum::N64, } } - #[doc = "Checks if the value of the field is `N16`"] + #[doc = "16 measurements"] #[inline(always)] pub fn is_n16(&self) -> bool { - *self == TEMPAVGNUM_A::N16 + *self == Tempavgnum::N16 } - #[doc = "Checks if the value of the field is `N64`"] + #[doc = "64 measurements"] #[inline(always)] pub fn is_n64(&self) -> bool { - *self == TEMPAVGNUM_A::N64 + *self == Tempavgnum::N64 } } #[doc = "Field `TEMPAVGNUM` writer - Averaged Temperature samples num"] -pub type TEMPAVGNUM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, TEMPAVGNUM_A, O>; -impl<'a, const O: u8> TEMPAVGNUM_W<'a, O> { +pub type TempavgnumW<'a, REG> = crate::BitWriter<'a, REG, Tempavgnum>; +impl<'a, REG> TempavgnumW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "16 measurements"] #[inline(always)] - pub fn n16(self) -> &'a mut W { - self.variant(TEMPAVGNUM_A::N16) + pub fn n16(self) -> &'a mut crate::W { + self.variant(Tempavgnum::N16) } #[doc = "64 measurements"] #[inline(always)] - pub fn n64(self) -> &'a mut W { - self.variant(TEMPAVGNUM_A::N64) + pub fn n64(self) -> &'a mut crate::W { + self.variant(Tempavgnum::N64) } } -#[doc = "Field `EM23VSCALE` reader - EM2/EM3 Vscale"] -pub type EM23VSCALE_R = crate::FieldReader; #[doc = "EM2/EM3 Vscale\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EM23VSCALE_A { +pub enum Em23vscale { #[doc = "0: VSCALE0. 0.9v"] - VSCALE0 = 0, + Vscale0 = 0, #[doc = "1: VSCALE1. 1.0v"] - VSCALE1 = 1, + Vscale1 = 1, #[doc = "2: VSCALE2. 1.1v"] - VSCALE2 = 2, + Vscale2 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EM23VSCALE_A) -> Self { + fn from(variant: Em23vscale) -> Self { variant as _ } } -impl EM23VSCALE_R { +impl crate::FieldSpec for Em23vscale { + type Ux = u8; +} +impl crate::IsEnum for Em23vscale {} +#[doc = "Field `EM23VSCALE` reader - EM2/EM3 Vscale"] +pub type Em23vscaleR = crate::FieldReader; +impl Em23vscaleR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(EM23VSCALE_A::VSCALE0), - 1 => Some(EM23VSCALE_A::VSCALE1), - 2 => Some(EM23VSCALE_A::VSCALE2), + 0 => Some(Em23vscale::Vscale0), + 1 => Some(Em23vscale::Vscale1), + 2 => Some(Em23vscale::Vscale2), _ => None, } } - #[doc = "Checks if the value of the field is `VSCALE0`"] + #[doc = "VSCALE0. 0.9v"] #[inline(always)] pub fn is_vscale0(&self) -> bool { - *self == EM23VSCALE_A::VSCALE0 + *self == Em23vscale::Vscale0 } - #[doc = "Checks if the value of the field is `VSCALE1`"] + #[doc = "VSCALE1. 1.0v"] #[inline(always)] pub fn is_vscale1(&self) -> bool { - *self == EM23VSCALE_A::VSCALE1 + *self == Em23vscale::Vscale1 } - #[doc = "Checks if the value of the field is `VSCALE2`"] + #[doc = "VSCALE2. 1.1v"] #[inline(always)] pub fn is_vscale2(&self) -> bool { - *self == EM23VSCALE_A::VSCALE2 + *self == Em23vscale::Vscale2 } } #[doc = "Field `EM23VSCALE` writer - EM2/EM3 Vscale"] -pub type EM23VSCALE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CTRL_SPEC, u8, EM23VSCALE_A, 2, O>; -impl<'a, const O: u8> EM23VSCALE_W<'a, O> { +pub type Em23vscaleW<'a, REG> = crate::FieldWriter<'a, REG, 2, Em23vscale>; +impl<'a, REG> Em23vscaleW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "VSCALE0. 0.9v"] #[inline(always)] - pub fn vscale0(self) -> &'a mut W { - self.variant(EM23VSCALE_A::VSCALE0) + pub fn vscale0(self) -> &'a mut crate::W { + self.variant(Em23vscale::Vscale0) } #[doc = "VSCALE1. 1.0v"] #[inline(always)] - pub fn vscale1(self) -> &'a mut W { - self.variant(EM23VSCALE_A::VSCALE1) + pub fn vscale1(self) -> &'a mut crate::W { + self.variant(Em23vscale::Vscale1) } #[doc = "VSCALE2. 1.1v"] #[inline(always)] - pub fn vscale2(self) -> &'a mut W { - self.variant(EM23VSCALE_A::VSCALE2) + pub fn vscale2(self) -> &'a mut crate::W { + self.variant(Em23vscale::Vscale2) } } #[doc = "Field `FLASHPWRUPONDEMAND` reader - Enable flash on demand wakeup"] -pub type FLASHPWRUPONDEMAND_R = crate::BitReader; +pub type FlashpwrupondemandR = crate::BitReader; #[doc = "Field `FLASHPWRUPONDEMAND` writer - Enable flash on demand wakeup"] -pub type FLASHPWRUPONDEMAND_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type FlashpwrupondemandW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EFPDIRECTMODEEN` reader - EFP Direct Mode Enable"] -pub type EFPDIRECTMODEEN_R = crate::BitReader; +pub type EfpdirectmodeenR = crate::BitReader; #[doc = "Field `EFPDIRECTMODEEN` writer - EFP Direct Mode Enable"] -pub type EFPDIRECTMODEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type EfpdirectmodeenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EFPDRVDECOUPLE` reader - EFP drives DECOUPLE"] -pub type EFPDRVDECOUPLE_R = crate::BitReader; +pub type EfpdrvdecoupleR = crate::BitReader; #[doc = "Field `EFPDRVDECOUPLE` writer - EFP drives DECOUPLE"] -pub type EFPDRVDECOUPLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type EfpdrvdecoupleW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EFPDRVDVDD` reader - EFP drives DVDD"] -pub type EFPDRVDVDD_R = crate::BitReader; +pub type EfpdrvdvddR = crate::BitReader; #[doc = "Field `EFPDRVDVDD` writer - EFP drives DVDD"] -pub type EFPDRVDVDD_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type EfpdrvdvddW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Enable debugging in EM2"] #[inline(always)] - pub fn em2dbgen(&self) -> EM2DBGEN_R { - EM2DBGEN_R::new((self.bits & 1) != 0) + pub fn em2dbgen(&self) -> Em2dbgenR { + Em2dbgenR::new((self.bits & 1) != 0) } #[doc = "Bit 3 - Averaged Temperature samples num"] #[inline(always)] - pub fn tempavgnum(&self) -> TEMPAVGNUM_R { - TEMPAVGNUM_R::new(((self.bits >> 3) & 1) != 0) + pub fn tempavgnum(&self) -> TempavgnumR { + TempavgnumR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 8:9 - EM2/EM3 Vscale"] #[inline(always)] - pub fn em23vscale(&self) -> EM23VSCALE_R { - EM23VSCALE_R::new(((self.bits >> 8) & 3) as u8) + pub fn em23vscale(&self) -> Em23vscaleR { + Em23vscaleR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 16 - Enable flash on demand wakeup"] #[inline(always)] - pub fn flashpwrupondemand(&self) -> FLASHPWRUPONDEMAND_R { - FLASHPWRUPONDEMAND_R::new(((self.bits >> 16) & 1) != 0) + pub fn flashpwrupondemand(&self) -> FlashpwrupondemandR { + FlashpwrupondemandR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 29 - EFP Direct Mode Enable"] #[inline(always)] - pub fn efpdirectmodeen(&self) -> EFPDIRECTMODEEN_R { - EFPDIRECTMODEEN_R::new(((self.bits >> 29) & 1) != 0) + pub fn efpdirectmodeen(&self) -> EfpdirectmodeenR { + EfpdirectmodeenR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - EFP drives DECOUPLE"] #[inline(always)] - pub fn efpdrvdecouple(&self) -> EFPDRVDECOUPLE_R { - EFPDRVDECOUPLE_R::new(((self.bits >> 30) & 1) != 0) + pub fn efpdrvdecouple(&self) -> EfpdrvdecoupleR { + EfpdrvdecoupleR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - EFP drives DVDD"] #[inline(always)] - pub fn efpdrvdvdd(&self) -> EFPDRVDVDD_R { - EFPDRVDVDD_R::new(((self.bits >> 31) & 1) != 0) + pub fn efpdrvdvdd(&self) -> EfpdrvdvddR { + EfpdrvdvddR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable debugging in EM2"] #[inline(always)] #[must_use] - pub fn em2dbgen(&mut self) -> EM2DBGEN_W<0> { - EM2DBGEN_W::new(self) + pub fn em2dbgen(&mut self) -> Em2dbgenW { + Em2dbgenW::new(self, 0) } #[doc = "Bit 3 - Averaged Temperature samples num"] #[inline(always)] #[must_use] - pub fn tempavgnum(&mut self) -> TEMPAVGNUM_W<3> { - TEMPAVGNUM_W::new(self) + pub fn tempavgnum(&mut self) -> TempavgnumW { + TempavgnumW::new(self, 3) } #[doc = "Bits 8:9 - EM2/EM3 Vscale"] #[inline(always)] #[must_use] - pub fn em23vscale(&mut self) -> EM23VSCALE_W<8> { - EM23VSCALE_W::new(self) + pub fn em23vscale(&mut self) -> Em23vscaleW { + Em23vscaleW::new(self, 8) } #[doc = "Bit 16 - Enable flash on demand wakeup"] #[inline(always)] #[must_use] - pub fn flashpwrupondemand(&mut self) -> FLASHPWRUPONDEMAND_W<16> { - FLASHPWRUPONDEMAND_W::new(self) + pub fn flashpwrupondemand(&mut self) -> FlashpwrupondemandW { + FlashpwrupondemandW::new(self, 16) } #[doc = "Bit 29 - EFP Direct Mode Enable"] #[inline(always)] #[must_use] - pub fn efpdirectmodeen(&mut self) -> EFPDIRECTMODEEN_W<29> { - EFPDIRECTMODEEN_W::new(self) + pub fn efpdirectmodeen(&mut self) -> EfpdirectmodeenW { + EfpdirectmodeenW::new(self, 29) } #[doc = "Bit 30 - EFP drives DECOUPLE"] #[inline(always)] #[must_use] - pub fn efpdrvdecouple(&mut self) -> EFPDRVDECOUPLE_W<30> { - EFPDRVDECOUPLE_W::new(self) + pub fn efpdrvdecouple(&mut self) -> EfpdrvdecoupleW { + EfpdrvdecoupleW::new(self, 30) } #[doc = "Bit 31 - EFP drives DVDD"] #[inline(always)] #[must_use] - pub fn efpdrvdvdd(&mut self) -> EFPDRVDVDD_W<31> { - EFPDRVDVDD_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn efpdrvdvdd(&mut self) -> EfpdrvdvddW { + EfpdrvdvddW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0x0200"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0200; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0x0200; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/decbod.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/decbod.rs index 70bc9a1..6a1fd18 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/decbod.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/decbod.rs @@ -1,125 +1,85 @@ #[doc = "Register `DECBOD` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DECBOD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DECBODEN` reader - DECBOD enable"] -pub type DECBODEN_R = crate::BitReader; +pub type DecbodenR = crate::BitReader; #[doc = "Field `DECBODEN` writer - DECBOD enable"] -pub type DECBODEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DECBOD_SPEC, bool, O>; +pub type DecbodenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DECBODMASK` reader - DECBOD Mask"] -pub type DECBODMASK_R = crate::BitReader; +pub type DecbodmaskR = crate::BitReader; #[doc = "Field `DECBODMASK` writer - DECBOD Mask"] -pub type DECBODMASK_W<'a, const O: u8> = crate::BitWriter<'a, u32, DECBOD_SPEC, bool, O>; +pub type DecbodmaskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DECOVMBODEN` reader - Over Voltage Monitor enable"] -pub type DECOVMBODEN_R = crate::BitReader; +pub type DecovmbodenR = crate::BitReader; #[doc = "Field `DECOVMBODEN` writer - Over Voltage Monitor enable"] -pub type DECOVMBODEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DECBOD_SPEC, bool, O>; +pub type DecovmbodenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DECOVMBODMASK` reader - Over Voltage Monitor Mask"] -pub type DECOVMBODMASK_R = crate::BitReader; +pub type DecovmbodmaskR = crate::BitReader; #[doc = "Field `DECOVMBODMASK` writer - Over Voltage Monitor Mask"] -pub type DECOVMBODMASK_W<'a, const O: u8> = crate::BitWriter<'a, u32, DECBOD_SPEC, bool, O>; +pub type DecovmbodmaskW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DECBOD enable"] #[inline(always)] - pub fn decboden(&self) -> DECBODEN_R { - DECBODEN_R::new((self.bits & 1) != 0) + pub fn decboden(&self) -> DecbodenR { + DecbodenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DECBOD Mask"] #[inline(always)] - pub fn decbodmask(&self) -> DECBODMASK_R { - DECBODMASK_R::new(((self.bits >> 1) & 1) != 0) + pub fn decbodmask(&self) -> DecbodmaskR { + DecbodmaskR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 4 - Over Voltage Monitor enable"] #[inline(always)] - pub fn decovmboden(&self) -> DECOVMBODEN_R { - DECOVMBODEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn decovmboden(&self) -> DecovmbodenR { + DecovmbodenR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Over Voltage Monitor Mask"] #[inline(always)] - pub fn decovmbodmask(&self) -> DECOVMBODMASK_R { - DECOVMBODMASK_R::new(((self.bits >> 5) & 1) != 0) + pub fn decovmbodmask(&self) -> DecovmbodmaskR { + DecovmbodmaskR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - DECBOD enable"] #[inline(always)] #[must_use] - pub fn decboden(&mut self) -> DECBODEN_W<0> { - DECBODEN_W::new(self) + pub fn decboden(&mut self) -> DecbodenW { + DecbodenW::new(self, 0) } #[doc = "Bit 1 - DECBOD Mask"] #[inline(always)] #[must_use] - pub fn decbodmask(&mut self) -> DECBODMASK_W<1> { - DECBODMASK_W::new(self) + pub fn decbodmask(&mut self) -> DecbodmaskW { + DecbodmaskW::new(self, 1) } #[doc = "Bit 4 - Over Voltage Monitor enable"] #[inline(always)] #[must_use] - pub fn decovmboden(&mut self) -> DECOVMBODEN_W<4> { - DECOVMBODEN_W::new(self) + pub fn decovmboden(&mut self) -> DecovmbodenW { + DecovmbodenW::new(self, 4) } #[doc = "Bit 5 - Over Voltage Monitor Mask"] #[inline(always)] #[must_use] - pub fn decovmbodmask(&mut self) -> DECOVMBODMASK_W<5> { - DECOVMBODMASK_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn decovmbodmask(&mut self) -> DecovmbodmaskW { + DecovmbodmaskW::new(self, 5) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [decbod](index.html) module"] -pub struct DECBOD_SPEC; -impl crate::RegisterSpec for DECBOD_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`decbod::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`decbod::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DecbodSpec; +impl crate::RegisterSpec for DecbodSpec { type Ux = u32; } -#[doc = "`read()` method returns [decbod::R](R) reader structure"] -impl crate::Readable for DECBOD_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [decbod::W](W) writer structure"] -impl crate::Writable for DECBOD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`decbod::R`](R) reader structure"] +impl crate::Readable for DecbodSpec {} +#[doc = "`write(|w| ..)` method takes [`decbod::W`](W) writer structure"] +impl crate::Writable for DecbodSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DECBOD to value 0x22"] -impl crate::Resettable for DECBOD_SPEC { - const RESET_VALUE: Self::Ux = 0x22; +impl crate::Resettable for DecbodSpec { + const RESET_VALUE: u32 = 0x22; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/dgien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/dgien.rs index 5025d27..f0d6045 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/dgien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/dgien.rs @@ -1,125 +1,85 @@ #[doc = "Register `DGIEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DGIEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EM23WAKEUPDGIEN` reader - EM23 Wake up Interrupt enable"] -pub type EM23WAKEUPDGIEN_R = crate::BitReader; +pub type Em23wakeupdgienR = crate::BitReader; #[doc = "Field `EM23WAKEUPDGIEN` writer - EM23 Wake up Interrupt enable"] -pub type EM23WAKEUPDGIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DGIEN_SPEC, bool, O>; +pub type Em23wakeupdgienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMPDGIEN` reader - Temperature Interrupt enable"] -pub type TEMPDGIEN_R = crate::BitReader; +pub type TempdgienR = crate::BitReader; #[doc = "Field `TEMPDGIEN` writer - Temperature Interrupt enable"] -pub type TEMPDGIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DGIEN_SPEC, bool, O>; +pub type TempdgienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMPLOWDGIEN` reader - Temperature low Interrupt enable"] -pub type TEMPLOWDGIEN_R = crate::BitReader; +pub type TemplowdgienR = crate::BitReader; #[doc = "Field `TEMPLOWDGIEN` writer - Temperature low Interrupt enable"] -pub type TEMPLOWDGIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DGIEN_SPEC, bool, O>; +pub type TemplowdgienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMPHIGHDGIEN` reader - Temperature high Interrupt enable"] -pub type TEMPHIGHDGIEN_R = crate::BitReader; +pub type TemphighdgienR = crate::BitReader; #[doc = "Field `TEMPHIGHDGIEN` writer - Temperature high Interrupt enable"] -pub type TEMPHIGHDGIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DGIEN_SPEC, bool, O>; +pub type TemphighdgienW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 24 - EM23 Wake up Interrupt enable"] #[inline(always)] - pub fn em23wakeupdgien(&self) -> EM23WAKEUPDGIEN_R { - EM23WAKEUPDGIEN_R::new(((self.bits >> 24) & 1) != 0) + pub fn em23wakeupdgien(&self) -> Em23wakeupdgienR { + Em23wakeupdgienR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 29 - Temperature Interrupt enable"] #[inline(always)] - pub fn tempdgien(&self) -> TEMPDGIEN_R { - TEMPDGIEN_R::new(((self.bits >> 29) & 1) != 0) + pub fn tempdgien(&self) -> TempdgienR { + TempdgienR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Temperature low Interrupt enable"] #[inline(always)] - pub fn templowdgien(&self) -> TEMPLOWDGIEN_R { - TEMPLOWDGIEN_R::new(((self.bits >> 30) & 1) != 0) + pub fn templowdgien(&self) -> TemplowdgienR { + TemplowdgienR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Temperature high Interrupt enable"] #[inline(always)] - pub fn temphighdgien(&self) -> TEMPHIGHDGIEN_R { - TEMPHIGHDGIEN_R::new(((self.bits >> 31) & 1) != 0) + pub fn temphighdgien(&self) -> TemphighdgienR { + TemphighdgienR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 24 - EM23 Wake up Interrupt enable"] #[inline(always)] #[must_use] - pub fn em23wakeupdgien(&mut self) -> EM23WAKEUPDGIEN_W<24> { - EM23WAKEUPDGIEN_W::new(self) + pub fn em23wakeupdgien(&mut self) -> Em23wakeupdgienW { + Em23wakeupdgienW::new(self, 24) } #[doc = "Bit 29 - Temperature Interrupt enable"] #[inline(always)] #[must_use] - pub fn tempdgien(&mut self) -> TEMPDGIEN_W<29> { - TEMPDGIEN_W::new(self) + pub fn tempdgien(&mut self) -> TempdgienW { + TempdgienW::new(self, 29) } #[doc = "Bit 30 - Temperature low Interrupt enable"] #[inline(always)] #[must_use] - pub fn templowdgien(&mut self) -> TEMPLOWDGIEN_W<30> { - TEMPLOWDGIEN_W::new(self) + pub fn templowdgien(&mut self) -> TemplowdgienW { + TemplowdgienW::new(self, 30) } #[doc = "Bit 31 - Temperature high Interrupt enable"] #[inline(always)] #[must_use] - pub fn temphighdgien(&mut self) -> TEMPHIGHDGIEN_W<31> { - TEMPHIGHDGIEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn temphighdgien(&mut self) -> TemphighdgienW { + TemphighdgienW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dgien](index.html) module"] -pub struct DGIEN_SPEC; -impl crate::RegisterSpec for DGIEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dgien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dgien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DgienSpec; +impl crate::RegisterSpec for DgienSpec { type Ux = u32; } -#[doc = "`read()` method returns [dgien::R](R) reader structure"] -impl crate::Readable for DGIEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dgien::W](W) writer structure"] -impl crate::Writable for DGIEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dgien::R`](R) reader structure"] +impl crate::Readable for DgienSpec {} +#[doc = "`write(|w| ..)` method takes [`dgien::W`](W) writer structure"] +impl crate::Writable for DgienSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DGIEN to value 0"] -impl crate::Resettable for DGIEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DgienSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/dgif.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/dgif.rs index 8e2dc8d..0c63373 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/dgif.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/dgif.rs @@ -1,125 +1,85 @@ #[doc = "Register `DGIF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DGIF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EM23WAKEUPDGIF` reader - EM23 Wake up Interrupt flag"] -pub type EM23WAKEUPDGIF_R = crate::BitReader; +pub type Em23wakeupdgifR = crate::BitReader; #[doc = "Field `EM23WAKEUPDGIF` writer - EM23 Wake up Interrupt flag"] -pub type EM23WAKEUPDGIF_W<'a, const O: u8> = crate::BitWriter<'a, u32, DGIF_SPEC, bool, O>; +pub type Em23wakeupdgifW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMPDGIF` reader - Temperature Interrupt flag"] -pub type TEMPDGIF_R = crate::BitReader; +pub type TempdgifR = crate::BitReader; #[doc = "Field `TEMPDGIF` writer - Temperature Interrupt flag"] -pub type TEMPDGIF_W<'a, const O: u8> = crate::BitWriter<'a, u32, DGIF_SPEC, bool, O>; +pub type TempdgifW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMPLOWDGIF` reader - Temperature low Interrupt flag"] -pub type TEMPLOWDGIF_R = crate::BitReader; +pub type TemplowdgifR = crate::BitReader; #[doc = "Field `TEMPLOWDGIF` writer - Temperature low Interrupt flag"] -pub type TEMPLOWDGIF_W<'a, const O: u8> = crate::BitWriter<'a, u32, DGIF_SPEC, bool, O>; +pub type TemplowdgifW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMPHIGHDGIF` reader - Temperature high Interrupt flag"] -pub type TEMPHIGHDGIF_R = crate::BitReader; +pub type TemphighdgifR = crate::BitReader; #[doc = "Field `TEMPHIGHDGIF` writer - Temperature high Interrupt flag"] -pub type TEMPHIGHDGIF_W<'a, const O: u8> = crate::BitWriter<'a, u32, DGIF_SPEC, bool, O>; +pub type TemphighdgifW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 24 - EM23 Wake up Interrupt flag"] #[inline(always)] - pub fn em23wakeupdgif(&self) -> EM23WAKEUPDGIF_R { - EM23WAKEUPDGIF_R::new(((self.bits >> 24) & 1) != 0) + pub fn em23wakeupdgif(&self) -> Em23wakeupdgifR { + Em23wakeupdgifR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 29 - Temperature Interrupt flag"] #[inline(always)] - pub fn tempdgif(&self) -> TEMPDGIF_R { - TEMPDGIF_R::new(((self.bits >> 29) & 1) != 0) + pub fn tempdgif(&self) -> TempdgifR { + TempdgifR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Temperature low Interrupt flag"] #[inline(always)] - pub fn templowdgif(&self) -> TEMPLOWDGIF_R { - TEMPLOWDGIF_R::new(((self.bits >> 30) & 1) != 0) + pub fn templowdgif(&self) -> TemplowdgifR { + TemplowdgifR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Temperature high Interrupt flag"] #[inline(always)] - pub fn temphighdgif(&self) -> TEMPHIGHDGIF_R { - TEMPHIGHDGIF_R::new(((self.bits >> 31) & 1) != 0) + pub fn temphighdgif(&self) -> TemphighdgifR { + TemphighdgifR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 24 - EM23 Wake up Interrupt flag"] #[inline(always)] #[must_use] - pub fn em23wakeupdgif(&mut self) -> EM23WAKEUPDGIF_W<24> { - EM23WAKEUPDGIF_W::new(self) + pub fn em23wakeupdgif(&mut self) -> Em23wakeupdgifW { + Em23wakeupdgifW::new(self, 24) } #[doc = "Bit 29 - Temperature Interrupt flag"] #[inline(always)] #[must_use] - pub fn tempdgif(&mut self) -> TEMPDGIF_W<29> { - TEMPDGIF_W::new(self) + pub fn tempdgif(&mut self) -> TempdgifW { + TempdgifW::new(self, 29) } #[doc = "Bit 30 - Temperature low Interrupt flag"] #[inline(always)] #[must_use] - pub fn templowdgif(&mut self) -> TEMPLOWDGIF_W<30> { - TEMPLOWDGIF_W::new(self) + pub fn templowdgif(&mut self) -> TemplowdgifW { + TemplowdgifW::new(self, 30) } #[doc = "Bit 31 - Temperature high Interrupt flag"] #[inline(always)] #[must_use] - pub fn temphighdgif(&mut self) -> TEMPHIGHDGIF_W<31> { - TEMPHIGHDGIF_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn temphighdgif(&mut self) -> TemphighdgifW { + TemphighdgifW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dgif](index.html) module"] -pub struct DGIF_SPEC; -impl crate::RegisterSpec for DGIF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dgif::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dgif::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DgifSpec; +impl crate::RegisterSpec for DgifSpec { type Ux = u32; } -#[doc = "`read()` method returns [dgif::R](R) reader structure"] -impl crate::Readable for DGIF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dgif::W](W) writer structure"] -impl crate::Writable for DGIF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dgif::R`](R) reader structure"] +impl crate::Readable for DgifSpec {} +#[doc = "`write(|w| ..)` method takes [`dgif::W`](W) writer structure"] +impl crate::Writable for DgifSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DGIF to value 0"] -impl crate::Resettable for DGIF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DgifSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/efpien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/efpien.rs index 814f3eb..aee6c4b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/efpien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/efpien.rs @@ -1,80 +1,40 @@ #[doc = "Register `EFPIEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EFPIEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EFPIEN` reader - EFP Interrupt enable"] -pub type EFPIEN_R = crate::BitReader; +pub type EfpienR = crate::BitReader; #[doc = "Field `EFPIEN` writer - EFP Interrupt enable"] -pub type EFPIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EFPIEN_SPEC, bool, O>; +pub type EfpienW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - EFP Interrupt enable"] #[inline(always)] - pub fn efpien(&self) -> EFPIEN_R { - EFPIEN_R::new((self.bits & 1) != 0) + pub fn efpien(&self) -> EfpienR { + EfpienR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - EFP Interrupt enable"] #[inline(always)] #[must_use] - pub fn efpien(&mut self) -> EFPIEN_W<0> { - EFPIEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn efpien(&mut self) -> EfpienW { + EfpienW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [efpien](index.html) module"] -pub struct EFPIEN_SPEC; -impl crate::RegisterSpec for EFPIEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`efpien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`efpien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EfpienSpec; +impl crate::RegisterSpec for EfpienSpec { type Ux = u32; } -#[doc = "`read()` method returns [efpien::R](R) reader structure"] -impl crate::Readable for EFPIEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [efpien::W](W) writer structure"] -impl crate::Writable for EFPIEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`efpien::R`](R) reader structure"] +impl crate::Readable for EfpienSpec {} +#[doc = "`write(|w| ..)` method takes [`efpien::W`](W) writer structure"] +impl crate::Writable for EfpienSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EFPIEN to value 0"] -impl crate::Resettable for EFPIEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EfpienSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/efpif.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/efpif.rs index ae2f261..aa1dad8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/efpif.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/efpif.rs @@ -1,80 +1,40 @@ #[doc = "Register `EFPIF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EFPIF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EFPIF` reader - EFP Interrupt Flag"] -pub type EFPIF_R = crate::BitReader; +pub type EfpifR = crate::BitReader; #[doc = "Field `EFPIF` writer - EFP Interrupt Flag"] -pub type EFPIF_W<'a, const O: u8> = crate::BitWriter<'a, u32, EFPIF_SPEC, bool, O>; +pub type EfpifW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - EFP Interrupt Flag"] #[inline(always)] - pub fn efpif(&self) -> EFPIF_R { - EFPIF_R::new((self.bits & 1) != 0) + pub fn efpif(&self) -> EfpifR { + EfpifR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - EFP Interrupt Flag"] #[inline(always)] #[must_use] - pub fn efpif(&mut self) -> EFPIF_W<0> { - EFPIF_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn efpif(&mut self) -> EfpifW { + EfpifW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [efpif](index.html) module"] -pub struct EFPIF_SPEC; -impl crate::RegisterSpec for EFPIF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`efpif::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`efpif::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EfpifSpec; +impl crate::RegisterSpec for EfpifSpec { type Ux = u32; } -#[doc = "`read()` method returns [efpif::R](R) reader structure"] -impl crate::Readable for EFPIF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [efpif::W](W) writer structure"] -impl crate::Writable for EFPIF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`efpif::R`](R) reader structure"] +impl crate::Readable for EfpifSpec {} +#[doc = "`write(|w| ..)` method takes [`efpif::W`](W) writer structure"] +impl crate::Writable for EfpifSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EFPIF to value 0"] -impl crate::Resettable for EFPIF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EfpifSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/em4ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/em4ctrl.rs index b971f4d..9638dc2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/em4ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/em4ctrl.rs @@ -1,172 +1,139 @@ #[doc = "Register `EM4CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EM4CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EM4ENTRY` reader - EM4 entry request"] -pub type EM4ENTRY_R = crate::FieldReader; +pub type Em4entryR = crate::FieldReader; #[doc = "Field `EM4ENTRY` writer - EM4 entry request"] -pub type EM4ENTRY_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EM4CTRL_SPEC, u8, u8, 2, O>; -#[doc = "Field `EM4IORETMODE` reader - EM4 IO retention mode"] -pub type EM4IORETMODE_R = crate::FieldReader; +pub type Em4entryW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "EM4 IO retention mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EM4IORETMODE_A { +pub enum Em4ioretmode { #[doc = "0: No Retention: Pads enter reset state when entering EM4"] - DISABLE = 0, + Disable = 0, #[doc = "1: Retention through EM4: Pads enter reset state when exiting EM4"] - EM4EXIT = 1, + Em4exit = 1, #[doc = "2: Retention through EM4 and Wakeup: software writes UNLATCH register to remove retention"] - SWUNLATCH = 2, + Swunlatch = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EM4IORETMODE_A) -> Self { + fn from(variant: Em4ioretmode) -> Self { variant as _ } } -impl EM4IORETMODE_R { +impl crate::FieldSpec for Em4ioretmode { + type Ux = u8; +} +impl crate::IsEnum for Em4ioretmode {} +#[doc = "Field `EM4IORETMODE` reader - EM4 IO retention mode"] +pub type Em4ioretmodeR = crate::FieldReader; +impl Em4ioretmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(EM4IORETMODE_A::DISABLE), - 1 => Some(EM4IORETMODE_A::EM4EXIT), - 2 => Some(EM4IORETMODE_A::SWUNLATCH), + 0 => Some(Em4ioretmode::Disable), + 1 => Some(Em4ioretmode::Em4exit), + 2 => Some(Em4ioretmode::Swunlatch), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "No Retention: Pads enter reset state when entering EM4"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EM4IORETMODE_A::DISABLE + *self == Em4ioretmode::Disable } - #[doc = "Checks if the value of the field is `EM4EXIT`"] + #[doc = "Retention through EM4: Pads enter reset state when exiting EM4"] #[inline(always)] pub fn is_em4exit(&self) -> bool { - *self == EM4IORETMODE_A::EM4EXIT + *self == Em4ioretmode::Em4exit } - #[doc = "Checks if the value of the field is `SWUNLATCH`"] + #[doc = "Retention through EM4 and Wakeup: software writes UNLATCH register to remove retention"] #[inline(always)] pub fn is_swunlatch(&self) -> bool { - *self == EM4IORETMODE_A::SWUNLATCH + *self == Em4ioretmode::Swunlatch } } #[doc = "Field `EM4IORETMODE` writer - EM4 IO retention mode"] -pub type EM4IORETMODE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EM4CTRL_SPEC, u8, EM4IORETMODE_A, 2, O>; -impl<'a, const O: u8> EM4IORETMODE_W<'a, O> { +pub type Em4ioretmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Em4ioretmode>; +impl<'a, REG> Em4ioretmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No Retention: Pads enter reset state when entering EM4"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EM4IORETMODE_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Em4ioretmode::Disable) } #[doc = "Retention through EM4: Pads enter reset state when exiting EM4"] #[inline(always)] - pub fn em4exit(self) -> &'a mut W { - self.variant(EM4IORETMODE_A::EM4EXIT) + pub fn em4exit(self) -> &'a mut crate::W { + self.variant(Em4ioretmode::Em4exit) } #[doc = "Retention through EM4 and Wakeup: software writes UNLATCH register to remove retention"] #[inline(always)] - pub fn swunlatch(self) -> &'a mut W { - self.variant(EM4IORETMODE_A::SWUNLATCH) + pub fn swunlatch(self) -> &'a mut crate::W { + self.variant(Em4ioretmode::Swunlatch) } } #[doc = "Field `BOD3SENSEEM4WU` reader - Set BOD3SENSE as EM4 wakeup"] -pub type BOD3SENSEEM4WU_R = crate::BitReader; +pub type Bod3senseem4wuR = crate::BitReader; #[doc = "Field `BOD3SENSEEM4WU` writer - Set BOD3SENSE as EM4 wakeup"] -pub type BOD3SENSEEM4WU_W<'a, const O: u8> = crate::BitWriter<'a, u32, EM4CTRL_SPEC, bool, O>; +pub type Bod3senseem4wuW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - EM4 entry request"] #[inline(always)] - pub fn em4entry(&self) -> EM4ENTRY_R { - EM4ENTRY_R::new((self.bits & 3) as u8) + pub fn em4entry(&self) -> Em4entryR { + Em4entryR::new((self.bits & 3) as u8) } #[doc = "Bits 4:5 - EM4 IO retention mode"] #[inline(always)] - pub fn em4ioretmode(&self) -> EM4IORETMODE_R { - EM4IORETMODE_R::new(((self.bits >> 4) & 3) as u8) + pub fn em4ioretmode(&self) -> Em4ioretmodeR { + Em4ioretmodeR::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bit 8 - Set BOD3SENSE as EM4 wakeup"] #[inline(always)] - pub fn bod3senseem4wu(&self) -> BOD3SENSEEM4WU_R { - BOD3SENSEEM4WU_R::new(((self.bits >> 8) & 1) != 0) + pub fn bod3senseem4wu(&self) -> Bod3senseem4wuR { + Bod3senseem4wuR::new(((self.bits >> 8) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - EM4 entry request"] #[inline(always)] #[must_use] - pub fn em4entry(&mut self) -> EM4ENTRY_W<0> { - EM4ENTRY_W::new(self) + pub fn em4entry(&mut self) -> Em4entryW { + Em4entryW::new(self, 0) } #[doc = "Bits 4:5 - EM4 IO retention mode"] #[inline(always)] #[must_use] - pub fn em4ioretmode(&mut self) -> EM4IORETMODE_W<4> { - EM4IORETMODE_W::new(self) + pub fn em4ioretmode(&mut self) -> Em4ioretmodeW { + Em4ioretmodeW::new(self, 4) } #[doc = "Bit 8 - Set BOD3SENSE as EM4 wakeup"] #[inline(always)] #[must_use] - pub fn bod3senseem4wu(&mut self) -> BOD3SENSEEM4WU_W<8> { - BOD3SENSEEM4WU_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn bod3senseem4wu(&mut self) -> Bod3senseem4wuW { + Bod3senseem4wuW::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [em4ctrl](index.html) module"] -pub struct EM4CTRL_SPEC; -impl crate::RegisterSpec for EM4CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em4ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em4ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Em4ctrlSpec; +impl crate::RegisterSpec for Em4ctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [em4ctrl::R](R) reader structure"] -impl crate::Readable for EM4CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [em4ctrl::W](W) writer structure"] -impl crate::Writable for EM4CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`em4ctrl::R`](R) reader structure"] +impl crate::Readable for Em4ctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`em4ctrl::W`](W) writer structure"] +impl crate::Writable for Em4ctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EM4CTRL to value 0"] -impl crate::Resettable for EM4CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Em4ctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/ien.rs index 9552370..fbefbe5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/ien.rs @@ -1,185 +1,145 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `AVDDBOD` reader - AVDD BOD Interrupt enable"] -pub type AVDDBOD_R = crate::BitReader; +pub type AvddbodR = crate::BitReader; #[doc = "Field `AVDDBOD` writer - AVDD BOD Interrupt enable"] -pub type AVDDBOD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AvddbodW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IOVDD0BOD` reader - VDDIO0 BOD Interrupt enable"] -pub type IOVDD0BOD_R = crate::BitReader; +pub type Iovdd0bodR = crate::BitReader; #[doc = "Field `IOVDD0BOD` writer - VDDIO0 BOD Interrupt enable"] -pub type IOVDD0BOD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Iovdd0bodW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM23WAKEUP` reader - EM23 Wake up Interrupt enable"] -pub type EM23WAKEUP_R = crate::BitReader; +pub type Em23wakeupR = crate::BitReader; #[doc = "Field `EM23WAKEUP` writer - EM23 Wake up Interrupt enable"] -pub type EM23WAKEUP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em23wakeupW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VSCALEDONE` reader - Vscale done Interrupt enable"] -pub type VSCALEDONE_R = crate::BitReader; +pub type VscaledoneR = crate::BitReader; #[doc = "Field `VSCALEDONE` writer - Vscale done Interrupt enable"] -pub type VSCALEDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type VscaledoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMPAVG` reader - Temperature Interrupt enable"] -pub type TEMPAVG_R = crate::BitReader; +pub type TempavgR = crate::BitReader; #[doc = "Field `TEMPAVG` writer - Temperature Interrupt enable"] -pub type TEMPAVG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TempavgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMP` reader - Temperature Interrupt enable"] -pub type TEMP_R = crate::BitReader; +pub type TempR = crate::BitReader; #[doc = "Field `TEMP` writer - Temperature Interrupt enable"] -pub type TEMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TempW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMPLOW` reader - Temperature low Interrupt enable"] -pub type TEMPLOW_R = crate::BitReader; +pub type TemplowR = crate::BitReader; #[doc = "Field `TEMPLOW` writer - Temperature low Interrupt enable"] -pub type TEMPLOW_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TemplowW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMPHIGH` reader - Temperature high Interrupt enable"] -pub type TEMPHIGH_R = crate::BitReader; +pub type TemphighR = crate::BitReader; #[doc = "Field `TEMPHIGH` writer - Temperature high Interrupt enable"] -pub type TEMPHIGH_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TemphighW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 16 - AVDD BOD Interrupt enable"] #[inline(always)] - pub fn avddbod(&self) -> AVDDBOD_R { - AVDDBOD_R::new(((self.bits >> 16) & 1) != 0) + pub fn avddbod(&self) -> AvddbodR { + AvddbodR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - VDDIO0 BOD Interrupt enable"] #[inline(always)] - pub fn iovdd0bod(&self) -> IOVDD0BOD_R { - IOVDD0BOD_R::new(((self.bits >> 17) & 1) != 0) + pub fn iovdd0bod(&self) -> Iovdd0bodR { + Iovdd0bodR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 24 - EM23 Wake up Interrupt enable"] #[inline(always)] - pub fn em23wakeup(&self) -> EM23WAKEUP_R { - EM23WAKEUP_R::new(((self.bits >> 24) & 1) != 0) + pub fn em23wakeup(&self) -> Em23wakeupR { + Em23wakeupR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Vscale done Interrupt enable"] #[inline(always)] - pub fn vscaledone(&self) -> VSCALEDONE_R { - VSCALEDONE_R::new(((self.bits >> 25) & 1) != 0) + pub fn vscaledone(&self) -> VscaledoneR { + VscaledoneR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 27 - Temperature Interrupt enable"] #[inline(always)] - pub fn tempavg(&self) -> TEMPAVG_R { - TEMPAVG_R::new(((self.bits >> 27) & 1) != 0) + pub fn tempavg(&self) -> TempavgR { + TempavgR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 29 - Temperature Interrupt enable"] #[inline(always)] - pub fn temp(&self) -> TEMP_R { - TEMP_R::new(((self.bits >> 29) & 1) != 0) + pub fn temp(&self) -> TempR { + TempR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Temperature low Interrupt enable"] #[inline(always)] - pub fn templow(&self) -> TEMPLOW_R { - TEMPLOW_R::new(((self.bits >> 30) & 1) != 0) + pub fn templow(&self) -> TemplowR { + TemplowR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Temperature high Interrupt enable"] #[inline(always)] - pub fn temphigh(&self) -> TEMPHIGH_R { - TEMPHIGH_R::new(((self.bits >> 31) & 1) != 0) + pub fn temphigh(&self) -> TemphighR { + TemphighR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 16 - AVDD BOD Interrupt enable"] #[inline(always)] #[must_use] - pub fn avddbod(&mut self) -> AVDDBOD_W<16> { - AVDDBOD_W::new(self) + pub fn avddbod(&mut self) -> AvddbodW { + AvddbodW::new(self, 16) } #[doc = "Bit 17 - VDDIO0 BOD Interrupt enable"] #[inline(always)] #[must_use] - pub fn iovdd0bod(&mut self) -> IOVDD0BOD_W<17> { - IOVDD0BOD_W::new(self) + pub fn iovdd0bod(&mut self) -> Iovdd0bodW { + Iovdd0bodW::new(self, 17) } #[doc = "Bit 24 - EM23 Wake up Interrupt enable"] #[inline(always)] #[must_use] - pub fn em23wakeup(&mut self) -> EM23WAKEUP_W<24> { - EM23WAKEUP_W::new(self) + pub fn em23wakeup(&mut self) -> Em23wakeupW { + Em23wakeupW::new(self, 24) } #[doc = "Bit 25 - Vscale done Interrupt enable"] #[inline(always)] #[must_use] - pub fn vscaledone(&mut self) -> VSCALEDONE_W<25> { - VSCALEDONE_W::new(self) + pub fn vscaledone(&mut self) -> VscaledoneW { + VscaledoneW::new(self, 25) } #[doc = "Bit 27 - Temperature Interrupt enable"] #[inline(always)] #[must_use] - pub fn tempavg(&mut self) -> TEMPAVG_W<27> { - TEMPAVG_W::new(self) + pub fn tempavg(&mut self) -> TempavgW { + TempavgW::new(self, 27) } #[doc = "Bit 29 - Temperature Interrupt enable"] #[inline(always)] #[must_use] - pub fn temp(&mut self) -> TEMP_W<29> { - TEMP_W::new(self) + pub fn temp(&mut self) -> TempW { + TempW::new(self, 29) } #[doc = "Bit 30 - Temperature low Interrupt enable"] #[inline(always)] #[must_use] - pub fn templow(&mut self) -> TEMPLOW_W<30> { - TEMPLOW_W::new(self) + pub fn templow(&mut self) -> TemplowW { + TemplowW::new(self, 30) } #[doc = "Bit 31 - Temperature high Interrupt enable"] #[inline(always)] #[must_use] - pub fn temphigh(&mut self) -> TEMPHIGH_W<31> { - TEMPHIGH_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn temphigh(&mut self) -> TemphighW { + TemphighW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/if_.rs index 5a1cb8e..21e21a6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/if_.rs @@ -1,185 +1,145 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `AVDDBOD` reader - AVDD BOD Interrupt flag"] -pub type AVDDBOD_R = crate::BitReader; +pub type AvddbodR = crate::BitReader; #[doc = "Field `AVDDBOD` writer - AVDD BOD Interrupt flag"] -pub type AVDDBOD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AvddbodW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IOVDD0BOD` reader - VDDIO0 BOD Interrupt flag"] -pub type IOVDD0BOD_R = crate::BitReader; +pub type Iovdd0bodR = crate::BitReader; #[doc = "Field `IOVDD0BOD` writer - VDDIO0 BOD Interrupt flag"] -pub type IOVDD0BOD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Iovdd0bodW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM23WAKEUP` reader - EM23 Wake up Interrupt flag"] -pub type EM23WAKEUP_R = crate::BitReader; +pub type Em23wakeupR = crate::BitReader; #[doc = "Field `EM23WAKEUP` writer - EM23 Wake up Interrupt flag"] -pub type EM23WAKEUP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Em23wakeupW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VSCALEDONE` reader - Vscale done Interrupt flag"] -pub type VSCALEDONE_R = crate::BitReader; +pub type VscaledoneR = crate::BitReader; #[doc = "Field `VSCALEDONE` writer - Vscale done Interrupt flag"] -pub type VSCALEDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type VscaledoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMPAVG` reader - Temperature Average Interrupt flag"] -pub type TEMPAVG_R = crate::BitReader; +pub type TempavgR = crate::BitReader; #[doc = "Field `TEMPAVG` writer - Temperature Average Interrupt flag"] -pub type TEMPAVG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TempavgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMP` reader - Temperature Interrupt flag"] -pub type TEMP_R = crate::BitReader; +pub type TempR = crate::BitReader; #[doc = "Field `TEMP` writer - Temperature Interrupt flag"] -pub type TEMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TempW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMPLOW` reader - Temperature low Interrupt flag"] -pub type TEMPLOW_R = crate::BitReader; +pub type TemplowR = crate::BitReader; #[doc = "Field `TEMPLOW` writer - Temperature low Interrupt flag"] -pub type TEMPLOW_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TemplowW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEMPHIGH` reader - Temperature high Interrupt flag"] -pub type TEMPHIGH_R = crate::BitReader; +pub type TemphighR = crate::BitReader; #[doc = "Field `TEMPHIGH` writer - Temperature high Interrupt flag"] -pub type TEMPHIGH_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TemphighW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 16 - AVDD BOD Interrupt flag"] #[inline(always)] - pub fn avddbod(&self) -> AVDDBOD_R { - AVDDBOD_R::new(((self.bits >> 16) & 1) != 0) + pub fn avddbod(&self) -> AvddbodR { + AvddbodR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - VDDIO0 BOD Interrupt flag"] #[inline(always)] - pub fn iovdd0bod(&self) -> IOVDD0BOD_R { - IOVDD0BOD_R::new(((self.bits >> 17) & 1) != 0) + pub fn iovdd0bod(&self) -> Iovdd0bodR { + Iovdd0bodR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 24 - EM23 Wake up Interrupt flag"] #[inline(always)] - pub fn em23wakeup(&self) -> EM23WAKEUP_R { - EM23WAKEUP_R::new(((self.bits >> 24) & 1) != 0) + pub fn em23wakeup(&self) -> Em23wakeupR { + Em23wakeupR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Vscale done Interrupt flag"] #[inline(always)] - pub fn vscaledone(&self) -> VSCALEDONE_R { - VSCALEDONE_R::new(((self.bits >> 25) & 1) != 0) + pub fn vscaledone(&self) -> VscaledoneR { + VscaledoneR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 27 - Temperature Average Interrupt flag"] #[inline(always)] - pub fn tempavg(&self) -> TEMPAVG_R { - TEMPAVG_R::new(((self.bits >> 27) & 1) != 0) + pub fn tempavg(&self) -> TempavgR { + TempavgR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 29 - Temperature Interrupt flag"] #[inline(always)] - pub fn temp(&self) -> TEMP_R { - TEMP_R::new(((self.bits >> 29) & 1) != 0) + pub fn temp(&self) -> TempR { + TempR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Temperature low Interrupt flag"] #[inline(always)] - pub fn templow(&self) -> TEMPLOW_R { - TEMPLOW_R::new(((self.bits >> 30) & 1) != 0) + pub fn templow(&self) -> TemplowR { + TemplowR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Temperature high Interrupt flag"] #[inline(always)] - pub fn temphigh(&self) -> TEMPHIGH_R { - TEMPHIGH_R::new(((self.bits >> 31) & 1) != 0) + pub fn temphigh(&self) -> TemphighR { + TemphighR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 16 - AVDD BOD Interrupt flag"] #[inline(always)] #[must_use] - pub fn avddbod(&mut self) -> AVDDBOD_W<16> { - AVDDBOD_W::new(self) + pub fn avddbod(&mut self) -> AvddbodW { + AvddbodW::new(self, 16) } #[doc = "Bit 17 - VDDIO0 BOD Interrupt flag"] #[inline(always)] #[must_use] - pub fn iovdd0bod(&mut self) -> IOVDD0BOD_W<17> { - IOVDD0BOD_W::new(self) + pub fn iovdd0bod(&mut self) -> Iovdd0bodW { + Iovdd0bodW::new(self, 17) } #[doc = "Bit 24 - EM23 Wake up Interrupt flag"] #[inline(always)] #[must_use] - pub fn em23wakeup(&mut self) -> EM23WAKEUP_W<24> { - EM23WAKEUP_W::new(self) + pub fn em23wakeup(&mut self) -> Em23wakeupW { + Em23wakeupW::new(self, 24) } #[doc = "Bit 25 - Vscale done Interrupt flag"] #[inline(always)] #[must_use] - pub fn vscaledone(&mut self) -> VSCALEDONE_W<25> { - VSCALEDONE_W::new(self) + pub fn vscaledone(&mut self) -> VscaledoneW { + VscaledoneW::new(self, 25) } #[doc = "Bit 27 - Temperature Average Interrupt flag"] #[inline(always)] #[must_use] - pub fn tempavg(&mut self) -> TEMPAVG_W<27> { - TEMPAVG_W::new(self) + pub fn tempavg(&mut self) -> TempavgW { + TempavgW::new(self, 27) } #[doc = "Bit 29 - Temperature Interrupt flag"] #[inline(always)] #[must_use] - pub fn temp(&mut self) -> TEMP_W<29> { - TEMP_W::new(self) + pub fn temp(&mut self) -> TempW { + TempW::new(self, 29) } #[doc = "Bit 30 - Temperature low Interrupt flag"] #[inline(always)] #[must_use] - pub fn templow(&mut self) -> TEMPLOW_W<30> { - TEMPLOW_W::new(self) + pub fn templow(&mut self) -> TemplowW { + TemplowW::new(self, 30) } #[doc = "Bit 31 - Temperature high Interrupt flag"] #[inline(always)] #[must_use] - pub fn temphigh(&mut self) -> TEMPHIGH_W<31> { - TEMPHIGH_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn temphigh(&mut self) -> TemphighW { + TemphighW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/ipversion.rs index 51dfe84..9b9c016 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "IP Version\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "IP Version\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x02"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/lock.rs index e312a5f..5981b7b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Lock Key\n\nValue on reset: 44520"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "44520: Unlock EMU register"] - UNLOCK = 44520, + Unlock = 44520, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Unlock EMU register"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0xade8"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0xade8; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0xade8; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/pd1paretctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/pd1paretctrl.rs index fd18bcf..58777d9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/pd1paretctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/pd1paretctrl.rs @@ -1,116 +1,83 @@ #[doc = "Register `PD1PARETCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PD1PARETCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `PD1PARETDIS` reader - Disable PD1 Partial Retention"] -pub type PD1PARETDIS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Disable PD1 Partial Retention\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum PD1PARETDIS_A { +pub enum Pd1paretdis { #[doc = "1: Retain associated registers when in EM2/3"] - PERIPHNORETAIN = 1, + Periphnoretain = 1, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: PD1PARETDIS_A) -> Self { + fn from(variant: Pd1paretdis) -> Self { variant as _ } } -impl PD1PARETDIS_R { +impl crate::FieldSpec for Pd1paretdis { + type Ux = u16; +} +impl crate::IsEnum for Pd1paretdis {} +#[doc = "Field `PD1PARETDIS` reader - Disable PD1 Partial Retention"] +pub type Pd1paretdisR = crate::FieldReader; +impl Pd1paretdisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(PD1PARETDIS_A::PERIPHNORETAIN), + 1 => Some(Pd1paretdis::Periphnoretain), _ => None, } } - #[doc = "Checks if the value of the field is `PERIPHNORETAIN`"] + #[doc = "Retain associated registers when in EM2/3"] #[inline(always)] pub fn is_periphnoretain(&self) -> bool { - *self == PD1PARETDIS_A::PERIPHNORETAIN + *self == Pd1paretdis::Periphnoretain } } #[doc = "Field `PD1PARETDIS` writer - Disable PD1 Partial Retention"] -pub type PD1PARETDIS_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PD1PARETCTRL_SPEC, u16, PD1PARETDIS_A, 16, O>; -impl<'a, const O: u8> PD1PARETDIS_W<'a, O> { +pub type Pd1paretdisW<'a, REG> = crate::FieldWriter<'a, REG, 16, Pd1paretdis>; +impl<'a, REG> Pd1paretdisW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Retain associated registers when in EM2/3"] #[inline(always)] - pub fn periphnoretain(self) -> &'a mut W { - self.variant(PD1PARETDIS_A::PERIPHNORETAIN) + pub fn periphnoretain(self) -> &'a mut crate::W { + self.variant(Pd1paretdis::Periphnoretain) } } impl R { #[doc = "Bits 0:15 - Disable PD1 Partial Retention"] #[inline(always)] - pub fn pd1paretdis(&self) -> PD1PARETDIS_R { - PD1PARETDIS_R::new((self.bits & 0xffff) as u16) + pub fn pd1paretdis(&self) -> Pd1paretdisR { + Pd1paretdisR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Disable PD1 Partial Retention"] #[inline(always)] #[must_use] - pub fn pd1paretdis(&mut self) -> PD1PARETDIS_W<0> { - PD1PARETDIS_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pd1paretdis(&mut self) -> Pd1paretdisW { + Pd1paretdisW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pd1paretctrl](index.html) module"] -pub struct PD1PARETCTRL_SPEC; -impl crate::RegisterSpec for PD1PARETCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pd1paretctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pd1paretctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Pd1paretctrlSpec; +impl crate::RegisterSpec for Pd1paretctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [pd1paretctrl::R](R) reader structure"] -impl crate::Readable for PD1PARETCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [pd1paretctrl::W](W) writer structure"] -impl crate::Writable for PD1PARETCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`pd1paretctrl::R`](R) reader structure"] +impl crate::Readable for Pd1paretctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`pd1paretctrl::W`](W) writer structure"] +impl crate::Writable for Pd1paretctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PD1PARETCTRL to value 0"] -impl crate::Resettable for PD1PARETCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Pd1paretctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/rstcause.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/rstcause.rs index af65c17..b8b08b8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/rstcause.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/rstcause.rs @@ -1,128 +1,113 @@ #[doc = "Register `RSTCAUSE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `POR` reader - Power On Reset"] -pub type POR_R = crate::BitReader; +pub type PorR = crate::BitReader; #[doc = "Field `PIN` reader - Pin Reset"] -pub type PIN_R = crate::BitReader; +pub type PinR = crate::BitReader; #[doc = "Field `EM4` reader - EM4 Wakeup Reset"] -pub type EM4_R = crate::BitReader; +pub type Em4R = crate::BitReader; #[doc = "Field `WDOG0` reader - Watchdog 0 Reset"] -pub type WDOG0_R = crate::BitReader; +pub type Wdog0R = crate::BitReader; #[doc = "Field `WDOG1` reader - Watchdog 1 Reset"] -pub type WDOG1_R = crate::BitReader; +pub type Wdog1R = crate::BitReader; #[doc = "Field `LOCKUP` reader - M33 Core Lockup Reset"] -pub type LOCKUP_R = crate::BitReader; +pub type LockupR = crate::BitReader; #[doc = "Field `SYSREQ` reader - M33 Core Sys Reset"] -pub type SYSREQ_R = crate::BitReader; +pub type SysreqR = crate::BitReader; #[doc = "Field `DVDDBOD` reader - HVBOD Reset"] -pub type DVDDBOD_R = crate::BitReader; +pub type DvddbodR = crate::BitReader; #[doc = "Field `DVDDLEBOD` reader - LEBOD Reset"] -pub type DVDDLEBOD_R = crate::BitReader; +pub type DvddlebodR = crate::BitReader; #[doc = "Field `DECBOD` reader - LVBOD Reset"] -pub type DECBOD_R = crate::BitReader; +pub type DecbodR = crate::BitReader; #[doc = "Field `AVDDBOD` reader - LEBOD1 Reset"] -pub type AVDDBOD_R = crate::BitReader; +pub type AvddbodR = crate::BitReader; #[doc = "Field `IOVDD0BOD` reader - LEBOD2 Reset"] -pub type IOVDD0BOD_R = crate::BitReader; +pub type Iovdd0bodR = crate::BitReader; #[doc = "Field `SETAMPER` reader - SE Tamper event Reset"] -pub type SETAMPER_R = crate::BitReader; +pub type SetamperR = crate::BitReader; #[doc = "Field `VREGIN` reader - DCDC VREGIN comparator"] -pub type VREGIN_R = crate::BitReader; +pub type VreginR = crate::BitReader; impl R { #[doc = "Bit 0 - Power On Reset"] #[inline(always)] - pub fn por(&self) -> POR_R { - POR_R::new((self.bits & 1) != 0) + pub fn por(&self) -> PorR { + PorR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Pin Reset"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 1) & 1) != 0) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - EM4 Wakeup Reset"] #[inline(always)] - pub fn em4(&self) -> EM4_R { - EM4_R::new(((self.bits >> 2) & 1) != 0) + pub fn em4(&self) -> Em4R { + Em4R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Watchdog 0 Reset"] #[inline(always)] - pub fn wdog0(&self) -> WDOG0_R { - WDOG0_R::new(((self.bits >> 3) & 1) != 0) + pub fn wdog0(&self) -> Wdog0R { + Wdog0R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Watchdog 1 Reset"] #[inline(always)] - pub fn wdog1(&self) -> WDOG1_R { - WDOG1_R::new(((self.bits >> 4) & 1) != 0) + pub fn wdog1(&self) -> Wdog1R { + Wdog1R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - M33 Core Lockup Reset"] #[inline(always)] - pub fn lockup(&self) -> LOCKUP_R { - LOCKUP_R::new(((self.bits >> 5) & 1) != 0) + pub fn lockup(&self) -> LockupR { + LockupR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - M33 Core Sys Reset"] #[inline(always)] - pub fn sysreq(&self) -> SYSREQ_R { - SYSREQ_R::new(((self.bits >> 6) & 1) != 0) + pub fn sysreq(&self) -> SysreqR { + SysreqR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - HVBOD Reset"] #[inline(always)] - pub fn dvddbod(&self) -> DVDDBOD_R { - DVDDBOD_R::new(((self.bits >> 7) & 1) != 0) + pub fn dvddbod(&self) -> DvddbodR { + DvddbodR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - LEBOD Reset"] #[inline(always)] - pub fn dvddlebod(&self) -> DVDDLEBOD_R { - DVDDLEBOD_R::new(((self.bits >> 8) & 1) != 0) + pub fn dvddlebod(&self) -> DvddlebodR { + DvddlebodR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - LVBOD Reset"] #[inline(always)] - pub fn decbod(&self) -> DECBOD_R { - DECBOD_R::new(((self.bits >> 9) & 1) != 0) + pub fn decbod(&self) -> DecbodR { + DecbodR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - LEBOD1 Reset"] #[inline(always)] - pub fn avddbod(&self) -> AVDDBOD_R { - AVDDBOD_R::new(((self.bits >> 10) & 1) != 0) + pub fn avddbod(&self) -> AvddbodR { + AvddbodR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - LEBOD2 Reset"] #[inline(always)] - pub fn iovdd0bod(&self) -> IOVDD0BOD_R { - IOVDD0BOD_R::new(((self.bits >> 11) & 1) != 0) + pub fn iovdd0bod(&self) -> Iovdd0bodR { + Iovdd0bodR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 13 - SE Tamper event Reset"] #[inline(always)] - pub fn setamper(&self) -> SETAMPER_R { - SETAMPER_R::new(((self.bits >> 13) & 1) != 0) + pub fn setamper(&self) -> SetamperR { + SetamperR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 31 - DCDC VREGIN comparator"] #[inline(always)] - pub fn vregin(&self) -> VREGIN_R { - VREGIN_R::new(((self.bits >> 31) & 1) != 0) + pub fn vregin(&self) -> VreginR { + VreginR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rstcause](index.html) module"] -pub struct RSTCAUSE_SPEC; -impl crate::RegisterSpec for RSTCAUSE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rstcause::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RstcauseSpec; +impl crate::RegisterSpec for RstcauseSpec { type Ux = u32; } -#[doc = "`read()` method returns [rstcause::R](R) reader structure"] -impl crate::Readable for RSTCAUSE_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rstcause::R`](R) reader structure"] +impl crate::Readable for RstcauseSpec {} #[doc = "`reset()` method sets RSTCAUSE to value 0"] -impl crate::Resettable for RSTCAUSE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RstcauseSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/rstctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/rstctrl.rs index 98989fb..9ca4800 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/rstctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/rstctrl.rs @@ -1,433 +1,409 @@ #[doc = "Register `RSTCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RSTCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `WDOG0RMODE` reader - Enable WDOG0 reset"] -pub type WDOG0RMODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Enable WDOG0 reset\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WDOG0RMODE_A { +pub enum Wdog0rmode { #[doc = "0: Reset request is blocked"] - DISABLED = 0, + Disabled = 0, #[doc = "1: The entire device is reset except some EMU registers"] - ENABLED = 1, + Enabled = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WDOG0RMODE_A) -> Self { + fn from(variant: Wdog0rmode) -> Self { variant as u8 != 0 } } -impl WDOG0RMODE_R { +#[doc = "Field `WDOG0RMODE` reader - Enable WDOG0 reset"] +pub type Wdog0rmodeR = crate::BitReader; +impl Wdog0rmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> WDOG0RMODE_A { + pub const fn variant(&self) -> Wdog0rmode { match self.bits { - false => WDOG0RMODE_A::DISABLED, - true => WDOG0RMODE_A::ENABLED, + false => Wdog0rmode::Disabled, + true => Wdog0rmode::Enabled, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Reset request is blocked"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == WDOG0RMODE_A::DISABLED + *self == Wdog0rmode::Disabled } - #[doc = "Checks if the value of the field is `ENABLED`"] + #[doc = "The entire device is reset except some EMU registers"] #[inline(always)] pub fn is_enabled(&self) -> bool { - *self == WDOG0RMODE_A::ENABLED + *self == Wdog0rmode::Enabled } } #[doc = "Field `WDOG0RMODE` writer - Enable WDOG0 reset"] -pub type WDOG0RMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, RSTCTRL_SPEC, WDOG0RMODE_A, O>; -impl<'a, const O: u8> WDOG0RMODE_W<'a, O> { +pub type Wdog0rmodeW<'a, REG> = crate::BitWriter<'a, REG, Wdog0rmode>; +impl<'a, REG> Wdog0rmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Reset request is blocked"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(WDOG0RMODE_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Wdog0rmode::Disabled) } #[doc = "The entire device is reset except some EMU registers"] #[inline(always)] - pub fn enabled(self) -> &'a mut W { - self.variant(WDOG0RMODE_A::ENABLED) + pub fn enabled(self) -> &'a mut crate::W { + self.variant(Wdog0rmode::Enabled) } } -#[doc = "Field `SYSRMODE` reader - Enable M33 System reset"] -pub type SYSRMODE_R = crate::BitReader; #[doc = "Enable M33 System reset\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYSRMODE_A { +pub enum Sysrmode { #[doc = "0: Reset request is blocked"] - DISABLED = 0, + Disabled = 0, #[doc = "1: Device is reset except some EMU registers"] - ENABLED = 1, + Enabled = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYSRMODE_A) -> Self { + fn from(variant: Sysrmode) -> Self { variant as u8 != 0 } } -impl SYSRMODE_R { +#[doc = "Field `SYSRMODE` reader - Enable M33 System reset"] +pub type SysrmodeR = crate::BitReader; +impl SysrmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SYSRMODE_A { + pub const fn variant(&self) -> Sysrmode { match self.bits { - false => SYSRMODE_A::DISABLED, - true => SYSRMODE_A::ENABLED, + false => Sysrmode::Disabled, + true => Sysrmode::Enabled, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Reset request is blocked"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == SYSRMODE_A::DISABLED + *self == Sysrmode::Disabled } - #[doc = "Checks if the value of the field is `ENABLED`"] + #[doc = "Device is reset except some EMU registers"] #[inline(always)] pub fn is_enabled(&self) -> bool { - *self == SYSRMODE_A::ENABLED + *self == Sysrmode::Enabled } } #[doc = "Field `SYSRMODE` writer - Enable M33 System reset"] -pub type SYSRMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, RSTCTRL_SPEC, SYSRMODE_A, O>; -impl<'a, const O: u8> SYSRMODE_W<'a, O> { +pub type SysrmodeW<'a, REG> = crate::BitWriter<'a, REG, Sysrmode>; +impl<'a, REG> SysrmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Reset request is blocked"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(SYSRMODE_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Sysrmode::Disabled) } #[doc = "Device is reset except some EMU registers"] #[inline(always)] - pub fn enabled(self) -> &'a mut W { - self.variant(SYSRMODE_A::ENABLED) + pub fn enabled(self) -> &'a mut crate::W { + self.variant(Sysrmode::Enabled) } } -#[doc = "Field `LOCKUPRMODE` reader - Enable M33 Lockup reset"] -pub type LOCKUPRMODE_R = crate::BitReader; #[doc = "Enable M33 Lockup reset\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCKUPRMODE_A { +pub enum Lockuprmode { #[doc = "0: Reset Request is Block"] - DISABLED = 0, + Disabled = 0, #[doc = "1: The entire device is reset except some EMU registers"] - ENABLED = 1, + Enabled = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCKUPRMODE_A) -> Self { + fn from(variant: Lockuprmode) -> Self { variant as u8 != 0 } } -impl LOCKUPRMODE_R { +#[doc = "Field `LOCKUPRMODE` reader - Enable M33 Lockup reset"] +pub type LockuprmodeR = crate::BitReader; +impl LockuprmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCKUPRMODE_A { + pub const fn variant(&self) -> Lockuprmode { match self.bits { - false => LOCKUPRMODE_A::DISABLED, - true => LOCKUPRMODE_A::ENABLED, + false => Lockuprmode::Disabled, + true => Lockuprmode::Enabled, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Reset Request is Block"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == LOCKUPRMODE_A::DISABLED + *self == Lockuprmode::Disabled } - #[doc = "Checks if the value of the field is `ENABLED`"] + #[doc = "The entire device is reset except some EMU registers"] #[inline(always)] pub fn is_enabled(&self) -> bool { - *self == LOCKUPRMODE_A::ENABLED + *self == Lockuprmode::Enabled } } #[doc = "Field `LOCKUPRMODE` writer - Enable M33 Lockup reset"] -pub type LOCKUPRMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, RSTCTRL_SPEC, LOCKUPRMODE_A, O>; -impl<'a, const O: u8> LOCKUPRMODE_W<'a, O> { +pub type LockuprmodeW<'a, REG> = crate::BitWriter<'a, REG, Lockuprmode>; +impl<'a, REG> LockuprmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Reset Request is Block"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(LOCKUPRMODE_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Lockuprmode::Disabled) } #[doc = "The entire device is reset except some EMU registers"] #[inline(always)] - pub fn enabled(self) -> &'a mut W { - self.variant(LOCKUPRMODE_A::ENABLED) + pub fn enabled(self) -> &'a mut crate::W { + self.variant(Lockuprmode::Enabled) } } -#[doc = "Field `AVDDBODRMODE` reader - Enable AVDD BOD reset"] -pub type AVDDBODRMODE_R = crate::BitReader; #[doc = "Enable AVDD BOD reset\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AVDDBODRMODE_A { +pub enum Avddbodrmode { #[doc = "0: Reset Request is block"] - DISABLED = 0, + Disabled = 0, #[doc = "1: The entire device is reset except some EMU registers"] - ENABLED = 1, + Enabled = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AVDDBODRMODE_A) -> Self { + fn from(variant: Avddbodrmode) -> Self { variant as u8 != 0 } } -impl AVDDBODRMODE_R { +#[doc = "Field `AVDDBODRMODE` reader - Enable AVDD BOD reset"] +pub type AvddbodrmodeR = crate::BitReader; +impl AvddbodrmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> AVDDBODRMODE_A { + pub const fn variant(&self) -> Avddbodrmode { match self.bits { - false => AVDDBODRMODE_A::DISABLED, - true => AVDDBODRMODE_A::ENABLED, + false => Avddbodrmode::Disabled, + true => Avddbodrmode::Enabled, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Reset Request is block"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == AVDDBODRMODE_A::DISABLED + *self == Avddbodrmode::Disabled } - #[doc = "Checks if the value of the field is `ENABLED`"] + #[doc = "The entire device is reset except some EMU registers"] #[inline(always)] pub fn is_enabled(&self) -> bool { - *self == AVDDBODRMODE_A::ENABLED + *self == Avddbodrmode::Enabled } } #[doc = "Field `AVDDBODRMODE` writer - Enable AVDD BOD reset"] -pub type AVDDBODRMODE_W<'a, const O: u8> = - crate::BitWriter<'a, u32, RSTCTRL_SPEC, AVDDBODRMODE_A, O>; -impl<'a, const O: u8> AVDDBODRMODE_W<'a, O> { +pub type AvddbodrmodeW<'a, REG> = crate::BitWriter<'a, REG, Avddbodrmode>; +impl<'a, REG> AvddbodrmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Reset Request is block"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(AVDDBODRMODE_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Avddbodrmode::Disabled) } #[doc = "The entire device is reset except some EMU registers"] #[inline(always)] - pub fn enabled(self) -> &'a mut W { - self.variant(AVDDBODRMODE_A::ENABLED) + pub fn enabled(self) -> &'a mut crate::W { + self.variant(Avddbodrmode::Enabled) } } -#[doc = "Field `IOVDD0BODRMODE` reader - Enable VDDIO0 BOD reset"] -pub type IOVDD0BODRMODE_R = crate::BitReader; #[doc = "Enable VDDIO0 BOD reset\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IOVDD0BODRMODE_A { +pub enum Iovdd0bodrmode { #[doc = "0: Reset request is blocked"] - DISABLED = 0, + Disabled = 0, #[doc = "1: The entire device is reset except some EMU registers"] - ENABLED = 1, + Enabled = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IOVDD0BODRMODE_A) -> Self { + fn from(variant: Iovdd0bodrmode) -> Self { variant as u8 != 0 } } -impl IOVDD0BODRMODE_R { +#[doc = "Field `IOVDD0BODRMODE` reader - Enable VDDIO0 BOD reset"] +pub type Iovdd0bodrmodeR = crate::BitReader; +impl Iovdd0bodrmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> IOVDD0BODRMODE_A { + pub const fn variant(&self) -> Iovdd0bodrmode { match self.bits { - false => IOVDD0BODRMODE_A::DISABLED, - true => IOVDD0BODRMODE_A::ENABLED, + false => Iovdd0bodrmode::Disabled, + true => Iovdd0bodrmode::Enabled, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Reset request is blocked"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == IOVDD0BODRMODE_A::DISABLED + *self == Iovdd0bodrmode::Disabled } - #[doc = "Checks if the value of the field is `ENABLED`"] + #[doc = "The entire device is reset except some EMU registers"] #[inline(always)] pub fn is_enabled(&self) -> bool { - *self == IOVDD0BODRMODE_A::ENABLED + *self == Iovdd0bodrmode::Enabled } } #[doc = "Field `IOVDD0BODRMODE` writer - Enable VDDIO0 BOD reset"] -pub type IOVDD0BODRMODE_W<'a, const O: u8> = - crate::BitWriter<'a, u32, RSTCTRL_SPEC, IOVDD0BODRMODE_A, O>; -impl<'a, const O: u8> IOVDD0BODRMODE_W<'a, O> { +pub type Iovdd0bodrmodeW<'a, REG> = crate::BitWriter<'a, REG, Iovdd0bodrmode>; +impl<'a, REG> Iovdd0bodrmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Reset request is blocked"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(IOVDD0BODRMODE_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Iovdd0bodrmode::Disabled) } #[doc = "The entire device is reset except some EMU registers"] #[inline(always)] - pub fn enabled(self) -> &'a mut W { - self.variant(IOVDD0BODRMODE_A::ENABLED) + pub fn enabled(self) -> &'a mut crate::W { + self.variant(Iovdd0bodrmode::Enabled) } } -#[doc = "Field `DECBODRMODE` reader - Enable DECBOD reset"] -pub type DECBODRMODE_R = crate::BitReader; #[doc = "Enable DECBOD reset\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DECBODRMODE_A { +pub enum Decbodrmode { #[doc = "0: Reset request is blocked"] - DISABLED = 0, + Disabled = 0, #[doc = "1: The entire device is reset"] - ENABLED = 1, + Enabled = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DECBODRMODE_A) -> Self { + fn from(variant: Decbodrmode) -> Self { variant as u8 != 0 } } -impl DECBODRMODE_R { +#[doc = "Field `DECBODRMODE` reader - Enable DECBOD reset"] +pub type DecbodrmodeR = crate::BitReader; +impl DecbodrmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DECBODRMODE_A { + pub const fn variant(&self) -> Decbodrmode { match self.bits { - false => DECBODRMODE_A::DISABLED, - true => DECBODRMODE_A::ENABLED, + false => Decbodrmode::Disabled, + true => Decbodrmode::Enabled, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Reset request is blocked"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == DECBODRMODE_A::DISABLED + *self == Decbodrmode::Disabled } - #[doc = "Checks if the value of the field is `ENABLED`"] + #[doc = "The entire device is reset"] #[inline(always)] pub fn is_enabled(&self) -> bool { - *self == DECBODRMODE_A::ENABLED + *self == Decbodrmode::Enabled } } #[doc = "Field `DECBODRMODE` writer - Enable DECBOD reset"] -pub type DECBODRMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, RSTCTRL_SPEC, DECBODRMODE_A, O>; -impl<'a, const O: u8> DECBODRMODE_W<'a, O> { +pub type DecbodrmodeW<'a, REG> = crate::BitWriter<'a, REG, Decbodrmode>; +impl<'a, REG> DecbodrmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Reset request is blocked"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(DECBODRMODE_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Decbodrmode::Disabled) } #[doc = "The entire device is reset"] #[inline(always)] - pub fn enabled(self) -> &'a mut W { - self.variant(DECBODRMODE_A::ENABLED) + pub fn enabled(self) -> &'a mut crate::W { + self.variant(Decbodrmode::Enabled) } } impl R { #[doc = "Bit 0 - Enable WDOG0 reset"] #[inline(always)] - pub fn wdog0rmode(&self) -> WDOG0RMODE_R { - WDOG0RMODE_R::new((self.bits & 1) != 0) + pub fn wdog0rmode(&self) -> Wdog0rmodeR { + Wdog0rmodeR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - Enable M33 System reset"] #[inline(always)] - pub fn sysrmode(&self) -> SYSRMODE_R { - SYSRMODE_R::new(((self.bits >> 2) & 1) != 0) + pub fn sysrmode(&self) -> SysrmodeR { + SysrmodeR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Enable M33 Lockup reset"] #[inline(always)] - pub fn lockuprmode(&self) -> LOCKUPRMODE_R { - LOCKUPRMODE_R::new(((self.bits >> 3) & 1) != 0) + pub fn lockuprmode(&self) -> LockuprmodeR { + LockuprmodeR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 6 - Enable AVDD BOD reset"] #[inline(always)] - pub fn avddbodrmode(&self) -> AVDDBODRMODE_R { - AVDDBODRMODE_R::new(((self.bits >> 6) & 1) != 0) + pub fn avddbodrmode(&self) -> AvddbodrmodeR { + AvddbodrmodeR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Enable VDDIO0 BOD reset"] #[inline(always)] - pub fn iovdd0bodrmode(&self) -> IOVDD0BODRMODE_R { - IOVDD0BODRMODE_R::new(((self.bits >> 7) & 1) != 0) + pub fn iovdd0bodrmode(&self) -> Iovdd0bodrmodeR { + Iovdd0bodrmodeR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 10 - Enable DECBOD reset"] #[inline(always)] - pub fn decbodrmode(&self) -> DECBODRMODE_R { - DECBODRMODE_R::new(((self.bits >> 10) & 1) != 0) + pub fn decbodrmode(&self) -> DecbodrmodeR { + DecbodrmodeR::new(((self.bits >> 10) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable WDOG0 reset"] #[inline(always)] #[must_use] - pub fn wdog0rmode(&mut self) -> WDOG0RMODE_W<0> { - WDOG0RMODE_W::new(self) + pub fn wdog0rmode(&mut self) -> Wdog0rmodeW { + Wdog0rmodeW::new(self, 0) } #[doc = "Bit 2 - Enable M33 System reset"] #[inline(always)] #[must_use] - pub fn sysrmode(&mut self) -> SYSRMODE_W<2> { - SYSRMODE_W::new(self) + pub fn sysrmode(&mut self) -> SysrmodeW { + SysrmodeW::new(self, 2) } #[doc = "Bit 3 - Enable M33 Lockup reset"] #[inline(always)] #[must_use] - pub fn lockuprmode(&mut self) -> LOCKUPRMODE_W<3> { - LOCKUPRMODE_W::new(self) + pub fn lockuprmode(&mut self) -> LockuprmodeW { + LockuprmodeW::new(self, 3) } #[doc = "Bit 6 - Enable AVDD BOD reset"] #[inline(always)] #[must_use] - pub fn avddbodrmode(&mut self) -> AVDDBODRMODE_W<6> { - AVDDBODRMODE_W::new(self) + pub fn avddbodrmode(&mut self) -> AvddbodrmodeW { + AvddbodrmodeW::new(self, 6) } #[doc = "Bit 7 - Enable VDDIO0 BOD reset"] #[inline(always)] #[must_use] - pub fn iovdd0bodrmode(&mut self) -> IOVDD0BODRMODE_W<7> { - IOVDD0BODRMODE_W::new(self) + pub fn iovdd0bodrmode(&mut self) -> Iovdd0bodrmodeW { + Iovdd0bodrmodeW::new(self, 7) } #[doc = "Bit 10 - Enable DECBOD reset"] #[inline(always)] #[must_use] - pub fn decbodrmode(&mut self) -> DECBODRMODE_W<10> { - DECBODRMODE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn decbodrmode(&mut self) -> DecbodrmodeW { + DecbodrmodeW::new(self, 10) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rstctrl](index.html) module"] -pub struct RSTCTRL_SPEC; -impl crate::RegisterSpec for RSTCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rstctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rstctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RstctrlSpec; +impl crate::RegisterSpec for RstctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [rstctrl::R](R) reader structure"] -impl crate::Readable for RSTCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rstctrl::W](W) writer structure"] -impl crate::Writable for RSTCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`rstctrl::R`](R) reader structure"] +impl crate::Readable for RstctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`rstctrl::W`](W) writer structure"] +impl crate::Writable for RstctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RSTCTRL to value 0x0006_0407"] -impl crate::Resettable for RSTCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0006_0407; +impl crate::Resettable for RstctrlSpec { + const RESET_VALUE: u32 = 0x0006_0407; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/status.rs index 29d69e4..4f940af 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/status.rs @@ -1,171 +1,160 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `LOCK` reader - Lock status"] -pub type LOCK_R = crate::BitReader; +pub type R = crate::R; #[doc = "Lock status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCK_A { +pub enum Lock { #[doc = "0: All EMU lockable registers are unlocked."] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: All EMU lockable registers are locked."] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCK_A) -> Self { + fn from(variant: Lock) -> Self { variant as u8 != 0 } } -impl LOCK_R { +#[doc = "Field `LOCK` reader - Lock status"] +pub type LockR = crate::BitReader; +impl LockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCK_A { + pub const fn variant(&self) -> Lock { match self.bits { - false => LOCK_A::UNLOCKED, - true => LOCK_A::LOCKED, + false => Lock::Unlocked, + true => Lock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "All EMU lockable registers are unlocked."] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCK_A::UNLOCKED + *self == Lock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "All EMU lockable registers are locked."] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCK_A::LOCKED + *self == Lock::Locked } } #[doc = "Field `FIRSTTEMPDONE` reader - First Temp done"] -pub type FIRSTTEMPDONE_R = crate::BitReader; +pub type FirsttempdoneR = crate::BitReader; #[doc = "Field `TEMPACTIVE` reader - Temp active"] -pub type TEMPACTIVE_R = crate::BitReader; +pub type TempactiveR = crate::BitReader; #[doc = "Field `TEMPAVGACTIVE` reader - Temp Average active"] -pub type TEMPAVGACTIVE_R = crate::BitReader; +pub type TempavgactiveR = crate::BitReader; #[doc = "Field `VSCALEBUSY` reader - Vscale busy"] -pub type VSCALEBUSY_R = crate::BitReader; +pub type VscalebusyR = crate::BitReader; #[doc = "Field `VSCALEFAILED` reader - Vscale failed"] -pub type VSCALEFAILED_R = crate::BitReader; -#[doc = "Field `VSCALE` reader - Vscale status"] -pub type VSCALE_R = crate::FieldReader; +pub type VscalefailedR = crate::BitReader; #[doc = "Vscale status\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum VSCALE_A { +pub enum Vscale { #[doc = "0: Voltage scaling set to 0.9v"] - VSCALE0 = 0, + Vscale0 = 0, #[doc = "1: Voltage scaling set to 1.0v"] - VSCALE1 = 1, + Vscale1 = 1, #[doc = "2: Voltage scaling set to 1.1v"] - VSCALE2 = 2, + Vscale2 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: VSCALE_A) -> Self { + fn from(variant: Vscale) -> Self { variant as _ } } -impl VSCALE_R { +impl crate::FieldSpec for Vscale { + type Ux = u8; +} +impl crate::IsEnum for Vscale {} +#[doc = "Field `VSCALE` reader - Vscale status"] +pub type VscaleR = crate::FieldReader; +impl VscaleR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(VSCALE_A::VSCALE0), - 1 => Some(VSCALE_A::VSCALE1), - 2 => Some(VSCALE_A::VSCALE2), + 0 => Some(Vscale::Vscale0), + 1 => Some(Vscale::Vscale1), + 2 => Some(Vscale::Vscale2), _ => None, } } - #[doc = "Checks if the value of the field is `VSCALE0`"] + #[doc = "Voltage scaling set to 0.9v"] #[inline(always)] pub fn is_vscale0(&self) -> bool { - *self == VSCALE_A::VSCALE0 + *self == Vscale::Vscale0 } - #[doc = "Checks if the value of the field is `VSCALE1`"] + #[doc = "Voltage scaling set to 1.0v"] #[inline(always)] pub fn is_vscale1(&self) -> bool { - *self == VSCALE_A::VSCALE1 + *self == Vscale::Vscale1 } - #[doc = "Checks if the value of the field is `VSCALE2`"] + #[doc = "Voltage scaling set to 1.1v"] #[inline(always)] pub fn is_vscale2(&self) -> bool { - *self == VSCALE_A::VSCALE2 + *self == Vscale::Vscale2 } } #[doc = "Field `EM4IORET` reader - EM4 IO retention status"] -pub type EM4IORET_R = crate::BitReader; +pub type Em4ioretR = crate::BitReader; #[doc = "Field `EM2ENTERED` reader - EM2 entered"] -pub type EM2ENTERED_R = crate::BitReader; +pub type Em2enteredR = crate::BitReader; impl R { #[doc = "Bit 0 - Lock status"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new((self.bits & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - First Temp done"] #[inline(always)] - pub fn firsttempdone(&self) -> FIRSTTEMPDONE_R { - FIRSTTEMPDONE_R::new(((self.bits >> 1) & 1) != 0) + pub fn firsttempdone(&self) -> FirsttempdoneR { + FirsttempdoneR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Temp active"] #[inline(always)] - pub fn tempactive(&self) -> TEMPACTIVE_R { - TEMPACTIVE_R::new(((self.bits >> 2) & 1) != 0) + pub fn tempactive(&self) -> TempactiveR { + TempactiveR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Temp Average active"] #[inline(always)] - pub fn tempavgactive(&self) -> TEMPAVGACTIVE_R { - TEMPAVGACTIVE_R::new(((self.bits >> 3) & 1) != 0) + pub fn tempavgactive(&self) -> TempavgactiveR { + TempavgactiveR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Vscale busy"] #[inline(always)] - pub fn vscalebusy(&self) -> VSCALEBUSY_R { - VSCALEBUSY_R::new(((self.bits >> 4) & 1) != 0) + pub fn vscalebusy(&self) -> VscalebusyR { + VscalebusyR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Vscale failed"] #[inline(always)] - pub fn vscalefailed(&self) -> VSCALEFAILED_R { - VSCALEFAILED_R::new(((self.bits >> 5) & 1) != 0) + pub fn vscalefailed(&self) -> VscalefailedR { + VscalefailedR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bits 6:7 - Vscale status"] #[inline(always)] - pub fn vscale(&self) -> VSCALE_R { - VSCALE_R::new(((self.bits >> 6) & 3) as u8) + pub fn vscale(&self) -> VscaleR { + VscaleR::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bit 12 - EM4 IO retention status"] #[inline(always)] - pub fn em4ioret(&self) -> EM4IORET_R { - EM4IORET_R::new(((self.bits >> 12) & 1) != 0) + pub fn em4ioret(&self) -> Em4ioretR { + Em4ioretR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 14 - EM2 entered"] #[inline(always)] - pub fn em2entered(&self) -> EM2ENTERED_R { - EM2ENTERED_R::new(((self.bits >> 14) & 1) != 0) + pub fn em2entered(&self) -> Em2enteredR { + Em2enteredR::new(((self.bits >> 14) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0x80"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0x80; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0x80; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/tamperrstcause.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/tamperrstcause.rs index 25d9383..3368be1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/tamperrstcause.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/tamperrstcause.rs @@ -1,37 +1,22 @@ #[doc = "Register `TAMPERRSTCAUSE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TAMPERRST` reader - Tamper reset vector"] -pub type TAMPERRST_R = crate::FieldReader; +pub type TamperrstR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Tamper reset vector"] #[inline(always)] - pub fn tamperrst(&self) -> TAMPERRST_R { - TAMPERRST_R::new(self.bits) + pub fn tamperrst(&self) -> TamperrstR { + TamperrstR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tamperrstcause](index.html) module"] -pub struct TAMPERRSTCAUSE_SPEC; -impl crate::RegisterSpec for TAMPERRSTCAUSE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`tamperrstcause::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TamperrstcauseSpec; +impl crate::RegisterSpec for TamperrstcauseSpec { type Ux = u32; } -#[doc = "`read()` method returns [tamperrstcause::R](R) reader structure"] -impl crate::Readable for TAMPERRSTCAUSE_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`tamperrstcause::R`](R) reader structure"] +impl crate::Readable for TamperrstcauseSpec {} #[doc = "`reset()` method sets TAMPERRSTCAUSE to value 0"] -impl crate::Resettable for TAMPERRSTCAUSE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TamperrstcauseSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/temp.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/temp.rs index 7407b37..326a878 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/temp.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/temp.rs @@ -1,51 +1,36 @@ #[doc = "Register `TEMP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `TEMPLSB` reader - Temperature measured decimal part"] -pub type TEMPLSB_R = crate::FieldReader; +pub type TemplsbR = crate::FieldReader; #[doc = "Field `TEMP` reader - Temperature measured"] -pub type TEMP_R = crate::FieldReader; +pub type TempR = crate::FieldReader; #[doc = "Field `TEMPAVG` reader - Averaged Temperature"] -pub type TEMPAVG_R = crate::FieldReader; +pub type TempavgR = crate::FieldReader; impl R { #[doc = "Bits 0:1 - Temperature measured decimal part"] #[inline(always)] - pub fn templsb(&self) -> TEMPLSB_R { - TEMPLSB_R::new((self.bits & 3) as u8) + pub fn templsb(&self) -> TemplsbR { + TemplsbR::new((self.bits & 3) as u8) } #[doc = "Bits 2:10 - Temperature measured"] #[inline(always)] - pub fn temp(&self) -> TEMP_R { - TEMP_R::new(((self.bits >> 2) & 0x01ff) as u16) + pub fn temp(&self) -> TempR { + TempR::new(((self.bits >> 2) & 0x01ff) as u16) } #[doc = "Bits 16:26 - Averaged Temperature"] #[inline(always)] - pub fn tempavg(&self) -> TEMPAVG_R { - TEMPAVG_R::new(((self.bits >> 16) & 0x07ff) as u16) + pub fn tempavg(&self) -> TempavgR { + TempavgR::new(((self.bits >> 16) & 0x07ff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [temp](index.html) module"] -pub struct TEMP_SPEC; -impl crate::RegisterSpec for TEMP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`temp::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TempSpec; +impl crate::RegisterSpec for TempSpec { type Ux = u32; } -#[doc = "`read()` method returns [temp::R](R) reader structure"] -impl crate::Readable for TEMP_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`temp::R`](R) reader structure"] +impl crate::Readable for TempSpec {} #[doc = "`reset()` method sets TEMP to value 0"] -impl crate::Resettable for TEMP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TempSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/templimits.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/templimits.rs index ba7913e..11dc849 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/templimits.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/templimits.rs @@ -1,95 +1,55 @@ #[doc = "Register `TEMPLIMITS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TEMPLIMITS` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TEMPLOW` reader - Temp Low limit"] -pub type TEMPLOW_R = crate::FieldReader; +pub type TemplowR = crate::FieldReader; #[doc = "Field `TEMPLOW` writer - Temp Low limit"] -pub type TEMPLOW_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TEMPLIMITS_SPEC, u16, u16, 9, O>; +pub type TemplowW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; #[doc = "Field `TEMPHIGH` reader - Temp High limit"] -pub type TEMPHIGH_R = crate::FieldReader; +pub type TemphighR = crate::FieldReader; #[doc = "Field `TEMPHIGH` writer - Temp High limit"] -pub type TEMPHIGH_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TEMPLIMITS_SPEC, u16, u16, 9, O>; +pub type TemphighW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; impl R { #[doc = "Bits 0:8 - Temp Low limit"] #[inline(always)] - pub fn templow(&self) -> TEMPLOW_R { - TEMPLOW_R::new((self.bits & 0x01ff) as u16) + pub fn templow(&self) -> TemplowR { + TemplowR::new((self.bits & 0x01ff) as u16) } #[doc = "Bits 16:24 - Temp High limit"] #[inline(always)] - pub fn temphigh(&self) -> TEMPHIGH_R { - TEMPHIGH_R::new(((self.bits >> 16) & 0x01ff) as u16) + pub fn temphigh(&self) -> TemphighR { + TemphighR::new(((self.bits >> 16) & 0x01ff) as u16) } } impl W { #[doc = "Bits 0:8 - Temp Low limit"] #[inline(always)] #[must_use] - pub fn templow(&mut self) -> TEMPLOW_W<0> { - TEMPLOW_W::new(self) + pub fn templow(&mut self) -> TemplowW { + TemplowW::new(self, 0) } #[doc = "Bits 16:24 - Temp High limit"] #[inline(always)] #[must_use] - pub fn temphigh(&mut self) -> TEMPHIGH_W<16> { - TEMPHIGH_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn temphigh(&mut self) -> TemphighW { + TemphighW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [templimits](index.html) module"] -pub struct TEMPLIMITS_SPEC; -impl crate::RegisterSpec for TEMPLIMITS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`templimits::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`templimits::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TemplimitsSpec; +impl crate::RegisterSpec for TemplimitsSpec { type Ux = u32; } -#[doc = "`read()` method returns [templimits::R](R) reader structure"] -impl crate::Readable for TEMPLIMITS_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [templimits::W](W) writer structure"] -impl crate::Writable for TEMPLIMITS_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`templimits::R`](R) reader structure"] +impl crate::Readable for TemplimitsSpec {} +#[doc = "`write(|w| ..)` method takes [`templimits::W`](W) writer structure"] +impl crate::Writable for TemplimitsSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TEMPLIMITS to value 0x01ff_0000"] -impl crate::Resettable for TEMPLIMITS_SPEC { - const RESET_VALUE: Self::Ux = 0x01ff_0000; +impl crate::Resettable for TemplimitsSpec { + const RESET_VALUE: u32 = 0x01ff_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/vregvddcmpctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/vregvddcmpctrl.rs index 5af3d3e..5d8bb59 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/vregvddcmpctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/emu_s/vregvddcmpctrl.rs @@ -1,96 +1,55 @@ #[doc = "Register `VREGVDDCMPCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `VREGVDDCMPCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `VREGINCMPEN` reader - VREGVDD comparator enable"] -pub type VREGINCMPEN_R = crate::BitReader; +pub type VregincmpenR = crate::BitReader; #[doc = "Field `VREGINCMPEN` writer - VREGVDD comparator enable"] -pub type VREGINCMPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, VREGVDDCMPCTRL_SPEC, bool, O>; +pub type VregincmpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `THRESSEL` reader - VREGVDD comparator threshold programming"] -pub type THRESSEL_R = crate::FieldReader; +pub type ThresselR = crate::FieldReader; #[doc = "Field `THRESSEL` writer - VREGVDD comparator threshold programming"] -pub type THRESSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, VREGVDDCMPCTRL_SPEC, u8, u8, 2, O>; +pub type ThresselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bit 0 - VREGVDD comparator enable"] #[inline(always)] - pub fn vregincmpen(&self) -> VREGINCMPEN_R { - VREGINCMPEN_R::new((self.bits & 1) != 0) + pub fn vregincmpen(&self) -> VregincmpenR { + VregincmpenR::new((self.bits & 1) != 0) } #[doc = "Bits 1:2 - VREGVDD comparator threshold programming"] #[inline(always)] - pub fn thressel(&self) -> THRESSEL_R { - THRESSEL_R::new(((self.bits >> 1) & 3) as u8) + pub fn thressel(&self) -> ThresselR { + ThresselR::new(((self.bits >> 1) & 3) as u8) } } impl W { #[doc = "Bit 0 - VREGVDD comparator enable"] #[inline(always)] #[must_use] - pub fn vregincmpen(&mut self) -> VREGINCMPEN_W<0> { - VREGINCMPEN_W::new(self) + pub fn vregincmpen(&mut self) -> VregincmpenW { + VregincmpenW::new(self, 0) } #[doc = "Bits 1:2 - VREGVDD comparator threshold programming"] #[inline(always)] #[must_use] - pub fn thressel(&mut self) -> THRESSEL_W<1> { - THRESSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn thressel(&mut self) -> ThresselW { + ThresselW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [vregvddcmpctrl](index.html) module"] -pub struct VREGVDDCMPCTRL_SPEC; -impl crate::RegisterSpec for VREGVDDCMPCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`vregvddcmpctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`vregvddcmpctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct VregvddcmpctrlSpec; +impl crate::RegisterSpec for VregvddcmpctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [vregvddcmpctrl::R](R) reader structure"] -impl crate::Readable for VREGVDDCMPCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [vregvddcmpctrl::W](W) writer structure"] -impl crate::Writable for VREGVDDCMPCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`vregvddcmpctrl::R`](R) reader structure"] +impl crate::Readable for VregvddcmpctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`vregvddcmpctrl::W`](W) writer structure"] +impl crate::Writable for VregvddcmpctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets VREGVDDCMPCTRL to value 0x06"] -impl crate::Resettable for VREGVDDCMPCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x06; +impl crate::Resettable for VregvddcmpctrlSpec { + const RESET_VALUE: u32 = 0x06; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns.rs index 29f6870..e6d70ce 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns.rs @@ -1,136 +1,270 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + cfg0: Cfg0, + cfg1: Cfg1, + cfg2: Cfg2, + framecfg: Framecfg, + dtxdatcfg: Dtxdatcfg, + irhfcfg: Irhfcfg, + irlfcfg: Irlfcfg, + timingcfg: Timingcfg, + startframecfg: Startframecfg, + sigframecfg: Sigframecfg, + clkdiv: Clkdiv, + trigctrl: Trigctrl, + cmd: Cmd, + rxdata: Rxdata, + rxdatap: Rxdatap, + txdata: Txdata, + status: Status, + if_: If, + ien: Ien, + syncbusy: Syncbusy, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub cfg0: CFG0, + #[inline(always)] + pub const fn cfg0(&self) -> &Cfg0 { + &self.cfg0 + } #[doc = "0x0c - No Description"] - pub cfg1: CFG1, + #[inline(always)] + pub const fn cfg1(&self) -> &Cfg1 { + &self.cfg1 + } #[doc = "0x10 - No Description"] - pub cfg2: CFG2, + #[inline(always)] + pub const fn cfg2(&self) -> &Cfg2 { + &self.cfg2 + } #[doc = "0x14 - No Description"] - pub framecfg: FRAMECFG, + #[inline(always)] + pub const fn framecfg(&self) -> &Framecfg { + &self.framecfg + } #[doc = "0x18 - No Description"] - pub dtxdatcfg: DTXDATCFG, + #[inline(always)] + pub const fn dtxdatcfg(&self) -> &Dtxdatcfg { + &self.dtxdatcfg + } #[doc = "0x1c - No Description"] - pub irhfcfg: IRHFCFG, + #[inline(always)] + pub const fn irhfcfg(&self) -> &Irhfcfg { + &self.irhfcfg + } #[doc = "0x20 - No Description"] - pub irlfcfg: IRLFCFG, + #[inline(always)] + pub const fn irlfcfg(&self) -> &Irlfcfg { + &self.irlfcfg + } #[doc = "0x24 - No Description"] - pub timingcfg: TIMINGCFG, + #[inline(always)] + pub const fn timingcfg(&self) -> &Timingcfg { + &self.timingcfg + } #[doc = "0x28 - No Description"] - pub startframecfg: STARTFRAMECFG, + #[inline(always)] + pub const fn startframecfg(&self) -> &Startframecfg { + &self.startframecfg + } #[doc = "0x2c - No Description"] - pub sigframecfg: SIGFRAMECFG, + #[inline(always)] + pub const fn sigframecfg(&self) -> &Sigframecfg { + &self.sigframecfg + } #[doc = "0x30 - No Description"] - pub clkdiv: CLKDIV, + #[inline(always)] + pub const fn clkdiv(&self) -> &Clkdiv { + &self.clkdiv + } #[doc = "0x34 - No Description"] - pub trigctrl: TRIGCTRL, + #[inline(always)] + pub const fn trigctrl(&self) -> &Trigctrl { + &self.trigctrl + } #[doc = "0x38 - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x3c - No Description"] - pub rxdata: RXDATA, + #[inline(always)] + pub const fn rxdata(&self) -> &Rxdata { + &self.rxdata + } #[doc = "0x40 - No Description"] - pub rxdatap: RXDATAP, + #[inline(always)] + pub const fn rxdatap(&self) -> &Rxdatap { + &self.rxdatap + } #[doc = "0x44 - No Description"] - pub txdata: TXDATA, + #[inline(always)] + pub const fn txdata(&self) -> &Txdata { + &self.txdata + } #[doc = "0x48 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x4c - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x50 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x54 - No Description"] - pub syncbusy: SYNCBUSY, + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CFG0 (rw) register accessor: an alias for `Reg`"] -pub type CFG0 = crate::Reg; +#[doc = "CFG0 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg0`] +module"] +#[doc(alias = "CFG0")] +pub type Cfg0 = crate::Reg; #[doc = "No Description"] pub mod cfg0; -#[doc = "CFG1 (rw) register accessor: an alias for `Reg`"] -pub type CFG1 = crate::Reg; +#[doc = "CFG1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg1`] +module"] +#[doc(alias = "CFG1")] +pub type Cfg1 = crate::Reg; #[doc = "No Description"] pub mod cfg1; -#[doc = "CFG2 (rw) register accessor: an alias for `Reg`"] -pub type CFG2 = crate::Reg; +#[doc = "CFG2 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg2`] +module"] +#[doc(alias = "CFG2")] +pub type Cfg2 = crate::Reg; #[doc = "No Description"] pub mod cfg2; -#[doc = "FRAMECFG (rw) register accessor: an alias for `Reg`"] -pub type FRAMECFG = crate::Reg; +#[doc = "FRAMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`framecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`framecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@framecfg`] +module"] +#[doc(alias = "FRAMECFG")] +pub type Framecfg = crate::Reg; #[doc = "No Description"] pub mod framecfg; -#[doc = "DTXDATCFG (rw) register accessor: an alias for `Reg`"] -pub type DTXDATCFG = crate::Reg; +#[doc = "DTXDATCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtxdatcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtxdatcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtxdatcfg`] +module"] +#[doc(alias = "DTXDATCFG")] +pub type Dtxdatcfg = crate::Reg; #[doc = "No Description"] pub mod dtxdatcfg; -#[doc = "IRHFCFG (rw) register accessor: an alias for `Reg`"] -pub type IRHFCFG = crate::Reg; +#[doc = "IRHFCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`irhfcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irhfcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irhfcfg`] +module"] +#[doc(alias = "IRHFCFG")] +pub type Irhfcfg = crate::Reg; #[doc = "No Description"] pub mod irhfcfg; -#[doc = "IRLFCFG (rw) register accessor: an alias for `Reg`"] -pub type IRLFCFG = crate::Reg; +#[doc = "IRLFCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`irlfcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irlfcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irlfcfg`] +module"] +#[doc(alias = "IRLFCFG")] +pub type Irlfcfg = crate::Reg; #[doc = "No Description"] pub mod irlfcfg; -#[doc = "TIMINGCFG (rw) register accessor: an alias for `Reg`"] -pub type TIMINGCFG = crate::Reg; +#[doc = "TIMINGCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timingcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timingcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timingcfg`] +module"] +#[doc(alias = "TIMINGCFG")] +pub type Timingcfg = crate::Reg; #[doc = "No Description"] pub mod timingcfg; -#[doc = "STARTFRAMECFG (rw) register accessor: an alias for `Reg`"] -pub type STARTFRAMECFG = crate::Reg; +#[doc = "STARTFRAMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`startframecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`startframecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@startframecfg`] +module"] +#[doc(alias = "STARTFRAMECFG")] +pub type Startframecfg = crate::Reg; #[doc = "No Description"] pub mod startframecfg; -#[doc = "SIGFRAMECFG (rw) register accessor: an alias for `Reg`"] -pub type SIGFRAMECFG = crate::Reg; +#[doc = "SIGFRAMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sigframecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sigframecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sigframecfg`] +module"] +#[doc(alias = "SIGFRAMECFG")] +pub type Sigframecfg = crate::Reg; #[doc = "No Description"] pub mod sigframecfg; -#[doc = "CLKDIV (rw) register accessor: an alias for `Reg`"] -pub type CLKDIV = crate::Reg; +#[doc = "CLKDIV (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv`] +module"] +#[doc(alias = "CLKDIV")] +pub type Clkdiv = crate::Reg; #[doc = "No Description"] pub mod clkdiv; -#[doc = "TRIGCTRL (rw) register accessor: an alias for `Reg`"] -pub type TRIGCTRL = crate::Reg; +#[doc = "TRIGCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`trigctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trigctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trigctrl`] +module"] +#[doc(alias = "TRIGCTRL")] +pub type Trigctrl = crate::Reg; #[doc = "No Description"] pub mod trigctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "RXDATA (r) register accessor: an alias for `Reg`"] -pub type RXDATA = crate::Reg; +#[doc = "RXDATA (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdata::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdata`] +module"] +#[doc(alias = "RXDATA")] +pub type Rxdata = crate::Reg; #[doc = "No Description"] pub mod rxdata; -#[doc = "RXDATAP (r) register accessor: an alias for `Reg`"] -pub type RXDATAP = crate::Reg; +#[doc = "RXDATAP (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdatap::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdatap`] +module"] +#[doc(alias = "RXDATAP")] +pub type Rxdatap = crate::Reg; #[doc = "No Description"] pub mod rxdatap; -#[doc = "TXDATA (w) register accessor: an alias for `Reg`"] -pub type TXDATA = crate::Reg; +#[doc = "TXDATA (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdata::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txdata`] +module"] +#[doc(alias = "TXDATA")] +pub type Txdata = crate::Reg; #[doc = "No Description"] pub mod txdata; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "No Description"] pub mod syncbusy; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/cfg0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/cfg0.rs index 89b67d3..f0c8da6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/cfg0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/cfg0.rs @@ -1,249 +1,227 @@ #[doc = "Register `CFG0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SYNC` reader - Synchronous Mode"] -pub type SYNC_R = crate::BitReader; +pub type W = crate::W; #[doc = "Synchronous Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYNC_A { +pub enum Sync { #[doc = "0: The EUSART operates in asynchronous mode"] - ASYNC = 0, + Async = 0, #[doc = "1: The EUSART operates in synchronous mode"] - SYNC = 1, + Sync = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYNC_A) -> Self { + fn from(variant: Sync) -> Self { variant as u8 != 0 } } -impl SYNC_R { +#[doc = "Field `SYNC` reader - Synchronous Mode"] +pub type SyncR = crate::BitReader; +impl SyncR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SYNC_A { + pub const fn variant(&self) -> Sync { match self.bits { - false => SYNC_A::ASYNC, - true => SYNC_A::SYNC, + false => Sync::Async, + true => Sync::Sync, } } - #[doc = "Checks if the value of the field is `ASYNC`"] + #[doc = "The EUSART operates in asynchronous mode"] #[inline(always)] pub fn is_async(&self) -> bool { - *self == SYNC_A::ASYNC + *self == Sync::Async } - #[doc = "Checks if the value of the field is `SYNC`"] + #[doc = "The EUSART operates in synchronous mode"] #[inline(always)] pub fn is_sync(&self) -> bool { - *self == SYNC_A::SYNC + *self == Sync::Sync } } #[doc = "Field `SYNC` writer - Synchronous Mode"] -pub type SYNC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, SYNC_A, O>; -impl<'a, const O: u8> SYNC_W<'a, O> { +pub type SyncW<'a, REG> = crate::BitWriter<'a, REG, Sync>; +impl<'a, REG> SyncW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The EUSART operates in asynchronous mode"] #[inline(always)] - pub fn async_(self) -> &'a mut W { - self.variant(SYNC_A::ASYNC) + pub fn async_(self) -> &'a mut crate::W { + self.variant(Sync::Async) } #[doc = "The EUSART operates in synchronous mode"] #[inline(always)] - pub fn sync(self) -> &'a mut W { - self.variant(SYNC_A::SYNC) + pub fn sync(self) -> &'a mut crate::W { + self.variant(Sync::Sync) } } -#[doc = "Field `LOOPBK` reader - Loopback Enable"] -pub type LOOPBK_R = crate::BitReader; #[doc = "Loopback Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOOPBK_A { +pub enum Loopbk { #[doc = "0: The receiver is connected to and receives data from UARTn_RX"] - DISABLE = 0, + Disable = 0, #[doc = "1: The receiver is connected to and receives data from UARTn_TX"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOOPBK_A) -> Self { + fn from(variant: Loopbk) -> Self { variant as u8 != 0 } } -impl LOOPBK_R { +#[doc = "Field `LOOPBK` reader - Loopback Enable"] +pub type LoopbkR = crate::BitReader; +impl LoopbkR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOOPBK_A { + pub const fn variant(&self) -> Loopbk { match self.bits { - false => LOOPBK_A::DISABLE, - true => LOOPBK_A::ENABLE, + false => Loopbk::Disable, + true => Loopbk::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The receiver is connected to and receives data from UARTn_RX"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == LOOPBK_A::DISABLE + *self == Loopbk::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The receiver is connected to and receives data from UARTn_TX"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == LOOPBK_A::ENABLE + *self == Loopbk::Enable } } #[doc = "Field `LOOPBK` writer - Loopback Enable"] -pub type LOOPBK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, LOOPBK_A, O>; -impl<'a, const O: u8> LOOPBK_W<'a, O> { +pub type LoopbkW<'a, REG> = crate::BitWriter<'a, REG, Loopbk>; +impl<'a, REG> LoopbkW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The receiver is connected to and receives data from UARTn_RX"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(LOOPBK_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Loopbk::Disable) } #[doc = "The receiver is connected to and receives data from UARTn_TX"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(LOOPBK_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Loopbk::Enable) } } -#[doc = "Field `CCEN` reader - Collision Check Enable"] -pub type CCEN_R = crate::BitReader; #[doc = "Collision Check Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCEN_A { +pub enum Ccen { #[doc = "0: Collision check is disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Collision check is enabled. The receiver must be enabled for the check to be performed"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCEN_A) -> Self { + fn from(variant: Ccen) -> Self { variant as u8 != 0 } } -impl CCEN_R { +#[doc = "Field `CCEN` reader - Collision Check Enable"] +pub type CcenR = crate::BitReader; +impl CcenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCEN_A { + pub const fn variant(&self) -> Ccen { match self.bits { - false => CCEN_A::DISABLE, - true => CCEN_A::ENABLE, + false => Ccen::Disable, + true => Ccen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Collision check is disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CCEN_A::DISABLE + *self == Ccen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Collision check is enabled. The receiver must be enabled for the check to be performed"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CCEN_A::ENABLE + *self == Ccen::Enable } } #[doc = "Field `CCEN` writer - Collision Check Enable"] -pub type CCEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, CCEN_A, O>; -impl<'a, const O: u8> CCEN_W<'a, O> { +pub type CcenW<'a, REG> = crate::BitWriter<'a, REG, Ccen>; +impl<'a, REG> CcenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Collision check is disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CCEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ccen::Disable) } #[doc = "Collision check is enabled. The receiver must be enabled for the check to be performed"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CCEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Ccen::Enable) } } -#[doc = "Field `MPM` reader - Multi-Processor Mode"] -pub type MPM_R = crate::BitReader; #[doc = "Multi-Processor Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MPM_A { +pub enum Mpm { #[doc = "0: The 9th bit of incoming frames has no special function"] - DISABLE = 0, + Disable = 0, #[doc = "1: An incoming frame with the 9th bit equal to MPAB will be loaded into the RX FIFO regardless of RXBLOCK and will result in the MPAB interrupt flag being set"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MPM_A) -> Self { + fn from(variant: Mpm) -> Self { variant as u8 != 0 } } -impl MPM_R { +#[doc = "Field `MPM` reader - Multi-Processor Mode"] +pub type MpmR = crate::BitReader; +impl MpmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MPM_A { + pub const fn variant(&self) -> Mpm { match self.bits { - false => MPM_A::DISABLE, - true => MPM_A::ENABLE, + false => Mpm::Disable, + true => Mpm::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The 9th bit of incoming frames has no special function"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == MPM_A::DISABLE + *self == Mpm::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "An incoming frame with the 9th bit equal to MPAB will be loaded into the RX FIFO regardless of RXBLOCK and will result in the MPAB interrupt flag being set"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == MPM_A::ENABLE + *self == Mpm::Enable } } #[doc = "Field `MPM` writer - Multi-Processor Mode"] -pub type MPM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, MPM_A, O>; -impl<'a, const O: u8> MPM_W<'a, O> { +pub type MpmW<'a, REG> = crate::BitWriter<'a, REG, Mpm>; +impl<'a, REG> MpmW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The 9th bit of incoming frames has no special function"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(MPM_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Mpm::Disable) } #[doc = "An incoming frame with the 9th bit equal to MPAB will be loaded into the RX FIFO regardless of RXBLOCK and will result in the MPAB interrupt flag being set"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(MPM_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Mpm::Enable) } } #[doc = "Field `MPAB` reader - Multi-Processor Address-Bit"] -pub type MPAB_R = crate::BitReader; +pub type MpabR = crate::BitReader; #[doc = "Field `MPAB` writer - Multi-Processor Address-Bit"] -pub type MPAB_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, O>; -#[doc = "Field `OVS` reader - Oversampling"] -pub type OVS_R = crate::FieldReader; +pub type MpabW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Oversampling\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum OVS_A { +pub enum Ovs { #[doc = "0: 16X oversampling"] X16 = 0, #[doc = "1: 8X oversampling"] @@ -253,646 +231,669 @@ pub enum OVS_A { #[doc = "3: 4X oversampling"] X4 = 3, #[doc = "4: Disable oversampling (for LF operation)"] - DISABLE = 4, + Disable = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: OVS_A) -> Self { + fn from(variant: Ovs) -> Self { variant as _ } } -impl OVS_R { +impl crate::FieldSpec for Ovs { + type Ux = u8; +} +impl crate::IsEnum for Ovs {} +#[doc = "Field `OVS` reader - Oversampling"] +pub type OvsR = crate::FieldReader; +impl OvsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(OVS_A::X16), - 1 => Some(OVS_A::X8), - 2 => Some(OVS_A::X6), - 3 => Some(OVS_A::X4), - 4 => Some(OVS_A::DISABLE), + 0 => Some(Ovs::X16), + 1 => Some(Ovs::X8), + 2 => Some(Ovs::X6), + 3 => Some(Ovs::X4), + 4 => Some(Ovs::Disable), _ => None, } } - #[doc = "Checks if the value of the field is `X16`"] + #[doc = "16X oversampling"] #[inline(always)] pub fn is_x16(&self) -> bool { - *self == OVS_A::X16 + *self == Ovs::X16 } - #[doc = "Checks if the value of the field is `X8`"] + #[doc = "8X oversampling"] #[inline(always)] pub fn is_x8(&self) -> bool { - *self == OVS_A::X8 + *self == Ovs::X8 } - #[doc = "Checks if the value of the field is `X6`"] + #[doc = "6X oversampling"] #[inline(always)] pub fn is_x6(&self) -> bool { - *self == OVS_A::X6 + *self == Ovs::X6 } - #[doc = "Checks if the value of the field is `X4`"] + #[doc = "4X oversampling"] #[inline(always)] pub fn is_x4(&self) -> bool { - *self == OVS_A::X4 + *self == Ovs::X4 } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable oversampling (for LF operation)"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == OVS_A::DISABLE + *self == Ovs::Disable } } #[doc = "Field `OVS` writer - Oversampling"] -pub type OVS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG0_SPEC, u8, OVS_A, 3, O>; -impl<'a, const O: u8> OVS_W<'a, O> { +pub type OvsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Ovs>; +impl<'a, REG> OvsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "16X oversampling"] #[inline(always)] - pub fn x16(self) -> &'a mut W { - self.variant(OVS_A::X16) + pub fn x16(self) -> &'a mut crate::W { + self.variant(Ovs::X16) } #[doc = "8X oversampling"] #[inline(always)] - pub fn x8(self) -> &'a mut W { - self.variant(OVS_A::X8) + pub fn x8(self) -> &'a mut crate::W { + self.variant(Ovs::X8) } #[doc = "6X oversampling"] #[inline(always)] - pub fn x6(self) -> &'a mut W { - self.variant(OVS_A::X6) + pub fn x6(self) -> &'a mut crate::W { + self.variant(Ovs::X6) } #[doc = "4X oversampling"] #[inline(always)] - pub fn x4(self) -> &'a mut W { - self.variant(OVS_A::X4) + pub fn x4(self) -> &'a mut crate::W { + self.variant(Ovs::X4) } #[doc = "Disable oversampling (for LF operation)"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(OVS_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ovs::Disable) } } -#[doc = "Field `MSBF` reader - Most Significant Bit First"] -pub type MSBF_R = crate::BitReader; #[doc = "Most Significant Bit First\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MSBF_A { +pub enum Msbf { #[doc = "0: Data is sent with the least significant bit first"] - DISABLE = 0, + Disable = 0, #[doc = "1: Data is sent with the most significant bit first"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MSBF_A) -> Self { + fn from(variant: Msbf) -> Self { variant as u8 != 0 } } -impl MSBF_R { +#[doc = "Field `MSBF` reader - Most Significant Bit First"] +pub type MsbfR = crate::BitReader; +impl MsbfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MSBF_A { + pub const fn variant(&self) -> Msbf { match self.bits { - false => MSBF_A::DISABLE, - true => MSBF_A::ENABLE, + false => Msbf::Disable, + true => Msbf::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Data is sent with the least significant bit first"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == MSBF_A::DISABLE + *self == Msbf::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Data is sent with the most significant bit first"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == MSBF_A::ENABLE + *self == Msbf::Enable } } #[doc = "Field `MSBF` writer - Most Significant Bit First"] -pub type MSBF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, MSBF_A, O>; -impl<'a, const O: u8> MSBF_W<'a, O> { +pub type MsbfW<'a, REG> = crate::BitWriter<'a, REG, Msbf>; +impl<'a, REG> MsbfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Data is sent with the least significant bit first"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(MSBF_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Msbf::Disable) } #[doc = "Data is sent with the most significant bit first"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(MSBF_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Msbf::Enable) } } -#[doc = "Field `RXINV` reader - Receiver Input Invert"] -pub type RXINV_R = crate::BitReader; #[doc = "Receiver Input Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RXINV_A { +pub enum Rxinv { #[doc = "0: Input is passed directly to the receiver"] - DISABLE = 0, + Disable = 0, #[doc = "1: Input is inverted before it is passed to the receiver"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RXINV_A) -> Self { + fn from(variant: Rxinv) -> Self { variant as u8 != 0 } } -impl RXINV_R { +#[doc = "Field `RXINV` reader - Receiver Input Invert"] +pub type RxinvR = crate::BitReader; +impl RxinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RXINV_A { + pub const fn variant(&self) -> Rxinv { match self.bits { - false => RXINV_A::DISABLE, - true => RXINV_A::ENABLE, + false => Rxinv::Disable, + true => Rxinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Input is passed directly to the receiver"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RXINV_A::DISABLE + *self == Rxinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Input is inverted before it is passed to the receiver"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RXINV_A::ENABLE + *self == Rxinv::Enable } } #[doc = "Field `RXINV` writer - Receiver Input Invert"] -pub type RXINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, RXINV_A, O>; -impl<'a, const O: u8> RXINV_W<'a, O> { +pub type RxinvW<'a, REG> = crate::BitWriter<'a, REG, Rxinv>; +impl<'a, REG> RxinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Input is passed directly to the receiver"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RXINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Rxinv::Disable) } #[doc = "Input is inverted before it is passed to the receiver"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RXINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Rxinv::Enable) } } -#[doc = "Field `TXINV` reader - Transmitter output Invert"] -pub type TXINV_R = crate::BitReader; #[doc = "Transmitter output Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TXINV_A { +pub enum Txinv { #[doc = "0: Output from the transmitter is passed unchanged to UARTn_TX"] - DISABLE = 0, + Disable = 0, #[doc = "1: Output from the transmitter is inverted before it is passed to UARTn_TX"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TXINV_A) -> Self { + fn from(variant: Txinv) -> Self { variant as u8 != 0 } } -impl TXINV_R { +#[doc = "Field `TXINV` reader - Transmitter output Invert"] +pub type TxinvR = crate::BitReader; +impl TxinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXINV_A { + pub const fn variant(&self) -> Txinv { match self.bits { - false => TXINV_A::DISABLE, - true => TXINV_A::ENABLE, + false => Txinv::Disable, + true => Txinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Output from the transmitter is passed unchanged to UARTn_TX"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == TXINV_A::DISABLE + *self == Txinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Output from the transmitter is inverted before it is passed to UARTn_TX"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == TXINV_A::ENABLE + *self == Txinv::Enable } } #[doc = "Field `TXINV` writer - Transmitter output Invert"] -pub type TXINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, TXINV_A, O>; -impl<'a, const O: u8> TXINV_W<'a, O> { +pub type TxinvW<'a, REG> = crate::BitWriter<'a, REG, Txinv>; +impl<'a, REG> TxinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Output from the transmitter is passed unchanged to UARTn_TX"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(TXINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Txinv::Disable) } #[doc = "Output from the transmitter is inverted before it is passed to UARTn_TX"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(TXINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Txinv::Enable) } } -#[doc = "Field `AUTOTRI` reader - Automatic TX Tristate"] -pub type AUTOTRI_R = crate::BitReader; #[doc = "Automatic TX Tristate\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AUTOTRI_A { +pub enum Autotri { #[doc = "0: The output on UARTn_TX when the transmitter is idle is defined by TXINV"] - DISABLE = 0, + Disable = 0, #[doc = "1: UARTn_TX is tristated whenever the transmitter is idle"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AUTOTRI_A) -> Self { + fn from(variant: Autotri) -> Self { variant as u8 != 0 } } -impl AUTOTRI_R { +#[doc = "Field `AUTOTRI` reader - Automatic TX Tristate"] +pub type AutotriR = crate::BitReader; +impl AutotriR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> AUTOTRI_A { + pub const fn variant(&self) -> Autotri { match self.bits { - false => AUTOTRI_A::DISABLE, - true => AUTOTRI_A::ENABLE, + false => Autotri::Disable, + true => Autotri::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The output on UARTn_TX when the transmitter is idle is defined by TXINV"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == AUTOTRI_A::DISABLE + *self == Autotri::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "UARTn_TX is tristated whenever the transmitter is idle"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == AUTOTRI_A::ENABLE + *self == Autotri::Enable } } #[doc = "Field `AUTOTRI` writer - Automatic TX Tristate"] -pub type AUTOTRI_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, AUTOTRI_A, O>; -impl<'a, const O: u8> AUTOTRI_W<'a, O> { +pub type AutotriW<'a, REG> = crate::BitWriter<'a, REG, Autotri>; +impl<'a, REG> AutotriW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The output on UARTn_TX when the transmitter is idle is defined by TXINV"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(AUTOTRI_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Autotri::Disable) } #[doc = "UARTn_TX is tristated whenever the transmitter is idle"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(AUTOTRI_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Autotri::Enable) } } #[doc = "Field `SKIPPERRF` reader - Skip Parity Error Frames"] -pub type SKIPPERRF_R = crate::BitReader; +pub type SkipperrfR = crate::BitReader; #[doc = "Field `SKIPPERRF` writer - Skip Parity Error Frames"] -pub type SKIPPERRF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, O>; -#[doc = "Field `ERRSDMA` reader - Halt DMA Read On Error"] -pub type ERRSDMA_R = crate::BitReader; +pub type SkipperrfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Halt DMA Read On Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRSDMA_A { +pub enum Errsdma { #[doc = "0: Framing and parity errors have no effect on DMA requests from the EUSART"] - DISABLE = 0, + Disable = 0, #[doc = "1: DMA requests from the EUSART are blocked while the PERR or FERR interrupt flags are set"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRSDMA_A) -> Self { + fn from(variant: Errsdma) -> Self { variant as u8 != 0 } } -impl ERRSDMA_R { +#[doc = "Field `ERRSDMA` reader - Halt DMA Read On Error"] +pub type ErrsdmaR = crate::BitReader; +impl ErrsdmaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ERRSDMA_A { + pub const fn variant(&self) -> Errsdma { match self.bits { - false => ERRSDMA_A::DISABLE, - true => ERRSDMA_A::ENABLE, + false => Errsdma::Disable, + true => Errsdma::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Framing and parity errors have no effect on DMA requests from the EUSART"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ERRSDMA_A::DISABLE + *self == Errsdma::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "DMA requests from the EUSART are blocked while the PERR or FERR interrupt flags are set"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ERRSDMA_A::ENABLE + *self == Errsdma::Enable } } #[doc = "Field `ERRSDMA` writer - Halt DMA Read On Error"] -pub type ERRSDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, ERRSDMA_A, O>; -impl<'a, const O: u8> ERRSDMA_W<'a, O> { +pub type ErrsdmaW<'a, REG> = crate::BitWriter<'a, REG, Errsdma>; +impl<'a, REG> ErrsdmaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Framing and parity errors have no effect on DMA requests from the EUSART"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ERRSDMA_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Errsdma::Disable) } #[doc = "DMA requests from the EUSART are blocked while the PERR or FERR interrupt flags are set"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ERRSDMA_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Errsdma::Enable) } } -#[doc = "Field `ERRSRX` reader - Disable RX On Error"] -pub type ERRSRX_R = crate::BitReader; #[doc = "Disable RX On Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRSRX_A { +pub enum Errsrx { #[doc = "0: Framing and parity errors have no effect on receiver"] - DISABLE = 0, + Disable = 0, #[doc = "1: Framing and parity errors disable the receiver"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRSRX_A) -> Self { + fn from(variant: Errsrx) -> Self { variant as u8 != 0 } } -impl ERRSRX_R { +#[doc = "Field `ERRSRX` reader - Disable RX On Error"] +pub type ErrsrxR = crate::BitReader; +impl ErrsrxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ERRSRX_A { + pub const fn variant(&self) -> Errsrx { match self.bits { - false => ERRSRX_A::DISABLE, - true => ERRSRX_A::ENABLE, + false => Errsrx::Disable, + true => Errsrx::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Framing and parity errors have no effect on receiver"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ERRSRX_A::DISABLE + *self == Errsrx::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Framing and parity errors disable the receiver"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ERRSRX_A::ENABLE + *self == Errsrx::Enable } } #[doc = "Field `ERRSRX` writer - Disable RX On Error"] -pub type ERRSRX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, ERRSRX_A, O>; -impl<'a, const O: u8> ERRSRX_W<'a, O> { +pub type ErrsrxW<'a, REG> = crate::BitWriter<'a, REG, Errsrx>; +impl<'a, REG> ErrsrxW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Framing and parity errors have no effect on receiver"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ERRSRX_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Errsrx::Disable) } #[doc = "Framing and parity errors disable the receiver"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ERRSRX_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Errsrx::Enable) } } -#[doc = "Field `ERRSTX` reader - Disable TX On Error"] -pub type ERRSTX_R = crate::BitReader; #[doc = "Disable TX On Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRSTX_A { +pub enum Errstx { #[doc = "0: Received framing and parity errors have no effect on transmitter"] - DISABLE = 0, + Disable = 0, #[doc = "1: Received framing and parity errors disable the transmitter"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRSTX_A) -> Self { + fn from(variant: Errstx) -> Self { variant as u8 != 0 } } -impl ERRSTX_R { +#[doc = "Field `ERRSTX` reader - Disable TX On Error"] +pub type ErrstxR = crate::BitReader; +impl ErrstxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ERRSTX_A { + pub const fn variant(&self) -> Errstx { match self.bits { - false => ERRSTX_A::DISABLE, - true => ERRSTX_A::ENABLE, + false => Errstx::Disable, + true => Errstx::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Received framing and parity errors have no effect on transmitter"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ERRSTX_A::DISABLE + *self == Errstx::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Received framing and parity errors disable the transmitter"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ERRSTX_A::ENABLE + *self == Errstx::Enable } } #[doc = "Field `ERRSTX` writer - Disable TX On Error"] -pub type ERRSTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, ERRSTX_A, O>; -impl<'a, const O: u8> ERRSTX_W<'a, O> { +pub type ErrstxW<'a, REG> = crate::BitWriter<'a, REG, Errstx>; +impl<'a, REG> ErrstxW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Received framing and parity errors have no effect on transmitter"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ERRSTX_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Errstx::Disable) } #[doc = "Received framing and parity errors disable the transmitter"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ERRSTX_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Errstx::Enable) } } #[doc = "Field `MVDIS` reader - Majority Vote Disable"] -pub type MVDIS_R = crate::BitReader; +pub type MvdisR = crate::BitReader; #[doc = "Field `MVDIS` writer - Majority Vote Disable"] -pub type MVDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, O>; +pub type MvdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOBAUDEN` reader - AUTOBAUD detection enable"] -pub type AUTOBAUDEN_R = crate::BitReader; +pub type AutobaudenR = crate::BitReader; #[doc = "Field `AUTOBAUDEN` writer - AUTOBAUD detection enable"] -pub type AUTOBAUDEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, O>; +pub type AutobaudenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Synchronous Mode"] #[inline(always)] - pub fn sync(&self) -> SYNC_R { - SYNC_R::new((self.bits & 1) != 0) + pub fn sync(&self) -> SyncR { + SyncR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Loopback Enable"] #[inline(always)] - pub fn loopbk(&self) -> LOOPBK_R { - LOOPBK_R::new(((self.bits >> 1) & 1) != 0) + pub fn loopbk(&self) -> LoopbkR { + LoopbkR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Collision Check Enable"] #[inline(always)] - pub fn ccen(&self) -> CCEN_R { - CCEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn ccen(&self) -> CcenR { + CcenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Multi-Processor Mode"] #[inline(always)] - pub fn mpm(&self) -> MPM_R { - MPM_R::new(((self.bits >> 3) & 1) != 0) + pub fn mpm(&self) -> MpmR { + MpmR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Multi-Processor Address-Bit"] #[inline(always)] - pub fn mpab(&self) -> MPAB_R { - MPAB_R::new(((self.bits >> 4) & 1) != 0) + pub fn mpab(&self) -> MpabR { + MpabR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 5:7 - Oversampling"] #[inline(always)] - pub fn ovs(&self) -> OVS_R { - OVS_R::new(((self.bits >> 5) & 7) as u8) + pub fn ovs(&self) -> OvsR { + OvsR::new(((self.bits >> 5) & 7) as u8) } #[doc = "Bit 10 - Most Significant Bit First"] #[inline(always)] - pub fn msbf(&self) -> MSBF_R { - MSBF_R::new(((self.bits >> 10) & 1) != 0) + pub fn msbf(&self) -> MsbfR { + MsbfR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 13 - Receiver Input Invert"] #[inline(always)] - pub fn rxinv(&self) -> RXINV_R { - RXINV_R::new(((self.bits >> 13) & 1) != 0) + pub fn rxinv(&self) -> RxinvR { + RxinvR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Transmitter output Invert"] #[inline(always)] - pub fn txinv(&self) -> TXINV_R { - TXINV_R::new(((self.bits >> 14) & 1) != 0) + pub fn txinv(&self) -> TxinvR { + TxinvR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 17 - Automatic TX Tristate"] #[inline(always)] - pub fn autotri(&self) -> AUTOTRI_R { - AUTOTRI_R::new(((self.bits >> 17) & 1) != 0) + pub fn autotri(&self) -> AutotriR { + AutotriR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 20 - Skip Parity Error Frames"] #[inline(always)] - pub fn skipperrf(&self) -> SKIPPERRF_R { - SKIPPERRF_R::new(((self.bits >> 20) & 1) != 0) + pub fn skipperrf(&self) -> SkipperrfR { + SkipperrfR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 22 - Halt DMA Read On Error"] #[inline(always)] - pub fn errsdma(&self) -> ERRSDMA_R { - ERRSDMA_R::new(((self.bits >> 22) & 1) != 0) + pub fn errsdma(&self) -> ErrsdmaR { + ErrsdmaR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Disable RX On Error"] #[inline(always)] - pub fn errsrx(&self) -> ERRSRX_R { - ERRSRX_R::new(((self.bits >> 23) & 1) != 0) + pub fn errsrx(&self) -> ErrsrxR { + ErrsrxR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - Disable TX On Error"] #[inline(always)] - pub fn errstx(&self) -> ERRSTX_R { - ERRSTX_R::new(((self.bits >> 24) & 1) != 0) + pub fn errstx(&self) -> ErrstxR { + ErrstxR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 30 - Majority Vote Disable"] #[inline(always)] - pub fn mvdis(&self) -> MVDIS_R { - MVDIS_R::new(((self.bits >> 30) & 1) != 0) + pub fn mvdis(&self) -> MvdisR { + MvdisR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - AUTOBAUD detection enable"] #[inline(always)] - pub fn autobauden(&self) -> AUTOBAUDEN_R { - AUTOBAUDEN_R::new(((self.bits >> 31) & 1) != 0) + pub fn autobauden(&self) -> AutobaudenR { + AutobaudenR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Synchronous Mode"] #[inline(always)] #[must_use] - pub fn sync(&mut self) -> SYNC_W<0> { - SYNC_W::new(self) + pub fn sync(&mut self) -> SyncW { + SyncW::new(self, 0) } #[doc = "Bit 1 - Loopback Enable"] #[inline(always)] #[must_use] - pub fn loopbk(&mut self) -> LOOPBK_W<1> { - LOOPBK_W::new(self) + pub fn loopbk(&mut self) -> LoopbkW { + LoopbkW::new(self, 1) } #[doc = "Bit 2 - Collision Check Enable"] #[inline(always)] #[must_use] - pub fn ccen(&mut self) -> CCEN_W<2> { - CCEN_W::new(self) + pub fn ccen(&mut self) -> CcenW { + CcenW::new(self, 2) } #[doc = "Bit 3 - Multi-Processor Mode"] #[inline(always)] #[must_use] - pub fn mpm(&mut self) -> MPM_W<3> { - MPM_W::new(self) + pub fn mpm(&mut self) -> MpmW { + MpmW::new(self, 3) } #[doc = "Bit 4 - Multi-Processor Address-Bit"] #[inline(always)] #[must_use] - pub fn mpab(&mut self) -> MPAB_W<4> { - MPAB_W::new(self) + pub fn mpab(&mut self) -> MpabW { + MpabW::new(self, 4) } #[doc = "Bits 5:7 - Oversampling"] #[inline(always)] #[must_use] - pub fn ovs(&mut self) -> OVS_W<5> { - OVS_W::new(self) + pub fn ovs(&mut self) -> OvsW { + OvsW::new(self, 5) } #[doc = "Bit 10 - Most Significant Bit First"] #[inline(always)] #[must_use] - pub fn msbf(&mut self) -> MSBF_W<10> { - MSBF_W::new(self) + pub fn msbf(&mut self) -> MsbfW { + MsbfW::new(self, 10) } #[doc = "Bit 13 - Receiver Input Invert"] #[inline(always)] #[must_use] - pub fn rxinv(&mut self) -> RXINV_W<13> { - RXINV_W::new(self) + pub fn rxinv(&mut self) -> RxinvW { + RxinvW::new(self, 13) } #[doc = "Bit 14 - Transmitter output Invert"] #[inline(always)] #[must_use] - pub fn txinv(&mut self) -> TXINV_W<14> { - TXINV_W::new(self) + pub fn txinv(&mut self) -> TxinvW { + TxinvW::new(self, 14) } #[doc = "Bit 17 - Automatic TX Tristate"] #[inline(always)] #[must_use] - pub fn autotri(&mut self) -> AUTOTRI_W<17> { - AUTOTRI_W::new(self) + pub fn autotri(&mut self) -> AutotriW { + AutotriW::new(self, 17) } #[doc = "Bit 20 - Skip Parity Error Frames"] #[inline(always)] #[must_use] - pub fn skipperrf(&mut self) -> SKIPPERRF_W<20> { - SKIPPERRF_W::new(self) + pub fn skipperrf(&mut self) -> SkipperrfW { + SkipperrfW::new(self, 20) } #[doc = "Bit 22 - Halt DMA Read On Error"] #[inline(always)] #[must_use] - pub fn errsdma(&mut self) -> ERRSDMA_W<22> { - ERRSDMA_W::new(self) + pub fn errsdma(&mut self) -> ErrsdmaW { + ErrsdmaW::new(self, 22) } #[doc = "Bit 23 - Disable RX On Error"] #[inline(always)] #[must_use] - pub fn errsrx(&mut self) -> ERRSRX_W<23> { - ERRSRX_W::new(self) + pub fn errsrx(&mut self) -> ErrsrxW { + ErrsrxW::new(self, 23) } #[doc = "Bit 24 - Disable TX On Error"] #[inline(always)] #[must_use] - pub fn errstx(&mut self) -> ERRSTX_W<24> { - ERRSTX_W::new(self) + pub fn errstx(&mut self) -> ErrstxW { + ErrstxW::new(self, 24) } #[doc = "Bit 30 - Majority Vote Disable"] #[inline(always)] #[must_use] - pub fn mvdis(&mut self) -> MVDIS_W<30> { - MVDIS_W::new(self) + pub fn mvdis(&mut self) -> MvdisW { + MvdisW::new(self, 30) } #[doc = "Bit 31 - AUTOBAUD detection enable"] #[inline(always)] #[must_use] - pub fn autobauden(&mut self) -> AUTOBAUDEN_W<31> { - AUTOBAUDEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn autobauden(&mut self) -> AutobaudenW { + AutobaudenW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg0](index.html) module"] -pub struct CFG0_SPEC; -impl crate::RegisterSpec for CFG0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cfg0Spec; +impl crate::RegisterSpec for Cfg0Spec { type Ux = u32; } -#[doc = "`read()` method returns [cfg0::R](R) reader structure"] -impl crate::Readable for CFG0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg0::W](W) writer structure"] -impl crate::Writable for CFG0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg0::R`](R) reader structure"] +impl crate::Readable for Cfg0Spec {} +#[doc = "`write(|w| ..)` method takes [`cfg0::W`](W) writer structure"] +impl crate::Writable for Cfg0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG0 to value 0"] -impl crate::Resettable for CFG0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cfg0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/cfg1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/cfg1.rs index c0424d3..4c3498c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/cfg1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/cfg1.rs @@ -1,1247 +1,1249 @@ #[doc = "Register `CFG1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DBGHALT` reader - Debug halt"] -pub type DBGHALT_R = crate::BitReader; +pub type W = crate::W; #[doc = "Debug halt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DBGHALT_A { +pub enum Dbghalt { #[doc = "0: Continue normal EUSART operation even if core is halted"] - DISABLE = 0, + Disable = 0, #[doc = "1: If core is halted, receive one frame and then halt reception by deactivating RTS. Next frame reception happens when the core is unhalted during single stepping."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DBGHALT_A) -> Self { + fn from(variant: Dbghalt) -> Self { variant as u8 != 0 } } -impl DBGHALT_R { +#[doc = "Field `DBGHALT` reader - Debug halt"] +pub type DbghaltR = crate::BitReader; +impl DbghaltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DBGHALT_A { + pub const fn variant(&self) -> Dbghalt { match self.bits { - false => DBGHALT_A::DISABLE, - true => DBGHALT_A::ENABLE, + false => Dbghalt::Disable, + true => Dbghalt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Continue normal EUSART operation even if core is halted"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == DBGHALT_A::DISABLE + *self == Dbghalt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "If core is halted, receive one frame and then halt reception by deactivating RTS. Next frame reception happens when the core is unhalted during single stepping."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == DBGHALT_A::ENABLE + *self == Dbghalt::Enable } } #[doc = "Field `DBGHALT` writer - Debug halt"] -pub type DBGHALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, DBGHALT_A, O>; -impl<'a, const O: u8> DBGHALT_W<'a, O> { +pub type DbghaltW<'a, REG> = crate::BitWriter<'a, REG, Dbghalt>; +impl<'a, REG> DbghaltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Continue normal EUSART operation even if core is halted"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(DBGHALT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Dbghalt::Disable) } #[doc = "If core is halted, receive one frame and then halt reception by deactivating RTS. Next frame reception happens when the core is unhalted during single stepping."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(DBGHALT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Dbghalt::Enable) } } -#[doc = "Field `CTSINV` reader - Clear-to-send Invert Enable"] -pub type CTSINV_R = crate::BitReader; #[doc = "Clear-to-send Invert Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CTSINV_A { +pub enum Ctsinv { #[doc = "0: The CTS pin is active low"] - DISABLE = 0, + Disable = 0, #[doc = "1: The CTS pin is active high"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CTSINV_A) -> Self { + fn from(variant: Ctsinv) -> Self { variant as u8 != 0 } } -impl CTSINV_R { +#[doc = "Field `CTSINV` reader - Clear-to-send Invert Enable"] +pub type CtsinvR = crate::BitReader; +impl CtsinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CTSINV_A { + pub const fn variant(&self) -> Ctsinv { match self.bits { - false => CTSINV_A::DISABLE, - true => CTSINV_A::ENABLE, + false => Ctsinv::Disable, + true => Ctsinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The CTS pin is active low"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CTSINV_A::DISABLE + *self == Ctsinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The CTS pin is active high"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CTSINV_A::ENABLE + *self == Ctsinv::Enable } } #[doc = "Field `CTSINV` writer - Clear-to-send Invert Enable"] -pub type CTSINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, CTSINV_A, O>; -impl<'a, const O: u8> CTSINV_W<'a, O> { +pub type CtsinvW<'a, REG> = crate::BitWriter<'a, REG, Ctsinv>; +impl<'a, REG> CtsinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The CTS pin is active low"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CTSINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ctsinv::Disable) } #[doc = "The CTS pin is active high"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CTSINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Ctsinv::Enable) } } -#[doc = "Field `CTSEN` reader - Clear-to-send Enable"] -pub type CTSEN_R = crate::BitReader; #[doc = "Clear-to-send Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CTSEN_A { +pub enum Ctsen { #[doc = "0: Ignore CTS"] - DISABLE = 0, + Disable = 0, #[doc = "1: Stop transmitting when CTS is inactive"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CTSEN_A) -> Self { + fn from(variant: Ctsen) -> Self { variant as u8 != 0 } } -impl CTSEN_R { +#[doc = "Field `CTSEN` reader - Clear-to-send Enable"] +pub type CtsenR = crate::BitReader; +impl CtsenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CTSEN_A { + pub const fn variant(&self) -> Ctsen { match self.bits { - false => CTSEN_A::DISABLE, - true => CTSEN_A::ENABLE, + false => Ctsen::Disable, + true => Ctsen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Ignore CTS"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CTSEN_A::DISABLE + *self == Ctsen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Stop transmitting when CTS is inactive"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CTSEN_A::ENABLE + *self == Ctsen::Enable } } #[doc = "Field `CTSEN` writer - Clear-to-send Enable"] -pub type CTSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, CTSEN_A, O>; -impl<'a, const O: u8> CTSEN_W<'a, O> { +pub type CtsenW<'a, REG> = crate::BitWriter<'a, REG, Ctsen>; +impl<'a, REG> CtsenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Ignore CTS"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CTSEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ctsen::Disable) } #[doc = "Stop transmitting when CTS is inactive"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CTSEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Ctsen::Enable) } } -#[doc = "Field `RTSINV` reader - Request-to-send Invert Enable"] -pub type RTSINV_R = crate::BitReader; #[doc = "Request-to-send Invert Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTSINV_A { +pub enum Rtsinv { #[doc = "0: The RTS pin is active low"] - DISABLE = 0, + Disable = 0, #[doc = "1: The RTS pin is active high"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTSINV_A) -> Self { + fn from(variant: Rtsinv) -> Self { variant as u8 != 0 } } -impl RTSINV_R { +#[doc = "Field `RTSINV` reader - Request-to-send Invert Enable"] +pub type RtsinvR = crate::BitReader; +impl RtsinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RTSINV_A { + pub const fn variant(&self) -> Rtsinv { match self.bits { - false => RTSINV_A::DISABLE, - true => RTSINV_A::ENABLE, + false => Rtsinv::Disable, + true => Rtsinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The RTS pin is active low"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RTSINV_A::DISABLE + *self == Rtsinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The RTS pin is active high"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RTSINV_A::ENABLE + *self == Rtsinv::Enable } } #[doc = "Field `RTSINV` writer - Request-to-send Invert Enable"] -pub type RTSINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, RTSINV_A, O>; -impl<'a, const O: u8> RTSINV_W<'a, O> { +pub type RtsinvW<'a, REG> = crate::BitWriter<'a, REG, Rtsinv>; +impl<'a, REG> RtsinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The RTS pin is active low"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RTSINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Rtsinv::Disable) } #[doc = "The RTS pin is active high"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RTSINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Rtsinv::Enable) } } -#[doc = "Field `RXTIMEOUT` reader - RX Timeout"] -pub type RXTIMEOUT_R = crate::FieldReader; #[doc = "RX Timeout\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RXTIMEOUT_A { +pub enum Rxtimeout { #[doc = "0: DISABLED"] - DISABLED = 0, + Disabled = 0, #[doc = "1: ONEFRAME"] - ONEFRAME = 1, + Oneframe = 1, #[doc = "2: TWOFRAMES"] - TWOFRAMES = 2, + Twoframes = 2, #[doc = "3: THREEFRAMES"] - THREEFRAMES = 3, + Threeframes = 3, #[doc = "4: FOURFRAMES"] - FOURFRAMES = 4, + Fourframes = 4, #[doc = "5: FIVEFRAMES"] - FIVEFRAMES = 5, + Fiveframes = 5, #[doc = "6: SIXFRAMES"] - SIXFRAMES = 6, + Sixframes = 6, #[doc = "7: SEVENFRAMES"] - SEVENFRAMES = 7, + Sevenframes = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RXTIMEOUT_A) -> Self { + fn from(variant: Rxtimeout) -> Self { variant as _ } } -impl RXTIMEOUT_R { +impl crate::FieldSpec for Rxtimeout { + type Ux = u8; +} +impl crate::IsEnum for Rxtimeout {} +#[doc = "Field `RXTIMEOUT` reader - RX Timeout"] +pub type RxtimeoutR = crate::FieldReader; +impl RxtimeoutR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RXTIMEOUT_A { + pub const fn variant(&self) -> Rxtimeout { match self.bits { - 0 => RXTIMEOUT_A::DISABLED, - 1 => RXTIMEOUT_A::ONEFRAME, - 2 => RXTIMEOUT_A::TWOFRAMES, - 3 => RXTIMEOUT_A::THREEFRAMES, - 4 => RXTIMEOUT_A::FOURFRAMES, - 5 => RXTIMEOUT_A::FIVEFRAMES, - 6 => RXTIMEOUT_A::SIXFRAMES, - 7 => RXTIMEOUT_A::SEVENFRAMES, + 0 => Rxtimeout::Disabled, + 1 => Rxtimeout::Oneframe, + 2 => Rxtimeout::Twoframes, + 3 => Rxtimeout::Threeframes, + 4 => Rxtimeout::Fourframes, + 5 => Rxtimeout::Fiveframes, + 6 => Rxtimeout::Sixframes, + 7 => Rxtimeout::Sevenframes, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "DISABLED"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == RXTIMEOUT_A::DISABLED + *self == Rxtimeout::Disabled } - #[doc = "Checks if the value of the field is `ONEFRAME`"] + #[doc = "ONEFRAME"] #[inline(always)] pub fn is_oneframe(&self) -> bool { - *self == RXTIMEOUT_A::ONEFRAME + *self == Rxtimeout::Oneframe } - #[doc = "Checks if the value of the field is `TWOFRAMES`"] + #[doc = "TWOFRAMES"] #[inline(always)] pub fn is_twoframes(&self) -> bool { - *self == RXTIMEOUT_A::TWOFRAMES + *self == Rxtimeout::Twoframes } - #[doc = "Checks if the value of the field is `THREEFRAMES`"] + #[doc = "THREEFRAMES"] #[inline(always)] pub fn is_threeframes(&self) -> bool { - *self == RXTIMEOUT_A::THREEFRAMES + *self == Rxtimeout::Threeframes } - #[doc = "Checks if the value of the field is `FOURFRAMES`"] + #[doc = "FOURFRAMES"] #[inline(always)] pub fn is_fourframes(&self) -> bool { - *self == RXTIMEOUT_A::FOURFRAMES + *self == Rxtimeout::Fourframes } - #[doc = "Checks if the value of the field is `FIVEFRAMES`"] + #[doc = "FIVEFRAMES"] #[inline(always)] pub fn is_fiveframes(&self) -> bool { - *self == RXTIMEOUT_A::FIVEFRAMES + *self == Rxtimeout::Fiveframes } - #[doc = "Checks if the value of the field is `SIXFRAMES`"] + #[doc = "SIXFRAMES"] #[inline(always)] pub fn is_sixframes(&self) -> bool { - *self == RXTIMEOUT_A::SIXFRAMES + *self == Rxtimeout::Sixframes } - #[doc = "Checks if the value of the field is `SEVENFRAMES`"] + #[doc = "SEVENFRAMES"] #[inline(always)] pub fn is_sevenframes(&self) -> bool { - *self == RXTIMEOUT_A::SEVENFRAMES + *self == Rxtimeout::Sevenframes } } #[doc = "Field `RXTIMEOUT` writer - RX Timeout"] -pub type RXTIMEOUT_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CFG1_SPEC, u8, RXTIMEOUT_A, 3, O>; -impl<'a, const O: u8> RXTIMEOUT_W<'a, O> { +pub type RxtimeoutW<'a, REG> = crate::FieldWriter<'a, REG, 3, Rxtimeout, crate::Safe>; +impl<'a, REG> RxtimeoutW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "DISABLED"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Disabled) } #[doc = "ONEFRAME"] #[inline(always)] - pub fn oneframe(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::ONEFRAME) + pub fn oneframe(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Oneframe) } #[doc = "TWOFRAMES"] #[inline(always)] - pub fn twoframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::TWOFRAMES) + pub fn twoframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Twoframes) } #[doc = "THREEFRAMES"] #[inline(always)] - pub fn threeframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::THREEFRAMES) + pub fn threeframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Threeframes) } #[doc = "FOURFRAMES"] #[inline(always)] - pub fn fourframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::FOURFRAMES) + pub fn fourframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Fourframes) } #[doc = "FIVEFRAMES"] #[inline(always)] - pub fn fiveframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::FIVEFRAMES) + pub fn fiveframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Fiveframes) } #[doc = "SIXFRAMES"] #[inline(always)] - pub fn sixframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::SIXFRAMES) + pub fn sixframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Sixframes) } #[doc = "SEVENFRAMES"] #[inline(always)] - pub fn sevenframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::SEVENFRAMES) + pub fn sevenframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Sevenframes) } } #[doc = "Field `TXDMAWU` reader - Transmitter DMA Wakeup"] -pub type TXDMAWU_R = crate::BitReader; +pub type TxdmawuR = crate::BitReader; #[doc = "Field `TXDMAWU` writer - Transmitter DMA Wakeup"] -pub type TXDMAWU_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, bool, O>; +pub type TxdmawuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXDMAWU` reader - Receiver DMA Wakeup"] -pub type RXDMAWU_R = crate::BitReader; +pub type RxdmawuR = crate::BitReader; #[doc = "Field `RXDMAWU` writer - Receiver DMA Wakeup"] -pub type RXDMAWU_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, bool, O>; +pub type RxdmawuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SFUBRX` reader - Start Frame Unblock Receiver"] -pub type SFUBRX_R = crate::BitReader; +pub type SfubrxR = crate::BitReader; #[doc = "Field `SFUBRX` writer - Start Frame Unblock Receiver"] -pub type SFUBRX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, bool, O>; +pub type SfubrxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXPRSEN` reader - PRS RX Enable"] -pub type RXPRSEN_R = crate::BitReader; +pub type RxprsenR = crate::BitReader; #[doc = "Field `RXPRSEN` writer - PRS RX Enable"] -pub type RXPRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, bool, O>; -#[doc = "Field `TXFIW` reader - TX FIFO Interrupt Watermark"] -pub type TXFIW_R = crate::FieldReader; +pub type RxprsenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "TX FIFO Interrupt Watermark\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TXFIW_A { +pub enum Txfiw { #[doc = "0: TXFL status flag and IF are set when the TX FIFO has space for at least one more frame."] - ONEFRAME = 0, + Oneframe = 0, #[doc = "1: TXFL status flag and IF are set when the TX FIFO has space for at least two more frames."] - TWOFRAMES = 1, + Twoframes = 1, #[doc = "2: TXFL status flag and IF are set when the TX FIFO has space for at least three more frames."] - THREEFRAMES = 2, + Threeframes = 2, #[doc = "3: TXFL status flag and IF are set when the TX FIFO has space for at least four more frames."] - FOURFRAMES = 3, + Fourframes = 3, #[doc = "4: TXFL status flag and IF are set when the TX FIFO has space for at least five more frames."] - FIVEFRAMES = 4, + Fiveframes = 4, #[doc = "5: TXFL status flag and IF are set when the TX FIFO has space for at least six more frames."] - SIXFRAMES = 5, + Sixframes = 5, #[doc = "6: TXFL status flag and IF are set when the TX FIFO has space for at least seven more frames."] - SEVENFRAMES = 6, + Sevenframes = 6, #[doc = "7: TXFL status flag and IF are set when the TX FIFO has space for at least eight more frames."] - EIGHTFRAMES = 7, + Eightframes = 7, #[doc = "8: TXFL status flag and IF are set when the TX FIFO has space for at least nine more frames."] - NINEFRAMES = 8, + Nineframes = 8, #[doc = "9: TXFL status flag and IF are set when the TX FIFO has space for at least ten more frames."] - TENFRAMES = 9, + Tenframes = 9, #[doc = "10: TXFL status flag and IF are set when the TX FIFO has space for at least eleven more frames."] - ELEVENFRAMES = 10, + Elevenframes = 10, #[doc = "11: TXFL status flag and IF are set when the TX FIFO has space for at least twelve more frames."] - TWELVEFRAMES = 11, + Twelveframes = 11, #[doc = "12: TXFL status flag and IF are set when the TX FIFO has space for at least thriteen more frames."] - THIRTEENFRAMES = 12, + Thirteenframes = 12, #[doc = "13: TXFL status flag and IF are set when the TX FIFO has space for at least fourteen more frames."] - FOURTEENFRAMES = 13, + Fourteenframes = 13, #[doc = "14: TXFL status flag and IF are set when the TX FIFO has space for at least fifteen more frames."] - FIFTEENFRAMES = 14, + Fifteenframes = 14, #[doc = "15: TXFL status flag and IF are set when the TX FIFO has space for at least sixteen more frames."] - SIXTEENFRAMES = 15, + Sixteenframes = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TXFIW_A) -> Self { + fn from(variant: Txfiw) -> Self { variant as _ } } -impl TXFIW_R { +impl crate::FieldSpec for Txfiw { + type Ux = u8; +} +impl crate::IsEnum for Txfiw {} +#[doc = "Field `TXFIW` reader - TX FIFO Interrupt Watermark"] +pub type TxfiwR = crate::FieldReader; +impl TxfiwR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXFIW_A { + pub const fn variant(&self) -> Txfiw { match self.bits { - 0 => TXFIW_A::ONEFRAME, - 1 => TXFIW_A::TWOFRAMES, - 2 => TXFIW_A::THREEFRAMES, - 3 => TXFIW_A::FOURFRAMES, - 4 => TXFIW_A::FIVEFRAMES, - 5 => TXFIW_A::SIXFRAMES, - 6 => TXFIW_A::SEVENFRAMES, - 7 => TXFIW_A::EIGHTFRAMES, - 8 => TXFIW_A::NINEFRAMES, - 9 => TXFIW_A::TENFRAMES, - 10 => TXFIW_A::ELEVENFRAMES, - 11 => TXFIW_A::TWELVEFRAMES, - 12 => TXFIW_A::THIRTEENFRAMES, - 13 => TXFIW_A::FOURTEENFRAMES, - 14 => TXFIW_A::FIFTEENFRAMES, - 15 => TXFIW_A::SIXTEENFRAMES, + 0 => Txfiw::Oneframe, + 1 => Txfiw::Twoframes, + 2 => Txfiw::Threeframes, + 3 => Txfiw::Fourframes, + 4 => Txfiw::Fiveframes, + 5 => Txfiw::Sixframes, + 6 => Txfiw::Sevenframes, + 7 => Txfiw::Eightframes, + 8 => Txfiw::Nineframes, + 9 => Txfiw::Tenframes, + 10 => Txfiw::Elevenframes, + 11 => Txfiw::Twelveframes, + 12 => Txfiw::Thirteenframes, + 13 => Txfiw::Fourteenframes, + 14 => Txfiw::Fifteenframes, + 15 => Txfiw::Sixteenframes, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONEFRAME`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least one more frame."] #[inline(always)] pub fn is_oneframe(&self) -> bool { - *self == TXFIW_A::ONEFRAME + *self == Txfiw::Oneframe } - #[doc = "Checks if the value of the field is `TWOFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least two more frames."] #[inline(always)] pub fn is_twoframes(&self) -> bool { - *self == TXFIW_A::TWOFRAMES + *self == Txfiw::Twoframes } - #[doc = "Checks if the value of the field is `THREEFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least three more frames."] #[inline(always)] pub fn is_threeframes(&self) -> bool { - *self == TXFIW_A::THREEFRAMES + *self == Txfiw::Threeframes } - #[doc = "Checks if the value of the field is `FOURFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least four more frames."] #[inline(always)] pub fn is_fourframes(&self) -> bool { - *self == TXFIW_A::FOURFRAMES + *self == Txfiw::Fourframes } - #[doc = "Checks if the value of the field is `FIVEFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least five more frames."] #[inline(always)] pub fn is_fiveframes(&self) -> bool { - *self == TXFIW_A::FIVEFRAMES + *self == Txfiw::Fiveframes } - #[doc = "Checks if the value of the field is `SIXFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least six more frames."] #[inline(always)] pub fn is_sixframes(&self) -> bool { - *self == TXFIW_A::SIXFRAMES + *self == Txfiw::Sixframes } - #[doc = "Checks if the value of the field is `SEVENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least seven more frames."] #[inline(always)] pub fn is_sevenframes(&self) -> bool { - *self == TXFIW_A::SEVENFRAMES + *self == Txfiw::Sevenframes } - #[doc = "Checks if the value of the field is `EIGHTFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least eight more frames."] #[inline(always)] pub fn is_eightframes(&self) -> bool { - *self == TXFIW_A::EIGHTFRAMES + *self == Txfiw::Eightframes } - #[doc = "Checks if the value of the field is `NINEFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least nine more frames."] #[inline(always)] pub fn is_nineframes(&self) -> bool { - *self == TXFIW_A::NINEFRAMES + *self == Txfiw::Nineframes } - #[doc = "Checks if the value of the field is `TENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least ten more frames."] #[inline(always)] pub fn is_tenframes(&self) -> bool { - *self == TXFIW_A::TENFRAMES + *self == Txfiw::Tenframes } - #[doc = "Checks if the value of the field is `ELEVENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least eleven more frames."] #[inline(always)] pub fn is_elevenframes(&self) -> bool { - *self == TXFIW_A::ELEVENFRAMES + *self == Txfiw::Elevenframes } - #[doc = "Checks if the value of the field is `TWELVEFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least twelve more frames."] #[inline(always)] pub fn is_twelveframes(&self) -> bool { - *self == TXFIW_A::TWELVEFRAMES + *self == Txfiw::Twelveframes } - #[doc = "Checks if the value of the field is `THIRTEENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least thriteen more frames."] #[inline(always)] pub fn is_thirteenframes(&self) -> bool { - *self == TXFIW_A::THIRTEENFRAMES + *self == Txfiw::Thirteenframes } - #[doc = "Checks if the value of the field is `FOURTEENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least fourteen more frames."] #[inline(always)] pub fn is_fourteenframes(&self) -> bool { - *self == TXFIW_A::FOURTEENFRAMES + *self == Txfiw::Fourteenframes } - #[doc = "Checks if the value of the field is `FIFTEENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least fifteen more frames."] #[inline(always)] pub fn is_fifteenframes(&self) -> bool { - *self == TXFIW_A::FIFTEENFRAMES + *self == Txfiw::Fifteenframes } - #[doc = "Checks if the value of the field is `SIXTEENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least sixteen more frames."] #[inline(always)] pub fn is_sixteenframes(&self) -> bool { - *self == TXFIW_A::SIXTEENFRAMES + *self == Txfiw::Sixteenframes } } #[doc = "Field `TXFIW` writer - TX FIFO Interrupt Watermark"] -pub type TXFIW_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG1_SPEC, u8, TXFIW_A, 4, O>; -impl<'a, const O: u8> TXFIW_W<'a, O> { +pub type TxfiwW<'a, REG> = crate::FieldWriter<'a, REG, 4, Txfiw, crate::Safe>; +impl<'a, REG> TxfiwW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least one more frame."] #[inline(always)] - pub fn oneframe(self) -> &'a mut W { - self.variant(TXFIW_A::ONEFRAME) + pub fn oneframe(self) -> &'a mut crate::W { + self.variant(Txfiw::Oneframe) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least two more frames."] #[inline(always)] - pub fn twoframes(self) -> &'a mut W { - self.variant(TXFIW_A::TWOFRAMES) + pub fn twoframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Twoframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least three more frames."] #[inline(always)] - pub fn threeframes(self) -> &'a mut W { - self.variant(TXFIW_A::THREEFRAMES) + pub fn threeframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Threeframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least four more frames."] #[inline(always)] - pub fn fourframes(self) -> &'a mut W { - self.variant(TXFIW_A::FOURFRAMES) + pub fn fourframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Fourframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least five more frames."] #[inline(always)] - pub fn fiveframes(self) -> &'a mut W { - self.variant(TXFIW_A::FIVEFRAMES) + pub fn fiveframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Fiveframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least six more frames."] #[inline(always)] - pub fn sixframes(self) -> &'a mut W { - self.variant(TXFIW_A::SIXFRAMES) + pub fn sixframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Sixframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least seven more frames."] #[inline(always)] - pub fn sevenframes(self) -> &'a mut W { - self.variant(TXFIW_A::SEVENFRAMES) + pub fn sevenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Sevenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least eight more frames."] #[inline(always)] - pub fn eightframes(self) -> &'a mut W { - self.variant(TXFIW_A::EIGHTFRAMES) + pub fn eightframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Eightframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least nine more frames."] #[inline(always)] - pub fn nineframes(self) -> &'a mut W { - self.variant(TXFIW_A::NINEFRAMES) + pub fn nineframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Nineframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least ten more frames."] #[inline(always)] - pub fn tenframes(self) -> &'a mut W { - self.variant(TXFIW_A::TENFRAMES) + pub fn tenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Tenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least eleven more frames."] #[inline(always)] - pub fn elevenframes(self) -> &'a mut W { - self.variant(TXFIW_A::ELEVENFRAMES) + pub fn elevenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Elevenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least twelve more frames."] #[inline(always)] - pub fn twelveframes(self) -> &'a mut W { - self.variant(TXFIW_A::TWELVEFRAMES) + pub fn twelveframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Twelveframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least thriteen more frames."] #[inline(always)] - pub fn thirteenframes(self) -> &'a mut W { - self.variant(TXFIW_A::THIRTEENFRAMES) + pub fn thirteenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Thirteenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least fourteen more frames."] #[inline(always)] - pub fn fourteenframes(self) -> &'a mut W { - self.variant(TXFIW_A::FOURTEENFRAMES) + pub fn fourteenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Fourteenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least fifteen more frames."] #[inline(always)] - pub fn fifteenframes(self) -> &'a mut W { - self.variant(TXFIW_A::FIFTEENFRAMES) + pub fn fifteenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Fifteenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least sixteen more frames."] #[inline(always)] - pub fn sixteenframes(self) -> &'a mut W { - self.variant(TXFIW_A::SIXTEENFRAMES) + pub fn sixteenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Sixteenframes) } } -#[doc = "Field `RTSRXFW` reader - Request-to-send RX FIFO Watermark"] -pub type RTSRXFW_R = crate::FieldReader; #[doc = "Request-to-send RX FIFO Watermark\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RTSRXFW_A { +pub enum Rtsrxfw { #[doc = "0: RTS is set if there is space for at least one more frame in the RX FIFO."] - ONEFRAME = 0, + Oneframe = 0, #[doc = "1: RTS is set if there is space for at least two more frames in the RX FIFO."] - TWOFRAMES = 1, + Twoframes = 1, #[doc = "2: RTS is set if there is space for at least three more frames in the RX FIFO."] - THREEFRAMES = 2, + Threeframes = 2, #[doc = "3: RTS is set if there is space for four more frames in the RX FIFO."] - FOURFRAMES = 3, + Fourframes = 3, #[doc = "4: RTS is set if there is space for five more frames in the RX FIFO."] - FIVEFRAMES = 4, + Fiveframes = 4, #[doc = "5: RTS is set if there is space for six more frames in the RX FIFO."] - SIXFRAMES = 5, + Sixframes = 5, #[doc = "6: RTS is set if there is space for seven more frames in the RX FIFO."] - SEVENFRAMES = 6, + Sevenframes = 6, #[doc = "7: RTS is set if there is space for eight more frames in the RX FIFO."] - EIGHTFRAMES = 7, + Eightframes = 7, #[doc = "8: RTS is set if there is space for nine more frames in the RX FIFO."] - NINEFRAMES = 8, + Nineframes = 8, #[doc = "9: RTS is set if there is space for ten more frames in the RX FIFO."] - TENFRAMES = 9, + Tenframes = 9, #[doc = "10: RTS is set if there is space for eleven more frames in the RX FIFO."] - ELEVENFRAMES = 10, + Elevenframes = 10, #[doc = "11: RTS is set if there is space for twelve more frames in the RX FIFO."] - TWELVEFRAMES = 11, + Twelveframes = 11, #[doc = "12: RTS is set if there is space for thirteen more frames in the RX FIFO."] - THIRTEENFRAMES = 12, + Thirteenframes = 12, #[doc = "13: RTS is set if there is space for fourteen more frames in the RX FIFO."] - FOURTEENFRAMES = 13, + Fourteenframes = 13, #[doc = "14: RTS is set if there is space for fifteen more frames in the RX FIFO."] - FIFTEENFRAMES = 14, + Fifteenframes = 14, #[doc = "15: RTS is set if there is space for sixteen more frames in the RX FIFO."] - SIXTEENFRAMES = 15, + Sixteenframes = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RTSRXFW_A) -> Self { + fn from(variant: Rtsrxfw) -> Self { variant as _ } } -impl RTSRXFW_R { +impl crate::FieldSpec for Rtsrxfw { + type Ux = u8; +} +impl crate::IsEnum for Rtsrxfw {} +#[doc = "Field `RTSRXFW` reader - Request-to-send RX FIFO Watermark"] +pub type RtsrxfwR = crate::FieldReader; +impl RtsrxfwR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RTSRXFW_A { + pub const fn variant(&self) -> Rtsrxfw { match self.bits { - 0 => RTSRXFW_A::ONEFRAME, - 1 => RTSRXFW_A::TWOFRAMES, - 2 => RTSRXFW_A::THREEFRAMES, - 3 => RTSRXFW_A::FOURFRAMES, - 4 => RTSRXFW_A::FIVEFRAMES, - 5 => RTSRXFW_A::SIXFRAMES, - 6 => RTSRXFW_A::SEVENFRAMES, - 7 => RTSRXFW_A::EIGHTFRAMES, - 8 => RTSRXFW_A::NINEFRAMES, - 9 => RTSRXFW_A::TENFRAMES, - 10 => RTSRXFW_A::ELEVENFRAMES, - 11 => RTSRXFW_A::TWELVEFRAMES, - 12 => RTSRXFW_A::THIRTEENFRAMES, - 13 => RTSRXFW_A::FOURTEENFRAMES, - 14 => RTSRXFW_A::FIFTEENFRAMES, - 15 => RTSRXFW_A::SIXTEENFRAMES, + 0 => Rtsrxfw::Oneframe, + 1 => Rtsrxfw::Twoframes, + 2 => Rtsrxfw::Threeframes, + 3 => Rtsrxfw::Fourframes, + 4 => Rtsrxfw::Fiveframes, + 5 => Rtsrxfw::Sixframes, + 6 => Rtsrxfw::Sevenframes, + 7 => Rtsrxfw::Eightframes, + 8 => Rtsrxfw::Nineframes, + 9 => Rtsrxfw::Tenframes, + 10 => Rtsrxfw::Elevenframes, + 11 => Rtsrxfw::Twelveframes, + 12 => Rtsrxfw::Thirteenframes, + 13 => Rtsrxfw::Fourteenframes, + 14 => Rtsrxfw::Fifteenframes, + 15 => Rtsrxfw::Sixteenframes, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONEFRAME`"] + #[doc = "RTS is set if there is space for at least one more frame in the RX FIFO."] #[inline(always)] pub fn is_oneframe(&self) -> bool { - *self == RTSRXFW_A::ONEFRAME + *self == Rtsrxfw::Oneframe } - #[doc = "Checks if the value of the field is `TWOFRAMES`"] + #[doc = "RTS is set if there is space for at least two more frames in the RX FIFO."] #[inline(always)] pub fn is_twoframes(&self) -> bool { - *self == RTSRXFW_A::TWOFRAMES + *self == Rtsrxfw::Twoframes } - #[doc = "Checks if the value of the field is `THREEFRAMES`"] + #[doc = "RTS is set if there is space for at least three more frames in the RX FIFO."] #[inline(always)] pub fn is_threeframes(&self) -> bool { - *self == RTSRXFW_A::THREEFRAMES + *self == Rtsrxfw::Threeframes } - #[doc = "Checks if the value of the field is `FOURFRAMES`"] + #[doc = "RTS is set if there is space for four more frames in the RX FIFO."] #[inline(always)] pub fn is_fourframes(&self) -> bool { - *self == RTSRXFW_A::FOURFRAMES + *self == Rtsrxfw::Fourframes } - #[doc = "Checks if the value of the field is `FIVEFRAMES`"] + #[doc = "RTS is set if there is space for five more frames in the RX FIFO."] #[inline(always)] pub fn is_fiveframes(&self) -> bool { - *self == RTSRXFW_A::FIVEFRAMES + *self == Rtsrxfw::Fiveframes } - #[doc = "Checks if the value of the field is `SIXFRAMES`"] + #[doc = "RTS is set if there is space for six more frames in the RX FIFO."] #[inline(always)] pub fn is_sixframes(&self) -> bool { - *self == RTSRXFW_A::SIXFRAMES + *self == Rtsrxfw::Sixframes } - #[doc = "Checks if the value of the field is `SEVENFRAMES`"] + #[doc = "RTS is set if there is space for seven more frames in the RX FIFO."] #[inline(always)] pub fn is_sevenframes(&self) -> bool { - *self == RTSRXFW_A::SEVENFRAMES + *self == Rtsrxfw::Sevenframes } - #[doc = "Checks if the value of the field is `EIGHTFRAMES`"] + #[doc = "RTS is set if there is space for eight more frames in the RX FIFO."] #[inline(always)] pub fn is_eightframes(&self) -> bool { - *self == RTSRXFW_A::EIGHTFRAMES + *self == Rtsrxfw::Eightframes } - #[doc = "Checks if the value of the field is `NINEFRAMES`"] + #[doc = "RTS is set if there is space for nine more frames in the RX FIFO."] #[inline(always)] pub fn is_nineframes(&self) -> bool { - *self == RTSRXFW_A::NINEFRAMES + *self == Rtsrxfw::Nineframes } - #[doc = "Checks if the value of the field is `TENFRAMES`"] + #[doc = "RTS is set if there is space for ten more frames in the RX FIFO."] #[inline(always)] pub fn is_tenframes(&self) -> bool { - *self == RTSRXFW_A::TENFRAMES + *self == Rtsrxfw::Tenframes } - #[doc = "Checks if the value of the field is `ELEVENFRAMES`"] + #[doc = "RTS is set if there is space for eleven more frames in the RX FIFO."] #[inline(always)] pub fn is_elevenframes(&self) -> bool { - *self == RTSRXFW_A::ELEVENFRAMES + *self == Rtsrxfw::Elevenframes } - #[doc = "Checks if the value of the field is `TWELVEFRAMES`"] + #[doc = "RTS is set if there is space for twelve more frames in the RX FIFO."] #[inline(always)] pub fn is_twelveframes(&self) -> bool { - *self == RTSRXFW_A::TWELVEFRAMES + *self == Rtsrxfw::Twelveframes } - #[doc = "Checks if the value of the field is `THIRTEENFRAMES`"] + #[doc = "RTS is set if there is space for thirteen more frames in the RX FIFO."] #[inline(always)] pub fn is_thirteenframes(&self) -> bool { - *self == RTSRXFW_A::THIRTEENFRAMES + *self == Rtsrxfw::Thirteenframes } - #[doc = "Checks if the value of the field is `FOURTEENFRAMES`"] + #[doc = "RTS is set if there is space for fourteen more frames in the RX FIFO."] #[inline(always)] pub fn is_fourteenframes(&self) -> bool { - *self == RTSRXFW_A::FOURTEENFRAMES + *self == Rtsrxfw::Fourteenframes } - #[doc = "Checks if the value of the field is `FIFTEENFRAMES`"] + #[doc = "RTS is set if there is space for fifteen more frames in the RX FIFO."] #[inline(always)] pub fn is_fifteenframes(&self) -> bool { - *self == RTSRXFW_A::FIFTEENFRAMES + *self == Rtsrxfw::Fifteenframes } - #[doc = "Checks if the value of the field is `SIXTEENFRAMES`"] + #[doc = "RTS is set if there is space for sixteen more frames in the RX FIFO."] #[inline(always)] pub fn is_sixteenframes(&self) -> bool { - *self == RTSRXFW_A::SIXTEENFRAMES + *self == Rtsrxfw::Sixteenframes } } #[doc = "Field `RTSRXFW` writer - Request-to-send RX FIFO Watermark"] -pub type RTSRXFW_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CFG1_SPEC, u8, RTSRXFW_A, 4, O>; -impl<'a, const O: u8> RTSRXFW_W<'a, O> { +pub type RtsrxfwW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rtsrxfw, crate::Safe>; +impl<'a, REG> RtsrxfwW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "RTS is set if there is space for at least one more frame in the RX FIFO."] #[inline(always)] - pub fn oneframe(self) -> &'a mut W { - self.variant(RTSRXFW_A::ONEFRAME) + pub fn oneframe(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Oneframe) } #[doc = "RTS is set if there is space for at least two more frames in the RX FIFO."] #[inline(always)] - pub fn twoframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::TWOFRAMES) + pub fn twoframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Twoframes) } #[doc = "RTS is set if there is space for at least three more frames in the RX FIFO."] #[inline(always)] - pub fn threeframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::THREEFRAMES) + pub fn threeframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Threeframes) } #[doc = "RTS is set if there is space for four more frames in the RX FIFO."] #[inline(always)] - pub fn fourframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::FOURFRAMES) + pub fn fourframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Fourframes) } #[doc = "RTS is set if there is space for five more frames in the RX FIFO."] #[inline(always)] - pub fn fiveframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::FIVEFRAMES) + pub fn fiveframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Fiveframes) } #[doc = "RTS is set if there is space for six more frames in the RX FIFO."] #[inline(always)] - pub fn sixframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::SIXFRAMES) + pub fn sixframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Sixframes) } #[doc = "RTS is set if there is space for seven more frames in the RX FIFO."] #[inline(always)] - pub fn sevenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::SEVENFRAMES) + pub fn sevenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Sevenframes) } #[doc = "RTS is set if there is space for eight more frames in the RX FIFO."] #[inline(always)] - pub fn eightframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::EIGHTFRAMES) + pub fn eightframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Eightframes) } #[doc = "RTS is set if there is space for nine more frames in the RX FIFO."] #[inline(always)] - pub fn nineframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::NINEFRAMES) + pub fn nineframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Nineframes) } #[doc = "RTS is set if there is space for ten more frames in the RX FIFO."] #[inline(always)] - pub fn tenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::TENFRAMES) + pub fn tenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Tenframes) } #[doc = "RTS is set if there is space for eleven more frames in the RX FIFO."] #[inline(always)] - pub fn elevenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::ELEVENFRAMES) + pub fn elevenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Elevenframes) } #[doc = "RTS is set if there is space for twelve more frames in the RX FIFO."] #[inline(always)] - pub fn twelveframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::TWELVEFRAMES) + pub fn twelveframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Twelveframes) } #[doc = "RTS is set if there is space for thirteen more frames in the RX FIFO."] #[inline(always)] - pub fn thirteenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::THIRTEENFRAMES) + pub fn thirteenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Thirteenframes) } #[doc = "RTS is set if there is space for fourteen more frames in the RX FIFO."] #[inline(always)] - pub fn fourteenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::FOURTEENFRAMES) + pub fn fourteenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Fourteenframes) } #[doc = "RTS is set if there is space for fifteen more frames in the RX FIFO."] #[inline(always)] - pub fn fifteenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::FIFTEENFRAMES) + pub fn fifteenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Fifteenframes) } #[doc = "RTS is set if there is space for sixteen more frames in the RX FIFO."] #[inline(always)] - pub fn sixteenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::SIXTEENFRAMES) + pub fn sixteenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Sixteenframes) } } -#[doc = "Field `RXFIW` reader - RX FIFO Interrupt Watermark"] -pub type RXFIW_R = crate::FieldReader; #[doc = "RX FIFO Interrupt Watermark\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RXFIW_A { +pub enum Rxfiw { #[doc = "0: RXFL status flag and IF are set when the RX FIFO has at least one frame in it."] - ONEFRAME = 0, + Oneframe = 0, #[doc = "1: RXFL status flag and IF are set when the RX FIFO has at least two frames in it."] - TWOFRAMES = 1, + Twoframes = 1, #[doc = "2: RXFL status flag and IF are set when the RX FIFO has at least three frames in it."] - THREEFRAMES = 2, + Threeframes = 2, #[doc = "3: RXFL status flag and IF are set when the RX FIFO has at least four frames in it."] - FOURFRAMES = 3, + Fourframes = 3, #[doc = "4: RXFL status flag and IF are set when the RX FIFO has at least five frames in it."] - FIVEFRAMES = 4, + Fiveframes = 4, #[doc = "5: RXFL status flag and IF are set when the RX FIFO has at least six frames in it."] - SIXFRAMES = 5, + Sixframes = 5, #[doc = "6: RXFL status flag and IF are set when the RX FIFO has at least seven frames in it."] - SEVENFRAMES = 6, + Sevenframes = 6, #[doc = "7: RXFL status flag and IF are set when the RX FIFO has at least eight frames in it."] - EIGHTFRAMES = 7, + Eightframes = 7, #[doc = "8: RXFL status flag and IF are set when the RX FIFO has at least nine frames in it."] - NINEFRAMES = 8, + Nineframes = 8, #[doc = "9: RXFL status flag and IF are set when the RX FIFO has at least ten frames in it."] - TENFRAMES = 9, + Tenframes = 9, #[doc = "10: RXFL status flag and IF are set when the RX FIFO has at least eleven frames in it."] - ELEVENFRAMES = 10, + Elevenframes = 10, #[doc = "11: RXFL status flag and IF are set when the RX FIFO has at least twelve frames in it."] - TWELVEFRAMES = 11, + Twelveframes = 11, #[doc = "12: RXFL status flag and IF are set when the RX FIFO has at least thriteen frames in it."] - THIRTEENFRAMES = 12, + Thirteenframes = 12, #[doc = "13: RXFL status flag and IF are set when the RX FIFO has at least fourteen frames in it."] - FOURTEENFRAMES = 13, + Fourteenframes = 13, #[doc = "14: RXFL status flag and IF are set when the RX FIFO has at least fifteen frames in it."] - FIFTEENFRAMES = 14, + Fifteenframes = 14, #[doc = "15: RXFL status flag and IF are set when the RX FIFO has at least sixteen frames in it."] - SIXTEENFRAMES = 15, + Sixteenframes = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RXFIW_A) -> Self { + fn from(variant: Rxfiw) -> Self { variant as _ } } -impl RXFIW_R { +impl crate::FieldSpec for Rxfiw { + type Ux = u8; +} +impl crate::IsEnum for Rxfiw {} +#[doc = "Field `RXFIW` reader - RX FIFO Interrupt Watermark"] +pub type RxfiwR = crate::FieldReader; +impl RxfiwR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RXFIW_A { + pub const fn variant(&self) -> Rxfiw { match self.bits { - 0 => RXFIW_A::ONEFRAME, - 1 => RXFIW_A::TWOFRAMES, - 2 => RXFIW_A::THREEFRAMES, - 3 => RXFIW_A::FOURFRAMES, - 4 => RXFIW_A::FIVEFRAMES, - 5 => RXFIW_A::SIXFRAMES, - 6 => RXFIW_A::SEVENFRAMES, - 7 => RXFIW_A::EIGHTFRAMES, - 8 => RXFIW_A::NINEFRAMES, - 9 => RXFIW_A::TENFRAMES, - 10 => RXFIW_A::ELEVENFRAMES, - 11 => RXFIW_A::TWELVEFRAMES, - 12 => RXFIW_A::THIRTEENFRAMES, - 13 => RXFIW_A::FOURTEENFRAMES, - 14 => RXFIW_A::FIFTEENFRAMES, - 15 => RXFIW_A::SIXTEENFRAMES, + 0 => Rxfiw::Oneframe, + 1 => Rxfiw::Twoframes, + 2 => Rxfiw::Threeframes, + 3 => Rxfiw::Fourframes, + 4 => Rxfiw::Fiveframes, + 5 => Rxfiw::Sixframes, + 6 => Rxfiw::Sevenframes, + 7 => Rxfiw::Eightframes, + 8 => Rxfiw::Nineframes, + 9 => Rxfiw::Tenframes, + 10 => Rxfiw::Elevenframes, + 11 => Rxfiw::Twelveframes, + 12 => Rxfiw::Thirteenframes, + 13 => Rxfiw::Fourteenframes, + 14 => Rxfiw::Fifteenframes, + 15 => Rxfiw::Sixteenframes, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONEFRAME`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least one frame in it."] #[inline(always)] pub fn is_oneframe(&self) -> bool { - *self == RXFIW_A::ONEFRAME + *self == Rxfiw::Oneframe } - #[doc = "Checks if the value of the field is `TWOFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least two frames in it."] #[inline(always)] pub fn is_twoframes(&self) -> bool { - *self == RXFIW_A::TWOFRAMES + *self == Rxfiw::Twoframes } - #[doc = "Checks if the value of the field is `THREEFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least three frames in it."] #[inline(always)] pub fn is_threeframes(&self) -> bool { - *self == RXFIW_A::THREEFRAMES + *self == Rxfiw::Threeframes } - #[doc = "Checks if the value of the field is `FOURFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least four frames in it."] #[inline(always)] pub fn is_fourframes(&self) -> bool { - *self == RXFIW_A::FOURFRAMES + *self == Rxfiw::Fourframes } - #[doc = "Checks if the value of the field is `FIVEFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least five frames in it."] #[inline(always)] pub fn is_fiveframes(&self) -> bool { - *self == RXFIW_A::FIVEFRAMES + *self == Rxfiw::Fiveframes } - #[doc = "Checks if the value of the field is `SIXFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least six frames in it."] #[inline(always)] pub fn is_sixframes(&self) -> bool { - *self == RXFIW_A::SIXFRAMES + *self == Rxfiw::Sixframes } - #[doc = "Checks if the value of the field is `SEVENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least seven frames in it."] #[inline(always)] pub fn is_sevenframes(&self) -> bool { - *self == RXFIW_A::SEVENFRAMES + *self == Rxfiw::Sevenframes } - #[doc = "Checks if the value of the field is `EIGHTFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least eight frames in it."] #[inline(always)] pub fn is_eightframes(&self) -> bool { - *self == RXFIW_A::EIGHTFRAMES + *self == Rxfiw::Eightframes } - #[doc = "Checks if the value of the field is `NINEFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least nine frames in it."] #[inline(always)] pub fn is_nineframes(&self) -> bool { - *self == RXFIW_A::NINEFRAMES + *self == Rxfiw::Nineframes } - #[doc = "Checks if the value of the field is `TENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least ten frames in it."] #[inline(always)] pub fn is_tenframes(&self) -> bool { - *self == RXFIW_A::TENFRAMES + *self == Rxfiw::Tenframes } - #[doc = "Checks if the value of the field is `ELEVENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least eleven frames in it."] #[inline(always)] pub fn is_elevenframes(&self) -> bool { - *self == RXFIW_A::ELEVENFRAMES + *self == Rxfiw::Elevenframes } - #[doc = "Checks if the value of the field is `TWELVEFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least twelve frames in it."] #[inline(always)] pub fn is_twelveframes(&self) -> bool { - *self == RXFIW_A::TWELVEFRAMES + *self == Rxfiw::Twelveframes } - #[doc = "Checks if the value of the field is `THIRTEENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least thriteen frames in it."] #[inline(always)] pub fn is_thirteenframes(&self) -> bool { - *self == RXFIW_A::THIRTEENFRAMES + *self == Rxfiw::Thirteenframes } - #[doc = "Checks if the value of the field is `FOURTEENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least fourteen frames in it."] #[inline(always)] pub fn is_fourteenframes(&self) -> bool { - *self == RXFIW_A::FOURTEENFRAMES + *self == Rxfiw::Fourteenframes } - #[doc = "Checks if the value of the field is `FIFTEENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least fifteen frames in it."] #[inline(always)] pub fn is_fifteenframes(&self) -> bool { - *self == RXFIW_A::FIFTEENFRAMES + *self == Rxfiw::Fifteenframes } - #[doc = "Checks if the value of the field is `SIXTEENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least sixteen frames in it."] #[inline(always)] pub fn is_sixteenframes(&self) -> bool { - *self == RXFIW_A::SIXTEENFRAMES + *self == Rxfiw::Sixteenframes } } #[doc = "Field `RXFIW` writer - RX FIFO Interrupt Watermark"] -pub type RXFIW_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG1_SPEC, u8, RXFIW_A, 4, O>; -impl<'a, const O: u8> RXFIW_W<'a, O> { +pub type RxfiwW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rxfiw, crate::Safe>; +impl<'a, REG> RxfiwW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "RXFL status flag and IF are set when the RX FIFO has at least one frame in it."] #[inline(always)] - pub fn oneframe(self) -> &'a mut W { - self.variant(RXFIW_A::ONEFRAME) + pub fn oneframe(self) -> &'a mut crate::W { + self.variant(Rxfiw::Oneframe) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least two frames in it."] #[inline(always)] - pub fn twoframes(self) -> &'a mut W { - self.variant(RXFIW_A::TWOFRAMES) + pub fn twoframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Twoframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least three frames in it."] #[inline(always)] - pub fn threeframes(self) -> &'a mut W { - self.variant(RXFIW_A::THREEFRAMES) + pub fn threeframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Threeframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least four frames in it."] #[inline(always)] - pub fn fourframes(self) -> &'a mut W { - self.variant(RXFIW_A::FOURFRAMES) + pub fn fourframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Fourframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least five frames in it."] #[inline(always)] - pub fn fiveframes(self) -> &'a mut W { - self.variant(RXFIW_A::FIVEFRAMES) + pub fn fiveframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Fiveframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least six frames in it."] #[inline(always)] - pub fn sixframes(self) -> &'a mut W { - self.variant(RXFIW_A::SIXFRAMES) + pub fn sixframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Sixframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least seven frames in it."] #[inline(always)] - pub fn sevenframes(self) -> &'a mut W { - self.variant(RXFIW_A::SEVENFRAMES) + pub fn sevenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Sevenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least eight frames in it."] #[inline(always)] - pub fn eightframes(self) -> &'a mut W { - self.variant(RXFIW_A::EIGHTFRAMES) + pub fn eightframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Eightframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least nine frames in it."] #[inline(always)] - pub fn nineframes(self) -> &'a mut W { - self.variant(RXFIW_A::NINEFRAMES) + pub fn nineframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Nineframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least ten frames in it."] #[inline(always)] - pub fn tenframes(self) -> &'a mut W { - self.variant(RXFIW_A::TENFRAMES) + pub fn tenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Tenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least eleven frames in it."] #[inline(always)] - pub fn elevenframes(self) -> &'a mut W { - self.variant(RXFIW_A::ELEVENFRAMES) + pub fn elevenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Elevenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least twelve frames in it."] #[inline(always)] - pub fn twelveframes(self) -> &'a mut W { - self.variant(RXFIW_A::TWELVEFRAMES) + pub fn twelveframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Twelveframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least thriteen frames in it."] #[inline(always)] - pub fn thirteenframes(self) -> &'a mut W { - self.variant(RXFIW_A::THIRTEENFRAMES) + pub fn thirteenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Thirteenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least fourteen frames in it."] #[inline(always)] - pub fn fourteenframes(self) -> &'a mut W { - self.variant(RXFIW_A::FOURTEENFRAMES) + pub fn fourteenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Fourteenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least fifteen frames in it."] #[inline(always)] - pub fn fifteenframes(self) -> &'a mut W { - self.variant(RXFIW_A::FIFTEENFRAMES) + pub fn fifteenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Fifteenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least sixteen frames in it."] #[inline(always)] - pub fn sixteenframes(self) -> &'a mut W { - self.variant(RXFIW_A::SIXTEENFRAMES) + pub fn sixteenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Sixteenframes) } } impl R { #[doc = "Bit 0 - Debug halt"] #[inline(always)] - pub fn dbghalt(&self) -> DBGHALT_R { - DBGHALT_R::new((self.bits & 1) != 0) + pub fn dbghalt(&self) -> DbghaltR { + DbghaltR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Clear-to-send Invert Enable"] #[inline(always)] - pub fn ctsinv(&self) -> CTSINV_R { - CTSINV_R::new(((self.bits >> 1) & 1) != 0) + pub fn ctsinv(&self) -> CtsinvR { + CtsinvR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Clear-to-send Enable"] #[inline(always)] - pub fn ctsen(&self) -> CTSEN_R { - CTSEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn ctsen(&self) -> CtsenR { + CtsenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Request-to-send Invert Enable"] #[inline(always)] - pub fn rtsinv(&self) -> RTSINV_R { - RTSINV_R::new(((self.bits >> 3) & 1) != 0) + pub fn rtsinv(&self) -> RtsinvR { + RtsinvR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:6 - RX Timeout"] #[inline(always)] - pub fn rxtimeout(&self) -> RXTIMEOUT_R { - RXTIMEOUT_R::new(((self.bits >> 4) & 7) as u8) + pub fn rxtimeout(&self) -> RxtimeoutR { + RxtimeoutR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bit 9 - Transmitter DMA Wakeup"] #[inline(always)] - pub fn txdmawu(&self) -> TXDMAWU_R { - TXDMAWU_R::new(((self.bits >> 9) & 1) != 0) + pub fn txdmawu(&self) -> TxdmawuR { + TxdmawuR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Receiver DMA Wakeup"] #[inline(always)] - pub fn rxdmawu(&self) -> RXDMAWU_R { - RXDMAWU_R::new(((self.bits >> 10) & 1) != 0) + pub fn rxdmawu(&self) -> RxdmawuR { + RxdmawuR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Start Frame Unblock Receiver"] #[inline(always)] - pub fn sfubrx(&self) -> SFUBRX_R { - SFUBRX_R::new(((self.bits >> 11) & 1) != 0) + pub fn sfubrx(&self) -> SfubrxR { + SfubrxR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 15 - PRS RX Enable"] #[inline(always)] - pub fn rxprsen(&self) -> RXPRSEN_R { - RXPRSEN_R::new(((self.bits >> 15) & 1) != 0) + pub fn rxprsen(&self) -> RxprsenR { + RxprsenR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:19 - TX FIFO Interrupt Watermark"] #[inline(always)] - pub fn txfiw(&self) -> TXFIW_R { - TXFIW_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn txfiw(&self) -> TxfiwR { + TxfiwR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 22:25 - Request-to-send RX FIFO Watermark"] #[inline(always)] - pub fn rtsrxfw(&self) -> RTSRXFW_R { - RTSRXFW_R::new(((self.bits >> 22) & 0x0f) as u8) + pub fn rtsrxfw(&self) -> RtsrxfwR { + RtsrxfwR::new(((self.bits >> 22) & 0x0f) as u8) } #[doc = "Bits 27:30 - RX FIFO Interrupt Watermark"] #[inline(always)] - pub fn rxfiw(&self) -> RXFIW_R { - RXFIW_R::new(((self.bits >> 27) & 0x0f) as u8) + pub fn rxfiw(&self) -> RxfiwR { + RxfiwR::new(((self.bits >> 27) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - Debug halt"] #[inline(always)] #[must_use] - pub fn dbghalt(&mut self) -> DBGHALT_W<0> { - DBGHALT_W::new(self) + pub fn dbghalt(&mut self) -> DbghaltW { + DbghaltW::new(self, 0) } #[doc = "Bit 1 - Clear-to-send Invert Enable"] #[inline(always)] #[must_use] - pub fn ctsinv(&mut self) -> CTSINV_W<1> { - CTSINV_W::new(self) + pub fn ctsinv(&mut self) -> CtsinvW { + CtsinvW::new(self, 1) } #[doc = "Bit 2 - Clear-to-send Enable"] #[inline(always)] #[must_use] - pub fn ctsen(&mut self) -> CTSEN_W<2> { - CTSEN_W::new(self) + pub fn ctsen(&mut self) -> CtsenW { + CtsenW::new(self, 2) } #[doc = "Bit 3 - Request-to-send Invert Enable"] #[inline(always)] #[must_use] - pub fn rtsinv(&mut self) -> RTSINV_W<3> { - RTSINV_W::new(self) + pub fn rtsinv(&mut self) -> RtsinvW { + RtsinvW::new(self, 3) } #[doc = "Bits 4:6 - RX Timeout"] #[inline(always)] #[must_use] - pub fn rxtimeout(&mut self) -> RXTIMEOUT_W<4> { - RXTIMEOUT_W::new(self) + pub fn rxtimeout(&mut self) -> RxtimeoutW { + RxtimeoutW::new(self, 4) } #[doc = "Bit 9 - Transmitter DMA Wakeup"] #[inline(always)] #[must_use] - pub fn txdmawu(&mut self) -> TXDMAWU_W<9> { - TXDMAWU_W::new(self) + pub fn txdmawu(&mut self) -> TxdmawuW { + TxdmawuW::new(self, 9) } #[doc = "Bit 10 - Receiver DMA Wakeup"] #[inline(always)] #[must_use] - pub fn rxdmawu(&mut self) -> RXDMAWU_W<10> { - RXDMAWU_W::new(self) + pub fn rxdmawu(&mut self) -> RxdmawuW { + RxdmawuW::new(self, 10) } #[doc = "Bit 11 - Start Frame Unblock Receiver"] #[inline(always)] #[must_use] - pub fn sfubrx(&mut self) -> SFUBRX_W<11> { - SFUBRX_W::new(self) + pub fn sfubrx(&mut self) -> SfubrxW { + SfubrxW::new(self, 11) } #[doc = "Bit 15 - PRS RX Enable"] #[inline(always)] #[must_use] - pub fn rxprsen(&mut self) -> RXPRSEN_W<15> { - RXPRSEN_W::new(self) + pub fn rxprsen(&mut self) -> RxprsenW { + RxprsenW::new(self, 15) } #[doc = "Bits 16:19 - TX FIFO Interrupt Watermark"] #[inline(always)] #[must_use] - pub fn txfiw(&mut self) -> TXFIW_W<16> { - TXFIW_W::new(self) + pub fn txfiw(&mut self) -> TxfiwW { + TxfiwW::new(self, 16) } #[doc = "Bits 22:25 - Request-to-send RX FIFO Watermark"] #[inline(always)] #[must_use] - pub fn rtsrxfw(&mut self) -> RTSRXFW_W<22> { - RTSRXFW_W::new(self) + pub fn rtsrxfw(&mut self) -> RtsrxfwW { + RtsrxfwW::new(self, 22) } #[doc = "Bits 27:30 - RX FIFO Interrupt Watermark"] #[inline(always)] #[must_use] - pub fn rxfiw(&mut self) -> RXFIW_W<27> { - RXFIW_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rxfiw(&mut self) -> RxfiwW { + RxfiwW::new(self, 27) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg1](index.html) module"] -pub struct CFG1_SPEC; -impl crate::RegisterSpec for CFG1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cfg1Spec; +impl crate::RegisterSpec for Cfg1Spec { type Ux = u32; } -#[doc = "`read()` method returns [cfg1::R](R) reader structure"] -impl crate::Readable for CFG1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg1::W](W) writer structure"] -impl crate::Writable for CFG1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg1::R`](R) reader structure"] +impl crate::Readable for Cfg1Spec {} +#[doc = "`write(|w| ..)` method takes [`cfg1::W`](W) writer structure"] +impl crate::Writable for Cfg1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG1 to value 0"] -impl crate::Resettable for CFG1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cfg1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/cfg2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/cfg2.rs index 1f16a32..08998b3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/cfg2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/cfg2.rs @@ -1,384 +1,356 @@ #[doc = "Register `CFG2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MASTER` reader - Main mode"] -pub type MASTER_R = crate::BitReader; +pub type W = crate::W; #[doc = "Main mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MASTER_A { +pub enum Master { #[doc = "0: Secondary mode"] - SLAVE = 0, + Slave = 0, #[doc = "1: Main mode"] - MASTER = 1, + Master = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MASTER_A) -> Self { + fn from(variant: Master) -> Self { variant as u8 != 0 } } -impl MASTER_R { +#[doc = "Field `MASTER` reader - Main mode"] +pub type MasterR = crate::BitReader; +impl MasterR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MASTER_A { + pub const fn variant(&self) -> Master { match self.bits { - false => MASTER_A::SLAVE, - true => MASTER_A::MASTER, + false => Master::Slave, + true => Master::Master, } } - #[doc = "Checks if the value of the field is `SLAVE`"] + #[doc = "Secondary mode"] #[inline(always)] pub fn is_slave(&self) -> bool { - *self == MASTER_A::SLAVE + *self == Master::Slave } - #[doc = "Checks if the value of the field is `MASTER`"] + #[doc = "Main mode"] #[inline(always)] pub fn is_master(&self) -> bool { - *self == MASTER_A::MASTER + *self == Master::Master } } #[doc = "Field `MASTER` writer - Main mode"] -pub type MASTER_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, MASTER_A, O>; -impl<'a, const O: u8> MASTER_W<'a, O> { +pub type MasterW<'a, REG> = crate::BitWriter<'a, REG, Master>; +impl<'a, REG> MasterW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Secondary mode"] #[inline(always)] - pub fn slave(self) -> &'a mut W { - self.variant(MASTER_A::SLAVE) + pub fn slave(self) -> &'a mut crate::W { + self.variant(Master::Slave) } #[doc = "Main mode"] #[inline(always)] - pub fn master(self) -> &'a mut W { - self.variant(MASTER_A::MASTER) + pub fn master(self) -> &'a mut crate::W { + self.variant(Master::Master) } } -#[doc = "Field `CLKPOL` reader - Clock Polarity"] -pub type CLKPOL_R = crate::BitReader; #[doc = "Clock Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLKPOL_A { +pub enum Clkpol { #[doc = "0: The bus clock used in synchronous mode has a low base value"] - IDLELOW = 0, + Idlelow = 0, #[doc = "1: The bus clock used in synchronous mode has a high base value"] - IDLEHIGH = 1, + Idlehigh = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLKPOL_A) -> Self { + fn from(variant: Clkpol) -> Self { variant as u8 != 0 } } -impl CLKPOL_R { +#[doc = "Field `CLKPOL` reader - Clock Polarity"] +pub type ClkpolR = crate::BitReader; +impl ClkpolR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CLKPOL_A { + pub const fn variant(&self) -> Clkpol { match self.bits { - false => CLKPOL_A::IDLELOW, - true => CLKPOL_A::IDLEHIGH, + false => Clkpol::Idlelow, + true => Clkpol::Idlehigh, } } - #[doc = "Checks if the value of the field is `IDLELOW`"] + #[doc = "The bus clock used in synchronous mode has a low base value"] #[inline(always)] pub fn is_idlelow(&self) -> bool { - *self == CLKPOL_A::IDLELOW + *self == Clkpol::Idlelow } - #[doc = "Checks if the value of the field is `IDLEHIGH`"] + #[doc = "The bus clock used in synchronous mode has a high base value"] #[inline(always)] pub fn is_idlehigh(&self) -> bool { - *self == CLKPOL_A::IDLEHIGH + *self == Clkpol::Idlehigh } } #[doc = "Field `CLKPOL` writer - Clock Polarity"] -pub type CLKPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, CLKPOL_A, O>; -impl<'a, const O: u8> CLKPOL_W<'a, O> { +pub type ClkpolW<'a, REG> = crate::BitWriter<'a, REG, Clkpol>; +impl<'a, REG> ClkpolW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The bus clock used in synchronous mode has a low base value"] #[inline(always)] - pub fn idlelow(self) -> &'a mut W { - self.variant(CLKPOL_A::IDLELOW) + pub fn idlelow(self) -> &'a mut crate::W { + self.variant(Clkpol::Idlelow) } #[doc = "The bus clock used in synchronous mode has a high base value"] #[inline(always)] - pub fn idlehigh(self) -> &'a mut W { - self.variant(CLKPOL_A::IDLEHIGH) + pub fn idlehigh(self) -> &'a mut crate::W { + self.variant(Clkpol::Idlehigh) } } -#[doc = "Field `CLKPHA` reader - Clock Edge for Setup/Sample"] -pub type CLKPHA_R = crate::BitReader; #[doc = "Clock Edge for Setup/Sample\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLKPHA_A { +pub enum Clkpha { #[doc = "0: Data is sampled on the leading edge and set-up on the trailing edge of the bus clock in synchronous mode"] - SAMPLELEADING = 0, + Sampleleading = 0, #[doc = "1: Data is set-up on the leading edge and sampled on the trailing edge of the bus clock in synchronous mode"] - SAMPLETRAILING = 1, + Sampletrailing = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLKPHA_A) -> Self { + fn from(variant: Clkpha) -> Self { variant as u8 != 0 } } -impl CLKPHA_R { +#[doc = "Field `CLKPHA` reader - Clock Edge for Setup/Sample"] +pub type ClkphaR = crate::BitReader; +impl ClkphaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CLKPHA_A { + pub const fn variant(&self) -> Clkpha { match self.bits { - false => CLKPHA_A::SAMPLELEADING, - true => CLKPHA_A::SAMPLETRAILING, + false => Clkpha::Sampleleading, + true => Clkpha::Sampletrailing, } } - #[doc = "Checks if the value of the field is `SAMPLELEADING`"] + #[doc = "Data is sampled on the leading edge and set-up on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] pub fn is_sampleleading(&self) -> bool { - *self == CLKPHA_A::SAMPLELEADING + *self == Clkpha::Sampleleading } - #[doc = "Checks if the value of the field is `SAMPLETRAILING`"] + #[doc = "Data is set-up on the leading edge and sampled on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] pub fn is_sampletrailing(&self) -> bool { - *self == CLKPHA_A::SAMPLETRAILING + *self == Clkpha::Sampletrailing } } #[doc = "Field `CLKPHA` writer - Clock Edge for Setup/Sample"] -pub type CLKPHA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, CLKPHA_A, O>; -impl<'a, const O: u8> CLKPHA_W<'a, O> { +pub type ClkphaW<'a, REG> = crate::BitWriter<'a, REG, Clkpha>; +impl<'a, REG> ClkphaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Data is sampled on the leading edge and set-up on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] - pub fn sampleleading(self) -> &'a mut W { - self.variant(CLKPHA_A::SAMPLELEADING) + pub fn sampleleading(self) -> &'a mut crate::W { + self.variant(Clkpha::Sampleleading) } #[doc = "Data is set-up on the leading edge and sampled on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] - pub fn sampletrailing(self) -> &'a mut W { - self.variant(CLKPHA_A::SAMPLETRAILING) + pub fn sampletrailing(self) -> &'a mut crate::W { + self.variant(Clkpha::Sampletrailing) } } -#[doc = "Field `CSINV` reader - Chip Select Invert"] -pub type CSINV_R = crate::BitReader; #[doc = "Chip Select Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CSINV_A { +pub enum Csinv { #[doc = "0: Chip select is active low"] - AL = 0, + Al = 0, #[doc = "1: Chip select is active high"] - AH = 1, + Ah = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CSINV_A) -> Self { + fn from(variant: Csinv) -> Self { variant as u8 != 0 } } -impl CSINV_R { +#[doc = "Field `CSINV` reader - Chip Select Invert"] +pub type CsinvR = crate::BitReader; +impl CsinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CSINV_A { + pub const fn variant(&self) -> Csinv { match self.bits { - false => CSINV_A::AL, - true => CSINV_A::AH, + false => Csinv::Al, + true => Csinv::Ah, } } - #[doc = "Checks if the value of the field is `AL`"] + #[doc = "Chip select is active low"] #[inline(always)] pub fn is_al(&self) -> bool { - *self == CSINV_A::AL + *self == Csinv::Al } - #[doc = "Checks if the value of the field is `AH`"] + #[doc = "Chip select is active high"] #[inline(always)] pub fn is_ah(&self) -> bool { - *self == CSINV_A::AH + *self == Csinv::Ah } } #[doc = "Field `CSINV` writer - Chip Select Invert"] -pub type CSINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, CSINV_A, O>; -impl<'a, const O: u8> CSINV_W<'a, O> { +pub type CsinvW<'a, REG> = crate::BitWriter<'a, REG, Csinv>; +impl<'a, REG> CsinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Chip select is active low"] #[inline(always)] - pub fn al(self) -> &'a mut W { - self.variant(CSINV_A::AL) + pub fn al(self) -> &'a mut crate::W { + self.variant(Csinv::Al) } #[doc = "Chip select is active high"] #[inline(always)] - pub fn ah(self) -> &'a mut W { - self.variant(CSINV_A::AH) + pub fn ah(self) -> &'a mut crate::W { + self.variant(Csinv::Ah) } } #[doc = "Field `AUTOTX` reader - Always Transmit When RXFIFO Not Full"] -pub type AUTOTX_R = crate::BitReader; +pub type AutotxR = crate::BitReader; #[doc = "Field `AUTOTX` writer - Always Transmit When RXFIFO Not Full"] -pub type AUTOTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, bool, O>; +pub type AutotxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOCS` reader - Automatic Chip Select"] -pub type AUTOCS_R = crate::BitReader; +pub type AutocsR = crate::BitReader; #[doc = "Field `AUTOCS` writer - Automatic Chip Select"] -pub type AUTOCS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, bool, O>; +pub type AutocsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLKPRSEN` reader - PRS CLK Enable"] -pub type CLKPRSEN_R = crate::BitReader; +pub type ClkprsenR = crate::BitReader; #[doc = "Field `CLKPRSEN` writer - PRS CLK Enable"] -pub type CLKPRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, bool, O>; +pub type ClkprsenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FORCELOAD` reader - Force Load to Shift Register"] -pub type FORCELOAD_R = crate::BitReader; +pub type ForceloadR = crate::BitReader; #[doc = "Field `FORCELOAD` writer - Force Load to Shift Register"] -pub type FORCELOAD_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, bool, O>; +pub type ForceloadW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SDIV` reader - Sync Clock Div"] -pub type SDIV_R = crate::FieldReader; +pub type SdivR = crate::FieldReader; #[doc = "Field `SDIV` writer - Sync Clock Div"] -pub type SDIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG2_SPEC, u8, u8, 8, O>; +pub type SdivW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bit 0 - Main mode"] #[inline(always)] - pub fn master(&self) -> MASTER_R { - MASTER_R::new((self.bits & 1) != 0) + pub fn master(&self) -> MasterR { + MasterR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Clock Polarity"] #[inline(always)] - pub fn clkpol(&self) -> CLKPOL_R { - CLKPOL_R::new(((self.bits >> 1) & 1) != 0) + pub fn clkpol(&self) -> ClkpolR { + ClkpolR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Clock Edge for Setup/Sample"] #[inline(always)] - pub fn clkpha(&self) -> CLKPHA_R { - CLKPHA_R::new(((self.bits >> 2) & 1) != 0) + pub fn clkpha(&self) -> ClkphaR { + ClkphaR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Chip Select Invert"] #[inline(always)] - pub fn csinv(&self) -> CSINV_R { - CSINV_R::new(((self.bits >> 3) & 1) != 0) + pub fn csinv(&self) -> CsinvR { + CsinvR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Always Transmit When RXFIFO Not Full"] #[inline(always)] - pub fn autotx(&self) -> AUTOTX_R { - AUTOTX_R::new(((self.bits >> 4) & 1) != 0) + pub fn autotx(&self) -> AutotxR { + AutotxR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Automatic Chip Select"] #[inline(always)] - pub fn autocs(&self) -> AUTOCS_R { - AUTOCS_R::new(((self.bits >> 5) & 1) != 0) + pub fn autocs(&self) -> AutocsR { + AutocsR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - PRS CLK Enable"] #[inline(always)] - pub fn clkprsen(&self) -> CLKPRSEN_R { - CLKPRSEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn clkprsen(&self) -> ClkprsenR { + ClkprsenR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Force Load to Shift Register"] #[inline(always)] - pub fn forceload(&self) -> FORCELOAD_R { - FORCELOAD_R::new(((self.bits >> 7) & 1) != 0) + pub fn forceload(&self) -> ForceloadR { + ForceloadR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 24:31 - Sync Clock Div"] #[inline(always)] - pub fn sdiv(&self) -> SDIV_R { - SDIV_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn sdiv(&self) -> SdivR { + SdivR::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bit 0 - Main mode"] #[inline(always)] #[must_use] - pub fn master(&mut self) -> MASTER_W<0> { - MASTER_W::new(self) + pub fn master(&mut self) -> MasterW { + MasterW::new(self, 0) } #[doc = "Bit 1 - Clock Polarity"] #[inline(always)] #[must_use] - pub fn clkpol(&mut self) -> CLKPOL_W<1> { - CLKPOL_W::new(self) + pub fn clkpol(&mut self) -> ClkpolW { + ClkpolW::new(self, 1) } #[doc = "Bit 2 - Clock Edge for Setup/Sample"] #[inline(always)] #[must_use] - pub fn clkpha(&mut self) -> CLKPHA_W<2> { - CLKPHA_W::new(self) + pub fn clkpha(&mut self) -> ClkphaW { + ClkphaW::new(self, 2) } #[doc = "Bit 3 - Chip Select Invert"] #[inline(always)] #[must_use] - pub fn csinv(&mut self) -> CSINV_W<3> { - CSINV_W::new(self) + pub fn csinv(&mut self) -> CsinvW { + CsinvW::new(self, 3) } #[doc = "Bit 4 - Always Transmit When RXFIFO Not Full"] #[inline(always)] #[must_use] - pub fn autotx(&mut self) -> AUTOTX_W<4> { - AUTOTX_W::new(self) + pub fn autotx(&mut self) -> AutotxW { + AutotxW::new(self, 4) } #[doc = "Bit 5 - Automatic Chip Select"] #[inline(always)] #[must_use] - pub fn autocs(&mut self) -> AUTOCS_W<5> { - AUTOCS_W::new(self) + pub fn autocs(&mut self) -> AutocsW { + AutocsW::new(self, 5) } #[doc = "Bit 6 - PRS CLK Enable"] #[inline(always)] #[must_use] - pub fn clkprsen(&mut self) -> CLKPRSEN_W<6> { - CLKPRSEN_W::new(self) + pub fn clkprsen(&mut self) -> ClkprsenW { + ClkprsenW::new(self, 6) } #[doc = "Bit 7 - Force Load to Shift Register"] #[inline(always)] #[must_use] - pub fn forceload(&mut self) -> FORCELOAD_W<7> { - FORCELOAD_W::new(self) + pub fn forceload(&mut self) -> ForceloadW { + ForceloadW::new(self, 7) } #[doc = "Bits 24:31 - Sync Clock Div"] #[inline(always)] #[must_use] - pub fn sdiv(&mut self) -> SDIV_W<24> { - SDIV_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sdiv(&mut self) -> SdivW { + SdivW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg2](index.html) module"] -pub struct CFG2_SPEC; -impl crate::RegisterSpec for CFG2_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cfg2Spec; +impl crate::RegisterSpec for Cfg2Spec { type Ux = u32; } -#[doc = "`read()` method returns [cfg2::R](R) reader structure"] -impl crate::Readable for CFG2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg2::W](W) writer structure"] -impl crate::Writable for CFG2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg2::R`](R) reader structure"] +impl crate::Readable for Cfg2Spec {} +#[doc = "`write(|w| ..)` method takes [`cfg2::W`](W) writer structure"] +impl crate::Writable for Cfg2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG2 to value 0x20"] -impl crate::Resettable for CFG2_SPEC { - const RESET_VALUE: Self::Ux = 0x20; +impl crate::Resettable for Cfg2Spec { + const RESET_VALUE: u32 = 0x20; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/clkdiv.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/clkdiv.rs index 5158bd5..beab8d8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/clkdiv.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/clkdiv.rs @@ -1,80 +1,40 @@ #[doc = "Register `CLKDIV` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKDIV` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DIV` reader - Fractional Clock Divider"] -pub type DIV_R = crate::FieldReader; +pub type DivR = crate::FieldReader; #[doc = "Field `DIV` writer - Fractional Clock Divider"] -pub type DIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CLKDIV_SPEC, u32, u32, 20, O>; +pub type DivW<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { #[doc = "Bits 3:22 - Fractional Clock Divider"] #[inline(always)] - pub fn div(&self) -> DIV_R { - DIV_R::new((self.bits >> 3) & 0x000f_ffff) + pub fn div(&self) -> DivR { + DivR::new((self.bits >> 3) & 0x000f_ffff) } } impl W { #[doc = "Bits 3:22 - Fractional Clock Divider"] #[inline(always)] #[must_use] - pub fn div(&mut self) -> DIV_W<3> { - DIV_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn div(&mut self) -> DivW { + DivW::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clkdiv](index.html) module"] -pub struct CLKDIV_SPEC; -impl crate::RegisterSpec for CLKDIV_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ClkdivSpec; +impl crate::RegisterSpec for ClkdivSpec { type Ux = u32; } -#[doc = "`read()` method returns [clkdiv::R](R) reader structure"] -impl crate::Readable for CLKDIV_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clkdiv::W](W) writer structure"] -impl crate::Writable for CLKDIV_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`clkdiv::R`](R) reader structure"] +impl crate::Readable for ClkdivSpec {} +#[doc = "`write(|w| ..)` method takes [`clkdiv::W`](W) writer structure"] +impl crate::Writable for ClkdivSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV to value 0"] -impl crate::Resettable for CLKDIV_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ClkdivSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/cmd.rs index 8d3465f..39d3e79 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/cmd.rs @@ -1,116 +1,91 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RXEN` writer - Receiver Enable"] -pub type RXEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXDIS` writer - Receiver Disable"] -pub type RXDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXEN` writer - Transmitter Enable"] -pub type TXEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXDIS` writer - Transmitter Disable"] -pub type TXDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXBLOCKEN` writer - Receiver Block Enable"] -pub type RXBLOCKEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxblockenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXBLOCKDIS` writer - Receiver Block Disable"] -pub type RXBLOCKDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxblockdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTRIEN` writer - Transmitter Tristate Enable"] -pub type TXTRIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxtrienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTRIDIS` writer - Transmitter Tristate Disable"] -pub type TXTRIDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxtridisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEARTX` writer - Clear TX FIFO"] -pub type CLEARTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type CleartxW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Receiver Enable"] #[inline(always)] #[must_use] - pub fn rxen(&mut self) -> RXEN_W<0> { - RXEN_W::new(self) + pub fn rxen(&mut self) -> RxenW { + RxenW::new(self, 0) } #[doc = "Bit 1 - Receiver Disable"] #[inline(always)] #[must_use] - pub fn rxdis(&mut self) -> RXDIS_W<1> { - RXDIS_W::new(self) + pub fn rxdis(&mut self) -> RxdisW { + RxdisW::new(self, 1) } #[doc = "Bit 2 - Transmitter Enable"] #[inline(always)] #[must_use] - pub fn txen(&mut self) -> TXEN_W<2> { - TXEN_W::new(self) + pub fn txen(&mut self) -> TxenW { + TxenW::new(self, 2) } #[doc = "Bit 3 - Transmitter Disable"] #[inline(always)] #[must_use] - pub fn txdis(&mut self) -> TXDIS_W<3> { - TXDIS_W::new(self) + pub fn txdis(&mut self) -> TxdisW { + TxdisW::new(self, 3) } #[doc = "Bit 4 - Receiver Block Enable"] #[inline(always)] #[must_use] - pub fn rxblocken(&mut self) -> RXBLOCKEN_W<4> { - RXBLOCKEN_W::new(self) + pub fn rxblocken(&mut self) -> RxblockenW { + RxblockenW::new(self, 4) } #[doc = "Bit 5 - Receiver Block Disable"] #[inline(always)] #[must_use] - pub fn rxblockdis(&mut self) -> RXBLOCKDIS_W<5> { - RXBLOCKDIS_W::new(self) + pub fn rxblockdis(&mut self) -> RxblockdisW { + RxblockdisW::new(self, 5) } #[doc = "Bit 6 - Transmitter Tristate Enable"] #[inline(always)] #[must_use] - pub fn txtrien(&mut self) -> TXTRIEN_W<6> { - TXTRIEN_W::new(self) + pub fn txtrien(&mut self) -> TxtrienW { + TxtrienW::new(self, 6) } #[doc = "Bit 7 - Transmitter Tristate Disable"] #[inline(always)] #[must_use] - pub fn txtridis(&mut self) -> TXTRIDIS_W<7> { - TXTRIDIS_W::new(self) + pub fn txtridis(&mut self) -> TxtridisW { + TxtridisW::new(self, 7) } #[doc = "Bit 8 - Clear TX FIFO"] #[inline(always)] #[must_use] - pub fn cleartx(&mut self) -> CLEARTX_W<8> { - CLEARTX_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cleartx(&mut self) -> CleartxW { + CleartxW::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/dtxdatcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/dtxdatcfg.rs index 8ae017b..67cc6f0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/dtxdatcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/dtxdatcfg.rs @@ -1,80 +1,40 @@ #[doc = "Register `DTXDATCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTXDATCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTXDAT` reader - Default TX DATA"] -pub type DTXDAT_R = crate::FieldReader; +pub type DtxdatR = crate::FieldReader; #[doc = "Field `DTXDAT` writer - Default TX DATA"] -pub type DTXDAT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTXDATCFG_SPEC, u16, u16, 16, O>; +pub type DtxdatW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Default TX DATA"] #[inline(always)] - pub fn dtxdat(&self) -> DTXDAT_R { - DTXDAT_R::new((self.bits & 0xffff) as u16) + pub fn dtxdat(&self) -> DtxdatR { + DtxdatR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Default TX DATA"] #[inline(always)] #[must_use] - pub fn dtxdat(&mut self) -> DTXDAT_W<0> { - DTXDAT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtxdat(&mut self) -> DtxdatW { + DtxdatW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtxdatcfg](index.html) module"] -pub struct DTXDATCFG_SPEC; -impl crate::RegisterSpec for DTXDATCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtxdatcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtxdatcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtxdatcfgSpec; +impl crate::RegisterSpec for DtxdatcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtxdatcfg::R](R) reader structure"] -impl crate::Readable for DTXDATCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtxdatcfg::W](W) writer structure"] -impl crate::Writable for DTXDATCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtxdatcfg::R`](R) reader structure"] +impl crate::Readable for DtxdatcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dtxdatcfg::W`](W) writer structure"] +impl crate::Writable for DtxdatcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTXDATCFG to value 0"] -impl crate::Resettable for DTXDATCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtxdatcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/en.rs index f15bf65..7298843 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Module enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Module enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Module enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Module enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/framecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/framecfg.rs index 037aaa3..7ad7134 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/framecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/framecfg.rs @@ -1,399 +1,381 @@ #[doc = "Register `FRAMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `FRAMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DATABITS` reader - Data-Bit Mode"] -pub type DATABITS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Data-Bit Mode\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DATABITS_A { +pub enum Databits { #[doc = "1: Each frame contains 7 data bits"] - SEVEN = 1, + Seven = 1, #[doc = "2: Each frame contains 8 data bits"] - EIGHT = 2, + Eight = 2, #[doc = "3: Each frame contains 9 data bits"] - NINE = 3, + Nine = 3, #[doc = "4: Each frame contains 10 data bits"] - TEN = 4, + Ten = 4, #[doc = "5: Each frame contains 11 data bits"] - ELEVEN = 5, + Eleven = 5, #[doc = "6: Each frame contains 12 data bits"] - TWELVE = 6, + Twelve = 6, #[doc = "7: Each frame contains 13 data bits"] - THIRTEEN = 7, + Thirteen = 7, #[doc = "8: Each frame contains 14 data bits"] - FOURTEEN = 8, + Fourteen = 8, #[doc = "9: Each frame contains 15 data bits"] - FIFTEEN = 9, + Fifteen = 9, #[doc = "10: Each frame contains 16 data bits"] - SIXTEEN = 10, + Sixteen = 10, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DATABITS_A) -> Self { + fn from(variant: Databits) -> Self { variant as _ } } -impl DATABITS_R { +impl crate::FieldSpec for Databits { + type Ux = u8; +} +impl crate::IsEnum for Databits {} +#[doc = "Field `DATABITS` reader - Data-Bit Mode"] +pub type DatabitsR = crate::FieldReader; +impl DatabitsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(DATABITS_A::SEVEN), - 2 => Some(DATABITS_A::EIGHT), - 3 => Some(DATABITS_A::NINE), - 4 => Some(DATABITS_A::TEN), - 5 => Some(DATABITS_A::ELEVEN), - 6 => Some(DATABITS_A::TWELVE), - 7 => Some(DATABITS_A::THIRTEEN), - 8 => Some(DATABITS_A::FOURTEEN), - 9 => Some(DATABITS_A::FIFTEEN), - 10 => Some(DATABITS_A::SIXTEEN), + 1 => Some(Databits::Seven), + 2 => Some(Databits::Eight), + 3 => Some(Databits::Nine), + 4 => Some(Databits::Ten), + 5 => Some(Databits::Eleven), + 6 => Some(Databits::Twelve), + 7 => Some(Databits::Thirteen), + 8 => Some(Databits::Fourteen), + 9 => Some(Databits::Fifteen), + 10 => Some(Databits::Sixteen), _ => None, } } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "Each frame contains 7 data bits"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == DATABITS_A::SEVEN + *self == Databits::Seven } - #[doc = "Checks if the value of the field is `EIGHT`"] + #[doc = "Each frame contains 8 data bits"] #[inline(always)] pub fn is_eight(&self) -> bool { - *self == DATABITS_A::EIGHT + *self == Databits::Eight } - #[doc = "Checks if the value of the field is `NINE`"] + #[doc = "Each frame contains 9 data bits"] #[inline(always)] pub fn is_nine(&self) -> bool { - *self == DATABITS_A::NINE + *self == Databits::Nine } - #[doc = "Checks if the value of the field is `TEN`"] + #[doc = "Each frame contains 10 data bits"] #[inline(always)] pub fn is_ten(&self) -> bool { - *self == DATABITS_A::TEN + *self == Databits::Ten } - #[doc = "Checks if the value of the field is `ELEVEN`"] + #[doc = "Each frame contains 11 data bits"] #[inline(always)] pub fn is_eleven(&self) -> bool { - *self == DATABITS_A::ELEVEN + *self == Databits::Eleven } - #[doc = "Checks if the value of the field is `TWELVE`"] + #[doc = "Each frame contains 12 data bits"] #[inline(always)] pub fn is_twelve(&self) -> bool { - *self == DATABITS_A::TWELVE + *self == Databits::Twelve } - #[doc = "Checks if the value of the field is `THIRTEEN`"] + #[doc = "Each frame contains 13 data bits"] #[inline(always)] pub fn is_thirteen(&self) -> bool { - *self == DATABITS_A::THIRTEEN + *self == Databits::Thirteen } - #[doc = "Checks if the value of the field is `FOURTEEN`"] + #[doc = "Each frame contains 14 data bits"] #[inline(always)] pub fn is_fourteen(&self) -> bool { - *self == DATABITS_A::FOURTEEN + *self == Databits::Fourteen } - #[doc = "Checks if the value of the field is `FIFTEEN`"] + #[doc = "Each frame contains 15 data bits"] #[inline(always)] pub fn is_fifteen(&self) -> bool { - *self == DATABITS_A::FIFTEEN + *self == Databits::Fifteen } - #[doc = "Checks if the value of the field is `SIXTEEN`"] + #[doc = "Each frame contains 16 data bits"] #[inline(always)] pub fn is_sixteen(&self) -> bool { - *self == DATABITS_A::SIXTEEN + *self == Databits::Sixteen } } #[doc = "Field `DATABITS` writer - Data-Bit Mode"] -pub type DATABITS_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, FRAMECFG_SPEC, u8, DATABITS_A, 4, O>; -impl<'a, const O: u8> DATABITS_W<'a, O> { +pub type DatabitsW<'a, REG> = crate::FieldWriter<'a, REG, 4, Databits>; +impl<'a, REG> DatabitsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Each frame contains 7 data bits"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(DATABITS_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Databits::Seven) } #[doc = "Each frame contains 8 data bits"] #[inline(always)] - pub fn eight(self) -> &'a mut W { - self.variant(DATABITS_A::EIGHT) + pub fn eight(self) -> &'a mut crate::W { + self.variant(Databits::Eight) } #[doc = "Each frame contains 9 data bits"] #[inline(always)] - pub fn nine(self) -> &'a mut W { - self.variant(DATABITS_A::NINE) + pub fn nine(self) -> &'a mut crate::W { + self.variant(Databits::Nine) } #[doc = "Each frame contains 10 data bits"] #[inline(always)] - pub fn ten(self) -> &'a mut W { - self.variant(DATABITS_A::TEN) + pub fn ten(self) -> &'a mut crate::W { + self.variant(Databits::Ten) } #[doc = "Each frame contains 11 data bits"] #[inline(always)] - pub fn eleven(self) -> &'a mut W { - self.variant(DATABITS_A::ELEVEN) + pub fn eleven(self) -> &'a mut crate::W { + self.variant(Databits::Eleven) } #[doc = "Each frame contains 12 data bits"] #[inline(always)] - pub fn twelve(self) -> &'a mut W { - self.variant(DATABITS_A::TWELVE) + pub fn twelve(self) -> &'a mut crate::W { + self.variant(Databits::Twelve) } #[doc = "Each frame contains 13 data bits"] #[inline(always)] - pub fn thirteen(self) -> &'a mut W { - self.variant(DATABITS_A::THIRTEEN) + pub fn thirteen(self) -> &'a mut crate::W { + self.variant(Databits::Thirteen) } #[doc = "Each frame contains 14 data bits"] #[inline(always)] - pub fn fourteen(self) -> &'a mut W { - self.variant(DATABITS_A::FOURTEEN) + pub fn fourteen(self) -> &'a mut crate::W { + self.variant(Databits::Fourteen) } #[doc = "Each frame contains 15 data bits"] #[inline(always)] - pub fn fifteen(self) -> &'a mut W { - self.variant(DATABITS_A::FIFTEEN) + pub fn fifteen(self) -> &'a mut crate::W { + self.variant(Databits::Fifteen) } #[doc = "Each frame contains 16 data bits"] #[inline(always)] - pub fn sixteen(self) -> &'a mut W { - self.variant(DATABITS_A::SIXTEEN) + pub fn sixteen(self) -> &'a mut crate::W { + self.variant(Databits::Sixteen) } } -#[doc = "Field `PARITY` reader - Parity-Bit Mode"] -pub type PARITY_R = crate::FieldReader; #[doc = "Parity-Bit Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PARITY_A { +pub enum Parity { #[doc = "0: Parity bits are not used"] - NONE = 0, + None = 0, #[doc = "2: Even parity are used. Parity bits are automatically generated and checked by hardware."] - EVEN = 2, + Even = 2, #[doc = "3: Odd parity is used. Parity bits are automatically generated and checked by hardware."] - ODD = 3, + Odd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PARITY_A) -> Self { + fn from(variant: Parity) -> Self { variant as _ } } -impl PARITY_R { +impl crate::FieldSpec for Parity { + type Ux = u8; +} +impl crate::IsEnum for Parity {} +#[doc = "Field `PARITY` reader - Parity-Bit Mode"] +pub type ParityR = crate::FieldReader; +impl ParityR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PARITY_A::NONE), - 2 => Some(PARITY_A::EVEN), - 3 => Some(PARITY_A::ODD), + 0 => Some(Parity::None), + 2 => Some(Parity::Even), + 3 => Some(Parity::Odd), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Parity bits are not used"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == PARITY_A::NONE + *self == Parity::None } - #[doc = "Checks if the value of the field is `EVEN`"] + #[doc = "Even parity are used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] pub fn is_even(&self) -> bool { - *self == PARITY_A::EVEN + *self == Parity::Even } - #[doc = "Checks if the value of the field is `ODD`"] + #[doc = "Odd parity is used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] pub fn is_odd(&self) -> bool { - *self == PARITY_A::ODD + *self == Parity::Odd } } #[doc = "Field `PARITY` writer - Parity-Bit Mode"] -pub type PARITY_W<'a, const O: u8> = crate::FieldWriter<'a, u32, FRAMECFG_SPEC, u8, PARITY_A, 2, O>; -impl<'a, const O: u8> PARITY_W<'a, O> { +pub type ParityW<'a, REG> = crate::FieldWriter<'a, REG, 2, Parity>; +impl<'a, REG> ParityW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Parity bits are not used"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(PARITY_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Parity::None) } #[doc = "Even parity are used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] - pub fn even(self) -> &'a mut W { - self.variant(PARITY_A::EVEN) + pub fn even(self) -> &'a mut crate::W { + self.variant(Parity::Even) } #[doc = "Odd parity is used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] - pub fn odd(self) -> &'a mut W { - self.variant(PARITY_A::ODD) + pub fn odd(self) -> &'a mut crate::W { + self.variant(Parity::Odd) } } -#[doc = "Field `STOPBITS` reader - Stop-Bit Mode"] -pub type STOPBITS_R = crate::FieldReader; #[doc = "Stop-Bit Mode\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STOPBITS_A { +pub enum Stopbits { #[doc = "0: The transmitter generates a half stop bit. Stop-bits are not verified by receiver"] - HALF = 0, + Half = 0, #[doc = "1: One stop bit is generated and verified"] - ONE = 1, + One = 1, #[doc = "2: The transmitter generates one and a half stop bit. The receiver verifies the first stop bit"] - ONEANDAHALF = 2, + Oneandahalf = 2, #[doc = "3: The transmitter generates two stop bits. The receiver checks the first stop-bit only"] - TWO = 3, + Two = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STOPBITS_A) -> Self { + fn from(variant: Stopbits) -> Self { variant as _ } } -impl STOPBITS_R { +impl crate::FieldSpec for Stopbits { + type Ux = u8; +} +impl crate::IsEnum for Stopbits {} +#[doc = "Field `STOPBITS` reader - Stop-Bit Mode"] +pub type StopbitsR = crate::FieldReader; +impl StopbitsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> STOPBITS_A { + pub const fn variant(&self) -> Stopbits { match self.bits { - 0 => STOPBITS_A::HALF, - 1 => STOPBITS_A::ONE, - 2 => STOPBITS_A::ONEANDAHALF, - 3 => STOPBITS_A::TWO, + 0 => Stopbits::Half, + 1 => Stopbits::One, + 2 => Stopbits::Oneandahalf, + 3 => Stopbits::Two, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `HALF`"] + #[doc = "The transmitter generates a half stop bit. Stop-bits are not verified by receiver"] #[inline(always)] pub fn is_half(&self) -> bool { - *self == STOPBITS_A::HALF + *self == Stopbits::Half } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "One stop bit is generated and verified"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == STOPBITS_A::ONE + *self == Stopbits::One } - #[doc = "Checks if the value of the field is `ONEANDAHALF`"] + #[doc = "The transmitter generates one and a half stop bit. The receiver verifies the first stop bit"] #[inline(always)] pub fn is_oneandahalf(&self) -> bool { - *self == STOPBITS_A::ONEANDAHALF + *self == Stopbits::Oneandahalf } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "The transmitter generates two stop bits. The receiver checks the first stop-bit only"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == STOPBITS_A::TWO + *self == Stopbits::Two } } #[doc = "Field `STOPBITS` writer - Stop-Bit Mode"] -pub type STOPBITS_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, FRAMECFG_SPEC, u8, STOPBITS_A, 2, O>; -impl<'a, const O: u8> STOPBITS_W<'a, O> { +pub type StopbitsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Stopbits, crate::Safe>; +impl<'a, REG> StopbitsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The transmitter generates a half stop bit. Stop-bits are not verified by receiver"] #[inline(always)] - pub fn half(self) -> &'a mut W { - self.variant(STOPBITS_A::HALF) + pub fn half(self) -> &'a mut crate::W { + self.variant(Stopbits::Half) } #[doc = "One stop bit is generated and verified"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(STOPBITS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Stopbits::One) } #[doc = "The transmitter generates one and a half stop bit. The receiver verifies the first stop bit"] #[inline(always)] - pub fn oneandahalf(self) -> &'a mut W { - self.variant(STOPBITS_A::ONEANDAHALF) + pub fn oneandahalf(self) -> &'a mut crate::W { + self.variant(Stopbits::Oneandahalf) } #[doc = "The transmitter generates two stop bits. The receiver checks the first stop-bit only"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(STOPBITS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Stopbits::Two) } } impl R { #[doc = "Bits 0:3 - Data-Bit Mode"] #[inline(always)] - pub fn databits(&self) -> DATABITS_R { - DATABITS_R::new((self.bits & 0x0f) as u8) + pub fn databits(&self) -> DatabitsR { + DatabitsR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - Parity-Bit Mode"] #[inline(always)] - pub fn parity(&self) -> PARITY_R { - PARITY_R::new(((self.bits >> 8) & 3) as u8) + pub fn parity(&self) -> ParityR { + ParityR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 12:13 - Stop-Bit Mode"] #[inline(always)] - pub fn stopbits(&self) -> STOPBITS_R { - STOPBITS_R::new(((self.bits >> 12) & 3) as u8) + pub fn stopbits(&self) -> StopbitsR { + StopbitsR::new(((self.bits >> 12) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - Data-Bit Mode"] #[inline(always)] #[must_use] - pub fn databits(&mut self) -> DATABITS_W<0> { - DATABITS_W::new(self) + pub fn databits(&mut self) -> DatabitsW { + DatabitsW::new(self, 0) } #[doc = "Bits 8:9 - Parity-Bit Mode"] #[inline(always)] #[must_use] - pub fn parity(&mut self) -> PARITY_W<8> { - PARITY_W::new(self) + pub fn parity(&mut self) -> ParityW { + ParityW::new(self, 8) } #[doc = "Bits 12:13 - Stop-Bit Mode"] #[inline(always)] #[must_use] - pub fn stopbits(&mut self) -> STOPBITS_W<12> { - STOPBITS_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stopbits(&mut self) -> StopbitsW { + StopbitsW::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [framecfg](index.html) module"] -pub struct FRAMECFG_SPEC; -impl crate::RegisterSpec for FRAMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`framecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`framecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct FramecfgSpec; +impl crate::RegisterSpec for FramecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [framecfg::R](R) reader structure"] -impl crate::Readable for FRAMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [framecfg::W](W) writer structure"] -impl crate::Writable for FRAMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`framecfg::R`](R) reader structure"] +impl crate::Readable for FramecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`framecfg::W`](W) writer structure"] +impl crate::Writable for FramecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FRAMECFG to value 0x1002"] -impl crate::Resettable for FRAMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0x1002; +impl crate::Resettable for FramecfgSpec { + const RESET_VALUE: u32 = 0x1002; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/ien.rs index b490cf0..fa2d28a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/ien.rs @@ -1,350 +1,310 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXC` reader - TX Complete Enable"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXC` writer - TX Complete Enable"] -pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFL` reader - TX FIFO Level Enable"] -pub type TXFL_R = crate::BitReader; +pub type TxflR = crate::BitReader; #[doc = "Field `TXFL` writer - TX FIFO Level Enable"] -pub type TXFL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxflW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFL` reader - RX FIFO Level Enable"] -pub type RXFL_R = crate::BitReader; +pub type RxflR = crate::BitReader; #[doc = "Field `RXFL` writer - RX FIFO Level Enable"] -pub type RXFL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxflW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFULL` reader - RX FIFO Full Enable"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXFULL` writer - RX FIFO Full Enable"] -pub type RXFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxfullW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXOF` reader - RX FIFO Overflow Enable"] -pub type RXOF_R = crate::BitReader; +pub type RxofR = crate::BitReader; #[doc = "Field `RXOF` writer - RX FIFO Overflow Enable"] -pub type RXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUF` reader - RX FIFO Underflow Enable"] -pub type RXUF_R = crate::BitReader; +pub type RxufR = crate::BitReader; #[doc = "Field `RXUF` writer - RX FIFO Underflow Enable"] -pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXOF` reader - TX FIFO Overflow Enable"] -pub type TXOF_R = crate::BitReader; +pub type TxofR = crate::BitReader; #[doc = "Field `TXOF` writer - TX FIFO Overflow Enable"] -pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXUF` reader - TX FIFO Underflow Enable"] -pub type TXUF_R = crate::BitReader; +pub type TxufR = crate::BitReader; #[doc = "Field `TXUF` writer - TX FIFO Underflow Enable"] -pub type TXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PERR` reader - Parity Error Enable"] -pub type PERR_R = crate::BitReader; +pub type PerrR = crate::BitReader; #[doc = "Field `PERR` writer - Parity Error Enable"] -pub type PERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FERR` reader - Framing Error Enable"] -pub type FERR_R = crate::BitReader; +pub type FerrR = crate::BitReader; #[doc = "Field `FERR` writer - Framing Error Enable"] -pub type FERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPAF` reader - Multi-Processor Addr Frame Enable"] -pub type MPAF_R = crate::BitReader; +pub type MpafR = crate::BitReader; #[doc = "Field `MPAF` writer - Multi-Processor Addr Frame Enable"] -pub type MPAF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type MpafW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOADERR` reader - Load Error Enable"] -pub type LOADERR_R = crate::BitReader; +pub type LoaderrR = crate::BitReader; #[doc = "Field `LOADERR` writer - Load Error Enable"] -pub type LOADERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type LoaderrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCF` reader - Collision Check Fail Enable"] -pub type CCF_R = crate::BitReader; +pub type CcfR = crate::BitReader; #[doc = "Field `CCF` writer - Collision Check Fail Enable"] -pub type CCF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type CcfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXIDLE` reader - TX IDLE Enable"] -pub type TXIDLE_R = crate::BitReader; +pub type TxidleR = crate::BitReader; #[doc = "Field `TXIDLE` writer - TX IDLE Enable"] -pub type TXIDLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxidleW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CSWU` reader - CS Wake-up Enable"] -pub type CSWU_R = crate::BitReader; +pub type CswuR = crate::BitReader; #[doc = "Field `CSWU` writer - CS Wake-up Enable"] -pub type CSWU_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type CswuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STARTF` reader - Start Frame Enable"] -pub type STARTF_R = crate::BitReader; +pub type StartfR = crate::BitReader; #[doc = "Field `STARTF` writer - Start Frame Enable"] -pub type STARTF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type StartfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SIGF` reader - Signal Frame Enable"] -pub type SIGF_R = crate::BitReader; +pub type SigfR = crate::BitReader; #[doc = "Field `SIGF` writer - Signal Frame Enable"] -pub type SIGF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SigfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOBAUDDONE` reader - Auto Baud Complete Enable"] -pub type AUTOBAUDDONE_R = crate::BitReader; +pub type AutobauddoneR = crate::BitReader; #[doc = "Field `AUTOBAUDDONE` writer - Auto Baud Complete Enable"] -pub type AUTOBAUDDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AutobauddoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXTO` reader - RX Timeout Enable"] -pub type RXTO_R = crate::BitReader; +pub type RxtoR = crate::BitReader; #[doc = "Field `RXTO` writer - RX Timeout Enable"] -pub type RXTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxtoW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - TX Complete Enable"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new((self.bits & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - TX FIFO Level Enable"] #[inline(always)] - pub fn txfl(&self) -> TXFL_R { - TXFL_R::new(((self.bits >> 1) & 1) != 0) + pub fn txfl(&self) -> TxflR { + TxflR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RX FIFO Level Enable"] #[inline(always)] - pub fn rxfl(&self) -> RXFL_R { - RXFL_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxfl(&self) -> RxflR { + RxflR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - RX FIFO Full Enable"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - RX FIFO Overflow Enable"] #[inline(always)] - pub fn rxof(&self) -> RXOF_R { - RXOF_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxof(&self) -> RxofR { + RxofR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - RX FIFO Underflow Enable"] #[inline(always)] - pub fn rxuf(&self) -> RXUF_R { - RXUF_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxuf(&self) -> RxufR { + RxufR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX FIFO Overflow Enable"] #[inline(always)] - pub fn txof(&self) -> TXOF_R { - TXOF_R::new(((self.bits >> 6) & 1) != 0) + pub fn txof(&self) -> TxofR { + TxofR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - TX FIFO Underflow Enable"] #[inline(always)] - pub fn txuf(&self) -> TXUF_R { - TXUF_R::new(((self.bits >> 7) & 1) != 0) + pub fn txuf(&self) -> TxufR { + TxufR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Parity Error Enable"] #[inline(always)] - pub fn perr(&self) -> PERR_R { - PERR_R::new(((self.bits >> 8) & 1) != 0) + pub fn perr(&self) -> PerrR { + PerrR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Framing Error Enable"] #[inline(always)] - pub fn ferr(&self) -> FERR_R { - FERR_R::new(((self.bits >> 9) & 1) != 0) + pub fn ferr(&self) -> FerrR { + FerrR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Multi-Processor Addr Frame Enable"] #[inline(always)] - pub fn mpaf(&self) -> MPAF_R { - MPAF_R::new(((self.bits >> 10) & 1) != 0) + pub fn mpaf(&self) -> MpafR { + MpafR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Load Error Enable"] #[inline(always)] - pub fn loaderr(&self) -> LOADERR_R { - LOADERR_R::new(((self.bits >> 11) & 1) != 0) + pub fn loaderr(&self) -> LoaderrR { + LoaderrR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Collision Check Fail Enable"] #[inline(always)] - pub fn ccf(&self) -> CCF_R { - CCF_R::new(((self.bits >> 12) & 1) != 0) + pub fn ccf(&self) -> CcfR { + CcfR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - TX IDLE Enable"] #[inline(always)] - pub fn txidle(&self) -> TXIDLE_R { - TXIDLE_R::new(((self.bits >> 13) & 1) != 0) + pub fn txidle(&self) -> TxidleR { + TxidleR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 16 - CS Wake-up Enable"] #[inline(always)] - pub fn cswu(&self) -> CSWU_R { - CSWU_R::new(((self.bits >> 16) & 1) != 0) + pub fn cswu(&self) -> CswuR { + CswuR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 18 - Start Frame Enable"] #[inline(always)] - pub fn startf(&self) -> STARTF_R { - STARTF_R::new(((self.bits >> 18) & 1) != 0) + pub fn startf(&self) -> StartfR { + StartfR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Signal Frame Enable"] #[inline(always)] - pub fn sigf(&self) -> SIGF_R { - SIGF_R::new(((self.bits >> 19) & 1) != 0) + pub fn sigf(&self) -> SigfR { + SigfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 24 - Auto Baud Complete Enable"] #[inline(always)] - pub fn autobauddone(&self) -> AUTOBAUDDONE_R { - AUTOBAUDDONE_R::new(((self.bits >> 24) & 1) != 0) + pub fn autobauddone(&self) -> AutobauddoneR { + AutobauddoneR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - RX Timeout Enable"] #[inline(always)] - pub fn rxto(&self) -> RXTO_R { - RXTO_R::new(((self.bits >> 25) & 1) != 0) + pub fn rxto(&self) -> RxtoR { + RxtoR::new(((self.bits >> 25) & 1) != 0) } } impl W { #[doc = "Bit 0 - TX Complete Enable"] #[inline(always)] #[must_use] - pub fn txc(&mut self) -> TXC_W<0> { - TXC_W::new(self) + pub fn txc(&mut self) -> TxcW { + TxcW::new(self, 0) } #[doc = "Bit 1 - TX FIFO Level Enable"] #[inline(always)] #[must_use] - pub fn txfl(&mut self) -> TXFL_W<1> { - TXFL_W::new(self) + pub fn txfl(&mut self) -> TxflW { + TxflW::new(self, 1) } #[doc = "Bit 2 - RX FIFO Level Enable"] #[inline(always)] #[must_use] - pub fn rxfl(&mut self) -> RXFL_W<2> { - RXFL_W::new(self) + pub fn rxfl(&mut self) -> RxflW { + RxflW::new(self, 2) } #[doc = "Bit 3 - RX FIFO Full Enable"] #[inline(always)] #[must_use] - pub fn rxfull(&mut self) -> RXFULL_W<3> { - RXFULL_W::new(self) + pub fn rxfull(&mut self) -> RxfullW { + RxfullW::new(self, 3) } #[doc = "Bit 4 - RX FIFO Overflow Enable"] #[inline(always)] #[must_use] - pub fn rxof(&mut self) -> RXOF_W<4> { - RXOF_W::new(self) + pub fn rxof(&mut self) -> RxofW { + RxofW::new(self, 4) } #[doc = "Bit 5 - RX FIFO Underflow Enable"] #[inline(always)] #[must_use] - pub fn rxuf(&mut self) -> RXUF_W<5> { - RXUF_W::new(self) + pub fn rxuf(&mut self) -> RxufW { + RxufW::new(self, 5) } #[doc = "Bit 6 - TX FIFO Overflow Enable"] #[inline(always)] #[must_use] - pub fn txof(&mut self) -> TXOF_W<6> { - TXOF_W::new(self) + pub fn txof(&mut self) -> TxofW { + TxofW::new(self, 6) } #[doc = "Bit 7 - TX FIFO Underflow Enable"] #[inline(always)] #[must_use] - pub fn txuf(&mut self) -> TXUF_W<7> { - TXUF_W::new(self) + pub fn txuf(&mut self) -> TxufW { + TxufW::new(self, 7) } #[doc = "Bit 8 - Parity Error Enable"] #[inline(always)] #[must_use] - pub fn perr(&mut self) -> PERR_W<8> { - PERR_W::new(self) + pub fn perr(&mut self) -> PerrW { + PerrW::new(self, 8) } #[doc = "Bit 9 - Framing Error Enable"] #[inline(always)] #[must_use] - pub fn ferr(&mut self) -> FERR_W<9> { - FERR_W::new(self) + pub fn ferr(&mut self) -> FerrW { + FerrW::new(self, 9) } #[doc = "Bit 10 - Multi-Processor Addr Frame Enable"] #[inline(always)] #[must_use] - pub fn mpaf(&mut self) -> MPAF_W<10> { - MPAF_W::new(self) + pub fn mpaf(&mut self) -> MpafW { + MpafW::new(self, 10) } #[doc = "Bit 11 - Load Error Enable"] #[inline(always)] #[must_use] - pub fn loaderr(&mut self) -> LOADERR_W<11> { - LOADERR_W::new(self) + pub fn loaderr(&mut self) -> LoaderrW { + LoaderrW::new(self, 11) } #[doc = "Bit 12 - Collision Check Fail Enable"] #[inline(always)] #[must_use] - pub fn ccf(&mut self) -> CCF_W<12> { - CCF_W::new(self) + pub fn ccf(&mut self) -> CcfW { + CcfW::new(self, 12) } #[doc = "Bit 13 - TX IDLE Enable"] #[inline(always)] #[must_use] - pub fn txidle(&mut self) -> TXIDLE_W<13> { - TXIDLE_W::new(self) + pub fn txidle(&mut self) -> TxidleW { + TxidleW::new(self, 13) } #[doc = "Bit 16 - CS Wake-up Enable"] #[inline(always)] #[must_use] - pub fn cswu(&mut self) -> CSWU_W<16> { - CSWU_W::new(self) + pub fn cswu(&mut self) -> CswuW { + CswuW::new(self, 16) } #[doc = "Bit 18 - Start Frame Enable"] #[inline(always)] #[must_use] - pub fn startf(&mut self) -> STARTF_W<18> { - STARTF_W::new(self) + pub fn startf(&mut self) -> StartfW { + StartfW::new(self, 18) } #[doc = "Bit 19 - Signal Frame Enable"] #[inline(always)] #[must_use] - pub fn sigf(&mut self) -> SIGF_W<19> { - SIGF_W::new(self) + pub fn sigf(&mut self) -> SigfW { + SigfW::new(self, 19) } #[doc = "Bit 24 - Auto Baud Complete Enable"] #[inline(always)] #[must_use] - pub fn autobauddone(&mut self) -> AUTOBAUDDONE_W<24> { - AUTOBAUDDONE_W::new(self) + pub fn autobauddone(&mut self) -> AutobauddoneW { + AutobauddoneW::new(self, 24) } #[doc = "Bit 25 - RX Timeout Enable"] #[inline(always)] #[must_use] - pub fn rxto(&mut self) -> RXTO_W<25> { - RXTO_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rxto(&mut self) -> RxtoW { + RxtoW::new(self, 25) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/if_.rs index 72124ce..7baab2e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/if_.rs @@ -1,350 +1,310 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXC` reader - TX Complete Interrupt Flag"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXC` writer - TX Complete Interrupt Flag"] -pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFL` reader - TX FIFO Level Interrupt Flag"] -pub type TXFL_R = crate::BitReader; +pub type TxflR = crate::BitReader; #[doc = "Field `TXFL` writer - TX FIFO Level Interrupt Flag"] -pub type TXFL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxflW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFL` reader - RX FIFO Level Interrupt Flag"] -pub type RXFL_R = crate::BitReader; +pub type RxflR = crate::BitReader; #[doc = "Field `RXFL` writer - RX FIFO Level Interrupt Flag"] -pub type RXFL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxflW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFULL` reader - RX FIFO Full Interrupt Flag"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXFULL` writer - RX FIFO Full Interrupt Flag"] -pub type RXFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxfullW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXOF` reader - RX FIFO Overflow Interrupt Flag"] -pub type RXOF_R = crate::BitReader; +pub type RxofR = crate::BitReader; #[doc = "Field `RXOF` writer - RX FIFO Overflow Interrupt Flag"] -pub type RXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUF` reader - RX FIFO Underflow Interrupt Flag"] -pub type RXUF_R = crate::BitReader; +pub type RxufR = crate::BitReader; #[doc = "Field `RXUF` writer - RX FIFO Underflow Interrupt Flag"] -pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXOF` reader - TX FIFO Overflow Interrupt Flag"] -pub type TXOF_R = crate::BitReader; +pub type TxofR = crate::BitReader; #[doc = "Field `TXOF` writer - TX FIFO Overflow Interrupt Flag"] -pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXUF` reader - TX FIFO Underflow Interrupt Flag"] -pub type TXUF_R = crate::BitReader; +pub type TxufR = crate::BitReader; #[doc = "Field `TXUF` writer - TX FIFO Underflow Interrupt Flag"] -pub type TXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PERR` reader - Parity Error Interrupt Flag"] -pub type PERR_R = crate::BitReader; +pub type PerrR = crate::BitReader; #[doc = "Field `PERR` writer - Parity Error Interrupt Flag"] -pub type PERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FERR` reader - Framing Error Interrupt Flag"] -pub type FERR_R = crate::BitReader; +pub type FerrR = crate::BitReader; #[doc = "Field `FERR` writer - Framing Error Interrupt Flag"] -pub type FERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPAF` reader - Multi-Processor Address Frame Interrupt"] -pub type MPAF_R = crate::BitReader; +pub type MpafR = crate::BitReader; #[doc = "Field `MPAF` writer - Multi-Processor Address Frame Interrupt"] -pub type MPAF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type MpafW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOADERR` reader - Load Error Interrupt Flag"] -pub type LOADERR_R = crate::BitReader; +pub type LoaderrR = crate::BitReader; #[doc = "Field `LOADERR` writer - Load Error Interrupt Flag"] -pub type LOADERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type LoaderrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCF` reader - Collision Check Fail Interrupt Flag"] -pub type CCF_R = crate::BitReader; +pub type CcfR = crate::BitReader; #[doc = "Field `CCF` writer - Collision Check Fail Interrupt Flag"] -pub type CCF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type CcfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXIDLE` reader - TX Idle Interrupt Flag"] -pub type TXIDLE_R = crate::BitReader; +pub type TxidleR = crate::BitReader; #[doc = "Field `TXIDLE` writer - TX Idle Interrupt Flag"] -pub type TXIDLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxidleW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CSWU` reader - CS Wake-up Interrupt Flag"] -pub type CSWU_R = crate::BitReader; +pub type CswuR = crate::BitReader; #[doc = "Field `CSWU` writer - CS Wake-up Interrupt Flag"] -pub type CSWU_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type CswuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STARTF` reader - Start Frame Interrupt Flag"] -pub type STARTF_R = crate::BitReader; +pub type StartfR = crate::BitReader; #[doc = "Field `STARTF` writer - Start Frame Interrupt Flag"] -pub type STARTF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type StartfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SIGF` reader - Signal Frame Interrupt Flag"] -pub type SIGF_R = crate::BitReader; +pub type SigfR = crate::BitReader; #[doc = "Field `SIGF` writer - Signal Frame Interrupt Flag"] -pub type SIGF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SigfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOBAUDDONE` reader - Auto Baud Complete Interrupt Flag"] -pub type AUTOBAUDDONE_R = crate::BitReader; +pub type AutobauddoneR = crate::BitReader; #[doc = "Field `AUTOBAUDDONE` writer - Auto Baud Complete Interrupt Flag"] -pub type AUTOBAUDDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AutobauddoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXTO` reader - RX Timeout Interrupt Flag"] -pub type RXTO_R = crate::BitReader; +pub type RxtoR = crate::BitReader; #[doc = "Field `RXTO` writer - RX Timeout Interrupt Flag"] -pub type RXTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxtoW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - TX Complete Interrupt Flag"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new((self.bits & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - TX FIFO Level Interrupt Flag"] #[inline(always)] - pub fn txfl(&self) -> TXFL_R { - TXFL_R::new(((self.bits >> 1) & 1) != 0) + pub fn txfl(&self) -> TxflR { + TxflR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RX FIFO Level Interrupt Flag"] #[inline(always)] - pub fn rxfl(&self) -> RXFL_R { - RXFL_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxfl(&self) -> RxflR { + RxflR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - RX FIFO Full Interrupt Flag"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - RX FIFO Overflow Interrupt Flag"] #[inline(always)] - pub fn rxof(&self) -> RXOF_R { - RXOF_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxof(&self) -> RxofR { + RxofR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - RX FIFO Underflow Interrupt Flag"] #[inline(always)] - pub fn rxuf(&self) -> RXUF_R { - RXUF_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxuf(&self) -> RxufR { + RxufR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX FIFO Overflow Interrupt Flag"] #[inline(always)] - pub fn txof(&self) -> TXOF_R { - TXOF_R::new(((self.bits >> 6) & 1) != 0) + pub fn txof(&self) -> TxofR { + TxofR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - TX FIFO Underflow Interrupt Flag"] #[inline(always)] - pub fn txuf(&self) -> TXUF_R { - TXUF_R::new(((self.bits >> 7) & 1) != 0) + pub fn txuf(&self) -> TxufR { + TxufR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Parity Error Interrupt Flag"] #[inline(always)] - pub fn perr(&self) -> PERR_R { - PERR_R::new(((self.bits >> 8) & 1) != 0) + pub fn perr(&self) -> PerrR { + PerrR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Framing Error Interrupt Flag"] #[inline(always)] - pub fn ferr(&self) -> FERR_R { - FERR_R::new(((self.bits >> 9) & 1) != 0) + pub fn ferr(&self) -> FerrR { + FerrR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Multi-Processor Address Frame Interrupt"] #[inline(always)] - pub fn mpaf(&self) -> MPAF_R { - MPAF_R::new(((self.bits >> 10) & 1) != 0) + pub fn mpaf(&self) -> MpafR { + MpafR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Load Error Interrupt Flag"] #[inline(always)] - pub fn loaderr(&self) -> LOADERR_R { - LOADERR_R::new(((self.bits >> 11) & 1) != 0) + pub fn loaderr(&self) -> LoaderrR { + LoaderrR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Collision Check Fail Interrupt Flag"] #[inline(always)] - pub fn ccf(&self) -> CCF_R { - CCF_R::new(((self.bits >> 12) & 1) != 0) + pub fn ccf(&self) -> CcfR { + CcfR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - TX Idle Interrupt Flag"] #[inline(always)] - pub fn txidle(&self) -> TXIDLE_R { - TXIDLE_R::new(((self.bits >> 13) & 1) != 0) + pub fn txidle(&self) -> TxidleR { + TxidleR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 16 - CS Wake-up Interrupt Flag"] #[inline(always)] - pub fn cswu(&self) -> CSWU_R { - CSWU_R::new(((self.bits >> 16) & 1) != 0) + pub fn cswu(&self) -> CswuR { + CswuR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 18 - Start Frame Interrupt Flag"] #[inline(always)] - pub fn startf(&self) -> STARTF_R { - STARTF_R::new(((self.bits >> 18) & 1) != 0) + pub fn startf(&self) -> StartfR { + StartfR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Signal Frame Interrupt Flag"] #[inline(always)] - pub fn sigf(&self) -> SIGF_R { - SIGF_R::new(((self.bits >> 19) & 1) != 0) + pub fn sigf(&self) -> SigfR { + SigfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 24 - Auto Baud Complete Interrupt Flag"] #[inline(always)] - pub fn autobauddone(&self) -> AUTOBAUDDONE_R { - AUTOBAUDDONE_R::new(((self.bits >> 24) & 1) != 0) + pub fn autobauddone(&self) -> AutobauddoneR { + AutobauddoneR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - RX Timeout Interrupt Flag"] #[inline(always)] - pub fn rxto(&self) -> RXTO_R { - RXTO_R::new(((self.bits >> 25) & 1) != 0) + pub fn rxto(&self) -> RxtoR { + RxtoR::new(((self.bits >> 25) & 1) != 0) } } impl W { #[doc = "Bit 0 - TX Complete Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txc(&mut self) -> TXC_W<0> { - TXC_W::new(self) + pub fn txc(&mut self) -> TxcW { + TxcW::new(self, 0) } #[doc = "Bit 1 - TX FIFO Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txfl(&mut self) -> TXFL_W<1> { - TXFL_W::new(self) + pub fn txfl(&mut self) -> TxflW { + TxflW::new(self, 1) } #[doc = "Bit 2 - RX FIFO Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxfl(&mut self) -> RXFL_W<2> { - RXFL_W::new(self) + pub fn rxfl(&mut self) -> RxflW { + RxflW::new(self, 2) } #[doc = "Bit 3 - RX FIFO Full Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxfull(&mut self) -> RXFULL_W<3> { - RXFULL_W::new(self) + pub fn rxfull(&mut self) -> RxfullW { + RxfullW::new(self, 3) } #[doc = "Bit 4 - RX FIFO Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxof(&mut self) -> RXOF_W<4> { - RXOF_W::new(self) + pub fn rxof(&mut self) -> RxofW { + RxofW::new(self, 4) } #[doc = "Bit 5 - RX FIFO Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxuf(&mut self) -> RXUF_W<5> { - RXUF_W::new(self) + pub fn rxuf(&mut self) -> RxufW { + RxufW::new(self, 5) } #[doc = "Bit 6 - TX FIFO Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txof(&mut self) -> TXOF_W<6> { - TXOF_W::new(self) + pub fn txof(&mut self) -> TxofW { + TxofW::new(self, 6) } #[doc = "Bit 7 - TX FIFO Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txuf(&mut self) -> TXUF_W<7> { - TXUF_W::new(self) + pub fn txuf(&mut self) -> TxufW { + TxufW::new(self, 7) } #[doc = "Bit 8 - Parity Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn perr(&mut self) -> PERR_W<8> { - PERR_W::new(self) + pub fn perr(&mut self) -> PerrW { + PerrW::new(self, 8) } #[doc = "Bit 9 - Framing Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ferr(&mut self) -> FERR_W<9> { - FERR_W::new(self) + pub fn ferr(&mut self) -> FerrW { + FerrW::new(self, 9) } #[doc = "Bit 10 - Multi-Processor Address Frame Interrupt"] #[inline(always)] #[must_use] - pub fn mpaf(&mut self) -> MPAF_W<10> { - MPAF_W::new(self) + pub fn mpaf(&mut self) -> MpafW { + MpafW::new(self, 10) } #[doc = "Bit 11 - Load Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn loaderr(&mut self) -> LOADERR_W<11> { - LOADERR_W::new(self) + pub fn loaderr(&mut self) -> LoaderrW { + LoaderrW::new(self, 11) } #[doc = "Bit 12 - Collision Check Fail Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ccf(&mut self) -> CCF_W<12> { - CCF_W::new(self) + pub fn ccf(&mut self) -> CcfW { + CcfW::new(self, 12) } #[doc = "Bit 13 - TX Idle Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txidle(&mut self) -> TXIDLE_W<13> { - TXIDLE_W::new(self) + pub fn txidle(&mut self) -> TxidleW { + TxidleW::new(self, 13) } #[doc = "Bit 16 - CS Wake-up Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cswu(&mut self) -> CSWU_W<16> { - CSWU_W::new(self) + pub fn cswu(&mut self) -> CswuW { + CswuW::new(self, 16) } #[doc = "Bit 18 - Start Frame Interrupt Flag"] #[inline(always)] #[must_use] - pub fn startf(&mut self) -> STARTF_W<18> { - STARTF_W::new(self) + pub fn startf(&mut self) -> StartfW { + StartfW::new(self, 18) } #[doc = "Bit 19 - Signal Frame Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sigf(&mut self) -> SIGF_W<19> { - SIGF_W::new(self) + pub fn sigf(&mut self) -> SigfW { + SigfW::new(self, 19) } #[doc = "Bit 24 - Auto Baud Complete Interrupt Flag"] #[inline(always)] #[must_use] - pub fn autobauddone(&mut self) -> AUTOBAUDDONE_W<24> { - AUTOBAUDDONE_W::new(self) + pub fn autobauddone(&mut self) -> AutobauddoneW { + AutobauddoneW::new(self, 24) } #[doc = "Bit 25 - RX Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxto(&mut self) -> RXTO_W<25> { - RXTO_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rxto(&mut self) -> RxtoW { + RxtoW::new(self, 25) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/ipversion.rs index 85cb381..0068345 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/irhfcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/irhfcfg.rs index 5216f33..2e61f42 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/irhfcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/irhfcfg.rs @@ -1,231 +1,201 @@ #[doc = "Register `IRHFCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IRHFCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `IRHFEN` reader - Enable IrDA Module"] -pub type IRHFEN_R = crate::BitReader; +pub type IrhfenR = crate::BitReader; #[doc = "Field `IRHFEN` writer - Enable IrDA Module"] -pub type IRHFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRHFCFG_SPEC, bool, O>; -#[doc = "Field `IRHFPW` reader - IrDA TX Pulse Width"] -pub type IRHFPW_R = crate::FieldReader; +pub type IrhfenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "IrDA TX Pulse Width\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum IRHFPW_A { +pub enum Irhfpw { #[doc = "0: IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1"] - ONE = 0, + One = 0, #[doc = "1: IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1"] - TWO = 1, + Two = 1, #[doc = "2: IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1"] - THREE = 2, + Three = 2, #[doc = "3: IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1"] - FOUR = 3, + Four = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: IRHFPW_A) -> Self { + fn from(variant: Irhfpw) -> Self { variant as _ } } -impl IRHFPW_R { +impl crate::FieldSpec for Irhfpw { + type Ux = u8; +} +impl crate::IsEnum for Irhfpw {} +#[doc = "Field `IRHFPW` reader - IrDA TX Pulse Width"] +pub type IrhfpwR = crate::FieldReader; +impl IrhfpwR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> IRHFPW_A { + pub const fn variant(&self) -> Irhfpw { match self.bits { - 0 => IRHFPW_A::ONE, - 1 => IRHFPW_A::TWO, - 2 => IRHFPW_A::THREE, - 3 => IRHFPW_A::FOUR, + 0 => Irhfpw::One, + 1 => Irhfpw::Two, + 2 => Irhfpw::Three, + 3 => Irhfpw::Four, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == IRHFPW_A::ONE + *self == Irhfpw::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == IRHFPW_A::TWO + *self == Irhfpw::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == IRHFPW_A::THREE + *self == Irhfpw::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == IRHFPW_A::FOUR + *self == Irhfpw::Four } } #[doc = "Field `IRHFPW` writer - IrDA TX Pulse Width"] -pub type IRHFPW_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, IRHFCFG_SPEC, u8, IRHFPW_A, 2, O>; -impl<'a, const O: u8> IRHFPW_W<'a, O> { +pub type IrhfpwW<'a, REG> = crate::FieldWriter<'a, REG, 2, Irhfpw, crate::Safe>; +impl<'a, REG> IrhfpwW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(IRHFPW_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Irhfpw::One) } #[doc = "IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(IRHFPW_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Irhfpw::Two) } #[doc = "IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(IRHFPW_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Irhfpw::Three) } #[doc = "IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(IRHFPW_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Irhfpw::Four) } } -#[doc = "Field `IRHFFILT` reader - IrDA RX Filter"] -pub type IRHFFILT_R = crate::BitReader; #[doc = "IrDA RX Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IRHFFILT_A { +pub enum Irhffilt { #[doc = "0: No filter enabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Filter enabled. IrDA pulse must be high for at least 5 consecutive clock cycles to be detected"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IRHFFILT_A) -> Self { + fn from(variant: Irhffilt) -> Self { variant as u8 != 0 } } -impl IRHFFILT_R { +#[doc = "Field `IRHFFILT` reader - IrDA RX Filter"] +pub type IrhffiltR = crate::BitReader; +impl IrhffiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> IRHFFILT_A { + pub const fn variant(&self) -> Irhffilt { match self.bits { - false => IRHFFILT_A::DISABLE, - true => IRHFFILT_A::ENABLE, + false => Irhffilt::Disable, + true => Irhffilt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "No filter enabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == IRHFFILT_A::DISABLE + *self == Irhffilt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Filter enabled. IrDA pulse must be high for at least 5 consecutive clock cycles to be detected"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == IRHFFILT_A::ENABLE + *self == Irhffilt::Enable } } #[doc = "Field `IRHFFILT` writer - IrDA RX Filter"] -pub type IRHFFILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRHFCFG_SPEC, IRHFFILT_A, O>; -impl<'a, const O: u8> IRHFFILT_W<'a, O> { +pub type IrhffiltW<'a, REG> = crate::BitWriter<'a, REG, Irhffilt>; +impl<'a, REG> IrhffiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No filter enabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(IRHFFILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Irhffilt::Disable) } #[doc = "Filter enabled. IrDA pulse must be high for at least 5 consecutive clock cycles to be detected"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(IRHFFILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Irhffilt::Enable) } } impl R { #[doc = "Bit 0 - Enable IrDA Module"] #[inline(always)] - pub fn irhfen(&self) -> IRHFEN_R { - IRHFEN_R::new((self.bits & 1) != 0) + pub fn irhfen(&self) -> IrhfenR { + IrhfenR::new((self.bits & 1) != 0) } #[doc = "Bits 1:2 - IrDA TX Pulse Width"] #[inline(always)] - pub fn irhfpw(&self) -> IRHFPW_R { - IRHFPW_R::new(((self.bits >> 1) & 3) as u8) + pub fn irhfpw(&self) -> IrhfpwR { + IrhfpwR::new(((self.bits >> 1) & 3) as u8) } #[doc = "Bit 3 - IrDA RX Filter"] #[inline(always)] - pub fn irhffilt(&self) -> IRHFFILT_R { - IRHFFILT_R::new(((self.bits >> 3) & 1) != 0) + pub fn irhffilt(&self) -> IrhffiltR { + IrhffiltR::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable IrDA Module"] #[inline(always)] #[must_use] - pub fn irhfen(&mut self) -> IRHFEN_W<0> { - IRHFEN_W::new(self) + pub fn irhfen(&mut self) -> IrhfenW { + IrhfenW::new(self, 0) } #[doc = "Bits 1:2 - IrDA TX Pulse Width"] #[inline(always)] #[must_use] - pub fn irhfpw(&mut self) -> IRHFPW_W<1> { - IRHFPW_W::new(self) + pub fn irhfpw(&mut self) -> IrhfpwW { + IrhfpwW::new(self, 1) } #[doc = "Bit 3 - IrDA RX Filter"] #[inline(always)] #[must_use] - pub fn irhffilt(&mut self) -> IRHFFILT_W<3> { - IRHFFILT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn irhffilt(&mut self) -> IrhffiltW { + IrhffiltW::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irhfcfg](index.html) module"] -pub struct IRHFCFG_SPEC; -impl crate::RegisterSpec for IRHFCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`irhfcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irhfcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrhfcfgSpec; +impl crate::RegisterSpec for IrhfcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [irhfcfg::R](R) reader structure"] -impl crate::Readable for IRHFCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [irhfcfg::W](W) writer structure"] -impl crate::Writable for IRHFCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`irhfcfg::R`](R) reader structure"] +impl crate::Readable for IrhfcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`irhfcfg::W`](W) writer structure"] +impl crate::Writable for IrhfcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRHFCFG to value 0"] -impl crate::Resettable for IRHFCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IrhfcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/irlfcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/irlfcfg.rs index d43676d..5f2b0ce 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/irlfcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/irlfcfg.rs @@ -1,80 +1,40 @@ #[doc = "Register `IRLFCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IRLFCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `IRLFEN` reader - Pulse Generator/Extender Enable"] -pub type IRLFEN_R = crate::BitReader; +pub type IrlfenR = crate::BitReader; #[doc = "Field `IRLFEN` writer - Pulse Generator/Extender Enable"] -pub type IRLFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRLFCFG_SPEC, bool, O>; +pub type IrlfenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Pulse Generator/Extender Enable"] #[inline(always)] - pub fn irlfen(&self) -> IRLFEN_R { - IRLFEN_R::new((self.bits & 1) != 0) + pub fn irlfen(&self) -> IrlfenR { + IrlfenR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - Pulse Generator/Extender Enable"] #[inline(always)] #[must_use] - pub fn irlfen(&mut self) -> IRLFEN_W<0> { - IRLFEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn irlfen(&mut self) -> IrlfenW { + IrlfenW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irlfcfg](index.html) module"] -pub struct IRLFCFG_SPEC; -impl crate::RegisterSpec for IRLFCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`irlfcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irlfcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrlfcfgSpec; +impl crate::RegisterSpec for IrlfcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [irlfcfg::R](R) reader structure"] -impl crate::Readable for IRLFCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [irlfcfg::W](W) writer structure"] -impl crate::Writable for IRLFCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`irlfcfg::R`](R) reader structure"] +impl crate::Readable for IrlfcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`irlfcfg::W`](W) writer structure"] +impl crate::Writable for IrlfcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRLFCFG to value 0"] -impl crate::Resettable for IRLFCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IrlfcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/rxdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/rxdata.rs index f2cf950..cb4530c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/rxdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/rxdata.rs @@ -1,37 +1,22 @@ #[doc = "Register `RXDATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATA` reader - RX Data and Control bits"] -pub type RXDATA_R = crate::FieldReader; +pub type RxdataR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - RX Data and Control bits"] #[inline(always)] - pub fn rxdata(&self) -> RXDATA_R { - RXDATA_R::new((self.bits & 0xffff) as u16) + pub fn rxdata(&self) -> RxdataR { + RxdataR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdata](index.html) module"] -pub struct RXDATA_SPEC; -impl crate::RegisterSpec for RXDATA_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdata::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdataSpec; +impl crate::RegisterSpec for RxdataSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdata::R](R) reader structure"] -impl crate::Readable for RXDATA_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdata::R`](R) reader structure"] +impl crate::Readable for RxdataSpec {} #[doc = "`reset()` method sets RXDATA to value 0"] -impl crate::Resettable for RXDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/rxdatap.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/rxdatap.rs index f78bc3c..b490a48 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/rxdatap.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/rxdatap.rs @@ -1,37 +1,22 @@ #[doc = "Register `RXDATAP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATAP` reader - RX Data Peek"] -pub type RXDATAP_R = crate::FieldReader; +pub type RxdatapR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - RX Data Peek"] #[inline(always)] - pub fn rxdatap(&self) -> RXDATAP_R { - RXDATAP_R::new((self.bits & 0xffff) as u16) + pub fn rxdatap(&self) -> RxdatapR { + RxdatapR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdatap](index.html) module"] -pub struct RXDATAP_SPEC; -impl crate::RegisterSpec for RXDATAP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdatap::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdatapSpec; +impl crate::RegisterSpec for RxdatapSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdatap::R](R) reader structure"] -impl crate::Readable for RXDATAP_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdatap::R`](R) reader structure"] +impl crate::Readable for RxdatapSpec {} #[doc = "`reset()` method sets RXDATAP to value 0"] -impl crate::Resettable for RXDATAP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdatapSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/sigframecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/sigframecfg.rs index 453819f..96b88c1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/sigframecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/sigframecfg.rs @@ -1,81 +1,40 @@ #[doc = "Register `SIGFRAMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SIGFRAMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SIGFRAME` reader - Signal Frame Value"] -pub type SIGFRAME_R = crate::FieldReader; +pub type SigframeR = crate::FieldReader; #[doc = "Field `SIGFRAME` writer - Signal Frame Value"] -pub type SIGFRAME_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SIGFRAMECFG_SPEC, u16, u16, 9, O>; +pub type SigframeW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; impl R { #[doc = "Bits 0:8 - Signal Frame Value"] #[inline(always)] - pub fn sigframe(&self) -> SIGFRAME_R { - SIGFRAME_R::new((self.bits & 0x01ff) as u16) + pub fn sigframe(&self) -> SigframeR { + SigframeR::new((self.bits & 0x01ff) as u16) } } impl W { #[doc = "Bits 0:8 - Signal Frame Value"] #[inline(always)] #[must_use] - pub fn sigframe(&mut self) -> SIGFRAME_W<0> { - SIGFRAME_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sigframe(&mut self) -> SigframeW { + SigframeW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sigframecfg](index.html) module"] -pub struct SIGFRAMECFG_SPEC; -impl crate::RegisterSpec for SIGFRAMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sigframecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sigframecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SigframecfgSpec; +impl crate::RegisterSpec for SigframecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [sigframecfg::R](R) reader structure"] -impl crate::Readable for SIGFRAMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sigframecfg::W](W) writer structure"] -impl crate::Writable for SIGFRAMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`sigframecfg::R`](R) reader structure"] +impl crate::Readable for SigframecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`sigframecfg::W`](W) writer structure"] +impl crate::Writable for SigframecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SIGFRAMECFG to value 0"] -impl crate::Resettable for SIGFRAMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SigframecfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/startframecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/startframecfg.rs index 44571b1..67dd6bf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/startframecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/startframecfg.rs @@ -1,81 +1,40 @@ #[doc = "Register `STARTFRAMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `STARTFRAMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `STARTFRAME` reader - Start Frame"] -pub type STARTFRAME_R = crate::FieldReader; +pub type StartframeR = crate::FieldReader; #[doc = "Field `STARTFRAME` writer - Start Frame"] -pub type STARTFRAME_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, STARTFRAMECFG_SPEC, u16, u16, 9, O>; +pub type StartframeW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; impl R { #[doc = "Bits 0:8 - Start Frame"] #[inline(always)] - pub fn startframe(&self) -> STARTFRAME_R { - STARTFRAME_R::new((self.bits & 0x01ff) as u16) + pub fn startframe(&self) -> StartframeR { + StartframeR::new((self.bits & 0x01ff) as u16) } } impl W { #[doc = "Bits 0:8 - Start Frame"] #[inline(always)] #[must_use] - pub fn startframe(&mut self) -> STARTFRAME_W<0> { - STARTFRAME_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn startframe(&mut self) -> StartframeW { + StartframeW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [startframecfg](index.html) module"] -pub struct STARTFRAMECFG_SPEC; -impl crate::RegisterSpec for STARTFRAMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`startframecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`startframecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StartframecfgSpec; +impl crate::RegisterSpec for StartframecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [startframecfg::R](R) reader structure"] -impl crate::Readable for STARTFRAMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [startframecfg::W](W) writer structure"] -impl crate::Writable for STARTFRAMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`startframecfg::R`](R) reader structure"] +impl crate::Readable for StartframecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`startframecfg::W`](W) writer structure"] +impl crate::Writable for StartframecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets STARTFRAMECFG to value 0"] -impl crate::Resettable for STARTFRAMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StartframecfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/status.rs index 3ad48a5..b418af7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/status.rs @@ -1,121 +1,106 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXENS` reader - Receiver Enable Status"] -pub type RXENS_R = crate::BitReader; +pub type RxensR = crate::BitReader; #[doc = "Field `TXENS` reader - Transmitter Enable Status"] -pub type TXENS_R = crate::BitReader; +pub type TxensR = crate::BitReader; #[doc = "Field `RXBLOCK` reader - Block Incoming Data"] -pub type RXBLOCK_R = crate::BitReader; +pub type RxblockR = crate::BitReader; #[doc = "Field `TXTRI` reader - Transmitter Tristated"] -pub type TXTRI_R = crate::BitReader; +pub type TxtriR = crate::BitReader; #[doc = "Field `TXC` reader - TX Complete"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXFL` reader - TX FIFO Level"] -pub type TXFL_R = crate::BitReader; +pub type TxflR = crate::BitReader; #[doc = "Field `RXFL` reader - RX FIFO Level"] -pub type RXFL_R = crate::BitReader; +pub type RxflR = crate::BitReader; #[doc = "Field `RXFULL` reader - RX FIFO Full"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXIDLE` reader - RX Idle"] -pub type RXIDLE_R = crate::BitReader; +pub type RxidleR = crate::BitReader; #[doc = "Field `TXIDLE` reader - TX Idle"] -pub type TXIDLE_R = crate::BitReader; +pub type TxidleR = crate::BitReader; #[doc = "Field `TXFCNT` reader - Valid entries in TX FIFO"] -pub type TXFCNT_R = crate::FieldReader; +pub type TxfcntR = crate::FieldReader; #[doc = "Field `AUTOBAUDDONE` reader - Auto Baud Rate Detection Completed"] -pub type AUTOBAUDDONE_R = crate::BitReader; +pub type AutobauddoneR = crate::BitReader; #[doc = "Field `CLEARTXBUSY` reader - TX FIFO Clear Busy"] -pub type CLEARTXBUSY_R = crate::BitReader; +pub type CleartxbusyR = crate::BitReader; impl R { #[doc = "Bit 0 - Receiver Enable Status"] #[inline(always)] - pub fn rxens(&self) -> RXENS_R { - RXENS_R::new((self.bits & 1) != 0) + pub fn rxens(&self) -> RxensR { + RxensR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transmitter Enable Status"] #[inline(always)] - pub fn txens(&self) -> TXENS_R { - TXENS_R::new(((self.bits >> 1) & 1) != 0) + pub fn txens(&self) -> TxensR { + TxensR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - Block Incoming Data"] #[inline(always)] - pub fn rxblock(&self) -> RXBLOCK_R { - RXBLOCK_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxblock(&self) -> RxblockR { + RxblockR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Transmitter Tristated"] #[inline(always)] - pub fn txtri(&self) -> TXTRI_R { - TXTRI_R::new(((self.bits >> 4) & 1) != 0) + pub fn txtri(&self) -> TxtriR { + TxtriR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - TX Complete"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new(((self.bits >> 5) & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX FIFO Level"] #[inline(always)] - pub fn txfl(&self) -> TXFL_R { - TXFL_R::new(((self.bits >> 6) & 1) != 0) + pub fn txfl(&self) -> TxflR { + TxflR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - RX FIFO Level"] #[inline(always)] - pub fn rxfl(&self) -> RXFL_R { - RXFL_R::new(((self.bits >> 7) & 1) != 0) + pub fn rxfl(&self) -> RxflR { + RxflR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - RX FIFO Full"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 8) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 12 - RX Idle"] #[inline(always)] - pub fn rxidle(&self) -> RXIDLE_R { - RXIDLE_R::new(((self.bits >> 12) & 1) != 0) + pub fn rxidle(&self) -> RxidleR { + RxidleR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - TX Idle"] #[inline(always)] - pub fn txidle(&self) -> TXIDLE_R { - TXIDLE_R::new(((self.bits >> 13) & 1) != 0) + pub fn txidle(&self) -> TxidleR { + TxidleR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bits 16:20 - Valid entries in TX FIFO"] #[inline(always)] - pub fn txfcnt(&self) -> TXFCNT_R { - TXFCNT_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn txfcnt(&self) -> TxfcntR { + TxfcntR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bit 24 - Auto Baud Rate Detection Completed"] #[inline(always)] - pub fn autobauddone(&self) -> AUTOBAUDDONE_R { - AUTOBAUDDONE_R::new(((self.bits >> 24) & 1) != 0) + pub fn autobauddone(&self) -> AutobauddoneR { + AutobauddoneR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - TX FIFO Clear Busy"] #[inline(always)] - pub fn cleartxbusy(&self) -> CLEARTXBUSY_R { - CLEARTXBUSY_R::new(((self.bits >> 25) & 1) != 0) + pub fn cleartxbusy(&self) -> CleartxbusyR { + CleartxbusyR::new(((self.bits >> 25) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0x3040"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0x3040; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0x3040; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/syncbusy.rs index 3190b02..713965c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/syncbusy.rs @@ -1,114 +1,99 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DIV` reader - SYNCBUSY for DIV in CLKDIV"] -pub type DIV_R = crate::BitReader; +pub type DivR = crate::BitReader; #[doc = "Field `RXTEN` reader - SYNCBUSY for RXTEN in TRIGCTRL"] -pub type RXTEN_R = crate::BitReader; +pub type RxtenR = crate::BitReader; #[doc = "Field `TXTEN` reader - SYNCBUSY for TXTEN in TRIGCTRL"] -pub type TXTEN_R = crate::BitReader; +pub type TxtenR = crate::BitReader; #[doc = "Field `RXEN` reader - SYNCBUSY for RXEN in CMD"] -pub type RXEN_R = crate::BitReader; +pub type RxenR = crate::BitReader; #[doc = "Field `RXDIS` reader - SYNCBUSY for RXDIS in CMD"] -pub type RXDIS_R = crate::BitReader; +pub type RxdisR = crate::BitReader; #[doc = "Field `TXEN` reader - SYNCBUSY for TXEN in CMD"] -pub type TXEN_R = crate::BitReader; +pub type TxenR = crate::BitReader; #[doc = "Field `TXDIS` reader - SYNCBUSY for TXDIS in CMD"] -pub type TXDIS_R = crate::BitReader; +pub type TxdisR = crate::BitReader; #[doc = "Field `RXBLOCKEN` reader - SYNCBUSY for RXBLOCKEN in CMD"] -pub type RXBLOCKEN_R = crate::BitReader; +pub type RxblockenR = crate::BitReader; #[doc = "Field `RXBLOCKDIS` reader - SYNCBUSY for RXBLOCKDIS in CMD"] -pub type RXBLOCKDIS_R = crate::BitReader; +pub type RxblockdisR = crate::BitReader; #[doc = "Field `TXTRIEN` reader - SYNCBUSY for TXTRIEN in CMD"] -pub type TXTRIEN_R = crate::BitReader; +pub type TxtrienR = crate::BitReader; #[doc = "Field `TXTRIDIS` reader - SYNCBUSY in TXTRIDIS in CMD"] -pub type TXTRIDIS_R = crate::BitReader; +pub type TxtridisR = crate::BitReader; #[doc = "Field `AUTOTXTEN` reader - SYNCBUSY for AUTOTXTEN in TRIGCTRL"] -pub type AUTOTXTEN_R = crate::BitReader; +pub type AutotxtenR = crate::BitReader; impl R { #[doc = "Bit 0 - SYNCBUSY for DIV in CLKDIV"] #[inline(always)] - pub fn div(&self) -> DIV_R { - DIV_R::new((self.bits & 1) != 0) + pub fn div(&self) -> DivR { + DivR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - SYNCBUSY for RXTEN in TRIGCTRL"] #[inline(always)] - pub fn rxten(&self) -> RXTEN_R { - RXTEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn rxten(&self) -> RxtenR { + RxtenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - SYNCBUSY for TXTEN in TRIGCTRL"] #[inline(always)] - pub fn txten(&self) -> TXTEN_R { - TXTEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn txten(&self) -> TxtenR { + TxtenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - SYNCBUSY for RXEN in CMD"] #[inline(always)] - pub fn rxen(&self) -> RXEN_R { - RXEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxen(&self) -> RxenR { + RxenR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - SYNCBUSY for RXDIS in CMD"] #[inline(always)] - pub fn rxdis(&self) -> RXDIS_R { - RXDIS_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxdis(&self) -> RxdisR { + RxdisR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - SYNCBUSY for TXEN in CMD"] #[inline(always)] - pub fn txen(&self) -> TXEN_R { - TXEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn txen(&self) -> TxenR { + TxenR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - SYNCBUSY for TXDIS in CMD"] #[inline(always)] - pub fn txdis(&self) -> TXDIS_R { - TXDIS_R::new(((self.bits >> 6) & 1) != 0) + pub fn txdis(&self) -> TxdisR { + TxdisR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - SYNCBUSY for RXBLOCKEN in CMD"] #[inline(always)] - pub fn rxblocken(&self) -> RXBLOCKEN_R { - RXBLOCKEN_R::new(((self.bits >> 7) & 1) != 0) + pub fn rxblocken(&self) -> RxblockenR { + RxblockenR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - SYNCBUSY for RXBLOCKDIS in CMD"] #[inline(always)] - pub fn rxblockdis(&self) -> RXBLOCKDIS_R { - RXBLOCKDIS_R::new(((self.bits >> 8) & 1) != 0) + pub fn rxblockdis(&self) -> RxblockdisR { + RxblockdisR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - SYNCBUSY for TXTRIEN in CMD"] #[inline(always)] - pub fn txtrien(&self) -> TXTRIEN_R { - TXTRIEN_R::new(((self.bits >> 9) & 1) != 0) + pub fn txtrien(&self) -> TxtrienR { + TxtrienR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - SYNCBUSY in TXTRIDIS in CMD"] #[inline(always)] - pub fn txtridis(&self) -> TXTRIDIS_R { - TXTRIDIS_R::new(((self.bits >> 10) & 1) != 0) + pub fn txtridis(&self) -> TxtridisR { + TxtridisR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - SYNCBUSY for AUTOTXTEN in TRIGCTRL"] #[inline(always)] - pub fn autotxten(&self) -> AUTOTXTEN_R { - AUTOTXTEN_R::new(((self.bits >> 11) & 1) != 0) + pub fn autotxten(&self) -> AutotxtenR { + AutotxtenR::new(((self.bits >> 11) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/timingcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/timingcfg.rs index ba30f19..8c1ed53 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/timingcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/timingcfg.rs @@ -1,595 +1,584 @@ #[doc = "Register `TIMINGCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMINGCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `TXDELAY` reader - TX Delay Transmission"] -pub type TXDELAY_R = crate::FieldReader; +pub type W = crate::W; #[doc = "TX Delay Transmission\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TXDELAY_A { +pub enum Txdelay { #[doc = "0: Frames are transmitted immediately."] - NONE = 0, + None = 0, #[doc = "1: Transmission of new frames is delayed by a single bit period."] - SINGLE = 1, + Single = 1, #[doc = "2: Transmission of new frames is delayed by a two bit periods."] - DOUBLE = 2, + Double = 2, #[doc = "3: Transmission of new frames is delayed by a three bit periods."] - TRIPPLE = 3, + Tripple = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TXDELAY_A) -> Self { + fn from(variant: Txdelay) -> Self { variant as _ } } -impl TXDELAY_R { +impl crate::FieldSpec for Txdelay { + type Ux = u8; +} +impl crate::IsEnum for Txdelay {} +#[doc = "Field `TXDELAY` reader - TX Delay Transmission"] +pub type TxdelayR = crate::FieldReader; +impl TxdelayR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXDELAY_A { + pub const fn variant(&self) -> Txdelay { match self.bits { - 0 => TXDELAY_A::NONE, - 1 => TXDELAY_A::SINGLE, - 2 => TXDELAY_A::DOUBLE, - 3 => TXDELAY_A::TRIPPLE, + 0 => Txdelay::None, + 1 => Txdelay::Single, + 2 => Txdelay::Double, + 3 => Txdelay::Tripple, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Frames are transmitted immediately."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == TXDELAY_A::NONE + *self == Txdelay::None } - #[doc = "Checks if the value of the field is `SINGLE`"] + #[doc = "Transmission of new frames is delayed by a single bit period."] #[inline(always)] pub fn is_single(&self) -> bool { - *self == TXDELAY_A::SINGLE + *self == Txdelay::Single } - #[doc = "Checks if the value of the field is `DOUBLE`"] + #[doc = "Transmission of new frames is delayed by a two bit periods."] #[inline(always)] pub fn is_double(&self) -> bool { - *self == TXDELAY_A::DOUBLE + *self == Txdelay::Double } - #[doc = "Checks if the value of the field is `TRIPPLE`"] + #[doc = "Transmission of new frames is delayed by a three bit periods."] #[inline(always)] pub fn is_tripple(&self) -> bool { - *self == TXDELAY_A::TRIPPLE + *self == Txdelay::Tripple } } #[doc = "Field `TXDELAY` writer - TX Delay Transmission"] -pub type TXDELAY_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, TIMINGCFG_SPEC, u8, TXDELAY_A, 2, O>; -impl<'a, const O: u8> TXDELAY_W<'a, O> { +pub type TxdelayW<'a, REG> = crate::FieldWriter<'a, REG, 2, Txdelay, crate::Safe>; +impl<'a, REG> TxdelayW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Frames are transmitted immediately."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(TXDELAY_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Txdelay::None) } #[doc = "Transmission of new frames is delayed by a single bit period."] #[inline(always)] - pub fn single(self) -> &'a mut W { - self.variant(TXDELAY_A::SINGLE) + pub fn single(self) -> &'a mut crate::W { + self.variant(Txdelay::Single) } #[doc = "Transmission of new frames is delayed by a two bit periods."] #[inline(always)] - pub fn double(self) -> &'a mut W { - self.variant(TXDELAY_A::DOUBLE) + pub fn double(self) -> &'a mut crate::W { + self.variant(Txdelay::Double) } #[doc = "Transmission of new frames is delayed by a three bit periods."] #[inline(always)] - pub fn tripple(self) -> &'a mut W { - self.variant(TXDELAY_A::TRIPPLE) + pub fn tripple(self) -> &'a mut crate::W { + self.variant(Txdelay::Tripple) } } -#[doc = "Field `CSSETUP` reader - Chip Select Setup"] -pub type CSSETUP_R = crate::FieldReader; #[doc = "Chip Select Setup\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CSSETUP_A { +pub enum Cssetup { #[doc = "0: CS is asserted half or 1 baud-time before the start of transmission depending on CLKPHASE equal to 1 or 0 respectively"] - ZERO = 0, + Zero = 0, #[doc = "1: CS is asserted 1 additional baud-time before start of transmission"] - ONE = 1, + One = 1, #[doc = "2: CS is asserted 2 additional baud-times before start of transmission"] - TWO = 2, + Two = 2, #[doc = "3: CS is asserted 3 additional baud-times before start of transmission"] - THREE = 3, + Three = 3, #[doc = "4: CS is asserted 4 additional baud-times before start of transmission"] - FOUR = 4, + Four = 4, #[doc = "5: CS is asserted 5 additional baud-times before start of transmission"] - FIVE = 5, + Five = 5, #[doc = "6: CS is asserted 6 additional baud-times before start of transmission"] - SIX = 6, + Six = 6, #[doc = "7: CS is asserted 7 additional baud-times before start of transmission"] - SEVEN = 7, + Seven = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CSSETUP_A) -> Self { + fn from(variant: Cssetup) -> Self { variant as _ } } -impl CSSETUP_R { +impl crate::FieldSpec for Cssetup { + type Ux = u8; +} +impl crate::IsEnum for Cssetup {} +#[doc = "Field `CSSETUP` reader - Chip Select Setup"] +pub type CssetupR = crate::FieldReader; +impl CssetupR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CSSETUP_A { + pub const fn variant(&self) -> Cssetup { match self.bits { - 0 => CSSETUP_A::ZERO, - 1 => CSSETUP_A::ONE, - 2 => CSSETUP_A::TWO, - 3 => CSSETUP_A::THREE, - 4 => CSSETUP_A::FOUR, - 5 => CSSETUP_A::FIVE, - 6 => CSSETUP_A::SIX, - 7 => CSSETUP_A::SEVEN, + 0 => Cssetup::Zero, + 1 => Cssetup::One, + 2 => Cssetup::Two, + 3 => Cssetup::Three, + 4 => Cssetup::Four, + 5 => Cssetup::Five, + 6 => Cssetup::Six, + 7 => Cssetup::Seven, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ZERO`"] + #[doc = "CS is asserted half or 1 baud-time before the start of transmission depending on CLKPHASE equal to 1 or 0 respectively"] #[inline(always)] pub fn is_zero(&self) -> bool { - *self == CSSETUP_A::ZERO + *self == Cssetup::Zero } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "CS is asserted 1 additional baud-time before start of transmission"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == CSSETUP_A::ONE + *self == Cssetup::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "CS is asserted 2 additional baud-times before start of transmission"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == CSSETUP_A::TWO + *self == Cssetup::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "CS is asserted 3 additional baud-times before start of transmission"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == CSSETUP_A::THREE + *self == Cssetup::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "CS is asserted 4 additional baud-times before start of transmission"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == CSSETUP_A::FOUR + *self == Cssetup::Four } - #[doc = "Checks if the value of the field is `FIVE`"] + #[doc = "CS is asserted 5 additional baud-times before start of transmission"] #[inline(always)] pub fn is_five(&self) -> bool { - *self == CSSETUP_A::FIVE + *self == Cssetup::Five } - #[doc = "Checks if the value of the field is `SIX`"] + #[doc = "CS is asserted 6 additional baud-times before start of transmission"] #[inline(always)] pub fn is_six(&self) -> bool { - *self == CSSETUP_A::SIX + *self == Cssetup::Six } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "CS is asserted 7 additional baud-times before start of transmission"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == CSSETUP_A::SEVEN + *self == Cssetup::Seven } } #[doc = "Field `CSSETUP` writer - Chip Select Setup"] -pub type CSSETUP_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, TIMINGCFG_SPEC, u8, CSSETUP_A, 3, O>; -impl<'a, const O: u8> CSSETUP_W<'a, O> { +pub type CssetupW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cssetup, crate::Safe>; +impl<'a, REG> CssetupW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "CS is asserted half or 1 baud-time before the start of transmission depending on CLKPHASE equal to 1 or 0 respectively"] #[inline(always)] - pub fn zero(self) -> &'a mut W { - self.variant(CSSETUP_A::ZERO) + pub fn zero(self) -> &'a mut crate::W { + self.variant(Cssetup::Zero) } #[doc = "CS is asserted 1 additional baud-time before start of transmission"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(CSSETUP_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Cssetup::One) } #[doc = "CS is asserted 2 additional baud-times before start of transmission"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(CSSETUP_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Cssetup::Two) } #[doc = "CS is asserted 3 additional baud-times before start of transmission"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(CSSETUP_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Cssetup::Three) } #[doc = "CS is asserted 4 additional baud-times before start of transmission"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(CSSETUP_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Cssetup::Four) } #[doc = "CS is asserted 5 additional baud-times before start of transmission"] #[inline(always)] - pub fn five(self) -> &'a mut W { - self.variant(CSSETUP_A::FIVE) + pub fn five(self) -> &'a mut crate::W { + self.variant(Cssetup::Five) } #[doc = "CS is asserted 6 additional baud-times before start of transmission"] #[inline(always)] - pub fn six(self) -> &'a mut W { - self.variant(CSSETUP_A::SIX) + pub fn six(self) -> &'a mut crate::W { + self.variant(Cssetup::Six) } #[doc = "CS is asserted 7 additional baud-times before start of transmission"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(CSSETUP_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Cssetup::Seven) } } -#[doc = "Field `CSHOLD` reader - Chip Select Hold"] -pub type CSHOLD_R = crate::FieldReader; #[doc = "Chip Select Hold\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CSHOLD_A { +pub enum Cshold { #[doc = "0: CS is de-asserted half or 1 baud-time after the end of transmission depending on CLKPHASE equal to 1 or 0 respectively"] - ZERO = 0, + Zero = 0, #[doc = "1: CS is de-asserted 1 additional baud-time after the end of transmission"] - ONE = 1, + One = 1, #[doc = "2: CS is de-asserted 2 additional baud-times after the end of transmission"] - TWO = 2, + Two = 2, #[doc = "3: CS is de-asserted 3 additional baud-times after the end of transmission"] - THREE = 3, + Three = 3, #[doc = "4: CS is de-asserted 4 additional baud-times after the end of transmission"] - FOUR = 4, + Four = 4, #[doc = "5: CS is de-asserted 5 additional baud-times after the end of transmission"] - FIVE = 5, + Five = 5, #[doc = "6: CS is de-asserted 6 additional baud-times after the end of transmission"] - SIX = 6, + Six = 6, #[doc = "7: CS is de-asserted 7 additional baud-times after the end of transmission"] - SEVEN = 7, + Seven = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CSHOLD_A) -> Self { + fn from(variant: Cshold) -> Self { variant as _ } } -impl CSHOLD_R { +impl crate::FieldSpec for Cshold { + type Ux = u8; +} +impl crate::IsEnum for Cshold {} +#[doc = "Field `CSHOLD` reader - Chip Select Hold"] +pub type CsholdR = crate::FieldReader; +impl CsholdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CSHOLD_A { + pub const fn variant(&self) -> Cshold { match self.bits { - 0 => CSHOLD_A::ZERO, - 1 => CSHOLD_A::ONE, - 2 => CSHOLD_A::TWO, - 3 => CSHOLD_A::THREE, - 4 => CSHOLD_A::FOUR, - 5 => CSHOLD_A::FIVE, - 6 => CSHOLD_A::SIX, - 7 => CSHOLD_A::SEVEN, + 0 => Cshold::Zero, + 1 => Cshold::One, + 2 => Cshold::Two, + 3 => Cshold::Three, + 4 => Cshold::Four, + 5 => Cshold::Five, + 6 => Cshold::Six, + 7 => Cshold::Seven, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ZERO`"] + #[doc = "CS is de-asserted half or 1 baud-time after the end of transmission depending on CLKPHASE equal to 1 or 0 respectively"] #[inline(always)] pub fn is_zero(&self) -> bool { - *self == CSHOLD_A::ZERO + *self == Cshold::Zero } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "CS is de-asserted 1 additional baud-time after the end of transmission"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == CSHOLD_A::ONE + *self == Cshold::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "CS is de-asserted 2 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == CSHOLD_A::TWO + *self == Cshold::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "CS is de-asserted 3 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == CSHOLD_A::THREE + *self == Cshold::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "CS is de-asserted 4 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == CSHOLD_A::FOUR + *self == Cshold::Four } - #[doc = "Checks if the value of the field is `FIVE`"] + #[doc = "CS is de-asserted 5 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_five(&self) -> bool { - *self == CSHOLD_A::FIVE + *self == Cshold::Five } - #[doc = "Checks if the value of the field is `SIX`"] + #[doc = "CS is de-asserted 6 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_six(&self) -> bool { - *self == CSHOLD_A::SIX + *self == Cshold::Six } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "CS is de-asserted 7 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == CSHOLD_A::SEVEN + *self == Cshold::Seven } } #[doc = "Field `CSHOLD` writer - Chip Select Hold"] -pub type CSHOLD_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, TIMINGCFG_SPEC, u8, CSHOLD_A, 3, O>; -impl<'a, const O: u8> CSHOLD_W<'a, O> { +pub type CsholdW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cshold, crate::Safe>; +impl<'a, REG> CsholdW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "CS is de-asserted half or 1 baud-time after the end of transmission depending on CLKPHASE equal to 1 or 0 respectively"] #[inline(always)] - pub fn zero(self) -> &'a mut W { - self.variant(CSHOLD_A::ZERO) + pub fn zero(self) -> &'a mut crate::W { + self.variant(Cshold::Zero) } #[doc = "CS is de-asserted 1 additional baud-time after the end of transmission"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(CSHOLD_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Cshold::One) } #[doc = "CS is de-asserted 2 additional baud-times after the end of transmission"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(CSHOLD_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Cshold::Two) } #[doc = "CS is de-asserted 3 additional baud-times after the end of transmission"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(CSHOLD_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Cshold::Three) } #[doc = "CS is de-asserted 4 additional baud-times after the end of transmission"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(CSHOLD_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Cshold::Four) } #[doc = "CS is de-asserted 5 additional baud-times after the end of transmission"] #[inline(always)] - pub fn five(self) -> &'a mut W { - self.variant(CSHOLD_A::FIVE) + pub fn five(self) -> &'a mut crate::W { + self.variant(Cshold::Five) } #[doc = "CS is de-asserted 6 additional baud-times after the end of transmission"] #[inline(always)] - pub fn six(self) -> &'a mut W { - self.variant(CSHOLD_A::SIX) + pub fn six(self) -> &'a mut crate::W { + self.variant(Cshold::Six) } #[doc = "CS is de-asserted 7 additional baud-times after the end of transmission"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(CSHOLD_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Cshold::Seven) } } -#[doc = "Field `ICS` reader - Inter-Character Spacing"] -pub type ICS_R = crate::FieldReader; #[doc = "Inter-Character Spacing\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICS_A { +pub enum Ics { #[doc = "0: There is no space between charcters"] - ZERO = 0, + Zero = 0, #[doc = "1: Create a space of 1 baud-times between frames"] - ONE = 1, + One = 1, #[doc = "2: Create a space of 2 baud-times between frames"] - TWO = 2, + Two = 2, #[doc = "3: Create a space of 3 baud-times between frames"] - THREE = 3, + Three = 3, #[doc = "4: Create a space of 4 baud-times between frames"] - FOUR = 4, + Four = 4, #[doc = "5: Create a space of 5 baud-times between frames"] - FIVE = 5, + Five = 5, #[doc = "6: Create a space of 6 baud-times between frames"] - SIX = 6, + Six = 6, #[doc = "7: Create a space of 7 baud-times between frames"] - SEVEN = 7, + Seven = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICS_A) -> Self { + fn from(variant: Ics) -> Self { variant as _ } } -impl ICS_R { +impl crate::FieldSpec for Ics { + type Ux = u8; +} +impl crate::IsEnum for Ics {} +#[doc = "Field `ICS` reader - Inter-Character Spacing"] +pub type IcsR = crate::FieldReader; +impl IcsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICS_A { + pub const fn variant(&self) -> Ics { match self.bits { - 0 => ICS_A::ZERO, - 1 => ICS_A::ONE, - 2 => ICS_A::TWO, - 3 => ICS_A::THREE, - 4 => ICS_A::FOUR, - 5 => ICS_A::FIVE, - 6 => ICS_A::SIX, - 7 => ICS_A::SEVEN, + 0 => Ics::Zero, + 1 => Ics::One, + 2 => Ics::Two, + 3 => Ics::Three, + 4 => Ics::Four, + 5 => Ics::Five, + 6 => Ics::Six, + 7 => Ics::Seven, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ZERO`"] + #[doc = "There is no space between charcters"] #[inline(always)] pub fn is_zero(&self) -> bool { - *self == ICS_A::ZERO + *self == Ics::Zero } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Create a space of 1 baud-times between frames"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == ICS_A::ONE + *self == Ics::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Create a space of 2 baud-times between frames"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == ICS_A::TWO + *self == Ics::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "Create a space of 3 baud-times between frames"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == ICS_A::THREE + *self == Ics::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Create a space of 4 baud-times between frames"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == ICS_A::FOUR + *self == Ics::Four } - #[doc = "Checks if the value of the field is `FIVE`"] + #[doc = "Create a space of 5 baud-times between frames"] #[inline(always)] pub fn is_five(&self) -> bool { - *self == ICS_A::FIVE + *self == Ics::Five } - #[doc = "Checks if the value of the field is `SIX`"] + #[doc = "Create a space of 6 baud-times between frames"] #[inline(always)] pub fn is_six(&self) -> bool { - *self == ICS_A::SIX + *self == Ics::Six } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "Create a space of 7 baud-times between frames"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == ICS_A::SEVEN + *self == Ics::Seven } } #[doc = "Field `ICS` writer - Inter-Character Spacing"] -pub type ICS_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, TIMINGCFG_SPEC, u8, ICS_A, 3, O>; -impl<'a, const O: u8> ICS_W<'a, O> { +pub type IcsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Ics, crate::Safe>; +impl<'a, REG> IcsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "There is no space between charcters"] #[inline(always)] - pub fn zero(self) -> &'a mut W { - self.variant(ICS_A::ZERO) + pub fn zero(self) -> &'a mut crate::W { + self.variant(Ics::Zero) } #[doc = "Create a space of 1 baud-times between frames"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(ICS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Ics::One) } #[doc = "Create a space of 2 baud-times between frames"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(ICS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Ics::Two) } #[doc = "Create a space of 3 baud-times between frames"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(ICS_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Ics::Three) } #[doc = "Create a space of 4 baud-times between frames"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(ICS_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Ics::Four) } #[doc = "Create a space of 5 baud-times between frames"] #[inline(always)] - pub fn five(self) -> &'a mut W { - self.variant(ICS_A::FIVE) + pub fn five(self) -> &'a mut crate::W { + self.variant(Ics::Five) } #[doc = "Create a space of 6 baud-times between frames"] #[inline(always)] - pub fn six(self) -> &'a mut W { - self.variant(ICS_A::SIX) + pub fn six(self) -> &'a mut crate::W { + self.variant(Ics::Six) } #[doc = "Create a space of 7 baud-times between frames"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(ICS_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Ics::Seven) } } #[doc = "Field `SETUPWINDOW` reader - Setup Window"] -pub type SETUPWINDOW_R = crate::FieldReader; +pub type SetupwindowR = crate::FieldReader; #[doc = "Field `SETUPWINDOW` writer - Setup Window"] -pub type SETUPWINDOW_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMINGCFG_SPEC, u8, u8, 4, O>; +pub type SetupwindowW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - TX Delay Transmission"] #[inline(always)] - pub fn txdelay(&self) -> TXDELAY_R { - TXDELAY_R::new((self.bits & 3) as u8) + pub fn txdelay(&self) -> TxdelayR { + TxdelayR::new((self.bits & 3) as u8) } #[doc = "Bits 4:6 - Chip Select Setup"] #[inline(always)] - pub fn cssetup(&self) -> CSSETUP_R { - CSSETUP_R::new(((self.bits >> 4) & 7) as u8) + pub fn cssetup(&self) -> CssetupR { + CssetupR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Chip Select Hold"] #[inline(always)] - pub fn cshold(&self) -> CSHOLD_R { - CSHOLD_R::new(((self.bits >> 8) & 7) as u8) + pub fn cshold(&self) -> CsholdR { + CsholdR::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Inter-Character Spacing"] #[inline(always)] - pub fn ics(&self) -> ICS_R { - ICS_R::new(((self.bits >> 12) & 7) as u8) + pub fn ics(&self) -> IcsR { + IcsR::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:19 - Setup Window"] #[inline(always)] - pub fn setupwindow(&self) -> SETUPWINDOW_R { - SETUPWINDOW_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn setupwindow(&self) -> SetupwindowR { + SetupwindowR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - TX Delay Transmission"] #[inline(always)] #[must_use] - pub fn txdelay(&mut self) -> TXDELAY_W<0> { - TXDELAY_W::new(self) + pub fn txdelay(&mut self) -> TxdelayW { + TxdelayW::new(self, 0) } #[doc = "Bits 4:6 - Chip Select Setup"] #[inline(always)] #[must_use] - pub fn cssetup(&mut self) -> CSSETUP_W<4> { - CSSETUP_W::new(self) + pub fn cssetup(&mut self) -> CssetupW { + CssetupW::new(self, 4) } #[doc = "Bits 8:10 - Chip Select Hold"] #[inline(always)] #[must_use] - pub fn cshold(&mut self) -> CSHOLD_W<8> { - CSHOLD_W::new(self) + pub fn cshold(&mut self) -> CsholdW { + CsholdW::new(self, 8) } #[doc = "Bits 12:14 - Inter-Character Spacing"] #[inline(always)] #[must_use] - pub fn ics(&mut self) -> ICS_W<12> { - ICS_W::new(self) + pub fn ics(&mut self) -> IcsW { + IcsW::new(self, 12) } #[doc = "Bits 16:19 - Setup Window"] #[inline(always)] #[must_use] - pub fn setupwindow(&mut self) -> SETUPWINDOW_W<16> { - SETUPWINDOW_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn setupwindow(&mut self) -> SetupwindowW { + SetupwindowW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timingcfg](index.html) module"] -pub struct TIMINGCFG_SPEC; -impl crate::RegisterSpec for TIMINGCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timingcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timingcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TimingcfgSpec; +impl crate::RegisterSpec for TimingcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [timingcfg::R](R) reader structure"] -impl crate::Readable for TIMINGCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timingcfg::W](W) writer structure"] -impl crate::Writable for TIMINGCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timingcfg::R`](R) reader structure"] +impl crate::Readable for TimingcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`timingcfg::W`](W) writer structure"] +impl crate::Writable for TimingcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMINGCFG to value 0x0005_0000"] -impl crate::Resettable for TIMINGCFG_SPEC { - const RESET_VALUE: Self::Ux = 0x0005_0000; +impl crate::Resettable for TimingcfgSpec { + const RESET_VALUE: u32 = 0x0005_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/trigctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/trigctrl.rs index 6e5750d..4b0d8fe 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/trigctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/trigctrl.rs @@ -1,110 +1,70 @@ #[doc = "Register `TRIGCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TRIGCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RXTEN` reader - Receive Trigger Enable"] -pub type RXTEN_R = crate::BitReader; +pub type RxtenR = crate::BitReader; #[doc = "Field `RXTEN` writer - Receive Trigger Enable"] -pub type RXTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type RxtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTEN` reader - Transmit Trigger Enable"] -pub type TXTEN_R = crate::BitReader; +pub type TxtenR = crate::BitReader; #[doc = "Field `TXTEN` writer - Transmit Trigger Enable"] -pub type TXTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type TxtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOTXTEN` reader - AUTOTX Trigger Enable"] -pub type AUTOTXTEN_R = crate::BitReader; +pub type AutotxtenR = crate::BitReader; #[doc = "Field `AUTOTXTEN` writer - AUTOTX Trigger Enable"] -pub type AUTOTXTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type AutotxtenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Receive Trigger Enable"] #[inline(always)] - pub fn rxten(&self) -> RXTEN_R { - RXTEN_R::new((self.bits & 1) != 0) + pub fn rxten(&self) -> RxtenR { + RxtenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transmit Trigger Enable"] #[inline(always)] - pub fn txten(&self) -> TXTEN_R { - TXTEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn txten(&self) -> TxtenR { + TxtenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - AUTOTX Trigger Enable"] #[inline(always)] - pub fn autotxten(&self) -> AUTOTXTEN_R { - AUTOTXTEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn autotxten(&self) -> AutotxtenR { + AutotxtenR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Receive Trigger Enable"] #[inline(always)] #[must_use] - pub fn rxten(&mut self) -> RXTEN_W<0> { - RXTEN_W::new(self) + pub fn rxten(&mut self) -> RxtenW { + RxtenW::new(self, 0) } #[doc = "Bit 1 - Transmit Trigger Enable"] #[inline(always)] #[must_use] - pub fn txten(&mut self) -> TXTEN_W<1> { - TXTEN_W::new(self) + pub fn txten(&mut self) -> TxtenW { + TxtenW::new(self, 1) } #[doc = "Bit 2 - AUTOTX Trigger Enable"] #[inline(always)] #[must_use] - pub fn autotxten(&mut self) -> AUTOTXTEN_W<2> { - AUTOTXTEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn autotxten(&mut self) -> AutotxtenW { + AutotxtenW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [trigctrl](index.html) module"] -pub struct TRIGCTRL_SPEC; -impl crate::RegisterSpec for TRIGCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`trigctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trigctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TrigctrlSpec; +impl crate::RegisterSpec for TrigctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [trigctrl::R](R) reader structure"] -impl crate::Readable for TRIGCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [trigctrl::W](W) writer structure"] -impl crate::Writable for TRIGCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`trigctrl::R`](R) reader structure"] +impl crate::Readable for TrigctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`trigctrl::W`](W) writer structure"] +impl crate::Writable for TrigctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TRIGCTRL to value 0"] -impl crate::Resettable for TRIGCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TrigctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/txdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/txdata.rs index 5605e30..48b104b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/txdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_ns/txdata.rs @@ -1,52 +1,27 @@ #[doc = "Register `TXDATA` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXDATA` writer - TX Data and Control bits"] -pub type TXDATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDATA_SPEC, u16, u16, 16, O>; +pub type TxdataW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl W { #[doc = "Bits 0:15 - TX Data and Control bits"] #[inline(always)] #[must_use] - pub fn txdata(&mut self) -> TXDATA_W<0> { - TXDATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txdata(&mut self) -> TxdataW { + TxdataW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdata](index.html) module"] -pub struct TXDATA_SPEC; -impl crate::RegisterSpec for TXDATA_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdata::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxdataSpec; +impl crate::RegisterSpec for TxdataSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [txdata::W](W) writer structure"] -impl crate::Writable for TXDATA_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`txdata::W`](W) writer structure"] +impl crate::Writable for TxdataSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXDATA to value 0"] -impl crate::Resettable for TXDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s.rs index 29f6870..e6d70ce 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s.rs @@ -1,136 +1,270 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + cfg0: Cfg0, + cfg1: Cfg1, + cfg2: Cfg2, + framecfg: Framecfg, + dtxdatcfg: Dtxdatcfg, + irhfcfg: Irhfcfg, + irlfcfg: Irlfcfg, + timingcfg: Timingcfg, + startframecfg: Startframecfg, + sigframecfg: Sigframecfg, + clkdiv: Clkdiv, + trigctrl: Trigctrl, + cmd: Cmd, + rxdata: Rxdata, + rxdatap: Rxdatap, + txdata: Txdata, + status: Status, + if_: If, + ien: Ien, + syncbusy: Syncbusy, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub cfg0: CFG0, + #[inline(always)] + pub const fn cfg0(&self) -> &Cfg0 { + &self.cfg0 + } #[doc = "0x0c - No Description"] - pub cfg1: CFG1, + #[inline(always)] + pub const fn cfg1(&self) -> &Cfg1 { + &self.cfg1 + } #[doc = "0x10 - No Description"] - pub cfg2: CFG2, + #[inline(always)] + pub const fn cfg2(&self) -> &Cfg2 { + &self.cfg2 + } #[doc = "0x14 - No Description"] - pub framecfg: FRAMECFG, + #[inline(always)] + pub const fn framecfg(&self) -> &Framecfg { + &self.framecfg + } #[doc = "0x18 - No Description"] - pub dtxdatcfg: DTXDATCFG, + #[inline(always)] + pub const fn dtxdatcfg(&self) -> &Dtxdatcfg { + &self.dtxdatcfg + } #[doc = "0x1c - No Description"] - pub irhfcfg: IRHFCFG, + #[inline(always)] + pub const fn irhfcfg(&self) -> &Irhfcfg { + &self.irhfcfg + } #[doc = "0x20 - No Description"] - pub irlfcfg: IRLFCFG, + #[inline(always)] + pub const fn irlfcfg(&self) -> &Irlfcfg { + &self.irlfcfg + } #[doc = "0x24 - No Description"] - pub timingcfg: TIMINGCFG, + #[inline(always)] + pub const fn timingcfg(&self) -> &Timingcfg { + &self.timingcfg + } #[doc = "0x28 - No Description"] - pub startframecfg: STARTFRAMECFG, + #[inline(always)] + pub const fn startframecfg(&self) -> &Startframecfg { + &self.startframecfg + } #[doc = "0x2c - No Description"] - pub sigframecfg: SIGFRAMECFG, + #[inline(always)] + pub const fn sigframecfg(&self) -> &Sigframecfg { + &self.sigframecfg + } #[doc = "0x30 - No Description"] - pub clkdiv: CLKDIV, + #[inline(always)] + pub const fn clkdiv(&self) -> &Clkdiv { + &self.clkdiv + } #[doc = "0x34 - No Description"] - pub trigctrl: TRIGCTRL, + #[inline(always)] + pub const fn trigctrl(&self) -> &Trigctrl { + &self.trigctrl + } #[doc = "0x38 - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x3c - No Description"] - pub rxdata: RXDATA, + #[inline(always)] + pub const fn rxdata(&self) -> &Rxdata { + &self.rxdata + } #[doc = "0x40 - No Description"] - pub rxdatap: RXDATAP, + #[inline(always)] + pub const fn rxdatap(&self) -> &Rxdatap { + &self.rxdatap + } #[doc = "0x44 - No Description"] - pub txdata: TXDATA, + #[inline(always)] + pub const fn txdata(&self) -> &Txdata { + &self.txdata + } #[doc = "0x48 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x4c - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x50 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x54 - No Description"] - pub syncbusy: SYNCBUSY, + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CFG0 (rw) register accessor: an alias for `Reg`"] -pub type CFG0 = crate::Reg; +#[doc = "CFG0 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg0`] +module"] +#[doc(alias = "CFG0")] +pub type Cfg0 = crate::Reg; #[doc = "No Description"] pub mod cfg0; -#[doc = "CFG1 (rw) register accessor: an alias for `Reg`"] -pub type CFG1 = crate::Reg; +#[doc = "CFG1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg1`] +module"] +#[doc(alias = "CFG1")] +pub type Cfg1 = crate::Reg; #[doc = "No Description"] pub mod cfg1; -#[doc = "CFG2 (rw) register accessor: an alias for `Reg`"] -pub type CFG2 = crate::Reg; +#[doc = "CFG2 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg2`] +module"] +#[doc(alias = "CFG2")] +pub type Cfg2 = crate::Reg; #[doc = "No Description"] pub mod cfg2; -#[doc = "FRAMECFG (rw) register accessor: an alias for `Reg`"] -pub type FRAMECFG = crate::Reg; +#[doc = "FRAMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`framecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`framecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@framecfg`] +module"] +#[doc(alias = "FRAMECFG")] +pub type Framecfg = crate::Reg; #[doc = "No Description"] pub mod framecfg; -#[doc = "DTXDATCFG (rw) register accessor: an alias for `Reg`"] -pub type DTXDATCFG = crate::Reg; +#[doc = "DTXDATCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtxdatcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtxdatcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtxdatcfg`] +module"] +#[doc(alias = "DTXDATCFG")] +pub type Dtxdatcfg = crate::Reg; #[doc = "No Description"] pub mod dtxdatcfg; -#[doc = "IRHFCFG (rw) register accessor: an alias for `Reg`"] -pub type IRHFCFG = crate::Reg; +#[doc = "IRHFCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`irhfcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irhfcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irhfcfg`] +module"] +#[doc(alias = "IRHFCFG")] +pub type Irhfcfg = crate::Reg; #[doc = "No Description"] pub mod irhfcfg; -#[doc = "IRLFCFG (rw) register accessor: an alias for `Reg`"] -pub type IRLFCFG = crate::Reg; +#[doc = "IRLFCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`irlfcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irlfcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irlfcfg`] +module"] +#[doc(alias = "IRLFCFG")] +pub type Irlfcfg = crate::Reg; #[doc = "No Description"] pub mod irlfcfg; -#[doc = "TIMINGCFG (rw) register accessor: an alias for `Reg`"] -pub type TIMINGCFG = crate::Reg; +#[doc = "TIMINGCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timingcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timingcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timingcfg`] +module"] +#[doc(alias = "TIMINGCFG")] +pub type Timingcfg = crate::Reg; #[doc = "No Description"] pub mod timingcfg; -#[doc = "STARTFRAMECFG (rw) register accessor: an alias for `Reg`"] -pub type STARTFRAMECFG = crate::Reg; +#[doc = "STARTFRAMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`startframecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`startframecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@startframecfg`] +module"] +#[doc(alias = "STARTFRAMECFG")] +pub type Startframecfg = crate::Reg; #[doc = "No Description"] pub mod startframecfg; -#[doc = "SIGFRAMECFG (rw) register accessor: an alias for `Reg`"] -pub type SIGFRAMECFG = crate::Reg; +#[doc = "SIGFRAMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sigframecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sigframecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sigframecfg`] +module"] +#[doc(alias = "SIGFRAMECFG")] +pub type Sigframecfg = crate::Reg; #[doc = "No Description"] pub mod sigframecfg; -#[doc = "CLKDIV (rw) register accessor: an alias for `Reg`"] -pub type CLKDIV = crate::Reg; +#[doc = "CLKDIV (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv`] +module"] +#[doc(alias = "CLKDIV")] +pub type Clkdiv = crate::Reg; #[doc = "No Description"] pub mod clkdiv; -#[doc = "TRIGCTRL (rw) register accessor: an alias for `Reg`"] -pub type TRIGCTRL = crate::Reg; +#[doc = "TRIGCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`trigctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trigctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trigctrl`] +module"] +#[doc(alias = "TRIGCTRL")] +pub type Trigctrl = crate::Reg; #[doc = "No Description"] pub mod trigctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "RXDATA (r) register accessor: an alias for `Reg`"] -pub type RXDATA = crate::Reg; +#[doc = "RXDATA (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdata::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdata`] +module"] +#[doc(alias = "RXDATA")] +pub type Rxdata = crate::Reg; #[doc = "No Description"] pub mod rxdata; -#[doc = "RXDATAP (r) register accessor: an alias for `Reg`"] -pub type RXDATAP = crate::Reg; +#[doc = "RXDATAP (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdatap::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdatap`] +module"] +#[doc(alias = "RXDATAP")] +pub type Rxdatap = crate::Reg; #[doc = "No Description"] pub mod rxdatap; -#[doc = "TXDATA (w) register accessor: an alias for `Reg`"] -pub type TXDATA = crate::Reg; +#[doc = "TXDATA (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdata::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txdata`] +module"] +#[doc(alias = "TXDATA")] +pub type Txdata = crate::Reg; #[doc = "No Description"] pub mod txdata; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "No Description"] pub mod syncbusy; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/cfg0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/cfg0.rs index 89b67d3..f0c8da6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/cfg0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/cfg0.rs @@ -1,249 +1,227 @@ #[doc = "Register `CFG0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SYNC` reader - Synchronous Mode"] -pub type SYNC_R = crate::BitReader; +pub type W = crate::W; #[doc = "Synchronous Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYNC_A { +pub enum Sync { #[doc = "0: The EUSART operates in asynchronous mode"] - ASYNC = 0, + Async = 0, #[doc = "1: The EUSART operates in synchronous mode"] - SYNC = 1, + Sync = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYNC_A) -> Self { + fn from(variant: Sync) -> Self { variant as u8 != 0 } } -impl SYNC_R { +#[doc = "Field `SYNC` reader - Synchronous Mode"] +pub type SyncR = crate::BitReader; +impl SyncR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SYNC_A { + pub const fn variant(&self) -> Sync { match self.bits { - false => SYNC_A::ASYNC, - true => SYNC_A::SYNC, + false => Sync::Async, + true => Sync::Sync, } } - #[doc = "Checks if the value of the field is `ASYNC`"] + #[doc = "The EUSART operates in asynchronous mode"] #[inline(always)] pub fn is_async(&self) -> bool { - *self == SYNC_A::ASYNC + *self == Sync::Async } - #[doc = "Checks if the value of the field is `SYNC`"] + #[doc = "The EUSART operates in synchronous mode"] #[inline(always)] pub fn is_sync(&self) -> bool { - *self == SYNC_A::SYNC + *self == Sync::Sync } } #[doc = "Field `SYNC` writer - Synchronous Mode"] -pub type SYNC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, SYNC_A, O>; -impl<'a, const O: u8> SYNC_W<'a, O> { +pub type SyncW<'a, REG> = crate::BitWriter<'a, REG, Sync>; +impl<'a, REG> SyncW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The EUSART operates in asynchronous mode"] #[inline(always)] - pub fn async_(self) -> &'a mut W { - self.variant(SYNC_A::ASYNC) + pub fn async_(self) -> &'a mut crate::W { + self.variant(Sync::Async) } #[doc = "The EUSART operates in synchronous mode"] #[inline(always)] - pub fn sync(self) -> &'a mut W { - self.variant(SYNC_A::SYNC) + pub fn sync(self) -> &'a mut crate::W { + self.variant(Sync::Sync) } } -#[doc = "Field `LOOPBK` reader - Loopback Enable"] -pub type LOOPBK_R = crate::BitReader; #[doc = "Loopback Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOOPBK_A { +pub enum Loopbk { #[doc = "0: The receiver is connected to and receives data from UARTn_RX"] - DISABLE = 0, + Disable = 0, #[doc = "1: The receiver is connected to and receives data from UARTn_TX"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOOPBK_A) -> Self { + fn from(variant: Loopbk) -> Self { variant as u8 != 0 } } -impl LOOPBK_R { +#[doc = "Field `LOOPBK` reader - Loopback Enable"] +pub type LoopbkR = crate::BitReader; +impl LoopbkR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOOPBK_A { + pub const fn variant(&self) -> Loopbk { match self.bits { - false => LOOPBK_A::DISABLE, - true => LOOPBK_A::ENABLE, + false => Loopbk::Disable, + true => Loopbk::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The receiver is connected to and receives data from UARTn_RX"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == LOOPBK_A::DISABLE + *self == Loopbk::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The receiver is connected to and receives data from UARTn_TX"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == LOOPBK_A::ENABLE + *self == Loopbk::Enable } } #[doc = "Field `LOOPBK` writer - Loopback Enable"] -pub type LOOPBK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, LOOPBK_A, O>; -impl<'a, const O: u8> LOOPBK_W<'a, O> { +pub type LoopbkW<'a, REG> = crate::BitWriter<'a, REG, Loopbk>; +impl<'a, REG> LoopbkW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The receiver is connected to and receives data from UARTn_RX"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(LOOPBK_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Loopbk::Disable) } #[doc = "The receiver is connected to and receives data from UARTn_TX"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(LOOPBK_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Loopbk::Enable) } } -#[doc = "Field `CCEN` reader - Collision Check Enable"] -pub type CCEN_R = crate::BitReader; #[doc = "Collision Check Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCEN_A { +pub enum Ccen { #[doc = "0: Collision check is disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Collision check is enabled. The receiver must be enabled for the check to be performed"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCEN_A) -> Self { + fn from(variant: Ccen) -> Self { variant as u8 != 0 } } -impl CCEN_R { +#[doc = "Field `CCEN` reader - Collision Check Enable"] +pub type CcenR = crate::BitReader; +impl CcenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCEN_A { + pub const fn variant(&self) -> Ccen { match self.bits { - false => CCEN_A::DISABLE, - true => CCEN_A::ENABLE, + false => Ccen::Disable, + true => Ccen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Collision check is disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CCEN_A::DISABLE + *self == Ccen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Collision check is enabled. The receiver must be enabled for the check to be performed"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CCEN_A::ENABLE + *self == Ccen::Enable } } #[doc = "Field `CCEN` writer - Collision Check Enable"] -pub type CCEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, CCEN_A, O>; -impl<'a, const O: u8> CCEN_W<'a, O> { +pub type CcenW<'a, REG> = crate::BitWriter<'a, REG, Ccen>; +impl<'a, REG> CcenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Collision check is disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CCEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ccen::Disable) } #[doc = "Collision check is enabled. The receiver must be enabled for the check to be performed"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CCEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Ccen::Enable) } } -#[doc = "Field `MPM` reader - Multi-Processor Mode"] -pub type MPM_R = crate::BitReader; #[doc = "Multi-Processor Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MPM_A { +pub enum Mpm { #[doc = "0: The 9th bit of incoming frames has no special function"] - DISABLE = 0, + Disable = 0, #[doc = "1: An incoming frame with the 9th bit equal to MPAB will be loaded into the RX FIFO regardless of RXBLOCK and will result in the MPAB interrupt flag being set"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MPM_A) -> Self { + fn from(variant: Mpm) -> Self { variant as u8 != 0 } } -impl MPM_R { +#[doc = "Field `MPM` reader - Multi-Processor Mode"] +pub type MpmR = crate::BitReader; +impl MpmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MPM_A { + pub const fn variant(&self) -> Mpm { match self.bits { - false => MPM_A::DISABLE, - true => MPM_A::ENABLE, + false => Mpm::Disable, + true => Mpm::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The 9th bit of incoming frames has no special function"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == MPM_A::DISABLE + *self == Mpm::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "An incoming frame with the 9th bit equal to MPAB will be loaded into the RX FIFO regardless of RXBLOCK and will result in the MPAB interrupt flag being set"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == MPM_A::ENABLE + *self == Mpm::Enable } } #[doc = "Field `MPM` writer - Multi-Processor Mode"] -pub type MPM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, MPM_A, O>; -impl<'a, const O: u8> MPM_W<'a, O> { +pub type MpmW<'a, REG> = crate::BitWriter<'a, REG, Mpm>; +impl<'a, REG> MpmW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The 9th bit of incoming frames has no special function"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(MPM_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Mpm::Disable) } #[doc = "An incoming frame with the 9th bit equal to MPAB will be loaded into the RX FIFO regardless of RXBLOCK and will result in the MPAB interrupt flag being set"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(MPM_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Mpm::Enable) } } #[doc = "Field `MPAB` reader - Multi-Processor Address-Bit"] -pub type MPAB_R = crate::BitReader; +pub type MpabR = crate::BitReader; #[doc = "Field `MPAB` writer - Multi-Processor Address-Bit"] -pub type MPAB_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, O>; -#[doc = "Field `OVS` reader - Oversampling"] -pub type OVS_R = crate::FieldReader; +pub type MpabW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Oversampling\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum OVS_A { +pub enum Ovs { #[doc = "0: 16X oversampling"] X16 = 0, #[doc = "1: 8X oversampling"] @@ -253,646 +231,669 @@ pub enum OVS_A { #[doc = "3: 4X oversampling"] X4 = 3, #[doc = "4: Disable oversampling (for LF operation)"] - DISABLE = 4, + Disable = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: OVS_A) -> Self { + fn from(variant: Ovs) -> Self { variant as _ } } -impl OVS_R { +impl crate::FieldSpec for Ovs { + type Ux = u8; +} +impl crate::IsEnum for Ovs {} +#[doc = "Field `OVS` reader - Oversampling"] +pub type OvsR = crate::FieldReader; +impl OvsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(OVS_A::X16), - 1 => Some(OVS_A::X8), - 2 => Some(OVS_A::X6), - 3 => Some(OVS_A::X4), - 4 => Some(OVS_A::DISABLE), + 0 => Some(Ovs::X16), + 1 => Some(Ovs::X8), + 2 => Some(Ovs::X6), + 3 => Some(Ovs::X4), + 4 => Some(Ovs::Disable), _ => None, } } - #[doc = "Checks if the value of the field is `X16`"] + #[doc = "16X oversampling"] #[inline(always)] pub fn is_x16(&self) -> bool { - *self == OVS_A::X16 + *self == Ovs::X16 } - #[doc = "Checks if the value of the field is `X8`"] + #[doc = "8X oversampling"] #[inline(always)] pub fn is_x8(&self) -> bool { - *self == OVS_A::X8 + *self == Ovs::X8 } - #[doc = "Checks if the value of the field is `X6`"] + #[doc = "6X oversampling"] #[inline(always)] pub fn is_x6(&self) -> bool { - *self == OVS_A::X6 + *self == Ovs::X6 } - #[doc = "Checks if the value of the field is `X4`"] + #[doc = "4X oversampling"] #[inline(always)] pub fn is_x4(&self) -> bool { - *self == OVS_A::X4 + *self == Ovs::X4 } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable oversampling (for LF operation)"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == OVS_A::DISABLE + *self == Ovs::Disable } } #[doc = "Field `OVS` writer - Oversampling"] -pub type OVS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG0_SPEC, u8, OVS_A, 3, O>; -impl<'a, const O: u8> OVS_W<'a, O> { +pub type OvsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Ovs>; +impl<'a, REG> OvsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "16X oversampling"] #[inline(always)] - pub fn x16(self) -> &'a mut W { - self.variant(OVS_A::X16) + pub fn x16(self) -> &'a mut crate::W { + self.variant(Ovs::X16) } #[doc = "8X oversampling"] #[inline(always)] - pub fn x8(self) -> &'a mut W { - self.variant(OVS_A::X8) + pub fn x8(self) -> &'a mut crate::W { + self.variant(Ovs::X8) } #[doc = "6X oversampling"] #[inline(always)] - pub fn x6(self) -> &'a mut W { - self.variant(OVS_A::X6) + pub fn x6(self) -> &'a mut crate::W { + self.variant(Ovs::X6) } #[doc = "4X oversampling"] #[inline(always)] - pub fn x4(self) -> &'a mut W { - self.variant(OVS_A::X4) + pub fn x4(self) -> &'a mut crate::W { + self.variant(Ovs::X4) } #[doc = "Disable oversampling (for LF operation)"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(OVS_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ovs::Disable) } } -#[doc = "Field `MSBF` reader - Most Significant Bit First"] -pub type MSBF_R = crate::BitReader; #[doc = "Most Significant Bit First\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MSBF_A { +pub enum Msbf { #[doc = "0: Data is sent with the least significant bit first"] - DISABLE = 0, + Disable = 0, #[doc = "1: Data is sent with the most significant bit first"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MSBF_A) -> Self { + fn from(variant: Msbf) -> Self { variant as u8 != 0 } } -impl MSBF_R { +#[doc = "Field `MSBF` reader - Most Significant Bit First"] +pub type MsbfR = crate::BitReader; +impl MsbfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MSBF_A { + pub const fn variant(&self) -> Msbf { match self.bits { - false => MSBF_A::DISABLE, - true => MSBF_A::ENABLE, + false => Msbf::Disable, + true => Msbf::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Data is sent with the least significant bit first"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == MSBF_A::DISABLE + *self == Msbf::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Data is sent with the most significant bit first"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == MSBF_A::ENABLE + *self == Msbf::Enable } } #[doc = "Field `MSBF` writer - Most Significant Bit First"] -pub type MSBF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, MSBF_A, O>; -impl<'a, const O: u8> MSBF_W<'a, O> { +pub type MsbfW<'a, REG> = crate::BitWriter<'a, REG, Msbf>; +impl<'a, REG> MsbfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Data is sent with the least significant bit first"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(MSBF_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Msbf::Disable) } #[doc = "Data is sent with the most significant bit first"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(MSBF_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Msbf::Enable) } } -#[doc = "Field `RXINV` reader - Receiver Input Invert"] -pub type RXINV_R = crate::BitReader; #[doc = "Receiver Input Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RXINV_A { +pub enum Rxinv { #[doc = "0: Input is passed directly to the receiver"] - DISABLE = 0, + Disable = 0, #[doc = "1: Input is inverted before it is passed to the receiver"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RXINV_A) -> Self { + fn from(variant: Rxinv) -> Self { variant as u8 != 0 } } -impl RXINV_R { +#[doc = "Field `RXINV` reader - Receiver Input Invert"] +pub type RxinvR = crate::BitReader; +impl RxinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RXINV_A { + pub const fn variant(&self) -> Rxinv { match self.bits { - false => RXINV_A::DISABLE, - true => RXINV_A::ENABLE, + false => Rxinv::Disable, + true => Rxinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Input is passed directly to the receiver"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RXINV_A::DISABLE + *self == Rxinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Input is inverted before it is passed to the receiver"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RXINV_A::ENABLE + *self == Rxinv::Enable } } #[doc = "Field `RXINV` writer - Receiver Input Invert"] -pub type RXINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, RXINV_A, O>; -impl<'a, const O: u8> RXINV_W<'a, O> { +pub type RxinvW<'a, REG> = crate::BitWriter<'a, REG, Rxinv>; +impl<'a, REG> RxinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Input is passed directly to the receiver"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RXINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Rxinv::Disable) } #[doc = "Input is inverted before it is passed to the receiver"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RXINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Rxinv::Enable) } } -#[doc = "Field `TXINV` reader - Transmitter output Invert"] -pub type TXINV_R = crate::BitReader; #[doc = "Transmitter output Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TXINV_A { +pub enum Txinv { #[doc = "0: Output from the transmitter is passed unchanged to UARTn_TX"] - DISABLE = 0, + Disable = 0, #[doc = "1: Output from the transmitter is inverted before it is passed to UARTn_TX"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TXINV_A) -> Self { + fn from(variant: Txinv) -> Self { variant as u8 != 0 } } -impl TXINV_R { +#[doc = "Field `TXINV` reader - Transmitter output Invert"] +pub type TxinvR = crate::BitReader; +impl TxinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXINV_A { + pub const fn variant(&self) -> Txinv { match self.bits { - false => TXINV_A::DISABLE, - true => TXINV_A::ENABLE, + false => Txinv::Disable, + true => Txinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Output from the transmitter is passed unchanged to UARTn_TX"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == TXINV_A::DISABLE + *self == Txinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Output from the transmitter is inverted before it is passed to UARTn_TX"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == TXINV_A::ENABLE + *self == Txinv::Enable } } #[doc = "Field `TXINV` writer - Transmitter output Invert"] -pub type TXINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, TXINV_A, O>; -impl<'a, const O: u8> TXINV_W<'a, O> { +pub type TxinvW<'a, REG> = crate::BitWriter<'a, REG, Txinv>; +impl<'a, REG> TxinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Output from the transmitter is passed unchanged to UARTn_TX"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(TXINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Txinv::Disable) } #[doc = "Output from the transmitter is inverted before it is passed to UARTn_TX"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(TXINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Txinv::Enable) } } -#[doc = "Field `AUTOTRI` reader - Automatic TX Tristate"] -pub type AUTOTRI_R = crate::BitReader; #[doc = "Automatic TX Tristate\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AUTOTRI_A { +pub enum Autotri { #[doc = "0: The output on UARTn_TX when the transmitter is idle is defined by TXINV"] - DISABLE = 0, + Disable = 0, #[doc = "1: UARTn_TX is tristated whenever the transmitter is idle"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AUTOTRI_A) -> Self { + fn from(variant: Autotri) -> Self { variant as u8 != 0 } } -impl AUTOTRI_R { +#[doc = "Field `AUTOTRI` reader - Automatic TX Tristate"] +pub type AutotriR = crate::BitReader; +impl AutotriR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> AUTOTRI_A { + pub const fn variant(&self) -> Autotri { match self.bits { - false => AUTOTRI_A::DISABLE, - true => AUTOTRI_A::ENABLE, + false => Autotri::Disable, + true => Autotri::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The output on UARTn_TX when the transmitter is idle is defined by TXINV"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == AUTOTRI_A::DISABLE + *self == Autotri::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "UARTn_TX is tristated whenever the transmitter is idle"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == AUTOTRI_A::ENABLE + *self == Autotri::Enable } } #[doc = "Field `AUTOTRI` writer - Automatic TX Tristate"] -pub type AUTOTRI_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, AUTOTRI_A, O>; -impl<'a, const O: u8> AUTOTRI_W<'a, O> { +pub type AutotriW<'a, REG> = crate::BitWriter<'a, REG, Autotri>; +impl<'a, REG> AutotriW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The output on UARTn_TX when the transmitter is idle is defined by TXINV"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(AUTOTRI_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Autotri::Disable) } #[doc = "UARTn_TX is tristated whenever the transmitter is idle"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(AUTOTRI_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Autotri::Enable) } } #[doc = "Field `SKIPPERRF` reader - Skip Parity Error Frames"] -pub type SKIPPERRF_R = crate::BitReader; +pub type SkipperrfR = crate::BitReader; #[doc = "Field `SKIPPERRF` writer - Skip Parity Error Frames"] -pub type SKIPPERRF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, O>; -#[doc = "Field `ERRSDMA` reader - Halt DMA Read On Error"] -pub type ERRSDMA_R = crate::BitReader; +pub type SkipperrfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Halt DMA Read On Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRSDMA_A { +pub enum Errsdma { #[doc = "0: Framing and parity errors have no effect on DMA requests from the EUSART"] - DISABLE = 0, + Disable = 0, #[doc = "1: DMA requests from the EUSART are blocked while the PERR or FERR interrupt flags are set"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRSDMA_A) -> Self { + fn from(variant: Errsdma) -> Self { variant as u8 != 0 } } -impl ERRSDMA_R { +#[doc = "Field `ERRSDMA` reader - Halt DMA Read On Error"] +pub type ErrsdmaR = crate::BitReader; +impl ErrsdmaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ERRSDMA_A { + pub const fn variant(&self) -> Errsdma { match self.bits { - false => ERRSDMA_A::DISABLE, - true => ERRSDMA_A::ENABLE, + false => Errsdma::Disable, + true => Errsdma::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Framing and parity errors have no effect on DMA requests from the EUSART"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ERRSDMA_A::DISABLE + *self == Errsdma::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "DMA requests from the EUSART are blocked while the PERR or FERR interrupt flags are set"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ERRSDMA_A::ENABLE + *self == Errsdma::Enable } } #[doc = "Field `ERRSDMA` writer - Halt DMA Read On Error"] -pub type ERRSDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, ERRSDMA_A, O>; -impl<'a, const O: u8> ERRSDMA_W<'a, O> { +pub type ErrsdmaW<'a, REG> = crate::BitWriter<'a, REG, Errsdma>; +impl<'a, REG> ErrsdmaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Framing and parity errors have no effect on DMA requests from the EUSART"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ERRSDMA_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Errsdma::Disable) } #[doc = "DMA requests from the EUSART are blocked while the PERR or FERR interrupt flags are set"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ERRSDMA_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Errsdma::Enable) } } -#[doc = "Field `ERRSRX` reader - Disable RX On Error"] -pub type ERRSRX_R = crate::BitReader; #[doc = "Disable RX On Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRSRX_A { +pub enum Errsrx { #[doc = "0: Framing and parity errors have no effect on receiver"] - DISABLE = 0, + Disable = 0, #[doc = "1: Framing and parity errors disable the receiver"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRSRX_A) -> Self { + fn from(variant: Errsrx) -> Self { variant as u8 != 0 } } -impl ERRSRX_R { +#[doc = "Field `ERRSRX` reader - Disable RX On Error"] +pub type ErrsrxR = crate::BitReader; +impl ErrsrxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ERRSRX_A { + pub const fn variant(&self) -> Errsrx { match self.bits { - false => ERRSRX_A::DISABLE, - true => ERRSRX_A::ENABLE, + false => Errsrx::Disable, + true => Errsrx::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Framing and parity errors have no effect on receiver"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ERRSRX_A::DISABLE + *self == Errsrx::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Framing and parity errors disable the receiver"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ERRSRX_A::ENABLE + *self == Errsrx::Enable } } #[doc = "Field `ERRSRX` writer - Disable RX On Error"] -pub type ERRSRX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, ERRSRX_A, O>; -impl<'a, const O: u8> ERRSRX_W<'a, O> { +pub type ErrsrxW<'a, REG> = crate::BitWriter<'a, REG, Errsrx>; +impl<'a, REG> ErrsrxW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Framing and parity errors have no effect on receiver"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ERRSRX_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Errsrx::Disable) } #[doc = "Framing and parity errors disable the receiver"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ERRSRX_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Errsrx::Enable) } } -#[doc = "Field `ERRSTX` reader - Disable TX On Error"] -pub type ERRSTX_R = crate::BitReader; #[doc = "Disable TX On Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRSTX_A { +pub enum Errstx { #[doc = "0: Received framing and parity errors have no effect on transmitter"] - DISABLE = 0, + Disable = 0, #[doc = "1: Received framing and parity errors disable the transmitter"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRSTX_A) -> Self { + fn from(variant: Errstx) -> Self { variant as u8 != 0 } } -impl ERRSTX_R { +#[doc = "Field `ERRSTX` reader - Disable TX On Error"] +pub type ErrstxR = crate::BitReader; +impl ErrstxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ERRSTX_A { + pub const fn variant(&self) -> Errstx { match self.bits { - false => ERRSTX_A::DISABLE, - true => ERRSTX_A::ENABLE, + false => Errstx::Disable, + true => Errstx::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Received framing and parity errors have no effect on transmitter"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ERRSTX_A::DISABLE + *self == Errstx::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Received framing and parity errors disable the transmitter"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ERRSTX_A::ENABLE + *self == Errstx::Enable } } #[doc = "Field `ERRSTX` writer - Disable TX On Error"] -pub type ERRSTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, ERRSTX_A, O>; -impl<'a, const O: u8> ERRSTX_W<'a, O> { +pub type ErrstxW<'a, REG> = crate::BitWriter<'a, REG, Errstx>; +impl<'a, REG> ErrstxW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Received framing and parity errors have no effect on transmitter"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ERRSTX_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Errstx::Disable) } #[doc = "Received framing and parity errors disable the transmitter"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ERRSTX_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Errstx::Enable) } } #[doc = "Field `MVDIS` reader - Majority Vote Disable"] -pub type MVDIS_R = crate::BitReader; +pub type MvdisR = crate::BitReader; #[doc = "Field `MVDIS` writer - Majority Vote Disable"] -pub type MVDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, O>; +pub type MvdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOBAUDEN` reader - AUTOBAUD detection enable"] -pub type AUTOBAUDEN_R = crate::BitReader; +pub type AutobaudenR = crate::BitReader; #[doc = "Field `AUTOBAUDEN` writer - AUTOBAUD detection enable"] -pub type AUTOBAUDEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, O>; +pub type AutobaudenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Synchronous Mode"] #[inline(always)] - pub fn sync(&self) -> SYNC_R { - SYNC_R::new((self.bits & 1) != 0) + pub fn sync(&self) -> SyncR { + SyncR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Loopback Enable"] #[inline(always)] - pub fn loopbk(&self) -> LOOPBK_R { - LOOPBK_R::new(((self.bits >> 1) & 1) != 0) + pub fn loopbk(&self) -> LoopbkR { + LoopbkR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Collision Check Enable"] #[inline(always)] - pub fn ccen(&self) -> CCEN_R { - CCEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn ccen(&self) -> CcenR { + CcenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Multi-Processor Mode"] #[inline(always)] - pub fn mpm(&self) -> MPM_R { - MPM_R::new(((self.bits >> 3) & 1) != 0) + pub fn mpm(&self) -> MpmR { + MpmR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Multi-Processor Address-Bit"] #[inline(always)] - pub fn mpab(&self) -> MPAB_R { - MPAB_R::new(((self.bits >> 4) & 1) != 0) + pub fn mpab(&self) -> MpabR { + MpabR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 5:7 - Oversampling"] #[inline(always)] - pub fn ovs(&self) -> OVS_R { - OVS_R::new(((self.bits >> 5) & 7) as u8) + pub fn ovs(&self) -> OvsR { + OvsR::new(((self.bits >> 5) & 7) as u8) } #[doc = "Bit 10 - Most Significant Bit First"] #[inline(always)] - pub fn msbf(&self) -> MSBF_R { - MSBF_R::new(((self.bits >> 10) & 1) != 0) + pub fn msbf(&self) -> MsbfR { + MsbfR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 13 - Receiver Input Invert"] #[inline(always)] - pub fn rxinv(&self) -> RXINV_R { - RXINV_R::new(((self.bits >> 13) & 1) != 0) + pub fn rxinv(&self) -> RxinvR { + RxinvR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Transmitter output Invert"] #[inline(always)] - pub fn txinv(&self) -> TXINV_R { - TXINV_R::new(((self.bits >> 14) & 1) != 0) + pub fn txinv(&self) -> TxinvR { + TxinvR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 17 - Automatic TX Tristate"] #[inline(always)] - pub fn autotri(&self) -> AUTOTRI_R { - AUTOTRI_R::new(((self.bits >> 17) & 1) != 0) + pub fn autotri(&self) -> AutotriR { + AutotriR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 20 - Skip Parity Error Frames"] #[inline(always)] - pub fn skipperrf(&self) -> SKIPPERRF_R { - SKIPPERRF_R::new(((self.bits >> 20) & 1) != 0) + pub fn skipperrf(&self) -> SkipperrfR { + SkipperrfR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 22 - Halt DMA Read On Error"] #[inline(always)] - pub fn errsdma(&self) -> ERRSDMA_R { - ERRSDMA_R::new(((self.bits >> 22) & 1) != 0) + pub fn errsdma(&self) -> ErrsdmaR { + ErrsdmaR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Disable RX On Error"] #[inline(always)] - pub fn errsrx(&self) -> ERRSRX_R { - ERRSRX_R::new(((self.bits >> 23) & 1) != 0) + pub fn errsrx(&self) -> ErrsrxR { + ErrsrxR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - Disable TX On Error"] #[inline(always)] - pub fn errstx(&self) -> ERRSTX_R { - ERRSTX_R::new(((self.bits >> 24) & 1) != 0) + pub fn errstx(&self) -> ErrstxR { + ErrstxR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 30 - Majority Vote Disable"] #[inline(always)] - pub fn mvdis(&self) -> MVDIS_R { - MVDIS_R::new(((self.bits >> 30) & 1) != 0) + pub fn mvdis(&self) -> MvdisR { + MvdisR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - AUTOBAUD detection enable"] #[inline(always)] - pub fn autobauden(&self) -> AUTOBAUDEN_R { - AUTOBAUDEN_R::new(((self.bits >> 31) & 1) != 0) + pub fn autobauden(&self) -> AutobaudenR { + AutobaudenR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Synchronous Mode"] #[inline(always)] #[must_use] - pub fn sync(&mut self) -> SYNC_W<0> { - SYNC_W::new(self) + pub fn sync(&mut self) -> SyncW { + SyncW::new(self, 0) } #[doc = "Bit 1 - Loopback Enable"] #[inline(always)] #[must_use] - pub fn loopbk(&mut self) -> LOOPBK_W<1> { - LOOPBK_W::new(self) + pub fn loopbk(&mut self) -> LoopbkW { + LoopbkW::new(self, 1) } #[doc = "Bit 2 - Collision Check Enable"] #[inline(always)] #[must_use] - pub fn ccen(&mut self) -> CCEN_W<2> { - CCEN_W::new(self) + pub fn ccen(&mut self) -> CcenW { + CcenW::new(self, 2) } #[doc = "Bit 3 - Multi-Processor Mode"] #[inline(always)] #[must_use] - pub fn mpm(&mut self) -> MPM_W<3> { - MPM_W::new(self) + pub fn mpm(&mut self) -> MpmW { + MpmW::new(self, 3) } #[doc = "Bit 4 - Multi-Processor Address-Bit"] #[inline(always)] #[must_use] - pub fn mpab(&mut self) -> MPAB_W<4> { - MPAB_W::new(self) + pub fn mpab(&mut self) -> MpabW { + MpabW::new(self, 4) } #[doc = "Bits 5:7 - Oversampling"] #[inline(always)] #[must_use] - pub fn ovs(&mut self) -> OVS_W<5> { - OVS_W::new(self) + pub fn ovs(&mut self) -> OvsW { + OvsW::new(self, 5) } #[doc = "Bit 10 - Most Significant Bit First"] #[inline(always)] #[must_use] - pub fn msbf(&mut self) -> MSBF_W<10> { - MSBF_W::new(self) + pub fn msbf(&mut self) -> MsbfW { + MsbfW::new(self, 10) } #[doc = "Bit 13 - Receiver Input Invert"] #[inline(always)] #[must_use] - pub fn rxinv(&mut self) -> RXINV_W<13> { - RXINV_W::new(self) + pub fn rxinv(&mut self) -> RxinvW { + RxinvW::new(self, 13) } #[doc = "Bit 14 - Transmitter output Invert"] #[inline(always)] #[must_use] - pub fn txinv(&mut self) -> TXINV_W<14> { - TXINV_W::new(self) + pub fn txinv(&mut self) -> TxinvW { + TxinvW::new(self, 14) } #[doc = "Bit 17 - Automatic TX Tristate"] #[inline(always)] #[must_use] - pub fn autotri(&mut self) -> AUTOTRI_W<17> { - AUTOTRI_W::new(self) + pub fn autotri(&mut self) -> AutotriW { + AutotriW::new(self, 17) } #[doc = "Bit 20 - Skip Parity Error Frames"] #[inline(always)] #[must_use] - pub fn skipperrf(&mut self) -> SKIPPERRF_W<20> { - SKIPPERRF_W::new(self) + pub fn skipperrf(&mut self) -> SkipperrfW { + SkipperrfW::new(self, 20) } #[doc = "Bit 22 - Halt DMA Read On Error"] #[inline(always)] #[must_use] - pub fn errsdma(&mut self) -> ERRSDMA_W<22> { - ERRSDMA_W::new(self) + pub fn errsdma(&mut self) -> ErrsdmaW { + ErrsdmaW::new(self, 22) } #[doc = "Bit 23 - Disable RX On Error"] #[inline(always)] #[must_use] - pub fn errsrx(&mut self) -> ERRSRX_W<23> { - ERRSRX_W::new(self) + pub fn errsrx(&mut self) -> ErrsrxW { + ErrsrxW::new(self, 23) } #[doc = "Bit 24 - Disable TX On Error"] #[inline(always)] #[must_use] - pub fn errstx(&mut self) -> ERRSTX_W<24> { - ERRSTX_W::new(self) + pub fn errstx(&mut self) -> ErrstxW { + ErrstxW::new(self, 24) } #[doc = "Bit 30 - Majority Vote Disable"] #[inline(always)] #[must_use] - pub fn mvdis(&mut self) -> MVDIS_W<30> { - MVDIS_W::new(self) + pub fn mvdis(&mut self) -> MvdisW { + MvdisW::new(self, 30) } #[doc = "Bit 31 - AUTOBAUD detection enable"] #[inline(always)] #[must_use] - pub fn autobauden(&mut self) -> AUTOBAUDEN_W<31> { - AUTOBAUDEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn autobauden(&mut self) -> AutobaudenW { + AutobaudenW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg0](index.html) module"] -pub struct CFG0_SPEC; -impl crate::RegisterSpec for CFG0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cfg0Spec; +impl crate::RegisterSpec for Cfg0Spec { type Ux = u32; } -#[doc = "`read()` method returns [cfg0::R](R) reader structure"] -impl crate::Readable for CFG0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg0::W](W) writer structure"] -impl crate::Writable for CFG0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg0::R`](R) reader structure"] +impl crate::Readable for Cfg0Spec {} +#[doc = "`write(|w| ..)` method takes [`cfg0::W`](W) writer structure"] +impl crate::Writable for Cfg0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG0 to value 0"] -impl crate::Resettable for CFG0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cfg0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/cfg1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/cfg1.rs index c0424d3..4c3498c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/cfg1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/cfg1.rs @@ -1,1247 +1,1249 @@ #[doc = "Register `CFG1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DBGHALT` reader - Debug halt"] -pub type DBGHALT_R = crate::BitReader; +pub type W = crate::W; #[doc = "Debug halt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DBGHALT_A { +pub enum Dbghalt { #[doc = "0: Continue normal EUSART operation even if core is halted"] - DISABLE = 0, + Disable = 0, #[doc = "1: If core is halted, receive one frame and then halt reception by deactivating RTS. Next frame reception happens when the core is unhalted during single stepping."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DBGHALT_A) -> Self { + fn from(variant: Dbghalt) -> Self { variant as u8 != 0 } } -impl DBGHALT_R { +#[doc = "Field `DBGHALT` reader - Debug halt"] +pub type DbghaltR = crate::BitReader; +impl DbghaltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DBGHALT_A { + pub const fn variant(&self) -> Dbghalt { match self.bits { - false => DBGHALT_A::DISABLE, - true => DBGHALT_A::ENABLE, + false => Dbghalt::Disable, + true => Dbghalt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Continue normal EUSART operation even if core is halted"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == DBGHALT_A::DISABLE + *self == Dbghalt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "If core is halted, receive one frame and then halt reception by deactivating RTS. Next frame reception happens when the core is unhalted during single stepping."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == DBGHALT_A::ENABLE + *self == Dbghalt::Enable } } #[doc = "Field `DBGHALT` writer - Debug halt"] -pub type DBGHALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, DBGHALT_A, O>; -impl<'a, const O: u8> DBGHALT_W<'a, O> { +pub type DbghaltW<'a, REG> = crate::BitWriter<'a, REG, Dbghalt>; +impl<'a, REG> DbghaltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Continue normal EUSART operation even if core is halted"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(DBGHALT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Dbghalt::Disable) } #[doc = "If core is halted, receive one frame and then halt reception by deactivating RTS. Next frame reception happens when the core is unhalted during single stepping."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(DBGHALT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Dbghalt::Enable) } } -#[doc = "Field `CTSINV` reader - Clear-to-send Invert Enable"] -pub type CTSINV_R = crate::BitReader; #[doc = "Clear-to-send Invert Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CTSINV_A { +pub enum Ctsinv { #[doc = "0: The CTS pin is active low"] - DISABLE = 0, + Disable = 0, #[doc = "1: The CTS pin is active high"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CTSINV_A) -> Self { + fn from(variant: Ctsinv) -> Self { variant as u8 != 0 } } -impl CTSINV_R { +#[doc = "Field `CTSINV` reader - Clear-to-send Invert Enable"] +pub type CtsinvR = crate::BitReader; +impl CtsinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CTSINV_A { + pub const fn variant(&self) -> Ctsinv { match self.bits { - false => CTSINV_A::DISABLE, - true => CTSINV_A::ENABLE, + false => Ctsinv::Disable, + true => Ctsinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The CTS pin is active low"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CTSINV_A::DISABLE + *self == Ctsinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The CTS pin is active high"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CTSINV_A::ENABLE + *self == Ctsinv::Enable } } #[doc = "Field `CTSINV` writer - Clear-to-send Invert Enable"] -pub type CTSINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, CTSINV_A, O>; -impl<'a, const O: u8> CTSINV_W<'a, O> { +pub type CtsinvW<'a, REG> = crate::BitWriter<'a, REG, Ctsinv>; +impl<'a, REG> CtsinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The CTS pin is active low"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CTSINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ctsinv::Disable) } #[doc = "The CTS pin is active high"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CTSINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Ctsinv::Enable) } } -#[doc = "Field `CTSEN` reader - Clear-to-send Enable"] -pub type CTSEN_R = crate::BitReader; #[doc = "Clear-to-send Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CTSEN_A { +pub enum Ctsen { #[doc = "0: Ignore CTS"] - DISABLE = 0, + Disable = 0, #[doc = "1: Stop transmitting when CTS is inactive"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CTSEN_A) -> Self { + fn from(variant: Ctsen) -> Self { variant as u8 != 0 } } -impl CTSEN_R { +#[doc = "Field `CTSEN` reader - Clear-to-send Enable"] +pub type CtsenR = crate::BitReader; +impl CtsenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CTSEN_A { + pub const fn variant(&self) -> Ctsen { match self.bits { - false => CTSEN_A::DISABLE, - true => CTSEN_A::ENABLE, + false => Ctsen::Disable, + true => Ctsen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Ignore CTS"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CTSEN_A::DISABLE + *self == Ctsen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Stop transmitting when CTS is inactive"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CTSEN_A::ENABLE + *self == Ctsen::Enable } } #[doc = "Field `CTSEN` writer - Clear-to-send Enable"] -pub type CTSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, CTSEN_A, O>; -impl<'a, const O: u8> CTSEN_W<'a, O> { +pub type CtsenW<'a, REG> = crate::BitWriter<'a, REG, Ctsen>; +impl<'a, REG> CtsenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Ignore CTS"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CTSEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ctsen::Disable) } #[doc = "Stop transmitting when CTS is inactive"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CTSEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Ctsen::Enable) } } -#[doc = "Field `RTSINV` reader - Request-to-send Invert Enable"] -pub type RTSINV_R = crate::BitReader; #[doc = "Request-to-send Invert Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTSINV_A { +pub enum Rtsinv { #[doc = "0: The RTS pin is active low"] - DISABLE = 0, + Disable = 0, #[doc = "1: The RTS pin is active high"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTSINV_A) -> Self { + fn from(variant: Rtsinv) -> Self { variant as u8 != 0 } } -impl RTSINV_R { +#[doc = "Field `RTSINV` reader - Request-to-send Invert Enable"] +pub type RtsinvR = crate::BitReader; +impl RtsinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RTSINV_A { + pub const fn variant(&self) -> Rtsinv { match self.bits { - false => RTSINV_A::DISABLE, - true => RTSINV_A::ENABLE, + false => Rtsinv::Disable, + true => Rtsinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The RTS pin is active low"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RTSINV_A::DISABLE + *self == Rtsinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The RTS pin is active high"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RTSINV_A::ENABLE + *self == Rtsinv::Enable } } #[doc = "Field `RTSINV` writer - Request-to-send Invert Enable"] -pub type RTSINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, RTSINV_A, O>; -impl<'a, const O: u8> RTSINV_W<'a, O> { +pub type RtsinvW<'a, REG> = crate::BitWriter<'a, REG, Rtsinv>; +impl<'a, REG> RtsinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The RTS pin is active low"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RTSINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Rtsinv::Disable) } #[doc = "The RTS pin is active high"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RTSINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Rtsinv::Enable) } } -#[doc = "Field `RXTIMEOUT` reader - RX Timeout"] -pub type RXTIMEOUT_R = crate::FieldReader; #[doc = "RX Timeout\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RXTIMEOUT_A { +pub enum Rxtimeout { #[doc = "0: DISABLED"] - DISABLED = 0, + Disabled = 0, #[doc = "1: ONEFRAME"] - ONEFRAME = 1, + Oneframe = 1, #[doc = "2: TWOFRAMES"] - TWOFRAMES = 2, + Twoframes = 2, #[doc = "3: THREEFRAMES"] - THREEFRAMES = 3, + Threeframes = 3, #[doc = "4: FOURFRAMES"] - FOURFRAMES = 4, + Fourframes = 4, #[doc = "5: FIVEFRAMES"] - FIVEFRAMES = 5, + Fiveframes = 5, #[doc = "6: SIXFRAMES"] - SIXFRAMES = 6, + Sixframes = 6, #[doc = "7: SEVENFRAMES"] - SEVENFRAMES = 7, + Sevenframes = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RXTIMEOUT_A) -> Self { + fn from(variant: Rxtimeout) -> Self { variant as _ } } -impl RXTIMEOUT_R { +impl crate::FieldSpec for Rxtimeout { + type Ux = u8; +} +impl crate::IsEnum for Rxtimeout {} +#[doc = "Field `RXTIMEOUT` reader - RX Timeout"] +pub type RxtimeoutR = crate::FieldReader; +impl RxtimeoutR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RXTIMEOUT_A { + pub const fn variant(&self) -> Rxtimeout { match self.bits { - 0 => RXTIMEOUT_A::DISABLED, - 1 => RXTIMEOUT_A::ONEFRAME, - 2 => RXTIMEOUT_A::TWOFRAMES, - 3 => RXTIMEOUT_A::THREEFRAMES, - 4 => RXTIMEOUT_A::FOURFRAMES, - 5 => RXTIMEOUT_A::FIVEFRAMES, - 6 => RXTIMEOUT_A::SIXFRAMES, - 7 => RXTIMEOUT_A::SEVENFRAMES, + 0 => Rxtimeout::Disabled, + 1 => Rxtimeout::Oneframe, + 2 => Rxtimeout::Twoframes, + 3 => Rxtimeout::Threeframes, + 4 => Rxtimeout::Fourframes, + 5 => Rxtimeout::Fiveframes, + 6 => Rxtimeout::Sixframes, + 7 => Rxtimeout::Sevenframes, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "DISABLED"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == RXTIMEOUT_A::DISABLED + *self == Rxtimeout::Disabled } - #[doc = "Checks if the value of the field is `ONEFRAME`"] + #[doc = "ONEFRAME"] #[inline(always)] pub fn is_oneframe(&self) -> bool { - *self == RXTIMEOUT_A::ONEFRAME + *self == Rxtimeout::Oneframe } - #[doc = "Checks if the value of the field is `TWOFRAMES`"] + #[doc = "TWOFRAMES"] #[inline(always)] pub fn is_twoframes(&self) -> bool { - *self == RXTIMEOUT_A::TWOFRAMES + *self == Rxtimeout::Twoframes } - #[doc = "Checks if the value of the field is `THREEFRAMES`"] + #[doc = "THREEFRAMES"] #[inline(always)] pub fn is_threeframes(&self) -> bool { - *self == RXTIMEOUT_A::THREEFRAMES + *self == Rxtimeout::Threeframes } - #[doc = "Checks if the value of the field is `FOURFRAMES`"] + #[doc = "FOURFRAMES"] #[inline(always)] pub fn is_fourframes(&self) -> bool { - *self == RXTIMEOUT_A::FOURFRAMES + *self == Rxtimeout::Fourframes } - #[doc = "Checks if the value of the field is `FIVEFRAMES`"] + #[doc = "FIVEFRAMES"] #[inline(always)] pub fn is_fiveframes(&self) -> bool { - *self == RXTIMEOUT_A::FIVEFRAMES + *self == Rxtimeout::Fiveframes } - #[doc = "Checks if the value of the field is `SIXFRAMES`"] + #[doc = "SIXFRAMES"] #[inline(always)] pub fn is_sixframes(&self) -> bool { - *self == RXTIMEOUT_A::SIXFRAMES + *self == Rxtimeout::Sixframes } - #[doc = "Checks if the value of the field is `SEVENFRAMES`"] + #[doc = "SEVENFRAMES"] #[inline(always)] pub fn is_sevenframes(&self) -> bool { - *self == RXTIMEOUT_A::SEVENFRAMES + *self == Rxtimeout::Sevenframes } } #[doc = "Field `RXTIMEOUT` writer - RX Timeout"] -pub type RXTIMEOUT_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CFG1_SPEC, u8, RXTIMEOUT_A, 3, O>; -impl<'a, const O: u8> RXTIMEOUT_W<'a, O> { +pub type RxtimeoutW<'a, REG> = crate::FieldWriter<'a, REG, 3, Rxtimeout, crate::Safe>; +impl<'a, REG> RxtimeoutW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "DISABLED"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Disabled) } #[doc = "ONEFRAME"] #[inline(always)] - pub fn oneframe(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::ONEFRAME) + pub fn oneframe(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Oneframe) } #[doc = "TWOFRAMES"] #[inline(always)] - pub fn twoframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::TWOFRAMES) + pub fn twoframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Twoframes) } #[doc = "THREEFRAMES"] #[inline(always)] - pub fn threeframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::THREEFRAMES) + pub fn threeframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Threeframes) } #[doc = "FOURFRAMES"] #[inline(always)] - pub fn fourframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::FOURFRAMES) + pub fn fourframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Fourframes) } #[doc = "FIVEFRAMES"] #[inline(always)] - pub fn fiveframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::FIVEFRAMES) + pub fn fiveframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Fiveframes) } #[doc = "SIXFRAMES"] #[inline(always)] - pub fn sixframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::SIXFRAMES) + pub fn sixframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Sixframes) } #[doc = "SEVENFRAMES"] #[inline(always)] - pub fn sevenframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::SEVENFRAMES) + pub fn sevenframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Sevenframes) } } #[doc = "Field `TXDMAWU` reader - Transmitter DMA Wakeup"] -pub type TXDMAWU_R = crate::BitReader; +pub type TxdmawuR = crate::BitReader; #[doc = "Field `TXDMAWU` writer - Transmitter DMA Wakeup"] -pub type TXDMAWU_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, bool, O>; +pub type TxdmawuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXDMAWU` reader - Receiver DMA Wakeup"] -pub type RXDMAWU_R = crate::BitReader; +pub type RxdmawuR = crate::BitReader; #[doc = "Field `RXDMAWU` writer - Receiver DMA Wakeup"] -pub type RXDMAWU_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, bool, O>; +pub type RxdmawuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SFUBRX` reader - Start Frame Unblock Receiver"] -pub type SFUBRX_R = crate::BitReader; +pub type SfubrxR = crate::BitReader; #[doc = "Field `SFUBRX` writer - Start Frame Unblock Receiver"] -pub type SFUBRX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, bool, O>; +pub type SfubrxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXPRSEN` reader - PRS RX Enable"] -pub type RXPRSEN_R = crate::BitReader; +pub type RxprsenR = crate::BitReader; #[doc = "Field `RXPRSEN` writer - PRS RX Enable"] -pub type RXPRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, bool, O>; -#[doc = "Field `TXFIW` reader - TX FIFO Interrupt Watermark"] -pub type TXFIW_R = crate::FieldReader; +pub type RxprsenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "TX FIFO Interrupt Watermark\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TXFIW_A { +pub enum Txfiw { #[doc = "0: TXFL status flag and IF are set when the TX FIFO has space for at least one more frame."] - ONEFRAME = 0, + Oneframe = 0, #[doc = "1: TXFL status flag and IF are set when the TX FIFO has space for at least two more frames."] - TWOFRAMES = 1, + Twoframes = 1, #[doc = "2: TXFL status flag and IF are set when the TX FIFO has space for at least three more frames."] - THREEFRAMES = 2, + Threeframes = 2, #[doc = "3: TXFL status flag and IF are set when the TX FIFO has space for at least four more frames."] - FOURFRAMES = 3, + Fourframes = 3, #[doc = "4: TXFL status flag and IF are set when the TX FIFO has space for at least five more frames."] - FIVEFRAMES = 4, + Fiveframes = 4, #[doc = "5: TXFL status flag and IF are set when the TX FIFO has space for at least six more frames."] - SIXFRAMES = 5, + Sixframes = 5, #[doc = "6: TXFL status flag and IF are set when the TX FIFO has space for at least seven more frames."] - SEVENFRAMES = 6, + Sevenframes = 6, #[doc = "7: TXFL status flag and IF are set when the TX FIFO has space for at least eight more frames."] - EIGHTFRAMES = 7, + Eightframes = 7, #[doc = "8: TXFL status flag and IF are set when the TX FIFO has space for at least nine more frames."] - NINEFRAMES = 8, + Nineframes = 8, #[doc = "9: TXFL status flag and IF are set when the TX FIFO has space for at least ten more frames."] - TENFRAMES = 9, + Tenframes = 9, #[doc = "10: TXFL status flag and IF are set when the TX FIFO has space for at least eleven more frames."] - ELEVENFRAMES = 10, + Elevenframes = 10, #[doc = "11: TXFL status flag and IF are set when the TX FIFO has space for at least twelve more frames."] - TWELVEFRAMES = 11, + Twelveframes = 11, #[doc = "12: TXFL status flag and IF are set when the TX FIFO has space for at least thriteen more frames."] - THIRTEENFRAMES = 12, + Thirteenframes = 12, #[doc = "13: TXFL status flag and IF are set when the TX FIFO has space for at least fourteen more frames."] - FOURTEENFRAMES = 13, + Fourteenframes = 13, #[doc = "14: TXFL status flag and IF are set when the TX FIFO has space for at least fifteen more frames."] - FIFTEENFRAMES = 14, + Fifteenframes = 14, #[doc = "15: TXFL status flag and IF are set when the TX FIFO has space for at least sixteen more frames."] - SIXTEENFRAMES = 15, + Sixteenframes = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TXFIW_A) -> Self { + fn from(variant: Txfiw) -> Self { variant as _ } } -impl TXFIW_R { +impl crate::FieldSpec for Txfiw { + type Ux = u8; +} +impl crate::IsEnum for Txfiw {} +#[doc = "Field `TXFIW` reader - TX FIFO Interrupt Watermark"] +pub type TxfiwR = crate::FieldReader; +impl TxfiwR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXFIW_A { + pub const fn variant(&self) -> Txfiw { match self.bits { - 0 => TXFIW_A::ONEFRAME, - 1 => TXFIW_A::TWOFRAMES, - 2 => TXFIW_A::THREEFRAMES, - 3 => TXFIW_A::FOURFRAMES, - 4 => TXFIW_A::FIVEFRAMES, - 5 => TXFIW_A::SIXFRAMES, - 6 => TXFIW_A::SEVENFRAMES, - 7 => TXFIW_A::EIGHTFRAMES, - 8 => TXFIW_A::NINEFRAMES, - 9 => TXFIW_A::TENFRAMES, - 10 => TXFIW_A::ELEVENFRAMES, - 11 => TXFIW_A::TWELVEFRAMES, - 12 => TXFIW_A::THIRTEENFRAMES, - 13 => TXFIW_A::FOURTEENFRAMES, - 14 => TXFIW_A::FIFTEENFRAMES, - 15 => TXFIW_A::SIXTEENFRAMES, + 0 => Txfiw::Oneframe, + 1 => Txfiw::Twoframes, + 2 => Txfiw::Threeframes, + 3 => Txfiw::Fourframes, + 4 => Txfiw::Fiveframes, + 5 => Txfiw::Sixframes, + 6 => Txfiw::Sevenframes, + 7 => Txfiw::Eightframes, + 8 => Txfiw::Nineframes, + 9 => Txfiw::Tenframes, + 10 => Txfiw::Elevenframes, + 11 => Txfiw::Twelveframes, + 12 => Txfiw::Thirteenframes, + 13 => Txfiw::Fourteenframes, + 14 => Txfiw::Fifteenframes, + 15 => Txfiw::Sixteenframes, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONEFRAME`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least one more frame."] #[inline(always)] pub fn is_oneframe(&self) -> bool { - *self == TXFIW_A::ONEFRAME + *self == Txfiw::Oneframe } - #[doc = "Checks if the value of the field is `TWOFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least two more frames."] #[inline(always)] pub fn is_twoframes(&self) -> bool { - *self == TXFIW_A::TWOFRAMES + *self == Txfiw::Twoframes } - #[doc = "Checks if the value of the field is `THREEFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least three more frames."] #[inline(always)] pub fn is_threeframes(&self) -> bool { - *self == TXFIW_A::THREEFRAMES + *self == Txfiw::Threeframes } - #[doc = "Checks if the value of the field is `FOURFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least four more frames."] #[inline(always)] pub fn is_fourframes(&self) -> bool { - *self == TXFIW_A::FOURFRAMES + *self == Txfiw::Fourframes } - #[doc = "Checks if the value of the field is `FIVEFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least five more frames."] #[inline(always)] pub fn is_fiveframes(&self) -> bool { - *self == TXFIW_A::FIVEFRAMES + *self == Txfiw::Fiveframes } - #[doc = "Checks if the value of the field is `SIXFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least six more frames."] #[inline(always)] pub fn is_sixframes(&self) -> bool { - *self == TXFIW_A::SIXFRAMES + *self == Txfiw::Sixframes } - #[doc = "Checks if the value of the field is `SEVENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least seven more frames."] #[inline(always)] pub fn is_sevenframes(&self) -> bool { - *self == TXFIW_A::SEVENFRAMES + *self == Txfiw::Sevenframes } - #[doc = "Checks if the value of the field is `EIGHTFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least eight more frames."] #[inline(always)] pub fn is_eightframes(&self) -> bool { - *self == TXFIW_A::EIGHTFRAMES + *self == Txfiw::Eightframes } - #[doc = "Checks if the value of the field is `NINEFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least nine more frames."] #[inline(always)] pub fn is_nineframes(&self) -> bool { - *self == TXFIW_A::NINEFRAMES + *self == Txfiw::Nineframes } - #[doc = "Checks if the value of the field is `TENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least ten more frames."] #[inline(always)] pub fn is_tenframes(&self) -> bool { - *self == TXFIW_A::TENFRAMES + *self == Txfiw::Tenframes } - #[doc = "Checks if the value of the field is `ELEVENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least eleven more frames."] #[inline(always)] pub fn is_elevenframes(&self) -> bool { - *self == TXFIW_A::ELEVENFRAMES + *self == Txfiw::Elevenframes } - #[doc = "Checks if the value of the field is `TWELVEFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least twelve more frames."] #[inline(always)] pub fn is_twelveframes(&self) -> bool { - *self == TXFIW_A::TWELVEFRAMES + *self == Txfiw::Twelveframes } - #[doc = "Checks if the value of the field is `THIRTEENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least thriteen more frames."] #[inline(always)] pub fn is_thirteenframes(&self) -> bool { - *self == TXFIW_A::THIRTEENFRAMES + *self == Txfiw::Thirteenframes } - #[doc = "Checks if the value of the field is `FOURTEENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least fourteen more frames."] #[inline(always)] pub fn is_fourteenframes(&self) -> bool { - *self == TXFIW_A::FOURTEENFRAMES + *self == Txfiw::Fourteenframes } - #[doc = "Checks if the value of the field is `FIFTEENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least fifteen more frames."] #[inline(always)] pub fn is_fifteenframes(&self) -> bool { - *self == TXFIW_A::FIFTEENFRAMES + *self == Txfiw::Fifteenframes } - #[doc = "Checks if the value of the field is `SIXTEENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least sixteen more frames."] #[inline(always)] pub fn is_sixteenframes(&self) -> bool { - *self == TXFIW_A::SIXTEENFRAMES + *self == Txfiw::Sixteenframes } } #[doc = "Field `TXFIW` writer - TX FIFO Interrupt Watermark"] -pub type TXFIW_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG1_SPEC, u8, TXFIW_A, 4, O>; -impl<'a, const O: u8> TXFIW_W<'a, O> { +pub type TxfiwW<'a, REG> = crate::FieldWriter<'a, REG, 4, Txfiw, crate::Safe>; +impl<'a, REG> TxfiwW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least one more frame."] #[inline(always)] - pub fn oneframe(self) -> &'a mut W { - self.variant(TXFIW_A::ONEFRAME) + pub fn oneframe(self) -> &'a mut crate::W { + self.variant(Txfiw::Oneframe) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least two more frames."] #[inline(always)] - pub fn twoframes(self) -> &'a mut W { - self.variant(TXFIW_A::TWOFRAMES) + pub fn twoframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Twoframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least three more frames."] #[inline(always)] - pub fn threeframes(self) -> &'a mut W { - self.variant(TXFIW_A::THREEFRAMES) + pub fn threeframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Threeframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least four more frames."] #[inline(always)] - pub fn fourframes(self) -> &'a mut W { - self.variant(TXFIW_A::FOURFRAMES) + pub fn fourframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Fourframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least five more frames."] #[inline(always)] - pub fn fiveframes(self) -> &'a mut W { - self.variant(TXFIW_A::FIVEFRAMES) + pub fn fiveframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Fiveframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least six more frames."] #[inline(always)] - pub fn sixframes(self) -> &'a mut W { - self.variant(TXFIW_A::SIXFRAMES) + pub fn sixframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Sixframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least seven more frames."] #[inline(always)] - pub fn sevenframes(self) -> &'a mut W { - self.variant(TXFIW_A::SEVENFRAMES) + pub fn sevenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Sevenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least eight more frames."] #[inline(always)] - pub fn eightframes(self) -> &'a mut W { - self.variant(TXFIW_A::EIGHTFRAMES) + pub fn eightframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Eightframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least nine more frames."] #[inline(always)] - pub fn nineframes(self) -> &'a mut W { - self.variant(TXFIW_A::NINEFRAMES) + pub fn nineframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Nineframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least ten more frames."] #[inline(always)] - pub fn tenframes(self) -> &'a mut W { - self.variant(TXFIW_A::TENFRAMES) + pub fn tenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Tenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least eleven more frames."] #[inline(always)] - pub fn elevenframes(self) -> &'a mut W { - self.variant(TXFIW_A::ELEVENFRAMES) + pub fn elevenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Elevenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least twelve more frames."] #[inline(always)] - pub fn twelveframes(self) -> &'a mut W { - self.variant(TXFIW_A::TWELVEFRAMES) + pub fn twelveframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Twelveframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least thriteen more frames."] #[inline(always)] - pub fn thirteenframes(self) -> &'a mut W { - self.variant(TXFIW_A::THIRTEENFRAMES) + pub fn thirteenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Thirteenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least fourteen more frames."] #[inline(always)] - pub fn fourteenframes(self) -> &'a mut W { - self.variant(TXFIW_A::FOURTEENFRAMES) + pub fn fourteenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Fourteenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least fifteen more frames."] #[inline(always)] - pub fn fifteenframes(self) -> &'a mut W { - self.variant(TXFIW_A::FIFTEENFRAMES) + pub fn fifteenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Fifteenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least sixteen more frames."] #[inline(always)] - pub fn sixteenframes(self) -> &'a mut W { - self.variant(TXFIW_A::SIXTEENFRAMES) + pub fn sixteenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Sixteenframes) } } -#[doc = "Field `RTSRXFW` reader - Request-to-send RX FIFO Watermark"] -pub type RTSRXFW_R = crate::FieldReader; #[doc = "Request-to-send RX FIFO Watermark\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RTSRXFW_A { +pub enum Rtsrxfw { #[doc = "0: RTS is set if there is space for at least one more frame in the RX FIFO."] - ONEFRAME = 0, + Oneframe = 0, #[doc = "1: RTS is set if there is space for at least two more frames in the RX FIFO."] - TWOFRAMES = 1, + Twoframes = 1, #[doc = "2: RTS is set if there is space for at least three more frames in the RX FIFO."] - THREEFRAMES = 2, + Threeframes = 2, #[doc = "3: RTS is set if there is space for four more frames in the RX FIFO."] - FOURFRAMES = 3, + Fourframes = 3, #[doc = "4: RTS is set if there is space for five more frames in the RX FIFO."] - FIVEFRAMES = 4, + Fiveframes = 4, #[doc = "5: RTS is set if there is space for six more frames in the RX FIFO."] - SIXFRAMES = 5, + Sixframes = 5, #[doc = "6: RTS is set if there is space for seven more frames in the RX FIFO."] - SEVENFRAMES = 6, + Sevenframes = 6, #[doc = "7: RTS is set if there is space for eight more frames in the RX FIFO."] - EIGHTFRAMES = 7, + Eightframes = 7, #[doc = "8: RTS is set if there is space for nine more frames in the RX FIFO."] - NINEFRAMES = 8, + Nineframes = 8, #[doc = "9: RTS is set if there is space for ten more frames in the RX FIFO."] - TENFRAMES = 9, + Tenframes = 9, #[doc = "10: RTS is set if there is space for eleven more frames in the RX FIFO."] - ELEVENFRAMES = 10, + Elevenframes = 10, #[doc = "11: RTS is set if there is space for twelve more frames in the RX FIFO."] - TWELVEFRAMES = 11, + Twelveframes = 11, #[doc = "12: RTS is set if there is space for thirteen more frames in the RX FIFO."] - THIRTEENFRAMES = 12, + Thirteenframes = 12, #[doc = "13: RTS is set if there is space for fourteen more frames in the RX FIFO."] - FOURTEENFRAMES = 13, + Fourteenframes = 13, #[doc = "14: RTS is set if there is space for fifteen more frames in the RX FIFO."] - FIFTEENFRAMES = 14, + Fifteenframes = 14, #[doc = "15: RTS is set if there is space for sixteen more frames in the RX FIFO."] - SIXTEENFRAMES = 15, + Sixteenframes = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RTSRXFW_A) -> Self { + fn from(variant: Rtsrxfw) -> Self { variant as _ } } -impl RTSRXFW_R { +impl crate::FieldSpec for Rtsrxfw { + type Ux = u8; +} +impl crate::IsEnum for Rtsrxfw {} +#[doc = "Field `RTSRXFW` reader - Request-to-send RX FIFO Watermark"] +pub type RtsrxfwR = crate::FieldReader; +impl RtsrxfwR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RTSRXFW_A { + pub const fn variant(&self) -> Rtsrxfw { match self.bits { - 0 => RTSRXFW_A::ONEFRAME, - 1 => RTSRXFW_A::TWOFRAMES, - 2 => RTSRXFW_A::THREEFRAMES, - 3 => RTSRXFW_A::FOURFRAMES, - 4 => RTSRXFW_A::FIVEFRAMES, - 5 => RTSRXFW_A::SIXFRAMES, - 6 => RTSRXFW_A::SEVENFRAMES, - 7 => RTSRXFW_A::EIGHTFRAMES, - 8 => RTSRXFW_A::NINEFRAMES, - 9 => RTSRXFW_A::TENFRAMES, - 10 => RTSRXFW_A::ELEVENFRAMES, - 11 => RTSRXFW_A::TWELVEFRAMES, - 12 => RTSRXFW_A::THIRTEENFRAMES, - 13 => RTSRXFW_A::FOURTEENFRAMES, - 14 => RTSRXFW_A::FIFTEENFRAMES, - 15 => RTSRXFW_A::SIXTEENFRAMES, + 0 => Rtsrxfw::Oneframe, + 1 => Rtsrxfw::Twoframes, + 2 => Rtsrxfw::Threeframes, + 3 => Rtsrxfw::Fourframes, + 4 => Rtsrxfw::Fiveframes, + 5 => Rtsrxfw::Sixframes, + 6 => Rtsrxfw::Sevenframes, + 7 => Rtsrxfw::Eightframes, + 8 => Rtsrxfw::Nineframes, + 9 => Rtsrxfw::Tenframes, + 10 => Rtsrxfw::Elevenframes, + 11 => Rtsrxfw::Twelveframes, + 12 => Rtsrxfw::Thirteenframes, + 13 => Rtsrxfw::Fourteenframes, + 14 => Rtsrxfw::Fifteenframes, + 15 => Rtsrxfw::Sixteenframes, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONEFRAME`"] + #[doc = "RTS is set if there is space for at least one more frame in the RX FIFO."] #[inline(always)] pub fn is_oneframe(&self) -> bool { - *self == RTSRXFW_A::ONEFRAME + *self == Rtsrxfw::Oneframe } - #[doc = "Checks if the value of the field is `TWOFRAMES`"] + #[doc = "RTS is set if there is space for at least two more frames in the RX FIFO."] #[inline(always)] pub fn is_twoframes(&self) -> bool { - *self == RTSRXFW_A::TWOFRAMES + *self == Rtsrxfw::Twoframes } - #[doc = "Checks if the value of the field is `THREEFRAMES`"] + #[doc = "RTS is set if there is space for at least three more frames in the RX FIFO."] #[inline(always)] pub fn is_threeframes(&self) -> bool { - *self == RTSRXFW_A::THREEFRAMES + *self == Rtsrxfw::Threeframes } - #[doc = "Checks if the value of the field is `FOURFRAMES`"] + #[doc = "RTS is set if there is space for four more frames in the RX FIFO."] #[inline(always)] pub fn is_fourframes(&self) -> bool { - *self == RTSRXFW_A::FOURFRAMES + *self == Rtsrxfw::Fourframes } - #[doc = "Checks if the value of the field is `FIVEFRAMES`"] + #[doc = "RTS is set if there is space for five more frames in the RX FIFO."] #[inline(always)] pub fn is_fiveframes(&self) -> bool { - *self == RTSRXFW_A::FIVEFRAMES + *self == Rtsrxfw::Fiveframes } - #[doc = "Checks if the value of the field is `SIXFRAMES`"] + #[doc = "RTS is set if there is space for six more frames in the RX FIFO."] #[inline(always)] pub fn is_sixframes(&self) -> bool { - *self == RTSRXFW_A::SIXFRAMES + *self == Rtsrxfw::Sixframes } - #[doc = "Checks if the value of the field is `SEVENFRAMES`"] + #[doc = "RTS is set if there is space for seven more frames in the RX FIFO."] #[inline(always)] pub fn is_sevenframes(&self) -> bool { - *self == RTSRXFW_A::SEVENFRAMES + *self == Rtsrxfw::Sevenframes } - #[doc = "Checks if the value of the field is `EIGHTFRAMES`"] + #[doc = "RTS is set if there is space for eight more frames in the RX FIFO."] #[inline(always)] pub fn is_eightframes(&self) -> bool { - *self == RTSRXFW_A::EIGHTFRAMES + *self == Rtsrxfw::Eightframes } - #[doc = "Checks if the value of the field is `NINEFRAMES`"] + #[doc = "RTS is set if there is space for nine more frames in the RX FIFO."] #[inline(always)] pub fn is_nineframes(&self) -> bool { - *self == RTSRXFW_A::NINEFRAMES + *self == Rtsrxfw::Nineframes } - #[doc = "Checks if the value of the field is `TENFRAMES`"] + #[doc = "RTS is set if there is space for ten more frames in the RX FIFO."] #[inline(always)] pub fn is_tenframes(&self) -> bool { - *self == RTSRXFW_A::TENFRAMES + *self == Rtsrxfw::Tenframes } - #[doc = "Checks if the value of the field is `ELEVENFRAMES`"] + #[doc = "RTS is set if there is space for eleven more frames in the RX FIFO."] #[inline(always)] pub fn is_elevenframes(&self) -> bool { - *self == RTSRXFW_A::ELEVENFRAMES + *self == Rtsrxfw::Elevenframes } - #[doc = "Checks if the value of the field is `TWELVEFRAMES`"] + #[doc = "RTS is set if there is space for twelve more frames in the RX FIFO."] #[inline(always)] pub fn is_twelveframes(&self) -> bool { - *self == RTSRXFW_A::TWELVEFRAMES + *self == Rtsrxfw::Twelveframes } - #[doc = "Checks if the value of the field is `THIRTEENFRAMES`"] + #[doc = "RTS is set if there is space for thirteen more frames in the RX FIFO."] #[inline(always)] pub fn is_thirteenframes(&self) -> bool { - *self == RTSRXFW_A::THIRTEENFRAMES + *self == Rtsrxfw::Thirteenframes } - #[doc = "Checks if the value of the field is `FOURTEENFRAMES`"] + #[doc = "RTS is set if there is space for fourteen more frames in the RX FIFO."] #[inline(always)] pub fn is_fourteenframes(&self) -> bool { - *self == RTSRXFW_A::FOURTEENFRAMES + *self == Rtsrxfw::Fourteenframes } - #[doc = "Checks if the value of the field is `FIFTEENFRAMES`"] + #[doc = "RTS is set if there is space for fifteen more frames in the RX FIFO."] #[inline(always)] pub fn is_fifteenframes(&self) -> bool { - *self == RTSRXFW_A::FIFTEENFRAMES + *self == Rtsrxfw::Fifteenframes } - #[doc = "Checks if the value of the field is `SIXTEENFRAMES`"] + #[doc = "RTS is set if there is space for sixteen more frames in the RX FIFO."] #[inline(always)] pub fn is_sixteenframes(&self) -> bool { - *self == RTSRXFW_A::SIXTEENFRAMES + *self == Rtsrxfw::Sixteenframes } } #[doc = "Field `RTSRXFW` writer - Request-to-send RX FIFO Watermark"] -pub type RTSRXFW_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CFG1_SPEC, u8, RTSRXFW_A, 4, O>; -impl<'a, const O: u8> RTSRXFW_W<'a, O> { +pub type RtsrxfwW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rtsrxfw, crate::Safe>; +impl<'a, REG> RtsrxfwW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "RTS is set if there is space for at least one more frame in the RX FIFO."] #[inline(always)] - pub fn oneframe(self) -> &'a mut W { - self.variant(RTSRXFW_A::ONEFRAME) + pub fn oneframe(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Oneframe) } #[doc = "RTS is set if there is space for at least two more frames in the RX FIFO."] #[inline(always)] - pub fn twoframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::TWOFRAMES) + pub fn twoframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Twoframes) } #[doc = "RTS is set if there is space for at least three more frames in the RX FIFO."] #[inline(always)] - pub fn threeframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::THREEFRAMES) + pub fn threeframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Threeframes) } #[doc = "RTS is set if there is space for four more frames in the RX FIFO."] #[inline(always)] - pub fn fourframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::FOURFRAMES) + pub fn fourframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Fourframes) } #[doc = "RTS is set if there is space for five more frames in the RX FIFO."] #[inline(always)] - pub fn fiveframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::FIVEFRAMES) + pub fn fiveframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Fiveframes) } #[doc = "RTS is set if there is space for six more frames in the RX FIFO."] #[inline(always)] - pub fn sixframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::SIXFRAMES) + pub fn sixframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Sixframes) } #[doc = "RTS is set if there is space for seven more frames in the RX FIFO."] #[inline(always)] - pub fn sevenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::SEVENFRAMES) + pub fn sevenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Sevenframes) } #[doc = "RTS is set if there is space for eight more frames in the RX FIFO."] #[inline(always)] - pub fn eightframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::EIGHTFRAMES) + pub fn eightframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Eightframes) } #[doc = "RTS is set if there is space for nine more frames in the RX FIFO."] #[inline(always)] - pub fn nineframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::NINEFRAMES) + pub fn nineframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Nineframes) } #[doc = "RTS is set if there is space for ten more frames in the RX FIFO."] #[inline(always)] - pub fn tenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::TENFRAMES) + pub fn tenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Tenframes) } #[doc = "RTS is set if there is space for eleven more frames in the RX FIFO."] #[inline(always)] - pub fn elevenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::ELEVENFRAMES) + pub fn elevenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Elevenframes) } #[doc = "RTS is set if there is space for twelve more frames in the RX FIFO."] #[inline(always)] - pub fn twelveframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::TWELVEFRAMES) + pub fn twelveframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Twelveframes) } #[doc = "RTS is set if there is space for thirteen more frames in the RX FIFO."] #[inline(always)] - pub fn thirteenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::THIRTEENFRAMES) + pub fn thirteenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Thirteenframes) } #[doc = "RTS is set if there is space for fourteen more frames in the RX FIFO."] #[inline(always)] - pub fn fourteenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::FOURTEENFRAMES) + pub fn fourteenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Fourteenframes) } #[doc = "RTS is set if there is space for fifteen more frames in the RX FIFO."] #[inline(always)] - pub fn fifteenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::FIFTEENFRAMES) + pub fn fifteenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Fifteenframes) } #[doc = "RTS is set if there is space for sixteen more frames in the RX FIFO."] #[inline(always)] - pub fn sixteenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::SIXTEENFRAMES) + pub fn sixteenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Sixteenframes) } } -#[doc = "Field `RXFIW` reader - RX FIFO Interrupt Watermark"] -pub type RXFIW_R = crate::FieldReader; #[doc = "RX FIFO Interrupt Watermark\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RXFIW_A { +pub enum Rxfiw { #[doc = "0: RXFL status flag and IF are set when the RX FIFO has at least one frame in it."] - ONEFRAME = 0, + Oneframe = 0, #[doc = "1: RXFL status flag and IF are set when the RX FIFO has at least two frames in it."] - TWOFRAMES = 1, + Twoframes = 1, #[doc = "2: RXFL status flag and IF are set when the RX FIFO has at least three frames in it."] - THREEFRAMES = 2, + Threeframes = 2, #[doc = "3: RXFL status flag and IF are set when the RX FIFO has at least four frames in it."] - FOURFRAMES = 3, + Fourframes = 3, #[doc = "4: RXFL status flag and IF are set when the RX FIFO has at least five frames in it."] - FIVEFRAMES = 4, + Fiveframes = 4, #[doc = "5: RXFL status flag and IF are set when the RX FIFO has at least six frames in it."] - SIXFRAMES = 5, + Sixframes = 5, #[doc = "6: RXFL status flag and IF are set when the RX FIFO has at least seven frames in it."] - SEVENFRAMES = 6, + Sevenframes = 6, #[doc = "7: RXFL status flag and IF are set when the RX FIFO has at least eight frames in it."] - EIGHTFRAMES = 7, + Eightframes = 7, #[doc = "8: RXFL status flag and IF are set when the RX FIFO has at least nine frames in it."] - NINEFRAMES = 8, + Nineframes = 8, #[doc = "9: RXFL status flag and IF are set when the RX FIFO has at least ten frames in it."] - TENFRAMES = 9, + Tenframes = 9, #[doc = "10: RXFL status flag and IF are set when the RX FIFO has at least eleven frames in it."] - ELEVENFRAMES = 10, + Elevenframes = 10, #[doc = "11: RXFL status flag and IF are set when the RX FIFO has at least twelve frames in it."] - TWELVEFRAMES = 11, + Twelveframes = 11, #[doc = "12: RXFL status flag and IF are set when the RX FIFO has at least thriteen frames in it."] - THIRTEENFRAMES = 12, + Thirteenframes = 12, #[doc = "13: RXFL status flag and IF are set when the RX FIFO has at least fourteen frames in it."] - FOURTEENFRAMES = 13, + Fourteenframes = 13, #[doc = "14: RXFL status flag and IF are set when the RX FIFO has at least fifteen frames in it."] - FIFTEENFRAMES = 14, + Fifteenframes = 14, #[doc = "15: RXFL status flag and IF are set when the RX FIFO has at least sixteen frames in it."] - SIXTEENFRAMES = 15, + Sixteenframes = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RXFIW_A) -> Self { + fn from(variant: Rxfiw) -> Self { variant as _ } } -impl RXFIW_R { +impl crate::FieldSpec for Rxfiw { + type Ux = u8; +} +impl crate::IsEnum for Rxfiw {} +#[doc = "Field `RXFIW` reader - RX FIFO Interrupt Watermark"] +pub type RxfiwR = crate::FieldReader; +impl RxfiwR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RXFIW_A { + pub const fn variant(&self) -> Rxfiw { match self.bits { - 0 => RXFIW_A::ONEFRAME, - 1 => RXFIW_A::TWOFRAMES, - 2 => RXFIW_A::THREEFRAMES, - 3 => RXFIW_A::FOURFRAMES, - 4 => RXFIW_A::FIVEFRAMES, - 5 => RXFIW_A::SIXFRAMES, - 6 => RXFIW_A::SEVENFRAMES, - 7 => RXFIW_A::EIGHTFRAMES, - 8 => RXFIW_A::NINEFRAMES, - 9 => RXFIW_A::TENFRAMES, - 10 => RXFIW_A::ELEVENFRAMES, - 11 => RXFIW_A::TWELVEFRAMES, - 12 => RXFIW_A::THIRTEENFRAMES, - 13 => RXFIW_A::FOURTEENFRAMES, - 14 => RXFIW_A::FIFTEENFRAMES, - 15 => RXFIW_A::SIXTEENFRAMES, + 0 => Rxfiw::Oneframe, + 1 => Rxfiw::Twoframes, + 2 => Rxfiw::Threeframes, + 3 => Rxfiw::Fourframes, + 4 => Rxfiw::Fiveframes, + 5 => Rxfiw::Sixframes, + 6 => Rxfiw::Sevenframes, + 7 => Rxfiw::Eightframes, + 8 => Rxfiw::Nineframes, + 9 => Rxfiw::Tenframes, + 10 => Rxfiw::Elevenframes, + 11 => Rxfiw::Twelveframes, + 12 => Rxfiw::Thirteenframes, + 13 => Rxfiw::Fourteenframes, + 14 => Rxfiw::Fifteenframes, + 15 => Rxfiw::Sixteenframes, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONEFRAME`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least one frame in it."] #[inline(always)] pub fn is_oneframe(&self) -> bool { - *self == RXFIW_A::ONEFRAME + *self == Rxfiw::Oneframe } - #[doc = "Checks if the value of the field is `TWOFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least two frames in it."] #[inline(always)] pub fn is_twoframes(&self) -> bool { - *self == RXFIW_A::TWOFRAMES + *self == Rxfiw::Twoframes } - #[doc = "Checks if the value of the field is `THREEFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least three frames in it."] #[inline(always)] pub fn is_threeframes(&self) -> bool { - *self == RXFIW_A::THREEFRAMES + *self == Rxfiw::Threeframes } - #[doc = "Checks if the value of the field is `FOURFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least four frames in it."] #[inline(always)] pub fn is_fourframes(&self) -> bool { - *self == RXFIW_A::FOURFRAMES + *self == Rxfiw::Fourframes } - #[doc = "Checks if the value of the field is `FIVEFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least five frames in it."] #[inline(always)] pub fn is_fiveframes(&self) -> bool { - *self == RXFIW_A::FIVEFRAMES + *self == Rxfiw::Fiveframes } - #[doc = "Checks if the value of the field is `SIXFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least six frames in it."] #[inline(always)] pub fn is_sixframes(&self) -> bool { - *self == RXFIW_A::SIXFRAMES + *self == Rxfiw::Sixframes } - #[doc = "Checks if the value of the field is `SEVENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least seven frames in it."] #[inline(always)] pub fn is_sevenframes(&self) -> bool { - *self == RXFIW_A::SEVENFRAMES + *self == Rxfiw::Sevenframes } - #[doc = "Checks if the value of the field is `EIGHTFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least eight frames in it."] #[inline(always)] pub fn is_eightframes(&self) -> bool { - *self == RXFIW_A::EIGHTFRAMES + *self == Rxfiw::Eightframes } - #[doc = "Checks if the value of the field is `NINEFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least nine frames in it."] #[inline(always)] pub fn is_nineframes(&self) -> bool { - *self == RXFIW_A::NINEFRAMES + *self == Rxfiw::Nineframes } - #[doc = "Checks if the value of the field is `TENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least ten frames in it."] #[inline(always)] pub fn is_tenframes(&self) -> bool { - *self == RXFIW_A::TENFRAMES + *self == Rxfiw::Tenframes } - #[doc = "Checks if the value of the field is `ELEVENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least eleven frames in it."] #[inline(always)] pub fn is_elevenframes(&self) -> bool { - *self == RXFIW_A::ELEVENFRAMES + *self == Rxfiw::Elevenframes } - #[doc = "Checks if the value of the field is `TWELVEFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least twelve frames in it."] #[inline(always)] pub fn is_twelveframes(&self) -> bool { - *self == RXFIW_A::TWELVEFRAMES + *self == Rxfiw::Twelveframes } - #[doc = "Checks if the value of the field is `THIRTEENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least thriteen frames in it."] #[inline(always)] pub fn is_thirteenframes(&self) -> bool { - *self == RXFIW_A::THIRTEENFRAMES + *self == Rxfiw::Thirteenframes } - #[doc = "Checks if the value of the field is `FOURTEENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least fourteen frames in it."] #[inline(always)] pub fn is_fourteenframes(&self) -> bool { - *self == RXFIW_A::FOURTEENFRAMES + *self == Rxfiw::Fourteenframes } - #[doc = "Checks if the value of the field is `FIFTEENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least fifteen frames in it."] #[inline(always)] pub fn is_fifteenframes(&self) -> bool { - *self == RXFIW_A::FIFTEENFRAMES + *self == Rxfiw::Fifteenframes } - #[doc = "Checks if the value of the field is `SIXTEENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least sixteen frames in it."] #[inline(always)] pub fn is_sixteenframes(&self) -> bool { - *self == RXFIW_A::SIXTEENFRAMES + *self == Rxfiw::Sixteenframes } } #[doc = "Field `RXFIW` writer - RX FIFO Interrupt Watermark"] -pub type RXFIW_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG1_SPEC, u8, RXFIW_A, 4, O>; -impl<'a, const O: u8> RXFIW_W<'a, O> { +pub type RxfiwW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rxfiw, crate::Safe>; +impl<'a, REG> RxfiwW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "RXFL status flag and IF are set when the RX FIFO has at least one frame in it."] #[inline(always)] - pub fn oneframe(self) -> &'a mut W { - self.variant(RXFIW_A::ONEFRAME) + pub fn oneframe(self) -> &'a mut crate::W { + self.variant(Rxfiw::Oneframe) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least two frames in it."] #[inline(always)] - pub fn twoframes(self) -> &'a mut W { - self.variant(RXFIW_A::TWOFRAMES) + pub fn twoframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Twoframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least three frames in it."] #[inline(always)] - pub fn threeframes(self) -> &'a mut W { - self.variant(RXFIW_A::THREEFRAMES) + pub fn threeframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Threeframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least four frames in it."] #[inline(always)] - pub fn fourframes(self) -> &'a mut W { - self.variant(RXFIW_A::FOURFRAMES) + pub fn fourframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Fourframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least five frames in it."] #[inline(always)] - pub fn fiveframes(self) -> &'a mut W { - self.variant(RXFIW_A::FIVEFRAMES) + pub fn fiveframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Fiveframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least six frames in it."] #[inline(always)] - pub fn sixframes(self) -> &'a mut W { - self.variant(RXFIW_A::SIXFRAMES) + pub fn sixframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Sixframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least seven frames in it."] #[inline(always)] - pub fn sevenframes(self) -> &'a mut W { - self.variant(RXFIW_A::SEVENFRAMES) + pub fn sevenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Sevenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least eight frames in it."] #[inline(always)] - pub fn eightframes(self) -> &'a mut W { - self.variant(RXFIW_A::EIGHTFRAMES) + pub fn eightframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Eightframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least nine frames in it."] #[inline(always)] - pub fn nineframes(self) -> &'a mut W { - self.variant(RXFIW_A::NINEFRAMES) + pub fn nineframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Nineframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least ten frames in it."] #[inline(always)] - pub fn tenframes(self) -> &'a mut W { - self.variant(RXFIW_A::TENFRAMES) + pub fn tenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Tenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least eleven frames in it."] #[inline(always)] - pub fn elevenframes(self) -> &'a mut W { - self.variant(RXFIW_A::ELEVENFRAMES) + pub fn elevenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Elevenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least twelve frames in it."] #[inline(always)] - pub fn twelveframes(self) -> &'a mut W { - self.variant(RXFIW_A::TWELVEFRAMES) + pub fn twelveframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Twelveframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least thriteen frames in it."] #[inline(always)] - pub fn thirteenframes(self) -> &'a mut W { - self.variant(RXFIW_A::THIRTEENFRAMES) + pub fn thirteenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Thirteenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least fourteen frames in it."] #[inline(always)] - pub fn fourteenframes(self) -> &'a mut W { - self.variant(RXFIW_A::FOURTEENFRAMES) + pub fn fourteenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Fourteenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least fifteen frames in it."] #[inline(always)] - pub fn fifteenframes(self) -> &'a mut W { - self.variant(RXFIW_A::FIFTEENFRAMES) + pub fn fifteenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Fifteenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least sixteen frames in it."] #[inline(always)] - pub fn sixteenframes(self) -> &'a mut W { - self.variant(RXFIW_A::SIXTEENFRAMES) + pub fn sixteenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Sixteenframes) } } impl R { #[doc = "Bit 0 - Debug halt"] #[inline(always)] - pub fn dbghalt(&self) -> DBGHALT_R { - DBGHALT_R::new((self.bits & 1) != 0) + pub fn dbghalt(&self) -> DbghaltR { + DbghaltR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Clear-to-send Invert Enable"] #[inline(always)] - pub fn ctsinv(&self) -> CTSINV_R { - CTSINV_R::new(((self.bits >> 1) & 1) != 0) + pub fn ctsinv(&self) -> CtsinvR { + CtsinvR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Clear-to-send Enable"] #[inline(always)] - pub fn ctsen(&self) -> CTSEN_R { - CTSEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn ctsen(&self) -> CtsenR { + CtsenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Request-to-send Invert Enable"] #[inline(always)] - pub fn rtsinv(&self) -> RTSINV_R { - RTSINV_R::new(((self.bits >> 3) & 1) != 0) + pub fn rtsinv(&self) -> RtsinvR { + RtsinvR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:6 - RX Timeout"] #[inline(always)] - pub fn rxtimeout(&self) -> RXTIMEOUT_R { - RXTIMEOUT_R::new(((self.bits >> 4) & 7) as u8) + pub fn rxtimeout(&self) -> RxtimeoutR { + RxtimeoutR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bit 9 - Transmitter DMA Wakeup"] #[inline(always)] - pub fn txdmawu(&self) -> TXDMAWU_R { - TXDMAWU_R::new(((self.bits >> 9) & 1) != 0) + pub fn txdmawu(&self) -> TxdmawuR { + TxdmawuR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Receiver DMA Wakeup"] #[inline(always)] - pub fn rxdmawu(&self) -> RXDMAWU_R { - RXDMAWU_R::new(((self.bits >> 10) & 1) != 0) + pub fn rxdmawu(&self) -> RxdmawuR { + RxdmawuR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Start Frame Unblock Receiver"] #[inline(always)] - pub fn sfubrx(&self) -> SFUBRX_R { - SFUBRX_R::new(((self.bits >> 11) & 1) != 0) + pub fn sfubrx(&self) -> SfubrxR { + SfubrxR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 15 - PRS RX Enable"] #[inline(always)] - pub fn rxprsen(&self) -> RXPRSEN_R { - RXPRSEN_R::new(((self.bits >> 15) & 1) != 0) + pub fn rxprsen(&self) -> RxprsenR { + RxprsenR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:19 - TX FIFO Interrupt Watermark"] #[inline(always)] - pub fn txfiw(&self) -> TXFIW_R { - TXFIW_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn txfiw(&self) -> TxfiwR { + TxfiwR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 22:25 - Request-to-send RX FIFO Watermark"] #[inline(always)] - pub fn rtsrxfw(&self) -> RTSRXFW_R { - RTSRXFW_R::new(((self.bits >> 22) & 0x0f) as u8) + pub fn rtsrxfw(&self) -> RtsrxfwR { + RtsrxfwR::new(((self.bits >> 22) & 0x0f) as u8) } #[doc = "Bits 27:30 - RX FIFO Interrupt Watermark"] #[inline(always)] - pub fn rxfiw(&self) -> RXFIW_R { - RXFIW_R::new(((self.bits >> 27) & 0x0f) as u8) + pub fn rxfiw(&self) -> RxfiwR { + RxfiwR::new(((self.bits >> 27) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - Debug halt"] #[inline(always)] #[must_use] - pub fn dbghalt(&mut self) -> DBGHALT_W<0> { - DBGHALT_W::new(self) + pub fn dbghalt(&mut self) -> DbghaltW { + DbghaltW::new(self, 0) } #[doc = "Bit 1 - Clear-to-send Invert Enable"] #[inline(always)] #[must_use] - pub fn ctsinv(&mut self) -> CTSINV_W<1> { - CTSINV_W::new(self) + pub fn ctsinv(&mut self) -> CtsinvW { + CtsinvW::new(self, 1) } #[doc = "Bit 2 - Clear-to-send Enable"] #[inline(always)] #[must_use] - pub fn ctsen(&mut self) -> CTSEN_W<2> { - CTSEN_W::new(self) + pub fn ctsen(&mut self) -> CtsenW { + CtsenW::new(self, 2) } #[doc = "Bit 3 - Request-to-send Invert Enable"] #[inline(always)] #[must_use] - pub fn rtsinv(&mut self) -> RTSINV_W<3> { - RTSINV_W::new(self) + pub fn rtsinv(&mut self) -> RtsinvW { + RtsinvW::new(self, 3) } #[doc = "Bits 4:6 - RX Timeout"] #[inline(always)] #[must_use] - pub fn rxtimeout(&mut self) -> RXTIMEOUT_W<4> { - RXTIMEOUT_W::new(self) + pub fn rxtimeout(&mut self) -> RxtimeoutW { + RxtimeoutW::new(self, 4) } #[doc = "Bit 9 - Transmitter DMA Wakeup"] #[inline(always)] #[must_use] - pub fn txdmawu(&mut self) -> TXDMAWU_W<9> { - TXDMAWU_W::new(self) + pub fn txdmawu(&mut self) -> TxdmawuW { + TxdmawuW::new(self, 9) } #[doc = "Bit 10 - Receiver DMA Wakeup"] #[inline(always)] #[must_use] - pub fn rxdmawu(&mut self) -> RXDMAWU_W<10> { - RXDMAWU_W::new(self) + pub fn rxdmawu(&mut self) -> RxdmawuW { + RxdmawuW::new(self, 10) } #[doc = "Bit 11 - Start Frame Unblock Receiver"] #[inline(always)] #[must_use] - pub fn sfubrx(&mut self) -> SFUBRX_W<11> { - SFUBRX_W::new(self) + pub fn sfubrx(&mut self) -> SfubrxW { + SfubrxW::new(self, 11) } #[doc = "Bit 15 - PRS RX Enable"] #[inline(always)] #[must_use] - pub fn rxprsen(&mut self) -> RXPRSEN_W<15> { - RXPRSEN_W::new(self) + pub fn rxprsen(&mut self) -> RxprsenW { + RxprsenW::new(self, 15) } #[doc = "Bits 16:19 - TX FIFO Interrupt Watermark"] #[inline(always)] #[must_use] - pub fn txfiw(&mut self) -> TXFIW_W<16> { - TXFIW_W::new(self) + pub fn txfiw(&mut self) -> TxfiwW { + TxfiwW::new(self, 16) } #[doc = "Bits 22:25 - Request-to-send RX FIFO Watermark"] #[inline(always)] #[must_use] - pub fn rtsrxfw(&mut self) -> RTSRXFW_W<22> { - RTSRXFW_W::new(self) + pub fn rtsrxfw(&mut self) -> RtsrxfwW { + RtsrxfwW::new(self, 22) } #[doc = "Bits 27:30 - RX FIFO Interrupt Watermark"] #[inline(always)] #[must_use] - pub fn rxfiw(&mut self) -> RXFIW_W<27> { - RXFIW_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rxfiw(&mut self) -> RxfiwW { + RxfiwW::new(self, 27) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg1](index.html) module"] -pub struct CFG1_SPEC; -impl crate::RegisterSpec for CFG1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cfg1Spec; +impl crate::RegisterSpec for Cfg1Spec { type Ux = u32; } -#[doc = "`read()` method returns [cfg1::R](R) reader structure"] -impl crate::Readable for CFG1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg1::W](W) writer structure"] -impl crate::Writable for CFG1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg1::R`](R) reader structure"] +impl crate::Readable for Cfg1Spec {} +#[doc = "`write(|w| ..)` method takes [`cfg1::W`](W) writer structure"] +impl crate::Writable for Cfg1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG1 to value 0"] -impl crate::Resettable for CFG1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cfg1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/cfg2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/cfg2.rs index 1f16a32..08998b3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/cfg2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/cfg2.rs @@ -1,384 +1,356 @@ #[doc = "Register `CFG2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MASTER` reader - Main mode"] -pub type MASTER_R = crate::BitReader; +pub type W = crate::W; #[doc = "Main mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MASTER_A { +pub enum Master { #[doc = "0: Secondary mode"] - SLAVE = 0, + Slave = 0, #[doc = "1: Main mode"] - MASTER = 1, + Master = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MASTER_A) -> Self { + fn from(variant: Master) -> Self { variant as u8 != 0 } } -impl MASTER_R { +#[doc = "Field `MASTER` reader - Main mode"] +pub type MasterR = crate::BitReader; +impl MasterR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MASTER_A { + pub const fn variant(&self) -> Master { match self.bits { - false => MASTER_A::SLAVE, - true => MASTER_A::MASTER, + false => Master::Slave, + true => Master::Master, } } - #[doc = "Checks if the value of the field is `SLAVE`"] + #[doc = "Secondary mode"] #[inline(always)] pub fn is_slave(&self) -> bool { - *self == MASTER_A::SLAVE + *self == Master::Slave } - #[doc = "Checks if the value of the field is `MASTER`"] + #[doc = "Main mode"] #[inline(always)] pub fn is_master(&self) -> bool { - *self == MASTER_A::MASTER + *self == Master::Master } } #[doc = "Field `MASTER` writer - Main mode"] -pub type MASTER_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, MASTER_A, O>; -impl<'a, const O: u8> MASTER_W<'a, O> { +pub type MasterW<'a, REG> = crate::BitWriter<'a, REG, Master>; +impl<'a, REG> MasterW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Secondary mode"] #[inline(always)] - pub fn slave(self) -> &'a mut W { - self.variant(MASTER_A::SLAVE) + pub fn slave(self) -> &'a mut crate::W { + self.variant(Master::Slave) } #[doc = "Main mode"] #[inline(always)] - pub fn master(self) -> &'a mut W { - self.variant(MASTER_A::MASTER) + pub fn master(self) -> &'a mut crate::W { + self.variant(Master::Master) } } -#[doc = "Field `CLKPOL` reader - Clock Polarity"] -pub type CLKPOL_R = crate::BitReader; #[doc = "Clock Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLKPOL_A { +pub enum Clkpol { #[doc = "0: The bus clock used in synchronous mode has a low base value"] - IDLELOW = 0, + Idlelow = 0, #[doc = "1: The bus clock used in synchronous mode has a high base value"] - IDLEHIGH = 1, + Idlehigh = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLKPOL_A) -> Self { + fn from(variant: Clkpol) -> Self { variant as u8 != 0 } } -impl CLKPOL_R { +#[doc = "Field `CLKPOL` reader - Clock Polarity"] +pub type ClkpolR = crate::BitReader; +impl ClkpolR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CLKPOL_A { + pub const fn variant(&self) -> Clkpol { match self.bits { - false => CLKPOL_A::IDLELOW, - true => CLKPOL_A::IDLEHIGH, + false => Clkpol::Idlelow, + true => Clkpol::Idlehigh, } } - #[doc = "Checks if the value of the field is `IDLELOW`"] + #[doc = "The bus clock used in synchronous mode has a low base value"] #[inline(always)] pub fn is_idlelow(&self) -> bool { - *self == CLKPOL_A::IDLELOW + *self == Clkpol::Idlelow } - #[doc = "Checks if the value of the field is `IDLEHIGH`"] + #[doc = "The bus clock used in synchronous mode has a high base value"] #[inline(always)] pub fn is_idlehigh(&self) -> bool { - *self == CLKPOL_A::IDLEHIGH + *self == Clkpol::Idlehigh } } #[doc = "Field `CLKPOL` writer - Clock Polarity"] -pub type CLKPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, CLKPOL_A, O>; -impl<'a, const O: u8> CLKPOL_W<'a, O> { +pub type ClkpolW<'a, REG> = crate::BitWriter<'a, REG, Clkpol>; +impl<'a, REG> ClkpolW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The bus clock used in synchronous mode has a low base value"] #[inline(always)] - pub fn idlelow(self) -> &'a mut W { - self.variant(CLKPOL_A::IDLELOW) + pub fn idlelow(self) -> &'a mut crate::W { + self.variant(Clkpol::Idlelow) } #[doc = "The bus clock used in synchronous mode has a high base value"] #[inline(always)] - pub fn idlehigh(self) -> &'a mut W { - self.variant(CLKPOL_A::IDLEHIGH) + pub fn idlehigh(self) -> &'a mut crate::W { + self.variant(Clkpol::Idlehigh) } } -#[doc = "Field `CLKPHA` reader - Clock Edge for Setup/Sample"] -pub type CLKPHA_R = crate::BitReader; #[doc = "Clock Edge for Setup/Sample\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLKPHA_A { +pub enum Clkpha { #[doc = "0: Data is sampled on the leading edge and set-up on the trailing edge of the bus clock in synchronous mode"] - SAMPLELEADING = 0, + Sampleleading = 0, #[doc = "1: Data is set-up on the leading edge and sampled on the trailing edge of the bus clock in synchronous mode"] - SAMPLETRAILING = 1, + Sampletrailing = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLKPHA_A) -> Self { + fn from(variant: Clkpha) -> Self { variant as u8 != 0 } } -impl CLKPHA_R { +#[doc = "Field `CLKPHA` reader - Clock Edge for Setup/Sample"] +pub type ClkphaR = crate::BitReader; +impl ClkphaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CLKPHA_A { + pub const fn variant(&self) -> Clkpha { match self.bits { - false => CLKPHA_A::SAMPLELEADING, - true => CLKPHA_A::SAMPLETRAILING, + false => Clkpha::Sampleleading, + true => Clkpha::Sampletrailing, } } - #[doc = "Checks if the value of the field is `SAMPLELEADING`"] + #[doc = "Data is sampled on the leading edge and set-up on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] pub fn is_sampleleading(&self) -> bool { - *self == CLKPHA_A::SAMPLELEADING + *self == Clkpha::Sampleleading } - #[doc = "Checks if the value of the field is `SAMPLETRAILING`"] + #[doc = "Data is set-up on the leading edge and sampled on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] pub fn is_sampletrailing(&self) -> bool { - *self == CLKPHA_A::SAMPLETRAILING + *self == Clkpha::Sampletrailing } } #[doc = "Field `CLKPHA` writer - Clock Edge for Setup/Sample"] -pub type CLKPHA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, CLKPHA_A, O>; -impl<'a, const O: u8> CLKPHA_W<'a, O> { +pub type ClkphaW<'a, REG> = crate::BitWriter<'a, REG, Clkpha>; +impl<'a, REG> ClkphaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Data is sampled on the leading edge and set-up on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] - pub fn sampleleading(self) -> &'a mut W { - self.variant(CLKPHA_A::SAMPLELEADING) + pub fn sampleleading(self) -> &'a mut crate::W { + self.variant(Clkpha::Sampleleading) } #[doc = "Data is set-up on the leading edge and sampled on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] - pub fn sampletrailing(self) -> &'a mut W { - self.variant(CLKPHA_A::SAMPLETRAILING) + pub fn sampletrailing(self) -> &'a mut crate::W { + self.variant(Clkpha::Sampletrailing) } } -#[doc = "Field `CSINV` reader - Chip Select Invert"] -pub type CSINV_R = crate::BitReader; #[doc = "Chip Select Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CSINV_A { +pub enum Csinv { #[doc = "0: Chip select is active low"] - AL = 0, + Al = 0, #[doc = "1: Chip select is active high"] - AH = 1, + Ah = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CSINV_A) -> Self { + fn from(variant: Csinv) -> Self { variant as u8 != 0 } } -impl CSINV_R { +#[doc = "Field `CSINV` reader - Chip Select Invert"] +pub type CsinvR = crate::BitReader; +impl CsinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CSINV_A { + pub const fn variant(&self) -> Csinv { match self.bits { - false => CSINV_A::AL, - true => CSINV_A::AH, + false => Csinv::Al, + true => Csinv::Ah, } } - #[doc = "Checks if the value of the field is `AL`"] + #[doc = "Chip select is active low"] #[inline(always)] pub fn is_al(&self) -> bool { - *self == CSINV_A::AL + *self == Csinv::Al } - #[doc = "Checks if the value of the field is `AH`"] + #[doc = "Chip select is active high"] #[inline(always)] pub fn is_ah(&self) -> bool { - *self == CSINV_A::AH + *self == Csinv::Ah } } #[doc = "Field `CSINV` writer - Chip Select Invert"] -pub type CSINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, CSINV_A, O>; -impl<'a, const O: u8> CSINV_W<'a, O> { +pub type CsinvW<'a, REG> = crate::BitWriter<'a, REG, Csinv>; +impl<'a, REG> CsinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Chip select is active low"] #[inline(always)] - pub fn al(self) -> &'a mut W { - self.variant(CSINV_A::AL) + pub fn al(self) -> &'a mut crate::W { + self.variant(Csinv::Al) } #[doc = "Chip select is active high"] #[inline(always)] - pub fn ah(self) -> &'a mut W { - self.variant(CSINV_A::AH) + pub fn ah(self) -> &'a mut crate::W { + self.variant(Csinv::Ah) } } #[doc = "Field `AUTOTX` reader - Always Transmit When RXFIFO Not Full"] -pub type AUTOTX_R = crate::BitReader; +pub type AutotxR = crate::BitReader; #[doc = "Field `AUTOTX` writer - Always Transmit When RXFIFO Not Full"] -pub type AUTOTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, bool, O>; +pub type AutotxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOCS` reader - Automatic Chip Select"] -pub type AUTOCS_R = crate::BitReader; +pub type AutocsR = crate::BitReader; #[doc = "Field `AUTOCS` writer - Automatic Chip Select"] -pub type AUTOCS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, bool, O>; +pub type AutocsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLKPRSEN` reader - PRS CLK Enable"] -pub type CLKPRSEN_R = crate::BitReader; +pub type ClkprsenR = crate::BitReader; #[doc = "Field `CLKPRSEN` writer - PRS CLK Enable"] -pub type CLKPRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, bool, O>; +pub type ClkprsenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FORCELOAD` reader - Force Load to Shift Register"] -pub type FORCELOAD_R = crate::BitReader; +pub type ForceloadR = crate::BitReader; #[doc = "Field `FORCELOAD` writer - Force Load to Shift Register"] -pub type FORCELOAD_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, bool, O>; +pub type ForceloadW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SDIV` reader - Sync Clock Div"] -pub type SDIV_R = crate::FieldReader; +pub type SdivR = crate::FieldReader; #[doc = "Field `SDIV` writer - Sync Clock Div"] -pub type SDIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG2_SPEC, u8, u8, 8, O>; +pub type SdivW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bit 0 - Main mode"] #[inline(always)] - pub fn master(&self) -> MASTER_R { - MASTER_R::new((self.bits & 1) != 0) + pub fn master(&self) -> MasterR { + MasterR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Clock Polarity"] #[inline(always)] - pub fn clkpol(&self) -> CLKPOL_R { - CLKPOL_R::new(((self.bits >> 1) & 1) != 0) + pub fn clkpol(&self) -> ClkpolR { + ClkpolR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Clock Edge for Setup/Sample"] #[inline(always)] - pub fn clkpha(&self) -> CLKPHA_R { - CLKPHA_R::new(((self.bits >> 2) & 1) != 0) + pub fn clkpha(&self) -> ClkphaR { + ClkphaR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Chip Select Invert"] #[inline(always)] - pub fn csinv(&self) -> CSINV_R { - CSINV_R::new(((self.bits >> 3) & 1) != 0) + pub fn csinv(&self) -> CsinvR { + CsinvR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Always Transmit When RXFIFO Not Full"] #[inline(always)] - pub fn autotx(&self) -> AUTOTX_R { - AUTOTX_R::new(((self.bits >> 4) & 1) != 0) + pub fn autotx(&self) -> AutotxR { + AutotxR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Automatic Chip Select"] #[inline(always)] - pub fn autocs(&self) -> AUTOCS_R { - AUTOCS_R::new(((self.bits >> 5) & 1) != 0) + pub fn autocs(&self) -> AutocsR { + AutocsR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - PRS CLK Enable"] #[inline(always)] - pub fn clkprsen(&self) -> CLKPRSEN_R { - CLKPRSEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn clkprsen(&self) -> ClkprsenR { + ClkprsenR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Force Load to Shift Register"] #[inline(always)] - pub fn forceload(&self) -> FORCELOAD_R { - FORCELOAD_R::new(((self.bits >> 7) & 1) != 0) + pub fn forceload(&self) -> ForceloadR { + ForceloadR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 24:31 - Sync Clock Div"] #[inline(always)] - pub fn sdiv(&self) -> SDIV_R { - SDIV_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn sdiv(&self) -> SdivR { + SdivR::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bit 0 - Main mode"] #[inline(always)] #[must_use] - pub fn master(&mut self) -> MASTER_W<0> { - MASTER_W::new(self) + pub fn master(&mut self) -> MasterW { + MasterW::new(self, 0) } #[doc = "Bit 1 - Clock Polarity"] #[inline(always)] #[must_use] - pub fn clkpol(&mut self) -> CLKPOL_W<1> { - CLKPOL_W::new(self) + pub fn clkpol(&mut self) -> ClkpolW { + ClkpolW::new(self, 1) } #[doc = "Bit 2 - Clock Edge for Setup/Sample"] #[inline(always)] #[must_use] - pub fn clkpha(&mut self) -> CLKPHA_W<2> { - CLKPHA_W::new(self) + pub fn clkpha(&mut self) -> ClkphaW { + ClkphaW::new(self, 2) } #[doc = "Bit 3 - Chip Select Invert"] #[inline(always)] #[must_use] - pub fn csinv(&mut self) -> CSINV_W<3> { - CSINV_W::new(self) + pub fn csinv(&mut self) -> CsinvW { + CsinvW::new(self, 3) } #[doc = "Bit 4 - Always Transmit When RXFIFO Not Full"] #[inline(always)] #[must_use] - pub fn autotx(&mut self) -> AUTOTX_W<4> { - AUTOTX_W::new(self) + pub fn autotx(&mut self) -> AutotxW { + AutotxW::new(self, 4) } #[doc = "Bit 5 - Automatic Chip Select"] #[inline(always)] #[must_use] - pub fn autocs(&mut self) -> AUTOCS_W<5> { - AUTOCS_W::new(self) + pub fn autocs(&mut self) -> AutocsW { + AutocsW::new(self, 5) } #[doc = "Bit 6 - PRS CLK Enable"] #[inline(always)] #[must_use] - pub fn clkprsen(&mut self) -> CLKPRSEN_W<6> { - CLKPRSEN_W::new(self) + pub fn clkprsen(&mut self) -> ClkprsenW { + ClkprsenW::new(self, 6) } #[doc = "Bit 7 - Force Load to Shift Register"] #[inline(always)] #[must_use] - pub fn forceload(&mut self) -> FORCELOAD_W<7> { - FORCELOAD_W::new(self) + pub fn forceload(&mut self) -> ForceloadW { + ForceloadW::new(self, 7) } #[doc = "Bits 24:31 - Sync Clock Div"] #[inline(always)] #[must_use] - pub fn sdiv(&mut self) -> SDIV_W<24> { - SDIV_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sdiv(&mut self) -> SdivW { + SdivW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg2](index.html) module"] -pub struct CFG2_SPEC; -impl crate::RegisterSpec for CFG2_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cfg2Spec; +impl crate::RegisterSpec for Cfg2Spec { type Ux = u32; } -#[doc = "`read()` method returns [cfg2::R](R) reader structure"] -impl crate::Readable for CFG2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg2::W](W) writer structure"] -impl crate::Writable for CFG2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg2::R`](R) reader structure"] +impl crate::Readable for Cfg2Spec {} +#[doc = "`write(|w| ..)` method takes [`cfg2::W`](W) writer structure"] +impl crate::Writable for Cfg2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG2 to value 0x20"] -impl crate::Resettable for CFG2_SPEC { - const RESET_VALUE: Self::Ux = 0x20; +impl crate::Resettable for Cfg2Spec { + const RESET_VALUE: u32 = 0x20; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/clkdiv.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/clkdiv.rs index 5158bd5..beab8d8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/clkdiv.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/clkdiv.rs @@ -1,80 +1,40 @@ #[doc = "Register `CLKDIV` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKDIV` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DIV` reader - Fractional Clock Divider"] -pub type DIV_R = crate::FieldReader; +pub type DivR = crate::FieldReader; #[doc = "Field `DIV` writer - Fractional Clock Divider"] -pub type DIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CLKDIV_SPEC, u32, u32, 20, O>; +pub type DivW<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { #[doc = "Bits 3:22 - Fractional Clock Divider"] #[inline(always)] - pub fn div(&self) -> DIV_R { - DIV_R::new((self.bits >> 3) & 0x000f_ffff) + pub fn div(&self) -> DivR { + DivR::new((self.bits >> 3) & 0x000f_ffff) } } impl W { #[doc = "Bits 3:22 - Fractional Clock Divider"] #[inline(always)] #[must_use] - pub fn div(&mut self) -> DIV_W<3> { - DIV_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn div(&mut self) -> DivW { + DivW::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clkdiv](index.html) module"] -pub struct CLKDIV_SPEC; -impl crate::RegisterSpec for CLKDIV_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ClkdivSpec; +impl crate::RegisterSpec for ClkdivSpec { type Ux = u32; } -#[doc = "`read()` method returns [clkdiv::R](R) reader structure"] -impl crate::Readable for CLKDIV_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clkdiv::W](W) writer structure"] -impl crate::Writable for CLKDIV_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`clkdiv::R`](R) reader structure"] +impl crate::Readable for ClkdivSpec {} +#[doc = "`write(|w| ..)` method takes [`clkdiv::W`](W) writer structure"] +impl crate::Writable for ClkdivSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV to value 0"] -impl crate::Resettable for CLKDIV_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ClkdivSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/cmd.rs index 8d3465f..39d3e79 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/cmd.rs @@ -1,116 +1,91 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RXEN` writer - Receiver Enable"] -pub type RXEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXDIS` writer - Receiver Disable"] -pub type RXDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXEN` writer - Transmitter Enable"] -pub type TXEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXDIS` writer - Transmitter Disable"] -pub type TXDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXBLOCKEN` writer - Receiver Block Enable"] -pub type RXBLOCKEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxblockenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXBLOCKDIS` writer - Receiver Block Disable"] -pub type RXBLOCKDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxblockdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTRIEN` writer - Transmitter Tristate Enable"] -pub type TXTRIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxtrienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTRIDIS` writer - Transmitter Tristate Disable"] -pub type TXTRIDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxtridisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEARTX` writer - Clear TX FIFO"] -pub type CLEARTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type CleartxW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Receiver Enable"] #[inline(always)] #[must_use] - pub fn rxen(&mut self) -> RXEN_W<0> { - RXEN_W::new(self) + pub fn rxen(&mut self) -> RxenW { + RxenW::new(self, 0) } #[doc = "Bit 1 - Receiver Disable"] #[inline(always)] #[must_use] - pub fn rxdis(&mut self) -> RXDIS_W<1> { - RXDIS_W::new(self) + pub fn rxdis(&mut self) -> RxdisW { + RxdisW::new(self, 1) } #[doc = "Bit 2 - Transmitter Enable"] #[inline(always)] #[must_use] - pub fn txen(&mut self) -> TXEN_W<2> { - TXEN_W::new(self) + pub fn txen(&mut self) -> TxenW { + TxenW::new(self, 2) } #[doc = "Bit 3 - Transmitter Disable"] #[inline(always)] #[must_use] - pub fn txdis(&mut self) -> TXDIS_W<3> { - TXDIS_W::new(self) + pub fn txdis(&mut self) -> TxdisW { + TxdisW::new(self, 3) } #[doc = "Bit 4 - Receiver Block Enable"] #[inline(always)] #[must_use] - pub fn rxblocken(&mut self) -> RXBLOCKEN_W<4> { - RXBLOCKEN_W::new(self) + pub fn rxblocken(&mut self) -> RxblockenW { + RxblockenW::new(self, 4) } #[doc = "Bit 5 - Receiver Block Disable"] #[inline(always)] #[must_use] - pub fn rxblockdis(&mut self) -> RXBLOCKDIS_W<5> { - RXBLOCKDIS_W::new(self) + pub fn rxblockdis(&mut self) -> RxblockdisW { + RxblockdisW::new(self, 5) } #[doc = "Bit 6 - Transmitter Tristate Enable"] #[inline(always)] #[must_use] - pub fn txtrien(&mut self) -> TXTRIEN_W<6> { - TXTRIEN_W::new(self) + pub fn txtrien(&mut self) -> TxtrienW { + TxtrienW::new(self, 6) } #[doc = "Bit 7 - Transmitter Tristate Disable"] #[inline(always)] #[must_use] - pub fn txtridis(&mut self) -> TXTRIDIS_W<7> { - TXTRIDIS_W::new(self) + pub fn txtridis(&mut self) -> TxtridisW { + TxtridisW::new(self, 7) } #[doc = "Bit 8 - Clear TX FIFO"] #[inline(always)] #[must_use] - pub fn cleartx(&mut self) -> CLEARTX_W<8> { - CLEARTX_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cleartx(&mut self) -> CleartxW { + CleartxW::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/dtxdatcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/dtxdatcfg.rs index 8ae017b..67cc6f0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/dtxdatcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/dtxdatcfg.rs @@ -1,80 +1,40 @@ #[doc = "Register `DTXDATCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTXDATCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTXDAT` reader - Default TX DATA"] -pub type DTXDAT_R = crate::FieldReader; +pub type DtxdatR = crate::FieldReader; #[doc = "Field `DTXDAT` writer - Default TX DATA"] -pub type DTXDAT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTXDATCFG_SPEC, u16, u16, 16, O>; +pub type DtxdatW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Default TX DATA"] #[inline(always)] - pub fn dtxdat(&self) -> DTXDAT_R { - DTXDAT_R::new((self.bits & 0xffff) as u16) + pub fn dtxdat(&self) -> DtxdatR { + DtxdatR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Default TX DATA"] #[inline(always)] #[must_use] - pub fn dtxdat(&mut self) -> DTXDAT_W<0> { - DTXDAT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtxdat(&mut self) -> DtxdatW { + DtxdatW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtxdatcfg](index.html) module"] -pub struct DTXDATCFG_SPEC; -impl crate::RegisterSpec for DTXDATCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtxdatcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtxdatcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtxdatcfgSpec; +impl crate::RegisterSpec for DtxdatcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtxdatcfg::R](R) reader structure"] -impl crate::Readable for DTXDATCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtxdatcfg::W](W) writer structure"] -impl crate::Writable for DTXDATCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtxdatcfg::R`](R) reader structure"] +impl crate::Readable for DtxdatcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dtxdatcfg::W`](W) writer structure"] +impl crate::Writable for DtxdatcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTXDATCFG to value 0"] -impl crate::Resettable for DTXDATCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtxdatcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/en.rs index f15bf65..7298843 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Module enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Module enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Module enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Module enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/framecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/framecfg.rs index 037aaa3..7ad7134 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/framecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/framecfg.rs @@ -1,399 +1,381 @@ #[doc = "Register `FRAMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `FRAMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DATABITS` reader - Data-Bit Mode"] -pub type DATABITS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Data-Bit Mode\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DATABITS_A { +pub enum Databits { #[doc = "1: Each frame contains 7 data bits"] - SEVEN = 1, + Seven = 1, #[doc = "2: Each frame contains 8 data bits"] - EIGHT = 2, + Eight = 2, #[doc = "3: Each frame contains 9 data bits"] - NINE = 3, + Nine = 3, #[doc = "4: Each frame contains 10 data bits"] - TEN = 4, + Ten = 4, #[doc = "5: Each frame contains 11 data bits"] - ELEVEN = 5, + Eleven = 5, #[doc = "6: Each frame contains 12 data bits"] - TWELVE = 6, + Twelve = 6, #[doc = "7: Each frame contains 13 data bits"] - THIRTEEN = 7, + Thirteen = 7, #[doc = "8: Each frame contains 14 data bits"] - FOURTEEN = 8, + Fourteen = 8, #[doc = "9: Each frame contains 15 data bits"] - FIFTEEN = 9, + Fifteen = 9, #[doc = "10: Each frame contains 16 data bits"] - SIXTEEN = 10, + Sixteen = 10, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DATABITS_A) -> Self { + fn from(variant: Databits) -> Self { variant as _ } } -impl DATABITS_R { +impl crate::FieldSpec for Databits { + type Ux = u8; +} +impl crate::IsEnum for Databits {} +#[doc = "Field `DATABITS` reader - Data-Bit Mode"] +pub type DatabitsR = crate::FieldReader; +impl DatabitsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(DATABITS_A::SEVEN), - 2 => Some(DATABITS_A::EIGHT), - 3 => Some(DATABITS_A::NINE), - 4 => Some(DATABITS_A::TEN), - 5 => Some(DATABITS_A::ELEVEN), - 6 => Some(DATABITS_A::TWELVE), - 7 => Some(DATABITS_A::THIRTEEN), - 8 => Some(DATABITS_A::FOURTEEN), - 9 => Some(DATABITS_A::FIFTEEN), - 10 => Some(DATABITS_A::SIXTEEN), + 1 => Some(Databits::Seven), + 2 => Some(Databits::Eight), + 3 => Some(Databits::Nine), + 4 => Some(Databits::Ten), + 5 => Some(Databits::Eleven), + 6 => Some(Databits::Twelve), + 7 => Some(Databits::Thirteen), + 8 => Some(Databits::Fourteen), + 9 => Some(Databits::Fifteen), + 10 => Some(Databits::Sixteen), _ => None, } } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "Each frame contains 7 data bits"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == DATABITS_A::SEVEN + *self == Databits::Seven } - #[doc = "Checks if the value of the field is `EIGHT`"] + #[doc = "Each frame contains 8 data bits"] #[inline(always)] pub fn is_eight(&self) -> bool { - *self == DATABITS_A::EIGHT + *self == Databits::Eight } - #[doc = "Checks if the value of the field is `NINE`"] + #[doc = "Each frame contains 9 data bits"] #[inline(always)] pub fn is_nine(&self) -> bool { - *self == DATABITS_A::NINE + *self == Databits::Nine } - #[doc = "Checks if the value of the field is `TEN`"] + #[doc = "Each frame contains 10 data bits"] #[inline(always)] pub fn is_ten(&self) -> bool { - *self == DATABITS_A::TEN + *self == Databits::Ten } - #[doc = "Checks if the value of the field is `ELEVEN`"] + #[doc = "Each frame contains 11 data bits"] #[inline(always)] pub fn is_eleven(&self) -> bool { - *self == DATABITS_A::ELEVEN + *self == Databits::Eleven } - #[doc = "Checks if the value of the field is `TWELVE`"] + #[doc = "Each frame contains 12 data bits"] #[inline(always)] pub fn is_twelve(&self) -> bool { - *self == DATABITS_A::TWELVE + *self == Databits::Twelve } - #[doc = "Checks if the value of the field is `THIRTEEN`"] + #[doc = "Each frame contains 13 data bits"] #[inline(always)] pub fn is_thirteen(&self) -> bool { - *self == DATABITS_A::THIRTEEN + *self == Databits::Thirteen } - #[doc = "Checks if the value of the field is `FOURTEEN`"] + #[doc = "Each frame contains 14 data bits"] #[inline(always)] pub fn is_fourteen(&self) -> bool { - *self == DATABITS_A::FOURTEEN + *self == Databits::Fourteen } - #[doc = "Checks if the value of the field is `FIFTEEN`"] + #[doc = "Each frame contains 15 data bits"] #[inline(always)] pub fn is_fifteen(&self) -> bool { - *self == DATABITS_A::FIFTEEN + *self == Databits::Fifteen } - #[doc = "Checks if the value of the field is `SIXTEEN`"] + #[doc = "Each frame contains 16 data bits"] #[inline(always)] pub fn is_sixteen(&self) -> bool { - *self == DATABITS_A::SIXTEEN + *self == Databits::Sixteen } } #[doc = "Field `DATABITS` writer - Data-Bit Mode"] -pub type DATABITS_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, FRAMECFG_SPEC, u8, DATABITS_A, 4, O>; -impl<'a, const O: u8> DATABITS_W<'a, O> { +pub type DatabitsW<'a, REG> = crate::FieldWriter<'a, REG, 4, Databits>; +impl<'a, REG> DatabitsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Each frame contains 7 data bits"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(DATABITS_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Databits::Seven) } #[doc = "Each frame contains 8 data bits"] #[inline(always)] - pub fn eight(self) -> &'a mut W { - self.variant(DATABITS_A::EIGHT) + pub fn eight(self) -> &'a mut crate::W { + self.variant(Databits::Eight) } #[doc = "Each frame contains 9 data bits"] #[inline(always)] - pub fn nine(self) -> &'a mut W { - self.variant(DATABITS_A::NINE) + pub fn nine(self) -> &'a mut crate::W { + self.variant(Databits::Nine) } #[doc = "Each frame contains 10 data bits"] #[inline(always)] - pub fn ten(self) -> &'a mut W { - self.variant(DATABITS_A::TEN) + pub fn ten(self) -> &'a mut crate::W { + self.variant(Databits::Ten) } #[doc = "Each frame contains 11 data bits"] #[inline(always)] - pub fn eleven(self) -> &'a mut W { - self.variant(DATABITS_A::ELEVEN) + pub fn eleven(self) -> &'a mut crate::W { + self.variant(Databits::Eleven) } #[doc = "Each frame contains 12 data bits"] #[inline(always)] - pub fn twelve(self) -> &'a mut W { - self.variant(DATABITS_A::TWELVE) + pub fn twelve(self) -> &'a mut crate::W { + self.variant(Databits::Twelve) } #[doc = "Each frame contains 13 data bits"] #[inline(always)] - pub fn thirteen(self) -> &'a mut W { - self.variant(DATABITS_A::THIRTEEN) + pub fn thirteen(self) -> &'a mut crate::W { + self.variant(Databits::Thirteen) } #[doc = "Each frame contains 14 data bits"] #[inline(always)] - pub fn fourteen(self) -> &'a mut W { - self.variant(DATABITS_A::FOURTEEN) + pub fn fourteen(self) -> &'a mut crate::W { + self.variant(Databits::Fourteen) } #[doc = "Each frame contains 15 data bits"] #[inline(always)] - pub fn fifteen(self) -> &'a mut W { - self.variant(DATABITS_A::FIFTEEN) + pub fn fifteen(self) -> &'a mut crate::W { + self.variant(Databits::Fifteen) } #[doc = "Each frame contains 16 data bits"] #[inline(always)] - pub fn sixteen(self) -> &'a mut W { - self.variant(DATABITS_A::SIXTEEN) + pub fn sixteen(self) -> &'a mut crate::W { + self.variant(Databits::Sixteen) } } -#[doc = "Field `PARITY` reader - Parity-Bit Mode"] -pub type PARITY_R = crate::FieldReader; #[doc = "Parity-Bit Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PARITY_A { +pub enum Parity { #[doc = "0: Parity bits are not used"] - NONE = 0, + None = 0, #[doc = "2: Even parity are used. Parity bits are automatically generated and checked by hardware."] - EVEN = 2, + Even = 2, #[doc = "3: Odd parity is used. Parity bits are automatically generated and checked by hardware."] - ODD = 3, + Odd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PARITY_A) -> Self { + fn from(variant: Parity) -> Self { variant as _ } } -impl PARITY_R { +impl crate::FieldSpec for Parity { + type Ux = u8; +} +impl crate::IsEnum for Parity {} +#[doc = "Field `PARITY` reader - Parity-Bit Mode"] +pub type ParityR = crate::FieldReader; +impl ParityR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PARITY_A::NONE), - 2 => Some(PARITY_A::EVEN), - 3 => Some(PARITY_A::ODD), + 0 => Some(Parity::None), + 2 => Some(Parity::Even), + 3 => Some(Parity::Odd), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Parity bits are not used"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == PARITY_A::NONE + *self == Parity::None } - #[doc = "Checks if the value of the field is `EVEN`"] + #[doc = "Even parity are used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] pub fn is_even(&self) -> bool { - *self == PARITY_A::EVEN + *self == Parity::Even } - #[doc = "Checks if the value of the field is `ODD`"] + #[doc = "Odd parity is used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] pub fn is_odd(&self) -> bool { - *self == PARITY_A::ODD + *self == Parity::Odd } } #[doc = "Field `PARITY` writer - Parity-Bit Mode"] -pub type PARITY_W<'a, const O: u8> = crate::FieldWriter<'a, u32, FRAMECFG_SPEC, u8, PARITY_A, 2, O>; -impl<'a, const O: u8> PARITY_W<'a, O> { +pub type ParityW<'a, REG> = crate::FieldWriter<'a, REG, 2, Parity>; +impl<'a, REG> ParityW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Parity bits are not used"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(PARITY_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Parity::None) } #[doc = "Even parity are used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] - pub fn even(self) -> &'a mut W { - self.variant(PARITY_A::EVEN) + pub fn even(self) -> &'a mut crate::W { + self.variant(Parity::Even) } #[doc = "Odd parity is used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] - pub fn odd(self) -> &'a mut W { - self.variant(PARITY_A::ODD) + pub fn odd(self) -> &'a mut crate::W { + self.variant(Parity::Odd) } } -#[doc = "Field `STOPBITS` reader - Stop-Bit Mode"] -pub type STOPBITS_R = crate::FieldReader; #[doc = "Stop-Bit Mode\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STOPBITS_A { +pub enum Stopbits { #[doc = "0: The transmitter generates a half stop bit. Stop-bits are not verified by receiver"] - HALF = 0, + Half = 0, #[doc = "1: One stop bit is generated and verified"] - ONE = 1, + One = 1, #[doc = "2: The transmitter generates one and a half stop bit. The receiver verifies the first stop bit"] - ONEANDAHALF = 2, + Oneandahalf = 2, #[doc = "3: The transmitter generates two stop bits. The receiver checks the first stop-bit only"] - TWO = 3, + Two = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STOPBITS_A) -> Self { + fn from(variant: Stopbits) -> Self { variant as _ } } -impl STOPBITS_R { +impl crate::FieldSpec for Stopbits { + type Ux = u8; +} +impl crate::IsEnum for Stopbits {} +#[doc = "Field `STOPBITS` reader - Stop-Bit Mode"] +pub type StopbitsR = crate::FieldReader; +impl StopbitsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> STOPBITS_A { + pub const fn variant(&self) -> Stopbits { match self.bits { - 0 => STOPBITS_A::HALF, - 1 => STOPBITS_A::ONE, - 2 => STOPBITS_A::ONEANDAHALF, - 3 => STOPBITS_A::TWO, + 0 => Stopbits::Half, + 1 => Stopbits::One, + 2 => Stopbits::Oneandahalf, + 3 => Stopbits::Two, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `HALF`"] + #[doc = "The transmitter generates a half stop bit. Stop-bits are not verified by receiver"] #[inline(always)] pub fn is_half(&self) -> bool { - *self == STOPBITS_A::HALF + *self == Stopbits::Half } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "One stop bit is generated and verified"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == STOPBITS_A::ONE + *self == Stopbits::One } - #[doc = "Checks if the value of the field is `ONEANDAHALF`"] + #[doc = "The transmitter generates one and a half stop bit. The receiver verifies the first stop bit"] #[inline(always)] pub fn is_oneandahalf(&self) -> bool { - *self == STOPBITS_A::ONEANDAHALF + *self == Stopbits::Oneandahalf } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "The transmitter generates two stop bits. The receiver checks the first stop-bit only"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == STOPBITS_A::TWO + *self == Stopbits::Two } } #[doc = "Field `STOPBITS` writer - Stop-Bit Mode"] -pub type STOPBITS_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, FRAMECFG_SPEC, u8, STOPBITS_A, 2, O>; -impl<'a, const O: u8> STOPBITS_W<'a, O> { +pub type StopbitsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Stopbits, crate::Safe>; +impl<'a, REG> StopbitsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The transmitter generates a half stop bit. Stop-bits are not verified by receiver"] #[inline(always)] - pub fn half(self) -> &'a mut W { - self.variant(STOPBITS_A::HALF) + pub fn half(self) -> &'a mut crate::W { + self.variant(Stopbits::Half) } #[doc = "One stop bit is generated and verified"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(STOPBITS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Stopbits::One) } #[doc = "The transmitter generates one and a half stop bit. The receiver verifies the first stop bit"] #[inline(always)] - pub fn oneandahalf(self) -> &'a mut W { - self.variant(STOPBITS_A::ONEANDAHALF) + pub fn oneandahalf(self) -> &'a mut crate::W { + self.variant(Stopbits::Oneandahalf) } #[doc = "The transmitter generates two stop bits. The receiver checks the first stop-bit only"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(STOPBITS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Stopbits::Two) } } impl R { #[doc = "Bits 0:3 - Data-Bit Mode"] #[inline(always)] - pub fn databits(&self) -> DATABITS_R { - DATABITS_R::new((self.bits & 0x0f) as u8) + pub fn databits(&self) -> DatabitsR { + DatabitsR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - Parity-Bit Mode"] #[inline(always)] - pub fn parity(&self) -> PARITY_R { - PARITY_R::new(((self.bits >> 8) & 3) as u8) + pub fn parity(&self) -> ParityR { + ParityR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 12:13 - Stop-Bit Mode"] #[inline(always)] - pub fn stopbits(&self) -> STOPBITS_R { - STOPBITS_R::new(((self.bits >> 12) & 3) as u8) + pub fn stopbits(&self) -> StopbitsR { + StopbitsR::new(((self.bits >> 12) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - Data-Bit Mode"] #[inline(always)] #[must_use] - pub fn databits(&mut self) -> DATABITS_W<0> { - DATABITS_W::new(self) + pub fn databits(&mut self) -> DatabitsW { + DatabitsW::new(self, 0) } #[doc = "Bits 8:9 - Parity-Bit Mode"] #[inline(always)] #[must_use] - pub fn parity(&mut self) -> PARITY_W<8> { - PARITY_W::new(self) + pub fn parity(&mut self) -> ParityW { + ParityW::new(self, 8) } #[doc = "Bits 12:13 - Stop-Bit Mode"] #[inline(always)] #[must_use] - pub fn stopbits(&mut self) -> STOPBITS_W<12> { - STOPBITS_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stopbits(&mut self) -> StopbitsW { + StopbitsW::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [framecfg](index.html) module"] -pub struct FRAMECFG_SPEC; -impl crate::RegisterSpec for FRAMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`framecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`framecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct FramecfgSpec; +impl crate::RegisterSpec for FramecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [framecfg::R](R) reader structure"] -impl crate::Readable for FRAMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [framecfg::W](W) writer structure"] -impl crate::Writable for FRAMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`framecfg::R`](R) reader structure"] +impl crate::Readable for FramecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`framecfg::W`](W) writer structure"] +impl crate::Writable for FramecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FRAMECFG to value 0x1002"] -impl crate::Resettable for FRAMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0x1002; +impl crate::Resettable for FramecfgSpec { + const RESET_VALUE: u32 = 0x1002; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/ien.rs index b490cf0..fa2d28a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/ien.rs @@ -1,350 +1,310 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXC` reader - TX Complete Enable"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXC` writer - TX Complete Enable"] -pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFL` reader - TX FIFO Level Enable"] -pub type TXFL_R = crate::BitReader; +pub type TxflR = crate::BitReader; #[doc = "Field `TXFL` writer - TX FIFO Level Enable"] -pub type TXFL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxflW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFL` reader - RX FIFO Level Enable"] -pub type RXFL_R = crate::BitReader; +pub type RxflR = crate::BitReader; #[doc = "Field `RXFL` writer - RX FIFO Level Enable"] -pub type RXFL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxflW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFULL` reader - RX FIFO Full Enable"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXFULL` writer - RX FIFO Full Enable"] -pub type RXFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxfullW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXOF` reader - RX FIFO Overflow Enable"] -pub type RXOF_R = crate::BitReader; +pub type RxofR = crate::BitReader; #[doc = "Field `RXOF` writer - RX FIFO Overflow Enable"] -pub type RXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUF` reader - RX FIFO Underflow Enable"] -pub type RXUF_R = crate::BitReader; +pub type RxufR = crate::BitReader; #[doc = "Field `RXUF` writer - RX FIFO Underflow Enable"] -pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXOF` reader - TX FIFO Overflow Enable"] -pub type TXOF_R = crate::BitReader; +pub type TxofR = crate::BitReader; #[doc = "Field `TXOF` writer - TX FIFO Overflow Enable"] -pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXUF` reader - TX FIFO Underflow Enable"] -pub type TXUF_R = crate::BitReader; +pub type TxufR = crate::BitReader; #[doc = "Field `TXUF` writer - TX FIFO Underflow Enable"] -pub type TXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PERR` reader - Parity Error Enable"] -pub type PERR_R = crate::BitReader; +pub type PerrR = crate::BitReader; #[doc = "Field `PERR` writer - Parity Error Enable"] -pub type PERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FERR` reader - Framing Error Enable"] -pub type FERR_R = crate::BitReader; +pub type FerrR = crate::BitReader; #[doc = "Field `FERR` writer - Framing Error Enable"] -pub type FERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPAF` reader - Multi-Processor Addr Frame Enable"] -pub type MPAF_R = crate::BitReader; +pub type MpafR = crate::BitReader; #[doc = "Field `MPAF` writer - Multi-Processor Addr Frame Enable"] -pub type MPAF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type MpafW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOADERR` reader - Load Error Enable"] -pub type LOADERR_R = crate::BitReader; +pub type LoaderrR = crate::BitReader; #[doc = "Field `LOADERR` writer - Load Error Enable"] -pub type LOADERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type LoaderrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCF` reader - Collision Check Fail Enable"] -pub type CCF_R = crate::BitReader; +pub type CcfR = crate::BitReader; #[doc = "Field `CCF` writer - Collision Check Fail Enable"] -pub type CCF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type CcfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXIDLE` reader - TX IDLE Enable"] -pub type TXIDLE_R = crate::BitReader; +pub type TxidleR = crate::BitReader; #[doc = "Field `TXIDLE` writer - TX IDLE Enable"] -pub type TXIDLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxidleW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CSWU` reader - CS Wake-up Enable"] -pub type CSWU_R = crate::BitReader; +pub type CswuR = crate::BitReader; #[doc = "Field `CSWU` writer - CS Wake-up Enable"] -pub type CSWU_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type CswuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STARTF` reader - Start Frame Enable"] -pub type STARTF_R = crate::BitReader; +pub type StartfR = crate::BitReader; #[doc = "Field `STARTF` writer - Start Frame Enable"] -pub type STARTF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type StartfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SIGF` reader - Signal Frame Enable"] -pub type SIGF_R = crate::BitReader; +pub type SigfR = crate::BitReader; #[doc = "Field `SIGF` writer - Signal Frame Enable"] -pub type SIGF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SigfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOBAUDDONE` reader - Auto Baud Complete Enable"] -pub type AUTOBAUDDONE_R = crate::BitReader; +pub type AutobauddoneR = crate::BitReader; #[doc = "Field `AUTOBAUDDONE` writer - Auto Baud Complete Enable"] -pub type AUTOBAUDDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AutobauddoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXTO` reader - RX Timeout Enable"] -pub type RXTO_R = crate::BitReader; +pub type RxtoR = crate::BitReader; #[doc = "Field `RXTO` writer - RX Timeout Enable"] -pub type RXTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxtoW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - TX Complete Enable"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new((self.bits & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - TX FIFO Level Enable"] #[inline(always)] - pub fn txfl(&self) -> TXFL_R { - TXFL_R::new(((self.bits >> 1) & 1) != 0) + pub fn txfl(&self) -> TxflR { + TxflR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RX FIFO Level Enable"] #[inline(always)] - pub fn rxfl(&self) -> RXFL_R { - RXFL_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxfl(&self) -> RxflR { + RxflR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - RX FIFO Full Enable"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - RX FIFO Overflow Enable"] #[inline(always)] - pub fn rxof(&self) -> RXOF_R { - RXOF_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxof(&self) -> RxofR { + RxofR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - RX FIFO Underflow Enable"] #[inline(always)] - pub fn rxuf(&self) -> RXUF_R { - RXUF_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxuf(&self) -> RxufR { + RxufR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX FIFO Overflow Enable"] #[inline(always)] - pub fn txof(&self) -> TXOF_R { - TXOF_R::new(((self.bits >> 6) & 1) != 0) + pub fn txof(&self) -> TxofR { + TxofR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - TX FIFO Underflow Enable"] #[inline(always)] - pub fn txuf(&self) -> TXUF_R { - TXUF_R::new(((self.bits >> 7) & 1) != 0) + pub fn txuf(&self) -> TxufR { + TxufR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Parity Error Enable"] #[inline(always)] - pub fn perr(&self) -> PERR_R { - PERR_R::new(((self.bits >> 8) & 1) != 0) + pub fn perr(&self) -> PerrR { + PerrR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Framing Error Enable"] #[inline(always)] - pub fn ferr(&self) -> FERR_R { - FERR_R::new(((self.bits >> 9) & 1) != 0) + pub fn ferr(&self) -> FerrR { + FerrR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Multi-Processor Addr Frame Enable"] #[inline(always)] - pub fn mpaf(&self) -> MPAF_R { - MPAF_R::new(((self.bits >> 10) & 1) != 0) + pub fn mpaf(&self) -> MpafR { + MpafR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Load Error Enable"] #[inline(always)] - pub fn loaderr(&self) -> LOADERR_R { - LOADERR_R::new(((self.bits >> 11) & 1) != 0) + pub fn loaderr(&self) -> LoaderrR { + LoaderrR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Collision Check Fail Enable"] #[inline(always)] - pub fn ccf(&self) -> CCF_R { - CCF_R::new(((self.bits >> 12) & 1) != 0) + pub fn ccf(&self) -> CcfR { + CcfR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - TX IDLE Enable"] #[inline(always)] - pub fn txidle(&self) -> TXIDLE_R { - TXIDLE_R::new(((self.bits >> 13) & 1) != 0) + pub fn txidle(&self) -> TxidleR { + TxidleR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 16 - CS Wake-up Enable"] #[inline(always)] - pub fn cswu(&self) -> CSWU_R { - CSWU_R::new(((self.bits >> 16) & 1) != 0) + pub fn cswu(&self) -> CswuR { + CswuR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 18 - Start Frame Enable"] #[inline(always)] - pub fn startf(&self) -> STARTF_R { - STARTF_R::new(((self.bits >> 18) & 1) != 0) + pub fn startf(&self) -> StartfR { + StartfR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Signal Frame Enable"] #[inline(always)] - pub fn sigf(&self) -> SIGF_R { - SIGF_R::new(((self.bits >> 19) & 1) != 0) + pub fn sigf(&self) -> SigfR { + SigfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 24 - Auto Baud Complete Enable"] #[inline(always)] - pub fn autobauddone(&self) -> AUTOBAUDDONE_R { - AUTOBAUDDONE_R::new(((self.bits >> 24) & 1) != 0) + pub fn autobauddone(&self) -> AutobauddoneR { + AutobauddoneR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - RX Timeout Enable"] #[inline(always)] - pub fn rxto(&self) -> RXTO_R { - RXTO_R::new(((self.bits >> 25) & 1) != 0) + pub fn rxto(&self) -> RxtoR { + RxtoR::new(((self.bits >> 25) & 1) != 0) } } impl W { #[doc = "Bit 0 - TX Complete Enable"] #[inline(always)] #[must_use] - pub fn txc(&mut self) -> TXC_W<0> { - TXC_W::new(self) + pub fn txc(&mut self) -> TxcW { + TxcW::new(self, 0) } #[doc = "Bit 1 - TX FIFO Level Enable"] #[inline(always)] #[must_use] - pub fn txfl(&mut self) -> TXFL_W<1> { - TXFL_W::new(self) + pub fn txfl(&mut self) -> TxflW { + TxflW::new(self, 1) } #[doc = "Bit 2 - RX FIFO Level Enable"] #[inline(always)] #[must_use] - pub fn rxfl(&mut self) -> RXFL_W<2> { - RXFL_W::new(self) + pub fn rxfl(&mut self) -> RxflW { + RxflW::new(self, 2) } #[doc = "Bit 3 - RX FIFO Full Enable"] #[inline(always)] #[must_use] - pub fn rxfull(&mut self) -> RXFULL_W<3> { - RXFULL_W::new(self) + pub fn rxfull(&mut self) -> RxfullW { + RxfullW::new(self, 3) } #[doc = "Bit 4 - RX FIFO Overflow Enable"] #[inline(always)] #[must_use] - pub fn rxof(&mut self) -> RXOF_W<4> { - RXOF_W::new(self) + pub fn rxof(&mut self) -> RxofW { + RxofW::new(self, 4) } #[doc = "Bit 5 - RX FIFO Underflow Enable"] #[inline(always)] #[must_use] - pub fn rxuf(&mut self) -> RXUF_W<5> { - RXUF_W::new(self) + pub fn rxuf(&mut self) -> RxufW { + RxufW::new(self, 5) } #[doc = "Bit 6 - TX FIFO Overflow Enable"] #[inline(always)] #[must_use] - pub fn txof(&mut self) -> TXOF_W<6> { - TXOF_W::new(self) + pub fn txof(&mut self) -> TxofW { + TxofW::new(self, 6) } #[doc = "Bit 7 - TX FIFO Underflow Enable"] #[inline(always)] #[must_use] - pub fn txuf(&mut self) -> TXUF_W<7> { - TXUF_W::new(self) + pub fn txuf(&mut self) -> TxufW { + TxufW::new(self, 7) } #[doc = "Bit 8 - Parity Error Enable"] #[inline(always)] #[must_use] - pub fn perr(&mut self) -> PERR_W<8> { - PERR_W::new(self) + pub fn perr(&mut self) -> PerrW { + PerrW::new(self, 8) } #[doc = "Bit 9 - Framing Error Enable"] #[inline(always)] #[must_use] - pub fn ferr(&mut self) -> FERR_W<9> { - FERR_W::new(self) + pub fn ferr(&mut self) -> FerrW { + FerrW::new(self, 9) } #[doc = "Bit 10 - Multi-Processor Addr Frame Enable"] #[inline(always)] #[must_use] - pub fn mpaf(&mut self) -> MPAF_W<10> { - MPAF_W::new(self) + pub fn mpaf(&mut self) -> MpafW { + MpafW::new(self, 10) } #[doc = "Bit 11 - Load Error Enable"] #[inline(always)] #[must_use] - pub fn loaderr(&mut self) -> LOADERR_W<11> { - LOADERR_W::new(self) + pub fn loaderr(&mut self) -> LoaderrW { + LoaderrW::new(self, 11) } #[doc = "Bit 12 - Collision Check Fail Enable"] #[inline(always)] #[must_use] - pub fn ccf(&mut self) -> CCF_W<12> { - CCF_W::new(self) + pub fn ccf(&mut self) -> CcfW { + CcfW::new(self, 12) } #[doc = "Bit 13 - TX IDLE Enable"] #[inline(always)] #[must_use] - pub fn txidle(&mut self) -> TXIDLE_W<13> { - TXIDLE_W::new(self) + pub fn txidle(&mut self) -> TxidleW { + TxidleW::new(self, 13) } #[doc = "Bit 16 - CS Wake-up Enable"] #[inline(always)] #[must_use] - pub fn cswu(&mut self) -> CSWU_W<16> { - CSWU_W::new(self) + pub fn cswu(&mut self) -> CswuW { + CswuW::new(self, 16) } #[doc = "Bit 18 - Start Frame Enable"] #[inline(always)] #[must_use] - pub fn startf(&mut self) -> STARTF_W<18> { - STARTF_W::new(self) + pub fn startf(&mut self) -> StartfW { + StartfW::new(self, 18) } #[doc = "Bit 19 - Signal Frame Enable"] #[inline(always)] #[must_use] - pub fn sigf(&mut self) -> SIGF_W<19> { - SIGF_W::new(self) + pub fn sigf(&mut self) -> SigfW { + SigfW::new(self, 19) } #[doc = "Bit 24 - Auto Baud Complete Enable"] #[inline(always)] #[must_use] - pub fn autobauddone(&mut self) -> AUTOBAUDDONE_W<24> { - AUTOBAUDDONE_W::new(self) + pub fn autobauddone(&mut self) -> AutobauddoneW { + AutobauddoneW::new(self, 24) } #[doc = "Bit 25 - RX Timeout Enable"] #[inline(always)] #[must_use] - pub fn rxto(&mut self) -> RXTO_W<25> { - RXTO_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rxto(&mut self) -> RxtoW { + RxtoW::new(self, 25) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/if_.rs index 72124ce..7baab2e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/if_.rs @@ -1,350 +1,310 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXC` reader - TX Complete Interrupt Flag"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXC` writer - TX Complete Interrupt Flag"] -pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFL` reader - TX FIFO Level Interrupt Flag"] -pub type TXFL_R = crate::BitReader; +pub type TxflR = crate::BitReader; #[doc = "Field `TXFL` writer - TX FIFO Level Interrupt Flag"] -pub type TXFL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxflW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFL` reader - RX FIFO Level Interrupt Flag"] -pub type RXFL_R = crate::BitReader; +pub type RxflR = crate::BitReader; #[doc = "Field `RXFL` writer - RX FIFO Level Interrupt Flag"] -pub type RXFL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxflW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFULL` reader - RX FIFO Full Interrupt Flag"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXFULL` writer - RX FIFO Full Interrupt Flag"] -pub type RXFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxfullW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXOF` reader - RX FIFO Overflow Interrupt Flag"] -pub type RXOF_R = crate::BitReader; +pub type RxofR = crate::BitReader; #[doc = "Field `RXOF` writer - RX FIFO Overflow Interrupt Flag"] -pub type RXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUF` reader - RX FIFO Underflow Interrupt Flag"] -pub type RXUF_R = crate::BitReader; +pub type RxufR = crate::BitReader; #[doc = "Field `RXUF` writer - RX FIFO Underflow Interrupt Flag"] -pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXOF` reader - TX FIFO Overflow Interrupt Flag"] -pub type TXOF_R = crate::BitReader; +pub type TxofR = crate::BitReader; #[doc = "Field `TXOF` writer - TX FIFO Overflow Interrupt Flag"] -pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXUF` reader - TX FIFO Underflow Interrupt Flag"] -pub type TXUF_R = crate::BitReader; +pub type TxufR = crate::BitReader; #[doc = "Field `TXUF` writer - TX FIFO Underflow Interrupt Flag"] -pub type TXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PERR` reader - Parity Error Interrupt Flag"] -pub type PERR_R = crate::BitReader; +pub type PerrR = crate::BitReader; #[doc = "Field `PERR` writer - Parity Error Interrupt Flag"] -pub type PERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FERR` reader - Framing Error Interrupt Flag"] -pub type FERR_R = crate::BitReader; +pub type FerrR = crate::BitReader; #[doc = "Field `FERR` writer - Framing Error Interrupt Flag"] -pub type FERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPAF` reader - Multi-Processor Address Frame Interrupt"] -pub type MPAF_R = crate::BitReader; +pub type MpafR = crate::BitReader; #[doc = "Field `MPAF` writer - Multi-Processor Address Frame Interrupt"] -pub type MPAF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type MpafW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOADERR` reader - Load Error Interrupt Flag"] -pub type LOADERR_R = crate::BitReader; +pub type LoaderrR = crate::BitReader; #[doc = "Field `LOADERR` writer - Load Error Interrupt Flag"] -pub type LOADERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type LoaderrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCF` reader - Collision Check Fail Interrupt Flag"] -pub type CCF_R = crate::BitReader; +pub type CcfR = crate::BitReader; #[doc = "Field `CCF` writer - Collision Check Fail Interrupt Flag"] -pub type CCF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type CcfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXIDLE` reader - TX Idle Interrupt Flag"] -pub type TXIDLE_R = crate::BitReader; +pub type TxidleR = crate::BitReader; #[doc = "Field `TXIDLE` writer - TX Idle Interrupt Flag"] -pub type TXIDLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxidleW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CSWU` reader - CS Wake-up Interrupt Flag"] -pub type CSWU_R = crate::BitReader; +pub type CswuR = crate::BitReader; #[doc = "Field `CSWU` writer - CS Wake-up Interrupt Flag"] -pub type CSWU_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type CswuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STARTF` reader - Start Frame Interrupt Flag"] -pub type STARTF_R = crate::BitReader; +pub type StartfR = crate::BitReader; #[doc = "Field `STARTF` writer - Start Frame Interrupt Flag"] -pub type STARTF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type StartfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SIGF` reader - Signal Frame Interrupt Flag"] -pub type SIGF_R = crate::BitReader; +pub type SigfR = crate::BitReader; #[doc = "Field `SIGF` writer - Signal Frame Interrupt Flag"] -pub type SIGF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SigfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOBAUDDONE` reader - Auto Baud Complete Interrupt Flag"] -pub type AUTOBAUDDONE_R = crate::BitReader; +pub type AutobauddoneR = crate::BitReader; #[doc = "Field `AUTOBAUDDONE` writer - Auto Baud Complete Interrupt Flag"] -pub type AUTOBAUDDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AutobauddoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXTO` reader - RX Timeout Interrupt Flag"] -pub type RXTO_R = crate::BitReader; +pub type RxtoR = crate::BitReader; #[doc = "Field `RXTO` writer - RX Timeout Interrupt Flag"] -pub type RXTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxtoW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - TX Complete Interrupt Flag"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new((self.bits & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - TX FIFO Level Interrupt Flag"] #[inline(always)] - pub fn txfl(&self) -> TXFL_R { - TXFL_R::new(((self.bits >> 1) & 1) != 0) + pub fn txfl(&self) -> TxflR { + TxflR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RX FIFO Level Interrupt Flag"] #[inline(always)] - pub fn rxfl(&self) -> RXFL_R { - RXFL_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxfl(&self) -> RxflR { + RxflR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - RX FIFO Full Interrupt Flag"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - RX FIFO Overflow Interrupt Flag"] #[inline(always)] - pub fn rxof(&self) -> RXOF_R { - RXOF_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxof(&self) -> RxofR { + RxofR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - RX FIFO Underflow Interrupt Flag"] #[inline(always)] - pub fn rxuf(&self) -> RXUF_R { - RXUF_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxuf(&self) -> RxufR { + RxufR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX FIFO Overflow Interrupt Flag"] #[inline(always)] - pub fn txof(&self) -> TXOF_R { - TXOF_R::new(((self.bits >> 6) & 1) != 0) + pub fn txof(&self) -> TxofR { + TxofR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - TX FIFO Underflow Interrupt Flag"] #[inline(always)] - pub fn txuf(&self) -> TXUF_R { - TXUF_R::new(((self.bits >> 7) & 1) != 0) + pub fn txuf(&self) -> TxufR { + TxufR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Parity Error Interrupt Flag"] #[inline(always)] - pub fn perr(&self) -> PERR_R { - PERR_R::new(((self.bits >> 8) & 1) != 0) + pub fn perr(&self) -> PerrR { + PerrR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Framing Error Interrupt Flag"] #[inline(always)] - pub fn ferr(&self) -> FERR_R { - FERR_R::new(((self.bits >> 9) & 1) != 0) + pub fn ferr(&self) -> FerrR { + FerrR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Multi-Processor Address Frame Interrupt"] #[inline(always)] - pub fn mpaf(&self) -> MPAF_R { - MPAF_R::new(((self.bits >> 10) & 1) != 0) + pub fn mpaf(&self) -> MpafR { + MpafR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Load Error Interrupt Flag"] #[inline(always)] - pub fn loaderr(&self) -> LOADERR_R { - LOADERR_R::new(((self.bits >> 11) & 1) != 0) + pub fn loaderr(&self) -> LoaderrR { + LoaderrR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Collision Check Fail Interrupt Flag"] #[inline(always)] - pub fn ccf(&self) -> CCF_R { - CCF_R::new(((self.bits >> 12) & 1) != 0) + pub fn ccf(&self) -> CcfR { + CcfR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - TX Idle Interrupt Flag"] #[inline(always)] - pub fn txidle(&self) -> TXIDLE_R { - TXIDLE_R::new(((self.bits >> 13) & 1) != 0) + pub fn txidle(&self) -> TxidleR { + TxidleR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 16 - CS Wake-up Interrupt Flag"] #[inline(always)] - pub fn cswu(&self) -> CSWU_R { - CSWU_R::new(((self.bits >> 16) & 1) != 0) + pub fn cswu(&self) -> CswuR { + CswuR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 18 - Start Frame Interrupt Flag"] #[inline(always)] - pub fn startf(&self) -> STARTF_R { - STARTF_R::new(((self.bits >> 18) & 1) != 0) + pub fn startf(&self) -> StartfR { + StartfR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Signal Frame Interrupt Flag"] #[inline(always)] - pub fn sigf(&self) -> SIGF_R { - SIGF_R::new(((self.bits >> 19) & 1) != 0) + pub fn sigf(&self) -> SigfR { + SigfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 24 - Auto Baud Complete Interrupt Flag"] #[inline(always)] - pub fn autobauddone(&self) -> AUTOBAUDDONE_R { - AUTOBAUDDONE_R::new(((self.bits >> 24) & 1) != 0) + pub fn autobauddone(&self) -> AutobauddoneR { + AutobauddoneR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - RX Timeout Interrupt Flag"] #[inline(always)] - pub fn rxto(&self) -> RXTO_R { - RXTO_R::new(((self.bits >> 25) & 1) != 0) + pub fn rxto(&self) -> RxtoR { + RxtoR::new(((self.bits >> 25) & 1) != 0) } } impl W { #[doc = "Bit 0 - TX Complete Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txc(&mut self) -> TXC_W<0> { - TXC_W::new(self) + pub fn txc(&mut self) -> TxcW { + TxcW::new(self, 0) } #[doc = "Bit 1 - TX FIFO Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txfl(&mut self) -> TXFL_W<1> { - TXFL_W::new(self) + pub fn txfl(&mut self) -> TxflW { + TxflW::new(self, 1) } #[doc = "Bit 2 - RX FIFO Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxfl(&mut self) -> RXFL_W<2> { - RXFL_W::new(self) + pub fn rxfl(&mut self) -> RxflW { + RxflW::new(self, 2) } #[doc = "Bit 3 - RX FIFO Full Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxfull(&mut self) -> RXFULL_W<3> { - RXFULL_W::new(self) + pub fn rxfull(&mut self) -> RxfullW { + RxfullW::new(self, 3) } #[doc = "Bit 4 - RX FIFO Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxof(&mut self) -> RXOF_W<4> { - RXOF_W::new(self) + pub fn rxof(&mut self) -> RxofW { + RxofW::new(self, 4) } #[doc = "Bit 5 - RX FIFO Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxuf(&mut self) -> RXUF_W<5> { - RXUF_W::new(self) + pub fn rxuf(&mut self) -> RxufW { + RxufW::new(self, 5) } #[doc = "Bit 6 - TX FIFO Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txof(&mut self) -> TXOF_W<6> { - TXOF_W::new(self) + pub fn txof(&mut self) -> TxofW { + TxofW::new(self, 6) } #[doc = "Bit 7 - TX FIFO Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txuf(&mut self) -> TXUF_W<7> { - TXUF_W::new(self) + pub fn txuf(&mut self) -> TxufW { + TxufW::new(self, 7) } #[doc = "Bit 8 - Parity Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn perr(&mut self) -> PERR_W<8> { - PERR_W::new(self) + pub fn perr(&mut self) -> PerrW { + PerrW::new(self, 8) } #[doc = "Bit 9 - Framing Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ferr(&mut self) -> FERR_W<9> { - FERR_W::new(self) + pub fn ferr(&mut self) -> FerrW { + FerrW::new(self, 9) } #[doc = "Bit 10 - Multi-Processor Address Frame Interrupt"] #[inline(always)] #[must_use] - pub fn mpaf(&mut self) -> MPAF_W<10> { - MPAF_W::new(self) + pub fn mpaf(&mut self) -> MpafW { + MpafW::new(self, 10) } #[doc = "Bit 11 - Load Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn loaderr(&mut self) -> LOADERR_W<11> { - LOADERR_W::new(self) + pub fn loaderr(&mut self) -> LoaderrW { + LoaderrW::new(self, 11) } #[doc = "Bit 12 - Collision Check Fail Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ccf(&mut self) -> CCF_W<12> { - CCF_W::new(self) + pub fn ccf(&mut self) -> CcfW { + CcfW::new(self, 12) } #[doc = "Bit 13 - TX Idle Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txidle(&mut self) -> TXIDLE_W<13> { - TXIDLE_W::new(self) + pub fn txidle(&mut self) -> TxidleW { + TxidleW::new(self, 13) } #[doc = "Bit 16 - CS Wake-up Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cswu(&mut self) -> CSWU_W<16> { - CSWU_W::new(self) + pub fn cswu(&mut self) -> CswuW { + CswuW::new(self, 16) } #[doc = "Bit 18 - Start Frame Interrupt Flag"] #[inline(always)] #[must_use] - pub fn startf(&mut self) -> STARTF_W<18> { - STARTF_W::new(self) + pub fn startf(&mut self) -> StartfW { + StartfW::new(self, 18) } #[doc = "Bit 19 - Signal Frame Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sigf(&mut self) -> SIGF_W<19> { - SIGF_W::new(self) + pub fn sigf(&mut self) -> SigfW { + SigfW::new(self, 19) } #[doc = "Bit 24 - Auto Baud Complete Interrupt Flag"] #[inline(always)] #[must_use] - pub fn autobauddone(&mut self) -> AUTOBAUDDONE_W<24> { - AUTOBAUDDONE_W::new(self) + pub fn autobauddone(&mut self) -> AutobauddoneW { + AutobauddoneW::new(self, 24) } #[doc = "Bit 25 - RX Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxto(&mut self) -> RXTO_W<25> { - RXTO_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rxto(&mut self) -> RxtoW { + RxtoW::new(self, 25) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/ipversion.rs index 85cb381..0068345 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/irhfcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/irhfcfg.rs index 5216f33..2e61f42 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/irhfcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/irhfcfg.rs @@ -1,231 +1,201 @@ #[doc = "Register `IRHFCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IRHFCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `IRHFEN` reader - Enable IrDA Module"] -pub type IRHFEN_R = crate::BitReader; +pub type IrhfenR = crate::BitReader; #[doc = "Field `IRHFEN` writer - Enable IrDA Module"] -pub type IRHFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRHFCFG_SPEC, bool, O>; -#[doc = "Field `IRHFPW` reader - IrDA TX Pulse Width"] -pub type IRHFPW_R = crate::FieldReader; +pub type IrhfenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "IrDA TX Pulse Width\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum IRHFPW_A { +pub enum Irhfpw { #[doc = "0: IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1"] - ONE = 0, + One = 0, #[doc = "1: IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1"] - TWO = 1, + Two = 1, #[doc = "2: IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1"] - THREE = 2, + Three = 2, #[doc = "3: IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1"] - FOUR = 3, + Four = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: IRHFPW_A) -> Self { + fn from(variant: Irhfpw) -> Self { variant as _ } } -impl IRHFPW_R { +impl crate::FieldSpec for Irhfpw { + type Ux = u8; +} +impl crate::IsEnum for Irhfpw {} +#[doc = "Field `IRHFPW` reader - IrDA TX Pulse Width"] +pub type IrhfpwR = crate::FieldReader; +impl IrhfpwR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> IRHFPW_A { + pub const fn variant(&self) -> Irhfpw { match self.bits { - 0 => IRHFPW_A::ONE, - 1 => IRHFPW_A::TWO, - 2 => IRHFPW_A::THREE, - 3 => IRHFPW_A::FOUR, + 0 => Irhfpw::One, + 1 => Irhfpw::Two, + 2 => Irhfpw::Three, + 3 => Irhfpw::Four, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == IRHFPW_A::ONE + *self == Irhfpw::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == IRHFPW_A::TWO + *self == Irhfpw::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == IRHFPW_A::THREE + *self == Irhfpw::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == IRHFPW_A::FOUR + *self == Irhfpw::Four } } #[doc = "Field `IRHFPW` writer - IrDA TX Pulse Width"] -pub type IRHFPW_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, IRHFCFG_SPEC, u8, IRHFPW_A, 2, O>; -impl<'a, const O: u8> IRHFPW_W<'a, O> { +pub type IrhfpwW<'a, REG> = crate::FieldWriter<'a, REG, 2, Irhfpw, crate::Safe>; +impl<'a, REG> IrhfpwW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(IRHFPW_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Irhfpw::One) } #[doc = "IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(IRHFPW_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Irhfpw::Two) } #[doc = "IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(IRHFPW_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Irhfpw::Three) } #[doc = "IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(IRHFPW_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Irhfpw::Four) } } -#[doc = "Field `IRHFFILT` reader - IrDA RX Filter"] -pub type IRHFFILT_R = crate::BitReader; #[doc = "IrDA RX Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IRHFFILT_A { +pub enum Irhffilt { #[doc = "0: No filter enabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Filter enabled. IrDA pulse must be high for at least 5 consecutive clock cycles to be detected"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IRHFFILT_A) -> Self { + fn from(variant: Irhffilt) -> Self { variant as u8 != 0 } } -impl IRHFFILT_R { +#[doc = "Field `IRHFFILT` reader - IrDA RX Filter"] +pub type IrhffiltR = crate::BitReader; +impl IrhffiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> IRHFFILT_A { + pub const fn variant(&self) -> Irhffilt { match self.bits { - false => IRHFFILT_A::DISABLE, - true => IRHFFILT_A::ENABLE, + false => Irhffilt::Disable, + true => Irhffilt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "No filter enabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == IRHFFILT_A::DISABLE + *self == Irhffilt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Filter enabled. IrDA pulse must be high for at least 5 consecutive clock cycles to be detected"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == IRHFFILT_A::ENABLE + *self == Irhffilt::Enable } } #[doc = "Field `IRHFFILT` writer - IrDA RX Filter"] -pub type IRHFFILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRHFCFG_SPEC, IRHFFILT_A, O>; -impl<'a, const O: u8> IRHFFILT_W<'a, O> { +pub type IrhffiltW<'a, REG> = crate::BitWriter<'a, REG, Irhffilt>; +impl<'a, REG> IrhffiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No filter enabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(IRHFFILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Irhffilt::Disable) } #[doc = "Filter enabled. IrDA pulse must be high for at least 5 consecutive clock cycles to be detected"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(IRHFFILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Irhffilt::Enable) } } impl R { #[doc = "Bit 0 - Enable IrDA Module"] #[inline(always)] - pub fn irhfen(&self) -> IRHFEN_R { - IRHFEN_R::new((self.bits & 1) != 0) + pub fn irhfen(&self) -> IrhfenR { + IrhfenR::new((self.bits & 1) != 0) } #[doc = "Bits 1:2 - IrDA TX Pulse Width"] #[inline(always)] - pub fn irhfpw(&self) -> IRHFPW_R { - IRHFPW_R::new(((self.bits >> 1) & 3) as u8) + pub fn irhfpw(&self) -> IrhfpwR { + IrhfpwR::new(((self.bits >> 1) & 3) as u8) } #[doc = "Bit 3 - IrDA RX Filter"] #[inline(always)] - pub fn irhffilt(&self) -> IRHFFILT_R { - IRHFFILT_R::new(((self.bits >> 3) & 1) != 0) + pub fn irhffilt(&self) -> IrhffiltR { + IrhffiltR::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable IrDA Module"] #[inline(always)] #[must_use] - pub fn irhfen(&mut self) -> IRHFEN_W<0> { - IRHFEN_W::new(self) + pub fn irhfen(&mut self) -> IrhfenW { + IrhfenW::new(self, 0) } #[doc = "Bits 1:2 - IrDA TX Pulse Width"] #[inline(always)] #[must_use] - pub fn irhfpw(&mut self) -> IRHFPW_W<1> { - IRHFPW_W::new(self) + pub fn irhfpw(&mut self) -> IrhfpwW { + IrhfpwW::new(self, 1) } #[doc = "Bit 3 - IrDA RX Filter"] #[inline(always)] #[must_use] - pub fn irhffilt(&mut self) -> IRHFFILT_W<3> { - IRHFFILT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn irhffilt(&mut self) -> IrhffiltW { + IrhffiltW::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irhfcfg](index.html) module"] -pub struct IRHFCFG_SPEC; -impl crate::RegisterSpec for IRHFCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`irhfcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irhfcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrhfcfgSpec; +impl crate::RegisterSpec for IrhfcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [irhfcfg::R](R) reader structure"] -impl crate::Readable for IRHFCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [irhfcfg::W](W) writer structure"] -impl crate::Writable for IRHFCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`irhfcfg::R`](R) reader structure"] +impl crate::Readable for IrhfcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`irhfcfg::W`](W) writer structure"] +impl crate::Writable for IrhfcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRHFCFG to value 0"] -impl crate::Resettable for IRHFCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IrhfcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/irlfcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/irlfcfg.rs index d43676d..5f2b0ce 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/irlfcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/irlfcfg.rs @@ -1,80 +1,40 @@ #[doc = "Register `IRLFCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IRLFCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `IRLFEN` reader - Pulse Generator/Extender Enable"] -pub type IRLFEN_R = crate::BitReader; +pub type IrlfenR = crate::BitReader; #[doc = "Field `IRLFEN` writer - Pulse Generator/Extender Enable"] -pub type IRLFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRLFCFG_SPEC, bool, O>; +pub type IrlfenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Pulse Generator/Extender Enable"] #[inline(always)] - pub fn irlfen(&self) -> IRLFEN_R { - IRLFEN_R::new((self.bits & 1) != 0) + pub fn irlfen(&self) -> IrlfenR { + IrlfenR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - Pulse Generator/Extender Enable"] #[inline(always)] #[must_use] - pub fn irlfen(&mut self) -> IRLFEN_W<0> { - IRLFEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn irlfen(&mut self) -> IrlfenW { + IrlfenW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irlfcfg](index.html) module"] -pub struct IRLFCFG_SPEC; -impl crate::RegisterSpec for IRLFCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`irlfcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irlfcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrlfcfgSpec; +impl crate::RegisterSpec for IrlfcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [irlfcfg::R](R) reader structure"] -impl crate::Readable for IRLFCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [irlfcfg::W](W) writer structure"] -impl crate::Writable for IRLFCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`irlfcfg::R`](R) reader structure"] +impl crate::Readable for IrlfcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`irlfcfg::W`](W) writer structure"] +impl crate::Writable for IrlfcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRLFCFG to value 0"] -impl crate::Resettable for IRLFCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IrlfcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/rxdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/rxdata.rs index f2cf950..cb4530c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/rxdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/rxdata.rs @@ -1,37 +1,22 @@ #[doc = "Register `RXDATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATA` reader - RX Data and Control bits"] -pub type RXDATA_R = crate::FieldReader; +pub type RxdataR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - RX Data and Control bits"] #[inline(always)] - pub fn rxdata(&self) -> RXDATA_R { - RXDATA_R::new((self.bits & 0xffff) as u16) + pub fn rxdata(&self) -> RxdataR { + RxdataR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdata](index.html) module"] -pub struct RXDATA_SPEC; -impl crate::RegisterSpec for RXDATA_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdata::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdataSpec; +impl crate::RegisterSpec for RxdataSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdata::R](R) reader structure"] -impl crate::Readable for RXDATA_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdata::R`](R) reader structure"] +impl crate::Readable for RxdataSpec {} #[doc = "`reset()` method sets RXDATA to value 0"] -impl crate::Resettable for RXDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/rxdatap.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/rxdatap.rs index f78bc3c..b490a48 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/rxdatap.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/rxdatap.rs @@ -1,37 +1,22 @@ #[doc = "Register `RXDATAP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATAP` reader - RX Data Peek"] -pub type RXDATAP_R = crate::FieldReader; +pub type RxdatapR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - RX Data Peek"] #[inline(always)] - pub fn rxdatap(&self) -> RXDATAP_R { - RXDATAP_R::new((self.bits & 0xffff) as u16) + pub fn rxdatap(&self) -> RxdatapR { + RxdatapR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdatap](index.html) module"] -pub struct RXDATAP_SPEC; -impl crate::RegisterSpec for RXDATAP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdatap::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdatapSpec; +impl crate::RegisterSpec for RxdatapSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdatap::R](R) reader structure"] -impl crate::Readable for RXDATAP_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdatap::R`](R) reader structure"] +impl crate::Readable for RxdatapSpec {} #[doc = "`reset()` method sets RXDATAP to value 0"] -impl crate::Resettable for RXDATAP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdatapSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/sigframecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/sigframecfg.rs index 453819f..96b88c1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/sigframecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/sigframecfg.rs @@ -1,81 +1,40 @@ #[doc = "Register `SIGFRAMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SIGFRAMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SIGFRAME` reader - Signal Frame Value"] -pub type SIGFRAME_R = crate::FieldReader; +pub type SigframeR = crate::FieldReader; #[doc = "Field `SIGFRAME` writer - Signal Frame Value"] -pub type SIGFRAME_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SIGFRAMECFG_SPEC, u16, u16, 9, O>; +pub type SigframeW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; impl R { #[doc = "Bits 0:8 - Signal Frame Value"] #[inline(always)] - pub fn sigframe(&self) -> SIGFRAME_R { - SIGFRAME_R::new((self.bits & 0x01ff) as u16) + pub fn sigframe(&self) -> SigframeR { + SigframeR::new((self.bits & 0x01ff) as u16) } } impl W { #[doc = "Bits 0:8 - Signal Frame Value"] #[inline(always)] #[must_use] - pub fn sigframe(&mut self) -> SIGFRAME_W<0> { - SIGFRAME_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sigframe(&mut self) -> SigframeW { + SigframeW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sigframecfg](index.html) module"] -pub struct SIGFRAMECFG_SPEC; -impl crate::RegisterSpec for SIGFRAMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sigframecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sigframecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SigframecfgSpec; +impl crate::RegisterSpec for SigframecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [sigframecfg::R](R) reader structure"] -impl crate::Readable for SIGFRAMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sigframecfg::W](W) writer structure"] -impl crate::Writable for SIGFRAMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`sigframecfg::R`](R) reader structure"] +impl crate::Readable for SigframecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`sigframecfg::W`](W) writer structure"] +impl crate::Writable for SigframecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SIGFRAMECFG to value 0"] -impl crate::Resettable for SIGFRAMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SigframecfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/startframecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/startframecfg.rs index 44571b1..67dd6bf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/startframecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/startframecfg.rs @@ -1,81 +1,40 @@ #[doc = "Register `STARTFRAMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `STARTFRAMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `STARTFRAME` reader - Start Frame"] -pub type STARTFRAME_R = crate::FieldReader; +pub type StartframeR = crate::FieldReader; #[doc = "Field `STARTFRAME` writer - Start Frame"] -pub type STARTFRAME_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, STARTFRAMECFG_SPEC, u16, u16, 9, O>; +pub type StartframeW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; impl R { #[doc = "Bits 0:8 - Start Frame"] #[inline(always)] - pub fn startframe(&self) -> STARTFRAME_R { - STARTFRAME_R::new((self.bits & 0x01ff) as u16) + pub fn startframe(&self) -> StartframeR { + StartframeR::new((self.bits & 0x01ff) as u16) } } impl W { #[doc = "Bits 0:8 - Start Frame"] #[inline(always)] #[must_use] - pub fn startframe(&mut self) -> STARTFRAME_W<0> { - STARTFRAME_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn startframe(&mut self) -> StartframeW { + StartframeW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [startframecfg](index.html) module"] -pub struct STARTFRAMECFG_SPEC; -impl crate::RegisterSpec for STARTFRAMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`startframecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`startframecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StartframecfgSpec; +impl crate::RegisterSpec for StartframecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [startframecfg::R](R) reader structure"] -impl crate::Readable for STARTFRAMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [startframecfg::W](W) writer structure"] -impl crate::Writable for STARTFRAMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`startframecfg::R`](R) reader structure"] +impl crate::Readable for StartframecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`startframecfg::W`](W) writer structure"] +impl crate::Writable for StartframecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets STARTFRAMECFG to value 0"] -impl crate::Resettable for STARTFRAMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StartframecfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/status.rs index 3ad48a5..b418af7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/status.rs @@ -1,121 +1,106 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXENS` reader - Receiver Enable Status"] -pub type RXENS_R = crate::BitReader; +pub type RxensR = crate::BitReader; #[doc = "Field `TXENS` reader - Transmitter Enable Status"] -pub type TXENS_R = crate::BitReader; +pub type TxensR = crate::BitReader; #[doc = "Field `RXBLOCK` reader - Block Incoming Data"] -pub type RXBLOCK_R = crate::BitReader; +pub type RxblockR = crate::BitReader; #[doc = "Field `TXTRI` reader - Transmitter Tristated"] -pub type TXTRI_R = crate::BitReader; +pub type TxtriR = crate::BitReader; #[doc = "Field `TXC` reader - TX Complete"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXFL` reader - TX FIFO Level"] -pub type TXFL_R = crate::BitReader; +pub type TxflR = crate::BitReader; #[doc = "Field `RXFL` reader - RX FIFO Level"] -pub type RXFL_R = crate::BitReader; +pub type RxflR = crate::BitReader; #[doc = "Field `RXFULL` reader - RX FIFO Full"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXIDLE` reader - RX Idle"] -pub type RXIDLE_R = crate::BitReader; +pub type RxidleR = crate::BitReader; #[doc = "Field `TXIDLE` reader - TX Idle"] -pub type TXIDLE_R = crate::BitReader; +pub type TxidleR = crate::BitReader; #[doc = "Field `TXFCNT` reader - Valid entries in TX FIFO"] -pub type TXFCNT_R = crate::FieldReader; +pub type TxfcntR = crate::FieldReader; #[doc = "Field `AUTOBAUDDONE` reader - Auto Baud Rate Detection Completed"] -pub type AUTOBAUDDONE_R = crate::BitReader; +pub type AutobauddoneR = crate::BitReader; #[doc = "Field `CLEARTXBUSY` reader - TX FIFO Clear Busy"] -pub type CLEARTXBUSY_R = crate::BitReader; +pub type CleartxbusyR = crate::BitReader; impl R { #[doc = "Bit 0 - Receiver Enable Status"] #[inline(always)] - pub fn rxens(&self) -> RXENS_R { - RXENS_R::new((self.bits & 1) != 0) + pub fn rxens(&self) -> RxensR { + RxensR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transmitter Enable Status"] #[inline(always)] - pub fn txens(&self) -> TXENS_R { - TXENS_R::new(((self.bits >> 1) & 1) != 0) + pub fn txens(&self) -> TxensR { + TxensR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - Block Incoming Data"] #[inline(always)] - pub fn rxblock(&self) -> RXBLOCK_R { - RXBLOCK_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxblock(&self) -> RxblockR { + RxblockR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Transmitter Tristated"] #[inline(always)] - pub fn txtri(&self) -> TXTRI_R { - TXTRI_R::new(((self.bits >> 4) & 1) != 0) + pub fn txtri(&self) -> TxtriR { + TxtriR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - TX Complete"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new(((self.bits >> 5) & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX FIFO Level"] #[inline(always)] - pub fn txfl(&self) -> TXFL_R { - TXFL_R::new(((self.bits >> 6) & 1) != 0) + pub fn txfl(&self) -> TxflR { + TxflR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - RX FIFO Level"] #[inline(always)] - pub fn rxfl(&self) -> RXFL_R { - RXFL_R::new(((self.bits >> 7) & 1) != 0) + pub fn rxfl(&self) -> RxflR { + RxflR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - RX FIFO Full"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 8) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 12 - RX Idle"] #[inline(always)] - pub fn rxidle(&self) -> RXIDLE_R { - RXIDLE_R::new(((self.bits >> 12) & 1) != 0) + pub fn rxidle(&self) -> RxidleR { + RxidleR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - TX Idle"] #[inline(always)] - pub fn txidle(&self) -> TXIDLE_R { - TXIDLE_R::new(((self.bits >> 13) & 1) != 0) + pub fn txidle(&self) -> TxidleR { + TxidleR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bits 16:20 - Valid entries in TX FIFO"] #[inline(always)] - pub fn txfcnt(&self) -> TXFCNT_R { - TXFCNT_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn txfcnt(&self) -> TxfcntR { + TxfcntR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bit 24 - Auto Baud Rate Detection Completed"] #[inline(always)] - pub fn autobauddone(&self) -> AUTOBAUDDONE_R { - AUTOBAUDDONE_R::new(((self.bits >> 24) & 1) != 0) + pub fn autobauddone(&self) -> AutobauddoneR { + AutobauddoneR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - TX FIFO Clear Busy"] #[inline(always)] - pub fn cleartxbusy(&self) -> CLEARTXBUSY_R { - CLEARTXBUSY_R::new(((self.bits >> 25) & 1) != 0) + pub fn cleartxbusy(&self) -> CleartxbusyR { + CleartxbusyR::new(((self.bits >> 25) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0x3040"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0x3040; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0x3040; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/syncbusy.rs index 3190b02..713965c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/syncbusy.rs @@ -1,114 +1,99 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DIV` reader - SYNCBUSY for DIV in CLKDIV"] -pub type DIV_R = crate::BitReader; +pub type DivR = crate::BitReader; #[doc = "Field `RXTEN` reader - SYNCBUSY for RXTEN in TRIGCTRL"] -pub type RXTEN_R = crate::BitReader; +pub type RxtenR = crate::BitReader; #[doc = "Field `TXTEN` reader - SYNCBUSY for TXTEN in TRIGCTRL"] -pub type TXTEN_R = crate::BitReader; +pub type TxtenR = crate::BitReader; #[doc = "Field `RXEN` reader - SYNCBUSY for RXEN in CMD"] -pub type RXEN_R = crate::BitReader; +pub type RxenR = crate::BitReader; #[doc = "Field `RXDIS` reader - SYNCBUSY for RXDIS in CMD"] -pub type RXDIS_R = crate::BitReader; +pub type RxdisR = crate::BitReader; #[doc = "Field `TXEN` reader - SYNCBUSY for TXEN in CMD"] -pub type TXEN_R = crate::BitReader; +pub type TxenR = crate::BitReader; #[doc = "Field `TXDIS` reader - SYNCBUSY for TXDIS in CMD"] -pub type TXDIS_R = crate::BitReader; +pub type TxdisR = crate::BitReader; #[doc = "Field `RXBLOCKEN` reader - SYNCBUSY for RXBLOCKEN in CMD"] -pub type RXBLOCKEN_R = crate::BitReader; +pub type RxblockenR = crate::BitReader; #[doc = "Field `RXBLOCKDIS` reader - SYNCBUSY for RXBLOCKDIS in CMD"] -pub type RXBLOCKDIS_R = crate::BitReader; +pub type RxblockdisR = crate::BitReader; #[doc = "Field `TXTRIEN` reader - SYNCBUSY for TXTRIEN in CMD"] -pub type TXTRIEN_R = crate::BitReader; +pub type TxtrienR = crate::BitReader; #[doc = "Field `TXTRIDIS` reader - SYNCBUSY in TXTRIDIS in CMD"] -pub type TXTRIDIS_R = crate::BitReader; +pub type TxtridisR = crate::BitReader; #[doc = "Field `AUTOTXTEN` reader - SYNCBUSY for AUTOTXTEN in TRIGCTRL"] -pub type AUTOTXTEN_R = crate::BitReader; +pub type AutotxtenR = crate::BitReader; impl R { #[doc = "Bit 0 - SYNCBUSY for DIV in CLKDIV"] #[inline(always)] - pub fn div(&self) -> DIV_R { - DIV_R::new((self.bits & 1) != 0) + pub fn div(&self) -> DivR { + DivR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - SYNCBUSY for RXTEN in TRIGCTRL"] #[inline(always)] - pub fn rxten(&self) -> RXTEN_R { - RXTEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn rxten(&self) -> RxtenR { + RxtenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - SYNCBUSY for TXTEN in TRIGCTRL"] #[inline(always)] - pub fn txten(&self) -> TXTEN_R { - TXTEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn txten(&self) -> TxtenR { + TxtenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - SYNCBUSY for RXEN in CMD"] #[inline(always)] - pub fn rxen(&self) -> RXEN_R { - RXEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxen(&self) -> RxenR { + RxenR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - SYNCBUSY for RXDIS in CMD"] #[inline(always)] - pub fn rxdis(&self) -> RXDIS_R { - RXDIS_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxdis(&self) -> RxdisR { + RxdisR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - SYNCBUSY for TXEN in CMD"] #[inline(always)] - pub fn txen(&self) -> TXEN_R { - TXEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn txen(&self) -> TxenR { + TxenR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - SYNCBUSY for TXDIS in CMD"] #[inline(always)] - pub fn txdis(&self) -> TXDIS_R { - TXDIS_R::new(((self.bits >> 6) & 1) != 0) + pub fn txdis(&self) -> TxdisR { + TxdisR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - SYNCBUSY for RXBLOCKEN in CMD"] #[inline(always)] - pub fn rxblocken(&self) -> RXBLOCKEN_R { - RXBLOCKEN_R::new(((self.bits >> 7) & 1) != 0) + pub fn rxblocken(&self) -> RxblockenR { + RxblockenR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - SYNCBUSY for RXBLOCKDIS in CMD"] #[inline(always)] - pub fn rxblockdis(&self) -> RXBLOCKDIS_R { - RXBLOCKDIS_R::new(((self.bits >> 8) & 1) != 0) + pub fn rxblockdis(&self) -> RxblockdisR { + RxblockdisR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - SYNCBUSY for TXTRIEN in CMD"] #[inline(always)] - pub fn txtrien(&self) -> TXTRIEN_R { - TXTRIEN_R::new(((self.bits >> 9) & 1) != 0) + pub fn txtrien(&self) -> TxtrienR { + TxtrienR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - SYNCBUSY in TXTRIDIS in CMD"] #[inline(always)] - pub fn txtridis(&self) -> TXTRIDIS_R { - TXTRIDIS_R::new(((self.bits >> 10) & 1) != 0) + pub fn txtridis(&self) -> TxtridisR { + TxtridisR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - SYNCBUSY for AUTOTXTEN in TRIGCTRL"] #[inline(always)] - pub fn autotxten(&self) -> AUTOTXTEN_R { - AUTOTXTEN_R::new(((self.bits >> 11) & 1) != 0) + pub fn autotxten(&self) -> AutotxtenR { + AutotxtenR::new(((self.bits >> 11) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/timingcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/timingcfg.rs index ba30f19..8c1ed53 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/timingcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/timingcfg.rs @@ -1,595 +1,584 @@ #[doc = "Register `TIMINGCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMINGCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `TXDELAY` reader - TX Delay Transmission"] -pub type TXDELAY_R = crate::FieldReader; +pub type W = crate::W; #[doc = "TX Delay Transmission\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TXDELAY_A { +pub enum Txdelay { #[doc = "0: Frames are transmitted immediately."] - NONE = 0, + None = 0, #[doc = "1: Transmission of new frames is delayed by a single bit period."] - SINGLE = 1, + Single = 1, #[doc = "2: Transmission of new frames is delayed by a two bit periods."] - DOUBLE = 2, + Double = 2, #[doc = "3: Transmission of new frames is delayed by a three bit periods."] - TRIPPLE = 3, + Tripple = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TXDELAY_A) -> Self { + fn from(variant: Txdelay) -> Self { variant as _ } } -impl TXDELAY_R { +impl crate::FieldSpec for Txdelay { + type Ux = u8; +} +impl crate::IsEnum for Txdelay {} +#[doc = "Field `TXDELAY` reader - TX Delay Transmission"] +pub type TxdelayR = crate::FieldReader; +impl TxdelayR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXDELAY_A { + pub const fn variant(&self) -> Txdelay { match self.bits { - 0 => TXDELAY_A::NONE, - 1 => TXDELAY_A::SINGLE, - 2 => TXDELAY_A::DOUBLE, - 3 => TXDELAY_A::TRIPPLE, + 0 => Txdelay::None, + 1 => Txdelay::Single, + 2 => Txdelay::Double, + 3 => Txdelay::Tripple, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Frames are transmitted immediately."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == TXDELAY_A::NONE + *self == Txdelay::None } - #[doc = "Checks if the value of the field is `SINGLE`"] + #[doc = "Transmission of new frames is delayed by a single bit period."] #[inline(always)] pub fn is_single(&self) -> bool { - *self == TXDELAY_A::SINGLE + *self == Txdelay::Single } - #[doc = "Checks if the value of the field is `DOUBLE`"] + #[doc = "Transmission of new frames is delayed by a two bit periods."] #[inline(always)] pub fn is_double(&self) -> bool { - *self == TXDELAY_A::DOUBLE + *self == Txdelay::Double } - #[doc = "Checks if the value of the field is `TRIPPLE`"] + #[doc = "Transmission of new frames is delayed by a three bit periods."] #[inline(always)] pub fn is_tripple(&self) -> bool { - *self == TXDELAY_A::TRIPPLE + *self == Txdelay::Tripple } } #[doc = "Field `TXDELAY` writer - TX Delay Transmission"] -pub type TXDELAY_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, TIMINGCFG_SPEC, u8, TXDELAY_A, 2, O>; -impl<'a, const O: u8> TXDELAY_W<'a, O> { +pub type TxdelayW<'a, REG> = crate::FieldWriter<'a, REG, 2, Txdelay, crate::Safe>; +impl<'a, REG> TxdelayW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Frames are transmitted immediately."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(TXDELAY_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Txdelay::None) } #[doc = "Transmission of new frames is delayed by a single bit period."] #[inline(always)] - pub fn single(self) -> &'a mut W { - self.variant(TXDELAY_A::SINGLE) + pub fn single(self) -> &'a mut crate::W { + self.variant(Txdelay::Single) } #[doc = "Transmission of new frames is delayed by a two bit periods."] #[inline(always)] - pub fn double(self) -> &'a mut W { - self.variant(TXDELAY_A::DOUBLE) + pub fn double(self) -> &'a mut crate::W { + self.variant(Txdelay::Double) } #[doc = "Transmission of new frames is delayed by a three bit periods."] #[inline(always)] - pub fn tripple(self) -> &'a mut W { - self.variant(TXDELAY_A::TRIPPLE) + pub fn tripple(self) -> &'a mut crate::W { + self.variant(Txdelay::Tripple) } } -#[doc = "Field `CSSETUP` reader - Chip Select Setup"] -pub type CSSETUP_R = crate::FieldReader; #[doc = "Chip Select Setup\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CSSETUP_A { +pub enum Cssetup { #[doc = "0: CS is asserted half or 1 baud-time before the start of transmission depending on CLKPHASE equal to 1 or 0 respectively"] - ZERO = 0, + Zero = 0, #[doc = "1: CS is asserted 1 additional baud-time before start of transmission"] - ONE = 1, + One = 1, #[doc = "2: CS is asserted 2 additional baud-times before start of transmission"] - TWO = 2, + Two = 2, #[doc = "3: CS is asserted 3 additional baud-times before start of transmission"] - THREE = 3, + Three = 3, #[doc = "4: CS is asserted 4 additional baud-times before start of transmission"] - FOUR = 4, + Four = 4, #[doc = "5: CS is asserted 5 additional baud-times before start of transmission"] - FIVE = 5, + Five = 5, #[doc = "6: CS is asserted 6 additional baud-times before start of transmission"] - SIX = 6, + Six = 6, #[doc = "7: CS is asserted 7 additional baud-times before start of transmission"] - SEVEN = 7, + Seven = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CSSETUP_A) -> Self { + fn from(variant: Cssetup) -> Self { variant as _ } } -impl CSSETUP_R { +impl crate::FieldSpec for Cssetup { + type Ux = u8; +} +impl crate::IsEnum for Cssetup {} +#[doc = "Field `CSSETUP` reader - Chip Select Setup"] +pub type CssetupR = crate::FieldReader; +impl CssetupR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CSSETUP_A { + pub const fn variant(&self) -> Cssetup { match self.bits { - 0 => CSSETUP_A::ZERO, - 1 => CSSETUP_A::ONE, - 2 => CSSETUP_A::TWO, - 3 => CSSETUP_A::THREE, - 4 => CSSETUP_A::FOUR, - 5 => CSSETUP_A::FIVE, - 6 => CSSETUP_A::SIX, - 7 => CSSETUP_A::SEVEN, + 0 => Cssetup::Zero, + 1 => Cssetup::One, + 2 => Cssetup::Two, + 3 => Cssetup::Three, + 4 => Cssetup::Four, + 5 => Cssetup::Five, + 6 => Cssetup::Six, + 7 => Cssetup::Seven, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ZERO`"] + #[doc = "CS is asserted half or 1 baud-time before the start of transmission depending on CLKPHASE equal to 1 or 0 respectively"] #[inline(always)] pub fn is_zero(&self) -> bool { - *self == CSSETUP_A::ZERO + *self == Cssetup::Zero } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "CS is asserted 1 additional baud-time before start of transmission"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == CSSETUP_A::ONE + *self == Cssetup::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "CS is asserted 2 additional baud-times before start of transmission"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == CSSETUP_A::TWO + *self == Cssetup::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "CS is asserted 3 additional baud-times before start of transmission"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == CSSETUP_A::THREE + *self == Cssetup::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "CS is asserted 4 additional baud-times before start of transmission"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == CSSETUP_A::FOUR + *self == Cssetup::Four } - #[doc = "Checks if the value of the field is `FIVE`"] + #[doc = "CS is asserted 5 additional baud-times before start of transmission"] #[inline(always)] pub fn is_five(&self) -> bool { - *self == CSSETUP_A::FIVE + *self == Cssetup::Five } - #[doc = "Checks if the value of the field is `SIX`"] + #[doc = "CS is asserted 6 additional baud-times before start of transmission"] #[inline(always)] pub fn is_six(&self) -> bool { - *self == CSSETUP_A::SIX + *self == Cssetup::Six } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "CS is asserted 7 additional baud-times before start of transmission"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == CSSETUP_A::SEVEN + *self == Cssetup::Seven } } #[doc = "Field `CSSETUP` writer - Chip Select Setup"] -pub type CSSETUP_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, TIMINGCFG_SPEC, u8, CSSETUP_A, 3, O>; -impl<'a, const O: u8> CSSETUP_W<'a, O> { +pub type CssetupW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cssetup, crate::Safe>; +impl<'a, REG> CssetupW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "CS is asserted half or 1 baud-time before the start of transmission depending on CLKPHASE equal to 1 or 0 respectively"] #[inline(always)] - pub fn zero(self) -> &'a mut W { - self.variant(CSSETUP_A::ZERO) + pub fn zero(self) -> &'a mut crate::W { + self.variant(Cssetup::Zero) } #[doc = "CS is asserted 1 additional baud-time before start of transmission"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(CSSETUP_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Cssetup::One) } #[doc = "CS is asserted 2 additional baud-times before start of transmission"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(CSSETUP_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Cssetup::Two) } #[doc = "CS is asserted 3 additional baud-times before start of transmission"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(CSSETUP_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Cssetup::Three) } #[doc = "CS is asserted 4 additional baud-times before start of transmission"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(CSSETUP_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Cssetup::Four) } #[doc = "CS is asserted 5 additional baud-times before start of transmission"] #[inline(always)] - pub fn five(self) -> &'a mut W { - self.variant(CSSETUP_A::FIVE) + pub fn five(self) -> &'a mut crate::W { + self.variant(Cssetup::Five) } #[doc = "CS is asserted 6 additional baud-times before start of transmission"] #[inline(always)] - pub fn six(self) -> &'a mut W { - self.variant(CSSETUP_A::SIX) + pub fn six(self) -> &'a mut crate::W { + self.variant(Cssetup::Six) } #[doc = "CS is asserted 7 additional baud-times before start of transmission"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(CSSETUP_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Cssetup::Seven) } } -#[doc = "Field `CSHOLD` reader - Chip Select Hold"] -pub type CSHOLD_R = crate::FieldReader; #[doc = "Chip Select Hold\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CSHOLD_A { +pub enum Cshold { #[doc = "0: CS is de-asserted half or 1 baud-time after the end of transmission depending on CLKPHASE equal to 1 or 0 respectively"] - ZERO = 0, + Zero = 0, #[doc = "1: CS is de-asserted 1 additional baud-time after the end of transmission"] - ONE = 1, + One = 1, #[doc = "2: CS is de-asserted 2 additional baud-times after the end of transmission"] - TWO = 2, + Two = 2, #[doc = "3: CS is de-asserted 3 additional baud-times after the end of transmission"] - THREE = 3, + Three = 3, #[doc = "4: CS is de-asserted 4 additional baud-times after the end of transmission"] - FOUR = 4, + Four = 4, #[doc = "5: CS is de-asserted 5 additional baud-times after the end of transmission"] - FIVE = 5, + Five = 5, #[doc = "6: CS is de-asserted 6 additional baud-times after the end of transmission"] - SIX = 6, + Six = 6, #[doc = "7: CS is de-asserted 7 additional baud-times after the end of transmission"] - SEVEN = 7, + Seven = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CSHOLD_A) -> Self { + fn from(variant: Cshold) -> Self { variant as _ } } -impl CSHOLD_R { +impl crate::FieldSpec for Cshold { + type Ux = u8; +} +impl crate::IsEnum for Cshold {} +#[doc = "Field `CSHOLD` reader - Chip Select Hold"] +pub type CsholdR = crate::FieldReader; +impl CsholdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CSHOLD_A { + pub const fn variant(&self) -> Cshold { match self.bits { - 0 => CSHOLD_A::ZERO, - 1 => CSHOLD_A::ONE, - 2 => CSHOLD_A::TWO, - 3 => CSHOLD_A::THREE, - 4 => CSHOLD_A::FOUR, - 5 => CSHOLD_A::FIVE, - 6 => CSHOLD_A::SIX, - 7 => CSHOLD_A::SEVEN, + 0 => Cshold::Zero, + 1 => Cshold::One, + 2 => Cshold::Two, + 3 => Cshold::Three, + 4 => Cshold::Four, + 5 => Cshold::Five, + 6 => Cshold::Six, + 7 => Cshold::Seven, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ZERO`"] + #[doc = "CS is de-asserted half or 1 baud-time after the end of transmission depending on CLKPHASE equal to 1 or 0 respectively"] #[inline(always)] pub fn is_zero(&self) -> bool { - *self == CSHOLD_A::ZERO + *self == Cshold::Zero } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "CS is de-asserted 1 additional baud-time after the end of transmission"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == CSHOLD_A::ONE + *self == Cshold::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "CS is de-asserted 2 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == CSHOLD_A::TWO + *self == Cshold::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "CS is de-asserted 3 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == CSHOLD_A::THREE + *self == Cshold::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "CS is de-asserted 4 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == CSHOLD_A::FOUR + *self == Cshold::Four } - #[doc = "Checks if the value of the field is `FIVE`"] + #[doc = "CS is de-asserted 5 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_five(&self) -> bool { - *self == CSHOLD_A::FIVE + *self == Cshold::Five } - #[doc = "Checks if the value of the field is `SIX`"] + #[doc = "CS is de-asserted 6 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_six(&self) -> bool { - *self == CSHOLD_A::SIX + *self == Cshold::Six } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "CS is de-asserted 7 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == CSHOLD_A::SEVEN + *self == Cshold::Seven } } #[doc = "Field `CSHOLD` writer - Chip Select Hold"] -pub type CSHOLD_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, TIMINGCFG_SPEC, u8, CSHOLD_A, 3, O>; -impl<'a, const O: u8> CSHOLD_W<'a, O> { +pub type CsholdW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cshold, crate::Safe>; +impl<'a, REG> CsholdW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "CS is de-asserted half or 1 baud-time after the end of transmission depending on CLKPHASE equal to 1 or 0 respectively"] #[inline(always)] - pub fn zero(self) -> &'a mut W { - self.variant(CSHOLD_A::ZERO) + pub fn zero(self) -> &'a mut crate::W { + self.variant(Cshold::Zero) } #[doc = "CS is de-asserted 1 additional baud-time after the end of transmission"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(CSHOLD_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Cshold::One) } #[doc = "CS is de-asserted 2 additional baud-times after the end of transmission"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(CSHOLD_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Cshold::Two) } #[doc = "CS is de-asserted 3 additional baud-times after the end of transmission"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(CSHOLD_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Cshold::Three) } #[doc = "CS is de-asserted 4 additional baud-times after the end of transmission"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(CSHOLD_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Cshold::Four) } #[doc = "CS is de-asserted 5 additional baud-times after the end of transmission"] #[inline(always)] - pub fn five(self) -> &'a mut W { - self.variant(CSHOLD_A::FIVE) + pub fn five(self) -> &'a mut crate::W { + self.variant(Cshold::Five) } #[doc = "CS is de-asserted 6 additional baud-times after the end of transmission"] #[inline(always)] - pub fn six(self) -> &'a mut W { - self.variant(CSHOLD_A::SIX) + pub fn six(self) -> &'a mut crate::W { + self.variant(Cshold::Six) } #[doc = "CS is de-asserted 7 additional baud-times after the end of transmission"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(CSHOLD_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Cshold::Seven) } } -#[doc = "Field `ICS` reader - Inter-Character Spacing"] -pub type ICS_R = crate::FieldReader; #[doc = "Inter-Character Spacing\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICS_A { +pub enum Ics { #[doc = "0: There is no space between charcters"] - ZERO = 0, + Zero = 0, #[doc = "1: Create a space of 1 baud-times between frames"] - ONE = 1, + One = 1, #[doc = "2: Create a space of 2 baud-times between frames"] - TWO = 2, + Two = 2, #[doc = "3: Create a space of 3 baud-times between frames"] - THREE = 3, + Three = 3, #[doc = "4: Create a space of 4 baud-times between frames"] - FOUR = 4, + Four = 4, #[doc = "5: Create a space of 5 baud-times between frames"] - FIVE = 5, + Five = 5, #[doc = "6: Create a space of 6 baud-times between frames"] - SIX = 6, + Six = 6, #[doc = "7: Create a space of 7 baud-times between frames"] - SEVEN = 7, + Seven = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICS_A) -> Self { + fn from(variant: Ics) -> Self { variant as _ } } -impl ICS_R { +impl crate::FieldSpec for Ics { + type Ux = u8; +} +impl crate::IsEnum for Ics {} +#[doc = "Field `ICS` reader - Inter-Character Spacing"] +pub type IcsR = crate::FieldReader; +impl IcsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICS_A { + pub const fn variant(&self) -> Ics { match self.bits { - 0 => ICS_A::ZERO, - 1 => ICS_A::ONE, - 2 => ICS_A::TWO, - 3 => ICS_A::THREE, - 4 => ICS_A::FOUR, - 5 => ICS_A::FIVE, - 6 => ICS_A::SIX, - 7 => ICS_A::SEVEN, + 0 => Ics::Zero, + 1 => Ics::One, + 2 => Ics::Two, + 3 => Ics::Three, + 4 => Ics::Four, + 5 => Ics::Five, + 6 => Ics::Six, + 7 => Ics::Seven, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ZERO`"] + #[doc = "There is no space between charcters"] #[inline(always)] pub fn is_zero(&self) -> bool { - *self == ICS_A::ZERO + *self == Ics::Zero } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Create a space of 1 baud-times between frames"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == ICS_A::ONE + *self == Ics::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Create a space of 2 baud-times between frames"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == ICS_A::TWO + *self == Ics::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "Create a space of 3 baud-times between frames"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == ICS_A::THREE + *self == Ics::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Create a space of 4 baud-times between frames"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == ICS_A::FOUR + *self == Ics::Four } - #[doc = "Checks if the value of the field is `FIVE`"] + #[doc = "Create a space of 5 baud-times between frames"] #[inline(always)] pub fn is_five(&self) -> bool { - *self == ICS_A::FIVE + *self == Ics::Five } - #[doc = "Checks if the value of the field is `SIX`"] + #[doc = "Create a space of 6 baud-times between frames"] #[inline(always)] pub fn is_six(&self) -> bool { - *self == ICS_A::SIX + *self == Ics::Six } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "Create a space of 7 baud-times between frames"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == ICS_A::SEVEN + *self == Ics::Seven } } #[doc = "Field `ICS` writer - Inter-Character Spacing"] -pub type ICS_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, TIMINGCFG_SPEC, u8, ICS_A, 3, O>; -impl<'a, const O: u8> ICS_W<'a, O> { +pub type IcsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Ics, crate::Safe>; +impl<'a, REG> IcsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "There is no space between charcters"] #[inline(always)] - pub fn zero(self) -> &'a mut W { - self.variant(ICS_A::ZERO) + pub fn zero(self) -> &'a mut crate::W { + self.variant(Ics::Zero) } #[doc = "Create a space of 1 baud-times between frames"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(ICS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Ics::One) } #[doc = "Create a space of 2 baud-times between frames"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(ICS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Ics::Two) } #[doc = "Create a space of 3 baud-times between frames"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(ICS_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Ics::Three) } #[doc = "Create a space of 4 baud-times between frames"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(ICS_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Ics::Four) } #[doc = "Create a space of 5 baud-times between frames"] #[inline(always)] - pub fn five(self) -> &'a mut W { - self.variant(ICS_A::FIVE) + pub fn five(self) -> &'a mut crate::W { + self.variant(Ics::Five) } #[doc = "Create a space of 6 baud-times between frames"] #[inline(always)] - pub fn six(self) -> &'a mut W { - self.variant(ICS_A::SIX) + pub fn six(self) -> &'a mut crate::W { + self.variant(Ics::Six) } #[doc = "Create a space of 7 baud-times between frames"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(ICS_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Ics::Seven) } } #[doc = "Field `SETUPWINDOW` reader - Setup Window"] -pub type SETUPWINDOW_R = crate::FieldReader; +pub type SetupwindowR = crate::FieldReader; #[doc = "Field `SETUPWINDOW` writer - Setup Window"] -pub type SETUPWINDOW_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMINGCFG_SPEC, u8, u8, 4, O>; +pub type SetupwindowW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - TX Delay Transmission"] #[inline(always)] - pub fn txdelay(&self) -> TXDELAY_R { - TXDELAY_R::new((self.bits & 3) as u8) + pub fn txdelay(&self) -> TxdelayR { + TxdelayR::new((self.bits & 3) as u8) } #[doc = "Bits 4:6 - Chip Select Setup"] #[inline(always)] - pub fn cssetup(&self) -> CSSETUP_R { - CSSETUP_R::new(((self.bits >> 4) & 7) as u8) + pub fn cssetup(&self) -> CssetupR { + CssetupR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Chip Select Hold"] #[inline(always)] - pub fn cshold(&self) -> CSHOLD_R { - CSHOLD_R::new(((self.bits >> 8) & 7) as u8) + pub fn cshold(&self) -> CsholdR { + CsholdR::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Inter-Character Spacing"] #[inline(always)] - pub fn ics(&self) -> ICS_R { - ICS_R::new(((self.bits >> 12) & 7) as u8) + pub fn ics(&self) -> IcsR { + IcsR::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:19 - Setup Window"] #[inline(always)] - pub fn setupwindow(&self) -> SETUPWINDOW_R { - SETUPWINDOW_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn setupwindow(&self) -> SetupwindowR { + SetupwindowR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - TX Delay Transmission"] #[inline(always)] #[must_use] - pub fn txdelay(&mut self) -> TXDELAY_W<0> { - TXDELAY_W::new(self) + pub fn txdelay(&mut self) -> TxdelayW { + TxdelayW::new(self, 0) } #[doc = "Bits 4:6 - Chip Select Setup"] #[inline(always)] #[must_use] - pub fn cssetup(&mut self) -> CSSETUP_W<4> { - CSSETUP_W::new(self) + pub fn cssetup(&mut self) -> CssetupW { + CssetupW::new(self, 4) } #[doc = "Bits 8:10 - Chip Select Hold"] #[inline(always)] #[must_use] - pub fn cshold(&mut self) -> CSHOLD_W<8> { - CSHOLD_W::new(self) + pub fn cshold(&mut self) -> CsholdW { + CsholdW::new(self, 8) } #[doc = "Bits 12:14 - Inter-Character Spacing"] #[inline(always)] #[must_use] - pub fn ics(&mut self) -> ICS_W<12> { - ICS_W::new(self) + pub fn ics(&mut self) -> IcsW { + IcsW::new(self, 12) } #[doc = "Bits 16:19 - Setup Window"] #[inline(always)] #[must_use] - pub fn setupwindow(&mut self) -> SETUPWINDOW_W<16> { - SETUPWINDOW_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn setupwindow(&mut self) -> SetupwindowW { + SetupwindowW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timingcfg](index.html) module"] -pub struct TIMINGCFG_SPEC; -impl crate::RegisterSpec for TIMINGCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timingcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timingcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TimingcfgSpec; +impl crate::RegisterSpec for TimingcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [timingcfg::R](R) reader structure"] -impl crate::Readable for TIMINGCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timingcfg::W](W) writer structure"] -impl crate::Writable for TIMINGCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timingcfg::R`](R) reader structure"] +impl crate::Readable for TimingcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`timingcfg::W`](W) writer structure"] +impl crate::Writable for TimingcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMINGCFG to value 0x0005_0000"] -impl crate::Resettable for TIMINGCFG_SPEC { - const RESET_VALUE: Self::Ux = 0x0005_0000; +impl crate::Resettable for TimingcfgSpec { + const RESET_VALUE: u32 = 0x0005_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/trigctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/trigctrl.rs index 6e5750d..4b0d8fe 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/trigctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/trigctrl.rs @@ -1,110 +1,70 @@ #[doc = "Register `TRIGCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TRIGCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RXTEN` reader - Receive Trigger Enable"] -pub type RXTEN_R = crate::BitReader; +pub type RxtenR = crate::BitReader; #[doc = "Field `RXTEN` writer - Receive Trigger Enable"] -pub type RXTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type RxtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTEN` reader - Transmit Trigger Enable"] -pub type TXTEN_R = crate::BitReader; +pub type TxtenR = crate::BitReader; #[doc = "Field `TXTEN` writer - Transmit Trigger Enable"] -pub type TXTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type TxtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOTXTEN` reader - AUTOTX Trigger Enable"] -pub type AUTOTXTEN_R = crate::BitReader; +pub type AutotxtenR = crate::BitReader; #[doc = "Field `AUTOTXTEN` writer - AUTOTX Trigger Enable"] -pub type AUTOTXTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type AutotxtenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Receive Trigger Enable"] #[inline(always)] - pub fn rxten(&self) -> RXTEN_R { - RXTEN_R::new((self.bits & 1) != 0) + pub fn rxten(&self) -> RxtenR { + RxtenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transmit Trigger Enable"] #[inline(always)] - pub fn txten(&self) -> TXTEN_R { - TXTEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn txten(&self) -> TxtenR { + TxtenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - AUTOTX Trigger Enable"] #[inline(always)] - pub fn autotxten(&self) -> AUTOTXTEN_R { - AUTOTXTEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn autotxten(&self) -> AutotxtenR { + AutotxtenR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Receive Trigger Enable"] #[inline(always)] #[must_use] - pub fn rxten(&mut self) -> RXTEN_W<0> { - RXTEN_W::new(self) + pub fn rxten(&mut self) -> RxtenW { + RxtenW::new(self, 0) } #[doc = "Bit 1 - Transmit Trigger Enable"] #[inline(always)] #[must_use] - pub fn txten(&mut self) -> TXTEN_W<1> { - TXTEN_W::new(self) + pub fn txten(&mut self) -> TxtenW { + TxtenW::new(self, 1) } #[doc = "Bit 2 - AUTOTX Trigger Enable"] #[inline(always)] #[must_use] - pub fn autotxten(&mut self) -> AUTOTXTEN_W<2> { - AUTOTXTEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn autotxten(&mut self) -> AutotxtenW { + AutotxtenW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [trigctrl](index.html) module"] -pub struct TRIGCTRL_SPEC; -impl crate::RegisterSpec for TRIGCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`trigctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trigctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TrigctrlSpec; +impl crate::RegisterSpec for TrigctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [trigctrl::R](R) reader structure"] -impl crate::Readable for TRIGCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [trigctrl::W](W) writer structure"] -impl crate::Writable for TRIGCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`trigctrl::R`](R) reader structure"] +impl crate::Readable for TrigctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`trigctrl::W`](W) writer structure"] +impl crate::Writable for TrigctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TRIGCTRL to value 0"] -impl crate::Resettable for TRIGCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TrigctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/txdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/txdata.rs index 5605e30..48b104b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/txdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart0_s/txdata.rs @@ -1,52 +1,27 @@ #[doc = "Register `TXDATA` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXDATA` writer - TX Data and Control bits"] -pub type TXDATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDATA_SPEC, u16, u16, 16, O>; +pub type TxdataW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl W { #[doc = "Bits 0:15 - TX Data and Control bits"] #[inline(always)] #[must_use] - pub fn txdata(&mut self) -> TXDATA_W<0> { - TXDATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txdata(&mut self) -> TxdataW { + TxdataW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdata](index.html) module"] -pub struct TXDATA_SPEC; -impl crate::RegisterSpec for TXDATA_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdata::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxdataSpec; +impl crate::RegisterSpec for TxdataSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [txdata::W](W) writer structure"] -impl crate::Writable for TXDATA_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`txdata::W`](W) writer structure"] +impl crate::Writable for TxdataSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXDATA to value 0"] -impl crate::Resettable for TXDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns.rs index b5a3c22..61ca07b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns.rs @@ -1,131 +1,259 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + cfg0: Cfg0, + cfg1: Cfg1, + cfg2: Cfg2, + framecfg: Framecfg, + dtxdatcfg: Dtxdatcfg, + irhfcfg: Irhfcfg, + _reserved8: [u8; 0x04], + timingcfg: Timingcfg, + startframecfg: Startframecfg, + sigframecfg: Sigframecfg, + clkdiv: Clkdiv, + trigctrl: Trigctrl, + cmd: Cmd, + rxdata: Rxdata, + rxdatap: Rxdatap, + txdata: Txdata, + status: Status, + if_: If, + ien: Ien, + syncbusy: Syncbusy, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub cfg0: CFG0, + #[inline(always)] + pub const fn cfg0(&self) -> &Cfg0 { + &self.cfg0 + } #[doc = "0x0c - No Description"] - pub cfg1: CFG1, + #[inline(always)] + pub const fn cfg1(&self) -> &Cfg1 { + &self.cfg1 + } #[doc = "0x10 - No Description"] - pub cfg2: CFG2, + #[inline(always)] + pub const fn cfg2(&self) -> &Cfg2 { + &self.cfg2 + } #[doc = "0x14 - No Description"] - pub framecfg: FRAMECFG, + #[inline(always)] + pub const fn framecfg(&self) -> &Framecfg { + &self.framecfg + } #[doc = "0x18 - No Description"] - pub dtxdatcfg: DTXDATCFG, + #[inline(always)] + pub const fn dtxdatcfg(&self) -> &Dtxdatcfg { + &self.dtxdatcfg + } #[doc = "0x1c - No Description"] - pub irhfcfg: IRHFCFG, - _reserved8: [u8; 0x04], + #[inline(always)] + pub const fn irhfcfg(&self) -> &Irhfcfg { + &self.irhfcfg + } #[doc = "0x24 - No Description"] - pub timingcfg: TIMINGCFG, + #[inline(always)] + pub const fn timingcfg(&self) -> &Timingcfg { + &self.timingcfg + } #[doc = "0x28 - No Description"] - pub startframecfg: STARTFRAMECFG, + #[inline(always)] + pub const fn startframecfg(&self) -> &Startframecfg { + &self.startframecfg + } #[doc = "0x2c - No Description"] - pub sigframecfg: SIGFRAMECFG, + #[inline(always)] + pub const fn sigframecfg(&self) -> &Sigframecfg { + &self.sigframecfg + } #[doc = "0x30 - No Description"] - pub clkdiv: CLKDIV, + #[inline(always)] + pub const fn clkdiv(&self) -> &Clkdiv { + &self.clkdiv + } #[doc = "0x34 - No Description"] - pub trigctrl: TRIGCTRL, + #[inline(always)] + pub const fn trigctrl(&self) -> &Trigctrl { + &self.trigctrl + } #[doc = "0x38 - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x3c - No Description"] - pub rxdata: RXDATA, + #[inline(always)] + pub const fn rxdata(&self) -> &Rxdata { + &self.rxdata + } #[doc = "0x40 - No Description"] - pub rxdatap: RXDATAP, + #[inline(always)] + pub const fn rxdatap(&self) -> &Rxdatap { + &self.rxdatap + } #[doc = "0x44 - No Description"] - pub txdata: TXDATA, + #[inline(always)] + pub const fn txdata(&self) -> &Txdata { + &self.txdata + } #[doc = "0x48 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x4c - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x50 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x54 - No Description"] - pub syncbusy: SYNCBUSY, + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CFG0 (rw) register accessor: an alias for `Reg`"] -pub type CFG0 = crate::Reg; +#[doc = "CFG0 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg0`] +module"] +#[doc(alias = "CFG0")] +pub type Cfg0 = crate::Reg; #[doc = "No Description"] pub mod cfg0; -#[doc = "CFG1 (rw) register accessor: an alias for `Reg`"] -pub type CFG1 = crate::Reg; +#[doc = "CFG1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg1`] +module"] +#[doc(alias = "CFG1")] +pub type Cfg1 = crate::Reg; #[doc = "No Description"] pub mod cfg1; -#[doc = "CFG2 (rw) register accessor: an alias for `Reg`"] -pub type CFG2 = crate::Reg; +#[doc = "CFG2 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg2`] +module"] +#[doc(alias = "CFG2")] +pub type Cfg2 = crate::Reg; #[doc = "No Description"] pub mod cfg2; -#[doc = "FRAMECFG (rw) register accessor: an alias for `Reg`"] -pub type FRAMECFG = crate::Reg; +#[doc = "FRAMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`framecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`framecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@framecfg`] +module"] +#[doc(alias = "FRAMECFG")] +pub type Framecfg = crate::Reg; #[doc = "No Description"] pub mod framecfg; -#[doc = "DTXDATCFG (rw) register accessor: an alias for `Reg`"] -pub type DTXDATCFG = crate::Reg; +#[doc = "DTXDATCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtxdatcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtxdatcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtxdatcfg`] +module"] +#[doc(alias = "DTXDATCFG")] +pub type Dtxdatcfg = crate::Reg; #[doc = "No Description"] pub mod dtxdatcfg; -#[doc = "IRHFCFG (rw) register accessor: an alias for `Reg`"] -pub type IRHFCFG = crate::Reg; +#[doc = "IRHFCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`irhfcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irhfcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irhfcfg`] +module"] +#[doc(alias = "IRHFCFG")] +pub type Irhfcfg = crate::Reg; #[doc = "No Description"] pub mod irhfcfg; -#[doc = "TIMINGCFG (rw) register accessor: an alias for `Reg`"] -pub type TIMINGCFG = crate::Reg; +#[doc = "TIMINGCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timingcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timingcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timingcfg`] +module"] +#[doc(alias = "TIMINGCFG")] +pub type Timingcfg = crate::Reg; #[doc = "No Description"] pub mod timingcfg; -#[doc = "STARTFRAMECFG (rw) register accessor: an alias for `Reg`"] -pub type STARTFRAMECFG = crate::Reg; +#[doc = "STARTFRAMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`startframecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`startframecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@startframecfg`] +module"] +#[doc(alias = "STARTFRAMECFG")] +pub type Startframecfg = crate::Reg; #[doc = "No Description"] pub mod startframecfg; -#[doc = "SIGFRAMECFG (rw) register accessor: an alias for `Reg`"] -pub type SIGFRAMECFG = crate::Reg; +#[doc = "SIGFRAMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sigframecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sigframecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sigframecfg`] +module"] +#[doc(alias = "SIGFRAMECFG")] +pub type Sigframecfg = crate::Reg; #[doc = "No Description"] pub mod sigframecfg; -#[doc = "CLKDIV (rw) register accessor: an alias for `Reg`"] -pub type CLKDIV = crate::Reg; +#[doc = "CLKDIV (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv`] +module"] +#[doc(alias = "CLKDIV")] +pub type Clkdiv = crate::Reg; #[doc = "No Description"] pub mod clkdiv; -#[doc = "TRIGCTRL (rw) register accessor: an alias for `Reg`"] -pub type TRIGCTRL = crate::Reg; +#[doc = "TRIGCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`trigctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trigctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trigctrl`] +module"] +#[doc(alias = "TRIGCTRL")] +pub type Trigctrl = crate::Reg; #[doc = "No Description"] pub mod trigctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "RXDATA (r) register accessor: an alias for `Reg`"] -pub type RXDATA = crate::Reg; +#[doc = "RXDATA (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdata::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdata`] +module"] +#[doc(alias = "RXDATA")] +pub type Rxdata = crate::Reg; #[doc = "No Description"] pub mod rxdata; -#[doc = "RXDATAP (r) register accessor: an alias for `Reg`"] -pub type RXDATAP = crate::Reg; +#[doc = "RXDATAP (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdatap::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdatap`] +module"] +#[doc(alias = "RXDATAP")] +pub type Rxdatap = crate::Reg; #[doc = "No Description"] pub mod rxdatap; -#[doc = "TXDATA (w) register accessor: an alias for `Reg`"] -pub type TXDATA = crate::Reg; +#[doc = "TXDATA (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdata::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txdata`] +module"] +#[doc(alias = "TXDATA")] +pub type Txdata = crate::Reg; #[doc = "No Description"] pub mod txdata; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "No Description"] pub mod syncbusy; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/cfg0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/cfg0.rs index 89b67d3..f0c8da6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/cfg0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/cfg0.rs @@ -1,249 +1,227 @@ #[doc = "Register `CFG0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SYNC` reader - Synchronous Mode"] -pub type SYNC_R = crate::BitReader; +pub type W = crate::W; #[doc = "Synchronous Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYNC_A { +pub enum Sync { #[doc = "0: The EUSART operates in asynchronous mode"] - ASYNC = 0, + Async = 0, #[doc = "1: The EUSART operates in synchronous mode"] - SYNC = 1, + Sync = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYNC_A) -> Self { + fn from(variant: Sync) -> Self { variant as u8 != 0 } } -impl SYNC_R { +#[doc = "Field `SYNC` reader - Synchronous Mode"] +pub type SyncR = crate::BitReader; +impl SyncR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SYNC_A { + pub const fn variant(&self) -> Sync { match self.bits { - false => SYNC_A::ASYNC, - true => SYNC_A::SYNC, + false => Sync::Async, + true => Sync::Sync, } } - #[doc = "Checks if the value of the field is `ASYNC`"] + #[doc = "The EUSART operates in asynchronous mode"] #[inline(always)] pub fn is_async(&self) -> bool { - *self == SYNC_A::ASYNC + *self == Sync::Async } - #[doc = "Checks if the value of the field is `SYNC`"] + #[doc = "The EUSART operates in synchronous mode"] #[inline(always)] pub fn is_sync(&self) -> bool { - *self == SYNC_A::SYNC + *self == Sync::Sync } } #[doc = "Field `SYNC` writer - Synchronous Mode"] -pub type SYNC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, SYNC_A, O>; -impl<'a, const O: u8> SYNC_W<'a, O> { +pub type SyncW<'a, REG> = crate::BitWriter<'a, REG, Sync>; +impl<'a, REG> SyncW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The EUSART operates in asynchronous mode"] #[inline(always)] - pub fn async_(self) -> &'a mut W { - self.variant(SYNC_A::ASYNC) + pub fn async_(self) -> &'a mut crate::W { + self.variant(Sync::Async) } #[doc = "The EUSART operates in synchronous mode"] #[inline(always)] - pub fn sync(self) -> &'a mut W { - self.variant(SYNC_A::SYNC) + pub fn sync(self) -> &'a mut crate::W { + self.variant(Sync::Sync) } } -#[doc = "Field `LOOPBK` reader - Loopback Enable"] -pub type LOOPBK_R = crate::BitReader; #[doc = "Loopback Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOOPBK_A { +pub enum Loopbk { #[doc = "0: The receiver is connected to and receives data from UARTn_RX"] - DISABLE = 0, + Disable = 0, #[doc = "1: The receiver is connected to and receives data from UARTn_TX"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOOPBK_A) -> Self { + fn from(variant: Loopbk) -> Self { variant as u8 != 0 } } -impl LOOPBK_R { +#[doc = "Field `LOOPBK` reader - Loopback Enable"] +pub type LoopbkR = crate::BitReader; +impl LoopbkR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOOPBK_A { + pub const fn variant(&self) -> Loopbk { match self.bits { - false => LOOPBK_A::DISABLE, - true => LOOPBK_A::ENABLE, + false => Loopbk::Disable, + true => Loopbk::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The receiver is connected to and receives data from UARTn_RX"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == LOOPBK_A::DISABLE + *self == Loopbk::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The receiver is connected to and receives data from UARTn_TX"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == LOOPBK_A::ENABLE + *self == Loopbk::Enable } } #[doc = "Field `LOOPBK` writer - Loopback Enable"] -pub type LOOPBK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, LOOPBK_A, O>; -impl<'a, const O: u8> LOOPBK_W<'a, O> { +pub type LoopbkW<'a, REG> = crate::BitWriter<'a, REG, Loopbk>; +impl<'a, REG> LoopbkW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The receiver is connected to and receives data from UARTn_RX"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(LOOPBK_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Loopbk::Disable) } #[doc = "The receiver is connected to and receives data from UARTn_TX"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(LOOPBK_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Loopbk::Enable) } } -#[doc = "Field `CCEN` reader - Collision Check Enable"] -pub type CCEN_R = crate::BitReader; #[doc = "Collision Check Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCEN_A { +pub enum Ccen { #[doc = "0: Collision check is disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Collision check is enabled. The receiver must be enabled for the check to be performed"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCEN_A) -> Self { + fn from(variant: Ccen) -> Self { variant as u8 != 0 } } -impl CCEN_R { +#[doc = "Field `CCEN` reader - Collision Check Enable"] +pub type CcenR = crate::BitReader; +impl CcenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCEN_A { + pub const fn variant(&self) -> Ccen { match self.bits { - false => CCEN_A::DISABLE, - true => CCEN_A::ENABLE, + false => Ccen::Disable, + true => Ccen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Collision check is disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CCEN_A::DISABLE + *self == Ccen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Collision check is enabled. The receiver must be enabled for the check to be performed"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CCEN_A::ENABLE + *self == Ccen::Enable } } #[doc = "Field `CCEN` writer - Collision Check Enable"] -pub type CCEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, CCEN_A, O>; -impl<'a, const O: u8> CCEN_W<'a, O> { +pub type CcenW<'a, REG> = crate::BitWriter<'a, REG, Ccen>; +impl<'a, REG> CcenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Collision check is disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CCEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ccen::Disable) } #[doc = "Collision check is enabled. The receiver must be enabled for the check to be performed"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CCEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Ccen::Enable) } } -#[doc = "Field `MPM` reader - Multi-Processor Mode"] -pub type MPM_R = crate::BitReader; #[doc = "Multi-Processor Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MPM_A { +pub enum Mpm { #[doc = "0: The 9th bit of incoming frames has no special function"] - DISABLE = 0, + Disable = 0, #[doc = "1: An incoming frame with the 9th bit equal to MPAB will be loaded into the RX FIFO regardless of RXBLOCK and will result in the MPAB interrupt flag being set"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MPM_A) -> Self { + fn from(variant: Mpm) -> Self { variant as u8 != 0 } } -impl MPM_R { +#[doc = "Field `MPM` reader - Multi-Processor Mode"] +pub type MpmR = crate::BitReader; +impl MpmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MPM_A { + pub const fn variant(&self) -> Mpm { match self.bits { - false => MPM_A::DISABLE, - true => MPM_A::ENABLE, + false => Mpm::Disable, + true => Mpm::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The 9th bit of incoming frames has no special function"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == MPM_A::DISABLE + *self == Mpm::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "An incoming frame with the 9th bit equal to MPAB will be loaded into the RX FIFO regardless of RXBLOCK and will result in the MPAB interrupt flag being set"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == MPM_A::ENABLE + *self == Mpm::Enable } } #[doc = "Field `MPM` writer - Multi-Processor Mode"] -pub type MPM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, MPM_A, O>; -impl<'a, const O: u8> MPM_W<'a, O> { +pub type MpmW<'a, REG> = crate::BitWriter<'a, REG, Mpm>; +impl<'a, REG> MpmW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The 9th bit of incoming frames has no special function"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(MPM_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Mpm::Disable) } #[doc = "An incoming frame with the 9th bit equal to MPAB will be loaded into the RX FIFO regardless of RXBLOCK and will result in the MPAB interrupt flag being set"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(MPM_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Mpm::Enable) } } #[doc = "Field `MPAB` reader - Multi-Processor Address-Bit"] -pub type MPAB_R = crate::BitReader; +pub type MpabR = crate::BitReader; #[doc = "Field `MPAB` writer - Multi-Processor Address-Bit"] -pub type MPAB_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, O>; -#[doc = "Field `OVS` reader - Oversampling"] -pub type OVS_R = crate::FieldReader; +pub type MpabW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Oversampling\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum OVS_A { +pub enum Ovs { #[doc = "0: 16X oversampling"] X16 = 0, #[doc = "1: 8X oversampling"] @@ -253,646 +231,669 @@ pub enum OVS_A { #[doc = "3: 4X oversampling"] X4 = 3, #[doc = "4: Disable oversampling (for LF operation)"] - DISABLE = 4, + Disable = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: OVS_A) -> Self { + fn from(variant: Ovs) -> Self { variant as _ } } -impl OVS_R { +impl crate::FieldSpec for Ovs { + type Ux = u8; +} +impl crate::IsEnum for Ovs {} +#[doc = "Field `OVS` reader - Oversampling"] +pub type OvsR = crate::FieldReader; +impl OvsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(OVS_A::X16), - 1 => Some(OVS_A::X8), - 2 => Some(OVS_A::X6), - 3 => Some(OVS_A::X4), - 4 => Some(OVS_A::DISABLE), + 0 => Some(Ovs::X16), + 1 => Some(Ovs::X8), + 2 => Some(Ovs::X6), + 3 => Some(Ovs::X4), + 4 => Some(Ovs::Disable), _ => None, } } - #[doc = "Checks if the value of the field is `X16`"] + #[doc = "16X oversampling"] #[inline(always)] pub fn is_x16(&self) -> bool { - *self == OVS_A::X16 + *self == Ovs::X16 } - #[doc = "Checks if the value of the field is `X8`"] + #[doc = "8X oversampling"] #[inline(always)] pub fn is_x8(&self) -> bool { - *self == OVS_A::X8 + *self == Ovs::X8 } - #[doc = "Checks if the value of the field is `X6`"] + #[doc = "6X oversampling"] #[inline(always)] pub fn is_x6(&self) -> bool { - *self == OVS_A::X6 + *self == Ovs::X6 } - #[doc = "Checks if the value of the field is `X4`"] + #[doc = "4X oversampling"] #[inline(always)] pub fn is_x4(&self) -> bool { - *self == OVS_A::X4 + *self == Ovs::X4 } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable oversampling (for LF operation)"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == OVS_A::DISABLE + *self == Ovs::Disable } } #[doc = "Field `OVS` writer - Oversampling"] -pub type OVS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG0_SPEC, u8, OVS_A, 3, O>; -impl<'a, const O: u8> OVS_W<'a, O> { +pub type OvsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Ovs>; +impl<'a, REG> OvsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "16X oversampling"] #[inline(always)] - pub fn x16(self) -> &'a mut W { - self.variant(OVS_A::X16) + pub fn x16(self) -> &'a mut crate::W { + self.variant(Ovs::X16) } #[doc = "8X oversampling"] #[inline(always)] - pub fn x8(self) -> &'a mut W { - self.variant(OVS_A::X8) + pub fn x8(self) -> &'a mut crate::W { + self.variant(Ovs::X8) } #[doc = "6X oversampling"] #[inline(always)] - pub fn x6(self) -> &'a mut W { - self.variant(OVS_A::X6) + pub fn x6(self) -> &'a mut crate::W { + self.variant(Ovs::X6) } #[doc = "4X oversampling"] #[inline(always)] - pub fn x4(self) -> &'a mut W { - self.variant(OVS_A::X4) + pub fn x4(self) -> &'a mut crate::W { + self.variant(Ovs::X4) } #[doc = "Disable oversampling (for LF operation)"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(OVS_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ovs::Disable) } } -#[doc = "Field `MSBF` reader - Most Significant Bit First"] -pub type MSBF_R = crate::BitReader; #[doc = "Most Significant Bit First\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MSBF_A { +pub enum Msbf { #[doc = "0: Data is sent with the least significant bit first"] - DISABLE = 0, + Disable = 0, #[doc = "1: Data is sent with the most significant bit first"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MSBF_A) -> Self { + fn from(variant: Msbf) -> Self { variant as u8 != 0 } } -impl MSBF_R { +#[doc = "Field `MSBF` reader - Most Significant Bit First"] +pub type MsbfR = crate::BitReader; +impl MsbfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MSBF_A { + pub const fn variant(&self) -> Msbf { match self.bits { - false => MSBF_A::DISABLE, - true => MSBF_A::ENABLE, + false => Msbf::Disable, + true => Msbf::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Data is sent with the least significant bit first"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == MSBF_A::DISABLE + *self == Msbf::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Data is sent with the most significant bit first"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == MSBF_A::ENABLE + *self == Msbf::Enable } } #[doc = "Field `MSBF` writer - Most Significant Bit First"] -pub type MSBF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, MSBF_A, O>; -impl<'a, const O: u8> MSBF_W<'a, O> { +pub type MsbfW<'a, REG> = crate::BitWriter<'a, REG, Msbf>; +impl<'a, REG> MsbfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Data is sent with the least significant bit first"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(MSBF_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Msbf::Disable) } #[doc = "Data is sent with the most significant bit first"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(MSBF_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Msbf::Enable) } } -#[doc = "Field `RXINV` reader - Receiver Input Invert"] -pub type RXINV_R = crate::BitReader; #[doc = "Receiver Input Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RXINV_A { +pub enum Rxinv { #[doc = "0: Input is passed directly to the receiver"] - DISABLE = 0, + Disable = 0, #[doc = "1: Input is inverted before it is passed to the receiver"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RXINV_A) -> Self { + fn from(variant: Rxinv) -> Self { variant as u8 != 0 } } -impl RXINV_R { +#[doc = "Field `RXINV` reader - Receiver Input Invert"] +pub type RxinvR = crate::BitReader; +impl RxinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RXINV_A { + pub const fn variant(&self) -> Rxinv { match self.bits { - false => RXINV_A::DISABLE, - true => RXINV_A::ENABLE, + false => Rxinv::Disable, + true => Rxinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Input is passed directly to the receiver"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RXINV_A::DISABLE + *self == Rxinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Input is inverted before it is passed to the receiver"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RXINV_A::ENABLE + *self == Rxinv::Enable } } #[doc = "Field `RXINV` writer - Receiver Input Invert"] -pub type RXINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, RXINV_A, O>; -impl<'a, const O: u8> RXINV_W<'a, O> { +pub type RxinvW<'a, REG> = crate::BitWriter<'a, REG, Rxinv>; +impl<'a, REG> RxinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Input is passed directly to the receiver"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RXINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Rxinv::Disable) } #[doc = "Input is inverted before it is passed to the receiver"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RXINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Rxinv::Enable) } } -#[doc = "Field `TXINV` reader - Transmitter output Invert"] -pub type TXINV_R = crate::BitReader; #[doc = "Transmitter output Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TXINV_A { +pub enum Txinv { #[doc = "0: Output from the transmitter is passed unchanged to UARTn_TX"] - DISABLE = 0, + Disable = 0, #[doc = "1: Output from the transmitter is inverted before it is passed to UARTn_TX"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TXINV_A) -> Self { + fn from(variant: Txinv) -> Self { variant as u8 != 0 } } -impl TXINV_R { +#[doc = "Field `TXINV` reader - Transmitter output Invert"] +pub type TxinvR = crate::BitReader; +impl TxinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXINV_A { + pub const fn variant(&self) -> Txinv { match self.bits { - false => TXINV_A::DISABLE, - true => TXINV_A::ENABLE, + false => Txinv::Disable, + true => Txinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Output from the transmitter is passed unchanged to UARTn_TX"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == TXINV_A::DISABLE + *self == Txinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Output from the transmitter is inverted before it is passed to UARTn_TX"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == TXINV_A::ENABLE + *self == Txinv::Enable } } #[doc = "Field `TXINV` writer - Transmitter output Invert"] -pub type TXINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, TXINV_A, O>; -impl<'a, const O: u8> TXINV_W<'a, O> { +pub type TxinvW<'a, REG> = crate::BitWriter<'a, REG, Txinv>; +impl<'a, REG> TxinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Output from the transmitter is passed unchanged to UARTn_TX"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(TXINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Txinv::Disable) } #[doc = "Output from the transmitter is inverted before it is passed to UARTn_TX"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(TXINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Txinv::Enable) } } -#[doc = "Field `AUTOTRI` reader - Automatic TX Tristate"] -pub type AUTOTRI_R = crate::BitReader; #[doc = "Automatic TX Tristate\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AUTOTRI_A { +pub enum Autotri { #[doc = "0: The output on UARTn_TX when the transmitter is idle is defined by TXINV"] - DISABLE = 0, + Disable = 0, #[doc = "1: UARTn_TX is tristated whenever the transmitter is idle"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AUTOTRI_A) -> Self { + fn from(variant: Autotri) -> Self { variant as u8 != 0 } } -impl AUTOTRI_R { +#[doc = "Field `AUTOTRI` reader - Automatic TX Tristate"] +pub type AutotriR = crate::BitReader; +impl AutotriR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> AUTOTRI_A { + pub const fn variant(&self) -> Autotri { match self.bits { - false => AUTOTRI_A::DISABLE, - true => AUTOTRI_A::ENABLE, + false => Autotri::Disable, + true => Autotri::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The output on UARTn_TX when the transmitter is idle is defined by TXINV"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == AUTOTRI_A::DISABLE + *self == Autotri::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "UARTn_TX is tristated whenever the transmitter is idle"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == AUTOTRI_A::ENABLE + *self == Autotri::Enable } } #[doc = "Field `AUTOTRI` writer - Automatic TX Tristate"] -pub type AUTOTRI_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, AUTOTRI_A, O>; -impl<'a, const O: u8> AUTOTRI_W<'a, O> { +pub type AutotriW<'a, REG> = crate::BitWriter<'a, REG, Autotri>; +impl<'a, REG> AutotriW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The output on UARTn_TX when the transmitter is idle is defined by TXINV"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(AUTOTRI_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Autotri::Disable) } #[doc = "UARTn_TX is tristated whenever the transmitter is idle"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(AUTOTRI_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Autotri::Enable) } } #[doc = "Field `SKIPPERRF` reader - Skip Parity Error Frames"] -pub type SKIPPERRF_R = crate::BitReader; +pub type SkipperrfR = crate::BitReader; #[doc = "Field `SKIPPERRF` writer - Skip Parity Error Frames"] -pub type SKIPPERRF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, O>; -#[doc = "Field `ERRSDMA` reader - Halt DMA Read On Error"] -pub type ERRSDMA_R = crate::BitReader; +pub type SkipperrfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Halt DMA Read On Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRSDMA_A { +pub enum Errsdma { #[doc = "0: Framing and parity errors have no effect on DMA requests from the EUSART"] - DISABLE = 0, + Disable = 0, #[doc = "1: DMA requests from the EUSART are blocked while the PERR or FERR interrupt flags are set"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRSDMA_A) -> Self { + fn from(variant: Errsdma) -> Self { variant as u8 != 0 } } -impl ERRSDMA_R { +#[doc = "Field `ERRSDMA` reader - Halt DMA Read On Error"] +pub type ErrsdmaR = crate::BitReader; +impl ErrsdmaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ERRSDMA_A { + pub const fn variant(&self) -> Errsdma { match self.bits { - false => ERRSDMA_A::DISABLE, - true => ERRSDMA_A::ENABLE, + false => Errsdma::Disable, + true => Errsdma::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Framing and parity errors have no effect on DMA requests from the EUSART"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ERRSDMA_A::DISABLE + *self == Errsdma::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "DMA requests from the EUSART are blocked while the PERR or FERR interrupt flags are set"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ERRSDMA_A::ENABLE + *self == Errsdma::Enable } } #[doc = "Field `ERRSDMA` writer - Halt DMA Read On Error"] -pub type ERRSDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, ERRSDMA_A, O>; -impl<'a, const O: u8> ERRSDMA_W<'a, O> { +pub type ErrsdmaW<'a, REG> = crate::BitWriter<'a, REG, Errsdma>; +impl<'a, REG> ErrsdmaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Framing and parity errors have no effect on DMA requests from the EUSART"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ERRSDMA_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Errsdma::Disable) } #[doc = "DMA requests from the EUSART are blocked while the PERR or FERR interrupt flags are set"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ERRSDMA_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Errsdma::Enable) } } -#[doc = "Field `ERRSRX` reader - Disable RX On Error"] -pub type ERRSRX_R = crate::BitReader; #[doc = "Disable RX On Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRSRX_A { +pub enum Errsrx { #[doc = "0: Framing and parity errors have no effect on receiver"] - DISABLE = 0, + Disable = 0, #[doc = "1: Framing and parity errors disable the receiver"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRSRX_A) -> Self { + fn from(variant: Errsrx) -> Self { variant as u8 != 0 } } -impl ERRSRX_R { +#[doc = "Field `ERRSRX` reader - Disable RX On Error"] +pub type ErrsrxR = crate::BitReader; +impl ErrsrxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ERRSRX_A { + pub const fn variant(&self) -> Errsrx { match self.bits { - false => ERRSRX_A::DISABLE, - true => ERRSRX_A::ENABLE, + false => Errsrx::Disable, + true => Errsrx::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Framing and parity errors have no effect on receiver"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ERRSRX_A::DISABLE + *self == Errsrx::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Framing and parity errors disable the receiver"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ERRSRX_A::ENABLE + *self == Errsrx::Enable } } #[doc = "Field `ERRSRX` writer - Disable RX On Error"] -pub type ERRSRX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, ERRSRX_A, O>; -impl<'a, const O: u8> ERRSRX_W<'a, O> { +pub type ErrsrxW<'a, REG> = crate::BitWriter<'a, REG, Errsrx>; +impl<'a, REG> ErrsrxW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Framing and parity errors have no effect on receiver"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ERRSRX_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Errsrx::Disable) } #[doc = "Framing and parity errors disable the receiver"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ERRSRX_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Errsrx::Enable) } } -#[doc = "Field `ERRSTX` reader - Disable TX On Error"] -pub type ERRSTX_R = crate::BitReader; #[doc = "Disable TX On Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRSTX_A { +pub enum Errstx { #[doc = "0: Received framing and parity errors have no effect on transmitter"] - DISABLE = 0, + Disable = 0, #[doc = "1: Received framing and parity errors disable the transmitter"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRSTX_A) -> Self { + fn from(variant: Errstx) -> Self { variant as u8 != 0 } } -impl ERRSTX_R { +#[doc = "Field `ERRSTX` reader - Disable TX On Error"] +pub type ErrstxR = crate::BitReader; +impl ErrstxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ERRSTX_A { + pub const fn variant(&self) -> Errstx { match self.bits { - false => ERRSTX_A::DISABLE, - true => ERRSTX_A::ENABLE, + false => Errstx::Disable, + true => Errstx::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Received framing and parity errors have no effect on transmitter"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ERRSTX_A::DISABLE + *self == Errstx::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Received framing and parity errors disable the transmitter"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ERRSTX_A::ENABLE + *self == Errstx::Enable } } #[doc = "Field `ERRSTX` writer - Disable TX On Error"] -pub type ERRSTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, ERRSTX_A, O>; -impl<'a, const O: u8> ERRSTX_W<'a, O> { +pub type ErrstxW<'a, REG> = crate::BitWriter<'a, REG, Errstx>; +impl<'a, REG> ErrstxW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Received framing and parity errors have no effect on transmitter"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ERRSTX_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Errstx::Disable) } #[doc = "Received framing and parity errors disable the transmitter"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ERRSTX_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Errstx::Enable) } } #[doc = "Field `MVDIS` reader - Majority Vote Disable"] -pub type MVDIS_R = crate::BitReader; +pub type MvdisR = crate::BitReader; #[doc = "Field `MVDIS` writer - Majority Vote Disable"] -pub type MVDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, O>; +pub type MvdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOBAUDEN` reader - AUTOBAUD detection enable"] -pub type AUTOBAUDEN_R = crate::BitReader; +pub type AutobaudenR = crate::BitReader; #[doc = "Field `AUTOBAUDEN` writer - AUTOBAUD detection enable"] -pub type AUTOBAUDEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, O>; +pub type AutobaudenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Synchronous Mode"] #[inline(always)] - pub fn sync(&self) -> SYNC_R { - SYNC_R::new((self.bits & 1) != 0) + pub fn sync(&self) -> SyncR { + SyncR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Loopback Enable"] #[inline(always)] - pub fn loopbk(&self) -> LOOPBK_R { - LOOPBK_R::new(((self.bits >> 1) & 1) != 0) + pub fn loopbk(&self) -> LoopbkR { + LoopbkR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Collision Check Enable"] #[inline(always)] - pub fn ccen(&self) -> CCEN_R { - CCEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn ccen(&self) -> CcenR { + CcenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Multi-Processor Mode"] #[inline(always)] - pub fn mpm(&self) -> MPM_R { - MPM_R::new(((self.bits >> 3) & 1) != 0) + pub fn mpm(&self) -> MpmR { + MpmR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Multi-Processor Address-Bit"] #[inline(always)] - pub fn mpab(&self) -> MPAB_R { - MPAB_R::new(((self.bits >> 4) & 1) != 0) + pub fn mpab(&self) -> MpabR { + MpabR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 5:7 - Oversampling"] #[inline(always)] - pub fn ovs(&self) -> OVS_R { - OVS_R::new(((self.bits >> 5) & 7) as u8) + pub fn ovs(&self) -> OvsR { + OvsR::new(((self.bits >> 5) & 7) as u8) } #[doc = "Bit 10 - Most Significant Bit First"] #[inline(always)] - pub fn msbf(&self) -> MSBF_R { - MSBF_R::new(((self.bits >> 10) & 1) != 0) + pub fn msbf(&self) -> MsbfR { + MsbfR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 13 - Receiver Input Invert"] #[inline(always)] - pub fn rxinv(&self) -> RXINV_R { - RXINV_R::new(((self.bits >> 13) & 1) != 0) + pub fn rxinv(&self) -> RxinvR { + RxinvR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Transmitter output Invert"] #[inline(always)] - pub fn txinv(&self) -> TXINV_R { - TXINV_R::new(((self.bits >> 14) & 1) != 0) + pub fn txinv(&self) -> TxinvR { + TxinvR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 17 - Automatic TX Tristate"] #[inline(always)] - pub fn autotri(&self) -> AUTOTRI_R { - AUTOTRI_R::new(((self.bits >> 17) & 1) != 0) + pub fn autotri(&self) -> AutotriR { + AutotriR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 20 - Skip Parity Error Frames"] #[inline(always)] - pub fn skipperrf(&self) -> SKIPPERRF_R { - SKIPPERRF_R::new(((self.bits >> 20) & 1) != 0) + pub fn skipperrf(&self) -> SkipperrfR { + SkipperrfR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 22 - Halt DMA Read On Error"] #[inline(always)] - pub fn errsdma(&self) -> ERRSDMA_R { - ERRSDMA_R::new(((self.bits >> 22) & 1) != 0) + pub fn errsdma(&self) -> ErrsdmaR { + ErrsdmaR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Disable RX On Error"] #[inline(always)] - pub fn errsrx(&self) -> ERRSRX_R { - ERRSRX_R::new(((self.bits >> 23) & 1) != 0) + pub fn errsrx(&self) -> ErrsrxR { + ErrsrxR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - Disable TX On Error"] #[inline(always)] - pub fn errstx(&self) -> ERRSTX_R { - ERRSTX_R::new(((self.bits >> 24) & 1) != 0) + pub fn errstx(&self) -> ErrstxR { + ErrstxR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 30 - Majority Vote Disable"] #[inline(always)] - pub fn mvdis(&self) -> MVDIS_R { - MVDIS_R::new(((self.bits >> 30) & 1) != 0) + pub fn mvdis(&self) -> MvdisR { + MvdisR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - AUTOBAUD detection enable"] #[inline(always)] - pub fn autobauden(&self) -> AUTOBAUDEN_R { - AUTOBAUDEN_R::new(((self.bits >> 31) & 1) != 0) + pub fn autobauden(&self) -> AutobaudenR { + AutobaudenR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Synchronous Mode"] #[inline(always)] #[must_use] - pub fn sync(&mut self) -> SYNC_W<0> { - SYNC_W::new(self) + pub fn sync(&mut self) -> SyncW { + SyncW::new(self, 0) } #[doc = "Bit 1 - Loopback Enable"] #[inline(always)] #[must_use] - pub fn loopbk(&mut self) -> LOOPBK_W<1> { - LOOPBK_W::new(self) + pub fn loopbk(&mut self) -> LoopbkW { + LoopbkW::new(self, 1) } #[doc = "Bit 2 - Collision Check Enable"] #[inline(always)] #[must_use] - pub fn ccen(&mut self) -> CCEN_W<2> { - CCEN_W::new(self) + pub fn ccen(&mut self) -> CcenW { + CcenW::new(self, 2) } #[doc = "Bit 3 - Multi-Processor Mode"] #[inline(always)] #[must_use] - pub fn mpm(&mut self) -> MPM_W<3> { - MPM_W::new(self) + pub fn mpm(&mut self) -> MpmW { + MpmW::new(self, 3) } #[doc = "Bit 4 - Multi-Processor Address-Bit"] #[inline(always)] #[must_use] - pub fn mpab(&mut self) -> MPAB_W<4> { - MPAB_W::new(self) + pub fn mpab(&mut self) -> MpabW { + MpabW::new(self, 4) } #[doc = "Bits 5:7 - Oversampling"] #[inline(always)] #[must_use] - pub fn ovs(&mut self) -> OVS_W<5> { - OVS_W::new(self) + pub fn ovs(&mut self) -> OvsW { + OvsW::new(self, 5) } #[doc = "Bit 10 - Most Significant Bit First"] #[inline(always)] #[must_use] - pub fn msbf(&mut self) -> MSBF_W<10> { - MSBF_W::new(self) + pub fn msbf(&mut self) -> MsbfW { + MsbfW::new(self, 10) } #[doc = "Bit 13 - Receiver Input Invert"] #[inline(always)] #[must_use] - pub fn rxinv(&mut self) -> RXINV_W<13> { - RXINV_W::new(self) + pub fn rxinv(&mut self) -> RxinvW { + RxinvW::new(self, 13) } #[doc = "Bit 14 - Transmitter output Invert"] #[inline(always)] #[must_use] - pub fn txinv(&mut self) -> TXINV_W<14> { - TXINV_W::new(self) + pub fn txinv(&mut self) -> TxinvW { + TxinvW::new(self, 14) } #[doc = "Bit 17 - Automatic TX Tristate"] #[inline(always)] #[must_use] - pub fn autotri(&mut self) -> AUTOTRI_W<17> { - AUTOTRI_W::new(self) + pub fn autotri(&mut self) -> AutotriW { + AutotriW::new(self, 17) } #[doc = "Bit 20 - Skip Parity Error Frames"] #[inline(always)] #[must_use] - pub fn skipperrf(&mut self) -> SKIPPERRF_W<20> { - SKIPPERRF_W::new(self) + pub fn skipperrf(&mut self) -> SkipperrfW { + SkipperrfW::new(self, 20) } #[doc = "Bit 22 - Halt DMA Read On Error"] #[inline(always)] #[must_use] - pub fn errsdma(&mut self) -> ERRSDMA_W<22> { - ERRSDMA_W::new(self) + pub fn errsdma(&mut self) -> ErrsdmaW { + ErrsdmaW::new(self, 22) } #[doc = "Bit 23 - Disable RX On Error"] #[inline(always)] #[must_use] - pub fn errsrx(&mut self) -> ERRSRX_W<23> { - ERRSRX_W::new(self) + pub fn errsrx(&mut self) -> ErrsrxW { + ErrsrxW::new(self, 23) } #[doc = "Bit 24 - Disable TX On Error"] #[inline(always)] #[must_use] - pub fn errstx(&mut self) -> ERRSTX_W<24> { - ERRSTX_W::new(self) + pub fn errstx(&mut self) -> ErrstxW { + ErrstxW::new(self, 24) } #[doc = "Bit 30 - Majority Vote Disable"] #[inline(always)] #[must_use] - pub fn mvdis(&mut self) -> MVDIS_W<30> { - MVDIS_W::new(self) + pub fn mvdis(&mut self) -> MvdisW { + MvdisW::new(self, 30) } #[doc = "Bit 31 - AUTOBAUD detection enable"] #[inline(always)] #[must_use] - pub fn autobauden(&mut self) -> AUTOBAUDEN_W<31> { - AUTOBAUDEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn autobauden(&mut self) -> AutobaudenW { + AutobaudenW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg0](index.html) module"] -pub struct CFG0_SPEC; -impl crate::RegisterSpec for CFG0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cfg0Spec; +impl crate::RegisterSpec for Cfg0Spec { type Ux = u32; } -#[doc = "`read()` method returns [cfg0::R](R) reader structure"] -impl crate::Readable for CFG0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg0::W](W) writer structure"] -impl crate::Writable for CFG0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg0::R`](R) reader structure"] +impl crate::Readable for Cfg0Spec {} +#[doc = "`write(|w| ..)` method takes [`cfg0::W`](W) writer structure"] +impl crate::Writable for Cfg0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG0 to value 0"] -impl crate::Resettable for CFG0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cfg0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/cfg1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/cfg1.rs index 1607689..73dbb48 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/cfg1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/cfg1.rs @@ -1,1217 +1,1219 @@ #[doc = "Register `CFG1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DBGHALT` reader - Debug halt"] -pub type DBGHALT_R = crate::BitReader; +pub type W = crate::W; #[doc = "Debug halt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DBGHALT_A { +pub enum Dbghalt { #[doc = "0: Continue normal EUSART operation even if core is halted"] - DISABLE = 0, + Disable = 0, #[doc = "1: If core is halted, receive one frame and then halt reception by deactivating RTS. Next frame reception happens when the core is unhalted during single stepping."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DBGHALT_A) -> Self { + fn from(variant: Dbghalt) -> Self { variant as u8 != 0 } } -impl DBGHALT_R { +#[doc = "Field `DBGHALT` reader - Debug halt"] +pub type DbghaltR = crate::BitReader; +impl DbghaltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DBGHALT_A { + pub const fn variant(&self) -> Dbghalt { match self.bits { - false => DBGHALT_A::DISABLE, - true => DBGHALT_A::ENABLE, + false => Dbghalt::Disable, + true => Dbghalt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Continue normal EUSART operation even if core is halted"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == DBGHALT_A::DISABLE + *self == Dbghalt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "If core is halted, receive one frame and then halt reception by deactivating RTS. Next frame reception happens when the core is unhalted during single stepping."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == DBGHALT_A::ENABLE + *self == Dbghalt::Enable } } #[doc = "Field `DBGHALT` writer - Debug halt"] -pub type DBGHALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, DBGHALT_A, O>; -impl<'a, const O: u8> DBGHALT_W<'a, O> { +pub type DbghaltW<'a, REG> = crate::BitWriter<'a, REG, Dbghalt>; +impl<'a, REG> DbghaltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Continue normal EUSART operation even if core is halted"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(DBGHALT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Dbghalt::Disable) } #[doc = "If core is halted, receive one frame and then halt reception by deactivating RTS. Next frame reception happens when the core is unhalted during single stepping."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(DBGHALT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Dbghalt::Enable) } } -#[doc = "Field `CTSINV` reader - Clear-to-send Invert Enable"] -pub type CTSINV_R = crate::BitReader; #[doc = "Clear-to-send Invert Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CTSINV_A { +pub enum Ctsinv { #[doc = "0: The CTS pin is active low"] - DISABLE = 0, + Disable = 0, #[doc = "1: The CTS pin is active high"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CTSINV_A) -> Self { + fn from(variant: Ctsinv) -> Self { variant as u8 != 0 } } -impl CTSINV_R { +#[doc = "Field `CTSINV` reader - Clear-to-send Invert Enable"] +pub type CtsinvR = crate::BitReader; +impl CtsinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CTSINV_A { + pub const fn variant(&self) -> Ctsinv { match self.bits { - false => CTSINV_A::DISABLE, - true => CTSINV_A::ENABLE, + false => Ctsinv::Disable, + true => Ctsinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The CTS pin is active low"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CTSINV_A::DISABLE + *self == Ctsinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The CTS pin is active high"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CTSINV_A::ENABLE + *self == Ctsinv::Enable } } #[doc = "Field `CTSINV` writer - Clear-to-send Invert Enable"] -pub type CTSINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, CTSINV_A, O>; -impl<'a, const O: u8> CTSINV_W<'a, O> { +pub type CtsinvW<'a, REG> = crate::BitWriter<'a, REG, Ctsinv>; +impl<'a, REG> CtsinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The CTS pin is active low"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CTSINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ctsinv::Disable) } #[doc = "The CTS pin is active high"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CTSINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Ctsinv::Enable) } } -#[doc = "Field `CTSEN` reader - Clear-to-send Enable"] -pub type CTSEN_R = crate::BitReader; #[doc = "Clear-to-send Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CTSEN_A { +pub enum Ctsen { #[doc = "0: Ignore CTS"] - DISABLE = 0, + Disable = 0, #[doc = "1: Stop transmitting when CTS is inactive"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CTSEN_A) -> Self { + fn from(variant: Ctsen) -> Self { variant as u8 != 0 } } -impl CTSEN_R { +#[doc = "Field `CTSEN` reader - Clear-to-send Enable"] +pub type CtsenR = crate::BitReader; +impl CtsenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CTSEN_A { + pub const fn variant(&self) -> Ctsen { match self.bits { - false => CTSEN_A::DISABLE, - true => CTSEN_A::ENABLE, + false => Ctsen::Disable, + true => Ctsen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Ignore CTS"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CTSEN_A::DISABLE + *self == Ctsen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Stop transmitting when CTS is inactive"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CTSEN_A::ENABLE + *self == Ctsen::Enable } } #[doc = "Field `CTSEN` writer - Clear-to-send Enable"] -pub type CTSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, CTSEN_A, O>; -impl<'a, const O: u8> CTSEN_W<'a, O> { +pub type CtsenW<'a, REG> = crate::BitWriter<'a, REG, Ctsen>; +impl<'a, REG> CtsenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Ignore CTS"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CTSEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ctsen::Disable) } #[doc = "Stop transmitting when CTS is inactive"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CTSEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Ctsen::Enable) } } -#[doc = "Field `RTSINV` reader - Request-to-send Invert Enable"] -pub type RTSINV_R = crate::BitReader; #[doc = "Request-to-send Invert Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTSINV_A { +pub enum Rtsinv { #[doc = "0: The RTS pin is active low"] - DISABLE = 0, + Disable = 0, #[doc = "1: The RTS pin is active high"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTSINV_A) -> Self { + fn from(variant: Rtsinv) -> Self { variant as u8 != 0 } } -impl RTSINV_R { +#[doc = "Field `RTSINV` reader - Request-to-send Invert Enable"] +pub type RtsinvR = crate::BitReader; +impl RtsinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RTSINV_A { + pub const fn variant(&self) -> Rtsinv { match self.bits { - false => RTSINV_A::DISABLE, - true => RTSINV_A::ENABLE, + false => Rtsinv::Disable, + true => Rtsinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The RTS pin is active low"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RTSINV_A::DISABLE + *self == Rtsinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The RTS pin is active high"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RTSINV_A::ENABLE + *self == Rtsinv::Enable } } #[doc = "Field `RTSINV` writer - Request-to-send Invert Enable"] -pub type RTSINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, RTSINV_A, O>; -impl<'a, const O: u8> RTSINV_W<'a, O> { +pub type RtsinvW<'a, REG> = crate::BitWriter<'a, REG, Rtsinv>; +impl<'a, REG> RtsinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The RTS pin is active low"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RTSINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Rtsinv::Disable) } #[doc = "The RTS pin is active high"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RTSINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Rtsinv::Enable) } } -#[doc = "Field `RXTIMEOUT` reader - RX Timeout"] -pub type RXTIMEOUT_R = crate::FieldReader; #[doc = "RX Timeout\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RXTIMEOUT_A { +pub enum Rxtimeout { #[doc = "0: DISABLED"] - DISABLED = 0, + Disabled = 0, #[doc = "1: ONEFRAME"] - ONEFRAME = 1, + Oneframe = 1, #[doc = "2: TWOFRAMES"] - TWOFRAMES = 2, + Twoframes = 2, #[doc = "3: THREEFRAMES"] - THREEFRAMES = 3, + Threeframes = 3, #[doc = "4: FOURFRAMES"] - FOURFRAMES = 4, + Fourframes = 4, #[doc = "5: FIVEFRAMES"] - FIVEFRAMES = 5, + Fiveframes = 5, #[doc = "6: SIXFRAMES"] - SIXFRAMES = 6, + Sixframes = 6, #[doc = "7: SEVENFRAMES"] - SEVENFRAMES = 7, + Sevenframes = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RXTIMEOUT_A) -> Self { + fn from(variant: Rxtimeout) -> Self { variant as _ } } -impl RXTIMEOUT_R { +impl crate::FieldSpec for Rxtimeout { + type Ux = u8; +} +impl crate::IsEnum for Rxtimeout {} +#[doc = "Field `RXTIMEOUT` reader - RX Timeout"] +pub type RxtimeoutR = crate::FieldReader; +impl RxtimeoutR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RXTIMEOUT_A { + pub const fn variant(&self) -> Rxtimeout { match self.bits { - 0 => RXTIMEOUT_A::DISABLED, - 1 => RXTIMEOUT_A::ONEFRAME, - 2 => RXTIMEOUT_A::TWOFRAMES, - 3 => RXTIMEOUT_A::THREEFRAMES, - 4 => RXTIMEOUT_A::FOURFRAMES, - 5 => RXTIMEOUT_A::FIVEFRAMES, - 6 => RXTIMEOUT_A::SIXFRAMES, - 7 => RXTIMEOUT_A::SEVENFRAMES, + 0 => Rxtimeout::Disabled, + 1 => Rxtimeout::Oneframe, + 2 => Rxtimeout::Twoframes, + 3 => Rxtimeout::Threeframes, + 4 => Rxtimeout::Fourframes, + 5 => Rxtimeout::Fiveframes, + 6 => Rxtimeout::Sixframes, + 7 => Rxtimeout::Sevenframes, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "DISABLED"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == RXTIMEOUT_A::DISABLED + *self == Rxtimeout::Disabled } - #[doc = "Checks if the value of the field is `ONEFRAME`"] + #[doc = "ONEFRAME"] #[inline(always)] pub fn is_oneframe(&self) -> bool { - *self == RXTIMEOUT_A::ONEFRAME + *self == Rxtimeout::Oneframe } - #[doc = "Checks if the value of the field is `TWOFRAMES`"] + #[doc = "TWOFRAMES"] #[inline(always)] pub fn is_twoframes(&self) -> bool { - *self == RXTIMEOUT_A::TWOFRAMES + *self == Rxtimeout::Twoframes } - #[doc = "Checks if the value of the field is `THREEFRAMES`"] + #[doc = "THREEFRAMES"] #[inline(always)] pub fn is_threeframes(&self) -> bool { - *self == RXTIMEOUT_A::THREEFRAMES + *self == Rxtimeout::Threeframes } - #[doc = "Checks if the value of the field is `FOURFRAMES`"] + #[doc = "FOURFRAMES"] #[inline(always)] pub fn is_fourframes(&self) -> bool { - *self == RXTIMEOUT_A::FOURFRAMES + *self == Rxtimeout::Fourframes } - #[doc = "Checks if the value of the field is `FIVEFRAMES`"] + #[doc = "FIVEFRAMES"] #[inline(always)] pub fn is_fiveframes(&self) -> bool { - *self == RXTIMEOUT_A::FIVEFRAMES + *self == Rxtimeout::Fiveframes } - #[doc = "Checks if the value of the field is `SIXFRAMES`"] + #[doc = "SIXFRAMES"] #[inline(always)] pub fn is_sixframes(&self) -> bool { - *self == RXTIMEOUT_A::SIXFRAMES + *self == Rxtimeout::Sixframes } - #[doc = "Checks if the value of the field is `SEVENFRAMES`"] + #[doc = "SEVENFRAMES"] #[inline(always)] pub fn is_sevenframes(&self) -> bool { - *self == RXTIMEOUT_A::SEVENFRAMES + *self == Rxtimeout::Sevenframes } } #[doc = "Field `RXTIMEOUT` writer - RX Timeout"] -pub type RXTIMEOUT_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CFG1_SPEC, u8, RXTIMEOUT_A, 3, O>; -impl<'a, const O: u8> RXTIMEOUT_W<'a, O> { +pub type RxtimeoutW<'a, REG> = crate::FieldWriter<'a, REG, 3, Rxtimeout, crate::Safe>; +impl<'a, REG> RxtimeoutW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "DISABLED"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Disabled) } #[doc = "ONEFRAME"] #[inline(always)] - pub fn oneframe(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::ONEFRAME) + pub fn oneframe(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Oneframe) } #[doc = "TWOFRAMES"] #[inline(always)] - pub fn twoframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::TWOFRAMES) + pub fn twoframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Twoframes) } #[doc = "THREEFRAMES"] #[inline(always)] - pub fn threeframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::THREEFRAMES) + pub fn threeframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Threeframes) } #[doc = "FOURFRAMES"] #[inline(always)] - pub fn fourframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::FOURFRAMES) + pub fn fourframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Fourframes) } #[doc = "FIVEFRAMES"] #[inline(always)] - pub fn fiveframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::FIVEFRAMES) + pub fn fiveframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Fiveframes) } #[doc = "SIXFRAMES"] #[inline(always)] - pub fn sixframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::SIXFRAMES) + pub fn sixframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Sixframes) } #[doc = "SEVENFRAMES"] #[inline(always)] - pub fn sevenframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::SEVENFRAMES) + pub fn sevenframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Sevenframes) } } #[doc = "Field `SFUBRX` reader - Start Frame Unblock Receiver"] -pub type SFUBRX_R = crate::BitReader; +pub type SfubrxR = crate::BitReader; #[doc = "Field `SFUBRX` writer - Start Frame Unblock Receiver"] -pub type SFUBRX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, bool, O>; +pub type SfubrxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXPRSEN` reader - PRS RX Enable"] -pub type RXPRSEN_R = crate::BitReader; +pub type RxprsenR = crate::BitReader; #[doc = "Field `RXPRSEN` writer - PRS RX Enable"] -pub type RXPRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, bool, O>; -#[doc = "Field `TXFIW` reader - TX FIFO Interrupt Watermark"] -pub type TXFIW_R = crate::FieldReader; +pub type RxprsenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "TX FIFO Interrupt Watermark\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TXFIW_A { +pub enum Txfiw { #[doc = "0: TXFL status flag and IF are set when the TX FIFO has space for at least one more frame."] - ONEFRAME = 0, + Oneframe = 0, #[doc = "1: TXFL status flag and IF are set when the TX FIFO has space for at least two more frames."] - TWOFRAMES = 1, + Twoframes = 1, #[doc = "2: TXFL status flag and IF are set when the TX FIFO has space for at least three more frames."] - THREEFRAMES = 2, + Threeframes = 2, #[doc = "3: TXFL status flag and IF are set when the TX FIFO has space for at least four more frames."] - FOURFRAMES = 3, + Fourframes = 3, #[doc = "4: TXFL status flag and IF are set when the TX FIFO has space for at least five more frames."] - FIVEFRAMES = 4, + Fiveframes = 4, #[doc = "5: TXFL status flag and IF are set when the TX FIFO has space for at least six more frames."] - SIXFRAMES = 5, + Sixframes = 5, #[doc = "6: TXFL status flag and IF are set when the TX FIFO has space for at least seven more frames."] - SEVENFRAMES = 6, + Sevenframes = 6, #[doc = "7: TXFL status flag and IF are set when the TX FIFO has space for at least eight more frames."] - EIGHTFRAMES = 7, + Eightframes = 7, #[doc = "8: TXFL status flag and IF are set when the TX FIFO has space for at least nine more frames."] - NINEFRAMES = 8, + Nineframes = 8, #[doc = "9: TXFL status flag and IF are set when the TX FIFO has space for at least ten more frames."] - TENFRAMES = 9, + Tenframes = 9, #[doc = "10: TXFL status flag and IF are set when the TX FIFO has space for at least eleven more frames."] - ELEVENFRAMES = 10, + Elevenframes = 10, #[doc = "11: TXFL status flag and IF are set when the TX FIFO has space for at least twelve more frames."] - TWELVEFRAMES = 11, + Twelveframes = 11, #[doc = "12: TXFL status flag and IF are set when the TX FIFO has space for at least thriteen more frames."] - THIRTEENFRAMES = 12, + Thirteenframes = 12, #[doc = "13: TXFL status flag and IF are set when the TX FIFO has space for at least fourteen more frames."] - FOURTEENFRAMES = 13, + Fourteenframes = 13, #[doc = "14: TXFL status flag and IF are set when the TX FIFO has space for at least fifteen more frames."] - FIFTEENFRAMES = 14, + Fifteenframes = 14, #[doc = "15: TXFL status flag and IF are set when the TX FIFO has space for at least sixteen more frames."] - SIXTEENFRAMES = 15, + Sixteenframes = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TXFIW_A) -> Self { + fn from(variant: Txfiw) -> Self { variant as _ } } -impl TXFIW_R { +impl crate::FieldSpec for Txfiw { + type Ux = u8; +} +impl crate::IsEnum for Txfiw {} +#[doc = "Field `TXFIW` reader - TX FIFO Interrupt Watermark"] +pub type TxfiwR = crate::FieldReader; +impl TxfiwR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXFIW_A { + pub const fn variant(&self) -> Txfiw { match self.bits { - 0 => TXFIW_A::ONEFRAME, - 1 => TXFIW_A::TWOFRAMES, - 2 => TXFIW_A::THREEFRAMES, - 3 => TXFIW_A::FOURFRAMES, - 4 => TXFIW_A::FIVEFRAMES, - 5 => TXFIW_A::SIXFRAMES, - 6 => TXFIW_A::SEVENFRAMES, - 7 => TXFIW_A::EIGHTFRAMES, - 8 => TXFIW_A::NINEFRAMES, - 9 => TXFIW_A::TENFRAMES, - 10 => TXFIW_A::ELEVENFRAMES, - 11 => TXFIW_A::TWELVEFRAMES, - 12 => TXFIW_A::THIRTEENFRAMES, - 13 => TXFIW_A::FOURTEENFRAMES, - 14 => TXFIW_A::FIFTEENFRAMES, - 15 => TXFIW_A::SIXTEENFRAMES, + 0 => Txfiw::Oneframe, + 1 => Txfiw::Twoframes, + 2 => Txfiw::Threeframes, + 3 => Txfiw::Fourframes, + 4 => Txfiw::Fiveframes, + 5 => Txfiw::Sixframes, + 6 => Txfiw::Sevenframes, + 7 => Txfiw::Eightframes, + 8 => Txfiw::Nineframes, + 9 => Txfiw::Tenframes, + 10 => Txfiw::Elevenframes, + 11 => Txfiw::Twelveframes, + 12 => Txfiw::Thirteenframes, + 13 => Txfiw::Fourteenframes, + 14 => Txfiw::Fifteenframes, + 15 => Txfiw::Sixteenframes, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONEFRAME`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least one more frame."] #[inline(always)] pub fn is_oneframe(&self) -> bool { - *self == TXFIW_A::ONEFRAME + *self == Txfiw::Oneframe } - #[doc = "Checks if the value of the field is `TWOFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least two more frames."] #[inline(always)] pub fn is_twoframes(&self) -> bool { - *self == TXFIW_A::TWOFRAMES + *self == Txfiw::Twoframes } - #[doc = "Checks if the value of the field is `THREEFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least three more frames."] #[inline(always)] pub fn is_threeframes(&self) -> bool { - *self == TXFIW_A::THREEFRAMES + *self == Txfiw::Threeframes } - #[doc = "Checks if the value of the field is `FOURFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least four more frames."] #[inline(always)] pub fn is_fourframes(&self) -> bool { - *self == TXFIW_A::FOURFRAMES + *self == Txfiw::Fourframes } - #[doc = "Checks if the value of the field is `FIVEFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least five more frames."] #[inline(always)] pub fn is_fiveframes(&self) -> bool { - *self == TXFIW_A::FIVEFRAMES + *self == Txfiw::Fiveframes } - #[doc = "Checks if the value of the field is `SIXFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least six more frames."] #[inline(always)] pub fn is_sixframes(&self) -> bool { - *self == TXFIW_A::SIXFRAMES + *self == Txfiw::Sixframes } - #[doc = "Checks if the value of the field is `SEVENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least seven more frames."] #[inline(always)] pub fn is_sevenframes(&self) -> bool { - *self == TXFIW_A::SEVENFRAMES + *self == Txfiw::Sevenframes } - #[doc = "Checks if the value of the field is `EIGHTFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least eight more frames."] #[inline(always)] pub fn is_eightframes(&self) -> bool { - *self == TXFIW_A::EIGHTFRAMES + *self == Txfiw::Eightframes } - #[doc = "Checks if the value of the field is `NINEFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least nine more frames."] #[inline(always)] pub fn is_nineframes(&self) -> bool { - *self == TXFIW_A::NINEFRAMES + *self == Txfiw::Nineframes } - #[doc = "Checks if the value of the field is `TENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least ten more frames."] #[inline(always)] pub fn is_tenframes(&self) -> bool { - *self == TXFIW_A::TENFRAMES + *self == Txfiw::Tenframes } - #[doc = "Checks if the value of the field is `ELEVENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least eleven more frames."] #[inline(always)] pub fn is_elevenframes(&self) -> bool { - *self == TXFIW_A::ELEVENFRAMES + *self == Txfiw::Elevenframes } - #[doc = "Checks if the value of the field is `TWELVEFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least twelve more frames."] #[inline(always)] pub fn is_twelveframes(&self) -> bool { - *self == TXFIW_A::TWELVEFRAMES + *self == Txfiw::Twelveframes } - #[doc = "Checks if the value of the field is `THIRTEENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least thriteen more frames."] #[inline(always)] pub fn is_thirteenframes(&self) -> bool { - *self == TXFIW_A::THIRTEENFRAMES + *self == Txfiw::Thirteenframes } - #[doc = "Checks if the value of the field is `FOURTEENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least fourteen more frames."] #[inline(always)] pub fn is_fourteenframes(&self) -> bool { - *self == TXFIW_A::FOURTEENFRAMES + *self == Txfiw::Fourteenframes } - #[doc = "Checks if the value of the field is `FIFTEENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least fifteen more frames."] #[inline(always)] pub fn is_fifteenframes(&self) -> bool { - *self == TXFIW_A::FIFTEENFRAMES + *self == Txfiw::Fifteenframes } - #[doc = "Checks if the value of the field is `SIXTEENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least sixteen more frames."] #[inline(always)] pub fn is_sixteenframes(&self) -> bool { - *self == TXFIW_A::SIXTEENFRAMES + *self == Txfiw::Sixteenframes } } #[doc = "Field `TXFIW` writer - TX FIFO Interrupt Watermark"] -pub type TXFIW_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG1_SPEC, u8, TXFIW_A, 4, O>; -impl<'a, const O: u8> TXFIW_W<'a, O> { +pub type TxfiwW<'a, REG> = crate::FieldWriter<'a, REG, 4, Txfiw, crate::Safe>; +impl<'a, REG> TxfiwW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least one more frame."] #[inline(always)] - pub fn oneframe(self) -> &'a mut W { - self.variant(TXFIW_A::ONEFRAME) + pub fn oneframe(self) -> &'a mut crate::W { + self.variant(Txfiw::Oneframe) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least two more frames."] #[inline(always)] - pub fn twoframes(self) -> &'a mut W { - self.variant(TXFIW_A::TWOFRAMES) + pub fn twoframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Twoframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least three more frames."] #[inline(always)] - pub fn threeframes(self) -> &'a mut W { - self.variant(TXFIW_A::THREEFRAMES) + pub fn threeframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Threeframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least four more frames."] #[inline(always)] - pub fn fourframes(self) -> &'a mut W { - self.variant(TXFIW_A::FOURFRAMES) + pub fn fourframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Fourframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least five more frames."] #[inline(always)] - pub fn fiveframes(self) -> &'a mut W { - self.variant(TXFIW_A::FIVEFRAMES) + pub fn fiveframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Fiveframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least six more frames."] #[inline(always)] - pub fn sixframes(self) -> &'a mut W { - self.variant(TXFIW_A::SIXFRAMES) + pub fn sixframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Sixframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least seven more frames."] #[inline(always)] - pub fn sevenframes(self) -> &'a mut W { - self.variant(TXFIW_A::SEVENFRAMES) + pub fn sevenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Sevenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least eight more frames."] #[inline(always)] - pub fn eightframes(self) -> &'a mut W { - self.variant(TXFIW_A::EIGHTFRAMES) + pub fn eightframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Eightframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least nine more frames."] #[inline(always)] - pub fn nineframes(self) -> &'a mut W { - self.variant(TXFIW_A::NINEFRAMES) + pub fn nineframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Nineframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least ten more frames."] #[inline(always)] - pub fn tenframes(self) -> &'a mut W { - self.variant(TXFIW_A::TENFRAMES) + pub fn tenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Tenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least eleven more frames."] #[inline(always)] - pub fn elevenframes(self) -> &'a mut W { - self.variant(TXFIW_A::ELEVENFRAMES) + pub fn elevenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Elevenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least twelve more frames."] #[inline(always)] - pub fn twelveframes(self) -> &'a mut W { - self.variant(TXFIW_A::TWELVEFRAMES) + pub fn twelveframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Twelveframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least thriteen more frames."] #[inline(always)] - pub fn thirteenframes(self) -> &'a mut W { - self.variant(TXFIW_A::THIRTEENFRAMES) + pub fn thirteenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Thirteenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least fourteen more frames."] #[inline(always)] - pub fn fourteenframes(self) -> &'a mut W { - self.variant(TXFIW_A::FOURTEENFRAMES) + pub fn fourteenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Fourteenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least fifteen more frames."] #[inline(always)] - pub fn fifteenframes(self) -> &'a mut W { - self.variant(TXFIW_A::FIFTEENFRAMES) + pub fn fifteenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Fifteenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least sixteen more frames."] #[inline(always)] - pub fn sixteenframes(self) -> &'a mut W { - self.variant(TXFIW_A::SIXTEENFRAMES) + pub fn sixteenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Sixteenframes) } } -#[doc = "Field `RTSRXFW` reader - Request-to-send RX FIFO Watermark"] -pub type RTSRXFW_R = crate::FieldReader; #[doc = "Request-to-send RX FIFO Watermark\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RTSRXFW_A { +pub enum Rtsrxfw { #[doc = "0: RTS is set if there is space for at least one more frame in the RX FIFO."] - ONEFRAME = 0, + Oneframe = 0, #[doc = "1: RTS is set if there is space for at least two more frames in the RX FIFO."] - TWOFRAMES = 1, + Twoframes = 1, #[doc = "2: RTS is set if there is space for at least three more frames in the RX FIFO."] - THREEFRAMES = 2, + Threeframes = 2, #[doc = "3: RTS is set if there is space for four more frames in the RX FIFO."] - FOURFRAMES = 3, + Fourframes = 3, #[doc = "4: RTS is set if there is space for five more frames in the RX FIFO."] - FIVEFRAMES = 4, + Fiveframes = 4, #[doc = "5: RTS is set if there is space for six more frames in the RX FIFO."] - SIXFRAMES = 5, + Sixframes = 5, #[doc = "6: RTS is set if there is space for seven more frames in the RX FIFO."] - SEVENFRAMES = 6, + Sevenframes = 6, #[doc = "7: RTS is set if there is space for eight more frames in the RX FIFO."] - EIGHTFRAMES = 7, + Eightframes = 7, #[doc = "8: RTS is set if there is space for nine more frames in the RX FIFO."] - NINEFRAMES = 8, + Nineframes = 8, #[doc = "9: RTS is set if there is space for ten more frames in the RX FIFO."] - TENFRAMES = 9, + Tenframes = 9, #[doc = "10: RTS is set if there is space for eleven more frames in the RX FIFO."] - ELEVENFRAMES = 10, + Elevenframes = 10, #[doc = "11: RTS is set if there is space for twelve more frames in the RX FIFO."] - TWELVEFRAMES = 11, + Twelveframes = 11, #[doc = "12: RTS is set if there is space for thirteen more frames in the RX FIFO."] - THIRTEENFRAMES = 12, + Thirteenframes = 12, #[doc = "13: RTS is set if there is space for fourteen more frames in the RX FIFO."] - FOURTEENFRAMES = 13, + Fourteenframes = 13, #[doc = "14: RTS is set if there is space for fifteen more frames in the RX FIFO."] - FIFTEENFRAMES = 14, + Fifteenframes = 14, #[doc = "15: RTS is set if there is space for sixteen more frames in the RX FIFO."] - SIXTEENFRAMES = 15, + Sixteenframes = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RTSRXFW_A) -> Self { + fn from(variant: Rtsrxfw) -> Self { variant as _ } } -impl RTSRXFW_R { +impl crate::FieldSpec for Rtsrxfw { + type Ux = u8; +} +impl crate::IsEnum for Rtsrxfw {} +#[doc = "Field `RTSRXFW` reader - Request-to-send RX FIFO Watermark"] +pub type RtsrxfwR = crate::FieldReader; +impl RtsrxfwR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RTSRXFW_A { + pub const fn variant(&self) -> Rtsrxfw { match self.bits { - 0 => RTSRXFW_A::ONEFRAME, - 1 => RTSRXFW_A::TWOFRAMES, - 2 => RTSRXFW_A::THREEFRAMES, - 3 => RTSRXFW_A::FOURFRAMES, - 4 => RTSRXFW_A::FIVEFRAMES, - 5 => RTSRXFW_A::SIXFRAMES, - 6 => RTSRXFW_A::SEVENFRAMES, - 7 => RTSRXFW_A::EIGHTFRAMES, - 8 => RTSRXFW_A::NINEFRAMES, - 9 => RTSRXFW_A::TENFRAMES, - 10 => RTSRXFW_A::ELEVENFRAMES, - 11 => RTSRXFW_A::TWELVEFRAMES, - 12 => RTSRXFW_A::THIRTEENFRAMES, - 13 => RTSRXFW_A::FOURTEENFRAMES, - 14 => RTSRXFW_A::FIFTEENFRAMES, - 15 => RTSRXFW_A::SIXTEENFRAMES, + 0 => Rtsrxfw::Oneframe, + 1 => Rtsrxfw::Twoframes, + 2 => Rtsrxfw::Threeframes, + 3 => Rtsrxfw::Fourframes, + 4 => Rtsrxfw::Fiveframes, + 5 => Rtsrxfw::Sixframes, + 6 => Rtsrxfw::Sevenframes, + 7 => Rtsrxfw::Eightframes, + 8 => Rtsrxfw::Nineframes, + 9 => Rtsrxfw::Tenframes, + 10 => Rtsrxfw::Elevenframes, + 11 => Rtsrxfw::Twelveframes, + 12 => Rtsrxfw::Thirteenframes, + 13 => Rtsrxfw::Fourteenframes, + 14 => Rtsrxfw::Fifteenframes, + 15 => Rtsrxfw::Sixteenframes, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONEFRAME`"] + #[doc = "RTS is set if there is space for at least one more frame in the RX FIFO."] #[inline(always)] pub fn is_oneframe(&self) -> bool { - *self == RTSRXFW_A::ONEFRAME + *self == Rtsrxfw::Oneframe } - #[doc = "Checks if the value of the field is `TWOFRAMES`"] + #[doc = "RTS is set if there is space for at least two more frames in the RX FIFO."] #[inline(always)] pub fn is_twoframes(&self) -> bool { - *self == RTSRXFW_A::TWOFRAMES + *self == Rtsrxfw::Twoframes } - #[doc = "Checks if the value of the field is `THREEFRAMES`"] + #[doc = "RTS is set if there is space for at least three more frames in the RX FIFO."] #[inline(always)] pub fn is_threeframes(&self) -> bool { - *self == RTSRXFW_A::THREEFRAMES + *self == Rtsrxfw::Threeframes } - #[doc = "Checks if the value of the field is `FOURFRAMES`"] + #[doc = "RTS is set if there is space for four more frames in the RX FIFO."] #[inline(always)] pub fn is_fourframes(&self) -> bool { - *self == RTSRXFW_A::FOURFRAMES + *self == Rtsrxfw::Fourframes } - #[doc = "Checks if the value of the field is `FIVEFRAMES`"] + #[doc = "RTS is set if there is space for five more frames in the RX FIFO."] #[inline(always)] pub fn is_fiveframes(&self) -> bool { - *self == RTSRXFW_A::FIVEFRAMES + *self == Rtsrxfw::Fiveframes } - #[doc = "Checks if the value of the field is `SIXFRAMES`"] + #[doc = "RTS is set if there is space for six more frames in the RX FIFO."] #[inline(always)] pub fn is_sixframes(&self) -> bool { - *self == RTSRXFW_A::SIXFRAMES + *self == Rtsrxfw::Sixframes } - #[doc = "Checks if the value of the field is `SEVENFRAMES`"] + #[doc = "RTS is set if there is space for seven more frames in the RX FIFO."] #[inline(always)] pub fn is_sevenframes(&self) -> bool { - *self == RTSRXFW_A::SEVENFRAMES + *self == Rtsrxfw::Sevenframes } - #[doc = "Checks if the value of the field is `EIGHTFRAMES`"] + #[doc = "RTS is set if there is space for eight more frames in the RX FIFO."] #[inline(always)] pub fn is_eightframes(&self) -> bool { - *self == RTSRXFW_A::EIGHTFRAMES + *self == Rtsrxfw::Eightframes } - #[doc = "Checks if the value of the field is `NINEFRAMES`"] + #[doc = "RTS is set if there is space for nine more frames in the RX FIFO."] #[inline(always)] pub fn is_nineframes(&self) -> bool { - *self == RTSRXFW_A::NINEFRAMES + *self == Rtsrxfw::Nineframes } - #[doc = "Checks if the value of the field is `TENFRAMES`"] + #[doc = "RTS is set if there is space for ten more frames in the RX FIFO."] #[inline(always)] pub fn is_tenframes(&self) -> bool { - *self == RTSRXFW_A::TENFRAMES + *self == Rtsrxfw::Tenframes } - #[doc = "Checks if the value of the field is `ELEVENFRAMES`"] + #[doc = "RTS is set if there is space for eleven more frames in the RX FIFO."] #[inline(always)] pub fn is_elevenframes(&self) -> bool { - *self == RTSRXFW_A::ELEVENFRAMES + *self == Rtsrxfw::Elevenframes } - #[doc = "Checks if the value of the field is `TWELVEFRAMES`"] + #[doc = "RTS is set if there is space for twelve more frames in the RX FIFO."] #[inline(always)] pub fn is_twelveframes(&self) -> bool { - *self == RTSRXFW_A::TWELVEFRAMES + *self == Rtsrxfw::Twelveframes } - #[doc = "Checks if the value of the field is `THIRTEENFRAMES`"] + #[doc = "RTS is set if there is space for thirteen more frames in the RX FIFO."] #[inline(always)] pub fn is_thirteenframes(&self) -> bool { - *self == RTSRXFW_A::THIRTEENFRAMES + *self == Rtsrxfw::Thirteenframes } - #[doc = "Checks if the value of the field is `FOURTEENFRAMES`"] + #[doc = "RTS is set if there is space for fourteen more frames in the RX FIFO."] #[inline(always)] pub fn is_fourteenframes(&self) -> bool { - *self == RTSRXFW_A::FOURTEENFRAMES + *self == Rtsrxfw::Fourteenframes } - #[doc = "Checks if the value of the field is `FIFTEENFRAMES`"] + #[doc = "RTS is set if there is space for fifteen more frames in the RX FIFO."] #[inline(always)] pub fn is_fifteenframes(&self) -> bool { - *self == RTSRXFW_A::FIFTEENFRAMES + *self == Rtsrxfw::Fifteenframes } - #[doc = "Checks if the value of the field is `SIXTEENFRAMES`"] + #[doc = "RTS is set if there is space for sixteen more frames in the RX FIFO."] #[inline(always)] pub fn is_sixteenframes(&self) -> bool { - *self == RTSRXFW_A::SIXTEENFRAMES + *self == Rtsrxfw::Sixteenframes } } #[doc = "Field `RTSRXFW` writer - Request-to-send RX FIFO Watermark"] -pub type RTSRXFW_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CFG1_SPEC, u8, RTSRXFW_A, 4, O>; -impl<'a, const O: u8> RTSRXFW_W<'a, O> { +pub type RtsrxfwW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rtsrxfw, crate::Safe>; +impl<'a, REG> RtsrxfwW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "RTS is set if there is space for at least one more frame in the RX FIFO."] #[inline(always)] - pub fn oneframe(self) -> &'a mut W { - self.variant(RTSRXFW_A::ONEFRAME) + pub fn oneframe(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Oneframe) } #[doc = "RTS is set if there is space for at least two more frames in the RX FIFO."] #[inline(always)] - pub fn twoframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::TWOFRAMES) + pub fn twoframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Twoframes) } #[doc = "RTS is set if there is space for at least three more frames in the RX FIFO."] #[inline(always)] - pub fn threeframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::THREEFRAMES) + pub fn threeframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Threeframes) } #[doc = "RTS is set if there is space for four more frames in the RX FIFO."] #[inline(always)] - pub fn fourframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::FOURFRAMES) + pub fn fourframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Fourframes) } #[doc = "RTS is set if there is space for five more frames in the RX FIFO."] #[inline(always)] - pub fn fiveframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::FIVEFRAMES) + pub fn fiveframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Fiveframes) } #[doc = "RTS is set if there is space for six more frames in the RX FIFO."] #[inline(always)] - pub fn sixframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::SIXFRAMES) + pub fn sixframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Sixframes) } #[doc = "RTS is set if there is space for seven more frames in the RX FIFO."] #[inline(always)] - pub fn sevenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::SEVENFRAMES) + pub fn sevenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Sevenframes) } #[doc = "RTS is set if there is space for eight more frames in the RX FIFO."] #[inline(always)] - pub fn eightframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::EIGHTFRAMES) + pub fn eightframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Eightframes) } #[doc = "RTS is set if there is space for nine more frames in the RX FIFO."] #[inline(always)] - pub fn nineframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::NINEFRAMES) + pub fn nineframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Nineframes) } #[doc = "RTS is set if there is space for ten more frames in the RX FIFO."] #[inline(always)] - pub fn tenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::TENFRAMES) + pub fn tenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Tenframes) } #[doc = "RTS is set if there is space for eleven more frames in the RX FIFO."] #[inline(always)] - pub fn elevenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::ELEVENFRAMES) + pub fn elevenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Elevenframes) } #[doc = "RTS is set if there is space for twelve more frames in the RX FIFO."] #[inline(always)] - pub fn twelveframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::TWELVEFRAMES) + pub fn twelveframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Twelveframes) } #[doc = "RTS is set if there is space for thirteen more frames in the RX FIFO."] #[inline(always)] - pub fn thirteenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::THIRTEENFRAMES) + pub fn thirteenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Thirteenframes) } #[doc = "RTS is set if there is space for fourteen more frames in the RX FIFO."] #[inline(always)] - pub fn fourteenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::FOURTEENFRAMES) + pub fn fourteenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Fourteenframes) } #[doc = "RTS is set if there is space for fifteen more frames in the RX FIFO."] #[inline(always)] - pub fn fifteenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::FIFTEENFRAMES) + pub fn fifteenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Fifteenframes) } #[doc = "RTS is set if there is space for sixteen more frames in the RX FIFO."] #[inline(always)] - pub fn sixteenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::SIXTEENFRAMES) + pub fn sixteenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Sixteenframes) } } -#[doc = "Field `RXFIW` reader - RX FIFO Interrupt Watermark"] -pub type RXFIW_R = crate::FieldReader; #[doc = "RX FIFO Interrupt Watermark\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RXFIW_A { +pub enum Rxfiw { #[doc = "0: RXFL status flag and IF are set when the RX FIFO has at least one frame in it."] - ONEFRAME = 0, + Oneframe = 0, #[doc = "1: RXFL status flag and IF are set when the RX FIFO has at least two frames in it."] - TWOFRAMES = 1, + Twoframes = 1, #[doc = "2: RXFL status flag and IF are set when the RX FIFO has at least three frames in it."] - THREEFRAMES = 2, + Threeframes = 2, #[doc = "3: RXFL status flag and IF are set when the RX FIFO has at least four frames in it."] - FOURFRAMES = 3, + Fourframes = 3, #[doc = "4: RXFL status flag and IF are set when the RX FIFO has at least five frames in it."] - FIVEFRAMES = 4, + Fiveframes = 4, #[doc = "5: RXFL status flag and IF are set when the RX FIFO has at least six frames in it."] - SIXFRAMES = 5, + Sixframes = 5, #[doc = "6: RXFL status flag and IF are set when the RX FIFO has at least seven frames in it."] - SEVENFRAMES = 6, + Sevenframes = 6, #[doc = "7: RXFL status flag and IF are set when the RX FIFO has at least eight frames in it."] - EIGHTFRAMES = 7, + Eightframes = 7, #[doc = "8: RXFL status flag and IF are set when the RX FIFO has at least nine frames in it."] - NINEFRAMES = 8, + Nineframes = 8, #[doc = "9: RXFL status flag and IF are set when the RX FIFO has at least ten frames in it."] - TENFRAMES = 9, + Tenframes = 9, #[doc = "10: RXFL status flag and IF are set when the RX FIFO has at least eleven frames in it."] - ELEVENFRAMES = 10, + Elevenframes = 10, #[doc = "11: RXFL status flag and IF are set when the RX FIFO has at least twelve frames in it."] - TWELVEFRAMES = 11, + Twelveframes = 11, #[doc = "12: RXFL status flag and IF are set when the RX FIFO has at least thriteen frames in it."] - THIRTEENFRAMES = 12, + Thirteenframes = 12, #[doc = "13: RXFL status flag and IF are set when the RX FIFO has at least fourteen frames in it."] - FOURTEENFRAMES = 13, + Fourteenframes = 13, #[doc = "14: RXFL status flag and IF are set when the RX FIFO has at least fifteen frames in it."] - FIFTEENFRAMES = 14, + Fifteenframes = 14, #[doc = "15: RXFL status flag and IF are set when the RX FIFO has at least sixteen frames in it."] - SIXTEENFRAMES = 15, + Sixteenframes = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RXFIW_A) -> Self { + fn from(variant: Rxfiw) -> Self { variant as _ } } -impl RXFIW_R { +impl crate::FieldSpec for Rxfiw { + type Ux = u8; +} +impl crate::IsEnum for Rxfiw {} +#[doc = "Field `RXFIW` reader - RX FIFO Interrupt Watermark"] +pub type RxfiwR = crate::FieldReader; +impl RxfiwR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RXFIW_A { + pub const fn variant(&self) -> Rxfiw { match self.bits { - 0 => RXFIW_A::ONEFRAME, - 1 => RXFIW_A::TWOFRAMES, - 2 => RXFIW_A::THREEFRAMES, - 3 => RXFIW_A::FOURFRAMES, - 4 => RXFIW_A::FIVEFRAMES, - 5 => RXFIW_A::SIXFRAMES, - 6 => RXFIW_A::SEVENFRAMES, - 7 => RXFIW_A::EIGHTFRAMES, - 8 => RXFIW_A::NINEFRAMES, - 9 => RXFIW_A::TENFRAMES, - 10 => RXFIW_A::ELEVENFRAMES, - 11 => RXFIW_A::TWELVEFRAMES, - 12 => RXFIW_A::THIRTEENFRAMES, - 13 => RXFIW_A::FOURTEENFRAMES, - 14 => RXFIW_A::FIFTEENFRAMES, - 15 => RXFIW_A::SIXTEENFRAMES, + 0 => Rxfiw::Oneframe, + 1 => Rxfiw::Twoframes, + 2 => Rxfiw::Threeframes, + 3 => Rxfiw::Fourframes, + 4 => Rxfiw::Fiveframes, + 5 => Rxfiw::Sixframes, + 6 => Rxfiw::Sevenframes, + 7 => Rxfiw::Eightframes, + 8 => Rxfiw::Nineframes, + 9 => Rxfiw::Tenframes, + 10 => Rxfiw::Elevenframes, + 11 => Rxfiw::Twelveframes, + 12 => Rxfiw::Thirteenframes, + 13 => Rxfiw::Fourteenframes, + 14 => Rxfiw::Fifteenframes, + 15 => Rxfiw::Sixteenframes, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONEFRAME`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least one frame in it."] #[inline(always)] pub fn is_oneframe(&self) -> bool { - *self == RXFIW_A::ONEFRAME + *self == Rxfiw::Oneframe } - #[doc = "Checks if the value of the field is `TWOFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least two frames in it."] #[inline(always)] pub fn is_twoframes(&self) -> bool { - *self == RXFIW_A::TWOFRAMES + *self == Rxfiw::Twoframes } - #[doc = "Checks if the value of the field is `THREEFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least three frames in it."] #[inline(always)] pub fn is_threeframes(&self) -> bool { - *self == RXFIW_A::THREEFRAMES + *self == Rxfiw::Threeframes } - #[doc = "Checks if the value of the field is `FOURFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least four frames in it."] #[inline(always)] pub fn is_fourframes(&self) -> bool { - *self == RXFIW_A::FOURFRAMES + *self == Rxfiw::Fourframes } - #[doc = "Checks if the value of the field is `FIVEFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least five frames in it."] #[inline(always)] pub fn is_fiveframes(&self) -> bool { - *self == RXFIW_A::FIVEFRAMES + *self == Rxfiw::Fiveframes } - #[doc = "Checks if the value of the field is `SIXFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least six frames in it."] #[inline(always)] pub fn is_sixframes(&self) -> bool { - *self == RXFIW_A::SIXFRAMES + *self == Rxfiw::Sixframes } - #[doc = "Checks if the value of the field is `SEVENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least seven frames in it."] #[inline(always)] pub fn is_sevenframes(&self) -> bool { - *self == RXFIW_A::SEVENFRAMES + *self == Rxfiw::Sevenframes } - #[doc = "Checks if the value of the field is `EIGHTFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least eight frames in it."] #[inline(always)] pub fn is_eightframes(&self) -> bool { - *self == RXFIW_A::EIGHTFRAMES + *self == Rxfiw::Eightframes } - #[doc = "Checks if the value of the field is `NINEFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least nine frames in it."] #[inline(always)] pub fn is_nineframes(&self) -> bool { - *self == RXFIW_A::NINEFRAMES + *self == Rxfiw::Nineframes } - #[doc = "Checks if the value of the field is `TENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least ten frames in it."] #[inline(always)] pub fn is_tenframes(&self) -> bool { - *self == RXFIW_A::TENFRAMES + *self == Rxfiw::Tenframes } - #[doc = "Checks if the value of the field is `ELEVENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least eleven frames in it."] #[inline(always)] pub fn is_elevenframes(&self) -> bool { - *self == RXFIW_A::ELEVENFRAMES + *self == Rxfiw::Elevenframes } - #[doc = "Checks if the value of the field is `TWELVEFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least twelve frames in it."] #[inline(always)] pub fn is_twelveframes(&self) -> bool { - *self == RXFIW_A::TWELVEFRAMES + *self == Rxfiw::Twelveframes } - #[doc = "Checks if the value of the field is `THIRTEENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least thriteen frames in it."] #[inline(always)] pub fn is_thirteenframes(&self) -> bool { - *self == RXFIW_A::THIRTEENFRAMES + *self == Rxfiw::Thirteenframes } - #[doc = "Checks if the value of the field is `FOURTEENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least fourteen frames in it."] #[inline(always)] pub fn is_fourteenframes(&self) -> bool { - *self == RXFIW_A::FOURTEENFRAMES + *self == Rxfiw::Fourteenframes } - #[doc = "Checks if the value of the field is `FIFTEENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least fifteen frames in it."] #[inline(always)] pub fn is_fifteenframes(&self) -> bool { - *self == RXFIW_A::FIFTEENFRAMES + *self == Rxfiw::Fifteenframes } - #[doc = "Checks if the value of the field is `SIXTEENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least sixteen frames in it."] #[inline(always)] pub fn is_sixteenframes(&self) -> bool { - *self == RXFIW_A::SIXTEENFRAMES + *self == Rxfiw::Sixteenframes } } #[doc = "Field `RXFIW` writer - RX FIFO Interrupt Watermark"] -pub type RXFIW_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG1_SPEC, u8, RXFIW_A, 4, O>; -impl<'a, const O: u8> RXFIW_W<'a, O> { +pub type RxfiwW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rxfiw, crate::Safe>; +impl<'a, REG> RxfiwW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "RXFL status flag and IF are set when the RX FIFO has at least one frame in it."] #[inline(always)] - pub fn oneframe(self) -> &'a mut W { - self.variant(RXFIW_A::ONEFRAME) + pub fn oneframe(self) -> &'a mut crate::W { + self.variant(Rxfiw::Oneframe) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least two frames in it."] #[inline(always)] - pub fn twoframes(self) -> &'a mut W { - self.variant(RXFIW_A::TWOFRAMES) + pub fn twoframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Twoframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least three frames in it."] #[inline(always)] - pub fn threeframes(self) -> &'a mut W { - self.variant(RXFIW_A::THREEFRAMES) + pub fn threeframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Threeframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least four frames in it."] #[inline(always)] - pub fn fourframes(self) -> &'a mut W { - self.variant(RXFIW_A::FOURFRAMES) + pub fn fourframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Fourframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least five frames in it."] #[inline(always)] - pub fn fiveframes(self) -> &'a mut W { - self.variant(RXFIW_A::FIVEFRAMES) + pub fn fiveframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Fiveframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least six frames in it."] #[inline(always)] - pub fn sixframes(self) -> &'a mut W { - self.variant(RXFIW_A::SIXFRAMES) + pub fn sixframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Sixframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least seven frames in it."] #[inline(always)] - pub fn sevenframes(self) -> &'a mut W { - self.variant(RXFIW_A::SEVENFRAMES) + pub fn sevenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Sevenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least eight frames in it."] #[inline(always)] - pub fn eightframes(self) -> &'a mut W { - self.variant(RXFIW_A::EIGHTFRAMES) + pub fn eightframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Eightframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least nine frames in it."] #[inline(always)] - pub fn nineframes(self) -> &'a mut W { - self.variant(RXFIW_A::NINEFRAMES) + pub fn nineframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Nineframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least ten frames in it."] #[inline(always)] - pub fn tenframes(self) -> &'a mut W { - self.variant(RXFIW_A::TENFRAMES) + pub fn tenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Tenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least eleven frames in it."] #[inline(always)] - pub fn elevenframes(self) -> &'a mut W { - self.variant(RXFIW_A::ELEVENFRAMES) + pub fn elevenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Elevenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least twelve frames in it."] #[inline(always)] - pub fn twelveframes(self) -> &'a mut W { - self.variant(RXFIW_A::TWELVEFRAMES) + pub fn twelveframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Twelveframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least thriteen frames in it."] #[inline(always)] - pub fn thirteenframes(self) -> &'a mut W { - self.variant(RXFIW_A::THIRTEENFRAMES) + pub fn thirteenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Thirteenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least fourteen frames in it."] #[inline(always)] - pub fn fourteenframes(self) -> &'a mut W { - self.variant(RXFIW_A::FOURTEENFRAMES) + pub fn fourteenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Fourteenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least fifteen frames in it."] #[inline(always)] - pub fn fifteenframes(self) -> &'a mut W { - self.variant(RXFIW_A::FIFTEENFRAMES) + pub fn fifteenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Fifteenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least sixteen frames in it."] #[inline(always)] - pub fn sixteenframes(self) -> &'a mut W { - self.variant(RXFIW_A::SIXTEENFRAMES) + pub fn sixteenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Sixteenframes) } } impl R { #[doc = "Bit 0 - Debug halt"] #[inline(always)] - pub fn dbghalt(&self) -> DBGHALT_R { - DBGHALT_R::new((self.bits & 1) != 0) + pub fn dbghalt(&self) -> DbghaltR { + DbghaltR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Clear-to-send Invert Enable"] #[inline(always)] - pub fn ctsinv(&self) -> CTSINV_R { - CTSINV_R::new(((self.bits >> 1) & 1) != 0) + pub fn ctsinv(&self) -> CtsinvR { + CtsinvR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Clear-to-send Enable"] #[inline(always)] - pub fn ctsen(&self) -> CTSEN_R { - CTSEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn ctsen(&self) -> CtsenR { + CtsenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Request-to-send Invert Enable"] #[inline(always)] - pub fn rtsinv(&self) -> RTSINV_R { - RTSINV_R::new(((self.bits >> 3) & 1) != 0) + pub fn rtsinv(&self) -> RtsinvR { + RtsinvR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:6 - RX Timeout"] #[inline(always)] - pub fn rxtimeout(&self) -> RXTIMEOUT_R { - RXTIMEOUT_R::new(((self.bits >> 4) & 7) as u8) + pub fn rxtimeout(&self) -> RxtimeoutR { + RxtimeoutR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bit 11 - Start Frame Unblock Receiver"] #[inline(always)] - pub fn sfubrx(&self) -> SFUBRX_R { - SFUBRX_R::new(((self.bits >> 11) & 1) != 0) + pub fn sfubrx(&self) -> SfubrxR { + SfubrxR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 15 - PRS RX Enable"] #[inline(always)] - pub fn rxprsen(&self) -> RXPRSEN_R { - RXPRSEN_R::new(((self.bits >> 15) & 1) != 0) + pub fn rxprsen(&self) -> RxprsenR { + RxprsenR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:19 - TX FIFO Interrupt Watermark"] #[inline(always)] - pub fn txfiw(&self) -> TXFIW_R { - TXFIW_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn txfiw(&self) -> TxfiwR { + TxfiwR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 22:25 - Request-to-send RX FIFO Watermark"] #[inline(always)] - pub fn rtsrxfw(&self) -> RTSRXFW_R { - RTSRXFW_R::new(((self.bits >> 22) & 0x0f) as u8) + pub fn rtsrxfw(&self) -> RtsrxfwR { + RtsrxfwR::new(((self.bits >> 22) & 0x0f) as u8) } #[doc = "Bits 27:30 - RX FIFO Interrupt Watermark"] #[inline(always)] - pub fn rxfiw(&self) -> RXFIW_R { - RXFIW_R::new(((self.bits >> 27) & 0x0f) as u8) + pub fn rxfiw(&self) -> RxfiwR { + RxfiwR::new(((self.bits >> 27) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - Debug halt"] #[inline(always)] #[must_use] - pub fn dbghalt(&mut self) -> DBGHALT_W<0> { - DBGHALT_W::new(self) + pub fn dbghalt(&mut self) -> DbghaltW { + DbghaltW::new(self, 0) } #[doc = "Bit 1 - Clear-to-send Invert Enable"] #[inline(always)] #[must_use] - pub fn ctsinv(&mut self) -> CTSINV_W<1> { - CTSINV_W::new(self) + pub fn ctsinv(&mut self) -> CtsinvW { + CtsinvW::new(self, 1) } #[doc = "Bit 2 - Clear-to-send Enable"] #[inline(always)] #[must_use] - pub fn ctsen(&mut self) -> CTSEN_W<2> { - CTSEN_W::new(self) + pub fn ctsen(&mut self) -> CtsenW { + CtsenW::new(self, 2) } #[doc = "Bit 3 - Request-to-send Invert Enable"] #[inline(always)] #[must_use] - pub fn rtsinv(&mut self) -> RTSINV_W<3> { - RTSINV_W::new(self) + pub fn rtsinv(&mut self) -> RtsinvW { + RtsinvW::new(self, 3) } #[doc = "Bits 4:6 - RX Timeout"] #[inline(always)] #[must_use] - pub fn rxtimeout(&mut self) -> RXTIMEOUT_W<4> { - RXTIMEOUT_W::new(self) + pub fn rxtimeout(&mut self) -> RxtimeoutW { + RxtimeoutW::new(self, 4) } #[doc = "Bit 11 - Start Frame Unblock Receiver"] #[inline(always)] #[must_use] - pub fn sfubrx(&mut self) -> SFUBRX_W<11> { - SFUBRX_W::new(self) + pub fn sfubrx(&mut self) -> SfubrxW { + SfubrxW::new(self, 11) } #[doc = "Bit 15 - PRS RX Enable"] #[inline(always)] #[must_use] - pub fn rxprsen(&mut self) -> RXPRSEN_W<15> { - RXPRSEN_W::new(self) + pub fn rxprsen(&mut self) -> RxprsenW { + RxprsenW::new(self, 15) } #[doc = "Bits 16:19 - TX FIFO Interrupt Watermark"] #[inline(always)] #[must_use] - pub fn txfiw(&mut self) -> TXFIW_W<16> { - TXFIW_W::new(self) + pub fn txfiw(&mut self) -> TxfiwW { + TxfiwW::new(self, 16) } #[doc = "Bits 22:25 - Request-to-send RX FIFO Watermark"] #[inline(always)] #[must_use] - pub fn rtsrxfw(&mut self) -> RTSRXFW_W<22> { - RTSRXFW_W::new(self) + pub fn rtsrxfw(&mut self) -> RtsrxfwW { + RtsrxfwW::new(self, 22) } #[doc = "Bits 27:30 - RX FIFO Interrupt Watermark"] #[inline(always)] #[must_use] - pub fn rxfiw(&mut self) -> RXFIW_W<27> { - RXFIW_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rxfiw(&mut self) -> RxfiwW { + RxfiwW::new(self, 27) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg1](index.html) module"] -pub struct CFG1_SPEC; -impl crate::RegisterSpec for CFG1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cfg1Spec; +impl crate::RegisterSpec for Cfg1Spec { type Ux = u32; } -#[doc = "`read()` method returns [cfg1::R](R) reader structure"] -impl crate::Readable for CFG1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg1::W](W) writer structure"] -impl crate::Writable for CFG1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg1::R`](R) reader structure"] +impl crate::Readable for Cfg1Spec {} +#[doc = "`write(|w| ..)` method takes [`cfg1::W`](W) writer structure"] +impl crate::Writable for Cfg1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG1 to value 0"] -impl crate::Resettable for CFG1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cfg1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/cfg2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/cfg2.rs index 1f16a32..08998b3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/cfg2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/cfg2.rs @@ -1,384 +1,356 @@ #[doc = "Register `CFG2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MASTER` reader - Main mode"] -pub type MASTER_R = crate::BitReader; +pub type W = crate::W; #[doc = "Main mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MASTER_A { +pub enum Master { #[doc = "0: Secondary mode"] - SLAVE = 0, + Slave = 0, #[doc = "1: Main mode"] - MASTER = 1, + Master = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MASTER_A) -> Self { + fn from(variant: Master) -> Self { variant as u8 != 0 } } -impl MASTER_R { +#[doc = "Field `MASTER` reader - Main mode"] +pub type MasterR = crate::BitReader; +impl MasterR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MASTER_A { + pub const fn variant(&self) -> Master { match self.bits { - false => MASTER_A::SLAVE, - true => MASTER_A::MASTER, + false => Master::Slave, + true => Master::Master, } } - #[doc = "Checks if the value of the field is `SLAVE`"] + #[doc = "Secondary mode"] #[inline(always)] pub fn is_slave(&self) -> bool { - *self == MASTER_A::SLAVE + *self == Master::Slave } - #[doc = "Checks if the value of the field is `MASTER`"] + #[doc = "Main mode"] #[inline(always)] pub fn is_master(&self) -> bool { - *self == MASTER_A::MASTER + *self == Master::Master } } #[doc = "Field `MASTER` writer - Main mode"] -pub type MASTER_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, MASTER_A, O>; -impl<'a, const O: u8> MASTER_W<'a, O> { +pub type MasterW<'a, REG> = crate::BitWriter<'a, REG, Master>; +impl<'a, REG> MasterW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Secondary mode"] #[inline(always)] - pub fn slave(self) -> &'a mut W { - self.variant(MASTER_A::SLAVE) + pub fn slave(self) -> &'a mut crate::W { + self.variant(Master::Slave) } #[doc = "Main mode"] #[inline(always)] - pub fn master(self) -> &'a mut W { - self.variant(MASTER_A::MASTER) + pub fn master(self) -> &'a mut crate::W { + self.variant(Master::Master) } } -#[doc = "Field `CLKPOL` reader - Clock Polarity"] -pub type CLKPOL_R = crate::BitReader; #[doc = "Clock Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLKPOL_A { +pub enum Clkpol { #[doc = "0: The bus clock used in synchronous mode has a low base value"] - IDLELOW = 0, + Idlelow = 0, #[doc = "1: The bus clock used in synchronous mode has a high base value"] - IDLEHIGH = 1, + Idlehigh = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLKPOL_A) -> Self { + fn from(variant: Clkpol) -> Self { variant as u8 != 0 } } -impl CLKPOL_R { +#[doc = "Field `CLKPOL` reader - Clock Polarity"] +pub type ClkpolR = crate::BitReader; +impl ClkpolR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CLKPOL_A { + pub const fn variant(&self) -> Clkpol { match self.bits { - false => CLKPOL_A::IDLELOW, - true => CLKPOL_A::IDLEHIGH, + false => Clkpol::Idlelow, + true => Clkpol::Idlehigh, } } - #[doc = "Checks if the value of the field is `IDLELOW`"] + #[doc = "The bus clock used in synchronous mode has a low base value"] #[inline(always)] pub fn is_idlelow(&self) -> bool { - *self == CLKPOL_A::IDLELOW + *self == Clkpol::Idlelow } - #[doc = "Checks if the value of the field is `IDLEHIGH`"] + #[doc = "The bus clock used in synchronous mode has a high base value"] #[inline(always)] pub fn is_idlehigh(&self) -> bool { - *self == CLKPOL_A::IDLEHIGH + *self == Clkpol::Idlehigh } } #[doc = "Field `CLKPOL` writer - Clock Polarity"] -pub type CLKPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, CLKPOL_A, O>; -impl<'a, const O: u8> CLKPOL_W<'a, O> { +pub type ClkpolW<'a, REG> = crate::BitWriter<'a, REG, Clkpol>; +impl<'a, REG> ClkpolW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The bus clock used in synchronous mode has a low base value"] #[inline(always)] - pub fn idlelow(self) -> &'a mut W { - self.variant(CLKPOL_A::IDLELOW) + pub fn idlelow(self) -> &'a mut crate::W { + self.variant(Clkpol::Idlelow) } #[doc = "The bus clock used in synchronous mode has a high base value"] #[inline(always)] - pub fn idlehigh(self) -> &'a mut W { - self.variant(CLKPOL_A::IDLEHIGH) + pub fn idlehigh(self) -> &'a mut crate::W { + self.variant(Clkpol::Idlehigh) } } -#[doc = "Field `CLKPHA` reader - Clock Edge for Setup/Sample"] -pub type CLKPHA_R = crate::BitReader; #[doc = "Clock Edge for Setup/Sample\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLKPHA_A { +pub enum Clkpha { #[doc = "0: Data is sampled on the leading edge and set-up on the trailing edge of the bus clock in synchronous mode"] - SAMPLELEADING = 0, + Sampleleading = 0, #[doc = "1: Data is set-up on the leading edge and sampled on the trailing edge of the bus clock in synchronous mode"] - SAMPLETRAILING = 1, + Sampletrailing = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLKPHA_A) -> Self { + fn from(variant: Clkpha) -> Self { variant as u8 != 0 } } -impl CLKPHA_R { +#[doc = "Field `CLKPHA` reader - Clock Edge for Setup/Sample"] +pub type ClkphaR = crate::BitReader; +impl ClkphaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CLKPHA_A { + pub const fn variant(&self) -> Clkpha { match self.bits { - false => CLKPHA_A::SAMPLELEADING, - true => CLKPHA_A::SAMPLETRAILING, + false => Clkpha::Sampleleading, + true => Clkpha::Sampletrailing, } } - #[doc = "Checks if the value of the field is `SAMPLELEADING`"] + #[doc = "Data is sampled on the leading edge and set-up on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] pub fn is_sampleleading(&self) -> bool { - *self == CLKPHA_A::SAMPLELEADING + *self == Clkpha::Sampleleading } - #[doc = "Checks if the value of the field is `SAMPLETRAILING`"] + #[doc = "Data is set-up on the leading edge and sampled on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] pub fn is_sampletrailing(&self) -> bool { - *self == CLKPHA_A::SAMPLETRAILING + *self == Clkpha::Sampletrailing } } #[doc = "Field `CLKPHA` writer - Clock Edge for Setup/Sample"] -pub type CLKPHA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, CLKPHA_A, O>; -impl<'a, const O: u8> CLKPHA_W<'a, O> { +pub type ClkphaW<'a, REG> = crate::BitWriter<'a, REG, Clkpha>; +impl<'a, REG> ClkphaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Data is sampled on the leading edge and set-up on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] - pub fn sampleleading(self) -> &'a mut W { - self.variant(CLKPHA_A::SAMPLELEADING) + pub fn sampleleading(self) -> &'a mut crate::W { + self.variant(Clkpha::Sampleleading) } #[doc = "Data is set-up on the leading edge and sampled on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] - pub fn sampletrailing(self) -> &'a mut W { - self.variant(CLKPHA_A::SAMPLETRAILING) + pub fn sampletrailing(self) -> &'a mut crate::W { + self.variant(Clkpha::Sampletrailing) } } -#[doc = "Field `CSINV` reader - Chip Select Invert"] -pub type CSINV_R = crate::BitReader; #[doc = "Chip Select Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CSINV_A { +pub enum Csinv { #[doc = "0: Chip select is active low"] - AL = 0, + Al = 0, #[doc = "1: Chip select is active high"] - AH = 1, + Ah = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CSINV_A) -> Self { + fn from(variant: Csinv) -> Self { variant as u8 != 0 } } -impl CSINV_R { +#[doc = "Field `CSINV` reader - Chip Select Invert"] +pub type CsinvR = crate::BitReader; +impl CsinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CSINV_A { + pub const fn variant(&self) -> Csinv { match self.bits { - false => CSINV_A::AL, - true => CSINV_A::AH, + false => Csinv::Al, + true => Csinv::Ah, } } - #[doc = "Checks if the value of the field is `AL`"] + #[doc = "Chip select is active low"] #[inline(always)] pub fn is_al(&self) -> bool { - *self == CSINV_A::AL + *self == Csinv::Al } - #[doc = "Checks if the value of the field is `AH`"] + #[doc = "Chip select is active high"] #[inline(always)] pub fn is_ah(&self) -> bool { - *self == CSINV_A::AH + *self == Csinv::Ah } } #[doc = "Field `CSINV` writer - Chip Select Invert"] -pub type CSINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, CSINV_A, O>; -impl<'a, const O: u8> CSINV_W<'a, O> { +pub type CsinvW<'a, REG> = crate::BitWriter<'a, REG, Csinv>; +impl<'a, REG> CsinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Chip select is active low"] #[inline(always)] - pub fn al(self) -> &'a mut W { - self.variant(CSINV_A::AL) + pub fn al(self) -> &'a mut crate::W { + self.variant(Csinv::Al) } #[doc = "Chip select is active high"] #[inline(always)] - pub fn ah(self) -> &'a mut W { - self.variant(CSINV_A::AH) + pub fn ah(self) -> &'a mut crate::W { + self.variant(Csinv::Ah) } } #[doc = "Field `AUTOTX` reader - Always Transmit When RXFIFO Not Full"] -pub type AUTOTX_R = crate::BitReader; +pub type AutotxR = crate::BitReader; #[doc = "Field `AUTOTX` writer - Always Transmit When RXFIFO Not Full"] -pub type AUTOTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, bool, O>; +pub type AutotxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOCS` reader - Automatic Chip Select"] -pub type AUTOCS_R = crate::BitReader; +pub type AutocsR = crate::BitReader; #[doc = "Field `AUTOCS` writer - Automatic Chip Select"] -pub type AUTOCS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, bool, O>; +pub type AutocsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLKPRSEN` reader - PRS CLK Enable"] -pub type CLKPRSEN_R = crate::BitReader; +pub type ClkprsenR = crate::BitReader; #[doc = "Field `CLKPRSEN` writer - PRS CLK Enable"] -pub type CLKPRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, bool, O>; +pub type ClkprsenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FORCELOAD` reader - Force Load to Shift Register"] -pub type FORCELOAD_R = crate::BitReader; +pub type ForceloadR = crate::BitReader; #[doc = "Field `FORCELOAD` writer - Force Load to Shift Register"] -pub type FORCELOAD_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, bool, O>; +pub type ForceloadW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SDIV` reader - Sync Clock Div"] -pub type SDIV_R = crate::FieldReader; +pub type SdivR = crate::FieldReader; #[doc = "Field `SDIV` writer - Sync Clock Div"] -pub type SDIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG2_SPEC, u8, u8, 8, O>; +pub type SdivW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bit 0 - Main mode"] #[inline(always)] - pub fn master(&self) -> MASTER_R { - MASTER_R::new((self.bits & 1) != 0) + pub fn master(&self) -> MasterR { + MasterR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Clock Polarity"] #[inline(always)] - pub fn clkpol(&self) -> CLKPOL_R { - CLKPOL_R::new(((self.bits >> 1) & 1) != 0) + pub fn clkpol(&self) -> ClkpolR { + ClkpolR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Clock Edge for Setup/Sample"] #[inline(always)] - pub fn clkpha(&self) -> CLKPHA_R { - CLKPHA_R::new(((self.bits >> 2) & 1) != 0) + pub fn clkpha(&self) -> ClkphaR { + ClkphaR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Chip Select Invert"] #[inline(always)] - pub fn csinv(&self) -> CSINV_R { - CSINV_R::new(((self.bits >> 3) & 1) != 0) + pub fn csinv(&self) -> CsinvR { + CsinvR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Always Transmit When RXFIFO Not Full"] #[inline(always)] - pub fn autotx(&self) -> AUTOTX_R { - AUTOTX_R::new(((self.bits >> 4) & 1) != 0) + pub fn autotx(&self) -> AutotxR { + AutotxR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Automatic Chip Select"] #[inline(always)] - pub fn autocs(&self) -> AUTOCS_R { - AUTOCS_R::new(((self.bits >> 5) & 1) != 0) + pub fn autocs(&self) -> AutocsR { + AutocsR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - PRS CLK Enable"] #[inline(always)] - pub fn clkprsen(&self) -> CLKPRSEN_R { - CLKPRSEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn clkprsen(&self) -> ClkprsenR { + ClkprsenR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Force Load to Shift Register"] #[inline(always)] - pub fn forceload(&self) -> FORCELOAD_R { - FORCELOAD_R::new(((self.bits >> 7) & 1) != 0) + pub fn forceload(&self) -> ForceloadR { + ForceloadR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 24:31 - Sync Clock Div"] #[inline(always)] - pub fn sdiv(&self) -> SDIV_R { - SDIV_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn sdiv(&self) -> SdivR { + SdivR::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bit 0 - Main mode"] #[inline(always)] #[must_use] - pub fn master(&mut self) -> MASTER_W<0> { - MASTER_W::new(self) + pub fn master(&mut self) -> MasterW { + MasterW::new(self, 0) } #[doc = "Bit 1 - Clock Polarity"] #[inline(always)] #[must_use] - pub fn clkpol(&mut self) -> CLKPOL_W<1> { - CLKPOL_W::new(self) + pub fn clkpol(&mut self) -> ClkpolW { + ClkpolW::new(self, 1) } #[doc = "Bit 2 - Clock Edge for Setup/Sample"] #[inline(always)] #[must_use] - pub fn clkpha(&mut self) -> CLKPHA_W<2> { - CLKPHA_W::new(self) + pub fn clkpha(&mut self) -> ClkphaW { + ClkphaW::new(self, 2) } #[doc = "Bit 3 - Chip Select Invert"] #[inline(always)] #[must_use] - pub fn csinv(&mut self) -> CSINV_W<3> { - CSINV_W::new(self) + pub fn csinv(&mut self) -> CsinvW { + CsinvW::new(self, 3) } #[doc = "Bit 4 - Always Transmit When RXFIFO Not Full"] #[inline(always)] #[must_use] - pub fn autotx(&mut self) -> AUTOTX_W<4> { - AUTOTX_W::new(self) + pub fn autotx(&mut self) -> AutotxW { + AutotxW::new(self, 4) } #[doc = "Bit 5 - Automatic Chip Select"] #[inline(always)] #[must_use] - pub fn autocs(&mut self) -> AUTOCS_W<5> { - AUTOCS_W::new(self) + pub fn autocs(&mut self) -> AutocsW { + AutocsW::new(self, 5) } #[doc = "Bit 6 - PRS CLK Enable"] #[inline(always)] #[must_use] - pub fn clkprsen(&mut self) -> CLKPRSEN_W<6> { - CLKPRSEN_W::new(self) + pub fn clkprsen(&mut self) -> ClkprsenW { + ClkprsenW::new(self, 6) } #[doc = "Bit 7 - Force Load to Shift Register"] #[inline(always)] #[must_use] - pub fn forceload(&mut self) -> FORCELOAD_W<7> { - FORCELOAD_W::new(self) + pub fn forceload(&mut self) -> ForceloadW { + ForceloadW::new(self, 7) } #[doc = "Bits 24:31 - Sync Clock Div"] #[inline(always)] #[must_use] - pub fn sdiv(&mut self) -> SDIV_W<24> { - SDIV_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sdiv(&mut self) -> SdivW { + SdivW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg2](index.html) module"] -pub struct CFG2_SPEC; -impl crate::RegisterSpec for CFG2_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cfg2Spec; +impl crate::RegisterSpec for Cfg2Spec { type Ux = u32; } -#[doc = "`read()` method returns [cfg2::R](R) reader structure"] -impl crate::Readable for CFG2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg2::W](W) writer structure"] -impl crate::Writable for CFG2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg2::R`](R) reader structure"] +impl crate::Readable for Cfg2Spec {} +#[doc = "`write(|w| ..)` method takes [`cfg2::W`](W) writer structure"] +impl crate::Writable for Cfg2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG2 to value 0x20"] -impl crate::Resettable for CFG2_SPEC { - const RESET_VALUE: Self::Ux = 0x20; +impl crate::Resettable for Cfg2Spec { + const RESET_VALUE: u32 = 0x20; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/clkdiv.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/clkdiv.rs index 5158bd5..beab8d8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/clkdiv.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/clkdiv.rs @@ -1,80 +1,40 @@ #[doc = "Register `CLKDIV` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKDIV` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DIV` reader - Fractional Clock Divider"] -pub type DIV_R = crate::FieldReader; +pub type DivR = crate::FieldReader; #[doc = "Field `DIV` writer - Fractional Clock Divider"] -pub type DIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CLKDIV_SPEC, u32, u32, 20, O>; +pub type DivW<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { #[doc = "Bits 3:22 - Fractional Clock Divider"] #[inline(always)] - pub fn div(&self) -> DIV_R { - DIV_R::new((self.bits >> 3) & 0x000f_ffff) + pub fn div(&self) -> DivR { + DivR::new((self.bits >> 3) & 0x000f_ffff) } } impl W { #[doc = "Bits 3:22 - Fractional Clock Divider"] #[inline(always)] #[must_use] - pub fn div(&mut self) -> DIV_W<3> { - DIV_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn div(&mut self) -> DivW { + DivW::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clkdiv](index.html) module"] -pub struct CLKDIV_SPEC; -impl crate::RegisterSpec for CLKDIV_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ClkdivSpec; +impl crate::RegisterSpec for ClkdivSpec { type Ux = u32; } -#[doc = "`read()` method returns [clkdiv::R](R) reader structure"] -impl crate::Readable for CLKDIV_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clkdiv::W](W) writer structure"] -impl crate::Writable for CLKDIV_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`clkdiv::R`](R) reader structure"] +impl crate::Readable for ClkdivSpec {} +#[doc = "`write(|w| ..)` method takes [`clkdiv::W`](W) writer structure"] +impl crate::Writable for ClkdivSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV to value 0"] -impl crate::Resettable for CLKDIV_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ClkdivSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/cmd.rs index 8d3465f..39d3e79 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/cmd.rs @@ -1,116 +1,91 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RXEN` writer - Receiver Enable"] -pub type RXEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXDIS` writer - Receiver Disable"] -pub type RXDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXEN` writer - Transmitter Enable"] -pub type TXEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXDIS` writer - Transmitter Disable"] -pub type TXDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXBLOCKEN` writer - Receiver Block Enable"] -pub type RXBLOCKEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxblockenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXBLOCKDIS` writer - Receiver Block Disable"] -pub type RXBLOCKDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxblockdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTRIEN` writer - Transmitter Tristate Enable"] -pub type TXTRIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxtrienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTRIDIS` writer - Transmitter Tristate Disable"] -pub type TXTRIDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxtridisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEARTX` writer - Clear TX FIFO"] -pub type CLEARTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type CleartxW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Receiver Enable"] #[inline(always)] #[must_use] - pub fn rxen(&mut self) -> RXEN_W<0> { - RXEN_W::new(self) + pub fn rxen(&mut self) -> RxenW { + RxenW::new(self, 0) } #[doc = "Bit 1 - Receiver Disable"] #[inline(always)] #[must_use] - pub fn rxdis(&mut self) -> RXDIS_W<1> { - RXDIS_W::new(self) + pub fn rxdis(&mut self) -> RxdisW { + RxdisW::new(self, 1) } #[doc = "Bit 2 - Transmitter Enable"] #[inline(always)] #[must_use] - pub fn txen(&mut self) -> TXEN_W<2> { - TXEN_W::new(self) + pub fn txen(&mut self) -> TxenW { + TxenW::new(self, 2) } #[doc = "Bit 3 - Transmitter Disable"] #[inline(always)] #[must_use] - pub fn txdis(&mut self) -> TXDIS_W<3> { - TXDIS_W::new(self) + pub fn txdis(&mut self) -> TxdisW { + TxdisW::new(self, 3) } #[doc = "Bit 4 - Receiver Block Enable"] #[inline(always)] #[must_use] - pub fn rxblocken(&mut self) -> RXBLOCKEN_W<4> { - RXBLOCKEN_W::new(self) + pub fn rxblocken(&mut self) -> RxblockenW { + RxblockenW::new(self, 4) } #[doc = "Bit 5 - Receiver Block Disable"] #[inline(always)] #[must_use] - pub fn rxblockdis(&mut self) -> RXBLOCKDIS_W<5> { - RXBLOCKDIS_W::new(self) + pub fn rxblockdis(&mut self) -> RxblockdisW { + RxblockdisW::new(self, 5) } #[doc = "Bit 6 - Transmitter Tristate Enable"] #[inline(always)] #[must_use] - pub fn txtrien(&mut self) -> TXTRIEN_W<6> { - TXTRIEN_W::new(self) + pub fn txtrien(&mut self) -> TxtrienW { + TxtrienW::new(self, 6) } #[doc = "Bit 7 - Transmitter Tristate Disable"] #[inline(always)] #[must_use] - pub fn txtridis(&mut self) -> TXTRIDIS_W<7> { - TXTRIDIS_W::new(self) + pub fn txtridis(&mut self) -> TxtridisW { + TxtridisW::new(self, 7) } #[doc = "Bit 8 - Clear TX FIFO"] #[inline(always)] #[must_use] - pub fn cleartx(&mut self) -> CLEARTX_W<8> { - CLEARTX_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cleartx(&mut self) -> CleartxW { + CleartxW::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/dtxdatcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/dtxdatcfg.rs index 8ae017b..67cc6f0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/dtxdatcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/dtxdatcfg.rs @@ -1,80 +1,40 @@ #[doc = "Register `DTXDATCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTXDATCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTXDAT` reader - Default TX DATA"] -pub type DTXDAT_R = crate::FieldReader; +pub type DtxdatR = crate::FieldReader; #[doc = "Field `DTXDAT` writer - Default TX DATA"] -pub type DTXDAT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTXDATCFG_SPEC, u16, u16, 16, O>; +pub type DtxdatW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Default TX DATA"] #[inline(always)] - pub fn dtxdat(&self) -> DTXDAT_R { - DTXDAT_R::new((self.bits & 0xffff) as u16) + pub fn dtxdat(&self) -> DtxdatR { + DtxdatR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Default TX DATA"] #[inline(always)] #[must_use] - pub fn dtxdat(&mut self) -> DTXDAT_W<0> { - DTXDAT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtxdat(&mut self) -> DtxdatW { + DtxdatW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtxdatcfg](index.html) module"] -pub struct DTXDATCFG_SPEC; -impl crate::RegisterSpec for DTXDATCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtxdatcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtxdatcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtxdatcfgSpec; +impl crate::RegisterSpec for DtxdatcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtxdatcfg::R](R) reader structure"] -impl crate::Readable for DTXDATCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtxdatcfg::W](W) writer structure"] -impl crate::Writable for DTXDATCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtxdatcfg::R`](R) reader structure"] +impl crate::Readable for DtxdatcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dtxdatcfg::W`](W) writer structure"] +impl crate::Writable for DtxdatcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTXDATCFG to value 0"] -impl crate::Resettable for DTXDATCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtxdatcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/en.rs index f15bf65..7298843 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Module enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Module enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Module enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Module enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/framecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/framecfg.rs index 037aaa3..7ad7134 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/framecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/framecfg.rs @@ -1,399 +1,381 @@ #[doc = "Register `FRAMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `FRAMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DATABITS` reader - Data-Bit Mode"] -pub type DATABITS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Data-Bit Mode\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DATABITS_A { +pub enum Databits { #[doc = "1: Each frame contains 7 data bits"] - SEVEN = 1, + Seven = 1, #[doc = "2: Each frame contains 8 data bits"] - EIGHT = 2, + Eight = 2, #[doc = "3: Each frame contains 9 data bits"] - NINE = 3, + Nine = 3, #[doc = "4: Each frame contains 10 data bits"] - TEN = 4, + Ten = 4, #[doc = "5: Each frame contains 11 data bits"] - ELEVEN = 5, + Eleven = 5, #[doc = "6: Each frame contains 12 data bits"] - TWELVE = 6, + Twelve = 6, #[doc = "7: Each frame contains 13 data bits"] - THIRTEEN = 7, + Thirteen = 7, #[doc = "8: Each frame contains 14 data bits"] - FOURTEEN = 8, + Fourteen = 8, #[doc = "9: Each frame contains 15 data bits"] - FIFTEEN = 9, + Fifteen = 9, #[doc = "10: Each frame contains 16 data bits"] - SIXTEEN = 10, + Sixteen = 10, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DATABITS_A) -> Self { + fn from(variant: Databits) -> Self { variant as _ } } -impl DATABITS_R { +impl crate::FieldSpec for Databits { + type Ux = u8; +} +impl crate::IsEnum for Databits {} +#[doc = "Field `DATABITS` reader - Data-Bit Mode"] +pub type DatabitsR = crate::FieldReader; +impl DatabitsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(DATABITS_A::SEVEN), - 2 => Some(DATABITS_A::EIGHT), - 3 => Some(DATABITS_A::NINE), - 4 => Some(DATABITS_A::TEN), - 5 => Some(DATABITS_A::ELEVEN), - 6 => Some(DATABITS_A::TWELVE), - 7 => Some(DATABITS_A::THIRTEEN), - 8 => Some(DATABITS_A::FOURTEEN), - 9 => Some(DATABITS_A::FIFTEEN), - 10 => Some(DATABITS_A::SIXTEEN), + 1 => Some(Databits::Seven), + 2 => Some(Databits::Eight), + 3 => Some(Databits::Nine), + 4 => Some(Databits::Ten), + 5 => Some(Databits::Eleven), + 6 => Some(Databits::Twelve), + 7 => Some(Databits::Thirteen), + 8 => Some(Databits::Fourteen), + 9 => Some(Databits::Fifteen), + 10 => Some(Databits::Sixteen), _ => None, } } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "Each frame contains 7 data bits"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == DATABITS_A::SEVEN + *self == Databits::Seven } - #[doc = "Checks if the value of the field is `EIGHT`"] + #[doc = "Each frame contains 8 data bits"] #[inline(always)] pub fn is_eight(&self) -> bool { - *self == DATABITS_A::EIGHT + *self == Databits::Eight } - #[doc = "Checks if the value of the field is `NINE`"] + #[doc = "Each frame contains 9 data bits"] #[inline(always)] pub fn is_nine(&self) -> bool { - *self == DATABITS_A::NINE + *self == Databits::Nine } - #[doc = "Checks if the value of the field is `TEN`"] + #[doc = "Each frame contains 10 data bits"] #[inline(always)] pub fn is_ten(&self) -> bool { - *self == DATABITS_A::TEN + *self == Databits::Ten } - #[doc = "Checks if the value of the field is `ELEVEN`"] + #[doc = "Each frame contains 11 data bits"] #[inline(always)] pub fn is_eleven(&self) -> bool { - *self == DATABITS_A::ELEVEN + *self == Databits::Eleven } - #[doc = "Checks if the value of the field is `TWELVE`"] + #[doc = "Each frame contains 12 data bits"] #[inline(always)] pub fn is_twelve(&self) -> bool { - *self == DATABITS_A::TWELVE + *self == Databits::Twelve } - #[doc = "Checks if the value of the field is `THIRTEEN`"] + #[doc = "Each frame contains 13 data bits"] #[inline(always)] pub fn is_thirteen(&self) -> bool { - *self == DATABITS_A::THIRTEEN + *self == Databits::Thirteen } - #[doc = "Checks if the value of the field is `FOURTEEN`"] + #[doc = "Each frame contains 14 data bits"] #[inline(always)] pub fn is_fourteen(&self) -> bool { - *self == DATABITS_A::FOURTEEN + *self == Databits::Fourteen } - #[doc = "Checks if the value of the field is `FIFTEEN`"] + #[doc = "Each frame contains 15 data bits"] #[inline(always)] pub fn is_fifteen(&self) -> bool { - *self == DATABITS_A::FIFTEEN + *self == Databits::Fifteen } - #[doc = "Checks if the value of the field is `SIXTEEN`"] + #[doc = "Each frame contains 16 data bits"] #[inline(always)] pub fn is_sixteen(&self) -> bool { - *self == DATABITS_A::SIXTEEN + *self == Databits::Sixteen } } #[doc = "Field `DATABITS` writer - Data-Bit Mode"] -pub type DATABITS_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, FRAMECFG_SPEC, u8, DATABITS_A, 4, O>; -impl<'a, const O: u8> DATABITS_W<'a, O> { +pub type DatabitsW<'a, REG> = crate::FieldWriter<'a, REG, 4, Databits>; +impl<'a, REG> DatabitsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Each frame contains 7 data bits"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(DATABITS_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Databits::Seven) } #[doc = "Each frame contains 8 data bits"] #[inline(always)] - pub fn eight(self) -> &'a mut W { - self.variant(DATABITS_A::EIGHT) + pub fn eight(self) -> &'a mut crate::W { + self.variant(Databits::Eight) } #[doc = "Each frame contains 9 data bits"] #[inline(always)] - pub fn nine(self) -> &'a mut W { - self.variant(DATABITS_A::NINE) + pub fn nine(self) -> &'a mut crate::W { + self.variant(Databits::Nine) } #[doc = "Each frame contains 10 data bits"] #[inline(always)] - pub fn ten(self) -> &'a mut W { - self.variant(DATABITS_A::TEN) + pub fn ten(self) -> &'a mut crate::W { + self.variant(Databits::Ten) } #[doc = "Each frame contains 11 data bits"] #[inline(always)] - pub fn eleven(self) -> &'a mut W { - self.variant(DATABITS_A::ELEVEN) + pub fn eleven(self) -> &'a mut crate::W { + self.variant(Databits::Eleven) } #[doc = "Each frame contains 12 data bits"] #[inline(always)] - pub fn twelve(self) -> &'a mut W { - self.variant(DATABITS_A::TWELVE) + pub fn twelve(self) -> &'a mut crate::W { + self.variant(Databits::Twelve) } #[doc = "Each frame contains 13 data bits"] #[inline(always)] - pub fn thirteen(self) -> &'a mut W { - self.variant(DATABITS_A::THIRTEEN) + pub fn thirteen(self) -> &'a mut crate::W { + self.variant(Databits::Thirteen) } #[doc = "Each frame contains 14 data bits"] #[inline(always)] - pub fn fourteen(self) -> &'a mut W { - self.variant(DATABITS_A::FOURTEEN) + pub fn fourteen(self) -> &'a mut crate::W { + self.variant(Databits::Fourteen) } #[doc = "Each frame contains 15 data bits"] #[inline(always)] - pub fn fifteen(self) -> &'a mut W { - self.variant(DATABITS_A::FIFTEEN) + pub fn fifteen(self) -> &'a mut crate::W { + self.variant(Databits::Fifteen) } #[doc = "Each frame contains 16 data bits"] #[inline(always)] - pub fn sixteen(self) -> &'a mut W { - self.variant(DATABITS_A::SIXTEEN) + pub fn sixteen(self) -> &'a mut crate::W { + self.variant(Databits::Sixteen) } } -#[doc = "Field `PARITY` reader - Parity-Bit Mode"] -pub type PARITY_R = crate::FieldReader; #[doc = "Parity-Bit Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PARITY_A { +pub enum Parity { #[doc = "0: Parity bits are not used"] - NONE = 0, + None = 0, #[doc = "2: Even parity are used. Parity bits are automatically generated and checked by hardware."] - EVEN = 2, + Even = 2, #[doc = "3: Odd parity is used. Parity bits are automatically generated and checked by hardware."] - ODD = 3, + Odd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PARITY_A) -> Self { + fn from(variant: Parity) -> Self { variant as _ } } -impl PARITY_R { +impl crate::FieldSpec for Parity { + type Ux = u8; +} +impl crate::IsEnum for Parity {} +#[doc = "Field `PARITY` reader - Parity-Bit Mode"] +pub type ParityR = crate::FieldReader; +impl ParityR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PARITY_A::NONE), - 2 => Some(PARITY_A::EVEN), - 3 => Some(PARITY_A::ODD), + 0 => Some(Parity::None), + 2 => Some(Parity::Even), + 3 => Some(Parity::Odd), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Parity bits are not used"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == PARITY_A::NONE + *self == Parity::None } - #[doc = "Checks if the value of the field is `EVEN`"] + #[doc = "Even parity are used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] pub fn is_even(&self) -> bool { - *self == PARITY_A::EVEN + *self == Parity::Even } - #[doc = "Checks if the value of the field is `ODD`"] + #[doc = "Odd parity is used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] pub fn is_odd(&self) -> bool { - *self == PARITY_A::ODD + *self == Parity::Odd } } #[doc = "Field `PARITY` writer - Parity-Bit Mode"] -pub type PARITY_W<'a, const O: u8> = crate::FieldWriter<'a, u32, FRAMECFG_SPEC, u8, PARITY_A, 2, O>; -impl<'a, const O: u8> PARITY_W<'a, O> { +pub type ParityW<'a, REG> = crate::FieldWriter<'a, REG, 2, Parity>; +impl<'a, REG> ParityW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Parity bits are not used"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(PARITY_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Parity::None) } #[doc = "Even parity are used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] - pub fn even(self) -> &'a mut W { - self.variant(PARITY_A::EVEN) + pub fn even(self) -> &'a mut crate::W { + self.variant(Parity::Even) } #[doc = "Odd parity is used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] - pub fn odd(self) -> &'a mut W { - self.variant(PARITY_A::ODD) + pub fn odd(self) -> &'a mut crate::W { + self.variant(Parity::Odd) } } -#[doc = "Field `STOPBITS` reader - Stop-Bit Mode"] -pub type STOPBITS_R = crate::FieldReader; #[doc = "Stop-Bit Mode\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STOPBITS_A { +pub enum Stopbits { #[doc = "0: The transmitter generates a half stop bit. Stop-bits are not verified by receiver"] - HALF = 0, + Half = 0, #[doc = "1: One stop bit is generated and verified"] - ONE = 1, + One = 1, #[doc = "2: The transmitter generates one and a half stop bit. The receiver verifies the first stop bit"] - ONEANDAHALF = 2, + Oneandahalf = 2, #[doc = "3: The transmitter generates two stop bits. The receiver checks the first stop-bit only"] - TWO = 3, + Two = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STOPBITS_A) -> Self { + fn from(variant: Stopbits) -> Self { variant as _ } } -impl STOPBITS_R { +impl crate::FieldSpec for Stopbits { + type Ux = u8; +} +impl crate::IsEnum for Stopbits {} +#[doc = "Field `STOPBITS` reader - Stop-Bit Mode"] +pub type StopbitsR = crate::FieldReader; +impl StopbitsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> STOPBITS_A { + pub const fn variant(&self) -> Stopbits { match self.bits { - 0 => STOPBITS_A::HALF, - 1 => STOPBITS_A::ONE, - 2 => STOPBITS_A::ONEANDAHALF, - 3 => STOPBITS_A::TWO, + 0 => Stopbits::Half, + 1 => Stopbits::One, + 2 => Stopbits::Oneandahalf, + 3 => Stopbits::Two, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `HALF`"] + #[doc = "The transmitter generates a half stop bit. Stop-bits are not verified by receiver"] #[inline(always)] pub fn is_half(&self) -> bool { - *self == STOPBITS_A::HALF + *self == Stopbits::Half } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "One stop bit is generated and verified"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == STOPBITS_A::ONE + *self == Stopbits::One } - #[doc = "Checks if the value of the field is `ONEANDAHALF`"] + #[doc = "The transmitter generates one and a half stop bit. The receiver verifies the first stop bit"] #[inline(always)] pub fn is_oneandahalf(&self) -> bool { - *self == STOPBITS_A::ONEANDAHALF + *self == Stopbits::Oneandahalf } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "The transmitter generates two stop bits. The receiver checks the first stop-bit only"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == STOPBITS_A::TWO + *self == Stopbits::Two } } #[doc = "Field `STOPBITS` writer - Stop-Bit Mode"] -pub type STOPBITS_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, FRAMECFG_SPEC, u8, STOPBITS_A, 2, O>; -impl<'a, const O: u8> STOPBITS_W<'a, O> { +pub type StopbitsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Stopbits, crate::Safe>; +impl<'a, REG> StopbitsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The transmitter generates a half stop bit. Stop-bits are not verified by receiver"] #[inline(always)] - pub fn half(self) -> &'a mut W { - self.variant(STOPBITS_A::HALF) + pub fn half(self) -> &'a mut crate::W { + self.variant(Stopbits::Half) } #[doc = "One stop bit is generated and verified"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(STOPBITS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Stopbits::One) } #[doc = "The transmitter generates one and a half stop bit. The receiver verifies the first stop bit"] #[inline(always)] - pub fn oneandahalf(self) -> &'a mut W { - self.variant(STOPBITS_A::ONEANDAHALF) + pub fn oneandahalf(self) -> &'a mut crate::W { + self.variant(Stopbits::Oneandahalf) } #[doc = "The transmitter generates two stop bits. The receiver checks the first stop-bit only"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(STOPBITS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Stopbits::Two) } } impl R { #[doc = "Bits 0:3 - Data-Bit Mode"] #[inline(always)] - pub fn databits(&self) -> DATABITS_R { - DATABITS_R::new((self.bits & 0x0f) as u8) + pub fn databits(&self) -> DatabitsR { + DatabitsR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - Parity-Bit Mode"] #[inline(always)] - pub fn parity(&self) -> PARITY_R { - PARITY_R::new(((self.bits >> 8) & 3) as u8) + pub fn parity(&self) -> ParityR { + ParityR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 12:13 - Stop-Bit Mode"] #[inline(always)] - pub fn stopbits(&self) -> STOPBITS_R { - STOPBITS_R::new(((self.bits >> 12) & 3) as u8) + pub fn stopbits(&self) -> StopbitsR { + StopbitsR::new(((self.bits >> 12) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - Data-Bit Mode"] #[inline(always)] #[must_use] - pub fn databits(&mut self) -> DATABITS_W<0> { - DATABITS_W::new(self) + pub fn databits(&mut self) -> DatabitsW { + DatabitsW::new(self, 0) } #[doc = "Bits 8:9 - Parity-Bit Mode"] #[inline(always)] #[must_use] - pub fn parity(&mut self) -> PARITY_W<8> { - PARITY_W::new(self) + pub fn parity(&mut self) -> ParityW { + ParityW::new(self, 8) } #[doc = "Bits 12:13 - Stop-Bit Mode"] #[inline(always)] #[must_use] - pub fn stopbits(&mut self) -> STOPBITS_W<12> { - STOPBITS_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stopbits(&mut self) -> StopbitsW { + StopbitsW::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [framecfg](index.html) module"] -pub struct FRAMECFG_SPEC; -impl crate::RegisterSpec for FRAMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`framecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`framecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct FramecfgSpec; +impl crate::RegisterSpec for FramecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [framecfg::R](R) reader structure"] -impl crate::Readable for FRAMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [framecfg::W](W) writer structure"] -impl crate::Writable for FRAMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`framecfg::R`](R) reader structure"] +impl crate::Readable for FramecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`framecfg::W`](W) writer structure"] +impl crate::Writable for FramecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FRAMECFG to value 0x1002"] -impl crate::Resettable for FRAMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0x1002; +impl crate::Resettable for FramecfgSpec { + const RESET_VALUE: u32 = 0x1002; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/ien.rs index 8013fa6..b81234b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/ien.rs @@ -1,335 +1,295 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXC` reader - TX Complete Enable"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXC` writer - TX Complete Enable"] -pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFL` reader - TX FIFO Level Enable"] -pub type TXFL_R = crate::BitReader; +pub type TxflR = crate::BitReader; #[doc = "Field `TXFL` writer - TX FIFO Level Enable"] -pub type TXFL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxflW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFL` reader - RX FIFO Level Enable"] -pub type RXFL_R = crate::BitReader; +pub type RxflR = crate::BitReader; #[doc = "Field `RXFL` writer - RX FIFO Level Enable"] -pub type RXFL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxflW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFULL` reader - RX FIFO Full Enable"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXFULL` writer - RX FIFO Full Enable"] -pub type RXFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxfullW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXOF` reader - RX FIFO Overflow Enable"] -pub type RXOF_R = crate::BitReader; +pub type RxofR = crate::BitReader; #[doc = "Field `RXOF` writer - RX FIFO Overflow Enable"] -pub type RXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUF` reader - RX FIFO Underflow Enable"] -pub type RXUF_R = crate::BitReader; +pub type RxufR = crate::BitReader; #[doc = "Field `RXUF` writer - RX FIFO Underflow Enable"] -pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXOF` reader - TX FIFO Overflow Enable"] -pub type TXOF_R = crate::BitReader; +pub type TxofR = crate::BitReader; #[doc = "Field `TXOF` writer - TX FIFO Overflow Enable"] -pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXUF` reader - TX FIFO Underflow Enable"] -pub type TXUF_R = crate::BitReader; +pub type TxufR = crate::BitReader; #[doc = "Field `TXUF` writer - TX FIFO Underflow Enable"] -pub type TXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PERR` reader - Parity Error Enable"] -pub type PERR_R = crate::BitReader; +pub type PerrR = crate::BitReader; #[doc = "Field `PERR` writer - Parity Error Enable"] -pub type PERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FERR` reader - Framing Error Enable"] -pub type FERR_R = crate::BitReader; +pub type FerrR = crate::BitReader; #[doc = "Field `FERR` writer - Framing Error Enable"] -pub type FERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPAF` reader - Multi-Processor Addr Frame Enable"] -pub type MPAF_R = crate::BitReader; +pub type MpafR = crate::BitReader; #[doc = "Field `MPAF` writer - Multi-Processor Addr Frame Enable"] -pub type MPAF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type MpafW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOADERR` reader - Load Error Enable"] -pub type LOADERR_R = crate::BitReader; +pub type LoaderrR = crate::BitReader; #[doc = "Field `LOADERR` writer - Load Error Enable"] -pub type LOADERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type LoaderrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCF` reader - Collision Check Fail Enable"] -pub type CCF_R = crate::BitReader; +pub type CcfR = crate::BitReader; #[doc = "Field `CCF` writer - Collision Check Fail Enable"] -pub type CCF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type CcfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXIDLE` reader - TX IDLE Enable"] -pub type TXIDLE_R = crate::BitReader; +pub type TxidleR = crate::BitReader; #[doc = "Field `TXIDLE` writer - TX IDLE Enable"] -pub type TXIDLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxidleW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STARTF` reader - Start Frame Enable"] -pub type STARTF_R = crate::BitReader; +pub type StartfR = crate::BitReader; #[doc = "Field `STARTF` writer - Start Frame Enable"] -pub type STARTF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type StartfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SIGF` reader - Signal Frame Enable"] -pub type SIGF_R = crate::BitReader; +pub type SigfR = crate::BitReader; #[doc = "Field `SIGF` writer - Signal Frame Enable"] -pub type SIGF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SigfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOBAUDDONE` reader - Auto Baud Complete Enable"] -pub type AUTOBAUDDONE_R = crate::BitReader; +pub type AutobauddoneR = crate::BitReader; #[doc = "Field `AUTOBAUDDONE` writer - Auto Baud Complete Enable"] -pub type AUTOBAUDDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AutobauddoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXTO` reader - RX Timeout Enable"] -pub type RXTO_R = crate::BitReader; +pub type RxtoR = crate::BitReader; #[doc = "Field `RXTO` writer - RX Timeout Enable"] -pub type RXTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxtoW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - TX Complete Enable"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new((self.bits & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - TX FIFO Level Enable"] #[inline(always)] - pub fn txfl(&self) -> TXFL_R { - TXFL_R::new(((self.bits >> 1) & 1) != 0) + pub fn txfl(&self) -> TxflR { + TxflR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RX FIFO Level Enable"] #[inline(always)] - pub fn rxfl(&self) -> RXFL_R { - RXFL_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxfl(&self) -> RxflR { + RxflR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - RX FIFO Full Enable"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - RX FIFO Overflow Enable"] #[inline(always)] - pub fn rxof(&self) -> RXOF_R { - RXOF_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxof(&self) -> RxofR { + RxofR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - RX FIFO Underflow Enable"] #[inline(always)] - pub fn rxuf(&self) -> RXUF_R { - RXUF_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxuf(&self) -> RxufR { + RxufR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX FIFO Overflow Enable"] #[inline(always)] - pub fn txof(&self) -> TXOF_R { - TXOF_R::new(((self.bits >> 6) & 1) != 0) + pub fn txof(&self) -> TxofR { + TxofR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - TX FIFO Underflow Enable"] #[inline(always)] - pub fn txuf(&self) -> TXUF_R { - TXUF_R::new(((self.bits >> 7) & 1) != 0) + pub fn txuf(&self) -> TxufR { + TxufR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Parity Error Enable"] #[inline(always)] - pub fn perr(&self) -> PERR_R { - PERR_R::new(((self.bits >> 8) & 1) != 0) + pub fn perr(&self) -> PerrR { + PerrR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Framing Error Enable"] #[inline(always)] - pub fn ferr(&self) -> FERR_R { - FERR_R::new(((self.bits >> 9) & 1) != 0) + pub fn ferr(&self) -> FerrR { + FerrR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Multi-Processor Addr Frame Enable"] #[inline(always)] - pub fn mpaf(&self) -> MPAF_R { - MPAF_R::new(((self.bits >> 10) & 1) != 0) + pub fn mpaf(&self) -> MpafR { + MpafR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Load Error Enable"] #[inline(always)] - pub fn loaderr(&self) -> LOADERR_R { - LOADERR_R::new(((self.bits >> 11) & 1) != 0) + pub fn loaderr(&self) -> LoaderrR { + LoaderrR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Collision Check Fail Enable"] #[inline(always)] - pub fn ccf(&self) -> CCF_R { - CCF_R::new(((self.bits >> 12) & 1) != 0) + pub fn ccf(&self) -> CcfR { + CcfR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - TX IDLE Enable"] #[inline(always)] - pub fn txidle(&self) -> TXIDLE_R { - TXIDLE_R::new(((self.bits >> 13) & 1) != 0) + pub fn txidle(&self) -> TxidleR { + TxidleR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 18 - Start Frame Enable"] #[inline(always)] - pub fn startf(&self) -> STARTF_R { - STARTF_R::new(((self.bits >> 18) & 1) != 0) + pub fn startf(&self) -> StartfR { + StartfR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Signal Frame Enable"] #[inline(always)] - pub fn sigf(&self) -> SIGF_R { - SIGF_R::new(((self.bits >> 19) & 1) != 0) + pub fn sigf(&self) -> SigfR { + SigfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 24 - Auto Baud Complete Enable"] #[inline(always)] - pub fn autobauddone(&self) -> AUTOBAUDDONE_R { - AUTOBAUDDONE_R::new(((self.bits >> 24) & 1) != 0) + pub fn autobauddone(&self) -> AutobauddoneR { + AutobauddoneR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - RX Timeout Enable"] #[inline(always)] - pub fn rxto(&self) -> RXTO_R { - RXTO_R::new(((self.bits >> 25) & 1) != 0) + pub fn rxto(&self) -> RxtoR { + RxtoR::new(((self.bits >> 25) & 1) != 0) } } impl W { #[doc = "Bit 0 - TX Complete Enable"] #[inline(always)] #[must_use] - pub fn txc(&mut self) -> TXC_W<0> { - TXC_W::new(self) + pub fn txc(&mut self) -> TxcW { + TxcW::new(self, 0) } #[doc = "Bit 1 - TX FIFO Level Enable"] #[inline(always)] #[must_use] - pub fn txfl(&mut self) -> TXFL_W<1> { - TXFL_W::new(self) + pub fn txfl(&mut self) -> TxflW { + TxflW::new(self, 1) } #[doc = "Bit 2 - RX FIFO Level Enable"] #[inline(always)] #[must_use] - pub fn rxfl(&mut self) -> RXFL_W<2> { - RXFL_W::new(self) + pub fn rxfl(&mut self) -> RxflW { + RxflW::new(self, 2) } #[doc = "Bit 3 - RX FIFO Full Enable"] #[inline(always)] #[must_use] - pub fn rxfull(&mut self) -> RXFULL_W<3> { - RXFULL_W::new(self) + pub fn rxfull(&mut self) -> RxfullW { + RxfullW::new(self, 3) } #[doc = "Bit 4 - RX FIFO Overflow Enable"] #[inline(always)] #[must_use] - pub fn rxof(&mut self) -> RXOF_W<4> { - RXOF_W::new(self) + pub fn rxof(&mut self) -> RxofW { + RxofW::new(self, 4) } #[doc = "Bit 5 - RX FIFO Underflow Enable"] #[inline(always)] #[must_use] - pub fn rxuf(&mut self) -> RXUF_W<5> { - RXUF_W::new(self) + pub fn rxuf(&mut self) -> RxufW { + RxufW::new(self, 5) } #[doc = "Bit 6 - TX FIFO Overflow Enable"] #[inline(always)] #[must_use] - pub fn txof(&mut self) -> TXOF_W<6> { - TXOF_W::new(self) + pub fn txof(&mut self) -> TxofW { + TxofW::new(self, 6) } #[doc = "Bit 7 - TX FIFO Underflow Enable"] #[inline(always)] #[must_use] - pub fn txuf(&mut self) -> TXUF_W<7> { - TXUF_W::new(self) + pub fn txuf(&mut self) -> TxufW { + TxufW::new(self, 7) } #[doc = "Bit 8 - Parity Error Enable"] #[inline(always)] #[must_use] - pub fn perr(&mut self) -> PERR_W<8> { - PERR_W::new(self) + pub fn perr(&mut self) -> PerrW { + PerrW::new(self, 8) } #[doc = "Bit 9 - Framing Error Enable"] #[inline(always)] #[must_use] - pub fn ferr(&mut self) -> FERR_W<9> { - FERR_W::new(self) + pub fn ferr(&mut self) -> FerrW { + FerrW::new(self, 9) } #[doc = "Bit 10 - Multi-Processor Addr Frame Enable"] #[inline(always)] #[must_use] - pub fn mpaf(&mut self) -> MPAF_W<10> { - MPAF_W::new(self) + pub fn mpaf(&mut self) -> MpafW { + MpafW::new(self, 10) } #[doc = "Bit 11 - Load Error Enable"] #[inline(always)] #[must_use] - pub fn loaderr(&mut self) -> LOADERR_W<11> { - LOADERR_W::new(self) + pub fn loaderr(&mut self) -> LoaderrW { + LoaderrW::new(self, 11) } #[doc = "Bit 12 - Collision Check Fail Enable"] #[inline(always)] #[must_use] - pub fn ccf(&mut self) -> CCF_W<12> { - CCF_W::new(self) + pub fn ccf(&mut self) -> CcfW { + CcfW::new(self, 12) } #[doc = "Bit 13 - TX IDLE Enable"] #[inline(always)] #[must_use] - pub fn txidle(&mut self) -> TXIDLE_W<13> { - TXIDLE_W::new(self) + pub fn txidle(&mut self) -> TxidleW { + TxidleW::new(self, 13) } #[doc = "Bit 18 - Start Frame Enable"] #[inline(always)] #[must_use] - pub fn startf(&mut self) -> STARTF_W<18> { - STARTF_W::new(self) + pub fn startf(&mut self) -> StartfW { + StartfW::new(self, 18) } #[doc = "Bit 19 - Signal Frame Enable"] #[inline(always)] #[must_use] - pub fn sigf(&mut self) -> SIGF_W<19> { - SIGF_W::new(self) + pub fn sigf(&mut self) -> SigfW { + SigfW::new(self, 19) } #[doc = "Bit 24 - Auto Baud Complete Enable"] #[inline(always)] #[must_use] - pub fn autobauddone(&mut self) -> AUTOBAUDDONE_W<24> { - AUTOBAUDDONE_W::new(self) + pub fn autobauddone(&mut self) -> AutobauddoneW { + AutobauddoneW::new(self, 24) } #[doc = "Bit 25 - RX Timeout Enable"] #[inline(always)] #[must_use] - pub fn rxto(&mut self) -> RXTO_W<25> { - RXTO_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rxto(&mut self) -> RxtoW { + RxtoW::new(self, 25) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/if_.rs index 75345eb..85b7d94 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/if_.rs @@ -1,335 +1,295 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXC` reader - TX Complete Interrupt Flag"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXC` writer - TX Complete Interrupt Flag"] -pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFL` reader - TX FIFO Level Interrupt Flag"] -pub type TXFL_R = crate::BitReader; +pub type TxflR = crate::BitReader; #[doc = "Field `TXFL` writer - TX FIFO Level Interrupt Flag"] -pub type TXFL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxflW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFL` reader - RX FIFO Level Interrupt Flag"] -pub type RXFL_R = crate::BitReader; +pub type RxflR = crate::BitReader; #[doc = "Field `RXFL` writer - RX FIFO Level Interrupt Flag"] -pub type RXFL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxflW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFULL` reader - RX FIFO Full Interrupt Flag"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXFULL` writer - RX FIFO Full Interrupt Flag"] -pub type RXFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxfullW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXOF` reader - RX FIFO Overflow Interrupt Flag"] -pub type RXOF_R = crate::BitReader; +pub type RxofR = crate::BitReader; #[doc = "Field `RXOF` writer - RX FIFO Overflow Interrupt Flag"] -pub type RXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUF` reader - RX FIFO Underflow Interrupt Flag"] -pub type RXUF_R = crate::BitReader; +pub type RxufR = crate::BitReader; #[doc = "Field `RXUF` writer - RX FIFO Underflow Interrupt Flag"] -pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXOF` reader - TX FIFO Overflow Interrupt Flag"] -pub type TXOF_R = crate::BitReader; +pub type TxofR = crate::BitReader; #[doc = "Field `TXOF` writer - TX FIFO Overflow Interrupt Flag"] -pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXUF` reader - TX FIFO Underflow Interrupt Flag"] -pub type TXUF_R = crate::BitReader; +pub type TxufR = crate::BitReader; #[doc = "Field `TXUF` writer - TX FIFO Underflow Interrupt Flag"] -pub type TXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PERR` reader - Parity Error Interrupt Flag"] -pub type PERR_R = crate::BitReader; +pub type PerrR = crate::BitReader; #[doc = "Field `PERR` writer - Parity Error Interrupt Flag"] -pub type PERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FERR` reader - Framing Error Interrupt Flag"] -pub type FERR_R = crate::BitReader; +pub type FerrR = crate::BitReader; #[doc = "Field `FERR` writer - Framing Error Interrupt Flag"] -pub type FERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPAF` reader - Multi-Processor Address Frame Interrupt"] -pub type MPAF_R = crate::BitReader; +pub type MpafR = crate::BitReader; #[doc = "Field `MPAF` writer - Multi-Processor Address Frame Interrupt"] -pub type MPAF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type MpafW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOADERR` reader - Load Error Interrupt Flag"] -pub type LOADERR_R = crate::BitReader; +pub type LoaderrR = crate::BitReader; #[doc = "Field `LOADERR` writer - Load Error Interrupt Flag"] -pub type LOADERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type LoaderrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCF` reader - Collision Check Fail Interrupt Flag"] -pub type CCF_R = crate::BitReader; +pub type CcfR = crate::BitReader; #[doc = "Field `CCF` writer - Collision Check Fail Interrupt Flag"] -pub type CCF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type CcfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXIDLE` reader - TX Idle Interrupt Flag"] -pub type TXIDLE_R = crate::BitReader; +pub type TxidleR = crate::BitReader; #[doc = "Field `TXIDLE` writer - TX Idle Interrupt Flag"] -pub type TXIDLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxidleW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STARTF` reader - Start Frame Interrupt Flag"] -pub type STARTF_R = crate::BitReader; +pub type StartfR = crate::BitReader; #[doc = "Field `STARTF` writer - Start Frame Interrupt Flag"] -pub type STARTF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type StartfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SIGF` reader - Signal Frame Interrupt Flag"] -pub type SIGF_R = crate::BitReader; +pub type SigfR = crate::BitReader; #[doc = "Field `SIGF` writer - Signal Frame Interrupt Flag"] -pub type SIGF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SigfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOBAUDDONE` reader - Auto Baud Complete Interrupt Flag"] -pub type AUTOBAUDDONE_R = crate::BitReader; +pub type AutobauddoneR = crate::BitReader; #[doc = "Field `AUTOBAUDDONE` writer - Auto Baud Complete Interrupt Flag"] -pub type AUTOBAUDDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AutobauddoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXTO` reader - RX Timeout Interrupt Flag"] -pub type RXTO_R = crate::BitReader; +pub type RxtoR = crate::BitReader; #[doc = "Field `RXTO` writer - RX Timeout Interrupt Flag"] -pub type RXTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxtoW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - TX Complete Interrupt Flag"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new((self.bits & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - TX FIFO Level Interrupt Flag"] #[inline(always)] - pub fn txfl(&self) -> TXFL_R { - TXFL_R::new(((self.bits >> 1) & 1) != 0) + pub fn txfl(&self) -> TxflR { + TxflR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RX FIFO Level Interrupt Flag"] #[inline(always)] - pub fn rxfl(&self) -> RXFL_R { - RXFL_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxfl(&self) -> RxflR { + RxflR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - RX FIFO Full Interrupt Flag"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - RX FIFO Overflow Interrupt Flag"] #[inline(always)] - pub fn rxof(&self) -> RXOF_R { - RXOF_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxof(&self) -> RxofR { + RxofR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - RX FIFO Underflow Interrupt Flag"] #[inline(always)] - pub fn rxuf(&self) -> RXUF_R { - RXUF_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxuf(&self) -> RxufR { + RxufR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX FIFO Overflow Interrupt Flag"] #[inline(always)] - pub fn txof(&self) -> TXOF_R { - TXOF_R::new(((self.bits >> 6) & 1) != 0) + pub fn txof(&self) -> TxofR { + TxofR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - TX FIFO Underflow Interrupt Flag"] #[inline(always)] - pub fn txuf(&self) -> TXUF_R { - TXUF_R::new(((self.bits >> 7) & 1) != 0) + pub fn txuf(&self) -> TxufR { + TxufR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Parity Error Interrupt Flag"] #[inline(always)] - pub fn perr(&self) -> PERR_R { - PERR_R::new(((self.bits >> 8) & 1) != 0) + pub fn perr(&self) -> PerrR { + PerrR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Framing Error Interrupt Flag"] #[inline(always)] - pub fn ferr(&self) -> FERR_R { - FERR_R::new(((self.bits >> 9) & 1) != 0) + pub fn ferr(&self) -> FerrR { + FerrR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Multi-Processor Address Frame Interrupt"] #[inline(always)] - pub fn mpaf(&self) -> MPAF_R { - MPAF_R::new(((self.bits >> 10) & 1) != 0) + pub fn mpaf(&self) -> MpafR { + MpafR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Load Error Interrupt Flag"] #[inline(always)] - pub fn loaderr(&self) -> LOADERR_R { - LOADERR_R::new(((self.bits >> 11) & 1) != 0) + pub fn loaderr(&self) -> LoaderrR { + LoaderrR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Collision Check Fail Interrupt Flag"] #[inline(always)] - pub fn ccf(&self) -> CCF_R { - CCF_R::new(((self.bits >> 12) & 1) != 0) + pub fn ccf(&self) -> CcfR { + CcfR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - TX Idle Interrupt Flag"] #[inline(always)] - pub fn txidle(&self) -> TXIDLE_R { - TXIDLE_R::new(((self.bits >> 13) & 1) != 0) + pub fn txidle(&self) -> TxidleR { + TxidleR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 18 - Start Frame Interrupt Flag"] #[inline(always)] - pub fn startf(&self) -> STARTF_R { - STARTF_R::new(((self.bits >> 18) & 1) != 0) + pub fn startf(&self) -> StartfR { + StartfR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Signal Frame Interrupt Flag"] #[inline(always)] - pub fn sigf(&self) -> SIGF_R { - SIGF_R::new(((self.bits >> 19) & 1) != 0) + pub fn sigf(&self) -> SigfR { + SigfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 24 - Auto Baud Complete Interrupt Flag"] #[inline(always)] - pub fn autobauddone(&self) -> AUTOBAUDDONE_R { - AUTOBAUDDONE_R::new(((self.bits >> 24) & 1) != 0) + pub fn autobauddone(&self) -> AutobauddoneR { + AutobauddoneR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - RX Timeout Interrupt Flag"] #[inline(always)] - pub fn rxto(&self) -> RXTO_R { - RXTO_R::new(((self.bits >> 25) & 1) != 0) + pub fn rxto(&self) -> RxtoR { + RxtoR::new(((self.bits >> 25) & 1) != 0) } } impl W { #[doc = "Bit 0 - TX Complete Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txc(&mut self) -> TXC_W<0> { - TXC_W::new(self) + pub fn txc(&mut self) -> TxcW { + TxcW::new(self, 0) } #[doc = "Bit 1 - TX FIFO Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txfl(&mut self) -> TXFL_W<1> { - TXFL_W::new(self) + pub fn txfl(&mut self) -> TxflW { + TxflW::new(self, 1) } #[doc = "Bit 2 - RX FIFO Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxfl(&mut self) -> RXFL_W<2> { - RXFL_W::new(self) + pub fn rxfl(&mut self) -> RxflW { + RxflW::new(self, 2) } #[doc = "Bit 3 - RX FIFO Full Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxfull(&mut self) -> RXFULL_W<3> { - RXFULL_W::new(self) + pub fn rxfull(&mut self) -> RxfullW { + RxfullW::new(self, 3) } #[doc = "Bit 4 - RX FIFO Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxof(&mut self) -> RXOF_W<4> { - RXOF_W::new(self) + pub fn rxof(&mut self) -> RxofW { + RxofW::new(self, 4) } #[doc = "Bit 5 - RX FIFO Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxuf(&mut self) -> RXUF_W<5> { - RXUF_W::new(self) + pub fn rxuf(&mut self) -> RxufW { + RxufW::new(self, 5) } #[doc = "Bit 6 - TX FIFO Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txof(&mut self) -> TXOF_W<6> { - TXOF_W::new(self) + pub fn txof(&mut self) -> TxofW { + TxofW::new(self, 6) } #[doc = "Bit 7 - TX FIFO Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txuf(&mut self) -> TXUF_W<7> { - TXUF_W::new(self) + pub fn txuf(&mut self) -> TxufW { + TxufW::new(self, 7) } #[doc = "Bit 8 - Parity Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn perr(&mut self) -> PERR_W<8> { - PERR_W::new(self) + pub fn perr(&mut self) -> PerrW { + PerrW::new(self, 8) } #[doc = "Bit 9 - Framing Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ferr(&mut self) -> FERR_W<9> { - FERR_W::new(self) + pub fn ferr(&mut self) -> FerrW { + FerrW::new(self, 9) } #[doc = "Bit 10 - Multi-Processor Address Frame Interrupt"] #[inline(always)] #[must_use] - pub fn mpaf(&mut self) -> MPAF_W<10> { - MPAF_W::new(self) + pub fn mpaf(&mut self) -> MpafW { + MpafW::new(self, 10) } #[doc = "Bit 11 - Load Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn loaderr(&mut self) -> LOADERR_W<11> { - LOADERR_W::new(self) + pub fn loaderr(&mut self) -> LoaderrW { + LoaderrW::new(self, 11) } #[doc = "Bit 12 - Collision Check Fail Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ccf(&mut self) -> CCF_W<12> { - CCF_W::new(self) + pub fn ccf(&mut self) -> CcfW { + CcfW::new(self, 12) } #[doc = "Bit 13 - TX Idle Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txidle(&mut self) -> TXIDLE_W<13> { - TXIDLE_W::new(self) + pub fn txidle(&mut self) -> TxidleW { + TxidleW::new(self, 13) } #[doc = "Bit 18 - Start Frame Interrupt Flag"] #[inline(always)] #[must_use] - pub fn startf(&mut self) -> STARTF_W<18> { - STARTF_W::new(self) + pub fn startf(&mut self) -> StartfW { + StartfW::new(self, 18) } #[doc = "Bit 19 - Signal Frame Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sigf(&mut self) -> SIGF_W<19> { - SIGF_W::new(self) + pub fn sigf(&mut self) -> SigfW { + SigfW::new(self, 19) } #[doc = "Bit 24 - Auto Baud Complete Interrupt Flag"] #[inline(always)] #[must_use] - pub fn autobauddone(&mut self) -> AUTOBAUDDONE_W<24> { - AUTOBAUDDONE_W::new(self) + pub fn autobauddone(&mut self) -> AutobauddoneW { + AutobauddoneW::new(self, 24) } #[doc = "Bit 25 - RX Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxto(&mut self) -> RXTO_W<25> { - RXTO_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rxto(&mut self) -> RxtoW { + RxtoW::new(self, 25) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/ipversion.rs index 85cb381..0068345 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/irhfcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/irhfcfg.rs index 5216f33..2e61f42 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/irhfcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/irhfcfg.rs @@ -1,231 +1,201 @@ #[doc = "Register `IRHFCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IRHFCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `IRHFEN` reader - Enable IrDA Module"] -pub type IRHFEN_R = crate::BitReader; +pub type IrhfenR = crate::BitReader; #[doc = "Field `IRHFEN` writer - Enable IrDA Module"] -pub type IRHFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRHFCFG_SPEC, bool, O>; -#[doc = "Field `IRHFPW` reader - IrDA TX Pulse Width"] -pub type IRHFPW_R = crate::FieldReader; +pub type IrhfenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "IrDA TX Pulse Width\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum IRHFPW_A { +pub enum Irhfpw { #[doc = "0: IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1"] - ONE = 0, + One = 0, #[doc = "1: IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1"] - TWO = 1, + Two = 1, #[doc = "2: IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1"] - THREE = 2, + Three = 2, #[doc = "3: IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1"] - FOUR = 3, + Four = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: IRHFPW_A) -> Self { + fn from(variant: Irhfpw) -> Self { variant as _ } } -impl IRHFPW_R { +impl crate::FieldSpec for Irhfpw { + type Ux = u8; +} +impl crate::IsEnum for Irhfpw {} +#[doc = "Field `IRHFPW` reader - IrDA TX Pulse Width"] +pub type IrhfpwR = crate::FieldReader; +impl IrhfpwR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> IRHFPW_A { + pub const fn variant(&self) -> Irhfpw { match self.bits { - 0 => IRHFPW_A::ONE, - 1 => IRHFPW_A::TWO, - 2 => IRHFPW_A::THREE, - 3 => IRHFPW_A::FOUR, + 0 => Irhfpw::One, + 1 => Irhfpw::Two, + 2 => Irhfpw::Three, + 3 => Irhfpw::Four, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == IRHFPW_A::ONE + *self == Irhfpw::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == IRHFPW_A::TWO + *self == Irhfpw::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == IRHFPW_A::THREE + *self == Irhfpw::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == IRHFPW_A::FOUR + *self == Irhfpw::Four } } #[doc = "Field `IRHFPW` writer - IrDA TX Pulse Width"] -pub type IRHFPW_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, IRHFCFG_SPEC, u8, IRHFPW_A, 2, O>; -impl<'a, const O: u8> IRHFPW_W<'a, O> { +pub type IrhfpwW<'a, REG> = crate::FieldWriter<'a, REG, 2, Irhfpw, crate::Safe>; +impl<'a, REG> IrhfpwW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(IRHFPW_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Irhfpw::One) } #[doc = "IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(IRHFPW_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Irhfpw::Two) } #[doc = "IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(IRHFPW_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Irhfpw::Three) } #[doc = "IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(IRHFPW_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Irhfpw::Four) } } -#[doc = "Field `IRHFFILT` reader - IrDA RX Filter"] -pub type IRHFFILT_R = crate::BitReader; #[doc = "IrDA RX Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IRHFFILT_A { +pub enum Irhffilt { #[doc = "0: No filter enabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Filter enabled. IrDA pulse must be high for at least 5 consecutive clock cycles to be detected"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IRHFFILT_A) -> Self { + fn from(variant: Irhffilt) -> Self { variant as u8 != 0 } } -impl IRHFFILT_R { +#[doc = "Field `IRHFFILT` reader - IrDA RX Filter"] +pub type IrhffiltR = crate::BitReader; +impl IrhffiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> IRHFFILT_A { + pub const fn variant(&self) -> Irhffilt { match self.bits { - false => IRHFFILT_A::DISABLE, - true => IRHFFILT_A::ENABLE, + false => Irhffilt::Disable, + true => Irhffilt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "No filter enabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == IRHFFILT_A::DISABLE + *self == Irhffilt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Filter enabled. IrDA pulse must be high for at least 5 consecutive clock cycles to be detected"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == IRHFFILT_A::ENABLE + *self == Irhffilt::Enable } } #[doc = "Field `IRHFFILT` writer - IrDA RX Filter"] -pub type IRHFFILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRHFCFG_SPEC, IRHFFILT_A, O>; -impl<'a, const O: u8> IRHFFILT_W<'a, O> { +pub type IrhffiltW<'a, REG> = crate::BitWriter<'a, REG, Irhffilt>; +impl<'a, REG> IrhffiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No filter enabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(IRHFFILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Irhffilt::Disable) } #[doc = "Filter enabled. IrDA pulse must be high for at least 5 consecutive clock cycles to be detected"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(IRHFFILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Irhffilt::Enable) } } impl R { #[doc = "Bit 0 - Enable IrDA Module"] #[inline(always)] - pub fn irhfen(&self) -> IRHFEN_R { - IRHFEN_R::new((self.bits & 1) != 0) + pub fn irhfen(&self) -> IrhfenR { + IrhfenR::new((self.bits & 1) != 0) } #[doc = "Bits 1:2 - IrDA TX Pulse Width"] #[inline(always)] - pub fn irhfpw(&self) -> IRHFPW_R { - IRHFPW_R::new(((self.bits >> 1) & 3) as u8) + pub fn irhfpw(&self) -> IrhfpwR { + IrhfpwR::new(((self.bits >> 1) & 3) as u8) } #[doc = "Bit 3 - IrDA RX Filter"] #[inline(always)] - pub fn irhffilt(&self) -> IRHFFILT_R { - IRHFFILT_R::new(((self.bits >> 3) & 1) != 0) + pub fn irhffilt(&self) -> IrhffiltR { + IrhffiltR::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable IrDA Module"] #[inline(always)] #[must_use] - pub fn irhfen(&mut self) -> IRHFEN_W<0> { - IRHFEN_W::new(self) + pub fn irhfen(&mut self) -> IrhfenW { + IrhfenW::new(self, 0) } #[doc = "Bits 1:2 - IrDA TX Pulse Width"] #[inline(always)] #[must_use] - pub fn irhfpw(&mut self) -> IRHFPW_W<1> { - IRHFPW_W::new(self) + pub fn irhfpw(&mut self) -> IrhfpwW { + IrhfpwW::new(self, 1) } #[doc = "Bit 3 - IrDA RX Filter"] #[inline(always)] #[must_use] - pub fn irhffilt(&mut self) -> IRHFFILT_W<3> { - IRHFFILT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn irhffilt(&mut self) -> IrhffiltW { + IrhffiltW::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irhfcfg](index.html) module"] -pub struct IRHFCFG_SPEC; -impl crate::RegisterSpec for IRHFCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`irhfcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irhfcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrhfcfgSpec; +impl crate::RegisterSpec for IrhfcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [irhfcfg::R](R) reader structure"] -impl crate::Readable for IRHFCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [irhfcfg::W](W) writer structure"] -impl crate::Writable for IRHFCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`irhfcfg::R`](R) reader structure"] +impl crate::Readable for IrhfcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`irhfcfg::W`](W) writer structure"] +impl crate::Writable for IrhfcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRHFCFG to value 0"] -impl crate::Resettable for IRHFCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IrhfcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/rxdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/rxdata.rs index f2cf950..cb4530c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/rxdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/rxdata.rs @@ -1,37 +1,22 @@ #[doc = "Register `RXDATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATA` reader - RX Data and Control bits"] -pub type RXDATA_R = crate::FieldReader; +pub type RxdataR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - RX Data and Control bits"] #[inline(always)] - pub fn rxdata(&self) -> RXDATA_R { - RXDATA_R::new((self.bits & 0xffff) as u16) + pub fn rxdata(&self) -> RxdataR { + RxdataR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdata](index.html) module"] -pub struct RXDATA_SPEC; -impl crate::RegisterSpec for RXDATA_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdata::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdataSpec; +impl crate::RegisterSpec for RxdataSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdata::R](R) reader structure"] -impl crate::Readable for RXDATA_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdata::R`](R) reader structure"] +impl crate::Readable for RxdataSpec {} #[doc = "`reset()` method sets RXDATA to value 0"] -impl crate::Resettable for RXDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/rxdatap.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/rxdatap.rs index f78bc3c..b490a48 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/rxdatap.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/rxdatap.rs @@ -1,37 +1,22 @@ #[doc = "Register `RXDATAP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATAP` reader - RX Data Peek"] -pub type RXDATAP_R = crate::FieldReader; +pub type RxdatapR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - RX Data Peek"] #[inline(always)] - pub fn rxdatap(&self) -> RXDATAP_R { - RXDATAP_R::new((self.bits & 0xffff) as u16) + pub fn rxdatap(&self) -> RxdatapR { + RxdatapR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdatap](index.html) module"] -pub struct RXDATAP_SPEC; -impl crate::RegisterSpec for RXDATAP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdatap::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdatapSpec; +impl crate::RegisterSpec for RxdatapSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdatap::R](R) reader structure"] -impl crate::Readable for RXDATAP_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdatap::R`](R) reader structure"] +impl crate::Readable for RxdatapSpec {} #[doc = "`reset()` method sets RXDATAP to value 0"] -impl crate::Resettable for RXDATAP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdatapSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/sigframecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/sigframecfg.rs index 453819f..96b88c1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/sigframecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/sigframecfg.rs @@ -1,81 +1,40 @@ #[doc = "Register `SIGFRAMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SIGFRAMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SIGFRAME` reader - Signal Frame Value"] -pub type SIGFRAME_R = crate::FieldReader; +pub type SigframeR = crate::FieldReader; #[doc = "Field `SIGFRAME` writer - Signal Frame Value"] -pub type SIGFRAME_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SIGFRAMECFG_SPEC, u16, u16, 9, O>; +pub type SigframeW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; impl R { #[doc = "Bits 0:8 - Signal Frame Value"] #[inline(always)] - pub fn sigframe(&self) -> SIGFRAME_R { - SIGFRAME_R::new((self.bits & 0x01ff) as u16) + pub fn sigframe(&self) -> SigframeR { + SigframeR::new((self.bits & 0x01ff) as u16) } } impl W { #[doc = "Bits 0:8 - Signal Frame Value"] #[inline(always)] #[must_use] - pub fn sigframe(&mut self) -> SIGFRAME_W<0> { - SIGFRAME_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sigframe(&mut self) -> SigframeW { + SigframeW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sigframecfg](index.html) module"] -pub struct SIGFRAMECFG_SPEC; -impl crate::RegisterSpec for SIGFRAMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sigframecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sigframecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SigframecfgSpec; +impl crate::RegisterSpec for SigframecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [sigframecfg::R](R) reader structure"] -impl crate::Readable for SIGFRAMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sigframecfg::W](W) writer structure"] -impl crate::Writable for SIGFRAMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`sigframecfg::R`](R) reader structure"] +impl crate::Readable for SigframecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`sigframecfg::W`](W) writer structure"] +impl crate::Writable for SigframecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SIGFRAMECFG to value 0"] -impl crate::Resettable for SIGFRAMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SigframecfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/startframecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/startframecfg.rs index 44571b1..67dd6bf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/startframecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/startframecfg.rs @@ -1,81 +1,40 @@ #[doc = "Register `STARTFRAMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `STARTFRAMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `STARTFRAME` reader - Start Frame"] -pub type STARTFRAME_R = crate::FieldReader; +pub type StartframeR = crate::FieldReader; #[doc = "Field `STARTFRAME` writer - Start Frame"] -pub type STARTFRAME_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, STARTFRAMECFG_SPEC, u16, u16, 9, O>; +pub type StartframeW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; impl R { #[doc = "Bits 0:8 - Start Frame"] #[inline(always)] - pub fn startframe(&self) -> STARTFRAME_R { - STARTFRAME_R::new((self.bits & 0x01ff) as u16) + pub fn startframe(&self) -> StartframeR { + StartframeR::new((self.bits & 0x01ff) as u16) } } impl W { #[doc = "Bits 0:8 - Start Frame"] #[inline(always)] #[must_use] - pub fn startframe(&mut self) -> STARTFRAME_W<0> { - STARTFRAME_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn startframe(&mut self) -> StartframeW { + StartframeW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [startframecfg](index.html) module"] -pub struct STARTFRAMECFG_SPEC; -impl crate::RegisterSpec for STARTFRAMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`startframecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`startframecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StartframecfgSpec; +impl crate::RegisterSpec for StartframecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [startframecfg::R](R) reader structure"] -impl crate::Readable for STARTFRAMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [startframecfg::W](W) writer structure"] -impl crate::Writable for STARTFRAMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`startframecfg::R`](R) reader structure"] +impl crate::Readable for StartframecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`startframecfg::W`](W) writer structure"] +impl crate::Writable for StartframecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets STARTFRAMECFG to value 0"] -impl crate::Resettable for STARTFRAMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StartframecfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/status.rs index 3ad48a5..b418af7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/status.rs @@ -1,121 +1,106 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXENS` reader - Receiver Enable Status"] -pub type RXENS_R = crate::BitReader; +pub type RxensR = crate::BitReader; #[doc = "Field `TXENS` reader - Transmitter Enable Status"] -pub type TXENS_R = crate::BitReader; +pub type TxensR = crate::BitReader; #[doc = "Field `RXBLOCK` reader - Block Incoming Data"] -pub type RXBLOCK_R = crate::BitReader; +pub type RxblockR = crate::BitReader; #[doc = "Field `TXTRI` reader - Transmitter Tristated"] -pub type TXTRI_R = crate::BitReader; +pub type TxtriR = crate::BitReader; #[doc = "Field `TXC` reader - TX Complete"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXFL` reader - TX FIFO Level"] -pub type TXFL_R = crate::BitReader; +pub type TxflR = crate::BitReader; #[doc = "Field `RXFL` reader - RX FIFO Level"] -pub type RXFL_R = crate::BitReader; +pub type RxflR = crate::BitReader; #[doc = "Field `RXFULL` reader - RX FIFO Full"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXIDLE` reader - RX Idle"] -pub type RXIDLE_R = crate::BitReader; +pub type RxidleR = crate::BitReader; #[doc = "Field `TXIDLE` reader - TX Idle"] -pub type TXIDLE_R = crate::BitReader; +pub type TxidleR = crate::BitReader; #[doc = "Field `TXFCNT` reader - Valid entries in TX FIFO"] -pub type TXFCNT_R = crate::FieldReader; +pub type TxfcntR = crate::FieldReader; #[doc = "Field `AUTOBAUDDONE` reader - Auto Baud Rate Detection Completed"] -pub type AUTOBAUDDONE_R = crate::BitReader; +pub type AutobauddoneR = crate::BitReader; #[doc = "Field `CLEARTXBUSY` reader - TX FIFO Clear Busy"] -pub type CLEARTXBUSY_R = crate::BitReader; +pub type CleartxbusyR = crate::BitReader; impl R { #[doc = "Bit 0 - Receiver Enable Status"] #[inline(always)] - pub fn rxens(&self) -> RXENS_R { - RXENS_R::new((self.bits & 1) != 0) + pub fn rxens(&self) -> RxensR { + RxensR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transmitter Enable Status"] #[inline(always)] - pub fn txens(&self) -> TXENS_R { - TXENS_R::new(((self.bits >> 1) & 1) != 0) + pub fn txens(&self) -> TxensR { + TxensR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - Block Incoming Data"] #[inline(always)] - pub fn rxblock(&self) -> RXBLOCK_R { - RXBLOCK_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxblock(&self) -> RxblockR { + RxblockR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Transmitter Tristated"] #[inline(always)] - pub fn txtri(&self) -> TXTRI_R { - TXTRI_R::new(((self.bits >> 4) & 1) != 0) + pub fn txtri(&self) -> TxtriR { + TxtriR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - TX Complete"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new(((self.bits >> 5) & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX FIFO Level"] #[inline(always)] - pub fn txfl(&self) -> TXFL_R { - TXFL_R::new(((self.bits >> 6) & 1) != 0) + pub fn txfl(&self) -> TxflR { + TxflR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - RX FIFO Level"] #[inline(always)] - pub fn rxfl(&self) -> RXFL_R { - RXFL_R::new(((self.bits >> 7) & 1) != 0) + pub fn rxfl(&self) -> RxflR { + RxflR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - RX FIFO Full"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 8) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 12 - RX Idle"] #[inline(always)] - pub fn rxidle(&self) -> RXIDLE_R { - RXIDLE_R::new(((self.bits >> 12) & 1) != 0) + pub fn rxidle(&self) -> RxidleR { + RxidleR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - TX Idle"] #[inline(always)] - pub fn txidle(&self) -> TXIDLE_R { - TXIDLE_R::new(((self.bits >> 13) & 1) != 0) + pub fn txidle(&self) -> TxidleR { + TxidleR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bits 16:20 - Valid entries in TX FIFO"] #[inline(always)] - pub fn txfcnt(&self) -> TXFCNT_R { - TXFCNT_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn txfcnt(&self) -> TxfcntR { + TxfcntR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bit 24 - Auto Baud Rate Detection Completed"] #[inline(always)] - pub fn autobauddone(&self) -> AUTOBAUDDONE_R { - AUTOBAUDDONE_R::new(((self.bits >> 24) & 1) != 0) + pub fn autobauddone(&self) -> AutobauddoneR { + AutobauddoneR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - TX FIFO Clear Busy"] #[inline(always)] - pub fn cleartxbusy(&self) -> CLEARTXBUSY_R { - CLEARTXBUSY_R::new(((self.bits >> 25) & 1) != 0) + pub fn cleartxbusy(&self) -> CleartxbusyR { + CleartxbusyR::new(((self.bits >> 25) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0x3040"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0x3040; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0x3040; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/syncbusy.rs index 3190b02..713965c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/syncbusy.rs @@ -1,114 +1,99 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DIV` reader - SYNCBUSY for DIV in CLKDIV"] -pub type DIV_R = crate::BitReader; +pub type DivR = crate::BitReader; #[doc = "Field `RXTEN` reader - SYNCBUSY for RXTEN in TRIGCTRL"] -pub type RXTEN_R = crate::BitReader; +pub type RxtenR = crate::BitReader; #[doc = "Field `TXTEN` reader - SYNCBUSY for TXTEN in TRIGCTRL"] -pub type TXTEN_R = crate::BitReader; +pub type TxtenR = crate::BitReader; #[doc = "Field `RXEN` reader - SYNCBUSY for RXEN in CMD"] -pub type RXEN_R = crate::BitReader; +pub type RxenR = crate::BitReader; #[doc = "Field `RXDIS` reader - SYNCBUSY for RXDIS in CMD"] -pub type RXDIS_R = crate::BitReader; +pub type RxdisR = crate::BitReader; #[doc = "Field `TXEN` reader - SYNCBUSY for TXEN in CMD"] -pub type TXEN_R = crate::BitReader; +pub type TxenR = crate::BitReader; #[doc = "Field `TXDIS` reader - SYNCBUSY for TXDIS in CMD"] -pub type TXDIS_R = crate::BitReader; +pub type TxdisR = crate::BitReader; #[doc = "Field `RXBLOCKEN` reader - SYNCBUSY for RXBLOCKEN in CMD"] -pub type RXBLOCKEN_R = crate::BitReader; +pub type RxblockenR = crate::BitReader; #[doc = "Field `RXBLOCKDIS` reader - SYNCBUSY for RXBLOCKDIS in CMD"] -pub type RXBLOCKDIS_R = crate::BitReader; +pub type RxblockdisR = crate::BitReader; #[doc = "Field `TXTRIEN` reader - SYNCBUSY for TXTRIEN in CMD"] -pub type TXTRIEN_R = crate::BitReader; +pub type TxtrienR = crate::BitReader; #[doc = "Field `TXTRIDIS` reader - SYNCBUSY in TXTRIDIS in CMD"] -pub type TXTRIDIS_R = crate::BitReader; +pub type TxtridisR = crate::BitReader; #[doc = "Field `AUTOTXTEN` reader - SYNCBUSY for AUTOTXTEN in TRIGCTRL"] -pub type AUTOTXTEN_R = crate::BitReader; +pub type AutotxtenR = crate::BitReader; impl R { #[doc = "Bit 0 - SYNCBUSY for DIV in CLKDIV"] #[inline(always)] - pub fn div(&self) -> DIV_R { - DIV_R::new((self.bits & 1) != 0) + pub fn div(&self) -> DivR { + DivR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - SYNCBUSY for RXTEN in TRIGCTRL"] #[inline(always)] - pub fn rxten(&self) -> RXTEN_R { - RXTEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn rxten(&self) -> RxtenR { + RxtenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - SYNCBUSY for TXTEN in TRIGCTRL"] #[inline(always)] - pub fn txten(&self) -> TXTEN_R { - TXTEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn txten(&self) -> TxtenR { + TxtenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - SYNCBUSY for RXEN in CMD"] #[inline(always)] - pub fn rxen(&self) -> RXEN_R { - RXEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxen(&self) -> RxenR { + RxenR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - SYNCBUSY for RXDIS in CMD"] #[inline(always)] - pub fn rxdis(&self) -> RXDIS_R { - RXDIS_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxdis(&self) -> RxdisR { + RxdisR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - SYNCBUSY for TXEN in CMD"] #[inline(always)] - pub fn txen(&self) -> TXEN_R { - TXEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn txen(&self) -> TxenR { + TxenR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - SYNCBUSY for TXDIS in CMD"] #[inline(always)] - pub fn txdis(&self) -> TXDIS_R { - TXDIS_R::new(((self.bits >> 6) & 1) != 0) + pub fn txdis(&self) -> TxdisR { + TxdisR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - SYNCBUSY for RXBLOCKEN in CMD"] #[inline(always)] - pub fn rxblocken(&self) -> RXBLOCKEN_R { - RXBLOCKEN_R::new(((self.bits >> 7) & 1) != 0) + pub fn rxblocken(&self) -> RxblockenR { + RxblockenR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - SYNCBUSY for RXBLOCKDIS in CMD"] #[inline(always)] - pub fn rxblockdis(&self) -> RXBLOCKDIS_R { - RXBLOCKDIS_R::new(((self.bits >> 8) & 1) != 0) + pub fn rxblockdis(&self) -> RxblockdisR { + RxblockdisR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - SYNCBUSY for TXTRIEN in CMD"] #[inline(always)] - pub fn txtrien(&self) -> TXTRIEN_R { - TXTRIEN_R::new(((self.bits >> 9) & 1) != 0) + pub fn txtrien(&self) -> TxtrienR { + TxtrienR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - SYNCBUSY in TXTRIDIS in CMD"] #[inline(always)] - pub fn txtridis(&self) -> TXTRIDIS_R { - TXTRIDIS_R::new(((self.bits >> 10) & 1) != 0) + pub fn txtridis(&self) -> TxtridisR { + TxtridisR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - SYNCBUSY for AUTOTXTEN in TRIGCTRL"] #[inline(always)] - pub fn autotxten(&self) -> AUTOTXTEN_R { - AUTOTXTEN_R::new(((self.bits >> 11) & 1) != 0) + pub fn autotxten(&self) -> AutotxtenR { + AutotxtenR::new(((self.bits >> 11) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/timingcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/timingcfg.rs index ba30f19..8c1ed53 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/timingcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/timingcfg.rs @@ -1,595 +1,584 @@ #[doc = "Register `TIMINGCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMINGCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `TXDELAY` reader - TX Delay Transmission"] -pub type TXDELAY_R = crate::FieldReader; +pub type W = crate::W; #[doc = "TX Delay Transmission\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TXDELAY_A { +pub enum Txdelay { #[doc = "0: Frames are transmitted immediately."] - NONE = 0, + None = 0, #[doc = "1: Transmission of new frames is delayed by a single bit period."] - SINGLE = 1, + Single = 1, #[doc = "2: Transmission of new frames is delayed by a two bit periods."] - DOUBLE = 2, + Double = 2, #[doc = "3: Transmission of new frames is delayed by a three bit periods."] - TRIPPLE = 3, + Tripple = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TXDELAY_A) -> Self { + fn from(variant: Txdelay) -> Self { variant as _ } } -impl TXDELAY_R { +impl crate::FieldSpec for Txdelay { + type Ux = u8; +} +impl crate::IsEnum for Txdelay {} +#[doc = "Field `TXDELAY` reader - TX Delay Transmission"] +pub type TxdelayR = crate::FieldReader; +impl TxdelayR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXDELAY_A { + pub const fn variant(&self) -> Txdelay { match self.bits { - 0 => TXDELAY_A::NONE, - 1 => TXDELAY_A::SINGLE, - 2 => TXDELAY_A::DOUBLE, - 3 => TXDELAY_A::TRIPPLE, + 0 => Txdelay::None, + 1 => Txdelay::Single, + 2 => Txdelay::Double, + 3 => Txdelay::Tripple, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Frames are transmitted immediately."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == TXDELAY_A::NONE + *self == Txdelay::None } - #[doc = "Checks if the value of the field is `SINGLE`"] + #[doc = "Transmission of new frames is delayed by a single bit period."] #[inline(always)] pub fn is_single(&self) -> bool { - *self == TXDELAY_A::SINGLE + *self == Txdelay::Single } - #[doc = "Checks if the value of the field is `DOUBLE`"] + #[doc = "Transmission of new frames is delayed by a two bit periods."] #[inline(always)] pub fn is_double(&self) -> bool { - *self == TXDELAY_A::DOUBLE + *self == Txdelay::Double } - #[doc = "Checks if the value of the field is `TRIPPLE`"] + #[doc = "Transmission of new frames is delayed by a three bit periods."] #[inline(always)] pub fn is_tripple(&self) -> bool { - *self == TXDELAY_A::TRIPPLE + *self == Txdelay::Tripple } } #[doc = "Field `TXDELAY` writer - TX Delay Transmission"] -pub type TXDELAY_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, TIMINGCFG_SPEC, u8, TXDELAY_A, 2, O>; -impl<'a, const O: u8> TXDELAY_W<'a, O> { +pub type TxdelayW<'a, REG> = crate::FieldWriter<'a, REG, 2, Txdelay, crate::Safe>; +impl<'a, REG> TxdelayW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Frames are transmitted immediately."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(TXDELAY_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Txdelay::None) } #[doc = "Transmission of new frames is delayed by a single bit period."] #[inline(always)] - pub fn single(self) -> &'a mut W { - self.variant(TXDELAY_A::SINGLE) + pub fn single(self) -> &'a mut crate::W { + self.variant(Txdelay::Single) } #[doc = "Transmission of new frames is delayed by a two bit periods."] #[inline(always)] - pub fn double(self) -> &'a mut W { - self.variant(TXDELAY_A::DOUBLE) + pub fn double(self) -> &'a mut crate::W { + self.variant(Txdelay::Double) } #[doc = "Transmission of new frames is delayed by a three bit periods."] #[inline(always)] - pub fn tripple(self) -> &'a mut W { - self.variant(TXDELAY_A::TRIPPLE) + pub fn tripple(self) -> &'a mut crate::W { + self.variant(Txdelay::Tripple) } } -#[doc = "Field `CSSETUP` reader - Chip Select Setup"] -pub type CSSETUP_R = crate::FieldReader; #[doc = "Chip Select Setup\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CSSETUP_A { +pub enum Cssetup { #[doc = "0: CS is asserted half or 1 baud-time before the start of transmission depending on CLKPHASE equal to 1 or 0 respectively"] - ZERO = 0, + Zero = 0, #[doc = "1: CS is asserted 1 additional baud-time before start of transmission"] - ONE = 1, + One = 1, #[doc = "2: CS is asserted 2 additional baud-times before start of transmission"] - TWO = 2, + Two = 2, #[doc = "3: CS is asserted 3 additional baud-times before start of transmission"] - THREE = 3, + Three = 3, #[doc = "4: CS is asserted 4 additional baud-times before start of transmission"] - FOUR = 4, + Four = 4, #[doc = "5: CS is asserted 5 additional baud-times before start of transmission"] - FIVE = 5, + Five = 5, #[doc = "6: CS is asserted 6 additional baud-times before start of transmission"] - SIX = 6, + Six = 6, #[doc = "7: CS is asserted 7 additional baud-times before start of transmission"] - SEVEN = 7, + Seven = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CSSETUP_A) -> Self { + fn from(variant: Cssetup) -> Self { variant as _ } } -impl CSSETUP_R { +impl crate::FieldSpec for Cssetup { + type Ux = u8; +} +impl crate::IsEnum for Cssetup {} +#[doc = "Field `CSSETUP` reader - Chip Select Setup"] +pub type CssetupR = crate::FieldReader; +impl CssetupR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CSSETUP_A { + pub const fn variant(&self) -> Cssetup { match self.bits { - 0 => CSSETUP_A::ZERO, - 1 => CSSETUP_A::ONE, - 2 => CSSETUP_A::TWO, - 3 => CSSETUP_A::THREE, - 4 => CSSETUP_A::FOUR, - 5 => CSSETUP_A::FIVE, - 6 => CSSETUP_A::SIX, - 7 => CSSETUP_A::SEVEN, + 0 => Cssetup::Zero, + 1 => Cssetup::One, + 2 => Cssetup::Two, + 3 => Cssetup::Three, + 4 => Cssetup::Four, + 5 => Cssetup::Five, + 6 => Cssetup::Six, + 7 => Cssetup::Seven, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ZERO`"] + #[doc = "CS is asserted half or 1 baud-time before the start of transmission depending on CLKPHASE equal to 1 or 0 respectively"] #[inline(always)] pub fn is_zero(&self) -> bool { - *self == CSSETUP_A::ZERO + *self == Cssetup::Zero } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "CS is asserted 1 additional baud-time before start of transmission"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == CSSETUP_A::ONE + *self == Cssetup::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "CS is asserted 2 additional baud-times before start of transmission"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == CSSETUP_A::TWO + *self == Cssetup::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "CS is asserted 3 additional baud-times before start of transmission"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == CSSETUP_A::THREE + *self == Cssetup::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "CS is asserted 4 additional baud-times before start of transmission"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == CSSETUP_A::FOUR + *self == Cssetup::Four } - #[doc = "Checks if the value of the field is `FIVE`"] + #[doc = "CS is asserted 5 additional baud-times before start of transmission"] #[inline(always)] pub fn is_five(&self) -> bool { - *self == CSSETUP_A::FIVE + *self == Cssetup::Five } - #[doc = "Checks if the value of the field is `SIX`"] + #[doc = "CS is asserted 6 additional baud-times before start of transmission"] #[inline(always)] pub fn is_six(&self) -> bool { - *self == CSSETUP_A::SIX + *self == Cssetup::Six } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "CS is asserted 7 additional baud-times before start of transmission"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == CSSETUP_A::SEVEN + *self == Cssetup::Seven } } #[doc = "Field `CSSETUP` writer - Chip Select Setup"] -pub type CSSETUP_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, TIMINGCFG_SPEC, u8, CSSETUP_A, 3, O>; -impl<'a, const O: u8> CSSETUP_W<'a, O> { +pub type CssetupW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cssetup, crate::Safe>; +impl<'a, REG> CssetupW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "CS is asserted half or 1 baud-time before the start of transmission depending on CLKPHASE equal to 1 or 0 respectively"] #[inline(always)] - pub fn zero(self) -> &'a mut W { - self.variant(CSSETUP_A::ZERO) + pub fn zero(self) -> &'a mut crate::W { + self.variant(Cssetup::Zero) } #[doc = "CS is asserted 1 additional baud-time before start of transmission"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(CSSETUP_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Cssetup::One) } #[doc = "CS is asserted 2 additional baud-times before start of transmission"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(CSSETUP_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Cssetup::Two) } #[doc = "CS is asserted 3 additional baud-times before start of transmission"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(CSSETUP_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Cssetup::Three) } #[doc = "CS is asserted 4 additional baud-times before start of transmission"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(CSSETUP_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Cssetup::Four) } #[doc = "CS is asserted 5 additional baud-times before start of transmission"] #[inline(always)] - pub fn five(self) -> &'a mut W { - self.variant(CSSETUP_A::FIVE) + pub fn five(self) -> &'a mut crate::W { + self.variant(Cssetup::Five) } #[doc = "CS is asserted 6 additional baud-times before start of transmission"] #[inline(always)] - pub fn six(self) -> &'a mut W { - self.variant(CSSETUP_A::SIX) + pub fn six(self) -> &'a mut crate::W { + self.variant(Cssetup::Six) } #[doc = "CS is asserted 7 additional baud-times before start of transmission"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(CSSETUP_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Cssetup::Seven) } } -#[doc = "Field `CSHOLD` reader - Chip Select Hold"] -pub type CSHOLD_R = crate::FieldReader; #[doc = "Chip Select Hold\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CSHOLD_A { +pub enum Cshold { #[doc = "0: CS is de-asserted half or 1 baud-time after the end of transmission depending on CLKPHASE equal to 1 or 0 respectively"] - ZERO = 0, + Zero = 0, #[doc = "1: CS is de-asserted 1 additional baud-time after the end of transmission"] - ONE = 1, + One = 1, #[doc = "2: CS is de-asserted 2 additional baud-times after the end of transmission"] - TWO = 2, + Two = 2, #[doc = "3: CS is de-asserted 3 additional baud-times after the end of transmission"] - THREE = 3, + Three = 3, #[doc = "4: CS is de-asserted 4 additional baud-times after the end of transmission"] - FOUR = 4, + Four = 4, #[doc = "5: CS is de-asserted 5 additional baud-times after the end of transmission"] - FIVE = 5, + Five = 5, #[doc = "6: CS is de-asserted 6 additional baud-times after the end of transmission"] - SIX = 6, + Six = 6, #[doc = "7: CS is de-asserted 7 additional baud-times after the end of transmission"] - SEVEN = 7, + Seven = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CSHOLD_A) -> Self { + fn from(variant: Cshold) -> Self { variant as _ } } -impl CSHOLD_R { +impl crate::FieldSpec for Cshold { + type Ux = u8; +} +impl crate::IsEnum for Cshold {} +#[doc = "Field `CSHOLD` reader - Chip Select Hold"] +pub type CsholdR = crate::FieldReader; +impl CsholdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CSHOLD_A { + pub const fn variant(&self) -> Cshold { match self.bits { - 0 => CSHOLD_A::ZERO, - 1 => CSHOLD_A::ONE, - 2 => CSHOLD_A::TWO, - 3 => CSHOLD_A::THREE, - 4 => CSHOLD_A::FOUR, - 5 => CSHOLD_A::FIVE, - 6 => CSHOLD_A::SIX, - 7 => CSHOLD_A::SEVEN, + 0 => Cshold::Zero, + 1 => Cshold::One, + 2 => Cshold::Two, + 3 => Cshold::Three, + 4 => Cshold::Four, + 5 => Cshold::Five, + 6 => Cshold::Six, + 7 => Cshold::Seven, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ZERO`"] + #[doc = "CS is de-asserted half or 1 baud-time after the end of transmission depending on CLKPHASE equal to 1 or 0 respectively"] #[inline(always)] pub fn is_zero(&self) -> bool { - *self == CSHOLD_A::ZERO + *self == Cshold::Zero } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "CS is de-asserted 1 additional baud-time after the end of transmission"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == CSHOLD_A::ONE + *self == Cshold::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "CS is de-asserted 2 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == CSHOLD_A::TWO + *self == Cshold::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "CS is de-asserted 3 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == CSHOLD_A::THREE + *self == Cshold::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "CS is de-asserted 4 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == CSHOLD_A::FOUR + *self == Cshold::Four } - #[doc = "Checks if the value of the field is `FIVE`"] + #[doc = "CS is de-asserted 5 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_five(&self) -> bool { - *self == CSHOLD_A::FIVE + *self == Cshold::Five } - #[doc = "Checks if the value of the field is `SIX`"] + #[doc = "CS is de-asserted 6 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_six(&self) -> bool { - *self == CSHOLD_A::SIX + *self == Cshold::Six } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "CS is de-asserted 7 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == CSHOLD_A::SEVEN + *self == Cshold::Seven } } #[doc = "Field `CSHOLD` writer - Chip Select Hold"] -pub type CSHOLD_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, TIMINGCFG_SPEC, u8, CSHOLD_A, 3, O>; -impl<'a, const O: u8> CSHOLD_W<'a, O> { +pub type CsholdW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cshold, crate::Safe>; +impl<'a, REG> CsholdW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "CS is de-asserted half or 1 baud-time after the end of transmission depending on CLKPHASE equal to 1 or 0 respectively"] #[inline(always)] - pub fn zero(self) -> &'a mut W { - self.variant(CSHOLD_A::ZERO) + pub fn zero(self) -> &'a mut crate::W { + self.variant(Cshold::Zero) } #[doc = "CS is de-asserted 1 additional baud-time after the end of transmission"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(CSHOLD_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Cshold::One) } #[doc = "CS is de-asserted 2 additional baud-times after the end of transmission"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(CSHOLD_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Cshold::Two) } #[doc = "CS is de-asserted 3 additional baud-times after the end of transmission"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(CSHOLD_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Cshold::Three) } #[doc = "CS is de-asserted 4 additional baud-times after the end of transmission"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(CSHOLD_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Cshold::Four) } #[doc = "CS is de-asserted 5 additional baud-times after the end of transmission"] #[inline(always)] - pub fn five(self) -> &'a mut W { - self.variant(CSHOLD_A::FIVE) + pub fn five(self) -> &'a mut crate::W { + self.variant(Cshold::Five) } #[doc = "CS is de-asserted 6 additional baud-times after the end of transmission"] #[inline(always)] - pub fn six(self) -> &'a mut W { - self.variant(CSHOLD_A::SIX) + pub fn six(self) -> &'a mut crate::W { + self.variant(Cshold::Six) } #[doc = "CS is de-asserted 7 additional baud-times after the end of transmission"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(CSHOLD_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Cshold::Seven) } } -#[doc = "Field `ICS` reader - Inter-Character Spacing"] -pub type ICS_R = crate::FieldReader; #[doc = "Inter-Character Spacing\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICS_A { +pub enum Ics { #[doc = "0: There is no space between charcters"] - ZERO = 0, + Zero = 0, #[doc = "1: Create a space of 1 baud-times between frames"] - ONE = 1, + One = 1, #[doc = "2: Create a space of 2 baud-times between frames"] - TWO = 2, + Two = 2, #[doc = "3: Create a space of 3 baud-times between frames"] - THREE = 3, + Three = 3, #[doc = "4: Create a space of 4 baud-times between frames"] - FOUR = 4, + Four = 4, #[doc = "5: Create a space of 5 baud-times between frames"] - FIVE = 5, + Five = 5, #[doc = "6: Create a space of 6 baud-times between frames"] - SIX = 6, + Six = 6, #[doc = "7: Create a space of 7 baud-times between frames"] - SEVEN = 7, + Seven = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICS_A) -> Self { + fn from(variant: Ics) -> Self { variant as _ } } -impl ICS_R { +impl crate::FieldSpec for Ics { + type Ux = u8; +} +impl crate::IsEnum for Ics {} +#[doc = "Field `ICS` reader - Inter-Character Spacing"] +pub type IcsR = crate::FieldReader; +impl IcsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICS_A { + pub const fn variant(&self) -> Ics { match self.bits { - 0 => ICS_A::ZERO, - 1 => ICS_A::ONE, - 2 => ICS_A::TWO, - 3 => ICS_A::THREE, - 4 => ICS_A::FOUR, - 5 => ICS_A::FIVE, - 6 => ICS_A::SIX, - 7 => ICS_A::SEVEN, + 0 => Ics::Zero, + 1 => Ics::One, + 2 => Ics::Two, + 3 => Ics::Three, + 4 => Ics::Four, + 5 => Ics::Five, + 6 => Ics::Six, + 7 => Ics::Seven, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ZERO`"] + #[doc = "There is no space between charcters"] #[inline(always)] pub fn is_zero(&self) -> bool { - *self == ICS_A::ZERO + *self == Ics::Zero } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Create a space of 1 baud-times between frames"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == ICS_A::ONE + *self == Ics::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Create a space of 2 baud-times between frames"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == ICS_A::TWO + *self == Ics::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "Create a space of 3 baud-times between frames"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == ICS_A::THREE + *self == Ics::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Create a space of 4 baud-times between frames"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == ICS_A::FOUR + *self == Ics::Four } - #[doc = "Checks if the value of the field is `FIVE`"] + #[doc = "Create a space of 5 baud-times between frames"] #[inline(always)] pub fn is_five(&self) -> bool { - *self == ICS_A::FIVE + *self == Ics::Five } - #[doc = "Checks if the value of the field is `SIX`"] + #[doc = "Create a space of 6 baud-times between frames"] #[inline(always)] pub fn is_six(&self) -> bool { - *self == ICS_A::SIX + *self == Ics::Six } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "Create a space of 7 baud-times between frames"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == ICS_A::SEVEN + *self == Ics::Seven } } #[doc = "Field `ICS` writer - Inter-Character Spacing"] -pub type ICS_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, TIMINGCFG_SPEC, u8, ICS_A, 3, O>; -impl<'a, const O: u8> ICS_W<'a, O> { +pub type IcsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Ics, crate::Safe>; +impl<'a, REG> IcsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "There is no space between charcters"] #[inline(always)] - pub fn zero(self) -> &'a mut W { - self.variant(ICS_A::ZERO) + pub fn zero(self) -> &'a mut crate::W { + self.variant(Ics::Zero) } #[doc = "Create a space of 1 baud-times between frames"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(ICS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Ics::One) } #[doc = "Create a space of 2 baud-times between frames"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(ICS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Ics::Two) } #[doc = "Create a space of 3 baud-times between frames"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(ICS_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Ics::Three) } #[doc = "Create a space of 4 baud-times between frames"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(ICS_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Ics::Four) } #[doc = "Create a space of 5 baud-times between frames"] #[inline(always)] - pub fn five(self) -> &'a mut W { - self.variant(ICS_A::FIVE) + pub fn five(self) -> &'a mut crate::W { + self.variant(Ics::Five) } #[doc = "Create a space of 6 baud-times between frames"] #[inline(always)] - pub fn six(self) -> &'a mut W { - self.variant(ICS_A::SIX) + pub fn six(self) -> &'a mut crate::W { + self.variant(Ics::Six) } #[doc = "Create a space of 7 baud-times between frames"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(ICS_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Ics::Seven) } } #[doc = "Field `SETUPWINDOW` reader - Setup Window"] -pub type SETUPWINDOW_R = crate::FieldReader; +pub type SetupwindowR = crate::FieldReader; #[doc = "Field `SETUPWINDOW` writer - Setup Window"] -pub type SETUPWINDOW_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMINGCFG_SPEC, u8, u8, 4, O>; +pub type SetupwindowW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - TX Delay Transmission"] #[inline(always)] - pub fn txdelay(&self) -> TXDELAY_R { - TXDELAY_R::new((self.bits & 3) as u8) + pub fn txdelay(&self) -> TxdelayR { + TxdelayR::new((self.bits & 3) as u8) } #[doc = "Bits 4:6 - Chip Select Setup"] #[inline(always)] - pub fn cssetup(&self) -> CSSETUP_R { - CSSETUP_R::new(((self.bits >> 4) & 7) as u8) + pub fn cssetup(&self) -> CssetupR { + CssetupR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Chip Select Hold"] #[inline(always)] - pub fn cshold(&self) -> CSHOLD_R { - CSHOLD_R::new(((self.bits >> 8) & 7) as u8) + pub fn cshold(&self) -> CsholdR { + CsholdR::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Inter-Character Spacing"] #[inline(always)] - pub fn ics(&self) -> ICS_R { - ICS_R::new(((self.bits >> 12) & 7) as u8) + pub fn ics(&self) -> IcsR { + IcsR::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:19 - Setup Window"] #[inline(always)] - pub fn setupwindow(&self) -> SETUPWINDOW_R { - SETUPWINDOW_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn setupwindow(&self) -> SetupwindowR { + SetupwindowR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - TX Delay Transmission"] #[inline(always)] #[must_use] - pub fn txdelay(&mut self) -> TXDELAY_W<0> { - TXDELAY_W::new(self) + pub fn txdelay(&mut self) -> TxdelayW { + TxdelayW::new(self, 0) } #[doc = "Bits 4:6 - Chip Select Setup"] #[inline(always)] #[must_use] - pub fn cssetup(&mut self) -> CSSETUP_W<4> { - CSSETUP_W::new(self) + pub fn cssetup(&mut self) -> CssetupW { + CssetupW::new(self, 4) } #[doc = "Bits 8:10 - Chip Select Hold"] #[inline(always)] #[must_use] - pub fn cshold(&mut self) -> CSHOLD_W<8> { - CSHOLD_W::new(self) + pub fn cshold(&mut self) -> CsholdW { + CsholdW::new(self, 8) } #[doc = "Bits 12:14 - Inter-Character Spacing"] #[inline(always)] #[must_use] - pub fn ics(&mut self) -> ICS_W<12> { - ICS_W::new(self) + pub fn ics(&mut self) -> IcsW { + IcsW::new(self, 12) } #[doc = "Bits 16:19 - Setup Window"] #[inline(always)] #[must_use] - pub fn setupwindow(&mut self) -> SETUPWINDOW_W<16> { - SETUPWINDOW_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn setupwindow(&mut self) -> SetupwindowW { + SetupwindowW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timingcfg](index.html) module"] -pub struct TIMINGCFG_SPEC; -impl crate::RegisterSpec for TIMINGCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timingcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timingcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TimingcfgSpec; +impl crate::RegisterSpec for TimingcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [timingcfg::R](R) reader structure"] -impl crate::Readable for TIMINGCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timingcfg::W](W) writer structure"] -impl crate::Writable for TIMINGCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timingcfg::R`](R) reader structure"] +impl crate::Readable for TimingcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`timingcfg::W`](W) writer structure"] +impl crate::Writable for TimingcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMINGCFG to value 0x0005_0000"] -impl crate::Resettable for TIMINGCFG_SPEC { - const RESET_VALUE: Self::Ux = 0x0005_0000; +impl crate::Resettable for TimingcfgSpec { + const RESET_VALUE: u32 = 0x0005_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/trigctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/trigctrl.rs index 6e5750d..4b0d8fe 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/trigctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/trigctrl.rs @@ -1,110 +1,70 @@ #[doc = "Register `TRIGCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TRIGCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RXTEN` reader - Receive Trigger Enable"] -pub type RXTEN_R = crate::BitReader; +pub type RxtenR = crate::BitReader; #[doc = "Field `RXTEN` writer - Receive Trigger Enable"] -pub type RXTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type RxtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTEN` reader - Transmit Trigger Enable"] -pub type TXTEN_R = crate::BitReader; +pub type TxtenR = crate::BitReader; #[doc = "Field `TXTEN` writer - Transmit Trigger Enable"] -pub type TXTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type TxtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOTXTEN` reader - AUTOTX Trigger Enable"] -pub type AUTOTXTEN_R = crate::BitReader; +pub type AutotxtenR = crate::BitReader; #[doc = "Field `AUTOTXTEN` writer - AUTOTX Trigger Enable"] -pub type AUTOTXTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type AutotxtenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Receive Trigger Enable"] #[inline(always)] - pub fn rxten(&self) -> RXTEN_R { - RXTEN_R::new((self.bits & 1) != 0) + pub fn rxten(&self) -> RxtenR { + RxtenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transmit Trigger Enable"] #[inline(always)] - pub fn txten(&self) -> TXTEN_R { - TXTEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn txten(&self) -> TxtenR { + TxtenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - AUTOTX Trigger Enable"] #[inline(always)] - pub fn autotxten(&self) -> AUTOTXTEN_R { - AUTOTXTEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn autotxten(&self) -> AutotxtenR { + AutotxtenR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Receive Trigger Enable"] #[inline(always)] #[must_use] - pub fn rxten(&mut self) -> RXTEN_W<0> { - RXTEN_W::new(self) + pub fn rxten(&mut self) -> RxtenW { + RxtenW::new(self, 0) } #[doc = "Bit 1 - Transmit Trigger Enable"] #[inline(always)] #[must_use] - pub fn txten(&mut self) -> TXTEN_W<1> { - TXTEN_W::new(self) + pub fn txten(&mut self) -> TxtenW { + TxtenW::new(self, 1) } #[doc = "Bit 2 - AUTOTX Trigger Enable"] #[inline(always)] #[must_use] - pub fn autotxten(&mut self) -> AUTOTXTEN_W<2> { - AUTOTXTEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn autotxten(&mut self) -> AutotxtenW { + AutotxtenW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [trigctrl](index.html) module"] -pub struct TRIGCTRL_SPEC; -impl crate::RegisterSpec for TRIGCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`trigctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trigctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TrigctrlSpec; +impl crate::RegisterSpec for TrigctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [trigctrl::R](R) reader structure"] -impl crate::Readable for TRIGCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [trigctrl::W](W) writer structure"] -impl crate::Writable for TRIGCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`trigctrl::R`](R) reader structure"] +impl crate::Readable for TrigctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`trigctrl::W`](W) writer structure"] +impl crate::Writable for TrigctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TRIGCTRL to value 0"] -impl crate::Resettable for TRIGCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TrigctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/txdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/txdata.rs index 5605e30..48b104b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/txdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_ns/txdata.rs @@ -1,52 +1,27 @@ #[doc = "Register `TXDATA` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXDATA` writer - TX Data and Control bits"] -pub type TXDATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDATA_SPEC, u16, u16, 16, O>; +pub type TxdataW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl W { #[doc = "Bits 0:15 - TX Data and Control bits"] #[inline(always)] #[must_use] - pub fn txdata(&mut self) -> TXDATA_W<0> { - TXDATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txdata(&mut self) -> TxdataW { + TxdataW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdata](index.html) module"] -pub struct TXDATA_SPEC; -impl crate::RegisterSpec for TXDATA_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdata::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxdataSpec; +impl crate::RegisterSpec for TxdataSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [txdata::W](W) writer structure"] -impl crate::Writable for TXDATA_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`txdata::W`](W) writer structure"] +impl crate::Writable for TxdataSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXDATA to value 0"] -impl crate::Resettable for TXDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s.rs index b5a3c22..61ca07b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s.rs @@ -1,131 +1,259 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + cfg0: Cfg0, + cfg1: Cfg1, + cfg2: Cfg2, + framecfg: Framecfg, + dtxdatcfg: Dtxdatcfg, + irhfcfg: Irhfcfg, + _reserved8: [u8; 0x04], + timingcfg: Timingcfg, + startframecfg: Startframecfg, + sigframecfg: Sigframecfg, + clkdiv: Clkdiv, + trigctrl: Trigctrl, + cmd: Cmd, + rxdata: Rxdata, + rxdatap: Rxdatap, + txdata: Txdata, + status: Status, + if_: If, + ien: Ien, + syncbusy: Syncbusy, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub cfg0: CFG0, + #[inline(always)] + pub const fn cfg0(&self) -> &Cfg0 { + &self.cfg0 + } #[doc = "0x0c - No Description"] - pub cfg1: CFG1, + #[inline(always)] + pub const fn cfg1(&self) -> &Cfg1 { + &self.cfg1 + } #[doc = "0x10 - No Description"] - pub cfg2: CFG2, + #[inline(always)] + pub const fn cfg2(&self) -> &Cfg2 { + &self.cfg2 + } #[doc = "0x14 - No Description"] - pub framecfg: FRAMECFG, + #[inline(always)] + pub const fn framecfg(&self) -> &Framecfg { + &self.framecfg + } #[doc = "0x18 - No Description"] - pub dtxdatcfg: DTXDATCFG, + #[inline(always)] + pub const fn dtxdatcfg(&self) -> &Dtxdatcfg { + &self.dtxdatcfg + } #[doc = "0x1c - No Description"] - pub irhfcfg: IRHFCFG, - _reserved8: [u8; 0x04], + #[inline(always)] + pub const fn irhfcfg(&self) -> &Irhfcfg { + &self.irhfcfg + } #[doc = "0x24 - No Description"] - pub timingcfg: TIMINGCFG, + #[inline(always)] + pub const fn timingcfg(&self) -> &Timingcfg { + &self.timingcfg + } #[doc = "0x28 - No Description"] - pub startframecfg: STARTFRAMECFG, + #[inline(always)] + pub const fn startframecfg(&self) -> &Startframecfg { + &self.startframecfg + } #[doc = "0x2c - No Description"] - pub sigframecfg: SIGFRAMECFG, + #[inline(always)] + pub const fn sigframecfg(&self) -> &Sigframecfg { + &self.sigframecfg + } #[doc = "0x30 - No Description"] - pub clkdiv: CLKDIV, + #[inline(always)] + pub const fn clkdiv(&self) -> &Clkdiv { + &self.clkdiv + } #[doc = "0x34 - No Description"] - pub trigctrl: TRIGCTRL, + #[inline(always)] + pub const fn trigctrl(&self) -> &Trigctrl { + &self.trigctrl + } #[doc = "0x38 - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x3c - No Description"] - pub rxdata: RXDATA, + #[inline(always)] + pub const fn rxdata(&self) -> &Rxdata { + &self.rxdata + } #[doc = "0x40 - No Description"] - pub rxdatap: RXDATAP, + #[inline(always)] + pub const fn rxdatap(&self) -> &Rxdatap { + &self.rxdatap + } #[doc = "0x44 - No Description"] - pub txdata: TXDATA, + #[inline(always)] + pub const fn txdata(&self) -> &Txdata { + &self.txdata + } #[doc = "0x48 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x4c - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x50 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x54 - No Description"] - pub syncbusy: SYNCBUSY, + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CFG0 (rw) register accessor: an alias for `Reg`"] -pub type CFG0 = crate::Reg; +#[doc = "CFG0 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg0`] +module"] +#[doc(alias = "CFG0")] +pub type Cfg0 = crate::Reg; #[doc = "No Description"] pub mod cfg0; -#[doc = "CFG1 (rw) register accessor: an alias for `Reg`"] -pub type CFG1 = crate::Reg; +#[doc = "CFG1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg1`] +module"] +#[doc(alias = "CFG1")] +pub type Cfg1 = crate::Reg; #[doc = "No Description"] pub mod cfg1; -#[doc = "CFG2 (rw) register accessor: an alias for `Reg`"] -pub type CFG2 = crate::Reg; +#[doc = "CFG2 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg2`] +module"] +#[doc(alias = "CFG2")] +pub type Cfg2 = crate::Reg; #[doc = "No Description"] pub mod cfg2; -#[doc = "FRAMECFG (rw) register accessor: an alias for `Reg`"] -pub type FRAMECFG = crate::Reg; +#[doc = "FRAMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`framecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`framecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@framecfg`] +module"] +#[doc(alias = "FRAMECFG")] +pub type Framecfg = crate::Reg; #[doc = "No Description"] pub mod framecfg; -#[doc = "DTXDATCFG (rw) register accessor: an alias for `Reg`"] -pub type DTXDATCFG = crate::Reg; +#[doc = "DTXDATCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtxdatcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtxdatcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtxdatcfg`] +module"] +#[doc(alias = "DTXDATCFG")] +pub type Dtxdatcfg = crate::Reg; #[doc = "No Description"] pub mod dtxdatcfg; -#[doc = "IRHFCFG (rw) register accessor: an alias for `Reg`"] -pub type IRHFCFG = crate::Reg; +#[doc = "IRHFCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`irhfcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irhfcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irhfcfg`] +module"] +#[doc(alias = "IRHFCFG")] +pub type Irhfcfg = crate::Reg; #[doc = "No Description"] pub mod irhfcfg; -#[doc = "TIMINGCFG (rw) register accessor: an alias for `Reg`"] -pub type TIMINGCFG = crate::Reg; +#[doc = "TIMINGCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timingcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timingcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timingcfg`] +module"] +#[doc(alias = "TIMINGCFG")] +pub type Timingcfg = crate::Reg; #[doc = "No Description"] pub mod timingcfg; -#[doc = "STARTFRAMECFG (rw) register accessor: an alias for `Reg`"] -pub type STARTFRAMECFG = crate::Reg; +#[doc = "STARTFRAMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`startframecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`startframecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@startframecfg`] +module"] +#[doc(alias = "STARTFRAMECFG")] +pub type Startframecfg = crate::Reg; #[doc = "No Description"] pub mod startframecfg; -#[doc = "SIGFRAMECFG (rw) register accessor: an alias for `Reg`"] -pub type SIGFRAMECFG = crate::Reg; +#[doc = "SIGFRAMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sigframecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sigframecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sigframecfg`] +module"] +#[doc(alias = "SIGFRAMECFG")] +pub type Sigframecfg = crate::Reg; #[doc = "No Description"] pub mod sigframecfg; -#[doc = "CLKDIV (rw) register accessor: an alias for `Reg`"] -pub type CLKDIV = crate::Reg; +#[doc = "CLKDIV (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv`] +module"] +#[doc(alias = "CLKDIV")] +pub type Clkdiv = crate::Reg; #[doc = "No Description"] pub mod clkdiv; -#[doc = "TRIGCTRL (rw) register accessor: an alias for `Reg`"] -pub type TRIGCTRL = crate::Reg; +#[doc = "TRIGCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`trigctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trigctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trigctrl`] +module"] +#[doc(alias = "TRIGCTRL")] +pub type Trigctrl = crate::Reg; #[doc = "No Description"] pub mod trigctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "RXDATA (r) register accessor: an alias for `Reg`"] -pub type RXDATA = crate::Reg; +#[doc = "RXDATA (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdata::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdata`] +module"] +#[doc(alias = "RXDATA")] +pub type Rxdata = crate::Reg; #[doc = "No Description"] pub mod rxdata; -#[doc = "RXDATAP (r) register accessor: an alias for `Reg`"] -pub type RXDATAP = crate::Reg; +#[doc = "RXDATAP (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdatap::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdatap`] +module"] +#[doc(alias = "RXDATAP")] +pub type Rxdatap = crate::Reg; #[doc = "No Description"] pub mod rxdatap; -#[doc = "TXDATA (w) register accessor: an alias for `Reg`"] -pub type TXDATA = crate::Reg; +#[doc = "TXDATA (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdata::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txdata`] +module"] +#[doc(alias = "TXDATA")] +pub type Txdata = crate::Reg; #[doc = "No Description"] pub mod txdata; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "No Description"] pub mod syncbusy; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/cfg0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/cfg0.rs index 89b67d3..f0c8da6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/cfg0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/cfg0.rs @@ -1,249 +1,227 @@ #[doc = "Register `CFG0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SYNC` reader - Synchronous Mode"] -pub type SYNC_R = crate::BitReader; +pub type W = crate::W; #[doc = "Synchronous Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYNC_A { +pub enum Sync { #[doc = "0: The EUSART operates in asynchronous mode"] - ASYNC = 0, + Async = 0, #[doc = "1: The EUSART operates in synchronous mode"] - SYNC = 1, + Sync = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYNC_A) -> Self { + fn from(variant: Sync) -> Self { variant as u8 != 0 } } -impl SYNC_R { +#[doc = "Field `SYNC` reader - Synchronous Mode"] +pub type SyncR = crate::BitReader; +impl SyncR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SYNC_A { + pub const fn variant(&self) -> Sync { match self.bits { - false => SYNC_A::ASYNC, - true => SYNC_A::SYNC, + false => Sync::Async, + true => Sync::Sync, } } - #[doc = "Checks if the value of the field is `ASYNC`"] + #[doc = "The EUSART operates in asynchronous mode"] #[inline(always)] pub fn is_async(&self) -> bool { - *self == SYNC_A::ASYNC + *self == Sync::Async } - #[doc = "Checks if the value of the field is `SYNC`"] + #[doc = "The EUSART operates in synchronous mode"] #[inline(always)] pub fn is_sync(&self) -> bool { - *self == SYNC_A::SYNC + *self == Sync::Sync } } #[doc = "Field `SYNC` writer - Synchronous Mode"] -pub type SYNC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, SYNC_A, O>; -impl<'a, const O: u8> SYNC_W<'a, O> { +pub type SyncW<'a, REG> = crate::BitWriter<'a, REG, Sync>; +impl<'a, REG> SyncW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The EUSART operates in asynchronous mode"] #[inline(always)] - pub fn async_(self) -> &'a mut W { - self.variant(SYNC_A::ASYNC) + pub fn async_(self) -> &'a mut crate::W { + self.variant(Sync::Async) } #[doc = "The EUSART operates in synchronous mode"] #[inline(always)] - pub fn sync(self) -> &'a mut W { - self.variant(SYNC_A::SYNC) + pub fn sync(self) -> &'a mut crate::W { + self.variant(Sync::Sync) } } -#[doc = "Field `LOOPBK` reader - Loopback Enable"] -pub type LOOPBK_R = crate::BitReader; #[doc = "Loopback Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOOPBK_A { +pub enum Loopbk { #[doc = "0: The receiver is connected to and receives data from UARTn_RX"] - DISABLE = 0, + Disable = 0, #[doc = "1: The receiver is connected to and receives data from UARTn_TX"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOOPBK_A) -> Self { + fn from(variant: Loopbk) -> Self { variant as u8 != 0 } } -impl LOOPBK_R { +#[doc = "Field `LOOPBK` reader - Loopback Enable"] +pub type LoopbkR = crate::BitReader; +impl LoopbkR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOOPBK_A { + pub const fn variant(&self) -> Loopbk { match self.bits { - false => LOOPBK_A::DISABLE, - true => LOOPBK_A::ENABLE, + false => Loopbk::Disable, + true => Loopbk::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The receiver is connected to and receives data from UARTn_RX"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == LOOPBK_A::DISABLE + *self == Loopbk::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The receiver is connected to and receives data from UARTn_TX"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == LOOPBK_A::ENABLE + *self == Loopbk::Enable } } #[doc = "Field `LOOPBK` writer - Loopback Enable"] -pub type LOOPBK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, LOOPBK_A, O>; -impl<'a, const O: u8> LOOPBK_W<'a, O> { +pub type LoopbkW<'a, REG> = crate::BitWriter<'a, REG, Loopbk>; +impl<'a, REG> LoopbkW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The receiver is connected to and receives data from UARTn_RX"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(LOOPBK_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Loopbk::Disable) } #[doc = "The receiver is connected to and receives data from UARTn_TX"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(LOOPBK_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Loopbk::Enable) } } -#[doc = "Field `CCEN` reader - Collision Check Enable"] -pub type CCEN_R = crate::BitReader; #[doc = "Collision Check Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCEN_A { +pub enum Ccen { #[doc = "0: Collision check is disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Collision check is enabled. The receiver must be enabled for the check to be performed"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCEN_A) -> Self { + fn from(variant: Ccen) -> Self { variant as u8 != 0 } } -impl CCEN_R { +#[doc = "Field `CCEN` reader - Collision Check Enable"] +pub type CcenR = crate::BitReader; +impl CcenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCEN_A { + pub const fn variant(&self) -> Ccen { match self.bits { - false => CCEN_A::DISABLE, - true => CCEN_A::ENABLE, + false => Ccen::Disable, + true => Ccen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Collision check is disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CCEN_A::DISABLE + *self == Ccen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Collision check is enabled. The receiver must be enabled for the check to be performed"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CCEN_A::ENABLE + *self == Ccen::Enable } } #[doc = "Field `CCEN` writer - Collision Check Enable"] -pub type CCEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, CCEN_A, O>; -impl<'a, const O: u8> CCEN_W<'a, O> { +pub type CcenW<'a, REG> = crate::BitWriter<'a, REG, Ccen>; +impl<'a, REG> CcenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Collision check is disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CCEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ccen::Disable) } #[doc = "Collision check is enabled. The receiver must be enabled for the check to be performed"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CCEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Ccen::Enable) } } -#[doc = "Field `MPM` reader - Multi-Processor Mode"] -pub type MPM_R = crate::BitReader; #[doc = "Multi-Processor Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MPM_A { +pub enum Mpm { #[doc = "0: The 9th bit of incoming frames has no special function"] - DISABLE = 0, + Disable = 0, #[doc = "1: An incoming frame with the 9th bit equal to MPAB will be loaded into the RX FIFO regardless of RXBLOCK and will result in the MPAB interrupt flag being set"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MPM_A) -> Self { + fn from(variant: Mpm) -> Self { variant as u8 != 0 } } -impl MPM_R { +#[doc = "Field `MPM` reader - Multi-Processor Mode"] +pub type MpmR = crate::BitReader; +impl MpmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MPM_A { + pub const fn variant(&self) -> Mpm { match self.bits { - false => MPM_A::DISABLE, - true => MPM_A::ENABLE, + false => Mpm::Disable, + true => Mpm::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The 9th bit of incoming frames has no special function"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == MPM_A::DISABLE + *self == Mpm::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "An incoming frame with the 9th bit equal to MPAB will be loaded into the RX FIFO regardless of RXBLOCK and will result in the MPAB interrupt flag being set"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == MPM_A::ENABLE + *self == Mpm::Enable } } #[doc = "Field `MPM` writer - Multi-Processor Mode"] -pub type MPM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, MPM_A, O>; -impl<'a, const O: u8> MPM_W<'a, O> { +pub type MpmW<'a, REG> = crate::BitWriter<'a, REG, Mpm>; +impl<'a, REG> MpmW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The 9th bit of incoming frames has no special function"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(MPM_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Mpm::Disable) } #[doc = "An incoming frame with the 9th bit equal to MPAB will be loaded into the RX FIFO regardless of RXBLOCK and will result in the MPAB interrupt flag being set"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(MPM_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Mpm::Enable) } } #[doc = "Field `MPAB` reader - Multi-Processor Address-Bit"] -pub type MPAB_R = crate::BitReader; +pub type MpabR = crate::BitReader; #[doc = "Field `MPAB` writer - Multi-Processor Address-Bit"] -pub type MPAB_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, O>; -#[doc = "Field `OVS` reader - Oversampling"] -pub type OVS_R = crate::FieldReader; +pub type MpabW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Oversampling\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum OVS_A { +pub enum Ovs { #[doc = "0: 16X oversampling"] X16 = 0, #[doc = "1: 8X oversampling"] @@ -253,646 +231,669 @@ pub enum OVS_A { #[doc = "3: 4X oversampling"] X4 = 3, #[doc = "4: Disable oversampling (for LF operation)"] - DISABLE = 4, + Disable = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: OVS_A) -> Self { + fn from(variant: Ovs) -> Self { variant as _ } } -impl OVS_R { +impl crate::FieldSpec for Ovs { + type Ux = u8; +} +impl crate::IsEnum for Ovs {} +#[doc = "Field `OVS` reader - Oversampling"] +pub type OvsR = crate::FieldReader; +impl OvsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(OVS_A::X16), - 1 => Some(OVS_A::X8), - 2 => Some(OVS_A::X6), - 3 => Some(OVS_A::X4), - 4 => Some(OVS_A::DISABLE), + 0 => Some(Ovs::X16), + 1 => Some(Ovs::X8), + 2 => Some(Ovs::X6), + 3 => Some(Ovs::X4), + 4 => Some(Ovs::Disable), _ => None, } } - #[doc = "Checks if the value of the field is `X16`"] + #[doc = "16X oversampling"] #[inline(always)] pub fn is_x16(&self) -> bool { - *self == OVS_A::X16 + *self == Ovs::X16 } - #[doc = "Checks if the value of the field is `X8`"] + #[doc = "8X oversampling"] #[inline(always)] pub fn is_x8(&self) -> bool { - *self == OVS_A::X8 + *self == Ovs::X8 } - #[doc = "Checks if the value of the field is `X6`"] + #[doc = "6X oversampling"] #[inline(always)] pub fn is_x6(&self) -> bool { - *self == OVS_A::X6 + *self == Ovs::X6 } - #[doc = "Checks if the value of the field is `X4`"] + #[doc = "4X oversampling"] #[inline(always)] pub fn is_x4(&self) -> bool { - *self == OVS_A::X4 + *self == Ovs::X4 } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable oversampling (for LF operation)"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == OVS_A::DISABLE + *self == Ovs::Disable } } #[doc = "Field `OVS` writer - Oversampling"] -pub type OVS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG0_SPEC, u8, OVS_A, 3, O>; -impl<'a, const O: u8> OVS_W<'a, O> { +pub type OvsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Ovs>; +impl<'a, REG> OvsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "16X oversampling"] #[inline(always)] - pub fn x16(self) -> &'a mut W { - self.variant(OVS_A::X16) + pub fn x16(self) -> &'a mut crate::W { + self.variant(Ovs::X16) } #[doc = "8X oversampling"] #[inline(always)] - pub fn x8(self) -> &'a mut W { - self.variant(OVS_A::X8) + pub fn x8(self) -> &'a mut crate::W { + self.variant(Ovs::X8) } #[doc = "6X oversampling"] #[inline(always)] - pub fn x6(self) -> &'a mut W { - self.variant(OVS_A::X6) + pub fn x6(self) -> &'a mut crate::W { + self.variant(Ovs::X6) } #[doc = "4X oversampling"] #[inline(always)] - pub fn x4(self) -> &'a mut W { - self.variant(OVS_A::X4) + pub fn x4(self) -> &'a mut crate::W { + self.variant(Ovs::X4) } #[doc = "Disable oversampling (for LF operation)"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(OVS_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ovs::Disable) } } -#[doc = "Field `MSBF` reader - Most Significant Bit First"] -pub type MSBF_R = crate::BitReader; #[doc = "Most Significant Bit First\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MSBF_A { +pub enum Msbf { #[doc = "0: Data is sent with the least significant bit first"] - DISABLE = 0, + Disable = 0, #[doc = "1: Data is sent with the most significant bit first"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MSBF_A) -> Self { + fn from(variant: Msbf) -> Self { variant as u8 != 0 } } -impl MSBF_R { +#[doc = "Field `MSBF` reader - Most Significant Bit First"] +pub type MsbfR = crate::BitReader; +impl MsbfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MSBF_A { + pub const fn variant(&self) -> Msbf { match self.bits { - false => MSBF_A::DISABLE, - true => MSBF_A::ENABLE, + false => Msbf::Disable, + true => Msbf::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Data is sent with the least significant bit first"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == MSBF_A::DISABLE + *self == Msbf::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Data is sent with the most significant bit first"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == MSBF_A::ENABLE + *self == Msbf::Enable } } #[doc = "Field `MSBF` writer - Most Significant Bit First"] -pub type MSBF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, MSBF_A, O>; -impl<'a, const O: u8> MSBF_W<'a, O> { +pub type MsbfW<'a, REG> = crate::BitWriter<'a, REG, Msbf>; +impl<'a, REG> MsbfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Data is sent with the least significant bit first"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(MSBF_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Msbf::Disable) } #[doc = "Data is sent with the most significant bit first"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(MSBF_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Msbf::Enable) } } -#[doc = "Field `RXINV` reader - Receiver Input Invert"] -pub type RXINV_R = crate::BitReader; #[doc = "Receiver Input Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RXINV_A { +pub enum Rxinv { #[doc = "0: Input is passed directly to the receiver"] - DISABLE = 0, + Disable = 0, #[doc = "1: Input is inverted before it is passed to the receiver"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RXINV_A) -> Self { + fn from(variant: Rxinv) -> Self { variant as u8 != 0 } } -impl RXINV_R { +#[doc = "Field `RXINV` reader - Receiver Input Invert"] +pub type RxinvR = crate::BitReader; +impl RxinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RXINV_A { + pub const fn variant(&self) -> Rxinv { match self.bits { - false => RXINV_A::DISABLE, - true => RXINV_A::ENABLE, + false => Rxinv::Disable, + true => Rxinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Input is passed directly to the receiver"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RXINV_A::DISABLE + *self == Rxinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Input is inverted before it is passed to the receiver"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RXINV_A::ENABLE + *self == Rxinv::Enable } } #[doc = "Field `RXINV` writer - Receiver Input Invert"] -pub type RXINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, RXINV_A, O>; -impl<'a, const O: u8> RXINV_W<'a, O> { +pub type RxinvW<'a, REG> = crate::BitWriter<'a, REG, Rxinv>; +impl<'a, REG> RxinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Input is passed directly to the receiver"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RXINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Rxinv::Disable) } #[doc = "Input is inverted before it is passed to the receiver"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RXINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Rxinv::Enable) } } -#[doc = "Field `TXINV` reader - Transmitter output Invert"] -pub type TXINV_R = crate::BitReader; #[doc = "Transmitter output Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TXINV_A { +pub enum Txinv { #[doc = "0: Output from the transmitter is passed unchanged to UARTn_TX"] - DISABLE = 0, + Disable = 0, #[doc = "1: Output from the transmitter is inverted before it is passed to UARTn_TX"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TXINV_A) -> Self { + fn from(variant: Txinv) -> Self { variant as u8 != 0 } } -impl TXINV_R { +#[doc = "Field `TXINV` reader - Transmitter output Invert"] +pub type TxinvR = crate::BitReader; +impl TxinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXINV_A { + pub const fn variant(&self) -> Txinv { match self.bits { - false => TXINV_A::DISABLE, - true => TXINV_A::ENABLE, + false => Txinv::Disable, + true => Txinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Output from the transmitter is passed unchanged to UARTn_TX"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == TXINV_A::DISABLE + *self == Txinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Output from the transmitter is inverted before it is passed to UARTn_TX"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == TXINV_A::ENABLE + *self == Txinv::Enable } } #[doc = "Field `TXINV` writer - Transmitter output Invert"] -pub type TXINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, TXINV_A, O>; -impl<'a, const O: u8> TXINV_W<'a, O> { +pub type TxinvW<'a, REG> = crate::BitWriter<'a, REG, Txinv>; +impl<'a, REG> TxinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Output from the transmitter is passed unchanged to UARTn_TX"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(TXINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Txinv::Disable) } #[doc = "Output from the transmitter is inverted before it is passed to UARTn_TX"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(TXINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Txinv::Enable) } } -#[doc = "Field `AUTOTRI` reader - Automatic TX Tristate"] -pub type AUTOTRI_R = crate::BitReader; #[doc = "Automatic TX Tristate\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AUTOTRI_A { +pub enum Autotri { #[doc = "0: The output on UARTn_TX when the transmitter is idle is defined by TXINV"] - DISABLE = 0, + Disable = 0, #[doc = "1: UARTn_TX is tristated whenever the transmitter is idle"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AUTOTRI_A) -> Self { + fn from(variant: Autotri) -> Self { variant as u8 != 0 } } -impl AUTOTRI_R { +#[doc = "Field `AUTOTRI` reader - Automatic TX Tristate"] +pub type AutotriR = crate::BitReader; +impl AutotriR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> AUTOTRI_A { + pub const fn variant(&self) -> Autotri { match self.bits { - false => AUTOTRI_A::DISABLE, - true => AUTOTRI_A::ENABLE, + false => Autotri::Disable, + true => Autotri::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The output on UARTn_TX when the transmitter is idle is defined by TXINV"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == AUTOTRI_A::DISABLE + *self == Autotri::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "UARTn_TX is tristated whenever the transmitter is idle"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == AUTOTRI_A::ENABLE + *self == Autotri::Enable } } #[doc = "Field `AUTOTRI` writer - Automatic TX Tristate"] -pub type AUTOTRI_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, AUTOTRI_A, O>; -impl<'a, const O: u8> AUTOTRI_W<'a, O> { +pub type AutotriW<'a, REG> = crate::BitWriter<'a, REG, Autotri>; +impl<'a, REG> AutotriW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The output on UARTn_TX when the transmitter is idle is defined by TXINV"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(AUTOTRI_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Autotri::Disable) } #[doc = "UARTn_TX is tristated whenever the transmitter is idle"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(AUTOTRI_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Autotri::Enable) } } #[doc = "Field `SKIPPERRF` reader - Skip Parity Error Frames"] -pub type SKIPPERRF_R = crate::BitReader; +pub type SkipperrfR = crate::BitReader; #[doc = "Field `SKIPPERRF` writer - Skip Parity Error Frames"] -pub type SKIPPERRF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, O>; -#[doc = "Field `ERRSDMA` reader - Halt DMA Read On Error"] -pub type ERRSDMA_R = crate::BitReader; +pub type SkipperrfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Halt DMA Read On Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRSDMA_A { +pub enum Errsdma { #[doc = "0: Framing and parity errors have no effect on DMA requests from the EUSART"] - DISABLE = 0, + Disable = 0, #[doc = "1: DMA requests from the EUSART are blocked while the PERR or FERR interrupt flags are set"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRSDMA_A) -> Self { + fn from(variant: Errsdma) -> Self { variant as u8 != 0 } } -impl ERRSDMA_R { +#[doc = "Field `ERRSDMA` reader - Halt DMA Read On Error"] +pub type ErrsdmaR = crate::BitReader; +impl ErrsdmaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ERRSDMA_A { + pub const fn variant(&self) -> Errsdma { match self.bits { - false => ERRSDMA_A::DISABLE, - true => ERRSDMA_A::ENABLE, + false => Errsdma::Disable, + true => Errsdma::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Framing and parity errors have no effect on DMA requests from the EUSART"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ERRSDMA_A::DISABLE + *self == Errsdma::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "DMA requests from the EUSART are blocked while the PERR or FERR interrupt flags are set"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ERRSDMA_A::ENABLE + *self == Errsdma::Enable } } #[doc = "Field `ERRSDMA` writer - Halt DMA Read On Error"] -pub type ERRSDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, ERRSDMA_A, O>; -impl<'a, const O: u8> ERRSDMA_W<'a, O> { +pub type ErrsdmaW<'a, REG> = crate::BitWriter<'a, REG, Errsdma>; +impl<'a, REG> ErrsdmaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Framing and parity errors have no effect on DMA requests from the EUSART"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ERRSDMA_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Errsdma::Disable) } #[doc = "DMA requests from the EUSART are blocked while the PERR or FERR interrupt flags are set"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ERRSDMA_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Errsdma::Enable) } } -#[doc = "Field `ERRSRX` reader - Disable RX On Error"] -pub type ERRSRX_R = crate::BitReader; #[doc = "Disable RX On Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRSRX_A { +pub enum Errsrx { #[doc = "0: Framing and parity errors have no effect on receiver"] - DISABLE = 0, + Disable = 0, #[doc = "1: Framing and parity errors disable the receiver"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRSRX_A) -> Self { + fn from(variant: Errsrx) -> Self { variant as u8 != 0 } } -impl ERRSRX_R { +#[doc = "Field `ERRSRX` reader - Disable RX On Error"] +pub type ErrsrxR = crate::BitReader; +impl ErrsrxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ERRSRX_A { + pub const fn variant(&self) -> Errsrx { match self.bits { - false => ERRSRX_A::DISABLE, - true => ERRSRX_A::ENABLE, + false => Errsrx::Disable, + true => Errsrx::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Framing and parity errors have no effect on receiver"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ERRSRX_A::DISABLE + *self == Errsrx::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Framing and parity errors disable the receiver"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ERRSRX_A::ENABLE + *self == Errsrx::Enable } } #[doc = "Field `ERRSRX` writer - Disable RX On Error"] -pub type ERRSRX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, ERRSRX_A, O>; -impl<'a, const O: u8> ERRSRX_W<'a, O> { +pub type ErrsrxW<'a, REG> = crate::BitWriter<'a, REG, Errsrx>; +impl<'a, REG> ErrsrxW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Framing and parity errors have no effect on receiver"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ERRSRX_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Errsrx::Disable) } #[doc = "Framing and parity errors disable the receiver"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ERRSRX_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Errsrx::Enable) } } -#[doc = "Field `ERRSTX` reader - Disable TX On Error"] -pub type ERRSTX_R = crate::BitReader; #[doc = "Disable TX On Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRSTX_A { +pub enum Errstx { #[doc = "0: Received framing and parity errors have no effect on transmitter"] - DISABLE = 0, + Disable = 0, #[doc = "1: Received framing and parity errors disable the transmitter"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRSTX_A) -> Self { + fn from(variant: Errstx) -> Self { variant as u8 != 0 } } -impl ERRSTX_R { +#[doc = "Field `ERRSTX` reader - Disable TX On Error"] +pub type ErrstxR = crate::BitReader; +impl ErrstxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ERRSTX_A { + pub const fn variant(&self) -> Errstx { match self.bits { - false => ERRSTX_A::DISABLE, - true => ERRSTX_A::ENABLE, + false => Errstx::Disable, + true => Errstx::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Received framing and parity errors have no effect on transmitter"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ERRSTX_A::DISABLE + *self == Errstx::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Received framing and parity errors disable the transmitter"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ERRSTX_A::ENABLE + *self == Errstx::Enable } } #[doc = "Field `ERRSTX` writer - Disable TX On Error"] -pub type ERRSTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, ERRSTX_A, O>; -impl<'a, const O: u8> ERRSTX_W<'a, O> { +pub type ErrstxW<'a, REG> = crate::BitWriter<'a, REG, Errstx>; +impl<'a, REG> ErrstxW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Received framing and parity errors have no effect on transmitter"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ERRSTX_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Errstx::Disable) } #[doc = "Received framing and parity errors disable the transmitter"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ERRSTX_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Errstx::Enable) } } #[doc = "Field `MVDIS` reader - Majority Vote Disable"] -pub type MVDIS_R = crate::BitReader; +pub type MvdisR = crate::BitReader; #[doc = "Field `MVDIS` writer - Majority Vote Disable"] -pub type MVDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, O>; +pub type MvdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOBAUDEN` reader - AUTOBAUD detection enable"] -pub type AUTOBAUDEN_R = crate::BitReader; +pub type AutobaudenR = crate::BitReader; #[doc = "Field `AUTOBAUDEN` writer - AUTOBAUD detection enable"] -pub type AUTOBAUDEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, O>; +pub type AutobaudenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Synchronous Mode"] #[inline(always)] - pub fn sync(&self) -> SYNC_R { - SYNC_R::new((self.bits & 1) != 0) + pub fn sync(&self) -> SyncR { + SyncR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Loopback Enable"] #[inline(always)] - pub fn loopbk(&self) -> LOOPBK_R { - LOOPBK_R::new(((self.bits >> 1) & 1) != 0) + pub fn loopbk(&self) -> LoopbkR { + LoopbkR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Collision Check Enable"] #[inline(always)] - pub fn ccen(&self) -> CCEN_R { - CCEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn ccen(&self) -> CcenR { + CcenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Multi-Processor Mode"] #[inline(always)] - pub fn mpm(&self) -> MPM_R { - MPM_R::new(((self.bits >> 3) & 1) != 0) + pub fn mpm(&self) -> MpmR { + MpmR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Multi-Processor Address-Bit"] #[inline(always)] - pub fn mpab(&self) -> MPAB_R { - MPAB_R::new(((self.bits >> 4) & 1) != 0) + pub fn mpab(&self) -> MpabR { + MpabR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 5:7 - Oversampling"] #[inline(always)] - pub fn ovs(&self) -> OVS_R { - OVS_R::new(((self.bits >> 5) & 7) as u8) + pub fn ovs(&self) -> OvsR { + OvsR::new(((self.bits >> 5) & 7) as u8) } #[doc = "Bit 10 - Most Significant Bit First"] #[inline(always)] - pub fn msbf(&self) -> MSBF_R { - MSBF_R::new(((self.bits >> 10) & 1) != 0) + pub fn msbf(&self) -> MsbfR { + MsbfR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 13 - Receiver Input Invert"] #[inline(always)] - pub fn rxinv(&self) -> RXINV_R { - RXINV_R::new(((self.bits >> 13) & 1) != 0) + pub fn rxinv(&self) -> RxinvR { + RxinvR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Transmitter output Invert"] #[inline(always)] - pub fn txinv(&self) -> TXINV_R { - TXINV_R::new(((self.bits >> 14) & 1) != 0) + pub fn txinv(&self) -> TxinvR { + TxinvR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 17 - Automatic TX Tristate"] #[inline(always)] - pub fn autotri(&self) -> AUTOTRI_R { - AUTOTRI_R::new(((self.bits >> 17) & 1) != 0) + pub fn autotri(&self) -> AutotriR { + AutotriR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 20 - Skip Parity Error Frames"] #[inline(always)] - pub fn skipperrf(&self) -> SKIPPERRF_R { - SKIPPERRF_R::new(((self.bits >> 20) & 1) != 0) + pub fn skipperrf(&self) -> SkipperrfR { + SkipperrfR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 22 - Halt DMA Read On Error"] #[inline(always)] - pub fn errsdma(&self) -> ERRSDMA_R { - ERRSDMA_R::new(((self.bits >> 22) & 1) != 0) + pub fn errsdma(&self) -> ErrsdmaR { + ErrsdmaR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Disable RX On Error"] #[inline(always)] - pub fn errsrx(&self) -> ERRSRX_R { - ERRSRX_R::new(((self.bits >> 23) & 1) != 0) + pub fn errsrx(&self) -> ErrsrxR { + ErrsrxR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - Disable TX On Error"] #[inline(always)] - pub fn errstx(&self) -> ERRSTX_R { - ERRSTX_R::new(((self.bits >> 24) & 1) != 0) + pub fn errstx(&self) -> ErrstxR { + ErrstxR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 30 - Majority Vote Disable"] #[inline(always)] - pub fn mvdis(&self) -> MVDIS_R { - MVDIS_R::new(((self.bits >> 30) & 1) != 0) + pub fn mvdis(&self) -> MvdisR { + MvdisR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - AUTOBAUD detection enable"] #[inline(always)] - pub fn autobauden(&self) -> AUTOBAUDEN_R { - AUTOBAUDEN_R::new(((self.bits >> 31) & 1) != 0) + pub fn autobauden(&self) -> AutobaudenR { + AutobaudenR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Synchronous Mode"] #[inline(always)] #[must_use] - pub fn sync(&mut self) -> SYNC_W<0> { - SYNC_W::new(self) + pub fn sync(&mut self) -> SyncW { + SyncW::new(self, 0) } #[doc = "Bit 1 - Loopback Enable"] #[inline(always)] #[must_use] - pub fn loopbk(&mut self) -> LOOPBK_W<1> { - LOOPBK_W::new(self) + pub fn loopbk(&mut self) -> LoopbkW { + LoopbkW::new(self, 1) } #[doc = "Bit 2 - Collision Check Enable"] #[inline(always)] #[must_use] - pub fn ccen(&mut self) -> CCEN_W<2> { - CCEN_W::new(self) + pub fn ccen(&mut self) -> CcenW { + CcenW::new(self, 2) } #[doc = "Bit 3 - Multi-Processor Mode"] #[inline(always)] #[must_use] - pub fn mpm(&mut self) -> MPM_W<3> { - MPM_W::new(self) + pub fn mpm(&mut self) -> MpmW { + MpmW::new(self, 3) } #[doc = "Bit 4 - Multi-Processor Address-Bit"] #[inline(always)] #[must_use] - pub fn mpab(&mut self) -> MPAB_W<4> { - MPAB_W::new(self) + pub fn mpab(&mut self) -> MpabW { + MpabW::new(self, 4) } #[doc = "Bits 5:7 - Oversampling"] #[inline(always)] #[must_use] - pub fn ovs(&mut self) -> OVS_W<5> { - OVS_W::new(self) + pub fn ovs(&mut self) -> OvsW { + OvsW::new(self, 5) } #[doc = "Bit 10 - Most Significant Bit First"] #[inline(always)] #[must_use] - pub fn msbf(&mut self) -> MSBF_W<10> { - MSBF_W::new(self) + pub fn msbf(&mut self) -> MsbfW { + MsbfW::new(self, 10) } #[doc = "Bit 13 - Receiver Input Invert"] #[inline(always)] #[must_use] - pub fn rxinv(&mut self) -> RXINV_W<13> { - RXINV_W::new(self) + pub fn rxinv(&mut self) -> RxinvW { + RxinvW::new(self, 13) } #[doc = "Bit 14 - Transmitter output Invert"] #[inline(always)] #[must_use] - pub fn txinv(&mut self) -> TXINV_W<14> { - TXINV_W::new(self) + pub fn txinv(&mut self) -> TxinvW { + TxinvW::new(self, 14) } #[doc = "Bit 17 - Automatic TX Tristate"] #[inline(always)] #[must_use] - pub fn autotri(&mut self) -> AUTOTRI_W<17> { - AUTOTRI_W::new(self) + pub fn autotri(&mut self) -> AutotriW { + AutotriW::new(self, 17) } #[doc = "Bit 20 - Skip Parity Error Frames"] #[inline(always)] #[must_use] - pub fn skipperrf(&mut self) -> SKIPPERRF_W<20> { - SKIPPERRF_W::new(self) + pub fn skipperrf(&mut self) -> SkipperrfW { + SkipperrfW::new(self, 20) } #[doc = "Bit 22 - Halt DMA Read On Error"] #[inline(always)] #[must_use] - pub fn errsdma(&mut self) -> ERRSDMA_W<22> { - ERRSDMA_W::new(self) + pub fn errsdma(&mut self) -> ErrsdmaW { + ErrsdmaW::new(self, 22) } #[doc = "Bit 23 - Disable RX On Error"] #[inline(always)] #[must_use] - pub fn errsrx(&mut self) -> ERRSRX_W<23> { - ERRSRX_W::new(self) + pub fn errsrx(&mut self) -> ErrsrxW { + ErrsrxW::new(self, 23) } #[doc = "Bit 24 - Disable TX On Error"] #[inline(always)] #[must_use] - pub fn errstx(&mut self) -> ERRSTX_W<24> { - ERRSTX_W::new(self) + pub fn errstx(&mut self) -> ErrstxW { + ErrstxW::new(self, 24) } #[doc = "Bit 30 - Majority Vote Disable"] #[inline(always)] #[must_use] - pub fn mvdis(&mut self) -> MVDIS_W<30> { - MVDIS_W::new(self) + pub fn mvdis(&mut self) -> MvdisW { + MvdisW::new(self, 30) } #[doc = "Bit 31 - AUTOBAUD detection enable"] #[inline(always)] #[must_use] - pub fn autobauden(&mut self) -> AUTOBAUDEN_W<31> { - AUTOBAUDEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn autobauden(&mut self) -> AutobaudenW { + AutobaudenW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg0](index.html) module"] -pub struct CFG0_SPEC; -impl crate::RegisterSpec for CFG0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cfg0Spec; +impl crate::RegisterSpec for Cfg0Spec { type Ux = u32; } -#[doc = "`read()` method returns [cfg0::R](R) reader structure"] -impl crate::Readable for CFG0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg0::W](W) writer structure"] -impl crate::Writable for CFG0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg0::R`](R) reader structure"] +impl crate::Readable for Cfg0Spec {} +#[doc = "`write(|w| ..)` method takes [`cfg0::W`](W) writer structure"] +impl crate::Writable for Cfg0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG0 to value 0"] -impl crate::Resettable for CFG0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cfg0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/cfg1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/cfg1.rs index 1607689..73dbb48 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/cfg1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/cfg1.rs @@ -1,1217 +1,1219 @@ #[doc = "Register `CFG1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DBGHALT` reader - Debug halt"] -pub type DBGHALT_R = crate::BitReader; +pub type W = crate::W; #[doc = "Debug halt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DBGHALT_A { +pub enum Dbghalt { #[doc = "0: Continue normal EUSART operation even if core is halted"] - DISABLE = 0, + Disable = 0, #[doc = "1: If core is halted, receive one frame and then halt reception by deactivating RTS. Next frame reception happens when the core is unhalted during single stepping."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DBGHALT_A) -> Self { + fn from(variant: Dbghalt) -> Self { variant as u8 != 0 } } -impl DBGHALT_R { +#[doc = "Field `DBGHALT` reader - Debug halt"] +pub type DbghaltR = crate::BitReader; +impl DbghaltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DBGHALT_A { + pub const fn variant(&self) -> Dbghalt { match self.bits { - false => DBGHALT_A::DISABLE, - true => DBGHALT_A::ENABLE, + false => Dbghalt::Disable, + true => Dbghalt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Continue normal EUSART operation even if core is halted"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == DBGHALT_A::DISABLE + *self == Dbghalt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "If core is halted, receive one frame and then halt reception by deactivating RTS. Next frame reception happens when the core is unhalted during single stepping."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == DBGHALT_A::ENABLE + *self == Dbghalt::Enable } } #[doc = "Field `DBGHALT` writer - Debug halt"] -pub type DBGHALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, DBGHALT_A, O>; -impl<'a, const O: u8> DBGHALT_W<'a, O> { +pub type DbghaltW<'a, REG> = crate::BitWriter<'a, REG, Dbghalt>; +impl<'a, REG> DbghaltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Continue normal EUSART operation even if core is halted"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(DBGHALT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Dbghalt::Disable) } #[doc = "If core is halted, receive one frame and then halt reception by deactivating RTS. Next frame reception happens when the core is unhalted during single stepping."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(DBGHALT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Dbghalt::Enable) } } -#[doc = "Field `CTSINV` reader - Clear-to-send Invert Enable"] -pub type CTSINV_R = crate::BitReader; #[doc = "Clear-to-send Invert Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CTSINV_A { +pub enum Ctsinv { #[doc = "0: The CTS pin is active low"] - DISABLE = 0, + Disable = 0, #[doc = "1: The CTS pin is active high"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CTSINV_A) -> Self { + fn from(variant: Ctsinv) -> Self { variant as u8 != 0 } } -impl CTSINV_R { +#[doc = "Field `CTSINV` reader - Clear-to-send Invert Enable"] +pub type CtsinvR = crate::BitReader; +impl CtsinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CTSINV_A { + pub const fn variant(&self) -> Ctsinv { match self.bits { - false => CTSINV_A::DISABLE, - true => CTSINV_A::ENABLE, + false => Ctsinv::Disable, + true => Ctsinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The CTS pin is active low"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CTSINV_A::DISABLE + *self == Ctsinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The CTS pin is active high"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CTSINV_A::ENABLE + *self == Ctsinv::Enable } } #[doc = "Field `CTSINV` writer - Clear-to-send Invert Enable"] -pub type CTSINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, CTSINV_A, O>; -impl<'a, const O: u8> CTSINV_W<'a, O> { +pub type CtsinvW<'a, REG> = crate::BitWriter<'a, REG, Ctsinv>; +impl<'a, REG> CtsinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The CTS pin is active low"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CTSINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ctsinv::Disable) } #[doc = "The CTS pin is active high"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CTSINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Ctsinv::Enable) } } -#[doc = "Field `CTSEN` reader - Clear-to-send Enable"] -pub type CTSEN_R = crate::BitReader; #[doc = "Clear-to-send Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CTSEN_A { +pub enum Ctsen { #[doc = "0: Ignore CTS"] - DISABLE = 0, + Disable = 0, #[doc = "1: Stop transmitting when CTS is inactive"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CTSEN_A) -> Self { + fn from(variant: Ctsen) -> Self { variant as u8 != 0 } } -impl CTSEN_R { +#[doc = "Field `CTSEN` reader - Clear-to-send Enable"] +pub type CtsenR = crate::BitReader; +impl CtsenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CTSEN_A { + pub const fn variant(&self) -> Ctsen { match self.bits { - false => CTSEN_A::DISABLE, - true => CTSEN_A::ENABLE, + false => Ctsen::Disable, + true => Ctsen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Ignore CTS"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CTSEN_A::DISABLE + *self == Ctsen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Stop transmitting when CTS is inactive"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CTSEN_A::ENABLE + *self == Ctsen::Enable } } #[doc = "Field `CTSEN` writer - Clear-to-send Enable"] -pub type CTSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, CTSEN_A, O>; -impl<'a, const O: u8> CTSEN_W<'a, O> { +pub type CtsenW<'a, REG> = crate::BitWriter<'a, REG, Ctsen>; +impl<'a, REG> CtsenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Ignore CTS"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CTSEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ctsen::Disable) } #[doc = "Stop transmitting when CTS is inactive"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CTSEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Ctsen::Enable) } } -#[doc = "Field `RTSINV` reader - Request-to-send Invert Enable"] -pub type RTSINV_R = crate::BitReader; #[doc = "Request-to-send Invert Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTSINV_A { +pub enum Rtsinv { #[doc = "0: The RTS pin is active low"] - DISABLE = 0, + Disable = 0, #[doc = "1: The RTS pin is active high"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTSINV_A) -> Self { + fn from(variant: Rtsinv) -> Self { variant as u8 != 0 } } -impl RTSINV_R { +#[doc = "Field `RTSINV` reader - Request-to-send Invert Enable"] +pub type RtsinvR = crate::BitReader; +impl RtsinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RTSINV_A { + pub const fn variant(&self) -> Rtsinv { match self.bits { - false => RTSINV_A::DISABLE, - true => RTSINV_A::ENABLE, + false => Rtsinv::Disable, + true => Rtsinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The RTS pin is active low"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RTSINV_A::DISABLE + *self == Rtsinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The RTS pin is active high"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RTSINV_A::ENABLE + *self == Rtsinv::Enable } } #[doc = "Field `RTSINV` writer - Request-to-send Invert Enable"] -pub type RTSINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, RTSINV_A, O>; -impl<'a, const O: u8> RTSINV_W<'a, O> { +pub type RtsinvW<'a, REG> = crate::BitWriter<'a, REG, Rtsinv>; +impl<'a, REG> RtsinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The RTS pin is active low"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RTSINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Rtsinv::Disable) } #[doc = "The RTS pin is active high"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RTSINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Rtsinv::Enable) } } -#[doc = "Field `RXTIMEOUT` reader - RX Timeout"] -pub type RXTIMEOUT_R = crate::FieldReader; #[doc = "RX Timeout\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RXTIMEOUT_A { +pub enum Rxtimeout { #[doc = "0: DISABLED"] - DISABLED = 0, + Disabled = 0, #[doc = "1: ONEFRAME"] - ONEFRAME = 1, + Oneframe = 1, #[doc = "2: TWOFRAMES"] - TWOFRAMES = 2, + Twoframes = 2, #[doc = "3: THREEFRAMES"] - THREEFRAMES = 3, + Threeframes = 3, #[doc = "4: FOURFRAMES"] - FOURFRAMES = 4, + Fourframes = 4, #[doc = "5: FIVEFRAMES"] - FIVEFRAMES = 5, + Fiveframes = 5, #[doc = "6: SIXFRAMES"] - SIXFRAMES = 6, + Sixframes = 6, #[doc = "7: SEVENFRAMES"] - SEVENFRAMES = 7, + Sevenframes = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RXTIMEOUT_A) -> Self { + fn from(variant: Rxtimeout) -> Self { variant as _ } } -impl RXTIMEOUT_R { +impl crate::FieldSpec for Rxtimeout { + type Ux = u8; +} +impl crate::IsEnum for Rxtimeout {} +#[doc = "Field `RXTIMEOUT` reader - RX Timeout"] +pub type RxtimeoutR = crate::FieldReader; +impl RxtimeoutR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RXTIMEOUT_A { + pub const fn variant(&self) -> Rxtimeout { match self.bits { - 0 => RXTIMEOUT_A::DISABLED, - 1 => RXTIMEOUT_A::ONEFRAME, - 2 => RXTIMEOUT_A::TWOFRAMES, - 3 => RXTIMEOUT_A::THREEFRAMES, - 4 => RXTIMEOUT_A::FOURFRAMES, - 5 => RXTIMEOUT_A::FIVEFRAMES, - 6 => RXTIMEOUT_A::SIXFRAMES, - 7 => RXTIMEOUT_A::SEVENFRAMES, + 0 => Rxtimeout::Disabled, + 1 => Rxtimeout::Oneframe, + 2 => Rxtimeout::Twoframes, + 3 => Rxtimeout::Threeframes, + 4 => Rxtimeout::Fourframes, + 5 => Rxtimeout::Fiveframes, + 6 => Rxtimeout::Sixframes, + 7 => Rxtimeout::Sevenframes, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "DISABLED"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == RXTIMEOUT_A::DISABLED + *self == Rxtimeout::Disabled } - #[doc = "Checks if the value of the field is `ONEFRAME`"] + #[doc = "ONEFRAME"] #[inline(always)] pub fn is_oneframe(&self) -> bool { - *self == RXTIMEOUT_A::ONEFRAME + *self == Rxtimeout::Oneframe } - #[doc = "Checks if the value of the field is `TWOFRAMES`"] + #[doc = "TWOFRAMES"] #[inline(always)] pub fn is_twoframes(&self) -> bool { - *self == RXTIMEOUT_A::TWOFRAMES + *self == Rxtimeout::Twoframes } - #[doc = "Checks if the value of the field is `THREEFRAMES`"] + #[doc = "THREEFRAMES"] #[inline(always)] pub fn is_threeframes(&self) -> bool { - *self == RXTIMEOUT_A::THREEFRAMES + *self == Rxtimeout::Threeframes } - #[doc = "Checks if the value of the field is `FOURFRAMES`"] + #[doc = "FOURFRAMES"] #[inline(always)] pub fn is_fourframes(&self) -> bool { - *self == RXTIMEOUT_A::FOURFRAMES + *self == Rxtimeout::Fourframes } - #[doc = "Checks if the value of the field is `FIVEFRAMES`"] + #[doc = "FIVEFRAMES"] #[inline(always)] pub fn is_fiveframes(&self) -> bool { - *self == RXTIMEOUT_A::FIVEFRAMES + *self == Rxtimeout::Fiveframes } - #[doc = "Checks if the value of the field is `SIXFRAMES`"] + #[doc = "SIXFRAMES"] #[inline(always)] pub fn is_sixframes(&self) -> bool { - *self == RXTIMEOUT_A::SIXFRAMES + *self == Rxtimeout::Sixframes } - #[doc = "Checks if the value of the field is `SEVENFRAMES`"] + #[doc = "SEVENFRAMES"] #[inline(always)] pub fn is_sevenframes(&self) -> bool { - *self == RXTIMEOUT_A::SEVENFRAMES + *self == Rxtimeout::Sevenframes } } #[doc = "Field `RXTIMEOUT` writer - RX Timeout"] -pub type RXTIMEOUT_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CFG1_SPEC, u8, RXTIMEOUT_A, 3, O>; -impl<'a, const O: u8> RXTIMEOUT_W<'a, O> { +pub type RxtimeoutW<'a, REG> = crate::FieldWriter<'a, REG, 3, Rxtimeout, crate::Safe>; +impl<'a, REG> RxtimeoutW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "DISABLED"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Disabled) } #[doc = "ONEFRAME"] #[inline(always)] - pub fn oneframe(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::ONEFRAME) + pub fn oneframe(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Oneframe) } #[doc = "TWOFRAMES"] #[inline(always)] - pub fn twoframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::TWOFRAMES) + pub fn twoframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Twoframes) } #[doc = "THREEFRAMES"] #[inline(always)] - pub fn threeframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::THREEFRAMES) + pub fn threeframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Threeframes) } #[doc = "FOURFRAMES"] #[inline(always)] - pub fn fourframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::FOURFRAMES) + pub fn fourframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Fourframes) } #[doc = "FIVEFRAMES"] #[inline(always)] - pub fn fiveframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::FIVEFRAMES) + pub fn fiveframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Fiveframes) } #[doc = "SIXFRAMES"] #[inline(always)] - pub fn sixframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::SIXFRAMES) + pub fn sixframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Sixframes) } #[doc = "SEVENFRAMES"] #[inline(always)] - pub fn sevenframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::SEVENFRAMES) + pub fn sevenframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Sevenframes) } } #[doc = "Field `SFUBRX` reader - Start Frame Unblock Receiver"] -pub type SFUBRX_R = crate::BitReader; +pub type SfubrxR = crate::BitReader; #[doc = "Field `SFUBRX` writer - Start Frame Unblock Receiver"] -pub type SFUBRX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, bool, O>; +pub type SfubrxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXPRSEN` reader - PRS RX Enable"] -pub type RXPRSEN_R = crate::BitReader; +pub type RxprsenR = crate::BitReader; #[doc = "Field `RXPRSEN` writer - PRS RX Enable"] -pub type RXPRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, bool, O>; -#[doc = "Field `TXFIW` reader - TX FIFO Interrupt Watermark"] -pub type TXFIW_R = crate::FieldReader; +pub type RxprsenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "TX FIFO Interrupt Watermark\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TXFIW_A { +pub enum Txfiw { #[doc = "0: TXFL status flag and IF are set when the TX FIFO has space for at least one more frame."] - ONEFRAME = 0, + Oneframe = 0, #[doc = "1: TXFL status flag and IF are set when the TX FIFO has space for at least two more frames."] - TWOFRAMES = 1, + Twoframes = 1, #[doc = "2: TXFL status flag and IF are set when the TX FIFO has space for at least three more frames."] - THREEFRAMES = 2, + Threeframes = 2, #[doc = "3: TXFL status flag and IF are set when the TX FIFO has space for at least four more frames."] - FOURFRAMES = 3, + Fourframes = 3, #[doc = "4: TXFL status flag and IF are set when the TX FIFO has space for at least five more frames."] - FIVEFRAMES = 4, + Fiveframes = 4, #[doc = "5: TXFL status flag and IF are set when the TX FIFO has space for at least six more frames."] - SIXFRAMES = 5, + Sixframes = 5, #[doc = "6: TXFL status flag and IF are set when the TX FIFO has space for at least seven more frames."] - SEVENFRAMES = 6, + Sevenframes = 6, #[doc = "7: TXFL status flag and IF are set when the TX FIFO has space for at least eight more frames."] - EIGHTFRAMES = 7, + Eightframes = 7, #[doc = "8: TXFL status flag and IF are set when the TX FIFO has space for at least nine more frames."] - NINEFRAMES = 8, + Nineframes = 8, #[doc = "9: TXFL status flag and IF are set when the TX FIFO has space for at least ten more frames."] - TENFRAMES = 9, + Tenframes = 9, #[doc = "10: TXFL status flag and IF are set when the TX FIFO has space for at least eleven more frames."] - ELEVENFRAMES = 10, + Elevenframes = 10, #[doc = "11: TXFL status flag and IF are set when the TX FIFO has space for at least twelve more frames."] - TWELVEFRAMES = 11, + Twelveframes = 11, #[doc = "12: TXFL status flag and IF are set when the TX FIFO has space for at least thriteen more frames."] - THIRTEENFRAMES = 12, + Thirteenframes = 12, #[doc = "13: TXFL status flag and IF are set when the TX FIFO has space for at least fourteen more frames."] - FOURTEENFRAMES = 13, + Fourteenframes = 13, #[doc = "14: TXFL status flag and IF are set when the TX FIFO has space for at least fifteen more frames."] - FIFTEENFRAMES = 14, + Fifteenframes = 14, #[doc = "15: TXFL status flag and IF are set when the TX FIFO has space for at least sixteen more frames."] - SIXTEENFRAMES = 15, + Sixteenframes = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TXFIW_A) -> Self { + fn from(variant: Txfiw) -> Self { variant as _ } } -impl TXFIW_R { +impl crate::FieldSpec for Txfiw { + type Ux = u8; +} +impl crate::IsEnum for Txfiw {} +#[doc = "Field `TXFIW` reader - TX FIFO Interrupt Watermark"] +pub type TxfiwR = crate::FieldReader; +impl TxfiwR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXFIW_A { + pub const fn variant(&self) -> Txfiw { match self.bits { - 0 => TXFIW_A::ONEFRAME, - 1 => TXFIW_A::TWOFRAMES, - 2 => TXFIW_A::THREEFRAMES, - 3 => TXFIW_A::FOURFRAMES, - 4 => TXFIW_A::FIVEFRAMES, - 5 => TXFIW_A::SIXFRAMES, - 6 => TXFIW_A::SEVENFRAMES, - 7 => TXFIW_A::EIGHTFRAMES, - 8 => TXFIW_A::NINEFRAMES, - 9 => TXFIW_A::TENFRAMES, - 10 => TXFIW_A::ELEVENFRAMES, - 11 => TXFIW_A::TWELVEFRAMES, - 12 => TXFIW_A::THIRTEENFRAMES, - 13 => TXFIW_A::FOURTEENFRAMES, - 14 => TXFIW_A::FIFTEENFRAMES, - 15 => TXFIW_A::SIXTEENFRAMES, + 0 => Txfiw::Oneframe, + 1 => Txfiw::Twoframes, + 2 => Txfiw::Threeframes, + 3 => Txfiw::Fourframes, + 4 => Txfiw::Fiveframes, + 5 => Txfiw::Sixframes, + 6 => Txfiw::Sevenframes, + 7 => Txfiw::Eightframes, + 8 => Txfiw::Nineframes, + 9 => Txfiw::Tenframes, + 10 => Txfiw::Elevenframes, + 11 => Txfiw::Twelveframes, + 12 => Txfiw::Thirteenframes, + 13 => Txfiw::Fourteenframes, + 14 => Txfiw::Fifteenframes, + 15 => Txfiw::Sixteenframes, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONEFRAME`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least one more frame."] #[inline(always)] pub fn is_oneframe(&self) -> bool { - *self == TXFIW_A::ONEFRAME + *self == Txfiw::Oneframe } - #[doc = "Checks if the value of the field is `TWOFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least two more frames."] #[inline(always)] pub fn is_twoframes(&self) -> bool { - *self == TXFIW_A::TWOFRAMES + *self == Txfiw::Twoframes } - #[doc = "Checks if the value of the field is `THREEFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least three more frames."] #[inline(always)] pub fn is_threeframes(&self) -> bool { - *self == TXFIW_A::THREEFRAMES + *self == Txfiw::Threeframes } - #[doc = "Checks if the value of the field is `FOURFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least four more frames."] #[inline(always)] pub fn is_fourframes(&self) -> bool { - *self == TXFIW_A::FOURFRAMES + *self == Txfiw::Fourframes } - #[doc = "Checks if the value of the field is `FIVEFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least five more frames."] #[inline(always)] pub fn is_fiveframes(&self) -> bool { - *self == TXFIW_A::FIVEFRAMES + *self == Txfiw::Fiveframes } - #[doc = "Checks if the value of the field is `SIXFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least six more frames."] #[inline(always)] pub fn is_sixframes(&self) -> bool { - *self == TXFIW_A::SIXFRAMES + *self == Txfiw::Sixframes } - #[doc = "Checks if the value of the field is `SEVENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least seven more frames."] #[inline(always)] pub fn is_sevenframes(&self) -> bool { - *self == TXFIW_A::SEVENFRAMES + *self == Txfiw::Sevenframes } - #[doc = "Checks if the value of the field is `EIGHTFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least eight more frames."] #[inline(always)] pub fn is_eightframes(&self) -> bool { - *self == TXFIW_A::EIGHTFRAMES + *self == Txfiw::Eightframes } - #[doc = "Checks if the value of the field is `NINEFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least nine more frames."] #[inline(always)] pub fn is_nineframes(&self) -> bool { - *self == TXFIW_A::NINEFRAMES + *self == Txfiw::Nineframes } - #[doc = "Checks if the value of the field is `TENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least ten more frames."] #[inline(always)] pub fn is_tenframes(&self) -> bool { - *self == TXFIW_A::TENFRAMES + *self == Txfiw::Tenframes } - #[doc = "Checks if the value of the field is `ELEVENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least eleven more frames."] #[inline(always)] pub fn is_elevenframes(&self) -> bool { - *self == TXFIW_A::ELEVENFRAMES + *self == Txfiw::Elevenframes } - #[doc = "Checks if the value of the field is `TWELVEFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least twelve more frames."] #[inline(always)] pub fn is_twelveframes(&self) -> bool { - *self == TXFIW_A::TWELVEFRAMES + *self == Txfiw::Twelveframes } - #[doc = "Checks if the value of the field is `THIRTEENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least thriteen more frames."] #[inline(always)] pub fn is_thirteenframes(&self) -> bool { - *self == TXFIW_A::THIRTEENFRAMES + *self == Txfiw::Thirteenframes } - #[doc = "Checks if the value of the field is `FOURTEENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least fourteen more frames."] #[inline(always)] pub fn is_fourteenframes(&self) -> bool { - *self == TXFIW_A::FOURTEENFRAMES + *self == Txfiw::Fourteenframes } - #[doc = "Checks if the value of the field is `FIFTEENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least fifteen more frames."] #[inline(always)] pub fn is_fifteenframes(&self) -> bool { - *self == TXFIW_A::FIFTEENFRAMES + *self == Txfiw::Fifteenframes } - #[doc = "Checks if the value of the field is `SIXTEENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least sixteen more frames."] #[inline(always)] pub fn is_sixteenframes(&self) -> bool { - *self == TXFIW_A::SIXTEENFRAMES + *self == Txfiw::Sixteenframes } } #[doc = "Field `TXFIW` writer - TX FIFO Interrupt Watermark"] -pub type TXFIW_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG1_SPEC, u8, TXFIW_A, 4, O>; -impl<'a, const O: u8> TXFIW_W<'a, O> { +pub type TxfiwW<'a, REG> = crate::FieldWriter<'a, REG, 4, Txfiw, crate::Safe>; +impl<'a, REG> TxfiwW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least one more frame."] #[inline(always)] - pub fn oneframe(self) -> &'a mut W { - self.variant(TXFIW_A::ONEFRAME) + pub fn oneframe(self) -> &'a mut crate::W { + self.variant(Txfiw::Oneframe) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least two more frames."] #[inline(always)] - pub fn twoframes(self) -> &'a mut W { - self.variant(TXFIW_A::TWOFRAMES) + pub fn twoframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Twoframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least three more frames."] #[inline(always)] - pub fn threeframes(self) -> &'a mut W { - self.variant(TXFIW_A::THREEFRAMES) + pub fn threeframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Threeframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least four more frames."] #[inline(always)] - pub fn fourframes(self) -> &'a mut W { - self.variant(TXFIW_A::FOURFRAMES) + pub fn fourframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Fourframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least five more frames."] #[inline(always)] - pub fn fiveframes(self) -> &'a mut W { - self.variant(TXFIW_A::FIVEFRAMES) + pub fn fiveframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Fiveframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least six more frames."] #[inline(always)] - pub fn sixframes(self) -> &'a mut W { - self.variant(TXFIW_A::SIXFRAMES) + pub fn sixframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Sixframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least seven more frames."] #[inline(always)] - pub fn sevenframes(self) -> &'a mut W { - self.variant(TXFIW_A::SEVENFRAMES) + pub fn sevenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Sevenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least eight more frames."] #[inline(always)] - pub fn eightframes(self) -> &'a mut W { - self.variant(TXFIW_A::EIGHTFRAMES) + pub fn eightframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Eightframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least nine more frames."] #[inline(always)] - pub fn nineframes(self) -> &'a mut W { - self.variant(TXFIW_A::NINEFRAMES) + pub fn nineframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Nineframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least ten more frames."] #[inline(always)] - pub fn tenframes(self) -> &'a mut W { - self.variant(TXFIW_A::TENFRAMES) + pub fn tenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Tenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least eleven more frames."] #[inline(always)] - pub fn elevenframes(self) -> &'a mut W { - self.variant(TXFIW_A::ELEVENFRAMES) + pub fn elevenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Elevenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least twelve more frames."] #[inline(always)] - pub fn twelveframes(self) -> &'a mut W { - self.variant(TXFIW_A::TWELVEFRAMES) + pub fn twelveframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Twelveframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least thriteen more frames."] #[inline(always)] - pub fn thirteenframes(self) -> &'a mut W { - self.variant(TXFIW_A::THIRTEENFRAMES) + pub fn thirteenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Thirteenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least fourteen more frames."] #[inline(always)] - pub fn fourteenframes(self) -> &'a mut W { - self.variant(TXFIW_A::FOURTEENFRAMES) + pub fn fourteenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Fourteenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least fifteen more frames."] #[inline(always)] - pub fn fifteenframes(self) -> &'a mut W { - self.variant(TXFIW_A::FIFTEENFRAMES) + pub fn fifteenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Fifteenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least sixteen more frames."] #[inline(always)] - pub fn sixteenframes(self) -> &'a mut W { - self.variant(TXFIW_A::SIXTEENFRAMES) + pub fn sixteenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Sixteenframes) } } -#[doc = "Field `RTSRXFW` reader - Request-to-send RX FIFO Watermark"] -pub type RTSRXFW_R = crate::FieldReader; #[doc = "Request-to-send RX FIFO Watermark\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RTSRXFW_A { +pub enum Rtsrxfw { #[doc = "0: RTS is set if there is space for at least one more frame in the RX FIFO."] - ONEFRAME = 0, + Oneframe = 0, #[doc = "1: RTS is set if there is space for at least two more frames in the RX FIFO."] - TWOFRAMES = 1, + Twoframes = 1, #[doc = "2: RTS is set if there is space for at least three more frames in the RX FIFO."] - THREEFRAMES = 2, + Threeframes = 2, #[doc = "3: RTS is set if there is space for four more frames in the RX FIFO."] - FOURFRAMES = 3, + Fourframes = 3, #[doc = "4: RTS is set if there is space for five more frames in the RX FIFO."] - FIVEFRAMES = 4, + Fiveframes = 4, #[doc = "5: RTS is set if there is space for six more frames in the RX FIFO."] - SIXFRAMES = 5, + Sixframes = 5, #[doc = "6: RTS is set if there is space for seven more frames in the RX FIFO."] - SEVENFRAMES = 6, + Sevenframes = 6, #[doc = "7: RTS is set if there is space for eight more frames in the RX FIFO."] - EIGHTFRAMES = 7, + Eightframes = 7, #[doc = "8: RTS is set if there is space for nine more frames in the RX FIFO."] - NINEFRAMES = 8, + Nineframes = 8, #[doc = "9: RTS is set if there is space for ten more frames in the RX FIFO."] - TENFRAMES = 9, + Tenframes = 9, #[doc = "10: RTS is set if there is space for eleven more frames in the RX FIFO."] - ELEVENFRAMES = 10, + Elevenframes = 10, #[doc = "11: RTS is set if there is space for twelve more frames in the RX FIFO."] - TWELVEFRAMES = 11, + Twelveframes = 11, #[doc = "12: RTS is set if there is space for thirteen more frames in the RX FIFO."] - THIRTEENFRAMES = 12, + Thirteenframes = 12, #[doc = "13: RTS is set if there is space for fourteen more frames in the RX FIFO."] - FOURTEENFRAMES = 13, + Fourteenframes = 13, #[doc = "14: RTS is set if there is space for fifteen more frames in the RX FIFO."] - FIFTEENFRAMES = 14, + Fifteenframes = 14, #[doc = "15: RTS is set if there is space for sixteen more frames in the RX FIFO."] - SIXTEENFRAMES = 15, + Sixteenframes = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RTSRXFW_A) -> Self { + fn from(variant: Rtsrxfw) -> Self { variant as _ } } -impl RTSRXFW_R { +impl crate::FieldSpec for Rtsrxfw { + type Ux = u8; +} +impl crate::IsEnum for Rtsrxfw {} +#[doc = "Field `RTSRXFW` reader - Request-to-send RX FIFO Watermark"] +pub type RtsrxfwR = crate::FieldReader; +impl RtsrxfwR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RTSRXFW_A { + pub const fn variant(&self) -> Rtsrxfw { match self.bits { - 0 => RTSRXFW_A::ONEFRAME, - 1 => RTSRXFW_A::TWOFRAMES, - 2 => RTSRXFW_A::THREEFRAMES, - 3 => RTSRXFW_A::FOURFRAMES, - 4 => RTSRXFW_A::FIVEFRAMES, - 5 => RTSRXFW_A::SIXFRAMES, - 6 => RTSRXFW_A::SEVENFRAMES, - 7 => RTSRXFW_A::EIGHTFRAMES, - 8 => RTSRXFW_A::NINEFRAMES, - 9 => RTSRXFW_A::TENFRAMES, - 10 => RTSRXFW_A::ELEVENFRAMES, - 11 => RTSRXFW_A::TWELVEFRAMES, - 12 => RTSRXFW_A::THIRTEENFRAMES, - 13 => RTSRXFW_A::FOURTEENFRAMES, - 14 => RTSRXFW_A::FIFTEENFRAMES, - 15 => RTSRXFW_A::SIXTEENFRAMES, + 0 => Rtsrxfw::Oneframe, + 1 => Rtsrxfw::Twoframes, + 2 => Rtsrxfw::Threeframes, + 3 => Rtsrxfw::Fourframes, + 4 => Rtsrxfw::Fiveframes, + 5 => Rtsrxfw::Sixframes, + 6 => Rtsrxfw::Sevenframes, + 7 => Rtsrxfw::Eightframes, + 8 => Rtsrxfw::Nineframes, + 9 => Rtsrxfw::Tenframes, + 10 => Rtsrxfw::Elevenframes, + 11 => Rtsrxfw::Twelveframes, + 12 => Rtsrxfw::Thirteenframes, + 13 => Rtsrxfw::Fourteenframes, + 14 => Rtsrxfw::Fifteenframes, + 15 => Rtsrxfw::Sixteenframes, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONEFRAME`"] + #[doc = "RTS is set if there is space for at least one more frame in the RX FIFO."] #[inline(always)] pub fn is_oneframe(&self) -> bool { - *self == RTSRXFW_A::ONEFRAME + *self == Rtsrxfw::Oneframe } - #[doc = "Checks if the value of the field is `TWOFRAMES`"] + #[doc = "RTS is set if there is space for at least two more frames in the RX FIFO."] #[inline(always)] pub fn is_twoframes(&self) -> bool { - *self == RTSRXFW_A::TWOFRAMES + *self == Rtsrxfw::Twoframes } - #[doc = "Checks if the value of the field is `THREEFRAMES`"] + #[doc = "RTS is set if there is space for at least three more frames in the RX FIFO."] #[inline(always)] pub fn is_threeframes(&self) -> bool { - *self == RTSRXFW_A::THREEFRAMES + *self == Rtsrxfw::Threeframes } - #[doc = "Checks if the value of the field is `FOURFRAMES`"] + #[doc = "RTS is set if there is space for four more frames in the RX FIFO."] #[inline(always)] pub fn is_fourframes(&self) -> bool { - *self == RTSRXFW_A::FOURFRAMES + *self == Rtsrxfw::Fourframes } - #[doc = "Checks if the value of the field is `FIVEFRAMES`"] + #[doc = "RTS is set if there is space for five more frames in the RX FIFO."] #[inline(always)] pub fn is_fiveframes(&self) -> bool { - *self == RTSRXFW_A::FIVEFRAMES + *self == Rtsrxfw::Fiveframes } - #[doc = "Checks if the value of the field is `SIXFRAMES`"] + #[doc = "RTS is set if there is space for six more frames in the RX FIFO."] #[inline(always)] pub fn is_sixframes(&self) -> bool { - *self == RTSRXFW_A::SIXFRAMES + *self == Rtsrxfw::Sixframes } - #[doc = "Checks if the value of the field is `SEVENFRAMES`"] + #[doc = "RTS is set if there is space for seven more frames in the RX FIFO."] #[inline(always)] pub fn is_sevenframes(&self) -> bool { - *self == RTSRXFW_A::SEVENFRAMES + *self == Rtsrxfw::Sevenframes } - #[doc = "Checks if the value of the field is `EIGHTFRAMES`"] + #[doc = "RTS is set if there is space for eight more frames in the RX FIFO."] #[inline(always)] pub fn is_eightframes(&self) -> bool { - *self == RTSRXFW_A::EIGHTFRAMES + *self == Rtsrxfw::Eightframes } - #[doc = "Checks if the value of the field is `NINEFRAMES`"] + #[doc = "RTS is set if there is space for nine more frames in the RX FIFO."] #[inline(always)] pub fn is_nineframes(&self) -> bool { - *self == RTSRXFW_A::NINEFRAMES + *self == Rtsrxfw::Nineframes } - #[doc = "Checks if the value of the field is `TENFRAMES`"] + #[doc = "RTS is set if there is space for ten more frames in the RX FIFO."] #[inline(always)] pub fn is_tenframes(&self) -> bool { - *self == RTSRXFW_A::TENFRAMES + *self == Rtsrxfw::Tenframes } - #[doc = "Checks if the value of the field is `ELEVENFRAMES`"] + #[doc = "RTS is set if there is space for eleven more frames in the RX FIFO."] #[inline(always)] pub fn is_elevenframes(&self) -> bool { - *self == RTSRXFW_A::ELEVENFRAMES + *self == Rtsrxfw::Elevenframes } - #[doc = "Checks if the value of the field is `TWELVEFRAMES`"] + #[doc = "RTS is set if there is space for twelve more frames in the RX FIFO."] #[inline(always)] pub fn is_twelveframes(&self) -> bool { - *self == RTSRXFW_A::TWELVEFRAMES + *self == Rtsrxfw::Twelveframes } - #[doc = "Checks if the value of the field is `THIRTEENFRAMES`"] + #[doc = "RTS is set if there is space for thirteen more frames in the RX FIFO."] #[inline(always)] pub fn is_thirteenframes(&self) -> bool { - *self == RTSRXFW_A::THIRTEENFRAMES + *self == Rtsrxfw::Thirteenframes } - #[doc = "Checks if the value of the field is `FOURTEENFRAMES`"] + #[doc = "RTS is set if there is space for fourteen more frames in the RX FIFO."] #[inline(always)] pub fn is_fourteenframes(&self) -> bool { - *self == RTSRXFW_A::FOURTEENFRAMES + *self == Rtsrxfw::Fourteenframes } - #[doc = "Checks if the value of the field is `FIFTEENFRAMES`"] + #[doc = "RTS is set if there is space for fifteen more frames in the RX FIFO."] #[inline(always)] pub fn is_fifteenframes(&self) -> bool { - *self == RTSRXFW_A::FIFTEENFRAMES + *self == Rtsrxfw::Fifteenframes } - #[doc = "Checks if the value of the field is `SIXTEENFRAMES`"] + #[doc = "RTS is set if there is space for sixteen more frames in the RX FIFO."] #[inline(always)] pub fn is_sixteenframes(&self) -> bool { - *self == RTSRXFW_A::SIXTEENFRAMES + *self == Rtsrxfw::Sixteenframes } } #[doc = "Field `RTSRXFW` writer - Request-to-send RX FIFO Watermark"] -pub type RTSRXFW_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CFG1_SPEC, u8, RTSRXFW_A, 4, O>; -impl<'a, const O: u8> RTSRXFW_W<'a, O> { +pub type RtsrxfwW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rtsrxfw, crate::Safe>; +impl<'a, REG> RtsrxfwW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "RTS is set if there is space for at least one more frame in the RX FIFO."] #[inline(always)] - pub fn oneframe(self) -> &'a mut W { - self.variant(RTSRXFW_A::ONEFRAME) + pub fn oneframe(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Oneframe) } #[doc = "RTS is set if there is space for at least two more frames in the RX FIFO."] #[inline(always)] - pub fn twoframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::TWOFRAMES) + pub fn twoframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Twoframes) } #[doc = "RTS is set if there is space for at least three more frames in the RX FIFO."] #[inline(always)] - pub fn threeframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::THREEFRAMES) + pub fn threeframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Threeframes) } #[doc = "RTS is set if there is space for four more frames in the RX FIFO."] #[inline(always)] - pub fn fourframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::FOURFRAMES) + pub fn fourframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Fourframes) } #[doc = "RTS is set if there is space for five more frames in the RX FIFO."] #[inline(always)] - pub fn fiveframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::FIVEFRAMES) + pub fn fiveframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Fiveframes) } #[doc = "RTS is set if there is space for six more frames in the RX FIFO."] #[inline(always)] - pub fn sixframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::SIXFRAMES) + pub fn sixframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Sixframes) } #[doc = "RTS is set if there is space for seven more frames in the RX FIFO."] #[inline(always)] - pub fn sevenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::SEVENFRAMES) + pub fn sevenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Sevenframes) } #[doc = "RTS is set if there is space for eight more frames in the RX FIFO."] #[inline(always)] - pub fn eightframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::EIGHTFRAMES) + pub fn eightframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Eightframes) } #[doc = "RTS is set if there is space for nine more frames in the RX FIFO."] #[inline(always)] - pub fn nineframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::NINEFRAMES) + pub fn nineframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Nineframes) } #[doc = "RTS is set if there is space for ten more frames in the RX FIFO."] #[inline(always)] - pub fn tenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::TENFRAMES) + pub fn tenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Tenframes) } #[doc = "RTS is set if there is space for eleven more frames in the RX FIFO."] #[inline(always)] - pub fn elevenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::ELEVENFRAMES) + pub fn elevenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Elevenframes) } #[doc = "RTS is set if there is space for twelve more frames in the RX FIFO."] #[inline(always)] - pub fn twelveframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::TWELVEFRAMES) + pub fn twelveframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Twelveframes) } #[doc = "RTS is set if there is space for thirteen more frames in the RX FIFO."] #[inline(always)] - pub fn thirteenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::THIRTEENFRAMES) + pub fn thirteenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Thirteenframes) } #[doc = "RTS is set if there is space for fourteen more frames in the RX FIFO."] #[inline(always)] - pub fn fourteenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::FOURTEENFRAMES) + pub fn fourteenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Fourteenframes) } #[doc = "RTS is set if there is space for fifteen more frames in the RX FIFO."] #[inline(always)] - pub fn fifteenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::FIFTEENFRAMES) + pub fn fifteenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Fifteenframes) } #[doc = "RTS is set if there is space for sixteen more frames in the RX FIFO."] #[inline(always)] - pub fn sixteenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::SIXTEENFRAMES) + pub fn sixteenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Sixteenframes) } } -#[doc = "Field `RXFIW` reader - RX FIFO Interrupt Watermark"] -pub type RXFIW_R = crate::FieldReader; #[doc = "RX FIFO Interrupt Watermark\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RXFIW_A { +pub enum Rxfiw { #[doc = "0: RXFL status flag and IF are set when the RX FIFO has at least one frame in it."] - ONEFRAME = 0, + Oneframe = 0, #[doc = "1: RXFL status flag and IF are set when the RX FIFO has at least two frames in it."] - TWOFRAMES = 1, + Twoframes = 1, #[doc = "2: RXFL status flag and IF are set when the RX FIFO has at least three frames in it."] - THREEFRAMES = 2, + Threeframes = 2, #[doc = "3: RXFL status flag and IF are set when the RX FIFO has at least four frames in it."] - FOURFRAMES = 3, + Fourframes = 3, #[doc = "4: RXFL status flag and IF are set when the RX FIFO has at least five frames in it."] - FIVEFRAMES = 4, + Fiveframes = 4, #[doc = "5: RXFL status flag and IF are set when the RX FIFO has at least six frames in it."] - SIXFRAMES = 5, + Sixframes = 5, #[doc = "6: RXFL status flag and IF are set when the RX FIFO has at least seven frames in it."] - SEVENFRAMES = 6, + Sevenframes = 6, #[doc = "7: RXFL status flag and IF are set when the RX FIFO has at least eight frames in it."] - EIGHTFRAMES = 7, + Eightframes = 7, #[doc = "8: RXFL status flag and IF are set when the RX FIFO has at least nine frames in it."] - NINEFRAMES = 8, + Nineframes = 8, #[doc = "9: RXFL status flag and IF are set when the RX FIFO has at least ten frames in it."] - TENFRAMES = 9, + Tenframes = 9, #[doc = "10: RXFL status flag and IF are set when the RX FIFO has at least eleven frames in it."] - ELEVENFRAMES = 10, + Elevenframes = 10, #[doc = "11: RXFL status flag and IF are set when the RX FIFO has at least twelve frames in it."] - TWELVEFRAMES = 11, + Twelveframes = 11, #[doc = "12: RXFL status flag and IF are set when the RX FIFO has at least thriteen frames in it."] - THIRTEENFRAMES = 12, + Thirteenframes = 12, #[doc = "13: RXFL status flag and IF are set when the RX FIFO has at least fourteen frames in it."] - FOURTEENFRAMES = 13, + Fourteenframes = 13, #[doc = "14: RXFL status flag and IF are set when the RX FIFO has at least fifteen frames in it."] - FIFTEENFRAMES = 14, + Fifteenframes = 14, #[doc = "15: RXFL status flag and IF are set when the RX FIFO has at least sixteen frames in it."] - SIXTEENFRAMES = 15, + Sixteenframes = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RXFIW_A) -> Self { + fn from(variant: Rxfiw) -> Self { variant as _ } } -impl RXFIW_R { +impl crate::FieldSpec for Rxfiw { + type Ux = u8; +} +impl crate::IsEnum for Rxfiw {} +#[doc = "Field `RXFIW` reader - RX FIFO Interrupt Watermark"] +pub type RxfiwR = crate::FieldReader; +impl RxfiwR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RXFIW_A { + pub const fn variant(&self) -> Rxfiw { match self.bits { - 0 => RXFIW_A::ONEFRAME, - 1 => RXFIW_A::TWOFRAMES, - 2 => RXFIW_A::THREEFRAMES, - 3 => RXFIW_A::FOURFRAMES, - 4 => RXFIW_A::FIVEFRAMES, - 5 => RXFIW_A::SIXFRAMES, - 6 => RXFIW_A::SEVENFRAMES, - 7 => RXFIW_A::EIGHTFRAMES, - 8 => RXFIW_A::NINEFRAMES, - 9 => RXFIW_A::TENFRAMES, - 10 => RXFIW_A::ELEVENFRAMES, - 11 => RXFIW_A::TWELVEFRAMES, - 12 => RXFIW_A::THIRTEENFRAMES, - 13 => RXFIW_A::FOURTEENFRAMES, - 14 => RXFIW_A::FIFTEENFRAMES, - 15 => RXFIW_A::SIXTEENFRAMES, + 0 => Rxfiw::Oneframe, + 1 => Rxfiw::Twoframes, + 2 => Rxfiw::Threeframes, + 3 => Rxfiw::Fourframes, + 4 => Rxfiw::Fiveframes, + 5 => Rxfiw::Sixframes, + 6 => Rxfiw::Sevenframes, + 7 => Rxfiw::Eightframes, + 8 => Rxfiw::Nineframes, + 9 => Rxfiw::Tenframes, + 10 => Rxfiw::Elevenframes, + 11 => Rxfiw::Twelveframes, + 12 => Rxfiw::Thirteenframes, + 13 => Rxfiw::Fourteenframes, + 14 => Rxfiw::Fifteenframes, + 15 => Rxfiw::Sixteenframes, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONEFRAME`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least one frame in it."] #[inline(always)] pub fn is_oneframe(&self) -> bool { - *self == RXFIW_A::ONEFRAME + *self == Rxfiw::Oneframe } - #[doc = "Checks if the value of the field is `TWOFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least two frames in it."] #[inline(always)] pub fn is_twoframes(&self) -> bool { - *self == RXFIW_A::TWOFRAMES + *self == Rxfiw::Twoframes } - #[doc = "Checks if the value of the field is `THREEFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least three frames in it."] #[inline(always)] pub fn is_threeframes(&self) -> bool { - *self == RXFIW_A::THREEFRAMES + *self == Rxfiw::Threeframes } - #[doc = "Checks if the value of the field is `FOURFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least four frames in it."] #[inline(always)] pub fn is_fourframes(&self) -> bool { - *self == RXFIW_A::FOURFRAMES + *self == Rxfiw::Fourframes } - #[doc = "Checks if the value of the field is `FIVEFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least five frames in it."] #[inline(always)] pub fn is_fiveframes(&self) -> bool { - *self == RXFIW_A::FIVEFRAMES + *self == Rxfiw::Fiveframes } - #[doc = "Checks if the value of the field is `SIXFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least six frames in it."] #[inline(always)] pub fn is_sixframes(&self) -> bool { - *self == RXFIW_A::SIXFRAMES + *self == Rxfiw::Sixframes } - #[doc = "Checks if the value of the field is `SEVENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least seven frames in it."] #[inline(always)] pub fn is_sevenframes(&self) -> bool { - *self == RXFIW_A::SEVENFRAMES + *self == Rxfiw::Sevenframes } - #[doc = "Checks if the value of the field is `EIGHTFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least eight frames in it."] #[inline(always)] pub fn is_eightframes(&self) -> bool { - *self == RXFIW_A::EIGHTFRAMES + *self == Rxfiw::Eightframes } - #[doc = "Checks if the value of the field is `NINEFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least nine frames in it."] #[inline(always)] pub fn is_nineframes(&self) -> bool { - *self == RXFIW_A::NINEFRAMES + *self == Rxfiw::Nineframes } - #[doc = "Checks if the value of the field is `TENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least ten frames in it."] #[inline(always)] pub fn is_tenframes(&self) -> bool { - *self == RXFIW_A::TENFRAMES + *self == Rxfiw::Tenframes } - #[doc = "Checks if the value of the field is `ELEVENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least eleven frames in it."] #[inline(always)] pub fn is_elevenframes(&self) -> bool { - *self == RXFIW_A::ELEVENFRAMES + *self == Rxfiw::Elevenframes } - #[doc = "Checks if the value of the field is `TWELVEFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least twelve frames in it."] #[inline(always)] pub fn is_twelveframes(&self) -> bool { - *self == RXFIW_A::TWELVEFRAMES + *self == Rxfiw::Twelveframes } - #[doc = "Checks if the value of the field is `THIRTEENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least thriteen frames in it."] #[inline(always)] pub fn is_thirteenframes(&self) -> bool { - *self == RXFIW_A::THIRTEENFRAMES + *self == Rxfiw::Thirteenframes } - #[doc = "Checks if the value of the field is `FOURTEENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least fourteen frames in it."] #[inline(always)] pub fn is_fourteenframes(&self) -> bool { - *self == RXFIW_A::FOURTEENFRAMES + *self == Rxfiw::Fourteenframes } - #[doc = "Checks if the value of the field is `FIFTEENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least fifteen frames in it."] #[inline(always)] pub fn is_fifteenframes(&self) -> bool { - *self == RXFIW_A::FIFTEENFRAMES + *self == Rxfiw::Fifteenframes } - #[doc = "Checks if the value of the field is `SIXTEENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least sixteen frames in it."] #[inline(always)] pub fn is_sixteenframes(&self) -> bool { - *self == RXFIW_A::SIXTEENFRAMES + *self == Rxfiw::Sixteenframes } } #[doc = "Field `RXFIW` writer - RX FIFO Interrupt Watermark"] -pub type RXFIW_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG1_SPEC, u8, RXFIW_A, 4, O>; -impl<'a, const O: u8> RXFIW_W<'a, O> { +pub type RxfiwW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rxfiw, crate::Safe>; +impl<'a, REG> RxfiwW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "RXFL status flag and IF are set when the RX FIFO has at least one frame in it."] #[inline(always)] - pub fn oneframe(self) -> &'a mut W { - self.variant(RXFIW_A::ONEFRAME) + pub fn oneframe(self) -> &'a mut crate::W { + self.variant(Rxfiw::Oneframe) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least two frames in it."] #[inline(always)] - pub fn twoframes(self) -> &'a mut W { - self.variant(RXFIW_A::TWOFRAMES) + pub fn twoframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Twoframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least three frames in it."] #[inline(always)] - pub fn threeframes(self) -> &'a mut W { - self.variant(RXFIW_A::THREEFRAMES) + pub fn threeframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Threeframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least four frames in it."] #[inline(always)] - pub fn fourframes(self) -> &'a mut W { - self.variant(RXFIW_A::FOURFRAMES) + pub fn fourframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Fourframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least five frames in it."] #[inline(always)] - pub fn fiveframes(self) -> &'a mut W { - self.variant(RXFIW_A::FIVEFRAMES) + pub fn fiveframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Fiveframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least six frames in it."] #[inline(always)] - pub fn sixframes(self) -> &'a mut W { - self.variant(RXFIW_A::SIXFRAMES) + pub fn sixframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Sixframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least seven frames in it."] #[inline(always)] - pub fn sevenframes(self) -> &'a mut W { - self.variant(RXFIW_A::SEVENFRAMES) + pub fn sevenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Sevenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least eight frames in it."] #[inline(always)] - pub fn eightframes(self) -> &'a mut W { - self.variant(RXFIW_A::EIGHTFRAMES) + pub fn eightframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Eightframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least nine frames in it."] #[inline(always)] - pub fn nineframes(self) -> &'a mut W { - self.variant(RXFIW_A::NINEFRAMES) + pub fn nineframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Nineframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least ten frames in it."] #[inline(always)] - pub fn tenframes(self) -> &'a mut W { - self.variant(RXFIW_A::TENFRAMES) + pub fn tenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Tenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least eleven frames in it."] #[inline(always)] - pub fn elevenframes(self) -> &'a mut W { - self.variant(RXFIW_A::ELEVENFRAMES) + pub fn elevenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Elevenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least twelve frames in it."] #[inline(always)] - pub fn twelveframes(self) -> &'a mut W { - self.variant(RXFIW_A::TWELVEFRAMES) + pub fn twelveframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Twelveframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least thriteen frames in it."] #[inline(always)] - pub fn thirteenframes(self) -> &'a mut W { - self.variant(RXFIW_A::THIRTEENFRAMES) + pub fn thirteenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Thirteenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least fourteen frames in it."] #[inline(always)] - pub fn fourteenframes(self) -> &'a mut W { - self.variant(RXFIW_A::FOURTEENFRAMES) + pub fn fourteenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Fourteenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least fifteen frames in it."] #[inline(always)] - pub fn fifteenframes(self) -> &'a mut W { - self.variant(RXFIW_A::FIFTEENFRAMES) + pub fn fifteenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Fifteenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least sixteen frames in it."] #[inline(always)] - pub fn sixteenframes(self) -> &'a mut W { - self.variant(RXFIW_A::SIXTEENFRAMES) + pub fn sixteenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Sixteenframes) } } impl R { #[doc = "Bit 0 - Debug halt"] #[inline(always)] - pub fn dbghalt(&self) -> DBGHALT_R { - DBGHALT_R::new((self.bits & 1) != 0) + pub fn dbghalt(&self) -> DbghaltR { + DbghaltR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Clear-to-send Invert Enable"] #[inline(always)] - pub fn ctsinv(&self) -> CTSINV_R { - CTSINV_R::new(((self.bits >> 1) & 1) != 0) + pub fn ctsinv(&self) -> CtsinvR { + CtsinvR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Clear-to-send Enable"] #[inline(always)] - pub fn ctsen(&self) -> CTSEN_R { - CTSEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn ctsen(&self) -> CtsenR { + CtsenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Request-to-send Invert Enable"] #[inline(always)] - pub fn rtsinv(&self) -> RTSINV_R { - RTSINV_R::new(((self.bits >> 3) & 1) != 0) + pub fn rtsinv(&self) -> RtsinvR { + RtsinvR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:6 - RX Timeout"] #[inline(always)] - pub fn rxtimeout(&self) -> RXTIMEOUT_R { - RXTIMEOUT_R::new(((self.bits >> 4) & 7) as u8) + pub fn rxtimeout(&self) -> RxtimeoutR { + RxtimeoutR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bit 11 - Start Frame Unblock Receiver"] #[inline(always)] - pub fn sfubrx(&self) -> SFUBRX_R { - SFUBRX_R::new(((self.bits >> 11) & 1) != 0) + pub fn sfubrx(&self) -> SfubrxR { + SfubrxR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 15 - PRS RX Enable"] #[inline(always)] - pub fn rxprsen(&self) -> RXPRSEN_R { - RXPRSEN_R::new(((self.bits >> 15) & 1) != 0) + pub fn rxprsen(&self) -> RxprsenR { + RxprsenR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:19 - TX FIFO Interrupt Watermark"] #[inline(always)] - pub fn txfiw(&self) -> TXFIW_R { - TXFIW_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn txfiw(&self) -> TxfiwR { + TxfiwR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 22:25 - Request-to-send RX FIFO Watermark"] #[inline(always)] - pub fn rtsrxfw(&self) -> RTSRXFW_R { - RTSRXFW_R::new(((self.bits >> 22) & 0x0f) as u8) + pub fn rtsrxfw(&self) -> RtsrxfwR { + RtsrxfwR::new(((self.bits >> 22) & 0x0f) as u8) } #[doc = "Bits 27:30 - RX FIFO Interrupt Watermark"] #[inline(always)] - pub fn rxfiw(&self) -> RXFIW_R { - RXFIW_R::new(((self.bits >> 27) & 0x0f) as u8) + pub fn rxfiw(&self) -> RxfiwR { + RxfiwR::new(((self.bits >> 27) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - Debug halt"] #[inline(always)] #[must_use] - pub fn dbghalt(&mut self) -> DBGHALT_W<0> { - DBGHALT_W::new(self) + pub fn dbghalt(&mut self) -> DbghaltW { + DbghaltW::new(self, 0) } #[doc = "Bit 1 - Clear-to-send Invert Enable"] #[inline(always)] #[must_use] - pub fn ctsinv(&mut self) -> CTSINV_W<1> { - CTSINV_W::new(self) + pub fn ctsinv(&mut self) -> CtsinvW { + CtsinvW::new(self, 1) } #[doc = "Bit 2 - Clear-to-send Enable"] #[inline(always)] #[must_use] - pub fn ctsen(&mut self) -> CTSEN_W<2> { - CTSEN_W::new(self) + pub fn ctsen(&mut self) -> CtsenW { + CtsenW::new(self, 2) } #[doc = "Bit 3 - Request-to-send Invert Enable"] #[inline(always)] #[must_use] - pub fn rtsinv(&mut self) -> RTSINV_W<3> { - RTSINV_W::new(self) + pub fn rtsinv(&mut self) -> RtsinvW { + RtsinvW::new(self, 3) } #[doc = "Bits 4:6 - RX Timeout"] #[inline(always)] #[must_use] - pub fn rxtimeout(&mut self) -> RXTIMEOUT_W<4> { - RXTIMEOUT_W::new(self) + pub fn rxtimeout(&mut self) -> RxtimeoutW { + RxtimeoutW::new(self, 4) } #[doc = "Bit 11 - Start Frame Unblock Receiver"] #[inline(always)] #[must_use] - pub fn sfubrx(&mut self) -> SFUBRX_W<11> { - SFUBRX_W::new(self) + pub fn sfubrx(&mut self) -> SfubrxW { + SfubrxW::new(self, 11) } #[doc = "Bit 15 - PRS RX Enable"] #[inline(always)] #[must_use] - pub fn rxprsen(&mut self) -> RXPRSEN_W<15> { - RXPRSEN_W::new(self) + pub fn rxprsen(&mut self) -> RxprsenW { + RxprsenW::new(self, 15) } #[doc = "Bits 16:19 - TX FIFO Interrupt Watermark"] #[inline(always)] #[must_use] - pub fn txfiw(&mut self) -> TXFIW_W<16> { - TXFIW_W::new(self) + pub fn txfiw(&mut self) -> TxfiwW { + TxfiwW::new(self, 16) } #[doc = "Bits 22:25 - Request-to-send RX FIFO Watermark"] #[inline(always)] #[must_use] - pub fn rtsrxfw(&mut self) -> RTSRXFW_W<22> { - RTSRXFW_W::new(self) + pub fn rtsrxfw(&mut self) -> RtsrxfwW { + RtsrxfwW::new(self, 22) } #[doc = "Bits 27:30 - RX FIFO Interrupt Watermark"] #[inline(always)] #[must_use] - pub fn rxfiw(&mut self) -> RXFIW_W<27> { - RXFIW_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rxfiw(&mut self) -> RxfiwW { + RxfiwW::new(self, 27) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg1](index.html) module"] -pub struct CFG1_SPEC; -impl crate::RegisterSpec for CFG1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cfg1Spec; +impl crate::RegisterSpec for Cfg1Spec { type Ux = u32; } -#[doc = "`read()` method returns [cfg1::R](R) reader structure"] -impl crate::Readable for CFG1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg1::W](W) writer structure"] -impl crate::Writable for CFG1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg1::R`](R) reader structure"] +impl crate::Readable for Cfg1Spec {} +#[doc = "`write(|w| ..)` method takes [`cfg1::W`](W) writer structure"] +impl crate::Writable for Cfg1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG1 to value 0"] -impl crate::Resettable for CFG1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cfg1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/cfg2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/cfg2.rs index 1f16a32..08998b3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/cfg2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/cfg2.rs @@ -1,384 +1,356 @@ #[doc = "Register `CFG2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MASTER` reader - Main mode"] -pub type MASTER_R = crate::BitReader; +pub type W = crate::W; #[doc = "Main mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MASTER_A { +pub enum Master { #[doc = "0: Secondary mode"] - SLAVE = 0, + Slave = 0, #[doc = "1: Main mode"] - MASTER = 1, + Master = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MASTER_A) -> Self { + fn from(variant: Master) -> Self { variant as u8 != 0 } } -impl MASTER_R { +#[doc = "Field `MASTER` reader - Main mode"] +pub type MasterR = crate::BitReader; +impl MasterR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MASTER_A { + pub const fn variant(&self) -> Master { match self.bits { - false => MASTER_A::SLAVE, - true => MASTER_A::MASTER, + false => Master::Slave, + true => Master::Master, } } - #[doc = "Checks if the value of the field is `SLAVE`"] + #[doc = "Secondary mode"] #[inline(always)] pub fn is_slave(&self) -> bool { - *self == MASTER_A::SLAVE + *self == Master::Slave } - #[doc = "Checks if the value of the field is `MASTER`"] + #[doc = "Main mode"] #[inline(always)] pub fn is_master(&self) -> bool { - *self == MASTER_A::MASTER + *self == Master::Master } } #[doc = "Field `MASTER` writer - Main mode"] -pub type MASTER_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, MASTER_A, O>; -impl<'a, const O: u8> MASTER_W<'a, O> { +pub type MasterW<'a, REG> = crate::BitWriter<'a, REG, Master>; +impl<'a, REG> MasterW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Secondary mode"] #[inline(always)] - pub fn slave(self) -> &'a mut W { - self.variant(MASTER_A::SLAVE) + pub fn slave(self) -> &'a mut crate::W { + self.variant(Master::Slave) } #[doc = "Main mode"] #[inline(always)] - pub fn master(self) -> &'a mut W { - self.variant(MASTER_A::MASTER) + pub fn master(self) -> &'a mut crate::W { + self.variant(Master::Master) } } -#[doc = "Field `CLKPOL` reader - Clock Polarity"] -pub type CLKPOL_R = crate::BitReader; #[doc = "Clock Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLKPOL_A { +pub enum Clkpol { #[doc = "0: The bus clock used in synchronous mode has a low base value"] - IDLELOW = 0, + Idlelow = 0, #[doc = "1: The bus clock used in synchronous mode has a high base value"] - IDLEHIGH = 1, + Idlehigh = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLKPOL_A) -> Self { + fn from(variant: Clkpol) -> Self { variant as u8 != 0 } } -impl CLKPOL_R { +#[doc = "Field `CLKPOL` reader - Clock Polarity"] +pub type ClkpolR = crate::BitReader; +impl ClkpolR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CLKPOL_A { + pub const fn variant(&self) -> Clkpol { match self.bits { - false => CLKPOL_A::IDLELOW, - true => CLKPOL_A::IDLEHIGH, + false => Clkpol::Idlelow, + true => Clkpol::Idlehigh, } } - #[doc = "Checks if the value of the field is `IDLELOW`"] + #[doc = "The bus clock used in synchronous mode has a low base value"] #[inline(always)] pub fn is_idlelow(&self) -> bool { - *self == CLKPOL_A::IDLELOW + *self == Clkpol::Idlelow } - #[doc = "Checks if the value of the field is `IDLEHIGH`"] + #[doc = "The bus clock used in synchronous mode has a high base value"] #[inline(always)] pub fn is_idlehigh(&self) -> bool { - *self == CLKPOL_A::IDLEHIGH + *self == Clkpol::Idlehigh } } #[doc = "Field `CLKPOL` writer - Clock Polarity"] -pub type CLKPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, CLKPOL_A, O>; -impl<'a, const O: u8> CLKPOL_W<'a, O> { +pub type ClkpolW<'a, REG> = crate::BitWriter<'a, REG, Clkpol>; +impl<'a, REG> ClkpolW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The bus clock used in synchronous mode has a low base value"] #[inline(always)] - pub fn idlelow(self) -> &'a mut W { - self.variant(CLKPOL_A::IDLELOW) + pub fn idlelow(self) -> &'a mut crate::W { + self.variant(Clkpol::Idlelow) } #[doc = "The bus clock used in synchronous mode has a high base value"] #[inline(always)] - pub fn idlehigh(self) -> &'a mut W { - self.variant(CLKPOL_A::IDLEHIGH) + pub fn idlehigh(self) -> &'a mut crate::W { + self.variant(Clkpol::Idlehigh) } } -#[doc = "Field `CLKPHA` reader - Clock Edge for Setup/Sample"] -pub type CLKPHA_R = crate::BitReader; #[doc = "Clock Edge for Setup/Sample\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLKPHA_A { +pub enum Clkpha { #[doc = "0: Data is sampled on the leading edge and set-up on the trailing edge of the bus clock in synchronous mode"] - SAMPLELEADING = 0, + Sampleleading = 0, #[doc = "1: Data is set-up on the leading edge and sampled on the trailing edge of the bus clock in synchronous mode"] - SAMPLETRAILING = 1, + Sampletrailing = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLKPHA_A) -> Self { + fn from(variant: Clkpha) -> Self { variant as u8 != 0 } } -impl CLKPHA_R { +#[doc = "Field `CLKPHA` reader - Clock Edge for Setup/Sample"] +pub type ClkphaR = crate::BitReader; +impl ClkphaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CLKPHA_A { + pub const fn variant(&self) -> Clkpha { match self.bits { - false => CLKPHA_A::SAMPLELEADING, - true => CLKPHA_A::SAMPLETRAILING, + false => Clkpha::Sampleleading, + true => Clkpha::Sampletrailing, } } - #[doc = "Checks if the value of the field is `SAMPLELEADING`"] + #[doc = "Data is sampled on the leading edge and set-up on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] pub fn is_sampleleading(&self) -> bool { - *self == CLKPHA_A::SAMPLELEADING + *self == Clkpha::Sampleleading } - #[doc = "Checks if the value of the field is `SAMPLETRAILING`"] + #[doc = "Data is set-up on the leading edge and sampled on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] pub fn is_sampletrailing(&self) -> bool { - *self == CLKPHA_A::SAMPLETRAILING + *self == Clkpha::Sampletrailing } } #[doc = "Field `CLKPHA` writer - Clock Edge for Setup/Sample"] -pub type CLKPHA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, CLKPHA_A, O>; -impl<'a, const O: u8> CLKPHA_W<'a, O> { +pub type ClkphaW<'a, REG> = crate::BitWriter<'a, REG, Clkpha>; +impl<'a, REG> ClkphaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Data is sampled on the leading edge and set-up on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] - pub fn sampleleading(self) -> &'a mut W { - self.variant(CLKPHA_A::SAMPLELEADING) + pub fn sampleleading(self) -> &'a mut crate::W { + self.variant(Clkpha::Sampleleading) } #[doc = "Data is set-up on the leading edge and sampled on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] - pub fn sampletrailing(self) -> &'a mut W { - self.variant(CLKPHA_A::SAMPLETRAILING) + pub fn sampletrailing(self) -> &'a mut crate::W { + self.variant(Clkpha::Sampletrailing) } } -#[doc = "Field `CSINV` reader - Chip Select Invert"] -pub type CSINV_R = crate::BitReader; #[doc = "Chip Select Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CSINV_A { +pub enum Csinv { #[doc = "0: Chip select is active low"] - AL = 0, + Al = 0, #[doc = "1: Chip select is active high"] - AH = 1, + Ah = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CSINV_A) -> Self { + fn from(variant: Csinv) -> Self { variant as u8 != 0 } } -impl CSINV_R { +#[doc = "Field `CSINV` reader - Chip Select Invert"] +pub type CsinvR = crate::BitReader; +impl CsinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CSINV_A { + pub const fn variant(&self) -> Csinv { match self.bits { - false => CSINV_A::AL, - true => CSINV_A::AH, + false => Csinv::Al, + true => Csinv::Ah, } } - #[doc = "Checks if the value of the field is `AL`"] + #[doc = "Chip select is active low"] #[inline(always)] pub fn is_al(&self) -> bool { - *self == CSINV_A::AL + *self == Csinv::Al } - #[doc = "Checks if the value of the field is `AH`"] + #[doc = "Chip select is active high"] #[inline(always)] pub fn is_ah(&self) -> bool { - *self == CSINV_A::AH + *self == Csinv::Ah } } #[doc = "Field `CSINV` writer - Chip Select Invert"] -pub type CSINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, CSINV_A, O>; -impl<'a, const O: u8> CSINV_W<'a, O> { +pub type CsinvW<'a, REG> = crate::BitWriter<'a, REG, Csinv>; +impl<'a, REG> CsinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Chip select is active low"] #[inline(always)] - pub fn al(self) -> &'a mut W { - self.variant(CSINV_A::AL) + pub fn al(self) -> &'a mut crate::W { + self.variant(Csinv::Al) } #[doc = "Chip select is active high"] #[inline(always)] - pub fn ah(self) -> &'a mut W { - self.variant(CSINV_A::AH) + pub fn ah(self) -> &'a mut crate::W { + self.variant(Csinv::Ah) } } #[doc = "Field `AUTOTX` reader - Always Transmit When RXFIFO Not Full"] -pub type AUTOTX_R = crate::BitReader; +pub type AutotxR = crate::BitReader; #[doc = "Field `AUTOTX` writer - Always Transmit When RXFIFO Not Full"] -pub type AUTOTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, bool, O>; +pub type AutotxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOCS` reader - Automatic Chip Select"] -pub type AUTOCS_R = crate::BitReader; +pub type AutocsR = crate::BitReader; #[doc = "Field `AUTOCS` writer - Automatic Chip Select"] -pub type AUTOCS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, bool, O>; +pub type AutocsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLKPRSEN` reader - PRS CLK Enable"] -pub type CLKPRSEN_R = crate::BitReader; +pub type ClkprsenR = crate::BitReader; #[doc = "Field `CLKPRSEN` writer - PRS CLK Enable"] -pub type CLKPRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, bool, O>; +pub type ClkprsenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FORCELOAD` reader - Force Load to Shift Register"] -pub type FORCELOAD_R = crate::BitReader; +pub type ForceloadR = crate::BitReader; #[doc = "Field `FORCELOAD` writer - Force Load to Shift Register"] -pub type FORCELOAD_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, bool, O>; +pub type ForceloadW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SDIV` reader - Sync Clock Div"] -pub type SDIV_R = crate::FieldReader; +pub type SdivR = crate::FieldReader; #[doc = "Field `SDIV` writer - Sync Clock Div"] -pub type SDIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG2_SPEC, u8, u8, 8, O>; +pub type SdivW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bit 0 - Main mode"] #[inline(always)] - pub fn master(&self) -> MASTER_R { - MASTER_R::new((self.bits & 1) != 0) + pub fn master(&self) -> MasterR { + MasterR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Clock Polarity"] #[inline(always)] - pub fn clkpol(&self) -> CLKPOL_R { - CLKPOL_R::new(((self.bits >> 1) & 1) != 0) + pub fn clkpol(&self) -> ClkpolR { + ClkpolR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Clock Edge for Setup/Sample"] #[inline(always)] - pub fn clkpha(&self) -> CLKPHA_R { - CLKPHA_R::new(((self.bits >> 2) & 1) != 0) + pub fn clkpha(&self) -> ClkphaR { + ClkphaR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Chip Select Invert"] #[inline(always)] - pub fn csinv(&self) -> CSINV_R { - CSINV_R::new(((self.bits >> 3) & 1) != 0) + pub fn csinv(&self) -> CsinvR { + CsinvR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Always Transmit When RXFIFO Not Full"] #[inline(always)] - pub fn autotx(&self) -> AUTOTX_R { - AUTOTX_R::new(((self.bits >> 4) & 1) != 0) + pub fn autotx(&self) -> AutotxR { + AutotxR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Automatic Chip Select"] #[inline(always)] - pub fn autocs(&self) -> AUTOCS_R { - AUTOCS_R::new(((self.bits >> 5) & 1) != 0) + pub fn autocs(&self) -> AutocsR { + AutocsR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - PRS CLK Enable"] #[inline(always)] - pub fn clkprsen(&self) -> CLKPRSEN_R { - CLKPRSEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn clkprsen(&self) -> ClkprsenR { + ClkprsenR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Force Load to Shift Register"] #[inline(always)] - pub fn forceload(&self) -> FORCELOAD_R { - FORCELOAD_R::new(((self.bits >> 7) & 1) != 0) + pub fn forceload(&self) -> ForceloadR { + ForceloadR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 24:31 - Sync Clock Div"] #[inline(always)] - pub fn sdiv(&self) -> SDIV_R { - SDIV_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn sdiv(&self) -> SdivR { + SdivR::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bit 0 - Main mode"] #[inline(always)] #[must_use] - pub fn master(&mut self) -> MASTER_W<0> { - MASTER_W::new(self) + pub fn master(&mut self) -> MasterW { + MasterW::new(self, 0) } #[doc = "Bit 1 - Clock Polarity"] #[inline(always)] #[must_use] - pub fn clkpol(&mut self) -> CLKPOL_W<1> { - CLKPOL_W::new(self) + pub fn clkpol(&mut self) -> ClkpolW { + ClkpolW::new(self, 1) } #[doc = "Bit 2 - Clock Edge for Setup/Sample"] #[inline(always)] #[must_use] - pub fn clkpha(&mut self) -> CLKPHA_W<2> { - CLKPHA_W::new(self) + pub fn clkpha(&mut self) -> ClkphaW { + ClkphaW::new(self, 2) } #[doc = "Bit 3 - Chip Select Invert"] #[inline(always)] #[must_use] - pub fn csinv(&mut self) -> CSINV_W<3> { - CSINV_W::new(self) + pub fn csinv(&mut self) -> CsinvW { + CsinvW::new(self, 3) } #[doc = "Bit 4 - Always Transmit When RXFIFO Not Full"] #[inline(always)] #[must_use] - pub fn autotx(&mut self) -> AUTOTX_W<4> { - AUTOTX_W::new(self) + pub fn autotx(&mut self) -> AutotxW { + AutotxW::new(self, 4) } #[doc = "Bit 5 - Automatic Chip Select"] #[inline(always)] #[must_use] - pub fn autocs(&mut self) -> AUTOCS_W<5> { - AUTOCS_W::new(self) + pub fn autocs(&mut self) -> AutocsW { + AutocsW::new(self, 5) } #[doc = "Bit 6 - PRS CLK Enable"] #[inline(always)] #[must_use] - pub fn clkprsen(&mut self) -> CLKPRSEN_W<6> { - CLKPRSEN_W::new(self) + pub fn clkprsen(&mut self) -> ClkprsenW { + ClkprsenW::new(self, 6) } #[doc = "Bit 7 - Force Load to Shift Register"] #[inline(always)] #[must_use] - pub fn forceload(&mut self) -> FORCELOAD_W<7> { - FORCELOAD_W::new(self) + pub fn forceload(&mut self) -> ForceloadW { + ForceloadW::new(self, 7) } #[doc = "Bits 24:31 - Sync Clock Div"] #[inline(always)] #[must_use] - pub fn sdiv(&mut self) -> SDIV_W<24> { - SDIV_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sdiv(&mut self) -> SdivW { + SdivW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg2](index.html) module"] -pub struct CFG2_SPEC; -impl crate::RegisterSpec for CFG2_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cfg2Spec; +impl crate::RegisterSpec for Cfg2Spec { type Ux = u32; } -#[doc = "`read()` method returns [cfg2::R](R) reader structure"] -impl crate::Readable for CFG2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg2::W](W) writer structure"] -impl crate::Writable for CFG2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg2::R`](R) reader structure"] +impl crate::Readable for Cfg2Spec {} +#[doc = "`write(|w| ..)` method takes [`cfg2::W`](W) writer structure"] +impl crate::Writable for Cfg2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG2 to value 0x20"] -impl crate::Resettable for CFG2_SPEC { - const RESET_VALUE: Self::Ux = 0x20; +impl crate::Resettable for Cfg2Spec { + const RESET_VALUE: u32 = 0x20; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/clkdiv.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/clkdiv.rs index 5158bd5..beab8d8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/clkdiv.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/clkdiv.rs @@ -1,80 +1,40 @@ #[doc = "Register `CLKDIV` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKDIV` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DIV` reader - Fractional Clock Divider"] -pub type DIV_R = crate::FieldReader; +pub type DivR = crate::FieldReader; #[doc = "Field `DIV` writer - Fractional Clock Divider"] -pub type DIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CLKDIV_SPEC, u32, u32, 20, O>; +pub type DivW<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { #[doc = "Bits 3:22 - Fractional Clock Divider"] #[inline(always)] - pub fn div(&self) -> DIV_R { - DIV_R::new((self.bits >> 3) & 0x000f_ffff) + pub fn div(&self) -> DivR { + DivR::new((self.bits >> 3) & 0x000f_ffff) } } impl W { #[doc = "Bits 3:22 - Fractional Clock Divider"] #[inline(always)] #[must_use] - pub fn div(&mut self) -> DIV_W<3> { - DIV_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn div(&mut self) -> DivW { + DivW::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clkdiv](index.html) module"] -pub struct CLKDIV_SPEC; -impl crate::RegisterSpec for CLKDIV_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ClkdivSpec; +impl crate::RegisterSpec for ClkdivSpec { type Ux = u32; } -#[doc = "`read()` method returns [clkdiv::R](R) reader structure"] -impl crate::Readable for CLKDIV_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clkdiv::W](W) writer structure"] -impl crate::Writable for CLKDIV_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`clkdiv::R`](R) reader structure"] +impl crate::Readable for ClkdivSpec {} +#[doc = "`write(|w| ..)` method takes [`clkdiv::W`](W) writer structure"] +impl crate::Writable for ClkdivSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV to value 0"] -impl crate::Resettable for CLKDIV_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ClkdivSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/cmd.rs index 8d3465f..39d3e79 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/cmd.rs @@ -1,116 +1,91 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RXEN` writer - Receiver Enable"] -pub type RXEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXDIS` writer - Receiver Disable"] -pub type RXDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXEN` writer - Transmitter Enable"] -pub type TXEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXDIS` writer - Transmitter Disable"] -pub type TXDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXBLOCKEN` writer - Receiver Block Enable"] -pub type RXBLOCKEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxblockenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXBLOCKDIS` writer - Receiver Block Disable"] -pub type RXBLOCKDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxblockdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTRIEN` writer - Transmitter Tristate Enable"] -pub type TXTRIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxtrienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTRIDIS` writer - Transmitter Tristate Disable"] -pub type TXTRIDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxtridisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEARTX` writer - Clear TX FIFO"] -pub type CLEARTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type CleartxW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Receiver Enable"] #[inline(always)] #[must_use] - pub fn rxen(&mut self) -> RXEN_W<0> { - RXEN_W::new(self) + pub fn rxen(&mut self) -> RxenW { + RxenW::new(self, 0) } #[doc = "Bit 1 - Receiver Disable"] #[inline(always)] #[must_use] - pub fn rxdis(&mut self) -> RXDIS_W<1> { - RXDIS_W::new(self) + pub fn rxdis(&mut self) -> RxdisW { + RxdisW::new(self, 1) } #[doc = "Bit 2 - Transmitter Enable"] #[inline(always)] #[must_use] - pub fn txen(&mut self) -> TXEN_W<2> { - TXEN_W::new(self) + pub fn txen(&mut self) -> TxenW { + TxenW::new(self, 2) } #[doc = "Bit 3 - Transmitter Disable"] #[inline(always)] #[must_use] - pub fn txdis(&mut self) -> TXDIS_W<3> { - TXDIS_W::new(self) + pub fn txdis(&mut self) -> TxdisW { + TxdisW::new(self, 3) } #[doc = "Bit 4 - Receiver Block Enable"] #[inline(always)] #[must_use] - pub fn rxblocken(&mut self) -> RXBLOCKEN_W<4> { - RXBLOCKEN_W::new(self) + pub fn rxblocken(&mut self) -> RxblockenW { + RxblockenW::new(self, 4) } #[doc = "Bit 5 - Receiver Block Disable"] #[inline(always)] #[must_use] - pub fn rxblockdis(&mut self) -> RXBLOCKDIS_W<5> { - RXBLOCKDIS_W::new(self) + pub fn rxblockdis(&mut self) -> RxblockdisW { + RxblockdisW::new(self, 5) } #[doc = "Bit 6 - Transmitter Tristate Enable"] #[inline(always)] #[must_use] - pub fn txtrien(&mut self) -> TXTRIEN_W<6> { - TXTRIEN_W::new(self) + pub fn txtrien(&mut self) -> TxtrienW { + TxtrienW::new(self, 6) } #[doc = "Bit 7 - Transmitter Tristate Disable"] #[inline(always)] #[must_use] - pub fn txtridis(&mut self) -> TXTRIDIS_W<7> { - TXTRIDIS_W::new(self) + pub fn txtridis(&mut self) -> TxtridisW { + TxtridisW::new(self, 7) } #[doc = "Bit 8 - Clear TX FIFO"] #[inline(always)] #[must_use] - pub fn cleartx(&mut self) -> CLEARTX_W<8> { - CLEARTX_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cleartx(&mut self) -> CleartxW { + CleartxW::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/dtxdatcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/dtxdatcfg.rs index 8ae017b..67cc6f0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/dtxdatcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/dtxdatcfg.rs @@ -1,80 +1,40 @@ #[doc = "Register `DTXDATCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTXDATCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTXDAT` reader - Default TX DATA"] -pub type DTXDAT_R = crate::FieldReader; +pub type DtxdatR = crate::FieldReader; #[doc = "Field `DTXDAT` writer - Default TX DATA"] -pub type DTXDAT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTXDATCFG_SPEC, u16, u16, 16, O>; +pub type DtxdatW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Default TX DATA"] #[inline(always)] - pub fn dtxdat(&self) -> DTXDAT_R { - DTXDAT_R::new((self.bits & 0xffff) as u16) + pub fn dtxdat(&self) -> DtxdatR { + DtxdatR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Default TX DATA"] #[inline(always)] #[must_use] - pub fn dtxdat(&mut self) -> DTXDAT_W<0> { - DTXDAT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtxdat(&mut self) -> DtxdatW { + DtxdatW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtxdatcfg](index.html) module"] -pub struct DTXDATCFG_SPEC; -impl crate::RegisterSpec for DTXDATCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtxdatcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtxdatcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtxdatcfgSpec; +impl crate::RegisterSpec for DtxdatcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtxdatcfg::R](R) reader structure"] -impl crate::Readable for DTXDATCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtxdatcfg::W](W) writer structure"] -impl crate::Writable for DTXDATCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtxdatcfg::R`](R) reader structure"] +impl crate::Readable for DtxdatcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dtxdatcfg::W`](W) writer structure"] +impl crate::Writable for DtxdatcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTXDATCFG to value 0"] -impl crate::Resettable for DTXDATCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtxdatcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/en.rs index f15bf65..7298843 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Module enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Module enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Module enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Module enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/framecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/framecfg.rs index 037aaa3..7ad7134 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/framecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/framecfg.rs @@ -1,399 +1,381 @@ #[doc = "Register `FRAMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `FRAMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DATABITS` reader - Data-Bit Mode"] -pub type DATABITS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Data-Bit Mode\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DATABITS_A { +pub enum Databits { #[doc = "1: Each frame contains 7 data bits"] - SEVEN = 1, + Seven = 1, #[doc = "2: Each frame contains 8 data bits"] - EIGHT = 2, + Eight = 2, #[doc = "3: Each frame contains 9 data bits"] - NINE = 3, + Nine = 3, #[doc = "4: Each frame contains 10 data bits"] - TEN = 4, + Ten = 4, #[doc = "5: Each frame contains 11 data bits"] - ELEVEN = 5, + Eleven = 5, #[doc = "6: Each frame contains 12 data bits"] - TWELVE = 6, + Twelve = 6, #[doc = "7: Each frame contains 13 data bits"] - THIRTEEN = 7, + Thirteen = 7, #[doc = "8: Each frame contains 14 data bits"] - FOURTEEN = 8, + Fourteen = 8, #[doc = "9: Each frame contains 15 data bits"] - FIFTEEN = 9, + Fifteen = 9, #[doc = "10: Each frame contains 16 data bits"] - SIXTEEN = 10, + Sixteen = 10, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DATABITS_A) -> Self { + fn from(variant: Databits) -> Self { variant as _ } } -impl DATABITS_R { +impl crate::FieldSpec for Databits { + type Ux = u8; +} +impl crate::IsEnum for Databits {} +#[doc = "Field `DATABITS` reader - Data-Bit Mode"] +pub type DatabitsR = crate::FieldReader; +impl DatabitsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(DATABITS_A::SEVEN), - 2 => Some(DATABITS_A::EIGHT), - 3 => Some(DATABITS_A::NINE), - 4 => Some(DATABITS_A::TEN), - 5 => Some(DATABITS_A::ELEVEN), - 6 => Some(DATABITS_A::TWELVE), - 7 => Some(DATABITS_A::THIRTEEN), - 8 => Some(DATABITS_A::FOURTEEN), - 9 => Some(DATABITS_A::FIFTEEN), - 10 => Some(DATABITS_A::SIXTEEN), + 1 => Some(Databits::Seven), + 2 => Some(Databits::Eight), + 3 => Some(Databits::Nine), + 4 => Some(Databits::Ten), + 5 => Some(Databits::Eleven), + 6 => Some(Databits::Twelve), + 7 => Some(Databits::Thirteen), + 8 => Some(Databits::Fourteen), + 9 => Some(Databits::Fifteen), + 10 => Some(Databits::Sixteen), _ => None, } } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "Each frame contains 7 data bits"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == DATABITS_A::SEVEN + *self == Databits::Seven } - #[doc = "Checks if the value of the field is `EIGHT`"] + #[doc = "Each frame contains 8 data bits"] #[inline(always)] pub fn is_eight(&self) -> bool { - *self == DATABITS_A::EIGHT + *self == Databits::Eight } - #[doc = "Checks if the value of the field is `NINE`"] + #[doc = "Each frame contains 9 data bits"] #[inline(always)] pub fn is_nine(&self) -> bool { - *self == DATABITS_A::NINE + *self == Databits::Nine } - #[doc = "Checks if the value of the field is `TEN`"] + #[doc = "Each frame contains 10 data bits"] #[inline(always)] pub fn is_ten(&self) -> bool { - *self == DATABITS_A::TEN + *self == Databits::Ten } - #[doc = "Checks if the value of the field is `ELEVEN`"] + #[doc = "Each frame contains 11 data bits"] #[inline(always)] pub fn is_eleven(&self) -> bool { - *self == DATABITS_A::ELEVEN + *self == Databits::Eleven } - #[doc = "Checks if the value of the field is `TWELVE`"] + #[doc = "Each frame contains 12 data bits"] #[inline(always)] pub fn is_twelve(&self) -> bool { - *self == DATABITS_A::TWELVE + *self == Databits::Twelve } - #[doc = "Checks if the value of the field is `THIRTEEN`"] + #[doc = "Each frame contains 13 data bits"] #[inline(always)] pub fn is_thirteen(&self) -> bool { - *self == DATABITS_A::THIRTEEN + *self == Databits::Thirteen } - #[doc = "Checks if the value of the field is `FOURTEEN`"] + #[doc = "Each frame contains 14 data bits"] #[inline(always)] pub fn is_fourteen(&self) -> bool { - *self == DATABITS_A::FOURTEEN + *self == Databits::Fourteen } - #[doc = "Checks if the value of the field is `FIFTEEN`"] + #[doc = "Each frame contains 15 data bits"] #[inline(always)] pub fn is_fifteen(&self) -> bool { - *self == DATABITS_A::FIFTEEN + *self == Databits::Fifteen } - #[doc = "Checks if the value of the field is `SIXTEEN`"] + #[doc = "Each frame contains 16 data bits"] #[inline(always)] pub fn is_sixteen(&self) -> bool { - *self == DATABITS_A::SIXTEEN + *self == Databits::Sixteen } } #[doc = "Field `DATABITS` writer - Data-Bit Mode"] -pub type DATABITS_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, FRAMECFG_SPEC, u8, DATABITS_A, 4, O>; -impl<'a, const O: u8> DATABITS_W<'a, O> { +pub type DatabitsW<'a, REG> = crate::FieldWriter<'a, REG, 4, Databits>; +impl<'a, REG> DatabitsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Each frame contains 7 data bits"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(DATABITS_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Databits::Seven) } #[doc = "Each frame contains 8 data bits"] #[inline(always)] - pub fn eight(self) -> &'a mut W { - self.variant(DATABITS_A::EIGHT) + pub fn eight(self) -> &'a mut crate::W { + self.variant(Databits::Eight) } #[doc = "Each frame contains 9 data bits"] #[inline(always)] - pub fn nine(self) -> &'a mut W { - self.variant(DATABITS_A::NINE) + pub fn nine(self) -> &'a mut crate::W { + self.variant(Databits::Nine) } #[doc = "Each frame contains 10 data bits"] #[inline(always)] - pub fn ten(self) -> &'a mut W { - self.variant(DATABITS_A::TEN) + pub fn ten(self) -> &'a mut crate::W { + self.variant(Databits::Ten) } #[doc = "Each frame contains 11 data bits"] #[inline(always)] - pub fn eleven(self) -> &'a mut W { - self.variant(DATABITS_A::ELEVEN) + pub fn eleven(self) -> &'a mut crate::W { + self.variant(Databits::Eleven) } #[doc = "Each frame contains 12 data bits"] #[inline(always)] - pub fn twelve(self) -> &'a mut W { - self.variant(DATABITS_A::TWELVE) + pub fn twelve(self) -> &'a mut crate::W { + self.variant(Databits::Twelve) } #[doc = "Each frame contains 13 data bits"] #[inline(always)] - pub fn thirteen(self) -> &'a mut W { - self.variant(DATABITS_A::THIRTEEN) + pub fn thirteen(self) -> &'a mut crate::W { + self.variant(Databits::Thirteen) } #[doc = "Each frame contains 14 data bits"] #[inline(always)] - pub fn fourteen(self) -> &'a mut W { - self.variant(DATABITS_A::FOURTEEN) + pub fn fourteen(self) -> &'a mut crate::W { + self.variant(Databits::Fourteen) } #[doc = "Each frame contains 15 data bits"] #[inline(always)] - pub fn fifteen(self) -> &'a mut W { - self.variant(DATABITS_A::FIFTEEN) + pub fn fifteen(self) -> &'a mut crate::W { + self.variant(Databits::Fifteen) } #[doc = "Each frame contains 16 data bits"] #[inline(always)] - pub fn sixteen(self) -> &'a mut W { - self.variant(DATABITS_A::SIXTEEN) + pub fn sixteen(self) -> &'a mut crate::W { + self.variant(Databits::Sixteen) } } -#[doc = "Field `PARITY` reader - Parity-Bit Mode"] -pub type PARITY_R = crate::FieldReader; #[doc = "Parity-Bit Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PARITY_A { +pub enum Parity { #[doc = "0: Parity bits are not used"] - NONE = 0, + None = 0, #[doc = "2: Even parity are used. Parity bits are automatically generated and checked by hardware."] - EVEN = 2, + Even = 2, #[doc = "3: Odd parity is used. Parity bits are automatically generated and checked by hardware."] - ODD = 3, + Odd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PARITY_A) -> Self { + fn from(variant: Parity) -> Self { variant as _ } } -impl PARITY_R { +impl crate::FieldSpec for Parity { + type Ux = u8; +} +impl crate::IsEnum for Parity {} +#[doc = "Field `PARITY` reader - Parity-Bit Mode"] +pub type ParityR = crate::FieldReader; +impl ParityR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PARITY_A::NONE), - 2 => Some(PARITY_A::EVEN), - 3 => Some(PARITY_A::ODD), + 0 => Some(Parity::None), + 2 => Some(Parity::Even), + 3 => Some(Parity::Odd), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Parity bits are not used"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == PARITY_A::NONE + *self == Parity::None } - #[doc = "Checks if the value of the field is `EVEN`"] + #[doc = "Even parity are used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] pub fn is_even(&self) -> bool { - *self == PARITY_A::EVEN + *self == Parity::Even } - #[doc = "Checks if the value of the field is `ODD`"] + #[doc = "Odd parity is used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] pub fn is_odd(&self) -> bool { - *self == PARITY_A::ODD + *self == Parity::Odd } } #[doc = "Field `PARITY` writer - Parity-Bit Mode"] -pub type PARITY_W<'a, const O: u8> = crate::FieldWriter<'a, u32, FRAMECFG_SPEC, u8, PARITY_A, 2, O>; -impl<'a, const O: u8> PARITY_W<'a, O> { +pub type ParityW<'a, REG> = crate::FieldWriter<'a, REG, 2, Parity>; +impl<'a, REG> ParityW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Parity bits are not used"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(PARITY_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Parity::None) } #[doc = "Even parity are used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] - pub fn even(self) -> &'a mut W { - self.variant(PARITY_A::EVEN) + pub fn even(self) -> &'a mut crate::W { + self.variant(Parity::Even) } #[doc = "Odd parity is used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] - pub fn odd(self) -> &'a mut W { - self.variant(PARITY_A::ODD) + pub fn odd(self) -> &'a mut crate::W { + self.variant(Parity::Odd) } } -#[doc = "Field `STOPBITS` reader - Stop-Bit Mode"] -pub type STOPBITS_R = crate::FieldReader; #[doc = "Stop-Bit Mode\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STOPBITS_A { +pub enum Stopbits { #[doc = "0: The transmitter generates a half stop bit. Stop-bits are not verified by receiver"] - HALF = 0, + Half = 0, #[doc = "1: One stop bit is generated and verified"] - ONE = 1, + One = 1, #[doc = "2: The transmitter generates one and a half stop bit. The receiver verifies the first stop bit"] - ONEANDAHALF = 2, + Oneandahalf = 2, #[doc = "3: The transmitter generates two stop bits. The receiver checks the first stop-bit only"] - TWO = 3, + Two = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STOPBITS_A) -> Self { + fn from(variant: Stopbits) -> Self { variant as _ } } -impl STOPBITS_R { +impl crate::FieldSpec for Stopbits { + type Ux = u8; +} +impl crate::IsEnum for Stopbits {} +#[doc = "Field `STOPBITS` reader - Stop-Bit Mode"] +pub type StopbitsR = crate::FieldReader; +impl StopbitsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> STOPBITS_A { + pub const fn variant(&self) -> Stopbits { match self.bits { - 0 => STOPBITS_A::HALF, - 1 => STOPBITS_A::ONE, - 2 => STOPBITS_A::ONEANDAHALF, - 3 => STOPBITS_A::TWO, + 0 => Stopbits::Half, + 1 => Stopbits::One, + 2 => Stopbits::Oneandahalf, + 3 => Stopbits::Two, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `HALF`"] + #[doc = "The transmitter generates a half stop bit. Stop-bits are not verified by receiver"] #[inline(always)] pub fn is_half(&self) -> bool { - *self == STOPBITS_A::HALF + *self == Stopbits::Half } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "One stop bit is generated and verified"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == STOPBITS_A::ONE + *self == Stopbits::One } - #[doc = "Checks if the value of the field is `ONEANDAHALF`"] + #[doc = "The transmitter generates one and a half stop bit. The receiver verifies the first stop bit"] #[inline(always)] pub fn is_oneandahalf(&self) -> bool { - *self == STOPBITS_A::ONEANDAHALF + *self == Stopbits::Oneandahalf } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "The transmitter generates two stop bits. The receiver checks the first stop-bit only"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == STOPBITS_A::TWO + *self == Stopbits::Two } } #[doc = "Field `STOPBITS` writer - Stop-Bit Mode"] -pub type STOPBITS_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, FRAMECFG_SPEC, u8, STOPBITS_A, 2, O>; -impl<'a, const O: u8> STOPBITS_W<'a, O> { +pub type StopbitsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Stopbits, crate::Safe>; +impl<'a, REG> StopbitsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The transmitter generates a half stop bit. Stop-bits are not verified by receiver"] #[inline(always)] - pub fn half(self) -> &'a mut W { - self.variant(STOPBITS_A::HALF) + pub fn half(self) -> &'a mut crate::W { + self.variant(Stopbits::Half) } #[doc = "One stop bit is generated and verified"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(STOPBITS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Stopbits::One) } #[doc = "The transmitter generates one and a half stop bit. The receiver verifies the first stop bit"] #[inline(always)] - pub fn oneandahalf(self) -> &'a mut W { - self.variant(STOPBITS_A::ONEANDAHALF) + pub fn oneandahalf(self) -> &'a mut crate::W { + self.variant(Stopbits::Oneandahalf) } #[doc = "The transmitter generates two stop bits. The receiver checks the first stop-bit only"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(STOPBITS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Stopbits::Two) } } impl R { #[doc = "Bits 0:3 - Data-Bit Mode"] #[inline(always)] - pub fn databits(&self) -> DATABITS_R { - DATABITS_R::new((self.bits & 0x0f) as u8) + pub fn databits(&self) -> DatabitsR { + DatabitsR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - Parity-Bit Mode"] #[inline(always)] - pub fn parity(&self) -> PARITY_R { - PARITY_R::new(((self.bits >> 8) & 3) as u8) + pub fn parity(&self) -> ParityR { + ParityR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 12:13 - Stop-Bit Mode"] #[inline(always)] - pub fn stopbits(&self) -> STOPBITS_R { - STOPBITS_R::new(((self.bits >> 12) & 3) as u8) + pub fn stopbits(&self) -> StopbitsR { + StopbitsR::new(((self.bits >> 12) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - Data-Bit Mode"] #[inline(always)] #[must_use] - pub fn databits(&mut self) -> DATABITS_W<0> { - DATABITS_W::new(self) + pub fn databits(&mut self) -> DatabitsW { + DatabitsW::new(self, 0) } #[doc = "Bits 8:9 - Parity-Bit Mode"] #[inline(always)] #[must_use] - pub fn parity(&mut self) -> PARITY_W<8> { - PARITY_W::new(self) + pub fn parity(&mut self) -> ParityW { + ParityW::new(self, 8) } #[doc = "Bits 12:13 - Stop-Bit Mode"] #[inline(always)] #[must_use] - pub fn stopbits(&mut self) -> STOPBITS_W<12> { - STOPBITS_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stopbits(&mut self) -> StopbitsW { + StopbitsW::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [framecfg](index.html) module"] -pub struct FRAMECFG_SPEC; -impl crate::RegisterSpec for FRAMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`framecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`framecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct FramecfgSpec; +impl crate::RegisterSpec for FramecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [framecfg::R](R) reader structure"] -impl crate::Readable for FRAMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [framecfg::W](W) writer structure"] -impl crate::Writable for FRAMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`framecfg::R`](R) reader structure"] +impl crate::Readable for FramecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`framecfg::W`](W) writer structure"] +impl crate::Writable for FramecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FRAMECFG to value 0x1002"] -impl crate::Resettable for FRAMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0x1002; +impl crate::Resettable for FramecfgSpec { + const RESET_VALUE: u32 = 0x1002; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/ien.rs index 8013fa6..b81234b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/ien.rs @@ -1,335 +1,295 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXC` reader - TX Complete Enable"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXC` writer - TX Complete Enable"] -pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFL` reader - TX FIFO Level Enable"] -pub type TXFL_R = crate::BitReader; +pub type TxflR = crate::BitReader; #[doc = "Field `TXFL` writer - TX FIFO Level Enable"] -pub type TXFL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxflW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFL` reader - RX FIFO Level Enable"] -pub type RXFL_R = crate::BitReader; +pub type RxflR = crate::BitReader; #[doc = "Field `RXFL` writer - RX FIFO Level Enable"] -pub type RXFL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxflW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFULL` reader - RX FIFO Full Enable"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXFULL` writer - RX FIFO Full Enable"] -pub type RXFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxfullW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXOF` reader - RX FIFO Overflow Enable"] -pub type RXOF_R = crate::BitReader; +pub type RxofR = crate::BitReader; #[doc = "Field `RXOF` writer - RX FIFO Overflow Enable"] -pub type RXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUF` reader - RX FIFO Underflow Enable"] -pub type RXUF_R = crate::BitReader; +pub type RxufR = crate::BitReader; #[doc = "Field `RXUF` writer - RX FIFO Underflow Enable"] -pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXOF` reader - TX FIFO Overflow Enable"] -pub type TXOF_R = crate::BitReader; +pub type TxofR = crate::BitReader; #[doc = "Field `TXOF` writer - TX FIFO Overflow Enable"] -pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXUF` reader - TX FIFO Underflow Enable"] -pub type TXUF_R = crate::BitReader; +pub type TxufR = crate::BitReader; #[doc = "Field `TXUF` writer - TX FIFO Underflow Enable"] -pub type TXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PERR` reader - Parity Error Enable"] -pub type PERR_R = crate::BitReader; +pub type PerrR = crate::BitReader; #[doc = "Field `PERR` writer - Parity Error Enable"] -pub type PERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FERR` reader - Framing Error Enable"] -pub type FERR_R = crate::BitReader; +pub type FerrR = crate::BitReader; #[doc = "Field `FERR` writer - Framing Error Enable"] -pub type FERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPAF` reader - Multi-Processor Addr Frame Enable"] -pub type MPAF_R = crate::BitReader; +pub type MpafR = crate::BitReader; #[doc = "Field `MPAF` writer - Multi-Processor Addr Frame Enable"] -pub type MPAF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type MpafW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOADERR` reader - Load Error Enable"] -pub type LOADERR_R = crate::BitReader; +pub type LoaderrR = crate::BitReader; #[doc = "Field `LOADERR` writer - Load Error Enable"] -pub type LOADERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type LoaderrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCF` reader - Collision Check Fail Enable"] -pub type CCF_R = crate::BitReader; +pub type CcfR = crate::BitReader; #[doc = "Field `CCF` writer - Collision Check Fail Enable"] -pub type CCF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type CcfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXIDLE` reader - TX IDLE Enable"] -pub type TXIDLE_R = crate::BitReader; +pub type TxidleR = crate::BitReader; #[doc = "Field `TXIDLE` writer - TX IDLE Enable"] -pub type TXIDLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxidleW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STARTF` reader - Start Frame Enable"] -pub type STARTF_R = crate::BitReader; +pub type StartfR = crate::BitReader; #[doc = "Field `STARTF` writer - Start Frame Enable"] -pub type STARTF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type StartfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SIGF` reader - Signal Frame Enable"] -pub type SIGF_R = crate::BitReader; +pub type SigfR = crate::BitReader; #[doc = "Field `SIGF` writer - Signal Frame Enable"] -pub type SIGF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SigfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOBAUDDONE` reader - Auto Baud Complete Enable"] -pub type AUTOBAUDDONE_R = crate::BitReader; +pub type AutobauddoneR = crate::BitReader; #[doc = "Field `AUTOBAUDDONE` writer - Auto Baud Complete Enable"] -pub type AUTOBAUDDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AutobauddoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXTO` reader - RX Timeout Enable"] -pub type RXTO_R = crate::BitReader; +pub type RxtoR = crate::BitReader; #[doc = "Field `RXTO` writer - RX Timeout Enable"] -pub type RXTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxtoW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - TX Complete Enable"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new((self.bits & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - TX FIFO Level Enable"] #[inline(always)] - pub fn txfl(&self) -> TXFL_R { - TXFL_R::new(((self.bits >> 1) & 1) != 0) + pub fn txfl(&self) -> TxflR { + TxflR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RX FIFO Level Enable"] #[inline(always)] - pub fn rxfl(&self) -> RXFL_R { - RXFL_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxfl(&self) -> RxflR { + RxflR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - RX FIFO Full Enable"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - RX FIFO Overflow Enable"] #[inline(always)] - pub fn rxof(&self) -> RXOF_R { - RXOF_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxof(&self) -> RxofR { + RxofR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - RX FIFO Underflow Enable"] #[inline(always)] - pub fn rxuf(&self) -> RXUF_R { - RXUF_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxuf(&self) -> RxufR { + RxufR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX FIFO Overflow Enable"] #[inline(always)] - pub fn txof(&self) -> TXOF_R { - TXOF_R::new(((self.bits >> 6) & 1) != 0) + pub fn txof(&self) -> TxofR { + TxofR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - TX FIFO Underflow Enable"] #[inline(always)] - pub fn txuf(&self) -> TXUF_R { - TXUF_R::new(((self.bits >> 7) & 1) != 0) + pub fn txuf(&self) -> TxufR { + TxufR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Parity Error Enable"] #[inline(always)] - pub fn perr(&self) -> PERR_R { - PERR_R::new(((self.bits >> 8) & 1) != 0) + pub fn perr(&self) -> PerrR { + PerrR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Framing Error Enable"] #[inline(always)] - pub fn ferr(&self) -> FERR_R { - FERR_R::new(((self.bits >> 9) & 1) != 0) + pub fn ferr(&self) -> FerrR { + FerrR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Multi-Processor Addr Frame Enable"] #[inline(always)] - pub fn mpaf(&self) -> MPAF_R { - MPAF_R::new(((self.bits >> 10) & 1) != 0) + pub fn mpaf(&self) -> MpafR { + MpafR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Load Error Enable"] #[inline(always)] - pub fn loaderr(&self) -> LOADERR_R { - LOADERR_R::new(((self.bits >> 11) & 1) != 0) + pub fn loaderr(&self) -> LoaderrR { + LoaderrR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Collision Check Fail Enable"] #[inline(always)] - pub fn ccf(&self) -> CCF_R { - CCF_R::new(((self.bits >> 12) & 1) != 0) + pub fn ccf(&self) -> CcfR { + CcfR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - TX IDLE Enable"] #[inline(always)] - pub fn txidle(&self) -> TXIDLE_R { - TXIDLE_R::new(((self.bits >> 13) & 1) != 0) + pub fn txidle(&self) -> TxidleR { + TxidleR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 18 - Start Frame Enable"] #[inline(always)] - pub fn startf(&self) -> STARTF_R { - STARTF_R::new(((self.bits >> 18) & 1) != 0) + pub fn startf(&self) -> StartfR { + StartfR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Signal Frame Enable"] #[inline(always)] - pub fn sigf(&self) -> SIGF_R { - SIGF_R::new(((self.bits >> 19) & 1) != 0) + pub fn sigf(&self) -> SigfR { + SigfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 24 - Auto Baud Complete Enable"] #[inline(always)] - pub fn autobauddone(&self) -> AUTOBAUDDONE_R { - AUTOBAUDDONE_R::new(((self.bits >> 24) & 1) != 0) + pub fn autobauddone(&self) -> AutobauddoneR { + AutobauddoneR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - RX Timeout Enable"] #[inline(always)] - pub fn rxto(&self) -> RXTO_R { - RXTO_R::new(((self.bits >> 25) & 1) != 0) + pub fn rxto(&self) -> RxtoR { + RxtoR::new(((self.bits >> 25) & 1) != 0) } } impl W { #[doc = "Bit 0 - TX Complete Enable"] #[inline(always)] #[must_use] - pub fn txc(&mut self) -> TXC_W<0> { - TXC_W::new(self) + pub fn txc(&mut self) -> TxcW { + TxcW::new(self, 0) } #[doc = "Bit 1 - TX FIFO Level Enable"] #[inline(always)] #[must_use] - pub fn txfl(&mut self) -> TXFL_W<1> { - TXFL_W::new(self) + pub fn txfl(&mut self) -> TxflW { + TxflW::new(self, 1) } #[doc = "Bit 2 - RX FIFO Level Enable"] #[inline(always)] #[must_use] - pub fn rxfl(&mut self) -> RXFL_W<2> { - RXFL_W::new(self) + pub fn rxfl(&mut self) -> RxflW { + RxflW::new(self, 2) } #[doc = "Bit 3 - RX FIFO Full Enable"] #[inline(always)] #[must_use] - pub fn rxfull(&mut self) -> RXFULL_W<3> { - RXFULL_W::new(self) + pub fn rxfull(&mut self) -> RxfullW { + RxfullW::new(self, 3) } #[doc = "Bit 4 - RX FIFO Overflow Enable"] #[inline(always)] #[must_use] - pub fn rxof(&mut self) -> RXOF_W<4> { - RXOF_W::new(self) + pub fn rxof(&mut self) -> RxofW { + RxofW::new(self, 4) } #[doc = "Bit 5 - RX FIFO Underflow Enable"] #[inline(always)] #[must_use] - pub fn rxuf(&mut self) -> RXUF_W<5> { - RXUF_W::new(self) + pub fn rxuf(&mut self) -> RxufW { + RxufW::new(self, 5) } #[doc = "Bit 6 - TX FIFO Overflow Enable"] #[inline(always)] #[must_use] - pub fn txof(&mut self) -> TXOF_W<6> { - TXOF_W::new(self) + pub fn txof(&mut self) -> TxofW { + TxofW::new(self, 6) } #[doc = "Bit 7 - TX FIFO Underflow Enable"] #[inline(always)] #[must_use] - pub fn txuf(&mut self) -> TXUF_W<7> { - TXUF_W::new(self) + pub fn txuf(&mut self) -> TxufW { + TxufW::new(self, 7) } #[doc = "Bit 8 - Parity Error Enable"] #[inline(always)] #[must_use] - pub fn perr(&mut self) -> PERR_W<8> { - PERR_W::new(self) + pub fn perr(&mut self) -> PerrW { + PerrW::new(self, 8) } #[doc = "Bit 9 - Framing Error Enable"] #[inline(always)] #[must_use] - pub fn ferr(&mut self) -> FERR_W<9> { - FERR_W::new(self) + pub fn ferr(&mut self) -> FerrW { + FerrW::new(self, 9) } #[doc = "Bit 10 - Multi-Processor Addr Frame Enable"] #[inline(always)] #[must_use] - pub fn mpaf(&mut self) -> MPAF_W<10> { - MPAF_W::new(self) + pub fn mpaf(&mut self) -> MpafW { + MpafW::new(self, 10) } #[doc = "Bit 11 - Load Error Enable"] #[inline(always)] #[must_use] - pub fn loaderr(&mut self) -> LOADERR_W<11> { - LOADERR_W::new(self) + pub fn loaderr(&mut self) -> LoaderrW { + LoaderrW::new(self, 11) } #[doc = "Bit 12 - Collision Check Fail Enable"] #[inline(always)] #[must_use] - pub fn ccf(&mut self) -> CCF_W<12> { - CCF_W::new(self) + pub fn ccf(&mut self) -> CcfW { + CcfW::new(self, 12) } #[doc = "Bit 13 - TX IDLE Enable"] #[inline(always)] #[must_use] - pub fn txidle(&mut self) -> TXIDLE_W<13> { - TXIDLE_W::new(self) + pub fn txidle(&mut self) -> TxidleW { + TxidleW::new(self, 13) } #[doc = "Bit 18 - Start Frame Enable"] #[inline(always)] #[must_use] - pub fn startf(&mut self) -> STARTF_W<18> { - STARTF_W::new(self) + pub fn startf(&mut self) -> StartfW { + StartfW::new(self, 18) } #[doc = "Bit 19 - Signal Frame Enable"] #[inline(always)] #[must_use] - pub fn sigf(&mut self) -> SIGF_W<19> { - SIGF_W::new(self) + pub fn sigf(&mut self) -> SigfW { + SigfW::new(self, 19) } #[doc = "Bit 24 - Auto Baud Complete Enable"] #[inline(always)] #[must_use] - pub fn autobauddone(&mut self) -> AUTOBAUDDONE_W<24> { - AUTOBAUDDONE_W::new(self) + pub fn autobauddone(&mut self) -> AutobauddoneW { + AutobauddoneW::new(self, 24) } #[doc = "Bit 25 - RX Timeout Enable"] #[inline(always)] #[must_use] - pub fn rxto(&mut self) -> RXTO_W<25> { - RXTO_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rxto(&mut self) -> RxtoW { + RxtoW::new(self, 25) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/if_.rs index 75345eb..85b7d94 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/if_.rs @@ -1,335 +1,295 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXC` reader - TX Complete Interrupt Flag"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXC` writer - TX Complete Interrupt Flag"] -pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFL` reader - TX FIFO Level Interrupt Flag"] -pub type TXFL_R = crate::BitReader; +pub type TxflR = crate::BitReader; #[doc = "Field `TXFL` writer - TX FIFO Level Interrupt Flag"] -pub type TXFL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxflW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFL` reader - RX FIFO Level Interrupt Flag"] -pub type RXFL_R = crate::BitReader; +pub type RxflR = crate::BitReader; #[doc = "Field `RXFL` writer - RX FIFO Level Interrupt Flag"] -pub type RXFL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxflW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFULL` reader - RX FIFO Full Interrupt Flag"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXFULL` writer - RX FIFO Full Interrupt Flag"] -pub type RXFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxfullW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXOF` reader - RX FIFO Overflow Interrupt Flag"] -pub type RXOF_R = crate::BitReader; +pub type RxofR = crate::BitReader; #[doc = "Field `RXOF` writer - RX FIFO Overflow Interrupt Flag"] -pub type RXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUF` reader - RX FIFO Underflow Interrupt Flag"] -pub type RXUF_R = crate::BitReader; +pub type RxufR = crate::BitReader; #[doc = "Field `RXUF` writer - RX FIFO Underflow Interrupt Flag"] -pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXOF` reader - TX FIFO Overflow Interrupt Flag"] -pub type TXOF_R = crate::BitReader; +pub type TxofR = crate::BitReader; #[doc = "Field `TXOF` writer - TX FIFO Overflow Interrupt Flag"] -pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXUF` reader - TX FIFO Underflow Interrupt Flag"] -pub type TXUF_R = crate::BitReader; +pub type TxufR = crate::BitReader; #[doc = "Field `TXUF` writer - TX FIFO Underflow Interrupt Flag"] -pub type TXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PERR` reader - Parity Error Interrupt Flag"] -pub type PERR_R = crate::BitReader; +pub type PerrR = crate::BitReader; #[doc = "Field `PERR` writer - Parity Error Interrupt Flag"] -pub type PERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FERR` reader - Framing Error Interrupt Flag"] -pub type FERR_R = crate::BitReader; +pub type FerrR = crate::BitReader; #[doc = "Field `FERR` writer - Framing Error Interrupt Flag"] -pub type FERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPAF` reader - Multi-Processor Address Frame Interrupt"] -pub type MPAF_R = crate::BitReader; +pub type MpafR = crate::BitReader; #[doc = "Field `MPAF` writer - Multi-Processor Address Frame Interrupt"] -pub type MPAF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type MpafW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOADERR` reader - Load Error Interrupt Flag"] -pub type LOADERR_R = crate::BitReader; +pub type LoaderrR = crate::BitReader; #[doc = "Field `LOADERR` writer - Load Error Interrupt Flag"] -pub type LOADERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type LoaderrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCF` reader - Collision Check Fail Interrupt Flag"] -pub type CCF_R = crate::BitReader; +pub type CcfR = crate::BitReader; #[doc = "Field `CCF` writer - Collision Check Fail Interrupt Flag"] -pub type CCF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type CcfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXIDLE` reader - TX Idle Interrupt Flag"] -pub type TXIDLE_R = crate::BitReader; +pub type TxidleR = crate::BitReader; #[doc = "Field `TXIDLE` writer - TX Idle Interrupt Flag"] -pub type TXIDLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxidleW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STARTF` reader - Start Frame Interrupt Flag"] -pub type STARTF_R = crate::BitReader; +pub type StartfR = crate::BitReader; #[doc = "Field `STARTF` writer - Start Frame Interrupt Flag"] -pub type STARTF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type StartfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SIGF` reader - Signal Frame Interrupt Flag"] -pub type SIGF_R = crate::BitReader; +pub type SigfR = crate::BitReader; #[doc = "Field `SIGF` writer - Signal Frame Interrupt Flag"] -pub type SIGF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SigfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOBAUDDONE` reader - Auto Baud Complete Interrupt Flag"] -pub type AUTOBAUDDONE_R = crate::BitReader; +pub type AutobauddoneR = crate::BitReader; #[doc = "Field `AUTOBAUDDONE` writer - Auto Baud Complete Interrupt Flag"] -pub type AUTOBAUDDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AutobauddoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXTO` reader - RX Timeout Interrupt Flag"] -pub type RXTO_R = crate::BitReader; +pub type RxtoR = crate::BitReader; #[doc = "Field `RXTO` writer - RX Timeout Interrupt Flag"] -pub type RXTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxtoW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - TX Complete Interrupt Flag"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new((self.bits & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - TX FIFO Level Interrupt Flag"] #[inline(always)] - pub fn txfl(&self) -> TXFL_R { - TXFL_R::new(((self.bits >> 1) & 1) != 0) + pub fn txfl(&self) -> TxflR { + TxflR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RX FIFO Level Interrupt Flag"] #[inline(always)] - pub fn rxfl(&self) -> RXFL_R { - RXFL_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxfl(&self) -> RxflR { + RxflR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - RX FIFO Full Interrupt Flag"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - RX FIFO Overflow Interrupt Flag"] #[inline(always)] - pub fn rxof(&self) -> RXOF_R { - RXOF_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxof(&self) -> RxofR { + RxofR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - RX FIFO Underflow Interrupt Flag"] #[inline(always)] - pub fn rxuf(&self) -> RXUF_R { - RXUF_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxuf(&self) -> RxufR { + RxufR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX FIFO Overflow Interrupt Flag"] #[inline(always)] - pub fn txof(&self) -> TXOF_R { - TXOF_R::new(((self.bits >> 6) & 1) != 0) + pub fn txof(&self) -> TxofR { + TxofR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - TX FIFO Underflow Interrupt Flag"] #[inline(always)] - pub fn txuf(&self) -> TXUF_R { - TXUF_R::new(((self.bits >> 7) & 1) != 0) + pub fn txuf(&self) -> TxufR { + TxufR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Parity Error Interrupt Flag"] #[inline(always)] - pub fn perr(&self) -> PERR_R { - PERR_R::new(((self.bits >> 8) & 1) != 0) + pub fn perr(&self) -> PerrR { + PerrR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Framing Error Interrupt Flag"] #[inline(always)] - pub fn ferr(&self) -> FERR_R { - FERR_R::new(((self.bits >> 9) & 1) != 0) + pub fn ferr(&self) -> FerrR { + FerrR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Multi-Processor Address Frame Interrupt"] #[inline(always)] - pub fn mpaf(&self) -> MPAF_R { - MPAF_R::new(((self.bits >> 10) & 1) != 0) + pub fn mpaf(&self) -> MpafR { + MpafR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Load Error Interrupt Flag"] #[inline(always)] - pub fn loaderr(&self) -> LOADERR_R { - LOADERR_R::new(((self.bits >> 11) & 1) != 0) + pub fn loaderr(&self) -> LoaderrR { + LoaderrR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Collision Check Fail Interrupt Flag"] #[inline(always)] - pub fn ccf(&self) -> CCF_R { - CCF_R::new(((self.bits >> 12) & 1) != 0) + pub fn ccf(&self) -> CcfR { + CcfR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - TX Idle Interrupt Flag"] #[inline(always)] - pub fn txidle(&self) -> TXIDLE_R { - TXIDLE_R::new(((self.bits >> 13) & 1) != 0) + pub fn txidle(&self) -> TxidleR { + TxidleR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 18 - Start Frame Interrupt Flag"] #[inline(always)] - pub fn startf(&self) -> STARTF_R { - STARTF_R::new(((self.bits >> 18) & 1) != 0) + pub fn startf(&self) -> StartfR { + StartfR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Signal Frame Interrupt Flag"] #[inline(always)] - pub fn sigf(&self) -> SIGF_R { - SIGF_R::new(((self.bits >> 19) & 1) != 0) + pub fn sigf(&self) -> SigfR { + SigfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 24 - Auto Baud Complete Interrupt Flag"] #[inline(always)] - pub fn autobauddone(&self) -> AUTOBAUDDONE_R { - AUTOBAUDDONE_R::new(((self.bits >> 24) & 1) != 0) + pub fn autobauddone(&self) -> AutobauddoneR { + AutobauddoneR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - RX Timeout Interrupt Flag"] #[inline(always)] - pub fn rxto(&self) -> RXTO_R { - RXTO_R::new(((self.bits >> 25) & 1) != 0) + pub fn rxto(&self) -> RxtoR { + RxtoR::new(((self.bits >> 25) & 1) != 0) } } impl W { #[doc = "Bit 0 - TX Complete Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txc(&mut self) -> TXC_W<0> { - TXC_W::new(self) + pub fn txc(&mut self) -> TxcW { + TxcW::new(self, 0) } #[doc = "Bit 1 - TX FIFO Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txfl(&mut self) -> TXFL_W<1> { - TXFL_W::new(self) + pub fn txfl(&mut self) -> TxflW { + TxflW::new(self, 1) } #[doc = "Bit 2 - RX FIFO Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxfl(&mut self) -> RXFL_W<2> { - RXFL_W::new(self) + pub fn rxfl(&mut self) -> RxflW { + RxflW::new(self, 2) } #[doc = "Bit 3 - RX FIFO Full Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxfull(&mut self) -> RXFULL_W<3> { - RXFULL_W::new(self) + pub fn rxfull(&mut self) -> RxfullW { + RxfullW::new(self, 3) } #[doc = "Bit 4 - RX FIFO Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxof(&mut self) -> RXOF_W<4> { - RXOF_W::new(self) + pub fn rxof(&mut self) -> RxofW { + RxofW::new(self, 4) } #[doc = "Bit 5 - RX FIFO Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxuf(&mut self) -> RXUF_W<5> { - RXUF_W::new(self) + pub fn rxuf(&mut self) -> RxufW { + RxufW::new(self, 5) } #[doc = "Bit 6 - TX FIFO Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txof(&mut self) -> TXOF_W<6> { - TXOF_W::new(self) + pub fn txof(&mut self) -> TxofW { + TxofW::new(self, 6) } #[doc = "Bit 7 - TX FIFO Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txuf(&mut self) -> TXUF_W<7> { - TXUF_W::new(self) + pub fn txuf(&mut self) -> TxufW { + TxufW::new(self, 7) } #[doc = "Bit 8 - Parity Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn perr(&mut self) -> PERR_W<8> { - PERR_W::new(self) + pub fn perr(&mut self) -> PerrW { + PerrW::new(self, 8) } #[doc = "Bit 9 - Framing Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ferr(&mut self) -> FERR_W<9> { - FERR_W::new(self) + pub fn ferr(&mut self) -> FerrW { + FerrW::new(self, 9) } #[doc = "Bit 10 - Multi-Processor Address Frame Interrupt"] #[inline(always)] #[must_use] - pub fn mpaf(&mut self) -> MPAF_W<10> { - MPAF_W::new(self) + pub fn mpaf(&mut self) -> MpafW { + MpafW::new(self, 10) } #[doc = "Bit 11 - Load Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn loaderr(&mut self) -> LOADERR_W<11> { - LOADERR_W::new(self) + pub fn loaderr(&mut self) -> LoaderrW { + LoaderrW::new(self, 11) } #[doc = "Bit 12 - Collision Check Fail Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ccf(&mut self) -> CCF_W<12> { - CCF_W::new(self) + pub fn ccf(&mut self) -> CcfW { + CcfW::new(self, 12) } #[doc = "Bit 13 - TX Idle Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txidle(&mut self) -> TXIDLE_W<13> { - TXIDLE_W::new(self) + pub fn txidle(&mut self) -> TxidleW { + TxidleW::new(self, 13) } #[doc = "Bit 18 - Start Frame Interrupt Flag"] #[inline(always)] #[must_use] - pub fn startf(&mut self) -> STARTF_W<18> { - STARTF_W::new(self) + pub fn startf(&mut self) -> StartfW { + StartfW::new(self, 18) } #[doc = "Bit 19 - Signal Frame Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sigf(&mut self) -> SIGF_W<19> { - SIGF_W::new(self) + pub fn sigf(&mut self) -> SigfW { + SigfW::new(self, 19) } #[doc = "Bit 24 - Auto Baud Complete Interrupt Flag"] #[inline(always)] #[must_use] - pub fn autobauddone(&mut self) -> AUTOBAUDDONE_W<24> { - AUTOBAUDDONE_W::new(self) + pub fn autobauddone(&mut self) -> AutobauddoneW { + AutobauddoneW::new(self, 24) } #[doc = "Bit 25 - RX Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxto(&mut self) -> RXTO_W<25> { - RXTO_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rxto(&mut self) -> RxtoW { + RxtoW::new(self, 25) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/ipversion.rs index 85cb381..0068345 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/irhfcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/irhfcfg.rs index 5216f33..2e61f42 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/irhfcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/irhfcfg.rs @@ -1,231 +1,201 @@ #[doc = "Register `IRHFCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IRHFCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `IRHFEN` reader - Enable IrDA Module"] -pub type IRHFEN_R = crate::BitReader; +pub type IrhfenR = crate::BitReader; #[doc = "Field `IRHFEN` writer - Enable IrDA Module"] -pub type IRHFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRHFCFG_SPEC, bool, O>; -#[doc = "Field `IRHFPW` reader - IrDA TX Pulse Width"] -pub type IRHFPW_R = crate::FieldReader; +pub type IrhfenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "IrDA TX Pulse Width\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum IRHFPW_A { +pub enum Irhfpw { #[doc = "0: IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1"] - ONE = 0, + One = 0, #[doc = "1: IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1"] - TWO = 1, + Two = 1, #[doc = "2: IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1"] - THREE = 2, + Three = 2, #[doc = "3: IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1"] - FOUR = 3, + Four = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: IRHFPW_A) -> Self { + fn from(variant: Irhfpw) -> Self { variant as _ } } -impl IRHFPW_R { +impl crate::FieldSpec for Irhfpw { + type Ux = u8; +} +impl crate::IsEnum for Irhfpw {} +#[doc = "Field `IRHFPW` reader - IrDA TX Pulse Width"] +pub type IrhfpwR = crate::FieldReader; +impl IrhfpwR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> IRHFPW_A { + pub const fn variant(&self) -> Irhfpw { match self.bits { - 0 => IRHFPW_A::ONE, - 1 => IRHFPW_A::TWO, - 2 => IRHFPW_A::THREE, - 3 => IRHFPW_A::FOUR, + 0 => Irhfpw::One, + 1 => Irhfpw::Two, + 2 => Irhfpw::Three, + 3 => Irhfpw::Four, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == IRHFPW_A::ONE + *self == Irhfpw::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == IRHFPW_A::TWO + *self == Irhfpw::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == IRHFPW_A::THREE + *self == Irhfpw::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == IRHFPW_A::FOUR + *self == Irhfpw::Four } } #[doc = "Field `IRHFPW` writer - IrDA TX Pulse Width"] -pub type IRHFPW_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, IRHFCFG_SPEC, u8, IRHFPW_A, 2, O>; -impl<'a, const O: u8> IRHFPW_W<'a, O> { +pub type IrhfpwW<'a, REG> = crate::FieldWriter<'a, REG, 2, Irhfpw, crate::Safe>; +impl<'a, REG> IrhfpwW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(IRHFPW_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Irhfpw::One) } #[doc = "IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(IRHFPW_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Irhfpw::Two) } #[doc = "IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(IRHFPW_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Irhfpw::Three) } #[doc = "IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(IRHFPW_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Irhfpw::Four) } } -#[doc = "Field `IRHFFILT` reader - IrDA RX Filter"] -pub type IRHFFILT_R = crate::BitReader; #[doc = "IrDA RX Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IRHFFILT_A { +pub enum Irhffilt { #[doc = "0: No filter enabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Filter enabled. IrDA pulse must be high for at least 5 consecutive clock cycles to be detected"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IRHFFILT_A) -> Self { + fn from(variant: Irhffilt) -> Self { variant as u8 != 0 } } -impl IRHFFILT_R { +#[doc = "Field `IRHFFILT` reader - IrDA RX Filter"] +pub type IrhffiltR = crate::BitReader; +impl IrhffiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> IRHFFILT_A { + pub const fn variant(&self) -> Irhffilt { match self.bits { - false => IRHFFILT_A::DISABLE, - true => IRHFFILT_A::ENABLE, + false => Irhffilt::Disable, + true => Irhffilt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "No filter enabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == IRHFFILT_A::DISABLE + *self == Irhffilt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Filter enabled. IrDA pulse must be high for at least 5 consecutive clock cycles to be detected"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == IRHFFILT_A::ENABLE + *self == Irhffilt::Enable } } #[doc = "Field `IRHFFILT` writer - IrDA RX Filter"] -pub type IRHFFILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRHFCFG_SPEC, IRHFFILT_A, O>; -impl<'a, const O: u8> IRHFFILT_W<'a, O> { +pub type IrhffiltW<'a, REG> = crate::BitWriter<'a, REG, Irhffilt>; +impl<'a, REG> IrhffiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No filter enabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(IRHFFILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Irhffilt::Disable) } #[doc = "Filter enabled. IrDA pulse must be high for at least 5 consecutive clock cycles to be detected"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(IRHFFILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Irhffilt::Enable) } } impl R { #[doc = "Bit 0 - Enable IrDA Module"] #[inline(always)] - pub fn irhfen(&self) -> IRHFEN_R { - IRHFEN_R::new((self.bits & 1) != 0) + pub fn irhfen(&self) -> IrhfenR { + IrhfenR::new((self.bits & 1) != 0) } #[doc = "Bits 1:2 - IrDA TX Pulse Width"] #[inline(always)] - pub fn irhfpw(&self) -> IRHFPW_R { - IRHFPW_R::new(((self.bits >> 1) & 3) as u8) + pub fn irhfpw(&self) -> IrhfpwR { + IrhfpwR::new(((self.bits >> 1) & 3) as u8) } #[doc = "Bit 3 - IrDA RX Filter"] #[inline(always)] - pub fn irhffilt(&self) -> IRHFFILT_R { - IRHFFILT_R::new(((self.bits >> 3) & 1) != 0) + pub fn irhffilt(&self) -> IrhffiltR { + IrhffiltR::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable IrDA Module"] #[inline(always)] #[must_use] - pub fn irhfen(&mut self) -> IRHFEN_W<0> { - IRHFEN_W::new(self) + pub fn irhfen(&mut self) -> IrhfenW { + IrhfenW::new(self, 0) } #[doc = "Bits 1:2 - IrDA TX Pulse Width"] #[inline(always)] #[must_use] - pub fn irhfpw(&mut self) -> IRHFPW_W<1> { - IRHFPW_W::new(self) + pub fn irhfpw(&mut self) -> IrhfpwW { + IrhfpwW::new(self, 1) } #[doc = "Bit 3 - IrDA RX Filter"] #[inline(always)] #[must_use] - pub fn irhffilt(&mut self) -> IRHFFILT_W<3> { - IRHFFILT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn irhffilt(&mut self) -> IrhffiltW { + IrhffiltW::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irhfcfg](index.html) module"] -pub struct IRHFCFG_SPEC; -impl crate::RegisterSpec for IRHFCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`irhfcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irhfcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrhfcfgSpec; +impl crate::RegisterSpec for IrhfcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [irhfcfg::R](R) reader structure"] -impl crate::Readable for IRHFCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [irhfcfg::W](W) writer structure"] -impl crate::Writable for IRHFCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`irhfcfg::R`](R) reader structure"] +impl crate::Readable for IrhfcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`irhfcfg::W`](W) writer structure"] +impl crate::Writable for IrhfcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRHFCFG to value 0"] -impl crate::Resettable for IRHFCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IrhfcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/rxdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/rxdata.rs index f2cf950..cb4530c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/rxdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/rxdata.rs @@ -1,37 +1,22 @@ #[doc = "Register `RXDATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATA` reader - RX Data and Control bits"] -pub type RXDATA_R = crate::FieldReader; +pub type RxdataR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - RX Data and Control bits"] #[inline(always)] - pub fn rxdata(&self) -> RXDATA_R { - RXDATA_R::new((self.bits & 0xffff) as u16) + pub fn rxdata(&self) -> RxdataR { + RxdataR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdata](index.html) module"] -pub struct RXDATA_SPEC; -impl crate::RegisterSpec for RXDATA_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdata::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdataSpec; +impl crate::RegisterSpec for RxdataSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdata::R](R) reader structure"] -impl crate::Readable for RXDATA_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdata::R`](R) reader structure"] +impl crate::Readable for RxdataSpec {} #[doc = "`reset()` method sets RXDATA to value 0"] -impl crate::Resettable for RXDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/rxdatap.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/rxdatap.rs index f78bc3c..b490a48 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/rxdatap.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/rxdatap.rs @@ -1,37 +1,22 @@ #[doc = "Register `RXDATAP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATAP` reader - RX Data Peek"] -pub type RXDATAP_R = crate::FieldReader; +pub type RxdatapR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - RX Data Peek"] #[inline(always)] - pub fn rxdatap(&self) -> RXDATAP_R { - RXDATAP_R::new((self.bits & 0xffff) as u16) + pub fn rxdatap(&self) -> RxdatapR { + RxdatapR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdatap](index.html) module"] -pub struct RXDATAP_SPEC; -impl crate::RegisterSpec for RXDATAP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdatap::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdatapSpec; +impl crate::RegisterSpec for RxdatapSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdatap::R](R) reader structure"] -impl crate::Readable for RXDATAP_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdatap::R`](R) reader structure"] +impl crate::Readable for RxdatapSpec {} #[doc = "`reset()` method sets RXDATAP to value 0"] -impl crate::Resettable for RXDATAP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdatapSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/sigframecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/sigframecfg.rs index 453819f..96b88c1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/sigframecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/sigframecfg.rs @@ -1,81 +1,40 @@ #[doc = "Register `SIGFRAMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SIGFRAMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SIGFRAME` reader - Signal Frame Value"] -pub type SIGFRAME_R = crate::FieldReader; +pub type SigframeR = crate::FieldReader; #[doc = "Field `SIGFRAME` writer - Signal Frame Value"] -pub type SIGFRAME_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SIGFRAMECFG_SPEC, u16, u16, 9, O>; +pub type SigframeW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; impl R { #[doc = "Bits 0:8 - Signal Frame Value"] #[inline(always)] - pub fn sigframe(&self) -> SIGFRAME_R { - SIGFRAME_R::new((self.bits & 0x01ff) as u16) + pub fn sigframe(&self) -> SigframeR { + SigframeR::new((self.bits & 0x01ff) as u16) } } impl W { #[doc = "Bits 0:8 - Signal Frame Value"] #[inline(always)] #[must_use] - pub fn sigframe(&mut self) -> SIGFRAME_W<0> { - SIGFRAME_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sigframe(&mut self) -> SigframeW { + SigframeW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sigframecfg](index.html) module"] -pub struct SIGFRAMECFG_SPEC; -impl crate::RegisterSpec for SIGFRAMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sigframecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sigframecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SigframecfgSpec; +impl crate::RegisterSpec for SigframecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [sigframecfg::R](R) reader structure"] -impl crate::Readable for SIGFRAMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sigframecfg::W](W) writer structure"] -impl crate::Writable for SIGFRAMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`sigframecfg::R`](R) reader structure"] +impl crate::Readable for SigframecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`sigframecfg::W`](W) writer structure"] +impl crate::Writable for SigframecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SIGFRAMECFG to value 0"] -impl crate::Resettable for SIGFRAMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SigframecfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/startframecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/startframecfg.rs index 44571b1..67dd6bf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/startframecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/startframecfg.rs @@ -1,81 +1,40 @@ #[doc = "Register `STARTFRAMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `STARTFRAMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `STARTFRAME` reader - Start Frame"] -pub type STARTFRAME_R = crate::FieldReader; +pub type StartframeR = crate::FieldReader; #[doc = "Field `STARTFRAME` writer - Start Frame"] -pub type STARTFRAME_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, STARTFRAMECFG_SPEC, u16, u16, 9, O>; +pub type StartframeW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; impl R { #[doc = "Bits 0:8 - Start Frame"] #[inline(always)] - pub fn startframe(&self) -> STARTFRAME_R { - STARTFRAME_R::new((self.bits & 0x01ff) as u16) + pub fn startframe(&self) -> StartframeR { + StartframeR::new((self.bits & 0x01ff) as u16) } } impl W { #[doc = "Bits 0:8 - Start Frame"] #[inline(always)] #[must_use] - pub fn startframe(&mut self) -> STARTFRAME_W<0> { - STARTFRAME_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn startframe(&mut self) -> StartframeW { + StartframeW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [startframecfg](index.html) module"] -pub struct STARTFRAMECFG_SPEC; -impl crate::RegisterSpec for STARTFRAMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`startframecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`startframecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StartframecfgSpec; +impl crate::RegisterSpec for StartframecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [startframecfg::R](R) reader structure"] -impl crate::Readable for STARTFRAMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [startframecfg::W](W) writer structure"] -impl crate::Writable for STARTFRAMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`startframecfg::R`](R) reader structure"] +impl crate::Readable for StartframecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`startframecfg::W`](W) writer structure"] +impl crate::Writable for StartframecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets STARTFRAMECFG to value 0"] -impl crate::Resettable for STARTFRAMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StartframecfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/status.rs index 3ad48a5..b418af7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/status.rs @@ -1,121 +1,106 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXENS` reader - Receiver Enable Status"] -pub type RXENS_R = crate::BitReader; +pub type RxensR = crate::BitReader; #[doc = "Field `TXENS` reader - Transmitter Enable Status"] -pub type TXENS_R = crate::BitReader; +pub type TxensR = crate::BitReader; #[doc = "Field `RXBLOCK` reader - Block Incoming Data"] -pub type RXBLOCK_R = crate::BitReader; +pub type RxblockR = crate::BitReader; #[doc = "Field `TXTRI` reader - Transmitter Tristated"] -pub type TXTRI_R = crate::BitReader; +pub type TxtriR = crate::BitReader; #[doc = "Field `TXC` reader - TX Complete"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXFL` reader - TX FIFO Level"] -pub type TXFL_R = crate::BitReader; +pub type TxflR = crate::BitReader; #[doc = "Field `RXFL` reader - RX FIFO Level"] -pub type RXFL_R = crate::BitReader; +pub type RxflR = crate::BitReader; #[doc = "Field `RXFULL` reader - RX FIFO Full"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXIDLE` reader - RX Idle"] -pub type RXIDLE_R = crate::BitReader; +pub type RxidleR = crate::BitReader; #[doc = "Field `TXIDLE` reader - TX Idle"] -pub type TXIDLE_R = crate::BitReader; +pub type TxidleR = crate::BitReader; #[doc = "Field `TXFCNT` reader - Valid entries in TX FIFO"] -pub type TXFCNT_R = crate::FieldReader; +pub type TxfcntR = crate::FieldReader; #[doc = "Field `AUTOBAUDDONE` reader - Auto Baud Rate Detection Completed"] -pub type AUTOBAUDDONE_R = crate::BitReader; +pub type AutobauddoneR = crate::BitReader; #[doc = "Field `CLEARTXBUSY` reader - TX FIFO Clear Busy"] -pub type CLEARTXBUSY_R = crate::BitReader; +pub type CleartxbusyR = crate::BitReader; impl R { #[doc = "Bit 0 - Receiver Enable Status"] #[inline(always)] - pub fn rxens(&self) -> RXENS_R { - RXENS_R::new((self.bits & 1) != 0) + pub fn rxens(&self) -> RxensR { + RxensR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transmitter Enable Status"] #[inline(always)] - pub fn txens(&self) -> TXENS_R { - TXENS_R::new(((self.bits >> 1) & 1) != 0) + pub fn txens(&self) -> TxensR { + TxensR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - Block Incoming Data"] #[inline(always)] - pub fn rxblock(&self) -> RXBLOCK_R { - RXBLOCK_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxblock(&self) -> RxblockR { + RxblockR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Transmitter Tristated"] #[inline(always)] - pub fn txtri(&self) -> TXTRI_R { - TXTRI_R::new(((self.bits >> 4) & 1) != 0) + pub fn txtri(&self) -> TxtriR { + TxtriR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - TX Complete"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new(((self.bits >> 5) & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX FIFO Level"] #[inline(always)] - pub fn txfl(&self) -> TXFL_R { - TXFL_R::new(((self.bits >> 6) & 1) != 0) + pub fn txfl(&self) -> TxflR { + TxflR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - RX FIFO Level"] #[inline(always)] - pub fn rxfl(&self) -> RXFL_R { - RXFL_R::new(((self.bits >> 7) & 1) != 0) + pub fn rxfl(&self) -> RxflR { + RxflR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - RX FIFO Full"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 8) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 12 - RX Idle"] #[inline(always)] - pub fn rxidle(&self) -> RXIDLE_R { - RXIDLE_R::new(((self.bits >> 12) & 1) != 0) + pub fn rxidle(&self) -> RxidleR { + RxidleR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - TX Idle"] #[inline(always)] - pub fn txidle(&self) -> TXIDLE_R { - TXIDLE_R::new(((self.bits >> 13) & 1) != 0) + pub fn txidle(&self) -> TxidleR { + TxidleR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bits 16:20 - Valid entries in TX FIFO"] #[inline(always)] - pub fn txfcnt(&self) -> TXFCNT_R { - TXFCNT_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn txfcnt(&self) -> TxfcntR { + TxfcntR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bit 24 - Auto Baud Rate Detection Completed"] #[inline(always)] - pub fn autobauddone(&self) -> AUTOBAUDDONE_R { - AUTOBAUDDONE_R::new(((self.bits >> 24) & 1) != 0) + pub fn autobauddone(&self) -> AutobauddoneR { + AutobauddoneR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - TX FIFO Clear Busy"] #[inline(always)] - pub fn cleartxbusy(&self) -> CLEARTXBUSY_R { - CLEARTXBUSY_R::new(((self.bits >> 25) & 1) != 0) + pub fn cleartxbusy(&self) -> CleartxbusyR { + CleartxbusyR::new(((self.bits >> 25) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0x3040"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0x3040; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0x3040; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/syncbusy.rs index 3190b02..713965c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/syncbusy.rs @@ -1,114 +1,99 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DIV` reader - SYNCBUSY for DIV in CLKDIV"] -pub type DIV_R = crate::BitReader; +pub type DivR = crate::BitReader; #[doc = "Field `RXTEN` reader - SYNCBUSY for RXTEN in TRIGCTRL"] -pub type RXTEN_R = crate::BitReader; +pub type RxtenR = crate::BitReader; #[doc = "Field `TXTEN` reader - SYNCBUSY for TXTEN in TRIGCTRL"] -pub type TXTEN_R = crate::BitReader; +pub type TxtenR = crate::BitReader; #[doc = "Field `RXEN` reader - SYNCBUSY for RXEN in CMD"] -pub type RXEN_R = crate::BitReader; +pub type RxenR = crate::BitReader; #[doc = "Field `RXDIS` reader - SYNCBUSY for RXDIS in CMD"] -pub type RXDIS_R = crate::BitReader; +pub type RxdisR = crate::BitReader; #[doc = "Field `TXEN` reader - SYNCBUSY for TXEN in CMD"] -pub type TXEN_R = crate::BitReader; +pub type TxenR = crate::BitReader; #[doc = "Field `TXDIS` reader - SYNCBUSY for TXDIS in CMD"] -pub type TXDIS_R = crate::BitReader; +pub type TxdisR = crate::BitReader; #[doc = "Field `RXBLOCKEN` reader - SYNCBUSY for RXBLOCKEN in CMD"] -pub type RXBLOCKEN_R = crate::BitReader; +pub type RxblockenR = crate::BitReader; #[doc = "Field `RXBLOCKDIS` reader - SYNCBUSY for RXBLOCKDIS in CMD"] -pub type RXBLOCKDIS_R = crate::BitReader; +pub type RxblockdisR = crate::BitReader; #[doc = "Field `TXTRIEN` reader - SYNCBUSY for TXTRIEN in CMD"] -pub type TXTRIEN_R = crate::BitReader; +pub type TxtrienR = crate::BitReader; #[doc = "Field `TXTRIDIS` reader - SYNCBUSY in TXTRIDIS in CMD"] -pub type TXTRIDIS_R = crate::BitReader; +pub type TxtridisR = crate::BitReader; #[doc = "Field `AUTOTXTEN` reader - SYNCBUSY for AUTOTXTEN in TRIGCTRL"] -pub type AUTOTXTEN_R = crate::BitReader; +pub type AutotxtenR = crate::BitReader; impl R { #[doc = "Bit 0 - SYNCBUSY for DIV in CLKDIV"] #[inline(always)] - pub fn div(&self) -> DIV_R { - DIV_R::new((self.bits & 1) != 0) + pub fn div(&self) -> DivR { + DivR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - SYNCBUSY for RXTEN in TRIGCTRL"] #[inline(always)] - pub fn rxten(&self) -> RXTEN_R { - RXTEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn rxten(&self) -> RxtenR { + RxtenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - SYNCBUSY for TXTEN in TRIGCTRL"] #[inline(always)] - pub fn txten(&self) -> TXTEN_R { - TXTEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn txten(&self) -> TxtenR { + TxtenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - SYNCBUSY for RXEN in CMD"] #[inline(always)] - pub fn rxen(&self) -> RXEN_R { - RXEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxen(&self) -> RxenR { + RxenR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - SYNCBUSY for RXDIS in CMD"] #[inline(always)] - pub fn rxdis(&self) -> RXDIS_R { - RXDIS_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxdis(&self) -> RxdisR { + RxdisR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - SYNCBUSY for TXEN in CMD"] #[inline(always)] - pub fn txen(&self) -> TXEN_R { - TXEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn txen(&self) -> TxenR { + TxenR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - SYNCBUSY for TXDIS in CMD"] #[inline(always)] - pub fn txdis(&self) -> TXDIS_R { - TXDIS_R::new(((self.bits >> 6) & 1) != 0) + pub fn txdis(&self) -> TxdisR { + TxdisR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - SYNCBUSY for RXBLOCKEN in CMD"] #[inline(always)] - pub fn rxblocken(&self) -> RXBLOCKEN_R { - RXBLOCKEN_R::new(((self.bits >> 7) & 1) != 0) + pub fn rxblocken(&self) -> RxblockenR { + RxblockenR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - SYNCBUSY for RXBLOCKDIS in CMD"] #[inline(always)] - pub fn rxblockdis(&self) -> RXBLOCKDIS_R { - RXBLOCKDIS_R::new(((self.bits >> 8) & 1) != 0) + pub fn rxblockdis(&self) -> RxblockdisR { + RxblockdisR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - SYNCBUSY for TXTRIEN in CMD"] #[inline(always)] - pub fn txtrien(&self) -> TXTRIEN_R { - TXTRIEN_R::new(((self.bits >> 9) & 1) != 0) + pub fn txtrien(&self) -> TxtrienR { + TxtrienR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - SYNCBUSY in TXTRIDIS in CMD"] #[inline(always)] - pub fn txtridis(&self) -> TXTRIDIS_R { - TXTRIDIS_R::new(((self.bits >> 10) & 1) != 0) + pub fn txtridis(&self) -> TxtridisR { + TxtridisR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - SYNCBUSY for AUTOTXTEN in TRIGCTRL"] #[inline(always)] - pub fn autotxten(&self) -> AUTOTXTEN_R { - AUTOTXTEN_R::new(((self.bits >> 11) & 1) != 0) + pub fn autotxten(&self) -> AutotxtenR { + AutotxtenR::new(((self.bits >> 11) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/timingcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/timingcfg.rs index ba30f19..8c1ed53 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/timingcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/timingcfg.rs @@ -1,595 +1,584 @@ #[doc = "Register `TIMINGCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMINGCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `TXDELAY` reader - TX Delay Transmission"] -pub type TXDELAY_R = crate::FieldReader; +pub type W = crate::W; #[doc = "TX Delay Transmission\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TXDELAY_A { +pub enum Txdelay { #[doc = "0: Frames are transmitted immediately."] - NONE = 0, + None = 0, #[doc = "1: Transmission of new frames is delayed by a single bit period."] - SINGLE = 1, + Single = 1, #[doc = "2: Transmission of new frames is delayed by a two bit periods."] - DOUBLE = 2, + Double = 2, #[doc = "3: Transmission of new frames is delayed by a three bit periods."] - TRIPPLE = 3, + Tripple = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TXDELAY_A) -> Self { + fn from(variant: Txdelay) -> Self { variant as _ } } -impl TXDELAY_R { +impl crate::FieldSpec for Txdelay { + type Ux = u8; +} +impl crate::IsEnum for Txdelay {} +#[doc = "Field `TXDELAY` reader - TX Delay Transmission"] +pub type TxdelayR = crate::FieldReader; +impl TxdelayR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXDELAY_A { + pub const fn variant(&self) -> Txdelay { match self.bits { - 0 => TXDELAY_A::NONE, - 1 => TXDELAY_A::SINGLE, - 2 => TXDELAY_A::DOUBLE, - 3 => TXDELAY_A::TRIPPLE, + 0 => Txdelay::None, + 1 => Txdelay::Single, + 2 => Txdelay::Double, + 3 => Txdelay::Tripple, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Frames are transmitted immediately."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == TXDELAY_A::NONE + *self == Txdelay::None } - #[doc = "Checks if the value of the field is `SINGLE`"] + #[doc = "Transmission of new frames is delayed by a single bit period."] #[inline(always)] pub fn is_single(&self) -> bool { - *self == TXDELAY_A::SINGLE + *self == Txdelay::Single } - #[doc = "Checks if the value of the field is `DOUBLE`"] + #[doc = "Transmission of new frames is delayed by a two bit periods."] #[inline(always)] pub fn is_double(&self) -> bool { - *self == TXDELAY_A::DOUBLE + *self == Txdelay::Double } - #[doc = "Checks if the value of the field is `TRIPPLE`"] + #[doc = "Transmission of new frames is delayed by a three bit periods."] #[inline(always)] pub fn is_tripple(&self) -> bool { - *self == TXDELAY_A::TRIPPLE + *self == Txdelay::Tripple } } #[doc = "Field `TXDELAY` writer - TX Delay Transmission"] -pub type TXDELAY_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, TIMINGCFG_SPEC, u8, TXDELAY_A, 2, O>; -impl<'a, const O: u8> TXDELAY_W<'a, O> { +pub type TxdelayW<'a, REG> = crate::FieldWriter<'a, REG, 2, Txdelay, crate::Safe>; +impl<'a, REG> TxdelayW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Frames are transmitted immediately."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(TXDELAY_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Txdelay::None) } #[doc = "Transmission of new frames is delayed by a single bit period."] #[inline(always)] - pub fn single(self) -> &'a mut W { - self.variant(TXDELAY_A::SINGLE) + pub fn single(self) -> &'a mut crate::W { + self.variant(Txdelay::Single) } #[doc = "Transmission of new frames is delayed by a two bit periods."] #[inline(always)] - pub fn double(self) -> &'a mut W { - self.variant(TXDELAY_A::DOUBLE) + pub fn double(self) -> &'a mut crate::W { + self.variant(Txdelay::Double) } #[doc = "Transmission of new frames is delayed by a three bit periods."] #[inline(always)] - pub fn tripple(self) -> &'a mut W { - self.variant(TXDELAY_A::TRIPPLE) + pub fn tripple(self) -> &'a mut crate::W { + self.variant(Txdelay::Tripple) } } -#[doc = "Field `CSSETUP` reader - Chip Select Setup"] -pub type CSSETUP_R = crate::FieldReader; #[doc = "Chip Select Setup\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CSSETUP_A { +pub enum Cssetup { #[doc = "0: CS is asserted half or 1 baud-time before the start of transmission depending on CLKPHASE equal to 1 or 0 respectively"] - ZERO = 0, + Zero = 0, #[doc = "1: CS is asserted 1 additional baud-time before start of transmission"] - ONE = 1, + One = 1, #[doc = "2: CS is asserted 2 additional baud-times before start of transmission"] - TWO = 2, + Two = 2, #[doc = "3: CS is asserted 3 additional baud-times before start of transmission"] - THREE = 3, + Three = 3, #[doc = "4: CS is asserted 4 additional baud-times before start of transmission"] - FOUR = 4, + Four = 4, #[doc = "5: CS is asserted 5 additional baud-times before start of transmission"] - FIVE = 5, + Five = 5, #[doc = "6: CS is asserted 6 additional baud-times before start of transmission"] - SIX = 6, + Six = 6, #[doc = "7: CS is asserted 7 additional baud-times before start of transmission"] - SEVEN = 7, + Seven = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CSSETUP_A) -> Self { + fn from(variant: Cssetup) -> Self { variant as _ } } -impl CSSETUP_R { +impl crate::FieldSpec for Cssetup { + type Ux = u8; +} +impl crate::IsEnum for Cssetup {} +#[doc = "Field `CSSETUP` reader - Chip Select Setup"] +pub type CssetupR = crate::FieldReader; +impl CssetupR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CSSETUP_A { + pub const fn variant(&self) -> Cssetup { match self.bits { - 0 => CSSETUP_A::ZERO, - 1 => CSSETUP_A::ONE, - 2 => CSSETUP_A::TWO, - 3 => CSSETUP_A::THREE, - 4 => CSSETUP_A::FOUR, - 5 => CSSETUP_A::FIVE, - 6 => CSSETUP_A::SIX, - 7 => CSSETUP_A::SEVEN, + 0 => Cssetup::Zero, + 1 => Cssetup::One, + 2 => Cssetup::Two, + 3 => Cssetup::Three, + 4 => Cssetup::Four, + 5 => Cssetup::Five, + 6 => Cssetup::Six, + 7 => Cssetup::Seven, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ZERO`"] + #[doc = "CS is asserted half or 1 baud-time before the start of transmission depending on CLKPHASE equal to 1 or 0 respectively"] #[inline(always)] pub fn is_zero(&self) -> bool { - *self == CSSETUP_A::ZERO + *self == Cssetup::Zero } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "CS is asserted 1 additional baud-time before start of transmission"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == CSSETUP_A::ONE + *self == Cssetup::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "CS is asserted 2 additional baud-times before start of transmission"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == CSSETUP_A::TWO + *self == Cssetup::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "CS is asserted 3 additional baud-times before start of transmission"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == CSSETUP_A::THREE + *self == Cssetup::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "CS is asserted 4 additional baud-times before start of transmission"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == CSSETUP_A::FOUR + *self == Cssetup::Four } - #[doc = "Checks if the value of the field is `FIVE`"] + #[doc = "CS is asserted 5 additional baud-times before start of transmission"] #[inline(always)] pub fn is_five(&self) -> bool { - *self == CSSETUP_A::FIVE + *self == Cssetup::Five } - #[doc = "Checks if the value of the field is `SIX`"] + #[doc = "CS is asserted 6 additional baud-times before start of transmission"] #[inline(always)] pub fn is_six(&self) -> bool { - *self == CSSETUP_A::SIX + *self == Cssetup::Six } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "CS is asserted 7 additional baud-times before start of transmission"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == CSSETUP_A::SEVEN + *self == Cssetup::Seven } } #[doc = "Field `CSSETUP` writer - Chip Select Setup"] -pub type CSSETUP_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, TIMINGCFG_SPEC, u8, CSSETUP_A, 3, O>; -impl<'a, const O: u8> CSSETUP_W<'a, O> { +pub type CssetupW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cssetup, crate::Safe>; +impl<'a, REG> CssetupW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "CS is asserted half or 1 baud-time before the start of transmission depending on CLKPHASE equal to 1 or 0 respectively"] #[inline(always)] - pub fn zero(self) -> &'a mut W { - self.variant(CSSETUP_A::ZERO) + pub fn zero(self) -> &'a mut crate::W { + self.variant(Cssetup::Zero) } #[doc = "CS is asserted 1 additional baud-time before start of transmission"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(CSSETUP_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Cssetup::One) } #[doc = "CS is asserted 2 additional baud-times before start of transmission"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(CSSETUP_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Cssetup::Two) } #[doc = "CS is asserted 3 additional baud-times before start of transmission"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(CSSETUP_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Cssetup::Three) } #[doc = "CS is asserted 4 additional baud-times before start of transmission"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(CSSETUP_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Cssetup::Four) } #[doc = "CS is asserted 5 additional baud-times before start of transmission"] #[inline(always)] - pub fn five(self) -> &'a mut W { - self.variant(CSSETUP_A::FIVE) + pub fn five(self) -> &'a mut crate::W { + self.variant(Cssetup::Five) } #[doc = "CS is asserted 6 additional baud-times before start of transmission"] #[inline(always)] - pub fn six(self) -> &'a mut W { - self.variant(CSSETUP_A::SIX) + pub fn six(self) -> &'a mut crate::W { + self.variant(Cssetup::Six) } #[doc = "CS is asserted 7 additional baud-times before start of transmission"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(CSSETUP_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Cssetup::Seven) } } -#[doc = "Field `CSHOLD` reader - Chip Select Hold"] -pub type CSHOLD_R = crate::FieldReader; #[doc = "Chip Select Hold\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CSHOLD_A { +pub enum Cshold { #[doc = "0: CS is de-asserted half or 1 baud-time after the end of transmission depending on CLKPHASE equal to 1 or 0 respectively"] - ZERO = 0, + Zero = 0, #[doc = "1: CS is de-asserted 1 additional baud-time after the end of transmission"] - ONE = 1, + One = 1, #[doc = "2: CS is de-asserted 2 additional baud-times after the end of transmission"] - TWO = 2, + Two = 2, #[doc = "3: CS is de-asserted 3 additional baud-times after the end of transmission"] - THREE = 3, + Three = 3, #[doc = "4: CS is de-asserted 4 additional baud-times after the end of transmission"] - FOUR = 4, + Four = 4, #[doc = "5: CS is de-asserted 5 additional baud-times after the end of transmission"] - FIVE = 5, + Five = 5, #[doc = "6: CS is de-asserted 6 additional baud-times after the end of transmission"] - SIX = 6, + Six = 6, #[doc = "7: CS is de-asserted 7 additional baud-times after the end of transmission"] - SEVEN = 7, + Seven = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CSHOLD_A) -> Self { + fn from(variant: Cshold) -> Self { variant as _ } } -impl CSHOLD_R { +impl crate::FieldSpec for Cshold { + type Ux = u8; +} +impl crate::IsEnum for Cshold {} +#[doc = "Field `CSHOLD` reader - Chip Select Hold"] +pub type CsholdR = crate::FieldReader; +impl CsholdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CSHOLD_A { + pub const fn variant(&self) -> Cshold { match self.bits { - 0 => CSHOLD_A::ZERO, - 1 => CSHOLD_A::ONE, - 2 => CSHOLD_A::TWO, - 3 => CSHOLD_A::THREE, - 4 => CSHOLD_A::FOUR, - 5 => CSHOLD_A::FIVE, - 6 => CSHOLD_A::SIX, - 7 => CSHOLD_A::SEVEN, + 0 => Cshold::Zero, + 1 => Cshold::One, + 2 => Cshold::Two, + 3 => Cshold::Three, + 4 => Cshold::Four, + 5 => Cshold::Five, + 6 => Cshold::Six, + 7 => Cshold::Seven, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ZERO`"] + #[doc = "CS is de-asserted half or 1 baud-time after the end of transmission depending on CLKPHASE equal to 1 or 0 respectively"] #[inline(always)] pub fn is_zero(&self) -> bool { - *self == CSHOLD_A::ZERO + *self == Cshold::Zero } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "CS is de-asserted 1 additional baud-time after the end of transmission"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == CSHOLD_A::ONE + *self == Cshold::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "CS is de-asserted 2 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == CSHOLD_A::TWO + *self == Cshold::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "CS is de-asserted 3 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == CSHOLD_A::THREE + *self == Cshold::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "CS is de-asserted 4 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == CSHOLD_A::FOUR + *self == Cshold::Four } - #[doc = "Checks if the value of the field is `FIVE`"] + #[doc = "CS is de-asserted 5 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_five(&self) -> bool { - *self == CSHOLD_A::FIVE + *self == Cshold::Five } - #[doc = "Checks if the value of the field is `SIX`"] + #[doc = "CS is de-asserted 6 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_six(&self) -> bool { - *self == CSHOLD_A::SIX + *self == Cshold::Six } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "CS is de-asserted 7 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == CSHOLD_A::SEVEN + *self == Cshold::Seven } } #[doc = "Field `CSHOLD` writer - Chip Select Hold"] -pub type CSHOLD_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, TIMINGCFG_SPEC, u8, CSHOLD_A, 3, O>; -impl<'a, const O: u8> CSHOLD_W<'a, O> { +pub type CsholdW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cshold, crate::Safe>; +impl<'a, REG> CsholdW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "CS is de-asserted half or 1 baud-time after the end of transmission depending on CLKPHASE equal to 1 or 0 respectively"] #[inline(always)] - pub fn zero(self) -> &'a mut W { - self.variant(CSHOLD_A::ZERO) + pub fn zero(self) -> &'a mut crate::W { + self.variant(Cshold::Zero) } #[doc = "CS is de-asserted 1 additional baud-time after the end of transmission"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(CSHOLD_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Cshold::One) } #[doc = "CS is de-asserted 2 additional baud-times after the end of transmission"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(CSHOLD_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Cshold::Two) } #[doc = "CS is de-asserted 3 additional baud-times after the end of transmission"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(CSHOLD_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Cshold::Three) } #[doc = "CS is de-asserted 4 additional baud-times after the end of transmission"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(CSHOLD_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Cshold::Four) } #[doc = "CS is de-asserted 5 additional baud-times after the end of transmission"] #[inline(always)] - pub fn five(self) -> &'a mut W { - self.variant(CSHOLD_A::FIVE) + pub fn five(self) -> &'a mut crate::W { + self.variant(Cshold::Five) } #[doc = "CS is de-asserted 6 additional baud-times after the end of transmission"] #[inline(always)] - pub fn six(self) -> &'a mut W { - self.variant(CSHOLD_A::SIX) + pub fn six(self) -> &'a mut crate::W { + self.variant(Cshold::Six) } #[doc = "CS is de-asserted 7 additional baud-times after the end of transmission"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(CSHOLD_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Cshold::Seven) } } -#[doc = "Field `ICS` reader - Inter-Character Spacing"] -pub type ICS_R = crate::FieldReader; #[doc = "Inter-Character Spacing\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICS_A { +pub enum Ics { #[doc = "0: There is no space between charcters"] - ZERO = 0, + Zero = 0, #[doc = "1: Create a space of 1 baud-times between frames"] - ONE = 1, + One = 1, #[doc = "2: Create a space of 2 baud-times between frames"] - TWO = 2, + Two = 2, #[doc = "3: Create a space of 3 baud-times between frames"] - THREE = 3, + Three = 3, #[doc = "4: Create a space of 4 baud-times between frames"] - FOUR = 4, + Four = 4, #[doc = "5: Create a space of 5 baud-times between frames"] - FIVE = 5, + Five = 5, #[doc = "6: Create a space of 6 baud-times between frames"] - SIX = 6, + Six = 6, #[doc = "7: Create a space of 7 baud-times between frames"] - SEVEN = 7, + Seven = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICS_A) -> Self { + fn from(variant: Ics) -> Self { variant as _ } } -impl ICS_R { +impl crate::FieldSpec for Ics { + type Ux = u8; +} +impl crate::IsEnum for Ics {} +#[doc = "Field `ICS` reader - Inter-Character Spacing"] +pub type IcsR = crate::FieldReader; +impl IcsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICS_A { + pub const fn variant(&self) -> Ics { match self.bits { - 0 => ICS_A::ZERO, - 1 => ICS_A::ONE, - 2 => ICS_A::TWO, - 3 => ICS_A::THREE, - 4 => ICS_A::FOUR, - 5 => ICS_A::FIVE, - 6 => ICS_A::SIX, - 7 => ICS_A::SEVEN, + 0 => Ics::Zero, + 1 => Ics::One, + 2 => Ics::Two, + 3 => Ics::Three, + 4 => Ics::Four, + 5 => Ics::Five, + 6 => Ics::Six, + 7 => Ics::Seven, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ZERO`"] + #[doc = "There is no space between charcters"] #[inline(always)] pub fn is_zero(&self) -> bool { - *self == ICS_A::ZERO + *self == Ics::Zero } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Create a space of 1 baud-times between frames"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == ICS_A::ONE + *self == Ics::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Create a space of 2 baud-times between frames"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == ICS_A::TWO + *self == Ics::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "Create a space of 3 baud-times between frames"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == ICS_A::THREE + *self == Ics::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Create a space of 4 baud-times between frames"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == ICS_A::FOUR + *self == Ics::Four } - #[doc = "Checks if the value of the field is `FIVE`"] + #[doc = "Create a space of 5 baud-times between frames"] #[inline(always)] pub fn is_five(&self) -> bool { - *self == ICS_A::FIVE + *self == Ics::Five } - #[doc = "Checks if the value of the field is `SIX`"] + #[doc = "Create a space of 6 baud-times between frames"] #[inline(always)] pub fn is_six(&self) -> bool { - *self == ICS_A::SIX + *self == Ics::Six } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "Create a space of 7 baud-times between frames"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == ICS_A::SEVEN + *self == Ics::Seven } } #[doc = "Field `ICS` writer - Inter-Character Spacing"] -pub type ICS_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, TIMINGCFG_SPEC, u8, ICS_A, 3, O>; -impl<'a, const O: u8> ICS_W<'a, O> { +pub type IcsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Ics, crate::Safe>; +impl<'a, REG> IcsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "There is no space between charcters"] #[inline(always)] - pub fn zero(self) -> &'a mut W { - self.variant(ICS_A::ZERO) + pub fn zero(self) -> &'a mut crate::W { + self.variant(Ics::Zero) } #[doc = "Create a space of 1 baud-times between frames"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(ICS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Ics::One) } #[doc = "Create a space of 2 baud-times between frames"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(ICS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Ics::Two) } #[doc = "Create a space of 3 baud-times between frames"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(ICS_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Ics::Three) } #[doc = "Create a space of 4 baud-times between frames"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(ICS_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Ics::Four) } #[doc = "Create a space of 5 baud-times between frames"] #[inline(always)] - pub fn five(self) -> &'a mut W { - self.variant(ICS_A::FIVE) + pub fn five(self) -> &'a mut crate::W { + self.variant(Ics::Five) } #[doc = "Create a space of 6 baud-times between frames"] #[inline(always)] - pub fn six(self) -> &'a mut W { - self.variant(ICS_A::SIX) + pub fn six(self) -> &'a mut crate::W { + self.variant(Ics::Six) } #[doc = "Create a space of 7 baud-times between frames"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(ICS_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Ics::Seven) } } #[doc = "Field `SETUPWINDOW` reader - Setup Window"] -pub type SETUPWINDOW_R = crate::FieldReader; +pub type SetupwindowR = crate::FieldReader; #[doc = "Field `SETUPWINDOW` writer - Setup Window"] -pub type SETUPWINDOW_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMINGCFG_SPEC, u8, u8, 4, O>; +pub type SetupwindowW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - TX Delay Transmission"] #[inline(always)] - pub fn txdelay(&self) -> TXDELAY_R { - TXDELAY_R::new((self.bits & 3) as u8) + pub fn txdelay(&self) -> TxdelayR { + TxdelayR::new((self.bits & 3) as u8) } #[doc = "Bits 4:6 - Chip Select Setup"] #[inline(always)] - pub fn cssetup(&self) -> CSSETUP_R { - CSSETUP_R::new(((self.bits >> 4) & 7) as u8) + pub fn cssetup(&self) -> CssetupR { + CssetupR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Chip Select Hold"] #[inline(always)] - pub fn cshold(&self) -> CSHOLD_R { - CSHOLD_R::new(((self.bits >> 8) & 7) as u8) + pub fn cshold(&self) -> CsholdR { + CsholdR::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Inter-Character Spacing"] #[inline(always)] - pub fn ics(&self) -> ICS_R { - ICS_R::new(((self.bits >> 12) & 7) as u8) + pub fn ics(&self) -> IcsR { + IcsR::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:19 - Setup Window"] #[inline(always)] - pub fn setupwindow(&self) -> SETUPWINDOW_R { - SETUPWINDOW_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn setupwindow(&self) -> SetupwindowR { + SetupwindowR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - TX Delay Transmission"] #[inline(always)] #[must_use] - pub fn txdelay(&mut self) -> TXDELAY_W<0> { - TXDELAY_W::new(self) + pub fn txdelay(&mut self) -> TxdelayW { + TxdelayW::new(self, 0) } #[doc = "Bits 4:6 - Chip Select Setup"] #[inline(always)] #[must_use] - pub fn cssetup(&mut self) -> CSSETUP_W<4> { - CSSETUP_W::new(self) + pub fn cssetup(&mut self) -> CssetupW { + CssetupW::new(self, 4) } #[doc = "Bits 8:10 - Chip Select Hold"] #[inline(always)] #[must_use] - pub fn cshold(&mut self) -> CSHOLD_W<8> { - CSHOLD_W::new(self) + pub fn cshold(&mut self) -> CsholdW { + CsholdW::new(self, 8) } #[doc = "Bits 12:14 - Inter-Character Spacing"] #[inline(always)] #[must_use] - pub fn ics(&mut self) -> ICS_W<12> { - ICS_W::new(self) + pub fn ics(&mut self) -> IcsW { + IcsW::new(self, 12) } #[doc = "Bits 16:19 - Setup Window"] #[inline(always)] #[must_use] - pub fn setupwindow(&mut self) -> SETUPWINDOW_W<16> { - SETUPWINDOW_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn setupwindow(&mut self) -> SetupwindowW { + SetupwindowW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timingcfg](index.html) module"] -pub struct TIMINGCFG_SPEC; -impl crate::RegisterSpec for TIMINGCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timingcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timingcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TimingcfgSpec; +impl crate::RegisterSpec for TimingcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [timingcfg::R](R) reader structure"] -impl crate::Readable for TIMINGCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timingcfg::W](W) writer structure"] -impl crate::Writable for TIMINGCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timingcfg::R`](R) reader structure"] +impl crate::Readable for TimingcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`timingcfg::W`](W) writer structure"] +impl crate::Writable for TimingcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMINGCFG to value 0x0005_0000"] -impl crate::Resettable for TIMINGCFG_SPEC { - const RESET_VALUE: Self::Ux = 0x0005_0000; +impl crate::Resettable for TimingcfgSpec { + const RESET_VALUE: u32 = 0x0005_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/trigctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/trigctrl.rs index 6e5750d..4b0d8fe 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/trigctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/trigctrl.rs @@ -1,110 +1,70 @@ #[doc = "Register `TRIGCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TRIGCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RXTEN` reader - Receive Trigger Enable"] -pub type RXTEN_R = crate::BitReader; +pub type RxtenR = crate::BitReader; #[doc = "Field `RXTEN` writer - Receive Trigger Enable"] -pub type RXTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type RxtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTEN` reader - Transmit Trigger Enable"] -pub type TXTEN_R = crate::BitReader; +pub type TxtenR = crate::BitReader; #[doc = "Field `TXTEN` writer - Transmit Trigger Enable"] -pub type TXTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type TxtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOTXTEN` reader - AUTOTX Trigger Enable"] -pub type AUTOTXTEN_R = crate::BitReader; +pub type AutotxtenR = crate::BitReader; #[doc = "Field `AUTOTXTEN` writer - AUTOTX Trigger Enable"] -pub type AUTOTXTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type AutotxtenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Receive Trigger Enable"] #[inline(always)] - pub fn rxten(&self) -> RXTEN_R { - RXTEN_R::new((self.bits & 1) != 0) + pub fn rxten(&self) -> RxtenR { + RxtenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transmit Trigger Enable"] #[inline(always)] - pub fn txten(&self) -> TXTEN_R { - TXTEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn txten(&self) -> TxtenR { + TxtenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - AUTOTX Trigger Enable"] #[inline(always)] - pub fn autotxten(&self) -> AUTOTXTEN_R { - AUTOTXTEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn autotxten(&self) -> AutotxtenR { + AutotxtenR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Receive Trigger Enable"] #[inline(always)] #[must_use] - pub fn rxten(&mut self) -> RXTEN_W<0> { - RXTEN_W::new(self) + pub fn rxten(&mut self) -> RxtenW { + RxtenW::new(self, 0) } #[doc = "Bit 1 - Transmit Trigger Enable"] #[inline(always)] #[must_use] - pub fn txten(&mut self) -> TXTEN_W<1> { - TXTEN_W::new(self) + pub fn txten(&mut self) -> TxtenW { + TxtenW::new(self, 1) } #[doc = "Bit 2 - AUTOTX Trigger Enable"] #[inline(always)] #[must_use] - pub fn autotxten(&mut self) -> AUTOTXTEN_W<2> { - AUTOTXTEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn autotxten(&mut self) -> AutotxtenW { + AutotxtenW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [trigctrl](index.html) module"] -pub struct TRIGCTRL_SPEC; -impl crate::RegisterSpec for TRIGCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`trigctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trigctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TrigctrlSpec; +impl crate::RegisterSpec for TrigctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [trigctrl::R](R) reader structure"] -impl crate::Readable for TRIGCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [trigctrl::W](W) writer structure"] -impl crate::Writable for TRIGCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`trigctrl::R`](R) reader structure"] +impl crate::Readable for TrigctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`trigctrl::W`](W) writer structure"] +impl crate::Writable for TrigctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TRIGCTRL to value 0"] -impl crate::Resettable for TRIGCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TrigctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/txdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/txdata.rs index 5605e30..48b104b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/txdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart1_s/txdata.rs @@ -1,52 +1,27 @@ #[doc = "Register `TXDATA` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXDATA` writer - TX Data and Control bits"] -pub type TXDATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDATA_SPEC, u16, u16, 16, O>; +pub type TxdataW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl W { #[doc = "Bits 0:15 - TX Data and Control bits"] #[inline(always)] #[must_use] - pub fn txdata(&mut self) -> TXDATA_W<0> { - TXDATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txdata(&mut self) -> TxdataW { + TxdataW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdata](index.html) module"] -pub struct TXDATA_SPEC; -impl crate::RegisterSpec for TXDATA_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdata::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxdataSpec; +impl crate::RegisterSpec for TxdataSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [txdata::W](W) writer structure"] -impl crate::Writable for TXDATA_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`txdata::W`](W) writer structure"] +impl crate::Writable for TxdataSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXDATA to value 0"] -impl crate::Resettable for TXDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns.rs index b5a3c22..61ca07b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns.rs @@ -1,131 +1,259 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + cfg0: Cfg0, + cfg1: Cfg1, + cfg2: Cfg2, + framecfg: Framecfg, + dtxdatcfg: Dtxdatcfg, + irhfcfg: Irhfcfg, + _reserved8: [u8; 0x04], + timingcfg: Timingcfg, + startframecfg: Startframecfg, + sigframecfg: Sigframecfg, + clkdiv: Clkdiv, + trigctrl: Trigctrl, + cmd: Cmd, + rxdata: Rxdata, + rxdatap: Rxdatap, + txdata: Txdata, + status: Status, + if_: If, + ien: Ien, + syncbusy: Syncbusy, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub cfg0: CFG0, + #[inline(always)] + pub const fn cfg0(&self) -> &Cfg0 { + &self.cfg0 + } #[doc = "0x0c - No Description"] - pub cfg1: CFG1, + #[inline(always)] + pub const fn cfg1(&self) -> &Cfg1 { + &self.cfg1 + } #[doc = "0x10 - No Description"] - pub cfg2: CFG2, + #[inline(always)] + pub const fn cfg2(&self) -> &Cfg2 { + &self.cfg2 + } #[doc = "0x14 - No Description"] - pub framecfg: FRAMECFG, + #[inline(always)] + pub const fn framecfg(&self) -> &Framecfg { + &self.framecfg + } #[doc = "0x18 - No Description"] - pub dtxdatcfg: DTXDATCFG, + #[inline(always)] + pub const fn dtxdatcfg(&self) -> &Dtxdatcfg { + &self.dtxdatcfg + } #[doc = "0x1c - No Description"] - pub irhfcfg: IRHFCFG, - _reserved8: [u8; 0x04], + #[inline(always)] + pub const fn irhfcfg(&self) -> &Irhfcfg { + &self.irhfcfg + } #[doc = "0x24 - No Description"] - pub timingcfg: TIMINGCFG, + #[inline(always)] + pub const fn timingcfg(&self) -> &Timingcfg { + &self.timingcfg + } #[doc = "0x28 - No Description"] - pub startframecfg: STARTFRAMECFG, + #[inline(always)] + pub const fn startframecfg(&self) -> &Startframecfg { + &self.startframecfg + } #[doc = "0x2c - No Description"] - pub sigframecfg: SIGFRAMECFG, + #[inline(always)] + pub const fn sigframecfg(&self) -> &Sigframecfg { + &self.sigframecfg + } #[doc = "0x30 - No Description"] - pub clkdiv: CLKDIV, + #[inline(always)] + pub const fn clkdiv(&self) -> &Clkdiv { + &self.clkdiv + } #[doc = "0x34 - No Description"] - pub trigctrl: TRIGCTRL, + #[inline(always)] + pub const fn trigctrl(&self) -> &Trigctrl { + &self.trigctrl + } #[doc = "0x38 - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x3c - No Description"] - pub rxdata: RXDATA, + #[inline(always)] + pub const fn rxdata(&self) -> &Rxdata { + &self.rxdata + } #[doc = "0x40 - No Description"] - pub rxdatap: RXDATAP, + #[inline(always)] + pub const fn rxdatap(&self) -> &Rxdatap { + &self.rxdatap + } #[doc = "0x44 - No Description"] - pub txdata: TXDATA, + #[inline(always)] + pub const fn txdata(&self) -> &Txdata { + &self.txdata + } #[doc = "0x48 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x4c - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x50 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x54 - No Description"] - pub syncbusy: SYNCBUSY, + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CFG0 (rw) register accessor: an alias for `Reg`"] -pub type CFG0 = crate::Reg; +#[doc = "CFG0 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg0`] +module"] +#[doc(alias = "CFG0")] +pub type Cfg0 = crate::Reg; #[doc = "No Description"] pub mod cfg0; -#[doc = "CFG1 (rw) register accessor: an alias for `Reg`"] -pub type CFG1 = crate::Reg; +#[doc = "CFG1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg1`] +module"] +#[doc(alias = "CFG1")] +pub type Cfg1 = crate::Reg; #[doc = "No Description"] pub mod cfg1; -#[doc = "CFG2 (rw) register accessor: an alias for `Reg`"] -pub type CFG2 = crate::Reg; +#[doc = "CFG2 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg2`] +module"] +#[doc(alias = "CFG2")] +pub type Cfg2 = crate::Reg; #[doc = "No Description"] pub mod cfg2; -#[doc = "FRAMECFG (rw) register accessor: an alias for `Reg`"] -pub type FRAMECFG = crate::Reg; +#[doc = "FRAMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`framecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`framecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@framecfg`] +module"] +#[doc(alias = "FRAMECFG")] +pub type Framecfg = crate::Reg; #[doc = "No Description"] pub mod framecfg; -#[doc = "DTXDATCFG (rw) register accessor: an alias for `Reg`"] -pub type DTXDATCFG = crate::Reg; +#[doc = "DTXDATCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtxdatcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtxdatcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtxdatcfg`] +module"] +#[doc(alias = "DTXDATCFG")] +pub type Dtxdatcfg = crate::Reg; #[doc = "No Description"] pub mod dtxdatcfg; -#[doc = "IRHFCFG (rw) register accessor: an alias for `Reg`"] -pub type IRHFCFG = crate::Reg; +#[doc = "IRHFCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`irhfcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irhfcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irhfcfg`] +module"] +#[doc(alias = "IRHFCFG")] +pub type Irhfcfg = crate::Reg; #[doc = "No Description"] pub mod irhfcfg; -#[doc = "TIMINGCFG (rw) register accessor: an alias for `Reg`"] -pub type TIMINGCFG = crate::Reg; +#[doc = "TIMINGCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timingcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timingcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timingcfg`] +module"] +#[doc(alias = "TIMINGCFG")] +pub type Timingcfg = crate::Reg; #[doc = "No Description"] pub mod timingcfg; -#[doc = "STARTFRAMECFG (rw) register accessor: an alias for `Reg`"] -pub type STARTFRAMECFG = crate::Reg; +#[doc = "STARTFRAMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`startframecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`startframecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@startframecfg`] +module"] +#[doc(alias = "STARTFRAMECFG")] +pub type Startframecfg = crate::Reg; #[doc = "No Description"] pub mod startframecfg; -#[doc = "SIGFRAMECFG (rw) register accessor: an alias for `Reg`"] -pub type SIGFRAMECFG = crate::Reg; +#[doc = "SIGFRAMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sigframecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sigframecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sigframecfg`] +module"] +#[doc(alias = "SIGFRAMECFG")] +pub type Sigframecfg = crate::Reg; #[doc = "No Description"] pub mod sigframecfg; -#[doc = "CLKDIV (rw) register accessor: an alias for `Reg`"] -pub type CLKDIV = crate::Reg; +#[doc = "CLKDIV (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv`] +module"] +#[doc(alias = "CLKDIV")] +pub type Clkdiv = crate::Reg; #[doc = "No Description"] pub mod clkdiv; -#[doc = "TRIGCTRL (rw) register accessor: an alias for `Reg`"] -pub type TRIGCTRL = crate::Reg; +#[doc = "TRIGCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`trigctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trigctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trigctrl`] +module"] +#[doc(alias = "TRIGCTRL")] +pub type Trigctrl = crate::Reg; #[doc = "No Description"] pub mod trigctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "RXDATA (r) register accessor: an alias for `Reg`"] -pub type RXDATA = crate::Reg; +#[doc = "RXDATA (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdata::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdata`] +module"] +#[doc(alias = "RXDATA")] +pub type Rxdata = crate::Reg; #[doc = "No Description"] pub mod rxdata; -#[doc = "RXDATAP (r) register accessor: an alias for `Reg`"] -pub type RXDATAP = crate::Reg; +#[doc = "RXDATAP (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdatap::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdatap`] +module"] +#[doc(alias = "RXDATAP")] +pub type Rxdatap = crate::Reg; #[doc = "No Description"] pub mod rxdatap; -#[doc = "TXDATA (w) register accessor: an alias for `Reg`"] -pub type TXDATA = crate::Reg; +#[doc = "TXDATA (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdata::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txdata`] +module"] +#[doc(alias = "TXDATA")] +pub type Txdata = crate::Reg; #[doc = "No Description"] pub mod txdata; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "No Description"] pub mod syncbusy; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/cfg0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/cfg0.rs index 89b67d3..f0c8da6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/cfg0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/cfg0.rs @@ -1,249 +1,227 @@ #[doc = "Register `CFG0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SYNC` reader - Synchronous Mode"] -pub type SYNC_R = crate::BitReader; +pub type W = crate::W; #[doc = "Synchronous Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYNC_A { +pub enum Sync { #[doc = "0: The EUSART operates in asynchronous mode"] - ASYNC = 0, + Async = 0, #[doc = "1: The EUSART operates in synchronous mode"] - SYNC = 1, + Sync = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYNC_A) -> Self { + fn from(variant: Sync) -> Self { variant as u8 != 0 } } -impl SYNC_R { +#[doc = "Field `SYNC` reader - Synchronous Mode"] +pub type SyncR = crate::BitReader; +impl SyncR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SYNC_A { + pub const fn variant(&self) -> Sync { match self.bits { - false => SYNC_A::ASYNC, - true => SYNC_A::SYNC, + false => Sync::Async, + true => Sync::Sync, } } - #[doc = "Checks if the value of the field is `ASYNC`"] + #[doc = "The EUSART operates in asynchronous mode"] #[inline(always)] pub fn is_async(&self) -> bool { - *self == SYNC_A::ASYNC + *self == Sync::Async } - #[doc = "Checks if the value of the field is `SYNC`"] + #[doc = "The EUSART operates in synchronous mode"] #[inline(always)] pub fn is_sync(&self) -> bool { - *self == SYNC_A::SYNC + *self == Sync::Sync } } #[doc = "Field `SYNC` writer - Synchronous Mode"] -pub type SYNC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, SYNC_A, O>; -impl<'a, const O: u8> SYNC_W<'a, O> { +pub type SyncW<'a, REG> = crate::BitWriter<'a, REG, Sync>; +impl<'a, REG> SyncW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The EUSART operates in asynchronous mode"] #[inline(always)] - pub fn async_(self) -> &'a mut W { - self.variant(SYNC_A::ASYNC) + pub fn async_(self) -> &'a mut crate::W { + self.variant(Sync::Async) } #[doc = "The EUSART operates in synchronous mode"] #[inline(always)] - pub fn sync(self) -> &'a mut W { - self.variant(SYNC_A::SYNC) + pub fn sync(self) -> &'a mut crate::W { + self.variant(Sync::Sync) } } -#[doc = "Field `LOOPBK` reader - Loopback Enable"] -pub type LOOPBK_R = crate::BitReader; #[doc = "Loopback Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOOPBK_A { +pub enum Loopbk { #[doc = "0: The receiver is connected to and receives data from UARTn_RX"] - DISABLE = 0, + Disable = 0, #[doc = "1: The receiver is connected to and receives data from UARTn_TX"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOOPBK_A) -> Self { + fn from(variant: Loopbk) -> Self { variant as u8 != 0 } } -impl LOOPBK_R { +#[doc = "Field `LOOPBK` reader - Loopback Enable"] +pub type LoopbkR = crate::BitReader; +impl LoopbkR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOOPBK_A { + pub const fn variant(&self) -> Loopbk { match self.bits { - false => LOOPBK_A::DISABLE, - true => LOOPBK_A::ENABLE, + false => Loopbk::Disable, + true => Loopbk::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The receiver is connected to and receives data from UARTn_RX"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == LOOPBK_A::DISABLE + *self == Loopbk::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The receiver is connected to and receives data from UARTn_TX"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == LOOPBK_A::ENABLE + *self == Loopbk::Enable } } #[doc = "Field `LOOPBK` writer - Loopback Enable"] -pub type LOOPBK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, LOOPBK_A, O>; -impl<'a, const O: u8> LOOPBK_W<'a, O> { +pub type LoopbkW<'a, REG> = crate::BitWriter<'a, REG, Loopbk>; +impl<'a, REG> LoopbkW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The receiver is connected to and receives data from UARTn_RX"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(LOOPBK_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Loopbk::Disable) } #[doc = "The receiver is connected to and receives data from UARTn_TX"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(LOOPBK_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Loopbk::Enable) } } -#[doc = "Field `CCEN` reader - Collision Check Enable"] -pub type CCEN_R = crate::BitReader; #[doc = "Collision Check Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCEN_A { +pub enum Ccen { #[doc = "0: Collision check is disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Collision check is enabled. The receiver must be enabled for the check to be performed"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCEN_A) -> Self { + fn from(variant: Ccen) -> Self { variant as u8 != 0 } } -impl CCEN_R { +#[doc = "Field `CCEN` reader - Collision Check Enable"] +pub type CcenR = crate::BitReader; +impl CcenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCEN_A { + pub const fn variant(&self) -> Ccen { match self.bits { - false => CCEN_A::DISABLE, - true => CCEN_A::ENABLE, + false => Ccen::Disable, + true => Ccen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Collision check is disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CCEN_A::DISABLE + *self == Ccen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Collision check is enabled. The receiver must be enabled for the check to be performed"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CCEN_A::ENABLE + *self == Ccen::Enable } } #[doc = "Field `CCEN` writer - Collision Check Enable"] -pub type CCEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, CCEN_A, O>; -impl<'a, const O: u8> CCEN_W<'a, O> { +pub type CcenW<'a, REG> = crate::BitWriter<'a, REG, Ccen>; +impl<'a, REG> CcenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Collision check is disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CCEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ccen::Disable) } #[doc = "Collision check is enabled. The receiver must be enabled for the check to be performed"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CCEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Ccen::Enable) } } -#[doc = "Field `MPM` reader - Multi-Processor Mode"] -pub type MPM_R = crate::BitReader; #[doc = "Multi-Processor Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MPM_A { +pub enum Mpm { #[doc = "0: The 9th bit of incoming frames has no special function"] - DISABLE = 0, + Disable = 0, #[doc = "1: An incoming frame with the 9th bit equal to MPAB will be loaded into the RX FIFO regardless of RXBLOCK and will result in the MPAB interrupt flag being set"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MPM_A) -> Self { + fn from(variant: Mpm) -> Self { variant as u8 != 0 } } -impl MPM_R { +#[doc = "Field `MPM` reader - Multi-Processor Mode"] +pub type MpmR = crate::BitReader; +impl MpmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MPM_A { + pub const fn variant(&self) -> Mpm { match self.bits { - false => MPM_A::DISABLE, - true => MPM_A::ENABLE, + false => Mpm::Disable, + true => Mpm::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The 9th bit of incoming frames has no special function"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == MPM_A::DISABLE + *self == Mpm::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "An incoming frame with the 9th bit equal to MPAB will be loaded into the RX FIFO regardless of RXBLOCK and will result in the MPAB interrupt flag being set"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == MPM_A::ENABLE + *self == Mpm::Enable } } #[doc = "Field `MPM` writer - Multi-Processor Mode"] -pub type MPM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, MPM_A, O>; -impl<'a, const O: u8> MPM_W<'a, O> { +pub type MpmW<'a, REG> = crate::BitWriter<'a, REG, Mpm>; +impl<'a, REG> MpmW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The 9th bit of incoming frames has no special function"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(MPM_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Mpm::Disable) } #[doc = "An incoming frame with the 9th bit equal to MPAB will be loaded into the RX FIFO regardless of RXBLOCK and will result in the MPAB interrupt flag being set"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(MPM_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Mpm::Enable) } } #[doc = "Field `MPAB` reader - Multi-Processor Address-Bit"] -pub type MPAB_R = crate::BitReader; +pub type MpabR = crate::BitReader; #[doc = "Field `MPAB` writer - Multi-Processor Address-Bit"] -pub type MPAB_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, O>; -#[doc = "Field `OVS` reader - Oversampling"] -pub type OVS_R = crate::FieldReader; +pub type MpabW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Oversampling\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum OVS_A { +pub enum Ovs { #[doc = "0: 16X oversampling"] X16 = 0, #[doc = "1: 8X oversampling"] @@ -253,646 +231,669 @@ pub enum OVS_A { #[doc = "3: 4X oversampling"] X4 = 3, #[doc = "4: Disable oversampling (for LF operation)"] - DISABLE = 4, + Disable = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: OVS_A) -> Self { + fn from(variant: Ovs) -> Self { variant as _ } } -impl OVS_R { +impl crate::FieldSpec for Ovs { + type Ux = u8; +} +impl crate::IsEnum for Ovs {} +#[doc = "Field `OVS` reader - Oversampling"] +pub type OvsR = crate::FieldReader; +impl OvsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(OVS_A::X16), - 1 => Some(OVS_A::X8), - 2 => Some(OVS_A::X6), - 3 => Some(OVS_A::X4), - 4 => Some(OVS_A::DISABLE), + 0 => Some(Ovs::X16), + 1 => Some(Ovs::X8), + 2 => Some(Ovs::X6), + 3 => Some(Ovs::X4), + 4 => Some(Ovs::Disable), _ => None, } } - #[doc = "Checks if the value of the field is `X16`"] + #[doc = "16X oversampling"] #[inline(always)] pub fn is_x16(&self) -> bool { - *self == OVS_A::X16 + *self == Ovs::X16 } - #[doc = "Checks if the value of the field is `X8`"] + #[doc = "8X oversampling"] #[inline(always)] pub fn is_x8(&self) -> bool { - *self == OVS_A::X8 + *self == Ovs::X8 } - #[doc = "Checks if the value of the field is `X6`"] + #[doc = "6X oversampling"] #[inline(always)] pub fn is_x6(&self) -> bool { - *self == OVS_A::X6 + *self == Ovs::X6 } - #[doc = "Checks if the value of the field is `X4`"] + #[doc = "4X oversampling"] #[inline(always)] pub fn is_x4(&self) -> bool { - *self == OVS_A::X4 + *self == Ovs::X4 } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable oversampling (for LF operation)"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == OVS_A::DISABLE + *self == Ovs::Disable } } #[doc = "Field `OVS` writer - Oversampling"] -pub type OVS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG0_SPEC, u8, OVS_A, 3, O>; -impl<'a, const O: u8> OVS_W<'a, O> { +pub type OvsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Ovs>; +impl<'a, REG> OvsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "16X oversampling"] #[inline(always)] - pub fn x16(self) -> &'a mut W { - self.variant(OVS_A::X16) + pub fn x16(self) -> &'a mut crate::W { + self.variant(Ovs::X16) } #[doc = "8X oversampling"] #[inline(always)] - pub fn x8(self) -> &'a mut W { - self.variant(OVS_A::X8) + pub fn x8(self) -> &'a mut crate::W { + self.variant(Ovs::X8) } #[doc = "6X oversampling"] #[inline(always)] - pub fn x6(self) -> &'a mut W { - self.variant(OVS_A::X6) + pub fn x6(self) -> &'a mut crate::W { + self.variant(Ovs::X6) } #[doc = "4X oversampling"] #[inline(always)] - pub fn x4(self) -> &'a mut W { - self.variant(OVS_A::X4) + pub fn x4(self) -> &'a mut crate::W { + self.variant(Ovs::X4) } #[doc = "Disable oversampling (for LF operation)"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(OVS_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ovs::Disable) } } -#[doc = "Field `MSBF` reader - Most Significant Bit First"] -pub type MSBF_R = crate::BitReader; #[doc = "Most Significant Bit First\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MSBF_A { +pub enum Msbf { #[doc = "0: Data is sent with the least significant bit first"] - DISABLE = 0, + Disable = 0, #[doc = "1: Data is sent with the most significant bit first"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MSBF_A) -> Self { + fn from(variant: Msbf) -> Self { variant as u8 != 0 } } -impl MSBF_R { +#[doc = "Field `MSBF` reader - Most Significant Bit First"] +pub type MsbfR = crate::BitReader; +impl MsbfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MSBF_A { + pub const fn variant(&self) -> Msbf { match self.bits { - false => MSBF_A::DISABLE, - true => MSBF_A::ENABLE, + false => Msbf::Disable, + true => Msbf::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Data is sent with the least significant bit first"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == MSBF_A::DISABLE + *self == Msbf::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Data is sent with the most significant bit first"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == MSBF_A::ENABLE + *self == Msbf::Enable } } #[doc = "Field `MSBF` writer - Most Significant Bit First"] -pub type MSBF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, MSBF_A, O>; -impl<'a, const O: u8> MSBF_W<'a, O> { +pub type MsbfW<'a, REG> = crate::BitWriter<'a, REG, Msbf>; +impl<'a, REG> MsbfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Data is sent with the least significant bit first"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(MSBF_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Msbf::Disable) } #[doc = "Data is sent with the most significant bit first"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(MSBF_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Msbf::Enable) } } -#[doc = "Field `RXINV` reader - Receiver Input Invert"] -pub type RXINV_R = crate::BitReader; #[doc = "Receiver Input Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RXINV_A { +pub enum Rxinv { #[doc = "0: Input is passed directly to the receiver"] - DISABLE = 0, + Disable = 0, #[doc = "1: Input is inverted before it is passed to the receiver"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RXINV_A) -> Self { + fn from(variant: Rxinv) -> Self { variant as u8 != 0 } } -impl RXINV_R { +#[doc = "Field `RXINV` reader - Receiver Input Invert"] +pub type RxinvR = crate::BitReader; +impl RxinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RXINV_A { + pub const fn variant(&self) -> Rxinv { match self.bits { - false => RXINV_A::DISABLE, - true => RXINV_A::ENABLE, + false => Rxinv::Disable, + true => Rxinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Input is passed directly to the receiver"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RXINV_A::DISABLE + *self == Rxinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Input is inverted before it is passed to the receiver"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RXINV_A::ENABLE + *self == Rxinv::Enable } } #[doc = "Field `RXINV` writer - Receiver Input Invert"] -pub type RXINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, RXINV_A, O>; -impl<'a, const O: u8> RXINV_W<'a, O> { +pub type RxinvW<'a, REG> = crate::BitWriter<'a, REG, Rxinv>; +impl<'a, REG> RxinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Input is passed directly to the receiver"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RXINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Rxinv::Disable) } #[doc = "Input is inverted before it is passed to the receiver"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RXINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Rxinv::Enable) } } -#[doc = "Field `TXINV` reader - Transmitter output Invert"] -pub type TXINV_R = crate::BitReader; #[doc = "Transmitter output Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TXINV_A { +pub enum Txinv { #[doc = "0: Output from the transmitter is passed unchanged to UARTn_TX"] - DISABLE = 0, + Disable = 0, #[doc = "1: Output from the transmitter is inverted before it is passed to UARTn_TX"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TXINV_A) -> Self { + fn from(variant: Txinv) -> Self { variant as u8 != 0 } } -impl TXINV_R { +#[doc = "Field `TXINV` reader - Transmitter output Invert"] +pub type TxinvR = crate::BitReader; +impl TxinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXINV_A { + pub const fn variant(&self) -> Txinv { match self.bits { - false => TXINV_A::DISABLE, - true => TXINV_A::ENABLE, + false => Txinv::Disable, + true => Txinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Output from the transmitter is passed unchanged to UARTn_TX"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == TXINV_A::DISABLE + *self == Txinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Output from the transmitter is inverted before it is passed to UARTn_TX"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == TXINV_A::ENABLE + *self == Txinv::Enable } } #[doc = "Field `TXINV` writer - Transmitter output Invert"] -pub type TXINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, TXINV_A, O>; -impl<'a, const O: u8> TXINV_W<'a, O> { +pub type TxinvW<'a, REG> = crate::BitWriter<'a, REG, Txinv>; +impl<'a, REG> TxinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Output from the transmitter is passed unchanged to UARTn_TX"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(TXINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Txinv::Disable) } #[doc = "Output from the transmitter is inverted before it is passed to UARTn_TX"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(TXINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Txinv::Enable) } } -#[doc = "Field `AUTOTRI` reader - Automatic TX Tristate"] -pub type AUTOTRI_R = crate::BitReader; #[doc = "Automatic TX Tristate\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AUTOTRI_A { +pub enum Autotri { #[doc = "0: The output on UARTn_TX when the transmitter is idle is defined by TXINV"] - DISABLE = 0, + Disable = 0, #[doc = "1: UARTn_TX is tristated whenever the transmitter is idle"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AUTOTRI_A) -> Self { + fn from(variant: Autotri) -> Self { variant as u8 != 0 } } -impl AUTOTRI_R { +#[doc = "Field `AUTOTRI` reader - Automatic TX Tristate"] +pub type AutotriR = crate::BitReader; +impl AutotriR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> AUTOTRI_A { + pub const fn variant(&self) -> Autotri { match self.bits { - false => AUTOTRI_A::DISABLE, - true => AUTOTRI_A::ENABLE, + false => Autotri::Disable, + true => Autotri::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The output on UARTn_TX when the transmitter is idle is defined by TXINV"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == AUTOTRI_A::DISABLE + *self == Autotri::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "UARTn_TX is tristated whenever the transmitter is idle"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == AUTOTRI_A::ENABLE + *self == Autotri::Enable } } #[doc = "Field `AUTOTRI` writer - Automatic TX Tristate"] -pub type AUTOTRI_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, AUTOTRI_A, O>; -impl<'a, const O: u8> AUTOTRI_W<'a, O> { +pub type AutotriW<'a, REG> = crate::BitWriter<'a, REG, Autotri>; +impl<'a, REG> AutotriW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The output on UARTn_TX when the transmitter is idle is defined by TXINV"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(AUTOTRI_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Autotri::Disable) } #[doc = "UARTn_TX is tristated whenever the transmitter is idle"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(AUTOTRI_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Autotri::Enable) } } #[doc = "Field `SKIPPERRF` reader - Skip Parity Error Frames"] -pub type SKIPPERRF_R = crate::BitReader; +pub type SkipperrfR = crate::BitReader; #[doc = "Field `SKIPPERRF` writer - Skip Parity Error Frames"] -pub type SKIPPERRF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, O>; -#[doc = "Field `ERRSDMA` reader - Halt DMA Read On Error"] -pub type ERRSDMA_R = crate::BitReader; +pub type SkipperrfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Halt DMA Read On Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRSDMA_A { +pub enum Errsdma { #[doc = "0: Framing and parity errors have no effect on DMA requests from the EUSART"] - DISABLE = 0, + Disable = 0, #[doc = "1: DMA requests from the EUSART are blocked while the PERR or FERR interrupt flags are set"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRSDMA_A) -> Self { + fn from(variant: Errsdma) -> Self { variant as u8 != 0 } } -impl ERRSDMA_R { +#[doc = "Field `ERRSDMA` reader - Halt DMA Read On Error"] +pub type ErrsdmaR = crate::BitReader; +impl ErrsdmaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ERRSDMA_A { + pub const fn variant(&self) -> Errsdma { match self.bits { - false => ERRSDMA_A::DISABLE, - true => ERRSDMA_A::ENABLE, + false => Errsdma::Disable, + true => Errsdma::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Framing and parity errors have no effect on DMA requests from the EUSART"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ERRSDMA_A::DISABLE + *self == Errsdma::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "DMA requests from the EUSART are blocked while the PERR or FERR interrupt flags are set"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ERRSDMA_A::ENABLE + *self == Errsdma::Enable } } #[doc = "Field `ERRSDMA` writer - Halt DMA Read On Error"] -pub type ERRSDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, ERRSDMA_A, O>; -impl<'a, const O: u8> ERRSDMA_W<'a, O> { +pub type ErrsdmaW<'a, REG> = crate::BitWriter<'a, REG, Errsdma>; +impl<'a, REG> ErrsdmaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Framing and parity errors have no effect on DMA requests from the EUSART"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ERRSDMA_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Errsdma::Disable) } #[doc = "DMA requests from the EUSART are blocked while the PERR or FERR interrupt flags are set"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ERRSDMA_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Errsdma::Enable) } } -#[doc = "Field `ERRSRX` reader - Disable RX On Error"] -pub type ERRSRX_R = crate::BitReader; #[doc = "Disable RX On Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRSRX_A { +pub enum Errsrx { #[doc = "0: Framing and parity errors have no effect on receiver"] - DISABLE = 0, + Disable = 0, #[doc = "1: Framing and parity errors disable the receiver"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRSRX_A) -> Self { + fn from(variant: Errsrx) -> Self { variant as u8 != 0 } } -impl ERRSRX_R { +#[doc = "Field `ERRSRX` reader - Disable RX On Error"] +pub type ErrsrxR = crate::BitReader; +impl ErrsrxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ERRSRX_A { + pub const fn variant(&self) -> Errsrx { match self.bits { - false => ERRSRX_A::DISABLE, - true => ERRSRX_A::ENABLE, + false => Errsrx::Disable, + true => Errsrx::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Framing and parity errors have no effect on receiver"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ERRSRX_A::DISABLE + *self == Errsrx::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Framing and parity errors disable the receiver"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ERRSRX_A::ENABLE + *self == Errsrx::Enable } } #[doc = "Field `ERRSRX` writer - Disable RX On Error"] -pub type ERRSRX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, ERRSRX_A, O>; -impl<'a, const O: u8> ERRSRX_W<'a, O> { +pub type ErrsrxW<'a, REG> = crate::BitWriter<'a, REG, Errsrx>; +impl<'a, REG> ErrsrxW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Framing and parity errors have no effect on receiver"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ERRSRX_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Errsrx::Disable) } #[doc = "Framing and parity errors disable the receiver"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ERRSRX_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Errsrx::Enable) } } -#[doc = "Field `ERRSTX` reader - Disable TX On Error"] -pub type ERRSTX_R = crate::BitReader; #[doc = "Disable TX On Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRSTX_A { +pub enum Errstx { #[doc = "0: Received framing and parity errors have no effect on transmitter"] - DISABLE = 0, + Disable = 0, #[doc = "1: Received framing and parity errors disable the transmitter"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRSTX_A) -> Self { + fn from(variant: Errstx) -> Self { variant as u8 != 0 } } -impl ERRSTX_R { +#[doc = "Field `ERRSTX` reader - Disable TX On Error"] +pub type ErrstxR = crate::BitReader; +impl ErrstxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ERRSTX_A { + pub const fn variant(&self) -> Errstx { match self.bits { - false => ERRSTX_A::DISABLE, - true => ERRSTX_A::ENABLE, + false => Errstx::Disable, + true => Errstx::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Received framing and parity errors have no effect on transmitter"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ERRSTX_A::DISABLE + *self == Errstx::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Received framing and parity errors disable the transmitter"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ERRSTX_A::ENABLE + *self == Errstx::Enable } } #[doc = "Field `ERRSTX` writer - Disable TX On Error"] -pub type ERRSTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, ERRSTX_A, O>; -impl<'a, const O: u8> ERRSTX_W<'a, O> { +pub type ErrstxW<'a, REG> = crate::BitWriter<'a, REG, Errstx>; +impl<'a, REG> ErrstxW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Received framing and parity errors have no effect on transmitter"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ERRSTX_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Errstx::Disable) } #[doc = "Received framing and parity errors disable the transmitter"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ERRSTX_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Errstx::Enable) } } #[doc = "Field `MVDIS` reader - Majority Vote Disable"] -pub type MVDIS_R = crate::BitReader; +pub type MvdisR = crate::BitReader; #[doc = "Field `MVDIS` writer - Majority Vote Disable"] -pub type MVDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, O>; +pub type MvdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOBAUDEN` reader - AUTOBAUD detection enable"] -pub type AUTOBAUDEN_R = crate::BitReader; +pub type AutobaudenR = crate::BitReader; #[doc = "Field `AUTOBAUDEN` writer - AUTOBAUD detection enable"] -pub type AUTOBAUDEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, O>; +pub type AutobaudenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Synchronous Mode"] #[inline(always)] - pub fn sync(&self) -> SYNC_R { - SYNC_R::new((self.bits & 1) != 0) + pub fn sync(&self) -> SyncR { + SyncR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Loopback Enable"] #[inline(always)] - pub fn loopbk(&self) -> LOOPBK_R { - LOOPBK_R::new(((self.bits >> 1) & 1) != 0) + pub fn loopbk(&self) -> LoopbkR { + LoopbkR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Collision Check Enable"] #[inline(always)] - pub fn ccen(&self) -> CCEN_R { - CCEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn ccen(&self) -> CcenR { + CcenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Multi-Processor Mode"] #[inline(always)] - pub fn mpm(&self) -> MPM_R { - MPM_R::new(((self.bits >> 3) & 1) != 0) + pub fn mpm(&self) -> MpmR { + MpmR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Multi-Processor Address-Bit"] #[inline(always)] - pub fn mpab(&self) -> MPAB_R { - MPAB_R::new(((self.bits >> 4) & 1) != 0) + pub fn mpab(&self) -> MpabR { + MpabR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 5:7 - Oversampling"] #[inline(always)] - pub fn ovs(&self) -> OVS_R { - OVS_R::new(((self.bits >> 5) & 7) as u8) + pub fn ovs(&self) -> OvsR { + OvsR::new(((self.bits >> 5) & 7) as u8) } #[doc = "Bit 10 - Most Significant Bit First"] #[inline(always)] - pub fn msbf(&self) -> MSBF_R { - MSBF_R::new(((self.bits >> 10) & 1) != 0) + pub fn msbf(&self) -> MsbfR { + MsbfR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 13 - Receiver Input Invert"] #[inline(always)] - pub fn rxinv(&self) -> RXINV_R { - RXINV_R::new(((self.bits >> 13) & 1) != 0) + pub fn rxinv(&self) -> RxinvR { + RxinvR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Transmitter output Invert"] #[inline(always)] - pub fn txinv(&self) -> TXINV_R { - TXINV_R::new(((self.bits >> 14) & 1) != 0) + pub fn txinv(&self) -> TxinvR { + TxinvR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 17 - Automatic TX Tristate"] #[inline(always)] - pub fn autotri(&self) -> AUTOTRI_R { - AUTOTRI_R::new(((self.bits >> 17) & 1) != 0) + pub fn autotri(&self) -> AutotriR { + AutotriR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 20 - Skip Parity Error Frames"] #[inline(always)] - pub fn skipperrf(&self) -> SKIPPERRF_R { - SKIPPERRF_R::new(((self.bits >> 20) & 1) != 0) + pub fn skipperrf(&self) -> SkipperrfR { + SkipperrfR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 22 - Halt DMA Read On Error"] #[inline(always)] - pub fn errsdma(&self) -> ERRSDMA_R { - ERRSDMA_R::new(((self.bits >> 22) & 1) != 0) + pub fn errsdma(&self) -> ErrsdmaR { + ErrsdmaR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Disable RX On Error"] #[inline(always)] - pub fn errsrx(&self) -> ERRSRX_R { - ERRSRX_R::new(((self.bits >> 23) & 1) != 0) + pub fn errsrx(&self) -> ErrsrxR { + ErrsrxR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - Disable TX On Error"] #[inline(always)] - pub fn errstx(&self) -> ERRSTX_R { - ERRSTX_R::new(((self.bits >> 24) & 1) != 0) + pub fn errstx(&self) -> ErrstxR { + ErrstxR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 30 - Majority Vote Disable"] #[inline(always)] - pub fn mvdis(&self) -> MVDIS_R { - MVDIS_R::new(((self.bits >> 30) & 1) != 0) + pub fn mvdis(&self) -> MvdisR { + MvdisR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - AUTOBAUD detection enable"] #[inline(always)] - pub fn autobauden(&self) -> AUTOBAUDEN_R { - AUTOBAUDEN_R::new(((self.bits >> 31) & 1) != 0) + pub fn autobauden(&self) -> AutobaudenR { + AutobaudenR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Synchronous Mode"] #[inline(always)] #[must_use] - pub fn sync(&mut self) -> SYNC_W<0> { - SYNC_W::new(self) + pub fn sync(&mut self) -> SyncW { + SyncW::new(self, 0) } #[doc = "Bit 1 - Loopback Enable"] #[inline(always)] #[must_use] - pub fn loopbk(&mut self) -> LOOPBK_W<1> { - LOOPBK_W::new(self) + pub fn loopbk(&mut self) -> LoopbkW { + LoopbkW::new(self, 1) } #[doc = "Bit 2 - Collision Check Enable"] #[inline(always)] #[must_use] - pub fn ccen(&mut self) -> CCEN_W<2> { - CCEN_W::new(self) + pub fn ccen(&mut self) -> CcenW { + CcenW::new(self, 2) } #[doc = "Bit 3 - Multi-Processor Mode"] #[inline(always)] #[must_use] - pub fn mpm(&mut self) -> MPM_W<3> { - MPM_W::new(self) + pub fn mpm(&mut self) -> MpmW { + MpmW::new(self, 3) } #[doc = "Bit 4 - Multi-Processor Address-Bit"] #[inline(always)] #[must_use] - pub fn mpab(&mut self) -> MPAB_W<4> { - MPAB_W::new(self) + pub fn mpab(&mut self) -> MpabW { + MpabW::new(self, 4) } #[doc = "Bits 5:7 - Oversampling"] #[inline(always)] #[must_use] - pub fn ovs(&mut self) -> OVS_W<5> { - OVS_W::new(self) + pub fn ovs(&mut self) -> OvsW { + OvsW::new(self, 5) } #[doc = "Bit 10 - Most Significant Bit First"] #[inline(always)] #[must_use] - pub fn msbf(&mut self) -> MSBF_W<10> { - MSBF_W::new(self) + pub fn msbf(&mut self) -> MsbfW { + MsbfW::new(self, 10) } #[doc = "Bit 13 - Receiver Input Invert"] #[inline(always)] #[must_use] - pub fn rxinv(&mut self) -> RXINV_W<13> { - RXINV_W::new(self) + pub fn rxinv(&mut self) -> RxinvW { + RxinvW::new(self, 13) } #[doc = "Bit 14 - Transmitter output Invert"] #[inline(always)] #[must_use] - pub fn txinv(&mut self) -> TXINV_W<14> { - TXINV_W::new(self) + pub fn txinv(&mut self) -> TxinvW { + TxinvW::new(self, 14) } #[doc = "Bit 17 - Automatic TX Tristate"] #[inline(always)] #[must_use] - pub fn autotri(&mut self) -> AUTOTRI_W<17> { - AUTOTRI_W::new(self) + pub fn autotri(&mut self) -> AutotriW { + AutotriW::new(self, 17) } #[doc = "Bit 20 - Skip Parity Error Frames"] #[inline(always)] #[must_use] - pub fn skipperrf(&mut self) -> SKIPPERRF_W<20> { - SKIPPERRF_W::new(self) + pub fn skipperrf(&mut self) -> SkipperrfW { + SkipperrfW::new(self, 20) } #[doc = "Bit 22 - Halt DMA Read On Error"] #[inline(always)] #[must_use] - pub fn errsdma(&mut self) -> ERRSDMA_W<22> { - ERRSDMA_W::new(self) + pub fn errsdma(&mut self) -> ErrsdmaW { + ErrsdmaW::new(self, 22) } #[doc = "Bit 23 - Disable RX On Error"] #[inline(always)] #[must_use] - pub fn errsrx(&mut self) -> ERRSRX_W<23> { - ERRSRX_W::new(self) + pub fn errsrx(&mut self) -> ErrsrxW { + ErrsrxW::new(self, 23) } #[doc = "Bit 24 - Disable TX On Error"] #[inline(always)] #[must_use] - pub fn errstx(&mut self) -> ERRSTX_W<24> { - ERRSTX_W::new(self) + pub fn errstx(&mut self) -> ErrstxW { + ErrstxW::new(self, 24) } #[doc = "Bit 30 - Majority Vote Disable"] #[inline(always)] #[must_use] - pub fn mvdis(&mut self) -> MVDIS_W<30> { - MVDIS_W::new(self) + pub fn mvdis(&mut self) -> MvdisW { + MvdisW::new(self, 30) } #[doc = "Bit 31 - AUTOBAUD detection enable"] #[inline(always)] #[must_use] - pub fn autobauden(&mut self) -> AUTOBAUDEN_W<31> { - AUTOBAUDEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn autobauden(&mut self) -> AutobaudenW { + AutobaudenW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg0](index.html) module"] -pub struct CFG0_SPEC; -impl crate::RegisterSpec for CFG0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cfg0Spec; +impl crate::RegisterSpec for Cfg0Spec { type Ux = u32; } -#[doc = "`read()` method returns [cfg0::R](R) reader structure"] -impl crate::Readable for CFG0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg0::W](W) writer structure"] -impl crate::Writable for CFG0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg0::R`](R) reader structure"] +impl crate::Readable for Cfg0Spec {} +#[doc = "`write(|w| ..)` method takes [`cfg0::W`](W) writer structure"] +impl crate::Writable for Cfg0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG0 to value 0"] -impl crate::Resettable for CFG0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cfg0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/cfg1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/cfg1.rs index 1607689..73dbb48 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/cfg1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/cfg1.rs @@ -1,1217 +1,1219 @@ #[doc = "Register `CFG1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DBGHALT` reader - Debug halt"] -pub type DBGHALT_R = crate::BitReader; +pub type W = crate::W; #[doc = "Debug halt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DBGHALT_A { +pub enum Dbghalt { #[doc = "0: Continue normal EUSART operation even if core is halted"] - DISABLE = 0, + Disable = 0, #[doc = "1: If core is halted, receive one frame and then halt reception by deactivating RTS. Next frame reception happens when the core is unhalted during single stepping."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DBGHALT_A) -> Self { + fn from(variant: Dbghalt) -> Self { variant as u8 != 0 } } -impl DBGHALT_R { +#[doc = "Field `DBGHALT` reader - Debug halt"] +pub type DbghaltR = crate::BitReader; +impl DbghaltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DBGHALT_A { + pub const fn variant(&self) -> Dbghalt { match self.bits { - false => DBGHALT_A::DISABLE, - true => DBGHALT_A::ENABLE, + false => Dbghalt::Disable, + true => Dbghalt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Continue normal EUSART operation even if core is halted"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == DBGHALT_A::DISABLE + *self == Dbghalt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "If core is halted, receive one frame and then halt reception by deactivating RTS. Next frame reception happens when the core is unhalted during single stepping."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == DBGHALT_A::ENABLE + *self == Dbghalt::Enable } } #[doc = "Field `DBGHALT` writer - Debug halt"] -pub type DBGHALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, DBGHALT_A, O>; -impl<'a, const O: u8> DBGHALT_W<'a, O> { +pub type DbghaltW<'a, REG> = crate::BitWriter<'a, REG, Dbghalt>; +impl<'a, REG> DbghaltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Continue normal EUSART operation even if core is halted"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(DBGHALT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Dbghalt::Disable) } #[doc = "If core is halted, receive one frame and then halt reception by deactivating RTS. Next frame reception happens when the core is unhalted during single stepping."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(DBGHALT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Dbghalt::Enable) } } -#[doc = "Field `CTSINV` reader - Clear-to-send Invert Enable"] -pub type CTSINV_R = crate::BitReader; #[doc = "Clear-to-send Invert Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CTSINV_A { +pub enum Ctsinv { #[doc = "0: The CTS pin is active low"] - DISABLE = 0, + Disable = 0, #[doc = "1: The CTS pin is active high"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CTSINV_A) -> Self { + fn from(variant: Ctsinv) -> Self { variant as u8 != 0 } } -impl CTSINV_R { +#[doc = "Field `CTSINV` reader - Clear-to-send Invert Enable"] +pub type CtsinvR = crate::BitReader; +impl CtsinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CTSINV_A { + pub const fn variant(&self) -> Ctsinv { match self.bits { - false => CTSINV_A::DISABLE, - true => CTSINV_A::ENABLE, + false => Ctsinv::Disable, + true => Ctsinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The CTS pin is active low"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CTSINV_A::DISABLE + *self == Ctsinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The CTS pin is active high"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CTSINV_A::ENABLE + *self == Ctsinv::Enable } } #[doc = "Field `CTSINV` writer - Clear-to-send Invert Enable"] -pub type CTSINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, CTSINV_A, O>; -impl<'a, const O: u8> CTSINV_W<'a, O> { +pub type CtsinvW<'a, REG> = crate::BitWriter<'a, REG, Ctsinv>; +impl<'a, REG> CtsinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The CTS pin is active low"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CTSINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ctsinv::Disable) } #[doc = "The CTS pin is active high"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CTSINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Ctsinv::Enable) } } -#[doc = "Field `CTSEN` reader - Clear-to-send Enable"] -pub type CTSEN_R = crate::BitReader; #[doc = "Clear-to-send Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CTSEN_A { +pub enum Ctsen { #[doc = "0: Ignore CTS"] - DISABLE = 0, + Disable = 0, #[doc = "1: Stop transmitting when CTS is inactive"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CTSEN_A) -> Self { + fn from(variant: Ctsen) -> Self { variant as u8 != 0 } } -impl CTSEN_R { +#[doc = "Field `CTSEN` reader - Clear-to-send Enable"] +pub type CtsenR = crate::BitReader; +impl CtsenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CTSEN_A { + pub const fn variant(&self) -> Ctsen { match self.bits { - false => CTSEN_A::DISABLE, - true => CTSEN_A::ENABLE, + false => Ctsen::Disable, + true => Ctsen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Ignore CTS"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CTSEN_A::DISABLE + *self == Ctsen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Stop transmitting when CTS is inactive"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CTSEN_A::ENABLE + *self == Ctsen::Enable } } #[doc = "Field `CTSEN` writer - Clear-to-send Enable"] -pub type CTSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, CTSEN_A, O>; -impl<'a, const O: u8> CTSEN_W<'a, O> { +pub type CtsenW<'a, REG> = crate::BitWriter<'a, REG, Ctsen>; +impl<'a, REG> CtsenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Ignore CTS"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CTSEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ctsen::Disable) } #[doc = "Stop transmitting when CTS is inactive"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CTSEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Ctsen::Enable) } } -#[doc = "Field `RTSINV` reader - Request-to-send Invert Enable"] -pub type RTSINV_R = crate::BitReader; #[doc = "Request-to-send Invert Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTSINV_A { +pub enum Rtsinv { #[doc = "0: The RTS pin is active low"] - DISABLE = 0, + Disable = 0, #[doc = "1: The RTS pin is active high"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTSINV_A) -> Self { + fn from(variant: Rtsinv) -> Self { variant as u8 != 0 } } -impl RTSINV_R { +#[doc = "Field `RTSINV` reader - Request-to-send Invert Enable"] +pub type RtsinvR = crate::BitReader; +impl RtsinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RTSINV_A { + pub const fn variant(&self) -> Rtsinv { match self.bits { - false => RTSINV_A::DISABLE, - true => RTSINV_A::ENABLE, + false => Rtsinv::Disable, + true => Rtsinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The RTS pin is active low"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RTSINV_A::DISABLE + *self == Rtsinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The RTS pin is active high"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RTSINV_A::ENABLE + *self == Rtsinv::Enable } } #[doc = "Field `RTSINV` writer - Request-to-send Invert Enable"] -pub type RTSINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, RTSINV_A, O>; -impl<'a, const O: u8> RTSINV_W<'a, O> { +pub type RtsinvW<'a, REG> = crate::BitWriter<'a, REG, Rtsinv>; +impl<'a, REG> RtsinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The RTS pin is active low"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RTSINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Rtsinv::Disable) } #[doc = "The RTS pin is active high"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RTSINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Rtsinv::Enable) } } -#[doc = "Field `RXTIMEOUT` reader - RX Timeout"] -pub type RXTIMEOUT_R = crate::FieldReader; #[doc = "RX Timeout\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RXTIMEOUT_A { +pub enum Rxtimeout { #[doc = "0: DISABLED"] - DISABLED = 0, + Disabled = 0, #[doc = "1: ONEFRAME"] - ONEFRAME = 1, + Oneframe = 1, #[doc = "2: TWOFRAMES"] - TWOFRAMES = 2, + Twoframes = 2, #[doc = "3: THREEFRAMES"] - THREEFRAMES = 3, + Threeframes = 3, #[doc = "4: FOURFRAMES"] - FOURFRAMES = 4, + Fourframes = 4, #[doc = "5: FIVEFRAMES"] - FIVEFRAMES = 5, + Fiveframes = 5, #[doc = "6: SIXFRAMES"] - SIXFRAMES = 6, + Sixframes = 6, #[doc = "7: SEVENFRAMES"] - SEVENFRAMES = 7, + Sevenframes = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RXTIMEOUT_A) -> Self { + fn from(variant: Rxtimeout) -> Self { variant as _ } } -impl RXTIMEOUT_R { +impl crate::FieldSpec for Rxtimeout { + type Ux = u8; +} +impl crate::IsEnum for Rxtimeout {} +#[doc = "Field `RXTIMEOUT` reader - RX Timeout"] +pub type RxtimeoutR = crate::FieldReader; +impl RxtimeoutR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RXTIMEOUT_A { + pub const fn variant(&self) -> Rxtimeout { match self.bits { - 0 => RXTIMEOUT_A::DISABLED, - 1 => RXTIMEOUT_A::ONEFRAME, - 2 => RXTIMEOUT_A::TWOFRAMES, - 3 => RXTIMEOUT_A::THREEFRAMES, - 4 => RXTIMEOUT_A::FOURFRAMES, - 5 => RXTIMEOUT_A::FIVEFRAMES, - 6 => RXTIMEOUT_A::SIXFRAMES, - 7 => RXTIMEOUT_A::SEVENFRAMES, + 0 => Rxtimeout::Disabled, + 1 => Rxtimeout::Oneframe, + 2 => Rxtimeout::Twoframes, + 3 => Rxtimeout::Threeframes, + 4 => Rxtimeout::Fourframes, + 5 => Rxtimeout::Fiveframes, + 6 => Rxtimeout::Sixframes, + 7 => Rxtimeout::Sevenframes, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "DISABLED"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == RXTIMEOUT_A::DISABLED + *self == Rxtimeout::Disabled } - #[doc = "Checks if the value of the field is `ONEFRAME`"] + #[doc = "ONEFRAME"] #[inline(always)] pub fn is_oneframe(&self) -> bool { - *self == RXTIMEOUT_A::ONEFRAME + *self == Rxtimeout::Oneframe } - #[doc = "Checks if the value of the field is `TWOFRAMES`"] + #[doc = "TWOFRAMES"] #[inline(always)] pub fn is_twoframes(&self) -> bool { - *self == RXTIMEOUT_A::TWOFRAMES + *self == Rxtimeout::Twoframes } - #[doc = "Checks if the value of the field is `THREEFRAMES`"] + #[doc = "THREEFRAMES"] #[inline(always)] pub fn is_threeframes(&self) -> bool { - *self == RXTIMEOUT_A::THREEFRAMES + *self == Rxtimeout::Threeframes } - #[doc = "Checks if the value of the field is `FOURFRAMES`"] + #[doc = "FOURFRAMES"] #[inline(always)] pub fn is_fourframes(&self) -> bool { - *self == RXTIMEOUT_A::FOURFRAMES + *self == Rxtimeout::Fourframes } - #[doc = "Checks if the value of the field is `FIVEFRAMES`"] + #[doc = "FIVEFRAMES"] #[inline(always)] pub fn is_fiveframes(&self) -> bool { - *self == RXTIMEOUT_A::FIVEFRAMES + *self == Rxtimeout::Fiveframes } - #[doc = "Checks if the value of the field is `SIXFRAMES`"] + #[doc = "SIXFRAMES"] #[inline(always)] pub fn is_sixframes(&self) -> bool { - *self == RXTIMEOUT_A::SIXFRAMES + *self == Rxtimeout::Sixframes } - #[doc = "Checks if the value of the field is `SEVENFRAMES`"] + #[doc = "SEVENFRAMES"] #[inline(always)] pub fn is_sevenframes(&self) -> bool { - *self == RXTIMEOUT_A::SEVENFRAMES + *self == Rxtimeout::Sevenframes } } #[doc = "Field `RXTIMEOUT` writer - RX Timeout"] -pub type RXTIMEOUT_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CFG1_SPEC, u8, RXTIMEOUT_A, 3, O>; -impl<'a, const O: u8> RXTIMEOUT_W<'a, O> { +pub type RxtimeoutW<'a, REG> = crate::FieldWriter<'a, REG, 3, Rxtimeout, crate::Safe>; +impl<'a, REG> RxtimeoutW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "DISABLED"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Disabled) } #[doc = "ONEFRAME"] #[inline(always)] - pub fn oneframe(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::ONEFRAME) + pub fn oneframe(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Oneframe) } #[doc = "TWOFRAMES"] #[inline(always)] - pub fn twoframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::TWOFRAMES) + pub fn twoframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Twoframes) } #[doc = "THREEFRAMES"] #[inline(always)] - pub fn threeframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::THREEFRAMES) + pub fn threeframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Threeframes) } #[doc = "FOURFRAMES"] #[inline(always)] - pub fn fourframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::FOURFRAMES) + pub fn fourframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Fourframes) } #[doc = "FIVEFRAMES"] #[inline(always)] - pub fn fiveframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::FIVEFRAMES) + pub fn fiveframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Fiveframes) } #[doc = "SIXFRAMES"] #[inline(always)] - pub fn sixframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::SIXFRAMES) + pub fn sixframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Sixframes) } #[doc = "SEVENFRAMES"] #[inline(always)] - pub fn sevenframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::SEVENFRAMES) + pub fn sevenframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Sevenframes) } } #[doc = "Field `SFUBRX` reader - Start Frame Unblock Receiver"] -pub type SFUBRX_R = crate::BitReader; +pub type SfubrxR = crate::BitReader; #[doc = "Field `SFUBRX` writer - Start Frame Unblock Receiver"] -pub type SFUBRX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, bool, O>; +pub type SfubrxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXPRSEN` reader - PRS RX Enable"] -pub type RXPRSEN_R = crate::BitReader; +pub type RxprsenR = crate::BitReader; #[doc = "Field `RXPRSEN` writer - PRS RX Enable"] -pub type RXPRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, bool, O>; -#[doc = "Field `TXFIW` reader - TX FIFO Interrupt Watermark"] -pub type TXFIW_R = crate::FieldReader; +pub type RxprsenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "TX FIFO Interrupt Watermark\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TXFIW_A { +pub enum Txfiw { #[doc = "0: TXFL status flag and IF are set when the TX FIFO has space for at least one more frame."] - ONEFRAME = 0, + Oneframe = 0, #[doc = "1: TXFL status flag and IF are set when the TX FIFO has space for at least two more frames."] - TWOFRAMES = 1, + Twoframes = 1, #[doc = "2: TXFL status flag and IF are set when the TX FIFO has space for at least three more frames."] - THREEFRAMES = 2, + Threeframes = 2, #[doc = "3: TXFL status flag and IF are set when the TX FIFO has space for at least four more frames."] - FOURFRAMES = 3, + Fourframes = 3, #[doc = "4: TXFL status flag and IF are set when the TX FIFO has space for at least five more frames."] - FIVEFRAMES = 4, + Fiveframes = 4, #[doc = "5: TXFL status flag and IF are set when the TX FIFO has space for at least six more frames."] - SIXFRAMES = 5, + Sixframes = 5, #[doc = "6: TXFL status flag and IF are set when the TX FIFO has space for at least seven more frames."] - SEVENFRAMES = 6, + Sevenframes = 6, #[doc = "7: TXFL status flag and IF are set when the TX FIFO has space for at least eight more frames."] - EIGHTFRAMES = 7, + Eightframes = 7, #[doc = "8: TXFL status flag and IF are set when the TX FIFO has space for at least nine more frames."] - NINEFRAMES = 8, + Nineframes = 8, #[doc = "9: TXFL status flag and IF are set when the TX FIFO has space for at least ten more frames."] - TENFRAMES = 9, + Tenframes = 9, #[doc = "10: TXFL status flag and IF are set when the TX FIFO has space for at least eleven more frames."] - ELEVENFRAMES = 10, + Elevenframes = 10, #[doc = "11: TXFL status flag and IF are set when the TX FIFO has space for at least twelve more frames."] - TWELVEFRAMES = 11, + Twelveframes = 11, #[doc = "12: TXFL status flag and IF are set when the TX FIFO has space for at least thriteen more frames."] - THIRTEENFRAMES = 12, + Thirteenframes = 12, #[doc = "13: TXFL status flag and IF are set when the TX FIFO has space for at least fourteen more frames."] - FOURTEENFRAMES = 13, + Fourteenframes = 13, #[doc = "14: TXFL status flag and IF are set when the TX FIFO has space for at least fifteen more frames."] - FIFTEENFRAMES = 14, + Fifteenframes = 14, #[doc = "15: TXFL status flag and IF are set when the TX FIFO has space for at least sixteen more frames."] - SIXTEENFRAMES = 15, + Sixteenframes = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TXFIW_A) -> Self { + fn from(variant: Txfiw) -> Self { variant as _ } } -impl TXFIW_R { +impl crate::FieldSpec for Txfiw { + type Ux = u8; +} +impl crate::IsEnum for Txfiw {} +#[doc = "Field `TXFIW` reader - TX FIFO Interrupt Watermark"] +pub type TxfiwR = crate::FieldReader; +impl TxfiwR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXFIW_A { + pub const fn variant(&self) -> Txfiw { match self.bits { - 0 => TXFIW_A::ONEFRAME, - 1 => TXFIW_A::TWOFRAMES, - 2 => TXFIW_A::THREEFRAMES, - 3 => TXFIW_A::FOURFRAMES, - 4 => TXFIW_A::FIVEFRAMES, - 5 => TXFIW_A::SIXFRAMES, - 6 => TXFIW_A::SEVENFRAMES, - 7 => TXFIW_A::EIGHTFRAMES, - 8 => TXFIW_A::NINEFRAMES, - 9 => TXFIW_A::TENFRAMES, - 10 => TXFIW_A::ELEVENFRAMES, - 11 => TXFIW_A::TWELVEFRAMES, - 12 => TXFIW_A::THIRTEENFRAMES, - 13 => TXFIW_A::FOURTEENFRAMES, - 14 => TXFIW_A::FIFTEENFRAMES, - 15 => TXFIW_A::SIXTEENFRAMES, + 0 => Txfiw::Oneframe, + 1 => Txfiw::Twoframes, + 2 => Txfiw::Threeframes, + 3 => Txfiw::Fourframes, + 4 => Txfiw::Fiveframes, + 5 => Txfiw::Sixframes, + 6 => Txfiw::Sevenframes, + 7 => Txfiw::Eightframes, + 8 => Txfiw::Nineframes, + 9 => Txfiw::Tenframes, + 10 => Txfiw::Elevenframes, + 11 => Txfiw::Twelveframes, + 12 => Txfiw::Thirteenframes, + 13 => Txfiw::Fourteenframes, + 14 => Txfiw::Fifteenframes, + 15 => Txfiw::Sixteenframes, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONEFRAME`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least one more frame."] #[inline(always)] pub fn is_oneframe(&self) -> bool { - *self == TXFIW_A::ONEFRAME + *self == Txfiw::Oneframe } - #[doc = "Checks if the value of the field is `TWOFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least two more frames."] #[inline(always)] pub fn is_twoframes(&self) -> bool { - *self == TXFIW_A::TWOFRAMES + *self == Txfiw::Twoframes } - #[doc = "Checks if the value of the field is `THREEFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least three more frames."] #[inline(always)] pub fn is_threeframes(&self) -> bool { - *self == TXFIW_A::THREEFRAMES + *self == Txfiw::Threeframes } - #[doc = "Checks if the value of the field is `FOURFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least four more frames."] #[inline(always)] pub fn is_fourframes(&self) -> bool { - *self == TXFIW_A::FOURFRAMES + *self == Txfiw::Fourframes } - #[doc = "Checks if the value of the field is `FIVEFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least five more frames."] #[inline(always)] pub fn is_fiveframes(&self) -> bool { - *self == TXFIW_A::FIVEFRAMES + *self == Txfiw::Fiveframes } - #[doc = "Checks if the value of the field is `SIXFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least six more frames."] #[inline(always)] pub fn is_sixframes(&self) -> bool { - *self == TXFIW_A::SIXFRAMES + *self == Txfiw::Sixframes } - #[doc = "Checks if the value of the field is `SEVENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least seven more frames."] #[inline(always)] pub fn is_sevenframes(&self) -> bool { - *self == TXFIW_A::SEVENFRAMES + *self == Txfiw::Sevenframes } - #[doc = "Checks if the value of the field is `EIGHTFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least eight more frames."] #[inline(always)] pub fn is_eightframes(&self) -> bool { - *self == TXFIW_A::EIGHTFRAMES + *self == Txfiw::Eightframes } - #[doc = "Checks if the value of the field is `NINEFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least nine more frames."] #[inline(always)] pub fn is_nineframes(&self) -> bool { - *self == TXFIW_A::NINEFRAMES + *self == Txfiw::Nineframes } - #[doc = "Checks if the value of the field is `TENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least ten more frames."] #[inline(always)] pub fn is_tenframes(&self) -> bool { - *self == TXFIW_A::TENFRAMES + *self == Txfiw::Tenframes } - #[doc = "Checks if the value of the field is `ELEVENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least eleven more frames."] #[inline(always)] pub fn is_elevenframes(&self) -> bool { - *self == TXFIW_A::ELEVENFRAMES + *self == Txfiw::Elevenframes } - #[doc = "Checks if the value of the field is `TWELVEFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least twelve more frames."] #[inline(always)] pub fn is_twelveframes(&self) -> bool { - *self == TXFIW_A::TWELVEFRAMES + *self == Txfiw::Twelveframes } - #[doc = "Checks if the value of the field is `THIRTEENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least thriteen more frames."] #[inline(always)] pub fn is_thirteenframes(&self) -> bool { - *self == TXFIW_A::THIRTEENFRAMES + *self == Txfiw::Thirteenframes } - #[doc = "Checks if the value of the field is `FOURTEENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least fourteen more frames."] #[inline(always)] pub fn is_fourteenframes(&self) -> bool { - *self == TXFIW_A::FOURTEENFRAMES + *self == Txfiw::Fourteenframes } - #[doc = "Checks if the value of the field is `FIFTEENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least fifteen more frames."] #[inline(always)] pub fn is_fifteenframes(&self) -> bool { - *self == TXFIW_A::FIFTEENFRAMES + *self == Txfiw::Fifteenframes } - #[doc = "Checks if the value of the field is `SIXTEENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least sixteen more frames."] #[inline(always)] pub fn is_sixteenframes(&self) -> bool { - *self == TXFIW_A::SIXTEENFRAMES + *self == Txfiw::Sixteenframes } } #[doc = "Field `TXFIW` writer - TX FIFO Interrupt Watermark"] -pub type TXFIW_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG1_SPEC, u8, TXFIW_A, 4, O>; -impl<'a, const O: u8> TXFIW_W<'a, O> { +pub type TxfiwW<'a, REG> = crate::FieldWriter<'a, REG, 4, Txfiw, crate::Safe>; +impl<'a, REG> TxfiwW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least one more frame."] #[inline(always)] - pub fn oneframe(self) -> &'a mut W { - self.variant(TXFIW_A::ONEFRAME) + pub fn oneframe(self) -> &'a mut crate::W { + self.variant(Txfiw::Oneframe) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least two more frames."] #[inline(always)] - pub fn twoframes(self) -> &'a mut W { - self.variant(TXFIW_A::TWOFRAMES) + pub fn twoframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Twoframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least three more frames."] #[inline(always)] - pub fn threeframes(self) -> &'a mut W { - self.variant(TXFIW_A::THREEFRAMES) + pub fn threeframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Threeframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least four more frames."] #[inline(always)] - pub fn fourframes(self) -> &'a mut W { - self.variant(TXFIW_A::FOURFRAMES) + pub fn fourframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Fourframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least five more frames."] #[inline(always)] - pub fn fiveframes(self) -> &'a mut W { - self.variant(TXFIW_A::FIVEFRAMES) + pub fn fiveframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Fiveframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least six more frames."] #[inline(always)] - pub fn sixframes(self) -> &'a mut W { - self.variant(TXFIW_A::SIXFRAMES) + pub fn sixframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Sixframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least seven more frames."] #[inline(always)] - pub fn sevenframes(self) -> &'a mut W { - self.variant(TXFIW_A::SEVENFRAMES) + pub fn sevenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Sevenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least eight more frames."] #[inline(always)] - pub fn eightframes(self) -> &'a mut W { - self.variant(TXFIW_A::EIGHTFRAMES) + pub fn eightframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Eightframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least nine more frames."] #[inline(always)] - pub fn nineframes(self) -> &'a mut W { - self.variant(TXFIW_A::NINEFRAMES) + pub fn nineframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Nineframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least ten more frames."] #[inline(always)] - pub fn tenframes(self) -> &'a mut W { - self.variant(TXFIW_A::TENFRAMES) + pub fn tenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Tenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least eleven more frames."] #[inline(always)] - pub fn elevenframes(self) -> &'a mut W { - self.variant(TXFIW_A::ELEVENFRAMES) + pub fn elevenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Elevenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least twelve more frames."] #[inline(always)] - pub fn twelveframes(self) -> &'a mut W { - self.variant(TXFIW_A::TWELVEFRAMES) + pub fn twelveframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Twelveframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least thriteen more frames."] #[inline(always)] - pub fn thirteenframes(self) -> &'a mut W { - self.variant(TXFIW_A::THIRTEENFRAMES) + pub fn thirteenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Thirteenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least fourteen more frames."] #[inline(always)] - pub fn fourteenframes(self) -> &'a mut W { - self.variant(TXFIW_A::FOURTEENFRAMES) + pub fn fourteenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Fourteenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least fifteen more frames."] #[inline(always)] - pub fn fifteenframes(self) -> &'a mut W { - self.variant(TXFIW_A::FIFTEENFRAMES) + pub fn fifteenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Fifteenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least sixteen more frames."] #[inline(always)] - pub fn sixteenframes(self) -> &'a mut W { - self.variant(TXFIW_A::SIXTEENFRAMES) + pub fn sixteenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Sixteenframes) } } -#[doc = "Field `RTSRXFW` reader - Request-to-send RX FIFO Watermark"] -pub type RTSRXFW_R = crate::FieldReader; #[doc = "Request-to-send RX FIFO Watermark\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RTSRXFW_A { +pub enum Rtsrxfw { #[doc = "0: RTS is set if there is space for at least one more frame in the RX FIFO."] - ONEFRAME = 0, + Oneframe = 0, #[doc = "1: RTS is set if there is space for at least two more frames in the RX FIFO."] - TWOFRAMES = 1, + Twoframes = 1, #[doc = "2: RTS is set if there is space for at least three more frames in the RX FIFO."] - THREEFRAMES = 2, + Threeframes = 2, #[doc = "3: RTS is set if there is space for four more frames in the RX FIFO."] - FOURFRAMES = 3, + Fourframes = 3, #[doc = "4: RTS is set if there is space for five more frames in the RX FIFO."] - FIVEFRAMES = 4, + Fiveframes = 4, #[doc = "5: RTS is set if there is space for six more frames in the RX FIFO."] - SIXFRAMES = 5, + Sixframes = 5, #[doc = "6: RTS is set if there is space for seven more frames in the RX FIFO."] - SEVENFRAMES = 6, + Sevenframes = 6, #[doc = "7: RTS is set if there is space for eight more frames in the RX FIFO."] - EIGHTFRAMES = 7, + Eightframes = 7, #[doc = "8: RTS is set if there is space for nine more frames in the RX FIFO."] - NINEFRAMES = 8, + Nineframes = 8, #[doc = "9: RTS is set if there is space for ten more frames in the RX FIFO."] - TENFRAMES = 9, + Tenframes = 9, #[doc = "10: RTS is set if there is space for eleven more frames in the RX FIFO."] - ELEVENFRAMES = 10, + Elevenframes = 10, #[doc = "11: RTS is set if there is space for twelve more frames in the RX FIFO."] - TWELVEFRAMES = 11, + Twelveframes = 11, #[doc = "12: RTS is set if there is space for thirteen more frames in the RX FIFO."] - THIRTEENFRAMES = 12, + Thirteenframes = 12, #[doc = "13: RTS is set if there is space for fourteen more frames in the RX FIFO."] - FOURTEENFRAMES = 13, + Fourteenframes = 13, #[doc = "14: RTS is set if there is space for fifteen more frames in the RX FIFO."] - FIFTEENFRAMES = 14, + Fifteenframes = 14, #[doc = "15: RTS is set if there is space for sixteen more frames in the RX FIFO."] - SIXTEENFRAMES = 15, + Sixteenframes = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RTSRXFW_A) -> Self { + fn from(variant: Rtsrxfw) -> Self { variant as _ } } -impl RTSRXFW_R { +impl crate::FieldSpec for Rtsrxfw { + type Ux = u8; +} +impl crate::IsEnum for Rtsrxfw {} +#[doc = "Field `RTSRXFW` reader - Request-to-send RX FIFO Watermark"] +pub type RtsrxfwR = crate::FieldReader; +impl RtsrxfwR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RTSRXFW_A { + pub const fn variant(&self) -> Rtsrxfw { match self.bits { - 0 => RTSRXFW_A::ONEFRAME, - 1 => RTSRXFW_A::TWOFRAMES, - 2 => RTSRXFW_A::THREEFRAMES, - 3 => RTSRXFW_A::FOURFRAMES, - 4 => RTSRXFW_A::FIVEFRAMES, - 5 => RTSRXFW_A::SIXFRAMES, - 6 => RTSRXFW_A::SEVENFRAMES, - 7 => RTSRXFW_A::EIGHTFRAMES, - 8 => RTSRXFW_A::NINEFRAMES, - 9 => RTSRXFW_A::TENFRAMES, - 10 => RTSRXFW_A::ELEVENFRAMES, - 11 => RTSRXFW_A::TWELVEFRAMES, - 12 => RTSRXFW_A::THIRTEENFRAMES, - 13 => RTSRXFW_A::FOURTEENFRAMES, - 14 => RTSRXFW_A::FIFTEENFRAMES, - 15 => RTSRXFW_A::SIXTEENFRAMES, + 0 => Rtsrxfw::Oneframe, + 1 => Rtsrxfw::Twoframes, + 2 => Rtsrxfw::Threeframes, + 3 => Rtsrxfw::Fourframes, + 4 => Rtsrxfw::Fiveframes, + 5 => Rtsrxfw::Sixframes, + 6 => Rtsrxfw::Sevenframes, + 7 => Rtsrxfw::Eightframes, + 8 => Rtsrxfw::Nineframes, + 9 => Rtsrxfw::Tenframes, + 10 => Rtsrxfw::Elevenframes, + 11 => Rtsrxfw::Twelveframes, + 12 => Rtsrxfw::Thirteenframes, + 13 => Rtsrxfw::Fourteenframes, + 14 => Rtsrxfw::Fifteenframes, + 15 => Rtsrxfw::Sixteenframes, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONEFRAME`"] + #[doc = "RTS is set if there is space for at least one more frame in the RX FIFO."] #[inline(always)] pub fn is_oneframe(&self) -> bool { - *self == RTSRXFW_A::ONEFRAME + *self == Rtsrxfw::Oneframe } - #[doc = "Checks if the value of the field is `TWOFRAMES`"] + #[doc = "RTS is set if there is space for at least two more frames in the RX FIFO."] #[inline(always)] pub fn is_twoframes(&self) -> bool { - *self == RTSRXFW_A::TWOFRAMES + *self == Rtsrxfw::Twoframes } - #[doc = "Checks if the value of the field is `THREEFRAMES`"] + #[doc = "RTS is set if there is space for at least three more frames in the RX FIFO."] #[inline(always)] pub fn is_threeframes(&self) -> bool { - *self == RTSRXFW_A::THREEFRAMES + *self == Rtsrxfw::Threeframes } - #[doc = "Checks if the value of the field is `FOURFRAMES`"] + #[doc = "RTS is set if there is space for four more frames in the RX FIFO."] #[inline(always)] pub fn is_fourframes(&self) -> bool { - *self == RTSRXFW_A::FOURFRAMES + *self == Rtsrxfw::Fourframes } - #[doc = "Checks if the value of the field is `FIVEFRAMES`"] + #[doc = "RTS is set if there is space for five more frames in the RX FIFO."] #[inline(always)] pub fn is_fiveframes(&self) -> bool { - *self == RTSRXFW_A::FIVEFRAMES + *self == Rtsrxfw::Fiveframes } - #[doc = "Checks if the value of the field is `SIXFRAMES`"] + #[doc = "RTS is set if there is space for six more frames in the RX FIFO."] #[inline(always)] pub fn is_sixframes(&self) -> bool { - *self == RTSRXFW_A::SIXFRAMES + *self == Rtsrxfw::Sixframes } - #[doc = "Checks if the value of the field is `SEVENFRAMES`"] + #[doc = "RTS is set if there is space for seven more frames in the RX FIFO."] #[inline(always)] pub fn is_sevenframes(&self) -> bool { - *self == RTSRXFW_A::SEVENFRAMES + *self == Rtsrxfw::Sevenframes } - #[doc = "Checks if the value of the field is `EIGHTFRAMES`"] + #[doc = "RTS is set if there is space for eight more frames in the RX FIFO."] #[inline(always)] pub fn is_eightframes(&self) -> bool { - *self == RTSRXFW_A::EIGHTFRAMES + *self == Rtsrxfw::Eightframes } - #[doc = "Checks if the value of the field is `NINEFRAMES`"] + #[doc = "RTS is set if there is space for nine more frames in the RX FIFO."] #[inline(always)] pub fn is_nineframes(&self) -> bool { - *self == RTSRXFW_A::NINEFRAMES + *self == Rtsrxfw::Nineframes } - #[doc = "Checks if the value of the field is `TENFRAMES`"] + #[doc = "RTS is set if there is space for ten more frames in the RX FIFO."] #[inline(always)] pub fn is_tenframes(&self) -> bool { - *self == RTSRXFW_A::TENFRAMES + *self == Rtsrxfw::Tenframes } - #[doc = "Checks if the value of the field is `ELEVENFRAMES`"] + #[doc = "RTS is set if there is space for eleven more frames in the RX FIFO."] #[inline(always)] pub fn is_elevenframes(&self) -> bool { - *self == RTSRXFW_A::ELEVENFRAMES + *self == Rtsrxfw::Elevenframes } - #[doc = "Checks if the value of the field is `TWELVEFRAMES`"] + #[doc = "RTS is set if there is space for twelve more frames in the RX FIFO."] #[inline(always)] pub fn is_twelveframes(&self) -> bool { - *self == RTSRXFW_A::TWELVEFRAMES + *self == Rtsrxfw::Twelveframes } - #[doc = "Checks if the value of the field is `THIRTEENFRAMES`"] + #[doc = "RTS is set if there is space for thirteen more frames in the RX FIFO."] #[inline(always)] pub fn is_thirteenframes(&self) -> bool { - *self == RTSRXFW_A::THIRTEENFRAMES + *self == Rtsrxfw::Thirteenframes } - #[doc = "Checks if the value of the field is `FOURTEENFRAMES`"] + #[doc = "RTS is set if there is space for fourteen more frames in the RX FIFO."] #[inline(always)] pub fn is_fourteenframes(&self) -> bool { - *self == RTSRXFW_A::FOURTEENFRAMES + *self == Rtsrxfw::Fourteenframes } - #[doc = "Checks if the value of the field is `FIFTEENFRAMES`"] + #[doc = "RTS is set if there is space for fifteen more frames in the RX FIFO."] #[inline(always)] pub fn is_fifteenframes(&self) -> bool { - *self == RTSRXFW_A::FIFTEENFRAMES + *self == Rtsrxfw::Fifteenframes } - #[doc = "Checks if the value of the field is `SIXTEENFRAMES`"] + #[doc = "RTS is set if there is space for sixteen more frames in the RX FIFO."] #[inline(always)] pub fn is_sixteenframes(&self) -> bool { - *self == RTSRXFW_A::SIXTEENFRAMES + *self == Rtsrxfw::Sixteenframes } } #[doc = "Field `RTSRXFW` writer - Request-to-send RX FIFO Watermark"] -pub type RTSRXFW_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CFG1_SPEC, u8, RTSRXFW_A, 4, O>; -impl<'a, const O: u8> RTSRXFW_W<'a, O> { +pub type RtsrxfwW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rtsrxfw, crate::Safe>; +impl<'a, REG> RtsrxfwW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "RTS is set if there is space for at least one more frame in the RX FIFO."] #[inline(always)] - pub fn oneframe(self) -> &'a mut W { - self.variant(RTSRXFW_A::ONEFRAME) + pub fn oneframe(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Oneframe) } #[doc = "RTS is set if there is space for at least two more frames in the RX FIFO."] #[inline(always)] - pub fn twoframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::TWOFRAMES) + pub fn twoframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Twoframes) } #[doc = "RTS is set if there is space for at least three more frames in the RX FIFO."] #[inline(always)] - pub fn threeframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::THREEFRAMES) + pub fn threeframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Threeframes) } #[doc = "RTS is set if there is space for four more frames in the RX FIFO."] #[inline(always)] - pub fn fourframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::FOURFRAMES) + pub fn fourframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Fourframes) } #[doc = "RTS is set if there is space for five more frames in the RX FIFO."] #[inline(always)] - pub fn fiveframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::FIVEFRAMES) + pub fn fiveframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Fiveframes) } #[doc = "RTS is set if there is space for six more frames in the RX FIFO."] #[inline(always)] - pub fn sixframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::SIXFRAMES) + pub fn sixframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Sixframes) } #[doc = "RTS is set if there is space for seven more frames in the RX FIFO."] #[inline(always)] - pub fn sevenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::SEVENFRAMES) + pub fn sevenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Sevenframes) } #[doc = "RTS is set if there is space for eight more frames in the RX FIFO."] #[inline(always)] - pub fn eightframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::EIGHTFRAMES) + pub fn eightframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Eightframes) } #[doc = "RTS is set if there is space for nine more frames in the RX FIFO."] #[inline(always)] - pub fn nineframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::NINEFRAMES) + pub fn nineframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Nineframes) } #[doc = "RTS is set if there is space for ten more frames in the RX FIFO."] #[inline(always)] - pub fn tenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::TENFRAMES) + pub fn tenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Tenframes) } #[doc = "RTS is set if there is space for eleven more frames in the RX FIFO."] #[inline(always)] - pub fn elevenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::ELEVENFRAMES) + pub fn elevenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Elevenframes) } #[doc = "RTS is set if there is space for twelve more frames in the RX FIFO."] #[inline(always)] - pub fn twelveframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::TWELVEFRAMES) + pub fn twelveframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Twelveframes) } #[doc = "RTS is set if there is space for thirteen more frames in the RX FIFO."] #[inline(always)] - pub fn thirteenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::THIRTEENFRAMES) + pub fn thirteenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Thirteenframes) } #[doc = "RTS is set if there is space for fourteen more frames in the RX FIFO."] #[inline(always)] - pub fn fourteenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::FOURTEENFRAMES) + pub fn fourteenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Fourteenframes) } #[doc = "RTS is set if there is space for fifteen more frames in the RX FIFO."] #[inline(always)] - pub fn fifteenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::FIFTEENFRAMES) + pub fn fifteenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Fifteenframes) } #[doc = "RTS is set if there is space for sixteen more frames in the RX FIFO."] #[inline(always)] - pub fn sixteenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::SIXTEENFRAMES) + pub fn sixteenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Sixteenframes) } } -#[doc = "Field `RXFIW` reader - RX FIFO Interrupt Watermark"] -pub type RXFIW_R = crate::FieldReader; #[doc = "RX FIFO Interrupt Watermark\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RXFIW_A { +pub enum Rxfiw { #[doc = "0: RXFL status flag and IF are set when the RX FIFO has at least one frame in it."] - ONEFRAME = 0, + Oneframe = 0, #[doc = "1: RXFL status flag and IF are set when the RX FIFO has at least two frames in it."] - TWOFRAMES = 1, + Twoframes = 1, #[doc = "2: RXFL status flag and IF are set when the RX FIFO has at least three frames in it."] - THREEFRAMES = 2, + Threeframes = 2, #[doc = "3: RXFL status flag and IF are set when the RX FIFO has at least four frames in it."] - FOURFRAMES = 3, + Fourframes = 3, #[doc = "4: RXFL status flag and IF are set when the RX FIFO has at least five frames in it."] - FIVEFRAMES = 4, + Fiveframes = 4, #[doc = "5: RXFL status flag and IF are set when the RX FIFO has at least six frames in it."] - SIXFRAMES = 5, + Sixframes = 5, #[doc = "6: RXFL status flag and IF are set when the RX FIFO has at least seven frames in it."] - SEVENFRAMES = 6, + Sevenframes = 6, #[doc = "7: RXFL status flag and IF are set when the RX FIFO has at least eight frames in it."] - EIGHTFRAMES = 7, + Eightframes = 7, #[doc = "8: RXFL status flag and IF are set when the RX FIFO has at least nine frames in it."] - NINEFRAMES = 8, + Nineframes = 8, #[doc = "9: RXFL status flag and IF are set when the RX FIFO has at least ten frames in it."] - TENFRAMES = 9, + Tenframes = 9, #[doc = "10: RXFL status flag and IF are set when the RX FIFO has at least eleven frames in it."] - ELEVENFRAMES = 10, + Elevenframes = 10, #[doc = "11: RXFL status flag and IF are set when the RX FIFO has at least twelve frames in it."] - TWELVEFRAMES = 11, + Twelveframes = 11, #[doc = "12: RXFL status flag and IF are set when the RX FIFO has at least thriteen frames in it."] - THIRTEENFRAMES = 12, + Thirteenframes = 12, #[doc = "13: RXFL status flag and IF are set when the RX FIFO has at least fourteen frames in it."] - FOURTEENFRAMES = 13, + Fourteenframes = 13, #[doc = "14: RXFL status flag and IF are set when the RX FIFO has at least fifteen frames in it."] - FIFTEENFRAMES = 14, + Fifteenframes = 14, #[doc = "15: RXFL status flag and IF are set when the RX FIFO has at least sixteen frames in it."] - SIXTEENFRAMES = 15, + Sixteenframes = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RXFIW_A) -> Self { + fn from(variant: Rxfiw) -> Self { variant as _ } } -impl RXFIW_R { +impl crate::FieldSpec for Rxfiw { + type Ux = u8; +} +impl crate::IsEnum for Rxfiw {} +#[doc = "Field `RXFIW` reader - RX FIFO Interrupt Watermark"] +pub type RxfiwR = crate::FieldReader; +impl RxfiwR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RXFIW_A { + pub const fn variant(&self) -> Rxfiw { match self.bits { - 0 => RXFIW_A::ONEFRAME, - 1 => RXFIW_A::TWOFRAMES, - 2 => RXFIW_A::THREEFRAMES, - 3 => RXFIW_A::FOURFRAMES, - 4 => RXFIW_A::FIVEFRAMES, - 5 => RXFIW_A::SIXFRAMES, - 6 => RXFIW_A::SEVENFRAMES, - 7 => RXFIW_A::EIGHTFRAMES, - 8 => RXFIW_A::NINEFRAMES, - 9 => RXFIW_A::TENFRAMES, - 10 => RXFIW_A::ELEVENFRAMES, - 11 => RXFIW_A::TWELVEFRAMES, - 12 => RXFIW_A::THIRTEENFRAMES, - 13 => RXFIW_A::FOURTEENFRAMES, - 14 => RXFIW_A::FIFTEENFRAMES, - 15 => RXFIW_A::SIXTEENFRAMES, + 0 => Rxfiw::Oneframe, + 1 => Rxfiw::Twoframes, + 2 => Rxfiw::Threeframes, + 3 => Rxfiw::Fourframes, + 4 => Rxfiw::Fiveframes, + 5 => Rxfiw::Sixframes, + 6 => Rxfiw::Sevenframes, + 7 => Rxfiw::Eightframes, + 8 => Rxfiw::Nineframes, + 9 => Rxfiw::Tenframes, + 10 => Rxfiw::Elevenframes, + 11 => Rxfiw::Twelveframes, + 12 => Rxfiw::Thirteenframes, + 13 => Rxfiw::Fourteenframes, + 14 => Rxfiw::Fifteenframes, + 15 => Rxfiw::Sixteenframes, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONEFRAME`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least one frame in it."] #[inline(always)] pub fn is_oneframe(&self) -> bool { - *self == RXFIW_A::ONEFRAME + *self == Rxfiw::Oneframe } - #[doc = "Checks if the value of the field is `TWOFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least two frames in it."] #[inline(always)] pub fn is_twoframes(&self) -> bool { - *self == RXFIW_A::TWOFRAMES + *self == Rxfiw::Twoframes } - #[doc = "Checks if the value of the field is `THREEFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least three frames in it."] #[inline(always)] pub fn is_threeframes(&self) -> bool { - *self == RXFIW_A::THREEFRAMES + *self == Rxfiw::Threeframes } - #[doc = "Checks if the value of the field is `FOURFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least four frames in it."] #[inline(always)] pub fn is_fourframes(&self) -> bool { - *self == RXFIW_A::FOURFRAMES + *self == Rxfiw::Fourframes } - #[doc = "Checks if the value of the field is `FIVEFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least five frames in it."] #[inline(always)] pub fn is_fiveframes(&self) -> bool { - *self == RXFIW_A::FIVEFRAMES + *self == Rxfiw::Fiveframes } - #[doc = "Checks if the value of the field is `SIXFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least six frames in it."] #[inline(always)] pub fn is_sixframes(&self) -> bool { - *self == RXFIW_A::SIXFRAMES + *self == Rxfiw::Sixframes } - #[doc = "Checks if the value of the field is `SEVENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least seven frames in it."] #[inline(always)] pub fn is_sevenframes(&self) -> bool { - *self == RXFIW_A::SEVENFRAMES + *self == Rxfiw::Sevenframes } - #[doc = "Checks if the value of the field is `EIGHTFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least eight frames in it."] #[inline(always)] pub fn is_eightframes(&self) -> bool { - *self == RXFIW_A::EIGHTFRAMES + *self == Rxfiw::Eightframes } - #[doc = "Checks if the value of the field is `NINEFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least nine frames in it."] #[inline(always)] pub fn is_nineframes(&self) -> bool { - *self == RXFIW_A::NINEFRAMES + *self == Rxfiw::Nineframes } - #[doc = "Checks if the value of the field is `TENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least ten frames in it."] #[inline(always)] pub fn is_tenframes(&self) -> bool { - *self == RXFIW_A::TENFRAMES + *self == Rxfiw::Tenframes } - #[doc = "Checks if the value of the field is `ELEVENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least eleven frames in it."] #[inline(always)] pub fn is_elevenframes(&self) -> bool { - *self == RXFIW_A::ELEVENFRAMES + *self == Rxfiw::Elevenframes } - #[doc = "Checks if the value of the field is `TWELVEFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least twelve frames in it."] #[inline(always)] pub fn is_twelveframes(&self) -> bool { - *self == RXFIW_A::TWELVEFRAMES + *self == Rxfiw::Twelveframes } - #[doc = "Checks if the value of the field is `THIRTEENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least thriteen frames in it."] #[inline(always)] pub fn is_thirteenframes(&self) -> bool { - *self == RXFIW_A::THIRTEENFRAMES + *self == Rxfiw::Thirteenframes } - #[doc = "Checks if the value of the field is `FOURTEENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least fourteen frames in it."] #[inline(always)] pub fn is_fourteenframes(&self) -> bool { - *self == RXFIW_A::FOURTEENFRAMES + *self == Rxfiw::Fourteenframes } - #[doc = "Checks if the value of the field is `FIFTEENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least fifteen frames in it."] #[inline(always)] pub fn is_fifteenframes(&self) -> bool { - *self == RXFIW_A::FIFTEENFRAMES + *self == Rxfiw::Fifteenframes } - #[doc = "Checks if the value of the field is `SIXTEENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least sixteen frames in it."] #[inline(always)] pub fn is_sixteenframes(&self) -> bool { - *self == RXFIW_A::SIXTEENFRAMES + *self == Rxfiw::Sixteenframes } } #[doc = "Field `RXFIW` writer - RX FIFO Interrupt Watermark"] -pub type RXFIW_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG1_SPEC, u8, RXFIW_A, 4, O>; -impl<'a, const O: u8> RXFIW_W<'a, O> { +pub type RxfiwW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rxfiw, crate::Safe>; +impl<'a, REG> RxfiwW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "RXFL status flag and IF are set when the RX FIFO has at least one frame in it."] #[inline(always)] - pub fn oneframe(self) -> &'a mut W { - self.variant(RXFIW_A::ONEFRAME) + pub fn oneframe(self) -> &'a mut crate::W { + self.variant(Rxfiw::Oneframe) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least two frames in it."] #[inline(always)] - pub fn twoframes(self) -> &'a mut W { - self.variant(RXFIW_A::TWOFRAMES) + pub fn twoframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Twoframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least three frames in it."] #[inline(always)] - pub fn threeframes(self) -> &'a mut W { - self.variant(RXFIW_A::THREEFRAMES) + pub fn threeframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Threeframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least four frames in it."] #[inline(always)] - pub fn fourframes(self) -> &'a mut W { - self.variant(RXFIW_A::FOURFRAMES) + pub fn fourframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Fourframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least five frames in it."] #[inline(always)] - pub fn fiveframes(self) -> &'a mut W { - self.variant(RXFIW_A::FIVEFRAMES) + pub fn fiveframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Fiveframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least six frames in it."] #[inline(always)] - pub fn sixframes(self) -> &'a mut W { - self.variant(RXFIW_A::SIXFRAMES) + pub fn sixframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Sixframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least seven frames in it."] #[inline(always)] - pub fn sevenframes(self) -> &'a mut W { - self.variant(RXFIW_A::SEVENFRAMES) + pub fn sevenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Sevenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least eight frames in it."] #[inline(always)] - pub fn eightframes(self) -> &'a mut W { - self.variant(RXFIW_A::EIGHTFRAMES) + pub fn eightframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Eightframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least nine frames in it."] #[inline(always)] - pub fn nineframes(self) -> &'a mut W { - self.variant(RXFIW_A::NINEFRAMES) + pub fn nineframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Nineframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least ten frames in it."] #[inline(always)] - pub fn tenframes(self) -> &'a mut W { - self.variant(RXFIW_A::TENFRAMES) + pub fn tenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Tenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least eleven frames in it."] #[inline(always)] - pub fn elevenframes(self) -> &'a mut W { - self.variant(RXFIW_A::ELEVENFRAMES) + pub fn elevenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Elevenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least twelve frames in it."] #[inline(always)] - pub fn twelveframes(self) -> &'a mut W { - self.variant(RXFIW_A::TWELVEFRAMES) + pub fn twelveframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Twelveframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least thriteen frames in it."] #[inline(always)] - pub fn thirteenframes(self) -> &'a mut W { - self.variant(RXFIW_A::THIRTEENFRAMES) + pub fn thirteenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Thirteenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least fourteen frames in it."] #[inline(always)] - pub fn fourteenframes(self) -> &'a mut W { - self.variant(RXFIW_A::FOURTEENFRAMES) + pub fn fourteenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Fourteenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least fifteen frames in it."] #[inline(always)] - pub fn fifteenframes(self) -> &'a mut W { - self.variant(RXFIW_A::FIFTEENFRAMES) + pub fn fifteenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Fifteenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least sixteen frames in it."] #[inline(always)] - pub fn sixteenframes(self) -> &'a mut W { - self.variant(RXFIW_A::SIXTEENFRAMES) + pub fn sixteenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Sixteenframes) } } impl R { #[doc = "Bit 0 - Debug halt"] #[inline(always)] - pub fn dbghalt(&self) -> DBGHALT_R { - DBGHALT_R::new((self.bits & 1) != 0) + pub fn dbghalt(&self) -> DbghaltR { + DbghaltR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Clear-to-send Invert Enable"] #[inline(always)] - pub fn ctsinv(&self) -> CTSINV_R { - CTSINV_R::new(((self.bits >> 1) & 1) != 0) + pub fn ctsinv(&self) -> CtsinvR { + CtsinvR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Clear-to-send Enable"] #[inline(always)] - pub fn ctsen(&self) -> CTSEN_R { - CTSEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn ctsen(&self) -> CtsenR { + CtsenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Request-to-send Invert Enable"] #[inline(always)] - pub fn rtsinv(&self) -> RTSINV_R { - RTSINV_R::new(((self.bits >> 3) & 1) != 0) + pub fn rtsinv(&self) -> RtsinvR { + RtsinvR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:6 - RX Timeout"] #[inline(always)] - pub fn rxtimeout(&self) -> RXTIMEOUT_R { - RXTIMEOUT_R::new(((self.bits >> 4) & 7) as u8) + pub fn rxtimeout(&self) -> RxtimeoutR { + RxtimeoutR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bit 11 - Start Frame Unblock Receiver"] #[inline(always)] - pub fn sfubrx(&self) -> SFUBRX_R { - SFUBRX_R::new(((self.bits >> 11) & 1) != 0) + pub fn sfubrx(&self) -> SfubrxR { + SfubrxR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 15 - PRS RX Enable"] #[inline(always)] - pub fn rxprsen(&self) -> RXPRSEN_R { - RXPRSEN_R::new(((self.bits >> 15) & 1) != 0) + pub fn rxprsen(&self) -> RxprsenR { + RxprsenR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:19 - TX FIFO Interrupt Watermark"] #[inline(always)] - pub fn txfiw(&self) -> TXFIW_R { - TXFIW_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn txfiw(&self) -> TxfiwR { + TxfiwR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 22:25 - Request-to-send RX FIFO Watermark"] #[inline(always)] - pub fn rtsrxfw(&self) -> RTSRXFW_R { - RTSRXFW_R::new(((self.bits >> 22) & 0x0f) as u8) + pub fn rtsrxfw(&self) -> RtsrxfwR { + RtsrxfwR::new(((self.bits >> 22) & 0x0f) as u8) } #[doc = "Bits 27:30 - RX FIFO Interrupt Watermark"] #[inline(always)] - pub fn rxfiw(&self) -> RXFIW_R { - RXFIW_R::new(((self.bits >> 27) & 0x0f) as u8) + pub fn rxfiw(&self) -> RxfiwR { + RxfiwR::new(((self.bits >> 27) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - Debug halt"] #[inline(always)] #[must_use] - pub fn dbghalt(&mut self) -> DBGHALT_W<0> { - DBGHALT_W::new(self) + pub fn dbghalt(&mut self) -> DbghaltW { + DbghaltW::new(self, 0) } #[doc = "Bit 1 - Clear-to-send Invert Enable"] #[inline(always)] #[must_use] - pub fn ctsinv(&mut self) -> CTSINV_W<1> { - CTSINV_W::new(self) + pub fn ctsinv(&mut self) -> CtsinvW { + CtsinvW::new(self, 1) } #[doc = "Bit 2 - Clear-to-send Enable"] #[inline(always)] #[must_use] - pub fn ctsen(&mut self) -> CTSEN_W<2> { - CTSEN_W::new(self) + pub fn ctsen(&mut self) -> CtsenW { + CtsenW::new(self, 2) } #[doc = "Bit 3 - Request-to-send Invert Enable"] #[inline(always)] #[must_use] - pub fn rtsinv(&mut self) -> RTSINV_W<3> { - RTSINV_W::new(self) + pub fn rtsinv(&mut self) -> RtsinvW { + RtsinvW::new(self, 3) } #[doc = "Bits 4:6 - RX Timeout"] #[inline(always)] #[must_use] - pub fn rxtimeout(&mut self) -> RXTIMEOUT_W<4> { - RXTIMEOUT_W::new(self) + pub fn rxtimeout(&mut self) -> RxtimeoutW { + RxtimeoutW::new(self, 4) } #[doc = "Bit 11 - Start Frame Unblock Receiver"] #[inline(always)] #[must_use] - pub fn sfubrx(&mut self) -> SFUBRX_W<11> { - SFUBRX_W::new(self) + pub fn sfubrx(&mut self) -> SfubrxW { + SfubrxW::new(self, 11) } #[doc = "Bit 15 - PRS RX Enable"] #[inline(always)] #[must_use] - pub fn rxprsen(&mut self) -> RXPRSEN_W<15> { - RXPRSEN_W::new(self) + pub fn rxprsen(&mut self) -> RxprsenW { + RxprsenW::new(self, 15) } #[doc = "Bits 16:19 - TX FIFO Interrupt Watermark"] #[inline(always)] #[must_use] - pub fn txfiw(&mut self) -> TXFIW_W<16> { - TXFIW_W::new(self) + pub fn txfiw(&mut self) -> TxfiwW { + TxfiwW::new(self, 16) } #[doc = "Bits 22:25 - Request-to-send RX FIFO Watermark"] #[inline(always)] #[must_use] - pub fn rtsrxfw(&mut self) -> RTSRXFW_W<22> { - RTSRXFW_W::new(self) + pub fn rtsrxfw(&mut self) -> RtsrxfwW { + RtsrxfwW::new(self, 22) } #[doc = "Bits 27:30 - RX FIFO Interrupt Watermark"] #[inline(always)] #[must_use] - pub fn rxfiw(&mut self) -> RXFIW_W<27> { - RXFIW_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rxfiw(&mut self) -> RxfiwW { + RxfiwW::new(self, 27) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg1](index.html) module"] -pub struct CFG1_SPEC; -impl crate::RegisterSpec for CFG1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cfg1Spec; +impl crate::RegisterSpec for Cfg1Spec { type Ux = u32; } -#[doc = "`read()` method returns [cfg1::R](R) reader structure"] -impl crate::Readable for CFG1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg1::W](W) writer structure"] -impl crate::Writable for CFG1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg1::R`](R) reader structure"] +impl crate::Readable for Cfg1Spec {} +#[doc = "`write(|w| ..)` method takes [`cfg1::W`](W) writer structure"] +impl crate::Writable for Cfg1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG1 to value 0"] -impl crate::Resettable for CFG1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cfg1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/cfg2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/cfg2.rs index 1f16a32..08998b3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/cfg2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/cfg2.rs @@ -1,384 +1,356 @@ #[doc = "Register `CFG2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MASTER` reader - Main mode"] -pub type MASTER_R = crate::BitReader; +pub type W = crate::W; #[doc = "Main mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MASTER_A { +pub enum Master { #[doc = "0: Secondary mode"] - SLAVE = 0, + Slave = 0, #[doc = "1: Main mode"] - MASTER = 1, + Master = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MASTER_A) -> Self { + fn from(variant: Master) -> Self { variant as u8 != 0 } } -impl MASTER_R { +#[doc = "Field `MASTER` reader - Main mode"] +pub type MasterR = crate::BitReader; +impl MasterR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MASTER_A { + pub const fn variant(&self) -> Master { match self.bits { - false => MASTER_A::SLAVE, - true => MASTER_A::MASTER, + false => Master::Slave, + true => Master::Master, } } - #[doc = "Checks if the value of the field is `SLAVE`"] + #[doc = "Secondary mode"] #[inline(always)] pub fn is_slave(&self) -> bool { - *self == MASTER_A::SLAVE + *self == Master::Slave } - #[doc = "Checks if the value of the field is `MASTER`"] + #[doc = "Main mode"] #[inline(always)] pub fn is_master(&self) -> bool { - *self == MASTER_A::MASTER + *self == Master::Master } } #[doc = "Field `MASTER` writer - Main mode"] -pub type MASTER_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, MASTER_A, O>; -impl<'a, const O: u8> MASTER_W<'a, O> { +pub type MasterW<'a, REG> = crate::BitWriter<'a, REG, Master>; +impl<'a, REG> MasterW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Secondary mode"] #[inline(always)] - pub fn slave(self) -> &'a mut W { - self.variant(MASTER_A::SLAVE) + pub fn slave(self) -> &'a mut crate::W { + self.variant(Master::Slave) } #[doc = "Main mode"] #[inline(always)] - pub fn master(self) -> &'a mut W { - self.variant(MASTER_A::MASTER) + pub fn master(self) -> &'a mut crate::W { + self.variant(Master::Master) } } -#[doc = "Field `CLKPOL` reader - Clock Polarity"] -pub type CLKPOL_R = crate::BitReader; #[doc = "Clock Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLKPOL_A { +pub enum Clkpol { #[doc = "0: The bus clock used in synchronous mode has a low base value"] - IDLELOW = 0, + Idlelow = 0, #[doc = "1: The bus clock used in synchronous mode has a high base value"] - IDLEHIGH = 1, + Idlehigh = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLKPOL_A) -> Self { + fn from(variant: Clkpol) -> Self { variant as u8 != 0 } } -impl CLKPOL_R { +#[doc = "Field `CLKPOL` reader - Clock Polarity"] +pub type ClkpolR = crate::BitReader; +impl ClkpolR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CLKPOL_A { + pub const fn variant(&self) -> Clkpol { match self.bits { - false => CLKPOL_A::IDLELOW, - true => CLKPOL_A::IDLEHIGH, + false => Clkpol::Idlelow, + true => Clkpol::Idlehigh, } } - #[doc = "Checks if the value of the field is `IDLELOW`"] + #[doc = "The bus clock used in synchronous mode has a low base value"] #[inline(always)] pub fn is_idlelow(&self) -> bool { - *self == CLKPOL_A::IDLELOW + *self == Clkpol::Idlelow } - #[doc = "Checks if the value of the field is `IDLEHIGH`"] + #[doc = "The bus clock used in synchronous mode has a high base value"] #[inline(always)] pub fn is_idlehigh(&self) -> bool { - *self == CLKPOL_A::IDLEHIGH + *self == Clkpol::Idlehigh } } #[doc = "Field `CLKPOL` writer - Clock Polarity"] -pub type CLKPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, CLKPOL_A, O>; -impl<'a, const O: u8> CLKPOL_W<'a, O> { +pub type ClkpolW<'a, REG> = crate::BitWriter<'a, REG, Clkpol>; +impl<'a, REG> ClkpolW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The bus clock used in synchronous mode has a low base value"] #[inline(always)] - pub fn idlelow(self) -> &'a mut W { - self.variant(CLKPOL_A::IDLELOW) + pub fn idlelow(self) -> &'a mut crate::W { + self.variant(Clkpol::Idlelow) } #[doc = "The bus clock used in synchronous mode has a high base value"] #[inline(always)] - pub fn idlehigh(self) -> &'a mut W { - self.variant(CLKPOL_A::IDLEHIGH) + pub fn idlehigh(self) -> &'a mut crate::W { + self.variant(Clkpol::Idlehigh) } } -#[doc = "Field `CLKPHA` reader - Clock Edge for Setup/Sample"] -pub type CLKPHA_R = crate::BitReader; #[doc = "Clock Edge for Setup/Sample\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLKPHA_A { +pub enum Clkpha { #[doc = "0: Data is sampled on the leading edge and set-up on the trailing edge of the bus clock in synchronous mode"] - SAMPLELEADING = 0, + Sampleleading = 0, #[doc = "1: Data is set-up on the leading edge and sampled on the trailing edge of the bus clock in synchronous mode"] - SAMPLETRAILING = 1, + Sampletrailing = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLKPHA_A) -> Self { + fn from(variant: Clkpha) -> Self { variant as u8 != 0 } } -impl CLKPHA_R { +#[doc = "Field `CLKPHA` reader - Clock Edge for Setup/Sample"] +pub type ClkphaR = crate::BitReader; +impl ClkphaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CLKPHA_A { + pub const fn variant(&self) -> Clkpha { match self.bits { - false => CLKPHA_A::SAMPLELEADING, - true => CLKPHA_A::SAMPLETRAILING, + false => Clkpha::Sampleleading, + true => Clkpha::Sampletrailing, } } - #[doc = "Checks if the value of the field is `SAMPLELEADING`"] + #[doc = "Data is sampled on the leading edge and set-up on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] pub fn is_sampleleading(&self) -> bool { - *self == CLKPHA_A::SAMPLELEADING + *self == Clkpha::Sampleleading } - #[doc = "Checks if the value of the field is `SAMPLETRAILING`"] + #[doc = "Data is set-up on the leading edge and sampled on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] pub fn is_sampletrailing(&self) -> bool { - *self == CLKPHA_A::SAMPLETRAILING + *self == Clkpha::Sampletrailing } } #[doc = "Field `CLKPHA` writer - Clock Edge for Setup/Sample"] -pub type CLKPHA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, CLKPHA_A, O>; -impl<'a, const O: u8> CLKPHA_W<'a, O> { +pub type ClkphaW<'a, REG> = crate::BitWriter<'a, REG, Clkpha>; +impl<'a, REG> ClkphaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Data is sampled on the leading edge and set-up on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] - pub fn sampleleading(self) -> &'a mut W { - self.variant(CLKPHA_A::SAMPLELEADING) + pub fn sampleleading(self) -> &'a mut crate::W { + self.variant(Clkpha::Sampleleading) } #[doc = "Data is set-up on the leading edge and sampled on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] - pub fn sampletrailing(self) -> &'a mut W { - self.variant(CLKPHA_A::SAMPLETRAILING) + pub fn sampletrailing(self) -> &'a mut crate::W { + self.variant(Clkpha::Sampletrailing) } } -#[doc = "Field `CSINV` reader - Chip Select Invert"] -pub type CSINV_R = crate::BitReader; #[doc = "Chip Select Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CSINV_A { +pub enum Csinv { #[doc = "0: Chip select is active low"] - AL = 0, + Al = 0, #[doc = "1: Chip select is active high"] - AH = 1, + Ah = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CSINV_A) -> Self { + fn from(variant: Csinv) -> Self { variant as u8 != 0 } } -impl CSINV_R { +#[doc = "Field `CSINV` reader - Chip Select Invert"] +pub type CsinvR = crate::BitReader; +impl CsinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CSINV_A { + pub const fn variant(&self) -> Csinv { match self.bits { - false => CSINV_A::AL, - true => CSINV_A::AH, + false => Csinv::Al, + true => Csinv::Ah, } } - #[doc = "Checks if the value of the field is `AL`"] + #[doc = "Chip select is active low"] #[inline(always)] pub fn is_al(&self) -> bool { - *self == CSINV_A::AL + *self == Csinv::Al } - #[doc = "Checks if the value of the field is `AH`"] + #[doc = "Chip select is active high"] #[inline(always)] pub fn is_ah(&self) -> bool { - *self == CSINV_A::AH + *self == Csinv::Ah } } #[doc = "Field `CSINV` writer - Chip Select Invert"] -pub type CSINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, CSINV_A, O>; -impl<'a, const O: u8> CSINV_W<'a, O> { +pub type CsinvW<'a, REG> = crate::BitWriter<'a, REG, Csinv>; +impl<'a, REG> CsinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Chip select is active low"] #[inline(always)] - pub fn al(self) -> &'a mut W { - self.variant(CSINV_A::AL) + pub fn al(self) -> &'a mut crate::W { + self.variant(Csinv::Al) } #[doc = "Chip select is active high"] #[inline(always)] - pub fn ah(self) -> &'a mut W { - self.variant(CSINV_A::AH) + pub fn ah(self) -> &'a mut crate::W { + self.variant(Csinv::Ah) } } #[doc = "Field `AUTOTX` reader - Always Transmit When RXFIFO Not Full"] -pub type AUTOTX_R = crate::BitReader; +pub type AutotxR = crate::BitReader; #[doc = "Field `AUTOTX` writer - Always Transmit When RXFIFO Not Full"] -pub type AUTOTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, bool, O>; +pub type AutotxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOCS` reader - Automatic Chip Select"] -pub type AUTOCS_R = crate::BitReader; +pub type AutocsR = crate::BitReader; #[doc = "Field `AUTOCS` writer - Automatic Chip Select"] -pub type AUTOCS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, bool, O>; +pub type AutocsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLKPRSEN` reader - PRS CLK Enable"] -pub type CLKPRSEN_R = crate::BitReader; +pub type ClkprsenR = crate::BitReader; #[doc = "Field `CLKPRSEN` writer - PRS CLK Enable"] -pub type CLKPRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, bool, O>; +pub type ClkprsenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FORCELOAD` reader - Force Load to Shift Register"] -pub type FORCELOAD_R = crate::BitReader; +pub type ForceloadR = crate::BitReader; #[doc = "Field `FORCELOAD` writer - Force Load to Shift Register"] -pub type FORCELOAD_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, bool, O>; +pub type ForceloadW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SDIV` reader - Sync Clock Div"] -pub type SDIV_R = crate::FieldReader; +pub type SdivR = crate::FieldReader; #[doc = "Field `SDIV` writer - Sync Clock Div"] -pub type SDIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG2_SPEC, u8, u8, 8, O>; +pub type SdivW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bit 0 - Main mode"] #[inline(always)] - pub fn master(&self) -> MASTER_R { - MASTER_R::new((self.bits & 1) != 0) + pub fn master(&self) -> MasterR { + MasterR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Clock Polarity"] #[inline(always)] - pub fn clkpol(&self) -> CLKPOL_R { - CLKPOL_R::new(((self.bits >> 1) & 1) != 0) + pub fn clkpol(&self) -> ClkpolR { + ClkpolR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Clock Edge for Setup/Sample"] #[inline(always)] - pub fn clkpha(&self) -> CLKPHA_R { - CLKPHA_R::new(((self.bits >> 2) & 1) != 0) + pub fn clkpha(&self) -> ClkphaR { + ClkphaR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Chip Select Invert"] #[inline(always)] - pub fn csinv(&self) -> CSINV_R { - CSINV_R::new(((self.bits >> 3) & 1) != 0) + pub fn csinv(&self) -> CsinvR { + CsinvR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Always Transmit When RXFIFO Not Full"] #[inline(always)] - pub fn autotx(&self) -> AUTOTX_R { - AUTOTX_R::new(((self.bits >> 4) & 1) != 0) + pub fn autotx(&self) -> AutotxR { + AutotxR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Automatic Chip Select"] #[inline(always)] - pub fn autocs(&self) -> AUTOCS_R { - AUTOCS_R::new(((self.bits >> 5) & 1) != 0) + pub fn autocs(&self) -> AutocsR { + AutocsR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - PRS CLK Enable"] #[inline(always)] - pub fn clkprsen(&self) -> CLKPRSEN_R { - CLKPRSEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn clkprsen(&self) -> ClkprsenR { + ClkprsenR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Force Load to Shift Register"] #[inline(always)] - pub fn forceload(&self) -> FORCELOAD_R { - FORCELOAD_R::new(((self.bits >> 7) & 1) != 0) + pub fn forceload(&self) -> ForceloadR { + ForceloadR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 24:31 - Sync Clock Div"] #[inline(always)] - pub fn sdiv(&self) -> SDIV_R { - SDIV_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn sdiv(&self) -> SdivR { + SdivR::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bit 0 - Main mode"] #[inline(always)] #[must_use] - pub fn master(&mut self) -> MASTER_W<0> { - MASTER_W::new(self) + pub fn master(&mut self) -> MasterW { + MasterW::new(self, 0) } #[doc = "Bit 1 - Clock Polarity"] #[inline(always)] #[must_use] - pub fn clkpol(&mut self) -> CLKPOL_W<1> { - CLKPOL_W::new(self) + pub fn clkpol(&mut self) -> ClkpolW { + ClkpolW::new(self, 1) } #[doc = "Bit 2 - Clock Edge for Setup/Sample"] #[inline(always)] #[must_use] - pub fn clkpha(&mut self) -> CLKPHA_W<2> { - CLKPHA_W::new(self) + pub fn clkpha(&mut self) -> ClkphaW { + ClkphaW::new(self, 2) } #[doc = "Bit 3 - Chip Select Invert"] #[inline(always)] #[must_use] - pub fn csinv(&mut self) -> CSINV_W<3> { - CSINV_W::new(self) + pub fn csinv(&mut self) -> CsinvW { + CsinvW::new(self, 3) } #[doc = "Bit 4 - Always Transmit When RXFIFO Not Full"] #[inline(always)] #[must_use] - pub fn autotx(&mut self) -> AUTOTX_W<4> { - AUTOTX_W::new(self) + pub fn autotx(&mut self) -> AutotxW { + AutotxW::new(self, 4) } #[doc = "Bit 5 - Automatic Chip Select"] #[inline(always)] #[must_use] - pub fn autocs(&mut self) -> AUTOCS_W<5> { - AUTOCS_W::new(self) + pub fn autocs(&mut self) -> AutocsW { + AutocsW::new(self, 5) } #[doc = "Bit 6 - PRS CLK Enable"] #[inline(always)] #[must_use] - pub fn clkprsen(&mut self) -> CLKPRSEN_W<6> { - CLKPRSEN_W::new(self) + pub fn clkprsen(&mut self) -> ClkprsenW { + ClkprsenW::new(self, 6) } #[doc = "Bit 7 - Force Load to Shift Register"] #[inline(always)] #[must_use] - pub fn forceload(&mut self) -> FORCELOAD_W<7> { - FORCELOAD_W::new(self) + pub fn forceload(&mut self) -> ForceloadW { + ForceloadW::new(self, 7) } #[doc = "Bits 24:31 - Sync Clock Div"] #[inline(always)] #[must_use] - pub fn sdiv(&mut self) -> SDIV_W<24> { - SDIV_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sdiv(&mut self) -> SdivW { + SdivW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg2](index.html) module"] -pub struct CFG2_SPEC; -impl crate::RegisterSpec for CFG2_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cfg2Spec; +impl crate::RegisterSpec for Cfg2Spec { type Ux = u32; } -#[doc = "`read()` method returns [cfg2::R](R) reader structure"] -impl crate::Readable for CFG2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg2::W](W) writer structure"] -impl crate::Writable for CFG2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg2::R`](R) reader structure"] +impl crate::Readable for Cfg2Spec {} +#[doc = "`write(|w| ..)` method takes [`cfg2::W`](W) writer structure"] +impl crate::Writable for Cfg2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG2 to value 0x20"] -impl crate::Resettable for CFG2_SPEC { - const RESET_VALUE: Self::Ux = 0x20; +impl crate::Resettable for Cfg2Spec { + const RESET_VALUE: u32 = 0x20; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/clkdiv.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/clkdiv.rs index 5158bd5..beab8d8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/clkdiv.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/clkdiv.rs @@ -1,80 +1,40 @@ #[doc = "Register `CLKDIV` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKDIV` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DIV` reader - Fractional Clock Divider"] -pub type DIV_R = crate::FieldReader; +pub type DivR = crate::FieldReader; #[doc = "Field `DIV` writer - Fractional Clock Divider"] -pub type DIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CLKDIV_SPEC, u32, u32, 20, O>; +pub type DivW<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { #[doc = "Bits 3:22 - Fractional Clock Divider"] #[inline(always)] - pub fn div(&self) -> DIV_R { - DIV_R::new((self.bits >> 3) & 0x000f_ffff) + pub fn div(&self) -> DivR { + DivR::new((self.bits >> 3) & 0x000f_ffff) } } impl W { #[doc = "Bits 3:22 - Fractional Clock Divider"] #[inline(always)] #[must_use] - pub fn div(&mut self) -> DIV_W<3> { - DIV_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn div(&mut self) -> DivW { + DivW::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clkdiv](index.html) module"] -pub struct CLKDIV_SPEC; -impl crate::RegisterSpec for CLKDIV_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ClkdivSpec; +impl crate::RegisterSpec for ClkdivSpec { type Ux = u32; } -#[doc = "`read()` method returns [clkdiv::R](R) reader structure"] -impl crate::Readable for CLKDIV_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clkdiv::W](W) writer structure"] -impl crate::Writable for CLKDIV_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`clkdiv::R`](R) reader structure"] +impl crate::Readable for ClkdivSpec {} +#[doc = "`write(|w| ..)` method takes [`clkdiv::W`](W) writer structure"] +impl crate::Writable for ClkdivSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV to value 0"] -impl crate::Resettable for CLKDIV_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ClkdivSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/cmd.rs index 8d3465f..39d3e79 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/cmd.rs @@ -1,116 +1,91 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RXEN` writer - Receiver Enable"] -pub type RXEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXDIS` writer - Receiver Disable"] -pub type RXDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXEN` writer - Transmitter Enable"] -pub type TXEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXDIS` writer - Transmitter Disable"] -pub type TXDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXBLOCKEN` writer - Receiver Block Enable"] -pub type RXBLOCKEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxblockenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXBLOCKDIS` writer - Receiver Block Disable"] -pub type RXBLOCKDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxblockdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTRIEN` writer - Transmitter Tristate Enable"] -pub type TXTRIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxtrienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTRIDIS` writer - Transmitter Tristate Disable"] -pub type TXTRIDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxtridisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEARTX` writer - Clear TX FIFO"] -pub type CLEARTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type CleartxW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Receiver Enable"] #[inline(always)] #[must_use] - pub fn rxen(&mut self) -> RXEN_W<0> { - RXEN_W::new(self) + pub fn rxen(&mut self) -> RxenW { + RxenW::new(self, 0) } #[doc = "Bit 1 - Receiver Disable"] #[inline(always)] #[must_use] - pub fn rxdis(&mut self) -> RXDIS_W<1> { - RXDIS_W::new(self) + pub fn rxdis(&mut self) -> RxdisW { + RxdisW::new(self, 1) } #[doc = "Bit 2 - Transmitter Enable"] #[inline(always)] #[must_use] - pub fn txen(&mut self) -> TXEN_W<2> { - TXEN_W::new(self) + pub fn txen(&mut self) -> TxenW { + TxenW::new(self, 2) } #[doc = "Bit 3 - Transmitter Disable"] #[inline(always)] #[must_use] - pub fn txdis(&mut self) -> TXDIS_W<3> { - TXDIS_W::new(self) + pub fn txdis(&mut self) -> TxdisW { + TxdisW::new(self, 3) } #[doc = "Bit 4 - Receiver Block Enable"] #[inline(always)] #[must_use] - pub fn rxblocken(&mut self) -> RXBLOCKEN_W<4> { - RXBLOCKEN_W::new(self) + pub fn rxblocken(&mut self) -> RxblockenW { + RxblockenW::new(self, 4) } #[doc = "Bit 5 - Receiver Block Disable"] #[inline(always)] #[must_use] - pub fn rxblockdis(&mut self) -> RXBLOCKDIS_W<5> { - RXBLOCKDIS_W::new(self) + pub fn rxblockdis(&mut self) -> RxblockdisW { + RxblockdisW::new(self, 5) } #[doc = "Bit 6 - Transmitter Tristate Enable"] #[inline(always)] #[must_use] - pub fn txtrien(&mut self) -> TXTRIEN_W<6> { - TXTRIEN_W::new(self) + pub fn txtrien(&mut self) -> TxtrienW { + TxtrienW::new(self, 6) } #[doc = "Bit 7 - Transmitter Tristate Disable"] #[inline(always)] #[must_use] - pub fn txtridis(&mut self) -> TXTRIDIS_W<7> { - TXTRIDIS_W::new(self) + pub fn txtridis(&mut self) -> TxtridisW { + TxtridisW::new(self, 7) } #[doc = "Bit 8 - Clear TX FIFO"] #[inline(always)] #[must_use] - pub fn cleartx(&mut self) -> CLEARTX_W<8> { - CLEARTX_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cleartx(&mut self) -> CleartxW { + CleartxW::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/dtxdatcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/dtxdatcfg.rs index 8ae017b..67cc6f0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/dtxdatcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/dtxdatcfg.rs @@ -1,80 +1,40 @@ #[doc = "Register `DTXDATCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTXDATCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTXDAT` reader - Default TX DATA"] -pub type DTXDAT_R = crate::FieldReader; +pub type DtxdatR = crate::FieldReader; #[doc = "Field `DTXDAT` writer - Default TX DATA"] -pub type DTXDAT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTXDATCFG_SPEC, u16, u16, 16, O>; +pub type DtxdatW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Default TX DATA"] #[inline(always)] - pub fn dtxdat(&self) -> DTXDAT_R { - DTXDAT_R::new((self.bits & 0xffff) as u16) + pub fn dtxdat(&self) -> DtxdatR { + DtxdatR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Default TX DATA"] #[inline(always)] #[must_use] - pub fn dtxdat(&mut self) -> DTXDAT_W<0> { - DTXDAT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtxdat(&mut self) -> DtxdatW { + DtxdatW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtxdatcfg](index.html) module"] -pub struct DTXDATCFG_SPEC; -impl crate::RegisterSpec for DTXDATCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtxdatcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtxdatcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtxdatcfgSpec; +impl crate::RegisterSpec for DtxdatcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtxdatcfg::R](R) reader structure"] -impl crate::Readable for DTXDATCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtxdatcfg::W](W) writer structure"] -impl crate::Writable for DTXDATCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtxdatcfg::R`](R) reader structure"] +impl crate::Readable for DtxdatcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dtxdatcfg::W`](W) writer structure"] +impl crate::Writable for DtxdatcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTXDATCFG to value 0"] -impl crate::Resettable for DTXDATCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtxdatcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/en.rs index f15bf65..7298843 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Module enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Module enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Module enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Module enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/framecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/framecfg.rs index 037aaa3..7ad7134 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/framecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/framecfg.rs @@ -1,399 +1,381 @@ #[doc = "Register `FRAMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `FRAMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DATABITS` reader - Data-Bit Mode"] -pub type DATABITS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Data-Bit Mode\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DATABITS_A { +pub enum Databits { #[doc = "1: Each frame contains 7 data bits"] - SEVEN = 1, + Seven = 1, #[doc = "2: Each frame contains 8 data bits"] - EIGHT = 2, + Eight = 2, #[doc = "3: Each frame contains 9 data bits"] - NINE = 3, + Nine = 3, #[doc = "4: Each frame contains 10 data bits"] - TEN = 4, + Ten = 4, #[doc = "5: Each frame contains 11 data bits"] - ELEVEN = 5, + Eleven = 5, #[doc = "6: Each frame contains 12 data bits"] - TWELVE = 6, + Twelve = 6, #[doc = "7: Each frame contains 13 data bits"] - THIRTEEN = 7, + Thirteen = 7, #[doc = "8: Each frame contains 14 data bits"] - FOURTEEN = 8, + Fourteen = 8, #[doc = "9: Each frame contains 15 data bits"] - FIFTEEN = 9, + Fifteen = 9, #[doc = "10: Each frame contains 16 data bits"] - SIXTEEN = 10, + Sixteen = 10, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DATABITS_A) -> Self { + fn from(variant: Databits) -> Self { variant as _ } } -impl DATABITS_R { +impl crate::FieldSpec for Databits { + type Ux = u8; +} +impl crate::IsEnum for Databits {} +#[doc = "Field `DATABITS` reader - Data-Bit Mode"] +pub type DatabitsR = crate::FieldReader; +impl DatabitsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(DATABITS_A::SEVEN), - 2 => Some(DATABITS_A::EIGHT), - 3 => Some(DATABITS_A::NINE), - 4 => Some(DATABITS_A::TEN), - 5 => Some(DATABITS_A::ELEVEN), - 6 => Some(DATABITS_A::TWELVE), - 7 => Some(DATABITS_A::THIRTEEN), - 8 => Some(DATABITS_A::FOURTEEN), - 9 => Some(DATABITS_A::FIFTEEN), - 10 => Some(DATABITS_A::SIXTEEN), + 1 => Some(Databits::Seven), + 2 => Some(Databits::Eight), + 3 => Some(Databits::Nine), + 4 => Some(Databits::Ten), + 5 => Some(Databits::Eleven), + 6 => Some(Databits::Twelve), + 7 => Some(Databits::Thirteen), + 8 => Some(Databits::Fourteen), + 9 => Some(Databits::Fifteen), + 10 => Some(Databits::Sixteen), _ => None, } } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "Each frame contains 7 data bits"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == DATABITS_A::SEVEN + *self == Databits::Seven } - #[doc = "Checks if the value of the field is `EIGHT`"] + #[doc = "Each frame contains 8 data bits"] #[inline(always)] pub fn is_eight(&self) -> bool { - *self == DATABITS_A::EIGHT + *self == Databits::Eight } - #[doc = "Checks if the value of the field is `NINE`"] + #[doc = "Each frame contains 9 data bits"] #[inline(always)] pub fn is_nine(&self) -> bool { - *self == DATABITS_A::NINE + *self == Databits::Nine } - #[doc = "Checks if the value of the field is `TEN`"] + #[doc = "Each frame contains 10 data bits"] #[inline(always)] pub fn is_ten(&self) -> bool { - *self == DATABITS_A::TEN + *self == Databits::Ten } - #[doc = "Checks if the value of the field is `ELEVEN`"] + #[doc = "Each frame contains 11 data bits"] #[inline(always)] pub fn is_eleven(&self) -> bool { - *self == DATABITS_A::ELEVEN + *self == Databits::Eleven } - #[doc = "Checks if the value of the field is `TWELVE`"] + #[doc = "Each frame contains 12 data bits"] #[inline(always)] pub fn is_twelve(&self) -> bool { - *self == DATABITS_A::TWELVE + *self == Databits::Twelve } - #[doc = "Checks if the value of the field is `THIRTEEN`"] + #[doc = "Each frame contains 13 data bits"] #[inline(always)] pub fn is_thirteen(&self) -> bool { - *self == DATABITS_A::THIRTEEN + *self == Databits::Thirteen } - #[doc = "Checks if the value of the field is `FOURTEEN`"] + #[doc = "Each frame contains 14 data bits"] #[inline(always)] pub fn is_fourteen(&self) -> bool { - *self == DATABITS_A::FOURTEEN + *self == Databits::Fourteen } - #[doc = "Checks if the value of the field is `FIFTEEN`"] + #[doc = "Each frame contains 15 data bits"] #[inline(always)] pub fn is_fifteen(&self) -> bool { - *self == DATABITS_A::FIFTEEN + *self == Databits::Fifteen } - #[doc = "Checks if the value of the field is `SIXTEEN`"] + #[doc = "Each frame contains 16 data bits"] #[inline(always)] pub fn is_sixteen(&self) -> bool { - *self == DATABITS_A::SIXTEEN + *self == Databits::Sixteen } } #[doc = "Field `DATABITS` writer - Data-Bit Mode"] -pub type DATABITS_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, FRAMECFG_SPEC, u8, DATABITS_A, 4, O>; -impl<'a, const O: u8> DATABITS_W<'a, O> { +pub type DatabitsW<'a, REG> = crate::FieldWriter<'a, REG, 4, Databits>; +impl<'a, REG> DatabitsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Each frame contains 7 data bits"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(DATABITS_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Databits::Seven) } #[doc = "Each frame contains 8 data bits"] #[inline(always)] - pub fn eight(self) -> &'a mut W { - self.variant(DATABITS_A::EIGHT) + pub fn eight(self) -> &'a mut crate::W { + self.variant(Databits::Eight) } #[doc = "Each frame contains 9 data bits"] #[inline(always)] - pub fn nine(self) -> &'a mut W { - self.variant(DATABITS_A::NINE) + pub fn nine(self) -> &'a mut crate::W { + self.variant(Databits::Nine) } #[doc = "Each frame contains 10 data bits"] #[inline(always)] - pub fn ten(self) -> &'a mut W { - self.variant(DATABITS_A::TEN) + pub fn ten(self) -> &'a mut crate::W { + self.variant(Databits::Ten) } #[doc = "Each frame contains 11 data bits"] #[inline(always)] - pub fn eleven(self) -> &'a mut W { - self.variant(DATABITS_A::ELEVEN) + pub fn eleven(self) -> &'a mut crate::W { + self.variant(Databits::Eleven) } #[doc = "Each frame contains 12 data bits"] #[inline(always)] - pub fn twelve(self) -> &'a mut W { - self.variant(DATABITS_A::TWELVE) + pub fn twelve(self) -> &'a mut crate::W { + self.variant(Databits::Twelve) } #[doc = "Each frame contains 13 data bits"] #[inline(always)] - pub fn thirteen(self) -> &'a mut W { - self.variant(DATABITS_A::THIRTEEN) + pub fn thirteen(self) -> &'a mut crate::W { + self.variant(Databits::Thirteen) } #[doc = "Each frame contains 14 data bits"] #[inline(always)] - pub fn fourteen(self) -> &'a mut W { - self.variant(DATABITS_A::FOURTEEN) + pub fn fourteen(self) -> &'a mut crate::W { + self.variant(Databits::Fourteen) } #[doc = "Each frame contains 15 data bits"] #[inline(always)] - pub fn fifteen(self) -> &'a mut W { - self.variant(DATABITS_A::FIFTEEN) + pub fn fifteen(self) -> &'a mut crate::W { + self.variant(Databits::Fifteen) } #[doc = "Each frame contains 16 data bits"] #[inline(always)] - pub fn sixteen(self) -> &'a mut W { - self.variant(DATABITS_A::SIXTEEN) + pub fn sixteen(self) -> &'a mut crate::W { + self.variant(Databits::Sixteen) } } -#[doc = "Field `PARITY` reader - Parity-Bit Mode"] -pub type PARITY_R = crate::FieldReader; #[doc = "Parity-Bit Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PARITY_A { +pub enum Parity { #[doc = "0: Parity bits are not used"] - NONE = 0, + None = 0, #[doc = "2: Even parity are used. Parity bits are automatically generated and checked by hardware."] - EVEN = 2, + Even = 2, #[doc = "3: Odd parity is used. Parity bits are automatically generated and checked by hardware."] - ODD = 3, + Odd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PARITY_A) -> Self { + fn from(variant: Parity) -> Self { variant as _ } } -impl PARITY_R { +impl crate::FieldSpec for Parity { + type Ux = u8; +} +impl crate::IsEnum for Parity {} +#[doc = "Field `PARITY` reader - Parity-Bit Mode"] +pub type ParityR = crate::FieldReader; +impl ParityR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PARITY_A::NONE), - 2 => Some(PARITY_A::EVEN), - 3 => Some(PARITY_A::ODD), + 0 => Some(Parity::None), + 2 => Some(Parity::Even), + 3 => Some(Parity::Odd), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Parity bits are not used"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == PARITY_A::NONE + *self == Parity::None } - #[doc = "Checks if the value of the field is `EVEN`"] + #[doc = "Even parity are used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] pub fn is_even(&self) -> bool { - *self == PARITY_A::EVEN + *self == Parity::Even } - #[doc = "Checks if the value of the field is `ODD`"] + #[doc = "Odd parity is used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] pub fn is_odd(&self) -> bool { - *self == PARITY_A::ODD + *self == Parity::Odd } } #[doc = "Field `PARITY` writer - Parity-Bit Mode"] -pub type PARITY_W<'a, const O: u8> = crate::FieldWriter<'a, u32, FRAMECFG_SPEC, u8, PARITY_A, 2, O>; -impl<'a, const O: u8> PARITY_W<'a, O> { +pub type ParityW<'a, REG> = crate::FieldWriter<'a, REG, 2, Parity>; +impl<'a, REG> ParityW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Parity bits are not used"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(PARITY_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Parity::None) } #[doc = "Even parity are used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] - pub fn even(self) -> &'a mut W { - self.variant(PARITY_A::EVEN) + pub fn even(self) -> &'a mut crate::W { + self.variant(Parity::Even) } #[doc = "Odd parity is used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] - pub fn odd(self) -> &'a mut W { - self.variant(PARITY_A::ODD) + pub fn odd(self) -> &'a mut crate::W { + self.variant(Parity::Odd) } } -#[doc = "Field `STOPBITS` reader - Stop-Bit Mode"] -pub type STOPBITS_R = crate::FieldReader; #[doc = "Stop-Bit Mode\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STOPBITS_A { +pub enum Stopbits { #[doc = "0: The transmitter generates a half stop bit. Stop-bits are not verified by receiver"] - HALF = 0, + Half = 0, #[doc = "1: One stop bit is generated and verified"] - ONE = 1, + One = 1, #[doc = "2: The transmitter generates one and a half stop bit. The receiver verifies the first stop bit"] - ONEANDAHALF = 2, + Oneandahalf = 2, #[doc = "3: The transmitter generates two stop bits. The receiver checks the first stop-bit only"] - TWO = 3, + Two = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STOPBITS_A) -> Self { + fn from(variant: Stopbits) -> Self { variant as _ } } -impl STOPBITS_R { +impl crate::FieldSpec for Stopbits { + type Ux = u8; +} +impl crate::IsEnum for Stopbits {} +#[doc = "Field `STOPBITS` reader - Stop-Bit Mode"] +pub type StopbitsR = crate::FieldReader; +impl StopbitsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> STOPBITS_A { + pub const fn variant(&self) -> Stopbits { match self.bits { - 0 => STOPBITS_A::HALF, - 1 => STOPBITS_A::ONE, - 2 => STOPBITS_A::ONEANDAHALF, - 3 => STOPBITS_A::TWO, + 0 => Stopbits::Half, + 1 => Stopbits::One, + 2 => Stopbits::Oneandahalf, + 3 => Stopbits::Two, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `HALF`"] + #[doc = "The transmitter generates a half stop bit. Stop-bits are not verified by receiver"] #[inline(always)] pub fn is_half(&self) -> bool { - *self == STOPBITS_A::HALF + *self == Stopbits::Half } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "One stop bit is generated and verified"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == STOPBITS_A::ONE + *self == Stopbits::One } - #[doc = "Checks if the value of the field is `ONEANDAHALF`"] + #[doc = "The transmitter generates one and a half stop bit. The receiver verifies the first stop bit"] #[inline(always)] pub fn is_oneandahalf(&self) -> bool { - *self == STOPBITS_A::ONEANDAHALF + *self == Stopbits::Oneandahalf } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "The transmitter generates two stop bits. The receiver checks the first stop-bit only"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == STOPBITS_A::TWO + *self == Stopbits::Two } } #[doc = "Field `STOPBITS` writer - Stop-Bit Mode"] -pub type STOPBITS_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, FRAMECFG_SPEC, u8, STOPBITS_A, 2, O>; -impl<'a, const O: u8> STOPBITS_W<'a, O> { +pub type StopbitsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Stopbits, crate::Safe>; +impl<'a, REG> StopbitsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The transmitter generates a half stop bit. Stop-bits are not verified by receiver"] #[inline(always)] - pub fn half(self) -> &'a mut W { - self.variant(STOPBITS_A::HALF) + pub fn half(self) -> &'a mut crate::W { + self.variant(Stopbits::Half) } #[doc = "One stop bit is generated and verified"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(STOPBITS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Stopbits::One) } #[doc = "The transmitter generates one and a half stop bit. The receiver verifies the first stop bit"] #[inline(always)] - pub fn oneandahalf(self) -> &'a mut W { - self.variant(STOPBITS_A::ONEANDAHALF) + pub fn oneandahalf(self) -> &'a mut crate::W { + self.variant(Stopbits::Oneandahalf) } #[doc = "The transmitter generates two stop bits. The receiver checks the first stop-bit only"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(STOPBITS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Stopbits::Two) } } impl R { #[doc = "Bits 0:3 - Data-Bit Mode"] #[inline(always)] - pub fn databits(&self) -> DATABITS_R { - DATABITS_R::new((self.bits & 0x0f) as u8) + pub fn databits(&self) -> DatabitsR { + DatabitsR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - Parity-Bit Mode"] #[inline(always)] - pub fn parity(&self) -> PARITY_R { - PARITY_R::new(((self.bits >> 8) & 3) as u8) + pub fn parity(&self) -> ParityR { + ParityR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 12:13 - Stop-Bit Mode"] #[inline(always)] - pub fn stopbits(&self) -> STOPBITS_R { - STOPBITS_R::new(((self.bits >> 12) & 3) as u8) + pub fn stopbits(&self) -> StopbitsR { + StopbitsR::new(((self.bits >> 12) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - Data-Bit Mode"] #[inline(always)] #[must_use] - pub fn databits(&mut self) -> DATABITS_W<0> { - DATABITS_W::new(self) + pub fn databits(&mut self) -> DatabitsW { + DatabitsW::new(self, 0) } #[doc = "Bits 8:9 - Parity-Bit Mode"] #[inline(always)] #[must_use] - pub fn parity(&mut self) -> PARITY_W<8> { - PARITY_W::new(self) + pub fn parity(&mut self) -> ParityW { + ParityW::new(self, 8) } #[doc = "Bits 12:13 - Stop-Bit Mode"] #[inline(always)] #[must_use] - pub fn stopbits(&mut self) -> STOPBITS_W<12> { - STOPBITS_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stopbits(&mut self) -> StopbitsW { + StopbitsW::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [framecfg](index.html) module"] -pub struct FRAMECFG_SPEC; -impl crate::RegisterSpec for FRAMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`framecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`framecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct FramecfgSpec; +impl crate::RegisterSpec for FramecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [framecfg::R](R) reader structure"] -impl crate::Readable for FRAMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [framecfg::W](W) writer structure"] -impl crate::Writable for FRAMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`framecfg::R`](R) reader structure"] +impl crate::Readable for FramecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`framecfg::W`](W) writer structure"] +impl crate::Writable for FramecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FRAMECFG to value 0x1002"] -impl crate::Resettable for FRAMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0x1002; +impl crate::Resettable for FramecfgSpec { + const RESET_VALUE: u32 = 0x1002; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/ien.rs index 8013fa6..b81234b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/ien.rs @@ -1,335 +1,295 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXC` reader - TX Complete Enable"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXC` writer - TX Complete Enable"] -pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFL` reader - TX FIFO Level Enable"] -pub type TXFL_R = crate::BitReader; +pub type TxflR = crate::BitReader; #[doc = "Field `TXFL` writer - TX FIFO Level Enable"] -pub type TXFL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxflW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFL` reader - RX FIFO Level Enable"] -pub type RXFL_R = crate::BitReader; +pub type RxflR = crate::BitReader; #[doc = "Field `RXFL` writer - RX FIFO Level Enable"] -pub type RXFL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxflW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFULL` reader - RX FIFO Full Enable"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXFULL` writer - RX FIFO Full Enable"] -pub type RXFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxfullW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXOF` reader - RX FIFO Overflow Enable"] -pub type RXOF_R = crate::BitReader; +pub type RxofR = crate::BitReader; #[doc = "Field `RXOF` writer - RX FIFO Overflow Enable"] -pub type RXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUF` reader - RX FIFO Underflow Enable"] -pub type RXUF_R = crate::BitReader; +pub type RxufR = crate::BitReader; #[doc = "Field `RXUF` writer - RX FIFO Underflow Enable"] -pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXOF` reader - TX FIFO Overflow Enable"] -pub type TXOF_R = crate::BitReader; +pub type TxofR = crate::BitReader; #[doc = "Field `TXOF` writer - TX FIFO Overflow Enable"] -pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXUF` reader - TX FIFO Underflow Enable"] -pub type TXUF_R = crate::BitReader; +pub type TxufR = crate::BitReader; #[doc = "Field `TXUF` writer - TX FIFO Underflow Enable"] -pub type TXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PERR` reader - Parity Error Enable"] -pub type PERR_R = crate::BitReader; +pub type PerrR = crate::BitReader; #[doc = "Field `PERR` writer - Parity Error Enable"] -pub type PERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FERR` reader - Framing Error Enable"] -pub type FERR_R = crate::BitReader; +pub type FerrR = crate::BitReader; #[doc = "Field `FERR` writer - Framing Error Enable"] -pub type FERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPAF` reader - Multi-Processor Addr Frame Enable"] -pub type MPAF_R = crate::BitReader; +pub type MpafR = crate::BitReader; #[doc = "Field `MPAF` writer - Multi-Processor Addr Frame Enable"] -pub type MPAF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type MpafW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOADERR` reader - Load Error Enable"] -pub type LOADERR_R = crate::BitReader; +pub type LoaderrR = crate::BitReader; #[doc = "Field `LOADERR` writer - Load Error Enable"] -pub type LOADERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type LoaderrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCF` reader - Collision Check Fail Enable"] -pub type CCF_R = crate::BitReader; +pub type CcfR = crate::BitReader; #[doc = "Field `CCF` writer - Collision Check Fail Enable"] -pub type CCF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type CcfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXIDLE` reader - TX IDLE Enable"] -pub type TXIDLE_R = crate::BitReader; +pub type TxidleR = crate::BitReader; #[doc = "Field `TXIDLE` writer - TX IDLE Enable"] -pub type TXIDLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxidleW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STARTF` reader - Start Frame Enable"] -pub type STARTF_R = crate::BitReader; +pub type StartfR = crate::BitReader; #[doc = "Field `STARTF` writer - Start Frame Enable"] -pub type STARTF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type StartfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SIGF` reader - Signal Frame Enable"] -pub type SIGF_R = crate::BitReader; +pub type SigfR = crate::BitReader; #[doc = "Field `SIGF` writer - Signal Frame Enable"] -pub type SIGF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SigfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOBAUDDONE` reader - Auto Baud Complete Enable"] -pub type AUTOBAUDDONE_R = crate::BitReader; +pub type AutobauddoneR = crate::BitReader; #[doc = "Field `AUTOBAUDDONE` writer - Auto Baud Complete Enable"] -pub type AUTOBAUDDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AutobauddoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXTO` reader - RX Timeout Enable"] -pub type RXTO_R = crate::BitReader; +pub type RxtoR = crate::BitReader; #[doc = "Field `RXTO` writer - RX Timeout Enable"] -pub type RXTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxtoW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - TX Complete Enable"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new((self.bits & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - TX FIFO Level Enable"] #[inline(always)] - pub fn txfl(&self) -> TXFL_R { - TXFL_R::new(((self.bits >> 1) & 1) != 0) + pub fn txfl(&self) -> TxflR { + TxflR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RX FIFO Level Enable"] #[inline(always)] - pub fn rxfl(&self) -> RXFL_R { - RXFL_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxfl(&self) -> RxflR { + RxflR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - RX FIFO Full Enable"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - RX FIFO Overflow Enable"] #[inline(always)] - pub fn rxof(&self) -> RXOF_R { - RXOF_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxof(&self) -> RxofR { + RxofR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - RX FIFO Underflow Enable"] #[inline(always)] - pub fn rxuf(&self) -> RXUF_R { - RXUF_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxuf(&self) -> RxufR { + RxufR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX FIFO Overflow Enable"] #[inline(always)] - pub fn txof(&self) -> TXOF_R { - TXOF_R::new(((self.bits >> 6) & 1) != 0) + pub fn txof(&self) -> TxofR { + TxofR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - TX FIFO Underflow Enable"] #[inline(always)] - pub fn txuf(&self) -> TXUF_R { - TXUF_R::new(((self.bits >> 7) & 1) != 0) + pub fn txuf(&self) -> TxufR { + TxufR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Parity Error Enable"] #[inline(always)] - pub fn perr(&self) -> PERR_R { - PERR_R::new(((self.bits >> 8) & 1) != 0) + pub fn perr(&self) -> PerrR { + PerrR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Framing Error Enable"] #[inline(always)] - pub fn ferr(&self) -> FERR_R { - FERR_R::new(((self.bits >> 9) & 1) != 0) + pub fn ferr(&self) -> FerrR { + FerrR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Multi-Processor Addr Frame Enable"] #[inline(always)] - pub fn mpaf(&self) -> MPAF_R { - MPAF_R::new(((self.bits >> 10) & 1) != 0) + pub fn mpaf(&self) -> MpafR { + MpafR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Load Error Enable"] #[inline(always)] - pub fn loaderr(&self) -> LOADERR_R { - LOADERR_R::new(((self.bits >> 11) & 1) != 0) + pub fn loaderr(&self) -> LoaderrR { + LoaderrR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Collision Check Fail Enable"] #[inline(always)] - pub fn ccf(&self) -> CCF_R { - CCF_R::new(((self.bits >> 12) & 1) != 0) + pub fn ccf(&self) -> CcfR { + CcfR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - TX IDLE Enable"] #[inline(always)] - pub fn txidle(&self) -> TXIDLE_R { - TXIDLE_R::new(((self.bits >> 13) & 1) != 0) + pub fn txidle(&self) -> TxidleR { + TxidleR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 18 - Start Frame Enable"] #[inline(always)] - pub fn startf(&self) -> STARTF_R { - STARTF_R::new(((self.bits >> 18) & 1) != 0) + pub fn startf(&self) -> StartfR { + StartfR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Signal Frame Enable"] #[inline(always)] - pub fn sigf(&self) -> SIGF_R { - SIGF_R::new(((self.bits >> 19) & 1) != 0) + pub fn sigf(&self) -> SigfR { + SigfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 24 - Auto Baud Complete Enable"] #[inline(always)] - pub fn autobauddone(&self) -> AUTOBAUDDONE_R { - AUTOBAUDDONE_R::new(((self.bits >> 24) & 1) != 0) + pub fn autobauddone(&self) -> AutobauddoneR { + AutobauddoneR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - RX Timeout Enable"] #[inline(always)] - pub fn rxto(&self) -> RXTO_R { - RXTO_R::new(((self.bits >> 25) & 1) != 0) + pub fn rxto(&self) -> RxtoR { + RxtoR::new(((self.bits >> 25) & 1) != 0) } } impl W { #[doc = "Bit 0 - TX Complete Enable"] #[inline(always)] #[must_use] - pub fn txc(&mut self) -> TXC_W<0> { - TXC_W::new(self) + pub fn txc(&mut self) -> TxcW { + TxcW::new(self, 0) } #[doc = "Bit 1 - TX FIFO Level Enable"] #[inline(always)] #[must_use] - pub fn txfl(&mut self) -> TXFL_W<1> { - TXFL_W::new(self) + pub fn txfl(&mut self) -> TxflW { + TxflW::new(self, 1) } #[doc = "Bit 2 - RX FIFO Level Enable"] #[inline(always)] #[must_use] - pub fn rxfl(&mut self) -> RXFL_W<2> { - RXFL_W::new(self) + pub fn rxfl(&mut self) -> RxflW { + RxflW::new(self, 2) } #[doc = "Bit 3 - RX FIFO Full Enable"] #[inline(always)] #[must_use] - pub fn rxfull(&mut self) -> RXFULL_W<3> { - RXFULL_W::new(self) + pub fn rxfull(&mut self) -> RxfullW { + RxfullW::new(self, 3) } #[doc = "Bit 4 - RX FIFO Overflow Enable"] #[inline(always)] #[must_use] - pub fn rxof(&mut self) -> RXOF_W<4> { - RXOF_W::new(self) + pub fn rxof(&mut self) -> RxofW { + RxofW::new(self, 4) } #[doc = "Bit 5 - RX FIFO Underflow Enable"] #[inline(always)] #[must_use] - pub fn rxuf(&mut self) -> RXUF_W<5> { - RXUF_W::new(self) + pub fn rxuf(&mut self) -> RxufW { + RxufW::new(self, 5) } #[doc = "Bit 6 - TX FIFO Overflow Enable"] #[inline(always)] #[must_use] - pub fn txof(&mut self) -> TXOF_W<6> { - TXOF_W::new(self) + pub fn txof(&mut self) -> TxofW { + TxofW::new(self, 6) } #[doc = "Bit 7 - TX FIFO Underflow Enable"] #[inline(always)] #[must_use] - pub fn txuf(&mut self) -> TXUF_W<7> { - TXUF_W::new(self) + pub fn txuf(&mut self) -> TxufW { + TxufW::new(self, 7) } #[doc = "Bit 8 - Parity Error Enable"] #[inline(always)] #[must_use] - pub fn perr(&mut self) -> PERR_W<8> { - PERR_W::new(self) + pub fn perr(&mut self) -> PerrW { + PerrW::new(self, 8) } #[doc = "Bit 9 - Framing Error Enable"] #[inline(always)] #[must_use] - pub fn ferr(&mut self) -> FERR_W<9> { - FERR_W::new(self) + pub fn ferr(&mut self) -> FerrW { + FerrW::new(self, 9) } #[doc = "Bit 10 - Multi-Processor Addr Frame Enable"] #[inline(always)] #[must_use] - pub fn mpaf(&mut self) -> MPAF_W<10> { - MPAF_W::new(self) + pub fn mpaf(&mut self) -> MpafW { + MpafW::new(self, 10) } #[doc = "Bit 11 - Load Error Enable"] #[inline(always)] #[must_use] - pub fn loaderr(&mut self) -> LOADERR_W<11> { - LOADERR_W::new(self) + pub fn loaderr(&mut self) -> LoaderrW { + LoaderrW::new(self, 11) } #[doc = "Bit 12 - Collision Check Fail Enable"] #[inline(always)] #[must_use] - pub fn ccf(&mut self) -> CCF_W<12> { - CCF_W::new(self) + pub fn ccf(&mut self) -> CcfW { + CcfW::new(self, 12) } #[doc = "Bit 13 - TX IDLE Enable"] #[inline(always)] #[must_use] - pub fn txidle(&mut self) -> TXIDLE_W<13> { - TXIDLE_W::new(self) + pub fn txidle(&mut self) -> TxidleW { + TxidleW::new(self, 13) } #[doc = "Bit 18 - Start Frame Enable"] #[inline(always)] #[must_use] - pub fn startf(&mut self) -> STARTF_W<18> { - STARTF_W::new(self) + pub fn startf(&mut self) -> StartfW { + StartfW::new(self, 18) } #[doc = "Bit 19 - Signal Frame Enable"] #[inline(always)] #[must_use] - pub fn sigf(&mut self) -> SIGF_W<19> { - SIGF_W::new(self) + pub fn sigf(&mut self) -> SigfW { + SigfW::new(self, 19) } #[doc = "Bit 24 - Auto Baud Complete Enable"] #[inline(always)] #[must_use] - pub fn autobauddone(&mut self) -> AUTOBAUDDONE_W<24> { - AUTOBAUDDONE_W::new(self) + pub fn autobauddone(&mut self) -> AutobauddoneW { + AutobauddoneW::new(self, 24) } #[doc = "Bit 25 - RX Timeout Enable"] #[inline(always)] #[must_use] - pub fn rxto(&mut self) -> RXTO_W<25> { - RXTO_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rxto(&mut self) -> RxtoW { + RxtoW::new(self, 25) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/if_.rs index 75345eb..85b7d94 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/if_.rs @@ -1,335 +1,295 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXC` reader - TX Complete Interrupt Flag"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXC` writer - TX Complete Interrupt Flag"] -pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFL` reader - TX FIFO Level Interrupt Flag"] -pub type TXFL_R = crate::BitReader; +pub type TxflR = crate::BitReader; #[doc = "Field `TXFL` writer - TX FIFO Level Interrupt Flag"] -pub type TXFL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxflW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFL` reader - RX FIFO Level Interrupt Flag"] -pub type RXFL_R = crate::BitReader; +pub type RxflR = crate::BitReader; #[doc = "Field `RXFL` writer - RX FIFO Level Interrupt Flag"] -pub type RXFL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxflW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFULL` reader - RX FIFO Full Interrupt Flag"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXFULL` writer - RX FIFO Full Interrupt Flag"] -pub type RXFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxfullW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXOF` reader - RX FIFO Overflow Interrupt Flag"] -pub type RXOF_R = crate::BitReader; +pub type RxofR = crate::BitReader; #[doc = "Field `RXOF` writer - RX FIFO Overflow Interrupt Flag"] -pub type RXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUF` reader - RX FIFO Underflow Interrupt Flag"] -pub type RXUF_R = crate::BitReader; +pub type RxufR = crate::BitReader; #[doc = "Field `RXUF` writer - RX FIFO Underflow Interrupt Flag"] -pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXOF` reader - TX FIFO Overflow Interrupt Flag"] -pub type TXOF_R = crate::BitReader; +pub type TxofR = crate::BitReader; #[doc = "Field `TXOF` writer - TX FIFO Overflow Interrupt Flag"] -pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXUF` reader - TX FIFO Underflow Interrupt Flag"] -pub type TXUF_R = crate::BitReader; +pub type TxufR = crate::BitReader; #[doc = "Field `TXUF` writer - TX FIFO Underflow Interrupt Flag"] -pub type TXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PERR` reader - Parity Error Interrupt Flag"] -pub type PERR_R = crate::BitReader; +pub type PerrR = crate::BitReader; #[doc = "Field `PERR` writer - Parity Error Interrupt Flag"] -pub type PERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FERR` reader - Framing Error Interrupt Flag"] -pub type FERR_R = crate::BitReader; +pub type FerrR = crate::BitReader; #[doc = "Field `FERR` writer - Framing Error Interrupt Flag"] -pub type FERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPAF` reader - Multi-Processor Address Frame Interrupt"] -pub type MPAF_R = crate::BitReader; +pub type MpafR = crate::BitReader; #[doc = "Field `MPAF` writer - Multi-Processor Address Frame Interrupt"] -pub type MPAF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type MpafW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOADERR` reader - Load Error Interrupt Flag"] -pub type LOADERR_R = crate::BitReader; +pub type LoaderrR = crate::BitReader; #[doc = "Field `LOADERR` writer - Load Error Interrupt Flag"] -pub type LOADERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type LoaderrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCF` reader - Collision Check Fail Interrupt Flag"] -pub type CCF_R = crate::BitReader; +pub type CcfR = crate::BitReader; #[doc = "Field `CCF` writer - Collision Check Fail Interrupt Flag"] -pub type CCF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type CcfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXIDLE` reader - TX Idle Interrupt Flag"] -pub type TXIDLE_R = crate::BitReader; +pub type TxidleR = crate::BitReader; #[doc = "Field `TXIDLE` writer - TX Idle Interrupt Flag"] -pub type TXIDLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxidleW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STARTF` reader - Start Frame Interrupt Flag"] -pub type STARTF_R = crate::BitReader; +pub type StartfR = crate::BitReader; #[doc = "Field `STARTF` writer - Start Frame Interrupt Flag"] -pub type STARTF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type StartfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SIGF` reader - Signal Frame Interrupt Flag"] -pub type SIGF_R = crate::BitReader; +pub type SigfR = crate::BitReader; #[doc = "Field `SIGF` writer - Signal Frame Interrupt Flag"] -pub type SIGF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SigfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOBAUDDONE` reader - Auto Baud Complete Interrupt Flag"] -pub type AUTOBAUDDONE_R = crate::BitReader; +pub type AutobauddoneR = crate::BitReader; #[doc = "Field `AUTOBAUDDONE` writer - Auto Baud Complete Interrupt Flag"] -pub type AUTOBAUDDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AutobauddoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXTO` reader - RX Timeout Interrupt Flag"] -pub type RXTO_R = crate::BitReader; +pub type RxtoR = crate::BitReader; #[doc = "Field `RXTO` writer - RX Timeout Interrupt Flag"] -pub type RXTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxtoW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - TX Complete Interrupt Flag"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new((self.bits & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - TX FIFO Level Interrupt Flag"] #[inline(always)] - pub fn txfl(&self) -> TXFL_R { - TXFL_R::new(((self.bits >> 1) & 1) != 0) + pub fn txfl(&self) -> TxflR { + TxflR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RX FIFO Level Interrupt Flag"] #[inline(always)] - pub fn rxfl(&self) -> RXFL_R { - RXFL_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxfl(&self) -> RxflR { + RxflR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - RX FIFO Full Interrupt Flag"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - RX FIFO Overflow Interrupt Flag"] #[inline(always)] - pub fn rxof(&self) -> RXOF_R { - RXOF_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxof(&self) -> RxofR { + RxofR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - RX FIFO Underflow Interrupt Flag"] #[inline(always)] - pub fn rxuf(&self) -> RXUF_R { - RXUF_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxuf(&self) -> RxufR { + RxufR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX FIFO Overflow Interrupt Flag"] #[inline(always)] - pub fn txof(&self) -> TXOF_R { - TXOF_R::new(((self.bits >> 6) & 1) != 0) + pub fn txof(&self) -> TxofR { + TxofR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - TX FIFO Underflow Interrupt Flag"] #[inline(always)] - pub fn txuf(&self) -> TXUF_R { - TXUF_R::new(((self.bits >> 7) & 1) != 0) + pub fn txuf(&self) -> TxufR { + TxufR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Parity Error Interrupt Flag"] #[inline(always)] - pub fn perr(&self) -> PERR_R { - PERR_R::new(((self.bits >> 8) & 1) != 0) + pub fn perr(&self) -> PerrR { + PerrR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Framing Error Interrupt Flag"] #[inline(always)] - pub fn ferr(&self) -> FERR_R { - FERR_R::new(((self.bits >> 9) & 1) != 0) + pub fn ferr(&self) -> FerrR { + FerrR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Multi-Processor Address Frame Interrupt"] #[inline(always)] - pub fn mpaf(&self) -> MPAF_R { - MPAF_R::new(((self.bits >> 10) & 1) != 0) + pub fn mpaf(&self) -> MpafR { + MpafR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Load Error Interrupt Flag"] #[inline(always)] - pub fn loaderr(&self) -> LOADERR_R { - LOADERR_R::new(((self.bits >> 11) & 1) != 0) + pub fn loaderr(&self) -> LoaderrR { + LoaderrR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Collision Check Fail Interrupt Flag"] #[inline(always)] - pub fn ccf(&self) -> CCF_R { - CCF_R::new(((self.bits >> 12) & 1) != 0) + pub fn ccf(&self) -> CcfR { + CcfR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - TX Idle Interrupt Flag"] #[inline(always)] - pub fn txidle(&self) -> TXIDLE_R { - TXIDLE_R::new(((self.bits >> 13) & 1) != 0) + pub fn txidle(&self) -> TxidleR { + TxidleR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 18 - Start Frame Interrupt Flag"] #[inline(always)] - pub fn startf(&self) -> STARTF_R { - STARTF_R::new(((self.bits >> 18) & 1) != 0) + pub fn startf(&self) -> StartfR { + StartfR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Signal Frame Interrupt Flag"] #[inline(always)] - pub fn sigf(&self) -> SIGF_R { - SIGF_R::new(((self.bits >> 19) & 1) != 0) + pub fn sigf(&self) -> SigfR { + SigfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 24 - Auto Baud Complete Interrupt Flag"] #[inline(always)] - pub fn autobauddone(&self) -> AUTOBAUDDONE_R { - AUTOBAUDDONE_R::new(((self.bits >> 24) & 1) != 0) + pub fn autobauddone(&self) -> AutobauddoneR { + AutobauddoneR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - RX Timeout Interrupt Flag"] #[inline(always)] - pub fn rxto(&self) -> RXTO_R { - RXTO_R::new(((self.bits >> 25) & 1) != 0) + pub fn rxto(&self) -> RxtoR { + RxtoR::new(((self.bits >> 25) & 1) != 0) } } impl W { #[doc = "Bit 0 - TX Complete Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txc(&mut self) -> TXC_W<0> { - TXC_W::new(self) + pub fn txc(&mut self) -> TxcW { + TxcW::new(self, 0) } #[doc = "Bit 1 - TX FIFO Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txfl(&mut self) -> TXFL_W<1> { - TXFL_W::new(self) + pub fn txfl(&mut self) -> TxflW { + TxflW::new(self, 1) } #[doc = "Bit 2 - RX FIFO Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxfl(&mut self) -> RXFL_W<2> { - RXFL_W::new(self) + pub fn rxfl(&mut self) -> RxflW { + RxflW::new(self, 2) } #[doc = "Bit 3 - RX FIFO Full Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxfull(&mut self) -> RXFULL_W<3> { - RXFULL_W::new(self) + pub fn rxfull(&mut self) -> RxfullW { + RxfullW::new(self, 3) } #[doc = "Bit 4 - RX FIFO Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxof(&mut self) -> RXOF_W<4> { - RXOF_W::new(self) + pub fn rxof(&mut self) -> RxofW { + RxofW::new(self, 4) } #[doc = "Bit 5 - RX FIFO Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxuf(&mut self) -> RXUF_W<5> { - RXUF_W::new(self) + pub fn rxuf(&mut self) -> RxufW { + RxufW::new(self, 5) } #[doc = "Bit 6 - TX FIFO Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txof(&mut self) -> TXOF_W<6> { - TXOF_W::new(self) + pub fn txof(&mut self) -> TxofW { + TxofW::new(self, 6) } #[doc = "Bit 7 - TX FIFO Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txuf(&mut self) -> TXUF_W<7> { - TXUF_W::new(self) + pub fn txuf(&mut self) -> TxufW { + TxufW::new(self, 7) } #[doc = "Bit 8 - Parity Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn perr(&mut self) -> PERR_W<8> { - PERR_W::new(self) + pub fn perr(&mut self) -> PerrW { + PerrW::new(self, 8) } #[doc = "Bit 9 - Framing Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ferr(&mut self) -> FERR_W<9> { - FERR_W::new(self) + pub fn ferr(&mut self) -> FerrW { + FerrW::new(self, 9) } #[doc = "Bit 10 - Multi-Processor Address Frame Interrupt"] #[inline(always)] #[must_use] - pub fn mpaf(&mut self) -> MPAF_W<10> { - MPAF_W::new(self) + pub fn mpaf(&mut self) -> MpafW { + MpafW::new(self, 10) } #[doc = "Bit 11 - Load Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn loaderr(&mut self) -> LOADERR_W<11> { - LOADERR_W::new(self) + pub fn loaderr(&mut self) -> LoaderrW { + LoaderrW::new(self, 11) } #[doc = "Bit 12 - Collision Check Fail Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ccf(&mut self) -> CCF_W<12> { - CCF_W::new(self) + pub fn ccf(&mut self) -> CcfW { + CcfW::new(self, 12) } #[doc = "Bit 13 - TX Idle Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txidle(&mut self) -> TXIDLE_W<13> { - TXIDLE_W::new(self) + pub fn txidle(&mut self) -> TxidleW { + TxidleW::new(self, 13) } #[doc = "Bit 18 - Start Frame Interrupt Flag"] #[inline(always)] #[must_use] - pub fn startf(&mut self) -> STARTF_W<18> { - STARTF_W::new(self) + pub fn startf(&mut self) -> StartfW { + StartfW::new(self, 18) } #[doc = "Bit 19 - Signal Frame Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sigf(&mut self) -> SIGF_W<19> { - SIGF_W::new(self) + pub fn sigf(&mut self) -> SigfW { + SigfW::new(self, 19) } #[doc = "Bit 24 - Auto Baud Complete Interrupt Flag"] #[inline(always)] #[must_use] - pub fn autobauddone(&mut self) -> AUTOBAUDDONE_W<24> { - AUTOBAUDDONE_W::new(self) + pub fn autobauddone(&mut self) -> AutobauddoneW { + AutobauddoneW::new(self, 24) } #[doc = "Bit 25 - RX Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxto(&mut self) -> RXTO_W<25> { - RXTO_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rxto(&mut self) -> RxtoW { + RxtoW::new(self, 25) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/ipversion.rs index 85cb381..0068345 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/irhfcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/irhfcfg.rs index 5216f33..2e61f42 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/irhfcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/irhfcfg.rs @@ -1,231 +1,201 @@ #[doc = "Register `IRHFCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IRHFCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `IRHFEN` reader - Enable IrDA Module"] -pub type IRHFEN_R = crate::BitReader; +pub type IrhfenR = crate::BitReader; #[doc = "Field `IRHFEN` writer - Enable IrDA Module"] -pub type IRHFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRHFCFG_SPEC, bool, O>; -#[doc = "Field `IRHFPW` reader - IrDA TX Pulse Width"] -pub type IRHFPW_R = crate::FieldReader; +pub type IrhfenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "IrDA TX Pulse Width\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum IRHFPW_A { +pub enum Irhfpw { #[doc = "0: IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1"] - ONE = 0, + One = 0, #[doc = "1: IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1"] - TWO = 1, + Two = 1, #[doc = "2: IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1"] - THREE = 2, + Three = 2, #[doc = "3: IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1"] - FOUR = 3, + Four = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: IRHFPW_A) -> Self { + fn from(variant: Irhfpw) -> Self { variant as _ } } -impl IRHFPW_R { +impl crate::FieldSpec for Irhfpw { + type Ux = u8; +} +impl crate::IsEnum for Irhfpw {} +#[doc = "Field `IRHFPW` reader - IrDA TX Pulse Width"] +pub type IrhfpwR = crate::FieldReader; +impl IrhfpwR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> IRHFPW_A { + pub const fn variant(&self) -> Irhfpw { match self.bits { - 0 => IRHFPW_A::ONE, - 1 => IRHFPW_A::TWO, - 2 => IRHFPW_A::THREE, - 3 => IRHFPW_A::FOUR, + 0 => Irhfpw::One, + 1 => Irhfpw::Two, + 2 => Irhfpw::Three, + 3 => Irhfpw::Four, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == IRHFPW_A::ONE + *self == Irhfpw::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == IRHFPW_A::TWO + *self == Irhfpw::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == IRHFPW_A::THREE + *self == Irhfpw::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == IRHFPW_A::FOUR + *self == Irhfpw::Four } } #[doc = "Field `IRHFPW` writer - IrDA TX Pulse Width"] -pub type IRHFPW_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, IRHFCFG_SPEC, u8, IRHFPW_A, 2, O>; -impl<'a, const O: u8> IRHFPW_W<'a, O> { +pub type IrhfpwW<'a, REG> = crate::FieldWriter<'a, REG, 2, Irhfpw, crate::Safe>; +impl<'a, REG> IrhfpwW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(IRHFPW_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Irhfpw::One) } #[doc = "IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(IRHFPW_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Irhfpw::Two) } #[doc = "IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(IRHFPW_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Irhfpw::Three) } #[doc = "IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(IRHFPW_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Irhfpw::Four) } } -#[doc = "Field `IRHFFILT` reader - IrDA RX Filter"] -pub type IRHFFILT_R = crate::BitReader; #[doc = "IrDA RX Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IRHFFILT_A { +pub enum Irhffilt { #[doc = "0: No filter enabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Filter enabled. IrDA pulse must be high for at least 5 consecutive clock cycles to be detected"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IRHFFILT_A) -> Self { + fn from(variant: Irhffilt) -> Self { variant as u8 != 0 } } -impl IRHFFILT_R { +#[doc = "Field `IRHFFILT` reader - IrDA RX Filter"] +pub type IrhffiltR = crate::BitReader; +impl IrhffiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> IRHFFILT_A { + pub const fn variant(&self) -> Irhffilt { match self.bits { - false => IRHFFILT_A::DISABLE, - true => IRHFFILT_A::ENABLE, + false => Irhffilt::Disable, + true => Irhffilt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "No filter enabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == IRHFFILT_A::DISABLE + *self == Irhffilt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Filter enabled. IrDA pulse must be high for at least 5 consecutive clock cycles to be detected"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == IRHFFILT_A::ENABLE + *self == Irhffilt::Enable } } #[doc = "Field `IRHFFILT` writer - IrDA RX Filter"] -pub type IRHFFILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRHFCFG_SPEC, IRHFFILT_A, O>; -impl<'a, const O: u8> IRHFFILT_W<'a, O> { +pub type IrhffiltW<'a, REG> = crate::BitWriter<'a, REG, Irhffilt>; +impl<'a, REG> IrhffiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No filter enabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(IRHFFILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Irhffilt::Disable) } #[doc = "Filter enabled. IrDA pulse must be high for at least 5 consecutive clock cycles to be detected"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(IRHFFILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Irhffilt::Enable) } } impl R { #[doc = "Bit 0 - Enable IrDA Module"] #[inline(always)] - pub fn irhfen(&self) -> IRHFEN_R { - IRHFEN_R::new((self.bits & 1) != 0) + pub fn irhfen(&self) -> IrhfenR { + IrhfenR::new((self.bits & 1) != 0) } #[doc = "Bits 1:2 - IrDA TX Pulse Width"] #[inline(always)] - pub fn irhfpw(&self) -> IRHFPW_R { - IRHFPW_R::new(((self.bits >> 1) & 3) as u8) + pub fn irhfpw(&self) -> IrhfpwR { + IrhfpwR::new(((self.bits >> 1) & 3) as u8) } #[doc = "Bit 3 - IrDA RX Filter"] #[inline(always)] - pub fn irhffilt(&self) -> IRHFFILT_R { - IRHFFILT_R::new(((self.bits >> 3) & 1) != 0) + pub fn irhffilt(&self) -> IrhffiltR { + IrhffiltR::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable IrDA Module"] #[inline(always)] #[must_use] - pub fn irhfen(&mut self) -> IRHFEN_W<0> { - IRHFEN_W::new(self) + pub fn irhfen(&mut self) -> IrhfenW { + IrhfenW::new(self, 0) } #[doc = "Bits 1:2 - IrDA TX Pulse Width"] #[inline(always)] #[must_use] - pub fn irhfpw(&mut self) -> IRHFPW_W<1> { - IRHFPW_W::new(self) + pub fn irhfpw(&mut self) -> IrhfpwW { + IrhfpwW::new(self, 1) } #[doc = "Bit 3 - IrDA RX Filter"] #[inline(always)] #[must_use] - pub fn irhffilt(&mut self) -> IRHFFILT_W<3> { - IRHFFILT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn irhffilt(&mut self) -> IrhffiltW { + IrhffiltW::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irhfcfg](index.html) module"] -pub struct IRHFCFG_SPEC; -impl crate::RegisterSpec for IRHFCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`irhfcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irhfcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrhfcfgSpec; +impl crate::RegisterSpec for IrhfcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [irhfcfg::R](R) reader structure"] -impl crate::Readable for IRHFCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [irhfcfg::W](W) writer structure"] -impl crate::Writable for IRHFCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`irhfcfg::R`](R) reader structure"] +impl crate::Readable for IrhfcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`irhfcfg::W`](W) writer structure"] +impl crate::Writable for IrhfcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRHFCFG to value 0"] -impl crate::Resettable for IRHFCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IrhfcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/rxdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/rxdata.rs index f2cf950..cb4530c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/rxdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/rxdata.rs @@ -1,37 +1,22 @@ #[doc = "Register `RXDATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATA` reader - RX Data and Control bits"] -pub type RXDATA_R = crate::FieldReader; +pub type RxdataR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - RX Data and Control bits"] #[inline(always)] - pub fn rxdata(&self) -> RXDATA_R { - RXDATA_R::new((self.bits & 0xffff) as u16) + pub fn rxdata(&self) -> RxdataR { + RxdataR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdata](index.html) module"] -pub struct RXDATA_SPEC; -impl crate::RegisterSpec for RXDATA_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdata::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdataSpec; +impl crate::RegisterSpec for RxdataSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdata::R](R) reader structure"] -impl crate::Readable for RXDATA_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdata::R`](R) reader structure"] +impl crate::Readable for RxdataSpec {} #[doc = "`reset()` method sets RXDATA to value 0"] -impl crate::Resettable for RXDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/rxdatap.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/rxdatap.rs index f78bc3c..b490a48 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/rxdatap.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/rxdatap.rs @@ -1,37 +1,22 @@ #[doc = "Register `RXDATAP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATAP` reader - RX Data Peek"] -pub type RXDATAP_R = crate::FieldReader; +pub type RxdatapR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - RX Data Peek"] #[inline(always)] - pub fn rxdatap(&self) -> RXDATAP_R { - RXDATAP_R::new((self.bits & 0xffff) as u16) + pub fn rxdatap(&self) -> RxdatapR { + RxdatapR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdatap](index.html) module"] -pub struct RXDATAP_SPEC; -impl crate::RegisterSpec for RXDATAP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdatap::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdatapSpec; +impl crate::RegisterSpec for RxdatapSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdatap::R](R) reader structure"] -impl crate::Readable for RXDATAP_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdatap::R`](R) reader structure"] +impl crate::Readable for RxdatapSpec {} #[doc = "`reset()` method sets RXDATAP to value 0"] -impl crate::Resettable for RXDATAP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdatapSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/sigframecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/sigframecfg.rs index 453819f..96b88c1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/sigframecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/sigframecfg.rs @@ -1,81 +1,40 @@ #[doc = "Register `SIGFRAMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SIGFRAMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SIGFRAME` reader - Signal Frame Value"] -pub type SIGFRAME_R = crate::FieldReader; +pub type SigframeR = crate::FieldReader; #[doc = "Field `SIGFRAME` writer - Signal Frame Value"] -pub type SIGFRAME_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SIGFRAMECFG_SPEC, u16, u16, 9, O>; +pub type SigframeW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; impl R { #[doc = "Bits 0:8 - Signal Frame Value"] #[inline(always)] - pub fn sigframe(&self) -> SIGFRAME_R { - SIGFRAME_R::new((self.bits & 0x01ff) as u16) + pub fn sigframe(&self) -> SigframeR { + SigframeR::new((self.bits & 0x01ff) as u16) } } impl W { #[doc = "Bits 0:8 - Signal Frame Value"] #[inline(always)] #[must_use] - pub fn sigframe(&mut self) -> SIGFRAME_W<0> { - SIGFRAME_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sigframe(&mut self) -> SigframeW { + SigframeW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sigframecfg](index.html) module"] -pub struct SIGFRAMECFG_SPEC; -impl crate::RegisterSpec for SIGFRAMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sigframecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sigframecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SigframecfgSpec; +impl crate::RegisterSpec for SigframecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [sigframecfg::R](R) reader structure"] -impl crate::Readable for SIGFRAMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sigframecfg::W](W) writer structure"] -impl crate::Writable for SIGFRAMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`sigframecfg::R`](R) reader structure"] +impl crate::Readable for SigframecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`sigframecfg::W`](W) writer structure"] +impl crate::Writable for SigframecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SIGFRAMECFG to value 0"] -impl crate::Resettable for SIGFRAMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SigframecfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/startframecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/startframecfg.rs index 44571b1..67dd6bf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/startframecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/startframecfg.rs @@ -1,81 +1,40 @@ #[doc = "Register `STARTFRAMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `STARTFRAMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `STARTFRAME` reader - Start Frame"] -pub type STARTFRAME_R = crate::FieldReader; +pub type StartframeR = crate::FieldReader; #[doc = "Field `STARTFRAME` writer - Start Frame"] -pub type STARTFRAME_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, STARTFRAMECFG_SPEC, u16, u16, 9, O>; +pub type StartframeW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; impl R { #[doc = "Bits 0:8 - Start Frame"] #[inline(always)] - pub fn startframe(&self) -> STARTFRAME_R { - STARTFRAME_R::new((self.bits & 0x01ff) as u16) + pub fn startframe(&self) -> StartframeR { + StartframeR::new((self.bits & 0x01ff) as u16) } } impl W { #[doc = "Bits 0:8 - Start Frame"] #[inline(always)] #[must_use] - pub fn startframe(&mut self) -> STARTFRAME_W<0> { - STARTFRAME_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn startframe(&mut self) -> StartframeW { + StartframeW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [startframecfg](index.html) module"] -pub struct STARTFRAMECFG_SPEC; -impl crate::RegisterSpec for STARTFRAMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`startframecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`startframecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StartframecfgSpec; +impl crate::RegisterSpec for StartframecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [startframecfg::R](R) reader structure"] -impl crate::Readable for STARTFRAMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [startframecfg::W](W) writer structure"] -impl crate::Writable for STARTFRAMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`startframecfg::R`](R) reader structure"] +impl crate::Readable for StartframecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`startframecfg::W`](W) writer structure"] +impl crate::Writable for StartframecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets STARTFRAMECFG to value 0"] -impl crate::Resettable for STARTFRAMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StartframecfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/status.rs index 3ad48a5..b418af7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/status.rs @@ -1,121 +1,106 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXENS` reader - Receiver Enable Status"] -pub type RXENS_R = crate::BitReader; +pub type RxensR = crate::BitReader; #[doc = "Field `TXENS` reader - Transmitter Enable Status"] -pub type TXENS_R = crate::BitReader; +pub type TxensR = crate::BitReader; #[doc = "Field `RXBLOCK` reader - Block Incoming Data"] -pub type RXBLOCK_R = crate::BitReader; +pub type RxblockR = crate::BitReader; #[doc = "Field `TXTRI` reader - Transmitter Tristated"] -pub type TXTRI_R = crate::BitReader; +pub type TxtriR = crate::BitReader; #[doc = "Field `TXC` reader - TX Complete"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXFL` reader - TX FIFO Level"] -pub type TXFL_R = crate::BitReader; +pub type TxflR = crate::BitReader; #[doc = "Field `RXFL` reader - RX FIFO Level"] -pub type RXFL_R = crate::BitReader; +pub type RxflR = crate::BitReader; #[doc = "Field `RXFULL` reader - RX FIFO Full"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXIDLE` reader - RX Idle"] -pub type RXIDLE_R = crate::BitReader; +pub type RxidleR = crate::BitReader; #[doc = "Field `TXIDLE` reader - TX Idle"] -pub type TXIDLE_R = crate::BitReader; +pub type TxidleR = crate::BitReader; #[doc = "Field `TXFCNT` reader - Valid entries in TX FIFO"] -pub type TXFCNT_R = crate::FieldReader; +pub type TxfcntR = crate::FieldReader; #[doc = "Field `AUTOBAUDDONE` reader - Auto Baud Rate Detection Completed"] -pub type AUTOBAUDDONE_R = crate::BitReader; +pub type AutobauddoneR = crate::BitReader; #[doc = "Field `CLEARTXBUSY` reader - TX FIFO Clear Busy"] -pub type CLEARTXBUSY_R = crate::BitReader; +pub type CleartxbusyR = crate::BitReader; impl R { #[doc = "Bit 0 - Receiver Enable Status"] #[inline(always)] - pub fn rxens(&self) -> RXENS_R { - RXENS_R::new((self.bits & 1) != 0) + pub fn rxens(&self) -> RxensR { + RxensR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transmitter Enable Status"] #[inline(always)] - pub fn txens(&self) -> TXENS_R { - TXENS_R::new(((self.bits >> 1) & 1) != 0) + pub fn txens(&self) -> TxensR { + TxensR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - Block Incoming Data"] #[inline(always)] - pub fn rxblock(&self) -> RXBLOCK_R { - RXBLOCK_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxblock(&self) -> RxblockR { + RxblockR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Transmitter Tristated"] #[inline(always)] - pub fn txtri(&self) -> TXTRI_R { - TXTRI_R::new(((self.bits >> 4) & 1) != 0) + pub fn txtri(&self) -> TxtriR { + TxtriR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - TX Complete"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new(((self.bits >> 5) & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX FIFO Level"] #[inline(always)] - pub fn txfl(&self) -> TXFL_R { - TXFL_R::new(((self.bits >> 6) & 1) != 0) + pub fn txfl(&self) -> TxflR { + TxflR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - RX FIFO Level"] #[inline(always)] - pub fn rxfl(&self) -> RXFL_R { - RXFL_R::new(((self.bits >> 7) & 1) != 0) + pub fn rxfl(&self) -> RxflR { + RxflR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - RX FIFO Full"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 8) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 12 - RX Idle"] #[inline(always)] - pub fn rxidle(&self) -> RXIDLE_R { - RXIDLE_R::new(((self.bits >> 12) & 1) != 0) + pub fn rxidle(&self) -> RxidleR { + RxidleR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - TX Idle"] #[inline(always)] - pub fn txidle(&self) -> TXIDLE_R { - TXIDLE_R::new(((self.bits >> 13) & 1) != 0) + pub fn txidle(&self) -> TxidleR { + TxidleR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bits 16:20 - Valid entries in TX FIFO"] #[inline(always)] - pub fn txfcnt(&self) -> TXFCNT_R { - TXFCNT_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn txfcnt(&self) -> TxfcntR { + TxfcntR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bit 24 - Auto Baud Rate Detection Completed"] #[inline(always)] - pub fn autobauddone(&self) -> AUTOBAUDDONE_R { - AUTOBAUDDONE_R::new(((self.bits >> 24) & 1) != 0) + pub fn autobauddone(&self) -> AutobauddoneR { + AutobauddoneR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - TX FIFO Clear Busy"] #[inline(always)] - pub fn cleartxbusy(&self) -> CLEARTXBUSY_R { - CLEARTXBUSY_R::new(((self.bits >> 25) & 1) != 0) + pub fn cleartxbusy(&self) -> CleartxbusyR { + CleartxbusyR::new(((self.bits >> 25) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0x3040"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0x3040; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0x3040; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/syncbusy.rs index 3190b02..713965c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/syncbusy.rs @@ -1,114 +1,99 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DIV` reader - SYNCBUSY for DIV in CLKDIV"] -pub type DIV_R = crate::BitReader; +pub type DivR = crate::BitReader; #[doc = "Field `RXTEN` reader - SYNCBUSY for RXTEN in TRIGCTRL"] -pub type RXTEN_R = crate::BitReader; +pub type RxtenR = crate::BitReader; #[doc = "Field `TXTEN` reader - SYNCBUSY for TXTEN in TRIGCTRL"] -pub type TXTEN_R = crate::BitReader; +pub type TxtenR = crate::BitReader; #[doc = "Field `RXEN` reader - SYNCBUSY for RXEN in CMD"] -pub type RXEN_R = crate::BitReader; +pub type RxenR = crate::BitReader; #[doc = "Field `RXDIS` reader - SYNCBUSY for RXDIS in CMD"] -pub type RXDIS_R = crate::BitReader; +pub type RxdisR = crate::BitReader; #[doc = "Field `TXEN` reader - SYNCBUSY for TXEN in CMD"] -pub type TXEN_R = crate::BitReader; +pub type TxenR = crate::BitReader; #[doc = "Field `TXDIS` reader - SYNCBUSY for TXDIS in CMD"] -pub type TXDIS_R = crate::BitReader; +pub type TxdisR = crate::BitReader; #[doc = "Field `RXBLOCKEN` reader - SYNCBUSY for RXBLOCKEN in CMD"] -pub type RXBLOCKEN_R = crate::BitReader; +pub type RxblockenR = crate::BitReader; #[doc = "Field `RXBLOCKDIS` reader - SYNCBUSY for RXBLOCKDIS in CMD"] -pub type RXBLOCKDIS_R = crate::BitReader; +pub type RxblockdisR = crate::BitReader; #[doc = "Field `TXTRIEN` reader - SYNCBUSY for TXTRIEN in CMD"] -pub type TXTRIEN_R = crate::BitReader; +pub type TxtrienR = crate::BitReader; #[doc = "Field `TXTRIDIS` reader - SYNCBUSY in TXTRIDIS in CMD"] -pub type TXTRIDIS_R = crate::BitReader; +pub type TxtridisR = crate::BitReader; #[doc = "Field `AUTOTXTEN` reader - SYNCBUSY for AUTOTXTEN in TRIGCTRL"] -pub type AUTOTXTEN_R = crate::BitReader; +pub type AutotxtenR = crate::BitReader; impl R { #[doc = "Bit 0 - SYNCBUSY for DIV in CLKDIV"] #[inline(always)] - pub fn div(&self) -> DIV_R { - DIV_R::new((self.bits & 1) != 0) + pub fn div(&self) -> DivR { + DivR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - SYNCBUSY for RXTEN in TRIGCTRL"] #[inline(always)] - pub fn rxten(&self) -> RXTEN_R { - RXTEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn rxten(&self) -> RxtenR { + RxtenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - SYNCBUSY for TXTEN in TRIGCTRL"] #[inline(always)] - pub fn txten(&self) -> TXTEN_R { - TXTEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn txten(&self) -> TxtenR { + TxtenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - SYNCBUSY for RXEN in CMD"] #[inline(always)] - pub fn rxen(&self) -> RXEN_R { - RXEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxen(&self) -> RxenR { + RxenR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - SYNCBUSY for RXDIS in CMD"] #[inline(always)] - pub fn rxdis(&self) -> RXDIS_R { - RXDIS_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxdis(&self) -> RxdisR { + RxdisR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - SYNCBUSY for TXEN in CMD"] #[inline(always)] - pub fn txen(&self) -> TXEN_R { - TXEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn txen(&self) -> TxenR { + TxenR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - SYNCBUSY for TXDIS in CMD"] #[inline(always)] - pub fn txdis(&self) -> TXDIS_R { - TXDIS_R::new(((self.bits >> 6) & 1) != 0) + pub fn txdis(&self) -> TxdisR { + TxdisR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - SYNCBUSY for RXBLOCKEN in CMD"] #[inline(always)] - pub fn rxblocken(&self) -> RXBLOCKEN_R { - RXBLOCKEN_R::new(((self.bits >> 7) & 1) != 0) + pub fn rxblocken(&self) -> RxblockenR { + RxblockenR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - SYNCBUSY for RXBLOCKDIS in CMD"] #[inline(always)] - pub fn rxblockdis(&self) -> RXBLOCKDIS_R { - RXBLOCKDIS_R::new(((self.bits >> 8) & 1) != 0) + pub fn rxblockdis(&self) -> RxblockdisR { + RxblockdisR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - SYNCBUSY for TXTRIEN in CMD"] #[inline(always)] - pub fn txtrien(&self) -> TXTRIEN_R { - TXTRIEN_R::new(((self.bits >> 9) & 1) != 0) + pub fn txtrien(&self) -> TxtrienR { + TxtrienR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - SYNCBUSY in TXTRIDIS in CMD"] #[inline(always)] - pub fn txtridis(&self) -> TXTRIDIS_R { - TXTRIDIS_R::new(((self.bits >> 10) & 1) != 0) + pub fn txtridis(&self) -> TxtridisR { + TxtridisR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - SYNCBUSY for AUTOTXTEN in TRIGCTRL"] #[inline(always)] - pub fn autotxten(&self) -> AUTOTXTEN_R { - AUTOTXTEN_R::new(((self.bits >> 11) & 1) != 0) + pub fn autotxten(&self) -> AutotxtenR { + AutotxtenR::new(((self.bits >> 11) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/timingcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/timingcfg.rs index ba30f19..8c1ed53 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/timingcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/timingcfg.rs @@ -1,595 +1,584 @@ #[doc = "Register `TIMINGCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMINGCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `TXDELAY` reader - TX Delay Transmission"] -pub type TXDELAY_R = crate::FieldReader; +pub type W = crate::W; #[doc = "TX Delay Transmission\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TXDELAY_A { +pub enum Txdelay { #[doc = "0: Frames are transmitted immediately."] - NONE = 0, + None = 0, #[doc = "1: Transmission of new frames is delayed by a single bit period."] - SINGLE = 1, + Single = 1, #[doc = "2: Transmission of new frames is delayed by a two bit periods."] - DOUBLE = 2, + Double = 2, #[doc = "3: Transmission of new frames is delayed by a three bit periods."] - TRIPPLE = 3, + Tripple = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TXDELAY_A) -> Self { + fn from(variant: Txdelay) -> Self { variant as _ } } -impl TXDELAY_R { +impl crate::FieldSpec for Txdelay { + type Ux = u8; +} +impl crate::IsEnum for Txdelay {} +#[doc = "Field `TXDELAY` reader - TX Delay Transmission"] +pub type TxdelayR = crate::FieldReader; +impl TxdelayR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXDELAY_A { + pub const fn variant(&self) -> Txdelay { match self.bits { - 0 => TXDELAY_A::NONE, - 1 => TXDELAY_A::SINGLE, - 2 => TXDELAY_A::DOUBLE, - 3 => TXDELAY_A::TRIPPLE, + 0 => Txdelay::None, + 1 => Txdelay::Single, + 2 => Txdelay::Double, + 3 => Txdelay::Tripple, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Frames are transmitted immediately."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == TXDELAY_A::NONE + *self == Txdelay::None } - #[doc = "Checks if the value of the field is `SINGLE`"] + #[doc = "Transmission of new frames is delayed by a single bit period."] #[inline(always)] pub fn is_single(&self) -> bool { - *self == TXDELAY_A::SINGLE + *self == Txdelay::Single } - #[doc = "Checks if the value of the field is `DOUBLE`"] + #[doc = "Transmission of new frames is delayed by a two bit periods."] #[inline(always)] pub fn is_double(&self) -> bool { - *self == TXDELAY_A::DOUBLE + *self == Txdelay::Double } - #[doc = "Checks if the value of the field is `TRIPPLE`"] + #[doc = "Transmission of new frames is delayed by a three bit periods."] #[inline(always)] pub fn is_tripple(&self) -> bool { - *self == TXDELAY_A::TRIPPLE + *self == Txdelay::Tripple } } #[doc = "Field `TXDELAY` writer - TX Delay Transmission"] -pub type TXDELAY_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, TIMINGCFG_SPEC, u8, TXDELAY_A, 2, O>; -impl<'a, const O: u8> TXDELAY_W<'a, O> { +pub type TxdelayW<'a, REG> = crate::FieldWriter<'a, REG, 2, Txdelay, crate::Safe>; +impl<'a, REG> TxdelayW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Frames are transmitted immediately."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(TXDELAY_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Txdelay::None) } #[doc = "Transmission of new frames is delayed by a single bit period."] #[inline(always)] - pub fn single(self) -> &'a mut W { - self.variant(TXDELAY_A::SINGLE) + pub fn single(self) -> &'a mut crate::W { + self.variant(Txdelay::Single) } #[doc = "Transmission of new frames is delayed by a two bit periods."] #[inline(always)] - pub fn double(self) -> &'a mut W { - self.variant(TXDELAY_A::DOUBLE) + pub fn double(self) -> &'a mut crate::W { + self.variant(Txdelay::Double) } #[doc = "Transmission of new frames is delayed by a three bit periods."] #[inline(always)] - pub fn tripple(self) -> &'a mut W { - self.variant(TXDELAY_A::TRIPPLE) + pub fn tripple(self) -> &'a mut crate::W { + self.variant(Txdelay::Tripple) } } -#[doc = "Field `CSSETUP` reader - Chip Select Setup"] -pub type CSSETUP_R = crate::FieldReader; #[doc = "Chip Select Setup\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CSSETUP_A { +pub enum Cssetup { #[doc = "0: CS is asserted half or 1 baud-time before the start of transmission depending on CLKPHASE equal to 1 or 0 respectively"] - ZERO = 0, + Zero = 0, #[doc = "1: CS is asserted 1 additional baud-time before start of transmission"] - ONE = 1, + One = 1, #[doc = "2: CS is asserted 2 additional baud-times before start of transmission"] - TWO = 2, + Two = 2, #[doc = "3: CS is asserted 3 additional baud-times before start of transmission"] - THREE = 3, + Three = 3, #[doc = "4: CS is asserted 4 additional baud-times before start of transmission"] - FOUR = 4, + Four = 4, #[doc = "5: CS is asserted 5 additional baud-times before start of transmission"] - FIVE = 5, + Five = 5, #[doc = "6: CS is asserted 6 additional baud-times before start of transmission"] - SIX = 6, + Six = 6, #[doc = "7: CS is asserted 7 additional baud-times before start of transmission"] - SEVEN = 7, + Seven = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CSSETUP_A) -> Self { + fn from(variant: Cssetup) -> Self { variant as _ } } -impl CSSETUP_R { +impl crate::FieldSpec for Cssetup { + type Ux = u8; +} +impl crate::IsEnum for Cssetup {} +#[doc = "Field `CSSETUP` reader - Chip Select Setup"] +pub type CssetupR = crate::FieldReader; +impl CssetupR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CSSETUP_A { + pub const fn variant(&self) -> Cssetup { match self.bits { - 0 => CSSETUP_A::ZERO, - 1 => CSSETUP_A::ONE, - 2 => CSSETUP_A::TWO, - 3 => CSSETUP_A::THREE, - 4 => CSSETUP_A::FOUR, - 5 => CSSETUP_A::FIVE, - 6 => CSSETUP_A::SIX, - 7 => CSSETUP_A::SEVEN, + 0 => Cssetup::Zero, + 1 => Cssetup::One, + 2 => Cssetup::Two, + 3 => Cssetup::Three, + 4 => Cssetup::Four, + 5 => Cssetup::Five, + 6 => Cssetup::Six, + 7 => Cssetup::Seven, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ZERO`"] + #[doc = "CS is asserted half or 1 baud-time before the start of transmission depending on CLKPHASE equal to 1 or 0 respectively"] #[inline(always)] pub fn is_zero(&self) -> bool { - *self == CSSETUP_A::ZERO + *self == Cssetup::Zero } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "CS is asserted 1 additional baud-time before start of transmission"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == CSSETUP_A::ONE + *self == Cssetup::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "CS is asserted 2 additional baud-times before start of transmission"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == CSSETUP_A::TWO + *self == Cssetup::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "CS is asserted 3 additional baud-times before start of transmission"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == CSSETUP_A::THREE + *self == Cssetup::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "CS is asserted 4 additional baud-times before start of transmission"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == CSSETUP_A::FOUR + *self == Cssetup::Four } - #[doc = "Checks if the value of the field is `FIVE`"] + #[doc = "CS is asserted 5 additional baud-times before start of transmission"] #[inline(always)] pub fn is_five(&self) -> bool { - *self == CSSETUP_A::FIVE + *self == Cssetup::Five } - #[doc = "Checks if the value of the field is `SIX`"] + #[doc = "CS is asserted 6 additional baud-times before start of transmission"] #[inline(always)] pub fn is_six(&self) -> bool { - *self == CSSETUP_A::SIX + *self == Cssetup::Six } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "CS is asserted 7 additional baud-times before start of transmission"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == CSSETUP_A::SEVEN + *self == Cssetup::Seven } } #[doc = "Field `CSSETUP` writer - Chip Select Setup"] -pub type CSSETUP_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, TIMINGCFG_SPEC, u8, CSSETUP_A, 3, O>; -impl<'a, const O: u8> CSSETUP_W<'a, O> { +pub type CssetupW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cssetup, crate::Safe>; +impl<'a, REG> CssetupW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "CS is asserted half or 1 baud-time before the start of transmission depending on CLKPHASE equal to 1 or 0 respectively"] #[inline(always)] - pub fn zero(self) -> &'a mut W { - self.variant(CSSETUP_A::ZERO) + pub fn zero(self) -> &'a mut crate::W { + self.variant(Cssetup::Zero) } #[doc = "CS is asserted 1 additional baud-time before start of transmission"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(CSSETUP_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Cssetup::One) } #[doc = "CS is asserted 2 additional baud-times before start of transmission"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(CSSETUP_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Cssetup::Two) } #[doc = "CS is asserted 3 additional baud-times before start of transmission"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(CSSETUP_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Cssetup::Three) } #[doc = "CS is asserted 4 additional baud-times before start of transmission"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(CSSETUP_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Cssetup::Four) } #[doc = "CS is asserted 5 additional baud-times before start of transmission"] #[inline(always)] - pub fn five(self) -> &'a mut W { - self.variant(CSSETUP_A::FIVE) + pub fn five(self) -> &'a mut crate::W { + self.variant(Cssetup::Five) } #[doc = "CS is asserted 6 additional baud-times before start of transmission"] #[inline(always)] - pub fn six(self) -> &'a mut W { - self.variant(CSSETUP_A::SIX) + pub fn six(self) -> &'a mut crate::W { + self.variant(Cssetup::Six) } #[doc = "CS is asserted 7 additional baud-times before start of transmission"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(CSSETUP_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Cssetup::Seven) } } -#[doc = "Field `CSHOLD` reader - Chip Select Hold"] -pub type CSHOLD_R = crate::FieldReader; #[doc = "Chip Select Hold\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CSHOLD_A { +pub enum Cshold { #[doc = "0: CS is de-asserted half or 1 baud-time after the end of transmission depending on CLKPHASE equal to 1 or 0 respectively"] - ZERO = 0, + Zero = 0, #[doc = "1: CS is de-asserted 1 additional baud-time after the end of transmission"] - ONE = 1, + One = 1, #[doc = "2: CS is de-asserted 2 additional baud-times after the end of transmission"] - TWO = 2, + Two = 2, #[doc = "3: CS is de-asserted 3 additional baud-times after the end of transmission"] - THREE = 3, + Three = 3, #[doc = "4: CS is de-asserted 4 additional baud-times after the end of transmission"] - FOUR = 4, + Four = 4, #[doc = "5: CS is de-asserted 5 additional baud-times after the end of transmission"] - FIVE = 5, + Five = 5, #[doc = "6: CS is de-asserted 6 additional baud-times after the end of transmission"] - SIX = 6, + Six = 6, #[doc = "7: CS is de-asserted 7 additional baud-times after the end of transmission"] - SEVEN = 7, + Seven = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CSHOLD_A) -> Self { + fn from(variant: Cshold) -> Self { variant as _ } } -impl CSHOLD_R { +impl crate::FieldSpec for Cshold { + type Ux = u8; +} +impl crate::IsEnum for Cshold {} +#[doc = "Field `CSHOLD` reader - Chip Select Hold"] +pub type CsholdR = crate::FieldReader; +impl CsholdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CSHOLD_A { + pub const fn variant(&self) -> Cshold { match self.bits { - 0 => CSHOLD_A::ZERO, - 1 => CSHOLD_A::ONE, - 2 => CSHOLD_A::TWO, - 3 => CSHOLD_A::THREE, - 4 => CSHOLD_A::FOUR, - 5 => CSHOLD_A::FIVE, - 6 => CSHOLD_A::SIX, - 7 => CSHOLD_A::SEVEN, + 0 => Cshold::Zero, + 1 => Cshold::One, + 2 => Cshold::Two, + 3 => Cshold::Three, + 4 => Cshold::Four, + 5 => Cshold::Five, + 6 => Cshold::Six, + 7 => Cshold::Seven, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ZERO`"] + #[doc = "CS is de-asserted half or 1 baud-time after the end of transmission depending on CLKPHASE equal to 1 or 0 respectively"] #[inline(always)] pub fn is_zero(&self) -> bool { - *self == CSHOLD_A::ZERO + *self == Cshold::Zero } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "CS is de-asserted 1 additional baud-time after the end of transmission"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == CSHOLD_A::ONE + *self == Cshold::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "CS is de-asserted 2 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == CSHOLD_A::TWO + *self == Cshold::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "CS is de-asserted 3 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == CSHOLD_A::THREE + *self == Cshold::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "CS is de-asserted 4 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == CSHOLD_A::FOUR + *self == Cshold::Four } - #[doc = "Checks if the value of the field is `FIVE`"] + #[doc = "CS is de-asserted 5 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_five(&self) -> bool { - *self == CSHOLD_A::FIVE + *self == Cshold::Five } - #[doc = "Checks if the value of the field is `SIX`"] + #[doc = "CS is de-asserted 6 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_six(&self) -> bool { - *self == CSHOLD_A::SIX + *self == Cshold::Six } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "CS is de-asserted 7 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == CSHOLD_A::SEVEN + *self == Cshold::Seven } } #[doc = "Field `CSHOLD` writer - Chip Select Hold"] -pub type CSHOLD_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, TIMINGCFG_SPEC, u8, CSHOLD_A, 3, O>; -impl<'a, const O: u8> CSHOLD_W<'a, O> { +pub type CsholdW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cshold, crate::Safe>; +impl<'a, REG> CsholdW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "CS is de-asserted half or 1 baud-time after the end of transmission depending on CLKPHASE equal to 1 or 0 respectively"] #[inline(always)] - pub fn zero(self) -> &'a mut W { - self.variant(CSHOLD_A::ZERO) + pub fn zero(self) -> &'a mut crate::W { + self.variant(Cshold::Zero) } #[doc = "CS is de-asserted 1 additional baud-time after the end of transmission"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(CSHOLD_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Cshold::One) } #[doc = "CS is de-asserted 2 additional baud-times after the end of transmission"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(CSHOLD_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Cshold::Two) } #[doc = "CS is de-asserted 3 additional baud-times after the end of transmission"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(CSHOLD_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Cshold::Three) } #[doc = "CS is de-asserted 4 additional baud-times after the end of transmission"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(CSHOLD_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Cshold::Four) } #[doc = "CS is de-asserted 5 additional baud-times after the end of transmission"] #[inline(always)] - pub fn five(self) -> &'a mut W { - self.variant(CSHOLD_A::FIVE) + pub fn five(self) -> &'a mut crate::W { + self.variant(Cshold::Five) } #[doc = "CS is de-asserted 6 additional baud-times after the end of transmission"] #[inline(always)] - pub fn six(self) -> &'a mut W { - self.variant(CSHOLD_A::SIX) + pub fn six(self) -> &'a mut crate::W { + self.variant(Cshold::Six) } #[doc = "CS is de-asserted 7 additional baud-times after the end of transmission"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(CSHOLD_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Cshold::Seven) } } -#[doc = "Field `ICS` reader - Inter-Character Spacing"] -pub type ICS_R = crate::FieldReader; #[doc = "Inter-Character Spacing\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICS_A { +pub enum Ics { #[doc = "0: There is no space between charcters"] - ZERO = 0, + Zero = 0, #[doc = "1: Create a space of 1 baud-times between frames"] - ONE = 1, + One = 1, #[doc = "2: Create a space of 2 baud-times between frames"] - TWO = 2, + Two = 2, #[doc = "3: Create a space of 3 baud-times between frames"] - THREE = 3, + Three = 3, #[doc = "4: Create a space of 4 baud-times between frames"] - FOUR = 4, + Four = 4, #[doc = "5: Create a space of 5 baud-times between frames"] - FIVE = 5, + Five = 5, #[doc = "6: Create a space of 6 baud-times between frames"] - SIX = 6, + Six = 6, #[doc = "7: Create a space of 7 baud-times between frames"] - SEVEN = 7, + Seven = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICS_A) -> Self { + fn from(variant: Ics) -> Self { variant as _ } } -impl ICS_R { +impl crate::FieldSpec for Ics { + type Ux = u8; +} +impl crate::IsEnum for Ics {} +#[doc = "Field `ICS` reader - Inter-Character Spacing"] +pub type IcsR = crate::FieldReader; +impl IcsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICS_A { + pub const fn variant(&self) -> Ics { match self.bits { - 0 => ICS_A::ZERO, - 1 => ICS_A::ONE, - 2 => ICS_A::TWO, - 3 => ICS_A::THREE, - 4 => ICS_A::FOUR, - 5 => ICS_A::FIVE, - 6 => ICS_A::SIX, - 7 => ICS_A::SEVEN, + 0 => Ics::Zero, + 1 => Ics::One, + 2 => Ics::Two, + 3 => Ics::Three, + 4 => Ics::Four, + 5 => Ics::Five, + 6 => Ics::Six, + 7 => Ics::Seven, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ZERO`"] + #[doc = "There is no space between charcters"] #[inline(always)] pub fn is_zero(&self) -> bool { - *self == ICS_A::ZERO + *self == Ics::Zero } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Create a space of 1 baud-times between frames"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == ICS_A::ONE + *self == Ics::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Create a space of 2 baud-times between frames"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == ICS_A::TWO + *self == Ics::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "Create a space of 3 baud-times between frames"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == ICS_A::THREE + *self == Ics::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Create a space of 4 baud-times between frames"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == ICS_A::FOUR + *self == Ics::Four } - #[doc = "Checks if the value of the field is `FIVE`"] + #[doc = "Create a space of 5 baud-times between frames"] #[inline(always)] pub fn is_five(&self) -> bool { - *self == ICS_A::FIVE + *self == Ics::Five } - #[doc = "Checks if the value of the field is `SIX`"] + #[doc = "Create a space of 6 baud-times between frames"] #[inline(always)] pub fn is_six(&self) -> bool { - *self == ICS_A::SIX + *self == Ics::Six } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "Create a space of 7 baud-times between frames"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == ICS_A::SEVEN + *self == Ics::Seven } } #[doc = "Field `ICS` writer - Inter-Character Spacing"] -pub type ICS_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, TIMINGCFG_SPEC, u8, ICS_A, 3, O>; -impl<'a, const O: u8> ICS_W<'a, O> { +pub type IcsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Ics, crate::Safe>; +impl<'a, REG> IcsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "There is no space between charcters"] #[inline(always)] - pub fn zero(self) -> &'a mut W { - self.variant(ICS_A::ZERO) + pub fn zero(self) -> &'a mut crate::W { + self.variant(Ics::Zero) } #[doc = "Create a space of 1 baud-times between frames"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(ICS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Ics::One) } #[doc = "Create a space of 2 baud-times between frames"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(ICS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Ics::Two) } #[doc = "Create a space of 3 baud-times between frames"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(ICS_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Ics::Three) } #[doc = "Create a space of 4 baud-times between frames"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(ICS_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Ics::Four) } #[doc = "Create a space of 5 baud-times between frames"] #[inline(always)] - pub fn five(self) -> &'a mut W { - self.variant(ICS_A::FIVE) + pub fn five(self) -> &'a mut crate::W { + self.variant(Ics::Five) } #[doc = "Create a space of 6 baud-times between frames"] #[inline(always)] - pub fn six(self) -> &'a mut W { - self.variant(ICS_A::SIX) + pub fn six(self) -> &'a mut crate::W { + self.variant(Ics::Six) } #[doc = "Create a space of 7 baud-times between frames"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(ICS_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Ics::Seven) } } #[doc = "Field `SETUPWINDOW` reader - Setup Window"] -pub type SETUPWINDOW_R = crate::FieldReader; +pub type SetupwindowR = crate::FieldReader; #[doc = "Field `SETUPWINDOW` writer - Setup Window"] -pub type SETUPWINDOW_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMINGCFG_SPEC, u8, u8, 4, O>; +pub type SetupwindowW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - TX Delay Transmission"] #[inline(always)] - pub fn txdelay(&self) -> TXDELAY_R { - TXDELAY_R::new((self.bits & 3) as u8) + pub fn txdelay(&self) -> TxdelayR { + TxdelayR::new((self.bits & 3) as u8) } #[doc = "Bits 4:6 - Chip Select Setup"] #[inline(always)] - pub fn cssetup(&self) -> CSSETUP_R { - CSSETUP_R::new(((self.bits >> 4) & 7) as u8) + pub fn cssetup(&self) -> CssetupR { + CssetupR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Chip Select Hold"] #[inline(always)] - pub fn cshold(&self) -> CSHOLD_R { - CSHOLD_R::new(((self.bits >> 8) & 7) as u8) + pub fn cshold(&self) -> CsholdR { + CsholdR::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Inter-Character Spacing"] #[inline(always)] - pub fn ics(&self) -> ICS_R { - ICS_R::new(((self.bits >> 12) & 7) as u8) + pub fn ics(&self) -> IcsR { + IcsR::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:19 - Setup Window"] #[inline(always)] - pub fn setupwindow(&self) -> SETUPWINDOW_R { - SETUPWINDOW_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn setupwindow(&self) -> SetupwindowR { + SetupwindowR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - TX Delay Transmission"] #[inline(always)] #[must_use] - pub fn txdelay(&mut self) -> TXDELAY_W<0> { - TXDELAY_W::new(self) + pub fn txdelay(&mut self) -> TxdelayW { + TxdelayW::new(self, 0) } #[doc = "Bits 4:6 - Chip Select Setup"] #[inline(always)] #[must_use] - pub fn cssetup(&mut self) -> CSSETUP_W<4> { - CSSETUP_W::new(self) + pub fn cssetup(&mut self) -> CssetupW { + CssetupW::new(self, 4) } #[doc = "Bits 8:10 - Chip Select Hold"] #[inline(always)] #[must_use] - pub fn cshold(&mut self) -> CSHOLD_W<8> { - CSHOLD_W::new(self) + pub fn cshold(&mut self) -> CsholdW { + CsholdW::new(self, 8) } #[doc = "Bits 12:14 - Inter-Character Spacing"] #[inline(always)] #[must_use] - pub fn ics(&mut self) -> ICS_W<12> { - ICS_W::new(self) + pub fn ics(&mut self) -> IcsW { + IcsW::new(self, 12) } #[doc = "Bits 16:19 - Setup Window"] #[inline(always)] #[must_use] - pub fn setupwindow(&mut self) -> SETUPWINDOW_W<16> { - SETUPWINDOW_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn setupwindow(&mut self) -> SetupwindowW { + SetupwindowW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timingcfg](index.html) module"] -pub struct TIMINGCFG_SPEC; -impl crate::RegisterSpec for TIMINGCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timingcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timingcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TimingcfgSpec; +impl crate::RegisterSpec for TimingcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [timingcfg::R](R) reader structure"] -impl crate::Readable for TIMINGCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timingcfg::W](W) writer structure"] -impl crate::Writable for TIMINGCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timingcfg::R`](R) reader structure"] +impl crate::Readable for TimingcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`timingcfg::W`](W) writer structure"] +impl crate::Writable for TimingcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMINGCFG to value 0x0005_0000"] -impl crate::Resettable for TIMINGCFG_SPEC { - const RESET_VALUE: Self::Ux = 0x0005_0000; +impl crate::Resettable for TimingcfgSpec { + const RESET_VALUE: u32 = 0x0005_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/trigctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/trigctrl.rs index 6e5750d..4b0d8fe 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/trigctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/trigctrl.rs @@ -1,110 +1,70 @@ #[doc = "Register `TRIGCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TRIGCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RXTEN` reader - Receive Trigger Enable"] -pub type RXTEN_R = crate::BitReader; +pub type RxtenR = crate::BitReader; #[doc = "Field `RXTEN` writer - Receive Trigger Enable"] -pub type RXTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type RxtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTEN` reader - Transmit Trigger Enable"] -pub type TXTEN_R = crate::BitReader; +pub type TxtenR = crate::BitReader; #[doc = "Field `TXTEN` writer - Transmit Trigger Enable"] -pub type TXTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type TxtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOTXTEN` reader - AUTOTX Trigger Enable"] -pub type AUTOTXTEN_R = crate::BitReader; +pub type AutotxtenR = crate::BitReader; #[doc = "Field `AUTOTXTEN` writer - AUTOTX Trigger Enable"] -pub type AUTOTXTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type AutotxtenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Receive Trigger Enable"] #[inline(always)] - pub fn rxten(&self) -> RXTEN_R { - RXTEN_R::new((self.bits & 1) != 0) + pub fn rxten(&self) -> RxtenR { + RxtenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transmit Trigger Enable"] #[inline(always)] - pub fn txten(&self) -> TXTEN_R { - TXTEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn txten(&self) -> TxtenR { + TxtenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - AUTOTX Trigger Enable"] #[inline(always)] - pub fn autotxten(&self) -> AUTOTXTEN_R { - AUTOTXTEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn autotxten(&self) -> AutotxtenR { + AutotxtenR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Receive Trigger Enable"] #[inline(always)] #[must_use] - pub fn rxten(&mut self) -> RXTEN_W<0> { - RXTEN_W::new(self) + pub fn rxten(&mut self) -> RxtenW { + RxtenW::new(self, 0) } #[doc = "Bit 1 - Transmit Trigger Enable"] #[inline(always)] #[must_use] - pub fn txten(&mut self) -> TXTEN_W<1> { - TXTEN_W::new(self) + pub fn txten(&mut self) -> TxtenW { + TxtenW::new(self, 1) } #[doc = "Bit 2 - AUTOTX Trigger Enable"] #[inline(always)] #[must_use] - pub fn autotxten(&mut self) -> AUTOTXTEN_W<2> { - AUTOTXTEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn autotxten(&mut self) -> AutotxtenW { + AutotxtenW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [trigctrl](index.html) module"] -pub struct TRIGCTRL_SPEC; -impl crate::RegisterSpec for TRIGCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`trigctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trigctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TrigctrlSpec; +impl crate::RegisterSpec for TrigctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [trigctrl::R](R) reader structure"] -impl crate::Readable for TRIGCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [trigctrl::W](W) writer structure"] -impl crate::Writable for TRIGCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`trigctrl::R`](R) reader structure"] +impl crate::Readable for TrigctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`trigctrl::W`](W) writer structure"] +impl crate::Writable for TrigctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TRIGCTRL to value 0"] -impl crate::Resettable for TRIGCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TrigctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/txdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/txdata.rs index 5605e30..48b104b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/txdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_ns/txdata.rs @@ -1,52 +1,27 @@ #[doc = "Register `TXDATA` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXDATA` writer - TX Data and Control bits"] -pub type TXDATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDATA_SPEC, u16, u16, 16, O>; +pub type TxdataW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl W { #[doc = "Bits 0:15 - TX Data and Control bits"] #[inline(always)] #[must_use] - pub fn txdata(&mut self) -> TXDATA_W<0> { - TXDATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txdata(&mut self) -> TxdataW { + TxdataW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdata](index.html) module"] -pub struct TXDATA_SPEC; -impl crate::RegisterSpec for TXDATA_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdata::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxdataSpec; +impl crate::RegisterSpec for TxdataSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [txdata::W](W) writer structure"] -impl crate::Writable for TXDATA_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`txdata::W`](W) writer structure"] +impl crate::Writable for TxdataSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXDATA to value 0"] -impl crate::Resettable for TXDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s.rs index b5a3c22..61ca07b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s.rs @@ -1,131 +1,259 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + cfg0: Cfg0, + cfg1: Cfg1, + cfg2: Cfg2, + framecfg: Framecfg, + dtxdatcfg: Dtxdatcfg, + irhfcfg: Irhfcfg, + _reserved8: [u8; 0x04], + timingcfg: Timingcfg, + startframecfg: Startframecfg, + sigframecfg: Sigframecfg, + clkdiv: Clkdiv, + trigctrl: Trigctrl, + cmd: Cmd, + rxdata: Rxdata, + rxdatap: Rxdatap, + txdata: Txdata, + status: Status, + if_: If, + ien: Ien, + syncbusy: Syncbusy, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub cfg0: CFG0, + #[inline(always)] + pub const fn cfg0(&self) -> &Cfg0 { + &self.cfg0 + } #[doc = "0x0c - No Description"] - pub cfg1: CFG1, + #[inline(always)] + pub const fn cfg1(&self) -> &Cfg1 { + &self.cfg1 + } #[doc = "0x10 - No Description"] - pub cfg2: CFG2, + #[inline(always)] + pub const fn cfg2(&self) -> &Cfg2 { + &self.cfg2 + } #[doc = "0x14 - No Description"] - pub framecfg: FRAMECFG, + #[inline(always)] + pub const fn framecfg(&self) -> &Framecfg { + &self.framecfg + } #[doc = "0x18 - No Description"] - pub dtxdatcfg: DTXDATCFG, + #[inline(always)] + pub const fn dtxdatcfg(&self) -> &Dtxdatcfg { + &self.dtxdatcfg + } #[doc = "0x1c - No Description"] - pub irhfcfg: IRHFCFG, - _reserved8: [u8; 0x04], + #[inline(always)] + pub const fn irhfcfg(&self) -> &Irhfcfg { + &self.irhfcfg + } #[doc = "0x24 - No Description"] - pub timingcfg: TIMINGCFG, + #[inline(always)] + pub const fn timingcfg(&self) -> &Timingcfg { + &self.timingcfg + } #[doc = "0x28 - No Description"] - pub startframecfg: STARTFRAMECFG, + #[inline(always)] + pub const fn startframecfg(&self) -> &Startframecfg { + &self.startframecfg + } #[doc = "0x2c - No Description"] - pub sigframecfg: SIGFRAMECFG, + #[inline(always)] + pub const fn sigframecfg(&self) -> &Sigframecfg { + &self.sigframecfg + } #[doc = "0x30 - No Description"] - pub clkdiv: CLKDIV, + #[inline(always)] + pub const fn clkdiv(&self) -> &Clkdiv { + &self.clkdiv + } #[doc = "0x34 - No Description"] - pub trigctrl: TRIGCTRL, + #[inline(always)] + pub const fn trigctrl(&self) -> &Trigctrl { + &self.trigctrl + } #[doc = "0x38 - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x3c - No Description"] - pub rxdata: RXDATA, + #[inline(always)] + pub const fn rxdata(&self) -> &Rxdata { + &self.rxdata + } #[doc = "0x40 - No Description"] - pub rxdatap: RXDATAP, + #[inline(always)] + pub const fn rxdatap(&self) -> &Rxdatap { + &self.rxdatap + } #[doc = "0x44 - No Description"] - pub txdata: TXDATA, + #[inline(always)] + pub const fn txdata(&self) -> &Txdata { + &self.txdata + } #[doc = "0x48 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x4c - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x50 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x54 - No Description"] - pub syncbusy: SYNCBUSY, + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CFG0 (rw) register accessor: an alias for `Reg`"] -pub type CFG0 = crate::Reg; +#[doc = "CFG0 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg0`] +module"] +#[doc(alias = "CFG0")] +pub type Cfg0 = crate::Reg; #[doc = "No Description"] pub mod cfg0; -#[doc = "CFG1 (rw) register accessor: an alias for `Reg`"] -pub type CFG1 = crate::Reg; +#[doc = "CFG1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg1`] +module"] +#[doc(alias = "CFG1")] +pub type Cfg1 = crate::Reg; #[doc = "No Description"] pub mod cfg1; -#[doc = "CFG2 (rw) register accessor: an alias for `Reg`"] -pub type CFG2 = crate::Reg; +#[doc = "CFG2 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg2`] +module"] +#[doc(alias = "CFG2")] +pub type Cfg2 = crate::Reg; #[doc = "No Description"] pub mod cfg2; -#[doc = "FRAMECFG (rw) register accessor: an alias for `Reg`"] -pub type FRAMECFG = crate::Reg; +#[doc = "FRAMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`framecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`framecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@framecfg`] +module"] +#[doc(alias = "FRAMECFG")] +pub type Framecfg = crate::Reg; #[doc = "No Description"] pub mod framecfg; -#[doc = "DTXDATCFG (rw) register accessor: an alias for `Reg`"] -pub type DTXDATCFG = crate::Reg; +#[doc = "DTXDATCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtxdatcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtxdatcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtxdatcfg`] +module"] +#[doc(alias = "DTXDATCFG")] +pub type Dtxdatcfg = crate::Reg; #[doc = "No Description"] pub mod dtxdatcfg; -#[doc = "IRHFCFG (rw) register accessor: an alias for `Reg`"] -pub type IRHFCFG = crate::Reg; +#[doc = "IRHFCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`irhfcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irhfcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irhfcfg`] +module"] +#[doc(alias = "IRHFCFG")] +pub type Irhfcfg = crate::Reg; #[doc = "No Description"] pub mod irhfcfg; -#[doc = "TIMINGCFG (rw) register accessor: an alias for `Reg`"] -pub type TIMINGCFG = crate::Reg; +#[doc = "TIMINGCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timingcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timingcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timingcfg`] +module"] +#[doc(alias = "TIMINGCFG")] +pub type Timingcfg = crate::Reg; #[doc = "No Description"] pub mod timingcfg; -#[doc = "STARTFRAMECFG (rw) register accessor: an alias for `Reg`"] -pub type STARTFRAMECFG = crate::Reg; +#[doc = "STARTFRAMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`startframecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`startframecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@startframecfg`] +module"] +#[doc(alias = "STARTFRAMECFG")] +pub type Startframecfg = crate::Reg; #[doc = "No Description"] pub mod startframecfg; -#[doc = "SIGFRAMECFG (rw) register accessor: an alias for `Reg`"] -pub type SIGFRAMECFG = crate::Reg; +#[doc = "SIGFRAMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sigframecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sigframecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sigframecfg`] +module"] +#[doc(alias = "SIGFRAMECFG")] +pub type Sigframecfg = crate::Reg; #[doc = "No Description"] pub mod sigframecfg; -#[doc = "CLKDIV (rw) register accessor: an alias for `Reg`"] -pub type CLKDIV = crate::Reg; +#[doc = "CLKDIV (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv`] +module"] +#[doc(alias = "CLKDIV")] +pub type Clkdiv = crate::Reg; #[doc = "No Description"] pub mod clkdiv; -#[doc = "TRIGCTRL (rw) register accessor: an alias for `Reg`"] -pub type TRIGCTRL = crate::Reg; +#[doc = "TRIGCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`trigctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trigctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trigctrl`] +module"] +#[doc(alias = "TRIGCTRL")] +pub type Trigctrl = crate::Reg; #[doc = "No Description"] pub mod trigctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "RXDATA (r) register accessor: an alias for `Reg`"] -pub type RXDATA = crate::Reg; +#[doc = "RXDATA (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdata::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdata`] +module"] +#[doc(alias = "RXDATA")] +pub type Rxdata = crate::Reg; #[doc = "No Description"] pub mod rxdata; -#[doc = "RXDATAP (r) register accessor: an alias for `Reg`"] -pub type RXDATAP = crate::Reg; +#[doc = "RXDATAP (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdatap::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdatap`] +module"] +#[doc(alias = "RXDATAP")] +pub type Rxdatap = crate::Reg; #[doc = "No Description"] pub mod rxdatap; -#[doc = "TXDATA (w) register accessor: an alias for `Reg`"] -pub type TXDATA = crate::Reg; +#[doc = "TXDATA (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdata::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txdata`] +module"] +#[doc(alias = "TXDATA")] +pub type Txdata = crate::Reg; #[doc = "No Description"] pub mod txdata; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "No Description"] pub mod syncbusy; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/cfg0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/cfg0.rs index 89b67d3..f0c8da6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/cfg0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/cfg0.rs @@ -1,249 +1,227 @@ #[doc = "Register `CFG0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SYNC` reader - Synchronous Mode"] -pub type SYNC_R = crate::BitReader; +pub type W = crate::W; #[doc = "Synchronous Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYNC_A { +pub enum Sync { #[doc = "0: The EUSART operates in asynchronous mode"] - ASYNC = 0, + Async = 0, #[doc = "1: The EUSART operates in synchronous mode"] - SYNC = 1, + Sync = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYNC_A) -> Self { + fn from(variant: Sync) -> Self { variant as u8 != 0 } } -impl SYNC_R { +#[doc = "Field `SYNC` reader - Synchronous Mode"] +pub type SyncR = crate::BitReader; +impl SyncR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SYNC_A { + pub const fn variant(&self) -> Sync { match self.bits { - false => SYNC_A::ASYNC, - true => SYNC_A::SYNC, + false => Sync::Async, + true => Sync::Sync, } } - #[doc = "Checks if the value of the field is `ASYNC`"] + #[doc = "The EUSART operates in asynchronous mode"] #[inline(always)] pub fn is_async(&self) -> bool { - *self == SYNC_A::ASYNC + *self == Sync::Async } - #[doc = "Checks if the value of the field is `SYNC`"] + #[doc = "The EUSART operates in synchronous mode"] #[inline(always)] pub fn is_sync(&self) -> bool { - *self == SYNC_A::SYNC + *self == Sync::Sync } } #[doc = "Field `SYNC` writer - Synchronous Mode"] -pub type SYNC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, SYNC_A, O>; -impl<'a, const O: u8> SYNC_W<'a, O> { +pub type SyncW<'a, REG> = crate::BitWriter<'a, REG, Sync>; +impl<'a, REG> SyncW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The EUSART operates in asynchronous mode"] #[inline(always)] - pub fn async_(self) -> &'a mut W { - self.variant(SYNC_A::ASYNC) + pub fn async_(self) -> &'a mut crate::W { + self.variant(Sync::Async) } #[doc = "The EUSART operates in synchronous mode"] #[inline(always)] - pub fn sync(self) -> &'a mut W { - self.variant(SYNC_A::SYNC) + pub fn sync(self) -> &'a mut crate::W { + self.variant(Sync::Sync) } } -#[doc = "Field `LOOPBK` reader - Loopback Enable"] -pub type LOOPBK_R = crate::BitReader; #[doc = "Loopback Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOOPBK_A { +pub enum Loopbk { #[doc = "0: The receiver is connected to and receives data from UARTn_RX"] - DISABLE = 0, + Disable = 0, #[doc = "1: The receiver is connected to and receives data from UARTn_TX"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOOPBK_A) -> Self { + fn from(variant: Loopbk) -> Self { variant as u8 != 0 } } -impl LOOPBK_R { +#[doc = "Field `LOOPBK` reader - Loopback Enable"] +pub type LoopbkR = crate::BitReader; +impl LoopbkR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOOPBK_A { + pub const fn variant(&self) -> Loopbk { match self.bits { - false => LOOPBK_A::DISABLE, - true => LOOPBK_A::ENABLE, + false => Loopbk::Disable, + true => Loopbk::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The receiver is connected to and receives data from UARTn_RX"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == LOOPBK_A::DISABLE + *self == Loopbk::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The receiver is connected to and receives data from UARTn_TX"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == LOOPBK_A::ENABLE + *self == Loopbk::Enable } } #[doc = "Field `LOOPBK` writer - Loopback Enable"] -pub type LOOPBK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, LOOPBK_A, O>; -impl<'a, const O: u8> LOOPBK_W<'a, O> { +pub type LoopbkW<'a, REG> = crate::BitWriter<'a, REG, Loopbk>; +impl<'a, REG> LoopbkW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The receiver is connected to and receives data from UARTn_RX"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(LOOPBK_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Loopbk::Disable) } #[doc = "The receiver is connected to and receives data from UARTn_TX"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(LOOPBK_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Loopbk::Enable) } } -#[doc = "Field `CCEN` reader - Collision Check Enable"] -pub type CCEN_R = crate::BitReader; #[doc = "Collision Check Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCEN_A { +pub enum Ccen { #[doc = "0: Collision check is disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Collision check is enabled. The receiver must be enabled for the check to be performed"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCEN_A) -> Self { + fn from(variant: Ccen) -> Self { variant as u8 != 0 } } -impl CCEN_R { +#[doc = "Field `CCEN` reader - Collision Check Enable"] +pub type CcenR = crate::BitReader; +impl CcenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCEN_A { + pub const fn variant(&self) -> Ccen { match self.bits { - false => CCEN_A::DISABLE, - true => CCEN_A::ENABLE, + false => Ccen::Disable, + true => Ccen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Collision check is disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CCEN_A::DISABLE + *self == Ccen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Collision check is enabled. The receiver must be enabled for the check to be performed"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CCEN_A::ENABLE + *self == Ccen::Enable } } #[doc = "Field `CCEN` writer - Collision Check Enable"] -pub type CCEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, CCEN_A, O>; -impl<'a, const O: u8> CCEN_W<'a, O> { +pub type CcenW<'a, REG> = crate::BitWriter<'a, REG, Ccen>; +impl<'a, REG> CcenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Collision check is disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CCEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ccen::Disable) } #[doc = "Collision check is enabled. The receiver must be enabled for the check to be performed"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CCEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Ccen::Enable) } } -#[doc = "Field `MPM` reader - Multi-Processor Mode"] -pub type MPM_R = crate::BitReader; #[doc = "Multi-Processor Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MPM_A { +pub enum Mpm { #[doc = "0: The 9th bit of incoming frames has no special function"] - DISABLE = 0, + Disable = 0, #[doc = "1: An incoming frame with the 9th bit equal to MPAB will be loaded into the RX FIFO regardless of RXBLOCK and will result in the MPAB interrupt flag being set"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MPM_A) -> Self { + fn from(variant: Mpm) -> Self { variant as u8 != 0 } } -impl MPM_R { +#[doc = "Field `MPM` reader - Multi-Processor Mode"] +pub type MpmR = crate::BitReader; +impl MpmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MPM_A { + pub const fn variant(&self) -> Mpm { match self.bits { - false => MPM_A::DISABLE, - true => MPM_A::ENABLE, + false => Mpm::Disable, + true => Mpm::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The 9th bit of incoming frames has no special function"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == MPM_A::DISABLE + *self == Mpm::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "An incoming frame with the 9th bit equal to MPAB will be loaded into the RX FIFO regardless of RXBLOCK and will result in the MPAB interrupt flag being set"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == MPM_A::ENABLE + *self == Mpm::Enable } } #[doc = "Field `MPM` writer - Multi-Processor Mode"] -pub type MPM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, MPM_A, O>; -impl<'a, const O: u8> MPM_W<'a, O> { +pub type MpmW<'a, REG> = crate::BitWriter<'a, REG, Mpm>; +impl<'a, REG> MpmW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The 9th bit of incoming frames has no special function"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(MPM_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Mpm::Disable) } #[doc = "An incoming frame with the 9th bit equal to MPAB will be loaded into the RX FIFO regardless of RXBLOCK and will result in the MPAB interrupt flag being set"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(MPM_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Mpm::Enable) } } #[doc = "Field `MPAB` reader - Multi-Processor Address-Bit"] -pub type MPAB_R = crate::BitReader; +pub type MpabR = crate::BitReader; #[doc = "Field `MPAB` writer - Multi-Processor Address-Bit"] -pub type MPAB_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, O>; -#[doc = "Field `OVS` reader - Oversampling"] -pub type OVS_R = crate::FieldReader; +pub type MpabW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Oversampling\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum OVS_A { +pub enum Ovs { #[doc = "0: 16X oversampling"] X16 = 0, #[doc = "1: 8X oversampling"] @@ -253,646 +231,669 @@ pub enum OVS_A { #[doc = "3: 4X oversampling"] X4 = 3, #[doc = "4: Disable oversampling (for LF operation)"] - DISABLE = 4, + Disable = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: OVS_A) -> Self { + fn from(variant: Ovs) -> Self { variant as _ } } -impl OVS_R { +impl crate::FieldSpec for Ovs { + type Ux = u8; +} +impl crate::IsEnum for Ovs {} +#[doc = "Field `OVS` reader - Oversampling"] +pub type OvsR = crate::FieldReader; +impl OvsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(OVS_A::X16), - 1 => Some(OVS_A::X8), - 2 => Some(OVS_A::X6), - 3 => Some(OVS_A::X4), - 4 => Some(OVS_A::DISABLE), + 0 => Some(Ovs::X16), + 1 => Some(Ovs::X8), + 2 => Some(Ovs::X6), + 3 => Some(Ovs::X4), + 4 => Some(Ovs::Disable), _ => None, } } - #[doc = "Checks if the value of the field is `X16`"] + #[doc = "16X oversampling"] #[inline(always)] pub fn is_x16(&self) -> bool { - *self == OVS_A::X16 + *self == Ovs::X16 } - #[doc = "Checks if the value of the field is `X8`"] + #[doc = "8X oversampling"] #[inline(always)] pub fn is_x8(&self) -> bool { - *self == OVS_A::X8 + *self == Ovs::X8 } - #[doc = "Checks if the value of the field is `X6`"] + #[doc = "6X oversampling"] #[inline(always)] pub fn is_x6(&self) -> bool { - *self == OVS_A::X6 + *self == Ovs::X6 } - #[doc = "Checks if the value of the field is `X4`"] + #[doc = "4X oversampling"] #[inline(always)] pub fn is_x4(&self) -> bool { - *self == OVS_A::X4 + *self == Ovs::X4 } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable oversampling (for LF operation)"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == OVS_A::DISABLE + *self == Ovs::Disable } } #[doc = "Field `OVS` writer - Oversampling"] -pub type OVS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG0_SPEC, u8, OVS_A, 3, O>; -impl<'a, const O: u8> OVS_W<'a, O> { +pub type OvsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Ovs>; +impl<'a, REG> OvsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "16X oversampling"] #[inline(always)] - pub fn x16(self) -> &'a mut W { - self.variant(OVS_A::X16) + pub fn x16(self) -> &'a mut crate::W { + self.variant(Ovs::X16) } #[doc = "8X oversampling"] #[inline(always)] - pub fn x8(self) -> &'a mut W { - self.variant(OVS_A::X8) + pub fn x8(self) -> &'a mut crate::W { + self.variant(Ovs::X8) } #[doc = "6X oversampling"] #[inline(always)] - pub fn x6(self) -> &'a mut W { - self.variant(OVS_A::X6) + pub fn x6(self) -> &'a mut crate::W { + self.variant(Ovs::X6) } #[doc = "4X oversampling"] #[inline(always)] - pub fn x4(self) -> &'a mut W { - self.variant(OVS_A::X4) + pub fn x4(self) -> &'a mut crate::W { + self.variant(Ovs::X4) } #[doc = "Disable oversampling (for LF operation)"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(OVS_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ovs::Disable) } } -#[doc = "Field `MSBF` reader - Most Significant Bit First"] -pub type MSBF_R = crate::BitReader; #[doc = "Most Significant Bit First\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MSBF_A { +pub enum Msbf { #[doc = "0: Data is sent with the least significant bit first"] - DISABLE = 0, + Disable = 0, #[doc = "1: Data is sent with the most significant bit first"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MSBF_A) -> Self { + fn from(variant: Msbf) -> Self { variant as u8 != 0 } } -impl MSBF_R { +#[doc = "Field `MSBF` reader - Most Significant Bit First"] +pub type MsbfR = crate::BitReader; +impl MsbfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MSBF_A { + pub const fn variant(&self) -> Msbf { match self.bits { - false => MSBF_A::DISABLE, - true => MSBF_A::ENABLE, + false => Msbf::Disable, + true => Msbf::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Data is sent with the least significant bit first"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == MSBF_A::DISABLE + *self == Msbf::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Data is sent with the most significant bit first"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == MSBF_A::ENABLE + *self == Msbf::Enable } } #[doc = "Field `MSBF` writer - Most Significant Bit First"] -pub type MSBF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, MSBF_A, O>; -impl<'a, const O: u8> MSBF_W<'a, O> { +pub type MsbfW<'a, REG> = crate::BitWriter<'a, REG, Msbf>; +impl<'a, REG> MsbfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Data is sent with the least significant bit first"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(MSBF_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Msbf::Disable) } #[doc = "Data is sent with the most significant bit first"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(MSBF_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Msbf::Enable) } } -#[doc = "Field `RXINV` reader - Receiver Input Invert"] -pub type RXINV_R = crate::BitReader; #[doc = "Receiver Input Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RXINV_A { +pub enum Rxinv { #[doc = "0: Input is passed directly to the receiver"] - DISABLE = 0, + Disable = 0, #[doc = "1: Input is inverted before it is passed to the receiver"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RXINV_A) -> Self { + fn from(variant: Rxinv) -> Self { variant as u8 != 0 } } -impl RXINV_R { +#[doc = "Field `RXINV` reader - Receiver Input Invert"] +pub type RxinvR = crate::BitReader; +impl RxinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RXINV_A { + pub const fn variant(&self) -> Rxinv { match self.bits { - false => RXINV_A::DISABLE, - true => RXINV_A::ENABLE, + false => Rxinv::Disable, + true => Rxinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Input is passed directly to the receiver"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RXINV_A::DISABLE + *self == Rxinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Input is inverted before it is passed to the receiver"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RXINV_A::ENABLE + *self == Rxinv::Enable } } #[doc = "Field `RXINV` writer - Receiver Input Invert"] -pub type RXINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, RXINV_A, O>; -impl<'a, const O: u8> RXINV_W<'a, O> { +pub type RxinvW<'a, REG> = crate::BitWriter<'a, REG, Rxinv>; +impl<'a, REG> RxinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Input is passed directly to the receiver"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RXINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Rxinv::Disable) } #[doc = "Input is inverted before it is passed to the receiver"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RXINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Rxinv::Enable) } } -#[doc = "Field `TXINV` reader - Transmitter output Invert"] -pub type TXINV_R = crate::BitReader; #[doc = "Transmitter output Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TXINV_A { +pub enum Txinv { #[doc = "0: Output from the transmitter is passed unchanged to UARTn_TX"] - DISABLE = 0, + Disable = 0, #[doc = "1: Output from the transmitter is inverted before it is passed to UARTn_TX"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TXINV_A) -> Self { + fn from(variant: Txinv) -> Self { variant as u8 != 0 } } -impl TXINV_R { +#[doc = "Field `TXINV` reader - Transmitter output Invert"] +pub type TxinvR = crate::BitReader; +impl TxinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXINV_A { + pub const fn variant(&self) -> Txinv { match self.bits { - false => TXINV_A::DISABLE, - true => TXINV_A::ENABLE, + false => Txinv::Disable, + true => Txinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Output from the transmitter is passed unchanged to UARTn_TX"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == TXINV_A::DISABLE + *self == Txinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Output from the transmitter is inverted before it is passed to UARTn_TX"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == TXINV_A::ENABLE + *self == Txinv::Enable } } #[doc = "Field `TXINV` writer - Transmitter output Invert"] -pub type TXINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, TXINV_A, O>; -impl<'a, const O: u8> TXINV_W<'a, O> { +pub type TxinvW<'a, REG> = crate::BitWriter<'a, REG, Txinv>; +impl<'a, REG> TxinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Output from the transmitter is passed unchanged to UARTn_TX"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(TXINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Txinv::Disable) } #[doc = "Output from the transmitter is inverted before it is passed to UARTn_TX"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(TXINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Txinv::Enable) } } -#[doc = "Field `AUTOTRI` reader - Automatic TX Tristate"] -pub type AUTOTRI_R = crate::BitReader; #[doc = "Automatic TX Tristate\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AUTOTRI_A { +pub enum Autotri { #[doc = "0: The output on UARTn_TX when the transmitter is idle is defined by TXINV"] - DISABLE = 0, + Disable = 0, #[doc = "1: UARTn_TX is tristated whenever the transmitter is idle"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AUTOTRI_A) -> Self { + fn from(variant: Autotri) -> Self { variant as u8 != 0 } } -impl AUTOTRI_R { +#[doc = "Field `AUTOTRI` reader - Automatic TX Tristate"] +pub type AutotriR = crate::BitReader; +impl AutotriR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> AUTOTRI_A { + pub const fn variant(&self) -> Autotri { match self.bits { - false => AUTOTRI_A::DISABLE, - true => AUTOTRI_A::ENABLE, + false => Autotri::Disable, + true => Autotri::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The output on UARTn_TX when the transmitter is idle is defined by TXINV"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == AUTOTRI_A::DISABLE + *self == Autotri::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "UARTn_TX is tristated whenever the transmitter is idle"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == AUTOTRI_A::ENABLE + *self == Autotri::Enable } } #[doc = "Field `AUTOTRI` writer - Automatic TX Tristate"] -pub type AUTOTRI_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, AUTOTRI_A, O>; -impl<'a, const O: u8> AUTOTRI_W<'a, O> { +pub type AutotriW<'a, REG> = crate::BitWriter<'a, REG, Autotri>; +impl<'a, REG> AutotriW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The output on UARTn_TX when the transmitter is idle is defined by TXINV"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(AUTOTRI_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Autotri::Disable) } #[doc = "UARTn_TX is tristated whenever the transmitter is idle"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(AUTOTRI_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Autotri::Enable) } } #[doc = "Field `SKIPPERRF` reader - Skip Parity Error Frames"] -pub type SKIPPERRF_R = crate::BitReader; +pub type SkipperrfR = crate::BitReader; #[doc = "Field `SKIPPERRF` writer - Skip Parity Error Frames"] -pub type SKIPPERRF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, O>; -#[doc = "Field `ERRSDMA` reader - Halt DMA Read On Error"] -pub type ERRSDMA_R = crate::BitReader; +pub type SkipperrfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Halt DMA Read On Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRSDMA_A { +pub enum Errsdma { #[doc = "0: Framing and parity errors have no effect on DMA requests from the EUSART"] - DISABLE = 0, + Disable = 0, #[doc = "1: DMA requests from the EUSART are blocked while the PERR or FERR interrupt flags are set"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRSDMA_A) -> Self { + fn from(variant: Errsdma) -> Self { variant as u8 != 0 } } -impl ERRSDMA_R { +#[doc = "Field `ERRSDMA` reader - Halt DMA Read On Error"] +pub type ErrsdmaR = crate::BitReader; +impl ErrsdmaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ERRSDMA_A { + pub const fn variant(&self) -> Errsdma { match self.bits { - false => ERRSDMA_A::DISABLE, - true => ERRSDMA_A::ENABLE, + false => Errsdma::Disable, + true => Errsdma::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Framing and parity errors have no effect on DMA requests from the EUSART"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ERRSDMA_A::DISABLE + *self == Errsdma::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "DMA requests from the EUSART are blocked while the PERR or FERR interrupt flags are set"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ERRSDMA_A::ENABLE + *self == Errsdma::Enable } } #[doc = "Field `ERRSDMA` writer - Halt DMA Read On Error"] -pub type ERRSDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, ERRSDMA_A, O>; -impl<'a, const O: u8> ERRSDMA_W<'a, O> { +pub type ErrsdmaW<'a, REG> = crate::BitWriter<'a, REG, Errsdma>; +impl<'a, REG> ErrsdmaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Framing and parity errors have no effect on DMA requests from the EUSART"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ERRSDMA_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Errsdma::Disable) } #[doc = "DMA requests from the EUSART are blocked while the PERR or FERR interrupt flags are set"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ERRSDMA_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Errsdma::Enable) } } -#[doc = "Field `ERRSRX` reader - Disable RX On Error"] -pub type ERRSRX_R = crate::BitReader; #[doc = "Disable RX On Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRSRX_A { +pub enum Errsrx { #[doc = "0: Framing and parity errors have no effect on receiver"] - DISABLE = 0, + Disable = 0, #[doc = "1: Framing and parity errors disable the receiver"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRSRX_A) -> Self { + fn from(variant: Errsrx) -> Self { variant as u8 != 0 } } -impl ERRSRX_R { +#[doc = "Field `ERRSRX` reader - Disable RX On Error"] +pub type ErrsrxR = crate::BitReader; +impl ErrsrxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ERRSRX_A { + pub const fn variant(&self) -> Errsrx { match self.bits { - false => ERRSRX_A::DISABLE, - true => ERRSRX_A::ENABLE, + false => Errsrx::Disable, + true => Errsrx::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Framing and parity errors have no effect on receiver"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ERRSRX_A::DISABLE + *self == Errsrx::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Framing and parity errors disable the receiver"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ERRSRX_A::ENABLE + *self == Errsrx::Enable } } #[doc = "Field `ERRSRX` writer - Disable RX On Error"] -pub type ERRSRX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, ERRSRX_A, O>; -impl<'a, const O: u8> ERRSRX_W<'a, O> { +pub type ErrsrxW<'a, REG> = crate::BitWriter<'a, REG, Errsrx>; +impl<'a, REG> ErrsrxW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Framing and parity errors have no effect on receiver"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ERRSRX_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Errsrx::Disable) } #[doc = "Framing and parity errors disable the receiver"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ERRSRX_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Errsrx::Enable) } } -#[doc = "Field `ERRSTX` reader - Disable TX On Error"] -pub type ERRSTX_R = crate::BitReader; #[doc = "Disable TX On Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRSTX_A { +pub enum Errstx { #[doc = "0: Received framing and parity errors have no effect on transmitter"] - DISABLE = 0, + Disable = 0, #[doc = "1: Received framing and parity errors disable the transmitter"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRSTX_A) -> Self { + fn from(variant: Errstx) -> Self { variant as u8 != 0 } } -impl ERRSTX_R { +#[doc = "Field `ERRSTX` reader - Disable TX On Error"] +pub type ErrstxR = crate::BitReader; +impl ErrstxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ERRSTX_A { + pub const fn variant(&self) -> Errstx { match self.bits { - false => ERRSTX_A::DISABLE, - true => ERRSTX_A::ENABLE, + false => Errstx::Disable, + true => Errstx::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Received framing and parity errors have no effect on transmitter"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ERRSTX_A::DISABLE + *self == Errstx::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Received framing and parity errors disable the transmitter"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ERRSTX_A::ENABLE + *self == Errstx::Enable } } #[doc = "Field `ERRSTX` writer - Disable TX On Error"] -pub type ERRSTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, ERRSTX_A, O>; -impl<'a, const O: u8> ERRSTX_W<'a, O> { +pub type ErrstxW<'a, REG> = crate::BitWriter<'a, REG, Errstx>; +impl<'a, REG> ErrstxW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Received framing and parity errors have no effect on transmitter"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ERRSTX_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Errstx::Disable) } #[doc = "Received framing and parity errors disable the transmitter"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ERRSTX_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Errstx::Enable) } } #[doc = "Field `MVDIS` reader - Majority Vote Disable"] -pub type MVDIS_R = crate::BitReader; +pub type MvdisR = crate::BitReader; #[doc = "Field `MVDIS` writer - Majority Vote Disable"] -pub type MVDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, O>; +pub type MvdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOBAUDEN` reader - AUTOBAUD detection enable"] -pub type AUTOBAUDEN_R = crate::BitReader; +pub type AutobaudenR = crate::BitReader; #[doc = "Field `AUTOBAUDEN` writer - AUTOBAUD detection enable"] -pub type AUTOBAUDEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, O>; +pub type AutobaudenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Synchronous Mode"] #[inline(always)] - pub fn sync(&self) -> SYNC_R { - SYNC_R::new((self.bits & 1) != 0) + pub fn sync(&self) -> SyncR { + SyncR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Loopback Enable"] #[inline(always)] - pub fn loopbk(&self) -> LOOPBK_R { - LOOPBK_R::new(((self.bits >> 1) & 1) != 0) + pub fn loopbk(&self) -> LoopbkR { + LoopbkR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Collision Check Enable"] #[inline(always)] - pub fn ccen(&self) -> CCEN_R { - CCEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn ccen(&self) -> CcenR { + CcenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Multi-Processor Mode"] #[inline(always)] - pub fn mpm(&self) -> MPM_R { - MPM_R::new(((self.bits >> 3) & 1) != 0) + pub fn mpm(&self) -> MpmR { + MpmR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Multi-Processor Address-Bit"] #[inline(always)] - pub fn mpab(&self) -> MPAB_R { - MPAB_R::new(((self.bits >> 4) & 1) != 0) + pub fn mpab(&self) -> MpabR { + MpabR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 5:7 - Oversampling"] #[inline(always)] - pub fn ovs(&self) -> OVS_R { - OVS_R::new(((self.bits >> 5) & 7) as u8) + pub fn ovs(&self) -> OvsR { + OvsR::new(((self.bits >> 5) & 7) as u8) } #[doc = "Bit 10 - Most Significant Bit First"] #[inline(always)] - pub fn msbf(&self) -> MSBF_R { - MSBF_R::new(((self.bits >> 10) & 1) != 0) + pub fn msbf(&self) -> MsbfR { + MsbfR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 13 - Receiver Input Invert"] #[inline(always)] - pub fn rxinv(&self) -> RXINV_R { - RXINV_R::new(((self.bits >> 13) & 1) != 0) + pub fn rxinv(&self) -> RxinvR { + RxinvR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Transmitter output Invert"] #[inline(always)] - pub fn txinv(&self) -> TXINV_R { - TXINV_R::new(((self.bits >> 14) & 1) != 0) + pub fn txinv(&self) -> TxinvR { + TxinvR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 17 - Automatic TX Tristate"] #[inline(always)] - pub fn autotri(&self) -> AUTOTRI_R { - AUTOTRI_R::new(((self.bits >> 17) & 1) != 0) + pub fn autotri(&self) -> AutotriR { + AutotriR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 20 - Skip Parity Error Frames"] #[inline(always)] - pub fn skipperrf(&self) -> SKIPPERRF_R { - SKIPPERRF_R::new(((self.bits >> 20) & 1) != 0) + pub fn skipperrf(&self) -> SkipperrfR { + SkipperrfR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 22 - Halt DMA Read On Error"] #[inline(always)] - pub fn errsdma(&self) -> ERRSDMA_R { - ERRSDMA_R::new(((self.bits >> 22) & 1) != 0) + pub fn errsdma(&self) -> ErrsdmaR { + ErrsdmaR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Disable RX On Error"] #[inline(always)] - pub fn errsrx(&self) -> ERRSRX_R { - ERRSRX_R::new(((self.bits >> 23) & 1) != 0) + pub fn errsrx(&self) -> ErrsrxR { + ErrsrxR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - Disable TX On Error"] #[inline(always)] - pub fn errstx(&self) -> ERRSTX_R { - ERRSTX_R::new(((self.bits >> 24) & 1) != 0) + pub fn errstx(&self) -> ErrstxR { + ErrstxR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 30 - Majority Vote Disable"] #[inline(always)] - pub fn mvdis(&self) -> MVDIS_R { - MVDIS_R::new(((self.bits >> 30) & 1) != 0) + pub fn mvdis(&self) -> MvdisR { + MvdisR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - AUTOBAUD detection enable"] #[inline(always)] - pub fn autobauden(&self) -> AUTOBAUDEN_R { - AUTOBAUDEN_R::new(((self.bits >> 31) & 1) != 0) + pub fn autobauden(&self) -> AutobaudenR { + AutobaudenR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Synchronous Mode"] #[inline(always)] #[must_use] - pub fn sync(&mut self) -> SYNC_W<0> { - SYNC_W::new(self) + pub fn sync(&mut self) -> SyncW { + SyncW::new(self, 0) } #[doc = "Bit 1 - Loopback Enable"] #[inline(always)] #[must_use] - pub fn loopbk(&mut self) -> LOOPBK_W<1> { - LOOPBK_W::new(self) + pub fn loopbk(&mut self) -> LoopbkW { + LoopbkW::new(self, 1) } #[doc = "Bit 2 - Collision Check Enable"] #[inline(always)] #[must_use] - pub fn ccen(&mut self) -> CCEN_W<2> { - CCEN_W::new(self) + pub fn ccen(&mut self) -> CcenW { + CcenW::new(self, 2) } #[doc = "Bit 3 - Multi-Processor Mode"] #[inline(always)] #[must_use] - pub fn mpm(&mut self) -> MPM_W<3> { - MPM_W::new(self) + pub fn mpm(&mut self) -> MpmW { + MpmW::new(self, 3) } #[doc = "Bit 4 - Multi-Processor Address-Bit"] #[inline(always)] #[must_use] - pub fn mpab(&mut self) -> MPAB_W<4> { - MPAB_W::new(self) + pub fn mpab(&mut self) -> MpabW { + MpabW::new(self, 4) } #[doc = "Bits 5:7 - Oversampling"] #[inline(always)] #[must_use] - pub fn ovs(&mut self) -> OVS_W<5> { - OVS_W::new(self) + pub fn ovs(&mut self) -> OvsW { + OvsW::new(self, 5) } #[doc = "Bit 10 - Most Significant Bit First"] #[inline(always)] #[must_use] - pub fn msbf(&mut self) -> MSBF_W<10> { - MSBF_W::new(self) + pub fn msbf(&mut self) -> MsbfW { + MsbfW::new(self, 10) } #[doc = "Bit 13 - Receiver Input Invert"] #[inline(always)] #[must_use] - pub fn rxinv(&mut self) -> RXINV_W<13> { - RXINV_W::new(self) + pub fn rxinv(&mut self) -> RxinvW { + RxinvW::new(self, 13) } #[doc = "Bit 14 - Transmitter output Invert"] #[inline(always)] #[must_use] - pub fn txinv(&mut self) -> TXINV_W<14> { - TXINV_W::new(self) + pub fn txinv(&mut self) -> TxinvW { + TxinvW::new(self, 14) } #[doc = "Bit 17 - Automatic TX Tristate"] #[inline(always)] #[must_use] - pub fn autotri(&mut self) -> AUTOTRI_W<17> { - AUTOTRI_W::new(self) + pub fn autotri(&mut self) -> AutotriW { + AutotriW::new(self, 17) } #[doc = "Bit 20 - Skip Parity Error Frames"] #[inline(always)] #[must_use] - pub fn skipperrf(&mut self) -> SKIPPERRF_W<20> { - SKIPPERRF_W::new(self) + pub fn skipperrf(&mut self) -> SkipperrfW { + SkipperrfW::new(self, 20) } #[doc = "Bit 22 - Halt DMA Read On Error"] #[inline(always)] #[must_use] - pub fn errsdma(&mut self) -> ERRSDMA_W<22> { - ERRSDMA_W::new(self) + pub fn errsdma(&mut self) -> ErrsdmaW { + ErrsdmaW::new(self, 22) } #[doc = "Bit 23 - Disable RX On Error"] #[inline(always)] #[must_use] - pub fn errsrx(&mut self) -> ERRSRX_W<23> { - ERRSRX_W::new(self) + pub fn errsrx(&mut self) -> ErrsrxW { + ErrsrxW::new(self, 23) } #[doc = "Bit 24 - Disable TX On Error"] #[inline(always)] #[must_use] - pub fn errstx(&mut self) -> ERRSTX_W<24> { - ERRSTX_W::new(self) + pub fn errstx(&mut self) -> ErrstxW { + ErrstxW::new(self, 24) } #[doc = "Bit 30 - Majority Vote Disable"] #[inline(always)] #[must_use] - pub fn mvdis(&mut self) -> MVDIS_W<30> { - MVDIS_W::new(self) + pub fn mvdis(&mut self) -> MvdisW { + MvdisW::new(self, 30) } #[doc = "Bit 31 - AUTOBAUD detection enable"] #[inline(always)] #[must_use] - pub fn autobauden(&mut self) -> AUTOBAUDEN_W<31> { - AUTOBAUDEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn autobauden(&mut self) -> AutobaudenW { + AutobaudenW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg0](index.html) module"] -pub struct CFG0_SPEC; -impl crate::RegisterSpec for CFG0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cfg0Spec; +impl crate::RegisterSpec for Cfg0Spec { type Ux = u32; } -#[doc = "`read()` method returns [cfg0::R](R) reader structure"] -impl crate::Readable for CFG0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg0::W](W) writer structure"] -impl crate::Writable for CFG0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg0::R`](R) reader structure"] +impl crate::Readable for Cfg0Spec {} +#[doc = "`write(|w| ..)` method takes [`cfg0::W`](W) writer structure"] +impl crate::Writable for Cfg0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG0 to value 0"] -impl crate::Resettable for CFG0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cfg0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/cfg1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/cfg1.rs index 1607689..73dbb48 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/cfg1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/cfg1.rs @@ -1,1217 +1,1219 @@ #[doc = "Register `CFG1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DBGHALT` reader - Debug halt"] -pub type DBGHALT_R = crate::BitReader; +pub type W = crate::W; #[doc = "Debug halt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DBGHALT_A { +pub enum Dbghalt { #[doc = "0: Continue normal EUSART operation even if core is halted"] - DISABLE = 0, + Disable = 0, #[doc = "1: If core is halted, receive one frame and then halt reception by deactivating RTS. Next frame reception happens when the core is unhalted during single stepping."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DBGHALT_A) -> Self { + fn from(variant: Dbghalt) -> Self { variant as u8 != 0 } } -impl DBGHALT_R { +#[doc = "Field `DBGHALT` reader - Debug halt"] +pub type DbghaltR = crate::BitReader; +impl DbghaltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DBGHALT_A { + pub const fn variant(&self) -> Dbghalt { match self.bits { - false => DBGHALT_A::DISABLE, - true => DBGHALT_A::ENABLE, + false => Dbghalt::Disable, + true => Dbghalt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Continue normal EUSART operation even if core is halted"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == DBGHALT_A::DISABLE + *self == Dbghalt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "If core is halted, receive one frame and then halt reception by deactivating RTS. Next frame reception happens when the core is unhalted during single stepping."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == DBGHALT_A::ENABLE + *self == Dbghalt::Enable } } #[doc = "Field `DBGHALT` writer - Debug halt"] -pub type DBGHALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, DBGHALT_A, O>; -impl<'a, const O: u8> DBGHALT_W<'a, O> { +pub type DbghaltW<'a, REG> = crate::BitWriter<'a, REG, Dbghalt>; +impl<'a, REG> DbghaltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Continue normal EUSART operation even if core is halted"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(DBGHALT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Dbghalt::Disable) } #[doc = "If core is halted, receive one frame and then halt reception by deactivating RTS. Next frame reception happens when the core is unhalted during single stepping."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(DBGHALT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Dbghalt::Enable) } } -#[doc = "Field `CTSINV` reader - Clear-to-send Invert Enable"] -pub type CTSINV_R = crate::BitReader; #[doc = "Clear-to-send Invert Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CTSINV_A { +pub enum Ctsinv { #[doc = "0: The CTS pin is active low"] - DISABLE = 0, + Disable = 0, #[doc = "1: The CTS pin is active high"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CTSINV_A) -> Self { + fn from(variant: Ctsinv) -> Self { variant as u8 != 0 } } -impl CTSINV_R { +#[doc = "Field `CTSINV` reader - Clear-to-send Invert Enable"] +pub type CtsinvR = crate::BitReader; +impl CtsinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CTSINV_A { + pub const fn variant(&self) -> Ctsinv { match self.bits { - false => CTSINV_A::DISABLE, - true => CTSINV_A::ENABLE, + false => Ctsinv::Disable, + true => Ctsinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The CTS pin is active low"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CTSINV_A::DISABLE + *self == Ctsinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The CTS pin is active high"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CTSINV_A::ENABLE + *self == Ctsinv::Enable } } #[doc = "Field `CTSINV` writer - Clear-to-send Invert Enable"] -pub type CTSINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, CTSINV_A, O>; -impl<'a, const O: u8> CTSINV_W<'a, O> { +pub type CtsinvW<'a, REG> = crate::BitWriter<'a, REG, Ctsinv>; +impl<'a, REG> CtsinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The CTS pin is active low"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CTSINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ctsinv::Disable) } #[doc = "The CTS pin is active high"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CTSINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Ctsinv::Enable) } } -#[doc = "Field `CTSEN` reader - Clear-to-send Enable"] -pub type CTSEN_R = crate::BitReader; #[doc = "Clear-to-send Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CTSEN_A { +pub enum Ctsen { #[doc = "0: Ignore CTS"] - DISABLE = 0, + Disable = 0, #[doc = "1: Stop transmitting when CTS is inactive"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CTSEN_A) -> Self { + fn from(variant: Ctsen) -> Self { variant as u8 != 0 } } -impl CTSEN_R { +#[doc = "Field `CTSEN` reader - Clear-to-send Enable"] +pub type CtsenR = crate::BitReader; +impl CtsenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CTSEN_A { + pub const fn variant(&self) -> Ctsen { match self.bits { - false => CTSEN_A::DISABLE, - true => CTSEN_A::ENABLE, + false => Ctsen::Disable, + true => Ctsen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Ignore CTS"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CTSEN_A::DISABLE + *self == Ctsen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Stop transmitting when CTS is inactive"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CTSEN_A::ENABLE + *self == Ctsen::Enable } } #[doc = "Field `CTSEN` writer - Clear-to-send Enable"] -pub type CTSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, CTSEN_A, O>; -impl<'a, const O: u8> CTSEN_W<'a, O> { +pub type CtsenW<'a, REG> = crate::BitWriter<'a, REG, Ctsen>; +impl<'a, REG> CtsenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Ignore CTS"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CTSEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ctsen::Disable) } #[doc = "Stop transmitting when CTS is inactive"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CTSEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Ctsen::Enable) } } -#[doc = "Field `RTSINV` reader - Request-to-send Invert Enable"] -pub type RTSINV_R = crate::BitReader; #[doc = "Request-to-send Invert Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTSINV_A { +pub enum Rtsinv { #[doc = "0: The RTS pin is active low"] - DISABLE = 0, + Disable = 0, #[doc = "1: The RTS pin is active high"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTSINV_A) -> Self { + fn from(variant: Rtsinv) -> Self { variant as u8 != 0 } } -impl RTSINV_R { +#[doc = "Field `RTSINV` reader - Request-to-send Invert Enable"] +pub type RtsinvR = crate::BitReader; +impl RtsinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RTSINV_A { + pub const fn variant(&self) -> Rtsinv { match self.bits { - false => RTSINV_A::DISABLE, - true => RTSINV_A::ENABLE, + false => Rtsinv::Disable, + true => Rtsinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The RTS pin is active low"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RTSINV_A::DISABLE + *self == Rtsinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The RTS pin is active high"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RTSINV_A::ENABLE + *self == Rtsinv::Enable } } #[doc = "Field `RTSINV` writer - Request-to-send Invert Enable"] -pub type RTSINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, RTSINV_A, O>; -impl<'a, const O: u8> RTSINV_W<'a, O> { +pub type RtsinvW<'a, REG> = crate::BitWriter<'a, REG, Rtsinv>; +impl<'a, REG> RtsinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The RTS pin is active low"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RTSINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Rtsinv::Disable) } #[doc = "The RTS pin is active high"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RTSINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Rtsinv::Enable) } } -#[doc = "Field `RXTIMEOUT` reader - RX Timeout"] -pub type RXTIMEOUT_R = crate::FieldReader; #[doc = "RX Timeout\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RXTIMEOUT_A { +pub enum Rxtimeout { #[doc = "0: DISABLED"] - DISABLED = 0, + Disabled = 0, #[doc = "1: ONEFRAME"] - ONEFRAME = 1, + Oneframe = 1, #[doc = "2: TWOFRAMES"] - TWOFRAMES = 2, + Twoframes = 2, #[doc = "3: THREEFRAMES"] - THREEFRAMES = 3, + Threeframes = 3, #[doc = "4: FOURFRAMES"] - FOURFRAMES = 4, + Fourframes = 4, #[doc = "5: FIVEFRAMES"] - FIVEFRAMES = 5, + Fiveframes = 5, #[doc = "6: SIXFRAMES"] - SIXFRAMES = 6, + Sixframes = 6, #[doc = "7: SEVENFRAMES"] - SEVENFRAMES = 7, + Sevenframes = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RXTIMEOUT_A) -> Self { + fn from(variant: Rxtimeout) -> Self { variant as _ } } -impl RXTIMEOUT_R { +impl crate::FieldSpec for Rxtimeout { + type Ux = u8; +} +impl crate::IsEnum for Rxtimeout {} +#[doc = "Field `RXTIMEOUT` reader - RX Timeout"] +pub type RxtimeoutR = crate::FieldReader; +impl RxtimeoutR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RXTIMEOUT_A { + pub const fn variant(&self) -> Rxtimeout { match self.bits { - 0 => RXTIMEOUT_A::DISABLED, - 1 => RXTIMEOUT_A::ONEFRAME, - 2 => RXTIMEOUT_A::TWOFRAMES, - 3 => RXTIMEOUT_A::THREEFRAMES, - 4 => RXTIMEOUT_A::FOURFRAMES, - 5 => RXTIMEOUT_A::FIVEFRAMES, - 6 => RXTIMEOUT_A::SIXFRAMES, - 7 => RXTIMEOUT_A::SEVENFRAMES, + 0 => Rxtimeout::Disabled, + 1 => Rxtimeout::Oneframe, + 2 => Rxtimeout::Twoframes, + 3 => Rxtimeout::Threeframes, + 4 => Rxtimeout::Fourframes, + 5 => Rxtimeout::Fiveframes, + 6 => Rxtimeout::Sixframes, + 7 => Rxtimeout::Sevenframes, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "DISABLED"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == RXTIMEOUT_A::DISABLED + *self == Rxtimeout::Disabled } - #[doc = "Checks if the value of the field is `ONEFRAME`"] + #[doc = "ONEFRAME"] #[inline(always)] pub fn is_oneframe(&self) -> bool { - *self == RXTIMEOUT_A::ONEFRAME + *self == Rxtimeout::Oneframe } - #[doc = "Checks if the value of the field is `TWOFRAMES`"] + #[doc = "TWOFRAMES"] #[inline(always)] pub fn is_twoframes(&self) -> bool { - *self == RXTIMEOUT_A::TWOFRAMES + *self == Rxtimeout::Twoframes } - #[doc = "Checks if the value of the field is `THREEFRAMES`"] + #[doc = "THREEFRAMES"] #[inline(always)] pub fn is_threeframes(&self) -> bool { - *self == RXTIMEOUT_A::THREEFRAMES + *self == Rxtimeout::Threeframes } - #[doc = "Checks if the value of the field is `FOURFRAMES`"] + #[doc = "FOURFRAMES"] #[inline(always)] pub fn is_fourframes(&self) -> bool { - *self == RXTIMEOUT_A::FOURFRAMES + *self == Rxtimeout::Fourframes } - #[doc = "Checks if the value of the field is `FIVEFRAMES`"] + #[doc = "FIVEFRAMES"] #[inline(always)] pub fn is_fiveframes(&self) -> bool { - *self == RXTIMEOUT_A::FIVEFRAMES + *self == Rxtimeout::Fiveframes } - #[doc = "Checks if the value of the field is `SIXFRAMES`"] + #[doc = "SIXFRAMES"] #[inline(always)] pub fn is_sixframes(&self) -> bool { - *self == RXTIMEOUT_A::SIXFRAMES + *self == Rxtimeout::Sixframes } - #[doc = "Checks if the value of the field is `SEVENFRAMES`"] + #[doc = "SEVENFRAMES"] #[inline(always)] pub fn is_sevenframes(&self) -> bool { - *self == RXTIMEOUT_A::SEVENFRAMES + *self == Rxtimeout::Sevenframes } } #[doc = "Field `RXTIMEOUT` writer - RX Timeout"] -pub type RXTIMEOUT_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CFG1_SPEC, u8, RXTIMEOUT_A, 3, O>; -impl<'a, const O: u8> RXTIMEOUT_W<'a, O> { +pub type RxtimeoutW<'a, REG> = crate::FieldWriter<'a, REG, 3, Rxtimeout, crate::Safe>; +impl<'a, REG> RxtimeoutW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "DISABLED"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Disabled) } #[doc = "ONEFRAME"] #[inline(always)] - pub fn oneframe(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::ONEFRAME) + pub fn oneframe(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Oneframe) } #[doc = "TWOFRAMES"] #[inline(always)] - pub fn twoframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::TWOFRAMES) + pub fn twoframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Twoframes) } #[doc = "THREEFRAMES"] #[inline(always)] - pub fn threeframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::THREEFRAMES) + pub fn threeframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Threeframes) } #[doc = "FOURFRAMES"] #[inline(always)] - pub fn fourframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::FOURFRAMES) + pub fn fourframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Fourframes) } #[doc = "FIVEFRAMES"] #[inline(always)] - pub fn fiveframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::FIVEFRAMES) + pub fn fiveframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Fiveframes) } #[doc = "SIXFRAMES"] #[inline(always)] - pub fn sixframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::SIXFRAMES) + pub fn sixframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Sixframes) } #[doc = "SEVENFRAMES"] #[inline(always)] - pub fn sevenframes(self) -> &'a mut W { - self.variant(RXTIMEOUT_A::SEVENFRAMES) + pub fn sevenframes(self) -> &'a mut crate::W { + self.variant(Rxtimeout::Sevenframes) } } #[doc = "Field `SFUBRX` reader - Start Frame Unblock Receiver"] -pub type SFUBRX_R = crate::BitReader; +pub type SfubrxR = crate::BitReader; #[doc = "Field `SFUBRX` writer - Start Frame Unblock Receiver"] -pub type SFUBRX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, bool, O>; +pub type SfubrxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXPRSEN` reader - PRS RX Enable"] -pub type RXPRSEN_R = crate::BitReader; +pub type RxprsenR = crate::BitReader; #[doc = "Field `RXPRSEN` writer - PRS RX Enable"] -pub type RXPRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG1_SPEC, bool, O>; -#[doc = "Field `TXFIW` reader - TX FIFO Interrupt Watermark"] -pub type TXFIW_R = crate::FieldReader; +pub type RxprsenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "TX FIFO Interrupt Watermark\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TXFIW_A { +pub enum Txfiw { #[doc = "0: TXFL status flag and IF are set when the TX FIFO has space for at least one more frame."] - ONEFRAME = 0, + Oneframe = 0, #[doc = "1: TXFL status flag and IF are set when the TX FIFO has space for at least two more frames."] - TWOFRAMES = 1, + Twoframes = 1, #[doc = "2: TXFL status flag and IF are set when the TX FIFO has space for at least three more frames."] - THREEFRAMES = 2, + Threeframes = 2, #[doc = "3: TXFL status flag and IF are set when the TX FIFO has space for at least four more frames."] - FOURFRAMES = 3, + Fourframes = 3, #[doc = "4: TXFL status flag and IF are set when the TX FIFO has space for at least five more frames."] - FIVEFRAMES = 4, + Fiveframes = 4, #[doc = "5: TXFL status flag and IF are set when the TX FIFO has space for at least six more frames."] - SIXFRAMES = 5, + Sixframes = 5, #[doc = "6: TXFL status flag and IF are set when the TX FIFO has space for at least seven more frames."] - SEVENFRAMES = 6, + Sevenframes = 6, #[doc = "7: TXFL status flag and IF are set when the TX FIFO has space for at least eight more frames."] - EIGHTFRAMES = 7, + Eightframes = 7, #[doc = "8: TXFL status flag and IF are set when the TX FIFO has space for at least nine more frames."] - NINEFRAMES = 8, + Nineframes = 8, #[doc = "9: TXFL status flag and IF are set when the TX FIFO has space for at least ten more frames."] - TENFRAMES = 9, + Tenframes = 9, #[doc = "10: TXFL status flag and IF are set when the TX FIFO has space for at least eleven more frames."] - ELEVENFRAMES = 10, + Elevenframes = 10, #[doc = "11: TXFL status flag and IF are set when the TX FIFO has space for at least twelve more frames."] - TWELVEFRAMES = 11, + Twelveframes = 11, #[doc = "12: TXFL status flag and IF are set when the TX FIFO has space for at least thriteen more frames."] - THIRTEENFRAMES = 12, + Thirteenframes = 12, #[doc = "13: TXFL status flag and IF are set when the TX FIFO has space for at least fourteen more frames."] - FOURTEENFRAMES = 13, + Fourteenframes = 13, #[doc = "14: TXFL status flag and IF are set when the TX FIFO has space for at least fifteen more frames."] - FIFTEENFRAMES = 14, + Fifteenframes = 14, #[doc = "15: TXFL status flag and IF are set when the TX FIFO has space for at least sixteen more frames."] - SIXTEENFRAMES = 15, + Sixteenframes = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TXFIW_A) -> Self { + fn from(variant: Txfiw) -> Self { variant as _ } } -impl TXFIW_R { +impl crate::FieldSpec for Txfiw { + type Ux = u8; +} +impl crate::IsEnum for Txfiw {} +#[doc = "Field `TXFIW` reader - TX FIFO Interrupt Watermark"] +pub type TxfiwR = crate::FieldReader; +impl TxfiwR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXFIW_A { + pub const fn variant(&self) -> Txfiw { match self.bits { - 0 => TXFIW_A::ONEFRAME, - 1 => TXFIW_A::TWOFRAMES, - 2 => TXFIW_A::THREEFRAMES, - 3 => TXFIW_A::FOURFRAMES, - 4 => TXFIW_A::FIVEFRAMES, - 5 => TXFIW_A::SIXFRAMES, - 6 => TXFIW_A::SEVENFRAMES, - 7 => TXFIW_A::EIGHTFRAMES, - 8 => TXFIW_A::NINEFRAMES, - 9 => TXFIW_A::TENFRAMES, - 10 => TXFIW_A::ELEVENFRAMES, - 11 => TXFIW_A::TWELVEFRAMES, - 12 => TXFIW_A::THIRTEENFRAMES, - 13 => TXFIW_A::FOURTEENFRAMES, - 14 => TXFIW_A::FIFTEENFRAMES, - 15 => TXFIW_A::SIXTEENFRAMES, + 0 => Txfiw::Oneframe, + 1 => Txfiw::Twoframes, + 2 => Txfiw::Threeframes, + 3 => Txfiw::Fourframes, + 4 => Txfiw::Fiveframes, + 5 => Txfiw::Sixframes, + 6 => Txfiw::Sevenframes, + 7 => Txfiw::Eightframes, + 8 => Txfiw::Nineframes, + 9 => Txfiw::Tenframes, + 10 => Txfiw::Elevenframes, + 11 => Txfiw::Twelveframes, + 12 => Txfiw::Thirteenframes, + 13 => Txfiw::Fourteenframes, + 14 => Txfiw::Fifteenframes, + 15 => Txfiw::Sixteenframes, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONEFRAME`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least one more frame."] #[inline(always)] pub fn is_oneframe(&self) -> bool { - *self == TXFIW_A::ONEFRAME + *self == Txfiw::Oneframe } - #[doc = "Checks if the value of the field is `TWOFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least two more frames."] #[inline(always)] pub fn is_twoframes(&self) -> bool { - *self == TXFIW_A::TWOFRAMES + *self == Txfiw::Twoframes } - #[doc = "Checks if the value of the field is `THREEFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least three more frames."] #[inline(always)] pub fn is_threeframes(&self) -> bool { - *self == TXFIW_A::THREEFRAMES + *self == Txfiw::Threeframes } - #[doc = "Checks if the value of the field is `FOURFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least four more frames."] #[inline(always)] pub fn is_fourframes(&self) -> bool { - *self == TXFIW_A::FOURFRAMES + *self == Txfiw::Fourframes } - #[doc = "Checks if the value of the field is `FIVEFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least five more frames."] #[inline(always)] pub fn is_fiveframes(&self) -> bool { - *self == TXFIW_A::FIVEFRAMES + *self == Txfiw::Fiveframes } - #[doc = "Checks if the value of the field is `SIXFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least six more frames."] #[inline(always)] pub fn is_sixframes(&self) -> bool { - *self == TXFIW_A::SIXFRAMES + *self == Txfiw::Sixframes } - #[doc = "Checks if the value of the field is `SEVENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least seven more frames."] #[inline(always)] pub fn is_sevenframes(&self) -> bool { - *self == TXFIW_A::SEVENFRAMES + *self == Txfiw::Sevenframes } - #[doc = "Checks if the value of the field is `EIGHTFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least eight more frames."] #[inline(always)] pub fn is_eightframes(&self) -> bool { - *self == TXFIW_A::EIGHTFRAMES + *self == Txfiw::Eightframes } - #[doc = "Checks if the value of the field is `NINEFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least nine more frames."] #[inline(always)] pub fn is_nineframes(&self) -> bool { - *self == TXFIW_A::NINEFRAMES + *self == Txfiw::Nineframes } - #[doc = "Checks if the value of the field is `TENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least ten more frames."] #[inline(always)] pub fn is_tenframes(&self) -> bool { - *self == TXFIW_A::TENFRAMES + *self == Txfiw::Tenframes } - #[doc = "Checks if the value of the field is `ELEVENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least eleven more frames."] #[inline(always)] pub fn is_elevenframes(&self) -> bool { - *self == TXFIW_A::ELEVENFRAMES + *self == Txfiw::Elevenframes } - #[doc = "Checks if the value of the field is `TWELVEFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least twelve more frames."] #[inline(always)] pub fn is_twelveframes(&self) -> bool { - *self == TXFIW_A::TWELVEFRAMES + *self == Txfiw::Twelveframes } - #[doc = "Checks if the value of the field is `THIRTEENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least thriteen more frames."] #[inline(always)] pub fn is_thirteenframes(&self) -> bool { - *self == TXFIW_A::THIRTEENFRAMES + *self == Txfiw::Thirteenframes } - #[doc = "Checks if the value of the field is `FOURTEENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least fourteen more frames."] #[inline(always)] pub fn is_fourteenframes(&self) -> bool { - *self == TXFIW_A::FOURTEENFRAMES + *self == Txfiw::Fourteenframes } - #[doc = "Checks if the value of the field is `FIFTEENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least fifteen more frames."] #[inline(always)] pub fn is_fifteenframes(&self) -> bool { - *self == TXFIW_A::FIFTEENFRAMES + *self == Txfiw::Fifteenframes } - #[doc = "Checks if the value of the field is `SIXTEENFRAMES`"] + #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least sixteen more frames."] #[inline(always)] pub fn is_sixteenframes(&self) -> bool { - *self == TXFIW_A::SIXTEENFRAMES + *self == Txfiw::Sixteenframes } } #[doc = "Field `TXFIW` writer - TX FIFO Interrupt Watermark"] -pub type TXFIW_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG1_SPEC, u8, TXFIW_A, 4, O>; -impl<'a, const O: u8> TXFIW_W<'a, O> { +pub type TxfiwW<'a, REG> = crate::FieldWriter<'a, REG, 4, Txfiw, crate::Safe>; +impl<'a, REG> TxfiwW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least one more frame."] #[inline(always)] - pub fn oneframe(self) -> &'a mut W { - self.variant(TXFIW_A::ONEFRAME) + pub fn oneframe(self) -> &'a mut crate::W { + self.variant(Txfiw::Oneframe) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least two more frames."] #[inline(always)] - pub fn twoframes(self) -> &'a mut W { - self.variant(TXFIW_A::TWOFRAMES) + pub fn twoframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Twoframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least three more frames."] #[inline(always)] - pub fn threeframes(self) -> &'a mut W { - self.variant(TXFIW_A::THREEFRAMES) + pub fn threeframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Threeframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least four more frames."] #[inline(always)] - pub fn fourframes(self) -> &'a mut W { - self.variant(TXFIW_A::FOURFRAMES) + pub fn fourframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Fourframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least five more frames."] #[inline(always)] - pub fn fiveframes(self) -> &'a mut W { - self.variant(TXFIW_A::FIVEFRAMES) + pub fn fiveframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Fiveframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least six more frames."] #[inline(always)] - pub fn sixframes(self) -> &'a mut W { - self.variant(TXFIW_A::SIXFRAMES) + pub fn sixframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Sixframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least seven more frames."] #[inline(always)] - pub fn sevenframes(self) -> &'a mut W { - self.variant(TXFIW_A::SEVENFRAMES) + pub fn sevenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Sevenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least eight more frames."] #[inline(always)] - pub fn eightframes(self) -> &'a mut W { - self.variant(TXFIW_A::EIGHTFRAMES) + pub fn eightframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Eightframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least nine more frames."] #[inline(always)] - pub fn nineframes(self) -> &'a mut W { - self.variant(TXFIW_A::NINEFRAMES) + pub fn nineframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Nineframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least ten more frames."] #[inline(always)] - pub fn tenframes(self) -> &'a mut W { - self.variant(TXFIW_A::TENFRAMES) + pub fn tenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Tenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least eleven more frames."] #[inline(always)] - pub fn elevenframes(self) -> &'a mut W { - self.variant(TXFIW_A::ELEVENFRAMES) + pub fn elevenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Elevenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least twelve more frames."] #[inline(always)] - pub fn twelveframes(self) -> &'a mut W { - self.variant(TXFIW_A::TWELVEFRAMES) + pub fn twelveframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Twelveframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least thriteen more frames."] #[inline(always)] - pub fn thirteenframes(self) -> &'a mut W { - self.variant(TXFIW_A::THIRTEENFRAMES) + pub fn thirteenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Thirteenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least fourteen more frames."] #[inline(always)] - pub fn fourteenframes(self) -> &'a mut W { - self.variant(TXFIW_A::FOURTEENFRAMES) + pub fn fourteenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Fourteenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least fifteen more frames."] #[inline(always)] - pub fn fifteenframes(self) -> &'a mut W { - self.variant(TXFIW_A::FIFTEENFRAMES) + pub fn fifteenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Fifteenframes) } #[doc = "TXFL status flag and IF are set when the TX FIFO has space for at least sixteen more frames."] #[inline(always)] - pub fn sixteenframes(self) -> &'a mut W { - self.variant(TXFIW_A::SIXTEENFRAMES) + pub fn sixteenframes(self) -> &'a mut crate::W { + self.variant(Txfiw::Sixteenframes) } } -#[doc = "Field `RTSRXFW` reader - Request-to-send RX FIFO Watermark"] -pub type RTSRXFW_R = crate::FieldReader; #[doc = "Request-to-send RX FIFO Watermark\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RTSRXFW_A { +pub enum Rtsrxfw { #[doc = "0: RTS is set if there is space for at least one more frame in the RX FIFO."] - ONEFRAME = 0, + Oneframe = 0, #[doc = "1: RTS is set if there is space for at least two more frames in the RX FIFO."] - TWOFRAMES = 1, + Twoframes = 1, #[doc = "2: RTS is set if there is space for at least three more frames in the RX FIFO."] - THREEFRAMES = 2, + Threeframes = 2, #[doc = "3: RTS is set if there is space for four more frames in the RX FIFO."] - FOURFRAMES = 3, + Fourframes = 3, #[doc = "4: RTS is set if there is space for five more frames in the RX FIFO."] - FIVEFRAMES = 4, + Fiveframes = 4, #[doc = "5: RTS is set if there is space for six more frames in the RX FIFO."] - SIXFRAMES = 5, + Sixframes = 5, #[doc = "6: RTS is set if there is space for seven more frames in the RX FIFO."] - SEVENFRAMES = 6, + Sevenframes = 6, #[doc = "7: RTS is set if there is space for eight more frames in the RX FIFO."] - EIGHTFRAMES = 7, + Eightframes = 7, #[doc = "8: RTS is set if there is space for nine more frames in the RX FIFO."] - NINEFRAMES = 8, + Nineframes = 8, #[doc = "9: RTS is set if there is space for ten more frames in the RX FIFO."] - TENFRAMES = 9, + Tenframes = 9, #[doc = "10: RTS is set if there is space for eleven more frames in the RX FIFO."] - ELEVENFRAMES = 10, + Elevenframes = 10, #[doc = "11: RTS is set if there is space for twelve more frames in the RX FIFO."] - TWELVEFRAMES = 11, + Twelveframes = 11, #[doc = "12: RTS is set if there is space for thirteen more frames in the RX FIFO."] - THIRTEENFRAMES = 12, + Thirteenframes = 12, #[doc = "13: RTS is set if there is space for fourteen more frames in the RX FIFO."] - FOURTEENFRAMES = 13, + Fourteenframes = 13, #[doc = "14: RTS is set if there is space for fifteen more frames in the RX FIFO."] - FIFTEENFRAMES = 14, + Fifteenframes = 14, #[doc = "15: RTS is set if there is space for sixteen more frames in the RX FIFO."] - SIXTEENFRAMES = 15, + Sixteenframes = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RTSRXFW_A) -> Self { + fn from(variant: Rtsrxfw) -> Self { variant as _ } } -impl RTSRXFW_R { +impl crate::FieldSpec for Rtsrxfw { + type Ux = u8; +} +impl crate::IsEnum for Rtsrxfw {} +#[doc = "Field `RTSRXFW` reader - Request-to-send RX FIFO Watermark"] +pub type RtsrxfwR = crate::FieldReader; +impl RtsrxfwR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RTSRXFW_A { + pub const fn variant(&self) -> Rtsrxfw { match self.bits { - 0 => RTSRXFW_A::ONEFRAME, - 1 => RTSRXFW_A::TWOFRAMES, - 2 => RTSRXFW_A::THREEFRAMES, - 3 => RTSRXFW_A::FOURFRAMES, - 4 => RTSRXFW_A::FIVEFRAMES, - 5 => RTSRXFW_A::SIXFRAMES, - 6 => RTSRXFW_A::SEVENFRAMES, - 7 => RTSRXFW_A::EIGHTFRAMES, - 8 => RTSRXFW_A::NINEFRAMES, - 9 => RTSRXFW_A::TENFRAMES, - 10 => RTSRXFW_A::ELEVENFRAMES, - 11 => RTSRXFW_A::TWELVEFRAMES, - 12 => RTSRXFW_A::THIRTEENFRAMES, - 13 => RTSRXFW_A::FOURTEENFRAMES, - 14 => RTSRXFW_A::FIFTEENFRAMES, - 15 => RTSRXFW_A::SIXTEENFRAMES, + 0 => Rtsrxfw::Oneframe, + 1 => Rtsrxfw::Twoframes, + 2 => Rtsrxfw::Threeframes, + 3 => Rtsrxfw::Fourframes, + 4 => Rtsrxfw::Fiveframes, + 5 => Rtsrxfw::Sixframes, + 6 => Rtsrxfw::Sevenframes, + 7 => Rtsrxfw::Eightframes, + 8 => Rtsrxfw::Nineframes, + 9 => Rtsrxfw::Tenframes, + 10 => Rtsrxfw::Elevenframes, + 11 => Rtsrxfw::Twelveframes, + 12 => Rtsrxfw::Thirteenframes, + 13 => Rtsrxfw::Fourteenframes, + 14 => Rtsrxfw::Fifteenframes, + 15 => Rtsrxfw::Sixteenframes, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONEFRAME`"] + #[doc = "RTS is set if there is space for at least one more frame in the RX FIFO."] #[inline(always)] pub fn is_oneframe(&self) -> bool { - *self == RTSRXFW_A::ONEFRAME + *self == Rtsrxfw::Oneframe } - #[doc = "Checks if the value of the field is `TWOFRAMES`"] + #[doc = "RTS is set if there is space for at least two more frames in the RX FIFO."] #[inline(always)] pub fn is_twoframes(&self) -> bool { - *self == RTSRXFW_A::TWOFRAMES + *self == Rtsrxfw::Twoframes } - #[doc = "Checks if the value of the field is `THREEFRAMES`"] + #[doc = "RTS is set if there is space for at least three more frames in the RX FIFO."] #[inline(always)] pub fn is_threeframes(&self) -> bool { - *self == RTSRXFW_A::THREEFRAMES + *self == Rtsrxfw::Threeframes } - #[doc = "Checks if the value of the field is `FOURFRAMES`"] + #[doc = "RTS is set if there is space for four more frames in the RX FIFO."] #[inline(always)] pub fn is_fourframes(&self) -> bool { - *self == RTSRXFW_A::FOURFRAMES + *self == Rtsrxfw::Fourframes } - #[doc = "Checks if the value of the field is `FIVEFRAMES`"] + #[doc = "RTS is set if there is space for five more frames in the RX FIFO."] #[inline(always)] pub fn is_fiveframes(&self) -> bool { - *self == RTSRXFW_A::FIVEFRAMES + *self == Rtsrxfw::Fiveframes } - #[doc = "Checks if the value of the field is `SIXFRAMES`"] + #[doc = "RTS is set if there is space for six more frames in the RX FIFO."] #[inline(always)] pub fn is_sixframes(&self) -> bool { - *self == RTSRXFW_A::SIXFRAMES + *self == Rtsrxfw::Sixframes } - #[doc = "Checks if the value of the field is `SEVENFRAMES`"] + #[doc = "RTS is set if there is space for seven more frames in the RX FIFO."] #[inline(always)] pub fn is_sevenframes(&self) -> bool { - *self == RTSRXFW_A::SEVENFRAMES + *self == Rtsrxfw::Sevenframes } - #[doc = "Checks if the value of the field is `EIGHTFRAMES`"] + #[doc = "RTS is set if there is space for eight more frames in the RX FIFO."] #[inline(always)] pub fn is_eightframes(&self) -> bool { - *self == RTSRXFW_A::EIGHTFRAMES + *self == Rtsrxfw::Eightframes } - #[doc = "Checks if the value of the field is `NINEFRAMES`"] + #[doc = "RTS is set if there is space for nine more frames in the RX FIFO."] #[inline(always)] pub fn is_nineframes(&self) -> bool { - *self == RTSRXFW_A::NINEFRAMES + *self == Rtsrxfw::Nineframes } - #[doc = "Checks if the value of the field is `TENFRAMES`"] + #[doc = "RTS is set if there is space for ten more frames in the RX FIFO."] #[inline(always)] pub fn is_tenframes(&self) -> bool { - *self == RTSRXFW_A::TENFRAMES + *self == Rtsrxfw::Tenframes } - #[doc = "Checks if the value of the field is `ELEVENFRAMES`"] + #[doc = "RTS is set if there is space for eleven more frames in the RX FIFO."] #[inline(always)] pub fn is_elevenframes(&self) -> bool { - *self == RTSRXFW_A::ELEVENFRAMES + *self == Rtsrxfw::Elevenframes } - #[doc = "Checks if the value of the field is `TWELVEFRAMES`"] + #[doc = "RTS is set if there is space for twelve more frames in the RX FIFO."] #[inline(always)] pub fn is_twelveframes(&self) -> bool { - *self == RTSRXFW_A::TWELVEFRAMES + *self == Rtsrxfw::Twelveframes } - #[doc = "Checks if the value of the field is `THIRTEENFRAMES`"] + #[doc = "RTS is set if there is space for thirteen more frames in the RX FIFO."] #[inline(always)] pub fn is_thirteenframes(&self) -> bool { - *self == RTSRXFW_A::THIRTEENFRAMES + *self == Rtsrxfw::Thirteenframes } - #[doc = "Checks if the value of the field is `FOURTEENFRAMES`"] + #[doc = "RTS is set if there is space for fourteen more frames in the RX FIFO."] #[inline(always)] pub fn is_fourteenframes(&self) -> bool { - *self == RTSRXFW_A::FOURTEENFRAMES + *self == Rtsrxfw::Fourteenframes } - #[doc = "Checks if the value of the field is `FIFTEENFRAMES`"] + #[doc = "RTS is set if there is space for fifteen more frames in the RX FIFO."] #[inline(always)] pub fn is_fifteenframes(&self) -> bool { - *self == RTSRXFW_A::FIFTEENFRAMES + *self == Rtsrxfw::Fifteenframes } - #[doc = "Checks if the value of the field is `SIXTEENFRAMES`"] + #[doc = "RTS is set if there is space for sixteen more frames in the RX FIFO."] #[inline(always)] pub fn is_sixteenframes(&self) -> bool { - *self == RTSRXFW_A::SIXTEENFRAMES + *self == Rtsrxfw::Sixteenframes } } #[doc = "Field `RTSRXFW` writer - Request-to-send RX FIFO Watermark"] -pub type RTSRXFW_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CFG1_SPEC, u8, RTSRXFW_A, 4, O>; -impl<'a, const O: u8> RTSRXFW_W<'a, O> { +pub type RtsrxfwW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rtsrxfw, crate::Safe>; +impl<'a, REG> RtsrxfwW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "RTS is set if there is space for at least one more frame in the RX FIFO."] #[inline(always)] - pub fn oneframe(self) -> &'a mut W { - self.variant(RTSRXFW_A::ONEFRAME) + pub fn oneframe(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Oneframe) } #[doc = "RTS is set if there is space for at least two more frames in the RX FIFO."] #[inline(always)] - pub fn twoframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::TWOFRAMES) + pub fn twoframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Twoframes) } #[doc = "RTS is set if there is space for at least three more frames in the RX FIFO."] #[inline(always)] - pub fn threeframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::THREEFRAMES) + pub fn threeframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Threeframes) } #[doc = "RTS is set if there is space for four more frames in the RX FIFO."] #[inline(always)] - pub fn fourframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::FOURFRAMES) + pub fn fourframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Fourframes) } #[doc = "RTS is set if there is space for five more frames in the RX FIFO."] #[inline(always)] - pub fn fiveframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::FIVEFRAMES) + pub fn fiveframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Fiveframes) } #[doc = "RTS is set if there is space for six more frames in the RX FIFO."] #[inline(always)] - pub fn sixframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::SIXFRAMES) + pub fn sixframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Sixframes) } #[doc = "RTS is set if there is space for seven more frames in the RX FIFO."] #[inline(always)] - pub fn sevenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::SEVENFRAMES) + pub fn sevenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Sevenframes) } #[doc = "RTS is set if there is space for eight more frames in the RX FIFO."] #[inline(always)] - pub fn eightframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::EIGHTFRAMES) + pub fn eightframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Eightframes) } #[doc = "RTS is set if there is space for nine more frames in the RX FIFO."] #[inline(always)] - pub fn nineframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::NINEFRAMES) + pub fn nineframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Nineframes) } #[doc = "RTS is set if there is space for ten more frames in the RX FIFO."] #[inline(always)] - pub fn tenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::TENFRAMES) + pub fn tenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Tenframes) } #[doc = "RTS is set if there is space for eleven more frames in the RX FIFO."] #[inline(always)] - pub fn elevenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::ELEVENFRAMES) + pub fn elevenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Elevenframes) } #[doc = "RTS is set if there is space for twelve more frames in the RX FIFO."] #[inline(always)] - pub fn twelveframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::TWELVEFRAMES) + pub fn twelveframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Twelveframes) } #[doc = "RTS is set if there is space for thirteen more frames in the RX FIFO."] #[inline(always)] - pub fn thirteenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::THIRTEENFRAMES) + pub fn thirteenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Thirteenframes) } #[doc = "RTS is set if there is space for fourteen more frames in the RX FIFO."] #[inline(always)] - pub fn fourteenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::FOURTEENFRAMES) + pub fn fourteenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Fourteenframes) } #[doc = "RTS is set if there is space for fifteen more frames in the RX FIFO."] #[inline(always)] - pub fn fifteenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::FIFTEENFRAMES) + pub fn fifteenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Fifteenframes) } #[doc = "RTS is set if there is space for sixteen more frames in the RX FIFO."] #[inline(always)] - pub fn sixteenframes(self) -> &'a mut W { - self.variant(RTSRXFW_A::SIXTEENFRAMES) + pub fn sixteenframes(self) -> &'a mut crate::W { + self.variant(Rtsrxfw::Sixteenframes) } } -#[doc = "Field `RXFIW` reader - RX FIFO Interrupt Watermark"] -pub type RXFIW_R = crate::FieldReader; #[doc = "RX FIFO Interrupt Watermark\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RXFIW_A { +pub enum Rxfiw { #[doc = "0: RXFL status flag and IF are set when the RX FIFO has at least one frame in it."] - ONEFRAME = 0, + Oneframe = 0, #[doc = "1: RXFL status flag and IF are set when the RX FIFO has at least two frames in it."] - TWOFRAMES = 1, + Twoframes = 1, #[doc = "2: RXFL status flag and IF are set when the RX FIFO has at least three frames in it."] - THREEFRAMES = 2, + Threeframes = 2, #[doc = "3: RXFL status flag and IF are set when the RX FIFO has at least four frames in it."] - FOURFRAMES = 3, + Fourframes = 3, #[doc = "4: RXFL status flag and IF are set when the RX FIFO has at least five frames in it."] - FIVEFRAMES = 4, + Fiveframes = 4, #[doc = "5: RXFL status flag and IF are set when the RX FIFO has at least six frames in it."] - SIXFRAMES = 5, + Sixframes = 5, #[doc = "6: RXFL status flag and IF are set when the RX FIFO has at least seven frames in it."] - SEVENFRAMES = 6, + Sevenframes = 6, #[doc = "7: RXFL status flag and IF are set when the RX FIFO has at least eight frames in it."] - EIGHTFRAMES = 7, + Eightframes = 7, #[doc = "8: RXFL status flag and IF are set when the RX FIFO has at least nine frames in it."] - NINEFRAMES = 8, + Nineframes = 8, #[doc = "9: RXFL status flag and IF are set when the RX FIFO has at least ten frames in it."] - TENFRAMES = 9, + Tenframes = 9, #[doc = "10: RXFL status flag and IF are set when the RX FIFO has at least eleven frames in it."] - ELEVENFRAMES = 10, + Elevenframes = 10, #[doc = "11: RXFL status flag and IF are set when the RX FIFO has at least twelve frames in it."] - TWELVEFRAMES = 11, + Twelveframes = 11, #[doc = "12: RXFL status flag and IF are set when the RX FIFO has at least thriteen frames in it."] - THIRTEENFRAMES = 12, + Thirteenframes = 12, #[doc = "13: RXFL status flag and IF are set when the RX FIFO has at least fourteen frames in it."] - FOURTEENFRAMES = 13, + Fourteenframes = 13, #[doc = "14: RXFL status flag and IF are set when the RX FIFO has at least fifteen frames in it."] - FIFTEENFRAMES = 14, + Fifteenframes = 14, #[doc = "15: RXFL status flag and IF are set when the RX FIFO has at least sixteen frames in it."] - SIXTEENFRAMES = 15, + Sixteenframes = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RXFIW_A) -> Self { + fn from(variant: Rxfiw) -> Self { variant as _ } } -impl RXFIW_R { +impl crate::FieldSpec for Rxfiw { + type Ux = u8; +} +impl crate::IsEnum for Rxfiw {} +#[doc = "Field `RXFIW` reader - RX FIFO Interrupt Watermark"] +pub type RxfiwR = crate::FieldReader; +impl RxfiwR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RXFIW_A { + pub const fn variant(&self) -> Rxfiw { match self.bits { - 0 => RXFIW_A::ONEFRAME, - 1 => RXFIW_A::TWOFRAMES, - 2 => RXFIW_A::THREEFRAMES, - 3 => RXFIW_A::FOURFRAMES, - 4 => RXFIW_A::FIVEFRAMES, - 5 => RXFIW_A::SIXFRAMES, - 6 => RXFIW_A::SEVENFRAMES, - 7 => RXFIW_A::EIGHTFRAMES, - 8 => RXFIW_A::NINEFRAMES, - 9 => RXFIW_A::TENFRAMES, - 10 => RXFIW_A::ELEVENFRAMES, - 11 => RXFIW_A::TWELVEFRAMES, - 12 => RXFIW_A::THIRTEENFRAMES, - 13 => RXFIW_A::FOURTEENFRAMES, - 14 => RXFIW_A::FIFTEENFRAMES, - 15 => RXFIW_A::SIXTEENFRAMES, + 0 => Rxfiw::Oneframe, + 1 => Rxfiw::Twoframes, + 2 => Rxfiw::Threeframes, + 3 => Rxfiw::Fourframes, + 4 => Rxfiw::Fiveframes, + 5 => Rxfiw::Sixframes, + 6 => Rxfiw::Sevenframes, + 7 => Rxfiw::Eightframes, + 8 => Rxfiw::Nineframes, + 9 => Rxfiw::Tenframes, + 10 => Rxfiw::Elevenframes, + 11 => Rxfiw::Twelveframes, + 12 => Rxfiw::Thirteenframes, + 13 => Rxfiw::Fourteenframes, + 14 => Rxfiw::Fifteenframes, + 15 => Rxfiw::Sixteenframes, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONEFRAME`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least one frame in it."] #[inline(always)] pub fn is_oneframe(&self) -> bool { - *self == RXFIW_A::ONEFRAME + *self == Rxfiw::Oneframe } - #[doc = "Checks if the value of the field is `TWOFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least two frames in it."] #[inline(always)] pub fn is_twoframes(&self) -> bool { - *self == RXFIW_A::TWOFRAMES + *self == Rxfiw::Twoframes } - #[doc = "Checks if the value of the field is `THREEFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least three frames in it."] #[inline(always)] pub fn is_threeframes(&self) -> bool { - *self == RXFIW_A::THREEFRAMES + *self == Rxfiw::Threeframes } - #[doc = "Checks if the value of the field is `FOURFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least four frames in it."] #[inline(always)] pub fn is_fourframes(&self) -> bool { - *self == RXFIW_A::FOURFRAMES + *self == Rxfiw::Fourframes } - #[doc = "Checks if the value of the field is `FIVEFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least five frames in it."] #[inline(always)] pub fn is_fiveframes(&self) -> bool { - *self == RXFIW_A::FIVEFRAMES + *self == Rxfiw::Fiveframes } - #[doc = "Checks if the value of the field is `SIXFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least six frames in it."] #[inline(always)] pub fn is_sixframes(&self) -> bool { - *self == RXFIW_A::SIXFRAMES + *self == Rxfiw::Sixframes } - #[doc = "Checks if the value of the field is `SEVENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least seven frames in it."] #[inline(always)] pub fn is_sevenframes(&self) -> bool { - *self == RXFIW_A::SEVENFRAMES + *self == Rxfiw::Sevenframes } - #[doc = "Checks if the value of the field is `EIGHTFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least eight frames in it."] #[inline(always)] pub fn is_eightframes(&self) -> bool { - *self == RXFIW_A::EIGHTFRAMES + *self == Rxfiw::Eightframes } - #[doc = "Checks if the value of the field is `NINEFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least nine frames in it."] #[inline(always)] pub fn is_nineframes(&self) -> bool { - *self == RXFIW_A::NINEFRAMES + *self == Rxfiw::Nineframes } - #[doc = "Checks if the value of the field is `TENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least ten frames in it."] #[inline(always)] pub fn is_tenframes(&self) -> bool { - *self == RXFIW_A::TENFRAMES + *self == Rxfiw::Tenframes } - #[doc = "Checks if the value of the field is `ELEVENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least eleven frames in it."] #[inline(always)] pub fn is_elevenframes(&self) -> bool { - *self == RXFIW_A::ELEVENFRAMES + *self == Rxfiw::Elevenframes } - #[doc = "Checks if the value of the field is `TWELVEFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least twelve frames in it."] #[inline(always)] pub fn is_twelveframes(&self) -> bool { - *self == RXFIW_A::TWELVEFRAMES + *self == Rxfiw::Twelveframes } - #[doc = "Checks if the value of the field is `THIRTEENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least thriteen frames in it."] #[inline(always)] pub fn is_thirteenframes(&self) -> bool { - *self == RXFIW_A::THIRTEENFRAMES + *self == Rxfiw::Thirteenframes } - #[doc = "Checks if the value of the field is `FOURTEENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least fourteen frames in it."] #[inline(always)] pub fn is_fourteenframes(&self) -> bool { - *self == RXFIW_A::FOURTEENFRAMES + *self == Rxfiw::Fourteenframes } - #[doc = "Checks if the value of the field is `FIFTEENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least fifteen frames in it."] #[inline(always)] pub fn is_fifteenframes(&self) -> bool { - *self == RXFIW_A::FIFTEENFRAMES + *self == Rxfiw::Fifteenframes } - #[doc = "Checks if the value of the field is `SIXTEENFRAMES`"] + #[doc = "RXFL status flag and IF are set when the RX FIFO has at least sixteen frames in it."] #[inline(always)] pub fn is_sixteenframes(&self) -> bool { - *self == RXFIW_A::SIXTEENFRAMES + *self == Rxfiw::Sixteenframes } } #[doc = "Field `RXFIW` writer - RX FIFO Interrupt Watermark"] -pub type RXFIW_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG1_SPEC, u8, RXFIW_A, 4, O>; -impl<'a, const O: u8> RXFIW_W<'a, O> { +pub type RxfiwW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rxfiw, crate::Safe>; +impl<'a, REG> RxfiwW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "RXFL status flag and IF are set when the RX FIFO has at least one frame in it."] #[inline(always)] - pub fn oneframe(self) -> &'a mut W { - self.variant(RXFIW_A::ONEFRAME) + pub fn oneframe(self) -> &'a mut crate::W { + self.variant(Rxfiw::Oneframe) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least two frames in it."] #[inline(always)] - pub fn twoframes(self) -> &'a mut W { - self.variant(RXFIW_A::TWOFRAMES) + pub fn twoframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Twoframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least three frames in it."] #[inline(always)] - pub fn threeframes(self) -> &'a mut W { - self.variant(RXFIW_A::THREEFRAMES) + pub fn threeframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Threeframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least four frames in it."] #[inline(always)] - pub fn fourframes(self) -> &'a mut W { - self.variant(RXFIW_A::FOURFRAMES) + pub fn fourframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Fourframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least five frames in it."] #[inline(always)] - pub fn fiveframes(self) -> &'a mut W { - self.variant(RXFIW_A::FIVEFRAMES) + pub fn fiveframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Fiveframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least six frames in it."] #[inline(always)] - pub fn sixframes(self) -> &'a mut W { - self.variant(RXFIW_A::SIXFRAMES) + pub fn sixframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Sixframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least seven frames in it."] #[inline(always)] - pub fn sevenframes(self) -> &'a mut W { - self.variant(RXFIW_A::SEVENFRAMES) + pub fn sevenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Sevenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least eight frames in it."] #[inline(always)] - pub fn eightframes(self) -> &'a mut W { - self.variant(RXFIW_A::EIGHTFRAMES) + pub fn eightframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Eightframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least nine frames in it."] #[inline(always)] - pub fn nineframes(self) -> &'a mut W { - self.variant(RXFIW_A::NINEFRAMES) + pub fn nineframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Nineframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least ten frames in it."] #[inline(always)] - pub fn tenframes(self) -> &'a mut W { - self.variant(RXFIW_A::TENFRAMES) + pub fn tenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Tenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least eleven frames in it."] #[inline(always)] - pub fn elevenframes(self) -> &'a mut W { - self.variant(RXFIW_A::ELEVENFRAMES) + pub fn elevenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Elevenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least twelve frames in it."] #[inline(always)] - pub fn twelveframes(self) -> &'a mut W { - self.variant(RXFIW_A::TWELVEFRAMES) + pub fn twelveframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Twelveframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least thriteen frames in it."] #[inline(always)] - pub fn thirteenframes(self) -> &'a mut W { - self.variant(RXFIW_A::THIRTEENFRAMES) + pub fn thirteenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Thirteenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least fourteen frames in it."] #[inline(always)] - pub fn fourteenframes(self) -> &'a mut W { - self.variant(RXFIW_A::FOURTEENFRAMES) + pub fn fourteenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Fourteenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least fifteen frames in it."] #[inline(always)] - pub fn fifteenframes(self) -> &'a mut W { - self.variant(RXFIW_A::FIFTEENFRAMES) + pub fn fifteenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Fifteenframes) } #[doc = "RXFL status flag and IF are set when the RX FIFO has at least sixteen frames in it."] #[inline(always)] - pub fn sixteenframes(self) -> &'a mut W { - self.variant(RXFIW_A::SIXTEENFRAMES) + pub fn sixteenframes(self) -> &'a mut crate::W { + self.variant(Rxfiw::Sixteenframes) } } impl R { #[doc = "Bit 0 - Debug halt"] #[inline(always)] - pub fn dbghalt(&self) -> DBGHALT_R { - DBGHALT_R::new((self.bits & 1) != 0) + pub fn dbghalt(&self) -> DbghaltR { + DbghaltR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Clear-to-send Invert Enable"] #[inline(always)] - pub fn ctsinv(&self) -> CTSINV_R { - CTSINV_R::new(((self.bits >> 1) & 1) != 0) + pub fn ctsinv(&self) -> CtsinvR { + CtsinvR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Clear-to-send Enable"] #[inline(always)] - pub fn ctsen(&self) -> CTSEN_R { - CTSEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn ctsen(&self) -> CtsenR { + CtsenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Request-to-send Invert Enable"] #[inline(always)] - pub fn rtsinv(&self) -> RTSINV_R { - RTSINV_R::new(((self.bits >> 3) & 1) != 0) + pub fn rtsinv(&self) -> RtsinvR { + RtsinvR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:6 - RX Timeout"] #[inline(always)] - pub fn rxtimeout(&self) -> RXTIMEOUT_R { - RXTIMEOUT_R::new(((self.bits >> 4) & 7) as u8) + pub fn rxtimeout(&self) -> RxtimeoutR { + RxtimeoutR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bit 11 - Start Frame Unblock Receiver"] #[inline(always)] - pub fn sfubrx(&self) -> SFUBRX_R { - SFUBRX_R::new(((self.bits >> 11) & 1) != 0) + pub fn sfubrx(&self) -> SfubrxR { + SfubrxR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 15 - PRS RX Enable"] #[inline(always)] - pub fn rxprsen(&self) -> RXPRSEN_R { - RXPRSEN_R::new(((self.bits >> 15) & 1) != 0) + pub fn rxprsen(&self) -> RxprsenR { + RxprsenR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:19 - TX FIFO Interrupt Watermark"] #[inline(always)] - pub fn txfiw(&self) -> TXFIW_R { - TXFIW_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn txfiw(&self) -> TxfiwR { + TxfiwR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 22:25 - Request-to-send RX FIFO Watermark"] #[inline(always)] - pub fn rtsrxfw(&self) -> RTSRXFW_R { - RTSRXFW_R::new(((self.bits >> 22) & 0x0f) as u8) + pub fn rtsrxfw(&self) -> RtsrxfwR { + RtsrxfwR::new(((self.bits >> 22) & 0x0f) as u8) } #[doc = "Bits 27:30 - RX FIFO Interrupt Watermark"] #[inline(always)] - pub fn rxfiw(&self) -> RXFIW_R { - RXFIW_R::new(((self.bits >> 27) & 0x0f) as u8) + pub fn rxfiw(&self) -> RxfiwR { + RxfiwR::new(((self.bits >> 27) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - Debug halt"] #[inline(always)] #[must_use] - pub fn dbghalt(&mut self) -> DBGHALT_W<0> { - DBGHALT_W::new(self) + pub fn dbghalt(&mut self) -> DbghaltW { + DbghaltW::new(self, 0) } #[doc = "Bit 1 - Clear-to-send Invert Enable"] #[inline(always)] #[must_use] - pub fn ctsinv(&mut self) -> CTSINV_W<1> { - CTSINV_W::new(self) + pub fn ctsinv(&mut self) -> CtsinvW { + CtsinvW::new(self, 1) } #[doc = "Bit 2 - Clear-to-send Enable"] #[inline(always)] #[must_use] - pub fn ctsen(&mut self) -> CTSEN_W<2> { - CTSEN_W::new(self) + pub fn ctsen(&mut self) -> CtsenW { + CtsenW::new(self, 2) } #[doc = "Bit 3 - Request-to-send Invert Enable"] #[inline(always)] #[must_use] - pub fn rtsinv(&mut self) -> RTSINV_W<3> { - RTSINV_W::new(self) + pub fn rtsinv(&mut self) -> RtsinvW { + RtsinvW::new(self, 3) } #[doc = "Bits 4:6 - RX Timeout"] #[inline(always)] #[must_use] - pub fn rxtimeout(&mut self) -> RXTIMEOUT_W<4> { - RXTIMEOUT_W::new(self) + pub fn rxtimeout(&mut self) -> RxtimeoutW { + RxtimeoutW::new(self, 4) } #[doc = "Bit 11 - Start Frame Unblock Receiver"] #[inline(always)] #[must_use] - pub fn sfubrx(&mut self) -> SFUBRX_W<11> { - SFUBRX_W::new(self) + pub fn sfubrx(&mut self) -> SfubrxW { + SfubrxW::new(self, 11) } #[doc = "Bit 15 - PRS RX Enable"] #[inline(always)] #[must_use] - pub fn rxprsen(&mut self) -> RXPRSEN_W<15> { - RXPRSEN_W::new(self) + pub fn rxprsen(&mut self) -> RxprsenW { + RxprsenW::new(self, 15) } #[doc = "Bits 16:19 - TX FIFO Interrupt Watermark"] #[inline(always)] #[must_use] - pub fn txfiw(&mut self) -> TXFIW_W<16> { - TXFIW_W::new(self) + pub fn txfiw(&mut self) -> TxfiwW { + TxfiwW::new(self, 16) } #[doc = "Bits 22:25 - Request-to-send RX FIFO Watermark"] #[inline(always)] #[must_use] - pub fn rtsrxfw(&mut self) -> RTSRXFW_W<22> { - RTSRXFW_W::new(self) + pub fn rtsrxfw(&mut self) -> RtsrxfwW { + RtsrxfwW::new(self, 22) } #[doc = "Bits 27:30 - RX FIFO Interrupt Watermark"] #[inline(always)] #[must_use] - pub fn rxfiw(&mut self) -> RXFIW_W<27> { - RXFIW_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rxfiw(&mut self) -> RxfiwW { + RxfiwW::new(self, 27) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg1](index.html) module"] -pub struct CFG1_SPEC; -impl crate::RegisterSpec for CFG1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cfg1Spec; +impl crate::RegisterSpec for Cfg1Spec { type Ux = u32; } -#[doc = "`read()` method returns [cfg1::R](R) reader structure"] -impl crate::Readable for CFG1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg1::W](W) writer structure"] -impl crate::Writable for CFG1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg1::R`](R) reader structure"] +impl crate::Readable for Cfg1Spec {} +#[doc = "`write(|w| ..)` method takes [`cfg1::W`](W) writer structure"] +impl crate::Writable for Cfg1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG1 to value 0"] -impl crate::Resettable for CFG1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cfg1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/cfg2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/cfg2.rs index 1f16a32..08998b3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/cfg2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/cfg2.rs @@ -1,384 +1,356 @@ #[doc = "Register `CFG2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MASTER` reader - Main mode"] -pub type MASTER_R = crate::BitReader; +pub type W = crate::W; #[doc = "Main mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MASTER_A { +pub enum Master { #[doc = "0: Secondary mode"] - SLAVE = 0, + Slave = 0, #[doc = "1: Main mode"] - MASTER = 1, + Master = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MASTER_A) -> Self { + fn from(variant: Master) -> Self { variant as u8 != 0 } } -impl MASTER_R { +#[doc = "Field `MASTER` reader - Main mode"] +pub type MasterR = crate::BitReader; +impl MasterR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MASTER_A { + pub const fn variant(&self) -> Master { match self.bits { - false => MASTER_A::SLAVE, - true => MASTER_A::MASTER, + false => Master::Slave, + true => Master::Master, } } - #[doc = "Checks if the value of the field is `SLAVE`"] + #[doc = "Secondary mode"] #[inline(always)] pub fn is_slave(&self) -> bool { - *self == MASTER_A::SLAVE + *self == Master::Slave } - #[doc = "Checks if the value of the field is `MASTER`"] + #[doc = "Main mode"] #[inline(always)] pub fn is_master(&self) -> bool { - *self == MASTER_A::MASTER + *self == Master::Master } } #[doc = "Field `MASTER` writer - Main mode"] -pub type MASTER_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, MASTER_A, O>; -impl<'a, const O: u8> MASTER_W<'a, O> { +pub type MasterW<'a, REG> = crate::BitWriter<'a, REG, Master>; +impl<'a, REG> MasterW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Secondary mode"] #[inline(always)] - pub fn slave(self) -> &'a mut W { - self.variant(MASTER_A::SLAVE) + pub fn slave(self) -> &'a mut crate::W { + self.variant(Master::Slave) } #[doc = "Main mode"] #[inline(always)] - pub fn master(self) -> &'a mut W { - self.variant(MASTER_A::MASTER) + pub fn master(self) -> &'a mut crate::W { + self.variant(Master::Master) } } -#[doc = "Field `CLKPOL` reader - Clock Polarity"] -pub type CLKPOL_R = crate::BitReader; #[doc = "Clock Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLKPOL_A { +pub enum Clkpol { #[doc = "0: The bus clock used in synchronous mode has a low base value"] - IDLELOW = 0, + Idlelow = 0, #[doc = "1: The bus clock used in synchronous mode has a high base value"] - IDLEHIGH = 1, + Idlehigh = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLKPOL_A) -> Self { + fn from(variant: Clkpol) -> Self { variant as u8 != 0 } } -impl CLKPOL_R { +#[doc = "Field `CLKPOL` reader - Clock Polarity"] +pub type ClkpolR = crate::BitReader; +impl ClkpolR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CLKPOL_A { + pub const fn variant(&self) -> Clkpol { match self.bits { - false => CLKPOL_A::IDLELOW, - true => CLKPOL_A::IDLEHIGH, + false => Clkpol::Idlelow, + true => Clkpol::Idlehigh, } } - #[doc = "Checks if the value of the field is `IDLELOW`"] + #[doc = "The bus clock used in synchronous mode has a low base value"] #[inline(always)] pub fn is_idlelow(&self) -> bool { - *self == CLKPOL_A::IDLELOW + *self == Clkpol::Idlelow } - #[doc = "Checks if the value of the field is `IDLEHIGH`"] + #[doc = "The bus clock used in synchronous mode has a high base value"] #[inline(always)] pub fn is_idlehigh(&self) -> bool { - *self == CLKPOL_A::IDLEHIGH + *self == Clkpol::Idlehigh } } #[doc = "Field `CLKPOL` writer - Clock Polarity"] -pub type CLKPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, CLKPOL_A, O>; -impl<'a, const O: u8> CLKPOL_W<'a, O> { +pub type ClkpolW<'a, REG> = crate::BitWriter<'a, REG, Clkpol>; +impl<'a, REG> ClkpolW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The bus clock used in synchronous mode has a low base value"] #[inline(always)] - pub fn idlelow(self) -> &'a mut W { - self.variant(CLKPOL_A::IDLELOW) + pub fn idlelow(self) -> &'a mut crate::W { + self.variant(Clkpol::Idlelow) } #[doc = "The bus clock used in synchronous mode has a high base value"] #[inline(always)] - pub fn idlehigh(self) -> &'a mut W { - self.variant(CLKPOL_A::IDLEHIGH) + pub fn idlehigh(self) -> &'a mut crate::W { + self.variant(Clkpol::Idlehigh) } } -#[doc = "Field `CLKPHA` reader - Clock Edge for Setup/Sample"] -pub type CLKPHA_R = crate::BitReader; #[doc = "Clock Edge for Setup/Sample\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLKPHA_A { +pub enum Clkpha { #[doc = "0: Data is sampled on the leading edge and set-up on the trailing edge of the bus clock in synchronous mode"] - SAMPLELEADING = 0, + Sampleleading = 0, #[doc = "1: Data is set-up on the leading edge and sampled on the trailing edge of the bus clock in synchronous mode"] - SAMPLETRAILING = 1, + Sampletrailing = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLKPHA_A) -> Self { + fn from(variant: Clkpha) -> Self { variant as u8 != 0 } } -impl CLKPHA_R { +#[doc = "Field `CLKPHA` reader - Clock Edge for Setup/Sample"] +pub type ClkphaR = crate::BitReader; +impl ClkphaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CLKPHA_A { + pub const fn variant(&self) -> Clkpha { match self.bits { - false => CLKPHA_A::SAMPLELEADING, - true => CLKPHA_A::SAMPLETRAILING, + false => Clkpha::Sampleleading, + true => Clkpha::Sampletrailing, } } - #[doc = "Checks if the value of the field is `SAMPLELEADING`"] + #[doc = "Data is sampled on the leading edge and set-up on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] pub fn is_sampleleading(&self) -> bool { - *self == CLKPHA_A::SAMPLELEADING + *self == Clkpha::Sampleleading } - #[doc = "Checks if the value of the field is `SAMPLETRAILING`"] + #[doc = "Data is set-up on the leading edge and sampled on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] pub fn is_sampletrailing(&self) -> bool { - *self == CLKPHA_A::SAMPLETRAILING + *self == Clkpha::Sampletrailing } } #[doc = "Field `CLKPHA` writer - Clock Edge for Setup/Sample"] -pub type CLKPHA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, CLKPHA_A, O>; -impl<'a, const O: u8> CLKPHA_W<'a, O> { +pub type ClkphaW<'a, REG> = crate::BitWriter<'a, REG, Clkpha>; +impl<'a, REG> ClkphaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Data is sampled on the leading edge and set-up on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] - pub fn sampleleading(self) -> &'a mut W { - self.variant(CLKPHA_A::SAMPLELEADING) + pub fn sampleleading(self) -> &'a mut crate::W { + self.variant(Clkpha::Sampleleading) } #[doc = "Data is set-up on the leading edge and sampled on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] - pub fn sampletrailing(self) -> &'a mut W { - self.variant(CLKPHA_A::SAMPLETRAILING) + pub fn sampletrailing(self) -> &'a mut crate::W { + self.variant(Clkpha::Sampletrailing) } } -#[doc = "Field `CSINV` reader - Chip Select Invert"] -pub type CSINV_R = crate::BitReader; #[doc = "Chip Select Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CSINV_A { +pub enum Csinv { #[doc = "0: Chip select is active low"] - AL = 0, + Al = 0, #[doc = "1: Chip select is active high"] - AH = 1, + Ah = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CSINV_A) -> Self { + fn from(variant: Csinv) -> Self { variant as u8 != 0 } } -impl CSINV_R { +#[doc = "Field `CSINV` reader - Chip Select Invert"] +pub type CsinvR = crate::BitReader; +impl CsinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CSINV_A { + pub const fn variant(&self) -> Csinv { match self.bits { - false => CSINV_A::AL, - true => CSINV_A::AH, + false => Csinv::Al, + true => Csinv::Ah, } } - #[doc = "Checks if the value of the field is `AL`"] + #[doc = "Chip select is active low"] #[inline(always)] pub fn is_al(&self) -> bool { - *self == CSINV_A::AL + *self == Csinv::Al } - #[doc = "Checks if the value of the field is `AH`"] + #[doc = "Chip select is active high"] #[inline(always)] pub fn is_ah(&self) -> bool { - *self == CSINV_A::AH + *self == Csinv::Ah } } #[doc = "Field `CSINV` writer - Chip Select Invert"] -pub type CSINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, CSINV_A, O>; -impl<'a, const O: u8> CSINV_W<'a, O> { +pub type CsinvW<'a, REG> = crate::BitWriter<'a, REG, Csinv>; +impl<'a, REG> CsinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Chip select is active low"] #[inline(always)] - pub fn al(self) -> &'a mut W { - self.variant(CSINV_A::AL) + pub fn al(self) -> &'a mut crate::W { + self.variant(Csinv::Al) } #[doc = "Chip select is active high"] #[inline(always)] - pub fn ah(self) -> &'a mut W { - self.variant(CSINV_A::AH) + pub fn ah(self) -> &'a mut crate::W { + self.variant(Csinv::Ah) } } #[doc = "Field `AUTOTX` reader - Always Transmit When RXFIFO Not Full"] -pub type AUTOTX_R = crate::BitReader; +pub type AutotxR = crate::BitReader; #[doc = "Field `AUTOTX` writer - Always Transmit When RXFIFO Not Full"] -pub type AUTOTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, bool, O>; +pub type AutotxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOCS` reader - Automatic Chip Select"] -pub type AUTOCS_R = crate::BitReader; +pub type AutocsR = crate::BitReader; #[doc = "Field `AUTOCS` writer - Automatic Chip Select"] -pub type AUTOCS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, bool, O>; +pub type AutocsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLKPRSEN` reader - PRS CLK Enable"] -pub type CLKPRSEN_R = crate::BitReader; +pub type ClkprsenR = crate::BitReader; #[doc = "Field `CLKPRSEN` writer - PRS CLK Enable"] -pub type CLKPRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, bool, O>; +pub type ClkprsenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FORCELOAD` reader - Force Load to Shift Register"] -pub type FORCELOAD_R = crate::BitReader; +pub type ForceloadR = crate::BitReader; #[doc = "Field `FORCELOAD` writer - Force Load to Shift Register"] -pub type FORCELOAD_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG2_SPEC, bool, O>; +pub type ForceloadW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SDIV` reader - Sync Clock Div"] -pub type SDIV_R = crate::FieldReader; +pub type SdivR = crate::FieldReader; #[doc = "Field `SDIV` writer - Sync Clock Div"] -pub type SDIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG2_SPEC, u8, u8, 8, O>; +pub type SdivW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bit 0 - Main mode"] #[inline(always)] - pub fn master(&self) -> MASTER_R { - MASTER_R::new((self.bits & 1) != 0) + pub fn master(&self) -> MasterR { + MasterR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Clock Polarity"] #[inline(always)] - pub fn clkpol(&self) -> CLKPOL_R { - CLKPOL_R::new(((self.bits >> 1) & 1) != 0) + pub fn clkpol(&self) -> ClkpolR { + ClkpolR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Clock Edge for Setup/Sample"] #[inline(always)] - pub fn clkpha(&self) -> CLKPHA_R { - CLKPHA_R::new(((self.bits >> 2) & 1) != 0) + pub fn clkpha(&self) -> ClkphaR { + ClkphaR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Chip Select Invert"] #[inline(always)] - pub fn csinv(&self) -> CSINV_R { - CSINV_R::new(((self.bits >> 3) & 1) != 0) + pub fn csinv(&self) -> CsinvR { + CsinvR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Always Transmit When RXFIFO Not Full"] #[inline(always)] - pub fn autotx(&self) -> AUTOTX_R { - AUTOTX_R::new(((self.bits >> 4) & 1) != 0) + pub fn autotx(&self) -> AutotxR { + AutotxR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Automatic Chip Select"] #[inline(always)] - pub fn autocs(&self) -> AUTOCS_R { - AUTOCS_R::new(((self.bits >> 5) & 1) != 0) + pub fn autocs(&self) -> AutocsR { + AutocsR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - PRS CLK Enable"] #[inline(always)] - pub fn clkprsen(&self) -> CLKPRSEN_R { - CLKPRSEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn clkprsen(&self) -> ClkprsenR { + ClkprsenR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Force Load to Shift Register"] #[inline(always)] - pub fn forceload(&self) -> FORCELOAD_R { - FORCELOAD_R::new(((self.bits >> 7) & 1) != 0) + pub fn forceload(&self) -> ForceloadR { + ForceloadR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 24:31 - Sync Clock Div"] #[inline(always)] - pub fn sdiv(&self) -> SDIV_R { - SDIV_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn sdiv(&self) -> SdivR { + SdivR::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bit 0 - Main mode"] #[inline(always)] #[must_use] - pub fn master(&mut self) -> MASTER_W<0> { - MASTER_W::new(self) + pub fn master(&mut self) -> MasterW { + MasterW::new(self, 0) } #[doc = "Bit 1 - Clock Polarity"] #[inline(always)] #[must_use] - pub fn clkpol(&mut self) -> CLKPOL_W<1> { - CLKPOL_W::new(self) + pub fn clkpol(&mut self) -> ClkpolW { + ClkpolW::new(self, 1) } #[doc = "Bit 2 - Clock Edge for Setup/Sample"] #[inline(always)] #[must_use] - pub fn clkpha(&mut self) -> CLKPHA_W<2> { - CLKPHA_W::new(self) + pub fn clkpha(&mut self) -> ClkphaW { + ClkphaW::new(self, 2) } #[doc = "Bit 3 - Chip Select Invert"] #[inline(always)] #[must_use] - pub fn csinv(&mut self) -> CSINV_W<3> { - CSINV_W::new(self) + pub fn csinv(&mut self) -> CsinvW { + CsinvW::new(self, 3) } #[doc = "Bit 4 - Always Transmit When RXFIFO Not Full"] #[inline(always)] #[must_use] - pub fn autotx(&mut self) -> AUTOTX_W<4> { - AUTOTX_W::new(self) + pub fn autotx(&mut self) -> AutotxW { + AutotxW::new(self, 4) } #[doc = "Bit 5 - Automatic Chip Select"] #[inline(always)] #[must_use] - pub fn autocs(&mut self) -> AUTOCS_W<5> { - AUTOCS_W::new(self) + pub fn autocs(&mut self) -> AutocsW { + AutocsW::new(self, 5) } #[doc = "Bit 6 - PRS CLK Enable"] #[inline(always)] #[must_use] - pub fn clkprsen(&mut self) -> CLKPRSEN_W<6> { - CLKPRSEN_W::new(self) + pub fn clkprsen(&mut self) -> ClkprsenW { + ClkprsenW::new(self, 6) } #[doc = "Bit 7 - Force Load to Shift Register"] #[inline(always)] #[must_use] - pub fn forceload(&mut self) -> FORCELOAD_W<7> { - FORCELOAD_W::new(self) + pub fn forceload(&mut self) -> ForceloadW { + ForceloadW::new(self, 7) } #[doc = "Bits 24:31 - Sync Clock Div"] #[inline(always)] #[must_use] - pub fn sdiv(&mut self) -> SDIV_W<24> { - SDIV_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sdiv(&mut self) -> SdivW { + SdivW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg2](index.html) module"] -pub struct CFG2_SPEC; -impl crate::RegisterSpec for CFG2_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cfg2Spec; +impl crate::RegisterSpec for Cfg2Spec { type Ux = u32; } -#[doc = "`read()` method returns [cfg2::R](R) reader structure"] -impl crate::Readable for CFG2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg2::W](W) writer structure"] -impl crate::Writable for CFG2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg2::R`](R) reader structure"] +impl crate::Readable for Cfg2Spec {} +#[doc = "`write(|w| ..)` method takes [`cfg2::W`](W) writer structure"] +impl crate::Writable for Cfg2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG2 to value 0x20"] -impl crate::Resettable for CFG2_SPEC { - const RESET_VALUE: Self::Ux = 0x20; +impl crate::Resettable for Cfg2Spec { + const RESET_VALUE: u32 = 0x20; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/clkdiv.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/clkdiv.rs index 5158bd5..beab8d8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/clkdiv.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/clkdiv.rs @@ -1,80 +1,40 @@ #[doc = "Register `CLKDIV` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKDIV` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DIV` reader - Fractional Clock Divider"] -pub type DIV_R = crate::FieldReader; +pub type DivR = crate::FieldReader; #[doc = "Field `DIV` writer - Fractional Clock Divider"] -pub type DIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CLKDIV_SPEC, u32, u32, 20, O>; +pub type DivW<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { #[doc = "Bits 3:22 - Fractional Clock Divider"] #[inline(always)] - pub fn div(&self) -> DIV_R { - DIV_R::new((self.bits >> 3) & 0x000f_ffff) + pub fn div(&self) -> DivR { + DivR::new((self.bits >> 3) & 0x000f_ffff) } } impl W { #[doc = "Bits 3:22 - Fractional Clock Divider"] #[inline(always)] #[must_use] - pub fn div(&mut self) -> DIV_W<3> { - DIV_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn div(&mut self) -> DivW { + DivW::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clkdiv](index.html) module"] -pub struct CLKDIV_SPEC; -impl crate::RegisterSpec for CLKDIV_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ClkdivSpec; +impl crate::RegisterSpec for ClkdivSpec { type Ux = u32; } -#[doc = "`read()` method returns [clkdiv::R](R) reader structure"] -impl crate::Readable for CLKDIV_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clkdiv::W](W) writer structure"] -impl crate::Writable for CLKDIV_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`clkdiv::R`](R) reader structure"] +impl crate::Readable for ClkdivSpec {} +#[doc = "`write(|w| ..)` method takes [`clkdiv::W`](W) writer structure"] +impl crate::Writable for ClkdivSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV to value 0"] -impl crate::Resettable for CLKDIV_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ClkdivSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/cmd.rs index 8d3465f..39d3e79 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/cmd.rs @@ -1,116 +1,91 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RXEN` writer - Receiver Enable"] -pub type RXEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXDIS` writer - Receiver Disable"] -pub type RXDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXEN` writer - Transmitter Enable"] -pub type TXEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXDIS` writer - Transmitter Disable"] -pub type TXDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXBLOCKEN` writer - Receiver Block Enable"] -pub type RXBLOCKEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxblockenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXBLOCKDIS` writer - Receiver Block Disable"] -pub type RXBLOCKDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxblockdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTRIEN` writer - Transmitter Tristate Enable"] -pub type TXTRIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxtrienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTRIDIS` writer - Transmitter Tristate Disable"] -pub type TXTRIDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxtridisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEARTX` writer - Clear TX FIFO"] -pub type CLEARTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type CleartxW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Receiver Enable"] #[inline(always)] #[must_use] - pub fn rxen(&mut self) -> RXEN_W<0> { - RXEN_W::new(self) + pub fn rxen(&mut self) -> RxenW { + RxenW::new(self, 0) } #[doc = "Bit 1 - Receiver Disable"] #[inline(always)] #[must_use] - pub fn rxdis(&mut self) -> RXDIS_W<1> { - RXDIS_W::new(self) + pub fn rxdis(&mut self) -> RxdisW { + RxdisW::new(self, 1) } #[doc = "Bit 2 - Transmitter Enable"] #[inline(always)] #[must_use] - pub fn txen(&mut self) -> TXEN_W<2> { - TXEN_W::new(self) + pub fn txen(&mut self) -> TxenW { + TxenW::new(self, 2) } #[doc = "Bit 3 - Transmitter Disable"] #[inline(always)] #[must_use] - pub fn txdis(&mut self) -> TXDIS_W<3> { - TXDIS_W::new(self) + pub fn txdis(&mut self) -> TxdisW { + TxdisW::new(self, 3) } #[doc = "Bit 4 - Receiver Block Enable"] #[inline(always)] #[must_use] - pub fn rxblocken(&mut self) -> RXBLOCKEN_W<4> { - RXBLOCKEN_W::new(self) + pub fn rxblocken(&mut self) -> RxblockenW { + RxblockenW::new(self, 4) } #[doc = "Bit 5 - Receiver Block Disable"] #[inline(always)] #[must_use] - pub fn rxblockdis(&mut self) -> RXBLOCKDIS_W<5> { - RXBLOCKDIS_W::new(self) + pub fn rxblockdis(&mut self) -> RxblockdisW { + RxblockdisW::new(self, 5) } #[doc = "Bit 6 - Transmitter Tristate Enable"] #[inline(always)] #[must_use] - pub fn txtrien(&mut self) -> TXTRIEN_W<6> { - TXTRIEN_W::new(self) + pub fn txtrien(&mut self) -> TxtrienW { + TxtrienW::new(self, 6) } #[doc = "Bit 7 - Transmitter Tristate Disable"] #[inline(always)] #[must_use] - pub fn txtridis(&mut self) -> TXTRIDIS_W<7> { - TXTRIDIS_W::new(self) + pub fn txtridis(&mut self) -> TxtridisW { + TxtridisW::new(self, 7) } #[doc = "Bit 8 - Clear TX FIFO"] #[inline(always)] #[must_use] - pub fn cleartx(&mut self) -> CLEARTX_W<8> { - CLEARTX_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cleartx(&mut self) -> CleartxW { + CleartxW::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/dtxdatcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/dtxdatcfg.rs index 8ae017b..67cc6f0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/dtxdatcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/dtxdatcfg.rs @@ -1,80 +1,40 @@ #[doc = "Register `DTXDATCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTXDATCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTXDAT` reader - Default TX DATA"] -pub type DTXDAT_R = crate::FieldReader; +pub type DtxdatR = crate::FieldReader; #[doc = "Field `DTXDAT` writer - Default TX DATA"] -pub type DTXDAT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTXDATCFG_SPEC, u16, u16, 16, O>; +pub type DtxdatW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Default TX DATA"] #[inline(always)] - pub fn dtxdat(&self) -> DTXDAT_R { - DTXDAT_R::new((self.bits & 0xffff) as u16) + pub fn dtxdat(&self) -> DtxdatR { + DtxdatR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Default TX DATA"] #[inline(always)] #[must_use] - pub fn dtxdat(&mut self) -> DTXDAT_W<0> { - DTXDAT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtxdat(&mut self) -> DtxdatW { + DtxdatW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtxdatcfg](index.html) module"] -pub struct DTXDATCFG_SPEC; -impl crate::RegisterSpec for DTXDATCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtxdatcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtxdatcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtxdatcfgSpec; +impl crate::RegisterSpec for DtxdatcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtxdatcfg::R](R) reader structure"] -impl crate::Readable for DTXDATCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtxdatcfg::W](W) writer structure"] -impl crate::Writable for DTXDATCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtxdatcfg::R`](R) reader structure"] +impl crate::Readable for DtxdatcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dtxdatcfg::W`](W) writer structure"] +impl crate::Writable for DtxdatcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTXDATCFG to value 0"] -impl crate::Resettable for DTXDATCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtxdatcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/en.rs index f15bf65..7298843 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Module enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Module enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Module enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Module enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/framecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/framecfg.rs index 037aaa3..7ad7134 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/framecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/framecfg.rs @@ -1,399 +1,381 @@ #[doc = "Register `FRAMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `FRAMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DATABITS` reader - Data-Bit Mode"] -pub type DATABITS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Data-Bit Mode\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DATABITS_A { +pub enum Databits { #[doc = "1: Each frame contains 7 data bits"] - SEVEN = 1, + Seven = 1, #[doc = "2: Each frame contains 8 data bits"] - EIGHT = 2, + Eight = 2, #[doc = "3: Each frame contains 9 data bits"] - NINE = 3, + Nine = 3, #[doc = "4: Each frame contains 10 data bits"] - TEN = 4, + Ten = 4, #[doc = "5: Each frame contains 11 data bits"] - ELEVEN = 5, + Eleven = 5, #[doc = "6: Each frame contains 12 data bits"] - TWELVE = 6, + Twelve = 6, #[doc = "7: Each frame contains 13 data bits"] - THIRTEEN = 7, + Thirteen = 7, #[doc = "8: Each frame contains 14 data bits"] - FOURTEEN = 8, + Fourteen = 8, #[doc = "9: Each frame contains 15 data bits"] - FIFTEEN = 9, + Fifteen = 9, #[doc = "10: Each frame contains 16 data bits"] - SIXTEEN = 10, + Sixteen = 10, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DATABITS_A) -> Self { + fn from(variant: Databits) -> Self { variant as _ } } -impl DATABITS_R { +impl crate::FieldSpec for Databits { + type Ux = u8; +} +impl crate::IsEnum for Databits {} +#[doc = "Field `DATABITS` reader - Data-Bit Mode"] +pub type DatabitsR = crate::FieldReader; +impl DatabitsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(DATABITS_A::SEVEN), - 2 => Some(DATABITS_A::EIGHT), - 3 => Some(DATABITS_A::NINE), - 4 => Some(DATABITS_A::TEN), - 5 => Some(DATABITS_A::ELEVEN), - 6 => Some(DATABITS_A::TWELVE), - 7 => Some(DATABITS_A::THIRTEEN), - 8 => Some(DATABITS_A::FOURTEEN), - 9 => Some(DATABITS_A::FIFTEEN), - 10 => Some(DATABITS_A::SIXTEEN), + 1 => Some(Databits::Seven), + 2 => Some(Databits::Eight), + 3 => Some(Databits::Nine), + 4 => Some(Databits::Ten), + 5 => Some(Databits::Eleven), + 6 => Some(Databits::Twelve), + 7 => Some(Databits::Thirteen), + 8 => Some(Databits::Fourteen), + 9 => Some(Databits::Fifteen), + 10 => Some(Databits::Sixteen), _ => None, } } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "Each frame contains 7 data bits"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == DATABITS_A::SEVEN + *self == Databits::Seven } - #[doc = "Checks if the value of the field is `EIGHT`"] + #[doc = "Each frame contains 8 data bits"] #[inline(always)] pub fn is_eight(&self) -> bool { - *self == DATABITS_A::EIGHT + *self == Databits::Eight } - #[doc = "Checks if the value of the field is `NINE`"] + #[doc = "Each frame contains 9 data bits"] #[inline(always)] pub fn is_nine(&self) -> bool { - *self == DATABITS_A::NINE + *self == Databits::Nine } - #[doc = "Checks if the value of the field is `TEN`"] + #[doc = "Each frame contains 10 data bits"] #[inline(always)] pub fn is_ten(&self) -> bool { - *self == DATABITS_A::TEN + *self == Databits::Ten } - #[doc = "Checks if the value of the field is `ELEVEN`"] + #[doc = "Each frame contains 11 data bits"] #[inline(always)] pub fn is_eleven(&self) -> bool { - *self == DATABITS_A::ELEVEN + *self == Databits::Eleven } - #[doc = "Checks if the value of the field is `TWELVE`"] + #[doc = "Each frame contains 12 data bits"] #[inline(always)] pub fn is_twelve(&self) -> bool { - *self == DATABITS_A::TWELVE + *self == Databits::Twelve } - #[doc = "Checks if the value of the field is `THIRTEEN`"] + #[doc = "Each frame contains 13 data bits"] #[inline(always)] pub fn is_thirteen(&self) -> bool { - *self == DATABITS_A::THIRTEEN + *self == Databits::Thirteen } - #[doc = "Checks if the value of the field is `FOURTEEN`"] + #[doc = "Each frame contains 14 data bits"] #[inline(always)] pub fn is_fourteen(&self) -> bool { - *self == DATABITS_A::FOURTEEN + *self == Databits::Fourteen } - #[doc = "Checks if the value of the field is `FIFTEEN`"] + #[doc = "Each frame contains 15 data bits"] #[inline(always)] pub fn is_fifteen(&self) -> bool { - *self == DATABITS_A::FIFTEEN + *self == Databits::Fifteen } - #[doc = "Checks if the value of the field is `SIXTEEN`"] + #[doc = "Each frame contains 16 data bits"] #[inline(always)] pub fn is_sixteen(&self) -> bool { - *self == DATABITS_A::SIXTEEN + *self == Databits::Sixteen } } #[doc = "Field `DATABITS` writer - Data-Bit Mode"] -pub type DATABITS_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, FRAMECFG_SPEC, u8, DATABITS_A, 4, O>; -impl<'a, const O: u8> DATABITS_W<'a, O> { +pub type DatabitsW<'a, REG> = crate::FieldWriter<'a, REG, 4, Databits>; +impl<'a, REG> DatabitsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Each frame contains 7 data bits"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(DATABITS_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Databits::Seven) } #[doc = "Each frame contains 8 data bits"] #[inline(always)] - pub fn eight(self) -> &'a mut W { - self.variant(DATABITS_A::EIGHT) + pub fn eight(self) -> &'a mut crate::W { + self.variant(Databits::Eight) } #[doc = "Each frame contains 9 data bits"] #[inline(always)] - pub fn nine(self) -> &'a mut W { - self.variant(DATABITS_A::NINE) + pub fn nine(self) -> &'a mut crate::W { + self.variant(Databits::Nine) } #[doc = "Each frame contains 10 data bits"] #[inline(always)] - pub fn ten(self) -> &'a mut W { - self.variant(DATABITS_A::TEN) + pub fn ten(self) -> &'a mut crate::W { + self.variant(Databits::Ten) } #[doc = "Each frame contains 11 data bits"] #[inline(always)] - pub fn eleven(self) -> &'a mut W { - self.variant(DATABITS_A::ELEVEN) + pub fn eleven(self) -> &'a mut crate::W { + self.variant(Databits::Eleven) } #[doc = "Each frame contains 12 data bits"] #[inline(always)] - pub fn twelve(self) -> &'a mut W { - self.variant(DATABITS_A::TWELVE) + pub fn twelve(self) -> &'a mut crate::W { + self.variant(Databits::Twelve) } #[doc = "Each frame contains 13 data bits"] #[inline(always)] - pub fn thirteen(self) -> &'a mut W { - self.variant(DATABITS_A::THIRTEEN) + pub fn thirteen(self) -> &'a mut crate::W { + self.variant(Databits::Thirteen) } #[doc = "Each frame contains 14 data bits"] #[inline(always)] - pub fn fourteen(self) -> &'a mut W { - self.variant(DATABITS_A::FOURTEEN) + pub fn fourteen(self) -> &'a mut crate::W { + self.variant(Databits::Fourteen) } #[doc = "Each frame contains 15 data bits"] #[inline(always)] - pub fn fifteen(self) -> &'a mut W { - self.variant(DATABITS_A::FIFTEEN) + pub fn fifteen(self) -> &'a mut crate::W { + self.variant(Databits::Fifteen) } #[doc = "Each frame contains 16 data bits"] #[inline(always)] - pub fn sixteen(self) -> &'a mut W { - self.variant(DATABITS_A::SIXTEEN) + pub fn sixteen(self) -> &'a mut crate::W { + self.variant(Databits::Sixteen) } } -#[doc = "Field `PARITY` reader - Parity-Bit Mode"] -pub type PARITY_R = crate::FieldReader; #[doc = "Parity-Bit Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PARITY_A { +pub enum Parity { #[doc = "0: Parity bits are not used"] - NONE = 0, + None = 0, #[doc = "2: Even parity are used. Parity bits are automatically generated and checked by hardware."] - EVEN = 2, + Even = 2, #[doc = "3: Odd parity is used. Parity bits are automatically generated and checked by hardware."] - ODD = 3, + Odd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PARITY_A) -> Self { + fn from(variant: Parity) -> Self { variant as _ } } -impl PARITY_R { +impl crate::FieldSpec for Parity { + type Ux = u8; +} +impl crate::IsEnum for Parity {} +#[doc = "Field `PARITY` reader - Parity-Bit Mode"] +pub type ParityR = crate::FieldReader; +impl ParityR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PARITY_A::NONE), - 2 => Some(PARITY_A::EVEN), - 3 => Some(PARITY_A::ODD), + 0 => Some(Parity::None), + 2 => Some(Parity::Even), + 3 => Some(Parity::Odd), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Parity bits are not used"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == PARITY_A::NONE + *self == Parity::None } - #[doc = "Checks if the value of the field is `EVEN`"] + #[doc = "Even parity are used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] pub fn is_even(&self) -> bool { - *self == PARITY_A::EVEN + *self == Parity::Even } - #[doc = "Checks if the value of the field is `ODD`"] + #[doc = "Odd parity is used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] pub fn is_odd(&self) -> bool { - *self == PARITY_A::ODD + *self == Parity::Odd } } #[doc = "Field `PARITY` writer - Parity-Bit Mode"] -pub type PARITY_W<'a, const O: u8> = crate::FieldWriter<'a, u32, FRAMECFG_SPEC, u8, PARITY_A, 2, O>; -impl<'a, const O: u8> PARITY_W<'a, O> { +pub type ParityW<'a, REG> = crate::FieldWriter<'a, REG, 2, Parity>; +impl<'a, REG> ParityW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Parity bits are not used"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(PARITY_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Parity::None) } #[doc = "Even parity are used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] - pub fn even(self) -> &'a mut W { - self.variant(PARITY_A::EVEN) + pub fn even(self) -> &'a mut crate::W { + self.variant(Parity::Even) } #[doc = "Odd parity is used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] - pub fn odd(self) -> &'a mut W { - self.variant(PARITY_A::ODD) + pub fn odd(self) -> &'a mut crate::W { + self.variant(Parity::Odd) } } -#[doc = "Field `STOPBITS` reader - Stop-Bit Mode"] -pub type STOPBITS_R = crate::FieldReader; #[doc = "Stop-Bit Mode\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STOPBITS_A { +pub enum Stopbits { #[doc = "0: The transmitter generates a half stop bit. Stop-bits are not verified by receiver"] - HALF = 0, + Half = 0, #[doc = "1: One stop bit is generated and verified"] - ONE = 1, + One = 1, #[doc = "2: The transmitter generates one and a half stop bit. The receiver verifies the first stop bit"] - ONEANDAHALF = 2, + Oneandahalf = 2, #[doc = "3: The transmitter generates two stop bits. The receiver checks the first stop-bit only"] - TWO = 3, + Two = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STOPBITS_A) -> Self { + fn from(variant: Stopbits) -> Self { variant as _ } } -impl STOPBITS_R { +impl crate::FieldSpec for Stopbits { + type Ux = u8; +} +impl crate::IsEnum for Stopbits {} +#[doc = "Field `STOPBITS` reader - Stop-Bit Mode"] +pub type StopbitsR = crate::FieldReader; +impl StopbitsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> STOPBITS_A { + pub const fn variant(&self) -> Stopbits { match self.bits { - 0 => STOPBITS_A::HALF, - 1 => STOPBITS_A::ONE, - 2 => STOPBITS_A::ONEANDAHALF, - 3 => STOPBITS_A::TWO, + 0 => Stopbits::Half, + 1 => Stopbits::One, + 2 => Stopbits::Oneandahalf, + 3 => Stopbits::Two, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `HALF`"] + #[doc = "The transmitter generates a half stop bit. Stop-bits are not verified by receiver"] #[inline(always)] pub fn is_half(&self) -> bool { - *self == STOPBITS_A::HALF + *self == Stopbits::Half } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "One stop bit is generated and verified"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == STOPBITS_A::ONE + *self == Stopbits::One } - #[doc = "Checks if the value of the field is `ONEANDAHALF`"] + #[doc = "The transmitter generates one and a half stop bit. The receiver verifies the first stop bit"] #[inline(always)] pub fn is_oneandahalf(&self) -> bool { - *self == STOPBITS_A::ONEANDAHALF + *self == Stopbits::Oneandahalf } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "The transmitter generates two stop bits. The receiver checks the first stop-bit only"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == STOPBITS_A::TWO + *self == Stopbits::Two } } #[doc = "Field `STOPBITS` writer - Stop-Bit Mode"] -pub type STOPBITS_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, FRAMECFG_SPEC, u8, STOPBITS_A, 2, O>; -impl<'a, const O: u8> STOPBITS_W<'a, O> { +pub type StopbitsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Stopbits, crate::Safe>; +impl<'a, REG> StopbitsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The transmitter generates a half stop bit. Stop-bits are not verified by receiver"] #[inline(always)] - pub fn half(self) -> &'a mut W { - self.variant(STOPBITS_A::HALF) + pub fn half(self) -> &'a mut crate::W { + self.variant(Stopbits::Half) } #[doc = "One stop bit is generated and verified"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(STOPBITS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Stopbits::One) } #[doc = "The transmitter generates one and a half stop bit. The receiver verifies the first stop bit"] #[inline(always)] - pub fn oneandahalf(self) -> &'a mut W { - self.variant(STOPBITS_A::ONEANDAHALF) + pub fn oneandahalf(self) -> &'a mut crate::W { + self.variant(Stopbits::Oneandahalf) } #[doc = "The transmitter generates two stop bits. The receiver checks the first stop-bit only"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(STOPBITS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Stopbits::Two) } } impl R { #[doc = "Bits 0:3 - Data-Bit Mode"] #[inline(always)] - pub fn databits(&self) -> DATABITS_R { - DATABITS_R::new((self.bits & 0x0f) as u8) + pub fn databits(&self) -> DatabitsR { + DatabitsR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - Parity-Bit Mode"] #[inline(always)] - pub fn parity(&self) -> PARITY_R { - PARITY_R::new(((self.bits >> 8) & 3) as u8) + pub fn parity(&self) -> ParityR { + ParityR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 12:13 - Stop-Bit Mode"] #[inline(always)] - pub fn stopbits(&self) -> STOPBITS_R { - STOPBITS_R::new(((self.bits >> 12) & 3) as u8) + pub fn stopbits(&self) -> StopbitsR { + StopbitsR::new(((self.bits >> 12) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - Data-Bit Mode"] #[inline(always)] #[must_use] - pub fn databits(&mut self) -> DATABITS_W<0> { - DATABITS_W::new(self) + pub fn databits(&mut self) -> DatabitsW { + DatabitsW::new(self, 0) } #[doc = "Bits 8:9 - Parity-Bit Mode"] #[inline(always)] #[must_use] - pub fn parity(&mut self) -> PARITY_W<8> { - PARITY_W::new(self) + pub fn parity(&mut self) -> ParityW { + ParityW::new(self, 8) } #[doc = "Bits 12:13 - Stop-Bit Mode"] #[inline(always)] #[must_use] - pub fn stopbits(&mut self) -> STOPBITS_W<12> { - STOPBITS_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stopbits(&mut self) -> StopbitsW { + StopbitsW::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [framecfg](index.html) module"] -pub struct FRAMECFG_SPEC; -impl crate::RegisterSpec for FRAMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`framecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`framecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct FramecfgSpec; +impl crate::RegisterSpec for FramecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [framecfg::R](R) reader structure"] -impl crate::Readable for FRAMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [framecfg::W](W) writer structure"] -impl crate::Writable for FRAMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`framecfg::R`](R) reader structure"] +impl crate::Readable for FramecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`framecfg::W`](W) writer structure"] +impl crate::Writable for FramecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FRAMECFG to value 0x1002"] -impl crate::Resettable for FRAMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0x1002; +impl crate::Resettable for FramecfgSpec { + const RESET_VALUE: u32 = 0x1002; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/ien.rs index 8013fa6..b81234b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/ien.rs @@ -1,335 +1,295 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXC` reader - TX Complete Enable"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXC` writer - TX Complete Enable"] -pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFL` reader - TX FIFO Level Enable"] -pub type TXFL_R = crate::BitReader; +pub type TxflR = crate::BitReader; #[doc = "Field `TXFL` writer - TX FIFO Level Enable"] -pub type TXFL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxflW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFL` reader - RX FIFO Level Enable"] -pub type RXFL_R = crate::BitReader; +pub type RxflR = crate::BitReader; #[doc = "Field `RXFL` writer - RX FIFO Level Enable"] -pub type RXFL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxflW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFULL` reader - RX FIFO Full Enable"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXFULL` writer - RX FIFO Full Enable"] -pub type RXFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxfullW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXOF` reader - RX FIFO Overflow Enable"] -pub type RXOF_R = crate::BitReader; +pub type RxofR = crate::BitReader; #[doc = "Field `RXOF` writer - RX FIFO Overflow Enable"] -pub type RXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUF` reader - RX FIFO Underflow Enable"] -pub type RXUF_R = crate::BitReader; +pub type RxufR = crate::BitReader; #[doc = "Field `RXUF` writer - RX FIFO Underflow Enable"] -pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXOF` reader - TX FIFO Overflow Enable"] -pub type TXOF_R = crate::BitReader; +pub type TxofR = crate::BitReader; #[doc = "Field `TXOF` writer - TX FIFO Overflow Enable"] -pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXUF` reader - TX FIFO Underflow Enable"] -pub type TXUF_R = crate::BitReader; +pub type TxufR = crate::BitReader; #[doc = "Field `TXUF` writer - TX FIFO Underflow Enable"] -pub type TXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PERR` reader - Parity Error Enable"] -pub type PERR_R = crate::BitReader; +pub type PerrR = crate::BitReader; #[doc = "Field `PERR` writer - Parity Error Enable"] -pub type PERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FERR` reader - Framing Error Enable"] -pub type FERR_R = crate::BitReader; +pub type FerrR = crate::BitReader; #[doc = "Field `FERR` writer - Framing Error Enable"] -pub type FERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPAF` reader - Multi-Processor Addr Frame Enable"] -pub type MPAF_R = crate::BitReader; +pub type MpafR = crate::BitReader; #[doc = "Field `MPAF` writer - Multi-Processor Addr Frame Enable"] -pub type MPAF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type MpafW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOADERR` reader - Load Error Enable"] -pub type LOADERR_R = crate::BitReader; +pub type LoaderrR = crate::BitReader; #[doc = "Field `LOADERR` writer - Load Error Enable"] -pub type LOADERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type LoaderrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCF` reader - Collision Check Fail Enable"] -pub type CCF_R = crate::BitReader; +pub type CcfR = crate::BitReader; #[doc = "Field `CCF` writer - Collision Check Fail Enable"] -pub type CCF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type CcfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXIDLE` reader - TX IDLE Enable"] -pub type TXIDLE_R = crate::BitReader; +pub type TxidleR = crate::BitReader; #[doc = "Field `TXIDLE` writer - TX IDLE Enable"] -pub type TXIDLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxidleW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STARTF` reader - Start Frame Enable"] -pub type STARTF_R = crate::BitReader; +pub type StartfR = crate::BitReader; #[doc = "Field `STARTF` writer - Start Frame Enable"] -pub type STARTF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type StartfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SIGF` reader - Signal Frame Enable"] -pub type SIGF_R = crate::BitReader; +pub type SigfR = crate::BitReader; #[doc = "Field `SIGF` writer - Signal Frame Enable"] -pub type SIGF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SigfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOBAUDDONE` reader - Auto Baud Complete Enable"] -pub type AUTOBAUDDONE_R = crate::BitReader; +pub type AutobauddoneR = crate::BitReader; #[doc = "Field `AUTOBAUDDONE` writer - Auto Baud Complete Enable"] -pub type AUTOBAUDDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AutobauddoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXTO` reader - RX Timeout Enable"] -pub type RXTO_R = crate::BitReader; +pub type RxtoR = crate::BitReader; #[doc = "Field `RXTO` writer - RX Timeout Enable"] -pub type RXTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxtoW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - TX Complete Enable"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new((self.bits & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - TX FIFO Level Enable"] #[inline(always)] - pub fn txfl(&self) -> TXFL_R { - TXFL_R::new(((self.bits >> 1) & 1) != 0) + pub fn txfl(&self) -> TxflR { + TxflR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RX FIFO Level Enable"] #[inline(always)] - pub fn rxfl(&self) -> RXFL_R { - RXFL_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxfl(&self) -> RxflR { + RxflR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - RX FIFO Full Enable"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - RX FIFO Overflow Enable"] #[inline(always)] - pub fn rxof(&self) -> RXOF_R { - RXOF_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxof(&self) -> RxofR { + RxofR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - RX FIFO Underflow Enable"] #[inline(always)] - pub fn rxuf(&self) -> RXUF_R { - RXUF_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxuf(&self) -> RxufR { + RxufR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX FIFO Overflow Enable"] #[inline(always)] - pub fn txof(&self) -> TXOF_R { - TXOF_R::new(((self.bits >> 6) & 1) != 0) + pub fn txof(&self) -> TxofR { + TxofR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - TX FIFO Underflow Enable"] #[inline(always)] - pub fn txuf(&self) -> TXUF_R { - TXUF_R::new(((self.bits >> 7) & 1) != 0) + pub fn txuf(&self) -> TxufR { + TxufR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Parity Error Enable"] #[inline(always)] - pub fn perr(&self) -> PERR_R { - PERR_R::new(((self.bits >> 8) & 1) != 0) + pub fn perr(&self) -> PerrR { + PerrR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Framing Error Enable"] #[inline(always)] - pub fn ferr(&self) -> FERR_R { - FERR_R::new(((self.bits >> 9) & 1) != 0) + pub fn ferr(&self) -> FerrR { + FerrR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Multi-Processor Addr Frame Enable"] #[inline(always)] - pub fn mpaf(&self) -> MPAF_R { - MPAF_R::new(((self.bits >> 10) & 1) != 0) + pub fn mpaf(&self) -> MpafR { + MpafR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Load Error Enable"] #[inline(always)] - pub fn loaderr(&self) -> LOADERR_R { - LOADERR_R::new(((self.bits >> 11) & 1) != 0) + pub fn loaderr(&self) -> LoaderrR { + LoaderrR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Collision Check Fail Enable"] #[inline(always)] - pub fn ccf(&self) -> CCF_R { - CCF_R::new(((self.bits >> 12) & 1) != 0) + pub fn ccf(&self) -> CcfR { + CcfR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - TX IDLE Enable"] #[inline(always)] - pub fn txidle(&self) -> TXIDLE_R { - TXIDLE_R::new(((self.bits >> 13) & 1) != 0) + pub fn txidle(&self) -> TxidleR { + TxidleR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 18 - Start Frame Enable"] #[inline(always)] - pub fn startf(&self) -> STARTF_R { - STARTF_R::new(((self.bits >> 18) & 1) != 0) + pub fn startf(&self) -> StartfR { + StartfR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Signal Frame Enable"] #[inline(always)] - pub fn sigf(&self) -> SIGF_R { - SIGF_R::new(((self.bits >> 19) & 1) != 0) + pub fn sigf(&self) -> SigfR { + SigfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 24 - Auto Baud Complete Enable"] #[inline(always)] - pub fn autobauddone(&self) -> AUTOBAUDDONE_R { - AUTOBAUDDONE_R::new(((self.bits >> 24) & 1) != 0) + pub fn autobauddone(&self) -> AutobauddoneR { + AutobauddoneR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - RX Timeout Enable"] #[inline(always)] - pub fn rxto(&self) -> RXTO_R { - RXTO_R::new(((self.bits >> 25) & 1) != 0) + pub fn rxto(&self) -> RxtoR { + RxtoR::new(((self.bits >> 25) & 1) != 0) } } impl W { #[doc = "Bit 0 - TX Complete Enable"] #[inline(always)] #[must_use] - pub fn txc(&mut self) -> TXC_W<0> { - TXC_W::new(self) + pub fn txc(&mut self) -> TxcW { + TxcW::new(self, 0) } #[doc = "Bit 1 - TX FIFO Level Enable"] #[inline(always)] #[must_use] - pub fn txfl(&mut self) -> TXFL_W<1> { - TXFL_W::new(self) + pub fn txfl(&mut self) -> TxflW { + TxflW::new(self, 1) } #[doc = "Bit 2 - RX FIFO Level Enable"] #[inline(always)] #[must_use] - pub fn rxfl(&mut self) -> RXFL_W<2> { - RXFL_W::new(self) + pub fn rxfl(&mut self) -> RxflW { + RxflW::new(self, 2) } #[doc = "Bit 3 - RX FIFO Full Enable"] #[inline(always)] #[must_use] - pub fn rxfull(&mut self) -> RXFULL_W<3> { - RXFULL_W::new(self) + pub fn rxfull(&mut self) -> RxfullW { + RxfullW::new(self, 3) } #[doc = "Bit 4 - RX FIFO Overflow Enable"] #[inline(always)] #[must_use] - pub fn rxof(&mut self) -> RXOF_W<4> { - RXOF_W::new(self) + pub fn rxof(&mut self) -> RxofW { + RxofW::new(self, 4) } #[doc = "Bit 5 - RX FIFO Underflow Enable"] #[inline(always)] #[must_use] - pub fn rxuf(&mut self) -> RXUF_W<5> { - RXUF_W::new(self) + pub fn rxuf(&mut self) -> RxufW { + RxufW::new(self, 5) } #[doc = "Bit 6 - TX FIFO Overflow Enable"] #[inline(always)] #[must_use] - pub fn txof(&mut self) -> TXOF_W<6> { - TXOF_W::new(self) + pub fn txof(&mut self) -> TxofW { + TxofW::new(self, 6) } #[doc = "Bit 7 - TX FIFO Underflow Enable"] #[inline(always)] #[must_use] - pub fn txuf(&mut self) -> TXUF_W<7> { - TXUF_W::new(self) + pub fn txuf(&mut self) -> TxufW { + TxufW::new(self, 7) } #[doc = "Bit 8 - Parity Error Enable"] #[inline(always)] #[must_use] - pub fn perr(&mut self) -> PERR_W<8> { - PERR_W::new(self) + pub fn perr(&mut self) -> PerrW { + PerrW::new(self, 8) } #[doc = "Bit 9 - Framing Error Enable"] #[inline(always)] #[must_use] - pub fn ferr(&mut self) -> FERR_W<9> { - FERR_W::new(self) + pub fn ferr(&mut self) -> FerrW { + FerrW::new(self, 9) } #[doc = "Bit 10 - Multi-Processor Addr Frame Enable"] #[inline(always)] #[must_use] - pub fn mpaf(&mut self) -> MPAF_W<10> { - MPAF_W::new(self) + pub fn mpaf(&mut self) -> MpafW { + MpafW::new(self, 10) } #[doc = "Bit 11 - Load Error Enable"] #[inline(always)] #[must_use] - pub fn loaderr(&mut self) -> LOADERR_W<11> { - LOADERR_W::new(self) + pub fn loaderr(&mut self) -> LoaderrW { + LoaderrW::new(self, 11) } #[doc = "Bit 12 - Collision Check Fail Enable"] #[inline(always)] #[must_use] - pub fn ccf(&mut self) -> CCF_W<12> { - CCF_W::new(self) + pub fn ccf(&mut self) -> CcfW { + CcfW::new(self, 12) } #[doc = "Bit 13 - TX IDLE Enable"] #[inline(always)] #[must_use] - pub fn txidle(&mut self) -> TXIDLE_W<13> { - TXIDLE_W::new(self) + pub fn txidle(&mut self) -> TxidleW { + TxidleW::new(self, 13) } #[doc = "Bit 18 - Start Frame Enable"] #[inline(always)] #[must_use] - pub fn startf(&mut self) -> STARTF_W<18> { - STARTF_W::new(self) + pub fn startf(&mut self) -> StartfW { + StartfW::new(self, 18) } #[doc = "Bit 19 - Signal Frame Enable"] #[inline(always)] #[must_use] - pub fn sigf(&mut self) -> SIGF_W<19> { - SIGF_W::new(self) + pub fn sigf(&mut self) -> SigfW { + SigfW::new(self, 19) } #[doc = "Bit 24 - Auto Baud Complete Enable"] #[inline(always)] #[must_use] - pub fn autobauddone(&mut self) -> AUTOBAUDDONE_W<24> { - AUTOBAUDDONE_W::new(self) + pub fn autobauddone(&mut self) -> AutobauddoneW { + AutobauddoneW::new(self, 24) } #[doc = "Bit 25 - RX Timeout Enable"] #[inline(always)] #[must_use] - pub fn rxto(&mut self) -> RXTO_W<25> { - RXTO_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rxto(&mut self) -> RxtoW { + RxtoW::new(self, 25) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/if_.rs index 75345eb..85b7d94 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/if_.rs @@ -1,335 +1,295 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXC` reader - TX Complete Interrupt Flag"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXC` writer - TX Complete Interrupt Flag"] -pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXFL` reader - TX FIFO Level Interrupt Flag"] -pub type TXFL_R = crate::BitReader; +pub type TxflR = crate::BitReader; #[doc = "Field `TXFL` writer - TX FIFO Level Interrupt Flag"] -pub type TXFL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxflW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFL` reader - RX FIFO Level Interrupt Flag"] -pub type RXFL_R = crate::BitReader; +pub type RxflR = crate::BitReader; #[doc = "Field `RXFL` writer - RX FIFO Level Interrupt Flag"] -pub type RXFL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxflW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFULL` reader - RX FIFO Full Interrupt Flag"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXFULL` writer - RX FIFO Full Interrupt Flag"] -pub type RXFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxfullW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXOF` reader - RX FIFO Overflow Interrupt Flag"] -pub type RXOF_R = crate::BitReader; +pub type RxofR = crate::BitReader; #[doc = "Field `RXOF` writer - RX FIFO Overflow Interrupt Flag"] -pub type RXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUF` reader - RX FIFO Underflow Interrupt Flag"] -pub type RXUF_R = crate::BitReader; +pub type RxufR = crate::BitReader; #[doc = "Field `RXUF` writer - RX FIFO Underflow Interrupt Flag"] -pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXOF` reader - TX FIFO Overflow Interrupt Flag"] -pub type TXOF_R = crate::BitReader; +pub type TxofR = crate::BitReader; #[doc = "Field `TXOF` writer - TX FIFO Overflow Interrupt Flag"] -pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXUF` reader - TX FIFO Underflow Interrupt Flag"] -pub type TXUF_R = crate::BitReader; +pub type TxufR = crate::BitReader; #[doc = "Field `TXUF` writer - TX FIFO Underflow Interrupt Flag"] -pub type TXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PERR` reader - Parity Error Interrupt Flag"] -pub type PERR_R = crate::BitReader; +pub type PerrR = crate::BitReader; #[doc = "Field `PERR` writer - Parity Error Interrupt Flag"] -pub type PERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FERR` reader - Framing Error Interrupt Flag"] -pub type FERR_R = crate::BitReader; +pub type FerrR = crate::BitReader; #[doc = "Field `FERR` writer - Framing Error Interrupt Flag"] -pub type FERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPAF` reader - Multi-Processor Address Frame Interrupt"] -pub type MPAF_R = crate::BitReader; +pub type MpafR = crate::BitReader; #[doc = "Field `MPAF` writer - Multi-Processor Address Frame Interrupt"] -pub type MPAF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type MpafW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOADERR` reader - Load Error Interrupt Flag"] -pub type LOADERR_R = crate::BitReader; +pub type LoaderrR = crate::BitReader; #[doc = "Field `LOADERR` writer - Load Error Interrupt Flag"] -pub type LOADERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type LoaderrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCF` reader - Collision Check Fail Interrupt Flag"] -pub type CCF_R = crate::BitReader; +pub type CcfR = crate::BitReader; #[doc = "Field `CCF` writer - Collision Check Fail Interrupt Flag"] -pub type CCF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type CcfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXIDLE` reader - TX Idle Interrupt Flag"] -pub type TXIDLE_R = crate::BitReader; +pub type TxidleR = crate::BitReader; #[doc = "Field `TXIDLE` writer - TX Idle Interrupt Flag"] -pub type TXIDLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxidleW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STARTF` reader - Start Frame Interrupt Flag"] -pub type STARTF_R = crate::BitReader; +pub type StartfR = crate::BitReader; #[doc = "Field `STARTF` writer - Start Frame Interrupt Flag"] -pub type STARTF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type StartfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SIGF` reader - Signal Frame Interrupt Flag"] -pub type SIGF_R = crate::BitReader; +pub type SigfR = crate::BitReader; #[doc = "Field `SIGF` writer - Signal Frame Interrupt Flag"] -pub type SIGF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SigfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOBAUDDONE` reader - Auto Baud Complete Interrupt Flag"] -pub type AUTOBAUDDONE_R = crate::BitReader; +pub type AutobauddoneR = crate::BitReader; #[doc = "Field `AUTOBAUDDONE` writer - Auto Baud Complete Interrupt Flag"] -pub type AUTOBAUDDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AutobauddoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXTO` reader - RX Timeout Interrupt Flag"] -pub type RXTO_R = crate::BitReader; +pub type RxtoR = crate::BitReader; #[doc = "Field `RXTO` writer - RX Timeout Interrupt Flag"] -pub type RXTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxtoW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - TX Complete Interrupt Flag"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new((self.bits & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - TX FIFO Level Interrupt Flag"] #[inline(always)] - pub fn txfl(&self) -> TXFL_R { - TXFL_R::new(((self.bits >> 1) & 1) != 0) + pub fn txfl(&self) -> TxflR { + TxflR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RX FIFO Level Interrupt Flag"] #[inline(always)] - pub fn rxfl(&self) -> RXFL_R { - RXFL_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxfl(&self) -> RxflR { + RxflR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - RX FIFO Full Interrupt Flag"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - RX FIFO Overflow Interrupt Flag"] #[inline(always)] - pub fn rxof(&self) -> RXOF_R { - RXOF_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxof(&self) -> RxofR { + RxofR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - RX FIFO Underflow Interrupt Flag"] #[inline(always)] - pub fn rxuf(&self) -> RXUF_R { - RXUF_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxuf(&self) -> RxufR { + RxufR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX FIFO Overflow Interrupt Flag"] #[inline(always)] - pub fn txof(&self) -> TXOF_R { - TXOF_R::new(((self.bits >> 6) & 1) != 0) + pub fn txof(&self) -> TxofR { + TxofR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - TX FIFO Underflow Interrupt Flag"] #[inline(always)] - pub fn txuf(&self) -> TXUF_R { - TXUF_R::new(((self.bits >> 7) & 1) != 0) + pub fn txuf(&self) -> TxufR { + TxufR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Parity Error Interrupt Flag"] #[inline(always)] - pub fn perr(&self) -> PERR_R { - PERR_R::new(((self.bits >> 8) & 1) != 0) + pub fn perr(&self) -> PerrR { + PerrR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Framing Error Interrupt Flag"] #[inline(always)] - pub fn ferr(&self) -> FERR_R { - FERR_R::new(((self.bits >> 9) & 1) != 0) + pub fn ferr(&self) -> FerrR { + FerrR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Multi-Processor Address Frame Interrupt"] #[inline(always)] - pub fn mpaf(&self) -> MPAF_R { - MPAF_R::new(((self.bits >> 10) & 1) != 0) + pub fn mpaf(&self) -> MpafR { + MpafR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Load Error Interrupt Flag"] #[inline(always)] - pub fn loaderr(&self) -> LOADERR_R { - LOADERR_R::new(((self.bits >> 11) & 1) != 0) + pub fn loaderr(&self) -> LoaderrR { + LoaderrR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Collision Check Fail Interrupt Flag"] #[inline(always)] - pub fn ccf(&self) -> CCF_R { - CCF_R::new(((self.bits >> 12) & 1) != 0) + pub fn ccf(&self) -> CcfR { + CcfR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - TX Idle Interrupt Flag"] #[inline(always)] - pub fn txidle(&self) -> TXIDLE_R { - TXIDLE_R::new(((self.bits >> 13) & 1) != 0) + pub fn txidle(&self) -> TxidleR { + TxidleR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 18 - Start Frame Interrupt Flag"] #[inline(always)] - pub fn startf(&self) -> STARTF_R { - STARTF_R::new(((self.bits >> 18) & 1) != 0) + pub fn startf(&self) -> StartfR { + StartfR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Signal Frame Interrupt Flag"] #[inline(always)] - pub fn sigf(&self) -> SIGF_R { - SIGF_R::new(((self.bits >> 19) & 1) != 0) + pub fn sigf(&self) -> SigfR { + SigfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 24 - Auto Baud Complete Interrupt Flag"] #[inline(always)] - pub fn autobauddone(&self) -> AUTOBAUDDONE_R { - AUTOBAUDDONE_R::new(((self.bits >> 24) & 1) != 0) + pub fn autobauddone(&self) -> AutobauddoneR { + AutobauddoneR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - RX Timeout Interrupt Flag"] #[inline(always)] - pub fn rxto(&self) -> RXTO_R { - RXTO_R::new(((self.bits >> 25) & 1) != 0) + pub fn rxto(&self) -> RxtoR { + RxtoR::new(((self.bits >> 25) & 1) != 0) } } impl W { #[doc = "Bit 0 - TX Complete Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txc(&mut self) -> TXC_W<0> { - TXC_W::new(self) + pub fn txc(&mut self) -> TxcW { + TxcW::new(self, 0) } #[doc = "Bit 1 - TX FIFO Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txfl(&mut self) -> TXFL_W<1> { - TXFL_W::new(self) + pub fn txfl(&mut self) -> TxflW { + TxflW::new(self, 1) } #[doc = "Bit 2 - RX FIFO Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxfl(&mut self) -> RXFL_W<2> { - RXFL_W::new(self) + pub fn rxfl(&mut self) -> RxflW { + RxflW::new(self, 2) } #[doc = "Bit 3 - RX FIFO Full Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxfull(&mut self) -> RXFULL_W<3> { - RXFULL_W::new(self) + pub fn rxfull(&mut self) -> RxfullW { + RxfullW::new(self, 3) } #[doc = "Bit 4 - RX FIFO Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxof(&mut self) -> RXOF_W<4> { - RXOF_W::new(self) + pub fn rxof(&mut self) -> RxofW { + RxofW::new(self, 4) } #[doc = "Bit 5 - RX FIFO Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxuf(&mut self) -> RXUF_W<5> { - RXUF_W::new(self) + pub fn rxuf(&mut self) -> RxufW { + RxufW::new(self, 5) } #[doc = "Bit 6 - TX FIFO Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txof(&mut self) -> TXOF_W<6> { - TXOF_W::new(self) + pub fn txof(&mut self) -> TxofW { + TxofW::new(self, 6) } #[doc = "Bit 7 - TX FIFO Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txuf(&mut self) -> TXUF_W<7> { - TXUF_W::new(self) + pub fn txuf(&mut self) -> TxufW { + TxufW::new(self, 7) } #[doc = "Bit 8 - Parity Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn perr(&mut self) -> PERR_W<8> { - PERR_W::new(self) + pub fn perr(&mut self) -> PerrW { + PerrW::new(self, 8) } #[doc = "Bit 9 - Framing Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ferr(&mut self) -> FERR_W<9> { - FERR_W::new(self) + pub fn ferr(&mut self) -> FerrW { + FerrW::new(self, 9) } #[doc = "Bit 10 - Multi-Processor Address Frame Interrupt"] #[inline(always)] #[must_use] - pub fn mpaf(&mut self) -> MPAF_W<10> { - MPAF_W::new(self) + pub fn mpaf(&mut self) -> MpafW { + MpafW::new(self, 10) } #[doc = "Bit 11 - Load Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn loaderr(&mut self) -> LOADERR_W<11> { - LOADERR_W::new(self) + pub fn loaderr(&mut self) -> LoaderrW { + LoaderrW::new(self, 11) } #[doc = "Bit 12 - Collision Check Fail Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ccf(&mut self) -> CCF_W<12> { - CCF_W::new(self) + pub fn ccf(&mut self) -> CcfW { + CcfW::new(self, 12) } #[doc = "Bit 13 - TX Idle Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txidle(&mut self) -> TXIDLE_W<13> { - TXIDLE_W::new(self) + pub fn txidle(&mut self) -> TxidleW { + TxidleW::new(self, 13) } #[doc = "Bit 18 - Start Frame Interrupt Flag"] #[inline(always)] #[must_use] - pub fn startf(&mut self) -> STARTF_W<18> { - STARTF_W::new(self) + pub fn startf(&mut self) -> StartfW { + StartfW::new(self, 18) } #[doc = "Bit 19 - Signal Frame Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sigf(&mut self) -> SIGF_W<19> { - SIGF_W::new(self) + pub fn sigf(&mut self) -> SigfW { + SigfW::new(self, 19) } #[doc = "Bit 24 - Auto Baud Complete Interrupt Flag"] #[inline(always)] #[must_use] - pub fn autobauddone(&mut self) -> AUTOBAUDDONE_W<24> { - AUTOBAUDDONE_W::new(self) + pub fn autobauddone(&mut self) -> AutobauddoneW { + AutobauddoneW::new(self, 24) } #[doc = "Bit 25 - RX Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxto(&mut self) -> RXTO_W<25> { - RXTO_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rxto(&mut self) -> RxtoW { + RxtoW::new(self, 25) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/ipversion.rs index 85cb381..0068345 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/irhfcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/irhfcfg.rs index 5216f33..2e61f42 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/irhfcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/irhfcfg.rs @@ -1,231 +1,201 @@ #[doc = "Register `IRHFCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IRHFCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `IRHFEN` reader - Enable IrDA Module"] -pub type IRHFEN_R = crate::BitReader; +pub type IrhfenR = crate::BitReader; #[doc = "Field `IRHFEN` writer - Enable IrDA Module"] -pub type IRHFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRHFCFG_SPEC, bool, O>; -#[doc = "Field `IRHFPW` reader - IrDA TX Pulse Width"] -pub type IRHFPW_R = crate::FieldReader; +pub type IrhfenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "IrDA TX Pulse Width\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum IRHFPW_A { +pub enum Irhfpw { #[doc = "0: IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1"] - ONE = 0, + One = 0, #[doc = "1: IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1"] - TWO = 1, + Two = 1, #[doc = "2: IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1"] - THREE = 2, + Three = 2, #[doc = "3: IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1"] - FOUR = 3, + Four = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: IRHFPW_A) -> Self { + fn from(variant: Irhfpw) -> Self { variant as _ } } -impl IRHFPW_R { +impl crate::FieldSpec for Irhfpw { + type Ux = u8; +} +impl crate::IsEnum for Irhfpw {} +#[doc = "Field `IRHFPW` reader - IrDA TX Pulse Width"] +pub type IrhfpwR = crate::FieldReader; +impl IrhfpwR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> IRHFPW_A { + pub const fn variant(&self) -> Irhfpw { match self.bits { - 0 => IRHFPW_A::ONE, - 1 => IRHFPW_A::TWO, - 2 => IRHFPW_A::THREE, - 3 => IRHFPW_A::FOUR, + 0 => Irhfpw::One, + 1 => Irhfpw::Two, + 2 => Irhfpw::Three, + 3 => Irhfpw::Four, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == IRHFPW_A::ONE + *self == Irhfpw::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == IRHFPW_A::TWO + *self == Irhfpw::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == IRHFPW_A::THREE + *self == Irhfpw::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == IRHFPW_A::FOUR + *self == Irhfpw::Four } } #[doc = "Field `IRHFPW` writer - IrDA TX Pulse Width"] -pub type IRHFPW_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, IRHFCFG_SPEC, u8, IRHFPW_A, 2, O>; -impl<'a, const O: u8> IRHFPW_W<'a, O> { +pub type IrhfpwW<'a, REG> = crate::FieldWriter<'a, REG, 2, Irhfpw, crate::Safe>; +impl<'a, REG> IrhfpwW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(IRHFPW_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Irhfpw::One) } #[doc = "IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(IRHFPW_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Irhfpw::Two) } #[doc = "IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(IRHFPW_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Irhfpw::Three) } #[doc = "IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(IRHFPW_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Irhfpw::Four) } } -#[doc = "Field `IRHFFILT` reader - IrDA RX Filter"] -pub type IRHFFILT_R = crate::BitReader; #[doc = "IrDA RX Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IRHFFILT_A { +pub enum Irhffilt { #[doc = "0: No filter enabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Filter enabled. IrDA pulse must be high for at least 5 consecutive clock cycles to be detected"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IRHFFILT_A) -> Self { + fn from(variant: Irhffilt) -> Self { variant as u8 != 0 } } -impl IRHFFILT_R { +#[doc = "Field `IRHFFILT` reader - IrDA RX Filter"] +pub type IrhffiltR = crate::BitReader; +impl IrhffiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> IRHFFILT_A { + pub const fn variant(&self) -> Irhffilt { match self.bits { - false => IRHFFILT_A::DISABLE, - true => IRHFFILT_A::ENABLE, + false => Irhffilt::Disable, + true => Irhffilt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "No filter enabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == IRHFFILT_A::DISABLE + *self == Irhffilt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Filter enabled. IrDA pulse must be high for at least 5 consecutive clock cycles to be detected"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == IRHFFILT_A::ENABLE + *self == Irhffilt::Enable } } #[doc = "Field `IRHFFILT` writer - IrDA RX Filter"] -pub type IRHFFILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRHFCFG_SPEC, IRHFFILT_A, O>; -impl<'a, const O: u8> IRHFFILT_W<'a, O> { +pub type IrhffiltW<'a, REG> = crate::BitWriter<'a, REG, Irhffilt>; +impl<'a, REG> IrhffiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No filter enabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(IRHFFILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Irhffilt::Disable) } #[doc = "Filter enabled. IrDA pulse must be high for at least 5 consecutive clock cycles to be detected"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(IRHFFILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Irhffilt::Enable) } } impl R { #[doc = "Bit 0 - Enable IrDA Module"] #[inline(always)] - pub fn irhfen(&self) -> IRHFEN_R { - IRHFEN_R::new((self.bits & 1) != 0) + pub fn irhfen(&self) -> IrhfenR { + IrhfenR::new((self.bits & 1) != 0) } #[doc = "Bits 1:2 - IrDA TX Pulse Width"] #[inline(always)] - pub fn irhfpw(&self) -> IRHFPW_R { - IRHFPW_R::new(((self.bits >> 1) & 3) as u8) + pub fn irhfpw(&self) -> IrhfpwR { + IrhfpwR::new(((self.bits >> 1) & 3) as u8) } #[doc = "Bit 3 - IrDA RX Filter"] #[inline(always)] - pub fn irhffilt(&self) -> IRHFFILT_R { - IRHFFILT_R::new(((self.bits >> 3) & 1) != 0) + pub fn irhffilt(&self) -> IrhffiltR { + IrhffiltR::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable IrDA Module"] #[inline(always)] #[must_use] - pub fn irhfen(&mut self) -> IRHFEN_W<0> { - IRHFEN_W::new(self) + pub fn irhfen(&mut self) -> IrhfenW { + IrhfenW::new(self, 0) } #[doc = "Bits 1:2 - IrDA TX Pulse Width"] #[inline(always)] #[must_use] - pub fn irhfpw(&mut self) -> IRHFPW_W<1> { - IRHFPW_W::new(self) + pub fn irhfpw(&mut self) -> IrhfpwW { + IrhfpwW::new(self, 1) } #[doc = "Bit 3 - IrDA RX Filter"] #[inline(always)] #[must_use] - pub fn irhffilt(&mut self) -> IRHFFILT_W<3> { - IRHFFILT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn irhffilt(&mut self) -> IrhffiltW { + IrhffiltW::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irhfcfg](index.html) module"] -pub struct IRHFCFG_SPEC; -impl crate::RegisterSpec for IRHFCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`irhfcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irhfcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrhfcfgSpec; +impl crate::RegisterSpec for IrhfcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [irhfcfg::R](R) reader structure"] -impl crate::Readable for IRHFCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [irhfcfg::W](W) writer structure"] -impl crate::Writable for IRHFCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`irhfcfg::R`](R) reader structure"] +impl crate::Readable for IrhfcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`irhfcfg::W`](W) writer structure"] +impl crate::Writable for IrhfcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRHFCFG to value 0"] -impl crate::Resettable for IRHFCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IrhfcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/rxdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/rxdata.rs index f2cf950..cb4530c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/rxdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/rxdata.rs @@ -1,37 +1,22 @@ #[doc = "Register `RXDATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATA` reader - RX Data and Control bits"] -pub type RXDATA_R = crate::FieldReader; +pub type RxdataR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - RX Data and Control bits"] #[inline(always)] - pub fn rxdata(&self) -> RXDATA_R { - RXDATA_R::new((self.bits & 0xffff) as u16) + pub fn rxdata(&self) -> RxdataR { + RxdataR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdata](index.html) module"] -pub struct RXDATA_SPEC; -impl crate::RegisterSpec for RXDATA_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdata::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdataSpec; +impl crate::RegisterSpec for RxdataSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdata::R](R) reader structure"] -impl crate::Readable for RXDATA_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdata::R`](R) reader structure"] +impl crate::Readable for RxdataSpec {} #[doc = "`reset()` method sets RXDATA to value 0"] -impl crate::Resettable for RXDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/rxdatap.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/rxdatap.rs index f78bc3c..b490a48 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/rxdatap.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/rxdatap.rs @@ -1,37 +1,22 @@ #[doc = "Register `RXDATAP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATAP` reader - RX Data Peek"] -pub type RXDATAP_R = crate::FieldReader; +pub type RxdatapR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - RX Data Peek"] #[inline(always)] - pub fn rxdatap(&self) -> RXDATAP_R { - RXDATAP_R::new((self.bits & 0xffff) as u16) + pub fn rxdatap(&self) -> RxdatapR { + RxdatapR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdatap](index.html) module"] -pub struct RXDATAP_SPEC; -impl crate::RegisterSpec for RXDATAP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdatap::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdatapSpec; +impl crate::RegisterSpec for RxdatapSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdatap::R](R) reader structure"] -impl crate::Readable for RXDATAP_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdatap::R`](R) reader structure"] +impl crate::Readable for RxdatapSpec {} #[doc = "`reset()` method sets RXDATAP to value 0"] -impl crate::Resettable for RXDATAP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdatapSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/sigframecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/sigframecfg.rs index 453819f..96b88c1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/sigframecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/sigframecfg.rs @@ -1,81 +1,40 @@ #[doc = "Register `SIGFRAMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SIGFRAMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SIGFRAME` reader - Signal Frame Value"] -pub type SIGFRAME_R = crate::FieldReader; +pub type SigframeR = crate::FieldReader; #[doc = "Field `SIGFRAME` writer - Signal Frame Value"] -pub type SIGFRAME_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SIGFRAMECFG_SPEC, u16, u16, 9, O>; +pub type SigframeW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; impl R { #[doc = "Bits 0:8 - Signal Frame Value"] #[inline(always)] - pub fn sigframe(&self) -> SIGFRAME_R { - SIGFRAME_R::new((self.bits & 0x01ff) as u16) + pub fn sigframe(&self) -> SigframeR { + SigframeR::new((self.bits & 0x01ff) as u16) } } impl W { #[doc = "Bits 0:8 - Signal Frame Value"] #[inline(always)] #[must_use] - pub fn sigframe(&mut self) -> SIGFRAME_W<0> { - SIGFRAME_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sigframe(&mut self) -> SigframeW { + SigframeW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sigframecfg](index.html) module"] -pub struct SIGFRAMECFG_SPEC; -impl crate::RegisterSpec for SIGFRAMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sigframecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sigframecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SigframecfgSpec; +impl crate::RegisterSpec for SigframecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [sigframecfg::R](R) reader structure"] -impl crate::Readable for SIGFRAMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sigframecfg::W](W) writer structure"] -impl crate::Writable for SIGFRAMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`sigframecfg::R`](R) reader structure"] +impl crate::Readable for SigframecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`sigframecfg::W`](W) writer structure"] +impl crate::Writable for SigframecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SIGFRAMECFG to value 0"] -impl crate::Resettable for SIGFRAMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SigframecfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/startframecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/startframecfg.rs index 44571b1..67dd6bf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/startframecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/startframecfg.rs @@ -1,81 +1,40 @@ #[doc = "Register `STARTFRAMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `STARTFRAMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `STARTFRAME` reader - Start Frame"] -pub type STARTFRAME_R = crate::FieldReader; +pub type StartframeR = crate::FieldReader; #[doc = "Field `STARTFRAME` writer - Start Frame"] -pub type STARTFRAME_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, STARTFRAMECFG_SPEC, u16, u16, 9, O>; +pub type StartframeW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; impl R { #[doc = "Bits 0:8 - Start Frame"] #[inline(always)] - pub fn startframe(&self) -> STARTFRAME_R { - STARTFRAME_R::new((self.bits & 0x01ff) as u16) + pub fn startframe(&self) -> StartframeR { + StartframeR::new((self.bits & 0x01ff) as u16) } } impl W { #[doc = "Bits 0:8 - Start Frame"] #[inline(always)] #[must_use] - pub fn startframe(&mut self) -> STARTFRAME_W<0> { - STARTFRAME_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn startframe(&mut self) -> StartframeW { + StartframeW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [startframecfg](index.html) module"] -pub struct STARTFRAMECFG_SPEC; -impl crate::RegisterSpec for STARTFRAMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`startframecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`startframecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StartframecfgSpec; +impl crate::RegisterSpec for StartframecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [startframecfg::R](R) reader structure"] -impl crate::Readable for STARTFRAMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [startframecfg::W](W) writer structure"] -impl crate::Writable for STARTFRAMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`startframecfg::R`](R) reader structure"] +impl crate::Readable for StartframecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`startframecfg::W`](W) writer structure"] +impl crate::Writable for StartframecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets STARTFRAMECFG to value 0"] -impl crate::Resettable for STARTFRAMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StartframecfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/status.rs index 3ad48a5..b418af7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/status.rs @@ -1,121 +1,106 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXENS` reader - Receiver Enable Status"] -pub type RXENS_R = crate::BitReader; +pub type RxensR = crate::BitReader; #[doc = "Field `TXENS` reader - Transmitter Enable Status"] -pub type TXENS_R = crate::BitReader; +pub type TxensR = crate::BitReader; #[doc = "Field `RXBLOCK` reader - Block Incoming Data"] -pub type RXBLOCK_R = crate::BitReader; +pub type RxblockR = crate::BitReader; #[doc = "Field `TXTRI` reader - Transmitter Tristated"] -pub type TXTRI_R = crate::BitReader; +pub type TxtriR = crate::BitReader; #[doc = "Field `TXC` reader - TX Complete"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXFL` reader - TX FIFO Level"] -pub type TXFL_R = crate::BitReader; +pub type TxflR = crate::BitReader; #[doc = "Field `RXFL` reader - RX FIFO Level"] -pub type RXFL_R = crate::BitReader; +pub type RxflR = crate::BitReader; #[doc = "Field `RXFULL` reader - RX FIFO Full"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXIDLE` reader - RX Idle"] -pub type RXIDLE_R = crate::BitReader; +pub type RxidleR = crate::BitReader; #[doc = "Field `TXIDLE` reader - TX Idle"] -pub type TXIDLE_R = crate::BitReader; +pub type TxidleR = crate::BitReader; #[doc = "Field `TXFCNT` reader - Valid entries in TX FIFO"] -pub type TXFCNT_R = crate::FieldReader; +pub type TxfcntR = crate::FieldReader; #[doc = "Field `AUTOBAUDDONE` reader - Auto Baud Rate Detection Completed"] -pub type AUTOBAUDDONE_R = crate::BitReader; +pub type AutobauddoneR = crate::BitReader; #[doc = "Field `CLEARTXBUSY` reader - TX FIFO Clear Busy"] -pub type CLEARTXBUSY_R = crate::BitReader; +pub type CleartxbusyR = crate::BitReader; impl R { #[doc = "Bit 0 - Receiver Enable Status"] #[inline(always)] - pub fn rxens(&self) -> RXENS_R { - RXENS_R::new((self.bits & 1) != 0) + pub fn rxens(&self) -> RxensR { + RxensR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transmitter Enable Status"] #[inline(always)] - pub fn txens(&self) -> TXENS_R { - TXENS_R::new(((self.bits >> 1) & 1) != 0) + pub fn txens(&self) -> TxensR { + TxensR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - Block Incoming Data"] #[inline(always)] - pub fn rxblock(&self) -> RXBLOCK_R { - RXBLOCK_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxblock(&self) -> RxblockR { + RxblockR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Transmitter Tristated"] #[inline(always)] - pub fn txtri(&self) -> TXTRI_R { - TXTRI_R::new(((self.bits >> 4) & 1) != 0) + pub fn txtri(&self) -> TxtriR { + TxtriR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - TX Complete"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new(((self.bits >> 5) & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX FIFO Level"] #[inline(always)] - pub fn txfl(&self) -> TXFL_R { - TXFL_R::new(((self.bits >> 6) & 1) != 0) + pub fn txfl(&self) -> TxflR { + TxflR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - RX FIFO Level"] #[inline(always)] - pub fn rxfl(&self) -> RXFL_R { - RXFL_R::new(((self.bits >> 7) & 1) != 0) + pub fn rxfl(&self) -> RxflR { + RxflR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - RX FIFO Full"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 8) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 12 - RX Idle"] #[inline(always)] - pub fn rxidle(&self) -> RXIDLE_R { - RXIDLE_R::new(((self.bits >> 12) & 1) != 0) + pub fn rxidle(&self) -> RxidleR { + RxidleR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - TX Idle"] #[inline(always)] - pub fn txidle(&self) -> TXIDLE_R { - TXIDLE_R::new(((self.bits >> 13) & 1) != 0) + pub fn txidle(&self) -> TxidleR { + TxidleR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bits 16:20 - Valid entries in TX FIFO"] #[inline(always)] - pub fn txfcnt(&self) -> TXFCNT_R { - TXFCNT_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn txfcnt(&self) -> TxfcntR { + TxfcntR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bit 24 - Auto Baud Rate Detection Completed"] #[inline(always)] - pub fn autobauddone(&self) -> AUTOBAUDDONE_R { - AUTOBAUDDONE_R::new(((self.bits >> 24) & 1) != 0) + pub fn autobauddone(&self) -> AutobauddoneR { + AutobauddoneR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - TX FIFO Clear Busy"] #[inline(always)] - pub fn cleartxbusy(&self) -> CLEARTXBUSY_R { - CLEARTXBUSY_R::new(((self.bits >> 25) & 1) != 0) + pub fn cleartxbusy(&self) -> CleartxbusyR { + CleartxbusyR::new(((self.bits >> 25) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0x3040"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0x3040; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0x3040; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/syncbusy.rs index 3190b02..713965c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/syncbusy.rs @@ -1,114 +1,99 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DIV` reader - SYNCBUSY for DIV in CLKDIV"] -pub type DIV_R = crate::BitReader; +pub type DivR = crate::BitReader; #[doc = "Field `RXTEN` reader - SYNCBUSY for RXTEN in TRIGCTRL"] -pub type RXTEN_R = crate::BitReader; +pub type RxtenR = crate::BitReader; #[doc = "Field `TXTEN` reader - SYNCBUSY for TXTEN in TRIGCTRL"] -pub type TXTEN_R = crate::BitReader; +pub type TxtenR = crate::BitReader; #[doc = "Field `RXEN` reader - SYNCBUSY for RXEN in CMD"] -pub type RXEN_R = crate::BitReader; +pub type RxenR = crate::BitReader; #[doc = "Field `RXDIS` reader - SYNCBUSY for RXDIS in CMD"] -pub type RXDIS_R = crate::BitReader; +pub type RxdisR = crate::BitReader; #[doc = "Field `TXEN` reader - SYNCBUSY for TXEN in CMD"] -pub type TXEN_R = crate::BitReader; +pub type TxenR = crate::BitReader; #[doc = "Field `TXDIS` reader - SYNCBUSY for TXDIS in CMD"] -pub type TXDIS_R = crate::BitReader; +pub type TxdisR = crate::BitReader; #[doc = "Field `RXBLOCKEN` reader - SYNCBUSY for RXBLOCKEN in CMD"] -pub type RXBLOCKEN_R = crate::BitReader; +pub type RxblockenR = crate::BitReader; #[doc = "Field `RXBLOCKDIS` reader - SYNCBUSY for RXBLOCKDIS in CMD"] -pub type RXBLOCKDIS_R = crate::BitReader; +pub type RxblockdisR = crate::BitReader; #[doc = "Field `TXTRIEN` reader - SYNCBUSY for TXTRIEN in CMD"] -pub type TXTRIEN_R = crate::BitReader; +pub type TxtrienR = crate::BitReader; #[doc = "Field `TXTRIDIS` reader - SYNCBUSY in TXTRIDIS in CMD"] -pub type TXTRIDIS_R = crate::BitReader; +pub type TxtridisR = crate::BitReader; #[doc = "Field `AUTOTXTEN` reader - SYNCBUSY for AUTOTXTEN in TRIGCTRL"] -pub type AUTOTXTEN_R = crate::BitReader; +pub type AutotxtenR = crate::BitReader; impl R { #[doc = "Bit 0 - SYNCBUSY for DIV in CLKDIV"] #[inline(always)] - pub fn div(&self) -> DIV_R { - DIV_R::new((self.bits & 1) != 0) + pub fn div(&self) -> DivR { + DivR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - SYNCBUSY for RXTEN in TRIGCTRL"] #[inline(always)] - pub fn rxten(&self) -> RXTEN_R { - RXTEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn rxten(&self) -> RxtenR { + RxtenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - SYNCBUSY for TXTEN in TRIGCTRL"] #[inline(always)] - pub fn txten(&self) -> TXTEN_R { - TXTEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn txten(&self) -> TxtenR { + TxtenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - SYNCBUSY for RXEN in CMD"] #[inline(always)] - pub fn rxen(&self) -> RXEN_R { - RXEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxen(&self) -> RxenR { + RxenR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - SYNCBUSY for RXDIS in CMD"] #[inline(always)] - pub fn rxdis(&self) -> RXDIS_R { - RXDIS_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxdis(&self) -> RxdisR { + RxdisR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - SYNCBUSY for TXEN in CMD"] #[inline(always)] - pub fn txen(&self) -> TXEN_R { - TXEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn txen(&self) -> TxenR { + TxenR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - SYNCBUSY for TXDIS in CMD"] #[inline(always)] - pub fn txdis(&self) -> TXDIS_R { - TXDIS_R::new(((self.bits >> 6) & 1) != 0) + pub fn txdis(&self) -> TxdisR { + TxdisR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - SYNCBUSY for RXBLOCKEN in CMD"] #[inline(always)] - pub fn rxblocken(&self) -> RXBLOCKEN_R { - RXBLOCKEN_R::new(((self.bits >> 7) & 1) != 0) + pub fn rxblocken(&self) -> RxblockenR { + RxblockenR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - SYNCBUSY for RXBLOCKDIS in CMD"] #[inline(always)] - pub fn rxblockdis(&self) -> RXBLOCKDIS_R { - RXBLOCKDIS_R::new(((self.bits >> 8) & 1) != 0) + pub fn rxblockdis(&self) -> RxblockdisR { + RxblockdisR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - SYNCBUSY for TXTRIEN in CMD"] #[inline(always)] - pub fn txtrien(&self) -> TXTRIEN_R { - TXTRIEN_R::new(((self.bits >> 9) & 1) != 0) + pub fn txtrien(&self) -> TxtrienR { + TxtrienR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - SYNCBUSY in TXTRIDIS in CMD"] #[inline(always)] - pub fn txtridis(&self) -> TXTRIDIS_R { - TXTRIDIS_R::new(((self.bits >> 10) & 1) != 0) + pub fn txtridis(&self) -> TxtridisR { + TxtridisR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - SYNCBUSY for AUTOTXTEN in TRIGCTRL"] #[inline(always)] - pub fn autotxten(&self) -> AUTOTXTEN_R { - AUTOTXTEN_R::new(((self.bits >> 11) & 1) != 0) + pub fn autotxten(&self) -> AutotxtenR { + AutotxtenR::new(((self.bits >> 11) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/timingcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/timingcfg.rs index ba30f19..8c1ed53 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/timingcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/timingcfg.rs @@ -1,595 +1,584 @@ #[doc = "Register `TIMINGCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMINGCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `TXDELAY` reader - TX Delay Transmission"] -pub type TXDELAY_R = crate::FieldReader; +pub type W = crate::W; #[doc = "TX Delay Transmission\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TXDELAY_A { +pub enum Txdelay { #[doc = "0: Frames are transmitted immediately."] - NONE = 0, + None = 0, #[doc = "1: Transmission of new frames is delayed by a single bit period."] - SINGLE = 1, + Single = 1, #[doc = "2: Transmission of new frames is delayed by a two bit periods."] - DOUBLE = 2, + Double = 2, #[doc = "3: Transmission of new frames is delayed by a three bit periods."] - TRIPPLE = 3, + Tripple = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TXDELAY_A) -> Self { + fn from(variant: Txdelay) -> Self { variant as _ } } -impl TXDELAY_R { +impl crate::FieldSpec for Txdelay { + type Ux = u8; +} +impl crate::IsEnum for Txdelay {} +#[doc = "Field `TXDELAY` reader - TX Delay Transmission"] +pub type TxdelayR = crate::FieldReader; +impl TxdelayR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXDELAY_A { + pub const fn variant(&self) -> Txdelay { match self.bits { - 0 => TXDELAY_A::NONE, - 1 => TXDELAY_A::SINGLE, - 2 => TXDELAY_A::DOUBLE, - 3 => TXDELAY_A::TRIPPLE, + 0 => Txdelay::None, + 1 => Txdelay::Single, + 2 => Txdelay::Double, + 3 => Txdelay::Tripple, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Frames are transmitted immediately."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == TXDELAY_A::NONE + *self == Txdelay::None } - #[doc = "Checks if the value of the field is `SINGLE`"] + #[doc = "Transmission of new frames is delayed by a single bit period."] #[inline(always)] pub fn is_single(&self) -> bool { - *self == TXDELAY_A::SINGLE + *self == Txdelay::Single } - #[doc = "Checks if the value of the field is `DOUBLE`"] + #[doc = "Transmission of new frames is delayed by a two bit periods."] #[inline(always)] pub fn is_double(&self) -> bool { - *self == TXDELAY_A::DOUBLE + *self == Txdelay::Double } - #[doc = "Checks if the value of the field is `TRIPPLE`"] + #[doc = "Transmission of new frames is delayed by a three bit periods."] #[inline(always)] pub fn is_tripple(&self) -> bool { - *self == TXDELAY_A::TRIPPLE + *self == Txdelay::Tripple } } #[doc = "Field `TXDELAY` writer - TX Delay Transmission"] -pub type TXDELAY_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, TIMINGCFG_SPEC, u8, TXDELAY_A, 2, O>; -impl<'a, const O: u8> TXDELAY_W<'a, O> { +pub type TxdelayW<'a, REG> = crate::FieldWriter<'a, REG, 2, Txdelay, crate::Safe>; +impl<'a, REG> TxdelayW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Frames are transmitted immediately."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(TXDELAY_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Txdelay::None) } #[doc = "Transmission of new frames is delayed by a single bit period."] #[inline(always)] - pub fn single(self) -> &'a mut W { - self.variant(TXDELAY_A::SINGLE) + pub fn single(self) -> &'a mut crate::W { + self.variant(Txdelay::Single) } #[doc = "Transmission of new frames is delayed by a two bit periods."] #[inline(always)] - pub fn double(self) -> &'a mut W { - self.variant(TXDELAY_A::DOUBLE) + pub fn double(self) -> &'a mut crate::W { + self.variant(Txdelay::Double) } #[doc = "Transmission of new frames is delayed by a three bit periods."] #[inline(always)] - pub fn tripple(self) -> &'a mut W { - self.variant(TXDELAY_A::TRIPPLE) + pub fn tripple(self) -> &'a mut crate::W { + self.variant(Txdelay::Tripple) } } -#[doc = "Field `CSSETUP` reader - Chip Select Setup"] -pub type CSSETUP_R = crate::FieldReader; #[doc = "Chip Select Setup\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CSSETUP_A { +pub enum Cssetup { #[doc = "0: CS is asserted half or 1 baud-time before the start of transmission depending on CLKPHASE equal to 1 or 0 respectively"] - ZERO = 0, + Zero = 0, #[doc = "1: CS is asserted 1 additional baud-time before start of transmission"] - ONE = 1, + One = 1, #[doc = "2: CS is asserted 2 additional baud-times before start of transmission"] - TWO = 2, + Two = 2, #[doc = "3: CS is asserted 3 additional baud-times before start of transmission"] - THREE = 3, + Three = 3, #[doc = "4: CS is asserted 4 additional baud-times before start of transmission"] - FOUR = 4, + Four = 4, #[doc = "5: CS is asserted 5 additional baud-times before start of transmission"] - FIVE = 5, + Five = 5, #[doc = "6: CS is asserted 6 additional baud-times before start of transmission"] - SIX = 6, + Six = 6, #[doc = "7: CS is asserted 7 additional baud-times before start of transmission"] - SEVEN = 7, + Seven = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CSSETUP_A) -> Self { + fn from(variant: Cssetup) -> Self { variant as _ } } -impl CSSETUP_R { +impl crate::FieldSpec for Cssetup { + type Ux = u8; +} +impl crate::IsEnum for Cssetup {} +#[doc = "Field `CSSETUP` reader - Chip Select Setup"] +pub type CssetupR = crate::FieldReader; +impl CssetupR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CSSETUP_A { + pub const fn variant(&self) -> Cssetup { match self.bits { - 0 => CSSETUP_A::ZERO, - 1 => CSSETUP_A::ONE, - 2 => CSSETUP_A::TWO, - 3 => CSSETUP_A::THREE, - 4 => CSSETUP_A::FOUR, - 5 => CSSETUP_A::FIVE, - 6 => CSSETUP_A::SIX, - 7 => CSSETUP_A::SEVEN, + 0 => Cssetup::Zero, + 1 => Cssetup::One, + 2 => Cssetup::Two, + 3 => Cssetup::Three, + 4 => Cssetup::Four, + 5 => Cssetup::Five, + 6 => Cssetup::Six, + 7 => Cssetup::Seven, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ZERO`"] + #[doc = "CS is asserted half or 1 baud-time before the start of transmission depending on CLKPHASE equal to 1 or 0 respectively"] #[inline(always)] pub fn is_zero(&self) -> bool { - *self == CSSETUP_A::ZERO + *self == Cssetup::Zero } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "CS is asserted 1 additional baud-time before start of transmission"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == CSSETUP_A::ONE + *self == Cssetup::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "CS is asserted 2 additional baud-times before start of transmission"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == CSSETUP_A::TWO + *self == Cssetup::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "CS is asserted 3 additional baud-times before start of transmission"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == CSSETUP_A::THREE + *self == Cssetup::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "CS is asserted 4 additional baud-times before start of transmission"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == CSSETUP_A::FOUR + *self == Cssetup::Four } - #[doc = "Checks if the value of the field is `FIVE`"] + #[doc = "CS is asserted 5 additional baud-times before start of transmission"] #[inline(always)] pub fn is_five(&self) -> bool { - *self == CSSETUP_A::FIVE + *self == Cssetup::Five } - #[doc = "Checks if the value of the field is `SIX`"] + #[doc = "CS is asserted 6 additional baud-times before start of transmission"] #[inline(always)] pub fn is_six(&self) -> bool { - *self == CSSETUP_A::SIX + *self == Cssetup::Six } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "CS is asserted 7 additional baud-times before start of transmission"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == CSSETUP_A::SEVEN + *self == Cssetup::Seven } } #[doc = "Field `CSSETUP` writer - Chip Select Setup"] -pub type CSSETUP_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, TIMINGCFG_SPEC, u8, CSSETUP_A, 3, O>; -impl<'a, const O: u8> CSSETUP_W<'a, O> { +pub type CssetupW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cssetup, crate::Safe>; +impl<'a, REG> CssetupW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "CS is asserted half or 1 baud-time before the start of transmission depending on CLKPHASE equal to 1 or 0 respectively"] #[inline(always)] - pub fn zero(self) -> &'a mut W { - self.variant(CSSETUP_A::ZERO) + pub fn zero(self) -> &'a mut crate::W { + self.variant(Cssetup::Zero) } #[doc = "CS is asserted 1 additional baud-time before start of transmission"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(CSSETUP_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Cssetup::One) } #[doc = "CS is asserted 2 additional baud-times before start of transmission"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(CSSETUP_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Cssetup::Two) } #[doc = "CS is asserted 3 additional baud-times before start of transmission"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(CSSETUP_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Cssetup::Three) } #[doc = "CS is asserted 4 additional baud-times before start of transmission"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(CSSETUP_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Cssetup::Four) } #[doc = "CS is asserted 5 additional baud-times before start of transmission"] #[inline(always)] - pub fn five(self) -> &'a mut W { - self.variant(CSSETUP_A::FIVE) + pub fn five(self) -> &'a mut crate::W { + self.variant(Cssetup::Five) } #[doc = "CS is asserted 6 additional baud-times before start of transmission"] #[inline(always)] - pub fn six(self) -> &'a mut W { - self.variant(CSSETUP_A::SIX) + pub fn six(self) -> &'a mut crate::W { + self.variant(Cssetup::Six) } #[doc = "CS is asserted 7 additional baud-times before start of transmission"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(CSSETUP_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Cssetup::Seven) } } -#[doc = "Field `CSHOLD` reader - Chip Select Hold"] -pub type CSHOLD_R = crate::FieldReader; #[doc = "Chip Select Hold\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CSHOLD_A { +pub enum Cshold { #[doc = "0: CS is de-asserted half or 1 baud-time after the end of transmission depending on CLKPHASE equal to 1 or 0 respectively"] - ZERO = 0, + Zero = 0, #[doc = "1: CS is de-asserted 1 additional baud-time after the end of transmission"] - ONE = 1, + One = 1, #[doc = "2: CS is de-asserted 2 additional baud-times after the end of transmission"] - TWO = 2, + Two = 2, #[doc = "3: CS is de-asserted 3 additional baud-times after the end of transmission"] - THREE = 3, + Three = 3, #[doc = "4: CS is de-asserted 4 additional baud-times after the end of transmission"] - FOUR = 4, + Four = 4, #[doc = "5: CS is de-asserted 5 additional baud-times after the end of transmission"] - FIVE = 5, + Five = 5, #[doc = "6: CS is de-asserted 6 additional baud-times after the end of transmission"] - SIX = 6, + Six = 6, #[doc = "7: CS is de-asserted 7 additional baud-times after the end of transmission"] - SEVEN = 7, + Seven = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CSHOLD_A) -> Self { + fn from(variant: Cshold) -> Self { variant as _ } } -impl CSHOLD_R { +impl crate::FieldSpec for Cshold { + type Ux = u8; +} +impl crate::IsEnum for Cshold {} +#[doc = "Field `CSHOLD` reader - Chip Select Hold"] +pub type CsholdR = crate::FieldReader; +impl CsholdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CSHOLD_A { + pub const fn variant(&self) -> Cshold { match self.bits { - 0 => CSHOLD_A::ZERO, - 1 => CSHOLD_A::ONE, - 2 => CSHOLD_A::TWO, - 3 => CSHOLD_A::THREE, - 4 => CSHOLD_A::FOUR, - 5 => CSHOLD_A::FIVE, - 6 => CSHOLD_A::SIX, - 7 => CSHOLD_A::SEVEN, + 0 => Cshold::Zero, + 1 => Cshold::One, + 2 => Cshold::Two, + 3 => Cshold::Three, + 4 => Cshold::Four, + 5 => Cshold::Five, + 6 => Cshold::Six, + 7 => Cshold::Seven, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ZERO`"] + #[doc = "CS is de-asserted half or 1 baud-time after the end of transmission depending on CLKPHASE equal to 1 or 0 respectively"] #[inline(always)] pub fn is_zero(&self) -> bool { - *self == CSHOLD_A::ZERO + *self == Cshold::Zero } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "CS is de-asserted 1 additional baud-time after the end of transmission"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == CSHOLD_A::ONE + *self == Cshold::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "CS is de-asserted 2 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == CSHOLD_A::TWO + *self == Cshold::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "CS is de-asserted 3 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == CSHOLD_A::THREE + *self == Cshold::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "CS is de-asserted 4 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == CSHOLD_A::FOUR + *self == Cshold::Four } - #[doc = "Checks if the value of the field is `FIVE`"] + #[doc = "CS is de-asserted 5 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_five(&self) -> bool { - *self == CSHOLD_A::FIVE + *self == Cshold::Five } - #[doc = "Checks if the value of the field is `SIX`"] + #[doc = "CS is de-asserted 6 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_six(&self) -> bool { - *self == CSHOLD_A::SIX + *self == Cshold::Six } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "CS is de-asserted 7 additional baud-times after the end of transmission"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == CSHOLD_A::SEVEN + *self == Cshold::Seven } } #[doc = "Field `CSHOLD` writer - Chip Select Hold"] -pub type CSHOLD_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, TIMINGCFG_SPEC, u8, CSHOLD_A, 3, O>; -impl<'a, const O: u8> CSHOLD_W<'a, O> { +pub type CsholdW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cshold, crate::Safe>; +impl<'a, REG> CsholdW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "CS is de-asserted half or 1 baud-time after the end of transmission depending on CLKPHASE equal to 1 or 0 respectively"] #[inline(always)] - pub fn zero(self) -> &'a mut W { - self.variant(CSHOLD_A::ZERO) + pub fn zero(self) -> &'a mut crate::W { + self.variant(Cshold::Zero) } #[doc = "CS is de-asserted 1 additional baud-time after the end of transmission"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(CSHOLD_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Cshold::One) } #[doc = "CS is de-asserted 2 additional baud-times after the end of transmission"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(CSHOLD_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Cshold::Two) } #[doc = "CS is de-asserted 3 additional baud-times after the end of transmission"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(CSHOLD_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Cshold::Three) } #[doc = "CS is de-asserted 4 additional baud-times after the end of transmission"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(CSHOLD_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Cshold::Four) } #[doc = "CS is de-asserted 5 additional baud-times after the end of transmission"] #[inline(always)] - pub fn five(self) -> &'a mut W { - self.variant(CSHOLD_A::FIVE) + pub fn five(self) -> &'a mut crate::W { + self.variant(Cshold::Five) } #[doc = "CS is de-asserted 6 additional baud-times after the end of transmission"] #[inline(always)] - pub fn six(self) -> &'a mut W { - self.variant(CSHOLD_A::SIX) + pub fn six(self) -> &'a mut crate::W { + self.variant(Cshold::Six) } #[doc = "CS is de-asserted 7 additional baud-times after the end of transmission"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(CSHOLD_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Cshold::Seven) } } -#[doc = "Field `ICS` reader - Inter-Character Spacing"] -pub type ICS_R = crate::FieldReader; #[doc = "Inter-Character Spacing\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICS_A { +pub enum Ics { #[doc = "0: There is no space between charcters"] - ZERO = 0, + Zero = 0, #[doc = "1: Create a space of 1 baud-times between frames"] - ONE = 1, + One = 1, #[doc = "2: Create a space of 2 baud-times between frames"] - TWO = 2, + Two = 2, #[doc = "3: Create a space of 3 baud-times between frames"] - THREE = 3, + Three = 3, #[doc = "4: Create a space of 4 baud-times between frames"] - FOUR = 4, + Four = 4, #[doc = "5: Create a space of 5 baud-times between frames"] - FIVE = 5, + Five = 5, #[doc = "6: Create a space of 6 baud-times between frames"] - SIX = 6, + Six = 6, #[doc = "7: Create a space of 7 baud-times between frames"] - SEVEN = 7, + Seven = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICS_A) -> Self { + fn from(variant: Ics) -> Self { variant as _ } } -impl ICS_R { +impl crate::FieldSpec for Ics { + type Ux = u8; +} +impl crate::IsEnum for Ics {} +#[doc = "Field `ICS` reader - Inter-Character Spacing"] +pub type IcsR = crate::FieldReader; +impl IcsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICS_A { + pub const fn variant(&self) -> Ics { match self.bits { - 0 => ICS_A::ZERO, - 1 => ICS_A::ONE, - 2 => ICS_A::TWO, - 3 => ICS_A::THREE, - 4 => ICS_A::FOUR, - 5 => ICS_A::FIVE, - 6 => ICS_A::SIX, - 7 => ICS_A::SEVEN, + 0 => Ics::Zero, + 1 => Ics::One, + 2 => Ics::Two, + 3 => Ics::Three, + 4 => Ics::Four, + 5 => Ics::Five, + 6 => Ics::Six, + 7 => Ics::Seven, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ZERO`"] + #[doc = "There is no space between charcters"] #[inline(always)] pub fn is_zero(&self) -> bool { - *self == ICS_A::ZERO + *self == Ics::Zero } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Create a space of 1 baud-times between frames"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == ICS_A::ONE + *self == Ics::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Create a space of 2 baud-times between frames"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == ICS_A::TWO + *self == Ics::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "Create a space of 3 baud-times between frames"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == ICS_A::THREE + *self == Ics::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Create a space of 4 baud-times between frames"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == ICS_A::FOUR + *self == Ics::Four } - #[doc = "Checks if the value of the field is `FIVE`"] + #[doc = "Create a space of 5 baud-times between frames"] #[inline(always)] pub fn is_five(&self) -> bool { - *self == ICS_A::FIVE + *self == Ics::Five } - #[doc = "Checks if the value of the field is `SIX`"] + #[doc = "Create a space of 6 baud-times between frames"] #[inline(always)] pub fn is_six(&self) -> bool { - *self == ICS_A::SIX + *self == Ics::Six } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "Create a space of 7 baud-times between frames"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == ICS_A::SEVEN + *self == Ics::Seven } } #[doc = "Field `ICS` writer - Inter-Character Spacing"] -pub type ICS_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, TIMINGCFG_SPEC, u8, ICS_A, 3, O>; -impl<'a, const O: u8> ICS_W<'a, O> { +pub type IcsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Ics, crate::Safe>; +impl<'a, REG> IcsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "There is no space between charcters"] #[inline(always)] - pub fn zero(self) -> &'a mut W { - self.variant(ICS_A::ZERO) + pub fn zero(self) -> &'a mut crate::W { + self.variant(Ics::Zero) } #[doc = "Create a space of 1 baud-times between frames"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(ICS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Ics::One) } #[doc = "Create a space of 2 baud-times between frames"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(ICS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Ics::Two) } #[doc = "Create a space of 3 baud-times between frames"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(ICS_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Ics::Three) } #[doc = "Create a space of 4 baud-times between frames"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(ICS_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Ics::Four) } #[doc = "Create a space of 5 baud-times between frames"] #[inline(always)] - pub fn five(self) -> &'a mut W { - self.variant(ICS_A::FIVE) + pub fn five(self) -> &'a mut crate::W { + self.variant(Ics::Five) } #[doc = "Create a space of 6 baud-times between frames"] #[inline(always)] - pub fn six(self) -> &'a mut W { - self.variant(ICS_A::SIX) + pub fn six(self) -> &'a mut crate::W { + self.variant(Ics::Six) } #[doc = "Create a space of 7 baud-times between frames"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(ICS_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Ics::Seven) } } #[doc = "Field `SETUPWINDOW` reader - Setup Window"] -pub type SETUPWINDOW_R = crate::FieldReader; +pub type SetupwindowR = crate::FieldReader; #[doc = "Field `SETUPWINDOW` writer - Setup Window"] -pub type SETUPWINDOW_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMINGCFG_SPEC, u8, u8, 4, O>; +pub type SetupwindowW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - TX Delay Transmission"] #[inline(always)] - pub fn txdelay(&self) -> TXDELAY_R { - TXDELAY_R::new((self.bits & 3) as u8) + pub fn txdelay(&self) -> TxdelayR { + TxdelayR::new((self.bits & 3) as u8) } #[doc = "Bits 4:6 - Chip Select Setup"] #[inline(always)] - pub fn cssetup(&self) -> CSSETUP_R { - CSSETUP_R::new(((self.bits >> 4) & 7) as u8) + pub fn cssetup(&self) -> CssetupR { + CssetupR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Chip Select Hold"] #[inline(always)] - pub fn cshold(&self) -> CSHOLD_R { - CSHOLD_R::new(((self.bits >> 8) & 7) as u8) + pub fn cshold(&self) -> CsholdR { + CsholdR::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Inter-Character Spacing"] #[inline(always)] - pub fn ics(&self) -> ICS_R { - ICS_R::new(((self.bits >> 12) & 7) as u8) + pub fn ics(&self) -> IcsR { + IcsR::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:19 - Setup Window"] #[inline(always)] - pub fn setupwindow(&self) -> SETUPWINDOW_R { - SETUPWINDOW_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn setupwindow(&self) -> SetupwindowR { + SetupwindowR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - TX Delay Transmission"] #[inline(always)] #[must_use] - pub fn txdelay(&mut self) -> TXDELAY_W<0> { - TXDELAY_W::new(self) + pub fn txdelay(&mut self) -> TxdelayW { + TxdelayW::new(self, 0) } #[doc = "Bits 4:6 - Chip Select Setup"] #[inline(always)] #[must_use] - pub fn cssetup(&mut self) -> CSSETUP_W<4> { - CSSETUP_W::new(self) + pub fn cssetup(&mut self) -> CssetupW { + CssetupW::new(self, 4) } #[doc = "Bits 8:10 - Chip Select Hold"] #[inline(always)] #[must_use] - pub fn cshold(&mut self) -> CSHOLD_W<8> { - CSHOLD_W::new(self) + pub fn cshold(&mut self) -> CsholdW { + CsholdW::new(self, 8) } #[doc = "Bits 12:14 - Inter-Character Spacing"] #[inline(always)] #[must_use] - pub fn ics(&mut self) -> ICS_W<12> { - ICS_W::new(self) + pub fn ics(&mut self) -> IcsW { + IcsW::new(self, 12) } #[doc = "Bits 16:19 - Setup Window"] #[inline(always)] #[must_use] - pub fn setupwindow(&mut self) -> SETUPWINDOW_W<16> { - SETUPWINDOW_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn setupwindow(&mut self) -> SetupwindowW { + SetupwindowW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timingcfg](index.html) module"] -pub struct TIMINGCFG_SPEC; -impl crate::RegisterSpec for TIMINGCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timingcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timingcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TimingcfgSpec; +impl crate::RegisterSpec for TimingcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [timingcfg::R](R) reader structure"] -impl crate::Readable for TIMINGCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timingcfg::W](W) writer structure"] -impl crate::Writable for TIMINGCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timingcfg::R`](R) reader structure"] +impl crate::Readable for TimingcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`timingcfg::W`](W) writer structure"] +impl crate::Writable for TimingcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMINGCFG to value 0x0005_0000"] -impl crate::Resettable for TIMINGCFG_SPEC { - const RESET_VALUE: Self::Ux = 0x0005_0000; +impl crate::Resettable for TimingcfgSpec { + const RESET_VALUE: u32 = 0x0005_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/trigctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/trigctrl.rs index 6e5750d..4b0d8fe 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/trigctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/trigctrl.rs @@ -1,110 +1,70 @@ #[doc = "Register `TRIGCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TRIGCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RXTEN` reader - Receive Trigger Enable"] -pub type RXTEN_R = crate::BitReader; +pub type RxtenR = crate::BitReader; #[doc = "Field `RXTEN` writer - Receive Trigger Enable"] -pub type RXTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type RxtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTEN` reader - Transmit Trigger Enable"] -pub type TXTEN_R = crate::BitReader; +pub type TxtenR = crate::BitReader; #[doc = "Field `TXTEN` writer - Transmit Trigger Enable"] -pub type TXTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type TxtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOTXTEN` reader - AUTOTX Trigger Enable"] -pub type AUTOTXTEN_R = crate::BitReader; +pub type AutotxtenR = crate::BitReader; #[doc = "Field `AUTOTXTEN` writer - AUTOTX Trigger Enable"] -pub type AUTOTXTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type AutotxtenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Receive Trigger Enable"] #[inline(always)] - pub fn rxten(&self) -> RXTEN_R { - RXTEN_R::new((self.bits & 1) != 0) + pub fn rxten(&self) -> RxtenR { + RxtenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transmit Trigger Enable"] #[inline(always)] - pub fn txten(&self) -> TXTEN_R { - TXTEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn txten(&self) -> TxtenR { + TxtenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - AUTOTX Trigger Enable"] #[inline(always)] - pub fn autotxten(&self) -> AUTOTXTEN_R { - AUTOTXTEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn autotxten(&self) -> AutotxtenR { + AutotxtenR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Receive Trigger Enable"] #[inline(always)] #[must_use] - pub fn rxten(&mut self) -> RXTEN_W<0> { - RXTEN_W::new(self) + pub fn rxten(&mut self) -> RxtenW { + RxtenW::new(self, 0) } #[doc = "Bit 1 - Transmit Trigger Enable"] #[inline(always)] #[must_use] - pub fn txten(&mut self) -> TXTEN_W<1> { - TXTEN_W::new(self) + pub fn txten(&mut self) -> TxtenW { + TxtenW::new(self, 1) } #[doc = "Bit 2 - AUTOTX Trigger Enable"] #[inline(always)] #[must_use] - pub fn autotxten(&mut self) -> AUTOTXTEN_W<2> { - AUTOTXTEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn autotxten(&mut self) -> AutotxtenW { + AutotxtenW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [trigctrl](index.html) module"] -pub struct TRIGCTRL_SPEC; -impl crate::RegisterSpec for TRIGCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`trigctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trigctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TrigctrlSpec; +impl crate::RegisterSpec for TrigctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [trigctrl::R](R) reader structure"] -impl crate::Readable for TRIGCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [trigctrl::W](W) writer structure"] -impl crate::Writable for TRIGCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`trigctrl::R`](R) reader structure"] +impl crate::Readable for TrigctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`trigctrl::W`](W) writer structure"] +impl crate::Writable for TrigctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TRIGCTRL to value 0"] -impl crate::Resettable for TRIGCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TrigctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/txdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/txdata.rs index 5605e30..48b104b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/txdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/eusart2_s/txdata.rs @@ -1,52 +1,27 @@ #[doc = "Register `TXDATA` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXDATA` writer - TX Data and Control bits"] -pub type TXDATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDATA_SPEC, u16, u16, 16, O>; +pub type TxdataW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl W { #[doc = "Bits 0:15 - TX Data and Control bits"] #[inline(always)] #[must_use] - pub fn txdata(&mut self) -> TXDATA_W<0> { - TXDATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txdata(&mut self) -> TxdataW { + TxdataW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdata](index.html) module"] -pub struct TXDATA_SPEC; -impl crate::RegisterSpec for TXDATA_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdata::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxdataSpec; +impl crate::RegisterSpec for TxdataSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [txdata::W](W) writer structure"] -impl crate::Writable for TXDATA_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`txdata::W`](W) writer structure"] +impl crate::Writable for TxdataSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXDATA to value 0"] -impl crate::Resettable for TXDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/fsrco_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/fsrco_ns.rs index 456d81d..d6c5146 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/fsrco_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/fsrco_ns.rs @@ -1,10 +1,18 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/fsrco_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/fsrco_ns/ipversion.rs index 62ea808..dfff2ec 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/fsrco_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/fsrco_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/fsrco_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/fsrco_s.rs index 456d81d..d6c5146 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/fsrco_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/fsrco_s.rs @@ -1,10 +1,18 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/fsrco_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/fsrco_s/ipversion.rs index 62ea808..dfff2ec 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/fsrco_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/fsrco_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/generic.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/generic.rs index c1e9b59..d57106c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/generic.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/generic.rs @@ -31,6 +31,9 @@ macro_rules! raw_reg { const fn $mask() -> $U { <$U>::MAX >> ($size - WI) } + impl FieldSpec for $U { + type Ux = $U; + } }; } raw_reg!(u8, 8, mask_u8); @@ -42,21 +45,25 @@ pub trait RegisterSpec { #[doc = " Raw register type (`u8`, `u16`, `u32`, ...)."] type Ux: RawReg; } +#[doc = " Raw field type"] +pub trait FieldSpec: Sized { + #[doc = " Raw field type (`u8`, `u16`, `u32`, ...)."] + type Ux: Copy + core::fmt::Debug + PartialEq + From; +} +#[doc = " Marker for fields with fixed values"] +pub trait IsEnum: FieldSpec {} #[doc = " Trait implemented by readable registers to enable the `read` method."] #[doc = ""] -#[doc = " Registers marked with `Writable` can be also `modify`'ed."] -pub trait Readable: RegisterSpec { - #[doc = " Result from a call to `read` and argument to `modify`."] - type Reader: From> + core::ops::Deref>; -} +#[doc = " Registers marked with `Writable` can be also be `modify`'ed."] +pub trait Readable: RegisterSpec {} #[doc = " Trait implemented by writeable registers."] #[doc = ""] #[doc = " This enables the `write`, `write_with_zero` and `reset` methods."] #[doc = ""] -#[doc = " Registers marked with `Readable` can be also `modify`'ed."] +#[doc = " Registers marked with `Readable` can be also be `modify`'ed."] pub trait Writable: RegisterSpec { - #[doc = " Writer type argument to `write`, et al."] - type Writer: From> + core::ops::DerefMut>; + #[doc = " Is it safe to write any bits to register"] + type Safety; #[doc = " Specifies the register bits that are not changed if you pass `1` and are changed if you pass `0`"] const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux; #[doc = " Specifies the register bits that are not changed if you pass `0` and are changed if you pass `1`"] @@ -75,173 +82,17 @@ pub trait Resettable: RegisterSpec { Self::RESET_VALUE } } -#[doc = " This structure provides volatile access to registers."] -#[repr(transparent)] -pub struct Reg { - register: vcell::VolatileCell, - _marker: marker::PhantomData, -} -unsafe impl Send for Reg where REG::Ux: Send {} -impl Reg { - #[doc = " Returns the underlying memory address of register."] - #[doc = ""] - #[doc = " ```ignore"] - #[doc = " let reg_ptr = periph.reg.as_ptr();"] - #[doc = " ```"] - #[inline(always)] - pub fn as_ptr(&self) -> *mut REG::Ux { - self.register.as_ptr() - } -} -impl Reg { - #[doc = " Reads the contents of a `Readable` register."] - #[doc = ""] - #[doc = " You can read the raw contents of a register by using `bits`:"] - #[doc = " ```ignore"] - #[doc = " let bits = periph.reg.read().bits();"] - #[doc = " ```"] - #[doc = " or get the content of a particular field of a register:"] - #[doc = " ```ignore"] - #[doc = " let reader = periph.reg.read();"] - #[doc = " let bits = reader.field1().bits();"] - #[doc = " let flag = reader.field2().bit_is_set();"] - #[doc = " ```"] - #[inline(always)] - pub fn read(&self) -> REG::Reader { - REG::Reader::from(R { - bits: self.register.get(), - _reg: marker::PhantomData, - }) - } -} -impl Reg { - #[doc = " Writes the reset value to `Writable` register."] - #[doc = ""] - #[doc = " Resets the register to its initial state."] - #[inline(always)] - pub fn reset(&self) { - self.register.set(REG::RESET_VALUE) - } - #[doc = " Writes bits to a `Writable` register."] - #[doc = ""] - #[doc = " You can write raw bits into a register:"] - #[doc = " ```ignore"] - #[doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] - #[doc = " ```"] - #[doc = " or write only the fields you need:"] - #[doc = " ```ignore"] - #[doc = " periph.reg.write(|w| w"] - #[doc = " .field1().bits(newfield1bits)"] - #[doc = " .field2().set_bit()"] - #[doc = " .field3().variant(VARIANT)"] - #[doc = " );"] - #[doc = " ```"] - #[doc = " or an alternative way of saying the same:"] - #[doc = " ```ignore"] - #[doc = " periph.reg.write(|w| {"] - #[doc = " w.field1().bits(newfield1bits);"] - #[doc = " w.field2().set_bit();"] - #[doc = " w.field3().variant(VARIANT)"] - #[doc = " });"] - #[doc = " ```"] - #[doc = " In the latter case, other fields will be set to their reset value."] - #[inline(always)] - pub fn write(&self, f: F) - where - F: FnOnce(&mut REG::Writer) -> &mut W, - { - self.register.set( - f(&mut REG::Writer::from(W { - bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP - | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, - _reg: marker::PhantomData, - })) - .bits, - ); - } -} -impl Reg { - #[doc = " Writes 0 to a `Writable` register."] - #[doc = ""] - #[doc = " Similar to `write`, but unused bits will contain 0."] - #[doc = ""] - #[doc = " # Safety"] - #[doc = ""] - #[doc = " Unsafe to use with registers which don't allow to write 0."] - #[inline(always)] - pub unsafe fn write_with_zero(&self, f: F) - where - F: FnOnce(&mut REG::Writer) -> &mut W, - { - self.register.set( - f(&mut REG::Writer::from(W { - bits: REG::Ux::default(), - _reg: marker::PhantomData, - })) - .bits, - ); - } -} -impl Reg { - #[doc = " Modifies the contents of the register by reading and then writing it."] - #[doc = ""] - #[doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] - #[doc = " ```ignore"] - #[doc = " periph.reg.modify(|r, w| unsafe { w.bits("] - #[doc = " r.bits() | 3"] - #[doc = " ) });"] - #[doc = " ```"] - #[doc = " or"] - #[doc = " ```ignore"] - #[doc = " periph.reg.modify(|_, w| w"] - #[doc = " .field1().bits(newfield1bits)"] - #[doc = " .field2().set_bit()"] - #[doc = " .field3().variant(VARIANT)"] - #[doc = " );"] - #[doc = " ```"] - #[doc = " or an alternative way of saying the same:"] - #[doc = " ```ignore"] - #[doc = " periph.reg.modify(|_, w| {"] - #[doc = " w.field1().bits(newfield1bits);"] - #[doc = " w.field2().set_bit();"] - #[doc = " w.field3().variant(VARIANT)"] - #[doc = " });"] - #[doc = " ```"] - #[doc = " Other fields will have the value they had before the call to `modify`."] - #[inline(always)] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(®::Reader, &'w mut REG::Writer) -> &'w mut W, - { - let bits = self.register.get(); - self.register.set( - f( - ®::Reader::from(R { - bits, - _reg: marker::PhantomData, - }), - &mut REG::Writer::from(W { - bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP - | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, - _reg: marker::PhantomData, - }), - ) - .bits, - ); - } -} +#[doc(hidden)] +pub mod raw; #[doc = " Register reader."] #[doc = ""] #[doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"] #[doc = " method."] -pub struct R { - pub(crate) bits: REG::Ux, - _reg: marker::PhantomData, -} +pub type R = raw::R; impl R { #[doc = " Reads raw bits from register."] #[inline(always)] - pub fn bits(&self) -> REG::Ux { + pub const fn bits(&self) -> REG::Ux { self.bits } } @@ -259,83 +110,55 @@ where #[doc = " Register writer."] #[doc = ""] #[doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] -pub struct W { - #[doc = "Writable bits"] - pub(crate) bits: REG::Ux, - _reg: marker::PhantomData, -} -impl W { +pub type W = raw::W; +impl W { #[doc = " Writes raw bits to the register."] #[doc = ""] #[doc = " # Safety"] #[doc = ""] - #[doc = " Read datasheet or reference manual to find what values are allowed to pass."] + #[doc = " Passing incorrect value can cause undefined behaviour. See reference manual"] #[inline(always)] pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self { self.bits = bits; self } } -#[doc(hidden)] -pub struct FieldReaderRaw { - pub(crate) bits: U, - _reg: marker::PhantomData, -} -impl FieldReaderRaw +impl W where - U: Copy, + REG: Writable, { - #[doc = " Creates a new instance of the reader."] - #[allow(unused)] - #[inline(always)] - pub(crate) fn new(bits: U) -> Self { - Self { - bits, - _reg: marker::PhantomData, - } - } -} -#[doc(hidden)] -pub struct BitReaderRaw { - pub(crate) bits: bool, - _reg: marker::PhantomData, -} -impl BitReaderRaw { - #[doc = " Creates a new instance of the reader."] - #[allow(unused)] + #[doc = " Writes raw bits to the register."] #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - Self { - bits, - _reg: marker::PhantomData, - } + pub fn set(&mut self, bits: REG::Ux) -> &mut Self { + self.bits = bits; + self } } #[doc = " Field reader."] #[doc = ""] #[doc = " Result of the `read` methods of fields."] -pub type FieldReader = FieldReaderRaw; +pub type FieldReader = raw::FieldReader; #[doc = " Bit-wise field reader"] -pub type BitReader = BitReaderRaw; -impl FieldReader -where - U: Copy, -{ +pub type BitReader = raw::BitReader; +impl FieldReader { #[doc = " Reads raw bits from field."] #[inline(always)] - pub fn bits(&self) -> U { + pub const fn bits(&self) -> FI::Ux { self.bits } } -impl PartialEq for FieldReader +impl core::fmt::Debug for FieldReader { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + core::fmt::Debug::fmt(&self.bits, f) + } +} +impl PartialEq for FieldReader where - U: PartialEq, - FI: Copy, - U: From, + FI: FieldSpec + Copy, { #[inline(always)] fn eq(&self, other: &FI) -> bool { - self.bits.eq(&U::from(*other)) + self.bits.eq(&FI::Ux::from(*other)) } } impl PartialEq for BitReader @@ -351,129 +174,183 @@ where impl BitReader { #[doc = " Value of the field as raw bits."] #[inline(always)] - pub fn bit(&self) -> bool { + pub const fn bit(&self) -> bool { self.bits } #[doc = " Returns `true` if the bit is clear (0)."] #[inline(always)] - pub fn bit_is_clear(&self) -> bool { + pub const fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = " Returns `true` if the bit is set (1)."] #[inline(always)] - pub fn bit_is_set(&self) -> bool { + pub const fn bit_is_set(&self) -> bool { self.bit() } } -#[doc(hidden)] +impl core::fmt::Debug for BitReader { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + core::fmt::Debug::fmt(&self.bits, f) + } +} +#[doc = " Marker for register/field writers which can take any value of specified width"] pub struct Safe; -#[doc(hidden)] +#[doc = " You should check that value is allowed to pass to register/field writer marked with this"] pub struct Unsafe; -#[doc(hidden)] -pub struct FieldWriterRaw<'a, U, REG, N, FI, Safety, const WI: u8, const O: u8> +#[doc = " Marker for field writers are safe to write in specified inclusive range"] +pub struct Range; +#[doc = " Marker for field writers are safe to write in specified inclusive range"] +pub struct RangeFrom; +#[doc = " Marker for field writers are safe to write in specified inclusive range"] +pub struct RangeTo; +#[doc = " Write field Proxy"] +pub type FieldWriter<'a, REG, const WI: u8, FI = u8, Safety = Unsafe> = + raw::FieldWriter<'a, REG, WI, FI, Safety>; +impl<'a, REG, const WI: u8, FI, Safety> FieldWriter<'a, REG, WI, FI, Safety> where - REG: Writable + RegisterSpec, - N: From, + REG: Writable + RegisterSpec, + FI: FieldSpec, { - pub(crate) w: &'a mut REG::Writer, - _field: marker::PhantomData<(N, FI, Safety)>, + #[doc = " Field width"] + pub const WIDTH: u8 = WI; + #[doc = " Field width"] + #[inline(always)] + pub const fn width(&self) -> u8 { + WI + } + #[doc = " Field offset"] + #[inline(always)] + pub const fn offset(&self) -> u8 { + self.o + } } -impl<'a, U, REG, N, FI, Safety, const WI: u8, const O: u8> - FieldWriterRaw<'a, U, REG, N, FI, Safety, WI, O> +impl<'a, REG, const WI: u8, FI, Safety> FieldWriter<'a, REG, WI, FI, Safety> where - REG: Writable + RegisterSpec, - N: From, + REG: Writable + RegisterSpec, + FI: FieldSpec, + REG::Ux: From, { - #[doc = " Creates a new instance of the writer"] - #[allow(unused)] + #[doc = " Writes raw bits to the field"] + #[doc = ""] + #[doc = " # Safety"] + #[doc = ""] + #[doc = " Passing incorrect value can cause undefined behaviour. See reference manual"] #[inline(always)] - pub(crate) fn new(w: &'a mut REG::Writer) -> Self { - Self { - w, - _field: marker::PhantomData, - } + pub unsafe fn bits(self, value: FI::Ux) -> &'a mut W { + self.w.bits &= !(REG::Ux::mask::() << self.o); + self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << self.o; + self.w } } -#[doc(hidden)] -pub struct BitWriterRaw<'a, U, REG, FI, M, const O: u8> +impl<'a, REG, const WI: u8, FI> FieldWriter<'a, REG, WI, FI, Safe> where - REG: Writable + RegisterSpec, - bool: From, + REG: Writable + RegisterSpec, + FI: FieldSpec, + REG::Ux: From, { - pub(crate) w: &'a mut REG::Writer, - _field: marker::PhantomData<(FI, M)>, + #[doc = " Writes raw bits to the field"] + #[inline(always)] + pub fn set(self, value: FI::Ux) -> &'a mut W { + unsafe { self.bits(value) } + } } -impl<'a, U, REG, FI, M, const O: u8> BitWriterRaw<'a, U, REG, FI, M, O> +impl<'a, REG, const WI: u8, FI, const MIN: u64, const MAX: u64> + FieldWriter<'a, REG, WI, FI, Range> where - REG: Writable + RegisterSpec, - bool: From, + REG: Writable + RegisterSpec, + FI: FieldSpec, + REG::Ux: From, + u64: From, { - #[doc = " Creates a new instance of the writer"] - #[allow(unused)] + #[doc = " Writes raw bits to the field"] #[inline(always)] - pub(crate) fn new(w: &'a mut REG::Writer) -> Self { - Self { - w, - _field: marker::PhantomData, + pub fn set(self, value: FI::Ux) -> &'a mut W { + { + let value = u64::from(value); + assert!(value >= MIN && value <= MAX); } + unsafe { self.bits(value) } } } -#[doc = " Write field Proxy with unsafe `bits`"] -pub type FieldWriter<'a, U, REG, N, FI, const WI: u8, const O: u8> = - FieldWriterRaw<'a, U, REG, N, FI, Unsafe, WI, O>; -#[doc = " Write field Proxy with safe `bits`"] -pub type FieldWriterSafe<'a, U, REG, N, FI, const WI: u8, const O: u8> = - FieldWriterRaw<'a, U, REG, N, FI, Safe, WI, O>; -impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriter<'a, U, REG, N, FI, WI, OF> +impl<'a, REG, const WI: u8, FI, const MIN: u64> FieldWriter<'a, REG, WI, FI, RangeFrom> where - REG: Writable + RegisterSpec, - N: From, + REG: Writable + RegisterSpec, + FI: FieldSpec, + REG::Ux: From, + u64: From, { - #[doc = " Field width"] - pub const WIDTH: u8 = WI; + #[doc = " Writes raw bits to the field"] + #[inline(always)] + pub fn set(self, value: FI::Ux) -> &'a mut W { + { + let value = u64::from(value); + assert!(value >= MIN); + } + unsafe { self.bits(value) } + } } -impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriterSafe<'a, U, REG, N, FI, WI, OF> +impl<'a, REG, const WI: u8, FI, const MAX: u64> FieldWriter<'a, REG, WI, FI, RangeTo> where - REG: Writable + RegisterSpec, - N: From, + REG: Writable + RegisterSpec, + FI: FieldSpec, + REG::Ux: From, + u64: From, { - #[doc = " Field width"] - pub const WIDTH: u8 = WI; + #[doc = " Writes raw bits to the field"] + #[inline(always)] + pub fn set(self, value: FI::Ux) -> &'a mut W { + { + let value = u64::from(value); + assert!(value <= MAX); + } + unsafe { self.bits(value) } + } +} +impl<'a, REG, const WI: u8, FI, Safety> FieldWriter<'a, REG, WI, FI, Safety> +where + REG: Writable + RegisterSpec, + FI: IsEnum, + REG::Ux: From, +{ + #[doc = " Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: FI) -> &'a mut W { + unsafe { self.bits(FI::Ux::from(variant)) } + } } macro_rules! bit_proxy { ($ writer : ident , $ mwv : ident) => { #[doc(hidden)] pub struct $mwv; #[doc = " Bit-wise write field proxy"] - pub type $writer<'a, U, REG, FI, const O: u8> = BitWriterRaw<'a, U, REG, FI, $mwv, O>; - impl<'a, U, REG, FI, const OF: u8> $writer<'a, U, REG, FI, OF> + pub type $writer<'a, REG, FI = bool> = raw::BitWriter<'a, REG, FI, $mwv>; + impl<'a, REG, FI> $writer<'a, REG, FI> where - REG: Writable + RegisterSpec, + REG: Writable + RegisterSpec, bool: From, { #[doc = " Field width"] pub const WIDTH: u8 = 1; - } - }; -} -macro_rules! impl_bit_proxy { - ($ writer : ident) => { - impl<'a, U, REG, FI, const OF: u8> $writer<'a, U, REG, FI, OF> - where - REG: Writable + RegisterSpec, - U: RawReg, - bool: From, - { + #[doc = " Field width"] + #[inline(always)] + pub const fn width(&self) -> u8 { + Self::WIDTH + } + #[doc = " Field offset"] + #[inline(always)] + pub const fn offset(&self) -> u8 { + self.o + } #[doc = " Writes bit to the field"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut REG::Writer { - self.w.bits &= !(U::one() << OF); - self.w.bits |= (U::from(value) & U::one()) << OF; + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits &= !(REG::Ux::one() << self.o); + self.w.bits |= (REG::Ux::from(value) & REG::Ux::one()) << self.o; self.w } #[doc = " Writes `variant` to the field"] #[inline(always)] - pub fn variant(self, variant: FI) -> &'a mut REG::Writer { + pub fn variant(self, variant: FI) -> &'a mut W { self.bit(bool::from(variant)) } } @@ -486,149 +363,256 @@ bit_proxy!(BitWriter1C, Bit1C); bit_proxy!(BitWriter0S, Bit0S); bit_proxy!(BitWriter1T, Bit1T); bit_proxy!(BitWriter0T, Bit0T); -impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriter<'a, U, REG, N, FI, WI, OF> +impl<'a, REG, FI> BitWriter<'a, REG, FI> where - REG: Writable + RegisterSpec, - U: RawReg + From, - N: From, -{ - #[doc = " Writes raw bits to the field"] - #[doc = ""] - #[doc = " # Safety"] - #[doc = ""] - #[doc = " Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(self, value: N) -> &'a mut REG::Writer { - self.w.bits &= !(U::mask::() << OF); - self.w.bits |= (U::from(value) & U::mask::()) << OF; - self.w - } - #[doc = " Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: FI) -> &'a mut REG::Writer { - unsafe { self.bits(N::from(variant)) } - } -} -impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriterSafe<'a, U, REG, N, FI, WI, OF> -where - REG: Writable + RegisterSpec, - U: RawReg + From, - N: From, -{ - #[doc = " Writes raw bits to the field"] - #[inline(always)] - pub fn bits(self, value: N) -> &'a mut REG::Writer { - self.w.bits &= !(U::mask::() << OF); - self.w.bits |= (U::from(value) & U::mask::()) << OF; - self.w - } - #[doc = " Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: FI) -> &'a mut REG::Writer { - self.bits(N::from(variant)) - } -} -impl_bit_proxy!(BitWriter); -impl_bit_proxy!(BitWriter1S); -impl_bit_proxy!(BitWriter0C); -impl_bit_proxy!(BitWriter1C); -impl_bit_proxy!(BitWriter0S); -impl_bit_proxy!(BitWriter1T); -impl_bit_proxy!(BitWriter0T); -impl<'a, U, REG, FI, const OF: u8> BitWriter<'a, U, REG, FI, OF> -where - REG: Writable + RegisterSpec, - U: RawReg, + REG: Writable + RegisterSpec, bool: From, { #[doc = " Sets the field bit"] #[inline(always)] - pub fn set_bit(self) -> &'a mut REG::Writer { - self.w.bits |= U::one() << OF; + pub fn set_bit(self) -> &'a mut W { + self.w.bits |= REG::Ux::one() << self.o; self.w } #[doc = " Clears the field bit"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut REG::Writer { - self.w.bits &= !(U::one() << OF); + pub fn clear_bit(self) -> &'a mut W { + self.w.bits &= !(REG::Ux::one() << self.o); self.w } } -impl<'a, U, REG, FI, const OF: u8> BitWriter1S<'a, U, REG, FI, OF> +impl<'a, REG, FI> BitWriter1S<'a, REG, FI> where - REG: Writable + RegisterSpec, - U: RawReg, + REG: Writable + RegisterSpec, bool: From, { #[doc = " Sets the field bit"] #[inline(always)] - pub fn set_bit(self) -> &'a mut REG::Writer { - self.w.bits |= U::one() << OF; + pub fn set_bit(self) -> &'a mut W { + self.w.bits |= REG::Ux::one() << self.o; self.w } } -impl<'a, U, REG, FI, const OF: u8> BitWriter0C<'a, U, REG, FI, OF> +impl<'a, REG, FI> BitWriter0C<'a, REG, FI> where - REG: Writable + RegisterSpec, - U: RawReg, + REG: Writable + RegisterSpec, bool: From, { #[doc = " Clears the field bit"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut REG::Writer { - self.w.bits &= !(U::one() << OF); + pub fn clear_bit(self) -> &'a mut W { + self.w.bits &= !(REG::Ux::one() << self.o); self.w } } -impl<'a, U, REG, FI, const OF: u8> BitWriter1C<'a, U, REG, FI, OF> +impl<'a, REG, FI> BitWriter1C<'a, REG, FI> where - REG: Writable + RegisterSpec, - U: RawReg, + REG: Writable + RegisterSpec, bool: From, { #[doc = "Clears the field bit by passing one"] #[inline(always)] - pub fn clear_bit_by_one(self) -> &'a mut REG::Writer { - self.w.bits |= U::one() << OF; + pub fn clear_bit_by_one(self) -> &'a mut W { + self.w.bits |= REG::Ux::one() << self.o; self.w } } -impl<'a, U, REG, FI, const OF: u8> BitWriter0S<'a, U, REG, FI, OF> +impl<'a, REG, FI> BitWriter0S<'a, REG, FI> where - REG: Writable + RegisterSpec, - U: RawReg, + REG: Writable + RegisterSpec, bool: From, { #[doc = "Sets the field bit by passing zero"] #[inline(always)] - pub fn set_bit_by_zero(self) -> &'a mut REG::Writer { - self.w.bits &= !(U::one() << OF); + pub fn set_bit_by_zero(self) -> &'a mut W { + self.w.bits &= !(REG::Ux::one() << self.o); self.w } } -impl<'a, U, REG, FI, const OF: u8> BitWriter1T<'a, U, REG, FI, OF> +impl<'a, REG, FI> BitWriter1T<'a, REG, FI> where - REG: Writable + RegisterSpec, - U: RawReg, + REG: Writable + RegisterSpec, bool: From, { #[doc = "Toggle the field bit by passing one"] #[inline(always)] - pub fn toggle_bit(self) -> &'a mut REG::Writer { - self.w.bits |= U::one() << OF; + pub fn toggle_bit(self) -> &'a mut W { + self.w.bits |= REG::Ux::one() << self.o; self.w } } -impl<'a, U, REG, FI, const OF: u8> BitWriter0T<'a, U, REG, FI, OF> +impl<'a, REG, FI> BitWriter0T<'a, REG, FI> where - REG: Writable + RegisterSpec, - U: RawReg, + REG: Writable + RegisterSpec, bool: From, { #[doc = "Toggle the field bit by passing zero"] #[inline(always)] - pub fn toggle_bit(self) -> &'a mut REG::Writer { - self.w.bits &= !(U::one() << OF); + pub fn toggle_bit(self) -> &'a mut W { + self.w.bits &= !(REG::Ux::one() << self.o); self.w } } +#[doc = " This structure provides volatile access to registers."] +#[repr(transparent)] +pub struct Reg { + register: vcell::VolatileCell, + _marker: marker::PhantomData, +} +unsafe impl Send for Reg where REG::Ux: Send {} +impl Reg { + #[doc = " Returns the underlying memory address of register."] + #[doc = ""] + #[doc = " ```ignore"] + #[doc = " let reg_ptr = periph.reg.as_ptr();"] + #[doc = " ```"] + #[inline(always)] + pub fn as_ptr(&self) -> *mut REG::Ux { + self.register.as_ptr() + } +} +impl Reg { + #[doc = " Reads the contents of a `Readable` register."] + #[doc = ""] + #[doc = " You can read the raw contents of a register by using `bits`:"] + #[doc = " ```ignore"] + #[doc = " let bits = periph.reg.read().bits();"] + #[doc = " ```"] + #[doc = " or get the content of a particular field of a register:"] + #[doc = " ```ignore"] + #[doc = " let reader = periph.reg.read();"] + #[doc = " let bits = reader.field1().bits();"] + #[doc = " let flag = reader.field2().bit_is_set();"] + #[doc = " ```"] + #[inline(always)] + pub fn read(&self) -> R { + R { + bits: self.register.get(), + _reg: marker::PhantomData, + } + } +} +impl Reg { + #[doc = " Writes the reset value to `Writable` register."] + #[doc = ""] + #[doc = " Resets the register to its initial state."] + #[inline(always)] + pub fn reset(&self) { + self.register.set(REG::RESET_VALUE) + } + #[doc = " Writes bits to a `Writable` register."] + #[doc = ""] + #[doc = " You can write raw bits into a register:"] + #[doc = " ```ignore"] + #[doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] + #[doc = " ```"] + #[doc = " or write only the fields you need:"] + #[doc = " ```ignore"] + #[doc = " periph.reg.write(|w| w"] + #[doc = " .field1().bits(newfield1bits)"] + #[doc = " .field2().set_bit()"] + #[doc = " .field3().variant(VARIANT)"] + #[doc = " );"] + #[doc = " ```"] + #[doc = " or an alternative way of saying the same:"] + #[doc = " ```ignore"] + #[doc = " periph.reg.write(|w| {"] + #[doc = " w.field1().bits(newfield1bits);"] + #[doc = " w.field2().set_bit();"] + #[doc = " w.field3().variant(VARIANT)"] + #[doc = " });"] + #[doc = " ```"] + #[doc = " In the latter case, other fields will be set to their reset value."] + #[inline(always)] + pub fn write(&self, f: F) + where + F: FnOnce(&mut W) -> &mut W, + { + self.register.set( + f(&mut W { + bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP + | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, + _reg: marker::PhantomData, + }) + .bits, + ); + } +} +impl Reg { + #[doc = " Writes 0 to a `Writable` register."] + #[doc = ""] + #[doc = " Similar to `write`, but unused bits will contain 0."] + #[doc = ""] + #[doc = " # Safety"] + #[doc = ""] + #[doc = " Unsafe to use with registers which don't allow to write 0."] + #[inline(always)] + pub unsafe fn write_with_zero(&self, f: F) + where + F: FnOnce(&mut W) -> &mut W, + { + self.register.set( + f(&mut W { + bits: REG::Ux::default(), + _reg: marker::PhantomData, + }) + .bits, + ); + } +} +impl Reg { + #[doc = " Modifies the contents of the register by reading and then writing it."] + #[doc = ""] + #[doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] + #[doc = " ```ignore"] + #[doc = " periph.reg.modify(|r, w| unsafe { w.bits("] + #[doc = " r.bits() | 3"] + #[doc = " ) });"] + #[doc = " ```"] + #[doc = " or"] + #[doc = " ```ignore"] + #[doc = " periph.reg.modify(|_, w| w"] + #[doc = " .field1().bits(newfield1bits)"] + #[doc = " .field2().set_bit()"] + #[doc = " .field3().variant(VARIANT)"] + #[doc = " );"] + #[doc = " ```"] + #[doc = " or an alternative way of saying the same:"] + #[doc = " ```ignore"] + #[doc = " periph.reg.modify(|_, w| {"] + #[doc = " w.field1().bits(newfield1bits);"] + #[doc = " w.field2().set_bit();"] + #[doc = " w.field3().variant(VARIANT)"] + #[doc = " });"] + #[doc = " ```"] + #[doc = " Other fields will have the value they had before the call to `modify`."] + #[inline(always)] + pub fn modify(&self, f: F) + where + for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, + { + let bits = self.register.get(); + self.register.set( + f( + &R { + bits, + _reg: marker::PhantomData, + }, + &mut W { + bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP + | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, + _reg: marker::PhantomData, + }, + ) + .bits, + ); + } +} +impl core::fmt::Debug for crate::generic::Reg +where + R: core::fmt::Debug, +{ + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + core::fmt::Debug::fmt(&self.read(), f) + } +} diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/generic/raw.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/generic/raw.rs new file mode 100644 index 0000000..81f5779 --- /dev/null +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/generic/raw.rs @@ -0,0 +1,93 @@ +use super::{marker, BitM, FieldSpec, RegisterSpec, Unsafe, Writable}; +pub struct R { + pub(crate) bits: REG::Ux, + pub(super) _reg: marker::PhantomData, +} +pub struct W { + #[doc = "Writable bits"] + pub(crate) bits: REG::Ux, + pub(super) _reg: marker::PhantomData, +} +pub struct FieldReader +where + FI: FieldSpec, +{ + pub(crate) bits: FI::Ux, + _reg: marker::PhantomData, +} +impl FieldReader { + #[doc = " Creates a new instance of the reader."] + #[allow(unused)] + #[inline(always)] + pub(crate) const fn new(bits: FI::Ux) -> Self { + Self { + bits, + _reg: marker::PhantomData, + } + } +} +pub struct BitReader { + pub(crate) bits: bool, + _reg: marker::PhantomData, +} +impl BitReader { + #[doc = " Creates a new instance of the reader."] + #[allow(unused)] + #[inline(always)] + pub(crate) const fn new(bits: bool) -> Self { + Self { + bits, + _reg: marker::PhantomData, + } + } +} +pub struct FieldWriter<'a, REG, const WI: u8, FI = u8, Safety = Unsafe> +where + REG: Writable + RegisterSpec, + FI: FieldSpec, +{ + pub(crate) w: &'a mut W, + pub(crate) o: u8, + _field: marker::PhantomData<(FI, Safety)>, +} +impl<'a, REG, const WI: u8, FI, Safety> FieldWriter<'a, REG, WI, FI, Safety> +where + REG: Writable + RegisterSpec, + FI: FieldSpec, +{ + #[doc = " Creates a new instance of the writer"] + #[allow(unused)] + #[inline(always)] + pub(crate) fn new(w: &'a mut W, o: u8) -> Self { + Self { + w, + o, + _field: marker::PhantomData, + } + } +} +pub struct BitWriter<'a, REG, FI = bool, M = BitM> +where + REG: Writable + RegisterSpec, + bool: From, +{ + pub(crate) w: &'a mut W, + pub(crate) o: u8, + _field: marker::PhantomData<(FI, M)>, +} +impl<'a, REG, FI, M> BitWriter<'a, REG, FI, M> +where + REG: Writable + RegisterSpec, + bool: From, +{ + #[doc = " Creates a new instance of the writer"] + #[allow(unused)] + #[inline(always)] + pub(crate) fn new(w: &'a mut W, o: u8) -> Self { + Self { + w, + o, + _field: marker::PhantomData, + } + } +} diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns.rs index d643839..d755f2f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns.rs @@ -1,76 +1,150 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + ctrl: Ctrl, + cmd: Cmd, + init: Init, + poly: Poly, + inputdata: Inputdata, + inputdatahword: Inputdatahword, + inputdatabyte: Inputdatabyte, + data: Data, + datarev: Datarev, + databyterev: Databyterev, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x0c - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x10 - No Description"] - pub init: INIT, + #[inline(always)] + pub const fn init(&self) -> &Init { + &self.init + } #[doc = "0x14 - No Description"] - pub poly: POLY, + #[inline(always)] + pub const fn poly(&self) -> &Poly { + &self.poly + } #[doc = "0x18 - No Description"] - pub inputdata: INPUTDATA, + #[inline(always)] + pub const fn inputdata(&self) -> &Inputdata { + &self.inputdata + } #[doc = "0x1c - No Description"] - pub inputdatahword: INPUTDATAHWORD, + #[inline(always)] + pub const fn inputdatahword(&self) -> &Inputdatahword { + &self.inputdatahword + } #[doc = "0x20 - No Description"] - pub inputdatabyte: INPUTDATABYTE, + #[inline(always)] + pub const fn inputdatabyte(&self) -> &Inputdatabyte { + &self.inputdatabyte + } #[doc = "0x24 - No Description"] - pub data: DATA, + #[inline(always)] + pub const fn data(&self) -> &Data { + &self.data + } #[doc = "0x28 - No Description"] - pub datarev: DATAREV, + #[inline(always)] + pub const fn datarev(&self) -> &Datarev { + &self.datarev + } #[doc = "0x2c - No Description"] - pub databyterev: DATABYTEREV, + #[inline(always)] + pub const fn databyterev(&self) -> &Databyterev { + &self.databyterev + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "INIT (rw) register accessor: an alias for `Reg`"] -pub type INIT = crate::Reg; +#[doc = "INIT (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`init::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`init::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@init`] +module"] +#[doc(alias = "INIT")] +pub type Init = crate::Reg; #[doc = "No Description"] pub mod init; -#[doc = "POLY (rw) register accessor: an alias for `Reg`"] -pub type POLY = crate::Reg; +#[doc = "POLY (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`poly::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`poly::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@poly`] +module"] +#[doc(alias = "POLY")] +pub type Poly = crate::Reg; #[doc = "No Description"] pub mod poly; -#[doc = "INPUTDATA (w) register accessor: an alias for `Reg`"] -pub type INPUTDATA = crate::Reg; +#[doc = "INPUTDATA (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inputdata::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inputdata`] +module"] +#[doc(alias = "INPUTDATA")] +pub type Inputdata = crate::Reg; #[doc = "No Description"] pub mod inputdata; -#[doc = "INPUTDATAHWORD (w) register accessor: an alias for `Reg`"] -pub type INPUTDATAHWORD = crate::Reg; +#[doc = "INPUTDATAHWORD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inputdatahword::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inputdatahword`] +module"] +#[doc(alias = "INPUTDATAHWORD")] +pub type Inputdatahword = crate::Reg; #[doc = "No Description"] pub mod inputdatahword; -#[doc = "INPUTDATABYTE (w) register accessor: an alias for `Reg`"] -pub type INPUTDATABYTE = crate::Reg; +#[doc = "INPUTDATABYTE (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inputdatabyte::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inputdatabyte`] +module"] +#[doc(alias = "INPUTDATABYTE")] +pub type Inputdatabyte = crate::Reg; #[doc = "No Description"] pub mod inputdatabyte; -#[doc = "DATA (r) register accessor: an alias for `Reg`"] -pub type DATA = crate::Reg; +#[doc = "DATA (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`data::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data`] +module"] +#[doc(alias = "DATA")] +pub type Data = crate::Reg; #[doc = "No Description"] pub mod data; -#[doc = "DATAREV (r) register accessor: an alias for `Reg`"] -pub type DATAREV = crate::Reg; +#[doc = "DATAREV (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`datarev::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@datarev`] +module"] +#[doc(alias = "DATAREV")] +pub type Datarev = crate::Reg; #[doc = "No Description"] pub mod datarev; -#[doc = "DATABYTEREV (r) register accessor: an alias for `Reg`"] -pub type DATABYTEREV = crate::Reg; +#[doc = "DATABYTEREV (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`databyterev::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@databyterev`] +module"] +#[doc(alias = "DATABYTEREV")] +pub type Databyterev = crate::Reg; #[doc = "No Description"] pub mod databyterev; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/cmd.rs index fea10b4..c6620e8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/cmd.rs @@ -1,52 +1,27 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `INIT` writer - Initialization Enable"] -pub type INIT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type InitW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Initialization Enable"] #[inline(always)] #[must_use] - pub fn init(&mut self) -> INIT_W<0> { - INIT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn init(&mut self) -> InitW { + InitW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/ctrl.rs index e743a21..1314874 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/ctrl.rs @@ -1,278 +1,247 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `POLYSEL` reader - Polynomial Select"] -pub type POLYSEL_R = crate::BitReader; +pub type W = crate::W; #[doc = "Polynomial Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum POLYSEL_A { +pub enum Polysel { #[doc = "0: CRC-32 (0x04C11DB7) polynomial selected"] - CRC32 = 0, + Crc32 = 0, #[doc = "1: 16-bit CRC programmable polynomial selected"] - CRC16 = 1, + Crc16 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: POLYSEL_A) -> Self { + fn from(variant: Polysel) -> Self { variant as u8 != 0 } } -impl POLYSEL_R { +#[doc = "Field `POLYSEL` reader - Polynomial Select"] +pub type PolyselR = crate::BitReader; +impl PolyselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> POLYSEL_A { + pub const fn variant(&self) -> Polysel { match self.bits { - false => POLYSEL_A::CRC32, - true => POLYSEL_A::CRC16, + false => Polysel::Crc32, + true => Polysel::Crc16, } } - #[doc = "Checks if the value of the field is `CRC32`"] + #[doc = "CRC-32 (0x04C11DB7) polynomial selected"] #[inline(always)] pub fn is_crc32(&self) -> bool { - *self == POLYSEL_A::CRC32 + *self == Polysel::Crc32 } - #[doc = "Checks if the value of the field is `CRC16`"] + #[doc = "16-bit CRC programmable polynomial selected"] #[inline(always)] pub fn is_crc16(&self) -> bool { - *self == POLYSEL_A::CRC16 + *self == Polysel::Crc16 } } #[doc = "Field `POLYSEL` writer - Polynomial Select"] -pub type POLYSEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, POLYSEL_A, O>; -impl<'a, const O: u8> POLYSEL_W<'a, O> { +pub type PolyselW<'a, REG> = crate::BitWriter<'a, REG, Polysel>; +impl<'a, REG> PolyselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "CRC-32 (0x04C11DB7) polynomial selected"] #[inline(always)] - pub fn crc32(self) -> &'a mut W { - self.variant(POLYSEL_A::CRC32) + pub fn crc32(self) -> &'a mut crate::W { + self.variant(Polysel::Crc32) } #[doc = "16-bit CRC programmable polynomial selected"] #[inline(always)] - pub fn crc16(self) -> &'a mut W { - self.variant(POLYSEL_A::CRC16) + pub fn crc16(self) -> &'a mut crate::W { + self.variant(Polysel::Crc16) } } #[doc = "Field `BYTEMODE` reader - Byte Mode Enable"] -pub type BYTEMODE_R = crate::BitReader; +pub type BytemodeR = crate::BitReader; #[doc = "Field `BYTEMODE` writer - Byte Mode Enable"] -pub type BYTEMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; -#[doc = "Field `BITREVERSE` reader - Byte-level Bit Reverse Enable"] -pub type BITREVERSE_R = crate::BitReader; +pub type BytemodeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Byte-level Bit Reverse Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BITREVERSE_A { +pub enum Bitreverse { #[doc = "0: No reverse"] - NORMAL = 0, + Normal = 0, #[doc = "1: Reverse bit order in each byte"] - REVERSED = 1, + Reversed = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BITREVERSE_A) -> Self { + fn from(variant: Bitreverse) -> Self { variant as u8 != 0 } } -impl BITREVERSE_R { +#[doc = "Field `BITREVERSE` reader - Byte-level Bit Reverse Enable"] +pub type BitreverseR = crate::BitReader; +impl BitreverseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> BITREVERSE_A { + pub const fn variant(&self) -> Bitreverse { match self.bits { - false => BITREVERSE_A::NORMAL, - true => BITREVERSE_A::REVERSED, + false => Bitreverse::Normal, + true => Bitreverse::Reversed, } } - #[doc = "Checks if the value of the field is `NORMAL`"] + #[doc = "No reverse"] #[inline(always)] pub fn is_normal(&self) -> bool { - *self == BITREVERSE_A::NORMAL + *self == Bitreverse::Normal } - #[doc = "Checks if the value of the field is `REVERSED`"] + #[doc = "Reverse bit order in each byte"] #[inline(always)] pub fn is_reversed(&self) -> bool { - *self == BITREVERSE_A::REVERSED + *self == Bitreverse::Reversed } } #[doc = "Field `BITREVERSE` writer - Byte-level Bit Reverse Enable"] -pub type BITREVERSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, BITREVERSE_A, O>; -impl<'a, const O: u8> BITREVERSE_W<'a, O> { +pub type BitreverseW<'a, REG> = crate::BitWriter<'a, REG, Bitreverse>; +impl<'a, REG> BitreverseW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No reverse"] #[inline(always)] - pub fn normal(self) -> &'a mut W { - self.variant(BITREVERSE_A::NORMAL) + pub fn normal(self) -> &'a mut crate::W { + self.variant(Bitreverse::Normal) } #[doc = "Reverse bit order in each byte"] #[inline(always)] - pub fn reversed(self) -> &'a mut W { - self.variant(BITREVERSE_A::REVERSED) + pub fn reversed(self) -> &'a mut crate::W { + self.variant(Bitreverse::Reversed) } } -#[doc = "Field `BYTEREVERSE` reader - Byte Reverse Mode"] -pub type BYTEREVERSE_R = crate::BitReader; #[doc = "Byte Reverse Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BYTEREVERSE_A { +pub enum Bytereverse { #[doc = "0: No reverse: B3, B2, B1, B0"] - NORMAL = 0, + Normal = 0, #[doc = "1: Reverse byte order. For 32-bit: B0, B1, B2, B3; For 16-bit: 0, 0, B0, B1"] - REVERSED = 1, + Reversed = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BYTEREVERSE_A) -> Self { + fn from(variant: Bytereverse) -> Self { variant as u8 != 0 } } -impl BYTEREVERSE_R { +#[doc = "Field `BYTEREVERSE` reader - Byte Reverse Mode"] +pub type BytereverseR = crate::BitReader; +impl BytereverseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> BYTEREVERSE_A { + pub const fn variant(&self) -> Bytereverse { match self.bits { - false => BYTEREVERSE_A::NORMAL, - true => BYTEREVERSE_A::REVERSED, + false => Bytereverse::Normal, + true => Bytereverse::Reversed, } } - #[doc = "Checks if the value of the field is `NORMAL`"] + #[doc = "No reverse: B3, B2, B1, B0"] #[inline(always)] pub fn is_normal(&self) -> bool { - *self == BYTEREVERSE_A::NORMAL + *self == Bytereverse::Normal } - #[doc = "Checks if the value of the field is `REVERSED`"] + #[doc = "Reverse byte order. For 32-bit: B0, B1, B2, B3; For 16-bit: 0, 0, B0, B1"] #[inline(always)] pub fn is_reversed(&self) -> bool { - *self == BYTEREVERSE_A::REVERSED + *self == Bytereverse::Reversed } } #[doc = "Field `BYTEREVERSE` writer - Byte Reverse Mode"] -pub type BYTEREVERSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, BYTEREVERSE_A, O>; -impl<'a, const O: u8> BYTEREVERSE_W<'a, O> { +pub type BytereverseW<'a, REG> = crate::BitWriter<'a, REG, Bytereverse>; +impl<'a, REG> BytereverseW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No reverse: B3, B2, B1, B0"] #[inline(always)] - pub fn normal(self) -> &'a mut W { - self.variant(BYTEREVERSE_A::NORMAL) + pub fn normal(self) -> &'a mut crate::W { + self.variant(Bytereverse::Normal) } #[doc = "Reverse byte order. For 32-bit: B0, B1, B2, B3; For 16-bit: 0, 0, B0, B1"] #[inline(always)] - pub fn reversed(self) -> &'a mut W { - self.variant(BYTEREVERSE_A::REVERSED) + pub fn reversed(self) -> &'a mut crate::W { + self.variant(Bytereverse::Reversed) } } #[doc = "Field `AUTOINIT` reader - Auto Init Enable"] -pub type AUTOINIT_R = crate::BitReader; +pub type AutoinitR = crate::BitReader; #[doc = "Field `AUTOINIT` writer - Auto Init Enable"] -pub type AUTOINIT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type AutoinitW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 4 - Polynomial Select"] #[inline(always)] - pub fn polysel(&self) -> POLYSEL_R { - POLYSEL_R::new(((self.bits >> 4) & 1) != 0) + pub fn polysel(&self) -> PolyselR { + PolyselR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 8 - Byte Mode Enable"] #[inline(always)] - pub fn bytemode(&self) -> BYTEMODE_R { - BYTEMODE_R::new(((self.bits >> 8) & 1) != 0) + pub fn bytemode(&self) -> BytemodeR { + BytemodeR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Byte-level Bit Reverse Enable"] #[inline(always)] - pub fn bitreverse(&self) -> BITREVERSE_R { - BITREVERSE_R::new(((self.bits >> 9) & 1) != 0) + pub fn bitreverse(&self) -> BitreverseR { + BitreverseR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Byte Reverse Mode"] #[inline(always)] - pub fn bytereverse(&self) -> BYTEREVERSE_R { - BYTEREVERSE_R::new(((self.bits >> 10) & 1) != 0) + pub fn bytereverse(&self) -> BytereverseR { + BytereverseR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 13 - Auto Init Enable"] #[inline(always)] - pub fn autoinit(&self) -> AUTOINIT_R { - AUTOINIT_R::new(((self.bits >> 13) & 1) != 0) + pub fn autoinit(&self) -> AutoinitR { + AutoinitR::new(((self.bits >> 13) & 1) != 0) } } impl W { #[doc = "Bit 4 - Polynomial Select"] #[inline(always)] #[must_use] - pub fn polysel(&mut self) -> POLYSEL_W<4> { - POLYSEL_W::new(self) + pub fn polysel(&mut self) -> PolyselW { + PolyselW::new(self, 4) } #[doc = "Bit 8 - Byte Mode Enable"] #[inline(always)] #[must_use] - pub fn bytemode(&mut self) -> BYTEMODE_W<8> { - BYTEMODE_W::new(self) + pub fn bytemode(&mut self) -> BytemodeW { + BytemodeW::new(self, 8) } #[doc = "Bit 9 - Byte-level Bit Reverse Enable"] #[inline(always)] #[must_use] - pub fn bitreverse(&mut self) -> BITREVERSE_W<9> { - BITREVERSE_W::new(self) + pub fn bitreverse(&mut self) -> BitreverseW { + BitreverseW::new(self, 9) } #[doc = "Bit 10 - Byte Reverse Mode"] #[inline(always)] #[must_use] - pub fn bytereverse(&mut self) -> BYTEREVERSE_W<10> { - BYTEREVERSE_W::new(self) + pub fn bytereverse(&mut self) -> BytereverseW { + BytereverseW::new(self, 10) } #[doc = "Bit 13 - Auto Init Enable"] #[inline(always)] #[must_use] - pub fn autoinit(&mut self) -> AUTOINIT_W<13> { - AUTOINIT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn autoinit(&mut self) -> AutoinitW { + AutoinitW::new(self, 13) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/data.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/data.rs index b98d23c..4c0abd8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/data.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/data.rs @@ -1,37 +1,22 @@ #[doc = "Register `DATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DATA` reader - CRC Data Register"] -pub type DATA_R = crate::FieldReader; +pub type DataR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - CRC Data Register"] #[inline(always)] - pub fn data(&self) -> DATA_R { - DATA_R::new(self.bits) + pub fn data(&self) -> DataR { + DataR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data](index.html) module"] -pub struct DATA_SPEC; -impl crate::RegisterSpec for DATA_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`data::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DataSpec; +impl crate::RegisterSpec for DataSpec { type Ux = u32; } -#[doc = "`read()` method returns [data::R](R) reader structure"] -impl crate::Readable for DATA_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`data::R`](R) reader structure"] +impl crate::Readable for DataSpec {} #[doc = "`reset()` method sets DATA to value 0"] -impl crate::Resettable for DATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/databyterev.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/databyterev.rs index 5f17394..9b2e103 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/databyterev.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/databyterev.rs @@ -1,37 +1,22 @@ #[doc = "Register `DATABYTEREV` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DATABYTEREV` reader - Data Byte Reverse Value"] -pub type DATABYTEREV_R = crate::FieldReader; +pub type DatabyterevR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Data Byte Reverse Value"] #[inline(always)] - pub fn databyterev(&self) -> DATABYTEREV_R { - DATABYTEREV_R::new(self.bits) + pub fn databyterev(&self) -> DatabyterevR { + DatabyterevR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [databyterev](index.html) module"] -pub struct DATABYTEREV_SPEC; -impl crate::RegisterSpec for DATABYTEREV_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`databyterev::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DatabyterevSpec; +impl crate::RegisterSpec for DatabyterevSpec { type Ux = u32; } -#[doc = "`read()` method returns [databyterev::R](R) reader structure"] -impl crate::Readable for DATABYTEREV_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`databyterev::R`](R) reader structure"] +impl crate::Readable for DatabyterevSpec {} #[doc = "`reset()` method sets DATABYTEREV to value 0"] -impl crate::Resettable for DATABYTEREV_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DatabyterevSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/datarev.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/datarev.rs index 0e42972..b937686 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/datarev.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/datarev.rs @@ -1,37 +1,22 @@ #[doc = "Register `DATAREV` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DATAREV` reader - Data Reverse Value"] -pub type DATAREV_R = crate::FieldReader; +pub type DatarevR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Data Reverse Value"] #[inline(always)] - pub fn datarev(&self) -> DATAREV_R { - DATAREV_R::new(self.bits) + pub fn datarev(&self) -> DatarevR { + DatarevR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [datarev](index.html) module"] -pub struct DATAREV_SPEC; -impl crate::RegisterSpec for DATAREV_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`datarev::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DatarevSpec; +impl crate::RegisterSpec for DatarevSpec { type Ux = u32; } -#[doc = "`read()` method returns [datarev::R](R) reader structure"] -impl crate::Readable for DATAREV_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`datarev::R`](R) reader structure"] +impl crate::Readable for DatarevSpec {} #[doc = "`reset()` method sets DATAREV to value 0"] -impl crate::Resettable for DATAREV_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DatarevSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/en.rs index 3408cb7..0357181 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/en.rs @@ -1,126 +1,89 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EN` reader - CRC Enable"] -pub type EN_R = crate::BitReader; +pub type W = crate::W; #[doc = "CRC Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EN_A { +pub enum En { #[doc = "0: Disable CRC function. Reordering functions are still available. Only BITREVERSE and BYTEREVERSE bits are configurable in this mode."] - DISABLE = 0, + Disable = 0, #[doc = "1: Writes to INPUTDATA registers will result in CRC operations."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EN_A) -> Self { + fn from(variant: En) -> Self { variant as u8 != 0 } } -impl EN_R { +#[doc = "Field `EN` reader - CRC Enable"] +pub type EnR = crate::BitReader; +impl EnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EN_A { + pub const fn variant(&self) -> En { match self.bits { - false => EN_A::DISABLE, - true => EN_A::ENABLE, + false => En::Disable, + true => En::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable CRC function. Reordering functions are still available. Only BITREVERSE and BYTEREVERSE bits are configurable in this mode."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EN_A::DISABLE + *self == En::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Writes to INPUTDATA registers will result in CRC operations."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EN_A::ENABLE + *self == En::Enable } } #[doc = "Field `EN` writer - CRC Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, EN_A, O>; -impl<'a, const O: u8> EN_W<'a, O> { +pub type EnW<'a, REG> = crate::BitWriter<'a, REG, En>; +impl<'a, REG> EnW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable CRC function. Reordering functions are still available. Only BITREVERSE and BYTEREVERSE bits are configurable in this mode."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(En::Disable) } #[doc = "Writes to INPUTDATA registers will result in CRC operations."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(En::Enable) } } impl R { #[doc = "Bit 0 - CRC Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - CRC Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/init.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/init.rs index 0b2233c..4326ab0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/init.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/init.rs @@ -1,80 +1,40 @@ #[doc = "Register `INIT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `INIT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `INIT` reader - CRC Initialization Value"] -pub type INIT_R = crate::FieldReader; +pub type InitR = crate::FieldReader; #[doc = "Field `INIT` writer - CRC Initialization Value"] -pub type INIT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, INIT_SPEC, u32, u32, 32, O>; +pub type InitW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - CRC Initialization Value"] #[inline(always)] - pub fn init(&self) -> INIT_R { - INIT_R::new(self.bits) + pub fn init(&self) -> InitR { + InitR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - CRC Initialization Value"] #[inline(always)] #[must_use] - pub fn init(&mut self) -> INIT_W<0> { - INIT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn init(&mut self) -> InitW { + InitW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [init](index.html) module"] -pub struct INIT_SPEC; -impl crate::RegisterSpec for INIT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`init::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`init::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct InitSpec; +impl crate::RegisterSpec for InitSpec { type Ux = u32; } -#[doc = "`read()` method returns [init::R](R) reader structure"] -impl crate::Readable for INIT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [init::W](W) writer structure"] -impl crate::Writable for INIT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`init::R`](R) reader structure"] +impl crate::Readable for InitSpec {} +#[doc = "`write(|w| ..)` method takes [`init::W`](W) writer structure"] +impl crate::Writable for InitSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets INIT to value 0"] -impl crate::Resettable for INIT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for InitSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/inputdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/inputdata.rs index c59f23b..674aecd 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/inputdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/inputdata.rs @@ -1,53 +1,27 @@ #[doc = "Register `INPUTDATA` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `INPUTDATA` writer - Input Data for 32-bit"] -pub type INPUTDATA_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, INPUTDATA_SPEC, u32, u32, 32, O>; +pub type InputdataW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl W { #[doc = "Bits 0:31 - Input Data for 32-bit"] #[inline(always)] #[must_use] - pub fn inputdata(&mut self) -> INPUTDATA_W<0> { - INPUTDATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn inputdata(&mut self) -> InputdataW { + InputdataW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [inputdata](index.html) module"] -pub struct INPUTDATA_SPEC; -impl crate::RegisterSpec for INPUTDATA_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inputdata::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct InputdataSpec; +impl crate::RegisterSpec for InputdataSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [inputdata::W](W) writer structure"] -impl crate::Writable for INPUTDATA_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`inputdata::W`](W) writer structure"] +impl crate::Writable for InputdataSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets INPUTDATA to value 0"] -impl crate::Resettable for INPUTDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for InputdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/inputdatabyte.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/inputdatabyte.rs index ebc0424..3af0079 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/inputdatabyte.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/inputdatabyte.rs @@ -1,53 +1,27 @@ #[doc = "Register `INPUTDATABYTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `INPUTDATABYTE` writer - Input Data for 8-bit"] -pub type INPUTDATABYTE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, INPUTDATABYTE_SPEC, u8, u8, 8, O>; +pub type InputdatabyteW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - Input Data for 8-bit"] #[inline(always)] #[must_use] - pub fn inputdatabyte(&mut self) -> INPUTDATABYTE_W<0> { - INPUTDATABYTE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn inputdatabyte(&mut self) -> InputdatabyteW { + InputdatabyteW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [inputdatabyte](index.html) module"] -pub struct INPUTDATABYTE_SPEC; -impl crate::RegisterSpec for INPUTDATABYTE_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inputdatabyte::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct InputdatabyteSpec; +impl crate::RegisterSpec for InputdatabyteSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [inputdatabyte::W](W) writer structure"] -impl crate::Writable for INPUTDATABYTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`inputdatabyte::W`](W) writer structure"] +impl crate::Writable for InputdatabyteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets INPUTDATABYTE to value 0"] -impl crate::Resettable for INPUTDATABYTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for InputdatabyteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/inputdatahword.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/inputdatahword.rs index 2eec365..4a78bdc 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/inputdatahword.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/inputdatahword.rs @@ -1,53 +1,27 @@ #[doc = "Register `INPUTDATAHWORD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `INPUTDATAHWORD` writer - Input Data for 16-bit"] -pub type INPUTDATAHWORD_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, INPUTDATAHWORD_SPEC, u16, u16, 16, O>; +pub type InputdatahwordW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl W { #[doc = "Bits 0:15 - Input Data for 16-bit"] #[inline(always)] #[must_use] - pub fn inputdatahword(&mut self) -> INPUTDATAHWORD_W<0> { - INPUTDATAHWORD_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn inputdatahword(&mut self) -> InputdatahwordW { + InputdatahwordW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [inputdatahword](index.html) module"] -pub struct INPUTDATAHWORD_SPEC; -impl crate::RegisterSpec for INPUTDATAHWORD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inputdatahword::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct InputdatahwordSpec; +impl crate::RegisterSpec for InputdatahwordSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [inputdatahword::W](W) writer structure"] -impl crate::Writable for INPUTDATAHWORD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`inputdatahword::W`](W) writer structure"] +impl crate::Writable for InputdatahwordSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets INPUTDATAHWORD to value 0"] -impl crate::Resettable for INPUTDATAHWORD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for InputdatahwordSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/ipversion.rs index 6e5edd8..9e7f130 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/poly.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/poly.rs index 53af66b..1e33905 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/poly.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_ns/poly.rs @@ -1,80 +1,40 @@ #[doc = "Register `POLY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `POLY` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `POLY` reader - CRC Polynomial Value"] -pub type POLY_R = crate::FieldReader; +pub type PolyR = crate::FieldReader; #[doc = "Field `POLY` writer - CRC Polynomial Value"] -pub type POLY_W<'a, const O: u8> = crate::FieldWriter<'a, u32, POLY_SPEC, u16, u16, 16, O>; +pub type PolyW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - CRC Polynomial Value"] #[inline(always)] - pub fn poly(&self) -> POLY_R { - POLY_R::new((self.bits & 0xffff) as u16) + pub fn poly(&self) -> PolyR { + PolyR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - CRC Polynomial Value"] #[inline(always)] #[must_use] - pub fn poly(&mut self) -> POLY_W<0> { - POLY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn poly(&mut self) -> PolyW { + PolyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [poly](index.html) module"] -pub struct POLY_SPEC; -impl crate::RegisterSpec for POLY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`poly::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`poly::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PolySpec; +impl crate::RegisterSpec for PolySpec { type Ux = u32; } -#[doc = "`read()` method returns [poly::R](R) reader structure"] -impl crate::Readable for POLY_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [poly::W](W) writer structure"] -impl crate::Writable for POLY_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`poly::R`](R) reader structure"] +impl crate::Readable for PolySpec {} +#[doc = "`write(|w| ..)` method takes [`poly::W`](W) writer structure"] +impl crate::Writable for PolySpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets POLY to value 0"] -impl crate::Resettable for POLY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PolySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s.rs index d643839..d755f2f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s.rs @@ -1,76 +1,150 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + ctrl: Ctrl, + cmd: Cmd, + init: Init, + poly: Poly, + inputdata: Inputdata, + inputdatahword: Inputdatahword, + inputdatabyte: Inputdatabyte, + data: Data, + datarev: Datarev, + databyterev: Databyterev, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x0c - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x10 - No Description"] - pub init: INIT, + #[inline(always)] + pub const fn init(&self) -> &Init { + &self.init + } #[doc = "0x14 - No Description"] - pub poly: POLY, + #[inline(always)] + pub const fn poly(&self) -> &Poly { + &self.poly + } #[doc = "0x18 - No Description"] - pub inputdata: INPUTDATA, + #[inline(always)] + pub const fn inputdata(&self) -> &Inputdata { + &self.inputdata + } #[doc = "0x1c - No Description"] - pub inputdatahword: INPUTDATAHWORD, + #[inline(always)] + pub const fn inputdatahword(&self) -> &Inputdatahword { + &self.inputdatahword + } #[doc = "0x20 - No Description"] - pub inputdatabyte: INPUTDATABYTE, + #[inline(always)] + pub const fn inputdatabyte(&self) -> &Inputdatabyte { + &self.inputdatabyte + } #[doc = "0x24 - No Description"] - pub data: DATA, + #[inline(always)] + pub const fn data(&self) -> &Data { + &self.data + } #[doc = "0x28 - No Description"] - pub datarev: DATAREV, + #[inline(always)] + pub const fn datarev(&self) -> &Datarev { + &self.datarev + } #[doc = "0x2c - No Description"] - pub databyterev: DATABYTEREV, + #[inline(always)] + pub const fn databyterev(&self) -> &Databyterev { + &self.databyterev + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "INIT (rw) register accessor: an alias for `Reg`"] -pub type INIT = crate::Reg; +#[doc = "INIT (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`init::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`init::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@init`] +module"] +#[doc(alias = "INIT")] +pub type Init = crate::Reg; #[doc = "No Description"] pub mod init; -#[doc = "POLY (rw) register accessor: an alias for `Reg`"] -pub type POLY = crate::Reg; +#[doc = "POLY (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`poly::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`poly::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@poly`] +module"] +#[doc(alias = "POLY")] +pub type Poly = crate::Reg; #[doc = "No Description"] pub mod poly; -#[doc = "INPUTDATA (w) register accessor: an alias for `Reg`"] -pub type INPUTDATA = crate::Reg; +#[doc = "INPUTDATA (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inputdata::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inputdata`] +module"] +#[doc(alias = "INPUTDATA")] +pub type Inputdata = crate::Reg; #[doc = "No Description"] pub mod inputdata; -#[doc = "INPUTDATAHWORD (w) register accessor: an alias for `Reg`"] -pub type INPUTDATAHWORD = crate::Reg; +#[doc = "INPUTDATAHWORD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inputdatahword::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inputdatahword`] +module"] +#[doc(alias = "INPUTDATAHWORD")] +pub type Inputdatahword = crate::Reg; #[doc = "No Description"] pub mod inputdatahword; -#[doc = "INPUTDATABYTE (w) register accessor: an alias for `Reg`"] -pub type INPUTDATABYTE = crate::Reg; +#[doc = "INPUTDATABYTE (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inputdatabyte::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inputdatabyte`] +module"] +#[doc(alias = "INPUTDATABYTE")] +pub type Inputdatabyte = crate::Reg; #[doc = "No Description"] pub mod inputdatabyte; -#[doc = "DATA (r) register accessor: an alias for `Reg`"] -pub type DATA = crate::Reg; +#[doc = "DATA (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`data::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data`] +module"] +#[doc(alias = "DATA")] +pub type Data = crate::Reg; #[doc = "No Description"] pub mod data; -#[doc = "DATAREV (r) register accessor: an alias for `Reg`"] -pub type DATAREV = crate::Reg; +#[doc = "DATAREV (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`datarev::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@datarev`] +module"] +#[doc(alias = "DATAREV")] +pub type Datarev = crate::Reg; #[doc = "No Description"] pub mod datarev; -#[doc = "DATABYTEREV (r) register accessor: an alias for `Reg`"] -pub type DATABYTEREV = crate::Reg; +#[doc = "DATABYTEREV (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`databyterev::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@databyterev`] +module"] +#[doc(alias = "DATABYTEREV")] +pub type Databyterev = crate::Reg; #[doc = "No Description"] pub mod databyterev; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/cmd.rs index fea10b4..c6620e8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/cmd.rs @@ -1,52 +1,27 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `INIT` writer - Initialization Enable"] -pub type INIT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type InitW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Initialization Enable"] #[inline(always)] #[must_use] - pub fn init(&mut self) -> INIT_W<0> { - INIT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn init(&mut self) -> InitW { + InitW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/ctrl.rs index e743a21..1314874 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/ctrl.rs @@ -1,278 +1,247 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `POLYSEL` reader - Polynomial Select"] -pub type POLYSEL_R = crate::BitReader; +pub type W = crate::W; #[doc = "Polynomial Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum POLYSEL_A { +pub enum Polysel { #[doc = "0: CRC-32 (0x04C11DB7) polynomial selected"] - CRC32 = 0, + Crc32 = 0, #[doc = "1: 16-bit CRC programmable polynomial selected"] - CRC16 = 1, + Crc16 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: POLYSEL_A) -> Self { + fn from(variant: Polysel) -> Self { variant as u8 != 0 } } -impl POLYSEL_R { +#[doc = "Field `POLYSEL` reader - Polynomial Select"] +pub type PolyselR = crate::BitReader; +impl PolyselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> POLYSEL_A { + pub const fn variant(&self) -> Polysel { match self.bits { - false => POLYSEL_A::CRC32, - true => POLYSEL_A::CRC16, + false => Polysel::Crc32, + true => Polysel::Crc16, } } - #[doc = "Checks if the value of the field is `CRC32`"] + #[doc = "CRC-32 (0x04C11DB7) polynomial selected"] #[inline(always)] pub fn is_crc32(&self) -> bool { - *self == POLYSEL_A::CRC32 + *self == Polysel::Crc32 } - #[doc = "Checks if the value of the field is `CRC16`"] + #[doc = "16-bit CRC programmable polynomial selected"] #[inline(always)] pub fn is_crc16(&self) -> bool { - *self == POLYSEL_A::CRC16 + *self == Polysel::Crc16 } } #[doc = "Field `POLYSEL` writer - Polynomial Select"] -pub type POLYSEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, POLYSEL_A, O>; -impl<'a, const O: u8> POLYSEL_W<'a, O> { +pub type PolyselW<'a, REG> = crate::BitWriter<'a, REG, Polysel>; +impl<'a, REG> PolyselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "CRC-32 (0x04C11DB7) polynomial selected"] #[inline(always)] - pub fn crc32(self) -> &'a mut W { - self.variant(POLYSEL_A::CRC32) + pub fn crc32(self) -> &'a mut crate::W { + self.variant(Polysel::Crc32) } #[doc = "16-bit CRC programmable polynomial selected"] #[inline(always)] - pub fn crc16(self) -> &'a mut W { - self.variant(POLYSEL_A::CRC16) + pub fn crc16(self) -> &'a mut crate::W { + self.variant(Polysel::Crc16) } } #[doc = "Field `BYTEMODE` reader - Byte Mode Enable"] -pub type BYTEMODE_R = crate::BitReader; +pub type BytemodeR = crate::BitReader; #[doc = "Field `BYTEMODE` writer - Byte Mode Enable"] -pub type BYTEMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; -#[doc = "Field `BITREVERSE` reader - Byte-level Bit Reverse Enable"] -pub type BITREVERSE_R = crate::BitReader; +pub type BytemodeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Byte-level Bit Reverse Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BITREVERSE_A { +pub enum Bitreverse { #[doc = "0: No reverse"] - NORMAL = 0, + Normal = 0, #[doc = "1: Reverse bit order in each byte"] - REVERSED = 1, + Reversed = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BITREVERSE_A) -> Self { + fn from(variant: Bitreverse) -> Self { variant as u8 != 0 } } -impl BITREVERSE_R { +#[doc = "Field `BITREVERSE` reader - Byte-level Bit Reverse Enable"] +pub type BitreverseR = crate::BitReader; +impl BitreverseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> BITREVERSE_A { + pub const fn variant(&self) -> Bitreverse { match self.bits { - false => BITREVERSE_A::NORMAL, - true => BITREVERSE_A::REVERSED, + false => Bitreverse::Normal, + true => Bitreverse::Reversed, } } - #[doc = "Checks if the value of the field is `NORMAL`"] + #[doc = "No reverse"] #[inline(always)] pub fn is_normal(&self) -> bool { - *self == BITREVERSE_A::NORMAL + *self == Bitreverse::Normal } - #[doc = "Checks if the value of the field is `REVERSED`"] + #[doc = "Reverse bit order in each byte"] #[inline(always)] pub fn is_reversed(&self) -> bool { - *self == BITREVERSE_A::REVERSED + *self == Bitreverse::Reversed } } #[doc = "Field `BITREVERSE` writer - Byte-level Bit Reverse Enable"] -pub type BITREVERSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, BITREVERSE_A, O>; -impl<'a, const O: u8> BITREVERSE_W<'a, O> { +pub type BitreverseW<'a, REG> = crate::BitWriter<'a, REG, Bitreverse>; +impl<'a, REG> BitreverseW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No reverse"] #[inline(always)] - pub fn normal(self) -> &'a mut W { - self.variant(BITREVERSE_A::NORMAL) + pub fn normal(self) -> &'a mut crate::W { + self.variant(Bitreverse::Normal) } #[doc = "Reverse bit order in each byte"] #[inline(always)] - pub fn reversed(self) -> &'a mut W { - self.variant(BITREVERSE_A::REVERSED) + pub fn reversed(self) -> &'a mut crate::W { + self.variant(Bitreverse::Reversed) } } -#[doc = "Field `BYTEREVERSE` reader - Byte Reverse Mode"] -pub type BYTEREVERSE_R = crate::BitReader; #[doc = "Byte Reverse Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BYTEREVERSE_A { +pub enum Bytereverse { #[doc = "0: No reverse: B3, B2, B1, B0"] - NORMAL = 0, + Normal = 0, #[doc = "1: Reverse byte order. For 32-bit: B0, B1, B2, B3; For 16-bit: 0, 0, B0, B1"] - REVERSED = 1, + Reversed = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BYTEREVERSE_A) -> Self { + fn from(variant: Bytereverse) -> Self { variant as u8 != 0 } } -impl BYTEREVERSE_R { +#[doc = "Field `BYTEREVERSE` reader - Byte Reverse Mode"] +pub type BytereverseR = crate::BitReader; +impl BytereverseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> BYTEREVERSE_A { + pub const fn variant(&self) -> Bytereverse { match self.bits { - false => BYTEREVERSE_A::NORMAL, - true => BYTEREVERSE_A::REVERSED, + false => Bytereverse::Normal, + true => Bytereverse::Reversed, } } - #[doc = "Checks if the value of the field is `NORMAL`"] + #[doc = "No reverse: B3, B2, B1, B0"] #[inline(always)] pub fn is_normal(&self) -> bool { - *self == BYTEREVERSE_A::NORMAL + *self == Bytereverse::Normal } - #[doc = "Checks if the value of the field is `REVERSED`"] + #[doc = "Reverse byte order. For 32-bit: B0, B1, B2, B3; For 16-bit: 0, 0, B0, B1"] #[inline(always)] pub fn is_reversed(&self) -> bool { - *self == BYTEREVERSE_A::REVERSED + *self == Bytereverse::Reversed } } #[doc = "Field `BYTEREVERSE` writer - Byte Reverse Mode"] -pub type BYTEREVERSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, BYTEREVERSE_A, O>; -impl<'a, const O: u8> BYTEREVERSE_W<'a, O> { +pub type BytereverseW<'a, REG> = crate::BitWriter<'a, REG, Bytereverse>; +impl<'a, REG> BytereverseW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No reverse: B3, B2, B1, B0"] #[inline(always)] - pub fn normal(self) -> &'a mut W { - self.variant(BYTEREVERSE_A::NORMAL) + pub fn normal(self) -> &'a mut crate::W { + self.variant(Bytereverse::Normal) } #[doc = "Reverse byte order. For 32-bit: B0, B1, B2, B3; For 16-bit: 0, 0, B0, B1"] #[inline(always)] - pub fn reversed(self) -> &'a mut W { - self.variant(BYTEREVERSE_A::REVERSED) + pub fn reversed(self) -> &'a mut crate::W { + self.variant(Bytereverse::Reversed) } } #[doc = "Field `AUTOINIT` reader - Auto Init Enable"] -pub type AUTOINIT_R = crate::BitReader; +pub type AutoinitR = crate::BitReader; #[doc = "Field `AUTOINIT` writer - Auto Init Enable"] -pub type AUTOINIT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type AutoinitW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 4 - Polynomial Select"] #[inline(always)] - pub fn polysel(&self) -> POLYSEL_R { - POLYSEL_R::new(((self.bits >> 4) & 1) != 0) + pub fn polysel(&self) -> PolyselR { + PolyselR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 8 - Byte Mode Enable"] #[inline(always)] - pub fn bytemode(&self) -> BYTEMODE_R { - BYTEMODE_R::new(((self.bits >> 8) & 1) != 0) + pub fn bytemode(&self) -> BytemodeR { + BytemodeR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Byte-level Bit Reverse Enable"] #[inline(always)] - pub fn bitreverse(&self) -> BITREVERSE_R { - BITREVERSE_R::new(((self.bits >> 9) & 1) != 0) + pub fn bitreverse(&self) -> BitreverseR { + BitreverseR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Byte Reverse Mode"] #[inline(always)] - pub fn bytereverse(&self) -> BYTEREVERSE_R { - BYTEREVERSE_R::new(((self.bits >> 10) & 1) != 0) + pub fn bytereverse(&self) -> BytereverseR { + BytereverseR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 13 - Auto Init Enable"] #[inline(always)] - pub fn autoinit(&self) -> AUTOINIT_R { - AUTOINIT_R::new(((self.bits >> 13) & 1) != 0) + pub fn autoinit(&self) -> AutoinitR { + AutoinitR::new(((self.bits >> 13) & 1) != 0) } } impl W { #[doc = "Bit 4 - Polynomial Select"] #[inline(always)] #[must_use] - pub fn polysel(&mut self) -> POLYSEL_W<4> { - POLYSEL_W::new(self) + pub fn polysel(&mut self) -> PolyselW { + PolyselW::new(self, 4) } #[doc = "Bit 8 - Byte Mode Enable"] #[inline(always)] #[must_use] - pub fn bytemode(&mut self) -> BYTEMODE_W<8> { - BYTEMODE_W::new(self) + pub fn bytemode(&mut self) -> BytemodeW { + BytemodeW::new(self, 8) } #[doc = "Bit 9 - Byte-level Bit Reverse Enable"] #[inline(always)] #[must_use] - pub fn bitreverse(&mut self) -> BITREVERSE_W<9> { - BITREVERSE_W::new(self) + pub fn bitreverse(&mut self) -> BitreverseW { + BitreverseW::new(self, 9) } #[doc = "Bit 10 - Byte Reverse Mode"] #[inline(always)] #[must_use] - pub fn bytereverse(&mut self) -> BYTEREVERSE_W<10> { - BYTEREVERSE_W::new(self) + pub fn bytereverse(&mut self) -> BytereverseW { + BytereverseW::new(self, 10) } #[doc = "Bit 13 - Auto Init Enable"] #[inline(always)] #[must_use] - pub fn autoinit(&mut self) -> AUTOINIT_W<13> { - AUTOINIT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn autoinit(&mut self) -> AutoinitW { + AutoinitW::new(self, 13) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/data.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/data.rs index b98d23c..4c0abd8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/data.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/data.rs @@ -1,37 +1,22 @@ #[doc = "Register `DATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DATA` reader - CRC Data Register"] -pub type DATA_R = crate::FieldReader; +pub type DataR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - CRC Data Register"] #[inline(always)] - pub fn data(&self) -> DATA_R { - DATA_R::new(self.bits) + pub fn data(&self) -> DataR { + DataR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data](index.html) module"] -pub struct DATA_SPEC; -impl crate::RegisterSpec for DATA_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`data::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DataSpec; +impl crate::RegisterSpec for DataSpec { type Ux = u32; } -#[doc = "`read()` method returns [data::R](R) reader structure"] -impl crate::Readable for DATA_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`data::R`](R) reader structure"] +impl crate::Readable for DataSpec {} #[doc = "`reset()` method sets DATA to value 0"] -impl crate::Resettable for DATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/databyterev.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/databyterev.rs index 5f17394..9b2e103 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/databyterev.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/databyterev.rs @@ -1,37 +1,22 @@ #[doc = "Register `DATABYTEREV` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DATABYTEREV` reader - Data Byte Reverse Value"] -pub type DATABYTEREV_R = crate::FieldReader; +pub type DatabyterevR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Data Byte Reverse Value"] #[inline(always)] - pub fn databyterev(&self) -> DATABYTEREV_R { - DATABYTEREV_R::new(self.bits) + pub fn databyterev(&self) -> DatabyterevR { + DatabyterevR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [databyterev](index.html) module"] -pub struct DATABYTEREV_SPEC; -impl crate::RegisterSpec for DATABYTEREV_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`databyterev::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DatabyterevSpec; +impl crate::RegisterSpec for DatabyterevSpec { type Ux = u32; } -#[doc = "`read()` method returns [databyterev::R](R) reader structure"] -impl crate::Readable for DATABYTEREV_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`databyterev::R`](R) reader structure"] +impl crate::Readable for DatabyterevSpec {} #[doc = "`reset()` method sets DATABYTEREV to value 0"] -impl crate::Resettable for DATABYTEREV_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DatabyterevSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/datarev.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/datarev.rs index 0e42972..b937686 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/datarev.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/datarev.rs @@ -1,37 +1,22 @@ #[doc = "Register `DATAREV` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DATAREV` reader - Data Reverse Value"] -pub type DATAREV_R = crate::FieldReader; +pub type DatarevR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Data Reverse Value"] #[inline(always)] - pub fn datarev(&self) -> DATAREV_R { - DATAREV_R::new(self.bits) + pub fn datarev(&self) -> DatarevR { + DatarevR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [datarev](index.html) module"] -pub struct DATAREV_SPEC; -impl crate::RegisterSpec for DATAREV_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`datarev::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DatarevSpec; +impl crate::RegisterSpec for DatarevSpec { type Ux = u32; } -#[doc = "`read()` method returns [datarev::R](R) reader structure"] -impl crate::Readable for DATAREV_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`datarev::R`](R) reader structure"] +impl crate::Readable for DatarevSpec {} #[doc = "`reset()` method sets DATAREV to value 0"] -impl crate::Resettable for DATAREV_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DatarevSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/en.rs index 3408cb7..0357181 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/en.rs @@ -1,126 +1,89 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EN` reader - CRC Enable"] -pub type EN_R = crate::BitReader; +pub type W = crate::W; #[doc = "CRC Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EN_A { +pub enum En { #[doc = "0: Disable CRC function. Reordering functions are still available. Only BITREVERSE and BYTEREVERSE bits are configurable in this mode."] - DISABLE = 0, + Disable = 0, #[doc = "1: Writes to INPUTDATA registers will result in CRC operations."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EN_A) -> Self { + fn from(variant: En) -> Self { variant as u8 != 0 } } -impl EN_R { +#[doc = "Field `EN` reader - CRC Enable"] +pub type EnR = crate::BitReader; +impl EnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EN_A { + pub const fn variant(&self) -> En { match self.bits { - false => EN_A::DISABLE, - true => EN_A::ENABLE, + false => En::Disable, + true => En::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable CRC function. Reordering functions are still available. Only BITREVERSE and BYTEREVERSE bits are configurable in this mode."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EN_A::DISABLE + *self == En::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Writes to INPUTDATA registers will result in CRC operations."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EN_A::ENABLE + *self == En::Enable } } #[doc = "Field `EN` writer - CRC Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, EN_A, O>; -impl<'a, const O: u8> EN_W<'a, O> { +pub type EnW<'a, REG> = crate::BitWriter<'a, REG, En>; +impl<'a, REG> EnW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable CRC function. Reordering functions are still available. Only BITREVERSE and BYTEREVERSE bits are configurable in this mode."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(En::Disable) } #[doc = "Writes to INPUTDATA registers will result in CRC operations."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(En::Enable) } } impl R { #[doc = "Bit 0 - CRC Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - CRC Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/init.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/init.rs index 0b2233c..4326ab0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/init.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/init.rs @@ -1,80 +1,40 @@ #[doc = "Register `INIT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `INIT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `INIT` reader - CRC Initialization Value"] -pub type INIT_R = crate::FieldReader; +pub type InitR = crate::FieldReader; #[doc = "Field `INIT` writer - CRC Initialization Value"] -pub type INIT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, INIT_SPEC, u32, u32, 32, O>; +pub type InitW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - CRC Initialization Value"] #[inline(always)] - pub fn init(&self) -> INIT_R { - INIT_R::new(self.bits) + pub fn init(&self) -> InitR { + InitR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - CRC Initialization Value"] #[inline(always)] #[must_use] - pub fn init(&mut self) -> INIT_W<0> { - INIT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn init(&mut self) -> InitW { + InitW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [init](index.html) module"] -pub struct INIT_SPEC; -impl crate::RegisterSpec for INIT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`init::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`init::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct InitSpec; +impl crate::RegisterSpec for InitSpec { type Ux = u32; } -#[doc = "`read()` method returns [init::R](R) reader structure"] -impl crate::Readable for INIT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [init::W](W) writer structure"] -impl crate::Writable for INIT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`init::R`](R) reader structure"] +impl crate::Readable for InitSpec {} +#[doc = "`write(|w| ..)` method takes [`init::W`](W) writer structure"] +impl crate::Writable for InitSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets INIT to value 0"] -impl crate::Resettable for INIT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for InitSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/inputdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/inputdata.rs index c59f23b..674aecd 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/inputdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/inputdata.rs @@ -1,53 +1,27 @@ #[doc = "Register `INPUTDATA` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `INPUTDATA` writer - Input Data for 32-bit"] -pub type INPUTDATA_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, INPUTDATA_SPEC, u32, u32, 32, O>; +pub type InputdataW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl W { #[doc = "Bits 0:31 - Input Data for 32-bit"] #[inline(always)] #[must_use] - pub fn inputdata(&mut self) -> INPUTDATA_W<0> { - INPUTDATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn inputdata(&mut self) -> InputdataW { + InputdataW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [inputdata](index.html) module"] -pub struct INPUTDATA_SPEC; -impl crate::RegisterSpec for INPUTDATA_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inputdata::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct InputdataSpec; +impl crate::RegisterSpec for InputdataSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [inputdata::W](W) writer structure"] -impl crate::Writable for INPUTDATA_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`inputdata::W`](W) writer structure"] +impl crate::Writable for InputdataSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets INPUTDATA to value 0"] -impl crate::Resettable for INPUTDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for InputdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/inputdatabyte.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/inputdatabyte.rs index ebc0424..3af0079 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/inputdatabyte.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/inputdatabyte.rs @@ -1,53 +1,27 @@ #[doc = "Register `INPUTDATABYTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `INPUTDATABYTE` writer - Input Data for 8-bit"] -pub type INPUTDATABYTE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, INPUTDATABYTE_SPEC, u8, u8, 8, O>; +pub type InputdatabyteW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - Input Data for 8-bit"] #[inline(always)] #[must_use] - pub fn inputdatabyte(&mut self) -> INPUTDATABYTE_W<0> { - INPUTDATABYTE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn inputdatabyte(&mut self) -> InputdatabyteW { + InputdatabyteW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [inputdatabyte](index.html) module"] -pub struct INPUTDATABYTE_SPEC; -impl crate::RegisterSpec for INPUTDATABYTE_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inputdatabyte::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct InputdatabyteSpec; +impl crate::RegisterSpec for InputdatabyteSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [inputdatabyte::W](W) writer structure"] -impl crate::Writable for INPUTDATABYTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`inputdatabyte::W`](W) writer structure"] +impl crate::Writable for InputdatabyteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets INPUTDATABYTE to value 0"] -impl crate::Resettable for INPUTDATABYTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for InputdatabyteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/inputdatahword.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/inputdatahword.rs index 2eec365..4a78bdc 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/inputdatahword.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/inputdatahword.rs @@ -1,53 +1,27 @@ #[doc = "Register `INPUTDATAHWORD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `INPUTDATAHWORD` writer - Input Data for 16-bit"] -pub type INPUTDATAHWORD_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, INPUTDATAHWORD_SPEC, u16, u16, 16, O>; +pub type InputdatahwordW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl W { #[doc = "Bits 0:15 - Input Data for 16-bit"] #[inline(always)] #[must_use] - pub fn inputdatahword(&mut self) -> INPUTDATAHWORD_W<0> { - INPUTDATAHWORD_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn inputdatahword(&mut self) -> InputdatahwordW { + InputdatahwordW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [inputdatahword](index.html) module"] -pub struct INPUTDATAHWORD_SPEC; -impl crate::RegisterSpec for INPUTDATAHWORD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inputdatahword::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct InputdatahwordSpec; +impl crate::RegisterSpec for InputdatahwordSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [inputdatahword::W](W) writer structure"] -impl crate::Writable for INPUTDATAHWORD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`inputdatahword::W`](W) writer structure"] +impl crate::Writable for InputdatahwordSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets INPUTDATAHWORD to value 0"] -impl crate::Resettable for INPUTDATAHWORD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for InputdatahwordSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/ipversion.rs index 6e5edd8..9e7f130 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/poly.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/poly.rs index 53af66b..1e33905 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/poly.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpcrc_s/poly.rs @@ -1,80 +1,40 @@ #[doc = "Register `POLY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `POLY` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `POLY` reader - CRC Polynomial Value"] -pub type POLY_R = crate::FieldReader; +pub type PolyR = crate::FieldReader; #[doc = "Field `POLY` writer - CRC Polynomial Value"] -pub type POLY_W<'a, const O: u8> = crate::FieldWriter<'a, u32, POLY_SPEC, u16, u16, 16, O>; +pub type PolyW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - CRC Polynomial Value"] #[inline(always)] - pub fn poly(&self) -> POLY_R { - POLY_R::new((self.bits & 0xffff) as u16) + pub fn poly(&self) -> PolyR { + PolyR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - CRC Polynomial Value"] #[inline(always)] #[must_use] - pub fn poly(&mut self) -> POLY_W<0> { - POLY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn poly(&mut self) -> PolyW { + PolyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [poly](index.html) module"] -pub struct POLY_SPEC; -impl crate::RegisterSpec for POLY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`poly::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`poly::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PolySpec; +impl crate::RegisterSpec for PolySpec { type Ux = u32; } -#[doc = "`read()` method returns [poly::R](R) reader structure"] -impl crate::Readable for POLY_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [poly::W](W) writer structure"] -impl crate::Writable for POLY_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`poly::R`](R) reader structure"] +impl crate::Readable for PolySpec {} +#[doc = "`write(|w| ..)` method takes [`poly::W`](W) writer structure"] +impl crate::Writable for PolySpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets POLY to value 0"] -impl crate::Resettable for POLY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PolySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns.rs index 75956c2..658494a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns.rs @@ -1,1068 +1,2096 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + ipversion: Ipversion, _reserved1: [u8; 0x2c], + porta_ctrl: PortaCtrl, + porta_model: PortaModel, + _reserved3: [u8; 0x04], + porta_modeh: PortaModeh, + porta_dout: PortaDout, + porta_din: PortaDin, + _reserved6: [u8; 0x18], + portb_ctrl: PortbCtrl, + portb_model: PortbModel, + _reserved8: [u8; 0x08], + portb_dout: PortbDout, + portb_din: PortbDin, + _reserved10: [u8; 0x18], + portc_ctrl: PortcCtrl, + portc_model: PortcModel, + _reserved12: [u8; 0x04], + portc_modeh: PortcModeh, + portc_dout: PortcDout, + portc_din: PortcDin, + _reserved15: [u8; 0x18], + portd_ctrl: PortdCtrl, + portd_model: PortdModel, + _reserved17: [u8; 0x08], + portd_dout: PortdDout, + portd_din: PortdDin, + _reserved19: [u8; 0x0228], + lock: Lock, + _reserved20: [u8; 0x0c], + gpiolockstatus: Gpiolockstatus, + _reserved21: [u8; 0x0c], + abusalloc: Abusalloc, + bbusalloc: Bbusalloc, + cdbusalloc: Cdbusalloc, + _reserved24: [u8; 0xd4], + extipsell: Extipsell, + extipselh: Extipselh, + extipinsell: Extipinsell, + extipinselh: Extipinselh, + extirise: Extirise, + extifall: Extifall, + _reserved30: [u8; 0x08], + if_: If, + ien: Ien, + _reserved32: [u8; 0x04], + em4wuen: Em4wuen, + em4wupol: Em4wupol, + _reserved34: [u8; 0x0c], + dbgroutepen: Dbgroutepen, + traceroutepen: Traceroutepen, + _reserved36: [u8; 0x18], + lcdseg: Lcdseg, + _reserved37: [u8; 0x0c], + lcdcom: Lcdcom, + _reserved38: [u8; 0x0c], + acmp0_routeen: Acmp0Routeen, + acmp0_acmpoutroute: Acmp0Acmpoutroute, + _reserved40: [u8; 0x04], + acmp1_routeen: Acmp1Routeen, + acmp1_acmpoutroute: Acmp1Acmpoutroute, + _reserved42: [u8; 0x04], + cmu_routeen: CmuRouteen, + cmu_clkin0route: CmuClkin0route, + cmu_clkout0route: CmuClkout0route, + cmu_clkout1route: CmuClkout1route, + cmu_clkout2route: CmuClkout2route, + _reserved47: [u8; 0x18], + eusart0_routeen: Eusart0Routeen, + eusart0_csroute: Eusart0Csroute, + eusart0_ctsroute: Eusart0Ctsroute, + eusart0_rtsroute: Eusart0Rtsroute, + eusart0_rxroute: Eusart0Rxroute, + eusart0_sclkroute: Eusart0Sclkroute, + eusart0_txroute: Eusart0Txroute, + _reserved54: [u8; 0x04], + eusart1_routeen: Eusart1Routeen, + eusart1_csroute: Eusart1Csroute, + eusart1_ctsroute: Eusart1Ctsroute, + eusart1_rtsroute: Eusart1Rtsroute, + eusart1_rxroute: Eusart1Rxroute, + eusart1_sclkroute: Eusart1Sclkroute, + eusart1_txroute: Eusart1Txroute, + _reserved61: [u8; 0x04], + eusart2_routeen: Eusart2Routeen, + eusart2_csroute: Eusart2Csroute, + eusart2_ctsroute: Eusart2Ctsroute, + eusart2_rtsroute: Eusart2Rtsroute, + eusart2_rxroute: Eusart2Rxroute, + eusart2_sclkroute: Eusart2Sclkroute, + eusart2_txroute: Eusart2Txroute, + _reserved68: [u8; 0x18], + i2c0_routeen: I2c0Routeen, + i2c0_sclroute: I2c0Sclroute, + i2c0_sdaroute: I2c0Sdaroute, + _reserved71: [u8; 0x04], + i2c1_routeen: I2c1Routeen, + i2c1_sclroute: I2c1Sclroute, + i2c1_sdaroute: I2c1Sdaroute, + _reserved74: [u8; 0x04], + keyscan_routeen: KeyscanRouteen, + keyscan_colout0route: KeyscanColout0route, + keyscan_colout1route: KeyscanColout1route, + keyscan_colout2route: KeyscanColout2route, + keyscan_colout3route: KeyscanColout3route, + keyscan_colout4route: KeyscanColout4route, + keyscan_colout5route: KeyscanColout5route, + keyscan_colout6route: KeyscanColout6route, + keyscan_colout7route: KeyscanColout7route, + keyscan_rowsense0route: KeyscanRowsense0route, + keyscan_rowsense1route: KeyscanRowsense1route, + keyscan_rowsense2route: KeyscanRowsense2route, + keyscan_rowsense3route: KeyscanRowsense3route, + keyscan_rowsense4route: KeyscanRowsense4route, + keyscan_rowsense5route: KeyscanRowsense5route, + _reserved89: [u8; 0x04], + lesense_routeen: LesenseRouteen, + lesense_ch0outroute: LesenseCh0outroute, + lesense_ch1outroute: LesenseCh1outroute, + lesense_ch2outroute: LesenseCh2outroute, + lesense_ch3outroute: LesenseCh3outroute, + lesense_ch4outroute: LesenseCh4outroute, + lesense_ch5outroute: LesenseCh5outroute, + lesense_ch6outroute: LesenseCh6outroute, + lesense_ch7outroute: LesenseCh7outroute, + lesense_ch8outroute: LesenseCh8outroute, + lesense_ch9outroute: LesenseCh9outroute, + lesense_ch10outroute: LesenseCh10outroute, + lesense_ch11outroute: LesenseCh11outroute, + lesense_ch12outroute: LesenseCh12outroute, + lesense_ch13outroute: LesenseCh13outroute, + lesense_ch14outroute: LesenseCh14outroute, + lesense_ch15outroute: LesenseCh15outroute, + _reserved106: [u8; 0x04], + letimer_routeen: LetimerRouteen, + letimer_out0route: LetimerOut0route, + letimer_out1route: LetimerOut1route, + _reserved109: [u8; 0x50], + pcnt0_s0inroute: Pcnt0S0inroute, + pcnt0_s1inroute: Pcnt0S1inroute, + _reserved111: [u8; 0x04], + prs0_routeen: Prs0Routeen, + prs0_asynch0route: Prs0Asynch0route, + prs0_asynch1route: Prs0Asynch1route, + prs0_asynch2route: Prs0Asynch2route, + prs0_asynch3route: Prs0Asynch3route, + prs0_asynch4route: Prs0Asynch4route, + prs0_asynch5route: Prs0Asynch5route, + prs0_asynch6route: Prs0Asynch6route, + prs0_asynch7route: Prs0Asynch7route, + prs0_asynch8route: Prs0Asynch8route, + prs0_asynch9route: Prs0Asynch9route, + prs0_asynch10route: Prs0Asynch10route, + prs0_asynch11route: Prs0Asynch11route, + prs0_synch0route: Prs0Synch0route, + prs0_synch1route: Prs0Synch1route, + prs0_synch2route: Prs0Synch2route, + prs0_synch3route: Prs0Synch3route, + _reserved128: [u8; 0x64], + syxo0_bufoutreqinasyncroute: Syxo0Bufoutreqinasyncroute, + _reserved129: [u8; 0x04], + timer0_routeen: Timer0Routeen, + timer0_cc0route: Timer0Cc0route, + timer0_cc1route: Timer0Cc1route, + timer0_cc2route: Timer0Cc2route, + timer0_cdti0route: Timer0Cdti0route, + timer0_cdti1route: Timer0Cdti1route, + timer0_cdti2route: Timer0Cdti2route, + _reserved136: [u8; 0x04], + timer1_routeen: Timer1Routeen, + timer1_cc0route: Timer1Cc0route, + timer1_cc1route: Timer1Cc1route, + timer1_cc2route: Timer1Cc2route, + timer1_cdti0route: Timer1Cdti0route, + timer1_cdti1route: Timer1Cdti1route, + timer1_cdti2route: Timer1Cdti2route, + _reserved143: [u8; 0x04], + timer2_routeen: Timer2Routeen, + timer2_cc0route: Timer2Cc0route, + timer2_cc1route: Timer2Cc1route, + timer2_cc2route: Timer2Cc2route, + timer2_cdti0route: Timer2Cdti0route, + timer2_cdti1route: Timer2Cdti1route, + timer2_cdti2route: Timer2Cdti2route, + _reserved150: [u8; 0x04], + timer3_routeen: Timer3Routeen, + timer3_cc0route: Timer3Cc0route, + timer3_cc1route: Timer3Cc1route, + timer3_cc2route: Timer3Cc2route, + timer3_cdti0route: Timer3Cdti0route, + timer3_cdti1route: Timer3Cdti1route, + timer3_cdti2route: Timer3Cdti2route, + _reserved157: [u8; 0x04], + timer4_routeen: Timer4Routeen, + timer4_cc0route: Timer4Cc0route, + timer4_cc1route: Timer4Cc1route, + timer4_cc2route: Timer4Cc2route, + timer4_cdti0route: Timer4Cdti0route, + timer4_cdti1route: Timer4Cdti1route, + timer4_cdti2route: Timer4Cdti2route, + _reserved164: [u8; 0x04], + usart0_routeen: Usart0Routeen, + usart0_csroute: Usart0Csroute, + usart0_ctsroute: Usart0Ctsroute, + usart0_rtsroute: Usart0Rtsroute, + usart0_rxroute: Usart0Rxroute, + usart0_clkroute: Usart0Clkroute, + usart0_txroute: Usart0Txroute, +} +impl RegisterBlock { + #[doc = "0x00 - No Description"] + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x30 - Port control"] - pub porta_ctrl: PORTA_CTRL, + #[inline(always)] + pub const fn porta_ctrl(&self) -> &PortaCtrl { + &self.porta_ctrl + } #[doc = "0x34 - mode low"] - pub porta_model: PORTA_MODEL, - _reserved3: [u8; 0x04], + #[inline(always)] + pub const fn porta_model(&self) -> &PortaModel { + &self.porta_model + } #[doc = "0x3c - mode high"] - pub porta_modeh: PORTA_MODEH, + #[inline(always)] + pub const fn porta_modeh(&self) -> &PortaModeh { + &self.porta_modeh + } #[doc = "0x40 - data out"] - pub porta_dout: PORTA_DOUT, + #[inline(always)] + pub const fn porta_dout(&self) -> &PortaDout { + &self.porta_dout + } #[doc = "0x44 - data in"] - pub porta_din: PORTA_DIN, - _reserved6: [u8; 0x18], + #[inline(always)] + pub const fn porta_din(&self) -> &PortaDin { + &self.porta_din + } #[doc = "0x60 - Port control"] - pub portb_ctrl: PORTB_CTRL, + #[inline(always)] + pub const fn portb_ctrl(&self) -> &PortbCtrl { + &self.portb_ctrl + } #[doc = "0x64 - mode low"] - pub portb_model: PORTB_MODEL, - _reserved8: [u8; 0x08], + #[inline(always)] + pub const fn portb_model(&self) -> &PortbModel { + &self.portb_model + } #[doc = "0x70 - data out"] - pub portb_dout: PORTB_DOUT, + #[inline(always)] + pub const fn portb_dout(&self) -> &PortbDout { + &self.portb_dout + } #[doc = "0x74 - data in"] - pub portb_din: PORTB_DIN, - _reserved10: [u8; 0x18], + #[inline(always)] + pub const fn portb_din(&self) -> &PortbDin { + &self.portb_din + } #[doc = "0x90 - Port control"] - pub portc_ctrl: PORTC_CTRL, + #[inline(always)] + pub const fn portc_ctrl(&self) -> &PortcCtrl { + &self.portc_ctrl + } #[doc = "0x94 - mode low"] - pub portc_model: PORTC_MODEL, - _reserved12: [u8; 0x04], + #[inline(always)] + pub const fn portc_model(&self) -> &PortcModel { + &self.portc_model + } #[doc = "0x9c - mode high"] - pub portc_modeh: PORTC_MODEH, + #[inline(always)] + pub const fn portc_modeh(&self) -> &PortcModeh { + &self.portc_modeh + } #[doc = "0xa0 - data out"] - pub portc_dout: PORTC_DOUT, + #[inline(always)] + pub const fn portc_dout(&self) -> &PortcDout { + &self.portc_dout + } #[doc = "0xa4 - data in"] - pub portc_din: PORTC_DIN, - _reserved15: [u8; 0x18], + #[inline(always)] + pub const fn portc_din(&self) -> &PortcDin { + &self.portc_din + } #[doc = "0xc0 - Port control"] - pub portd_ctrl: PORTD_CTRL, + #[inline(always)] + pub const fn portd_ctrl(&self) -> &PortdCtrl { + &self.portd_ctrl + } #[doc = "0xc4 - mode low"] - pub portd_model: PORTD_MODEL, - _reserved17: [u8; 0x08], + #[inline(always)] + pub const fn portd_model(&self) -> &PortdModel { + &self.portd_model + } #[doc = "0xd0 - data out"] - pub portd_dout: PORTD_DOUT, + #[inline(always)] + pub const fn portd_dout(&self) -> &PortdDout { + &self.portd_dout + } #[doc = "0xd4 - data in"] - pub portd_din: PORTD_DIN, - _reserved19: [u8; 0x0228], + #[inline(always)] + pub const fn portd_din(&self) -> &PortdDin { + &self.portd_din + } #[doc = "0x300 - No Description"] - pub lock: LOCK, - _reserved20: [u8; 0x0c], + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x310 - No Description"] - pub gpiolockstatus: GPIOLOCKSTATUS, - _reserved21: [u8; 0x0c], + #[inline(always)] + pub const fn gpiolockstatus(&self) -> &Gpiolockstatus { + &self.gpiolockstatus + } #[doc = "0x320 - A Bus allocation"] - pub abusalloc: ABUSALLOC, + #[inline(always)] + pub const fn abusalloc(&self) -> &Abusalloc { + &self.abusalloc + } #[doc = "0x324 - B Bus allocation"] - pub bbusalloc: BBUSALLOC, + #[inline(always)] + pub const fn bbusalloc(&self) -> &Bbusalloc { + &self.bbusalloc + } #[doc = "0x328 - CD Bus allocation"] - pub cdbusalloc: CDBUSALLOC, - _reserved24: [u8; 0xd4], + #[inline(always)] + pub const fn cdbusalloc(&self) -> &Cdbusalloc { + &self.cdbusalloc + } #[doc = "0x400 - External Interrupt Port Select Low"] - pub extipsell: EXTIPSELL, + #[inline(always)] + pub const fn extipsell(&self) -> &Extipsell { + &self.extipsell + } #[doc = "0x404 - External interrupt Port Select High"] - pub extipselh: EXTIPSELH, + #[inline(always)] + pub const fn extipselh(&self) -> &Extipselh { + &self.extipselh + } #[doc = "0x408 - External Interrupt Pin Select Low"] - pub extipinsell: EXTIPINSELL, + #[inline(always)] + pub const fn extipinsell(&self) -> &Extipinsell { + &self.extipinsell + } #[doc = "0x40c - External Interrupt Pin Select High"] - pub extipinselh: EXTIPINSELH, + #[inline(always)] + pub const fn extipinselh(&self) -> &Extipinselh { + &self.extipinselh + } #[doc = "0x410 - External Interrupt Rising Edge Trigger"] - pub extirise: EXTIRISE, + #[inline(always)] + pub const fn extirise(&self) -> &Extirise { + &self.extirise + } #[doc = "0x414 - External Interrupt Falling Edge Trigger"] - pub extifall: EXTIFALL, - _reserved30: [u8; 0x08], + #[inline(always)] + pub const fn extifall(&self) -> &Extifall { + &self.extifall + } #[doc = "0x420 - Interrupt Flag"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x424 - Interrupt Enable"] - pub ien: IEN, - _reserved32: [u8; 0x04], + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x42c - No Description"] - pub em4wuen: EM4WUEN, + #[inline(always)] + pub const fn em4wuen(&self) -> &Em4wuen { + &self.em4wuen + } #[doc = "0x430 - No Description"] - pub em4wupol: EM4WUPOL, - _reserved34: [u8; 0x0c], + #[inline(always)] + pub const fn em4wupol(&self) -> &Em4wupol { + &self.em4wupol + } #[doc = "0x440 - No Description"] - pub dbgroutepen: DBGROUTEPEN, + #[inline(always)] + pub const fn dbgroutepen(&self) -> &Dbgroutepen { + &self.dbgroutepen + } #[doc = "0x444 - No Description"] - pub traceroutepen: TRACEROUTEPEN, - _reserved36: [u8; 0x18], + #[inline(always)] + pub const fn traceroutepen(&self) -> &Traceroutepen { + &self.traceroutepen + } #[doc = "0x460 - LCD Segment Enable"] - pub lcdseg: LCDSEG, - _reserved37: [u8; 0x0c], + #[inline(always)] + pub const fn lcdseg(&self) -> &Lcdseg { + &self.lcdseg + } #[doc = "0x470 - LCD Common Enable"] - pub lcdcom: LCDCOM, - _reserved38: [u8; 0x0c], + #[inline(always)] + pub const fn lcdcom(&self) -> &Lcdcom { + &self.lcdcom + } #[doc = "0x480 - ACMP0 pin enable"] - pub acmp0_routeen: ACMP0_ROUTEEN, + #[inline(always)] + pub const fn acmp0_routeen(&self) -> &Acmp0Routeen { + &self.acmp0_routeen + } #[doc = "0x484 - ACMPOUT port/pin select"] - pub acmp0_acmpoutroute: ACMP0_ACMPOUTROUTE, - _reserved40: [u8; 0x04], + #[inline(always)] + pub const fn acmp0_acmpoutroute(&self) -> &Acmp0Acmpoutroute { + &self.acmp0_acmpoutroute + } #[doc = "0x48c - ACMP1 pin enable"] - pub acmp1_routeen: ACMP1_ROUTEEN, + #[inline(always)] + pub const fn acmp1_routeen(&self) -> &Acmp1Routeen { + &self.acmp1_routeen + } #[doc = "0x490 - ACMPOUT port/pin select"] - pub acmp1_acmpoutroute: ACMP1_ACMPOUTROUTE, - _reserved42: [u8; 0x04], + #[inline(always)] + pub const fn acmp1_acmpoutroute(&self) -> &Acmp1Acmpoutroute { + &self.acmp1_acmpoutroute + } #[doc = "0x498 - CMU pin enable"] - pub cmu_routeen: CMU_ROUTEEN, + #[inline(always)] + pub const fn cmu_routeen(&self) -> &CmuRouteen { + &self.cmu_routeen + } #[doc = "0x49c - CLKIN0 port/pin select"] - pub cmu_clkin0route: CMU_CLKIN0ROUTE, + #[inline(always)] + pub const fn cmu_clkin0route(&self) -> &CmuClkin0route { + &self.cmu_clkin0route + } #[doc = "0x4a0 - CLKOUT0 port/pin select"] - pub cmu_clkout0route: CMU_CLKOUT0ROUTE, + #[inline(always)] + pub const fn cmu_clkout0route(&self) -> &CmuClkout0route { + &self.cmu_clkout0route + } #[doc = "0x4a4 - CLKOUT1 port/pin select"] - pub cmu_clkout1route: CMU_CLKOUT1ROUTE, + #[inline(always)] + pub const fn cmu_clkout1route(&self) -> &CmuClkout1route { + &self.cmu_clkout1route + } #[doc = "0x4a8 - CLKOUT2 port/pin select"] - pub cmu_clkout2route: CMU_CLKOUT2ROUTE, - _reserved47: [u8; 0x18], + #[inline(always)] + pub const fn cmu_clkout2route(&self) -> &CmuClkout2route { + &self.cmu_clkout2route + } #[doc = "0x4c4 - EUSART0 pin enable"] - pub eusart0_routeen: EUSART0_ROUTEEN, + #[inline(always)] + pub const fn eusart0_routeen(&self) -> &Eusart0Routeen { + &self.eusart0_routeen + } #[doc = "0x4c8 - CS port/pin select"] - pub eusart0_csroute: EUSART0_CSROUTE, + #[inline(always)] + pub const fn eusart0_csroute(&self) -> &Eusart0Csroute { + &self.eusart0_csroute + } #[doc = "0x4cc - CTS port/pin select"] - pub eusart0_ctsroute: EUSART0_CTSROUTE, + #[inline(always)] + pub const fn eusart0_ctsroute(&self) -> &Eusart0Ctsroute { + &self.eusart0_ctsroute + } #[doc = "0x4d0 - RTS port/pin select"] - pub eusart0_rtsroute: EUSART0_RTSROUTE, + #[inline(always)] + pub const fn eusart0_rtsroute(&self) -> &Eusart0Rtsroute { + &self.eusart0_rtsroute + } #[doc = "0x4d4 - RX port/pin select"] - pub eusart0_rxroute: EUSART0_RXROUTE, + #[inline(always)] + pub const fn eusart0_rxroute(&self) -> &Eusart0Rxroute { + &self.eusart0_rxroute + } #[doc = "0x4d8 - SCLK port/pin select"] - pub eusart0_sclkroute: EUSART0_SCLKROUTE, + #[inline(always)] + pub const fn eusart0_sclkroute(&self) -> &Eusart0Sclkroute { + &self.eusart0_sclkroute + } #[doc = "0x4dc - TX port/pin select"] - pub eusart0_txroute: EUSART0_TXROUTE, - _reserved54: [u8; 0x04], + #[inline(always)] + pub const fn eusart0_txroute(&self) -> &Eusart0Txroute { + &self.eusart0_txroute + } #[doc = "0x4e4 - EUSART1 pin enable"] - pub eusart1_routeen: EUSART1_ROUTEEN, + #[inline(always)] + pub const fn eusart1_routeen(&self) -> &Eusart1Routeen { + &self.eusart1_routeen + } #[doc = "0x4e8 - CS port/pin select"] - pub eusart1_csroute: EUSART1_CSROUTE, + #[inline(always)] + pub const fn eusart1_csroute(&self) -> &Eusart1Csroute { + &self.eusart1_csroute + } #[doc = "0x4ec - CTS port/pin select"] - pub eusart1_ctsroute: EUSART1_CTSROUTE, + #[inline(always)] + pub const fn eusart1_ctsroute(&self) -> &Eusart1Ctsroute { + &self.eusart1_ctsroute + } #[doc = "0x4f0 - RTS port/pin select"] - pub eusart1_rtsroute: EUSART1_RTSROUTE, + #[inline(always)] + pub const fn eusart1_rtsroute(&self) -> &Eusart1Rtsroute { + &self.eusart1_rtsroute + } #[doc = "0x4f4 - RX port/pin select"] - pub eusart1_rxroute: EUSART1_RXROUTE, + #[inline(always)] + pub const fn eusart1_rxroute(&self) -> &Eusart1Rxroute { + &self.eusart1_rxroute + } #[doc = "0x4f8 - SCLK port/pin select"] - pub eusart1_sclkroute: EUSART1_SCLKROUTE, + #[inline(always)] + pub const fn eusart1_sclkroute(&self) -> &Eusart1Sclkroute { + &self.eusart1_sclkroute + } #[doc = "0x4fc - TX port/pin select"] - pub eusart1_txroute: EUSART1_TXROUTE, - _reserved61: [u8; 0x04], + #[inline(always)] + pub const fn eusart1_txroute(&self) -> &Eusart1Txroute { + &self.eusart1_txroute + } #[doc = "0x504 - EUSART2 pin enable"] - pub eusart2_routeen: EUSART2_ROUTEEN, + #[inline(always)] + pub const fn eusart2_routeen(&self) -> &Eusart2Routeen { + &self.eusart2_routeen + } #[doc = "0x508 - CS port/pin select"] - pub eusart2_csroute: EUSART2_CSROUTE, + #[inline(always)] + pub const fn eusart2_csroute(&self) -> &Eusart2Csroute { + &self.eusart2_csroute + } #[doc = "0x50c - CTS port/pin select"] - pub eusart2_ctsroute: EUSART2_CTSROUTE, + #[inline(always)] + pub const fn eusart2_ctsroute(&self) -> &Eusart2Ctsroute { + &self.eusart2_ctsroute + } #[doc = "0x510 - RTS port/pin select"] - pub eusart2_rtsroute: EUSART2_RTSROUTE, + #[inline(always)] + pub const fn eusart2_rtsroute(&self) -> &Eusart2Rtsroute { + &self.eusart2_rtsroute + } #[doc = "0x514 - RX port/pin select"] - pub eusart2_rxroute: EUSART2_RXROUTE, + #[inline(always)] + pub const fn eusart2_rxroute(&self) -> &Eusart2Rxroute { + &self.eusart2_rxroute + } #[doc = "0x518 - SCLK port/pin select"] - pub eusart2_sclkroute: EUSART2_SCLKROUTE, + #[inline(always)] + pub const fn eusart2_sclkroute(&self) -> &Eusart2Sclkroute { + &self.eusart2_sclkroute + } #[doc = "0x51c - TX port/pin select"] - pub eusart2_txroute: EUSART2_TXROUTE, - _reserved68: [u8; 0x18], + #[inline(always)] + pub const fn eusart2_txroute(&self) -> &Eusart2Txroute { + &self.eusart2_txroute + } #[doc = "0x538 - I2C0 pin enable"] - pub i2c0_routeen: I2C0_ROUTEEN, + #[inline(always)] + pub const fn i2c0_routeen(&self) -> &I2c0Routeen { + &self.i2c0_routeen + } #[doc = "0x53c - SCL port/pin select"] - pub i2c0_sclroute: I2C0_SCLROUTE, + #[inline(always)] + pub const fn i2c0_sclroute(&self) -> &I2c0Sclroute { + &self.i2c0_sclroute + } #[doc = "0x540 - SDA port/pin select"] - pub i2c0_sdaroute: I2C0_SDAROUTE, - _reserved71: [u8; 0x04], + #[inline(always)] + pub const fn i2c0_sdaroute(&self) -> &I2c0Sdaroute { + &self.i2c0_sdaroute + } #[doc = "0x548 - I2C1 pin enable"] - pub i2c1_routeen: I2C1_ROUTEEN, + #[inline(always)] + pub const fn i2c1_routeen(&self) -> &I2c1Routeen { + &self.i2c1_routeen + } #[doc = "0x54c - SCL port/pin select"] - pub i2c1_sclroute: I2C1_SCLROUTE, + #[inline(always)] + pub const fn i2c1_sclroute(&self) -> &I2c1Sclroute { + &self.i2c1_sclroute + } #[doc = "0x550 - SDA port/pin select"] - pub i2c1_sdaroute: I2C1_SDAROUTE, - _reserved74: [u8; 0x04], + #[inline(always)] + pub const fn i2c1_sdaroute(&self) -> &I2c1Sdaroute { + &self.i2c1_sdaroute + } #[doc = "0x558 - KEYSCAN pin enable"] - pub keyscan_routeen: KEYSCAN_ROUTEEN, + #[inline(always)] + pub const fn keyscan_routeen(&self) -> &KeyscanRouteen { + &self.keyscan_routeen + } #[doc = "0x55c - COLOUT0 port/pin select"] - pub keyscan_colout0route: KEYSCAN_COLOUT0ROUTE, + #[inline(always)] + pub const fn keyscan_colout0route(&self) -> &KeyscanColout0route { + &self.keyscan_colout0route + } #[doc = "0x560 - COLOUT1 port/pin select"] - pub keyscan_colout1route: KEYSCAN_COLOUT1ROUTE, + #[inline(always)] + pub const fn keyscan_colout1route(&self) -> &KeyscanColout1route { + &self.keyscan_colout1route + } #[doc = "0x564 - COLOUT2 port/pin select"] - pub keyscan_colout2route: KEYSCAN_COLOUT2ROUTE, + #[inline(always)] + pub const fn keyscan_colout2route(&self) -> &KeyscanColout2route { + &self.keyscan_colout2route + } #[doc = "0x568 - COLOUT3 port/pin select"] - pub keyscan_colout3route: KEYSCAN_COLOUT3ROUTE, + #[inline(always)] + pub const fn keyscan_colout3route(&self) -> &KeyscanColout3route { + &self.keyscan_colout3route + } #[doc = "0x56c - COLOUT4 port/pin select"] - pub keyscan_colout4route: KEYSCAN_COLOUT4ROUTE, + #[inline(always)] + pub const fn keyscan_colout4route(&self) -> &KeyscanColout4route { + &self.keyscan_colout4route + } #[doc = "0x570 - COLOUT5 port/pin select"] - pub keyscan_colout5route: KEYSCAN_COLOUT5ROUTE, + #[inline(always)] + pub const fn keyscan_colout5route(&self) -> &KeyscanColout5route { + &self.keyscan_colout5route + } #[doc = "0x574 - COLOUT6 port/pin select"] - pub keyscan_colout6route: KEYSCAN_COLOUT6ROUTE, + #[inline(always)] + pub const fn keyscan_colout6route(&self) -> &KeyscanColout6route { + &self.keyscan_colout6route + } #[doc = "0x578 - COLOUT7 port/pin select"] - pub keyscan_colout7route: KEYSCAN_COLOUT7ROUTE, + #[inline(always)] + pub const fn keyscan_colout7route(&self) -> &KeyscanColout7route { + &self.keyscan_colout7route + } #[doc = "0x57c - ROWSENSE0 port/pin select"] - pub keyscan_rowsense0route: KEYSCAN_ROWSENSE0ROUTE, + #[inline(always)] + pub const fn keyscan_rowsense0route(&self) -> &KeyscanRowsense0route { + &self.keyscan_rowsense0route + } #[doc = "0x580 - ROWSENSE1 port/pin select"] - pub keyscan_rowsense1route: KEYSCAN_ROWSENSE1ROUTE, + #[inline(always)] + pub const fn keyscan_rowsense1route(&self) -> &KeyscanRowsense1route { + &self.keyscan_rowsense1route + } #[doc = "0x584 - ROWSENSE2 port/pin select"] - pub keyscan_rowsense2route: KEYSCAN_ROWSENSE2ROUTE, + #[inline(always)] + pub const fn keyscan_rowsense2route(&self) -> &KeyscanRowsense2route { + &self.keyscan_rowsense2route + } #[doc = "0x588 - ROWSENSE3 port/pin select"] - pub keyscan_rowsense3route: KEYSCAN_ROWSENSE3ROUTE, + #[inline(always)] + pub const fn keyscan_rowsense3route(&self) -> &KeyscanRowsense3route { + &self.keyscan_rowsense3route + } #[doc = "0x58c - ROWSENSE4 port/pin select"] - pub keyscan_rowsense4route: KEYSCAN_ROWSENSE4ROUTE, + #[inline(always)] + pub const fn keyscan_rowsense4route(&self) -> &KeyscanRowsense4route { + &self.keyscan_rowsense4route + } #[doc = "0x590 - ROWSENSE5 port/pin select"] - pub keyscan_rowsense5route: KEYSCAN_ROWSENSE5ROUTE, - _reserved89: [u8; 0x04], + #[inline(always)] + pub const fn keyscan_rowsense5route(&self) -> &KeyscanRowsense5route { + &self.keyscan_rowsense5route + } #[doc = "0x598 - LESENSE pin enable"] - pub lesense_routeen: LESENSE_ROUTEEN, + #[inline(always)] + pub const fn lesense_routeen(&self) -> &LesenseRouteen { + &self.lesense_routeen + } #[doc = "0x59c - CH0OUT port/pin select"] - pub lesense_ch0outroute: LESENSE_CH0OUTROUTE, + #[inline(always)] + pub const fn lesense_ch0outroute(&self) -> &LesenseCh0outroute { + &self.lesense_ch0outroute + } #[doc = "0x5a0 - CH1OUT port/pin select"] - pub lesense_ch1outroute: LESENSE_CH1OUTROUTE, + #[inline(always)] + pub const fn lesense_ch1outroute(&self) -> &LesenseCh1outroute { + &self.lesense_ch1outroute + } #[doc = "0x5a4 - CH2OUT port/pin select"] - pub lesense_ch2outroute: LESENSE_CH2OUTROUTE, + #[inline(always)] + pub const fn lesense_ch2outroute(&self) -> &LesenseCh2outroute { + &self.lesense_ch2outroute + } #[doc = "0x5a8 - CH3OUT port/pin select"] - pub lesense_ch3outroute: LESENSE_CH3OUTROUTE, + #[inline(always)] + pub const fn lesense_ch3outroute(&self) -> &LesenseCh3outroute { + &self.lesense_ch3outroute + } #[doc = "0x5ac - CH4OUT port/pin select"] - pub lesense_ch4outroute: LESENSE_CH4OUTROUTE, + #[inline(always)] + pub const fn lesense_ch4outroute(&self) -> &LesenseCh4outroute { + &self.lesense_ch4outroute + } #[doc = "0x5b0 - CH5OUT port/pin select"] - pub lesense_ch5outroute: LESENSE_CH5OUTROUTE, + #[inline(always)] + pub const fn lesense_ch5outroute(&self) -> &LesenseCh5outroute { + &self.lesense_ch5outroute + } #[doc = "0x5b4 - CH6OUT port/pin select"] - pub lesense_ch6outroute: LESENSE_CH6OUTROUTE, + #[inline(always)] + pub const fn lesense_ch6outroute(&self) -> &LesenseCh6outroute { + &self.lesense_ch6outroute + } #[doc = "0x5b8 - CH7OUT port/pin select"] - pub lesense_ch7outroute: LESENSE_CH7OUTROUTE, + #[inline(always)] + pub const fn lesense_ch7outroute(&self) -> &LesenseCh7outroute { + &self.lesense_ch7outroute + } #[doc = "0x5bc - CH8OUT port/pin select"] - pub lesense_ch8outroute: LESENSE_CH8OUTROUTE, + #[inline(always)] + pub const fn lesense_ch8outroute(&self) -> &LesenseCh8outroute { + &self.lesense_ch8outroute + } #[doc = "0x5c0 - CH9OUT port/pin select"] - pub lesense_ch9outroute: LESENSE_CH9OUTROUTE, + #[inline(always)] + pub const fn lesense_ch9outroute(&self) -> &LesenseCh9outroute { + &self.lesense_ch9outroute + } #[doc = "0x5c4 - CH10OUT port/pin select"] - pub lesense_ch10outroute: LESENSE_CH10OUTROUTE, + #[inline(always)] + pub const fn lesense_ch10outroute(&self) -> &LesenseCh10outroute { + &self.lesense_ch10outroute + } #[doc = "0x5c8 - CH11OUT port/pin select"] - pub lesense_ch11outroute: LESENSE_CH11OUTROUTE, + #[inline(always)] + pub const fn lesense_ch11outroute(&self) -> &LesenseCh11outroute { + &self.lesense_ch11outroute + } #[doc = "0x5cc - CH12OUT port/pin select"] - pub lesense_ch12outroute: LESENSE_CH12OUTROUTE, + #[inline(always)] + pub const fn lesense_ch12outroute(&self) -> &LesenseCh12outroute { + &self.lesense_ch12outroute + } #[doc = "0x5d0 - CH13OUT port/pin select"] - pub lesense_ch13outroute: LESENSE_CH13OUTROUTE, + #[inline(always)] + pub const fn lesense_ch13outroute(&self) -> &LesenseCh13outroute { + &self.lesense_ch13outroute + } #[doc = "0x5d4 - CH14OUT port/pin select"] - pub lesense_ch14outroute: LESENSE_CH14OUTROUTE, + #[inline(always)] + pub const fn lesense_ch14outroute(&self) -> &LesenseCh14outroute { + &self.lesense_ch14outroute + } #[doc = "0x5d8 - CH15OUT port/pin select"] - pub lesense_ch15outroute: LESENSE_CH15OUTROUTE, - _reserved106: [u8; 0x04], + #[inline(always)] + pub const fn lesense_ch15outroute(&self) -> &LesenseCh15outroute { + &self.lesense_ch15outroute + } #[doc = "0x5e0 - LETIMER pin enable"] - pub letimer_routeen: LETIMER_ROUTEEN, + #[inline(always)] + pub const fn letimer_routeen(&self) -> &LetimerRouteen { + &self.letimer_routeen + } #[doc = "0x5e4 - OUT0 port/pin select"] - pub letimer_out0route: LETIMER_OUT0ROUTE, + #[inline(always)] + pub const fn letimer_out0route(&self) -> &LetimerOut0route { + &self.letimer_out0route + } #[doc = "0x5e8 - OUT1 port/pin select"] - pub letimer_out1route: LETIMER_OUT1ROUTE, - _reserved109: [u8; 0x50], + #[inline(always)] + pub const fn letimer_out1route(&self) -> &LetimerOut1route { + &self.letimer_out1route + } #[doc = "0x63c - S0IN port/pin select"] - pub pcnt0_s0inroute: PCNT0_S0INROUTE, + #[inline(always)] + pub const fn pcnt0_s0inroute(&self) -> &Pcnt0S0inroute { + &self.pcnt0_s0inroute + } #[doc = "0x640 - S1IN port/pin select"] - pub pcnt0_s1inroute: PCNT0_S1INROUTE, - _reserved111: [u8; 0x04], + #[inline(always)] + pub const fn pcnt0_s1inroute(&self) -> &Pcnt0S1inroute { + &self.pcnt0_s1inroute + } #[doc = "0x648 - PRS0 pin enable"] - pub prs0_routeen: PRS0_ROUTEEN, + #[inline(always)] + pub const fn prs0_routeen(&self) -> &Prs0Routeen { + &self.prs0_routeen + } #[doc = "0x64c - ASYNCH0 port/pin select"] - pub prs0_asynch0route: PRS0_ASYNCH0ROUTE, + #[inline(always)] + pub const fn prs0_asynch0route(&self) -> &Prs0Asynch0route { + &self.prs0_asynch0route + } #[doc = "0x650 - ASYNCH1 port/pin select"] - pub prs0_asynch1route: PRS0_ASYNCH1ROUTE, + #[inline(always)] + pub const fn prs0_asynch1route(&self) -> &Prs0Asynch1route { + &self.prs0_asynch1route + } #[doc = "0x654 - ASYNCH2 port/pin select"] - pub prs0_asynch2route: PRS0_ASYNCH2ROUTE, + #[inline(always)] + pub const fn prs0_asynch2route(&self) -> &Prs0Asynch2route { + &self.prs0_asynch2route + } #[doc = "0x658 - ASYNCH3 port/pin select"] - pub prs0_asynch3route: PRS0_ASYNCH3ROUTE, + #[inline(always)] + pub const fn prs0_asynch3route(&self) -> &Prs0Asynch3route { + &self.prs0_asynch3route + } #[doc = "0x65c - ASYNCH4 port/pin select"] - pub prs0_asynch4route: PRS0_ASYNCH4ROUTE, + #[inline(always)] + pub const fn prs0_asynch4route(&self) -> &Prs0Asynch4route { + &self.prs0_asynch4route + } #[doc = "0x660 - ASYNCH5 port/pin select"] - pub prs0_asynch5route: PRS0_ASYNCH5ROUTE, + #[inline(always)] + pub const fn prs0_asynch5route(&self) -> &Prs0Asynch5route { + &self.prs0_asynch5route + } #[doc = "0x664 - ASYNCH6 port/pin select"] - pub prs0_asynch6route: PRS0_ASYNCH6ROUTE, + #[inline(always)] + pub const fn prs0_asynch6route(&self) -> &Prs0Asynch6route { + &self.prs0_asynch6route + } #[doc = "0x668 - ASYNCH7 port/pin select"] - pub prs0_asynch7route: PRS0_ASYNCH7ROUTE, + #[inline(always)] + pub const fn prs0_asynch7route(&self) -> &Prs0Asynch7route { + &self.prs0_asynch7route + } #[doc = "0x66c - ASYNCH8 port/pin select"] - pub prs0_asynch8route: PRS0_ASYNCH8ROUTE, + #[inline(always)] + pub const fn prs0_asynch8route(&self) -> &Prs0Asynch8route { + &self.prs0_asynch8route + } #[doc = "0x670 - ASYNCH9 port/pin select"] - pub prs0_asynch9route: PRS0_ASYNCH9ROUTE, + #[inline(always)] + pub const fn prs0_asynch9route(&self) -> &Prs0Asynch9route { + &self.prs0_asynch9route + } #[doc = "0x674 - ASYNCH10 port/pin select"] - pub prs0_asynch10route: PRS0_ASYNCH10ROUTE, + #[inline(always)] + pub const fn prs0_asynch10route(&self) -> &Prs0Asynch10route { + &self.prs0_asynch10route + } #[doc = "0x678 - ASYNCH11 port/pin select"] - pub prs0_asynch11route: PRS0_ASYNCH11ROUTE, + #[inline(always)] + pub const fn prs0_asynch11route(&self) -> &Prs0Asynch11route { + &self.prs0_asynch11route + } #[doc = "0x67c - SYNCH0 port/pin select"] - pub prs0_synch0route: PRS0_SYNCH0ROUTE, + #[inline(always)] + pub const fn prs0_synch0route(&self) -> &Prs0Synch0route { + &self.prs0_synch0route + } #[doc = "0x680 - SYNCH1 port/pin select"] - pub prs0_synch1route: PRS0_SYNCH1ROUTE, + #[inline(always)] + pub const fn prs0_synch1route(&self) -> &Prs0Synch1route { + &self.prs0_synch1route + } #[doc = "0x684 - SYNCH2 port/pin select"] - pub prs0_synch2route: PRS0_SYNCH2ROUTE, + #[inline(always)] + pub const fn prs0_synch2route(&self) -> &Prs0Synch2route { + &self.prs0_synch2route + } #[doc = "0x688 - SYNCH3 port/pin select"] - pub prs0_synch3route: PRS0_SYNCH3ROUTE, - _reserved128: [u8; 0x64], + #[inline(always)] + pub const fn prs0_synch3route(&self) -> &Prs0Synch3route { + &self.prs0_synch3route + } #[doc = "0x6f0 - BUFOUTREQINASYNC port/pin select"] - pub syxo0_bufoutreqinasyncroute: SYXO0_BUFOUTREQINASYNCROUTE, - _reserved129: [u8; 0x04], + #[inline(always)] + pub const fn syxo0_bufoutreqinasyncroute(&self) -> &Syxo0Bufoutreqinasyncroute { + &self.syxo0_bufoutreqinasyncroute + } #[doc = "0x6f8 - TIMER0 pin enable"] - pub timer0_routeen: TIMER0_ROUTEEN, + #[inline(always)] + pub const fn timer0_routeen(&self) -> &Timer0Routeen { + &self.timer0_routeen + } #[doc = "0x6fc - CC0 port/pin select"] - pub timer0_cc0route: TIMER0_CC0ROUTE, + #[inline(always)] + pub const fn timer0_cc0route(&self) -> &Timer0Cc0route { + &self.timer0_cc0route + } #[doc = "0x700 - CC1 port/pin select"] - pub timer0_cc1route: TIMER0_CC1ROUTE, + #[inline(always)] + pub const fn timer0_cc1route(&self) -> &Timer0Cc1route { + &self.timer0_cc1route + } #[doc = "0x704 - CC2 port/pin select"] - pub timer0_cc2route: TIMER0_CC2ROUTE, + #[inline(always)] + pub const fn timer0_cc2route(&self) -> &Timer0Cc2route { + &self.timer0_cc2route + } #[doc = "0x708 - CDTI0 port/pin select"] - pub timer0_cdti0route: TIMER0_CDTI0ROUTE, + #[inline(always)] + pub const fn timer0_cdti0route(&self) -> &Timer0Cdti0route { + &self.timer0_cdti0route + } #[doc = "0x70c - CDTI1 port/pin select"] - pub timer0_cdti1route: TIMER0_CDTI1ROUTE, + #[inline(always)] + pub const fn timer0_cdti1route(&self) -> &Timer0Cdti1route { + &self.timer0_cdti1route + } #[doc = "0x710 - CDTI2 port/pin select"] - pub timer0_cdti2route: TIMER0_CDTI2ROUTE, - _reserved136: [u8; 0x04], + #[inline(always)] + pub const fn timer0_cdti2route(&self) -> &Timer0Cdti2route { + &self.timer0_cdti2route + } #[doc = "0x718 - TIMER1 pin enable"] - pub timer1_routeen: TIMER1_ROUTEEN, + #[inline(always)] + pub const fn timer1_routeen(&self) -> &Timer1Routeen { + &self.timer1_routeen + } #[doc = "0x71c - CC0 port/pin select"] - pub timer1_cc0route: TIMER1_CC0ROUTE, + #[inline(always)] + pub const fn timer1_cc0route(&self) -> &Timer1Cc0route { + &self.timer1_cc0route + } #[doc = "0x720 - CC1 port/pin select"] - pub timer1_cc1route: TIMER1_CC1ROUTE, + #[inline(always)] + pub const fn timer1_cc1route(&self) -> &Timer1Cc1route { + &self.timer1_cc1route + } #[doc = "0x724 - CC2 port/pin select"] - pub timer1_cc2route: TIMER1_CC2ROUTE, + #[inline(always)] + pub const fn timer1_cc2route(&self) -> &Timer1Cc2route { + &self.timer1_cc2route + } #[doc = "0x728 - CDTI0 port/pin select"] - pub timer1_cdti0route: TIMER1_CDTI0ROUTE, + #[inline(always)] + pub const fn timer1_cdti0route(&self) -> &Timer1Cdti0route { + &self.timer1_cdti0route + } #[doc = "0x72c - CDTI1 port/pin select"] - pub timer1_cdti1route: TIMER1_CDTI1ROUTE, + #[inline(always)] + pub const fn timer1_cdti1route(&self) -> &Timer1Cdti1route { + &self.timer1_cdti1route + } #[doc = "0x730 - CDTI2 port/pin select"] - pub timer1_cdti2route: TIMER1_CDTI2ROUTE, - _reserved143: [u8; 0x04], + #[inline(always)] + pub const fn timer1_cdti2route(&self) -> &Timer1Cdti2route { + &self.timer1_cdti2route + } #[doc = "0x738 - TIMER2 pin enable"] - pub timer2_routeen: TIMER2_ROUTEEN, + #[inline(always)] + pub const fn timer2_routeen(&self) -> &Timer2Routeen { + &self.timer2_routeen + } #[doc = "0x73c - CC0 port/pin select"] - pub timer2_cc0route: TIMER2_CC0ROUTE, + #[inline(always)] + pub const fn timer2_cc0route(&self) -> &Timer2Cc0route { + &self.timer2_cc0route + } #[doc = "0x740 - CC1 port/pin select"] - pub timer2_cc1route: TIMER2_CC1ROUTE, + #[inline(always)] + pub const fn timer2_cc1route(&self) -> &Timer2Cc1route { + &self.timer2_cc1route + } #[doc = "0x744 - CC2 port/pin select"] - pub timer2_cc2route: TIMER2_CC2ROUTE, + #[inline(always)] + pub const fn timer2_cc2route(&self) -> &Timer2Cc2route { + &self.timer2_cc2route + } #[doc = "0x748 - CDTI0 port/pin select"] - pub timer2_cdti0route: TIMER2_CDTI0ROUTE, + #[inline(always)] + pub const fn timer2_cdti0route(&self) -> &Timer2Cdti0route { + &self.timer2_cdti0route + } #[doc = "0x74c - CDTI1 port/pin select"] - pub timer2_cdti1route: TIMER2_CDTI1ROUTE, + #[inline(always)] + pub const fn timer2_cdti1route(&self) -> &Timer2Cdti1route { + &self.timer2_cdti1route + } #[doc = "0x750 - CDTI2 port/pin select"] - pub timer2_cdti2route: TIMER2_CDTI2ROUTE, - _reserved150: [u8; 0x04], + #[inline(always)] + pub const fn timer2_cdti2route(&self) -> &Timer2Cdti2route { + &self.timer2_cdti2route + } #[doc = "0x758 - TIMER3 pin enable"] - pub timer3_routeen: TIMER3_ROUTEEN, + #[inline(always)] + pub const fn timer3_routeen(&self) -> &Timer3Routeen { + &self.timer3_routeen + } #[doc = "0x75c - CC0 port/pin select"] - pub timer3_cc0route: TIMER3_CC0ROUTE, + #[inline(always)] + pub const fn timer3_cc0route(&self) -> &Timer3Cc0route { + &self.timer3_cc0route + } #[doc = "0x760 - CC1 port/pin select"] - pub timer3_cc1route: TIMER3_CC1ROUTE, + #[inline(always)] + pub const fn timer3_cc1route(&self) -> &Timer3Cc1route { + &self.timer3_cc1route + } #[doc = "0x764 - CC2 port/pin select"] - pub timer3_cc2route: TIMER3_CC2ROUTE, + #[inline(always)] + pub const fn timer3_cc2route(&self) -> &Timer3Cc2route { + &self.timer3_cc2route + } #[doc = "0x768 - CDTI0 port/pin select"] - pub timer3_cdti0route: TIMER3_CDTI0ROUTE, + #[inline(always)] + pub const fn timer3_cdti0route(&self) -> &Timer3Cdti0route { + &self.timer3_cdti0route + } #[doc = "0x76c - CDTI1 port/pin select"] - pub timer3_cdti1route: TIMER3_CDTI1ROUTE, + #[inline(always)] + pub const fn timer3_cdti1route(&self) -> &Timer3Cdti1route { + &self.timer3_cdti1route + } #[doc = "0x770 - CDTI2 port/pin select"] - pub timer3_cdti2route: TIMER3_CDTI2ROUTE, - _reserved157: [u8; 0x04], + #[inline(always)] + pub const fn timer3_cdti2route(&self) -> &Timer3Cdti2route { + &self.timer3_cdti2route + } #[doc = "0x778 - TIMER4 pin enable"] - pub timer4_routeen: TIMER4_ROUTEEN, + #[inline(always)] + pub const fn timer4_routeen(&self) -> &Timer4Routeen { + &self.timer4_routeen + } #[doc = "0x77c - CC0 port/pin select"] - pub timer4_cc0route: TIMER4_CC0ROUTE, + #[inline(always)] + pub const fn timer4_cc0route(&self) -> &Timer4Cc0route { + &self.timer4_cc0route + } #[doc = "0x780 - CC1 port/pin select"] - pub timer4_cc1route: TIMER4_CC1ROUTE, + #[inline(always)] + pub const fn timer4_cc1route(&self) -> &Timer4Cc1route { + &self.timer4_cc1route + } #[doc = "0x784 - CC2 port/pin select"] - pub timer4_cc2route: TIMER4_CC2ROUTE, + #[inline(always)] + pub const fn timer4_cc2route(&self) -> &Timer4Cc2route { + &self.timer4_cc2route + } #[doc = "0x788 - CDTI0 port/pin select"] - pub timer4_cdti0route: TIMER4_CDTI0ROUTE, + #[inline(always)] + pub const fn timer4_cdti0route(&self) -> &Timer4Cdti0route { + &self.timer4_cdti0route + } #[doc = "0x78c - CDTI1 port/pin select"] - pub timer4_cdti1route: TIMER4_CDTI1ROUTE, + #[inline(always)] + pub const fn timer4_cdti1route(&self) -> &Timer4Cdti1route { + &self.timer4_cdti1route + } #[doc = "0x790 - CDTI2 port/pin select"] - pub timer4_cdti2route: TIMER4_CDTI2ROUTE, - _reserved164: [u8; 0x04], + #[inline(always)] + pub const fn timer4_cdti2route(&self) -> &Timer4Cdti2route { + &self.timer4_cdti2route + } #[doc = "0x798 - USART0 pin enable"] - pub usart0_routeen: USART0_ROUTEEN, + #[inline(always)] + pub const fn usart0_routeen(&self) -> &Usart0Routeen { + &self.usart0_routeen + } #[doc = "0x79c - CS port/pin select"] - pub usart0_csroute: USART0_CSROUTE, + #[inline(always)] + pub const fn usart0_csroute(&self) -> &Usart0Csroute { + &self.usart0_csroute + } #[doc = "0x7a0 - CTS port/pin select"] - pub usart0_ctsroute: USART0_CTSROUTE, + #[inline(always)] + pub const fn usart0_ctsroute(&self) -> &Usart0Ctsroute { + &self.usart0_ctsroute + } #[doc = "0x7a4 - RTS port/pin select"] - pub usart0_rtsroute: USART0_RTSROUTE, + #[inline(always)] + pub const fn usart0_rtsroute(&self) -> &Usart0Rtsroute { + &self.usart0_rtsroute + } #[doc = "0x7a8 - RX port/pin select"] - pub usart0_rxroute: USART0_RXROUTE, + #[inline(always)] + pub const fn usart0_rxroute(&self) -> &Usart0Rxroute { + &self.usart0_rxroute + } #[doc = "0x7ac - SCLK port/pin select"] - pub usart0_clkroute: USART0_CLKROUTE, + #[inline(always)] + pub const fn usart0_clkroute(&self) -> &Usart0Clkroute { + &self.usart0_clkroute + } #[doc = "0x7b0 - TX port/pin select"] - pub usart0_txroute: USART0_TXROUTE, + #[inline(always)] + pub const fn usart0_txroute(&self) -> &Usart0Txroute { + &self.usart0_txroute + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "PORTA_CTRL (rw) register accessor: an alias for `Reg`"] -pub type PORTA_CTRL = crate::Reg; +#[doc = "PORTA_CTRL (rw) register accessor: Port control\n\nYou can [`read`](crate::Reg::read) this register and get [`porta_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`porta_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@porta_ctrl`] +module"] +#[doc(alias = "PORTA_CTRL")] +pub type PortaCtrl = crate::Reg; #[doc = "Port control"] pub mod porta_ctrl; -#[doc = "PORTA_MODEL (rw) register accessor: an alias for `Reg`"] -pub type PORTA_MODEL = crate::Reg; +#[doc = "PORTA_MODEL (rw) register accessor: mode low\n\nYou can [`read`](crate::Reg::read) this register and get [`porta_model::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`porta_model::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@porta_model`] +module"] +#[doc(alias = "PORTA_MODEL")] +pub type PortaModel = crate::Reg; #[doc = "mode low"] pub mod porta_model; -#[doc = "PORTA_MODEH (rw) register accessor: an alias for `Reg`"] -pub type PORTA_MODEH = crate::Reg; +#[doc = "PORTA_MODEH (rw) register accessor: mode high\n\nYou can [`read`](crate::Reg::read) this register and get [`porta_modeh::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`porta_modeh::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@porta_modeh`] +module"] +#[doc(alias = "PORTA_MODEH")] +pub type PortaModeh = crate::Reg; #[doc = "mode high"] pub mod porta_modeh; -#[doc = "PORTA_DOUT (rw) register accessor: an alias for `Reg`"] -pub type PORTA_DOUT = crate::Reg; +#[doc = "PORTA_DOUT (rw) register accessor: data out\n\nYou can [`read`](crate::Reg::read) this register and get [`porta_dout::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`porta_dout::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@porta_dout`] +module"] +#[doc(alias = "PORTA_DOUT")] +pub type PortaDout = crate::Reg; #[doc = "data out"] pub mod porta_dout; -#[doc = "PORTA_DIN (r) register accessor: an alias for `Reg`"] -pub type PORTA_DIN = crate::Reg; +#[doc = "PORTA_DIN (r) register accessor: data in\n\nYou can [`read`](crate::Reg::read) this register and get [`porta_din::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@porta_din`] +module"] +#[doc(alias = "PORTA_DIN")] +pub type PortaDin = crate::Reg; #[doc = "data in"] pub mod porta_din; -#[doc = "PORTB_CTRL (rw) register accessor: an alias for `Reg`"] -pub type PORTB_CTRL = crate::Reg; +#[doc = "PORTB_CTRL (rw) register accessor: Port control\n\nYou can [`read`](crate::Reg::read) this register and get [`portb_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portb_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@portb_ctrl`] +module"] +#[doc(alias = "PORTB_CTRL")] +pub type PortbCtrl = crate::Reg; #[doc = "Port control"] pub mod portb_ctrl; -#[doc = "PORTB_MODEL (rw) register accessor: an alias for `Reg`"] -pub type PORTB_MODEL = crate::Reg; +#[doc = "PORTB_MODEL (rw) register accessor: mode low\n\nYou can [`read`](crate::Reg::read) this register and get [`portb_model::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portb_model::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@portb_model`] +module"] +#[doc(alias = "PORTB_MODEL")] +pub type PortbModel = crate::Reg; #[doc = "mode low"] pub mod portb_model; -#[doc = "PORTB_DOUT (rw) register accessor: an alias for `Reg`"] -pub type PORTB_DOUT = crate::Reg; +#[doc = "PORTB_DOUT (rw) register accessor: data out\n\nYou can [`read`](crate::Reg::read) this register and get [`portb_dout::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portb_dout::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@portb_dout`] +module"] +#[doc(alias = "PORTB_DOUT")] +pub type PortbDout = crate::Reg; #[doc = "data out"] pub mod portb_dout; -#[doc = "PORTB_DIN (r) register accessor: an alias for `Reg`"] -pub type PORTB_DIN = crate::Reg; +#[doc = "PORTB_DIN (r) register accessor: data in\n\nYou can [`read`](crate::Reg::read) this register and get [`portb_din::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@portb_din`] +module"] +#[doc(alias = "PORTB_DIN")] +pub type PortbDin = crate::Reg; #[doc = "data in"] pub mod portb_din; -#[doc = "PORTC_CTRL (rw) register accessor: an alias for `Reg`"] -pub type PORTC_CTRL = crate::Reg; +#[doc = "PORTC_CTRL (rw) register accessor: Port control\n\nYou can [`read`](crate::Reg::read) this register and get [`portc_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portc_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@portc_ctrl`] +module"] +#[doc(alias = "PORTC_CTRL")] +pub type PortcCtrl = crate::Reg; #[doc = "Port control"] pub mod portc_ctrl; -#[doc = "PORTC_MODEL (rw) register accessor: an alias for `Reg`"] -pub type PORTC_MODEL = crate::Reg; +#[doc = "PORTC_MODEL (rw) register accessor: mode low\n\nYou can [`read`](crate::Reg::read) this register and get [`portc_model::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portc_model::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@portc_model`] +module"] +#[doc(alias = "PORTC_MODEL")] +pub type PortcModel = crate::Reg; #[doc = "mode low"] pub mod portc_model; -#[doc = "PORTC_MODEH (rw) register accessor: an alias for `Reg`"] -pub type PORTC_MODEH = crate::Reg; +#[doc = "PORTC_MODEH (rw) register accessor: mode high\n\nYou can [`read`](crate::Reg::read) this register and get [`portc_modeh::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portc_modeh::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@portc_modeh`] +module"] +#[doc(alias = "PORTC_MODEH")] +pub type PortcModeh = crate::Reg; #[doc = "mode high"] pub mod portc_modeh; -#[doc = "PORTC_DOUT (rw) register accessor: an alias for `Reg`"] -pub type PORTC_DOUT = crate::Reg; +#[doc = "PORTC_DOUT (rw) register accessor: data out\n\nYou can [`read`](crate::Reg::read) this register and get [`portc_dout::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portc_dout::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@portc_dout`] +module"] +#[doc(alias = "PORTC_DOUT")] +pub type PortcDout = crate::Reg; #[doc = "data out"] pub mod portc_dout; -#[doc = "PORTC_DIN (r) register accessor: an alias for `Reg`"] -pub type PORTC_DIN = crate::Reg; +#[doc = "PORTC_DIN (r) register accessor: data in\n\nYou can [`read`](crate::Reg::read) this register and get [`portc_din::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@portc_din`] +module"] +#[doc(alias = "PORTC_DIN")] +pub type PortcDin = crate::Reg; #[doc = "data in"] pub mod portc_din; -#[doc = "PORTD_CTRL (rw) register accessor: an alias for `Reg`"] -pub type PORTD_CTRL = crate::Reg; +#[doc = "PORTD_CTRL (rw) register accessor: Port control\n\nYou can [`read`](crate::Reg::read) this register and get [`portd_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portd_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@portd_ctrl`] +module"] +#[doc(alias = "PORTD_CTRL")] +pub type PortdCtrl = crate::Reg; #[doc = "Port control"] pub mod portd_ctrl; -#[doc = "PORTD_MODEL (rw) register accessor: an alias for `Reg`"] -pub type PORTD_MODEL = crate::Reg; +#[doc = "PORTD_MODEL (rw) register accessor: mode low\n\nYou can [`read`](crate::Reg::read) this register and get [`portd_model::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portd_model::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@portd_model`] +module"] +#[doc(alias = "PORTD_MODEL")] +pub type PortdModel = crate::Reg; #[doc = "mode low"] pub mod portd_model; -#[doc = "PORTD_DOUT (rw) register accessor: an alias for `Reg`"] -pub type PORTD_DOUT = crate::Reg; +#[doc = "PORTD_DOUT (rw) register accessor: data out\n\nYou can [`read`](crate::Reg::read) this register and get [`portd_dout::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portd_dout::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@portd_dout`] +module"] +#[doc(alias = "PORTD_DOUT")] +pub type PortdDout = crate::Reg; #[doc = "data out"] pub mod portd_dout; -#[doc = "PORTD_DIN (r) register accessor: an alias for `Reg`"] -pub type PORTD_DIN = crate::Reg; +#[doc = "PORTD_DIN (r) register accessor: data in\n\nYou can [`read`](crate::Reg::read) this register and get [`portd_din::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@portd_din`] +module"] +#[doc(alias = "PORTD_DIN")] +pub type PortdDin = crate::Reg; #[doc = "data in"] pub mod portd_din; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "GPIOLOCKSTATUS (r) register accessor: an alias for `Reg`"] -pub type GPIOLOCKSTATUS = crate::Reg; +#[doc = "GPIOLOCKSTATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`gpiolockstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpiolockstatus`] +module"] +#[doc(alias = "GPIOLOCKSTATUS")] +pub type Gpiolockstatus = crate::Reg; #[doc = "No Description"] pub mod gpiolockstatus; -#[doc = "ABUSALLOC (rw) register accessor: an alias for `Reg`"] -pub type ABUSALLOC = crate::Reg; +#[doc = "ABUSALLOC (rw) register accessor: A Bus allocation\n\nYou can [`read`](crate::Reg::read) this register and get [`abusalloc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`abusalloc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@abusalloc`] +module"] +#[doc(alias = "ABUSALLOC")] +pub type Abusalloc = crate::Reg; #[doc = "A Bus allocation"] pub mod abusalloc; -#[doc = "BBUSALLOC (rw) register accessor: an alias for `Reg`"] -pub type BBUSALLOC = crate::Reg; +#[doc = "BBUSALLOC (rw) register accessor: B Bus allocation\n\nYou can [`read`](crate::Reg::read) this register and get [`bbusalloc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bbusalloc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bbusalloc`] +module"] +#[doc(alias = "BBUSALLOC")] +pub type Bbusalloc = crate::Reg; #[doc = "B Bus allocation"] pub mod bbusalloc; -#[doc = "CDBUSALLOC (rw) register accessor: an alias for `Reg`"] -pub type CDBUSALLOC = crate::Reg; +#[doc = "CDBUSALLOC (rw) register accessor: CD Bus allocation\n\nYou can [`read`](crate::Reg::read) this register and get [`cdbusalloc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cdbusalloc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cdbusalloc`] +module"] +#[doc(alias = "CDBUSALLOC")] +pub type Cdbusalloc = crate::Reg; #[doc = "CD Bus allocation"] pub mod cdbusalloc; -#[doc = "EXTIPSELL (rw) register accessor: an alias for `Reg`"] -pub type EXTIPSELL = crate::Reg; +#[doc = "EXTIPSELL (rw) register accessor: External Interrupt Port Select Low\n\nYou can [`read`](crate::Reg::read) this register and get [`extipsell::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`extipsell::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@extipsell`] +module"] +#[doc(alias = "EXTIPSELL")] +pub type Extipsell = crate::Reg; #[doc = "External Interrupt Port Select Low"] pub mod extipsell; -#[doc = "EXTIPSELH (rw) register accessor: an alias for `Reg`"] -pub type EXTIPSELH = crate::Reg; +#[doc = "EXTIPSELH (rw) register accessor: External interrupt Port Select High\n\nYou can [`read`](crate::Reg::read) this register and get [`extipselh::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`extipselh::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@extipselh`] +module"] +#[doc(alias = "EXTIPSELH")] +pub type Extipselh = crate::Reg; #[doc = "External interrupt Port Select High"] pub mod extipselh; -#[doc = "EXTIPINSELL (rw) register accessor: an alias for `Reg`"] -pub type EXTIPINSELL = crate::Reg; +#[doc = "EXTIPINSELL (rw) register accessor: External Interrupt Pin Select Low\n\nYou can [`read`](crate::Reg::read) this register and get [`extipinsell::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`extipinsell::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@extipinsell`] +module"] +#[doc(alias = "EXTIPINSELL")] +pub type Extipinsell = crate::Reg; #[doc = "External Interrupt Pin Select Low"] pub mod extipinsell; -#[doc = "EXTIPINSELH (rw) register accessor: an alias for `Reg`"] -pub type EXTIPINSELH = crate::Reg; +#[doc = "EXTIPINSELH (rw) register accessor: External Interrupt Pin Select High\n\nYou can [`read`](crate::Reg::read) this register and get [`extipinselh::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`extipinselh::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@extipinselh`] +module"] +#[doc(alias = "EXTIPINSELH")] +pub type Extipinselh = crate::Reg; #[doc = "External Interrupt Pin Select High"] pub mod extipinselh; -#[doc = "EXTIRISE (rw) register accessor: an alias for `Reg`"] -pub type EXTIRISE = crate::Reg; +#[doc = "EXTIRISE (rw) register accessor: External Interrupt Rising Edge Trigger\n\nYou can [`read`](crate::Reg::read) this register and get [`extirise::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`extirise::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@extirise`] +module"] +#[doc(alias = "EXTIRISE")] +pub type Extirise = crate::Reg; #[doc = "External Interrupt Rising Edge Trigger"] pub mod extirise; -#[doc = "EXTIFALL (rw) register accessor: an alias for `Reg`"] -pub type EXTIFALL = crate::Reg; +#[doc = "EXTIFALL (rw) register accessor: External Interrupt Falling Edge Trigger\n\nYou can [`read`](crate::Reg::read) this register and get [`extifall::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`extifall::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@extifall`] +module"] +#[doc(alias = "EXTIFALL")] +pub type Extifall = crate::Reg; #[doc = "External Interrupt Falling Edge Trigger"] pub mod extifall; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: Interrupt Flag\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "Interrupt Flag"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "Interrupt Enable"] pub mod ien; -#[doc = "EM4WUEN (rw) register accessor: an alias for `Reg`"] -pub type EM4WUEN = crate::Reg; +#[doc = "EM4WUEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em4wuen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em4wuen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@em4wuen`] +module"] +#[doc(alias = "EM4WUEN")] +pub type Em4wuen = crate::Reg; #[doc = "No Description"] pub mod em4wuen; -#[doc = "EM4WUPOL (rw) register accessor: an alias for `Reg`"] -pub type EM4WUPOL = crate::Reg; +#[doc = "EM4WUPOL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em4wupol::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em4wupol::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@em4wupol`] +module"] +#[doc(alias = "EM4WUPOL")] +pub type Em4wupol = crate::Reg; #[doc = "No Description"] pub mod em4wupol; -#[doc = "DBGROUTEPEN (rw) register accessor: an alias for `Reg`"] -pub type DBGROUTEPEN = crate::Reg; +#[doc = "DBGROUTEPEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dbgroutepen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dbgroutepen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dbgroutepen`] +module"] +#[doc(alias = "DBGROUTEPEN")] +pub type Dbgroutepen = crate::Reg; #[doc = "No Description"] pub mod dbgroutepen; -#[doc = "TRACEROUTEPEN (rw) register accessor: an alias for `Reg`"] -pub type TRACEROUTEPEN = crate::Reg; +#[doc = "TRACEROUTEPEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`traceroutepen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`traceroutepen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@traceroutepen`] +module"] +#[doc(alias = "TRACEROUTEPEN")] +pub type Traceroutepen = crate::Reg; #[doc = "No Description"] pub mod traceroutepen; -#[doc = "LCDSEG (rw) register accessor: an alias for `Reg`"] -pub type LCDSEG = crate::Reg; +#[doc = "LCDSEG (rw) register accessor: LCD Segment Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`lcdseg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lcdseg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lcdseg`] +module"] +#[doc(alias = "LCDSEG")] +pub type Lcdseg = crate::Reg; #[doc = "LCD Segment Enable"] pub mod lcdseg; -#[doc = "LCDCOM (rw) register accessor: an alias for `Reg`"] -pub type LCDCOM = crate::Reg; +#[doc = "LCDCOM (rw) register accessor: LCD Common Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`lcdcom::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lcdcom::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lcdcom`] +module"] +#[doc(alias = "LCDCOM")] +pub type Lcdcom = crate::Reg; #[doc = "LCD Common Enable"] pub mod lcdcom; -#[doc = "ACMP0_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type ACMP0_ROUTEEN = crate::Reg; +#[doc = "ACMP0_ROUTEEN (rw) register accessor: ACMP0 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`acmp0_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`acmp0_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@acmp0_routeen`] +module"] +#[doc(alias = "ACMP0_ROUTEEN")] +pub type Acmp0Routeen = crate::Reg; #[doc = "ACMP0 pin enable"] pub mod acmp0_routeen; -#[doc = "ACMP0_ACMPOUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type ACMP0_ACMPOUTROUTE = crate::Reg; +#[doc = "ACMP0_ACMPOUTROUTE (rw) register accessor: ACMPOUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`acmp0_acmpoutroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`acmp0_acmpoutroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@acmp0_acmpoutroute`] +module"] +#[doc(alias = "ACMP0_ACMPOUTROUTE")] +pub type Acmp0Acmpoutroute = crate::Reg; #[doc = "ACMPOUT port/pin select"] pub mod acmp0_acmpoutroute; -#[doc = "ACMP1_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type ACMP1_ROUTEEN = crate::Reg; +#[doc = "ACMP1_ROUTEEN (rw) register accessor: ACMP1 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`acmp1_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`acmp1_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@acmp1_routeen`] +module"] +#[doc(alias = "ACMP1_ROUTEEN")] +pub type Acmp1Routeen = crate::Reg; #[doc = "ACMP1 pin enable"] pub mod acmp1_routeen; -#[doc = "ACMP1_ACMPOUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type ACMP1_ACMPOUTROUTE = crate::Reg; +#[doc = "ACMP1_ACMPOUTROUTE (rw) register accessor: ACMPOUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`acmp1_acmpoutroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`acmp1_acmpoutroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@acmp1_acmpoutroute`] +module"] +#[doc(alias = "ACMP1_ACMPOUTROUTE")] +pub type Acmp1Acmpoutroute = crate::Reg; #[doc = "ACMPOUT port/pin select"] pub mod acmp1_acmpoutroute; -#[doc = "CMU_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type CMU_ROUTEEN = crate::Reg; +#[doc = "CMU_ROUTEEN (rw) register accessor: CMU pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`cmu_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmu_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmu_routeen`] +module"] +#[doc(alias = "CMU_ROUTEEN")] +pub type CmuRouteen = crate::Reg; #[doc = "CMU pin enable"] pub mod cmu_routeen; -#[doc = "CMU_CLKIN0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type CMU_CLKIN0ROUTE = crate::Reg; +#[doc = "CMU_CLKIN0ROUTE (rw) register accessor: CLKIN0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`cmu_clkin0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmu_clkin0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmu_clkin0route`] +module"] +#[doc(alias = "CMU_CLKIN0ROUTE")] +pub type CmuClkin0route = crate::Reg; #[doc = "CLKIN0 port/pin select"] pub mod cmu_clkin0route; -#[doc = "CMU_CLKOUT0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type CMU_CLKOUT0ROUTE = crate::Reg; +#[doc = "CMU_CLKOUT0ROUTE (rw) register accessor: CLKOUT0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`cmu_clkout0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmu_clkout0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmu_clkout0route`] +module"] +#[doc(alias = "CMU_CLKOUT0ROUTE")] +pub type CmuClkout0route = crate::Reg; #[doc = "CLKOUT0 port/pin select"] pub mod cmu_clkout0route; -#[doc = "CMU_CLKOUT1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type CMU_CLKOUT1ROUTE = crate::Reg; +#[doc = "CMU_CLKOUT1ROUTE (rw) register accessor: CLKOUT1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`cmu_clkout1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmu_clkout1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmu_clkout1route`] +module"] +#[doc(alias = "CMU_CLKOUT1ROUTE")] +pub type CmuClkout1route = crate::Reg; #[doc = "CLKOUT1 port/pin select"] pub mod cmu_clkout1route; -#[doc = "CMU_CLKOUT2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type CMU_CLKOUT2ROUTE = crate::Reg; +#[doc = "CMU_CLKOUT2ROUTE (rw) register accessor: CLKOUT2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`cmu_clkout2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmu_clkout2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmu_clkout2route`] +module"] +#[doc(alias = "CMU_CLKOUT2ROUTE")] +pub type CmuClkout2route = crate::Reg; #[doc = "CLKOUT2 port/pin select"] pub mod cmu_clkout2route; -#[doc = "EUSART0_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type EUSART0_ROUTEEN = crate::Reg; +#[doc = "EUSART0_ROUTEEN (rw) register accessor: EUSART0 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart0_routeen`] +module"] +#[doc(alias = "EUSART0_ROUTEEN")] +pub type Eusart0Routeen = crate::Reg; #[doc = "EUSART0 pin enable"] pub mod eusart0_routeen; -#[doc = "EUSART0_CSROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART0_CSROUTE = crate::Reg; +#[doc = "EUSART0_CSROUTE (rw) register accessor: CS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_csroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_csroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart0_csroute`] +module"] +#[doc(alias = "EUSART0_CSROUTE")] +pub type Eusart0Csroute = crate::Reg; #[doc = "CS port/pin select"] pub mod eusart0_csroute; -#[doc = "EUSART0_CTSROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART0_CTSROUTE = crate::Reg; +#[doc = "EUSART0_CTSROUTE (rw) register accessor: CTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_ctsroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_ctsroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart0_ctsroute`] +module"] +#[doc(alias = "EUSART0_CTSROUTE")] +pub type Eusart0Ctsroute = crate::Reg; #[doc = "CTS port/pin select"] pub mod eusart0_ctsroute; -#[doc = "EUSART0_RTSROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART0_RTSROUTE = crate::Reg; +#[doc = "EUSART0_RTSROUTE (rw) register accessor: RTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_rtsroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_rtsroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart0_rtsroute`] +module"] +#[doc(alias = "EUSART0_RTSROUTE")] +pub type Eusart0Rtsroute = crate::Reg; #[doc = "RTS port/pin select"] pub mod eusart0_rtsroute; -#[doc = "EUSART0_RXROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART0_RXROUTE = crate::Reg; +#[doc = "EUSART0_RXROUTE (rw) register accessor: RX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_rxroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_rxroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart0_rxroute`] +module"] +#[doc(alias = "EUSART0_RXROUTE")] +pub type Eusart0Rxroute = crate::Reg; #[doc = "RX port/pin select"] pub mod eusart0_rxroute; -#[doc = "EUSART0_SCLKROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART0_SCLKROUTE = crate::Reg; +#[doc = "EUSART0_SCLKROUTE (rw) register accessor: SCLK port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_sclkroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_sclkroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart0_sclkroute`] +module"] +#[doc(alias = "EUSART0_SCLKROUTE")] +pub type Eusart0Sclkroute = crate::Reg; #[doc = "SCLK port/pin select"] pub mod eusart0_sclkroute; -#[doc = "EUSART0_TXROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART0_TXROUTE = crate::Reg; +#[doc = "EUSART0_TXROUTE (rw) register accessor: TX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_txroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_txroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart0_txroute`] +module"] +#[doc(alias = "EUSART0_TXROUTE")] +pub type Eusart0Txroute = crate::Reg; #[doc = "TX port/pin select"] pub mod eusart0_txroute; -#[doc = "EUSART1_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type EUSART1_ROUTEEN = crate::Reg; +#[doc = "EUSART1_ROUTEEN (rw) register accessor: EUSART1 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart1_routeen`] +module"] +#[doc(alias = "EUSART1_ROUTEEN")] +pub type Eusart1Routeen = crate::Reg; #[doc = "EUSART1 pin enable"] pub mod eusart1_routeen; -#[doc = "EUSART1_CSROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART1_CSROUTE = crate::Reg; +#[doc = "EUSART1_CSROUTE (rw) register accessor: CS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_csroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_csroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart1_csroute`] +module"] +#[doc(alias = "EUSART1_CSROUTE")] +pub type Eusart1Csroute = crate::Reg; #[doc = "CS port/pin select"] pub mod eusart1_csroute; -#[doc = "EUSART1_CTSROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART1_CTSROUTE = crate::Reg; +#[doc = "EUSART1_CTSROUTE (rw) register accessor: CTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_ctsroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_ctsroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart1_ctsroute`] +module"] +#[doc(alias = "EUSART1_CTSROUTE")] +pub type Eusart1Ctsroute = crate::Reg; #[doc = "CTS port/pin select"] pub mod eusart1_ctsroute; -#[doc = "EUSART1_RTSROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART1_RTSROUTE = crate::Reg; +#[doc = "EUSART1_RTSROUTE (rw) register accessor: RTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_rtsroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_rtsroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart1_rtsroute`] +module"] +#[doc(alias = "EUSART1_RTSROUTE")] +pub type Eusart1Rtsroute = crate::Reg; #[doc = "RTS port/pin select"] pub mod eusart1_rtsroute; -#[doc = "EUSART1_RXROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART1_RXROUTE = crate::Reg; +#[doc = "EUSART1_RXROUTE (rw) register accessor: RX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_rxroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_rxroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart1_rxroute`] +module"] +#[doc(alias = "EUSART1_RXROUTE")] +pub type Eusart1Rxroute = crate::Reg; #[doc = "RX port/pin select"] pub mod eusart1_rxroute; -#[doc = "EUSART1_SCLKROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART1_SCLKROUTE = crate::Reg; +#[doc = "EUSART1_SCLKROUTE (rw) register accessor: SCLK port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_sclkroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_sclkroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart1_sclkroute`] +module"] +#[doc(alias = "EUSART1_SCLKROUTE")] +pub type Eusart1Sclkroute = crate::Reg; #[doc = "SCLK port/pin select"] pub mod eusart1_sclkroute; -#[doc = "EUSART1_TXROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART1_TXROUTE = crate::Reg; +#[doc = "EUSART1_TXROUTE (rw) register accessor: TX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_txroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_txroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart1_txroute`] +module"] +#[doc(alias = "EUSART1_TXROUTE")] +pub type Eusart1Txroute = crate::Reg; #[doc = "TX port/pin select"] pub mod eusart1_txroute; -#[doc = "EUSART2_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type EUSART2_ROUTEEN = crate::Reg; +#[doc = "EUSART2_ROUTEEN (rw) register accessor: EUSART2 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart2_routeen`] +module"] +#[doc(alias = "EUSART2_ROUTEEN")] +pub type Eusart2Routeen = crate::Reg; #[doc = "EUSART2 pin enable"] pub mod eusart2_routeen; -#[doc = "EUSART2_CSROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART2_CSROUTE = crate::Reg; +#[doc = "EUSART2_CSROUTE (rw) register accessor: CS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_csroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_csroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart2_csroute`] +module"] +#[doc(alias = "EUSART2_CSROUTE")] +pub type Eusart2Csroute = crate::Reg; #[doc = "CS port/pin select"] pub mod eusart2_csroute; -#[doc = "EUSART2_CTSROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART2_CTSROUTE = crate::Reg; +#[doc = "EUSART2_CTSROUTE (rw) register accessor: CTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_ctsroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_ctsroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart2_ctsroute`] +module"] +#[doc(alias = "EUSART2_CTSROUTE")] +pub type Eusart2Ctsroute = crate::Reg; #[doc = "CTS port/pin select"] pub mod eusart2_ctsroute; -#[doc = "EUSART2_RTSROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART2_RTSROUTE = crate::Reg; +#[doc = "EUSART2_RTSROUTE (rw) register accessor: RTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_rtsroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_rtsroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart2_rtsroute`] +module"] +#[doc(alias = "EUSART2_RTSROUTE")] +pub type Eusart2Rtsroute = crate::Reg; #[doc = "RTS port/pin select"] pub mod eusart2_rtsroute; -#[doc = "EUSART2_RXROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART2_RXROUTE = crate::Reg; +#[doc = "EUSART2_RXROUTE (rw) register accessor: RX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_rxroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_rxroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart2_rxroute`] +module"] +#[doc(alias = "EUSART2_RXROUTE")] +pub type Eusart2Rxroute = crate::Reg; #[doc = "RX port/pin select"] pub mod eusart2_rxroute; -#[doc = "EUSART2_SCLKROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART2_SCLKROUTE = crate::Reg; +#[doc = "EUSART2_SCLKROUTE (rw) register accessor: SCLK port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_sclkroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_sclkroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart2_sclkroute`] +module"] +#[doc(alias = "EUSART2_SCLKROUTE")] +pub type Eusart2Sclkroute = crate::Reg; #[doc = "SCLK port/pin select"] pub mod eusart2_sclkroute; -#[doc = "EUSART2_TXROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART2_TXROUTE = crate::Reg; +#[doc = "EUSART2_TXROUTE (rw) register accessor: TX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_txroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_txroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart2_txroute`] +module"] +#[doc(alias = "EUSART2_TXROUTE")] +pub type Eusart2Txroute = crate::Reg; #[doc = "TX port/pin select"] pub mod eusart2_txroute; -#[doc = "I2C0_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type I2C0_ROUTEEN = crate::Reg; +#[doc = "I2C0_ROUTEEN (rw) register accessor: I2C0 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c0_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c0_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2c0_routeen`] +module"] +#[doc(alias = "I2C0_ROUTEEN")] +pub type I2c0Routeen = crate::Reg; #[doc = "I2C0 pin enable"] pub mod i2c0_routeen; -#[doc = "I2C0_SCLROUTE (rw) register accessor: an alias for `Reg`"] -pub type I2C0_SCLROUTE = crate::Reg; +#[doc = "I2C0_SCLROUTE (rw) register accessor: SCL port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c0_sclroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c0_sclroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2c0_sclroute`] +module"] +#[doc(alias = "I2C0_SCLROUTE")] +pub type I2c0Sclroute = crate::Reg; #[doc = "SCL port/pin select"] pub mod i2c0_sclroute; -#[doc = "I2C0_SDAROUTE (rw) register accessor: an alias for `Reg`"] -pub type I2C0_SDAROUTE = crate::Reg; +#[doc = "I2C0_SDAROUTE (rw) register accessor: SDA port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c0_sdaroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c0_sdaroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2c0_sdaroute`] +module"] +#[doc(alias = "I2C0_SDAROUTE")] +pub type I2c0Sdaroute = crate::Reg; #[doc = "SDA port/pin select"] pub mod i2c0_sdaroute; -#[doc = "I2C1_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type I2C1_ROUTEEN = crate::Reg; +#[doc = "I2C1_ROUTEEN (rw) register accessor: I2C1 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c1_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c1_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2c1_routeen`] +module"] +#[doc(alias = "I2C1_ROUTEEN")] +pub type I2c1Routeen = crate::Reg; #[doc = "I2C1 pin enable"] pub mod i2c1_routeen; -#[doc = "I2C1_SCLROUTE (rw) register accessor: an alias for `Reg`"] -pub type I2C1_SCLROUTE = crate::Reg; +#[doc = "I2C1_SCLROUTE (rw) register accessor: SCL port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c1_sclroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c1_sclroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2c1_sclroute`] +module"] +#[doc(alias = "I2C1_SCLROUTE")] +pub type I2c1Sclroute = crate::Reg; #[doc = "SCL port/pin select"] pub mod i2c1_sclroute; -#[doc = "I2C1_SDAROUTE (rw) register accessor: an alias for `Reg`"] -pub type I2C1_SDAROUTE = crate::Reg; +#[doc = "I2C1_SDAROUTE (rw) register accessor: SDA port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c1_sdaroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c1_sdaroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2c1_sdaroute`] +module"] +#[doc(alias = "I2C1_SDAROUTE")] +pub type I2c1Sdaroute = crate::Reg; #[doc = "SDA port/pin select"] pub mod i2c1_sdaroute; -#[doc = "KEYSCAN_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_ROUTEEN = crate::Reg; +#[doc = "KEYSCAN_ROUTEEN (rw) register accessor: KEYSCAN pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_routeen`] +module"] +#[doc(alias = "KEYSCAN_ROUTEEN")] +pub type KeyscanRouteen = crate::Reg; #[doc = "KEYSCAN pin enable"] pub mod keyscan_routeen; -#[doc = "KEYSCAN_COLOUT0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_COLOUT0ROUTE = crate::Reg; +#[doc = "KEYSCAN_COLOUT0ROUTE (rw) register accessor: COLOUT0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_colout0route`] +module"] +#[doc(alias = "KEYSCAN_COLOUT0ROUTE")] +pub type KeyscanColout0route = crate::Reg; #[doc = "COLOUT0 port/pin select"] pub mod keyscan_colout0route; -#[doc = "KEYSCAN_COLOUT1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_COLOUT1ROUTE = crate::Reg; +#[doc = "KEYSCAN_COLOUT1ROUTE (rw) register accessor: COLOUT1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_colout1route`] +module"] +#[doc(alias = "KEYSCAN_COLOUT1ROUTE")] +pub type KeyscanColout1route = crate::Reg; #[doc = "COLOUT1 port/pin select"] pub mod keyscan_colout1route; -#[doc = "KEYSCAN_COLOUT2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_COLOUT2ROUTE = crate::Reg; +#[doc = "KEYSCAN_COLOUT2ROUTE (rw) register accessor: COLOUT2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_colout2route`] +module"] +#[doc(alias = "KEYSCAN_COLOUT2ROUTE")] +pub type KeyscanColout2route = crate::Reg; #[doc = "COLOUT2 port/pin select"] pub mod keyscan_colout2route; -#[doc = "KEYSCAN_COLOUT3ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_COLOUT3ROUTE = crate::Reg; +#[doc = "KEYSCAN_COLOUT3ROUTE (rw) register accessor: COLOUT3 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout3route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout3route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_colout3route`] +module"] +#[doc(alias = "KEYSCAN_COLOUT3ROUTE")] +pub type KeyscanColout3route = crate::Reg; #[doc = "COLOUT3 port/pin select"] pub mod keyscan_colout3route; -#[doc = "KEYSCAN_COLOUT4ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_COLOUT4ROUTE = crate::Reg; +#[doc = "KEYSCAN_COLOUT4ROUTE (rw) register accessor: COLOUT4 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout4route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout4route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_colout4route`] +module"] +#[doc(alias = "KEYSCAN_COLOUT4ROUTE")] +pub type KeyscanColout4route = crate::Reg; #[doc = "COLOUT4 port/pin select"] pub mod keyscan_colout4route; -#[doc = "KEYSCAN_COLOUT5ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_COLOUT5ROUTE = crate::Reg; +#[doc = "KEYSCAN_COLOUT5ROUTE (rw) register accessor: COLOUT5 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout5route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout5route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_colout5route`] +module"] +#[doc(alias = "KEYSCAN_COLOUT5ROUTE")] +pub type KeyscanColout5route = crate::Reg; #[doc = "COLOUT5 port/pin select"] pub mod keyscan_colout5route; -#[doc = "KEYSCAN_COLOUT6ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_COLOUT6ROUTE = crate::Reg; +#[doc = "KEYSCAN_COLOUT6ROUTE (rw) register accessor: COLOUT6 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout6route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout6route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_colout6route`] +module"] +#[doc(alias = "KEYSCAN_COLOUT6ROUTE")] +pub type KeyscanColout6route = crate::Reg; #[doc = "COLOUT6 port/pin select"] pub mod keyscan_colout6route; -#[doc = "KEYSCAN_COLOUT7ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_COLOUT7ROUTE = crate::Reg; +#[doc = "KEYSCAN_COLOUT7ROUTE (rw) register accessor: COLOUT7 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout7route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout7route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_colout7route`] +module"] +#[doc(alias = "KEYSCAN_COLOUT7ROUTE")] +pub type KeyscanColout7route = crate::Reg; #[doc = "COLOUT7 port/pin select"] pub mod keyscan_colout7route; -#[doc = "KEYSCAN_ROWSENSE0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_ROWSENSE0ROUTE = crate::Reg; +#[doc = "KEYSCAN_ROWSENSE0ROUTE (rw) register accessor: ROWSENSE0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_rowsense0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_rowsense0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_rowsense0route`] +module"] +#[doc(alias = "KEYSCAN_ROWSENSE0ROUTE")] +pub type KeyscanRowsense0route = crate::Reg; #[doc = "ROWSENSE0 port/pin select"] pub mod keyscan_rowsense0route; -#[doc = "KEYSCAN_ROWSENSE1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_ROWSENSE1ROUTE = crate::Reg; +#[doc = "KEYSCAN_ROWSENSE1ROUTE (rw) register accessor: ROWSENSE1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_rowsense1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_rowsense1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_rowsense1route`] +module"] +#[doc(alias = "KEYSCAN_ROWSENSE1ROUTE")] +pub type KeyscanRowsense1route = crate::Reg; #[doc = "ROWSENSE1 port/pin select"] pub mod keyscan_rowsense1route; -#[doc = "KEYSCAN_ROWSENSE2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_ROWSENSE2ROUTE = crate::Reg; +#[doc = "KEYSCAN_ROWSENSE2ROUTE (rw) register accessor: ROWSENSE2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_rowsense2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_rowsense2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_rowsense2route`] +module"] +#[doc(alias = "KEYSCAN_ROWSENSE2ROUTE")] +pub type KeyscanRowsense2route = crate::Reg; #[doc = "ROWSENSE2 port/pin select"] pub mod keyscan_rowsense2route; -#[doc = "KEYSCAN_ROWSENSE3ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_ROWSENSE3ROUTE = crate::Reg; +#[doc = "KEYSCAN_ROWSENSE3ROUTE (rw) register accessor: ROWSENSE3 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_rowsense3route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_rowsense3route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_rowsense3route`] +module"] +#[doc(alias = "KEYSCAN_ROWSENSE3ROUTE")] +pub type KeyscanRowsense3route = crate::Reg; #[doc = "ROWSENSE3 port/pin select"] pub mod keyscan_rowsense3route; -#[doc = "KEYSCAN_ROWSENSE4ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_ROWSENSE4ROUTE = crate::Reg; +#[doc = "KEYSCAN_ROWSENSE4ROUTE (rw) register accessor: ROWSENSE4 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_rowsense4route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_rowsense4route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_rowsense4route`] +module"] +#[doc(alias = "KEYSCAN_ROWSENSE4ROUTE")] +pub type KeyscanRowsense4route = crate::Reg; #[doc = "ROWSENSE4 port/pin select"] pub mod keyscan_rowsense4route; -#[doc = "KEYSCAN_ROWSENSE5ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_ROWSENSE5ROUTE = crate::Reg; +#[doc = "KEYSCAN_ROWSENSE5ROUTE (rw) register accessor: ROWSENSE5 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_rowsense5route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_rowsense5route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_rowsense5route`] +module"] +#[doc(alias = "KEYSCAN_ROWSENSE5ROUTE")] +pub type KeyscanRowsense5route = crate::Reg; #[doc = "ROWSENSE5 port/pin select"] pub mod keyscan_rowsense5route; -#[doc = "LESENSE_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_ROUTEEN = crate::Reg; +#[doc = "LESENSE_ROUTEEN (rw) register accessor: LESENSE pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_routeen`] +module"] +#[doc(alias = "LESENSE_ROUTEEN")] +pub type LesenseRouteen = crate::Reg; #[doc = "LESENSE pin enable"] pub mod lesense_routeen; -#[doc = "LESENSE_CH0OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH0OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH0OUTROUTE (rw) register accessor: CH0OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch0outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch0outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch0outroute`] +module"] +#[doc(alias = "LESENSE_CH0OUTROUTE")] +pub type LesenseCh0outroute = crate::Reg; #[doc = "CH0OUT port/pin select"] pub mod lesense_ch0outroute; -#[doc = "LESENSE_CH1OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH1OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH1OUTROUTE (rw) register accessor: CH1OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch1outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch1outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch1outroute`] +module"] +#[doc(alias = "LESENSE_CH1OUTROUTE")] +pub type LesenseCh1outroute = crate::Reg; #[doc = "CH1OUT port/pin select"] pub mod lesense_ch1outroute; -#[doc = "LESENSE_CH2OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH2OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH2OUTROUTE (rw) register accessor: CH2OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch2outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch2outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch2outroute`] +module"] +#[doc(alias = "LESENSE_CH2OUTROUTE")] +pub type LesenseCh2outroute = crate::Reg; #[doc = "CH2OUT port/pin select"] pub mod lesense_ch2outroute; -#[doc = "LESENSE_CH3OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH3OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH3OUTROUTE (rw) register accessor: CH3OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch3outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch3outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch3outroute`] +module"] +#[doc(alias = "LESENSE_CH3OUTROUTE")] +pub type LesenseCh3outroute = crate::Reg; #[doc = "CH3OUT port/pin select"] pub mod lesense_ch3outroute; -#[doc = "LESENSE_CH4OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH4OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH4OUTROUTE (rw) register accessor: CH4OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch4outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch4outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch4outroute`] +module"] +#[doc(alias = "LESENSE_CH4OUTROUTE")] +pub type LesenseCh4outroute = crate::Reg; #[doc = "CH4OUT port/pin select"] pub mod lesense_ch4outroute; -#[doc = "LESENSE_CH5OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH5OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH5OUTROUTE (rw) register accessor: CH5OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch5outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch5outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch5outroute`] +module"] +#[doc(alias = "LESENSE_CH5OUTROUTE")] +pub type LesenseCh5outroute = crate::Reg; #[doc = "CH5OUT port/pin select"] pub mod lesense_ch5outroute; -#[doc = "LESENSE_CH6OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH6OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH6OUTROUTE (rw) register accessor: CH6OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch6outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch6outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch6outroute`] +module"] +#[doc(alias = "LESENSE_CH6OUTROUTE")] +pub type LesenseCh6outroute = crate::Reg; #[doc = "CH6OUT port/pin select"] pub mod lesense_ch6outroute; -#[doc = "LESENSE_CH7OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH7OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH7OUTROUTE (rw) register accessor: CH7OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch7outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch7outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch7outroute`] +module"] +#[doc(alias = "LESENSE_CH7OUTROUTE")] +pub type LesenseCh7outroute = crate::Reg; #[doc = "CH7OUT port/pin select"] pub mod lesense_ch7outroute; -#[doc = "LESENSE_CH8OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH8OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH8OUTROUTE (rw) register accessor: CH8OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch8outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch8outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch8outroute`] +module"] +#[doc(alias = "LESENSE_CH8OUTROUTE")] +pub type LesenseCh8outroute = crate::Reg; #[doc = "CH8OUT port/pin select"] pub mod lesense_ch8outroute; -#[doc = "LESENSE_CH9OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH9OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH9OUTROUTE (rw) register accessor: CH9OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch9outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch9outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch9outroute`] +module"] +#[doc(alias = "LESENSE_CH9OUTROUTE")] +pub type LesenseCh9outroute = crate::Reg; #[doc = "CH9OUT port/pin select"] pub mod lesense_ch9outroute; -#[doc = "LESENSE_CH10OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH10OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH10OUTROUTE (rw) register accessor: CH10OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch10outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch10outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch10outroute`] +module"] +#[doc(alias = "LESENSE_CH10OUTROUTE")] +pub type LesenseCh10outroute = crate::Reg; #[doc = "CH10OUT port/pin select"] pub mod lesense_ch10outroute; -#[doc = "LESENSE_CH11OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH11OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH11OUTROUTE (rw) register accessor: CH11OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch11outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch11outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch11outroute`] +module"] +#[doc(alias = "LESENSE_CH11OUTROUTE")] +pub type LesenseCh11outroute = crate::Reg; #[doc = "CH11OUT port/pin select"] pub mod lesense_ch11outroute; -#[doc = "LESENSE_CH12OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH12OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH12OUTROUTE (rw) register accessor: CH12OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch12outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch12outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch12outroute`] +module"] +#[doc(alias = "LESENSE_CH12OUTROUTE")] +pub type LesenseCh12outroute = crate::Reg; #[doc = "CH12OUT port/pin select"] pub mod lesense_ch12outroute; -#[doc = "LESENSE_CH13OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH13OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH13OUTROUTE (rw) register accessor: CH13OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch13outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch13outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch13outroute`] +module"] +#[doc(alias = "LESENSE_CH13OUTROUTE")] +pub type LesenseCh13outroute = crate::Reg; #[doc = "CH13OUT port/pin select"] pub mod lesense_ch13outroute; -#[doc = "LESENSE_CH14OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH14OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH14OUTROUTE (rw) register accessor: CH14OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch14outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch14outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch14outroute`] +module"] +#[doc(alias = "LESENSE_CH14OUTROUTE")] +pub type LesenseCh14outroute = crate::Reg; #[doc = "CH14OUT port/pin select"] pub mod lesense_ch14outroute; -#[doc = "LESENSE_CH15OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH15OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH15OUTROUTE (rw) register accessor: CH15OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch15outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch15outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch15outroute`] +module"] +#[doc(alias = "LESENSE_CH15OUTROUTE")] +pub type LesenseCh15outroute = crate::Reg; #[doc = "CH15OUT port/pin select"] pub mod lesense_ch15outroute; -#[doc = "LETIMER_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type LETIMER_ROUTEEN = crate::Reg; +#[doc = "LETIMER_ROUTEEN (rw) register accessor: LETIMER pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`letimer_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`letimer_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@letimer_routeen`] +module"] +#[doc(alias = "LETIMER_ROUTEEN")] +pub type LetimerRouteen = crate::Reg; #[doc = "LETIMER pin enable"] pub mod letimer_routeen; -#[doc = "LETIMER_OUT0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type LETIMER_OUT0ROUTE = crate::Reg; +#[doc = "LETIMER_OUT0ROUTE (rw) register accessor: OUT0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`letimer_out0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`letimer_out0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@letimer_out0route`] +module"] +#[doc(alias = "LETIMER_OUT0ROUTE")] +pub type LetimerOut0route = crate::Reg; #[doc = "OUT0 port/pin select"] pub mod letimer_out0route; -#[doc = "LETIMER_OUT1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type LETIMER_OUT1ROUTE = crate::Reg; +#[doc = "LETIMER_OUT1ROUTE (rw) register accessor: OUT1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`letimer_out1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`letimer_out1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@letimer_out1route`] +module"] +#[doc(alias = "LETIMER_OUT1ROUTE")] +pub type LetimerOut1route = crate::Reg; #[doc = "OUT1 port/pin select"] pub mod letimer_out1route; -#[doc = "PCNT0_S0INROUTE (rw) register accessor: an alias for `Reg`"] -pub type PCNT0_S0INROUTE = crate::Reg; +#[doc = "PCNT0_S0INROUTE (rw) register accessor: S0IN port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`pcnt0_s0inroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcnt0_s0inroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcnt0_s0inroute`] +module"] +#[doc(alias = "PCNT0_S0INROUTE")] +pub type Pcnt0S0inroute = crate::Reg; #[doc = "S0IN port/pin select"] pub mod pcnt0_s0inroute; -#[doc = "PCNT0_S1INROUTE (rw) register accessor: an alias for `Reg`"] -pub type PCNT0_S1INROUTE = crate::Reg; +#[doc = "PCNT0_S1INROUTE (rw) register accessor: S1IN port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`pcnt0_s1inroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcnt0_s1inroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcnt0_s1inroute`] +module"] +#[doc(alias = "PCNT0_S1INROUTE")] +pub type Pcnt0S1inroute = crate::Reg; #[doc = "S1IN port/pin select"] pub mod pcnt0_s1inroute; -#[doc = "PRS0_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type PRS0_ROUTEEN = crate::Reg; +#[doc = "PRS0_ROUTEEN (rw) register accessor: PRS0 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_routeen`] +module"] +#[doc(alias = "PRS0_ROUTEEN")] +pub type Prs0Routeen = crate::Reg; #[doc = "PRS0 pin enable"] pub mod prs0_routeen; -#[doc = "PRS0_ASYNCH0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_ASYNCH0ROUTE = crate::Reg; +#[doc = "PRS0_ASYNCH0ROUTE (rw) register accessor: ASYNCH0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_asynch0route`] +module"] +#[doc(alias = "PRS0_ASYNCH0ROUTE")] +pub type Prs0Asynch0route = crate::Reg; #[doc = "ASYNCH0 port/pin select"] pub mod prs0_asynch0route; -#[doc = "PRS0_ASYNCH1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_ASYNCH1ROUTE = crate::Reg; +#[doc = "PRS0_ASYNCH1ROUTE (rw) register accessor: ASYNCH1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_asynch1route`] +module"] +#[doc(alias = "PRS0_ASYNCH1ROUTE")] +pub type Prs0Asynch1route = crate::Reg; #[doc = "ASYNCH1 port/pin select"] pub mod prs0_asynch1route; -#[doc = "PRS0_ASYNCH2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_ASYNCH2ROUTE = crate::Reg; +#[doc = "PRS0_ASYNCH2ROUTE (rw) register accessor: ASYNCH2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_asynch2route`] +module"] +#[doc(alias = "PRS0_ASYNCH2ROUTE")] +pub type Prs0Asynch2route = crate::Reg; #[doc = "ASYNCH2 port/pin select"] pub mod prs0_asynch2route; -#[doc = "PRS0_ASYNCH3ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_ASYNCH3ROUTE = crate::Reg; +#[doc = "PRS0_ASYNCH3ROUTE (rw) register accessor: ASYNCH3 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch3route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch3route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_asynch3route`] +module"] +#[doc(alias = "PRS0_ASYNCH3ROUTE")] +pub type Prs0Asynch3route = crate::Reg; #[doc = "ASYNCH3 port/pin select"] pub mod prs0_asynch3route; -#[doc = "PRS0_ASYNCH4ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_ASYNCH4ROUTE = crate::Reg; +#[doc = "PRS0_ASYNCH4ROUTE (rw) register accessor: ASYNCH4 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch4route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch4route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_asynch4route`] +module"] +#[doc(alias = "PRS0_ASYNCH4ROUTE")] +pub type Prs0Asynch4route = crate::Reg; #[doc = "ASYNCH4 port/pin select"] pub mod prs0_asynch4route; -#[doc = "PRS0_ASYNCH5ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_ASYNCH5ROUTE = crate::Reg; +#[doc = "PRS0_ASYNCH5ROUTE (rw) register accessor: ASYNCH5 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch5route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch5route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_asynch5route`] +module"] +#[doc(alias = "PRS0_ASYNCH5ROUTE")] +pub type Prs0Asynch5route = crate::Reg; #[doc = "ASYNCH5 port/pin select"] pub mod prs0_asynch5route; -#[doc = "PRS0_ASYNCH6ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_ASYNCH6ROUTE = crate::Reg; +#[doc = "PRS0_ASYNCH6ROUTE (rw) register accessor: ASYNCH6 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch6route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch6route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_asynch6route`] +module"] +#[doc(alias = "PRS0_ASYNCH6ROUTE")] +pub type Prs0Asynch6route = crate::Reg; #[doc = "ASYNCH6 port/pin select"] pub mod prs0_asynch6route; -#[doc = "PRS0_ASYNCH7ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_ASYNCH7ROUTE = crate::Reg; +#[doc = "PRS0_ASYNCH7ROUTE (rw) register accessor: ASYNCH7 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch7route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch7route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_asynch7route`] +module"] +#[doc(alias = "PRS0_ASYNCH7ROUTE")] +pub type Prs0Asynch7route = crate::Reg; #[doc = "ASYNCH7 port/pin select"] pub mod prs0_asynch7route; -#[doc = "PRS0_ASYNCH8ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_ASYNCH8ROUTE = crate::Reg; +#[doc = "PRS0_ASYNCH8ROUTE (rw) register accessor: ASYNCH8 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch8route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch8route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_asynch8route`] +module"] +#[doc(alias = "PRS0_ASYNCH8ROUTE")] +pub type Prs0Asynch8route = crate::Reg; #[doc = "ASYNCH8 port/pin select"] pub mod prs0_asynch8route; -#[doc = "PRS0_ASYNCH9ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_ASYNCH9ROUTE = crate::Reg; +#[doc = "PRS0_ASYNCH9ROUTE (rw) register accessor: ASYNCH9 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch9route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch9route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_asynch9route`] +module"] +#[doc(alias = "PRS0_ASYNCH9ROUTE")] +pub type Prs0Asynch9route = crate::Reg; #[doc = "ASYNCH9 port/pin select"] pub mod prs0_asynch9route; -#[doc = "PRS0_ASYNCH10ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_ASYNCH10ROUTE = crate::Reg; +#[doc = "PRS0_ASYNCH10ROUTE (rw) register accessor: ASYNCH10 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch10route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch10route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_asynch10route`] +module"] +#[doc(alias = "PRS0_ASYNCH10ROUTE")] +pub type Prs0Asynch10route = crate::Reg; #[doc = "ASYNCH10 port/pin select"] pub mod prs0_asynch10route; -#[doc = "PRS0_ASYNCH11ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_ASYNCH11ROUTE = crate::Reg; +#[doc = "PRS0_ASYNCH11ROUTE (rw) register accessor: ASYNCH11 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch11route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch11route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_asynch11route`] +module"] +#[doc(alias = "PRS0_ASYNCH11ROUTE")] +pub type Prs0Asynch11route = crate::Reg; #[doc = "ASYNCH11 port/pin select"] pub mod prs0_asynch11route; -#[doc = "PRS0_SYNCH0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_SYNCH0ROUTE = crate::Reg; +#[doc = "PRS0_SYNCH0ROUTE (rw) register accessor: SYNCH0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_synch0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_synch0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_synch0route`] +module"] +#[doc(alias = "PRS0_SYNCH0ROUTE")] +pub type Prs0Synch0route = crate::Reg; #[doc = "SYNCH0 port/pin select"] pub mod prs0_synch0route; -#[doc = "PRS0_SYNCH1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_SYNCH1ROUTE = crate::Reg; +#[doc = "PRS0_SYNCH1ROUTE (rw) register accessor: SYNCH1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_synch1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_synch1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_synch1route`] +module"] +#[doc(alias = "PRS0_SYNCH1ROUTE")] +pub type Prs0Synch1route = crate::Reg; #[doc = "SYNCH1 port/pin select"] pub mod prs0_synch1route; -#[doc = "PRS0_SYNCH2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_SYNCH2ROUTE = crate::Reg; +#[doc = "PRS0_SYNCH2ROUTE (rw) register accessor: SYNCH2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_synch2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_synch2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_synch2route`] +module"] +#[doc(alias = "PRS0_SYNCH2ROUTE")] +pub type Prs0Synch2route = crate::Reg; #[doc = "SYNCH2 port/pin select"] pub mod prs0_synch2route; -#[doc = "PRS0_SYNCH3ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_SYNCH3ROUTE = crate::Reg; +#[doc = "PRS0_SYNCH3ROUTE (rw) register accessor: SYNCH3 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_synch3route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_synch3route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_synch3route`] +module"] +#[doc(alias = "PRS0_SYNCH3ROUTE")] +pub type Prs0Synch3route = crate::Reg; #[doc = "SYNCH3 port/pin select"] pub mod prs0_synch3route; -#[doc = "SYXO0_BUFOUTREQINASYNCROUTE (rw) register accessor: an alias for `Reg`"] -pub type SYXO0_BUFOUTREQINASYNCROUTE = - crate::Reg; +#[doc = "SYXO0_BUFOUTREQINASYNCROUTE (rw) register accessor: BUFOUTREQINASYNC port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`syxo0_bufoutreqinasyncroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`syxo0_bufoutreqinasyncroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syxo0_bufoutreqinasyncroute`] +module"] +#[doc(alias = "SYXO0_BUFOUTREQINASYNCROUTE")] +pub type Syxo0Bufoutreqinasyncroute = + crate::Reg; #[doc = "BUFOUTREQINASYNC port/pin select"] pub mod syxo0_bufoutreqinasyncroute; -#[doc = "TIMER0_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type TIMER0_ROUTEEN = crate::Reg; +#[doc = "TIMER0_ROUTEEN (rw) register accessor: TIMER0 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer0_routeen`] +module"] +#[doc(alias = "TIMER0_ROUTEEN")] +pub type Timer0Routeen = crate::Reg; #[doc = "TIMER0 pin enable"] pub mod timer0_routeen; -#[doc = "TIMER0_CC0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER0_CC0ROUTE = crate::Reg; +#[doc = "TIMER0_CC0ROUTE (rw) register accessor: CC0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_cc0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_cc0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer0_cc0route`] +module"] +#[doc(alias = "TIMER0_CC0ROUTE")] +pub type Timer0Cc0route = crate::Reg; #[doc = "CC0 port/pin select"] pub mod timer0_cc0route; -#[doc = "TIMER0_CC1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER0_CC1ROUTE = crate::Reg; +#[doc = "TIMER0_CC1ROUTE (rw) register accessor: CC1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_cc1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_cc1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer0_cc1route`] +module"] +#[doc(alias = "TIMER0_CC1ROUTE")] +pub type Timer0Cc1route = crate::Reg; #[doc = "CC1 port/pin select"] pub mod timer0_cc1route; -#[doc = "TIMER0_CC2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER0_CC2ROUTE = crate::Reg; +#[doc = "TIMER0_CC2ROUTE (rw) register accessor: CC2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_cc2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_cc2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer0_cc2route`] +module"] +#[doc(alias = "TIMER0_CC2ROUTE")] +pub type Timer0Cc2route = crate::Reg; #[doc = "CC2 port/pin select"] pub mod timer0_cc2route; -#[doc = "TIMER0_CDTI0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER0_CDTI0ROUTE = crate::Reg; +#[doc = "TIMER0_CDTI0ROUTE (rw) register accessor: CDTI0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_cdti0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_cdti0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer0_cdti0route`] +module"] +#[doc(alias = "TIMER0_CDTI0ROUTE")] +pub type Timer0Cdti0route = crate::Reg; #[doc = "CDTI0 port/pin select"] pub mod timer0_cdti0route; -#[doc = "TIMER0_CDTI1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER0_CDTI1ROUTE = crate::Reg; +#[doc = "TIMER0_CDTI1ROUTE (rw) register accessor: CDTI1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_cdti1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_cdti1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer0_cdti1route`] +module"] +#[doc(alias = "TIMER0_CDTI1ROUTE")] +pub type Timer0Cdti1route = crate::Reg; #[doc = "CDTI1 port/pin select"] pub mod timer0_cdti1route; -#[doc = "TIMER0_CDTI2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER0_CDTI2ROUTE = crate::Reg; +#[doc = "TIMER0_CDTI2ROUTE (rw) register accessor: CDTI2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_cdti2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_cdti2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer0_cdti2route`] +module"] +#[doc(alias = "TIMER0_CDTI2ROUTE")] +pub type Timer0Cdti2route = crate::Reg; #[doc = "CDTI2 port/pin select"] pub mod timer0_cdti2route; -#[doc = "TIMER1_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type TIMER1_ROUTEEN = crate::Reg; +#[doc = "TIMER1_ROUTEEN (rw) register accessor: TIMER1 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer1_routeen`] +module"] +#[doc(alias = "TIMER1_ROUTEEN")] +pub type Timer1Routeen = crate::Reg; #[doc = "TIMER1 pin enable"] pub mod timer1_routeen; -#[doc = "TIMER1_CC0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER1_CC0ROUTE = crate::Reg; +#[doc = "TIMER1_CC0ROUTE (rw) register accessor: CC0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_cc0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_cc0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer1_cc0route`] +module"] +#[doc(alias = "TIMER1_CC0ROUTE")] +pub type Timer1Cc0route = crate::Reg; #[doc = "CC0 port/pin select"] pub mod timer1_cc0route; -#[doc = "TIMER1_CC1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER1_CC1ROUTE = crate::Reg; +#[doc = "TIMER1_CC1ROUTE (rw) register accessor: CC1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_cc1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_cc1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer1_cc1route`] +module"] +#[doc(alias = "TIMER1_CC1ROUTE")] +pub type Timer1Cc1route = crate::Reg; #[doc = "CC1 port/pin select"] pub mod timer1_cc1route; -#[doc = "TIMER1_CC2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER1_CC2ROUTE = crate::Reg; +#[doc = "TIMER1_CC2ROUTE (rw) register accessor: CC2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_cc2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_cc2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer1_cc2route`] +module"] +#[doc(alias = "TIMER1_CC2ROUTE")] +pub type Timer1Cc2route = crate::Reg; #[doc = "CC2 port/pin select"] pub mod timer1_cc2route; -#[doc = "TIMER1_CDTI0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER1_CDTI0ROUTE = crate::Reg; +#[doc = "TIMER1_CDTI0ROUTE (rw) register accessor: CDTI0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_cdti0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_cdti0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer1_cdti0route`] +module"] +#[doc(alias = "TIMER1_CDTI0ROUTE")] +pub type Timer1Cdti0route = crate::Reg; #[doc = "CDTI0 port/pin select"] pub mod timer1_cdti0route; -#[doc = "TIMER1_CDTI1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER1_CDTI1ROUTE = crate::Reg; +#[doc = "TIMER1_CDTI1ROUTE (rw) register accessor: CDTI1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_cdti1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_cdti1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer1_cdti1route`] +module"] +#[doc(alias = "TIMER1_CDTI1ROUTE")] +pub type Timer1Cdti1route = crate::Reg; #[doc = "CDTI1 port/pin select"] pub mod timer1_cdti1route; -#[doc = "TIMER1_CDTI2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER1_CDTI2ROUTE = crate::Reg; +#[doc = "TIMER1_CDTI2ROUTE (rw) register accessor: CDTI2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_cdti2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_cdti2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer1_cdti2route`] +module"] +#[doc(alias = "TIMER1_CDTI2ROUTE")] +pub type Timer1Cdti2route = crate::Reg; #[doc = "CDTI2 port/pin select"] pub mod timer1_cdti2route; -#[doc = "TIMER2_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type TIMER2_ROUTEEN = crate::Reg; +#[doc = "TIMER2_ROUTEEN (rw) register accessor: TIMER2 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer2_routeen`] +module"] +#[doc(alias = "TIMER2_ROUTEEN")] +pub type Timer2Routeen = crate::Reg; #[doc = "TIMER2 pin enable"] pub mod timer2_routeen; -#[doc = "TIMER2_CC0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER2_CC0ROUTE = crate::Reg; +#[doc = "TIMER2_CC0ROUTE (rw) register accessor: CC0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_cc0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_cc0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer2_cc0route`] +module"] +#[doc(alias = "TIMER2_CC0ROUTE")] +pub type Timer2Cc0route = crate::Reg; #[doc = "CC0 port/pin select"] pub mod timer2_cc0route; -#[doc = "TIMER2_CC1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER2_CC1ROUTE = crate::Reg; +#[doc = "TIMER2_CC1ROUTE (rw) register accessor: CC1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_cc1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_cc1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer2_cc1route`] +module"] +#[doc(alias = "TIMER2_CC1ROUTE")] +pub type Timer2Cc1route = crate::Reg; #[doc = "CC1 port/pin select"] pub mod timer2_cc1route; -#[doc = "TIMER2_CC2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER2_CC2ROUTE = crate::Reg; +#[doc = "TIMER2_CC2ROUTE (rw) register accessor: CC2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_cc2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_cc2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer2_cc2route`] +module"] +#[doc(alias = "TIMER2_CC2ROUTE")] +pub type Timer2Cc2route = crate::Reg; #[doc = "CC2 port/pin select"] pub mod timer2_cc2route; -#[doc = "TIMER2_CDTI0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER2_CDTI0ROUTE = crate::Reg; +#[doc = "TIMER2_CDTI0ROUTE (rw) register accessor: CDTI0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_cdti0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_cdti0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer2_cdti0route`] +module"] +#[doc(alias = "TIMER2_CDTI0ROUTE")] +pub type Timer2Cdti0route = crate::Reg; #[doc = "CDTI0 port/pin select"] pub mod timer2_cdti0route; -#[doc = "TIMER2_CDTI1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER2_CDTI1ROUTE = crate::Reg; +#[doc = "TIMER2_CDTI1ROUTE (rw) register accessor: CDTI1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_cdti1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_cdti1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer2_cdti1route`] +module"] +#[doc(alias = "TIMER2_CDTI1ROUTE")] +pub type Timer2Cdti1route = crate::Reg; #[doc = "CDTI1 port/pin select"] pub mod timer2_cdti1route; -#[doc = "TIMER2_CDTI2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER2_CDTI2ROUTE = crate::Reg; +#[doc = "TIMER2_CDTI2ROUTE (rw) register accessor: CDTI2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_cdti2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_cdti2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer2_cdti2route`] +module"] +#[doc(alias = "TIMER2_CDTI2ROUTE")] +pub type Timer2Cdti2route = crate::Reg; #[doc = "CDTI2 port/pin select"] pub mod timer2_cdti2route; -#[doc = "TIMER3_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type TIMER3_ROUTEEN = crate::Reg; +#[doc = "TIMER3_ROUTEEN (rw) register accessor: TIMER3 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer3_routeen`] +module"] +#[doc(alias = "TIMER3_ROUTEEN")] +pub type Timer3Routeen = crate::Reg; #[doc = "TIMER3 pin enable"] pub mod timer3_routeen; -#[doc = "TIMER3_CC0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER3_CC0ROUTE = crate::Reg; +#[doc = "TIMER3_CC0ROUTE (rw) register accessor: CC0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_cc0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_cc0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer3_cc0route`] +module"] +#[doc(alias = "TIMER3_CC0ROUTE")] +pub type Timer3Cc0route = crate::Reg; #[doc = "CC0 port/pin select"] pub mod timer3_cc0route; -#[doc = "TIMER3_CC1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER3_CC1ROUTE = crate::Reg; +#[doc = "TIMER3_CC1ROUTE (rw) register accessor: CC1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_cc1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_cc1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer3_cc1route`] +module"] +#[doc(alias = "TIMER3_CC1ROUTE")] +pub type Timer3Cc1route = crate::Reg; #[doc = "CC1 port/pin select"] pub mod timer3_cc1route; -#[doc = "TIMER3_CC2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER3_CC2ROUTE = crate::Reg; +#[doc = "TIMER3_CC2ROUTE (rw) register accessor: CC2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_cc2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_cc2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer3_cc2route`] +module"] +#[doc(alias = "TIMER3_CC2ROUTE")] +pub type Timer3Cc2route = crate::Reg; #[doc = "CC2 port/pin select"] pub mod timer3_cc2route; -#[doc = "TIMER3_CDTI0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER3_CDTI0ROUTE = crate::Reg; +#[doc = "TIMER3_CDTI0ROUTE (rw) register accessor: CDTI0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_cdti0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_cdti0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer3_cdti0route`] +module"] +#[doc(alias = "TIMER3_CDTI0ROUTE")] +pub type Timer3Cdti0route = crate::Reg; #[doc = "CDTI0 port/pin select"] pub mod timer3_cdti0route; -#[doc = "TIMER3_CDTI1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER3_CDTI1ROUTE = crate::Reg; +#[doc = "TIMER3_CDTI1ROUTE (rw) register accessor: CDTI1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_cdti1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_cdti1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer3_cdti1route`] +module"] +#[doc(alias = "TIMER3_CDTI1ROUTE")] +pub type Timer3Cdti1route = crate::Reg; #[doc = "CDTI1 port/pin select"] pub mod timer3_cdti1route; -#[doc = "TIMER3_CDTI2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER3_CDTI2ROUTE = crate::Reg; +#[doc = "TIMER3_CDTI2ROUTE (rw) register accessor: CDTI2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_cdti2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_cdti2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer3_cdti2route`] +module"] +#[doc(alias = "TIMER3_CDTI2ROUTE")] +pub type Timer3Cdti2route = crate::Reg; #[doc = "CDTI2 port/pin select"] pub mod timer3_cdti2route; -#[doc = "TIMER4_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type TIMER4_ROUTEEN = crate::Reg; +#[doc = "TIMER4_ROUTEEN (rw) register accessor: TIMER4 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer4_routeen`] +module"] +#[doc(alias = "TIMER4_ROUTEEN")] +pub type Timer4Routeen = crate::Reg; #[doc = "TIMER4 pin enable"] pub mod timer4_routeen; -#[doc = "TIMER4_CC0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER4_CC0ROUTE = crate::Reg; +#[doc = "TIMER4_CC0ROUTE (rw) register accessor: CC0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_cc0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_cc0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer4_cc0route`] +module"] +#[doc(alias = "TIMER4_CC0ROUTE")] +pub type Timer4Cc0route = crate::Reg; #[doc = "CC0 port/pin select"] pub mod timer4_cc0route; -#[doc = "TIMER4_CC1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER4_CC1ROUTE = crate::Reg; +#[doc = "TIMER4_CC1ROUTE (rw) register accessor: CC1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_cc1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_cc1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer4_cc1route`] +module"] +#[doc(alias = "TIMER4_CC1ROUTE")] +pub type Timer4Cc1route = crate::Reg; #[doc = "CC1 port/pin select"] pub mod timer4_cc1route; -#[doc = "TIMER4_CC2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER4_CC2ROUTE = crate::Reg; +#[doc = "TIMER4_CC2ROUTE (rw) register accessor: CC2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_cc2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_cc2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer4_cc2route`] +module"] +#[doc(alias = "TIMER4_CC2ROUTE")] +pub type Timer4Cc2route = crate::Reg; #[doc = "CC2 port/pin select"] pub mod timer4_cc2route; -#[doc = "TIMER4_CDTI0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER4_CDTI0ROUTE = crate::Reg; +#[doc = "TIMER4_CDTI0ROUTE (rw) register accessor: CDTI0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_cdti0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_cdti0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer4_cdti0route`] +module"] +#[doc(alias = "TIMER4_CDTI0ROUTE")] +pub type Timer4Cdti0route = crate::Reg; #[doc = "CDTI0 port/pin select"] pub mod timer4_cdti0route; -#[doc = "TIMER4_CDTI1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER4_CDTI1ROUTE = crate::Reg; +#[doc = "TIMER4_CDTI1ROUTE (rw) register accessor: CDTI1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_cdti1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_cdti1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer4_cdti1route`] +module"] +#[doc(alias = "TIMER4_CDTI1ROUTE")] +pub type Timer4Cdti1route = crate::Reg; #[doc = "CDTI1 port/pin select"] pub mod timer4_cdti1route; -#[doc = "TIMER4_CDTI2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER4_CDTI2ROUTE = crate::Reg; +#[doc = "TIMER4_CDTI2ROUTE (rw) register accessor: CDTI2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_cdti2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_cdti2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer4_cdti2route`] +module"] +#[doc(alias = "TIMER4_CDTI2ROUTE")] +pub type Timer4Cdti2route = crate::Reg; #[doc = "CDTI2 port/pin select"] pub mod timer4_cdti2route; -#[doc = "USART0_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type USART0_ROUTEEN = crate::Reg; +#[doc = "USART0_ROUTEEN (rw) register accessor: USART0 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usart0_routeen`] +module"] +#[doc(alias = "USART0_ROUTEEN")] +pub type Usart0Routeen = crate::Reg; #[doc = "USART0 pin enable"] pub mod usart0_routeen; -#[doc = "USART0_CSROUTE (rw) register accessor: an alias for `Reg`"] -pub type USART0_CSROUTE = crate::Reg; +#[doc = "USART0_CSROUTE (rw) register accessor: CS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_csroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_csroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usart0_csroute`] +module"] +#[doc(alias = "USART0_CSROUTE")] +pub type Usart0Csroute = crate::Reg; #[doc = "CS port/pin select"] pub mod usart0_csroute; -#[doc = "USART0_CTSROUTE (rw) register accessor: an alias for `Reg`"] -pub type USART0_CTSROUTE = crate::Reg; +#[doc = "USART0_CTSROUTE (rw) register accessor: CTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_ctsroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_ctsroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usart0_ctsroute`] +module"] +#[doc(alias = "USART0_CTSROUTE")] +pub type Usart0Ctsroute = crate::Reg; #[doc = "CTS port/pin select"] pub mod usart0_ctsroute; -#[doc = "USART0_RTSROUTE (rw) register accessor: an alias for `Reg`"] -pub type USART0_RTSROUTE = crate::Reg; +#[doc = "USART0_RTSROUTE (rw) register accessor: RTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_rtsroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_rtsroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usart0_rtsroute`] +module"] +#[doc(alias = "USART0_RTSROUTE")] +pub type Usart0Rtsroute = crate::Reg; #[doc = "RTS port/pin select"] pub mod usart0_rtsroute; -#[doc = "USART0_RXROUTE (rw) register accessor: an alias for `Reg`"] -pub type USART0_RXROUTE = crate::Reg; +#[doc = "USART0_RXROUTE (rw) register accessor: RX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_rxroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_rxroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usart0_rxroute`] +module"] +#[doc(alias = "USART0_RXROUTE")] +pub type Usart0Rxroute = crate::Reg; #[doc = "RX port/pin select"] pub mod usart0_rxroute; -#[doc = "USART0_CLKROUTE (rw) register accessor: an alias for `Reg`"] -pub type USART0_CLKROUTE = crate::Reg; +#[doc = "USART0_CLKROUTE (rw) register accessor: SCLK port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_clkroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_clkroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usart0_clkroute`] +module"] +#[doc(alias = "USART0_CLKROUTE")] +pub type Usart0Clkroute = crate::Reg; #[doc = "SCLK port/pin select"] pub mod usart0_clkroute; -#[doc = "USART0_TXROUTE (rw) register accessor: an alias for `Reg`"] -pub type USART0_TXROUTE = crate::Reg; +#[doc = "USART0_TXROUTE (rw) register accessor: TX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_txroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_txroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usart0_txroute`] +module"] +#[doc(alias = "USART0_TXROUTE")] +pub type Usart0Txroute = crate::Reg; #[doc = "TX port/pin select"] pub mod usart0_txroute; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/abusalloc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/abusalloc.rs index 2f4ee4d..2307048 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/abusalloc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/abusalloc.rs @@ -1,475 +1,465 @@ #[doc = "Register `ABUSALLOC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ABUSALLOC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `AEVEN0` reader - A Bus Even 0"] -pub type AEVEN0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "A Bus Even 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum AEVEN0_A { +pub enum Aeven0 { #[doc = "0: The bus is not allocated"] - TRISTATE = 0, + Tristate = 0, #[doc = "1: The bus is allocated to ADC0"] - ADC0 = 1, + Adc0 = 1, #[doc = "2: The bus is allocated to ACMP0"] - ACMP0 = 2, + Acmp0 = 2, #[doc = "3: The bus is allocated to ACMP1"] - ACMP1 = 3, + Acmp1 = 3, #[doc = "4: The bus is allocated to VDAC0 CH0"] - VDAC0CH0 = 4, + Vdac0ch0 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: AEVEN0_A) -> Self { + fn from(variant: Aeven0) -> Self { variant as _ } } -impl AEVEN0_R { +impl crate::FieldSpec for Aeven0 { + type Ux = u8; +} +impl crate::IsEnum for Aeven0 {} +#[doc = "Field `AEVEN0` reader - A Bus Even 0"] +pub type Aeven0R = crate::FieldReader; +impl Aeven0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(AEVEN0_A::TRISTATE), - 1 => Some(AEVEN0_A::ADC0), - 2 => Some(AEVEN0_A::ACMP0), - 3 => Some(AEVEN0_A::ACMP1), - 4 => Some(AEVEN0_A::VDAC0CH0), + 0 => Some(Aeven0::Tristate), + 1 => Some(Aeven0::Adc0), + 2 => Some(Aeven0::Acmp0), + 3 => Some(Aeven0::Acmp1), + 4 => Some(Aeven0::Vdac0ch0), _ => None, } } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "The bus is not allocated"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == AEVEN0_A::TRISTATE + *self == Aeven0::Tristate } - #[doc = "Checks if the value of the field is `ADC0`"] + #[doc = "The bus is allocated to ADC0"] #[inline(always)] pub fn is_adc0(&self) -> bool { - *self == AEVEN0_A::ADC0 + *self == Aeven0::Adc0 } - #[doc = "Checks if the value of the field is `ACMP0`"] + #[doc = "The bus is allocated to ACMP0"] #[inline(always)] pub fn is_acmp0(&self) -> bool { - *self == AEVEN0_A::ACMP0 + *self == Aeven0::Acmp0 } - #[doc = "Checks if the value of the field is `ACMP1`"] + #[doc = "The bus is allocated to ACMP1"] #[inline(always)] pub fn is_acmp1(&self) -> bool { - *self == AEVEN0_A::ACMP1 + *self == Aeven0::Acmp1 } - #[doc = "Checks if the value of the field is `VDAC0CH0`"] + #[doc = "The bus is allocated to VDAC0 CH0"] #[inline(always)] pub fn is_vdac0ch0(&self) -> bool { - *self == AEVEN0_A::VDAC0CH0 + *self == Aeven0::Vdac0ch0 } } #[doc = "Field `AEVEN0` writer - A Bus Even 0"] -pub type AEVEN0_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ABUSALLOC_SPEC, u8, AEVEN0_A, 4, O>; -impl<'a, const O: u8> AEVEN0_W<'a, O> { +pub type Aeven0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Aeven0>; +impl<'a, REG> Aeven0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The bus is not allocated"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(AEVEN0_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Aeven0::Tristate) } #[doc = "The bus is allocated to ADC0"] #[inline(always)] - pub fn adc0(self) -> &'a mut W { - self.variant(AEVEN0_A::ADC0) + pub fn adc0(self) -> &'a mut crate::W { + self.variant(Aeven0::Adc0) } #[doc = "The bus is allocated to ACMP0"] #[inline(always)] - pub fn acmp0(self) -> &'a mut W { - self.variant(AEVEN0_A::ACMP0) + pub fn acmp0(self) -> &'a mut crate::W { + self.variant(Aeven0::Acmp0) } #[doc = "The bus is allocated to ACMP1"] #[inline(always)] - pub fn acmp1(self) -> &'a mut W { - self.variant(AEVEN0_A::ACMP1) + pub fn acmp1(self) -> &'a mut crate::W { + self.variant(Aeven0::Acmp1) } #[doc = "The bus is allocated to VDAC0 CH0"] #[inline(always)] - pub fn vdac0ch0(self) -> &'a mut W { - self.variant(AEVEN0_A::VDAC0CH0) + pub fn vdac0ch0(self) -> &'a mut crate::W { + self.variant(Aeven0::Vdac0ch0) } } -#[doc = "Field `AEVEN1` reader - A Bus Even 1"] -pub type AEVEN1_R = crate::FieldReader; #[doc = "A Bus Even 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum AEVEN1_A { +pub enum Aeven1 { #[doc = "0: The bus is not allocated"] - TRISTATE = 0, + Tristate = 0, #[doc = "1: The bus is allocated to ADC0"] - ADC0 = 1, + Adc0 = 1, #[doc = "2: The bus is allocated to ACMP0"] - ACMP0 = 2, + Acmp0 = 2, #[doc = "3: The bus is allocated to ACMP1"] - ACMP1 = 3, + Acmp1 = 3, #[doc = "4: The bus is allocated to VDAC0 CH1"] - VDAC0CH1 = 4, + Vdac0ch1 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: AEVEN1_A) -> Self { + fn from(variant: Aeven1) -> Self { variant as _ } } -impl AEVEN1_R { +impl crate::FieldSpec for Aeven1 { + type Ux = u8; +} +impl crate::IsEnum for Aeven1 {} +#[doc = "Field `AEVEN1` reader - A Bus Even 1"] +pub type Aeven1R = crate::FieldReader; +impl Aeven1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(AEVEN1_A::TRISTATE), - 1 => Some(AEVEN1_A::ADC0), - 2 => Some(AEVEN1_A::ACMP0), - 3 => Some(AEVEN1_A::ACMP1), - 4 => Some(AEVEN1_A::VDAC0CH1), + 0 => Some(Aeven1::Tristate), + 1 => Some(Aeven1::Adc0), + 2 => Some(Aeven1::Acmp0), + 3 => Some(Aeven1::Acmp1), + 4 => Some(Aeven1::Vdac0ch1), _ => None, } } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "The bus is not allocated"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == AEVEN1_A::TRISTATE + *self == Aeven1::Tristate } - #[doc = "Checks if the value of the field is `ADC0`"] + #[doc = "The bus is allocated to ADC0"] #[inline(always)] pub fn is_adc0(&self) -> bool { - *self == AEVEN1_A::ADC0 + *self == Aeven1::Adc0 } - #[doc = "Checks if the value of the field is `ACMP0`"] + #[doc = "The bus is allocated to ACMP0"] #[inline(always)] pub fn is_acmp0(&self) -> bool { - *self == AEVEN1_A::ACMP0 + *self == Aeven1::Acmp0 } - #[doc = "Checks if the value of the field is `ACMP1`"] + #[doc = "The bus is allocated to ACMP1"] #[inline(always)] pub fn is_acmp1(&self) -> bool { - *self == AEVEN1_A::ACMP1 + *self == Aeven1::Acmp1 } - #[doc = "Checks if the value of the field is `VDAC0CH1`"] + #[doc = "The bus is allocated to VDAC0 CH1"] #[inline(always)] pub fn is_vdac0ch1(&self) -> bool { - *self == AEVEN1_A::VDAC0CH1 + *self == Aeven1::Vdac0ch1 } } #[doc = "Field `AEVEN1` writer - A Bus Even 1"] -pub type AEVEN1_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ABUSALLOC_SPEC, u8, AEVEN1_A, 4, O>; -impl<'a, const O: u8> AEVEN1_W<'a, O> { +pub type Aeven1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Aeven1>; +impl<'a, REG> Aeven1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The bus is not allocated"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(AEVEN1_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Aeven1::Tristate) } #[doc = "The bus is allocated to ADC0"] #[inline(always)] - pub fn adc0(self) -> &'a mut W { - self.variant(AEVEN1_A::ADC0) + pub fn adc0(self) -> &'a mut crate::W { + self.variant(Aeven1::Adc0) } #[doc = "The bus is allocated to ACMP0"] #[inline(always)] - pub fn acmp0(self) -> &'a mut W { - self.variant(AEVEN1_A::ACMP0) + pub fn acmp0(self) -> &'a mut crate::W { + self.variant(Aeven1::Acmp0) } #[doc = "The bus is allocated to ACMP1"] #[inline(always)] - pub fn acmp1(self) -> &'a mut W { - self.variant(AEVEN1_A::ACMP1) + pub fn acmp1(self) -> &'a mut crate::W { + self.variant(Aeven1::Acmp1) } #[doc = "The bus is allocated to VDAC0 CH1"] #[inline(always)] - pub fn vdac0ch1(self) -> &'a mut W { - self.variant(AEVEN1_A::VDAC0CH1) + pub fn vdac0ch1(self) -> &'a mut crate::W { + self.variant(Aeven1::Vdac0ch1) } } -#[doc = "Field `AODD0` reader - A Bus Odd 0"] -pub type AODD0_R = crate::FieldReader; #[doc = "A Bus Odd 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum AODD0_A { +pub enum Aodd0 { #[doc = "0: The bus is not allocated"] - TRISTATE = 0, + Tristate = 0, #[doc = "1: The bus is allocated to ADC0"] - ADC0 = 1, + Adc0 = 1, #[doc = "2: The bus is allocated to ACMP0"] - ACMP0 = 2, + Acmp0 = 2, #[doc = "3: The bus is allocated to ACMP1"] - ACMP1 = 3, + Acmp1 = 3, #[doc = "4: The bus is allocated to VDAC0 CH0"] - VDAC0CH0 = 4, + Vdac0ch0 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: AODD0_A) -> Self { + fn from(variant: Aodd0) -> Self { variant as _ } } -impl AODD0_R { +impl crate::FieldSpec for Aodd0 { + type Ux = u8; +} +impl crate::IsEnum for Aodd0 {} +#[doc = "Field `AODD0` reader - A Bus Odd 0"] +pub type Aodd0R = crate::FieldReader; +impl Aodd0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(AODD0_A::TRISTATE), - 1 => Some(AODD0_A::ADC0), - 2 => Some(AODD0_A::ACMP0), - 3 => Some(AODD0_A::ACMP1), - 4 => Some(AODD0_A::VDAC0CH0), + 0 => Some(Aodd0::Tristate), + 1 => Some(Aodd0::Adc0), + 2 => Some(Aodd0::Acmp0), + 3 => Some(Aodd0::Acmp1), + 4 => Some(Aodd0::Vdac0ch0), _ => None, } } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "The bus is not allocated"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == AODD0_A::TRISTATE + *self == Aodd0::Tristate } - #[doc = "Checks if the value of the field is `ADC0`"] + #[doc = "The bus is allocated to ADC0"] #[inline(always)] pub fn is_adc0(&self) -> bool { - *self == AODD0_A::ADC0 + *self == Aodd0::Adc0 } - #[doc = "Checks if the value of the field is `ACMP0`"] + #[doc = "The bus is allocated to ACMP0"] #[inline(always)] pub fn is_acmp0(&self) -> bool { - *self == AODD0_A::ACMP0 + *self == Aodd0::Acmp0 } - #[doc = "Checks if the value of the field is `ACMP1`"] + #[doc = "The bus is allocated to ACMP1"] #[inline(always)] pub fn is_acmp1(&self) -> bool { - *self == AODD0_A::ACMP1 + *self == Aodd0::Acmp1 } - #[doc = "Checks if the value of the field is `VDAC0CH0`"] + #[doc = "The bus is allocated to VDAC0 CH0"] #[inline(always)] pub fn is_vdac0ch0(&self) -> bool { - *self == AODD0_A::VDAC0CH0 + *self == Aodd0::Vdac0ch0 } } #[doc = "Field `AODD0` writer - A Bus Odd 0"] -pub type AODD0_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ABUSALLOC_SPEC, u8, AODD0_A, 4, O>; -impl<'a, const O: u8> AODD0_W<'a, O> { +pub type Aodd0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Aodd0>; +impl<'a, REG> Aodd0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The bus is not allocated"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(AODD0_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Aodd0::Tristate) } #[doc = "The bus is allocated to ADC0"] #[inline(always)] - pub fn adc0(self) -> &'a mut W { - self.variant(AODD0_A::ADC0) + pub fn adc0(self) -> &'a mut crate::W { + self.variant(Aodd0::Adc0) } #[doc = "The bus is allocated to ACMP0"] #[inline(always)] - pub fn acmp0(self) -> &'a mut W { - self.variant(AODD0_A::ACMP0) + pub fn acmp0(self) -> &'a mut crate::W { + self.variant(Aodd0::Acmp0) } #[doc = "The bus is allocated to ACMP1"] #[inline(always)] - pub fn acmp1(self) -> &'a mut W { - self.variant(AODD0_A::ACMP1) + pub fn acmp1(self) -> &'a mut crate::W { + self.variant(Aodd0::Acmp1) } #[doc = "The bus is allocated to VDAC0 CH0"] #[inline(always)] - pub fn vdac0ch0(self) -> &'a mut W { - self.variant(AODD0_A::VDAC0CH0) + pub fn vdac0ch0(self) -> &'a mut crate::W { + self.variant(Aodd0::Vdac0ch0) } } -#[doc = "Field `AODD1` reader - A Bus Odd 1"] -pub type AODD1_R = crate::FieldReader; #[doc = "A Bus Odd 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum AODD1_A { +pub enum Aodd1 { #[doc = "0: The bus is not allocated"] - TRISTATE = 0, + Tristate = 0, #[doc = "1: The bus is allocated to ADC0"] - ADC0 = 1, + Adc0 = 1, #[doc = "2: The bus is allocated to ACMP0"] - ACMP0 = 2, + Acmp0 = 2, #[doc = "3: The bus is allocated to ACMP1"] - ACMP1 = 3, + Acmp1 = 3, #[doc = "4: The bus is allocated to VDAC0 CH1"] - VDAC0CH1 = 4, + Vdac0ch1 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: AODD1_A) -> Self { + fn from(variant: Aodd1) -> Self { variant as _ } } -impl AODD1_R { +impl crate::FieldSpec for Aodd1 { + type Ux = u8; +} +impl crate::IsEnum for Aodd1 {} +#[doc = "Field `AODD1` reader - A Bus Odd 1"] +pub type Aodd1R = crate::FieldReader; +impl Aodd1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(AODD1_A::TRISTATE), - 1 => Some(AODD1_A::ADC0), - 2 => Some(AODD1_A::ACMP0), - 3 => Some(AODD1_A::ACMP1), - 4 => Some(AODD1_A::VDAC0CH1), + 0 => Some(Aodd1::Tristate), + 1 => Some(Aodd1::Adc0), + 2 => Some(Aodd1::Acmp0), + 3 => Some(Aodd1::Acmp1), + 4 => Some(Aodd1::Vdac0ch1), _ => None, } } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "The bus is not allocated"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == AODD1_A::TRISTATE + *self == Aodd1::Tristate } - #[doc = "Checks if the value of the field is `ADC0`"] + #[doc = "The bus is allocated to ADC0"] #[inline(always)] pub fn is_adc0(&self) -> bool { - *self == AODD1_A::ADC0 + *self == Aodd1::Adc0 } - #[doc = "Checks if the value of the field is `ACMP0`"] + #[doc = "The bus is allocated to ACMP0"] #[inline(always)] pub fn is_acmp0(&self) -> bool { - *self == AODD1_A::ACMP0 + *self == Aodd1::Acmp0 } - #[doc = "Checks if the value of the field is `ACMP1`"] + #[doc = "The bus is allocated to ACMP1"] #[inline(always)] pub fn is_acmp1(&self) -> bool { - *self == AODD1_A::ACMP1 + *self == Aodd1::Acmp1 } - #[doc = "Checks if the value of the field is `VDAC0CH1`"] + #[doc = "The bus is allocated to VDAC0 CH1"] #[inline(always)] pub fn is_vdac0ch1(&self) -> bool { - *self == AODD1_A::VDAC0CH1 + *self == Aodd1::Vdac0ch1 } } #[doc = "Field `AODD1` writer - A Bus Odd 1"] -pub type AODD1_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ABUSALLOC_SPEC, u8, AODD1_A, 4, O>; -impl<'a, const O: u8> AODD1_W<'a, O> { +pub type Aodd1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Aodd1>; +impl<'a, REG> Aodd1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The bus is not allocated"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(AODD1_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Aodd1::Tristate) } #[doc = "The bus is allocated to ADC0"] #[inline(always)] - pub fn adc0(self) -> &'a mut W { - self.variant(AODD1_A::ADC0) + pub fn adc0(self) -> &'a mut crate::W { + self.variant(Aodd1::Adc0) } #[doc = "The bus is allocated to ACMP0"] #[inline(always)] - pub fn acmp0(self) -> &'a mut W { - self.variant(AODD1_A::ACMP0) + pub fn acmp0(self) -> &'a mut crate::W { + self.variant(Aodd1::Acmp0) } #[doc = "The bus is allocated to ACMP1"] #[inline(always)] - pub fn acmp1(self) -> &'a mut W { - self.variant(AODD1_A::ACMP1) + pub fn acmp1(self) -> &'a mut crate::W { + self.variant(Aodd1::Acmp1) } #[doc = "The bus is allocated to VDAC0 CH1"] #[inline(always)] - pub fn vdac0ch1(self) -> &'a mut W { - self.variant(AODD1_A::VDAC0CH1) + pub fn vdac0ch1(self) -> &'a mut crate::W { + self.variant(Aodd1::Vdac0ch1) } } impl R { #[doc = "Bits 0:3 - A Bus Even 0"] #[inline(always)] - pub fn aeven0(&self) -> AEVEN0_R { - AEVEN0_R::new((self.bits & 0x0f) as u8) + pub fn aeven0(&self) -> Aeven0R { + Aeven0R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:11 - A Bus Even 1"] #[inline(always)] - pub fn aeven1(&self) -> AEVEN1_R { - AEVEN1_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn aeven1(&self) -> Aeven1R { + Aeven1R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 16:19 - A Bus Odd 0"] #[inline(always)] - pub fn aodd0(&self) -> AODD0_R { - AODD0_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn aodd0(&self) -> Aodd0R { + Aodd0R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - A Bus Odd 1"] #[inline(always)] - pub fn aodd1(&self) -> AODD1_R { - AODD1_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn aodd1(&self) -> Aodd1R { + Aodd1R::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - A Bus Even 0"] #[inline(always)] #[must_use] - pub fn aeven0(&mut self) -> AEVEN0_W<0> { - AEVEN0_W::new(self) + pub fn aeven0(&mut self) -> Aeven0W { + Aeven0W::new(self, 0) } #[doc = "Bits 8:11 - A Bus Even 1"] #[inline(always)] #[must_use] - pub fn aeven1(&mut self) -> AEVEN1_W<8> { - AEVEN1_W::new(self) + pub fn aeven1(&mut self) -> Aeven1W { + Aeven1W::new(self, 8) } #[doc = "Bits 16:19 - A Bus Odd 0"] #[inline(always)] #[must_use] - pub fn aodd0(&mut self) -> AODD0_W<16> { - AODD0_W::new(self) + pub fn aodd0(&mut self) -> Aodd0W { + Aodd0W::new(self, 16) } #[doc = "Bits 24:27 - A Bus Odd 1"] #[inline(always)] #[must_use] - pub fn aodd1(&mut self) -> AODD1_W<24> { - AODD1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn aodd1(&mut self) -> Aodd1W { + Aodd1W::new(self, 24) } } -#[doc = "A Bus allocation\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [abusalloc](index.html) module"] -pub struct ABUSALLOC_SPEC; -impl crate::RegisterSpec for ABUSALLOC_SPEC { +#[doc = "A Bus allocation\n\nYou can [`read`](crate::Reg::read) this register and get [`abusalloc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`abusalloc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AbusallocSpec; +impl crate::RegisterSpec for AbusallocSpec { type Ux = u32; } -#[doc = "`read()` method returns [abusalloc::R](R) reader structure"] -impl crate::Readable for ABUSALLOC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [abusalloc::W](W) writer structure"] -impl crate::Writable for ABUSALLOC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`abusalloc::R`](R) reader structure"] +impl crate::Readable for AbusallocSpec {} +#[doc = "`write(|w| ..)` method takes [`abusalloc::W`](W) writer structure"] +impl crate::Writable for AbusallocSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ABUSALLOC to value 0"] -impl crate::Resettable for ABUSALLOC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for AbusallocSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/acmp0_acmpoutroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/acmp0_acmpoutroute.rs index 4e1af63..2d64f16 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/acmp0_acmpoutroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/acmp0_acmpoutroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `ACMP0_ACMPOUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ACMP0_ACMPOUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ACMPOUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ACMPOUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ACMP0_ACMPOUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ACMPOUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ACMPOUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ACMP0_ACMPOUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ACMPOUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ACMPOUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ACMPOUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ACMPOUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ACMPOUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [acmp0_acmpoutroute](index.html) module"] -pub struct ACMP0_ACMPOUTROUTE_SPEC; -impl crate::RegisterSpec for ACMP0_ACMPOUTROUTE_SPEC { +#[doc = "ACMPOUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`acmp0_acmpoutroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`acmp0_acmpoutroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Acmp0AcmpoutrouteSpec; +impl crate::RegisterSpec for Acmp0AcmpoutrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [acmp0_acmpoutroute::R](R) reader structure"] -impl crate::Readable for ACMP0_ACMPOUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [acmp0_acmpoutroute::W](W) writer structure"] -impl crate::Writable for ACMP0_ACMPOUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`acmp0_acmpoutroute::R`](R) reader structure"] +impl crate::Readable for Acmp0AcmpoutrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`acmp0_acmpoutroute::W`](W) writer structure"] +impl crate::Writable for Acmp0AcmpoutrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ACMP0_ACMPOUTROUTE to value 0"] -impl crate::Resettable for ACMP0_ACMPOUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Acmp0AcmpoutrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/acmp0_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/acmp0_routeen.rs index bc21d84..a44f0ae 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/acmp0_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/acmp0_routeen.rs @@ -1,80 +1,40 @@ #[doc = "Register `ACMP0_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ACMP0_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ACMPOUTPEN` reader - ACMPOUT pin enable control bit"] -pub type ACMPOUTPEN_R = crate::BitReader; +pub type AcmpoutpenR = crate::BitReader; #[doc = "Field `ACMPOUTPEN` writer - ACMPOUT pin enable control bit"] -pub type ACMPOUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ACMP0_ROUTEEN_SPEC, bool, O>; +pub type AcmpoutpenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - ACMPOUT pin enable control bit"] #[inline(always)] - pub fn acmpoutpen(&self) -> ACMPOUTPEN_R { - ACMPOUTPEN_R::new((self.bits & 1) != 0) + pub fn acmpoutpen(&self) -> AcmpoutpenR { + AcmpoutpenR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - ACMPOUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn acmpoutpen(&mut self) -> ACMPOUTPEN_W<0> { - ACMPOUTPEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn acmpoutpen(&mut self) -> AcmpoutpenW { + AcmpoutpenW::new(self, 0) } } -#[doc = "ACMP0 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [acmp0_routeen](index.html) module"] -pub struct ACMP0_ROUTEEN_SPEC; -impl crate::RegisterSpec for ACMP0_ROUTEEN_SPEC { +#[doc = "ACMP0 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`acmp0_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`acmp0_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Acmp0RouteenSpec; +impl crate::RegisterSpec for Acmp0RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [acmp0_routeen::R](R) reader structure"] -impl crate::Readable for ACMP0_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [acmp0_routeen::W](W) writer structure"] -impl crate::Writable for ACMP0_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`acmp0_routeen::R`](R) reader structure"] +impl crate::Readable for Acmp0RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`acmp0_routeen::W`](W) writer structure"] +impl crate::Writable for Acmp0RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ACMP0_ROUTEEN to value 0"] -impl crate::Resettable for ACMP0_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Acmp0RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/acmp1_acmpoutroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/acmp1_acmpoutroute.rs index 7182d45..28768d0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/acmp1_acmpoutroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/acmp1_acmpoutroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `ACMP1_ACMPOUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ACMP1_ACMPOUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ACMPOUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ACMPOUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ACMP1_ACMPOUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ACMPOUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ACMPOUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ACMP1_ACMPOUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ACMPOUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ACMPOUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ACMPOUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ACMPOUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ACMPOUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [acmp1_acmpoutroute](index.html) module"] -pub struct ACMP1_ACMPOUTROUTE_SPEC; -impl crate::RegisterSpec for ACMP1_ACMPOUTROUTE_SPEC { +#[doc = "ACMPOUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`acmp1_acmpoutroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`acmp1_acmpoutroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Acmp1AcmpoutrouteSpec; +impl crate::RegisterSpec for Acmp1AcmpoutrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [acmp1_acmpoutroute::R](R) reader structure"] -impl crate::Readable for ACMP1_ACMPOUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [acmp1_acmpoutroute::W](W) writer structure"] -impl crate::Writable for ACMP1_ACMPOUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`acmp1_acmpoutroute::R`](R) reader structure"] +impl crate::Readable for Acmp1AcmpoutrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`acmp1_acmpoutroute::W`](W) writer structure"] +impl crate::Writable for Acmp1AcmpoutrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ACMP1_ACMPOUTROUTE to value 0"] -impl crate::Resettable for ACMP1_ACMPOUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Acmp1AcmpoutrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/acmp1_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/acmp1_routeen.rs index 40ce031..7f05be6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/acmp1_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/acmp1_routeen.rs @@ -1,80 +1,40 @@ #[doc = "Register `ACMP1_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ACMP1_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ACMPOUTPEN` reader - ACMPOUT pin enable control bit"] -pub type ACMPOUTPEN_R = crate::BitReader; +pub type AcmpoutpenR = crate::BitReader; #[doc = "Field `ACMPOUTPEN` writer - ACMPOUT pin enable control bit"] -pub type ACMPOUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ACMP1_ROUTEEN_SPEC, bool, O>; +pub type AcmpoutpenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - ACMPOUT pin enable control bit"] #[inline(always)] - pub fn acmpoutpen(&self) -> ACMPOUTPEN_R { - ACMPOUTPEN_R::new((self.bits & 1) != 0) + pub fn acmpoutpen(&self) -> AcmpoutpenR { + AcmpoutpenR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - ACMPOUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn acmpoutpen(&mut self) -> ACMPOUTPEN_W<0> { - ACMPOUTPEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn acmpoutpen(&mut self) -> AcmpoutpenW { + AcmpoutpenW::new(self, 0) } } -#[doc = "ACMP1 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [acmp1_routeen](index.html) module"] -pub struct ACMP1_ROUTEEN_SPEC; -impl crate::RegisterSpec for ACMP1_ROUTEEN_SPEC { +#[doc = "ACMP1 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`acmp1_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`acmp1_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Acmp1RouteenSpec; +impl crate::RegisterSpec for Acmp1RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [acmp1_routeen::R](R) reader structure"] -impl crate::Readable for ACMP1_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [acmp1_routeen::W](W) writer structure"] -impl crate::Writable for ACMP1_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`acmp1_routeen::R`](R) reader structure"] +impl crate::Readable for Acmp1RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`acmp1_routeen::W`](W) writer structure"] +impl crate::Writable for Acmp1RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ACMP1_ROUTEEN to value 0"] -impl crate::Resettable for ACMP1_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Acmp1RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/bbusalloc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/bbusalloc.rs index 0202ccc..1125158 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/bbusalloc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/bbusalloc.rs @@ -1,475 +1,465 @@ #[doc = "Register `BBUSALLOC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `BBUSALLOC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BEVEN0` reader - B Bus Even 0"] -pub type BEVEN0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "B Bus Even 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BEVEN0_A { +pub enum Beven0 { #[doc = "0: The bus is not allocated"] - TRISTATE = 0, + Tristate = 0, #[doc = "1: The bus is allocated to ADC0"] - ADC0 = 1, + Adc0 = 1, #[doc = "2: The bus is allocated to ACMP0"] - ACMP0 = 2, + Acmp0 = 2, #[doc = "3: The bus is allocated to ACMP1"] - ACMP1 = 3, + Acmp1 = 3, #[doc = "4: The bus is allocated to VDAC0 CH0"] - VDAC0CH0 = 4, + Vdac0ch0 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BEVEN0_A) -> Self { + fn from(variant: Beven0) -> Self { variant as _ } } -impl BEVEN0_R { +impl crate::FieldSpec for Beven0 { + type Ux = u8; +} +impl crate::IsEnum for Beven0 {} +#[doc = "Field `BEVEN0` reader - B Bus Even 0"] +pub type Beven0R = crate::FieldReader; +impl Beven0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BEVEN0_A::TRISTATE), - 1 => Some(BEVEN0_A::ADC0), - 2 => Some(BEVEN0_A::ACMP0), - 3 => Some(BEVEN0_A::ACMP1), - 4 => Some(BEVEN0_A::VDAC0CH0), + 0 => Some(Beven0::Tristate), + 1 => Some(Beven0::Adc0), + 2 => Some(Beven0::Acmp0), + 3 => Some(Beven0::Acmp1), + 4 => Some(Beven0::Vdac0ch0), _ => None, } } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "The bus is not allocated"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == BEVEN0_A::TRISTATE + *self == Beven0::Tristate } - #[doc = "Checks if the value of the field is `ADC0`"] + #[doc = "The bus is allocated to ADC0"] #[inline(always)] pub fn is_adc0(&self) -> bool { - *self == BEVEN0_A::ADC0 + *self == Beven0::Adc0 } - #[doc = "Checks if the value of the field is `ACMP0`"] + #[doc = "The bus is allocated to ACMP0"] #[inline(always)] pub fn is_acmp0(&self) -> bool { - *self == BEVEN0_A::ACMP0 + *self == Beven0::Acmp0 } - #[doc = "Checks if the value of the field is `ACMP1`"] + #[doc = "The bus is allocated to ACMP1"] #[inline(always)] pub fn is_acmp1(&self) -> bool { - *self == BEVEN0_A::ACMP1 + *self == Beven0::Acmp1 } - #[doc = "Checks if the value of the field is `VDAC0CH0`"] + #[doc = "The bus is allocated to VDAC0 CH0"] #[inline(always)] pub fn is_vdac0ch0(&self) -> bool { - *self == BEVEN0_A::VDAC0CH0 + *self == Beven0::Vdac0ch0 } } #[doc = "Field `BEVEN0` writer - B Bus Even 0"] -pub type BEVEN0_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, BBUSALLOC_SPEC, u8, BEVEN0_A, 4, O>; -impl<'a, const O: u8> BEVEN0_W<'a, O> { +pub type Beven0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Beven0>; +impl<'a, REG> Beven0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The bus is not allocated"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(BEVEN0_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Beven0::Tristate) } #[doc = "The bus is allocated to ADC0"] #[inline(always)] - pub fn adc0(self) -> &'a mut W { - self.variant(BEVEN0_A::ADC0) + pub fn adc0(self) -> &'a mut crate::W { + self.variant(Beven0::Adc0) } #[doc = "The bus is allocated to ACMP0"] #[inline(always)] - pub fn acmp0(self) -> &'a mut W { - self.variant(BEVEN0_A::ACMP0) + pub fn acmp0(self) -> &'a mut crate::W { + self.variant(Beven0::Acmp0) } #[doc = "The bus is allocated to ACMP1"] #[inline(always)] - pub fn acmp1(self) -> &'a mut W { - self.variant(BEVEN0_A::ACMP1) + pub fn acmp1(self) -> &'a mut crate::W { + self.variant(Beven0::Acmp1) } #[doc = "The bus is allocated to VDAC0 CH0"] #[inline(always)] - pub fn vdac0ch0(self) -> &'a mut W { - self.variant(BEVEN0_A::VDAC0CH0) + pub fn vdac0ch0(self) -> &'a mut crate::W { + self.variant(Beven0::Vdac0ch0) } } -#[doc = "Field `BEVEN1` reader - B Bus Even 1"] -pub type BEVEN1_R = crate::FieldReader; #[doc = "B Bus Even 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BEVEN1_A { +pub enum Beven1 { #[doc = "0: The bus is not allocated"] - TRISTATE = 0, + Tristate = 0, #[doc = "1: The bus is allocated to ADC0"] - ADC0 = 1, + Adc0 = 1, #[doc = "2: The bus is allocated to ACMP0"] - ACMP0 = 2, + Acmp0 = 2, #[doc = "3: The bus is allocated to ACMP1"] - ACMP1 = 3, + Acmp1 = 3, #[doc = "4: The bus is allocated to VDAC0 CH1"] - VDAC0CH1 = 4, + Vdac0ch1 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BEVEN1_A) -> Self { + fn from(variant: Beven1) -> Self { variant as _ } } -impl BEVEN1_R { +impl crate::FieldSpec for Beven1 { + type Ux = u8; +} +impl crate::IsEnum for Beven1 {} +#[doc = "Field `BEVEN1` reader - B Bus Even 1"] +pub type Beven1R = crate::FieldReader; +impl Beven1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BEVEN1_A::TRISTATE), - 1 => Some(BEVEN1_A::ADC0), - 2 => Some(BEVEN1_A::ACMP0), - 3 => Some(BEVEN1_A::ACMP1), - 4 => Some(BEVEN1_A::VDAC0CH1), + 0 => Some(Beven1::Tristate), + 1 => Some(Beven1::Adc0), + 2 => Some(Beven1::Acmp0), + 3 => Some(Beven1::Acmp1), + 4 => Some(Beven1::Vdac0ch1), _ => None, } } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "The bus is not allocated"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == BEVEN1_A::TRISTATE + *self == Beven1::Tristate } - #[doc = "Checks if the value of the field is `ADC0`"] + #[doc = "The bus is allocated to ADC0"] #[inline(always)] pub fn is_adc0(&self) -> bool { - *self == BEVEN1_A::ADC0 + *self == Beven1::Adc0 } - #[doc = "Checks if the value of the field is `ACMP0`"] + #[doc = "The bus is allocated to ACMP0"] #[inline(always)] pub fn is_acmp0(&self) -> bool { - *self == BEVEN1_A::ACMP0 + *self == Beven1::Acmp0 } - #[doc = "Checks if the value of the field is `ACMP1`"] + #[doc = "The bus is allocated to ACMP1"] #[inline(always)] pub fn is_acmp1(&self) -> bool { - *self == BEVEN1_A::ACMP1 + *self == Beven1::Acmp1 } - #[doc = "Checks if the value of the field is `VDAC0CH1`"] + #[doc = "The bus is allocated to VDAC0 CH1"] #[inline(always)] pub fn is_vdac0ch1(&self) -> bool { - *self == BEVEN1_A::VDAC0CH1 + *self == Beven1::Vdac0ch1 } } #[doc = "Field `BEVEN1` writer - B Bus Even 1"] -pub type BEVEN1_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, BBUSALLOC_SPEC, u8, BEVEN1_A, 4, O>; -impl<'a, const O: u8> BEVEN1_W<'a, O> { +pub type Beven1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Beven1>; +impl<'a, REG> Beven1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The bus is not allocated"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(BEVEN1_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Beven1::Tristate) } #[doc = "The bus is allocated to ADC0"] #[inline(always)] - pub fn adc0(self) -> &'a mut W { - self.variant(BEVEN1_A::ADC0) + pub fn adc0(self) -> &'a mut crate::W { + self.variant(Beven1::Adc0) } #[doc = "The bus is allocated to ACMP0"] #[inline(always)] - pub fn acmp0(self) -> &'a mut W { - self.variant(BEVEN1_A::ACMP0) + pub fn acmp0(self) -> &'a mut crate::W { + self.variant(Beven1::Acmp0) } #[doc = "The bus is allocated to ACMP1"] #[inline(always)] - pub fn acmp1(self) -> &'a mut W { - self.variant(BEVEN1_A::ACMP1) + pub fn acmp1(self) -> &'a mut crate::W { + self.variant(Beven1::Acmp1) } #[doc = "The bus is allocated to VDAC0 CH1"] #[inline(always)] - pub fn vdac0ch1(self) -> &'a mut W { - self.variant(BEVEN1_A::VDAC0CH1) + pub fn vdac0ch1(self) -> &'a mut crate::W { + self.variant(Beven1::Vdac0ch1) } } -#[doc = "Field `BODD0` reader - B Bus Odd 0"] -pub type BODD0_R = crate::FieldReader; #[doc = "B Bus Odd 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BODD0_A { +pub enum Bodd0 { #[doc = "0: The bus is not allocated"] - TRISTATE = 0, + Tristate = 0, #[doc = "1: The bus is allocated to ADC0"] - ADC0 = 1, + Adc0 = 1, #[doc = "2: The bus is allocated to ACMP0"] - ACMP0 = 2, + Acmp0 = 2, #[doc = "3: The bus is allocated to ACMP1"] - ACMP1 = 3, + Acmp1 = 3, #[doc = "4: The bus is allocated to VDAC0 CH0"] - VDAC0CH0 = 4, + Vdac0ch0 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BODD0_A) -> Self { + fn from(variant: Bodd0) -> Self { variant as _ } } -impl BODD0_R { +impl crate::FieldSpec for Bodd0 { + type Ux = u8; +} +impl crate::IsEnum for Bodd0 {} +#[doc = "Field `BODD0` reader - B Bus Odd 0"] +pub type Bodd0R = crate::FieldReader; +impl Bodd0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BODD0_A::TRISTATE), - 1 => Some(BODD0_A::ADC0), - 2 => Some(BODD0_A::ACMP0), - 3 => Some(BODD0_A::ACMP1), - 4 => Some(BODD0_A::VDAC0CH0), + 0 => Some(Bodd0::Tristate), + 1 => Some(Bodd0::Adc0), + 2 => Some(Bodd0::Acmp0), + 3 => Some(Bodd0::Acmp1), + 4 => Some(Bodd0::Vdac0ch0), _ => None, } } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "The bus is not allocated"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == BODD0_A::TRISTATE + *self == Bodd0::Tristate } - #[doc = "Checks if the value of the field is `ADC0`"] + #[doc = "The bus is allocated to ADC0"] #[inline(always)] pub fn is_adc0(&self) -> bool { - *self == BODD0_A::ADC0 + *self == Bodd0::Adc0 } - #[doc = "Checks if the value of the field is `ACMP0`"] + #[doc = "The bus is allocated to ACMP0"] #[inline(always)] pub fn is_acmp0(&self) -> bool { - *self == BODD0_A::ACMP0 + *self == Bodd0::Acmp0 } - #[doc = "Checks if the value of the field is `ACMP1`"] + #[doc = "The bus is allocated to ACMP1"] #[inline(always)] pub fn is_acmp1(&self) -> bool { - *self == BODD0_A::ACMP1 + *self == Bodd0::Acmp1 } - #[doc = "Checks if the value of the field is `VDAC0CH0`"] + #[doc = "The bus is allocated to VDAC0 CH0"] #[inline(always)] pub fn is_vdac0ch0(&self) -> bool { - *self == BODD0_A::VDAC0CH0 + *self == Bodd0::Vdac0ch0 } } #[doc = "Field `BODD0` writer - B Bus Odd 0"] -pub type BODD0_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BBUSALLOC_SPEC, u8, BODD0_A, 4, O>; -impl<'a, const O: u8> BODD0_W<'a, O> { +pub type Bodd0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Bodd0>; +impl<'a, REG> Bodd0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The bus is not allocated"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(BODD0_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Bodd0::Tristate) } #[doc = "The bus is allocated to ADC0"] #[inline(always)] - pub fn adc0(self) -> &'a mut W { - self.variant(BODD0_A::ADC0) + pub fn adc0(self) -> &'a mut crate::W { + self.variant(Bodd0::Adc0) } #[doc = "The bus is allocated to ACMP0"] #[inline(always)] - pub fn acmp0(self) -> &'a mut W { - self.variant(BODD0_A::ACMP0) + pub fn acmp0(self) -> &'a mut crate::W { + self.variant(Bodd0::Acmp0) } #[doc = "The bus is allocated to ACMP1"] #[inline(always)] - pub fn acmp1(self) -> &'a mut W { - self.variant(BODD0_A::ACMP1) + pub fn acmp1(self) -> &'a mut crate::W { + self.variant(Bodd0::Acmp1) } #[doc = "The bus is allocated to VDAC0 CH0"] #[inline(always)] - pub fn vdac0ch0(self) -> &'a mut W { - self.variant(BODD0_A::VDAC0CH0) + pub fn vdac0ch0(self) -> &'a mut crate::W { + self.variant(Bodd0::Vdac0ch0) } } -#[doc = "Field `BODD1` reader - B Bus Odd 1"] -pub type BODD1_R = crate::FieldReader; #[doc = "B Bus Odd 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BODD1_A { +pub enum Bodd1 { #[doc = "0: The bus is not allocated"] - TRISTATE = 0, + Tristate = 0, #[doc = "1: The bus is allocated to ADC0"] - ADC0 = 1, + Adc0 = 1, #[doc = "2: The bus is allocated to ACMP0"] - ACMP0 = 2, + Acmp0 = 2, #[doc = "3: The bus is allocated to ACMP1"] - ACMP1 = 3, + Acmp1 = 3, #[doc = "4: The bus is allocated to VDAC0 CH1"] - VDAC0CH1 = 4, + Vdac0ch1 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BODD1_A) -> Self { + fn from(variant: Bodd1) -> Self { variant as _ } } -impl BODD1_R { +impl crate::FieldSpec for Bodd1 { + type Ux = u8; +} +impl crate::IsEnum for Bodd1 {} +#[doc = "Field `BODD1` reader - B Bus Odd 1"] +pub type Bodd1R = crate::FieldReader; +impl Bodd1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BODD1_A::TRISTATE), - 1 => Some(BODD1_A::ADC0), - 2 => Some(BODD1_A::ACMP0), - 3 => Some(BODD1_A::ACMP1), - 4 => Some(BODD1_A::VDAC0CH1), + 0 => Some(Bodd1::Tristate), + 1 => Some(Bodd1::Adc0), + 2 => Some(Bodd1::Acmp0), + 3 => Some(Bodd1::Acmp1), + 4 => Some(Bodd1::Vdac0ch1), _ => None, } } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "The bus is not allocated"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == BODD1_A::TRISTATE + *self == Bodd1::Tristate } - #[doc = "Checks if the value of the field is `ADC0`"] + #[doc = "The bus is allocated to ADC0"] #[inline(always)] pub fn is_adc0(&self) -> bool { - *self == BODD1_A::ADC0 + *self == Bodd1::Adc0 } - #[doc = "Checks if the value of the field is `ACMP0`"] + #[doc = "The bus is allocated to ACMP0"] #[inline(always)] pub fn is_acmp0(&self) -> bool { - *self == BODD1_A::ACMP0 + *self == Bodd1::Acmp0 } - #[doc = "Checks if the value of the field is `ACMP1`"] + #[doc = "The bus is allocated to ACMP1"] #[inline(always)] pub fn is_acmp1(&self) -> bool { - *self == BODD1_A::ACMP1 + *self == Bodd1::Acmp1 } - #[doc = "Checks if the value of the field is `VDAC0CH1`"] + #[doc = "The bus is allocated to VDAC0 CH1"] #[inline(always)] pub fn is_vdac0ch1(&self) -> bool { - *self == BODD1_A::VDAC0CH1 + *self == Bodd1::Vdac0ch1 } } #[doc = "Field `BODD1` writer - B Bus Odd 1"] -pub type BODD1_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BBUSALLOC_SPEC, u8, BODD1_A, 4, O>; -impl<'a, const O: u8> BODD1_W<'a, O> { +pub type Bodd1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Bodd1>; +impl<'a, REG> Bodd1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The bus is not allocated"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(BODD1_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Bodd1::Tristate) } #[doc = "The bus is allocated to ADC0"] #[inline(always)] - pub fn adc0(self) -> &'a mut W { - self.variant(BODD1_A::ADC0) + pub fn adc0(self) -> &'a mut crate::W { + self.variant(Bodd1::Adc0) } #[doc = "The bus is allocated to ACMP0"] #[inline(always)] - pub fn acmp0(self) -> &'a mut W { - self.variant(BODD1_A::ACMP0) + pub fn acmp0(self) -> &'a mut crate::W { + self.variant(Bodd1::Acmp0) } #[doc = "The bus is allocated to ACMP1"] #[inline(always)] - pub fn acmp1(self) -> &'a mut W { - self.variant(BODD1_A::ACMP1) + pub fn acmp1(self) -> &'a mut crate::W { + self.variant(Bodd1::Acmp1) } #[doc = "The bus is allocated to VDAC0 CH1"] #[inline(always)] - pub fn vdac0ch1(self) -> &'a mut W { - self.variant(BODD1_A::VDAC0CH1) + pub fn vdac0ch1(self) -> &'a mut crate::W { + self.variant(Bodd1::Vdac0ch1) } } impl R { #[doc = "Bits 0:3 - B Bus Even 0"] #[inline(always)] - pub fn beven0(&self) -> BEVEN0_R { - BEVEN0_R::new((self.bits & 0x0f) as u8) + pub fn beven0(&self) -> Beven0R { + Beven0R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:11 - B Bus Even 1"] #[inline(always)] - pub fn beven1(&self) -> BEVEN1_R { - BEVEN1_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn beven1(&self) -> Beven1R { + Beven1R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 16:19 - B Bus Odd 0"] #[inline(always)] - pub fn bodd0(&self) -> BODD0_R { - BODD0_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn bodd0(&self) -> Bodd0R { + Bodd0R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - B Bus Odd 1"] #[inline(always)] - pub fn bodd1(&self) -> BODD1_R { - BODD1_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn bodd1(&self) -> Bodd1R { + Bodd1R::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - B Bus Even 0"] #[inline(always)] #[must_use] - pub fn beven0(&mut self) -> BEVEN0_W<0> { - BEVEN0_W::new(self) + pub fn beven0(&mut self) -> Beven0W { + Beven0W::new(self, 0) } #[doc = "Bits 8:11 - B Bus Even 1"] #[inline(always)] #[must_use] - pub fn beven1(&mut self) -> BEVEN1_W<8> { - BEVEN1_W::new(self) + pub fn beven1(&mut self) -> Beven1W { + Beven1W::new(self, 8) } #[doc = "Bits 16:19 - B Bus Odd 0"] #[inline(always)] #[must_use] - pub fn bodd0(&mut self) -> BODD0_W<16> { - BODD0_W::new(self) + pub fn bodd0(&mut self) -> Bodd0W { + Bodd0W::new(self, 16) } #[doc = "Bits 24:27 - B Bus Odd 1"] #[inline(always)] #[must_use] - pub fn bodd1(&mut self) -> BODD1_W<24> { - BODD1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn bodd1(&mut self) -> Bodd1W { + Bodd1W::new(self, 24) } } -#[doc = "B Bus allocation\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bbusalloc](index.html) module"] -pub struct BBUSALLOC_SPEC; -impl crate::RegisterSpec for BBUSALLOC_SPEC { +#[doc = "B Bus allocation\n\nYou can [`read`](crate::Reg::read) this register and get [`bbusalloc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bbusalloc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct BbusallocSpec; +impl crate::RegisterSpec for BbusallocSpec { type Ux = u32; } -#[doc = "`read()` method returns [bbusalloc::R](R) reader structure"] -impl crate::Readable for BBUSALLOC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [bbusalloc::W](W) writer structure"] -impl crate::Writable for BBUSALLOC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`bbusalloc::R`](R) reader structure"] +impl crate::Readable for BbusallocSpec {} +#[doc = "`write(|w| ..)` method takes [`bbusalloc::W`](W) writer structure"] +impl crate::Writable for BbusallocSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BBUSALLOC to value 0"] -impl crate::Resettable for BBUSALLOC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for BbusallocSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/cdbusalloc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/cdbusalloc.rs index 85ab065..4a42995 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/cdbusalloc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/cdbusalloc.rs @@ -1,477 +1,465 @@ #[doc = "Register `CDBUSALLOC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CDBUSALLOC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CDEVEN0` reader - CD Bus Even 0"] -pub type CDEVEN0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CD Bus Even 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CDEVEN0_A { +pub enum Cdeven0 { #[doc = "0: The bus is not allocated"] - TRISTATE = 0, + Tristate = 0, #[doc = "1: The bus is allocated to ADC0"] - ADC0 = 1, + Adc0 = 1, #[doc = "2: The bus is allocated to ACMP0"] - ACMP0 = 2, + Acmp0 = 2, #[doc = "3: The bus is allocated to ACMP1"] - ACMP1 = 3, + Acmp1 = 3, #[doc = "4: The bus is allocated to VDAC0 CH0"] - VDAC0CH0 = 4, + Vdac0ch0 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CDEVEN0_A) -> Self { + fn from(variant: Cdeven0) -> Self { variant as _ } } -impl CDEVEN0_R { +impl crate::FieldSpec for Cdeven0 { + type Ux = u8; +} +impl crate::IsEnum for Cdeven0 {} +#[doc = "Field `CDEVEN0` reader - CD Bus Even 0"] +pub type Cdeven0R = crate::FieldReader; +impl Cdeven0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CDEVEN0_A::TRISTATE), - 1 => Some(CDEVEN0_A::ADC0), - 2 => Some(CDEVEN0_A::ACMP0), - 3 => Some(CDEVEN0_A::ACMP1), - 4 => Some(CDEVEN0_A::VDAC0CH0), + 0 => Some(Cdeven0::Tristate), + 1 => Some(Cdeven0::Adc0), + 2 => Some(Cdeven0::Acmp0), + 3 => Some(Cdeven0::Acmp1), + 4 => Some(Cdeven0::Vdac0ch0), _ => None, } } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "The bus is not allocated"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == CDEVEN0_A::TRISTATE + *self == Cdeven0::Tristate } - #[doc = "Checks if the value of the field is `ADC0`"] + #[doc = "The bus is allocated to ADC0"] #[inline(always)] pub fn is_adc0(&self) -> bool { - *self == CDEVEN0_A::ADC0 + *self == Cdeven0::Adc0 } - #[doc = "Checks if the value of the field is `ACMP0`"] + #[doc = "The bus is allocated to ACMP0"] #[inline(always)] pub fn is_acmp0(&self) -> bool { - *self == CDEVEN0_A::ACMP0 + *self == Cdeven0::Acmp0 } - #[doc = "Checks if the value of the field is `ACMP1`"] + #[doc = "The bus is allocated to ACMP1"] #[inline(always)] pub fn is_acmp1(&self) -> bool { - *self == CDEVEN0_A::ACMP1 + *self == Cdeven0::Acmp1 } - #[doc = "Checks if the value of the field is `VDAC0CH0`"] + #[doc = "The bus is allocated to VDAC0 CH0"] #[inline(always)] pub fn is_vdac0ch0(&self) -> bool { - *self == CDEVEN0_A::VDAC0CH0 + *self == Cdeven0::Vdac0ch0 } } #[doc = "Field `CDEVEN0` writer - CD Bus Even 0"] -pub type CDEVEN0_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CDBUSALLOC_SPEC, u8, CDEVEN0_A, 4, O>; -impl<'a, const O: u8> CDEVEN0_W<'a, O> { +pub type Cdeven0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Cdeven0>; +impl<'a, REG> Cdeven0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The bus is not allocated"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(CDEVEN0_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Cdeven0::Tristate) } #[doc = "The bus is allocated to ADC0"] #[inline(always)] - pub fn adc0(self) -> &'a mut W { - self.variant(CDEVEN0_A::ADC0) + pub fn adc0(self) -> &'a mut crate::W { + self.variant(Cdeven0::Adc0) } #[doc = "The bus is allocated to ACMP0"] #[inline(always)] - pub fn acmp0(self) -> &'a mut W { - self.variant(CDEVEN0_A::ACMP0) + pub fn acmp0(self) -> &'a mut crate::W { + self.variant(Cdeven0::Acmp0) } #[doc = "The bus is allocated to ACMP1"] #[inline(always)] - pub fn acmp1(self) -> &'a mut W { - self.variant(CDEVEN0_A::ACMP1) + pub fn acmp1(self) -> &'a mut crate::W { + self.variant(Cdeven0::Acmp1) } #[doc = "The bus is allocated to VDAC0 CH0"] #[inline(always)] - pub fn vdac0ch0(self) -> &'a mut W { - self.variant(CDEVEN0_A::VDAC0CH0) + pub fn vdac0ch0(self) -> &'a mut crate::W { + self.variant(Cdeven0::Vdac0ch0) } } -#[doc = "Field `CDEVEN1` reader - CD Bus Even 1"] -pub type CDEVEN1_R = crate::FieldReader; #[doc = "CD Bus Even 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CDEVEN1_A { +pub enum Cdeven1 { #[doc = "0: The bus is not allocated"] - TRISTATE = 0, + Tristate = 0, #[doc = "1: The bus is allocated to ADC0"] - ADC0 = 1, + Adc0 = 1, #[doc = "2: The bus is allocated to ACMP0"] - ACMP0 = 2, + Acmp0 = 2, #[doc = "3: The bus is allocated to ACMP1"] - ACMP1 = 3, + Acmp1 = 3, #[doc = "4: The bus is allocated to VDAC0 CH1"] - VDAC0CH1 = 4, + Vdac0ch1 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CDEVEN1_A) -> Self { + fn from(variant: Cdeven1) -> Self { variant as _ } } -impl CDEVEN1_R { +impl crate::FieldSpec for Cdeven1 { + type Ux = u8; +} +impl crate::IsEnum for Cdeven1 {} +#[doc = "Field `CDEVEN1` reader - CD Bus Even 1"] +pub type Cdeven1R = crate::FieldReader; +impl Cdeven1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CDEVEN1_A::TRISTATE), - 1 => Some(CDEVEN1_A::ADC0), - 2 => Some(CDEVEN1_A::ACMP0), - 3 => Some(CDEVEN1_A::ACMP1), - 4 => Some(CDEVEN1_A::VDAC0CH1), + 0 => Some(Cdeven1::Tristate), + 1 => Some(Cdeven1::Adc0), + 2 => Some(Cdeven1::Acmp0), + 3 => Some(Cdeven1::Acmp1), + 4 => Some(Cdeven1::Vdac0ch1), _ => None, } } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "The bus is not allocated"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == CDEVEN1_A::TRISTATE + *self == Cdeven1::Tristate } - #[doc = "Checks if the value of the field is `ADC0`"] + #[doc = "The bus is allocated to ADC0"] #[inline(always)] pub fn is_adc0(&self) -> bool { - *self == CDEVEN1_A::ADC0 + *self == Cdeven1::Adc0 } - #[doc = "Checks if the value of the field is `ACMP0`"] + #[doc = "The bus is allocated to ACMP0"] #[inline(always)] pub fn is_acmp0(&self) -> bool { - *self == CDEVEN1_A::ACMP0 + *self == Cdeven1::Acmp0 } - #[doc = "Checks if the value of the field is `ACMP1`"] + #[doc = "The bus is allocated to ACMP1"] #[inline(always)] pub fn is_acmp1(&self) -> bool { - *self == CDEVEN1_A::ACMP1 + *self == Cdeven1::Acmp1 } - #[doc = "Checks if the value of the field is `VDAC0CH1`"] + #[doc = "The bus is allocated to VDAC0 CH1"] #[inline(always)] pub fn is_vdac0ch1(&self) -> bool { - *self == CDEVEN1_A::VDAC0CH1 + *self == Cdeven1::Vdac0ch1 } } #[doc = "Field `CDEVEN1` writer - CD Bus Even 1"] -pub type CDEVEN1_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CDBUSALLOC_SPEC, u8, CDEVEN1_A, 4, O>; -impl<'a, const O: u8> CDEVEN1_W<'a, O> { +pub type Cdeven1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Cdeven1>; +impl<'a, REG> Cdeven1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The bus is not allocated"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(CDEVEN1_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Cdeven1::Tristate) } #[doc = "The bus is allocated to ADC0"] #[inline(always)] - pub fn adc0(self) -> &'a mut W { - self.variant(CDEVEN1_A::ADC0) + pub fn adc0(self) -> &'a mut crate::W { + self.variant(Cdeven1::Adc0) } #[doc = "The bus is allocated to ACMP0"] #[inline(always)] - pub fn acmp0(self) -> &'a mut W { - self.variant(CDEVEN1_A::ACMP0) + pub fn acmp0(self) -> &'a mut crate::W { + self.variant(Cdeven1::Acmp0) } #[doc = "The bus is allocated to ACMP1"] #[inline(always)] - pub fn acmp1(self) -> &'a mut W { - self.variant(CDEVEN1_A::ACMP1) + pub fn acmp1(self) -> &'a mut crate::W { + self.variant(Cdeven1::Acmp1) } #[doc = "The bus is allocated to VDAC0 CH1"] #[inline(always)] - pub fn vdac0ch1(self) -> &'a mut W { - self.variant(CDEVEN1_A::VDAC0CH1) + pub fn vdac0ch1(self) -> &'a mut crate::W { + self.variant(Cdeven1::Vdac0ch1) } } -#[doc = "Field `CDODD0` reader - CD Bus Odd 0"] -pub type CDODD0_R = crate::FieldReader; #[doc = "CD Bus Odd 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CDODD0_A { +pub enum Cdodd0 { #[doc = "0: The bus is not allocated"] - TRISTATE = 0, + Tristate = 0, #[doc = "1: The bus is allocated to ADC0"] - ADC0 = 1, + Adc0 = 1, #[doc = "2: The bus is allocated to ACMP0"] - ACMP0 = 2, + Acmp0 = 2, #[doc = "3: The bus is allocated to ACMP1"] - ACMP1 = 3, + Acmp1 = 3, #[doc = "4: The bus is allocated to VDAC0 CH0"] - VDAC0CH0 = 4, + Vdac0ch0 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CDODD0_A) -> Self { + fn from(variant: Cdodd0) -> Self { variant as _ } } -impl CDODD0_R { +impl crate::FieldSpec for Cdodd0 { + type Ux = u8; +} +impl crate::IsEnum for Cdodd0 {} +#[doc = "Field `CDODD0` reader - CD Bus Odd 0"] +pub type Cdodd0R = crate::FieldReader; +impl Cdodd0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CDODD0_A::TRISTATE), - 1 => Some(CDODD0_A::ADC0), - 2 => Some(CDODD0_A::ACMP0), - 3 => Some(CDODD0_A::ACMP1), - 4 => Some(CDODD0_A::VDAC0CH0), + 0 => Some(Cdodd0::Tristate), + 1 => Some(Cdodd0::Adc0), + 2 => Some(Cdodd0::Acmp0), + 3 => Some(Cdodd0::Acmp1), + 4 => Some(Cdodd0::Vdac0ch0), _ => None, } } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "The bus is not allocated"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == CDODD0_A::TRISTATE + *self == Cdodd0::Tristate } - #[doc = "Checks if the value of the field is `ADC0`"] + #[doc = "The bus is allocated to ADC0"] #[inline(always)] pub fn is_adc0(&self) -> bool { - *self == CDODD0_A::ADC0 + *self == Cdodd0::Adc0 } - #[doc = "Checks if the value of the field is `ACMP0`"] + #[doc = "The bus is allocated to ACMP0"] #[inline(always)] pub fn is_acmp0(&self) -> bool { - *self == CDODD0_A::ACMP0 + *self == Cdodd0::Acmp0 } - #[doc = "Checks if the value of the field is `ACMP1`"] + #[doc = "The bus is allocated to ACMP1"] #[inline(always)] pub fn is_acmp1(&self) -> bool { - *self == CDODD0_A::ACMP1 + *self == Cdodd0::Acmp1 } - #[doc = "Checks if the value of the field is `VDAC0CH0`"] + #[doc = "The bus is allocated to VDAC0 CH0"] #[inline(always)] pub fn is_vdac0ch0(&self) -> bool { - *self == CDODD0_A::VDAC0CH0 + *self == Cdodd0::Vdac0ch0 } } #[doc = "Field `CDODD0` writer - CD Bus Odd 0"] -pub type CDODD0_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CDBUSALLOC_SPEC, u8, CDODD0_A, 4, O>; -impl<'a, const O: u8> CDODD0_W<'a, O> { +pub type Cdodd0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Cdodd0>; +impl<'a, REG> Cdodd0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The bus is not allocated"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(CDODD0_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Cdodd0::Tristate) } #[doc = "The bus is allocated to ADC0"] #[inline(always)] - pub fn adc0(self) -> &'a mut W { - self.variant(CDODD0_A::ADC0) + pub fn adc0(self) -> &'a mut crate::W { + self.variant(Cdodd0::Adc0) } #[doc = "The bus is allocated to ACMP0"] #[inline(always)] - pub fn acmp0(self) -> &'a mut W { - self.variant(CDODD0_A::ACMP0) + pub fn acmp0(self) -> &'a mut crate::W { + self.variant(Cdodd0::Acmp0) } #[doc = "The bus is allocated to ACMP1"] #[inline(always)] - pub fn acmp1(self) -> &'a mut W { - self.variant(CDODD0_A::ACMP1) + pub fn acmp1(self) -> &'a mut crate::W { + self.variant(Cdodd0::Acmp1) } #[doc = "The bus is allocated to VDAC0 CH0"] #[inline(always)] - pub fn vdac0ch0(self) -> &'a mut W { - self.variant(CDODD0_A::VDAC0CH0) + pub fn vdac0ch0(self) -> &'a mut crate::W { + self.variant(Cdodd0::Vdac0ch0) } } -#[doc = "Field `CDODD1` reader - CD Bus Odd 1"] -pub type CDODD1_R = crate::FieldReader; #[doc = "CD Bus Odd 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CDODD1_A { +pub enum Cdodd1 { #[doc = "0: The bus is not allocated"] - TRISTATE = 0, + Tristate = 0, #[doc = "1: The bus is allocated to ADC0"] - ADC0 = 1, + Adc0 = 1, #[doc = "2: The bus is allocated to ACMP0"] - ACMP0 = 2, + Acmp0 = 2, #[doc = "3: The bus is allocated to ACMP1"] - ACMP1 = 3, + Acmp1 = 3, #[doc = "4: The bus is allocated to VDAC0 CH1"] - VDAC0CH1 = 4, + Vdac0ch1 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CDODD1_A) -> Self { + fn from(variant: Cdodd1) -> Self { variant as _ } } -impl CDODD1_R { +impl crate::FieldSpec for Cdodd1 { + type Ux = u8; +} +impl crate::IsEnum for Cdodd1 {} +#[doc = "Field `CDODD1` reader - CD Bus Odd 1"] +pub type Cdodd1R = crate::FieldReader; +impl Cdodd1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CDODD1_A::TRISTATE), - 1 => Some(CDODD1_A::ADC0), - 2 => Some(CDODD1_A::ACMP0), - 3 => Some(CDODD1_A::ACMP1), - 4 => Some(CDODD1_A::VDAC0CH1), + 0 => Some(Cdodd1::Tristate), + 1 => Some(Cdodd1::Adc0), + 2 => Some(Cdodd1::Acmp0), + 3 => Some(Cdodd1::Acmp1), + 4 => Some(Cdodd1::Vdac0ch1), _ => None, } } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "The bus is not allocated"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == CDODD1_A::TRISTATE + *self == Cdodd1::Tristate } - #[doc = "Checks if the value of the field is `ADC0`"] + #[doc = "The bus is allocated to ADC0"] #[inline(always)] pub fn is_adc0(&self) -> bool { - *self == CDODD1_A::ADC0 + *self == Cdodd1::Adc0 } - #[doc = "Checks if the value of the field is `ACMP0`"] + #[doc = "The bus is allocated to ACMP0"] #[inline(always)] pub fn is_acmp0(&self) -> bool { - *self == CDODD1_A::ACMP0 + *self == Cdodd1::Acmp0 } - #[doc = "Checks if the value of the field is `ACMP1`"] + #[doc = "The bus is allocated to ACMP1"] #[inline(always)] pub fn is_acmp1(&self) -> bool { - *self == CDODD1_A::ACMP1 + *self == Cdodd1::Acmp1 } - #[doc = "Checks if the value of the field is `VDAC0CH1`"] + #[doc = "The bus is allocated to VDAC0 CH1"] #[inline(always)] pub fn is_vdac0ch1(&self) -> bool { - *self == CDODD1_A::VDAC0CH1 + *self == Cdodd1::Vdac0ch1 } } #[doc = "Field `CDODD1` writer - CD Bus Odd 1"] -pub type CDODD1_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CDBUSALLOC_SPEC, u8, CDODD1_A, 4, O>; -impl<'a, const O: u8> CDODD1_W<'a, O> { +pub type Cdodd1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Cdodd1>; +impl<'a, REG> Cdodd1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The bus is not allocated"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(CDODD1_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Cdodd1::Tristate) } #[doc = "The bus is allocated to ADC0"] #[inline(always)] - pub fn adc0(self) -> &'a mut W { - self.variant(CDODD1_A::ADC0) + pub fn adc0(self) -> &'a mut crate::W { + self.variant(Cdodd1::Adc0) } #[doc = "The bus is allocated to ACMP0"] #[inline(always)] - pub fn acmp0(self) -> &'a mut W { - self.variant(CDODD1_A::ACMP0) + pub fn acmp0(self) -> &'a mut crate::W { + self.variant(Cdodd1::Acmp0) } #[doc = "The bus is allocated to ACMP1"] #[inline(always)] - pub fn acmp1(self) -> &'a mut W { - self.variant(CDODD1_A::ACMP1) + pub fn acmp1(self) -> &'a mut crate::W { + self.variant(Cdodd1::Acmp1) } #[doc = "The bus is allocated to VDAC0 CH1"] #[inline(always)] - pub fn vdac0ch1(self) -> &'a mut W { - self.variant(CDODD1_A::VDAC0CH1) + pub fn vdac0ch1(self) -> &'a mut crate::W { + self.variant(Cdodd1::Vdac0ch1) } } impl R { #[doc = "Bits 0:3 - CD Bus Even 0"] #[inline(always)] - pub fn cdeven0(&self) -> CDEVEN0_R { - CDEVEN0_R::new((self.bits & 0x0f) as u8) + pub fn cdeven0(&self) -> Cdeven0R { + Cdeven0R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:11 - CD Bus Even 1"] #[inline(always)] - pub fn cdeven1(&self) -> CDEVEN1_R { - CDEVEN1_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn cdeven1(&self) -> Cdeven1R { + Cdeven1R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 16:19 - CD Bus Odd 0"] #[inline(always)] - pub fn cdodd0(&self) -> CDODD0_R { - CDODD0_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn cdodd0(&self) -> Cdodd0R { + Cdodd0R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - CD Bus Odd 1"] #[inline(always)] - pub fn cdodd1(&self) -> CDODD1_R { - CDODD1_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn cdodd1(&self) -> Cdodd1R { + Cdodd1R::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - CD Bus Even 0"] #[inline(always)] #[must_use] - pub fn cdeven0(&mut self) -> CDEVEN0_W<0> { - CDEVEN0_W::new(self) + pub fn cdeven0(&mut self) -> Cdeven0W { + Cdeven0W::new(self, 0) } #[doc = "Bits 8:11 - CD Bus Even 1"] #[inline(always)] #[must_use] - pub fn cdeven1(&mut self) -> CDEVEN1_W<8> { - CDEVEN1_W::new(self) + pub fn cdeven1(&mut self) -> Cdeven1W { + Cdeven1W::new(self, 8) } #[doc = "Bits 16:19 - CD Bus Odd 0"] #[inline(always)] #[must_use] - pub fn cdodd0(&mut self) -> CDODD0_W<16> { - CDODD0_W::new(self) + pub fn cdodd0(&mut self) -> Cdodd0W { + Cdodd0W::new(self, 16) } #[doc = "Bits 24:27 - CD Bus Odd 1"] #[inline(always)] #[must_use] - pub fn cdodd1(&mut self) -> CDODD1_W<24> { - CDODD1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cdodd1(&mut self) -> Cdodd1W { + Cdodd1W::new(self, 24) } } -#[doc = "CD Bus allocation\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cdbusalloc](index.html) module"] -pub struct CDBUSALLOC_SPEC; -impl crate::RegisterSpec for CDBUSALLOC_SPEC { +#[doc = "CD Bus allocation\n\nYou can [`read`](crate::Reg::read) this register and get [`cdbusalloc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cdbusalloc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CdbusallocSpec; +impl crate::RegisterSpec for CdbusallocSpec { type Ux = u32; } -#[doc = "`read()` method returns [cdbusalloc::R](R) reader structure"] -impl crate::Readable for CDBUSALLOC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cdbusalloc::W](W) writer structure"] -impl crate::Writable for CDBUSALLOC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cdbusalloc::R`](R) reader structure"] +impl crate::Readable for CdbusallocSpec {} +#[doc = "`write(|w| ..)` method takes [`cdbusalloc::W`](W) writer structure"] +impl crate::Writable for CdbusallocSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CDBUSALLOC to value 0"] -impl crate::Resettable for CDBUSALLOC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CdbusallocSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/cmu_clkin0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/cmu_clkin0route.rs index 2a5875c..25125f6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/cmu_clkin0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/cmu_clkin0route.rs @@ -1,95 +1,55 @@ #[doc = "Register `CMU_CLKIN0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CMU_CLKIN0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CLKIN0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CLKIN0 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CMU_CLKIN0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CLKIN0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CLKIN0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CMU_CLKIN0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CLKIN0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CLKIN0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CLKIN0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CLKIN0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CLKIN0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmu_clkin0route](index.html) module"] -pub struct CMU_CLKIN0ROUTE_SPEC; -impl crate::RegisterSpec for CMU_CLKIN0ROUTE_SPEC { +#[doc = "CLKIN0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`cmu_clkin0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmu_clkin0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmuClkin0routeSpec; +impl crate::RegisterSpec for CmuClkin0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [cmu_clkin0route::R](R) reader structure"] -impl crate::Readable for CMU_CLKIN0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cmu_clkin0route::W](W) writer structure"] -impl crate::Writable for CMU_CLKIN0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cmu_clkin0route::R`](R) reader structure"] +impl crate::Readable for CmuClkin0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`cmu_clkin0route::W`](W) writer structure"] +impl crate::Writable for CmuClkin0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMU_CLKIN0ROUTE to value 0"] -impl crate::Resettable for CMU_CLKIN0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmuClkin0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/cmu_clkout0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/cmu_clkout0route.rs index c89f007..3e23c18 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/cmu_clkout0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/cmu_clkout0route.rs @@ -1,95 +1,55 @@ #[doc = "Register `CMU_CLKOUT0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CMU_CLKOUT0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CLKOUT0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CLKOUT0 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CMU_CLKOUT0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CLKOUT0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CLKOUT0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CMU_CLKOUT0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CLKOUT0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CLKOUT0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CLKOUT0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CLKOUT0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CLKOUT0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmu_clkout0route](index.html) module"] -pub struct CMU_CLKOUT0ROUTE_SPEC; -impl crate::RegisterSpec for CMU_CLKOUT0ROUTE_SPEC { +#[doc = "CLKOUT0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`cmu_clkout0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmu_clkout0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmuClkout0routeSpec; +impl crate::RegisterSpec for CmuClkout0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [cmu_clkout0route::R](R) reader structure"] -impl crate::Readable for CMU_CLKOUT0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cmu_clkout0route::W](W) writer structure"] -impl crate::Writable for CMU_CLKOUT0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cmu_clkout0route::R`](R) reader structure"] +impl crate::Readable for CmuClkout0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`cmu_clkout0route::W`](W) writer structure"] +impl crate::Writable for CmuClkout0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMU_CLKOUT0ROUTE to value 0"] -impl crate::Resettable for CMU_CLKOUT0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmuClkout0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/cmu_clkout1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/cmu_clkout1route.rs index 21f3a2d..0f1684f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/cmu_clkout1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/cmu_clkout1route.rs @@ -1,95 +1,55 @@ #[doc = "Register `CMU_CLKOUT1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CMU_CLKOUT1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CLKOUT1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CLKOUT1 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CMU_CLKOUT1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CLKOUT1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CLKOUT1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CMU_CLKOUT1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CLKOUT1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CLKOUT1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CLKOUT1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CLKOUT1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CLKOUT1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmu_clkout1route](index.html) module"] -pub struct CMU_CLKOUT1ROUTE_SPEC; -impl crate::RegisterSpec for CMU_CLKOUT1ROUTE_SPEC { +#[doc = "CLKOUT1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`cmu_clkout1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmu_clkout1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmuClkout1routeSpec; +impl crate::RegisterSpec for CmuClkout1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [cmu_clkout1route::R](R) reader structure"] -impl crate::Readable for CMU_CLKOUT1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cmu_clkout1route::W](W) writer structure"] -impl crate::Writable for CMU_CLKOUT1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cmu_clkout1route::R`](R) reader structure"] +impl crate::Readable for CmuClkout1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`cmu_clkout1route::W`](W) writer structure"] +impl crate::Writable for CmuClkout1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMU_CLKOUT1ROUTE to value 0"] -impl crate::Resettable for CMU_CLKOUT1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmuClkout1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/cmu_clkout2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/cmu_clkout2route.rs index 68fca58..356ab69 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/cmu_clkout2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/cmu_clkout2route.rs @@ -1,95 +1,55 @@ #[doc = "Register `CMU_CLKOUT2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CMU_CLKOUT2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CLKOUT2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CLKOUT2 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CMU_CLKOUT2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CLKOUT2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CLKOUT2 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CMU_CLKOUT2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CLKOUT2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CLKOUT2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CLKOUT2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CLKOUT2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CLKOUT2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmu_clkout2route](index.html) module"] -pub struct CMU_CLKOUT2ROUTE_SPEC; -impl crate::RegisterSpec for CMU_CLKOUT2ROUTE_SPEC { +#[doc = "CLKOUT2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`cmu_clkout2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmu_clkout2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmuClkout2routeSpec; +impl crate::RegisterSpec for CmuClkout2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [cmu_clkout2route::R](R) reader structure"] -impl crate::Readable for CMU_CLKOUT2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cmu_clkout2route::W](W) writer structure"] -impl crate::Writable for CMU_CLKOUT2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cmu_clkout2route::R`](R) reader structure"] +impl crate::Readable for CmuClkout2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`cmu_clkout2route::W`](W) writer structure"] +impl crate::Writable for CmuClkout2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMU_CLKOUT2ROUTE to value 0"] -impl crate::Resettable for CMU_CLKOUT2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmuClkout2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/cmu_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/cmu_routeen.rs index 0cbbb1e..b420e3b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/cmu_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/cmu_routeen.rs @@ -1,110 +1,70 @@ #[doc = "Register `CMU_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CMU_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CLKOUT0PEN` reader - CLKOUT0 pin enable control bit"] -pub type CLKOUT0PEN_R = crate::BitReader; +pub type Clkout0penR = crate::BitReader; #[doc = "Field `CLKOUT0PEN` writer - CLKOUT0 pin enable control bit"] -pub type CLKOUT0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMU_ROUTEEN_SPEC, bool, O>; +pub type Clkout0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLKOUT1PEN` reader - CLKOUT1 pin enable control bit"] -pub type CLKOUT1PEN_R = crate::BitReader; +pub type Clkout1penR = crate::BitReader; #[doc = "Field `CLKOUT1PEN` writer - CLKOUT1 pin enable control bit"] -pub type CLKOUT1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMU_ROUTEEN_SPEC, bool, O>; +pub type Clkout1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLKOUT2PEN` reader - CLKOUT2 pin enable control bit"] -pub type CLKOUT2PEN_R = crate::BitReader; +pub type Clkout2penR = crate::BitReader; #[doc = "Field `CLKOUT2PEN` writer - CLKOUT2 pin enable control bit"] -pub type CLKOUT2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMU_ROUTEEN_SPEC, bool, O>; +pub type Clkout2penW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CLKOUT0 pin enable control bit"] #[inline(always)] - pub fn clkout0pen(&self) -> CLKOUT0PEN_R { - CLKOUT0PEN_R::new((self.bits & 1) != 0) + pub fn clkout0pen(&self) -> Clkout0penR { + Clkout0penR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CLKOUT1 pin enable control bit"] #[inline(always)] - pub fn clkout1pen(&self) -> CLKOUT1PEN_R { - CLKOUT1PEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn clkout1pen(&self) -> Clkout1penR { + Clkout1penR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CLKOUT2 pin enable control bit"] #[inline(always)] - pub fn clkout2pen(&self) -> CLKOUT2PEN_R { - CLKOUT2PEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn clkout2pen(&self) -> Clkout2penR { + Clkout2penR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - CLKOUT0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn clkout0pen(&mut self) -> CLKOUT0PEN_W<0> { - CLKOUT0PEN_W::new(self) + pub fn clkout0pen(&mut self) -> Clkout0penW { + Clkout0penW::new(self, 0) } #[doc = "Bit 1 - CLKOUT1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn clkout1pen(&mut self) -> CLKOUT1PEN_W<1> { - CLKOUT1PEN_W::new(self) + pub fn clkout1pen(&mut self) -> Clkout1penW { + Clkout1penW::new(self, 1) } #[doc = "Bit 2 - CLKOUT2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn clkout2pen(&mut self) -> CLKOUT2PEN_W<2> { - CLKOUT2PEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clkout2pen(&mut self) -> Clkout2penW { + Clkout2penW::new(self, 2) } } -#[doc = "CMU pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmu_routeen](index.html) module"] -pub struct CMU_ROUTEEN_SPEC; -impl crate::RegisterSpec for CMU_ROUTEEN_SPEC { +#[doc = "CMU pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`cmu_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmu_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmuRouteenSpec; +impl crate::RegisterSpec for CmuRouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [cmu_routeen::R](R) reader structure"] -impl crate::Readable for CMU_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cmu_routeen::W](W) writer structure"] -impl crate::Writable for CMU_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cmu_routeen::R`](R) reader structure"] +impl crate::Readable for CmuRouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`cmu_routeen::W`](W) writer structure"] +impl crate::Writable for CmuRouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMU_ROUTEEN to value 0"] -impl crate::Resettable for CMU_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmuRouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/dbgroutepen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/dbgroutepen.rs index ca4af2b..fc84c7b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/dbgroutepen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/dbgroutepen.rs @@ -1,125 +1,85 @@ #[doc = "Register `DBGROUTEPEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DBGROUTEPEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SWCLKTCKPEN` reader - Route Pin Enable"] -pub type SWCLKTCKPEN_R = crate::BitReader; +pub type SwclktckpenR = crate::BitReader; #[doc = "Field `SWCLKTCKPEN` writer - Route Pin Enable"] -pub type SWCLKTCKPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DBGROUTEPEN_SPEC, bool, O>; +pub type SwclktckpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SWDIOTMSPEN` reader - Route Location 0"] -pub type SWDIOTMSPEN_R = crate::BitReader; +pub type SwdiotmspenR = crate::BitReader; #[doc = "Field `SWDIOTMSPEN` writer - Route Location 0"] -pub type SWDIOTMSPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DBGROUTEPEN_SPEC, bool, O>; +pub type SwdiotmspenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TDOPEN` reader - JTAG Test Debug Output Pin Enable"] -pub type TDOPEN_R = crate::BitReader; +pub type TdopenR = crate::BitReader; #[doc = "Field `TDOPEN` writer - JTAG Test Debug Output Pin Enable"] -pub type TDOPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DBGROUTEPEN_SPEC, bool, O>; +pub type TdopenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TDIPEN` reader - JTAG Test Debug Input Pin Enable"] -pub type TDIPEN_R = crate::BitReader; +pub type TdipenR = crate::BitReader; #[doc = "Field `TDIPEN` writer - JTAG Test Debug Input Pin Enable"] -pub type TDIPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DBGROUTEPEN_SPEC, bool, O>; +pub type TdipenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Route Pin Enable"] #[inline(always)] - pub fn swclktckpen(&self) -> SWCLKTCKPEN_R { - SWCLKTCKPEN_R::new((self.bits & 1) != 0) + pub fn swclktckpen(&self) -> SwclktckpenR { + SwclktckpenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Route Location 0"] #[inline(always)] - pub fn swdiotmspen(&self) -> SWDIOTMSPEN_R { - SWDIOTMSPEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn swdiotmspen(&self) -> SwdiotmspenR { + SwdiotmspenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - JTAG Test Debug Output Pin Enable"] #[inline(always)] - pub fn tdopen(&self) -> TDOPEN_R { - TDOPEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn tdopen(&self) -> TdopenR { + TdopenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - JTAG Test Debug Input Pin Enable"] #[inline(always)] - pub fn tdipen(&self) -> TDIPEN_R { - TDIPEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn tdipen(&self) -> TdipenR { + TdipenR::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Route Pin Enable"] #[inline(always)] #[must_use] - pub fn swclktckpen(&mut self) -> SWCLKTCKPEN_W<0> { - SWCLKTCKPEN_W::new(self) + pub fn swclktckpen(&mut self) -> SwclktckpenW { + SwclktckpenW::new(self, 0) } #[doc = "Bit 1 - Route Location 0"] #[inline(always)] #[must_use] - pub fn swdiotmspen(&mut self) -> SWDIOTMSPEN_W<1> { - SWDIOTMSPEN_W::new(self) + pub fn swdiotmspen(&mut self) -> SwdiotmspenW { + SwdiotmspenW::new(self, 1) } #[doc = "Bit 2 - JTAG Test Debug Output Pin Enable"] #[inline(always)] #[must_use] - pub fn tdopen(&mut self) -> TDOPEN_W<2> { - TDOPEN_W::new(self) + pub fn tdopen(&mut self) -> TdopenW { + TdopenW::new(self, 2) } #[doc = "Bit 3 - JTAG Test Debug Input Pin Enable"] #[inline(always)] #[must_use] - pub fn tdipen(&mut self) -> TDIPEN_W<3> { - TDIPEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn tdipen(&mut self) -> TdipenW { + TdipenW::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dbgroutepen](index.html) module"] -pub struct DBGROUTEPEN_SPEC; -impl crate::RegisterSpec for DBGROUTEPEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dbgroutepen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dbgroutepen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DbgroutepenSpec; +impl crate::RegisterSpec for DbgroutepenSpec { type Ux = u32; } -#[doc = "`read()` method returns [dbgroutepen::R](R) reader structure"] -impl crate::Readable for DBGROUTEPEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dbgroutepen::W](W) writer structure"] -impl crate::Writable for DBGROUTEPEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dbgroutepen::R`](R) reader structure"] +impl crate::Readable for DbgroutepenSpec {} +#[doc = "`write(|w| ..)` method takes [`dbgroutepen::W`](W) writer structure"] +impl crate::Writable for DbgroutepenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DBGROUTEPEN to value 0x0f"] -impl crate::Resettable for DBGROUTEPEN_SPEC { - const RESET_VALUE: Self::Ux = 0x0f; +impl crate::Resettable for DbgroutepenSpec { + const RESET_VALUE: u32 = 0x0f; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/em4wuen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/em4wuen.rs index e9600de..88641ca 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/em4wuen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/em4wuen.rs @@ -1,80 +1,40 @@ #[doc = "Register `EM4WUEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EM4WUEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EM4WUEN` reader - EM4 wake up enable"] -pub type EM4WUEN_R = crate::FieldReader; +pub type Em4wuenR = crate::FieldReader; #[doc = "Field `EM4WUEN` writer - EM4 wake up enable"] -pub type EM4WUEN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EM4WUEN_SPEC, u16, u16, 12, O>; +pub type Em4wuenW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 16:27 - EM4 wake up enable"] #[inline(always)] - pub fn em4wuen(&self) -> EM4WUEN_R { - EM4WUEN_R::new(((self.bits >> 16) & 0x0fff) as u16) + pub fn em4wuen(&self) -> Em4wuenR { + Em4wuenR::new(((self.bits >> 16) & 0x0fff) as u16) } } impl W { #[doc = "Bits 16:27 - EM4 wake up enable"] #[inline(always)] #[must_use] - pub fn em4wuen(&mut self) -> EM4WUEN_W<16> { - EM4WUEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn em4wuen(&mut self) -> Em4wuenW { + Em4wuenW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [em4wuen](index.html) module"] -pub struct EM4WUEN_SPEC; -impl crate::RegisterSpec for EM4WUEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em4wuen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em4wuen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Em4wuenSpec; +impl crate::RegisterSpec for Em4wuenSpec { type Ux = u32; } -#[doc = "`read()` method returns [em4wuen::R](R) reader structure"] -impl crate::Readable for EM4WUEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [em4wuen::W](W) writer structure"] -impl crate::Writable for EM4WUEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`em4wuen::R`](R) reader structure"] +impl crate::Readable for Em4wuenSpec {} +#[doc = "`write(|w| ..)` method takes [`em4wuen::W`](W) writer structure"] +impl crate::Writable for Em4wuenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EM4WUEN to value 0"] -impl crate::Resettable for EM4WUEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Em4wuenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/em4wupol.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/em4wupol.rs index a798d3c..61a0de8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/em4wupol.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/em4wupol.rs @@ -1,80 +1,40 @@ #[doc = "Register `EM4WUPOL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EM4WUPOL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EM4WUPOL` reader - EM4 Wake-Up Polarity"] -pub type EM4WUPOL_R = crate::FieldReader; +pub type Em4wupolR = crate::FieldReader; #[doc = "Field `EM4WUPOL` writer - EM4 Wake-Up Polarity"] -pub type EM4WUPOL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EM4WUPOL_SPEC, u16, u16, 12, O>; +pub type Em4wupolW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 16:27 - EM4 Wake-Up Polarity"] #[inline(always)] - pub fn em4wupol(&self) -> EM4WUPOL_R { - EM4WUPOL_R::new(((self.bits >> 16) & 0x0fff) as u16) + pub fn em4wupol(&self) -> Em4wupolR { + Em4wupolR::new(((self.bits >> 16) & 0x0fff) as u16) } } impl W { #[doc = "Bits 16:27 - EM4 Wake-Up Polarity"] #[inline(always)] #[must_use] - pub fn em4wupol(&mut self) -> EM4WUPOL_W<16> { - EM4WUPOL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn em4wupol(&mut self) -> Em4wupolW { + Em4wupolW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [em4wupol](index.html) module"] -pub struct EM4WUPOL_SPEC; -impl crate::RegisterSpec for EM4WUPOL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em4wupol::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em4wupol::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Em4wupolSpec; +impl crate::RegisterSpec for Em4wupolSpec { type Ux = u32; } -#[doc = "`read()` method returns [em4wupol::R](R) reader structure"] -impl crate::Readable for EM4WUPOL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [em4wupol::W](W) writer structure"] -impl crate::Writable for EM4WUPOL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`em4wupol::R`](R) reader structure"] +impl crate::Readable for Em4wupolSpec {} +#[doc = "`write(|w| ..)` method takes [`em4wupol::W`](W) writer structure"] +impl crate::Writable for Em4wupolSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EM4WUPOL to value 0"] -impl crate::Resettable for EM4WUPOL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Em4wupolSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_csroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_csroute.rs index 5e1132b..0e4059e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_csroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_csroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART0_CSROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART0_CSROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CS port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CS port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART0_CSROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CS pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CS pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART0_CSROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CS port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CS pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CS port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CS pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CS port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart0_csroute](index.html) module"] -pub struct EUSART0_CSROUTE_SPEC; -impl crate::RegisterSpec for EUSART0_CSROUTE_SPEC { +#[doc = "CS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_csroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_csroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart0CsrouteSpec; +impl crate::RegisterSpec for Eusart0CsrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart0_csroute::R](R) reader structure"] -impl crate::Readable for EUSART0_CSROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart0_csroute::W](W) writer structure"] -impl crate::Writable for EUSART0_CSROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart0_csroute::R`](R) reader structure"] +impl crate::Readable for Eusart0CsrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart0_csroute::W`](W) writer structure"] +impl crate::Writable for Eusart0CsrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART0_CSROUTE to value 0"] -impl crate::Resettable for EUSART0_CSROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart0CsrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_ctsroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_ctsroute.rs index fbb9f5f..5231628 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_ctsroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_ctsroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART0_CTSROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART0_CTSROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CTS port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CTS port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART0_CTSROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CTS pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CTS pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART0_CTSROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CTS port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CTS pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CTS port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CTS pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CTS port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart0_ctsroute](index.html) module"] -pub struct EUSART0_CTSROUTE_SPEC; -impl crate::RegisterSpec for EUSART0_CTSROUTE_SPEC { +#[doc = "CTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_ctsroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_ctsroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart0CtsrouteSpec; +impl crate::RegisterSpec for Eusart0CtsrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart0_ctsroute::R](R) reader structure"] -impl crate::Readable for EUSART0_CTSROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart0_ctsroute::W](W) writer structure"] -impl crate::Writable for EUSART0_CTSROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart0_ctsroute::R`](R) reader structure"] +impl crate::Readable for Eusart0CtsrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart0_ctsroute::W`](W) writer structure"] +impl crate::Writable for Eusart0CtsrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART0_CTSROUTE to value 0"] -impl crate::Resettable for EUSART0_CTSROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart0CtsrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_routeen.rs index 78e21be..d4ceb7b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_routeen.rs @@ -1,140 +1,100 @@ #[doc = "Register `EUSART0_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART0_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CSPEN` reader - CS pin enable control bit"] -pub type CSPEN_R = crate::BitReader; +pub type CspenR = crate::BitReader; #[doc = "Field `CSPEN` writer - CS pin enable control bit"] -pub type CSPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART0_ROUTEEN_SPEC, bool, O>; +pub type CspenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTSPEN` reader - RTS pin enable control bit"] -pub type RTSPEN_R = crate::BitReader; +pub type RtspenR = crate::BitReader; #[doc = "Field `RTSPEN` writer - RTS pin enable control bit"] -pub type RTSPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART0_ROUTEEN_SPEC, bool, O>; +pub type RtspenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXPEN` reader - RX pin enable control bit"] -pub type RXPEN_R = crate::BitReader; +pub type RxpenR = crate::BitReader; #[doc = "Field `RXPEN` writer - RX pin enable control bit"] -pub type RXPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART0_ROUTEEN_SPEC, bool, O>; +pub type RxpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCLKPEN` reader - SCLK pin enable control bit"] -pub type SCLKPEN_R = crate::BitReader; +pub type SclkpenR = crate::BitReader; #[doc = "Field `SCLKPEN` writer - SCLK pin enable control bit"] -pub type SCLKPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART0_ROUTEEN_SPEC, bool, O>; +pub type SclkpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXPEN` reader - TX pin enable control bit"] -pub type TXPEN_R = crate::BitReader; +pub type TxpenR = crate::BitReader; #[doc = "Field `TXPEN` writer - TX pin enable control bit"] -pub type TXPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART0_ROUTEEN_SPEC, bool, O>; +pub type TxpenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CS pin enable control bit"] #[inline(always)] - pub fn cspen(&self) -> CSPEN_R { - CSPEN_R::new((self.bits & 1) != 0) + pub fn cspen(&self) -> CspenR { + CspenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - RTS pin enable control bit"] #[inline(always)] - pub fn rtspen(&self) -> RTSPEN_R { - RTSPEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn rtspen(&self) -> RtspenR { + RtspenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RX pin enable control bit"] #[inline(always)] - pub fn rxpen(&self) -> RXPEN_R { - RXPEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxpen(&self) -> RxpenR { + RxpenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - SCLK pin enable control bit"] #[inline(always)] - pub fn sclkpen(&self) -> SCLKPEN_R { - SCLKPEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn sclkpen(&self) -> SclkpenR { + SclkpenR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - TX pin enable control bit"] #[inline(always)] - pub fn txpen(&self) -> TXPEN_R { - TXPEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn txpen(&self) -> TxpenR { + TxpenR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - CS pin enable control bit"] #[inline(always)] #[must_use] - pub fn cspen(&mut self) -> CSPEN_W<0> { - CSPEN_W::new(self) + pub fn cspen(&mut self) -> CspenW { + CspenW::new(self, 0) } #[doc = "Bit 1 - RTS pin enable control bit"] #[inline(always)] #[must_use] - pub fn rtspen(&mut self) -> RTSPEN_W<1> { - RTSPEN_W::new(self) + pub fn rtspen(&mut self) -> RtspenW { + RtspenW::new(self, 1) } #[doc = "Bit 2 - RX pin enable control bit"] #[inline(always)] #[must_use] - pub fn rxpen(&mut self) -> RXPEN_W<2> { - RXPEN_W::new(self) + pub fn rxpen(&mut self) -> RxpenW { + RxpenW::new(self, 2) } #[doc = "Bit 3 - SCLK pin enable control bit"] #[inline(always)] #[must_use] - pub fn sclkpen(&mut self) -> SCLKPEN_W<3> { - SCLKPEN_W::new(self) + pub fn sclkpen(&mut self) -> SclkpenW { + SclkpenW::new(self, 3) } #[doc = "Bit 4 - TX pin enable control bit"] #[inline(always)] #[must_use] - pub fn txpen(&mut self) -> TXPEN_W<4> { - TXPEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txpen(&mut self) -> TxpenW { + TxpenW::new(self, 4) } } -#[doc = "EUSART0 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart0_routeen](index.html) module"] -pub struct EUSART0_ROUTEEN_SPEC; -impl crate::RegisterSpec for EUSART0_ROUTEEN_SPEC { +#[doc = "EUSART0 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart0RouteenSpec; +impl crate::RegisterSpec for Eusart0RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart0_routeen::R](R) reader structure"] -impl crate::Readable for EUSART0_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart0_routeen::W](W) writer structure"] -impl crate::Writable for EUSART0_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart0_routeen::R`](R) reader structure"] +impl crate::Readable for Eusart0RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart0_routeen::W`](W) writer structure"] +impl crate::Writable for Eusart0RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART0_ROUTEEN to value 0"] -impl crate::Resettable for EUSART0_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart0RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_rtsroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_rtsroute.rs index f86a484..f7b09f9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_rtsroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_rtsroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART0_RTSROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART0_RTSROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - RTS port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - RTS port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART0_RTSROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - RTS pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - RTS pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART0_RTSROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - RTS port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - RTS pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - RTS port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - RTS pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "RTS port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart0_rtsroute](index.html) module"] -pub struct EUSART0_RTSROUTE_SPEC; -impl crate::RegisterSpec for EUSART0_RTSROUTE_SPEC { +#[doc = "RTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_rtsroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_rtsroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart0RtsrouteSpec; +impl crate::RegisterSpec for Eusart0RtsrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart0_rtsroute::R](R) reader structure"] -impl crate::Readable for EUSART0_RTSROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart0_rtsroute::W](W) writer structure"] -impl crate::Writable for EUSART0_RTSROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart0_rtsroute::R`](R) reader structure"] +impl crate::Readable for Eusart0RtsrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart0_rtsroute::W`](W) writer structure"] +impl crate::Writable for Eusart0RtsrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART0_RTSROUTE to value 0"] -impl crate::Resettable for EUSART0_RTSROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart0RtsrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_rxroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_rxroute.rs index 5c935ab..34f4e8d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_rxroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_rxroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART0_RXROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART0_RXROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - RX port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - RX port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART0_RXROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - RX pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - RX pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART0_RXROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - RX port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - RX pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - RX port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - RX pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "RX port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart0_rxroute](index.html) module"] -pub struct EUSART0_RXROUTE_SPEC; -impl crate::RegisterSpec for EUSART0_RXROUTE_SPEC { +#[doc = "RX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_rxroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_rxroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart0RxrouteSpec; +impl crate::RegisterSpec for Eusart0RxrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart0_rxroute::R](R) reader structure"] -impl crate::Readable for EUSART0_RXROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart0_rxroute::W](W) writer structure"] -impl crate::Writable for EUSART0_RXROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart0_rxroute::R`](R) reader structure"] +impl crate::Readable for Eusart0RxrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart0_rxroute::W`](W) writer structure"] +impl crate::Writable for Eusart0RxrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART0_RXROUTE to value 0"] -impl crate::Resettable for EUSART0_RXROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart0RxrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_sclkroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_sclkroute.rs index c0c6839..9423503 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_sclkroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_sclkroute.rs @@ -1,96 +1,55 @@ #[doc = "Register `EUSART0_SCLKROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART0_SCLKROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - SCLK port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - SCLK port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EUSART0_SCLKROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - SCLK pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - SCLK pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART0_SCLKROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - SCLK port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - SCLK pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - SCLK port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - SCLK pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "SCLK port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart0_sclkroute](index.html) module"] -pub struct EUSART0_SCLKROUTE_SPEC; -impl crate::RegisterSpec for EUSART0_SCLKROUTE_SPEC { +#[doc = "SCLK port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_sclkroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_sclkroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart0SclkrouteSpec; +impl crate::RegisterSpec for Eusart0SclkrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart0_sclkroute::R](R) reader structure"] -impl crate::Readable for EUSART0_SCLKROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart0_sclkroute::W](W) writer structure"] -impl crate::Writable for EUSART0_SCLKROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart0_sclkroute::R`](R) reader structure"] +impl crate::Readable for Eusart0SclkrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart0_sclkroute::W`](W) writer structure"] +impl crate::Writable for Eusart0SclkrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART0_SCLKROUTE to value 0"] -impl crate::Resettable for EUSART0_SCLKROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart0SclkrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_txroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_txroute.rs index fbc47d1..31dad97 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_txroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart0_txroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART0_TXROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART0_TXROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - TX port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - TX port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART0_TXROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - TX pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - TX pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART0_TXROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - TX port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - TX pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - TX port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - TX pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "TX port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart0_txroute](index.html) module"] -pub struct EUSART0_TXROUTE_SPEC; -impl crate::RegisterSpec for EUSART0_TXROUTE_SPEC { +#[doc = "TX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_txroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_txroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart0TxrouteSpec; +impl crate::RegisterSpec for Eusart0TxrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart0_txroute::R](R) reader structure"] -impl crate::Readable for EUSART0_TXROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart0_txroute::W](W) writer structure"] -impl crate::Writable for EUSART0_TXROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart0_txroute::R`](R) reader structure"] +impl crate::Readable for Eusart0TxrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart0_txroute::W`](W) writer structure"] +impl crate::Writable for Eusart0TxrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART0_TXROUTE to value 0"] -impl crate::Resettable for EUSART0_TXROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart0TxrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_csroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_csroute.rs index 2d6b811..f1bca97 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_csroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_csroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART1_CSROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART1_CSROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CS port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CS port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART1_CSROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CS pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CS pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART1_CSROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CS port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CS pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CS port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CS pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CS port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart1_csroute](index.html) module"] -pub struct EUSART1_CSROUTE_SPEC; -impl crate::RegisterSpec for EUSART1_CSROUTE_SPEC { +#[doc = "CS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_csroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_csroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart1CsrouteSpec; +impl crate::RegisterSpec for Eusart1CsrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart1_csroute::R](R) reader structure"] -impl crate::Readable for EUSART1_CSROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart1_csroute::W](W) writer structure"] -impl crate::Writable for EUSART1_CSROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart1_csroute::R`](R) reader structure"] +impl crate::Readable for Eusart1CsrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart1_csroute::W`](W) writer structure"] +impl crate::Writable for Eusart1CsrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART1_CSROUTE to value 0"] -impl crate::Resettable for EUSART1_CSROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart1CsrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_ctsroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_ctsroute.rs index b5e18cd..c736c7a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_ctsroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_ctsroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART1_CTSROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART1_CTSROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CTS port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CTS port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART1_CTSROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CTS pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CTS pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART1_CTSROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CTS port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CTS pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CTS port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CTS pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CTS port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart1_ctsroute](index.html) module"] -pub struct EUSART1_CTSROUTE_SPEC; -impl crate::RegisterSpec for EUSART1_CTSROUTE_SPEC { +#[doc = "CTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_ctsroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_ctsroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart1CtsrouteSpec; +impl crate::RegisterSpec for Eusart1CtsrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart1_ctsroute::R](R) reader structure"] -impl crate::Readable for EUSART1_CTSROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart1_ctsroute::W](W) writer structure"] -impl crate::Writable for EUSART1_CTSROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart1_ctsroute::R`](R) reader structure"] +impl crate::Readable for Eusart1CtsrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart1_ctsroute::W`](W) writer structure"] +impl crate::Writable for Eusart1CtsrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART1_CTSROUTE to value 0"] -impl crate::Resettable for EUSART1_CTSROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart1CtsrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_routeen.rs index 8f36898..e013d0a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_routeen.rs @@ -1,140 +1,100 @@ #[doc = "Register `EUSART1_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART1_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CSPEN` reader - CS pin enable control bit"] -pub type CSPEN_R = crate::BitReader; +pub type CspenR = crate::BitReader; #[doc = "Field `CSPEN` writer - CS pin enable control bit"] -pub type CSPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART1_ROUTEEN_SPEC, bool, O>; +pub type CspenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTSPEN` reader - RTS pin enable control bit"] -pub type RTSPEN_R = crate::BitReader; +pub type RtspenR = crate::BitReader; #[doc = "Field `RTSPEN` writer - RTS pin enable control bit"] -pub type RTSPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART1_ROUTEEN_SPEC, bool, O>; +pub type RtspenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXPEN` reader - RX pin enable control bit"] -pub type RXPEN_R = crate::BitReader; +pub type RxpenR = crate::BitReader; #[doc = "Field `RXPEN` writer - RX pin enable control bit"] -pub type RXPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART1_ROUTEEN_SPEC, bool, O>; +pub type RxpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCLKPEN` reader - SCLK pin enable control bit"] -pub type SCLKPEN_R = crate::BitReader; +pub type SclkpenR = crate::BitReader; #[doc = "Field `SCLKPEN` writer - SCLK pin enable control bit"] -pub type SCLKPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART1_ROUTEEN_SPEC, bool, O>; +pub type SclkpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXPEN` reader - TX pin enable control bit"] -pub type TXPEN_R = crate::BitReader; +pub type TxpenR = crate::BitReader; #[doc = "Field `TXPEN` writer - TX pin enable control bit"] -pub type TXPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART1_ROUTEEN_SPEC, bool, O>; +pub type TxpenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CS pin enable control bit"] #[inline(always)] - pub fn cspen(&self) -> CSPEN_R { - CSPEN_R::new((self.bits & 1) != 0) + pub fn cspen(&self) -> CspenR { + CspenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - RTS pin enable control bit"] #[inline(always)] - pub fn rtspen(&self) -> RTSPEN_R { - RTSPEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn rtspen(&self) -> RtspenR { + RtspenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RX pin enable control bit"] #[inline(always)] - pub fn rxpen(&self) -> RXPEN_R { - RXPEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxpen(&self) -> RxpenR { + RxpenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - SCLK pin enable control bit"] #[inline(always)] - pub fn sclkpen(&self) -> SCLKPEN_R { - SCLKPEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn sclkpen(&self) -> SclkpenR { + SclkpenR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - TX pin enable control bit"] #[inline(always)] - pub fn txpen(&self) -> TXPEN_R { - TXPEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn txpen(&self) -> TxpenR { + TxpenR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - CS pin enable control bit"] #[inline(always)] #[must_use] - pub fn cspen(&mut self) -> CSPEN_W<0> { - CSPEN_W::new(self) + pub fn cspen(&mut self) -> CspenW { + CspenW::new(self, 0) } #[doc = "Bit 1 - RTS pin enable control bit"] #[inline(always)] #[must_use] - pub fn rtspen(&mut self) -> RTSPEN_W<1> { - RTSPEN_W::new(self) + pub fn rtspen(&mut self) -> RtspenW { + RtspenW::new(self, 1) } #[doc = "Bit 2 - RX pin enable control bit"] #[inline(always)] #[must_use] - pub fn rxpen(&mut self) -> RXPEN_W<2> { - RXPEN_W::new(self) + pub fn rxpen(&mut self) -> RxpenW { + RxpenW::new(self, 2) } #[doc = "Bit 3 - SCLK pin enable control bit"] #[inline(always)] #[must_use] - pub fn sclkpen(&mut self) -> SCLKPEN_W<3> { - SCLKPEN_W::new(self) + pub fn sclkpen(&mut self) -> SclkpenW { + SclkpenW::new(self, 3) } #[doc = "Bit 4 - TX pin enable control bit"] #[inline(always)] #[must_use] - pub fn txpen(&mut self) -> TXPEN_W<4> { - TXPEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txpen(&mut self) -> TxpenW { + TxpenW::new(self, 4) } } -#[doc = "EUSART1 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart1_routeen](index.html) module"] -pub struct EUSART1_ROUTEEN_SPEC; -impl crate::RegisterSpec for EUSART1_ROUTEEN_SPEC { +#[doc = "EUSART1 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart1RouteenSpec; +impl crate::RegisterSpec for Eusart1RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart1_routeen::R](R) reader structure"] -impl crate::Readable for EUSART1_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart1_routeen::W](W) writer structure"] -impl crate::Writable for EUSART1_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart1_routeen::R`](R) reader structure"] +impl crate::Readable for Eusart1RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart1_routeen::W`](W) writer structure"] +impl crate::Writable for Eusart1RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART1_ROUTEEN to value 0"] -impl crate::Resettable for EUSART1_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart1RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_rtsroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_rtsroute.rs index 17ac175..7ceb4a1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_rtsroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_rtsroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART1_RTSROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART1_RTSROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - RTS port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - RTS port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART1_RTSROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - RTS pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - RTS pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART1_RTSROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - RTS port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - RTS pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - RTS port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - RTS pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "RTS port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart1_rtsroute](index.html) module"] -pub struct EUSART1_RTSROUTE_SPEC; -impl crate::RegisterSpec for EUSART1_RTSROUTE_SPEC { +#[doc = "RTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_rtsroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_rtsroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart1RtsrouteSpec; +impl crate::RegisterSpec for Eusart1RtsrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart1_rtsroute::R](R) reader structure"] -impl crate::Readable for EUSART1_RTSROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart1_rtsroute::W](W) writer structure"] -impl crate::Writable for EUSART1_RTSROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart1_rtsroute::R`](R) reader structure"] +impl crate::Readable for Eusart1RtsrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart1_rtsroute::W`](W) writer structure"] +impl crate::Writable for Eusart1RtsrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART1_RTSROUTE to value 0"] -impl crate::Resettable for EUSART1_RTSROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart1RtsrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_rxroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_rxroute.rs index c570458..e5781fb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_rxroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_rxroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART1_RXROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART1_RXROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - RX port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - RX port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART1_RXROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - RX pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - RX pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART1_RXROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - RX port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - RX pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - RX port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - RX pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "RX port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart1_rxroute](index.html) module"] -pub struct EUSART1_RXROUTE_SPEC; -impl crate::RegisterSpec for EUSART1_RXROUTE_SPEC { +#[doc = "RX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_rxroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_rxroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart1RxrouteSpec; +impl crate::RegisterSpec for Eusart1RxrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart1_rxroute::R](R) reader structure"] -impl crate::Readable for EUSART1_RXROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart1_rxroute::W](W) writer structure"] -impl crate::Writable for EUSART1_RXROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart1_rxroute::R`](R) reader structure"] +impl crate::Readable for Eusart1RxrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart1_rxroute::W`](W) writer structure"] +impl crate::Writable for Eusart1RxrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART1_RXROUTE to value 0"] -impl crate::Resettable for EUSART1_RXROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart1RxrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_sclkroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_sclkroute.rs index 455495a..7dab975 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_sclkroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_sclkroute.rs @@ -1,96 +1,55 @@ #[doc = "Register `EUSART1_SCLKROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART1_SCLKROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - SCLK port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - SCLK port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EUSART1_SCLKROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - SCLK pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - SCLK pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART1_SCLKROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - SCLK port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - SCLK pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - SCLK port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - SCLK pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "SCLK port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart1_sclkroute](index.html) module"] -pub struct EUSART1_SCLKROUTE_SPEC; -impl crate::RegisterSpec for EUSART1_SCLKROUTE_SPEC { +#[doc = "SCLK port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_sclkroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_sclkroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart1SclkrouteSpec; +impl crate::RegisterSpec for Eusart1SclkrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart1_sclkroute::R](R) reader structure"] -impl crate::Readable for EUSART1_SCLKROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart1_sclkroute::W](W) writer structure"] -impl crate::Writable for EUSART1_SCLKROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart1_sclkroute::R`](R) reader structure"] +impl crate::Readable for Eusart1SclkrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart1_sclkroute::W`](W) writer structure"] +impl crate::Writable for Eusart1SclkrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART1_SCLKROUTE to value 0"] -impl crate::Resettable for EUSART1_SCLKROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart1SclkrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_txroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_txroute.rs index 0a11c50..4bc2f6f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_txroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart1_txroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART1_TXROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART1_TXROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - TX port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - TX port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART1_TXROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - TX pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - TX pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART1_TXROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - TX port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - TX pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - TX port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - TX pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "TX port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart1_txroute](index.html) module"] -pub struct EUSART1_TXROUTE_SPEC; -impl crate::RegisterSpec for EUSART1_TXROUTE_SPEC { +#[doc = "TX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_txroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_txroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart1TxrouteSpec; +impl crate::RegisterSpec for Eusart1TxrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart1_txroute::R](R) reader structure"] -impl crate::Readable for EUSART1_TXROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart1_txroute::W](W) writer structure"] -impl crate::Writable for EUSART1_TXROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart1_txroute::R`](R) reader structure"] +impl crate::Readable for Eusart1TxrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart1_txroute::W`](W) writer structure"] +impl crate::Writable for Eusart1TxrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART1_TXROUTE to value 0"] -impl crate::Resettable for EUSART1_TXROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart1TxrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_csroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_csroute.rs index 30534e7..cd5b8c1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_csroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_csroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART2_CSROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART2_CSROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CS port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CS port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART2_CSROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CS pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CS pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART2_CSROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CS port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CS pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CS port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CS pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CS port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart2_csroute](index.html) module"] -pub struct EUSART2_CSROUTE_SPEC; -impl crate::RegisterSpec for EUSART2_CSROUTE_SPEC { +#[doc = "CS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_csroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_csroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart2CsrouteSpec; +impl crate::RegisterSpec for Eusart2CsrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart2_csroute::R](R) reader structure"] -impl crate::Readable for EUSART2_CSROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart2_csroute::W](W) writer structure"] -impl crate::Writable for EUSART2_CSROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart2_csroute::R`](R) reader structure"] +impl crate::Readable for Eusart2CsrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart2_csroute::W`](W) writer structure"] +impl crate::Writable for Eusart2CsrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART2_CSROUTE to value 0"] -impl crate::Resettable for EUSART2_CSROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart2CsrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_ctsroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_ctsroute.rs index 26619a8..672f789 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_ctsroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_ctsroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART2_CTSROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART2_CTSROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CTS port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CTS port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART2_CTSROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CTS pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CTS pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART2_CTSROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CTS port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CTS pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CTS port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CTS pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CTS port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart2_ctsroute](index.html) module"] -pub struct EUSART2_CTSROUTE_SPEC; -impl crate::RegisterSpec for EUSART2_CTSROUTE_SPEC { +#[doc = "CTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_ctsroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_ctsroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart2CtsrouteSpec; +impl crate::RegisterSpec for Eusart2CtsrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart2_ctsroute::R](R) reader structure"] -impl crate::Readable for EUSART2_CTSROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart2_ctsroute::W](W) writer structure"] -impl crate::Writable for EUSART2_CTSROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart2_ctsroute::R`](R) reader structure"] +impl crate::Readable for Eusart2CtsrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart2_ctsroute::W`](W) writer structure"] +impl crate::Writable for Eusart2CtsrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART2_CTSROUTE to value 0"] -impl crate::Resettable for EUSART2_CTSROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart2CtsrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_routeen.rs index 7f7e5eb..373aa8e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_routeen.rs @@ -1,140 +1,100 @@ #[doc = "Register `EUSART2_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART2_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CSPEN` reader - CS pin enable control bit"] -pub type CSPEN_R = crate::BitReader; +pub type CspenR = crate::BitReader; #[doc = "Field `CSPEN` writer - CS pin enable control bit"] -pub type CSPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART2_ROUTEEN_SPEC, bool, O>; +pub type CspenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTSPEN` reader - RTS pin enable control bit"] -pub type RTSPEN_R = crate::BitReader; +pub type RtspenR = crate::BitReader; #[doc = "Field `RTSPEN` writer - RTS pin enable control bit"] -pub type RTSPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART2_ROUTEEN_SPEC, bool, O>; +pub type RtspenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXPEN` reader - RX pin enable control bit"] -pub type RXPEN_R = crate::BitReader; +pub type RxpenR = crate::BitReader; #[doc = "Field `RXPEN` writer - RX pin enable control bit"] -pub type RXPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART2_ROUTEEN_SPEC, bool, O>; +pub type RxpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCLKPEN` reader - SCLK pin enable control bit"] -pub type SCLKPEN_R = crate::BitReader; +pub type SclkpenR = crate::BitReader; #[doc = "Field `SCLKPEN` writer - SCLK pin enable control bit"] -pub type SCLKPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART2_ROUTEEN_SPEC, bool, O>; +pub type SclkpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXPEN` reader - TX pin enable control bit"] -pub type TXPEN_R = crate::BitReader; +pub type TxpenR = crate::BitReader; #[doc = "Field `TXPEN` writer - TX pin enable control bit"] -pub type TXPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART2_ROUTEEN_SPEC, bool, O>; +pub type TxpenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CS pin enable control bit"] #[inline(always)] - pub fn cspen(&self) -> CSPEN_R { - CSPEN_R::new((self.bits & 1) != 0) + pub fn cspen(&self) -> CspenR { + CspenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - RTS pin enable control bit"] #[inline(always)] - pub fn rtspen(&self) -> RTSPEN_R { - RTSPEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn rtspen(&self) -> RtspenR { + RtspenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RX pin enable control bit"] #[inline(always)] - pub fn rxpen(&self) -> RXPEN_R { - RXPEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxpen(&self) -> RxpenR { + RxpenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - SCLK pin enable control bit"] #[inline(always)] - pub fn sclkpen(&self) -> SCLKPEN_R { - SCLKPEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn sclkpen(&self) -> SclkpenR { + SclkpenR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - TX pin enable control bit"] #[inline(always)] - pub fn txpen(&self) -> TXPEN_R { - TXPEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn txpen(&self) -> TxpenR { + TxpenR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - CS pin enable control bit"] #[inline(always)] #[must_use] - pub fn cspen(&mut self) -> CSPEN_W<0> { - CSPEN_W::new(self) + pub fn cspen(&mut self) -> CspenW { + CspenW::new(self, 0) } #[doc = "Bit 1 - RTS pin enable control bit"] #[inline(always)] #[must_use] - pub fn rtspen(&mut self) -> RTSPEN_W<1> { - RTSPEN_W::new(self) + pub fn rtspen(&mut self) -> RtspenW { + RtspenW::new(self, 1) } #[doc = "Bit 2 - RX pin enable control bit"] #[inline(always)] #[must_use] - pub fn rxpen(&mut self) -> RXPEN_W<2> { - RXPEN_W::new(self) + pub fn rxpen(&mut self) -> RxpenW { + RxpenW::new(self, 2) } #[doc = "Bit 3 - SCLK pin enable control bit"] #[inline(always)] #[must_use] - pub fn sclkpen(&mut self) -> SCLKPEN_W<3> { - SCLKPEN_W::new(self) + pub fn sclkpen(&mut self) -> SclkpenW { + SclkpenW::new(self, 3) } #[doc = "Bit 4 - TX pin enable control bit"] #[inline(always)] #[must_use] - pub fn txpen(&mut self) -> TXPEN_W<4> { - TXPEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txpen(&mut self) -> TxpenW { + TxpenW::new(self, 4) } } -#[doc = "EUSART2 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart2_routeen](index.html) module"] -pub struct EUSART2_ROUTEEN_SPEC; -impl crate::RegisterSpec for EUSART2_ROUTEEN_SPEC { +#[doc = "EUSART2 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart2RouteenSpec; +impl crate::RegisterSpec for Eusart2RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart2_routeen::R](R) reader structure"] -impl crate::Readable for EUSART2_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart2_routeen::W](W) writer structure"] -impl crate::Writable for EUSART2_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart2_routeen::R`](R) reader structure"] +impl crate::Readable for Eusart2RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart2_routeen::W`](W) writer structure"] +impl crate::Writable for Eusart2RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART2_ROUTEEN to value 0"] -impl crate::Resettable for EUSART2_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart2RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_rtsroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_rtsroute.rs index 9b385d6..83ead2a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_rtsroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_rtsroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART2_RTSROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART2_RTSROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - RTS port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - RTS port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART2_RTSROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - RTS pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - RTS pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART2_RTSROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - RTS port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - RTS pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - RTS port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - RTS pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "RTS port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart2_rtsroute](index.html) module"] -pub struct EUSART2_RTSROUTE_SPEC; -impl crate::RegisterSpec for EUSART2_RTSROUTE_SPEC { +#[doc = "RTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_rtsroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_rtsroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart2RtsrouteSpec; +impl crate::RegisterSpec for Eusart2RtsrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart2_rtsroute::R](R) reader structure"] -impl crate::Readable for EUSART2_RTSROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart2_rtsroute::W](W) writer structure"] -impl crate::Writable for EUSART2_RTSROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart2_rtsroute::R`](R) reader structure"] +impl crate::Readable for Eusart2RtsrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart2_rtsroute::W`](W) writer structure"] +impl crate::Writable for Eusart2RtsrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART2_RTSROUTE to value 0"] -impl crate::Resettable for EUSART2_RTSROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart2RtsrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_rxroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_rxroute.rs index b3a797d..5368488 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_rxroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_rxroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART2_RXROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART2_RXROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - RX port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - RX port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART2_RXROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - RX pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - RX pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART2_RXROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - RX port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - RX pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - RX port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - RX pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "RX port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart2_rxroute](index.html) module"] -pub struct EUSART2_RXROUTE_SPEC; -impl crate::RegisterSpec for EUSART2_RXROUTE_SPEC { +#[doc = "RX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_rxroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_rxroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart2RxrouteSpec; +impl crate::RegisterSpec for Eusart2RxrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart2_rxroute::R](R) reader structure"] -impl crate::Readable for EUSART2_RXROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart2_rxroute::W](W) writer structure"] -impl crate::Writable for EUSART2_RXROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart2_rxroute::R`](R) reader structure"] +impl crate::Readable for Eusart2RxrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart2_rxroute::W`](W) writer structure"] +impl crate::Writable for Eusart2RxrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART2_RXROUTE to value 0"] -impl crate::Resettable for EUSART2_RXROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart2RxrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_sclkroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_sclkroute.rs index cdbc16d..13db329 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_sclkroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_sclkroute.rs @@ -1,96 +1,55 @@ #[doc = "Register `EUSART2_SCLKROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART2_SCLKROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - SCLK port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - SCLK port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EUSART2_SCLKROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - SCLK pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - SCLK pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART2_SCLKROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - SCLK port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - SCLK pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - SCLK port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - SCLK pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "SCLK port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart2_sclkroute](index.html) module"] -pub struct EUSART2_SCLKROUTE_SPEC; -impl crate::RegisterSpec for EUSART2_SCLKROUTE_SPEC { +#[doc = "SCLK port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_sclkroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_sclkroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart2SclkrouteSpec; +impl crate::RegisterSpec for Eusart2SclkrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart2_sclkroute::R](R) reader structure"] -impl crate::Readable for EUSART2_SCLKROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart2_sclkroute::W](W) writer structure"] -impl crate::Writable for EUSART2_SCLKROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart2_sclkroute::R`](R) reader structure"] +impl crate::Readable for Eusart2SclkrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart2_sclkroute::W`](W) writer structure"] +impl crate::Writable for Eusart2SclkrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART2_SCLKROUTE to value 0"] -impl crate::Resettable for EUSART2_SCLKROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart2SclkrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_txroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_txroute.rs index 6f8c5fe..1e24a3e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_txroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/eusart2_txroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART2_TXROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART2_TXROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - TX port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - TX port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART2_TXROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - TX pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - TX pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART2_TXROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - TX port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - TX pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - TX port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - TX pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "TX port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart2_txroute](index.html) module"] -pub struct EUSART2_TXROUTE_SPEC; -impl crate::RegisterSpec for EUSART2_TXROUTE_SPEC { +#[doc = "TX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_txroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_txroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart2TxrouteSpec; +impl crate::RegisterSpec for Eusart2TxrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart2_txroute::R](R) reader structure"] -impl crate::Readable for EUSART2_TXROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart2_txroute::W](W) writer structure"] -impl crate::Writable for EUSART2_TXROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart2_txroute::R`](R) reader structure"] +impl crate::Readable for Eusart2TxrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart2_txroute::W`](W) writer structure"] +impl crate::Writable for Eusart2TxrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART2_TXROUTE to value 0"] -impl crate::Resettable for EUSART2_TXROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart2TxrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/extifall.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/extifall.rs index 0c767b4..9e31a3f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/extifall.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/extifall.rs @@ -1,80 +1,40 @@ #[doc = "Register `EXTIFALL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EXTIFALL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EXTIFALL` reader - EXT Int FALL"] -pub type EXTIFALL_R = crate::FieldReader; +pub type ExtifallR = crate::FieldReader; #[doc = "Field `EXTIFALL` writer - EXT Int FALL"] -pub type EXTIFALL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EXTIFALL_SPEC, u16, u16, 12, O>; +pub type ExtifallW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:11 - EXT Int FALL"] #[inline(always)] - pub fn extifall(&self) -> EXTIFALL_R { - EXTIFALL_R::new((self.bits & 0x0fff) as u16) + pub fn extifall(&self) -> ExtifallR { + ExtifallR::new((self.bits & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - EXT Int FALL"] #[inline(always)] #[must_use] - pub fn extifall(&mut self) -> EXTIFALL_W<0> { - EXTIFALL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn extifall(&mut self) -> ExtifallW { + ExtifallW::new(self, 0) } } -#[doc = "External Interrupt Falling Edge Trigger\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [extifall](index.html) module"] -pub struct EXTIFALL_SPEC; -impl crate::RegisterSpec for EXTIFALL_SPEC { +#[doc = "External Interrupt Falling Edge Trigger\n\nYou can [`read`](crate::Reg::read) this register and get [`extifall::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`extifall::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ExtifallSpec; +impl crate::RegisterSpec for ExtifallSpec { type Ux = u32; } -#[doc = "`read()` method returns [extifall::R](R) reader structure"] -impl crate::Readable for EXTIFALL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [extifall::W](W) writer structure"] -impl crate::Writable for EXTIFALL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`extifall::R`](R) reader structure"] +impl crate::Readable for ExtifallSpec {} +#[doc = "`write(|w| ..)` method takes [`extifall::W`](W) writer structure"] +impl crate::Writable for ExtifallSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EXTIFALL to value 0"] -impl crate::Resettable for EXTIFALL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ExtifallSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/extipinselh.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/extipinselh.rs index 2feefee..b16f941 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/extipinselh.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/extipinselh.rs @@ -1,425 +1,413 @@ #[doc = "Register `EXTIPINSELH` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EXTIPINSELH` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EXTIPINSEL0` reader - External Interrupt Pin select"] -pub type EXTIPINSEL0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "External Interrupt Pin select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPINSEL0_A { +pub enum Extipinsel0 { #[doc = "0: OFFSET=8"] - PIN8 = 0, + Pin8 = 0, #[doc = "1: OFFSET=9"] - PIN9 = 1, + Pin9 = 1, #[doc = "2: OFFSET=10"] - PIN10 = 2, + Pin10 = 2, #[doc = "3: OFFSET=11"] - PIN11 = 3, + Pin11 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPINSEL0_A) -> Self { + fn from(variant: Extipinsel0) -> Self { variant as _ } } -impl EXTIPINSEL0_R { +impl crate::FieldSpec for Extipinsel0 { + type Ux = u8; +} +impl crate::IsEnum for Extipinsel0 {} +#[doc = "Field `EXTIPINSEL0` reader - External Interrupt Pin select"] +pub type Extipinsel0R = crate::FieldReader; +impl Extipinsel0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPINSEL0_A { + pub const fn variant(&self) -> Extipinsel0 { match self.bits { - 0 => EXTIPINSEL0_A::PIN8, - 1 => EXTIPINSEL0_A::PIN9, - 2 => EXTIPINSEL0_A::PIN10, - 3 => EXTIPINSEL0_A::PIN11, + 0 => Extipinsel0::Pin8, + 1 => Extipinsel0::Pin9, + 2 => Extipinsel0::Pin10, + 3 => Extipinsel0::Pin11, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN8`"] + #[doc = "OFFSET=8"] #[inline(always)] pub fn is_pin8(&self) -> bool { - *self == EXTIPINSEL0_A::PIN8 + *self == Extipinsel0::Pin8 } - #[doc = "Checks if the value of the field is `PIN9`"] + #[doc = "OFFSET=9"] #[inline(always)] pub fn is_pin9(&self) -> bool { - *self == EXTIPINSEL0_A::PIN9 + *self == Extipinsel0::Pin9 } - #[doc = "Checks if the value of the field is `PIN10`"] + #[doc = "OFFSET=10"] #[inline(always)] pub fn is_pin10(&self) -> bool { - *self == EXTIPINSEL0_A::PIN10 + *self == Extipinsel0::Pin10 } - #[doc = "Checks if the value of the field is `PIN11`"] + #[doc = "OFFSET=11"] #[inline(always)] pub fn is_pin11(&self) -> bool { - *self == EXTIPINSEL0_A::PIN11 + *self == Extipinsel0::Pin11 } } #[doc = "Field `EXTIPINSEL0` writer - External Interrupt Pin select"] -pub type EXTIPINSEL0_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPINSELH_SPEC, u8, EXTIPINSEL0_A, 2, O>; -impl<'a, const O: u8> EXTIPINSEL0_W<'a, O> { +pub type Extipinsel0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipinsel0, crate::Safe>; +impl<'a, REG> Extipinsel0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "OFFSET=8"] #[inline(always)] - pub fn pin8(self) -> &'a mut W { - self.variant(EXTIPINSEL0_A::PIN8) + pub fn pin8(self) -> &'a mut crate::W { + self.variant(Extipinsel0::Pin8) } #[doc = "OFFSET=9"] #[inline(always)] - pub fn pin9(self) -> &'a mut W { - self.variant(EXTIPINSEL0_A::PIN9) + pub fn pin9(self) -> &'a mut crate::W { + self.variant(Extipinsel0::Pin9) } #[doc = "OFFSET=10"] #[inline(always)] - pub fn pin10(self) -> &'a mut W { - self.variant(EXTIPINSEL0_A::PIN10) + pub fn pin10(self) -> &'a mut crate::W { + self.variant(Extipinsel0::Pin10) } #[doc = "OFFSET=11"] #[inline(always)] - pub fn pin11(self) -> &'a mut W { - self.variant(EXTIPINSEL0_A::PIN11) + pub fn pin11(self) -> &'a mut crate::W { + self.variant(Extipinsel0::Pin11) } } -#[doc = "Field `EXTIPINSEL1` reader - External Interrupt Pin select"] -pub type EXTIPINSEL1_R = crate::FieldReader; #[doc = "External Interrupt Pin select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPINSEL1_A { +pub enum Extipinsel1 { #[doc = "0: OFFSET=8"] - PIN8 = 0, + Pin8 = 0, #[doc = "1: OFFSET=9"] - PIN9 = 1, + Pin9 = 1, #[doc = "2: OFFSET=10"] - PIN10 = 2, + Pin10 = 2, #[doc = "3: OFFSET=11"] - PIN11 = 3, + Pin11 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPINSEL1_A) -> Self { + fn from(variant: Extipinsel1) -> Self { variant as _ } } -impl EXTIPINSEL1_R { +impl crate::FieldSpec for Extipinsel1 { + type Ux = u8; +} +impl crate::IsEnum for Extipinsel1 {} +#[doc = "Field `EXTIPINSEL1` reader - External Interrupt Pin select"] +pub type Extipinsel1R = crate::FieldReader; +impl Extipinsel1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPINSEL1_A { + pub const fn variant(&self) -> Extipinsel1 { match self.bits { - 0 => EXTIPINSEL1_A::PIN8, - 1 => EXTIPINSEL1_A::PIN9, - 2 => EXTIPINSEL1_A::PIN10, - 3 => EXTIPINSEL1_A::PIN11, + 0 => Extipinsel1::Pin8, + 1 => Extipinsel1::Pin9, + 2 => Extipinsel1::Pin10, + 3 => Extipinsel1::Pin11, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN8`"] + #[doc = "OFFSET=8"] #[inline(always)] pub fn is_pin8(&self) -> bool { - *self == EXTIPINSEL1_A::PIN8 + *self == Extipinsel1::Pin8 } - #[doc = "Checks if the value of the field is `PIN9`"] + #[doc = "OFFSET=9"] #[inline(always)] pub fn is_pin9(&self) -> bool { - *self == EXTIPINSEL1_A::PIN9 + *self == Extipinsel1::Pin9 } - #[doc = "Checks if the value of the field is `PIN10`"] + #[doc = "OFFSET=10"] #[inline(always)] pub fn is_pin10(&self) -> bool { - *self == EXTIPINSEL1_A::PIN10 + *self == Extipinsel1::Pin10 } - #[doc = "Checks if the value of the field is `PIN11`"] + #[doc = "OFFSET=11"] #[inline(always)] pub fn is_pin11(&self) -> bool { - *self == EXTIPINSEL1_A::PIN11 + *self == Extipinsel1::Pin11 } } #[doc = "Field `EXTIPINSEL1` writer - External Interrupt Pin select"] -pub type EXTIPINSEL1_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPINSELH_SPEC, u8, EXTIPINSEL1_A, 2, O>; -impl<'a, const O: u8> EXTIPINSEL1_W<'a, O> { +pub type Extipinsel1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipinsel1, crate::Safe>; +impl<'a, REG> Extipinsel1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "OFFSET=8"] #[inline(always)] - pub fn pin8(self) -> &'a mut W { - self.variant(EXTIPINSEL1_A::PIN8) + pub fn pin8(self) -> &'a mut crate::W { + self.variant(Extipinsel1::Pin8) } #[doc = "OFFSET=9"] #[inline(always)] - pub fn pin9(self) -> &'a mut W { - self.variant(EXTIPINSEL1_A::PIN9) + pub fn pin9(self) -> &'a mut crate::W { + self.variant(Extipinsel1::Pin9) } #[doc = "OFFSET=10"] #[inline(always)] - pub fn pin10(self) -> &'a mut W { - self.variant(EXTIPINSEL1_A::PIN10) + pub fn pin10(self) -> &'a mut crate::W { + self.variant(Extipinsel1::Pin10) } #[doc = "OFFSET=11"] #[inline(always)] - pub fn pin11(self) -> &'a mut W { - self.variant(EXTIPINSEL1_A::PIN11) + pub fn pin11(self) -> &'a mut crate::W { + self.variant(Extipinsel1::Pin11) } } -#[doc = "Field `EXTIPINSEL2` reader - External Interrupt Pin select"] -pub type EXTIPINSEL2_R = crate::FieldReader; #[doc = "External Interrupt Pin select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPINSEL2_A { +pub enum Extipinsel2 { #[doc = "0: OFFSET=8"] - PIN8 = 0, + Pin8 = 0, #[doc = "1: OFFSET=9"] - PIN9 = 1, + Pin9 = 1, #[doc = "2: OFFSET=10"] - PIN10 = 2, + Pin10 = 2, #[doc = "3: OFFSET=11"] - PIN11 = 3, + Pin11 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPINSEL2_A) -> Self { + fn from(variant: Extipinsel2) -> Self { variant as _ } } -impl EXTIPINSEL2_R { +impl crate::FieldSpec for Extipinsel2 { + type Ux = u8; +} +impl crate::IsEnum for Extipinsel2 {} +#[doc = "Field `EXTIPINSEL2` reader - External Interrupt Pin select"] +pub type Extipinsel2R = crate::FieldReader; +impl Extipinsel2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPINSEL2_A { + pub const fn variant(&self) -> Extipinsel2 { match self.bits { - 0 => EXTIPINSEL2_A::PIN8, - 1 => EXTIPINSEL2_A::PIN9, - 2 => EXTIPINSEL2_A::PIN10, - 3 => EXTIPINSEL2_A::PIN11, + 0 => Extipinsel2::Pin8, + 1 => Extipinsel2::Pin9, + 2 => Extipinsel2::Pin10, + 3 => Extipinsel2::Pin11, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN8`"] + #[doc = "OFFSET=8"] #[inline(always)] pub fn is_pin8(&self) -> bool { - *self == EXTIPINSEL2_A::PIN8 + *self == Extipinsel2::Pin8 } - #[doc = "Checks if the value of the field is `PIN9`"] + #[doc = "OFFSET=9"] #[inline(always)] pub fn is_pin9(&self) -> bool { - *self == EXTIPINSEL2_A::PIN9 + *self == Extipinsel2::Pin9 } - #[doc = "Checks if the value of the field is `PIN10`"] + #[doc = "OFFSET=10"] #[inline(always)] pub fn is_pin10(&self) -> bool { - *self == EXTIPINSEL2_A::PIN10 + *self == Extipinsel2::Pin10 } - #[doc = "Checks if the value of the field is `PIN11`"] + #[doc = "OFFSET=11"] #[inline(always)] pub fn is_pin11(&self) -> bool { - *self == EXTIPINSEL2_A::PIN11 + *self == Extipinsel2::Pin11 } } #[doc = "Field `EXTIPINSEL2` writer - External Interrupt Pin select"] -pub type EXTIPINSEL2_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPINSELH_SPEC, u8, EXTIPINSEL2_A, 2, O>; -impl<'a, const O: u8> EXTIPINSEL2_W<'a, O> { +pub type Extipinsel2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipinsel2, crate::Safe>; +impl<'a, REG> Extipinsel2W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "OFFSET=8"] #[inline(always)] - pub fn pin8(self) -> &'a mut W { - self.variant(EXTIPINSEL2_A::PIN8) + pub fn pin8(self) -> &'a mut crate::W { + self.variant(Extipinsel2::Pin8) } #[doc = "OFFSET=9"] #[inline(always)] - pub fn pin9(self) -> &'a mut W { - self.variant(EXTIPINSEL2_A::PIN9) + pub fn pin9(self) -> &'a mut crate::W { + self.variant(Extipinsel2::Pin9) } #[doc = "OFFSET=10"] #[inline(always)] - pub fn pin10(self) -> &'a mut W { - self.variant(EXTIPINSEL2_A::PIN10) + pub fn pin10(self) -> &'a mut crate::W { + self.variant(Extipinsel2::Pin10) } #[doc = "OFFSET=11"] #[inline(always)] - pub fn pin11(self) -> &'a mut W { - self.variant(EXTIPINSEL2_A::PIN11) + pub fn pin11(self) -> &'a mut crate::W { + self.variant(Extipinsel2::Pin11) } } -#[doc = "Field `EXTIPINSEL3` reader - External Interrupt Pin select"] -pub type EXTIPINSEL3_R = crate::FieldReader; #[doc = "External Interrupt Pin select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPINSEL3_A { +pub enum Extipinsel3 { #[doc = "0: OFFSET=8"] - PIN8 = 0, + Pin8 = 0, #[doc = "1: OFFSET=9"] - PIN9 = 1, + Pin9 = 1, #[doc = "2: OFFSET=10"] - PIN10 = 2, + Pin10 = 2, #[doc = "3: OFFSET=11"] - PIN11 = 3, + Pin11 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPINSEL3_A) -> Self { + fn from(variant: Extipinsel3) -> Self { variant as _ } } -impl EXTIPINSEL3_R { +impl crate::FieldSpec for Extipinsel3 { + type Ux = u8; +} +impl crate::IsEnum for Extipinsel3 {} +#[doc = "Field `EXTIPINSEL3` reader - External Interrupt Pin select"] +pub type Extipinsel3R = crate::FieldReader; +impl Extipinsel3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPINSEL3_A { + pub const fn variant(&self) -> Extipinsel3 { match self.bits { - 0 => EXTIPINSEL3_A::PIN8, - 1 => EXTIPINSEL3_A::PIN9, - 2 => EXTIPINSEL3_A::PIN10, - 3 => EXTIPINSEL3_A::PIN11, + 0 => Extipinsel3::Pin8, + 1 => Extipinsel3::Pin9, + 2 => Extipinsel3::Pin10, + 3 => Extipinsel3::Pin11, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN8`"] + #[doc = "OFFSET=8"] #[inline(always)] pub fn is_pin8(&self) -> bool { - *self == EXTIPINSEL3_A::PIN8 + *self == Extipinsel3::Pin8 } - #[doc = "Checks if the value of the field is `PIN9`"] + #[doc = "OFFSET=9"] #[inline(always)] pub fn is_pin9(&self) -> bool { - *self == EXTIPINSEL3_A::PIN9 + *self == Extipinsel3::Pin9 } - #[doc = "Checks if the value of the field is `PIN10`"] + #[doc = "OFFSET=10"] #[inline(always)] pub fn is_pin10(&self) -> bool { - *self == EXTIPINSEL3_A::PIN10 + *self == Extipinsel3::Pin10 } - #[doc = "Checks if the value of the field is `PIN11`"] + #[doc = "OFFSET=11"] #[inline(always)] pub fn is_pin11(&self) -> bool { - *self == EXTIPINSEL3_A::PIN11 + *self == Extipinsel3::Pin11 } } #[doc = "Field `EXTIPINSEL3` writer - External Interrupt Pin select"] -pub type EXTIPINSEL3_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPINSELH_SPEC, u8, EXTIPINSEL3_A, 2, O>; -impl<'a, const O: u8> EXTIPINSEL3_W<'a, O> { +pub type Extipinsel3W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipinsel3, crate::Safe>; +impl<'a, REG> Extipinsel3W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "OFFSET=8"] #[inline(always)] - pub fn pin8(self) -> &'a mut W { - self.variant(EXTIPINSEL3_A::PIN8) + pub fn pin8(self) -> &'a mut crate::W { + self.variant(Extipinsel3::Pin8) } #[doc = "OFFSET=9"] #[inline(always)] - pub fn pin9(self) -> &'a mut W { - self.variant(EXTIPINSEL3_A::PIN9) + pub fn pin9(self) -> &'a mut crate::W { + self.variant(Extipinsel3::Pin9) } #[doc = "OFFSET=10"] #[inline(always)] - pub fn pin10(self) -> &'a mut W { - self.variant(EXTIPINSEL3_A::PIN10) + pub fn pin10(self) -> &'a mut crate::W { + self.variant(Extipinsel3::Pin10) } #[doc = "OFFSET=11"] #[inline(always)] - pub fn pin11(self) -> &'a mut W { - self.variant(EXTIPINSEL3_A::PIN11) + pub fn pin11(self) -> &'a mut crate::W { + self.variant(Extipinsel3::Pin11) } } impl R { #[doc = "Bits 0:1 - External Interrupt Pin select"] #[inline(always)] - pub fn extipinsel0(&self) -> EXTIPINSEL0_R { - EXTIPINSEL0_R::new((self.bits & 3) as u8) + pub fn extipinsel0(&self) -> Extipinsel0R { + Extipinsel0R::new((self.bits & 3) as u8) } #[doc = "Bits 4:5 - External Interrupt Pin select"] #[inline(always)] - pub fn extipinsel1(&self) -> EXTIPINSEL1_R { - EXTIPINSEL1_R::new(((self.bits >> 4) & 3) as u8) + pub fn extipinsel1(&self) -> Extipinsel1R { + Extipinsel1R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 8:9 - External Interrupt Pin select"] #[inline(always)] - pub fn extipinsel2(&self) -> EXTIPINSEL2_R { - EXTIPINSEL2_R::new(((self.bits >> 8) & 3) as u8) + pub fn extipinsel2(&self) -> Extipinsel2R { + Extipinsel2R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 12:13 - External Interrupt Pin select"] #[inline(always)] - pub fn extipinsel3(&self) -> EXTIPINSEL3_R { - EXTIPINSEL3_R::new(((self.bits >> 12) & 3) as u8) + pub fn extipinsel3(&self) -> Extipinsel3R { + Extipinsel3R::new(((self.bits >> 12) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - External Interrupt Pin select"] #[inline(always)] #[must_use] - pub fn extipinsel0(&mut self) -> EXTIPINSEL0_W<0> { - EXTIPINSEL0_W::new(self) + pub fn extipinsel0(&mut self) -> Extipinsel0W { + Extipinsel0W::new(self, 0) } #[doc = "Bits 4:5 - External Interrupt Pin select"] #[inline(always)] #[must_use] - pub fn extipinsel1(&mut self) -> EXTIPINSEL1_W<4> { - EXTIPINSEL1_W::new(self) + pub fn extipinsel1(&mut self) -> Extipinsel1W { + Extipinsel1W::new(self, 4) } #[doc = "Bits 8:9 - External Interrupt Pin select"] #[inline(always)] #[must_use] - pub fn extipinsel2(&mut self) -> EXTIPINSEL2_W<8> { - EXTIPINSEL2_W::new(self) + pub fn extipinsel2(&mut self) -> Extipinsel2W { + Extipinsel2W::new(self, 8) } #[doc = "Bits 12:13 - External Interrupt Pin select"] #[inline(always)] #[must_use] - pub fn extipinsel3(&mut self) -> EXTIPINSEL3_W<12> { - EXTIPINSEL3_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn extipinsel3(&mut self) -> Extipinsel3W { + Extipinsel3W::new(self, 12) } } -#[doc = "External Interrupt Pin Select High\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [extipinselh](index.html) module"] -pub struct EXTIPINSELH_SPEC; -impl crate::RegisterSpec for EXTIPINSELH_SPEC { +#[doc = "External Interrupt Pin Select High\n\nYou can [`read`](crate::Reg::read) this register and get [`extipinselh::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`extipinselh::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ExtipinselhSpec; +impl crate::RegisterSpec for ExtipinselhSpec { type Ux = u32; } -#[doc = "`read()` method returns [extipinselh::R](R) reader structure"] -impl crate::Readable for EXTIPINSELH_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [extipinselh::W](W) writer structure"] -impl crate::Writable for EXTIPINSELH_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`extipinselh::R`](R) reader structure"] +impl crate::Readable for ExtipinselhSpec {} +#[doc = "`write(|w| ..)` method takes [`extipinselh::W`](W) writer structure"] +impl crate::Writable for ExtipinselhSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EXTIPINSELH to value 0"] -impl crate::Resettable for EXTIPINSELH_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ExtipinselhSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/extipinsell.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/extipinsell.rs index 3150946..0d94dc7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/extipinsell.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/extipinsell.rs @@ -1,785 +1,801 @@ #[doc = "Register `EXTIPINSELL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EXTIPINSELL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EXTIPINSEL0` reader - External Interrupt Pin select"] -pub type EXTIPINSEL0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "External Interrupt Pin select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPINSEL0_A { +pub enum Extipinsel0 { #[doc = "0: OFFSET=0"] - PIN0 = 0, + Pin0 = 0, #[doc = "1: OFFSET=1"] - PIN1 = 1, + Pin1 = 1, #[doc = "2: OFFSET=2"] - PIN2 = 2, + Pin2 = 2, #[doc = "3: OFFSET=3"] - PIN3 = 3, + Pin3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPINSEL0_A) -> Self { + fn from(variant: Extipinsel0) -> Self { variant as _ } } -impl EXTIPINSEL0_R { +impl crate::FieldSpec for Extipinsel0 { + type Ux = u8; +} +impl crate::IsEnum for Extipinsel0 {} +#[doc = "Field `EXTIPINSEL0` reader - External Interrupt Pin select"] +pub type Extipinsel0R = crate::FieldReader; +impl Extipinsel0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPINSEL0_A { + pub const fn variant(&self) -> Extipinsel0 { match self.bits { - 0 => EXTIPINSEL0_A::PIN0, - 1 => EXTIPINSEL0_A::PIN1, - 2 => EXTIPINSEL0_A::PIN2, - 3 => EXTIPINSEL0_A::PIN3, + 0 => Extipinsel0::Pin0, + 1 => Extipinsel0::Pin1, + 2 => Extipinsel0::Pin2, + 3 => Extipinsel0::Pin3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN0`"] + #[doc = "OFFSET=0"] #[inline(always)] pub fn is_pin0(&self) -> bool { - *self == EXTIPINSEL0_A::PIN0 + *self == Extipinsel0::Pin0 } - #[doc = "Checks if the value of the field is `PIN1`"] + #[doc = "OFFSET=1"] #[inline(always)] pub fn is_pin1(&self) -> bool { - *self == EXTIPINSEL0_A::PIN1 + *self == Extipinsel0::Pin1 } - #[doc = "Checks if the value of the field is `PIN2`"] + #[doc = "OFFSET=2"] #[inline(always)] pub fn is_pin2(&self) -> bool { - *self == EXTIPINSEL0_A::PIN2 + *self == Extipinsel0::Pin2 } - #[doc = "Checks if the value of the field is `PIN3`"] + #[doc = "OFFSET=3"] #[inline(always)] pub fn is_pin3(&self) -> bool { - *self == EXTIPINSEL0_A::PIN3 + *self == Extipinsel0::Pin3 } } #[doc = "Field `EXTIPINSEL0` writer - External Interrupt Pin select"] -pub type EXTIPINSEL0_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPINSELL_SPEC, u8, EXTIPINSEL0_A, 2, O>; -impl<'a, const O: u8> EXTIPINSEL0_W<'a, O> { +pub type Extipinsel0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipinsel0, crate::Safe>; +impl<'a, REG> Extipinsel0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "OFFSET=0"] #[inline(always)] - pub fn pin0(self) -> &'a mut W { - self.variant(EXTIPINSEL0_A::PIN0) + pub fn pin0(self) -> &'a mut crate::W { + self.variant(Extipinsel0::Pin0) } #[doc = "OFFSET=1"] #[inline(always)] - pub fn pin1(self) -> &'a mut W { - self.variant(EXTIPINSEL0_A::PIN1) + pub fn pin1(self) -> &'a mut crate::W { + self.variant(Extipinsel0::Pin1) } #[doc = "OFFSET=2"] #[inline(always)] - pub fn pin2(self) -> &'a mut W { - self.variant(EXTIPINSEL0_A::PIN2) + pub fn pin2(self) -> &'a mut crate::W { + self.variant(Extipinsel0::Pin2) } #[doc = "OFFSET=3"] #[inline(always)] - pub fn pin3(self) -> &'a mut W { - self.variant(EXTIPINSEL0_A::PIN3) + pub fn pin3(self) -> &'a mut crate::W { + self.variant(Extipinsel0::Pin3) } } -#[doc = "Field `EXTIPINSEL1` reader - External Interrupt Pin select"] -pub type EXTIPINSEL1_R = crate::FieldReader; #[doc = "External Interrupt Pin select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPINSEL1_A { +pub enum Extipinsel1 { #[doc = "0: OFFSET=0"] - PIN0 = 0, + Pin0 = 0, #[doc = "1: OFFSET=1"] - PIN1 = 1, + Pin1 = 1, #[doc = "2: OFFSET=2"] - PIN2 = 2, + Pin2 = 2, #[doc = "3: OFFSET=3"] - PIN3 = 3, + Pin3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPINSEL1_A) -> Self { + fn from(variant: Extipinsel1) -> Self { variant as _ } } -impl EXTIPINSEL1_R { +impl crate::FieldSpec for Extipinsel1 { + type Ux = u8; +} +impl crate::IsEnum for Extipinsel1 {} +#[doc = "Field `EXTIPINSEL1` reader - External Interrupt Pin select"] +pub type Extipinsel1R = crate::FieldReader; +impl Extipinsel1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPINSEL1_A { + pub const fn variant(&self) -> Extipinsel1 { match self.bits { - 0 => EXTIPINSEL1_A::PIN0, - 1 => EXTIPINSEL1_A::PIN1, - 2 => EXTIPINSEL1_A::PIN2, - 3 => EXTIPINSEL1_A::PIN3, + 0 => Extipinsel1::Pin0, + 1 => Extipinsel1::Pin1, + 2 => Extipinsel1::Pin2, + 3 => Extipinsel1::Pin3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN0`"] + #[doc = "OFFSET=0"] #[inline(always)] pub fn is_pin0(&self) -> bool { - *self == EXTIPINSEL1_A::PIN0 + *self == Extipinsel1::Pin0 } - #[doc = "Checks if the value of the field is `PIN1`"] + #[doc = "OFFSET=1"] #[inline(always)] pub fn is_pin1(&self) -> bool { - *self == EXTIPINSEL1_A::PIN1 + *self == Extipinsel1::Pin1 } - #[doc = "Checks if the value of the field is `PIN2`"] + #[doc = "OFFSET=2"] #[inline(always)] pub fn is_pin2(&self) -> bool { - *self == EXTIPINSEL1_A::PIN2 + *self == Extipinsel1::Pin2 } - #[doc = "Checks if the value of the field is `PIN3`"] + #[doc = "OFFSET=3"] #[inline(always)] pub fn is_pin3(&self) -> bool { - *self == EXTIPINSEL1_A::PIN3 + *self == Extipinsel1::Pin3 } } #[doc = "Field `EXTIPINSEL1` writer - External Interrupt Pin select"] -pub type EXTIPINSEL1_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPINSELL_SPEC, u8, EXTIPINSEL1_A, 2, O>; -impl<'a, const O: u8> EXTIPINSEL1_W<'a, O> { +pub type Extipinsel1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipinsel1, crate::Safe>; +impl<'a, REG> Extipinsel1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "OFFSET=0"] #[inline(always)] - pub fn pin0(self) -> &'a mut W { - self.variant(EXTIPINSEL1_A::PIN0) + pub fn pin0(self) -> &'a mut crate::W { + self.variant(Extipinsel1::Pin0) } #[doc = "OFFSET=1"] #[inline(always)] - pub fn pin1(self) -> &'a mut W { - self.variant(EXTIPINSEL1_A::PIN1) + pub fn pin1(self) -> &'a mut crate::W { + self.variant(Extipinsel1::Pin1) } #[doc = "OFFSET=2"] #[inline(always)] - pub fn pin2(self) -> &'a mut W { - self.variant(EXTIPINSEL1_A::PIN2) + pub fn pin2(self) -> &'a mut crate::W { + self.variant(Extipinsel1::Pin2) } #[doc = "OFFSET=3"] #[inline(always)] - pub fn pin3(self) -> &'a mut W { - self.variant(EXTIPINSEL1_A::PIN3) + pub fn pin3(self) -> &'a mut crate::W { + self.variant(Extipinsel1::Pin3) } } -#[doc = "Field `EXTIPINSEL2` reader - External Interrupt Pin select"] -pub type EXTIPINSEL2_R = crate::FieldReader; #[doc = "External Interrupt Pin select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPINSEL2_A { +pub enum Extipinsel2 { #[doc = "0: OFFSET=0"] - PIN0 = 0, + Pin0 = 0, #[doc = "1: OFFSET=1"] - PIN1 = 1, + Pin1 = 1, #[doc = "2: OFFSET=2"] - PIN2 = 2, + Pin2 = 2, #[doc = "3: OFFSET=3"] - PIN3 = 3, + Pin3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPINSEL2_A) -> Self { + fn from(variant: Extipinsel2) -> Self { variant as _ } } -impl EXTIPINSEL2_R { +impl crate::FieldSpec for Extipinsel2 { + type Ux = u8; +} +impl crate::IsEnum for Extipinsel2 {} +#[doc = "Field `EXTIPINSEL2` reader - External Interrupt Pin select"] +pub type Extipinsel2R = crate::FieldReader; +impl Extipinsel2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPINSEL2_A { + pub const fn variant(&self) -> Extipinsel2 { match self.bits { - 0 => EXTIPINSEL2_A::PIN0, - 1 => EXTIPINSEL2_A::PIN1, - 2 => EXTIPINSEL2_A::PIN2, - 3 => EXTIPINSEL2_A::PIN3, + 0 => Extipinsel2::Pin0, + 1 => Extipinsel2::Pin1, + 2 => Extipinsel2::Pin2, + 3 => Extipinsel2::Pin3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN0`"] + #[doc = "OFFSET=0"] #[inline(always)] pub fn is_pin0(&self) -> bool { - *self == EXTIPINSEL2_A::PIN0 + *self == Extipinsel2::Pin0 } - #[doc = "Checks if the value of the field is `PIN1`"] + #[doc = "OFFSET=1"] #[inline(always)] pub fn is_pin1(&self) -> bool { - *self == EXTIPINSEL2_A::PIN1 + *self == Extipinsel2::Pin1 } - #[doc = "Checks if the value of the field is `PIN2`"] + #[doc = "OFFSET=2"] #[inline(always)] pub fn is_pin2(&self) -> bool { - *self == EXTIPINSEL2_A::PIN2 + *self == Extipinsel2::Pin2 } - #[doc = "Checks if the value of the field is `PIN3`"] + #[doc = "OFFSET=3"] #[inline(always)] pub fn is_pin3(&self) -> bool { - *self == EXTIPINSEL2_A::PIN3 + *self == Extipinsel2::Pin3 } } #[doc = "Field `EXTIPINSEL2` writer - External Interrupt Pin select"] -pub type EXTIPINSEL2_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPINSELL_SPEC, u8, EXTIPINSEL2_A, 2, O>; -impl<'a, const O: u8> EXTIPINSEL2_W<'a, O> { +pub type Extipinsel2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipinsel2, crate::Safe>; +impl<'a, REG> Extipinsel2W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "OFFSET=0"] #[inline(always)] - pub fn pin0(self) -> &'a mut W { - self.variant(EXTIPINSEL2_A::PIN0) + pub fn pin0(self) -> &'a mut crate::W { + self.variant(Extipinsel2::Pin0) } #[doc = "OFFSET=1"] #[inline(always)] - pub fn pin1(self) -> &'a mut W { - self.variant(EXTIPINSEL2_A::PIN1) + pub fn pin1(self) -> &'a mut crate::W { + self.variant(Extipinsel2::Pin1) } #[doc = "OFFSET=2"] #[inline(always)] - pub fn pin2(self) -> &'a mut W { - self.variant(EXTIPINSEL2_A::PIN2) + pub fn pin2(self) -> &'a mut crate::W { + self.variant(Extipinsel2::Pin2) } #[doc = "OFFSET=3"] #[inline(always)] - pub fn pin3(self) -> &'a mut W { - self.variant(EXTIPINSEL2_A::PIN3) + pub fn pin3(self) -> &'a mut crate::W { + self.variant(Extipinsel2::Pin3) } } -#[doc = "Field `EXTIPINSEL3` reader - External Interrupt Pin select"] -pub type EXTIPINSEL3_R = crate::FieldReader; #[doc = "External Interrupt Pin select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPINSEL3_A { +pub enum Extipinsel3 { #[doc = "0: OFFSET=0"] - PIN0 = 0, + Pin0 = 0, #[doc = "1: OFFSET=1"] - PIN1 = 1, + Pin1 = 1, #[doc = "2: OFFSET=2"] - PIN2 = 2, + Pin2 = 2, #[doc = "3: OFFSET=3"] - PIN3 = 3, + Pin3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPINSEL3_A) -> Self { + fn from(variant: Extipinsel3) -> Self { variant as _ } } -impl EXTIPINSEL3_R { +impl crate::FieldSpec for Extipinsel3 { + type Ux = u8; +} +impl crate::IsEnum for Extipinsel3 {} +#[doc = "Field `EXTIPINSEL3` reader - External Interrupt Pin select"] +pub type Extipinsel3R = crate::FieldReader; +impl Extipinsel3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPINSEL3_A { + pub const fn variant(&self) -> Extipinsel3 { match self.bits { - 0 => EXTIPINSEL3_A::PIN0, - 1 => EXTIPINSEL3_A::PIN1, - 2 => EXTIPINSEL3_A::PIN2, - 3 => EXTIPINSEL3_A::PIN3, + 0 => Extipinsel3::Pin0, + 1 => Extipinsel3::Pin1, + 2 => Extipinsel3::Pin2, + 3 => Extipinsel3::Pin3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN0`"] + #[doc = "OFFSET=0"] #[inline(always)] pub fn is_pin0(&self) -> bool { - *self == EXTIPINSEL3_A::PIN0 + *self == Extipinsel3::Pin0 } - #[doc = "Checks if the value of the field is `PIN1`"] + #[doc = "OFFSET=1"] #[inline(always)] pub fn is_pin1(&self) -> bool { - *self == EXTIPINSEL3_A::PIN1 + *self == Extipinsel3::Pin1 } - #[doc = "Checks if the value of the field is `PIN2`"] + #[doc = "OFFSET=2"] #[inline(always)] pub fn is_pin2(&self) -> bool { - *self == EXTIPINSEL3_A::PIN2 + *self == Extipinsel3::Pin2 } - #[doc = "Checks if the value of the field is `PIN3`"] + #[doc = "OFFSET=3"] #[inline(always)] pub fn is_pin3(&self) -> bool { - *self == EXTIPINSEL3_A::PIN3 + *self == Extipinsel3::Pin3 } } #[doc = "Field `EXTIPINSEL3` writer - External Interrupt Pin select"] -pub type EXTIPINSEL3_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPINSELL_SPEC, u8, EXTIPINSEL3_A, 2, O>; -impl<'a, const O: u8> EXTIPINSEL3_W<'a, O> { +pub type Extipinsel3W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipinsel3, crate::Safe>; +impl<'a, REG> Extipinsel3W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "OFFSET=0"] #[inline(always)] - pub fn pin0(self) -> &'a mut W { - self.variant(EXTIPINSEL3_A::PIN0) + pub fn pin0(self) -> &'a mut crate::W { + self.variant(Extipinsel3::Pin0) } #[doc = "OFFSET=1"] #[inline(always)] - pub fn pin1(self) -> &'a mut W { - self.variant(EXTIPINSEL3_A::PIN1) + pub fn pin1(self) -> &'a mut crate::W { + self.variant(Extipinsel3::Pin1) } #[doc = "OFFSET=2"] #[inline(always)] - pub fn pin2(self) -> &'a mut W { - self.variant(EXTIPINSEL3_A::PIN2) + pub fn pin2(self) -> &'a mut crate::W { + self.variant(Extipinsel3::Pin2) } #[doc = "OFFSET=3"] #[inline(always)] - pub fn pin3(self) -> &'a mut W { - self.variant(EXTIPINSEL3_A::PIN3) + pub fn pin3(self) -> &'a mut crate::W { + self.variant(Extipinsel3::Pin3) } } -#[doc = "Field `EXTIPINSEL4` reader - External Interrupt Pin select"] -pub type EXTIPINSEL4_R = crate::FieldReader; #[doc = "External Interrupt Pin select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPINSEL4_A { +pub enum Extipinsel4 { #[doc = "0: OFFSET=0"] - PIN0 = 0, + Pin0 = 0, #[doc = "1: OFFSET=1"] - PIN1 = 1, + Pin1 = 1, #[doc = "2: OFFSET=2"] - PIN2 = 2, + Pin2 = 2, #[doc = "3: OFFSET=3"] - PIN3 = 3, + Pin3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPINSEL4_A) -> Self { + fn from(variant: Extipinsel4) -> Self { variant as _ } } -impl EXTIPINSEL4_R { +impl crate::FieldSpec for Extipinsel4 { + type Ux = u8; +} +impl crate::IsEnum for Extipinsel4 {} +#[doc = "Field `EXTIPINSEL4` reader - External Interrupt Pin select"] +pub type Extipinsel4R = crate::FieldReader; +impl Extipinsel4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPINSEL4_A { + pub const fn variant(&self) -> Extipinsel4 { match self.bits { - 0 => EXTIPINSEL4_A::PIN0, - 1 => EXTIPINSEL4_A::PIN1, - 2 => EXTIPINSEL4_A::PIN2, - 3 => EXTIPINSEL4_A::PIN3, + 0 => Extipinsel4::Pin0, + 1 => Extipinsel4::Pin1, + 2 => Extipinsel4::Pin2, + 3 => Extipinsel4::Pin3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN0`"] + #[doc = "OFFSET=0"] #[inline(always)] pub fn is_pin0(&self) -> bool { - *self == EXTIPINSEL4_A::PIN0 + *self == Extipinsel4::Pin0 } - #[doc = "Checks if the value of the field is `PIN1`"] + #[doc = "OFFSET=1"] #[inline(always)] pub fn is_pin1(&self) -> bool { - *self == EXTIPINSEL4_A::PIN1 + *self == Extipinsel4::Pin1 } - #[doc = "Checks if the value of the field is `PIN2`"] + #[doc = "OFFSET=2"] #[inline(always)] pub fn is_pin2(&self) -> bool { - *self == EXTIPINSEL4_A::PIN2 + *self == Extipinsel4::Pin2 } - #[doc = "Checks if the value of the field is `PIN3`"] + #[doc = "OFFSET=3"] #[inline(always)] pub fn is_pin3(&self) -> bool { - *self == EXTIPINSEL4_A::PIN3 + *self == Extipinsel4::Pin3 } } #[doc = "Field `EXTIPINSEL4` writer - External Interrupt Pin select"] -pub type EXTIPINSEL4_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPINSELL_SPEC, u8, EXTIPINSEL4_A, 2, O>; -impl<'a, const O: u8> EXTIPINSEL4_W<'a, O> { +pub type Extipinsel4W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipinsel4, crate::Safe>; +impl<'a, REG> Extipinsel4W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "OFFSET=0"] #[inline(always)] - pub fn pin0(self) -> &'a mut W { - self.variant(EXTIPINSEL4_A::PIN0) + pub fn pin0(self) -> &'a mut crate::W { + self.variant(Extipinsel4::Pin0) } #[doc = "OFFSET=1"] #[inline(always)] - pub fn pin1(self) -> &'a mut W { - self.variant(EXTIPINSEL4_A::PIN1) + pub fn pin1(self) -> &'a mut crate::W { + self.variant(Extipinsel4::Pin1) } #[doc = "OFFSET=2"] #[inline(always)] - pub fn pin2(self) -> &'a mut W { - self.variant(EXTIPINSEL4_A::PIN2) + pub fn pin2(self) -> &'a mut crate::W { + self.variant(Extipinsel4::Pin2) } #[doc = "OFFSET=3"] #[inline(always)] - pub fn pin3(self) -> &'a mut W { - self.variant(EXTIPINSEL4_A::PIN3) + pub fn pin3(self) -> &'a mut crate::W { + self.variant(Extipinsel4::Pin3) } } -#[doc = "Field `EXTIPINSEL5` reader - External Interrupt Pin select"] -pub type EXTIPINSEL5_R = crate::FieldReader; #[doc = "External Interrupt Pin select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPINSEL5_A { +pub enum Extipinsel5 { #[doc = "0: OFFSET=0"] - PIN0 = 0, + Pin0 = 0, #[doc = "1: OFFSET=1"] - PIN1 = 1, + Pin1 = 1, #[doc = "2: OFFSET=2"] - PIN2 = 2, + Pin2 = 2, #[doc = "3: OFFSET=3"] - PIN3 = 3, + Pin3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPINSEL5_A) -> Self { + fn from(variant: Extipinsel5) -> Self { variant as _ } } -impl EXTIPINSEL5_R { +impl crate::FieldSpec for Extipinsel5 { + type Ux = u8; +} +impl crate::IsEnum for Extipinsel5 {} +#[doc = "Field `EXTIPINSEL5` reader - External Interrupt Pin select"] +pub type Extipinsel5R = crate::FieldReader; +impl Extipinsel5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPINSEL5_A { + pub const fn variant(&self) -> Extipinsel5 { match self.bits { - 0 => EXTIPINSEL5_A::PIN0, - 1 => EXTIPINSEL5_A::PIN1, - 2 => EXTIPINSEL5_A::PIN2, - 3 => EXTIPINSEL5_A::PIN3, + 0 => Extipinsel5::Pin0, + 1 => Extipinsel5::Pin1, + 2 => Extipinsel5::Pin2, + 3 => Extipinsel5::Pin3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN0`"] + #[doc = "OFFSET=0"] #[inline(always)] pub fn is_pin0(&self) -> bool { - *self == EXTIPINSEL5_A::PIN0 + *self == Extipinsel5::Pin0 } - #[doc = "Checks if the value of the field is `PIN1`"] + #[doc = "OFFSET=1"] #[inline(always)] pub fn is_pin1(&self) -> bool { - *self == EXTIPINSEL5_A::PIN1 + *self == Extipinsel5::Pin1 } - #[doc = "Checks if the value of the field is `PIN2`"] + #[doc = "OFFSET=2"] #[inline(always)] pub fn is_pin2(&self) -> bool { - *self == EXTIPINSEL5_A::PIN2 + *self == Extipinsel5::Pin2 } - #[doc = "Checks if the value of the field is `PIN3`"] + #[doc = "OFFSET=3"] #[inline(always)] pub fn is_pin3(&self) -> bool { - *self == EXTIPINSEL5_A::PIN3 + *self == Extipinsel5::Pin3 } } #[doc = "Field `EXTIPINSEL5` writer - External Interrupt Pin select"] -pub type EXTIPINSEL5_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPINSELL_SPEC, u8, EXTIPINSEL5_A, 2, O>; -impl<'a, const O: u8> EXTIPINSEL5_W<'a, O> { +pub type Extipinsel5W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipinsel5, crate::Safe>; +impl<'a, REG> Extipinsel5W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "OFFSET=0"] #[inline(always)] - pub fn pin0(self) -> &'a mut W { - self.variant(EXTIPINSEL5_A::PIN0) + pub fn pin0(self) -> &'a mut crate::W { + self.variant(Extipinsel5::Pin0) } #[doc = "OFFSET=1"] #[inline(always)] - pub fn pin1(self) -> &'a mut W { - self.variant(EXTIPINSEL5_A::PIN1) + pub fn pin1(self) -> &'a mut crate::W { + self.variant(Extipinsel5::Pin1) } #[doc = "OFFSET=2"] #[inline(always)] - pub fn pin2(self) -> &'a mut W { - self.variant(EXTIPINSEL5_A::PIN2) + pub fn pin2(self) -> &'a mut crate::W { + self.variant(Extipinsel5::Pin2) } #[doc = "OFFSET=3"] #[inline(always)] - pub fn pin3(self) -> &'a mut W { - self.variant(EXTIPINSEL5_A::PIN3) + pub fn pin3(self) -> &'a mut crate::W { + self.variant(Extipinsel5::Pin3) } } -#[doc = "Field `EXTIPINSEL6` reader - External Interrupt Pin select"] -pub type EXTIPINSEL6_R = crate::FieldReader; #[doc = "External Interrupt Pin select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPINSEL6_A { +pub enum Extipinsel6 { #[doc = "0: OFFSET=0"] - PIN0 = 0, + Pin0 = 0, #[doc = "1: OFFSET=1"] - PIN1 = 1, + Pin1 = 1, #[doc = "2: OFFSET=2"] - PIN2 = 2, + Pin2 = 2, #[doc = "3: OFFSET=3"] - PIN3 = 3, + Pin3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPINSEL6_A) -> Self { + fn from(variant: Extipinsel6) -> Self { variant as _ } } -impl EXTIPINSEL6_R { +impl crate::FieldSpec for Extipinsel6 { + type Ux = u8; +} +impl crate::IsEnum for Extipinsel6 {} +#[doc = "Field `EXTIPINSEL6` reader - External Interrupt Pin select"] +pub type Extipinsel6R = crate::FieldReader; +impl Extipinsel6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPINSEL6_A { + pub const fn variant(&self) -> Extipinsel6 { match self.bits { - 0 => EXTIPINSEL6_A::PIN0, - 1 => EXTIPINSEL6_A::PIN1, - 2 => EXTIPINSEL6_A::PIN2, - 3 => EXTIPINSEL6_A::PIN3, + 0 => Extipinsel6::Pin0, + 1 => Extipinsel6::Pin1, + 2 => Extipinsel6::Pin2, + 3 => Extipinsel6::Pin3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN0`"] + #[doc = "OFFSET=0"] #[inline(always)] pub fn is_pin0(&self) -> bool { - *self == EXTIPINSEL6_A::PIN0 + *self == Extipinsel6::Pin0 } - #[doc = "Checks if the value of the field is `PIN1`"] + #[doc = "OFFSET=1"] #[inline(always)] pub fn is_pin1(&self) -> bool { - *self == EXTIPINSEL6_A::PIN1 + *self == Extipinsel6::Pin1 } - #[doc = "Checks if the value of the field is `PIN2`"] + #[doc = "OFFSET=2"] #[inline(always)] pub fn is_pin2(&self) -> bool { - *self == EXTIPINSEL6_A::PIN2 + *self == Extipinsel6::Pin2 } - #[doc = "Checks if the value of the field is `PIN3`"] + #[doc = "OFFSET=3"] #[inline(always)] pub fn is_pin3(&self) -> bool { - *self == EXTIPINSEL6_A::PIN3 + *self == Extipinsel6::Pin3 } } #[doc = "Field `EXTIPINSEL6` writer - External Interrupt Pin select"] -pub type EXTIPINSEL6_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPINSELL_SPEC, u8, EXTIPINSEL6_A, 2, O>; -impl<'a, const O: u8> EXTIPINSEL6_W<'a, O> { +pub type Extipinsel6W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipinsel6, crate::Safe>; +impl<'a, REG> Extipinsel6W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "OFFSET=0"] #[inline(always)] - pub fn pin0(self) -> &'a mut W { - self.variant(EXTIPINSEL6_A::PIN0) + pub fn pin0(self) -> &'a mut crate::W { + self.variant(Extipinsel6::Pin0) } #[doc = "OFFSET=1"] #[inline(always)] - pub fn pin1(self) -> &'a mut W { - self.variant(EXTIPINSEL6_A::PIN1) + pub fn pin1(self) -> &'a mut crate::W { + self.variant(Extipinsel6::Pin1) } #[doc = "OFFSET=2"] #[inline(always)] - pub fn pin2(self) -> &'a mut W { - self.variant(EXTIPINSEL6_A::PIN2) + pub fn pin2(self) -> &'a mut crate::W { + self.variant(Extipinsel6::Pin2) } #[doc = "OFFSET=3"] #[inline(always)] - pub fn pin3(self) -> &'a mut W { - self.variant(EXTIPINSEL6_A::PIN3) + pub fn pin3(self) -> &'a mut crate::W { + self.variant(Extipinsel6::Pin3) } } -#[doc = "Field `EXTIPINSEL7` reader - External Interrupt Pin select"] -pub type EXTIPINSEL7_R = crate::FieldReader; #[doc = "External Interrupt Pin select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPINSEL7_A { +pub enum Extipinsel7 { #[doc = "0: OFFSET=0"] - PIN0 = 0, + Pin0 = 0, #[doc = "1: OFFSET=1"] - PIN1 = 1, + Pin1 = 1, #[doc = "2: OFFSET=2"] - PIN2 = 2, + Pin2 = 2, #[doc = "3: OFFSET=3"] - PIN3 = 3, + Pin3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPINSEL7_A) -> Self { + fn from(variant: Extipinsel7) -> Self { variant as _ } } -impl EXTIPINSEL7_R { +impl crate::FieldSpec for Extipinsel7 { + type Ux = u8; +} +impl crate::IsEnum for Extipinsel7 {} +#[doc = "Field `EXTIPINSEL7` reader - External Interrupt Pin select"] +pub type Extipinsel7R = crate::FieldReader; +impl Extipinsel7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPINSEL7_A { + pub const fn variant(&self) -> Extipinsel7 { match self.bits { - 0 => EXTIPINSEL7_A::PIN0, - 1 => EXTIPINSEL7_A::PIN1, - 2 => EXTIPINSEL7_A::PIN2, - 3 => EXTIPINSEL7_A::PIN3, + 0 => Extipinsel7::Pin0, + 1 => Extipinsel7::Pin1, + 2 => Extipinsel7::Pin2, + 3 => Extipinsel7::Pin3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN0`"] + #[doc = "OFFSET=0"] #[inline(always)] pub fn is_pin0(&self) -> bool { - *self == EXTIPINSEL7_A::PIN0 + *self == Extipinsel7::Pin0 } - #[doc = "Checks if the value of the field is `PIN1`"] + #[doc = "OFFSET=1"] #[inline(always)] pub fn is_pin1(&self) -> bool { - *self == EXTIPINSEL7_A::PIN1 + *self == Extipinsel7::Pin1 } - #[doc = "Checks if the value of the field is `PIN2`"] + #[doc = "OFFSET=2"] #[inline(always)] pub fn is_pin2(&self) -> bool { - *self == EXTIPINSEL7_A::PIN2 + *self == Extipinsel7::Pin2 } - #[doc = "Checks if the value of the field is `PIN3`"] + #[doc = "OFFSET=3"] #[inline(always)] pub fn is_pin3(&self) -> bool { - *self == EXTIPINSEL7_A::PIN3 + *self == Extipinsel7::Pin3 } } #[doc = "Field `EXTIPINSEL7` writer - External Interrupt Pin select"] -pub type EXTIPINSEL7_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPINSELL_SPEC, u8, EXTIPINSEL7_A, 2, O>; -impl<'a, const O: u8> EXTIPINSEL7_W<'a, O> { +pub type Extipinsel7W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipinsel7, crate::Safe>; +impl<'a, REG> Extipinsel7W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "OFFSET=0"] #[inline(always)] - pub fn pin0(self) -> &'a mut W { - self.variant(EXTIPINSEL7_A::PIN0) + pub fn pin0(self) -> &'a mut crate::W { + self.variant(Extipinsel7::Pin0) } #[doc = "OFFSET=1"] #[inline(always)] - pub fn pin1(self) -> &'a mut W { - self.variant(EXTIPINSEL7_A::PIN1) + pub fn pin1(self) -> &'a mut crate::W { + self.variant(Extipinsel7::Pin1) } #[doc = "OFFSET=2"] #[inline(always)] - pub fn pin2(self) -> &'a mut W { - self.variant(EXTIPINSEL7_A::PIN2) + pub fn pin2(self) -> &'a mut crate::W { + self.variant(Extipinsel7::Pin2) } #[doc = "OFFSET=3"] #[inline(always)] - pub fn pin3(self) -> &'a mut W { - self.variant(EXTIPINSEL7_A::PIN3) + pub fn pin3(self) -> &'a mut crate::W { + self.variant(Extipinsel7::Pin3) } } impl R { #[doc = "Bits 0:1 - External Interrupt Pin select"] #[inline(always)] - pub fn extipinsel0(&self) -> EXTIPINSEL0_R { - EXTIPINSEL0_R::new((self.bits & 3) as u8) + pub fn extipinsel0(&self) -> Extipinsel0R { + Extipinsel0R::new((self.bits & 3) as u8) } #[doc = "Bits 4:5 - External Interrupt Pin select"] #[inline(always)] - pub fn extipinsel1(&self) -> EXTIPINSEL1_R { - EXTIPINSEL1_R::new(((self.bits >> 4) & 3) as u8) + pub fn extipinsel1(&self) -> Extipinsel1R { + Extipinsel1R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 8:9 - External Interrupt Pin select"] #[inline(always)] - pub fn extipinsel2(&self) -> EXTIPINSEL2_R { - EXTIPINSEL2_R::new(((self.bits >> 8) & 3) as u8) + pub fn extipinsel2(&self) -> Extipinsel2R { + Extipinsel2R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 12:13 - External Interrupt Pin select"] #[inline(always)] - pub fn extipinsel3(&self) -> EXTIPINSEL3_R { - EXTIPINSEL3_R::new(((self.bits >> 12) & 3) as u8) + pub fn extipinsel3(&self) -> Extipinsel3R { + Extipinsel3R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 16:17 - External Interrupt Pin select"] #[inline(always)] - pub fn extipinsel4(&self) -> EXTIPINSEL4_R { - EXTIPINSEL4_R::new(((self.bits >> 16) & 3) as u8) + pub fn extipinsel4(&self) -> Extipinsel4R { + Extipinsel4R::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 20:21 - External Interrupt Pin select"] #[inline(always)] - pub fn extipinsel5(&self) -> EXTIPINSEL5_R { - EXTIPINSEL5_R::new(((self.bits >> 20) & 3) as u8) + pub fn extipinsel5(&self) -> Extipinsel5R { + Extipinsel5R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 24:25 - External Interrupt Pin select"] #[inline(always)] - pub fn extipinsel6(&self) -> EXTIPINSEL6_R { - EXTIPINSEL6_R::new(((self.bits >> 24) & 3) as u8) + pub fn extipinsel6(&self) -> Extipinsel6R { + Extipinsel6R::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 28:29 - External Interrupt Pin select"] #[inline(always)] - pub fn extipinsel7(&self) -> EXTIPINSEL7_R { - EXTIPINSEL7_R::new(((self.bits >> 28) & 3) as u8) + pub fn extipinsel7(&self) -> Extipinsel7R { + Extipinsel7R::new(((self.bits >> 28) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - External Interrupt Pin select"] #[inline(always)] #[must_use] - pub fn extipinsel0(&mut self) -> EXTIPINSEL0_W<0> { - EXTIPINSEL0_W::new(self) + pub fn extipinsel0(&mut self) -> Extipinsel0W { + Extipinsel0W::new(self, 0) } #[doc = "Bits 4:5 - External Interrupt Pin select"] #[inline(always)] #[must_use] - pub fn extipinsel1(&mut self) -> EXTIPINSEL1_W<4> { - EXTIPINSEL1_W::new(self) + pub fn extipinsel1(&mut self) -> Extipinsel1W { + Extipinsel1W::new(self, 4) } #[doc = "Bits 8:9 - External Interrupt Pin select"] #[inline(always)] #[must_use] - pub fn extipinsel2(&mut self) -> EXTIPINSEL2_W<8> { - EXTIPINSEL2_W::new(self) + pub fn extipinsel2(&mut self) -> Extipinsel2W { + Extipinsel2W::new(self, 8) } #[doc = "Bits 12:13 - External Interrupt Pin select"] #[inline(always)] #[must_use] - pub fn extipinsel3(&mut self) -> EXTIPINSEL3_W<12> { - EXTIPINSEL3_W::new(self) + pub fn extipinsel3(&mut self) -> Extipinsel3W { + Extipinsel3W::new(self, 12) } #[doc = "Bits 16:17 - External Interrupt Pin select"] #[inline(always)] #[must_use] - pub fn extipinsel4(&mut self) -> EXTIPINSEL4_W<16> { - EXTIPINSEL4_W::new(self) + pub fn extipinsel4(&mut self) -> Extipinsel4W { + Extipinsel4W::new(self, 16) } #[doc = "Bits 20:21 - External Interrupt Pin select"] #[inline(always)] #[must_use] - pub fn extipinsel5(&mut self) -> EXTIPINSEL5_W<20> { - EXTIPINSEL5_W::new(self) + pub fn extipinsel5(&mut self) -> Extipinsel5W { + Extipinsel5W::new(self, 20) } #[doc = "Bits 24:25 - External Interrupt Pin select"] #[inline(always)] #[must_use] - pub fn extipinsel6(&mut self) -> EXTIPINSEL6_W<24> { - EXTIPINSEL6_W::new(self) + pub fn extipinsel6(&mut self) -> Extipinsel6W { + Extipinsel6W::new(self, 24) } #[doc = "Bits 28:29 - External Interrupt Pin select"] #[inline(always)] #[must_use] - pub fn extipinsel7(&mut self) -> EXTIPINSEL7_W<28> { - EXTIPINSEL7_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn extipinsel7(&mut self) -> Extipinsel7W { + Extipinsel7W::new(self, 28) } } -#[doc = "External Interrupt Pin Select Low\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [extipinsell](index.html) module"] -pub struct EXTIPINSELL_SPEC; -impl crate::RegisterSpec for EXTIPINSELL_SPEC { +#[doc = "External Interrupt Pin Select Low\n\nYou can [`read`](crate::Reg::read) this register and get [`extipinsell::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`extipinsell::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ExtipinsellSpec; +impl crate::RegisterSpec for ExtipinsellSpec { type Ux = u32; } -#[doc = "`read()` method returns [extipinsell::R](R) reader structure"] -impl crate::Readable for EXTIPINSELL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [extipinsell::W](W) writer structure"] -impl crate::Writable for EXTIPINSELL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`extipinsell::R`](R) reader structure"] +impl crate::Readable for ExtipinsellSpec {} +#[doc = "`write(|w| ..)` method takes [`extipinsell::W`](W) writer structure"] +impl crate::Writable for ExtipinsellSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EXTIPINSELL to value 0"] -impl crate::Resettable for EXTIPINSELL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ExtipinsellSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/extipselh.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/extipselh.rs index 2824b51..0084195 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/extipselh.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/extipselh.rs @@ -1,425 +1,413 @@ #[doc = "Register `EXTIPSELH` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EXTIPSELH` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EXTIPSEL0` reader - External Interrupt Port Select"] -pub type EXTIPSEL0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "External Interrupt Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPSEL0_A { +pub enum Extipsel0 { #[doc = "0: Port A group selected"] - PORTA = 0, + Porta = 0, #[doc = "1: Port B group selected"] - PORTB = 1, + Portb = 1, #[doc = "2: Port C group selected"] - PORTC = 2, + Portc = 2, #[doc = "3: Port D group selected"] - PORTD = 3, + Portd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPSEL0_A) -> Self { + fn from(variant: Extipsel0) -> Self { variant as _ } } -impl EXTIPSEL0_R { +impl crate::FieldSpec for Extipsel0 { + type Ux = u8; +} +impl crate::IsEnum for Extipsel0 {} +#[doc = "Field `EXTIPSEL0` reader - External Interrupt Port Select"] +pub type Extipsel0R = crate::FieldReader; +impl Extipsel0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPSEL0_A { + pub const fn variant(&self) -> Extipsel0 { match self.bits { - 0 => EXTIPSEL0_A::PORTA, - 1 => EXTIPSEL0_A::PORTB, - 2 => EXTIPSEL0_A::PORTC, - 3 => EXTIPSEL0_A::PORTD, + 0 => Extipsel0::Porta, + 1 => Extipsel0::Portb, + 2 => Extipsel0::Portc, + 3 => Extipsel0::Portd, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A group selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == EXTIPSEL0_A::PORTA + *self == Extipsel0::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B group selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == EXTIPSEL0_A::PORTB + *self == Extipsel0::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C group selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == EXTIPSEL0_A::PORTC + *self == Extipsel0::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D group selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == EXTIPSEL0_A::PORTD + *self == Extipsel0::Portd } } #[doc = "Field `EXTIPSEL0` writer - External Interrupt Port Select"] -pub type EXTIPSEL0_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPSELH_SPEC, u8, EXTIPSEL0_A, 2, O>; -impl<'a, const O: u8> EXTIPSEL0_W<'a, O> { +pub type Extipsel0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipsel0, crate::Safe>; +impl<'a, REG> Extipsel0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Port A group selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(EXTIPSEL0_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Extipsel0::Porta) } #[doc = "Port B group selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(EXTIPSEL0_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Extipsel0::Portb) } #[doc = "Port C group selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(EXTIPSEL0_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Extipsel0::Portc) } #[doc = "Port D group selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(EXTIPSEL0_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Extipsel0::Portd) } } -#[doc = "Field `EXTIPSEL1` reader - External Interrupt Port Select"] -pub type EXTIPSEL1_R = crate::FieldReader; #[doc = "External Interrupt Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPSEL1_A { +pub enum Extipsel1 { #[doc = "0: Port A group selected"] - PORTA = 0, + Porta = 0, #[doc = "1: Port B group selected"] - PORTB = 1, + Portb = 1, #[doc = "2: Port C group selected"] - PORTC = 2, + Portc = 2, #[doc = "3: Port D group selected"] - PORTD = 3, + Portd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPSEL1_A) -> Self { + fn from(variant: Extipsel1) -> Self { variant as _ } } -impl EXTIPSEL1_R { +impl crate::FieldSpec for Extipsel1 { + type Ux = u8; +} +impl crate::IsEnum for Extipsel1 {} +#[doc = "Field `EXTIPSEL1` reader - External Interrupt Port Select"] +pub type Extipsel1R = crate::FieldReader; +impl Extipsel1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPSEL1_A { + pub const fn variant(&self) -> Extipsel1 { match self.bits { - 0 => EXTIPSEL1_A::PORTA, - 1 => EXTIPSEL1_A::PORTB, - 2 => EXTIPSEL1_A::PORTC, - 3 => EXTIPSEL1_A::PORTD, + 0 => Extipsel1::Porta, + 1 => Extipsel1::Portb, + 2 => Extipsel1::Portc, + 3 => Extipsel1::Portd, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A group selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == EXTIPSEL1_A::PORTA + *self == Extipsel1::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B group selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == EXTIPSEL1_A::PORTB + *self == Extipsel1::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C group selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == EXTIPSEL1_A::PORTC + *self == Extipsel1::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D group selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == EXTIPSEL1_A::PORTD + *self == Extipsel1::Portd } } #[doc = "Field `EXTIPSEL1` writer - External Interrupt Port Select"] -pub type EXTIPSEL1_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPSELH_SPEC, u8, EXTIPSEL1_A, 2, O>; -impl<'a, const O: u8> EXTIPSEL1_W<'a, O> { +pub type Extipsel1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipsel1, crate::Safe>; +impl<'a, REG> Extipsel1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Port A group selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(EXTIPSEL1_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Extipsel1::Porta) } #[doc = "Port B group selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(EXTIPSEL1_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Extipsel1::Portb) } #[doc = "Port C group selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(EXTIPSEL1_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Extipsel1::Portc) } #[doc = "Port D group selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(EXTIPSEL1_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Extipsel1::Portd) } } -#[doc = "Field `EXTIPSEL2` reader - External Interrupt Port Select"] -pub type EXTIPSEL2_R = crate::FieldReader; #[doc = "External Interrupt Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPSEL2_A { +pub enum Extipsel2 { #[doc = "0: Port A group selected"] - PORTA = 0, + Porta = 0, #[doc = "1: Port B group selected"] - PORTB = 1, + Portb = 1, #[doc = "2: Port C group selected"] - PORTC = 2, + Portc = 2, #[doc = "3: Port D group selected"] - PORTD = 3, + Portd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPSEL2_A) -> Self { + fn from(variant: Extipsel2) -> Self { variant as _ } } -impl EXTIPSEL2_R { +impl crate::FieldSpec for Extipsel2 { + type Ux = u8; +} +impl crate::IsEnum for Extipsel2 {} +#[doc = "Field `EXTIPSEL2` reader - External Interrupt Port Select"] +pub type Extipsel2R = crate::FieldReader; +impl Extipsel2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPSEL2_A { + pub const fn variant(&self) -> Extipsel2 { match self.bits { - 0 => EXTIPSEL2_A::PORTA, - 1 => EXTIPSEL2_A::PORTB, - 2 => EXTIPSEL2_A::PORTC, - 3 => EXTIPSEL2_A::PORTD, + 0 => Extipsel2::Porta, + 1 => Extipsel2::Portb, + 2 => Extipsel2::Portc, + 3 => Extipsel2::Portd, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A group selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == EXTIPSEL2_A::PORTA + *self == Extipsel2::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B group selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == EXTIPSEL2_A::PORTB + *self == Extipsel2::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C group selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == EXTIPSEL2_A::PORTC + *self == Extipsel2::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D group selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == EXTIPSEL2_A::PORTD + *self == Extipsel2::Portd } } #[doc = "Field `EXTIPSEL2` writer - External Interrupt Port Select"] -pub type EXTIPSEL2_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPSELH_SPEC, u8, EXTIPSEL2_A, 2, O>; -impl<'a, const O: u8> EXTIPSEL2_W<'a, O> { +pub type Extipsel2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipsel2, crate::Safe>; +impl<'a, REG> Extipsel2W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Port A group selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(EXTIPSEL2_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Extipsel2::Porta) } #[doc = "Port B group selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(EXTIPSEL2_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Extipsel2::Portb) } #[doc = "Port C group selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(EXTIPSEL2_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Extipsel2::Portc) } #[doc = "Port D group selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(EXTIPSEL2_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Extipsel2::Portd) } } -#[doc = "Field `EXTIPSEL3` reader - External Interrupt Port Select"] -pub type EXTIPSEL3_R = crate::FieldReader; #[doc = "External Interrupt Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPSEL3_A { +pub enum Extipsel3 { #[doc = "0: Port A group selected"] - PORTA = 0, + Porta = 0, #[doc = "1: Port B group selected"] - PORTB = 1, + Portb = 1, #[doc = "2: Port C group selected"] - PORTC = 2, + Portc = 2, #[doc = "3: Port D group selected"] - PORTD = 3, + Portd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPSEL3_A) -> Self { + fn from(variant: Extipsel3) -> Self { variant as _ } } -impl EXTIPSEL3_R { +impl crate::FieldSpec for Extipsel3 { + type Ux = u8; +} +impl crate::IsEnum for Extipsel3 {} +#[doc = "Field `EXTIPSEL3` reader - External Interrupt Port Select"] +pub type Extipsel3R = crate::FieldReader; +impl Extipsel3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPSEL3_A { + pub const fn variant(&self) -> Extipsel3 { match self.bits { - 0 => EXTIPSEL3_A::PORTA, - 1 => EXTIPSEL3_A::PORTB, - 2 => EXTIPSEL3_A::PORTC, - 3 => EXTIPSEL3_A::PORTD, + 0 => Extipsel3::Porta, + 1 => Extipsel3::Portb, + 2 => Extipsel3::Portc, + 3 => Extipsel3::Portd, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A group selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == EXTIPSEL3_A::PORTA + *self == Extipsel3::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B group selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == EXTIPSEL3_A::PORTB + *self == Extipsel3::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C group selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == EXTIPSEL3_A::PORTC + *self == Extipsel3::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D group selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == EXTIPSEL3_A::PORTD + *self == Extipsel3::Portd } } #[doc = "Field `EXTIPSEL3` writer - External Interrupt Port Select"] -pub type EXTIPSEL3_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPSELH_SPEC, u8, EXTIPSEL3_A, 2, O>; -impl<'a, const O: u8> EXTIPSEL3_W<'a, O> { +pub type Extipsel3W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipsel3, crate::Safe>; +impl<'a, REG> Extipsel3W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Port A group selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(EXTIPSEL3_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Extipsel3::Porta) } #[doc = "Port B group selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(EXTIPSEL3_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Extipsel3::Portb) } #[doc = "Port C group selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(EXTIPSEL3_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Extipsel3::Portc) } #[doc = "Port D group selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(EXTIPSEL3_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Extipsel3::Portd) } } impl R { #[doc = "Bits 0:1 - External Interrupt Port Select"] #[inline(always)] - pub fn extipsel0(&self) -> EXTIPSEL0_R { - EXTIPSEL0_R::new((self.bits & 3) as u8) + pub fn extipsel0(&self) -> Extipsel0R { + Extipsel0R::new((self.bits & 3) as u8) } #[doc = "Bits 4:5 - External Interrupt Port Select"] #[inline(always)] - pub fn extipsel1(&self) -> EXTIPSEL1_R { - EXTIPSEL1_R::new(((self.bits >> 4) & 3) as u8) + pub fn extipsel1(&self) -> Extipsel1R { + Extipsel1R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 8:9 - External Interrupt Port Select"] #[inline(always)] - pub fn extipsel2(&self) -> EXTIPSEL2_R { - EXTIPSEL2_R::new(((self.bits >> 8) & 3) as u8) + pub fn extipsel2(&self) -> Extipsel2R { + Extipsel2R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 12:13 - External Interrupt Port Select"] #[inline(always)] - pub fn extipsel3(&self) -> EXTIPSEL3_R { - EXTIPSEL3_R::new(((self.bits >> 12) & 3) as u8) + pub fn extipsel3(&self) -> Extipsel3R { + Extipsel3R::new(((self.bits >> 12) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - External Interrupt Port Select"] #[inline(always)] #[must_use] - pub fn extipsel0(&mut self) -> EXTIPSEL0_W<0> { - EXTIPSEL0_W::new(self) + pub fn extipsel0(&mut self) -> Extipsel0W { + Extipsel0W::new(self, 0) } #[doc = "Bits 4:5 - External Interrupt Port Select"] #[inline(always)] #[must_use] - pub fn extipsel1(&mut self) -> EXTIPSEL1_W<4> { - EXTIPSEL1_W::new(self) + pub fn extipsel1(&mut self) -> Extipsel1W { + Extipsel1W::new(self, 4) } #[doc = "Bits 8:9 - External Interrupt Port Select"] #[inline(always)] #[must_use] - pub fn extipsel2(&mut self) -> EXTIPSEL2_W<8> { - EXTIPSEL2_W::new(self) + pub fn extipsel2(&mut self) -> Extipsel2W { + Extipsel2W::new(self, 8) } #[doc = "Bits 12:13 - External Interrupt Port Select"] #[inline(always)] #[must_use] - pub fn extipsel3(&mut self) -> EXTIPSEL3_W<12> { - EXTIPSEL3_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn extipsel3(&mut self) -> Extipsel3W { + Extipsel3W::new(self, 12) } } -#[doc = "External interrupt Port Select High\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [extipselh](index.html) module"] -pub struct EXTIPSELH_SPEC; -impl crate::RegisterSpec for EXTIPSELH_SPEC { +#[doc = "External interrupt Port Select High\n\nYou can [`read`](crate::Reg::read) this register and get [`extipselh::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`extipselh::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ExtipselhSpec; +impl crate::RegisterSpec for ExtipselhSpec { type Ux = u32; } -#[doc = "`read()` method returns [extipselh::R](R) reader structure"] -impl crate::Readable for EXTIPSELH_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [extipselh::W](W) writer structure"] -impl crate::Writable for EXTIPSELH_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`extipselh::R`](R) reader structure"] +impl crate::Readable for ExtipselhSpec {} +#[doc = "`write(|w| ..)` method takes [`extipselh::W`](W) writer structure"] +impl crate::Writable for ExtipselhSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EXTIPSELH to value 0"] -impl crate::Resettable for EXTIPSELH_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ExtipselhSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/extipsell.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/extipsell.rs index e09d6f1..ff3b3f2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/extipsell.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/extipsell.rs @@ -1,785 +1,801 @@ #[doc = "Register `EXTIPSELL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EXTIPSELL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EXTIPSEL0` reader - External Interrupt Port Select"] -pub type EXTIPSEL0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "External Interrupt Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPSEL0_A { +pub enum Extipsel0 { #[doc = "0: Port A group selected"] - PORTA = 0, + Porta = 0, #[doc = "1: Port B group selected"] - PORTB = 1, + Portb = 1, #[doc = "2: Port C group selected"] - PORTC = 2, + Portc = 2, #[doc = "3: Port D group selected"] - PORTD = 3, + Portd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPSEL0_A) -> Self { + fn from(variant: Extipsel0) -> Self { variant as _ } } -impl EXTIPSEL0_R { +impl crate::FieldSpec for Extipsel0 { + type Ux = u8; +} +impl crate::IsEnum for Extipsel0 {} +#[doc = "Field `EXTIPSEL0` reader - External Interrupt Port Select"] +pub type Extipsel0R = crate::FieldReader; +impl Extipsel0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPSEL0_A { + pub const fn variant(&self) -> Extipsel0 { match self.bits { - 0 => EXTIPSEL0_A::PORTA, - 1 => EXTIPSEL0_A::PORTB, - 2 => EXTIPSEL0_A::PORTC, - 3 => EXTIPSEL0_A::PORTD, + 0 => Extipsel0::Porta, + 1 => Extipsel0::Portb, + 2 => Extipsel0::Portc, + 3 => Extipsel0::Portd, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A group selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == EXTIPSEL0_A::PORTA + *self == Extipsel0::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B group selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == EXTIPSEL0_A::PORTB + *self == Extipsel0::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C group selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == EXTIPSEL0_A::PORTC + *self == Extipsel0::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D group selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == EXTIPSEL0_A::PORTD + *self == Extipsel0::Portd } } #[doc = "Field `EXTIPSEL0` writer - External Interrupt Port Select"] -pub type EXTIPSEL0_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL0_A, 2, O>; -impl<'a, const O: u8> EXTIPSEL0_W<'a, O> { +pub type Extipsel0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipsel0, crate::Safe>; +impl<'a, REG> Extipsel0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Port A group selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(EXTIPSEL0_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Extipsel0::Porta) } #[doc = "Port B group selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(EXTIPSEL0_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Extipsel0::Portb) } #[doc = "Port C group selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(EXTIPSEL0_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Extipsel0::Portc) } #[doc = "Port D group selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(EXTIPSEL0_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Extipsel0::Portd) } } -#[doc = "Field `EXTIPSEL1` reader - External Interrupt Port Select"] -pub type EXTIPSEL1_R = crate::FieldReader; #[doc = "External Interrupt Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPSEL1_A { +pub enum Extipsel1 { #[doc = "0: Port A group selected"] - PORTA = 0, + Porta = 0, #[doc = "1: Port B group selected"] - PORTB = 1, + Portb = 1, #[doc = "2: Port C group selected"] - PORTC = 2, + Portc = 2, #[doc = "3: Port D group selected"] - PORTD = 3, + Portd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPSEL1_A) -> Self { + fn from(variant: Extipsel1) -> Self { variant as _ } } -impl EXTIPSEL1_R { +impl crate::FieldSpec for Extipsel1 { + type Ux = u8; +} +impl crate::IsEnum for Extipsel1 {} +#[doc = "Field `EXTIPSEL1` reader - External Interrupt Port Select"] +pub type Extipsel1R = crate::FieldReader; +impl Extipsel1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPSEL1_A { + pub const fn variant(&self) -> Extipsel1 { match self.bits { - 0 => EXTIPSEL1_A::PORTA, - 1 => EXTIPSEL1_A::PORTB, - 2 => EXTIPSEL1_A::PORTC, - 3 => EXTIPSEL1_A::PORTD, + 0 => Extipsel1::Porta, + 1 => Extipsel1::Portb, + 2 => Extipsel1::Portc, + 3 => Extipsel1::Portd, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A group selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == EXTIPSEL1_A::PORTA + *self == Extipsel1::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B group selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == EXTIPSEL1_A::PORTB + *self == Extipsel1::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C group selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == EXTIPSEL1_A::PORTC + *self == Extipsel1::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D group selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == EXTIPSEL1_A::PORTD + *self == Extipsel1::Portd } } #[doc = "Field `EXTIPSEL1` writer - External Interrupt Port Select"] -pub type EXTIPSEL1_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL1_A, 2, O>; -impl<'a, const O: u8> EXTIPSEL1_W<'a, O> { +pub type Extipsel1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipsel1, crate::Safe>; +impl<'a, REG> Extipsel1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Port A group selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(EXTIPSEL1_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Extipsel1::Porta) } #[doc = "Port B group selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(EXTIPSEL1_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Extipsel1::Portb) } #[doc = "Port C group selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(EXTIPSEL1_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Extipsel1::Portc) } #[doc = "Port D group selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(EXTIPSEL1_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Extipsel1::Portd) } } -#[doc = "Field `EXTIPSEL2` reader - External Interrupt Port Select"] -pub type EXTIPSEL2_R = crate::FieldReader; #[doc = "External Interrupt Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPSEL2_A { +pub enum Extipsel2 { #[doc = "0: Port A group selected"] - PORTA = 0, + Porta = 0, #[doc = "1: Port B group selected"] - PORTB = 1, + Portb = 1, #[doc = "2: Port C group selected"] - PORTC = 2, + Portc = 2, #[doc = "3: Port D group selected"] - PORTD = 3, + Portd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPSEL2_A) -> Self { + fn from(variant: Extipsel2) -> Self { variant as _ } } -impl EXTIPSEL2_R { +impl crate::FieldSpec for Extipsel2 { + type Ux = u8; +} +impl crate::IsEnum for Extipsel2 {} +#[doc = "Field `EXTIPSEL2` reader - External Interrupt Port Select"] +pub type Extipsel2R = crate::FieldReader; +impl Extipsel2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPSEL2_A { + pub const fn variant(&self) -> Extipsel2 { match self.bits { - 0 => EXTIPSEL2_A::PORTA, - 1 => EXTIPSEL2_A::PORTB, - 2 => EXTIPSEL2_A::PORTC, - 3 => EXTIPSEL2_A::PORTD, + 0 => Extipsel2::Porta, + 1 => Extipsel2::Portb, + 2 => Extipsel2::Portc, + 3 => Extipsel2::Portd, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A group selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == EXTIPSEL2_A::PORTA + *self == Extipsel2::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B group selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == EXTIPSEL2_A::PORTB + *self == Extipsel2::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C group selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == EXTIPSEL2_A::PORTC + *self == Extipsel2::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D group selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == EXTIPSEL2_A::PORTD + *self == Extipsel2::Portd } } #[doc = "Field `EXTIPSEL2` writer - External Interrupt Port Select"] -pub type EXTIPSEL2_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL2_A, 2, O>; -impl<'a, const O: u8> EXTIPSEL2_W<'a, O> { +pub type Extipsel2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipsel2, crate::Safe>; +impl<'a, REG> Extipsel2W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Port A group selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(EXTIPSEL2_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Extipsel2::Porta) } #[doc = "Port B group selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(EXTIPSEL2_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Extipsel2::Portb) } #[doc = "Port C group selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(EXTIPSEL2_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Extipsel2::Portc) } #[doc = "Port D group selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(EXTIPSEL2_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Extipsel2::Portd) } } -#[doc = "Field `EXTIPSEL3` reader - External Interrupt Port Select"] -pub type EXTIPSEL3_R = crate::FieldReader; #[doc = "External Interrupt Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPSEL3_A { +pub enum Extipsel3 { #[doc = "0: Port A group selected"] - PORTA = 0, + Porta = 0, #[doc = "1: Port B group selected"] - PORTB = 1, + Portb = 1, #[doc = "2: Port C group selected"] - PORTC = 2, + Portc = 2, #[doc = "3: Port D group selected"] - PORTD = 3, + Portd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPSEL3_A) -> Self { + fn from(variant: Extipsel3) -> Self { variant as _ } } -impl EXTIPSEL3_R { +impl crate::FieldSpec for Extipsel3 { + type Ux = u8; +} +impl crate::IsEnum for Extipsel3 {} +#[doc = "Field `EXTIPSEL3` reader - External Interrupt Port Select"] +pub type Extipsel3R = crate::FieldReader; +impl Extipsel3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPSEL3_A { + pub const fn variant(&self) -> Extipsel3 { match self.bits { - 0 => EXTIPSEL3_A::PORTA, - 1 => EXTIPSEL3_A::PORTB, - 2 => EXTIPSEL3_A::PORTC, - 3 => EXTIPSEL3_A::PORTD, + 0 => Extipsel3::Porta, + 1 => Extipsel3::Portb, + 2 => Extipsel3::Portc, + 3 => Extipsel3::Portd, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A group selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == EXTIPSEL3_A::PORTA + *self == Extipsel3::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B group selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == EXTIPSEL3_A::PORTB + *self == Extipsel3::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C group selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == EXTIPSEL3_A::PORTC + *self == Extipsel3::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D group selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == EXTIPSEL3_A::PORTD + *self == Extipsel3::Portd } } #[doc = "Field `EXTIPSEL3` writer - External Interrupt Port Select"] -pub type EXTIPSEL3_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL3_A, 2, O>; -impl<'a, const O: u8> EXTIPSEL3_W<'a, O> { +pub type Extipsel3W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipsel3, crate::Safe>; +impl<'a, REG> Extipsel3W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Port A group selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(EXTIPSEL3_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Extipsel3::Porta) } #[doc = "Port B group selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(EXTIPSEL3_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Extipsel3::Portb) } #[doc = "Port C group selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(EXTIPSEL3_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Extipsel3::Portc) } #[doc = "Port D group selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(EXTIPSEL3_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Extipsel3::Portd) } } -#[doc = "Field `EXTIPSEL4` reader - External Interrupt Port Select"] -pub type EXTIPSEL4_R = crate::FieldReader; #[doc = "External Interrupt Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPSEL4_A { +pub enum Extipsel4 { #[doc = "0: Port A group selected"] - PORTA = 0, + Porta = 0, #[doc = "1: Port B group selected"] - PORTB = 1, + Portb = 1, #[doc = "2: Port C group selected"] - PORTC = 2, + Portc = 2, #[doc = "3: Port D group selected"] - PORTD = 3, + Portd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPSEL4_A) -> Self { + fn from(variant: Extipsel4) -> Self { variant as _ } } -impl EXTIPSEL4_R { +impl crate::FieldSpec for Extipsel4 { + type Ux = u8; +} +impl crate::IsEnum for Extipsel4 {} +#[doc = "Field `EXTIPSEL4` reader - External Interrupt Port Select"] +pub type Extipsel4R = crate::FieldReader; +impl Extipsel4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPSEL4_A { + pub const fn variant(&self) -> Extipsel4 { match self.bits { - 0 => EXTIPSEL4_A::PORTA, - 1 => EXTIPSEL4_A::PORTB, - 2 => EXTIPSEL4_A::PORTC, - 3 => EXTIPSEL4_A::PORTD, + 0 => Extipsel4::Porta, + 1 => Extipsel4::Portb, + 2 => Extipsel4::Portc, + 3 => Extipsel4::Portd, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A group selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == EXTIPSEL4_A::PORTA + *self == Extipsel4::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B group selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == EXTIPSEL4_A::PORTB + *self == Extipsel4::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C group selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == EXTIPSEL4_A::PORTC + *self == Extipsel4::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D group selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == EXTIPSEL4_A::PORTD + *self == Extipsel4::Portd } } #[doc = "Field `EXTIPSEL4` writer - External Interrupt Port Select"] -pub type EXTIPSEL4_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL4_A, 2, O>; -impl<'a, const O: u8> EXTIPSEL4_W<'a, O> { +pub type Extipsel4W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipsel4, crate::Safe>; +impl<'a, REG> Extipsel4W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Port A group selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(EXTIPSEL4_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Extipsel4::Porta) } #[doc = "Port B group selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(EXTIPSEL4_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Extipsel4::Portb) } #[doc = "Port C group selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(EXTIPSEL4_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Extipsel4::Portc) } #[doc = "Port D group selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(EXTIPSEL4_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Extipsel4::Portd) } } -#[doc = "Field `EXTIPSEL5` reader - External Interrupt Port Select"] -pub type EXTIPSEL5_R = crate::FieldReader; #[doc = "External Interrupt Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPSEL5_A { +pub enum Extipsel5 { #[doc = "0: Port A group selected"] - PORTA = 0, + Porta = 0, #[doc = "1: Port B group selected"] - PORTB = 1, + Portb = 1, #[doc = "2: Port C group selected"] - PORTC = 2, + Portc = 2, #[doc = "3: Port D group selected"] - PORTD = 3, + Portd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPSEL5_A) -> Self { + fn from(variant: Extipsel5) -> Self { variant as _ } } -impl EXTIPSEL5_R { +impl crate::FieldSpec for Extipsel5 { + type Ux = u8; +} +impl crate::IsEnum for Extipsel5 {} +#[doc = "Field `EXTIPSEL5` reader - External Interrupt Port Select"] +pub type Extipsel5R = crate::FieldReader; +impl Extipsel5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPSEL5_A { + pub const fn variant(&self) -> Extipsel5 { match self.bits { - 0 => EXTIPSEL5_A::PORTA, - 1 => EXTIPSEL5_A::PORTB, - 2 => EXTIPSEL5_A::PORTC, - 3 => EXTIPSEL5_A::PORTD, + 0 => Extipsel5::Porta, + 1 => Extipsel5::Portb, + 2 => Extipsel5::Portc, + 3 => Extipsel5::Portd, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A group selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == EXTIPSEL5_A::PORTA + *self == Extipsel5::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B group selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == EXTIPSEL5_A::PORTB + *self == Extipsel5::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C group selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == EXTIPSEL5_A::PORTC + *self == Extipsel5::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D group selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == EXTIPSEL5_A::PORTD + *self == Extipsel5::Portd } } #[doc = "Field `EXTIPSEL5` writer - External Interrupt Port Select"] -pub type EXTIPSEL5_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL5_A, 2, O>; -impl<'a, const O: u8> EXTIPSEL5_W<'a, O> { +pub type Extipsel5W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipsel5, crate::Safe>; +impl<'a, REG> Extipsel5W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Port A group selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(EXTIPSEL5_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Extipsel5::Porta) } #[doc = "Port B group selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(EXTIPSEL5_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Extipsel5::Portb) } #[doc = "Port C group selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(EXTIPSEL5_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Extipsel5::Portc) } #[doc = "Port D group selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(EXTIPSEL5_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Extipsel5::Portd) } } -#[doc = "Field `EXTIPSEL6` reader - External Interrupt Port Select"] -pub type EXTIPSEL6_R = crate::FieldReader; #[doc = "External Interrupt Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPSEL6_A { +pub enum Extipsel6 { #[doc = "0: Port A group selected"] - PORTA = 0, + Porta = 0, #[doc = "1: Port B group selected"] - PORTB = 1, + Portb = 1, #[doc = "2: Port C group selected"] - PORTC = 2, + Portc = 2, #[doc = "3: Port D group selected"] - PORTD = 3, + Portd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPSEL6_A) -> Self { + fn from(variant: Extipsel6) -> Self { variant as _ } } -impl EXTIPSEL6_R { +impl crate::FieldSpec for Extipsel6 { + type Ux = u8; +} +impl crate::IsEnum for Extipsel6 {} +#[doc = "Field `EXTIPSEL6` reader - External Interrupt Port Select"] +pub type Extipsel6R = crate::FieldReader; +impl Extipsel6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPSEL6_A { + pub const fn variant(&self) -> Extipsel6 { match self.bits { - 0 => EXTIPSEL6_A::PORTA, - 1 => EXTIPSEL6_A::PORTB, - 2 => EXTIPSEL6_A::PORTC, - 3 => EXTIPSEL6_A::PORTD, + 0 => Extipsel6::Porta, + 1 => Extipsel6::Portb, + 2 => Extipsel6::Portc, + 3 => Extipsel6::Portd, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A group selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == EXTIPSEL6_A::PORTA + *self == Extipsel6::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B group selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == EXTIPSEL6_A::PORTB + *self == Extipsel6::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C group selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == EXTIPSEL6_A::PORTC + *self == Extipsel6::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D group selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == EXTIPSEL6_A::PORTD + *self == Extipsel6::Portd } } #[doc = "Field `EXTIPSEL6` writer - External Interrupt Port Select"] -pub type EXTIPSEL6_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL6_A, 2, O>; -impl<'a, const O: u8> EXTIPSEL6_W<'a, O> { +pub type Extipsel6W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipsel6, crate::Safe>; +impl<'a, REG> Extipsel6W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Port A group selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(EXTIPSEL6_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Extipsel6::Porta) } #[doc = "Port B group selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(EXTIPSEL6_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Extipsel6::Portb) } #[doc = "Port C group selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(EXTIPSEL6_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Extipsel6::Portc) } #[doc = "Port D group selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(EXTIPSEL6_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Extipsel6::Portd) } } -#[doc = "Field `EXTIPSEL7` reader - External Interrupt Port Select"] -pub type EXTIPSEL7_R = crate::FieldReader; #[doc = "External Interrupt Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPSEL7_A { +pub enum Extipsel7 { #[doc = "0: Port A group selected"] - PORTA = 0, + Porta = 0, #[doc = "1: Port B group selected"] - PORTB = 1, + Portb = 1, #[doc = "2: Port C group selected"] - PORTC = 2, + Portc = 2, #[doc = "3: Port D group selected"] - PORTD = 3, + Portd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPSEL7_A) -> Self { + fn from(variant: Extipsel7) -> Self { variant as _ } } -impl EXTIPSEL7_R { +impl crate::FieldSpec for Extipsel7 { + type Ux = u8; +} +impl crate::IsEnum for Extipsel7 {} +#[doc = "Field `EXTIPSEL7` reader - External Interrupt Port Select"] +pub type Extipsel7R = crate::FieldReader; +impl Extipsel7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPSEL7_A { + pub const fn variant(&self) -> Extipsel7 { match self.bits { - 0 => EXTIPSEL7_A::PORTA, - 1 => EXTIPSEL7_A::PORTB, - 2 => EXTIPSEL7_A::PORTC, - 3 => EXTIPSEL7_A::PORTD, + 0 => Extipsel7::Porta, + 1 => Extipsel7::Portb, + 2 => Extipsel7::Portc, + 3 => Extipsel7::Portd, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A group selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == EXTIPSEL7_A::PORTA + *self == Extipsel7::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B group selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == EXTIPSEL7_A::PORTB + *self == Extipsel7::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C group selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == EXTIPSEL7_A::PORTC + *self == Extipsel7::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D group selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == EXTIPSEL7_A::PORTD + *self == Extipsel7::Portd } } #[doc = "Field `EXTIPSEL7` writer - External Interrupt Port Select"] -pub type EXTIPSEL7_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL7_A, 2, O>; -impl<'a, const O: u8> EXTIPSEL7_W<'a, O> { +pub type Extipsel7W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipsel7, crate::Safe>; +impl<'a, REG> Extipsel7W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Port A group selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(EXTIPSEL7_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Extipsel7::Porta) } #[doc = "Port B group selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(EXTIPSEL7_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Extipsel7::Portb) } #[doc = "Port C group selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(EXTIPSEL7_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Extipsel7::Portc) } #[doc = "Port D group selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(EXTIPSEL7_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Extipsel7::Portd) } } impl R { #[doc = "Bits 0:1 - External Interrupt Port Select"] #[inline(always)] - pub fn extipsel0(&self) -> EXTIPSEL0_R { - EXTIPSEL0_R::new((self.bits & 3) as u8) + pub fn extipsel0(&self) -> Extipsel0R { + Extipsel0R::new((self.bits & 3) as u8) } #[doc = "Bits 4:5 - External Interrupt Port Select"] #[inline(always)] - pub fn extipsel1(&self) -> EXTIPSEL1_R { - EXTIPSEL1_R::new(((self.bits >> 4) & 3) as u8) + pub fn extipsel1(&self) -> Extipsel1R { + Extipsel1R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 8:9 - External Interrupt Port Select"] #[inline(always)] - pub fn extipsel2(&self) -> EXTIPSEL2_R { - EXTIPSEL2_R::new(((self.bits >> 8) & 3) as u8) + pub fn extipsel2(&self) -> Extipsel2R { + Extipsel2R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 12:13 - External Interrupt Port Select"] #[inline(always)] - pub fn extipsel3(&self) -> EXTIPSEL3_R { - EXTIPSEL3_R::new(((self.bits >> 12) & 3) as u8) + pub fn extipsel3(&self) -> Extipsel3R { + Extipsel3R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 16:17 - External Interrupt Port Select"] #[inline(always)] - pub fn extipsel4(&self) -> EXTIPSEL4_R { - EXTIPSEL4_R::new(((self.bits >> 16) & 3) as u8) + pub fn extipsel4(&self) -> Extipsel4R { + Extipsel4R::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 20:21 - External Interrupt Port Select"] #[inline(always)] - pub fn extipsel5(&self) -> EXTIPSEL5_R { - EXTIPSEL5_R::new(((self.bits >> 20) & 3) as u8) + pub fn extipsel5(&self) -> Extipsel5R { + Extipsel5R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 24:25 - External Interrupt Port Select"] #[inline(always)] - pub fn extipsel6(&self) -> EXTIPSEL6_R { - EXTIPSEL6_R::new(((self.bits >> 24) & 3) as u8) + pub fn extipsel6(&self) -> Extipsel6R { + Extipsel6R::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 28:29 - External Interrupt Port Select"] #[inline(always)] - pub fn extipsel7(&self) -> EXTIPSEL7_R { - EXTIPSEL7_R::new(((self.bits >> 28) & 3) as u8) + pub fn extipsel7(&self) -> Extipsel7R { + Extipsel7R::new(((self.bits >> 28) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - External Interrupt Port Select"] #[inline(always)] #[must_use] - pub fn extipsel0(&mut self) -> EXTIPSEL0_W<0> { - EXTIPSEL0_W::new(self) + pub fn extipsel0(&mut self) -> Extipsel0W { + Extipsel0W::new(self, 0) } #[doc = "Bits 4:5 - External Interrupt Port Select"] #[inline(always)] #[must_use] - pub fn extipsel1(&mut self) -> EXTIPSEL1_W<4> { - EXTIPSEL1_W::new(self) + pub fn extipsel1(&mut self) -> Extipsel1W { + Extipsel1W::new(self, 4) } #[doc = "Bits 8:9 - External Interrupt Port Select"] #[inline(always)] #[must_use] - pub fn extipsel2(&mut self) -> EXTIPSEL2_W<8> { - EXTIPSEL2_W::new(self) + pub fn extipsel2(&mut self) -> Extipsel2W { + Extipsel2W::new(self, 8) } #[doc = "Bits 12:13 - External Interrupt Port Select"] #[inline(always)] #[must_use] - pub fn extipsel3(&mut self) -> EXTIPSEL3_W<12> { - EXTIPSEL3_W::new(self) + pub fn extipsel3(&mut self) -> Extipsel3W { + Extipsel3W::new(self, 12) } #[doc = "Bits 16:17 - External Interrupt Port Select"] #[inline(always)] #[must_use] - pub fn extipsel4(&mut self) -> EXTIPSEL4_W<16> { - EXTIPSEL4_W::new(self) + pub fn extipsel4(&mut self) -> Extipsel4W { + Extipsel4W::new(self, 16) } #[doc = "Bits 20:21 - External Interrupt Port Select"] #[inline(always)] #[must_use] - pub fn extipsel5(&mut self) -> EXTIPSEL5_W<20> { - EXTIPSEL5_W::new(self) + pub fn extipsel5(&mut self) -> Extipsel5W { + Extipsel5W::new(self, 20) } #[doc = "Bits 24:25 - External Interrupt Port Select"] #[inline(always)] #[must_use] - pub fn extipsel6(&mut self) -> EXTIPSEL6_W<24> { - EXTIPSEL6_W::new(self) + pub fn extipsel6(&mut self) -> Extipsel6W { + Extipsel6W::new(self, 24) } #[doc = "Bits 28:29 - External Interrupt Port Select"] #[inline(always)] #[must_use] - pub fn extipsel7(&mut self) -> EXTIPSEL7_W<28> { - EXTIPSEL7_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn extipsel7(&mut self) -> Extipsel7W { + Extipsel7W::new(self, 28) } } -#[doc = "External Interrupt Port Select Low\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [extipsell](index.html) module"] -pub struct EXTIPSELL_SPEC; -impl crate::RegisterSpec for EXTIPSELL_SPEC { +#[doc = "External Interrupt Port Select Low\n\nYou can [`read`](crate::Reg::read) this register and get [`extipsell::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`extipsell::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ExtipsellSpec; +impl crate::RegisterSpec for ExtipsellSpec { type Ux = u32; } -#[doc = "`read()` method returns [extipsell::R](R) reader structure"] -impl crate::Readable for EXTIPSELL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [extipsell::W](W) writer structure"] -impl crate::Writable for EXTIPSELL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`extipsell::R`](R) reader structure"] +impl crate::Readable for ExtipsellSpec {} +#[doc = "`write(|w| ..)` method takes [`extipsell::W`](W) writer structure"] +impl crate::Writable for ExtipsellSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EXTIPSELL to value 0"] -impl crate::Resettable for EXTIPSELL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ExtipsellSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/extirise.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/extirise.rs index 8367b54..85a4bb5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/extirise.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/extirise.rs @@ -1,80 +1,40 @@ #[doc = "Register `EXTIRISE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EXTIRISE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EXTIRISE` reader - EXT Int Rise"] -pub type EXTIRISE_R = crate::FieldReader; +pub type ExtiriseR = crate::FieldReader; #[doc = "Field `EXTIRISE` writer - EXT Int Rise"] -pub type EXTIRISE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EXTIRISE_SPEC, u16, u16, 12, O>; +pub type ExtiriseW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:11 - EXT Int Rise"] #[inline(always)] - pub fn extirise(&self) -> EXTIRISE_R { - EXTIRISE_R::new((self.bits & 0x0fff) as u16) + pub fn extirise(&self) -> ExtiriseR { + ExtiriseR::new((self.bits & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - EXT Int Rise"] #[inline(always)] #[must_use] - pub fn extirise(&mut self) -> EXTIRISE_W<0> { - EXTIRISE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn extirise(&mut self) -> ExtiriseW { + ExtiriseW::new(self, 0) } } -#[doc = "External Interrupt Rising Edge Trigger\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [extirise](index.html) module"] -pub struct EXTIRISE_SPEC; -impl crate::RegisterSpec for EXTIRISE_SPEC { +#[doc = "External Interrupt Rising Edge Trigger\n\nYou can [`read`](crate::Reg::read) this register and get [`extirise::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`extirise::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ExtiriseSpec; +impl crate::RegisterSpec for ExtiriseSpec { type Ux = u32; } -#[doc = "`read()` method returns [extirise::R](R) reader structure"] -impl crate::Readable for EXTIRISE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [extirise::W](W) writer structure"] -impl crate::Writable for EXTIRISE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`extirise::R`](R) reader structure"] +impl crate::Readable for ExtiriseSpec {} +#[doc = "`write(|w| ..)` method takes [`extirise::W`](W) writer structure"] +impl crate::Writable for ExtiriseSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EXTIRISE to value 0"] -impl crate::Resettable for EXTIRISE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ExtiriseSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/gpiolockstatus.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/gpiolockstatus.rs index b7c9a7d..81aafa7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/gpiolockstatus.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/gpiolockstatus.rs @@ -1,71 +1,56 @@ #[doc = "Register `GPIOLOCKSTATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `LOCK` reader - GPIO LOCK status"] -pub type LOCK_R = crate::BitReader; +pub type R = crate::R; #[doc = "GPIO LOCK status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCK_A { +pub enum Lock { #[doc = "0: Registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: Registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCK_A) -> Self { + fn from(variant: Lock) -> Self { variant as u8 != 0 } } -impl LOCK_R { +#[doc = "Field `LOCK` reader - GPIO LOCK status"] +pub type LockR = crate::BitReader; +impl LockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCK_A { + pub const fn variant(&self) -> Lock { match self.bits { - false => LOCK_A::UNLOCKED, - true => LOCK_A::LOCKED, + false => Lock::Unlocked, + true => Lock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "Registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCK_A::UNLOCKED + *self == Lock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "Registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCK_A::LOCKED + *self == Lock::Locked } } impl R { #[doc = "Bit 0 - GPIO LOCK status"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new((self.bits & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new((self.bits & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gpiolockstatus](index.html) module"] -pub struct GPIOLOCKSTATUS_SPEC; -impl crate::RegisterSpec for GPIOLOCKSTATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`gpiolockstatus::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct GpiolockstatusSpec; +impl crate::RegisterSpec for GpiolockstatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [gpiolockstatus::R](R) reader structure"] -impl crate::Readable for GPIOLOCKSTATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`gpiolockstatus::R`](R) reader structure"] +impl crate::Readable for GpiolockstatusSpec {} #[doc = "`reset()` method sets GPIOLOCKSTATUS to value 0"] -impl crate::Resettable for GPIOLOCKSTATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for GpiolockstatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/i2c0_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/i2c0_routeen.rs index f67f013..16e73f8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/i2c0_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/i2c0_routeen.rs @@ -1,95 +1,55 @@ #[doc = "Register `I2C0_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `I2C0_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SCLPEN` reader - SCL pin enable control bit"] -pub type SCLPEN_R = crate::BitReader; +pub type SclpenR = crate::BitReader; #[doc = "Field `SCLPEN` writer - SCL pin enable control bit"] -pub type SCLPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2C0_ROUTEEN_SPEC, bool, O>; +pub type SclpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SDAPEN` reader - SDA pin enable control bit"] -pub type SDAPEN_R = crate::BitReader; +pub type SdapenR = crate::BitReader; #[doc = "Field `SDAPEN` writer - SDA pin enable control bit"] -pub type SDAPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2C0_ROUTEEN_SPEC, bool, O>; +pub type SdapenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - SCL pin enable control bit"] #[inline(always)] - pub fn sclpen(&self) -> SCLPEN_R { - SCLPEN_R::new((self.bits & 1) != 0) + pub fn sclpen(&self) -> SclpenR { + SclpenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - SDA pin enable control bit"] #[inline(always)] - pub fn sdapen(&self) -> SDAPEN_R { - SDAPEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn sdapen(&self) -> SdapenR { + SdapenR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - SCL pin enable control bit"] #[inline(always)] #[must_use] - pub fn sclpen(&mut self) -> SCLPEN_W<0> { - SCLPEN_W::new(self) + pub fn sclpen(&mut self) -> SclpenW { + SclpenW::new(self, 0) } #[doc = "Bit 1 - SDA pin enable control bit"] #[inline(always)] #[must_use] - pub fn sdapen(&mut self) -> SDAPEN_W<1> { - SDAPEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sdapen(&mut self) -> SdapenW { + SdapenW::new(self, 1) } } -#[doc = "I2C0 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [i2c0_routeen](index.html) module"] -pub struct I2C0_ROUTEEN_SPEC; -impl crate::RegisterSpec for I2C0_ROUTEEN_SPEC { +#[doc = "I2C0 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c0_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c0_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct I2c0RouteenSpec; +impl crate::RegisterSpec for I2c0RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [i2c0_routeen::R](R) reader structure"] -impl crate::Readable for I2C0_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [i2c0_routeen::W](W) writer structure"] -impl crate::Writable for I2C0_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`i2c0_routeen::R`](R) reader structure"] +impl crate::Readable for I2c0RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`i2c0_routeen::W`](W) writer structure"] +impl crate::Writable for I2c0RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets I2C0_ROUTEEN to value 0"] -impl crate::Resettable for I2C0_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for I2c0RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/i2c0_sclroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/i2c0_sclroute.rs index c8affb9..ce51a8f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/i2c0_sclroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/i2c0_sclroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `I2C0_SCLROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `I2C0_SCLROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - SCL port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - SCL port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2C0_SCLROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - SCL pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - SCL pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2C0_SCLROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - SCL port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - SCL pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - SCL port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - SCL pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "SCL port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [i2c0_sclroute](index.html) module"] -pub struct I2C0_SCLROUTE_SPEC; -impl crate::RegisterSpec for I2C0_SCLROUTE_SPEC { +#[doc = "SCL port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c0_sclroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c0_sclroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct I2c0SclrouteSpec; +impl crate::RegisterSpec for I2c0SclrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [i2c0_sclroute::R](R) reader structure"] -impl crate::Readable for I2C0_SCLROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [i2c0_sclroute::W](W) writer structure"] -impl crate::Writable for I2C0_SCLROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`i2c0_sclroute::R`](R) reader structure"] +impl crate::Readable for I2c0SclrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`i2c0_sclroute::W`](W) writer structure"] +impl crate::Writable for I2c0SclrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets I2C0_SCLROUTE to value 0"] -impl crate::Resettable for I2C0_SCLROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for I2c0SclrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/i2c0_sdaroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/i2c0_sdaroute.rs index 7782457..bd353e4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/i2c0_sdaroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/i2c0_sdaroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `I2C0_SDAROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `I2C0_SDAROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - SDA port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - SDA port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2C0_SDAROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - SDA pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - SDA pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2C0_SDAROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - SDA port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - SDA pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - SDA port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - SDA pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "SDA port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [i2c0_sdaroute](index.html) module"] -pub struct I2C0_SDAROUTE_SPEC; -impl crate::RegisterSpec for I2C0_SDAROUTE_SPEC { +#[doc = "SDA port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c0_sdaroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c0_sdaroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct I2c0SdarouteSpec; +impl crate::RegisterSpec for I2c0SdarouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [i2c0_sdaroute::R](R) reader structure"] -impl crate::Readable for I2C0_SDAROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [i2c0_sdaroute::W](W) writer structure"] -impl crate::Writable for I2C0_SDAROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`i2c0_sdaroute::R`](R) reader structure"] +impl crate::Readable for I2c0SdarouteSpec {} +#[doc = "`write(|w| ..)` method takes [`i2c0_sdaroute::W`](W) writer structure"] +impl crate::Writable for I2c0SdarouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets I2C0_SDAROUTE to value 0"] -impl crate::Resettable for I2C0_SDAROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for I2c0SdarouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/i2c1_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/i2c1_routeen.rs index 0e2fb84..e6c64e3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/i2c1_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/i2c1_routeen.rs @@ -1,95 +1,55 @@ #[doc = "Register `I2C1_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `I2C1_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SCLPEN` reader - SCL pin enable control bit"] -pub type SCLPEN_R = crate::BitReader; +pub type SclpenR = crate::BitReader; #[doc = "Field `SCLPEN` writer - SCL pin enable control bit"] -pub type SCLPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2C1_ROUTEEN_SPEC, bool, O>; +pub type SclpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SDAPEN` reader - SDA pin enable control bit"] -pub type SDAPEN_R = crate::BitReader; +pub type SdapenR = crate::BitReader; #[doc = "Field `SDAPEN` writer - SDA pin enable control bit"] -pub type SDAPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2C1_ROUTEEN_SPEC, bool, O>; +pub type SdapenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - SCL pin enable control bit"] #[inline(always)] - pub fn sclpen(&self) -> SCLPEN_R { - SCLPEN_R::new((self.bits & 1) != 0) + pub fn sclpen(&self) -> SclpenR { + SclpenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - SDA pin enable control bit"] #[inline(always)] - pub fn sdapen(&self) -> SDAPEN_R { - SDAPEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn sdapen(&self) -> SdapenR { + SdapenR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - SCL pin enable control bit"] #[inline(always)] #[must_use] - pub fn sclpen(&mut self) -> SCLPEN_W<0> { - SCLPEN_W::new(self) + pub fn sclpen(&mut self) -> SclpenW { + SclpenW::new(self, 0) } #[doc = "Bit 1 - SDA pin enable control bit"] #[inline(always)] #[must_use] - pub fn sdapen(&mut self) -> SDAPEN_W<1> { - SDAPEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sdapen(&mut self) -> SdapenW { + SdapenW::new(self, 1) } } -#[doc = "I2C1 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [i2c1_routeen](index.html) module"] -pub struct I2C1_ROUTEEN_SPEC; -impl crate::RegisterSpec for I2C1_ROUTEEN_SPEC { +#[doc = "I2C1 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c1_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c1_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct I2c1RouteenSpec; +impl crate::RegisterSpec for I2c1RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [i2c1_routeen::R](R) reader structure"] -impl crate::Readable for I2C1_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [i2c1_routeen::W](W) writer structure"] -impl crate::Writable for I2C1_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`i2c1_routeen::R`](R) reader structure"] +impl crate::Readable for I2c1RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`i2c1_routeen::W`](W) writer structure"] +impl crate::Writable for I2c1RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets I2C1_ROUTEEN to value 0"] -impl crate::Resettable for I2C1_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for I2c1RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/i2c1_sclroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/i2c1_sclroute.rs index 4e68bec..648d44e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/i2c1_sclroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/i2c1_sclroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `I2C1_SCLROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `I2C1_SCLROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - SCL port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - SCL port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2C1_SCLROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - SCL pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - SCL pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2C1_SCLROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - SCL port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - SCL pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - SCL port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - SCL pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "SCL port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [i2c1_sclroute](index.html) module"] -pub struct I2C1_SCLROUTE_SPEC; -impl crate::RegisterSpec for I2C1_SCLROUTE_SPEC { +#[doc = "SCL port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c1_sclroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c1_sclroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct I2c1SclrouteSpec; +impl crate::RegisterSpec for I2c1SclrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [i2c1_sclroute::R](R) reader structure"] -impl crate::Readable for I2C1_SCLROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [i2c1_sclroute::W](W) writer structure"] -impl crate::Writable for I2C1_SCLROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`i2c1_sclroute::R`](R) reader structure"] +impl crate::Readable for I2c1SclrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`i2c1_sclroute::W`](W) writer structure"] +impl crate::Writable for I2c1SclrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets I2C1_SCLROUTE to value 0"] -impl crate::Resettable for I2C1_SCLROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for I2c1SclrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/i2c1_sdaroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/i2c1_sdaroute.rs index 11dd3ef..2281d44 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/i2c1_sdaroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/i2c1_sdaroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `I2C1_SDAROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `I2C1_SDAROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - SDA port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - SDA port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2C1_SDAROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - SDA pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - SDA pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2C1_SDAROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - SDA port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - SDA pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - SDA port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - SDA pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "SDA port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [i2c1_sdaroute](index.html) module"] -pub struct I2C1_SDAROUTE_SPEC; -impl crate::RegisterSpec for I2C1_SDAROUTE_SPEC { +#[doc = "SDA port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c1_sdaroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c1_sdaroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct I2c1SdarouteSpec; +impl crate::RegisterSpec for I2c1SdarouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [i2c1_sdaroute::R](R) reader structure"] -impl crate::Readable for I2C1_SDAROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [i2c1_sdaroute::W](W) writer structure"] -impl crate::Writable for I2C1_SDAROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`i2c1_sdaroute::R`](R) reader structure"] +impl crate::Readable for I2c1SdarouteSpec {} +#[doc = "`write(|w| ..)` method takes [`i2c1_sdaroute::W`](W) writer structure"] +impl crate::Writable for I2c1SdarouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets I2C1_SDAROUTE to value 0"] -impl crate::Resettable for I2C1_SDAROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for I2c1SdarouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/ien.rs index 17d201d..488b0bc 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/ien.rs @@ -1,425 +1,385 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EXTIEN0` reader - External Pin Enable"] -pub type EXTIEN0_R = crate::BitReader; +pub type Extien0R = crate::BitReader; #[doc = "Field `EXTIEN0` writer - External Pin Enable"] -pub type EXTIEN0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Extien0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIEN1` reader - External Pin Enable"] -pub type EXTIEN1_R = crate::BitReader; +pub type Extien1R = crate::BitReader; #[doc = "Field `EXTIEN1` writer - External Pin Enable"] -pub type EXTIEN1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Extien1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIEN2` reader - External Pin Enable"] -pub type EXTIEN2_R = crate::BitReader; +pub type Extien2R = crate::BitReader; #[doc = "Field `EXTIEN2` writer - External Pin Enable"] -pub type EXTIEN2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Extien2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIEN3` reader - External Pin Enable"] -pub type EXTIEN3_R = crate::BitReader; +pub type Extien3R = crate::BitReader; #[doc = "Field `EXTIEN3` writer - External Pin Enable"] -pub type EXTIEN3_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Extien3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIEN4` reader - External Pin Enable"] -pub type EXTIEN4_R = crate::BitReader; +pub type Extien4R = crate::BitReader; #[doc = "Field `EXTIEN4` writer - External Pin Enable"] -pub type EXTIEN4_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Extien4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIEN5` reader - External Pin Enable"] -pub type EXTIEN5_R = crate::BitReader; +pub type Extien5R = crate::BitReader; #[doc = "Field `EXTIEN5` writer - External Pin Enable"] -pub type EXTIEN5_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Extien5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIEN6` reader - External Pin Enable"] -pub type EXTIEN6_R = crate::BitReader; +pub type Extien6R = crate::BitReader; #[doc = "Field `EXTIEN6` writer - External Pin Enable"] -pub type EXTIEN6_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Extien6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIEN7` reader - External Pin Enable"] -pub type EXTIEN7_R = crate::BitReader; +pub type Extien7R = crate::BitReader; #[doc = "Field `EXTIEN7` writer - External Pin Enable"] -pub type EXTIEN7_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Extien7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIEN8` reader - External Pin Enable"] -pub type EXTIEN8_R = crate::BitReader; +pub type Extien8R = crate::BitReader; #[doc = "Field `EXTIEN8` writer - External Pin Enable"] -pub type EXTIEN8_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Extien8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIEN9` reader - External Pin Enable"] -pub type EXTIEN9_R = crate::BitReader; +pub type Extien9R = crate::BitReader; #[doc = "Field `EXTIEN9` writer - External Pin Enable"] -pub type EXTIEN9_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Extien9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIEN10` reader - External Pin Enable"] -pub type EXTIEN10_R = crate::BitReader; +pub type Extien10R = crate::BitReader; #[doc = "Field `EXTIEN10` writer - External Pin Enable"] -pub type EXTIEN10_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Extien10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIEN11` reader - External Pin Enable"] -pub type EXTIEN11_R = crate::BitReader; +pub type Extien11R = crate::BitReader; #[doc = "Field `EXTIEN11` writer - External Pin Enable"] -pub type EXTIEN11_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Extien11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4WUIEN0` reader - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN0_R = crate::BitReader; +pub type Em4wuien0R = crate::BitReader; #[doc = "Field `EM4WUIEN0` writer - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em4wuien0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4WUIEN1` reader - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN1_R = crate::BitReader; +pub type Em4wuien1R = crate::BitReader; #[doc = "Field `EM4WUIEN1` writer - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em4wuien1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4WUIEN2` reader - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN2_R = crate::BitReader; +pub type Em4wuien2R = crate::BitReader; #[doc = "Field `EM4WUIEN2` writer - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em4wuien2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4WUIEN3` reader - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN3_R = crate::BitReader; +pub type Em4wuien3R = crate::BitReader; #[doc = "Field `EM4WUIEN3` writer - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN3_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em4wuien3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4WUIEN4` reader - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN4_R = crate::BitReader; +pub type Em4wuien4R = crate::BitReader; #[doc = "Field `EM4WUIEN4` writer - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN4_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em4wuien4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4WUIEN5` reader - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN5_R = crate::BitReader; +pub type Em4wuien5R = crate::BitReader; #[doc = "Field `EM4WUIEN5` writer - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN5_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em4wuien5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4WUIEN6` reader - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN6_R = crate::BitReader; +pub type Em4wuien6R = crate::BitReader; #[doc = "Field `EM4WUIEN6` writer - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN6_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em4wuien6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4WUIEN7` reader - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN7_R = crate::BitReader; +pub type Em4wuien7R = crate::BitReader; #[doc = "Field `EM4WUIEN7` writer - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN7_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em4wuien7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4WUIEN8` reader - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN8_R = crate::BitReader; +pub type Em4wuien8R = crate::BitReader; #[doc = "Field `EM4WUIEN8` writer - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN8_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em4wuien8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4WUIEN9` reader - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN9_R = crate::BitReader; +pub type Em4wuien9R = crate::BitReader; #[doc = "Field `EM4WUIEN9` writer - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN9_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em4wuien9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4WUIEN10` reader - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN10_R = crate::BitReader; +pub type Em4wuien10R = crate::BitReader; #[doc = "Field `EM4WUIEN10` writer - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN10_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em4wuien10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4WUIEN11` reader - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN11_R = crate::BitReader; +pub type Em4wuien11R = crate::BitReader; #[doc = "Field `EM4WUIEN11` writer - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN11_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em4wuien11W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - External Pin Enable"] #[inline(always)] - pub fn extien0(&self) -> EXTIEN0_R { - EXTIEN0_R::new((self.bits & 1) != 0) + pub fn extien0(&self) -> Extien0R { + Extien0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - External Pin Enable"] #[inline(always)] - pub fn extien1(&self) -> EXTIEN1_R { - EXTIEN1_R::new(((self.bits >> 1) & 1) != 0) + pub fn extien1(&self) -> Extien1R { + Extien1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - External Pin Enable"] #[inline(always)] - pub fn extien2(&self) -> EXTIEN2_R { - EXTIEN2_R::new(((self.bits >> 2) & 1) != 0) + pub fn extien2(&self) -> Extien2R { + Extien2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - External Pin Enable"] #[inline(always)] - pub fn extien3(&self) -> EXTIEN3_R { - EXTIEN3_R::new(((self.bits >> 3) & 1) != 0) + pub fn extien3(&self) -> Extien3R { + Extien3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - External Pin Enable"] #[inline(always)] - pub fn extien4(&self) -> EXTIEN4_R { - EXTIEN4_R::new(((self.bits >> 4) & 1) != 0) + pub fn extien4(&self) -> Extien4R { + Extien4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - External Pin Enable"] #[inline(always)] - pub fn extien5(&self) -> EXTIEN5_R { - EXTIEN5_R::new(((self.bits >> 5) & 1) != 0) + pub fn extien5(&self) -> Extien5R { + Extien5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - External Pin Enable"] #[inline(always)] - pub fn extien6(&self) -> EXTIEN6_R { - EXTIEN6_R::new(((self.bits >> 6) & 1) != 0) + pub fn extien6(&self) -> Extien6R { + Extien6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - External Pin Enable"] #[inline(always)] - pub fn extien7(&self) -> EXTIEN7_R { - EXTIEN7_R::new(((self.bits >> 7) & 1) != 0) + pub fn extien7(&self) -> Extien7R { + Extien7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - External Pin Enable"] #[inline(always)] - pub fn extien8(&self) -> EXTIEN8_R { - EXTIEN8_R::new(((self.bits >> 8) & 1) != 0) + pub fn extien8(&self) -> Extien8R { + Extien8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - External Pin Enable"] #[inline(always)] - pub fn extien9(&self) -> EXTIEN9_R { - EXTIEN9_R::new(((self.bits >> 9) & 1) != 0) + pub fn extien9(&self) -> Extien9R { + Extien9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - External Pin Enable"] #[inline(always)] - pub fn extien10(&self) -> EXTIEN10_R { - EXTIEN10_R::new(((self.bits >> 10) & 1) != 0) + pub fn extien10(&self) -> Extien10R { + Extien10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - External Pin Enable"] #[inline(always)] - pub fn extien11(&self) -> EXTIEN11_R { - EXTIEN11_R::new(((self.bits >> 11) & 1) != 0) + pub fn extien11(&self) -> Extien11R { + Extien11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 16 - EM4 Wake Up Interrupt En"] #[inline(always)] - pub fn em4wuien0(&self) -> EM4WUIEN0_R { - EM4WUIEN0_R::new(((self.bits >> 16) & 1) != 0) + pub fn em4wuien0(&self) -> Em4wuien0R { + Em4wuien0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - EM4 Wake Up Interrupt En"] #[inline(always)] - pub fn em4wuien1(&self) -> EM4WUIEN1_R { - EM4WUIEN1_R::new(((self.bits >> 17) & 1) != 0) + pub fn em4wuien1(&self) -> Em4wuien1R { + Em4wuien1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - EM4 Wake Up Interrupt En"] #[inline(always)] - pub fn em4wuien2(&self) -> EM4WUIEN2_R { - EM4WUIEN2_R::new(((self.bits >> 18) & 1) != 0) + pub fn em4wuien2(&self) -> Em4wuien2R { + Em4wuien2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - EM4 Wake Up Interrupt En"] #[inline(always)] - pub fn em4wuien3(&self) -> EM4WUIEN3_R { - EM4WUIEN3_R::new(((self.bits >> 19) & 1) != 0) + pub fn em4wuien3(&self) -> Em4wuien3R { + Em4wuien3R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - EM4 Wake Up Interrupt En"] #[inline(always)] - pub fn em4wuien4(&self) -> EM4WUIEN4_R { - EM4WUIEN4_R::new(((self.bits >> 20) & 1) != 0) + pub fn em4wuien4(&self) -> Em4wuien4R { + Em4wuien4R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - EM4 Wake Up Interrupt En"] #[inline(always)] - pub fn em4wuien5(&self) -> EM4WUIEN5_R { - EM4WUIEN5_R::new(((self.bits >> 21) & 1) != 0) + pub fn em4wuien5(&self) -> Em4wuien5R { + Em4wuien5R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - EM4 Wake Up Interrupt En"] #[inline(always)] - pub fn em4wuien6(&self) -> EM4WUIEN6_R { - EM4WUIEN6_R::new(((self.bits >> 22) & 1) != 0) + pub fn em4wuien6(&self) -> Em4wuien6R { + Em4wuien6R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - EM4 Wake Up Interrupt En"] #[inline(always)] - pub fn em4wuien7(&self) -> EM4WUIEN7_R { - EM4WUIEN7_R::new(((self.bits >> 23) & 1) != 0) + pub fn em4wuien7(&self) -> Em4wuien7R { + Em4wuien7R::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - EM4 Wake Up Interrupt En"] #[inline(always)] - pub fn em4wuien8(&self) -> EM4WUIEN8_R { - EM4WUIEN8_R::new(((self.bits >> 24) & 1) != 0) + pub fn em4wuien8(&self) -> Em4wuien8R { + Em4wuien8R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - EM4 Wake Up Interrupt En"] #[inline(always)] - pub fn em4wuien9(&self) -> EM4WUIEN9_R { - EM4WUIEN9_R::new(((self.bits >> 25) & 1) != 0) + pub fn em4wuien9(&self) -> Em4wuien9R { + Em4wuien9R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - EM4 Wake Up Interrupt En"] #[inline(always)] - pub fn em4wuien10(&self) -> EM4WUIEN10_R { - EM4WUIEN10_R::new(((self.bits >> 26) & 1) != 0) + pub fn em4wuien10(&self) -> Em4wuien10R { + Em4wuien10R::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - EM4 Wake Up Interrupt En"] #[inline(always)] - pub fn em4wuien11(&self) -> EM4WUIEN11_R { - EM4WUIEN11_R::new(((self.bits >> 27) & 1) != 0) + pub fn em4wuien11(&self) -> Em4wuien11R { + Em4wuien11R::new(((self.bits >> 27) & 1) != 0) } } impl W { #[doc = "Bit 0 - External Pin Enable"] #[inline(always)] #[must_use] - pub fn extien0(&mut self) -> EXTIEN0_W<0> { - EXTIEN0_W::new(self) + pub fn extien0(&mut self) -> Extien0W { + Extien0W::new(self, 0) } #[doc = "Bit 1 - External Pin Enable"] #[inline(always)] #[must_use] - pub fn extien1(&mut self) -> EXTIEN1_W<1> { - EXTIEN1_W::new(self) + pub fn extien1(&mut self) -> Extien1W { + Extien1W::new(self, 1) } #[doc = "Bit 2 - External Pin Enable"] #[inline(always)] #[must_use] - pub fn extien2(&mut self) -> EXTIEN2_W<2> { - EXTIEN2_W::new(self) + pub fn extien2(&mut self) -> Extien2W { + Extien2W::new(self, 2) } #[doc = "Bit 3 - External Pin Enable"] #[inline(always)] #[must_use] - pub fn extien3(&mut self) -> EXTIEN3_W<3> { - EXTIEN3_W::new(self) + pub fn extien3(&mut self) -> Extien3W { + Extien3W::new(self, 3) } #[doc = "Bit 4 - External Pin Enable"] #[inline(always)] #[must_use] - pub fn extien4(&mut self) -> EXTIEN4_W<4> { - EXTIEN4_W::new(self) + pub fn extien4(&mut self) -> Extien4W { + Extien4W::new(self, 4) } #[doc = "Bit 5 - External Pin Enable"] #[inline(always)] #[must_use] - pub fn extien5(&mut self) -> EXTIEN5_W<5> { - EXTIEN5_W::new(self) + pub fn extien5(&mut self) -> Extien5W { + Extien5W::new(self, 5) } #[doc = "Bit 6 - External Pin Enable"] #[inline(always)] #[must_use] - pub fn extien6(&mut self) -> EXTIEN6_W<6> { - EXTIEN6_W::new(self) + pub fn extien6(&mut self) -> Extien6W { + Extien6W::new(self, 6) } #[doc = "Bit 7 - External Pin Enable"] #[inline(always)] #[must_use] - pub fn extien7(&mut self) -> EXTIEN7_W<7> { - EXTIEN7_W::new(self) + pub fn extien7(&mut self) -> Extien7W { + Extien7W::new(self, 7) } #[doc = "Bit 8 - External Pin Enable"] #[inline(always)] #[must_use] - pub fn extien8(&mut self) -> EXTIEN8_W<8> { - EXTIEN8_W::new(self) + pub fn extien8(&mut self) -> Extien8W { + Extien8W::new(self, 8) } #[doc = "Bit 9 - External Pin Enable"] #[inline(always)] #[must_use] - pub fn extien9(&mut self) -> EXTIEN9_W<9> { - EXTIEN9_W::new(self) + pub fn extien9(&mut self) -> Extien9W { + Extien9W::new(self, 9) } #[doc = "Bit 10 - External Pin Enable"] #[inline(always)] #[must_use] - pub fn extien10(&mut self) -> EXTIEN10_W<10> { - EXTIEN10_W::new(self) + pub fn extien10(&mut self) -> Extien10W { + Extien10W::new(self, 10) } #[doc = "Bit 11 - External Pin Enable"] #[inline(always)] #[must_use] - pub fn extien11(&mut self) -> EXTIEN11_W<11> { - EXTIEN11_W::new(self) + pub fn extien11(&mut self) -> Extien11W { + Extien11W::new(self, 11) } #[doc = "Bit 16 - EM4 Wake Up Interrupt En"] #[inline(always)] #[must_use] - pub fn em4wuien0(&mut self) -> EM4WUIEN0_W<16> { - EM4WUIEN0_W::new(self) + pub fn em4wuien0(&mut self) -> Em4wuien0W { + Em4wuien0W::new(self, 16) } #[doc = "Bit 17 - EM4 Wake Up Interrupt En"] #[inline(always)] #[must_use] - pub fn em4wuien1(&mut self) -> EM4WUIEN1_W<17> { - EM4WUIEN1_W::new(self) + pub fn em4wuien1(&mut self) -> Em4wuien1W { + Em4wuien1W::new(self, 17) } #[doc = "Bit 18 - EM4 Wake Up Interrupt En"] #[inline(always)] #[must_use] - pub fn em4wuien2(&mut self) -> EM4WUIEN2_W<18> { - EM4WUIEN2_W::new(self) + pub fn em4wuien2(&mut self) -> Em4wuien2W { + Em4wuien2W::new(self, 18) } #[doc = "Bit 19 - EM4 Wake Up Interrupt En"] #[inline(always)] #[must_use] - pub fn em4wuien3(&mut self) -> EM4WUIEN3_W<19> { - EM4WUIEN3_W::new(self) + pub fn em4wuien3(&mut self) -> Em4wuien3W { + Em4wuien3W::new(self, 19) } #[doc = "Bit 20 - EM4 Wake Up Interrupt En"] #[inline(always)] #[must_use] - pub fn em4wuien4(&mut self) -> EM4WUIEN4_W<20> { - EM4WUIEN4_W::new(self) + pub fn em4wuien4(&mut self) -> Em4wuien4W { + Em4wuien4W::new(self, 20) } #[doc = "Bit 21 - EM4 Wake Up Interrupt En"] #[inline(always)] #[must_use] - pub fn em4wuien5(&mut self) -> EM4WUIEN5_W<21> { - EM4WUIEN5_W::new(self) + pub fn em4wuien5(&mut self) -> Em4wuien5W { + Em4wuien5W::new(self, 21) } #[doc = "Bit 22 - EM4 Wake Up Interrupt En"] #[inline(always)] #[must_use] - pub fn em4wuien6(&mut self) -> EM4WUIEN6_W<22> { - EM4WUIEN6_W::new(self) + pub fn em4wuien6(&mut self) -> Em4wuien6W { + Em4wuien6W::new(self, 22) } #[doc = "Bit 23 - EM4 Wake Up Interrupt En"] #[inline(always)] #[must_use] - pub fn em4wuien7(&mut self) -> EM4WUIEN7_W<23> { - EM4WUIEN7_W::new(self) + pub fn em4wuien7(&mut self) -> Em4wuien7W { + Em4wuien7W::new(self, 23) } #[doc = "Bit 24 - EM4 Wake Up Interrupt En"] #[inline(always)] #[must_use] - pub fn em4wuien8(&mut self) -> EM4WUIEN8_W<24> { - EM4WUIEN8_W::new(self) + pub fn em4wuien8(&mut self) -> Em4wuien8W { + Em4wuien8W::new(self, 24) } #[doc = "Bit 25 - EM4 Wake Up Interrupt En"] #[inline(always)] #[must_use] - pub fn em4wuien9(&mut self) -> EM4WUIEN9_W<25> { - EM4WUIEN9_W::new(self) + pub fn em4wuien9(&mut self) -> Em4wuien9W { + Em4wuien9W::new(self, 25) } #[doc = "Bit 26 - EM4 Wake Up Interrupt En"] #[inline(always)] #[must_use] - pub fn em4wuien10(&mut self) -> EM4WUIEN10_W<26> { - EM4WUIEN10_W::new(self) + pub fn em4wuien10(&mut self) -> Em4wuien10W { + Em4wuien10W::new(self, 26) } #[doc = "Bit 27 - EM4 Wake Up Interrupt En"] #[inline(always)] #[must_use] - pub fn em4wuien11(&mut self) -> EM4WUIEN11_W<27> { - EM4WUIEN11_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn em4wuien11(&mut self) -> Em4wuien11W { + Em4wuien11W::new(self, 27) } } -#[doc = "Interrupt Enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/if_.rs index 90a94c4..36e15f2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/if_.rs @@ -1,260 +1,220 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EXTIF0` reader - External Pin Flag"] -pub type EXTIF0_R = crate::BitReader; +pub type Extif0R = crate::BitReader; #[doc = "Field `EXTIF0` writer - External Pin Flag"] -pub type EXTIF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Extif0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIF1` reader - External Pin Flag"] -pub type EXTIF1_R = crate::BitReader; +pub type Extif1R = crate::BitReader; #[doc = "Field `EXTIF1` writer - External Pin Flag"] -pub type EXTIF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Extif1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIF2` reader - External Pin Flag"] -pub type EXTIF2_R = crate::BitReader; +pub type Extif2R = crate::BitReader; #[doc = "Field `EXTIF2` writer - External Pin Flag"] -pub type EXTIF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Extif2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIF3` reader - External Pin Flag"] -pub type EXTIF3_R = crate::BitReader; +pub type Extif3R = crate::BitReader; #[doc = "Field `EXTIF3` writer - External Pin Flag"] -pub type EXTIF3_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Extif3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIF4` reader - External Pin Flag"] -pub type EXTIF4_R = crate::BitReader; +pub type Extif4R = crate::BitReader; #[doc = "Field `EXTIF4` writer - External Pin Flag"] -pub type EXTIF4_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Extif4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIF5` reader - External Pin Flag"] -pub type EXTIF5_R = crate::BitReader; +pub type Extif5R = crate::BitReader; #[doc = "Field `EXTIF5` writer - External Pin Flag"] -pub type EXTIF5_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Extif5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIF6` reader - External Pin Flag"] -pub type EXTIF6_R = crate::BitReader; +pub type Extif6R = crate::BitReader; #[doc = "Field `EXTIF6` writer - External Pin Flag"] -pub type EXTIF6_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Extif6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIF7` reader - External Pin Flag"] -pub type EXTIF7_R = crate::BitReader; +pub type Extif7R = crate::BitReader; #[doc = "Field `EXTIF7` writer - External Pin Flag"] -pub type EXTIF7_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Extif7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIF8` reader - External Pin Flag"] -pub type EXTIF8_R = crate::BitReader; +pub type Extif8R = crate::BitReader; #[doc = "Field `EXTIF8` writer - External Pin Flag"] -pub type EXTIF8_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Extif8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIF9` reader - External Pin Flag"] -pub type EXTIF9_R = crate::BitReader; +pub type Extif9R = crate::BitReader; #[doc = "Field `EXTIF9` writer - External Pin Flag"] -pub type EXTIF9_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Extif9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIF10` reader - External Pin Flag"] -pub type EXTIF10_R = crate::BitReader; +pub type Extif10R = crate::BitReader; #[doc = "Field `EXTIF10` writer - External Pin Flag"] -pub type EXTIF10_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Extif10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIF11` reader - External Pin Flag"] -pub type EXTIF11_R = crate::BitReader; +pub type Extif11R = crate::BitReader; #[doc = "Field `EXTIF11` writer - External Pin Flag"] -pub type EXTIF11_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Extif11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4WU` reader - EM4 wake up"] -pub type EM4WU_R = crate::FieldReader; +pub type Em4wuR = crate::FieldReader; #[doc = "Field `EM4WU` writer - EM4 wake up"] -pub type EM4WU_W<'a, const O: u8> = crate::FieldWriter<'a, u32, IF_SPEC, u16, u16, 12, O>; +pub type Em4wuW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bit 0 - External Pin Flag"] #[inline(always)] - pub fn extif0(&self) -> EXTIF0_R { - EXTIF0_R::new((self.bits & 1) != 0) + pub fn extif0(&self) -> Extif0R { + Extif0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - External Pin Flag"] #[inline(always)] - pub fn extif1(&self) -> EXTIF1_R { - EXTIF1_R::new(((self.bits >> 1) & 1) != 0) + pub fn extif1(&self) -> Extif1R { + Extif1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - External Pin Flag"] #[inline(always)] - pub fn extif2(&self) -> EXTIF2_R { - EXTIF2_R::new(((self.bits >> 2) & 1) != 0) + pub fn extif2(&self) -> Extif2R { + Extif2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - External Pin Flag"] #[inline(always)] - pub fn extif3(&self) -> EXTIF3_R { - EXTIF3_R::new(((self.bits >> 3) & 1) != 0) + pub fn extif3(&self) -> Extif3R { + Extif3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - External Pin Flag"] #[inline(always)] - pub fn extif4(&self) -> EXTIF4_R { - EXTIF4_R::new(((self.bits >> 4) & 1) != 0) + pub fn extif4(&self) -> Extif4R { + Extif4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - External Pin Flag"] #[inline(always)] - pub fn extif5(&self) -> EXTIF5_R { - EXTIF5_R::new(((self.bits >> 5) & 1) != 0) + pub fn extif5(&self) -> Extif5R { + Extif5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - External Pin Flag"] #[inline(always)] - pub fn extif6(&self) -> EXTIF6_R { - EXTIF6_R::new(((self.bits >> 6) & 1) != 0) + pub fn extif6(&self) -> Extif6R { + Extif6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - External Pin Flag"] #[inline(always)] - pub fn extif7(&self) -> EXTIF7_R { - EXTIF7_R::new(((self.bits >> 7) & 1) != 0) + pub fn extif7(&self) -> Extif7R { + Extif7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - External Pin Flag"] #[inline(always)] - pub fn extif8(&self) -> EXTIF8_R { - EXTIF8_R::new(((self.bits >> 8) & 1) != 0) + pub fn extif8(&self) -> Extif8R { + Extif8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - External Pin Flag"] #[inline(always)] - pub fn extif9(&self) -> EXTIF9_R { - EXTIF9_R::new(((self.bits >> 9) & 1) != 0) + pub fn extif9(&self) -> Extif9R { + Extif9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - External Pin Flag"] #[inline(always)] - pub fn extif10(&self) -> EXTIF10_R { - EXTIF10_R::new(((self.bits >> 10) & 1) != 0) + pub fn extif10(&self) -> Extif10R { + Extif10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - External Pin Flag"] #[inline(always)] - pub fn extif11(&self) -> EXTIF11_R { - EXTIF11_R::new(((self.bits >> 11) & 1) != 0) + pub fn extif11(&self) -> Extif11R { + Extif11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bits 16:27 - EM4 wake up"] #[inline(always)] - pub fn em4wu(&self) -> EM4WU_R { - EM4WU_R::new(((self.bits >> 16) & 0x0fff) as u16) + pub fn em4wu(&self) -> Em4wuR { + Em4wuR::new(((self.bits >> 16) & 0x0fff) as u16) } } impl W { #[doc = "Bit 0 - External Pin Flag"] #[inline(always)] #[must_use] - pub fn extif0(&mut self) -> EXTIF0_W<0> { - EXTIF0_W::new(self) + pub fn extif0(&mut self) -> Extif0W { + Extif0W::new(self, 0) } #[doc = "Bit 1 - External Pin Flag"] #[inline(always)] #[must_use] - pub fn extif1(&mut self) -> EXTIF1_W<1> { - EXTIF1_W::new(self) + pub fn extif1(&mut self) -> Extif1W { + Extif1W::new(self, 1) } #[doc = "Bit 2 - External Pin Flag"] #[inline(always)] #[must_use] - pub fn extif2(&mut self) -> EXTIF2_W<2> { - EXTIF2_W::new(self) + pub fn extif2(&mut self) -> Extif2W { + Extif2W::new(self, 2) } #[doc = "Bit 3 - External Pin Flag"] #[inline(always)] #[must_use] - pub fn extif3(&mut self) -> EXTIF3_W<3> { - EXTIF3_W::new(self) + pub fn extif3(&mut self) -> Extif3W { + Extif3W::new(self, 3) } #[doc = "Bit 4 - External Pin Flag"] #[inline(always)] #[must_use] - pub fn extif4(&mut self) -> EXTIF4_W<4> { - EXTIF4_W::new(self) + pub fn extif4(&mut self) -> Extif4W { + Extif4W::new(self, 4) } #[doc = "Bit 5 - External Pin Flag"] #[inline(always)] #[must_use] - pub fn extif5(&mut self) -> EXTIF5_W<5> { - EXTIF5_W::new(self) + pub fn extif5(&mut self) -> Extif5W { + Extif5W::new(self, 5) } #[doc = "Bit 6 - External Pin Flag"] #[inline(always)] #[must_use] - pub fn extif6(&mut self) -> EXTIF6_W<6> { - EXTIF6_W::new(self) + pub fn extif6(&mut self) -> Extif6W { + Extif6W::new(self, 6) } #[doc = "Bit 7 - External Pin Flag"] #[inline(always)] #[must_use] - pub fn extif7(&mut self) -> EXTIF7_W<7> { - EXTIF7_W::new(self) + pub fn extif7(&mut self) -> Extif7W { + Extif7W::new(self, 7) } #[doc = "Bit 8 - External Pin Flag"] #[inline(always)] #[must_use] - pub fn extif8(&mut self) -> EXTIF8_W<8> { - EXTIF8_W::new(self) + pub fn extif8(&mut self) -> Extif8W { + Extif8W::new(self, 8) } #[doc = "Bit 9 - External Pin Flag"] #[inline(always)] #[must_use] - pub fn extif9(&mut self) -> EXTIF9_W<9> { - EXTIF9_W::new(self) + pub fn extif9(&mut self) -> Extif9W { + Extif9W::new(self, 9) } #[doc = "Bit 10 - External Pin Flag"] #[inline(always)] #[must_use] - pub fn extif10(&mut self) -> EXTIF10_W<10> { - EXTIF10_W::new(self) + pub fn extif10(&mut self) -> Extif10W { + Extif10W::new(self, 10) } #[doc = "Bit 11 - External Pin Flag"] #[inline(always)] #[must_use] - pub fn extif11(&mut self) -> EXTIF11_W<11> { - EXTIF11_W::new(self) + pub fn extif11(&mut self) -> Extif11W { + Extif11W::new(self, 11) } #[doc = "Bits 16:27 - EM4 wake up"] #[inline(always)] #[must_use] - pub fn em4wu(&mut self) -> EM4WU_W<16> { - EM4WU_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn em4wu(&mut self) -> Em4wuW { + Em4wuW::new(self, 16) } } -#[doc = "Interrupt Flag\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "Interrupt Flag\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/ipversion.rs index ce7bde5..9510873 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - ip version id"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - ip version id"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x02"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout0route.rs index e6aec9d..7991f79 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout0route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_COLOUT0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_COLOUT0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - COLOUT0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - COLOUT0 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - COLOUT0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - COLOUT0 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - COLOUT0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - COLOUT0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - COLOUT0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - COLOUT0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "COLOUT0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_colout0route](index.html) module"] -pub struct KEYSCAN_COLOUT0ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_COLOUT0ROUTE_SPEC { +#[doc = "COLOUT0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanColout0routeSpec; +impl crate::RegisterSpec for KeyscanColout0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_colout0route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_COLOUT0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_colout0route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_COLOUT0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_colout0route::R`](R) reader structure"] +impl crate::Readable for KeyscanColout0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_colout0route::W`](W) writer structure"] +impl crate::Writable for KeyscanColout0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_COLOUT0ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_COLOUT0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanColout0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout1route.rs index f8a9735..6bf15c3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout1route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_COLOUT1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_COLOUT1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - COLOUT1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - COLOUT1 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - COLOUT1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - COLOUT1 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - COLOUT1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - COLOUT1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - COLOUT1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - COLOUT1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "COLOUT1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_colout1route](index.html) module"] -pub struct KEYSCAN_COLOUT1ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_COLOUT1ROUTE_SPEC { +#[doc = "COLOUT1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanColout1routeSpec; +impl crate::RegisterSpec for KeyscanColout1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_colout1route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_COLOUT1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_colout1route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_COLOUT1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_colout1route::R`](R) reader structure"] +impl crate::Readable for KeyscanColout1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_colout1route::W`](W) writer structure"] +impl crate::Writable for KeyscanColout1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_COLOUT1ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_COLOUT1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanColout1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout2route.rs index 36ad8ef..9cbe2f4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout2route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_COLOUT2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_COLOUT2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - COLOUT2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - COLOUT2 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - COLOUT2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - COLOUT2 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - COLOUT2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - COLOUT2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - COLOUT2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - COLOUT2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "COLOUT2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_colout2route](index.html) module"] -pub struct KEYSCAN_COLOUT2ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_COLOUT2ROUTE_SPEC { +#[doc = "COLOUT2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanColout2routeSpec; +impl crate::RegisterSpec for KeyscanColout2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_colout2route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_COLOUT2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_colout2route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_COLOUT2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_colout2route::R`](R) reader structure"] +impl crate::Readable for KeyscanColout2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_colout2route::W`](W) writer structure"] +impl crate::Writable for KeyscanColout2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_COLOUT2ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_COLOUT2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanColout2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout3route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout3route.rs index 54413d2..3f3e61c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout3route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout3route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_COLOUT3ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_COLOUT3ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - COLOUT3 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - COLOUT3 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT3ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - COLOUT3 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - COLOUT3 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT3ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - COLOUT3 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - COLOUT3 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - COLOUT3 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - COLOUT3 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "COLOUT3 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_colout3route](index.html) module"] -pub struct KEYSCAN_COLOUT3ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_COLOUT3ROUTE_SPEC { +#[doc = "COLOUT3 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout3route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout3route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanColout3routeSpec; +impl crate::RegisterSpec for KeyscanColout3routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_colout3route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_COLOUT3ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_colout3route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_COLOUT3ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_colout3route::R`](R) reader structure"] +impl crate::Readable for KeyscanColout3routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_colout3route::W`](W) writer structure"] +impl crate::Writable for KeyscanColout3routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_COLOUT3ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_COLOUT3ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanColout3routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout4route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout4route.rs index 3b6c144..f0f5a46 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout4route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout4route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_COLOUT4ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_COLOUT4ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - COLOUT4 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - COLOUT4 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT4ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - COLOUT4 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - COLOUT4 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT4ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - COLOUT4 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - COLOUT4 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - COLOUT4 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - COLOUT4 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "COLOUT4 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_colout4route](index.html) module"] -pub struct KEYSCAN_COLOUT4ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_COLOUT4ROUTE_SPEC { +#[doc = "COLOUT4 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout4route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout4route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanColout4routeSpec; +impl crate::RegisterSpec for KeyscanColout4routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_colout4route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_COLOUT4ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_colout4route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_COLOUT4ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_colout4route::R`](R) reader structure"] +impl crate::Readable for KeyscanColout4routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_colout4route::W`](W) writer structure"] +impl crate::Writable for KeyscanColout4routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_COLOUT4ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_COLOUT4ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanColout4routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout5route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout5route.rs index b1650aa..eefc548 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout5route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout5route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_COLOUT5ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_COLOUT5ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - COLOUT5 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - COLOUT5 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT5ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - COLOUT5 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - COLOUT5 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT5ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - COLOUT5 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - COLOUT5 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - COLOUT5 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - COLOUT5 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "COLOUT5 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_colout5route](index.html) module"] -pub struct KEYSCAN_COLOUT5ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_COLOUT5ROUTE_SPEC { +#[doc = "COLOUT5 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout5route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout5route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanColout5routeSpec; +impl crate::RegisterSpec for KeyscanColout5routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_colout5route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_COLOUT5ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_colout5route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_COLOUT5ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_colout5route::R`](R) reader structure"] +impl crate::Readable for KeyscanColout5routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_colout5route::W`](W) writer structure"] +impl crate::Writable for KeyscanColout5routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_COLOUT5ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_COLOUT5ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanColout5routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout6route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout6route.rs index 7af4eb5..140306e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout6route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout6route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_COLOUT6ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_COLOUT6ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - COLOUT6 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - COLOUT6 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT6ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - COLOUT6 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - COLOUT6 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT6ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - COLOUT6 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - COLOUT6 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - COLOUT6 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - COLOUT6 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "COLOUT6 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_colout6route](index.html) module"] -pub struct KEYSCAN_COLOUT6ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_COLOUT6ROUTE_SPEC { +#[doc = "COLOUT6 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout6route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout6route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanColout6routeSpec; +impl crate::RegisterSpec for KeyscanColout6routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_colout6route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_COLOUT6ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_colout6route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_COLOUT6ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_colout6route::R`](R) reader structure"] +impl crate::Readable for KeyscanColout6routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_colout6route::W`](W) writer structure"] +impl crate::Writable for KeyscanColout6routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_COLOUT6ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_COLOUT6ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanColout6routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout7route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout7route.rs index 12c864a..0ef9678 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout7route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_colout7route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_COLOUT7ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_COLOUT7ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - COLOUT7 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - COLOUT7 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT7ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - COLOUT7 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - COLOUT7 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT7ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - COLOUT7 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - COLOUT7 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - COLOUT7 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - COLOUT7 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "COLOUT7 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_colout7route](index.html) module"] -pub struct KEYSCAN_COLOUT7ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_COLOUT7ROUTE_SPEC { +#[doc = "COLOUT7 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout7route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout7route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanColout7routeSpec; +impl crate::RegisterSpec for KeyscanColout7routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_colout7route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_COLOUT7ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_colout7route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_COLOUT7ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_colout7route::R`](R) reader structure"] +impl crate::Readable for KeyscanColout7routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_colout7route::W`](W) writer structure"] +impl crate::Writable for KeyscanColout7routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_COLOUT7ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_COLOUT7ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanColout7routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_routeen.rs index 88b0755..125d00e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_routeen.rs @@ -1,185 +1,145 @@ #[doc = "Register `KEYSCAN_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `COLOUT0PEN` reader - COLOUT0 pin enable control bit"] -pub type COLOUT0PEN_R = crate::BitReader; +pub type Colout0penR = crate::BitReader; #[doc = "Field `COLOUT0PEN` writer - COLOUT0 pin enable control bit"] -pub type COLOUT0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, KEYSCAN_ROUTEEN_SPEC, bool, O>; +pub type Colout0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COLOUT1PEN` reader - COLOUT1 pin enable control bit"] -pub type COLOUT1PEN_R = crate::BitReader; +pub type Colout1penR = crate::BitReader; #[doc = "Field `COLOUT1PEN` writer - COLOUT1 pin enable control bit"] -pub type COLOUT1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, KEYSCAN_ROUTEEN_SPEC, bool, O>; +pub type Colout1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COLOUT2PEN` reader - COLOUT2 pin enable control bit"] -pub type COLOUT2PEN_R = crate::BitReader; +pub type Colout2penR = crate::BitReader; #[doc = "Field `COLOUT2PEN` writer - COLOUT2 pin enable control bit"] -pub type COLOUT2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, KEYSCAN_ROUTEEN_SPEC, bool, O>; +pub type Colout2penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COLOUT3PEN` reader - COLOUT3 pin enable control bit"] -pub type COLOUT3PEN_R = crate::BitReader; +pub type Colout3penR = crate::BitReader; #[doc = "Field `COLOUT3PEN` writer - COLOUT3 pin enable control bit"] -pub type COLOUT3PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, KEYSCAN_ROUTEEN_SPEC, bool, O>; +pub type Colout3penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COLOUT4PEN` reader - COLOUT4 pin enable control bit"] -pub type COLOUT4PEN_R = crate::BitReader; +pub type Colout4penR = crate::BitReader; #[doc = "Field `COLOUT4PEN` writer - COLOUT4 pin enable control bit"] -pub type COLOUT4PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, KEYSCAN_ROUTEEN_SPEC, bool, O>; +pub type Colout4penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COLOUT5PEN` reader - COLOUT5 pin enable control bit"] -pub type COLOUT5PEN_R = crate::BitReader; +pub type Colout5penR = crate::BitReader; #[doc = "Field `COLOUT5PEN` writer - COLOUT5 pin enable control bit"] -pub type COLOUT5PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, KEYSCAN_ROUTEEN_SPEC, bool, O>; +pub type Colout5penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COLOUT6PEN` reader - COLOUT6 pin enable control bit"] -pub type COLOUT6PEN_R = crate::BitReader; +pub type Colout6penR = crate::BitReader; #[doc = "Field `COLOUT6PEN` writer - COLOUT6 pin enable control bit"] -pub type COLOUT6PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, KEYSCAN_ROUTEEN_SPEC, bool, O>; +pub type Colout6penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COLOUT7PEN` reader - COLOUT7 pin enable control bit"] -pub type COLOUT7PEN_R = crate::BitReader; +pub type Colout7penR = crate::BitReader; #[doc = "Field `COLOUT7PEN` writer - COLOUT7 pin enable control bit"] -pub type COLOUT7PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, KEYSCAN_ROUTEEN_SPEC, bool, O>; +pub type Colout7penW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - COLOUT0 pin enable control bit"] #[inline(always)] - pub fn colout0pen(&self) -> COLOUT0PEN_R { - COLOUT0PEN_R::new((self.bits & 1) != 0) + pub fn colout0pen(&self) -> Colout0penR { + Colout0penR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - COLOUT1 pin enable control bit"] #[inline(always)] - pub fn colout1pen(&self) -> COLOUT1PEN_R { - COLOUT1PEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn colout1pen(&self) -> Colout1penR { + Colout1penR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - COLOUT2 pin enable control bit"] #[inline(always)] - pub fn colout2pen(&self) -> COLOUT2PEN_R { - COLOUT2PEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn colout2pen(&self) -> Colout2penR { + Colout2penR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - COLOUT3 pin enable control bit"] #[inline(always)] - pub fn colout3pen(&self) -> COLOUT3PEN_R { - COLOUT3PEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn colout3pen(&self) -> Colout3penR { + Colout3penR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - COLOUT4 pin enable control bit"] #[inline(always)] - pub fn colout4pen(&self) -> COLOUT4PEN_R { - COLOUT4PEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn colout4pen(&self) -> Colout4penR { + Colout4penR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - COLOUT5 pin enable control bit"] #[inline(always)] - pub fn colout5pen(&self) -> COLOUT5PEN_R { - COLOUT5PEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn colout5pen(&self) -> Colout5penR { + Colout5penR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - COLOUT6 pin enable control bit"] #[inline(always)] - pub fn colout6pen(&self) -> COLOUT6PEN_R { - COLOUT6PEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn colout6pen(&self) -> Colout6penR { + Colout6penR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - COLOUT7 pin enable control bit"] #[inline(always)] - pub fn colout7pen(&self) -> COLOUT7PEN_R { - COLOUT7PEN_R::new(((self.bits >> 7) & 1) != 0) + pub fn colout7pen(&self) -> Colout7penR { + Colout7penR::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - COLOUT0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn colout0pen(&mut self) -> COLOUT0PEN_W<0> { - COLOUT0PEN_W::new(self) + pub fn colout0pen(&mut self) -> Colout0penW { + Colout0penW::new(self, 0) } #[doc = "Bit 1 - COLOUT1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn colout1pen(&mut self) -> COLOUT1PEN_W<1> { - COLOUT1PEN_W::new(self) + pub fn colout1pen(&mut self) -> Colout1penW { + Colout1penW::new(self, 1) } #[doc = "Bit 2 - COLOUT2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn colout2pen(&mut self) -> COLOUT2PEN_W<2> { - COLOUT2PEN_W::new(self) + pub fn colout2pen(&mut self) -> Colout2penW { + Colout2penW::new(self, 2) } #[doc = "Bit 3 - COLOUT3 pin enable control bit"] #[inline(always)] #[must_use] - pub fn colout3pen(&mut self) -> COLOUT3PEN_W<3> { - COLOUT3PEN_W::new(self) + pub fn colout3pen(&mut self) -> Colout3penW { + Colout3penW::new(self, 3) } #[doc = "Bit 4 - COLOUT4 pin enable control bit"] #[inline(always)] #[must_use] - pub fn colout4pen(&mut self) -> COLOUT4PEN_W<4> { - COLOUT4PEN_W::new(self) + pub fn colout4pen(&mut self) -> Colout4penW { + Colout4penW::new(self, 4) } #[doc = "Bit 5 - COLOUT5 pin enable control bit"] #[inline(always)] #[must_use] - pub fn colout5pen(&mut self) -> COLOUT5PEN_W<5> { - COLOUT5PEN_W::new(self) + pub fn colout5pen(&mut self) -> Colout5penW { + Colout5penW::new(self, 5) } #[doc = "Bit 6 - COLOUT6 pin enable control bit"] #[inline(always)] #[must_use] - pub fn colout6pen(&mut self) -> COLOUT6PEN_W<6> { - COLOUT6PEN_W::new(self) + pub fn colout6pen(&mut self) -> Colout6penW { + Colout6penW::new(self, 6) } #[doc = "Bit 7 - COLOUT7 pin enable control bit"] #[inline(always)] #[must_use] - pub fn colout7pen(&mut self) -> COLOUT7PEN_W<7> { - COLOUT7PEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn colout7pen(&mut self) -> Colout7penW { + Colout7penW::new(self, 7) } } -#[doc = "KEYSCAN pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_routeen](index.html) module"] -pub struct KEYSCAN_ROUTEEN_SPEC; -impl crate::RegisterSpec for KEYSCAN_ROUTEEN_SPEC { +#[doc = "KEYSCAN pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanRouteenSpec; +impl crate::RegisterSpec for KeyscanRouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_routeen::R](R) reader structure"] -impl crate::Readable for KEYSCAN_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_routeen::W](W) writer structure"] -impl crate::Writable for KEYSCAN_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_routeen::R`](R) reader structure"] +impl crate::Readable for KeyscanRouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_routeen::W`](W) writer structure"] +impl crate::Writable for KeyscanRouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_ROUTEEN to value 0"] -impl crate::Resettable for KEYSCAN_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanRouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_rowsense0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_rowsense0route.rs index e2e0ada..8d57d0f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_rowsense0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_rowsense0route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_ROWSENSE0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_ROWSENSE0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ROWSENSE0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ROWSENSE0 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_ROWSENSE0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ROWSENSE0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ROWSENSE0 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_ROWSENSE0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ROWSENSE0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ROWSENSE0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ROWSENSE0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ROWSENSE0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ROWSENSE0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_rowsense0route](index.html) module"] -pub struct KEYSCAN_ROWSENSE0ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_ROWSENSE0ROUTE_SPEC { +#[doc = "ROWSENSE0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_rowsense0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_rowsense0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanRowsense0routeSpec; +impl crate::RegisterSpec for KeyscanRowsense0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_rowsense0route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_ROWSENSE0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_rowsense0route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_ROWSENSE0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_rowsense0route::R`](R) reader structure"] +impl crate::Readable for KeyscanRowsense0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_rowsense0route::W`](W) writer structure"] +impl crate::Writable for KeyscanRowsense0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_ROWSENSE0ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_ROWSENSE0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanRowsense0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_rowsense1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_rowsense1route.rs index d308429..446540c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_rowsense1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_rowsense1route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_ROWSENSE1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_ROWSENSE1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ROWSENSE1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ROWSENSE1 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_ROWSENSE1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ROWSENSE1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ROWSENSE1 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_ROWSENSE1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ROWSENSE1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ROWSENSE1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ROWSENSE1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ROWSENSE1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ROWSENSE1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_rowsense1route](index.html) module"] -pub struct KEYSCAN_ROWSENSE1ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_ROWSENSE1ROUTE_SPEC { +#[doc = "ROWSENSE1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_rowsense1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_rowsense1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanRowsense1routeSpec; +impl crate::RegisterSpec for KeyscanRowsense1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_rowsense1route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_ROWSENSE1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_rowsense1route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_ROWSENSE1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_rowsense1route::R`](R) reader structure"] +impl crate::Readable for KeyscanRowsense1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_rowsense1route::W`](W) writer structure"] +impl crate::Writable for KeyscanRowsense1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_ROWSENSE1ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_ROWSENSE1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanRowsense1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_rowsense2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_rowsense2route.rs index d019378..20cbae6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_rowsense2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_rowsense2route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_ROWSENSE2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_ROWSENSE2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ROWSENSE2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ROWSENSE2 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_ROWSENSE2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ROWSENSE2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ROWSENSE2 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_ROWSENSE2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ROWSENSE2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ROWSENSE2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ROWSENSE2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ROWSENSE2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ROWSENSE2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_rowsense2route](index.html) module"] -pub struct KEYSCAN_ROWSENSE2ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_ROWSENSE2ROUTE_SPEC { +#[doc = "ROWSENSE2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_rowsense2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_rowsense2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanRowsense2routeSpec; +impl crate::RegisterSpec for KeyscanRowsense2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_rowsense2route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_ROWSENSE2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_rowsense2route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_ROWSENSE2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_rowsense2route::R`](R) reader structure"] +impl crate::Readable for KeyscanRowsense2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_rowsense2route::W`](W) writer structure"] +impl crate::Writable for KeyscanRowsense2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_ROWSENSE2ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_ROWSENSE2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanRowsense2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_rowsense3route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_rowsense3route.rs index 77ea318..b13178d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_rowsense3route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_rowsense3route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_ROWSENSE3ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_ROWSENSE3ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ROWSENSE3 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ROWSENSE3 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_ROWSENSE3ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ROWSENSE3 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ROWSENSE3 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_ROWSENSE3ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ROWSENSE3 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ROWSENSE3 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ROWSENSE3 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ROWSENSE3 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ROWSENSE3 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_rowsense3route](index.html) module"] -pub struct KEYSCAN_ROWSENSE3ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_ROWSENSE3ROUTE_SPEC { +#[doc = "ROWSENSE3 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_rowsense3route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_rowsense3route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanRowsense3routeSpec; +impl crate::RegisterSpec for KeyscanRowsense3routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_rowsense3route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_ROWSENSE3ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_rowsense3route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_ROWSENSE3ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_rowsense3route::R`](R) reader structure"] +impl crate::Readable for KeyscanRowsense3routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_rowsense3route::W`](W) writer structure"] +impl crate::Writable for KeyscanRowsense3routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_ROWSENSE3ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_ROWSENSE3ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanRowsense3routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_rowsense4route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_rowsense4route.rs index 7668e10..5526d95 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_rowsense4route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_rowsense4route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_ROWSENSE4ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_ROWSENSE4ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ROWSENSE4 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ROWSENSE4 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_ROWSENSE4ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ROWSENSE4 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ROWSENSE4 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_ROWSENSE4ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ROWSENSE4 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ROWSENSE4 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ROWSENSE4 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ROWSENSE4 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ROWSENSE4 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_rowsense4route](index.html) module"] -pub struct KEYSCAN_ROWSENSE4ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_ROWSENSE4ROUTE_SPEC { +#[doc = "ROWSENSE4 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_rowsense4route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_rowsense4route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanRowsense4routeSpec; +impl crate::RegisterSpec for KeyscanRowsense4routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_rowsense4route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_ROWSENSE4ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_rowsense4route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_ROWSENSE4ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_rowsense4route::R`](R) reader structure"] +impl crate::Readable for KeyscanRowsense4routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_rowsense4route::W`](W) writer structure"] +impl crate::Writable for KeyscanRowsense4routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_ROWSENSE4ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_ROWSENSE4ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanRowsense4routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_rowsense5route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_rowsense5route.rs index 824b261..37071dd 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_rowsense5route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/keyscan_rowsense5route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_ROWSENSE5ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_ROWSENSE5ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ROWSENSE5 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ROWSENSE5 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_ROWSENSE5ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ROWSENSE5 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ROWSENSE5 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_ROWSENSE5ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ROWSENSE5 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ROWSENSE5 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ROWSENSE5 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ROWSENSE5 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ROWSENSE5 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_rowsense5route](index.html) module"] -pub struct KEYSCAN_ROWSENSE5ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_ROWSENSE5ROUTE_SPEC { +#[doc = "ROWSENSE5 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_rowsense5route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_rowsense5route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanRowsense5routeSpec; +impl crate::RegisterSpec for KeyscanRowsense5routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_rowsense5route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_ROWSENSE5ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_rowsense5route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_ROWSENSE5ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_rowsense5route::R`](R) reader structure"] +impl crate::Readable for KeyscanRowsense5routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_rowsense5route::W`](W) writer structure"] +impl crate::Writable for KeyscanRowsense5routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_ROWSENSE5ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_ROWSENSE5ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanRowsense5routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lcdcom.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lcdcom.rs index 0f728fb..31eb64a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lcdcom.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lcdcom.rs @@ -1,80 +1,40 @@ #[doc = "Register `LCDCOM` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LCDCOM` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LCDCOMALLOC` reader - LCD Common Allocation"] -pub type LCDCOMALLOC_R = crate::FieldReader; +pub type LcdcomallocR = crate::FieldReader; #[doc = "Field `LCDCOMALLOC` writer - LCD Common Allocation"] -pub type LCDCOMALLOC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, LCDCOM_SPEC, u8, u8, 4, O>; +pub type LcdcomallocW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - LCD Common Allocation"] #[inline(always)] - pub fn lcdcomalloc(&self) -> LCDCOMALLOC_R { - LCDCOMALLOC_R::new((self.bits & 0x0f) as u8) + pub fn lcdcomalloc(&self) -> LcdcomallocR { + LcdcomallocR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - LCD Common Allocation"] #[inline(always)] #[must_use] - pub fn lcdcomalloc(&mut self) -> LCDCOMALLOC_W<0> { - LCDCOMALLOC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lcdcomalloc(&mut self) -> LcdcomallocW { + LcdcomallocW::new(self, 0) } } -#[doc = "LCD Common Enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lcdcom](index.html) module"] -pub struct LCDCOM_SPEC; -impl crate::RegisterSpec for LCDCOM_SPEC { +#[doc = "LCD Common Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`lcdcom::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lcdcom::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LcdcomSpec; +impl crate::RegisterSpec for LcdcomSpec { type Ux = u32; } -#[doc = "`read()` method returns [lcdcom::R](R) reader structure"] -impl crate::Readable for LCDCOM_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lcdcom::W](W) writer structure"] -impl crate::Writable for LCDCOM_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lcdcom::R`](R) reader structure"] +impl crate::Readable for LcdcomSpec {} +#[doc = "`write(|w| ..)` method takes [`lcdcom::W`](W) writer structure"] +impl crate::Writable for LcdcomSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LCDCOM to value 0"] -impl crate::Resettable for LCDCOM_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LcdcomSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lcdseg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lcdseg.rs index ae06d54..735fc4f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lcdseg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lcdseg.rs @@ -1,80 +1,40 @@ #[doc = "Register `LCDSEG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LCDSEG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LCDSEGALLOC` reader - LCD Segment Allocation"] -pub type LCDSEGALLOC_R = crate::FieldReader; +pub type LcdsegallocR = crate::FieldReader; #[doc = "Field `LCDSEGALLOC` writer - LCD Segment Allocation"] -pub type LCDSEGALLOC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, LCDSEG_SPEC, u32, u32, 20, O>; +pub type LcdsegallocW<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { #[doc = "Bits 0:19 - LCD Segment Allocation"] #[inline(always)] - pub fn lcdsegalloc(&self) -> LCDSEGALLOC_R { - LCDSEGALLOC_R::new(self.bits & 0x000f_ffff) + pub fn lcdsegalloc(&self) -> LcdsegallocR { + LcdsegallocR::new(self.bits & 0x000f_ffff) } } impl W { #[doc = "Bits 0:19 - LCD Segment Allocation"] #[inline(always)] #[must_use] - pub fn lcdsegalloc(&mut self) -> LCDSEGALLOC_W<0> { - LCDSEGALLOC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lcdsegalloc(&mut self) -> LcdsegallocW { + LcdsegallocW::new(self, 0) } } -#[doc = "LCD Segment Enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lcdseg](index.html) module"] -pub struct LCDSEG_SPEC; -impl crate::RegisterSpec for LCDSEG_SPEC { +#[doc = "LCD Segment Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`lcdseg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lcdseg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LcdsegSpec; +impl crate::RegisterSpec for LcdsegSpec { type Ux = u32; } -#[doc = "`read()` method returns [lcdseg::R](R) reader structure"] -impl crate::Readable for LCDSEG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lcdseg::W](W) writer structure"] -impl crate::Writable for LCDSEG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lcdseg::R`](R) reader structure"] +impl crate::Readable for LcdsegSpec {} +#[doc = "`write(|w| ..)` method takes [`lcdseg::W`](W) writer structure"] +impl crate::Writable for LcdsegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LCDSEG to value 0"] -impl crate::Resettable for LCDSEG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LcdsegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch0outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch0outroute.rs index 2c684b9..d108431 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch0outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch0outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH0OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH0OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH0OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH0OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH0OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH0OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH0OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH0OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH0OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH0OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH0OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH0OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH0OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch0outroute](index.html) module"] -pub struct LESENSE_CH0OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH0OUTROUTE_SPEC { +#[doc = "CH0OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch0outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch0outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh0outrouteSpec; +impl crate::RegisterSpec for LesenseCh0outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch0outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH0OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch0outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH0OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch0outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh0outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch0outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh0outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH0OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH0OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh0outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch10outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch10outroute.rs index cdc5d8d..c29d8a2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch10outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch10outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH10OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH10OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH10OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH10OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH10OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH10OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH10OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH10OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH10OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH10OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH10OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH10OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH10OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch10outroute](index.html) module"] -pub struct LESENSE_CH10OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH10OUTROUTE_SPEC { +#[doc = "CH10OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch10outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch10outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh10outrouteSpec; +impl crate::RegisterSpec for LesenseCh10outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch10outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH10OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch10outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH10OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch10outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh10outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch10outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh10outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH10OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH10OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh10outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch11outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch11outroute.rs index 37f2531..a0fe4fa 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch11outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch11outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH11OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH11OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH11OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH11OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH11OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH11OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH11OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH11OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH11OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH11OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH11OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH11OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH11OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch11outroute](index.html) module"] -pub struct LESENSE_CH11OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH11OUTROUTE_SPEC { +#[doc = "CH11OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch11outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch11outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh11outrouteSpec; +impl crate::RegisterSpec for LesenseCh11outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch11outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH11OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch11outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH11OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch11outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh11outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch11outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh11outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH11OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH11OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh11outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch12outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch12outroute.rs index 2edc25b..169bc21 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch12outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch12outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH12OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH12OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH12OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH12OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH12OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH12OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH12OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH12OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH12OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH12OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH12OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH12OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH12OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch12outroute](index.html) module"] -pub struct LESENSE_CH12OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH12OUTROUTE_SPEC { +#[doc = "CH12OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch12outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch12outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh12outrouteSpec; +impl crate::RegisterSpec for LesenseCh12outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch12outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH12OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch12outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH12OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch12outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh12outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch12outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh12outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH12OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH12OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh12outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch13outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch13outroute.rs index 6dc82d1..1ff569e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch13outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch13outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH13OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH13OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH13OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH13OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH13OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH13OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH13OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH13OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH13OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH13OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH13OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH13OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH13OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch13outroute](index.html) module"] -pub struct LESENSE_CH13OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH13OUTROUTE_SPEC { +#[doc = "CH13OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch13outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch13outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh13outrouteSpec; +impl crate::RegisterSpec for LesenseCh13outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch13outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH13OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch13outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH13OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch13outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh13outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch13outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh13outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH13OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH13OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh13outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch14outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch14outroute.rs index 2e5c429..aeea6b3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch14outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch14outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH14OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH14OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH14OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH14OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH14OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH14OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH14OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH14OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH14OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH14OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH14OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH14OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH14OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch14outroute](index.html) module"] -pub struct LESENSE_CH14OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH14OUTROUTE_SPEC { +#[doc = "CH14OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch14outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch14outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh14outrouteSpec; +impl crate::RegisterSpec for LesenseCh14outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch14outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH14OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch14outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH14OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch14outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh14outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch14outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh14outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH14OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH14OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh14outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch15outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch15outroute.rs index 56db41c..b9cd617 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch15outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch15outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH15OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH15OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH15OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH15OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH15OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH15OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH15OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH15OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH15OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH15OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH15OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH15OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH15OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch15outroute](index.html) module"] -pub struct LESENSE_CH15OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH15OUTROUTE_SPEC { +#[doc = "CH15OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch15outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch15outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh15outrouteSpec; +impl crate::RegisterSpec for LesenseCh15outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch15outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH15OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch15outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH15OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch15outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh15outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch15outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh15outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH15OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH15OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh15outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch1outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch1outroute.rs index 2a5a0fc..da13e0c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch1outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch1outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH1OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH1OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH1OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH1OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH1OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH1OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH1OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH1OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH1OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH1OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH1OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH1OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH1OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch1outroute](index.html) module"] -pub struct LESENSE_CH1OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH1OUTROUTE_SPEC { +#[doc = "CH1OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch1outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch1outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh1outrouteSpec; +impl crate::RegisterSpec for LesenseCh1outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch1outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH1OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch1outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH1OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch1outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh1outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch1outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh1outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH1OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH1OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh1outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch2outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch2outroute.rs index 5a24a1d..d4fa85a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch2outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch2outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH2OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH2OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH2OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH2OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH2OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH2OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH2OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH2OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH2OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH2OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH2OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH2OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH2OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch2outroute](index.html) module"] -pub struct LESENSE_CH2OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH2OUTROUTE_SPEC { +#[doc = "CH2OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch2outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch2outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh2outrouteSpec; +impl crate::RegisterSpec for LesenseCh2outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch2outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH2OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch2outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH2OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch2outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh2outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch2outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh2outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH2OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH2OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh2outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch3outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch3outroute.rs index fe8d7cc..5baabe2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch3outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch3outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH3OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH3OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH3OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH3OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH3OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH3OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH3OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH3OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH3OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH3OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH3OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH3OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH3OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch3outroute](index.html) module"] -pub struct LESENSE_CH3OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH3OUTROUTE_SPEC { +#[doc = "CH3OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch3outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch3outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh3outrouteSpec; +impl crate::RegisterSpec for LesenseCh3outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch3outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH3OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch3outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH3OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch3outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh3outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch3outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh3outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH3OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH3OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh3outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch4outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch4outroute.rs index 2bec8b7..8bf138e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch4outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch4outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH4OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH4OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH4OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH4OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH4OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH4OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH4OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH4OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH4OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH4OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH4OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH4OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH4OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch4outroute](index.html) module"] -pub struct LESENSE_CH4OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH4OUTROUTE_SPEC { +#[doc = "CH4OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch4outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch4outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh4outrouteSpec; +impl crate::RegisterSpec for LesenseCh4outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch4outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH4OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch4outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH4OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch4outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh4outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch4outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh4outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH4OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH4OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh4outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch5outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch5outroute.rs index ea26d0c..184a327 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch5outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch5outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH5OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH5OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH5OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH5OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH5OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH5OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH5OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH5OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH5OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH5OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH5OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH5OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH5OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch5outroute](index.html) module"] -pub struct LESENSE_CH5OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH5OUTROUTE_SPEC { +#[doc = "CH5OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch5outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch5outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh5outrouteSpec; +impl crate::RegisterSpec for LesenseCh5outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch5outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH5OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch5outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH5OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch5outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh5outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch5outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh5outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH5OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH5OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh5outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch6outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch6outroute.rs index 7c49c5b..ac18258 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch6outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch6outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH6OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH6OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH6OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH6OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH6OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH6OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH6OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH6OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH6OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH6OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH6OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH6OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH6OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch6outroute](index.html) module"] -pub struct LESENSE_CH6OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH6OUTROUTE_SPEC { +#[doc = "CH6OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch6outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch6outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh6outrouteSpec; +impl crate::RegisterSpec for LesenseCh6outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch6outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH6OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch6outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH6OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch6outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh6outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch6outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh6outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH6OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH6OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh6outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch7outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch7outroute.rs index e6688af..98b5ab8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch7outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch7outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH7OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH7OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH7OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH7OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH7OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH7OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH7OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH7OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH7OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH7OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH7OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH7OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH7OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch7outroute](index.html) module"] -pub struct LESENSE_CH7OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH7OUTROUTE_SPEC { +#[doc = "CH7OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch7outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch7outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh7outrouteSpec; +impl crate::RegisterSpec for LesenseCh7outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch7outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH7OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch7outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH7OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch7outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh7outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch7outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh7outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH7OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH7OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh7outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch8outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch8outroute.rs index 6b161b3..b33d96c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch8outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch8outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH8OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH8OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH8OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH8OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH8OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH8OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH8OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH8OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH8OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH8OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH8OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH8OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH8OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch8outroute](index.html) module"] -pub struct LESENSE_CH8OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH8OUTROUTE_SPEC { +#[doc = "CH8OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch8outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch8outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh8outrouteSpec; +impl crate::RegisterSpec for LesenseCh8outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch8outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH8OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch8outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH8OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch8outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh8outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch8outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh8outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH8OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH8OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh8outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch9outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch9outroute.rs index b0c7cda..89d496a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch9outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_ch9outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH9OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH9OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH9OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH9OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH9OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH9OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH9OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH9OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH9OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH9OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH9OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH9OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH9OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch9outroute](index.html) module"] -pub struct LESENSE_CH9OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH9OUTROUTE_SPEC { +#[doc = "CH9OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch9outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch9outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh9outrouteSpec; +impl crate::RegisterSpec for LesenseCh9outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch9outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH9OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch9outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH9OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch9outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh9outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch9outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh9outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH9OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH9OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh9outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_routeen.rs index ee06388..8477da8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lesense_routeen.rs @@ -1,305 +1,265 @@ #[doc = "Register `LESENSE_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CH0OUTPEN` reader - CH0OUT pin enable control bit"] -pub type CH0OUTPEN_R = crate::BitReader; +pub type Ch0outpenR = crate::BitReader; #[doc = "Field `CH0OUTPEN` writer - CH0OUT pin enable control bit"] -pub type CH0OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch0outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1OUTPEN` reader - CH1OUT pin enable control bit"] -pub type CH1OUTPEN_R = crate::BitReader; +pub type Ch1outpenR = crate::BitReader; #[doc = "Field `CH1OUTPEN` writer - CH1OUT pin enable control bit"] -pub type CH1OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch1outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2OUTPEN` reader - CH2OUT pin enable control bit"] -pub type CH2OUTPEN_R = crate::BitReader; +pub type Ch2outpenR = crate::BitReader; #[doc = "Field `CH2OUTPEN` writer - CH2OUT pin enable control bit"] -pub type CH2OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch2outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3OUTPEN` reader - CH3OUT pin enable control bit"] -pub type CH3OUTPEN_R = crate::BitReader; +pub type Ch3outpenR = crate::BitReader; #[doc = "Field `CH3OUTPEN` writer - CH3OUT pin enable control bit"] -pub type CH3OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch3outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH4OUTPEN` reader - CH4OUT pin enable control bit"] -pub type CH4OUTPEN_R = crate::BitReader; +pub type Ch4outpenR = crate::BitReader; #[doc = "Field `CH4OUTPEN` writer - CH4OUT pin enable control bit"] -pub type CH4OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch4outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH5OUTPEN` reader - CH5OUT pin enable control bit"] -pub type CH5OUTPEN_R = crate::BitReader; +pub type Ch5outpenR = crate::BitReader; #[doc = "Field `CH5OUTPEN` writer - CH5OUT pin enable control bit"] -pub type CH5OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch5outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH6OUTPEN` reader - CH6OUT pin enable control bit"] -pub type CH6OUTPEN_R = crate::BitReader; +pub type Ch6outpenR = crate::BitReader; #[doc = "Field `CH6OUTPEN` writer - CH6OUT pin enable control bit"] -pub type CH6OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch6outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH7OUTPEN` reader - CH7OUT pin enable control bit"] -pub type CH7OUTPEN_R = crate::BitReader; +pub type Ch7outpenR = crate::BitReader; #[doc = "Field `CH7OUTPEN` writer - CH7OUT pin enable control bit"] -pub type CH7OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch7outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH8OUTPEN` reader - CH8OUT pin enable control bit"] -pub type CH8OUTPEN_R = crate::BitReader; +pub type Ch8outpenR = crate::BitReader; #[doc = "Field `CH8OUTPEN` writer - CH8OUT pin enable control bit"] -pub type CH8OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch8outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH9OUTPEN` reader - CH9OUT pin enable control bit"] -pub type CH9OUTPEN_R = crate::BitReader; +pub type Ch9outpenR = crate::BitReader; #[doc = "Field `CH9OUTPEN` writer - CH9OUT pin enable control bit"] -pub type CH9OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch9outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH10OUTPEN` reader - CH10OUT pin enable control bit"] -pub type CH10OUTPEN_R = crate::BitReader; +pub type Ch10outpenR = crate::BitReader; #[doc = "Field `CH10OUTPEN` writer - CH10OUT pin enable control bit"] -pub type CH10OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch10outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH11OUTPEN` reader - CH11OUT pin enable control bit"] -pub type CH11OUTPEN_R = crate::BitReader; +pub type Ch11outpenR = crate::BitReader; #[doc = "Field `CH11OUTPEN` writer - CH11OUT pin enable control bit"] -pub type CH11OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch11outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH12OUTPEN` reader - CH12OUT pin enable control bit"] -pub type CH12OUTPEN_R = crate::BitReader; +pub type Ch12outpenR = crate::BitReader; #[doc = "Field `CH12OUTPEN` writer - CH12OUT pin enable control bit"] -pub type CH12OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch12outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH13OUTPEN` reader - CH13OUT pin enable control bit"] -pub type CH13OUTPEN_R = crate::BitReader; +pub type Ch13outpenR = crate::BitReader; #[doc = "Field `CH13OUTPEN` writer - CH13OUT pin enable control bit"] -pub type CH13OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch13outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH14OUTPEN` reader - CH14OUT pin enable control bit"] -pub type CH14OUTPEN_R = crate::BitReader; +pub type Ch14outpenR = crate::BitReader; #[doc = "Field `CH14OUTPEN` writer - CH14OUT pin enable control bit"] -pub type CH14OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch14outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH15OUTPEN` reader - CH15OUT pin enable control bit"] -pub type CH15OUTPEN_R = crate::BitReader; +pub type Ch15outpenR = crate::BitReader; #[doc = "Field `CH15OUTPEN` writer - CH15OUT pin enable control bit"] -pub type CH15OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch15outpenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CH0OUT pin enable control bit"] #[inline(always)] - pub fn ch0outpen(&self) -> CH0OUTPEN_R { - CH0OUTPEN_R::new((self.bits & 1) != 0) + pub fn ch0outpen(&self) -> Ch0outpenR { + Ch0outpenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CH1OUT pin enable control bit"] #[inline(always)] - pub fn ch1outpen(&self) -> CH1OUTPEN_R { - CH1OUTPEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1outpen(&self) -> Ch1outpenR { + Ch1outpenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CH2OUT pin enable control bit"] #[inline(always)] - pub fn ch2outpen(&self) -> CH2OUTPEN_R { - CH2OUTPEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2outpen(&self) -> Ch2outpenR { + Ch2outpenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - CH3OUT pin enable control bit"] #[inline(always)] - pub fn ch3outpen(&self) -> CH3OUTPEN_R { - CH3OUTPEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3outpen(&self) -> Ch3outpenR { + Ch3outpenR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - CH4OUT pin enable control bit"] #[inline(always)] - pub fn ch4outpen(&self) -> CH4OUTPEN_R { - CH4OUTPEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4outpen(&self) -> Ch4outpenR { + Ch4outpenR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CH5OUT pin enable control bit"] #[inline(always)] - pub fn ch5outpen(&self) -> CH5OUTPEN_R { - CH5OUTPEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5outpen(&self) -> Ch5outpenR { + Ch5outpenR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - CH6OUT pin enable control bit"] #[inline(always)] - pub fn ch6outpen(&self) -> CH6OUTPEN_R { - CH6OUTPEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6outpen(&self) -> Ch6outpenR { + Ch6outpenR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - CH7OUT pin enable control bit"] #[inline(always)] - pub fn ch7outpen(&self) -> CH7OUTPEN_R { - CH7OUTPEN_R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7outpen(&self) -> Ch7outpenR { + Ch7outpenR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - CH8OUT pin enable control bit"] #[inline(always)] - pub fn ch8outpen(&self) -> CH8OUTPEN_R { - CH8OUTPEN_R::new(((self.bits >> 8) & 1) != 0) + pub fn ch8outpen(&self) -> Ch8outpenR { + Ch8outpenR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - CH9OUT pin enable control bit"] #[inline(always)] - pub fn ch9outpen(&self) -> CH9OUTPEN_R { - CH9OUTPEN_R::new(((self.bits >> 9) & 1) != 0) + pub fn ch9outpen(&self) -> Ch9outpenR { + Ch9outpenR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - CH10OUT pin enable control bit"] #[inline(always)] - pub fn ch10outpen(&self) -> CH10OUTPEN_R { - CH10OUTPEN_R::new(((self.bits >> 10) & 1) != 0) + pub fn ch10outpen(&self) -> Ch10outpenR { + Ch10outpenR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - CH11OUT pin enable control bit"] #[inline(always)] - pub fn ch11outpen(&self) -> CH11OUTPEN_R { - CH11OUTPEN_R::new(((self.bits >> 11) & 1) != 0) + pub fn ch11outpen(&self) -> Ch11outpenR { + Ch11outpenR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - CH12OUT pin enable control bit"] #[inline(always)] - pub fn ch12outpen(&self) -> CH12OUTPEN_R { - CH12OUTPEN_R::new(((self.bits >> 12) & 1) != 0) + pub fn ch12outpen(&self) -> Ch12outpenR { + Ch12outpenR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - CH13OUT pin enable control bit"] #[inline(always)] - pub fn ch13outpen(&self) -> CH13OUTPEN_R { - CH13OUTPEN_R::new(((self.bits >> 13) & 1) != 0) + pub fn ch13outpen(&self) -> Ch13outpenR { + Ch13outpenR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - CH14OUT pin enable control bit"] #[inline(always)] - pub fn ch14outpen(&self) -> CH14OUTPEN_R { - CH14OUTPEN_R::new(((self.bits >> 14) & 1) != 0) + pub fn ch14outpen(&self) -> Ch14outpenR { + Ch14outpenR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - CH15OUT pin enable control bit"] #[inline(always)] - pub fn ch15outpen(&self) -> CH15OUTPEN_R { - CH15OUTPEN_R::new(((self.bits >> 15) & 1) != 0) + pub fn ch15outpen(&self) -> Ch15outpenR { + Ch15outpenR::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - CH0OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch0outpen(&mut self) -> CH0OUTPEN_W<0> { - CH0OUTPEN_W::new(self) + pub fn ch0outpen(&mut self) -> Ch0outpenW { + Ch0outpenW::new(self, 0) } #[doc = "Bit 1 - CH1OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch1outpen(&mut self) -> CH1OUTPEN_W<1> { - CH1OUTPEN_W::new(self) + pub fn ch1outpen(&mut self) -> Ch1outpenW { + Ch1outpenW::new(self, 1) } #[doc = "Bit 2 - CH2OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch2outpen(&mut self) -> CH2OUTPEN_W<2> { - CH2OUTPEN_W::new(self) + pub fn ch2outpen(&mut self) -> Ch2outpenW { + Ch2outpenW::new(self, 2) } #[doc = "Bit 3 - CH3OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch3outpen(&mut self) -> CH3OUTPEN_W<3> { - CH3OUTPEN_W::new(self) + pub fn ch3outpen(&mut self) -> Ch3outpenW { + Ch3outpenW::new(self, 3) } #[doc = "Bit 4 - CH4OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch4outpen(&mut self) -> CH4OUTPEN_W<4> { - CH4OUTPEN_W::new(self) + pub fn ch4outpen(&mut self) -> Ch4outpenW { + Ch4outpenW::new(self, 4) } #[doc = "Bit 5 - CH5OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch5outpen(&mut self) -> CH5OUTPEN_W<5> { - CH5OUTPEN_W::new(self) + pub fn ch5outpen(&mut self) -> Ch5outpenW { + Ch5outpenW::new(self, 5) } #[doc = "Bit 6 - CH6OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch6outpen(&mut self) -> CH6OUTPEN_W<6> { - CH6OUTPEN_W::new(self) + pub fn ch6outpen(&mut self) -> Ch6outpenW { + Ch6outpenW::new(self, 6) } #[doc = "Bit 7 - CH7OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch7outpen(&mut self) -> CH7OUTPEN_W<7> { - CH7OUTPEN_W::new(self) + pub fn ch7outpen(&mut self) -> Ch7outpenW { + Ch7outpenW::new(self, 7) } #[doc = "Bit 8 - CH8OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch8outpen(&mut self) -> CH8OUTPEN_W<8> { - CH8OUTPEN_W::new(self) + pub fn ch8outpen(&mut self) -> Ch8outpenW { + Ch8outpenW::new(self, 8) } #[doc = "Bit 9 - CH9OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch9outpen(&mut self) -> CH9OUTPEN_W<9> { - CH9OUTPEN_W::new(self) + pub fn ch9outpen(&mut self) -> Ch9outpenW { + Ch9outpenW::new(self, 9) } #[doc = "Bit 10 - CH10OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch10outpen(&mut self) -> CH10OUTPEN_W<10> { - CH10OUTPEN_W::new(self) + pub fn ch10outpen(&mut self) -> Ch10outpenW { + Ch10outpenW::new(self, 10) } #[doc = "Bit 11 - CH11OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch11outpen(&mut self) -> CH11OUTPEN_W<11> { - CH11OUTPEN_W::new(self) + pub fn ch11outpen(&mut self) -> Ch11outpenW { + Ch11outpenW::new(self, 11) } #[doc = "Bit 12 - CH12OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch12outpen(&mut self) -> CH12OUTPEN_W<12> { - CH12OUTPEN_W::new(self) + pub fn ch12outpen(&mut self) -> Ch12outpenW { + Ch12outpenW::new(self, 12) } #[doc = "Bit 13 - CH13OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch13outpen(&mut self) -> CH13OUTPEN_W<13> { - CH13OUTPEN_W::new(self) + pub fn ch13outpen(&mut self) -> Ch13outpenW { + Ch13outpenW::new(self, 13) } #[doc = "Bit 14 - CH14OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch14outpen(&mut self) -> CH14OUTPEN_W<14> { - CH14OUTPEN_W::new(self) + pub fn ch14outpen(&mut self) -> Ch14outpenW { + Ch14outpenW::new(self, 14) } #[doc = "Bit 15 - CH15OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch15outpen(&mut self) -> CH15OUTPEN_W<15> { - CH15OUTPEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ch15outpen(&mut self) -> Ch15outpenW { + Ch15outpenW::new(self, 15) } } -#[doc = "LESENSE pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_routeen](index.html) module"] -pub struct LESENSE_ROUTEEN_SPEC; -impl crate::RegisterSpec for LESENSE_ROUTEEN_SPEC { +#[doc = "LESENSE pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseRouteenSpec; +impl crate::RegisterSpec for LesenseRouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_routeen::R](R) reader structure"] -impl crate::Readable for LESENSE_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_routeen::W](W) writer structure"] -impl crate::Writable for LESENSE_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_routeen::R`](R) reader structure"] +impl crate::Readable for LesenseRouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_routeen::W`](W) writer structure"] +impl crate::Writable for LesenseRouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_ROUTEEN to value 0"] -impl crate::Resettable for LESENSE_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseRouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/letimer_out0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/letimer_out0route.rs index 3ddaf7d..60e7348 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/letimer_out0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/letimer_out0route.rs @@ -1,96 +1,55 @@ #[doc = "Register `LETIMER_OUT0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LETIMER_OUT0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - OUT0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - OUT0 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LETIMER_OUT0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - OUT0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - OUT0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, LETIMER_OUT0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - OUT0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - OUT0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - OUT0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - OUT0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "OUT0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [letimer_out0route](index.html) module"] -pub struct LETIMER_OUT0ROUTE_SPEC; -impl crate::RegisterSpec for LETIMER_OUT0ROUTE_SPEC { +#[doc = "OUT0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`letimer_out0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`letimer_out0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LetimerOut0routeSpec; +impl crate::RegisterSpec for LetimerOut0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [letimer_out0route::R](R) reader structure"] -impl crate::Readable for LETIMER_OUT0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [letimer_out0route::W](W) writer structure"] -impl crate::Writable for LETIMER_OUT0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`letimer_out0route::R`](R) reader structure"] +impl crate::Readable for LetimerOut0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`letimer_out0route::W`](W) writer structure"] +impl crate::Writable for LetimerOut0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LETIMER_OUT0ROUTE to value 0"] -impl crate::Resettable for LETIMER_OUT0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LetimerOut0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/letimer_out1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/letimer_out1route.rs index b9f7a76..c2b37dd 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/letimer_out1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/letimer_out1route.rs @@ -1,96 +1,55 @@ #[doc = "Register `LETIMER_OUT1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LETIMER_OUT1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - OUT1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - OUT1 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LETIMER_OUT1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - OUT1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - OUT1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, LETIMER_OUT1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - OUT1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - OUT1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - OUT1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - OUT1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "OUT1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [letimer_out1route](index.html) module"] -pub struct LETIMER_OUT1ROUTE_SPEC; -impl crate::RegisterSpec for LETIMER_OUT1ROUTE_SPEC { +#[doc = "OUT1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`letimer_out1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`letimer_out1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LetimerOut1routeSpec; +impl crate::RegisterSpec for LetimerOut1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [letimer_out1route::R](R) reader structure"] -impl crate::Readable for LETIMER_OUT1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [letimer_out1route::W](W) writer structure"] -impl crate::Writable for LETIMER_OUT1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`letimer_out1route::R`](R) reader structure"] +impl crate::Readable for LetimerOut1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`letimer_out1route::W`](W) writer structure"] +impl crate::Writable for LetimerOut1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LETIMER_OUT1ROUTE to value 0"] -impl crate::Resettable for LETIMER_OUT1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LetimerOut1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/letimer_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/letimer_routeen.rs index f5544d7..55adea8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/letimer_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/letimer_routeen.rs @@ -1,95 +1,55 @@ #[doc = "Register `LETIMER_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LETIMER_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUT0PEN` reader - OUT0 pin enable control bit"] -pub type OUT0PEN_R = crate::BitReader; +pub type Out0penR = crate::BitReader; #[doc = "Field `OUT0PEN` writer - OUT0 pin enable control bit"] -pub type OUT0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LETIMER_ROUTEEN_SPEC, bool, O>; +pub type Out0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OUT1PEN` reader - OUT1 pin enable control bit"] -pub type OUT1PEN_R = crate::BitReader; +pub type Out1penR = crate::BitReader; #[doc = "Field `OUT1PEN` writer - OUT1 pin enable control bit"] -pub type OUT1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LETIMER_ROUTEEN_SPEC, bool, O>; +pub type Out1penW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - OUT0 pin enable control bit"] #[inline(always)] - pub fn out0pen(&self) -> OUT0PEN_R { - OUT0PEN_R::new((self.bits & 1) != 0) + pub fn out0pen(&self) -> Out0penR { + Out0penR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - OUT1 pin enable control bit"] #[inline(always)] - pub fn out1pen(&self) -> OUT1PEN_R { - OUT1PEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn out1pen(&self) -> Out1penR { + Out1penR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - OUT0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn out0pen(&mut self) -> OUT0PEN_W<0> { - OUT0PEN_W::new(self) + pub fn out0pen(&mut self) -> Out0penW { + Out0penW::new(self, 0) } #[doc = "Bit 1 - OUT1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn out1pen(&mut self) -> OUT1PEN_W<1> { - OUT1PEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn out1pen(&mut self) -> Out1penW { + Out1penW::new(self, 1) } } -#[doc = "LETIMER pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [letimer_routeen](index.html) module"] -pub struct LETIMER_ROUTEEN_SPEC; -impl crate::RegisterSpec for LETIMER_ROUTEEN_SPEC { +#[doc = "LETIMER pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`letimer_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`letimer_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LetimerRouteenSpec; +impl crate::RegisterSpec for LetimerRouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [letimer_routeen::R](R) reader structure"] -impl crate::Readable for LETIMER_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [letimer_routeen::W](W) writer structure"] -impl crate::Writable for LETIMER_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`letimer_routeen::R`](R) reader structure"] +impl crate::Readable for LetimerRouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`letimer_routeen::W`](W) writer structure"] +impl crate::Writable for LetimerRouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LETIMER_ROUTEEN to value 0"] -impl crate::Resettable for LETIMER_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LetimerRouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lock.rs index 0de0a0f..970a6e5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Configuration Lock Key\n\nValue on reset: 42292"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "42292: Unlock code"] - UNLOCK = 42292, + Unlock = 42292, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Configuration Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Unlock code"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Configuration Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0xa534"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0xa534; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0xa534; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/pcnt0_s0inroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/pcnt0_s0inroute.rs index 30c90e1..7a9ced3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/pcnt0_s0inroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/pcnt0_s0inroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `PCNT0_S0INROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PCNT0_S0INROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - S0IN port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - S0IN port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PCNT0_S0INROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - S0IN pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - S0IN pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PCNT0_S0INROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - S0IN port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - S0IN pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - S0IN port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - S0IN pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "S0IN port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pcnt0_s0inroute](index.html) module"] -pub struct PCNT0_S0INROUTE_SPEC; -impl crate::RegisterSpec for PCNT0_S0INROUTE_SPEC { +#[doc = "S0IN port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`pcnt0_s0inroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcnt0_s0inroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Pcnt0S0inrouteSpec; +impl crate::RegisterSpec for Pcnt0S0inrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [pcnt0_s0inroute::R](R) reader structure"] -impl crate::Readable for PCNT0_S0INROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [pcnt0_s0inroute::W](W) writer structure"] -impl crate::Writable for PCNT0_S0INROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`pcnt0_s0inroute::R`](R) reader structure"] +impl crate::Readable for Pcnt0S0inrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`pcnt0_s0inroute::W`](W) writer structure"] +impl crate::Writable for Pcnt0S0inrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PCNT0_S0INROUTE to value 0"] -impl crate::Resettable for PCNT0_S0INROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Pcnt0S0inrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/pcnt0_s1inroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/pcnt0_s1inroute.rs index 282aae7..5e08d70 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/pcnt0_s1inroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/pcnt0_s1inroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `PCNT0_S1INROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PCNT0_S1INROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - S1IN port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - S1IN port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PCNT0_S1INROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - S1IN pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - S1IN pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PCNT0_S1INROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - S1IN port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - S1IN pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - S1IN port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - S1IN pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "S1IN port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pcnt0_s1inroute](index.html) module"] -pub struct PCNT0_S1INROUTE_SPEC; -impl crate::RegisterSpec for PCNT0_S1INROUTE_SPEC { +#[doc = "S1IN port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`pcnt0_s1inroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcnt0_s1inroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Pcnt0S1inrouteSpec; +impl crate::RegisterSpec for Pcnt0S1inrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [pcnt0_s1inroute::R](R) reader structure"] -impl crate::Readable for PCNT0_S1INROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [pcnt0_s1inroute::W](W) writer structure"] -impl crate::Writable for PCNT0_S1INROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`pcnt0_s1inroute::R`](R) reader structure"] +impl crate::Readable for Pcnt0S1inrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`pcnt0_s1inroute::W`](W) writer structure"] +impl crate::Writable for Pcnt0S1inrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PCNT0_S1INROUTE to value 0"] -impl crate::Resettable for PCNT0_S1INROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Pcnt0S1inrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/porta_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/porta_ctrl.rs index 4c02bc9..b2d7dd2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/porta_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/porta_ctrl.rs @@ -1,126 +1,85 @@ #[doc = "Register `PORTA_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTA_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SLEWRATE` reader - Slew Rate"] -pub type SLEWRATE_R = crate::FieldReader; +pub type SlewrateR = crate::FieldReader; #[doc = "Field `SLEWRATE` writer - Slew Rate"] -pub type SLEWRATE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PORTA_CTRL_SPEC, u8, u8, 3, O>; +pub type SlewrateW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `DINDIS` reader - Data In Disable"] -pub type DINDIS_R = crate::BitReader; +pub type DindisR = crate::BitReader; #[doc = "Field `DINDIS` writer - Data In Disable"] -pub type DINDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PORTA_CTRL_SPEC, bool, O>; +pub type DindisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SLEWRATEALT` reader - Slew Rate Alt"] -pub type SLEWRATEALT_R = crate::FieldReader; +pub type SlewratealtR = crate::FieldReader; #[doc = "Field `SLEWRATEALT` writer - Slew Rate Alt"] -pub type SLEWRATEALT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PORTA_CTRL_SPEC, u8, u8, 3, O>; +pub type SlewratealtW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `DINDISALT` reader - Data In Disable Alt"] -pub type DINDISALT_R = crate::BitReader; +pub type DindisaltR = crate::BitReader; #[doc = "Field `DINDISALT` writer - Data In Disable Alt"] -pub type DINDISALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, PORTA_CTRL_SPEC, bool, O>; +pub type DindisaltW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 4:6 - Slew Rate"] #[inline(always)] - pub fn slewrate(&self) -> SLEWRATE_R { - SLEWRATE_R::new(((self.bits >> 4) & 7) as u8) + pub fn slewrate(&self) -> SlewrateR { + SlewrateR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bit 12 - Data In Disable"] #[inline(always)] - pub fn dindis(&self) -> DINDIS_R { - DINDIS_R::new(((self.bits >> 12) & 1) != 0) + pub fn dindis(&self) -> DindisR { + DindisR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bits 20:22 - Slew Rate Alt"] #[inline(always)] - pub fn slewratealt(&self) -> SLEWRATEALT_R { - SLEWRATEALT_R::new(((self.bits >> 20) & 7) as u8) + pub fn slewratealt(&self) -> SlewratealtR { + SlewratealtR::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bit 28 - Data In Disable Alt"] #[inline(always)] - pub fn dindisalt(&self) -> DINDISALT_R { - DINDISALT_R::new(((self.bits >> 28) & 1) != 0) + pub fn dindisalt(&self) -> DindisaltR { + DindisaltR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bits 4:6 - Slew Rate"] #[inline(always)] #[must_use] - pub fn slewrate(&mut self) -> SLEWRATE_W<4> { - SLEWRATE_W::new(self) + pub fn slewrate(&mut self) -> SlewrateW { + SlewrateW::new(self, 4) } #[doc = "Bit 12 - Data In Disable"] #[inline(always)] #[must_use] - pub fn dindis(&mut self) -> DINDIS_W<12> { - DINDIS_W::new(self) + pub fn dindis(&mut self) -> DindisW { + DindisW::new(self, 12) } #[doc = "Bits 20:22 - Slew Rate Alt"] #[inline(always)] #[must_use] - pub fn slewratealt(&mut self) -> SLEWRATEALT_W<20> { - SLEWRATEALT_W::new(self) + pub fn slewratealt(&mut self) -> SlewratealtW { + SlewratealtW::new(self, 20) } #[doc = "Bit 28 - Data In Disable Alt"] #[inline(always)] #[must_use] - pub fn dindisalt(&mut self) -> DINDISALT_W<28> { - DINDISALT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dindisalt(&mut self) -> DindisaltW { + DindisaltW::new(self, 28) } } -#[doc = "Port control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [porta_ctrl](index.html) module"] -pub struct PORTA_CTRL_SPEC; -impl crate::RegisterSpec for PORTA_CTRL_SPEC { +#[doc = "Port control\n\nYou can [`read`](crate::Reg::read) this register and get [`porta_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`porta_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortaCtrlSpec; +impl crate::RegisterSpec for PortaCtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [porta_ctrl::R](R) reader structure"] -impl crate::Readable for PORTA_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [porta_ctrl::W](W) writer structure"] -impl crate::Writable for PORTA_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`porta_ctrl::R`](R) reader structure"] +impl crate::Readable for PortaCtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`porta_ctrl::W`](W) writer structure"] +impl crate::Writable for PortaCtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTA_CTRL to value 0x0040_0040"] -impl crate::Resettable for PORTA_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0040_0040; +impl crate::Resettable for PortaCtrlSpec { + const RESET_VALUE: u32 = 0x0040_0040; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/porta_din.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/porta_din.rs index 72c2c3e..c7fee01 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/porta_din.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/porta_din.rs @@ -1,37 +1,22 @@ #[doc = "Register `PORTA_DIN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DIN` reader - Data input"] -pub type DIN_R = crate::FieldReader; +pub type DinR = crate::FieldReader; impl R { #[doc = "Bits 0:10 - Data input"] #[inline(always)] - pub fn din(&self) -> DIN_R { - DIN_R::new((self.bits & 0x07ff) as u16) + pub fn din(&self) -> DinR { + DinR::new((self.bits & 0x07ff) as u16) } } -#[doc = "data in\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [porta_din](index.html) module"] -pub struct PORTA_DIN_SPEC; -impl crate::RegisterSpec for PORTA_DIN_SPEC { +#[doc = "data in\n\nYou can [`read`](crate::Reg::read) this register and get [`porta_din::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortaDinSpec; +impl crate::RegisterSpec for PortaDinSpec { type Ux = u32; } -#[doc = "`read()` method returns [porta_din::R](R) reader structure"] -impl crate::Readable for PORTA_DIN_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`porta_din::R`](R) reader structure"] +impl crate::Readable for PortaDinSpec {} #[doc = "`reset()` method sets PORTA_DIN to value 0"] -impl crate::Resettable for PORTA_DIN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortaDinSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/porta_dout.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/porta_dout.rs index 5f3785d..0ab09c9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/porta_dout.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/porta_dout.rs @@ -1,80 +1,40 @@ #[doc = "Register `PORTA_DOUT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTA_DOUT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DOUT` reader - Data output"] -pub type DOUT_R = crate::FieldReader; +pub type DoutR = crate::FieldReader; #[doc = "Field `DOUT` writer - Data output"] -pub type DOUT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PORTA_DOUT_SPEC, u16, u16, 11, O>; +pub type DoutW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; impl R { #[doc = "Bits 0:10 - Data output"] #[inline(always)] - pub fn dout(&self) -> DOUT_R { - DOUT_R::new((self.bits & 0x07ff) as u16) + pub fn dout(&self) -> DoutR { + DoutR::new((self.bits & 0x07ff) as u16) } } impl W { #[doc = "Bits 0:10 - Data output"] #[inline(always)] #[must_use] - pub fn dout(&mut self) -> DOUT_W<0> { - DOUT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dout(&mut self) -> DoutW { + DoutW::new(self, 0) } } -#[doc = "data out\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [porta_dout](index.html) module"] -pub struct PORTA_DOUT_SPEC; -impl crate::RegisterSpec for PORTA_DOUT_SPEC { +#[doc = "data out\n\nYou can [`read`](crate::Reg::read) this register and get [`porta_dout::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`porta_dout::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortaDoutSpec; +impl crate::RegisterSpec for PortaDoutSpec { type Ux = u32; } -#[doc = "`read()` method returns [porta_dout::R](R) reader structure"] -impl crate::Readable for PORTA_DOUT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [porta_dout::W](W) writer structure"] -impl crate::Writable for PORTA_DOUT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`porta_dout::R`](R) reader structure"] +impl crate::Readable for PortaDoutSpec {} +#[doc = "`write(|w| ..)` method takes [`porta_dout::W`](W) writer structure"] +impl crate::Writable for PortaDoutSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTA_DOUT to value 0"] -impl crate::Resettable for PORTA_DOUT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortaDoutSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/porta_modeh.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/porta_modeh.rs index b62971a..08b28a4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/porta_modeh.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/porta_modeh.rs @@ -1,803 +1,784 @@ #[doc = "Register `PORTA_MODEH` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTA_MODEH` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE0` reader - MODE n"] -pub type MODE0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE0_A { +pub enum Mode0 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE0_A) -> Self { + fn from(variant: Mode0) -> Self { variant as _ } } -impl MODE0_R { +impl crate::FieldSpec for Mode0 { + type Ux = u8; +} +impl crate::IsEnum for Mode0 {} +#[doc = "Field `MODE0` reader - MODE n"] +pub type Mode0R = crate::FieldReader; +impl Mode0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE0_A { + pub const fn variant(&self) -> Mode0 { match self.bits { - 0 => MODE0_A::DISABLED, - 1 => MODE0_A::INPUT, - 2 => MODE0_A::INPUTPULL, - 3 => MODE0_A::INPUTPULLFILTER, - 4 => MODE0_A::PUSHPULL, - 5 => MODE0_A::PUSHPULLALT, - 6 => MODE0_A::WIREDOR, - 7 => MODE0_A::WIREDORPULLDOWN, - 8 => MODE0_A::WIREDAND, - 9 => MODE0_A::WIREDANDFILTER, - 10 => MODE0_A::WIREDANDPULLUP, - 11 => MODE0_A::WIREDANDPULLUPFILTER, - 12 => MODE0_A::WIREDANDALT, - 13 => MODE0_A::WIREDANDALTFILTER, - 14 => MODE0_A::WIREDANDALTPULLUP, - 15 => MODE0_A::WIREDANDALTPULLUPFILTER, + 0 => Mode0::Disabled, + 1 => Mode0::Input, + 2 => Mode0::Inputpull, + 3 => Mode0::Inputpullfilter, + 4 => Mode0::Pushpull, + 5 => Mode0::Pushpullalt, + 6 => Mode0::Wiredor, + 7 => Mode0::Wiredorpulldown, + 8 => Mode0::Wiredand, + 9 => Mode0::Wiredandfilter, + 10 => Mode0::Wiredandpullup, + 11 => Mode0::Wiredandpullupfilter, + 12 => Mode0::Wiredandalt, + 13 => Mode0::Wiredandaltfilter, + 14 => Mode0::Wiredandaltpullup, + 15 => Mode0::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE0_A::DISABLED + *self == Mode0::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE0_A::INPUT + *self == Mode0::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE0_A::INPUTPULL + *self == Mode0::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE0_A::INPUTPULLFILTER + *self == Mode0::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE0_A::PUSHPULL + *self == Mode0::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE0_A::PUSHPULLALT + *self == Mode0::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE0_A::WIREDOR + *self == Mode0::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE0_A::WIREDORPULLDOWN + *self == Mode0::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE0_A::WIREDAND + *self == Mode0::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE0_A::WIREDANDFILTER + *self == Mode0::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE0_A::WIREDANDPULLUP + *self == Mode0::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE0_A::WIREDANDPULLUPFILTER + *self == Mode0::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE0_A::WIREDANDALT + *self == Mode0::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE0_A::WIREDANDALTFILTER + *self == Mode0::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE0_A::WIREDANDALTPULLUP + *self == Mode0::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE0_A::WIREDANDALTPULLUPFILTER + *self == Mode0::Wiredandaltpullupfilter } } #[doc = "Field `MODE0` writer - MODE n"] -pub type MODE0_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTA_MODEH_SPEC, u8, MODE0_A, 4, O>; -impl<'a, const O: u8> MODE0_W<'a, O> { +pub type Mode0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode0, crate::Safe>; +impl<'a, REG> Mode0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE0_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode0::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE0_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode0::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE0_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode0::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE0_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE0_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode0::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE0_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode0::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE0_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE0_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE0_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE1` reader - MODE n"] -pub type MODE1_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE1_A { +pub enum Mode1 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE1_A) -> Self { + fn from(variant: Mode1) -> Self { variant as _ } } -impl MODE1_R { +impl crate::FieldSpec for Mode1 { + type Ux = u8; +} +impl crate::IsEnum for Mode1 {} +#[doc = "Field `MODE1` reader - MODE n"] +pub type Mode1R = crate::FieldReader; +impl Mode1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE1_A { + pub const fn variant(&self) -> Mode1 { match self.bits { - 0 => MODE1_A::DISABLED, - 1 => MODE1_A::INPUT, - 2 => MODE1_A::INPUTPULL, - 3 => MODE1_A::INPUTPULLFILTER, - 4 => MODE1_A::PUSHPULL, - 5 => MODE1_A::PUSHPULLALT, - 6 => MODE1_A::WIREDOR, - 7 => MODE1_A::WIREDORPULLDOWN, - 8 => MODE1_A::WIREDAND, - 9 => MODE1_A::WIREDANDFILTER, - 10 => MODE1_A::WIREDANDPULLUP, - 11 => MODE1_A::WIREDANDPULLUPFILTER, - 12 => MODE1_A::WIREDANDALT, - 13 => MODE1_A::WIREDANDALTFILTER, - 14 => MODE1_A::WIREDANDALTPULLUP, - 15 => MODE1_A::WIREDANDALTPULLUPFILTER, + 0 => Mode1::Disabled, + 1 => Mode1::Input, + 2 => Mode1::Inputpull, + 3 => Mode1::Inputpullfilter, + 4 => Mode1::Pushpull, + 5 => Mode1::Pushpullalt, + 6 => Mode1::Wiredor, + 7 => Mode1::Wiredorpulldown, + 8 => Mode1::Wiredand, + 9 => Mode1::Wiredandfilter, + 10 => Mode1::Wiredandpullup, + 11 => Mode1::Wiredandpullupfilter, + 12 => Mode1::Wiredandalt, + 13 => Mode1::Wiredandaltfilter, + 14 => Mode1::Wiredandaltpullup, + 15 => Mode1::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE1_A::DISABLED + *self == Mode1::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE1_A::INPUT + *self == Mode1::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE1_A::INPUTPULL + *self == Mode1::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE1_A::INPUTPULLFILTER + *self == Mode1::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE1_A::PUSHPULL + *self == Mode1::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE1_A::PUSHPULLALT + *self == Mode1::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE1_A::WIREDOR + *self == Mode1::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE1_A::WIREDORPULLDOWN + *self == Mode1::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE1_A::WIREDAND + *self == Mode1::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE1_A::WIREDANDFILTER + *self == Mode1::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE1_A::WIREDANDPULLUP + *self == Mode1::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE1_A::WIREDANDPULLUPFILTER + *self == Mode1::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE1_A::WIREDANDALT + *self == Mode1::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE1_A::WIREDANDALTFILTER + *self == Mode1::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE1_A::WIREDANDALTPULLUP + *self == Mode1::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE1_A::WIREDANDALTPULLUPFILTER + *self == Mode1::Wiredandaltpullupfilter } } #[doc = "Field `MODE1` writer - MODE n"] -pub type MODE1_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTA_MODEH_SPEC, u8, MODE1_A, 4, O>; -impl<'a, const O: u8> MODE1_W<'a, O> { +pub type Mode1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode1, crate::Safe>; +impl<'a, REG> Mode1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE1_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode1::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE1_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode1::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE1_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode1::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE1_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE1_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode1::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE1_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode1::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE1_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE1_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE1_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE2` reader - MODE n"] -pub type MODE2_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE2_A { +pub enum Mode2 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE2_A) -> Self { + fn from(variant: Mode2) -> Self { variant as _ } } -impl MODE2_R { +impl crate::FieldSpec for Mode2 { + type Ux = u8; +} +impl crate::IsEnum for Mode2 {} +#[doc = "Field `MODE2` reader - MODE n"] +pub type Mode2R = crate::FieldReader; +impl Mode2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE2_A { + pub const fn variant(&self) -> Mode2 { match self.bits { - 0 => MODE2_A::DISABLED, - 1 => MODE2_A::INPUT, - 2 => MODE2_A::INPUTPULL, - 3 => MODE2_A::INPUTPULLFILTER, - 4 => MODE2_A::PUSHPULL, - 5 => MODE2_A::PUSHPULLALT, - 6 => MODE2_A::WIREDOR, - 7 => MODE2_A::WIREDORPULLDOWN, - 8 => MODE2_A::WIREDAND, - 9 => MODE2_A::WIREDANDFILTER, - 10 => MODE2_A::WIREDANDPULLUP, - 11 => MODE2_A::WIREDANDPULLUPFILTER, - 12 => MODE2_A::WIREDANDALT, - 13 => MODE2_A::WIREDANDALTFILTER, - 14 => MODE2_A::WIREDANDALTPULLUP, - 15 => MODE2_A::WIREDANDALTPULLUPFILTER, + 0 => Mode2::Disabled, + 1 => Mode2::Input, + 2 => Mode2::Inputpull, + 3 => Mode2::Inputpullfilter, + 4 => Mode2::Pushpull, + 5 => Mode2::Pushpullalt, + 6 => Mode2::Wiredor, + 7 => Mode2::Wiredorpulldown, + 8 => Mode2::Wiredand, + 9 => Mode2::Wiredandfilter, + 10 => Mode2::Wiredandpullup, + 11 => Mode2::Wiredandpullupfilter, + 12 => Mode2::Wiredandalt, + 13 => Mode2::Wiredandaltfilter, + 14 => Mode2::Wiredandaltpullup, + 15 => Mode2::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE2_A::DISABLED + *self == Mode2::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE2_A::INPUT + *self == Mode2::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE2_A::INPUTPULL + *self == Mode2::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE2_A::INPUTPULLFILTER + *self == Mode2::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE2_A::PUSHPULL + *self == Mode2::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE2_A::PUSHPULLALT + *self == Mode2::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE2_A::WIREDOR + *self == Mode2::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE2_A::WIREDORPULLDOWN + *self == Mode2::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE2_A::WIREDAND + *self == Mode2::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE2_A::WIREDANDFILTER + *self == Mode2::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE2_A::WIREDANDPULLUP + *self == Mode2::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE2_A::WIREDANDPULLUPFILTER + *self == Mode2::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE2_A::WIREDANDALT + *self == Mode2::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE2_A::WIREDANDALTFILTER + *self == Mode2::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE2_A::WIREDANDALTPULLUP + *self == Mode2::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE2_A::WIREDANDALTPULLUPFILTER + *self == Mode2::Wiredandaltpullupfilter } } #[doc = "Field `MODE2` writer - MODE n"] -pub type MODE2_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTA_MODEH_SPEC, u8, MODE2_A, 4, O>; -impl<'a, const O: u8> MODE2_W<'a, O> { +pub type Mode2W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode2, crate::Safe>; +impl<'a, REG> Mode2W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE2_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode2::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE2_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode2::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE2_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode2::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE2_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE2_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode2::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE2_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode2::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE2_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE2_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE2_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltpullupfilter) } } impl R { #[doc = "Bits 0:3 - MODE n"] #[inline(always)] - pub fn mode0(&self) -> MODE0_R { - MODE0_R::new((self.bits & 0x0f) as u8) + pub fn mode0(&self) -> Mode0R { + Mode0R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - MODE n"] #[inline(always)] - pub fn mode1(&self) -> MODE1_R { - MODE1_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn mode1(&self) -> Mode1R { + Mode1R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - MODE n"] #[inline(always)] - pub fn mode2(&self) -> MODE2_R { - MODE2_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn mode2(&self) -> Mode2R { + Mode2R::new(((self.bits >> 8) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - MODE n"] #[inline(always)] #[must_use] - pub fn mode0(&mut self) -> MODE0_W<0> { - MODE0_W::new(self) + pub fn mode0(&mut self) -> Mode0W { + Mode0W::new(self, 0) } #[doc = "Bits 4:7 - MODE n"] #[inline(always)] #[must_use] - pub fn mode1(&mut self) -> MODE1_W<4> { - MODE1_W::new(self) + pub fn mode1(&mut self) -> Mode1W { + Mode1W::new(self, 4) } #[doc = "Bits 8:11 - MODE n"] #[inline(always)] #[must_use] - pub fn mode2(&mut self) -> MODE2_W<8> { - MODE2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn mode2(&mut self) -> Mode2W { + Mode2W::new(self, 8) } } -#[doc = "mode high\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [porta_modeh](index.html) module"] -pub struct PORTA_MODEH_SPEC; -impl crate::RegisterSpec for PORTA_MODEH_SPEC { +#[doc = "mode high\n\nYou can [`read`](crate::Reg::read) this register and get [`porta_modeh::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`porta_modeh::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortaModehSpec; +impl crate::RegisterSpec for PortaModehSpec { type Ux = u32; } -#[doc = "`read()` method returns [porta_modeh::R](R) reader structure"] -impl crate::Readable for PORTA_MODEH_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [porta_modeh::W](W) writer structure"] -impl crate::Writable for PORTA_MODEH_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`porta_modeh::R`](R) reader structure"] +impl crate::Readable for PortaModehSpec {} +#[doc = "`write(|w| ..)` method takes [`porta_modeh::W`](W) writer structure"] +impl crate::Writable for PortaModehSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTA_MODEH to value 0"] -impl crate::Resettable for PORTA_MODEH_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortaModehSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/porta_model.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/porta_model.rs index fb4c862..3fa48ca 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/porta_model.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/porta_model.rs @@ -1,2033 +1,2049 @@ #[doc = "Register `PORTA_MODEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTA_MODEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE0` reader - MODE n"] -pub type MODE0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE0_A { +pub enum Mode0 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE0_A) -> Self { + fn from(variant: Mode0) -> Self { variant as _ } } -impl MODE0_R { +impl crate::FieldSpec for Mode0 { + type Ux = u8; +} +impl crate::IsEnum for Mode0 {} +#[doc = "Field `MODE0` reader - MODE n"] +pub type Mode0R = crate::FieldReader; +impl Mode0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE0_A { + pub const fn variant(&self) -> Mode0 { match self.bits { - 0 => MODE0_A::DISABLED, - 1 => MODE0_A::INPUT, - 2 => MODE0_A::INPUTPULL, - 3 => MODE0_A::INPUTPULLFILTER, - 4 => MODE0_A::PUSHPULL, - 5 => MODE0_A::PUSHPULLALT, - 6 => MODE0_A::WIREDOR, - 7 => MODE0_A::WIREDORPULLDOWN, - 8 => MODE0_A::WIREDAND, - 9 => MODE0_A::WIREDANDFILTER, - 10 => MODE0_A::WIREDANDPULLUP, - 11 => MODE0_A::WIREDANDPULLUPFILTER, - 12 => MODE0_A::WIREDANDALT, - 13 => MODE0_A::WIREDANDALTFILTER, - 14 => MODE0_A::WIREDANDALTPULLUP, - 15 => MODE0_A::WIREDANDALTPULLUPFILTER, + 0 => Mode0::Disabled, + 1 => Mode0::Input, + 2 => Mode0::Inputpull, + 3 => Mode0::Inputpullfilter, + 4 => Mode0::Pushpull, + 5 => Mode0::Pushpullalt, + 6 => Mode0::Wiredor, + 7 => Mode0::Wiredorpulldown, + 8 => Mode0::Wiredand, + 9 => Mode0::Wiredandfilter, + 10 => Mode0::Wiredandpullup, + 11 => Mode0::Wiredandpullupfilter, + 12 => Mode0::Wiredandalt, + 13 => Mode0::Wiredandaltfilter, + 14 => Mode0::Wiredandaltpullup, + 15 => Mode0::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE0_A::DISABLED + *self == Mode0::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE0_A::INPUT + *self == Mode0::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE0_A::INPUTPULL + *self == Mode0::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE0_A::INPUTPULLFILTER + *self == Mode0::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE0_A::PUSHPULL + *self == Mode0::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE0_A::PUSHPULLALT + *self == Mode0::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE0_A::WIREDOR + *self == Mode0::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE0_A::WIREDORPULLDOWN + *self == Mode0::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE0_A::WIREDAND + *self == Mode0::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE0_A::WIREDANDFILTER + *self == Mode0::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE0_A::WIREDANDPULLUP + *self == Mode0::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE0_A::WIREDANDPULLUPFILTER + *self == Mode0::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE0_A::WIREDANDALT + *self == Mode0::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE0_A::WIREDANDALTFILTER + *self == Mode0::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE0_A::WIREDANDALTPULLUP + *self == Mode0::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE0_A::WIREDANDALTPULLUPFILTER + *self == Mode0::Wiredandaltpullupfilter } } #[doc = "Field `MODE0` writer - MODE n"] -pub type MODE0_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTA_MODEL_SPEC, u8, MODE0_A, 4, O>; -impl<'a, const O: u8> MODE0_W<'a, O> { +pub type Mode0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode0, crate::Safe>; +impl<'a, REG> Mode0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE0_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode0::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE0_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode0::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE0_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode0::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE0_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE0_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode0::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE0_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode0::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE0_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE0_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE0_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE1` reader - MODE n"] -pub type MODE1_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE1_A { +pub enum Mode1 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE1_A) -> Self { + fn from(variant: Mode1) -> Self { variant as _ } } -impl MODE1_R { +impl crate::FieldSpec for Mode1 { + type Ux = u8; +} +impl crate::IsEnum for Mode1 {} +#[doc = "Field `MODE1` reader - MODE n"] +pub type Mode1R = crate::FieldReader; +impl Mode1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE1_A { + pub const fn variant(&self) -> Mode1 { match self.bits { - 0 => MODE1_A::DISABLED, - 1 => MODE1_A::INPUT, - 2 => MODE1_A::INPUTPULL, - 3 => MODE1_A::INPUTPULLFILTER, - 4 => MODE1_A::PUSHPULL, - 5 => MODE1_A::PUSHPULLALT, - 6 => MODE1_A::WIREDOR, - 7 => MODE1_A::WIREDORPULLDOWN, - 8 => MODE1_A::WIREDAND, - 9 => MODE1_A::WIREDANDFILTER, - 10 => MODE1_A::WIREDANDPULLUP, - 11 => MODE1_A::WIREDANDPULLUPFILTER, - 12 => MODE1_A::WIREDANDALT, - 13 => MODE1_A::WIREDANDALTFILTER, - 14 => MODE1_A::WIREDANDALTPULLUP, - 15 => MODE1_A::WIREDANDALTPULLUPFILTER, + 0 => Mode1::Disabled, + 1 => Mode1::Input, + 2 => Mode1::Inputpull, + 3 => Mode1::Inputpullfilter, + 4 => Mode1::Pushpull, + 5 => Mode1::Pushpullalt, + 6 => Mode1::Wiredor, + 7 => Mode1::Wiredorpulldown, + 8 => Mode1::Wiredand, + 9 => Mode1::Wiredandfilter, + 10 => Mode1::Wiredandpullup, + 11 => Mode1::Wiredandpullupfilter, + 12 => Mode1::Wiredandalt, + 13 => Mode1::Wiredandaltfilter, + 14 => Mode1::Wiredandaltpullup, + 15 => Mode1::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE1_A::DISABLED + *self == Mode1::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE1_A::INPUT + *self == Mode1::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE1_A::INPUTPULL + *self == Mode1::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE1_A::INPUTPULLFILTER + *self == Mode1::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE1_A::PUSHPULL + *self == Mode1::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE1_A::PUSHPULLALT + *self == Mode1::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE1_A::WIREDOR + *self == Mode1::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE1_A::WIREDORPULLDOWN + *self == Mode1::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE1_A::WIREDAND + *self == Mode1::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE1_A::WIREDANDFILTER + *self == Mode1::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE1_A::WIREDANDPULLUP + *self == Mode1::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE1_A::WIREDANDPULLUPFILTER + *self == Mode1::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE1_A::WIREDANDALT + *self == Mode1::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE1_A::WIREDANDALTFILTER + *self == Mode1::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE1_A::WIREDANDALTPULLUP + *self == Mode1::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE1_A::WIREDANDALTPULLUPFILTER + *self == Mode1::Wiredandaltpullupfilter } } #[doc = "Field `MODE1` writer - MODE n"] -pub type MODE1_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTA_MODEL_SPEC, u8, MODE1_A, 4, O>; -impl<'a, const O: u8> MODE1_W<'a, O> { +pub type Mode1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode1, crate::Safe>; +impl<'a, REG> Mode1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE1_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode1::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE1_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode1::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE1_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode1::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE1_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE1_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode1::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE1_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode1::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE1_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE1_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE1_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE2` reader - MODE n"] -pub type MODE2_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE2_A { +pub enum Mode2 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE2_A) -> Self { + fn from(variant: Mode2) -> Self { variant as _ } } -impl MODE2_R { +impl crate::FieldSpec for Mode2 { + type Ux = u8; +} +impl crate::IsEnum for Mode2 {} +#[doc = "Field `MODE2` reader - MODE n"] +pub type Mode2R = crate::FieldReader; +impl Mode2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE2_A { + pub const fn variant(&self) -> Mode2 { match self.bits { - 0 => MODE2_A::DISABLED, - 1 => MODE2_A::INPUT, - 2 => MODE2_A::INPUTPULL, - 3 => MODE2_A::INPUTPULLFILTER, - 4 => MODE2_A::PUSHPULL, - 5 => MODE2_A::PUSHPULLALT, - 6 => MODE2_A::WIREDOR, - 7 => MODE2_A::WIREDORPULLDOWN, - 8 => MODE2_A::WIREDAND, - 9 => MODE2_A::WIREDANDFILTER, - 10 => MODE2_A::WIREDANDPULLUP, - 11 => MODE2_A::WIREDANDPULLUPFILTER, - 12 => MODE2_A::WIREDANDALT, - 13 => MODE2_A::WIREDANDALTFILTER, - 14 => MODE2_A::WIREDANDALTPULLUP, - 15 => MODE2_A::WIREDANDALTPULLUPFILTER, + 0 => Mode2::Disabled, + 1 => Mode2::Input, + 2 => Mode2::Inputpull, + 3 => Mode2::Inputpullfilter, + 4 => Mode2::Pushpull, + 5 => Mode2::Pushpullalt, + 6 => Mode2::Wiredor, + 7 => Mode2::Wiredorpulldown, + 8 => Mode2::Wiredand, + 9 => Mode2::Wiredandfilter, + 10 => Mode2::Wiredandpullup, + 11 => Mode2::Wiredandpullupfilter, + 12 => Mode2::Wiredandalt, + 13 => Mode2::Wiredandaltfilter, + 14 => Mode2::Wiredandaltpullup, + 15 => Mode2::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE2_A::DISABLED + *self == Mode2::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE2_A::INPUT + *self == Mode2::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE2_A::INPUTPULL + *self == Mode2::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE2_A::INPUTPULLFILTER + *self == Mode2::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE2_A::PUSHPULL + *self == Mode2::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE2_A::PUSHPULLALT + *self == Mode2::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE2_A::WIREDOR + *self == Mode2::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE2_A::WIREDORPULLDOWN + *self == Mode2::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE2_A::WIREDAND + *self == Mode2::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE2_A::WIREDANDFILTER + *self == Mode2::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE2_A::WIREDANDPULLUP + *self == Mode2::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE2_A::WIREDANDPULLUPFILTER + *self == Mode2::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE2_A::WIREDANDALT + *self == Mode2::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE2_A::WIREDANDALTFILTER + *self == Mode2::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE2_A::WIREDANDALTPULLUP + *self == Mode2::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE2_A::WIREDANDALTPULLUPFILTER + *self == Mode2::Wiredandaltpullupfilter } } #[doc = "Field `MODE2` writer - MODE n"] -pub type MODE2_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTA_MODEL_SPEC, u8, MODE2_A, 4, O>; -impl<'a, const O: u8> MODE2_W<'a, O> { +pub type Mode2W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode2, crate::Safe>; +impl<'a, REG> Mode2W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE2_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode2::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE2_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode2::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE2_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode2::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE2_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE2_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode2::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE2_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode2::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE2_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE2_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE2_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE3` reader - MODE n"] -pub type MODE3_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE3_A { +pub enum Mode3 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE3_A) -> Self { + fn from(variant: Mode3) -> Self { variant as _ } } -impl MODE3_R { +impl crate::FieldSpec for Mode3 { + type Ux = u8; +} +impl crate::IsEnum for Mode3 {} +#[doc = "Field `MODE3` reader - MODE n"] +pub type Mode3R = crate::FieldReader; +impl Mode3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE3_A { + pub const fn variant(&self) -> Mode3 { match self.bits { - 0 => MODE3_A::DISABLED, - 1 => MODE3_A::INPUT, - 2 => MODE3_A::INPUTPULL, - 3 => MODE3_A::INPUTPULLFILTER, - 4 => MODE3_A::PUSHPULL, - 5 => MODE3_A::PUSHPULLALT, - 6 => MODE3_A::WIREDOR, - 7 => MODE3_A::WIREDORPULLDOWN, - 8 => MODE3_A::WIREDAND, - 9 => MODE3_A::WIREDANDFILTER, - 10 => MODE3_A::WIREDANDPULLUP, - 11 => MODE3_A::WIREDANDPULLUPFILTER, - 12 => MODE3_A::WIREDANDALT, - 13 => MODE3_A::WIREDANDALTFILTER, - 14 => MODE3_A::WIREDANDALTPULLUP, - 15 => MODE3_A::WIREDANDALTPULLUPFILTER, + 0 => Mode3::Disabled, + 1 => Mode3::Input, + 2 => Mode3::Inputpull, + 3 => Mode3::Inputpullfilter, + 4 => Mode3::Pushpull, + 5 => Mode3::Pushpullalt, + 6 => Mode3::Wiredor, + 7 => Mode3::Wiredorpulldown, + 8 => Mode3::Wiredand, + 9 => Mode3::Wiredandfilter, + 10 => Mode3::Wiredandpullup, + 11 => Mode3::Wiredandpullupfilter, + 12 => Mode3::Wiredandalt, + 13 => Mode3::Wiredandaltfilter, + 14 => Mode3::Wiredandaltpullup, + 15 => Mode3::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE3_A::DISABLED + *self == Mode3::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE3_A::INPUT + *self == Mode3::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE3_A::INPUTPULL + *self == Mode3::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE3_A::INPUTPULLFILTER + *self == Mode3::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE3_A::PUSHPULL + *self == Mode3::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE3_A::PUSHPULLALT + *self == Mode3::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE3_A::WIREDOR + *self == Mode3::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE3_A::WIREDORPULLDOWN + *self == Mode3::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE3_A::WIREDAND + *self == Mode3::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE3_A::WIREDANDFILTER + *self == Mode3::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE3_A::WIREDANDPULLUP + *self == Mode3::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE3_A::WIREDANDPULLUPFILTER + *self == Mode3::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE3_A::WIREDANDALT + *self == Mode3::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE3_A::WIREDANDALTFILTER + *self == Mode3::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE3_A::WIREDANDALTPULLUP + *self == Mode3::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE3_A::WIREDANDALTPULLUPFILTER + *self == Mode3::Wiredandaltpullupfilter } } #[doc = "Field `MODE3` writer - MODE n"] -pub type MODE3_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTA_MODEL_SPEC, u8, MODE3_A, 4, O>; -impl<'a, const O: u8> MODE3_W<'a, O> { +pub type Mode3W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode3, crate::Safe>; +impl<'a, REG> Mode3W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE3_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode3::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE3_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode3::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE3_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode3::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE3_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE3_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode3::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE3_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode3::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE3_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE3_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE3_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE4` reader - MODE n"] -pub type MODE4_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE4_A { +pub enum Mode4 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE4_A) -> Self { + fn from(variant: Mode4) -> Self { variant as _ } } -impl MODE4_R { +impl crate::FieldSpec for Mode4 { + type Ux = u8; +} +impl crate::IsEnum for Mode4 {} +#[doc = "Field `MODE4` reader - MODE n"] +pub type Mode4R = crate::FieldReader; +impl Mode4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE4_A { + pub const fn variant(&self) -> Mode4 { match self.bits { - 0 => MODE4_A::DISABLED, - 1 => MODE4_A::INPUT, - 2 => MODE4_A::INPUTPULL, - 3 => MODE4_A::INPUTPULLFILTER, - 4 => MODE4_A::PUSHPULL, - 5 => MODE4_A::PUSHPULLALT, - 6 => MODE4_A::WIREDOR, - 7 => MODE4_A::WIREDORPULLDOWN, - 8 => MODE4_A::WIREDAND, - 9 => MODE4_A::WIREDANDFILTER, - 10 => MODE4_A::WIREDANDPULLUP, - 11 => MODE4_A::WIREDANDPULLUPFILTER, - 12 => MODE4_A::WIREDANDALT, - 13 => MODE4_A::WIREDANDALTFILTER, - 14 => MODE4_A::WIREDANDALTPULLUP, - 15 => MODE4_A::WIREDANDALTPULLUPFILTER, + 0 => Mode4::Disabled, + 1 => Mode4::Input, + 2 => Mode4::Inputpull, + 3 => Mode4::Inputpullfilter, + 4 => Mode4::Pushpull, + 5 => Mode4::Pushpullalt, + 6 => Mode4::Wiredor, + 7 => Mode4::Wiredorpulldown, + 8 => Mode4::Wiredand, + 9 => Mode4::Wiredandfilter, + 10 => Mode4::Wiredandpullup, + 11 => Mode4::Wiredandpullupfilter, + 12 => Mode4::Wiredandalt, + 13 => Mode4::Wiredandaltfilter, + 14 => Mode4::Wiredandaltpullup, + 15 => Mode4::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE4_A::DISABLED + *self == Mode4::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE4_A::INPUT + *self == Mode4::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE4_A::INPUTPULL + *self == Mode4::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE4_A::INPUTPULLFILTER + *self == Mode4::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE4_A::PUSHPULL + *self == Mode4::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE4_A::PUSHPULLALT + *self == Mode4::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE4_A::WIREDOR + *self == Mode4::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE4_A::WIREDORPULLDOWN + *self == Mode4::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE4_A::WIREDAND + *self == Mode4::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE4_A::WIREDANDFILTER + *self == Mode4::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE4_A::WIREDANDPULLUP + *self == Mode4::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE4_A::WIREDANDPULLUPFILTER + *self == Mode4::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE4_A::WIREDANDALT + *self == Mode4::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE4_A::WIREDANDALTFILTER + *self == Mode4::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE4_A::WIREDANDALTPULLUP + *self == Mode4::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE4_A::WIREDANDALTPULLUPFILTER + *self == Mode4::Wiredandaltpullupfilter } } #[doc = "Field `MODE4` writer - MODE n"] -pub type MODE4_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTA_MODEL_SPEC, u8, MODE4_A, 4, O>; -impl<'a, const O: u8> MODE4_W<'a, O> { +pub type Mode4W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode4, crate::Safe>; +impl<'a, REG> Mode4W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE4_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode4::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE4_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode4::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE4_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode4::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE4_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE4_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode4::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE4_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode4::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE4_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE4_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE4_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE5` reader - MODE n"] -pub type MODE5_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE5_A { +pub enum Mode5 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE5_A) -> Self { + fn from(variant: Mode5) -> Self { variant as _ } } -impl MODE5_R { +impl crate::FieldSpec for Mode5 { + type Ux = u8; +} +impl crate::IsEnum for Mode5 {} +#[doc = "Field `MODE5` reader - MODE n"] +pub type Mode5R = crate::FieldReader; +impl Mode5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE5_A { + pub const fn variant(&self) -> Mode5 { match self.bits { - 0 => MODE5_A::DISABLED, - 1 => MODE5_A::INPUT, - 2 => MODE5_A::INPUTPULL, - 3 => MODE5_A::INPUTPULLFILTER, - 4 => MODE5_A::PUSHPULL, - 5 => MODE5_A::PUSHPULLALT, - 6 => MODE5_A::WIREDOR, - 7 => MODE5_A::WIREDORPULLDOWN, - 8 => MODE5_A::WIREDAND, - 9 => MODE5_A::WIREDANDFILTER, - 10 => MODE5_A::WIREDANDPULLUP, - 11 => MODE5_A::WIREDANDPULLUPFILTER, - 12 => MODE5_A::WIREDANDALT, - 13 => MODE5_A::WIREDANDALTFILTER, - 14 => MODE5_A::WIREDANDALTPULLUP, - 15 => MODE5_A::WIREDANDALTPULLUPFILTER, + 0 => Mode5::Disabled, + 1 => Mode5::Input, + 2 => Mode5::Inputpull, + 3 => Mode5::Inputpullfilter, + 4 => Mode5::Pushpull, + 5 => Mode5::Pushpullalt, + 6 => Mode5::Wiredor, + 7 => Mode5::Wiredorpulldown, + 8 => Mode5::Wiredand, + 9 => Mode5::Wiredandfilter, + 10 => Mode5::Wiredandpullup, + 11 => Mode5::Wiredandpullupfilter, + 12 => Mode5::Wiredandalt, + 13 => Mode5::Wiredandaltfilter, + 14 => Mode5::Wiredandaltpullup, + 15 => Mode5::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE5_A::DISABLED + *self == Mode5::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE5_A::INPUT + *self == Mode5::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE5_A::INPUTPULL + *self == Mode5::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE5_A::INPUTPULLFILTER + *self == Mode5::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE5_A::PUSHPULL + *self == Mode5::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE5_A::PUSHPULLALT + *self == Mode5::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE5_A::WIREDOR + *self == Mode5::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE5_A::WIREDORPULLDOWN + *self == Mode5::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE5_A::WIREDAND + *self == Mode5::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE5_A::WIREDANDFILTER + *self == Mode5::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE5_A::WIREDANDPULLUP + *self == Mode5::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE5_A::WIREDANDPULLUPFILTER + *self == Mode5::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE5_A::WIREDANDALT + *self == Mode5::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE5_A::WIREDANDALTFILTER + *self == Mode5::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE5_A::WIREDANDALTPULLUP + *self == Mode5::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE5_A::WIREDANDALTPULLUPFILTER + *self == Mode5::Wiredandaltpullupfilter } } #[doc = "Field `MODE5` writer - MODE n"] -pub type MODE5_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTA_MODEL_SPEC, u8, MODE5_A, 4, O>; -impl<'a, const O: u8> MODE5_W<'a, O> { +pub type Mode5W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode5, crate::Safe>; +impl<'a, REG> Mode5W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE5_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode5::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE5_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode5::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE5_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode5::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE5_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE5_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode5::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE5_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode5::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE5_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE5_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE5_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE6` reader - MODE n"] -pub type MODE6_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE6_A { +pub enum Mode6 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE6_A) -> Self { + fn from(variant: Mode6) -> Self { variant as _ } } -impl MODE6_R { +impl crate::FieldSpec for Mode6 { + type Ux = u8; +} +impl crate::IsEnum for Mode6 {} +#[doc = "Field `MODE6` reader - MODE n"] +pub type Mode6R = crate::FieldReader; +impl Mode6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE6_A { + pub const fn variant(&self) -> Mode6 { match self.bits { - 0 => MODE6_A::DISABLED, - 1 => MODE6_A::INPUT, - 2 => MODE6_A::INPUTPULL, - 3 => MODE6_A::INPUTPULLFILTER, - 4 => MODE6_A::PUSHPULL, - 5 => MODE6_A::PUSHPULLALT, - 6 => MODE6_A::WIREDOR, - 7 => MODE6_A::WIREDORPULLDOWN, - 8 => MODE6_A::WIREDAND, - 9 => MODE6_A::WIREDANDFILTER, - 10 => MODE6_A::WIREDANDPULLUP, - 11 => MODE6_A::WIREDANDPULLUPFILTER, - 12 => MODE6_A::WIREDANDALT, - 13 => MODE6_A::WIREDANDALTFILTER, - 14 => MODE6_A::WIREDANDALTPULLUP, - 15 => MODE6_A::WIREDANDALTPULLUPFILTER, + 0 => Mode6::Disabled, + 1 => Mode6::Input, + 2 => Mode6::Inputpull, + 3 => Mode6::Inputpullfilter, + 4 => Mode6::Pushpull, + 5 => Mode6::Pushpullalt, + 6 => Mode6::Wiredor, + 7 => Mode6::Wiredorpulldown, + 8 => Mode6::Wiredand, + 9 => Mode6::Wiredandfilter, + 10 => Mode6::Wiredandpullup, + 11 => Mode6::Wiredandpullupfilter, + 12 => Mode6::Wiredandalt, + 13 => Mode6::Wiredandaltfilter, + 14 => Mode6::Wiredandaltpullup, + 15 => Mode6::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE6_A::DISABLED + *self == Mode6::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE6_A::INPUT + *self == Mode6::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE6_A::INPUTPULL + *self == Mode6::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE6_A::INPUTPULLFILTER + *self == Mode6::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE6_A::PUSHPULL + *self == Mode6::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE6_A::PUSHPULLALT + *self == Mode6::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE6_A::WIREDOR + *self == Mode6::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE6_A::WIREDORPULLDOWN + *self == Mode6::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE6_A::WIREDAND + *self == Mode6::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE6_A::WIREDANDFILTER + *self == Mode6::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE6_A::WIREDANDPULLUP + *self == Mode6::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE6_A::WIREDANDPULLUPFILTER + *self == Mode6::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE6_A::WIREDANDALT + *self == Mode6::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE6_A::WIREDANDALTFILTER + *self == Mode6::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE6_A::WIREDANDALTPULLUP + *self == Mode6::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE6_A::WIREDANDALTPULLUPFILTER + *self == Mode6::Wiredandaltpullupfilter } } #[doc = "Field `MODE6` writer - MODE n"] -pub type MODE6_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTA_MODEL_SPEC, u8, MODE6_A, 4, O>; -impl<'a, const O: u8> MODE6_W<'a, O> { +pub type Mode6W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode6, crate::Safe>; +impl<'a, REG> Mode6W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE6_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode6::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE6_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode6::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE6_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode6::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE6_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE6_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode6::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE6_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode6::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE6_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE6_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE6_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE7` reader - MODE n"] -pub type MODE7_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE7_A { +pub enum Mode7 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE7_A) -> Self { + fn from(variant: Mode7) -> Self { variant as _ } } -impl MODE7_R { +impl crate::FieldSpec for Mode7 { + type Ux = u8; +} +impl crate::IsEnum for Mode7 {} +#[doc = "Field `MODE7` reader - MODE n"] +pub type Mode7R = crate::FieldReader; +impl Mode7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE7_A { + pub const fn variant(&self) -> Mode7 { match self.bits { - 0 => MODE7_A::DISABLED, - 1 => MODE7_A::INPUT, - 2 => MODE7_A::INPUTPULL, - 3 => MODE7_A::INPUTPULLFILTER, - 4 => MODE7_A::PUSHPULL, - 5 => MODE7_A::PUSHPULLALT, - 6 => MODE7_A::WIREDOR, - 7 => MODE7_A::WIREDORPULLDOWN, - 8 => MODE7_A::WIREDAND, - 9 => MODE7_A::WIREDANDFILTER, - 10 => MODE7_A::WIREDANDPULLUP, - 11 => MODE7_A::WIREDANDPULLUPFILTER, - 12 => MODE7_A::WIREDANDALT, - 13 => MODE7_A::WIREDANDALTFILTER, - 14 => MODE7_A::WIREDANDALTPULLUP, - 15 => MODE7_A::WIREDANDALTPULLUPFILTER, + 0 => Mode7::Disabled, + 1 => Mode7::Input, + 2 => Mode7::Inputpull, + 3 => Mode7::Inputpullfilter, + 4 => Mode7::Pushpull, + 5 => Mode7::Pushpullalt, + 6 => Mode7::Wiredor, + 7 => Mode7::Wiredorpulldown, + 8 => Mode7::Wiredand, + 9 => Mode7::Wiredandfilter, + 10 => Mode7::Wiredandpullup, + 11 => Mode7::Wiredandpullupfilter, + 12 => Mode7::Wiredandalt, + 13 => Mode7::Wiredandaltfilter, + 14 => Mode7::Wiredandaltpullup, + 15 => Mode7::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE7_A::DISABLED + *self == Mode7::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE7_A::INPUT + *self == Mode7::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE7_A::INPUTPULL + *self == Mode7::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE7_A::INPUTPULLFILTER + *self == Mode7::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE7_A::PUSHPULL + *self == Mode7::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE7_A::PUSHPULLALT + *self == Mode7::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE7_A::WIREDOR + *self == Mode7::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE7_A::WIREDORPULLDOWN + *self == Mode7::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE7_A::WIREDAND + *self == Mode7::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE7_A::WIREDANDFILTER + *self == Mode7::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE7_A::WIREDANDPULLUP + *self == Mode7::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE7_A::WIREDANDPULLUPFILTER + *self == Mode7::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE7_A::WIREDANDALT + *self == Mode7::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE7_A::WIREDANDALTFILTER + *self == Mode7::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE7_A::WIREDANDALTPULLUP + *self == Mode7::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE7_A::WIREDANDALTPULLUPFILTER + *self == Mode7::Wiredandaltpullupfilter } } #[doc = "Field `MODE7` writer - MODE n"] -pub type MODE7_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTA_MODEL_SPEC, u8, MODE7_A, 4, O>; -impl<'a, const O: u8> MODE7_W<'a, O> { +pub type Mode7W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode7, crate::Safe>; +impl<'a, REG> Mode7W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE7_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode7::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE7_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode7::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE7_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode7::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE7_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode7::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE7_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode7::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE7_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode7::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE7_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE7_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE7_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandaltpullupfilter) } } impl R { #[doc = "Bits 0:3 - MODE n"] #[inline(always)] - pub fn mode0(&self) -> MODE0_R { - MODE0_R::new((self.bits & 0x0f) as u8) + pub fn mode0(&self) -> Mode0R { + Mode0R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - MODE n"] #[inline(always)] - pub fn mode1(&self) -> MODE1_R { - MODE1_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn mode1(&self) -> Mode1R { + Mode1R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - MODE n"] #[inline(always)] - pub fn mode2(&self) -> MODE2_R { - MODE2_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn mode2(&self) -> Mode2R { + Mode2R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - MODE n"] #[inline(always)] - pub fn mode3(&self) -> MODE3_R { - MODE3_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn mode3(&self) -> Mode3R { + Mode3R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:19 - MODE n"] #[inline(always)] - pub fn mode4(&self) -> MODE4_R { - MODE4_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn mode4(&self) -> Mode4R { + Mode4R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:23 - MODE n"] #[inline(always)] - pub fn mode5(&self) -> MODE5_R { - MODE5_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn mode5(&self) -> Mode5R { + Mode5R::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:27 - MODE n"] #[inline(always)] - pub fn mode6(&self) -> MODE6_R { - MODE6_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn mode6(&self) -> Mode6R { + Mode6R::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 28:31 - MODE n"] #[inline(always)] - pub fn mode7(&self) -> MODE7_R { - MODE7_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn mode7(&self) -> Mode7R { + Mode7R::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - MODE n"] #[inline(always)] #[must_use] - pub fn mode0(&mut self) -> MODE0_W<0> { - MODE0_W::new(self) + pub fn mode0(&mut self) -> Mode0W { + Mode0W::new(self, 0) } #[doc = "Bits 4:7 - MODE n"] #[inline(always)] #[must_use] - pub fn mode1(&mut self) -> MODE1_W<4> { - MODE1_W::new(self) + pub fn mode1(&mut self) -> Mode1W { + Mode1W::new(self, 4) } #[doc = "Bits 8:11 - MODE n"] #[inline(always)] #[must_use] - pub fn mode2(&mut self) -> MODE2_W<8> { - MODE2_W::new(self) + pub fn mode2(&mut self) -> Mode2W { + Mode2W::new(self, 8) } #[doc = "Bits 12:15 - MODE n"] #[inline(always)] #[must_use] - pub fn mode3(&mut self) -> MODE3_W<12> { - MODE3_W::new(self) + pub fn mode3(&mut self) -> Mode3W { + Mode3W::new(self, 12) } #[doc = "Bits 16:19 - MODE n"] #[inline(always)] #[must_use] - pub fn mode4(&mut self) -> MODE4_W<16> { - MODE4_W::new(self) + pub fn mode4(&mut self) -> Mode4W { + Mode4W::new(self, 16) } #[doc = "Bits 20:23 - MODE n"] #[inline(always)] #[must_use] - pub fn mode5(&mut self) -> MODE5_W<20> { - MODE5_W::new(self) + pub fn mode5(&mut self) -> Mode5W { + Mode5W::new(self, 20) } #[doc = "Bits 24:27 - MODE n"] #[inline(always)] #[must_use] - pub fn mode6(&mut self) -> MODE6_W<24> { - MODE6_W::new(self) + pub fn mode6(&mut self) -> Mode6W { + Mode6W::new(self, 24) } #[doc = "Bits 28:31 - MODE n"] #[inline(always)] #[must_use] - pub fn mode7(&mut self) -> MODE7_W<28> { - MODE7_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn mode7(&mut self) -> Mode7W { + Mode7W::new(self, 28) } } -#[doc = "mode low\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [porta_model](index.html) module"] -pub struct PORTA_MODEL_SPEC; -impl crate::RegisterSpec for PORTA_MODEL_SPEC { +#[doc = "mode low\n\nYou can [`read`](crate::Reg::read) this register and get [`porta_model::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`porta_model::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortaModelSpec; +impl crate::RegisterSpec for PortaModelSpec { type Ux = u32; } -#[doc = "`read()` method returns [porta_model::R](R) reader structure"] -impl crate::Readable for PORTA_MODEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [porta_model::W](W) writer structure"] -impl crate::Writable for PORTA_MODEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`porta_model::R`](R) reader structure"] +impl crate::Readable for PortaModelSpec {} +#[doc = "`write(|w| ..)` method takes [`porta_model::W`](W) writer structure"] +impl crate::Writable for PortaModelSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTA_MODEL to value 0"] -impl crate::Resettable for PORTA_MODEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortaModelSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portb_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portb_ctrl.rs index de03db3..9901887 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portb_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portb_ctrl.rs @@ -1,126 +1,85 @@ #[doc = "Register `PORTB_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTB_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SLEWRATE` reader - Slew Rate"] -pub type SLEWRATE_R = crate::FieldReader; +pub type SlewrateR = crate::FieldReader; #[doc = "Field `SLEWRATE` writer - Slew Rate"] -pub type SLEWRATE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PORTB_CTRL_SPEC, u8, u8, 3, O>; +pub type SlewrateW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `DINDIS` reader - Data In Disable"] -pub type DINDIS_R = crate::BitReader; +pub type DindisR = crate::BitReader; #[doc = "Field `DINDIS` writer - Data In Disable"] -pub type DINDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PORTB_CTRL_SPEC, bool, O>; +pub type DindisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SLEWRATEALT` reader - Slew Rate Alt"] -pub type SLEWRATEALT_R = crate::FieldReader; +pub type SlewratealtR = crate::FieldReader; #[doc = "Field `SLEWRATEALT` writer - Slew Rate Alt"] -pub type SLEWRATEALT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PORTB_CTRL_SPEC, u8, u8, 3, O>; +pub type SlewratealtW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `DINDISALT` reader - Data In Disable Alt"] -pub type DINDISALT_R = crate::BitReader; +pub type DindisaltR = crate::BitReader; #[doc = "Field `DINDISALT` writer - Data In Disable Alt"] -pub type DINDISALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, PORTB_CTRL_SPEC, bool, O>; +pub type DindisaltW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 4:6 - Slew Rate"] #[inline(always)] - pub fn slewrate(&self) -> SLEWRATE_R { - SLEWRATE_R::new(((self.bits >> 4) & 7) as u8) + pub fn slewrate(&self) -> SlewrateR { + SlewrateR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bit 12 - Data In Disable"] #[inline(always)] - pub fn dindis(&self) -> DINDIS_R { - DINDIS_R::new(((self.bits >> 12) & 1) != 0) + pub fn dindis(&self) -> DindisR { + DindisR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bits 20:22 - Slew Rate Alt"] #[inline(always)] - pub fn slewratealt(&self) -> SLEWRATEALT_R { - SLEWRATEALT_R::new(((self.bits >> 20) & 7) as u8) + pub fn slewratealt(&self) -> SlewratealtR { + SlewratealtR::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bit 28 - Data In Disable Alt"] #[inline(always)] - pub fn dindisalt(&self) -> DINDISALT_R { - DINDISALT_R::new(((self.bits >> 28) & 1) != 0) + pub fn dindisalt(&self) -> DindisaltR { + DindisaltR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bits 4:6 - Slew Rate"] #[inline(always)] #[must_use] - pub fn slewrate(&mut self) -> SLEWRATE_W<4> { - SLEWRATE_W::new(self) + pub fn slewrate(&mut self) -> SlewrateW { + SlewrateW::new(self, 4) } #[doc = "Bit 12 - Data In Disable"] #[inline(always)] #[must_use] - pub fn dindis(&mut self) -> DINDIS_W<12> { - DINDIS_W::new(self) + pub fn dindis(&mut self) -> DindisW { + DindisW::new(self, 12) } #[doc = "Bits 20:22 - Slew Rate Alt"] #[inline(always)] #[must_use] - pub fn slewratealt(&mut self) -> SLEWRATEALT_W<20> { - SLEWRATEALT_W::new(self) + pub fn slewratealt(&mut self) -> SlewratealtW { + SlewratealtW::new(self, 20) } #[doc = "Bit 28 - Data In Disable Alt"] #[inline(always)] #[must_use] - pub fn dindisalt(&mut self) -> DINDISALT_W<28> { - DINDISALT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dindisalt(&mut self) -> DindisaltW { + DindisaltW::new(self, 28) } } -#[doc = "Port control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portb_ctrl](index.html) module"] -pub struct PORTB_CTRL_SPEC; -impl crate::RegisterSpec for PORTB_CTRL_SPEC { +#[doc = "Port control\n\nYou can [`read`](crate::Reg::read) this register and get [`portb_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portb_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortbCtrlSpec; +impl crate::RegisterSpec for PortbCtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [portb_ctrl::R](R) reader structure"] -impl crate::Readable for PORTB_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [portb_ctrl::W](W) writer structure"] -impl crate::Writable for PORTB_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`portb_ctrl::R`](R) reader structure"] +impl crate::Readable for PortbCtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`portb_ctrl::W`](W) writer structure"] +impl crate::Writable for PortbCtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTB_CTRL to value 0x0040_0040"] -impl crate::Resettable for PORTB_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0040_0040; +impl crate::Resettable for PortbCtrlSpec { + const RESET_VALUE: u32 = 0x0040_0040; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portb_din.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portb_din.rs index b7bd574..262cdc0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portb_din.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portb_din.rs @@ -1,37 +1,22 @@ #[doc = "Register `PORTB_DIN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DIN` reader - Data input"] -pub type DIN_R = crate::FieldReader; +pub type DinR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - Data input"] #[inline(always)] - pub fn din(&self) -> DIN_R { - DIN_R::new((self.bits & 0x7f) as u8) + pub fn din(&self) -> DinR { + DinR::new((self.bits & 0x7f) as u8) } } -#[doc = "data in\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portb_din](index.html) module"] -pub struct PORTB_DIN_SPEC; -impl crate::RegisterSpec for PORTB_DIN_SPEC { +#[doc = "data in\n\nYou can [`read`](crate::Reg::read) this register and get [`portb_din::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortbDinSpec; +impl crate::RegisterSpec for PortbDinSpec { type Ux = u32; } -#[doc = "`read()` method returns [portb_din::R](R) reader structure"] -impl crate::Readable for PORTB_DIN_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`portb_din::R`](R) reader structure"] +impl crate::Readable for PortbDinSpec {} #[doc = "`reset()` method sets PORTB_DIN to value 0"] -impl crate::Resettable for PORTB_DIN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortbDinSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portb_dout.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portb_dout.rs index 3822720..6e1cc25 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portb_dout.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portb_dout.rs @@ -1,80 +1,40 @@ #[doc = "Register `PORTB_DOUT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTB_DOUT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DOUT` reader - Data output"] -pub type DOUT_R = crate::FieldReader; +pub type DoutR = crate::FieldReader; #[doc = "Field `DOUT` writer - Data output"] -pub type DOUT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PORTB_DOUT_SPEC, u8, u8, 7, O>; +pub type DoutW<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { #[doc = "Bits 0:6 - Data output"] #[inline(always)] - pub fn dout(&self) -> DOUT_R { - DOUT_R::new((self.bits & 0x7f) as u8) + pub fn dout(&self) -> DoutR { + DoutR::new((self.bits & 0x7f) as u8) } } impl W { #[doc = "Bits 0:6 - Data output"] #[inline(always)] #[must_use] - pub fn dout(&mut self) -> DOUT_W<0> { - DOUT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dout(&mut self) -> DoutW { + DoutW::new(self, 0) } } -#[doc = "data out\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portb_dout](index.html) module"] -pub struct PORTB_DOUT_SPEC; -impl crate::RegisterSpec for PORTB_DOUT_SPEC { +#[doc = "data out\n\nYou can [`read`](crate::Reg::read) this register and get [`portb_dout::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portb_dout::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortbDoutSpec; +impl crate::RegisterSpec for PortbDoutSpec { type Ux = u32; } -#[doc = "`read()` method returns [portb_dout::R](R) reader structure"] -impl crate::Readable for PORTB_DOUT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [portb_dout::W](W) writer structure"] -impl crate::Writable for PORTB_DOUT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`portb_dout::R`](R) reader structure"] +impl crate::Readable for PortbDoutSpec {} +#[doc = "`write(|w| ..)` method takes [`portb_dout::W`](W) writer structure"] +impl crate::Writable for PortbDoutSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTB_DOUT to value 0"] -impl crate::Resettable for PORTB_DOUT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortbDoutSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portb_model.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portb_model.rs index 79fa654..86fbccb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portb_model.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portb_model.rs @@ -1,1787 +1,1796 @@ #[doc = "Register `PORTB_MODEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTB_MODEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE0` reader - MODE n"] -pub type MODE0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE0_A { +pub enum Mode0 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE0_A) -> Self { + fn from(variant: Mode0) -> Self { variant as _ } } -impl MODE0_R { +impl crate::FieldSpec for Mode0 { + type Ux = u8; +} +impl crate::IsEnum for Mode0 {} +#[doc = "Field `MODE0` reader - MODE n"] +pub type Mode0R = crate::FieldReader; +impl Mode0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE0_A { + pub const fn variant(&self) -> Mode0 { match self.bits { - 0 => MODE0_A::DISABLED, - 1 => MODE0_A::INPUT, - 2 => MODE0_A::INPUTPULL, - 3 => MODE0_A::INPUTPULLFILTER, - 4 => MODE0_A::PUSHPULL, - 5 => MODE0_A::PUSHPULLALT, - 6 => MODE0_A::WIREDOR, - 7 => MODE0_A::WIREDORPULLDOWN, - 8 => MODE0_A::WIREDAND, - 9 => MODE0_A::WIREDANDFILTER, - 10 => MODE0_A::WIREDANDPULLUP, - 11 => MODE0_A::WIREDANDPULLUPFILTER, - 12 => MODE0_A::WIREDANDALT, - 13 => MODE0_A::WIREDANDALTFILTER, - 14 => MODE0_A::WIREDANDALTPULLUP, - 15 => MODE0_A::WIREDANDALTPULLUPFILTER, + 0 => Mode0::Disabled, + 1 => Mode0::Input, + 2 => Mode0::Inputpull, + 3 => Mode0::Inputpullfilter, + 4 => Mode0::Pushpull, + 5 => Mode0::Pushpullalt, + 6 => Mode0::Wiredor, + 7 => Mode0::Wiredorpulldown, + 8 => Mode0::Wiredand, + 9 => Mode0::Wiredandfilter, + 10 => Mode0::Wiredandpullup, + 11 => Mode0::Wiredandpullupfilter, + 12 => Mode0::Wiredandalt, + 13 => Mode0::Wiredandaltfilter, + 14 => Mode0::Wiredandaltpullup, + 15 => Mode0::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE0_A::DISABLED + *self == Mode0::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE0_A::INPUT + *self == Mode0::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE0_A::INPUTPULL + *self == Mode0::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE0_A::INPUTPULLFILTER + *self == Mode0::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE0_A::PUSHPULL + *self == Mode0::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE0_A::PUSHPULLALT + *self == Mode0::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE0_A::WIREDOR + *self == Mode0::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE0_A::WIREDORPULLDOWN + *self == Mode0::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE0_A::WIREDAND + *self == Mode0::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE0_A::WIREDANDFILTER + *self == Mode0::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE0_A::WIREDANDPULLUP + *self == Mode0::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE0_A::WIREDANDPULLUPFILTER + *self == Mode0::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE0_A::WIREDANDALT + *self == Mode0::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE0_A::WIREDANDALTFILTER + *self == Mode0::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE0_A::WIREDANDALTPULLUP + *self == Mode0::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE0_A::WIREDANDALTPULLUPFILTER + *self == Mode0::Wiredandaltpullupfilter } } #[doc = "Field `MODE0` writer - MODE n"] -pub type MODE0_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTB_MODEL_SPEC, u8, MODE0_A, 4, O>; -impl<'a, const O: u8> MODE0_W<'a, O> { +pub type Mode0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode0, crate::Safe>; +impl<'a, REG> Mode0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE0_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode0::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE0_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode0::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE0_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode0::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE0_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE0_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode0::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE0_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode0::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE0_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE0_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE0_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE1` reader - MODE n"] -pub type MODE1_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE1_A { +pub enum Mode1 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE1_A) -> Self { + fn from(variant: Mode1) -> Self { variant as _ } } -impl MODE1_R { +impl crate::FieldSpec for Mode1 { + type Ux = u8; +} +impl crate::IsEnum for Mode1 {} +#[doc = "Field `MODE1` reader - MODE n"] +pub type Mode1R = crate::FieldReader; +impl Mode1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE1_A { + pub const fn variant(&self) -> Mode1 { match self.bits { - 0 => MODE1_A::DISABLED, - 1 => MODE1_A::INPUT, - 2 => MODE1_A::INPUTPULL, - 3 => MODE1_A::INPUTPULLFILTER, - 4 => MODE1_A::PUSHPULL, - 5 => MODE1_A::PUSHPULLALT, - 6 => MODE1_A::WIREDOR, - 7 => MODE1_A::WIREDORPULLDOWN, - 8 => MODE1_A::WIREDAND, - 9 => MODE1_A::WIREDANDFILTER, - 10 => MODE1_A::WIREDANDPULLUP, - 11 => MODE1_A::WIREDANDPULLUPFILTER, - 12 => MODE1_A::WIREDANDALT, - 13 => MODE1_A::WIREDANDALTFILTER, - 14 => MODE1_A::WIREDANDALTPULLUP, - 15 => MODE1_A::WIREDANDALTPULLUPFILTER, + 0 => Mode1::Disabled, + 1 => Mode1::Input, + 2 => Mode1::Inputpull, + 3 => Mode1::Inputpullfilter, + 4 => Mode1::Pushpull, + 5 => Mode1::Pushpullalt, + 6 => Mode1::Wiredor, + 7 => Mode1::Wiredorpulldown, + 8 => Mode1::Wiredand, + 9 => Mode1::Wiredandfilter, + 10 => Mode1::Wiredandpullup, + 11 => Mode1::Wiredandpullupfilter, + 12 => Mode1::Wiredandalt, + 13 => Mode1::Wiredandaltfilter, + 14 => Mode1::Wiredandaltpullup, + 15 => Mode1::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE1_A::DISABLED + *self == Mode1::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE1_A::INPUT + *self == Mode1::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE1_A::INPUTPULL + *self == Mode1::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE1_A::INPUTPULLFILTER + *self == Mode1::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE1_A::PUSHPULL + *self == Mode1::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE1_A::PUSHPULLALT + *self == Mode1::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE1_A::WIREDOR + *self == Mode1::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE1_A::WIREDORPULLDOWN + *self == Mode1::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE1_A::WIREDAND + *self == Mode1::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE1_A::WIREDANDFILTER + *self == Mode1::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE1_A::WIREDANDPULLUP + *self == Mode1::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE1_A::WIREDANDPULLUPFILTER + *self == Mode1::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE1_A::WIREDANDALT + *self == Mode1::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE1_A::WIREDANDALTFILTER + *self == Mode1::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE1_A::WIREDANDALTPULLUP + *self == Mode1::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE1_A::WIREDANDALTPULLUPFILTER + *self == Mode1::Wiredandaltpullupfilter } } #[doc = "Field `MODE1` writer - MODE n"] -pub type MODE1_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTB_MODEL_SPEC, u8, MODE1_A, 4, O>; -impl<'a, const O: u8> MODE1_W<'a, O> { +pub type Mode1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode1, crate::Safe>; +impl<'a, REG> Mode1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE1_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode1::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE1_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode1::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE1_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode1::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE1_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE1_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode1::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE1_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode1::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE1_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE1_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE1_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE2` reader - MODE n"] -pub type MODE2_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE2_A { +pub enum Mode2 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE2_A) -> Self { + fn from(variant: Mode2) -> Self { variant as _ } } -impl MODE2_R { +impl crate::FieldSpec for Mode2 { + type Ux = u8; +} +impl crate::IsEnum for Mode2 {} +#[doc = "Field `MODE2` reader - MODE n"] +pub type Mode2R = crate::FieldReader; +impl Mode2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE2_A { + pub const fn variant(&self) -> Mode2 { match self.bits { - 0 => MODE2_A::DISABLED, - 1 => MODE2_A::INPUT, - 2 => MODE2_A::INPUTPULL, - 3 => MODE2_A::INPUTPULLFILTER, - 4 => MODE2_A::PUSHPULL, - 5 => MODE2_A::PUSHPULLALT, - 6 => MODE2_A::WIREDOR, - 7 => MODE2_A::WIREDORPULLDOWN, - 8 => MODE2_A::WIREDAND, - 9 => MODE2_A::WIREDANDFILTER, - 10 => MODE2_A::WIREDANDPULLUP, - 11 => MODE2_A::WIREDANDPULLUPFILTER, - 12 => MODE2_A::WIREDANDALT, - 13 => MODE2_A::WIREDANDALTFILTER, - 14 => MODE2_A::WIREDANDALTPULLUP, - 15 => MODE2_A::WIREDANDALTPULLUPFILTER, + 0 => Mode2::Disabled, + 1 => Mode2::Input, + 2 => Mode2::Inputpull, + 3 => Mode2::Inputpullfilter, + 4 => Mode2::Pushpull, + 5 => Mode2::Pushpullalt, + 6 => Mode2::Wiredor, + 7 => Mode2::Wiredorpulldown, + 8 => Mode2::Wiredand, + 9 => Mode2::Wiredandfilter, + 10 => Mode2::Wiredandpullup, + 11 => Mode2::Wiredandpullupfilter, + 12 => Mode2::Wiredandalt, + 13 => Mode2::Wiredandaltfilter, + 14 => Mode2::Wiredandaltpullup, + 15 => Mode2::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE2_A::DISABLED + *self == Mode2::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE2_A::INPUT + *self == Mode2::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE2_A::INPUTPULL + *self == Mode2::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE2_A::INPUTPULLFILTER + *self == Mode2::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE2_A::PUSHPULL + *self == Mode2::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE2_A::PUSHPULLALT + *self == Mode2::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE2_A::WIREDOR + *self == Mode2::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE2_A::WIREDORPULLDOWN + *self == Mode2::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE2_A::WIREDAND + *self == Mode2::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE2_A::WIREDANDFILTER + *self == Mode2::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE2_A::WIREDANDPULLUP + *self == Mode2::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE2_A::WIREDANDPULLUPFILTER + *self == Mode2::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE2_A::WIREDANDALT + *self == Mode2::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE2_A::WIREDANDALTFILTER + *self == Mode2::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE2_A::WIREDANDALTPULLUP + *self == Mode2::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE2_A::WIREDANDALTPULLUPFILTER + *self == Mode2::Wiredandaltpullupfilter } } #[doc = "Field `MODE2` writer - MODE n"] -pub type MODE2_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTB_MODEL_SPEC, u8, MODE2_A, 4, O>; -impl<'a, const O: u8> MODE2_W<'a, O> { +pub type Mode2W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode2, crate::Safe>; +impl<'a, REG> Mode2W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE2_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode2::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE2_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode2::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE2_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode2::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE2_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE2_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode2::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE2_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode2::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE2_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE2_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE2_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE3` reader - MODE n"] -pub type MODE3_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE3_A { +pub enum Mode3 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE3_A) -> Self { + fn from(variant: Mode3) -> Self { variant as _ } } -impl MODE3_R { +impl crate::FieldSpec for Mode3 { + type Ux = u8; +} +impl crate::IsEnum for Mode3 {} +#[doc = "Field `MODE3` reader - MODE n"] +pub type Mode3R = crate::FieldReader; +impl Mode3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE3_A { + pub const fn variant(&self) -> Mode3 { match self.bits { - 0 => MODE3_A::DISABLED, - 1 => MODE3_A::INPUT, - 2 => MODE3_A::INPUTPULL, - 3 => MODE3_A::INPUTPULLFILTER, - 4 => MODE3_A::PUSHPULL, - 5 => MODE3_A::PUSHPULLALT, - 6 => MODE3_A::WIREDOR, - 7 => MODE3_A::WIREDORPULLDOWN, - 8 => MODE3_A::WIREDAND, - 9 => MODE3_A::WIREDANDFILTER, - 10 => MODE3_A::WIREDANDPULLUP, - 11 => MODE3_A::WIREDANDPULLUPFILTER, - 12 => MODE3_A::WIREDANDALT, - 13 => MODE3_A::WIREDANDALTFILTER, - 14 => MODE3_A::WIREDANDALTPULLUP, - 15 => MODE3_A::WIREDANDALTPULLUPFILTER, + 0 => Mode3::Disabled, + 1 => Mode3::Input, + 2 => Mode3::Inputpull, + 3 => Mode3::Inputpullfilter, + 4 => Mode3::Pushpull, + 5 => Mode3::Pushpullalt, + 6 => Mode3::Wiredor, + 7 => Mode3::Wiredorpulldown, + 8 => Mode3::Wiredand, + 9 => Mode3::Wiredandfilter, + 10 => Mode3::Wiredandpullup, + 11 => Mode3::Wiredandpullupfilter, + 12 => Mode3::Wiredandalt, + 13 => Mode3::Wiredandaltfilter, + 14 => Mode3::Wiredandaltpullup, + 15 => Mode3::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE3_A::DISABLED + *self == Mode3::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE3_A::INPUT + *self == Mode3::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE3_A::INPUTPULL + *self == Mode3::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE3_A::INPUTPULLFILTER + *self == Mode3::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE3_A::PUSHPULL + *self == Mode3::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE3_A::PUSHPULLALT + *self == Mode3::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE3_A::WIREDOR + *self == Mode3::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE3_A::WIREDORPULLDOWN + *self == Mode3::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE3_A::WIREDAND + *self == Mode3::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE3_A::WIREDANDFILTER + *self == Mode3::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE3_A::WIREDANDPULLUP + *self == Mode3::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE3_A::WIREDANDPULLUPFILTER + *self == Mode3::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE3_A::WIREDANDALT + *self == Mode3::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE3_A::WIREDANDALTFILTER + *self == Mode3::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE3_A::WIREDANDALTPULLUP + *self == Mode3::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE3_A::WIREDANDALTPULLUPFILTER + *self == Mode3::Wiredandaltpullupfilter } } #[doc = "Field `MODE3` writer - MODE n"] -pub type MODE3_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTB_MODEL_SPEC, u8, MODE3_A, 4, O>; -impl<'a, const O: u8> MODE3_W<'a, O> { +pub type Mode3W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode3, crate::Safe>; +impl<'a, REG> Mode3W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE3_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode3::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE3_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode3::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE3_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode3::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE3_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE3_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode3::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE3_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode3::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE3_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE3_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE3_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE4` reader - MODE n"] -pub type MODE4_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE4_A { +pub enum Mode4 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE4_A) -> Self { + fn from(variant: Mode4) -> Self { variant as _ } } -impl MODE4_R { +impl crate::FieldSpec for Mode4 { + type Ux = u8; +} +impl crate::IsEnum for Mode4 {} +#[doc = "Field `MODE4` reader - MODE n"] +pub type Mode4R = crate::FieldReader; +impl Mode4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE4_A { + pub const fn variant(&self) -> Mode4 { match self.bits { - 0 => MODE4_A::DISABLED, - 1 => MODE4_A::INPUT, - 2 => MODE4_A::INPUTPULL, - 3 => MODE4_A::INPUTPULLFILTER, - 4 => MODE4_A::PUSHPULL, - 5 => MODE4_A::PUSHPULLALT, - 6 => MODE4_A::WIREDOR, - 7 => MODE4_A::WIREDORPULLDOWN, - 8 => MODE4_A::WIREDAND, - 9 => MODE4_A::WIREDANDFILTER, - 10 => MODE4_A::WIREDANDPULLUP, - 11 => MODE4_A::WIREDANDPULLUPFILTER, - 12 => MODE4_A::WIREDANDALT, - 13 => MODE4_A::WIREDANDALTFILTER, - 14 => MODE4_A::WIREDANDALTPULLUP, - 15 => MODE4_A::WIREDANDALTPULLUPFILTER, + 0 => Mode4::Disabled, + 1 => Mode4::Input, + 2 => Mode4::Inputpull, + 3 => Mode4::Inputpullfilter, + 4 => Mode4::Pushpull, + 5 => Mode4::Pushpullalt, + 6 => Mode4::Wiredor, + 7 => Mode4::Wiredorpulldown, + 8 => Mode4::Wiredand, + 9 => Mode4::Wiredandfilter, + 10 => Mode4::Wiredandpullup, + 11 => Mode4::Wiredandpullupfilter, + 12 => Mode4::Wiredandalt, + 13 => Mode4::Wiredandaltfilter, + 14 => Mode4::Wiredandaltpullup, + 15 => Mode4::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE4_A::DISABLED + *self == Mode4::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE4_A::INPUT + *self == Mode4::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE4_A::INPUTPULL + *self == Mode4::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE4_A::INPUTPULLFILTER + *self == Mode4::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE4_A::PUSHPULL + *self == Mode4::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE4_A::PUSHPULLALT + *self == Mode4::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE4_A::WIREDOR + *self == Mode4::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE4_A::WIREDORPULLDOWN + *self == Mode4::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE4_A::WIREDAND + *self == Mode4::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE4_A::WIREDANDFILTER + *self == Mode4::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE4_A::WIREDANDPULLUP + *self == Mode4::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE4_A::WIREDANDPULLUPFILTER + *self == Mode4::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE4_A::WIREDANDALT + *self == Mode4::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE4_A::WIREDANDALTFILTER + *self == Mode4::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE4_A::WIREDANDALTPULLUP + *self == Mode4::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE4_A::WIREDANDALTPULLUPFILTER + *self == Mode4::Wiredandaltpullupfilter } } #[doc = "Field `MODE4` writer - MODE n"] -pub type MODE4_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTB_MODEL_SPEC, u8, MODE4_A, 4, O>; -impl<'a, const O: u8> MODE4_W<'a, O> { +pub type Mode4W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode4, crate::Safe>; +impl<'a, REG> Mode4W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE4_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode4::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE4_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode4::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE4_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode4::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE4_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE4_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode4::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE4_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode4::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE4_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE4_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE4_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE5` reader - MODE n"] -pub type MODE5_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE5_A { +pub enum Mode5 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE5_A) -> Self { + fn from(variant: Mode5) -> Self { variant as _ } } -impl MODE5_R { +impl crate::FieldSpec for Mode5 { + type Ux = u8; +} +impl crate::IsEnum for Mode5 {} +#[doc = "Field `MODE5` reader - MODE n"] +pub type Mode5R = crate::FieldReader; +impl Mode5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE5_A { + pub const fn variant(&self) -> Mode5 { match self.bits { - 0 => MODE5_A::DISABLED, - 1 => MODE5_A::INPUT, - 2 => MODE5_A::INPUTPULL, - 3 => MODE5_A::INPUTPULLFILTER, - 4 => MODE5_A::PUSHPULL, - 5 => MODE5_A::PUSHPULLALT, - 6 => MODE5_A::WIREDOR, - 7 => MODE5_A::WIREDORPULLDOWN, - 8 => MODE5_A::WIREDAND, - 9 => MODE5_A::WIREDANDFILTER, - 10 => MODE5_A::WIREDANDPULLUP, - 11 => MODE5_A::WIREDANDPULLUPFILTER, - 12 => MODE5_A::WIREDANDALT, - 13 => MODE5_A::WIREDANDALTFILTER, - 14 => MODE5_A::WIREDANDALTPULLUP, - 15 => MODE5_A::WIREDANDALTPULLUPFILTER, + 0 => Mode5::Disabled, + 1 => Mode5::Input, + 2 => Mode5::Inputpull, + 3 => Mode5::Inputpullfilter, + 4 => Mode5::Pushpull, + 5 => Mode5::Pushpullalt, + 6 => Mode5::Wiredor, + 7 => Mode5::Wiredorpulldown, + 8 => Mode5::Wiredand, + 9 => Mode5::Wiredandfilter, + 10 => Mode5::Wiredandpullup, + 11 => Mode5::Wiredandpullupfilter, + 12 => Mode5::Wiredandalt, + 13 => Mode5::Wiredandaltfilter, + 14 => Mode5::Wiredandaltpullup, + 15 => Mode5::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE5_A::DISABLED + *self == Mode5::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE5_A::INPUT + *self == Mode5::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE5_A::INPUTPULL + *self == Mode5::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE5_A::INPUTPULLFILTER + *self == Mode5::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE5_A::PUSHPULL + *self == Mode5::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE5_A::PUSHPULLALT + *self == Mode5::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE5_A::WIREDOR + *self == Mode5::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE5_A::WIREDORPULLDOWN + *self == Mode5::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE5_A::WIREDAND + *self == Mode5::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE5_A::WIREDANDFILTER + *self == Mode5::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE5_A::WIREDANDPULLUP + *self == Mode5::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE5_A::WIREDANDPULLUPFILTER + *self == Mode5::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE5_A::WIREDANDALT + *self == Mode5::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE5_A::WIREDANDALTFILTER + *self == Mode5::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE5_A::WIREDANDALTPULLUP + *self == Mode5::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE5_A::WIREDANDALTPULLUPFILTER + *self == Mode5::Wiredandaltpullupfilter } } #[doc = "Field `MODE5` writer - MODE n"] -pub type MODE5_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTB_MODEL_SPEC, u8, MODE5_A, 4, O>; -impl<'a, const O: u8> MODE5_W<'a, O> { +pub type Mode5W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode5, crate::Safe>; +impl<'a, REG> Mode5W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE5_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode5::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE5_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode5::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE5_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode5::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE5_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE5_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode5::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE5_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode5::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE5_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE5_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE5_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE6` reader - MODE n"] -pub type MODE6_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE6_A { +pub enum Mode6 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE6_A) -> Self { + fn from(variant: Mode6) -> Self { variant as _ } } -impl MODE6_R { +impl crate::FieldSpec for Mode6 { + type Ux = u8; +} +impl crate::IsEnum for Mode6 {} +#[doc = "Field `MODE6` reader - MODE n"] +pub type Mode6R = crate::FieldReader; +impl Mode6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE6_A { + pub const fn variant(&self) -> Mode6 { match self.bits { - 0 => MODE6_A::DISABLED, - 1 => MODE6_A::INPUT, - 2 => MODE6_A::INPUTPULL, - 3 => MODE6_A::INPUTPULLFILTER, - 4 => MODE6_A::PUSHPULL, - 5 => MODE6_A::PUSHPULLALT, - 6 => MODE6_A::WIREDOR, - 7 => MODE6_A::WIREDORPULLDOWN, - 8 => MODE6_A::WIREDAND, - 9 => MODE6_A::WIREDANDFILTER, - 10 => MODE6_A::WIREDANDPULLUP, - 11 => MODE6_A::WIREDANDPULLUPFILTER, - 12 => MODE6_A::WIREDANDALT, - 13 => MODE6_A::WIREDANDALTFILTER, - 14 => MODE6_A::WIREDANDALTPULLUP, - 15 => MODE6_A::WIREDANDALTPULLUPFILTER, + 0 => Mode6::Disabled, + 1 => Mode6::Input, + 2 => Mode6::Inputpull, + 3 => Mode6::Inputpullfilter, + 4 => Mode6::Pushpull, + 5 => Mode6::Pushpullalt, + 6 => Mode6::Wiredor, + 7 => Mode6::Wiredorpulldown, + 8 => Mode6::Wiredand, + 9 => Mode6::Wiredandfilter, + 10 => Mode6::Wiredandpullup, + 11 => Mode6::Wiredandpullupfilter, + 12 => Mode6::Wiredandalt, + 13 => Mode6::Wiredandaltfilter, + 14 => Mode6::Wiredandaltpullup, + 15 => Mode6::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE6_A::DISABLED + *self == Mode6::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE6_A::INPUT + *self == Mode6::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE6_A::INPUTPULL + *self == Mode6::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE6_A::INPUTPULLFILTER + *self == Mode6::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE6_A::PUSHPULL + *self == Mode6::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE6_A::PUSHPULLALT + *self == Mode6::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE6_A::WIREDOR + *self == Mode6::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE6_A::WIREDORPULLDOWN + *self == Mode6::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE6_A::WIREDAND + *self == Mode6::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE6_A::WIREDANDFILTER + *self == Mode6::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE6_A::WIREDANDPULLUP + *self == Mode6::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE6_A::WIREDANDPULLUPFILTER + *self == Mode6::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE6_A::WIREDANDALT + *self == Mode6::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE6_A::WIREDANDALTFILTER + *self == Mode6::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE6_A::WIREDANDALTPULLUP + *self == Mode6::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE6_A::WIREDANDALTPULLUPFILTER + *self == Mode6::Wiredandaltpullupfilter } } #[doc = "Field `MODE6` writer - MODE n"] -pub type MODE6_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTB_MODEL_SPEC, u8, MODE6_A, 4, O>; -impl<'a, const O: u8> MODE6_W<'a, O> { +pub type Mode6W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode6, crate::Safe>; +impl<'a, REG> Mode6W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE6_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode6::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE6_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode6::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE6_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode6::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE6_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE6_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode6::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE6_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode6::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE6_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE6_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE6_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandaltpullupfilter) } } impl R { #[doc = "Bits 0:3 - MODE n"] #[inline(always)] - pub fn mode0(&self) -> MODE0_R { - MODE0_R::new((self.bits & 0x0f) as u8) + pub fn mode0(&self) -> Mode0R { + Mode0R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - MODE n"] #[inline(always)] - pub fn mode1(&self) -> MODE1_R { - MODE1_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn mode1(&self) -> Mode1R { + Mode1R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - MODE n"] #[inline(always)] - pub fn mode2(&self) -> MODE2_R { - MODE2_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn mode2(&self) -> Mode2R { + Mode2R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - MODE n"] #[inline(always)] - pub fn mode3(&self) -> MODE3_R { - MODE3_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn mode3(&self) -> Mode3R { + Mode3R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:19 - MODE n"] #[inline(always)] - pub fn mode4(&self) -> MODE4_R { - MODE4_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn mode4(&self) -> Mode4R { + Mode4R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:23 - MODE n"] #[inline(always)] - pub fn mode5(&self) -> MODE5_R { - MODE5_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn mode5(&self) -> Mode5R { + Mode5R::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:27 - MODE n"] #[inline(always)] - pub fn mode6(&self) -> MODE6_R { - MODE6_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn mode6(&self) -> Mode6R { + Mode6R::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - MODE n"] #[inline(always)] #[must_use] - pub fn mode0(&mut self) -> MODE0_W<0> { - MODE0_W::new(self) + pub fn mode0(&mut self) -> Mode0W { + Mode0W::new(self, 0) } #[doc = "Bits 4:7 - MODE n"] #[inline(always)] #[must_use] - pub fn mode1(&mut self) -> MODE1_W<4> { - MODE1_W::new(self) + pub fn mode1(&mut self) -> Mode1W { + Mode1W::new(self, 4) } #[doc = "Bits 8:11 - MODE n"] #[inline(always)] #[must_use] - pub fn mode2(&mut self) -> MODE2_W<8> { - MODE2_W::new(self) + pub fn mode2(&mut self) -> Mode2W { + Mode2W::new(self, 8) } #[doc = "Bits 12:15 - MODE n"] #[inline(always)] #[must_use] - pub fn mode3(&mut self) -> MODE3_W<12> { - MODE3_W::new(self) + pub fn mode3(&mut self) -> Mode3W { + Mode3W::new(self, 12) } #[doc = "Bits 16:19 - MODE n"] #[inline(always)] #[must_use] - pub fn mode4(&mut self) -> MODE4_W<16> { - MODE4_W::new(self) + pub fn mode4(&mut self) -> Mode4W { + Mode4W::new(self, 16) } #[doc = "Bits 20:23 - MODE n"] #[inline(always)] #[must_use] - pub fn mode5(&mut self) -> MODE5_W<20> { - MODE5_W::new(self) + pub fn mode5(&mut self) -> Mode5W { + Mode5W::new(self, 20) } #[doc = "Bits 24:27 - MODE n"] #[inline(always)] #[must_use] - pub fn mode6(&mut self) -> MODE6_W<24> { - MODE6_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn mode6(&mut self) -> Mode6W { + Mode6W::new(self, 24) } } -#[doc = "mode low\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portb_model](index.html) module"] -pub struct PORTB_MODEL_SPEC; -impl crate::RegisterSpec for PORTB_MODEL_SPEC { +#[doc = "mode low\n\nYou can [`read`](crate::Reg::read) this register and get [`portb_model::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portb_model::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortbModelSpec; +impl crate::RegisterSpec for PortbModelSpec { type Ux = u32; } -#[doc = "`read()` method returns [portb_model::R](R) reader structure"] -impl crate::Readable for PORTB_MODEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [portb_model::W](W) writer structure"] -impl crate::Writable for PORTB_MODEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`portb_model::R`](R) reader structure"] +impl crate::Readable for PortbModelSpec {} +#[doc = "`write(|w| ..)` method takes [`portb_model::W`](W) writer structure"] +impl crate::Writable for PortbModelSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTB_MODEL to value 0"] -impl crate::Resettable for PORTB_MODEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortbModelSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portc_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portc_ctrl.rs index c6d2416..6c16c13 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portc_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portc_ctrl.rs @@ -1,126 +1,85 @@ #[doc = "Register `PORTC_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTC_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SLEWRATE` reader - Slew Rate"] -pub type SLEWRATE_R = crate::FieldReader; +pub type SlewrateR = crate::FieldReader; #[doc = "Field `SLEWRATE` writer - Slew Rate"] -pub type SLEWRATE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PORTC_CTRL_SPEC, u8, u8, 3, O>; +pub type SlewrateW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `DINDIS` reader - Data In Disable"] -pub type DINDIS_R = crate::BitReader; +pub type DindisR = crate::BitReader; #[doc = "Field `DINDIS` writer - Data In Disable"] -pub type DINDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PORTC_CTRL_SPEC, bool, O>; +pub type DindisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SLEWRATEALT` reader - Slew Rate Alt"] -pub type SLEWRATEALT_R = crate::FieldReader; +pub type SlewratealtR = crate::FieldReader; #[doc = "Field `SLEWRATEALT` writer - Slew Rate Alt"] -pub type SLEWRATEALT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PORTC_CTRL_SPEC, u8, u8, 3, O>; +pub type SlewratealtW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `DINDISALT` reader - Data In Disable Alt"] -pub type DINDISALT_R = crate::BitReader; +pub type DindisaltR = crate::BitReader; #[doc = "Field `DINDISALT` writer - Data In Disable Alt"] -pub type DINDISALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, PORTC_CTRL_SPEC, bool, O>; +pub type DindisaltW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 4:6 - Slew Rate"] #[inline(always)] - pub fn slewrate(&self) -> SLEWRATE_R { - SLEWRATE_R::new(((self.bits >> 4) & 7) as u8) + pub fn slewrate(&self) -> SlewrateR { + SlewrateR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bit 12 - Data In Disable"] #[inline(always)] - pub fn dindis(&self) -> DINDIS_R { - DINDIS_R::new(((self.bits >> 12) & 1) != 0) + pub fn dindis(&self) -> DindisR { + DindisR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bits 20:22 - Slew Rate Alt"] #[inline(always)] - pub fn slewratealt(&self) -> SLEWRATEALT_R { - SLEWRATEALT_R::new(((self.bits >> 20) & 7) as u8) + pub fn slewratealt(&self) -> SlewratealtR { + SlewratealtR::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bit 28 - Data In Disable Alt"] #[inline(always)] - pub fn dindisalt(&self) -> DINDISALT_R { - DINDISALT_R::new(((self.bits >> 28) & 1) != 0) + pub fn dindisalt(&self) -> DindisaltR { + DindisaltR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bits 4:6 - Slew Rate"] #[inline(always)] #[must_use] - pub fn slewrate(&mut self) -> SLEWRATE_W<4> { - SLEWRATE_W::new(self) + pub fn slewrate(&mut self) -> SlewrateW { + SlewrateW::new(self, 4) } #[doc = "Bit 12 - Data In Disable"] #[inline(always)] #[must_use] - pub fn dindis(&mut self) -> DINDIS_W<12> { - DINDIS_W::new(self) + pub fn dindis(&mut self) -> DindisW { + DindisW::new(self, 12) } #[doc = "Bits 20:22 - Slew Rate Alt"] #[inline(always)] #[must_use] - pub fn slewratealt(&mut self) -> SLEWRATEALT_W<20> { - SLEWRATEALT_W::new(self) + pub fn slewratealt(&mut self) -> SlewratealtW { + SlewratealtW::new(self, 20) } #[doc = "Bit 28 - Data In Disable Alt"] #[inline(always)] #[must_use] - pub fn dindisalt(&mut self) -> DINDISALT_W<28> { - DINDISALT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dindisalt(&mut self) -> DindisaltW { + DindisaltW::new(self, 28) } } -#[doc = "Port control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portc_ctrl](index.html) module"] -pub struct PORTC_CTRL_SPEC; -impl crate::RegisterSpec for PORTC_CTRL_SPEC { +#[doc = "Port control\n\nYou can [`read`](crate::Reg::read) this register and get [`portc_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portc_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortcCtrlSpec; +impl crate::RegisterSpec for PortcCtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [portc_ctrl::R](R) reader structure"] -impl crate::Readable for PORTC_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [portc_ctrl::W](W) writer structure"] -impl crate::Writable for PORTC_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`portc_ctrl::R`](R) reader structure"] +impl crate::Readable for PortcCtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`portc_ctrl::W`](W) writer structure"] +impl crate::Writable for PortcCtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTC_CTRL to value 0x0040_0040"] -impl crate::Resettable for PORTC_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0040_0040; +impl crate::Resettable for PortcCtrlSpec { + const RESET_VALUE: u32 = 0x0040_0040; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portc_din.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portc_din.rs index 3b1cfef..f141542 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portc_din.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portc_din.rs @@ -1,37 +1,22 @@ #[doc = "Register `PORTC_DIN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DIN` reader - Data input"] -pub type DIN_R = crate::FieldReader; +pub type DinR = crate::FieldReader; impl R { #[doc = "Bits 0:9 - Data input"] #[inline(always)] - pub fn din(&self) -> DIN_R { - DIN_R::new((self.bits & 0x03ff) as u16) + pub fn din(&self) -> DinR { + DinR::new((self.bits & 0x03ff) as u16) } } -#[doc = "data in\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portc_din](index.html) module"] -pub struct PORTC_DIN_SPEC; -impl crate::RegisterSpec for PORTC_DIN_SPEC { +#[doc = "data in\n\nYou can [`read`](crate::Reg::read) this register and get [`portc_din::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortcDinSpec; +impl crate::RegisterSpec for PortcDinSpec { type Ux = u32; } -#[doc = "`read()` method returns [portc_din::R](R) reader structure"] -impl crate::Readable for PORTC_DIN_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`portc_din::R`](R) reader structure"] +impl crate::Readable for PortcDinSpec {} #[doc = "`reset()` method sets PORTC_DIN to value 0"] -impl crate::Resettable for PORTC_DIN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortcDinSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portc_dout.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portc_dout.rs index 2296c36..73ec161 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portc_dout.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portc_dout.rs @@ -1,80 +1,40 @@ #[doc = "Register `PORTC_DOUT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTC_DOUT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DOUT` reader - Data output"] -pub type DOUT_R = crate::FieldReader; +pub type DoutR = crate::FieldReader; #[doc = "Field `DOUT` writer - Data output"] -pub type DOUT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PORTC_DOUT_SPEC, u16, u16, 10, O>; +pub type DoutW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; impl R { #[doc = "Bits 0:9 - Data output"] #[inline(always)] - pub fn dout(&self) -> DOUT_R { - DOUT_R::new((self.bits & 0x03ff) as u16) + pub fn dout(&self) -> DoutR { + DoutR::new((self.bits & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:9 - Data output"] #[inline(always)] #[must_use] - pub fn dout(&mut self) -> DOUT_W<0> { - DOUT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dout(&mut self) -> DoutW { + DoutW::new(self, 0) } } -#[doc = "data out\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portc_dout](index.html) module"] -pub struct PORTC_DOUT_SPEC; -impl crate::RegisterSpec for PORTC_DOUT_SPEC { +#[doc = "data out\n\nYou can [`read`](crate::Reg::read) this register and get [`portc_dout::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portc_dout::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortcDoutSpec; +impl crate::RegisterSpec for PortcDoutSpec { type Ux = u32; } -#[doc = "`read()` method returns [portc_dout::R](R) reader structure"] -impl crate::Readable for PORTC_DOUT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [portc_dout::W](W) writer structure"] -impl crate::Writable for PORTC_DOUT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`portc_dout::R`](R) reader structure"] +impl crate::Readable for PortcDoutSpec {} +#[doc = "`write(|w| ..)` method takes [`portc_dout::W`](W) writer structure"] +impl crate::Writable for PortcDoutSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTC_DOUT to value 0"] -impl crate::Resettable for PORTC_DOUT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortcDoutSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portc_modeh.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portc_modeh.rs index a404bb9..f74032d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portc_modeh.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portc_modeh.rs @@ -1,557 +1,531 @@ #[doc = "Register `PORTC_MODEH` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTC_MODEH` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE0` reader - MODE n"] -pub type MODE0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE0_A { +pub enum Mode0 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE0_A) -> Self { + fn from(variant: Mode0) -> Self { variant as _ } } -impl MODE0_R { +impl crate::FieldSpec for Mode0 { + type Ux = u8; +} +impl crate::IsEnum for Mode0 {} +#[doc = "Field `MODE0` reader - MODE n"] +pub type Mode0R = crate::FieldReader; +impl Mode0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE0_A { + pub const fn variant(&self) -> Mode0 { match self.bits { - 0 => MODE0_A::DISABLED, - 1 => MODE0_A::INPUT, - 2 => MODE0_A::INPUTPULL, - 3 => MODE0_A::INPUTPULLFILTER, - 4 => MODE0_A::PUSHPULL, - 5 => MODE0_A::PUSHPULLALT, - 6 => MODE0_A::WIREDOR, - 7 => MODE0_A::WIREDORPULLDOWN, - 8 => MODE0_A::WIREDAND, - 9 => MODE0_A::WIREDANDFILTER, - 10 => MODE0_A::WIREDANDPULLUP, - 11 => MODE0_A::WIREDANDPULLUPFILTER, - 12 => MODE0_A::WIREDANDALT, - 13 => MODE0_A::WIREDANDALTFILTER, - 14 => MODE0_A::WIREDANDALTPULLUP, - 15 => MODE0_A::WIREDANDALTPULLUPFILTER, + 0 => Mode0::Disabled, + 1 => Mode0::Input, + 2 => Mode0::Inputpull, + 3 => Mode0::Inputpullfilter, + 4 => Mode0::Pushpull, + 5 => Mode0::Pushpullalt, + 6 => Mode0::Wiredor, + 7 => Mode0::Wiredorpulldown, + 8 => Mode0::Wiredand, + 9 => Mode0::Wiredandfilter, + 10 => Mode0::Wiredandpullup, + 11 => Mode0::Wiredandpullupfilter, + 12 => Mode0::Wiredandalt, + 13 => Mode0::Wiredandaltfilter, + 14 => Mode0::Wiredandaltpullup, + 15 => Mode0::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE0_A::DISABLED + *self == Mode0::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE0_A::INPUT + *self == Mode0::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE0_A::INPUTPULL + *self == Mode0::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE0_A::INPUTPULLFILTER + *self == Mode0::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE0_A::PUSHPULL + *self == Mode0::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE0_A::PUSHPULLALT + *self == Mode0::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE0_A::WIREDOR + *self == Mode0::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE0_A::WIREDORPULLDOWN + *self == Mode0::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE0_A::WIREDAND + *self == Mode0::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE0_A::WIREDANDFILTER + *self == Mode0::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE0_A::WIREDANDPULLUP + *self == Mode0::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE0_A::WIREDANDPULLUPFILTER + *self == Mode0::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE0_A::WIREDANDALT + *self == Mode0::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE0_A::WIREDANDALTFILTER + *self == Mode0::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE0_A::WIREDANDALTPULLUP + *self == Mode0::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE0_A::WIREDANDALTPULLUPFILTER + *self == Mode0::Wiredandaltpullupfilter } } #[doc = "Field `MODE0` writer - MODE n"] -pub type MODE0_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTC_MODEH_SPEC, u8, MODE0_A, 4, O>; -impl<'a, const O: u8> MODE0_W<'a, O> { +pub type Mode0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode0, crate::Safe>; +impl<'a, REG> Mode0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE0_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode0::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE0_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode0::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE0_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode0::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE0_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE0_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode0::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE0_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode0::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE0_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE0_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE0_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE1` reader - MODE n"] -pub type MODE1_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE1_A { +pub enum Mode1 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE1_A) -> Self { + fn from(variant: Mode1) -> Self { variant as _ } } -impl MODE1_R { +impl crate::FieldSpec for Mode1 { + type Ux = u8; +} +impl crate::IsEnum for Mode1 {} +#[doc = "Field `MODE1` reader - MODE n"] +pub type Mode1R = crate::FieldReader; +impl Mode1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE1_A { + pub const fn variant(&self) -> Mode1 { match self.bits { - 0 => MODE1_A::DISABLED, - 1 => MODE1_A::INPUT, - 2 => MODE1_A::INPUTPULL, - 3 => MODE1_A::INPUTPULLFILTER, - 4 => MODE1_A::PUSHPULL, - 5 => MODE1_A::PUSHPULLALT, - 6 => MODE1_A::WIREDOR, - 7 => MODE1_A::WIREDORPULLDOWN, - 8 => MODE1_A::WIREDAND, - 9 => MODE1_A::WIREDANDFILTER, - 10 => MODE1_A::WIREDANDPULLUP, - 11 => MODE1_A::WIREDANDPULLUPFILTER, - 12 => MODE1_A::WIREDANDALT, - 13 => MODE1_A::WIREDANDALTFILTER, - 14 => MODE1_A::WIREDANDALTPULLUP, - 15 => MODE1_A::WIREDANDALTPULLUPFILTER, + 0 => Mode1::Disabled, + 1 => Mode1::Input, + 2 => Mode1::Inputpull, + 3 => Mode1::Inputpullfilter, + 4 => Mode1::Pushpull, + 5 => Mode1::Pushpullalt, + 6 => Mode1::Wiredor, + 7 => Mode1::Wiredorpulldown, + 8 => Mode1::Wiredand, + 9 => Mode1::Wiredandfilter, + 10 => Mode1::Wiredandpullup, + 11 => Mode1::Wiredandpullupfilter, + 12 => Mode1::Wiredandalt, + 13 => Mode1::Wiredandaltfilter, + 14 => Mode1::Wiredandaltpullup, + 15 => Mode1::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE1_A::DISABLED + *self == Mode1::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE1_A::INPUT + *self == Mode1::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE1_A::INPUTPULL + *self == Mode1::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE1_A::INPUTPULLFILTER + *self == Mode1::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE1_A::PUSHPULL + *self == Mode1::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE1_A::PUSHPULLALT + *self == Mode1::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE1_A::WIREDOR + *self == Mode1::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE1_A::WIREDORPULLDOWN + *self == Mode1::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE1_A::WIREDAND + *self == Mode1::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE1_A::WIREDANDFILTER + *self == Mode1::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE1_A::WIREDANDPULLUP + *self == Mode1::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE1_A::WIREDANDPULLUPFILTER + *self == Mode1::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE1_A::WIREDANDALT + *self == Mode1::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE1_A::WIREDANDALTFILTER + *self == Mode1::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE1_A::WIREDANDALTPULLUP + *self == Mode1::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE1_A::WIREDANDALTPULLUPFILTER + *self == Mode1::Wiredandaltpullupfilter } } #[doc = "Field `MODE1` writer - MODE n"] -pub type MODE1_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTC_MODEH_SPEC, u8, MODE1_A, 4, O>; -impl<'a, const O: u8> MODE1_W<'a, O> { +pub type Mode1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode1, crate::Safe>; +impl<'a, REG> Mode1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE1_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode1::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE1_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode1::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE1_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode1::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE1_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE1_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode1::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE1_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode1::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE1_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE1_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE1_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltpullupfilter) } } impl R { #[doc = "Bits 0:3 - MODE n"] #[inline(always)] - pub fn mode0(&self) -> MODE0_R { - MODE0_R::new((self.bits & 0x0f) as u8) + pub fn mode0(&self) -> Mode0R { + Mode0R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - MODE n"] #[inline(always)] - pub fn mode1(&self) -> MODE1_R { - MODE1_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn mode1(&self) -> Mode1R { + Mode1R::new(((self.bits >> 4) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - MODE n"] #[inline(always)] #[must_use] - pub fn mode0(&mut self) -> MODE0_W<0> { - MODE0_W::new(self) + pub fn mode0(&mut self) -> Mode0W { + Mode0W::new(self, 0) } #[doc = "Bits 4:7 - MODE n"] #[inline(always)] #[must_use] - pub fn mode1(&mut self) -> MODE1_W<4> { - MODE1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn mode1(&mut self) -> Mode1W { + Mode1W::new(self, 4) } } -#[doc = "mode high\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portc_modeh](index.html) module"] -pub struct PORTC_MODEH_SPEC; -impl crate::RegisterSpec for PORTC_MODEH_SPEC { +#[doc = "mode high\n\nYou can [`read`](crate::Reg::read) this register and get [`portc_modeh::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portc_modeh::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortcModehSpec; +impl crate::RegisterSpec for PortcModehSpec { type Ux = u32; } -#[doc = "`read()` method returns [portc_modeh::R](R) reader structure"] -impl crate::Readable for PORTC_MODEH_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [portc_modeh::W](W) writer structure"] -impl crate::Writable for PORTC_MODEH_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`portc_modeh::R`](R) reader structure"] +impl crate::Readable for PortcModehSpec {} +#[doc = "`write(|w| ..)` method takes [`portc_modeh::W`](W) writer structure"] +impl crate::Writable for PortcModehSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTC_MODEH to value 0"] -impl crate::Resettable for PORTC_MODEH_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortcModehSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portc_model.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portc_model.rs index 2f6fad2..a66b973 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portc_model.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portc_model.rs @@ -1,2033 +1,2049 @@ #[doc = "Register `PORTC_MODEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTC_MODEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE0` reader - MODE n"] -pub type MODE0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE0_A { +pub enum Mode0 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE0_A) -> Self { + fn from(variant: Mode0) -> Self { variant as _ } } -impl MODE0_R { +impl crate::FieldSpec for Mode0 { + type Ux = u8; +} +impl crate::IsEnum for Mode0 {} +#[doc = "Field `MODE0` reader - MODE n"] +pub type Mode0R = crate::FieldReader; +impl Mode0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE0_A { + pub const fn variant(&self) -> Mode0 { match self.bits { - 0 => MODE0_A::DISABLED, - 1 => MODE0_A::INPUT, - 2 => MODE0_A::INPUTPULL, - 3 => MODE0_A::INPUTPULLFILTER, - 4 => MODE0_A::PUSHPULL, - 5 => MODE0_A::PUSHPULLALT, - 6 => MODE0_A::WIREDOR, - 7 => MODE0_A::WIREDORPULLDOWN, - 8 => MODE0_A::WIREDAND, - 9 => MODE0_A::WIREDANDFILTER, - 10 => MODE0_A::WIREDANDPULLUP, - 11 => MODE0_A::WIREDANDPULLUPFILTER, - 12 => MODE0_A::WIREDANDALT, - 13 => MODE0_A::WIREDANDALTFILTER, - 14 => MODE0_A::WIREDANDALTPULLUP, - 15 => MODE0_A::WIREDANDALTPULLUPFILTER, + 0 => Mode0::Disabled, + 1 => Mode0::Input, + 2 => Mode0::Inputpull, + 3 => Mode0::Inputpullfilter, + 4 => Mode0::Pushpull, + 5 => Mode0::Pushpullalt, + 6 => Mode0::Wiredor, + 7 => Mode0::Wiredorpulldown, + 8 => Mode0::Wiredand, + 9 => Mode0::Wiredandfilter, + 10 => Mode0::Wiredandpullup, + 11 => Mode0::Wiredandpullupfilter, + 12 => Mode0::Wiredandalt, + 13 => Mode0::Wiredandaltfilter, + 14 => Mode0::Wiredandaltpullup, + 15 => Mode0::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE0_A::DISABLED + *self == Mode0::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE0_A::INPUT + *self == Mode0::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE0_A::INPUTPULL + *self == Mode0::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE0_A::INPUTPULLFILTER + *self == Mode0::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE0_A::PUSHPULL + *self == Mode0::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE0_A::PUSHPULLALT + *self == Mode0::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE0_A::WIREDOR + *self == Mode0::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE0_A::WIREDORPULLDOWN + *self == Mode0::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE0_A::WIREDAND + *self == Mode0::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE0_A::WIREDANDFILTER + *self == Mode0::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE0_A::WIREDANDPULLUP + *self == Mode0::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE0_A::WIREDANDPULLUPFILTER + *self == Mode0::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE0_A::WIREDANDALT + *self == Mode0::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE0_A::WIREDANDALTFILTER + *self == Mode0::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE0_A::WIREDANDALTPULLUP + *self == Mode0::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE0_A::WIREDANDALTPULLUPFILTER + *self == Mode0::Wiredandaltpullupfilter } } #[doc = "Field `MODE0` writer - MODE n"] -pub type MODE0_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTC_MODEL_SPEC, u8, MODE0_A, 4, O>; -impl<'a, const O: u8> MODE0_W<'a, O> { +pub type Mode0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode0, crate::Safe>; +impl<'a, REG> Mode0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE0_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode0::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE0_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode0::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE0_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode0::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE0_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE0_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode0::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE0_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode0::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE0_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE0_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE0_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE1` reader - MODE n"] -pub type MODE1_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE1_A { +pub enum Mode1 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE1_A) -> Self { + fn from(variant: Mode1) -> Self { variant as _ } } -impl MODE1_R { +impl crate::FieldSpec for Mode1 { + type Ux = u8; +} +impl crate::IsEnum for Mode1 {} +#[doc = "Field `MODE1` reader - MODE n"] +pub type Mode1R = crate::FieldReader; +impl Mode1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE1_A { + pub const fn variant(&self) -> Mode1 { match self.bits { - 0 => MODE1_A::DISABLED, - 1 => MODE1_A::INPUT, - 2 => MODE1_A::INPUTPULL, - 3 => MODE1_A::INPUTPULLFILTER, - 4 => MODE1_A::PUSHPULL, - 5 => MODE1_A::PUSHPULLALT, - 6 => MODE1_A::WIREDOR, - 7 => MODE1_A::WIREDORPULLDOWN, - 8 => MODE1_A::WIREDAND, - 9 => MODE1_A::WIREDANDFILTER, - 10 => MODE1_A::WIREDANDPULLUP, - 11 => MODE1_A::WIREDANDPULLUPFILTER, - 12 => MODE1_A::WIREDANDALT, - 13 => MODE1_A::WIREDANDALTFILTER, - 14 => MODE1_A::WIREDANDALTPULLUP, - 15 => MODE1_A::WIREDANDALTPULLUPFILTER, + 0 => Mode1::Disabled, + 1 => Mode1::Input, + 2 => Mode1::Inputpull, + 3 => Mode1::Inputpullfilter, + 4 => Mode1::Pushpull, + 5 => Mode1::Pushpullalt, + 6 => Mode1::Wiredor, + 7 => Mode1::Wiredorpulldown, + 8 => Mode1::Wiredand, + 9 => Mode1::Wiredandfilter, + 10 => Mode1::Wiredandpullup, + 11 => Mode1::Wiredandpullupfilter, + 12 => Mode1::Wiredandalt, + 13 => Mode1::Wiredandaltfilter, + 14 => Mode1::Wiredandaltpullup, + 15 => Mode1::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE1_A::DISABLED + *self == Mode1::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE1_A::INPUT + *self == Mode1::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE1_A::INPUTPULL + *self == Mode1::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE1_A::INPUTPULLFILTER + *self == Mode1::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE1_A::PUSHPULL + *self == Mode1::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE1_A::PUSHPULLALT + *self == Mode1::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE1_A::WIREDOR + *self == Mode1::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE1_A::WIREDORPULLDOWN + *self == Mode1::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE1_A::WIREDAND + *self == Mode1::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE1_A::WIREDANDFILTER + *self == Mode1::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE1_A::WIREDANDPULLUP + *self == Mode1::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE1_A::WIREDANDPULLUPFILTER + *self == Mode1::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE1_A::WIREDANDALT + *self == Mode1::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE1_A::WIREDANDALTFILTER + *self == Mode1::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE1_A::WIREDANDALTPULLUP + *self == Mode1::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE1_A::WIREDANDALTPULLUPFILTER + *self == Mode1::Wiredandaltpullupfilter } } #[doc = "Field `MODE1` writer - MODE n"] -pub type MODE1_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTC_MODEL_SPEC, u8, MODE1_A, 4, O>; -impl<'a, const O: u8> MODE1_W<'a, O> { +pub type Mode1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode1, crate::Safe>; +impl<'a, REG> Mode1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE1_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode1::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE1_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode1::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE1_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode1::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE1_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE1_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode1::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE1_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode1::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE1_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE1_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE1_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE2` reader - MODE n"] -pub type MODE2_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE2_A { +pub enum Mode2 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE2_A) -> Self { + fn from(variant: Mode2) -> Self { variant as _ } } -impl MODE2_R { +impl crate::FieldSpec for Mode2 { + type Ux = u8; +} +impl crate::IsEnum for Mode2 {} +#[doc = "Field `MODE2` reader - MODE n"] +pub type Mode2R = crate::FieldReader; +impl Mode2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE2_A { + pub const fn variant(&self) -> Mode2 { match self.bits { - 0 => MODE2_A::DISABLED, - 1 => MODE2_A::INPUT, - 2 => MODE2_A::INPUTPULL, - 3 => MODE2_A::INPUTPULLFILTER, - 4 => MODE2_A::PUSHPULL, - 5 => MODE2_A::PUSHPULLALT, - 6 => MODE2_A::WIREDOR, - 7 => MODE2_A::WIREDORPULLDOWN, - 8 => MODE2_A::WIREDAND, - 9 => MODE2_A::WIREDANDFILTER, - 10 => MODE2_A::WIREDANDPULLUP, - 11 => MODE2_A::WIREDANDPULLUPFILTER, - 12 => MODE2_A::WIREDANDALT, - 13 => MODE2_A::WIREDANDALTFILTER, - 14 => MODE2_A::WIREDANDALTPULLUP, - 15 => MODE2_A::WIREDANDALTPULLUPFILTER, + 0 => Mode2::Disabled, + 1 => Mode2::Input, + 2 => Mode2::Inputpull, + 3 => Mode2::Inputpullfilter, + 4 => Mode2::Pushpull, + 5 => Mode2::Pushpullalt, + 6 => Mode2::Wiredor, + 7 => Mode2::Wiredorpulldown, + 8 => Mode2::Wiredand, + 9 => Mode2::Wiredandfilter, + 10 => Mode2::Wiredandpullup, + 11 => Mode2::Wiredandpullupfilter, + 12 => Mode2::Wiredandalt, + 13 => Mode2::Wiredandaltfilter, + 14 => Mode2::Wiredandaltpullup, + 15 => Mode2::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE2_A::DISABLED + *self == Mode2::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE2_A::INPUT + *self == Mode2::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE2_A::INPUTPULL + *self == Mode2::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE2_A::INPUTPULLFILTER + *self == Mode2::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE2_A::PUSHPULL + *self == Mode2::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE2_A::PUSHPULLALT + *self == Mode2::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE2_A::WIREDOR + *self == Mode2::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE2_A::WIREDORPULLDOWN + *self == Mode2::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE2_A::WIREDAND + *self == Mode2::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE2_A::WIREDANDFILTER + *self == Mode2::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE2_A::WIREDANDPULLUP + *self == Mode2::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE2_A::WIREDANDPULLUPFILTER + *self == Mode2::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE2_A::WIREDANDALT + *self == Mode2::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE2_A::WIREDANDALTFILTER + *self == Mode2::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE2_A::WIREDANDALTPULLUP + *self == Mode2::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE2_A::WIREDANDALTPULLUPFILTER + *self == Mode2::Wiredandaltpullupfilter } } #[doc = "Field `MODE2` writer - MODE n"] -pub type MODE2_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTC_MODEL_SPEC, u8, MODE2_A, 4, O>; -impl<'a, const O: u8> MODE2_W<'a, O> { +pub type Mode2W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode2, crate::Safe>; +impl<'a, REG> Mode2W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE2_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode2::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE2_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode2::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE2_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode2::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE2_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE2_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode2::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE2_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode2::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE2_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE2_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE2_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE3` reader - MODE n"] -pub type MODE3_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE3_A { +pub enum Mode3 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE3_A) -> Self { + fn from(variant: Mode3) -> Self { variant as _ } } -impl MODE3_R { +impl crate::FieldSpec for Mode3 { + type Ux = u8; +} +impl crate::IsEnum for Mode3 {} +#[doc = "Field `MODE3` reader - MODE n"] +pub type Mode3R = crate::FieldReader; +impl Mode3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE3_A { + pub const fn variant(&self) -> Mode3 { match self.bits { - 0 => MODE3_A::DISABLED, - 1 => MODE3_A::INPUT, - 2 => MODE3_A::INPUTPULL, - 3 => MODE3_A::INPUTPULLFILTER, - 4 => MODE3_A::PUSHPULL, - 5 => MODE3_A::PUSHPULLALT, - 6 => MODE3_A::WIREDOR, - 7 => MODE3_A::WIREDORPULLDOWN, - 8 => MODE3_A::WIREDAND, - 9 => MODE3_A::WIREDANDFILTER, - 10 => MODE3_A::WIREDANDPULLUP, - 11 => MODE3_A::WIREDANDPULLUPFILTER, - 12 => MODE3_A::WIREDANDALT, - 13 => MODE3_A::WIREDANDALTFILTER, - 14 => MODE3_A::WIREDANDALTPULLUP, - 15 => MODE3_A::WIREDANDALTPULLUPFILTER, + 0 => Mode3::Disabled, + 1 => Mode3::Input, + 2 => Mode3::Inputpull, + 3 => Mode3::Inputpullfilter, + 4 => Mode3::Pushpull, + 5 => Mode3::Pushpullalt, + 6 => Mode3::Wiredor, + 7 => Mode3::Wiredorpulldown, + 8 => Mode3::Wiredand, + 9 => Mode3::Wiredandfilter, + 10 => Mode3::Wiredandpullup, + 11 => Mode3::Wiredandpullupfilter, + 12 => Mode3::Wiredandalt, + 13 => Mode3::Wiredandaltfilter, + 14 => Mode3::Wiredandaltpullup, + 15 => Mode3::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE3_A::DISABLED + *self == Mode3::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE3_A::INPUT + *self == Mode3::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE3_A::INPUTPULL + *self == Mode3::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE3_A::INPUTPULLFILTER + *self == Mode3::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE3_A::PUSHPULL + *self == Mode3::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE3_A::PUSHPULLALT + *self == Mode3::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE3_A::WIREDOR + *self == Mode3::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE3_A::WIREDORPULLDOWN + *self == Mode3::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE3_A::WIREDAND + *self == Mode3::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE3_A::WIREDANDFILTER + *self == Mode3::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE3_A::WIREDANDPULLUP + *self == Mode3::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE3_A::WIREDANDPULLUPFILTER + *self == Mode3::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE3_A::WIREDANDALT + *self == Mode3::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE3_A::WIREDANDALTFILTER + *self == Mode3::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE3_A::WIREDANDALTPULLUP + *self == Mode3::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE3_A::WIREDANDALTPULLUPFILTER + *self == Mode3::Wiredandaltpullupfilter } } #[doc = "Field `MODE3` writer - MODE n"] -pub type MODE3_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTC_MODEL_SPEC, u8, MODE3_A, 4, O>; -impl<'a, const O: u8> MODE3_W<'a, O> { +pub type Mode3W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode3, crate::Safe>; +impl<'a, REG> Mode3W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE3_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode3::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE3_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode3::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE3_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode3::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE3_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE3_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode3::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE3_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode3::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE3_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE3_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE3_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE4` reader - MODE n"] -pub type MODE4_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE4_A { +pub enum Mode4 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE4_A) -> Self { + fn from(variant: Mode4) -> Self { variant as _ } } -impl MODE4_R { +impl crate::FieldSpec for Mode4 { + type Ux = u8; +} +impl crate::IsEnum for Mode4 {} +#[doc = "Field `MODE4` reader - MODE n"] +pub type Mode4R = crate::FieldReader; +impl Mode4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE4_A { + pub const fn variant(&self) -> Mode4 { match self.bits { - 0 => MODE4_A::DISABLED, - 1 => MODE4_A::INPUT, - 2 => MODE4_A::INPUTPULL, - 3 => MODE4_A::INPUTPULLFILTER, - 4 => MODE4_A::PUSHPULL, - 5 => MODE4_A::PUSHPULLALT, - 6 => MODE4_A::WIREDOR, - 7 => MODE4_A::WIREDORPULLDOWN, - 8 => MODE4_A::WIREDAND, - 9 => MODE4_A::WIREDANDFILTER, - 10 => MODE4_A::WIREDANDPULLUP, - 11 => MODE4_A::WIREDANDPULLUPFILTER, - 12 => MODE4_A::WIREDANDALT, - 13 => MODE4_A::WIREDANDALTFILTER, - 14 => MODE4_A::WIREDANDALTPULLUP, - 15 => MODE4_A::WIREDANDALTPULLUPFILTER, + 0 => Mode4::Disabled, + 1 => Mode4::Input, + 2 => Mode4::Inputpull, + 3 => Mode4::Inputpullfilter, + 4 => Mode4::Pushpull, + 5 => Mode4::Pushpullalt, + 6 => Mode4::Wiredor, + 7 => Mode4::Wiredorpulldown, + 8 => Mode4::Wiredand, + 9 => Mode4::Wiredandfilter, + 10 => Mode4::Wiredandpullup, + 11 => Mode4::Wiredandpullupfilter, + 12 => Mode4::Wiredandalt, + 13 => Mode4::Wiredandaltfilter, + 14 => Mode4::Wiredandaltpullup, + 15 => Mode4::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE4_A::DISABLED + *self == Mode4::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE4_A::INPUT + *self == Mode4::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE4_A::INPUTPULL + *self == Mode4::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE4_A::INPUTPULLFILTER + *self == Mode4::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE4_A::PUSHPULL + *self == Mode4::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE4_A::PUSHPULLALT + *self == Mode4::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE4_A::WIREDOR + *self == Mode4::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE4_A::WIREDORPULLDOWN + *self == Mode4::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE4_A::WIREDAND + *self == Mode4::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE4_A::WIREDANDFILTER + *self == Mode4::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE4_A::WIREDANDPULLUP + *self == Mode4::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE4_A::WIREDANDPULLUPFILTER + *self == Mode4::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE4_A::WIREDANDALT + *self == Mode4::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE4_A::WIREDANDALTFILTER + *self == Mode4::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE4_A::WIREDANDALTPULLUP + *self == Mode4::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE4_A::WIREDANDALTPULLUPFILTER + *self == Mode4::Wiredandaltpullupfilter } } #[doc = "Field `MODE4` writer - MODE n"] -pub type MODE4_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTC_MODEL_SPEC, u8, MODE4_A, 4, O>; -impl<'a, const O: u8> MODE4_W<'a, O> { +pub type Mode4W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode4, crate::Safe>; +impl<'a, REG> Mode4W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE4_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode4::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE4_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode4::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE4_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode4::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE4_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE4_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode4::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE4_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode4::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE4_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE4_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE4_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE5` reader - MODE n"] -pub type MODE5_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE5_A { +pub enum Mode5 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE5_A) -> Self { + fn from(variant: Mode5) -> Self { variant as _ } } -impl MODE5_R { +impl crate::FieldSpec for Mode5 { + type Ux = u8; +} +impl crate::IsEnum for Mode5 {} +#[doc = "Field `MODE5` reader - MODE n"] +pub type Mode5R = crate::FieldReader; +impl Mode5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE5_A { + pub const fn variant(&self) -> Mode5 { match self.bits { - 0 => MODE5_A::DISABLED, - 1 => MODE5_A::INPUT, - 2 => MODE5_A::INPUTPULL, - 3 => MODE5_A::INPUTPULLFILTER, - 4 => MODE5_A::PUSHPULL, - 5 => MODE5_A::PUSHPULLALT, - 6 => MODE5_A::WIREDOR, - 7 => MODE5_A::WIREDORPULLDOWN, - 8 => MODE5_A::WIREDAND, - 9 => MODE5_A::WIREDANDFILTER, - 10 => MODE5_A::WIREDANDPULLUP, - 11 => MODE5_A::WIREDANDPULLUPFILTER, - 12 => MODE5_A::WIREDANDALT, - 13 => MODE5_A::WIREDANDALTFILTER, - 14 => MODE5_A::WIREDANDALTPULLUP, - 15 => MODE5_A::WIREDANDALTPULLUPFILTER, + 0 => Mode5::Disabled, + 1 => Mode5::Input, + 2 => Mode5::Inputpull, + 3 => Mode5::Inputpullfilter, + 4 => Mode5::Pushpull, + 5 => Mode5::Pushpullalt, + 6 => Mode5::Wiredor, + 7 => Mode5::Wiredorpulldown, + 8 => Mode5::Wiredand, + 9 => Mode5::Wiredandfilter, + 10 => Mode5::Wiredandpullup, + 11 => Mode5::Wiredandpullupfilter, + 12 => Mode5::Wiredandalt, + 13 => Mode5::Wiredandaltfilter, + 14 => Mode5::Wiredandaltpullup, + 15 => Mode5::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE5_A::DISABLED + *self == Mode5::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE5_A::INPUT + *self == Mode5::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE5_A::INPUTPULL + *self == Mode5::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE5_A::INPUTPULLFILTER + *self == Mode5::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE5_A::PUSHPULL + *self == Mode5::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE5_A::PUSHPULLALT + *self == Mode5::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE5_A::WIREDOR + *self == Mode5::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE5_A::WIREDORPULLDOWN + *self == Mode5::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE5_A::WIREDAND + *self == Mode5::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE5_A::WIREDANDFILTER + *self == Mode5::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE5_A::WIREDANDPULLUP + *self == Mode5::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE5_A::WIREDANDPULLUPFILTER + *self == Mode5::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE5_A::WIREDANDALT + *self == Mode5::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE5_A::WIREDANDALTFILTER + *self == Mode5::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE5_A::WIREDANDALTPULLUP + *self == Mode5::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE5_A::WIREDANDALTPULLUPFILTER + *self == Mode5::Wiredandaltpullupfilter } } #[doc = "Field `MODE5` writer - MODE n"] -pub type MODE5_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTC_MODEL_SPEC, u8, MODE5_A, 4, O>; -impl<'a, const O: u8> MODE5_W<'a, O> { +pub type Mode5W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode5, crate::Safe>; +impl<'a, REG> Mode5W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE5_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode5::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE5_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode5::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE5_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode5::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE5_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE5_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode5::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE5_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode5::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE5_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE5_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE5_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE6` reader - MODE n"] -pub type MODE6_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE6_A { +pub enum Mode6 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE6_A) -> Self { + fn from(variant: Mode6) -> Self { variant as _ } } -impl MODE6_R { +impl crate::FieldSpec for Mode6 { + type Ux = u8; +} +impl crate::IsEnum for Mode6 {} +#[doc = "Field `MODE6` reader - MODE n"] +pub type Mode6R = crate::FieldReader; +impl Mode6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE6_A { + pub const fn variant(&self) -> Mode6 { match self.bits { - 0 => MODE6_A::DISABLED, - 1 => MODE6_A::INPUT, - 2 => MODE6_A::INPUTPULL, - 3 => MODE6_A::INPUTPULLFILTER, - 4 => MODE6_A::PUSHPULL, - 5 => MODE6_A::PUSHPULLALT, - 6 => MODE6_A::WIREDOR, - 7 => MODE6_A::WIREDORPULLDOWN, - 8 => MODE6_A::WIREDAND, - 9 => MODE6_A::WIREDANDFILTER, - 10 => MODE6_A::WIREDANDPULLUP, - 11 => MODE6_A::WIREDANDPULLUPFILTER, - 12 => MODE6_A::WIREDANDALT, - 13 => MODE6_A::WIREDANDALTFILTER, - 14 => MODE6_A::WIREDANDALTPULLUP, - 15 => MODE6_A::WIREDANDALTPULLUPFILTER, + 0 => Mode6::Disabled, + 1 => Mode6::Input, + 2 => Mode6::Inputpull, + 3 => Mode6::Inputpullfilter, + 4 => Mode6::Pushpull, + 5 => Mode6::Pushpullalt, + 6 => Mode6::Wiredor, + 7 => Mode6::Wiredorpulldown, + 8 => Mode6::Wiredand, + 9 => Mode6::Wiredandfilter, + 10 => Mode6::Wiredandpullup, + 11 => Mode6::Wiredandpullupfilter, + 12 => Mode6::Wiredandalt, + 13 => Mode6::Wiredandaltfilter, + 14 => Mode6::Wiredandaltpullup, + 15 => Mode6::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE6_A::DISABLED + *self == Mode6::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE6_A::INPUT + *self == Mode6::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE6_A::INPUTPULL + *self == Mode6::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE6_A::INPUTPULLFILTER + *self == Mode6::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE6_A::PUSHPULL + *self == Mode6::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE6_A::PUSHPULLALT + *self == Mode6::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE6_A::WIREDOR + *self == Mode6::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE6_A::WIREDORPULLDOWN + *self == Mode6::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE6_A::WIREDAND + *self == Mode6::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE6_A::WIREDANDFILTER + *self == Mode6::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE6_A::WIREDANDPULLUP + *self == Mode6::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE6_A::WIREDANDPULLUPFILTER + *self == Mode6::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE6_A::WIREDANDALT + *self == Mode6::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE6_A::WIREDANDALTFILTER + *self == Mode6::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE6_A::WIREDANDALTPULLUP + *self == Mode6::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE6_A::WIREDANDALTPULLUPFILTER + *self == Mode6::Wiredandaltpullupfilter } } #[doc = "Field `MODE6` writer - MODE n"] -pub type MODE6_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTC_MODEL_SPEC, u8, MODE6_A, 4, O>; -impl<'a, const O: u8> MODE6_W<'a, O> { +pub type Mode6W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode6, crate::Safe>; +impl<'a, REG> Mode6W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE6_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode6::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE6_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode6::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE6_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode6::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE6_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE6_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode6::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE6_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode6::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE6_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE6_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE6_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE7` reader - MODE n"] -pub type MODE7_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE7_A { +pub enum Mode7 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE7_A) -> Self { + fn from(variant: Mode7) -> Self { variant as _ } } -impl MODE7_R { +impl crate::FieldSpec for Mode7 { + type Ux = u8; +} +impl crate::IsEnum for Mode7 {} +#[doc = "Field `MODE7` reader - MODE n"] +pub type Mode7R = crate::FieldReader; +impl Mode7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE7_A { + pub const fn variant(&self) -> Mode7 { match self.bits { - 0 => MODE7_A::DISABLED, - 1 => MODE7_A::INPUT, - 2 => MODE7_A::INPUTPULL, - 3 => MODE7_A::INPUTPULLFILTER, - 4 => MODE7_A::PUSHPULL, - 5 => MODE7_A::PUSHPULLALT, - 6 => MODE7_A::WIREDOR, - 7 => MODE7_A::WIREDORPULLDOWN, - 8 => MODE7_A::WIREDAND, - 9 => MODE7_A::WIREDANDFILTER, - 10 => MODE7_A::WIREDANDPULLUP, - 11 => MODE7_A::WIREDANDPULLUPFILTER, - 12 => MODE7_A::WIREDANDALT, - 13 => MODE7_A::WIREDANDALTFILTER, - 14 => MODE7_A::WIREDANDALTPULLUP, - 15 => MODE7_A::WIREDANDALTPULLUPFILTER, + 0 => Mode7::Disabled, + 1 => Mode7::Input, + 2 => Mode7::Inputpull, + 3 => Mode7::Inputpullfilter, + 4 => Mode7::Pushpull, + 5 => Mode7::Pushpullalt, + 6 => Mode7::Wiredor, + 7 => Mode7::Wiredorpulldown, + 8 => Mode7::Wiredand, + 9 => Mode7::Wiredandfilter, + 10 => Mode7::Wiredandpullup, + 11 => Mode7::Wiredandpullupfilter, + 12 => Mode7::Wiredandalt, + 13 => Mode7::Wiredandaltfilter, + 14 => Mode7::Wiredandaltpullup, + 15 => Mode7::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE7_A::DISABLED + *self == Mode7::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE7_A::INPUT + *self == Mode7::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE7_A::INPUTPULL + *self == Mode7::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE7_A::INPUTPULLFILTER + *self == Mode7::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE7_A::PUSHPULL + *self == Mode7::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE7_A::PUSHPULLALT + *self == Mode7::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE7_A::WIREDOR + *self == Mode7::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE7_A::WIREDORPULLDOWN + *self == Mode7::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE7_A::WIREDAND + *self == Mode7::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE7_A::WIREDANDFILTER + *self == Mode7::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE7_A::WIREDANDPULLUP + *self == Mode7::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE7_A::WIREDANDPULLUPFILTER + *self == Mode7::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE7_A::WIREDANDALT + *self == Mode7::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE7_A::WIREDANDALTFILTER + *self == Mode7::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE7_A::WIREDANDALTPULLUP + *self == Mode7::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE7_A::WIREDANDALTPULLUPFILTER + *self == Mode7::Wiredandaltpullupfilter } } #[doc = "Field `MODE7` writer - MODE n"] -pub type MODE7_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTC_MODEL_SPEC, u8, MODE7_A, 4, O>; -impl<'a, const O: u8> MODE7_W<'a, O> { +pub type Mode7W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode7, crate::Safe>; +impl<'a, REG> Mode7W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE7_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode7::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE7_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode7::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE7_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode7::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE7_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode7::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE7_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode7::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE7_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode7::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE7_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE7_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE7_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandaltpullupfilter) } } impl R { #[doc = "Bits 0:3 - MODE n"] #[inline(always)] - pub fn mode0(&self) -> MODE0_R { - MODE0_R::new((self.bits & 0x0f) as u8) + pub fn mode0(&self) -> Mode0R { + Mode0R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - MODE n"] #[inline(always)] - pub fn mode1(&self) -> MODE1_R { - MODE1_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn mode1(&self) -> Mode1R { + Mode1R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - MODE n"] #[inline(always)] - pub fn mode2(&self) -> MODE2_R { - MODE2_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn mode2(&self) -> Mode2R { + Mode2R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - MODE n"] #[inline(always)] - pub fn mode3(&self) -> MODE3_R { - MODE3_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn mode3(&self) -> Mode3R { + Mode3R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:19 - MODE n"] #[inline(always)] - pub fn mode4(&self) -> MODE4_R { - MODE4_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn mode4(&self) -> Mode4R { + Mode4R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:23 - MODE n"] #[inline(always)] - pub fn mode5(&self) -> MODE5_R { - MODE5_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn mode5(&self) -> Mode5R { + Mode5R::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:27 - MODE n"] #[inline(always)] - pub fn mode6(&self) -> MODE6_R { - MODE6_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn mode6(&self) -> Mode6R { + Mode6R::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 28:31 - MODE n"] #[inline(always)] - pub fn mode7(&self) -> MODE7_R { - MODE7_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn mode7(&self) -> Mode7R { + Mode7R::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - MODE n"] #[inline(always)] #[must_use] - pub fn mode0(&mut self) -> MODE0_W<0> { - MODE0_W::new(self) + pub fn mode0(&mut self) -> Mode0W { + Mode0W::new(self, 0) } #[doc = "Bits 4:7 - MODE n"] #[inline(always)] #[must_use] - pub fn mode1(&mut self) -> MODE1_W<4> { - MODE1_W::new(self) + pub fn mode1(&mut self) -> Mode1W { + Mode1W::new(self, 4) } #[doc = "Bits 8:11 - MODE n"] #[inline(always)] #[must_use] - pub fn mode2(&mut self) -> MODE2_W<8> { - MODE2_W::new(self) + pub fn mode2(&mut self) -> Mode2W { + Mode2W::new(self, 8) } #[doc = "Bits 12:15 - MODE n"] #[inline(always)] #[must_use] - pub fn mode3(&mut self) -> MODE3_W<12> { - MODE3_W::new(self) + pub fn mode3(&mut self) -> Mode3W { + Mode3W::new(self, 12) } #[doc = "Bits 16:19 - MODE n"] #[inline(always)] #[must_use] - pub fn mode4(&mut self) -> MODE4_W<16> { - MODE4_W::new(self) + pub fn mode4(&mut self) -> Mode4W { + Mode4W::new(self, 16) } #[doc = "Bits 20:23 - MODE n"] #[inline(always)] #[must_use] - pub fn mode5(&mut self) -> MODE5_W<20> { - MODE5_W::new(self) + pub fn mode5(&mut self) -> Mode5W { + Mode5W::new(self, 20) } #[doc = "Bits 24:27 - MODE n"] #[inline(always)] #[must_use] - pub fn mode6(&mut self) -> MODE6_W<24> { - MODE6_W::new(self) + pub fn mode6(&mut self) -> Mode6W { + Mode6W::new(self, 24) } #[doc = "Bits 28:31 - MODE n"] #[inline(always)] #[must_use] - pub fn mode7(&mut self) -> MODE7_W<28> { - MODE7_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn mode7(&mut self) -> Mode7W { + Mode7W::new(self, 28) } } -#[doc = "mode low\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portc_model](index.html) module"] -pub struct PORTC_MODEL_SPEC; -impl crate::RegisterSpec for PORTC_MODEL_SPEC { +#[doc = "mode low\n\nYou can [`read`](crate::Reg::read) this register and get [`portc_model::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portc_model::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortcModelSpec; +impl crate::RegisterSpec for PortcModelSpec { type Ux = u32; } -#[doc = "`read()` method returns [portc_model::R](R) reader structure"] -impl crate::Readable for PORTC_MODEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [portc_model::W](W) writer structure"] -impl crate::Writable for PORTC_MODEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`portc_model::R`](R) reader structure"] +impl crate::Readable for PortcModelSpec {} +#[doc = "`write(|w| ..)` method takes [`portc_model::W`](W) writer structure"] +impl crate::Writable for PortcModelSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTC_MODEL to value 0"] -impl crate::Resettable for PORTC_MODEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortcModelSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portd_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portd_ctrl.rs index 28b6bb0..c50fe69 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portd_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portd_ctrl.rs @@ -1,126 +1,85 @@ #[doc = "Register `PORTD_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTD_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SLEWRATE` reader - Slew Rate"] -pub type SLEWRATE_R = crate::FieldReader; +pub type SlewrateR = crate::FieldReader; #[doc = "Field `SLEWRATE` writer - Slew Rate"] -pub type SLEWRATE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PORTD_CTRL_SPEC, u8, u8, 3, O>; +pub type SlewrateW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `DINDIS` reader - Data In Disable"] -pub type DINDIS_R = crate::BitReader; +pub type DindisR = crate::BitReader; #[doc = "Field `DINDIS` writer - Data In Disable"] -pub type DINDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PORTD_CTRL_SPEC, bool, O>; +pub type DindisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SLEWRATEALT` reader - Slew Rate Alt"] -pub type SLEWRATEALT_R = crate::FieldReader; +pub type SlewratealtR = crate::FieldReader; #[doc = "Field `SLEWRATEALT` writer - Slew Rate Alt"] -pub type SLEWRATEALT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PORTD_CTRL_SPEC, u8, u8, 3, O>; +pub type SlewratealtW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `DINDISALT` reader - Data In Disable Alt"] -pub type DINDISALT_R = crate::BitReader; +pub type DindisaltR = crate::BitReader; #[doc = "Field `DINDISALT` writer - Data In Disable Alt"] -pub type DINDISALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, PORTD_CTRL_SPEC, bool, O>; +pub type DindisaltW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 4:6 - Slew Rate"] #[inline(always)] - pub fn slewrate(&self) -> SLEWRATE_R { - SLEWRATE_R::new(((self.bits >> 4) & 7) as u8) + pub fn slewrate(&self) -> SlewrateR { + SlewrateR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bit 12 - Data In Disable"] #[inline(always)] - pub fn dindis(&self) -> DINDIS_R { - DINDIS_R::new(((self.bits >> 12) & 1) != 0) + pub fn dindis(&self) -> DindisR { + DindisR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bits 20:22 - Slew Rate Alt"] #[inline(always)] - pub fn slewratealt(&self) -> SLEWRATEALT_R { - SLEWRATEALT_R::new(((self.bits >> 20) & 7) as u8) + pub fn slewratealt(&self) -> SlewratealtR { + SlewratealtR::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bit 28 - Data In Disable Alt"] #[inline(always)] - pub fn dindisalt(&self) -> DINDISALT_R { - DINDISALT_R::new(((self.bits >> 28) & 1) != 0) + pub fn dindisalt(&self) -> DindisaltR { + DindisaltR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bits 4:6 - Slew Rate"] #[inline(always)] #[must_use] - pub fn slewrate(&mut self) -> SLEWRATE_W<4> { - SLEWRATE_W::new(self) + pub fn slewrate(&mut self) -> SlewrateW { + SlewrateW::new(self, 4) } #[doc = "Bit 12 - Data In Disable"] #[inline(always)] #[must_use] - pub fn dindis(&mut self) -> DINDIS_W<12> { - DINDIS_W::new(self) + pub fn dindis(&mut self) -> DindisW { + DindisW::new(self, 12) } #[doc = "Bits 20:22 - Slew Rate Alt"] #[inline(always)] #[must_use] - pub fn slewratealt(&mut self) -> SLEWRATEALT_W<20> { - SLEWRATEALT_W::new(self) + pub fn slewratealt(&mut self) -> SlewratealtW { + SlewratealtW::new(self, 20) } #[doc = "Bit 28 - Data In Disable Alt"] #[inline(always)] #[must_use] - pub fn dindisalt(&mut self) -> DINDISALT_W<28> { - DINDISALT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dindisalt(&mut self) -> DindisaltW { + DindisaltW::new(self, 28) } } -#[doc = "Port control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portd_ctrl](index.html) module"] -pub struct PORTD_CTRL_SPEC; -impl crate::RegisterSpec for PORTD_CTRL_SPEC { +#[doc = "Port control\n\nYou can [`read`](crate::Reg::read) this register and get [`portd_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portd_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortdCtrlSpec; +impl crate::RegisterSpec for PortdCtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [portd_ctrl::R](R) reader structure"] -impl crate::Readable for PORTD_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [portd_ctrl::W](W) writer structure"] -impl crate::Writable for PORTD_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`portd_ctrl::R`](R) reader structure"] +impl crate::Readable for PortdCtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`portd_ctrl::W`](W) writer structure"] +impl crate::Writable for PortdCtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTD_CTRL to value 0x0040_0040"] -impl crate::Resettable for PORTD_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0040_0040; +impl crate::Resettable for PortdCtrlSpec { + const RESET_VALUE: u32 = 0x0040_0040; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portd_din.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portd_din.rs index 8eb4acd..7d67bd5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portd_din.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portd_din.rs @@ -1,37 +1,22 @@ #[doc = "Register `PORTD_DIN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DIN` reader - Data input"] -pub type DIN_R = crate::FieldReader; +pub type DinR = crate::FieldReader; impl R { #[doc = "Bits 0:5 - Data input"] #[inline(always)] - pub fn din(&self) -> DIN_R { - DIN_R::new((self.bits & 0x3f) as u8) + pub fn din(&self) -> DinR { + DinR::new((self.bits & 0x3f) as u8) } } -#[doc = "data in\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portd_din](index.html) module"] -pub struct PORTD_DIN_SPEC; -impl crate::RegisterSpec for PORTD_DIN_SPEC { +#[doc = "data in\n\nYou can [`read`](crate::Reg::read) this register and get [`portd_din::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortdDinSpec; +impl crate::RegisterSpec for PortdDinSpec { type Ux = u32; } -#[doc = "`read()` method returns [portd_din::R](R) reader structure"] -impl crate::Readable for PORTD_DIN_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`portd_din::R`](R) reader structure"] +impl crate::Readable for PortdDinSpec {} #[doc = "`reset()` method sets PORTD_DIN to value 0"] -impl crate::Resettable for PORTD_DIN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortdDinSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portd_dout.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portd_dout.rs index dbca637..4c08e8b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portd_dout.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portd_dout.rs @@ -1,80 +1,40 @@ #[doc = "Register `PORTD_DOUT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTD_DOUT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DOUT` reader - Data output"] -pub type DOUT_R = crate::FieldReader; +pub type DoutR = crate::FieldReader; #[doc = "Field `DOUT` writer - Data output"] -pub type DOUT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PORTD_DOUT_SPEC, u8, u8, 6, O>; +pub type DoutW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:5 - Data output"] #[inline(always)] - pub fn dout(&self) -> DOUT_R { - DOUT_R::new((self.bits & 0x3f) as u8) + pub fn dout(&self) -> DoutR { + DoutR::new((self.bits & 0x3f) as u8) } } impl W { #[doc = "Bits 0:5 - Data output"] #[inline(always)] #[must_use] - pub fn dout(&mut self) -> DOUT_W<0> { - DOUT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dout(&mut self) -> DoutW { + DoutW::new(self, 0) } } -#[doc = "data out\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portd_dout](index.html) module"] -pub struct PORTD_DOUT_SPEC; -impl crate::RegisterSpec for PORTD_DOUT_SPEC { +#[doc = "data out\n\nYou can [`read`](crate::Reg::read) this register and get [`portd_dout::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portd_dout::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortdDoutSpec; +impl crate::RegisterSpec for PortdDoutSpec { type Ux = u32; } -#[doc = "`read()` method returns [portd_dout::R](R) reader structure"] -impl crate::Readable for PORTD_DOUT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [portd_dout::W](W) writer structure"] -impl crate::Writable for PORTD_DOUT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`portd_dout::R`](R) reader structure"] +impl crate::Readable for PortdDoutSpec {} +#[doc = "`write(|w| ..)` method takes [`portd_dout::W`](W) writer structure"] +impl crate::Writable for PortdDoutSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTD_DOUT to value 0"] -impl crate::Resettable for PORTD_DOUT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortdDoutSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portd_model.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portd_model.rs index 21adf8e..66c5941 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portd_model.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/portd_model.rs @@ -1,1541 +1,1543 @@ #[doc = "Register `PORTD_MODEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTD_MODEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE0` reader - MODE n"] -pub type MODE0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE0_A { +pub enum Mode0 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE0_A) -> Self { + fn from(variant: Mode0) -> Self { variant as _ } } -impl MODE0_R { +impl crate::FieldSpec for Mode0 { + type Ux = u8; +} +impl crate::IsEnum for Mode0 {} +#[doc = "Field `MODE0` reader - MODE n"] +pub type Mode0R = crate::FieldReader; +impl Mode0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE0_A { + pub const fn variant(&self) -> Mode0 { match self.bits { - 0 => MODE0_A::DISABLED, - 1 => MODE0_A::INPUT, - 2 => MODE0_A::INPUTPULL, - 3 => MODE0_A::INPUTPULLFILTER, - 4 => MODE0_A::PUSHPULL, - 5 => MODE0_A::PUSHPULLALT, - 6 => MODE0_A::WIREDOR, - 7 => MODE0_A::WIREDORPULLDOWN, - 8 => MODE0_A::WIREDAND, - 9 => MODE0_A::WIREDANDFILTER, - 10 => MODE0_A::WIREDANDPULLUP, - 11 => MODE0_A::WIREDANDPULLUPFILTER, - 12 => MODE0_A::WIREDANDALT, - 13 => MODE0_A::WIREDANDALTFILTER, - 14 => MODE0_A::WIREDANDALTPULLUP, - 15 => MODE0_A::WIREDANDALTPULLUPFILTER, + 0 => Mode0::Disabled, + 1 => Mode0::Input, + 2 => Mode0::Inputpull, + 3 => Mode0::Inputpullfilter, + 4 => Mode0::Pushpull, + 5 => Mode0::Pushpullalt, + 6 => Mode0::Wiredor, + 7 => Mode0::Wiredorpulldown, + 8 => Mode0::Wiredand, + 9 => Mode0::Wiredandfilter, + 10 => Mode0::Wiredandpullup, + 11 => Mode0::Wiredandpullupfilter, + 12 => Mode0::Wiredandalt, + 13 => Mode0::Wiredandaltfilter, + 14 => Mode0::Wiredandaltpullup, + 15 => Mode0::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE0_A::DISABLED + *self == Mode0::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE0_A::INPUT + *self == Mode0::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE0_A::INPUTPULL + *self == Mode0::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE0_A::INPUTPULLFILTER + *self == Mode0::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE0_A::PUSHPULL + *self == Mode0::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE0_A::PUSHPULLALT + *self == Mode0::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE0_A::WIREDOR + *self == Mode0::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE0_A::WIREDORPULLDOWN + *self == Mode0::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE0_A::WIREDAND + *self == Mode0::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE0_A::WIREDANDFILTER + *self == Mode0::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE0_A::WIREDANDPULLUP + *self == Mode0::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE0_A::WIREDANDPULLUPFILTER + *self == Mode0::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE0_A::WIREDANDALT + *self == Mode0::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE0_A::WIREDANDALTFILTER + *self == Mode0::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE0_A::WIREDANDALTPULLUP + *self == Mode0::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE0_A::WIREDANDALTPULLUPFILTER + *self == Mode0::Wiredandaltpullupfilter } } #[doc = "Field `MODE0` writer - MODE n"] -pub type MODE0_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTD_MODEL_SPEC, u8, MODE0_A, 4, O>; -impl<'a, const O: u8> MODE0_W<'a, O> { +pub type Mode0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode0, crate::Safe>; +impl<'a, REG> Mode0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE0_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode0::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE0_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode0::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE0_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode0::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE0_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE0_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode0::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE0_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode0::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE0_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE0_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE0_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE1` reader - MODE n"] -pub type MODE1_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE1_A { +pub enum Mode1 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE1_A) -> Self { + fn from(variant: Mode1) -> Self { variant as _ } } -impl MODE1_R { +impl crate::FieldSpec for Mode1 { + type Ux = u8; +} +impl crate::IsEnum for Mode1 {} +#[doc = "Field `MODE1` reader - MODE n"] +pub type Mode1R = crate::FieldReader; +impl Mode1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE1_A { + pub const fn variant(&self) -> Mode1 { match self.bits { - 0 => MODE1_A::DISABLED, - 1 => MODE1_A::INPUT, - 2 => MODE1_A::INPUTPULL, - 3 => MODE1_A::INPUTPULLFILTER, - 4 => MODE1_A::PUSHPULL, - 5 => MODE1_A::PUSHPULLALT, - 6 => MODE1_A::WIREDOR, - 7 => MODE1_A::WIREDORPULLDOWN, - 8 => MODE1_A::WIREDAND, - 9 => MODE1_A::WIREDANDFILTER, - 10 => MODE1_A::WIREDANDPULLUP, - 11 => MODE1_A::WIREDANDPULLUPFILTER, - 12 => MODE1_A::WIREDANDALT, - 13 => MODE1_A::WIREDANDALTFILTER, - 14 => MODE1_A::WIREDANDALTPULLUP, - 15 => MODE1_A::WIREDANDALTPULLUPFILTER, + 0 => Mode1::Disabled, + 1 => Mode1::Input, + 2 => Mode1::Inputpull, + 3 => Mode1::Inputpullfilter, + 4 => Mode1::Pushpull, + 5 => Mode1::Pushpullalt, + 6 => Mode1::Wiredor, + 7 => Mode1::Wiredorpulldown, + 8 => Mode1::Wiredand, + 9 => Mode1::Wiredandfilter, + 10 => Mode1::Wiredandpullup, + 11 => Mode1::Wiredandpullupfilter, + 12 => Mode1::Wiredandalt, + 13 => Mode1::Wiredandaltfilter, + 14 => Mode1::Wiredandaltpullup, + 15 => Mode1::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE1_A::DISABLED + *self == Mode1::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE1_A::INPUT + *self == Mode1::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE1_A::INPUTPULL + *self == Mode1::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE1_A::INPUTPULLFILTER + *self == Mode1::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE1_A::PUSHPULL + *self == Mode1::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE1_A::PUSHPULLALT + *self == Mode1::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE1_A::WIREDOR + *self == Mode1::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE1_A::WIREDORPULLDOWN + *self == Mode1::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE1_A::WIREDAND + *self == Mode1::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE1_A::WIREDANDFILTER + *self == Mode1::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE1_A::WIREDANDPULLUP + *self == Mode1::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE1_A::WIREDANDPULLUPFILTER + *self == Mode1::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE1_A::WIREDANDALT + *self == Mode1::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE1_A::WIREDANDALTFILTER + *self == Mode1::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE1_A::WIREDANDALTPULLUP + *self == Mode1::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE1_A::WIREDANDALTPULLUPFILTER + *self == Mode1::Wiredandaltpullupfilter } } #[doc = "Field `MODE1` writer - MODE n"] -pub type MODE1_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTD_MODEL_SPEC, u8, MODE1_A, 4, O>; -impl<'a, const O: u8> MODE1_W<'a, O> { +pub type Mode1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode1, crate::Safe>; +impl<'a, REG> Mode1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE1_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode1::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE1_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode1::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE1_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode1::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE1_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE1_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode1::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE1_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode1::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE1_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE1_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE1_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE2` reader - MODE n"] -pub type MODE2_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE2_A { +pub enum Mode2 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE2_A) -> Self { + fn from(variant: Mode2) -> Self { variant as _ } } -impl MODE2_R { +impl crate::FieldSpec for Mode2 { + type Ux = u8; +} +impl crate::IsEnum for Mode2 {} +#[doc = "Field `MODE2` reader - MODE n"] +pub type Mode2R = crate::FieldReader; +impl Mode2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE2_A { + pub const fn variant(&self) -> Mode2 { match self.bits { - 0 => MODE2_A::DISABLED, - 1 => MODE2_A::INPUT, - 2 => MODE2_A::INPUTPULL, - 3 => MODE2_A::INPUTPULLFILTER, - 4 => MODE2_A::PUSHPULL, - 5 => MODE2_A::PUSHPULLALT, - 6 => MODE2_A::WIREDOR, - 7 => MODE2_A::WIREDORPULLDOWN, - 8 => MODE2_A::WIREDAND, - 9 => MODE2_A::WIREDANDFILTER, - 10 => MODE2_A::WIREDANDPULLUP, - 11 => MODE2_A::WIREDANDPULLUPFILTER, - 12 => MODE2_A::WIREDANDALT, - 13 => MODE2_A::WIREDANDALTFILTER, - 14 => MODE2_A::WIREDANDALTPULLUP, - 15 => MODE2_A::WIREDANDALTPULLUPFILTER, + 0 => Mode2::Disabled, + 1 => Mode2::Input, + 2 => Mode2::Inputpull, + 3 => Mode2::Inputpullfilter, + 4 => Mode2::Pushpull, + 5 => Mode2::Pushpullalt, + 6 => Mode2::Wiredor, + 7 => Mode2::Wiredorpulldown, + 8 => Mode2::Wiredand, + 9 => Mode2::Wiredandfilter, + 10 => Mode2::Wiredandpullup, + 11 => Mode2::Wiredandpullupfilter, + 12 => Mode2::Wiredandalt, + 13 => Mode2::Wiredandaltfilter, + 14 => Mode2::Wiredandaltpullup, + 15 => Mode2::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE2_A::DISABLED + *self == Mode2::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE2_A::INPUT + *self == Mode2::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE2_A::INPUTPULL + *self == Mode2::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE2_A::INPUTPULLFILTER + *self == Mode2::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE2_A::PUSHPULL + *self == Mode2::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE2_A::PUSHPULLALT + *self == Mode2::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE2_A::WIREDOR + *self == Mode2::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE2_A::WIREDORPULLDOWN + *self == Mode2::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE2_A::WIREDAND + *self == Mode2::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE2_A::WIREDANDFILTER + *self == Mode2::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE2_A::WIREDANDPULLUP + *self == Mode2::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE2_A::WIREDANDPULLUPFILTER + *self == Mode2::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE2_A::WIREDANDALT + *self == Mode2::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE2_A::WIREDANDALTFILTER + *self == Mode2::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE2_A::WIREDANDALTPULLUP + *self == Mode2::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE2_A::WIREDANDALTPULLUPFILTER + *self == Mode2::Wiredandaltpullupfilter } } #[doc = "Field `MODE2` writer - MODE n"] -pub type MODE2_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTD_MODEL_SPEC, u8, MODE2_A, 4, O>; -impl<'a, const O: u8> MODE2_W<'a, O> { +pub type Mode2W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode2, crate::Safe>; +impl<'a, REG> Mode2W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE2_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode2::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE2_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode2::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE2_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode2::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE2_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE2_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode2::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE2_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode2::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE2_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE2_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE2_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE3` reader - MODE n"] -pub type MODE3_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE3_A { +pub enum Mode3 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE3_A) -> Self { + fn from(variant: Mode3) -> Self { variant as _ } } -impl MODE3_R { +impl crate::FieldSpec for Mode3 { + type Ux = u8; +} +impl crate::IsEnum for Mode3 {} +#[doc = "Field `MODE3` reader - MODE n"] +pub type Mode3R = crate::FieldReader; +impl Mode3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE3_A { + pub const fn variant(&self) -> Mode3 { match self.bits { - 0 => MODE3_A::DISABLED, - 1 => MODE3_A::INPUT, - 2 => MODE3_A::INPUTPULL, - 3 => MODE3_A::INPUTPULLFILTER, - 4 => MODE3_A::PUSHPULL, - 5 => MODE3_A::PUSHPULLALT, - 6 => MODE3_A::WIREDOR, - 7 => MODE3_A::WIREDORPULLDOWN, - 8 => MODE3_A::WIREDAND, - 9 => MODE3_A::WIREDANDFILTER, - 10 => MODE3_A::WIREDANDPULLUP, - 11 => MODE3_A::WIREDANDPULLUPFILTER, - 12 => MODE3_A::WIREDANDALT, - 13 => MODE3_A::WIREDANDALTFILTER, - 14 => MODE3_A::WIREDANDALTPULLUP, - 15 => MODE3_A::WIREDANDALTPULLUPFILTER, + 0 => Mode3::Disabled, + 1 => Mode3::Input, + 2 => Mode3::Inputpull, + 3 => Mode3::Inputpullfilter, + 4 => Mode3::Pushpull, + 5 => Mode3::Pushpullalt, + 6 => Mode3::Wiredor, + 7 => Mode3::Wiredorpulldown, + 8 => Mode3::Wiredand, + 9 => Mode3::Wiredandfilter, + 10 => Mode3::Wiredandpullup, + 11 => Mode3::Wiredandpullupfilter, + 12 => Mode3::Wiredandalt, + 13 => Mode3::Wiredandaltfilter, + 14 => Mode3::Wiredandaltpullup, + 15 => Mode3::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE3_A::DISABLED + *self == Mode3::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE3_A::INPUT + *self == Mode3::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE3_A::INPUTPULL + *self == Mode3::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE3_A::INPUTPULLFILTER + *self == Mode3::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE3_A::PUSHPULL + *self == Mode3::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE3_A::PUSHPULLALT + *self == Mode3::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE3_A::WIREDOR + *self == Mode3::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE3_A::WIREDORPULLDOWN + *self == Mode3::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE3_A::WIREDAND + *self == Mode3::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE3_A::WIREDANDFILTER + *self == Mode3::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE3_A::WIREDANDPULLUP + *self == Mode3::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE3_A::WIREDANDPULLUPFILTER + *self == Mode3::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE3_A::WIREDANDALT + *self == Mode3::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE3_A::WIREDANDALTFILTER + *self == Mode3::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE3_A::WIREDANDALTPULLUP + *self == Mode3::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE3_A::WIREDANDALTPULLUPFILTER + *self == Mode3::Wiredandaltpullupfilter } } #[doc = "Field `MODE3` writer - MODE n"] -pub type MODE3_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTD_MODEL_SPEC, u8, MODE3_A, 4, O>; -impl<'a, const O: u8> MODE3_W<'a, O> { +pub type Mode3W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode3, crate::Safe>; +impl<'a, REG> Mode3W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE3_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode3::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE3_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode3::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE3_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode3::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE3_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE3_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode3::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE3_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode3::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE3_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE3_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE3_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE4` reader - MODE n"] -pub type MODE4_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE4_A { +pub enum Mode4 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE4_A) -> Self { + fn from(variant: Mode4) -> Self { variant as _ } } -impl MODE4_R { +impl crate::FieldSpec for Mode4 { + type Ux = u8; +} +impl crate::IsEnum for Mode4 {} +#[doc = "Field `MODE4` reader - MODE n"] +pub type Mode4R = crate::FieldReader; +impl Mode4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE4_A { + pub const fn variant(&self) -> Mode4 { match self.bits { - 0 => MODE4_A::DISABLED, - 1 => MODE4_A::INPUT, - 2 => MODE4_A::INPUTPULL, - 3 => MODE4_A::INPUTPULLFILTER, - 4 => MODE4_A::PUSHPULL, - 5 => MODE4_A::PUSHPULLALT, - 6 => MODE4_A::WIREDOR, - 7 => MODE4_A::WIREDORPULLDOWN, - 8 => MODE4_A::WIREDAND, - 9 => MODE4_A::WIREDANDFILTER, - 10 => MODE4_A::WIREDANDPULLUP, - 11 => MODE4_A::WIREDANDPULLUPFILTER, - 12 => MODE4_A::WIREDANDALT, - 13 => MODE4_A::WIREDANDALTFILTER, - 14 => MODE4_A::WIREDANDALTPULLUP, - 15 => MODE4_A::WIREDANDALTPULLUPFILTER, + 0 => Mode4::Disabled, + 1 => Mode4::Input, + 2 => Mode4::Inputpull, + 3 => Mode4::Inputpullfilter, + 4 => Mode4::Pushpull, + 5 => Mode4::Pushpullalt, + 6 => Mode4::Wiredor, + 7 => Mode4::Wiredorpulldown, + 8 => Mode4::Wiredand, + 9 => Mode4::Wiredandfilter, + 10 => Mode4::Wiredandpullup, + 11 => Mode4::Wiredandpullupfilter, + 12 => Mode4::Wiredandalt, + 13 => Mode4::Wiredandaltfilter, + 14 => Mode4::Wiredandaltpullup, + 15 => Mode4::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE4_A::DISABLED + *self == Mode4::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE4_A::INPUT + *self == Mode4::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE4_A::INPUTPULL + *self == Mode4::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE4_A::INPUTPULLFILTER + *self == Mode4::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE4_A::PUSHPULL + *self == Mode4::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE4_A::PUSHPULLALT + *self == Mode4::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE4_A::WIREDOR + *self == Mode4::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE4_A::WIREDORPULLDOWN + *self == Mode4::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE4_A::WIREDAND + *self == Mode4::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE4_A::WIREDANDFILTER + *self == Mode4::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE4_A::WIREDANDPULLUP + *self == Mode4::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE4_A::WIREDANDPULLUPFILTER + *self == Mode4::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE4_A::WIREDANDALT + *self == Mode4::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE4_A::WIREDANDALTFILTER + *self == Mode4::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE4_A::WIREDANDALTPULLUP + *self == Mode4::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE4_A::WIREDANDALTPULLUPFILTER + *self == Mode4::Wiredandaltpullupfilter } } #[doc = "Field `MODE4` writer - MODE n"] -pub type MODE4_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTD_MODEL_SPEC, u8, MODE4_A, 4, O>; -impl<'a, const O: u8> MODE4_W<'a, O> { +pub type Mode4W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode4, crate::Safe>; +impl<'a, REG> Mode4W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE4_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode4::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE4_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode4::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE4_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode4::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE4_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE4_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode4::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE4_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode4::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE4_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE4_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE4_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE5` reader - MODE n"] -pub type MODE5_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE5_A { +pub enum Mode5 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE5_A) -> Self { + fn from(variant: Mode5) -> Self { variant as _ } } -impl MODE5_R { +impl crate::FieldSpec for Mode5 { + type Ux = u8; +} +impl crate::IsEnum for Mode5 {} +#[doc = "Field `MODE5` reader - MODE n"] +pub type Mode5R = crate::FieldReader; +impl Mode5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE5_A { + pub const fn variant(&self) -> Mode5 { match self.bits { - 0 => MODE5_A::DISABLED, - 1 => MODE5_A::INPUT, - 2 => MODE5_A::INPUTPULL, - 3 => MODE5_A::INPUTPULLFILTER, - 4 => MODE5_A::PUSHPULL, - 5 => MODE5_A::PUSHPULLALT, - 6 => MODE5_A::WIREDOR, - 7 => MODE5_A::WIREDORPULLDOWN, - 8 => MODE5_A::WIREDAND, - 9 => MODE5_A::WIREDANDFILTER, - 10 => MODE5_A::WIREDANDPULLUP, - 11 => MODE5_A::WIREDANDPULLUPFILTER, - 12 => MODE5_A::WIREDANDALT, - 13 => MODE5_A::WIREDANDALTFILTER, - 14 => MODE5_A::WIREDANDALTPULLUP, - 15 => MODE5_A::WIREDANDALTPULLUPFILTER, + 0 => Mode5::Disabled, + 1 => Mode5::Input, + 2 => Mode5::Inputpull, + 3 => Mode5::Inputpullfilter, + 4 => Mode5::Pushpull, + 5 => Mode5::Pushpullalt, + 6 => Mode5::Wiredor, + 7 => Mode5::Wiredorpulldown, + 8 => Mode5::Wiredand, + 9 => Mode5::Wiredandfilter, + 10 => Mode5::Wiredandpullup, + 11 => Mode5::Wiredandpullupfilter, + 12 => Mode5::Wiredandalt, + 13 => Mode5::Wiredandaltfilter, + 14 => Mode5::Wiredandaltpullup, + 15 => Mode5::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE5_A::DISABLED + *self == Mode5::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE5_A::INPUT + *self == Mode5::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE5_A::INPUTPULL + *self == Mode5::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE5_A::INPUTPULLFILTER + *self == Mode5::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE5_A::PUSHPULL + *self == Mode5::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE5_A::PUSHPULLALT + *self == Mode5::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE5_A::WIREDOR + *self == Mode5::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE5_A::WIREDORPULLDOWN + *self == Mode5::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE5_A::WIREDAND + *self == Mode5::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE5_A::WIREDANDFILTER + *self == Mode5::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE5_A::WIREDANDPULLUP + *self == Mode5::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE5_A::WIREDANDPULLUPFILTER + *self == Mode5::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE5_A::WIREDANDALT + *self == Mode5::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE5_A::WIREDANDALTFILTER + *self == Mode5::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE5_A::WIREDANDALTPULLUP + *self == Mode5::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE5_A::WIREDANDALTPULLUPFILTER + *self == Mode5::Wiredandaltpullupfilter } } #[doc = "Field `MODE5` writer - MODE n"] -pub type MODE5_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTD_MODEL_SPEC, u8, MODE5_A, 4, O>; -impl<'a, const O: u8> MODE5_W<'a, O> { +pub type Mode5W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode5, crate::Safe>; +impl<'a, REG> Mode5W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE5_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode5::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE5_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode5::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE5_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode5::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE5_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE5_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode5::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE5_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode5::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE5_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE5_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE5_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandaltpullupfilter) } } impl R { #[doc = "Bits 0:3 - MODE n"] #[inline(always)] - pub fn mode0(&self) -> MODE0_R { - MODE0_R::new((self.bits & 0x0f) as u8) + pub fn mode0(&self) -> Mode0R { + Mode0R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - MODE n"] #[inline(always)] - pub fn mode1(&self) -> MODE1_R { - MODE1_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn mode1(&self) -> Mode1R { + Mode1R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - MODE n"] #[inline(always)] - pub fn mode2(&self) -> MODE2_R { - MODE2_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn mode2(&self) -> Mode2R { + Mode2R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - MODE n"] #[inline(always)] - pub fn mode3(&self) -> MODE3_R { - MODE3_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn mode3(&self) -> Mode3R { + Mode3R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:19 - MODE n"] #[inline(always)] - pub fn mode4(&self) -> MODE4_R { - MODE4_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn mode4(&self) -> Mode4R { + Mode4R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:23 - MODE n"] #[inline(always)] - pub fn mode5(&self) -> MODE5_R { - MODE5_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn mode5(&self) -> Mode5R { + Mode5R::new(((self.bits >> 20) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - MODE n"] #[inline(always)] #[must_use] - pub fn mode0(&mut self) -> MODE0_W<0> { - MODE0_W::new(self) + pub fn mode0(&mut self) -> Mode0W { + Mode0W::new(self, 0) } #[doc = "Bits 4:7 - MODE n"] #[inline(always)] #[must_use] - pub fn mode1(&mut self) -> MODE1_W<4> { - MODE1_W::new(self) + pub fn mode1(&mut self) -> Mode1W { + Mode1W::new(self, 4) } #[doc = "Bits 8:11 - MODE n"] #[inline(always)] #[must_use] - pub fn mode2(&mut self) -> MODE2_W<8> { - MODE2_W::new(self) + pub fn mode2(&mut self) -> Mode2W { + Mode2W::new(self, 8) } #[doc = "Bits 12:15 - MODE n"] #[inline(always)] #[must_use] - pub fn mode3(&mut self) -> MODE3_W<12> { - MODE3_W::new(self) + pub fn mode3(&mut self) -> Mode3W { + Mode3W::new(self, 12) } #[doc = "Bits 16:19 - MODE n"] #[inline(always)] #[must_use] - pub fn mode4(&mut self) -> MODE4_W<16> { - MODE4_W::new(self) + pub fn mode4(&mut self) -> Mode4W { + Mode4W::new(self, 16) } #[doc = "Bits 20:23 - MODE n"] #[inline(always)] #[must_use] - pub fn mode5(&mut self) -> MODE5_W<20> { - MODE5_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn mode5(&mut self) -> Mode5W { + Mode5W::new(self, 20) } } -#[doc = "mode low\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portd_model](index.html) module"] -pub struct PORTD_MODEL_SPEC; -impl crate::RegisterSpec for PORTD_MODEL_SPEC { +#[doc = "mode low\n\nYou can [`read`](crate::Reg::read) this register and get [`portd_model::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portd_model::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortdModelSpec; +impl crate::RegisterSpec for PortdModelSpec { type Ux = u32; } -#[doc = "`read()` method returns [portd_model::R](R) reader structure"] -impl crate::Readable for PORTD_MODEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [portd_model::W](W) writer structure"] -impl crate::Writable for PORTD_MODEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`portd_model::R`](R) reader structure"] +impl crate::Readable for PortdModelSpec {} +#[doc = "`write(|w| ..)` method takes [`portd_model::W`](W) writer structure"] +impl crate::Writable for PortdModelSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTD_MODEL to value 0"] -impl crate::Resettable for PORTD_MODEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortdModelSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch0route.rs index bb0c485..4e61291 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch0route.rs @@ -1,96 +1,55 @@ #[doc = "Register `PRS0_ASYNCH0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_ASYNCH0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ASYNCH0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ASYNCH0 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ASYNCH0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ASYNCH0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_ASYNCH0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ASYNCH0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ASYNCH0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ASYNCH0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ASYNCH0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ASYNCH0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_asynch0route](index.html) module"] -pub struct PRS0_ASYNCH0ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_ASYNCH0ROUTE_SPEC { +#[doc = "ASYNCH0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Asynch0routeSpec; +impl crate::RegisterSpec for Prs0Asynch0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_asynch0route::R](R) reader structure"] -impl crate::Readable for PRS0_ASYNCH0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_asynch0route::W](W) writer structure"] -impl crate::Writable for PRS0_ASYNCH0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_asynch0route::R`](R) reader structure"] +impl crate::Readable for Prs0Asynch0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_asynch0route::W`](W) writer structure"] +impl crate::Writable for Prs0Asynch0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_ASYNCH0ROUTE to value 0"] -impl crate::Resettable for PRS0_ASYNCH0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Asynch0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch10route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch10route.rs index fea0ec0..1331b10 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch10route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch10route.rs @@ -1,97 +1,55 @@ #[doc = "Register `PRS0_ASYNCH10ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_ASYNCH10ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ASYNCH10 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ASYNCH10 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH10ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ASYNCH10 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ASYNCH10 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH10ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ASYNCH10 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ASYNCH10 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ASYNCH10 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ASYNCH10 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ASYNCH10 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_asynch10route](index.html) module"] -pub struct PRS0_ASYNCH10ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_ASYNCH10ROUTE_SPEC { +#[doc = "ASYNCH10 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch10route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch10route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Asynch10routeSpec; +impl crate::RegisterSpec for Prs0Asynch10routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_asynch10route::R](R) reader structure"] -impl crate::Readable for PRS0_ASYNCH10ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_asynch10route::W](W) writer structure"] -impl crate::Writable for PRS0_ASYNCH10ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_asynch10route::R`](R) reader structure"] +impl crate::Readable for Prs0Asynch10routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_asynch10route::W`](W) writer structure"] +impl crate::Writable for Prs0Asynch10routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_ASYNCH10ROUTE to value 0"] -impl crate::Resettable for PRS0_ASYNCH10ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Asynch10routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch11route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch11route.rs index 8ccc6a6..2263ecc 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch11route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch11route.rs @@ -1,97 +1,55 @@ #[doc = "Register `PRS0_ASYNCH11ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_ASYNCH11ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ASYNCH11 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ASYNCH11 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH11ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ASYNCH11 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ASYNCH11 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH11ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ASYNCH11 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ASYNCH11 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ASYNCH11 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ASYNCH11 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ASYNCH11 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_asynch11route](index.html) module"] -pub struct PRS0_ASYNCH11ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_ASYNCH11ROUTE_SPEC { +#[doc = "ASYNCH11 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch11route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch11route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Asynch11routeSpec; +impl crate::RegisterSpec for Prs0Asynch11routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_asynch11route::R](R) reader structure"] -impl crate::Readable for PRS0_ASYNCH11ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_asynch11route::W](W) writer structure"] -impl crate::Writable for PRS0_ASYNCH11ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_asynch11route::R`](R) reader structure"] +impl crate::Readable for Prs0Asynch11routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_asynch11route::W`](W) writer structure"] +impl crate::Writable for Prs0Asynch11routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_ASYNCH11ROUTE to value 0"] -impl crate::Resettable for PRS0_ASYNCH11ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Asynch11routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch1route.rs index 0952dc0..ce181f0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch1route.rs @@ -1,96 +1,55 @@ #[doc = "Register `PRS0_ASYNCH1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_ASYNCH1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ASYNCH1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ASYNCH1 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ASYNCH1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ASYNCH1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_ASYNCH1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ASYNCH1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ASYNCH1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ASYNCH1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ASYNCH1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ASYNCH1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_asynch1route](index.html) module"] -pub struct PRS0_ASYNCH1ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_ASYNCH1ROUTE_SPEC { +#[doc = "ASYNCH1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Asynch1routeSpec; +impl crate::RegisterSpec for Prs0Asynch1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_asynch1route::R](R) reader structure"] -impl crate::Readable for PRS0_ASYNCH1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_asynch1route::W](W) writer structure"] -impl crate::Writable for PRS0_ASYNCH1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_asynch1route::R`](R) reader structure"] +impl crate::Readable for Prs0Asynch1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_asynch1route::W`](W) writer structure"] +impl crate::Writable for Prs0Asynch1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_ASYNCH1ROUTE to value 0"] -impl crate::Resettable for PRS0_ASYNCH1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Asynch1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch2route.rs index e8194cf..b788dd5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch2route.rs @@ -1,96 +1,55 @@ #[doc = "Register `PRS0_ASYNCH2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_ASYNCH2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ASYNCH2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ASYNCH2 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ASYNCH2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ASYNCH2 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_ASYNCH2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ASYNCH2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ASYNCH2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ASYNCH2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ASYNCH2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ASYNCH2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_asynch2route](index.html) module"] -pub struct PRS0_ASYNCH2ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_ASYNCH2ROUTE_SPEC { +#[doc = "ASYNCH2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Asynch2routeSpec; +impl crate::RegisterSpec for Prs0Asynch2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_asynch2route::R](R) reader structure"] -impl crate::Readable for PRS0_ASYNCH2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_asynch2route::W](W) writer structure"] -impl crate::Writable for PRS0_ASYNCH2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_asynch2route::R`](R) reader structure"] +impl crate::Readable for Prs0Asynch2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_asynch2route::W`](W) writer structure"] +impl crate::Writable for Prs0Asynch2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_ASYNCH2ROUTE to value 0"] -impl crate::Resettable for PRS0_ASYNCH2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Asynch2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch3route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch3route.rs index 93cda42..b77d708 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch3route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch3route.rs @@ -1,96 +1,55 @@ #[doc = "Register `PRS0_ASYNCH3ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_ASYNCH3ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ASYNCH3 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ASYNCH3 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH3ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ASYNCH3 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ASYNCH3 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_ASYNCH3ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ASYNCH3 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ASYNCH3 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ASYNCH3 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ASYNCH3 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ASYNCH3 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_asynch3route](index.html) module"] -pub struct PRS0_ASYNCH3ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_ASYNCH3ROUTE_SPEC { +#[doc = "ASYNCH3 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch3route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch3route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Asynch3routeSpec; +impl crate::RegisterSpec for Prs0Asynch3routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_asynch3route::R](R) reader structure"] -impl crate::Readable for PRS0_ASYNCH3ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_asynch3route::W](W) writer structure"] -impl crate::Writable for PRS0_ASYNCH3ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_asynch3route::R`](R) reader structure"] +impl crate::Readable for Prs0Asynch3routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_asynch3route::W`](W) writer structure"] +impl crate::Writable for Prs0Asynch3routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_ASYNCH3ROUTE to value 0"] -impl crate::Resettable for PRS0_ASYNCH3ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Asynch3routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch4route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch4route.rs index 0745ec2..25d8d2b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch4route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch4route.rs @@ -1,96 +1,55 @@ #[doc = "Register `PRS0_ASYNCH4ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_ASYNCH4ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ASYNCH4 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ASYNCH4 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH4ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ASYNCH4 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ASYNCH4 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_ASYNCH4ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ASYNCH4 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ASYNCH4 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ASYNCH4 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ASYNCH4 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ASYNCH4 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_asynch4route](index.html) module"] -pub struct PRS0_ASYNCH4ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_ASYNCH4ROUTE_SPEC { +#[doc = "ASYNCH4 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch4route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch4route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Asynch4routeSpec; +impl crate::RegisterSpec for Prs0Asynch4routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_asynch4route::R](R) reader structure"] -impl crate::Readable for PRS0_ASYNCH4ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_asynch4route::W](W) writer structure"] -impl crate::Writable for PRS0_ASYNCH4ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_asynch4route::R`](R) reader structure"] +impl crate::Readable for Prs0Asynch4routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_asynch4route::W`](W) writer structure"] +impl crate::Writable for Prs0Asynch4routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_ASYNCH4ROUTE to value 0"] -impl crate::Resettable for PRS0_ASYNCH4ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Asynch4routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch5route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch5route.rs index 400e7f8..aba19a0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch5route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch5route.rs @@ -1,96 +1,55 @@ #[doc = "Register `PRS0_ASYNCH5ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_ASYNCH5ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ASYNCH5 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ASYNCH5 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH5ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ASYNCH5 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ASYNCH5 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_ASYNCH5ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ASYNCH5 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ASYNCH5 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ASYNCH5 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ASYNCH5 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ASYNCH5 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_asynch5route](index.html) module"] -pub struct PRS0_ASYNCH5ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_ASYNCH5ROUTE_SPEC { +#[doc = "ASYNCH5 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch5route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch5route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Asynch5routeSpec; +impl crate::RegisterSpec for Prs0Asynch5routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_asynch5route::R](R) reader structure"] -impl crate::Readable for PRS0_ASYNCH5ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_asynch5route::W](W) writer structure"] -impl crate::Writable for PRS0_ASYNCH5ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_asynch5route::R`](R) reader structure"] +impl crate::Readable for Prs0Asynch5routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_asynch5route::W`](W) writer structure"] +impl crate::Writable for Prs0Asynch5routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_ASYNCH5ROUTE to value 0"] -impl crate::Resettable for PRS0_ASYNCH5ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Asynch5routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch6route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch6route.rs index 7c4a34c..a125cf3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch6route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch6route.rs @@ -1,96 +1,55 @@ #[doc = "Register `PRS0_ASYNCH6ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_ASYNCH6ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ASYNCH6 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ASYNCH6 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH6ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ASYNCH6 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ASYNCH6 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_ASYNCH6ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ASYNCH6 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ASYNCH6 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ASYNCH6 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ASYNCH6 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ASYNCH6 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_asynch6route](index.html) module"] -pub struct PRS0_ASYNCH6ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_ASYNCH6ROUTE_SPEC { +#[doc = "ASYNCH6 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch6route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch6route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Asynch6routeSpec; +impl crate::RegisterSpec for Prs0Asynch6routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_asynch6route::R](R) reader structure"] -impl crate::Readable for PRS0_ASYNCH6ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_asynch6route::W](W) writer structure"] -impl crate::Writable for PRS0_ASYNCH6ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_asynch6route::R`](R) reader structure"] +impl crate::Readable for Prs0Asynch6routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_asynch6route::W`](W) writer structure"] +impl crate::Writable for Prs0Asynch6routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_ASYNCH6ROUTE to value 0"] -impl crate::Resettable for PRS0_ASYNCH6ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Asynch6routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch7route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch7route.rs index 2209cac..1d4e618 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch7route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch7route.rs @@ -1,96 +1,55 @@ #[doc = "Register `PRS0_ASYNCH7ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_ASYNCH7ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ASYNCH7 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ASYNCH7 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH7ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ASYNCH7 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ASYNCH7 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_ASYNCH7ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ASYNCH7 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ASYNCH7 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ASYNCH7 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ASYNCH7 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ASYNCH7 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_asynch7route](index.html) module"] -pub struct PRS0_ASYNCH7ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_ASYNCH7ROUTE_SPEC { +#[doc = "ASYNCH7 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch7route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch7route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Asynch7routeSpec; +impl crate::RegisterSpec for Prs0Asynch7routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_asynch7route::R](R) reader structure"] -impl crate::Readable for PRS0_ASYNCH7ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_asynch7route::W](W) writer structure"] -impl crate::Writable for PRS0_ASYNCH7ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_asynch7route::R`](R) reader structure"] +impl crate::Readable for Prs0Asynch7routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_asynch7route::W`](W) writer structure"] +impl crate::Writable for Prs0Asynch7routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_ASYNCH7ROUTE to value 0"] -impl crate::Resettable for PRS0_ASYNCH7ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Asynch7routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch8route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch8route.rs index c25ae72..686c2f5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch8route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch8route.rs @@ -1,96 +1,55 @@ #[doc = "Register `PRS0_ASYNCH8ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_ASYNCH8ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ASYNCH8 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ASYNCH8 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH8ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ASYNCH8 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ASYNCH8 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_ASYNCH8ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ASYNCH8 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ASYNCH8 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ASYNCH8 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ASYNCH8 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ASYNCH8 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_asynch8route](index.html) module"] -pub struct PRS0_ASYNCH8ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_ASYNCH8ROUTE_SPEC { +#[doc = "ASYNCH8 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch8route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch8route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Asynch8routeSpec; +impl crate::RegisterSpec for Prs0Asynch8routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_asynch8route::R](R) reader structure"] -impl crate::Readable for PRS0_ASYNCH8ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_asynch8route::W](W) writer structure"] -impl crate::Writable for PRS0_ASYNCH8ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_asynch8route::R`](R) reader structure"] +impl crate::Readable for Prs0Asynch8routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_asynch8route::W`](W) writer structure"] +impl crate::Writable for Prs0Asynch8routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_ASYNCH8ROUTE to value 0"] -impl crate::Resettable for PRS0_ASYNCH8ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Asynch8routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch9route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch9route.rs index 428e69a..a9cb272 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch9route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_asynch9route.rs @@ -1,96 +1,55 @@ #[doc = "Register `PRS0_ASYNCH9ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_ASYNCH9ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ASYNCH9 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ASYNCH9 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH9ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ASYNCH9 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ASYNCH9 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_ASYNCH9ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ASYNCH9 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ASYNCH9 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ASYNCH9 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ASYNCH9 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ASYNCH9 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_asynch9route](index.html) module"] -pub struct PRS0_ASYNCH9ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_ASYNCH9ROUTE_SPEC { +#[doc = "ASYNCH9 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch9route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch9route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Asynch9routeSpec; +impl crate::RegisterSpec for Prs0Asynch9routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_asynch9route::R](R) reader structure"] -impl crate::Readable for PRS0_ASYNCH9ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_asynch9route::W](W) writer structure"] -impl crate::Writable for PRS0_ASYNCH9ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_asynch9route::R`](R) reader structure"] +impl crate::Readable for Prs0Asynch9routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_asynch9route::W`](W) writer structure"] +impl crate::Writable for Prs0Asynch9routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_ASYNCH9ROUTE to value 0"] -impl crate::Resettable for PRS0_ASYNCH9ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Asynch9routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_routeen.rs index 1556113..90605ae 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_routeen.rs @@ -1,305 +1,265 @@ #[doc = "Register `PRS0_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ASYNCH0PEN` reader - ASYNCH0 pin enable control bit"] -pub type ASYNCH0PEN_R = crate::BitReader; +pub type Asynch0penR = crate::BitReader; #[doc = "Field `ASYNCH0PEN` writer - ASYNCH0 pin enable control bit"] -pub type ASYNCH0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Asynch0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ASYNCH1PEN` reader - ASYNCH1 pin enable control bit"] -pub type ASYNCH1PEN_R = crate::BitReader; +pub type Asynch1penR = crate::BitReader; #[doc = "Field `ASYNCH1PEN` writer - ASYNCH1 pin enable control bit"] -pub type ASYNCH1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Asynch1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ASYNCH2PEN` reader - ASYNCH2 pin enable control bit"] -pub type ASYNCH2PEN_R = crate::BitReader; +pub type Asynch2penR = crate::BitReader; #[doc = "Field `ASYNCH2PEN` writer - ASYNCH2 pin enable control bit"] -pub type ASYNCH2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Asynch2penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ASYNCH3PEN` reader - ASYNCH3 pin enable control bit"] -pub type ASYNCH3PEN_R = crate::BitReader; +pub type Asynch3penR = crate::BitReader; #[doc = "Field `ASYNCH3PEN` writer - ASYNCH3 pin enable control bit"] -pub type ASYNCH3PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Asynch3penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ASYNCH4PEN` reader - ASYNCH4 pin enable control bit"] -pub type ASYNCH4PEN_R = crate::BitReader; +pub type Asynch4penR = crate::BitReader; #[doc = "Field `ASYNCH4PEN` writer - ASYNCH4 pin enable control bit"] -pub type ASYNCH4PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Asynch4penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ASYNCH5PEN` reader - ASYNCH5 pin enable control bit"] -pub type ASYNCH5PEN_R = crate::BitReader; +pub type Asynch5penR = crate::BitReader; #[doc = "Field `ASYNCH5PEN` writer - ASYNCH5 pin enable control bit"] -pub type ASYNCH5PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Asynch5penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ASYNCH6PEN` reader - ASYNCH6 pin enable control bit"] -pub type ASYNCH6PEN_R = crate::BitReader; +pub type Asynch6penR = crate::BitReader; #[doc = "Field `ASYNCH6PEN` writer - ASYNCH6 pin enable control bit"] -pub type ASYNCH6PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Asynch6penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ASYNCH7PEN` reader - ASYNCH7 pin enable control bit"] -pub type ASYNCH7PEN_R = crate::BitReader; +pub type Asynch7penR = crate::BitReader; #[doc = "Field `ASYNCH7PEN` writer - ASYNCH7 pin enable control bit"] -pub type ASYNCH7PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Asynch7penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ASYNCH8PEN` reader - ASYNCH8 pin enable control bit"] -pub type ASYNCH8PEN_R = crate::BitReader; +pub type Asynch8penR = crate::BitReader; #[doc = "Field `ASYNCH8PEN` writer - ASYNCH8 pin enable control bit"] -pub type ASYNCH8PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Asynch8penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ASYNCH9PEN` reader - ASYNCH9 pin enable control bit"] -pub type ASYNCH9PEN_R = crate::BitReader; +pub type Asynch9penR = crate::BitReader; #[doc = "Field `ASYNCH9PEN` writer - ASYNCH9 pin enable control bit"] -pub type ASYNCH9PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Asynch9penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ASYNCH10PEN` reader - ASYNCH10 pin enable control bit"] -pub type ASYNCH10PEN_R = crate::BitReader; +pub type Asynch10penR = crate::BitReader; #[doc = "Field `ASYNCH10PEN` writer - ASYNCH10 pin enable control bit"] -pub type ASYNCH10PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Asynch10penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ASYNCH11PEN` reader - ASYNCH11 pin enable control bit"] -pub type ASYNCH11PEN_R = crate::BitReader; +pub type Asynch11penR = crate::BitReader; #[doc = "Field `ASYNCH11PEN` writer - ASYNCH11 pin enable control bit"] -pub type ASYNCH11PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Asynch11penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYNCH0PEN` reader - SYNCH0 pin enable control bit"] -pub type SYNCH0PEN_R = crate::BitReader; +pub type Synch0penR = crate::BitReader; #[doc = "Field `SYNCH0PEN` writer - SYNCH0 pin enable control bit"] -pub type SYNCH0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Synch0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYNCH1PEN` reader - SYNCH1 pin enable control bit"] -pub type SYNCH1PEN_R = crate::BitReader; +pub type Synch1penR = crate::BitReader; #[doc = "Field `SYNCH1PEN` writer - SYNCH1 pin enable control bit"] -pub type SYNCH1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Synch1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYNCH2PEN` reader - SYNCH2 pin enable control bit"] -pub type SYNCH2PEN_R = crate::BitReader; +pub type Synch2penR = crate::BitReader; #[doc = "Field `SYNCH2PEN` writer - SYNCH2 pin enable control bit"] -pub type SYNCH2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Synch2penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYNCH3PEN` reader - SYNCH3 pin enable control bit"] -pub type SYNCH3PEN_R = crate::BitReader; +pub type Synch3penR = crate::BitReader; #[doc = "Field `SYNCH3PEN` writer - SYNCH3 pin enable control bit"] -pub type SYNCH3PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Synch3penW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - ASYNCH0 pin enable control bit"] #[inline(always)] - pub fn asynch0pen(&self) -> ASYNCH0PEN_R { - ASYNCH0PEN_R::new((self.bits & 1) != 0) + pub fn asynch0pen(&self) -> Asynch0penR { + Asynch0penR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - ASYNCH1 pin enable control bit"] #[inline(always)] - pub fn asynch1pen(&self) -> ASYNCH1PEN_R { - ASYNCH1PEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn asynch1pen(&self) -> Asynch1penR { + Asynch1penR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - ASYNCH2 pin enable control bit"] #[inline(always)] - pub fn asynch2pen(&self) -> ASYNCH2PEN_R { - ASYNCH2PEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn asynch2pen(&self) -> Asynch2penR { + Asynch2penR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - ASYNCH3 pin enable control bit"] #[inline(always)] - pub fn asynch3pen(&self) -> ASYNCH3PEN_R { - ASYNCH3PEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn asynch3pen(&self) -> Asynch3penR { + Asynch3penR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - ASYNCH4 pin enable control bit"] #[inline(always)] - pub fn asynch4pen(&self) -> ASYNCH4PEN_R { - ASYNCH4PEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn asynch4pen(&self) -> Asynch4penR { + Asynch4penR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - ASYNCH5 pin enable control bit"] #[inline(always)] - pub fn asynch5pen(&self) -> ASYNCH5PEN_R { - ASYNCH5PEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn asynch5pen(&self) -> Asynch5penR { + Asynch5penR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - ASYNCH6 pin enable control bit"] #[inline(always)] - pub fn asynch6pen(&self) -> ASYNCH6PEN_R { - ASYNCH6PEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn asynch6pen(&self) -> Asynch6penR { + Asynch6penR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - ASYNCH7 pin enable control bit"] #[inline(always)] - pub fn asynch7pen(&self) -> ASYNCH7PEN_R { - ASYNCH7PEN_R::new(((self.bits >> 7) & 1) != 0) + pub fn asynch7pen(&self) -> Asynch7penR { + Asynch7penR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - ASYNCH8 pin enable control bit"] #[inline(always)] - pub fn asynch8pen(&self) -> ASYNCH8PEN_R { - ASYNCH8PEN_R::new(((self.bits >> 8) & 1) != 0) + pub fn asynch8pen(&self) -> Asynch8penR { + Asynch8penR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - ASYNCH9 pin enable control bit"] #[inline(always)] - pub fn asynch9pen(&self) -> ASYNCH9PEN_R { - ASYNCH9PEN_R::new(((self.bits >> 9) & 1) != 0) + pub fn asynch9pen(&self) -> Asynch9penR { + Asynch9penR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - ASYNCH10 pin enable control bit"] #[inline(always)] - pub fn asynch10pen(&self) -> ASYNCH10PEN_R { - ASYNCH10PEN_R::new(((self.bits >> 10) & 1) != 0) + pub fn asynch10pen(&self) -> Asynch10penR { + Asynch10penR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - ASYNCH11 pin enable control bit"] #[inline(always)] - pub fn asynch11pen(&self) -> ASYNCH11PEN_R { - ASYNCH11PEN_R::new(((self.bits >> 11) & 1) != 0) + pub fn asynch11pen(&self) -> Asynch11penR { + Asynch11penR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - SYNCH0 pin enable control bit"] #[inline(always)] - pub fn synch0pen(&self) -> SYNCH0PEN_R { - SYNCH0PEN_R::new(((self.bits >> 12) & 1) != 0) + pub fn synch0pen(&self) -> Synch0penR { + Synch0penR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - SYNCH1 pin enable control bit"] #[inline(always)] - pub fn synch1pen(&self) -> SYNCH1PEN_R { - SYNCH1PEN_R::new(((self.bits >> 13) & 1) != 0) + pub fn synch1pen(&self) -> Synch1penR { + Synch1penR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - SYNCH2 pin enable control bit"] #[inline(always)] - pub fn synch2pen(&self) -> SYNCH2PEN_R { - SYNCH2PEN_R::new(((self.bits >> 14) & 1) != 0) + pub fn synch2pen(&self) -> Synch2penR { + Synch2penR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - SYNCH3 pin enable control bit"] #[inline(always)] - pub fn synch3pen(&self) -> SYNCH3PEN_R { - SYNCH3PEN_R::new(((self.bits >> 15) & 1) != 0) + pub fn synch3pen(&self) -> Synch3penR { + Synch3penR::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - ASYNCH0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn asynch0pen(&mut self) -> ASYNCH0PEN_W<0> { - ASYNCH0PEN_W::new(self) + pub fn asynch0pen(&mut self) -> Asynch0penW { + Asynch0penW::new(self, 0) } #[doc = "Bit 1 - ASYNCH1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn asynch1pen(&mut self) -> ASYNCH1PEN_W<1> { - ASYNCH1PEN_W::new(self) + pub fn asynch1pen(&mut self) -> Asynch1penW { + Asynch1penW::new(self, 1) } #[doc = "Bit 2 - ASYNCH2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn asynch2pen(&mut self) -> ASYNCH2PEN_W<2> { - ASYNCH2PEN_W::new(self) + pub fn asynch2pen(&mut self) -> Asynch2penW { + Asynch2penW::new(self, 2) } #[doc = "Bit 3 - ASYNCH3 pin enable control bit"] #[inline(always)] #[must_use] - pub fn asynch3pen(&mut self) -> ASYNCH3PEN_W<3> { - ASYNCH3PEN_W::new(self) + pub fn asynch3pen(&mut self) -> Asynch3penW { + Asynch3penW::new(self, 3) } #[doc = "Bit 4 - ASYNCH4 pin enable control bit"] #[inline(always)] #[must_use] - pub fn asynch4pen(&mut self) -> ASYNCH4PEN_W<4> { - ASYNCH4PEN_W::new(self) + pub fn asynch4pen(&mut self) -> Asynch4penW { + Asynch4penW::new(self, 4) } #[doc = "Bit 5 - ASYNCH5 pin enable control bit"] #[inline(always)] #[must_use] - pub fn asynch5pen(&mut self) -> ASYNCH5PEN_W<5> { - ASYNCH5PEN_W::new(self) + pub fn asynch5pen(&mut self) -> Asynch5penW { + Asynch5penW::new(self, 5) } #[doc = "Bit 6 - ASYNCH6 pin enable control bit"] #[inline(always)] #[must_use] - pub fn asynch6pen(&mut self) -> ASYNCH6PEN_W<6> { - ASYNCH6PEN_W::new(self) + pub fn asynch6pen(&mut self) -> Asynch6penW { + Asynch6penW::new(self, 6) } #[doc = "Bit 7 - ASYNCH7 pin enable control bit"] #[inline(always)] #[must_use] - pub fn asynch7pen(&mut self) -> ASYNCH7PEN_W<7> { - ASYNCH7PEN_W::new(self) + pub fn asynch7pen(&mut self) -> Asynch7penW { + Asynch7penW::new(self, 7) } #[doc = "Bit 8 - ASYNCH8 pin enable control bit"] #[inline(always)] #[must_use] - pub fn asynch8pen(&mut self) -> ASYNCH8PEN_W<8> { - ASYNCH8PEN_W::new(self) + pub fn asynch8pen(&mut self) -> Asynch8penW { + Asynch8penW::new(self, 8) } #[doc = "Bit 9 - ASYNCH9 pin enable control bit"] #[inline(always)] #[must_use] - pub fn asynch9pen(&mut self) -> ASYNCH9PEN_W<9> { - ASYNCH9PEN_W::new(self) + pub fn asynch9pen(&mut self) -> Asynch9penW { + Asynch9penW::new(self, 9) } #[doc = "Bit 10 - ASYNCH10 pin enable control bit"] #[inline(always)] #[must_use] - pub fn asynch10pen(&mut self) -> ASYNCH10PEN_W<10> { - ASYNCH10PEN_W::new(self) + pub fn asynch10pen(&mut self) -> Asynch10penW { + Asynch10penW::new(self, 10) } #[doc = "Bit 11 - ASYNCH11 pin enable control bit"] #[inline(always)] #[must_use] - pub fn asynch11pen(&mut self) -> ASYNCH11PEN_W<11> { - ASYNCH11PEN_W::new(self) + pub fn asynch11pen(&mut self) -> Asynch11penW { + Asynch11penW::new(self, 11) } #[doc = "Bit 12 - SYNCH0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn synch0pen(&mut self) -> SYNCH0PEN_W<12> { - SYNCH0PEN_W::new(self) + pub fn synch0pen(&mut self) -> Synch0penW { + Synch0penW::new(self, 12) } #[doc = "Bit 13 - SYNCH1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn synch1pen(&mut self) -> SYNCH1PEN_W<13> { - SYNCH1PEN_W::new(self) + pub fn synch1pen(&mut self) -> Synch1penW { + Synch1penW::new(self, 13) } #[doc = "Bit 14 - SYNCH2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn synch2pen(&mut self) -> SYNCH2PEN_W<14> { - SYNCH2PEN_W::new(self) + pub fn synch2pen(&mut self) -> Synch2penW { + Synch2penW::new(self, 14) } #[doc = "Bit 15 - SYNCH3 pin enable control bit"] #[inline(always)] #[must_use] - pub fn synch3pen(&mut self) -> SYNCH3PEN_W<15> { - SYNCH3PEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn synch3pen(&mut self) -> Synch3penW { + Synch3penW::new(self, 15) } } -#[doc = "PRS0 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_routeen](index.html) module"] -pub struct PRS0_ROUTEEN_SPEC; -impl crate::RegisterSpec for PRS0_ROUTEEN_SPEC { +#[doc = "PRS0 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0RouteenSpec; +impl crate::RegisterSpec for Prs0RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_routeen::R](R) reader structure"] -impl crate::Readable for PRS0_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_routeen::W](W) writer structure"] -impl crate::Writable for PRS0_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_routeen::R`](R) reader structure"] +impl crate::Readable for Prs0RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_routeen::W`](W) writer structure"] +impl crate::Writable for Prs0RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_ROUTEEN to value 0"] -impl crate::Resettable for PRS0_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_synch0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_synch0route.rs index c20c8a9..8096db2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_synch0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_synch0route.rs @@ -1,95 +1,55 @@ #[doc = "Register `PRS0_SYNCH0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_SYNCH0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - SYNCH0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - SYNCH0 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_SYNCH0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - SYNCH0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - SYNCH0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_SYNCH0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - SYNCH0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - SYNCH0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - SYNCH0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - SYNCH0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "SYNCH0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_synch0route](index.html) module"] -pub struct PRS0_SYNCH0ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_SYNCH0ROUTE_SPEC { +#[doc = "SYNCH0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_synch0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_synch0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Synch0routeSpec; +impl crate::RegisterSpec for Prs0Synch0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_synch0route::R](R) reader structure"] -impl crate::Readable for PRS0_SYNCH0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_synch0route::W](W) writer structure"] -impl crate::Writable for PRS0_SYNCH0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_synch0route::R`](R) reader structure"] +impl crate::Readable for Prs0Synch0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_synch0route::W`](W) writer structure"] +impl crate::Writable for Prs0Synch0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_SYNCH0ROUTE to value 0"] -impl crate::Resettable for PRS0_SYNCH0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Synch0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_synch1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_synch1route.rs index 035da51..b983940 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_synch1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_synch1route.rs @@ -1,95 +1,55 @@ #[doc = "Register `PRS0_SYNCH1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_SYNCH1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - SYNCH1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - SYNCH1 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_SYNCH1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - SYNCH1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - SYNCH1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_SYNCH1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - SYNCH1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - SYNCH1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - SYNCH1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - SYNCH1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "SYNCH1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_synch1route](index.html) module"] -pub struct PRS0_SYNCH1ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_SYNCH1ROUTE_SPEC { +#[doc = "SYNCH1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_synch1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_synch1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Synch1routeSpec; +impl crate::RegisterSpec for Prs0Synch1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_synch1route::R](R) reader structure"] -impl crate::Readable for PRS0_SYNCH1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_synch1route::W](W) writer structure"] -impl crate::Writable for PRS0_SYNCH1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_synch1route::R`](R) reader structure"] +impl crate::Readable for Prs0Synch1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_synch1route::W`](W) writer structure"] +impl crate::Writable for Prs0Synch1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_SYNCH1ROUTE to value 0"] -impl crate::Resettable for PRS0_SYNCH1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Synch1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_synch2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_synch2route.rs index 96aafa5..619f279 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_synch2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_synch2route.rs @@ -1,95 +1,55 @@ #[doc = "Register `PRS0_SYNCH2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_SYNCH2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - SYNCH2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - SYNCH2 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_SYNCH2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - SYNCH2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - SYNCH2 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_SYNCH2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - SYNCH2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - SYNCH2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - SYNCH2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - SYNCH2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "SYNCH2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_synch2route](index.html) module"] -pub struct PRS0_SYNCH2ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_SYNCH2ROUTE_SPEC { +#[doc = "SYNCH2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_synch2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_synch2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Synch2routeSpec; +impl crate::RegisterSpec for Prs0Synch2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_synch2route::R](R) reader structure"] -impl crate::Readable for PRS0_SYNCH2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_synch2route::W](W) writer structure"] -impl crate::Writable for PRS0_SYNCH2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_synch2route::R`](R) reader structure"] +impl crate::Readable for Prs0Synch2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_synch2route::W`](W) writer structure"] +impl crate::Writable for Prs0Synch2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_SYNCH2ROUTE to value 0"] -impl crate::Resettable for PRS0_SYNCH2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Synch2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_synch3route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_synch3route.rs index abf6a4f..fce4917 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_synch3route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/prs0_synch3route.rs @@ -1,95 +1,55 @@ #[doc = "Register `PRS0_SYNCH3ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_SYNCH3ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - SYNCH3 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - SYNCH3 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_SYNCH3ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - SYNCH3 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - SYNCH3 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_SYNCH3ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - SYNCH3 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - SYNCH3 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - SYNCH3 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - SYNCH3 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "SYNCH3 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_synch3route](index.html) module"] -pub struct PRS0_SYNCH3ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_SYNCH3ROUTE_SPEC { +#[doc = "SYNCH3 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_synch3route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_synch3route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Synch3routeSpec; +impl crate::RegisterSpec for Prs0Synch3routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_synch3route::R](R) reader structure"] -impl crate::Readable for PRS0_SYNCH3ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_synch3route::W](W) writer structure"] -impl crate::Writable for PRS0_SYNCH3ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_synch3route::R`](R) reader structure"] +impl crate::Readable for Prs0Synch3routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_synch3route::W`](W) writer structure"] +impl crate::Writable for Prs0Synch3routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_SYNCH3ROUTE to value 0"] -impl crate::Resettable for PRS0_SYNCH3ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Synch3routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/syxo0_bufoutreqinasyncroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/syxo0_bufoutreqinasyncroute.rs index 7623953..3475712 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/syxo0_bufoutreqinasyncroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/syxo0_bufoutreqinasyncroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `SYXO0_BUFOUTREQINASYNCROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SYXO0_BUFOUTREQINASYNCROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - BUFOUTREQINASYNC port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - BUFOUTREQINASYNC port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYXO0_BUFOUTREQINASYNCROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - BUFOUTREQINASYNC pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - BUFOUTREQINASYNC pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYXO0_BUFOUTREQINASYNCROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - BUFOUTREQINASYNC port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - BUFOUTREQINASYNC pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - BUFOUTREQINASYNC port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - BUFOUTREQINASYNC pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "BUFOUTREQINASYNC port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syxo0_bufoutreqinasyncroute](index.html) module"] -pub struct SYXO0_BUFOUTREQINASYNCROUTE_SPEC; -impl crate::RegisterSpec for SYXO0_BUFOUTREQINASYNCROUTE_SPEC { +#[doc = "BUFOUTREQINASYNC port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`syxo0_bufoutreqinasyncroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`syxo0_bufoutreqinasyncroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Syxo0BufoutreqinasyncrouteSpec; +impl crate::RegisterSpec for Syxo0BufoutreqinasyncrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [syxo0_bufoutreqinasyncroute::R](R) reader structure"] -impl crate::Readable for SYXO0_BUFOUTREQINASYNCROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [syxo0_bufoutreqinasyncroute::W](W) writer structure"] -impl crate::Writable for SYXO0_BUFOUTREQINASYNCROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`syxo0_bufoutreqinasyncroute::R`](R) reader structure"] +impl crate::Readable for Syxo0BufoutreqinasyncrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`syxo0_bufoutreqinasyncroute::W`](W) writer structure"] +impl crate::Writable for Syxo0BufoutreqinasyncrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYXO0_BUFOUTREQINASYNCROUTE to value 0"] -impl crate::Resettable for SYXO0_BUFOUTREQINASYNCROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Syxo0BufoutreqinasyncrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_cc0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_cc0route.rs index 481c8b3..4ec2bdb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_cc0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_cc0route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER0_CC0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER0_CC0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC0 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER0_CC0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER0_CC0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer0_cc0route](index.html) module"] -pub struct TIMER0_CC0ROUTE_SPEC; -impl crate::RegisterSpec for TIMER0_CC0ROUTE_SPEC { +#[doc = "CC0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_cc0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_cc0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer0Cc0routeSpec; +impl crate::RegisterSpec for Timer0Cc0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer0_cc0route::R](R) reader structure"] -impl crate::Readable for TIMER0_CC0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer0_cc0route::W](W) writer structure"] -impl crate::Writable for TIMER0_CC0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer0_cc0route::R`](R) reader structure"] +impl crate::Readable for Timer0Cc0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer0_cc0route::W`](W) writer structure"] +impl crate::Writable for Timer0Cc0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER0_CC0ROUTE to value 0"] -impl crate::Resettable for TIMER0_CC0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer0Cc0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_cc1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_cc1route.rs index 6799a3f..d936c44 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_cc1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_cc1route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER0_CC1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER0_CC1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC1 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER0_CC1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER0_CC1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer0_cc1route](index.html) module"] -pub struct TIMER0_CC1ROUTE_SPEC; -impl crate::RegisterSpec for TIMER0_CC1ROUTE_SPEC { +#[doc = "CC1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_cc1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_cc1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer0Cc1routeSpec; +impl crate::RegisterSpec for Timer0Cc1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer0_cc1route::R](R) reader structure"] -impl crate::Readable for TIMER0_CC1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer0_cc1route::W](W) writer structure"] -impl crate::Writable for TIMER0_CC1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer0_cc1route::R`](R) reader structure"] +impl crate::Readable for Timer0Cc1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer0_cc1route::W`](W) writer structure"] +impl crate::Writable for Timer0Cc1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER0_CC1ROUTE to value 0"] -impl crate::Resettable for TIMER0_CC1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer0Cc1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_cc2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_cc2route.rs index 5f690f5..6693a63 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_cc2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_cc2route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER0_CC2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER0_CC2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC2 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER0_CC2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC2 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER0_CC2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer0_cc2route](index.html) module"] -pub struct TIMER0_CC2ROUTE_SPEC; -impl crate::RegisterSpec for TIMER0_CC2ROUTE_SPEC { +#[doc = "CC2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_cc2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_cc2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer0Cc2routeSpec; +impl crate::RegisterSpec for Timer0Cc2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer0_cc2route::R](R) reader structure"] -impl crate::Readable for TIMER0_CC2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer0_cc2route::W](W) writer structure"] -impl crate::Writable for TIMER0_CC2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer0_cc2route::R`](R) reader structure"] +impl crate::Readable for Timer0Cc2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer0_cc2route::W`](W) writer structure"] +impl crate::Writable for Timer0Cc2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER0_CC2ROUTE to value 0"] -impl crate::Resettable for TIMER0_CC2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer0Cc2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_cdti0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_cdti0route.rs index a5c05da..9a7d623 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_cdti0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_cdti0route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER0_CDTI0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER0_CDTI0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI0 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER0_CDTI0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER0_CDTI0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer0_cdti0route](index.html) module"] -pub struct TIMER0_CDTI0ROUTE_SPEC; -impl crate::RegisterSpec for TIMER0_CDTI0ROUTE_SPEC { +#[doc = "CDTI0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_cdti0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_cdti0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer0Cdti0routeSpec; +impl crate::RegisterSpec for Timer0Cdti0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer0_cdti0route::R](R) reader structure"] -impl crate::Readable for TIMER0_CDTI0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer0_cdti0route::W](W) writer structure"] -impl crate::Writable for TIMER0_CDTI0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer0_cdti0route::R`](R) reader structure"] +impl crate::Readable for Timer0Cdti0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer0_cdti0route::W`](W) writer structure"] +impl crate::Writable for Timer0Cdti0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER0_CDTI0ROUTE to value 0"] -impl crate::Resettable for TIMER0_CDTI0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer0Cdti0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_cdti1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_cdti1route.rs index a620e22..09cad0e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_cdti1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_cdti1route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER0_CDTI1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER0_CDTI1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI1 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER0_CDTI1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER0_CDTI1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer0_cdti1route](index.html) module"] -pub struct TIMER0_CDTI1ROUTE_SPEC; -impl crate::RegisterSpec for TIMER0_CDTI1ROUTE_SPEC { +#[doc = "CDTI1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_cdti1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_cdti1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer0Cdti1routeSpec; +impl crate::RegisterSpec for Timer0Cdti1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer0_cdti1route::R](R) reader structure"] -impl crate::Readable for TIMER0_CDTI1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer0_cdti1route::W](W) writer structure"] -impl crate::Writable for TIMER0_CDTI1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer0_cdti1route::R`](R) reader structure"] +impl crate::Readable for Timer0Cdti1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer0_cdti1route::W`](W) writer structure"] +impl crate::Writable for Timer0Cdti1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER0_CDTI1ROUTE to value 0"] -impl crate::Resettable for TIMER0_CDTI1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer0Cdti1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_cdti2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_cdti2route.rs index 357f788..17e3409 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_cdti2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_cdti2route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER0_CDTI2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER0_CDTI2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI2 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER0_CDTI2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI2 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER0_CDTI2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer0_cdti2route](index.html) module"] -pub struct TIMER0_CDTI2ROUTE_SPEC; -impl crate::RegisterSpec for TIMER0_CDTI2ROUTE_SPEC { +#[doc = "CDTI2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_cdti2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_cdti2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer0Cdti2routeSpec; +impl crate::RegisterSpec for Timer0Cdti2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer0_cdti2route::R](R) reader structure"] -impl crate::Readable for TIMER0_CDTI2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer0_cdti2route::W](W) writer structure"] -impl crate::Writable for TIMER0_CDTI2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer0_cdti2route::R`](R) reader structure"] +impl crate::Readable for Timer0Cdti2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer0_cdti2route::W`](W) writer structure"] +impl crate::Writable for Timer0Cdti2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER0_CDTI2ROUTE to value 0"] -impl crate::Resettable for TIMER0_CDTI2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer0Cdti2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_routeen.rs index c1973c4..17f88c6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer0_routeen.rs @@ -1,155 +1,115 @@ #[doc = "Register `TIMER0_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER0_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CC0PEN` reader - CC0 pin enable control bit"] -pub type CC0PEN_R = crate::BitReader; +pub type Cc0penR = crate::BitReader; #[doc = "Field `CC0PEN` writer - CC0 pin enable control bit"] -pub type CC0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER0_ROUTEEN_SPEC, bool, O>; +pub type Cc0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1PEN` reader - CC1 pin enable control bit"] -pub type CC1PEN_R = crate::BitReader; +pub type Cc1penR = crate::BitReader; #[doc = "Field `CC1PEN` writer - CC1 pin enable control bit"] -pub type CC1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER0_ROUTEEN_SPEC, bool, O>; +pub type Cc1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2PEN` reader - CC2 pin enable control bit"] -pub type CC2PEN_R = crate::BitReader; +pub type Cc2penR = crate::BitReader; #[doc = "Field `CC2PEN` writer - CC2 pin enable control bit"] -pub type CC2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER0_ROUTEEN_SPEC, bool, O>; +pub type Cc2penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC0PEN` reader - CDTI0 pin enable control bit"] -pub type CCC0PEN_R = crate::BitReader; +pub type Ccc0penR = crate::BitReader; #[doc = "Field `CCC0PEN` writer - CDTI0 pin enable control bit"] -pub type CCC0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER0_ROUTEEN_SPEC, bool, O>; +pub type Ccc0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC1PEN` reader - CDTI1 pin enable control bit"] -pub type CCC1PEN_R = crate::BitReader; +pub type Ccc1penR = crate::BitReader; #[doc = "Field `CCC1PEN` writer - CDTI1 pin enable control bit"] -pub type CCC1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER0_ROUTEEN_SPEC, bool, O>; +pub type Ccc1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC2PEN` reader - CDTI2 pin enable control bit"] -pub type CCC2PEN_R = crate::BitReader; +pub type Ccc2penR = crate::BitReader; #[doc = "Field `CCC2PEN` writer - CDTI2 pin enable control bit"] -pub type CCC2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER0_ROUTEEN_SPEC, bool, O>; +pub type Ccc2penW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CC0 pin enable control bit"] #[inline(always)] - pub fn cc0pen(&self) -> CC0PEN_R { - CC0PEN_R::new((self.bits & 1) != 0) + pub fn cc0pen(&self) -> Cc0penR { + Cc0penR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CC1 pin enable control bit"] #[inline(always)] - pub fn cc1pen(&self) -> CC1PEN_R { - CC1PEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn cc1pen(&self) -> Cc1penR { + Cc1penR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CC2 pin enable control bit"] #[inline(always)] - pub fn cc2pen(&self) -> CC2PEN_R { - CC2PEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn cc2pen(&self) -> Cc2penR { + Cc2penR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - CDTI0 pin enable control bit"] #[inline(always)] - pub fn ccc0pen(&self) -> CCC0PEN_R { - CCC0PEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn ccc0pen(&self) -> Ccc0penR { + Ccc0penR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - CDTI1 pin enable control bit"] #[inline(always)] - pub fn ccc1pen(&self) -> CCC1PEN_R { - CCC1PEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn ccc1pen(&self) -> Ccc1penR { + Ccc1penR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CDTI2 pin enable control bit"] #[inline(always)] - pub fn ccc2pen(&self) -> CCC2PEN_R { - CCC2PEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn ccc2pen(&self) -> Ccc2penR { + Ccc2penR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - CC0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc0pen(&mut self) -> CC0PEN_W<0> { - CC0PEN_W::new(self) + pub fn cc0pen(&mut self) -> Cc0penW { + Cc0penW::new(self, 0) } #[doc = "Bit 1 - CC1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc1pen(&mut self) -> CC1PEN_W<1> { - CC1PEN_W::new(self) + pub fn cc1pen(&mut self) -> Cc1penW { + Cc1penW::new(self, 1) } #[doc = "Bit 2 - CC2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc2pen(&mut self) -> CC2PEN_W<2> { - CC2PEN_W::new(self) + pub fn cc2pen(&mut self) -> Cc2penW { + Cc2penW::new(self, 2) } #[doc = "Bit 3 - CDTI0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc0pen(&mut self) -> CCC0PEN_W<3> { - CCC0PEN_W::new(self) + pub fn ccc0pen(&mut self) -> Ccc0penW { + Ccc0penW::new(self, 3) } #[doc = "Bit 4 - CDTI1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc1pen(&mut self) -> CCC1PEN_W<4> { - CCC1PEN_W::new(self) + pub fn ccc1pen(&mut self) -> Ccc1penW { + Ccc1penW::new(self, 4) } #[doc = "Bit 5 - CDTI2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc2pen(&mut self) -> CCC2PEN_W<5> { - CCC2PEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ccc2pen(&mut self) -> Ccc2penW { + Ccc2penW::new(self, 5) } } -#[doc = "TIMER0 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer0_routeen](index.html) module"] -pub struct TIMER0_ROUTEEN_SPEC; -impl crate::RegisterSpec for TIMER0_ROUTEEN_SPEC { +#[doc = "TIMER0 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer0RouteenSpec; +impl crate::RegisterSpec for Timer0RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer0_routeen::R](R) reader structure"] -impl crate::Readable for TIMER0_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer0_routeen::W](W) writer structure"] -impl crate::Writable for TIMER0_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer0_routeen::R`](R) reader structure"] +impl crate::Readable for Timer0RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`timer0_routeen::W`](W) writer structure"] +impl crate::Writable for Timer0RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER0_ROUTEEN to value 0"] -impl crate::Resettable for TIMER0_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer0RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_cc0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_cc0route.rs index 8670b50..fad29a0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_cc0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_cc0route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER1_CC0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER1_CC0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC0 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER1_CC0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER1_CC0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer1_cc0route](index.html) module"] -pub struct TIMER1_CC0ROUTE_SPEC; -impl crate::RegisterSpec for TIMER1_CC0ROUTE_SPEC { +#[doc = "CC0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_cc0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_cc0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer1Cc0routeSpec; +impl crate::RegisterSpec for Timer1Cc0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer1_cc0route::R](R) reader structure"] -impl crate::Readable for TIMER1_CC0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer1_cc0route::W](W) writer structure"] -impl crate::Writable for TIMER1_CC0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer1_cc0route::R`](R) reader structure"] +impl crate::Readable for Timer1Cc0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer1_cc0route::W`](W) writer structure"] +impl crate::Writable for Timer1Cc0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER1_CC0ROUTE to value 0"] -impl crate::Resettable for TIMER1_CC0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer1Cc0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_cc1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_cc1route.rs index 8eac1ce..100f473 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_cc1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_cc1route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER1_CC1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER1_CC1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC1 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER1_CC1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER1_CC1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer1_cc1route](index.html) module"] -pub struct TIMER1_CC1ROUTE_SPEC; -impl crate::RegisterSpec for TIMER1_CC1ROUTE_SPEC { +#[doc = "CC1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_cc1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_cc1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer1Cc1routeSpec; +impl crate::RegisterSpec for Timer1Cc1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer1_cc1route::R](R) reader structure"] -impl crate::Readable for TIMER1_CC1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer1_cc1route::W](W) writer structure"] -impl crate::Writable for TIMER1_CC1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer1_cc1route::R`](R) reader structure"] +impl crate::Readable for Timer1Cc1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer1_cc1route::W`](W) writer structure"] +impl crate::Writable for Timer1Cc1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER1_CC1ROUTE to value 0"] -impl crate::Resettable for TIMER1_CC1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer1Cc1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_cc2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_cc2route.rs index 60fd04b..f01efc6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_cc2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_cc2route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER1_CC2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER1_CC2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC2 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER1_CC2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC2 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER1_CC2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer1_cc2route](index.html) module"] -pub struct TIMER1_CC2ROUTE_SPEC; -impl crate::RegisterSpec for TIMER1_CC2ROUTE_SPEC { +#[doc = "CC2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_cc2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_cc2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer1Cc2routeSpec; +impl crate::RegisterSpec for Timer1Cc2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer1_cc2route::R](R) reader structure"] -impl crate::Readable for TIMER1_CC2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer1_cc2route::W](W) writer structure"] -impl crate::Writable for TIMER1_CC2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer1_cc2route::R`](R) reader structure"] +impl crate::Readable for Timer1Cc2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer1_cc2route::W`](W) writer structure"] +impl crate::Writable for Timer1Cc2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER1_CC2ROUTE to value 0"] -impl crate::Resettable for TIMER1_CC2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer1Cc2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_cdti0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_cdti0route.rs index d07608d..7533392 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_cdti0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_cdti0route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER1_CDTI0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER1_CDTI0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI0 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER1_CDTI0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER1_CDTI0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer1_cdti0route](index.html) module"] -pub struct TIMER1_CDTI0ROUTE_SPEC; -impl crate::RegisterSpec for TIMER1_CDTI0ROUTE_SPEC { +#[doc = "CDTI0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_cdti0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_cdti0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer1Cdti0routeSpec; +impl crate::RegisterSpec for Timer1Cdti0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer1_cdti0route::R](R) reader structure"] -impl crate::Readable for TIMER1_CDTI0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer1_cdti0route::W](W) writer structure"] -impl crate::Writable for TIMER1_CDTI0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer1_cdti0route::R`](R) reader structure"] +impl crate::Readable for Timer1Cdti0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer1_cdti0route::W`](W) writer structure"] +impl crate::Writable for Timer1Cdti0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER1_CDTI0ROUTE to value 0"] -impl crate::Resettable for TIMER1_CDTI0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer1Cdti0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_cdti1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_cdti1route.rs index 4002b2f..709af15 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_cdti1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_cdti1route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER1_CDTI1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER1_CDTI1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI1 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER1_CDTI1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER1_CDTI1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer1_cdti1route](index.html) module"] -pub struct TIMER1_CDTI1ROUTE_SPEC; -impl crate::RegisterSpec for TIMER1_CDTI1ROUTE_SPEC { +#[doc = "CDTI1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_cdti1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_cdti1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer1Cdti1routeSpec; +impl crate::RegisterSpec for Timer1Cdti1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer1_cdti1route::R](R) reader structure"] -impl crate::Readable for TIMER1_CDTI1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer1_cdti1route::W](W) writer structure"] -impl crate::Writable for TIMER1_CDTI1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer1_cdti1route::R`](R) reader structure"] +impl crate::Readable for Timer1Cdti1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer1_cdti1route::W`](W) writer structure"] +impl crate::Writable for Timer1Cdti1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER1_CDTI1ROUTE to value 0"] -impl crate::Resettable for TIMER1_CDTI1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer1Cdti1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_cdti2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_cdti2route.rs index 522f509..1c29939 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_cdti2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_cdti2route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER1_CDTI2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER1_CDTI2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI2 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER1_CDTI2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI2 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER1_CDTI2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer1_cdti2route](index.html) module"] -pub struct TIMER1_CDTI2ROUTE_SPEC; -impl crate::RegisterSpec for TIMER1_CDTI2ROUTE_SPEC { +#[doc = "CDTI2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_cdti2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_cdti2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer1Cdti2routeSpec; +impl crate::RegisterSpec for Timer1Cdti2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer1_cdti2route::R](R) reader structure"] -impl crate::Readable for TIMER1_CDTI2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer1_cdti2route::W](W) writer structure"] -impl crate::Writable for TIMER1_CDTI2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer1_cdti2route::R`](R) reader structure"] +impl crate::Readable for Timer1Cdti2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer1_cdti2route::W`](W) writer structure"] +impl crate::Writable for Timer1Cdti2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER1_CDTI2ROUTE to value 0"] -impl crate::Resettable for TIMER1_CDTI2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer1Cdti2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_routeen.rs index a6d053e..5549ab0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer1_routeen.rs @@ -1,155 +1,115 @@ #[doc = "Register `TIMER1_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER1_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CC0PEN` reader - CC0 pin enable control bit"] -pub type CC0PEN_R = crate::BitReader; +pub type Cc0penR = crate::BitReader; #[doc = "Field `CC0PEN` writer - CC0 pin enable control bit"] -pub type CC0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER1_ROUTEEN_SPEC, bool, O>; +pub type Cc0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1PEN` reader - CC1 pin enable control bit"] -pub type CC1PEN_R = crate::BitReader; +pub type Cc1penR = crate::BitReader; #[doc = "Field `CC1PEN` writer - CC1 pin enable control bit"] -pub type CC1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER1_ROUTEEN_SPEC, bool, O>; +pub type Cc1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2PEN` reader - CC2 pin enable control bit"] -pub type CC2PEN_R = crate::BitReader; +pub type Cc2penR = crate::BitReader; #[doc = "Field `CC2PEN` writer - CC2 pin enable control bit"] -pub type CC2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER1_ROUTEEN_SPEC, bool, O>; +pub type Cc2penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC0PEN` reader - CDTI0 pin enable control bit"] -pub type CCC0PEN_R = crate::BitReader; +pub type Ccc0penR = crate::BitReader; #[doc = "Field `CCC0PEN` writer - CDTI0 pin enable control bit"] -pub type CCC0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER1_ROUTEEN_SPEC, bool, O>; +pub type Ccc0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC1PEN` reader - CDTI1 pin enable control bit"] -pub type CCC1PEN_R = crate::BitReader; +pub type Ccc1penR = crate::BitReader; #[doc = "Field `CCC1PEN` writer - CDTI1 pin enable control bit"] -pub type CCC1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER1_ROUTEEN_SPEC, bool, O>; +pub type Ccc1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC2PEN` reader - CDTI2 pin enable control bit"] -pub type CCC2PEN_R = crate::BitReader; +pub type Ccc2penR = crate::BitReader; #[doc = "Field `CCC2PEN` writer - CDTI2 pin enable control bit"] -pub type CCC2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER1_ROUTEEN_SPEC, bool, O>; +pub type Ccc2penW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CC0 pin enable control bit"] #[inline(always)] - pub fn cc0pen(&self) -> CC0PEN_R { - CC0PEN_R::new((self.bits & 1) != 0) + pub fn cc0pen(&self) -> Cc0penR { + Cc0penR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CC1 pin enable control bit"] #[inline(always)] - pub fn cc1pen(&self) -> CC1PEN_R { - CC1PEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn cc1pen(&self) -> Cc1penR { + Cc1penR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CC2 pin enable control bit"] #[inline(always)] - pub fn cc2pen(&self) -> CC2PEN_R { - CC2PEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn cc2pen(&self) -> Cc2penR { + Cc2penR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - CDTI0 pin enable control bit"] #[inline(always)] - pub fn ccc0pen(&self) -> CCC0PEN_R { - CCC0PEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn ccc0pen(&self) -> Ccc0penR { + Ccc0penR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - CDTI1 pin enable control bit"] #[inline(always)] - pub fn ccc1pen(&self) -> CCC1PEN_R { - CCC1PEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn ccc1pen(&self) -> Ccc1penR { + Ccc1penR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CDTI2 pin enable control bit"] #[inline(always)] - pub fn ccc2pen(&self) -> CCC2PEN_R { - CCC2PEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn ccc2pen(&self) -> Ccc2penR { + Ccc2penR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - CC0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc0pen(&mut self) -> CC0PEN_W<0> { - CC0PEN_W::new(self) + pub fn cc0pen(&mut self) -> Cc0penW { + Cc0penW::new(self, 0) } #[doc = "Bit 1 - CC1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc1pen(&mut self) -> CC1PEN_W<1> { - CC1PEN_W::new(self) + pub fn cc1pen(&mut self) -> Cc1penW { + Cc1penW::new(self, 1) } #[doc = "Bit 2 - CC2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc2pen(&mut self) -> CC2PEN_W<2> { - CC2PEN_W::new(self) + pub fn cc2pen(&mut self) -> Cc2penW { + Cc2penW::new(self, 2) } #[doc = "Bit 3 - CDTI0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc0pen(&mut self) -> CCC0PEN_W<3> { - CCC0PEN_W::new(self) + pub fn ccc0pen(&mut self) -> Ccc0penW { + Ccc0penW::new(self, 3) } #[doc = "Bit 4 - CDTI1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc1pen(&mut self) -> CCC1PEN_W<4> { - CCC1PEN_W::new(self) + pub fn ccc1pen(&mut self) -> Ccc1penW { + Ccc1penW::new(self, 4) } #[doc = "Bit 5 - CDTI2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc2pen(&mut self) -> CCC2PEN_W<5> { - CCC2PEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ccc2pen(&mut self) -> Ccc2penW { + Ccc2penW::new(self, 5) } } -#[doc = "TIMER1 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer1_routeen](index.html) module"] -pub struct TIMER1_ROUTEEN_SPEC; -impl crate::RegisterSpec for TIMER1_ROUTEEN_SPEC { +#[doc = "TIMER1 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer1RouteenSpec; +impl crate::RegisterSpec for Timer1RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer1_routeen::R](R) reader structure"] -impl crate::Readable for TIMER1_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer1_routeen::W](W) writer structure"] -impl crate::Writable for TIMER1_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer1_routeen::R`](R) reader structure"] +impl crate::Readable for Timer1RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`timer1_routeen::W`](W) writer structure"] +impl crate::Writable for Timer1RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER1_ROUTEEN to value 0"] -impl crate::Resettable for TIMER1_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer1RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_cc0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_cc0route.rs index fde8ba1..5bb7929 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_cc0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_cc0route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER2_CC0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER2_CC0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC0 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER2_CC0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER2_CC0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer2_cc0route](index.html) module"] -pub struct TIMER2_CC0ROUTE_SPEC; -impl crate::RegisterSpec for TIMER2_CC0ROUTE_SPEC { +#[doc = "CC0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_cc0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_cc0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer2Cc0routeSpec; +impl crate::RegisterSpec for Timer2Cc0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer2_cc0route::R](R) reader structure"] -impl crate::Readable for TIMER2_CC0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer2_cc0route::W](W) writer structure"] -impl crate::Writable for TIMER2_CC0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer2_cc0route::R`](R) reader structure"] +impl crate::Readable for Timer2Cc0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer2_cc0route::W`](W) writer structure"] +impl crate::Writable for Timer2Cc0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER2_CC0ROUTE to value 0"] -impl crate::Resettable for TIMER2_CC0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer2Cc0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_cc1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_cc1route.rs index c7360e9..1387809 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_cc1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_cc1route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER2_CC1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER2_CC1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC1 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER2_CC1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER2_CC1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer2_cc1route](index.html) module"] -pub struct TIMER2_CC1ROUTE_SPEC; -impl crate::RegisterSpec for TIMER2_CC1ROUTE_SPEC { +#[doc = "CC1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_cc1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_cc1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer2Cc1routeSpec; +impl crate::RegisterSpec for Timer2Cc1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer2_cc1route::R](R) reader structure"] -impl crate::Readable for TIMER2_CC1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer2_cc1route::W](W) writer structure"] -impl crate::Writable for TIMER2_CC1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer2_cc1route::R`](R) reader structure"] +impl crate::Readable for Timer2Cc1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer2_cc1route::W`](W) writer structure"] +impl crate::Writable for Timer2Cc1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER2_CC1ROUTE to value 0"] -impl crate::Resettable for TIMER2_CC1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer2Cc1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_cc2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_cc2route.rs index d3f18b0..e151f34 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_cc2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_cc2route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER2_CC2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER2_CC2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC2 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER2_CC2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC2 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER2_CC2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer2_cc2route](index.html) module"] -pub struct TIMER2_CC2ROUTE_SPEC; -impl crate::RegisterSpec for TIMER2_CC2ROUTE_SPEC { +#[doc = "CC2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_cc2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_cc2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer2Cc2routeSpec; +impl crate::RegisterSpec for Timer2Cc2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer2_cc2route::R](R) reader structure"] -impl crate::Readable for TIMER2_CC2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer2_cc2route::W](W) writer structure"] -impl crate::Writable for TIMER2_CC2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer2_cc2route::R`](R) reader structure"] +impl crate::Readable for Timer2Cc2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer2_cc2route::W`](W) writer structure"] +impl crate::Writable for Timer2Cc2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER2_CC2ROUTE to value 0"] -impl crate::Resettable for TIMER2_CC2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer2Cc2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_cdti0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_cdti0route.rs index d9bfe1c..47cf68a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_cdti0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_cdti0route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER2_CDTI0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER2_CDTI0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI0 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER2_CDTI0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER2_CDTI0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer2_cdti0route](index.html) module"] -pub struct TIMER2_CDTI0ROUTE_SPEC; -impl crate::RegisterSpec for TIMER2_CDTI0ROUTE_SPEC { +#[doc = "CDTI0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_cdti0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_cdti0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer2Cdti0routeSpec; +impl crate::RegisterSpec for Timer2Cdti0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer2_cdti0route::R](R) reader structure"] -impl crate::Readable for TIMER2_CDTI0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer2_cdti0route::W](W) writer structure"] -impl crate::Writable for TIMER2_CDTI0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer2_cdti0route::R`](R) reader structure"] +impl crate::Readable for Timer2Cdti0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer2_cdti0route::W`](W) writer structure"] +impl crate::Writable for Timer2Cdti0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER2_CDTI0ROUTE to value 0"] -impl crate::Resettable for TIMER2_CDTI0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer2Cdti0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_cdti1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_cdti1route.rs index 90f4c8c..9c7c030 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_cdti1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_cdti1route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER2_CDTI1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER2_CDTI1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI1 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER2_CDTI1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER2_CDTI1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer2_cdti1route](index.html) module"] -pub struct TIMER2_CDTI1ROUTE_SPEC; -impl crate::RegisterSpec for TIMER2_CDTI1ROUTE_SPEC { +#[doc = "CDTI1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_cdti1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_cdti1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer2Cdti1routeSpec; +impl crate::RegisterSpec for Timer2Cdti1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer2_cdti1route::R](R) reader structure"] -impl crate::Readable for TIMER2_CDTI1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer2_cdti1route::W](W) writer structure"] -impl crate::Writable for TIMER2_CDTI1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer2_cdti1route::R`](R) reader structure"] +impl crate::Readable for Timer2Cdti1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer2_cdti1route::W`](W) writer structure"] +impl crate::Writable for Timer2Cdti1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER2_CDTI1ROUTE to value 0"] -impl crate::Resettable for TIMER2_CDTI1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer2Cdti1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_cdti2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_cdti2route.rs index 4d4ab33..95bcb73 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_cdti2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_cdti2route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER2_CDTI2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER2_CDTI2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI2 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER2_CDTI2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI2 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER2_CDTI2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer2_cdti2route](index.html) module"] -pub struct TIMER2_CDTI2ROUTE_SPEC; -impl crate::RegisterSpec for TIMER2_CDTI2ROUTE_SPEC { +#[doc = "CDTI2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_cdti2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_cdti2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer2Cdti2routeSpec; +impl crate::RegisterSpec for Timer2Cdti2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer2_cdti2route::R](R) reader structure"] -impl crate::Readable for TIMER2_CDTI2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer2_cdti2route::W](W) writer structure"] -impl crate::Writable for TIMER2_CDTI2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer2_cdti2route::R`](R) reader structure"] +impl crate::Readable for Timer2Cdti2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer2_cdti2route::W`](W) writer structure"] +impl crate::Writable for Timer2Cdti2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER2_CDTI2ROUTE to value 0"] -impl crate::Resettable for TIMER2_CDTI2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer2Cdti2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_routeen.rs index 0aca82a..b0505d1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer2_routeen.rs @@ -1,155 +1,115 @@ #[doc = "Register `TIMER2_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER2_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CC0PEN` reader - CC0 pin enable control bit"] -pub type CC0PEN_R = crate::BitReader; +pub type Cc0penR = crate::BitReader; #[doc = "Field `CC0PEN` writer - CC0 pin enable control bit"] -pub type CC0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER2_ROUTEEN_SPEC, bool, O>; +pub type Cc0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1PEN` reader - CC1 pin enable control bit"] -pub type CC1PEN_R = crate::BitReader; +pub type Cc1penR = crate::BitReader; #[doc = "Field `CC1PEN` writer - CC1 pin enable control bit"] -pub type CC1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER2_ROUTEEN_SPEC, bool, O>; +pub type Cc1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2PEN` reader - CC2 pin enable control bit"] -pub type CC2PEN_R = crate::BitReader; +pub type Cc2penR = crate::BitReader; #[doc = "Field `CC2PEN` writer - CC2 pin enable control bit"] -pub type CC2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER2_ROUTEEN_SPEC, bool, O>; +pub type Cc2penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC0PEN` reader - CDTI0 pin enable control bit"] -pub type CCC0PEN_R = crate::BitReader; +pub type Ccc0penR = crate::BitReader; #[doc = "Field `CCC0PEN` writer - CDTI0 pin enable control bit"] -pub type CCC0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER2_ROUTEEN_SPEC, bool, O>; +pub type Ccc0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC1PEN` reader - CDTI1 pin enable control bit"] -pub type CCC1PEN_R = crate::BitReader; +pub type Ccc1penR = crate::BitReader; #[doc = "Field `CCC1PEN` writer - CDTI1 pin enable control bit"] -pub type CCC1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER2_ROUTEEN_SPEC, bool, O>; +pub type Ccc1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC2PEN` reader - CDTI2 pin enable control bit"] -pub type CCC2PEN_R = crate::BitReader; +pub type Ccc2penR = crate::BitReader; #[doc = "Field `CCC2PEN` writer - CDTI2 pin enable control bit"] -pub type CCC2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER2_ROUTEEN_SPEC, bool, O>; +pub type Ccc2penW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CC0 pin enable control bit"] #[inline(always)] - pub fn cc0pen(&self) -> CC0PEN_R { - CC0PEN_R::new((self.bits & 1) != 0) + pub fn cc0pen(&self) -> Cc0penR { + Cc0penR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CC1 pin enable control bit"] #[inline(always)] - pub fn cc1pen(&self) -> CC1PEN_R { - CC1PEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn cc1pen(&self) -> Cc1penR { + Cc1penR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CC2 pin enable control bit"] #[inline(always)] - pub fn cc2pen(&self) -> CC2PEN_R { - CC2PEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn cc2pen(&self) -> Cc2penR { + Cc2penR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - CDTI0 pin enable control bit"] #[inline(always)] - pub fn ccc0pen(&self) -> CCC0PEN_R { - CCC0PEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn ccc0pen(&self) -> Ccc0penR { + Ccc0penR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - CDTI1 pin enable control bit"] #[inline(always)] - pub fn ccc1pen(&self) -> CCC1PEN_R { - CCC1PEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn ccc1pen(&self) -> Ccc1penR { + Ccc1penR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CDTI2 pin enable control bit"] #[inline(always)] - pub fn ccc2pen(&self) -> CCC2PEN_R { - CCC2PEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn ccc2pen(&self) -> Ccc2penR { + Ccc2penR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - CC0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc0pen(&mut self) -> CC0PEN_W<0> { - CC0PEN_W::new(self) + pub fn cc0pen(&mut self) -> Cc0penW { + Cc0penW::new(self, 0) } #[doc = "Bit 1 - CC1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc1pen(&mut self) -> CC1PEN_W<1> { - CC1PEN_W::new(self) + pub fn cc1pen(&mut self) -> Cc1penW { + Cc1penW::new(self, 1) } #[doc = "Bit 2 - CC2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc2pen(&mut self) -> CC2PEN_W<2> { - CC2PEN_W::new(self) + pub fn cc2pen(&mut self) -> Cc2penW { + Cc2penW::new(self, 2) } #[doc = "Bit 3 - CDTI0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc0pen(&mut self) -> CCC0PEN_W<3> { - CCC0PEN_W::new(self) + pub fn ccc0pen(&mut self) -> Ccc0penW { + Ccc0penW::new(self, 3) } #[doc = "Bit 4 - CDTI1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc1pen(&mut self) -> CCC1PEN_W<4> { - CCC1PEN_W::new(self) + pub fn ccc1pen(&mut self) -> Ccc1penW { + Ccc1penW::new(self, 4) } #[doc = "Bit 5 - CDTI2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc2pen(&mut self) -> CCC2PEN_W<5> { - CCC2PEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ccc2pen(&mut self) -> Ccc2penW { + Ccc2penW::new(self, 5) } } -#[doc = "TIMER2 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer2_routeen](index.html) module"] -pub struct TIMER2_ROUTEEN_SPEC; -impl crate::RegisterSpec for TIMER2_ROUTEEN_SPEC { +#[doc = "TIMER2 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer2RouteenSpec; +impl crate::RegisterSpec for Timer2RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer2_routeen::R](R) reader structure"] -impl crate::Readable for TIMER2_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer2_routeen::W](W) writer structure"] -impl crate::Writable for TIMER2_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer2_routeen::R`](R) reader structure"] +impl crate::Readable for Timer2RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`timer2_routeen::W`](W) writer structure"] +impl crate::Writable for Timer2RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER2_ROUTEEN to value 0"] -impl crate::Resettable for TIMER2_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer2RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_cc0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_cc0route.rs index b1809c3..29ee690 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_cc0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_cc0route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER3_CC0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER3_CC0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC0 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER3_CC0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER3_CC0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer3_cc0route](index.html) module"] -pub struct TIMER3_CC0ROUTE_SPEC; -impl crate::RegisterSpec for TIMER3_CC0ROUTE_SPEC { +#[doc = "CC0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_cc0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_cc0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer3Cc0routeSpec; +impl crate::RegisterSpec for Timer3Cc0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer3_cc0route::R](R) reader structure"] -impl crate::Readable for TIMER3_CC0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer3_cc0route::W](W) writer structure"] -impl crate::Writable for TIMER3_CC0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer3_cc0route::R`](R) reader structure"] +impl crate::Readable for Timer3Cc0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer3_cc0route::W`](W) writer structure"] +impl crate::Writable for Timer3Cc0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER3_CC0ROUTE to value 0"] -impl crate::Resettable for TIMER3_CC0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer3Cc0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_cc1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_cc1route.rs index 90a874b..0c2488d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_cc1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_cc1route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER3_CC1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER3_CC1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC1 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER3_CC1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER3_CC1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer3_cc1route](index.html) module"] -pub struct TIMER3_CC1ROUTE_SPEC; -impl crate::RegisterSpec for TIMER3_CC1ROUTE_SPEC { +#[doc = "CC1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_cc1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_cc1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer3Cc1routeSpec; +impl crate::RegisterSpec for Timer3Cc1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer3_cc1route::R](R) reader structure"] -impl crate::Readable for TIMER3_CC1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer3_cc1route::W](W) writer structure"] -impl crate::Writable for TIMER3_CC1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer3_cc1route::R`](R) reader structure"] +impl crate::Readable for Timer3Cc1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer3_cc1route::W`](W) writer structure"] +impl crate::Writable for Timer3Cc1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER3_CC1ROUTE to value 0"] -impl crate::Resettable for TIMER3_CC1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer3Cc1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_cc2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_cc2route.rs index 15c96a3..124f588 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_cc2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_cc2route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER3_CC2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER3_CC2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC2 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER3_CC2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC2 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER3_CC2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer3_cc2route](index.html) module"] -pub struct TIMER3_CC2ROUTE_SPEC; -impl crate::RegisterSpec for TIMER3_CC2ROUTE_SPEC { +#[doc = "CC2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_cc2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_cc2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer3Cc2routeSpec; +impl crate::RegisterSpec for Timer3Cc2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer3_cc2route::R](R) reader structure"] -impl crate::Readable for TIMER3_CC2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer3_cc2route::W](W) writer structure"] -impl crate::Writable for TIMER3_CC2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer3_cc2route::R`](R) reader structure"] +impl crate::Readable for Timer3Cc2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer3_cc2route::W`](W) writer structure"] +impl crate::Writable for Timer3Cc2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER3_CC2ROUTE to value 0"] -impl crate::Resettable for TIMER3_CC2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer3Cc2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_cdti0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_cdti0route.rs index 10932ce..eea08c0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_cdti0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_cdti0route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER3_CDTI0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER3_CDTI0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI0 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER3_CDTI0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER3_CDTI0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer3_cdti0route](index.html) module"] -pub struct TIMER3_CDTI0ROUTE_SPEC; -impl crate::RegisterSpec for TIMER3_CDTI0ROUTE_SPEC { +#[doc = "CDTI0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_cdti0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_cdti0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer3Cdti0routeSpec; +impl crate::RegisterSpec for Timer3Cdti0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer3_cdti0route::R](R) reader structure"] -impl crate::Readable for TIMER3_CDTI0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer3_cdti0route::W](W) writer structure"] -impl crate::Writable for TIMER3_CDTI0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer3_cdti0route::R`](R) reader structure"] +impl crate::Readable for Timer3Cdti0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer3_cdti0route::W`](W) writer structure"] +impl crate::Writable for Timer3Cdti0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER3_CDTI0ROUTE to value 0"] -impl crate::Resettable for TIMER3_CDTI0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer3Cdti0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_cdti1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_cdti1route.rs index 84382a8..7039dab 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_cdti1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_cdti1route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER3_CDTI1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER3_CDTI1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI1 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER3_CDTI1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER3_CDTI1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer3_cdti1route](index.html) module"] -pub struct TIMER3_CDTI1ROUTE_SPEC; -impl crate::RegisterSpec for TIMER3_CDTI1ROUTE_SPEC { +#[doc = "CDTI1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_cdti1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_cdti1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer3Cdti1routeSpec; +impl crate::RegisterSpec for Timer3Cdti1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer3_cdti1route::R](R) reader structure"] -impl crate::Readable for TIMER3_CDTI1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer3_cdti1route::W](W) writer structure"] -impl crate::Writable for TIMER3_CDTI1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer3_cdti1route::R`](R) reader structure"] +impl crate::Readable for Timer3Cdti1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer3_cdti1route::W`](W) writer structure"] +impl crate::Writable for Timer3Cdti1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER3_CDTI1ROUTE to value 0"] -impl crate::Resettable for TIMER3_CDTI1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer3Cdti1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_cdti2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_cdti2route.rs index be8a6bd..e8f9e17 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_cdti2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_cdti2route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER3_CDTI2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER3_CDTI2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI2 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER3_CDTI2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI2 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER3_CDTI2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer3_cdti2route](index.html) module"] -pub struct TIMER3_CDTI2ROUTE_SPEC; -impl crate::RegisterSpec for TIMER3_CDTI2ROUTE_SPEC { +#[doc = "CDTI2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_cdti2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_cdti2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer3Cdti2routeSpec; +impl crate::RegisterSpec for Timer3Cdti2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer3_cdti2route::R](R) reader structure"] -impl crate::Readable for TIMER3_CDTI2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer3_cdti2route::W](W) writer structure"] -impl crate::Writable for TIMER3_CDTI2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer3_cdti2route::R`](R) reader structure"] +impl crate::Readable for Timer3Cdti2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer3_cdti2route::W`](W) writer structure"] +impl crate::Writable for Timer3Cdti2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER3_CDTI2ROUTE to value 0"] -impl crate::Resettable for TIMER3_CDTI2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer3Cdti2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_routeen.rs index a1226ab..b0ed87c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer3_routeen.rs @@ -1,155 +1,115 @@ #[doc = "Register `TIMER3_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER3_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CC0PEN` reader - CC0 pin enable control bit"] -pub type CC0PEN_R = crate::BitReader; +pub type Cc0penR = crate::BitReader; #[doc = "Field `CC0PEN` writer - CC0 pin enable control bit"] -pub type CC0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER3_ROUTEEN_SPEC, bool, O>; +pub type Cc0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1PEN` reader - CC1 pin enable control bit"] -pub type CC1PEN_R = crate::BitReader; +pub type Cc1penR = crate::BitReader; #[doc = "Field `CC1PEN` writer - CC1 pin enable control bit"] -pub type CC1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER3_ROUTEEN_SPEC, bool, O>; +pub type Cc1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2PEN` reader - CC2 pin enable control bit"] -pub type CC2PEN_R = crate::BitReader; +pub type Cc2penR = crate::BitReader; #[doc = "Field `CC2PEN` writer - CC2 pin enable control bit"] -pub type CC2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER3_ROUTEEN_SPEC, bool, O>; +pub type Cc2penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC0PEN` reader - CDTI0 pin enable control bit"] -pub type CCC0PEN_R = crate::BitReader; +pub type Ccc0penR = crate::BitReader; #[doc = "Field `CCC0PEN` writer - CDTI0 pin enable control bit"] -pub type CCC0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER3_ROUTEEN_SPEC, bool, O>; +pub type Ccc0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC1PEN` reader - CDTI1 pin enable control bit"] -pub type CCC1PEN_R = crate::BitReader; +pub type Ccc1penR = crate::BitReader; #[doc = "Field `CCC1PEN` writer - CDTI1 pin enable control bit"] -pub type CCC1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER3_ROUTEEN_SPEC, bool, O>; +pub type Ccc1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC2PEN` reader - CDTI2 pin enable control bit"] -pub type CCC2PEN_R = crate::BitReader; +pub type Ccc2penR = crate::BitReader; #[doc = "Field `CCC2PEN` writer - CDTI2 pin enable control bit"] -pub type CCC2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER3_ROUTEEN_SPEC, bool, O>; +pub type Ccc2penW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CC0 pin enable control bit"] #[inline(always)] - pub fn cc0pen(&self) -> CC0PEN_R { - CC0PEN_R::new((self.bits & 1) != 0) + pub fn cc0pen(&self) -> Cc0penR { + Cc0penR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CC1 pin enable control bit"] #[inline(always)] - pub fn cc1pen(&self) -> CC1PEN_R { - CC1PEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn cc1pen(&self) -> Cc1penR { + Cc1penR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CC2 pin enable control bit"] #[inline(always)] - pub fn cc2pen(&self) -> CC2PEN_R { - CC2PEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn cc2pen(&self) -> Cc2penR { + Cc2penR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - CDTI0 pin enable control bit"] #[inline(always)] - pub fn ccc0pen(&self) -> CCC0PEN_R { - CCC0PEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn ccc0pen(&self) -> Ccc0penR { + Ccc0penR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - CDTI1 pin enable control bit"] #[inline(always)] - pub fn ccc1pen(&self) -> CCC1PEN_R { - CCC1PEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn ccc1pen(&self) -> Ccc1penR { + Ccc1penR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CDTI2 pin enable control bit"] #[inline(always)] - pub fn ccc2pen(&self) -> CCC2PEN_R { - CCC2PEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn ccc2pen(&self) -> Ccc2penR { + Ccc2penR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - CC0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc0pen(&mut self) -> CC0PEN_W<0> { - CC0PEN_W::new(self) + pub fn cc0pen(&mut self) -> Cc0penW { + Cc0penW::new(self, 0) } #[doc = "Bit 1 - CC1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc1pen(&mut self) -> CC1PEN_W<1> { - CC1PEN_W::new(self) + pub fn cc1pen(&mut self) -> Cc1penW { + Cc1penW::new(self, 1) } #[doc = "Bit 2 - CC2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc2pen(&mut self) -> CC2PEN_W<2> { - CC2PEN_W::new(self) + pub fn cc2pen(&mut self) -> Cc2penW { + Cc2penW::new(self, 2) } #[doc = "Bit 3 - CDTI0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc0pen(&mut self) -> CCC0PEN_W<3> { - CCC0PEN_W::new(self) + pub fn ccc0pen(&mut self) -> Ccc0penW { + Ccc0penW::new(self, 3) } #[doc = "Bit 4 - CDTI1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc1pen(&mut self) -> CCC1PEN_W<4> { - CCC1PEN_W::new(self) + pub fn ccc1pen(&mut self) -> Ccc1penW { + Ccc1penW::new(self, 4) } #[doc = "Bit 5 - CDTI2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc2pen(&mut self) -> CCC2PEN_W<5> { - CCC2PEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ccc2pen(&mut self) -> Ccc2penW { + Ccc2penW::new(self, 5) } } -#[doc = "TIMER3 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer3_routeen](index.html) module"] -pub struct TIMER3_ROUTEEN_SPEC; -impl crate::RegisterSpec for TIMER3_ROUTEEN_SPEC { +#[doc = "TIMER3 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer3RouteenSpec; +impl crate::RegisterSpec for Timer3RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer3_routeen::R](R) reader structure"] -impl crate::Readable for TIMER3_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer3_routeen::W](W) writer structure"] -impl crate::Writable for TIMER3_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer3_routeen::R`](R) reader structure"] +impl crate::Readable for Timer3RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`timer3_routeen::W`](W) writer structure"] +impl crate::Writable for Timer3RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER3_ROUTEEN to value 0"] -impl crate::Resettable for TIMER3_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer3RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_cc0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_cc0route.rs index d100908..f55e4d6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_cc0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_cc0route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER4_CC0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER4_CC0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC0 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER4_CC0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER4_CC0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer4_cc0route](index.html) module"] -pub struct TIMER4_CC0ROUTE_SPEC; -impl crate::RegisterSpec for TIMER4_CC0ROUTE_SPEC { +#[doc = "CC0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_cc0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_cc0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer4Cc0routeSpec; +impl crate::RegisterSpec for Timer4Cc0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer4_cc0route::R](R) reader structure"] -impl crate::Readable for TIMER4_CC0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer4_cc0route::W](W) writer structure"] -impl crate::Writable for TIMER4_CC0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer4_cc0route::R`](R) reader structure"] +impl crate::Readable for Timer4Cc0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer4_cc0route::W`](W) writer structure"] +impl crate::Writable for Timer4Cc0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER4_CC0ROUTE to value 0"] -impl crate::Resettable for TIMER4_CC0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer4Cc0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_cc1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_cc1route.rs index f539231..b56a72d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_cc1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_cc1route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER4_CC1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER4_CC1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC1 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER4_CC1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER4_CC1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer4_cc1route](index.html) module"] -pub struct TIMER4_CC1ROUTE_SPEC; -impl crate::RegisterSpec for TIMER4_CC1ROUTE_SPEC { +#[doc = "CC1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_cc1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_cc1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer4Cc1routeSpec; +impl crate::RegisterSpec for Timer4Cc1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer4_cc1route::R](R) reader structure"] -impl crate::Readable for TIMER4_CC1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer4_cc1route::W](W) writer structure"] -impl crate::Writable for TIMER4_CC1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer4_cc1route::R`](R) reader structure"] +impl crate::Readable for Timer4Cc1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer4_cc1route::W`](W) writer structure"] +impl crate::Writable for Timer4Cc1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER4_CC1ROUTE to value 0"] -impl crate::Resettable for TIMER4_CC1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer4Cc1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_cc2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_cc2route.rs index f0a5b3d..7d58e2f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_cc2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_cc2route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER4_CC2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER4_CC2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC2 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER4_CC2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC2 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER4_CC2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer4_cc2route](index.html) module"] -pub struct TIMER4_CC2ROUTE_SPEC; -impl crate::RegisterSpec for TIMER4_CC2ROUTE_SPEC { +#[doc = "CC2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_cc2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_cc2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer4Cc2routeSpec; +impl crate::RegisterSpec for Timer4Cc2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer4_cc2route::R](R) reader structure"] -impl crate::Readable for TIMER4_CC2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer4_cc2route::W](W) writer structure"] -impl crate::Writable for TIMER4_CC2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer4_cc2route::R`](R) reader structure"] +impl crate::Readable for Timer4Cc2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer4_cc2route::W`](W) writer structure"] +impl crate::Writable for Timer4Cc2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER4_CC2ROUTE to value 0"] -impl crate::Resettable for TIMER4_CC2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer4Cc2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_cdti0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_cdti0route.rs index 7a5e0db..33f77ed 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_cdti0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_cdti0route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER4_CDTI0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER4_CDTI0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI0 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER4_CDTI0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER4_CDTI0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer4_cdti0route](index.html) module"] -pub struct TIMER4_CDTI0ROUTE_SPEC; -impl crate::RegisterSpec for TIMER4_CDTI0ROUTE_SPEC { +#[doc = "CDTI0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_cdti0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_cdti0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer4Cdti0routeSpec; +impl crate::RegisterSpec for Timer4Cdti0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer4_cdti0route::R](R) reader structure"] -impl crate::Readable for TIMER4_CDTI0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer4_cdti0route::W](W) writer structure"] -impl crate::Writable for TIMER4_CDTI0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer4_cdti0route::R`](R) reader structure"] +impl crate::Readable for Timer4Cdti0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer4_cdti0route::W`](W) writer structure"] +impl crate::Writable for Timer4Cdti0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER4_CDTI0ROUTE to value 0"] -impl crate::Resettable for TIMER4_CDTI0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer4Cdti0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_cdti1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_cdti1route.rs index 8ef7fa3..a79c8ef 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_cdti1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_cdti1route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER4_CDTI1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER4_CDTI1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI1 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER4_CDTI1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER4_CDTI1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer4_cdti1route](index.html) module"] -pub struct TIMER4_CDTI1ROUTE_SPEC; -impl crate::RegisterSpec for TIMER4_CDTI1ROUTE_SPEC { +#[doc = "CDTI1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_cdti1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_cdti1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer4Cdti1routeSpec; +impl crate::RegisterSpec for Timer4Cdti1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer4_cdti1route::R](R) reader structure"] -impl crate::Readable for TIMER4_CDTI1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer4_cdti1route::W](W) writer structure"] -impl crate::Writable for TIMER4_CDTI1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer4_cdti1route::R`](R) reader structure"] +impl crate::Readable for Timer4Cdti1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer4_cdti1route::W`](W) writer structure"] +impl crate::Writable for Timer4Cdti1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER4_CDTI1ROUTE to value 0"] -impl crate::Resettable for TIMER4_CDTI1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer4Cdti1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_cdti2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_cdti2route.rs index 1687912..c8d82cc 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_cdti2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_cdti2route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER4_CDTI2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER4_CDTI2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI2 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER4_CDTI2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI2 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER4_CDTI2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer4_cdti2route](index.html) module"] -pub struct TIMER4_CDTI2ROUTE_SPEC; -impl crate::RegisterSpec for TIMER4_CDTI2ROUTE_SPEC { +#[doc = "CDTI2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_cdti2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_cdti2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer4Cdti2routeSpec; +impl crate::RegisterSpec for Timer4Cdti2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer4_cdti2route::R](R) reader structure"] -impl crate::Readable for TIMER4_CDTI2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer4_cdti2route::W](W) writer structure"] -impl crate::Writable for TIMER4_CDTI2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer4_cdti2route::R`](R) reader structure"] +impl crate::Readable for Timer4Cdti2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer4_cdti2route::W`](W) writer structure"] +impl crate::Writable for Timer4Cdti2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER4_CDTI2ROUTE to value 0"] -impl crate::Resettable for TIMER4_CDTI2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer4Cdti2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_routeen.rs index f00c708..6b839ae 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/timer4_routeen.rs @@ -1,155 +1,115 @@ #[doc = "Register `TIMER4_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER4_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CC0PEN` reader - CC0 pin enable control bit"] -pub type CC0PEN_R = crate::BitReader; +pub type Cc0penR = crate::BitReader; #[doc = "Field `CC0PEN` writer - CC0 pin enable control bit"] -pub type CC0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER4_ROUTEEN_SPEC, bool, O>; +pub type Cc0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1PEN` reader - CC1 pin enable control bit"] -pub type CC1PEN_R = crate::BitReader; +pub type Cc1penR = crate::BitReader; #[doc = "Field `CC1PEN` writer - CC1 pin enable control bit"] -pub type CC1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER4_ROUTEEN_SPEC, bool, O>; +pub type Cc1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2PEN` reader - CC2 pin enable control bit"] -pub type CC2PEN_R = crate::BitReader; +pub type Cc2penR = crate::BitReader; #[doc = "Field `CC2PEN` writer - CC2 pin enable control bit"] -pub type CC2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER4_ROUTEEN_SPEC, bool, O>; +pub type Cc2penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC0PEN` reader - CDTI0 pin enable control bit"] -pub type CCC0PEN_R = crate::BitReader; +pub type Ccc0penR = crate::BitReader; #[doc = "Field `CCC0PEN` writer - CDTI0 pin enable control bit"] -pub type CCC0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER4_ROUTEEN_SPEC, bool, O>; +pub type Ccc0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC1PEN` reader - CDTI1 pin enable control bit"] -pub type CCC1PEN_R = crate::BitReader; +pub type Ccc1penR = crate::BitReader; #[doc = "Field `CCC1PEN` writer - CDTI1 pin enable control bit"] -pub type CCC1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER4_ROUTEEN_SPEC, bool, O>; +pub type Ccc1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC2PEN` reader - CDTI2 pin enable control bit"] -pub type CCC2PEN_R = crate::BitReader; +pub type Ccc2penR = crate::BitReader; #[doc = "Field `CCC2PEN` writer - CDTI2 pin enable control bit"] -pub type CCC2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER4_ROUTEEN_SPEC, bool, O>; +pub type Ccc2penW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CC0 pin enable control bit"] #[inline(always)] - pub fn cc0pen(&self) -> CC0PEN_R { - CC0PEN_R::new((self.bits & 1) != 0) + pub fn cc0pen(&self) -> Cc0penR { + Cc0penR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CC1 pin enable control bit"] #[inline(always)] - pub fn cc1pen(&self) -> CC1PEN_R { - CC1PEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn cc1pen(&self) -> Cc1penR { + Cc1penR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CC2 pin enable control bit"] #[inline(always)] - pub fn cc2pen(&self) -> CC2PEN_R { - CC2PEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn cc2pen(&self) -> Cc2penR { + Cc2penR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - CDTI0 pin enable control bit"] #[inline(always)] - pub fn ccc0pen(&self) -> CCC0PEN_R { - CCC0PEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn ccc0pen(&self) -> Ccc0penR { + Ccc0penR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - CDTI1 pin enable control bit"] #[inline(always)] - pub fn ccc1pen(&self) -> CCC1PEN_R { - CCC1PEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn ccc1pen(&self) -> Ccc1penR { + Ccc1penR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CDTI2 pin enable control bit"] #[inline(always)] - pub fn ccc2pen(&self) -> CCC2PEN_R { - CCC2PEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn ccc2pen(&self) -> Ccc2penR { + Ccc2penR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - CC0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc0pen(&mut self) -> CC0PEN_W<0> { - CC0PEN_W::new(self) + pub fn cc0pen(&mut self) -> Cc0penW { + Cc0penW::new(self, 0) } #[doc = "Bit 1 - CC1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc1pen(&mut self) -> CC1PEN_W<1> { - CC1PEN_W::new(self) + pub fn cc1pen(&mut self) -> Cc1penW { + Cc1penW::new(self, 1) } #[doc = "Bit 2 - CC2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc2pen(&mut self) -> CC2PEN_W<2> { - CC2PEN_W::new(self) + pub fn cc2pen(&mut self) -> Cc2penW { + Cc2penW::new(self, 2) } #[doc = "Bit 3 - CDTI0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc0pen(&mut self) -> CCC0PEN_W<3> { - CCC0PEN_W::new(self) + pub fn ccc0pen(&mut self) -> Ccc0penW { + Ccc0penW::new(self, 3) } #[doc = "Bit 4 - CDTI1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc1pen(&mut self) -> CCC1PEN_W<4> { - CCC1PEN_W::new(self) + pub fn ccc1pen(&mut self) -> Ccc1penW { + Ccc1penW::new(self, 4) } #[doc = "Bit 5 - CDTI2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc2pen(&mut self) -> CCC2PEN_W<5> { - CCC2PEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ccc2pen(&mut self) -> Ccc2penW { + Ccc2penW::new(self, 5) } } -#[doc = "TIMER4 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer4_routeen](index.html) module"] -pub struct TIMER4_ROUTEEN_SPEC; -impl crate::RegisterSpec for TIMER4_ROUTEEN_SPEC { +#[doc = "TIMER4 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer4RouteenSpec; +impl crate::RegisterSpec for Timer4RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer4_routeen::R](R) reader structure"] -impl crate::Readable for TIMER4_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer4_routeen::W](W) writer structure"] -impl crate::Writable for TIMER4_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer4_routeen::R`](R) reader structure"] +impl crate::Readable for Timer4RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`timer4_routeen::W`](W) writer structure"] +impl crate::Writable for Timer4RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER4_ROUTEEN to value 0"] -impl crate::Resettable for TIMER4_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer4RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/traceroutepen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/traceroutepen.rs index 3f0f45c..e2ea208 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/traceroutepen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/traceroutepen.rs @@ -1,155 +1,115 @@ #[doc = "Register `TRACEROUTEPEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TRACEROUTEPEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SWVPEN` reader - Serial Wire Viewer Output Pin Enable"] -pub type SWVPEN_R = crate::BitReader; +pub type SwvpenR = crate::BitReader; #[doc = "Field `SWVPEN` writer - Serial Wire Viewer Output Pin Enable"] -pub type SWVPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRACEROUTEPEN_SPEC, bool, O>; +pub type SwvpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TRACECLKPEN` reader - Trace Clk Pin Enable"] -pub type TRACECLKPEN_R = crate::BitReader; +pub type TraceclkpenR = crate::BitReader; #[doc = "Field `TRACECLKPEN` writer - Trace Clk Pin Enable"] -pub type TRACECLKPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRACEROUTEPEN_SPEC, bool, O>; +pub type TraceclkpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TRACEDATA0PEN` reader - Trace Data0 Pin Enable"] -pub type TRACEDATA0PEN_R = crate::BitReader; +pub type Tracedata0penR = crate::BitReader; #[doc = "Field `TRACEDATA0PEN` writer - Trace Data0 Pin Enable"] -pub type TRACEDATA0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRACEROUTEPEN_SPEC, bool, O>; +pub type Tracedata0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TRACEDATA1PEN` reader - Trace Data1 Pin Enable"] -pub type TRACEDATA1PEN_R = crate::BitReader; +pub type Tracedata1penR = crate::BitReader; #[doc = "Field `TRACEDATA1PEN` writer - Trace Data1 Pin Enable"] -pub type TRACEDATA1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRACEROUTEPEN_SPEC, bool, O>; +pub type Tracedata1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TRACEDATA2PEN` reader - Trace Data2 Pin Enable"] -pub type TRACEDATA2PEN_R = crate::BitReader; +pub type Tracedata2penR = crate::BitReader; #[doc = "Field `TRACEDATA2PEN` writer - Trace Data2 Pin Enable"] -pub type TRACEDATA2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRACEROUTEPEN_SPEC, bool, O>; +pub type Tracedata2penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TRACEDATA3PEN` reader - Trace Data3 Pin Enable"] -pub type TRACEDATA3PEN_R = crate::BitReader; +pub type Tracedata3penR = crate::BitReader; #[doc = "Field `TRACEDATA3PEN` writer - Trace Data3 Pin Enable"] -pub type TRACEDATA3PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRACEROUTEPEN_SPEC, bool, O>; +pub type Tracedata3penW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Serial Wire Viewer Output Pin Enable"] #[inline(always)] - pub fn swvpen(&self) -> SWVPEN_R { - SWVPEN_R::new((self.bits & 1) != 0) + pub fn swvpen(&self) -> SwvpenR { + SwvpenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Trace Clk Pin Enable"] #[inline(always)] - pub fn traceclkpen(&self) -> TRACECLKPEN_R { - TRACECLKPEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn traceclkpen(&self) -> TraceclkpenR { + TraceclkpenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Trace Data0 Pin Enable"] #[inline(always)] - pub fn tracedata0pen(&self) -> TRACEDATA0PEN_R { - TRACEDATA0PEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn tracedata0pen(&self) -> Tracedata0penR { + Tracedata0penR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Trace Data1 Pin Enable"] #[inline(always)] - pub fn tracedata1pen(&self) -> TRACEDATA1PEN_R { - TRACEDATA1PEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn tracedata1pen(&self) -> Tracedata1penR { + Tracedata1penR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Trace Data2 Pin Enable"] #[inline(always)] - pub fn tracedata2pen(&self) -> TRACEDATA2PEN_R { - TRACEDATA2PEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn tracedata2pen(&self) -> Tracedata2penR { + Tracedata2penR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Trace Data3 Pin Enable"] #[inline(always)] - pub fn tracedata3pen(&self) -> TRACEDATA3PEN_R { - TRACEDATA3PEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn tracedata3pen(&self) -> Tracedata3penR { + Tracedata3penR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - Serial Wire Viewer Output Pin Enable"] #[inline(always)] #[must_use] - pub fn swvpen(&mut self) -> SWVPEN_W<0> { - SWVPEN_W::new(self) + pub fn swvpen(&mut self) -> SwvpenW { + SwvpenW::new(self, 0) } #[doc = "Bit 1 - Trace Clk Pin Enable"] #[inline(always)] #[must_use] - pub fn traceclkpen(&mut self) -> TRACECLKPEN_W<1> { - TRACECLKPEN_W::new(self) + pub fn traceclkpen(&mut self) -> TraceclkpenW { + TraceclkpenW::new(self, 1) } #[doc = "Bit 2 - Trace Data0 Pin Enable"] #[inline(always)] #[must_use] - pub fn tracedata0pen(&mut self) -> TRACEDATA0PEN_W<2> { - TRACEDATA0PEN_W::new(self) + pub fn tracedata0pen(&mut self) -> Tracedata0penW { + Tracedata0penW::new(self, 2) } #[doc = "Bit 3 - Trace Data1 Pin Enable"] #[inline(always)] #[must_use] - pub fn tracedata1pen(&mut self) -> TRACEDATA1PEN_W<3> { - TRACEDATA1PEN_W::new(self) + pub fn tracedata1pen(&mut self) -> Tracedata1penW { + Tracedata1penW::new(self, 3) } #[doc = "Bit 4 - Trace Data2 Pin Enable"] #[inline(always)] #[must_use] - pub fn tracedata2pen(&mut self) -> TRACEDATA2PEN_W<4> { - TRACEDATA2PEN_W::new(self) + pub fn tracedata2pen(&mut self) -> Tracedata2penW { + Tracedata2penW::new(self, 4) } #[doc = "Bit 5 - Trace Data3 Pin Enable"] #[inline(always)] #[must_use] - pub fn tracedata3pen(&mut self) -> TRACEDATA3PEN_W<5> { - TRACEDATA3PEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn tracedata3pen(&mut self) -> Tracedata3penW { + Tracedata3penW::new(self, 5) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [traceroutepen](index.html) module"] -pub struct TRACEROUTEPEN_SPEC; -impl crate::RegisterSpec for TRACEROUTEPEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`traceroutepen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`traceroutepen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TraceroutepenSpec; +impl crate::RegisterSpec for TraceroutepenSpec { type Ux = u32; } -#[doc = "`read()` method returns [traceroutepen::R](R) reader structure"] -impl crate::Readable for TRACEROUTEPEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [traceroutepen::W](W) writer structure"] -impl crate::Writable for TRACEROUTEPEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`traceroutepen::R`](R) reader structure"] +impl crate::Readable for TraceroutepenSpec {} +#[doc = "`write(|w| ..)` method takes [`traceroutepen::W`](W) writer structure"] +impl crate::Writable for TraceroutepenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TRACEROUTEPEN to value 0"] -impl crate::Resettable for TRACEROUTEPEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TraceroutepenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_clkroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_clkroute.rs index 2f4d2f5..f2e7ab5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_clkroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_clkroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `USART0_CLKROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `USART0_CLKROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - SCLK port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - SCLK port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, USART0_CLKROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - SCLK pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - SCLK pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, USART0_CLKROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - SCLK port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - SCLK pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - SCLK port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - SCLK pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "SCLK port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [usart0_clkroute](index.html) module"] -pub struct USART0_CLKROUTE_SPEC; -impl crate::RegisterSpec for USART0_CLKROUTE_SPEC { +#[doc = "SCLK port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_clkroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_clkroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Usart0ClkrouteSpec; +impl crate::RegisterSpec for Usart0ClkrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [usart0_clkroute::R](R) reader structure"] -impl crate::Readable for USART0_CLKROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [usart0_clkroute::W](W) writer structure"] -impl crate::Writable for USART0_CLKROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`usart0_clkroute::R`](R) reader structure"] +impl crate::Readable for Usart0ClkrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`usart0_clkroute::W`](W) writer structure"] +impl crate::Writable for Usart0ClkrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets USART0_CLKROUTE to value 0"] -impl crate::Resettable for USART0_CLKROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Usart0ClkrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_csroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_csroute.rs index 8808afc..245e937 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_csroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_csroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `USART0_CSROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `USART0_CSROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CS port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CS port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, USART0_CSROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CS pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CS pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, USART0_CSROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CS port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CS pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CS port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CS pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CS port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [usart0_csroute](index.html) module"] -pub struct USART0_CSROUTE_SPEC; -impl crate::RegisterSpec for USART0_CSROUTE_SPEC { +#[doc = "CS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_csroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_csroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Usart0CsrouteSpec; +impl crate::RegisterSpec for Usart0CsrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [usart0_csroute::R](R) reader structure"] -impl crate::Readable for USART0_CSROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [usart0_csroute::W](W) writer structure"] -impl crate::Writable for USART0_CSROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`usart0_csroute::R`](R) reader structure"] +impl crate::Readable for Usart0CsrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`usart0_csroute::W`](W) writer structure"] +impl crate::Writable for Usart0CsrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets USART0_CSROUTE to value 0"] -impl crate::Resettable for USART0_CSROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Usart0CsrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_ctsroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_ctsroute.rs index de06379..ace2514 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_ctsroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_ctsroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `USART0_CTSROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `USART0_CTSROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CTS port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CTS port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, USART0_CTSROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CTS pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CTS pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, USART0_CTSROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CTS port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CTS pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CTS port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CTS pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CTS port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [usart0_ctsroute](index.html) module"] -pub struct USART0_CTSROUTE_SPEC; -impl crate::RegisterSpec for USART0_CTSROUTE_SPEC { +#[doc = "CTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_ctsroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_ctsroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Usart0CtsrouteSpec; +impl crate::RegisterSpec for Usart0CtsrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [usart0_ctsroute::R](R) reader structure"] -impl crate::Readable for USART0_CTSROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [usart0_ctsroute::W](W) writer structure"] -impl crate::Writable for USART0_CTSROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`usart0_ctsroute::R`](R) reader structure"] +impl crate::Readable for Usart0CtsrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`usart0_ctsroute::W`](W) writer structure"] +impl crate::Writable for Usart0CtsrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets USART0_CTSROUTE to value 0"] -impl crate::Resettable for USART0_CTSROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Usart0CtsrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_routeen.rs index e47bc2e..f04d926 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_routeen.rs @@ -1,140 +1,100 @@ #[doc = "Register `USART0_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `USART0_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CSPEN` reader - CS pin enable control bit"] -pub type CSPEN_R = crate::BitReader; +pub type CspenR = crate::BitReader; #[doc = "Field `CSPEN` writer - CS pin enable control bit"] -pub type CSPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, USART0_ROUTEEN_SPEC, bool, O>; +pub type CspenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTSPEN` reader - RTS pin enable control bit"] -pub type RTSPEN_R = crate::BitReader; +pub type RtspenR = crate::BitReader; #[doc = "Field `RTSPEN` writer - RTS pin enable control bit"] -pub type RTSPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, USART0_ROUTEEN_SPEC, bool, O>; +pub type RtspenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXPEN` reader - RX pin enable control bit"] -pub type RXPEN_R = crate::BitReader; +pub type RxpenR = crate::BitReader; #[doc = "Field `RXPEN` writer - RX pin enable control bit"] -pub type RXPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, USART0_ROUTEEN_SPEC, bool, O>; +pub type RxpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLKPEN` reader - SCLK pin enable control bit"] -pub type CLKPEN_R = crate::BitReader; +pub type ClkpenR = crate::BitReader; #[doc = "Field `CLKPEN` writer - SCLK pin enable control bit"] -pub type CLKPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, USART0_ROUTEEN_SPEC, bool, O>; +pub type ClkpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXPEN` reader - TX pin enable control bit"] -pub type TXPEN_R = crate::BitReader; +pub type TxpenR = crate::BitReader; #[doc = "Field `TXPEN` writer - TX pin enable control bit"] -pub type TXPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, USART0_ROUTEEN_SPEC, bool, O>; +pub type TxpenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CS pin enable control bit"] #[inline(always)] - pub fn cspen(&self) -> CSPEN_R { - CSPEN_R::new((self.bits & 1) != 0) + pub fn cspen(&self) -> CspenR { + CspenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - RTS pin enable control bit"] #[inline(always)] - pub fn rtspen(&self) -> RTSPEN_R { - RTSPEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn rtspen(&self) -> RtspenR { + RtspenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RX pin enable control bit"] #[inline(always)] - pub fn rxpen(&self) -> RXPEN_R { - RXPEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxpen(&self) -> RxpenR { + RxpenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - SCLK pin enable control bit"] #[inline(always)] - pub fn clkpen(&self) -> CLKPEN_R { - CLKPEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn clkpen(&self) -> ClkpenR { + ClkpenR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - TX pin enable control bit"] #[inline(always)] - pub fn txpen(&self) -> TXPEN_R { - TXPEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn txpen(&self) -> TxpenR { + TxpenR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - CS pin enable control bit"] #[inline(always)] #[must_use] - pub fn cspen(&mut self) -> CSPEN_W<0> { - CSPEN_W::new(self) + pub fn cspen(&mut self) -> CspenW { + CspenW::new(self, 0) } #[doc = "Bit 1 - RTS pin enable control bit"] #[inline(always)] #[must_use] - pub fn rtspen(&mut self) -> RTSPEN_W<1> { - RTSPEN_W::new(self) + pub fn rtspen(&mut self) -> RtspenW { + RtspenW::new(self, 1) } #[doc = "Bit 2 - RX pin enable control bit"] #[inline(always)] #[must_use] - pub fn rxpen(&mut self) -> RXPEN_W<2> { - RXPEN_W::new(self) + pub fn rxpen(&mut self) -> RxpenW { + RxpenW::new(self, 2) } #[doc = "Bit 3 - SCLK pin enable control bit"] #[inline(always)] #[must_use] - pub fn clkpen(&mut self) -> CLKPEN_W<3> { - CLKPEN_W::new(self) + pub fn clkpen(&mut self) -> ClkpenW { + ClkpenW::new(self, 3) } #[doc = "Bit 4 - TX pin enable control bit"] #[inline(always)] #[must_use] - pub fn txpen(&mut self) -> TXPEN_W<4> { - TXPEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txpen(&mut self) -> TxpenW { + TxpenW::new(self, 4) } } -#[doc = "USART0 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [usart0_routeen](index.html) module"] -pub struct USART0_ROUTEEN_SPEC; -impl crate::RegisterSpec for USART0_ROUTEEN_SPEC { +#[doc = "USART0 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Usart0RouteenSpec; +impl crate::RegisterSpec for Usart0RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [usart0_routeen::R](R) reader structure"] -impl crate::Readable for USART0_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [usart0_routeen::W](W) writer structure"] -impl crate::Writable for USART0_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`usart0_routeen::R`](R) reader structure"] +impl crate::Readable for Usart0RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`usart0_routeen::W`](W) writer structure"] +impl crate::Writable for Usart0RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets USART0_ROUTEEN to value 0"] -impl crate::Resettable for USART0_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Usart0RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_rtsroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_rtsroute.rs index 3b884c8..95de721 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_rtsroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_rtsroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `USART0_RTSROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `USART0_RTSROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - RTS port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - RTS port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, USART0_RTSROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - RTS pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - RTS pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, USART0_RTSROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - RTS port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - RTS pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - RTS port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - RTS pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "RTS port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [usart0_rtsroute](index.html) module"] -pub struct USART0_RTSROUTE_SPEC; -impl crate::RegisterSpec for USART0_RTSROUTE_SPEC { +#[doc = "RTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_rtsroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_rtsroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Usart0RtsrouteSpec; +impl crate::RegisterSpec for Usart0RtsrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [usart0_rtsroute::R](R) reader structure"] -impl crate::Readable for USART0_RTSROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [usart0_rtsroute::W](W) writer structure"] -impl crate::Writable for USART0_RTSROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`usart0_rtsroute::R`](R) reader structure"] +impl crate::Readable for Usart0RtsrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`usart0_rtsroute::W`](W) writer structure"] +impl crate::Writable for Usart0RtsrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets USART0_RTSROUTE to value 0"] -impl crate::Resettable for USART0_RTSROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Usart0RtsrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_rxroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_rxroute.rs index a905b25..55cc7e2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_rxroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_rxroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `USART0_RXROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `USART0_RXROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - RX port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - RX port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, USART0_RXROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - RX pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - RX pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, USART0_RXROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - RX port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - RX pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - RX port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - RX pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "RX port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [usart0_rxroute](index.html) module"] -pub struct USART0_RXROUTE_SPEC; -impl crate::RegisterSpec for USART0_RXROUTE_SPEC { +#[doc = "RX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_rxroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_rxroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Usart0RxrouteSpec; +impl crate::RegisterSpec for Usart0RxrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [usart0_rxroute::R](R) reader structure"] -impl crate::Readable for USART0_RXROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [usart0_rxroute::W](W) writer structure"] -impl crate::Writable for USART0_RXROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`usart0_rxroute::R`](R) reader structure"] +impl crate::Readable for Usart0RxrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`usart0_rxroute::W`](W) writer structure"] +impl crate::Writable for Usart0RxrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets USART0_RXROUTE to value 0"] -impl crate::Resettable for USART0_RXROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Usart0RxrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_txroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_txroute.rs index 6aeee82..a69bb14 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_txroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_ns/usart0_txroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `USART0_TXROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `USART0_TXROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - TX port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - TX port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, USART0_TXROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - TX pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - TX pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, USART0_TXROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - TX port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - TX pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - TX port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - TX pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "TX port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [usart0_txroute](index.html) module"] -pub struct USART0_TXROUTE_SPEC; -impl crate::RegisterSpec for USART0_TXROUTE_SPEC { +#[doc = "TX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_txroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_txroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Usart0TxrouteSpec; +impl crate::RegisterSpec for Usart0TxrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [usart0_txroute::R](R) reader structure"] -impl crate::Readable for USART0_TXROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [usart0_txroute::W](W) writer structure"] -impl crate::Writable for USART0_TXROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`usart0_txroute::R`](R) reader structure"] +impl crate::Readable for Usart0TxrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`usart0_txroute::W`](W) writer structure"] +impl crate::Writable for Usart0TxrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets USART0_TXROUTE to value 0"] -impl crate::Resettable for USART0_TXROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Usart0TxrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s.rs index 75956c2..aeeab57 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s.rs @@ -1,1068 +1,2122 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + ipversion: Ipversion, _reserved1: [u8; 0x2c], + porta_ctrl: PortaCtrl, + porta_model: PortaModel, + _reserved3: [u8; 0x04], + porta_modeh: PortaModeh, + porta_dout: PortaDout, + porta_din: PortaDin, + _reserved6: [u8; 0x18], + portb_ctrl: PortbCtrl, + portb_model: PortbModel, + _reserved8: [u8; 0x08], + portb_dout: PortbDout, + portb_din: PortbDin, + _reserved10: [u8; 0x18], + portc_ctrl: PortcCtrl, + portc_model: PortcModel, + _reserved12: [u8; 0x04], + portc_modeh: PortcModeh, + portc_dout: PortcDout, + portc_din: PortcDin, + _reserved15: [u8; 0x18], + portd_ctrl: PortdCtrl, + portd_model: PortdModel, + _reserved17: [u8; 0x08], + portd_dout: PortdDout, + portd_din: PortdDin, + _reserved19: [u8; 0x0228], + lock: Lock, + _reserved20: [u8; 0x0c], + gpiolockstatus: Gpiolockstatus, + _reserved21: [u8; 0x0c], + abusalloc: Abusalloc, + bbusalloc: Bbusalloc, + cdbusalloc: Cdbusalloc, + _reserved24: [u8; 0xd4], + extipsell: Extipsell, + extipselh: Extipselh, + extipinsell: Extipinsell, + extipinselh: Extipinselh, + extirise: Extirise, + extifall: Extifall, + _reserved30: [u8; 0x08], + if_: If, + ien: Ien, + _reserved32: [u8; 0x04], + em4wuen: Em4wuen, + em4wupol: Em4wupol, + _reserved34: [u8; 0x0c], + dbgroutepen: Dbgroutepen, + traceroutepen: Traceroutepen, + _reserved36: [u8; 0x18], + lcdseg: Lcdseg, + _reserved37: [u8; 0x0c], + lcdcom: Lcdcom, + _reserved38: [u8; 0x0c], + acmp0_routeen: Acmp0Routeen, + acmp0_acmpoutroute: Acmp0Acmpoutroute, + _reserved40: [u8; 0x04], + acmp1_routeen: Acmp1Routeen, + acmp1_acmpoutroute: Acmp1Acmpoutroute, + _reserved42: [u8; 0x04], + cmu_routeen: CmuRouteen, + cmu_clkin0route: CmuClkin0route, + cmu_clkout0route: CmuClkout0route, + cmu_clkout1route: CmuClkout1route, + cmu_clkout2route: CmuClkout2route, + _reserved47: [u8; 0x18], + eusart0_routeen: Eusart0Routeen, + eusart0_csroute: Eusart0Csroute, + eusart0_ctsroute: Eusart0Ctsroute, + eusart0_rtsroute: Eusart0Rtsroute, + eusart0_rxroute: Eusart0Rxroute, + eusart0_sclkroute: Eusart0Sclkroute, + eusart0_txroute: Eusart0Txroute, + _reserved54: [u8; 0x04], + eusart1_routeen: Eusart1Routeen, + eusart1_csroute: Eusart1Csroute, + eusart1_ctsroute: Eusart1Ctsroute, + eusart1_rtsroute: Eusart1Rtsroute, + eusart1_rxroute: Eusart1Rxroute, + eusart1_sclkroute: Eusart1Sclkroute, + eusart1_txroute: Eusart1Txroute, + _reserved61: [u8; 0x04], + eusart2_routeen: Eusart2Routeen, + eusart2_csroute: Eusart2Csroute, + eusart2_ctsroute: Eusart2Ctsroute, + eusart2_rtsroute: Eusart2Rtsroute, + eusart2_rxroute: Eusart2Rxroute, + eusart2_sclkroute: Eusart2Sclkroute, + eusart2_txroute: Eusart2Txroute, + _reserved68: [u8; 0x18], + i2c0_routeen: I2c0Routeen, + i2c0_sclroute: I2c0Sclroute, + i2c0_sdaroute: I2c0Sdaroute, + _reserved71: [u8; 0x04], + i2c1_routeen: I2c1Routeen, + i2c1_sclroute: I2c1Sclroute, + i2c1_sdaroute: I2c1Sdaroute, + _reserved74: [u8; 0x04], + keyscan_routeen: KeyscanRouteen, + keyscan_colout0route: KeyscanColout0route, + keyscan_colout1route: KeyscanColout1route, + keyscan_colout2route: KeyscanColout2route, + keyscan_colout3route: KeyscanColout3route, + keyscan_colout4route: KeyscanColout4route, + keyscan_colout5route: KeyscanColout5route, + keyscan_colout6route: KeyscanColout6route, + keyscan_colout7route: KeyscanColout7route, + keyscan_rowsense0route: KeyscanRowsense0route, + keyscan_rowsense1route: KeyscanRowsense1route, + keyscan_rowsense2route: KeyscanRowsense2route, + keyscan_rowsense3route: KeyscanRowsense3route, + keyscan_rowsense4route: KeyscanRowsense4route, + keyscan_rowsense5route: KeyscanRowsense5route, + _reserved89: [u8; 0x04], + lesense_routeen: LesenseRouteen, + lesense_ch0outroute: LesenseCh0outroute, + lesense_ch1outroute: LesenseCh1outroute, + lesense_ch2outroute: LesenseCh2outroute, + lesense_ch3outroute: LesenseCh3outroute, + lesense_ch4outroute: LesenseCh4outroute, + lesense_ch5outroute: LesenseCh5outroute, + lesense_ch6outroute: LesenseCh6outroute, + lesense_ch7outroute: LesenseCh7outroute, + lesense_ch8outroute: LesenseCh8outroute, + lesense_ch9outroute: LesenseCh9outroute, + lesense_ch10outroute: LesenseCh10outroute, + lesense_ch11outroute: LesenseCh11outroute, + lesense_ch12outroute: LesenseCh12outroute, + lesense_ch13outroute: LesenseCh13outroute, + lesense_ch14outroute: LesenseCh14outroute, + lesense_ch15outroute: LesenseCh15outroute, + _reserved106: [u8; 0x04], + letimer_routeen: LetimerRouteen, + letimer_out0route: LetimerOut0route, + letimer_out1route: LetimerOut1route, + _reserved109: [u8; 0x50], + pcnt0_s0inroute: Pcnt0S0inroute, + pcnt0_s1inroute: Pcnt0S1inroute, + _reserved111: [u8; 0x04], + prs0_routeen: Prs0Routeen, + prs0_asynch0route: Prs0Asynch0route, + prs0_asynch1route: Prs0Asynch1route, + prs0_asynch2route: Prs0Asynch2route, + prs0_asynch3route: Prs0Asynch3route, + prs0_asynch4route: Prs0Asynch4route, + prs0_asynch5route: Prs0Asynch5route, + prs0_asynch6route: Prs0Asynch6route, + prs0_asynch7route: Prs0Asynch7route, + prs0_asynch8route: Prs0Asynch8route, + prs0_asynch9route: Prs0Asynch9route, + prs0_asynch10route: Prs0Asynch10route, + prs0_asynch11route: Prs0Asynch11route, + prs0_synch0route: Prs0Synch0route, + prs0_synch1route: Prs0Synch1route, + prs0_synch2route: Prs0Synch2route, + prs0_synch3route: Prs0Synch3route, + _reserved128: [u8; 0x64], + syxo0_bufoutreqinasyncroute: Syxo0Bufoutreqinasyncroute, + _reserved129: [u8; 0x04], + timer0_routeen: Timer0Routeen, + timer0_cc0route: Timer0Cc0route, + timer0_cc1route: Timer0Cc1route, + timer0_cc2route: Timer0Cc2route, + timer0_cdti0route: Timer0Cdti0route, + timer0_cdti1route: Timer0Cdti1route, + timer0_cdti2route: Timer0Cdti2route, + _reserved136: [u8; 0x04], + timer1_routeen: Timer1Routeen, + timer1_cc0route: Timer1Cc0route, + timer1_cc1route: Timer1Cc1route, + timer1_cc2route: Timer1Cc2route, + timer1_cdti0route: Timer1Cdti0route, + timer1_cdti1route: Timer1Cdti1route, + timer1_cdti2route: Timer1Cdti2route, + _reserved143: [u8; 0x04], + timer2_routeen: Timer2Routeen, + timer2_cc0route: Timer2Cc0route, + timer2_cc1route: Timer2Cc1route, + timer2_cc2route: Timer2Cc2route, + timer2_cdti0route: Timer2Cdti0route, + timer2_cdti1route: Timer2Cdti1route, + timer2_cdti2route: Timer2Cdti2route, + _reserved150: [u8; 0x04], + timer3_routeen: Timer3Routeen, + timer3_cc0route: Timer3Cc0route, + timer3_cc1route: Timer3Cc1route, + timer3_cc2route: Timer3Cc2route, + timer3_cdti0route: Timer3Cdti0route, + timer3_cdti1route: Timer3Cdti1route, + timer3_cdti2route: Timer3Cdti2route, + _reserved157: [u8; 0x04], + timer4_routeen: Timer4Routeen, + timer4_cc0route: Timer4Cc0route, + timer4_cc1route: Timer4Cc1route, + timer4_cc2route: Timer4Cc2route, + timer4_cdti0route: Timer4Cdti0route, + timer4_cdti1route: Timer4Cdti1route, + timer4_cdti2route: Timer4Cdti2route, + _reserved164: [u8; 0x04], + usart0_routeen: Usart0Routeen, + usart0_csroute: Usart0Csroute, + usart0_ctsroute: Usart0Ctsroute, + usart0_rtsroute: Usart0Rtsroute, + usart0_rxroute: Usart0Rxroute, + usart0_clkroute: Usart0Clkroute, + usart0_txroute: Usart0Txroute, + _reserved171: [u8; 0x0c6c], + if_set: IfSet, + _reserved172: [u8; 0x0ffc], + if_clr: IfClr, +} +impl RegisterBlock { + #[doc = "0x00 - No Description"] + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x30 - Port control"] - pub porta_ctrl: PORTA_CTRL, + #[inline(always)] + pub const fn porta_ctrl(&self) -> &PortaCtrl { + &self.porta_ctrl + } #[doc = "0x34 - mode low"] - pub porta_model: PORTA_MODEL, - _reserved3: [u8; 0x04], + #[inline(always)] + pub const fn porta_model(&self) -> &PortaModel { + &self.porta_model + } #[doc = "0x3c - mode high"] - pub porta_modeh: PORTA_MODEH, + #[inline(always)] + pub const fn porta_modeh(&self) -> &PortaModeh { + &self.porta_modeh + } #[doc = "0x40 - data out"] - pub porta_dout: PORTA_DOUT, + #[inline(always)] + pub const fn porta_dout(&self) -> &PortaDout { + &self.porta_dout + } #[doc = "0x44 - data in"] - pub porta_din: PORTA_DIN, - _reserved6: [u8; 0x18], + #[inline(always)] + pub const fn porta_din(&self) -> &PortaDin { + &self.porta_din + } #[doc = "0x60 - Port control"] - pub portb_ctrl: PORTB_CTRL, + #[inline(always)] + pub const fn portb_ctrl(&self) -> &PortbCtrl { + &self.portb_ctrl + } #[doc = "0x64 - mode low"] - pub portb_model: PORTB_MODEL, - _reserved8: [u8; 0x08], + #[inline(always)] + pub const fn portb_model(&self) -> &PortbModel { + &self.portb_model + } #[doc = "0x70 - data out"] - pub portb_dout: PORTB_DOUT, + #[inline(always)] + pub const fn portb_dout(&self) -> &PortbDout { + &self.portb_dout + } #[doc = "0x74 - data in"] - pub portb_din: PORTB_DIN, - _reserved10: [u8; 0x18], + #[inline(always)] + pub const fn portb_din(&self) -> &PortbDin { + &self.portb_din + } #[doc = "0x90 - Port control"] - pub portc_ctrl: PORTC_CTRL, + #[inline(always)] + pub const fn portc_ctrl(&self) -> &PortcCtrl { + &self.portc_ctrl + } #[doc = "0x94 - mode low"] - pub portc_model: PORTC_MODEL, - _reserved12: [u8; 0x04], + #[inline(always)] + pub const fn portc_model(&self) -> &PortcModel { + &self.portc_model + } #[doc = "0x9c - mode high"] - pub portc_modeh: PORTC_MODEH, + #[inline(always)] + pub const fn portc_modeh(&self) -> &PortcModeh { + &self.portc_modeh + } #[doc = "0xa0 - data out"] - pub portc_dout: PORTC_DOUT, + #[inline(always)] + pub const fn portc_dout(&self) -> &PortcDout { + &self.portc_dout + } #[doc = "0xa4 - data in"] - pub portc_din: PORTC_DIN, - _reserved15: [u8; 0x18], + #[inline(always)] + pub const fn portc_din(&self) -> &PortcDin { + &self.portc_din + } #[doc = "0xc0 - Port control"] - pub portd_ctrl: PORTD_CTRL, + #[inline(always)] + pub const fn portd_ctrl(&self) -> &PortdCtrl { + &self.portd_ctrl + } #[doc = "0xc4 - mode low"] - pub portd_model: PORTD_MODEL, - _reserved17: [u8; 0x08], + #[inline(always)] + pub const fn portd_model(&self) -> &PortdModel { + &self.portd_model + } #[doc = "0xd0 - data out"] - pub portd_dout: PORTD_DOUT, + #[inline(always)] + pub const fn portd_dout(&self) -> &PortdDout { + &self.portd_dout + } #[doc = "0xd4 - data in"] - pub portd_din: PORTD_DIN, - _reserved19: [u8; 0x0228], + #[inline(always)] + pub const fn portd_din(&self) -> &PortdDin { + &self.portd_din + } #[doc = "0x300 - No Description"] - pub lock: LOCK, - _reserved20: [u8; 0x0c], + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x310 - No Description"] - pub gpiolockstatus: GPIOLOCKSTATUS, - _reserved21: [u8; 0x0c], + #[inline(always)] + pub const fn gpiolockstatus(&self) -> &Gpiolockstatus { + &self.gpiolockstatus + } #[doc = "0x320 - A Bus allocation"] - pub abusalloc: ABUSALLOC, + #[inline(always)] + pub const fn abusalloc(&self) -> &Abusalloc { + &self.abusalloc + } #[doc = "0x324 - B Bus allocation"] - pub bbusalloc: BBUSALLOC, + #[inline(always)] + pub const fn bbusalloc(&self) -> &Bbusalloc { + &self.bbusalloc + } #[doc = "0x328 - CD Bus allocation"] - pub cdbusalloc: CDBUSALLOC, - _reserved24: [u8; 0xd4], + #[inline(always)] + pub const fn cdbusalloc(&self) -> &Cdbusalloc { + &self.cdbusalloc + } #[doc = "0x400 - External Interrupt Port Select Low"] - pub extipsell: EXTIPSELL, + #[inline(always)] + pub const fn extipsell(&self) -> &Extipsell { + &self.extipsell + } #[doc = "0x404 - External interrupt Port Select High"] - pub extipselh: EXTIPSELH, + #[inline(always)] + pub const fn extipselh(&self) -> &Extipselh { + &self.extipselh + } #[doc = "0x408 - External Interrupt Pin Select Low"] - pub extipinsell: EXTIPINSELL, + #[inline(always)] + pub const fn extipinsell(&self) -> &Extipinsell { + &self.extipinsell + } #[doc = "0x40c - External Interrupt Pin Select High"] - pub extipinselh: EXTIPINSELH, + #[inline(always)] + pub const fn extipinselh(&self) -> &Extipinselh { + &self.extipinselh + } #[doc = "0x410 - External Interrupt Rising Edge Trigger"] - pub extirise: EXTIRISE, + #[inline(always)] + pub const fn extirise(&self) -> &Extirise { + &self.extirise + } #[doc = "0x414 - External Interrupt Falling Edge Trigger"] - pub extifall: EXTIFALL, - _reserved30: [u8; 0x08], + #[inline(always)] + pub const fn extifall(&self) -> &Extifall { + &self.extifall + } #[doc = "0x420 - Interrupt Flag"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x424 - Interrupt Enable"] - pub ien: IEN, - _reserved32: [u8; 0x04], + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x42c - No Description"] - pub em4wuen: EM4WUEN, + #[inline(always)] + pub const fn em4wuen(&self) -> &Em4wuen { + &self.em4wuen + } #[doc = "0x430 - No Description"] - pub em4wupol: EM4WUPOL, - _reserved34: [u8; 0x0c], + #[inline(always)] + pub const fn em4wupol(&self) -> &Em4wupol { + &self.em4wupol + } #[doc = "0x440 - No Description"] - pub dbgroutepen: DBGROUTEPEN, + #[inline(always)] + pub const fn dbgroutepen(&self) -> &Dbgroutepen { + &self.dbgroutepen + } #[doc = "0x444 - No Description"] - pub traceroutepen: TRACEROUTEPEN, - _reserved36: [u8; 0x18], + #[inline(always)] + pub const fn traceroutepen(&self) -> &Traceroutepen { + &self.traceroutepen + } #[doc = "0x460 - LCD Segment Enable"] - pub lcdseg: LCDSEG, - _reserved37: [u8; 0x0c], + #[inline(always)] + pub const fn lcdseg(&self) -> &Lcdseg { + &self.lcdseg + } #[doc = "0x470 - LCD Common Enable"] - pub lcdcom: LCDCOM, - _reserved38: [u8; 0x0c], + #[inline(always)] + pub const fn lcdcom(&self) -> &Lcdcom { + &self.lcdcom + } #[doc = "0x480 - ACMP0 pin enable"] - pub acmp0_routeen: ACMP0_ROUTEEN, + #[inline(always)] + pub const fn acmp0_routeen(&self) -> &Acmp0Routeen { + &self.acmp0_routeen + } #[doc = "0x484 - ACMPOUT port/pin select"] - pub acmp0_acmpoutroute: ACMP0_ACMPOUTROUTE, - _reserved40: [u8; 0x04], + #[inline(always)] + pub const fn acmp0_acmpoutroute(&self) -> &Acmp0Acmpoutroute { + &self.acmp0_acmpoutroute + } #[doc = "0x48c - ACMP1 pin enable"] - pub acmp1_routeen: ACMP1_ROUTEEN, + #[inline(always)] + pub const fn acmp1_routeen(&self) -> &Acmp1Routeen { + &self.acmp1_routeen + } #[doc = "0x490 - ACMPOUT port/pin select"] - pub acmp1_acmpoutroute: ACMP1_ACMPOUTROUTE, - _reserved42: [u8; 0x04], + #[inline(always)] + pub const fn acmp1_acmpoutroute(&self) -> &Acmp1Acmpoutroute { + &self.acmp1_acmpoutroute + } #[doc = "0x498 - CMU pin enable"] - pub cmu_routeen: CMU_ROUTEEN, + #[inline(always)] + pub const fn cmu_routeen(&self) -> &CmuRouteen { + &self.cmu_routeen + } #[doc = "0x49c - CLKIN0 port/pin select"] - pub cmu_clkin0route: CMU_CLKIN0ROUTE, + #[inline(always)] + pub const fn cmu_clkin0route(&self) -> &CmuClkin0route { + &self.cmu_clkin0route + } #[doc = "0x4a0 - CLKOUT0 port/pin select"] - pub cmu_clkout0route: CMU_CLKOUT0ROUTE, + #[inline(always)] + pub const fn cmu_clkout0route(&self) -> &CmuClkout0route { + &self.cmu_clkout0route + } #[doc = "0x4a4 - CLKOUT1 port/pin select"] - pub cmu_clkout1route: CMU_CLKOUT1ROUTE, + #[inline(always)] + pub const fn cmu_clkout1route(&self) -> &CmuClkout1route { + &self.cmu_clkout1route + } #[doc = "0x4a8 - CLKOUT2 port/pin select"] - pub cmu_clkout2route: CMU_CLKOUT2ROUTE, - _reserved47: [u8; 0x18], + #[inline(always)] + pub const fn cmu_clkout2route(&self) -> &CmuClkout2route { + &self.cmu_clkout2route + } #[doc = "0x4c4 - EUSART0 pin enable"] - pub eusart0_routeen: EUSART0_ROUTEEN, + #[inline(always)] + pub const fn eusart0_routeen(&self) -> &Eusart0Routeen { + &self.eusart0_routeen + } #[doc = "0x4c8 - CS port/pin select"] - pub eusart0_csroute: EUSART0_CSROUTE, + #[inline(always)] + pub const fn eusart0_csroute(&self) -> &Eusart0Csroute { + &self.eusart0_csroute + } #[doc = "0x4cc - CTS port/pin select"] - pub eusart0_ctsroute: EUSART0_CTSROUTE, + #[inline(always)] + pub const fn eusart0_ctsroute(&self) -> &Eusart0Ctsroute { + &self.eusart0_ctsroute + } #[doc = "0x4d0 - RTS port/pin select"] - pub eusart0_rtsroute: EUSART0_RTSROUTE, + #[inline(always)] + pub const fn eusart0_rtsroute(&self) -> &Eusart0Rtsroute { + &self.eusart0_rtsroute + } #[doc = "0x4d4 - RX port/pin select"] - pub eusart0_rxroute: EUSART0_RXROUTE, + #[inline(always)] + pub const fn eusart0_rxroute(&self) -> &Eusart0Rxroute { + &self.eusart0_rxroute + } #[doc = "0x4d8 - SCLK port/pin select"] - pub eusart0_sclkroute: EUSART0_SCLKROUTE, + #[inline(always)] + pub const fn eusart0_sclkroute(&self) -> &Eusart0Sclkroute { + &self.eusart0_sclkroute + } #[doc = "0x4dc - TX port/pin select"] - pub eusart0_txroute: EUSART0_TXROUTE, - _reserved54: [u8; 0x04], + #[inline(always)] + pub const fn eusart0_txroute(&self) -> &Eusart0Txroute { + &self.eusart0_txroute + } #[doc = "0x4e4 - EUSART1 pin enable"] - pub eusart1_routeen: EUSART1_ROUTEEN, + #[inline(always)] + pub const fn eusart1_routeen(&self) -> &Eusart1Routeen { + &self.eusart1_routeen + } #[doc = "0x4e8 - CS port/pin select"] - pub eusart1_csroute: EUSART1_CSROUTE, + #[inline(always)] + pub const fn eusart1_csroute(&self) -> &Eusart1Csroute { + &self.eusart1_csroute + } #[doc = "0x4ec - CTS port/pin select"] - pub eusart1_ctsroute: EUSART1_CTSROUTE, + #[inline(always)] + pub const fn eusart1_ctsroute(&self) -> &Eusart1Ctsroute { + &self.eusart1_ctsroute + } #[doc = "0x4f0 - RTS port/pin select"] - pub eusart1_rtsroute: EUSART1_RTSROUTE, + #[inline(always)] + pub const fn eusart1_rtsroute(&self) -> &Eusart1Rtsroute { + &self.eusart1_rtsroute + } #[doc = "0x4f4 - RX port/pin select"] - pub eusart1_rxroute: EUSART1_RXROUTE, + #[inline(always)] + pub const fn eusart1_rxroute(&self) -> &Eusart1Rxroute { + &self.eusart1_rxroute + } #[doc = "0x4f8 - SCLK port/pin select"] - pub eusart1_sclkroute: EUSART1_SCLKROUTE, + #[inline(always)] + pub const fn eusart1_sclkroute(&self) -> &Eusart1Sclkroute { + &self.eusart1_sclkroute + } #[doc = "0x4fc - TX port/pin select"] - pub eusart1_txroute: EUSART1_TXROUTE, - _reserved61: [u8; 0x04], + #[inline(always)] + pub const fn eusart1_txroute(&self) -> &Eusart1Txroute { + &self.eusart1_txroute + } #[doc = "0x504 - EUSART2 pin enable"] - pub eusart2_routeen: EUSART2_ROUTEEN, + #[inline(always)] + pub const fn eusart2_routeen(&self) -> &Eusart2Routeen { + &self.eusart2_routeen + } #[doc = "0x508 - CS port/pin select"] - pub eusart2_csroute: EUSART2_CSROUTE, + #[inline(always)] + pub const fn eusart2_csroute(&self) -> &Eusart2Csroute { + &self.eusart2_csroute + } #[doc = "0x50c - CTS port/pin select"] - pub eusart2_ctsroute: EUSART2_CTSROUTE, + #[inline(always)] + pub const fn eusart2_ctsroute(&self) -> &Eusart2Ctsroute { + &self.eusart2_ctsroute + } #[doc = "0x510 - RTS port/pin select"] - pub eusart2_rtsroute: EUSART2_RTSROUTE, + #[inline(always)] + pub const fn eusart2_rtsroute(&self) -> &Eusart2Rtsroute { + &self.eusart2_rtsroute + } #[doc = "0x514 - RX port/pin select"] - pub eusart2_rxroute: EUSART2_RXROUTE, + #[inline(always)] + pub const fn eusart2_rxroute(&self) -> &Eusart2Rxroute { + &self.eusart2_rxroute + } #[doc = "0x518 - SCLK port/pin select"] - pub eusart2_sclkroute: EUSART2_SCLKROUTE, + #[inline(always)] + pub const fn eusart2_sclkroute(&self) -> &Eusart2Sclkroute { + &self.eusart2_sclkroute + } #[doc = "0x51c - TX port/pin select"] - pub eusart2_txroute: EUSART2_TXROUTE, - _reserved68: [u8; 0x18], + #[inline(always)] + pub const fn eusart2_txroute(&self) -> &Eusart2Txroute { + &self.eusart2_txroute + } #[doc = "0x538 - I2C0 pin enable"] - pub i2c0_routeen: I2C0_ROUTEEN, + #[inline(always)] + pub const fn i2c0_routeen(&self) -> &I2c0Routeen { + &self.i2c0_routeen + } #[doc = "0x53c - SCL port/pin select"] - pub i2c0_sclroute: I2C0_SCLROUTE, + #[inline(always)] + pub const fn i2c0_sclroute(&self) -> &I2c0Sclroute { + &self.i2c0_sclroute + } #[doc = "0x540 - SDA port/pin select"] - pub i2c0_sdaroute: I2C0_SDAROUTE, - _reserved71: [u8; 0x04], + #[inline(always)] + pub const fn i2c0_sdaroute(&self) -> &I2c0Sdaroute { + &self.i2c0_sdaroute + } #[doc = "0x548 - I2C1 pin enable"] - pub i2c1_routeen: I2C1_ROUTEEN, + #[inline(always)] + pub const fn i2c1_routeen(&self) -> &I2c1Routeen { + &self.i2c1_routeen + } #[doc = "0x54c - SCL port/pin select"] - pub i2c1_sclroute: I2C1_SCLROUTE, + #[inline(always)] + pub const fn i2c1_sclroute(&self) -> &I2c1Sclroute { + &self.i2c1_sclroute + } #[doc = "0x550 - SDA port/pin select"] - pub i2c1_sdaroute: I2C1_SDAROUTE, - _reserved74: [u8; 0x04], + #[inline(always)] + pub const fn i2c1_sdaroute(&self) -> &I2c1Sdaroute { + &self.i2c1_sdaroute + } #[doc = "0x558 - KEYSCAN pin enable"] - pub keyscan_routeen: KEYSCAN_ROUTEEN, + #[inline(always)] + pub const fn keyscan_routeen(&self) -> &KeyscanRouteen { + &self.keyscan_routeen + } #[doc = "0x55c - COLOUT0 port/pin select"] - pub keyscan_colout0route: KEYSCAN_COLOUT0ROUTE, + #[inline(always)] + pub const fn keyscan_colout0route(&self) -> &KeyscanColout0route { + &self.keyscan_colout0route + } #[doc = "0x560 - COLOUT1 port/pin select"] - pub keyscan_colout1route: KEYSCAN_COLOUT1ROUTE, + #[inline(always)] + pub const fn keyscan_colout1route(&self) -> &KeyscanColout1route { + &self.keyscan_colout1route + } #[doc = "0x564 - COLOUT2 port/pin select"] - pub keyscan_colout2route: KEYSCAN_COLOUT2ROUTE, + #[inline(always)] + pub const fn keyscan_colout2route(&self) -> &KeyscanColout2route { + &self.keyscan_colout2route + } #[doc = "0x568 - COLOUT3 port/pin select"] - pub keyscan_colout3route: KEYSCAN_COLOUT3ROUTE, + #[inline(always)] + pub const fn keyscan_colout3route(&self) -> &KeyscanColout3route { + &self.keyscan_colout3route + } #[doc = "0x56c - COLOUT4 port/pin select"] - pub keyscan_colout4route: KEYSCAN_COLOUT4ROUTE, + #[inline(always)] + pub const fn keyscan_colout4route(&self) -> &KeyscanColout4route { + &self.keyscan_colout4route + } #[doc = "0x570 - COLOUT5 port/pin select"] - pub keyscan_colout5route: KEYSCAN_COLOUT5ROUTE, + #[inline(always)] + pub const fn keyscan_colout5route(&self) -> &KeyscanColout5route { + &self.keyscan_colout5route + } #[doc = "0x574 - COLOUT6 port/pin select"] - pub keyscan_colout6route: KEYSCAN_COLOUT6ROUTE, + #[inline(always)] + pub const fn keyscan_colout6route(&self) -> &KeyscanColout6route { + &self.keyscan_colout6route + } #[doc = "0x578 - COLOUT7 port/pin select"] - pub keyscan_colout7route: KEYSCAN_COLOUT7ROUTE, + #[inline(always)] + pub const fn keyscan_colout7route(&self) -> &KeyscanColout7route { + &self.keyscan_colout7route + } #[doc = "0x57c - ROWSENSE0 port/pin select"] - pub keyscan_rowsense0route: KEYSCAN_ROWSENSE0ROUTE, + #[inline(always)] + pub const fn keyscan_rowsense0route(&self) -> &KeyscanRowsense0route { + &self.keyscan_rowsense0route + } #[doc = "0x580 - ROWSENSE1 port/pin select"] - pub keyscan_rowsense1route: KEYSCAN_ROWSENSE1ROUTE, + #[inline(always)] + pub const fn keyscan_rowsense1route(&self) -> &KeyscanRowsense1route { + &self.keyscan_rowsense1route + } #[doc = "0x584 - ROWSENSE2 port/pin select"] - pub keyscan_rowsense2route: KEYSCAN_ROWSENSE2ROUTE, + #[inline(always)] + pub const fn keyscan_rowsense2route(&self) -> &KeyscanRowsense2route { + &self.keyscan_rowsense2route + } #[doc = "0x588 - ROWSENSE3 port/pin select"] - pub keyscan_rowsense3route: KEYSCAN_ROWSENSE3ROUTE, + #[inline(always)] + pub const fn keyscan_rowsense3route(&self) -> &KeyscanRowsense3route { + &self.keyscan_rowsense3route + } #[doc = "0x58c - ROWSENSE4 port/pin select"] - pub keyscan_rowsense4route: KEYSCAN_ROWSENSE4ROUTE, + #[inline(always)] + pub const fn keyscan_rowsense4route(&self) -> &KeyscanRowsense4route { + &self.keyscan_rowsense4route + } #[doc = "0x590 - ROWSENSE5 port/pin select"] - pub keyscan_rowsense5route: KEYSCAN_ROWSENSE5ROUTE, - _reserved89: [u8; 0x04], + #[inline(always)] + pub const fn keyscan_rowsense5route(&self) -> &KeyscanRowsense5route { + &self.keyscan_rowsense5route + } #[doc = "0x598 - LESENSE pin enable"] - pub lesense_routeen: LESENSE_ROUTEEN, + #[inline(always)] + pub const fn lesense_routeen(&self) -> &LesenseRouteen { + &self.lesense_routeen + } #[doc = "0x59c - CH0OUT port/pin select"] - pub lesense_ch0outroute: LESENSE_CH0OUTROUTE, + #[inline(always)] + pub const fn lesense_ch0outroute(&self) -> &LesenseCh0outroute { + &self.lesense_ch0outroute + } #[doc = "0x5a0 - CH1OUT port/pin select"] - pub lesense_ch1outroute: LESENSE_CH1OUTROUTE, + #[inline(always)] + pub const fn lesense_ch1outroute(&self) -> &LesenseCh1outroute { + &self.lesense_ch1outroute + } #[doc = "0x5a4 - CH2OUT port/pin select"] - pub lesense_ch2outroute: LESENSE_CH2OUTROUTE, + #[inline(always)] + pub const fn lesense_ch2outroute(&self) -> &LesenseCh2outroute { + &self.lesense_ch2outroute + } #[doc = "0x5a8 - CH3OUT port/pin select"] - pub lesense_ch3outroute: LESENSE_CH3OUTROUTE, + #[inline(always)] + pub const fn lesense_ch3outroute(&self) -> &LesenseCh3outroute { + &self.lesense_ch3outroute + } #[doc = "0x5ac - CH4OUT port/pin select"] - pub lesense_ch4outroute: LESENSE_CH4OUTROUTE, + #[inline(always)] + pub const fn lesense_ch4outroute(&self) -> &LesenseCh4outroute { + &self.lesense_ch4outroute + } #[doc = "0x5b0 - CH5OUT port/pin select"] - pub lesense_ch5outroute: LESENSE_CH5OUTROUTE, + #[inline(always)] + pub const fn lesense_ch5outroute(&self) -> &LesenseCh5outroute { + &self.lesense_ch5outroute + } #[doc = "0x5b4 - CH6OUT port/pin select"] - pub lesense_ch6outroute: LESENSE_CH6OUTROUTE, + #[inline(always)] + pub const fn lesense_ch6outroute(&self) -> &LesenseCh6outroute { + &self.lesense_ch6outroute + } #[doc = "0x5b8 - CH7OUT port/pin select"] - pub lesense_ch7outroute: LESENSE_CH7OUTROUTE, + #[inline(always)] + pub const fn lesense_ch7outroute(&self) -> &LesenseCh7outroute { + &self.lesense_ch7outroute + } #[doc = "0x5bc - CH8OUT port/pin select"] - pub lesense_ch8outroute: LESENSE_CH8OUTROUTE, + #[inline(always)] + pub const fn lesense_ch8outroute(&self) -> &LesenseCh8outroute { + &self.lesense_ch8outroute + } #[doc = "0x5c0 - CH9OUT port/pin select"] - pub lesense_ch9outroute: LESENSE_CH9OUTROUTE, + #[inline(always)] + pub const fn lesense_ch9outroute(&self) -> &LesenseCh9outroute { + &self.lesense_ch9outroute + } #[doc = "0x5c4 - CH10OUT port/pin select"] - pub lesense_ch10outroute: LESENSE_CH10OUTROUTE, + #[inline(always)] + pub const fn lesense_ch10outroute(&self) -> &LesenseCh10outroute { + &self.lesense_ch10outroute + } #[doc = "0x5c8 - CH11OUT port/pin select"] - pub lesense_ch11outroute: LESENSE_CH11OUTROUTE, + #[inline(always)] + pub const fn lesense_ch11outroute(&self) -> &LesenseCh11outroute { + &self.lesense_ch11outroute + } #[doc = "0x5cc - CH12OUT port/pin select"] - pub lesense_ch12outroute: LESENSE_CH12OUTROUTE, + #[inline(always)] + pub const fn lesense_ch12outroute(&self) -> &LesenseCh12outroute { + &self.lesense_ch12outroute + } #[doc = "0x5d0 - CH13OUT port/pin select"] - pub lesense_ch13outroute: LESENSE_CH13OUTROUTE, + #[inline(always)] + pub const fn lesense_ch13outroute(&self) -> &LesenseCh13outroute { + &self.lesense_ch13outroute + } #[doc = "0x5d4 - CH14OUT port/pin select"] - pub lesense_ch14outroute: LESENSE_CH14OUTROUTE, + #[inline(always)] + pub const fn lesense_ch14outroute(&self) -> &LesenseCh14outroute { + &self.lesense_ch14outroute + } #[doc = "0x5d8 - CH15OUT port/pin select"] - pub lesense_ch15outroute: LESENSE_CH15OUTROUTE, - _reserved106: [u8; 0x04], + #[inline(always)] + pub const fn lesense_ch15outroute(&self) -> &LesenseCh15outroute { + &self.lesense_ch15outroute + } #[doc = "0x5e0 - LETIMER pin enable"] - pub letimer_routeen: LETIMER_ROUTEEN, + #[inline(always)] + pub const fn letimer_routeen(&self) -> &LetimerRouteen { + &self.letimer_routeen + } #[doc = "0x5e4 - OUT0 port/pin select"] - pub letimer_out0route: LETIMER_OUT0ROUTE, + #[inline(always)] + pub const fn letimer_out0route(&self) -> &LetimerOut0route { + &self.letimer_out0route + } #[doc = "0x5e8 - OUT1 port/pin select"] - pub letimer_out1route: LETIMER_OUT1ROUTE, - _reserved109: [u8; 0x50], + #[inline(always)] + pub const fn letimer_out1route(&self) -> &LetimerOut1route { + &self.letimer_out1route + } #[doc = "0x63c - S0IN port/pin select"] - pub pcnt0_s0inroute: PCNT0_S0INROUTE, + #[inline(always)] + pub const fn pcnt0_s0inroute(&self) -> &Pcnt0S0inroute { + &self.pcnt0_s0inroute + } #[doc = "0x640 - S1IN port/pin select"] - pub pcnt0_s1inroute: PCNT0_S1INROUTE, - _reserved111: [u8; 0x04], + #[inline(always)] + pub const fn pcnt0_s1inroute(&self) -> &Pcnt0S1inroute { + &self.pcnt0_s1inroute + } #[doc = "0x648 - PRS0 pin enable"] - pub prs0_routeen: PRS0_ROUTEEN, + #[inline(always)] + pub const fn prs0_routeen(&self) -> &Prs0Routeen { + &self.prs0_routeen + } #[doc = "0x64c - ASYNCH0 port/pin select"] - pub prs0_asynch0route: PRS0_ASYNCH0ROUTE, + #[inline(always)] + pub const fn prs0_asynch0route(&self) -> &Prs0Asynch0route { + &self.prs0_asynch0route + } #[doc = "0x650 - ASYNCH1 port/pin select"] - pub prs0_asynch1route: PRS0_ASYNCH1ROUTE, + #[inline(always)] + pub const fn prs0_asynch1route(&self) -> &Prs0Asynch1route { + &self.prs0_asynch1route + } #[doc = "0x654 - ASYNCH2 port/pin select"] - pub prs0_asynch2route: PRS0_ASYNCH2ROUTE, + #[inline(always)] + pub const fn prs0_asynch2route(&self) -> &Prs0Asynch2route { + &self.prs0_asynch2route + } #[doc = "0x658 - ASYNCH3 port/pin select"] - pub prs0_asynch3route: PRS0_ASYNCH3ROUTE, + #[inline(always)] + pub const fn prs0_asynch3route(&self) -> &Prs0Asynch3route { + &self.prs0_asynch3route + } #[doc = "0x65c - ASYNCH4 port/pin select"] - pub prs0_asynch4route: PRS0_ASYNCH4ROUTE, + #[inline(always)] + pub const fn prs0_asynch4route(&self) -> &Prs0Asynch4route { + &self.prs0_asynch4route + } #[doc = "0x660 - ASYNCH5 port/pin select"] - pub prs0_asynch5route: PRS0_ASYNCH5ROUTE, + #[inline(always)] + pub const fn prs0_asynch5route(&self) -> &Prs0Asynch5route { + &self.prs0_asynch5route + } #[doc = "0x664 - ASYNCH6 port/pin select"] - pub prs0_asynch6route: PRS0_ASYNCH6ROUTE, + #[inline(always)] + pub const fn prs0_asynch6route(&self) -> &Prs0Asynch6route { + &self.prs0_asynch6route + } #[doc = "0x668 - ASYNCH7 port/pin select"] - pub prs0_asynch7route: PRS0_ASYNCH7ROUTE, + #[inline(always)] + pub const fn prs0_asynch7route(&self) -> &Prs0Asynch7route { + &self.prs0_asynch7route + } #[doc = "0x66c - ASYNCH8 port/pin select"] - pub prs0_asynch8route: PRS0_ASYNCH8ROUTE, + #[inline(always)] + pub const fn prs0_asynch8route(&self) -> &Prs0Asynch8route { + &self.prs0_asynch8route + } #[doc = "0x670 - ASYNCH9 port/pin select"] - pub prs0_asynch9route: PRS0_ASYNCH9ROUTE, + #[inline(always)] + pub const fn prs0_asynch9route(&self) -> &Prs0Asynch9route { + &self.prs0_asynch9route + } #[doc = "0x674 - ASYNCH10 port/pin select"] - pub prs0_asynch10route: PRS0_ASYNCH10ROUTE, + #[inline(always)] + pub const fn prs0_asynch10route(&self) -> &Prs0Asynch10route { + &self.prs0_asynch10route + } #[doc = "0x678 - ASYNCH11 port/pin select"] - pub prs0_asynch11route: PRS0_ASYNCH11ROUTE, + #[inline(always)] + pub const fn prs0_asynch11route(&self) -> &Prs0Asynch11route { + &self.prs0_asynch11route + } #[doc = "0x67c - SYNCH0 port/pin select"] - pub prs0_synch0route: PRS0_SYNCH0ROUTE, + #[inline(always)] + pub const fn prs0_synch0route(&self) -> &Prs0Synch0route { + &self.prs0_synch0route + } #[doc = "0x680 - SYNCH1 port/pin select"] - pub prs0_synch1route: PRS0_SYNCH1ROUTE, + #[inline(always)] + pub const fn prs0_synch1route(&self) -> &Prs0Synch1route { + &self.prs0_synch1route + } #[doc = "0x684 - SYNCH2 port/pin select"] - pub prs0_synch2route: PRS0_SYNCH2ROUTE, + #[inline(always)] + pub const fn prs0_synch2route(&self) -> &Prs0Synch2route { + &self.prs0_synch2route + } #[doc = "0x688 - SYNCH3 port/pin select"] - pub prs0_synch3route: PRS0_SYNCH3ROUTE, - _reserved128: [u8; 0x64], + #[inline(always)] + pub const fn prs0_synch3route(&self) -> &Prs0Synch3route { + &self.prs0_synch3route + } #[doc = "0x6f0 - BUFOUTREQINASYNC port/pin select"] - pub syxo0_bufoutreqinasyncroute: SYXO0_BUFOUTREQINASYNCROUTE, - _reserved129: [u8; 0x04], + #[inline(always)] + pub const fn syxo0_bufoutreqinasyncroute(&self) -> &Syxo0Bufoutreqinasyncroute { + &self.syxo0_bufoutreqinasyncroute + } #[doc = "0x6f8 - TIMER0 pin enable"] - pub timer0_routeen: TIMER0_ROUTEEN, + #[inline(always)] + pub const fn timer0_routeen(&self) -> &Timer0Routeen { + &self.timer0_routeen + } #[doc = "0x6fc - CC0 port/pin select"] - pub timer0_cc0route: TIMER0_CC0ROUTE, + #[inline(always)] + pub const fn timer0_cc0route(&self) -> &Timer0Cc0route { + &self.timer0_cc0route + } #[doc = "0x700 - CC1 port/pin select"] - pub timer0_cc1route: TIMER0_CC1ROUTE, + #[inline(always)] + pub const fn timer0_cc1route(&self) -> &Timer0Cc1route { + &self.timer0_cc1route + } #[doc = "0x704 - CC2 port/pin select"] - pub timer0_cc2route: TIMER0_CC2ROUTE, + #[inline(always)] + pub const fn timer0_cc2route(&self) -> &Timer0Cc2route { + &self.timer0_cc2route + } #[doc = "0x708 - CDTI0 port/pin select"] - pub timer0_cdti0route: TIMER0_CDTI0ROUTE, + #[inline(always)] + pub const fn timer0_cdti0route(&self) -> &Timer0Cdti0route { + &self.timer0_cdti0route + } #[doc = "0x70c - CDTI1 port/pin select"] - pub timer0_cdti1route: TIMER0_CDTI1ROUTE, + #[inline(always)] + pub const fn timer0_cdti1route(&self) -> &Timer0Cdti1route { + &self.timer0_cdti1route + } #[doc = "0x710 - CDTI2 port/pin select"] - pub timer0_cdti2route: TIMER0_CDTI2ROUTE, - _reserved136: [u8; 0x04], + #[inline(always)] + pub const fn timer0_cdti2route(&self) -> &Timer0Cdti2route { + &self.timer0_cdti2route + } #[doc = "0x718 - TIMER1 pin enable"] - pub timer1_routeen: TIMER1_ROUTEEN, + #[inline(always)] + pub const fn timer1_routeen(&self) -> &Timer1Routeen { + &self.timer1_routeen + } #[doc = "0x71c - CC0 port/pin select"] - pub timer1_cc0route: TIMER1_CC0ROUTE, + #[inline(always)] + pub const fn timer1_cc0route(&self) -> &Timer1Cc0route { + &self.timer1_cc0route + } #[doc = "0x720 - CC1 port/pin select"] - pub timer1_cc1route: TIMER1_CC1ROUTE, + #[inline(always)] + pub const fn timer1_cc1route(&self) -> &Timer1Cc1route { + &self.timer1_cc1route + } #[doc = "0x724 - CC2 port/pin select"] - pub timer1_cc2route: TIMER1_CC2ROUTE, + #[inline(always)] + pub const fn timer1_cc2route(&self) -> &Timer1Cc2route { + &self.timer1_cc2route + } #[doc = "0x728 - CDTI0 port/pin select"] - pub timer1_cdti0route: TIMER1_CDTI0ROUTE, + #[inline(always)] + pub const fn timer1_cdti0route(&self) -> &Timer1Cdti0route { + &self.timer1_cdti0route + } #[doc = "0x72c - CDTI1 port/pin select"] - pub timer1_cdti1route: TIMER1_CDTI1ROUTE, + #[inline(always)] + pub const fn timer1_cdti1route(&self) -> &Timer1Cdti1route { + &self.timer1_cdti1route + } #[doc = "0x730 - CDTI2 port/pin select"] - pub timer1_cdti2route: TIMER1_CDTI2ROUTE, - _reserved143: [u8; 0x04], + #[inline(always)] + pub const fn timer1_cdti2route(&self) -> &Timer1Cdti2route { + &self.timer1_cdti2route + } #[doc = "0x738 - TIMER2 pin enable"] - pub timer2_routeen: TIMER2_ROUTEEN, + #[inline(always)] + pub const fn timer2_routeen(&self) -> &Timer2Routeen { + &self.timer2_routeen + } #[doc = "0x73c - CC0 port/pin select"] - pub timer2_cc0route: TIMER2_CC0ROUTE, + #[inline(always)] + pub const fn timer2_cc0route(&self) -> &Timer2Cc0route { + &self.timer2_cc0route + } #[doc = "0x740 - CC1 port/pin select"] - pub timer2_cc1route: TIMER2_CC1ROUTE, + #[inline(always)] + pub const fn timer2_cc1route(&self) -> &Timer2Cc1route { + &self.timer2_cc1route + } #[doc = "0x744 - CC2 port/pin select"] - pub timer2_cc2route: TIMER2_CC2ROUTE, + #[inline(always)] + pub const fn timer2_cc2route(&self) -> &Timer2Cc2route { + &self.timer2_cc2route + } #[doc = "0x748 - CDTI0 port/pin select"] - pub timer2_cdti0route: TIMER2_CDTI0ROUTE, + #[inline(always)] + pub const fn timer2_cdti0route(&self) -> &Timer2Cdti0route { + &self.timer2_cdti0route + } #[doc = "0x74c - CDTI1 port/pin select"] - pub timer2_cdti1route: TIMER2_CDTI1ROUTE, + #[inline(always)] + pub const fn timer2_cdti1route(&self) -> &Timer2Cdti1route { + &self.timer2_cdti1route + } #[doc = "0x750 - CDTI2 port/pin select"] - pub timer2_cdti2route: TIMER2_CDTI2ROUTE, - _reserved150: [u8; 0x04], + #[inline(always)] + pub const fn timer2_cdti2route(&self) -> &Timer2Cdti2route { + &self.timer2_cdti2route + } #[doc = "0x758 - TIMER3 pin enable"] - pub timer3_routeen: TIMER3_ROUTEEN, + #[inline(always)] + pub const fn timer3_routeen(&self) -> &Timer3Routeen { + &self.timer3_routeen + } #[doc = "0x75c - CC0 port/pin select"] - pub timer3_cc0route: TIMER3_CC0ROUTE, + #[inline(always)] + pub const fn timer3_cc0route(&self) -> &Timer3Cc0route { + &self.timer3_cc0route + } #[doc = "0x760 - CC1 port/pin select"] - pub timer3_cc1route: TIMER3_CC1ROUTE, + #[inline(always)] + pub const fn timer3_cc1route(&self) -> &Timer3Cc1route { + &self.timer3_cc1route + } #[doc = "0x764 - CC2 port/pin select"] - pub timer3_cc2route: TIMER3_CC2ROUTE, + #[inline(always)] + pub const fn timer3_cc2route(&self) -> &Timer3Cc2route { + &self.timer3_cc2route + } #[doc = "0x768 - CDTI0 port/pin select"] - pub timer3_cdti0route: TIMER3_CDTI0ROUTE, + #[inline(always)] + pub const fn timer3_cdti0route(&self) -> &Timer3Cdti0route { + &self.timer3_cdti0route + } #[doc = "0x76c - CDTI1 port/pin select"] - pub timer3_cdti1route: TIMER3_CDTI1ROUTE, + #[inline(always)] + pub const fn timer3_cdti1route(&self) -> &Timer3Cdti1route { + &self.timer3_cdti1route + } #[doc = "0x770 - CDTI2 port/pin select"] - pub timer3_cdti2route: TIMER3_CDTI2ROUTE, - _reserved157: [u8; 0x04], + #[inline(always)] + pub const fn timer3_cdti2route(&self) -> &Timer3Cdti2route { + &self.timer3_cdti2route + } #[doc = "0x778 - TIMER4 pin enable"] - pub timer4_routeen: TIMER4_ROUTEEN, + #[inline(always)] + pub const fn timer4_routeen(&self) -> &Timer4Routeen { + &self.timer4_routeen + } #[doc = "0x77c - CC0 port/pin select"] - pub timer4_cc0route: TIMER4_CC0ROUTE, + #[inline(always)] + pub const fn timer4_cc0route(&self) -> &Timer4Cc0route { + &self.timer4_cc0route + } #[doc = "0x780 - CC1 port/pin select"] - pub timer4_cc1route: TIMER4_CC1ROUTE, + #[inline(always)] + pub const fn timer4_cc1route(&self) -> &Timer4Cc1route { + &self.timer4_cc1route + } #[doc = "0x784 - CC2 port/pin select"] - pub timer4_cc2route: TIMER4_CC2ROUTE, + #[inline(always)] + pub const fn timer4_cc2route(&self) -> &Timer4Cc2route { + &self.timer4_cc2route + } #[doc = "0x788 - CDTI0 port/pin select"] - pub timer4_cdti0route: TIMER4_CDTI0ROUTE, + #[inline(always)] + pub const fn timer4_cdti0route(&self) -> &Timer4Cdti0route { + &self.timer4_cdti0route + } #[doc = "0x78c - CDTI1 port/pin select"] - pub timer4_cdti1route: TIMER4_CDTI1ROUTE, + #[inline(always)] + pub const fn timer4_cdti1route(&self) -> &Timer4Cdti1route { + &self.timer4_cdti1route + } #[doc = "0x790 - CDTI2 port/pin select"] - pub timer4_cdti2route: TIMER4_CDTI2ROUTE, - _reserved164: [u8; 0x04], + #[inline(always)] + pub const fn timer4_cdti2route(&self) -> &Timer4Cdti2route { + &self.timer4_cdti2route + } #[doc = "0x798 - USART0 pin enable"] - pub usart0_routeen: USART0_ROUTEEN, + #[inline(always)] + pub const fn usart0_routeen(&self) -> &Usart0Routeen { + &self.usart0_routeen + } #[doc = "0x79c - CS port/pin select"] - pub usart0_csroute: USART0_CSROUTE, + #[inline(always)] + pub const fn usart0_csroute(&self) -> &Usart0Csroute { + &self.usart0_csroute + } #[doc = "0x7a0 - CTS port/pin select"] - pub usart0_ctsroute: USART0_CTSROUTE, + #[inline(always)] + pub const fn usart0_ctsroute(&self) -> &Usart0Ctsroute { + &self.usart0_ctsroute + } #[doc = "0x7a4 - RTS port/pin select"] - pub usart0_rtsroute: USART0_RTSROUTE, + #[inline(always)] + pub const fn usart0_rtsroute(&self) -> &Usart0Rtsroute { + &self.usart0_rtsroute + } #[doc = "0x7a8 - RX port/pin select"] - pub usart0_rxroute: USART0_RXROUTE, + #[inline(always)] + pub const fn usart0_rxroute(&self) -> &Usart0Rxroute { + &self.usart0_rxroute + } #[doc = "0x7ac - SCLK port/pin select"] - pub usart0_clkroute: USART0_CLKROUTE, + #[inline(always)] + pub const fn usart0_clkroute(&self) -> &Usart0Clkroute { + &self.usart0_clkroute + } #[doc = "0x7b0 - TX port/pin select"] - pub usart0_txroute: USART0_TXROUTE, + #[inline(always)] + pub const fn usart0_txroute(&self) -> &Usart0Txroute { + &self.usart0_txroute + } + #[doc = "0x1420 - Interrupt Flag Set"] + #[inline(always)] + pub const fn if_set(&self) -> &IfSet { + &self.if_set + } + #[doc = "0x2420 - Interrupt Flag Clear"] + #[inline(always)] + pub const fn if_clr(&self) -> &IfClr { + &self.if_clr + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "PORTA_CTRL (rw) register accessor: an alias for `Reg`"] -pub type PORTA_CTRL = crate::Reg; +#[doc = "PORTA_CTRL (rw) register accessor: Port control\n\nYou can [`read`](crate::Reg::read) this register and get [`porta_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`porta_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@porta_ctrl`] +module"] +#[doc(alias = "PORTA_CTRL")] +pub type PortaCtrl = crate::Reg; #[doc = "Port control"] pub mod porta_ctrl; -#[doc = "PORTA_MODEL (rw) register accessor: an alias for `Reg`"] -pub type PORTA_MODEL = crate::Reg; +#[doc = "PORTA_MODEL (rw) register accessor: mode low\n\nYou can [`read`](crate::Reg::read) this register and get [`porta_model::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`porta_model::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@porta_model`] +module"] +#[doc(alias = "PORTA_MODEL")] +pub type PortaModel = crate::Reg; #[doc = "mode low"] pub mod porta_model; -#[doc = "PORTA_MODEH (rw) register accessor: an alias for `Reg`"] -pub type PORTA_MODEH = crate::Reg; +#[doc = "PORTA_MODEH (rw) register accessor: mode high\n\nYou can [`read`](crate::Reg::read) this register and get [`porta_modeh::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`porta_modeh::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@porta_modeh`] +module"] +#[doc(alias = "PORTA_MODEH")] +pub type PortaModeh = crate::Reg; #[doc = "mode high"] pub mod porta_modeh; -#[doc = "PORTA_DOUT (rw) register accessor: an alias for `Reg`"] -pub type PORTA_DOUT = crate::Reg; +#[doc = "PORTA_DOUT (rw) register accessor: data out\n\nYou can [`read`](crate::Reg::read) this register and get [`porta_dout::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`porta_dout::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@porta_dout`] +module"] +#[doc(alias = "PORTA_DOUT")] +pub type PortaDout = crate::Reg; #[doc = "data out"] pub mod porta_dout; -#[doc = "PORTA_DIN (r) register accessor: an alias for `Reg`"] -pub type PORTA_DIN = crate::Reg; +#[doc = "PORTA_DIN (r) register accessor: data in\n\nYou can [`read`](crate::Reg::read) this register and get [`porta_din::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@porta_din`] +module"] +#[doc(alias = "PORTA_DIN")] +pub type PortaDin = crate::Reg; #[doc = "data in"] pub mod porta_din; -#[doc = "PORTB_CTRL (rw) register accessor: an alias for `Reg`"] -pub type PORTB_CTRL = crate::Reg; +#[doc = "PORTB_CTRL (rw) register accessor: Port control\n\nYou can [`read`](crate::Reg::read) this register and get [`portb_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portb_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@portb_ctrl`] +module"] +#[doc(alias = "PORTB_CTRL")] +pub type PortbCtrl = crate::Reg; #[doc = "Port control"] pub mod portb_ctrl; -#[doc = "PORTB_MODEL (rw) register accessor: an alias for `Reg`"] -pub type PORTB_MODEL = crate::Reg; +#[doc = "PORTB_MODEL (rw) register accessor: mode low\n\nYou can [`read`](crate::Reg::read) this register and get [`portb_model::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portb_model::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@portb_model`] +module"] +#[doc(alias = "PORTB_MODEL")] +pub type PortbModel = crate::Reg; #[doc = "mode low"] pub mod portb_model; -#[doc = "PORTB_DOUT (rw) register accessor: an alias for `Reg`"] -pub type PORTB_DOUT = crate::Reg; +#[doc = "PORTB_DOUT (rw) register accessor: data out\n\nYou can [`read`](crate::Reg::read) this register and get [`portb_dout::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portb_dout::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@portb_dout`] +module"] +#[doc(alias = "PORTB_DOUT")] +pub type PortbDout = crate::Reg; #[doc = "data out"] pub mod portb_dout; -#[doc = "PORTB_DIN (r) register accessor: an alias for `Reg`"] -pub type PORTB_DIN = crate::Reg; +#[doc = "PORTB_DIN (r) register accessor: data in\n\nYou can [`read`](crate::Reg::read) this register and get [`portb_din::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@portb_din`] +module"] +#[doc(alias = "PORTB_DIN")] +pub type PortbDin = crate::Reg; #[doc = "data in"] pub mod portb_din; -#[doc = "PORTC_CTRL (rw) register accessor: an alias for `Reg`"] -pub type PORTC_CTRL = crate::Reg; +#[doc = "PORTC_CTRL (rw) register accessor: Port control\n\nYou can [`read`](crate::Reg::read) this register and get [`portc_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portc_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@portc_ctrl`] +module"] +#[doc(alias = "PORTC_CTRL")] +pub type PortcCtrl = crate::Reg; #[doc = "Port control"] pub mod portc_ctrl; -#[doc = "PORTC_MODEL (rw) register accessor: an alias for `Reg`"] -pub type PORTC_MODEL = crate::Reg; +#[doc = "PORTC_MODEL (rw) register accessor: mode low\n\nYou can [`read`](crate::Reg::read) this register and get [`portc_model::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portc_model::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@portc_model`] +module"] +#[doc(alias = "PORTC_MODEL")] +pub type PortcModel = crate::Reg; #[doc = "mode low"] pub mod portc_model; -#[doc = "PORTC_MODEH (rw) register accessor: an alias for `Reg`"] -pub type PORTC_MODEH = crate::Reg; +#[doc = "PORTC_MODEH (rw) register accessor: mode high\n\nYou can [`read`](crate::Reg::read) this register and get [`portc_modeh::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portc_modeh::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@portc_modeh`] +module"] +#[doc(alias = "PORTC_MODEH")] +pub type PortcModeh = crate::Reg; #[doc = "mode high"] pub mod portc_modeh; -#[doc = "PORTC_DOUT (rw) register accessor: an alias for `Reg`"] -pub type PORTC_DOUT = crate::Reg; +#[doc = "PORTC_DOUT (rw) register accessor: data out\n\nYou can [`read`](crate::Reg::read) this register and get [`portc_dout::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portc_dout::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@portc_dout`] +module"] +#[doc(alias = "PORTC_DOUT")] +pub type PortcDout = crate::Reg; #[doc = "data out"] pub mod portc_dout; -#[doc = "PORTC_DIN (r) register accessor: an alias for `Reg`"] -pub type PORTC_DIN = crate::Reg; +#[doc = "PORTC_DIN (r) register accessor: data in\n\nYou can [`read`](crate::Reg::read) this register and get [`portc_din::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@portc_din`] +module"] +#[doc(alias = "PORTC_DIN")] +pub type PortcDin = crate::Reg; #[doc = "data in"] pub mod portc_din; -#[doc = "PORTD_CTRL (rw) register accessor: an alias for `Reg`"] -pub type PORTD_CTRL = crate::Reg; +#[doc = "PORTD_CTRL (rw) register accessor: Port control\n\nYou can [`read`](crate::Reg::read) this register and get [`portd_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portd_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@portd_ctrl`] +module"] +#[doc(alias = "PORTD_CTRL")] +pub type PortdCtrl = crate::Reg; #[doc = "Port control"] pub mod portd_ctrl; -#[doc = "PORTD_MODEL (rw) register accessor: an alias for `Reg`"] -pub type PORTD_MODEL = crate::Reg; +#[doc = "PORTD_MODEL (rw) register accessor: mode low\n\nYou can [`read`](crate::Reg::read) this register and get [`portd_model::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portd_model::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@portd_model`] +module"] +#[doc(alias = "PORTD_MODEL")] +pub type PortdModel = crate::Reg; #[doc = "mode low"] pub mod portd_model; -#[doc = "PORTD_DOUT (rw) register accessor: an alias for `Reg`"] -pub type PORTD_DOUT = crate::Reg; +#[doc = "PORTD_DOUT (rw) register accessor: data out\n\nYou can [`read`](crate::Reg::read) this register and get [`portd_dout::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portd_dout::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@portd_dout`] +module"] +#[doc(alias = "PORTD_DOUT")] +pub type PortdDout = crate::Reg; #[doc = "data out"] pub mod portd_dout; -#[doc = "PORTD_DIN (r) register accessor: an alias for `Reg`"] -pub type PORTD_DIN = crate::Reg; +#[doc = "PORTD_DIN (r) register accessor: data in\n\nYou can [`read`](crate::Reg::read) this register and get [`portd_din::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@portd_din`] +module"] +#[doc(alias = "PORTD_DIN")] +pub type PortdDin = crate::Reg; #[doc = "data in"] pub mod portd_din; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "GPIOLOCKSTATUS (r) register accessor: an alias for `Reg`"] -pub type GPIOLOCKSTATUS = crate::Reg; +#[doc = "GPIOLOCKSTATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`gpiolockstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpiolockstatus`] +module"] +#[doc(alias = "GPIOLOCKSTATUS")] +pub type Gpiolockstatus = crate::Reg; #[doc = "No Description"] pub mod gpiolockstatus; -#[doc = "ABUSALLOC (rw) register accessor: an alias for `Reg`"] -pub type ABUSALLOC = crate::Reg; +#[doc = "ABUSALLOC (rw) register accessor: A Bus allocation\n\nYou can [`read`](crate::Reg::read) this register and get [`abusalloc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`abusalloc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@abusalloc`] +module"] +#[doc(alias = "ABUSALLOC")] +pub type Abusalloc = crate::Reg; #[doc = "A Bus allocation"] pub mod abusalloc; -#[doc = "BBUSALLOC (rw) register accessor: an alias for `Reg`"] -pub type BBUSALLOC = crate::Reg; +#[doc = "BBUSALLOC (rw) register accessor: B Bus allocation\n\nYou can [`read`](crate::Reg::read) this register and get [`bbusalloc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bbusalloc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bbusalloc`] +module"] +#[doc(alias = "BBUSALLOC")] +pub type Bbusalloc = crate::Reg; #[doc = "B Bus allocation"] pub mod bbusalloc; -#[doc = "CDBUSALLOC (rw) register accessor: an alias for `Reg`"] -pub type CDBUSALLOC = crate::Reg; +#[doc = "CDBUSALLOC (rw) register accessor: CD Bus allocation\n\nYou can [`read`](crate::Reg::read) this register and get [`cdbusalloc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cdbusalloc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cdbusalloc`] +module"] +#[doc(alias = "CDBUSALLOC")] +pub type Cdbusalloc = crate::Reg; #[doc = "CD Bus allocation"] pub mod cdbusalloc; -#[doc = "EXTIPSELL (rw) register accessor: an alias for `Reg`"] -pub type EXTIPSELL = crate::Reg; +#[doc = "EXTIPSELL (rw) register accessor: External Interrupt Port Select Low\n\nYou can [`read`](crate::Reg::read) this register and get [`extipsell::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`extipsell::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@extipsell`] +module"] +#[doc(alias = "EXTIPSELL")] +pub type Extipsell = crate::Reg; #[doc = "External Interrupt Port Select Low"] pub mod extipsell; -#[doc = "EXTIPSELH (rw) register accessor: an alias for `Reg`"] -pub type EXTIPSELH = crate::Reg; +#[doc = "EXTIPSELH (rw) register accessor: External interrupt Port Select High\n\nYou can [`read`](crate::Reg::read) this register and get [`extipselh::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`extipselh::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@extipselh`] +module"] +#[doc(alias = "EXTIPSELH")] +pub type Extipselh = crate::Reg; #[doc = "External interrupt Port Select High"] pub mod extipselh; -#[doc = "EXTIPINSELL (rw) register accessor: an alias for `Reg`"] -pub type EXTIPINSELL = crate::Reg; +#[doc = "EXTIPINSELL (rw) register accessor: External Interrupt Pin Select Low\n\nYou can [`read`](crate::Reg::read) this register and get [`extipinsell::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`extipinsell::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@extipinsell`] +module"] +#[doc(alias = "EXTIPINSELL")] +pub type Extipinsell = crate::Reg; #[doc = "External Interrupt Pin Select Low"] pub mod extipinsell; -#[doc = "EXTIPINSELH (rw) register accessor: an alias for `Reg`"] -pub type EXTIPINSELH = crate::Reg; +#[doc = "EXTIPINSELH (rw) register accessor: External Interrupt Pin Select High\n\nYou can [`read`](crate::Reg::read) this register and get [`extipinselh::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`extipinselh::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@extipinselh`] +module"] +#[doc(alias = "EXTIPINSELH")] +pub type Extipinselh = crate::Reg; #[doc = "External Interrupt Pin Select High"] pub mod extipinselh; -#[doc = "EXTIRISE (rw) register accessor: an alias for `Reg`"] -pub type EXTIRISE = crate::Reg; +#[doc = "EXTIRISE (rw) register accessor: External Interrupt Rising Edge Trigger\n\nYou can [`read`](crate::Reg::read) this register and get [`extirise::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`extirise::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@extirise`] +module"] +#[doc(alias = "EXTIRISE")] +pub type Extirise = crate::Reg; #[doc = "External Interrupt Rising Edge Trigger"] pub mod extirise; -#[doc = "EXTIFALL (rw) register accessor: an alias for `Reg`"] -pub type EXTIFALL = crate::Reg; +#[doc = "EXTIFALL (rw) register accessor: External Interrupt Falling Edge Trigger\n\nYou can [`read`](crate::Reg::read) this register and get [`extifall::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`extifall::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@extifall`] +module"] +#[doc(alias = "EXTIFALL")] +pub type Extifall = crate::Reg; #[doc = "External Interrupt Falling Edge Trigger"] pub mod extifall; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (r) register accessor: Interrupt Flag\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "Interrupt Flag"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IF_SET (w) register accessor: Interrupt Flag Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_set::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_set`] +module"] +#[doc(alias = "IF_SET")] +pub type IfSet = crate::Reg; +#[doc = "Interrupt Flag Set"] +pub mod if_set; +#[doc = "IF_CLR (w) register accessor: Interrupt Flag Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_clr`] +module"] +#[doc(alias = "IF_CLR")] +pub type IfClr = crate::Reg; +#[doc = "Interrupt Flag Clear"] +pub mod if_clr; +#[doc = "IEN (rw) register accessor: Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "Interrupt Enable"] pub mod ien; -#[doc = "EM4WUEN (rw) register accessor: an alias for `Reg`"] -pub type EM4WUEN = crate::Reg; +#[doc = "EM4WUEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em4wuen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em4wuen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@em4wuen`] +module"] +#[doc(alias = "EM4WUEN")] +pub type Em4wuen = crate::Reg; #[doc = "No Description"] pub mod em4wuen; -#[doc = "EM4WUPOL (rw) register accessor: an alias for `Reg`"] -pub type EM4WUPOL = crate::Reg; +#[doc = "EM4WUPOL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em4wupol::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em4wupol::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@em4wupol`] +module"] +#[doc(alias = "EM4WUPOL")] +pub type Em4wupol = crate::Reg; #[doc = "No Description"] pub mod em4wupol; -#[doc = "DBGROUTEPEN (rw) register accessor: an alias for `Reg`"] -pub type DBGROUTEPEN = crate::Reg; +#[doc = "DBGROUTEPEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dbgroutepen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dbgroutepen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dbgroutepen`] +module"] +#[doc(alias = "DBGROUTEPEN")] +pub type Dbgroutepen = crate::Reg; #[doc = "No Description"] pub mod dbgroutepen; -#[doc = "TRACEROUTEPEN (rw) register accessor: an alias for `Reg`"] -pub type TRACEROUTEPEN = crate::Reg; +#[doc = "TRACEROUTEPEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`traceroutepen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`traceroutepen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@traceroutepen`] +module"] +#[doc(alias = "TRACEROUTEPEN")] +pub type Traceroutepen = crate::Reg; #[doc = "No Description"] pub mod traceroutepen; -#[doc = "LCDSEG (rw) register accessor: an alias for `Reg`"] -pub type LCDSEG = crate::Reg; +#[doc = "LCDSEG (rw) register accessor: LCD Segment Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`lcdseg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lcdseg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lcdseg`] +module"] +#[doc(alias = "LCDSEG")] +pub type Lcdseg = crate::Reg; #[doc = "LCD Segment Enable"] pub mod lcdseg; -#[doc = "LCDCOM (rw) register accessor: an alias for `Reg`"] -pub type LCDCOM = crate::Reg; +#[doc = "LCDCOM (rw) register accessor: LCD Common Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`lcdcom::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lcdcom::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lcdcom`] +module"] +#[doc(alias = "LCDCOM")] +pub type Lcdcom = crate::Reg; #[doc = "LCD Common Enable"] pub mod lcdcom; -#[doc = "ACMP0_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type ACMP0_ROUTEEN = crate::Reg; +#[doc = "ACMP0_ROUTEEN (rw) register accessor: ACMP0 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`acmp0_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`acmp0_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@acmp0_routeen`] +module"] +#[doc(alias = "ACMP0_ROUTEEN")] +pub type Acmp0Routeen = crate::Reg; #[doc = "ACMP0 pin enable"] pub mod acmp0_routeen; -#[doc = "ACMP0_ACMPOUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type ACMP0_ACMPOUTROUTE = crate::Reg; +#[doc = "ACMP0_ACMPOUTROUTE (rw) register accessor: ACMPOUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`acmp0_acmpoutroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`acmp0_acmpoutroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@acmp0_acmpoutroute`] +module"] +#[doc(alias = "ACMP0_ACMPOUTROUTE")] +pub type Acmp0Acmpoutroute = crate::Reg; #[doc = "ACMPOUT port/pin select"] pub mod acmp0_acmpoutroute; -#[doc = "ACMP1_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type ACMP1_ROUTEEN = crate::Reg; +#[doc = "ACMP1_ROUTEEN (rw) register accessor: ACMP1 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`acmp1_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`acmp1_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@acmp1_routeen`] +module"] +#[doc(alias = "ACMP1_ROUTEEN")] +pub type Acmp1Routeen = crate::Reg; #[doc = "ACMP1 pin enable"] pub mod acmp1_routeen; -#[doc = "ACMP1_ACMPOUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type ACMP1_ACMPOUTROUTE = crate::Reg; +#[doc = "ACMP1_ACMPOUTROUTE (rw) register accessor: ACMPOUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`acmp1_acmpoutroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`acmp1_acmpoutroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@acmp1_acmpoutroute`] +module"] +#[doc(alias = "ACMP1_ACMPOUTROUTE")] +pub type Acmp1Acmpoutroute = crate::Reg; #[doc = "ACMPOUT port/pin select"] pub mod acmp1_acmpoutroute; -#[doc = "CMU_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type CMU_ROUTEEN = crate::Reg; +#[doc = "CMU_ROUTEEN (rw) register accessor: CMU pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`cmu_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmu_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmu_routeen`] +module"] +#[doc(alias = "CMU_ROUTEEN")] +pub type CmuRouteen = crate::Reg; #[doc = "CMU pin enable"] pub mod cmu_routeen; -#[doc = "CMU_CLKIN0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type CMU_CLKIN0ROUTE = crate::Reg; +#[doc = "CMU_CLKIN0ROUTE (rw) register accessor: CLKIN0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`cmu_clkin0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmu_clkin0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmu_clkin0route`] +module"] +#[doc(alias = "CMU_CLKIN0ROUTE")] +pub type CmuClkin0route = crate::Reg; #[doc = "CLKIN0 port/pin select"] pub mod cmu_clkin0route; -#[doc = "CMU_CLKOUT0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type CMU_CLKOUT0ROUTE = crate::Reg; +#[doc = "CMU_CLKOUT0ROUTE (rw) register accessor: CLKOUT0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`cmu_clkout0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmu_clkout0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmu_clkout0route`] +module"] +#[doc(alias = "CMU_CLKOUT0ROUTE")] +pub type CmuClkout0route = crate::Reg; #[doc = "CLKOUT0 port/pin select"] pub mod cmu_clkout0route; -#[doc = "CMU_CLKOUT1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type CMU_CLKOUT1ROUTE = crate::Reg; +#[doc = "CMU_CLKOUT1ROUTE (rw) register accessor: CLKOUT1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`cmu_clkout1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmu_clkout1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmu_clkout1route`] +module"] +#[doc(alias = "CMU_CLKOUT1ROUTE")] +pub type CmuClkout1route = crate::Reg; #[doc = "CLKOUT1 port/pin select"] pub mod cmu_clkout1route; -#[doc = "CMU_CLKOUT2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type CMU_CLKOUT2ROUTE = crate::Reg; +#[doc = "CMU_CLKOUT2ROUTE (rw) register accessor: CLKOUT2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`cmu_clkout2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmu_clkout2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmu_clkout2route`] +module"] +#[doc(alias = "CMU_CLKOUT2ROUTE")] +pub type CmuClkout2route = crate::Reg; #[doc = "CLKOUT2 port/pin select"] pub mod cmu_clkout2route; -#[doc = "EUSART0_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type EUSART0_ROUTEEN = crate::Reg; +#[doc = "EUSART0_ROUTEEN (rw) register accessor: EUSART0 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart0_routeen`] +module"] +#[doc(alias = "EUSART0_ROUTEEN")] +pub type Eusart0Routeen = crate::Reg; #[doc = "EUSART0 pin enable"] pub mod eusart0_routeen; -#[doc = "EUSART0_CSROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART0_CSROUTE = crate::Reg; +#[doc = "EUSART0_CSROUTE (rw) register accessor: CS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_csroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_csroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart0_csroute`] +module"] +#[doc(alias = "EUSART0_CSROUTE")] +pub type Eusart0Csroute = crate::Reg; #[doc = "CS port/pin select"] pub mod eusart0_csroute; -#[doc = "EUSART0_CTSROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART0_CTSROUTE = crate::Reg; +#[doc = "EUSART0_CTSROUTE (rw) register accessor: CTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_ctsroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_ctsroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart0_ctsroute`] +module"] +#[doc(alias = "EUSART0_CTSROUTE")] +pub type Eusart0Ctsroute = crate::Reg; #[doc = "CTS port/pin select"] pub mod eusart0_ctsroute; -#[doc = "EUSART0_RTSROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART0_RTSROUTE = crate::Reg; +#[doc = "EUSART0_RTSROUTE (rw) register accessor: RTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_rtsroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_rtsroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart0_rtsroute`] +module"] +#[doc(alias = "EUSART0_RTSROUTE")] +pub type Eusart0Rtsroute = crate::Reg; #[doc = "RTS port/pin select"] pub mod eusart0_rtsroute; -#[doc = "EUSART0_RXROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART0_RXROUTE = crate::Reg; +#[doc = "EUSART0_RXROUTE (rw) register accessor: RX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_rxroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_rxroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart0_rxroute`] +module"] +#[doc(alias = "EUSART0_RXROUTE")] +pub type Eusart0Rxroute = crate::Reg; #[doc = "RX port/pin select"] pub mod eusart0_rxroute; -#[doc = "EUSART0_SCLKROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART0_SCLKROUTE = crate::Reg; +#[doc = "EUSART0_SCLKROUTE (rw) register accessor: SCLK port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_sclkroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_sclkroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart0_sclkroute`] +module"] +#[doc(alias = "EUSART0_SCLKROUTE")] +pub type Eusart0Sclkroute = crate::Reg; #[doc = "SCLK port/pin select"] pub mod eusart0_sclkroute; -#[doc = "EUSART0_TXROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART0_TXROUTE = crate::Reg; +#[doc = "EUSART0_TXROUTE (rw) register accessor: TX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_txroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_txroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart0_txroute`] +module"] +#[doc(alias = "EUSART0_TXROUTE")] +pub type Eusart0Txroute = crate::Reg; #[doc = "TX port/pin select"] pub mod eusart0_txroute; -#[doc = "EUSART1_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type EUSART1_ROUTEEN = crate::Reg; +#[doc = "EUSART1_ROUTEEN (rw) register accessor: EUSART1 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart1_routeen`] +module"] +#[doc(alias = "EUSART1_ROUTEEN")] +pub type Eusart1Routeen = crate::Reg; #[doc = "EUSART1 pin enable"] pub mod eusart1_routeen; -#[doc = "EUSART1_CSROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART1_CSROUTE = crate::Reg; +#[doc = "EUSART1_CSROUTE (rw) register accessor: CS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_csroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_csroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart1_csroute`] +module"] +#[doc(alias = "EUSART1_CSROUTE")] +pub type Eusart1Csroute = crate::Reg; #[doc = "CS port/pin select"] pub mod eusart1_csroute; -#[doc = "EUSART1_CTSROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART1_CTSROUTE = crate::Reg; +#[doc = "EUSART1_CTSROUTE (rw) register accessor: CTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_ctsroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_ctsroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart1_ctsroute`] +module"] +#[doc(alias = "EUSART1_CTSROUTE")] +pub type Eusart1Ctsroute = crate::Reg; #[doc = "CTS port/pin select"] pub mod eusart1_ctsroute; -#[doc = "EUSART1_RTSROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART1_RTSROUTE = crate::Reg; +#[doc = "EUSART1_RTSROUTE (rw) register accessor: RTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_rtsroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_rtsroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart1_rtsroute`] +module"] +#[doc(alias = "EUSART1_RTSROUTE")] +pub type Eusart1Rtsroute = crate::Reg; #[doc = "RTS port/pin select"] pub mod eusart1_rtsroute; -#[doc = "EUSART1_RXROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART1_RXROUTE = crate::Reg; +#[doc = "EUSART1_RXROUTE (rw) register accessor: RX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_rxroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_rxroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart1_rxroute`] +module"] +#[doc(alias = "EUSART1_RXROUTE")] +pub type Eusart1Rxroute = crate::Reg; #[doc = "RX port/pin select"] pub mod eusart1_rxroute; -#[doc = "EUSART1_SCLKROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART1_SCLKROUTE = crate::Reg; +#[doc = "EUSART1_SCLKROUTE (rw) register accessor: SCLK port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_sclkroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_sclkroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart1_sclkroute`] +module"] +#[doc(alias = "EUSART1_SCLKROUTE")] +pub type Eusart1Sclkroute = crate::Reg; #[doc = "SCLK port/pin select"] pub mod eusart1_sclkroute; -#[doc = "EUSART1_TXROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART1_TXROUTE = crate::Reg; +#[doc = "EUSART1_TXROUTE (rw) register accessor: TX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_txroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_txroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart1_txroute`] +module"] +#[doc(alias = "EUSART1_TXROUTE")] +pub type Eusart1Txroute = crate::Reg; #[doc = "TX port/pin select"] pub mod eusart1_txroute; -#[doc = "EUSART2_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type EUSART2_ROUTEEN = crate::Reg; +#[doc = "EUSART2_ROUTEEN (rw) register accessor: EUSART2 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart2_routeen`] +module"] +#[doc(alias = "EUSART2_ROUTEEN")] +pub type Eusart2Routeen = crate::Reg; #[doc = "EUSART2 pin enable"] pub mod eusart2_routeen; -#[doc = "EUSART2_CSROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART2_CSROUTE = crate::Reg; +#[doc = "EUSART2_CSROUTE (rw) register accessor: CS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_csroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_csroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart2_csroute`] +module"] +#[doc(alias = "EUSART2_CSROUTE")] +pub type Eusart2Csroute = crate::Reg; #[doc = "CS port/pin select"] pub mod eusart2_csroute; -#[doc = "EUSART2_CTSROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART2_CTSROUTE = crate::Reg; +#[doc = "EUSART2_CTSROUTE (rw) register accessor: CTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_ctsroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_ctsroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart2_ctsroute`] +module"] +#[doc(alias = "EUSART2_CTSROUTE")] +pub type Eusart2Ctsroute = crate::Reg; #[doc = "CTS port/pin select"] pub mod eusart2_ctsroute; -#[doc = "EUSART2_RTSROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART2_RTSROUTE = crate::Reg; +#[doc = "EUSART2_RTSROUTE (rw) register accessor: RTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_rtsroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_rtsroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart2_rtsroute`] +module"] +#[doc(alias = "EUSART2_RTSROUTE")] +pub type Eusart2Rtsroute = crate::Reg; #[doc = "RTS port/pin select"] pub mod eusart2_rtsroute; -#[doc = "EUSART2_RXROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART2_RXROUTE = crate::Reg; +#[doc = "EUSART2_RXROUTE (rw) register accessor: RX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_rxroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_rxroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart2_rxroute`] +module"] +#[doc(alias = "EUSART2_RXROUTE")] +pub type Eusart2Rxroute = crate::Reg; #[doc = "RX port/pin select"] pub mod eusart2_rxroute; -#[doc = "EUSART2_SCLKROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART2_SCLKROUTE = crate::Reg; +#[doc = "EUSART2_SCLKROUTE (rw) register accessor: SCLK port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_sclkroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_sclkroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart2_sclkroute`] +module"] +#[doc(alias = "EUSART2_SCLKROUTE")] +pub type Eusart2Sclkroute = crate::Reg; #[doc = "SCLK port/pin select"] pub mod eusart2_sclkroute; -#[doc = "EUSART2_TXROUTE (rw) register accessor: an alias for `Reg`"] -pub type EUSART2_TXROUTE = crate::Reg; +#[doc = "EUSART2_TXROUTE (rw) register accessor: TX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_txroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_txroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eusart2_txroute`] +module"] +#[doc(alias = "EUSART2_TXROUTE")] +pub type Eusart2Txroute = crate::Reg; #[doc = "TX port/pin select"] pub mod eusart2_txroute; -#[doc = "I2C0_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type I2C0_ROUTEEN = crate::Reg; +#[doc = "I2C0_ROUTEEN (rw) register accessor: I2C0 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c0_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c0_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2c0_routeen`] +module"] +#[doc(alias = "I2C0_ROUTEEN")] +pub type I2c0Routeen = crate::Reg; #[doc = "I2C0 pin enable"] pub mod i2c0_routeen; -#[doc = "I2C0_SCLROUTE (rw) register accessor: an alias for `Reg`"] -pub type I2C0_SCLROUTE = crate::Reg; +#[doc = "I2C0_SCLROUTE (rw) register accessor: SCL port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c0_sclroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c0_sclroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2c0_sclroute`] +module"] +#[doc(alias = "I2C0_SCLROUTE")] +pub type I2c0Sclroute = crate::Reg; #[doc = "SCL port/pin select"] pub mod i2c0_sclroute; -#[doc = "I2C0_SDAROUTE (rw) register accessor: an alias for `Reg`"] -pub type I2C0_SDAROUTE = crate::Reg; +#[doc = "I2C0_SDAROUTE (rw) register accessor: SDA port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c0_sdaroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c0_sdaroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2c0_sdaroute`] +module"] +#[doc(alias = "I2C0_SDAROUTE")] +pub type I2c0Sdaroute = crate::Reg; #[doc = "SDA port/pin select"] pub mod i2c0_sdaroute; -#[doc = "I2C1_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type I2C1_ROUTEEN = crate::Reg; +#[doc = "I2C1_ROUTEEN (rw) register accessor: I2C1 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c1_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c1_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2c1_routeen`] +module"] +#[doc(alias = "I2C1_ROUTEEN")] +pub type I2c1Routeen = crate::Reg; #[doc = "I2C1 pin enable"] pub mod i2c1_routeen; -#[doc = "I2C1_SCLROUTE (rw) register accessor: an alias for `Reg`"] -pub type I2C1_SCLROUTE = crate::Reg; +#[doc = "I2C1_SCLROUTE (rw) register accessor: SCL port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c1_sclroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c1_sclroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2c1_sclroute`] +module"] +#[doc(alias = "I2C1_SCLROUTE")] +pub type I2c1Sclroute = crate::Reg; #[doc = "SCL port/pin select"] pub mod i2c1_sclroute; -#[doc = "I2C1_SDAROUTE (rw) register accessor: an alias for `Reg`"] -pub type I2C1_SDAROUTE = crate::Reg; +#[doc = "I2C1_SDAROUTE (rw) register accessor: SDA port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c1_sdaroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c1_sdaroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2c1_sdaroute`] +module"] +#[doc(alias = "I2C1_SDAROUTE")] +pub type I2c1Sdaroute = crate::Reg; #[doc = "SDA port/pin select"] pub mod i2c1_sdaroute; -#[doc = "KEYSCAN_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_ROUTEEN = crate::Reg; +#[doc = "KEYSCAN_ROUTEEN (rw) register accessor: KEYSCAN pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_routeen`] +module"] +#[doc(alias = "KEYSCAN_ROUTEEN")] +pub type KeyscanRouteen = crate::Reg; #[doc = "KEYSCAN pin enable"] pub mod keyscan_routeen; -#[doc = "KEYSCAN_COLOUT0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_COLOUT0ROUTE = crate::Reg; +#[doc = "KEYSCAN_COLOUT0ROUTE (rw) register accessor: COLOUT0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_colout0route`] +module"] +#[doc(alias = "KEYSCAN_COLOUT0ROUTE")] +pub type KeyscanColout0route = crate::Reg; #[doc = "COLOUT0 port/pin select"] pub mod keyscan_colout0route; -#[doc = "KEYSCAN_COLOUT1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_COLOUT1ROUTE = crate::Reg; +#[doc = "KEYSCAN_COLOUT1ROUTE (rw) register accessor: COLOUT1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_colout1route`] +module"] +#[doc(alias = "KEYSCAN_COLOUT1ROUTE")] +pub type KeyscanColout1route = crate::Reg; #[doc = "COLOUT1 port/pin select"] pub mod keyscan_colout1route; -#[doc = "KEYSCAN_COLOUT2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_COLOUT2ROUTE = crate::Reg; +#[doc = "KEYSCAN_COLOUT2ROUTE (rw) register accessor: COLOUT2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_colout2route`] +module"] +#[doc(alias = "KEYSCAN_COLOUT2ROUTE")] +pub type KeyscanColout2route = crate::Reg; #[doc = "COLOUT2 port/pin select"] pub mod keyscan_colout2route; -#[doc = "KEYSCAN_COLOUT3ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_COLOUT3ROUTE = crate::Reg; +#[doc = "KEYSCAN_COLOUT3ROUTE (rw) register accessor: COLOUT3 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout3route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout3route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_colout3route`] +module"] +#[doc(alias = "KEYSCAN_COLOUT3ROUTE")] +pub type KeyscanColout3route = crate::Reg; #[doc = "COLOUT3 port/pin select"] pub mod keyscan_colout3route; -#[doc = "KEYSCAN_COLOUT4ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_COLOUT4ROUTE = crate::Reg; +#[doc = "KEYSCAN_COLOUT4ROUTE (rw) register accessor: COLOUT4 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout4route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout4route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_colout4route`] +module"] +#[doc(alias = "KEYSCAN_COLOUT4ROUTE")] +pub type KeyscanColout4route = crate::Reg; #[doc = "COLOUT4 port/pin select"] pub mod keyscan_colout4route; -#[doc = "KEYSCAN_COLOUT5ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_COLOUT5ROUTE = crate::Reg; +#[doc = "KEYSCAN_COLOUT5ROUTE (rw) register accessor: COLOUT5 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout5route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout5route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_colout5route`] +module"] +#[doc(alias = "KEYSCAN_COLOUT5ROUTE")] +pub type KeyscanColout5route = crate::Reg; #[doc = "COLOUT5 port/pin select"] pub mod keyscan_colout5route; -#[doc = "KEYSCAN_COLOUT6ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_COLOUT6ROUTE = crate::Reg; +#[doc = "KEYSCAN_COLOUT6ROUTE (rw) register accessor: COLOUT6 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout6route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout6route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_colout6route`] +module"] +#[doc(alias = "KEYSCAN_COLOUT6ROUTE")] +pub type KeyscanColout6route = crate::Reg; #[doc = "COLOUT6 port/pin select"] pub mod keyscan_colout6route; -#[doc = "KEYSCAN_COLOUT7ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_COLOUT7ROUTE = crate::Reg; +#[doc = "KEYSCAN_COLOUT7ROUTE (rw) register accessor: COLOUT7 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout7route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout7route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_colout7route`] +module"] +#[doc(alias = "KEYSCAN_COLOUT7ROUTE")] +pub type KeyscanColout7route = crate::Reg; #[doc = "COLOUT7 port/pin select"] pub mod keyscan_colout7route; -#[doc = "KEYSCAN_ROWSENSE0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_ROWSENSE0ROUTE = crate::Reg; +#[doc = "KEYSCAN_ROWSENSE0ROUTE (rw) register accessor: ROWSENSE0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_rowsense0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_rowsense0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_rowsense0route`] +module"] +#[doc(alias = "KEYSCAN_ROWSENSE0ROUTE")] +pub type KeyscanRowsense0route = crate::Reg; #[doc = "ROWSENSE0 port/pin select"] pub mod keyscan_rowsense0route; -#[doc = "KEYSCAN_ROWSENSE1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_ROWSENSE1ROUTE = crate::Reg; +#[doc = "KEYSCAN_ROWSENSE1ROUTE (rw) register accessor: ROWSENSE1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_rowsense1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_rowsense1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_rowsense1route`] +module"] +#[doc(alias = "KEYSCAN_ROWSENSE1ROUTE")] +pub type KeyscanRowsense1route = crate::Reg; #[doc = "ROWSENSE1 port/pin select"] pub mod keyscan_rowsense1route; -#[doc = "KEYSCAN_ROWSENSE2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_ROWSENSE2ROUTE = crate::Reg; +#[doc = "KEYSCAN_ROWSENSE2ROUTE (rw) register accessor: ROWSENSE2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_rowsense2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_rowsense2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_rowsense2route`] +module"] +#[doc(alias = "KEYSCAN_ROWSENSE2ROUTE")] +pub type KeyscanRowsense2route = crate::Reg; #[doc = "ROWSENSE2 port/pin select"] pub mod keyscan_rowsense2route; -#[doc = "KEYSCAN_ROWSENSE3ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_ROWSENSE3ROUTE = crate::Reg; +#[doc = "KEYSCAN_ROWSENSE3ROUTE (rw) register accessor: ROWSENSE3 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_rowsense3route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_rowsense3route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_rowsense3route`] +module"] +#[doc(alias = "KEYSCAN_ROWSENSE3ROUTE")] +pub type KeyscanRowsense3route = crate::Reg; #[doc = "ROWSENSE3 port/pin select"] pub mod keyscan_rowsense3route; -#[doc = "KEYSCAN_ROWSENSE4ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_ROWSENSE4ROUTE = crate::Reg; +#[doc = "KEYSCAN_ROWSENSE4ROUTE (rw) register accessor: ROWSENSE4 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_rowsense4route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_rowsense4route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_rowsense4route`] +module"] +#[doc(alias = "KEYSCAN_ROWSENSE4ROUTE")] +pub type KeyscanRowsense4route = crate::Reg; #[doc = "ROWSENSE4 port/pin select"] pub mod keyscan_rowsense4route; -#[doc = "KEYSCAN_ROWSENSE5ROUTE (rw) register accessor: an alias for `Reg`"] -pub type KEYSCAN_ROWSENSE5ROUTE = crate::Reg; +#[doc = "KEYSCAN_ROWSENSE5ROUTE (rw) register accessor: ROWSENSE5 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_rowsense5route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_rowsense5route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@keyscan_rowsense5route`] +module"] +#[doc(alias = "KEYSCAN_ROWSENSE5ROUTE")] +pub type KeyscanRowsense5route = crate::Reg; #[doc = "ROWSENSE5 port/pin select"] pub mod keyscan_rowsense5route; -#[doc = "LESENSE_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_ROUTEEN = crate::Reg; +#[doc = "LESENSE_ROUTEEN (rw) register accessor: LESENSE pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_routeen`] +module"] +#[doc(alias = "LESENSE_ROUTEEN")] +pub type LesenseRouteen = crate::Reg; #[doc = "LESENSE pin enable"] pub mod lesense_routeen; -#[doc = "LESENSE_CH0OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH0OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH0OUTROUTE (rw) register accessor: CH0OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch0outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch0outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch0outroute`] +module"] +#[doc(alias = "LESENSE_CH0OUTROUTE")] +pub type LesenseCh0outroute = crate::Reg; #[doc = "CH0OUT port/pin select"] pub mod lesense_ch0outroute; -#[doc = "LESENSE_CH1OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH1OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH1OUTROUTE (rw) register accessor: CH1OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch1outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch1outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch1outroute`] +module"] +#[doc(alias = "LESENSE_CH1OUTROUTE")] +pub type LesenseCh1outroute = crate::Reg; #[doc = "CH1OUT port/pin select"] pub mod lesense_ch1outroute; -#[doc = "LESENSE_CH2OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH2OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH2OUTROUTE (rw) register accessor: CH2OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch2outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch2outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch2outroute`] +module"] +#[doc(alias = "LESENSE_CH2OUTROUTE")] +pub type LesenseCh2outroute = crate::Reg; #[doc = "CH2OUT port/pin select"] pub mod lesense_ch2outroute; -#[doc = "LESENSE_CH3OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH3OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH3OUTROUTE (rw) register accessor: CH3OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch3outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch3outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch3outroute`] +module"] +#[doc(alias = "LESENSE_CH3OUTROUTE")] +pub type LesenseCh3outroute = crate::Reg; #[doc = "CH3OUT port/pin select"] pub mod lesense_ch3outroute; -#[doc = "LESENSE_CH4OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH4OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH4OUTROUTE (rw) register accessor: CH4OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch4outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch4outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch4outroute`] +module"] +#[doc(alias = "LESENSE_CH4OUTROUTE")] +pub type LesenseCh4outroute = crate::Reg; #[doc = "CH4OUT port/pin select"] pub mod lesense_ch4outroute; -#[doc = "LESENSE_CH5OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH5OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH5OUTROUTE (rw) register accessor: CH5OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch5outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch5outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch5outroute`] +module"] +#[doc(alias = "LESENSE_CH5OUTROUTE")] +pub type LesenseCh5outroute = crate::Reg; #[doc = "CH5OUT port/pin select"] pub mod lesense_ch5outroute; -#[doc = "LESENSE_CH6OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH6OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH6OUTROUTE (rw) register accessor: CH6OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch6outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch6outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch6outroute`] +module"] +#[doc(alias = "LESENSE_CH6OUTROUTE")] +pub type LesenseCh6outroute = crate::Reg; #[doc = "CH6OUT port/pin select"] pub mod lesense_ch6outroute; -#[doc = "LESENSE_CH7OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH7OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH7OUTROUTE (rw) register accessor: CH7OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch7outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch7outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch7outroute`] +module"] +#[doc(alias = "LESENSE_CH7OUTROUTE")] +pub type LesenseCh7outroute = crate::Reg; #[doc = "CH7OUT port/pin select"] pub mod lesense_ch7outroute; -#[doc = "LESENSE_CH8OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH8OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH8OUTROUTE (rw) register accessor: CH8OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch8outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch8outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch8outroute`] +module"] +#[doc(alias = "LESENSE_CH8OUTROUTE")] +pub type LesenseCh8outroute = crate::Reg; #[doc = "CH8OUT port/pin select"] pub mod lesense_ch8outroute; -#[doc = "LESENSE_CH9OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH9OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH9OUTROUTE (rw) register accessor: CH9OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch9outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch9outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch9outroute`] +module"] +#[doc(alias = "LESENSE_CH9OUTROUTE")] +pub type LesenseCh9outroute = crate::Reg; #[doc = "CH9OUT port/pin select"] pub mod lesense_ch9outroute; -#[doc = "LESENSE_CH10OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH10OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH10OUTROUTE (rw) register accessor: CH10OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch10outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch10outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch10outroute`] +module"] +#[doc(alias = "LESENSE_CH10OUTROUTE")] +pub type LesenseCh10outroute = crate::Reg; #[doc = "CH10OUT port/pin select"] pub mod lesense_ch10outroute; -#[doc = "LESENSE_CH11OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH11OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH11OUTROUTE (rw) register accessor: CH11OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch11outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch11outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch11outroute`] +module"] +#[doc(alias = "LESENSE_CH11OUTROUTE")] +pub type LesenseCh11outroute = crate::Reg; #[doc = "CH11OUT port/pin select"] pub mod lesense_ch11outroute; -#[doc = "LESENSE_CH12OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH12OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH12OUTROUTE (rw) register accessor: CH12OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch12outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch12outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch12outroute`] +module"] +#[doc(alias = "LESENSE_CH12OUTROUTE")] +pub type LesenseCh12outroute = crate::Reg; #[doc = "CH12OUT port/pin select"] pub mod lesense_ch12outroute; -#[doc = "LESENSE_CH13OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH13OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH13OUTROUTE (rw) register accessor: CH13OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch13outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch13outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch13outroute`] +module"] +#[doc(alias = "LESENSE_CH13OUTROUTE")] +pub type LesenseCh13outroute = crate::Reg; #[doc = "CH13OUT port/pin select"] pub mod lesense_ch13outroute; -#[doc = "LESENSE_CH14OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH14OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH14OUTROUTE (rw) register accessor: CH14OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch14outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch14outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch14outroute`] +module"] +#[doc(alias = "LESENSE_CH14OUTROUTE")] +pub type LesenseCh14outroute = crate::Reg; #[doc = "CH14OUT port/pin select"] pub mod lesense_ch14outroute; -#[doc = "LESENSE_CH15OUTROUTE (rw) register accessor: an alias for `Reg`"] -pub type LESENSE_CH15OUTROUTE = crate::Reg; +#[doc = "LESENSE_CH15OUTROUTE (rw) register accessor: CH15OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch15outroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch15outroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lesense_ch15outroute`] +module"] +#[doc(alias = "LESENSE_CH15OUTROUTE")] +pub type LesenseCh15outroute = crate::Reg; #[doc = "CH15OUT port/pin select"] pub mod lesense_ch15outroute; -#[doc = "LETIMER_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type LETIMER_ROUTEEN = crate::Reg; +#[doc = "LETIMER_ROUTEEN (rw) register accessor: LETIMER pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`letimer_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`letimer_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@letimer_routeen`] +module"] +#[doc(alias = "LETIMER_ROUTEEN")] +pub type LetimerRouteen = crate::Reg; #[doc = "LETIMER pin enable"] pub mod letimer_routeen; -#[doc = "LETIMER_OUT0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type LETIMER_OUT0ROUTE = crate::Reg; +#[doc = "LETIMER_OUT0ROUTE (rw) register accessor: OUT0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`letimer_out0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`letimer_out0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@letimer_out0route`] +module"] +#[doc(alias = "LETIMER_OUT0ROUTE")] +pub type LetimerOut0route = crate::Reg; #[doc = "OUT0 port/pin select"] pub mod letimer_out0route; -#[doc = "LETIMER_OUT1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type LETIMER_OUT1ROUTE = crate::Reg; +#[doc = "LETIMER_OUT1ROUTE (rw) register accessor: OUT1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`letimer_out1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`letimer_out1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@letimer_out1route`] +module"] +#[doc(alias = "LETIMER_OUT1ROUTE")] +pub type LetimerOut1route = crate::Reg; #[doc = "OUT1 port/pin select"] pub mod letimer_out1route; -#[doc = "PCNT0_S0INROUTE (rw) register accessor: an alias for `Reg`"] -pub type PCNT0_S0INROUTE = crate::Reg; +#[doc = "PCNT0_S0INROUTE (rw) register accessor: S0IN port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`pcnt0_s0inroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcnt0_s0inroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcnt0_s0inroute`] +module"] +#[doc(alias = "PCNT0_S0INROUTE")] +pub type Pcnt0S0inroute = crate::Reg; #[doc = "S0IN port/pin select"] pub mod pcnt0_s0inroute; -#[doc = "PCNT0_S1INROUTE (rw) register accessor: an alias for `Reg`"] -pub type PCNT0_S1INROUTE = crate::Reg; +#[doc = "PCNT0_S1INROUTE (rw) register accessor: S1IN port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`pcnt0_s1inroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcnt0_s1inroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcnt0_s1inroute`] +module"] +#[doc(alias = "PCNT0_S1INROUTE")] +pub type Pcnt0S1inroute = crate::Reg; #[doc = "S1IN port/pin select"] pub mod pcnt0_s1inroute; -#[doc = "PRS0_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type PRS0_ROUTEEN = crate::Reg; +#[doc = "PRS0_ROUTEEN (rw) register accessor: PRS0 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_routeen`] +module"] +#[doc(alias = "PRS0_ROUTEEN")] +pub type Prs0Routeen = crate::Reg; #[doc = "PRS0 pin enable"] pub mod prs0_routeen; -#[doc = "PRS0_ASYNCH0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_ASYNCH0ROUTE = crate::Reg; +#[doc = "PRS0_ASYNCH0ROUTE (rw) register accessor: ASYNCH0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_asynch0route`] +module"] +#[doc(alias = "PRS0_ASYNCH0ROUTE")] +pub type Prs0Asynch0route = crate::Reg; #[doc = "ASYNCH0 port/pin select"] pub mod prs0_asynch0route; -#[doc = "PRS0_ASYNCH1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_ASYNCH1ROUTE = crate::Reg; +#[doc = "PRS0_ASYNCH1ROUTE (rw) register accessor: ASYNCH1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_asynch1route`] +module"] +#[doc(alias = "PRS0_ASYNCH1ROUTE")] +pub type Prs0Asynch1route = crate::Reg; #[doc = "ASYNCH1 port/pin select"] pub mod prs0_asynch1route; -#[doc = "PRS0_ASYNCH2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_ASYNCH2ROUTE = crate::Reg; +#[doc = "PRS0_ASYNCH2ROUTE (rw) register accessor: ASYNCH2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_asynch2route`] +module"] +#[doc(alias = "PRS0_ASYNCH2ROUTE")] +pub type Prs0Asynch2route = crate::Reg; #[doc = "ASYNCH2 port/pin select"] pub mod prs0_asynch2route; -#[doc = "PRS0_ASYNCH3ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_ASYNCH3ROUTE = crate::Reg; +#[doc = "PRS0_ASYNCH3ROUTE (rw) register accessor: ASYNCH3 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch3route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch3route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_asynch3route`] +module"] +#[doc(alias = "PRS0_ASYNCH3ROUTE")] +pub type Prs0Asynch3route = crate::Reg; #[doc = "ASYNCH3 port/pin select"] pub mod prs0_asynch3route; -#[doc = "PRS0_ASYNCH4ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_ASYNCH4ROUTE = crate::Reg; +#[doc = "PRS0_ASYNCH4ROUTE (rw) register accessor: ASYNCH4 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch4route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch4route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_asynch4route`] +module"] +#[doc(alias = "PRS0_ASYNCH4ROUTE")] +pub type Prs0Asynch4route = crate::Reg; #[doc = "ASYNCH4 port/pin select"] pub mod prs0_asynch4route; -#[doc = "PRS0_ASYNCH5ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_ASYNCH5ROUTE = crate::Reg; +#[doc = "PRS0_ASYNCH5ROUTE (rw) register accessor: ASYNCH5 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch5route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch5route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_asynch5route`] +module"] +#[doc(alias = "PRS0_ASYNCH5ROUTE")] +pub type Prs0Asynch5route = crate::Reg; #[doc = "ASYNCH5 port/pin select"] pub mod prs0_asynch5route; -#[doc = "PRS0_ASYNCH6ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_ASYNCH6ROUTE = crate::Reg; +#[doc = "PRS0_ASYNCH6ROUTE (rw) register accessor: ASYNCH6 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch6route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch6route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_asynch6route`] +module"] +#[doc(alias = "PRS0_ASYNCH6ROUTE")] +pub type Prs0Asynch6route = crate::Reg; #[doc = "ASYNCH6 port/pin select"] pub mod prs0_asynch6route; -#[doc = "PRS0_ASYNCH7ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_ASYNCH7ROUTE = crate::Reg; +#[doc = "PRS0_ASYNCH7ROUTE (rw) register accessor: ASYNCH7 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch7route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch7route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_asynch7route`] +module"] +#[doc(alias = "PRS0_ASYNCH7ROUTE")] +pub type Prs0Asynch7route = crate::Reg; #[doc = "ASYNCH7 port/pin select"] pub mod prs0_asynch7route; -#[doc = "PRS0_ASYNCH8ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_ASYNCH8ROUTE = crate::Reg; +#[doc = "PRS0_ASYNCH8ROUTE (rw) register accessor: ASYNCH8 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch8route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch8route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_asynch8route`] +module"] +#[doc(alias = "PRS0_ASYNCH8ROUTE")] +pub type Prs0Asynch8route = crate::Reg; #[doc = "ASYNCH8 port/pin select"] pub mod prs0_asynch8route; -#[doc = "PRS0_ASYNCH9ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_ASYNCH9ROUTE = crate::Reg; +#[doc = "PRS0_ASYNCH9ROUTE (rw) register accessor: ASYNCH9 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch9route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch9route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_asynch9route`] +module"] +#[doc(alias = "PRS0_ASYNCH9ROUTE")] +pub type Prs0Asynch9route = crate::Reg; #[doc = "ASYNCH9 port/pin select"] pub mod prs0_asynch9route; -#[doc = "PRS0_ASYNCH10ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_ASYNCH10ROUTE = crate::Reg; +#[doc = "PRS0_ASYNCH10ROUTE (rw) register accessor: ASYNCH10 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch10route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch10route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_asynch10route`] +module"] +#[doc(alias = "PRS0_ASYNCH10ROUTE")] +pub type Prs0Asynch10route = crate::Reg; #[doc = "ASYNCH10 port/pin select"] pub mod prs0_asynch10route; -#[doc = "PRS0_ASYNCH11ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_ASYNCH11ROUTE = crate::Reg; +#[doc = "PRS0_ASYNCH11ROUTE (rw) register accessor: ASYNCH11 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch11route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch11route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_asynch11route`] +module"] +#[doc(alias = "PRS0_ASYNCH11ROUTE")] +pub type Prs0Asynch11route = crate::Reg; #[doc = "ASYNCH11 port/pin select"] pub mod prs0_asynch11route; -#[doc = "PRS0_SYNCH0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_SYNCH0ROUTE = crate::Reg; +#[doc = "PRS0_SYNCH0ROUTE (rw) register accessor: SYNCH0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_synch0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_synch0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_synch0route`] +module"] +#[doc(alias = "PRS0_SYNCH0ROUTE")] +pub type Prs0Synch0route = crate::Reg; #[doc = "SYNCH0 port/pin select"] pub mod prs0_synch0route; -#[doc = "PRS0_SYNCH1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_SYNCH1ROUTE = crate::Reg; +#[doc = "PRS0_SYNCH1ROUTE (rw) register accessor: SYNCH1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_synch1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_synch1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_synch1route`] +module"] +#[doc(alias = "PRS0_SYNCH1ROUTE")] +pub type Prs0Synch1route = crate::Reg; #[doc = "SYNCH1 port/pin select"] pub mod prs0_synch1route; -#[doc = "PRS0_SYNCH2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_SYNCH2ROUTE = crate::Reg; +#[doc = "PRS0_SYNCH2ROUTE (rw) register accessor: SYNCH2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_synch2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_synch2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_synch2route`] +module"] +#[doc(alias = "PRS0_SYNCH2ROUTE")] +pub type Prs0Synch2route = crate::Reg; #[doc = "SYNCH2 port/pin select"] pub mod prs0_synch2route; -#[doc = "PRS0_SYNCH3ROUTE (rw) register accessor: an alias for `Reg`"] -pub type PRS0_SYNCH3ROUTE = crate::Reg; +#[doc = "PRS0_SYNCH3ROUTE (rw) register accessor: SYNCH3 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_synch3route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_synch3route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs0_synch3route`] +module"] +#[doc(alias = "PRS0_SYNCH3ROUTE")] +pub type Prs0Synch3route = crate::Reg; #[doc = "SYNCH3 port/pin select"] pub mod prs0_synch3route; -#[doc = "SYXO0_BUFOUTREQINASYNCROUTE (rw) register accessor: an alias for `Reg`"] -pub type SYXO0_BUFOUTREQINASYNCROUTE = - crate::Reg; +#[doc = "SYXO0_BUFOUTREQINASYNCROUTE (rw) register accessor: BUFOUTREQINASYNC port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`syxo0_bufoutreqinasyncroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`syxo0_bufoutreqinasyncroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syxo0_bufoutreqinasyncroute`] +module"] +#[doc(alias = "SYXO0_BUFOUTREQINASYNCROUTE")] +pub type Syxo0Bufoutreqinasyncroute = + crate::Reg; #[doc = "BUFOUTREQINASYNC port/pin select"] pub mod syxo0_bufoutreqinasyncroute; -#[doc = "TIMER0_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type TIMER0_ROUTEEN = crate::Reg; +#[doc = "TIMER0_ROUTEEN (rw) register accessor: TIMER0 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer0_routeen`] +module"] +#[doc(alias = "TIMER0_ROUTEEN")] +pub type Timer0Routeen = crate::Reg; #[doc = "TIMER0 pin enable"] pub mod timer0_routeen; -#[doc = "TIMER0_CC0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER0_CC0ROUTE = crate::Reg; +#[doc = "TIMER0_CC0ROUTE (rw) register accessor: CC0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_cc0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_cc0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer0_cc0route`] +module"] +#[doc(alias = "TIMER0_CC0ROUTE")] +pub type Timer0Cc0route = crate::Reg; #[doc = "CC0 port/pin select"] pub mod timer0_cc0route; -#[doc = "TIMER0_CC1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER0_CC1ROUTE = crate::Reg; +#[doc = "TIMER0_CC1ROUTE (rw) register accessor: CC1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_cc1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_cc1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer0_cc1route`] +module"] +#[doc(alias = "TIMER0_CC1ROUTE")] +pub type Timer0Cc1route = crate::Reg; #[doc = "CC1 port/pin select"] pub mod timer0_cc1route; -#[doc = "TIMER0_CC2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER0_CC2ROUTE = crate::Reg; +#[doc = "TIMER0_CC2ROUTE (rw) register accessor: CC2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_cc2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_cc2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer0_cc2route`] +module"] +#[doc(alias = "TIMER0_CC2ROUTE")] +pub type Timer0Cc2route = crate::Reg; #[doc = "CC2 port/pin select"] pub mod timer0_cc2route; -#[doc = "TIMER0_CDTI0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER0_CDTI0ROUTE = crate::Reg; +#[doc = "TIMER0_CDTI0ROUTE (rw) register accessor: CDTI0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_cdti0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_cdti0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer0_cdti0route`] +module"] +#[doc(alias = "TIMER0_CDTI0ROUTE")] +pub type Timer0Cdti0route = crate::Reg; #[doc = "CDTI0 port/pin select"] pub mod timer0_cdti0route; -#[doc = "TIMER0_CDTI1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER0_CDTI1ROUTE = crate::Reg; +#[doc = "TIMER0_CDTI1ROUTE (rw) register accessor: CDTI1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_cdti1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_cdti1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer0_cdti1route`] +module"] +#[doc(alias = "TIMER0_CDTI1ROUTE")] +pub type Timer0Cdti1route = crate::Reg; #[doc = "CDTI1 port/pin select"] pub mod timer0_cdti1route; -#[doc = "TIMER0_CDTI2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER0_CDTI2ROUTE = crate::Reg; +#[doc = "TIMER0_CDTI2ROUTE (rw) register accessor: CDTI2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_cdti2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_cdti2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer0_cdti2route`] +module"] +#[doc(alias = "TIMER0_CDTI2ROUTE")] +pub type Timer0Cdti2route = crate::Reg; #[doc = "CDTI2 port/pin select"] pub mod timer0_cdti2route; -#[doc = "TIMER1_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type TIMER1_ROUTEEN = crate::Reg; +#[doc = "TIMER1_ROUTEEN (rw) register accessor: TIMER1 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer1_routeen`] +module"] +#[doc(alias = "TIMER1_ROUTEEN")] +pub type Timer1Routeen = crate::Reg; #[doc = "TIMER1 pin enable"] pub mod timer1_routeen; -#[doc = "TIMER1_CC0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER1_CC0ROUTE = crate::Reg; +#[doc = "TIMER1_CC0ROUTE (rw) register accessor: CC0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_cc0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_cc0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer1_cc0route`] +module"] +#[doc(alias = "TIMER1_CC0ROUTE")] +pub type Timer1Cc0route = crate::Reg; #[doc = "CC0 port/pin select"] pub mod timer1_cc0route; -#[doc = "TIMER1_CC1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER1_CC1ROUTE = crate::Reg; +#[doc = "TIMER1_CC1ROUTE (rw) register accessor: CC1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_cc1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_cc1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer1_cc1route`] +module"] +#[doc(alias = "TIMER1_CC1ROUTE")] +pub type Timer1Cc1route = crate::Reg; #[doc = "CC1 port/pin select"] pub mod timer1_cc1route; -#[doc = "TIMER1_CC2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER1_CC2ROUTE = crate::Reg; +#[doc = "TIMER1_CC2ROUTE (rw) register accessor: CC2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_cc2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_cc2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer1_cc2route`] +module"] +#[doc(alias = "TIMER1_CC2ROUTE")] +pub type Timer1Cc2route = crate::Reg; #[doc = "CC2 port/pin select"] pub mod timer1_cc2route; -#[doc = "TIMER1_CDTI0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER1_CDTI0ROUTE = crate::Reg; +#[doc = "TIMER1_CDTI0ROUTE (rw) register accessor: CDTI0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_cdti0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_cdti0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer1_cdti0route`] +module"] +#[doc(alias = "TIMER1_CDTI0ROUTE")] +pub type Timer1Cdti0route = crate::Reg; #[doc = "CDTI0 port/pin select"] pub mod timer1_cdti0route; -#[doc = "TIMER1_CDTI1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER1_CDTI1ROUTE = crate::Reg; +#[doc = "TIMER1_CDTI1ROUTE (rw) register accessor: CDTI1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_cdti1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_cdti1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer1_cdti1route`] +module"] +#[doc(alias = "TIMER1_CDTI1ROUTE")] +pub type Timer1Cdti1route = crate::Reg; #[doc = "CDTI1 port/pin select"] pub mod timer1_cdti1route; -#[doc = "TIMER1_CDTI2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER1_CDTI2ROUTE = crate::Reg; +#[doc = "TIMER1_CDTI2ROUTE (rw) register accessor: CDTI2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_cdti2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_cdti2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer1_cdti2route`] +module"] +#[doc(alias = "TIMER1_CDTI2ROUTE")] +pub type Timer1Cdti2route = crate::Reg; #[doc = "CDTI2 port/pin select"] pub mod timer1_cdti2route; -#[doc = "TIMER2_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type TIMER2_ROUTEEN = crate::Reg; +#[doc = "TIMER2_ROUTEEN (rw) register accessor: TIMER2 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer2_routeen`] +module"] +#[doc(alias = "TIMER2_ROUTEEN")] +pub type Timer2Routeen = crate::Reg; #[doc = "TIMER2 pin enable"] pub mod timer2_routeen; -#[doc = "TIMER2_CC0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER2_CC0ROUTE = crate::Reg; +#[doc = "TIMER2_CC0ROUTE (rw) register accessor: CC0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_cc0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_cc0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer2_cc0route`] +module"] +#[doc(alias = "TIMER2_CC0ROUTE")] +pub type Timer2Cc0route = crate::Reg; #[doc = "CC0 port/pin select"] pub mod timer2_cc0route; -#[doc = "TIMER2_CC1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER2_CC1ROUTE = crate::Reg; +#[doc = "TIMER2_CC1ROUTE (rw) register accessor: CC1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_cc1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_cc1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer2_cc1route`] +module"] +#[doc(alias = "TIMER2_CC1ROUTE")] +pub type Timer2Cc1route = crate::Reg; #[doc = "CC1 port/pin select"] pub mod timer2_cc1route; -#[doc = "TIMER2_CC2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER2_CC2ROUTE = crate::Reg; +#[doc = "TIMER2_CC2ROUTE (rw) register accessor: CC2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_cc2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_cc2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer2_cc2route`] +module"] +#[doc(alias = "TIMER2_CC2ROUTE")] +pub type Timer2Cc2route = crate::Reg; #[doc = "CC2 port/pin select"] pub mod timer2_cc2route; -#[doc = "TIMER2_CDTI0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER2_CDTI0ROUTE = crate::Reg; +#[doc = "TIMER2_CDTI0ROUTE (rw) register accessor: CDTI0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_cdti0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_cdti0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer2_cdti0route`] +module"] +#[doc(alias = "TIMER2_CDTI0ROUTE")] +pub type Timer2Cdti0route = crate::Reg; #[doc = "CDTI0 port/pin select"] pub mod timer2_cdti0route; -#[doc = "TIMER2_CDTI1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER2_CDTI1ROUTE = crate::Reg; +#[doc = "TIMER2_CDTI1ROUTE (rw) register accessor: CDTI1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_cdti1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_cdti1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer2_cdti1route`] +module"] +#[doc(alias = "TIMER2_CDTI1ROUTE")] +pub type Timer2Cdti1route = crate::Reg; #[doc = "CDTI1 port/pin select"] pub mod timer2_cdti1route; -#[doc = "TIMER2_CDTI2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER2_CDTI2ROUTE = crate::Reg; +#[doc = "TIMER2_CDTI2ROUTE (rw) register accessor: CDTI2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_cdti2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_cdti2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer2_cdti2route`] +module"] +#[doc(alias = "TIMER2_CDTI2ROUTE")] +pub type Timer2Cdti2route = crate::Reg; #[doc = "CDTI2 port/pin select"] pub mod timer2_cdti2route; -#[doc = "TIMER3_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type TIMER3_ROUTEEN = crate::Reg; +#[doc = "TIMER3_ROUTEEN (rw) register accessor: TIMER3 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer3_routeen`] +module"] +#[doc(alias = "TIMER3_ROUTEEN")] +pub type Timer3Routeen = crate::Reg; #[doc = "TIMER3 pin enable"] pub mod timer3_routeen; -#[doc = "TIMER3_CC0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER3_CC0ROUTE = crate::Reg; +#[doc = "TIMER3_CC0ROUTE (rw) register accessor: CC0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_cc0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_cc0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer3_cc0route`] +module"] +#[doc(alias = "TIMER3_CC0ROUTE")] +pub type Timer3Cc0route = crate::Reg; #[doc = "CC0 port/pin select"] pub mod timer3_cc0route; -#[doc = "TIMER3_CC1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER3_CC1ROUTE = crate::Reg; +#[doc = "TIMER3_CC1ROUTE (rw) register accessor: CC1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_cc1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_cc1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer3_cc1route`] +module"] +#[doc(alias = "TIMER3_CC1ROUTE")] +pub type Timer3Cc1route = crate::Reg; #[doc = "CC1 port/pin select"] pub mod timer3_cc1route; -#[doc = "TIMER3_CC2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER3_CC2ROUTE = crate::Reg; +#[doc = "TIMER3_CC2ROUTE (rw) register accessor: CC2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_cc2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_cc2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer3_cc2route`] +module"] +#[doc(alias = "TIMER3_CC2ROUTE")] +pub type Timer3Cc2route = crate::Reg; #[doc = "CC2 port/pin select"] pub mod timer3_cc2route; -#[doc = "TIMER3_CDTI0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER3_CDTI0ROUTE = crate::Reg; +#[doc = "TIMER3_CDTI0ROUTE (rw) register accessor: CDTI0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_cdti0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_cdti0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer3_cdti0route`] +module"] +#[doc(alias = "TIMER3_CDTI0ROUTE")] +pub type Timer3Cdti0route = crate::Reg; #[doc = "CDTI0 port/pin select"] pub mod timer3_cdti0route; -#[doc = "TIMER3_CDTI1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER3_CDTI1ROUTE = crate::Reg; +#[doc = "TIMER3_CDTI1ROUTE (rw) register accessor: CDTI1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_cdti1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_cdti1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer3_cdti1route`] +module"] +#[doc(alias = "TIMER3_CDTI1ROUTE")] +pub type Timer3Cdti1route = crate::Reg; #[doc = "CDTI1 port/pin select"] pub mod timer3_cdti1route; -#[doc = "TIMER3_CDTI2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER3_CDTI2ROUTE = crate::Reg; +#[doc = "TIMER3_CDTI2ROUTE (rw) register accessor: CDTI2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_cdti2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_cdti2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer3_cdti2route`] +module"] +#[doc(alias = "TIMER3_CDTI2ROUTE")] +pub type Timer3Cdti2route = crate::Reg; #[doc = "CDTI2 port/pin select"] pub mod timer3_cdti2route; -#[doc = "TIMER4_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type TIMER4_ROUTEEN = crate::Reg; +#[doc = "TIMER4_ROUTEEN (rw) register accessor: TIMER4 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer4_routeen`] +module"] +#[doc(alias = "TIMER4_ROUTEEN")] +pub type Timer4Routeen = crate::Reg; #[doc = "TIMER4 pin enable"] pub mod timer4_routeen; -#[doc = "TIMER4_CC0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER4_CC0ROUTE = crate::Reg; +#[doc = "TIMER4_CC0ROUTE (rw) register accessor: CC0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_cc0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_cc0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer4_cc0route`] +module"] +#[doc(alias = "TIMER4_CC0ROUTE")] +pub type Timer4Cc0route = crate::Reg; #[doc = "CC0 port/pin select"] pub mod timer4_cc0route; -#[doc = "TIMER4_CC1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER4_CC1ROUTE = crate::Reg; +#[doc = "TIMER4_CC1ROUTE (rw) register accessor: CC1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_cc1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_cc1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer4_cc1route`] +module"] +#[doc(alias = "TIMER4_CC1ROUTE")] +pub type Timer4Cc1route = crate::Reg; #[doc = "CC1 port/pin select"] pub mod timer4_cc1route; -#[doc = "TIMER4_CC2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER4_CC2ROUTE = crate::Reg; +#[doc = "TIMER4_CC2ROUTE (rw) register accessor: CC2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_cc2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_cc2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer4_cc2route`] +module"] +#[doc(alias = "TIMER4_CC2ROUTE")] +pub type Timer4Cc2route = crate::Reg; #[doc = "CC2 port/pin select"] pub mod timer4_cc2route; -#[doc = "TIMER4_CDTI0ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER4_CDTI0ROUTE = crate::Reg; +#[doc = "TIMER4_CDTI0ROUTE (rw) register accessor: CDTI0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_cdti0route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_cdti0route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer4_cdti0route`] +module"] +#[doc(alias = "TIMER4_CDTI0ROUTE")] +pub type Timer4Cdti0route = crate::Reg; #[doc = "CDTI0 port/pin select"] pub mod timer4_cdti0route; -#[doc = "TIMER4_CDTI1ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER4_CDTI1ROUTE = crate::Reg; +#[doc = "TIMER4_CDTI1ROUTE (rw) register accessor: CDTI1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_cdti1route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_cdti1route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer4_cdti1route`] +module"] +#[doc(alias = "TIMER4_CDTI1ROUTE")] +pub type Timer4Cdti1route = crate::Reg; #[doc = "CDTI1 port/pin select"] pub mod timer4_cdti1route; -#[doc = "TIMER4_CDTI2ROUTE (rw) register accessor: an alias for `Reg`"] -pub type TIMER4_CDTI2ROUTE = crate::Reg; +#[doc = "TIMER4_CDTI2ROUTE (rw) register accessor: CDTI2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_cdti2route::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_cdti2route::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer4_cdti2route`] +module"] +#[doc(alias = "TIMER4_CDTI2ROUTE")] +pub type Timer4Cdti2route = crate::Reg; #[doc = "CDTI2 port/pin select"] pub mod timer4_cdti2route; -#[doc = "USART0_ROUTEEN (rw) register accessor: an alias for `Reg`"] -pub type USART0_ROUTEEN = crate::Reg; +#[doc = "USART0_ROUTEEN (rw) register accessor: USART0 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_routeen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_routeen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usart0_routeen`] +module"] +#[doc(alias = "USART0_ROUTEEN")] +pub type Usart0Routeen = crate::Reg; #[doc = "USART0 pin enable"] pub mod usart0_routeen; -#[doc = "USART0_CSROUTE (rw) register accessor: an alias for `Reg`"] -pub type USART0_CSROUTE = crate::Reg; +#[doc = "USART0_CSROUTE (rw) register accessor: CS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_csroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_csroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usart0_csroute`] +module"] +#[doc(alias = "USART0_CSROUTE")] +pub type Usart0Csroute = crate::Reg; #[doc = "CS port/pin select"] pub mod usart0_csroute; -#[doc = "USART0_CTSROUTE (rw) register accessor: an alias for `Reg`"] -pub type USART0_CTSROUTE = crate::Reg; +#[doc = "USART0_CTSROUTE (rw) register accessor: CTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_ctsroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_ctsroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usart0_ctsroute`] +module"] +#[doc(alias = "USART0_CTSROUTE")] +pub type Usart0Ctsroute = crate::Reg; #[doc = "CTS port/pin select"] pub mod usart0_ctsroute; -#[doc = "USART0_RTSROUTE (rw) register accessor: an alias for `Reg`"] -pub type USART0_RTSROUTE = crate::Reg; +#[doc = "USART0_RTSROUTE (rw) register accessor: RTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_rtsroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_rtsroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usart0_rtsroute`] +module"] +#[doc(alias = "USART0_RTSROUTE")] +pub type Usart0Rtsroute = crate::Reg; #[doc = "RTS port/pin select"] pub mod usart0_rtsroute; -#[doc = "USART0_RXROUTE (rw) register accessor: an alias for `Reg`"] -pub type USART0_RXROUTE = crate::Reg; +#[doc = "USART0_RXROUTE (rw) register accessor: RX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_rxroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_rxroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usart0_rxroute`] +module"] +#[doc(alias = "USART0_RXROUTE")] +pub type Usart0Rxroute = crate::Reg; #[doc = "RX port/pin select"] pub mod usart0_rxroute; -#[doc = "USART0_CLKROUTE (rw) register accessor: an alias for `Reg`"] -pub type USART0_CLKROUTE = crate::Reg; +#[doc = "USART0_CLKROUTE (rw) register accessor: SCLK port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_clkroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_clkroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usart0_clkroute`] +module"] +#[doc(alias = "USART0_CLKROUTE")] +pub type Usart0Clkroute = crate::Reg; #[doc = "SCLK port/pin select"] pub mod usart0_clkroute; -#[doc = "USART0_TXROUTE (rw) register accessor: an alias for `Reg`"] -pub type USART0_TXROUTE = crate::Reg; +#[doc = "USART0_TXROUTE (rw) register accessor: TX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_txroute::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_txroute::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usart0_txroute`] +module"] +#[doc(alias = "USART0_TXROUTE")] +pub type Usart0Txroute = crate::Reg; #[doc = "TX port/pin select"] pub mod usart0_txroute; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/abusalloc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/abusalloc.rs index 2f4ee4d..2307048 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/abusalloc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/abusalloc.rs @@ -1,475 +1,465 @@ #[doc = "Register `ABUSALLOC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ABUSALLOC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `AEVEN0` reader - A Bus Even 0"] -pub type AEVEN0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "A Bus Even 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum AEVEN0_A { +pub enum Aeven0 { #[doc = "0: The bus is not allocated"] - TRISTATE = 0, + Tristate = 0, #[doc = "1: The bus is allocated to ADC0"] - ADC0 = 1, + Adc0 = 1, #[doc = "2: The bus is allocated to ACMP0"] - ACMP0 = 2, + Acmp0 = 2, #[doc = "3: The bus is allocated to ACMP1"] - ACMP1 = 3, + Acmp1 = 3, #[doc = "4: The bus is allocated to VDAC0 CH0"] - VDAC0CH0 = 4, + Vdac0ch0 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: AEVEN0_A) -> Self { + fn from(variant: Aeven0) -> Self { variant as _ } } -impl AEVEN0_R { +impl crate::FieldSpec for Aeven0 { + type Ux = u8; +} +impl crate::IsEnum for Aeven0 {} +#[doc = "Field `AEVEN0` reader - A Bus Even 0"] +pub type Aeven0R = crate::FieldReader; +impl Aeven0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(AEVEN0_A::TRISTATE), - 1 => Some(AEVEN0_A::ADC0), - 2 => Some(AEVEN0_A::ACMP0), - 3 => Some(AEVEN0_A::ACMP1), - 4 => Some(AEVEN0_A::VDAC0CH0), + 0 => Some(Aeven0::Tristate), + 1 => Some(Aeven0::Adc0), + 2 => Some(Aeven0::Acmp0), + 3 => Some(Aeven0::Acmp1), + 4 => Some(Aeven0::Vdac0ch0), _ => None, } } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "The bus is not allocated"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == AEVEN0_A::TRISTATE + *self == Aeven0::Tristate } - #[doc = "Checks if the value of the field is `ADC0`"] + #[doc = "The bus is allocated to ADC0"] #[inline(always)] pub fn is_adc0(&self) -> bool { - *self == AEVEN0_A::ADC0 + *self == Aeven0::Adc0 } - #[doc = "Checks if the value of the field is `ACMP0`"] + #[doc = "The bus is allocated to ACMP0"] #[inline(always)] pub fn is_acmp0(&self) -> bool { - *self == AEVEN0_A::ACMP0 + *self == Aeven0::Acmp0 } - #[doc = "Checks if the value of the field is `ACMP1`"] + #[doc = "The bus is allocated to ACMP1"] #[inline(always)] pub fn is_acmp1(&self) -> bool { - *self == AEVEN0_A::ACMP1 + *self == Aeven0::Acmp1 } - #[doc = "Checks if the value of the field is `VDAC0CH0`"] + #[doc = "The bus is allocated to VDAC0 CH0"] #[inline(always)] pub fn is_vdac0ch0(&self) -> bool { - *self == AEVEN0_A::VDAC0CH0 + *self == Aeven0::Vdac0ch0 } } #[doc = "Field `AEVEN0` writer - A Bus Even 0"] -pub type AEVEN0_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ABUSALLOC_SPEC, u8, AEVEN0_A, 4, O>; -impl<'a, const O: u8> AEVEN0_W<'a, O> { +pub type Aeven0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Aeven0>; +impl<'a, REG> Aeven0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The bus is not allocated"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(AEVEN0_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Aeven0::Tristate) } #[doc = "The bus is allocated to ADC0"] #[inline(always)] - pub fn adc0(self) -> &'a mut W { - self.variant(AEVEN0_A::ADC0) + pub fn adc0(self) -> &'a mut crate::W { + self.variant(Aeven0::Adc0) } #[doc = "The bus is allocated to ACMP0"] #[inline(always)] - pub fn acmp0(self) -> &'a mut W { - self.variant(AEVEN0_A::ACMP0) + pub fn acmp0(self) -> &'a mut crate::W { + self.variant(Aeven0::Acmp0) } #[doc = "The bus is allocated to ACMP1"] #[inline(always)] - pub fn acmp1(self) -> &'a mut W { - self.variant(AEVEN0_A::ACMP1) + pub fn acmp1(self) -> &'a mut crate::W { + self.variant(Aeven0::Acmp1) } #[doc = "The bus is allocated to VDAC0 CH0"] #[inline(always)] - pub fn vdac0ch0(self) -> &'a mut W { - self.variant(AEVEN0_A::VDAC0CH0) + pub fn vdac0ch0(self) -> &'a mut crate::W { + self.variant(Aeven0::Vdac0ch0) } } -#[doc = "Field `AEVEN1` reader - A Bus Even 1"] -pub type AEVEN1_R = crate::FieldReader; #[doc = "A Bus Even 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum AEVEN1_A { +pub enum Aeven1 { #[doc = "0: The bus is not allocated"] - TRISTATE = 0, + Tristate = 0, #[doc = "1: The bus is allocated to ADC0"] - ADC0 = 1, + Adc0 = 1, #[doc = "2: The bus is allocated to ACMP0"] - ACMP0 = 2, + Acmp0 = 2, #[doc = "3: The bus is allocated to ACMP1"] - ACMP1 = 3, + Acmp1 = 3, #[doc = "4: The bus is allocated to VDAC0 CH1"] - VDAC0CH1 = 4, + Vdac0ch1 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: AEVEN1_A) -> Self { + fn from(variant: Aeven1) -> Self { variant as _ } } -impl AEVEN1_R { +impl crate::FieldSpec for Aeven1 { + type Ux = u8; +} +impl crate::IsEnum for Aeven1 {} +#[doc = "Field `AEVEN1` reader - A Bus Even 1"] +pub type Aeven1R = crate::FieldReader; +impl Aeven1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(AEVEN1_A::TRISTATE), - 1 => Some(AEVEN1_A::ADC0), - 2 => Some(AEVEN1_A::ACMP0), - 3 => Some(AEVEN1_A::ACMP1), - 4 => Some(AEVEN1_A::VDAC0CH1), + 0 => Some(Aeven1::Tristate), + 1 => Some(Aeven1::Adc0), + 2 => Some(Aeven1::Acmp0), + 3 => Some(Aeven1::Acmp1), + 4 => Some(Aeven1::Vdac0ch1), _ => None, } } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "The bus is not allocated"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == AEVEN1_A::TRISTATE + *self == Aeven1::Tristate } - #[doc = "Checks if the value of the field is `ADC0`"] + #[doc = "The bus is allocated to ADC0"] #[inline(always)] pub fn is_adc0(&self) -> bool { - *self == AEVEN1_A::ADC0 + *self == Aeven1::Adc0 } - #[doc = "Checks if the value of the field is `ACMP0`"] + #[doc = "The bus is allocated to ACMP0"] #[inline(always)] pub fn is_acmp0(&self) -> bool { - *self == AEVEN1_A::ACMP0 + *self == Aeven1::Acmp0 } - #[doc = "Checks if the value of the field is `ACMP1`"] + #[doc = "The bus is allocated to ACMP1"] #[inline(always)] pub fn is_acmp1(&self) -> bool { - *self == AEVEN1_A::ACMP1 + *self == Aeven1::Acmp1 } - #[doc = "Checks if the value of the field is `VDAC0CH1`"] + #[doc = "The bus is allocated to VDAC0 CH1"] #[inline(always)] pub fn is_vdac0ch1(&self) -> bool { - *self == AEVEN1_A::VDAC0CH1 + *self == Aeven1::Vdac0ch1 } } #[doc = "Field `AEVEN1` writer - A Bus Even 1"] -pub type AEVEN1_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ABUSALLOC_SPEC, u8, AEVEN1_A, 4, O>; -impl<'a, const O: u8> AEVEN1_W<'a, O> { +pub type Aeven1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Aeven1>; +impl<'a, REG> Aeven1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The bus is not allocated"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(AEVEN1_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Aeven1::Tristate) } #[doc = "The bus is allocated to ADC0"] #[inline(always)] - pub fn adc0(self) -> &'a mut W { - self.variant(AEVEN1_A::ADC0) + pub fn adc0(self) -> &'a mut crate::W { + self.variant(Aeven1::Adc0) } #[doc = "The bus is allocated to ACMP0"] #[inline(always)] - pub fn acmp0(self) -> &'a mut W { - self.variant(AEVEN1_A::ACMP0) + pub fn acmp0(self) -> &'a mut crate::W { + self.variant(Aeven1::Acmp0) } #[doc = "The bus is allocated to ACMP1"] #[inline(always)] - pub fn acmp1(self) -> &'a mut W { - self.variant(AEVEN1_A::ACMP1) + pub fn acmp1(self) -> &'a mut crate::W { + self.variant(Aeven1::Acmp1) } #[doc = "The bus is allocated to VDAC0 CH1"] #[inline(always)] - pub fn vdac0ch1(self) -> &'a mut W { - self.variant(AEVEN1_A::VDAC0CH1) + pub fn vdac0ch1(self) -> &'a mut crate::W { + self.variant(Aeven1::Vdac0ch1) } } -#[doc = "Field `AODD0` reader - A Bus Odd 0"] -pub type AODD0_R = crate::FieldReader; #[doc = "A Bus Odd 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum AODD0_A { +pub enum Aodd0 { #[doc = "0: The bus is not allocated"] - TRISTATE = 0, + Tristate = 0, #[doc = "1: The bus is allocated to ADC0"] - ADC0 = 1, + Adc0 = 1, #[doc = "2: The bus is allocated to ACMP0"] - ACMP0 = 2, + Acmp0 = 2, #[doc = "3: The bus is allocated to ACMP1"] - ACMP1 = 3, + Acmp1 = 3, #[doc = "4: The bus is allocated to VDAC0 CH0"] - VDAC0CH0 = 4, + Vdac0ch0 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: AODD0_A) -> Self { + fn from(variant: Aodd0) -> Self { variant as _ } } -impl AODD0_R { +impl crate::FieldSpec for Aodd0 { + type Ux = u8; +} +impl crate::IsEnum for Aodd0 {} +#[doc = "Field `AODD0` reader - A Bus Odd 0"] +pub type Aodd0R = crate::FieldReader; +impl Aodd0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(AODD0_A::TRISTATE), - 1 => Some(AODD0_A::ADC0), - 2 => Some(AODD0_A::ACMP0), - 3 => Some(AODD0_A::ACMP1), - 4 => Some(AODD0_A::VDAC0CH0), + 0 => Some(Aodd0::Tristate), + 1 => Some(Aodd0::Adc0), + 2 => Some(Aodd0::Acmp0), + 3 => Some(Aodd0::Acmp1), + 4 => Some(Aodd0::Vdac0ch0), _ => None, } } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "The bus is not allocated"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == AODD0_A::TRISTATE + *self == Aodd0::Tristate } - #[doc = "Checks if the value of the field is `ADC0`"] + #[doc = "The bus is allocated to ADC0"] #[inline(always)] pub fn is_adc0(&self) -> bool { - *self == AODD0_A::ADC0 + *self == Aodd0::Adc0 } - #[doc = "Checks if the value of the field is `ACMP0`"] + #[doc = "The bus is allocated to ACMP0"] #[inline(always)] pub fn is_acmp0(&self) -> bool { - *self == AODD0_A::ACMP0 + *self == Aodd0::Acmp0 } - #[doc = "Checks if the value of the field is `ACMP1`"] + #[doc = "The bus is allocated to ACMP1"] #[inline(always)] pub fn is_acmp1(&self) -> bool { - *self == AODD0_A::ACMP1 + *self == Aodd0::Acmp1 } - #[doc = "Checks if the value of the field is `VDAC0CH0`"] + #[doc = "The bus is allocated to VDAC0 CH0"] #[inline(always)] pub fn is_vdac0ch0(&self) -> bool { - *self == AODD0_A::VDAC0CH0 + *self == Aodd0::Vdac0ch0 } } #[doc = "Field `AODD0` writer - A Bus Odd 0"] -pub type AODD0_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ABUSALLOC_SPEC, u8, AODD0_A, 4, O>; -impl<'a, const O: u8> AODD0_W<'a, O> { +pub type Aodd0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Aodd0>; +impl<'a, REG> Aodd0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The bus is not allocated"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(AODD0_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Aodd0::Tristate) } #[doc = "The bus is allocated to ADC0"] #[inline(always)] - pub fn adc0(self) -> &'a mut W { - self.variant(AODD0_A::ADC0) + pub fn adc0(self) -> &'a mut crate::W { + self.variant(Aodd0::Adc0) } #[doc = "The bus is allocated to ACMP0"] #[inline(always)] - pub fn acmp0(self) -> &'a mut W { - self.variant(AODD0_A::ACMP0) + pub fn acmp0(self) -> &'a mut crate::W { + self.variant(Aodd0::Acmp0) } #[doc = "The bus is allocated to ACMP1"] #[inline(always)] - pub fn acmp1(self) -> &'a mut W { - self.variant(AODD0_A::ACMP1) + pub fn acmp1(self) -> &'a mut crate::W { + self.variant(Aodd0::Acmp1) } #[doc = "The bus is allocated to VDAC0 CH0"] #[inline(always)] - pub fn vdac0ch0(self) -> &'a mut W { - self.variant(AODD0_A::VDAC0CH0) + pub fn vdac0ch0(self) -> &'a mut crate::W { + self.variant(Aodd0::Vdac0ch0) } } -#[doc = "Field `AODD1` reader - A Bus Odd 1"] -pub type AODD1_R = crate::FieldReader; #[doc = "A Bus Odd 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum AODD1_A { +pub enum Aodd1 { #[doc = "0: The bus is not allocated"] - TRISTATE = 0, + Tristate = 0, #[doc = "1: The bus is allocated to ADC0"] - ADC0 = 1, + Adc0 = 1, #[doc = "2: The bus is allocated to ACMP0"] - ACMP0 = 2, + Acmp0 = 2, #[doc = "3: The bus is allocated to ACMP1"] - ACMP1 = 3, + Acmp1 = 3, #[doc = "4: The bus is allocated to VDAC0 CH1"] - VDAC0CH1 = 4, + Vdac0ch1 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: AODD1_A) -> Self { + fn from(variant: Aodd1) -> Self { variant as _ } } -impl AODD1_R { +impl crate::FieldSpec for Aodd1 { + type Ux = u8; +} +impl crate::IsEnum for Aodd1 {} +#[doc = "Field `AODD1` reader - A Bus Odd 1"] +pub type Aodd1R = crate::FieldReader; +impl Aodd1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(AODD1_A::TRISTATE), - 1 => Some(AODD1_A::ADC0), - 2 => Some(AODD1_A::ACMP0), - 3 => Some(AODD1_A::ACMP1), - 4 => Some(AODD1_A::VDAC0CH1), + 0 => Some(Aodd1::Tristate), + 1 => Some(Aodd1::Adc0), + 2 => Some(Aodd1::Acmp0), + 3 => Some(Aodd1::Acmp1), + 4 => Some(Aodd1::Vdac0ch1), _ => None, } } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "The bus is not allocated"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == AODD1_A::TRISTATE + *self == Aodd1::Tristate } - #[doc = "Checks if the value of the field is `ADC0`"] + #[doc = "The bus is allocated to ADC0"] #[inline(always)] pub fn is_adc0(&self) -> bool { - *self == AODD1_A::ADC0 + *self == Aodd1::Adc0 } - #[doc = "Checks if the value of the field is `ACMP0`"] + #[doc = "The bus is allocated to ACMP0"] #[inline(always)] pub fn is_acmp0(&self) -> bool { - *self == AODD1_A::ACMP0 + *self == Aodd1::Acmp0 } - #[doc = "Checks if the value of the field is `ACMP1`"] + #[doc = "The bus is allocated to ACMP1"] #[inline(always)] pub fn is_acmp1(&self) -> bool { - *self == AODD1_A::ACMP1 + *self == Aodd1::Acmp1 } - #[doc = "Checks if the value of the field is `VDAC0CH1`"] + #[doc = "The bus is allocated to VDAC0 CH1"] #[inline(always)] pub fn is_vdac0ch1(&self) -> bool { - *self == AODD1_A::VDAC0CH1 + *self == Aodd1::Vdac0ch1 } } #[doc = "Field `AODD1` writer - A Bus Odd 1"] -pub type AODD1_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ABUSALLOC_SPEC, u8, AODD1_A, 4, O>; -impl<'a, const O: u8> AODD1_W<'a, O> { +pub type Aodd1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Aodd1>; +impl<'a, REG> Aodd1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The bus is not allocated"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(AODD1_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Aodd1::Tristate) } #[doc = "The bus is allocated to ADC0"] #[inline(always)] - pub fn adc0(self) -> &'a mut W { - self.variant(AODD1_A::ADC0) + pub fn adc0(self) -> &'a mut crate::W { + self.variant(Aodd1::Adc0) } #[doc = "The bus is allocated to ACMP0"] #[inline(always)] - pub fn acmp0(self) -> &'a mut W { - self.variant(AODD1_A::ACMP0) + pub fn acmp0(self) -> &'a mut crate::W { + self.variant(Aodd1::Acmp0) } #[doc = "The bus is allocated to ACMP1"] #[inline(always)] - pub fn acmp1(self) -> &'a mut W { - self.variant(AODD1_A::ACMP1) + pub fn acmp1(self) -> &'a mut crate::W { + self.variant(Aodd1::Acmp1) } #[doc = "The bus is allocated to VDAC0 CH1"] #[inline(always)] - pub fn vdac0ch1(self) -> &'a mut W { - self.variant(AODD1_A::VDAC0CH1) + pub fn vdac0ch1(self) -> &'a mut crate::W { + self.variant(Aodd1::Vdac0ch1) } } impl R { #[doc = "Bits 0:3 - A Bus Even 0"] #[inline(always)] - pub fn aeven0(&self) -> AEVEN0_R { - AEVEN0_R::new((self.bits & 0x0f) as u8) + pub fn aeven0(&self) -> Aeven0R { + Aeven0R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:11 - A Bus Even 1"] #[inline(always)] - pub fn aeven1(&self) -> AEVEN1_R { - AEVEN1_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn aeven1(&self) -> Aeven1R { + Aeven1R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 16:19 - A Bus Odd 0"] #[inline(always)] - pub fn aodd0(&self) -> AODD0_R { - AODD0_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn aodd0(&self) -> Aodd0R { + Aodd0R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - A Bus Odd 1"] #[inline(always)] - pub fn aodd1(&self) -> AODD1_R { - AODD1_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn aodd1(&self) -> Aodd1R { + Aodd1R::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - A Bus Even 0"] #[inline(always)] #[must_use] - pub fn aeven0(&mut self) -> AEVEN0_W<0> { - AEVEN0_W::new(self) + pub fn aeven0(&mut self) -> Aeven0W { + Aeven0W::new(self, 0) } #[doc = "Bits 8:11 - A Bus Even 1"] #[inline(always)] #[must_use] - pub fn aeven1(&mut self) -> AEVEN1_W<8> { - AEVEN1_W::new(self) + pub fn aeven1(&mut self) -> Aeven1W { + Aeven1W::new(self, 8) } #[doc = "Bits 16:19 - A Bus Odd 0"] #[inline(always)] #[must_use] - pub fn aodd0(&mut self) -> AODD0_W<16> { - AODD0_W::new(self) + pub fn aodd0(&mut self) -> Aodd0W { + Aodd0W::new(self, 16) } #[doc = "Bits 24:27 - A Bus Odd 1"] #[inline(always)] #[must_use] - pub fn aodd1(&mut self) -> AODD1_W<24> { - AODD1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn aodd1(&mut self) -> Aodd1W { + Aodd1W::new(self, 24) } } -#[doc = "A Bus allocation\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [abusalloc](index.html) module"] -pub struct ABUSALLOC_SPEC; -impl crate::RegisterSpec for ABUSALLOC_SPEC { +#[doc = "A Bus allocation\n\nYou can [`read`](crate::Reg::read) this register and get [`abusalloc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`abusalloc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AbusallocSpec; +impl crate::RegisterSpec for AbusallocSpec { type Ux = u32; } -#[doc = "`read()` method returns [abusalloc::R](R) reader structure"] -impl crate::Readable for ABUSALLOC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [abusalloc::W](W) writer structure"] -impl crate::Writable for ABUSALLOC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`abusalloc::R`](R) reader structure"] +impl crate::Readable for AbusallocSpec {} +#[doc = "`write(|w| ..)` method takes [`abusalloc::W`](W) writer structure"] +impl crate::Writable for AbusallocSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ABUSALLOC to value 0"] -impl crate::Resettable for ABUSALLOC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for AbusallocSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/acmp0_acmpoutroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/acmp0_acmpoutroute.rs index 4e1af63..2d64f16 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/acmp0_acmpoutroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/acmp0_acmpoutroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `ACMP0_ACMPOUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ACMP0_ACMPOUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ACMPOUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ACMPOUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ACMP0_ACMPOUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ACMPOUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ACMPOUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ACMP0_ACMPOUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ACMPOUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ACMPOUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ACMPOUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ACMPOUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ACMPOUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [acmp0_acmpoutroute](index.html) module"] -pub struct ACMP0_ACMPOUTROUTE_SPEC; -impl crate::RegisterSpec for ACMP0_ACMPOUTROUTE_SPEC { +#[doc = "ACMPOUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`acmp0_acmpoutroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`acmp0_acmpoutroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Acmp0AcmpoutrouteSpec; +impl crate::RegisterSpec for Acmp0AcmpoutrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [acmp0_acmpoutroute::R](R) reader structure"] -impl crate::Readable for ACMP0_ACMPOUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [acmp0_acmpoutroute::W](W) writer structure"] -impl crate::Writable for ACMP0_ACMPOUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`acmp0_acmpoutroute::R`](R) reader structure"] +impl crate::Readable for Acmp0AcmpoutrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`acmp0_acmpoutroute::W`](W) writer structure"] +impl crate::Writable for Acmp0AcmpoutrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ACMP0_ACMPOUTROUTE to value 0"] -impl crate::Resettable for ACMP0_ACMPOUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Acmp0AcmpoutrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/acmp0_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/acmp0_routeen.rs index bc21d84..a44f0ae 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/acmp0_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/acmp0_routeen.rs @@ -1,80 +1,40 @@ #[doc = "Register `ACMP0_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ACMP0_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ACMPOUTPEN` reader - ACMPOUT pin enable control bit"] -pub type ACMPOUTPEN_R = crate::BitReader; +pub type AcmpoutpenR = crate::BitReader; #[doc = "Field `ACMPOUTPEN` writer - ACMPOUT pin enable control bit"] -pub type ACMPOUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ACMP0_ROUTEEN_SPEC, bool, O>; +pub type AcmpoutpenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - ACMPOUT pin enable control bit"] #[inline(always)] - pub fn acmpoutpen(&self) -> ACMPOUTPEN_R { - ACMPOUTPEN_R::new((self.bits & 1) != 0) + pub fn acmpoutpen(&self) -> AcmpoutpenR { + AcmpoutpenR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - ACMPOUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn acmpoutpen(&mut self) -> ACMPOUTPEN_W<0> { - ACMPOUTPEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn acmpoutpen(&mut self) -> AcmpoutpenW { + AcmpoutpenW::new(self, 0) } } -#[doc = "ACMP0 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [acmp0_routeen](index.html) module"] -pub struct ACMP0_ROUTEEN_SPEC; -impl crate::RegisterSpec for ACMP0_ROUTEEN_SPEC { +#[doc = "ACMP0 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`acmp0_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`acmp0_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Acmp0RouteenSpec; +impl crate::RegisterSpec for Acmp0RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [acmp0_routeen::R](R) reader structure"] -impl crate::Readable for ACMP0_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [acmp0_routeen::W](W) writer structure"] -impl crate::Writable for ACMP0_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`acmp0_routeen::R`](R) reader structure"] +impl crate::Readable for Acmp0RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`acmp0_routeen::W`](W) writer structure"] +impl crate::Writable for Acmp0RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ACMP0_ROUTEEN to value 0"] -impl crate::Resettable for ACMP0_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Acmp0RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/acmp1_acmpoutroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/acmp1_acmpoutroute.rs index 7182d45..28768d0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/acmp1_acmpoutroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/acmp1_acmpoutroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `ACMP1_ACMPOUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ACMP1_ACMPOUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ACMPOUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ACMPOUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ACMP1_ACMPOUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ACMPOUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ACMPOUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ACMP1_ACMPOUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ACMPOUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ACMPOUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ACMPOUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ACMPOUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ACMPOUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [acmp1_acmpoutroute](index.html) module"] -pub struct ACMP1_ACMPOUTROUTE_SPEC; -impl crate::RegisterSpec for ACMP1_ACMPOUTROUTE_SPEC { +#[doc = "ACMPOUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`acmp1_acmpoutroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`acmp1_acmpoutroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Acmp1AcmpoutrouteSpec; +impl crate::RegisterSpec for Acmp1AcmpoutrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [acmp1_acmpoutroute::R](R) reader structure"] -impl crate::Readable for ACMP1_ACMPOUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [acmp1_acmpoutroute::W](W) writer structure"] -impl crate::Writable for ACMP1_ACMPOUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`acmp1_acmpoutroute::R`](R) reader structure"] +impl crate::Readable for Acmp1AcmpoutrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`acmp1_acmpoutroute::W`](W) writer structure"] +impl crate::Writable for Acmp1AcmpoutrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ACMP1_ACMPOUTROUTE to value 0"] -impl crate::Resettable for ACMP1_ACMPOUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Acmp1AcmpoutrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/acmp1_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/acmp1_routeen.rs index 40ce031..7f05be6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/acmp1_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/acmp1_routeen.rs @@ -1,80 +1,40 @@ #[doc = "Register `ACMP1_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ACMP1_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ACMPOUTPEN` reader - ACMPOUT pin enable control bit"] -pub type ACMPOUTPEN_R = crate::BitReader; +pub type AcmpoutpenR = crate::BitReader; #[doc = "Field `ACMPOUTPEN` writer - ACMPOUT pin enable control bit"] -pub type ACMPOUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ACMP1_ROUTEEN_SPEC, bool, O>; +pub type AcmpoutpenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - ACMPOUT pin enable control bit"] #[inline(always)] - pub fn acmpoutpen(&self) -> ACMPOUTPEN_R { - ACMPOUTPEN_R::new((self.bits & 1) != 0) + pub fn acmpoutpen(&self) -> AcmpoutpenR { + AcmpoutpenR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - ACMPOUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn acmpoutpen(&mut self) -> ACMPOUTPEN_W<0> { - ACMPOUTPEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn acmpoutpen(&mut self) -> AcmpoutpenW { + AcmpoutpenW::new(self, 0) } } -#[doc = "ACMP1 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [acmp1_routeen](index.html) module"] -pub struct ACMP1_ROUTEEN_SPEC; -impl crate::RegisterSpec for ACMP1_ROUTEEN_SPEC { +#[doc = "ACMP1 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`acmp1_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`acmp1_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Acmp1RouteenSpec; +impl crate::RegisterSpec for Acmp1RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [acmp1_routeen::R](R) reader structure"] -impl crate::Readable for ACMP1_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [acmp1_routeen::W](W) writer structure"] -impl crate::Writable for ACMP1_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`acmp1_routeen::R`](R) reader structure"] +impl crate::Readable for Acmp1RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`acmp1_routeen::W`](W) writer structure"] +impl crate::Writable for Acmp1RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ACMP1_ROUTEEN to value 0"] -impl crate::Resettable for ACMP1_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Acmp1RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/bbusalloc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/bbusalloc.rs index 0202ccc..1125158 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/bbusalloc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/bbusalloc.rs @@ -1,475 +1,465 @@ #[doc = "Register `BBUSALLOC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `BBUSALLOC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `BEVEN0` reader - B Bus Even 0"] -pub type BEVEN0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "B Bus Even 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BEVEN0_A { +pub enum Beven0 { #[doc = "0: The bus is not allocated"] - TRISTATE = 0, + Tristate = 0, #[doc = "1: The bus is allocated to ADC0"] - ADC0 = 1, + Adc0 = 1, #[doc = "2: The bus is allocated to ACMP0"] - ACMP0 = 2, + Acmp0 = 2, #[doc = "3: The bus is allocated to ACMP1"] - ACMP1 = 3, + Acmp1 = 3, #[doc = "4: The bus is allocated to VDAC0 CH0"] - VDAC0CH0 = 4, + Vdac0ch0 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BEVEN0_A) -> Self { + fn from(variant: Beven0) -> Self { variant as _ } } -impl BEVEN0_R { +impl crate::FieldSpec for Beven0 { + type Ux = u8; +} +impl crate::IsEnum for Beven0 {} +#[doc = "Field `BEVEN0` reader - B Bus Even 0"] +pub type Beven0R = crate::FieldReader; +impl Beven0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BEVEN0_A::TRISTATE), - 1 => Some(BEVEN0_A::ADC0), - 2 => Some(BEVEN0_A::ACMP0), - 3 => Some(BEVEN0_A::ACMP1), - 4 => Some(BEVEN0_A::VDAC0CH0), + 0 => Some(Beven0::Tristate), + 1 => Some(Beven0::Adc0), + 2 => Some(Beven0::Acmp0), + 3 => Some(Beven0::Acmp1), + 4 => Some(Beven0::Vdac0ch0), _ => None, } } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "The bus is not allocated"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == BEVEN0_A::TRISTATE + *self == Beven0::Tristate } - #[doc = "Checks if the value of the field is `ADC0`"] + #[doc = "The bus is allocated to ADC0"] #[inline(always)] pub fn is_adc0(&self) -> bool { - *self == BEVEN0_A::ADC0 + *self == Beven0::Adc0 } - #[doc = "Checks if the value of the field is `ACMP0`"] + #[doc = "The bus is allocated to ACMP0"] #[inline(always)] pub fn is_acmp0(&self) -> bool { - *self == BEVEN0_A::ACMP0 + *self == Beven0::Acmp0 } - #[doc = "Checks if the value of the field is `ACMP1`"] + #[doc = "The bus is allocated to ACMP1"] #[inline(always)] pub fn is_acmp1(&self) -> bool { - *self == BEVEN0_A::ACMP1 + *self == Beven0::Acmp1 } - #[doc = "Checks if the value of the field is `VDAC0CH0`"] + #[doc = "The bus is allocated to VDAC0 CH0"] #[inline(always)] pub fn is_vdac0ch0(&self) -> bool { - *self == BEVEN0_A::VDAC0CH0 + *self == Beven0::Vdac0ch0 } } #[doc = "Field `BEVEN0` writer - B Bus Even 0"] -pub type BEVEN0_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, BBUSALLOC_SPEC, u8, BEVEN0_A, 4, O>; -impl<'a, const O: u8> BEVEN0_W<'a, O> { +pub type Beven0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Beven0>; +impl<'a, REG> Beven0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The bus is not allocated"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(BEVEN0_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Beven0::Tristate) } #[doc = "The bus is allocated to ADC0"] #[inline(always)] - pub fn adc0(self) -> &'a mut W { - self.variant(BEVEN0_A::ADC0) + pub fn adc0(self) -> &'a mut crate::W { + self.variant(Beven0::Adc0) } #[doc = "The bus is allocated to ACMP0"] #[inline(always)] - pub fn acmp0(self) -> &'a mut W { - self.variant(BEVEN0_A::ACMP0) + pub fn acmp0(self) -> &'a mut crate::W { + self.variant(Beven0::Acmp0) } #[doc = "The bus is allocated to ACMP1"] #[inline(always)] - pub fn acmp1(self) -> &'a mut W { - self.variant(BEVEN0_A::ACMP1) + pub fn acmp1(self) -> &'a mut crate::W { + self.variant(Beven0::Acmp1) } #[doc = "The bus is allocated to VDAC0 CH0"] #[inline(always)] - pub fn vdac0ch0(self) -> &'a mut W { - self.variant(BEVEN0_A::VDAC0CH0) + pub fn vdac0ch0(self) -> &'a mut crate::W { + self.variant(Beven0::Vdac0ch0) } } -#[doc = "Field `BEVEN1` reader - B Bus Even 1"] -pub type BEVEN1_R = crate::FieldReader; #[doc = "B Bus Even 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BEVEN1_A { +pub enum Beven1 { #[doc = "0: The bus is not allocated"] - TRISTATE = 0, + Tristate = 0, #[doc = "1: The bus is allocated to ADC0"] - ADC0 = 1, + Adc0 = 1, #[doc = "2: The bus is allocated to ACMP0"] - ACMP0 = 2, + Acmp0 = 2, #[doc = "3: The bus is allocated to ACMP1"] - ACMP1 = 3, + Acmp1 = 3, #[doc = "4: The bus is allocated to VDAC0 CH1"] - VDAC0CH1 = 4, + Vdac0ch1 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BEVEN1_A) -> Self { + fn from(variant: Beven1) -> Self { variant as _ } } -impl BEVEN1_R { +impl crate::FieldSpec for Beven1 { + type Ux = u8; +} +impl crate::IsEnum for Beven1 {} +#[doc = "Field `BEVEN1` reader - B Bus Even 1"] +pub type Beven1R = crate::FieldReader; +impl Beven1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BEVEN1_A::TRISTATE), - 1 => Some(BEVEN1_A::ADC0), - 2 => Some(BEVEN1_A::ACMP0), - 3 => Some(BEVEN1_A::ACMP1), - 4 => Some(BEVEN1_A::VDAC0CH1), + 0 => Some(Beven1::Tristate), + 1 => Some(Beven1::Adc0), + 2 => Some(Beven1::Acmp0), + 3 => Some(Beven1::Acmp1), + 4 => Some(Beven1::Vdac0ch1), _ => None, } } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "The bus is not allocated"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == BEVEN1_A::TRISTATE + *self == Beven1::Tristate } - #[doc = "Checks if the value of the field is `ADC0`"] + #[doc = "The bus is allocated to ADC0"] #[inline(always)] pub fn is_adc0(&self) -> bool { - *self == BEVEN1_A::ADC0 + *self == Beven1::Adc0 } - #[doc = "Checks if the value of the field is `ACMP0`"] + #[doc = "The bus is allocated to ACMP0"] #[inline(always)] pub fn is_acmp0(&self) -> bool { - *self == BEVEN1_A::ACMP0 + *self == Beven1::Acmp0 } - #[doc = "Checks if the value of the field is `ACMP1`"] + #[doc = "The bus is allocated to ACMP1"] #[inline(always)] pub fn is_acmp1(&self) -> bool { - *self == BEVEN1_A::ACMP1 + *self == Beven1::Acmp1 } - #[doc = "Checks if the value of the field is `VDAC0CH1`"] + #[doc = "The bus is allocated to VDAC0 CH1"] #[inline(always)] pub fn is_vdac0ch1(&self) -> bool { - *self == BEVEN1_A::VDAC0CH1 + *self == Beven1::Vdac0ch1 } } #[doc = "Field `BEVEN1` writer - B Bus Even 1"] -pub type BEVEN1_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, BBUSALLOC_SPEC, u8, BEVEN1_A, 4, O>; -impl<'a, const O: u8> BEVEN1_W<'a, O> { +pub type Beven1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Beven1>; +impl<'a, REG> Beven1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The bus is not allocated"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(BEVEN1_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Beven1::Tristate) } #[doc = "The bus is allocated to ADC0"] #[inline(always)] - pub fn adc0(self) -> &'a mut W { - self.variant(BEVEN1_A::ADC0) + pub fn adc0(self) -> &'a mut crate::W { + self.variant(Beven1::Adc0) } #[doc = "The bus is allocated to ACMP0"] #[inline(always)] - pub fn acmp0(self) -> &'a mut W { - self.variant(BEVEN1_A::ACMP0) + pub fn acmp0(self) -> &'a mut crate::W { + self.variant(Beven1::Acmp0) } #[doc = "The bus is allocated to ACMP1"] #[inline(always)] - pub fn acmp1(self) -> &'a mut W { - self.variant(BEVEN1_A::ACMP1) + pub fn acmp1(self) -> &'a mut crate::W { + self.variant(Beven1::Acmp1) } #[doc = "The bus is allocated to VDAC0 CH1"] #[inline(always)] - pub fn vdac0ch1(self) -> &'a mut W { - self.variant(BEVEN1_A::VDAC0CH1) + pub fn vdac0ch1(self) -> &'a mut crate::W { + self.variant(Beven1::Vdac0ch1) } } -#[doc = "Field `BODD0` reader - B Bus Odd 0"] -pub type BODD0_R = crate::FieldReader; #[doc = "B Bus Odd 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BODD0_A { +pub enum Bodd0 { #[doc = "0: The bus is not allocated"] - TRISTATE = 0, + Tristate = 0, #[doc = "1: The bus is allocated to ADC0"] - ADC0 = 1, + Adc0 = 1, #[doc = "2: The bus is allocated to ACMP0"] - ACMP0 = 2, + Acmp0 = 2, #[doc = "3: The bus is allocated to ACMP1"] - ACMP1 = 3, + Acmp1 = 3, #[doc = "4: The bus is allocated to VDAC0 CH0"] - VDAC0CH0 = 4, + Vdac0ch0 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BODD0_A) -> Self { + fn from(variant: Bodd0) -> Self { variant as _ } } -impl BODD0_R { +impl crate::FieldSpec for Bodd0 { + type Ux = u8; +} +impl crate::IsEnum for Bodd0 {} +#[doc = "Field `BODD0` reader - B Bus Odd 0"] +pub type Bodd0R = crate::FieldReader; +impl Bodd0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BODD0_A::TRISTATE), - 1 => Some(BODD0_A::ADC0), - 2 => Some(BODD0_A::ACMP0), - 3 => Some(BODD0_A::ACMP1), - 4 => Some(BODD0_A::VDAC0CH0), + 0 => Some(Bodd0::Tristate), + 1 => Some(Bodd0::Adc0), + 2 => Some(Bodd0::Acmp0), + 3 => Some(Bodd0::Acmp1), + 4 => Some(Bodd0::Vdac0ch0), _ => None, } } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "The bus is not allocated"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == BODD0_A::TRISTATE + *self == Bodd0::Tristate } - #[doc = "Checks if the value of the field is `ADC0`"] + #[doc = "The bus is allocated to ADC0"] #[inline(always)] pub fn is_adc0(&self) -> bool { - *self == BODD0_A::ADC0 + *self == Bodd0::Adc0 } - #[doc = "Checks if the value of the field is `ACMP0`"] + #[doc = "The bus is allocated to ACMP0"] #[inline(always)] pub fn is_acmp0(&self) -> bool { - *self == BODD0_A::ACMP0 + *self == Bodd0::Acmp0 } - #[doc = "Checks if the value of the field is `ACMP1`"] + #[doc = "The bus is allocated to ACMP1"] #[inline(always)] pub fn is_acmp1(&self) -> bool { - *self == BODD0_A::ACMP1 + *self == Bodd0::Acmp1 } - #[doc = "Checks if the value of the field is `VDAC0CH0`"] + #[doc = "The bus is allocated to VDAC0 CH0"] #[inline(always)] pub fn is_vdac0ch0(&self) -> bool { - *self == BODD0_A::VDAC0CH0 + *self == Bodd0::Vdac0ch0 } } #[doc = "Field `BODD0` writer - B Bus Odd 0"] -pub type BODD0_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BBUSALLOC_SPEC, u8, BODD0_A, 4, O>; -impl<'a, const O: u8> BODD0_W<'a, O> { +pub type Bodd0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Bodd0>; +impl<'a, REG> Bodd0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The bus is not allocated"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(BODD0_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Bodd0::Tristate) } #[doc = "The bus is allocated to ADC0"] #[inline(always)] - pub fn adc0(self) -> &'a mut W { - self.variant(BODD0_A::ADC0) + pub fn adc0(self) -> &'a mut crate::W { + self.variant(Bodd0::Adc0) } #[doc = "The bus is allocated to ACMP0"] #[inline(always)] - pub fn acmp0(self) -> &'a mut W { - self.variant(BODD0_A::ACMP0) + pub fn acmp0(self) -> &'a mut crate::W { + self.variant(Bodd0::Acmp0) } #[doc = "The bus is allocated to ACMP1"] #[inline(always)] - pub fn acmp1(self) -> &'a mut W { - self.variant(BODD0_A::ACMP1) + pub fn acmp1(self) -> &'a mut crate::W { + self.variant(Bodd0::Acmp1) } #[doc = "The bus is allocated to VDAC0 CH0"] #[inline(always)] - pub fn vdac0ch0(self) -> &'a mut W { - self.variant(BODD0_A::VDAC0CH0) + pub fn vdac0ch0(self) -> &'a mut crate::W { + self.variant(Bodd0::Vdac0ch0) } } -#[doc = "Field `BODD1` reader - B Bus Odd 1"] -pub type BODD1_R = crate::FieldReader; #[doc = "B Bus Odd 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BODD1_A { +pub enum Bodd1 { #[doc = "0: The bus is not allocated"] - TRISTATE = 0, + Tristate = 0, #[doc = "1: The bus is allocated to ADC0"] - ADC0 = 1, + Adc0 = 1, #[doc = "2: The bus is allocated to ACMP0"] - ACMP0 = 2, + Acmp0 = 2, #[doc = "3: The bus is allocated to ACMP1"] - ACMP1 = 3, + Acmp1 = 3, #[doc = "4: The bus is allocated to VDAC0 CH1"] - VDAC0CH1 = 4, + Vdac0ch1 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BODD1_A) -> Self { + fn from(variant: Bodd1) -> Self { variant as _ } } -impl BODD1_R { +impl crate::FieldSpec for Bodd1 { + type Ux = u8; +} +impl crate::IsEnum for Bodd1 {} +#[doc = "Field `BODD1` reader - B Bus Odd 1"] +pub type Bodd1R = crate::FieldReader; +impl Bodd1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BODD1_A::TRISTATE), - 1 => Some(BODD1_A::ADC0), - 2 => Some(BODD1_A::ACMP0), - 3 => Some(BODD1_A::ACMP1), - 4 => Some(BODD1_A::VDAC0CH1), + 0 => Some(Bodd1::Tristate), + 1 => Some(Bodd1::Adc0), + 2 => Some(Bodd1::Acmp0), + 3 => Some(Bodd1::Acmp1), + 4 => Some(Bodd1::Vdac0ch1), _ => None, } } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "The bus is not allocated"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == BODD1_A::TRISTATE + *self == Bodd1::Tristate } - #[doc = "Checks if the value of the field is `ADC0`"] + #[doc = "The bus is allocated to ADC0"] #[inline(always)] pub fn is_adc0(&self) -> bool { - *self == BODD1_A::ADC0 + *self == Bodd1::Adc0 } - #[doc = "Checks if the value of the field is `ACMP0`"] + #[doc = "The bus is allocated to ACMP0"] #[inline(always)] pub fn is_acmp0(&self) -> bool { - *self == BODD1_A::ACMP0 + *self == Bodd1::Acmp0 } - #[doc = "Checks if the value of the field is `ACMP1`"] + #[doc = "The bus is allocated to ACMP1"] #[inline(always)] pub fn is_acmp1(&self) -> bool { - *self == BODD1_A::ACMP1 + *self == Bodd1::Acmp1 } - #[doc = "Checks if the value of the field is `VDAC0CH1`"] + #[doc = "The bus is allocated to VDAC0 CH1"] #[inline(always)] pub fn is_vdac0ch1(&self) -> bool { - *self == BODD1_A::VDAC0CH1 + *self == Bodd1::Vdac0ch1 } } #[doc = "Field `BODD1` writer - B Bus Odd 1"] -pub type BODD1_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BBUSALLOC_SPEC, u8, BODD1_A, 4, O>; -impl<'a, const O: u8> BODD1_W<'a, O> { +pub type Bodd1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Bodd1>; +impl<'a, REG> Bodd1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The bus is not allocated"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(BODD1_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Bodd1::Tristate) } #[doc = "The bus is allocated to ADC0"] #[inline(always)] - pub fn adc0(self) -> &'a mut W { - self.variant(BODD1_A::ADC0) + pub fn adc0(self) -> &'a mut crate::W { + self.variant(Bodd1::Adc0) } #[doc = "The bus is allocated to ACMP0"] #[inline(always)] - pub fn acmp0(self) -> &'a mut W { - self.variant(BODD1_A::ACMP0) + pub fn acmp0(self) -> &'a mut crate::W { + self.variant(Bodd1::Acmp0) } #[doc = "The bus is allocated to ACMP1"] #[inline(always)] - pub fn acmp1(self) -> &'a mut W { - self.variant(BODD1_A::ACMP1) + pub fn acmp1(self) -> &'a mut crate::W { + self.variant(Bodd1::Acmp1) } #[doc = "The bus is allocated to VDAC0 CH1"] #[inline(always)] - pub fn vdac0ch1(self) -> &'a mut W { - self.variant(BODD1_A::VDAC0CH1) + pub fn vdac0ch1(self) -> &'a mut crate::W { + self.variant(Bodd1::Vdac0ch1) } } impl R { #[doc = "Bits 0:3 - B Bus Even 0"] #[inline(always)] - pub fn beven0(&self) -> BEVEN0_R { - BEVEN0_R::new((self.bits & 0x0f) as u8) + pub fn beven0(&self) -> Beven0R { + Beven0R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:11 - B Bus Even 1"] #[inline(always)] - pub fn beven1(&self) -> BEVEN1_R { - BEVEN1_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn beven1(&self) -> Beven1R { + Beven1R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 16:19 - B Bus Odd 0"] #[inline(always)] - pub fn bodd0(&self) -> BODD0_R { - BODD0_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn bodd0(&self) -> Bodd0R { + Bodd0R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - B Bus Odd 1"] #[inline(always)] - pub fn bodd1(&self) -> BODD1_R { - BODD1_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn bodd1(&self) -> Bodd1R { + Bodd1R::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - B Bus Even 0"] #[inline(always)] #[must_use] - pub fn beven0(&mut self) -> BEVEN0_W<0> { - BEVEN0_W::new(self) + pub fn beven0(&mut self) -> Beven0W { + Beven0W::new(self, 0) } #[doc = "Bits 8:11 - B Bus Even 1"] #[inline(always)] #[must_use] - pub fn beven1(&mut self) -> BEVEN1_W<8> { - BEVEN1_W::new(self) + pub fn beven1(&mut self) -> Beven1W { + Beven1W::new(self, 8) } #[doc = "Bits 16:19 - B Bus Odd 0"] #[inline(always)] #[must_use] - pub fn bodd0(&mut self) -> BODD0_W<16> { - BODD0_W::new(self) + pub fn bodd0(&mut self) -> Bodd0W { + Bodd0W::new(self, 16) } #[doc = "Bits 24:27 - B Bus Odd 1"] #[inline(always)] #[must_use] - pub fn bodd1(&mut self) -> BODD1_W<24> { - BODD1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn bodd1(&mut self) -> Bodd1W { + Bodd1W::new(self, 24) } } -#[doc = "B Bus allocation\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bbusalloc](index.html) module"] -pub struct BBUSALLOC_SPEC; -impl crate::RegisterSpec for BBUSALLOC_SPEC { +#[doc = "B Bus allocation\n\nYou can [`read`](crate::Reg::read) this register and get [`bbusalloc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bbusalloc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct BbusallocSpec; +impl crate::RegisterSpec for BbusallocSpec { type Ux = u32; } -#[doc = "`read()` method returns [bbusalloc::R](R) reader structure"] -impl crate::Readable for BBUSALLOC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [bbusalloc::W](W) writer structure"] -impl crate::Writable for BBUSALLOC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`bbusalloc::R`](R) reader structure"] +impl crate::Readable for BbusallocSpec {} +#[doc = "`write(|w| ..)` method takes [`bbusalloc::W`](W) writer structure"] +impl crate::Writable for BbusallocSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BBUSALLOC to value 0"] -impl crate::Resettable for BBUSALLOC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for BbusallocSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/cdbusalloc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/cdbusalloc.rs index 85ab065..4a42995 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/cdbusalloc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/cdbusalloc.rs @@ -1,477 +1,465 @@ #[doc = "Register `CDBUSALLOC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CDBUSALLOC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CDEVEN0` reader - CD Bus Even 0"] -pub type CDEVEN0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CD Bus Even 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CDEVEN0_A { +pub enum Cdeven0 { #[doc = "0: The bus is not allocated"] - TRISTATE = 0, + Tristate = 0, #[doc = "1: The bus is allocated to ADC0"] - ADC0 = 1, + Adc0 = 1, #[doc = "2: The bus is allocated to ACMP0"] - ACMP0 = 2, + Acmp0 = 2, #[doc = "3: The bus is allocated to ACMP1"] - ACMP1 = 3, + Acmp1 = 3, #[doc = "4: The bus is allocated to VDAC0 CH0"] - VDAC0CH0 = 4, + Vdac0ch0 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CDEVEN0_A) -> Self { + fn from(variant: Cdeven0) -> Self { variant as _ } } -impl CDEVEN0_R { +impl crate::FieldSpec for Cdeven0 { + type Ux = u8; +} +impl crate::IsEnum for Cdeven0 {} +#[doc = "Field `CDEVEN0` reader - CD Bus Even 0"] +pub type Cdeven0R = crate::FieldReader; +impl Cdeven0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CDEVEN0_A::TRISTATE), - 1 => Some(CDEVEN0_A::ADC0), - 2 => Some(CDEVEN0_A::ACMP0), - 3 => Some(CDEVEN0_A::ACMP1), - 4 => Some(CDEVEN0_A::VDAC0CH0), + 0 => Some(Cdeven0::Tristate), + 1 => Some(Cdeven0::Adc0), + 2 => Some(Cdeven0::Acmp0), + 3 => Some(Cdeven0::Acmp1), + 4 => Some(Cdeven0::Vdac0ch0), _ => None, } } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "The bus is not allocated"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == CDEVEN0_A::TRISTATE + *self == Cdeven0::Tristate } - #[doc = "Checks if the value of the field is `ADC0`"] + #[doc = "The bus is allocated to ADC0"] #[inline(always)] pub fn is_adc0(&self) -> bool { - *self == CDEVEN0_A::ADC0 + *self == Cdeven0::Adc0 } - #[doc = "Checks if the value of the field is `ACMP0`"] + #[doc = "The bus is allocated to ACMP0"] #[inline(always)] pub fn is_acmp0(&self) -> bool { - *self == CDEVEN0_A::ACMP0 + *self == Cdeven0::Acmp0 } - #[doc = "Checks if the value of the field is `ACMP1`"] + #[doc = "The bus is allocated to ACMP1"] #[inline(always)] pub fn is_acmp1(&self) -> bool { - *self == CDEVEN0_A::ACMP1 + *self == Cdeven0::Acmp1 } - #[doc = "Checks if the value of the field is `VDAC0CH0`"] + #[doc = "The bus is allocated to VDAC0 CH0"] #[inline(always)] pub fn is_vdac0ch0(&self) -> bool { - *self == CDEVEN0_A::VDAC0CH0 + *self == Cdeven0::Vdac0ch0 } } #[doc = "Field `CDEVEN0` writer - CD Bus Even 0"] -pub type CDEVEN0_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CDBUSALLOC_SPEC, u8, CDEVEN0_A, 4, O>; -impl<'a, const O: u8> CDEVEN0_W<'a, O> { +pub type Cdeven0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Cdeven0>; +impl<'a, REG> Cdeven0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The bus is not allocated"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(CDEVEN0_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Cdeven0::Tristate) } #[doc = "The bus is allocated to ADC0"] #[inline(always)] - pub fn adc0(self) -> &'a mut W { - self.variant(CDEVEN0_A::ADC0) + pub fn adc0(self) -> &'a mut crate::W { + self.variant(Cdeven0::Adc0) } #[doc = "The bus is allocated to ACMP0"] #[inline(always)] - pub fn acmp0(self) -> &'a mut W { - self.variant(CDEVEN0_A::ACMP0) + pub fn acmp0(self) -> &'a mut crate::W { + self.variant(Cdeven0::Acmp0) } #[doc = "The bus is allocated to ACMP1"] #[inline(always)] - pub fn acmp1(self) -> &'a mut W { - self.variant(CDEVEN0_A::ACMP1) + pub fn acmp1(self) -> &'a mut crate::W { + self.variant(Cdeven0::Acmp1) } #[doc = "The bus is allocated to VDAC0 CH0"] #[inline(always)] - pub fn vdac0ch0(self) -> &'a mut W { - self.variant(CDEVEN0_A::VDAC0CH0) + pub fn vdac0ch0(self) -> &'a mut crate::W { + self.variant(Cdeven0::Vdac0ch0) } } -#[doc = "Field `CDEVEN1` reader - CD Bus Even 1"] -pub type CDEVEN1_R = crate::FieldReader; #[doc = "CD Bus Even 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CDEVEN1_A { +pub enum Cdeven1 { #[doc = "0: The bus is not allocated"] - TRISTATE = 0, + Tristate = 0, #[doc = "1: The bus is allocated to ADC0"] - ADC0 = 1, + Adc0 = 1, #[doc = "2: The bus is allocated to ACMP0"] - ACMP0 = 2, + Acmp0 = 2, #[doc = "3: The bus is allocated to ACMP1"] - ACMP1 = 3, + Acmp1 = 3, #[doc = "4: The bus is allocated to VDAC0 CH1"] - VDAC0CH1 = 4, + Vdac0ch1 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CDEVEN1_A) -> Self { + fn from(variant: Cdeven1) -> Self { variant as _ } } -impl CDEVEN1_R { +impl crate::FieldSpec for Cdeven1 { + type Ux = u8; +} +impl crate::IsEnum for Cdeven1 {} +#[doc = "Field `CDEVEN1` reader - CD Bus Even 1"] +pub type Cdeven1R = crate::FieldReader; +impl Cdeven1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CDEVEN1_A::TRISTATE), - 1 => Some(CDEVEN1_A::ADC0), - 2 => Some(CDEVEN1_A::ACMP0), - 3 => Some(CDEVEN1_A::ACMP1), - 4 => Some(CDEVEN1_A::VDAC0CH1), + 0 => Some(Cdeven1::Tristate), + 1 => Some(Cdeven1::Adc0), + 2 => Some(Cdeven1::Acmp0), + 3 => Some(Cdeven1::Acmp1), + 4 => Some(Cdeven1::Vdac0ch1), _ => None, } } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "The bus is not allocated"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == CDEVEN1_A::TRISTATE + *self == Cdeven1::Tristate } - #[doc = "Checks if the value of the field is `ADC0`"] + #[doc = "The bus is allocated to ADC0"] #[inline(always)] pub fn is_adc0(&self) -> bool { - *self == CDEVEN1_A::ADC0 + *self == Cdeven1::Adc0 } - #[doc = "Checks if the value of the field is `ACMP0`"] + #[doc = "The bus is allocated to ACMP0"] #[inline(always)] pub fn is_acmp0(&self) -> bool { - *self == CDEVEN1_A::ACMP0 + *self == Cdeven1::Acmp0 } - #[doc = "Checks if the value of the field is `ACMP1`"] + #[doc = "The bus is allocated to ACMP1"] #[inline(always)] pub fn is_acmp1(&self) -> bool { - *self == CDEVEN1_A::ACMP1 + *self == Cdeven1::Acmp1 } - #[doc = "Checks if the value of the field is `VDAC0CH1`"] + #[doc = "The bus is allocated to VDAC0 CH1"] #[inline(always)] pub fn is_vdac0ch1(&self) -> bool { - *self == CDEVEN1_A::VDAC0CH1 + *self == Cdeven1::Vdac0ch1 } } #[doc = "Field `CDEVEN1` writer - CD Bus Even 1"] -pub type CDEVEN1_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CDBUSALLOC_SPEC, u8, CDEVEN1_A, 4, O>; -impl<'a, const O: u8> CDEVEN1_W<'a, O> { +pub type Cdeven1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Cdeven1>; +impl<'a, REG> Cdeven1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The bus is not allocated"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(CDEVEN1_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Cdeven1::Tristate) } #[doc = "The bus is allocated to ADC0"] #[inline(always)] - pub fn adc0(self) -> &'a mut W { - self.variant(CDEVEN1_A::ADC0) + pub fn adc0(self) -> &'a mut crate::W { + self.variant(Cdeven1::Adc0) } #[doc = "The bus is allocated to ACMP0"] #[inline(always)] - pub fn acmp0(self) -> &'a mut W { - self.variant(CDEVEN1_A::ACMP0) + pub fn acmp0(self) -> &'a mut crate::W { + self.variant(Cdeven1::Acmp0) } #[doc = "The bus is allocated to ACMP1"] #[inline(always)] - pub fn acmp1(self) -> &'a mut W { - self.variant(CDEVEN1_A::ACMP1) + pub fn acmp1(self) -> &'a mut crate::W { + self.variant(Cdeven1::Acmp1) } #[doc = "The bus is allocated to VDAC0 CH1"] #[inline(always)] - pub fn vdac0ch1(self) -> &'a mut W { - self.variant(CDEVEN1_A::VDAC0CH1) + pub fn vdac0ch1(self) -> &'a mut crate::W { + self.variant(Cdeven1::Vdac0ch1) } } -#[doc = "Field `CDODD0` reader - CD Bus Odd 0"] -pub type CDODD0_R = crate::FieldReader; #[doc = "CD Bus Odd 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CDODD0_A { +pub enum Cdodd0 { #[doc = "0: The bus is not allocated"] - TRISTATE = 0, + Tristate = 0, #[doc = "1: The bus is allocated to ADC0"] - ADC0 = 1, + Adc0 = 1, #[doc = "2: The bus is allocated to ACMP0"] - ACMP0 = 2, + Acmp0 = 2, #[doc = "3: The bus is allocated to ACMP1"] - ACMP1 = 3, + Acmp1 = 3, #[doc = "4: The bus is allocated to VDAC0 CH0"] - VDAC0CH0 = 4, + Vdac0ch0 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CDODD0_A) -> Self { + fn from(variant: Cdodd0) -> Self { variant as _ } } -impl CDODD0_R { +impl crate::FieldSpec for Cdodd0 { + type Ux = u8; +} +impl crate::IsEnum for Cdodd0 {} +#[doc = "Field `CDODD0` reader - CD Bus Odd 0"] +pub type Cdodd0R = crate::FieldReader; +impl Cdodd0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CDODD0_A::TRISTATE), - 1 => Some(CDODD0_A::ADC0), - 2 => Some(CDODD0_A::ACMP0), - 3 => Some(CDODD0_A::ACMP1), - 4 => Some(CDODD0_A::VDAC0CH0), + 0 => Some(Cdodd0::Tristate), + 1 => Some(Cdodd0::Adc0), + 2 => Some(Cdodd0::Acmp0), + 3 => Some(Cdodd0::Acmp1), + 4 => Some(Cdodd0::Vdac0ch0), _ => None, } } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "The bus is not allocated"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == CDODD0_A::TRISTATE + *self == Cdodd0::Tristate } - #[doc = "Checks if the value of the field is `ADC0`"] + #[doc = "The bus is allocated to ADC0"] #[inline(always)] pub fn is_adc0(&self) -> bool { - *self == CDODD0_A::ADC0 + *self == Cdodd0::Adc0 } - #[doc = "Checks if the value of the field is `ACMP0`"] + #[doc = "The bus is allocated to ACMP0"] #[inline(always)] pub fn is_acmp0(&self) -> bool { - *self == CDODD0_A::ACMP0 + *self == Cdodd0::Acmp0 } - #[doc = "Checks if the value of the field is `ACMP1`"] + #[doc = "The bus is allocated to ACMP1"] #[inline(always)] pub fn is_acmp1(&self) -> bool { - *self == CDODD0_A::ACMP1 + *self == Cdodd0::Acmp1 } - #[doc = "Checks if the value of the field is `VDAC0CH0`"] + #[doc = "The bus is allocated to VDAC0 CH0"] #[inline(always)] pub fn is_vdac0ch0(&self) -> bool { - *self == CDODD0_A::VDAC0CH0 + *self == Cdodd0::Vdac0ch0 } } #[doc = "Field `CDODD0` writer - CD Bus Odd 0"] -pub type CDODD0_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CDBUSALLOC_SPEC, u8, CDODD0_A, 4, O>; -impl<'a, const O: u8> CDODD0_W<'a, O> { +pub type Cdodd0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Cdodd0>; +impl<'a, REG> Cdodd0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The bus is not allocated"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(CDODD0_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Cdodd0::Tristate) } #[doc = "The bus is allocated to ADC0"] #[inline(always)] - pub fn adc0(self) -> &'a mut W { - self.variant(CDODD0_A::ADC0) + pub fn adc0(self) -> &'a mut crate::W { + self.variant(Cdodd0::Adc0) } #[doc = "The bus is allocated to ACMP0"] #[inline(always)] - pub fn acmp0(self) -> &'a mut W { - self.variant(CDODD0_A::ACMP0) + pub fn acmp0(self) -> &'a mut crate::W { + self.variant(Cdodd0::Acmp0) } #[doc = "The bus is allocated to ACMP1"] #[inline(always)] - pub fn acmp1(self) -> &'a mut W { - self.variant(CDODD0_A::ACMP1) + pub fn acmp1(self) -> &'a mut crate::W { + self.variant(Cdodd0::Acmp1) } #[doc = "The bus is allocated to VDAC0 CH0"] #[inline(always)] - pub fn vdac0ch0(self) -> &'a mut W { - self.variant(CDODD0_A::VDAC0CH0) + pub fn vdac0ch0(self) -> &'a mut crate::W { + self.variant(Cdodd0::Vdac0ch0) } } -#[doc = "Field `CDODD1` reader - CD Bus Odd 1"] -pub type CDODD1_R = crate::FieldReader; #[doc = "CD Bus Odd 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CDODD1_A { +pub enum Cdodd1 { #[doc = "0: The bus is not allocated"] - TRISTATE = 0, + Tristate = 0, #[doc = "1: The bus is allocated to ADC0"] - ADC0 = 1, + Adc0 = 1, #[doc = "2: The bus is allocated to ACMP0"] - ACMP0 = 2, + Acmp0 = 2, #[doc = "3: The bus is allocated to ACMP1"] - ACMP1 = 3, + Acmp1 = 3, #[doc = "4: The bus is allocated to VDAC0 CH1"] - VDAC0CH1 = 4, + Vdac0ch1 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CDODD1_A) -> Self { + fn from(variant: Cdodd1) -> Self { variant as _ } } -impl CDODD1_R { +impl crate::FieldSpec for Cdodd1 { + type Ux = u8; +} +impl crate::IsEnum for Cdodd1 {} +#[doc = "Field `CDODD1` reader - CD Bus Odd 1"] +pub type Cdodd1R = crate::FieldReader; +impl Cdodd1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CDODD1_A::TRISTATE), - 1 => Some(CDODD1_A::ADC0), - 2 => Some(CDODD1_A::ACMP0), - 3 => Some(CDODD1_A::ACMP1), - 4 => Some(CDODD1_A::VDAC0CH1), + 0 => Some(Cdodd1::Tristate), + 1 => Some(Cdodd1::Adc0), + 2 => Some(Cdodd1::Acmp0), + 3 => Some(Cdodd1::Acmp1), + 4 => Some(Cdodd1::Vdac0ch1), _ => None, } } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "The bus is not allocated"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == CDODD1_A::TRISTATE + *self == Cdodd1::Tristate } - #[doc = "Checks if the value of the field is `ADC0`"] + #[doc = "The bus is allocated to ADC0"] #[inline(always)] pub fn is_adc0(&self) -> bool { - *self == CDODD1_A::ADC0 + *self == Cdodd1::Adc0 } - #[doc = "Checks if the value of the field is `ACMP0`"] + #[doc = "The bus is allocated to ACMP0"] #[inline(always)] pub fn is_acmp0(&self) -> bool { - *self == CDODD1_A::ACMP0 + *self == Cdodd1::Acmp0 } - #[doc = "Checks if the value of the field is `ACMP1`"] + #[doc = "The bus is allocated to ACMP1"] #[inline(always)] pub fn is_acmp1(&self) -> bool { - *self == CDODD1_A::ACMP1 + *self == Cdodd1::Acmp1 } - #[doc = "Checks if the value of the field is `VDAC0CH1`"] + #[doc = "The bus is allocated to VDAC0 CH1"] #[inline(always)] pub fn is_vdac0ch1(&self) -> bool { - *self == CDODD1_A::VDAC0CH1 + *self == Cdodd1::Vdac0ch1 } } #[doc = "Field `CDODD1` writer - CD Bus Odd 1"] -pub type CDODD1_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CDBUSALLOC_SPEC, u8, CDODD1_A, 4, O>; -impl<'a, const O: u8> CDODD1_W<'a, O> { +pub type Cdodd1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Cdodd1>; +impl<'a, REG> Cdodd1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The bus is not allocated"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(CDODD1_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Cdodd1::Tristate) } #[doc = "The bus is allocated to ADC0"] #[inline(always)] - pub fn adc0(self) -> &'a mut W { - self.variant(CDODD1_A::ADC0) + pub fn adc0(self) -> &'a mut crate::W { + self.variant(Cdodd1::Adc0) } #[doc = "The bus is allocated to ACMP0"] #[inline(always)] - pub fn acmp0(self) -> &'a mut W { - self.variant(CDODD1_A::ACMP0) + pub fn acmp0(self) -> &'a mut crate::W { + self.variant(Cdodd1::Acmp0) } #[doc = "The bus is allocated to ACMP1"] #[inline(always)] - pub fn acmp1(self) -> &'a mut W { - self.variant(CDODD1_A::ACMP1) + pub fn acmp1(self) -> &'a mut crate::W { + self.variant(Cdodd1::Acmp1) } #[doc = "The bus is allocated to VDAC0 CH1"] #[inline(always)] - pub fn vdac0ch1(self) -> &'a mut W { - self.variant(CDODD1_A::VDAC0CH1) + pub fn vdac0ch1(self) -> &'a mut crate::W { + self.variant(Cdodd1::Vdac0ch1) } } impl R { #[doc = "Bits 0:3 - CD Bus Even 0"] #[inline(always)] - pub fn cdeven0(&self) -> CDEVEN0_R { - CDEVEN0_R::new((self.bits & 0x0f) as u8) + pub fn cdeven0(&self) -> Cdeven0R { + Cdeven0R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:11 - CD Bus Even 1"] #[inline(always)] - pub fn cdeven1(&self) -> CDEVEN1_R { - CDEVEN1_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn cdeven1(&self) -> Cdeven1R { + Cdeven1R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 16:19 - CD Bus Odd 0"] #[inline(always)] - pub fn cdodd0(&self) -> CDODD0_R { - CDODD0_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn cdodd0(&self) -> Cdodd0R { + Cdodd0R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - CD Bus Odd 1"] #[inline(always)] - pub fn cdodd1(&self) -> CDODD1_R { - CDODD1_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn cdodd1(&self) -> Cdodd1R { + Cdodd1R::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - CD Bus Even 0"] #[inline(always)] #[must_use] - pub fn cdeven0(&mut self) -> CDEVEN0_W<0> { - CDEVEN0_W::new(self) + pub fn cdeven0(&mut self) -> Cdeven0W { + Cdeven0W::new(self, 0) } #[doc = "Bits 8:11 - CD Bus Even 1"] #[inline(always)] #[must_use] - pub fn cdeven1(&mut self) -> CDEVEN1_W<8> { - CDEVEN1_W::new(self) + pub fn cdeven1(&mut self) -> Cdeven1W { + Cdeven1W::new(self, 8) } #[doc = "Bits 16:19 - CD Bus Odd 0"] #[inline(always)] #[must_use] - pub fn cdodd0(&mut self) -> CDODD0_W<16> { - CDODD0_W::new(self) + pub fn cdodd0(&mut self) -> Cdodd0W { + Cdodd0W::new(self, 16) } #[doc = "Bits 24:27 - CD Bus Odd 1"] #[inline(always)] #[must_use] - pub fn cdodd1(&mut self) -> CDODD1_W<24> { - CDODD1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cdodd1(&mut self) -> Cdodd1W { + Cdodd1W::new(self, 24) } } -#[doc = "CD Bus allocation\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cdbusalloc](index.html) module"] -pub struct CDBUSALLOC_SPEC; -impl crate::RegisterSpec for CDBUSALLOC_SPEC { +#[doc = "CD Bus allocation\n\nYou can [`read`](crate::Reg::read) this register and get [`cdbusalloc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cdbusalloc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CdbusallocSpec; +impl crate::RegisterSpec for CdbusallocSpec { type Ux = u32; } -#[doc = "`read()` method returns [cdbusalloc::R](R) reader structure"] -impl crate::Readable for CDBUSALLOC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cdbusalloc::W](W) writer structure"] -impl crate::Writable for CDBUSALLOC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cdbusalloc::R`](R) reader structure"] +impl crate::Readable for CdbusallocSpec {} +#[doc = "`write(|w| ..)` method takes [`cdbusalloc::W`](W) writer structure"] +impl crate::Writable for CdbusallocSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CDBUSALLOC to value 0"] -impl crate::Resettable for CDBUSALLOC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CdbusallocSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/cmu_clkin0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/cmu_clkin0route.rs index 2a5875c..25125f6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/cmu_clkin0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/cmu_clkin0route.rs @@ -1,95 +1,55 @@ #[doc = "Register `CMU_CLKIN0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CMU_CLKIN0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CLKIN0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CLKIN0 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CMU_CLKIN0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CLKIN0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CLKIN0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CMU_CLKIN0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CLKIN0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CLKIN0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CLKIN0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CLKIN0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CLKIN0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmu_clkin0route](index.html) module"] -pub struct CMU_CLKIN0ROUTE_SPEC; -impl crate::RegisterSpec for CMU_CLKIN0ROUTE_SPEC { +#[doc = "CLKIN0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`cmu_clkin0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmu_clkin0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmuClkin0routeSpec; +impl crate::RegisterSpec for CmuClkin0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [cmu_clkin0route::R](R) reader structure"] -impl crate::Readable for CMU_CLKIN0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cmu_clkin0route::W](W) writer structure"] -impl crate::Writable for CMU_CLKIN0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cmu_clkin0route::R`](R) reader structure"] +impl crate::Readable for CmuClkin0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`cmu_clkin0route::W`](W) writer structure"] +impl crate::Writable for CmuClkin0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMU_CLKIN0ROUTE to value 0"] -impl crate::Resettable for CMU_CLKIN0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmuClkin0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/cmu_clkout0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/cmu_clkout0route.rs index c89f007..3e23c18 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/cmu_clkout0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/cmu_clkout0route.rs @@ -1,95 +1,55 @@ #[doc = "Register `CMU_CLKOUT0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CMU_CLKOUT0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CLKOUT0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CLKOUT0 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CMU_CLKOUT0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CLKOUT0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CLKOUT0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CMU_CLKOUT0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CLKOUT0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CLKOUT0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CLKOUT0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CLKOUT0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CLKOUT0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmu_clkout0route](index.html) module"] -pub struct CMU_CLKOUT0ROUTE_SPEC; -impl crate::RegisterSpec for CMU_CLKOUT0ROUTE_SPEC { +#[doc = "CLKOUT0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`cmu_clkout0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmu_clkout0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmuClkout0routeSpec; +impl crate::RegisterSpec for CmuClkout0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [cmu_clkout0route::R](R) reader structure"] -impl crate::Readable for CMU_CLKOUT0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cmu_clkout0route::W](W) writer structure"] -impl crate::Writable for CMU_CLKOUT0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cmu_clkout0route::R`](R) reader structure"] +impl crate::Readable for CmuClkout0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`cmu_clkout0route::W`](W) writer structure"] +impl crate::Writable for CmuClkout0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMU_CLKOUT0ROUTE to value 0"] -impl crate::Resettable for CMU_CLKOUT0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmuClkout0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/cmu_clkout1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/cmu_clkout1route.rs index 21f3a2d..0f1684f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/cmu_clkout1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/cmu_clkout1route.rs @@ -1,95 +1,55 @@ #[doc = "Register `CMU_CLKOUT1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CMU_CLKOUT1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CLKOUT1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CLKOUT1 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CMU_CLKOUT1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CLKOUT1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CLKOUT1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CMU_CLKOUT1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CLKOUT1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CLKOUT1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CLKOUT1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CLKOUT1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CLKOUT1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmu_clkout1route](index.html) module"] -pub struct CMU_CLKOUT1ROUTE_SPEC; -impl crate::RegisterSpec for CMU_CLKOUT1ROUTE_SPEC { +#[doc = "CLKOUT1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`cmu_clkout1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmu_clkout1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmuClkout1routeSpec; +impl crate::RegisterSpec for CmuClkout1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [cmu_clkout1route::R](R) reader structure"] -impl crate::Readable for CMU_CLKOUT1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cmu_clkout1route::W](W) writer structure"] -impl crate::Writable for CMU_CLKOUT1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cmu_clkout1route::R`](R) reader structure"] +impl crate::Readable for CmuClkout1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`cmu_clkout1route::W`](W) writer structure"] +impl crate::Writable for CmuClkout1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMU_CLKOUT1ROUTE to value 0"] -impl crate::Resettable for CMU_CLKOUT1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmuClkout1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/cmu_clkout2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/cmu_clkout2route.rs index 68fca58..356ab69 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/cmu_clkout2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/cmu_clkout2route.rs @@ -1,95 +1,55 @@ #[doc = "Register `CMU_CLKOUT2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CMU_CLKOUT2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CLKOUT2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CLKOUT2 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CMU_CLKOUT2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CLKOUT2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CLKOUT2 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CMU_CLKOUT2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CLKOUT2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CLKOUT2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CLKOUT2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CLKOUT2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CLKOUT2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmu_clkout2route](index.html) module"] -pub struct CMU_CLKOUT2ROUTE_SPEC; -impl crate::RegisterSpec for CMU_CLKOUT2ROUTE_SPEC { +#[doc = "CLKOUT2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`cmu_clkout2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmu_clkout2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmuClkout2routeSpec; +impl crate::RegisterSpec for CmuClkout2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [cmu_clkout2route::R](R) reader structure"] -impl crate::Readable for CMU_CLKOUT2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cmu_clkout2route::W](W) writer structure"] -impl crate::Writable for CMU_CLKOUT2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cmu_clkout2route::R`](R) reader structure"] +impl crate::Readable for CmuClkout2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`cmu_clkout2route::W`](W) writer structure"] +impl crate::Writable for CmuClkout2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMU_CLKOUT2ROUTE to value 0"] -impl crate::Resettable for CMU_CLKOUT2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmuClkout2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/cmu_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/cmu_routeen.rs index 0cbbb1e..b420e3b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/cmu_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/cmu_routeen.rs @@ -1,110 +1,70 @@ #[doc = "Register `CMU_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CMU_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CLKOUT0PEN` reader - CLKOUT0 pin enable control bit"] -pub type CLKOUT0PEN_R = crate::BitReader; +pub type Clkout0penR = crate::BitReader; #[doc = "Field `CLKOUT0PEN` writer - CLKOUT0 pin enable control bit"] -pub type CLKOUT0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMU_ROUTEEN_SPEC, bool, O>; +pub type Clkout0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLKOUT1PEN` reader - CLKOUT1 pin enable control bit"] -pub type CLKOUT1PEN_R = crate::BitReader; +pub type Clkout1penR = crate::BitReader; #[doc = "Field `CLKOUT1PEN` writer - CLKOUT1 pin enable control bit"] -pub type CLKOUT1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMU_ROUTEEN_SPEC, bool, O>; +pub type Clkout1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLKOUT2PEN` reader - CLKOUT2 pin enable control bit"] -pub type CLKOUT2PEN_R = crate::BitReader; +pub type Clkout2penR = crate::BitReader; #[doc = "Field `CLKOUT2PEN` writer - CLKOUT2 pin enable control bit"] -pub type CLKOUT2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMU_ROUTEEN_SPEC, bool, O>; +pub type Clkout2penW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CLKOUT0 pin enable control bit"] #[inline(always)] - pub fn clkout0pen(&self) -> CLKOUT0PEN_R { - CLKOUT0PEN_R::new((self.bits & 1) != 0) + pub fn clkout0pen(&self) -> Clkout0penR { + Clkout0penR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CLKOUT1 pin enable control bit"] #[inline(always)] - pub fn clkout1pen(&self) -> CLKOUT1PEN_R { - CLKOUT1PEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn clkout1pen(&self) -> Clkout1penR { + Clkout1penR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CLKOUT2 pin enable control bit"] #[inline(always)] - pub fn clkout2pen(&self) -> CLKOUT2PEN_R { - CLKOUT2PEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn clkout2pen(&self) -> Clkout2penR { + Clkout2penR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - CLKOUT0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn clkout0pen(&mut self) -> CLKOUT0PEN_W<0> { - CLKOUT0PEN_W::new(self) + pub fn clkout0pen(&mut self) -> Clkout0penW { + Clkout0penW::new(self, 0) } #[doc = "Bit 1 - CLKOUT1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn clkout1pen(&mut self) -> CLKOUT1PEN_W<1> { - CLKOUT1PEN_W::new(self) + pub fn clkout1pen(&mut self) -> Clkout1penW { + Clkout1penW::new(self, 1) } #[doc = "Bit 2 - CLKOUT2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn clkout2pen(&mut self) -> CLKOUT2PEN_W<2> { - CLKOUT2PEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clkout2pen(&mut self) -> Clkout2penW { + Clkout2penW::new(self, 2) } } -#[doc = "CMU pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmu_routeen](index.html) module"] -pub struct CMU_ROUTEEN_SPEC; -impl crate::RegisterSpec for CMU_ROUTEEN_SPEC { +#[doc = "CMU pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`cmu_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmu_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmuRouteenSpec; +impl crate::RegisterSpec for CmuRouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [cmu_routeen::R](R) reader structure"] -impl crate::Readable for CMU_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cmu_routeen::W](W) writer structure"] -impl crate::Writable for CMU_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cmu_routeen::R`](R) reader structure"] +impl crate::Readable for CmuRouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`cmu_routeen::W`](W) writer structure"] +impl crate::Writable for CmuRouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMU_ROUTEEN to value 0"] -impl crate::Resettable for CMU_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmuRouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/dbgroutepen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/dbgroutepen.rs index ca4af2b..fc84c7b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/dbgroutepen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/dbgroutepen.rs @@ -1,125 +1,85 @@ #[doc = "Register `DBGROUTEPEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DBGROUTEPEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SWCLKTCKPEN` reader - Route Pin Enable"] -pub type SWCLKTCKPEN_R = crate::BitReader; +pub type SwclktckpenR = crate::BitReader; #[doc = "Field `SWCLKTCKPEN` writer - Route Pin Enable"] -pub type SWCLKTCKPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DBGROUTEPEN_SPEC, bool, O>; +pub type SwclktckpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SWDIOTMSPEN` reader - Route Location 0"] -pub type SWDIOTMSPEN_R = crate::BitReader; +pub type SwdiotmspenR = crate::BitReader; #[doc = "Field `SWDIOTMSPEN` writer - Route Location 0"] -pub type SWDIOTMSPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DBGROUTEPEN_SPEC, bool, O>; +pub type SwdiotmspenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TDOPEN` reader - JTAG Test Debug Output Pin Enable"] -pub type TDOPEN_R = crate::BitReader; +pub type TdopenR = crate::BitReader; #[doc = "Field `TDOPEN` writer - JTAG Test Debug Output Pin Enable"] -pub type TDOPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DBGROUTEPEN_SPEC, bool, O>; +pub type TdopenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TDIPEN` reader - JTAG Test Debug Input Pin Enable"] -pub type TDIPEN_R = crate::BitReader; +pub type TdipenR = crate::BitReader; #[doc = "Field `TDIPEN` writer - JTAG Test Debug Input Pin Enable"] -pub type TDIPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DBGROUTEPEN_SPEC, bool, O>; +pub type TdipenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Route Pin Enable"] #[inline(always)] - pub fn swclktckpen(&self) -> SWCLKTCKPEN_R { - SWCLKTCKPEN_R::new((self.bits & 1) != 0) + pub fn swclktckpen(&self) -> SwclktckpenR { + SwclktckpenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Route Location 0"] #[inline(always)] - pub fn swdiotmspen(&self) -> SWDIOTMSPEN_R { - SWDIOTMSPEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn swdiotmspen(&self) -> SwdiotmspenR { + SwdiotmspenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - JTAG Test Debug Output Pin Enable"] #[inline(always)] - pub fn tdopen(&self) -> TDOPEN_R { - TDOPEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn tdopen(&self) -> TdopenR { + TdopenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - JTAG Test Debug Input Pin Enable"] #[inline(always)] - pub fn tdipen(&self) -> TDIPEN_R { - TDIPEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn tdipen(&self) -> TdipenR { + TdipenR::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Route Pin Enable"] #[inline(always)] #[must_use] - pub fn swclktckpen(&mut self) -> SWCLKTCKPEN_W<0> { - SWCLKTCKPEN_W::new(self) + pub fn swclktckpen(&mut self) -> SwclktckpenW { + SwclktckpenW::new(self, 0) } #[doc = "Bit 1 - Route Location 0"] #[inline(always)] #[must_use] - pub fn swdiotmspen(&mut self) -> SWDIOTMSPEN_W<1> { - SWDIOTMSPEN_W::new(self) + pub fn swdiotmspen(&mut self) -> SwdiotmspenW { + SwdiotmspenW::new(self, 1) } #[doc = "Bit 2 - JTAG Test Debug Output Pin Enable"] #[inline(always)] #[must_use] - pub fn tdopen(&mut self) -> TDOPEN_W<2> { - TDOPEN_W::new(self) + pub fn tdopen(&mut self) -> TdopenW { + TdopenW::new(self, 2) } #[doc = "Bit 3 - JTAG Test Debug Input Pin Enable"] #[inline(always)] #[must_use] - pub fn tdipen(&mut self) -> TDIPEN_W<3> { - TDIPEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn tdipen(&mut self) -> TdipenW { + TdipenW::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dbgroutepen](index.html) module"] -pub struct DBGROUTEPEN_SPEC; -impl crate::RegisterSpec for DBGROUTEPEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dbgroutepen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dbgroutepen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DbgroutepenSpec; +impl crate::RegisterSpec for DbgroutepenSpec { type Ux = u32; } -#[doc = "`read()` method returns [dbgroutepen::R](R) reader structure"] -impl crate::Readable for DBGROUTEPEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dbgroutepen::W](W) writer structure"] -impl crate::Writable for DBGROUTEPEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dbgroutepen::R`](R) reader structure"] +impl crate::Readable for DbgroutepenSpec {} +#[doc = "`write(|w| ..)` method takes [`dbgroutepen::W`](W) writer structure"] +impl crate::Writable for DbgroutepenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DBGROUTEPEN to value 0x0f"] -impl crate::Resettable for DBGROUTEPEN_SPEC { - const RESET_VALUE: Self::Ux = 0x0f; +impl crate::Resettable for DbgroutepenSpec { + const RESET_VALUE: u32 = 0x0f; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/em4wuen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/em4wuen.rs index e9600de..88641ca 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/em4wuen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/em4wuen.rs @@ -1,80 +1,40 @@ #[doc = "Register `EM4WUEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EM4WUEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EM4WUEN` reader - EM4 wake up enable"] -pub type EM4WUEN_R = crate::FieldReader; +pub type Em4wuenR = crate::FieldReader; #[doc = "Field `EM4WUEN` writer - EM4 wake up enable"] -pub type EM4WUEN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EM4WUEN_SPEC, u16, u16, 12, O>; +pub type Em4wuenW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 16:27 - EM4 wake up enable"] #[inline(always)] - pub fn em4wuen(&self) -> EM4WUEN_R { - EM4WUEN_R::new(((self.bits >> 16) & 0x0fff) as u16) + pub fn em4wuen(&self) -> Em4wuenR { + Em4wuenR::new(((self.bits >> 16) & 0x0fff) as u16) } } impl W { #[doc = "Bits 16:27 - EM4 wake up enable"] #[inline(always)] #[must_use] - pub fn em4wuen(&mut self) -> EM4WUEN_W<16> { - EM4WUEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn em4wuen(&mut self) -> Em4wuenW { + Em4wuenW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [em4wuen](index.html) module"] -pub struct EM4WUEN_SPEC; -impl crate::RegisterSpec for EM4WUEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em4wuen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em4wuen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Em4wuenSpec; +impl crate::RegisterSpec for Em4wuenSpec { type Ux = u32; } -#[doc = "`read()` method returns [em4wuen::R](R) reader structure"] -impl crate::Readable for EM4WUEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [em4wuen::W](W) writer structure"] -impl crate::Writable for EM4WUEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`em4wuen::R`](R) reader structure"] +impl crate::Readable for Em4wuenSpec {} +#[doc = "`write(|w| ..)` method takes [`em4wuen::W`](W) writer structure"] +impl crate::Writable for Em4wuenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EM4WUEN to value 0"] -impl crate::Resettable for EM4WUEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Em4wuenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/em4wupol.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/em4wupol.rs index a798d3c..61a0de8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/em4wupol.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/em4wupol.rs @@ -1,80 +1,40 @@ #[doc = "Register `EM4WUPOL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EM4WUPOL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EM4WUPOL` reader - EM4 Wake-Up Polarity"] -pub type EM4WUPOL_R = crate::FieldReader; +pub type Em4wupolR = crate::FieldReader; #[doc = "Field `EM4WUPOL` writer - EM4 Wake-Up Polarity"] -pub type EM4WUPOL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EM4WUPOL_SPEC, u16, u16, 12, O>; +pub type Em4wupolW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 16:27 - EM4 Wake-Up Polarity"] #[inline(always)] - pub fn em4wupol(&self) -> EM4WUPOL_R { - EM4WUPOL_R::new(((self.bits >> 16) & 0x0fff) as u16) + pub fn em4wupol(&self) -> Em4wupolR { + Em4wupolR::new(((self.bits >> 16) & 0x0fff) as u16) } } impl W { #[doc = "Bits 16:27 - EM4 Wake-Up Polarity"] #[inline(always)] #[must_use] - pub fn em4wupol(&mut self) -> EM4WUPOL_W<16> { - EM4WUPOL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn em4wupol(&mut self) -> Em4wupolW { + Em4wupolW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [em4wupol](index.html) module"] -pub struct EM4WUPOL_SPEC; -impl crate::RegisterSpec for EM4WUPOL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`em4wupol::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`em4wupol::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Em4wupolSpec; +impl crate::RegisterSpec for Em4wupolSpec { type Ux = u32; } -#[doc = "`read()` method returns [em4wupol::R](R) reader structure"] -impl crate::Readable for EM4WUPOL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [em4wupol::W](W) writer structure"] -impl crate::Writable for EM4WUPOL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`em4wupol::R`](R) reader structure"] +impl crate::Readable for Em4wupolSpec {} +#[doc = "`write(|w| ..)` method takes [`em4wupol::W`](W) writer structure"] +impl crate::Writable for Em4wupolSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EM4WUPOL to value 0"] -impl crate::Resettable for EM4WUPOL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Em4wupolSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_csroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_csroute.rs index 5e1132b..0e4059e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_csroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_csroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART0_CSROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART0_CSROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CS port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CS port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART0_CSROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CS pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CS pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART0_CSROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CS port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CS pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CS port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CS pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CS port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart0_csroute](index.html) module"] -pub struct EUSART0_CSROUTE_SPEC; -impl crate::RegisterSpec for EUSART0_CSROUTE_SPEC { +#[doc = "CS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_csroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_csroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart0CsrouteSpec; +impl crate::RegisterSpec for Eusart0CsrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart0_csroute::R](R) reader structure"] -impl crate::Readable for EUSART0_CSROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart0_csroute::W](W) writer structure"] -impl crate::Writable for EUSART0_CSROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart0_csroute::R`](R) reader structure"] +impl crate::Readable for Eusart0CsrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart0_csroute::W`](W) writer structure"] +impl crate::Writable for Eusart0CsrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART0_CSROUTE to value 0"] -impl crate::Resettable for EUSART0_CSROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart0CsrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_ctsroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_ctsroute.rs index fbb9f5f..5231628 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_ctsroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_ctsroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART0_CTSROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART0_CTSROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CTS port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CTS port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART0_CTSROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CTS pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CTS pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART0_CTSROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CTS port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CTS pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CTS port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CTS pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CTS port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart0_ctsroute](index.html) module"] -pub struct EUSART0_CTSROUTE_SPEC; -impl crate::RegisterSpec for EUSART0_CTSROUTE_SPEC { +#[doc = "CTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_ctsroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_ctsroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart0CtsrouteSpec; +impl crate::RegisterSpec for Eusart0CtsrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart0_ctsroute::R](R) reader structure"] -impl crate::Readable for EUSART0_CTSROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart0_ctsroute::W](W) writer structure"] -impl crate::Writable for EUSART0_CTSROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart0_ctsroute::R`](R) reader structure"] +impl crate::Readable for Eusart0CtsrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart0_ctsroute::W`](W) writer structure"] +impl crate::Writable for Eusart0CtsrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART0_CTSROUTE to value 0"] -impl crate::Resettable for EUSART0_CTSROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart0CtsrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_routeen.rs index 78e21be..d4ceb7b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_routeen.rs @@ -1,140 +1,100 @@ #[doc = "Register `EUSART0_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART0_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CSPEN` reader - CS pin enable control bit"] -pub type CSPEN_R = crate::BitReader; +pub type CspenR = crate::BitReader; #[doc = "Field `CSPEN` writer - CS pin enable control bit"] -pub type CSPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART0_ROUTEEN_SPEC, bool, O>; +pub type CspenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTSPEN` reader - RTS pin enable control bit"] -pub type RTSPEN_R = crate::BitReader; +pub type RtspenR = crate::BitReader; #[doc = "Field `RTSPEN` writer - RTS pin enable control bit"] -pub type RTSPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART0_ROUTEEN_SPEC, bool, O>; +pub type RtspenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXPEN` reader - RX pin enable control bit"] -pub type RXPEN_R = crate::BitReader; +pub type RxpenR = crate::BitReader; #[doc = "Field `RXPEN` writer - RX pin enable control bit"] -pub type RXPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART0_ROUTEEN_SPEC, bool, O>; +pub type RxpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCLKPEN` reader - SCLK pin enable control bit"] -pub type SCLKPEN_R = crate::BitReader; +pub type SclkpenR = crate::BitReader; #[doc = "Field `SCLKPEN` writer - SCLK pin enable control bit"] -pub type SCLKPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART0_ROUTEEN_SPEC, bool, O>; +pub type SclkpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXPEN` reader - TX pin enable control bit"] -pub type TXPEN_R = crate::BitReader; +pub type TxpenR = crate::BitReader; #[doc = "Field `TXPEN` writer - TX pin enable control bit"] -pub type TXPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART0_ROUTEEN_SPEC, bool, O>; +pub type TxpenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CS pin enable control bit"] #[inline(always)] - pub fn cspen(&self) -> CSPEN_R { - CSPEN_R::new((self.bits & 1) != 0) + pub fn cspen(&self) -> CspenR { + CspenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - RTS pin enable control bit"] #[inline(always)] - pub fn rtspen(&self) -> RTSPEN_R { - RTSPEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn rtspen(&self) -> RtspenR { + RtspenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RX pin enable control bit"] #[inline(always)] - pub fn rxpen(&self) -> RXPEN_R { - RXPEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxpen(&self) -> RxpenR { + RxpenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - SCLK pin enable control bit"] #[inline(always)] - pub fn sclkpen(&self) -> SCLKPEN_R { - SCLKPEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn sclkpen(&self) -> SclkpenR { + SclkpenR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - TX pin enable control bit"] #[inline(always)] - pub fn txpen(&self) -> TXPEN_R { - TXPEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn txpen(&self) -> TxpenR { + TxpenR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - CS pin enable control bit"] #[inline(always)] #[must_use] - pub fn cspen(&mut self) -> CSPEN_W<0> { - CSPEN_W::new(self) + pub fn cspen(&mut self) -> CspenW { + CspenW::new(self, 0) } #[doc = "Bit 1 - RTS pin enable control bit"] #[inline(always)] #[must_use] - pub fn rtspen(&mut self) -> RTSPEN_W<1> { - RTSPEN_W::new(self) + pub fn rtspen(&mut self) -> RtspenW { + RtspenW::new(self, 1) } #[doc = "Bit 2 - RX pin enable control bit"] #[inline(always)] #[must_use] - pub fn rxpen(&mut self) -> RXPEN_W<2> { - RXPEN_W::new(self) + pub fn rxpen(&mut self) -> RxpenW { + RxpenW::new(self, 2) } #[doc = "Bit 3 - SCLK pin enable control bit"] #[inline(always)] #[must_use] - pub fn sclkpen(&mut self) -> SCLKPEN_W<3> { - SCLKPEN_W::new(self) + pub fn sclkpen(&mut self) -> SclkpenW { + SclkpenW::new(self, 3) } #[doc = "Bit 4 - TX pin enable control bit"] #[inline(always)] #[must_use] - pub fn txpen(&mut self) -> TXPEN_W<4> { - TXPEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txpen(&mut self) -> TxpenW { + TxpenW::new(self, 4) } } -#[doc = "EUSART0 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart0_routeen](index.html) module"] -pub struct EUSART0_ROUTEEN_SPEC; -impl crate::RegisterSpec for EUSART0_ROUTEEN_SPEC { +#[doc = "EUSART0 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart0RouteenSpec; +impl crate::RegisterSpec for Eusart0RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart0_routeen::R](R) reader structure"] -impl crate::Readable for EUSART0_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart0_routeen::W](W) writer structure"] -impl crate::Writable for EUSART0_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart0_routeen::R`](R) reader structure"] +impl crate::Readable for Eusart0RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart0_routeen::W`](W) writer structure"] +impl crate::Writable for Eusart0RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART0_ROUTEEN to value 0"] -impl crate::Resettable for EUSART0_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart0RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_rtsroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_rtsroute.rs index f86a484..f7b09f9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_rtsroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_rtsroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART0_RTSROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART0_RTSROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - RTS port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - RTS port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART0_RTSROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - RTS pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - RTS pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART0_RTSROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - RTS port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - RTS pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - RTS port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - RTS pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "RTS port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart0_rtsroute](index.html) module"] -pub struct EUSART0_RTSROUTE_SPEC; -impl crate::RegisterSpec for EUSART0_RTSROUTE_SPEC { +#[doc = "RTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_rtsroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_rtsroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart0RtsrouteSpec; +impl crate::RegisterSpec for Eusart0RtsrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart0_rtsroute::R](R) reader structure"] -impl crate::Readable for EUSART0_RTSROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart0_rtsroute::W](W) writer structure"] -impl crate::Writable for EUSART0_RTSROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart0_rtsroute::R`](R) reader structure"] +impl crate::Readable for Eusart0RtsrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart0_rtsroute::W`](W) writer structure"] +impl crate::Writable for Eusart0RtsrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART0_RTSROUTE to value 0"] -impl crate::Resettable for EUSART0_RTSROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart0RtsrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_rxroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_rxroute.rs index 5c935ab..34f4e8d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_rxroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_rxroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART0_RXROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART0_RXROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - RX port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - RX port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART0_RXROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - RX pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - RX pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART0_RXROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - RX port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - RX pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - RX port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - RX pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "RX port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart0_rxroute](index.html) module"] -pub struct EUSART0_RXROUTE_SPEC; -impl crate::RegisterSpec for EUSART0_RXROUTE_SPEC { +#[doc = "RX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_rxroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_rxroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart0RxrouteSpec; +impl crate::RegisterSpec for Eusart0RxrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart0_rxroute::R](R) reader structure"] -impl crate::Readable for EUSART0_RXROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart0_rxroute::W](W) writer structure"] -impl crate::Writable for EUSART0_RXROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart0_rxroute::R`](R) reader structure"] +impl crate::Readable for Eusart0RxrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart0_rxroute::W`](W) writer structure"] +impl crate::Writable for Eusart0RxrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART0_RXROUTE to value 0"] -impl crate::Resettable for EUSART0_RXROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart0RxrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_sclkroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_sclkroute.rs index c0c6839..9423503 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_sclkroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_sclkroute.rs @@ -1,96 +1,55 @@ #[doc = "Register `EUSART0_SCLKROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART0_SCLKROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - SCLK port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - SCLK port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EUSART0_SCLKROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - SCLK pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - SCLK pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART0_SCLKROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - SCLK port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - SCLK pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - SCLK port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - SCLK pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "SCLK port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart0_sclkroute](index.html) module"] -pub struct EUSART0_SCLKROUTE_SPEC; -impl crate::RegisterSpec for EUSART0_SCLKROUTE_SPEC { +#[doc = "SCLK port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_sclkroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_sclkroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart0SclkrouteSpec; +impl crate::RegisterSpec for Eusart0SclkrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart0_sclkroute::R](R) reader structure"] -impl crate::Readable for EUSART0_SCLKROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart0_sclkroute::W](W) writer structure"] -impl crate::Writable for EUSART0_SCLKROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart0_sclkroute::R`](R) reader structure"] +impl crate::Readable for Eusart0SclkrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart0_sclkroute::W`](W) writer structure"] +impl crate::Writable for Eusart0SclkrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART0_SCLKROUTE to value 0"] -impl crate::Resettable for EUSART0_SCLKROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart0SclkrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_txroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_txroute.rs index fbc47d1..31dad97 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_txroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart0_txroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART0_TXROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART0_TXROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - TX port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - TX port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART0_TXROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - TX pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - TX pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART0_TXROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - TX port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - TX pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - TX port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - TX pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "TX port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart0_txroute](index.html) module"] -pub struct EUSART0_TXROUTE_SPEC; -impl crate::RegisterSpec for EUSART0_TXROUTE_SPEC { +#[doc = "TX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart0_txroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart0_txroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart0TxrouteSpec; +impl crate::RegisterSpec for Eusart0TxrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart0_txroute::R](R) reader structure"] -impl crate::Readable for EUSART0_TXROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart0_txroute::W](W) writer structure"] -impl crate::Writable for EUSART0_TXROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart0_txroute::R`](R) reader structure"] +impl crate::Readable for Eusart0TxrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart0_txroute::W`](W) writer structure"] +impl crate::Writable for Eusart0TxrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART0_TXROUTE to value 0"] -impl crate::Resettable for EUSART0_TXROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart0TxrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_csroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_csroute.rs index 2d6b811..f1bca97 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_csroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_csroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART1_CSROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART1_CSROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CS port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CS port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART1_CSROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CS pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CS pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART1_CSROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CS port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CS pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CS port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CS pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CS port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart1_csroute](index.html) module"] -pub struct EUSART1_CSROUTE_SPEC; -impl crate::RegisterSpec for EUSART1_CSROUTE_SPEC { +#[doc = "CS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_csroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_csroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart1CsrouteSpec; +impl crate::RegisterSpec for Eusart1CsrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart1_csroute::R](R) reader structure"] -impl crate::Readable for EUSART1_CSROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart1_csroute::W](W) writer structure"] -impl crate::Writable for EUSART1_CSROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart1_csroute::R`](R) reader structure"] +impl crate::Readable for Eusart1CsrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart1_csroute::W`](W) writer structure"] +impl crate::Writable for Eusart1CsrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART1_CSROUTE to value 0"] -impl crate::Resettable for EUSART1_CSROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart1CsrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_ctsroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_ctsroute.rs index b5e18cd..c736c7a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_ctsroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_ctsroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART1_CTSROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART1_CTSROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CTS port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CTS port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART1_CTSROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CTS pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CTS pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART1_CTSROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CTS port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CTS pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CTS port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CTS pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CTS port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart1_ctsroute](index.html) module"] -pub struct EUSART1_CTSROUTE_SPEC; -impl crate::RegisterSpec for EUSART1_CTSROUTE_SPEC { +#[doc = "CTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_ctsroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_ctsroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart1CtsrouteSpec; +impl crate::RegisterSpec for Eusart1CtsrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart1_ctsroute::R](R) reader structure"] -impl crate::Readable for EUSART1_CTSROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart1_ctsroute::W](W) writer structure"] -impl crate::Writable for EUSART1_CTSROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart1_ctsroute::R`](R) reader structure"] +impl crate::Readable for Eusart1CtsrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart1_ctsroute::W`](W) writer structure"] +impl crate::Writable for Eusart1CtsrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART1_CTSROUTE to value 0"] -impl crate::Resettable for EUSART1_CTSROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart1CtsrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_routeen.rs index 8f36898..e013d0a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_routeen.rs @@ -1,140 +1,100 @@ #[doc = "Register `EUSART1_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART1_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CSPEN` reader - CS pin enable control bit"] -pub type CSPEN_R = crate::BitReader; +pub type CspenR = crate::BitReader; #[doc = "Field `CSPEN` writer - CS pin enable control bit"] -pub type CSPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART1_ROUTEEN_SPEC, bool, O>; +pub type CspenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTSPEN` reader - RTS pin enable control bit"] -pub type RTSPEN_R = crate::BitReader; +pub type RtspenR = crate::BitReader; #[doc = "Field `RTSPEN` writer - RTS pin enable control bit"] -pub type RTSPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART1_ROUTEEN_SPEC, bool, O>; +pub type RtspenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXPEN` reader - RX pin enable control bit"] -pub type RXPEN_R = crate::BitReader; +pub type RxpenR = crate::BitReader; #[doc = "Field `RXPEN` writer - RX pin enable control bit"] -pub type RXPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART1_ROUTEEN_SPEC, bool, O>; +pub type RxpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCLKPEN` reader - SCLK pin enable control bit"] -pub type SCLKPEN_R = crate::BitReader; +pub type SclkpenR = crate::BitReader; #[doc = "Field `SCLKPEN` writer - SCLK pin enable control bit"] -pub type SCLKPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART1_ROUTEEN_SPEC, bool, O>; +pub type SclkpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXPEN` reader - TX pin enable control bit"] -pub type TXPEN_R = crate::BitReader; +pub type TxpenR = crate::BitReader; #[doc = "Field `TXPEN` writer - TX pin enable control bit"] -pub type TXPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART1_ROUTEEN_SPEC, bool, O>; +pub type TxpenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CS pin enable control bit"] #[inline(always)] - pub fn cspen(&self) -> CSPEN_R { - CSPEN_R::new((self.bits & 1) != 0) + pub fn cspen(&self) -> CspenR { + CspenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - RTS pin enable control bit"] #[inline(always)] - pub fn rtspen(&self) -> RTSPEN_R { - RTSPEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn rtspen(&self) -> RtspenR { + RtspenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RX pin enable control bit"] #[inline(always)] - pub fn rxpen(&self) -> RXPEN_R { - RXPEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxpen(&self) -> RxpenR { + RxpenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - SCLK pin enable control bit"] #[inline(always)] - pub fn sclkpen(&self) -> SCLKPEN_R { - SCLKPEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn sclkpen(&self) -> SclkpenR { + SclkpenR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - TX pin enable control bit"] #[inline(always)] - pub fn txpen(&self) -> TXPEN_R { - TXPEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn txpen(&self) -> TxpenR { + TxpenR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - CS pin enable control bit"] #[inline(always)] #[must_use] - pub fn cspen(&mut self) -> CSPEN_W<0> { - CSPEN_W::new(self) + pub fn cspen(&mut self) -> CspenW { + CspenW::new(self, 0) } #[doc = "Bit 1 - RTS pin enable control bit"] #[inline(always)] #[must_use] - pub fn rtspen(&mut self) -> RTSPEN_W<1> { - RTSPEN_W::new(self) + pub fn rtspen(&mut self) -> RtspenW { + RtspenW::new(self, 1) } #[doc = "Bit 2 - RX pin enable control bit"] #[inline(always)] #[must_use] - pub fn rxpen(&mut self) -> RXPEN_W<2> { - RXPEN_W::new(self) + pub fn rxpen(&mut self) -> RxpenW { + RxpenW::new(self, 2) } #[doc = "Bit 3 - SCLK pin enable control bit"] #[inline(always)] #[must_use] - pub fn sclkpen(&mut self) -> SCLKPEN_W<3> { - SCLKPEN_W::new(self) + pub fn sclkpen(&mut self) -> SclkpenW { + SclkpenW::new(self, 3) } #[doc = "Bit 4 - TX pin enable control bit"] #[inline(always)] #[must_use] - pub fn txpen(&mut self) -> TXPEN_W<4> { - TXPEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txpen(&mut self) -> TxpenW { + TxpenW::new(self, 4) } } -#[doc = "EUSART1 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart1_routeen](index.html) module"] -pub struct EUSART1_ROUTEEN_SPEC; -impl crate::RegisterSpec for EUSART1_ROUTEEN_SPEC { +#[doc = "EUSART1 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart1RouteenSpec; +impl crate::RegisterSpec for Eusart1RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart1_routeen::R](R) reader structure"] -impl crate::Readable for EUSART1_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart1_routeen::W](W) writer structure"] -impl crate::Writable for EUSART1_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart1_routeen::R`](R) reader structure"] +impl crate::Readable for Eusart1RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart1_routeen::W`](W) writer structure"] +impl crate::Writable for Eusart1RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART1_ROUTEEN to value 0"] -impl crate::Resettable for EUSART1_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart1RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_rtsroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_rtsroute.rs index 17ac175..7ceb4a1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_rtsroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_rtsroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART1_RTSROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART1_RTSROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - RTS port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - RTS port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART1_RTSROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - RTS pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - RTS pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART1_RTSROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - RTS port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - RTS pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - RTS port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - RTS pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "RTS port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart1_rtsroute](index.html) module"] -pub struct EUSART1_RTSROUTE_SPEC; -impl crate::RegisterSpec for EUSART1_RTSROUTE_SPEC { +#[doc = "RTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_rtsroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_rtsroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart1RtsrouteSpec; +impl crate::RegisterSpec for Eusart1RtsrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart1_rtsroute::R](R) reader structure"] -impl crate::Readable for EUSART1_RTSROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart1_rtsroute::W](W) writer structure"] -impl crate::Writable for EUSART1_RTSROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart1_rtsroute::R`](R) reader structure"] +impl crate::Readable for Eusart1RtsrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart1_rtsroute::W`](W) writer structure"] +impl crate::Writable for Eusart1RtsrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART1_RTSROUTE to value 0"] -impl crate::Resettable for EUSART1_RTSROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart1RtsrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_rxroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_rxroute.rs index c570458..e5781fb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_rxroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_rxroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART1_RXROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART1_RXROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - RX port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - RX port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART1_RXROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - RX pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - RX pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART1_RXROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - RX port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - RX pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - RX port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - RX pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "RX port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart1_rxroute](index.html) module"] -pub struct EUSART1_RXROUTE_SPEC; -impl crate::RegisterSpec for EUSART1_RXROUTE_SPEC { +#[doc = "RX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_rxroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_rxroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart1RxrouteSpec; +impl crate::RegisterSpec for Eusart1RxrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart1_rxroute::R](R) reader structure"] -impl crate::Readable for EUSART1_RXROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart1_rxroute::W](W) writer structure"] -impl crate::Writable for EUSART1_RXROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart1_rxroute::R`](R) reader structure"] +impl crate::Readable for Eusart1RxrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart1_rxroute::W`](W) writer structure"] +impl crate::Writable for Eusart1RxrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART1_RXROUTE to value 0"] -impl crate::Resettable for EUSART1_RXROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart1RxrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_sclkroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_sclkroute.rs index 455495a..7dab975 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_sclkroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_sclkroute.rs @@ -1,96 +1,55 @@ #[doc = "Register `EUSART1_SCLKROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART1_SCLKROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - SCLK port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - SCLK port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EUSART1_SCLKROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - SCLK pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - SCLK pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART1_SCLKROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - SCLK port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - SCLK pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - SCLK port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - SCLK pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "SCLK port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart1_sclkroute](index.html) module"] -pub struct EUSART1_SCLKROUTE_SPEC; -impl crate::RegisterSpec for EUSART1_SCLKROUTE_SPEC { +#[doc = "SCLK port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_sclkroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_sclkroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart1SclkrouteSpec; +impl crate::RegisterSpec for Eusart1SclkrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart1_sclkroute::R](R) reader structure"] -impl crate::Readable for EUSART1_SCLKROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart1_sclkroute::W](W) writer structure"] -impl crate::Writable for EUSART1_SCLKROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart1_sclkroute::R`](R) reader structure"] +impl crate::Readable for Eusart1SclkrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart1_sclkroute::W`](W) writer structure"] +impl crate::Writable for Eusart1SclkrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART1_SCLKROUTE to value 0"] -impl crate::Resettable for EUSART1_SCLKROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart1SclkrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_txroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_txroute.rs index 0a11c50..4bc2f6f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_txroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart1_txroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART1_TXROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART1_TXROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - TX port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - TX port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART1_TXROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - TX pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - TX pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART1_TXROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - TX port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - TX pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - TX port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - TX pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "TX port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart1_txroute](index.html) module"] -pub struct EUSART1_TXROUTE_SPEC; -impl crate::RegisterSpec for EUSART1_TXROUTE_SPEC { +#[doc = "TX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart1_txroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart1_txroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart1TxrouteSpec; +impl crate::RegisterSpec for Eusart1TxrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart1_txroute::R](R) reader structure"] -impl crate::Readable for EUSART1_TXROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart1_txroute::W](W) writer structure"] -impl crate::Writable for EUSART1_TXROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart1_txroute::R`](R) reader structure"] +impl crate::Readable for Eusart1TxrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart1_txroute::W`](W) writer structure"] +impl crate::Writable for Eusart1TxrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART1_TXROUTE to value 0"] -impl crate::Resettable for EUSART1_TXROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart1TxrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_csroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_csroute.rs index 30534e7..cd5b8c1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_csroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_csroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART2_CSROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART2_CSROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CS port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CS port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART2_CSROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CS pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CS pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART2_CSROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CS port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CS pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CS port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CS pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CS port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart2_csroute](index.html) module"] -pub struct EUSART2_CSROUTE_SPEC; -impl crate::RegisterSpec for EUSART2_CSROUTE_SPEC { +#[doc = "CS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_csroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_csroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart2CsrouteSpec; +impl crate::RegisterSpec for Eusart2CsrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart2_csroute::R](R) reader structure"] -impl crate::Readable for EUSART2_CSROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart2_csroute::W](W) writer structure"] -impl crate::Writable for EUSART2_CSROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart2_csroute::R`](R) reader structure"] +impl crate::Readable for Eusart2CsrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart2_csroute::W`](W) writer structure"] +impl crate::Writable for Eusart2CsrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART2_CSROUTE to value 0"] -impl crate::Resettable for EUSART2_CSROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart2CsrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_ctsroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_ctsroute.rs index 26619a8..672f789 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_ctsroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_ctsroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART2_CTSROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART2_CTSROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CTS port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CTS port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART2_CTSROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CTS pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CTS pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART2_CTSROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CTS port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CTS pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CTS port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CTS pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CTS port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart2_ctsroute](index.html) module"] -pub struct EUSART2_CTSROUTE_SPEC; -impl crate::RegisterSpec for EUSART2_CTSROUTE_SPEC { +#[doc = "CTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_ctsroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_ctsroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart2CtsrouteSpec; +impl crate::RegisterSpec for Eusart2CtsrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart2_ctsroute::R](R) reader structure"] -impl crate::Readable for EUSART2_CTSROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart2_ctsroute::W](W) writer structure"] -impl crate::Writable for EUSART2_CTSROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart2_ctsroute::R`](R) reader structure"] +impl crate::Readable for Eusart2CtsrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart2_ctsroute::W`](W) writer structure"] +impl crate::Writable for Eusart2CtsrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART2_CTSROUTE to value 0"] -impl crate::Resettable for EUSART2_CTSROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart2CtsrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_routeen.rs index 7f7e5eb..373aa8e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_routeen.rs @@ -1,140 +1,100 @@ #[doc = "Register `EUSART2_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART2_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CSPEN` reader - CS pin enable control bit"] -pub type CSPEN_R = crate::BitReader; +pub type CspenR = crate::BitReader; #[doc = "Field `CSPEN` writer - CS pin enable control bit"] -pub type CSPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART2_ROUTEEN_SPEC, bool, O>; +pub type CspenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTSPEN` reader - RTS pin enable control bit"] -pub type RTSPEN_R = crate::BitReader; +pub type RtspenR = crate::BitReader; #[doc = "Field `RTSPEN` writer - RTS pin enable control bit"] -pub type RTSPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART2_ROUTEEN_SPEC, bool, O>; +pub type RtspenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXPEN` reader - RX pin enable control bit"] -pub type RXPEN_R = crate::BitReader; +pub type RxpenR = crate::BitReader; #[doc = "Field `RXPEN` writer - RX pin enable control bit"] -pub type RXPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART2_ROUTEEN_SPEC, bool, O>; +pub type RxpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCLKPEN` reader - SCLK pin enable control bit"] -pub type SCLKPEN_R = crate::BitReader; +pub type SclkpenR = crate::BitReader; #[doc = "Field `SCLKPEN` writer - SCLK pin enable control bit"] -pub type SCLKPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART2_ROUTEEN_SPEC, bool, O>; +pub type SclkpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXPEN` reader - TX pin enable control bit"] -pub type TXPEN_R = crate::BitReader; +pub type TxpenR = crate::BitReader; #[doc = "Field `TXPEN` writer - TX pin enable control bit"] -pub type TXPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EUSART2_ROUTEEN_SPEC, bool, O>; +pub type TxpenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CS pin enable control bit"] #[inline(always)] - pub fn cspen(&self) -> CSPEN_R { - CSPEN_R::new((self.bits & 1) != 0) + pub fn cspen(&self) -> CspenR { + CspenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - RTS pin enable control bit"] #[inline(always)] - pub fn rtspen(&self) -> RTSPEN_R { - RTSPEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn rtspen(&self) -> RtspenR { + RtspenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RX pin enable control bit"] #[inline(always)] - pub fn rxpen(&self) -> RXPEN_R { - RXPEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxpen(&self) -> RxpenR { + RxpenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - SCLK pin enable control bit"] #[inline(always)] - pub fn sclkpen(&self) -> SCLKPEN_R { - SCLKPEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn sclkpen(&self) -> SclkpenR { + SclkpenR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - TX pin enable control bit"] #[inline(always)] - pub fn txpen(&self) -> TXPEN_R { - TXPEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn txpen(&self) -> TxpenR { + TxpenR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - CS pin enable control bit"] #[inline(always)] #[must_use] - pub fn cspen(&mut self) -> CSPEN_W<0> { - CSPEN_W::new(self) + pub fn cspen(&mut self) -> CspenW { + CspenW::new(self, 0) } #[doc = "Bit 1 - RTS pin enable control bit"] #[inline(always)] #[must_use] - pub fn rtspen(&mut self) -> RTSPEN_W<1> { - RTSPEN_W::new(self) + pub fn rtspen(&mut self) -> RtspenW { + RtspenW::new(self, 1) } #[doc = "Bit 2 - RX pin enable control bit"] #[inline(always)] #[must_use] - pub fn rxpen(&mut self) -> RXPEN_W<2> { - RXPEN_W::new(self) + pub fn rxpen(&mut self) -> RxpenW { + RxpenW::new(self, 2) } #[doc = "Bit 3 - SCLK pin enable control bit"] #[inline(always)] #[must_use] - pub fn sclkpen(&mut self) -> SCLKPEN_W<3> { - SCLKPEN_W::new(self) + pub fn sclkpen(&mut self) -> SclkpenW { + SclkpenW::new(self, 3) } #[doc = "Bit 4 - TX pin enable control bit"] #[inline(always)] #[must_use] - pub fn txpen(&mut self) -> TXPEN_W<4> { - TXPEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txpen(&mut self) -> TxpenW { + TxpenW::new(self, 4) } } -#[doc = "EUSART2 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart2_routeen](index.html) module"] -pub struct EUSART2_ROUTEEN_SPEC; -impl crate::RegisterSpec for EUSART2_ROUTEEN_SPEC { +#[doc = "EUSART2 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart2RouteenSpec; +impl crate::RegisterSpec for Eusart2RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart2_routeen::R](R) reader structure"] -impl crate::Readable for EUSART2_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart2_routeen::W](W) writer structure"] -impl crate::Writable for EUSART2_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart2_routeen::R`](R) reader structure"] +impl crate::Readable for Eusart2RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart2_routeen::W`](W) writer structure"] +impl crate::Writable for Eusart2RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART2_ROUTEEN to value 0"] -impl crate::Resettable for EUSART2_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart2RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_rtsroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_rtsroute.rs index 9b385d6..83ead2a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_rtsroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_rtsroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART2_RTSROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART2_RTSROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - RTS port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - RTS port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART2_RTSROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - RTS pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - RTS pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART2_RTSROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - RTS port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - RTS pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - RTS port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - RTS pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "RTS port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart2_rtsroute](index.html) module"] -pub struct EUSART2_RTSROUTE_SPEC; -impl crate::RegisterSpec for EUSART2_RTSROUTE_SPEC { +#[doc = "RTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_rtsroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_rtsroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart2RtsrouteSpec; +impl crate::RegisterSpec for Eusart2RtsrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart2_rtsroute::R](R) reader structure"] -impl crate::Readable for EUSART2_RTSROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart2_rtsroute::W](W) writer structure"] -impl crate::Writable for EUSART2_RTSROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart2_rtsroute::R`](R) reader structure"] +impl crate::Readable for Eusart2RtsrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart2_rtsroute::W`](W) writer structure"] +impl crate::Writable for Eusart2RtsrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART2_RTSROUTE to value 0"] -impl crate::Resettable for EUSART2_RTSROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart2RtsrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_rxroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_rxroute.rs index b3a797d..5368488 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_rxroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_rxroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART2_RXROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART2_RXROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - RX port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - RX port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART2_RXROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - RX pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - RX pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART2_RXROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - RX port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - RX pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - RX port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - RX pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "RX port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart2_rxroute](index.html) module"] -pub struct EUSART2_RXROUTE_SPEC; -impl crate::RegisterSpec for EUSART2_RXROUTE_SPEC { +#[doc = "RX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_rxroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_rxroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart2RxrouteSpec; +impl crate::RegisterSpec for Eusart2RxrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart2_rxroute::R](R) reader structure"] -impl crate::Readable for EUSART2_RXROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart2_rxroute::W](W) writer structure"] -impl crate::Writable for EUSART2_RXROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart2_rxroute::R`](R) reader structure"] +impl crate::Readable for Eusart2RxrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart2_rxroute::W`](W) writer structure"] +impl crate::Writable for Eusart2RxrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART2_RXROUTE to value 0"] -impl crate::Resettable for EUSART2_RXROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart2RxrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_sclkroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_sclkroute.rs index cdbc16d..13db329 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_sclkroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_sclkroute.rs @@ -1,96 +1,55 @@ #[doc = "Register `EUSART2_SCLKROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART2_SCLKROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - SCLK port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - SCLK port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, EUSART2_SCLKROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - SCLK pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - SCLK pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART2_SCLKROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - SCLK port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - SCLK pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - SCLK port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - SCLK pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "SCLK port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart2_sclkroute](index.html) module"] -pub struct EUSART2_SCLKROUTE_SPEC; -impl crate::RegisterSpec for EUSART2_SCLKROUTE_SPEC { +#[doc = "SCLK port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_sclkroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_sclkroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart2SclkrouteSpec; +impl crate::RegisterSpec for Eusart2SclkrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart2_sclkroute::R](R) reader structure"] -impl crate::Readable for EUSART2_SCLKROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart2_sclkroute::W](W) writer structure"] -impl crate::Writable for EUSART2_SCLKROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart2_sclkroute::R`](R) reader structure"] +impl crate::Readable for Eusart2SclkrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart2_sclkroute::W`](W) writer structure"] +impl crate::Writable for Eusart2SclkrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART2_SCLKROUTE to value 0"] -impl crate::Resettable for EUSART2_SCLKROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart2SclkrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_txroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_txroute.rs index 6f8c5fe..1e24a3e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_txroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/eusart2_txroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `EUSART2_TXROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EUSART2_TXROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - TX port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - TX port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART2_TXROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - TX pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - TX pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EUSART2_TXROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - TX port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - TX pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - TX port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - TX pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "TX port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eusart2_txroute](index.html) module"] -pub struct EUSART2_TXROUTE_SPEC; -impl crate::RegisterSpec for EUSART2_TXROUTE_SPEC { +#[doc = "TX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`eusart2_txroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eusart2_txroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Eusart2TxrouteSpec; +impl crate::RegisterSpec for Eusart2TxrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [eusart2_txroute::R](R) reader structure"] -impl crate::Readable for EUSART2_TXROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [eusart2_txroute::W](W) writer structure"] -impl crate::Writable for EUSART2_TXROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`eusart2_txroute::R`](R) reader structure"] +impl crate::Readable for Eusart2TxrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`eusart2_txroute::W`](W) writer structure"] +impl crate::Writable for Eusart2TxrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EUSART2_TXROUTE to value 0"] -impl crate::Resettable for EUSART2_TXROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Eusart2TxrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/extifall.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/extifall.rs index 0c767b4..9e31a3f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/extifall.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/extifall.rs @@ -1,80 +1,40 @@ #[doc = "Register `EXTIFALL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EXTIFALL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EXTIFALL` reader - EXT Int FALL"] -pub type EXTIFALL_R = crate::FieldReader; +pub type ExtifallR = crate::FieldReader; #[doc = "Field `EXTIFALL` writer - EXT Int FALL"] -pub type EXTIFALL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EXTIFALL_SPEC, u16, u16, 12, O>; +pub type ExtifallW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:11 - EXT Int FALL"] #[inline(always)] - pub fn extifall(&self) -> EXTIFALL_R { - EXTIFALL_R::new((self.bits & 0x0fff) as u16) + pub fn extifall(&self) -> ExtifallR { + ExtifallR::new((self.bits & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - EXT Int FALL"] #[inline(always)] #[must_use] - pub fn extifall(&mut self) -> EXTIFALL_W<0> { - EXTIFALL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn extifall(&mut self) -> ExtifallW { + ExtifallW::new(self, 0) } } -#[doc = "External Interrupt Falling Edge Trigger\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [extifall](index.html) module"] -pub struct EXTIFALL_SPEC; -impl crate::RegisterSpec for EXTIFALL_SPEC { +#[doc = "External Interrupt Falling Edge Trigger\n\nYou can [`read`](crate::Reg::read) this register and get [`extifall::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`extifall::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ExtifallSpec; +impl crate::RegisterSpec for ExtifallSpec { type Ux = u32; } -#[doc = "`read()` method returns [extifall::R](R) reader structure"] -impl crate::Readable for EXTIFALL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [extifall::W](W) writer structure"] -impl crate::Writable for EXTIFALL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`extifall::R`](R) reader structure"] +impl crate::Readable for ExtifallSpec {} +#[doc = "`write(|w| ..)` method takes [`extifall::W`](W) writer structure"] +impl crate::Writable for ExtifallSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EXTIFALL to value 0"] -impl crate::Resettable for EXTIFALL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ExtifallSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/extipinselh.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/extipinselh.rs index 2feefee..b16f941 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/extipinselh.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/extipinselh.rs @@ -1,425 +1,413 @@ #[doc = "Register `EXTIPINSELH` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EXTIPINSELH` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EXTIPINSEL0` reader - External Interrupt Pin select"] -pub type EXTIPINSEL0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "External Interrupt Pin select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPINSEL0_A { +pub enum Extipinsel0 { #[doc = "0: OFFSET=8"] - PIN8 = 0, + Pin8 = 0, #[doc = "1: OFFSET=9"] - PIN9 = 1, + Pin9 = 1, #[doc = "2: OFFSET=10"] - PIN10 = 2, + Pin10 = 2, #[doc = "3: OFFSET=11"] - PIN11 = 3, + Pin11 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPINSEL0_A) -> Self { + fn from(variant: Extipinsel0) -> Self { variant as _ } } -impl EXTIPINSEL0_R { +impl crate::FieldSpec for Extipinsel0 { + type Ux = u8; +} +impl crate::IsEnum for Extipinsel0 {} +#[doc = "Field `EXTIPINSEL0` reader - External Interrupt Pin select"] +pub type Extipinsel0R = crate::FieldReader; +impl Extipinsel0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPINSEL0_A { + pub const fn variant(&self) -> Extipinsel0 { match self.bits { - 0 => EXTIPINSEL0_A::PIN8, - 1 => EXTIPINSEL0_A::PIN9, - 2 => EXTIPINSEL0_A::PIN10, - 3 => EXTIPINSEL0_A::PIN11, + 0 => Extipinsel0::Pin8, + 1 => Extipinsel0::Pin9, + 2 => Extipinsel0::Pin10, + 3 => Extipinsel0::Pin11, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN8`"] + #[doc = "OFFSET=8"] #[inline(always)] pub fn is_pin8(&self) -> bool { - *self == EXTIPINSEL0_A::PIN8 + *self == Extipinsel0::Pin8 } - #[doc = "Checks if the value of the field is `PIN9`"] + #[doc = "OFFSET=9"] #[inline(always)] pub fn is_pin9(&self) -> bool { - *self == EXTIPINSEL0_A::PIN9 + *self == Extipinsel0::Pin9 } - #[doc = "Checks if the value of the field is `PIN10`"] + #[doc = "OFFSET=10"] #[inline(always)] pub fn is_pin10(&self) -> bool { - *self == EXTIPINSEL0_A::PIN10 + *self == Extipinsel0::Pin10 } - #[doc = "Checks if the value of the field is `PIN11`"] + #[doc = "OFFSET=11"] #[inline(always)] pub fn is_pin11(&self) -> bool { - *self == EXTIPINSEL0_A::PIN11 + *self == Extipinsel0::Pin11 } } #[doc = "Field `EXTIPINSEL0` writer - External Interrupt Pin select"] -pub type EXTIPINSEL0_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPINSELH_SPEC, u8, EXTIPINSEL0_A, 2, O>; -impl<'a, const O: u8> EXTIPINSEL0_W<'a, O> { +pub type Extipinsel0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipinsel0, crate::Safe>; +impl<'a, REG> Extipinsel0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "OFFSET=8"] #[inline(always)] - pub fn pin8(self) -> &'a mut W { - self.variant(EXTIPINSEL0_A::PIN8) + pub fn pin8(self) -> &'a mut crate::W { + self.variant(Extipinsel0::Pin8) } #[doc = "OFFSET=9"] #[inline(always)] - pub fn pin9(self) -> &'a mut W { - self.variant(EXTIPINSEL0_A::PIN9) + pub fn pin9(self) -> &'a mut crate::W { + self.variant(Extipinsel0::Pin9) } #[doc = "OFFSET=10"] #[inline(always)] - pub fn pin10(self) -> &'a mut W { - self.variant(EXTIPINSEL0_A::PIN10) + pub fn pin10(self) -> &'a mut crate::W { + self.variant(Extipinsel0::Pin10) } #[doc = "OFFSET=11"] #[inline(always)] - pub fn pin11(self) -> &'a mut W { - self.variant(EXTIPINSEL0_A::PIN11) + pub fn pin11(self) -> &'a mut crate::W { + self.variant(Extipinsel0::Pin11) } } -#[doc = "Field `EXTIPINSEL1` reader - External Interrupt Pin select"] -pub type EXTIPINSEL1_R = crate::FieldReader; #[doc = "External Interrupt Pin select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPINSEL1_A { +pub enum Extipinsel1 { #[doc = "0: OFFSET=8"] - PIN8 = 0, + Pin8 = 0, #[doc = "1: OFFSET=9"] - PIN9 = 1, + Pin9 = 1, #[doc = "2: OFFSET=10"] - PIN10 = 2, + Pin10 = 2, #[doc = "3: OFFSET=11"] - PIN11 = 3, + Pin11 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPINSEL1_A) -> Self { + fn from(variant: Extipinsel1) -> Self { variant as _ } } -impl EXTIPINSEL1_R { +impl crate::FieldSpec for Extipinsel1 { + type Ux = u8; +} +impl crate::IsEnum for Extipinsel1 {} +#[doc = "Field `EXTIPINSEL1` reader - External Interrupt Pin select"] +pub type Extipinsel1R = crate::FieldReader; +impl Extipinsel1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPINSEL1_A { + pub const fn variant(&self) -> Extipinsel1 { match self.bits { - 0 => EXTIPINSEL1_A::PIN8, - 1 => EXTIPINSEL1_A::PIN9, - 2 => EXTIPINSEL1_A::PIN10, - 3 => EXTIPINSEL1_A::PIN11, + 0 => Extipinsel1::Pin8, + 1 => Extipinsel1::Pin9, + 2 => Extipinsel1::Pin10, + 3 => Extipinsel1::Pin11, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN8`"] + #[doc = "OFFSET=8"] #[inline(always)] pub fn is_pin8(&self) -> bool { - *self == EXTIPINSEL1_A::PIN8 + *self == Extipinsel1::Pin8 } - #[doc = "Checks if the value of the field is `PIN9`"] + #[doc = "OFFSET=9"] #[inline(always)] pub fn is_pin9(&self) -> bool { - *self == EXTIPINSEL1_A::PIN9 + *self == Extipinsel1::Pin9 } - #[doc = "Checks if the value of the field is `PIN10`"] + #[doc = "OFFSET=10"] #[inline(always)] pub fn is_pin10(&self) -> bool { - *self == EXTIPINSEL1_A::PIN10 + *self == Extipinsel1::Pin10 } - #[doc = "Checks if the value of the field is `PIN11`"] + #[doc = "OFFSET=11"] #[inline(always)] pub fn is_pin11(&self) -> bool { - *self == EXTIPINSEL1_A::PIN11 + *self == Extipinsel1::Pin11 } } #[doc = "Field `EXTIPINSEL1` writer - External Interrupt Pin select"] -pub type EXTIPINSEL1_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPINSELH_SPEC, u8, EXTIPINSEL1_A, 2, O>; -impl<'a, const O: u8> EXTIPINSEL1_W<'a, O> { +pub type Extipinsel1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipinsel1, crate::Safe>; +impl<'a, REG> Extipinsel1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "OFFSET=8"] #[inline(always)] - pub fn pin8(self) -> &'a mut W { - self.variant(EXTIPINSEL1_A::PIN8) + pub fn pin8(self) -> &'a mut crate::W { + self.variant(Extipinsel1::Pin8) } #[doc = "OFFSET=9"] #[inline(always)] - pub fn pin9(self) -> &'a mut W { - self.variant(EXTIPINSEL1_A::PIN9) + pub fn pin9(self) -> &'a mut crate::W { + self.variant(Extipinsel1::Pin9) } #[doc = "OFFSET=10"] #[inline(always)] - pub fn pin10(self) -> &'a mut W { - self.variant(EXTIPINSEL1_A::PIN10) + pub fn pin10(self) -> &'a mut crate::W { + self.variant(Extipinsel1::Pin10) } #[doc = "OFFSET=11"] #[inline(always)] - pub fn pin11(self) -> &'a mut W { - self.variant(EXTIPINSEL1_A::PIN11) + pub fn pin11(self) -> &'a mut crate::W { + self.variant(Extipinsel1::Pin11) } } -#[doc = "Field `EXTIPINSEL2` reader - External Interrupt Pin select"] -pub type EXTIPINSEL2_R = crate::FieldReader; #[doc = "External Interrupt Pin select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPINSEL2_A { +pub enum Extipinsel2 { #[doc = "0: OFFSET=8"] - PIN8 = 0, + Pin8 = 0, #[doc = "1: OFFSET=9"] - PIN9 = 1, + Pin9 = 1, #[doc = "2: OFFSET=10"] - PIN10 = 2, + Pin10 = 2, #[doc = "3: OFFSET=11"] - PIN11 = 3, + Pin11 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPINSEL2_A) -> Self { + fn from(variant: Extipinsel2) -> Self { variant as _ } } -impl EXTIPINSEL2_R { +impl crate::FieldSpec for Extipinsel2 { + type Ux = u8; +} +impl crate::IsEnum for Extipinsel2 {} +#[doc = "Field `EXTIPINSEL2` reader - External Interrupt Pin select"] +pub type Extipinsel2R = crate::FieldReader; +impl Extipinsel2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPINSEL2_A { + pub const fn variant(&self) -> Extipinsel2 { match self.bits { - 0 => EXTIPINSEL2_A::PIN8, - 1 => EXTIPINSEL2_A::PIN9, - 2 => EXTIPINSEL2_A::PIN10, - 3 => EXTIPINSEL2_A::PIN11, + 0 => Extipinsel2::Pin8, + 1 => Extipinsel2::Pin9, + 2 => Extipinsel2::Pin10, + 3 => Extipinsel2::Pin11, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN8`"] + #[doc = "OFFSET=8"] #[inline(always)] pub fn is_pin8(&self) -> bool { - *self == EXTIPINSEL2_A::PIN8 + *self == Extipinsel2::Pin8 } - #[doc = "Checks if the value of the field is `PIN9`"] + #[doc = "OFFSET=9"] #[inline(always)] pub fn is_pin9(&self) -> bool { - *self == EXTIPINSEL2_A::PIN9 + *self == Extipinsel2::Pin9 } - #[doc = "Checks if the value of the field is `PIN10`"] + #[doc = "OFFSET=10"] #[inline(always)] pub fn is_pin10(&self) -> bool { - *self == EXTIPINSEL2_A::PIN10 + *self == Extipinsel2::Pin10 } - #[doc = "Checks if the value of the field is `PIN11`"] + #[doc = "OFFSET=11"] #[inline(always)] pub fn is_pin11(&self) -> bool { - *self == EXTIPINSEL2_A::PIN11 + *self == Extipinsel2::Pin11 } } #[doc = "Field `EXTIPINSEL2` writer - External Interrupt Pin select"] -pub type EXTIPINSEL2_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPINSELH_SPEC, u8, EXTIPINSEL2_A, 2, O>; -impl<'a, const O: u8> EXTIPINSEL2_W<'a, O> { +pub type Extipinsel2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipinsel2, crate::Safe>; +impl<'a, REG> Extipinsel2W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "OFFSET=8"] #[inline(always)] - pub fn pin8(self) -> &'a mut W { - self.variant(EXTIPINSEL2_A::PIN8) + pub fn pin8(self) -> &'a mut crate::W { + self.variant(Extipinsel2::Pin8) } #[doc = "OFFSET=9"] #[inline(always)] - pub fn pin9(self) -> &'a mut W { - self.variant(EXTIPINSEL2_A::PIN9) + pub fn pin9(self) -> &'a mut crate::W { + self.variant(Extipinsel2::Pin9) } #[doc = "OFFSET=10"] #[inline(always)] - pub fn pin10(self) -> &'a mut W { - self.variant(EXTIPINSEL2_A::PIN10) + pub fn pin10(self) -> &'a mut crate::W { + self.variant(Extipinsel2::Pin10) } #[doc = "OFFSET=11"] #[inline(always)] - pub fn pin11(self) -> &'a mut W { - self.variant(EXTIPINSEL2_A::PIN11) + pub fn pin11(self) -> &'a mut crate::W { + self.variant(Extipinsel2::Pin11) } } -#[doc = "Field `EXTIPINSEL3` reader - External Interrupt Pin select"] -pub type EXTIPINSEL3_R = crate::FieldReader; #[doc = "External Interrupt Pin select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPINSEL3_A { +pub enum Extipinsel3 { #[doc = "0: OFFSET=8"] - PIN8 = 0, + Pin8 = 0, #[doc = "1: OFFSET=9"] - PIN9 = 1, + Pin9 = 1, #[doc = "2: OFFSET=10"] - PIN10 = 2, + Pin10 = 2, #[doc = "3: OFFSET=11"] - PIN11 = 3, + Pin11 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPINSEL3_A) -> Self { + fn from(variant: Extipinsel3) -> Self { variant as _ } } -impl EXTIPINSEL3_R { +impl crate::FieldSpec for Extipinsel3 { + type Ux = u8; +} +impl crate::IsEnum for Extipinsel3 {} +#[doc = "Field `EXTIPINSEL3` reader - External Interrupt Pin select"] +pub type Extipinsel3R = crate::FieldReader; +impl Extipinsel3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPINSEL3_A { + pub const fn variant(&self) -> Extipinsel3 { match self.bits { - 0 => EXTIPINSEL3_A::PIN8, - 1 => EXTIPINSEL3_A::PIN9, - 2 => EXTIPINSEL3_A::PIN10, - 3 => EXTIPINSEL3_A::PIN11, + 0 => Extipinsel3::Pin8, + 1 => Extipinsel3::Pin9, + 2 => Extipinsel3::Pin10, + 3 => Extipinsel3::Pin11, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN8`"] + #[doc = "OFFSET=8"] #[inline(always)] pub fn is_pin8(&self) -> bool { - *self == EXTIPINSEL3_A::PIN8 + *self == Extipinsel3::Pin8 } - #[doc = "Checks if the value of the field is `PIN9`"] + #[doc = "OFFSET=9"] #[inline(always)] pub fn is_pin9(&self) -> bool { - *self == EXTIPINSEL3_A::PIN9 + *self == Extipinsel3::Pin9 } - #[doc = "Checks if the value of the field is `PIN10`"] + #[doc = "OFFSET=10"] #[inline(always)] pub fn is_pin10(&self) -> bool { - *self == EXTIPINSEL3_A::PIN10 + *self == Extipinsel3::Pin10 } - #[doc = "Checks if the value of the field is `PIN11`"] + #[doc = "OFFSET=11"] #[inline(always)] pub fn is_pin11(&self) -> bool { - *self == EXTIPINSEL3_A::PIN11 + *self == Extipinsel3::Pin11 } } #[doc = "Field `EXTIPINSEL3` writer - External Interrupt Pin select"] -pub type EXTIPINSEL3_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPINSELH_SPEC, u8, EXTIPINSEL3_A, 2, O>; -impl<'a, const O: u8> EXTIPINSEL3_W<'a, O> { +pub type Extipinsel3W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipinsel3, crate::Safe>; +impl<'a, REG> Extipinsel3W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "OFFSET=8"] #[inline(always)] - pub fn pin8(self) -> &'a mut W { - self.variant(EXTIPINSEL3_A::PIN8) + pub fn pin8(self) -> &'a mut crate::W { + self.variant(Extipinsel3::Pin8) } #[doc = "OFFSET=9"] #[inline(always)] - pub fn pin9(self) -> &'a mut W { - self.variant(EXTIPINSEL3_A::PIN9) + pub fn pin9(self) -> &'a mut crate::W { + self.variant(Extipinsel3::Pin9) } #[doc = "OFFSET=10"] #[inline(always)] - pub fn pin10(self) -> &'a mut W { - self.variant(EXTIPINSEL3_A::PIN10) + pub fn pin10(self) -> &'a mut crate::W { + self.variant(Extipinsel3::Pin10) } #[doc = "OFFSET=11"] #[inline(always)] - pub fn pin11(self) -> &'a mut W { - self.variant(EXTIPINSEL3_A::PIN11) + pub fn pin11(self) -> &'a mut crate::W { + self.variant(Extipinsel3::Pin11) } } impl R { #[doc = "Bits 0:1 - External Interrupt Pin select"] #[inline(always)] - pub fn extipinsel0(&self) -> EXTIPINSEL0_R { - EXTIPINSEL0_R::new((self.bits & 3) as u8) + pub fn extipinsel0(&self) -> Extipinsel0R { + Extipinsel0R::new((self.bits & 3) as u8) } #[doc = "Bits 4:5 - External Interrupt Pin select"] #[inline(always)] - pub fn extipinsel1(&self) -> EXTIPINSEL1_R { - EXTIPINSEL1_R::new(((self.bits >> 4) & 3) as u8) + pub fn extipinsel1(&self) -> Extipinsel1R { + Extipinsel1R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 8:9 - External Interrupt Pin select"] #[inline(always)] - pub fn extipinsel2(&self) -> EXTIPINSEL2_R { - EXTIPINSEL2_R::new(((self.bits >> 8) & 3) as u8) + pub fn extipinsel2(&self) -> Extipinsel2R { + Extipinsel2R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 12:13 - External Interrupt Pin select"] #[inline(always)] - pub fn extipinsel3(&self) -> EXTIPINSEL3_R { - EXTIPINSEL3_R::new(((self.bits >> 12) & 3) as u8) + pub fn extipinsel3(&self) -> Extipinsel3R { + Extipinsel3R::new(((self.bits >> 12) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - External Interrupt Pin select"] #[inline(always)] #[must_use] - pub fn extipinsel0(&mut self) -> EXTIPINSEL0_W<0> { - EXTIPINSEL0_W::new(self) + pub fn extipinsel0(&mut self) -> Extipinsel0W { + Extipinsel0W::new(self, 0) } #[doc = "Bits 4:5 - External Interrupt Pin select"] #[inline(always)] #[must_use] - pub fn extipinsel1(&mut self) -> EXTIPINSEL1_W<4> { - EXTIPINSEL1_W::new(self) + pub fn extipinsel1(&mut self) -> Extipinsel1W { + Extipinsel1W::new(self, 4) } #[doc = "Bits 8:9 - External Interrupt Pin select"] #[inline(always)] #[must_use] - pub fn extipinsel2(&mut self) -> EXTIPINSEL2_W<8> { - EXTIPINSEL2_W::new(self) + pub fn extipinsel2(&mut self) -> Extipinsel2W { + Extipinsel2W::new(self, 8) } #[doc = "Bits 12:13 - External Interrupt Pin select"] #[inline(always)] #[must_use] - pub fn extipinsel3(&mut self) -> EXTIPINSEL3_W<12> { - EXTIPINSEL3_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn extipinsel3(&mut self) -> Extipinsel3W { + Extipinsel3W::new(self, 12) } } -#[doc = "External Interrupt Pin Select High\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [extipinselh](index.html) module"] -pub struct EXTIPINSELH_SPEC; -impl crate::RegisterSpec for EXTIPINSELH_SPEC { +#[doc = "External Interrupt Pin Select High\n\nYou can [`read`](crate::Reg::read) this register and get [`extipinselh::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`extipinselh::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ExtipinselhSpec; +impl crate::RegisterSpec for ExtipinselhSpec { type Ux = u32; } -#[doc = "`read()` method returns [extipinselh::R](R) reader structure"] -impl crate::Readable for EXTIPINSELH_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [extipinselh::W](W) writer structure"] -impl crate::Writable for EXTIPINSELH_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`extipinselh::R`](R) reader structure"] +impl crate::Readable for ExtipinselhSpec {} +#[doc = "`write(|w| ..)` method takes [`extipinselh::W`](W) writer structure"] +impl crate::Writable for ExtipinselhSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EXTIPINSELH to value 0"] -impl crate::Resettable for EXTIPINSELH_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ExtipinselhSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/extipinsell.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/extipinsell.rs index 3150946..0d94dc7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/extipinsell.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/extipinsell.rs @@ -1,785 +1,801 @@ #[doc = "Register `EXTIPINSELL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EXTIPINSELL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EXTIPINSEL0` reader - External Interrupt Pin select"] -pub type EXTIPINSEL0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "External Interrupt Pin select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPINSEL0_A { +pub enum Extipinsel0 { #[doc = "0: OFFSET=0"] - PIN0 = 0, + Pin0 = 0, #[doc = "1: OFFSET=1"] - PIN1 = 1, + Pin1 = 1, #[doc = "2: OFFSET=2"] - PIN2 = 2, + Pin2 = 2, #[doc = "3: OFFSET=3"] - PIN3 = 3, + Pin3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPINSEL0_A) -> Self { + fn from(variant: Extipinsel0) -> Self { variant as _ } } -impl EXTIPINSEL0_R { +impl crate::FieldSpec for Extipinsel0 { + type Ux = u8; +} +impl crate::IsEnum for Extipinsel0 {} +#[doc = "Field `EXTIPINSEL0` reader - External Interrupt Pin select"] +pub type Extipinsel0R = crate::FieldReader; +impl Extipinsel0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPINSEL0_A { + pub const fn variant(&self) -> Extipinsel0 { match self.bits { - 0 => EXTIPINSEL0_A::PIN0, - 1 => EXTIPINSEL0_A::PIN1, - 2 => EXTIPINSEL0_A::PIN2, - 3 => EXTIPINSEL0_A::PIN3, + 0 => Extipinsel0::Pin0, + 1 => Extipinsel0::Pin1, + 2 => Extipinsel0::Pin2, + 3 => Extipinsel0::Pin3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN0`"] + #[doc = "OFFSET=0"] #[inline(always)] pub fn is_pin0(&self) -> bool { - *self == EXTIPINSEL0_A::PIN0 + *self == Extipinsel0::Pin0 } - #[doc = "Checks if the value of the field is `PIN1`"] + #[doc = "OFFSET=1"] #[inline(always)] pub fn is_pin1(&self) -> bool { - *self == EXTIPINSEL0_A::PIN1 + *self == Extipinsel0::Pin1 } - #[doc = "Checks if the value of the field is `PIN2`"] + #[doc = "OFFSET=2"] #[inline(always)] pub fn is_pin2(&self) -> bool { - *self == EXTIPINSEL0_A::PIN2 + *self == Extipinsel0::Pin2 } - #[doc = "Checks if the value of the field is `PIN3`"] + #[doc = "OFFSET=3"] #[inline(always)] pub fn is_pin3(&self) -> bool { - *self == EXTIPINSEL0_A::PIN3 + *self == Extipinsel0::Pin3 } } #[doc = "Field `EXTIPINSEL0` writer - External Interrupt Pin select"] -pub type EXTIPINSEL0_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPINSELL_SPEC, u8, EXTIPINSEL0_A, 2, O>; -impl<'a, const O: u8> EXTIPINSEL0_W<'a, O> { +pub type Extipinsel0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipinsel0, crate::Safe>; +impl<'a, REG> Extipinsel0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "OFFSET=0"] #[inline(always)] - pub fn pin0(self) -> &'a mut W { - self.variant(EXTIPINSEL0_A::PIN0) + pub fn pin0(self) -> &'a mut crate::W { + self.variant(Extipinsel0::Pin0) } #[doc = "OFFSET=1"] #[inline(always)] - pub fn pin1(self) -> &'a mut W { - self.variant(EXTIPINSEL0_A::PIN1) + pub fn pin1(self) -> &'a mut crate::W { + self.variant(Extipinsel0::Pin1) } #[doc = "OFFSET=2"] #[inline(always)] - pub fn pin2(self) -> &'a mut W { - self.variant(EXTIPINSEL0_A::PIN2) + pub fn pin2(self) -> &'a mut crate::W { + self.variant(Extipinsel0::Pin2) } #[doc = "OFFSET=3"] #[inline(always)] - pub fn pin3(self) -> &'a mut W { - self.variant(EXTIPINSEL0_A::PIN3) + pub fn pin3(self) -> &'a mut crate::W { + self.variant(Extipinsel0::Pin3) } } -#[doc = "Field `EXTIPINSEL1` reader - External Interrupt Pin select"] -pub type EXTIPINSEL1_R = crate::FieldReader; #[doc = "External Interrupt Pin select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPINSEL1_A { +pub enum Extipinsel1 { #[doc = "0: OFFSET=0"] - PIN0 = 0, + Pin0 = 0, #[doc = "1: OFFSET=1"] - PIN1 = 1, + Pin1 = 1, #[doc = "2: OFFSET=2"] - PIN2 = 2, + Pin2 = 2, #[doc = "3: OFFSET=3"] - PIN3 = 3, + Pin3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPINSEL1_A) -> Self { + fn from(variant: Extipinsel1) -> Self { variant as _ } } -impl EXTIPINSEL1_R { +impl crate::FieldSpec for Extipinsel1 { + type Ux = u8; +} +impl crate::IsEnum for Extipinsel1 {} +#[doc = "Field `EXTIPINSEL1` reader - External Interrupt Pin select"] +pub type Extipinsel1R = crate::FieldReader; +impl Extipinsel1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPINSEL1_A { + pub const fn variant(&self) -> Extipinsel1 { match self.bits { - 0 => EXTIPINSEL1_A::PIN0, - 1 => EXTIPINSEL1_A::PIN1, - 2 => EXTIPINSEL1_A::PIN2, - 3 => EXTIPINSEL1_A::PIN3, + 0 => Extipinsel1::Pin0, + 1 => Extipinsel1::Pin1, + 2 => Extipinsel1::Pin2, + 3 => Extipinsel1::Pin3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN0`"] + #[doc = "OFFSET=0"] #[inline(always)] pub fn is_pin0(&self) -> bool { - *self == EXTIPINSEL1_A::PIN0 + *self == Extipinsel1::Pin0 } - #[doc = "Checks if the value of the field is `PIN1`"] + #[doc = "OFFSET=1"] #[inline(always)] pub fn is_pin1(&self) -> bool { - *self == EXTIPINSEL1_A::PIN1 + *self == Extipinsel1::Pin1 } - #[doc = "Checks if the value of the field is `PIN2`"] + #[doc = "OFFSET=2"] #[inline(always)] pub fn is_pin2(&self) -> bool { - *self == EXTIPINSEL1_A::PIN2 + *self == Extipinsel1::Pin2 } - #[doc = "Checks if the value of the field is `PIN3`"] + #[doc = "OFFSET=3"] #[inline(always)] pub fn is_pin3(&self) -> bool { - *self == EXTIPINSEL1_A::PIN3 + *self == Extipinsel1::Pin3 } } #[doc = "Field `EXTIPINSEL1` writer - External Interrupt Pin select"] -pub type EXTIPINSEL1_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPINSELL_SPEC, u8, EXTIPINSEL1_A, 2, O>; -impl<'a, const O: u8> EXTIPINSEL1_W<'a, O> { +pub type Extipinsel1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipinsel1, crate::Safe>; +impl<'a, REG> Extipinsel1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "OFFSET=0"] #[inline(always)] - pub fn pin0(self) -> &'a mut W { - self.variant(EXTIPINSEL1_A::PIN0) + pub fn pin0(self) -> &'a mut crate::W { + self.variant(Extipinsel1::Pin0) } #[doc = "OFFSET=1"] #[inline(always)] - pub fn pin1(self) -> &'a mut W { - self.variant(EXTIPINSEL1_A::PIN1) + pub fn pin1(self) -> &'a mut crate::W { + self.variant(Extipinsel1::Pin1) } #[doc = "OFFSET=2"] #[inline(always)] - pub fn pin2(self) -> &'a mut W { - self.variant(EXTIPINSEL1_A::PIN2) + pub fn pin2(self) -> &'a mut crate::W { + self.variant(Extipinsel1::Pin2) } #[doc = "OFFSET=3"] #[inline(always)] - pub fn pin3(self) -> &'a mut W { - self.variant(EXTIPINSEL1_A::PIN3) + pub fn pin3(self) -> &'a mut crate::W { + self.variant(Extipinsel1::Pin3) } } -#[doc = "Field `EXTIPINSEL2` reader - External Interrupt Pin select"] -pub type EXTIPINSEL2_R = crate::FieldReader; #[doc = "External Interrupt Pin select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPINSEL2_A { +pub enum Extipinsel2 { #[doc = "0: OFFSET=0"] - PIN0 = 0, + Pin0 = 0, #[doc = "1: OFFSET=1"] - PIN1 = 1, + Pin1 = 1, #[doc = "2: OFFSET=2"] - PIN2 = 2, + Pin2 = 2, #[doc = "3: OFFSET=3"] - PIN3 = 3, + Pin3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPINSEL2_A) -> Self { + fn from(variant: Extipinsel2) -> Self { variant as _ } } -impl EXTIPINSEL2_R { +impl crate::FieldSpec for Extipinsel2 { + type Ux = u8; +} +impl crate::IsEnum for Extipinsel2 {} +#[doc = "Field `EXTIPINSEL2` reader - External Interrupt Pin select"] +pub type Extipinsel2R = crate::FieldReader; +impl Extipinsel2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPINSEL2_A { + pub const fn variant(&self) -> Extipinsel2 { match self.bits { - 0 => EXTIPINSEL2_A::PIN0, - 1 => EXTIPINSEL2_A::PIN1, - 2 => EXTIPINSEL2_A::PIN2, - 3 => EXTIPINSEL2_A::PIN3, + 0 => Extipinsel2::Pin0, + 1 => Extipinsel2::Pin1, + 2 => Extipinsel2::Pin2, + 3 => Extipinsel2::Pin3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN0`"] + #[doc = "OFFSET=0"] #[inline(always)] pub fn is_pin0(&self) -> bool { - *self == EXTIPINSEL2_A::PIN0 + *self == Extipinsel2::Pin0 } - #[doc = "Checks if the value of the field is `PIN1`"] + #[doc = "OFFSET=1"] #[inline(always)] pub fn is_pin1(&self) -> bool { - *self == EXTIPINSEL2_A::PIN1 + *self == Extipinsel2::Pin1 } - #[doc = "Checks if the value of the field is `PIN2`"] + #[doc = "OFFSET=2"] #[inline(always)] pub fn is_pin2(&self) -> bool { - *self == EXTIPINSEL2_A::PIN2 + *self == Extipinsel2::Pin2 } - #[doc = "Checks if the value of the field is `PIN3`"] + #[doc = "OFFSET=3"] #[inline(always)] pub fn is_pin3(&self) -> bool { - *self == EXTIPINSEL2_A::PIN3 + *self == Extipinsel2::Pin3 } } #[doc = "Field `EXTIPINSEL2` writer - External Interrupt Pin select"] -pub type EXTIPINSEL2_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPINSELL_SPEC, u8, EXTIPINSEL2_A, 2, O>; -impl<'a, const O: u8> EXTIPINSEL2_W<'a, O> { +pub type Extipinsel2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipinsel2, crate::Safe>; +impl<'a, REG> Extipinsel2W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "OFFSET=0"] #[inline(always)] - pub fn pin0(self) -> &'a mut W { - self.variant(EXTIPINSEL2_A::PIN0) + pub fn pin0(self) -> &'a mut crate::W { + self.variant(Extipinsel2::Pin0) } #[doc = "OFFSET=1"] #[inline(always)] - pub fn pin1(self) -> &'a mut W { - self.variant(EXTIPINSEL2_A::PIN1) + pub fn pin1(self) -> &'a mut crate::W { + self.variant(Extipinsel2::Pin1) } #[doc = "OFFSET=2"] #[inline(always)] - pub fn pin2(self) -> &'a mut W { - self.variant(EXTIPINSEL2_A::PIN2) + pub fn pin2(self) -> &'a mut crate::W { + self.variant(Extipinsel2::Pin2) } #[doc = "OFFSET=3"] #[inline(always)] - pub fn pin3(self) -> &'a mut W { - self.variant(EXTIPINSEL2_A::PIN3) + pub fn pin3(self) -> &'a mut crate::W { + self.variant(Extipinsel2::Pin3) } } -#[doc = "Field `EXTIPINSEL3` reader - External Interrupt Pin select"] -pub type EXTIPINSEL3_R = crate::FieldReader; #[doc = "External Interrupt Pin select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPINSEL3_A { +pub enum Extipinsel3 { #[doc = "0: OFFSET=0"] - PIN0 = 0, + Pin0 = 0, #[doc = "1: OFFSET=1"] - PIN1 = 1, + Pin1 = 1, #[doc = "2: OFFSET=2"] - PIN2 = 2, + Pin2 = 2, #[doc = "3: OFFSET=3"] - PIN3 = 3, + Pin3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPINSEL3_A) -> Self { + fn from(variant: Extipinsel3) -> Self { variant as _ } } -impl EXTIPINSEL3_R { +impl crate::FieldSpec for Extipinsel3 { + type Ux = u8; +} +impl crate::IsEnum for Extipinsel3 {} +#[doc = "Field `EXTIPINSEL3` reader - External Interrupt Pin select"] +pub type Extipinsel3R = crate::FieldReader; +impl Extipinsel3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPINSEL3_A { + pub const fn variant(&self) -> Extipinsel3 { match self.bits { - 0 => EXTIPINSEL3_A::PIN0, - 1 => EXTIPINSEL3_A::PIN1, - 2 => EXTIPINSEL3_A::PIN2, - 3 => EXTIPINSEL3_A::PIN3, + 0 => Extipinsel3::Pin0, + 1 => Extipinsel3::Pin1, + 2 => Extipinsel3::Pin2, + 3 => Extipinsel3::Pin3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN0`"] + #[doc = "OFFSET=0"] #[inline(always)] pub fn is_pin0(&self) -> bool { - *self == EXTIPINSEL3_A::PIN0 + *self == Extipinsel3::Pin0 } - #[doc = "Checks if the value of the field is `PIN1`"] + #[doc = "OFFSET=1"] #[inline(always)] pub fn is_pin1(&self) -> bool { - *self == EXTIPINSEL3_A::PIN1 + *self == Extipinsel3::Pin1 } - #[doc = "Checks if the value of the field is `PIN2`"] + #[doc = "OFFSET=2"] #[inline(always)] pub fn is_pin2(&self) -> bool { - *self == EXTIPINSEL3_A::PIN2 + *self == Extipinsel3::Pin2 } - #[doc = "Checks if the value of the field is `PIN3`"] + #[doc = "OFFSET=3"] #[inline(always)] pub fn is_pin3(&self) -> bool { - *self == EXTIPINSEL3_A::PIN3 + *self == Extipinsel3::Pin3 } } #[doc = "Field `EXTIPINSEL3` writer - External Interrupt Pin select"] -pub type EXTIPINSEL3_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPINSELL_SPEC, u8, EXTIPINSEL3_A, 2, O>; -impl<'a, const O: u8> EXTIPINSEL3_W<'a, O> { +pub type Extipinsel3W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipinsel3, crate::Safe>; +impl<'a, REG> Extipinsel3W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "OFFSET=0"] #[inline(always)] - pub fn pin0(self) -> &'a mut W { - self.variant(EXTIPINSEL3_A::PIN0) + pub fn pin0(self) -> &'a mut crate::W { + self.variant(Extipinsel3::Pin0) } #[doc = "OFFSET=1"] #[inline(always)] - pub fn pin1(self) -> &'a mut W { - self.variant(EXTIPINSEL3_A::PIN1) + pub fn pin1(self) -> &'a mut crate::W { + self.variant(Extipinsel3::Pin1) } #[doc = "OFFSET=2"] #[inline(always)] - pub fn pin2(self) -> &'a mut W { - self.variant(EXTIPINSEL3_A::PIN2) + pub fn pin2(self) -> &'a mut crate::W { + self.variant(Extipinsel3::Pin2) } #[doc = "OFFSET=3"] #[inline(always)] - pub fn pin3(self) -> &'a mut W { - self.variant(EXTIPINSEL3_A::PIN3) + pub fn pin3(self) -> &'a mut crate::W { + self.variant(Extipinsel3::Pin3) } } -#[doc = "Field `EXTIPINSEL4` reader - External Interrupt Pin select"] -pub type EXTIPINSEL4_R = crate::FieldReader; #[doc = "External Interrupt Pin select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPINSEL4_A { +pub enum Extipinsel4 { #[doc = "0: OFFSET=0"] - PIN0 = 0, + Pin0 = 0, #[doc = "1: OFFSET=1"] - PIN1 = 1, + Pin1 = 1, #[doc = "2: OFFSET=2"] - PIN2 = 2, + Pin2 = 2, #[doc = "3: OFFSET=3"] - PIN3 = 3, + Pin3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPINSEL4_A) -> Self { + fn from(variant: Extipinsel4) -> Self { variant as _ } } -impl EXTIPINSEL4_R { +impl crate::FieldSpec for Extipinsel4 { + type Ux = u8; +} +impl crate::IsEnum for Extipinsel4 {} +#[doc = "Field `EXTIPINSEL4` reader - External Interrupt Pin select"] +pub type Extipinsel4R = crate::FieldReader; +impl Extipinsel4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPINSEL4_A { + pub const fn variant(&self) -> Extipinsel4 { match self.bits { - 0 => EXTIPINSEL4_A::PIN0, - 1 => EXTIPINSEL4_A::PIN1, - 2 => EXTIPINSEL4_A::PIN2, - 3 => EXTIPINSEL4_A::PIN3, + 0 => Extipinsel4::Pin0, + 1 => Extipinsel4::Pin1, + 2 => Extipinsel4::Pin2, + 3 => Extipinsel4::Pin3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN0`"] + #[doc = "OFFSET=0"] #[inline(always)] pub fn is_pin0(&self) -> bool { - *self == EXTIPINSEL4_A::PIN0 + *self == Extipinsel4::Pin0 } - #[doc = "Checks if the value of the field is `PIN1`"] + #[doc = "OFFSET=1"] #[inline(always)] pub fn is_pin1(&self) -> bool { - *self == EXTIPINSEL4_A::PIN1 + *self == Extipinsel4::Pin1 } - #[doc = "Checks if the value of the field is `PIN2`"] + #[doc = "OFFSET=2"] #[inline(always)] pub fn is_pin2(&self) -> bool { - *self == EXTIPINSEL4_A::PIN2 + *self == Extipinsel4::Pin2 } - #[doc = "Checks if the value of the field is `PIN3`"] + #[doc = "OFFSET=3"] #[inline(always)] pub fn is_pin3(&self) -> bool { - *self == EXTIPINSEL4_A::PIN3 + *self == Extipinsel4::Pin3 } } #[doc = "Field `EXTIPINSEL4` writer - External Interrupt Pin select"] -pub type EXTIPINSEL4_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPINSELL_SPEC, u8, EXTIPINSEL4_A, 2, O>; -impl<'a, const O: u8> EXTIPINSEL4_W<'a, O> { +pub type Extipinsel4W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipinsel4, crate::Safe>; +impl<'a, REG> Extipinsel4W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "OFFSET=0"] #[inline(always)] - pub fn pin0(self) -> &'a mut W { - self.variant(EXTIPINSEL4_A::PIN0) + pub fn pin0(self) -> &'a mut crate::W { + self.variant(Extipinsel4::Pin0) } #[doc = "OFFSET=1"] #[inline(always)] - pub fn pin1(self) -> &'a mut W { - self.variant(EXTIPINSEL4_A::PIN1) + pub fn pin1(self) -> &'a mut crate::W { + self.variant(Extipinsel4::Pin1) } #[doc = "OFFSET=2"] #[inline(always)] - pub fn pin2(self) -> &'a mut W { - self.variant(EXTIPINSEL4_A::PIN2) + pub fn pin2(self) -> &'a mut crate::W { + self.variant(Extipinsel4::Pin2) } #[doc = "OFFSET=3"] #[inline(always)] - pub fn pin3(self) -> &'a mut W { - self.variant(EXTIPINSEL4_A::PIN3) + pub fn pin3(self) -> &'a mut crate::W { + self.variant(Extipinsel4::Pin3) } } -#[doc = "Field `EXTIPINSEL5` reader - External Interrupt Pin select"] -pub type EXTIPINSEL5_R = crate::FieldReader; #[doc = "External Interrupt Pin select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPINSEL5_A { +pub enum Extipinsel5 { #[doc = "0: OFFSET=0"] - PIN0 = 0, + Pin0 = 0, #[doc = "1: OFFSET=1"] - PIN1 = 1, + Pin1 = 1, #[doc = "2: OFFSET=2"] - PIN2 = 2, + Pin2 = 2, #[doc = "3: OFFSET=3"] - PIN3 = 3, + Pin3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPINSEL5_A) -> Self { + fn from(variant: Extipinsel5) -> Self { variant as _ } } -impl EXTIPINSEL5_R { +impl crate::FieldSpec for Extipinsel5 { + type Ux = u8; +} +impl crate::IsEnum for Extipinsel5 {} +#[doc = "Field `EXTIPINSEL5` reader - External Interrupt Pin select"] +pub type Extipinsel5R = crate::FieldReader; +impl Extipinsel5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPINSEL5_A { + pub const fn variant(&self) -> Extipinsel5 { match self.bits { - 0 => EXTIPINSEL5_A::PIN0, - 1 => EXTIPINSEL5_A::PIN1, - 2 => EXTIPINSEL5_A::PIN2, - 3 => EXTIPINSEL5_A::PIN3, + 0 => Extipinsel5::Pin0, + 1 => Extipinsel5::Pin1, + 2 => Extipinsel5::Pin2, + 3 => Extipinsel5::Pin3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN0`"] + #[doc = "OFFSET=0"] #[inline(always)] pub fn is_pin0(&self) -> bool { - *self == EXTIPINSEL5_A::PIN0 + *self == Extipinsel5::Pin0 } - #[doc = "Checks if the value of the field is `PIN1`"] + #[doc = "OFFSET=1"] #[inline(always)] pub fn is_pin1(&self) -> bool { - *self == EXTIPINSEL5_A::PIN1 + *self == Extipinsel5::Pin1 } - #[doc = "Checks if the value of the field is `PIN2`"] + #[doc = "OFFSET=2"] #[inline(always)] pub fn is_pin2(&self) -> bool { - *self == EXTIPINSEL5_A::PIN2 + *self == Extipinsel5::Pin2 } - #[doc = "Checks if the value of the field is `PIN3`"] + #[doc = "OFFSET=3"] #[inline(always)] pub fn is_pin3(&self) -> bool { - *self == EXTIPINSEL5_A::PIN3 + *self == Extipinsel5::Pin3 } } #[doc = "Field `EXTIPINSEL5` writer - External Interrupt Pin select"] -pub type EXTIPINSEL5_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPINSELL_SPEC, u8, EXTIPINSEL5_A, 2, O>; -impl<'a, const O: u8> EXTIPINSEL5_W<'a, O> { +pub type Extipinsel5W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipinsel5, crate::Safe>; +impl<'a, REG> Extipinsel5W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "OFFSET=0"] #[inline(always)] - pub fn pin0(self) -> &'a mut W { - self.variant(EXTIPINSEL5_A::PIN0) + pub fn pin0(self) -> &'a mut crate::W { + self.variant(Extipinsel5::Pin0) } #[doc = "OFFSET=1"] #[inline(always)] - pub fn pin1(self) -> &'a mut W { - self.variant(EXTIPINSEL5_A::PIN1) + pub fn pin1(self) -> &'a mut crate::W { + self.variant(Extipinsel5::Pin1) } #[doc = "OFFSET=2"] #[inline(always)] - pub fn pin2(self) -> &'a mut W { - self.variant(EXTIPINSEL5_A::PIN2) + pub fn pin2(self) -> &'a mut crate::W { + self.variant(Extipinsel5::Pin2) } #[doc = "OFFSET=3"] #[inline(always)] - pub fn pin3(self) -> &'a mut W { - self.variant(EXTIPINSEL5_A::PIN3) + pub fn pin3(self) -> &'a mut crate::W { + self.variant(Extipinsel5::Pin3) } } -#[doc = "Field `EXTIPINSEL6` reader - External Interrupt Pin select"] -pub type EXTIPINSEL6_R = crate::FieldReader; #[doc = "External Interrupt Pin select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPINSEL6_A { +pub enum Extipinsel6 { #[doc = "0: OFFSET=0"] - PIN0 = 0, + Pin0 = 0, #[doc = "1: OFFSET=1"] - PIN1 = 1, + Pin1 = 1, #[doc = "2: OFFSET=2"] - PIN2 = 2, + Pin2 = 2, #[doc = "3: OFFSET=3"] - PIN3 = 3, + Pin3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPINSEL6_A) -> Self { + fn from(variant: Extipinsel6) -> Self { variant as _ } } -impl EXTIPINSEL6_R { +impl crate::FieldSpec for Extipinsel6 { + type Ux = u8; +} +impl crate::IsEnum for Extipinsel6 {} +#[doc = "Field `EXTIPINSEL6` reader - External Interrupt Pin select"] +pub type Extipinsel6R = crate::FieldReader; +impl Extipinsel6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPINSEL6_A { + pub const fn variant(&self) -> Extipinsel6 { match self.bits { - 0 => EXTIPINSEL6_A::PIN0, - 1 => EXTIPINSEL6_A::PIN1, - 2 => EXTIPINSEL6_A::PIN2, - 3 => EXTIPINSEL6_A::PIN3, + 0 => Extipinsel6::Pin0, + 1 => Extipinsel6::Pin1, + 2 => Extipinsel6::Pin2, + 3 => Extipinsel6::Pin3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN0`"] + #[doc = "OFFSET=0"] #[inline(always)] pub fn is_pin0(&self) -> bool { - *self == EXTIPINSEL6_A::PIN0 + *self == Extipinsel6::Pin0 } - #[doc = "Checks if the value of the field is `PIN1`"] + #[doc = "OFFSET=1"] #[inline(always)] pub fn is_pin1(&self) -> bool { - *self == EXTIPINSEL6_A::PIN1 + *self == Extipinsel6::Pin1 } - #[doc = "Checks if the value of the field is `PIN2`"] + #[doc = "OFFSET=2"] #[inline(always)] pub fn is_pin2(&self) -> bool { - *self == EXTIPINSEL6_A::PIN2 + *self == Extipinsel6::Pin2 } - #[doc = "Checks if the value of the field is `PIN3`"] + #[doc = "OFFSET=3"] #[inline(always)] pub fn is_pin3(&self) -> bool { - *self == EXTIPINSEL6_A::PIN3 + *self == Extipinsel6::Pin3 } } #[doc = "Field `EXTIPINSEL6` writer - External Interrupt Pin select"] -pub type EXTIPINSEL6_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPINSELL_SPEC, u8, EXTIPINSEL6_A, 2, O>; -impl<'a, const O: u8> EXTIPINSEL6_W<'a, O> { +pub type Extipinsel6W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipinsel6, crate::Safe>; +impl<'a, REG> Extipinsel6W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "OFFSET=0"] #[inline(always)] - pub fn pin0(self) -> &'a mut W { - self.variant(EXTIPINSEL6_A::PIN0) + pub fn pin0(self) -> &'a mut crate::W { + self.variant(Extipinsel6::Pin0) } #[doc = "OFFSET=1"] #[inline(always)] - pub fn pin1(self) -> &'a mut W { - self.variant(EXTIPINSEL6_A::PIN1) + pub fn pin1(self) -> &'a mut crate::W { + self.variant(Extipinsel6::Pin1) } #[doc = "OFFSET=2"] #[inline(always)] - pub fn pin2(self) -> &'a mut W { - self.variant(EXTIPINSEL6_A::PIN2) + pub fn pin2(self) -> &'a mut crate::W { + self.variant(Extipinsel6::Pin2) } #[doc = "OFFSET=3"] #[inline(always)] - pub fn pin3(self) -> &'a mut W { - self.variant(EXTIPINSEL6_A::PIN3) + pub fn pin3(self) -> &'a mut crate::W { + self.variant(Extipinsel6::Pin3) } } -#[doc = "Field `EXTIPINSEL7` reader - External Interrupt Pin select"] -pub type EXTIPINSEL7_R = crate::FieldReader; #[doc = "External Interrupt Pin select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPINSEL7_A { +pub enum Extipinsel7 { #[doc = "0: OFFSET=0"] - PIN0 = 0, + Pin0 = 0, #[doc = "1: OFFSET=1"] - PIN1 = 1, + Pin1 = 1, #[doc = "2: OFFSET=2"] - PIN2 = 2, + Pin2 = 2, #[doc = "3: OFFSET=3"] - PIN3 = 3, + Pin3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPINSEL7_A) -> Self { + fn from(variant: Extipinsel7) -> Self { variant as _ } } -impl EXTIPINSEL7_R { +impl crate::FieldSpec for Extipinsel7 { + type Ux = u8; +} +impl crate::IsEnum for Extipinsel7 {} +#[doc = "Field `EXTIPINSEL7` reader - External Interrupt Pin select"] +pub type Extipinsel7R = crate::FieldReader; +impl Extipinsel7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPINSEL7_A { + pub const fn variant(&self) -> Extipinsel7 { match self.bits { - 0 => EXTIPINSEL7_A::PIN0, - 1 => EXTIPINSEL7_A::PIN1, - 2 => EXTIPINSEL7_A::PIN2, - 3 => EXTIPINSEL7_A::PIN3, + 0 => Extipinsel7::Pin0, + 1 => Extipinsel7::Pin1, + 2 => Extipinsel7::Pin2, + 3 => Extipinsel7::Pin3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN0`"] + #[doc = "OFFSET=0"] #[inline(always)] pub fn is_pin0(&self) -> bool { - *self == EXTIPINSEL7_A::PIN0 + *self == Extipinsel7::Pin0 } - #[doc = "Checks if the value of the field is `PIN1`"] + #[doc = "OFFSET=1"] #[inline(always)] pub fn is_pin1(&self) -> bool { - *self == EXTIPINSEL7_A::PIN1 + *self == Extipinsel7::Pin1 } - #[doc = "Checks if the value of the field is `PIN2`"] + #[doc = "OFFSET=2"] #[inline(always)] pub fn is_pin2(&self) -> bool { - *self == EXTIPINSEL7_A::PIN2 + *self == Extipinsel7::Pin2 } - #[doc = "Checks if the value of the field is `PIN3`"] + #[doc = "OFFSET=3"] #[inline(always)] pub fn is_pin3(&self) -> bool { - *self == EXTIPINSEL7_A::PIN3 + *self == Extipinsel7::Pin3 } } #[doc = "Field `EXTIPINSEL7` writer - External Interrupt Pin select"] -pub type EXTIPINSEL7_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPINSELL_SPEC, u8, EXTIPINSEL7_A, 2, O>; -impl<'a, const O: u8> EXTIPINSEL7_W<'a, O> { +pub type Extipinsel7W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipinsel7, crate::Safe>; +impl<'a, REG> Extipinsel7W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "OFFSET=0"] #[inline(always)] - pub fn pin0(self) -> &'a mut W { - self.variant(EXTIPINSEL7_A::PIN0) + pub fn pin0(self) -> &'a mut crate::W { + self.variant(Extipinsel7::Pin0) } #[doc = "OFFSET=1"] #[inline(always)] - pub fn pin1(self) -> &'a mut W { - self.variant(EXTIPINSEL7_A::PIN1) + pub fn pin1(self) -> &'a mut crate::W { + self.variant(Extipinsel7::Pin1) } #[doc = "OFFSET=2"] #[inline(always)] - pub fn pin2(self) -> &'a mut W { - self.variant(EXTIPINSEL7_A::PIN2) + pub fn pin2(self) -> &'a mut crate::W { + self.variant(Extipinsel7::Pin2) } #[doc = "OFFSET=3"] #[inline(always)] - pub fn pin3(self) -> &'a mut W { - self.variant(EXTIPINSEL7_A::PIN3) + pub fn pin3(self) -> &'a mut crate::W { + self.variant(Extipinsel7::Pin3) } } impl R { #[doc = "Bits 0:1 - External Interrupt Pin select"] #[inline(always)] - pub fn extipinsel0(&self) -> EXTIPINSEL0_R { - EXTIPINSEL0_R::new((self.bits & 3) as u8) + pub fn extipinsel0(&self) -> Extipinsel0R { + Extipinsel0R::new((self.bits & 3) as u8) } #[doc = "Bits 4:5 - External Interrupt Pin select"] #[inline(always)] - pub fn extipinsel1(&self) -> EXTIPINSEL1_R { - EXTIPINSEL1_R::new(((self.bits >> 4) & 3) as u8) + pub fn extipinsel1(&self) -> Extipinsel1R { + Extipinsel1R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 8:9 - External Interrupt Pin select"] #[inline(always)] - pub fn extipinsel2(&self) -> EXTIPINSEL2_R { - EXTIPINSEL2_R::new(((self.bits >> 8) & 3) as u8) + pub fn extipinsel2(&self) -> Extipinsel2R { + Extipinsel2R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 12:13 - External Interrupt Pin select"] #[inline(always)] - pub fn extipinsel3(&self) -> EXTIPINSEL3_R { - EXTIPINSEL3_R::new(((self.bits >> 12) & 3) as u8) + pub fn extipinsel3(&self) -> Extipinsel3R { + Extipinsel3R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 16:17 - External Interrupt Pin select"] #[inline(always)] - pub fn extipinsel4(&self) -> EXTIPINSEL4_R { - EXTIPINSEL4_R::new(((self.bits >> 16) & 3) as u8) + pub fn extipinsel4(&self) -> Extipinsel4R { + Extipinsel4R::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 20:21 - External Interrupt Pin select"] #[inline(always)] - pub fn extipinsel5(&self) -> EXTIPINSEL5_R { - EXTIPINSEL5_R::new(((self.bits >> 20) & 3) as u8) + pub fn extipinsel5(&self) -> Extipinsel5R { + Extipinsel5R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 24:25 - External Interrupt Pin select"] #[inline(always)] - pub fn extipinsel6(&self) -> EXTIPINSEL6_R { - EXTIPINSEL6_R::new(((self.bits >> 24) & 3) as u8) + pub fn extipinsel6(&self) -> Extipinsel6R { + Extipinsel6R::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 28:29 - External Interrupt Pin select"] #[inline(always)] - pub fn extipinsel7(&self) -> EXTIPINSEL7_R { - EXTIPINSEL7_R::new(((self.bits >> 28) & 3) as u8) + pub fn extipinsel7(&self) -> Extipinsel7R { + Extipinsel7R::new(((self.bits >> 28) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - External Interrupt Pin select"] #[inline(always)] #[must_use] - pub fn extipinsel0(&mut self) -> EXTIPINSEL0_W<0> { - EXTIPINSEL0_W::new(self) + pub fn extipinsel0(&mut self) -> Extipinsel0W { + Extipinsel0W::new(self, 0) } #[doc = "Bits 4:5 - External Interrupt Pin select"] #[inline(always)] #[must_use] - pub fn extipinsel1(&mut self) -> EXTIPINSEL1_W<4> { - EXTIPINSEL1_W::new(self) + pub fn extipinsel1(&mut self) -> Extipinsel1W { + Extipinsel1W::new(self, 4) } #[doc = "Bits 8:9 - External Interrupt Pin select"] #[inline(always)] #[must_use] - pub fn extipinsel2(&mut self) -> EXTIPINSEL2_W<8> { - EXTIPINSEL2_W::new(self) + pub fn extipinsel2(&mut self) -> Extipinsel2W { + Extipinsel2W::new(self, 8) } #[doc = "Bits 12:13 - External Interrupt Pin select"] #[inline(always)] #[must_use] - pub fn extipinsel3(&mut self) -> EXTIPINSEL3_W<12> { - EXTIPINSEL3_W::new(self) + pub fn extipinsel3(&mut self) -> Extipinsel3W { + Extipinsel3W::new(self, 12) } #[doc = "Bits 16:17 - External Interrupt Pin select"] #[inline(always)] #[must_use] - pub fn extipinsel4(&mut self) -> EXTIPINSEL4_W<16> { - EXTIPINSEL4_W::new(self) + pub fn extipinsel4(&mut self) -> Extipinsel4W { + Extipinsel4W::new(self, 16) } #[doc = "Bits 20:21 - External Interrupt Pin select"] #[inline(always)] #[must_use] - pub fn extipinsel5(&mut self) -> EXTIPINSEL5_W<20> { - EXTIPINSEL5_W::new(self) + pub fn extipinsel5(&mut self) -> Extipinsel5W { + Extipinsel5W::new(self, 20) } #[doc = "Bits 24:25 - External Interrupt Pin select"] #[inline(always)] #[must_use] - pub fn extipinsel6(&mut self) -> EXTIPINSEL6_W<24> { - EXTIPINSEL6_W::new(self) + pub fn extipinsel6(&mut self) -> Extipinsel6W { + Extipinsel6W::new(self, 24) } #[doc = "Bits 28:29 - External Interrupt Pin select"] #[inline(always)] #[must_use] - pub fn extipinsel7(&mut self) -> EXTIPINSEL7_W<28> { - EXTIPINSEL7_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn extipinsel7(&mut self) -> Extipinsel7W { + Extipinsel7W::new(self, 28) } } -#[doc = "External Interrupt Pin Select Low\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [extipinsell](index.html) module"] -pub struct EXTIPINSELL_SPEC; -impl crate::RegisterSpec for EXTIPINSELL_SPEC { +#[doc = "External Interrupt Pin Select Low\n\nYou can [`read`](crate::Reg::read) this register and get [`extipinsell::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`extipinsell::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ExtipinsellSpec; +impl crate::RegisterSpec for ExtipinsellSpec { type Ux = u32; } -#[doc = "`read()` method returns [extipinsell::R](R) reader structure"] -impl crate::Readable for EXTIPINSELL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [extipinsell::W](W) writer structure"] -impl crate::Writable for EXTIPINSELL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`extipinsell::R`](R) reader structure"] +impl crate::Readable for ExtipinsellSpec {} +#[doc = "`write(|w| ..)` method takes [`extipinsell::W`](W) writer structure"] +impl crate::Writable for ExtipinsellSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EXTIPINSELL to value 0"] -impl crate::Resettable for EXTIPINSELL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ExtipinsellSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/extipselh.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/extipselh.rs index 2824b51..0084195 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/extipselh.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/extipselh.rs @@ -1,425 +1,413 @@ #[doc = "Register `EXTIPSELH` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EXTIPSELH` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EXTIPSEL0` reader - External Interrupt Port Select"] -pub type EXTIPSEL0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "External Interrupt Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPSEL0_A { +pub enum Extipsel0 { #[doc = "0: Port A group selected"] - PORTA = 0, + Porta = 0, #[doc = "1: Port B group selected"] - PORTB = 1, + Portb = 1, #[doc = "2: Port C group selected"] - PORTC = 2, + Portc = 2, #[doc = "3: Port D group selected"] - PORTD = 3, + Portd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPSEL0_A) -> Self { + fn from(variant: Extipsel0) -> Self { variant as _ } } -impl EXTIPSEL0_R { +impl crate::FieldSpec for Extipsel0 { + type Ux = u8; +} +impl crate::IsEnum for Extipsel0 {} +#[doc = "Field `EXTIPSEL0` reader - External Interrupt Port Select"] +pub type Extipsel0R = crate::FieldReader; +impl Extipsel0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPSEL0_A { + pub const fn variant(&self) -> Extipsel0 { match self.bits { - 0 => EXTIPSEL0_A::PORTA, - 1 => EXTIPSEL0_A::PORTB, - 2 => EXTIPSEL0_A::PORTC, - 3 => EXTIPSEL0_A::PORTD, + 0 => Extipsel0::Porta, + 1 => Extipsel0::Portb, + 2 => Extipsel0::Portc, + 3 => Extipsel0::Portd, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A group selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == EXTIPSEL0_A::PORTA + *self == Extipsel0::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B group selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == EXTIPSEL0_A::PORTB + *self == Extipsel0::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C group selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == EXTIPSEL0_A::PORTC + *self == Extipsel0::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D group selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == EXTIPSEL0_A::PORTD + *self == Extipsel0::Portd } } #[doc = "Field `EXTIPSEL0` writer - External Interrupt Port Select"] -pub type EXTIPSEL0_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPSELH_SPEC, u8, EXTIPSEL0_A, 2, O>; -impl<'a, const O: u8> EXTIPSEL0_W<'a, O> { +pub type Extipsel0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipsel0, crate::Safe>; +impl<'a, REG> Extipsel0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Port A group selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(EXTIPSEL0_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Extipsel0::Porta) } #[doc = "Port B group selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(EXTIPSEL0_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Extipsel0::Portb) } #[doc = "Port C group selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(EXTIPSEL0_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Extipsel0::Portc) } #[doc = "Port D group selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(EXTIPSEL0_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Extipsel0::Portd) } } -#[doc = "Field `EXTIPSEL1` reader - External Interrupt Port Select"] -pub type EXTIPSEL1_R = crate::FieldReader; #[doc = "External Interrupt Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPSEL1_A { +pub enum Extipsel1 { #[doc = "0: Port A group selected"] - PORTA = 0, + Porta = 0, #[doc = "1: Port B group selected"] - PORTB = 1, + Portb = 1, #[doc = "2: Port C group selected"] - PORTC = 2, + Portc = 2, #[doc = "3: Port D group selected"] - PORTD = 3, + Portd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPSEL1_A) -> Self { + fn from(variant: Extipsel1) -> Self { variant as _ } } -impl EXTIPSEL1_R { +impl crate::FieldSpec for Extipsel1 { + type Ux = u8; +} +impl crate::IsEnum for Extipsel1 {} +#[doc = "Field `EXTIPSEL1` reader - External Interrupt Port Select"] +pub type Extipsel1R = crate::FieldReader; +impl Extipsel1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPSEL1_A { + pub const fn variant(&self) -> Extipsel1 { match self.bits { - 0 => EXTIPSEL1_A::PORTA, - 1 => EXTIPSEL1_A::PORTB, - 2 => EXTIPSEL1_A::PORTC, - 3 => EXTIPSEL1_A::PORTD, + 0 => Extipsel1::Porta, + 1 => Extipsel1::Portb, + 2 => Extipsel1::Portc, + 3 => Extipsel1::Portd, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A group selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == EXTIPSEL1_A::PORTA + *self == Extipsel1::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B group selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == EXTIPSEL1_A::PORTB + *self == Extipsel1::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C group selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == EXTIPSEL1_A::PORTC + *self == Extipsel1::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D group selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == EXTIPSEL1_A::PORTD + *self == Extipsel1::Portd } } #[doc = "Field `EXTIPSEL1` writer - External Interrupt Port Select"] -pub type EXTIPSEL1_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPSELH_SPEC, u8, EXTIPSEL1_A, 2, O>; -impl<'a, const O: u8> EXTIPSEL1_W<'a, O> { +pub type Extipsel1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipsel1, crate::Safe>; +impl<'a, REG> Extipsel1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Port A group selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(EXTIPSEL1_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Extipsel1::Porta) } #[doc = "Port B group selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(EXTIPSEL1_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Extipsel1::Portb) } #[doc = "Port C group selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(EXTIPSEL1_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Extipsel1::Portc) } #[doc = "Port D group selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(EXTIPSEL1_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Extipsel1::Portd) } } -#[doc = "Field `EXTIPSEL2` reader - External Interrupt Port Select"] -pub type EXTIPSEL2_R = crate::FieldReader; #[doc = "External Interrupt Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPSEL2_A { +pub enum Extipsel2 { #[doc = "0: Port A group selected"] - PORTA = 0, + Porta = 0, #[doc = "1: Port B group selected"] - PORTB = 1, + Portb = 1, #[doc = "2: Port C group selected"] - PORTC = 2, + Portc = 2, #[doc = "3: Port D group selected"] - PORTD = 3, + Portd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPSEL2_A) -> Self { + fn from(variant: Extipsel2) -> Self { variant as _ } } -impl EXTIPSEL2_R { +impl crate::FieldSpec for Extipsel2 { + type Ux = u8; +} +impl crate::IsEnum for Extipsel2 {} +#[doc = "Field `EXTIPSEL2` reader - External Interrupt Port Select"] +pub type Extipsel2R = crate::FieldReader; +impl Extipsel2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPSEL2_A { + pub const fn variant(&self) -> Extipsel2 { match self.bits { - 0 => EXTIPSEL2_A::PORTA, - 1 => EXTIPSEL2_A::PORTB, - 2 => EXTIPSEL2_A::PORTC, - 3 => EXTIPSEL2_A::PORTD, + 0 => Extipsel2::Porta, + 1 => Extipsel2::Portb, + 2 => Extipsel2::Portc, + 3 => Extipsel2::Portd, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A group selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == EXTIPSEL2_A::PORTA + *self == Extipsel2::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B group selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == EXTIPSEL2_A::PORTB + *self == Extipsel2::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C group selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == EXTIPSEL2_A::PORTC + *self == Extipsel2::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D group selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == EXTIPSEL2_A::PORTD + *self == Extipsel2::Portd } } #[doc = "Field `EXTIPSEL2` writer - External Interrupt Port Select"] -pub type EXTIPSEL2_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPSELH_SPEC, u8, EXTIPSEL2_A, 2, O>; -impl<'a, const O: u8> EXTIPSEL2_W<'a, O> { +pub type Extipsel2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipsel2, crate::Safe>; +impl<'a, REG> Extipsel2W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Port A group selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(EXTIPSEL2_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Extipsel2::Porta) } #[doc = "Port B group selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(EXTIPSEL2_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Extipsel2::Portb) } #[doc = "Port C group selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(EXTIPSEL2_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Extipsel2::Portc) } #[doc = "Port D group selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(EXTIPSEL2_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Extipsel2::Portd) } } -#[doc = "Field `EXTIPSEL3` reader - External Interrupt Port Select"] -pub type EXTIPSEL3_R = crate::FieldReader; #[doc = "External Interrupt Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPSEL3_A { +pub enum Extipsel3 { #[doc = "0: Port A group selected"] - PORTA = 0, + Porta = 0, #[doc = "1: Port B group selected"] - PORTB = 1, + Portb = 1, #[doc = "2: Port C group selected"] - PORTC = 2, + Portc = 2, #[doc = "3: Port D group selected"] - PORTD = 3, + Portd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPSEL3_A) -> Self { + fn from(variant: Extipsel3) -> Self { variant as _ } } -impl EXTIPSEL3_R { +impl crate::FieldSpec for Extipsel3 { + type Ux = u8; +} +impl crate::IsEnum for Extipsel3 {} +#[doc = "Field `EXTIPSEL3` reader - External Interrupt Port Select"] +pub type Extipsel3R = crate::FieldReader; +impl Extipsel3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPSEL3_A { + pub const fn variant(&self) -> Extipsel3 { match self.bits { - 0 => EXTIPSEL3_A::PORTA, - 1 => EXTIPSEL3_A::PORTB, - 2 => EXTIPSEL3_A::PORTC, - 3 => EXTIPSEL3_A::PORTD, + 0 => Extipsel3::Porta, + 1 => Extipsel3::Portb, + 2 => Extipsel3::Portc, + 3 => Extipsel3::Portd, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A group selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == EXTIPSEL3_A::PORTA + *self == Extipsel3::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B group selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == EXTIPSEL3_A::PORTB + *self == Extipsel3::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C group selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == EXTIPSEL3_A::PORTC + *self == Extipsel3::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D group selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == EXTIPSEL3_A::PORTD + *self == Extipsel3::Portd } } #[doc = "Field `EXTIPSEL3` writer - External Interrupt Port Select"] -pub type EXTIPSEL3_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPSELH_SPEC, u8, EXTIPSEL3_A, 2, O>; -impl<'a, const O: u8> EXTIPSEL3_W<'a, O> { +pub type Extipsel3W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipsel3, crate::Safe>; +impl<'a, REG> Extipsel3W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Port A group selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(EXTIPSEL3_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Extipsel3::Porta) } #[doc = "Port B group selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(EXTIPSEL3_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Extipsel3::Portb) } #[doc = "Port C group selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(EXTIPSEL3_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Extipsel3::Portc) } #[doc = "Port D group selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(EXTIPSEL3_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Extipsel3::Portd) } } impl R { #[doc = "Bits 0:1 - External Interrupt Port Select"] #[inline(always)] - pub fn extipsel0(&self) -> EXTIPSEL0_R { - EXTIPSEL0_R::new((self.bits & 3) as u8) + pub fn extipsel0(&self) -> Extipsel0R { + Extipsel0R::new((self.bits & 3) as u8) } #[doc = "Bits 4:5 - External Interrupt Port Select"] #[inline(always)] - pub fn extipsel1(&self) -> EXTIPSEL1_R { - EXTIPSEL1_R::new(((self.bits >> 4) & 3) as u8) + pub fn extipsel1(&self) -> Extipsel1R { + Extipsel1R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 8:9 - External Interrupt Port Select"] #[inline(always)] - pub fn extipsel2(&self) -> EXTIPSEL2_R { - EXTIPSEL2_R::new(((self.bits >> 8) & 3) as u8) + pub fn extipsel2(&self) -> Extipsel2R { + Extipsel2R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 12:13 - External Interrupt Port Select"] #[inline(always)] - pub fn extipsel3(&self) -> EXTIPSEL3_R { - EXTIPSEL3_R::new(((self.bits >> 12) & 3) as u8) + pub fn extipsel3(&self) -> Extipsel3R { + Extipsel3R::new(((self.bits >> 12) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - External Interrupt Port Select"] #[inline(always)] #[must_use] - pub fn extipsel0(&mut self) -> EXTIPSEL0_W<0> { - EXTIPSEL0_W::new(self) + pub fn extipsel0(&mut self) -> Extipsel0W { + Extipsel0W::new(self, 0) } #[doc = "Bits 4:5 - External Interrupt Port Select"] #[inline(always)] #[must_use] - pub fn extipsel1(&mut self) -> EXTIPSEL1_W<4> { - EXTIPSEL1_W::new(self) + pub fn extipsel1(&mut self) -> Extipsel1W { + Extipsel1W::new(self, 4) } #[doc = "Bits 8:9 - External Interrupt Port Select"] #[inline(always)] #[must_use] - pub fn extipsel2(&mut self) -> EXTIPSEL2_W<8> { - EXTIPSEL2_W::new(self) + pub fn extipsel2(&mut self) -> Extipsel2W { + Extipsel2W::new(self, 8) } #[doc = "Bits 12:13 - External Interrupt Port Select"] #[inline(always)] #[must_use] - pub fn extipsel3(&mut self) -> EXTIPSEL3_W<12> { - EXTIPSEL3_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn extipsel3(&mut self) -> Extipsel3W { + Extipsel3W::new(self, 12) } } -#[doc = "External interrupt Port Select High\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [extipselh](index.html) module"] -pub struct EXTIPSELH_SPEC; -impl crate::RegisterSpec for EXTIPSELH_SPEC { +#[doc = "External interrupt Port Select High\n\nYou can [`read`](crate::Reg::read) this register and get [`extipselh::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`extipselh::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ExtipselhSpec; +impl crate::RegisterSpec for ExtipselhSpec { type Ux = u32; } -#[doc = "`read()` method returns [extipselh::R](R) reader structure"] -impl crate::Readable for EXTIPSELH_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [extipselh::W](W) writer structure"] -impl crate::Writable for EXTIPSELH_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`extipselh::R`](R) reader structure"] +impl crate::Readable for ExtipselhSpec {} +#[doc = "`write(|w| ..)` method takes [`extipselh::W`](W) writer structure"] +impl crate::Writable for ExtipselhSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EXTIPSELH to value 0"] -impl crate::Resettable for EXTIPSELH_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ExtipselhSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/extipsell.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/extipsell.rs index e09d6f1..ff3b3f2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/extipsell.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/extipsell.rs @@ -1,785 +1,801 @@ #[doc = "Register `EXTIPSELL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EXTIPSELL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EXTIPSEL0` reader - External Interrupt Port Select"] -pub type EXTIPSEL0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "External Interrupt Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPSEL0_A { +pub enum Extipsel0 { #[doc = "0: Port A group selected"] - PORTA = 0, + Porta = 0, #[doc = "1: Port B group selected"] - PORTB = 1, + Portb = 1, #[doc = "2: Port C group selected"] - PORTC = 2, + Portc = 2, #[doc = "3: Port D group selected"] - PORTD = 3, + Portd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPSEL0_A) -> Self { + fn from(variant: Extipsel0) -> Self { variant as _ } } -impl EXTIPSEL0_R { +impl crate::FieldSpec for Extipsel0 { + type Ux = u8; +} +impl crate::IsEnum for Extipsel0 {} +#[doc = "Field `EXTIPSEL0` reader - External Interrupt Port Select"] +pub type Extipsel0R = crate::FieldReader; +impl Extipsel0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPSEL0_A { + pub const fn variant(&self) -> Extipsel0 { match self.bits { - 0 => EXTIPSEL0_A::PORTA, - 1 => EXTIPSEL0_A::PORTB, - 2 => EXTIPSEL0_A::PORTC, - 3 => EXTIPSEL0_A::PORTD, + 0 => Extipsel0::Porta, + 1 => Extipsel0::Portb, + 2 => Extipsel0::Portc, + 3 => Extipsel0::Portd, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A group selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == EXTIPSEL0_A::PORTA + *self == Extipsel0::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B group selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == EXTIPSEL0_A::PORTB + *self == Extipsel0::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C group selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == EXTIPSEL0_A::PORTC + *self == Extipsel0::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D group selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == EXTIPSEL0_A::PORTD + *self == Extipsel0::Portd } } #[doc = "Field `EXTIPSEL0` writer - External Interrupt Port Select"] -pub type EXTIPSEL0_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL0_A, 2, O>; -impl<'a, const O: u8> EXTIPSEL0_W<'a, O> { +pub type Extipsel0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipsel0, crate::Safe>; +impl<'a, REG> Extipsel0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Port A group selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(EXTIPSEL0_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Extipsel0::Porta) } #[doc = "Port B group selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(EXTIPSEL0_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Extipsel0::Portb) } #[doc = "Port C group selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(EXTIPSEL0_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Extipsel0::Portc) } #[doc = "Port D group selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(EXTIPSEL0_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Extipsel0::Portd) } } -#[doc = "Field `EXTIPSEL1` reader - External Interrupt Port Select"] -pub type EXTIPSEL1_R = crate::FieldReader; #[doc = "External Interrupt Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPSEL1_A { +pub enum Extipsel1 { #[doc = "0: Port A group selected"] - PORTA = 0, + Porta = 0, #[doc = "1: Port B group selected"] - PORTB = 1, + Portb = 1, #[doc = "2: Port C group selected"] - PORTC = 2, + Portc = 2, #[doc = "3: Port D group selected"] - PORTD = 3, + Portd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPSEL1_A) -> Self { + fn from(variant: Extipsel1) -> Self { variant as _ } } -impl EXTIPSEL1_R { +impl crate::FieldSpec for Extipsel1 { + type Ux = u8; +} +impl crate::IsEnum for Extipsel1 {} +#[doc = "Field `EXTIPSEL1` reader - External Interrupt Port Select"] +pub type Extipsel1R = crate::FieldReader; +impl Extipsel1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPSEL1_A { + pub const fn variant(&self) -> Extipsel1 { match self.bits { - 0 => EXTIPSEL1_A::PORTA, - 1 => EXTIPSEL1_A::PORTB, - 2 => EXTIPSEL1_A::PORTC, - 3 => EXTIPSEL1_A::PORTD, + 0 => Extipsel1::Porta, + 1 => Extipsel1::Portb, + 2 => Extipsel1::Portc, + 3 => Extipsel1::Portd, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A group selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == EXTIPSEL1_A::PORTA + *self == Extipsel1::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B group selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == EXTIPSEL1_A::PORTB + *self == Extipsel1::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C group selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == EXTIPSEL1_A::PORTC + *self == Extipsel1::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D group selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == EXTIPSEL1_A::PORTD + *self == Extipsel1::Portd } } #[doc = "Field `EXTIPSEL1` writer - External Interrupt Port Select"] -pub type EXTIPSEL1_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL1_A, 2, O>; -impl<'a, const O: u8> EXTIPSEL1_W<'a, O> { +pub type Extipsel1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipsel1, crate::Safe>; +impl<'a, REG> Extipsel1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Port A group selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(EXTIPSEL1_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Extipsel1::Porta) } #[doc = "Port B group selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(EXTIPSEL1_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Extipsel1::Portb) } #[doc = "Port C group selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(EXTIPSEL1_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Extipsel1::Portc) } #[doc = "Port D group selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(EXTIPSEL1_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Extipsel1::Portd) } } -#[doc = "Field `EXTIPSEL2` reader - External Interrupt Port Select"] -pub type EXTIPSEL2_R = crate::FieldReader; #[doc = "External Interrupt Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPSEL2_A { +pub enum Extipsel2 { #[doc = "0: Port A group selected"] - PORTA = 0, + Porta = 0, #[doc = "1: Port B group selected"] - PORTB = 1, + Portb = 1, #[doc = "2: Port C group selected"] - PORTC = 2, + Portc = 2, #[doc = "3: Port D group selected"] - PORTD = 3, + Portd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPSEL2_A) -> Self { + fn from(variant: Extipsel2) -> Self { variant as _ } } -impl EXTIPSEL2_R { +impl crate::FieldSpec for Extipsel2 { + type Ux = u8; +} +impl crate::IsEnum for Extipsel2 {} +#[doc = "Field `EXTIPSEL2` reader - External Interrupt Port Select"] +pub type Extipsel2R = crate::FieldReader; +impl Extipsel2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPSEL2_A { + pub const fn variant(&self) -> Extipsel2 { match self.bits { - 0 => EXTIPSEL2_A::PORTA, - 1 => EXTIPSEL2_A::PORTB, - 2 => EXTIPSEL2_A::PORTC, - 3 => EXTIPSEL2_A::PORTD, + 0 => Extipsel2::Porta, + 1 => Extipsel2::Portb, + 2 => Extipsel2::Portc, + 3 => Extipsel2::Portd, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A group selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == EXTIPSEL2_A::PORTA + *self == Extipsel2::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B group selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == EXTIPSEL2_A::PORTB + *self == Extipsel2::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C group selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == EXTIPSEL2_A::PORTC + *self == Extipsel2::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D group selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == EXTIPSEL2_A::PORTD + *self == Extipsel2::Portd } } #[doc = "Field `EXTIPSEL2` writer - External Interrupt Port Select"] -pub type EXTIPSEL2_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL2_A, 2, O>; -impl<'a, const O: u8> EXTIPSEL2_W<'a, O> { +pub type Extipsel2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipsel2, crate::Safe>; +impl<'a, REG> Extipsel2W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Port A group selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(EXTIPSEL2_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Extipsel2::Porta) } #[doc = "Port B group selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(EXTIPSEL2_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Extipsel2::Portb) } #[doc = "Port C group selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(EXTIPSEL2_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Extipsel2::Portc) } #[doc = "Port D group selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(EXTIPSEL2_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Extipsel2::Portd) } } -#[doc = "Field `EXTIPSEL3` reader - External Interrupt Port Select"] -pub type EXTIPSEL3_R = crate::FieldReader; #[doc = "External Interrupt Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPSEL3_A { +pub enum Extipsel3 { #[doc = "0: Port A group selected"] - PORTA = 0, + Porta = 0, #[doc = "1: Port B group selected"] - PORTB = 1, + Portb = 1, #[doc = "2: Port C group selected"] - PORTC = 2, + Portc = 2, #[doc = "3: Port D group selected"] - PORTD = 3, + Portd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPSEL3_A) -> Self { + fn from(variant: Extipsel3) -> Self { variant as _ } } -impl EXTIPSEL3_R { +impl crate::FieldSpec for Extipsel3 { + type Ux = u8; +} +impl crate::IsEnum for Extipsel3 {} +#[doc = "Field `EXTIPSEL3` reader - External Interrupt Port Select"] +pub type Extipsel3R = crate::FieldReader; +impl Extipsel3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPSEL3_A { + pub const fn variant(&self) -> Extipsel3 { match self.bits { - 0 => EXTIPSEL3_A::PORTA, - 1 => EXTIPSEL3_A::PORTB, - 2 => EXTIPSEL3_A::PORTC, - 3 => EXTIPSEL3_A::PORTD, + 0 => Extipsel3::Porta, + 1 => Extipsel3::Portb, + 2 => Extipsel3::Portc, + 3 => Extipsel3::Portd, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A group selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == EXTIPSEL3_A::PORTA + *self == Extipsel3::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B group selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == EXTIPSEL3_A::PORTB + *self == Extipsel3::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C group selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == EXTIPSEL3_A::PORTC + *self == Extipsel3::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D group selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == EXTIPSEL3_A::PORTD + *self == Extipsel3::Portd } } #[doc = "Field `EXTIPSEL3` writer - External Interrupt Port Select"] -pub type EXTIPSEL3_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL3_A, 2, O>; -impl<'a, const O: u8> EXTIPSEL3_W<'a, O> { +pub type Extipsel3W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipsel3, crate::Safe>; +impl<'a, REG> Extipsel3W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Port A group selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(EXTIPSEL3_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Extipsel3::Porta) } #[doc = "Port B group selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(EXTIPSEL3_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Extipsel3::Portb) } #[doc = "Port C group selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(EXTIPSEL3_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Extipsel3::Portc) } #[doc = "Port D group selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(EXTIPSEL3_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Extipsel3::Portd) } } -#[doc = "Field `EXTIPSEL4` reader - External Interrupt Port Select"] -pub type EXTIPSEL4_R = crate::FieldReader; #[doc = "External Interrupt Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPSEL4_A { +pub enum Extipsel4 { #[doc = "0: Port A group selected"] - PORTA = 0, + Porta = 0, #[doc = "1: Port B group selected"] - PORTB = 1, + Portb = 1, #[doc = "2: Port C group selected"] - PORTC = 2, + Portc = 2, #[doc = "3: Port D group selected"] - PORTD = 3, + Portd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPSEL4_A) -> Self { + fn from(variant: Extipsel4) -> Self { variant as _ } } -impl EXTIPSEL4_R { +impl crate::FieldSpec for Extipsel4 { + type Ux = u8; +} +impl crate::IsEnum for Extipsel4 {} +#[doc = "Field `EXTIPSEL4` reader - External Interrupt Port Select"] +pub type Extipsel4R = crate::FieldReader; +impl Extipsel4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPSEL4_A { + pub const fn variant(&self) -> Extipsel4 { match self.bits { - 0 => EXTIPSEL4_A::PORTA, - 1 => EXTIPSEL4_A::PORTB, - 2 => EXTIPSEL4_A::PORTC, - 3 => EXTIPSEL4_A::PORTD, + 0 => Extipsel4::Porta, + 1 => Extipsel4::Portb, + 2 => Extipsel4::Portc, + 3 => Extipsel4::Portd, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A group selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == EXTIPSEL4_A::PORTA + *self == Extipsel4::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B group selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == EXTIPSEL4_A::PORTB + *self == Extipsel4::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C group selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == EXTIPSEL4_A::PORTC + *self == Extipsel4::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D group selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == EXTIPSEL4_A::PORTD + *self == Extipsel4::Portd } } #[doc = "Field `EXTIPSEL4` writer - External Interrupt Port Select"] -pub type EXTIPSEL4_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL4_A, 2, O>; -impl<'a, const O: u8> EXTIPSEL4_W<'a, O> { +pub type Extipsel4W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipsel4, crate::Safe>; +impl<'a, REG> Extipsel4W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Port A group selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(EXTIPSEL4_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Extipsel4::Porta) } #[doc = "Port B group selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(EXTIPSEL4_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Extipsel4::Portb) } #[doc = "Port C group selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(EXTIPSEL4_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Extipsel4::Portc) } #[doc = "Port D group selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(EXTIPSEL4_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Extipsel4::Portd) } } -#[doc = "Field `EXTIPSEL5` reader - External Interrupt Port Select"] -pub type EXTIPSEL5_R = crate::FieldReader; #[doc = "External Interrupt Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPSEL5_A { +pub enum Extipsel5 { #[doc = "0: Port A group selected"] - PORTA = 0, + Porta = 0, #[doc = "1: Port B group selected"] - PORTB = 1, + Portb = 1, #[doc = "2: Port C group selected"] - PORTC = 2, + Portc = 2, #[doc = "3: Port D group selected"] - PORTD = 3, + Portd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPSEL5_A) -> Self { + fn from(variant: Extipsel5) -> Self { variant as _ } } -impl EXTIPSEL5_R { +impl crate::FieldSpec for Extipsel5 { + type Ux = u8; +} +impl crate::IsEnum for Extipsel5 {} +#[doc = "Field `EXTIPSEL5` reader - External Interrupt Port Select"] +pub type Extipsel5R = crate::FieldReader; +impl Extipsel5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPSEL5_A { + pub const fn variant(&self) -> Extipsel5 { match self.bits { - 0 => EXTIPSEL5_A::PORTA, - 1 => EXTIPSEL5_A::PORTB, - 2 => EXTIPSEL5_A::PORTC, - 3 => EXTIPSEL5_A::PORTD, + 0 => Extipsel5::Porta, + 1 => Extipsel5::Portb, + 2 => Extipsel5::Portc, + 3 => Extipsel5::Portd, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A group selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == EXTIPSEL5_A::PORTA + *self == Extipsel5::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B group selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == EXTIPSEL5_A::PORTB + *self == Extipsel5::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C group selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == EXTIPSEL5_A::PORTC + *self == Extipsel5::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D group selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == EXTIPSEL5_A::PORTD + *self == Extipsel5::Portd } } #[doc = "Field `EXTIPSEL5` writer - External Interrupt Port Select"] -pub type EXTIPSEL5_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL5_A, 2, O>; -impl<'a, const O: u8> EXTIPSEL5_W<'a, O> { +pub type Extipsel5W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipsel5, crate::Safe>; +impl<'a, REG> Extipsel5W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Port A group selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(EXTIPSEL5_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Extipsel5::Porta) } #[doc = "Port B group selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(EXTIPSEL5_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Extipsel5::Portb) } #[doc = "Port C group selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(EXTIPSEL5_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Extipsel5::Portc) } #[doc = "Port D group selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(EXTIPSEL5_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Extipsel5::Portd) } } -#[doc = "Field `EXTIPSEL6` reader - External Interrupt Port Select"] -pub type EXTIPSEL6_R = crate::FieldReader; #[doc = "External Interrupt Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPSEL6_A { +pub enum Extipsel6 { #[doc = "0: Port A group selected"] - PORTA = 0, + Porta = 0, #[doc = "1: Port B group selected"] - PORTB = 1, + Portb = 1, #[doc = "2: Port C group selected"] - PORTC = 2, + Portc = 2, #[doc = "3: Port D group selected"] - PORTD = 3, + Portd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPSEL6_A) -> Self { + fn from(variant: Extipsel6) -> Self { variant as _ } } -impl EXTIPSEL6_R { +impl crate::FieldSpec for Extipsel6 { + type Ux = u8; +} +impl crate::IsEnum for Extipsel6 {} +#[doc = "Field `EXTIPSEL6` reader - External Interrupt Port Select"] +pub type Extipsel6R = crate::FieldReader; +impl Extipsel6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPSEL6_A { + pub const fn variant(&self) -> Extipsel6 { match self.bits { - 0 => EXTIPSEL6_A::PORTA, - 1 => EXTIPSEL6_A::PORTB, - 2 => EXTIPSEL6_A::PORTC, - 3 => EXTIPSEL6_A::PORTD, + 0 => Extipsel6::Porta, + 1 => Extipsel6::Portb, + 2 => Extipsel6::Portc, + 3 => Extipsel6::Portd, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A group selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == EXTIPSEL6_A::PORTA + *self == Extipsel6::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B group selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == EXTIPSEL6_A::PORTB + *self == Extipsel6::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C group selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == EXTIPSEL6_A::PORTC + *self == Extipsel6::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D group selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == EXTIPSEL6_A::PORTD + *self == Extipsel6::Portd } } #[doc = "Field `EXTIPSEL6` writer - External Interrupt Port Select"] -pub type EXTIPSEL6_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL6_A, 2, O>; -impl<'a, const O: u8> EXTIPSEL6_W<'a, O> { +pub type Extipsel6W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipsel6, crate::Safe>; +impl<'a, REG> Extipsel6W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Port A group selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(EXTIPSEL6_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Extipsel6::Porta) } #[doc = "Port B group selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(EXTIPSEL6_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Extipsel6::Portb) } #[doc = "Port C group selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(EXTIPSEL6_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Extipsel6::Portc) } #[doc = "Port D group selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(EXTIPSEL6_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Extipsel6::Portd) } } -#[doc = "Field `EXTIPSEL7` reader - External Interrupt Port Select"] -pub type EXTIPSEL7_R = crate::FieldReader; #[doc = "External Interrupt Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTIPSEL7_A { +pub enum Extipsel7 { #[doc = "0: Port A group selected"] - PORTA = 0, + Porta = 0, #[doc = "1: Port B group selected"] - PORTB = 1, + Portb = 1, #[doc = "2: Port C group selected"] - PORTC = 2, + Portc = 2, #[doc = "3: Port D group selected"] - PORTD = 3, + Portd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTIPSEL7_A) -> Self { + fn from(variant: Extipsel7) -> Self { variant as _ } } -impl EXTIPSEL7_R { +impl crate::FieldSpec for Extipsel7 { + type Ux = u8; +} +impl crate::IsEnum for Extipsel7 {} +#[doc = "Field `EXTIPSEL7` reader - External Interrupt Port Select"] +pub type Extipsel7R = crate::FieldReader; +impl Extipsel7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EXTIPSEL7_A { + pub const fn variant(&self) -> Extipsel7 { match self.bits { - 0 => EXTIPSEL7_A::PORTA, - 1 => EXTIPSEL7_A::PORTB, - 2 => EXTIPSEL7_A::PORTC, - 3 => EXTIPSEL7_A::PORTD, + 0 => Extipsel7::Porta, + 1 => Extipsel7::Portb, + 2 => Extipsel7::Portc, + 3 => Extipsel7::Portd, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A group selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == EXTIPSEL7_A::PORTA + *self == Extipsel7::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B group selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == EXTIPSEL7_A::PORTB + *self == Extipsel7::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C group selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == EXTIPSEL7_A::PORTC + *self == Extipsel7::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D group selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == EXTIPSEL7_A::PORTD + *self == Extipsel7::Portd } } #[doc = "Field `EXTIPSEL7` writer - External Interrupt Port Select"] -pub type EXTIPSEL7_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL7_A, 2, O>; -impl<'a, const O: u8> EXTIPSEL7_W<'a, O> { +pub type Extipsel7W<'a, REG> = crate::FieldWriter<'a, REG, 2, Extipsel7, crate::Safe>; +impl<'a, REG> Extipsel7W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Port A group selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(EXTIPSEL7_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Extipsel7::Porta) } #[doc = "Port B group selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(EXTIPSEL7_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Extipsel7::Portb) } #[doc = "Port C group selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(EXTIPSEL7_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Extipsel7::Portc) } #[doc = "Port D group selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(EXTIPSEL7_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Extipsel7::Portd) } } impl R { #[doc = "Bits 0:1 - External Interrupt Port Select"] #[inline(always)] - pub fn extipsel0(&self) -> EXTIPSEL0_R { - EXTIPSEL0_R::new((self.bits & 3) as u8) + pub fn extipsel0(&self) -> Extipsel0R { + Extipsel0R::new((self.bits & 3) as u8) } #[doc = "Bits 4:5 - External Interrupt Port Select"] #[inline(always)] - pub fn extipsel1(&self) -> EXTIPSEL1_R { - EXTIPSEL1_R::new(((self.bits >> 4) & 3) as u8) + pub fn extipsel1(&self) -> Extipsel1R { + Extipsel1R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 8:9 - External Interrupt Port Select"] #[inline(always)] - pub fn extipsel2(&self) -> EXTIPSEL2_R { - EXTIPSEL2_R::new(((self.bits >> 8) & 3) as u8) + pub fn extipsel2(&self) -> Extipsel2R { + Extipsel2R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 12:13 - External Interrupt Port Select"] #[inline(always)] - pub fn extipsel3(&self) -> EXTIPSEL3_R { - EXTIPSEL3_R::new(((self.bits >> 12) & 3) as u8) + pub fn extipsel3(&self) -> Extipsel3R { + Extipsel3R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 16:17 - External Interrupt Port Select"] #[inline(always)] - pub fn extipsel4(&self) -> EXTIPSEL4_R { - EXTIPSEL4_R::new(((self.bits >> 16) & 3) as u8) + pub fn extipsel4(&self) -> Extipsel4R { + Extipsel4R::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 20:21 - External Interrupt Port Select"] #[inline(always)] - pub fn extipsel5(&self) -> EXTIPSEL5_R { - EXTIPSEL5_R::new(((self.bits >> 20) & 3) as u8) + pub fn extipsel5(&self) -> Extipsel5R { + Extipsel5R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 24:25 - External Interrupt Port Select"] #[inline(always)] - pub fn extipsel6(&self) -> EXTIPSEL6_R { - EXTIPSEL6_R::new(((self.bits >> 24) & 3) as u8) + pub fn extipsel6(&self) -> Extipsel6R { + Extipsel6R::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 28:29 - External Interrupt Port Select"] #[inline(always)] - pub fn extipsel7(&self) -> EXTIPSEL7_R { - EXTIPSEL7_R::new(((self.bits >> 28) & 3) as u8) + pub fn extipsel7(&self) -> Extipsel7R { + Extipsel7R::new(((self.bits >> 28) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - External Interrupt Port Select"] #[inline(always)] #[must_use] - pub fn extipsel0(&mut self) -> EXTIPSEL0_W<0> { - EXTIPSEL0_W::new(self) + pub fn extipsel0(&mut self) -> Extipsel0W { + Extipsel0W::new(self, 0) } #[doc = "Bits 4:5 - External Interrupt Port Select"] #[inline(always)] #[must_use] - pub fn extipsel1(&mut self) -> EXTIPSEL1_W<4> { - EXTIPSEL1_W::new(self) + pub fn extipsel1(&mut self) -> Extipsel1W { + Extipsel1W::new(self, 4) } #[doc = "Bits 8:9 - External Interrupt Port Select"] #[inline(always)] #[must_use] - pub fn extipsel2(&mut self) -> EXTIPSEL2_W<8> { - EXTIPSEL2_W::new(self) + pub fn extipsel2(&mut self) -> Extipsel2W { + Extipsel2W::new(self, 8) } #[doc = "Bits 12:13 - External Interrupt Port Select"] #[inline(always)] #[must_use] - pub fn extipsel3(&mut self) -> EXTIPSEL3_W<12> { - EXTIPSEL3_W::new(self) + pub fn extipsel3(&mut self) -> Extipsel3W { + Extipsel3W::new(self, 12) } #[doc = "Bits 16:17 - External Interrupt Port Select"] #[inline(always)] #[must_use] - pub fn extipsel4(&mut self) -> EXTIPSEL4_W<16> { - EXTIPSEL4_W::new(self) + pub fn extipsel4(&mut self) -> Extipsel4W { + Extipsel4W::new(self, 16) } #[doc = "Bits 20:21 - External Interrupt Port Select"] #[inline(always)] #[must_use] - pub fn extipsel5(&mut self) -> EXTIPSEL5_W<20> { - EXTIPSEL5_W::new(self) + pub fn extipsel5(&mut self) -> Extipsel5W { + Extipsel5W::new(self, 20) } #[doc = "Bits 24:25 - External Interrupt Port Select"] #[inline(always)] #[must_use] - pub fn extipsel6(&mut self) -> EXTIPSEL6_W<24> { - EXTIPSEL6_W::new(self) + pub fn extipsel6(&mut self) -> Extipsel6W { + Extipsel6W::new(self, 24) } #[doc = "Bits 28:29 - External Interrupt Port Select"] #[inline(always)] #[must_use] - pub fn extipsel7(&mut self) -> EXTIPSEL7_W<28> { - EXTIPSEL7_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn extipsel7(&mut self) -> Extipsel7W { + Extipsel7W::new(self, 28) } } -#[doc = "External Interrupt Port Select Low\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [extipsell](index.html) module"] -pub struct EXTIPSELL_SPEC; -impl crate::RegisterSpec for EXTIPSELL_SPEC { +#[doc = "External Interrupt Port Select Low\n\nYou can [`read`](crate::Reg::read) this register and get [`extipsell::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`extipsell::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ExtipsellSpec; +impl crate::RegisterSpec for ExtipsellSpec { type Ux = u32; } -#[doc = "`read()` method returns [extipsell::R](R) reader structure"] -impl crate::Readable for EXTIPSELL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [extipsell::W](W) writer structure"] -impl crate::Writable for EXTIPSELL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`extipsell::R`](R) reader structure"] +impl crate::Readable for ExtipsellSpec {} +#[doc = "`write(|w| ..)` method takes [`extipsell::W`](W) writer structure"] +impl crate::Writable for ExtipsellSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EXTIPSELL to value 0"] -impl crate::Resettable for EXTIPSELL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ExtipsellSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/extirise.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/extirise.rs index 8367b54..85a4bb5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/extirise.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/extirise.rs @@ -1,80 +1,40 @@ #[doc = "Register `EXTIRISE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EXTIRISE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EXTIRISE` reader - EXT Int Rise"] -pub type EXTIRISE_R = crate::FieldReader; +pub type ExtiriseR = crate::FieldReader; #[doc = "Field `EXTIRISE` writer - EXT Int Rise"] -pub type EXTIRISE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EXTIRISE_SPEC, u16, u16, 12, O>; +pub type ExtiriseW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:11 - EXT Int Rise"] #[inline(always)] - pub fn extirise(&self) -> EXTIRISE_R { - EXTIRISE_R::new((self.bits & 0x0fff) as u16) + pub fn extirise(&self) -> ExtiriseR { + ExtiriseR::new((self.bits & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - EXT Int Rise"] #[inline(always)] #[must_use] - pub fn extirise(&mut self) -> EXTIRISE_W<0> { - EXTIRISE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn extirise(&mut self) -> ExtiriseW { + ExtiriseW::new(self, 0) } } -#[doc = "External Interrupt Rising Edge Trigger\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [extirise](index.html) module"] -pub struct EXTIRISE_SPEC; -impl crate::RegisterSpec for EXTIRISE_SPEC { +#[doc = "External Interrupt Rising Edge Trigger\n\nYou can [`read`](crate::Reg::read) this register and get [`extirise::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`extirise::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ExtiriseSpec; +impl crate::RegisterSpec for ExtiriseSpec { type Ux = u32; } -#[doc = "`read()` method returns [extirise::R](R) reader structure"] -impl crate::Readable for EXTIRISE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [extirise::W](W) writer structure"] -impl crate::Writable for EXTIRISE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`extirise::R`](R) reader structure"] +impl crate::Readable for ExtiriseSpec {} +#[doc = "`write(|w| ..)` method takes [`extirise::W`](W) writer structure"] +impl crate::Writable for ExtiriseSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EXTIRISE to value 0"] -impl crate::Resettable for EXTIRISE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ExtiriseSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/gpiolockstatus.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/gpiolockstatus.rs index b7c9a7d..81aafa7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/gpiolockstatus.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/gpiolockstatus.rs @@ -1,71 +1,56 @@ #[doc = "Register `GPIOLOCKSTATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `LOCK` reader - GPIO LOCK status"] -pub type LOCK_R = crate::BitReader; +pub type R = crate::R; #[doc = "GPIO LOCK status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCK_A { +pub enum Lock { #[doc = "0: Registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: Registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCK_A) -> Self { + fn from(variant: Lock) -> Self { variant as u8 != 0 } } -impl LOCK_R { +#[doc = "Field `LOCK` reader - GPIO LOCK status"] +pub type LockR = crate::BitReader; +impl LockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCK_A { + pub const fn variant(&self) -> Lock { match self.bits { - false => LOCK_A::UNLOCKED, - true => LOCK_A::LOCKED, + false => Lock::Unlocked, + true => Lock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "Registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCK_A::UNLOCKED + *self == Lock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "Registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCK_A::LOCKED + *self == Lock::Locked } } impl R { #[doc = "Bit 0 - GPIO LOCK status"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new((self.bits & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new((self.bits & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gpiolockstatus](index.html) module"] -pub struct GPIOLOCKSTATUS_SPEC; -impl crate::RegisterSpec for GPIOLOCKSTATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`gpiolockstatus::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct GpiolockstatusSpec; +impl crate::RegisterSpec for GpiolockstatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [gpiolockstatus::R](R) reader structure"] -impl crate::Readable for GPIOLOCKSTATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`gpiolockstatus::R`](R) reader structure"] +impl crate::Readable for GpiolockstatusSpec {} #[doc = "`reset()` method sets GPIOLOCKSTATUS to value 0"] -impl crate::Resettable for GPIOLOCKSTATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for GpiolockstatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/i2c0_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/i2c0_routeen.rs index f67f013..16e73f8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/i2c0_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/i2c0_routeen.rs @@ -1,95 +1,55 @@ #[doc = "Register `I2C0_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `I2C0_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SCLPEN` reader - SCL pin enable control bit"] -pub type SCLPEN_R = crate::BitReader; +pub type SclpenR = crate::BitReader; #[doc = "Field `SCLPEN` writer - SCL pin enable control bit"] -pub type SCLPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2C0_ROUTEEN_SPEC, bool, O>; +pub type SclpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SDAPEN` reader - SDA pin enable control bit"] -pub type SDAPEN_R = crate::BitReader; +pub type SdapenR = crate::BitReader; #[doc = "Field `SDAPEN` writer - SDA pin enable control bit"] -pub type SDAPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2C0_ROUTEEN_SPEC, bool, O>; +pub type SdapenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - SCL pin enable control bit"] #[inline(always)] - pub fn sclpen(&self) -> SCLPEN_R { - SCLPEN_R::new((self.bits & 1) != 0) + pub fn sclpen(&self) -> SclpenR { + SclpenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - SDA pin enable control bit"] #[inline(always)] - pub fn sdapen(&self) -> SDAPEN_R { - SDAPEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn sdapen(&self) -> SdapenR { + SdapenR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - SCL pin enable control bit"] #[inline(always)] #[must_use] - pub fn sclpen(&mut self) -> SCLPEN_W<0> { - SCLPEN_W::new(self) + pub fn sclpen(&mut self) -> SclpenW { + SclpenW::new(self, 0) } #[doc = "Bit 1 - SDA pin enable control bit"] #[inline(always)] #[must_use] - pub fn sdapen(&mut self) -> SDAPEN_W<1> { - SDAPEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sdapen(&mut self) -> SdapenW { + SdapenW::new(self, 1) } } -#[doc = "I2C0 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [i2c0_routeen](index.html) module"] -pub struct I2C0_ROUTEEN_SPEC; -impl crate::RegisterSpec for I2C0_ROUTEEN_SPEC { +#[doc = "I2C0 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c0_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c0_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct I2c0RouteenSpec; +impl crate::RegisterSpec for I2c0RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [i2c0_routeen::R](R) reader structure"] -impl crate::Readable for I2C0_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [i2c0_routeen::W](W) writer structure"] -impl crate::Writable for I2C0_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`i2c0_routeen::R`](R) reader structure"] +impl crate::Readable for I2c0RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`i2c0_routeen::W`](W) writer structure"] +impl crate::Writable for I2c0RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets I2C0_ROUTEEN to value 0"] -impl crate::Resettable for I2C0_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for I2c0RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/i2c0_sclroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/i2c0_sclroute.rs index c8affb9..ce51a8f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/i2c0_sclroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/i2c0_sclroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `I2C0_SCLROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `I2C0_SCLROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - SCL port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - SCL port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2C0_SCLROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - SCL pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - SCL pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2C0_SCLROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - SCL port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - SCL pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - SCL port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - SCL pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "SCL port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [i2c0_sclroute](index.html) module"] -pub struct I2C0_SCLROUTE_SPEC; -impl crate::RegisterSpec for I2C0_SCLROUTE_SPEC { +#[doc = "SCL port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c0_sclroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c0_sclroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct I2c0SclrouteSpec; +impl crate::RegisterSpec for I2c0SclrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [i2c0_sclroute::R](R) reader structure"] -impl crate::Readable for I2C0_SCLROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [i2c0_sclroute::W](W) writer structure"] -impl crate::Writable for I2C0_SCLROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`i2c0_sclroute::R`](R) reader structure"] +impl crate::Readable for I2c0SclrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`i2c0_sclroute::W`](W) writer structure"] +impl crate::Writable for I2c0SclrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets I2C0_SCLROUTE to value 0"] -impl crate::Resettable for I2C0_SCLROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for I2c0SclrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/i2c0_sdaroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/i2c0_sdaroute.rs index 7782457..bd353e4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/i2c0_sdaroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/i2c0_sdaroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `I2C0_SDAROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `I2C0_SDAROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - SDA port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - SDA port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2C0_SDAROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - SDA pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - SDA pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2C0_SDAROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - SDA port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - SDA pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - SDA port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - SDA pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "SDA port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [i2c0_sdaroute](index.html) module"] -pub struct I2C0_SDAROUTE_SPEC; -impl crate::RegisterSpec for I2C0_SDAROUTE_SPEC { +#[doc = "SDA port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c0_sdaroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c0_sdaroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct I2c0SdarouteSpec; +impl crate::RegisterSpec for I2c0SdarouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [i2c0_sdaroute::R](R) reader structure"] -impl crate::Readable for I2C0_SDAROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [i2c0_sdaroute::W](W) writer structure"] -impl crate::Writable for I2C0_SDAROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`i2c0_sdaroute::R`](R) reader structure"] +impl crate::Readable for I2c0SdarouteSpec {} +#[doc = "`write(|w| ..)` method takes [`i2c0_sdaroute::W`](W) writer structure"] +impl crate::Writable for I2c0SdarouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets I2C0_SDAROUTE to value 0"] -impl crate::Resettable for I2C0_SDAROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for I2c0SdarouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/i2c1_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/i2c1_routeen.rs index 0e2fb84..e6c64e3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/i2c1_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/i2c1_routeen.rs @@ -1,95 +1,55 @@ #[doc = "Register `I2C1_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `I2C1_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SCLPEN` reader - SCL pin enable control bit"] -pub type SCLPEN_R = crate::BitReader; +pub type SclpenR = crate::BitReader; #[doc = "Field `SCLPEN` writer - SCL pin enable control bit"] -pub type SCLPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2C1_ROUTEEN_SPEC, bool, O>; +pub type SclpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SDAPEN` reader - SDA pin enable control bit"] -pub type SDAPEN_R = crate::BitReader; +pub type SdapenR = crate::BitReader; #[doc = "Field `SDAPEN` writer - SDA pin enable control bit"] -pub type SDAPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2C1_ROUTEEN_SPEC, bool, O>; +pub type SdapenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - SCL pin enable control bit"] #[inline(always)] - pub fn sclpen(&self) -> SCLPEN_R { - SCLPEN_R::new((self.bits & 1) != 0) + pub fn sclpen(&self) -> SclpenR { + SclpenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - SDA pin enable control bit"] #[inline(always)] - pub fn sdapen(&self) -> SDAPEN_R { - SDAPEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn sdapen(&self) -> SdapenR { + SdapenR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - SCL pin enable control bit"] #[inline(always)] #[must_use] - pub fn sclpen(&mut self) -> SCLPEN_W<0> { - SCLPEN_W::new(self) + pub fn sclpen(&mut self) -> SclpenW { + SclpenW::new(self, 0) } #[doc = "Bit 1 - SDA pin enable control bit"] #[inline(always)] #[must_use] - pub fn sdapen(&mut self) -> SDAPEN_W<1> { - SDAPEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sdapen(&mut self) -> SdapenW { + SdapenW::new(self, 1) } } -#[doc = "I2C1 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [i2c1_routeen](index.html) module"] -pub struct I2C1_ROUTEEN_SPEC; -impl crate::RegisterSpec for I2C1_ROUTEEN_SPEC { +#[doc = "I2C1 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c1_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c1_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct I2c1RouteenSpec; +impl crate::RegisterSpec for I2c1RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [i2c1_routeen::R](R) reader structure"] -impl crate::Readable for I2C1_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [i2c1_routeen::W](W) writer structure"] -impl crate::Writable for I2C1_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`i2c1_routeen::R`](R) reader structure"] +impl crate::Readable for I2c1RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`i2c1_routeen::W`](W) writer structure"] +impl crate::Writable for I2c1RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets I2C1_ROUTEEN to value 0"] -impl crate::Resettable for I2C1_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for I2c1RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/i2c1_sclroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/i2c1_sclroute.rs index 4e68bec..648d44e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/i2c1_sclroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/i2c1_sclroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `I2C1_SCLROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `I2C1_SCLROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - SCL port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - SCL port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2C1_SCLROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - SCL pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - SCL pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2C1_SCLROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - SCL port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - SCL pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - SCL port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - SCL pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "SCL port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [i2c1_sclroute](index.html) module"] -pub struct I2C1_SCLROUTE_SPEC; -impl crate::RegisterSpec for I2C1_SCLROUTE_SPEC { +#[doc = "SCL port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c1_sclroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c1_sclroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct I2c1SclrouteSpec; +impl crate::RegisterSpec for I2c1SclrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [i2c1_sclroute::R](R) reader structure"] -impl crate::Readable for I2C1_SCLROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [i2c1_sclroute::W](W) writer structure"] -impl crate::Writable for I2C1_SCLROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`i2c1_sclroute::R`](R) reader structure"] +impl crate::Readable for I2c1SclrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`i2c1_sclroute::W`](W) writer structure"] +impl crate::Writable for I2c1SclrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets I2C1_SCLROUTE to value 0"] -impl crate::Resettable for I2C1_SCLROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for I2c1SclrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/i2c1_sdaroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/i2c1_sdaroute.rs index 11dd3ef..2281d44 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/i2c1_sdaroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/i2c1_sdaroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `I2C1_SDAROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `I2C1_SDAROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - SDA port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - SDA port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2C1_SDAROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - SDA pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - SDA pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2C1_SDAROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - SDA port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - SDA pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - SDA port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - SDA pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "SDA port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [i2c1_sdaroute](index.html) module"] -pub struct I2C1_SDAROUTE_SPEC; -impl crate::RegisterSpec for I2C1_SDAROUTE_SPEC { +#[doc = "SDA port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c1_sdaroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c1_sdaroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct I2c1SdarouteSpec; +impl crate::RegisterSpec for I2c1SdarouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [i2c1_sdaroute::R](R) reader structure"] -impl crate::Readable for I2C1_SDAROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [i2c1_sdaroute::W](W) writer structure"] -impl crate::Writable for I2C1_SDAROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`i2c1_sdaroute::R`](R) reader structure"] +impl crate::Readable for I2c1SdarouteSpec {} +#[doc = "`write(|w| ..)` method takes [`i2c1_sdaroute::W`](W) writer structure"] +impl crate::Writable for I2c1SdarouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets I2C1_SDAROUTE to value 0"] -impl crate::Resettable for I2C1_SDAROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for I2c1SdarouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/ien.rs index 17d201d..488b0bc 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/ien.rs @@ -1,425 +1,385 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EXTIEN0` reader - External Pin Enable"] -pub type EXTIEN0_R = crate::BitReader; +pub type Extien0R = crate::BitReader; #[doc = "Field `EXTIEN0` writer - External Pin Enable"] -pub type EXTIEN0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Extien0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIEN1` reader - External Pin Enable"] -pub type EXTIEN1_R = crate::BitReader; +pub type Extien1R = crate::BitReader; #[doc = "Field `EXTIEN1` writer - External Pin Enable"] -pub type EXTIEN1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Extien1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIEN2` reader - External Pin Enable"] -pub type EXTIEN2_R = crate::BitReader; +pub type Extien2R = crate::BitReader; #[doc = "Field `EXTIEN2` writer - External Pin Enable"] -pub type EXTIEN2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Extien2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIEN3` reader - External Pin Enable"] -pub type EXTIEN3_R = crate::BitReader; +pub type Extien3R = crate::BitReader; #[doc = "Field `EXTIEN3` writer - External Pin Enable"] -pub type EXTIEN3_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Extien3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIEN4` reader - External Pin Enable"] -pub type EXTIEN4_R = crate::BitReader; +pub type Extien4R = crate::BitReader; #[doc = "Field `EXTIEN4` writer - External Pin Enable"] -pub type EXTIEN4_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Extien4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIEN5` reader - External Pin Enable"] -pub type EXTIEN5_R = crate::BitReader; +pub type Extien5R = crate::BitReader; #[doc = "Field `EXTIEN5` writer - External Pin Enable"] -pub type EXTIEN5_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Extien5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIEN6` reader - External Pin Enable"] -pub type EXTIEN6_R = crate::BitReader; +pub type Extien6R = crate::BitReader; #[doc = "Field `EXTIEN6` writer - External Pin Enable"] -pub type EXTIEN6_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Extien6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIEN7` reader - External Pin Enable"] -pub type EXTIEN7_R = crate::BitReader; +pub type Extien7R = crate::BitReader; #[doc = "Field `EXTIEN7` writer - External Pin Enable"] -pub type EXTIEN7_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Extien7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIEN8` reader - External Pin Enable"] -pub type EXTIEN8_R = crate::BitReader; +pub type Extien8R = crate::BitReader; #[doc = "Field `EXTIEN8` writer - External Pin Enable"] -pub type EXTIEN8_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Extien8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIEN9` reader - External Pin Enable"] -pub type EXTIEN9_R = crate::BitReader; +pub type Extien9R = crate::BitReader; #[doc = "Field `EXTIEN9` writer - External Pin Enable"] -pub type EXTIEN9_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Extien9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIEN10` reader - External Pin Enable"] -pub type EXTIEN10_R = crate::BitReader; +pub type Extien10R = crate::BitReader; #[doc = "Field `EXTIEN10` writer - External Pin Enable"] -pub type EXTIEN10_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Extien10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EXTIEN11` reader - External Pin Enable"] -pub type EXTIEN11_R = crate::BitReader; +pub type Extien11R = crate::BitReader; #[doc = "Field `EXTIEN11` writer - External Pin Enable"] -pub type EXTIEN11_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Extien11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4WUIEN0` reader - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN0_R = crate::BitReader; +pub type Em4wuien0R = crate::BitReader; #[doc = "Field `EM4WUIEN0` writer - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em4wuien0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4WUIEN1` reader - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN1_R = crate::BitReader; +pub type Em4wuien1R = crate::BitReader; #[doc = "Field `EM4WUIEN1` writer - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em4wuien1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4WUIEN2` reader - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN2_R = crate::BitReader; +pub type Em4wuien2R = crate::BitReader; #[doc = "Field `EM4WUIEN2` writer - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em4wuien2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4WUIEN3` reader - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN3_R = crate::BitReader; +pub type Em4wuien3R = crate::BitReader; #[doc = "Field `EM4WUIEN3` writer - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN3_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em4wuien3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4WUIEN4` reader - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN4_R = crate::BitReader; +pub type Em4wuien4R = crate::BitReader; #[doc = "Field `EM4WUIEN4` writer - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN4_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em4wuien4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4WUIEN5` reader - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN5_R = crate::BitReader; +pub type Em4wuien5R = crate::BitReader; #[doc = "Field `EM4WUIEN5` writer - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN5_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em4wuien5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4WUIEN6` reader - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN6_R = crate::BitReader; +pub type Em4wuien6R = crate::BitReader; #[doc = "Field `EM4WUIEN6` writer - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN6_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em4wuien6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4WUIEN7` reader - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN7_R = crate::BitReader; +pub type Em4wuien7R = crate::BitReader; #[doc = "Field `EM4WUIEN7` writer - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN7_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em4wuien7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4WUIEN8` reader - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN8_R = crate::BitReader; +pub type Em4wuien8R = crate::BitReader; #[doc = "Field `EM4WUIEN8` writer - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN8_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em4wuien8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4WUIEN9` reader - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN9_R = crate::BitReader; +pub type Em4wuien9R = crate::BitReader; #[doc = "Field `EM4WUIEN9` writer - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN9_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em4wuien9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4WUIEN10` reader - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN10_R = crate::BitReader; +pub type Em4wuien10R = crate::BitReader; #[doc = "Field `EM4WUIEN10` writer - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN10_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em4wuien10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM4WUIEN11` reader - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN11_R = crate::BitReader; +pub type Em4wuien11R = crate::BitReader; #[doc = "Field `EM4WUIEN11` writer - EM4 Wake Up Interrupt En"] -pub type EM4WUIEN11_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em4wuien11W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - External Pin Enable"] #[inline(always)] - pub fn extien0(&self) -> EXTIEN0_R { - EXTIEN0_R::new((self.bits & 1) != 0) + pub fn extien0(&self) -> Extien0R { + Extien0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - External Pin Enable"] #[inline(always)] - pub fn extien1(&self) -> EXTIEN1_R { - EXTIEN1_R::new(((self.bits >> 1) & 1) != 0) + pub fn extien1(&self) -> Extien1R { + Extien1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - External Pin Enable"] #[inline(always)] - pub fn extien2(&self) -> EXTIEN2_R { - EXTIEN2_R::new(((self.bits >> 2) & 1) != 0) + pub fn extien2(&self) -> Extien2R { + Extien2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - External Pin Enable"] #[inline(always)] - pub fn extien3(&self) -> EXTIEN3_R { - EXTIEN3_R::new(((self.bits >> 3) & 1) != 0) + pub fn extien3(&self) -> Extien3R { + Extien3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - External Pin Enable"] #[inline(always)] - pub fn extien4(&self) -> EXTIEN4_R { - EXTIEN4_R::new(((self.bits >> 4) & 1) != 0) + pub fn extien4(&self) -> Extien4R { + Extien4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - External Pin Enable"] #[inline(always)] - pub fn extien5(&self) -> EXTIEN5_R { - EXTIEN5_R::new(((self.bits >> 5) & 1) != 0) + pub fn extien5(&self) -> Extien5R { + Extien5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - External Pin Enable"] #[inline(always)] - pub fn extien6(&self) -> EXTIEN6_R { - EXTIEN6_R::new(((self.bits >> 6) & 1) != 0) + pub fn extien6(&self) -> Extien6R { + Extien6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - External Pin Enable"] #[inline(always)] - pub fn extien7(&self) -> EXTIEN7_R { - EXTIEN7_R::new(((self.bits >> 7) & 1) != 0) + pub fn extien7(&self) -> Extien7R { + Extien7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - External Pin Enable"] #[inline(always)] - pub fn extien8(&self) -> EXTIEN8_R { - EXTIEN8_R::new(((self.bits >> 8) & 1) != 0) + pub fn extien8(&self) -> Extien8R { + Extien8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - External Pin Enable"] #[inline(always)] - pub fn extien9(&self) -> EXTIEN9_R { - EXTIEN9_R::new(((self.bits >> 9) & 1) != 0) + pub fn extien9(&self) -> Extien9R { + Extien9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - External Pin Enable"] #[inline(always)] - pub fn extien10(&self) -> EXTIEN10_R { - EXTIEN10_R::new(((self.bits >> 10) & 1) != 0) + pub fn extien10(&self) -> Extien10R { + Extien10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - External Pin Enable"] #[inline(always)] - pub fn extien11(&self) -> EXTIEN11_R { - EXTIEN11_R::new(((self.bits >> 11) & 1) != 0) + pub fn extien11(&self) -> Extien11R { + Extien11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 16 - EM4 Wake Up Interrupt En"] #[inline(always)] - pub fn em4wuien0(&self) -> EM4WUIEN0_R { - EM4WUIEN0_R::new(((self.bits >> 16) & 1) != 0) + pub fn em4wuien0(&self) -> Em4wuien0R { + Em4wuien0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - EM4 Wake Up Interrupt En"] #[inline(always)] - pub fn em4wuien1(&self) -> EM4WUIEN1_R { - EM4WUIEN1_R::new(((self.bits >> 17) & 1) != 0) + pub fn em4wuien1(&self) -> Em4wuien1R { + Em4wuien1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - EM4 Wake Up Interrupt En"] #[inline(always)] - pub fn em4wuien2(&self) -> EM4WUIEN2_R { - EM4WUIEN2_R::new(((self.bits >> 18) & 1) != 0) + pub fn em4wuien2(&self) -> Em4wuien2R { + Em4wuien2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - EM4 Wake Up Interrupt En"] #[inline(always)] - pub fn em4wuien3(&self) -> EM4WUIEN3_R { - EM4WUIEN3_R::new(((self.bits >> 19) & 1) != 0) + pub fn em4wuien3(&self) -> Em4wuien3R { + Em4wuien3R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - EM4 Wake Up Interrupt En"] #[inline(always)] - pub fn em4wuien4(&self) -> EM4WUIEN4_R { - EM4WUIEN4_R::new(((self.bits >> 20) & 1) != 0) + pub fn em4wuien4(&self) -> Em4wuien4R { + Em4wuien4R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - EM4 Wake Up Interrupt En"] #[inline(always)] - pub fn em4wuien5(&self) -> EM4WUIEN5_R { - EM4WUIEN5_R::new(((self.bits >> 21) & 1) != 0) + pub fn em4wuien5(&self) -> Em4wuien5R { + Em4wuien5R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - EM4 Wake Up Interrupt En"] #[inline(always)] - pub fn em4wuien6(&self) -> EM4WUIEN6_R { - EM4WUIEN6_R::new(((self.bits >> 22) & 1) != 0) + pub fn em4wuien6(&self) -> Em4wuien6R { + Em4wuien6R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - EM4 Wake Up Interrupt En"] #[inline(always)] - pub fn em4wuien7(&self) -> EM4WUIEN7_R { - EM4WUIEN7_R::new(((self.bits >> 23) & 1) != 0) + pub fn em4wuien7(&self) -> Em4wuien7R { + Em4wuien7R::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - EM4 Wake Up Interrupt En"] #[inline(always)] - pub fn em4wuien8(&self) -> EM4WUIEN8_R { - EM4WUIEN8_R::new(((self.bits >> 24) & 1) != 0) + pub fn em4wuien8(&self) -> Em4wuien8R { + Em4wuien8R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - EM4 Wake Up Interrupt En"] #[inline(always)] - pub fn em4wuien9(&self) -> EM4WUIEN9_R { - EM4WUIEN9_R::new(((self.bits >> 25) & 1) != 0) + pub fn em4wuien9(&self) -> Em4wuien9R { + Em4wuien9R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - EM4 Wake Up Interrupt En"] #[inline(always)] - pub fn em4wuien10(&self) -> EM4WUIEN10_R { - EM4WUIEN10_R::new(((self.bits >> 26) & 1) != 0) + pub fn em4wuien10(&self) -> Em4wuien10R { + Em4wuien10R::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - EM4 Wake Up Interrupt En"] #[inline(always)] - pub fn em4wuien11(&self) -> EM4WUIEN11_R { - EM4WUIEN11_R::new(((self.bits >> 27) & 1) != 0) + pub fn em4wuien11(&self) -> Em4wuien11R { + Em4wuien11R::new(((self.bits >> 27) & 1) != 0) } } impl W { #[doc = "Bit 0 - External Pin Enable"] #[inline(always)] #[must_use] - pub fn extien0(&mut self) -> EXTIEN0_W<0> { - EXTIEN0_W::new(self) + pub fn extien0(&mut self) -> Extien0W { + Extien0W::new(self, 0) } #[doc = "Bit 1 - External Pin Enable"] #[inline(always)] #[must_use] - pub fn extien1(&mut self) -> EXTIEN1_W<1> { - EXTIEN1_W::new(self) + pub fn extien1(&mut self) -> Extien1W { + Extien1W::new(self, 1) } #[doc = "Bit 2 - External Pin Enable"] #[inline(always)] #[must_use] - pub fn extien2(&mut self) -> EXTIEN2_W<2> { - EXTIEN2_W::new(self) + pub fn extien2(&mut self) -> Extien2W { + Extien2W::new(self, 2) } #[doc = "Bit 3 - External Pin Enable"] #[inline(always)] #[must_use] - pub fn extien3(&mut self) -> EXTIEN3_W<3> { - EXTIEN3_W::new(self) + pub fn extien3(&mut self) -> Extien3W { + Extien3W::new(self, 3) } #[doc = "Bit 4 - External Pin Enable"] #[inline(always)] #[must_use] - pub fn extien4(&mut self) -> EXTIEN4_W<4> { - EXTIEN4_W::new(self) + pub fn extien4(&mut self) -> Extien4W { + Extien4W::new(self, 4) } #[doc = "Bit 5 - External Pin Enable"] #[inline(always)] #[must_use] - pub fn extien5(&mut self) -> EXTIEN5_W<5> { - EXTIEN5_W::new(self) + pub fn extien5(&mut self) -> Extien5W { + Extien5W::new(self, 5) } #[doc = "Bit 6 - External Pin Enable"] #[inline(always)] #[must_use] - pub fn extien6(&mut self) -> EXTIEN6_W<6> { - EXTIEN6_W::new(self) + pub fn extien6(&mut self) -> Extien6W { + Extien6W::new(self, 6) } #[doc = "Bit 7 - External Pin Enable"] #[inline(always)] #[must_use] - pub fn extien7(&mut self) -> EXTIEN7_W<7> { - EXTIEN7_W::new(self) + pub fn extien7(&mut self) -> Extien7W { + Extien7W::new(self, 7) } #[doc = "Bit 8 - External Pin Enable"] #[inline(always)] #[must_use] - pub fn extien8(&mut self) -> EXTIEN8_W<8> { - EXTIEN8_W::new(self) + pub fn extien8(&mut self) -> Extien8W { + Extien8W::new(self, 8) } #[doc = "Bit 9 - External Pin Enable"] #[inline(always)] #[must_use] - pub fn extien9(&mut self) -> EXTIEN9_W<9> { - EXTIEN9_W::new(self) + pub fn extien9(&mut self) -> Extien9W { + Extien9W::new(self, 9) } #[doc = "Bit 10 - External Pin Enable"] #[inline(always)] #[must_use] - pub fn extien10(&mut self) -> EXTIEN10_W<10> { - EXTIEN10_W::new(self) + pub fn extien10(&mut self) -> Extien10W { + Extien10W::new(self, 10) } #[doc = "Bit 11 - External Pin Enable"] #[inline(always)] #[must_use] - pub fn extien11(&mut self) -> EXTIEN11_W<11> { - EXTIEN11_W::new(self) + pub fn extien11(&mut self) -> Extien11W { + Extien11W::new(self, 11) } #[doc = "Bit 16 - EM4 Wake Up Interrupt En"] #[inline(always)] #[must_use] - pub fn em4wuien0(&mut self) -> EM4WUIEN0_W<16> { - EM4WUIEN0_W::new(self) + pub fn em4wuien0(&mut self) -> Em4wuien0W { + Em4wuien0W::new(self, 16) } #[doc = "Bit 17 - EM4 Wake Up Interrupt En"] #[inline(always)] #[must_use] - pub fn em4wuien1(&mut self) -> EM4WUIEN1_W<17> { - EM4WUIEN1_W::new(self) + pub fn em4wuien1(&mut self) -> Em4wuien1W { + Em4wuien1W::new(self, 17) } #[doc = "Bit 18 - EM4 Wake Up Interrupt En"] #[inline(always)] #[must_use] - pub fn em4wuien2(&mut self) -> EM4WUIEN2_W<18> { - EM4WUIEN2_W::new(self) + pub fn em4wuien2(&mut self) -> Em4wuien2W { + Em4wuien2W::new(self, 18) } #[doc = "Bit 19 - EM4 Wake Up Interrupt En"] #[inline(always)] #[must_use] - pub fn em4wuien3(&mut self) -> EM4WUIEN3_W<19> { - EM4WUIEN3_W::new(self) + pub fn em4wuien3(&mut self) -> Em4wuien3W { + Em4wuien3W::new(self, 19) } #[doc = "Bit 20 - EM4 Wake Up Interrupt En"] #[inline(always)] #[must_use] - pub fn em4wuien4(&mut self) -> EM4WUIEN4_W<20> { - EM4WUIEN4_W::new(self) + pub fn em4wuien4(&mut self) -> Em4wuien4W { + Em4wuien4W::new(self, 20) } #[doc = "Bit 21 - EM4 Wake Up Interrupt En"] #[inline(always)] #[must_use] - pub fn em4wuien5(&mut self) -> EM4WUIEN5_W<21> { - EM4WUIEN5_W::new(self) + pub fn em4wuien5(&mut self) -> Em4wuien5W { + Em4wuien5W::new(self, 21) } #[doc = "Bit 22 - EM4 Wake Up Interrupt En"] #[inline(always)] #[must_use] - pub fn em4wuien6(&mut self) -> EM4WUIEN6_W<22> { - EM4WUIEN6_W::new(self) + pub fn em4wuien6(&mut self) -> Em4wuien6W { + Em4wuien6W::new(self, 22) } #[doc = "Bit 23 - EM4 Wake Up Interrupt En"] #[inline(always)] #[must_use] - pub fn em4wuien7(&mut self) -> EM4WUIEN7_W<23> { - EM4WUIEN7_W::new(self) + pub fn em4wuien7(&mut self) -> Em4wuien7W { + Em4wuien7W::new(self, 23) } #[doc = "Bit 24 - EM4 Wake Up Interrupt En"] #[inline(always)] #[must_use] - pub fn em4wuien8(&mut self) -> EM4WUIEN8_W<24> { - EM4WUIEN8_W::new(self) + pub fn em4wuien8(&mut self) -> Em4wuien8W { + Em4wuien8W::new(self, 24) } #[doc = "Bit 25 - EM4 Wake Up Interrupt En"] #[inline(always)] #[must_use] - pub fn em4wuien9(&mut self) -> EM4WUIEN9_W<25> { - EM4WUIEN9_W::new(self) + pub fn em4wuien9(&mut self) -> Em4wuien9W { + Em4wuien9W::new(self, 25) } #[doc = "Bit 26 - EM4 Wake Up Interrupt En"] #[inline(always)] #[must_use] - pub fn em4wuien10(&mut self) -> EM4WUIEN10_W<26> { - EM4WUIEN10_W::new(self) + pub fn em4wuien10(&mut self) -> Em4wuien10W { + Em4wuien10W::new(self, 26) } #[doc = "Bit 27 - EM4 Wake Up Interrupt En"] #[inline(always)] #[must_use] - pub fn em4wuien11(&mut self) -> EM4WUIEN11_W<27> { - EM4WUIEN11_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn em4wuien11(&mut self) -> Em4wuien11W { + Em4wuien11W::new(self, 27) } } -#[doc = "Interrupt Enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/if_.rs index 90a94c4..bb6766e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/if_.rs @@ -1,260 +1,106 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type R = crate::R; #[doc = "Field `EXTIF0` reader - External Pin Flag"] -pub type EXTIF0_R = crate::BitReader; -#[doc = "Field `EXTIF0` writer - External Pin Flag"] -pub type EXTIF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Extif0R = crate::BitReader; #[doc = "Field `EXTIF1` reader - External Pin Flag"] -pub type EXTIF1_R = crate::BitReader; -#[doc = "Field `EXTIF1` writer - External Pin Flag"] -pub type EXTIF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Extif1R = crate::BitReader; #[doc = "Field `EXTIF2` reader - External Pin Flag"] -pub type EXTIF2_R = crate::BitReader; -#[doc = "Field `EXTIF2` writer - External Pin Flag"] -pub type EXTIF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Extif2R = crate::BitReader; #[doc = "Field `EXTIF3` reader - External Pin Flag"] -pub type EXTIF3_R = crate::BitReader; -#[doc = "Field `EXTIF3` writer - External Pin Flag"] -pub type EXTIF3_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Extif3R = crate::BitReader; #[doc = "Field `EXTIF4` reader - External Pin Flag"] -pub type EXTIF4_R = crate::BitReader; -#[doc = "Field `EXTIF4` writer - External Pin Flag"] -pub type EXTIF4_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Extif4R = crate::BitReader; #[doc = "Field `EXTIF5` reader - External Pin Flag"] -pub type EXTIF5_R = crate::BitReader; -#[doc = "Field `EXTIF5` writer - External Pin Flag"] -pub type EXTIF5_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Extif5R = crate::BitReader; #[doc = "Field `EXTIF6` reader - External Pin Flag"] -pub type EXTIF6_R = crate::BitReader; -#[doc = "Field `EXTIF6` writer - External Pin Flag"] -pub type EXTIF6_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Extif6R = crate::BitReader; #[doc = "Field `EXTIF7` reader - External Pin Flag"] -pub type EXTIF7_R = crate::BitReader; -#[doc = "Field `EXTIF7` writer - External Pin Flag"] -pub type EXTIF7_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Extif7R = crate::BitReader; #[doc = "Field `EXTIF8` reader - External Pin Flag"] -pub type EXTIF8_R = crate::BitReader; -#[doc = "Field `EXTIF8` writer - External Pin Flag"] -pub type EXTIF8_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Extif8R = crate::BitReader; #[doc = "Field `EXTIF9` reader - External Pin Flag"] -pub type EXTIF9_R = crate::BitReader; -#[doc = "Field `EXTIF9` writer - External Pin Flag"] -pub type EXTIF9_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Extif9R = crate::BitReader; #[doc = "Field `EXTIF10` reader - External Pin Flag"] -pub type EXTIF10_R = crate::BitReader; -#[doc = "Field `EXTIF10` writer - External Pin Flag"] -pub type EXTIF10_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Extif10R = crate::BitReader; #[doc = "Field `EXTIF11` reader - External Pin Flag"] -pub type EXTIF11_R = crate::BitReader; -#[doc = "Field `EXTIF11` writer - External Pin Flag"] -pub type EXTIF11_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Extif11R = crate::BitReader; #[doc = "Field `EM4WU` reader - EM4 wake up"] -pub type EM4WU_R = crate::FieldReader; -#[doc = "Field `EM4WU` writer - EM4 wake up"] -pub type EM4WU_W<'a, const O: u8> = crate::FieldWriter<'a, u32, IF_SPEC, u16, u16, 12, O>; +pub type Em4wuR = crate::FieldReader; impl R { #[doc = "Bit 0 - External Pin Flag"] #[inline(always)] - pub fn extif0(&self) -> EXTIF0_R { - EXTIF0_R::new((self.bits & 1) != 0) + pub fn extif0(&self) -> Extif0R { + Extif0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - External Pin Flag"] #[inline(always)] - pub fn extif1(&self) -> EXTIF1_R { - EXTIF1_R::new(((self.bits >> 1) & 1) != 0) + pub fn extif1(&self) -> Extif1R { + Extif1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - External Pin Flag"] #[inline(always)] - pub fn extif2(&self) -> EXTIF2_R { - EXTIF2_R::new(((self.bits >> 2) & 1) != 0) + pub fn extif2(&self) -> Extif2R { + Extif2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - External Pin Flag"] #[inline(always)] - pub fn extif3(&self) -> EXTIF3_R { - EXTIF3_R::new(((self.bits >> 3) & 1) != 0) + pub fn extif3(&self) -> Extif3R { + Extif3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - External Pin Flag"] #[inline(always)] - pub fn extif4(&self) -> EXTIF4_R { - EXTIF4_R::new(((self.bits >> 4) & 1) != 0) + pub fn extif4(&self) -> Extif4R { + Extif4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - External Pin Flag"] #[inline(always)] - pub fn extif5(&self) -> EXTIF5_R { - EXTIF5_R::new(((self.bits >> 5) & 1) != 0) + pub fn extif5(&self) -> Extif5R { + Extif5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - External Pin Flag"] #[inline(always)] - pub fn extif6(&self) -> EXTIF6_R { - EXTIF6_R::new(((self.bits >> 6) & 1) != 0) + pub fn extif6(&self) -> Extif6R { + Extif6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - External Pin Flag"] #[inline(always)] - pub fn extif7(&self) -> EXTIF7_R { - EXTIF7_R::new(((self.bits >> 7) & 1) != 0) + pub fn extif7(&self) -> Extif7R { + Extif7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - External Pin Flag"] #[inline(always)] - pub fn extif8(&self) -> EXTIF8_R { - EXTIF8_R::new(((self.bits >> 8) & 1) != 0) + pub fn extif8(&self) -> Extif8R { + Extif8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - External Pin Flag"] #[inline(always)] - pub fn extif9(&self) -> EXTIF9_R { - EXTIF9_R::new(((self.bits >> 9) & 1) != 0) + pub fn extif9(&self) -> Extif9R { + Extif9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - External Pin Flag"] #[inline(always)] - pub fn extif10(&self) -> EXTIF10_R { - EXTIF10_R::new(((self.bits >> 10) & 1) != 0) + pub fn extif10(&self) -> Extif10R { + Extif10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - External Pin Flag"] #[inline(always)] - pub fn extif11(&self) -> EXTIF11_R { - EXTIF11_R::new(((self.bits >> 11) & 1) != 0) + pub fn extif11(&self) -> Extif11R { + Extif11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bits 16:27 - EM4 wake up"] #[inline(always)] - pub fn em4wu(&self) -> EM4WU_R { - EM4WU_R::new(((self.bits >> 16) & 0x0fff) as u16) + pub fn em4wu(&self) -> Em4wuR { + Em4wuR::new(((self.bits >> 16) & 0x0fff) as u16) } } -impl W { - #[doc = "Bit 0 - External Pin Flag"] - #[inline(always)] - #[must_use] - pub fn extif0(&mut self) -> EXTIF0_W<0> { - EXTIF0_W::new(self) - } - #[doc = "Bit 1 - External Pin Flag"] - #[inline(always)] - #[must_use] - pub fn extif1(&mut self) -> EXTIF1_W<1> { - EXTIF1_W::new(self) - } - #[doc = "Bit 2 - External Pin Flag"] - #[inline(always)] - #[must_use] - pub fn extif2(&mut self) -> EXTIF2_W<2> { - EXTIF2_W::new(self) - } - #[doc = "Bit 3 - External Pin Flag"] - #[inline(always)] - #[must_use] - pub fn extif3(&mut self) -> EXTIF3_W<3> { - EXTIF3_W::new(self) - } - #[doc = "Bit 4 - External Pin Flag"] - #[inline(always)] - #[must_use] - pub fn extif4(&mut self) -> EXTIF4_W<4> { - EXTIF4_W::new(self) - } - #[doc = "Bit 5 - External Pin Flag"] - #[inline(always)] - #[must_use] - pub fn extif5(&mut self) -> EXTIF5_W<5> { - EXTIF5_W::new(self) - } - #[doc = "Bit 6 - External Pin Flag"] - #[inline(always)] - #[must_use] - pub fn extif6(&mut self) -> EXTIF6_W<6> { - EXTIF6_W::new(self) - } - #[doc = "Bit 7 - External Pin Flag"] - #[inline(always)] - #[must_use] - pub fn extif7(&mut self) -> EXTIF7_W<7> { - EXTIF7_W::new(self) - } - #[doc = "Bit 8 - External Pin Flag"] - #[inline(always)] - #[must_use] - pub fn extif8(&mut self) -> EXTIF8_W<8> { - EXTIF8_W::new(self) - } - #[doc = "Bit 9 - External Pin Flag"] - #[inline(always)] - #[must_use] - pub fn extif9(&mut self) -> EXTIF9_W<9> { - EXTIF9_W::new(self) - } - #[doc = "Bit 10 - External Pin Flag"] - #[inline(always)] - #[must_use] - pub fn extif10(&mut self) -> EXTIF10_W<10> { - EXTIF10_W::new(self) - } - #[doc = "Bit 11 - External Pin Flag"] - #[inline(always)] - #[must_use] - pub fn extif11(&mut self) -> EXTIF11_W<11> { - EXTIF11_W::new(self) - } - #[doc = "Bits 16:27 - EM4 wake up"] - #[inline(always)] - #[must_use] - pub fn em4wu(&mut self) -> EM4WU_W<16> { - EM4WU_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self - } -} -#[doc = "Interrupt Flag\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "Interrupt Flag\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/if_clr.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/if_clr.rs new file mode 100644 index 0000000..3f13aa6 --- /dev/null +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/if_clr.rs @@ -0,0 +1,123 @@ +#[doc = "Register `IF_CLR` writer"] +pub type W = crate::W; +#[doc = "Field `EXTIF0` writer - External Pin Flag"] +pub type Extif0W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EXTIF1` writer - External Pin Flag"] +pub type Extif1W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EXTIF2` writer - External Pin Flag"] +pub type Extif2W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EXTIF3` writer - External Pin Flag"] +pub type Extif3W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EXTIF4` writer - External Pin Flag"] +pub type Extif4W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EXTIF5` writer - External Pin Flag"] +pub type Extif5W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EXTIF6` writer - External Pin Flag"] +pub type Extif6W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EXTIF7` writer - External Pin Flag"] +pub type Extif7W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EXTIF8` writer - External Pin Flag"] +pub type Extif8W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EXTIF9` writer - External Pin Flag"] +pub type Extif9W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EXTIF10` writer - External Pin Flag"] +pub type Extif10W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EXTIF11` writer - External Pin Flag"] +pub type Extif11W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EM4WU` writer - EM4 wake up"] +pub type Em4wuW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +impl W { + #[doc = "Bit 0 - External Pin Flag"] + #[inline(always)] + #[must_use] + pub fn extif0(&mut self) -> Extif0W { + Extif0W::new(self, 0) + } + #[doc = "Bit 1 - External Pin Flag"] + #[inline(always)] + #[must_use] + pub fn extif1(&mut self) -> Extif1W { + Extif1W::new(self, 1) + } + #[doc = "Bit 2 - External Pin Flag"] + #[inline(always)] + #[must_use] + pub fn extif2(&mut self) -> Extif2W { + Extif2W::new(self, 2) + } + #[doc = "Bit 3 - External Pin Flag"] + #[inline(always)] + #[must_use] + pub fn extif3(&mut self) -> Extif3W { + Extif3W::new(self, 3) + } + #[doc = "Bit 4 - External Pin Flag"] + #[inline(always)] + #[must_use] + pub fn extif4(&mut self) -> Extif4W { + Extif4W::new(self, 4) + } + #[doc = "Bit 5 - External Pin Flag"] + #[inline(always)] + #[must_use] + pub fn extif5(&mut self) -> Extif5W { + Extif5W::new(self, 5) + } + #[doc = "Bit 6 - External Pin Flag"] + #[inline(always)] + #[must_use] + pub fn extif6(&mut self) -> Extif6W { + Extif6W::new(self, 6) + } + #[doc = "Bit 7 - External Pin Flag"] + #[inline(always)] + #[must_use] + pub fn extif7(&mut self) -> Extif7W { + Extif7W::new(self, 7) + } + #[doc = "Bit 8 - External Pin Flag"] + #[inline(always)] + #[must_use] + pub fn extif8(&mut self) -> Extif8W { + Extif8W::new(self, 8) + } + #[doc = "Bit 9 - External Pin Flag"] + #[inline(always)] + #[must_use] + pub fn extif9(&mut self) -> Extif9W { + Extif9W::new(self, 9) + } + #[doc = "Bit 10 - External Pin Flag"] + #[inline(always)] + #[must_use] + pub fn extif10(&mut self) -> Extif10W { + Extif10W::new(self, 10) + } + #[doc = "Bit 11 - External Pin Flag"] + #[inline(always)] + #[must_use] + pub fn extif11(&mut self) -> Extif11W { + Extif11W::new(self, 11) + } + #[doc = "Bits 16:27 - EM4 wake up"] + #[inline(always)] + #[must_use] + pub fn em4wu(&mut self) -> Em4wuW { + Em4wuW::new(self, 16) + } +} +#[doc = "Interrupt Flag Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfClrSpec; +impl crate::RegisterSpec for IfClrSpec { + type Ux = u32; +} +#[doc = "`write(|w| ..)` method takes [`if_clr::W`](W) writer structure"] +impl crate::Writable for IfClrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets IF_CLR to value 0"] +impl crate::Resettable for IfClrSpec { + const RESET_VALUE: u32 = 0; +} diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/if_set.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/if_set.rs new file mode 100644 index 0000000..954ce55 --- /dev/null +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/if_set.rs @@ -0,0 +1,123 @@ +#[doc = "Register `IF_SET` writer"] +pub type W = crate::W; +#[doc = "Field `EXTIF0` writer - External Pin Flag"] +pub type Extif0W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EXTIF1` writer - External Pin Flag"] +pub type Extif1W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EXTIF2` writer - External Pin Flag"] +pub type Extif2W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EXTIF3` writer - External Pin Flag"] +pub type Extif3W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EXTIF4` writer - External Pin Flag"] +pub type Extif4W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EXTIF5` writer - External Pin Flag"] +pub type Extif5W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EXTIF6` writer - External Pin Flag"] +pub type Extif6W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EXTIF7` writer - External Pin Flag"] +pub type Extif7W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EXTIF8` writer - External Pin Flag"] +pub type Extif8W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EXTIF9` writer - External Pin Flag"] +pub type Extif9W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EXTIF10` writer - External Pin Flag"] +pub type Extif10W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EXTIF11` writer - External Pin Flag"] +pub type Extif11W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `EM4WU` writer - EM4 wake up"] +pub type Em4wuW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +impl W { + #[doc = "Bit 0 - External Pin Flag"] + #[inline(always)] + #[must_use] + pub fn extif0(&mut self) -> Extif0W { + Extif0W::new(self, 0) + } + #[doc = "Bit 1 - External Pin Flag"] + #[inline(always)] + #[must_use] + pub fn extif1(&mut self) -> Extif1W { + Extif1W::new(self, 1) + } + #[doc = "Bit 2 - External Pin Flag"] + #[inline(always)] + #[must_use] + pub fn extif2(&mut self) -> Extif2W { + Extif2W::new(self, 2) + } + #[doc = "Bit 3 - External Pin Flag"] + #[inline(always)] + #[must_use] + pub fn extif3(&mut self) -> Extif3W { + Extif3W::new(self, 3) + } + #[doc = "Bit 4 - External Pin Flag"] + #[inline(always)] + #[must_use] + pub fn extif4(&mut self) -> Extif4W { + Extif4W::new(self, 4) + } + #[doc = "Bit 5 - External Pin Flag"] + #[inline(always)] + #[must_use] + pub fn extif5(&mut self) -> Extif5W { + Extif5W::new(self, 5) + } + #[doc = "Bit 6 - External Pin Flag"] + #[inline(always)] + #[must_use] + pub fn extif6(&mut self) -> Extif6W { + Extif6W::new(self, 6) + } + #[doc = "Bit 7 - External Pin Flag"] + #[inline(always)] + #[must_use] + pub fn extif7(&mut self) -> Extif7W { + Extif7W::new(self, 7) + } + #[doc = "Bit 8 - External Pin Flag"] + #[inline(always)] + #[must_use] + pub fn extif8(&mut self) -> Extif8W { + Extif8W::new(self, 8) + } + #[doc = "Bit 9 - External Pin Flag"] + #[inline(always)] + #[must_use] + pub fn extif9(&mut self) -> Extif9W { + Extif9W::new(self, 9) + } + #[doc = "Bit 10 - External Pin Flag"] + #[inline(always)] + #[must_use] + pub fn extif10(&mut self) -> Extif10W { + Extif10W::new(self, 10) + } + #[doc = "Bit 11 - External Pin Flag"] + #[inline(always)] + #[must_use] + pub fn extif11(&mut self) -> Extif11W { + Extif11W::new(self, 11) + } + #[doc = "Bits 16:27 - EM4 wake up"] + #[inline(always)] + #[must_use] + pub fn em4wu(&mut self) -> Em4wuW { + Em4wuW::new(self, 16) + } +} +#[doc = "Interrupt Flag Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_set::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSetSpec; +impl crate::RegisterSpec for IfSetSpec { + type Ux = u32; +} +#[doc = "`write(|w| ..)` method takes [`if_set::W`](W) writer structure"] +impl crate::Writable for IfSetSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets IF_SET to value 0"] +impl crate::Resettable for IfSetSpec { + const RESET_VALUE: u32 = 0; +} diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/ipversion.rs index ce7bde5..9510873 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - ip version id"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - ip version id"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x02"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout0route.rs index e6aec9d..7991f79 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout0route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_COLOUT0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_COLOUT0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - COLOUT0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - COLOUT0 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - COLOUT0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - COLOUT0 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - COLOUT0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - COLOUT0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - COLOUT0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - COLOUT0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "COLOUT0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_colout0route](index.html) module"] -pub struct KEYSCAN_COLOUT0ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_COLOUT0ROUTE_SPEC { +#[doc = "COLOUT0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanColout0routeSpec; +impl crate::RegisterSpec for KeyscanColout0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_colout0route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_COLOUT0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_colout0route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_COLOUT0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_colout0route::R`](R) reader structure"] +impl crate::Readable for KeyscanColout0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_colout0route::W`](W) writer structure"] +impl crate::Writable for KeyscanColout0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_COLOUT0ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_COLOUT0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanColout0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout1route.rs index f8a9735..6bf15c3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout1route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_COLOUT1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_COLOUT1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - COLOUT1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - COLOUT1 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - COLOUT1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - COLOUT1 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - COLOUT1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - COLOUT1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - COLOUT1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - COLOUT1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "COLOUT1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_colout1route](index.html) module"] -pub struct KEYSCAN_COLOUT1ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_COLOUT1ROUTE_SPEC { +#[doc = "COLOUT1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanColout1routeSpec; +impl crate::RegisterSpec for KeyscanColout1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_colout1route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_COLOUT1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_colout1route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_COLOUT1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_colout1route::R`](R) reader structure"] +impl crate::Readable for KeyscanColout1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_colout1route::W`](W) writer structure"] +impl crate::Writable for KeyscanColout1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_COLOUT1ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_COLOUT1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanColout1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout2route.rs index 36ad8ef..9cbe2f4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout2route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_COLOUT2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_COLOUT2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - COLOUT2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - COLOUT2 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - COLOUT2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - COLOUT2 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - COLOUT2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - COLOUT2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - COLOUT2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - COLOUT2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "COLOUT2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_colout2route](index.html) module"] -pub struct KEYSCAN_COLOUT2ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_COLOUT2ROUTE_SPEC { +#[doc = "COLOUT2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanColout2routeSpec; +impl crate::RegisterSpec for KeyscanColout2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_colout2route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_COLOUT2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_colout2route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_COLOUT2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_colout2route::R`](R) reader structure"] +impl crate::Readable for KeyscanColout2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_colout2route::W`](W) writer structure"] +impl crate::Writable for KeyscanColout2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_COLOUT2ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_COLOUT2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanColout2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout3route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout3route.rs index 54413d2..3f3e61c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout3route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout3route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_COLOUT3ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_COLOUT3ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - COLOUT3 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - COLOUT3 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT3ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - COLOUT3 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - COLOUT3 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT3ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - COLOUT3 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - COLOUT3 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - COLOUT3 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - COLOUT3 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "COLOUT3 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_colout3route](index.html) module"] -pub struct KEYSCAN_COLOUT3ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_COLOUT3ROUTE_SPEC { +#[doc = "COLOUT3 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout3route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout3route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanColout3routeSpec; +impl crate::RegisterSpec for KeyscanColout3routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_colout3route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_COLOUT3ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_colout3route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_COLOUT3ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_colout3route::R`](R) reader structure"] +impl crate::Readable for KeyscanColout3routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_colout3route::W`](W) writer structure"] +impl crate::Writable for KeyscanColout3routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_COLOUT3ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_COLOUT3ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanColout3routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout4route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout4route.rs index 3b6c144..f0f5a46 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout4route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout4route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_COLOUT4ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_COLOUT4ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - COLOUT4 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - COLOUT4 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT4ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - COLOUT4 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - COLOUT4 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT4ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - COLOUT4 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - COLOUT4 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - COLOUT4 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - COLOUT4 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "COLOUT4 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_colout4route](index.html) module"] -pub struct KEYSCAN_COLOUT4ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_COLOUT4ROUTE_SPEC { +#[doc = "COLOUT4 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout4route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout4route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanColout4routeSpec; +impl crate::RegisterSpec for KeyscanColout4routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_colout4route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_COLOUT4ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_colout4route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_COLOUT4ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_colout4route::R`](R) reader structure"] +impl crate::Readable for KeyscanColout4routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_colout4route::W`](W) writer structure"] +impl crate::Writable for KeyscanColout4routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_COLOUT4ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_COLOUT4ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanColout4routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout5route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout5route.rs index b1650aa..eefc548 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout5route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout5route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_COLOUT5ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_COLOUT5ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - COLOUT5 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - COLOUT5 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT5ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - COLOUT5 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - COLOUT5 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT5ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - COLOUT5 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - COLOUT5 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - COLOUT5 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - COLOUT5 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "COLOUT5 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_colout5route](index.html) module"] -pub struct KEYSCAN_COLOUT5ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_COLOUT5ROUTE_SPEC { +#[doc = "COLOUT5 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout5route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout5route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanColout5routeSpec; +impl crate::RegisterSpec for KeyscanColout5routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_colout5route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_COLOUT5ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_colout5route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_COLOUT5ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_colout5route::R`](R) reader structure"] +impl crate::Readable for KeyscanColout5routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_colout5route::W`](W) writer structure"] +impl crate::Writable for KeyscanColout5routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_COLOUT5ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_COLOUT5ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanColout5routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout6route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout6route.rs index 7af4eb5..140306e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout6route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout6route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_COLOUT6ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_COLOUT6ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - COLOUT6 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - COLOUT6 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT6ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - COLOUT6 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - COLOUT6 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT6ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - COLOUT6 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - COLOUT6 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - COLOUT6 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - COLOUT6 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "COLOUT6 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_colout6route](index.html) module"] -pub struct KEYSCAN_COLOUT6ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_COLOUT6ROUTE_SPEC { +#[doc = "COLOUT6 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout6route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout6route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanColout6routeSpec; +impl crate::RegisterSpec for KeyscanColout6routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_colout6route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_COLOUT6ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_colout6route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_COLOUT6ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_colout6route::R`](R) reader structure"] +impl crate::Readable for KeyscanColout6routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_colout6route::W`](W) writer structure"] +impl crate::Writable for KeyscanColout6routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_COLOUT6ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_COLOUT6ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanColout6routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout7route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout7route.rs index 12c864a..0ef9678 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout7route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_colout7route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_COLOUT7ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_COLOUT7ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - COLOUT7 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - COLOUT7 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT7ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - COLOUT7 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - COLOUT7 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_COLOUT7ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - COLOUT7 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - COLOUT7 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - COLOUT7 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - COLOUT7 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "COLOUT7 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_colout7route](index.html) module"] -pub struct KEYSCAN_COLOUT7ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_COLOUT7ROUTE_SPEC { +#[doc = "COLOUT7 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_colout7route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_colout7route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanColout7routeSpec; +impl crate::RegisterSpec for KeyscanColout7routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_colout7route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_COLOUT7ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_colout7route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_COLOUT7ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_colout7route::R`](R) reader structure"] +impl crate::Readable for KeyscanColout7routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_colout7route::W`](W) writer structure"] +impl crate::Writable for KeyscanColout7routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_COLOUT7ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_COLOUT7ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanColout7routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_routeen.rs index 88b0755..125d00e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_routeen.rs @@ -1,185 +1,145 @@ #[doc = "Register `KEYSCAN_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `COLOUT0PEN` reader - COLOUT0 pin enable control bit"] -pub type COLOUT0PEN_R = crate::BitReader; +pub type Colout0penR = crate::BitReader; #[doc = "Field `COLOUT0PEN` writer - COLOUT0 pin enable control bit"] -pub type COLOUT0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, KEYSCAN_ROUTEEN_SPEC, bool, O>; +pub type Colout0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COLOUT1PEN` reader - COLOUT1 pin enable control bit"] -pub type COLOUT1PEN_R = crate::BitReader; +pub type Colout1penR = crate::BitReader; #[doc = "Field `COLOUT1PEN` writer - COLOUT1 pin enable control bit"] -pub type COLOUT1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, KEYSCAN_ROUTEEN_SPEC, bool, O>; +pub type Colout1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COLOUT2PEN` reader - COLOUT2 pin enable control bit"] -pub type COLOUT2PEN_R = crate::BitReader; +pub type Colout2penR = crate::BitReader; #[doc = "Field `COLOUT2PEN` writer - COLOUT2 pin enable control bit"] -pub type COLOUT2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, KEYSCAN_ROUTEEN_SPEC, bool, O>; +pub type Colout2penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COLOUT3PEN` reader - COLOUT3 pin enable control bit"] -pub type COLOUT3PEN_R = crate::BitReader; +pub type Colout3penR = crate::BitReader; #[doc = "Field `COLOUT3PEN` writer - COLOUT3 pin enable control bit"] -pub type COLOUT3PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, KEYSCAN_ROUTEEN_SPEC, bool, O>; +pub type Colout3penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COLOUT4PEN` reader - COLOUT4 pin enable control bit"] -pub type COLOUT4PEN_R = crate::BitReader; +pub type Colout4penR = crate::BitReader; #[doc = "Field `COLOUT4PEN` writer - COLOUT4 pin enable control bit"] -pub type COLOUT4PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, KEYSCAN_ROUTEEN_SPEC, bool, O>; +pub type Colout4penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COLOUT5PEN` reader - COLOUT5 pin enable control bit"] -pub type COLOUT5PEN_R = crate::BitReader; +pub type Colout5penR = crate::BitReader; #[doc = "Field `COLOUT5PEN` writer - COLOUT5 pin enable control bit"] -pub type COLOUT5PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, KEYSCAN_ROUTEEN_SPEC, bool, O>; +pub type Colout5penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COLOUT6PEN` reader - COLOUT6 pin enable control bit"] -pub type COLOUT6PEN_R = crate::BitReader; +pub type Colout6penR = crate::BitReader; #[doc = "Field `COLOUT6PEN` writer - COLOUT6 pin enable control bit"] -pub type COLOUT6PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, KEYSCAN_ROUTEEN_SPEC, bool, O>; +pub type Colout6penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COLOUT7PEN` reader - COLOUT7 pin enable control bit"] -pub type COLOUT7PEN_R = crate::BitReader; +pub type Colout7penR = crate::BitReader; #[doc = "Field `COLOUT7PEN` writer - COLOUT7 pin enable control bit"] -pub type COLOUT7PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, KEYSCAN_ROUTEEN_SPEC, bool, O>; +pub type Colout7penW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - COLOUT0 pin enable control bit"] #[inline(always)] - pub fn colout0pen(&self) -> COLOUT0PEN_R { - COLOUT0PEN_R::new((self.bits & 1) != 0) + pub fn colout0pen(&self) -> Colout0penR { + Colout0penR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - COLOUT1 pin enable control bit"] #[inline(always)] - pub fn colout1pen(&self) -> COLOUT1PEN_R { - COLOUT1PEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn colout1pen(&self) -> Colout1penR { + Colout1penR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - COLOUT2 pin enable control bit"] #[inline(always)] - pub fn colout2pen(&self) -> COLOUT2PEN_R { - COLOUT2PEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn colout2pen(&self) -> Colout2penR { + Colout2penR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - COLOUT3 pin enable control bit"] #[inline(always)] - pub fn colout3pen(&self) -> COLOUT3PEN_R { - COLOUT3PEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn colout3pen(&self) -> Colout3penR { + Colout3penR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - COLOUT4 pin enable control bit"] #[inline(always)] - pub fn colout4pen(&self) -> COLOUT4PEN_R { - COLOUT4PEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn colout4pen(&self) -> Colout4penR { + Colout4penR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - COLOUT5 pin enable control bit"] #[inline(always)] - pub fn colout5pen(&self) -> COLOUT5PEN_R { - COLOUT5PEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn colout5pen(&self) -> Colout5penR { + Colout5penR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - COLOUT6 pin enable control bit"] #[inline(always)] - pub fn colout6pen(&self) -> COLOUT6PEN_R { - COLOUT6PEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn colout6pen(&self) -> Colout6penR { + Colout6penR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - COLOUT7 pin enable control bit"] #[inline(always)] - pub fn colout7pen(&self) -> COLOUT7PEN_R { - COLOUT7PEN_R::new(((self.bits >> 7) & 1) != 0) + pub fn colout7pen(&self) -> Colout7penR { + Colout7penR::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - COLOUT0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn colout0pen(&mut self) -> COLOUT0PEN_W<0> { - COLOUT0PEN_W::new(self) + pub fn colout0pen(&mut self) -> Colout0penW { + Colout0penW::new(self, 0) } #[doc = "Bit 1 - COLOUT1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn colout1pen(&mut self) -> COLOUT1PEN_W<1> { - COLOUT1PEN_W::new(self) + pub fn colout1pen(&mut self) -> Colout1penW { + Colout1penW::new(self, 1) } #[doc = "Bit 2 - COLOUT2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn colout2pen(&mut self) -> COLOUT2PEN_W<2> { - COLOUT2PEN_W::new(self) + pub fn colout2pen(&mut self) -> Colout2penW { + Colout2penW::new(self, 2) } #[doc = "Bit 3 - COLOUT3 pin enable control bit"] #[inline(always)] #[must_use] - pub fn colout3pen(&mut self) -> COLOUT3PEN_W<3> { - COLOUT3PEN_W::new(self) + pub fn colout3pen(&mut self) -> Colout3penW { + Colout3penW::new(self, 3) } #[doc = "Bit 4 - COLOUT4 pin enable control bit"] #[inline(always)] #[must_use] - pub fn colout4pen(&mut self) -> COLOUT4PEN_W<4> { - COLOUT4PEN_W::new(self) + pub fn colout4pen(&mut self) -> Colout4penW { + Colout4penW::new(self, 4) } #[doc = "Bit 5 - COLOUT5 pin enable control bit"] #[inline(always)] #[must_use] - pub fn colout5pen(&mut self) -> COLOUT5PEN_W<5> { - COLOUT5PEN_W::new(self) + pub fn colout5pen(&mut self) -> Colout5penW { + Colout5penW::new(self, 5) } #[doc = "Bit 6 - COLOUT6 pin enable control bit"] #[inline(always)] #[must_use] - pub fn colout6pen(&mut self) -> COLOUT6PEN_W<6> { - COLOUT6PEN_W::new(self) + pub fn colout6pen(&mut self) -> Colout6penW { + Colout6penW::new(self, 6) } #[doc = "Bit 7 - COLOUT7 pin enable control bit"] #[inline(always)] #[must_use] - pub fn colout7pen(&mut self) -> COLOUT7PEN_W<7> { - COLOUT7PEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn colout7pen(&mut self) -> Colout7penW { + Colout7penW::new(self, 7) } } -#[doc = "KEYSCAN pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_routeen](index.html) module"] -pub struct KEYSCAN_ROUTEEN_SPEC; -impl crate::RegisterSpec for KEYSCAN_ROUTEEN_SPEC { +#[doc = "KEYSCAN pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanRouteenSpec; +impl crate::RegisterSpec for KeyscanRouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_routeen::R](R) reader structure"] -impl crate::Readable for KEYSCAN_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_routeen::W](W) writer structure"] -impl crate::Writable for KEYSCAN_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_routeen::R`](R) reader structure"] +impl crate::Readable for KeyscanRouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_routeen::W`](W) writer structure"] +impl crate::Writable for KeyscanRouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_ROUTEEN to value 0"] -impl crate::Resettable for KEYSCAN_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanRouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_rowsense0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_rowsense0route.rs index e2e0ada..8d57d0f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_rowsense0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_rowsense0route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_ROWSENSE0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_ROWSENSE0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ROWSENSE0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ROWSENSE0 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_ROWSENSE0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ROWSENSE0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ROWSENSE0 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_ROWSENSE0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ROWSENSE0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ROWSENSE0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ROWSENSE0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ROWSENSE0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ROWSENSE0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_rowsense0route](index.html) module"] -pub struct KEYSCAN_ROWSENSE0ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_ROWSENSE0ROUTE_SPEC { +#[doc = "ROWSENSE0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_rowsense0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_rowsense0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanRowsense0routeSpec; +impl crate::RegisterSpec for KeyscanRowsense0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_rowsense0route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_ROWSENSE0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_rowsense0route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_ROWSENSE0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_rowsense0route::R`](R) reader structure"] +impl crate::Readable for KeyscanRowsense0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_rowsense0route::W`](W) writer structure"] +impl crate::Writable for KeyscanRowsense0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_ROWSENSE0ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_ROWSENSE0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanRowsense0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_rowsense1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_rowsense1route.rs index d308429..446540c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_rowsense1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_rowsense1route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_ROWSENSE1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_ROWSENSE1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ROWSENSE1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ROWSENSE1 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_ROWSENSE1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ROWSENSE1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ROWSENSE1 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_ROWSENSE1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ROWSENSE1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ROWSENSE1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ROWSENSE1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ROWSENSE1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ROWSENSE1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_rowsense1route](index.html) module"] -pub struct KEYSCAN_ROWSENSE1ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_ROWSENSE1ROUTE_SPEC { +#[doc = "ROWSENSE1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_rowsense1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_rowsense1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanRowsense1routeSpec; +impl crate::RegisterSpec for KeyscanRowsense1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_rowsense1route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_ROWSENSE1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_rowsense1route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_ROWSENSE1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_rowsense1route::R`](R) reader structure"] +impl crate::Readable for KeyscanRowsense1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_rowsense1route::W`](W) writer structure"] +impl crate::Writable for KeyscanRowsense1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_ROWSENSE1ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_ROWSENSE1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanRowsense1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_rowsense2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_rowsense2route.rs index d019378..20cbae6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_rowsense2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_rowsense2route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_ROWSENSE2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_ROWSENSE2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ROWSENSE2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ROWSENSE2 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_ROWSENSE2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ROWSENSE2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ROWSENSE2 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_ROWSENSE2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ROWSENSE2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ROWSENSE2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ROWSENSE2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ROWSENSE2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ROWSENSE2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_rowsense2route](index.html) module"] -pub struct KEYSCAN_ROWSENSE2ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_ROWSENSE2ROUTE_SPEC { +#[doc = "ROWSENSE2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_rowsense2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_rowsense2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanRowsense2routeSpec; +impl crate::RegisterSpec for KeyscanRowsense2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_rowsense2route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_ROWSENSE2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_rowsense2route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_ROWSENSE2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_rowsense2route::R`](R) reader structure"] +impl crate::Readable for KeyscanRowsense2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_rowsense2route::W`](W) writer structure"] +impl crate::Writable for KeyscanRowsense2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_ROWSENSE2ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_ROWSENSE2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanRowsense2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_rowsense3route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_rowsense3route.rs index 77ea318..b13178d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_rowsense3route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_rowsense3route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_ROWSENSE3ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_ROWSENSE3ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ROWSENSE3 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ROWSENSE3 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_ROWSENSE3ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ROWSENSE3 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ROWSENSE3 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_ROWSENSE3ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ROWSENSE3 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ROWSENSE3 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ROWSENSE3 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ROWSENSE3 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ROWSENSE3 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_rowsense3route](index.html) module"] -pub struct KEYSCAN_ROWSENSE3ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_ROWSENSE3ROUTE_SPEC { +#[doc = "ROWSENSE3 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_rowsense3route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_rowsense3route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanRowsense3routeSpec; +impl crate::RegisterSpec for KeyscanRowsense3routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_rowsense3route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_ROWSENSE3ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_rowsense3route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_ROWSENSE3ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_rowsense3route::R`](R) reader structure"] +impl crate::Readable for KeyscanRowsense3routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_rowsense3route::W`](W) writer structure"] +impl crate::Writable for KeyscanRowsense3routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_ROWSENSE3ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_ROWSENSE3ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanRowsense3routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_rowsense4route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_rowsense4route.rs index 7668e10..5526d95 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_rowsense4route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_rowsense4route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_ROWSENSE4ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_ROWSENSE4ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ROWSENSE4 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ROWSENSE4 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_ROWSENSE4ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ROWSENSE4 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ROWSENSE4 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_ROWSENSE4ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ROWSENSE4 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ROWSENSE4 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ROWSENSE4 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ROWSENSE4 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ROWSENSE4 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_rowsense4route](index.html) module"] -pub struct KEYSCAN_ROWSENSE4ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_ROWSENSE4ROUTE_SPEC { +#[doc = "ROWSENSE4 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_rowsense4route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_rowsense4route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanRowsense4routeSpec; +impl crate::RegisterSpec for KeyscanRowsense4routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_rowsense4route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_ROWSENSE4ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_rowsense4route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_ROWSENSE4ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_rowsense4route::R`](R) reader structure"] +impl crate::Readable for KeyscanRowsense4routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_rowsense4route::W`](W) writer structure"] +impl crate::Writable for KeyscanRowsense4routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_ROWSENSE4ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_ROWSENSE4ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanRowsense4routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_rowsense5route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_rowsense5route.rs index 824b261..37071dd 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_rowsense5route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/keyscan_rowsense5route.rs @@ -1,97 +1,55 @@ #[doc = "Register `KEYSCAN_ROWSENSE5ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `KEYSCAN_ROWSENSE5ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ROWSENSE5 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ROWSENSE5 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_ROWSENSE5ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ROWSENSE5 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ROWSENSE5 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, KEYSCAN_ROWSENSE5ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ROWSENSE5 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ROWSENSE5 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ROWSENSE5 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ROWSENSE5 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ROWSENSE5 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyscan_rowsense5route](index.html) module"] -pub struct KEYSCAN_ROWSENSE5ROUTE_SPEC; -impl crate::RegisterSpec for KEYSCAN_ROWSENSE5ROUTE_SPEC { +#[doc = "ROWSENSE5 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`keyscan_rowsense5route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyscan_rowsense5route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct KeyscanRowsense5routeSpec; +impl crate::RegisterSpec for KeyscanRowsense5routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [keyscan_rowsense5route::R](R) reader structure"] -impl crate::Readable for KEYSCAN_ROWSENSE5ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [keyscan_rowsense5route::W](W) writer structure"] -impl crate::Writable for KEYSCAN_ROWSENSE5ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`keyscan_rowsense5route::R`](R) reader structure"] +impl crate::Readable for KeyscanRowsense5routeSpec {} +#[doc = "`write(|w| ..)` method takes [`keyscan_rowsense5route::W`](W) writer structure"] +impl crate::Writable for KeyscanRowsense5routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KEYSCAN_ROWSENSE5ROUTE to value 0"] -impl crate::Resettable for KEYSCAN_ROWSENSE5ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for KeyscanRowsense5routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lcdcom.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lcdcom.rs index 0f728fb..31eb64a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lcdcom.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lcdcom.rs @@ -1,80 +1,40 @@ #[doc = "Register `LCDCOM` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LCDCOM` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LCDCOMALLOC` reader - LCD Common Allocation"] -pub type LCDCOMALLOC_R = crate::FieldReader; +pub type LcdcomallocR = crate::FieldReader; #[doc = "Field `LCDCOMALLOC` writer - LCD Common Allocation"] -pub type LCDCOMALLOC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, LCDCOM_SPEC, u8, u8, 4, O>; +pub type LcdcomallocW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - LCD Common Allocation"] #[inline(always)] - pub fn lcdcomalloc(&self) -> LCDCOMALLOC_R { - LCDCOMALLOC_R::new((self.bits & 0x0f) as u8) + pub fn lcdcomalloc(&self) -> LcdcomallocR { + LcdcomallocR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - LCD Common Allocation"] #[inline(always)] #[must_use] - pub fn lcdcomalloc(&mut self) -> LCDCOMALLOC_W<0> { - LCDCOMALLOC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lcdcomalloc(&mut self) -> LcdcomallocW { + LcdcomallocW::new(self, 0) } } -#[doc = "LCD Common Enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lcdcom](index.html) module"] -pub struct LCDCOM_SPEC; -impl crate::RegisterSpec for LCDCOM_SPEC { +#[doc = "LCD Common Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`lcdcom::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lcdcom::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LcdcomSpec; +impl crate::RegisterSpec for LcdcomSpec { type Ux = u32; } -#[doc = "`read()` method returns [lcdcom::R](R) reader structure"] -impl crate::Readable for LCDCOM_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lcdcom::W](W) writer structure"] -impl crate::Writable for LCDCOM_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lcdcom::R`](R) reader structure"] +impl crate::Readable for LcdcomSpec {} +#[doc = "`write(|w| ..)` method takes [`lcdcom::W`](W) writer structure"] +impl crate::Writable for LcdcomSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LCDCOM to value 0"] -impl crate::Resettable for LCDCOM_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LcdcomSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lcdseg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lcdseg.rs index ae06d54..735fc4f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lcdseg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lcdseg.rs @@ -1,80 +1,40 @@ #[doc = "Register `LCDSEG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LCDSEG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LCDSEGALLOC` reader - LCD Segment Allocation"] -pub type LCDSEGALLOC_R = crate::FieldReader; +pub type LcdsegallocR = crate::FieldReader; #[doc = "Field `LCDSEGALLOC` writer - LCD Segment Allocation"] -pub type LCDSEGALLOC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, LCDSEG_SPEC, u32, u32, 20, O>; +pub type LcdsegallocW<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { #[doc = "Bits 0:19 - LCD Segment Allocation"] #[inline(always)] - pub fn lcdsegalloc(&self) -> LCDSEGALLOC_R { - LCDSEGALLOC_R::new(self.bits & 0x000f_ffff) + pub fn lcdsegalloc(&self) -> LcdsegallocR { + LcdsegallocR::new(self.bits & 0x000f_ffff) } } impl W { #[doc = "Bits 0:19 - LCD Segment Allocation"] #[inline(always)] #[must_use] - pub fn lcdsegalloc(&mut self) -> LCDSEGALLOC_W<0> { - LCDSEGALLOC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lcdsegalloc(&mut self) -> LcdsegallocW { + LcdsegallocW::new(self, 0) } } -#[doc = "LCD Segment Enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lcdseg](index.html) module"] -pub struct LCDSEG_SPEC; -impl crate::RegisterSpec for LCDSEG_SPEC { +#[doc = "LCD Segment Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`lcdseg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lcdseg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LcdsegSpec; +impl crate::RegisterSpec for LcdsegSpec { type Ux = u32; } -#[doc = "`read()` method returns [lcdseg::R](R) reader structure"] -impl crate::Readable for LCDSEG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lcdseg::W](W) writer structure"] -impl crate::Writable for LCDSEG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lcdseg::R`](R) reader structure"] +impl crate::Readable for LcdsegSpec {} +#[doc = "`write(|w| ..)` method takes [`lcdseg::W`](W) writer structure"] +impl crate::Writable for LcdsegSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LCDSEG to value 0"] -impl crate::Resettable for LCDSEG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LcdsegSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch0outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch0outroute.rs index 2c684b9..d108431 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch0outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch0outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH0OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH0OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH0OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH0OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH0OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH0OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH0OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH0OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH0OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH0OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH0OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH0OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH0OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch0outroute](index.html) module"] -pub struct LESENSE_CH0OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH0OUTROUTE_SPEC { +#[doc = "CH0OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch0outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch0outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh0outrouteSpec; +impl crate::RegisterSpec for LesenseCh0outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch0outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH0OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch0outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH0OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch0outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh0outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch0outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh0outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH0OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH0OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh0outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch10outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch10outroute.rs index cdc5d8d..c29d8a2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch10outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch10outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH10OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH10OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH10OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH10OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH10OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH10OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH10OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH10OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH10OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH10OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH10OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH10OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH10OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch10outroute](index.html) module"] -pub struct LESENSE_CH10OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH10OUTROUTE_SPEC { +#[doc = "CH10OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch10outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch10outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh10outrouteSpec; +impl crate::RegisterSpec for LesenseCh10outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch10outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH10OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch10outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH10OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch10outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh10outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch10outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh10outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH10OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH10OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh10outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch11outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch11outroute.rs index 37f2531..a0fe4fa 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch11outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch11outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH11OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH11OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH11OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH11OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH11OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH11OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH11OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH11OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH11OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH11OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH11OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH11OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH11OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch11outroute](index.html) module"] -pub struct LESENSE_CH11OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH11OUTROUTE_SPEC { +#[doc = "CH11OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch11outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch11outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh11outrouteSpec; +impl crate::RegisterSpec for LesenseCh11outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch11outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH11OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch11outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH11OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch11outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh11outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch11outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh11outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH11OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH11OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh11outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch12outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch12outroute.rs index 2edc25b..169bc21 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch12outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch12outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH12OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH12OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH12OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH12OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH12OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH12OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH12OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH12OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH12OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH12OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH12OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH12OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH12OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch12outroute](index.html) module"] -pub struct LESENSE_CH12OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH12OUTROUTE_SPEC { +#[doc = "CH12OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch12outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch12outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh12outrouteSpec; +impl crate::RegisterSpec for LesenseCh12outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch12outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH12OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch12outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH12OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch12outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh12outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch12outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh12outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH12OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH12OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh12outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch13outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch13outroute.rs index 6dc82d1..1ff569e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch13outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch13outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH13OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH13OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH13OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH13OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH13OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH13OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH13OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH13OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH13OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH13OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH13OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH13OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH13OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch13outroute](index.html) module"] -pub struct LESENSE_CH13OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH13OUTROUTE_SPEC { +#[doc = "CH13OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch13outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch13outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh13outrouteSpec; +impl crate::RegisterSpec for LesenseCh13outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch13outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH13OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch13outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH13OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch13outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh13outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch13outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh13outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH13OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH13OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh13outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch14outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch14outroute.rs index 2e5c429..aeea6b3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch14outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch14outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH14OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH14OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH14OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH14OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH14OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH14OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH14OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH14OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH14OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH14OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH14OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH14OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH14OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch14outroute](index.html) module"] -pub struct LESENSE_CH14OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH14OUTROUTE_SPEC { +#[doc = "CH14OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch14outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch14outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh14outrouteSpec; +impl crate::RegisterSpec for LesenseCh14outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch14outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH14OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch14outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH14OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch14outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh14outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch14outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh14outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH14OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH14OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh14outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch15outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch15outroute.rs index 56db41c..b9cd617 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch15outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch15outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH15OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH15OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH15OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH15OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH15OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH15OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH15OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH15OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH15OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH15OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH15OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH15OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH15OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch15outroute](index.html) module"] -pub struct LESENSE_CH15OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH15OUTROUTE_SPEC { +#[doc = "CH15OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch15outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch15outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh15outrouteSpec; +impl crate::RegisterSpec for LesenseCh15outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch15outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH15OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch15outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH15OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch15outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh15outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch15outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh15outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH15OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH15OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh15outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch1outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch1outroute.rs index 2a5a0fc..da13e0c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch1outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch1outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH1OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH1OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH1OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH1OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH1OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH1OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH1OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH1OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH1OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH1OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH1OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH1OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH1OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch1outroute](index.html) module"] -pub struct LESENSE_CH1OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH1OUTROUTE_SPEC { +#[doc = "CH1OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch1outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch1outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh1outrouteSpec; +impl crate::RegisterSpec for LesenseCh1outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch1outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH1OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch1outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH1OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch1outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh1outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch1outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh1outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH1OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH1OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh1outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch2outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch2outroute.rs index 5a24a1d..d4fa85a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch2outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch2outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH2OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH2OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH2OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH2OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH2OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH2OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH2OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH2OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH2OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH2OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH2OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH2OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH2OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch2outroute](index.html) module"] -pub struct LESENSE_CH2OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH2OUTROUTE_SPEC { +#[doc = "CH2OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch2outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch2outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh2outrouteSpec; +impl crate::RegisterSpec for LesenseCh2outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch2outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH2OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch2outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH2OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch2outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh2outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch2outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh2outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH2OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH2OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh2outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch3outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch3outroute.rs index fe8d7cc..5baabe2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch3outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch3outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH3OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH3OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH3OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH3OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH3OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH3OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH3OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH3OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH3OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH3OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH3OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH3OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH3OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch3outroute](index.html) module"] -pub struct LESENSE_CH3OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH3OUTROUTE_SPEC { +#[doc = "CH3OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch3outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch3outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh3outrouteSpec; +impl crate::RegisterSpec for LesenseCh3outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch3outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH3OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch3outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH3OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch3outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh3outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch3outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh3outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH3OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH3OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh3outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch4outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch4outroute.rs index 2bec8b7..8bf138e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch4outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch4outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH4OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH4OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH4OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH4OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH4OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH4OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH4OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH4OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH4OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH4OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH4OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH4OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH4OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch4outroute](index.html) module"] -pub struct LESENSE_CH4OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH4OUTROUTE_SPEC { +#[doc = "CH4OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch4outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch4outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh4outrouteSpec; +impl crate::RegisterSpec for LesenseCh4outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch4outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH4OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch4outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH4OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch4outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh4outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch4outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh4outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH4OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH4OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh4outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch5outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch5outroute.rs index ea26d0c..184a327 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch5outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch5outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH5OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH5OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH5OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH5OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH5OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH5OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH5OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH5OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH5OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH5OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH5OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH5OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH5OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch5outroute](index.html) module"] -pub struct LESENSE_CH5OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH5OUTROUTE_SPEC { +#[doc = "CH5OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch5outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch5outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh5outrouteSpec; +impl crate::RegisterSpec for LesenseCh5outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch5outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH5OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch5outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH5OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch5outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh5outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch5outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh5outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH5OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH5OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh5outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch6outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch6outroute.rs index 7c49c5b..ac18258 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch6outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch6outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH6OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH6OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH6OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH6OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH6OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH6OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH6OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH6OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH6OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH6OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH6OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH6OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH6OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch6outroute](index.html) module"] -pub struct LESENSE_CH6OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH6OUTROUTE_SPEC { +#[doc = "CH6OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch6outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch6outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh6outrouteSpec; +impl crate::RegisterSpec for LesenseCh6outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch6outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH6OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch6outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH6OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch6outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh6outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch6outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh6outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH6OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH6OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh6outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch7outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch7outroute.rs index e6688af..98b5ab8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch7outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch7outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH7OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH7OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH7OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH7OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH7OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH7OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH7OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH7OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH7OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH7OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH7OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH7OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH7OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch7outroute](index.html) module"] -pub struct LESENSE_CH7OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH7OUTROUTE_SPEC { +#[doc = "CH7OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch7outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch7outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh7outrouteSpec; +impl crate::RegisterSpec for LesenseCh7outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch7outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH7OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch7outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH7OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch7outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh7outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch7outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh7outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH7OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH7OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh7outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch8outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch8outroute.rs index 6b161b3..b33d96c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch8outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch8outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH8OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH8OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH8OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH8OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH8OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH8OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH8OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH8OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH8OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH8OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH8OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH8OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH8OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch8outroute](index.html) module"] -pub struct LESENSE_CH8OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH8OUTROUTE_SPEC { +#[doc = "CH8OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch8outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch8outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh8outrouteSpec; +impl crate::RegisterSpec for LesenseCh8outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch8outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH8OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch8outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH8OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch8outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh8outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch8outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh8outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH8OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH8OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh8outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch9outroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch9outroute.rs index b0c7cda..89d496a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch9outroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_ch9outroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `LESENSE_CH9OUTROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_CH9OUTROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CH9OUT port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CH9OUT port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH9OUTROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CH9OUT pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CH9OUT pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LESENSE_CH9OUTROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CH9OUT port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CH9OUT pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CH9OUT port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CH9OUT pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CH9OUT port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_ch9outroute](index.html) module"] -pub struct LESENSE_CH9OUTROUTE_SPEC; -impl crate::RegisterSpec for LESENSE_CH9OUTROUTE_SPEC { +#[doc = "CH9OUT port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_ch9outroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_ch9outroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseCh9outrouteSpec; +impl crate::RegisterSpec for LesenseCh9outrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_ch9outroute::R](R) reader structure"] -impl crate::Readable for LESENSE_CH9OUTROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_ch9outroute::W](W) writer structure"] -impl crate::Writable for LESENSE_CH9OUTROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_ch9outroute::R`](R) reader structure"] +impl crate::Readable for LesenseCh9outrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_ch9outroute::W`](W) writer structure"] +impl crate::Writable for LesenseCh9outrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_CH9OUTROUTE to value 0"] -impl crate::Resettable for LESENSE_CH9OUTROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseCh9outrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_routeen.rs index ee06388..8477da8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lesense_routeen.rs @@ -1,305 +1,265 @@ #[doc = "Register `LESENSE_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LESENSE_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CH0OUTPEN` reader - CH0OUT pin enable control bit"] -pub type CH0OUTPEN_R = crate::BitReader; +pub type Ch0outpenR = crate::BitReader; #[doc = "Field `CH0OUTPEN` writer - CH0OUT pin enable control bit"] -pub type CH0OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch0outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1OUTPEN` reader - CH1OUT pin enable control bit"] -pub type CH1OUTPEN_R = crate::BitReader; +pub type Ch1outpenR = crate::BitReader; #[doc = "Field `CH1OUTPEN` writer - CH1OUT pin enable control bit"] -pub type CH1OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch1outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2OUTPEN` reader - CH2OUT pin enable control bit"] -pub type CH2OUTPEN_R = crate::BitReader; +pub type Ch2outpenR = crate::BitReader; #[doc = "Field `CH2OUTPEN` writer - CH2OUT pin enable control bit"] -pub type CH2OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch2outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3OUTPEN` reader - CH3OUT pin enable control bit"] -pub type CH3OUTPEN_R = crate::BitReader; +pub type Ch3outpenR = crate::BitReader; #[doc = "Field `CH3OUTPEN` writer - CH3OUT pin enable control bit"] -pub type CH3OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch3outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH4OUTPEN` reader - CH4OUT pin enable control bit"] -pub type CH4OUTPEN_R = crate::BitReader; +pub type Ch4outpenR = crate::BitReader; #[doc = "Field `CH4OUTPEN` writer - CH4OUT pin enable control bit"] -pub type CH4OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch4outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH5OUTPEN` reader - CH5OUT pin enable control bit"] -pub type CH5OUTPEN_R = crate::BitReader; +pub type Ch5outpenR = crate::BitReader; #[doc = "Field `CH5OUTPEN` writer - CH5OUT pin enable control bit"] -pub type CH5OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch5outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH6OUTPEN` reader - CH6OUT pin enable control bit"] -pub type CH6OUTPEN_R = crate::BitReader; +pub type Ch6outpenR = crate::BitReader; #[doc = "Field `CH6OUTPEN` writer - CH6OUT pin enable control bit"] -pub type CH6OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch6outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH7OUTPEN` reader - CH7OUT pin enable control bit"] -pub type CH7OUTPEN_R = crate::BitReader; +pub type Ch7outpenR = crate::BitReader; #[doc = "Field `CH7OUTPEN` writer - CH7OUT pin enable control bit"] -pub type CH7OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch7outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH8OUTPEN` reader - CH8OUT pin enable control bit"] -pub type CH8OUTPEN_R = crate::BitReader; +pub type Ch8outpenR = crate::BitReader; #[doc = "Field `CH8OUTPEN` writer - CH8OUT pin enable control bit"] -pub type CH8OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch8outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH9OUTPEN` reader - CH9OUT pin enable control bit"] -pub type CH9OUTPEN_R = crate::BitReader; +pub type Ch9outpenR = crate::BitReader; #[doc = "Field `CH9OUTPEN` writer - CH9OUT pin enable control bit"] -pub type CH9OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch9outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH10OUTPEN` reader - CH10OUT pin enable control bit"] -pub type CH10OUTPEN_R = crate::BitReader; +pub type Ch10outpenR = crate::BitReader; #[doc = "Field `CH10OUTPEN` writer - CH10OUT pin enable control bit"] -pub type CH10OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch10outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH11OUTPEN` reader - CH11OUT pin enable control bit"] -pub type CH11OUTPEN_R = crate::BitReader; +pub type Ch11outpenR = crate::BitReader; #[doc = "Field `CH11OUTPEN` writer - CH11OUT pin enable control bit"] -pub type CH11OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch11outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH12OUTPEN` reader - CH12OUT pin enable control bit"] -pub type CH12OUTPEN_R = crate::BitReader; +pub type Ch12outpenR = crate::BitReader; #[doc = "Field `CH12OUTPEN` writer - CH12OUT pin enable control bit"] -pub type CH12OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch12outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH13OUTPEN` reader - CH13OUT pin enable control bit"] -pub type CH13OUTPEN_R = crate::BitReader; +pub type Ch13outpenR = crate::BitReader; #[doc = "Field `CH13OUTPEN` writer - CH13OUT pin enable control bit"] -pub type CH13OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch13outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH14OUTPEN` reader - CH14OUT pin enable control bit"] -pub type CH14OUTPEN_R = crate::BitReader; +pub type Ch14outpenR = crate::BitReader; #[doc = "Field `CH14OUTPEN` writer - CH14OUT pin enable control bit"] -pub type CH14OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch14outpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH15OUTPEN` reader - CH15OUT pin enable control bit"] -pub type CH15OUTPEN_R = crate::BitReader; +pub type Ch15outpenR = crate::BitReader; #[doc = "Field `CH15OUTPEN` writer - CH15OUT pin enable control bit"] -pub type CH15OUTPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LESENSE_ROUTEEN_SPEC, bool, O>; +pub type Ch15outpenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CH0OUT pin enable control bit"] #[inline(always)] - pub fn ch0outpen(&self) -> CH0OUTPEN_R { - CH0OUTPEN_R::new((self.bits & 1) != 0) + pub fn ch0outpen(&self) -> Ch0outpenR { + Ch0outpenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CH1OUT pin enable control bit"] #[inline(always)] - pub fn ch1outpen(&self) -> CH1OUTPEN_R { - CH1OUTPEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1outpen(&self) -> Ch1outpenR { + Ch1outpenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CH2OUT pin enable control bit"] #[inline(always)] - pub fn ch2outpen(&self) -> CH2OUTPEN_R { - CH2OUTPEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2outpen(&self) -> Ch2outpenR { + Ch2outpenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - CH3OUT pin enable control bit"] #[inline(always)] - pub fn ch3outpen(&self) -> CH3OUTPEN_R { - CH3OUTPEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3outpen(&self) -> Ch3outpenR { + Ch3outpenR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - CH4OUT pin enable control bit"] #[inline(always)] - pub fn ch4outpen(&self) -> CH4OUTPEN_R { - CH4OUTPEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4outpen(&self) -> Ch4outpenR { + Ch4outpenR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CH5OUT pin enable control bit"] #[inline(always)] - pub fn ch5outpen(&self) -> CH5OUTPEN_R { - CH5OUTPEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5outpen(&self) -> Ch5outpenR { + Ch5outpenR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - CH6OUT pin enable control bit"] #[inline(always)] - pub fn ch6outpen(&self) -> CH6OUTPEN_R { - CH6OUTPEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6outpen(&self) -> Ch6outpenR { + Ch6outpenR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - CH7OUT pin enable control bit"] #[inline(always)] - pub fn ch7outpen(&self) -> CH7OUTPEN_R { - CH7OUTPEN_R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7outpen(&self) -> Ch7outpenR { + Ch7outpenR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - CH8OUT pin enable control bit"] #[inline(always)] - pub fn ch8outpen(&self) -> CH8OUTPEN_R { - CH8OUTPEN_R::new(((self.bits >> 8) & 1) != 0) + pub fn ch8outpen(&self) -> Ch8outpenR { + Ch8outpenR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - CH9OUT pin enable control bit"] #[inline(always)] - pub fn ch9outpen(&self) -> CH9OUTPEN_R { - CH9OUTPEN_R::new(((self.bits >> 9) & 1) != 0) + pub fn ch9outpen(&self) -> Ch9outpenR { + Ch9outpenR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - CH10OUT pin enable control bit"] #[inline(always)] - pub fn ch10outpen(&self) -> CH10OUTPEN_R { - CH10OUTPEN_R::new(((self.bits >> 10) & 1) != 0) + pub fn ch10outpen(&self) -> Ch10outpenR { + Ch10outpenR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - CH11OUT pin enable control bit"] #[inline(always)] - pub fn ch11outpen(&self) -> CH11OUTPEN_R { - CH11OUTPEN_R::new(((self.bits >> 11) & 1) != 0) + pub fn ch11outpen(&self) -> Ch11outpenR { + Ch11outpenR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - CH12OUT pin enable control bit"] #[inline(always)] - pub fn ch12outpen(&self) -> CH12OUTPEN_R { - CH12OUTPEN_R::new(((self.bits >> 12) & 1) != 0) + pub fn ch12outpen(&self) -> Ch12outpenR { + Ch12outpenR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - CH13OUT pin enable control bit"] #[inline(always)] - pub fn ch13outpen(&self) -> CH13OUTPEN_R { - CH13OUTPEN_R::new(((self.bits >> 13) & 1) != 0) + pub fn ch13outpen(&self) -> Ch13outpenR { + Ch13outpenR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - CH14OUT pin enable control bit"] #[inline(always)] - pub fn ch14outpen(&self) -> CH14OUTPEN_R { - CH14OUTPEN_R::new(((self.bits >> 14) & 1) != 0) + pub fn ch14outpen(&self) -> Ch14outpenR { + Ch14outpenR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - CH15OUT pin enable control bit"] #[inline(always)] - pub fn ch15outpen(&self) -> CH15OUTPEN_R { - CH15OUTPEN_R::new(((self.bits >> 15) & 1) != 0) + pub fn ch15outpen(&self) -> Ch15outpenR { + Ch15outpenR::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - CH0OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch0outpen(&mut self) -> CH0OUTPEN_W<0> { - CH0OUTPEN_W::new(self) + pub fn ch0outpen(&mut self) -> Ch0outpenW { + Ch0outpenW::new(self, 0) } #[doc = "Bit 1 - CH1OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch1outpen(&mut self) -> CH1OUTPEN_W<1> { - CH1OUTPEN_W::new(self) + pub fn ch1outpen(&mut self) -> Ch1outpenW { + Ch1outpenW::new(self, 1) } #[doc = "Bit 2 - CH2OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch2outpen(&mut self) -> CH2OUTPEN_W<2> { - CH2OUTPEN_W::new(self) + pub fn ch2outpen(&mut self) -> Ch2outpenW { + Ch2outpenW::new(self, 2) } #[doc = "Bit 3 - CH3OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch3outpen(&mut self) -> CH3OUTPEN_W<3> { - CH3OUTPEN_W::new(self) + pub fn ch3outpen(&mut self) -> Ch3outpenW { + Ch3outpenW::new(self, 3) } #[doc = "Bit 4 - CH4OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch4outpen(&mut self) -> CH4OUTPEN_W<4> { - CH4OUTPEN_W::new(self) + pub fn ch4outpen(&mut self) -> Ch4outpenW { + Ch4outpenW::new(self, 4) } #[doc = "Bit 5 - CH5OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch5outpen(&mut self) -> CH5OUTPEN_W<5> { - CH5OUTPEN_W::new(self) + pub fn ch5outpen(&mut self) -> Ch5outpenW { + Ch5outpenW::new(self, 5) } #[doc = "Bit 6 - CH6OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch6outpen(&mut self) -> CH6OUTPEN_W<6> { - CH6OUTPEN_W::new(self) + pub fn ch6outpen(&mut self) -> Ch6outpenW { + Ch6outpenW::new(self, 6) } #[doc = "Bit 7 - CH7OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch7outpen(&mut self) -> CH7OUTPEN_W<7> { - CH7OUTPEN_W::new(self) + pub fn ch7outpen(&mut self) -> Ch7outpenW { + Ch7outpenW::new(self, 7) } #[doc = "Bit 8 - CH8OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch8outpen(&mut self) -> CH8OUTPEN_W<8> { - CH8OUTPEN_W::new(self) + pub fn ch8outpen(&mut self) -> Ch8outpenW { + Ch8outpenW::new(self, 8) } #[doc = "Bit 9 - CH9OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch9outpen(&mut self) -> CH9OUTPEN_W<9> { - CH9OUTPEN_W::new(self) + pub fn ch9outpen(&mut self) -> Ch9outpenW { + Ch9outpenW::new(self, 9) } #[doc = "Bit 10 - CH10OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch10outpen(&mut self) -> CH10OUTPEN_W<10> { - CH10OUTPEN_W::new(self) + pub fn ch10outpen(&mut self) -> Ch10outpenW { + Ch10outpenW::new(self, 10) } #[doc = "Bit 11 - CH11OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch11outpen(&mut self) -> CH11OUTPEN_W<11> { - CH11OUTPEN_W::new(self) + pub fn ch11outpen(&mut self) -> Ch11outpenW { + Ch11outpenW::new(self, 11) } #[doc = "Bit 12 - CH12OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch12outpen(&mut self) -> CH12OUTPEN_W<12> { - CH12OUTPEN_W::new(self) + pub fn ch12outpen(&mut self) -> Ch12outpenW { + Ch12outpenW::new(self, 12) } #[doc = "Bit 13 - CH13OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch13outpen(&mut self) -> CH13OUTPEN_W<13> { - CH13OUTPEN_W::new(self) + pub fn ch13outpen(&mut self) -> Ch13outpenW { + Ch13outpenW::new(self, 13) } #[doc = "Bit 14 - CH14OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch14outpen(&mut self) -> CH14OUTPEN_W<14> { - CH14OUTPEN_W::new(self) + pub fn ch14outpen(&mut self) -> Ch14outpenW { + Ch14outpenW::new(self, 14) } #[doc = "Bit 15 - CH15OUT pin enable control bit"] #[inline(always)] #[must_use] - pub fn ch15outpen(&mut self) -> CH15OUTPEN_W<15> { - CH15OUTPEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ch15outpen(&mut self) -> Ch15outpenW { + Ch15outpenW::new(self, 15) } } -#[doc = "LESENSE pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lesense_routeen](index.html) module"] -pub struct LESENSE_ROUTEEN_SPEC; -impl crate::RegisterSpec for LESENSE_ROUTEEN_SPEC { +#[doc = "LESENSE pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`lesense_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lesense_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LesenseRouteenSpec; +impl crate::RegisterSpec for LesenseRouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [lesense_routeen::R](R) reader structure"] -impl crate::Readable for LESENSE_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lesense_routeen::W](W) writer structure"] -impl crate::Writable for LESENSE_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lesense_routeen::R`](R) reader structure"] +impl crate::Readable for LesenseRouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`lesense_routeen::W`](W) writer structure"] +impl crate::Writable for LesenseRouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LESENSE_ROUTEEN to value 0"] -impl crate::Resettable for LESENSE_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LesenseRouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/letimer_out0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/letimer_out0route.rs index 3ddaf7d..60e7348 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/letimer_out0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/letimer_out0route.rs @@ -1,96 +1,55 @@ #[doc = "Register `LETIMER_OUT0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LETIMER_OUT0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - OUT0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - OUT0 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LETIMER_OUT0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - OUT0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - OUT0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, LETIMER_OUT0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - OUT0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - OUT0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - OUT0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - OUT0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "OUT0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [letimer_out0route](index.html) module"] -pub struct LETIMER_OUT0ROUTE_SPEC; -impl crate::RegisterSpec for LETIMER_OUT0ROUTE_SPEC { +#[doc = "OUT0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`letimer_out0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`letimer_out0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LetimerOut0routeSpec; +impl crate::RegisterSpec for LetimerOut0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [letimer_out0route::R](R) reader structure"] -impl crate::Readable for LETIMER_OUT0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [letimer_out0route::W](W) writer structure"] -impl crate::Writable for LETIMER_OUT0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`letimer_out0route::R`](R) reader structure"] +impl crate::Readable for LetimerOut0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`letimer_out0route::W`](W) writer structure"] +impl crate::Writable for LetimerOut0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LETIMER_OUT0ROUTE to value 0"] -impl crate::Resettable for LETIMER_OUT0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LetimerOut0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/letimer_out1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/letimer_out1route.rs index b9f7a76..c2b37dd 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/letimer_out1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/letimer_out1route.rs @@ -1,96 +1,55 @@ #[doc = "Register `LETIMER_OUT1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LETIMER_OUT1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - OUT1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - OUT1 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LETIMER_OUT1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - OUT1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - OUT1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, LETIMER_OUT1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - OUT1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - OUT1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - OUT1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - OUT1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "OUT1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [letimer_out1route](index.html) module"] -pub struct LETIMER_OUT1ROUTE_SPEC; -impl crate::RegisterSpec for LETIMER_OUT1ROUTE_SPEC { +#[doc = "OUT1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`letimer_out1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`letimer_out1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LetimerOut1routeSpec; +impl crate::RegisterSpec for LetimerOut1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [letimer_out1route::R](R) reader structure"] -impl crate::Readable for LETIMER_OUT1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [letimer_out1route::W](W) writer structure"] -impl crate::Writable for LETIMER_OUT1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`letimer_out1route::R`](R) reader structure"] +impl crate::Readable for LetimerOut1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`letimer_out1route::W`](W) writer structure"] +impl crate::Writable for LetimerOut1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LETIMER_OUT1ROUTE to value 0"] -impl crate::Resettable for LETIMER_OUT1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LetimerOut1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/letimer_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/letimer_routeen.rs index f5544d7..55adea8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/letimer_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/letimer_routeen.rs @@ -1,95 +1,55 @@ #[doc = "Register `LETIMER_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LETIMER_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUT0PEN` reader - OUT0 pin enable control bit"] -pub type OUT0PEN_R = crate::BitReader; +pub type Out0penR = crate::BitReader; #[doc = "Field `OUT0PEN` writer - OUT0 pin enable control bit"] -pub type OUT0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LETIMER_ROUTEEN_SPEC, bool, O>; +pub type Out0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OUT1PEN` reader - OUT1 pin enable control bit"] -pub type OUT1PEN_R = crate::BitReader; +pub type Out1penR = crate::BitReader; #[doc = "Field `OUT1PEN` writer - OUT1 pin enable control bit"] -pub type OUT1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LETIMER_ROUTEEN_SPEC, bool, O>; +pub type Out1penW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - OUT0 pin enable control bit"] #[inline(always)] - pub fn out0pen(&self) -> OUT0PEN_R { - OUT0PEN_R::new((self.bits & 1) != 0) + pub fn out0pen(&self) -> Out0penR { + Out0penR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - OUT1 pin enable control bit"] #[inline(always)] - pub fn out1pen(&self) -> OUT1PEN_R { - OUT1PEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn out1pen(&self) -> Out1penR { + Out1penR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - OUT0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn out0pen(&mut self) -> OUT0PEN_W<0> { - OUT0PEN_W::new(self) + pub fn out0pen(&mut self) -> Out0penW { + Out0penW::new(self, 0) } #[doc = "Bit 1 - OUT1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn out1pen(&mut self) -> OUT1PEN_W<1> { - OUT1PEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn out1pen(&mut self) -> Out1penW { + Out1penW::new(self, 1) } } -#[doc = "LETIMER pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [letimer_routeen](index.html) module"] -pub struct LETIMER_ROUTEEN_SPEC; -impl crate::RegisterSpec for LETIMER_ROUTEEN_SPEC { +#[doc = "LETIMER pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`letimer_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`letimer_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LetimerRouteenSpec; +impl crate::RegisterSpec for LetimerRouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [letimer_routeen::R](R) reader structure"] -impl crate::Readable for LETIMER_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [letimer_routeen::W](W) writer structure"] -impl crate::Writable for LETIMER_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`letimer_routeen::R`](R) reader structure"] +impl crate::Readable for LetimerRouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`letimer_routeen::W`](W) writer structure"] +impl crate::Writable for LetimerRouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LETIMER_ROUTEEN to value 0"] -impl crate::Resettable for LETIMER_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LetimerRouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lock.rs index 0de0a0f..970a6e5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Configuration Lock Key\n\nValue on reset: 42292"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "42292: Unlock code"] - UNLOCK = 42292, + Unlock = 42292, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Configuration Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Unlock code"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Configuration Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0xa534"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0xa534; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0xa534; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/pcnt0_s0inroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/pcnt0_s0inroute.rs index 30c90e1..7a9ced3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/pcnt0_s0inroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/pcnt0_s0inroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `PCNT0_S0INROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PCNT0_S0INROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - S0IN port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - S0IN port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PCNT0_S0INROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - S0IN pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - S0IN pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PCNT0_S0INROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - S0IN port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - S0IN pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - S0IN port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - S0IN pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "S0IN port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pcnt0_s0inroute](index.html) module"] -pub struct PCNT0_S0INROUTE_SPEC; -impl crate::RegisterSpec for PCNT0_S0INROUTE_SPEC { +#[doc = "S0IN port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`pcnt0_s0inroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcnt0_s0inroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Pcnt0S0inrouteSpec; +impl crate::RegisterSpec for Pcnt0S0inrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [pcnt0_s0inroute::R](R) reader structure"] -impl crate::Readable for PCNT0_S0INROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [pcnt0_s0inroute::W](W) writer structure"] -impl crate::Writable for PCNT0_S0INROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`pcnt0_s0inroute::R`](R) reader structure"] +impl crate::Readable for Pcnt0S0inrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`pcnt0_s0inroute::W`](W) writer structure"] +impl crate::Writable for Pcnt0S0inrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PCNT0_S0INROUTE to value 0"] -impl crate::Resettable for PCNT0_S0INROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Pcnt0S0inrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/pcnt0_s1inroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/pcnt0_s1inroute.rs index 282aae7..5e08d70 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/pcnt0_s1inroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/pcnt0_s1inroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `PCNT0_S1INROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PCNT0_S1INROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - S1IN port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - S1IN port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PCNT0_S1INROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - S1IN pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - S1IN pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PCNT0_S1INROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - S1IN port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - S1IN pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - S1IN port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - S1IN pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "S1IN port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pcnt0_s1inroute](index.html) module"] -pub struct PCNT0_S1INROUTE_SPEC; -impl crate::RegisterSpec for PCNT0_S1INROUTE_SPEC { +#[doc = "S1IN port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`pcnt0_s1inroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcnt0_s1inroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Pcnt0S1inrouteSpec; +impl crate::RegisterSpec for Pcnt0S1inrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [pcnt0_s1inroute::R](R) reader structure"] -impl crate::Readable for PCNT0_S1INROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [pcnt0_s1inroute::W](W) writer structure"] -impl crate::Writable for PCNT0_S1INROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`pcnt0_s1inroute::R`](R) reader structure"] +impl crate::Readable for Pcnt0S1inrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`pcnt0_s1inroute::W`](W) writer structure"] +impl crate::Writable for Pcnt0S1inrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PCNT0_S1INROUTE to value 0"] -impl crate::Resettable for PCNT0_S1INROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Pcnt0S1inrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/porta_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/porta_ctrl.rs index 4c02bc9..b2d7dd2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/porta_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/porta_ctrl.rs @@ -1,126 +1,85 @@ #[doc = "Register `PORTA_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTA_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SLEWRATE` reader - Slew Rate"] -pub type SLEWRATE_R = crate::FieldReader; +pub type SlewrateR = crate::FieldReader; #[doc = "Field `SLEWRATE` writer - Slew Rate"] -pub type SLEWRATE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PORTA_CTRL_SPEC, u8, u8, 3, O>; +pub type SlewrateW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `DINDIS` reader - Data In Disable"] -pub type DINDIS_R = crate::BitReader; +pub type DindisR = crate::BitReader; #[doc = "Field `DINDIS` writer - Data In Disable"] -pub type DINDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PORTA_CTRL_SPEC, bool, O>; +pub type DindisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SLEWRATEALT` reader - Slew Rate Alt"] -pub type SLEWRATEALT_R = crate::FieldReader; +pub type SlewratealtR = crate::FieldReader; #[doc = "Field `SLEWRATEALT` writer - Slew Rate Alt"] -pub type SLEWRATEALT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PORTA_CTRL_SPEC, u8, u8, 3, O>; +pub type SlewratealtW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `DINDISALT` reader - Data In Disable Alt"] -pub type DINDISALT_R = crate::BitReader; +pub type DindisaltR = crate::BitReader; #[doc = "Field `DINDISALT` writer - Data In Disable Alt"] -pub type DINDISALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, PORTA_CTRL_SPEC, bool, O>; +pub type DindisaltW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 4:6 - Slew Rate"] #[inline(always)] - pub fn slewrate(&self) -> SLEWRATE_R { - SLEWRATE_R::new(((self.bits >> 4) & 7) as u8) + pub fn slewrate(&self) -> SlewrateR { + SlewrateR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bit 12 - Data In Disable"] #[inline(always)] - pub fn dindis(&self) -> DINDIS_R { - DINDIS_R::new(((self.bits >> 12) & 1) != 0) + pub fn dindis(&self) -> DindisR { + DindisR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bits 20:22 - Slew Rate Alt"] #[inline(always)] - pub fn slewratealt(&self) -> SLEWRATEALT_R { - SLEWRATEALT_R::new(((self.bits >> 20) & 7) as u8) + pub fn slewratealt(&self) -> SlewratealtR { + SlewratealtR::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bit 28 - Data In Disable Alt"] #[inline(always)] - pub fn dindisalt(&self) -> DINDISALT_R { - DINDISALT_R::new(((self.bits >> 28) & 1) != 0) + pub fn dindisalt(&self) -> DindisaltR { + DindisaltR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bits 4:6 - Slew Rate"] #[inline(always)] #[must_use] - pub fn slewrate(&mut self) -> SLEWRATE_W<4> { - SLEWRATE_W::new(self) + pub fn slewrate(&mut self) -> SlewrateW { + SlewrateW::new(self, 4) } #[doc = "Bit 12 - Data In Disable"] #[inline(always)] #[must_use] - pub fn dindis(&mut self) -> DINDIS_W<12> { - DINDIS_W::new(self) + pub fn dindis(&mut self) -> DindisW { + DindisW::new(self, 12) } #[doc = "Bits 20:22 - Slew Rate Alt"] #[inline(always)] #[must_use] - pub fn slewratealt(&mut self) -> SLEWRATEALT_W<20> { - SLEWRATEALT_W::new(self) + pub fn slewratealt(&mut self) -> SlewratealtW { + SlewratealtW::new(self, 20) } #[doc = "Bit 28 - Data In Disable Alt"] #[inline(always)] #[must_use] - pub fn dindisalt(&mut self) -> DINDISALT_W<28> { - DINDISALT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dindisalt(&mut self) -> DindisaltW { + DindisaltW::new(self, 28) } } -#[doc = "Port control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [porta_ctrl](index.html) module"] -pub struct PORTA_CTRL_SPEC; -impl crate::RegisterSpec for PORTA_CTRL_SPEC { +#[doc = "Port control\n\nYou can [`read`](crate::Reg::read) this register and get [`porta_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`porta_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortaCtrlSpec; +impl crate::RegisterSpec for PortaCtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [porta_ctrl::R](R) reader structure"] -impl crate::Readable for PORTA_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [porta_ctrl::W](W) writer structure"] -impl crate::Writable for PORTA_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`porta_ctrl::R`](R) reader structure"] +impl crate::Readable for PortaCtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`porta_ctrl::W`](W) writer structure"] +impl crate::Writable for PortaCtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTA_CTRL to value 0x0040_0040"] -impl crate::Resettable for PORTA_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0040_0040; +impl crate::Resettable for PortaCtrlSpec { + const RESET_VALUE: u32 = 0x0040_0040; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/porta_din.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/porta_din.rs index 72c2c3e..c7fee01 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/porta_din.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/porta_din.rs @@ -1,37 +1,22 @@ #[doc = "Register `PORTA_DIN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DIN` reader - Data input"] -pub type DIN_R = crate::FieldReader; +pub type DinR = crate::FieldReader; impl R { #[doc = "Bits 0:10 - Data input"] #[inline(always)] - pub fn din(&self) -> DIN_R { - DIN_R::new((self.bits & 0x07ff) as u16) + pub fn din(&self) -> DinR { + DinR::new((self.bits & 0x07ff) as u16) } } -#[doc = "data in\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [porta_din](index.html) module"] -pub struct PORTA_DIN_SPEC; -impl crate::RegisterSpec for PORTA_DIN_SPEC { +#[doc = "data in\n\nYou can [`read`](crate::Reg::read) this register and get [`porta_din::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortaDinSpec; +impl crate::RegisterSpec for PortaDinSpec { type Ux = u32; } -#[doc = "`read()` method returns [porta_din::R](R) reader structure"] -impl crate::Readable for PORTA_DIN_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`porta_din::R`](R) reader structure"] +impl crate::Readable for PortaDinSpec {} #[doc = "`reset()` method sets PORTA_DIN to value 0"] -impl crate::Resettable for PORTA_DIN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortaDinSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/porta_dout.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/porta_dout.rs index 5f3785d..0ab09c9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/porta_dout.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/porta_dout.rs @@ -1,80 +1,40 @@ #[doc = "Register `PORTA_DOUT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTA_DOUT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DOUT` reader - Data output"] -pub type DOUT_R = crate::FieldReader; +pub type DoutR = crate::FieldReader; #[doc = "Field `DOUT` writer - Data output"] -pub type DOUT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PORTA_DOUT_SPEC, u16, u16, 11, O>; +pub type DoutW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; impl R { #[doc = "Bits 0:10 - Data output"] #[inline(always)] - pub fn dout(&self) -> DOUT_R { - DOUT_R::new((self.bits & 0x07ff) as u16) + pub fn dout(&self) -> DoutR { + DoutR::new((self.bits & 0x07ff) as u16) } } impl W { #[doc = "Bits 0:10 - Data output"] #[inline(always)] #[must_use] - pub fn dout(&mut self) -> DOUT_W<0> { - DOUT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dout(&mut self) -> DoutW { + DoutW::new(self, 0) } } -#[doc = "data out\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [porta_dout](index.html) module"] -pub struct PORTA_DOUT_SPEC; -impl crate::RegisterSpec for PORTA_DOUT_SPEC { +#[doc = "data out\n\nYou can [`read`](crate::Reg::read) this register and get [`porta_dout::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`porta_dout::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortaDoutSpec; +impl crate::RegisterSpec for PortaDoutSpec { type Ux = u32; } -#[doc = "`read()` method returns [porta_dout::R](R) reader structure"] -impl crate::Readable for PORTA_DOUT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [porta_dout::W](W) writer structure"] -impl crate::Writable for PORTA_DOUT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`porta_dout::R`](R) reader structure"] +impl crate::Readable for PortaDoutSpec {} +#[doc = "`write(|w| ..)` method takes [`porta_dout::W`](W) writer structure"] +impl crate::Writable for PortaDoutSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTA_DOUT to value 0"] -impl crate::Resettable for PORTA_DOUT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortaDoutSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/porta_modeh.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/porta_modeh.rs index b62971a..08b28a4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/porta_modeh.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/porta_modeh.rs @@ -1,803 +1,784 @@ #[doc = "Register `PORTA_MODEH` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTA_MODEH` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE0` reader - MODE n"] -pub type MODE0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE0_A { +pub enum Mode0 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE0_A) -> Self { + fn from(variant: Mode0) -> Self { variant as _ } } -impl MODE0_R { +impl crate::FieldSpec for Mode0 { + type Ux = u8; +} +impl crate::IsEnum for Mode0 {} +#[doc = "Field `MODE0` reader - MODE n"] +pub type Mode0R = crate::FieldReader; +impl Mode0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE0_A { + pub const fn variant(&self) -> Mode0 { match self.bits { - 0 => MODE0_A::DISABLED, - 1 => MODE0_A::INPUT, - 2 => MODE0_A::INPUTPULL, - 3 => MODE0_A::INPUTPULLFILTER, - 4 => MODE0_A::PUSHPULL, - 5 => MODE0_A::PUSHPULLALT, - 6 => MODE0_A::WIREDOR, - 7 => MODE0_A::WIREDORPULLDOWN, - 8 => MODE0_A::WIREDAND, - 9 => MODE0_A::WIREDANDFILTER, - 10 => MODE0_A::WIREDANDPULLUP, - 11 => MODE0_A::WIREDANDPULLUPFILTER, - 12 => MODE0_A::WIREDANDALT, - 13 => MODE0_A::WIREDANDALTFILTER, - 14 => MODE0_A::WIREDANDALTPULLUP, - 15 => MODE0_A::WIREDANDALTPULLUPFILTER, + 0 => Mode0::Disabled, + 1 => Mode0::Input, + 2 => Mode0::Inputpull, + 3 => Mode0::Inputpullfilter, + 4 => Mode0::Pushpull, + 5 => Mode0::Pushpullalt, + 6 => Mode0::Wiredor, + 7 => Mode0::Wiredorpulldown, + 8 => Mode0::Wiredand, + 9 => Mode0::Wiredandfilter, + 10 => Mode0::Wiredandpullup, + 11 => Mode0::Wiredandpullupfilter, + 12 => Mode0::Wiredandalt, + 13 => Mode0::Wiredandaltfilter, + 14 => Mode0::Wiredandaltpullup, + 15 => Mode0::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE0_A::DISABLED + *self == Mode0::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE0_A::INPUT + *self == Mode0::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE0_A::INPUTPULL + *self == Mode0::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE0_A::INPUTPULLFILTER + *self == Mode0::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE0_A::PUSHPULL + *self == Mode0::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE0_A::PUSHPULLALT + *self == Mode0::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE0_A::WIREDOR + *self == Mode0::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE0_A::WIREDORPULLDOWN + *self == Mode0::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE0_A::WIREDAND + *self == Mode0::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE0_A::WIREDANDFILTER + *self == Mode0::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE0_A::WIREDANDPULLUP + *self == Mode0::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE0_A::WIREDANDPULLUPFILTER + *self == Mode0::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE0_A::WIREDANDALT + *self == Mode0::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE0_A::WIREDANDALTFILTER + *self == Mode0::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE0_A::WIREDANDALTPULLUP + *self == Mode0::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE0_A::WIREDANDALTPULLUPFILTER + *self == Mode0::Wiredandaltpullupfilter } } #[doc = "Field `MODE0` writer - MODE n"] -pub type MODE0_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTA_MODEH_SPEC, u8, MODE0_A, 4, O>; -impl<'a, const O: u8> MODE0_W<'a, O> { +pub type Mode0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode0, crate::Safe>; +impl<'a, REG> Mode0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE0_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode0::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE0_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode0::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE0_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode0::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE0_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE0_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode0::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE0_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode0::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE0_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE0_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE0_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE1` reader - MODE n"] -pub type MODE1_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE1_A { +pub enum Mode1 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE1_A) -> Self { + fn from(variant: Mode1) -> Self { variant as _ } } -impl MODE1_R { +impl crate::FieldSpec for Mode1 { + type Ux = u8; +} +impl crate::IsEnum for Mode1 {} +#[doc = "Field `MODE1` reader - MODE n"] +pub type Mode1R = crate::FieldReader; +impl Mode1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE1_A { + pub const fn variant(&self) -> Mode1 { match self.bits { - 0 => MODE1_A::DISABLED, - 1 => MODE1_A::INPUT, - 2 => MODE1_A::INPUTPULL, - 3 => MODE1_A::INPUTPULLFILTER, - 4 => MODE1_A::PUSHPULL, - 5 => MODE1_A::PUSHPULLALT, - 6 => MODE1_A::WIREDOR, - 7 => MODE1_A::WIREDORPULLDOWN, - 8 => MODE1_A::WIREDAND, - 9 => MODE1_A::WIREDANDFILTER, - 10 => MODE1_A::WIREDANDPULLUP, - 11 => MODE1_A::WIREDANDPULLUPFILTER, - 12 => MODE1_A::WIREDANDALT, - 13 => MODE1_A::WIREDANDALTFILTER, - 14 => MODE1_A::WIREDANDALTPULLUP, - 15 => MODE1_A::WIREDANDALTPULLUPFILTER, + 0 => Mode1::Disabled, + 1 => Mode1::Input, + 2 => Mode1::Inputpull, + 3 => Mode1::Inputpullfilter, + 4 => Mode1::Pushpull, + 5 => Mode1::Pushpullalt, + 6 => Mode1::Wiredor, + 7 => Mode1::Wiredorpulldown, + 8 => Mode1::Wiredand, + 9 => Mode1::Wiredandfilter, + 10 => Mode1::Wiredandpullup, + 11 => Mode1::Wiredandpullupfilter, + 12 => Mode1::Wiredandalt, + 13 => Mode1::Wiredandaltfilter, + 14 => Mode1::Wiredandaltpullup, + 15 => Mode1::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE1_A::DISABLED + *self == Mode1::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE1_A::INPUT + *self == Mode1::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE1_A::INPUTPULL + *self == Mode1::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE1_A::INPUTPULLFILTER + *self == Mode1::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE1_A::PUSHPULL + *self == Mode1::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE1_A::PUSHPULLALT + *self == Mode1::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE1_A::WIREDOR + *self == Mode1::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE1_A::WIREDORPULLDOWN + *self == Mode1::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE1_A::WIREDAND + *self == Mode1::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE1_A::WIREDANDFILTER + *self == Mode1::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE1_A::WIREDANDPULLUP + *self == Mode1::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE1_A::WIREDANDPULLUPFILTER + *self == Mode1::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE1_A::WIREDANDALT + *self == Mode1::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE1_A::WIREDANDALTFILTER + *self == Mode1::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE1_A::WIREDANDALTPULLUP + *self == Mode1::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE1_A::WIREDANDALTPULLUPFILTER + *self == Mode1::Wiredandaltpullupfilter } } #[doc = "Field `MODE1` writer - MODE n"] -pub type MODE1_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTA_MODEH_SPEC, u8, MODE1_A, 4, O>; -impl<'a, const O: u8> MODE1_W<'a, O> { +pub type Mode1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode1, crate::Safe>; +impl<'a, REG> Mode1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE1_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode1::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE1_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode1::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE1_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode1::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE1_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE1_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode1::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE1_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode1::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE1_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE1_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE1_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE2` reader - MODE n"] -pub type MODE2_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE2_A { +pub enum Mode2 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE2_A) -> Self { + fn from(variant: Mode2) -> Self { variant as _ } } -impl MODE2_R { +impl crate::FieldSpec for Mode2 { + type Ux = u8; +} +impl crate::IsEnum for Mode2 {} +#[doc = "Field `MODE2` reader - MODE n"] +pub type Mode2R = crate::FieldReader; +impl Mode2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE2_A { + pub const fn variant(&self) -> Mode2 { match self.bits { - 0 => MODE2_A::DISABLED, - 1 => MODE2_A::INPUT, - 2 => MODE2_A::INPUTPULL, - 3 => MODE2_A::INPUTPULLFILTER, - 4 => MODE2_A::PUSHPULL, - 5 => MODE2_A::PUSHPULLALT, - 6 => MODE2_A::WIREDOR, - 7 => MODE2_A::WIREDORPULLDOWN, - 8 => MODE2_A::WIREDAND, - 9 => MODE2_A::WIREDANDFILTER, - 10 => MODE2_A::WIREDANDPULLUP, - 11 => MODE2_A::WIREDANDPULLUPFILTER, - 12 => MODE2_A::WIREDANDALT, - 13 => MODE2_A::WIREDANDALTFILTER, - 14 => MODE2_A::WIREDANDALTPULLUP, - 15 => MODE2_A::WIREDANDALTPULLUPFILTER, + 0 => Mode2::Disabled, + 1 => Mode2::Input, + 2 => Mode2::Inputpull, + 3 => Mode2::Inputpullfilter, + 4 => Mode2::Pushpull, + 5 => Mode2::Pushpullalt, + 6 => Mode2::Wiredor, + 7 => Mode2::Wiredorpulldown, + 8 => Mode2::Wiredand, + 9 => Mode2::Wiredandfilter, + 10 => Mode2::Wiredandpullup, + 11 => Mode2::Wiredandpullupfilter, + 12 => Mode2::Wiredandalt, + 13 => Mode2::Wiredandaltfilter, + 14 => Mode2::Wiredandaltpullup, + 15 => Mode2::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE2_A::DISABLED + *self == Mode2::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE2_A::INPUT + *self == Mode2::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE2_A::INPUTPULL + *self == Mode2::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE2_A::INPUTPULLFILTER + *self == Mode2::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE2_A::PUSHPULL + *self == Mode2::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE2_A::PUSHPULLALT + *self == Mode2::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE2_A::WIREDOR + *self == Mode2::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE2_A::WIREDORPULLDOWN + *self == Mode2::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE2_A::WIREDAND + *self == Mode2::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE2_A::WIREDANDFILTER + *self == Mode2::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE2_A::WIREDANDPULLUP + *self == Mode2::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE2_A::WIREDANDPULLUPFILTER + *self == Mode2::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE2_A::WIREDANDALT + *self == Mode2::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE2_A::WIREDANDALTFILTER + *self == Mode2::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE2_A::WIREDANDALTPULLUP + *self == Mode2::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE2_A::WIREDANDALTPULLUPFILTER + *self == Mode2::Wiredandaltpullupfilter } } #[doc = "Field `MODE2` writer - MODE n"] -pub type MODE2_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTA_MODEH_SPEC, u8, MODE2_A, 4, O>; -impl<'a, const O: u8> MODE2_W<'a, O> { +pub type Mode2W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode2, crate::Safe>; +impl<'a, REG> Mode2W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE2_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode2::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE2_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode2::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE2_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode2::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE2_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE2_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode2::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE2_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode2::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE2_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE2_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE2_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltpullupfilter) } } impl R { #[doc = "Bits 0:3 - MODE n"] #[inline(always)] - pub fn mode0(&self) -> MODE0_R { - MODE0_R::new((self.bits & 0x0f) as u8) + pub fn mode0(&self) -> Mode0R { + Mode0R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - MODE n"] #[inline(always)] - pub fn mode1(&self) -> MODE1_R { - MODE1_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn mode1(&self) -> Mode1R { + Mode1R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - MODE n"] #[inline(always)] - pub fn mode2(&self) -> MODE2_R { - MODE2_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn mode2(&self) -> Mode2R { + Mode2R::new(((self.bits >> 8) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - MODE n"] #[inline(always)] #[must_use] - pub fn mode0(&mut self) -> MODE0_W<0> { - MODE0_W::new(self) + pub fn mode0(&mut self) -> Mode0W { + Mode0W::new(self, 0) } #[doc = "Bits 4:7 - MODE n"] #[inline(always)] #[must_use] - pub fn mode1(&mut self) -> MODE1_W<4> { - MODE1_W::new(self) + pub fn mode1(&mut self) -> Mode1W { + Mode1W::new(self, 4) } #[doc = "Bits 8:11 - MODE n"] #[inline(always)] #[must_use] - pub fn mode2(&mut self) -> MODE2_W<8> { - MODE2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn mode2(&mut self) -> Mode2W { + Mode2W::new(self, 8) } } -#[doc = "mode high\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [porta_modeh](index.html) module"] -pub struct PORTA_MODEH_SPEC; -impl crate::RegisterSpec for PORTA_MODEH_SPEC { +#[doc = "mode high\n\nYou can [`read`](crate::Reg::read) this register and get [`porta_modeh::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`porta_modeh::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortaModehSpec; +impl crate::RegisterSpec for PortaModehSpec { type Ux = u32; } -#[doc = "`read()` method returns [porta_modeh::R](R) reader structure"] -impl crate::Readable for PORTA_MODEH_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [porta_modeh::W](W) writer structure"] -impl crate::Writable for PORTA_MODEH_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`porta_modeh::R`](R) reader structure"] +impl crate::Readable for PortaModehSpec {} +#[doc = "`write(|w| ..)` method takes [`porta_modeh::W`](W) writer structure"] +impl crate::Writable for PortaModehSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTA_MODEH to value 0"] -impl crate::Resettable for PORTA_MODEH_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortaModehSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/porta_model.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/porta_model.rs index fb4c862..3fa48ca 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/porta_model.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/porta_model.rs @@ -1,2033 +1,2049 @@ #[doc = "Register `PORTA_MODEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTA_MODEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE0` reader - MODE n"] -pub type MODE0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE0_A { +pub enum Mode0 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE0_A) -> Self { + fn from(variant: Mode0) -> Self { variant as _ } } -impl MODE0_R { +impl crate::FieldSpec for Mode0 { + type Ux = u8; +} +impl crate::IsEnum for Mode0 {} +#[doc = "Field `MODE0` reader - MODE n"] +pub type Mode0R = crate::FieldReader; +impl Mode0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE0_A { + pub const fn variant(&self) -> Mode0 { match self.bits { - 0 => MODE0_A::DISABLED, - 1 => MODE0_A::INPUT, - 2 => MODE0_A::INPUTPULL, - 3 => MODE0_A::INPUTPULLFILTER, - 4 => MODE0_A::PUSHPULL, - 5 => MODE0_A::PUSHPULLALT, - 6 => MODE0_A::WIREDOR, - 7 => MODE0_A::WIREDORPULLDOWN, - 8 => MODE0_A::WIREDAND, - 9 => MODE0_A::WIREDANDFILTER, - 10 => MODE0_A::WIREDANDPULLUP, - 11 => MODE0_A::WIREDANDPULLUPFILTER, - 12 => MODE0_A::WIREDANDALT, - 13 => MODE0_A::WIREDANDALTFILTER, - 14 => MODE0_A::WIREDANDALTPULLUP, - 15 => MODE0_A::WIREDANDALTPULLUPFILTER, + 0 => Mode0::Disabled, + 1 => Mode0::Input, + 2 => Mode0::Inputpull, + 3 => Mode0::Inputpullfilter, + 4 => Mode0::Pushpull, + 5 => Mode0::Pushpullalt, + 6 => Mode0::Wiredor, + 7 => Mode0::Wiredorpulldown, + 8 => Mode0::Wiredand, + 9 => Mode0::Wiredandfilter, + 10 => Mode0::Wiredandpullup, + 11 => Mode0::Wiredandpullupfilter, + 12 => Mode0::Wiredandalt, + 13 => Mode0::Wiredandaltfilter, + 14 => Mode0::Wiredandaltpullup, + 15 => Mode0::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE0_A::DISABLED + *self == Mode0::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE0_A::INPUT + *self == Mode0::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE0_A::INPUTPULL + *self == Mode0::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE0_A::INPUTPULLFILTER + *self == Mode0::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE0_A::PUSHPULL + *self == Mode0::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE0_A::PUSHPULLALT + *self == Mode0::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE0_A::WIREDOR + *self == Mode0::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE0_A::WIREDORPULLDOWN + *self == Mode0::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE0_A::WIREDAND + *self == Mode0::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE0_A::WIREDANDFILTER + *self == Mode0::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE0_A::WIREDANDPULLUP + *self == Mode0::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE0_A::WIREDANDPULLUPFILTER + *self == Mode0::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE0_A::WIREDANDALT + *self == Mode0::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE0_A::WIREDANDALTFILTER + *self == Mode0::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE0_A::WIREDANDALTPULLUP + *self == Mode0::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE0_A::WIREDANDALTPULLUPFILTER + *self == Mode0::Wiredandaltpullupfilter } } #[doc = "Field `MODE0` writer - MODE n"] -pub type MODE0_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTA_MODEL_SPEC, u8, MODE0_A, 4, O>; -impl<'a, const O: u8> MODE0_W<'a, O> { +pub type Mode0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode0, crate::Safe>; +impl<'a, REG> Mode0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE0_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode0::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE0_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode0::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE0_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode0::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE0_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE0_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode0::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE0_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode0::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE0_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE0_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE0_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE1` reader - MODE n"] -pub type MODE1_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE1_A { +pub enum Mode1 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE1_A) -> Self { + fn from(variant: Mode1) -> Self { variant as _ } } -impl MODE1_R { +impl crate::FieldSpec for Mode1 { + type Ux = u8; +} +impl crate::IsEnum for Mode1 {} +#[doc = "Field `MODE1` reader - MODE n"] +pub type Mode1R = crate::FieldReader; +impl Mode1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE1_A { + pub const fn variant(&self) -> Mode1 { match self.bits { - 0 => MODE1_A::DISABLED, - 1 => MODE1_A::INPUT, - 2 => MODE1_A::INPUTPULL, - 3 => MODE1_A::INPUTPULLFILTER, - 4 => MODE1_A::PUSHPULL, - 5 => MODE1_A::PUSHPULLALT, - 6 => MODE1_A::WIREDOR, - 7 => MODE1_A::WIREDORPULLDOWN, - 8 => MODE1_A::WIREDAND, - 9 => MODE1_A::WIREDANDFILTER, - 10 => MODE1_A::WIREDANDPULLUP, - 11 => MODE1_A::WIREDANDPULLUPFILTER, - 12 => MODE1_A::WIREDANDALT, - 13 => MODE1_A::WIREDANDALTFILTER, - 14 => MODE1_A::WIREDANDALTPULLUP, - 15 => MODE1_A::WIREDANDALTPULLUPFILTER, + 0 => Mode1::Disabled, + 1 => Mode1::Input, + 2 => Mode1::Inputpull, + 3 => Mode1::Inputpullfilter, + 4 => Mode1::Pushpull, + 5 => Mode1::Pushpullalt, + 6 => Mode1::Wiredor, + 7 => Mode1::Wiredorpulldown, + 8 => Mode1::Wiredand, + 9 => Mode1::Wiredandfilter, + 10 => Mode1::Wiredandpullup, + 11 => Mode1::Wiredandpullupfilter, + 12 => Mode1::Wiredandalt, + 13 => Mode1::Wiredandaltfilter, + 14 => Mode1::Wiredandaltpullup, + 15 => Mode1::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE1_A::DISABLED + *self == Mode1::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE1_A::INPUT + *self == Mode1::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE1_A::INPUTPULL + *self == Mode1::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE1_A::INPUTPULLFILTER + *self == Mode1::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE1_A::PUSHPULL + *self == Mode1::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE1_A::PUSHPULLALT + *self == Mode1::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE1_A::WIREDOR + *self == Mode1::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE1_A::WIREDORPULLDOWN + *self == Mode1::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE1_A::WIREDAND + *self == Mode1::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE1_A::WIREDANDFILTER + *self == Mode1::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE1_A::WIREDANDPULLUP + *self == Mode1::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE1_A::WIREDANDPULLUPFILTER + *self == Mode1::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE1_A::WIREDANDALT + *self == Mode1::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE1_A::WIREDANDALTFILTER + *self == Mode1::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE1_A::WIREDANDALTPULLUP + *self == Mode1::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE1_A::WIREDANDALTPULLUPFILTER + *self == Mode1::Wiredandaltpullupfilter } } #[doc = "Field `MODE1` writer - MODE n"] -pub type MODE1_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTA_MODEL_SPEC, u8, MODE1_A, 4, O>; -impl<'a, const O: u8> MODE1_W<'a, O> { +pub type Mode1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode1, crate::Safe>; +impl<'a, REG> Mode1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE1_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode1::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE1_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode1::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE1_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode1::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE1_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE1_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode1::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE1_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode1::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE1_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE1_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE1_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE2` reader - MODE n"] -pub type MODE2_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE2_A { +pub enum Mode2 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE2_A) -> Self { + fn from(variant: Mode2) -> Self { variant as _ } } -impl MODE2_R { +impl crate::FieldSpec for Mode2 { + type Ux = u8; +} +impl crate::IsEnum for Mode2 {} +#[doc = "Field `MODE2` reader - MODE n"] +pub type Mode2R = crate::FieldReader; +impl Mode2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE2_A { + pub const fn variant(&self) -> Mode2 { match self.bits { - 0 => MODE2_A::DISABLED, - 1 => MODE2_A::INPUT, - 2 => MODE2_A::INPUTPULL, - 3 => MODE2_A::INPUTPULLFILTER, - 4 => MODE2_A::PUSHPULL, - 5 => MODE2_A::PUSHPULLALT, - 6 => MODE2_A::WIREDOR, - 7 => MODE2_A::WIREDORPULLDOWN, - 8 => MODE2_A::WIREDAND, - 9 => MODE2_A::WIREDANDFILTER, - 10 => MODE2_A::WIREDANDPULLUP, - 11 => MODE2_A::WIREDANDPULLUPFILTER, - 12 => MODE2_A::WIREDANDALT, - 13 => MODE2_A::WIREDANDALTFILTER, - 14 => MODE2_A::WIREDANDALTPULLUP, - 15 => MODE2_A::WIREDANDALTPULLUPFILTER, + 0 => Mode2::Disabled, + 1 => Mode2::Input, + 2 => Mode2::Inputpull, + 3 => Mode2::Inputpullfilter, + 4 => Mode2::Pushpull, + 5 => Mode2::Pushpullalt, + 6 => Mode2::Wiredor, + 7 => Mode2::Wiredorpulldown, + 8 => Mode2::Wiredand, + 9 => Mode2::Wiredandfilter, + 10 => Mode2::Wiredandpullup, + 11 => Mode2::Wiredandpullupfilter, + 12 => Mode2::Wiredandalt, + 13 => Mode2::Wiredandaltfilter, + 14 => Mode2::Wiredandaltpullup, + 15 => Mode2::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE2_A::DISABLED + *self == Mode2::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE2_A::INPUT + *self == Mode2::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE2_A::INPUTPULL + *self == Mode2::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE2_A::INPUTPULLFILTER + *self == Mode2::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE2_A::PUSHPULL + *self == Mode2::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE2_A::PUSHPULLALT + *self == Mode2::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE2_A::WIREDOR + *self == Mode2::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE2_A::WIREDORPULLDOWN + *self == Mode2::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE2_A::WIREDAND + *self == Mode2::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE2_A::WIREDANDFILTER + *self == Mode2::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE2_A::WIREDANDPULLUP + *self == Mode2::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE2_A::WIREDANDPULLUPFILTER + *self == Mode2::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE2_A::WIREDANDALT + *self == Mode2::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE2_A::WIREDANDALTFILTER + *self == Mode2::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE2_A::WIREDANDALTPULLUP + *self == Mode2::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE2_A::WIREDANDALTPULLUPFILTER + *self == Mode2::Wiredandaltpullupfilter } } #[doc = "Field `MODE2` writer - MODE n"] -pub type MODE2_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTA_MODEL_SPEC, u8, MODE2_A, 4, O>; -impl<'a, const O: u8> MODE2_W<'a, O> { +pub type Mode2W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode2, crate::Safe>; +impl<'a, REG> Mode2W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE2_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode2::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE2_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode2::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE2_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode2::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE2_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE2_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode2::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE2_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode2::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE2_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE2_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE2_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE3` reader - MODE n"] -pub type MODE3_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE3_A { +pub enum Mode3 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE3_A) -> Self { + fn from(variant: Mode3) -> Self { variant as _ } } -impl MODE3_R { +impl crate::FieldSpec for Mode3 { + type Ux = u8; +} +impl crate::IsEnum for Mode3 {} +#[doc = "Field `MODE3` reader - MODE n"] +pub type Mode3R = crate::FieldReader; +impl Mode3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE3_A { + pub const fn variant(&self) -> Mode3 { match self.bits { - 0 => MODE3_A::DISABLED, - 1 => MODE3_A::INPUT, - 2 => MODE3_A::INPUTPULL, - 3 => MODE3_A::INPUTPULLFILTER, - 4 => MODE3_A::PUSHPULL, - 5 => MODE3_A::PUSHPULLALT, - 6 => MODE3_A::WIREDOR, - 7 => MODE3_A::WIREDORPULLDOWN, - 8 => MODE3_A::WIREDAND, - 9 => MODE3_A::WIREDANDFILTER, - 10 => MODE3_A::WIREDANDPULLUP, - 11 => MODE3_A::WIREDANDPULLUPFILTER, - 12 => MODE3_A::WIREDANDALT, - 13 => MODE3_A::WIREDANDALTFILTER, - 14 => MODE3_A::WIREDANDALTPULLUP, - 15 => MODE3_A::WIREDANDALTPULLUPFILTER, + 0 => Mode3::Disabled, + 1 => Mode3::Input, + 2 => Mode3::Inputpull, + 3 => Mode3::Inputpullfilter, + 4 => Mode3::Pushpull, + 5 => Mode3::Pushpullalt, + 6 => Mode3::Wiredor, + 7 => Mode3::Wiredorpulldown, + 8 => Mode3::Wiredand, + 9 => Mode3::Wiredandfilter, + 10 => Mode3::Wiredandpullup, + 11 => Mode3::Wiredandpullupfilter, + 12 => Mode3::Wiredandalt, + 13 => Mode3::Wiredandaltfilter, + 14 => Mode3::Wiredandaltpullup, + 15 => Mode3::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE3_A::DISABLED + *self == Mode3::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE3_A::INPUT + *self == Mode3::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE3_A::INPUTPULL + *self == Mode3::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE3_A::INPUTPULLFILTER + *self == Mode3::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE3_A::PUSHPULL + *self == Mode3::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE3_A::PUSHPULLALT + *self == Mode3::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE3_A::WIREDOR + *self == Mode3::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE3_A::WIREDORPULLDOWN + *self == Mode3::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE3_A::WIREDAND + *self == Mode3::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE3_A::WIREDANDFILTER + *self == Mode3::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE3_A::WIREDANDPULLUP + *self == Mode3::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE3_A::WIREDANDPULLUPFILTER + *self == Mode3::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE3_A::WIREDANDALT + *self == Mode3::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE3_A::WIREDANDALTFILTER + *self == Mode3::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE3_A::WIREDANDALTPULLUP + *self == Mode3::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE3_A::WIREDANDALTPULLUPFILTER + *self == Mode3::Wiredandaltpullupfilter } } #[doc = "Field `MODE3` writer - MODE n"] -pub type MODE3_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTA_MODEL_SPEC, u8, MODE3_A, 4, O>; -impl<'a, const O: u8> MODE3_W<'a, O> { +pub type Mode3W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode3, crate::Safe>; +impl<'a, REG> Mode3W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE3_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode3::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE3_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode3::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE3_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode3::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE3_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE3_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode3::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE3_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode3::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE3_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE3_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE3_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE4` reader - MODE n"] -pub type MODE4_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE4_A { +pub enum Mode4 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE4_A) -> Self { + fn from(variant: Mode4) -> Self { variant as _ } } -impl MODE4_R { +impl crate::FieldSpec for Mode4 { + type Ux = u8; +} +impl crate::IsEnum for Mode4 {} +#[doc = "Field `MODE4` reader - MODE n"] +pub type Mode4R = crate::FieldReader; +impl Mode4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE4_A { + pub const fn variant(&self) -> Mode4 { match self.bits { - 0 => MODE4_A::DISABLED, - 1 => MODE4_A::INPUT, - 2 => MODE4_A::INPUTPULL, - 3 => MODE4_A::INPUTPULLFILTER, - 4 => MODE4_A::PUSHPULL, - 5 => MODE4_A::PUSHPULLALT, - 6 => MODE4_A::WIREDOR, - 7 => MODE4_A::WIREDORPULLDOWN, - 8 => MODE4_A::WIREDAND, - 9 => MODE4_A::WIREDANDFILTER, - 10 => MODE4_A::WIREDANDPULLUP, - 11 => MODE4_A::WIREDANDPULLUPFILTER, - 12 => MODE4_A::WIREDANDALT, - 13 => MODE4_A::WIREDANDALTFILTER, - 14 => MODE4_A::WIREDANDALTPULLUP, - 15 => MODE4_A::WIREDANDALTPULLUPFILTER, + 0 => Mode4::Disabled, + 1 => Mode4::Input, + 2 => Mode4::Inputpull, + 3 => Mode4::Inputpullfilter, + 4 => Mode4::Pushpull, + 5 => Mode4::Pushpullalt, + 6 => Mode4::Wiredor, + 7 => Mode4::Wiredorpulldown, + 8 => Mode4::Wiredand, + 9 => Mode4::Wiredandfilter, + 10 => Mode4::Wiredandpullup, + 11 => Mode4::Wiredandpullupfilter, + 12 => Mode4::Wiredandalt, + 13 => Mode4::Wiredandaltfilter, + 14 => Mode4::Wiredandaltpullup, + 15 => Mode4::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE4_A::DISABLED + *self == Mode4::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE4_A::INPUT + *self == Mode4::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE4_A::INPUTPULL + *self == Mode4::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE4_A::INPUTPULLFILTER + *self == Mode4::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE4_A::PUSHPULL + *self == Mode4::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE4_A::PUSHPULLALT + *self == Mode4::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE4_A::WIREDOR + *self == Mode4::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE4_A::WIREDORPULLDOWN + *self == Mode4::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE4_A::WIREDAND + *self == Mode4::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE4_A::WIREDANDFILTER + *self == Mode4::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE4_A::WIREDANDPULLUP + *self == Mode4::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE4_A::WIREDANDPULLUPFILTER + *self == Mode4::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE4_A::WIREDANDALT + *self == Mode4::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE4_A::WIREDANDALTFILTER + *self == Mode4::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE4_A::WIREDANDALTPULLUP + *self == Mode4::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE4_A::WIREDANDALTPULLUPFILTER + *self == Mode4::Wiredandaltpullupfilter } } #[doc = "Field `MODE4` writer - MODE n"] -pub type MODE4_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTA_MODEL_SPEC, u8, MODE4_A, 4, O>; -impl<'a, const O: u8> MODE4_W<'a, O> { +pub type Mode4W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode4, crate::Safe>; +impl<'a, REG> Mode4W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE4_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode4::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE4_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode4::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE4_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode4::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE4_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE4_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode4::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE4_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode4::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE4_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE4_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE4_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE5` reader - MODE n"] -pub type MODE5_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE5_A { +pub enum Mode5 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE5_A) -> Self { + fn from(variant: Mode5) -> Self { variant as _ } } -impl MODE5_R { +impl crate::FieldSpec for Mode5 { + type Ux = u8; +} +impl crate::IsEnum for Mode5 {} +#[doc = "Field `MODE5` reader - MODE n"] +pub type Mode5R = crate::FieldReader; +impl Mode5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE5_A { + pub const fn variant(&self) -> Mode5 { match self.bits { - 0 => MODE5_A::DISABLED, - 1 => MODE5_A::INPUT, - 2 => MODE5_A::INPUTPULL, - 3 => MODE5_A::INPUTPULLFILTER, - 4 => MODE5_A::PUSHPULL, - 5 => MODE5_A::PUSHPULLALT, - 6 => MODE5_A::WIREDOR, - 7 => MODE5_A::WIREDORPULLDOWN, - 8 => MODE5_A::WIREDAND, - 9 => MODE5_A::WIREDANDFILTER, - 10 => MODE5_A::WIREDANDPULLUP, - 11 => MODE5_A::WIREDANDPULLUPFILTER, - 12 => MODE5_A::WIREDANDALT, - 13 => MODE5_A::WIREDANDALTFILTER, - 14 => MODE5_A::WIREDANDALTPULLUP, - 15 => MODE5_A::WIREDANDALTPULLUPFILTER, + 0 => Mode5::Disabled, + 1 => Mode5::Input, + 2 => Mode5::Inputpull, + 3 => Mode5::Inputpullfilter, + 4 => Mode5::Pushpull, + 5 => Mode5::Pushpullalt, + 6 => Mode5::Wiredor, + 7 => Mode5::Wiredorpulldown, + 8 => Mode5::Wiredand, + 9 => Mode5::Wiredandfilter, + 10 => Mode5::Wiredandpullup, + 11 => Mode5::Wiredandpullupfilter, + 12 => Mode5::Wiredandalt, + 13 => Mode5::Wiredandaltfilter, + 14 => Mode5::Wiredandaltpullup, + 15 => Mode5::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE5_A::DISABLED + *self == Mode5::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE5_A::INPUT + *self == Mode5::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE5_A::INPUTPULL + *self == Mode5::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE5_A::INPUTPULLFILTER + *self == Mode5::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE5_A::PUSHPULL + *self == Mode5::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE5_A::PUSHPULLALT + *self == Mode5::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE5_A::WIREDOR + *self == Mode5::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE5_A::WIREDORPULLDOWN + *self == Mode5::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE5_A::WIREDAND + *self == Mode5::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE5_A::WIREDANDFILTER + *self == Mode5::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE5_A::WIREDANDPULLUP + *self == Mode5::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE5_A::WIREDANDPULLUPFILTER + *self == Mode5::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE5_A::WIREDANDALT + *self == Mode5::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE5_A::WIREDANDALTFILTER + *self == Mode5::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE5_A::WIREDANDALTPULLUP + *self == Mode5::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE5_A::WIREDANDALTPULLUPFILTER + *self == Mode5::Wiredandaltpullupfilter } } #[doc = "Field `MODE5` writer - MODE n"] -pub type MODE5_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTA_MODEL_SPEC, u8, MODE5_A, 4, O>; -impl<'a, const O: u8> MODE5_W<'a, O> { +pub type Mode5W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode5, crate::Safe>; +impl<'a, REG> Mode5W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE5_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode5::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE5_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode5::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE5_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode5::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE5_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE5_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode5::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE5_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode5::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE5_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE5_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE5_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE6` reader - MODE n"] -pub type MODE6_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE6_A { +pub enum Mode6 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE6_A) -> Self { + fn from(variant: Mode6) -> Self { variant as _ } } -impl MODE6_R { +impl crate::FieldSpec for Mode6 { + type Ux = u8; +} +impl crate::IsEnum for Mode6 {} +#[doc = "Field `MODE6` reader - MODE n"] +pub type Mode6R = crate::FieldReader; +impl Mode6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE6_A { + pub const fn variant(&self) -> Mode6 { match self.bits { - 0 => MODE6_A::DISABLED, - 1 => MODE6_A::INPUT, - 2 => MODE6_A::INPUTPULL, - 3 => MODE6_A::INPUTPULLFILTER, - 4 => MODE6_A::PUSHPULL, - 5 => MODE6_A::PUSHPULLALT, - 6 => MODE6_A::WIREDOR, - 7 => MODE6_A::WIREDORPULLDOWN, - 8 => MODE6_A::WIREDAND, - 9 => MODE6_A::WIREDANDFILTER, - 10 => MODE6_A::WIREDANDPULLUP, - 11 => MODE6_A::WIREDANDPULLUPFILTER, - 12 => MODE6_A::WIREDANDALT, - 13 => MODE6_A::WIREDANDALTFILTER, - 14 => MODE6_A::WIREDANDALTPULLUP, - 15 => MODE6_A::WIREDANDALTPULLUPFILTER, + 0 => Mode6::Disabled, + 1 => Mode6::Input, + 2 => Mode6::Inputpull, + 3 => Mode6::Inputpullfilter, + 4 => Mode6::Pushpull, + 5 => Mode6::Pushpullalt, + 6 => Mode6::Wiredor, + 7 => Mode6::Wiredorpulldown, + 8 => Mode6::Wiredand, + 9 => Mode6::Wiredandfilter, + 10 => Mode6::Wiredandpullup, + 11 => Mode6::Wiredandpullupfilter, + 12 => Mode6::Wiredandalt, + 13 => Mode6::Wiredandaltfilter, + 14 => Mode6::Wiredandaltpullup, + 15 => Mode6::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE6_A::DISABLED + *self == Mode6::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE6_A::INPUT + *self == Mode6::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE6_A::INPUTPULL + *self == Mode6::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE6_A::INPUTPULLFILTER + *self == Mode6::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE6_A::PUSHPULL + *self == Mode6::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE6_A::PUSHPULLALT + *self == Mode6::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE6_A::WIREDOR + *self == Mode6::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE6_A::WIREDORPULLDOWN + *self == Mode6::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE6_A::WIREDAND + *self == Mode6::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE6_A::WIREDANDFILTER + *self == Mode6::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE6_A::WIREDANDPULLUP + *self == Mode6::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE6_A::WIREDANDPULLUPFILTER + *self == Mode6::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE6_A::WIREDANDALT + *self == Mode6::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE6_A::WIREDANDALTFILTER + *self == Mode6::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE6_A::WIREDANDALTPULLUP + *self == Mode6::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE6_A::WIREDANDALTPULLUPFILTER + *self == Mode6::Wiredandaltpullupfilter } } #[doc = "Field `MODE6` writer - MODE n"] -pub type MODE6_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTA_MODEL_SPEC, u8, MODE6_A, 4, O>; -impl<'a, const O: u8> MODE6_W<'a, O> { +pub type Mode6W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode6, crate::Safe>; +impl<'a, REG> Mode6W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE6_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode6::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE6_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode6::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE6_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode6::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE6_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE6_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode6::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE6_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode6::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE6_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE6_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE6_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE7` reader - MODE n"] -pub type MODE7_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE7_A { +pub enum Mode7 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE7_A) -> Self { + fn from(variant: Mode7) -> Self { variant as _ } } -impl MODE7_R { +impl crate::FieldSpec for Mode7 { + type Ux = u8; +} +impl crate::IsEnum for Mode7 {} +#[doc = "Field `MODE7` reader - MODE n"] +pub type Mode7R = crate::FieldReader; +impl Mode7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE7_A { + pub const fn variant(&self) -> Mode7 { match self.bits { - 0 => MODE7_A::DISABLED, - 1 => MODE7_A::INPUT, - 2 => MODE7_A::INPUTPULL, - 3 => MODE7_A::INPUTPULLFILTER, - 4 => MODE7_A::PUSHPULL, - 5 => MODE7_A::PUSHPULLALT, - 6 => MODE7_A::WIREDOR, - 7 => MODE7_A::WIREDORPULLDOWN, - 8 => MODE7_A::WIREDAND, - 9 => MODE7_A::WIREDANDFILTER, - 10 => MODE7_A::WIREDANDPULLUP, - 11 => MODE7_A::WIREDANDPULLUPFILTER, - 12 => MODE7_A::WIREDANDALT, - 13 => MODE7_A::WIREDANDALTFILTER, - 14 => MODE7_A::WIREDANDALTPULLUP, - 15 => MODE7_A::WIREDANDALTPULLUPFILTER, + 0 => Mode7::Disabled, + 1 => Mode7::Input, + 2 => Mode7::Inputpull, + 3 => Mode7::Inputpullfilter, + 4 => Mode7::Pushpull, + 5 => Mode7::Pushpullalt, + 6 => Mode7::Wiredor, + 7 => Mode7::Wiredorpulldown, + 8 => Mode7::Wiredand, + 9 => Mode7::Wiredandfilter, + 10 => Mode7::Wiredandpullup, + 11 => Mode7::Wiredandpullupfilter, + 12 => Mode7::Wiredandalt, + 13 => Mode7::Wiredandaltfilter, + 14 => Mode7::Wiredandaltpullup, + 15 => Mode7::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE7_A::DISABLED + *self == Mode7::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE7_A::INPUT + *self == Mode7::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE7_A::INPUTPULL + *self == Mode7::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE7_A::INPUTPULLFILTER + *self == Mode7::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE7_A::PUSHPULL + *self == Mode7::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE7_A::PUSHPULLALT + *self == Mode7::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE7_A::WIREDOR + *self == Mode7::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE7_A::WIREDORPULLDOWN + *self == Mode7::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE7_A::WIREDAND + *self == Mode7::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE7_A::WIREDANDFILTER + *self == Mode7::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE7_A::WIREDANDPULLUP + *self == Mode7::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE7_A::WIREDANDPULLUPFILTER + *self == Mode7::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE7_A::WIREDANDALT + *self == Mode7::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE7_A::WIREDANDALTFILTER + *self == Mode7::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE7_A::WIREDANDALTPULLUP + *self == Mode7::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE7_A::WIREDANDALTPULLUPFILTER + *self == Mode7::Wiredandaltpullupfilter } } #[doc = "Field `MODE7` writer - MODE n"] -pub type MODE7_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTA_MODEL_SPEC, u8, MODE7_A, 4, O>; -impl<'a, const O: u8> MODE7_W<'a, O> { +pub type Mode7W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode7, crate::Safe>; +impl<'a, REG> Mode7W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE7_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode7::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE7_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode7::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE7_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode7::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE7_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode7::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE7_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode7::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE7_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode7::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE7_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE7_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE7_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandaltpullupfilter) } } impl R { #[doc = "Bits 0:3 - MODE n"] #[inline(always)] - pub fn mode0(&self) -> MODE0_R { - MODE0_R::new((self.bits & 0x0f) as u8) + pub fn mode0(&self) -> Mode0R { + Mode0R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - MODE n"] #[inline(always)] - pub fn mode1(&self) -> MODE1_R { - MODE1_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn mode1(&self) -> Mode1R { + Mode1R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - MODE n"] #[inline(always)] - pub fn mode2(&self) -> MODE2_R { - MODE2_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn mode2(&self) -> Mode2R { + Mode2R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - MODE n"] #[inline(always)] - pub fn mode3(&self) -> MODE3_R { - MODE3_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn mode3(&self) -> Mode3R { + Mode3R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:19 - MODE n"] #[inline(always)] - pub fn mode4(&self) -> MODE4_R { - MODE4_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn mode4(&self) -> Mode4R { + Mode4R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:23 - MODE n"] #[inline(always)] - pub fn mode5(&self) -> MODE5_R { - MODE5_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn mode5(&self) -> Mode5R { + Mode5R::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:27 - MODE n"] #[inline(always)] - pub fn mode6(&self) -> MODE6_R { - MODE6_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn mode6(&self) -> Mode6R { + Mode6R::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 28:31 - MODE n"] #[inline(always)] - pub fn mode7(&self) -> MODE7_R { - MODE7_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn mode7(&self) -> Mode7R { + Mode7R::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - MODE n"] #[inline(always)] #[must_use] - pub fn mode0(&mut self) -> MODE0_W<0> { - MODE0_W::new(self) + pub fn mode0(&mut self) -> Mode0W { + Mode0W::new(self, 0) } #[doc = "Bits 4:7 - MODE n"] #[inline(always)] #[must_use] - pub fn mode1(&mut self) -> MODE1_W<4> { - MODE1_W::new(self) + pub fn mode1(&mut self) -> Mode1W { + Mode1W::new(self, 4) } #[doc = "Bits 8:11 - MODE n"] #[inline(always)] #[must_use] - pub fn mode2(&mut self) -> MODE2_W<8> { - MODE2_W::new(self) + pub fn mode2(&mut self) -> Mode2W { + Mode2W::new(self, 8) } #[doc = "Bits 12:15 - MODE n"] #[inline(always)] #[must_use] - pub fn mode3(&mut self) -> MODE3_W<12> { - MODE3_W::new(self) + pub fn mode3(&mut self) -> Mode3W { + Mode3W::new(self, 12) } #[doc = "Bits 16:19 - MODE n"] #[inline(always)] #[must_use] - pub fn mode4(&mut self) -> MODE4_W<16> { - MODE4_W::new(self) + pub fn mode4(&mut self) -> Mode4W { + Mode4W::new(self, 16) } #[doc = "Bits 20:23 - MODE n"] #[inline(always)] #[must_use] - pub fn mode5(&mut self) -> MODE5_W<20> { - MODE5_W::new(self) + pub fn mode5(&mut self) -> Mode5W { + Mode5W::new(self, 20) } #[doc = "Bits 24:27 - MODE n"] #[inline(always)] #[must_use] - pub fn mode6(&mut self) -> MODE6_W<24> { - MODE6_W::new(self) + pub fn mode6(&mut self) -> Mode6W { + Mode6W::new(self, 24) } #[doc = "Bits 28:31 - MODE n"] #[inline(always)] #[must_use] - pub fn mode7(&mut self) -> MODE7_W<28> { - MODE7_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn mode7(&mut self) -> Mode7W { + Mode7W::new(self, 28) } } -#[doc = "mode low\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [porta_model](index.html) module"] -pub struct PORTA_MODEL_SPEC; -impl crate::RegisterSpec for PORTA_MODEL_SPEC { +#[doc = "mode low\n\nYou can [`read`](crate::Reg::read) this register and get [`porta_model::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`porta_model::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortaModelSpec; +impl crate::RegisterSpec for PortaModelSpec { type Ux = u32; } -#[doc = "`read()` method returns [porta_model::R](R) reader structure"] -impl crate::Readable for PORTA_MODEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [porta_model::W](W) writer structure"] -impl crate::Writable for PORTA_MODEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`porta_model::R`](R) reader structure"] +impl crate::Readable for PortaModelSpec {} +#[doc = "`write(|w| ..)` method takes [`porta_model::W`](W) writer structure"] +impl crate::Writable for PortaModelSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTA_MODEL to value 0"] -impl crate::Resettable for PORTA_MODEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortaModelSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portb_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portb_ctrl.rs index de03db3..9901887 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portb_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portb_ctrl.rs @@ -1,126 +1,85 @@ #[doc = "Register `PORTB_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTB_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SLEWRATE` reader - Slew Rate"] -pub type SLEWRATE_R = crate::FieldReader; +pub type SlewrateR = crate::FieldReader; #[doc = "Field `SLEWRATE` writer - Slew Rate"] -pub type SLEWRATE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PORTB_CTRL_SPEC, u8, u8, 3, O>; +pub type SlewrateW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `DINDIS` reader - Data In Disable"] -pub type DINDIS_R = crate::BitReader; +pub type DindisR = crate::BitReader; #[doc = "Field `DINDIS` writer - Data In Disable"] -pub type DINDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PORTB_CTRL_SPEC, bool, O>; +pub type DindisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SLEWRATEALT` reader - Slew Rate Alt"] -pub type SLEWRATEALT_R = crate::FieldReader; +pub type SlewratealtR = crate::FieldReader; #[doc = "Field `SLEWRATEALT` writer - Slew Rate Alt"] -pub type SLEWRATEALT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PORTB_CTRL_SPEC, u8, u8, 3, O>; +pub type SlewratealtW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `DINDISALT` reader - Data In Disable Alt"] -pub type DINDISALT_R = crate::BitReader; +pub type DindisaltR = crate::BitReader; #[doc = "Field `DINDISALT` writer - Data In Disable Alt"] -pub type DINDISALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, PORTB_CTRL_SPEC, bool, O>; +pub type DindisaltW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 4:6 - Slew Rate"] #[inline(always)] - pub fn slewrate(&self) -> SLEWRATE_R { - SLEWRATE_R::new(((self.bits >> 4) & 7) as u8) + pub fn slewrate(&self) -> SlewrateR { + SlewrateR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bit 12 - Data In Disable"] #[inline(always)] - pub fn dindis(&self) -> DINDIS_R { - DINDIS_R::new(((self.bits >> 12) & 1) != 0) + pub fn dindis(&self) -> DindisR { + DindisR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bits 20:22 - Slew Rate Alt"] #[inline(always)] - pub fn slewratealt(&self) -> SLEWRATEALT_R { - SLEWRATEALT_R::new(((self.bits >> 20) & 7) as u8) + pub fn slewratealt(&self) -> SlewratealtR { + SlewratealtR::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bit 28 - Data In Disable Alt"] #[inline(always)] - pub fn dindisalt(&self) -> DINDISALT_R { - DINDISALT_R::new(((self.bits >> 28) & 1) != 0) + pub fn dindisalt(&self) -> DindisaltR { + DindisaltR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bits 4:6 - Slew Rate"] #[inline(always)] #[must_use] - pub fn slewrate(&mut self) -> SLEWRATE_W<4> { - SLEWRATE_W::new(self) + pub fn slewrate(&mut self) -> SlewrateW { + SlewrateW::new(self, 4) } #[doc = "Bit 12 - Data In Disable"] #[inline(always)] #[must_use] - pub fn dindis(&mut self) -> DINDIS_W<12> { - DINDIS_W::new(self) + pub fn dindis(&mut self) -> DindisW { + DindisW::new(self, 12) } #[doc = "Bits 20:22 - Slew Rate Alt"] #[inline(always)] #[must_use] - pub fn slewratealt(&mut self) -> SLEWRATEALT_W<20> { - SLEWRATEALT_W::new(self) + pub fn slewratealt(&mut self) -> SlewratealtW { + SlewratealtW::new(self, 20) } #[doc = "Bit 28 - Data In Disable Alt"] #[inline(always)] #[must_use] - pub fn dindisalt(&mut self) -> DINDISALT_W<28> { - DINDISALT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dindisalt(&mut self) -> DindisaltW { + DindisaltW::new(self, 28) } } -#[doc = "Port control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portb_ctrl](index.html) module"] -pub struct PORTB_CTRL_SPEC; -impl crate::RegisterSpec for PORTB_CTRL_SPEC { +#[doc = "Port control\n\nYou can [`read`](crate::Reg::read) this register and get [`portb_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portb_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortbCtrlSpec; +impl crate::RegisterSpec for PortbCtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [portb_ctrl::R](R) reader structure"] -impl crate::Readable for PORTB_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [portb_ctrl::W](W) writer structure"] -impl crate::Writable for PORTB_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`portb_ctrl::R`](R) reader structure"] +impl crate::Readable for PortbCtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`portb_ctrl::W`](W) writer structure"] +impl crate::Writable for PortbCtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTB_CTRL to value 0x0040_0040"] -impl crate::Resettable for PORTB_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0040_0040; +impl crate::Resettable for PortbCtrlSpec { + const RESET_VALUE: u32 = 0x0040_0040; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portb_din.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portb_din.rs index b7bd574..262cdc0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portb_din.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portb_din.rs @@ -1,37 +1,22 @@ #[doc = "Register `PORTB_DIN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DIN` reader - Data input"] -pub type DIN_R = crate::FieldReader; +pub type DinR = crate::FieldReader; impl R { #[doc = "Bits 0:6 - Data input"] #[inline(always)] - pub fn din(&self) -> DIN_R { - DIN_R::new((self.bits & 0x7f) as u8) + pub fn din(&self) -> DinR { + DinR::new((self.bits & 0x7f) as u8) } } -#[doc = "data in\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portb_din](index.html) module"] -pub struct PORTB_DIN_SPEC; -impl crate::RegisterSpec for PORTB_DIN_SPEC { +#[doc = "data in\n\nYou can [`read`](crate::Reg::read) this register and get [`portb_din::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortbDinSpec; +impl crate::RegisterSpec for PortbDinSpec { type Ux = u32; } -#[doc = "`read()` method returns [portb_din::R](R) reader structure"] -impl crate::Readable for PORTB_DIN_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`portb_din::R`](R) reader structure"] +impl crate::Readable for PortbDinSpec {} #[doc = "`reset()` method sets PORTB_DIN to value 0"] -impl crate::Resettable for PORTB_DIN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortbDinSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portb_dout.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portb_dout.rs index 3822720..6e1cc25 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portb_dout.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portb_dout.rs @@ -1,80 +1,40 @@ #[doc = "Register `PORTB_DOUT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTB_DOUT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DOUT` reader - Data output"] -pub type DOUT_R = crate::FieldReader; +pub type DoutR = crate::FieldReader; #[doc = "Field `DOUT` writer - Data output"] -pub type DOUT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PORTB_DOUT_SPEC, u8, u8, 7, O>; +pub type DoutW<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { #[doc = "Bits 0:6 - Data output"] #[inline(always)] - pub fn dout(&self) -> DOUT_R { - DOUT_R::new((self.bits & 0x7f) as u8) + pub fn dout(&self) -> DoutR { + DoutR::new((self.bits & 0x7f) as u8) } } impl W { #[doc = "Bits 0:6 - Data output"] #[inline(always)] #[must_use] - pub fn dout(&mut self) -> DOUT_W<0> { - DOUT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dout(&mut self) -> DoutW { + DoutW::new(self, 0) } } -#[doc = "data out\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portb_dout](index.html) module"] -pub struct PORTB_DOUT_SPEC; -impl crate::RegisterSpec for PORTB_DOUT_SPEC { +#[doc = "data out\n\nYou can [`read`](crate::Reg::read) this register and get [`portb_dout::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portb_dout::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortbDoutSpec; +impl crate::RegisterSpec for PortbDoutSpec { type Ux = u32; } -#[doc = "`read()` method returns [portb_dout::R](R) reader structure"] -impl crate::Readable for PORTB_DOUT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [portb_dout::W](W) writer structure"] -impl crate::Writable for PORTB_DOUT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`portb_dout::R`](R) reader structure"] +impl crate::Readable for PortbDoutSpec {} +#[doc = "`write(|w| ..)` method takes [`portb_dout::W`](W) writer structure"] +impl crate::Writable for PortbDoutSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTB_DOUT to value 0"] -impl crate::Resettable for PORTB_DOUT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortbDoutSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portb_model.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portb_model.rs index 79fa654..86fbccb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portb_model.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portb_model.rs @@ -1,1787 +1,1796 @@ #[doc = "Register `PORTB_MODEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTB_MODEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE0` reader - MODE n"] -pub type MODE0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE0_A { +pub enum Mode0 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE0_A) -> Self { + fn from(variant: Mode0) -> Self { variant as _ } } -impl MODE0_R { +impl crate::FieldSpec for Mode0 { + type Ux = u8; +} +impl crate::IsEnum for Mode0 {} +#[doc = "Field `MODE0` reader - MODE n"] +pub type Mode0R = crate::FieldReader; +impl Mode0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE0_A { + pub const fn variant(&self) -> Mode0 { match self.bits { - 0 => MODE0_A::DISABLED, - 1 => MODE0_A::INPUT, - 2 => MODE0_A::INPUTPULL, - 3 => MODE0_A::INPUTPULLFILTER, - 4 => MODE0_A::PUSHPULL, - 5 => MODE0_A::PUSHPULLALT, - 6 => MODE0_A::WIREDOR, - 7 => MODE0_A::WIREDORPULLDOWN, - 8 => MODE0_A::WIREDAND, - 9 => MODE0_A::WIREDANDFILTER, - 10 => MODE0_A::WIREDANDPULLUP, - 11 => MODE0_A::WIREDANDPULLUPFILTER, - 12 => MODE0_A::WIREDANDALT, - 13 => MODE0_A::WIREDANDALTFILTER, - 14 => MODE0_A::WIREDANDALTPULLUP, - 15 => MODE0_A::WIREDANDALTPULLUPFILTER, + 0 => Mode0::Disabled, + 1 => Mode0::Input, + 2 => Mode0::Inputpull, + 3 => Mode0::Inputpullfilter, + 4 => Mode0::Pushpull, + 5 => Mode0::Pushpullalt, + 6 => Mode0::Wiredor, + 7 => Mode0::Wiredorpulldown, + 8 => Mode0::Wiredand, + 9 => Mode0::Wiredandfilter, + 10 => Mode0::Wiredandpullup, + 11 => Mode0::Wiredandpullupfilter, + 12 => Mode0::Wiredandalt, + 13 => Mode0::Wiredandaltfilter, + 14 => Mode0::Wiredandaltpullup, + 15 => Mode0::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE0_A::DISABLED + *self == Mode0::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE0_A::INPUT + *self == Mode0::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE0_A::INPUTPULL + *self == Mode0::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE0_A::INPUTPULLFILTER + *self == Mode0::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE0_A::PUSHPULL + *self == Mode0::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE0_A::PUSHPULLALT + *self == Mode0::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE0_A::WIREDOR + *self == Mode0::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE0_A::WIREDORPULLDOWN + *self == Mode0::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE0_A::WIREDAND + *self == Mode0::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE0_A::WIREDANDFILTER + *self == Mode0::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE0_A::WIREDANDPULLUP + *self == Mode0::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE0_A::WIREDANDPULLUPFILTER + *self == Mode0::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE0_A::WIREDANDALT + *self == Mode0::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE0_A::WIREDANDALTFILTER + *self == Mode0::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE0_A::WIREDANDALTPULLUP + *self == Mode0::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE0_A::WIREDANDALTPULLUPFILTER + *self == Mode0::Wiredandaltpullupfilter } } #[doc = "Field `MODE0` writer - MODE n"] -pub type MODE0_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTB_MODEL_SPEC, u8, MODE0_A, 4, O>; -impl<'a, const O: u8> MODE0_W<'a, O> { +pub type Mode0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode0, crate::Safe>; +impl<'a, REG> Mode0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE0_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode0::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE0_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode0::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE0_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode0::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE0_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE0_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode0::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE0_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode0::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE0_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE0_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE0_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE1` reader - MODE n"] -pub type MODE1_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE1_A { +pub enum Mode1 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE1_A) -> Self { + fn from(variant: Mode1) -> Self { variant as _ } } -impl MODE1_R { +impl crate::FieldSpec for Mode1 { + type Ux = u8; +} +impl crate::IsEnum for Mode1 {} +#[doc = "Field `MODE1` reader - MODE n"] +pub type Mode1R = crate::FieldReader; +impl Mode1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE1_A { + pub const fn variant(&self) -> Mode1 { match self.bits { - 0 => MODE1_A::DISABLED, - 1 => MODE1_A::INPUT, - 2 => MODE1_A::INPUTPULL, - 3 => MODE1_A::INPUTPULLFILTER, - 4 => MODE1_A::PUSHPULL, - 5 => MODE1_A::PUSHPULLALT, - 6 => MODE1_A::WIREDOR, - 7 => MODE1_A::WIREDORPULLDOWN, - 8 => MODE1_A::WIREDAND, - 9 => MODE1_A::WIREDANDFILTER, - 10 => MODE1_A::WIREDANDPULLUP, - 11 => MODE1_A::WIREDANDPULLUPFILTER, - 12 => MODE1_A::WIREDANDALT, - 13 => MODE1_A::WIREDANDALTFILTER, - 14 => MODE1_A::WIREDANDALTPULLUP, - 15 => MODE1_A::WIREDANDALTPULLUPFILTER, + 0 => Mode1::Disabled, + 1 => Mode1::Input, + 2 => Mode1::Inputpull, + 3 => Mode1::Inputpullfilter, + 4 => Mode1::Pushpull, + 5 => Mode1::Pushpullalt, + 6 => Mode1::Wiredor, + 7 => Mode1::Wiredorpulldown, + 8 => Mode1::Wiredand, + 9 => Mode1::Wiredandfilter, + 10 => Mode1::Wiredandpullup, + 11 => Mode1::Wiredandpullupfilter, + 12 => Mode1::Wiredandalt, + 13 => Mode1::Wiredandaltfilter, + 14 => Mode1::Wiredandaltpullup, + 15 => Mode1::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE1_A::DISABLED + *self == Mode1::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE1_A::INPUT + *self == Mode1::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE1_A::INPUTPULL + *self == Mode1::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE1_A::INPUTPULLFILTER + *self == Mode1::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE1_A::PUSHPULL + *self == Mode1::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE1_A::PUSHPULLALT + *self == Mode1::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE1_A::WIREDOR + *self == Mode1::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE1_A::WIREDORPULLDOWN + *self == Mode1::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE1_A::WIREDAND + *self == Mode1::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE1_A::WIREDANDFILTER + *self == Mode1::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE1_A::WIREDANDPULLUP + *self == Mode1::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE1_A::WIREDANDPULLUPFILTER + *self == Mode1::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE1_A::WIREDANDALT + *self == Mode1::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE1_A::WIREDANDALTFILTER + *self == Mode1::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE1_A::WIREDANDALTPULLUP + *self == Mode1::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE1_A::WIREDANDALTPULLUPFILTER + *self == Mode1::Wiredandaltpullupfilter } } #[doc = "Field `MODE1` writer - MODE n"] -pub type MODE1_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTB_MODEL_SPEC, u8, MODE1_A, 4, O>; -impl<'a, const O: u8> MODE1_W<'a, O> { +pub type Mode1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode1, crate::Safe>; +impl<'a, REG> Mode1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE1_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode1::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE1_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode1::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE1_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode1::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE1_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE1_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode1::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE1_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode1::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE1_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE1_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE1_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE2` reader - MODE n"] -pub type MODE2_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE2_A { +pub enum Mode2 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE2_A) -> Self { + fn from(variant: Mode2) -> Self { variant as _ } } -impl MODE2_R { +impl crate::FieldSpec for Mode2 { + type Ux = u8; +} +impl crate::IsEnum for Mode2 {} +#[doc = "Field `MODE2` reader - MODE n"] +pub type Mode2R = crate::FieldReader; +impl Mode2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE2_A { + pub const fn variant(&self) -> Mode2 { match self.bits { - 0 => MODE2_A::DISABLED, - 1 => MODE2_A::INPUT, - 2 => MODE2_A::INPUTPULL, - 3 => MODE2_A::INPUTPULLFILTER, - 4 => MODE2_A::PUSHPULL, - 5 => MODE2_A::PUSHPULLALT, - 6 => MODE2_A::WIREDOR, - 7 => MODE2_A::WIREDORPULLDOWN, - 8 => MODE2_A::WIREDAND, - 9 => MODE2_A::WIREDANDFILTER, - 10 => MODE2_A::WIREDANDPULLUP, - 11 => MODE2_A::WIREDANDPULLUPFILTER, - 12 => MODE2_A::WIREDANDALT, - 13 => MODE2_A::WIREDANDALTFILTER, - 14 => MODE2_A::WIREDANDALTPULLUP, - 15 => MODE2_A::WIREDANDALTPULLUPFILTER, + 0 => Mode2::Disabled, + 1 => Mode2::Input, + 2 => Mode2::Inputpull, + 3 => Mode2::Inputpullfilter, + 4 => Mode2::Pushpull, + 5 => Mode2::Pushpullalt, + 6 => Mode2::Wiredor, + 7 => Mode2::Wiredorpulldown, + 8 => Mode2::Wiredand, + 9 => Mode2::Wiredandfilter, + 10 => Mode2::Wiredandpullup, + 11 => Mode2::Wiredandpullupfilter, + 12 => Mode2::Wiredandalt, + 13 => Mode2::Wiredandaltfilter, + 14 => Mode2::Wiredandaltpullup, + 15 => Mode2::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE2_A::DISABLED + *self == Mode2::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE2_A::INPUT + *self == Mode2::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE2_A::INPUTPULL + *self == Mode2::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE2_A::INPUTPULLFILTER + *self == Mode2::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE2_A::PUSHPULL + *self == Mode2::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE2_A::PUSHPULLALT + *self == Mode2::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE2_A::WIREDOR + *self == Mode2::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE2_A::WIREDORPULLDOWN + *self == Mode2::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE2_A::WIREDAND + *self == Mode2::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE2_A::WIREDANDFILTER + *self == Mode2::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE2_A::WIREDANDPULLUP + *self == Mode2::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE2_A::WIREDANDPULLUPFILTER + *self == Mode2::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE2_A::WIREDANDALT + *self == Mode2::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE2_A::WIREDANDALTFILTER + *self == Mode2::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE2_A::WIREDANDALTPULLUP + *self == Mode2::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE2_A::WIREDANDALTPULLUPFILTER + *self == Mode2::Wiredandaltpullupfilter } } #[doc = "Field `MODE2` writer - MODE n"] -pub type MODE2_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTB_MODEL_SPEC, u8, MODE2_A, 4, O>; -impl<'a, const O: u8> MODE2_W<'a, O> { +pub type Mode2W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode2, crate::Safe>; +impl<'a, REG> Mode2W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE2_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode2::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE2_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode2::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE2_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode2::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE2_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE2_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode2::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE2_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode2::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE2_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE2_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE2_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE3` reader - MODE n"] -pub type MODE3_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE3_A { +pub enum Mode3 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE3_A) -> Self { + fn from(variant: Mode3) -> Self { variant as _ } } -impl MODE3_R { +impl crate::FieldSpec for Mode3 { + type Ux = u8; +} +impl crate::IsEnum for Mode3 {} +#[doc = "Field `MODE3` reader - MODE n"] +pub type Mode3R = crate::FieldReader; +impl Mode3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE3_A { + pub const fn variant(&self) -> Mode3 { match self.bits { - 0 => MODE3_A::DISABLED, - 1 => MODE3_A::INPUT, - 2 => MODE3_A::INPUTPULL, - 3 => MODE3_A::INPUTPULLFILTER, - 4 => MODE3_A::PUSHPULL, - 5 => MODE3_A::PUSHPULLALT, - 6 => MODE3_A::WIREDOR, - 7 => MODE3_A::WIREDORPULLDOWN, - 8 => MODE3_A::WIREDAND, - 9 => MODE3_A::WIREDANDFILTER, - 10 => MODE3_A::WIREDANDPULLUP, - 11 => MODE3_A::WIREDANDPULLUPFILTER, - 12 => MODE3_A::WIREDANDALT, - 13 => MODE3_A::WIREDANDALTFILTER, - 14 => MODE3_A::WIREDANDALTPULLUP, - 15 => MODE3_A::WIREDANDALTPULLUPFILTER, + 0 => Mode3::Disabled, + 1 => Mode3::Input, + 2 => Mode3::Inputpull, + 3 => Mode3::Inputpullfilter, + 4 => Mode3::Pushpull, + 5 => Mode3::Pushpullalt, + 6 => Mode3::Wiredor, + 7 => Mode3::Wiredorpulldown, + 8 => Mode3::Wiredand, + 9 => Mode3::Wiredandfilter, + 10 => Mode3::Wiredandpullup, + 11 => Mode3::Wiredandpullupfilter, + 12 => Mode3::Wiredandalt, + 13 => Mode3::Wiredandaltfilter, + 14 => Mode3::Wiredandaltpullup, + 15 => Mode3::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE3_A::DISABLED + *self == Mode3::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE3_A::INPUT + *self == Mode3::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE3_A::INPUTPULL + *self == Mode3::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE3_A::INPUTPULLFILTER + *self == Mode3::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE3_A::PUSHPULL + *self == Mode3::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE3_A::PUSHPULLALT + *self == Mode3::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE3_A::WIREDOR + *self == Mode3::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE3_A::WIREDORPULLDOWN + *self == Mode3::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE3_A::WIREDAND + *self == Mode3::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE3_A::WIREDANDFILTER + *self == Mode3::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE3_A::WIREDANDPULLUP + *self == Mode3::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE3_A::WIREDANDPULLUPFILTER + *self == Mode3::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE3_A::WIREDANDALT + *self == Mode3::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE3_A::WIREDANDALTFILTER + *self == Mode3::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE3_A::WIREDANDALTPULLUP + *self == Mode3::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE3_A::WIREDANDALTPULLUPFILTER + *self == Mode3::Wiredandaltpullupfilter } } #[doc = "Field `MODE3` writer - MODE n"] -pub type MODE3_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTB_MODEL_SPEC, u8, MODE3_A, 4, O>; -impl<'a, const O: u8> MODE3_W<'a, O> { +pub type Mode3W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode3, crate::Safe>; +impl<'a, REG> Mode3W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE3_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode3::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE3_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode3::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE3_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode3::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE3_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE3_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode3::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE3_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode3::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE3_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE3_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE3_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE4` reader - MODE n"] -pub type MODE4_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE4_A { +pub enum Mode4 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE4_A) -> Self { + fn from(variant: Mode4) -> Self { variant as _ } } -impl MODE4_R { +impl crate::FieldSpec for Mode4 { + type Ux = u8; +} +impl crate::IsEnum for Mode4 {} +#[doc = "Field `MODE4` reader - MODE n"] +pub type Mode4R = crate::FieldReader; +impl Mode4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE4_A { + pub const fn variant(&self) -> Mode4 { match self.bits { - 0 => MODE4_A::DISABLED, - 1 => MODE4_A::INPUT, - 2 => MODE4_A::INPUTPULL, - 3 => MODE4_A::INPUTPULLFILTER, - 4 => MODE4_A::PUSHPULL, - 5 => MODE4_A::PUSHPULLALT, - 6 => MODE4_A::WIREDOR, - 7 => MODE4_A::WIREDORPULLDOWN, - 8 => MODE4_A::WIREDAND, - 9 => MODE4_A::WIREDANDFILTER, - 10 => MODE4_A::WIREDANDPULLUP, - 11 => MODE4_A::WIREDANDPULLUPFILTER, - 12 => MODE4_A::WIREDANDALT, - 13 => MODE4_A::WIREDANDALTFILTER, - 14 => MODE4_A::WIREDANDALTPULLUP, - 15 => MODE4_A::WIREDANDALTPULLUPFILTER, + 0 => Mode4::Disabled, + 1 => Mode4::Input, + 2 => Mode4::Inputpull, + 3 => Mode4::Inputpullfilter, + 4 => Mode4::Pushpull, + 5 => Mode4::Pushpullalt, + 6 => Mode4::Wiredor, + 7 => Mode4::Wiredorpulldown, + 8 => Mode4::Wiredand, + 9 => Mode4::Wiredandfilter, + 10 => Mode4::Wiredandpullup, + 11 => Mode4::Wiredandpullupfilter, + 12 => Mode4::Wiredandalt, + 13 => Mode4::Wiredandaltfilter, + 14 => Mode4::Wiredandaltpullup, + 15 => Mode4::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE4_A::DISABLED + *self == Mode4::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE4_A::INPUT + *self == Mode4::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE4_A::INPUTPULL + *self == Mode4::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE4_A::INPUTPULLFILTER + *self == Mode4::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE4_A::PUSHPULL + *self == Mode4::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE4_A::PUSHPULLALT + *self == Mode4::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE4_A::WIREDOR + *self == Mode4::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE4_A::WIREDORPULLDOWN + *self == Mode4::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE4_A::WIREDAND + *self == Mode4::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE4_A::WIREDANDFILTER + *self == Mode4::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE4_A::WIREDANDPULLUP + *self == Mode4::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE4_A::WIREDANDPULLUPFILTER + *self == Mode4::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE4_A::WIREDANDALT + *self == Mode4::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE4_A::WIREDANDALTFILTER + *self == Mode4::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE4_A::WIREDANDALTPULLUP + *self == Mode4::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE4_A::WIREDANDALTPULLUPFILTER + *self == Mode4::Wiredandaltpullupfilter } } #[doc = "Field `MODE4` writer - MODE n"] -pub type MODE4_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTB_MODEL_SPEC, u8, MODE4_A, 4, O>; -impl<'a, const O: u8> MODE4_W<'a, O> { +pub type Mode4W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode4, crate::Safe>; +impl<'a, REG> Mode4W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE4_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode4::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE4_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode4::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE4_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode4::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE4_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE4_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode4::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE4_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode4::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE4_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE4_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE4_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE5` reader - MODE n"] -pub type MODE5_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE5_A { +pub enum Mode5 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE5_A) -> Self { + fn from(variant: Mode5) -> Self { variant as _ } } -impl MODE5_R { +impl crate::FieldSpec for Mode5 { + type Ux = u8; +} +impl crate::IsEnum for Mode5 {} +#[doc = "Field `MODE5` reader - MODE n"] +pub type Mode5R = crate::FieldReader; +impl Mode5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE5_A { + pub const fn variant(&self) -> Mode5 { match self.bits { - 0 => MODE5_A::DISABLED, - 1 => MODE5_A::INPUT, - 2 => MODE5_A::INPUTPULL, - 3 => MODE5_A::INPUTPULLFILTER, - 4 => MODE5_A::PUSHPULL, - 5 => MODE5_A::PUSHPULLALT, - 6 => MODE5_A::WIREDOR, - 7 => MODE5_A::WIREDORPULLDOWN, - 8 => MODE5_A::WIREDAND, - 9 => MODE5_A::WIREDANDFILTER, - 10 => MODE5_A::WIREDANDPULLUP, - 11 => MODE5_A::WIREDANDPULLUPFILTER, - 12 => MODE5_A::WIREDANDALT, - 13 => MODE5_A::WIREDANDALTFILTER, - 14 => MODE5_A::WIREDANDALTPULLUP, - 15 => MODE5_A::WIREDANDALTPULLUPFILTER, + 0 => Mode5::Disabled, + 1 => Mode5::Input, + 2 => Mode5::Inputpull, + 3 => Mode5::Inputpullfilter, + 4 => Mode5::Pushpull, + 5 => Mode5::Pushpullalt, + 6 => Mode5::Wiredor, + 7 => Mode5::Wiredorpulldown, + 8 => Mode5::Wiredand, + 9 => Mode5::Wiredandfilter, + 10 => Mode5::Wiredandpullup, + 11 => Mode5::Wiredandpullupfilter, + 12 => Mode5::Wiredandalt, + 13 => Mode5::Wiredandaltfilter, + 14 => Mode5::Wiredandaltpullup, + 15 => Mode5::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE5_A::DISABLED + *self == Mode5::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE5_A::INPUT + *self == Mode5::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE5_A::INPUTPULL + *self == Mode5::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE5_A::INPUTPULLFILTER + *self == Mode5::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE5_A::PUSHPULL + *self == Mode5::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE5_A::PUSHPULLALT + *self == Mode5::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE5_A::WIREDOR + *self == Mode5::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE5_A::WIREDORPULLDOWN + *self == Mode5::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE5_A::WIREDAND + *self == Mode5::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE5_A::WIREDANDFILTER + *self == Mode5::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE5_A::WIREDANDPULLUP + *self == Mode5::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE5_A::WIREDANDPULLUPFILTER + *self == Mode5::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE5_A::WIREDANDALT + *self == Mode5::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE5_A::WIREDANDALTFILTER + *self == Mode5::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE5_A::WIREDANDALTPULLUP + *self == Mode5::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE5_A::WIREDANDALTPULLUPFILTER + *self == Mode5::Wiredandaltpullupfilter } } #[doc = "Field `MODE5` writer - MODE n"] -pub type MODE5_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTB_MODEL_SPEC, u8, MODE5_A, 4, O>; -impl<'a, const O: u8> MODE5_W<'a, O> { +pub type Mode5W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode5, crate::Safe>; +impl<'a, REG> Mode5W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE5_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode5::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE5_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode5::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE5_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode5::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE5_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE5_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode5::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE5_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode5::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE5_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE5_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE5_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE6` reader - MODE n"] -pub type MODE6_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE6_A { +pub enum Mode6 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE6_A) -> Self { + fn from(variant: Mode6) -> Self { variant as _ } } -impl MODE6_R { +impl crate::FieldSpec for Mode6 { + type Ux = u8; +} +impl crate::IsEnum for Mode6 {} +#[doc = "Field `MODE6` reader - MODE n"] +pub type Mode6R = crate::FieldReader; +impl Mode6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE6_A { + pub const fn variant(&self) -> Mode6 { match self.bits { - 0 => MODE6_A::DISABLED, - 1 => MODE6_A::INPUT, - 2 => MODE6_A::INPUTPULL, - 3 => MODE6_A::INPUTPULLFILTER, - 4 => MODE6_A::PUSHPULL, - 5 => MODE6_A::PUSHPULLALT, - 6 => MODE6_A::WIREDOR, - 7 => MODE6_A::WIREDORPULLDOWN, - 8 => MODE6_A::WIREDAND, - 9 => MODE6_A::WIREDANDFILTER, - 10 => MODE6_A::WIREDANDPULLUP, - 11 => MODE6_A::WIREDANDPULLUPFILTER, - 12 => MODE6_A::WIREDANDALT, - 13 => MODE6_A::WIREDANDALTFILTER, - 14 => MODE6_A::WIREDANDALTPULLUP, - 15 => MODE6_A::WIREDANDALTPULLUPFILTER, + 0 => Mode6::Disabled, + 1 => Mode6::Input, + 2 => Mode6::Inputpull, + 3 => Mode6::Inputpullfilter, + 4 => Mode6::Pushpull, + 5 => Mode6::Pushpullalt, + 6 => Mode6::Wiredor, + 7 => Mode6::Wiredorpulldown, + 8 => Mode6::Wiredand, + 9 => Mode6::Wiredandfilter, + 10 => Mode6::Wiredandpullup, + 11 => Mode6::Wiredandpullupfilter, + 12 => Mode6::Wiredandalt, + 13 => Mode6::Wiredandaltfilter, + 14 => Mode6::Wiredandaltpullup, + 15 => Mode6::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE6_A::DISABLED + *self == Mode6::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE6_A::INPUT + *self == Mode6::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE6_A::INPUTPULL + *self == Mode6::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE6_A::INPUTPULLFILTER + *self == Mode6::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE6_A::PUSHPULL + *self == Mode6::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE6_A::PUSHPULLALT + *self == Mode6::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE6_A::WIREDOR + *self == Mode6::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE6_A::WIREDORPULLDOWN + *self == Mode6::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE6_A::WIREDAND + *self == Mode6::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE6_A::WIREDANDFILTER + *self == Mode6::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE6_A::WIREDANDPULLUP + *self == Mode6::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE6_A::WIREDANDPULLUPFILTER + *self == Mode6::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE6_A::WIREDANDALT + *self == Mode6::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE6_A::WIREDANDALTFILTER + *self == Mode6::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE6_A::WIREDANDALTPULLUP + *self == Mode6::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE6_A::WIREDANDALTPULLUPFILTER + *self == Mode6::Wiredandaltpullupfilter } } #[doc = "Field `MODE6` writer - MODE n"] -pub type MODE6_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTB_MODEL_SPEC, u8, MODE6_A, 4, O>; -impl<'a, const O: u8> MODE6_W<'a, O> { +pub type Mode6W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode6, crate::Safe>; +impl<'a, REG> Mode6W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE6_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode6::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE6_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode6::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE6_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode6::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE6_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE6_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode6::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE6_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode6::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE6_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE6_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE6_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandaltpullupfilter) } } impl R { #[doc = "Bits 0:3 - MODE n"] #[inline(always)] - pub fn mode0(&self) -> MODE0_R { - MODE0_R::new((self.bits & 0x0f) as u8) + pub fn mode0(&self) -> Mode0R { + Mode0R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - MODE n"] #[inline(always)] - pub fn mode1(&self) -> MODE1_R { - MODE1_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn mode1(&self) -> Mode1R { + Mode1R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - MODE n"] #[inline(always)] - pub fn mode2(&self) -> MODE2_R { - MODE2_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn mode2(&self) -> Mode2R { + Mode2R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - MODE n"] #[inline(always)] - pub fn mode3(&self) -> MODE3_R { - MODE3_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn mode3(&self) -> Mode3R { + Mode3R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:19 - MODE n"] #[inline(always)] - pub fn mode4(&self) -> MODE4_R { - MODE4_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn mode4(&self) -> Mode4R { + Mode4R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:23 - MODE n"] #[inline(always)] - pub fn mode5(&self) -> MODE5_R { - MODE5_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn mode5(&self) -> Mode5R { + Mode5R::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:27 - MODE n"] #[inline(always)] - pub fn mode6(&self) -> MODE6_R { - MODE6_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn mode6(&self) -> Mode6R { + Mode6R::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - MODE n"] #[inline(always)] #[must_use] - pub fn mode0(&mut self) -> MODE0_W<0> { - MODE0_W::new(self) + pub fn mode0(&mut self) -> Mode0W { + Mode0W::new(self, 0) } #[doc = "Bits 4:7 - MODE n"] #[inline(always)] #[must_use] - pub fn mode1(&mut self) -> MODE1_W<4> { - MODE1_W::new(self) + pub fn mode1(&mut self) -> Mode1W { + Mode1W::new(self, 4) } #[doc = "Bits 8:11 - MODE n"] #[inline(always)] #[must_use] - pub fn mode2(&mut self) -> MODE2_W<8> { - MODE2_W::new(self) + pub fn mode2(&mut self) -> Mode2W { + Mode2W::new(self, 8) } #[doc = "Bits 12:15 - MODE n"] #[inline(always)] #[must_use] - pub fn mode3(&mut self) -> MODE3_W<12> { - MODE3_W::new(self) + pub fn mode3(&mut self) -> Mode3W { + Mode3W::new(self, 12) } #[doc = "Bits 16:19 - MODE n"] #[inline(always)] #[must_use] - pub fn mode4(&mut self) -> MODE4_W<16> { - MODE4_W::new(self) + pub fn mode4(&mut self) -> Mode4W { + Mode4W::new(self, 16) } #[doc = "Bits 20:23 - MODE n"] #[inline(always)] #[must_use] - pub fn mode5(&mut self) -> MODE5_W<20> { - MODE5_W::new(self) + pub fn mode5(&mut self) -> Mode5W { + Mode5W::new(self, 20) } #[doc = "Bits 24:27 - MODE n"] #[inline(always)] #[must_use] - pub fn mode6(&mut self) -> MODE6_W<24> { - MODE6_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn mode6(&mut self) -> Mode6W { + Mode6W::new(self, 24) } } -#[doc = "mode low\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portb_model](index.html) module"] -pub struct PORTB_MODEL_SPEC; -impl crate::RegisterSpec for PORTB_MODEL_SPEC { +#[doc = "mode low\n\nYou can [`read`](crate::Reg::read) this register and get [`portb_model::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portb_model::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortbModelSpec; +impl crate::RegisterSpec for PortbModelSpec { type Ux = u32; } -#[doc = "`read()` method returns [portb_model::R](R) reader structure"] -impl crate::Readable for PORTB_MODEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [portb_model::W](W) writer structure"] -impl crate::Writable for PORTB_MODEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`portb_model::R`](R) reader structure"] +impl crate::Readable for PortbModelSpec {} +#[doc = "`write(|w| ..)` method takes [`portb_model::W`](W) writer structure"] +impl crate::Writable for PortbModelSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTB_MODEL to value 0"] -impl crate::Resettable for PORTB_MODEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortbModelSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portc_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portc_ctrl.rs index c6d2416..6c16c13 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portc_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portc_ctrl.rs @@ -1,126 +1,85 @@ #[doc = "Register `PORTC_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTC_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SLEWRATE` reader - Slew Rate"] -pub type SLEWRATE_R = crate::FieldReader; +pub type SlewrateR = crate::FieldReader; #[doc = "Field `SLEWRATE` writer - Slew Rate"] -pub type SLEWRATE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PORTC_CTRL_SPEC, u8, u8, 3, O>; +pub type SlewrateW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `DINDIS` reader - Data In Disable"] -pub type DINDIS_R = crate::BitReader; +pub type DindisR = crate::BitReader; #[doc = "Field `DINDIS` writer - Data In Disable"] -pub type DINDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PORTC_CTRL_SPEC, bool, O>; +pub type DindisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SLEWRATEALT` reader - Slew Rate Alt"] -pub type SLEWRATEALT_R = crate::FieldReader; +pub type SlewratealtR = crate::FieldReader; #[doc = "Field `SLEWRATEALT` writer - Slew Rate Alt"] -pub type SLEWRATEALT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PORTC_CTRL_SPEC, u8, u8, 3, O>; +pub type SlewratealtW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `DINDISALT` reader - Data In Disable Alt"] -pub type DINDISALT_R = crate::BitReader; +pub type DindisaltR = crate::BitReader; #[doc = "Field `DINDISALT` writer - Data In Disable Alt"] -pub type DINDISALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, PORTC_CTRL_SPEC, bool, O>; +pub type DindisaltW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 4:6 - Slew Rate"] #[inline(always)] - pub fn slewrate(&self) -> SLEWRATE_R { - SLEWRATE_R::new(((self.bits >> 4) & 7) as u8) + pub fn slewrate(&self) -> SlewrateR { + SlewrateR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bit 12 - Data In Disable"] #[inline(always)] - pub fn dindis(&self) -> DINDIS_R { - DINDIS_R::new(((self.bits >> 12) & 1) != 0) + pub fn dindis(&self) -> DindisR { + DindisR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bits 20:22 - Slew Rate Alt"] #[inline(always)] - pub fn slewratealt(&self) -> SLEWRATEALT_R { - SLEWRATEALT_R::new(((self.bits >> 20) & 7) as u8) + pub fn slewratealt(&self) -> SlewratealtR { + SlewratealtR::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bit 28 - Data In Disable Alt"] #[inline(always)] - pub fn dindisalt(&self) -> DINDISALT_R { - DINDISALT_R::new(((self.bits >> 28) & 1) != 0) + pub fn dindisalt(&self) -> DindisaltR { + DindisaltR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bits 4:6 - Slew Rate"] #[inline(always)] #[must_use] - pub fn slewrate(&mut self) -> SLEWRATE_W<4> { - SLEWRATE_W::new(self) + pub fn slewrate(&mut self) -> SlewrateW { + SlewrateW::new(self, 4) } #[doc = "Bit 12 - Data In Disable"] #[inline(always)] #[must_use] - pub fn dindis(&mut self) -> DINDIS_W<12> { - DINDIS_W::new(self) + pub fn dindis(&mut self) -> DindisW { + DindisW::new(self, 12) } #[doc = "Bits 20:22 - Slew Rate Alt"] #[inline(always)] #[must_use] - pub fn slewratealt(&mut self) -> SLEWRATEALT_W<20> { - SLEWRATEALT_W::new(self) + pub fn slewratealt(&mut self) -> SlewratealtW { + SlewratealtW::new(self, 20) } #[doc = "Bit 28 - Data In Disable Alt"] #[inline(always)] #[must_use] - pub fn dindisalt(&mut self) -> DINDISALT_W<28> { - DINDISALT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dindisalt(&mut self) -> DindisaltW { + DindisaltW::new(self, 28) } } -#[doc = "Port control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portc_ctrl](index.html) module"] -pub struct PORTC_CTRL_SPEC; -impl crate::RegisterSpec for PORTC_CTRL_SPEC { +#[doc = "Port control\n\nYou can [`read`](crate::Reg::read) this register and get [`portc_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portc_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortcCtrlSpec; +impl crate::RegisterSpec for PortcCtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [portc_ctrl::R](R) reader structure"] -impl crate::Readable for PORTC_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [portc_ctrl::W](W) writer structure"] -impl crate::Writable for PORTC_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`portc_ctrl::R`](R) reader structure"] +impl crate::Readable for PortcCtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`portc_ctrl::W`](W) writer structure"] +impl crate::Writable for PortcCtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTC_CTRL to value 0x0040_0040"] -impl crate::Resettable for PORTC_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0040_0040; +impl crate::Resettable for PortcCtrlSpec { + const RESET_VALUE: u32 = 0x0040_0040; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portc_din.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portc_din.rs index 3b1cfef..f141542 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portc_din.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portc_din.rs @@ -1,37 +1,22 @@ #[doc = "Register `PORTC_DIN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DIN` reader - Data input"] -pub type DIN_R = crate::FieldReader; +pub type DinR = crate::FieldReader; impl R { #[doc = "Bits 0:9 - Data input"] #[inline(always)] - pub fn din(&self) -> DIN_R { - DIN_R::new((self.bits & 0x03ff) as u16) + pub fn din(&self) -> DinR { + DinR::new((self.bits & 0x03ff) as u16) } } -#[doc = "data in\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portc_din](index.html) module"] -pub struct PORTC_DIN_SPEC; -impl crate::RegisterSpec for PORTC_DIN_SPEC { +#[doc = "data in\n\nYou can [`read`](crate::Reg::read) this register and get [`portc_din::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortcDinSpec; +impl crate::RegisterSpec for PortcDinSpec { type Ux = u32; } -#[doc = "`read()` method returns [portc_din::R](R) reader structure"] -impl crate::Readable for PORTC_DIN_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`portc_din::R`](R) reader structure"] +impl crate::Readable for PortcDinSpec {} #[doc = "`reset()` method sets PORTC_DIN to value 0"] -impl crate::Resettable for PORTC_DIN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortcDinSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portc_dout.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portc_dout.rs index 2296c36..73ec161 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portc_dout.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portc_dout.rs @@ -1,80 +1,40 @@ #[doc = "Register `PORTC_DOUT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTC_DOUT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DOUT` reader - Data output"] -pub type DOUT_R = crate::FieldReader; +pub type DoutR = crate::FieldReader; #[doc = "Field `DOUT` writer - Data output"] -pub type DOUT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PORTC_DOUT_SPEC, u16, u16, 10, O>; +pub type DoutW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; impl R { #[doc = "Bits 0:9 - Data output"] #[inline(always)] - pub fn dout(&self) -> DOUT_R { - DOUT_R::new((self.bits & 0x03ff) as u16) + pub fn dout(&self) -> DoutR { + DoutR::new((self.bits & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:9 - Data output"] #[inline(always)] #[must_use] - pub fn dout(&mut self) -> DOUT_W<0> { - DOUT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dout(&mut self) -> DoutW { + DoutW::new(self, 0) } } -#[doc = "data out\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portc_dout](index.html) module"] -pub struct PORTC_DOUT_SPEC; -impl crate::RegisterSpec for PORTC_DOUT_SPEC { +#[doc = "data out\n\nYou can [`read`](crate::Reg::read) this register and get [`portc_dout::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portc_dout::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortcDoutSpec; +impl crate::RegisterSpec for PortcDoutSpec { type Ux = u32; } -#[doc = "`read()` method returns [portc_dout::R](R) reader structure"] -impl crate::Readable for PORTC_DOUT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [portc_dout::W](W) writer structure"] -impl crate::Writable for PORTC_DOUT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`portc_dout::R`](R) reader structure"] +impl crate::Readable for PortcDoutSpec {} +#[doc = "`write(|w| ..)` method takes [`portc_dout::W`](W) writer structure"] +impl crate::Writable for PortcDoutSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTC_DOUT to value 0"] -impl crate::Resettable for PORTC_DOUT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortcDoutSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portc_modeh.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portc_modeh.rs index a404bb9..f74032d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portc_modeh.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portc_modeh.rs @@ -1,557 +1,531 @@ #[doc = "Register `PORTC_MODEH` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTC_MODEH` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE0` reader - MODE n"] -pub type MODE0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE0_A { +pub enum Mode0 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE0_A) -> Self { + fn from(variant: Mode0) -> Self { variant as _ } } -impl MODE0_R { +impl crate::FieldSpec for Mode0 { + type Ux = u8; +} +impl crate::IsEnum for Mode0 {} +#[doc = "Field `MODE0` reader - MODE n"] +pub type Mode0R = crate::FieldReader; +impl Mode0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE0_A { + pub const fn variant(&self) -> Mode0 { match self.bits { - 0 => MODE0_A::DISABLED, - 1 => MODE0_A::INPUT, - 2 => MODE0_A::INPUTPULL, - 3 => MODE0_A::INPUTPULLFILTER, - 4 => MODE0_A::PUSHPULL, - 5 => MODE0_A::PUSHPULLALT, - 6 => MODE0_A::WIREDOR, - 7 => MODE0_A::WIREDORPULLDOWN, - 8 => MODE0_A::WIREDAND, - 9 => MODE0_A::WIREDANDFILTER, - 10 => MODE0_A::WIREDANDPULLUP, - 11 => MODE0_A::WIREDANDPULLUPFILTER, - 12 => MODE0_A::WIREDANDALT, - 13 => MODE0_A::WIREDANDALTFILTER, - 14 => MODE0_A::WIREDANDALTPULLUP, - 15 => MODE0_A::WIREDANDALTPULLUPFILTER, + 0 => Mode0::Disabled, + 1 => Mode0::Input, + 2 => Mode0::Inputpull, + 3 => Mode0::Inputpullfilter, + 4 => Mode0::Pushpull, + 5 => Mode0::Pushpullalt, + 6 => Mode0::Wiredor, + 7 => Mode0::Wiredorpulldown, + 8 => Mode0::Wiredand, + 9 => Mode0::Wiredandfilter, + 10 => Mode0::Wiredandpullup, + 11 => Mode0::Wiredandpullupfilter, + 12 => Mode0::Wiredandalt, + 13 => Mode0::Wiredandaltfilter, + 14 => Mode0::Wiredandaltpullup, + 15 => Mode0::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE0_A::DISABLED + *self == Mode0::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE0_A::INPUT + *self == Mode0::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE0_A::INPUTPULL + *self == Mode0::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE0_A::INPUTPULLFILTER + *self == Mode0::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE0_A::PUSHPULL + *self == Mode0::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE0_A::PUSHPULLALT + *self == Mode0::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE0_A::WIREDOR + *self == Mode0::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE0_A::WIREDORPULLDOWN + *self == Mode0::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE0_A::WIREDAND + *self == Mode0::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE0_A::WIREDANDFILTER + *self == Mode0::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE0_A::WIREDANDPULLUP + *self == Mode0::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE0_A::WIREDANDPULLUPFILTER + *self == Mode0::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE0_A::WIREDANDALT + *self == Mode0::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE0_A::WIREDANDALTFILTER + *self == Mode0::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE0_A::WIREDANDALTPULLUP + *self == Mode0::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE0_A::WIREDANDALTPULLUPFILTER + *self == Mode0::Wiredandaltpullupfilter } } #[doc = "Field `MODE0` writer - MODE n"] -pub type MODE0_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTC_MODEH_SPEC, u8, MODE0_A, 4, O>; -impl<'a, const O: u8> MODE0_W<'a, O> { +pub type Mode0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode0, crate::Safe>; +impl<'a, REG> Mode0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE0_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode0::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE0_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode0::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE0_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode0::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE0_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE0_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode0::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE0_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode0::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE0_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE0_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE0_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE1` reader - MODE n"] -pub type MODE1_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE1_A { +pub enum Mode1 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE1_A) -> Self { + fn from(variant: Mode1) -> Self { variant as _ } } -impl MODE1_R { +impl crate::FieldSpec for Mode1 { + type Ux = u8; +} +impl crate::IsEnum for Mode1 {} +#[doc = "Field `MODE1` reader - MODE n"] +pub type Mode1R = crate::FieldReader; +impl Mode1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE1_A { + pub const fn variant(&self) -> Mode1 { match self.bits { - 0 => MODE1_A::DISABLED, - 1 => MODE1_A::INPUT, - 2 => MODE1_A::INPUTPULL, - 3 => MODE1_A::INPUTPULLFILTER, - 4 => MODE1_A::PUSHPULL, - 5 => MODE1_A::PUSHPULLALT, - 6 => MODE1_A::WIREDOR, - 7 => MODE1_A::WIREDORPULLDOWN, - 8 => MODE1_A::WIREDAND, - 9 => MODE1_A::WIREDANDFILTER, - 10 => MODE1_A::WIREDANDPULLUP, - 11 => MODE1_A::WIREDANDPULLUPFILTER, - 12 => MODE1_A::WIREDANDALT, - 13 => MODE1_A::WIREDANDALTFILTER, - 14 => MODE1_A::WIREDANDALTPULLUP, - 15 => MODE1_A::WIREDANDALTPULLUPFILTER, + 0 => Mode1::Disabled, + 1 => Mode1::Input, + 2 => Mode1::Inputpull, + 3 => Mode1::Inputpullfilter, + 4 => Mode1::Pushpull, + 5 => Mode1::Pushpullalt, + 6 => Mode1::Wiredor, + 7 => Mode1::Wiredorpulldown, + 8 => Mode1::Wiredand, + 9 => Mode1::Wiredandfilter, + 10 => Mode1::Wiredandpullup, + 11 => Mode1::Wiredandpullupfilter, + 12 => Mode1::Wiredandalt, + 13 => Mode1::Wiredandaltfilter, + 14 => Mode1::Wiredandaltpullup, + 15 => Mode1::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE1_A::DISABLED + *self == Mode1::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE1_A::INPUT + *self == Mode1::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE1_A::INPUTPULL + *self == Mode1::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE1_A::INPUTPULLFILTER + *self == Mode1::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE1_A::PUSHPULL + *self == Mode1::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE1_A::PUSHPULLALT + *self == Mode1::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE1_A::WIREDOR + *self == Mode1::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE1_A::WIREDORPULLDOWN + *self == Mode1::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE1_A::WIREDAND + *self == Mode1::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE1_A::WIREDANDFILTER + *self == Mode1::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE1_A::WIREDANDPULLUP + *self == Mode1::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE1_A::WIREDANDPULLUPFILTER + *self == Mode1::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE1_A::WIREDANDALT + *self == Mode1::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE1_A::WIREDANDALTFILTER + *self == Mode1::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE1_A::WIREDANDALTPULLUP + *self == Mode1::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE1_A::WIREDANDALTPULLUPFILTER + *self == Mode1::Wiredandaltpullupfilter } } #[doc = "Field `MODE1` writer - MODE n"] -pub type MODE1_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTC_MODEH_SPEC, u8, MODE1_A, 4, O>; -impl<'a, const O: u8> MODE1_W<'a, O> { +pub type Mode1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode1, crate::Safe>; +impl<'a, REG> Mode1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE1_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode1::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE1_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode1::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE1_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode1::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE1_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE1_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode1::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE1_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode1::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE1_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE1_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE1_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltpullupfilter) } } impl R { #[doc = "Bits 0:3 - MODE n"] #[inline(always)] - pub fn mode0(&self) -> MODE0_R { - MODE0_R::new((self.bits & 0x0f) as u8) + pub fn mode0(&self) -> Mode0R { + Mode0R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - MODE n"] #[inline(always)] - pub fn mode1(&self) -> MODE1_R { - MODE1_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn mode1(&self) -> Mode1R { + Mode1R::new(((self.bits >> 4) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - MODE n"] #[inline(always)] #[must_use] - pub fn mode0(&mut self) -> MODE0_W<0> { - MODE0_W::new(self) + pub fn mode0(&mut self) -> Mode0W { + Mode0W::new(self, 0) } #[doc = "Bits 4:7 - MODE n"] #[inline(always)] #[must_use] - pub fn mode1(&mut self) -> MODE1_W<4> { - MODE1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn mode1(&mut self) -> Mode1W { + Mode1W::new(self, 4) } } -#[doc = "mode high\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portc_modeh](index.html) module"] -pub struct PORTC_MODEH_SPEC; -impl crate::RegisterSpec for PORTC_MODEH_SPEC { +#[doc = "mode high\n\nYou can [`read`](crate::Reg::read) this register and get [`portc_modeh::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portc_modeh::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortcModehSpec; +impl crate::RegisterSpec for PortcModehSpec { type Ux = u32; } -#[doc = "`read()` method returns [portc_modeh::R](R) reader structure"] -impl crate::Readable for PORTC_MODEH_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [portc_modeh::W](W) writer structure"] -impl crate::Writable for PORTC_MODEH_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`portc_modeh::R`](R) reader structure"] +impl crate::Readable for PortcModehSpec {} +#[doc = "`write(|w| ..)` method takes [`portc_modeh::W`](W) writer structure"] +impl crate::Writable for PortcModehSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTC_MODEH to value 0"] -impl crate::Resettable for PORTC_MODEH_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortcModehSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portc_model.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portc_model.rs index 2f6fad2..a66b973 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portc_model.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portc_model.rs @@ -1,2033 +1,2049 @@ #[doc = "Register `PORTC_MODEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTC_MODEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE0` reader - MODE n"] -pub type MODE0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE0_A { +pub enum Mode0 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE0_A) -> Self { + fn from(variant: Mode0) -> Self { variant as _ } } -impl MODE0_R { +impl crate::FieldSpec for Mode0 { + type Ux = u8; +} +impl crate::IsEnum for Mode0 {} +#[doc = "Field `MODE0` reader - MODE n"] +pub type Mode0R = crate::FieldReader; +impl Mode0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE0_A { + pub const fn variant(&self) -> Mode0 { match self.bits { - 0 => MODE0_A::DISABLED, - 1 => MODE0_A::INPUT, - 2 => MODE0_A::INPUTPULL, - 3 => MODE0_A::INPUTPULLFILTER, - 4 => MODE0_A::PUSHPULL, - 5 => MODE0_A::PUSHPULLALT, - 6 => MODE0_A::WIREDOR, - 7 => MODE0_A::WIREDORPULLDOWN, - 8 => MODE0_A::WIREDAND, - 9 => MODE0_A::WIREDANDFILTER, - 10 => MODE0_A::WIREDANDPULLUP, - 11 => MODE0_A::WIREDANDPULLUPFILTER, - 12 => MODE0_A::WIREDANDALT, - 13 => MODE0_A::WIREDANDALTFILTER, - 14 => MODE0_A::WIREDANDALTPULLUP, - 15 => MODE0_A::WIREDANDALTPULLUPFILTER, + 0 => Mode0::Disabled, + 1 => Mode0::Input, + 2 => Mode0::Inputpull, + 3 => Mode0::Inputpullfilter, + 4 => Mode0::Pushpull, + 5 => Mode0::Pushpullalt, + 6 => Mode0::Wiredor, + 7 => Mode0::Wiredorpulldown, + 8 => Mode0::Wiredand, + 9 => Mode0::Wiredandfilter, + 10 => Mode0::Wiredandpullup, + 11 => Mode0::Wiredandpullupfilter, + 12 => Mode0::Wiredandalt, + 13 => Mode0::Wiredandaltfilter, + 14 => Mode0::Wiredandaltpullup, + 15 => Mode0::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE0_A::DISABLED + *self == Mode0::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE0_A::INPUT + *self == Mode0::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE0_A::INPUTPULL + *self == Mode0::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE0_A::INPUTPULLFILTER + *self == Mode0::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE0_A::PUSHPULL + *self == Mode0::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE0_A::PUSHPULLALT + *self == Mode0::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE0_A::WIREDOR + *self == Mode0::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE0_A::WIREDORPULLDOWN + *self == Mode0::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE0_A::WIREDAND + *self == Mode0::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE0_A::WIREDANDFILTER + *self == Mode0::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE0_A::WIREDANDPULLUP + *self == Mode0::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE0_A::WIREDANDPULLUPFILTER + *self == Mode0::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE0_A::WIREDANDALT + *self == Mode0::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE0_A::WIREDANDALTFILTER + *self == Mode0::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE0_A::WIREDANDALTPULLUP + *self == Mode0::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE0_A::WIREDANDALTPULLUPFILTER + *self == Mode0::Wiredandaltpullupfilter } } #[doc = "Field `MODE0` writer - MODE n"] -pub type MODE0_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTC_MODEL_SPEC, u8, MODE0_A, 4, O>; -impl<'a, const O: u8> MODE0_W<'a, O> { +pub type Mode0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode0, crate::Safe>; +impl<'a, REG> Mode0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE0_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode0::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE0_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode0::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE0_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode0::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE0_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE0_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode0::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE0_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode0::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE0_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE0_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE0_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE1` reader - MODE n"] -pub type MODE1_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE1_A { +pub enum Mode1 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE1_A) -> Self { + fn from(variant: Mode1) -> Self { variant as _ } } -impl MODE1_R { +impl crate::FieldSpec for Mode1 { + type Ux = u8; +} +impl crate::IsEnum for Mode1 {} +#[doc = "Field `MODE1` reader - MODE n"] +pub type Mode1R = crate::FieldReader; +impl Mode1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE1_A { + pub const fn variant(&self) -> Mode1 { match self.bits { - 0 => MODE1_A::DISABLED, - 1 => MODE1_A::INPUT, - 2 => MODE1_A::INPUTPULL, - 3 => MODE1_A::INPUTPULLFILTER, - 4 => MODE1_A::PUSHPULL, - 5 => MODE1_A::PUSHPULLALT, - 6 => MODE1_A::WIREDOR, - 7 => MODE1_A::WIREDORPULLDOWN, - 8 => MODE1_A::WIREDAND, - 9 => MODE1_A::WIREDANDFILTER, - 10 => MODE1_A::WIREDANDPULLUP, - 11 => MODE1_A::WIREDANDPULLUPFILTER, - 12 => MODE1_A::WIREDANDALT, - 13 => MODE1_A::WIREDANDALTFILTER, - 14 => MODE1_A::WIREDANDALTPULLUP, - 15 => MODE1_A::WIREDANDALTPULLUPFILTER, + 0 => Mode1::Disabled, + 1 => Mode1::Input, + 2 => Mode1::Inputpull, + 3 => Mode1::Inputpullfilter, + 4 => Mode1::Pushpull, + 5 => Mode1::Pushpullalt, + 6 => Mode1::Wiredor, + 7 => Mode1::Wiredorpulldown, + 8 => Mode1::Wiredand, + 9 => Mode1::Wiredandfilter, + 10 => Mode1::Wiredandpullup, + 11 => Mode1::Wiredandpullupfilter, + 12 => Mode1::Wiredandalt, + 13 => Mode1::Wiredandaltfilter, + 14 => Mode1::Wiredandaltpullup, + 15 => Mode1::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE1_A::DISABLED + *self == Mode1::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE1_A::INPUT + *self == Mode1::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE1_A::INPUTPULL + *self == Mode1::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE1_A::INPUTPULLFILTER + *self == Mode1::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE1_A::PUSHPULL + *self == Mode1::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE1_A::PUSHPULLALT + *self == Mode1::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE1_A::WIREDOR + *self == Mode1::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE1_A::WIREDORPULLDOWN + *self == Mode1::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE1_A::WIREDAND + *self == Mode1::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE1_A::WIREDANDFILTER + *self == Mode1::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE1_A::WIREDANDPULLUP + *self == Mode1::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE1_A::WIREDANDPULLUPFILTER + *self == Mode1::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE1_A::WIREDANDALT + *self == Mode1::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE1_A::WIREDANDALTFILTER + *self == Mode1::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE1_A::WIREDANDALTPULLUP + *self == Mode1::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE1_A::WIREDANDALTPULLUPFILTER + *self == Mode1::Wiredandaltpullupfilter } } #[doc = "Field `MODE1` writer - MODE n"] -pub type MODE1_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTC_MODEL_SPEC, u8, MODE1_A, 4, O>; -impl<'a, const O: u8> MODE1_W<'a, O> { +pub type Mode1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode1, crate::Safe>; +impl<'a, REG> Mode1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE1_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode1::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE1_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode1::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE1_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode1::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE1_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE1_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode1::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE1_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode1::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE1_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE1_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE1_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE2` reader - MODE n"] -pub type MODE2_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE2_A { +pub enum Mode2 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE2_A) -> Self { + fn from(variant: Mode2) -> Self { variant as _ } } -impl MODE2_R { +impl crate::FieldSpec for Mode2 { + type Ux = u8; +} +impl crate::IsEnum for Mode2 {} +#[doc = "Field `MODE2` reader - MODE n"] +pub type Mode2R = crate::FieldReader; +impl Mode2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE2_A { + pub const fn variant(&self) -> Mode2 { match self.bits { - 0 => MODE2_A::DISABLED, - 1 => MODE2_A::INPUT, - 2 => MODE2_A::INPUTPULL, - 3 => MODE2_A::INPUTPULLFILTER, - 4 => MODE2_A::PUSHPULL, - 5 => MODE2_A::PUSHPULLALT, - 6 => MODE2_A::WIREDOR, - 7 => MODE2_A::WIREDORPULLDOWN, - 8 => MODE2_A::WIREDAND, - 9 => MODE2_A::WIREDANDFILTER, - 10 => MODE2_A::WIREDANDPULLUP, - 11 => MODE2_A::WIREDANDPULLUPFILTER, - 12 => MODE2_A::WIREDANDALT, - 13 => MODE2_A::WIREDANDALTFILTER, - 14 => MODE2_A::WIREDANDALTPULLUP, - 15 => MODE2_A::WIREDANDALTPULLUPFILTER, + 0 => Mode2::Disabled, + 1 => Mode2::Input, + 2 => Mode2::Inputpull, + 3 => Mode2::Inputpullfilter, + 4 => Mode2::Pushpull, + 5 => Mode2::Pushpullalt, + 6 => Mode2::Wiredor, + 7 => Mode2::Wiredorpulldown, + 8 => Mode2::Wiredand, + 9 => Mode2::Wiredandfilter, + 10 => Mode2::Wiredandpullup, + 11 => Mode2::Wiredandpullupfilter, + 12 => Mode2::Wiredandalt, + 13 => Mode2::Wiredandaltfilter, + 14 => Mode2::Wiredandaltpullup, + 15 => Mode2::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE2_A::DISABLED + *self == Mode2::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE2_A::INPUT + *self == Mode2::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE2_A::INPUTPULL + *self == Mode2::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE2_A::INPUTPULLFILTER + *self == Mode2::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE2_A::PUSHPULL + *self == Mode2::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE2_A::PUSHPULLALT + *self == Mode2::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE2_A::WIREDOR + *self == Mode2::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE2_A::WIREDORPULLDOWN + *self == Mode2::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE2_A::WIREDAND + *self == Mode2::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE2_A::WIREDANDFILTER + *self == Mode2::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE2_A::WIREDANDPULLUP + *self == Mode2::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE2_A::WIREDANDPULLUPFILTER + *self == Mode2::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE2_A::WIREDANDALT + *self == Mode2::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE2_A::WIREDANDALTFILTER + *self == Mode2::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE2_A::WIREDANDALTPULLUP + *self == Mode2::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE2_A::WIREDANDALTPULLUPFILTER + *self == Mode2::Wiredandaltpullupfilter } } #[doc = "Field `MODE2` writer - MODE n"] -pub type MODE2_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTC_MODEL_SPEC, u8, MODE2_A, 4, O>; -impl<'a, const O: u8> MODE2_W<'a, O> { +pub type Mode2W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode2, crate::Safe>; +impl<'a, REG> Mode2W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE2_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode2::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE2_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode2::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE2_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode2::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE2_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE2_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode2::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE2_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode2::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE2_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE2_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE2_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE3` reader - MODE n"] -pub type MODE3_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE3_A { +pub enum Mode3 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE3_A) -> Self { + fn from(variant: Mode3) -> Self { variant as _ } } -impl MODE3_R { +impl crate::FieldSpec for Mode3 { + type Ux = u8; +} +impl crate::IsEnum for Mode3 {} +#[doc = "Field `MODE3` reader - MODE n"] +pub type Mode3R = crate::FieldReader; +impl Mode3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE3_A { + pub const fn variant(&self) -> Mode3 { match self.bits { - 0 => MODE3_A::DISABLED, - 1 => MODE3_A::INPUT, - 2 => MODE3_A::INPUTPULL, - 3 => MODE3_A::INPUTPULLFILTER, - 4 => MODE3_A::PUSHPULL, - 5 => MODE3_A::PUSHPULLALT, - 6 => MODE3_A::WIREDOR, - 7 => MODE3_A::WIREDORPULLDOWN, - 8 => MODE3_A::WIREDAND, - 9 => MODE3_A::WIREDANDFILTER, - 10 => MODE3_A::WIREDANDPULLUP, - 11 => MODE3_A::WIREDANDPULLUPFILTER, - 12 => MODE3_A::WIREDANDALT, - 13 => MODE3_A::WIREDANDALTFILTER, - 14 => MODE3_A::WIREDANDALTPULLUP, - 15 => MODE3_A::WIREDANDALTPULLUPFILTER, + 0 => Mode3::Disabled, + 1 => Mode3::Input, + 2 => Mode3::Inputpull, + 3 => Mode3::Inputpullfilter, + 4 => Mode3::Pushpull, + 5 => Mode3::Pushpullalt, + 6 => Mode3::Wiredor, + 7 => Mode3::Wiredorpulldown, + 8 => Mode3::Wiredand, + 9 => Mode3::Wiredandfilter, + 10 => Mode3::Wiredandpullup, + 11 => Mode3::Wiredandpullupfilter, + 12 => Mode3::Wiredandalt, + 13 => Mode3::Wiredandaltfilter, + 14 => Mode3::Wiredandaltpullup, + 15 => Mode3::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE3_A::DISABLED + *self == Mode3::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE3_A::INPUT + *self == Mode3::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE3_A::INPUTPULL + *self == Mode3::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE3_A::INPUTPULLFILTER + *self == Mode3::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE3_A::PUSHPULL + *self == Mode3::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE3_A::PUSHPULLALT + *self == Mode3::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE3_A::WIREDOR + *self == Mode3::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE3_A::WIREDORPULLDOWN + *self == Mode3::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE3_A::WIREDAND + *self == Mode3::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE3_A::WIREDANDFILTER + *self == Mode3::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE3_A::WIREDANDPULLUP + *self == Mode3::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE3_A::WIREDANDPULLUPFILTER + *self == Mode3::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE3_A::WIREDANDALT + *self == Mode3::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE3_A::WIREDANDALTFILTER + *self == Mode3::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE3_A::WIREDANDALTPULLUP + *self == Mode3::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE3_A::WIREDANDALTPULLUPFILTER + *self == Mode3::Wiredandaltpullupfilter } } #[doc = "Field `MODE3` writer - MODE n"] -pub type MODE3_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTC_MODEL_SPEC, u8, MODE3_A, 4, O>; -impl<'a, const O: u8> MODE3_W<'a, O> { +pub type Mode3W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode3, crate::Safe>; +impl<'a, REG> Mode3W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE3_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode3::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE3_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode3::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE3_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode3::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE3_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE3_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode3::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE3_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode3::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE3_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE3_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE3_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE4` reader - MODE n"] -pub type MODE4_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE4_A { +pub enum Mode4 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE4_A) -> Self { + fn from(variant: Mode4) -> Self { variant as _ } } -impl MODE4_R { +impl crate::FieldSpec for Mode4 { + type Ux = u8; +} +impl crate::IsEnum for Mode4 {} +#[doc = "Field `MODE4` reader - MODE n"] +pub type Mode4R = crate::FieldReader; +impl Mode4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE4_A { + pub const fn variant(&self) -> Mode4 { match self.bits { - 0 => MODE4_A::DISABLED, - 1 => MODE4_A::INPUT, - 2 => MODE4_A::INPUTPULL, - 3 => MODE4_A::INPUTPULLFILTER, - 4 => MODE4_A::PUSHPULL, - 5 => MODE4_A::PUSHPULLALT, - 6 => MODE4_A::WIREDOR, - 7 => MODE4_A::WIREDORPULLDOWN, - 8 => MODE4_A::WIREDAND, - 9 => MODE4_A::WIREDANDFILTER, - 10 => MODE4_A::WIREDANDPULLUP, - 11 => MODE4_A::WIREDANDPULLUPFILTER, - 12 => MODE4_A::WIREDANDALT, - 13 => MODE4_A::WIREDANDALTFILTER, - 14 => MODE4_A::WIREDANDALTPULLUP, - 15 => MODE4_A::WIREDANDALTPULLUPFILTER, + 0 => Mode4::Disabled, + 1 => Mode4::Input, + 2 => Mode4::Inputpull, + 3 => Mode4::Inputpullfilter, + 4 => Mode4::Pushpull, + 5 => Mode4::Pushpullalt, + 6 => Mode4::Wiredor, + 7 => Mode4::Wiredorpulldown, + 8 => Mode4::Wiredand, + 9 => Mode4::Wiredandfilter, + 10 => Mode4::Wiredandpullup, + 11 => Mode4::Wiredandpullupfilter, + 12 => Mode4::Wiredandalt, + 13 => Mode4::Wiredandaltfilter, + 14 => Mode4::Wiredandaltpullup, + 15 => Mode4::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE4_A::DISABLED + *self == Mode4::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE4_A::INPUT + *self == Mode4::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE4_A::INPUTPULL + *self == Mode4::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE4_A::INPUTPULLFILTER + *self == Mode4::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE4_A::PUSHPULL + *self == Mode4::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE4_A::PUSHPULLALT + *self == Mode4::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE4_A::WIREDOR + *self == Mode4::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE4_A::WIREDORPULLDOWN + *self == Mode4::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE4_A::WIREDAND + *self == Mode4::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE4_A::WIREDANDFILTER + *self == Mode4::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE4_A::WIREDANDPULLUP + *self == Mode4::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE4_A::WIREDANDPULLUPFILTER + *self == Mode4::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE4_A::WIREDANDALT + *self == Mode4::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE4_A::WIREDANDALTFILTER + *self == Mode4::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE4_A::WIREDANDALTPULLUP + *self == Mode4::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE4_A::WIREDANDALTPULLUPFILTER + *self == Mode4::Wiredandaltpullupfilter } } #[doc = "Field `MODE4` writer - MODE n"] -pub type MODE4_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTC_MODEL_SPEC, u8, MODE4_A, 4, O>; -impl<'a, const O: u8> MODE4_W<'a, O> { +pub type Mode4W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode4, crate::Safe>; +impl<'a, REG> Mode4W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE4_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode4::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE4_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode4::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE4_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode4::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE4_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE4_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode4::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE4_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode4::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE4_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE4_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE4_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE5` reader - MODE n"] -pub type MODE5_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE5_A { +pub enum Mode5 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE5_A) -> Self { + fn from(variant: Mode5) -> Self { variant as _ } } -impl MODE5_R { +impl crate::FieldSpec for Mode5 { + type Ux = u8; +} +impl crate::IsEnum for Mode5 {} +#[doc = "Field `MODE5` reader - MODE n"] +pub type Mode5R = crate::FieldReader; +impl Mode5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE5_A { + pub const fn variant(&self) -> Mode5 { match self.bits { - 0 => MODE5_A::DISABLED, - 1 => MODE5_A::INPUT, - 2 => MODE5_A::INPUTPULL, - 3 => MODE5_A::INPUTPULLFILTER, - 4 => MODE5_A::PUSHPULL, - 5 => MODE5_A::PUSHPULLALT, - 6 => MODE5_A::WIREDOR, - 7 => MODE5_A::WIREDORPULLDOWN, - 8 => MODE5_A::WIREDAND, - 9 => MODE5_A::WIREDANDFILTER, - 10 => MODE5_A::WIREDANDPULLUP, - 11 => MODE5_A::WIREDANDPULLUPFILTER, - 12 => MODE5_A::WIREDANDALT, - 13 => MODE5_A::WIREDANDALTFILTER, - 14 => MODE5_A::WIREDANDALTPULLUP, - 15 => MODE5_A::WIREDANDALTPULLUPFILTER, + 0 => Mode5::Disabled, + 1 => Mode5::Input, + 2 => Mode5::Inputpull, + 3 => Mode5::Inputpullfilter, + 4 => Mode5::Pushpull, + 5 => Mode5::Pushpullalt, + 6 => Mode5::Wiredor, + 7 => Mode5::Wiredorpulldown, + 8 => Mode5::Wiredand, + 9 => Mode5::Wiredandfilter, + 10 => Mode5::Wiredandpullup, + 11 => Mode5::Wiredandpullupfilter, + 12 => Mode5::Wiredandalt, + 13 => Mode5::Wiredandaltfilter, + 14 => Mode5::Wiredandaltpullup, + 15 => Mode5::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE5_A::DISABLED + *self == Mode5::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE5_A::INPUT + *self == Mode5::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE5_A::INPUTPULL + *self == Mode5::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE5_A::INPUTPULLFILTER + *self == Mode5::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE5_A::PUSHPULL + *self == Mode5::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE5_A::PUSHPULLALT + *self == Mode5::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE5_A::WIREDOR + *self == Mode5::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE5_A::WIREDORPULLDOWN + *self == Mode5::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE5_A::WIREDAND + *self == Mode5::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE5_A::WIREDANDFILTER + *self == Mode5::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE5_A::WIREDANDPULLUP + *self == Mode5::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE5_A::WIREDANDPULLUPFILTER + *self == Mode5::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE5_A::WIREDANDALT + *self == Mode5::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE5_A::WIREDANDALTFILTER + *self == Mode5::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE5_A::WIREDANDALTPULLUP + *self == Mode5::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE5_A::WIREDANDALTPULLUPFILTER + *self == Mode5::Wiredandaltpullupfilter } } #[doc = "Field `MODE5` writer - MODE n"] -pub type MODE5_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTC_MODEL_SPEC, u8, MODE5_A, 4, O>; -impl<'a, const O: u8> MODE5_W<'a, O> { +pub type Mode5W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode5, crate::Safe>; +impl<'a, REG> Mode5W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE5_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode5::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE5_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode5::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE5_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode5::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE5_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE5_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode5::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE5_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode5::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE5_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE5_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE5_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE6` reader - MODE n"] -pub type MODE6_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE6_A { +pub enum Mode6 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE6_A) -> Self { + fn from(variant: Mode6) -> Self { variant as _ } } -impl MODE6_R { +impl crate::FieldSpec for Mode6 { + type Ux = u8; +} +impl crate::IsEnum for Mode6 {} +#[doc = "Field `MODE6` reader - MODE n"] +pub type Mode6R = crate::FieldReader; +impl Mode6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE6_A { + pub const fn variant(&self) -> Mode6 { match self.bits { - 0 => MODE6_A::DISABLED, - 1 => MODE6_A::INPUT, - 2 => MODE6_A::INPUTPULL, - 3 => MODE6_A::INPUTPULLFILTER, - 4 => MODE6_A::PUSHPULL, - 5 => MODE6_A::PUSHPULLALT, - 6 => MODE6_A::WIREDOR, - 7 => MODE6_A::WIREDORPULLDOWN, - 8 => MODE6_A::WIREDAND, - 9 => MODE6_A::WIREDANDFILTER, - 10 => MODE6_A::WIREDANDPULLUP, - 11 => MODE6_A::WIREDANDPULLUPFILTER, - 12 => MODE6_A::WIREDANDALT, - 13 => MODE6_A::WIREDANDALTFILTER, - 14 => MODE6_A::WIREDANDALTPULLUP, - 15 => MODE6_A::WIREDANDALTPULLUPFILTER, + 0 => Mode6::Disabled, + 1 => Mode6::Input, + 2 => Mode6::Inputpull, + 3 => Mode6::Inputpullfilter, + 4 => Mode6::Pushpull, + 5 => Mode6::Pushpullalt, + 6 => Mode6::Wiredor, + 7 => Mode6::Wiredorpulldown, + 8 => Mode6::Wiredand, + 9 => Mode6::Wiredandfilter, + 10 => Mode6::Wiredandpullup, + 11 => Mode6::Wiredandpullupfilter, + 12 => Mode6::Wiredandalt, + 13 => Mode6::Wiredandaltfilter, + 14 => Mode6::Wiredandaltpullup, + 15 => Mode6::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE6_A::DISABLED + *self == Mode6::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE6_A::INPUT + *self == Mode6::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE6_A::INPUTPULL + *self == Mode6::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE6_A::INPUTPULLFILTER + *self == Mode6::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE6_A::PUSHPULL + *self == Mode6::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE6_A::PUSHPULLALT + *self == Mode6::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE6_A::WIREDOR + *self == Mode6::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE6_A::WIREDORPULLDOWN + *self == Mode6::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE6_A::WIREDAND + *self == Mode6::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE6_A::WIREDANDFILTER + *self == Mode6::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE6_A::WIREDANDPULLUP + *self == Mode6::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE6_A::WIREDANDPULLUPFILTER + *self == Mode6::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE6_A::WIREDANDALT + *self == Mode6::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE6_A::WIREDANDALTFILTER + *self == Mode6::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE6_A::WIREDANDALTPULLUP + *self == Mode6::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE6_A::WIREDANDALTPULLUPFILTER + *self == Mode6::Wiredandaltpullupfilter } } #[doc = "Field `MODE6` writer - MODE n"] -pub type MODE6_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTC_MODEL_SPEC, u8, MODE6_A, 4, O>; -impl<'a, const O: u8> MODE6_W<'a, O> { +pub type Mode6W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode6, crate::Safe>; +impl<'a, REG> Mode6W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE6_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode6::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE6_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode6::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE6_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode6::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE6_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE6_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode6::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE6_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode6::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE6_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE6_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE6_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE6_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode6::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE7` reader - MODE n"] -pub type MODE7_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE7_A { +pub enum Mode7 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE7_A) -> Self { + fn from(variant: Mode7) -> Self { variant as _ } } -impl MODE7_R { +impl crate::FieldSpec for Mode7 { + type Ux = u8; +} +impl crate::IsEnum for Mode7 {} +#[doc = "Field `MODE7` reader - MODE n"] +pub type Mode7R = crate::FieldReader; +impl Mode7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE7_A { + pub const fn variant(&self) -> Mode7 { match self.bits { - 0 => MODE7_A::DISABLED, - 1 => MODE7_A::INPUT, - 2 => MODE7_A::INPUTPULL, - 3 => MODE7_A::INPUTPULLFILTER, - 4 => MODE7_A::PUSHPULL, - 5 => MODE7_A::PUSHPULLALT, - 6 => MODE7_A::WIREDOR, - 7 => MODE7_A::WIREDORPULLDOWN, - 8 => MODE7_A::WIREDAND, - 9 => MODE7_A::WIREDANDFILTER, - 10 => MODE7_A::WIREDANDPULLUP, - 11 => MODE7_A::WIREDANDPULLUPFILTER, - 12 => MODE7_A::WIREDANDALT, - 13 => MODE7_A::WIREDANDALTFILTER, - 14 => MODE7_A::WIREDANDALTPULLUP, - 15 => MODE7_A::WIREDANDALTPULLUPFILTER, + 0 => Mode7::Disabled, + 1 => Mode7::Input, + 2 => Mode7::Inputpull, + 3 => Mode7::Inputpullfilter, + 4 => Mode7::Pushpull, + 5 => Mode7::Pushpullalt, + 6 => Mode7::Wiredor, + 7 => Mode7::Wiredorpulldown, + 8 => Mode7::Wiredand, + 9 => Mode7::Wiredandfilter, + 10 => Mode7::Wiredandpullup, + 11 => Mode7::Wiredandpullupfilter, + 12 => Mode7::Wiredandalt, + 13 => Mode7::Wiredandaltfilter, + 14 => Mode7::Wiredandaltpullup, + 15 => Mode7::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE7_A::DISABLED + *self == Mode7::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE7_A::INPUT + *self == Mode7::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE7_A::INPUTPULL + *self == Mode7::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE7_A::INPUTPULLFILTER + *self == Mode7::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE7_A::PUSHPULL + *self == Mode7::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE7_A::PUSHPULLALT + *self == Mode7::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE7_A::WIREDOR + *self == Mode7::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE7_A::WIREDORPULLDOWN + *self == Mode7::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE7_A::WIREDAND + *self == Mode7::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE7_A::WIREDANDFILTER + *self == Mode7::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE7_A::WIREDANDPULLUP + *self == Mode7::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE7_A::WIREDANDPULLUPFILTER + *self == Mode7::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE7_A::WIREDANDALT + *self == Mode7::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE7_A::WIREDANDALTFILTER + *self == Mode7::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE7_A::WIREDANDALTPULLUP + *self == Mode7::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE7_A::WIREDANDALTPULLUPFILTER + *self == Mode7::Wiredandaltpullupfilter } } #[doc = "Field `MODE7` writer - MODE n"] -pub type MODE7_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTC_MODEL_SPEC, u8, MODE7_A, 4, O>; -impl<'a, const O: u8> MODE7_W<'a, O> { +pub type Mode7W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode7, crate::Safe>; +impl<'a, REG> Mode7W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE7_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode7::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE7_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode7::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE7_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode7::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE7_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode7::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE7_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode7::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE7_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode7::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE7_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE7_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE7_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE7_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode7::Wiredandaltpullupfilter) } } impl R { #[doc = "Bits 0:3 - MODE n"] #[inline(always)] - pub fn mode0(&self) -> MODE0_R { - MODE0_R::new((self.bits & 0x0f) as u8) + pub fn mode0(&self) -> Mode0R { + Mode0R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - MODE n"] #[inline(always)] - pub fn mode1(&self) -> MODE1_R { - MODE1_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn mode1(&self) -> Mode1R { + Mode1R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - MODE n"] #[inline(always)] - pub fn mode2(&self) -> MODE2_R { - MODE2_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn mode2(&self) -> Mode2R { + Mode2R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - MODE n"] #[inline(always)] - pub fn mode3(&self) -> MODE3_R { - MODE3_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn mode3(&self) -> Mode3R { + Mode3R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:19 - MODE n"] #[inline(always)] - pub fn mode4(&self) -> MODE4_R { - MODE4_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn mode4(&self) -> Mode4R { + Mode4R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:23 - MODE n"] #[inline(always)] - pub fn mode5(&self) -> MODE5_R { - MODE5_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn mode5(&self) -> Mode5R { + Mode5R::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:27 - MODE n"] #[inline(always)] - pub fn mode6(&self) -> MODE6_R { - MODE6_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn mode6(&self) -> Mode6R { + Mode6R::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 28:31 - MODE n"] #[inline(always)] - pub fn mode7(&self) -> MODE7_R { - MODE7_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn mode7(&self) -> Mode7R { + Mode7R::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - MODE n"] #[inline(always)] #[must_use] - pub fn mode0(&mut self) -> MODE0_W<0> { - MODE0_W::new(self) + pub fn mode0(&mut self) -> Mode0W { + Mode0W::new(self, 0) } #[doc = "Bits 4:7 - MODE n"] #[inline(always)] #[must_use] - pub fn mode1(&mut self) -> MODE1_W<4> { - MODE1_W::new(self) + pub fn mode1(&mut self) -> Mode1W { + Mode1W::new(self, 4) } #[doc = "Bits 8:11 - MODE n"] #[inline(always)] #[must_use] - pub fn mode2(&mut self) -> MODE2_W<8> { - MODE2_W::new(self) + pub fn mode2(&mut self) -> Mode2W { + Mode2W::new(self, 8) } #[doc = "Bits 12:15 - MODE n"] #[inline(always)] #[must_use] - pub fn mode3(&mut self) -> MODE3_W<12> { - MODE3_W::new(self) + pub fn mode3(&mut self) -> Mode3W { + Mode3W::new(self, 12) } #[doc = "Bits 16:19 - MODE n"] #[inline(always)] #[must_use] - pub fn mode4(&mut self) -> MODE4_W<16> { - MODE4_W::new(self) + pub fn mode4(&mut self) -> Mode4W { + Mode4W::new(self, 16) } #[doc = "Bits 20:23 - MODE n"] #[inline(always)] #[must_use] - pub fn mode5(&mut self) -> MODE5_W<20> { - MODE5_W::new(self) + pub fn mode5(&mut self) -> Mode5W { + Mode5W::new(self, 20) } #[doc = "Bits 24:27 - MODE n"] #[inline(always)] #[must_use] - pub fn mode6(&mut self) -> MODE6_W<24> { - MODE6_W::new(self) + pub fn mode6(&mut self) -> Mode6W { + Mode6W::new(self, 24) } #[doc = "Bits 28:31 - MODE n"] #[inline(always)] #[must_use] - pub fn mode7(&mut self) -> MODE7_W<28> { - MODE7_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn mode7(&mut self) -> Mode7W { + Mode7W::new(self, 28) } } -#[doc = "mode low\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portc_model](index.html) module"] -pub struct PORTC_MODEL_SPEC; -impl crate::RegisterSpec for PORTC_MODEL_SPEC { +#[doc = "mode low\n\nYou can [`read`](crate::Reg::read) this register and get [`portc_model::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portc_model::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortcModelSpec; +impl crate::RegisterSpec for PortcModelSpec { type Ux = u32; } -#[doc = "`read()` method returns [portc_model::R](R) reader structure"] -impl crate::Readable for PORTC_MODEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [portc_model::W](W) writer structure"] -impl crate::Writable for PORTC_MODEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`portc_model::R`](R) reader structure"] +impl crate::Readable for PortcModelSpec {} +#[doc = "`write(|w| ..)` method takes [`portc_model::W`](W) writer structure"] +impl crate::Writable for PortcModelSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTC_MODEL to value 0"] -impl crate::Resettable for PORTC_MODEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortcModelSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portd_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portd_ctrl.rs index 28b6bb0..c50fe69 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portd_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portd_ctrl.rs @@ -1,126 +1,85 @@ #[doc = "Register `PORTD_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTD_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SLEWRATE` reader - Slew Rate"] -pub type SLEWRATE_R = crate::FieldReader; +pub type SlewrateR = crate::FieldReader; #[doc = "Field `SLEWRATE` writer - Slew Rate"] -pub type SLEWRATE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PORTD_CTRL_SPEC, u8, u8, 3, O>; +pub type SlewrateW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `DINDIS` reader - Data In Disable"] -pub type DINDIS_R = crate::BitReader; +pub type DindisR = crate::BitReader; #[doc = "Field `DINDIS` writer - Data In Disable"] -pub type DINDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PORTD_CTRL_SPEC, bool, O>; +pub type DindisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SLEWRATEALT` reader - Slew Rate Alt"] -pub type SLEWRATEALT_R = crate::FieldReader; +pub type SlewratealtR = crate::FieldReader; #[doc = "Field `SLEWRATEALT` writer - Slew Rate Alt"] -pub type SLEWRATEALT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PORTD_CTRL_SPEC, u8, u8, 3, O>; +pub type SlewratealtW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `DINDISALT` reader - Data In Disable Alt"] -pub type DINDISALT_R = crate::BitReader; +pub type DindisaltR = crate::BitReader; #[doc = "Field `DINDISALT` writer - Data In Disable Alt"] -pub type DINDISALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, PORTD_CTRL_SPEC, bool, O>; +pub type DindisaltW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 4:6 - Slew Rate"] #[inline(always)] - pub fn slewrate(&self) -> SLEWRATE_R { - SLEWRATE_R::new(((self.bits >> 4) & 7) as u8) + pub fn slewrate(&self) -> SlewrateR { + SlewrateR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bit 12 - Data In Disable"] #[inline(always)] - pub fn dindis(&self) -> DINDIS_R { - DINDIS_R::new(((self.bits >> 12) & 1) != 0) + pub fn dindis(&self) -> DindisR { + DindisR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bits 20:22 - Slew Rate Alt"] #[inline(always)] - pub fn slewratealt(&self) -> SLEWRATEALT_R { - SLEWRATEALT_R::new(((self.bits >> 20) & 7) as u8) + pub fn slewratealt(&self) -> SlewratealtR { + SlewratealtR::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bit 28 - Data In Disable Alt"] #[inline(always)] - pub fn dindisalt(&self) -> DINDISALT_R { - DINDISALT_R::new(((self.bits >> 28) & 1) != 0) + pub fn dindisalt(&self) -> DindisaltR { + DindisaltR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bits 4:6 - Slew Rate"] #[inline(always)] #[must_use] - pub fn slewrate(&mut self) -> SLEWRATE_W<4> { - SLEWRATE_W::new(self) + pub fn slewrate(&mut self) -> SlewrateW { + SlewrateW::new(self, 4) } #[doc = "Bit 12 - Data In Disable"] #[inline(always)] #[must_use] - pub fn dindis(&mut self) -> DINDIS_W<12> { - DINDIS_W::new(self) + pub fn dindis(&mut self) -> DindisW { + DindisW::new(self, 12) } #[doc = "Bits 20:22 - Slew Rate Alt"] #[inline(always)] #[must_use] - pub fn slewratealt(&mut self) -> SLEWRATEALT_W<20> { - SLEWRATEALT_W::new(self) + pub fn slewratealt(&mut self) -> SlewratealtW { + SlewratealtW::new(self, 20) } #[doc = "Bit 28 - Data In Disable Alt"] #[inline(always)] #[must_use] - pub fn dindisalt(&mut self) -> DINDISALT_W<28> { - DINDISALT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dindisalt(&mut self) -> DindisaltW { + DindisaltW::new(self, 28) } } -#[doc = "Port control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portd_ctrl](index.html) module"] -pub struct PORTD_CTRL_SPEC; -impl crate::RegisterSpec for PORTD_CTRL_SPEC { +#[doc = "Port control\n\nYou can [`read`](crate::Reg::read) this register and get [`portd_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portd_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortdCtrlSpec; +impl crate::RegisterSpec for PortdCtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [portd_ctrl::R](R) reader structure"] -impl crate::Readable for PORTD_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [portd_ctrl::W](W) writer structure"] -impl crate::Writable for PORTD_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`portd_ctrl::R`](R) reader structure"] +impl crate::Readable for PortdCtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`portd_ctrl::W`](W) writer structure"] +impl crate::Writable for PortdCtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTD_CTRL to value 0x0040_0040"] -impl crate::Resettable for PORTD_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0040_0040; +impl crate::Resettable for PortdCtrlSpec { + const RESET_VALUE: u32 = 0x0040_0040; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portd_din.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portd_din.rs index 8eb4acd..7d67bd5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portd_din.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portd_din.rs @@ -1,37 +1,22 @@ #[doc = "Register `PORTD_DIN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DIN` reader - Data input"] -pub type DIN_R = crate::FieldReader; +pub type DinR = crate::FieldReader; impl R { #[doc = "Bits 0:5 - Data input"] #[inline(always)] - pub fn din(&self) -> DIN_R { - DIN_R::new((self.bits & 0x3f) as u8) + pub fn din(&self) -> DinR { + DinR::new((self.bits & 0x3f) as u8) } } -#[doc = "data in\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portd_din](index.html) module"] -pub struct PORTD_DIN_SPEC; -impl crate::RegisterSpec for PORTD_DIN_SPEC { +#[doc = "data in\n\nYou can [`read`](crate::Reg::read) this register and get [`portd_din::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortdDinSpec; +impl crate::RegisterSpec for PortdDinSpec { type Ux = u32; } -#[doc = "`read()` method returns [portd_din::R](R) reader structure"] -impl crate::Readable for PORTD_DIN_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`portd_din::R`](R) reader structure"] +impl crate::Readable for PortdDinSpec {} #[doc = "`reset()` method sets PORTD_DIN to value 0"] -impl crate::Resettable for PORTD_DIN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortdDinSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portd_dout.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portd_dout.rs index dbca637..4c08e8b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portd_dout.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portd_dout.rs @@ -1,80 +1,40 @@ #[doc = "Register `PORTD_DOUT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTD_DOUT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DOUT` reader - Data output"] -pub type DOUT_R = crate::FieldReader; +pub type DoutR = crate::FieldReader; #[doc = "Field `DOUT` writer - Data output"] -pub type DOUT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PORTD_DOUT_SPEC, u8, u8, 6, O>; +pub type DoutW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:5 - Data output"] #[inline(always)] - pub fn dout(&self) -> DOUT_R { - DOUT_R::new((self.bits & 0x3f) as u8) + pub fn dout(&self) -> DoutR { + DoutR::new((self.bits & 0x3f) as u8) } } impl W { #[doc = "Bits 0:5 - Data output"] #[inline(always)] #[must_use] - pub fn dout(&mut self) -> DOUT_W<0> { - DOUT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dout(&mut self) -> DoutW { + DoutW::new(self, 0) } } -#[doc = "data out\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portd_dout](index.html) module"] -pub struct PORTD_DOUT_SPEC; -impl crate::RegisterSpec for PORTD_DOUT_SPEC { +#[doc = "data out\n\nYou can [`read`](crate::Reg::read) this register and get [`portd_dout::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portd_dout::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortdDoutSpec; +impl crate::RegisterSpec for PortdDoutSpec { type Ux = u32; } -#[doc = "`read()` method returns [portd_dout::R](R) reader structure"] -impl crate::Readable for PORTD_DOUT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [portd_dout::W](W) writer structure"] -impl crate::Writable for PORTD_DOUT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`portd_dout::R`](R) reader structure"] +impl crate::Readable for PortdDoutSpec {} +#[doc = "`write(|w| ..)` method takes [`portd_dout::W`](W) writer structure"] +impl crate::Writable for PortdDoutSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTD_DOUT to value 0"] -impl crate::Resettable for PORTD_DOUT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortdDoutSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portd_model.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portd_model.rs index 21adf8e..66c5941 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portd_model.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/portd_model.rs @@ -1,1541 +1,1543 @@ #[doc = "Register `PORTD_MODEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PORTD_MODEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE0` reader - MODE n"] -pub type MODE0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE0_A { +pub enum Mode0 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE0_A) -> Self { + fn from(variant: Mode0) -> Self { variant as _ } } -impl MODE0_R { +impl crate::FieldSpec for Mode0 { + type Ux = u8; +} +impl crate::IsEnum for Mode0 {} +#[doc = "Field `MODE0` reader - MODE n"] +pub type Mode0R = crate::FieldReader; +impl Mode0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE0_A { + pub const fn variant(&self) -> Mode0 { match self.bits { - 0 => MODE0_A::DISABLED, - 1 => MODE0_A::INPUT, - 2 => MODE0_A::INPUTPULL, - 3 => MODE0_A::INPUTPULLFILTER, - 4 => MODE0_A::PUSHPULL, - 5 => MODE0_A::PUSHPULLALT, - 6 => MODE0_A::WIREDOR, - 7 => MODE0_A::WIREDORPULLDOWN, - 8 => MODE0_A::WIREDAND, - 9 => MODE0_A::WIREDANDFILTER, - 10 => MODE0_A::WIREDANDPULLUP, - 11 => MODE0_A::WIREDANDPULLUPFILTER, - 12 => MODE0_A::WIREDANDALT, - 13 => MODE0_A::WIREDANDALTFILTER, - 14 => MODE0_A::WIREDANDALTPULLUP, - 15 => MODE0_A::WIREDANDALTPULLUPFILTER, + 0 => Mode0::Disabled, + 1 => Mode0::Input, + 2 => Mode0::Inputpull, + 3 => Mode0::Inputpullfilter, + 4 => Mode0::Pushpull, + 5 => Mode0::Pushpullalt, + 6 => Mode0::Wiredor, + 7 => Mode0::Wiredorpulldown, + 8 => Mode0::Wiredand, + 9 => Mode0::Wiredandfilter, + 10 => Mode0::Wiredandpullup, + 11 => Mode0::Wiredandpullupfilter, + 12 => Mode0::Wiredandalt, + 13 => Mode0::Wiredandaltfilter, + 14 => Mode0::Wiredandaltpullup, + 15 => Mode0::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE0_A::DISABLED + *self == Mode0::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE0_A::INPUT + *self == Mode0::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE0_A::INPUTPULL + *self == Mode0::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE0_A::INPUTPULLFILTER + *self == Mode0::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE0_A::PUSHPULL + *self == Mode0::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE0_A::PUSHPULLALT + *self == Mode0::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE0_A::WIREDOR + *self == Mode0::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE0_A::WIREDORPULLDOWN + *self == Mode0::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE0_A::WIREDAND + *self == Mode0::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE0_A::WIREDANDFILTER + *self == Mode0::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE0_A::WIREDANDPULLUP + *self == Mode0::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE0_A::WIREDANDPULLUPFILTER + *self == Mode0::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE0_A::WIREDANDALT + *self == Mode0::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE0_A::WIREDANDALTFILTER + *self == Mode0::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE0_A::WIREDANDALTPULLUP + *self == Mode0::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE0_A::WIREDANDALTPULLUPFILTER + *self == Mode0::Wiredandaltpullupfilter } } #[doc = "Field `MODE0` writer - MODE n"] -pub type MODE0_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTD_MODEL_SPEC, u8, MODE0_A, 4, O>; -impl<'a, const O: u8> MODE0_W<'a, O> { +pub type Mode0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode0, crate::Safe>; +impl<'a, REG> Mode0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE0_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode0::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE0_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode0::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE0_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode0::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE0_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE0_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode0::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE0_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode0::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE0_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE0_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE0_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE0_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode0::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE1` reader - MODE n"] -pub type MODE1_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE1_A { +pub enum Mode1 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE1_A) -> Self { + fn from(variant: Mode1) -> Self { variant as _ } } -impl MODE1_R { +impl crate::FieldSpec for Mode1 { + type Ux = u8; +} +impl crate::IsEnum for Mode1 {} +#[doc = "Field `MODE1` reader - MODE n"] +pub type Mode1R = crate::FieldReader; +impl Mode1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE1_A { + pub const fn variant(&self) -> Mode1 { match self.bits { - 0 => MODE1_A::DISABLED, - 1 => MODE1_A::INPUT, - 2 => MODE1_A::INPUTPULL, - 3 => MODE1_A::INPUTPULLFILTER, - 4 => MODE1_A::PUSHPULL, - 5 => MODE1_A::PUSHPULLALT, - 6 => MODE1_A::WIREDOR, - 7 => MODE1_A::WIREDORPULLDOWN, - 8 => MODE1_A::WIREDAND, - 9 => MODE1_A::WIREDANDFILTER, - 10 => MODE1_A::WIREDANDPULLUP, - 11 => MODE1_A::WIREDANDPULLUPFILTER, - 12 => MODE1_A::WIREDANDALT, - 13 => MODE1_A::WIREDANDALTFILTER, - 14 => MODE1_A::WIREDANDALTPULLUP, - 15 => MODE1_A::WIREDANDALTPULLUPFILTER, + 0 => Mode1::Disabled, + 1 => Mode1::Input, + 2 => Mode1::Inputpull, + 3 => Mode1::Inputpullfilter, + 4 => Mode1::Pushpull, + 5 => Mode1::Pushpullalt, + 6 => Mode1::Wiredor, + 7 => Mode1::Wiredorpulldown, + 8 => Mode1::Wiredand, + 9 => Mode1::Wiredandfilter, + 10 => Mode1::Wiredandpullup, + 11 => Mode1::Wiredandpullupfilter, + 12 => Mode1::Wiredandalt, + 13 => Mode1::Wiredandaltfilter, + 14 => Mode1::Wiredandaltpullup, + 15 => Mode1::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE1_A::DISABLED + *self == Mode1::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE1_A::INPUT + *self == Mode1::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE1_A::INPUTPULL + *self == Mode1::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE1_A::INPUTPULLFILTER + *self == Mode1::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE1_A::PUSHPULL + *self == Mode1::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE1_A::PUSHPULLALT + *self == Mode1::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE1_A::WIREDOR + *self == Mode1::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE1_A::WIREDORPULLDOWN + *self == Mode1::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE1_A::WIREDAND + *self == Mode1::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE1_A::WIREDANDFILTER + *self == Mode1::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE1_A::WIREDANDPULLUP + *self == Mode1::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE1_A::WIREDANDPULLUPFILTER + *self == Mode1::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE1_A::WIREDANDALT + *self == Mode1::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE1_A::WIREDANDALTFILTER + *self == Mode1::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE1_A::WIREDANDALTPULLUP + *self == Mode1::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE1_A::WIREDANDALTPULLUPFILTER + *self == Mode1::Wiredandaltpullupfilter } } #[doc = "Field `MODE1` writer - MODE n"] -pub type MODE1_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTD_MODEL_SPEC, u8, MODE1_A, 4, O>; -impl<'a, const O: u8> MODE1_W<'a, O> { +pub type Mode1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode1, crate::Safe>; +impl<'a, REG> Mode1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE1_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode1::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE1_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode1::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE1_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode1::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE1_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE1_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode1::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE1_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode1::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE1_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE1_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE1_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE1_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode1::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE2` reader - MODE n"] -pub type MODE2_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE2_A { +pub enum Mode2 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE2_A) -> Self { + fn from(variant: Mode2) -> Self { variant as _ } } -impl MODE2_R { +impl crate::FieldSpec for Mode2 { + type Ux = u8; +} +impl crate::IsEnum for Mode2 {} +#[doc = "Field `MODE2` reader - MODE n"] +pub type Mode2R = crate::FieldReader; +impl Mode2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE2_A { + pub const fn variant(&self) -> Mode2 { match self.bits { - 0 => MODE2_A::DISABLED, - 1 => MODE2_A::INPUT, - 2 => MODE2_A::INPUTPULL, - 3 => MODE2_A::INPUTPULLFILTER, - 4 => MODE2_A::PUSHPULL, - 5 => MODE2_A::PUSHPULLALT, - 6 => MODE2_A::WIREDOR, - 7 => MODE2_A::WIREDORPULLDOWN, - 8 => MODE2_A::WIREDAND, - 9 => MODE2_A::WIREDANDFILTER, - 10 => MODE2_A::WIREDANDPULLUP, - 11 => MODE2_A::WIREDANDPULLUPFILTER, - 12 => MODE2_A::WIREDANDALT, - 13 => MODE2_A::WIREDANDALTFILTER, - 14 => MODE2_A::WIREDANDALTPULLUP, - 15 => MODE2_A::WIREDANDALTPULLUPFILTER, + 0 => Mode2::Disabled, + 1 => Mode2::Input, + 2 => Mode2::Inputpull, + 3 => Mode2::Inputpullfilter, + 4 => Mode2::Pushpull, + 5 => Mode2::Pushpullalt, + 6 => Mode2::Wiredor, + 7 => Mode2::Wiredorpulldown, + 8 => Mode2::Wiredand, + 9 => Mode2::Wiredandfilter, + 10 => Mode2::Wiredandpullup, + 11 => Mode2::Wiredandpullupfilter, + 12 => Mode2::Wiredandalt, + 13 => Mode2::Wiredandaltfilter, + 14 => Mode2::Wiredandaltpullup, + 15 => Mode2::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE2_A::DISABLED + *self == Mode2::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE2_A::INPUT + *self == Mode2::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE2_A::INPUTPULL + *self == Mode2::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE2_A::INPUTPULLFILTER + *self == Mode2::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE2_A::PUSHPULL + *self == Mode2::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE2_A::PUSHPULLALT + *self == Mode2::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE2_A::WIREDOR + *self == Mode2::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE2_A::WIREDORPULLDOWN + *self == Mode2::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE2_A::WIREDAND + *self == Mode2::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE2_A::WIREDANDFILTER + *self == Mode2::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE2_A::WIREDANDPULLUP + *self == Mode2::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE2_A::WIREDANDPULLUPFILTER + *self == Mode2::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE2_A::WIREDANDALT + *self == Mode2::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE2_A::WIREDANDALTFILTER + *self == Mode2::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE2_A::WIREDANDALTPULLUP + *self == Mode2::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE2_A::WIREDANDALTPULLUPFILTER + *self == Mode2::Wiredandaltpullupfilter } } #[doc = "Field `MODE2` writer - MODE n"] -pub type MODE2_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTD_MODEL_SPEC, u8, MODE2_A, 4, O>; -impl<'a, const O: u8> MODE2_W<'a, O> { +pub type Mode2W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode2, crate::Safe>; +impl<'a, REG> Mode2W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE2_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode2::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE2_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode2::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE2_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode2::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE2_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE2_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode2::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE2_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode2::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE2_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE2_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE2_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE2_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode2::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE3` reader - MODE n"] -pub type MODE3_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE3_A { +pub enum Mode3 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE3_A) -> Self { + fn from(variant: Mode3) -> Self { variant as _ } } -impl MODE3_R { +impl crate::FieldSpec for Mode3 { + type Ux = u8; +} +impl crate::IsEnum for Mode3 {} +#[doc = "Field `MODE3` reader - MODE n"] +pub type Mode3R = crate::FieldReader; +impl Mode3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE3_A { + pub const fn variant(&self) -> Mode3 { match self.bits { - 0 => MODE3_A::DISABLED, - 1 => MODE3_A::INPUT, - 2 => MODE3_A::INPUTPULL, - 3 => MODE3_A::INPUTPULLFILTER, - 4 => MODE3_A::PUSHPULL, - 5 => MODE3_A::PUSHPULLALT, - 6 => MODE3_A::WIREDOR, - 7 => MODE3_A::WIREDORPULLDOWN, - 8 => MODE3_A::WIREDAND, - 9 => MODE3_A::WIREDANDFILTER, - 10 => MODE3_A::WIREDANDPULLUP, - 11 => MODE3_A::WIREDANDPULLUPFILTER, - 12 => MODE3_A::WIREDANDALT, - 13 => MODE3_A::WIREDANDALTFILTER, - 14 => MODE3_A::WIREDANDALTPULLUP, - 15 => MODE3_A::WIREDANDALTPULLUPFILTER, + 0 => Mode3::Disabled, + 1 => Mode3::Input, + 2 => Mode3::Inputpull, + 3 => Mode3::Inputpullfilter, + 4 => Mode3::Pushpull, + 5 => Mode3::Pushpullalt, + 6 => Mode3::Wiredor, + 7 => Mode3::Wiredorpulldown, + 8 => Mode3::Wiredand, + 9 => Mode3::Wiredandfilter, + 10 => Mode3::Wiredandpullup, + 11 => Mode3::Wiredandpullupfilter, + 12 => Mode3::Wiredandalt, + 13 => Mode3::Wiredandaltfilter, + 14 => Mode3::Wiredandaltpullup, + 15 => Mode3::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE3_A::DISABLED + *self == Mode3::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE3_A::INPUT + *self == Mode3::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE3_A::INPUTPULL + *self == Mode3::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE3_A::INPUTPULLFILTER + *self == Mode3::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE3_A::PUSHPULL + *self == Mode3::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE3_A::PUSHPULLALT + *self == Mode3::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE3_A::WIREDOR + *self == Mode3::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE3_A::WIREDORPULLDOWN + *self == Mode3::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE3_A::WIREDAND + *self == Mode3::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE3_A::WIREDANDFILTER + *self == Mode3::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE3_A::WIREDANDPULLUP + *self == Mode3::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE3_A::WIREDANDPULLUPFILTER + *self == Mode3::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE3_A::WIREDANDALT + *self == Mode3::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE3_A::WIREDANDALTFILTER + *self == Mode3::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE3_A::WIREDANDALTPULLUP + *self == Mode3::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE3_A::WIREDANDALTPULLUPFILTER + *self == Mode3::Wiredandaltpullupfilter } } #[doc = "Field `MODE3` writer - MODE n"] -pub type MODE3_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTD_MODEL_SPEC, u8, MODE3_A, 4, O>; -impl<'a, const O: u8> MODE3_W<'a, O> { +pub type Mode3W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode3, crate::Safe>; +impl<'a, REG> Mode3W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE3_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode3::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE3_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode3::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE3_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode3::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE3_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE3_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode3::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE3_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode3::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE3_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE3_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE3_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE3_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode3::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE4` reader - MODE n"] -pub type MODE4_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE4_A { +pub enum Mode4 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE4_A) -> Self { + fn from(variant: Mode4) -> Self { variant as _ } } -impl MODE4_R { +impl crate::FieldSpec for Mode4 { + type Ux = u8; +} +impl crate::IsEnum for Mode4 {} +#[doc = "Field `MODE4` reader - MODE n"] +pub type Mode4R = crate::FieldReader; +impl Mode4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE4_A { + pub const fn variant(&self) -> Mode4 { match self.bits { - 0 => MODE4_A::DISABLED, - 1 => MODE4_A::INPUT, - 2 => MODE4_A::INPUTPULL, - 3 => MODE4_A::INPUTPULLFILTER, - 4 => MODE4_A::PUSHPULL, - 5 => MODE4_A::PUSHPULLALT, - 6 => MODE4_A::WIREDOR, - 7 => MODE4_A::WIREDORPULLDOWN, - 8 => MODE4_A::WIREDAND, - 9 => MODE4_A::WIREDANDFILTER, - 10 => MODE4_A::WIREDANDPULLUP, - 11 => MODE4_A::WIREDANDPULLUPFILTER, - 12 => MODE4_A::WIREDANDALT, - 13 => MODE4_A::WIREDANDALTFILTER, - 14 => MODE4_A::WIREDANDALTPULLUP, - 15 => MODE4_A::WIREDANDALTPULLUPFILTER, + 0 => Mode4::Disabled, + 1 => Mode4::Input, + 2 => Mode4::Inputpull, + 3 => Mode4::Inputpullfilter, + 4 => Mode4::Pushpull, + 5 => Mode4::Pushpullalt, + 6 => Mode4::Wiredor, + 7 => Mode4::Wiredorpulldown, + 8 => Mode4::Wiredand, + 9 => Mode4::Wiredandfilter, + 10 => Mode4::Wiredandpullup, + 11 => Mode4::Wiredandpullupfilter, + 12 => Mode4::Wiredandalt, + 13 => Mode4::Wiredandaltfilter, + 14 => Mode4::Wiredandaltpullup, + 15 => Mode4::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE4_A::DISABLED + *self == Mode4::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE4_A::INPUT + *self == Mode4::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE4_A::INPUTPULL + *self == Mode4::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE4_A::INPUTPULLFILTER + *self == Mode4::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE4_A::PUSHPULL + *self == Mode4::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE4_A::PUSHPULLALT + *self == Mode4::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE4_A::WIREDOR + *self == Mode4::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE4_A::WIREDORPULLDOWN + *self == Mode4::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE4_A::WIREDAND + *self == Mode4::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE4_A::WIREDANDFILTER + *self == Mode4::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE4_A::WIREDANDPULLUP + *self == Mode4::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE4_A::WIREDANDPULLUPFILTER + *self == Mode4::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE4_A::WIREDANDALT + *self == Mode4::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE4_A::WIREDANDALTFILTER + *self == Mode4::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE4_A::WIREDANDALTPULLUP + *self == Mode4::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE4_A::WIREDANDALTPULLUPFILTER + *self == Mode4::Wiredandaltpullupfilter } } #[doc = "Field `MODE4` writer - MODE n"] -pub type MODE4_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTD_MODEL_SPEC, u8, MODE4_A, 4, O>; -impl<'a, const O: u8> MODE4_W<'a, O> { +pub type Mode4W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode4, crate::Safe>; +impl<'a, REG> Mode4W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE4_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode4::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE4_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode4::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE4_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode4::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE4_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE4_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode4::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE4_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode4::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE4_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE4_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE4_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE4_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode4::Wiredandaltpullupfilter) } } -#[doc = "Field `MODE5` reader - MODE n"] -pub type MODE5_R = crate::FieldReader; #[doc = "MODE n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE5_A { +pub enum Mode5 { #[doc = "0: Input disabled. Pullup if DOUT is set."] - DISABLED = 0, + Disabled = 0, #[doc = "1: Input enabled. Filter if DOUT is set."] - INPUT = 1, + Input = 1, #[doc = "2: Input enabled. DOUT determines pull direction."] - INPUTPULL = 2, + Inputpull = 2, #[doc = "3: Input enabled with filter. DOUT determines pull direction."] - INPUTPULLFILTER = 3, + Inputpullfilter = 3, #[doc = "4: Push-pull output."] - PUSHPULL = 4, + Pushpull = 4, #[doc = "5: Push-pull using alternate control."] - PUSHPULLALT = 5, + Pushpullalt = 5, #[doc = "6: Wired-or output."] - WIREDOR = 6, + Wiredor = 6, #[doc = "7: Wired-or output with pull-down."] - WIREDORPULLDOWN = 7, + Wiredorpulldown = 7, #[doc = "8: Open-drain output."] - WIREDAND = 8, + Wiredand = 8, #[doc = "9: Open-drain output with filter."] - WIREDANDFILTER = 9, + Wiredandfilter = 9, #[doc = "10: Open-drain output with pullup."] - WIREDANDPULLUP = 10, + Wiredandpullup = 10, #[doc = "11: Open-drain output with filter and pullup."] - WIREDANDPULLUPFILTER = 11, + Wiredandpullupfilter = 11, #[doc = "12: Open-drain output using alternate control."] - WIREDANDALT = 12, + Wiredandalt = 12, #[doc = "13: Open-drain output using alternate control with filter."] - WIREDANDALTFILTER = 13, + Wiredandaltfilter = 13, #[doc = "14: Open-drain output using alternate control with pullup."] - WIREDANDALTPULLUP = 14, + Wiredandaltpullup = 14, #[doc = "15: Open-drain output using alternate control with filter and pullup."] - WIREDANDALTPULLUPFILTER = 15, + Wiredandaltpullupfilter = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE5_A) -> Self { + fn from(variant: Mode5) -> Self { variant as _ } } -impl MODE5_R { +impl crate::FieldSpec for Mode5 { + type Ux = u8; +} +impl crate::IsEnum for Mode5 {} +#[doc = "Field `MODE5` reader - MODE n"] +pub type Mode5R = crate::FieldReader; +impl Mode5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE5_A { + pub const fn variant(&self) -> Mode5 { match self.bits { - 0 => MODE5_A::DISABLED, - 1 => MODE5_A::INPUT, - 2 => MODE5_A::INPUTPULL, - 3 => MODE5_A::INPUTPULLFILTER, - 4 => MODE5_A::PUSHPULL, - 5 => MODE5_A::PUSHPULLALT, - 6 => MODE5_A::WIREDOR, - 7 => MODE5_A::WIREDORPULLDOWN, - 8 => MODE5_A::WIREDAND, - 9 => MODE5_A::WIREDANDFILTER, - 10 => MODE5_A::WIREDANDPULLUP, - 11 => MODE5_A::WIREDANDPULLUPFILTER, - 12 => MODE5_A::WIREDANDALT, - 13 => MODE5_A::WIREDANDALTFILTER, - 14 => MODE5_A::WIREDANDALTPULLUP, - 15 => MODE5_A::WIREDANDALTPULLUPFILTER, + 0 => Mode5::Disabled, + 1 => Mode5::Input, + 2 => Mode5::Inputpull, + 3 => Mode5::Inputpullfilter, + 4 => Mode5::Pushpull, + 5 => Mode5::Pushpullalt, + 6 => Mode5::Wiredor, + 7 => Mode5::Wiredorpulldown, + 8 => Mode5::Wiredand, + 9 => Mode5::Wiredandfilter, + 10 => Mode5::Wiredandpullup, + 11 => Mode5::Wiredandpullupfilter, + 12 => Mode5::Wiredandalt, + 13 => Mode5::Wiredandaltfilter, + 14 => Mode5::Wiredandaltpullup, + 15 => Mode5::Wiredandaltpullupfilter, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == MODE5_A::DISABLED + *self == Mode5::Disabled } - #[doc = "Checks if the value of the field is `INPUT`"] + #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] pub fn is_input(&self) -> bool { - *self == MODE5_A::INPUT + *self == Mode5::Input } - #[doc = "Checks if the value of the field is `INPUTPULL`"] + #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpull(&self) -> bool { - *self == MODE5_A::INPUTPULL + *self == Mode5::Inputpull } - #[doc = "Checks if the value of the field is `INPUTPULLFILTER`"] + #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] pub fn is_inputpullfilter(&self) -> bool { - *self == MODE5_A::INPUTPULLFILTER + *self == Mode5::Inputpullfilter } - #[doc = "Checks if the value of the field is `PUSHPULL`"] + #[doc = "Push-pull output."] #[inline(always)] pub fn is_pushpull(&self) -> bool { - *self == MODE5_A::PUSHPULL + *self == Mode5::Pushpull } - #[doc = "Checks if the value of the field is `PUSHPULLALT`"] + #[doc = "Push-pull using alternate control."] #[inline(always)] pub fn is_pushpullalt(&self) -> bool { - *self == MODE5_A::PUSHPULLALT + *self == Mode5::Pushpullalt } - #[doc = "Checks if the value of the field is `WIREDOR`"] + #[doc = "Wired-or output."] #[inline(always)] pub fn is_wiredor(&self) -> bool { - *self == MODE5_A::WIREDOR + *self == Mode5::Wiredor } - #[doc = "Checks if the value of the field is `WIREDORPULLDOWN`"] + #[doc = "Wired-or output with pull-down."] #[inline(always)] pub fn is_wiredorpulldown(&self) -> bool { - *self == MODE5_A::WIREDORPULLDOWN + *self == Mode5::Wiredorpulldown } - #[doc = "Checks if the value of the field is `WIREDAND`"] + #[doc = "Open-drain output."] #[inline(always)] pub fn is_wiredand(&self) -> bool { - *self == MODE5_A::WIREDAND + *self == Mode5::Wiredand } - #[doc = "Checks if the value of the field is `WIREDANDFILTER`"] + #[doc = "Open-drain output with filter."] #[inline(always)] pub fn is_wiredandfilter(&self) -> bool { - *self == MODE5_A::WIREDANDFILTER + *self == Mode5::Wiredandfilter } - #[doc = "Checks if the value of the field is `WIREDANDPULLUP`"] + #[doc = "Open-drain output with pullup."] #[inline(always)] pub fn is_wiredandpullup(&self) -> bool { - *self == MODE5_A::WIREDANDPULLUP + *self == Mode5::Wiredandpullup } - #[doc = "Checks if the value of the field is `WIREDANDPULLUPFILTER`"] + #[doc = "Open-drain output with filter and pullup."] #[inline(always)] pub fn is_wiredandpullupfilter(&self) -> bool { - *self == MODE5_A::WIREDANDPULLUPFILTER + *self == Mode5::Wiredandpullupfilter } - #[doc = "Checks if the value of the field is `WIREDANDALT`"] + #[doc = "Open-drain output using alternate control."] #[inline(always)] pub fn is_wiredandalt(&self) -> bool { - *self == MODE5_A::WIREDANDALT + *self == Mode5::Wiredandalt } - #[doc = "Checks if the value of the field is `WIREDANDALTFILTER`"] + #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] pub fn is_wiredandaltfilter(&self) -> bool { - *self == MODE5_A::WIREDANDALTFILTER + *self == Mode5::Wiredandaltfilter } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUP`"] + #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] pub fn is_wiredandaltpullup(&self) -> bool { - *self == MODE5_A::WIREDANDALTPULLUP + *self == Mode5::Wiredandaltpullup } - #[doc = "Checks if the value of the field is `WIREDANDALTPULLUPFILTER`"] + #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] pub fn is_wiredandaltpullupfilter(&self) -> bool { - *self == MODE5_A::WIREDANDALTPULLUPFILTER + *self == Mode5::Wiredandaltpullupfilter } } #[doc = "Field `MODE5` writer - MODE n"] -pub type MODE5_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PORTD_MODEL_SPEC, u8, MODE5_A, 4, O>; -impl<'a, const O: u8> MODE5_W<'a, O> { +pub type Mode5W<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode5, crate::Safe>; +impl<'a, REG> Mode5W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Input disabled. Pullup if DOUT is set."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(MODE5_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Mode5::Disabled) } #[doc = "Input enabled. Filter if DOUT is set."] #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(MODE5_A::INPUT) + pub fn input(self) -> &'a mut crate::W { + self.variant(Mode5::Input) } #[doc = "Input enabled. DOUT determines pull direction."] #[inline(always)] - pub fn inputpull(self) -> &'a mut W { - self.variant(MODE5_A::INPUTPULL) + pub fn inputpull(self) -> &'a mut crate::W { + self.variant(Mode5::Inputpull) } #[doc = "Input enabled with filter. DOUT determines pull direction."] #[inline(always)] - pub fn inputpullfilter(self) -> &'a mut W { - self.variant(MODE5_A::INPUTPULLFILTER) + pub fn inputpullfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Inputpullfilter) } #[doc = "Push-pull output."] #[inline(always)] - pub fn pushpull(self) -> &'a mut W { - self.variant(MODE5_A::PUSHPULL) + pub fn pushpull(self) -> &'a mut crate::W { + self.variant(Mode5::Pushpull) } #[doc = "Push-pull using alternate control."] #[inline(always)] - pub fn pushpullalt(self) -> &'a mut W { - self.variant(MODE5_A::PUSHPULLALT) + pub fn pushpullalt(self) -> &'a mut crate::W { + self.variant(Mode5::Pushpullalt) } #[doc = "Wired-or output."] #[inline(always)] - pub fn wiredor(self) -> &'a mut W { - self.variant(MODE5_A::WIREDOR) + pub fn wiredor(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredor) } #[doc = "Wired-or output with pull-down."] #[inline(always)] - pub fn wiredorpulldown(self) -> &'a mut W { - self.variant(MODE5_A::WIREDORPULLDOWN) + pub fn wiredorpulldown(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredorpulldown) } #[doc = "Open-drain output."] #[inline(always)] - pub fn wiredand(self) -> &'a mut W { - self.variant(MODE5_A::WIREDAND) + pub fn wiredand(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredand) } #[doc = "Open-drain output with filter."] #[inline(always)] - pub fn wiredandfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDFILTER) + pub fn wiredandfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandfilter) } #[doc = "Open-drain output with pullup."] #[inline(always)] - pub fn wiredandpullup(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDPULLUP) + pub fn wiredandpullup(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandpullup) } #[doc = "Open-drain output with filter and pullup."] #[inline(always)] - pub fn wiredandpullupfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDPULLUPFILTER) + pub fn wiredandpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandpullupfilter) } #[doc = "Open-drain output using alternate control."] #[inline(always)] - pub fn wiredandalt(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALT) + pub fn wiredandalt(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandalt) } #[doc = "Open-drain output using alternate control with filter."] #[inline(always)] - pub fn wiredandaltfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALTFILTER) + pub fn wiredandaltfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandaltfilter) } #[doc = "Open-drain output using alternate control with pullup."] #[inline(always)] - pub fn wiredandaltpullup(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALTPULLUP) + pub fn wiredandaltpullup(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandaltpullup) } #[doc = "Open-drain output using alternate control with filter and pullup."] #[inline(always)] - pub fn wiredandaltpullupfilter(self) -> &'a mut W { - self.variant(MODE5_A::WIREDANDALTPULLUPFILTER) + pub fn wiredandaltpullupfilter(self) -> &'a mut crate::W { + self.variant(Mode5::Wiredandaltpullupfilter) } } impl R { #[doc = "Bits 0:3 - MODE n"] #[inline(always)] - pub fn mode0(&self) -> MODE0_R { - MODE0_R::new((self.bits & 0x0f) as u8) + pub fn mode0(&self) -> Mode0R { + Mode0R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - MODE n"] #[inline(always)] - pub fn mode1(&self) -> MODE1_R { - MODE1_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn mode1(&self) -> Mode1R { + Mode1R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - MODE n"] #[inline(always)] - pub fn mode2(&self) -> MODE2_R { - MODE2_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn mode2(&self) -> Mode2R { + Mode2R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - MODE n"] #[inline(always)] - pub fn mode3(&self) -> MODE3_R { - MODE3_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn mode3(&self) -> Mode3R { + Mode3R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:19 - MODE n"] #[inline(always)] - pub fn mode4(&self) -> MODE4_R { - MODE4_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn mode4(&self) -> Mode4R { + Mode4R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:23 - MODE n"] #[inline(always)] - pub fn mode5(&self) -> MODE5_R { - MODE5_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn mode5(&self) -> Mode5R { + Mode5R::new(((self.bits >> 20) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - MODE n"] #[inline(always)] #[must_use] - pub fn mode0(&mut self) -> MODE0_W<0> { - MODE0_W::new(self) + pub fn mode0(&mut self) -> Mode0W { + Mode0W::new(self, 0) } #[doc = "Bits 4:7 - MODE n"] #[inline(always)] #[must_use] - pub fn mode1(&mut self) -> MODE1_W<4> { - MODE1_W::new(self) + pub fn mode1(&mut self) -> Mode1W { + Mode1W::new(self, 4) } #[doc = "Bits 8:11 - MODE n"] #[inline(always)] #[must_use] - pub fn mode2(&mut self) -> MODE2_W<8> { - MODE2_W::new(self) + pub fn mode2(&mut self) -> Mode2W { + Mode2W::new(self, 8) } #[doc = "Bits 12:15 - MODE n"] #[inline(always)] #[must_use] - pub fn mode3(&mut self) -> MODE3_W<12> { - MODE3_W::new(self) + pub fn mode3(&mut self) -> Mode3W { + Mode3W::new(self, 12) } #[doc = "Bits 16:19 - MODE n"] #[inline(always)] #[must_use] - pub fn mode4(&mut self) -> MODE4_W<16> { - MODE4_W::new(self) + pub fn mode4(&mut self) -> Mode4W { + Mode4W::new(self, 16) } #[doc = "Bits 20:23 - MODE n"] #[inline(always)] #[must_use] - pub fn mode5(&mut self) -> MODE5_W<20> { - MODE5_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn mode5(&mut self) -> Mode5W { + Mode5W::new(self, 20) } } -#[doc = "mode low\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portd_model](index.html) module"] -pub struct PORTD_MODEL_SPEC; -impl crate::RegisterSpec for PORTD_MODEL_SPEC { +#[doc = "mode low\n\nYou can [`read`](crate::Reg::read) this register and get [`portd_model::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`portd_model::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PortdModelSpec; +impl crate::RegisterSpec for PortdModelSpec { type Ux = u32; } -#[doc = "`read()` method returns [portd_model::R](R) reader structure"] -impl crate::Readable for PORTD_MODEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [portd_model::W](W) writer structure"] -impl crate::Writable for PORTD_MODEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`portd_model::R`](R) reader structure"] +impl crate::Readable for PortdModelSpec {} +#[doc = "`write(|w| ..)` method takes [`portd_model::W`](W) writer structure"] +impl crate::Writable for PortdModelSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PORTD_MODEL to value 0"] -impl crate::Resettable for PORTD_MODEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PortdModelSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch0route.rs index bb0c485..4e61291 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch0route.rs @@ -1,96 +1,55 @@ #[doc = "Register `PRS0_ASYNCH0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_ASYNCH0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ASYNCH0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ASYNCH0 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ASYNCH0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ASYNCH0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_ASYNCH0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ASYNCH0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ASYNCH0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ASYNCH0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ASYNCH0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ASYNCH0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_asynch0route](index.html) module"] -pub struct PRS0_ASYNCH0ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_ASYNCH0ROUTE_SPEC { +#[doc = "ASYNCH0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Asynch0routeSpec; +impl crate::RegisterSpec for Prs0Asynch0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_asynch0route::R](R) reader structure"] -impl crate::Readable for PRS0_ASYNCH0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_asynch0route::W](W) writer structure"] -impl crate::Writable for PRS0_ASYNCH0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_asynch0route::R`](R) reader structure"] +impl crate::Readable for Prs0Asynch0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_asynch0route::W`](W) writer structure"] +impl crate::Writable for Prs0Asynch0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_ASYNCH0ROUTE to value 0"] -impl crate::Resettable for PRS0_ASYNCH0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Asynch0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch10route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch10route.rs index fea0ec0..1331b10 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch10route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch10route.rs @@ -1,97 +1,55 @@ #[doc = "Register `PRS0_ASYNCH10ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_ASYNCH10ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ASYNCH10 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ASYNCH10 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH10ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ASYNCH10 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ASYNCH10 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH10ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ASYNCH10 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ASYNCH10 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ASYNCH10 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ASYNCH10 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ASYNCH10 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_asynch10route](index.html) module"] -pub struct PRS0_ASYNCH10ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_ASYNCH10ROUTE_SPEC { +#[doc = "ASYNCH10 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch10route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch10route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Asynch10routeSpec; +impl crate::RegisterSpec for Prs0Asynch10routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_asynch10route::R](R) reader structure"] -impl crate::Readable for PRS0_ASYNCH10ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_asynch10route::W](W) writer structure"] -impl crate::Writable for PRS0_ASYNCH10ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_asynch10route::R`](R) reader structure"] +impl crate::Readable for Prs0Asynch10routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_asynch10route::W`](W) writer structure"] +impl crate::Writable for Prs0Asynch10routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_ASYNCH10ROUTE to value 0"] -impl crate::Resettable for PRS0_ASYNCH10ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Asynch10routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch11route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch11route.rs index 8ccc6a6..2263ecc 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch11route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch11route.rs @@ -1,97 +1,55 @@ #[doc = "Register `PRS0_ASYNCH11ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_ASYNCH11ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ASYNCH11 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ASYNCH11 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH11ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ASYNCH11 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ASYNCH11 pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH11ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ASYNCH11 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ASYNCH11 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ASYNCH11 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ASYNCH11 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ASYNCH11 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_asynch11route](index.html) module"] -pub struct PRS0_ASYNCH11ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_ASYNCH11ROUTE_SPEC { +#[doc = "ASYNCH11 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch11route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch11route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Asynch11routeSpec; +impl crate::RegisterSpec for Prs0Asynch11routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_asynch11route::R](R) reader structure"] -impl crate::Readable for PRS0_ASYNCH11ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_asynch11route::W](W) writer structure"] -impl crate::Writable for PRS0_ASYNCH11ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_asynch11route::R`](R) reader structure"] +impl crate::Readable for Prs0Asynch11routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_asynch11route::W`](W) writer structure"] +impl crate::Writable for Prs0Asynch11routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_ASYNCH11ROUTE to value 0"] -impl crate::Resettable for PRS0_ASYNCH11ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Asynch11routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch1route.rs index 0952dc0..ce181f0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch1route.rs @@ -1,96 +1,55 @@ #[doc = "Register `PRS0_ASYNCH1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_ASYNCH1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ASYNCH1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ASYNCH1 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ASYNCH1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ASYNCH1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_ASYNCH1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ASYNCH1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ASYNCH1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ASYNCH1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ASYNCH1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ASYNCH1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_asynch1route](index.html) module"] -pub struct PRS0_ASYNCH1ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_ASYNCH1ROUTE_SPEC { +#[doc = "ASYNCH1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Asynch1routeSpec; +impl crate::RegisterSpec for Prs0Asynch1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_asynch1route::R](R) reader structure"] -impl crate::Readable for PRS0_ASYNCH1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_asynch1route::W](W) writer structure"] -impl crate::Writable for PRS0_ASYNCH1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_asynch1route::R`](R) reader structure"] +impl crate::Readable for Prs0Asynch1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_asynch1route::W`](W) writer structure"] +impl crate::Writable for Prs0Asynch1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_ASYNCH1ROUTE to value 0"] -impl crate::Resettable for PRS0_ASYNCH1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Asynch1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch2route.rs index e8194cf..b788dd5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch2route.rs @@ -1,96 +1,55 @@ #[doc = "Register `PRS0_ASYNCH2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_ASYNCH2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ASYNCH2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ASYNCH2 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ASYNCH2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ASYNCH2 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_ASYNCH2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ASYNCH2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ASYNCH2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ASYNCH2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ASYNCH2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ASYNCH2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_asynch2route](index.html) module"] -pub struct PRS0_ASYNCH2ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_ASYNCH2ROUTE_SPEC { +#[doc = "ASYNCH2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Asynch2routeSpec; +impl crate::RegisterSpec for Prs0Asynch2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_asynch2route::R](R) reader structure"] -impl crate::Readable for PRS0_ASYNCH2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_asynch2route::W](W) writer structure"] -impl crate::Writable for PRS0_ASYNCH2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_asynch2route::R`](R) reader structure"] +impl crate::Readable for Prs0Asynch2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_asynch2route::W`](W) writer structure"] +impl crate::Writable for Prs0Asynch2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_ASYNCH2ROUTE to value 0"] -impl crate::Resettable for PRS0_ASYNCH2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Asynch2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch3route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch3route.rs index 93cda42..b77d708 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch3route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch3route.rs @@ -1,96 +1,55 @@ #[doc = "Register `PRS0_ASYNCH3ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_ASYNCH3ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ASYNCH3 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ASYNCH3 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH3ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ASYNCH3 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ASYNCH3 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_ASYNCH3ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ASYNCH3 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ASYNCH3 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ASYNCH3 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ASYNCH3 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ASYNCH3 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_asynch3route](index.html) module"] -pub struct PRS0_ASYNCH3ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_ASYNCH3ROUTE_SPEC { +#[doc = "ASYNCH3 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch3route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch3route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Asynch3routeSpec; +impl crate::RegisterSpec for Prs0Asynch3routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_asynch3route::R](R) reader structure"] -impl crate::Readable for PRS0_ASYNCH3ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_asynch3route::W](W) writer structure"] -impl crate::Writable for PRS0_ASYNCH3ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_asynch3route::R`](R) reader structure"] +impl crate::Readable for Prs0Asynch3routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_asynch3route::W`](W) writer structure"] +impl crate::Writable for Prs0Asynch3routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_ASYNCH3ROUTE to value 0"] -impl crate::Resettable for PRS0_ASYNCH3ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Asynch3routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch4route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch4route.rs index 0745ec2..25d8d2b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch4route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch4route.rs @@ -1,96 +1,55 @@ #[doc = "Register `PRS0_ASYNCH4ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_ASYNCH4ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ASYNCH4 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ASYNCH4 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH4ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ASYNCH4 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ASYNCH4 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_ASYNCH4ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ASYNCH4 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ASYNCH4 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ASYNCH4 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ASYNCH4 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ASYNCH4 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_asynch4route](index.html) module"] -pub struct PRS0_ASYNCH4ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_ASYNCH4ROUTE_SPEC { +#[doc = "ASYNCH4 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch4route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch4route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Asynch4routeSpec; +impl crate::RegisterSpec for Prs0Asynch4routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_asynch4route::R](R) reader structure"] -impl crate::Readable for PRS0_ASYNCH4ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_asynch4route::W](W) writer structure"] -impl crate::Writable for PRS0_ASYNCH4ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_asynch4route::R`](R) reader structure"] +impl crate::Readable for Prs0Asynch4routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_asynch4route::W`](W) writer structure"] +impl crate::Writable for Prs0Asynch4routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_ASYNCH4ROUTE to value 0"] -impl crate::Resettable for PRS0_ASYNCH4ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Asynch4routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch5route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch5route.rs index 400e7f8..aba19a0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch5route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch5route.rs @@ -1,96 +1,55 @@ #[doc = "Register `PRS0_ASYNCH5ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_ASYNCH5ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ASYNCH5 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ASYNCH5 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH5ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ASYNCH5 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ASYNCH5 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_ASYNCH5ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ASYNCH5 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ASYNCH5 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ASYNCH5 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ASYNCH5 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ASYNCH5 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_asynch5route](index.html) module"] -pub struct PRS0_ASYNCH5ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_ASYNCH5ROUTE_SPEC { +#[doc = "ASYNCH5 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch5route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch5route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Asynch5routeSpec; +impl crate::RegisterSpec for Prs0Asynch5routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_asynch5route::R](R) reader structure"] -impl crate::Readable for PRS0_ASYNCH5ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_asynch5route::W](W) writer structure"] -impl crate::Writable for PRS0_ASYNCH5ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_asynch5route::R`](R) reader structure"] +impl crate::Readable for Prs0Asynch5routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_asynch5route::W`](W) writer structure"] +impl crate::Writable for Prs0Asynch5routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_ASYNCH5ROUTE to value 0"] -impl crate::Resettable for PRS0_ASYNCH5ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Asynch5routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch6route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch6route.rs index 7c4a34c..a125cf3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch6route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch6route.rs @@ -1,96 +1,55 @@ #[doc = "Register `PRS0_ASYNCH6ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_ASYNCH6ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ASYNCH6 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ASYNCH6 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH6ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ASYNCH6 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ASYNCH6 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_ASYNCH6ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ASYNCH6 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ASYNCH6 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ASYNCH6 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ASYNCH6 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ASYNCH6 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_asynch6route](index.html) module"] -pub struct PRS0_ASYNCH6ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_ASYNCH6ROUTE_SPEC { +#[doc = "ASYNCH6 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch6route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch6route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Asynch6routeSpec; +impl crate::RegisterSpec for Prs0Asynch6routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_asynch6route::R](R) reader structure"] -impl crate::Readable for PRS0_ASYNCH6ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_asynch6route::W](W) writer structure"] -impl crate::Writable for PRS0_ASYNCH6ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_asynch6route::R`](R) reader structure"] +impl crate::Readable for Prs0Asynch6routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_asynch6route::W`](W) writer structure"] +impl crate::Writable for Prs0Asynch6routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_ASYNCH6ROUTE to value 0"] -impl crate::Resettable for PRS0_ASYNCH6ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Asynch6routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch7route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch7route.rs index 2209cac..1d4e618 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch7route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch7route.rs @@ -1,96 +1,55 @@ #[doc = "Register `PRS0_ASYNCH7ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_ASYNCH7ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ASYNCH7 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ASYNCH7 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH7ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ASYNCH7 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ASYNCH7 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_ASYNCH7ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ASYNCH7 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ASYNCH7 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ASYNCH7 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ASYNCH7 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ASYNCH7 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_asynch7route](index.html) module"] -pub struct PRS0_ASYNCH7ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_ASYNCH7ROUTE_SPEC { +#[doc = "ASYNCH7 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch7route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch7route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Asynch7routeSpec; +impl crate::RegisterSpec for Prs0Asynch7routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_asynch7route::R](R) reader structure"] -impl crate::Readable for PRS0_ASYNCH7ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_asynch7route::W](W) writer structure"] -impl crate::Writable for PRS0_ASYNCH7ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_asynch7route::R`](R) reader structure"] +impl crate::Readable for Prs0Asynch7routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_asynch7route::W`](W) writer structure"] +impl crate::Writable for Prs0Asynch7routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_ASYNCH7ROUTE to value 0"] -impl crate::Resettable for PRS0_ASYNCH7ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Asynch7routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch8route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch8route.rs index c25ae72..686c2f5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch8route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch8route.rs @@ -1,96 +1,55 @@ #[doc = "Register `PRS0_ASYNCH8ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_ASYNCH8ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ASYNCH8 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ASYNCH8 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH8ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ASYNCH8 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ASYNCH8 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_ASYNCH8ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ASYNCH8 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ASYNCH8 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ASYNCH8 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ASYNCH8 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ASYNCH8 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_asynch8route](index.html) module"] -pub struct PRS0_ASYNCH8ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_ASYNCH8ROUTE_SPEC { +#[doc = "ASYNCH8 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch8route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch8route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Asynch8routeSpec; +impl crate::RegisterSpec for Prs0Asynch8routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_asynch8route::R](R) reader structure"] -impl crate::Readable for PRS0_ASYNCH8ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_asynch8route::W](W) writer structure"] -impl crate::Writable for PRS0_ASYNCH8ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_asynch8route::R`](R) reader structure"] +impl crate::Readable for Prs0Asynch8routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_asynch8route::W`](W) writer structure"] +impl crate::Writable for Prs0Asynch8routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_ASYNCH8ROUTE to value 0"] -impl crate::Resettable for PRS0_ASYNCH8ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Asynch8routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch9route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch9route.rs index 428e69a..a9cb272 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch9route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_asynch9route.rs @@ -1,96 +1,55 @@ #[doc = "Register `PRS0_ASYNCH9ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_ASYNCH9ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - ASYNCH9 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - ASYNCH9 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, PRS0_ASYNCH9ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - ASYNCH9 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - ASYNCH9 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_ASYNCH9ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - ASYNCH9 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - ASYNCH9 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - ASYNCH9 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - ASYNCH9 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "ASYNCH9 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_asynch9route](index.html) module"] -pub struct PRS0_ASYNCH9ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_ASYNCH9ROUTE_SPEC { +#[doc = "ASYNCH9 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_asynch9route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_asynch9route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Asynch9routeSpec; +impl crate::RegisterSpec for Prs0Asynch9routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_asynch9route::R](R) reader structure"] -impl crate::Readable for PRS0_ASYNCH9ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_asynch9route::W](W) writer structure"] -impl crate::Writable for PRS0_ASYNCH9ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_asynch9route::R`](R) reader structure"] +impl crate::Readable for Prs0Asynch9routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_asynch9route::W`](W) writer structure"] +impl crate::Writable for Prs0Asynch9routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_ASYNCH9ROUTE to value 0"] -impl crate::Resettable for PRS0_ASYNCH9ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Asynch9routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_routeen.rs index 1556113..90605ae 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_routeen.rs @@ -1,305 +1,265 @@ #[doc = "Register `PRS0_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ASYNCH0PEN` reader - ASYNCH0 pin enable control bit"] -pub type ASYNCH0PEN_R = crate::BitReader; +pub type Asynch0penR = crate::BitReader; #[doc = "Field `ASYNCH0PEN` writer - ASYNCH0 pin enable control bit"] -pub type ASYNCH0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Asynch0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ASYNCH1PEN` reader - ASYNCH1 pin enable control bit"] -pub type ASYNCH1PEN_R = crate::BitReader; +pub type Asynch1penR = crate::BitReader; #[doc = "Field `ASYNCH1PEN` writer - ASYNCH1 pin enable control bit"] -pub type ASYNCH1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Asynch1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ASYNCH2PEN` reader - ASYNCH2 pin enable control bit"] -pub type ASYNCH2PEN_R = crate::BitReader; +pub type Asynch2penR = crate::BitReader; #[doc = "Field `ASYNCH2PEN` writer - ASYNCH2 pin enable control bit"] -pub type ASYNCH2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Asynch2penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ASYNCH3PEN` reader - ASYNCH3 pin enable control bit"] -pub type ASYNCH3PEN_R = crate::BitReader; +pub type Asynch3penR = crate::BitReader; #[doc = "Field `ASYNCH3PEN` writer - ASYNCH3 pin enable control bit"] -pub type ASYNCH3PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Asynch3penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ASYNCH4PEN` reader - ASYNCH4 pin enable control bit"] -pub type ASYNCH4PEN_R = crate::BitReader; +pub type Asynch4penR = crate::BitReader; #[doc = "Field `ASYNCH4PEN` writer - ASYNCH4 pin enable control bit"] -pub type ASYNCH4PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Asynch4penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ASYNCH5PEN` reader - ASYNCH5 pin enable control bit"] -pub type ASYNCH5PEN_R = crate::BitReader; +pub type Asynch5penR = crate::BitReader; #[doc = "Field `ASYNCH5PEN` writer - ASYNCH5 pin enable control bit"] -pub type ASYNCH5PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Asynch5penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ASYNCH6PEN` reader - ASYNCH6 pin enable control bit"] -pub type ASYNCH6PEN_R = crate::BitReader; +pub type Asynch6penR = crate::BitReader; #[doc = "Field `ASYNCH6PEN` writer - ASYNCH6 pin enable control bit"] -pub type ASYNCH6PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Asynch6penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ASYNCH7PEN` reader - ASYNCH7 pin enable control bit"] -pub type ASYNCH7PEN_R = crate::BitReader; +pub type Asynch7penR = crate::BitReader; #[doc = "Field `ASYNCH7PEN` writer - ASYNCH7 pin enable control bit"] -pub type ASYNCH7PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Asynch7penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ASYNCH8PEN` reader - ASYNCH8 pin enable control bit"] -pub type ASYNCH8PEN_R = crate::BitReader; +pub type Asynch8penR = crate::BitReader; #[doc = "Field `ASYNCH8PEN` writer - ASYNCH8 pin enable control bit"] -pub type ASYNCH8PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Asynch8penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ASYNCH9PEN` reader - ASYNCH9 pin enable control bit"] -pub type ASYNCH9PEN_R = crate::BitReader; +pub type Asynch9penR = crate::BitReader; #[doc = "Field `ASYNCH9PEN` writer - ASYNCH9 pin enable control bit"] -pub type ASYNCH9PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Asynch9penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ASYNCH10PEN` reader - ASYNCH10 pin enable control bit"] -pub type ASYNCH10PEN_R = crate::BitReader; +pub type Asynch10penR = crate::BitReader; #[doc = "Field `ASYNCH10PEN` writer - ASYNCH10 pin enable control bit"] -pub type ASYNCH10PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Asynch10penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ASYNCH11PEN` reader - ASYNCH11 pin enable control bit"] -pub type ASYNCH11PEN_R = crate::BitReader; +pub type Asynch11penR = crate::BitReader; #[doc = "Field `ASYNCH11PEN` writer - ASYNCH11 pin enable control bit"] -pub type ASYNCH11PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Asynch11penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYNCH0PEN` reader - SYNCH0 pin enable control bit"] -pub type SYNCH0PEN_R = crate::BitReader; +pub type Synch0penR = crate::BitReader; #[doc = "Field `SYNCH0PEN` writer - SYNCH0 pin enable control bit"] -pub type SYNCH0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Synch0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYNCH1PEN` reader - SYNCH1 pin enable control bit"] -pub type SYNCH1PEN_R = crate::BitReader; +pub type Synch1penR = crate::BitReader; #[doc = "Field `SYNCH1PEN` writer - SYNCH1 pin enable control bit"] -pub type SYNCH1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Synch1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYNCH2PEN` reader - SYNCH2 pin enable control bit"] -pub type SYNCH2PEN_R = crate::BitReader; +pub type Synch2penR = crate::BitReader; #[doc = "Field `SYNCH2PEN` writer - SYNCH2 pin enable control bit"] -pub type SYNCH2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Synch2penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYNCH3PEN` reader - SYNCH3 pin enable control bit"] -pub type SYNCH3PEN_R = crate::BitReader; +pub type Synch3penR = crate::BitReader; #[doc = "Field `SYNCH3PEN` writer - SYNCH3 pin enable control bit"] -pub type SYNCH3PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PRS0_ROUTEEN_SPEC, bool, O>; +pub type Synch3penW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - ASYNCH0 pin enable control bit"] #[inline(always)] - pub fn asynch0pen(&self) -> ASYNCH0PEN_R { - ASYNCH0PEN_R::new((self.bits & 1) != 0) + pub fn asynch0pen(&self) -> Asynch0penR { + Asynch0penR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - ASYNCH1 pin enable control bit"] #[inline(always)] - pub fn asynch1pen(&self) -> ASYNCH1PEN_R { - ASYNCH1PEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn asynch1pen(&self) -> Asynch1penR { + Asynch1penR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - ASYNCH2 pin enable control bit"] #[inline(always)] - pub fn asynch2pen(&self) -> ASYNCH2PEN_R { - ASYNCH2PEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn asynch2pen(&self) -> Asynch2penR { + Asynch2penR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - ASYNCH3 pin enable control bit"] #[inline(always)] - pub fn asynch3pen(&self) -> ASYNCH3PEN_R { - ASYNCH3PEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn asynch3pen(&self) -> Asynch3penR { + Asynch3penR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - ASYNCH4 pin enable control bit"] #[inline(always)] - pub fn asynch4pen(&self) -> ASYNCH4PEN_R { - ASYNCH4PEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn asynch4pen(&self) -> Asynch4penR { + Asynch4penR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - ASYNCH5 pin enable control bit"] #[inline(always)] - pub fn asynch5pen(&self) -> ASYNCH5PEN_R { - ASYNCH5PEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn asynch5pen(&self) -> Asynch5penR { + Asynch5penR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - ASYNCH6 pin enable control bit"] #[inline(always)] - pub fn asynch6pen(&self) -> ASYNCH6PEN_R { - ASYNCH6PEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn asynch6pen(&self) -> Asynch6penR { + Asynch6penR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - ASYNCH7 pin enable control bit"] #[inline(always)] - pub fn asynch7pen(&self) -> ASYNCH7PEN_R { - ASYNCH7PEN_R::new(((self.bits >> 7) & 1) != 0) + pub fn asynch7pen(&self) -> Asynch7penR { + Asynch7penR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - ASYNCH8 pin enable control bit"] #[inline(always)] - pub fn asynch8pen(&self) -> ASYNCH8PEN_R { - ASYNCH8PEN_R::new(((self.bits >> 8) & 1) != 0) + pub fn asynch8pen(&self) -> Asynch8penR { + Asynch8penR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - ASYNCH9 pin enable control bit"] #[inline(always)] - pub fn asynch9pen(&self) -> ASYNCH9PEN_R { - ASYNCH9PEN_R::new(((self.bits >> 9) & 1) != 0) + pub fn asynch9pen(&self) -> Asynch9penR { + Asynch9penR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - ASYNCH10 pin enable control bit"] #[inline(always)] - pub fn asynch10pen(&self) -> ASYNCH10PEN_R { - ASYNCH10PEN_R::new(((self.bits >> 10) & 1) != 0) + pub fn asynch10pen(&self) -> Asynch10penR { + Asynch10penR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - ASYNCH11 pin enable control bit"] #[inline(always)] - pub fn asynch11pen(&self) -> ASYNCH11PEN_R { - ASYNCH11PEN_R::new(((self.bits >> 11) & 1) != 0) + pub fn asynch11pen(&self) -> Asynch11penR { + Asynch11penR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - SYNCH0 pin enable control bit"] #[inline(always)] - pub fn synch0pen(&self) -> SYNCH0PEN_R { - SYNCH0PEN_R::new(((self.bits >> 12) & 1) != 0) + pub fn synch0pen(&self) -> Synch0penR { + Synch0penR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - SYNCH1 pin enable control bit"] #[inline(always)] - pub fn synch1pen(&self) -> SYNCH1PEN_R { - SYNCH1PEN_R::new(((self.bits >> 13) & 1) != 0) + pub fn synch1pen(&self) -> Synch1penR { + Synch1penR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - SYNCH2 pin enable control bit"] #[inline(always)] - pub fn synch2pen(&self) -> SYNCH2PEN_R { - SYNCH2PEN_R::new(((self.bits >> 14) & 1) != 0) + pub fn synch2pen(&self) -> Synch2penR { + Synch2penR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - SYNCH3 pin enable control bit"] #[inline(always)] - pub fn synch3pen(&self) -> SYNCH3PEN_R { - SYNCH3PEN_R::new(((self.bits >> 15) & 1) != 0) + pub fn synch3pen(&self) -> Synch3penR { + Synch3penR::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - ASYNCH0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn asynch0pen(&mut self) -> ASYNCH0PEN_W<0> { - ASYNCH0PEN_W::new(self) + pub fn asynch0pen(&mut self) -> Asynch0penW { + Asynch0penW::new(self, 0) } #[doc = "Bit 1 - ASYNCH1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn asynch1pen(&mut self) -> ASYNCH1PEN_W<1> { - ASYNCH1PEN_W::new(self) + pub fn asynch1pen(&mut self) -> Asynch1penW { + Asynch1penW::new(self, 1) } #[doc = "Bit 2 - ASYNCH2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn asynch2pen(&mut self) -> ASYNCH2PEN_W<2> { - ASYNCH2PEN_W::new(self) + pub fn asynch2pen(&mut self) -> Asynch2penW { + Asynch2penW::new(self, 2) } #[doc = "Bit 3 - ASYNCH3 pin enable control bit"] #[inline(always)] #[must_use] - pub fn asynch3pen(&mut self) -> ASYNCH3PEN_W<3> { - ASYNCH3PEN_W::new(self) + pub fn asynch3pen(&mut self) -> Asynch3penW { + Asynch3penW::new(self, 3) } #[doc = "Bit 4 - ASYNCH4 pin enable control bit"] #[inline(always)] #[must_use] - pub fn asynch4pen(&mut self) -> ASYNCH4PEN_W<4> { - ASYNCH4PEN_W::new(self) + pub fn asynch4pen(&mut self) -> Asynch4penW { + Asynch4penW::new(self, 4) } #[doc = "Bit 5 - ASYNCH5 pin enable control bit"] #[inline(always)] #[must_use] - pub fn asynch5pen(&mut self) -> ASYNCH5PEN_W<5> { - ASYNCH5PEN_W::new(self) + pub fn asynch5pen(&mut self) -> Asynch5penW { + Asynch5penW::new(self, 5) } #[doc = "Bit 6 - ASYNCH6 pin enable control bit"] #[inline(always)] #[must_use] - pub fn asynch6pen(&mut self) -> ASYNCH6PEN_W<6> { - ASYNCH6PEN_W::new(self) + pub fn asynch6pen(&mut self) -> Asynch6penW { + Asynch6penW::new(self, 6) } #[doc = "Bit 7 - ASYNCH7 pin enable control bit"] #[inline(always)] #[must_use] - pub fn asynch7pen(&mut self) -> ASYNCH7PEN_W<7> { - ASYNCH7PEN_W::new(self) + pub fn asynch7pen(&mut self) -> Asynch7penW { + Asynch7penW::new(self, 7) } #[doc = "Bit 8 - ASYNCH8 pin enable control bit"] #[inline(always)] #[must_use] - pub fn asynch8pen(&mut self) -> ASYNCH8PEN_W<8> { - ASYNCH8PEN_W::new(self) + pub fn asynch8pen(&mut self) -> Asynch8penW { + Asynch8penW::new(self, 8) } #[doc = "Bit 9 - ASYNCH9 pin enable control bit"] #[inline(always)] #[must_use] - pub fn asynch9pen(&mut self) -> ASYNCH9PEN_W<9> { - ASYNCH9PEN_W::new(self) + pub fn asynch9pen(&mut self) -> Asynch9penW { + Asynch9penW::new(self, 9) } #[doc = "Bit 10 - ASYNCH10 pin enable control bit"] #[inline(always)] #[must_use] - pub fn asynch10pen(&mut self) -> ASYNCH10PEN_W<10> { - ASYNCH10PEN_W::new(self) + pub fn asynch10pen(&mut self) -> Asynch10penW { + Asynch10penW::new(self, 10) } #[doc = "Bit 11 - ASYNCH11 pin enable control bit"] #[inline(always)] #[must_use] - pub fn asynch11pen(&mut self) -> ASYNCH11PEN_W<11> { - ASYNCH11PEN_W::new(self) + pub fn asynch11pen(&mut self) -> Asynch11penW { + Asynch11penW::new(self, 11) } #[doc = "Bit 12 - SYNCH0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn synch0pen(&mut self) -> SYNCH0PEN_W<12> { - SYNCH0PEN_W::new(self) + pub fn synch0pen(&mut self) -> Synch0penW { + Synch0penW::new(self, 12) } #[doc = "Bit 13 - SYNCH1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn synch1pen(&mut self) -> SYNCH1PEN_W<13> { - SYNCH1PEN_W::new(self) + pub fn synch1pen(&mut self) -> Synch1penW { + Synch1penW::new(self, 13) } #[doc = "Bit 14 - SYNCH2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn synch2pen(&mut self) -> SYNCH2PEN_W<14> { - SYNCH2PEN_W::new(self) + pub fn synch2pen(&mut self) -> Synch2penW { + Synch2penW::new(self, 14) } #[doc = "Bit 15 - SYNCH3 pin enable control bit"] #[inline(always)] #[must_use] - pub fn synch3pen(&mut self) -> SYNCH3PEN_W<15> { - SYNCH3PEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn synch3pen(&mut self) -> Synch3penW { + Synch3penW::new(self, 15) } } -#[doc = "PRS0 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_routeen](index.html) module"] -pub struct PRS0_ROUTEEN_SPEC; -impl crate::RegisterSpec for PRS0_ROUTEEN_SPEC { +#[doc = "PRS0 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0RouteenSpec; +impl crate::RegisterSpec for Prs0RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_routeen::R](R) reader structure"] -impl crate::Readable for PRS0_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_routeen::W](W) writer structure"] -impl crate::Writable for PRS0_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_routeen::R`](R) reader structure"] +impl crate::Readable for Prs0RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_routeen::W`](W) writer structure"] +impl crate::Writable for Prs0RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_ROUTEEN to value 0"] -impl crate::Resettable for PRS0_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_synch0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_synch0route.rs index c20c8a9..8096db2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_synch0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_synch0route.rs @@ -1,95 +1,55 @@ #[doc = "Register `PRS0_SYNCH0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_SYNCH0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - SYNCH0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - SYNCH0 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_SYNCH0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - SYNCH0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - SYNCH0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_SYNCH0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - SYNCH0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - SYNCH0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - SYNCH0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - SYNCH0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "SYNCH0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_synch0route](index.html) module"] -pub struct PRS0_SYNCH0ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_SYNCH0ROUTE_SPEC { +#[doc = "SYNCH0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_synch0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_synch0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Synch0routeSpec; +impl crate::RegisterSpec for Prs0Synch0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_synch0route::R](R) reader structure"] -impl crate::Readable for PRS0_SYNCH0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_synch0route::W](W) writer structure"] -impl crate::Writable for PRS0_SYNCH0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_synch0route::R`](R) reader structure"] +impl crate::Readable for Prs0Synch0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_synch0route::W`](W) writer structure"] +impl crate::Writable for Prs0Synch0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_SYNCH0ROUTE to value 0"] -impl crate::Resettable for PRS0_SYNCH0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Synch0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_synch1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_synch1route.rs index 035da51..b983940 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_synch1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_synch1route.rs @@ -1,95 +1,55 @@ #[doc = "Register `PRS0_SYNCH1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_SYNCH1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - SYNCH1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - SYNCH1 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_SYNCH1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - SYNCH1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - SYNCH1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_SYNCH1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - SYNCH1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - SYNCH1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - SYNCH1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - SYNCH1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "SYNCH1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_synch1route](index.html) module"] -pub struct PRS0_SYNCH1ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_SYNCH1ROUTE_SPEC { +#[doc = "SYNCH1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_synch1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_synch1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Synch1routeSpec; +impl crate::RegisterSpec for Prs0Synch1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_synch1route::R](R) reader structure"] -impl crate::Readable for PRS0_SYNCH1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_synch1route::W](W) writer structure"] -impl crate::Writable for PRS0_SYNCH1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_synch1route::R`](R) reader structure"] +impl crate::Readable for Prs0Synch1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_synch1route::W`](W) writer structure"] +impl crate::Writable for Prs0Synch1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_SYNCH1ROUTE to value 0"] -impl crate::Resettable for PRS0_SYNCH1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Synch1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_synch2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_synch2route.rs index 96aafa5..619f279 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_synch2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_synch2route.rs @@ -1,95 +1,55 @@ #[doc = "Register `PRS0_SYNCH2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_SYNCH2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - SYNCH2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - SYNCH2 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_SYNCH2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - SYNCH2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - SYNCH2 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_SYNCH2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - SYNCH2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - SYNCH2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - SYNCH2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - SYNCH2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "SYNCH2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_synch2route](index.html) module"] -pub struct PRS0_SYNCH2ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_SYNCH2ROUTE_SPEC { +#[doc = "SYNCH2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_synch2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_synch2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Synch2routeSpec; +impl crate::RegisterSpec for Prs0Synch2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_synch2route::R](R) reader structure"] -impl crate::Readable for PRS0_SYNCH2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_synch2route::W](W) writer structure"] -impl crate::Writable for PRS0_SYNCH2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_synch2route::R`](R) reader structure"] +impl crate::Readable for Prs0Synch2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_synch2route::W`](W) writer structure"] +impl crate::Writable for Prs0Synch2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_SYNCH2ROUTE to value 0"] -impl crate::Resettable for PRS0_SYNCH2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Synch2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_synch3route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_synch3route.rs index abf6a4f..fce4917 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_synch3route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/prs0_synch3route.rs @@ -1,95 +1,55 @@ #[doc = "Register `PRS0_SYNCH3ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRS0_SYNCH3ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - SYNCH3 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - SYNCH3 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_SYNCH3ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - SYNCH3 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - SYNCH3 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PRS0_SYNCH3ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - SYNCH3 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - SYNCH3 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - SYNCH3 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - SYNCH3 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "SYNCH3 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prs0_synch3route](index.html) module"] -pub struct PRS0_SYNCH3ROUTE_SPEC; -impl crate::RegisterSpec for PRS0_SYNCH3ROUTE_SPEC { +#[doc = "SYNCH3 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`prs0_synch3route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs0_synch3route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Prs0Synch3routeSpec; +impl crate::RegisterSpec for Prs0Synch3routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prs0_synch3route::R](R) reader structure"] -impl crate::Readable for PRS0_SYNCH3ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prs0_synch3route::W](W) writer structure"] -impl crate::Writable for PRS0_SYNCH3ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prs0_synch3route::R`](R) reader structure"] +impl crate::Readable for Prs0Synch3routeSpec {} +#[doc = "`write(|w| ..)` method takes [`prs0_synch3route::W`](W) writer structure"] +impl crate::Writable for Prs0Synch3routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS0_SYNCH3ROUTE to value 0"] -impl crate::Resettable for PRS0_SYNCH3ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Prs0Synch3routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/syxo0_bufoutreqinasyncroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/syxo0_bufoutreqinasyncroute.rs index 7623953..3475712 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/syxo0_bufoutreqinasyncroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/syxo0_bufoutreqinasyncroute.rs @@ -1,97 +1,55 @@ #[doc = "Register `SYXO0_BUFOUTREQINASYNCROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SYXO0_BUFOUTREQINASYNCROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - BUFOUTREQINASYNC port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - BUFOUTREQINASYNC port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYXO0_BUFOUTREQINASYNCROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - BUFOUTREQINASYNC pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - BUFOUTREQINASYNC pin select register"] -pub type PIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYXO0_BUFOUTREQINASYNCROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - BUFOUTREQINASYNC port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - BUFOUTREQINASYNC pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - BUFOUTREQINASYNC port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - BUFOUTREQINASYNC pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "BUFOUTREQINASYNC port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syxo0_bufoutreqinasyncroute](index.html) module"] -pub struct SYXO0_BUFOUTREQINASYNCROUTE_SPEC; -impl crate::RegisterSpec for SYXO0_BUFOUTREQINASYNCROUTE_SPEC { +#[doc = "BUFOUTREQINASYNC port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`syxo0_bufoutreqinasyncroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`syxo0_bufoutreqinasyncroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Syxo0BufoutreqinasyncrouteSpec; +impl crate::RegisterSpec for Syxo0BufoutreqinasyncrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [syxo0_bufoutreqinasyncroute::R](R) reader structure"] -impl crate::Readable for SYXO0_BUFOUTREQINASYNCROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [syxo0_bufoutreqinasyncroute::W](W) writer structure"] -impl crate::Writable for SYXO0_BUFOUTREQINASYNCROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`syxo0_bufoutreqinasyncroute::R`](R) reader structure"] +impl crate::Readable for Syxo0BufoutreqinasyncrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`syxo0_bufoutreqinasyncroute::W`](W) writer structure"] +impl crate::Writable for Syxo0BufoutreqinasyncrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYXO0_BUFOUTREQINASYNCROUTE to value 0"] -impl crate::Resettable for SYXO0_BUFOUTREQINASYNCROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Syxo0BufoutreqinasyncrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_cc0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_cc0route.rs index 481c8b3..4ec2bdb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_cc0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_cc0route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER0_CC0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER0_CC0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC0 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER0_CC0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER0_CC0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer0_cc0route](index.html) module"] -pub struct TIMER0_CC0ROUTE_SPEC; -impl crate::RegisterSpec for TIMER0_CC0ROUTE_SPEC { +#[doc = "CC0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_cc0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_cc0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer0Cc0routeSpec; +impl crate::RegisterSpec for Timer0Cc0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer0_cc0route::R](R) reader structure"] -impl crate::Readable for TIMER0_CC0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer0_cc0route::W](W) writer structure"] -impl crate::Writable for TIMER0_CC0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer0_cc0route::R`](R) reader structure"] +impl crate::Readable for Timer0Cc0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer0_cc0route::W`](W) writer structure"] +impl crate::Writable for Timer0Cc0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER0_CC0ROUTE to value 0"] -impl crate::Resettable for TIMER0_CC0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer0Cc0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_cc1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_cc1route.rs index 6799a3f..d936c44 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_cc1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_cc1route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER0_CC1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER0_CC1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC1 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER0_CC1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER0_CC1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer0_cc1route](index.html) module"] -pub struct TIMER0_CC1ROUTE_SPEC; -impl crate::RegisterSpec for TIMER0_CC1ROUTE_SPEC { +#[doc = "CC1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_cc1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_cc1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer0Cc1routeSpec; +impl crate::RegisterSpec for Timer0Cc1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer0_cc1route::R](R) reader structure"] -impl crate::Readable for TIMER0_CC1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer0_cc1route::W](W) writer structure"] -impl crate::Writable for TIMER0_CC1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer0_cc1route::R`](R) reader structure"] +impl crate::Readable for Timer0Cc1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer0_cc1route::W`](W) writer structure"] +impl crate::Writable for Timer0Cc1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER0_CC1ROUTE to value 0"] -impl crate::Resettable for TIMER0_CC1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer0Cc1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_cc2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_cc2route.rs index 5f690f5..6693a63 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_cc2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_cc2route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER0_CC2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER0_CC2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC2 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER0_CC2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC2 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER0_CC2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer0_cc2route](index.html) module"] -pub struct TIMER0_CC2ROUTE_SPEC; -impl crate::RegisterSpec for TIMER0_CC2ROUTE_SPEC { +#[doc = "CC2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_cc2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_cc2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer0Cc2routeSpec; +impl crate::RegisterSpec for Timer0Cc2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer0_cc2route::R](R) reader structure"] -impl crate::Readable for TIMER0_CC2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer0_cc2route::W](W) writer structure"] -impl crate::Writable for TIMER0_CC2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer0_cc2route::R`](R) reader structure"] +impl crate::Readable for Timer0Cc2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer0_cc2route::W`](W) writer structure"] +impl crate::Writable for Timer0Cc2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER0_CC2ROUTE to value 0"] -impl crate::Resettable for TIMER0_CC2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer0Cc2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_cdti0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_cdti0route.rs index a5c05da..9a7d623 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_cdti0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_cdti0route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER0_CDTI0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER0_CDTI0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI0 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER0_CDTI0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER0_CDTI0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer0_cdti0route](index.html) module"] -pub struct TIMER0_CDTI0ROUTE_SPEC; -impl crate::RegisterSpec for TIMER0_CDTI0ROUTE_SPEC { +#[doc = "CDTI0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_cdti0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_cdti0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer0Cdti0routeSpec; +impl crate::RegisterSpec for Timer0Cdti0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer0_cdti0route::R](R) reader structure"] -impl crate::Readable for TIMER0_CDTI0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer0_cdti0route::W](W) writer structure"] -impl crate::Writable for TIMER0_CDTI0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer0_cdti0route::R`](R) reader structure"] +impl crate::Readable for Timer0Cdti0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer0_cdti0route::W`](W) writer structure"] +impl crate::Writable for Timer0Cdti0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER0_CDTI0ROUTE to value 0"] -impl crate::Resettable for TIMER0_CDTI0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer0Cdti0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_cdti1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_cdti1route.rs index a620e22..09cad0e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_cdti1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_cdti1route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER0_CDTI1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER0_CDTI1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI1 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER0_CDTI1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER0_CDTI1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer0_cdti1route](index.html) module"] -pub struct TIMER0_CDTI1ROUTE_SPEC; -impl crate::RegisterSpec for TIMER0_CDTI1ROUTE_SPEC { +#[doc = "CDTI1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_cdti1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_cdti1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer0Cdti1routeSpec; +impl crate::RegisterSpec for Timer0Cdti1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer0_cdti1route::R](R) reader structure"] -impl crate::Readable for TIMER0_CDTI1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer0_cdti1route::W](W) writer structure"] -impl crate::Writable for TIMER0_CDTI1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer0_cdti1route::R`](R) reader structure"] +impl crate::Readable for Timer0Cdti1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer0_cdti1route::W`](W) writer structure"] +impl crate::Writable for Timer0Cdti1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER0_CDTI1ROUTE to value 0"] -impl crate::Resettable for TIMER0_CDTI1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer0Cdti1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_cdti2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_cdti2route.rs index 357f788..17e3409 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_cdti2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_cdti2route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER0_CDTI2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER0_CDTI2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI2 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER0_CDTI2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI2 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER0_CDTI2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer0_cdti2route](index.html) module"] -pub struct TIMER0_CDTI2ROUTE_SPEC; -impl crate::RegisterSpec for TIMER0_CDTI2ROUTE_SPEC { +#[doc = "CDTI2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_cdti2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_cdti2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer0Cdti2routeSpec; +impl crate::RegisterSpec for Timer0Cdti2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer0_cdti2route::R](R) reader structure"] -impl crate::Readable for TIMER0_CDTI2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer0_cdti2route::W](W) writer structure"] -impl crate::Writable for TIMER0_CDTI2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer0_cdti2route::R`](R) reader structure"] +impl crate::Readable for Timer0Cdti2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer0_cdti2route::W`](W) writer structure"] +impl crate::Writable for Timer0Cdti2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER0_CDTI2ROUTE to value 0"] -impl crate::Resettable for TIMER0_CDTI2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer0Cdti2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_routeen.rs index c1973c4..17f88c6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer0_routeen.rs @@ -1,155 +1,115 @@ #[doc = "Register `TIMER0_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER0_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CC0PEN` reader - CC0 pin enable control bit"] -pub type CC0PEN_R = crate::BitReader; +pub type Cc0penR = crate::BitReader; #[doc = "Field `CC0PEN` writer - CC0 pin enable control bit"] -pub type CC0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER0_ROUTEEN_SPEC, bool, O>; +pub type Cc0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1PEN` reader - CC1 pin enable control bit"] -pub type CC1PEN_R = crate::BitReader; +pub type Cc1penR = crate::BitReader; #[doc = "Field `CC1PEN` writer - CC1 pin enable control bit"] -pub type CC1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER0_ROUTEEN_SPEC, bool, O>; +pub type Cc1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2PEN` reader - CC2 pin enable control bit"] -pub type CC2PEN_R = crate::BitReader; +pub type Cc2penR = crate::BitReader; #[doc = "Field `CC2PEN` writer - CC2 pin enable control bit"] -pub type CC2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER0_ROUTEEN_SPEC, bool, O>; +pub type Cc2penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC0PEN` reader - CDTI0 pin enable control bit"] -pub type CCC0PEN_R = crate::BitReader; +pub type Ccc0penR = crate::BitReader; #[doc = "Field `CCC0PEN` writer - CDTI0 pin enable control bit"] -pub type CCC0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER0_ROUTEEN_SPEC, bool, O>; +pub type Ccc0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC1PEN` reader - CDTI1 pin enable control bit"] -pub type CCC1PEN_R = crate::BitReader; +pub type Ccc1penR = crate::BitReader; #[doc = "Field `CCC1PEN` writer - CDTI1 pin enable control bit"] -pub type CCC1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER0_ROUTEEN_SPEC, bool, O>; +pub type Ccc1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC2PEN` reader - CDTI2 pin enable control bit"] -pub type CCC2PEN_R = crate::BitReader; +pub type Ccc2penR = crate::BitReader; #[doc = "Field `CCC2PEN` writer - CDTI2 pin enable control bit"] -pub type CCC2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER0_ROUTEEN_SPEC, bool, O>; +pub type Ccc2penW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CC0 pin enable control bit"] #[inline(always)] - pub fn cc0pen(&self) -> CC0PEN_R { - CC0PEN_R::new((self.bits & 1) != 0) + pub fn cc0pen(&self) -> Cc0penR { + Cc0penR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CC1 pin enable control bit"] #[inline(always)] - pub fn cc1pen(&self) -> CC1PEN_R { - CC1PEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn cc1pen(&self) -> Cc1penR { + Cc1penR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CC2 pin enable control bit"] #[inline(always)] - pub fn cc2pen(&self) -> CC2PEN_R { - CC2PEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn cc2pen(&self) -> Cc2penR { + Cc2penR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - CDTI0 pin enable control bit"] #[inline(always)] - pub fn ccc0pen(&self) -> CCC0PEN_R { - CCC0PEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn ccc0pen(&self) -> Ccc0penR { + Ccc0penR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - CDTI1 pin enable control bit"] #[inline(always)] - pub fn ccc1pen(&self) -> CCC1PEN_R { - CCC1PEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn ccc1pen(&self) -> Ccc1penR { + Ccc1penR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CDTI2 pin enable control bit"] #[inline(always)] - pub fn ccc2pen(&self) -> CCC2PEN_R { - CCC2PEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn ccc2pen(&self) -> Ccc2penR { + Ccc2penR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - CC0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc0pen(&mut self) -> CC0PEN_W<0> { - CC0PEN_W::new(self) + pub fn cc0pen(&mut self) -> Cc0penW { + Cc0penW::new(self, 0) } #[doc = "Bit 1 - CC1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc1pen(&mut self) -> CC1PEN_W<1> { - CC1PEN_W::new(self) + pub fn cc1pen(&mut self) -> Cc1penW { + Cc1penW::new(self, 1) } #[doc = "Bit 2 - CC2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc2pen(&mut self) -> CC2PEN_W<2> { - CC2PEN_W::new(self) + pub fn cc2pen(&mut self) -> Cc2penW { + Cc2penW::new(self, 2) } #[doc = "Bit 3 - CDTI0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc0pen(&mut self) -> CCC0PEN_W<3> { - CCC0PEN_W::new(self) + pub fn ccc0pen(&mut self) -> Ccc0penW { + Ccc0penW::new(self, 3) } #[doc = "Bit 4 - CDTI1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc1pen(&mut self) -> CCC1PEN_W<4> { - CCC1PEN_W::new(self) + pub fn ccc1pen(&mut self) -> Ccc1penW { + Ccc1penW::new(self, 4) } #[doc = "Bit 5 - CDTI2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc2pen(&mut self) -> CCC2PEN_W<5> { - CCC2PEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ccc2pen(&mut self) -> Ccc2penW { + Ccc2penW::new(self, 5) } } -#[doc = "TIMER0 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer0_routeen](index.html) module"] -pub struct TIMER0_ROUTEEN_SPEC; -impl crate::RegisterSpec for TIMER0_ROUTEEN_SPEC { +#[doc = "TIMER0 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`timer0_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer0_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer0RouteenSpec; +impl crate::RegisterSpec for Timer0RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer0_routeen::R](R) reader structure"] -impl crate::Readable for TIMER0_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer0_routeen::W](W) writer structure"] -impl crate::Writable for TIMER0_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer0_routeen::R`](R) reader structure"] +impl crate::Readable for Timer0RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`timer0_routeen::W`](W) writer structure"] +impl crate::Writable for Timer0RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER0_ROUTEEN to value 0"] -impl crate::Resettable for TIMER0_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer0RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_cc0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_cc0route.rs index 8670b50..fad29a0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_cc0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_cc0route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER1_CC0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER1_CC0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC0 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER1_CC0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER1_CC0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer1_cc0route](index.html) module"] -pub struct TIMER1_CC0ROUTE_SPEC; -impl crate::RegisterSpec for TIMER1_CC0ROUTE_SPEC { +#[doc = "CC0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_cc0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_cc0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer1Cc0routeSpec; +impl crate::RegisterSpec for Timer1Cc0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer1_cc0route::R](R) reader structure"] -impl crate::Readable for TIMER1_CC0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer1_cc0route::W](W) writer structure"] -impl crate::Writable for TIMER1_CC0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer1_cc0route::R`](R) reader structure"] +impl crate::Readable for Timer1Cc0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer1_cc0route::W`](W) writer structure"] +impl crate::Writable for Timer1Cc0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER1_CC0ROUTE to value 0"] -impl crate::Resettable for TIMER1_CC0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer1Cc0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_cc1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_cc1route.rs index 8eac1ce..100f473 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_cc1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_cc1route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER1_CC1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER1_CC1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC1 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER1_CC1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER1_CC1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer1_cc1route](index.html) module"] -pub struct TIMER1_CC1ROUTE_SPEC; -impl crate::RegisterSpec for TIMER1_CC1ROUTE_SPEC { +#[doc = "CC1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_cc1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_cc1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer1Cc1routeSpec; +impl crate::RegisterSpec for Timer1Cc1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer1_cc1route::R](R) reader structure"] -impl crate::Readable for TIMER1_CC1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer1_cc1route::W](W) writer structure"] -impl crate::Writable for TIMER1_CC1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer1_cc1route::R`](R) reader structure"] +impl crate::Readable for Timer1Cc1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer1_cc1route::W`](W) writer structure"] +impl crate::Writable for Timer1Cc1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER1_CC1ROUTE to value 0"] -impl crate::Resettable for TIMER1_CC1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer1Cc1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_cc2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_cc2route.rs index 60fd04b..f01efc6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_cc2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_cc2route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER1_CC2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER1_CC2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC2 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER1_CC2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC2 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER1_CC2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer1_cc2route](index.html) module"] -pub struct TIMER1_CC2ROUTE_SPEC; -impl crate::RegisterSpec for TIMER1_CC2ROUTE_SPEC { +#[doc = "CC2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_cc2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_cc2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer1Cc2routeSpec; +impl crate::RegisterSpec for Timer1Cc2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer1_cc2route::R](R) reader structure"] -impl crate::Readable for TIMER1_CC2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer1_cc2route::W](W) writer structure"] -impl crate::Writable for TIMER1_CC2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer1_cc2route::R`](R) reader structure"] +impl crate::Readable for Timer1Cc2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer1_cc2route::W`](W) writer structure"] +impl crate::Writable for Timer1Cc2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER1_CC2ROUTE to value 0"] -impl crate::Resettable for TIMER1_CC2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer1Cc2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_cdti0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_cdti0route.rs index d07608d..7533392 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_cdti0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_cdti0route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER1_CDTI0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER1_CDTI0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI0 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER1_CDTI0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER1_CDTI0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer1_cdti0route](index.html) module"] -pub struct TIMER1_CDTI0ROUTE_SPEC; -impl crate::RegisterSpec for TIMER1_CDTI0ROUTE_SPEC { +#[doc = "CDTI0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_cdti0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_cdti0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer1Cdti0routeSpec; +impl crate::RegisterSpec for Timer1Cdti0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer1_cdti0route::R](R) reader structure"] -impl crate::Readable for TIMER1_CDTI0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer1_cdti0route::W](W) writer structure"] -impl crate::Writable for TIMER1_CDTI0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer1_cdti0route::R`](R) reader structure"] +impl crate::Readable for Timer1Cdti0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer1_cdti0route::W`](W) writer structure"] +impl crate::Writable for Timer1Cdti0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER1_CDTI0ROUTE to value 0"] -impl crate::Resettable for TIMER1_CDTI0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer1Cdti0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_cdti1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_cdti1route.rs index 4002b2f..709af15 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_cdti1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_cdti1route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER1_CDTI1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER1_CDTI1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI1 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER1_CDTI1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER1_CDTI1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer1_cdti1route](index.html) module"] -pub struct TIMER1_CDTI1ROUTE_SPEC; -impl crate::RegisterSpec for TIMER1_CDTI1ROUTE_SPEC { +#[doc = "CDTI1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_cdti1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_cdti1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer1Cdti1routeSpec; +impl crate::RegisterSpec for Timer1Cdti1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer1_cdti1route::R](R) reader structure"] -impl crate::Readable for TIMER1_CDTI1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer1_cdti1route::W](W) writer structure"] -impl crate::Writable for TIMER1_CDTI1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer1_cdti1route::R`](R) reader structure"] +impl crate::Readable for Timer1Cdti1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer1_cdti1route::W`](W) writer structure"] +impl crate::Writable for Timer1Cdti1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER1_CDTI1ROUTE to value 0"] -impl crate::Resettable for TIMER1_CDTI1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer1Cdti1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_cdti2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_cdti2route.rs index 522f509..1c29939 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_cdti2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_cdti2route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER1_CDTI2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER1_CDTI2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI2 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER1_CDTI2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI2 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER1_CDTI2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer1_cdti2route](index.html) module"] -pub struct TIMER1_CDTI2ROUTE_SPEC; -impl crate::RegisterSpec for TIMER1_CDTI2ROUTE_SPEC { +#[doc = "CDTI2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_cdti2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_cdti2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer1Cdti2routeSpec; +impl crate::RegisterSpec for Timer1Cdti2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer1_cdti2route::R](R) reader structure"] -impl crate::Readable for TIMER1_CDTI2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer1_cdti2route::W](W) writer structure"] -impl crate::Writable for TIMER1_CDTI2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer1_cdti2route::R`](R) reader structure"] +impl crate::Readable for Timer1Cdti2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer1_cdti2route::W`](W) writer structure"] +impl crate::Writable for Timer1Cdti2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER1_CDTI2ROUTE to value 0"] -impl crate::Resettable for TIMER1_CDTI2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer1Cdti2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_routeen.rs index a6d053e..5549ab0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer1_routeen.rs @@ -1,155 +1,115 @@ #[doc = "Register `TIMER1_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER1_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CC0PEN` reader - CC0 pin enable control bit"] -pub type CC0PEN_R = crate::BitReader; +pub type Cc0penR = crate::BitReader; #[doc = "Field `CC0PEN` writer - CC0 pin enable control bit"] -pub type CC0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER1_ROUTEEN_SPEC, bool, O>; +pub type Cc0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1PEN` reader - CC1 pin enable control bit"] -pub type CC1PEN_R = crate::BitReader; +pub type Cc1penR = crate::BitReader; #[doc = "Field `CC1PEN` writer - CC1 pin enable control bit"] -pub type CC1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER1_ROUTEEN_SPEC, bool, O>; +pub type Cc1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2PEN` reader - CC2 pin enable control bit"] -pub type CC2PEN_R = crate::BitReader; +pub type Cc2penR = crate::BitReader; #[doc = "Field `CC2PEN` writer - CC2 pin enable control bit"] -pub type CC2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER1_ROUTEEN_SPEC, bool, O>; +pub type Cc2penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC0PEN` reader - CDTI0 pin enable control bit"] -pub type CCC0PEN_R = crate::BitReader; +pub type Ccc0penR = crate::BitReader; #[doc = "Field `CCC0PEN` writer - CDTI0 pin enable control bit"] -pub type CCC0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER1_ROUTEEN_SPEC, bool, O>; +pub type Ccc0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC1PEN` reader - CDTI1 pin enable control bit"] -pub type CCC1PEN_R = crate::BitReader; +pub type Ccc1penR = crate::BitReader; #[doc = "Field `CCC1PEN` writer - CDTI1 pin enable control bit"] -pub type CCC1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER1_ROUTEEN_SPEC, bool, O>; +pub type Ccc1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC2PEN` reader - CDTI2 pin enable control bit"] -pub type CCC2PEN_R = crate::BitReader; +pub type Ccc2penR = crate::BitReader; #[doc = "Field `CCC2PEN` writer - CDTI2 pin enable control bit"] -pub type CCC2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER1_ROUTEEN_SPEC, bool, O>; +pub type Ccc2penW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CC0 pin enable control bit"] #[inline(always)] - pub fn cc0pen(&self) -> CC0PEN_R { - CC0PEN_R::new((self.bits & 1) != 0) + pub fn cc0pen(&self) -> Cc0penR { + Cc0penR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CC1 pin enable control bit"] #[inline(always)] - pub fn cc1pen(&self) -> CC1PEN_R { - CC1PEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn cc1pen(&self) -> Cc1penR { + Cc1penR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CC2 pin enable control bit"] #[inline(always)] - pub fn cc2pen(&self) -> CC2PEN_R { - CC2PEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn cc2pen(&self) -> Cc2penR { + Cc2penR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - CDTI0 pin enable control bit"] #[inline(always)] - pub fn ccc0pen(&self) -> CCC0PEN_R { - CCC0PEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn ccc0pen(&self) -> Ccc0penR { + Ccc0penR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - CDTI1 pin enable control bit"] #[inline(always)] - pub fn ccc1pen(&self) -> CCC1PEN_R { - CCC1PEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn ccc1pen(&self) -> Ccc1penR { + Ccc1penR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CDTI2 pin enable control bit"] #[inline(always)] - pub fn ccc2pen(&self) -> CCC2PEN_R { - CCC2PEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn ccc2pen(&self) -> Ccc2penR { + Ccc2penR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - CC0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc0pen(&mut self) -> CC0PEN_W<0> { - CC0PEN_W::new(self) + pub fn cc0pen(&mut self) -> Cc0penW { + Cc0penW::new(self, 0) } #[doc = "Bit 1 - CC1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc1pen(&mut self) -> CC1PEN_W<1> { - CC1PEN_W::new(self) + pub fn cc1pen(&mut self) -> Cc1penW { + Cc1penW::new(self, 1) } #[doc = "Bit 2 - CC2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc2pen(&mut self) -> CC2PEN_W<2> { - CC2PEN_W::new(self) + pub fn cc2pen(&mut self) -> Cc2penW { + Cc2penW::new(self, 2) } #[doc = "Bit 3 - CDTI0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc0pen(&mut self) -> CCC0PEN_W<3> { - CCC0PEN_W::new(self) + pub fn ccc0pen(&mut self) -> Ccc0penW { + Ccc0penW::new(self, 3) } #[doc = "Bit 4 - CDTI1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc1pen(&mut self) -> CCC1PEN_W<4> { - CCC1PEN_W::new(self) + pub fn ccc1pen(&mut self) -> Ccc1penW { + Ccc1penW::new(self, 4) } #[doc = "Bit 5 - CDTI2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc2pen(&mut self) -> CCC2PEN_W<5> { - CCC2PEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ccc2pen(&mut self) -> Ccc2penW { + Ccc2penW::new(self, 5) } } -#[doc = "TIMER1 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer1_routeen](index.html) module"] -pub struct TIMER1_ROUTEEN_SPEC; -impl crate::RegisterSpec for TIMER1_ROUTEEN_SPEC { +#[doc = "TIMER1 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`timer1_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer1_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer1RouteenSpec; +impl crate::RegisterSpec for Timer1RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer1_routeen::R](R) reader structure"] -impl crate::Readable for TIMER1_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer1_routeen::W](W) writer structure"] -impl crate::Writable for TIMER1_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer1_routeen::R`](R) reader structure"] +impl crate::Readable for Timer1RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`timer1_routeen::W`](W) writer structure"] +impl crate::Writable for Timer1RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER1_ROUTEEN to value 0"] -impl crate::Resettable for TIMER1_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer1RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_cc0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_cc0route.rs index fde8ba1..5bb7929 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_cc0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_cc0route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER2_CC0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER2_CC0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC0 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER2_CC0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER2_CC0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer2_cc0route](index.html) module"] -pub struct TIMER2_CC0ROUTE_SPEC; -impl crate::RegisterSpec for TIMER2_CC0ROUTE_SPEC { +#[doc = "CC0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_cc0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_cc0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer2Cc0routeSpec; +impl crate::RegisterSpec for Timer2Cc0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer2_cc0route::R](R) reader structure"] -impl crate::Readable for TIMER2_CC0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer2_cc0route::W](W) writer structure"] -impl crate::Writable for TIMER2_CC0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer2_cc0route::R`](R) reader structure"] +impl crate::Readable for Timer2Cc0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer2_cc0route::W`](W) writer structure"] +impl crate::Writable for Timer2Cc0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER2_CC0ROUTE to value 0"] -impl crate::Resettable for TIMER2_CC0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer2Cc0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_cc1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_cc1route.rs index c7360e9..1387809 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_cc1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_cc1route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER2_CC1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER2_CC1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC1 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER2_CC1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER2_CC1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer2_cc1route](index.html) module"] -pub struct TIMER2_CC1ROUTE_SPEC; -impl crate::RegisterSpec for TIMER2_CC1ROUTE_SPEC { +#[doc = "CC1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_cc1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_cc1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer2Cc1routeSpec; +impl crate::RegisterSpec for Timer2Cc1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer2_cc1route::R](R) reader structure"] -impl crate::Readable for TIMER2_CC1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer2_cc1route::W](W) writer structure"] -impl crate::Writable for TIMER2_CC1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer2_cc1route::R`](R) reader structure"] +impl crate::Readable for Timer2Cc1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer2_cc1route::W`](W) writer structure"] +impl crate::Writable for Timer2Cc1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER2_CC1ROUTE to value 0"] -impl crate::Resettable for TIMER2_CC1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer2Cc1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_cc2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_cc2route.rs index d3f18b0..e151f34 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_cc2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_cc2route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER2_CC2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER2_CC2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC2 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER2_CC2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC2 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER2_CC2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer2_cc2route](index.html) module"] -pub struct TIMER2_CC2ROUTE_SPEC; -impl crate::RegisterSpec for TIMER2_CC2ROUTE_SPEC { +#[doc = "CC2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_cc2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_cc2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer2Cc2routeSpec; +impl crate::RegisterSpec for Timer2Cc2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer2_cc2route::R](R) reader structure"] -impl crate::Readable for TIMER2_CC2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer2_cc2route::W](W) writer structure"] -impl crate::Writable for TIMER2_CC2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer2_cc2route::R`](R) reader structure"] +impl crate::Readable for Timer2Cc2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer2_cc2route::W`](W) writer structure"] +impl crate::Writable for Timer2Cc2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER2_CC2ROUTE to value 0"] -impl crate::Resettable for TIMER2_CC2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer2Cc2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_cdti0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_cdti0route.rs index d9bfe1c..47cf68a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_cdti0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_cdti0route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER2_CDTI0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER2_CDTI0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI0 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER2_CDTI0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER2_CDTI0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer2_cdti0route](index.html) module"] -pub struct TIMER2_CDTI0ROUTE_SPEC; -impl crate::RegisterSpec for TIMER2_CDTI0ROUTE_SPEC { +#[doc = "CDTI0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_cdti0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_cdti0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer2Cdti0routeSpec; +impl crate::RegisterSpec for Timer2Cdti0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer2_cdti0route::R](R) reader structure"] -impl crate::Readable for TIMER2_CDTI0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer2_cdti0route::W](W) writer structure"] -impl crate::Writable for TIMER2_CDTI0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer2_cdti0route::R`](R) reader structure"] +impl crate::Readable for Timer2Cdti0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer2_cdti0route::W`](W) writer structure"] +impl crate::Writable for Timer2Cdti0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER2_CDTI0ROUTE to value 0"] -impl crate::Resettable for TIMER2_CDTI0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer2Cdti0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_cdti1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_cdti1route.rs index 90f4c8c..9c7c030 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_cdti1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_cdti1route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER2_CDTI1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER2_CDTI1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI1 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER2_CDTI1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER2_CDTI1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer2_cdti1route](index.html) module"] -pub struct TIMER2_CDTI1ROUTE_SPEC; -impl crate::RegisterSpec for TIMER2_CDTI1ROUTE_SPEC { +#[doc = "CDTI1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_cdti1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_cdti1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer2Cdti1routeSpec; +impl crate::RegisterSpec for Timer2Cdti1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer2_cdti1route::R](R) reader structure"] -impl crate::Readable for TIMER2_CDTI1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer2_cdti1route::W](W) writer structure"] -impl crate::Writable for TIMER2_CDTI1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer2_cdti1route::R`](R) reader structure"] +impl crate::Readable for Timer2Cdti1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer2_cdti1route::W`](W) writer structure"] +impl crate::Writable for Timer2Cdti1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER2_CDTI1ROUTE to value 0"] -impl crate::Resettable for TIMER2_CDTI1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer2Cdti1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_cdti2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_cdti2route.rs index 4d4ab33..95bcb73 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_cdti2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_cdti2route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER2_CDTI2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER2_CDTI2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI2 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER2_CDTI2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI2 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER2_CDTI2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer2_cdti2route](index.html) module"] -pub struct TIMER2_CDTI2ROUTE_SPEC; -impl crate::RegisterSpec for TIMER2_CDTI2ROUTE_SPEC { +#[doc = "CDTI2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_cdti2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_cdti2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer2Cdti2routeSpec; +impl crate::RegisterSpec for Timer2Cdti2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer2_cdti2route::R](R) reader structure"] -impl crate::Readable for TIMER2_CDTI2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer2_cdti2route::W](W) writer structure"] -impl crate::Writable for TIMER2_CDTI2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer2_cdti2route::R`](R) reader structure"] +impl crate::Readable for Timer2Cdti2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer2_cdti2route::W`](W) writer structure"] +impl crate::Writable for Timer2Cdti2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER2_CDTI2ROUTE to value 0"] -impl crate::Resettable for TIMER2_CDTI2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer2Cdti2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_routeen.rs index 0aca82a..b0505d1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer2_routeen.rs @@ -1,155 +1,115 @@ #[doc = "Register `TIMER2_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER2_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CC0PEN` reader - CC0 pin enable control bit"] -pub type CC0PEN_R = crate::BitReader; +pub type Cc0penR = crate::BitReader; #[doc = "Field `CC0PEN` writer - CC0 pin enable control bit"] -pub type CC0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER2_ROUTEEN_SPEC, bool, O>; +pub type Cc0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1PEN` reader - CC1 pin enable control bit"] -pub type CC1PEN_R = crate::BitReader; +pub type Cc1penR = crate::BitReader; #[doc = "Field `CC1PEN` writer - CC1 pin enable control bit"] -pub type CC1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER2_ROUTEEN_SPEC, bool, O>; +pub type Cc1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2PEN` reader - CC2 pin enable control bit"] -pub type CC2PEN_R = crate::BitReader; +pub type Cc2penR = crate::BitReader; #[doc = "Field `CC2PEN` writer - CC2 pin enable control bit"] -pub type CC2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER2_ROUTEEN_SPEC, bool, O>; +pub type Cc2penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC0PEN` reader - CDTI0 pin enable control bit"] -pub type CCC0PEN_R = crate::BitReader; +pub type Ccc0penR = crate::BitReader; #[doc = "Field `CCC0PEN` writer - CDTI0 pin enable control bit"] -pub type CCC0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER2_ROUTEEN_SPEC, bool, O>; +pub type Ccc0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC1PEN` reader - CDTI1 pin enable control bit"] -pub type CCC1PEN_R = crate::BitReader; +pub type Ccc1penR = crate::BitReader; #[doc = "Field `CCC1PEN` writer - CDTI1 pin enable control bit"] -pub type CCC1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER2_ROUTEEN_SPEC, bool, O>; +pub type Ccc1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC2PEN` reader - CDTI2 pin enable control bit"] -pub type CCC2PEN_R = crate::BitReader; +pub type Ccc2penR = crate::BitReader; #[doc = "Field `CCC2PEN` writer - CDTI2 pin enable control bit"] -pub type CCC2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER2_ROUTEEN_SPEC, bool, O>; +pub type Ccc2penW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CC0 pin enable control bit"] #[inline(always)] - pub fn cc0pen(&self) -> CC0PEN_R { - CC0PEN_R::new((self.bits & 1) != 0) + pub fn cc0pen(&self) -> Cc0penR { + Cc0penR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CC1 pin enable control bit"] #[inline(always)] - pub fn cc1pen(&self) -> CC1PEN_R { - CC1PEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn cc1pen(&self) -> Cc1penR { + Cc1penR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CC2 pin enable control bit"] #[inline(always)] - pub fn cc2pen(&self) -> CC2PEN_R { - CC2PEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn cc2pen(&self) -> Cc2penR { + Cc2penR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - CDTI0 pin enable control bit"] #[inline(always)] - pub fn ccc0pen(&self) -> CCC0PEN_R { - CCC0PEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn ccc0pen(&self) -> Ccc0penR { + Ccc0penR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - CDTI1 pin enable control bit"] #[inline(always)] - pub fn ccc1pen(&self) -> CCC1PEN_R { - CCC1PEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn ccc1pen(&self) -> Ccc1penR { + Ccc1penR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CDTI2 pin enable control bit"] #[inline(always)] - pub fn ccc2pen(&self) -> CCC2PEN_R { - CCC2PEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn ccc2pen(&self) -> Ccc2penR { + Ccc2penR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - CC0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc0pen(&mut self) -> CC0PEN_W<0> { - CC0PEN_W::new(self) + pub fn cc0pen(&mut self) -> Cc0penW { + Cc0penW::new(self, 0) } #[doc = "Bit 1 - CC1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc1pen(&mut self) -> CC1PEN_W<1> { - CC1PEN_W::new(self) + pub fn cc1pen(&mut self) -> Cc1penW { + Cc1penW::new(self, 1) } #[doc = "Bit 2 - CC2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc2pen(&mut self) -> CC2PEN_W<2> { - CC2PEN_W::new(self) + pub fn cc2pen(&mut self) -> Cc2penW { + Cc2penW::new(self, 2) } #[doc = "Bit 3 - CDTI0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc0pen(&mut self) -> CCC0PEN_W<3> { - CCC0PEN_W::new(self) + pub fn ccc0pen(&mut self) -> Ccc0penW { + Ccc0penW::new(self, 3) } #[doc = "Bit 4 - CDTI1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc1pen(&mut self) -> CCC1PEN_W<4> { - CCC1PEN_W::new(self) + pub fn ccc1pen(&mut self) -> Ccc1penW { + Ccc1penW::new(self, 4) } #[doc = "Bit 5 - CDTI2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc2pen(&mut self) -> CCC2PEN_W<5> { - CCC2PEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ccc2pen(&mut self) -> Ccc2penW { + Ccc2penW::new(self, 5) } } -#[doc = "TIMER2 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer2_routeen](index.html) module"] -pub struct TIMER2_ROUTEEN_SPEC; -impl crate::RegisterSpec for TIMER2_ROUTEEN_SPEC { +#[doc = "TIMER2 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer2RouteenSpec; +impl crate::RegisterSpec for Timer2RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer2_routeen::R](R) reader structure"] -impl crate::Readable for TIMER2_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer2_routeen::W](W) writer structure"] -impl crate::Writable for TIMER2_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer2_routeen::R`](R) reader structure"] +impl crate::Readable for Timer2RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`timer2_routeen::W`](W) writer structure"] +impl crate::Writable for Timer2RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER2_ROUTEEN to value 0"] -impl crate::Resettable for TIMER2_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer2RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_cc0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_cc0route.rs index b1809c3..29ee690 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_cc0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_cc0route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER3_CC0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER3_CC0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC0 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER3_CC0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER3_CC0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer3_cc0route](index.html) module"] -pub struct TIMER3_CC0ROUTE_SPEC; -impl crate::RegisterSpec for TIMER3_CC0ROUTE_SPEC { +#[doc = "CC0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_cc0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_cc0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer3Cc0routeSpec; +impl crate::RegisterSpec for Timer3Cc0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer3_cc0route::R](R) reader structure"] -impl crate::Readable for TIMER3_CC0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer3_cc0route::W](W) writer structure"] -impl crate::Writable for TIMER3_CC0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer3_cc0route::R`](R) reader structure"] +impl crate::Readable for Timer3Cc0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer3_cc0route::W`](W) writer structure"] +impl crate::Writable for Timer3Cc0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER3_CC0ROUTE to value 0"] -impl crate::Resettable for TIMER3_CC0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer3Cc0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_cc1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_cc1route.rs index 90a874b..0c2488d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_cc1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_cc1route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER3_CC1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER3_CC1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC1 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER3_CC1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER3_CC1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer3_cc1route](index.html) module"] -pub struct TIMER3_CC1ROUTE_SPEC; -impl crate::RegisterSpec for TIMER3_CC1ROUTE_SPEC { +#[doc = "CC1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_cc1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_cc1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer3Cc1routeSpec; +impl crate::RegisterSpec for Timer3Cc1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer3_cc1route::R](R) reader structure"] -impl crate::Readable for TIMER3_CC1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer3_cc1route::W](W) writer structure"] -impl crate::Writable for TIMER3_CC1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer3_cc1route::R`](R) reader structure"] +impl crate::Readable for Timer3Cc1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer3_cc1route::W`](W) writer structure"] +impl crate::Writable for Timer3Cc1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER3_CC1ROUTE to value 0"] -impl crate::Resettable for TIMER3_CC1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer3Cc1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_cc2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_cc2route.rs index 15c96a3..124f588 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_cc2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_cc2route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER3_CC2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER3_CC2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC2 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER3_CC2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC2 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER3_CC2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer3_cc2route](index.html) module"] -pub struct TIMER3_CC2ROUTE_SPEC; -impl crate::RegisterSpec for TIMER3_CC2ROUTE_SPEC { +#[doc = "CC2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_cc2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_cc2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer3Cc2routeSpec; +impl crate::RegisterSpec for Timer3Cc2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer3_cc2route::R](R) reader structure"] -impl crate::Readable for TIMER3_CC2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer3_cc2route::W](W) writer structure"] -impl crate::Writable for TIMER3_CC2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer3_cc2route::R`](R) reader structure"] +impl crate::Readable for Timer3Cc2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer3_cc2route::W`](W) writer structure"] +impl crate::Writable for Timer3Cc2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER3_CC2ROUTE to value 0"] -impl crate::Resettable for TIMER3_CC2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer3Cc2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_cdti0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_cdti0route.rs index 10932ce..eea08c0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_cdti0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_cdti0route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER3_CDTI0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER3_CDTI0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI0 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER3_CDTI0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER3_CDTI0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer3_cdti0route](index.html) module"] -pub struct TIMER3_CDTI0ROUTE_SPEC; -impl crate::RegisterSpec for TIMER3_CDTI0ROUTE_SPEC { +#[doc = "CDTI0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_cdti0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_cdti0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer3Cdti0routeSpec; +impl crate::RegisterSpec for Timer3Cdti0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer3_cdti0route::R](R) reader structure"] -impl crate::Readable for TIMER3_CDTI0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer3_cdti0route::W](W) writer structure"] -impl crate::Writable for TIMER3_CDTI0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer3_cdti0route::R`](R) reader structure"] +impl crate::Readable for Timer3Cdti0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer3_cdti0route::W`](W) writer structure"] +impl crate::Writable for Timer3Cdti0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER3_CDTI0ROUTE to value 0"] -impl crate::Resettable for TIMER3_CDTI0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer3Cdti0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_cdti1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_cdti1route.rs index 84382a8..7039dab 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_cdti1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_cdti1route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER3_CDTI1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER3_CDTI1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI1 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER3_CDTI1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER3_CDTI1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer3_cdti1route](index.html) module"] -pub struct TIMER3_CDTI1ROUTE_SPEC; -impl crate::RegisterSpec for TIMER3_CDTI1ROUTE_SPEC { +#[doc = "CDTI1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_cdti1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_cdti1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer3Cdti1routeSpec; +impl crate::RegisterSpec for Timer3Cdti1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer3_cdti1route::R](R) reader structure"] -impl crate::Readable for TIMER3_CDTI1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer3_cdti1route::W](W) writer structure"] -impl crate::Writable for TIMER3_CDTI1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer3_cdti1route::R`](R) reader structure"] +impl crate::Readable for Timer3Cdti1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer3_cdti1route::W`](W) writer structure"] +impl crate::Writable for Timer3Cdti1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER3_CDTI1ROUTE to value 0"] -impl crate::Resettable for TIMER3_CDTI1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer3Cdti1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_cdti2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_cdti2route.rs index be8a6bd..e8f9e17 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_cdti2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_cdti2route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER3_CDTI2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER3_CDTI2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI2 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER3_CDTI2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI2 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER3_CDTI2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer3_cdti2route](index.html) module"] -pub struct TIMER3_CDTI2ROUTE_SPEC; -impl crate::RegisterSpec for TIMER3_CDTI2ROUTE_SPEC { +#[doc = "CDTI2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_cdti2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_cdti2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer3Cdti2routeSpec; +impl crate::RegisterSpec for Timer3Cdti2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer3_cdti2route::R](R) reader structure"] -impl crate::Readable for TIMER3_CDTI2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer3_cdti2route::W](W) writer structure"] -impl crate::Writable for TIMER3_CDTI2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer3_cdti2route::R`](R) reader structure"] +impl crate::Readable for Timer3Cdti2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer3_cdti2route::W`](W) writer structure"] +impl crate::Writable for Timer3Cdti2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER3_CDTI2ROUTE to value 0"] -impl crate::Resettable for TIMER3_CDTI2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer3Cdti2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_routeen.rs index a1226ab..b0ed87c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer3_routeen.rs @@ -1,155 +1,115 @@ #[doc = "Register `TIMER3_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER3_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CC0PEN` reader - CC0 pin enable control bit"] -pub type CC0PEN_R = crate::BitReader; +pub type Cc0penR = crate::BitReader; #[doc = "Field `CC0PEN` writer - CC0 pin enable control bit"] -pub type CC0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER3_ROUTEEN_SPEC, bool, O>; +pub type Cc0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1PEN` reader - CC1 pin enable control bit"] -pub type CC1PEN_R = crate::BitReader; +pub type Cc1penR = crate::BitReader; #[doc = "Field `CC1PEN` writer - CC1 pin enable control bit"] -pub type CC1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER3_ROUTEEN_SPEC, bool, O>; +pub type Cc1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2PEN` reader - CC2 pin enable control bit"] -pub type CC2PEN_R = crate::BitReader; +pub type Cc2penR = crate::BitReader; #[doc = "Field `CC2PEN` writer - CC2 pin enable control bit"] -pub type CC2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER3_ROUTEEN_SPEC, bool, O>; +pub type Cc2penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC0PEN` reader - CDTI0 pin enable control bit"] -pub type CCC0PEN_R = crate::BitReader; +pub type Ccc0penR = crate::BitReader; #[doc = "Field `CCC0PEN` writer - CDTI0 pin enable control bit"] -pub type CCC0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER3_ROUTEEN_SPEC, bool, O>; +pub type Ccc0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC1PEN` reader - CDTI1 pin enable control bit"] -pub type CCC1PEN_R = crate::BitReader; +pub type Ccc1penR = crate::BitReader; #[doc = "Field `CCC1PEN` writer - CDTI1 pin enable control bit"] -pub type CCC1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER3_ROUTEEN_SPEC, bool, O>; +pub type Ccc1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC2PEN` reader - CDTI2 pin enable control bit"] -pub type CCC2PEN_R = crate::BitReader; +pub type Ccc2penR = crate::BitReader; #[doc = "Field `CCC2PEN` writer - CDTI2 pin enable control bit"] -pub type CCC2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER3_ROUTEEN_SPEC, bool, O>; +pub type Ccc2penW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CC0 pin enable control bit"] #[inline(always)] - pub fn cc0pen(&self) -> CC0PEN_R { - CC0PEN_R::new((self.bits & 1) != 0) + pub fn cc0pen(&self) -> Cc0penR { + Cc0penR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CC1 pin enable control bit"] #[inline(always)] - pub fn cc1pen(&self) -> CC1PEN_R { - CC1PEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn cc1pen(&self) -> Cc1penR { + Cc1penR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CC2 pin enable control bit"] #[inline(always)] - pub fn cc2pen(&self) -> CC2PEN_R { - CC2PEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn cc2pen(&self) -> Cc2penR { + Cc2penR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - CDTI0 pin enable control bit"] #[inline(always)] - pub fn ccc0pen(&self) -> CCC0PEN_R { - CCC0PEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn ccc0pen(&self) -> Ccc0penR { + Ccc0penR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - CDTI1 pin enable control bit"] #[inline(always)] - pub fn ccc1pen(&self) -> CCC1PEN_R { - CCC1PEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn ccc1pen(&self) -> Ccc1penR { + Ccc1penR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CDTI2 pin enable control bit"] #[inline(always)] - pub fn ccc2pen(&self) -> CCC2PEN_R { - CCC2PEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn ccc2pen(&self) -> Ccc2penR { + Ccc2penR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - CC0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc0pen(&mut self) -> CC0PEN_W<0> { - CC0PEN_W::new(self) + pub fn cc0pen(&mut self) -> Cc0penW { + Cc0penW::new(self, 0) } #[doc = "Bit 1 - CC1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc1pen(&mut self) -> CC1PEN_W<1> { - CC1PEN_W::new(self) + pub fn cc1pen(&mut self) -> Cc1penW { + Cc1penW::new(self, 1) } #[doc = "Bit 2 - CC2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc2pen(&mut self) -> CC2PEN_W<2> { - CC2PEN_W::new(self) + pub fn cc2pen(&mut self) -> Cc2penW { + Cc2penW::new(self, 2) } #[doc = "Bit 3 - CDTI0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc0pen(&mut self) -> CCC0PEN_W<3> { - CCC0PEN_W::new(self) + pub fn ccc0pen(&mut self) -> Ccc0penW { + Ccc0penW::new(self, 3) } #[doc = "Bit 4 - CDTI1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc1pen(&mut self) -> CCC1PEN_W<4> { - CCC1PEN_W::new(self) + pub fn ccc1pen(&mut self) -> Ccc1penW { + Ccc1penW::new(self, 4) } #[doc = "Bit 5 - CDTI2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc2pen(&mut self) -> CCC2PEN_W<5> { - CCC2PEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ccc2pen(&mut self) -> Ccc2penW { + Ccc2penW::new(self, 5) } } -#[doc = "TIMER3 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer3_routeen](index.html) module"] -pub struct TIMER3_ROUTEEN_SPEC; -impl crate::RegisterSpec for TIMER3_ROUTEEN_SPEC { +#[doc = "TIMER3 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`timer3_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer3_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer3RouteenSpec; +impl crate::RegisterSpec for Timer3RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer3_routeen::R](R) reader structure"] -impl crate::Readable for TIMER3_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer3_routeen::W](W) writer structure"] -impl crate::Writable for TIMER3_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer3_routeen::R`](R) reader structure"] +impl crate::Readable for Timer3RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`timer3_routeen::W`](W) writer structure"] +impl crate::Writable for Timer3RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER3_ROUTEEN to value 0"] -impl crate::Resettable for TIMER3_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer3RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_cc0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_cc0route.rs index d100908..f55e4d6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_cc0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_cc0route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER4_CC0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER4_CC0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC0 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER4_CC0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER4_CC0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer4_cc0route](index.html) module"] -pub struct TIMER4_CC0ROUTE_SPEC; -impl crate::RegisterSpec for TIMER4_CC0ROUTE_SPEC { +#[doc = "CC0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_cc0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_cc0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer4Cc0routeSpec; +impl crate::RegisterSpec for Timer4Cc0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer4_cc0route::R](R) reader structure"] -impl crate::Readable for TIMER4_CC0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer4_cc0route::W](W) writer structure"] -impl crate::Writable for TIMER4_CC0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer4_cc0route::R`](R) reader structure"] +impl crate::Readable for Timer4Cc0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer4_cc0route::W`](W) writer structure"] +impl crate::Writable for Timer4Cc0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER4_CC0ROUTE to value 0"] -impl crate::Resettable for TIMER4_CC0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer4Cc0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_cc1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_cc1route.rs index f539231..b56a72d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_cc1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_cc1route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER4_CC1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER4_CC1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC1 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER4_CC1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER4_CC1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer4_cc1route](index.html) module"] -pub struct TIMER4_CC1ROUTE_SPEC; -impl crate::RegisterSpec for TIMER4_CC1ROUTE_SPEC { +#[doc = "CC1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_cc1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_cc1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer4Cc1routeSpec; +impl crate::RegisterSpec for Timer4Cc1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer4_cc1route::R](R) reader structure"] -impl crate::Readable for TIMER4_CC1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer4_cc1route::W](W) writer structure"] -impl crate::Writable for TIMER4_CC1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer4_cc1route::R`](R) reader structure"] +impl crate::Readable for Timer4Cc1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer4_cc1route::W`](W) writer structure"] +impl crate::Writable for Timer4Cc1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER4_CC1ROUTE to value 0"] -impl crate::Resettable for TIMER4_CC1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer4Cc1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_cc2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_cc2route.rs index f0a5b3d..7d58e2f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_cc2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_cc2route.rs @@ -1,95 +1,55 @@ #[doc = "Register `TIMER4_CC2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER4_CC2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CC2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CC2 port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER4_CC2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CC2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CC2 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER4_CC2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CC2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CC2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CC2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CC2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CC2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer4_cc2route](index.html) module"] -pub struct TIMER4_CC2ROUTE_SPEC; -impl crate::RegisterSpec for TIMER4_CC2ROUTE_SPEC { +#[doc = "CC2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_cc2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_cc2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer4Cc2routeSpec; +impl crate::RegisterSpec for Timer4Cc2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer4_cc2route::R](R) reader structure"] -impl crate::Readable for TIMER4_CC2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer4_cc2route::W](W) writer structure"] -impl crate::Writable for TIMER4_CC2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer4_cc2route::R`](R) reader structure"] +impl crate::Readable for Timer4Cc2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer4_cc2route::W`](W) writer structure"] +impl crate::Writable for Timer4Cc2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER4_CC2ROUTE to value 0"] -impl crate::Resettable for TIMER4_CC2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer4Cc2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_cdti0route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_cdti0route.rs index 7a5e0db..33f77ed 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_cdti0route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_cdti0route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER4_CDTI0ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER4_CDTI0ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI0 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI0 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER4_CDTI0ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI0 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI0 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER4_CDTI0ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI0 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI0 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI0 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI0 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI0 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer4_cdti0route](index.html) module"] -pub struct TIMER4_CDTI0ROUTE_SPEC; -impl crate::RegisterSpec for TIMER4_CDTI0ROUTE_SPEC { +#[doc = "CDTI0 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_cdti0route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_cdti0route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer4Cdti0routeSpec; +impl crate::RegisterSpec for Timer4Cdti0routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer4_cdti0route::R](R) reader structure"] -impl crate::Readable for TIMER4_CDTI0ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer4_cdti0route::W](W) writer structure"] -impl crate::Writable for TIMER4_CDTI0ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer4_cdti0route::R`](R) reader structure"] +impl crate::Readable for Timer4Cdti0routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer4_cdti0route::W`](W) writer structure"] +impl crate::Writable for Timer4Cdti0routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER4_CDTI0ROUTE to value 0"] -impl crate::Resettable for TIMER4_CDTI0ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer4Cdti0routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_cdti1route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_cdti1route.rs index 8ef7fa3..a79c8ef 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_cdti1route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_cdti1route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER4_CDTI1ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER4_CDTI1ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI1 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI1 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER4_CDTI1ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI1 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI1 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER4_CDTI1ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI1 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI1 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI1 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI1 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI1 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer4_cdti1route](index.html) module"] -pub struct TIMER4_CDTI1ROUTE_SPEC; -impl crate::RegisterSpec for TIMER4_CDTI1ROUTE_SPEC { +#[doc = "CDTI1 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_cdti1route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_cdti1route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer4Cdti1routeSpec; +impl crate::RegisterSpec for Timer4Cdti1routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer4_cdti1route::R](R) reader structure"] -impl crate::Readable for TIMER4_CDTI1ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer4_cdti1route::W](W) writer structure"] -impl crate::Writable for TIMER4_CDTI1ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer4_cdti1route::R`](R) reader structure"] +impl crate::Readable for Timer4Cdti1routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer4_cdti1route::W`](W) writer structure"] +impl crate::Writable for Timer4Cdti1routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER4_CDTI1ROUTE to value 0"] -impl crate::Resettable for TIMER4_CDTI1ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer4Cdti1routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_cdti2route.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_cdti2route.rs index 1687912..c8d82cc 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_cdti2route.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_cdti2route.rs @@ -1,96 +1,55 @@ #[doc = "Register `TIMER4_CDTI2ROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER4_CDTI2ROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CDTI2 port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CDTI2 port select register"] -pub type PORT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TIMER4_CDTI2ROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CDTI2 pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CDTI2 pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER4_CDTI2ROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CDTI2 port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CDTI2 pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CDTI2 port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CDTI2 pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CDTI2 port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer4_cdti2route](index.html) module"] -pub struct TIMER4_CDTI2ROUTE_SPEC; -impl crate::RegisterSpec for TIMER4_CDTI2ROUTE_SPEC { +#[doc = "CDTI2 port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_cdti2route::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_cdti2route::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer4Cdti2routeSpec; +impl crate::RegisterSpec for Timer4Cdti2routeSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer4_cdti2route::R](R) reader structure"] -impl crate::Readable for TIMER4_CDTI2ROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer4_cdti2route::W](W) writer structure"] -impl crate::Writable for TIMER4_CDTI2ROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer4_cdti2route::R`](R) reader structure"] +impl crate::Readable for Timer4Cdti2routeSpec {} +#[doc = "`write(|w| ..)` method takes [`timer4_cdti2route::W`](W) writer structure"] +impl crate::Writable for Timer4Cdti2routeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER4_CDTI2ROUTE to value 0"] -impl crate::Resettable for TIMER4_CDTI2ROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer4Cdti2routeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_routeen.rs index f00c708..6b839ae 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/timer4_routeen.rs @@ -1,155 +1,115 @@ #[doc = "Register `TIMER4_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER4_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CC0PEN` reader - CC0 pin enable control bit"] -pub type CC0PEN_R = crate::BitReader; +pub type Cc0penR = crate::BitReader; #[doc = "Field `CC0PEN` writer - CC0 pin enable control bit"] -pub type CC0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER4_ROUTEEN_SPEC, bool, O>; +pub type Cc0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1PEN` reader - CC1 pin enable control bit"] -pub type CC1PEN_R = crate::BitReader; +pub type Cc1penR = crate::BitReader; #[doc = "Field `CC1PEN` writer - CC1 pin enable control bit"] -pub type CC1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER4_ROUTEEN_SPEC, bool, O>; +pub type Cc1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2PEN` reader - CC2 pin enable control bit"] -pub type CC2PEN_R = crate::BitReader; +pub type Cc2penR = crate::BitReader; #[doc = "Field `CC2PEN` writer - CC2 pin enable control bit"] -pub type CC2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER4_ROUTEEN_SPEC, bool, O>; +pub type Cc2penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC0PEN` reader - CDTI0 pin enable control bit"] -pub type CCC0PEN_R = crate::BitReader; +pub type Ccc0penR = crate::BitReader; #[doc = "Field `CCC0PEN` writer - CDTI0 pin enable control bit"] -pub type CCC0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER4_ROUTEEN_SPEC, bool, O>; +pub type Ccc0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC1PEN` reader - CDTI1 pin enable control bit"] -pub type CCC1PEN_R = crate::BitReader; +pub type Ccc1penR = crate::BitReader; #[doc = "Field `CCC1PEN` writer - CDTI1 pin enable control bit"] -pub type CCC1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER4_ROUTEEN_SPEC, bool, O>; +pub type Ccc1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCC2PEN` reader - CDTI2 pin enable control bit"] -pub type CCC2PEN_R = crate::BitReader; +pub type Ccc2penR = crate::BitReader; #[doc = "Field `CCC2PEN` writer - CDTI2 pin enable control bit"] -pub type CCC2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMER4_ROUTEEN_SPEC, bool, O>; +pub type Ccc2penW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CC0 pin enable control bit"] #[inline(always)] - pub fn cc0pen(&self) -> CC0PEN_R { - CC0PEN_R::new((self.bits & 1) != 0) + pub fn cc0pen(&self) -> Cc0penR { + Cc0penR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CC1 pin enable control bit"] #[inline(always)] - pub fn cc1pen(&self) -> CC1PEN_R { - CC1PEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn cc1pen(&self) -> Cc1penR { + Cc1penR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CC2 pin enable control bit"] #[inline(always)] - pub fn cc2pen(&self) -> CC2PEN_R { - CC2PEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn cc2pen(&self) -> Cc2penR { + Cc2penR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - CDTI0 pin enable control bit"] #[inline(always)] - pub fn ccc0pen(&self) -> CCC0PEN_R { - CCC0PEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn ccc0pen(&self) -> Ccc0penR { + Ccc0penR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - CDTI1 pin enable control bit"] #[inline(always)] - pub fn ccc1pen(&self) -> CCC1PEN_R { - CCC1PEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn ccc1pen(&self) -> Ccc1penR { + Ccc1penR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CDTI2 pin enable control bit"] #[inline(always)] - pub fn ccc2pen(&self) -> CCC2PEN_R { - CCC2PEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn ccc2pen(&self) -> Ccc2penR { + Ccc2penR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - CC0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc0pen(&mut self) -> CC0PEN_W<0> { - CC0PEN_W::new(self) + pub fn cc0pen(&mut self) -> Cc0penW { + Cc0penW::new(self, 0) } #[doc = "Bit 1 - CC1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc1pen(&mut self) -> CC1PEN_W<1> { - CC1PEN_W::new(self) + pub fn cc1pen(&mut self) -> Cc1penW { + Cc1penW::new(self, 1) } #[doc = "Bit 2 - CC2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn cc2pen(&mut self) -> CC2PEN_W<2> { - CC2PEN_W::new(self) + pub fn cc2pen(&mut self) -> Cc2penW { + Cc2penW::new(self, 2) } #[doc = "Bit 3 - CDTI0 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc0pen(&mut self) -> CCC0PEN_W<3> { - CCC0PEN_W::new(self) + pub fn ccc0pen(&mut self) -> Ccc0penW { + Ccc0penW::new(self, 3) } #[doc = "Bit 4 - CDTI1 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc1pen(&mut self) -> CCC1PEN_W<4> { - CCC1PEN_W::new(self) + pub fn ccc1pen(&mut self) -> Ccc1penW { + Ccc1penW::new(self, 4) } #[doc = "Bit 5 - CDTI2 pin enable control bit"] #[inline(always)] #[must_use] - pub fn ccc2pen(&mut self) -> CCC2PEN_W<5> { - CCC2PEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ccc2pen(&mut self) -> Ccc2penW { + Ccc2penW::new(self, 5) } } -#[doc = "TIMER4 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer4_routeen](index.html) module"] -pub struct TIMER4_ROUTEEN_SPEC; -impl crate::RegisterSpec for TIMER4_ROUTEEN_SPEC { +#[doc = "TIMER4 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`timer4_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer4_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timer4RouteenSpec; +impl crate::RegisterSpec for Timer4RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer4_routeen::R](R) reader structure"] -impl crate::Readable for TIMER4_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer4_routeen::W](W) writer structure"] -impl crate::Writable for TIMER4_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer4_routeen::R`](R) reader structure"] +impl crate::Readable for Timer4RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`timer4_routeen::W`](W) writer structure"] +impl crate::Writable for Timer4RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER4_ROUTEEN to value 0"] -impl crate::Resettable for TIMER4_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timer4RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/traceroutepen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/traceroutepen.rs index 3f0f45c..e2ea208 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/traceroutepen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/traceroutepen.rs @@ -1,155 +1,115 @@ #[doc = "Register `TRACEROUTEPEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TRACEROUTEPEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SWVPEN` reader - Serial Wire Viewer Output Pin Enable"] -pub type SWVPEN_R = crate::BitReader; +pub type SwvpenR = crate::BitReader; #[doc = "Field `SWVPEN` writer - Serial Wire Viewer Output Pin Enable"] -pub type SWVPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRACEROUTEPEN_SPEC, bool, O>; +pub type SwvpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TRACECLKPEN` reader - Trace Clk Pin Enable"] -pub type TRACECLKPEN_R = crate::BitReader; +pub type TraceclkpenR = crate::BitReader; #[doc = "Field `TRACECLKPEN` writer - Trace Clk Pin Enable"] -pub type TRACECLKPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRACEROUTEPEN_SPEC, bool, O>; +pub type TraceclkpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TRACEDATA0PEN` reader - Trace Data0 Pin Enable"] -pub type TRACEDATA0PEN_R = crate::BitReader; +pub type Tracedata0penR = crate::BitReader; #[doc = "Field `TRACEDATA0PEN` writer - Trace Data0 Pin Enable"] -pub type TRACEDATA0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRACEROUTEPEN_SPEC, bool, O>; +pub type Tracedata0penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TRACEDATA1PEN` reader - Trace Data1 Pin Enable"] -pub type TRACEDATA1PEN_R = crate::BitReader; +pub type Tracedata1penR = crate::BitReader; #[doc = "Field `TRACEDATA1PEN` writer - Trace Data1 Pin Enable"] -pub type TRACEDATA1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRACEROUTEPEN_SPEC, bool, O>; +pub type Tracedata1penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TRACEDATA2PEN` reader - Trace Data2 Pin Enable"] -pub type TRACEDATA2PEN_R = crate::BitReader; +pub type Tracedata2penR = crate::BitReader; #[doc = "Field `TRACEDATA2PEN` writer - Trace Data2 Pin Enable"] -pub type TRACEDATA2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRACEROUTEPEN_SPEC, bool, O>; +pub type Tracedata2penW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TRACEDATA3PEN` reader - Trace Data3 Pin Enable"] -pub type TRACEDATA3PEN_R = crate::BitReader; +pub type Tracedata3penR = crate::BitReader; #[doc = "Field `TRACEDATA3PEN` writer - Trace Data3 Pin Enable"] -pub type TRACEDATA3PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRACEROUTEPEN_SPEC, bool, O>; +pub type Tracedata3penW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Serial Wire Viewer Output Pin Enable"] #[inline(always)] - pub fn swvpen(&self) -> SWVPEN_R { - SWVPEN_R::new((self.bits & 1) != 0) + pub fn swvpen(&self) -> SwvpenR { + SwvpenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Trace Clk Pin Enable"] #[inline(always)] - pub fn traceclkpen(&self) -> TRACECLKPEN_R { - TRACECLKPEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn traceclkpen(&self) -> TraceclkpenR { + TraceclkpenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Trace Data0 Pin Enable"] #[inline(always)] - pub fn tracedata0pen(&self) -> TRACEDATA0PEN_R { - TRACEDATA0PEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn tracedata0pen(&self) -> Tracedata0penR { + Tracedata0penR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Trace Data1 Pin Enable"] #[inline(always)] - pub fn tracedata1pen(&self) -> TRACEDATA1PEN_R { - TRACEDATA1PEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn tracedata1pen(&self) -> Tracedata1penR { + Tracedata1penR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Trace Data2 Pin Enable"] #[inline(always)] - pub fn tracedata2pen(&self) -> TRACEDATA2PEN_R { - TRACEDATA2PEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn tracedata2pen(&self) -> Tracedata2penR { + Tracedata2penR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Trace Data3 Pin Enable"] #[inline(always)] - pub fn tracedata3pen(&self) -> TRACEDATA3PEN_R { - TRACEDATA3PEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn tracedata3pen(&self) -> Tracedata3penR { + Tracedata3penR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - Serial Wire Viewer Output Pin Enable"] #[inline(always)] #[must_use] - pub fn swvpen(&mut self) -> SWVPEN_W<0> { - SWVPEN_W::new(self) + pub fn swvpen(&mut self) -> SwvpenW { + SwvpenW::new(self, 0) } #[doc = "Bit 1 - Trace Clk Pin Enable"] #[inline(always)] #[must_use] - pub fn traceclkpen(&mut self) -> TRACECLKPEN_W<1> { - TRACECLKPEN_W::new(self) + pub fn traceclkpen(&mut self) -> TraceclkpenW { + TraceclkpenW::new(self, 1) } #[doc = "Bit 2 - Trace Data0 Pin Enable"] #[inline(always)] #[must_use] - pub fn tracedata0pen(&mut self) -> TRACEDATA0PEN_W<2> { - TRACEDATA0PEN_W::new(self) + pub fn tracedata0pen(&mut self) -> Tracedata0penW { + Tracedata0penW::new(self, 2) } #[doc = "Bit 3 - Trace Data1 Pin Enable"] #[inline(always)] #[must_use] - pub fn tracedata1pen(&mut self) -> TRACEDATA1PEN_W<3> { - TRACEDATA1PEN_W::new(self) + pub fn tracedata1pen(&mut self) -> Tracedata1penW { + Tracedata1penW::new(self, 3) } #[doc = "Bit 4 - Trace Data2 Pin Enable"] #[inline(always)] #[must_use] - pub fn tracedata2pen(&mut self) -> TRACEDATA2PEN_W<4> { - TRACEDATA2PEN_W::new(self) + pub fn tracedata2pen(&mut self) -> Tracedata2penW { + Tracedata2penW::new(self, 4) } #[doc = "Bit 5 - Trace Data3 Pin Enable"] #[inline(always)] #[must_use] - pub fn tracedata3pen(&mut self) -> TRACEDATA3PEN_W<5> { - TRACEDATA3PEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn tracedata3pen(&mut self) -> Tracedata3penW { + Tracedata3penW::new(self, 5) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [traceroutepen](index.html) module"] -pub struct TRACEROUTEPEN_SPEC; -impl crate::RegisterSpec for TRACEROUTEPEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`traceroutepen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`traceroutepen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TraceroutepenSpec; +impl crate::RegisterSpec for TraceroutepenSpec { type Ux = u32; } -#[doc = "`read()` method returns [traceroutepen::R](R) reader structure"] -impl crate::Readable for TRACEROUTEPEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [traceroutepen::W](W) writer structure"] -impl crate::Writable for TRACEROUTEPEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`traceroutepen::R`](R) reader structure"] +impl crate::Readable for TraceroutepenSpec {} +#[doc = "`write(|w| ..)` method takes [`traceroutepen::W`](W) writer structure"] +impl crate::Writable for TraceroutepenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TRACEROUTEPEN to value 0"] -impl crate::Resettable for TRACEROUTEPEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TraceroutepenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_clkroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_clkroute.rs index 2f4d2f5..f2e7ab5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_clkroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_clkroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `USART0_CLKROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `USART0_CLKROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - SCLK port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - SCLK port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, USART0_CLKROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - SCLK pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - SCLK pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, USART0_CLKROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - SCLK port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - SCLK pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - SCLK port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - SCLK pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "SCLK port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [usart0_clkroute](index.html) module"] -pub struct USART0_CLKROUTE_SPEC; -impl crate::RegisterSpec for USART0_CLKROUTE_SPEC { +#[doc = "SCLK port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_clkroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_clkroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Usart0ClkrouteSpec; +impl crate::RegisterSpec for Usart0ClkrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [usart0_clkroute::R](R) reader structure"] -impl crate::Readable for USART0_CLKROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [usart0_clkroute::W](W) writer structure"] -impl crate::Writable for USART0_CLKROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`usart0_clkroute::R`](R) reader structure"] +impl crate::Readable for Usart0ClkrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`usart0_clkroute::W`](W) writer structure"] +impl crate::Writable for Usart0ClkrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets USART0_CLKROUTE to value 0"] -impl crate::Resettable for USART0_CLKROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Usart0ClkrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_csroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_csroute.rs index 8808afc..245e937 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_csroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_csroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `USART0_CSROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `USART0_CSROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CS port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CS port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, USART0_CSROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CS pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CS pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, USART0_CSROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CS port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CS pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CS port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CS pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CS port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [usart0_csroute](index.html) module"] -pub struct USART0_CSROUTE_SPEC; -impl crate::RegisterSpec for USART0_CSROUTE_SPEC { +#[doc = "CS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_csroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_csroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Usart0CsrouteSpec; +impl crate::RegisterSpec for Usart0CsrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [usart0_csroute::R](R) reader structure"] -impl crate::Readable for USART0_CSROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [usart0_csroute::W](W) writer structure"] -impl crate::Writable for USART0_CSROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`usart0_csroute::R`](R) reader structure"] +impl crate::Readable for Usart0CsrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`usart0_csroute::W`](W) writer structure"] +impl crate::Writable for Usart0CsrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets USART0_CSROUTE to value 0"] -impl crate::Resettable for USART0_CSROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Usart0CsrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_ctsroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_ctsroute.rs index de06379..ace2514 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_ctsroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_ctsroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `USART0_CTSROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `USART0_CTSROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - CTS port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - CTS port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, USART0_CTSROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - CTS pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - CTS pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, USART0_CTSROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - CTS port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - CTS pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - CTS port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - CTS pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "CTS port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [usart0_ctsroute](index.html) module"] -pub struct USART0_CTSROUTE_SPEC; -impl crate::RegisterSpec for USART0_CTSROUTE_SPEC { +#[doc = "CTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_ctsroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_ctsroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Usart0CtsrouteSpec; +impl crate::RegisterSpec for Usart0CtsrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [usart0_ctsroute::R](R) reader structure"] -impl crate::Readable for USART0_CTSROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [usart0_ctsroute::W](W) writer structure"] -impl crate::Writable for USART0_CTSROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`usart0_ctsroute::R`](R) reader structure"] +impl crate::Readable for Usart0CtsrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`usart0_ctsroute::W`](W) writer structure"] +impl crate::Writable for Usart0CtsrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets USART0_CTSROUTE to value 0"] -impl crate::Resettable for USART0_CTSROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Usart0CtsrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_routeen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_routeen.rs index e47bc2e..f04d926 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_routeen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_routeen.rs @@ -1,140 +1,100 @@ #[doc = "Register `USART0_ROUTEEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `USART0_ROUTEEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CSPEN` reader - CS pin enable control bit"] -pub type CSPEN_R = crate::BitReader; +pub type CspenR = crate::BitReader; #[doc = "Field `CSPEN` writer - CS pin enable control bit"] -pub type CSPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, USART0_ROUTEEN_SPEC, bool, O>; +pub type CspenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTSPEN` reader - RTS pin enable control bit"] -pub type RTSPEN_R = crate::BitReader; +pub type RtspenR = crate::BitReader; #[doc = "Field `RTSPEN` writer - RTS pin enable control bit"] -pub type RTSPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, USART0_ROUTEEN_SPEC, bool, O>; +pub type RtspenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXPEN` reader - RX pin enable control bit"] -pub type RXPEN_R = crate::BitReader; +pub type RxpenR = crate::BitReader; #[doc = "Field `RXPEN` writer - RX pin enable control bit"] -pub type RXPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, USART0_ROUTEEN_SPEC, bool, O>; +pub type RxpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLKPEN` reader - SCLK pin enable control bit"] -pub type CLKPEN_R = crate::BitReader; +pub type ClkpenR = crate::BitReader; #[doc = "Field `CLKPEN` writer - SCLK pin enable control bit"] -pub type CLKPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, USART0_ROUTEEN_SPEC, bool, O>; +pub type ClkpenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXPEN` reader - TX pin enable control bit"] -pub type TXPEN_R = crate::BitReader; +pub type TxpenR = crate::BitReader; #[doc = "Field `TXPEN` writer - TX pin enable control bit"] -pub type TXPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, USART0_ROUTEEN_SPEC, bool, O>; +pub type TxpenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CS pin enable control bit"] #[inline(always)] - pub fn cspen(&self) -> CSPEN_R { - CSPEN_R::new((self.bits & 1) != 0) + pub fn cspen(&self) -> CspenR { + CspenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - RTS pin enable control bit"] #[inline(always)] - pub fn rtspen(&self) -> RTSPEN_R { - RTSPEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn rtspen(&self) -> RtspenR { + RtspenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RX pin enable control bit"] #[inline(always)] - pub fn rxpen(&self) -> RXPEN_R { - RXPEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxpen(&self) -> RxpenR { + RxpenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - SCLK pin enable control bit"] #[inline(always)] - pub fn clkpen(&self) -> CLKPEN_R { - CLKPEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn clkpen(&self) -> ClkpenR { + ClkpenR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - TX pin enable control bit"] #[inline(always)] - pub fn txpen(&self) -> TXPEN_R { - TXPEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn txpen(&self) -> TxpenR { + TxpenR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - CS pin enable control bit"] #[inline(always)] #[must_use] - pub fn cspen(&mut self) -> CSPEN_W<0> { - CSPEN_W::new(self) + pub fn cspen(&mut self) -> CspenW { + CspenW::new(self, 0) } #[doc = "Bit 1 - RTS pin enable control bit"] #[inline(always)] #[must_use] - pub fn rtspen(&mut self) -> RTSPEN_W<1> { - RTSPEN_W::new(self) + pub fn rtspen(&mut self) -> RtspenW { + RtspenW::new(self, 1) } #[doc = "Bit 2 - RX pin enable control bit"] #[inline(always)] #[must_use] - pub fn rxpen(&mut self) -> RXPEN_W<2> { - RXPEN_W::new(self) + pub fn rxpen(&mut self) -> RxpenW { + RxpenW::new(self, 2) } #[doc = "Bit 3 - SCLK pin enable control bit"] #[inline(always)] #[must_use] - pub fn clkpen(&mut self) -> CLKPEN_W<3> { - CLKPEN_W::new(self) + pub fn clkpen(&mut self) -> ClkpenW { + ClkpenW::new(self, 3) } #[doc = "Bit 4 - TX pin enable control bit"] #[inline(always)] #[must_use] - pub fn txpen(&mut self) -> TXPEN_W<4> { - TXPEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txpen(&mut self) -> TxpenW { + TxpenW::new(self, 4) } } -#[doc = "USART0 pin enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [usart0_routeen](index.html) module"] -pub struct USART0_ROUTEEN_SPEC; -impl crate::RegisterSpec for USART0_ROUTEEN_SPEC { +#[doc = "USART0 pin enable\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_routeen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_routeen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Usart0RouteenSpec; +impl crate::RegisterSpec for Usart0RouteenSpec { type Ux = u32; } -#[doc = "`read()` method returns [usart0_routeen::R](R) reader structure"] -impl crate::Readable for USART0_ROUTEEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [usart0_routeen::W](W) writer structure"] -impl crate::Writable for USART0_ROUTEEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`usart0_routeen::R`](R) reader structure"] +impl crate::Readable for Usart0RouteenSpec {} +#[doc = "`write(|w| ..)` method takes [`usart0_routeen::W`](W) writer structure"] +impl crate::Writable for Usart0RouteenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets USART0_ROUTEEN to value 0"] -impl crate::Resettable for USART0_ROUTEEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Usart0RouteenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_rtsroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_rtsroute.rs index 3b884c8..95de721 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_rtsroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_rtsroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `USART0_RTSROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `USART0_RTSROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - RTS port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - RTS port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, USART0_RTSROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - RTS pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - RTS pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, USART0_RTSROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - RTS port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - RTS pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - RTS port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - RTS pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "RTS port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [usart0_rtsroute](index.html) module"] -pub struct USART0_RTSROUTE_SPEC; -impl crate::RegisterSpec for USART0_RTSROUTE_SPEC { +#[doc = "RTS port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_rtsroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_rtsroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Usart0RtsrouteSpec; +impl crate::RegisterSpec for Usart0RtsrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [usart0_rtsroute::R](R) reader structure"] -impl crate::Readable for USART0_RTSROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [usart0_rtsroute::W](W) writer structure"] -impl crate::Writable for USART0_RTSROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`usart0_rtsroute::R`](R) reader structure"] +impl crate::Readable for Usart0RtsrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`usart0_rtsroute::W`](W) writer structure"] +impl crate::Writable for Usart0RtsrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets USART0_RTSROUTE to value 0"] -impl crate::Resettable for USART0_RTSROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Usart0RtsrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_rxroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_rxroute.rs index a905b25..55cc7e2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_rxroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_rxroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `USART0_RXROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `USART0_RXROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - RX port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - RX port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, USART0_RXROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - RX pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - RX pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, USART0_RXROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - RX port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - RX pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - RX port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - RX pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "RX port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [usart0_rxroute](index.html) module"] -pub struct USART0_RXROUTE_SPEC; -impl crate::RegisterSpec for USART0_RXROUTE_SPEC { +#[doc = "RX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_rxroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_rxroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Usart0RxrouteSpec; +impl crate::RegisterSpec for Usart0RxrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [usart0_rxroute::R](R) reader structure"] -impl crate::Readable for USART0_RXROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [usart0_rxroute::W](W) writer structure"] -impl crate::Writable for USART0_RXROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`usart0_rxroute::R`](R) reader structure"] +impl crate::Readable for Usart0RxrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`usart0_rxroute::W`](W) writer structure"] +impl crate::Writable for Usart0RxrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets USART0_RXROUTE to value 0"] -impl crate::Resettable for USART0_RXROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Usart0RxrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_txroute.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_txroute.rs index 6aeee82..a69bb14 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_txroute.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/gpio_s/usart0_txroute.rs @@ -1,95 +1,55 @@ #[doc = "Register `USART0_TXROUTE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `USART0_TXROUTE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PORT` reader - TX port select register"] -pub type PORT_R = crate::FieldReader; +pub type PortR = crate::FieldReader; #[doc = "Field `PORT` writer - TX port select register"] -pub type PORT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, USART0_TXROUTE_SPEC, u8, u8, 2, O>; +pub type PortW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `PIN` reader - TX pin select register"] -pub type PIN_R = crate::FieldReader; +pub type PinR = crate::FieldReader; #[doc = "Field `PIN` writer - TX pin select register"] -pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, USART0_TXROUTE_SPEC, u8, u8, 4, O>; +pub type PinW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - TX port select register"] #[inline(always)] - pub fn port(&self) -> PORT_R { - PORT_R::new((self.bits & 3) as u8) + pub fn port(&self) -> PortR { + PortR::new((self.bits & 3) as u8) } #[doc = "Bits 16:19 - TX pin select register"] #[inline(always)] - pub fn pin(&self) -> PIN_R { - PIN_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pin(&self) -> PinR { + PinR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - TX port select register"] #[inline(always)] #[must_use] - pub fn port(&mut self) -> PORT_W<0> { - PORT_W::new(self) + pub fn port(&mut self) -> PortW { + PortW::new(self, 0) } #[doc = "Bits 16:19 - TX pin select register"] #[inline(always)] #[must_use] - pub fn pin(&mut self) -> PIN_W<16> { - PIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pin(&mut self) -> PinW { + PinW::new(self, 16) } } -#[doc = "TX port/pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [usart0_txroute](index.html) module"] -pub struct USART0_TXROUTE_SPEC; -impl crate::RegisterSpec for USART0_TXROUTE_SPEC { +#[doc = "TX port/pin select\n\nYou can [`read`](crate::Reg::read) this register and get [`usart0_txroute::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usart0_txroute::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Usart0TxrouteSpec; +impl crate::RegisterSpec for Usart0TxrouteSpec { type Ux = u32; } -#[doc = "`read()` method returns [usart0_txroute::R](R) reader structure"] -impl crate::Readable for USART0_TXROUTE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [usart0_txroute::W](W) writer structure"] -impl crate::Writable for USART0_TXROUTE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`usart0_txroute::R`](R) reader structure"] +impl crate::Readable for Usart0TxrouteSpec {} +#[doc = "`write(|w| ..)` method takes [`usart0_txroute::W`](W) writer structure"] +impl crate::Writable for Usart0TxrouteSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets USART0_TXROUTE to value 0"] -impl crate::Resettable for USART0_TXROUTE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Usart0TxrouteSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns.rs index 4919e58..2364dc1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns.rs @@ -1,47 +1,91 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + ctrl: Ctrl, + cal: Cal, + status: Status, + if_: If, + ien: Ien, + _reserved6: [u8; 0x04], + lock: Lock, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x08 - No Description"] - pub cal: CAL, + #[inline(always)] + pub const fn cal(&self) -> &Cal { + &self.cal + } #[doc = "0x0c - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x10 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x14 - No Description"] - pub ien: IEN, - _reserved6: [u8; 0x04], + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x1c - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CAL (rw) register accessor: an alias for `Reg`"] -pub type CAL = crate::Reg; +#[doc = "CAL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cal::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cal::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cal`] +module"] +#[doc(alias = "CAL")] +pub type Cal = crate::Reg; #[doc = "No Description"] pub mod cal; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/cal.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/cal.rs index a79a6e6..d187636 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/cal.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/cal.rs @@ -1,246 +1,214 @@ #[doc = "Register `CAL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CAL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TUNING` reader - Tuning Value"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `TUNING` writer - Tuning Value"] -pub type TUNING_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 7, O>; +pub type TuningW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `FINETUNING` reader - Fine Tuning Value"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `FINETUNING` writer - Fine Tuning Value"] -pub type FINETUNING_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 6, O>; +pub type FinetuningW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `LDOHP` reader - LDO High Power Mode"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `LDOHP` writer - LDO High Power Mode"] -pub type LDOHP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CAL_SPEC, bool, O>; +pub type LdohpW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FREQRANGE` reader - Frequency Range"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `FREQRANGE` writer - Frequency Range"] -pub type FREQRANGE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 5, O>; +pub type FreqrangeW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `CMPBIAS` reader - Comparator Bias Current"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CMPBIAS` writer - Comparator Bias Current"] -pub type CMPBIAS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 3, O>; -#[doc = "Field `CLKDIV` reader - Locally Divide HFRCO Clock Output"] -pub type CLKDIV_R = crate::FieldReader; +pub type CmpbiasW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Locally Divide HFRCO Clock Output\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKDIV_A { +pub enum Clkdiv { #[doc = "0: Divide by 1."] - DIV1 = 0, + Div1 = 0, #[doc = "1: Divide by 2."] - DIV2 = 1, + Div2 = 1, #[doc = "2: Divide by 4."] - DIV4 = 2, + Div4 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKDIV_A) -> Self { + fn from(variant: Clkdiv) -> Self { variant as _ } } -impl CLKDIV_R { +impl crate::FieldSpec for Clkdiv { + type Ux = u8; +} +impl crate::IsEnum for Clkdiv {} +#[doc = "Field `CLKDIV` reader - Locally Divide HFRCO Clock Output"] +pub type ClkdivR = crate::FieldReader; +impl ClkdivR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKDIV_A::DIV1), - 1 => Some(CLKDIV_A::DIV2), - 2 => Some(CLKDIV_A::DIV4), + 0 => Some(Clkdiv::Div1), + 1 => Some(Clkdiv::Div2), + 2 => Some(Clkdiv::Div4), _ => None, } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "Divide by 1."] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == CLKDIV_A::DIV1 + *self == Clkdiv::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "Divide by 2."] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == CLKDIV_A::DIV2 + *self == Clkdiv::Div2 } - #[doc = "Checks if the value of the field is `DIV4`"] + #[doc = "Divide by 4."] #[inline(always)] pub fn is_div4(&self) -> bool { - *self == CLKDIV_A::DIV4 + *self == Clkdiv::Div4 } } #[doc = "Field `CLKDIV` writer - Locally Divide HFRCO Clock Output"] -pub type CLKDIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, CLKDIV_A, 2, O>; -impl<'a, const O: u8> CLKDIV_W<'a, O> { +pub type ClkdivW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clkdiv>; +impl<'a, REG> ClkdivW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Divide by 1."] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(CLKDIV_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Clkdiv::Div1) } #[doc = "Divide by 2."] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(CLKDIV_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Clkdiv::Div2) } #[doc = "Divide by 4."] #[inline(always)] - pub fn div4(self) -> &'a mut W { - self.variant(CLKDIV_A::DIV4) + pub fn div4(self) -> &'a mut crate::W { + self.variant(Clkdiv::Div4) } } #[doc = "Field `CMPSEL` reader - Comparator Load Select"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `CMPSEL` writer - Comparator Load Select"] -pub type CMPSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 2, O>; +pub type CmpselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `IREFTC` reader - Tempco Trim on Comparator Current"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; #[doc = "Field `IREFTC` writer - Tempco Trim on Comparator Current"] -pub type IREFTC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 4, O>; +pub type IreftcW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:6 - Tuning Value"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - Fine Tuning Value"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - LDO High Power Mode"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - Frequency Range"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - Comparator Bias Current"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - Locally Divide HFRCO Clock Output"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Comparator Load Select"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - Tempco Trim on Comparator Current"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:6 - Tuning Value"] #[inline(always)] #[must_use] - pub fn tuning(&mut self) -> TUNING_W<0> { - TUNING_W::new(self) + pub fn tuning(&mut self) -> TuningW { + TuningW::new(self, 0) } #[doc = "Bits 8:13 - Fine Tuning Value"] #[inline(always)] #[must_use] - pub fn finetuning(&mut self) -> FINETUNING_W<8> { - FINETUNING_W::new(self) + pub fn finetuning(&mut self) -> FinetuningW { + FinetuningW::new(self, 8) } #[doc = "Bit 15 - LDO High Power Mode"] #[inline(always)] #[must_use] - pub fn ldohp(&mut self) -> LDOHP_W<15> { - LDOHP_W::new(self) + pub fn ldohp(&mut self) -> LdohpW { + LdohpW::new(self, 15) } #[doc = "Bits 16:20 - Frequency Range"] #[inline(always)] #[must_use] - pub fn freqrange(&mut self) -> FREQRANGE_W<16> { - FREQRANGE_W::new(self) + pub fn freqrange(&mut self) -> FreqrangeW { + FreqrangeW::new(self, 16) } #[doc = "Bits 21:23 - Comparator Bias Current"] #[inline(always)] #[must_use] - pub fn cmpbias(&mut self) -> CMPBIAS_W<21> { - CMPBIAS_W::new(self) + pub fn cmpbias(&mut self) -> CmpbiasW { + CmpbiasW::new(self, 21) } #[doc = "Bits 24:25 - Locally Divide HFRCO Clock Output"] #[inline(always)] #[must_use] - pub fn clkdiv(&mut self) -> CLKDIV_W<24> { - CLKDIV_W::new(self) + pub fn clkdiv(&mut self) -> ClkdivW { + ClkdivW::new(self, 24) } #[doc = "Bits 26:27 - Comparator Load Select"] #[inline(always)] #[must_use] - pub fn cmpsel(&mut self) -> CMPSEL_W<26> { - CMPSEL_W::new(self) + pub fn cmpsel(&mut self) -> CmpselW { + CmpselW::new(self, 26) } #[doc = "Bits 28:31 - Tempco Trim on Comparator Current"] #[inline(always)] #[must_use] - pub fn ireftc(&mut self) -> IREFTC_W<28> { - IREFTC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ireftc(&mut self) -> IreftcW { + IreftcW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cal](index.html) module"] -pub struct CAL_SPEC; -impl crate::RegisterSpec for CAL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cal::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cal::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CalSpec; +impl crate::RegisterSpec for CalSpec { type Ux = u32; } -#[doc = "`read()` method returns [cal::R](R) reader structure"] -impl crate::Readable for CAL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cal::W](W) writer structure"] -impl crate::Writable for CAL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cal::R`](R) reader structure"] +impl crate::Readable for CalSpec {} +#[doc = "`write(|w| ..)` method takes [`cal::W`](W) writer structure"] +impl crate::Writable for CalSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CAL to value 0xa868_9f7f"] -impl crate::Resettable for CAL_SPEC { - const RESET_VALUE: Self::Ux = 0xa868_9f7f; +impl crate::Resettable for CalSpec { + const RESET_VALUE: u32 = 0xa868_9f7f; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/ctrl.rs index 400c7fb..5d3b85e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/ctrl.rs @@ -1,110 +1,70 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `FORCEEN` reader - Force Enable"] -pub type FORCEEN_R = crate::BitReader; +pub type ForceenR = crate::BitReader; #[doc = "Field `FORCEEN` writer - Force Enable"] -pub type FORCEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type ForceenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISONDEMAND` reader - Disable On-demand"] -pub type DISONDEMAND_R = crate::BitReader; +pub type DisondemandR = crate::BitReader; #[doc = "Field `DISONDEMAND` writer - Disable On-demand"] -pub type DISONDEMAND_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type DisondemandW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM23ONDEMAND` reader - EM23 On-demand"] -pub type EM23ONDEMAND_R = crate::BitReader; +pub type Em23ondemandR = crate::BitReader; #[doc = "Field `EM23ONDEMAND` writer - EM23 On-demand"] -pub type EM23ONDEMAND_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type Em23ondemandW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Force Enable"] #[inline(always)] - pub fn forceen(&self) -> FORCEEN_R { - FORCEEN_R::new((self.bits & 1) != 0) + pub fn forceen(&self) -> ForceenR { + ForceenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disable On-demand"] #[inline(always)] - pub fn disondemand(&self) -> DISONDEMAND_R { - DISONDEMAND_R::new(((self.bits >> 1) & 1) != 0) + pub fn disondemand(&self) -> DisondemandR { + DisondemandR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - EM23 On-demand"] #[inline(always)] - pub fn em23ondemand(&self) -> EM23ONDEMAND_R { - EM23ONDEMAND_R::new(((self.bits >> 2) & 1) != 0) + pub fn em23ondemand(&self) -> Em23ondemandR { + Em23ondemandR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Force Enable"] #[inline(always)] #[must_use] - pub fn forceen(&mut self) -> FORCEEN_W<0> { - FORCEEN_W::new(self) + pub fn forceen(&mut self) -> ForceenW { + ForceenW::new(self, 0) } #[doc = "Bit 1 - Disable On-demand"] #[inline(always)] #[must_use] - pub fn disondemand(&mut self) -> DISONDEMAND_W<1> { - DISONDEMAND_W::new(self) + pub fn disondemand(&mut self) -> DisondemandW { + DisondemandW::new(self, 1) } #[doc = "Bit 2 - EM23 On-demand"] #[inline(always)] #[must_use] - pub fn em23ondemand(&mut self) -> EM23ONDEMAND_W<2> { - EM23ONDEMAND_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn em23ondemand(&mut self) -> Em23ondemandW { + Em23ondemandW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/ien.rs index 51fcddd..083f61d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/ien.rs @@ -1,80 +1,40 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RDY` reader - RDY Interrupt Enable"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `RDY` writer - RDY Interrupt Enable"] -pub type RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RdyW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - RDY Interrupt Enable"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - RDY Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rdy(&mut self) -> RDY_W<0> { - RDY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rdy(&mut self) -> RdyW { + RdyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/if_.rs index 4522265..eb7a8d5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/if_.rs @@ -1,80 +1,40 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RDY` reader - Ready Interrupt Flag"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `RDY` writer - Ready Interrupt Flag"] -pub type RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RdyW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Ready Interrupt Flag"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - Ready Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rdy(&mut self) -> RDY_W<0> { - RDY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rdy(&mut self) -> RdyW { + RdyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/ipversion.rs index 5a9852f..568e909 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x02"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/lock.rs index f6fb4c9..8029d13 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Lock Key\n\nValue on reset: 33173"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "33173: Unlock code"] - UNLOCK = 33173, + Unlock = 33173, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Unlock code"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0x8195"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0x8195; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0x8195; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/status.rs index 3dbe8e6..7570ec0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_ns/status.rs @@ -1,99 +1,84 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RDY` reader - Ready"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `FREQBSY` reader - Frequency Updating Busy"] -pub type FREQBSY_R = crate::BitReader; +pub type FreqbsyR = crate::BitReader; #[doc = "Field `SYNCBUSY` reader - Synchronization Busy"] -pub type SYNCBUSY_R = crate::BitReader; +pub type SyncbusyR = crate::BitReader; #[doc = "Field `ENS` reader - Enable Status"] -pub type ENS_R = crate::BitReader; -#[doc = "Field `LOCK` reader - Lock Status"] -pub type LOCK_R = crate::BitReader; +pub type EnsR = crate::BitReader; #[doc = "Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCK_A { +pub enum Lock { #[doc = "0: HFRCO is unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: HFRCO is locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCK_A) -> Self { + fn from(variant: Lock) -> Self { variant as u8 != 0 } } -impl LOCK_R { +#[doc = "Field `LOCK` reader - Lock Status"] +pub type LockR = crate::BitReader; +impl LockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCK_A { + pub const fn variant(&self) -> Lock { match self.bits { - false => LOCK_A::UNLOCKED, - true => LOCK_A::LOCKED, + false => Lock::Unlocked, + true => Lock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "HFRCO is unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCK_A::UNLOCKED + *self == Lock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "HFRCO is locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCK_A::LOCKED + *self == Lock::Locked } } impl R { #[doc = "Bit 0 - Ready"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Frequency Updating Busy"] #[inline(always)] - pub fn freqbsy(&self) -> FREQBSY_R { - FREQBSY_R::new(((self.bits >> 1) & 1) != 0) + pub fn freqbsy(&self) -> FreqbsyR { + FreqbsyR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Synchronization Busy"] #[inline(always)] - pub fn syncbusy(&self) -> SYNCBUSY_R { - SYNCBUSY_R::new(((self.bits >> 2) & 1) != 0) + pub fn syncbusy(&self) -> SyncbusyR { + SyncbusyR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 16 - Enable Status"] #[inline(always)] - pub fn ens(&self) -> ENS_R { - ENS_R::new(((self.bits >> 16) & 1) != 0) + pub fn ens(&self) -> EnsR { + EnsR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 31 - Lock Status"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new(((self.bits >> 31) & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s.rs index 4919e58..2364dc1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s.rs @@ -1,47 +1,91 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + ctrl: Ctrl, + cal: Cal, + status: Status, + if_: If, + ien: Ien, + _reserved6: [u8; 0x04], + lock: Lock, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x08 - No Description"] - pub cal: CAL, + #[inline(always)] + pub const fn cal(&self) -> &Cal { + &self.cal + } #[doc = "0x0c - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x10 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x14 - No Description"] - pub ien: IEN, - _reserved6: [u8; 0x04], + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x1c - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CAL (rw) register accessor: an alias for `Reg`"] -pub type CAL = crate::Reg; +#[doc = "CAL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cal::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cal::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cal`] +module"] +#[doc(alias = "CAL")] +pub type Cal = crate::Reg; #[doc = "No Description"] pub mod cal; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/cal.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/cal.rs index a79a6e6..d187636 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/cal.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/cal.rs @@ -1,246 +1,214 @@ #[doc = "Register `CAL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CAL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TUNING` reader - Tuning Value"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `TUNING` writer - Tuning Value"] -pub type TUNING_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 7, O>; +pub type TuningW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `FINETUNING` reader - Fine Tuning Value"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `FINETUNING` writer - Fine Tuning Value"] -pub type FINETUNING_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 6, O>; +pub type FinetuningW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `LDOHP` reader - LDO High Power Mode"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `LDOHP` writer - LDO High Power Mode"] -pub type LDOHP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CAL_SPEC, bool, O>; +pub type LdohpW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FREQRANGE` reader - Frequency Range"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `FREQRANGE` writer - Frequency Range"] -pub type FREQRANGE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 5, O>; +pub type FreqrangeW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `CMPBIAS` reader - Comparator Bias Current"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CMPBIAS` writer - Comparator Bias Current"] -pub type CMPBIAS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 3, O>; -#[doc = "Field `CLKDIV` reader - Locally Divide HFRCO Clock Output"] -pub type CLKDIV_R = crate::FieldReader; +pub type CmpbiasW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Locally Divide HFRCO Clock Output\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKDIV_A { +pub enum Clkdiv { #[doc = "0: Divide by 1."] - DIV1 = 0, + Div1 = 0, #[doc = "1: Divide by 2."] - DIV2 = 1, + Div2 = 1, #[doc = "2: Divide by 4."] - DIV4 = 2, + Div4 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKDIV_A) -> Self { + fn from(variant: Clkdiv) -> Self { variant as _ } } -impl CLKDIV_R { +impl crate::FieldSpec for Clkdiv { + type Ux = u8; +} +impl crate::IsEnum for Clkdiv {} +#[doc = "Field `CLKDIV` reader - Locally Divide HFRCO Clock Output"] +pub type ClkdivR = crate::FieldReader; +impl ClkdivR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKDIV_A::DIV1), - 1 => Some(CLKDIV_A::DIV2), - 2 => Some(CLKDIV_A::DIV4), + 0 => Some(Clkdiv::Div1), + 1 => Some(Clkdiv::Div2), + 2 => Some(Clkdiv::Div4), _ => None, } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "Divide by 1."] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == CLKDIV_A::DIV1 + *self == Clkdiv::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "Divide by 2."] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == CLKDIV_A::DIV2 + *self == Clkdiv::Div2 } - #[doc = "Checks if the value of the field is `DIV4`"] + #[doc = "Divide by 4."] #[inline(always)] pub fn is_div4(&self) -> bool { - *self == CLKDIV_A::DIV4 + *self == Clkdiv::Div4 } } #[doc = "Field `CLKDIV` writer - Locally Divide HFRCO Clock Output"] -pub type CLKDIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, CLKDIV_A, 2, O>; -impl<'a, const O: u8> CLKDIV_W<'a, O> { +pub type ClkdivW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clkdiv>; +impl<'a, REG> ClkdivW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Divide by 1."] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(CLKDIV_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Clkdiv::Div1) } #[doc = "Divide by 2."] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(CLKDIV_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Clkdiv::Div2) } #[doc = "Divide by 4."] #[inline(always)] - pub fn div4(self) -> &'a mut W { - self.variant(CLKDIV_A::DIV4) + pub fn div4(self) -> &'a mut crate::W { + self.variant(Clkdiv::Div4) } } #[doc = "Field `CMPSEL` reader - Comparator Load Select"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `CMPSEL` writer - Comparator Load Select"] -pub type CMPSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 2, O>; +pub type CmpselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `IREFTC` reader - Tempco Trim on Comparator Current"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; #[doc = "Field `IREFTC` writer - Tempco Trim on Comparator Current"] -pub type IREFTC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 4, O>; +pub type IreftcW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:6 - Tuning Value"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - Fine Tuning Value"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - LDO High Power Mode"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - Frequency Range"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - Comparator Bias Current"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - Locally Divide HFRCO Clock Output"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Comparator Load Select"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - Tempco Trim on Comparator Current"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:6 - Tuning Value"] #[inline(always)] #[must_use] - pub fn tuning(&mut self) -> TUNING_W<0> { - TUNING_W::new(self) + pub fn tuning(&mut self) -> TuningW { + TuningW::new(self, 0) } #[doc = "Bits 8:13 - Fine Tuning Value"] #[inline(always)] #[must_use] - pub fn finetuning(&mut self) -> FINETUNING_W<8> { - FINETUNING_W::new(self) + pub fn finetuning(&mut self) -> FinetuningW { + FinetuningW::new(self, 8) } #[doc = "Bit 15 - LDO High Power Mode"] #[inline(always)] #[must_use] - pub fn ldohp(&mut self) -> LDOHP_W<15> { - LDOHP_W::new(self) + pub fn ldohp(&mut self) -> LdohpW { + LdohpW::new(self, 15) } #[doc = "Bits 16:20 - Frequency Range"] #[inline(always)] #[must_use] - pub fn freqrange(&mut self) -> FREQRANGE_W<16> { - FREQRANGE_W::new(self) + pub fn freqrange(&mut self) -> FreqrangeW { + FreqrangeW::new(self, 16) } #[doc = "Bits 21:23 - Comparator Bias Current"] #[inline(always)] #[must_use] - pub fn cmpbias(&mut self) -> CMPBIAS_W<21> { - CMPBIAS_W::new(self) + pub fn cmpbias(&mut self) -> CmpbiasW { + CmpbiasW::new(self, 21) } #[doc = "Bits 24:25 - Locally Divide HFRCO Clock Output"] #[inline(always)] #[must_use] - pub fn clkdiv(&mut self) -> CLKDIV_W<24> { - CLKDIV_W::new(self) + pub fn clkdiv(&mut self) -> ClkdivW { + ClkdivW::new(self, 24) } #[doc = "Bits 26:27 - Comparator Load Select"] #[inline(always)] #[must_use] - pub fn cmpsel(&mut self) -> CMPSEL_W<26> { - CMPSEL_W::new(self) + pub fn cmpsel(&mut self) -> CmpselW { + CmpselW::new(self, 26) } #[doc = "Bits 28:31 - Tempco Trim on Comparator Current"] #[inline(always)] #[must_use] - pub fn ireftc(&mut self) -> IREFTC_W<28> { - IREFTC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ireftc(&mut self) -> IreftcW { + IreftcW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cal](index.html) module"] -pub struct CAL_SPEC; -impl crate::RegisterSpec for CAL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cal::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cal::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CalSpec; +impl crate::RegisterSpec for CalSpec { type Ux = u32; } -#[doc = "`read()` method returns [cal::R](R) reader structure"] -impl crate::Readable for CAL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cal::W](W) writer structure"] -impl crate::Writable for CAL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cal::R`](R) reader structure"] +impl crate::Readable for CalSpec {} +#[doc = "`write(|w| ..)` method takes [`cal::W`](W) writer structure"] +impl crate::Writable for CalSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CAL to value 0xa868_9f7f"] -impl crate::Resettable for CAL_SPEC { - const RESET_VALUE: Self::Ux = 0xa868_9f7f; +impl crate::Resettable for CalSpec { + const RESET_VALUE: u32 = 0xa868_9f7f; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/ctrl.rs index 400c7fb..5d3b85e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/ctrl.rs @@ -1,110 +1,70 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `FORCEEN` reader - Force Enable"] -pub type FORCEEN_R = crate::BitReader; +pub type ForceenR = crate::BitReader; #[doc = "Field `FORCEEN` writer - Force Enable"] -pub type FORCEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type ForceenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISONDEMAND` reader - Disable On-demand"] -pub type DISONDEMAND_R = crate::BitReader; +pub type DisondemandR = crate::BitReader; #[doc = "Field `DISONDEMAND` writer - Disable On-demand"] -pub type DISONDEMAND_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type DisondemandW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM23ONDEMAND` reader - EM23 On-demand"] -pub type EM23ONDEMAND_R = crate::BitReader; +pub type Em23ondemandR = crate::BitReader; #[doc = "Field `EM23ONDEMAND` writer - EM23 On-demand"] -pub type EM23ONDEMAND_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type Em23ondemandW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Force Enable"] #[inline(always)] - pub fn forceen(&self) -> FORCEEN_R { - FORCEEN_R::new((self.bits & 1) != 0) + pub fn forceen(&self) -> ForceenR { + ForceenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disable On-demand"] #[inline(always)] - pub fn disondemand(&self) -> DISONDEMAND_R { - DISONDEMAND_R::new(((self.bits >> 1) & 1) != 0) + pub fn disondemand(&self) -> DisondemandR { + DisondemandR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - EM23 On-demand"] #[inline(always)] - pub fn em23ondemand(&self) -> EM23ONDEMAND_R { - EM23ONDEMAND_R::new(((self.bits >> 2) & 1) != 0) + pub fn em23ondemand(&self) -> Em23ondemandR { + Em23ondemandR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Force Enable"] #[inline(always)] #[must_use] - pub fn forceen(&mut self) -> FORCEEN_W<0> { - FORCEEN_W::new(self) + pub fn forceen(&mut self) -> ForceenW { + ForceenW::new(self, 0) } #[doc = "Bit 1 - Disable On-demand"] #[inline(always)] #[must_use] - pub fn disondemand(&mut self) -> DISONDEMAND_W<1> { - DISONDEMAND_W::new(self) + pub fn disondemand(&mut self) -> DisondemandW { + DisondemandW::new(self, 1) } #[doc = "Bit 2 - EM23 On-demand"] #[inline(always)] #[must_use] - pub fn em23ondemand(&mut self) -> EM23ONDEMAND_W<2> { - EM23ONDEMAND_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn em23ondemand(&mut self) -> Em23ondemandW { + Em23ondemandW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/ien.rs index 51fcddd..083f61d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/ien.rs @@ -1,80 +1,40 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RDY` reader - RDY Interrupt Enable"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `RDY` writer - RDY Interrupt Enable"] -pub type RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RdyW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - RDY Interrupt Enable"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - RDY Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rdy(&mut self) -> RDY_W<0> { - RDY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rdy(&mut self) -> RdyW { + RdyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/if_.rs index 4522265..eb7a8d5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/if_.rs @@ -1,80 +1,40 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RDY` reader - Ready Interrupt Flag"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `RDY` writer - Ready Interrupt Flag"] -pub type RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RdyW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Ready Interrupt Flag"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - Ready Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rdy(&mut self) -> RDY_W<0> { - RDY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rdy(&mut self) -> RdyW { + RdyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/ipversion.rs index 5a9852f..568e909 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x02"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/lock.rs index f6fb4c9..8029d13 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Lock Key\n\nValue on reset: 33173"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "33173: Unlock code"] - UNLOCK = 33173, + Unlock = 33173, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Unlock code"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0x8195"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0x8195; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0x8195; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/status.rs index 3dbe8e6..7570ec0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrco0_s/status.rs @@ -1,99 +1,84 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RDY` reader - Ready"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `FREQBSY` reader - Frequency Updating Busy"] -pub type FREQBSY_R = crate::BitReader; +pub type FreqbsyR = crate::BitReader; #[doc = "Field `SYNCBUSY` reader - Synchronization Busy"] -pub type SYNCBUSY_R = crate::BitReader; +pub type SyncbusyR = crate::BitReader; #[doc = "Field `ENS` reader - Enable Status"] -pub type ENS_R = crate::BitReader; -#[doc = "Field `LOCK` reader - Lock Status"] -pub type LOCK_R = crate::BitReader; +pub type EnsR = crate::BitReader; #[doc = "Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCK_A { +pub enum Lock { #[doc = "0: HFRCO is unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: HFRCO is locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCK_A) -> Self { + fn from(variant: Lock) -> Self { variant as u8 != 0 } } -impl LOCK_R { +#[doc = "Field `LOCK` reader - Lock Status"] +pub type LockR = crate::BitReader; +impl LockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCK_A { + pub const fn variant(&self) -> Lock { match self.bits { - false => LOCK_A::UNLOCKED, - true => LOCK_A::LOCKED, + false => Lock::Unlocked, + true => Lock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "HFRCO is unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCK_A::UNLOCKED + *self == Lock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "HFRCO is locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCK_A::LOCKED + *self == Lock::Locked } } impl R { #[doc = "Bit 0 - Ready"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Frequency Updating Busy"] #[inline(always)] - pub fn freqbsy(&self) -> FREQBSY_R { - FREQBSY_R::new(((self.bits >> 1) & 1) != 0) + pub fn freqbsy(&self) -> FreqbsyR { + FreqbsyR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Synchronization Busy"] #[inline(always)] - pub fn syncbusy(&self) -> SYNCBUSY_R { - SYNCBUSY_R::new(((self.bits >> 2) & 1) != 0) + pub fn syncbusy(&self) -> SyncbusyR { + SyncbusyR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 16 - Enable Status"] #[inline(always)] - pub fn ens(&self) -> ENS_R { - ENS_R::new(((self.bits >> 16) & 1) != 0) + pub fn ens(&self) -> EnsR { + EnsR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 31 - Lock Status"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new(((self.bits >> 31) & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns.rs index 4919e58..2364dc1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns.rs @@ -1,47 +1,91 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + ctrl: Ctrl, + cal: Cal, + status: Status, + if_: If, + ien: Ien, + _reserved6: [u8; 0x04], + lock: Lock, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x08 - No Description"] - pub cal: CAL, + #[inline(always)] + pub const fn cal(&self) -> &Cal { + &self.cal + } #[doc = "0x0c - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x10 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x14 - No Description"] - pub ien: IEN, - _reserved6: [u8; 0x04], + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x1c - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CAL (rw) register accessor: an alias for `Reg`"] -pub type CAL = crate::Reg; +#[doc = "CAL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cal::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cal::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cal`] +module"] +#[doc(alias = "CAL")] +pub type Cal = crate::Reg; #[doc = "No Description"] pub mod cal; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/cal.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/cal.rs index a79a6e6..d187636 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/cal.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/cal.rs @@ -1,246 +1,214 @@ #[doc = "Register `CAL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CAL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TUNING` reader - Tuning Value"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `TUNING` writer - Tuning Value"] -pub type TUNING_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 7, O>; +pub type TuningW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `FINETUNING` reader - Fine Tuning Value"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `FINETUNING` writer - Fine Tuning Value"] -pub type FINETUNING_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 6, O>; +pub type FinetuningW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `LDOHP` reader - LDO High Power Mode"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `LDOHP` writer - LDO High Power Mode"] -pub type LDOHP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CAL_SPEC, bool, O>; +pub type LdohpW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FREQRANGE` reader - Frequency Range"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `FREQRANGE` writer - Frequency Range"] -pub type FREQRANGE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 5, O>; +pub type FreqrangeW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `CMPBIAS` reader - Comparator Bias Current"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CMPBIAS` writer - Comparator Bias Current"] -pub type CMPBIAS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 3, O>; -#[doc = "Field `CLKDIV` reader - Locally Divide HFRCO Clock Output"] -pub type CLKDIV_R = crate::FieldReader; +pub type CmpbiasW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Locally Divide HFRCO Clock Output\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKDIV_A { +pub enum Clkdiv { #[doc = "0: Divide by 1."] - DIV1 = 0, + Div1 = 0, #[doc = "1: Divide by 2."] - DIV2 = 1, + Div2 = 1, #[doc = "2: Divide by 4."] - DIV4 = 2, + Div4 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKDIV_A) -> Self { + fn from(variant: Clkdiv) -> Self { variant as _ } } -impl CLKDIV_R { +impl crate::FieldSpec for Clkdiv { + type Ux = u8; +} +impl crate::IsEnum for Clkdiv {} +#[doc = "Field `CLKDIV` reader - Locally Divide HFRCO Clock Output"] +pub type ClkdivR = crate::FieldReader; +impl ClkdivR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKDIV_A::DIV1), - 1 => Some(CLKDIV_A::DIV2), - 2 => Some(CLKDIV_A::DIV4), + 0 => Some(Clkdiv::Div1), + 1 => Some(Clkdiv::Div2), + 2 => Some(Clkdiv::Div4), _ => None, } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "Divide by 1."] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == CLKDIV_A::DIV1 + *self == Clkdiv::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "Divide by 2."] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == CLKDIV_A::DIV2 + *self == Clkdiv::Div2 } - #[doc = "Checks if the value of the field is `DIV4`"] + #[doc = "Divide by 4."] #[inline(always)] pub fn is_div4(&self) -> bool { - *self == CLKDIV_A::DIV4 + *self == Clkdiv::Div4 } } #[doc = "Field `CLKDIV` writer - Locally Divide HFRCO Clock Output"] -pub type CLKDIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, CLKDIV_A, 2, O>; -impl<'a, const O: u8> CLKDIV_W<'a, O> { +pub type ClkdivW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clkdiv>; +impl<'a, REG> ClkdivW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Divide by 1."] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(CLKDIV_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Clkdiv::Div1) } #[doc = "Divide by 2."] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(CLKDIV_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Clkdiv::Div2) } #[doc = "Divide by 4."] #[inline(always)] - pub fn div4(self) -> &'a mut W { - self.variant(CLKDIV_A::DIV4) + pub fn div4(self) -> &'a mut crate::W { + self.variant(Clkdiv::Div4) } } #[doc = "Field `CMPSEL` reader - Comparator Load Select"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `CMPSEL` writer - Comparator Load Select"] -pub type CMPSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 2, O>; +pub type CmpselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `IREFTC` reader - Tempco Trim on Comparator Current"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; #[doc = "Field `IREFTC` writer - Tempco Trim on Comparator Current"] -pub type IREFTC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 4, O>; +pub type IreftcW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:6 - Tuning Value"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - Fine Tuning Value"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - LDO High Power Mode"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - Frequency Range"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - Comparator Bias Current"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - Locally Divide HFRCO Clock Output"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Comparator Load Select"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - Tempco Trim on Comparator Current"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:6 - Tuning Value"] #[inline(always)] #[must_use] - pub fn tuning(&mut self) -> TUNING_W<0> { - TUNING_W::new(self) + pub fn tuning(&mut self) -> TuningW { + TuningW::new(self, 0) } #[doc = "Bits 8:13 - Fine Tuning Value"] #[inline(always)] #[must_use] - pub fn finetuning(&mut self) -> FINETUNING_W<8> { - FINETUNING_W::new(self) + pub fn finetuning(&mut self) -> FinetuningW { + FinetuningW::new(self, 8) } #[doc = "Bit 15 - LDO High Power Mode"] #[inline(always)] #[must_use] - pub fn ldohp(&mut self) -> LDOHP_W<15> { - LDOHP_W::new(self) + pub fn ldohp(&mut self) -> LdohpW { + LdohpW::new(self, 15) } #[doc = "Bits 16:20 - Frequency Range"] #[inline(always)] #[must_use] - pub fn freqrange(&mut self) -> FREQRANGE_W<16> { - FREQRANGE_W::new(self) + pub fn freqrange(&mut self) -> FreqrangeW { + FreqrangeW::new(self, 16) } #[doc = "Bits 21:23 - Comparator Bias Current"] #[inline(always)] #[must_use] - pub fn cmpbias(&mut self) -> CMPBIAS_W<21> { - CMPBIAS_W::new(self) + pub fn cmpbias(&mut self) -> CmpbiasW { + CmpbiasW::new(self, 21) } #[doc = "Bits 24:25 - Locally Divide HFRCO Clock Output"] #[inline(always)] #[must_use] - pub fn clkdiv(&mut self) -> CLKDIV_W<24> { - CLKDIV_W::new(self) + pub fn clkdiv(&mut self) -> ClkdivW { + ClkdivW::new(self, 24) } #[doc = "Bits 26:27 - Comparator Load Select"] #[inline(always)] #[must_use] - pub fn cmpsel(&mut self) -> CMPSEL_W<26> { - CMPSEL_W::new(self) + pub fn cmpsel(&mut self) -> CmpselW { + CmpselW::new(self, 26) } #[doc = "Bits 28:31 - Tempco Trim on Comparator Current"] #[inline(always)] #[must_use] - pub fn ireftc(&mut self) -> IREFTC_W<28> { - IREFTC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ireftc(&mut self) -> IreftcW { + IreftcW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cal](index.html) module"] -pub struct CAL_SPEC; -impl crate::RegisterSpec for CAL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cal::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cal::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CalSpec; +impl crate::RegisterSpec for CalSpec { type Ux = u32; } -#[doc = "`read()` method returns [cal::R](R) reader structure"] -impl crate::Readable for CAL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cal::W](W) writer structure"] -impl crate::Writable for CAL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cal::R`](R) reader structure"] +impl crate::Readable for CalSpec {} +#[doc = "`write(|w| ..)` method takes [`cal::W`](W) writer structure"] +impl crate::Writable for CalSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CAL to value 0xa868_9f7f"] -impl crate::Resettable for CAL_SPEC { - const RESET_VALUE: Self::Ux = 0xa868_9f7f; +impl crate::Resettable for CalSpec { + const RESET_VALUE: u32 = 0xa868_9f7f; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/ctrl.rs index 400c7fb..5d3b85e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/ctrl.rs @@ -1,110 +1,70 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `FORCEEN` reader - Force Enable"] -pub type FORCEEN_R = crate::BitReader; +pub type ForceenR = crate::BitReader; #[doc = "Field `FORCEEN` writer - Force Enable"] -pub type FORCEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type ForceenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISONDEMAND` reader - Disable On-demand"] -pub type DISONDEMAND_R = crate::BitReader; +pub type DisondemandR = crate::BitReader; #[doc = "Field `DISONDEMAND` writer - Disable On-demand"] -pub type DISONDEMAND_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type DisondemandW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM23ONDEMAND` reader - EM23 On-demand"] -pub type EM23ONDEMAND_R = crate::BitReader; +pub type Em23ondemandR = crate::BitReader; #[doc = "Field `EM23ONDEMAND` writer - EM23 On-demand"] -pub type EM23ONDEMAND_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type Em23ondemandW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Force Enable"] #[inline(always)] - pub fn forceen(&self) -> FORCEEN_R { - FORCEEN_R::new((self.bits & 1) != 0) + pub fn forceen(&self) -> ForceenR { + ForceenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disable On-demand"] #[inline(always)] - pub fn disondemand(&self) -> DISONDEMAND_R { - DISONDEMAND_R::new(((self.bits >> 1) & 1) != 0) + pub fn disondemand(&self) -> DisondemandR { + DisondemandR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - EM23 On-demand"] #[inline(always)] - pub fn em23ondemand(&self) -> EM23ONDEMAND_R { - EM23ONDEMAND_R::new(((self.bits >> 2) & 1) != 0) + pub fn em23ondemand(&self) -> Em23ondemandR { + Em23ondemandR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Force Enable"] #[inline(always)] #[must_use] - pub fn forceen(&mut self) -> FORCEEN_W<0> { - FORCEEN_W::new(self) + pub fn forceen(&mut self) -> ForceenW { + ForceenW::new(self, 0) } #[doc = "Bit 1 - Disable On-demand"] #[inline(always)] #[must_use] - pub fn disondemand(&mut self) -> DISONDEMAND_W<1> { - DISONDEMAND_W::new(self) + pub fn disondemand(&mut self) -> DisondemandW { + DisondemandW::new(self, 1) } #[doc = "Bit 2 - EM23 On-demand"] #[inline(always)] #[must_use] - pub fn em23ondemand(&mut self) -> EM23ONDEMAND_W<2> { - EM23ONDEMAND_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn em23ondemand(&mut self) -> Em23ondemandW { + Em23ondemandW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/ien.rs index 51fcddd..083f61d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/ien.rs @@ -1,80 +1,40 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RDY` reader - RDY Interrupt Enable"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `RDY` writer - RDY Interrupt Enable"] -pub type RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RdyW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - RDY Interrupt Enable"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - RDY Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rdy(&mut self) -> RDY_W<0> { - RDY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rdy(&mut self) -> RdyW { + RdyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/if_.rs index 4522265..eb7a8d5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/if_.rs @@ -1,80 +1,40 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RDY` reader - Ready Interrupt Flag"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `RDY` writer - Ready Interrupt Flag"] -pub type RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RdyW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Ready Interrupt Flag"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - Ready Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rdy(&mut self) -> RDY_W<0> { - RDY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rdy(&mut self) -> RdyW { + RdyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/ipversion.rs index 5a9852f..568e909 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x02"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/lock.rs index f6fb4c9..8029d13 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Lock Key\n\nValue on reset: 33173"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "33173: Unlock code"] - UNLOCK = 33173, + Unlock = 33173, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Unlock code"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0x8195"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0x8195; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0x8195; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/status.rs index 3dbe8e6..7570ec0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_ns/status.rs @@ -1,99 +1,84 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RDY` reader - Ready"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `FREQBSY` reader - Frequency Updating Busy"] -pub type FREQBSY_R = crate::BitReader; +pub type FreqbsyR = crate::BitReader; #[doc = "Field `SYNCBUSY` reader - Synchronization Busy"] -pub type SYNCBUSY_R = crate::BitReader; +pub type SyncbusyR = crate::BitReader; #[doc = "Field `ENS` reader - Enable Status"] -pub type ENS_R = crate::BitReader; -#[doc = "Field `LOCK` reader - Lock Status"] -pub type LOCK_R = crate::BitReader; +pub type EnsR = crate::BitReader; #[doc = "Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCK_A { +pub enum Lock { #[doc = "0: HFRCO is unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: HFRCO is locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCK_A) -> Self { + fn from(variant: Lock) -> Self { variant as u8 != 0 } } -impl LOCK_R { +#[doc = "Field `LOCK` reader - Lock Status"] +pub type LockR = crate::BitReader; +impl LockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCK_A { + pub const fn variant(&self) -> Lock { match self.bits { - false => LOCK_A::UNLOCKED, - true => LOCK_A::LOCKED, + false => Lock::Unlocked, + true => Lock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "HFRCO is unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCK_A::UNLOCKED + *self == Lock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "HFRCO is locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCK_A::LOCKED + *self == Lock::Locked } } impl R { #[doc = "Bit 0 - Ready"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Frequency Updating Busy"] #[inline(always)] - pub fn freqbsy(&self) -> FREQBSY_R { - FREQBSY_R::new(((self.bits >> 1) & 1) != 0) + pub fn freqbsy(&self) -> FreqbsyR { + FreqbsyR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Synchronization Busy"] #[inline(always)] - pub fn syncbusy(&self) -> SYNCBUSY_R { - SYNCBUSY_R::new(((self.bits >> 2) & 1) != 0) + pub fn syncbusy(&self) -> SyncbusyR { + SyncbusyR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 16 - Enable Status"] #[inline(always)] - pub fn ens(&self) -> ENS_R { - ENS_R::new(((self.bits >> 16) & 1) != 0) + pub fn ens(&self) -> EnsR { + EnsR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 31 - Lock Status"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new(((self.bits >> 31) & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s.rs index 4919e58..2364dc1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s.rs @@ -1,47 +1,91 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + ctrl: Ctrl, + cal: Cal, + status: Status, + if_: If, + ien: Ien, + _reserved6: [u8; 0x04], + lock: Lock, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x08 - No Description"] - pub cal: CAL, + #[inline(always)] + pub const fn cal(&self) -> &Cal { + &self.cal + } #[doc = "0x0c - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x10 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x14 - No Description"] - pub ien: IEN, - _reserved6: [u8; 0x04], + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x1c - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CAL (rw) register accessor: an alias for `Reg`"] -pub type CAL = crate::Reg; +#[doc = "CAL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cal::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cal::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cal`] +module"] +#[doc(alias = "CAL")] +pub type Cal = crate::Reg; #[doc = "No Description"] pub mod cal; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/cal.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/cal.rs index a79a6e6..d187636 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/cal.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/cal.rs @@ -1,246 +1,214 @@ #[doc = "Register `CAL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CAL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TUNING` reader - Tuning Value"] -pub type TUNING_R = crate::FieldReader; +pub type TuningR = crate::FieldReader; #[doc = "Field `TUNING` writer - Tuning Value"] -pub type TUNING_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 7, O>; +pub type TuningW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `FINETUNING` reader - Fine Tuning Value"] -pub type FINETUNING_R = crate::FieldReader; +pub type FinetuningR = crate::FieldReader; #[doc = "Field `FINETUNING` writer - Fine Tuning Value"] -pub type FINETUNING_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 6, O>; +pub type FinetuningW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `LDOHP` reader - LDO High Power Mode"] -pub type LDOHP_R = crate::BitReader; +pub type LdohpR = crate::BitReader; #[doc = "Field `LDOHP` writer - LDO High Power Mode"] -pub type LDOHP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CAL_SPEC, bool, O>; +pub type LdohpW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FREQRANGE` reader - Frequency Range"] -pub type FREQRANGE_R = crate::FieldReader; +pub type FreqrangeR = crate::FieldReader; #[doc = "Field `FREQRANGE` writer - Frequency Range"] -pub type FREQRANGE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 5, O>; +pub type FreqrangeW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `CMPBIAS` reader - Comparator Bias Current"] -pub type CMPBIAS_R = crate::FieldReader; +pub type CmpbiasR = crate::FieldReader; #[doc = "Field `CMPBIAS` writer - Comparator Bias Current"] -pub type CMPBIAS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 3, O>; -#[doc = "Field `CLKDIV` reader - Locally Divide HFRCO Clock Output"] -pub type CLKDIV_R = crate::FieldReader; +pub type CmpbiasW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Locally Divide HFRCO Clock Output\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKDIV_A { +pub enum Clkdiv { #[doc = "0: Divide by 1."] - DIV1 = 0, + Div1 = 0, #[doc = "1: Divide by 2."] - DIV2 = 1, + Div2 = 1, #[doc = "2: Divide by 4."] - DIV4 = 2, + Div4 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKDIV_A) -> Self { + fn from(variant: Clkdiv) -> Self { variant as _ } } -impl CLKDIV_R { +impl crate::FieldSpec for Clkdiv { + type Ux = u8; +} +impl crate::IsEnum for Clkdiv {} +#[doc = "Field `CLKDIV` reader - Locally Divide HFRCO Clock Output"] +pub type ClkdivR = crate::FieldReader; +impl ClkdivR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKDIV_A::DIV1), - 1 => Some(CLKDIV_A::DIV2), - 2 => Some(CLKDIV_A::DIV4), + 0 => Some(Clkdiv::Div1), + 1 => Some(Clkdiv::Div2), + 2 => Some(Clkdiv::Div4), _ => None, } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "Divide by 1."] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == CLKDIV_A::DIV1 + *self == Clkdiv::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "Divide by 2."] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == CLKDIV_A::DIV2 + *self == Clkdiv::Div2 } - #[doc = "Checks if the value of the field is `DIV4`"] + #[doc = "Divide by 4."] #[inline(always)] pub fn is_div4(&self) -> bool { - *self == CLKDIV_A::DIV4 + *self == Clkdiv::Div4 } } #[doc = "Field `CLKDIV` writer - Locally Divide HFRCO Clock Output"] -pub type CLKDIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, CLKDIV_A, 2, O>; -impl<'a, const O: u8> CLKDIV_W<'a, O> { +pub type ClkdivW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clkdiv>; +impl<'a, REG> ClkdivW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Divide by 1."] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(CLKDIV_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Clkdiv::Div1) } #[doc = "Divide by 2."] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(CLKDIV_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Clkdiv::Div2) } #[doc = "Divide by 4."] #[inline(always)] - pub fn div4(self) -> &'a mut W { - self.variant(CLKDIV_A::DIV4) + pub fn div4(self) -> &'a mut crate::W { + self.variant(Clkdiv::Div4) } } #[doc = "Field `CMPSEL` reader - Comparator Load Select"] -pub type CMPSEL_R = crate::FieldReader; +pub type CmpselR = crate::FieldReader; #[doc = "Field `CMPSEL` writer - Comparator Load Select"] -pub type CMPSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 2, O>; +pub type CmpselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `IREFTC` reader - Tempco Trim on Comparator Current"] -pub type IREFTC_R = crate::FieldReader; +pub type IreftcR = crate::FieldReader; #[doc = "Field `IREFTC` writer - Tempco Trim on Comparator Current"] -pub type IREFTC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 4, O>; +pub type IreftcW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:6 - Tuning Value"] #[inline(always)] - pub fn tuning(&self) -> TUNING_R { - TUNING_R::new((self.bits & 0x7f) as u8) + pub fn tuning(&self) -> TuningR { + TuningR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:13 - Fine Tuning Value"] #[inline(always)] - pub fn finetuning(&self) -> FINETUNING_R { - FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn finetuning(&self) -> FinetuningR { + FinetuningR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 15 - LDO High Power Mode"] #[inline(always)] - pub fn ldohp(&self) -> LDOHP_R { - LDOHP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ldohp(&self) -> LdohpR { + LdohpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - Frequency Range"] #[inline(always)] - pub fn freqrange(&self) -> FREQRANGE_R { - FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn freqrange(&self) -> FreqrangeR { + FreqrangeR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - Comparator Bias Current"] #[inline(always)] - pub fn cmpbias(&self) -> CMPBIAS_R { - CMPBIAS_R::new(((self.bits >> 21) & 7) as u8) + pub fn cmpbias(&self) -> CmpbiasR { + CmpbiasR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 24:25 - Locally Divide HFRCO Clock Output"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(((self.bits >> 24) & 3) as u8) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Comparator Load Select"] #[inline(always)] - pub fn cmpsel(&self) -> CMPSEL_R { - CMPSEL_R::new(((self.bits >> 26) & 3) as u8) + pub fn cmpsel(&self) -> CmpselR { + CmpselR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:31 - Tempco Trim on Comparator Current"] #[inline(always)] - pub fn ireftc(&self) -> IREFTC_R { - IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn ireftc(&self) -> IreftcR { + IreftcR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:6 - Tuning Value"] #[inline(always)] #[must_use] - pub fn tuning(&mut self) -> TUNING_W<0> { - TUNING_W::new(self) + pub fn tuning(&mut self) -> TuningW { + TuningW::new(self, 0) } #[doc = "Bits 8:13 - Fine Tuning Value"] #[inline(always)] #[must_use] - pub fn finetuning(&mut self) -> FINETUNING_W<8> { - FINETUNING_W::new(self) + pub fn finetuning(&mut self) -> FinetuningW { + FinetuningW::new(self, 8) } #[doc = "Bit 15 - LDO High Power Mode"] #[inline(always)] #[must_use] - pub fn ldohp(&mut self) -> LDOHP_W<15> { - LDOHP_W::new(self) + pub fn ldohp(&mut self) -> LdohpW { + LdohpW::new(self, 15) } #[doc = "Bits 16:20 - Frequency Range"] #[inline(always)] #[must_use] - pub fn freqrange(&mut self) -> FREQRANGE_W<16> { - FREQRANGE_W::new(self) + pub fn freqrange(&mut self) -> FreqrangeW { + FreqrangeW::new(self, 16) } #[doc = "Bits 21:23 - Comparator Bias Current"] #[inline(always)] #[must_use] - pub fn cmpbias(&mut self) -> CMPBIAS_W<21> { - CMPBIAS_W::new(self) + pub fn cmpbias(&mut self) -> CmpbiasW { + CmpbiasW::new(self, 21) } #[doc = "Bits 24:25 - Locally Divide HFRCO Clock Output"] #[inline(always)] #[must_use] - pub fn clkdiv(&mut self) -> CLKDIV_W<24> { - CLKDIV_W::new(self) + pub fn clkdiv(&mut self) -> ClkdivW { + ClkdivW::new(self, 24) } #[doc = "Bits 26:27 - Comparator Load Select"] #[inline(always)] #[must_use] - pub fn cmpsel(&mut self) -> CMPSEL_W<26> { - CMPSEL_W::new(self) + pub fn cmpsel(&mut self) -> CmpselW { + CmpselW::new(self, 26) } #[doc = "Bits 28:31 - Tempco Trim on Comparator Current"] #[inline(always)] #[must_use] - pub fn ireftc(&mut self) -> IREFTC_W<28> { - IREFTC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ireftc(&mut self) -> IreftcW { + IreftcW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cal](index.html) module"] -pub struct CAL_SPEC; -impl crate::RegisterSpec for CAL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cal::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cal::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CalSpec; +impl crate::RegisterSpec for CalSpec { type Ux = u32; } -#[doc = "`read()` method returns [cal::R](R) reader structure"] -impl crate::Readable for CAL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cal::W](W) writer structure"] -impl crate::Writable for CAL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cal::R`](R) reader structure"] +impl crate::Readable for CalSpec {} +#[doc = "`write(|w| ..)` method takes [`cal::W`](W) writer structure"] +impl crate::Writable for CalSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CAL to value 0xa868_9f7f"] -impl crate::Resettable for CAL_SPEC { - const RESET_VALUE: Self::Ux = 0xa868_9f7f; +impl crate::Resettable for CalSpec { + const RESET_VALUE: u32 = 0xa868_9f7f; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/ctrl.rs index 400c7fb..5d3b85e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/ctrl.rs @@ -1,110 +1,70 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `FORCEEN` reader - Force Enable"] -pub type FORCEEN_R = crate::BitReader; +pub type ForceenR = crate::BitReader; #[doc = "Field `FORCEEN` writer - Force Enable"] -pub type FORCEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type ForceenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISONDEMAND` reader - Disable On-demand"] -pub type DISONDEMAND_R = crate::BitReader; +pub type DisondemandR = crate::BitReader; #[doc = "Field `DISONDEMAND` writer - Disable On-demand"] -pub type DISONDEMAND_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type DisondemandW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM23ONDEMAND` reader - EM23 On-demand"] -pub type EM23ONDEMAND_R = crate::BitReader; +pub type Em23ondemandR = crate::BitReader; #[doc = "Field `EM23ONDEMAND` writer - EM23 On-demand"] -pub type EM23ONDEMAND_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type Em23ondemandW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Force Enable"] #[inline(always)] - pub fn forceen(&self) -> FORCEEN_R { - FORCEEN_R::new((self.bits & 1) != 0) + pub fn forceen(&self) -> ForceenR { + ForceenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disable On-demand"] #[inline(always)] - pub fn disondemand(&self) -> DISONDEMAND_R { - DISONDEMAND_R::new(((self.bits >> 1) & 1) != 0) + pub fn disondemand(&self) -> DisondemandR { + DisondemandR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - EM23 On-demand"] #[inline(always)] - pub fn em23ondemand(&self) -> EM23ONDEMAND_R { - EM23ONDEMAND_R::new(((self.bits >> 2) & 1) != 0) + pub fn em23ondemand(&self) -> Em23ondemandR { + Em23ondemandR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Force Enable"] #[inline(always)] #[must_use] - pub fn forceen(&mut self) -> FORCEEN_W<0> { - FORCEEN_W::new(self) + pub fn forceen(&mut self) -> ForceenW { + ForceenW::new(self, 0) } #[doc = "Bit 1 - Disable On-demand"] #[inline(always)] #[must_use] - pub fn disondemand(&mut self) -> DISONDEMAND_W<1> { - DISONDEMAND_W::new(self) + pub fn disondemand(&mut self) -> DisondemandW { + DisondemandW::new(self, 1) } #[doc = "Bit 2 - EM23 On-demand"] #[inline(always)] #[must_use] - pub fn em23ondemand(&mut self) -> EM23ONDEMAND_W<2> { - EM23ONDEMAND_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn em23ondemand(&mut self) -> Em23ondemandW { + Em23ondemandW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/ien.rs index 51fcddd..083f61d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/ien.rs @@ -1,80 +1,40 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RDY` reader - RDY Interrupt Enable"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `RDY` writer - RDY Interrupt Enable"] -pub type RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RdyW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - RDY Interrupt Enable"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - RDY Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rdy(&mut self) -> RDY_W<0> { - RDY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rdy(&mut self) -> RdyW { + RdyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/if_.rs index 4522265..eb7a8d5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/if_.rs @@ -1,80 +1,40 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RDY` reader - Ready Interrupt Flag"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `RDY` writer - Ready Interrupt Flag"] -pub type RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RdyW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Ready Interrupt Flag"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - Ready Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rdy(&mut self) -> RDY_W<0> { - RDY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rdy(&mut self) -> RdyW { + RdyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/ipversion.rs index 5a9852f..568e909 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x02"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/lock.rs index f6fb4c9..8029d13 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Lock Key\n\nValue on reset: 33173"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "33173: Unlock code"] - UNLOCK = 33173, + Unlock = 33173, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Unlock code"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0x8195"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0x8195; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0x8195; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/status.rs index 3dbe8e6..7570ec0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfrcoem23_s/status.rs @@ -1,99 +1,84 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RDY` reader - Ready"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `FREQBSY` reader - Frequency Updating Busy"] -pub type FREQBSY_R = crate::BitReader; +pub type FreqbsyR = crate::BitReader; #[doc = "Field `SYNCBUSY` reader - Synchronization Busy"] -pub type SYNCBUSY_R = crate::BitReader; +pub type SyncbusyR = crate::BitReader; #[doc = "Field `ENS` reader - Enable Status"] -pub type ENS_R = crate::BitReader; -#[doc = "Field `LOCK` reader - Lock Status"] -pub type LOCK_R = crate::BitReader; +pub type EnsR = crate::BitReader; #[doc = "Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCK_A { +pub enum Lock { #[doc = "0: HFRCO is unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: HFRCO is locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCK_A) -> Self { + fn from(variant: Lock) -> Self { variant as u8 != 0 } } -impl LOCK_R { +#[doc = "Field `LOCK` reader - Lock Status"] +pub type LockR = crate::BitReader; +impl LockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCK_A { + pub const fn variant(&self) -> Lock { match self.bits { - false => LOCK_A::UNLOCKED, - true => LOCK_A::LOCKED, + false => Lock::Unlocked, + true => Lock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "HFRCO is unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCK_A::UNLOCKED + *self == Lock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "HFRCO is locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCK_A::LOCKED + *self == Lock::Locked } } impl R { #[doc = "Bit 0 - Ready"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Frequency Updating Busy"] #[inline(always)] - pub fn freqbsy(&self) -> FREQBSY_R { - FREQBSY_R::new(((self.bits >> 1) & 1) != 0) + pub fn freqbsy(&self) -> FreqbsyR { + FreqbsyR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Synchronization Busy"] #[inline(always)] - pub fn syncbusy(&self) -> SYNCBUSY_R { - SYNCBUSY_R::new(((self.bits >> 2) & 1) != 0) + pub fn syncbusy(&self) -> SyncbusyR { + SyncbusyR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 16 - Enable Status"] #[inline(always)] - pub fn ens(&self) -> ENS_R { - ENS_R::new(((self.bits >> 16) & 1) != 0) + pub fn ens(&self) -> EnsR { + EnsR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 31 - Lock Status"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new(((self.bits >> 31) & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns.rs index 8e919fe..14677fc 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns.rs @@ -1,90 +1,170 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + ipversion: Ipversion, _reserved1: [u8; 0x0c], - #[doc = "0x10 - No Description"] - pub xtalcfg: XTALCFG, + xtalcfg: Xtalcfg, _reserved2: [u8; 0x04], + xtalctrl: Xtalctrl, + xtalctrl1: Xtalctrl1, + cfg: Cfg, + _reserved5: [u8; 0x04], + ctrl: Ctrl, + _reserved6: [u8; 0x14], + bufouttrim: Bufouttrim, + bufoutctrl: Bufoutctrl, + _reserved8: [u8; 0x08], + cmd: Cmd, + _reserved9: [u8; 0x04], + status: Status, + _reserved10: [u8; 0x14], + if_: If, + ien: Ien, + _reserved12: [u8; 0x08], + lock: Lock, +} +impl RegisterBlock { + #[doc = "0x00 - No Description"] + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } + #[doc = "0x10 - No Description"] + #[inline(always)] + pub const fn xtalcfg(&self) -> &Xtalcfg { + &self.xtalcfg + } #[doc = "0x18 - No Description"] - pub xtalctrl: XTALCTRL, + #[inline(always)] + pub const fn xtalctrl(&self) -> &Xtalctrl { + &self.xtalctrl + } #[doc = "0x1c - No Description"] - pub xtalctrl1: XTALCTRL1, + #[inline(always)] + pub const fn xtalctrl1(&self) -> &Xtalctrl1 { + &self.xtalctrl1 + } #[doc = "0x20 - No Description"] - pub cfg: CFG, - _reserved5: [u8; 0x04], + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x28 - No Description"] - pub ctrl: CTRL, - _reserved6: [u8; 0x14], + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x40 - No Description"] - pub bufouttrim: BUFOUTTRIM, + #[inline(always)] + pub const fn bufouttrim(&self) -> &Bufouttrim { + &self.bufouttrim + } #[doc = "0x44 - No Description"] - pub bufoutctrl: BUFOUTCTRL, - _reserved8: [u8; 0x08], + #[inline(always)] + pub const fn bufoutctrl(&self) -> &Bufoutctrl { + &self.bufoutctrl + } #[doc = "0x50 - No Description"] - pub cmd: CMD, - _reserved9: [u8; 0x04], + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x58 - No Description"] - pub status: STATUS, - _reserved10: [u8; 0x14], + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x70 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x74 - No Description"] - pub ien: IEN, - _reserved12: [u8; 0x08], + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x80 - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "XTALCFG (rw) register accessor: an alias for `Reg`"] -pub type XTALCFG = crate::Reg; +#[doc = "XTALCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`xtalcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`xtalcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@xtalcfg`] +module"] +#[doc(alias = "XTALCFG")] +pub type Xtalcfg = crate::Reg; #[doc = "No Description"] pub mod xtalcfg; -#[doc = "XTALCTRL (rw) register accessor: an alias for `Reg`"] -pub type XTALCTRL = crate::Reg; +#[doc = "XTALCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`xtalctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`xtalctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@xtalctrl`] +module"] +#[doc(alias = "XTALCTRL")] +pub type Xtalctrl = crate::Reg; #[doc = "No Description"] pub mod xtalctrl; -#[doc = "XTALCTRL1 (rw) register accessor: an alias for `Reg`"] -pub type XTALCTRL1 = crate::Reg; +#[doc = "XTALCTRL1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`xtalctrl1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`xtalctrl1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@xtalctrl1`] +module"] +#[doc(alias = "XTALCTRL1")] +pub type Xtalctrl1 = crate::Reg; #[doc = "No Description"] pub mod xtalctrl1; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "BUFOUTTRIM (rw) register accessor: an alias for `Reg`"] -pub type BUFOUTTRIM = crate::Reg; +#[doc = "BUFOUTTRIM (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bufouttrim::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bufouttrim::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bufouttrim`] +module"] +#[doc(alias = "BUFOUTTRIM")] +pub type Bufouttrim = crate::Reg; #[doc = "No Description"] pub mod bufouttrim; -#[doc = "BUFOUTCTRL (rw) register accessor: an alias for `Reg`"] -pub type BUFOUTCTRL = crate::Reg; +#[doc = "BUFOUTCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bufoutctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bufoutctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bufoutctrl`] +module"] +#[doc(alias = "BUFOUTCTRL")] +pub type Bufoutctrl = crate::Reg; #[doc = "No Description"] pub mod bufoutctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/bufoutctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/bufoutctrl.rs index 5eef728..6b633d5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/bufoutctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/bufoutctrl.rs @@ -1,865 +1,844 @@ #[doc = "Register `BUFOUTCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `BUFOUTCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `XOUTBIASANA` reader - Driver Bias Current"] -pub type XOUTBIASANA_R = crate::FieldReader; +pub type XoutbiasanaR = crate::FieldReader; #[doc = "Field `XOUTBIASANA` writer - Driver Bias Current"] -pub type XOUTBIASANA_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, BUFOUTCTRL_SPEC, u8, u8, 4, O>; +pub type XoutbiasanaW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `XOUTCFANA` reader - Buffer Gain"] -pub type XOUTCFANA_R = crate::FieldReader; +pub type XoutcfanaR = crate::FieldReader; #[doc = "Field `XOUTCFANA` writer - Buffer Gain"] -pub type XOUTCFANA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BUFOUTCTRL_SPEC, u8, u8, 4, O>; +pub type XoutcfanaW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `XOUTGMANA` reader - No Description"] -pub type XOUTGMANA_R = crate::FieldReader; +pub type XoutgmanaR = crate::FieldReader; #[doc = "Field `XOUTGMANA` writer - No Description"] -pub type XOUTGMANA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BUFOUTCTRL_SPEC, u8, u8, 4, O>; -#[doc = "Field `PEAKDETTHRESANA` reader - Peak Detector Threshold for XOUT"] -pub type PEAKDETTHRESANA_R = crate::FieldReader; +pub type XoutgmanaW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Peak Detector Threshold for XOUT\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PEAKDETTHRESANA_A { +pub enum Peakdetthresana { #[doc = "0: V105MV"] - V105MV = 0, + V105mv = 0, #[doc = "1: V132MV"] - V132MV = 1, + V132mv = 1, #[doc = "2: V157MV"] - V157MV = 2, + V157mv = 2, #[doc = "3: V184MV"] - V184MV = 3, + V184mv = 3, #[doc = "4: V210MV"] - V210MV = 4, + V210mv = 4, #[doc = "5: V236MV"] - V236MV = 5, + V236mv = 5, #[doc = "6: V262MV"] - V262MV = 6, + V262mv = 6, #[doc = "7: V289MV"] - V289MV = 7, + V289mv = 7, #[doc = "8: V315MV"] - V315MV = 8, + V315mv = 8, #[doc = "9: V341MV"] - V341MV = 9, + V341mv = 9, #[doc = "10: V367MV"] - V367MV = 10, + V367mv = 10, #[doc = "11: V394MV"] - V394MV = 11, + V394mv = 11, #[doc = "12: V420MV"] - V420MV = 12, + V420mv = 12, #[doc = "13: V446MV"] - V446MV = 13, + V446mv = 13, #[doc = "14: V472MV"] - V472MV = 14, + V472mv = 14, #[doc = "15: V499MV"] - V499MV = 15, + V499mv = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PEAKDETTHRESANA_A) -> Self { + fn from(variant: Peakdetthresana) -> Self { variant as _ } } -impl PEAKDETTHRESANA_R { +impl crate::FieldSpec for Peakdetthresana { + type Ux = u8; +} +impl crate::IsEnum for Peakdetthresana {} +#[doc = "Field `PEAKDETTHRESANA` reader - Peak Detector Threshold for XOUT"] +pub type PeakdetthresanaR = crate::FieldReader; +impl PeakdetthresanaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PEAKDETTHRESANA_A { + pub const fn variant(&self) -> Peakdetthresana { match self.bits { - 0 => PEAKDETTHRESANA_A::V105MV, - 1 => PEAKDETTHRESANA_A::V132MV, - 2 => PEAKDETTHRESANA_A::V157MV, - 3 => PEAKDETTHRESANA_A::V184MV, - 4 => PEAKDETTHRESANA_A::V210MV, - 5 => PEAKDETTHRESANA_A::V236MV, - 6 => PEAKDETTHRESANA_A::V262MV, - 7 => PEAKDETTHRESANA_A::V289MV, - 8 => PEAKDETTHRESANA_A::V315MV, - 9 => PEAKDETTHRESANA_A::V341MV, - 10 => PEAKDETTHRESANA_A::V367MV, - 11 => PEAKDETTHRESANA_A::V394MV, - 12 => PEAKDETTHRESANA_A::V420MV, - 13 => PEAKDETTHRESANA_A::V446MV, - 14 => PEAKDETTHRESANA_A::V472MV, - 15 => PEAKDETTHRESANA_A::V499MV, + 0 => Peakdetthresana::V105mv, + 1 => Peakdetthresana::V132mv, + 2 => Peakdetthresana::V157mv, + 3 => Peakdetthresana::V184mv, + 4 => Peakdetthresana::V210mv, + 5 => Peakdetthresana::V236mv, + 6 => Peakdetthresana::V262mv, + 7 => Peakdetthresana::V289mv, + 8 => Peakdetthresana::V315mv, + 9 => Peakdetthresana::V341mv, + 10 => Peakdetthresana::V367mv, + 11 => Peakdetthresana::V394mv, + 12 => Peakdetthresana::V420mv, + 13 => Peakdetthresana::V446mv, + 14 => Peakdetthresana::V472mv, + 15 => Peakdetthresana::V499mv, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `V105MV`"] + #[doc = "V105MV"] #[inline(always)] pub fn is_v105mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V105MV + *self == Peakdetthresana::V105mv } - #[doc = "Checks if the value of the field is `V132MV`"] + #[doc = "V132MV"] #[inline(always)] pub fn is_v132mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V132MV + *self == Peakdetthresana::V132mv } - #[doc = "Checks if the value of the field is `V157MV`"] + #[doc = "V157MV"] #[inline(always)] pub fn is_v157mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V157MV + *self == Peakdetthresana::V157mv } - #[doc = "Checks if the value of the field is `V184MV`"] + #[doc = "V184MV"] #[inline(always)] pub fn is_v184mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V184MV + *self == Peakdetthresana::V184mv } - #[doc = "Checks if the value of the field is `V210MV`"] + #[doc = "V210MV"] #[inline(always)] pub fn is_v210mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V210MV + *self == Peakdetthresana::V210mv } - #[doc = "Checks if the value of the field is `V236MV`"] + #[doc = "V236MV"] #[inline(always)] pub fn is_v236mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V236MV + *self == Peakdetthresana::V236mv } - #[doc = "Checks if the value of the field is `V262MV`"] + #[doc = "V262MV"] #[inline(always)] pub fn is_v262mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V262MV + *self == Peakdetthresana::V262mv } - #[doc = "Checks if the value of the field is `V289MV`"] + #[doc = "V289MV"] #[inline(always)] pub fn is_v289mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V289MV + *self == Peakdetthresana::V289mv } - #[doc = "Checks if the value of the field is `V315MV`"] + #[doc = "V315MV"] #[inline(always)] pub fn is_v315mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V315MV + *self == Peakdetthresana::V315mv } - #[doc = "Checks if the value of the field is `V341MV`"] + #[doc = "V341MV"] #[inline(always)] pub fn is_v341mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V341MV + *self == Peakdetthresana::V341mv } - #[doc = "Checks if the value of the field is `V367MV`"] + #[doc = "V367MV"] #[inline(always)] pub fn is_v367mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V367MV + *self == Peakdetthresana::V367mv } - #[doc = "Checks if the value of the field is `V394MV`"] + #[doc = "V394MV"] #[inline(always)] pub fn is_v394mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V394MV + *self == Peakdetthresana::V394mv } - #[doc = "Checks if the value of the field is `V420MV`"] + #[doc = "V420MV"] #[inline(always)] pub fn is_v420mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V420MV + *self == Peakdetthresana::V420mv } - #[doc = "Checks if the value of the field is `V446MV`"] + #[doc = "V446MV"] #[inline(always)] pub fn is_v446mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V446MV + *self == Peakdetthresana::V446mv } - #[doc = "Checks if the value of the field is `V472MV`"] + #[doc = "V472MV"] #[inline(always)] pub fn is_v472mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V472MV + *self == Peakdetthresana::V472mv } - #[doc = "Checks if the value of the field is `V499MV`"] + #[doc = "V499MV"] #[inline(always)] pub fn is_v499mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V499MV + *self == Peakdetthresana::V499mv } } #[doc = "Field `PEAKDETTHRESANA` writer - Peak Detector Threshold for XOUT"] -pub type PEAKDETTHRESANA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, BUFOUTCTRL_SPEC, u8, PEAKDETTHRESANA_A, 4, O>; -impl<'a, const O: u8> PEAKDETTHRESANA_W<'a, O> { +pub type PeakdetthresanaW<'a, REG> = crate::FieldWriter<'a, REG, 4, Peakdetthresana, crate::Safe>; +impl<'a, REG> PeakdetthresanaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "V105MV"] #[inline(always)] - pub fn v105mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V105MV) + pub fn v105mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V105mv) } #[doc = "V132MV"] #[inline(always)] - pub fn v132mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V132MV) + pub fn v132mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V132mv) } #[doc = "V157MV"] #[inline(always)] - pub fn v157mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V157MV) + pub fn v157mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V157mv) } #[doc = "V184MV"] #[inline(always)] - pub fn v184mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V184MV) + pub fn v184mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V184mv) } #[doc = "V210MV"] #[inline(always)] - pub fn v210mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V210MV) + pub fn v210mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V210mv) } #[doc = "V236MV"] #[inline(always)] - pub fn v236mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V236MV) + pub fn v236mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V236mv) } #[doc = "V262MV"] #[inline(always)] - pub fn v262mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V262MV) + pub fn v262mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V262mv) } #[doc = "V289MV"] #[inline(always)] - pub fn v289mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V289MV) + pub fn v289mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V289mv) } #[doc = "V315MV"] #[inline(always)] - pub fn v315mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V315MV) + pub fn v315mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V315mv) } #[doc = "V341MV"] #[inline(always)] - pub fn v341mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V341MV) + pub fn v341mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V341mv) } #[doc = "V367MV"] #[inline(always)] - pub fn v367mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V367MV) + pub fn v367mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V367mv) } #[doc = "V394MV"] #[inline(always)] - pub fn v394mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V394MV) + pub fn v394mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V394mv) } #[doc = "V420MV"] #[inline(always)] - pub fn v420mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V420MV) + pub fn v420mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V420mv) } #[doc = "V446MV"] #[inline(always)] - pub fn v446mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V446MV) + pub fn v446mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V446mv) } #[doc = "V472MV"] #[inline(always)] - pub fn v472mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V472MV) + pub fn v472mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V472mv) } #[doc = "V499MV"] #[inline(always)] - pub fn v499mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V499MV) + pub fn v499mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V499mv) } } -#[doc = "Field `TIMEOUTCTUNE` reader - Tuning Cap Change Timeout"] -pub type TIMEOUTCTUNE_R = crate::FieldReader; #[doc = "Tuning Cap Change Timeout\n\nValue on reset: 4"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TIMEOUTCTUNE_A { +pub enum Timeoutctune { #[doc = "0: The tuning cap change timeout is set to 2 us minimum. The maximum can be +40%."] - T2US = 0, + T2us = 0, #[doc = "1: The tuning cap change timeout is set to 5 us minimum. The maximum can be +40%."] - T5US = 1, + T5us = 1, #[doc = "2: The tuning cap change timeout is set to 10 us minimum. The maximum can be +40%."] - T10US = 2, + T10us = 2, #[doc = "3: The tuning cap change timeout is set to 16 us minimum. The maximum can be +40%."] - T16US = 3, + T16us = 3, #[doc = "4: The tuning cap change timeout is set to 21 us minimum. The maximum can be +40%."] - T21US = 4, + T21us = 4, #[doc = "5: The tuning cap change timeout is set to 26 us minimum. The maximum can be +40%."] - T26US = 5, + T26us = 5, #[doc = "6: The tuning cap change timeout is set to 31 us minimum. The maximum can be +40%."] - T31US = 6, + T31us = 6, #[doc = "7: The tuning cap change timeout is set to 42 us minimum. The maximum can be +40%."] - T42US = 7, + T42us = 7, #[doc = "8: The tuning cap change timeout is set to 52 us minimum. The maximum can be +40%."] - T52US = 8, + T52us = 8, #[doc = "9: The tuning cap change timeout is set to 63 us minimum. The maximum can be +40%."] - T63US = 9, + T63us = 9, #[doc = "10: The tuning cap change timeout is set to 83 us minimum. The maximum can be +40%."] - T83US = 10, + T83us = 10, #[doc = "11: The tuning cap change timeout is set to 104 us minimum. The maximum can be +40%."] - T104US = 11, + T104us = 11, #[doc = "12: The tuning cap change timeout is set to 208 us minimum. The maximum can be +40%."] - T208US = 12, + T208us = 12, #[doc = "13: The tuning cap change timeout is set to 313 us minimum. The maximum can be +40%."] - T313US = 13, + T313us = 13, #[doc = "14: The tuning cap change timeout is set to 521 us minimum. The maximum can be +40%."] - T521US = 14, + T521us = 14, #[doc = "15: The tuning cap change timeout is set to 938 us minimum. The maximum can be +40%."] - T938US = 15, + T938us = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TIMEOUTCTUNE_A) -> Self { + fn from(variant: Timeoutctune) -> Self { variant as _ } } -impl TIMEOUTCTUNE_R { +impl crate::FieldSpec for Timeoutctune { + type Ux = u8; +} +impl crate::IsEnum for Timeoutctune {} +#[doc = "Field `TIMEOUTCTUNE` reader - Tuning Cap Change Timeout"] +pub type TimeoutctuneR = crate::FieldReader; +impl TimeoutctuneR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TIMEOUTCTUNE_A { + pub const fn variant(&self) -> Timeoutctune { match self.bits { - 0 => TIMEOUTCTUNE_A::T2US, - 1 => TIMEOUTCTUNE_A::T5US, - 2 => TIMEOUTCTUNE_A::T10US, - 3 => TIMEOUTCTUNE_A::T16US, - 4 => TIMEOUTCTUNE_A::T21US, - 5 => TIMEOUTCTUNE_A::T26US, - 6 => TIMEOUTCTUNE_A::T31US, - 7 => TIMEOUTCTUNE_A::T42US, - 8 => TIMEOUTCTUNE_A::T52US, - 9 => TIMEOUTCTUNE_A::T63US, - 10 => TIMEOUTCTUNE_A::T83US, - 11 => TIMEOUTCTUNE_A::T104US, - 12 => TIMEOUTCTUNE_A::T208US, - 13 => TIMEOUTCTUNE_A::T313US, - 14 => TIMEOUTCTUNE_A::T521US, - 15 => TIMEOUTCTUNE_A::T938US, + 0 => Timeoutctune::T2us, + 1 => Timeoutctune::T5us, + 2 => Timeoutctune::T10us, + 3 => Timeoutctune::T16us, + 4 => Timeoutctune::T21us, + 5 => Timeoutctune::T26us, + 6 => Timeoutctune::T31us, + 7 => Timeoutctune::T42us, + 8 => Timeoutctune::T52us, + 9 => Timeoutctune::T63us, + 10 => Timeoutctune::T83us, + 11 => Timeoutctune::T104us, + 12 => Timeoutctune::T208us, + 13 => Timeoutctune::T313us, + 14 => Timeoutctune::T521us, + 15 => Timeoutctune::T938us, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `T2US`"] + #[doc = "The tuning cap change timeout is set to 2 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t2us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T2US + *self == Timeoutctune::T2us } - #[doc = "Checks if the value of the field is `T5US`"] + #[doc = "The tuning cap change timeout is set to 5 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t5us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T5US + *self == Timeoutctune::T5us } - #[doc = "Checks if the value of the field is `T10US`"] + #[doc = "The tuning cap change timeout is set to 10 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t10us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T10US + *self == Timeoutctune::T10us } - #[doc = "Checks if the value of the field is `T16US`"] + #[doc = "The tuning cap change timeout is set to 16 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t16us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T16US + *self == Timeoutctune::T16us } - #[doc = "Checks if the value of the field is `T21US`"] + #[doc = "The tuning cap change timeout is set to 21 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t21us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T21US + *self == Timeoutctune::T21us } - #[doc = "Checks if the value of the field is `T26US`"] + #[doc = "The tuning cap change timeout is set to 26 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t26us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T26US + *self == Timeoutctune::T26us } - #[doc = "Checks if the value of the field is `T31US`"] + #[doc = "The tuning cap change timeout is set to 31 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t31us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T31US + *self == Timeoutctune::T31us } - #[doc = "Checks if the value of the field is `T42US`"] + #[doc = "The tuning cap change timeout is set to 42 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t42us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T42US + *self == Timeoutctune::T42us } - #[doc = "Checks if the value of the field is `T52US`"] + #[doc = "The tuning cap change timeout is set to 52 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t52us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T52US + *self == Timeoutctune::T52us } - #[doc = "Checks if the value of the field is `T63US`"] + #[doc = "The tuning cap change timeout is set to 63 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t63us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T63US + *self == Timeoutctune::T63us } - #[doc = "Checks if the value of the field is `T83US`"] + #[doc = "The tuning cap change timeout is set to 83 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t83us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T83US + *self == Timeoutctune::T83us } - #[doc = "Checks if the value of the field is `T104US`"] + #[doc = "The tuning cap change timeout is set to 104 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t104us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T104US + *self == Timeoutctune::T104us } - #[doc = "Checks if the value of the field is `T208US`"] + #[doc = "The tuning cap change timeout is set to 208 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t208us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T208US + *self == Timeoutctune::T208us } - #[doc = "Checks if the value of the field is `T313US`"] + #[doc = "The tuning cap change timeout is set to 313 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t313us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T313US + *self == Timeoutctune::T313us } - #[doc = "Checks if the value of the field is `T521US`"] + #[doc = "The tuning cap change timeout is set to 521 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t521us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T521US + *self == Timeoutctune::T521us } - #[doc = "Checks if the value of the field is `T938US`"] + #[doc = "The tuning cap change timeout is set to 938 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t938us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T938US + *self == Timeoutctune::T938us } } #[doc = "Field `TIMEOUTCTUNE` writer - Tuning Cap Change Timeout"] -pub type TIMEOUTCTUNE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, BUFOUTCTRL_SPEC, u8, TIMEOUTCTUNE_A, 4, O>; -impl<'a, const O: u8> TIMEOUTCTUNE_W<'a, O> { +pub type TimeoutctuneW<'a, REG> = crate::FieldWriter<'a, REG, 4, Timeoutctune, crate::Safe>; +impl<'a, REG> TimeoutctuneW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The tuning cap change timeout is set to 2 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t2us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T2US) + pub fn t2us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T2us) } #[doc = "The tuning cap change timeout is set to 5 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t5us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T5US) + pub fn t5us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T5us) } #[doc = "The tuning cap change timeout is set to 10 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t10us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T10US) + pub fn t10us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T10us) } #[doc = "The tuning cap change timeout is set to 16 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t16us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T16US) + pub fn t16us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T16us) } #[doc = "The tuning cap change timeout is set to 21 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t21us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T21US) + pub fn t21us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T21us) } #[doc = "The tuning cap change timeout is set to 26 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t26us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T26US) + pub fn t26us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T26us) } #[doc = "The tuning cap change timeout is set to 31 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t31us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T31US) + pub fn t31us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T31us) } #[doc = "The tuning cap change timeout is set to 42 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t42us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T42US) + pub fn t42us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T42us) } #[doc = "The tuning cap change timeout is set to 52 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t52us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T52US) + pub fn t52us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T52us) } #[doc = "The tuning cap change timeout is set to 63 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t63us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T63US) + pub fn t63us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T63us) } #[doc = "The tuning cap change timeout is set to 83 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t83us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T83US) + pub fn t83us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T83us) } #[doc = "The tuning cap change timeout is set to 104 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t104us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T104US) + pub fn t104us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T104us) } #[doc = "The tuning cap change timeout is set to 208 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t208us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T208US) + pub fn t208us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T208us) } #[doc = "The tuning cap change timeout is set to 313 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t313us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T313US) + pub fn t313us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T313us) } #[doc = "The tuning cap change timeout is set to 521 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t521us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T521US) + pub fn t521us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T521us) } #[doc = "The tuning cap change timeout is set to 938 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t938us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T938US) + pub fn t938us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T938us) } } -#[doc = "Field `TIMEOUTSTARTUP` reader - Oscillator Startup Timeout"] -pub type TIMEOUTSTARTUP_R = crate::FieldReader; #[doc = "Oscillator Startup Timeout\n\nValue on reset: 6"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TIMEOUTSTARTUP_A { +pub enum Timeoutstartup { #[doc = "0: The oscillator startup timeout is set to 42 us minimum. The maximum can be +40%."] - T42US = 0, + T42us = 0, #[doc = "1: The oscillator startup timeout is set to 83 us minimum. The maximum can be +40%."] - T83US = 1, + T83us = 1, #[doc = "2: The oscillator startup timeout is set to 108 us minimum. The maximum can be +40%."] - T108US = 2, + T108us = 2, #[doc = "3: The oscillator startup timeout is set to 133 us minimum. The maximum can be +40%."] - T133US = 3, + T133us = 3, #[doc = "4: The oscillator startup timeout is set to 158 us minimum. The maximum can be +40%."] - T158US = 4, + T158us = 4, #[doc = "5: The oscillator startup timeout is set to 183 us minimum. The maximum can be +40%."] - T183US = 5, + T183us = 5, #[doc = "6: The oscillator startup timeout is set to 208 us minimum. The maximum can be +40%."] - T208US = 6, + T208us = 6, #[doc = "7: The oscillator startup timeout is set to 233 us minimum. The maximum can be +40%."] - T233US = 7, + T233us = 7, #[doc = "8: The oscillator startup timeout is set to 258 us minimum. The maximum can be +40%."] - T258US = 8, + T258us = 8, #[doc = "9: The oscillator startup timeout is set to 283 us minimum. The maximum can be +40%."] - T283US = 9, + T283us = 9, #[doc = "10: The oscillator startup timeout is set to 333 us minimum. The maximum can be +40%."] - T333US = 10, + T333us = 10, #[doc = "11: The oscillator startup timeout is set to 375 us minimum. The maximum can be +40%."] - T375US = 11, + T375us = 11, #[doc = "12: The oscillator startup timeout is set to 417 us minimum. The maximum can be +40%."] - T417US = 12, + T417us = 12, #[doc = "13: The oscillator startup timeout is set to 458 us minimum. The maximum can be +40%."] - T458US = 13, + T458us = 13, #[doc = "14: The oscillator startup timeout is set to 500 us minimum. The maximum can be +40%."] - T500US = 14, + T500us = 14, #[doc = "15: The oscillator startup timeout is set to 667 us minimum. The maximum can be +40%."] - T667US = 15, + T667us = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TIMEOUTSTARTUP_A) -> Self { + fn from(variant: Timeoutstartup) -> Self { variant as _ } } -impl TIMEOUTSTARTUP_R { +impl crate::FieldSpec for Timeoutstartup { + type Ux = u8; +} +impl crate::IsEnum for Timeoutstartup {} +#[doc = "Field `TIMEOUTSTARTUP` reader - Oscillator Startup Timeout"] +pub type TimeoutstartupR = crate::FieldReader; +impl TimeoutstartupR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TIMEOUTSTARTUP_A { + pub const fn variant(&self) -> Timeoutstartup { match self.bits { - 0 => TIMEOUTSTARTUP_A::T42US, - 1 => TIMEOUTSTARTUP_A::T83US, - 2 => TIMEOUTSTARTUP_A::T108US, - 3 => TIMEOUTSTARTUP_A::T133US, - 4 => TIMEOUTSTARTUP_A::T158US, - 5 => TIMEOUTSTARTUP_A::T183US, - 6 => TIMEOUTSTARTUP_A::T208US, - 7 => TIMEOUTSTARTUP_A::T233US, - 8 => TIMEOUTSTARTUP_A::T258US, - 9 => TIMEOUTSTARTUP_A::T283US, - 10 => TIMEOUTSTARTUP_A::T333US, - 11 => TIMEOUTSTARTUP_A::T375US, - 12 => TIMEOUTSTARTUP_A::T417US, - 13 => TIMEOUTSTARTUP_A::T458US, - 14 => TIMEOUTSTARTUP_A::T500US, - 15 => TIMEOUTSTARTUP_A::T667US, + 0 => Timeoutstartup::T42us, + 1 => Timeoutstartup::T83us, + 2 => Timeoutstartup::T108us, + 3 => Timeoutstartup::T133us, + 4 => Timeoutstartup::T158us, + 5 => Timeoutstartup::T183us, + 6 => Timeoutstartup::T208us, + 7 => Timeoutstartup::T233us, + 8 => Timeoutstartup::T258us, + 9 => Timeoutstartup::T283us, + 10 => Timeoutstartup::T333us, + 11 => Timeoutstartup::T375us, + 12 => Timeoutstartup::T417us, + 13 => Timeoutstartup::T458us, + 14 => Timeoutstartup::T500us, + 15 => Timeoutstartup::T667us, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `T42US`"] + #[doc = "The oscillator startup timeout is set to 42 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t42us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T42US + *self == Timeoutstartup::T42us } - #[doc = "Checks if the value of the field is `T83US`"] + #[doc = "The oscillator startup timeout is set to 83 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t83us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T83US + *self == Timeoutstartup::T83us } - #[doc = "Checks if the value of the field is `T108US`"] + #[doc = "The oscillator startup timeout is set to 108 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t108us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T108US + *self == Timeoutstartup::T108us } - #[doc = "Checks if the value of the field is `T133US`"] + #[doc = "The oscillator startup timeout is set to 133 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t133us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T133US + *self == Timeoutstartup::T133us } - #[doc = "Checks if the value of the field is `T158US`"] + #[doc = "The oscillator startup timeout is set to 158 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t158us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T158US + *self == Timeoutstartup::T158us } - #[doc = "Checks if the value of the field is `T183US`"] + #[doc = "The oscillator startup timeout is set to 183 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t183us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T183US + *self == Timeoutstartup::T183us } - #[doc = "Checks if the value of the field is `T208US`"] + #[doc = "The oscillator startup timeout is set to 208 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t208us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T208US + *self == Timeoutstartup::T208us } - #[doc = "Checks if the value of the field is `T233US`"] + #[doc = "The oscillator startup timeout is set to 233 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t233us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T233US + *self == Timeoutstartup::T233us } - #[doc = "Checks if the value of the field is `T258US`"] + #[doc = "The oscillator startup timeout is set to 258 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t258us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T258US + *self == Timeoutstartup::T258us } - #[doc = "Checks if the value of the field is `T283US`"] + #[doc = "The oscillator startup timeout is set to 283 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t283us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T283US + *self == Timeoutstartup::T283us } - #[doc = "Checks if the value of the field is `T333US`"] + #[doc = "The oscillator startup timeout is set to 333 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t333us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T333US + *self == Timeoutstartup::T333us } - #[doc = "Checks if the value of the field is `T375US`"] + #[doc = "The oscillator startup timeout is set to 375 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t375us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T375US + *self == Timeoutstartup::T375us } - #[doc = "Checks if the value of the field is `T417US`"] + #[doc = "The oscillator startup timeout is set to 417 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t417us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T417US + *self == Timeoutstartup::T417us } - #[doc = "Checks if the value of the field is `T458US`"] + #[doc = "The oscillator startup timeout is set to 458 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t458us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T458US + *self == Timeoutstartup::T458us } - #[doc = "Checks if the value of the field is `T500US`"] + #[doc = "The oscillator startup timeout is set to 500 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t500us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T500US + *self == Timeoutstartup::T500us } - #[doc = "Checks if the value of the field is `T667US`"] + #[doc = "The oscillator startup timeout is set to 667 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t667us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T667US + *self == Timeoutstartup::T667us } } #[doc = "Field `TIMEOUTSTARTUP` writer - Oscillator Startup Timeout"] -pub type TIMEOUTSTARTUP_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, BUFOUTCTRL_SPEC, u8, TIMEOUTSTARTUP_A, 4, O>; -impl<'a, const O: u8> TIMEOUTSTARTUP_W<'a, O> { +pub type TimeoutstartupW<'a, REG> = crate::FieldWriter<'a, REG, 4, Timeoutstartup, crate::Safe>; +impl<'a, REG> TimeoutstartupW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The oscillator startup timeout is set to 42 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t42us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T42US) + pub fn t42us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T42us) } #[doc = "The oscillator startup timeout is set to 83 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t83us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T83US) + pub fn t83us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T83us) } #[doc = "The oscillator startup timeout is set to 108 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t108us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T108US) + pub fn t108us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T108us) } #[doc = "The oscillator startup timeout is set to 133 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t133us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T133US) + pub fn t133us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T133us) } #[doc = "The oscillator startup timeout is set to 158 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t158us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T158US) + pub fn t158us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T158us) } #[doc = "The oscillator startup timeout is set to 183 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t183us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T183US) + pub fn t183us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T183us) } #[doc = "The oscillator startup timeout is set to 208 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t208us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T208US) + pub fn t208us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T208us) } #[doc = "The oscillator startup timeout is set to 233 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t233us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T233US) + pub fn t233us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T233us) } #[doc = "The oscillator startup timeout is set to 258 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t258us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T258US) + pub fn t258us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T258us) } #[doc = "The oscillator startup timeout is set to 283 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t283us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T283US) + pub fn t283us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T283us) } #[doc = "The oscillator startup timeout is set to 333 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t333us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T333US) + pub fn t333us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T333us) } #[doc = "The oscillator startup timeout is set to 375 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t375us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T375US) + pub fn t375us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T375us) } #[doc = "The oscillator startup timeout is set to 417 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t417us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T417US) + pub fn t417us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T417us) } #[doc = "The oscillator startup timeout is set to 458 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t458us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T458US) + pub fn t458us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T458us) } #[doc = "The oscillator startup timeout is set to 500 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t500us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T500US) + pub fn t500us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T500us) } #[doc = "The oscillator startup timeout is set to 667 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t667us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T667US) + pub fn t667us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T667us) } } #[doc = "Field `MINIMUMSTARTUPDELAY` reader - Minimum Startup Delay"] -pub type MINIMUMSTARTUPDELAY_R = crate::BitReader; +pub type MinimumstartupdelayR = crate::BitReader; #[doc = "Field `MINIMUMSTARTUPDELAY` writer - Minimum Startup Delay"] -pub type MINIMUMSTARTUPDELAY_W<'a, const O: u8> = - crate::BitWriter<'a, u32, BUFOUTCTRL_SPEC, bool, O>; +pub type MinimumstartupdelayW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Driver Bias Current"] #[inline(always)] - pub fn xoutbiasana(&self) -> XOUTBIASANA_R { - XOUTBIASANA_R::new((self.bits & 0x0f) as u8) + pub fn xoutbiasana(&self) -> XoutbiasanaR { + XoutbiasanaR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Buffer Gain"] #[inline(always)] - pub fn xoutcfana(&self) -> XOUTCFANA_R { - XOUTCFANA_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn xoutcfana(&self) -> XoutcfanaR { + XoutcfanaR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - No Description"] #[inline(always)] - pub fn xoutgmana(&self) -> XOUTGMANA_R { - XOUTGMANA_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn xoutgmana(&self) -> XoutgmanaR { + XoutgmanaR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Peak Detector Threshold for XOUT"] #[inline(always)] - pub fn peakdetthresana(&self) -> PEAKDETTHRESANA_R { - PEAKDETTHRESANA_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn peakdetthresana(&self) -> PeakdetthresanaR { + PeakdetthresanaR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:19 - Tuning Cap Change Timeout"] #[inline(always)] - pub fn timeoutctune(&self) -> TIMEOUTCTUNE_R { - TIMEOUTCTUNE_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn timeoutctune(&self) -> TimeoutctuneR { + TimeoutctuneR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:23 - Oscillator Startup Timeout"] #[inline(always)] - pub fn timeoutstartup(&self) -> TIMEOUTSTARTUP_R { - TIMEOUTSTARTUP_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn timeoutstartup(&self) -> TimeoutstartupR { + TimeoutstartupR::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bit 31 - Minimum Startup Delay"] #[inline(always)] - pub fn minimumstartupdelay(&self) -> MINIMUMSTARTUPDELAY_R { - MINIMUMSTARTUPDELAY_R::new(((self.bits >> 31) & 1) != 0) + pub fn minimumstartupdelay(&self) -> MinimumstartupdelayR { + MinimumstartupdelayR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Driver Bias Current"] #[inline(always)] #[must_use] - pub fn xoutbiasana(&mut self) -> XOUTBIASANA_W<0> { - XOUTBIASANA_W::new(self) + pub fn xoutbiasana(&mut self) -> XoutbiasanaW { + XoutbiasanaW::new(self, 0) } #[doc = "Bits 4:7 - Buffer Gain"] #[inline(always)] #[must_use] - pub fn xoutcfana(&mut self) -> XOUTCFANA_W<4> { - XOUTCFANA_W::new(self) + pub fn xoutcfana(&mut self) -> XoutcfanaW { + XoutcfanaW::new(self, 4) } #[doc = "Bits 8:11 - No Description"] #[inline(always)] #[must_use] - pub fn xoutgmana(&mut self) -> XOUTGMANA_W<8> { - XOUTGMANA_W::new(self) + pub fn xoutgmana(&mut self) -> XoutgmanaW { + XoutgmanaW::new(self, 8) } #[doc = "Bits 12:15 - Peak Detector Threshold for XOUT"] #[inline(always)] #[must_use] - pub fn peakdetthresana(&mut self) -> PEAKDETTHRESANA_W<12> { - PEAKDETTHRESANA_W::new(self) + pub fn peakdetthresana(&mut self) -> PeakdetthresanaW { + PeakdetthresanaW::new(self, 12) } #[doc = "Bits 16:19 - Tuning Cap Change Timeout"] #[inline(always)] #[must_use] - pub fn timeoutctune(&mut self) -> TIMEOUTCTUNE_W<16> { - TIMEOUTCTUNE_W::new(self) + pub fn timeoutctune(&mut self) -> TimeoutctuneW { + TimeoutctuneW::new(self, 16) } #[doc = "Bits 20:23 - Oscillator Startup Timeout"] #[inline(always)] #[must_use] - pub fn timeoutstartup(&mut self) -> TIMEOUTSTARTUP_W<20> { - TIMEOUTSTARTUP_W::new(self) + pub fn timeoutstartup(&mut self) -> TimeoutstartupW { + TimeoutstartupW::new(self, 20) } #[doc = "Bit 31 - Minimum Startup Delay"] #[inline(always)] #[must_use] - pub fn minimumstartupdelay(&mut self) -> MINIMUMSTARTUPDELAY_W<31> { - MINIMUMSTARTUPDELAY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn minimumstartupdelay(&mut self) -> MinimumstartupdelayW { + MinimumstartupdelayW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bufoutctrl](index.html) module"] -pub struct BUFOUTCTRL_SPEC; -impl crate::RegisterSpec for BUFOUTCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bufoutctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bufoutctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct BufoutctrlSpec; +impl crate::RegisterSpec for BufoutctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [bufoutctrl::R](R) reader structure"] -impl crate::Readable for BUFOUTCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [bufoutctrl::W](W) writer structure"] -impl crate::Writable for BUFOUTCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`bufoutctrl::R`](R) reader structure"] +impl crate::Readable for BufoutctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`bufoutctrl::W`](W) writer structure"] +impl crate::Writable for BufoutctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BUFOUTCTRL to value 0x0064_3c15"] -impl crate::Resettable for BUFOUTCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0064_3c15; +impl crate::Resettable for BufoutctrlSpec { + const RESET_VALUE: u32 = 0x0064_3c15; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/bufouttrim.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/bufouttrim.rs index 73684b9..e6a3ad3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/bufouttrim.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/bufouttrim.rs @@ -1,80 +1,40 @@ #[doc = "Register `BUFOUTTRIM` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `BUFOUTTRIM` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `VTRTRIMANA` reader - BUFOUT Reference Trim"] -pub type VTRTRIMANA_R = crate::FieldReader; +pub type VtrtrimanaR = crate::FieldReader; #[doc = "Field `VTRTRIMANA` writer - BUFOUT Reference Trim"] -pub type VTRTRIMANA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BUFOUTTRIM_SPEC, u8, u8, 4, O>; +pub type VtrtrimanaW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - BUFOUT Reference Trim"] #[inline(always)] - pub fn vtrtrimana(&self) -> VTRTRIMANA_R { - VTRTRIMANA_R::new((self.bits & 0x0f) as u8) + pub fn vtrtrimana(&self) -> VtrtrimanaR { + VtrtrimanaR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - BUFOUT Reference Trim"] #[inline(always)] #[must_use] - pub fn vtrtrimana(&mut self) -> VTRTRIMANA_W<0> { - VTRTRIMANA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn vtrtrimana(&mut self) -> VtrtrimanaW { + VtrtrimanaW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bufouttrim](index.html) module"] -pub struct BUFOUTTRIM_SPEC; -impl crate::RegisterSpec for BUFOUTTRIM_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bufouttrim::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bufouttrim::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct BufouttrimSpec; +impl crate::RegisterSpec for BufouttrimSpec { type Ux = u32; } -#[doc = "`read()` method returns [bufouttrim::R](R) reader structure"] -impl crate::Readable for BUFOUTTRIM_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [bufouttrim::W](W) writer structure"] -impl crate::Writable for BUFOUTTRIM_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`bufouttrim::R`](R) reader structure"] +impl crate::Readable for BufouttrimSpec {} +#[doc = "`write(|w| ..)` method takes [`bufouttrim::W`](W) writer structure"] +impl crate::Writable for BufouttrimSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BUFOUTTRIM to value 0x08"] -impl crate::Resettable for BUFOUTTRIM_SPEC { - const RESET_VALUE: Self::Ux = 0x08; +impl crate::Resettable for BufouttrimSpec { + const RESET_VALUE: u32 = 0x08; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/cfg.rs index cdb8314..1d5b20f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/cfg.rs @@ -1,233 +1,203 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - Crystal Oscillator Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Crystal Oscillator Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: crystal oscillator"] - XTAL = 0, + Xtal = 0, #[doc = "1: external sinusoidal clock can be supplied on XI pin."] - EXTCLK = 1, + Extclk = 1, #[doc = "2: external sinusoidal clock can be supplied on XI pin (peak detector used)."] - EXTCLKPKDET = 2, + Extclkpkdet = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - Crystal Oscillator Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(MODE_A::XTAL), - 1 => Some(MODE_A::EXTCLK), - 2 => Some(MODE_A::EXTCLKPKDET), + 0 => Some(Mode::Xtal), + 1 => Some(Mode::Extclk), + 2 => Some(Mode::Extclkpkdet), _ => None, } } - #[doc = "Checks if the value of the field is `XTAL`"] + #[doc = "crystal oscillator"] #[inline(always)] pub fn is_xtal(&self) -> bool { - *self == MODE_A::XTAL + *self == Mode::Xtal } - #[doc = "Checks if the value of the field is `EXTCLK`"] + #[doc = "external sinusoidal clock can be supplied on XI pin."] #[inline(always)] pub fn is_extclk(&self) -> bool { - *self == MODE_A::EXTCLK + *self == Mode::Extclk } - #[doc = "Checks if the value of the field is `EXTCLKPKDET`"] + #[doc = "external sinusoidal clock can be supplied on XI pin (peak detector used)."] #[inline(always)] pub fn is_extclkpkdet(&self) -> bool { - *self == MODE_A::EXTCLKPKDET + *self == Mode::Extclkpkdet } } #[doc = "Field `MODE` writer - Crystal Oscillator Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "crystal oscillator"] #[inline(always)] - pub fn xtal(self) -> &'a mut W { - self.variant(MODE_A::XTAL) + pub fn xtal(self) -> &'a mut crate::W { + self.variant(Mode::Xtal) } #[doc = "external sinusoidal clock can be supplied on XI pin."] #[inline(always)] - pub fn extclk(self) -> &'a mut W { - self.variant(MODE_A::EXTCLK) + pub fn extclk(self) -> &'a mut crate::W { + self.variant(Mode::Extclk) } #[doc = "external sinusoidal clock can be supplied on XI pin (peak detector used)."] #[inline(always)] - pub fn extclkpkdet(self) -> &'a mut W { - self.variant(MODE_A::EXTCLKPKDET) + pub fn extclkpkdet(self) -> &'a mut crate::W { + self.variant(Mode::Extclkpkdet) } } #[doc = "Field `ENXIDCBIASANA` reader - Enable XI Internal DC Bias"] -pub type ENXIDCBIASANA_R = crate::BitReader; +pub type EnxidcbiasanaR = crate::BitReader; #[doc = "Field `ENXIDCBIASANA` writer - Enable XI Internal DC Bias"] -pub type ENXIDCBIASANA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `SQBUFSCHTRGANA` reader - Squaring Buffer Schmitt Trigger"] -pub type SQBUFSCHTRGANA_R = crate::BitReader; +pub type EnxidcbiasanaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Squaring Buffer Schmitt Trigger\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SQBUFSCHTRGANA_A { +pub enum Sqbufschtrgana { #[doc = "0: Squaring buffer schmitt trigger is disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Squaring buffer schmitt trigger is enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SQBUFSCHTRGANA_A) -> Self { + fn from(variant: Sqbufschtrgana) -> Self { variant as u8 != 0 } } -impl SQBUFSCHTRGANA_R { +#[doc = "Field `SQBUFSCHTRGANA` reader - Squaring Buffer Schmitt Trigger"] +pub type SqbufschtrganaR = crate::BitReader; +impl SqbufschtrganaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SQBUFSCHTRGANA_A { + pub const fn variant(&self) -> Sqbufschtrgana { match self.bits { - false => SQBUFSCHTRGANA_A::DISABLE, - true => SQBUFSCHTRGANA_A::ENABLE, + false => Sqbufschtrgana::Disable, + true => Sqbufschtrgana::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Squaring buffer schmitt trigger is disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == SQBUFSCHTRGANA_A::DISABLE + *self == Sqbufschtrgana::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Squaring buffer schmitt trigger is enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == SQBUFSCHTRGANA_A::ENABLE + *self == Sqbufschtrgana::Enable } } #[doc = "Field `SQBUFSCHTRGANA` writer - Squaring Buffer Schmitt Trigger"] -pub type SQBUFSCHTRGANA_W<'a, const O: u8> = - crate::BitWriter<'a, u32, CFG_SPEC, SQBUFSCHTRGANA_A, O>; -impl<'a, const O: u8> SQBUFSCHTRGANA_W<'a, O> { +pub type SqbufschtrganaW<'a, REG> = crate::BitWriter<'a, REG, Sqbufschtrgana>; +impl<'a, REG> SqbufschtrganaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Squaring buffer schmitt trigger is disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(SQBUFSCHTRGANA_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Sqbufschtrgana::Disable) } #[doc = "Squaring buffer schmitt trigger is enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(SQBUFSCHTRGANA_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Sqbufschtrgana::Enable) } } #[doc = "Field `FORCELFTIMEOUT` reader - Force Low Frequency Timeout"] -pub type FORCELFTIMEOUT_R = crate::BitReader; +pub type ForcelftimeoutR = crate::BitReader; #[doc = "Field `FORCELFTIMEOUT` writer - Force Low Frequency Timeout"] -pub type FORCELFTIMEOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type ForcelftimeoutW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - Crystal Oscillator Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 2 - Enable XI Internal DC Bias"] #[inline(always)] - pub fn enxidcbiasana(&self) -> ENXIDCBIASANA_R { - ENXIDCBIASANA_R::new(((self.bits >> 2) & 1) != 0) + pub fn enxidcbiasana(&self) -> EnxidcbiasanaR { + EnxidcbiasanaR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Squaring Buffer Schmitt Trigger"] #[inline(always)] - pub fn sqbufschtrgana(&self) -> SQBUFSCHTRGANA_R { - SQBUFSCHTRGANA_R::new(((self.bits >> 3) & 1) != 0) + pub fn sqbufschtrgana(&self) -> SqbufschtrganaR { + SqbufschtrganaR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 28 - Force Low Frequency Timeout"] #[inline(always)] - pub fn forcelftimeout(&self) -> FORCELFTIMEOUT_R { - FORCELFTIMEOUT_R::new(((self.bits >> 28) & 1) != 0) + pub fn forcelftimeout(&self) -> ForcelftimeoutR { + ForcelftimeoutR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Crystal Oscillator Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 2 - Enable XI Internal DC Bias"] #[inline(always)] #[must_use] - pub fn enxidcbiasana(&mut self) -> ENXIDCBIASANA_W<2> { - ENXIDCBIASANA_W::new(self) + pub fn enxidcbiasana(&mut self) -> EnxidcbiasanaW { + EnxidcbiasanaW::new(self, 2) } #[doc = "Bit 3 - Squaring Buffer Schmitt Trigger"] #[inline(always)] #[must_use] - pub fn sqbufschtrgana(&mut self) -> SQBUFSCHTRGANA_W<3> { - SQBUFSCHTRGANA_W::new(self) + pub fn sqbufschtrgana(&mut self) -> SqbufschtrganaW { + SqbufschtrganaW::new(self, 3) } #[doc = "Bit 28 - Force Low Frequency Timeout"] #[inline(always)] #[must_use] - pub fn forcelftimeout(&mut self) -> FORCELFTIMEOUT_W<28> { - FORCELFTIMEOUT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn forcelftimeout(&mut self) -> ForcelftimeoutW { + ForcelftimeoutW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0x1000_0000"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x1000_0000; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0x1000_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/cmd.rs index 936a31f..78aeefb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/cmd.rs @@ -1,52 +1,27 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `COREBIASOPT` writer - Core Bias Optimizaton"] -pub type COREBIASOPT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type CorebiasoptW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Core Bias Optimizaton"] #[inline(always)] #[must_use] - pub fn corebiasopt(&mut self) -> COREBIASOPT_W<0> { - COREBIASOPT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn corebiasopt(&mut self) -> CorebiasoptW { + CorebiasoptW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/ctrl.rs index 0ea1c39..51419ea 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/ctrl.rs @@ -1,649 +1,627 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `BUFOUTFREEZE` reader - Freeze BUFOUT Controls"] -pub type BUFOUTFREEZE_R = crate::BitReader; +pub type BufoutfreezeR = crate::BitReader; #[doc = "Field `BUFOUTFREEZE` writer - Freeze BUFOUT Controls"] -pub type BUFOUTFREEZE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type BufoutfreezeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `KEEPWARM` reader - Keep Warm"] -pub type KEEPWARM_R = crate::BitReader; +pub type KeepwarmR = crate::BitReader; #[doc = "Field `KEEPWARM` writer - Keep Warm"] -pub type KEEPWARM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type KeepwarmW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM23ONDEMAND` reader - On-demand During EM23"] -pub type EM23ONDEMAND_R = crate::BitReader; +pub type Em23ondemandR = crate::BitReader; #[doc = "Field `EM23ONDEMAND` writer - On-demand During EM23"] -pub type EM23ONDEMAND_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; -#[doc = "Field `FORCEXI2GNDANA` reader - Force XI Pin to Ground"] -pub type FORCEXI2GNDANA_R = crate::BitReader; +pub type Em23ondemandW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Force XI Pin to Ground\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FORCEXI2GNDANA_A { +pub enum Forcexi2gndana { #[doc = "0: Disabled (not pulled)"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enabled (pulled)"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FORCEXI2GNDANA_A) -> Self { + fn from(variant: Forcexi2gndana) -> Self { variant as u8 != 0 } } -impl FORCEXI2GNDANA_R { +#[doc = "Field `FORCEXI2GNDANA` reader - Force XI Pin to Ground"] +pub type Forcexi2gndanaR = crate::BitReader; +impl Forcexi2gndanaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FORCEXI2GNDANA_A { + pub const fn variant(&self) -> Forcexi2gndana { match self.bits { - false => FORCEXI2GNDANA_A::DISABLE, - true => FORCEXI2GNDANA_A::ENABLE, + false => Forcexi2gndana::Disable, + true => Forcexi2gndana::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disabled (not pulled)"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FORCEXI2GNDANA_A::DISABLE + *self == Forcexi2gndana::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enabled (pulled)"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FORCEXI2GNDANA_A::ENABLE + *self == Forcexi2gndana::Enable } } #[doc = "Field `FORCEXI2GNDANA` writer - Force XI Pin to Ground"] -pub type FORCEXI2GNDANA_W<'a, const O: u8> = - crate::BitWriter<'a, u32, CTRL_SPEC, FORCEXI2GNDANA_A, O>; -impl<'a, const O: u8> FORCEXI2GNDANA_W<'a, O> { +pub type Forcexi2gndanaW<'a, REG> = crate::BitWriter<'a, REG, Forcexi2gndana>; +impl<'a, REG> Forcexi2gndanaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disabled (not pulled)"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FORCEXI2GNDANA_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Forcexi2gndana::Disable) } #[doc = "Enabled (pulled)"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FORCEXI2GNDANA_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Forcexi2gndana::Enable) } } -#[doc = "Field `FORCEXO2GNDANA` reader - Force XO Pin to Ground"] -pub type FORCEXO2GNDANA_R = crate::BitReader; #[doc = "Force XO Pin to Ground\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FORCEXO2GNDANA_A { +pub enum Forcexo2gndana { #[doc = "0: Disabled (not pulled)"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enabled (pulled)"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FORCEXO2GNDANA_A) -> Self { + fn from(variant: Forcexo2gndana) -> Self { variant as u8 != 0 } } -impl FORCEXO2GNDANA_R { +#[doc = "Field `FORCEXO2GNDANA` reader - Force XO Pin to Ground"] +pub type Forcexo2gndanaR = crate::BitReader; +impl Forcexo2gndanaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FORCEXO2GNDANA_A { + pub const fn variant(&self) -> Forcexo2gndana { match self.bits { - false => FORCEXO2GNDANA_A::DISABLE, - true => FORCEXO2GNDANA_A::ENABLE, + false => Forcexo2gndana::Disable, + true => Forcexo2gndana::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disabled (not pulled)"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FORCEXO2GNDANA_A::DISABLE + *self == Forcexo2gndana::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enabled (pulled)"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FORCEXO2GNDANA_A::ENABLE + *self == Forcexo2gndana::Enable } } #[doc = "Field `FORCEXO2GNDANA` writer - Force XO Pin to Ground"] -pub type FORCEXO2GNDANA_W<'a, const O: u8> = - crate::BitWriter<'a, u32, CTRL_SPEC, FORCEXO2GNDANA_A, O>; -impl<'a, const O: u8> FORCEXO2GNDANA_W<'a, O> { +pub type Forcexo2gndanaW<'a, REG> = crate::BitWriter<'a, REG, Forcexo2gndana>; +impl<'a, REG> Forcexo2gndanaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disabled (not pulled)"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FORCEXO2GNDANA_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Forcexo2gndana::Disable) } #[doc = "Enabled (pulled)"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FORCEXO2GNDANA_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Forcexo2gndana::Enable) } } #[doc = "Field `FORCECTUNEMAX` reader - Force Tuning Cap to Max Value"] -pub type FORCECTUNEMAX_R = crate::BitReader; +pub type ForcectunemaxR = crate::BitReader; #[doc = "Field `FORCECTUNEMAX` writer - Force Tuning Cap to Max Value"] -pub type FORCECTUNEMAX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; -#[doc = "Field `PRSSTATUSSEL0` reader - PRS Status 0 Output Select"] -pub type PRSSTATUSSEL0_R = crate::FieldReader; +pub type ForcectunemaxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "PRS Status 0 Output Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PRSSTATUSSEL0_A { +pub enum Prsstatussel0 { #[doc = "0: PRS mux outputs 0"] - DISABLED = 0, + Disabled = 0, #[doc = "1: PRS mux outputs enabled status"] - ENS = 1, + Ens = 1, #[doc = "2: PRS mux outputs core bias optimization ready status"] - COREBIASOPTRDY = 2, + Corebiasoptrdy = 2, #[doc = "3: PRS mux outputs ready status"] - RDY = 3, + Rdy = 3, #[doc = "4: PRS mux outputs PRS ready status"] - PRSRDY = 4, + Prsrdy = 4, #[doc = "5: PRS mux outputs BUFOUT ready status"] - BUFOUTRDY = 5, + Bufoutrdy = 5, #[doc = "8: PRS mux outputs oscillator requested by digital clock status"] - HWREQ = 8, + Hwreq = 8, #[doc = "9: PRS mux outputs oscillator requested by PRS request status"] - PRSHWREQ = 9, + Prshwreq = 9, #[doc = "10: PRS mux outputs oscillator requested by BUFOUT request status"] - BUFOUTHWREQ = 10, + Bufouthwreq = 10, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PRSSTATUSSEL0_A) -> Self { + fn from(variant: Prsstatussel0) -> Self { variant as _ } } -impl PRSSTATUSSEL0_R { +impl crate::FieldSpec for Prsstatussel0 { + type Ux = u8; +} +impl crate::IsEnum for Prsstatussel0 {} +#[doc = "Field `PRSSTATUSSEL0` reader - PRS Status 0 Output Select"] +pub type Prsstatussel0R = crate::FieldReader; +impl Prsstatussel0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PRSSTATUSSEL0_A::DISABLED), - 1 => Some(PRSSTATUSSEL0_A::ENS), - 2 => Some(PRSSTATUSSEL0_A::COREBIASOPTRDY), - 3 => Some(PRSSTATUSSEL0_A::RDY), - 4 => Some(PRSSTATUSSEL0_A::PRSRDY), - 5 => Some(PRSSTATUSSEL0_A::BUFOUTRDY), - 8 => Some(PRSSTATUSSEL0_A::HWREQ), - 9 => Some(PRSSTATUSSEL0_A::PRSHWREQ), - 10 => Some(PRSSTATUSSEL0_A::BUFOUTHWREQ), + 0 => Some(Prsstatussel0::Disabled), + 1 => Some(Prsstatussel0::Ens), + 2 => Some(Prsstatussel0::Corebiasoptrdy), + 3 => Some(Prsstatussel0::Rdy), + 4 => Some(Prsstatussel0::Prsrdy), + 5 => Some(Prsstatussel0::Bufoutrdy), + 8 => Some(Prsstatussel0::Hwreq), + 9 => Some(Prsstatussel0::Prshwreq), + 10 => Some(Prsstatussel0::Bufouthwreq), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "PRS mux outputs 0"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == PRSSTATUSSEL0_A::DISABLED + *self == Prsstatussel0::Disabled } - #[doc = "Checks if the value of the field is `ENS`"] + #[doc = "PRS mux outputs enabled status"] #[inline(always)] pub fn is_ens(&self) -> bool { - *self == PRSSTATUSSEL0_A::ENS + *self == Prsstatussel0::Ens } - #[doc = "Checks if the value of the field is `COREBIASOPTRDY`"] + #[doc = "PRS mux outputs core bias optimization ready status"] #[inline(always)] pub fn is_corebiasoptrdy(&self) -> bool { - *self == PRSSTATUSSEL0_A::COREBIASOPTRDY + *self == Prsstatussel0::Corebiasoptrdy } - #[doc = "Checks if the value of the field is `RDY`"] + #[doc = "PRS mux outputs ready status"] #[inline(always)] pub fn is_rdy(&self) -> bool { - *self == PRSSTATUSSEL0_A::RDY + *self == Prsstatussel0::Rdy } - #[doc = "Checks if the value of the field is `PRSRDY`"] + #[doc = "PRS mux outputs PRS ready status"] #[inline(always)] pub fn is_prsrdy(&self) -> bool { - *self == PRSSTATUSSEL0_A::PRSRDY + *self == Prsstatussel0::Prsrdy } - #[doc = "Checks if the value of the field is `BUFOUTRDY`"] + #[doc = "PRS mux outputs BUFOUT ready status"] #[inline(always)] pub fn is_bufoutrdy(&self) -> bool { - *self == PRSSTATUSSEL0_A::BUFOUTRDY + *self == Prsstatussel0::Bufoutrdy } - #[doc = "Checks if the value of the field is `HWREQ`"] + #[doc = "PRS mux outputs oscillator requested by digital clock status"] #[inline(always)] pub fn is_hwreq(&self) -> bool { - *self == PRSSTATUSSEL0_A::HWREQ + *self == Prsstatussel0::Hwreq } - #[doc = "Checks if the value of the field is `PRSHWREQ`"] + #[doc = "PRS mux outputs oscillator requested by PRS request status"] #[inline(always)] pub fn is_prshwreq(&self) -> bool { - *self == PRSSTATUSSEL0_A::PRSHWREQ + *self == Prsstatussel0::Prshwreq } - #[doc = "Checks if the value of the field is `BUFOUTHWREQ`"] + #[doc = "PRS mux outputs oscillator requested by BUFOUT request status"] #[inline(always)] pub fn is_bufouthwreq(&self) -> bool { - *self == PRSSTATUSSEL0_A::BUFOUTHWREQ + *self == Prsstatussel0::Bufouthwreq } } #[doc = "Field `PRSSTATUSSEL0` writer - PRS Status 0 Output Select"] -pub type PRSSTATUSSEL0_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CTRL_SPEC, u8, PRSSTATUSSEL0_A, 4, O>; -impl<'a, const O: u8> PRSSTATUSSEL0_W<'a, O> { +pub type Prsstatussel0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Prsstatussel0>; +impl<'a, REG> Prsstatussel0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS mux outputs 0"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(PRSSTATUSSEL0_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Prsstatussel0::Disabled) } #[doc = "PRS mux outputs enabled status"] #[inline(always)] - pub fn ens(self) -> &'a mut W { - self.variant(PRSSTATUSSEL0_A::ENS) + pub fn ens(self) -> &'a mut crate::W { + self.variant(Prsstatussel0::Ens) } #[doc = "PRS mux outputs core bias optimization ready status"] #[inline(always)] - pub fn corebiasoptrdy(self) -> &'a mut W { - self.variant(PRSSTATUSSEL0_A::COREBIASOPTRDY) + pub fn corebiasoptrdy(self) -> &'a mut crate::W { + self.variant(Prsstatussel0::Corebiasoptrdy) } #[doc = "PRS mux outputs ready status"] #[inline(always)] - pub fn rdy(self) -> &'a mut W { - self.variant(PRSSTATUSSEL0_A::RDY) + pub fn rdy(self) -> &'a mut crate::W { + self.variant(Prsstatussel0::Rdy) } #[doc = "PRS mux outputs PRS ready status"] #[inline(always)] - pub fn prsrdy(self) -> &'a mut W { - self.variant(PRSSTATUSSEL0_A::PRSRDY) + pub fn prsrdy(self) -> &'a mut crate::W { + self.variant(Prsstatussel0::Prsrdy) } #[doc = "PRS mux outputs BUFOUT ready status"] #[inline(always)] - pub fn bufoutrdy(self) -> &'a mut W { - self.variant(PRSSTATUSSEL0_A::BUFOUTRDY) + pub fn bufoutrdy(self) -> &'a mut crate::W { + self.variant(Prsstatussel0::Bufoutrdy) } #[doc = "PRS mux outputs oscillator requested by digital clock status"] #[inline(always)] - pub fn hwreq(self) -> &'a mut W { - self.variant(PRSSTATUSSEL0_A::HWREQ) + pub fn hwreq(self) -> &'a mut crate::W { + self.variant(Prsstatussel0::Hwreq) } #[doc = "PRS mux outputs oscillator requested by PRS request status"] #[inline(always)] - pub fn prshwreq(self) -> &'a mut W { - self.variant(PRSSTATUSSEL0_A::PRSHWREQ) + pub fn prshwreq(self) -> &'a mut crate::W { + self.variant(Prsstatussel0::Prshwreq) } #[doc = "PRS mux outputs oscillator requested by BUFOUT request status"] #[inline(always)] - pub fn bufouthwreq(self) -> &'a mut W { - self.variant(PRSSTATUSSEL0_A::BUFOUTHWREQ) + pub fn bufouthwreq(self) -> &'a mut crate::W { + self.variant(Prsstatussel0::Bufouthwreq) } } -#[doc = "Field `PRSSTATUSSEL1` reader - PRS Status 1 Output Select"] -pub type PRSSTATUSSEL1_R = crate::FieldReader; #[doc = "PRS Status 1 Output Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PRSSTATUSSEL1_A { +pub enum Prsstatussel1 { #[doc = "0: PRS mux outputs 0"] - DISABLED = 0, + Disabled = 0, #[doc = "1: PRS mux outputs enabled status"] - ENS = 1, + Ens = 1, #[doc = "2: PRS mux outputs core bias optimization ready status"] - COREBIASOPTRDY = 2, + Corebiasoptrdy = 2, #[doc = "3: PRS mux outputs ready status"] - RDY = 3, + Rdy = 3, #[doc = "4: PRS mux outputs PRS ready status"] - PRSRDY = 4, + Prsrdy = 4, #[doc = "5: PRS mux outputs BUFOUT ready status"] - BUFOUTRDY = 5, + Bufoutrdy = 5, #[doc = "8: PRS mux outputs oscillator requested by digital clock status"] - HWREQ = 8, + Hwreq = 8, #[doc = "9: PRS mux outputs oscillator requested by PRS request status"] - PRSHWREQ = 9, + Prshwreq = 9, #[doc = "10: PRS mux outputs oscillator requested by BUFOUT request status"] - BUFOUTHWREQ = 10, + Bufouthwreq = 10, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PRSSTATUSSEL1_A) -> Self { + fn from(variant: Prsstatussel1) -> Self { variant as _ } } -impl PRSSTATUSSEL1_R { +impl crate::FieldSpec for Prsstatussel1 { + type Ux = u8; +} +impl crate::IsEnum for Prsstatussel1 {} +#[doc = "Field `PRSSTATUSSEL1` reader - PRS Status 1 Output Select"] +pub type Prsstatussel1R = crate::FieldReader; +impl Prsstatussel1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PRSSTATUSSEL1_A::DISABLED), - 1 => Some(PRSSTATUSSEL1_A::ENS), - 2 => Some(PRSSTATUSSEL1_A::COREBIASOPTRDY), - 3 => Some(PRSSTATUSSEL1_A::RDY), - 4 => Some(PRSSTATUSSEL1_A::PRSRDY), - 5 => Some(PRSSTATUSSEL1_A::BUFOUTRDY), - 8 => Some(PRSSTATUSSEL1_A::HWREQ), - 9 => Some(PRSSTATUSSEL1_A::PRSHWREQ), - 10 => Some(PRSSTATUSSEL1_A::BUFOUTHWREQ), + 0 => Some(Prsstatussel1::Disabled), + 1 => Some(Prsstatussel1::Ens), + 2 => Some(Prsstatussel1::Corebiasoptrdy), + 3 => Some(Prsstatussel1::Rdy), + 4 => Some(Prsstatussel1::Prsrdy), + 5 => Some(Prsstatussel1::Bufoutrdy), + 8 => Some(Prsstatussel1::Hwreq), + 9 => Some(Prsstatussel1::Prshwreq), + 10 => Some(Prsstatussel1::Bufouthwreq), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "PRS mux outputs 0"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == PRSSTATUSSEL1_A::DISABLED + *self == Prsstatussel1::Disabled } - #[doc = "Checks if the value of the field is `ENS`"] + #[doc = "PRS mux outputs enabled status"] #[inline(always)] pub fn is_ens(&self) -> bool { - *self == PRSSTATUSSEL1_A::ENS + *self == Prsstatussel1::Ens } - #[doc = "Checks if the value of the field is `COREBIASOPTRDY`"] + #[doc = "PRS mux outputs core bias optimization ready status"] #[inline(always)] pub fn is_corebiasoptrdy(&self) -> bool { - *self == PRSSTATUSSEL1_A::COREBIASOPTRDY + *self == Prsstatussel1::Corebiasoptrdy } - #[doc = "Checks if the value of the field is `RDY`"] + #[doc = "PRS mux outputs ready status"] #[inline(always)] pub fn is_rdy(&self) -> bool { - *self == PRSSTATUSSEL1_A::RDY + *self == Prsstatussel1::Rdy } - #[doc = "Checks if the value of the field is `PRSRDY`"] + #[doc = "PRS mux outputs PRS ready status"] #[inline(always)] pub fn is_prsrdy(&self) -> bool { - *self == PRSSTATUSSEL1_A::PRSRDY + *self == Prsstatussel1::Prsrdy } - #[doc = "Checks if the value of the field is `BUFOUTRDY`"] + #[doc = "PRS mux outputs BUFOUT ready status"] #[inline(always)] pub fn is_bufoutrdy(&self) -> bool { - *self == PRSSTATUSSEL1_A::BUFOUTRDY + *self == Prsstatussel1::Bufoutrdy } - #[doc = "Checks if the value of the field is `HWREQ`"] + #[doc = "PRS mux outputs oscillator requested by digital clock status"] #[inline(always)] pub fn is_hwreq(&self) -> bool { - *self == PRSSTATUSSEL1_A::HWREQ + *self == Prsstatussel1::Hwreq } - #[doc = "Checks if the value of the field is `PRSHWREQ`"] + #[doc = "PRS mux outputs oscillator requested by PRS request status"] #[inline(always)] pub fn is_prshwreq(&self) -> bool { - *self == PRSSTATUSSEL1_A::PRSHWREQ + *self == Prsstatussel1::Prshwreq } - #[doc = "Checks if the value of the field is `BUFOUTHWREQ`"] + #[doc = "PRS mux outputs oscillator requested by BUFOUT request status"] #[inline(always)] pub fn is_bufouthwreq(&self) -> bool { - *self == PRSSTATUSSEL1_A::BUFOUTHWREQ + *self == Prsstatussel1::Bufouthwreq } } #[doc = "Field `PRSSTATUSSEL1` writer - PRS Status 1 Output Select"] -pub type PRSSTATUSSEL1_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CTRL_SPEC, u8, PRSSTATUSSEL1_A, 4, O>; -impl<'a, const O: u8> PRSSTATUSSEL1_W<'a, O> { +pub type Prsstatussel1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Prsstatussel1>; +impl<'a, REG> Prsstatussel1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS mux outputs 0"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(PRSSTATUSSEL1_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Prsstatussel1::Disabled) } #[doc = "PRS mux outputs enabled status"] #[inline(always)] - pub fn ens(self) -> &'a mut W { - self.variant(PRSSTATUSSEL1_A::ENS) + pub fn ens(self) -> &'a mut crate::W { + self.variant(Prsstatussel1::Ens) } #[doc = "PRS mux outputs core bias optimization ready status"] #[inline(always)] - pub fn corebiasoptrdy(self) -> &'a mut W { - self.variant(PRSSTATUSSEL1_A::COREBIASOPTRDY) + pub fn corebiasoptrdy(self) -> &'a mut crate::W { + self.variant(Prsstatussel1::Corebiasoptrdy) } #[doc = "PRS mux outputs ready status"] #[inline(always)] - pub fn rdy(self) -> &'a mut W { - self.variant(PRSSTATUSSEL1_A::RDY) + pub fn rdy(self) -> &'a mut crate::W { + self.variant(Prsstatussel1::Rdy) } #[doc = "PRS mux outputs PRS ready status"] #[inline(always)] - pub fn prsrdy(self) -> &'a mut W { - self.variant(PRSSTATUSSEL1_A::PRSRDY) + pub fn prsrdy(self) -> &'a mut crate::W { + self.variant(Prsstatussel1::Prsrdy) } #[doc = "PRS mux outputs BUFOUT ready status"] #[inline(always)] - pub fn bufoutrdy(self) -> &'a mut W { - self.variant(PRSSTATUSSEL1_A::BUFOUTRDY) + pub fn bufoutrdy(self) -> &'a mut crate::W { + self.variant(Prsstatussel1::Bufoutrdy) } #[doc = "PRS mux outputs oscillator requested by digital clock status"] #[inline(always)] - pub fn hwreq(self) -> &'a mut W { - self.variant(PRSSTATUSSEL1_A::HWREQ) + pub fn hwreq(self) -> &'a mut crate::W { + self.variant(Prsstatussel1::Hwreq) } #[doc = "PRS mux outputs oscillator requested by PRS request status"] #[inline(always)] - pub fn prshwreq(self) -> &'a mut W { - self.variant(PRSSTATUSSEL1_A::PRSHWREQ) + pub fn prshwreq(self) -> &'a mut crate::W { + self.variant(Prsstatussel1::Prshwreq) } #[doc = "PRS mux outputs oscillator requested by BUFOUT request status"] #[inline(always)] - pub fn bufouthwreq(self) -> &'a mut W { - self.variant(PRSSTATUSSEL1_A::BUFOUTHWREQ) + pub fn bufouthwreq(self) -> &'a mut crate::W { + self.variant(Prsstatussel1::Bufouthwreq) } } #[doc = "Field `FORCEEN` reader - Force Digital Clock Request"] -pub type FORCEEN_R = crate::BitReader; +pub type ForceenR = crate::BitReader; #[doc = "Field `FORCEEN` writer - Force Digital Clock Request"] -pub type FORCEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type ForceenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FORCEENPRS` reader - Force PRS Oscillator Request"] -pub type FORCEENPRS_R = crate::BitReader; +pub type ForceenprsR = crate::BitReader; #[doc = "Field `FORCEENPRS` writer - Force PRS Oscillator Request"] -pub type FORCEENPRS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type ForceenprsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FORCEENBUFOUT` reader - Force BUFOUT Request"] -pub type FORCEENBUFOUT_R = crate::BitReader; +pub type ForceenbufoutR = crate::BitReader; #[doc = "Field `FORCEENBUFOUT` writer - Force BUFOUT Request"] -pub type FORCEENBUFOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type ForceenbufoutW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISONDEMAND` reader - Disable On-demand For Digital Clock"] -pub type DISONDEMAND_R = crate::BitReader; +pub type DisondemandR = crate::BitReader; #[doc = "Field `DISONDEMAND` writer - Disable On-demand For Digital Clock"] -pub type DISONDEMAND_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type DisondemandW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISONDEMANDPRS` reader - Disable On-demand For PRS"] -pub type DISONDEMANDPRS_R = crate::BitReader; +pub type DisondemandprsR = crate::BitReader; #[doc = "Field `DISONDEMANDPRS` writer - Disable On-demand For PRS"] -pub type DISONDEMANDPRS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type DisondemandprsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISONDEMANDBUFOUT` reader - Disable On-demand For BUFOUT"] -pub type DISONDEMANDBUFOUT_R = crate::BitReader; +pub type DisondemandbufoutR = crate::BitReader; #[doc = "Field `DISONDEMANDBUFOUT` writer - Disable On-demand For BUFOUT"] -pub type DISONDEMANDBUFOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type DisondemandbufoutW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Freeze BUFOUT Controls"] #[inline(always)] - pub fn bufoutfreeze(&self) -> BUFOUTFREEZE_R { - BUFOUTFREEZE_R::new((self.bits & 1) != 0) + pub fn bufoutfreeze(&self) -> BufoutfreezeR { + BufoutfreezeR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - Keep Warm"] #[inline(always)] - pub fn keepwarm(&self) -> KEEPWARM_R { - KEEPWARM_R::new(((self.bits >> 2) & 1) != 0) + pub fn keepwarm(&self) -> KeepwarmR { + KeepwarmR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - On-demand During EM23"] #[inline(always)] - pub fn em23ondemand(&self) -> EM23ONDEMAND_R { - EM23ONDEMAND_R::new(((self.bits >> 3) & 1) != 0) + pub fn em23ondemand(&self) -> Em23ondemandR { + Em23ondemandR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Force XI Pin to Ground"] #[inline(always)] - pub fn forcexi2gndana(&self) -> FORCEXI2GNDANA_R { - FORCEXI2GNDANA_R::new(((self.bits >> 4) & 1) != 0) + pub fn forcexi2gndana(&self) -> Forcexi2gndanaR { + Forcexi2gndanaR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Force XO Pin to Ground"] #[inline(always)] - pub fn forcexo2gndana(&self) -> FORCEXO2GNDANA_R { - FORCEXO2GNDANA_R::new(((self.bits >> 5) & 1) != 0) + pub fn forcexo2gndana(&self) -> Forcexo2gndanaR { + Forcexo2gndanaR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Force Tuning Cap to Max Value"] #[inline(always)] - pub fn forcectunemax(&self) -> FORCECTUNEMAX_R { - FORCECTUNEMAX_R::new(((self.bits >> 6) & 1) != 0) + pub fn forcectunemax(&self) -> ForcectunemaxR { + ForcectunemaxR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bits 8:11 - PRS Status 0 Output Select"] #[inline(always)] - pub fn prsstatussel0(&self) -> PRSSTATUSSEL0_R { - PRSSTATUSSEL0_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn prsstatussel0(&self) -> Prsstatussel0R { + Prsstatussel0R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - PRS Status 1 Output Select"] #[inline(always)] - pub fn prsstatussel1(&self) -> PRSSTATUSSEL1_R { - PRSSTATUSSEL1_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn prsstatussel1(&self) -> Prsstatussel1R { + Prsstatussel1R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Force Digital Clock Request"] #[inline(always)] - pub fn forceen(&self) -> FORCEEN_R { - FORCEEN_R::new(((self.bits >> 16) & 1) != 0) + pub fn forceen(&self) -> ForceenR { + ForceenR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Force PRS Oscillator Request"] #[inline(always)] - pub fn forceenprs(&self) -> FORCEENPRS_R { - FORCEENPRS_R::new(((self.bits >> 17) & 1) != 0) + pub fn forceenprs(&self) -> ForceenprsR { + ForceenprsR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Force BUFOUT Request"] #[inline(always)] - pub fn forceenbufout(&self) -> FORCEENBUFOUT_R { - FORCEENBUFOUT_R::new(((self.bits >> 18) & 1) != 0) + pub fn forceenbufout(&self) -> ForceenbufoutR { + ForceenbufoutR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 24 - Disable On-demand For Digital Clock"] #[inline(always)] - pub fn disondemand(&self) -> DISONDEMAND_R { - DISONDEMAND_R::new(((self.bits >> 24) & 1) != 0) + pub fn disondemand(&self) -> DisondemandR { + DisondemandR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Disable On-demand For PRS"] #[inline(always)] - pub fn disondemandprs(&self) -> DISONDEMANDPRS_R { - DISONDEMANDPRS_R::new(((self.bits >> 25) & 1) != 0) + pub fn disondemandprs(&self) -> DisondemandprsR { + DisondemandprsR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Disable On-demand For BUFOUT"] #[inline(always)] - pub fn disondemandbufout(&self) -> DISONDEMANDBUFOUT_R { - DISONDEMANDBUFOUT_R::new(((self.bits >> 26) & 1) != 0) + pub fn disondemandbufout(&self) -> DisondemandbufoutR { + DisondemandbufoutR::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bit 0 - Freeze BUFOUT Controls"] #[inline(always)] #[must_use] - pub fn bufoutfreeze(&mut self) -> BUFOUTFREEZE_W<0> { - BUFOUTFREEZE_W::new(self) + pub fn bufoutfreeze(&mut self) -> BufoutfreezeW { + BufoutfreezeW::new(self, 0) } #[doc = "Bit 2 - Keep Warm"] #[inline(always)] #[must_use] - pub fn keepwarm(&mut self) -> KEEPWARM_W<2> { - KEEPWARM_W::new(self) + pub fn keepwarm(&mut self) -> KeepwarmW { + KeepwarmW::new(self, 2) } #[doc = "Bit 3 - On-demand During EM23"] #[inline(always)] #[must_use] - pub fn em23ondemand(&mut self) -> EM23ONDEMAND_W<3> { - EM23ONDEMAND_W::new(self) + pub fn em23ondemand(&mut self) -> Em23ondemandW { + Em23ondemandW::new(self, 3) } #[doc = "Bit 4 - Force XI Pin to Ground"] #[inline(always)] #[must_use] - pub fn forcexi2gndana(&mut self) -> FORCEXI2GNDANA_W<4> { - FORCEXI2GNDANA_W::new(self) + pub fn forcexi2gndana(&mut self) -> Forcexi2gndanaW { + Forcexi2gndanaW::new(self, 4) } #[doc = "Bit 5 - Force XO Pin to Ground"] #[inline(always)] #[must_use] - pub fn forcexo2gndana(&mut self) -> FORCEXO2GNDANA_W<5> { - FORCEXO2GNDANA_W::new(self) + pub fn forcexo2gndana(&mut self) -> Forcexo2gndanaW { + Forcexo2gndanaW::new(self, 5) } #[doc = "Bit 6 - Force Tuning Cap to Max Value"] #[inline(always)] #[must_use] - pub fn forcectunemax(&mut self) -> FORCECTUNEMAX_W<6> { - FORCECTUNEMAX_W::new(self) + pub fn forcectunemax(&mut self) -> ForcectunemaxW { + ForcectunemaxW::new(self, 6) } #[doc = "Bits 8:11 - PRS Status 0 Output Select"] #[inline(always)] #[must_use] - pub fn prsstatussel0(&mut self) -> PRSSTATUSSEL0_W<8> { - PRSSTATUSSEL0_W::new(self) + pub fn prsstatussel0(&mut self) -> Prsstatussel0W { + Prsstatussel0W::new(self, 8) } #[doc = "Bits 12:15 - PRS Status 1 Output Select"] #[inline(always)] #[must_use] - pub fn prsstatussel1(&mut self) -> PRSSTATUSSEL1_W<12> { - PRSSTATUSSEL1_W::new(self) + pub fn prsstatussel1(&mut self) -> Prsstatussel1W { + Prsstatussel1W::new(self, 12) } #[doc = "Bit 16 - Force Digital Clock Request"] #[inline(always)] #[must_use] - pub fn forceen(&mut self) -> FORCEEN_W<16> { - FORCEEN_W::new(self) + pub fn forceen(&mut self) -> ForceenW { + ForceenW::new(self, 16) } #[doc = "Bit 17 - Force PRS Oscillator Request"] #[inline(always)] #[must_use] - pub fn forceenprs(&mut self) -> FORCEENPRS_W<17> { - FORCEENPRS_W::new(self) + pub fn forceenprs(&mut self) -> ForceenprsW { + ForceenprsW::new(self, 17) } #[doc = "Bit 18 - Force BUFOUT Request"] #[inline(always)] #[must_use] - pub fn forceenbufout(&mut self) -> FORCEENBUFOUT_W<18> { - FORCEENBUFOUT_W::new(self) + pub fn forceenbufout(&mut self) -> ForceenbufoutW { + ForceenbufoutW::new(self, 18) } #[doc = "Bit 24 - Disable On-demand For Digital Clock"] #[inline(always)] #[must_use] - pub fn disondemand(&mut self) -> DISONDEMAND_W<24> { - DISONDEMAND_W::new(self) + pub fn disondemand(&mut self) -> DisondemandW { + DisondemandW::new(self, 24) } #[doc = "Bit 25 - Disable On-demand For PRS"] #[inline(always)] #[must_use] - pub fn disondemandprs(&mut self) -> DISONDEMANDPRS_W<25> { - DISONDEMANDPRS_W::new(self) + pub fn disondemandprs(&mut self) -> DisondemandprsW { + DisondemandprsW::new(self, 25) } #[doc = "Bit 26 - Disable On-demand For BUFOUT"] #[inline(always)] #[must_use] - pub fn disondemandbufout(&mut self) -> DISONDEMANDBUFOUT_W<26> { - DISONDEMANDBUFOUT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn disondemandbufout(&mut self) -> DisondemandbufoutW { + DisondemandbufoutW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0x0700_0040"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0700_0040; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0x0700_0040; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/ien.rs index 8ac8024..277cb3c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/ien.rs @@ -1,245 +1,205 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RDY` reader - Digital Clock Ready Interrupt"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `RDY` writer - Digital Clock Ready Interrupt"] -pub type RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COREBIASOPTRDY` reader - Core Bias Optimization Ready Interrupt"] -pub type COREBIASOPTRDY_R = crate::BitReader; +pub type CorebiasoptrdyR = crate::BitReader; #[doc = "Field `COREBIASOPTRDY` writer - Core Bias Optimization Ready Interrupt"] -pub type COREBIASOPTRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type CorebiasoptrdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRSRDY` reader - PRS Ready Interrupt"] -pub type PRSRDY_R = crate::BitReader; +pub type PrsrdyR = crate::BitReader; #[doc = "Field `PRSRDY` writer - PRS Ready Interrupt"] -pub type PRSRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PrsrdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUFOUTRDY` reader - BUFOUT Ready Interrupt"] -pub type BUFOUTRDY_R = crate::BitReader; +pub type BufoutrdyR = crate::BitReader; #[doc = "Field `BUFOUTRDY` writer - BUFOUT Ready Interrupt"] -pub type BUFOUTRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type BufoutrdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUFOUTFROZEN` reader - BUFOUT FROZEN Interrupt"] -pub type BUFOUTFROZEN_R = crate::BitReader; +pub type BufoutfrozenR = crate::BitReader; #[doc = "Field `BUFOUTFROZEN` writer - BUFOUT FROZEN Interrupt"] -pub type BUFOUTFROZEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type BufoutfrozenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRSERR` reader - PRS Requset Error Interrupt"] -pub type PRSERR_R = crate::BitReader; +pub type PrserrR = crate::BitReader; #[doc = "Field `PRSERR` writer - PRS Requset Error Interrupt"] -pub type PRSERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PrserrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUFOUTERR` reader - BUFOUT Request Error Interrupt"] -pub type BUFOUTERR_R = crate::BitReader; +pub type BufouterrR = crate::BitReader; #[doc = "Field `BUFOUTERR` writer - BUFOUT Request Error Interrupt"] -pub type BUFOUTERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type BufouterrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUFOUTFREEZEERR` reader - BUFOUT Freeze Error Interrupt"] -pub type BUFOUTFREEZEERR_R = crate::BitReader; +pub type BufoutfreezeerrR = crate::BitReader; #[doc = "Field `BUFOUTFREEZEERR` writer - BUFOUT Freeze Error Interrupt"] -pub type BUFOUTFREEZEERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type BufoutfreezeerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUFOUTDNSERR` reader - BUFOUT Did Not Start Error Interrupt"] -pub type BUFOUTDNSERR_R = crate::BitReader; +pub type BufoutdnserrR = crate::BitReader; #[doc = "Field `BUFOUTDNSERR` writer - BUFOUT Did Not Start Error Interrupt"] -pub type BUFOUTDNSERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type BufoutdnserrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DNSERR` reader - Did Not Start Error Interrupt"] -pub type DNSERR_R = crate::BitReader; +pub type DnserrR = crate::BitReader; #[doc = "Field `DNSERR` writer - Did Not Start Error Interrupt"] -pub type DNSERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type DnserrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LFTIMEOUTERR` reader - Low Frequency Timeout Error Interrupt"] -pub type LFTIMEOUTERR_R = crate::BitReader; +pub type LftimeouterrR = crate::BitReader; #[doc = "Field `LFTIMEOUTERR` writer - Low Frequency Timeout Error Interrupt"] -pub type LFTIMEOUTERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type LftimeouterrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COREBIASOPTERR` reader - Core Bias Optimization Error Interrupt"] -pub type COREBIASOPTERR_R = crate::BitReader; +pub type CorebiasopterrR = crate::BitReader; #[doc = "Field `COREBIASOPTERR` writer - Core Bias Optimization Error Interrupt"] -pub type COREBIASOPTERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type CorebiasopterrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Digital Clock Ready Interrupt"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Core Bias Optimization Ready Interrupt"] #[inline(always)] - pub fn corebiasoptrdy(&self) -> COREBIASOPTRDY_R { - COREBIASOPTRDY_R::new(((self.bits >> 1) & 1) != 0) + pub fn corebiasoptrdy(&self) -> CorebiasoptrdyR { + CorebiasoptrdyR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - PRS Ready Interrupt"] #[inline(always)] - pub fn prsrdy(&self) -> PRSRDY_R { - PRSRDY_R::new(((self.bits >> 2) & 1) != 0) + pub fn prsrdy(&self) -> PrsrdyR { + PrsrdyR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - BUFOUT Ready Interrupt"] #[inline(always)] - pub fn bufoutrdy(&self) -> BUFOUTRDY_R { - BUFOUTRDY_R::new(((self.bits >> 3) & 1) != 0) + pub fn bufoutrdy(&self) -> BufoutrdyR { + BufoutrdyR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 15 - BUFOUT FROZEN Interrupt"] #[inline(always)] - pub fn bufoutfrozen(&self) -> BUFOUTFROZEN_R { - BUFOUTFROZEN_R::new(((self.bits >> 15) & 1) != 0) + pub fn bufoutfrozen(&self) -> BufoutfrozenR { + BufoutfrozenR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 20 - PRS Requset Error Interrupt"] #[inline(always)] - pub fn prserr(&self) -> PRSERR_R { - PRSERR_R::new(((self.bits >> 20) & 1) != 0) + pub fn prserr(&self) -> PrserrR { + PrserrR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - BUFOUT Request Error Interrupt"] #[inline(always)] - pub fn bufouterr(&self) -> BUFOUTERR_R { - BUFOUTERR_R::new(((self.bits >> 21) & 1) != 0) + pub fn bufouterr(&self) -> BufouterrR { + BufouterrR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 27 - BUFOUT Freeze Error Interrupt"] #[inline(always)] - pub fn bufoutfreezeerr(&self) -> BUFOUTFREEZEERR_R { - BUFOUTFREEZEERR_R::new(((self.bits >> 27) & 1) != 0) + pub fn bufoutfreezeerr(&self) -> BufoutfreezeerrR { + BufoutfreezeerrR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - BUFOUT Did Not Start Error Interrupt"] #[inline(always)] - pub fn bufoutdnserr(&self) -> BUFOUTDNSERR_R { - BUFOUTDNSERR_R::new(((self.bits >> 28) & 1) != 0) + pub fn bufoutdnserr(&self) -> BufoutdnserrR { + BufoutdnserrR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Did Not Start Error Interrupt"] #[inline(always)] - pub fn dnserr(&self) -> DNSERR_R { - DNSERR_R::new(((self.bits >> 29) & 1) != 0) + pub fn dnserr(&self) -> DnserrR { + DnserrR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Low Frequency Timeout Error Interrupt"] #[inline(always)] - pub fn lftimeouterr(&self) -> LFTIMEOUTERR_R { - LFTIMEOUTERR_R::new(((self.bits >> 30) & 1) != 0) + pub fn lftimeouterr(&self) -> LftimeouterrR { + LftimeouterrR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Core Bias Optimization Error Interrupt"] #[inline(always)] - pub fn corebiasopterr(&self) -> COREBIASOPTERR_R { - COREBIASOPTERR_R::new(((self.bits >> 31) & 1) != 0) + pub fn corebiasopterr(&self) -> CorebiasopterrR { + CorebiasopterrR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Digital Clock Ready Interrupt"] #[inline(always)] #[must_use] - pub fn rdy(&mut self) -> RDY_W<0> { - RDY_W::new(self) + pub fn rdy(&mut self) -> RdyW { + RdyW::new(self, 0) } #[doc = "Bit 1 - Core Bias Optimization Ready Interrupt"] #[inline(always)] #[must_use] - pub fn corebiasoptrdy(&mut self) -> COREBIASOPTRDY_W<1> { - COREBIASOPTRDY_W::new(self) + pub fn corebiasoptrdy(&mut self) -> CorebiasoptrdyW { + CorebiasoptrdyW::new(self, 1) } #[doc = "Bit 2 - PRS Ready Interrupt"] #[inline(always)] #[must_use] - pub fn prsrdy(&mut self) -> PRSRDY_W<2> { - PRSRDY_W::new(self) + pub fn prsrdy(&mut self) -> PrsrdyW { + PrsrdyW::new(self, 2) } #[doc = "Bit 3 - BUFOUT Ready Interrupt"] #[inline(always)] #[must_use] - pub fn bufoutrdy(&mut self) -> BUFOUTRDY_W<3> { - BUFOUTRDY_W::new(self) + pub fn bufoutrdy(&mut self) -> BufoutrdyW { + BufoutrdyW::new(self, 3) } #[doc = "Bit 15 - BUFOUT FROZEN Interrupt"] #[inline(always)] #[must_use] - pub fn bufoutfrozen(&mut self) -> BUFOUTFROZEN_W<15> { - BUFOUTFROZEN_W::new(self) + pub fn bufoutfrozen(&mut self) -> BufoutfrozenW { + BufoutfrozenW::new(self, 15) } #[doc = "Bit 20 - PRS Requset Error Interrupt"] #[inline(always)] #[must_use] - pub fn prserr(&mut self) -> PRSERR_W<20> { - PRSERR_W::new(self) + pub fn prserr(&mut self) -> PrserrW { + PrserrW::new(self, 20) } #[doc = "Bit 21 - BUFOUT Request Error Interrupt"] #[inline(always)] #[must_use] - pub fn bufouterr(&mut self) -> BUFOUTERR_W<21> { - BUFOUTERR_W::new(self) + pub fn bufouterr(&mut self) -> BufouterrW { + BufouterrW::new(self, 21) } #[doc = "Bit 27 - BUFOUT Freeze Error Interrupt"] #[inline(always)] #[must_use] - pub fn bufoutfreezeerr(&mut self) -> BUFOUTFREEZEERR_W<27> { - BUFOUTFREEZEERR_W::new(self) + pub fn bufoutfreezeerr(&mut self) -> BufoutfreezeerrW { + BufoutfreezeerrW::new(self, 27) } #[doc = "Bit 28 - BUFOUT Did Not Start Error Interrupt"] #[inline(always)] #[must_use] - pub fn bufoutdnserr(&mut self) -> BUFOUTDNSERR_W<28> { - BUFOUTDNSERR_W::new(self) + pub fn bufoutdnserr(&mut self) -> BufoutdnserrW { + BufoutdnserrW::new(self, 28) } #[doc = "Bit 29 - Did Not Start Error Interrupt"] #[inline(always)] #[must_use] - pub fn dnserr(&mut self) -> DNSERR_W<29> { - DNSERR_W::new(self) + pub fn dnserr(&mut self) -> DnserrW { + DnserrW::new(self, 29) } #[doc = "Bit 30 - Low Frequency Timeout Error Interrupt"] #[inline(always)] #[must_use] - pub fn lftimeouterr(&mut self) -> LFTIMEOUTERR_W<30> { - LFTIMEOUTERR_W::new(self) + pub fn lftimeouterr(&mut self) -> LftimeouterrW { + LftimeouterrW::new(self, 30) } #[doc = "Bit 31 - Core Bias Optimization Error Interrupt"] #[inline(always)] #[must_use] - pub fn corebiasopterr(&mut self) -> COREBIASOPTERR_W<31> { - COREBIASOPTERR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn corebiasopterr(&mut self) -> CorebiasopterrW { + CorebiasopterrW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/if_.rs index e9bf866..21005ab 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/if_.rs @@ -1,245 +1,205 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RDY` reader - Digital Clock Ready Interrupt"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `RDY` writer - Digital Clock Ready Interrupt"] -pub type RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COREBIASOPTRDY` reader - Core Bias Optimization Ready Interrupt"] -pub type COREBIASOPTRDY_R = crate::BitReader; +pub type CorebiasoptrdyR = crate::BitReader; #[doc = "Field `COREBIASOPTRDY` writer - Core Bias Optimization Ready Interrupt"] -pub type COREBIASOPTRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type CorebiasoptrdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRSRDY` reader - PRS Ready Interrupt"] -pub type PRSRDY_R = crate::BitReader; +pub type PrsrdyR = crate::BitReader; #[doc = "Field `PRSRDY` writer - PRS Ready Interrupt"] -pub type PRSRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PrsrdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUFOUTRDY` reader - BUFOUT Ready Interrupt"] -pub type BUFOUTRDY_R = crate::BitReader; +pub type BufoutrdyR = crate::BitReader; #[doc = "Field `BUFOUTRDY` writer - BUFOUT Ready Interrupt"] -pub type BUFOUTRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type BufoutrdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUFOUTFROZEN` reader - BUFOUT FROZEN Interrupt"] -pub type BUFOUTFROZEN_R = crate::BitReader; +pub type BufoutfrozenR = crate::BitReader; #[doc = "Field `BUFOUTFROZEN` writer - BUFOUT FROZEN Interrupt"] -pub type BUFOUTFROZEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type BufoutfrozenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRSERR` reader - PRS Requset Error Interrupt"] -pub type PRSERR_R = crate::BitReader; +pub type PrserrR = crate::BitReader; #[doc = "Field `PRSERR` writer - PRS Requset Error Interrupt"] -pub type PRSERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PrserrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUFOUTERR` reader - BUFOUT Request Error Interrupt"] -pub type BUFOUTERR_R = crate::BitReader; +pub type BufouterrR = crate::BitReader; #[doc = "Field `BUFOUTERR` writer - BUFOUT Request Error Interrupt"] -pub type BUFOUTERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type BufouterrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUFOUTFREEZEERR` reader - BUFOUT Freeze Error Interrupt"] -pub type BUFOUTFREEZEERR_R = crate::BitReader; +pub type BufoutfreezeerrR = crate::BitReader; #[doc = "Field `BUFOUTFREEZEERR` writer - BUFOUT Freeze Error Interrupt"] -pub type BUFOUTFREEZEERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type BufoutfreezeerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUFOUTDNSERR` reader - BUFOUT Did Not Start Error Interrupt"] -pub type BUFOUTDNSERR_R = crate::BitReader; +pub type BufoutdnserrR = crate::BitReader; #[doc = "Field `BUFOUTDNSERR` writer - BUFOUT Did Not Start Error Interrupt"] -pub type BUFOUTDNSERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type BufoutdnserrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DNSERR` reader - Did Not Start Error Interrupt"] -pub type DNSERR_R = crate::BitReader; +pub type DnserrR = crate::BitReader; #[doc = "Field `DNSERR` writer - Did Not Start Error Interrupt"] -pub type DNSERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type DnserrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LFTIMEOUTERR` reader - Low Frequency Timeout Error Interrupt"] -pub type LFTIMEOUTERR_R = crate::BitReader; +pub type LftimeouterrR = crate::BitReader; #[doc = "Field `LFTIMEOUTERR` writer - Low Frequency Timeout Error Interrupt"] -pub type LFTIMEOUTERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type LftimeouterrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COREBIASOPTERR` reader - Core Bias Optimization Error Interrupt"] -pub type COREBIASOPTERR_R = crate::BitReader; +pub type CorebiasopterrR = crate::BitReader; #[doc = "Field `COREBIASOPTERR` writer - Core Bias Optimization Error Interrupt"] -pub type COREBIASOPTERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type CorebiasopterrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Digital Clock Ready Interrupt"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Core Bias Optimization Ready Interrupt"] #[inline(always)] - pub fn corebiasoptrdy(&self) -> COREBIASOPTRDY_R { - COREBIASOPTRDY_R::new(((self.bits >> 1) & 1) != 0) + pub fn corebiasoptrdy(&self) -> CorebiasoptrdyR { + CorebiasoptrdyR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - PRS Ready Interrupt"] #[inline(always)] - pub fn prsrdy(&self) -> PRSRDY_R { - PRSRDY_R::new(((self.bits >> 2) & 1) != 0) + pub fn prsrdy(&self) -> PrsrdyR { + PrsrdyR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - BUFOUT Ready Interrupt"] #[inline(always)] - pub fn bufoutrdy(&self) -> BUFOUTRDY_R { - BUFOUTRDY_R::new(((self.bits >> 3) & 1) != 0) + pub fn bufoutrdy(&self) -> BufoutrdyR { + BufoutrdyR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 15 - BUFOUT FROZEN Interrupt"] #[inline(always)] - pub fn bufoutfrozen(&self) -> BUFOUTFROZEN_R { - BUFOUTFROZEN_R::new(((self.bits >> 15) & 1) != 0) + pub fn bufoutfrozen(&self) -> BufoutfrozenR { + BufoutfrozenR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 20 - PRS Requset Error Interrupt"] #[inline(always)] - pub fn prserr(&self) -> PRSERR_R { - PRSERR_R::new(((self.bits >> 20) & 1) != 0) + pub fn prserr(&self) -> PrserrR { + PrserrR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - BUFOUT Request Error Interrupt"] #[inline(always)] - pub fn bufouterr(&self) -> BUFOUTERR_R { - BUFOUTERR_R::new(((self.bits >> 21) & 1) != 0) + pub fn bufouterr(&self) -> BufouterrR { + BufouterrR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 27 - BUFOUT Freeze Error Interrupt"] #[inline(always)] - pub fn bufoutfreezeerr(&self) -> BUFOUTFREEZEERR_R { - BUFOUTFREEZEERR_R::new(((self.bits >> 27) & 1) != 0) + pub fn bufoutfreezeerr(&self) -> BufoutfreezeerrR { + BufoutfreezeerrR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - BUFOUT Did Not Start Error Interrupt"] #[inline(always)] - pub fn bufoutdnserr(&self) -> BUFOUTDNSERR_R { - BUFOUTDNSERR_R::new(((self.bits >> 28) & 1) != 0) + pub fn bufoutdnserr(&self) -> BufoutdnserrR { + BufoutdnserrR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Did Not Start Error Interrupt"] #[inline(always)] - pub fn dnserr(&self) -> DNSERR_R { - DNSERR_R::new(((self.bits >> 29) & 1) != 0) + pub fn dnserr(&self) -> DnserrR { + DnserrR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Low Frequency Timeout Error Interrupt"] #[inline(always)] - pub fn lftimeouterr(&self) -> LFTIMEOUTERR_R { - LFTIMEOUTERR_R::new(((self.bits >> 30) & 1) != 0) + pub fn lftimeouterr(&self) -> LftimeouterrR { + LftimeouterrR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Core Bias Optimization Error Interrupt"] #[inline(always)] - pub fn corebiasopterr(&self) -> COREBIASOPTERR_R { - COREBIASOPTERR_R::new(((self.bits >> 31) & 1) != 0) + pub fn corebiasopterr(&self) -> CorebiasopterrR { + CorebiasopterrR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Digital Clock Ready Interrupt"] #[inline(always)] #[must_use] - pub fn rdy(&mut self) -> RDY_W<0> { - RDY_W::new(self) + pub fn rdy(&mut self) -> RdyW { + RdyW::new(self, 0) } #[doc = "Bit 1 - Core Bias Optimization Ready Interrupt"] #[inline(always)] #[must_use] - pub fn corebiasoptrdy(&mut self) -> COREBIASOPTRDY_W<1> { - COREBIASOPTRDY_W::new(self) + pub fn corebiasoptrdy(&mut self) -> CorebiasoptrdyW { + CorebiasoptrdyW::new(self, 1) } #[doc = "Bit 2 - PRS Ready Interrupt"] #[inline(always)] #[must_use] - pub fn prsrdy(&mut self) -> PRSRDY_W<2> { - PRSRDY_W::new(self) + pub fn prsrdy(&mut self) -> PrsrdyW { + PrsrdyW::new(self, 2) } #[doc = "Bit 3 - BUFOUT Ready Interrupt"] #[inline(always)] #[must_use] - pub fn bufoutrdy(&mut self) -> BUFOUTRDY_W<3> { - BUFOUTRDY_W::new(self) + pub fn bufoutrdy(&mut self) -> BufoutrdyW { + BufoutrdyW::new(self, 3) } #[doc = "Bit 15 - BUFOUT FROZEN Interrupt"] #[inline(always)] #[must_use] - pub fn bufoutfrozen(&mut self) -> BUFOUTFROZEN_W<15> { - BUFOUTFROZEN_W::new(self) + pub fn bufoutfrozen(&mut self) -> BufoutfrozenW { + BufoutfrozenW::new(self, 15) } #[doc = "Bit 20 - PRS Requset Error Interrupt"] #[inline(always)] #[must_use] - pub fn prserr(&mut self) -> PRSERR_W<20> { - PRSERR_W::new(self) + pub fn prserr(&mut self) -> PrserrW { + PrserrW::new(self, 20) } #[doc = "Bit 21 - BUFOUT Request Error Interrupt"] #[inline(always)] #[must_use] - pub fn bufouterr(&mut self) -> BUFOUTERR_W<21> { - BUFOUTERR_W::new(self) + pub fn bufouterr(&mut self) -> BufouterrW { + BufouterrW::new(self, 21) } #[doc = "Bit 27 - BUFOUT Freeze Error Interrupt"] #[inline(always)] #[must_use] - pub fn bufoutfreezeerr(&mut self) -> BUFOUTFREEZEERR_W<27> { - BUFOUTFREEZEERR_W::new(self) + pub fn bufoutfreezeerr(&mut self) -> BufoutfreezeerrW { + BufoutfreezeerrW::new(self, 27) } #[doc = "Bit 28 - BUFOUT Did Not Start Error Interrupt"] #[inline(always)] #[must_use] - pub fn bufoutdnserr(&mut self) -> BUFOUTDNSERR_W<28> { - BUFOUTDNSERR_W::new(self) + pub fn bufoutdnserr(&mut self) -> BufoutdnserrW { + BufoutdnserrW::new(self, 28) } #[doc = "Bit 29 - Did Not Start Error Interrupt"] #[inline(always)] #[must_use] - pub fn dnserr(&mut self) -> DNSERR_W<29> { - DNSERR_W::new(self) + pub fn dnserr(&mut self) -> DnserrW { + DnserrW::new(self, 29) } #[doc = "Bit 30 - Low Frequency Timeout Error Interrupt"] #[inline(always)] #[must_use] - pub fn lftimeouterr(&mut self) -> LFTIMEOUTERR_W<30> { - LFTIMEOUTERR_W::new(self) + pub fn lftimeouterr(&mut self) -> LftimeouterrW { + LftimeouterrW::new(self, 30) } #[doc = "Bit 31 - Core Bias Optimization Error Interrupt"] #[inline(always)] #[must_use] - pub fn corebiasopterr(&mut self) -> COREBIASOPTERR_W<31> { - COREBIASOPTERR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn corebiasopterr(&mut self) -> CorebiasopterrW { + CorebiasopterrW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/ipversion.rs index 84fd334..7d07047 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x03"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x03; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x03; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/lock.rs index 985ce38..1b53b3a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Configuration Lock Key\n\nValue on reset: 22542"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "22542: Write this value to unlock"] - UNLOCK = 22542, + Unlock = 22542, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Configuration Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write this value to unlock"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Configuration Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0x580e"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0x580e; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0x580e; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/status.rs index 5555492..01082c1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/status.rs @@ -1,148 +1,133 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RDY` reader - Ready Status"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `COREBIASOPTRDY` reader - Core Bias Optimization Ready"] -pub type COREBIASOPTRDY_R = crate::BitReader; +pub type CorebiasoptrdyR = crate::BitReader; #[doc = "Field `PRSRDY` reader - PRS Ready Status"] -pub type PRSRDY_R = crate::BitReader; +pub type PrsrdyR = crate::BitReader; #[doc = "Field `BUFOUTRDY` reader - BUFOUT Ready Status"] -pub type BUFOUTRDY_R = crate::BitReader; +pub type BufoutrdyR = crate::BitReader; #[doc = "Field `BUFOUTFROZEN` reader - BUFOUT Frozen"] -pub type BUFOUTFROZEN_R = crate::BitReader; +pub type BufoutfrozenR = crate::BitReader; #[doc = "Field `ENS` reader - Enabled Status"] -pub type ENS_R = crate::BitReader; +pub type EnsR = crate::BitReader; #[doc = "Field `HWREQ` reader - Oscillator Requested by Digital Clock"] -pub type HWREQ_R = crate::BitReader; +pub type HwreqR = crate::BitReader; #[doc = "Field `ISWARM` reader - Oscillator Is Kept Warm"] -pub type ISWARM_R = crate::BitReader; +pub type IswarmR = crate::BitReader; #[doc = "Field `PRSHWREQ` reader - Oscillator Requested by PRS Request"] -pub type PRSHWREQ_R = crate::BitReader; +pub type PrshwreqR = crate::BitReader; #[doc = "Field `BUFOUTHWREQ` reader - Oscillator Requested by BUFOUT Request"] -pub type BUFOUTHWREQ_R = crate::BitReader; +pub type BufouthwreqR = crate::BitReader; #[doc = "Field `SYNCBUSY` reader - Sync Busy"] -pub type SYNCBUSY_R = crate::BitReader; -#[doc = "Field `LOCK` reader - Configuration Lock Status"] -pub type LOCK_R = crate::BitReader; +pub type SyncbusyR = crate::BitReader; #[doc = "Configuration Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCK_A { +pub enum Lock { #[doc = "0: Configuration lock is unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: Configuration lock is locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCK_A) -> Self { + fn from(variant: Lock) -> Self { variant as u8 != 0 } } -impl LOCK_R { +#[doc = "Field `LOCK` reader - Configuration Lock Status"] +pub type LockR = crate::BitReader; +impl LockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCK_A { + pub const fn variant(&self) -> Lock { match self.bits { - false => LOCK_A::UNLOCKED, - true => LOCK_A::LOCKED, + false => Lock::Unlocked, + true => Lock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "Configuration lock is unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCK_A::UNLOCKED + *self == Lock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "Configuration lock is locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCK_A::LOCKED + *self == Lock::Locked } } impl R { #[doc = "Bit 0 - Ready Status"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Core Bias Optimization Ready"] #[inline(always)] - pub fn corebiasoptrdy(&self) -> COREBIASOPTRDY_R { - COREBIASOPTRDY_R::new(((self.bits >> 1) & 1) != 0) + pub fn corebiasoptrdy(&self) -> CorebiasoptrdyR { + CorebiasoptrdyR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - PRS Ready Status"] #[inline(always)] - pub fn prsrdy(&self) -> PRSRDY_R { - PRSRDY_R::new(((self.bits >> 2) & 1) != 0) + pub fn prsrdy(&self) -> PrsrdyR { + PrsrdyR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - BUFOUT Ready Status"] #[inline(always)] - pub fn bufoutrdy(&self) -> BUFOUTRDY_R { - BUFOUTRDY_R::new(((self.bits >> 3) & 1) != 0) + pub fn bufoutrdy(&self) -> BufoutrdyR { + BufoutrdyR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 15 - BUFOUT Frozen"] #[inline(always)] - pub fn bufoutfrozen(&self) -> BUFOUTFROZEN_R { - BUFOUTFROZEN_R::new(((self.bits >> 15) & 1) != 0) + pub fn bufoutfrozen(&self) -> BufoutfrozenR { + BufoutfrozenR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Enabled Status"] #[inline(always)] - pub fn ens(&self) -> ENS_R { - ENS_R::new(((self.bits >> 16) & 1) != 0) + pub fn ens(&self) -> EnsR { + EnsR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Oscillator Requested by Digital Clock"] #[inline(always)] - pub fn hwreq(&self) -> HWREQ_R { - HWREQ_R::new(((self.bits >> 17) & 1) != 0) + pub fn hwreq(&self) -> HwreqR { + HwreqR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 19 - Oscillator Is Kept Warm"] #[inline(always)] - pub fn iswarm(&self) -> ISWARM_R { - ISWARM_R::new(((self.bits >> 19) & 1) != 0) + pub fn iswarm(&self) -> IswarmR { + IswarmR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Oscillator Requested by PRS Request"] #[inline(always)] - pub fn prshwreq(&self) -> PRSHWREQ_R { - PRSHWREQ_R::new(((self.bits >> 20) & 1) != 0) + pub fn prshwreq(&self) -> PrshwreqR { + PrshwreqR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Oscillator Requested by BUFOUT Request"] #[inline(always)] - pub fn bufouthwreq(&self) -> BUFOUTHWREQ_R { - BUFOUTHWREQ_R::new(((self.bits >> 21) & 1) != 0) + pub fn bufouthwreq(&self) -> BufouthwreqR { + BufouthwreqR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 30 - Sync Busy"] #[inline(always)] - pub fn syncbusy(&self) -> SYNCBUSY_R { - SYNCBUSY_R::new(((self.bits >> 30) & 1) != 0) + pub fn syncbusy(&self) -> SyncbusyR { + SyncbusyR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Configuration Lock Status"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new(((self.bits >> 31) & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/xtalcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/xtalcfg.rs index 2065f3e..063dbd3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/xtalcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/xtalcfg.rs @@ -1,621 +1,591 @@ #[doc = "Register `XTALCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `XTALCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `COREBIASSTARTUPI` reader - Intermediate Startup Core Bias Current"] -pub type COREBIASSTARTUPI_R = crate::FieldReader; +pub type CorebiasstartupiR = crate::FieldReader; #[doc = "Field `COREBIASSTARTUPI` writer - Intermediate Startup Core Bias Current"] -pub type COREBIASSTARTUPI_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, XTALCFG_SPEC, u8, u8, 6, O>; +pub type CorebiasstartupiW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `COREBIASSTARTUP` reader - Startup Core Bias Current"] -pub type COREBIASSTARTUP_R = crate::FieldReader; +pub type CorebiasstartupR = crate::FieldReader; #[doc = "Field `COREBIASSTARTUP` writer - Startup Core Bias Current"] -pub type COREBIASSTARTUP_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, XTALCFG_SPEC, u8, u8, 6, O>; +pub type CorebiasstartupW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `CTUNEXISTARTUP` reader - Startup Tuning Capacitance on XI"] -pub type CTUNEXISTARTUP_R = crate::FieldReader; +pub type CtunexistartupR = crate::FieldReader; #[doc = "Field `CTUNEXISTARTUP` writer - Startup Tuning Capacitance on XI"] -pub type CTUNEXISTARTUP_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, XTALCFG_SPEC, u8, u8, 4, O>; +pub type CtunexistartupW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `CTUNEXOSTARTUP` reader - Startup Tuning Capacitance on XO"] -pub type CTUNEXOSTARTUP_R = crate::FieldReader; +pub type CtunexostartupR = crate::FieldReader; #[doc = "Field `CTUNEXOSTARTUP` writer - Startup Tuning Capacitance on XO"] -pub type CTUNEXOSTARTUP_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, XTALCFG_SPEC, u8, u8, 4, O>; -#[doc = "Field `TIMEOUTSTEADY` reader - Steady State Timeout"] -pub type TIMEOUTSTEADY_R = crate::FieldReader; +pub type CtunexostartupW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Steady State Timeout\n\nValue on reset: 11"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TIMEOUTSTEADY_A { +pub enum Timeoutsteady { #[doc = "0: The steady state timeout is set to 16 us minimum. The maximum can be +40%."] - T4US = 0, + T4us = 0, #[doc = "1: The steady state timeout is set to 41 us minimum. The maximum can be +40%."] - T16US = 1, + T16us = 1, #[doc = "2: The steady state timeout is set to 83 us minimum. The maximum can be +40%."] - T41US = 2, + T41us = 2, #[doc = "3: The steady state timeout is set to 125 us minimum. The maximum can be +40%."] - T83US = 3, + T83us = 3, #[doc = "4: The steady state timeout is set to 166 us minimum. The maximum can be +40%."] - T125US = 4, + T125us = 4, #[doc = "5: The steady state timeout is set to 208 us minimum. The maximum can be +40%."] - T166US = 5, + T166us = 5, #[doc = "6: The steady state timeout is set to 250 us minimum. The maximum can be +40%."] - T208US = 6, + T208us = 6, #[doc = "7: The steady state timeout is set to 333 us minimum. The maximum can be +40%."] - T250US = 7, + T250us = 7, #[doc = "8: The steady state timeout is set to 416 us minimum. The maximum can be +40%."] - T333US = 8, + T333us = 8, #[doc = "9: The steady state timeout is set to 500 us minimum. The maximum can be +40%."] - T416US = 9, + T416us = 9, #[doc = "10: The steady state timeout is set to 666 us minimum. The maximum can be +40%."] - T500US = 10, + T500us = 10, #[doc = "11: The steady state timeout is set to 833 us minimum. The maximum can be +40%."] - T666US = 11, + T666us = 11, #[doc = "12: The steady state timeout is set to 1666 us minimum. The maximum can be +40%."] - T833US = 12, + T833us = 12, #[doc = "13: The steady state timeout is set to 2500 us minimum. The maximum can be +40%."] - T1666US = 13, + T1666us = 13, #[doc = "14: The steady state timeout is set to 4166 us minimum. The maximum can be +40%."] - T2500US = 14, + T2500us = 14, #[doc = "15: The steady state timeout is set to 7500 us minimum. The maximum can be +40%."] - T4166US = 15, + T4166us = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TIMEOUTSTEADY_A) -> Self { + fn from(variant: Timeoutsteady) -> Self { variant as _ } } -impl TIMEOUTSTEADY_R { +impl crate::FieldSpec for Timeoutsteady { + type Ux = u8; +} +impl crate::IsEnum for Timeoutsteady {} +#[doc = "Field `TIMEOUTSTEADY` reader - Steady State Timeout"] +pub type TimeoutsteadyR = crate::FieldReader; +impl TimeoutsteadyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TIMEOUTSTEADY_A { + pub const fn variant(&self) -> Timeoutsteady { match self.bits { - 0 => TIMEOUTSTEADY_A::T4US, - 1 => TIMEOUTSTEADY_A::T16US, - 2 => TIMEOUTSTEADY_A::T41US, - 3 => TIMEOUTSTEADY_A::T83US, - 4 => TIMEOUTSTEADY_A::T125US, - 5 => TIMEOUTSTEADY_A::T166US, - 6 => TIMEOUTSTEADY_A::T208US, - 7 => TIMEOUTSTEADY_A::T250US, - 8 => TIMEOUTSTEADY_A::T333US, - 9 => TIMEOUTSTEADY_A::T416US, - 10 => TIMEOUTSTEADY_A::T500US, - 11 => TIMEOUTSTEADY_A::T666US, - 12 => TIMEOUTSTEADY_A::T833US, - 13 => TIMEOUTSTEADY_A::T1666US, - 14 => TIMEOUTSTEADY_A::T2500US, - 15 => TIMEOUTSTEADY_A::T4166US, + 0 => Timeoutsteady::T4us, + 1 => Timeoutsteady::T16us, + 2 => Timeoutsteady::T41us, + 3 => Timeoutsteady::T83us, + 4 => Timeoutsteady::T125us, + 5 => Timeoutsteady::T166us, + 6 => Timeoutsteady::T208us, + 7 => Timeoutsteady::T250us, + 8 => Timeoutsteady::T333us, + 9 => Timeoutsteady::T416us, + 10 => Timeoutsteady::T500us, + 11 => Timeoutsteady::T666us, + 12 => Timeoutsteady::T833us, + 13 => Timeoutsteady::T1666us, + 14 => Timeoutsteady::T2500us, + 15 => Timeoutsteady::T4166us, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `T4US`"] + #[doc = "The steady state timeout is set to 16 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t4us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T4US + *self == Timeoutsteady::T4us } - #[doc = "Checks if the value of the field is `T16US`"] + #[doc = "The steady state timeout is set to 41 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t16us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T16US + *self == Timeoutsteady::T16us } - #[doc = "Checks if the value of the field is `T41US`"] + #[doc = "The steady state timeout is set to 83 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t41us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T41US + *self == Timeoutsteady::T41us } - #[doc = "Checks if the value of the field is `T83US`"] + #[doc = "The steady state timeout is set to 125 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t83us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T83US + *self == Timeoutsteady::T83us } - #[doc = "Checks if the value of the field is `T125US`"] + #[doc = "The steady state timeout is set to 166 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t125us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T125US + *self == Timeoutsteady::T125us } - #[doc = "Checks if the value of the field is `T166US`"] + #[doc = "The steady state timeout is set to 208 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t166us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T166US + *self == Timeoutsteady::T166us } - #[doc = "Checks if the value of the field is `T208US`"] + #[doc = "The steady state timeout is set to 250 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t208us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T208US + *self == Timeoutsteady::T208us } - #[doc = "Checks if the value of the field is `T250US`"] + #[doc = "The steady state timeout is set to 333 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t250us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T250US + *self == Timeoutsteady::T250us } - #[doc = "Checks if the value of the field is `T333US`"] + #[doc = "The steady state timeout is set to 416 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t333us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T333US + *self == Timeoutsteady::T333us } - #[doc = "Checks if the value of the field is `T416US`"] + #[doc = "The steady state timeout is set to 500 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t416us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T416US + *self == Timeoutsteady::T416us } - #[doc = "Checks if the value of the field is `T500US`"] + #[doc = "The steady state timeout is set to 666 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t500us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T500US + *self == Timeoutsteady::T500us } - #[doc = "Checks if the value of the field is `T666US`"] + #[doc = "The steady state timeout is set to 833 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t666us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T666US + *self == Timeoutsteady::T666us } - #[doc = "Checks if the value of the field is `T833US`"] + #[doc = "The steady state timeout is set to 1666 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t833us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T833US + *self == Timeoutsteady::T833us } - #[doc = "Checks if the value of the field is `T1666US`"] + #[doc = "The steady state timeout is set to 2500 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t1666us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T1666US + *self == Timeoutsteady::T1666us } - #[doc = "Checks if the value of the field is `T2500US`"] + #[doc = "The steady state timeout is set to 4166 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t2500us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T2500US + *self == Timeoutsteady::T2500us } - #[doc = "Checks if the value of the field is `T4166US`"] + #[doc = "The steady state timeout is set to 7500 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t4166us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T4166US + *self == Timeoutsteady::T4166us } } #[doc = "Field `TIMEOUTSTEADY` writer - Steady State Timeout"] -pub type TIMEOUTSTEADY_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, XTALCFG_SPEC, u8, TIMEOUTSTEADY_A, 4, O>; -impl<'a, const O: u8> TIMEOUTSTEADY_W<'a, O> { +pub type TimeoutsteadyW<'a, REG> = crate::FieldWriter<'a, REG, 4, Timeoutsteady, crate::Safe>; +impl<'a, REG> TimeoutsteadyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The steady state timeout is set to 16 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t4us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T4US) + pub fn t4us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T4us) } #[doc = "The steady state timeout is set to 41 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t16us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T16US) + pub fn t16us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T16us) } #[doc = "The steady state timeout is set to 83 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t41us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T41US) + pub fn t41us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T41us) } #[doc = "The steady state timeout is set to 125 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t83us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T83US) + pub fn t83us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T83us) } #[doc = "The steady state timeout is set to 166 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t125us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T125US) + pub fn t125us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T125us) } #[doc = "The steady state timeout is set to 208 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t166us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T166US) + pub fn t166us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T166us) } #[doc = "The steady state timeout is set to 250 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t208us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T208US) + pub fn t208us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T208us) } #[doc = "The steady state timeout is set to 333 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t250us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T250US) + pub fn t250us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T250us) } #[doc = "The steady state timeout is set to 416 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t333us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T333US) + pub fn t333us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T333us) } #[doc = "The steady state timeout is set to 500 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t416us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T416US) + pub fn t416us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T416us) } #[doc = "The steady state timeout is set to 666 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t500us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T500US) + pub fn t500us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T500us) } #[doc = "The steady state timeout is set to 833 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t666us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T666US) + pub fn t666us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T666us) } #[doc = "The steady state timeout is set to 1666 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t833us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T833US) + pub fn t833us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T833us) } #[doc = "The steady state timeout is set to 2500 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t1666us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T1666US) + pub fn t1666us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T1666us) } #[doc = "The steady state timeout is set to 4166 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t2500us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T2500US) + pub fn t2500us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T2500us) } #[doc = "The steady state timeout is set to 7500 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t4166us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T4166US) + pub fn t4166us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T4166us) } } -#[doc = "Field `TIMEOUTCBLSB` reader - Core Bias LSB Change Timeout"] -pub type TIMEOUTCBLSB_R = crate::FieldReader; #[doc = "Core Bias LSB Change Timeout\n\nValue on reset: 11"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TIMEOUTCBLSB_A { +pub enum Timeoutcblsb { #[doc = "0: The core bias LSB change timeout is set to 8 us minimum. The maximum can be +40%."] - T8US = 0, + T8us = 0, #[doc = "1: The core bias LSB change timeout is set to 20 us minimum. The maximum can be +40%."] - T20US = 1, + T20us = 1, #[doc = "2: The core bias LSB change timeout is set to 41 us minimum. The maximum can be +40%."] - T41US = 2, + T41us = 2, #[doc = "3: The core bias LSB change timeout is set to 62 us minimum. The maximum can be +40%."] - T62US = 3, + T62us = 3, #[doc = "4: The core bias LSB change timeout is set to 83 us minimum. The maximum can be +40%."] - T83US = 4, + T83us = 4, #[doc = "5: The core bias LSB change timeout is set to 104 us minimum. The maximum can be +40%."] - T104US = 5, + T104us = 5, #[doc = "6: The core bias LSB change timeout is set to 125 us minimum. The maximum can be +40%."] - T125US = 6, + T125us = 6, #[doc = "7: The core bias LSB change timeout is set to 166 us minimum. The maximum can be +40%."] - T166US = 7, + T166us = 7, #[doc = "8: The core bias LSB change timeout is set to 208 us minimum. The maximum can be +40%."] - T208US = 8, + T208us = 8, #[doc = "9: The core bias LSB change timeout is set to 250 us minimum. The maximum can be +40%."] - T250US = 9, + T250us = 9, #[doc = "10: The core bias LSB change timeout is set to 333 us minimum. The maximum can be +40%."] - T333US = 10, + T333us = 10, #[doc = "11: The core bias LSB change timeout is set to 416 us minimum. The maximum can be +40%."] - T416US = 11, + T416us = 11, #[doc = "12: The core bias LSB change timeout is set to 833 us minimum. The maximum can be +40%."] - T833US = 12, + T833us = 12, #[doc = "13: The core bias LSB change timeout is set to 1250 us minimum. The maximum can be +40%."] - T1250US = 13, + T1250us = 13, #[doc = "14: The core bias LSB change timeout is set to 2083 us minimum. The maximum can be +40%."] - T2083US = 14, + T2083us = 14, #[doc = "15: The core bias LSB change timeout is set to 3750 us minimum. The maximum can be +40%."] - T3750US = 15, + T3750us = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TIMEOUTCBLSB_A) -> Self { + fn from(variant: Timeoutcblsb) -> Self { variant as _ } } -impl TIMEOUTCBLSB_R { +impl crate::FieldSpec for Timeoutcblsb { + type Ux = u8; +} +impl crate::IsEnum for Timeoutcblsb {} +#[doc = "Field `TIMEOUTCBLSB` reader - Core Bias LSB Change Timeout"] +pub type TimeoutcblsbR = crate::FieldReader; +impl TimeoutcblsbR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TIMEOUTCBLSB_A { + pub const fn variant(&self) -> Timeoutcblsb { match self.bits { - 0 => TIMEOUTCBLSB_A::T8US, - 1 => TIMEOUTCBLSB_A::T20US, - 2 => TIMEOUTCBLSB_A::T41US, - 3 => TIMEOUTCBLSB_A::T62US, - 4 => TIMEOUTCBLSB_A::T83US, - 5 => TIMEOUTCBLSB_A::T104US, - 6 => TIMEOUTCBLSB_A::T125US, - 7 => TIMEOUTCBLSB_A::T166US, - 8 => TIMEOUTCBLSB_A::T208US, - 9 => TIMEOUTCBLSB_A::T250US, - 10 => TIMEOUTCBLSB_A::T333US, - 11 => TIMEOUTCBLSB_A::T416US, - 12 => TIMEOUTCBLSB_A::T833US, - 13 => TIMEOUTCBLSB_A::T1250US, - 14 => TIMEOUTCBLSB_A::T2083US, - 15 => TIMEOUTCBLSB_A::T3750US, + 0 => Timeoutcblsb::T8us, + 1 => Timeoutcblsb::T20us, + 2 => Timeoutcblsb::T41us, + 3 => Timeoutcblsb::T62us, + 4 => Timeoutcblsb::T83us, + 5 => Timeoutcblsb::T104us, + 6 => Timeoutcblsb::T125us, + 7 => Timeoutcblsb::T166us, + 8 => Timeoutcblsb::T208us, + 9 => Timeoutcblsb::T250us, + 10 => Timeoutcblsb::T333us, + 11 => Timeoutcblsb::T416us, + 12 => Timeoutcblsb::T833us, + 13 => Timeoutcblsb::T1250us, + 14 => Timeoutcblsb::T2083us, + 15 => Timeoutcblsb::T3750us, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `T8US`"] + #[doc = "The core bias LSB change timeout is set to 8 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t8us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T8US + *self == Timeoutcblsb::T8us } - #[doc = "Checks if the value of the field is `T20US`"] + #[doc = "The core bias LSB change timeout is set to 20 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t20us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T20US + *self == Timeoutcblsb::T20us } - #[doc = "Checks if the value of the field is `T41US`"] + #[doc = "The core bias LSB change timeout is set to 41 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t41us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T41US + *self == Timeoutcblsb::T41us } - #[doc = "Checks if the value of the field is `T62US`"] + #[doc = "The core bias LSB change timeout is set to 62 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t62us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T62US + *self == Timeoutcblsb::T62us } - #[doc = "Checks if the value of the field is `T83US`"] + #[doc = "The core bias LSB change timeout is set to 83 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t83us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T83US + *self == Timeoutcblsb::T83us } - #[doc = "Checks if the value of the field is `T104US`"] + #[doc = "The core bias LSB change timeout is set to 104 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t104us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T104US + *self == Timeoutcblsb::T104us } - #[doc = "Checks if the value of the field is `T125US`"] + #[doc = "The core bias LSB change timeout is set to 125 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t125us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T125US + *self == Timeoutcblsb::T125us } - #[doc = "Checks if the value of the field is `T166US`"] + #[doc = "The core bias LSB change timeout is set to 166 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t166us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T166US + *self == Timeoutcblsb::T166us } - #[doc = "Checks if the value of the field is `T208US`"] + #[doc = "The core bias LSB change timeout is set to 208 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t208us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T208US + *self == Timeoutcblsb::T208us } - #[doc = "Checks if the value of the field is `T250US`"] + #[doc = "The core bias LSB change timeout is set to 250 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t250us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T250US + *self == Timeoutcblsb::T250us } - #[doc = "Checks if the value of the field is `T333US`"] + #[doc = "The core bias LSB change timeout is set to 333 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t333us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T333US + *self == Timeoutcblsb::T333us } - #[doc = "Checks if the value of the field is `T416US`"] + #[doc = "The core bias LSB change timeout is set to 416 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t416us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T416US + *self == Timeoutcblsb::T416us } - #[doc = "Checks if the value of the field is `T833US`"] + #[doc = "The core bias LSB change timeout is set to 833 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t833us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T833US + *self == Timeoutcblsb::T833us } - #[doc = "Checks if the value of the field is `T1250US`"] + #[doc = "The core bias LSB change timeout is set to 1250 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t1250us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T1250US + *self == Timeoutcblsb::T1250us } - #[doc = "Checks if the value of the field is `T2083US`"] + #[doc = "The core bias LSB change timeout is set to 2083 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t2083us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T2083US + *self == Timeoutcblsb::T2083us } - #[doc = "Checks if the value of the field is `T3750US`"] + #[doc = "The core bias LSB change timeout is set to 3750 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t3750us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T3750US + *self == Timeoutcblsb::T3750us } } #[doc = "Field `TIMEOUTCBLSB` writer - Core Bias LSB Change Timeout"] -pub type TIMEOUTCBLSB_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, XTALCFG_SPEC, u8, TIMEOUTCBLSB_A, 4, O>; -impl<'a, const O: u8> TIMEOUTCBLSB_W<'a, O> { +pub type TimeoutcblsbW<'a, REG> = crate::FieldWriter<'a, REG, 4, Timeoutcblsb, crate::Safe>; +impl<'a, REG> TimeoutcblsbW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The core bias LSB change timeout is set to 8 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t8us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T8US) + pub fn t8us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T8us) } #[doc = "The core bias LSB change timeout is set to 20 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t20us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T20US) + pub fn t20us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T20us) } #[doc = "The core bias LSB change timeout is set to 41 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t41us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T41US) + pub fn t41us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T41us) } #[doc = "The core bias LSB change timeout is set to 62 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t62us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T62US) + pub fn t62us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T62us) } #[doc = "The core bias LSB change timeout is set to 83 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t83us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T83US) + pub fn t83us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T83us) } #[doc = "The core bias LSB change timeout is set to 104 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t104us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T104US) + pub fn t104us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T104us) } #[doc = "The core bias LSB change timeout is set to 125 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t125us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T125US) + pub fn t125us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T125us) } #[doc = "The core bias LSB change timeout is set to 166 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t166us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T166US) + pub fn t166us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T166us) } #[doc = "The core bias LSB change timeout is set to 208 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t208us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T208US) + pub fn t208us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T208us) } #[doc = "The core bias LSB change timeout is set to 250 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t250us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T250US) + pub fn t250us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T250us) } #[doc = "The core bias LSB change timeout is set to 333 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t333us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T333US) + pub fn t333us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T333us) } #[doc = "The core bias LSB change timeout is set to 416 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t416us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T416US) + pub fn t416us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T416us) } #[doc = "The core bias LSB change timeout is set to 833 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t833us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T833US) + pub fn t833us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T833us) } #[doc = "The core bias LSB change timeout is set to 1250 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t1250us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T1250US) + pub fn t1250us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T1250us) } #[doc = "The core bias LSB change timeout is set to 2083 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t2083us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T2083US) + pub fn t2083us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T2083us) } #[doc = "The core bias LSB change timeout is set to 3750 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t3750us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T3750US) + pub fn t3750us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T3750us) } } impl R { #[doc = "Bits 0:5 - Intermediate Startup Core Bias Current"] #[inline(always)] - pub fn corebiasstartupi(&self) -> COREBIASSTARTUPI_R { - COREBIASSTARTUPI_R::new((self.bits & 0x3f) as u8) + pub fn corebiasstartupi(&self) -> CorebiasstartupiR { + CorebiasstartupiR::new((self.bits & 0x3f) as u8) } #[doc = "Bits 6:11 - Startup Core Bias Current"] #[inline(always)] - pub fn corebiasstartup(&self) -> COREBIASSTARTUP_R { - COREBIASSTARTUP_R::new(((self.bits >> 6) & 0x3f) as u8) + pub fn corebiasstartup(&self) -> CorebiasstartupR { + CorebiasstartupR::new(((self.bits >> 6) & 0x3f) as u8) } #[doc = "Bits 12:15 - Startup Tuning Capacitance on XI"] #[inline(always)] - pub fn ctunexistartup(&self) -> CTUNEXISTARTUP_R { - CTUNEXISTARTUP_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn ctunexistartup(&self) -> CtunexistartupR { + CtunexistartupR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:19 - Startup Tuning Capacitance on XO"] #[inline(always)] - pub fn ctunexostartup(&self) -> CTUNEXOSTARTUP_R { - CTUNEXOSTARTUP_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn ctunexostartup(&self) -> CtunexostartupR { + CtunexostartupR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:23 - Steady State Timeout"] #[inline(always)] - pub fn timeoutsteady(&self) -> TIMEOUTSTEADY_R { - TIMEOUTSTEADY_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn timeoutsteady(&self) -> TimeoutsteadyR { + TimeoutsteadyR::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:27 - Core Bias LSB Change Timeout"] #[inline(always)] - pub fn timeoutcblsb(&self) -> TIMEOUTCBLSB_R { - TIMEOUTCBLSB_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn timeoutcblsb(&self) -> TimeoutcblsbR { + TimeoutcblsbR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:5 - Intermediate Startup Core Bias Current"] #[inline(always)] #[must_use] - pub fn corebiasstartupi(&mut self) -> COREBIASSTARTUPI_W<0> { - COREBIASSTARTUPI_W::new(self) + pub fn corebiasstartupi(&mut self) -> CorebiasstartupiW { + CorebiasstartupiW::new(self, 0) } #[doc = "Bits 6:11 - Startup Core Bias Current"] #[inline(always)] #[must_use] - pub fn corebiasstartup(&mut self) -> COREBIASSTARTUP_W<6> { - COREBIASSTARTUP_W::new(self) + pub fn corebiasstartup(&mut self) -> CorebiasstartupW { + CorebiasstartupW::new(self, 6) } #[doc = "Bits 12:15 - Startup Tuning Capacitance on XI"] #[inline(always)] #[must_use] - pub fn ctunexistartup(&mut self) -> CTUNEXISTARTUP_W<12> { - CTUNEXISTARTUP_W::new(self) + pub fn ctunexistartup(&mut self) -> CtunexistartupW { + CtunexistartupW::new(self, 12) } #[doc = "Bits 16:19 - Startup Tuning Capacitance on XO"] #[inline(always)] #[must_use] - pub fn ctunexostartup(&mut self) -> CTUNEXOSTARTUP_W<16> { - CTUNEXOSTARTUP_W::new(self) + pub fn ctunexostartup(&mut self) -> CtunexostartupW { + CtunexostartupW::new(self, 16) } #[doc = "Bits 20:23 - Steady State Timeout"] #[inline(always)] #[must_use] - pub fn timeoutsteady(&mut self) -> TIMEOUTSTEADY_W<20> { - TIMEOUTSTEADY_W::new(self) + pub fn timeoutsteady(&mut self) -> TimeoutsteadyW { + TimeoutsteadyW::new(self, 20) } #[doc = "Bits 24:27 - Core Bias LSB Change Timeout"] #[inline(always)] #[must_use] - pub fn timeoutcblsb(&mut self) -> TIMEOUTCBLSB_W<24> { - TIMEOUTCBLSB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn timeoutcblsb(&mut self) -> TimeoutcblsbW { + TimeoutcblsbW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [xtalcfg](index.html) module"] -pub struct XTALCFG_SPEC; -impl crate::RegisterSpec for XTALCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`xtalcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`xtalcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct XtalcfgSpec; +impl crate::RegisterSpec for XtalcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [xtalcfg::R](R) reader structure"] -impl crate::Readable for XTALCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [xtalcfg::W](W) writer structure"] -impl crate::Writable for XTALCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`xtalcfg::R`](R) reader structure"] +impl crate::Readable for XtalcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`xtalcfg::W`](W) writer structure"] +impl crate::Writable for XtalcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets XTALCFG to value 0x0bb0_0820"] -impl crate::Resettable for XTALCFG_SPEC { - const RESET_VALUE: Self::Ux = 0x0bb0_0820; +impl crate::Resettable for XtalcfgSpec { + const RESET_VALUE: u32 = 0x0bb0_0820; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/xtalctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/xtalctrl.rs index 2b011da..156c4cd 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/xtalctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/xtalctrl.rs @@ -1,305 +1,279 @@ #[doc = "Register `XTALCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `XTALCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `COREBIASANA` reader - Core Bias Current"] -pub type COREBIASANA_R = crate::FieldReader; +pub type CorebiasanaR = crate::FieldReader; #[doc = "Field `COREBIASANA` writer - Core Bias Current"] -pub type COREBIASANA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, XTALCTRL_SPEC, u8, u8, 8, O>; +pub type CorebiasanaW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CTUNEXIANA` reader - Tuning Capacitance on XI"] -pub type CTUNEXIANA_R = crate::FieldReader; +pub type CtunexianaR = crate::FieldReader; #[doc = "Field `CTUNEXIANA` writer - Tuning Capacitance on XI"] -pub type CTUNEXIANA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, XTALCTRL_SPEC, u8, u8, 8, O>; +pub type CtunexianaW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CTUNEXOANA` reader - Tuning Capacitance on XO"] -pub type CTUNEXOANA_R = crate::FieldReader; +pub type CtunexoanaR = crate::FieldReader; #[doc = "Field `CTUNEXOANA` writer - Tuning Capacitance on XO"] -pub type CTUNEXOANA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, XTALCTRL_SPEC, u8, u8, 8, O>; -#[doc = "Field `CTUNEFIXANA` reader - Fixed Tuning Capacitance"] -pub type CTUNEFIXANA_R = crate::FieldReader; +pub type CtunexoanaW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Fixed Tuning Capacitance\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CTUNEFIXANA_A { +pub enum Ctunefixana { #[doc = "0: Remove fixed capacitance on XI and XO nodes"] - NONE = 0, + None = 0, #[doc = "1: Adds fixed capacitance on XI node"] - XI = 1, + Xi = 1, #[doc = "2: Adds fixed capacitance on XO node"] - XO = 2, + Xo = 2, #[doc = "3: Adds fixed capacitance on both XI and XO nodes"] - BOTH = 3, + Both = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CTUNEFIXANA_A) -> Self { + fn from(variant: Ctunefixana) -> Self { variant as _ } } -impl CTUNEFIXANA_R { +impl crate::FieldSpec for Ctunefixana { + type Ux = u8; +} +impl crate::IsEnum for Ctunefixana {} +#[doc = "Field `CTUNEFIXANA` reader - Fixed Tuning Capacitance"] +pub type CtunefixanaR = crate::FieldReader; +impl CtunefixanaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CTUNEFIXANA_A { + pub const fn variant(&self) -> Ctunefixana { match self.bits { - 0 => CTUNEFIXANA_A::NONE, - 1 => CTUNEFIXANA_A::XI, - 2 => CTUNEFIXANA_A::XO, - 3 => CTUNEFIXANA_A::BOTH, + 0 => Ctunefixana::None, + 1 => Ctunefixana::Xi, + 2 => Ctunefixana::Xo, + 3 => Ctunefixana::Both, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Remove fixed capacitance on XI and XO nodes"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CTUNEFIXANA_A::NONE + *self == Ctunefixana::None } - #[doc = "Checks if the value of the field is `XI`"] + #[doc = "Adds fixed capacitance on XI node"] #[inline(always)] pub fn is_xi(&self) -> bool { - *self == CTUNEFIXANA_A::XI + *self == Ctunefixana::Xi } - #[doc = "Checks if the value of the field is `XO`"] + #[doc = "Adds fixed capacitance on XO node"] #[inline(always)] pub fn is_xo(&self) -> bool { - *self == CTUNEFIXANA_A::XO + *self == Ctunefixana::Xo } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Adds fixed capacitance on both XI and XO nodes"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == CTUNEFIXANA_A::BOTH + *self == Ctunefixana::Both } } #[doc = "Field `CTUNEFIXANA` writer - Fixed Tuning Capacitance"] -pub type CTUNEFIXANA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, XTALCTRL_SPEC, u8, CTUNEFIXANA_A, 2, O>; -impl<'a, const O: u8> CTUNEFIXANA_W<'a, O> { +pub type CtunefixanaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Ctunefixana, crate::Safe>; +impl<'a, REG> CtunefixanaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Remove fixed capacitance on XI and XO nodes"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CTUNEFIXANA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Ctunefixana::None) } #[doc = "Adds fixed capacitance on XI node"] #[inline(always)] - pub fn xi(self) -> &'a mut W { - self.variant(CTUNEFIXANA_A::XI) + pub fn xi(self) -> &'a mut crate::W { + self.variant(Ctunefixana::Xi) } #[doc = "Adds fixed capacitance on XO node"] #[inline(always)] - pub fn xo(self) -> &'a mut W { - self.variant(CTUNEFIXANA_A::XO) + pub fn xo(self) -> &'a mut crate::W { + self.variant(Ctunefixana::Xo) } #[doc = "Adds fixed capacitance on both XI and XO nodes"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(CTUNEFIXANA_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Ctunefixana::Both) } } -#[doc = "Field `COREDGENANA` reader - Core Degeneration"] -pub type COREDGENANA_R = crate::FieldReader; #[doc = "Core Degeneration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COREDGENANA_A { +pub enum Coredgenana { #[doc = "0: Do not apply core degeneration resistence"] - NONE = 0, + None = 0, #[doc = "1: Apply 33 ohm core degeneration resistence"] - DGEN33 = 1, + Dgen33 = 1, #[doc = "2: Apply 50 ohm core degeneration resistence"] - DGEN50 = 2, + Dgen50 = 2, #[doc = "3: Apply 100 ohm core degeneration resistence"] - DGEN100 = 3, + Dgen100 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COREDGENANA_A) -> Self { + fn from(variant: Coredgenana) -> Self { variant as _ } } -impl COREDGENANA_R { +impl crate::FieldSpec for Coredgenana { + type Ux = u8; +} +impl crate::IsEnum for Coredgenana {} +#[doc = "Field `COREDGENANA` reader - Core Degeneration"] +pub type CoredgenanaR = crate::FieldReader; +impl CoredgenanaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COREDGENANA_A { + pub const fn variant(&self) -> Coredgenana { match self.bits { - 0 => COREDGENANA_A::NONE, - 1 => COREDGENANA_A::DGEN33, - 2 => COREDGENANA_A::DGEN50, - 3 => COREDGENANA_A::DGEN100, + 0 => Coredgenana::None, + 1 => Coredgenana::Dgen33, + 2 => Coredgenana::Dgen50, + 3 => Coredgenana::Dgen100, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not apply core degeneration resistence"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COREDGENANA_A::NONE + *self == Coredgenana::None } - #[doc = "Checks if the value of the field is `DGEN33`"] + #[doc = "Apply 33 ohm core degeneration resistence"] #[inline(always)] pub fn is_dgen33(&self) -> bool { - *self == COREDGENANA_A::DGEN33 + *self == Coredgenana::Dgen33 } - #[doc = "Checks if the value of the field is `DGEN50`"] + #[doc = "Apply 50 ohm core degeneration resistence"] #[inline(always)] pub fn is_dgen50(&self) -> bool { - *self == COREDGENANA_A::DGEN50 + *self == Coredgenana::Dgen50 } - #[doc = "Checks if the value of the field is `DGEN100`"] + #[doc = "Apply 100 ohm core degeneration resistence"] #[inline(always)] pub fn is_dgen100(&self) -> bool { - *self == COREDGENANA_A::DGEN100 + *self == Coredgenana::Dgen100 } } #[doc = "Field `COREDGENANA` writer - Core Degeneration"] -pub type COREDGENANA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, XTALCTRL_SPEC, u8, COREDGENANA_A, 2, O>; -impl<'a, const O: u8> COREDGENANA_W<'a, O> { +pub type CoredgenanaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Coredgenana, crate::Safe>; +impl<'a, REG> CoredgenanaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Do not apply core degeneration resistence"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COREDGENANA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Coredgenana::None) } #[doc = "Apply 33 ohm core degeneration resistence"] #[inline(always)] - pub fn dgen33(self) -> &'a mut W { - self.variant(COREDGENANA_A::DGEN33) + pub fn dgen33(self) -> &'a mut crate::W { + self.variant(Coredgenana::Dgen33) } #[doc = "Apply 50 ohm core degeneration resistence"] #[inline(always)] - pub fn dgen50(self) -> &'a mut W { - self.variant(COREDGENANA_A::DGEN50) + pub fn dgen50(self) -> &'a mut crate::W { + self.variant(Coredgenana::Dgen50) } #[doc = "Apply 100 ohm core degeneration resistence"] #[inline(always)] - pub fn dgen100(self) -> &'a mut W { - self.variant(COREDGENANA_A::DGEN100) + pub fn dgen100(self) -> &'a mut crate::W { + self.variant(Coredgenana::Dgen100) } } #[doc = "Field `SKIPCOREBIASOPT` reader - Skip Core Bias Optimization"] -pub type SKIPCOREBIASOPT_R = crate::BitReader; +pub type SkipcorebiasoptR = crate::BitReader; #[doc = "Field `SKIPCOREBIASOPT` writer - Skip Core Bias Optimization"] -pub type SKIPCOREBIASOPT_W<'a, const O: u8> = crate::BitWriter<'a, u32, XTALCTRL_SPEC, bool, O>; +pub type SkipcorebiasoptW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:7 - Core Bias Current"] #[inline(always)] - pub fn corebiasana(&self) -> COREBIASANA_R { - COREBIASANA_R::new((self.bits & 0xff) as u8) + pub fn corebiasana(&self) -> CorebiasanaR { + CorebiasanaR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Tuning Capacitance on XI"] #[inline(always)] - pub fn ctunexiana(&self) -> CTUNEXIANA_R { - CTUNEXIANA_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn ctunexiana(&self) -> CtunexianaR { + CtunexianaR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Tuning Capacitance on XO"] #[inline(always)] - pub fn ctunexoana(&self) -> CTUNEXOANA_R { - CTUNEXOANA_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn ctunexoana(&self) -> CtunexoanaR { + CtunexoanaR::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:25 - Fixed Tuning Capacitance"] #[inline(always)] - pub fn ctunefixana(&self) -> CTUNEFIXANA_R { - CTUNEFIXANA_R::new(((self.bits >> 24) & 3) as u8) + pub fn ctunefixana(&self) -> CtunefixanaR { + CtunefixanaR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Core Degeneration"] #[inline(always)] - pub fn coredgenana(&self) -> COREDGENANA_R { - COREDGENANA_R::new(((self.bits >> 26) & 3) as u8) + pub fn coredgenana(&self) -> CoredgenanaR { + CoredgenanaR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bit 31 - Skip Core Bias Optimization"] #[inline(always)] - pub fn skipcorebiasopt(&self) -> SKIPCOREBIASOPT_R { - SKIPCOREBIASOPT_R::new(((self.bits >> 31) & 1) != 0) + pub fn skipcorebiasopt(&self) -> SkipcorebiasoptR { + SkipcorebiasoptR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:7 - Core Bias Current"] #[inline(always)] #[must_use] - pub fn corebiasana(&mut self) -> COREBIASANA_W<0> { - COREBIASANA_W::new(self) + pub fn corebiasana(&mut self) -> CorebiasanaW { + CorebiasanaW::new(self, 0) } #[doc = "Bits 8:15 - Tuning Capacitance on XI"] #[inline(always)] #[must_use] - pub fn ctunexiana(&mut self) -> CTUNEXIANA_W<8> { - CTUNEXIANA_W::new(self) + pub fn ctunexiana(&mut self) -> CtunexianaW { + CtunexianaW::new(self, 8) } #[doc = "Bits 16:23 - Tuning Capacitance on XO"] #[inline(always)] #[must_use] - pub fn ctunexoana(&mut self) -> CTUNEXOANA_W<16> { - CTUNEXOANA_W::new(self) + pub fn ctunexoana(&mut self) -> CtunexoanaW { + CtunexoanaW::new(self, 16) } #[doc = "Bits 24:25 - Fixed Tuning Capacitance"] #[inline(always)] #[must_use] - pub fn ctunefixana(&mut self) -> CTUNEFIXANA_W<24> { - CTUNEFIXANA_W::new(self) + pub fn ctunefixana(&mut self) -> CtunefixanaW { + CtunefixanaW::new(self, 24) } #[doc = "Bits 26:27 - Core Degeneration"] #[inline(always)] #[must_use] - pub fn coredgenana(&mut self) -> COREDGENANA_W<26> { - COREDGENANA_W::new(self) + pub fn coredgenana(&mut self) -> CoredgenanaW { + CoredgenanaW::new(self, 26) } #[doc = "Bit 31 - Skip Core Bias Optimization"] #[inline(always)] #[must_use] - pub fn skipcorebiasopt(&mut self) -> SKIPCOREBIASOPT_W<31> { - SKIPCOREBIASOPT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn skipcorebiasopt(&mut self) -> SkipcorebiasoptW { + SkipcorebiasoptW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [xtalctrl](index.html) module"] -pub struct XTALCTRL_SPEC; -impl crate::RegisterSpec for XTALCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`xtalctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`xtalctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct XtalctrlSpec; +impl crate::RegisterSpec for XtalctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [xtalctrl::R](R) reader structure"] -impl crate::Readable for XTALCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [xtalctrl::W](W) writer structure"] -impl crate::Writable for XTALCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`xtalctrl::R`](R) reader structure"] +impl crate::Readable for XtalctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`xtalctrl::W`](W) writer structure"] +impl crate::Writable for XtalctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets XTALCTRL to value 0x033c_3c3c"] -impl crate::Resettable for XTALCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x033c_3c3c; +impl crate::Resettable for XtalctrlSpec { + const RESET_VALUE: u32 = 0x033c_3c3c; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/xtalctrl1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/xtalctrl1.rs index ae866ee..e06091e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/xtalctrl1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_ns/xtalctrl1.rs @@ -1,81 +1,40 @@ #[doc = "Register `XTALCTRL1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `XTALCTRL1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CTUNEXIBUFOUTANA` reader - BUFOUT Tuning Capacitance on XI"] -pub type CTUNEXIBUFOUTANA_R = crate::FieldReader; +pub type CtunexibufoutanaR = crate::FieldReader; #[doc = "Field `CTUNEXIBUFOUTANA` writer - BUFOUT Tuning Capacitance on XI"] -pub type CTUNEXIBUFOUTANA_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, XTALCTRL1_SPEC, u8, u8, 8, O>; +pub type CtunexibufoutanaW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - BUFOUT Tuning Capacitance on XI"] #[inline(always)] - pub fn ctunexibufoutana(&self) -> CTUNEXIBUFOUTANA_R { - CTUNEXIBUFOUTANA_R::new((self.bits & 0xff) as u8) + pub fn ctunexibufoutana(&self) -> CtunexibufoutanaR { + CtunexibufoutanaR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - BUFOUT Tuning Capacitance on XI"] #[inline(always)] #[must_use] - pub fn ctunexibufoutana(&mut self) -> CTUNEXIBUFOUTANA_W<0> { - CTUNEXIBUFOUTANA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ctunexibufoutana(&mut self) -> CtunexibufoutanaW { + CtunexibufoutanaW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [xtalctrl1](index.html) module"] -pub struct XTALCTRL1_SPEC; -impl crate::RegisterSpec for XTALCTRL1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`xtalctrl1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`xtalctrl1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Xtalctrl1Spec; +impl crate::RegisterSpec for Xtalctrl1Spec { type Ux = u32; } -#[doc = "`read()` method returns [xtalctrl1::R](R) reader structure"] -impl crate::Readable for XTALCTRL1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [xtalctrl1::W](W) writer structure"] -impl crate::Writable for XTALCTRL1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`xtalctrl1::R`](R) reader structure"] +impl crate::Readable for Xtalctrl1Spec {} +#[doc = "`write(|w| ..)` method takes [`xtalctrl1::W`](W) writer structure"] +impl crate::Writable for Xtalctrl1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets XTALCTRL1 to value 0x3c"] -impl crate::Resettable for XTALCTRL1_SPEC { - const RESET_VALUE: Self::Ux = 0x3c; +impl crate::Resettable for Xtalctrl1Spec { + const RESET_VALUE: u32 = 0x3c; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s.rs index 8e919fe..14677fc 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s.rs @@ -1,90 +1,170 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + ipversion: Ipversion, _reserved1: [u8; 0x0c], - #[doc = "0x10 - No Description"] - pub xtalcfg: XTALCFG, + xtalcfg: Xtalcfg, _reserved2: [u8; 0x04], + xtalctrl: Xtalctrl, + xtalctrl1: Xtalctrl1, + cfg: Cfg, + _reserved5: [u8; 0x04], + ctrl: Ctrl, + _reserved6: [u8; 0x14], + bufouttrim: Bufouttrim, + bufoutctrl: Bufoutctrl, + _reserved8: [u8; 0x08], + cmd: Cmd, + _reserved9: [u8; 0x04], + status: Status, + _reserved10: [u8; 0x14], + if_: If, + ien: Ien, + _reserved12: [u8; 0x08], + lock: Lock, +} +impl RegisterBlock { + #[doc = "0x00 - No Description"] + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } + #[doc = "0x10 - No Description"] + #[inline(always)] + pub const fn xtalcfg(&self) -> &Xtalcfg { + &self.xtalcfg + } #[doc = "0x18 - No Description"] - pub xtalctrl: XTALCTRL, + #[inline(always)] + pub const fn xtalctrl(&self) -> &Xtalctrl { + &self.xtalctrl + } #[doc = "0x1c - No Description"] - pub xtalctrl1: XTALCTRL1, + #[inline(always)] + pub const fn xtalctrl1(&self) -> &Xtalctrl1 { + &self.xtalctrl1 + } #[doc = "0x20 - No Description"] - pub cfg: CFG, - _reserved5: [u8; 0x04], + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x28 - No Description"] - pub ctrl: CTRL, - _reserved6: [u8; 0x14], + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x40 - No Description"] - pub bufouttrim: BUFOUTTRIM, + #[inline(always)] + pub const fn bufouttrim(&self) -> &Bufouttrim { + &self.bufouttrim + } #[doc = "0x44 - No Description"] - pub bufoutctrl: BUFOUTCTRL, - _reserved8: [u8; 0x08], + #[inline(always)] + pub const fn bufoutctrl(&self) -> &Bufoutctrl { + &self.bufoutctrl + } #[doc = "0x50 - No Description"] - pub cmd: CMD, - _reserved9: [u8; 0x04], + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x58 - No Description"] - pub status: STATUS, - _reserved10: [u8; 0x14], + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x70 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x74 - No Description"] - pub ien: IEN, - _reserved12: [u8; 0x08], + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x80 - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "XTALCFG (rw) register accessor: an alias for `Reg`"] -pub type XTALCFG = crate::Reg; +#[doc = "XTALCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`xtalcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`xtalcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@xtalcfg`] +module"] +#[doc(alias = "XTALCFG")] +pub type Xtalcfg = crate::Reg; #[doc = "No Description"] pub mod xtalcfg; -#[doc = "XTALCTRL (rw) register accessor: an alias for `Reg`"] -pub type XTALCTRL = crate::Reg; +#[doc = "XTALCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`xtalctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`xtalctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@xtalctrl`] +module"] +#[doc(alias = "XTALCTRL")] +pub type Xtalctrl = crate::Reg; #[doc = "No Description"] pub mod xtalctrl; -#[doc = "XTALCTRL1 (rw) register accessor: an alias for `Reg`"] -pub type XTALCTRL1 = crate::Reg; +#[doc = "XTALCTRL1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`xtalctrl1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`xtalctrl1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@xtalctrl1`] +module"] +#[doc(alias = "XTALCTRL1")] +pub type Xtalctrl1 = crate::Reg; #[doc = "No Description"] pub mod xtalctrl1; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "BUFOUTTRIM (rw) register accessor: an alias for `Reg`"] -pub type BUFOUTTRIM = crate::Reg; +#[doc = "BUFOUTTRIM (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bufouttrim::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bufouttrim::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bufouttrim`] +module"] +#[doc(alias = "BUFOUTTRIM")] +pub type Bufouttrim = crate::Reg; #[doc = "No Description"] pub mod bufouttrim; -#[doc = "BUFOUTCTRL (rw) register accessor: an alias for `Reg`"] -pub type BUFOUTCTRL = crate::Reg; +#[doc = "BUFOUTCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bufoutctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bufoutctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bufoutctrl`] +module"] +#[doc(alias = "BUFOUTCTRL")] +pub type Bufoutctrl = crate::Reg; #[doc = "No Description"] pub mod bufoutctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/bufoutctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/bufoutctrl.rs index 5eef728..6b633d5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/bufoutctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/bufoutctrl.rs @@ -1,865 +1,844 @@ #[doc = "Register `BUFOUTCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `BUFOUTCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `XOUTBIASANA` reader - Driver Bias Current"] -pub type XOUTBIASANA_R = crate::FieldReader; +pub type XoutbiasanaR = crate::FieldReader; #[doc = "Field `XOUTBIASANA` writer - Driver Bias Current"] -pub type XOUTBIASANA_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, BUFOUTCTRL_SPEC, u8, u8, 4, O>; +pub type XoutbiasanaW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `XOUTCFANA` reader - Buffer Gain"] -pub type XOUTCFANA_R = crate::FieldReader; +pub type XoutcfanaR = crate::FieldReader; #[doc = "Field `XOUTCFANA` writer - Buffer Gain"] -pub type XOUTCFANA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BUFOUTCTRL_SPEC, u8, u8, 4, O>; +pub type XoutcfanaW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `XOUTGMANA` reader - No Description"] -pub type XOUTGMANA_R = crate::FieldReader; +pub type XoutgmanaR = crate::FieldReader; #[doc = "Field `XOUTGMANA` writer - No Description"] -pub type XOUTGMANA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BUFOUTCTRL_SPEC, u8, u8, 4, O>; -#[doc = "Field `PEAKDETTHRESANA` reader - Peak Detector Threshold for XOUT"] -pub type PEAKDETTHRESANA_R = crate::FieldReader; +pub type XoutgmanaW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Peak Detector Threshold for XOUT\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PEAKDETTHRESANA_A { +pub enum Peakdetthresana { #[doc = "0: V105MV"] - V105MV = 0, + V105mv = 0, #[doc = "1: V132MV"] - V132MV = 1, + V132mv = 1, #[doc = "2: V157MV"] - V157MV = 2, + V157mv = 2, #[doc = "3: V184MV"] - V184MV = 3, + V184mv = 3, #[doc = "4: V210MV"] - V210MV = 4, + V210mv = 4, #[doc = "5: V236MV"] - V236MV = 5, + V236mv = 5, #[doc = "6: V262MV"] - V262MV = 6, + V262mv = 6, #[doc = "7: V289MV"] - V289MV = 7, + V289mv = 7, #[doc = "8: V315MV"] - V315MV = 8, + V315mv = 8, #[doc = "9: V341MV"] - V341MV = 9, + V341mv = 9, #[doc = "10: V367MV"] - V367MV = 10, + V367mv = 10, #[doc = "11: V394MV"] - V394MV = 11, + V394mv = 11, #[doc = "12: V420MV"] - V420MV = 12, + V420mv = 12, #[doc = "13: V446MV"] - V446MV = 13, + V446mv = 13, #[doc = "14: V472MV"] - V472MV = 14, + V472mv = 14, #[doc = "15: V499MV"] - V499MV = 15, + V499mv = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PEAKDETTHRESANA_A) -> Self { + fn from(variant: Peakdetthresana) -> Self { variant as _ } } -impl PEAKDETTHRESANA_R { +impl crate::FieldSpec for Peakdetthresana { + type Ux = u8; +} +impl crate::IsEnum for Peakdetthresana {} +#[doc = "Field `PEAKDETTHRESANA` reader - Peak Detector Threshold for XOUT"] +pub type PeakdetthresanaR = crate::FieldReader; +impl PeakdetthresanaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PEAKDETTHRESANA_A { + pub const fn variant(&self) -> Peakdetthresana { match self.bits { - 0 => PEAKDETTHRESANA_A::V105MV, - 1 => PEAKDETTHRESANA_A::V132MV, - 2 => PEAKDETTHRESANA_A::V157MV, - 3 => PEAKDETTHRESANA_A::V184MV, - 4 => PEAKDETTHRESANA_A::V210MV, - 5 => PEAKDETTHRESANA_A::V236MV, - 6 => PEAKDETTHRESANA_A::V262MV, - 7 => PEAKDETTHRESANA_A::V289MV, - 8 => PEAKDETTHRESANA_A::V315MV, - 9 => PEAKDETTHRESANA_A::V341MV, - 10 => PEAKDETTHRESANA_A::V367MV, - 11 => PEAKDETTHRESANA_A::V394MV, - 12 => PEAKDETTHRESANA_A::V420MV, - 13 => PEAKDETTHRESANA_A::V446MV, - 14 => PEAKDETTHRESANA_A::V472MV, - 15 => PEAKDETTHRESANA_A::V499MV, + 0 => Peakdetthresana::V105mv, + 1 => Peakdetthresana::V132mv, + 2 => Peakdetthresana::V157mv, + 3 => Peakdetthresana::V184mv, + 4 => Peakdetthresana::V210mv, + 5 => Peakdetthresana::V236mv, + 6 => Peakdetthresana::V262mv, + 7 => Peakdetthresana::V289mv, + 8 => Peakdetthresana::V315mv, + 9 => Peakdetthresana::V341mv, + 10 => Peakdetthresana::V367mv, + 11 => Peakdetthresana::V394mv, + 12 => Peakdetthresana::V420mv, + 13 => Peakdetthresana::V446mv, + 14 => Peakdetthresana::V472mv, + 15 => Peakdetthresana::V499mv, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `V105MV`"] + #[doc = "V105MV"] #[inline(always)] pub fn is_v105mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V105MV + *self == Peakdetthresana::V105mv } - #[doc = "Checks if the value of the field is `V132MV`"] + #[doc = "V132MV"] #[inline(always)] pub fn is_v132mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V132MV + *self == Peakdetthresana::V132mv } - #[doc = "Checks if the value of the field is `V157MV`"] + #[doc = "V157MV"] #[inline(always)] pub fn is_v157mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V157MV + *self == Peakdetthresana::V157mv } - #[doc = "Checks if the value of the field is `V184MV`"] + #[doc = "V184MV"] #[inline(always)] pub fn is_v184mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V184MV + *self == Peakdetthresana::V184mv } - #[doc = "Checks if the value of the field is `V210MV`"] + #[doc = "V210MV"] #[inline(always)] pub fn is_v210mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V210MV + *self == Peakdetthresana::V210mv } - #[doc = "Checks if the value of the field is `V236MV`"] + #[doc = "V236MV"] #[inline(always)] pub fn is_v236mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V236MV + *self == Peakdetthresana::V236mv } - #[doc = "Checks if the value of the field is `V262MV`"] + #[doc = "V262MV"] #[inline(always)] pub fn is_v262mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V262MV + *self == Peakdetthresana::V262mv } - #[doc = "Checks if the value of the field is `V289MV`"] + #[doc = "V289MV"] #[inline(always)] pub fn is_v289mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V289MV + *self == Peakdetthresana::V289mv } - #[doc = "Checks if the value of the field is `V315MV`"] + #[doc = "V315MV"] #[inline(always)] pub fn is_v315mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V315MV + *self == Peakdetthresana::V315mv } - #[doc = "Checks if the value of the field is `V341MV`"] + #[doc = "V341MV"] #[inline(always)] pub fn is_v341mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V341MV + *self == Peakdetthresana::V341mv } - #[doc = "Checks if the value of the field is `V367MV`"] + #[doc = "V367MV"] #[inline(always)] pub fn is_v367mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V367MV + *self == Peakdetthresana::V367mv } - #[doc = "Checks if the value of the field is `V394MV`"] + #[doc = "V394MV"] #[inline(always)] pub fn is_v394mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V394MV + *self == Peakdetthresana::V394mv } - #[doc = "Checks if the value of the field is `V420MV`"] + #[doc = "V420MV"] #[inline(always)] pub fn is_v420mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V420MV + *self == Peakdetthresana::V420mv } - #[doc = "Checks if the value of the field is `V446MV`"] + #[doc = "V446MV"] #[inline(always)] pub fn is_v446mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V446MV + *self == Peakdetthresana::V446mv } - #[doc = "Checks if the value of the field is `V472MV`"] + #[doc = "V472MV"] #[inline(always)] pub fn is_v472mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V472MV + *self == Peakdetthresana::V472mv } - #[doc = "Checks if the value of the field is `V499MV`"] + #[doc = "V499MV"] #[inline(always)] pub fn is_v499mv(&self) -> bool { - *self == PEAKDETTHRESANA_A::V499MV + *self == Peakdetthresana::V499mv } } #[doc = "Field `PEAKDETTHRESANA` writer - Peak Detector Threshold for XOUT"] -pub type PEAKDETTHRESANA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, BUFOUTCTRL_SPEC, u8, PEAKDETTHRESANA_A, 4, O>; -impl<'a, const O: u8> PEAKDETTHRESANA_W<'a, O> { +pub type PeakdetthresanaW<'a, REG> = crate::FieldWriter<'a, REG, 4, Peakdetthresana, crate::Safe>; +impl<'a, REG> PeakdetthresanaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "V105MV"] #[inline(always)] - pub fn v105mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V105MV) + pub fn v105mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V105mv) } #[doc = "V132MV"] #[inline(always)] - pub fn v132mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V132MV) + pub fn v132mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V132mv) } #[doc = "V157MV"] #[inline(always)] - pub fn v157mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V157MV) + pub fn v157mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V157mv) } #[doc = "V184MV"] #[inline(always)] - pub fn v184mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V184MV) + pub fn v184mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V184mv) } #[doc = "V210MV"] #[inline(always)] - pub fn v210mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V210MV) + pub fn v210mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V210mv) } #[doc = "V236MV"] #[inline(always)] - pub fn v236mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V236MV) + pub fn v236mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V236mv) } #[doc = "V262MV"] #[inline(always)] - pub fn v262mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V262MV) + pub fn v262mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V262mv) } #[doc = "V289MV"] #[inline(always)] - pub fn v289mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V289MV) + pub fn v289mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V289mv) } #[doc = "V315MV"] #[inline(always)] - pub fn v315mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V315MV) + pub fn v315mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V315mv) } #[doc = "V341MV"] #[inline(always)] - pub fn v341mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V341MV) + pub fn v341mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V341mv) } #[doc = "V367MV"] #[inline(always)] - pub fn v367mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V367MV) + pub fn v367mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V367mv) } #[doc = "V394MV"] #[inline(always)] - pub fn v394mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V394MV) + pub fn v394mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V394mv) } #[doc = "V420MV"] #[inline(always)] - pub fn v420mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V420MV) + pub fn v420mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V420mv) } #[doc = "V446MV"] #[inline(always)] - pub fn v446mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V446MV) + pub fn v446mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V446mv) } #[doc = "V472MV"] #[inline(always)] - pub fn v472mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V472MV) + pub fn v472mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V472mv) } #[doc = "V499MV"] #[inline(always)] - pub fn v499mv(self) -> &'a mut W { - self.variant(PEAKDETTHRESANA_A::V499MV) + pub fn v499mv(self) -> &'a mut crate::W { + self.variant(Peakdetthresana::V499mv) } } -#[doc = "Field `TIMEOUTCTUNE` reader - Tuning Cap Change Timeout"] -pub type TIMEOUTCTUNE_R = crate::FieldReader; #[doc = "Tuning Cap Change Timeout\n\nValue on reset: 4"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TIMEOUTCTUNE_A { +pub enum Timeoutctune { #[doc = "0: The tuning cap change timeout is set to 2 us minimum. The maximum can be +40%."] - T2US = 0, + T2us = 0, #[doc = "1: The tuning cap change timeout is set to 5 us minimum. The maximum can be +40%."] - T5US = 1, + T5us = 1, #[doc = "2: The tuning cap change timeout is set to 10 us minimum. The maximum can be +40%."] - T10US = 2, + T10us = 2, #[doc = "3: The tuning cap change timeout is set to 16 us minimum. The maximum can be +40%."] - T16US = 3, + T16us = 3, #[doc = "4: The tuning cap change timeout is set to 21 us minimum. The maximum can be +40%."] - T21US = 4, + T21us = 4, #[doc = "5: The tuning cap change timeout is set to 26 us minimum. The maximum can be +40%."] - T26US = 5, + T26us = 5, #[doc = "6: The tuning cap change timeout is set to 31 us minimum. The maximum can be +40%."] - T31US = 6, + T31us = 6, #[doc = "7: The tuning cap change timeout is set to 42 us minimum. The maximum can be +40%."] - T42US = 7, + T42us = 7, #[doc = "8: The tuning cap change timeout is set to 52 us minimum. The maximum can be +40%."] - T52US = 8, + T52us = 8, #[doc = "9: The tuning cap change timeout is set to 63 us minimum. The maximum can be +40%."] - T63US = 9, + T63us = 9, #[doc = "10: The tuning cap change timeout is set to 83 us minimum. The maximum can be +40%."] - T83US = 10, + T83us = 10, #[doc = "11: The tuning cap change timeout is set to 104 us minimum. The maximum can be +40%."] - T104US = 11, + T104us = 11, #[doc = "12: The tuning cap change timeout is set to 208 us minimum. The maximum can be +40%."] - T208US = 12, + T208us = 12, #[doc = "13: The tuning cap change timeout is set to 313 us minimum. The maximum can be +40%."] - T313US = 13, + T313us = 13, #[doc = "14: The tuning cap change timeout is set to 521 us minimum. The maximum can be +40%."] - T521US = 14, + T521us = 14, #[doc = "15: The tuning cap change timeout is set to 938 us minimum. The maximum can be +40%."] - T938US = 15, + T938us = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TIMEOUTCTUNE_A) -> Self { + fn from(variant: Timeoutctune) -> Self { variant as _ } } -impl TIMEOUTCTUNE_R { +impl crate::FieldSpec for Timeoutctune { + type Ux = u8; +} +impl crate::IsEnum for Timeoutctune {} +#[doc = "Field `TIMEOUTCTUNE` reader - Tuning Cap Change Timeout"] +pub type TimeoutctuneR = crate::FieldReader; +impl TimeoutctuneR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TIMEOUTCTUNE_A { + pub const fn variant(&self) -> Timeoutctune { match self.bits { - 0 => TIMEOUTCTUNE_A::T2US, - 1 => TIMEOUTCTUNE_A::T5US, - 2 => TIMEOUTCTUNE_A::T10US, - 3 => TIMEOUTCTUNE_A::T16US, - 4 => TIMEOUTCTUNE_A::T21US, - 5 => TIMEOUTCTUNE_A::T26US, - 6 => TIMEOUTCTUNE_A::T31US, - 7 => TIMEOUTCTUNE_A::T42US, - 8 => TIMEOUTCTUNE_A::T52US, - 9 => TIMEOUTCTUNE_A::T63US, - 10 => TIMEOUTCTUNE_A::T83US, - 11 => TIMEOUTCTUNE_A::T104US, - 12 => TIMEOUTCTUNE_A::T208US, - 13 => TIMEOUTCTUNE_A::T313US, - 14 => TIMEOUTCTUNE_A::T521US, - 15 => TIMEOUTCTUNE_A::T938US, + 0 => Timeoutctune::T2us, + 1 => Timeoutctune::T5us, + 2 => Timeoutctune::T10us, + 3 => Timeoutctune::T16us, + 4 => Timeoutctune::T21us, + 5 => Timeoutctune::T26us, + 6 => Timeoutctune::T31us, + 7 => Timeoutctune::T42us, + 8 => Timeoutctune::T52us, + 9 => Timeoutctune::T63us, + 10 => Timeoutctune::T83us, + 11 => Timeoutctune::T104us, + 12 => Timeoutctune::T208us, + 13 => Timeoutctune::T313us, + 14 => Timeoutctune::T521us, + 15 => Timeoutctune::T938us, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `T2US`"] + #[doc = "The tuning cap change timeout is set to 2 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t2us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T2US + *self == Timeoutctune::T2us } - #[doc = "Checks if the value of the field is `T5US`"] + #[doc = "The tuning cap change timeout is set to 5 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t5us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T5US + *self == Timeoutctune::T5us } - #[doc = "Checks if the value of the field is `T10US`"] + #[doc = "The tuning cap change timeout is set to 10 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t10us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T10US + *self == Timeoutctune::T10us } - #[doc = "Checks if the value of the field is `T16US`"] + #[doc = "The tuning cap change timeout is set to 16 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t16us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T16US + *self == Timeoutctune::T16us } - #[doc = "Checks if the value of the field is `T21US`"] + #[doc = "The tuning cap change timeout is set to 21 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t21us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T21US + *self == Timeoutctune::T21us } - #[doc = "Checks if the value of the field is `T26US`"] + #[doc = "The tuning cap change timeout is set to 26 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t26us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T26US + *self == Timeoutctune::T26us } - #[doc = "Checks if the value of the field is `T31US`"] + #[doc = "The tuning cap change timeout is set to 31 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t31us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T31US + *self == Timeoutctune::T31us } - #[doc = "Checks if the value of the field is `T42US`"] + #[doc = "The tuning cap change timeout is set to 42 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t42us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T42US + *self == Timeoutctune::T42us } - #[doc = "Checks if the value of the field is `T52US`"] + #[doc = "The tuning cap change timeout is set to 52 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t52us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T52US + *self == Timeoutctune::T52us } - #[doc = "Checks if the value of the field is `T63US`"] + #[doc = "The tuning cap change timeout is set to 63 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t63us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T63US + *self == Timeoutctune::T63us } - #[doc = "Checks if the value of the field is `T83US`"] + #[doc = "The tuning cap change timeout is set to 83 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t83us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T83US + *self == Timeoutctune::T83us } - #[doc = "Checks if the value of the field is `T104US`"] + #[doc = "The tuning cap change timeout is set to 104 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t104us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T104US + *self == Timeoutctune::T104us } - #[doc = "Checks if the value of the field is `T208US`"] + #[doc = "The tuning cap change timeout is set to 208 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t208us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T208US + *self == Timeoutctune::T208us } - #[doc = "Checks if the value of the field is `T313US`"] + #[doc = "The tuning cap change timeout is set to 313 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t313us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T313US + *self == Timeoutctune::T313us } - #[doc = "Checks if the value of the field is `T521US`"] + #[doc = "The tuning cap change timeout is set to 521 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t521us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T521US + *self == Timeoutctune::T521us } - #[doc = "Checks if the value of the field is `T938US`"] + #[doc = "The tuning cap change timeout is set to 938 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t938us(&self) -> bool { - *self == TIMEOUTCTUNE_A::T938US + *self == Timeoutctune::T938us } } #[doc = "Field `TIMEOUTCTUNE` writer - Tuning Cap Change Timeout"] -pub type TIMEOUTCTUNE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, BUFOUTCTRL_SPEC, u8, TIMEOUTCTUNE_A, 4, O>; -impl<'a, const O: u8> TIMEOUTCTUNE_W<'a, O> { +pub type TimeoutctuneW<'a, REG> = crate::FieldWriter<'a, REG, 4, Timeoutctune, crate::Safe>; +impl<'a, REG> TimeoutctuneW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The tuning cap change timeout is set to 2 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t2us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T2US) + pub fn t2us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T2us) } #[doc = "The tuning cap change timeout is set to 5 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t5us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T5US) + pub fn t5us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T5us) } #[doc = "The tuning cap change timeout is set to 10 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t10us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T10US) + pub fn t10us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T10us) } #[doc = "The tuning cap change timeout is set to 16 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t16us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T16US) + pub fn t16us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T16us) } #[doc = "The tuning cap change timeout is set to 21 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t21us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T21US) + pub fn t21us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T21us) } #[doc = "The tuning cap change timeout is set to 26 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t26us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T26US) + pub fn t26us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T26us) } #[doc = "The tuning cap change timeout is set to 31 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t31us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T31US) + pub fn t31us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T31us) } #[doc = "The tuning cap change timeout is set to 42 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t42us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T42US) + pub fn t42us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T42us) } #[doc = "The tuning cap change timeout is set to 52 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t52us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T52US) + pub fn t52us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T52us) } #[doc = "The tuning cap change timeout is set to 63 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t63us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T63US) + pub fn t63us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T63us) } #[doc = "The tuning cap change timeout is set to 83 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t83us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T83US) + pub fn t83us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T83us) } #[doc = "The tuning cap change timeout is set to 104 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t104us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T104US) + pub fn t104us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T104us) } #[doc = "The tuning cap change timeout is set to 208 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t208us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T208US) + pub fn t208us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T208us) } #[doc = "The tuning cap change timeout is set to 313 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t313us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T313US) + pub fn t313us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T313us) } #[doc = "The tuning cap change timeout is set to 521 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t521us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T521US) + pub fn t521us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T521us) } #[doc = "The tuning cap change timeout is set to 938 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t938us(self) -> &'a mut W { - self.variant(TIMEOUTCTUNE_A::T938US) + pub fn t938us(self) -> &'a mut crate::W { + self.variant(Timeoutctune::T938us) } } -#[doc = "Field `TIMEOUTSTARTUP` reader - Oscillator Startup Timeout"] -pub type TIMEOUTSTARTUP_R = crate::FieldReader; #[doc = "Oscillator Startup Timeout\n\nValue on reset: 6"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TIMEOUTSTARTUP_A { +pub enum Timeoutstartup { #[doc = "0: The oscillator startup timeout is set to 42 us minimum. The maximum can be +40%."] - T42US = 0, + T42us = 0, #[doc = "1: The oscillator startup timeout is set to 83 us minimum. The maximum can be +40%."] - T83US = 1, + T83us = 1, #[doc = "2: The oscillator startup timeout is set to 108 us minimum. The maximum can be +40%."] - T108US = 2, + T108us = 2, #[doc = "3: The oscillator startup timeout is set to 133 us minimum. The maximum can be +40%."] - T133US = 3, + T133us = 3, #[doc = "4: The oscillator startup timeout is set to 158 us minimum. The maximum can be +40%."] - T158US = 4, + T158us = 4, #[doc = "5: The oscillator startup timeout is set to 183 us minimum. The maximum can be +40%."] - T183US = 5, + T183us = 5, #[doc = "6: The oscillator startup timeout is set to 208 us minimum. The maximum can be +40%."] - T208US = 6, + T208us = 6, #[doc = "7: The oscillator startup timeout is set to 233 us minimum. The maximum can be +40%."] - T233US = 7, + T233us = 7, #[doc = "8: The oscillator startup timeout is set to 258 us minimum. The maximum can be +40%."] - T258US = 8, + T258us = 8, #[doc = "9: The oscillator startup timeout is set to 283 us minimum. The maximum can be +40%."] - T283US = 9, + T283us = 9, #[doc = "10: The oscillator startup timeout is set to 333 us minimum. The maximum can be +40%."] - T333US = 10, + T333us = 10, #[doc = "11: The oscillator startup timeout is set to 375 us minimum. The maximum can be +40%."] - T375US = 11, + T375us = 11, #[doc = "12: The oscillator startup timeout is set to 417 us minimum. The maximum can be +40%."] - T417US = 12, + T417us = 12, #[doc = "13: The oscillator startup timeout is set to 458 us minimum. The maximum can be +40%."] - T458US = 13, + T458us = 13, #[doc = "14: The oscillator startup timeout is set to 500 us minimum. The maximum can be +40%."] - T500US = 14, + T500us = 14, #[doc = "15: The oscillator startup timeout is set to 667 us minimum. The maximum can be +40%."] - T667US = 15, + T667us = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TIMEOUTSTARTUP_A) -> Self { + fn from(variant: Timeoutstartup) -> Self { variant as _ } } -impl TIMEOUTSTARTUP_R { +impl crate::FieldSpec for Timeoutstartup { + type Ux = u8; +} +impl crate::IsEnum for Timeoutstartup {} +#[doc = "Field `TIMEOUTSTARTUP` reader - Oscillator Startup Timeout"] +pub type TimeoutstartupR = crate::FieldReader; +impl TimeoutstartupR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TIMEOUTSTARTUP_A { + pub const fn variant(&self) -> Timeoutstartup { match self.bits { - 0 => TIMEOUTSTARTUP_A::T42US, - 1 => TIMEOUTSTARTUP_A::T83US, - 2 => TIMEOUTSTARTUP_A::T108US, - 3 => TIMEOUTSTARTUP_A::T133US, - 4 => TIMEOUTSTARTUP_A::T158US, - 5 => TIMEOUTSTARTUP_A::T183US, - 6 => TIMEOUTSTARTUP_A::T208US, - 7 => TIMEOUTSTARTUP_A::T233US, - 8 => TIMEOUTSTARTUP_A::T258US, - 9 => TIMEOUTSTARTUP_A::T283US, - 10 => TIMEOUTSTARTUP_A::T333US, - 11 => TIMEOUTSTARTUP_A::T375US, - 12 => TIMEOUTSTARTUP_A::T417US, - 13 => TIMEOUTSTARTUP_A::T458US, - 14 => TIMEOUTSTARTUP_A::T500US, - 15 => TIMEOUTSTARTUP_A::T667US, + 0 => Timeoutstartup::T42us, + 1 => Timeoutstartup::T83us, + 2 => Timeoutstartup::T108us, + 3 => Timeoutstartup::T133us, + 4 => Timeoutstartup::T158us, + 5 => Timeoutstartup::T183us, + 6 => Timeoutstartup::T208us, + 7 => Timeoutstartup::T233us, + 8 => Timeoutstartup::T258us, + 9 => Timeoutstartup::T283us, + 10 => Timeoutstartup::T333us, + 11 => Timeoutstartup::T375us, + 12 => Timeoutstartup::T417us, + 13 => Timeoutstartup::T458us, + 14 => Timeoutstartup::T500us, + 15 => Timeoutstartup::T667us, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `T42US`"] + #[doc = "The oscillator startup timeout is set to 42 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t42us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T42US + *self == Timeoutstartup::T42us } - #[doc = "Checks if the value of the field is `T83US`"] + #[doc = "The oscillator startup timeout is set to 83 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t83us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T83US + *self == Timeoutstartup::T83us } - #[doc = "Checks if the value of the field is `T108US`"] + #[doc = "The oscillator startup timeout is set to 108 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t108us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T108US + *self == Timeoutstartup::T108us } - #[doc = "Checks if the value of the field is `T133US`"] + #[doc = "The oscillator startup timeout is set to 133 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t133us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T133US + *self == Timeoutstartup::T133us } - #[doc = "Checks if the value of the field is `T158US`"] + #[doc = "The oscillator startup timeout is set to 158 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t158us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T158US + *self == Timeoutstartup::T158us } - #[doc = "Checks if the value of the field is `T183US`"] + #[doc = "The oscillator startup timeout is set to 183 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t183us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T183US + *self == Timeoutstartup::T183us } - #[doc = "Checks if the value of the field is `T208US`"] + #[doc = "The oscillator startup timeout is set to 208 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t208us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T208US + *self == Timeoutstartup::T208us } - #[doc = "Checks if the value of the field is `T233US`"] + #[doc = "The oscillator startup timeout is set to 233 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t233us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T233US + *self == Timeoutstartup::T233us } - #[doc = "Checks if the value of the field is `T258US`"] + #[doc = "The oscillator startup timeout is set to 258 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t258us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T258US + *self == Timeoutstartup::T258us } - #[doc = "Checks if the value of the field is `T283US`"] + #[doc = "The oscillator startup timeout is set to 283 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t283us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T283US + *self == Timeoutstartup::T283us } - #[doc = "Checks if the value of the field is `T333US`"] + #[doc = "The oscillator startup timeout is set to 333 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t333us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T333US + *self == Timeoutstartup::T333us } - #[doc = "Checks if the value of the field is `T375US`"] + #[doc = "The oscillator startup timeout is set to 375 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t375us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T375US + *self == Timeoutstartup::T375us } - #[doc = "Checks if the value of the field is `T417US`"] + #[doc = "The oscillator startup timeout is set to 417 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t417us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T417US + *self == Timeoutstartup::T417us } - #[doc = "Checks if the value of the field is `T458US`"] + #[doc = "The oscillator startup timeout is set to 458 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t458us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T458US + *self == Timeoutstartup::T458us } - #[doc = "Checks if the value of the field is `T500US`"] + #[doc = "The oscillator startup timeout is set to 500 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t500us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T500US + *self == Timeoutstartup::T500us } - #[doc = "Checks if the value of the field is `T667US`"] + #[doc = "The oscillator startup timeout is set to 667 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t667us(&self) -> bool { - *self == TIMEOUTSTARTUP_A::T667US + *self == Timeoutstartup::T667us } } #[doc = "Field `TIMEOUTSTARTUP` writer - Oscillator Startup Timeout"] -pub type TIMEOUTSTARTUP_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, BUFOUTCTRL_SPEC, u8, TIMEOUTSTARTUP_A, 4, O>; -impl<'a, const O: u8> TIMEOUTSTARTUP_W<'a, O> { +pub type TimeoutstartupW<'a, REG> = crate::FieldWriter<'a, REG, 4, Timeoutstartup, crate::Safe>; +impl<'a, REG> TimeoutstartupW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The oscillator startup timeout is set to 42 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t42us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T42US) + pub fn t42us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T42us) } #[doc = "The oscillator startup timeout is set to 83 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t83us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T83US) + pub fn t83us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T83us) } #[doc = "The oscillator startup timeout is set to 108 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t108us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T108US) + pub fn t108us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T108us) } #[doc = "The oscillator startup timeout is set to 133 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t133us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T133US) + pub fn t133us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T133us) } #[doc = "The oscillator startup timeout is set to 158 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t158us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T158US) + pub fn t158us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T158us) } #[doc = "The oscillator startup timeout is set to 183 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t183us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T183US) + pub fn t183us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T183us) } #[doc = "The oscillator startup timeout is set to 208 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t208us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T208US) + pub fn t208us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T208us) } #[doc = "The oscillator startup timeout is set to 233 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t233us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T233US) + pub fn t233us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T233us) } #[doc = "The oscillator startup timeout is set to 258 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t258us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T258US) + pub fn t258us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T258us) } #[doc = "The oscillator startup timeout is set to 283 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t283us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T283US) + pub fn t283us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T283us) } #[doc = "The oscillator startup timeout is set to 333 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t333us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T333US) + pub fn t333us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T333us) } #[doc = "The oscillator startup timeout is set to 375 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t375us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T375US) + pub fn t375us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T375us) } #[doc = "The oscillator startup timeout is set to 417 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t417us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T417US) + pub fn t417us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T417us) } #[doc = "The oscillator startup timeout is set to 458 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t458us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T458US) + pub fn t458us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T458us) } #[doc = "The oscillator startup timeout is set to 500 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t500us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T500US) + pub fn t500us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T500us) } #[doc = "The oscillator startup timeout is set to 667 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t667us(self) -> &'a mut W { - self.variant(TIMEOUTSTARTUP_A::T667US) + pub fn t667us(self) -> &'a mut crate::W { + self.variant(Timeoutstartup::T667us) } } #[doc = "Field `MINIMUMSTARTUPDELAY` reader - Minimum Startup Delay"] -pub type MINIMUMSTARTUPDELAY_R = crate::BitReader; +pub type MinimumstartupdelayR = crate::BitReader; #[doc = "Field `MINIMUMSTARTUPDELAY` writer - Minimum Startup Delay"] -pub type MINIMUMSTARTUPDELAY_W<'a, const O: u8> = - crate::BitWriter<'a, u32, BUFOUTCTRL_SPEC, bool, O>; +pub type MinimumstartupdelayW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Driver Bias Current"] #[inline(always)] - pub fn xoutbiasana(&self) -> XOUTBIASANA_R { - XOUTBIASANA_R::new((self.bits & 0x0f) as u8) + pub fn xoutbiasana(&self) -> XoutbiasanaR { + XoutbiasanaR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Buffer Gain"] #[inline(always)] - pub fn xoutcfana(&self) -> XOUTCFANA_R { - XOUTCFANA_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn xoutcfana(&self) -> XoutcfanaR { + XoutcfanaR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - No Description"] #[inline(always)] - pub fn xoutgmana(&self) -> XOUTGMANA_R { - XOUTGMANA_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn xoutgmana(&self) -> XoutgmanaR { + XoutgmanaR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Peak Detector Threshold for XOUT"] #[inline(always)] - pub fn peakdetthresana(&self) -> PEAKDETTHRESANA_R { - PEAKDETTHRESANA_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn peakdetthresana(&self) -> PeakdetthresanaR { + PeakdetthresanaR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:19 - Tuning Cap Change Timeout"] #[inline(always)] - pub fn timeoutctune(&self) -> TIMEOUTCTUNE_R { - TIMEOUTCTUNE_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn timeoutctune(&self) -> TimeoutctuneR { + TimeoutctuneR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:23 - Oscillator Startup Timeout"] #[inline(always)] - pub fn timeoutstartup(&self) -> TIMEOUTSTARTUP_R { - TIMEOUTSTARTUP_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn timeoutstartup(&self) -> TimeoutstartupR { + TimeoutstartupR::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bit 31 - Minimum Startup Delay"] #[inline(always)] - pub fn minimumstartupdelay(&self) -> MINIMUMSTARTUPDELAY_R { - MINIMUMSTARTUPDELAY_R::new(((self.bits >> 31) & 1) != 0) + pub fn minimumstartupdelay(&self) -> MinimumstartupdelayR { + MinimumstartupdelayR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Driver Bias Current"] #[inline(always)] #[must_use] - pub fn xoutbiasana(&mut self) -> XOUTBIASANA_W<0> { - XOUTBIASANA_W::new(self) + pub fn xoutbiasana(&mut self) -> XoutbiasanaW { + XoutbiasanaW::new(self, 0) } #[doc = "Bits 4:7 - Buffer Gain"] #[inline(always)] #[must_use] - pub fn xoutcfana(&mut self) -> XOUTCFANA_W<4> { - XOUTCFANA_W::new(self) + pub fn xoutcfana(&mut self) -> XoutcfanaW { + XoutcfanaW::new(self, 4) } #[doc = "Bits 8:11 - No Description"] #[inline(always)] #[must_use] - pub fn xoutgmana(&mut self) -> XOUTGMANA_W<8> { - XOUTGMANA_W::new(self) + pub fn xoutgmana(&mut self) -> XoutgmanaW { + XoutgmanaW::new(self, 8) } #[doc = "Bits 12:15 - Peak Detector Threshold for XOUT"] #[inline(always)] #[must_use] - pub fn peakdetthresana(&mut self) -> PEAKDETTHRESANA_W<12> { - PEAKDETTHRESANA_W::new(self) + pub fn peakdetthresana(&mut self) -> PeakdetthresanaW { + PeakdetthresanaW::new(self, 12) } #[doc = "Bits 16:19 - Tuning Cap Change Timeout"] #[inline(always)] #[must_use] - pub fn timeoutctune(&mut self) -> TIMEOUTCTUNE_W<16> { - TIMEOUTCTUNE_W::new(self) + pub fn timeoutctune(&mut self) -> TimeoutctuneW { + TimeoutctuneW::new(self, 16) } #[doc = "Bits 20:23 - Oscillator Startup Timeout"] #[inline(always)] #[must_use] - pub fn timeoutstartup(&mut self) -> TIMEOUTSTARTUP_W<20> { - TIMEOUTSTARTUP_W::new(self) + pub fn timeoutstartup(&mut self) -> TimeoutstartupW { + TimeoutstartupW::new(self, 20) } #[doc = "Bit 31 - Minimum Startup Delay"] #[inline(always)] #[must_use] - pub fn minimumstartupdelay(&mut self) -> MINIMUMSTARTUPDELAY_W<31> { - MINIMUMSTARTUPDELAY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn minimumstartupdelay(&mut self) -> MinimumstartupdelayW { + MinimumstartupdelayW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bufoutctrl](index.html) module"] -pub struct BUFOUTCTRL_SPEC; -impl crate::RegisterSpec for BUFOUTCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bufoutctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bufoutctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct BufoutctrlSpec; +impl crate::RegisterSpec for BufoutctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [bufoutctrl::R](R) reader structure"] -impl crate::Readable for BUFOUTCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [bufoutctrl::W](W) writer structure"] -impl crate::Writable for BUFOUTCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`bufoutctrl::R`](R) reader structure"] +impl crate::Readable for BufoutctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`bufoutctrl::W`](W) writer structure"] +impl crate::Writable for BufoutctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BUFOUTCTRL to value 0x0064_3c15"] -impl crate::Resettable for BUFOUTCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0064_3c15; +impl crate::Resettable for BufoutctrlSpec { + const RESET_VALUE: u32 = 0x0064_3c15; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/bufouttrim.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/bufouttrim.rs index 73684b9..e6a3ad3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/bufouttrim.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/bufouttrim.rs @@ -1,80 +1,40 @@ #[doc = "Register `BUFOUTTRIM` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `BUFOUTTRIM` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `VTRTRIMANA` reader - BUFOUT Reference Trim"] -pub type VTRTRIMANA_R = crate::FieldReader; +pub type VtrtrimanaR = crate::FieldReader; #[doc = "Field `VTRTRIMANA` writer - BUFOUT Reference Trim"] -pub type VTRTRIMANA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BUFOUTTRIM_SPEC, u8, u8, 4, O>; +pub type VtrtrimanaW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - BUFOUT Reference Trim"] #[inline(always)] - pub fn vtrtrimana(&self) -> VTRTRIMANA_R { - VTRTRIMANA_R::new((self.bits & 0x0f) as u8) + pub fn vtrtrimana(&self) -> VtrtrimanaR { + VtrtrimanaR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - BUFOUT Reference Trim"] #[inline(always)] #[must_use] - pub fn vtrtrimana(&mut self) -> VTRTRIMANA_W<0> { - VTRTRIMANA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn vtrtrimana(&mut self) -> VtrtrimanaW { + VtrtrimanaW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bufouttrim](index.html) module"] -pub struct BUFOUTTRIM_SPEC; -impl crate::RegisterSpec for BUFOUTTRIM_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bufouttrim::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bufouttrim::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct BufouttrimSpec; +impl crate::RegisterSpec for BufouttrimSpec { type Ux = u32; } -#[doc = "`read()` method returns [bufouttrim::R](R) reader structure"] -impl crate::Readable for BUFOUTTRIM_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [bufouttrim::W](W) writer structure"] -impl crate::Writable for BUFOUTTRIM_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`bufouttrim::R`](R) reader structure"] +impl crate::Readable for BufouttrimSpec {} +#[doc = "`write(|w| ..)` method takes [`bufouttrim::W`](W) writer structure"] +impl crate::Writable for BufouttrimSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BUFOUTTRIM to value 0x08"] -impl crate::Resettable for BUFOUTTRIM_SPEC { - const RESET_VALUE: Self::Ux = 0x08; +impl crate::Resettable for BufouttrimSpec { + const RESET_VALUE: u32 = 0x08; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/cfg.rs index cdb8314..1d5b20f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/cfg.rs @@ -1,233 +1,203 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - Crystal Oscillator Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Crystal Oscillator Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: crystal oscillator"] - XTAL = 0, + Xtal = 0, #[doc = "1: external sinusoidal clock can be supplied on XI pin."] - EXTCLK = 1, + Extclk = 1, #[doc = "2: external sinusoidal clock can be supplied on XI pin (peak detector used)."] - EXTCLKPKDET = 2, + Extclkpkdet = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - Crystal Oscillator Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(MODE_A::XTAL), - 1 => Some(MODE_A::EXTCLK), - 2 => Some(MODE_A::EXTCLKPKDET), + 0 => Some(Mode::Xtal), + 1 => Some(Mode::Extclk), + 2 => Some(Mode::Extclkpkdet), _ => None, } } - #[doc = "Checks if the value of the field is `XTAL`"] + #[doc = "crystal oscillator"] #[inline(always)] pub fn is_xtal(&self) -> bool { - *self == MODE_A::XTAL + *self == Mode::Xtal } - #[doc = "Checks if the value of the field is `EXTCLK`"] + #[doc = "external sinusoidal clock can be supplied on XI pin."] #[inline(always)] pub fn is_extclk(&self) -> bool { - *self == MODE_A::EXTCLK + *self == Mode::Extclk } - #[doc = "Checks if the value of the field is `EXTCLKPKDET`"] + #[doc = "external sinusoidal clock can be supplied on XI pin (peak detector used)."] #[inline(always)] pub fn is_extclkpkdet(&self) -> bool { - *self == MODE_A::EXTCLKPKDET + *self == Mode::Extclkpkdet } } #[doc = "Field `MODE` writer - Crystal Oscillator Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "crystal oscillator"] #[inline(always)] - pub fn xtal(self) -> &'a mut W { - self.variant(MODE_A::XTAL) + pub fn xtal(self) -> &'a mut crate::W { + self.variant(Mode::Xtal) } #[doc = "external sinusoidal clock can be supplied on XI pin."] #[inline(always)] - pub fn extclk(self) -> &'a mut W { - self.variant(MODE_A::EXTCLK) + pub fn extclk(self) -> &'a mut crate::W { + self.variant(Mode::Extclk) } #[doc = "external sinusoidal clock can be supplied on XI pin (peak detector used)."] #[inline(always)] - pub fn extclkpkdet(self) -> &'a mut W { - self.variant(MODE_A::EXTCLKPKDET) + pub fn extclkpkdet(self) -> &'a mut crate::W { + self.variant(Mode::Extclkpkdet) } } #[doc = "Field `ENXIDCBIASANA` reader - Enable XI Internal DC Bias"] -pub type ENXIDCBIASANA_R = crate::BitReader; +pub type EnxidcbiasanaR = crate::BitReader; #[doc = "Field `ENXIDCBIASANA` writer - Enable XI Internal DC Bias"] -pub type ENXIDCBIASANA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `SQBUFSCHTRGANA` reader - Squaring Buffer Schmitt Trigger"] -pub type SQBUFSCHTRGANA_R = crate::BitReader; +pub type EnxidcbiasanaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Squaring Buffer Schmitt Trigger\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SQBUFSCHTRGANA_A { +pub enum Sqbufschtrgana { #[doc = "0: Squaring buffer schmitt trigger is disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Squaring buffer schmitt trigger is enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SQBUFSCHTRGANA_A) -> Self { + fn from(variant: Sqbufschtrgana) -> Self { variant as u8 != 0 } } -impl SQBUFSCHTRGANA_R { +#[doc = "Field `SQBUFSCHTRGANA` reader - Squaring Buffer Schmitt Trigger"] +pub type SqbufschtrganaR = crate::BitReader; +impl SqbufschtrganaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SQBUFSCHTRGANA_A { + pub const fn variant(&self) -> Sqbufschtrgana { match self.bits { - false => SQBUFSCHTRGANA_A::DISABLE, - true => SQBUFSCHTRGANA_A::ENABLE, + false => Sqbufschtrgana::Disable, + true => Sqbufschtrgana::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Squaring buffer schmitt trigger is disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == SQBUFSCHTRGANA_A::DISABLE + *self == Sqbufschtrgana::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Squaring buffer schmitt trigger is enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == SQBUFSCHTRGANA_A::ENABLE + *self == Sqbufschtrgana::Enable } } #[doc = "Field `SQBUFSCHTRGANA` writer - Squaring Buffer Schmitt Trigger"] -pub type SQBUFSCHTRGANA_W<'a, const O: u8> = - crate::BitWriter<'a, u32, CFG_SPEC, SQBUFSCHTRGANA_A, O>; -impl<'a, const O: u8> SQBUFSCHTRGANA_W<'a, O> { +pub type SqbufschtrganaW<'a, REG> = crate::BitWriter<'a, REG, Sqbufschtrgana>; +impl<'a, REG> SqbufschtrganaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Squaring buffer schmitt trigger is disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(SQBUFSCHTRGANA_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Sqbufschtrgana::Disable) } #[doc = "Squaring buffer schmitt trigger is enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(SQBUFSCHTRGANA_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Sqbufschtrgana::Enable) } } #[doc = "Field `FORCELFTIMEOUT` reader - Force Low Frequency Timeout"] -pub type FORCELFTIMEOUT_R = crate::BitReader; +pub type ForcelftimeoutR = crate::BitReader; #[doc = "Field `FORCELFTIMEOUT` writer - Force Low Frequency Timeout"] -pub type FORCELFTIMEOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type ForcelftimeoutW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - Crystal Oscillator Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 2 - Enable XI Internal DC Bias"] #[inline(always)] - pub fn enxidcbiasana(&self) -> ENXIDCBIASANA_R { - ENXIDCBIASANA_R::new(((self.bits >> 2) & 1) != 0) + pub fn enxidcbiasana(&self) -> EnxidcbiasanaR { + EnxidcbiasanaR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Squaring Buffer Schmitt Trigger"] #[inline(always)] - pub fn sqbufschtrgana(&self) -> SQBUFSCHTRGANA_R { - SQBUFSCHTRGANA_R::new(((self.bits >> 3) & 1) != 0) + pub fn sqbufschtrgana(&self) -> SqbufschtrganaR { + SqbufschtrganaR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 28 - Force Low Frequency Timeout"] #[inline(always)] - pub fn forcelftimeout(&self) -> FORCELFTIMEOUT_R { - FORCELFTIMEOUT_R::new(((self.bits >> 28) & 1) != 0) + pub fn forcelftimeout(&self) -> ForcelftimeoutR { + ForcelftimeoutR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Crystal Oscillator Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 2 - Enable XI Internal DC Bias"] #[inline(always)] #[must_use] - pub fn enxidcbiasana(&mut self) -> ENXIDCBIASANA_W<2> { - ENXIDCBIASANA_W::new(self) + pub fn enxidcbiasana(&mut self) -> EnxidcbiasanaW { + EnxidcbiasanaW::new(self, 2) } #[doc = "Bit 3 - Squaring Buffer Schmitt Trigger"] #[inline(always)] #[must_use] - pub fn sqbufschtrgana(&mut self) -> SQBUFSCHTRGANA_W<3> { - SQBUFSCHTRGANA_W::new(self) + pub fn sqbufschtrgana(&mut self) -> SqbufschtrganaW { + SqbufschtrganaW::new(self, 3) } #[doc = "Bit 28 - Force Low Frequency Timeout"] #[inline(always)] #[must_use] - pub fn forcelftimeout(&mut self) -> FORCELFTIMEOUT_W<28> { - FORCELFTIMEOUT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn forcelftimeout(&mut self) -> ForcelftimeoutW { + ForcelftimeoutW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0x1000_0000"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x1000_0000; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0x1000_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/cmd.rs index 936a31f..78aeefb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/cmd.rs @@ -1,52 +1,27 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `COREBIASOPT` writer - Core Bias Optimizaton"] -pub type COREBIASOPT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type CorebiasoptW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Core Bias Optimizaton"] #[inline(always)] #[must_use] - pub fn corebiasopt(&mut self) -> COREBIASOPT_W<0> { - COREBIASOPT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn corebiasopt(&mut self) -> CorebiasoptW { + CorebiasoptW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/ctrl.rs index 0ea1c39..51419ea 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/ctrl.rs @@ -1,649 +1,627 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `BUFOUTFREEZE` reader - Freeze BUFOUT Controls"] -pub type BUFOUTFREEZE_R = crate::BitReader; +pub type BufoutfreezeR = crate::BitReader; #[doc = "Field `BUFOUTFREEZE` writer - Freeze BUFOUT Controls"] -pub type BUFOUTFREEZE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type BufoutfreezeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `KEEPWARM` reader - Keep Warm"] -pub type KEEPWARM_R = crate::BitReader; +pub type KeepwarmR = crate::BitReader; #[doc = "Field `KEEPWARM` writer - Keep Warm"] -pub type KEEPWARM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type KeepwarmW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM23ONDEMAND` reader - On-demand During EM23"] -pub type EM23ONDEMAND_R = crate::BitReader; +pub type Em23ondemandR = crate::BitReader; #[doc = "Field `EM23ONDEMAND` writer - On-demand During EM23"] -pub type EM23ONDEMAND_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; -#[doc = "Field `FORCEXI2GNDANA` reader - Force XI Pin to Ground"] -pub type FORCEXI2GNDANA_R = crate::BitReader; +pub type Em23ondemandW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Force XI Pin to Ground\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FORCEXI2GNDANA_A { +pub enum Forcexi2gndana { #[doc = "0: Disabled (not pulled)"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enabled (pulled)"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FORCEXI2GNDANA_A) -> Self { + fn from(variant: Forcexi2gndana) -> Self { variant as u8 != 0 } } -impl FORCEXI2GNDANA_R { +#[doc = "Field `FORCEXI2GNDANA` reader - Force XI Pin to Ground"] +pub type Forcexi2gndanaR = crate::BitReader; +impl Forcexi2gndanaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FORCEXI2GNDANA_A { + pub const fn variant(&self) -> Forcexi2gndana { match self.bits { - false => FORCEXI2GNDANA_A::DISABLE, - true => FORCEXI2GNDANA_A::ENABLE, + false => Forcexi2gndana::Disable, + true => Forcexi2gndana::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disabled (not pulled)"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FORCEXI2GNDANA_A::DISABLE + *self == Forcexi2gndana::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enabled (pulled)"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FORCEXI2GNDANA_A::ENABLE + *self == Forcexi2gndana::Enable } } #[doc = "Field `FORCEXI2GNDANA` writer - Force XI Pin to Ground"] -pub type FORCEXI2GNDANA_W<'a, const O: u8> = - crate::BitWriter<'a, u32, CTRL_SPEC, FORCEXI2GNDANA_A, O>; -impl<'a, const O: u8> FORCEXI2GNDANA_W<'a, O> { +pub type Forcexi2gndanaW<'a, REG> = crate::BitWriter<'a, REG, Forcexi2gndana>; +impl<'a, REG> Forcexi2gndanaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disabled (not pulled)"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FORCEXI2GNDANA_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Forcexi2gndana::Disable) } #[doc = "Enabled (pulled)"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FORCEXI2GNDANA_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Forcexi2gndana::Enable) } } -#[doc = "Field `FORCEXO2GNDANA` reader - Force XO Pin to Ground"] -pub type FORCEXO2GNDANA_R = crate::BitReader; #[doc = "Force XO Pin to Ground\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FORCEXO2GNDANA_A { +pub enum Forcexo2gndana { #[doc = "0: Disabled (not pulled)"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enabled (pulled)"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FORCEXO2GNDANA_A) -> Self { + fn from(variant: Forcexo2gndana) -> Self { variant as u8 != 0 } } -impl FORCEXO2GNDANA_R { +#[doc = "Field `FORCEXO2GNDANA` reader - Force XO Pin to Ground"] +pub type Forcexo2gndanaR = crate::BitReader; +impl Forcexo2gndanaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FORCEXO2GNDANA_A { + pub const fn variant(&self) -> Forcexo2gndana { match self.bits { - false => FORCEXO2GNDANA_A::DISABLE, - true => FORCEXO2GNDANA_A::ENABLE, + false => Forcexo2gndana::Disable, + true => Forcexo2gndana::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disabled (not pulled)"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FORCEXO2GNDANA_A::DISABLE + *self == Forcexo2gndana::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enabled (pulled)"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FORCEXO2GNDANA_A::ENABLE + *self == Forcexo2gndana::Enable } } #[doc = "Field `FORCEXO2GNDANA` writer - Force XO Pin to Ground"] -pub type FORCEXO2GNDANA_W<'a, const O: u8> = - crate::BitWriter<'a, u32, CTRL_SPEC, FORCEXO2GNDANA_A, O>; -impl<'a, const O: u8> FORCEXO2GNDANA_W<'a, O> { +pub type Forcexo2gndanaW<'a, REG> = crate::BitWriter<'a, REG, Forcexo2gndana>; +impl<'a, REG> Forcexo2gndanaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disabled (not pulled)"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FORCEXO2GNDANA_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Forcexo2gndana::Disable) } #[doc = "Enabled (pulled)"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FORCEXO2GNDANA_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Forcexo2gndana::Enable) } } #[doc = "Field `FORCECTUNEMAX` reader - Force Tuning Cap to Max Value"] -pub type FORCECTUNEMAX_R = crate::BitReader; +pub type ForcectunemaxR = crate::BitReader; #[doc = "Field `FORCECTUNEMAX` writer - Force Tuning Cap to Max Value"] -pub type FORCECTUNEMAX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; -#[doc = "Field `PRSSTATUSSEL0` reader - PRS Status 0 Output Select"] -pub type PRSSTATUSSEL0_R = crate::FieldReader; +pub type ForcectunemaxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "PRS Status 0 Output Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PRSSTATUSSEL0_A { +pub enum Prsstatussel0 { #[doc = "0: PRS mux outputs 0"] - DISABLED = 0, + Disabled = 0, #[doc = "1: PRS mux outputs enabled status"] - ENS = 1, + Ens = 1, #[doc = "2: PRS mux outputs core bias optimization ready status"] - COREBIASOPTRDY = 2, + Corebiasoptrdy = 2, #[doc = "3: PRS mux outputs ready status"] - RDY = 3, + Rdy = 3, #[doc = "4: PRS mux outputs PRS ready status"] - PRSRDY = 4, + Prsrdy = 4, #[doc = "5: PRS mux outputs BUFOUT ready status"] - BUFOUTRDY = 5, + Bufoutrdy = 5, #[doc = "8: PRS mux outputs oscillator requested by digital clock status"] - HWREQ = 8, + Hwreq = 8, #[doc = "9: PRS mux outputs oscillator requested by PRS request status"] - PRSHWREQ = 9, + Prshwreq = 9, #[doc = "10: PRS mux outputs oscillator requested by BUFOUT request status"] - BUFOUTHWREQ = 10, + Bufouthwreq = 10, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PRSSTATUSSEL0_A) -> Self { + fn from(variant: Prsstatussel0) -> Self { variant as _ } } -impl PRSSTATUSSEL0_R { +impl crate::FieldSpec for Prsstatussel0 { + type Ux = u8; +} +impl crate::IsEnum for Prsstatussel0 {} +#[doc = "Field `PRSSTATUSSEL0` reader - PRS Status 0 Output Select"] +pub type Prsstatussel0R = crate::FieldReader; +impl Prsstatussel0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PRSSTATUSSEL0_A::DISABLED), - 1 => Some(PRSSTATUSSEL0_A::ENS), - 2 => Some(PRSSTATUSSEL0_A::COREBIASOPTRDY), - 3 => Some(PRSSTATUSSEL0_A::RDY), - 4 => Some(PRSSTATUSSEL0_A::PRSRDY), - 5 => Some(PRSSTATUSSEL0_A::BUFOUTRDY), - 8 => Some(PRSSTATUSSEL0_A::HWREQ), - 9 => Some(PRSSTATUSSEL0_A::PRSHWREQ), - 10 => Some(PRSSTATUSSEL0_A::BUFOUTHWREQ), + 0 => Some(Prsstatussel0::Disabled), + 1 => Some(Prsstatussel0::Ens), + 2 => Some(Prsstatussel0::Corebiasoptrdy), + 3 => Some(Prsstatussel0::Rdy), + 4 => Some(Prsstatussel0::Prsrdy), + 5 => Some(Prsstatussel0::Bufoutrdy), + 8 => Some(Prsstatussel0::Hwreq), + 9 => Some(Prsstatussel0::Prshwreq), + 10 => Some(Prsstatussel0::Bufouthwreq), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "PRS mux outputs 0"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == PRSSTATUSSEL0_A::DISABLED + *self == Prsstatussel0::Disabled } - #[doc = "Checks if the value of the field is `ENS`"] + #[doc = "PRS mux outputs enabled status"] #[inline(always)] pub fn is_ens(&self) -> bool { - *self == PRSSTATUSSEL0_A::ENS + *self == Prsstatussel0::Ens } - #[doc = "Checks if the value of the field is `COREBIASOPTRDY`"] + #[doc = "PRS mux outputs core bias optimization ready status"] #[inline(always)] pub fn is_corebiasoptrdy(&self) -> bool { - *self == PRSSTATUSSEL0_A::COREBIASOPTRDY + *self == Prsstatussel0::Corebiasoptrdy } - #[doc = "Checks if the value of the field is `RDY`"] + #[doc = "PRS mux outputs ready status"] #[inline(always)] pub fn is_rdy(&self) -> bool { - *self == PRSSTATUSSEL0_A::RDY + *self == Prsstatussel0::Rdy } - #[doc = "Checks if the value of the field is `PRSRDY`"] + #[doc = "PRS mux outputs PRS ready status"] #[inline(always)] pub fn is_prsrdy(&self) -> bool { - *self == PRSSTATUSSEL0_A::PRSRDY + *self == Prsstatussel0::Prsrdy } - #[doc = "Checks if the value of the field is `BUFOUTRDY`"] + #[doc = "PRS mux outputs BUFOUT ready status"] #[inline(always)] pub fn is_bufoutrdy(&self) -> bool { - *self == PRSSTATUSSEL0_A::BUFOUTRDY + *self == Prsstatussel0::Bufoutrdy } - #[doc = "Checks if the value of the field is `HWREQ`"] + #[doc = "PRS mux outputs oscillator requested by digital clock status"] #[inline(always)] pub fn is_hwreq(&self) -> bool { - *self == PRSSTATUSSEL0_A::HWREQ + *self == Prsstatussel0::Hwreq } - #[doc = "Checks if the value of the field is `PRSHWREQ`"] + #[doc = "PRS mux outputs oscillator requested by PRS request status"] #[inline(always)] pub fn is_prshwreq(&self) -> bool { - *self == PRSSTATUSSEL0_A::PRSHWREQ + *self == Prsstatussel0::Prshwreq } - #[doc = "Checks if the value of the field is `BUFOUTHWREQ`"] + #[doc = "PRS mux outputs oscillator requested by BUFOUT request status"] #[inline(always)] pub fn is_bufouthwreq(&self) -> bool { - *self == PRSSTATUSSEL0_A::BUFOUTHWREQ + *self == Prsstatussel0::Bufouthwreq } } #[doc = "Field `PRSSTATUSSEL0` writer - PRS Status 0 Output Select"] -pub type PRSSTATUSSEL0_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CTRL_SPEC, u8, PRSSTATUSSEL0_A, 4, O>; -impl<'a, const O: u8> PRSSTATUSSEL0_W<'a, O> { +pub type Prsstatussel0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Prsstatussel0>; +impl<'a, REG> Prsstatussel0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS mux outputs 0"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(PRSSTATUSSEL0_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Prsstatussel0::Disabled) } #[doc = "PRS mux outputs enabled status"] #[inline(always)] - pub fn ens(self) -> &'a mut W { - self.variant(PRSSTATUSSEL0_A::ENS) + pub fn ens(self) -> &'a mut crate::W { + self.variant(Prsstatussel0::Ens) } #[doc = "PRS mux outputs core bias optimization ready status"] #[inline(always)] - pub fn corebiasoptrdy(self) -> &'a mut W { - self.variant(PRSSTATUSSEL0_A::COREBIASOPTRDY) + pub fn corebiasoptrdy(self) -> &'a mut crate::W { + self.variant(Prsstatussel0::Corebiasoptrdy) } #[doc = "PRS mux outputs ready status"] #[inline(always)] - pub fn rdy(self) -> &'a mut W { - self.variant(PRSSTATUSSEL0_A::RDY) + pub fn rdy(self) -> &'a mut crate::W { + self.variant(Prsstatussel0::Rdy) } #[doc = "PRS mux outputs PRS ready status"] #[inline(always)] - pub fn prsrdy(self) -> &'a mut W { - self.variant(PRSSTATUSSEL0_A::PRSRDY) + pub fn prsrdy(self) -> &'a mut crate::W { + self.variant(Prsstatussel0::Prsrdy) } #[doc = "PRS mux outputs BUFOUT ready status"] #[inline(always)] - pub fn bufoutrdy(self) -> &'a mut W { - self.variant(PRSSTATUSSEL0_A::BUFOUTRDY) + pub fn bufoutrdy(self) -> &'a mut crate::W { + self.variant(Prsstatussel0::Bufoutrdy) } #[doc = "PRS mux outputs oscillator requested by digital clock status"] #[inline(always)] - pub fn hwreq(self) -> &'a mut W { - self.variant(PRSSTATUSSEL0_A::HWREQ) + pub fn hwreq(self) -> &'a mut crate::W { + self.variant(Prsstatussel0::Hwreq) } #[doc = "PRS mux outputs oscillator requested by PRS request status"] #[inline(always)] - pub fn prshwreq(self) -> &'a mut W { - self.variant(PRSSTATUSSEL0_A::PRSHWREQ) + pub fn prshwreq(self) -> &'a mut crate::W { + self.variant(Prsstatussel0::Prshwreq) } #[doc = "PRS mux outputs oscillator requested by BUFOUT request status"] #[inline(always)] - pub fn bufouthwreq(self) -> &'a mut W { - self.variant(PRSSTATUSSEL0_A::BUFOUTHWREQ) + pub fn bufouthwreq(self) -> &'a mut crate::W { + self.variant(Prsstatussel0::Bufouthwreq) } } -#[doc = "Field `PRSSTATUSSEL1` reader - PRS Status 1 Output Select"] -pub type PRSSTATUSSEL1_R = crate::FieldReader; #[doc = "PRS Status 1 Output Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PRSSTATUSSEL1_A { +pub enum Prsstatussel1 { #[doc = "0: PRS mux outputs 0"] - DISABLED = 0, + Disabled = 0, #[doc = "1: PRS mux outputs enabled status"] - ENS = 1, + Ens = 1, #[doc = "2: PRS mux outputs core bias optimization ready status"] - COREBIASOPTRDY = 2, + Corebiasoptrdy = 2, #[doc = "3: PRS mux outputs ready status"] - RDY = 3, + Rdy = 3, #[doc = "4: PRS mux outputs PRS ready status"] - PRSRDY = 4, + Prsrdy = 4, #[doc = "5: PRS mux outputs BUFOUT ready status"] - BUFOUTRDY = 5, + Bufoutrdy = 5, #[doc = "8: PRS mux outputs oscillator requested by digital clock status"] - HWREQ = 8, + Hwreq = 8, #[doc = "9: PRS mux outputs oscillator requested by PRS request status"] - PRSHWREQ = 9, + Prshwreq = 9, #[doc = "10: PRS mux outputs oscillator requested by BUFOUT request status"] - BUFOUTHWREQ = 10, + Bufouthwreq = 10, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PRSSTATUSSEL1_A) -> Self { + fn from(variant: Prsstatussel1) -> Self { variant as _ } } -impl PRSSTATUSSEL1_R { +impl crate::FieldSpec for Prsstatussel1 { + type Ux = u8; +} +impl crate::IsEnum for Prsstatussel1 {} +#[doc = "Field `PRSSTATUSSEL1` reader - PRS Status 1 Output Select"] +pub type Prsstatussel1R = crate::FieldReader; +impl Prsstatussel1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PRSSTATUSSEL1_A::DISABLED), - 1 => Some(PRSSTATUSSEL1_A::ENS), - 2 => Some(PRSSTATUSSEL1_A::COREBIASOPTRDY), - 3 => Some(PRSSTATUSSEL1_A::RDY), - 4 => Some(PRSSTATUSSEL1_A::PRSRDY), - 5 => Some(PRSSTATUSSEL1_A::BUFOUTRDY), - 8 => Some(PRSSTATUSSEL1_A::HWREQ), - 9 => Some(PRSSTATUSSEL1_A::PRSHWREQ), - 10 => Some(PRSSTATUSSEL1_A::BUFOUTHWREQ), + 0 => Some(Prsstatussel1::Disabled), + 1 => Some(Prsstatussel1::Ens), + 2 => Some(Prsstatussel1::Corebiasoptrdy), + 3 => Some(Prsstatussel1::Rdy), + 4 => Some(Prsstatussel1::Prsrdy), + 5 => Some(Prsstatussel1::Bufoutrdy), + 8 => Some(Prsstatussel1::Hwreq), + 9 => Some(Prsstatussel1::Prshwreq), + 10 => Some(Prsstatussel1::Bufouthwreq), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "PRS mux outputs 0"] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == PRSSTATUSSEL1_A::DISABLED + *self == Prsstatussel1::Disabled } - #[doc = "Checks if the value of the field is `ENS`"] + #[doc = "PRS mux outputs enabled status"] #[inline(always)] pub fn is_ens(&self) -> bool { - *self == PRSSTATUSSEL1_A::ENS + *self == Prsstatussel1::Ens } - #[doc = "Checks if the value of the field is `COREBIASOPTRDY`"] + #[doc = "PRS mux outputs core bias optimization ready status"] #[inline(always)] pub fn is_corebiasoptrdy(&self) -> bool { - *self == PRSSTATUSSEL1_A::COREBIASOPTRDY + *self == Prsstatussel1::Corebiasoptrdy } - #[doc = "Checks if the value of the field is `RDY`"] + #[doc = "PRS mux outputs ready status"] #[inline(always)] pub fn is_rdy(&self) -> bool { - *self == PRSSTATUSSEL1_A::RDY + *self == Prsstatussel1::Rdy } - #[doc = "Checks if the value of the field is `PRSRDY`"] + #[doc = "PRS mux outputs PRS ready status"] #[inline(always)] pub fn is_prsrdy(&self) -> bool { - *self == PRSSTATUSSEL1_A::PRSRDY + *self == Prsstatussel1::Prsrdy } - #[doc = "Checks if the value of the field is `BUFOUTRDY`"] + #[doc = "PRS mux outputs BUFOUT ready status"] #[inline(always)] pub fn is_bufoutrdy(&self) -> bool { - *self == PRSSTATUSSEL1_A::BUFOUTRDY + *self == Prsstatussel1::Bufoutrdy } - #[doc = "Checks if the value of the field is `HWREQ`"] + #[doc = "PRS mux outputs oscillator requested by digital clock status"] #[inline(always)] pub fn is_hwreq(&self) -> bool { - *self == PRSSTATUSSEL1_A::HWREQ + *self == Prsstatussel1::Hwreq } - #[doc = "Checks if the value of the field is `PRSHWREQ`"] + #[doc = "PRS mux outputs oscillator requested by PRS request status"] #[inline(always)] pub fn is_prshwreq(&self) -> bool { - *self == PRSSTATUSSEL1_A::PRSHWREQ + *self == Prsstatussel1::Prshwreq } - #[doc = "Checks if the value of the field is `BUFOUTHWREQ`"] + #[doc = "PRS mux outputs oscillator requested by BUFOUT request status"] #[inline(always)] pub fn is_bufouthwreq(&self) -> bool { - *self == PRSSTATUSSEL1_A::BUFOUTHWREQ + *self == Prsstatussel1::Bufouthwreq } } #[doc = "Field `PRSSTATUSSEL1` writer - PRS Status 1 Output Select"] -pub type PRSSTATUSSEL1_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CTRL_SPEC, u8, PRSSTATUSSEL1_A, 4, O>; -impl<'a, const O: u8> PRSSTATUSSEL1_W<'a, O> { +pub type Prsstatussel1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Prsstatussel1>; +impl<'a, REG> Prsstatussel1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS mux outputs 0"] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(PRSSTATUSSEL1_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Prsstatussel1::Disabled) } #[doc = "PRS mux outputs enabled status"] #[inline(always)] - pub fn ens(self) -> &'a mut W { - self.variant(PRSSTATUSSEL1_A::ENS) + pub fn ens(self) -> &'a mut crate::W { + self.variant(Prsstatussel1::Ens) } #[doc = "PRS mux outputs core bias optimization ready status"] #[inline(always)] - pub fn corebiasoptrdy(self) -> &'a mut W { - self.variant(PRSSTATUSSEL1_A::COREBIASOPTRDY) + pub fn corebiasoptrdy(self) -> &'a mut crate::W { + self.variant(Prsstatussel1::Corebiasoptrdy) } #[doc = "PRS mux outputs ready status"] #[inline(always)] - pub fn rdy(self) -> &'a mut W { - self.variant(PRSSTATUSSEL1_A::RDY) + pub fn rdy(self) -> &'a mut crate::W { + self.variant(Prsstatussel1::Rdy) } #[doc = "PRS mux outputs PRS ready status"] #[inline(always)] - pub fn prsrdy(self) -> &'a mut W { - self.variant(PRSSTATUSSEL1_A::PRSRDY) + pub fn prsrdy(self) -> &'a mut crate::W { + self.variant(Prsstatussel1::Prsrdy) } #[doc = "PRS mux outputs BUFOUT ready status"] #[inline(always)] - pub fn bufoutrdy(self) -> &'a mut W { - self.variant(PRSSTATUSSEL1_A::BUFOUTRDY) + pub fn bufoutrdy(self) -> &'a mut crate::W { + self.variant(Prsstatussel1::Bufoutrdy) } #[doc = "PRS mux outputs oscillator requested by digital clock status"] #[inline(always)] - pub fn hwreq(self) -> &'a mut W { - self.variant(PRSSTATUSSEL1_A::HWREQ) + pub fn hwreq(self) -> &'a mut crate::W { + self.variant(Prsstatussel1::Hwreq) } #[doc = "PRS mux outputs oscillator requested by PRS request status"] #[inline(always)] - pub fn prshwreq(self) -> &'a mut W { - self.variant(PRSSTATUSSEL1_A::PRSHWREQ) + pub fn prshwreq(self) -> &'a mut crate::W { + self.variant(Prsstatussel1::Prshwreq) } #[doc = "PRS mux outputs oscillator requested by BUFOUT request status"] #[inline(always)] - pub fn bufouthwreq(self) -> &'a mut W { - self.variant(PRSSTATUSSEL1_A::BUFOUTHWREQ) + pub fn bufouthwreq(self) -> &'a mut crate::W { + self.variant(Prsstatussel1::Bufouthwreq) } } #[doc = "Field `FORCEEN` reader - Force Digital Clock Request"] -pub type FORCEEN_R = crate::BitReader; +pub type ForceenR = crate::BitReader; #[doc = "Field `FORCEEN` writer - Force Digital Clock Request"] -pub type FORCEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type ForceenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FORCEENPRS` reader - Force PRS Oscillator Request"] -pub type FORCEENPRS_R = crate::BitReader; +pub type ForceenprsR = crate::BitReader; #[doc = "Field `FORCEENPRS` writer - Force PRS Oscillator Request"] -pub type FORCEENPRS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type ForceenprsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FORCEENBUFOUT` reader - Force BUFOUT Request"] -pub type FORCEENBUFOUT_R = crate::BitReader; +pub type ForceenbufoutR = crate::BitReader; #[doc = "Field `FORCEENBUFOUT` writer - Force BUFOUT Request"] -pub type FORCEENBUFOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type ForceenbufoutW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISONDEMAND` reader - Disable On-demand For Digital Clock"] -pub type DISONDEMAND_R = crate::BitReader; +pub type DisondemandR = crate::BitReader; #[doc = "Field `DISONDEMAND` writer - Disable On-demand For Digital Clock"] -pub type DISONDEMAND_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type DisondemandW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISONDEMANDPRS` reader - Disable On-demand For PRS"] -pub type DISONDEMANDPRS_R = crate::BitReader; +pub type DisondemandprsR = crate::BitReader; #[doc = "Field `DISONDEMANDPRS` writer - Disable On-demand For PRS"] -pub type DISONDEMANDPRS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type DisondemandprsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISONDEMANDBUFOUT` reader - Disable On-demand For BUFOUT"] -pub type DISONDEMANDBUFOUT_R = crate::BitReader; +pub type DisondemandbufoutR = crate::BitReader; #[doc = "Field `DISONDEMANDBUFOUT` writer - Disable On-demand For BUFOUT"] -pub type DISONDEMANDBUFOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type DisondemandbufoutW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Freeze BUFOUT Controls"] #[inline(always)] - pub fn bufoutfreeze(&self) -> BUFOUTFREEZE_R { - BUFOUTFREEZE_R::new((self.bits & 1) != 0) + pub fn bufoutfreeze(&self) -> BufoutfreezeR { + BufoutfreezeR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - Keep Warm"] #[inline(always)] - pub fn keepwarm(&self) -> KEEPWARM_R { - KEEPWARM_R::new(((self.bits >> 2) & 1) != 0) + pub fn keepwarm(&self) -> KeepwarmR { + KeepwarmR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - On-demand During EM23"] #[inline(always)] - pub fn em23ondemand(&self) -> EM23ONDEMAND_R { - EM23ONDEMAND_R::new(((self.bits >> 3) & 1) != 0) + pub fn em23ondemand(&self) -> Em23ondemandR { + Em23ondemandR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Force XI Pin to Ground"] #[inline(always)] - pub fn forcexi2gndana(&self) -> FORCEXI2GNDANA_R { - FORCEXI2GNDANA_R::new(((self.bits >> 4) & 1) != 0) + pub fn forcexi2gndana(&self) -> Forcexi2gndanaR { + Forcexi2gndanaR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Force XO Pin to Ground"] #[inline(always)] - pub fn forcexo2gndana(&self) -> FORCEXO2GNDANA_R { - FORCEXO2GNDANA_R::new(((self.bits >> 5) & 1) != 0) + pub fn forcexo2gndana(&self) -> Forcexo2gndanaR { + Forcexo2gndanaR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Force Tuning Cap to Max Value"] #[inline(always)] - pub fn forcectunemax(&self) -> FORCECTUNEMAX_R { - FORCECTUNEMAX_R::new(((self.bits >> 6) & 1) != 0) + pub fn forcectunemax(&self) -> ForcectunemaxR { + ForcectunemaxR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bits 8:11 - PRS Status 0 Output Select"] #[inline(always)] - pub fn prsstatussel0(&self) -> PRSSTATUSSEL0_R { - PRSSTATUSSEL0_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn prsstatussel0(&self) -> Prsstatussel0R { + Prsstatussel0R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - PRS Status 1 Output Select"] #[inline(always)] - pub fn prsstatussel1(&self) -> PRSSTATUSSEL1_R { - PRSSTATUSSEL1_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn prsstatussel1(&self) -> Prsstatussel1R { + Prsstatussel1R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Force Digital Clock Request"] #[inline(always)] - pub fn forceen(&self) -> FORCEEN_R { - FORCEEN_R::new(((self.bits >> 16) & 1) != 0) + pub fn forceen(&self) -> ForceenR { + ForceenR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Force PRS Oscillator Request"] #[inline(always)] - pub fn forceenprs(&self) -> FORCEENPRS_R { - FORCEENPRS_R::new(((self.bits >> 17) & 1) != 0) + pub fn forceenprs(&self) -> ForceenprsR { + ForceenprsR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Force BUFOUT Request"] #[inline(always)] - pub fn forceenbufout(&self) -> FORCEENBUFOUT_R { - FORCEENBUFOUT_R::new(((self.bits >> 18) & 1) != 0) + pub fn forceenbufout(&self) -> ForceenbufoutR { + ForceenbufoutR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 24 - Disable On-demand For Digital Clock"] #[inline(always)] - pub fn disondemand(&self) -> DISONDEMAND_R { - DISONDEMAND_R::new(((self.bits >> 24) & 1) != 0) + pub fn disondemand(&self) -> DisondemandR { + DisondemandR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Disable On-demand For PRS"] #[inline(always)] - pub fn disondemandprs(&self) -> DISONDEMANDPRS_R { - DISONDEMANDPRS_R::new(((self.bits >> 25) & 1) != 0) + pub fn disondemandprs(&self) -> DisondemandprsR { + DisondemandprsR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Disable On-demand For BUFOUT"] #[inline(always)] - pub fn disondemandbufout(&self) -> DISONDEMANDBUFOUT_R { - DISONDEMANDBUFOUT_R::new(((self.bits >> 26) & 1) != 0) + pub fn disondemandbufout(&self) -> DisondemandbufoutR { + DisondemandbufoutR::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bit 0 - Freeze BUFOUT Controls"] #[inline(always)] #[must_use] - pub fn bufoutfreeze(&mut self) -> BUFOUTFREEZE_W<0> { - BUFOUTFREEZE_W::new(self) + pub fn bufoutfreeze(&mut self) -> BufoutfreezeW { + BufoutfreezeW::new(self, 0) } #[doc = "Bit 2 - Keep Warm"] #[inline(always)] #[must_use] - pub fn keepwarm(&mut self) -> KEEPWARM_W<2> { - KEEPWARM_W::new(self) + pub fn keepwarm(&mut self) -> KeepwarmW { + KeepwarmW::new(self, 2) } #[doc = "Bit 3 - On-demand During EM23"] #[inline(always)] #[must_use] - pub fn em23ondemand(&mut self) -> EM23ONDEMAND_W<3> { - EM23ONDEMAND_W::new(self) + pub fn em23ondemand(&mut self) -> Em23ondemandW { + Em23ondemandW::new(self, 3) } #[doc = "Bit 4 - Force XI Pin to Ground"] #[inline(always)] #[must_use] - pub fn forcexi2gndana(&mut self) -> FORCEXI2GNDANA_W<4> { - FORCEXI2GNDANA_W::new(self) + pub fn forcexi2gndana(&mut self) -> Forcexi2gndanaW { + Forcexi2gndanaW::new(self, 4) } #[doc = "Bit 5 - Force XO Pin to Ground"] #[inline(always)] #[must_use] - pub fn forcexo2gndana(&mut self) -> FORCEXO2GNDANA_W<5> { - FORCEXO2GNDANA_W::new(self) + pub fn forcexo2gndana(&mut self) -> Forcexo2gndanaW { + Forcexo2gndanaW::new(self, 5) } #[doc = "Bit 6 - Force Tuning Cap to Max Value"] #[inline(always)] #[must_use] - pub fn forcectunemax(&mut self) -> FORCECTUNEMAX_W<6> { - FORCECTUNEMAX_W::new(self) + pub fn forcectunemax(&mut self) -> ForcectunemaxW { + ForcectunemaxW::new(self, 6) } #[doc = "Bits 8:11 - PRS Status 0 Output Select"] #[inline(always)] #[must_use] - pub fn prsstatussel0(&mut self) -> PRSSTATUSSEL0_W<8> { - PRSSTATUSSEL0_W::new(self) + pub fn prsstatussel0(&mut self) -> Prsstatussel0W { + Prsstatussel0W::new(self, 8) } #[doc = "Bits 12:15 - PRS Status 1 Output Select"] #[inline(always)] #[must_use] - pub fn prsstatussel1(&mut self) -> PRSSTATUSSEL1_W<12> { - PRSSTATUSSEL1_W::new(self) + pub fn prsstatussel1(&mut self) -> Prsstatussel1W { + Prsstatussel1W::new(self, 12) } #[doc = "Bit 16 - Force Digital Clock Request"] #[inline(always)] #[must_use] - pub fn forceen(&mut self) -> FORCEEN_W<16> { - FORCEEN_W::new(self) + pub fn forceen(&mut self) -> ForceenW { + ForceenW::new(self, 16) } #[doc = "Bit 17 - Force PRS Oscillator Request"] #[inline(always)] #[must_use] - pub fn forceenprs(&mut self) -> FORCEENPRS_W<17> { - FORCEENPRS_W::new(self) + pub fn forceenprs(&mut self) -> ForceenprsW { + ForceenprsW::new(self, 17) } #[doc = "Bit 18 - Force BUFOUT Request"] #[inline(always)] #[must_use] - pub fn forceenbufout(&mut self) -> FORCEENBUFOUT_W<18> { - FORCEENBUFOUT_W::new(self) + pub fn forceenbufout(&mut self) -> ForceenbufoutW { + ForceenbufoutW::new(self, 18) } #[doc = "Bit 24 - Disable On-demand For Digital Clock"] #[inline(always)] #[must_use] - pub fn disondemand(&mut self) -> DISONDEMAND_W<24> { - DISONDEMAND_W::new(self) + pub fn disondemand(&mut self) -> DisondemandW { + DisondemandW::new(self, 24) } #[doc = "Bit 25 - Disable On-demand For PRS"] #[inline(always)] #[must_use] - pub fn disondemandprs(&mut self) -> DISONDEMANDPRS_W<25> { - DISONDEMANDPRS_W::new(self) + pub fn disondemandprs(&mut self) -> DisondemandprsW { + DisondemandprsW::new(self, 25) } #[doc = "Bit 26 - Disable On-demand For BUFOUT"] #[inline(always)] #[must_use] - pub fn disondemandbufout(&mut self) -> DISONDEMANDBUFOUT_W<26> { - DISONDEMANDBUFOUT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn disondemandbufout(&mut self) -> DisondemandbufoutW { + DisondemandbufoutW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0x0700_0040"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0700_0040; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0x0700_0040; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/ien.rs index 8ac8024..277cb3c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/ien.rs @@ -1,245 +1,205 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RDY` reader - Digital Clock Ready Interrupt"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `RDY` writer - Digital Clock Ready Interrupt"] -pub type RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COREBIASOPTRDY` reader - Core Bias Optimization Ready Interrupt"] -pub type COREBIASOPTRDY_R = crate::BitReader; +pub type CorebiasoptrdyR = crate::BitReader; #[doc = "Field `COREBIASOPTRDY` writer - Core Bias Optimization Ready Interrupt"] -pub type COREBIASOPTRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type CorebiasoptrdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRSRDY` reader - PRS Ready Interrupt"] -pub type PRSRDY_R = crate::BitReader; +pub type PrsrdyR = crate::BitReader; #[doc = "Field `PRSRDY` writer - PRS Ready Interrupt"] -pub type PRSRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PrsrdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUFOUTRDY` reader - BUFOUT Ready Interrupt"] -pub type BUFOUTRDY_R = crate::BitReader; +pub type BufoutrdyR = crate::BitReader; #[doc = "Field `BUFOUTRDY` writer - BUFOUT Ready Interrupt"] -pub type BUFOUTRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type BufoutrdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUFOUTFROZEN` reader - BUFOUT FROZEN Interrupt"] -pub type BUFOUTFROZEN_R = crate::BitReader; +pub type BufoutfrozenR = crate::BitReader; #[doc = "Field `BUFOUTFROZEN` writer - BUFOUT FROZEN Interrupt"] -pub type BUFOUTFROZEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type BufoutfrozenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRSERR` reader - PRS Requset Error Interrupt"] -pub type PRSERR_R = crate::BitReader; +pub type PrserrR = crate::BitReader; #[doc = "Field `PRSERR` writer - PRS Requset Error Interrupt"] -pub type PRSERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PrserrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUFOUTERR` reader - BUFOUT Request Error Interrupt"] -pub type BUFOUTERR_R = crate::BitReader; +pub type BufouterrR = crate::BitReader; #[doc = "Field `BUFOUTERR` writer - BUFOUT Request Error Interrupt"] -pub type BUFOUTERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type BufouterrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUFOUTFREEZEERR` reader - BUFOUT Freeze Error Interrupt"] -pub type BUFOUTFREEZEERR_R = crate::BitReader; +pub type BufoutfreezeerrR = crate::BitReader; #[doc = "Field `BUFOUTFREEZEERR` writer - BUFOUT Freeze Error Interrupt"] -pub type BUFOUTFREEZEERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type BufoutfreezeerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUFOUTDNSERR` reader - BUFOUT Did Not Start Error Interrupt"] -pub type BUFOUTDNSERR_R = crate::BitReader; +pub type BufoutdnserrR = crate::BitReader; #[doc = "Field `BUFOUTDNSERR` writer - BUFOUT Did Not Start Error Interrupt"] -pub type BUFOUTDNSERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type BufoutdnserrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DNSERR` reader - Did Not Start Error Interrupt"] -pub type DNSERR_R = crate::BitReader; +pub type DnserrR = crate::BitReader; #[doc = "Field `DNSERR` writer - Did Not Start Error Interrupt"] -pub type DNSERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type DnserrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LFTIMEOUTERR` reader - Low Frequency Timeout Error Interrupt"] -pub type LFTIMEOUTERR_R = crate::BitReader; +pub type LftimeouterrR = crate::BitReader; #[doc = "Field `LFTIMEOUTERR` writer - Low Frequency Timeout Error Interrupt"] -pub type LFTIMEOUTERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type LftimeouterrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COREBIASOPTERR` reader - Core Bias Optimization Error Interrupt"] -pub type COREBIASOPTERR_R = crate::BitReader; +pub type CorebiasopterrR = crate::BitReader; #[doc = "Field `COREBIASOPTERR` writer - Core Bias Optimization Error Interrupt"] -pub type COREBIASOPTERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type CorebiasopterrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Digital Clock Ready Interrupt"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Core Bias Optimization Ready Interrupt"] #[inline(always)] - pub fn corebiasoptrdy(&self) -> COREBIASOPTRDY_R { - COREBIASOPTRDY_R::new(((self.bits >> 1) & 1) != 0) + pub fn corebiasoptrdy(&self) -> CorebiasoptrdyR { + CorebiasoptrdyR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - PRS Ready Interrupt"] #[inline(always)] - pub fn prsrdy(&self) -> PRSRDY_R { - PRSRDY_R::new(((self.bits >> 2) & 1) != 0) + pub fn prsrdy(&self) -> PrsrdyR { + PrsrdyR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - BUFOUT Ready Interrupt"] #[inline(always)] - pub fn bufoutrdy(&self) -> BUFOUTRDY_R { - BUFOUTRDY_R::new(((self.bits >> 3) & 1) != 0) + pub fn bufoutrdy(&self) -> BufoutrdyR { + BufoutrdyR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 15 - BUFOUT FROZEN Interrupt"] #[inline(always)] - pub fn bufoutfrozen(&self) -> BUFOUTFROZEN_R { - BUFOUTFROZEN_R::new(((self.bits >> 15) & 1) != 0) + pub fn bufoutfrozen(&self) -> BufoutfrozenR { + BufoutfrozenR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 20 - PRS Requset Error Interrupt"] #[inline(always)] - pub fn prserr(&self) -> PRSERR_R { - PRSERR_R::new(((self.bits >> 20) & 1) != 0) + pub fn prserr(&self) -> PrserrR { + PrserrR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - BUFOUT Request Error Interrupt"] #[inline(always)] - pub fn bufouterr(&self) -> BUFOUTERR_R { - BUFOUTERR_R::new(((self.bits >> 21) & 1) != 0) + pub fn bufouterr(&self) -> BufouterrR { + BufouterrR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 27 - BUFOUT Freeze Error Interrupt"] #[inline(always)] - pub fn bufoutfreezeerr(&self) -> BUFOUTFREEZEERR_R { - BUFOUTFREEZEERR_R::new(((self.bits >> 27) & 1) != 0) + pub fn bufoutfreezeerr(&self) -> BufoutfreezeerrR { + BufoutfreezeerrR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - BUFOUT Did Not Start Error Interrupt"] #[inline(always)] - pub fn bufoutdnserr(&self) -> BUFOUTDNSERR_R { - BUFOUTDNSERR_R::new(((self.bits >> 28) & 1) != 0) + pub fn bufoutdnserr(&self) -> BufoutdnserrR { + BufoutdnserrR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Did Not Start Error Interrupt"] #[inline(always)] - pub fn dnserr(&self) -> DNSERR_R { - DNSERR_R::new(((self.bits >> 29) & 1) != 0) + pub fn dnserr(&self) -> DnserrR { + DnserrR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Low Frequency Timeout Error Interrupt"] #[inline(always)] - pub fn lftimeouterr(&self) -> LFTIMEOUTERR_R { - LFTIMEOUTERR_R::new(((self.bits >> 30) & 1) != 0) + pub fn lftimeouterr(&self) -> LftimeouterrR { + LftimeouterrR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Core Bias Optimization Error Interrupt"] #[inline(always)] - pub fn corebiasopterr(&self) -> COREBIASOPTERR_R { - COREBIASOPTERR_R::new(((self.bits >> 31) & 1) != 0) + pub fn corebiasopterr(&self) -> CorebiasopterrR { + CorebiasopterrR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Digital Clock Ready Interrupt"] #[inline(always)] #[must_use] - pub fn rdy(&mut self) -> RDY_W<0> { - RDY_W::new(self) + pub fn rdy(&mut self) -> RdyW { + RdyW::new(self, 0) } #[doc = "Bit 1 - Core Bias Optimization Ready Interrupt"] #[inline(always)] #[must_use] - pub fn corebiasoptrdy(&mut self) -> COREBIASOPTRDY_W<1> { - COREBIASOPTRDY_W::new(self) + pub fn corebiasoptrdy(&mut self) -> CorebiasoptrdyW { + CorebiasoptrdyW::new(self, 1) } #[doc = "Bit 2 - PRS Ready Interrupt"] #[inline(always)] #[must_use] - pub fn prsrdy(&mut self) -> PRSRDY_W<2> { - PRSRDY_W::new(self) + pub fn prsrdy(&mut self) -> PrsrdyW { + PrsrdyW::new(self, 2) } #[doc = "Bit 3 - BUFOUT Ready Interrupt"] #[inline(always)] #[must_use] - pub fn bufoutrdy(&mut self) -> BUFOUTRDY_W<3> { - BUFOUTRDY_W::new(self) + pub fn bufoutrdy(&mut self) -> BufoutrdyW { + BufoutrdyW::new(self, 3) } #[doc = "Bit 15 - BUFOUT FROZEN Interrupt"] #[inline(always)] #[must_use] - pub fn bufoutfrozen(&mut self) -> BUFOUTFROZEN_W<15> { - BUFOUTFROZEN_W::new(self) + pub fn bufoutfrozen(&mut self) -> BufoutfrozenW { + BufoutfrozenW::new(self, 15) } #[doc = "Bit 20 - PRS Requset Error Interrupt"] #[inline(always)] #[must_use] - pub fn prserr(&mut self) -> PRSERR_W<20> { - PRSERR_W::new(self) + pub fn prserr(&mut self) -> PrserrW { + PrserrW::new(self, 20) } #[doc = "Bit 21 - BUFOUT Request Error Interrupt"] #[inline(always)] #[must_use] - pub fn bufouterr(&mut self) -> BUFOUTERR_W<21> { - BUFOUTERR_W::new(self) + pub fn bufouterr(&mut self) -> BufouterrW { + BufouterrW::new(self, 21) } #[doc = "Bit 27 - BUFOUT Freeze Error Interrupt"] #[inline(always)] #[must_use] - pub fn bufoutfreezeerr(&mut self) -> BUFOUTFREEZEERR_W<27> { - BUFOUTFREEZEERR_W::new(self) + pub fn bufoutfreezeerr(&mut self) -> BufoutfreezeerrW { + BufoutfreezeerrW::new(self, 27) } #[doc = "Bit 28 - BUFOUT Did Not Start Error Interrupt"] #[inline(always)] #[must_use] - pub fn bufoutdnserr(&mut self) -> BUFOUTDNSERR_W<28> { - BUFOUTDNSERR_W::new(self) + pub fn bufoutdnserr(&mut self) -> BufoutdnserrW { + BufoutdnserrW::new(self, 28) } #[doc = "Bit 29 - Did Not Start Error Interrupt"] #[inline(always)] #[must_use] - pub fn dnserr(&mut self) -> DNSERR_W<29> { - DNSERR_W::new(self) + pub fn dnserr(&mut self) -> DnserrW { + DnserrW::new(self, 29) } #[doc = "Bit 30 - Low Frequency Timeout Error Interrupt"] #[inline(always)] #[must_use] - pub fn lftimeouterr(&mut self) -> LFTIMEOUTERR_W<30> { - LFTIMEOUTERR_W::new(self) + pub fn lftimeouterr(&mut self) -> LftimeouterrW { + LftimeouterrW::new(self, 30) } #[doc = "Bit 31 - Core Bias Optimization Error Interrupt"] #[inline(always)] #[must_use] - pub fn corebiasopterr(&mut self) -> COREBIASOPTERR_W<31> { - COREBIASOPTERR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn corebiasopterr(&mut self) -> CorebiasopterrW { + CorebiasopterrW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/if_.rs index e9bf866..21005ab 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/if_.rs @@ -1,245 +1,205 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RDY` reader - Digital Clock Ready Interrupt"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `RDY` writer - Digital Clock Ready Interrupt"] -pub type RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COREBIASOPTRDY` reader - Core Bias Optimization Ready Interrupt"] -pub type COREBIASOPTRDY_R = crate::BitReader; +pub type CorebiasoptrdyR = crate::BitReader; #[doc = "Field `COREBIASOPTRDY` writer - Core Bias Optimization Ready Interrupt"] -pub type COREBIASOPTRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type CorebiasoptrdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRSRDY` reader - PRS Ready Interrupt"] -pub type PRSRDY_R = crate::BitReader; +pub type PrsrdyR = crate::BitReader; #[doc = "Field `PRSRDY` writer - PRS Ready Interrupt"] -pub type PRSRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PrsrdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUFOUTRDY` reader - BUFOUT Ready Interrupt"] -pub type BUFOUTRDY_R = crate::BitReader; +pub type BufoutrdyR = crate::BitReader; #[doc = "Field `BUFOUTRDY` writer - BUFOUT Ready Interrupt"] -pub type BUFOUTRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type BufoutrdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUFOUTFROZEN` reader - BUFOUT FROZEN Interrupt"] -pub type BUFOUTFROZEN_R = crate::BitReader; +pub type BufoutfrozenR = crate::BitReader; #[doc = "Field `BUFOUTFROZEN` writer - BUFOUT FROZEN Interrupt"] -pub type BUFOUTFROZEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type BufoutfrozenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRSERR` reader - PRS Requset Error Interrupt"] -pub type PRSERR_R = crate::BitReader; +pub type PrserrR = crate::BitReader; #[doc = "Field `PRSERR` writer - PRS Requset Error Interrupt"] -pub type PRSERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PrserrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUFOUTERR` reader - BUFOUT Request Error Interrupt"] -pub type BUFOUTERR_R = crate::BitReader; +pub type BufouterrR = crate::BitReader; #[doc = "Field `BUFOUTERR` writer - BUFOUT Request Error Interrupt"] -pub type BUFOUTERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type BufouterrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUFOUTFREEZEERR` reader - BUFOUT Freeze Error Interrupt"] -pub type BUFOUTFREEZEERR_R = crate::BitReader; +pub type BufoutfreezeerrR = crate::BitReader; #[doc = "Field `BUFOUTFREEZEERR` writer - BUFOUT Freeze Error Interrupt"] -pub type BUFOUTFREEZEERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type BufoutfreezeerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUFOUTDNSERR` reader - BUFOUT Did Not Start Error Interrupt"] -pub type BUFOUTDNSERR_R = crate::BitReader; +pub type BufoutdnserrR = crate::BitReader; #[doc = "Field `BUFOUTDNSERR` writer - BUFOUT Did Not Start Error Interrupt"] -pub type BUFOUTDNSERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type BufoutdnserrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DNSERR` reader - Did Not Start Error Interrupt"] -pub type DNSERR_R = crate::BitReader; +pub type DnserrR = crate::BitReader; #[doc = "Field `DNSERR` writer - Did Not Start Error Interrupt"] -pub type DNSERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type DnserrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LFTIMEOUTERR` reader - Low Frequency Timeout Error Interrupt"] -pub type LFTIMEOUTERR_R = crate::BitReader; +pub type LftimeouterrR = crate::BitReader; #[doc = "Field `LFTIMEOUTERR` writer - Low Frequency Timeout Error Interrupt"] -pub type LFTIMEOUTERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type LftimeouterrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COREBIASOPTERR` reader - Core Bias Optimization Error Interrupt"] -pub type COREBIASOPTERR_R = crate::BitReader; +pub type CorebiasopterrR = crate::BitReader; #[doc = "Field `COREBIASOPTERR` writer - Core Bias Optimization Error Interrupt"] -pub type COREBIASOPTERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type CorebiasopterrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Digital Clock Ready Interrupt"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Core Bias Optimization Ready Interrupt"] #[inline(always)] - pub fn corebiasoptrdy(&self) -> COREBIASOPTRDY_R { - COREBIASOPTRDY_R::new(((self.bits >> 1) & 1) != 0) + pub fn corebiasoptrdy(&self) -> CorebiasoptrdyR { + CorebiasoptrdyR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - PRS Ready Interrupt"] #[inline(always)] - pub fn prsrdy(&self) -> PRSRDY_R { - PRSRDY_R::new(((self.bits >> 2) & 1) != 0) + pub fn prsrdy(&self) -> PrsrdyR { + PrsrdyR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - BUFOUT Ready Interrupt"] #[inline(always)] - pub fn bufoutrdy(&self) -> BUFOUTRDY_R { - BUFOUTRDY_R::new(((self.bits >> 3) & 1) != 0) + pub fn bufoutrdy(&self) -> BufoutrdyR { + BufoutrdyR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 15 - BUFOUT FROZEN Interrupt"] #[inline(always)] - pub fn bufoutfrozen(&self) -> BUFOUTFROZEN_R { - BUFOUTFROZEN_R::new(((self.bits >> 15) & 1) != 0) + pub fn bufoutfrozen(&self) -> BufoutfrozenR { + BufoutfrozenR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 20 - PRS Requset Error Interrupt"] #[inline(always)] - pub fn prserr(&self) -> PRSERR_R { - PRSERR_R::new(((self.bits >> 20) & 1) != 0) + pub fn prserr(&self) -> PrserrR { + PrserrR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - BUFOUT Request Error Interrupt"] #[inline(always)] - pub fn bufouterr(&self) -> BUFOUTERR_R { - BUFOUTERR_R::new(((self.bits >> 21) & 1) != 0) + pub fn bufouterr(&self) -> BufouterrR { + BufouterrR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 27 - BUFOUT Freeze Error Interrupt"] #[inline(always)] - pub fn bufoutfreezeerr(&self) -> BUFOUTFREEZEERR_R { - BUFOUTFREEZEERR_R::new(((self.bits >> 27) & 1) != 0) + pub fn bufoutfreezeerr(&self) -> BufoutfreezeerrR { + BufoutfreezeerrR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - BUFOUT Did Not Start Error Interrupt"] #[inline(always)] - pub fn bufoutdnserr(&self) -> BUFOUTDNSERR_R { - BUFOUTDNSERR_R::new(((self.bits >> 28) & 1) != 0) + pub fn bufoutdnserr(&self) -> BufoutdnserrR { + BufoutdnserrR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Did Not Start Error Interrupt"] #[inline(always)] - pub fn dnserr(&self) -> DNSERR_R { - DNSERR_R::new(((self.bits >> 29) & 1) != 0) + pub fn dnserr(&self) -> DnserrR { + DnserrR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Low Frequency Timeout Error Interrupt"] #[inline(always)] - pub fn lftimeouterr(&self) -> LFTIMEOUTERR_R { - LFTIMEOUTERR_R::new(((self.bits >> 30) & 1) != 0) + pub fn lftimeouterr(&self) -> LftimeouterrR { + LftimeouterrR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Core Bias Optimization Error Interrupt"] #[inline(always)] - pub fn corebiasopterr(&self) -> COREBIASOPTERR_R { - COREBIASOPTERR_R::new(((self.bits >> 31) & 1) != 0) + pub fn corebiasopterr(&self) -> CorebiasopterrR { + CorebiasopterrR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Digital Clock Ready Interrupt"] #[inline(always)] #[must_use] - pub fn rdy(&mut self) -> RDY_W<0> { - RDY_W::new(self) + pub fn rdy(&mut self) -> RdyW { + RdyW::new(self, 0) } #[doc = "Bit 1 - Core Bias Optimization Ready Interrupt"] #[inline(always)] #[must_use] - pub fn corebiasoptrdy(&mut self) -> COREBIASOPTRDY_W<1> { - COREBIASOPTRDY_W::new(self) + pub fn corebiasoptrdy(&mut self) -> CorebiasoptrdyW { + CorebiasoptrdyW::new(self, 1) } #[doc = "Bit 2 - PRS Ready Interrupt"] #[inline(always)] #[must_use] - pub fn prsrdy(&mut self) -> PRSRDY_W<2> { - PRSRDY_W::new(self) + pub fn prsrdy(&mut self) -> PrsrdyW { + PrsrdyW::new(self, 2) } #[doc = "Bit 3 - BUFOUT Ready Interrupt"] #[inline(always)] #[must_use] - pub fn bufoutrdy(&mut self) -> BUFOUTRDY_W<3> { - BUFOUTRDY_W::new(self) + pub fn bufoutrdy(&mut self) -> BufoutrdyW { + BufoutrdyW::new(self, 3) } #[doc = "Bit 15 - BUFOUT FROZEN Interrupt"] #[inline(always)] #[must_use] - pub fn bufoutfrozen(&mut self) -> BUFOUTFROZEN_W<15> { - BUFOUTFROZEN_W::new(self) + pub fn bufoutfrozen(&mut self) -> BufoutfrozenW { + BufoutfrozenW::new(self, 15) } #[doc = "Bit 20 - PRS Requset Error Interrupt"] #[inline(always)] #[must_use] - pub fn prserr(&mut self) -> PRSERR_W<20> { - PRSERR_W::new(self) + pub fn prserr(&mut self) -> PrserrW { + PrserrW::new(self, 20) } #[doc = "Bit 21 - BUFOUT Request Error Interrupt"] #[inline(always)] #[must_use] - pub fn bufouterr(&mut self) -> BUFOUTERR_W<21> { - BUFOUTERR_W::new(self) + pub fn bufouterr(&mut self) -> BufouterrW { + BufouterrW::new(self, 21) } #[doc = "Bit 27 - BUFOUT Freeze Error Interrupt"] #[inline(always)] #[must_use] - pub fn bufoutfreezeerr(&mut self) -> BUFOUTFREEZEERR_W<27> { - BUFOUTFREEZEERR_W::new(self) + pub fn bufoutfreezeerr(&mut self) -> BufoutfreezeerrW { + BufoutfreezeerrW::new(self, 27) } #[doc = "Bit 28 - BUFOUT Did Not Start Error Interrupt"] #[inline(always)] #[must_use] - pub fn bufoutdnserr(&mut self) -> BUFOUTDNSERR_W<28> { - BUFOUTDNSERR_W::new(self) + pub fn bufoutdnserr(&mut self) -> BufoutdnserrW { + BufoutdnserrW::new(self, 28) } #[doc = "Bit 29 - Did Not Start Error Interrupt"] #[inline(always)] #[must_use] - pub fn dnserr(&mut self) -> DNSERR_W<29> { - DNSERR_W::new(self) + pub fn dnserr(&mut self) -> DnserrW { + DnserrW::new(self, 29) } #[doc = "Bit 30 - Low Frequency Timeout Error Interrupt"] #[inline(always)] #[must_use] - pub fn lftimeouterr(&mut self) -> LFTIMEOUTERR_W<30> { - LFTIMEOUTERR_W::new(self) + pub fn lftimeouterr(&mut self) -> LftimeouterrW { + LftimeouterrW::new(self, 30) } #[doc = "Bit 31 - Core Bias Optimization Error Interrupt"] #[inline(always)] #[must_use] - pub fn corebiasopterr(&mut self) -> COREBIASOPTERR_W<31> { - COREBIASOPTERR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn corebiasopterr(&mut self) -> CorebiasopterrW { + CorebiasopterrW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/ipversion.rs index 84fd334..7d07047 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x03"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x03; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x03; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/lock.rs index 985ce38..1b53b3a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Configuration Lock Key\n\nValue on reset: 22542"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "22542: Write this value to unlock"] - UNLOCK = 22542, + Unlock = 22542, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Configuration Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write this value to unlock"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Configuration Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0x580e"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0x580e; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0x580e; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/status.rs index 5555492..01082c1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/status.rs @@ -1,148 +1,133 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RDY` reader - Ready Status"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `COREBIASOPTRDY` reader - Core Bias Optimization Ready"] -pub type COREBIASOPTRDY_R = crate::BitReader; +pub type CorebiasoptrdyR = crate::BitReader; #[doc = "Field `PRSRDY` reader - PRS Ready Status"] -pub type PRSRDY_R = crate::BitReader; +pub type PrsrdyR = crate::BitReader; #[doc = "Field `BUFOUTRDY` reader - BUFOUT Ready Status"] -pub type BUFOUTRDY_R = crate::BitReader; +pub type BufoutrdyR = crate::BitReader; #[doc = "Field `BUFOUTFROZEN` reader - BUFOUT Frozen"] -pub type BUFOUTFROZEN_R = crate::BitReader; +pub type BufoutfrozenR = crate::BitReader; #[doc = "Field `ENS` reader - Enabled Status"] -pub type ENS_R = crate::BitReader; +pub type EnsR = crate::BitReader; #[doc = "Field `HWREQ` reader - Oscillator Requested by Digital Clock"] -pub type HWREQ_R = crate::BitReader; +pub type HwreqR = crate::BitReader; #[doc = "Field `ISWARM` reader - Oscillator Is Kept Warm"] -pub type ISWARM_R = crate::BitReader; +pub type IswarmR = crate::BitReader; #[doc = "Field `PRSHWREQ` reader - Oscillator Requested by PRS Request"] -pub type PRSHWREQ_R = crate::BitReader; +pub type PrshwreqR = crate::BitReader; #[doc = "Field `BUFOUTHWREQ` reader - Oscillator Requested by BUFOUT Request"] -pub type BUFOUTHWREQ_R = crate::BitReader; +pub type BufouthwreqR = crate::BitReader; #[doc = "Field `SYNCBUSY` reader - Sync Busy"] -pub type SYNCBUSY_R = crate::BitReader; -#[doc = "Field `LOCK` reader - Configuration Lock Status"] -pub type LOCK_R = crate::BitReader; +pub type SyncbusyR = crate::BitReader; #[doc = "Configuration Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCK_A { +pub enum Lock { #[doc = "0: Configuration lock is unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: Configuration lock is locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCK_A) -> Self { + fn from(variant: Lock) -> Self { variant as u8 != 0 } } -impl LOCK_R { +#[doc = "Field `LOCK` reader - Configuration Lock Status"] +pub type LockR = crate::BitReader; +impl LockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCK_A { + pub const fn variant(&self) -> Lock { match self.bits { - false => LOCK_A::UNLOCKED, - true => LOCK_A::LOCKED, + false => Lock::Unlocked, + true => Lock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "Configuration lock is unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCK_A::UNLOCKED + *self == Lock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "Configuration lock is locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCK_A::LOCKED + *self == Lock::Locked } } impl R { #[doc = "Bit 0 - Ready Status"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Core Bias Optimization Ready"] #[inline(always)] - pub fn corebiasoptrdy(&self) -> COREBIASOPTRDY_R { - COREBIASOPTRDY_R::new(((self.bits >> 1) & 1) != 0) + pub fn corebiasoptrdy(&self) -> CorebiasoptrdyR { + CorebiasoptrdyR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - PRS Ready Status"] #[inline(always)] - pub fn prsrdy(&self) -> PRSRDY_R { - PRSRDY_R::new(((self.bits >> 2) & 1) != 0) + pub fn prsrdy(&self) -> PrsrdyR { + PrsrdyR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - BUFOUT Ready Status"] #[inline(always)] - pub fn bufoutrdy(&self) -> BUFOUTRDY_R { - BUFOUTRDY_R::new(((self.bits >> 3) & 1) != 0) + pub fn bufoutrdy(&self) -> BufoutrdyR { + BufoutrdyR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 15 - BUFOUT Frozen"] #[inline(always)] - pub fn bufoutfrozen(&self) -> BUFOUTFROZEN_R { - BUFOUTFROZEN_R::new(((self.bits >> 15) & 1) != 0) + pub fn bufoutfrozen(&self) -> BufoutfrozenR { + BufoutfrozenR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Enabled Status"] #[inline(always)] - pub fn ens(&self) -> ENS_R { - ENS_R::new(((self.bits >> 16) & 1) != 0) + pub fn ens(&self) -> EnsR { + EnsR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Oscillator Requested by Digital Clock"] #[inline(always)] - pub fn hwreq(&self) -> HWREQ_R { - HWREQ_R::new(((self.bits >> 17) & 1) != 0) + pub fn hwreq(&self) -> HwreqR { + HwreqR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 19 - Oscillator Is Kept Warm"] #[inline(always)] - pub fn iswarm(&self) -> ISWARM_R { - ISWARM_R::new(((self.bits >> 19) & 1) != 0) + pub fn iswarm(&self) -> IswarmR { + IswarmR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Oscillator Requested by PRS Request"] #[inline(always)] - pub fn prshwreq(&self) -> PRSHWREQ_R { - PRSHWREQ_R::new(((self.bits >> 20) & 1) != 0) + pub fn prshwreq(&self) -> PrshwreqR { + PrshwreqR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Oscillator Requested by BUFOUT Request"] #[inline(always)] - pub fn bufouthwreq(&self) -> BUFOUTHWREQ_R { - BUFOUTHWREQ_R::new(((self.bits >> 21) & 1) != 0) + pub fn bufouthwreq(&self) -> BufouthwreqR { + BufouthwreqR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 30 - Sync Busy"] #[inline(always)] - pub fn syncbusy(&self) -> SYNCBUSY_R { - SYNCBUSY_R::new(((self.bits >> 30) & 1) != 0) + pub fn syncbusy(&self) -> SyncbusyR { + SyncbusyR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Configuration Lock Status"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new(((self.bits >> 31) & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/xtalcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/xtalcfg.rs index 2065f3e..063dbd3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/xtalcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/xtalcfg.rs @@ -1,621 +1,591 @@ #[doc = "Register `XTALCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `XTALCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `COREBIASSTARTUPI` reader - Intermediate Startup Core Bias Current"] -pub type COREBIASSTARTUPI_R = crate::FieldReader; +pub type CorebiasstartupiR = crate::FieldReader; #[doc = "Field `COREBIASSTARTUPI` writer - Intermediate Startup Core Bias Current"] -pub type COREBIASSTARTUPI_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, XTALCFG_SPEC, u8, u8, 6, O>; +pub type CorebiasstartupiW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `COREBIASSTARTUP` reader - Startup Core Bias Current"] -pub type COREBIASSTARTUP_R = crate::FieldReader; +pub type CorebiasstartupR = crate::FieldReader; #[doc = "Field `COREBIASSTARTUP` writer - Startup Core Bias Current"] -pub type COREBIASSTARTUP_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, XTALCFG_SPEC, u8, u8, 6, O>; +pub type CorebiasstartupW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `CTUNEXISTARTUP` reader - Startup Tuning Capacitance on XI"] -pub type CTUNEXISTARTUP_R = crate::FieldReader; +pub type CtunexistartupR = crate::FieldReader; #[doc = "Field `CTUNEXISTARTUP` writer - Startup Tuning Capacitance on XI"] -pub type CTUNEXISTARTUP_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, XTALCFG_SPEC, u8, u8, 4, O>; +pub type CtunexistartupW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `CTUNEXOSTARTUP` reader - Startup Tuning Capacitance on XO"] -pub type CTUNEXOSTARTUP_R = crate::FieldReader; +pub type CtunexostartupR = crate::FieldReader; #[doc = "Field `CTUNEXOSTARTUP` writer - Startup Tuning Capacitance on XO"] -pub type CTUNEXOSTARTUP_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, XTALCFG_SPEC, u8, u8, 4, O>; -#[doc = "Field `TIMEOUTSTEADY` reader - Steady State Timeout"] -pub type TIMEOUTSTEADY_R = crate::FieldReader; +pub type CtunexostartupW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Steady State Timeout\n\nValue on reset: 11"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TIMEOUTSTEADY_A { +pub enum Timeoutsteady { #[doc = "0: The steady state timeout is set to 16 us minimum. The maximum can be +40%."] - T4US = 0, + T4us = 0, #[doc = "1: The steady state timeout is set to 41 us minimum. The maximum can be +40%."] - T16US = 1, + T16us = 1, #[doc = "2: The steady state timeout is set to 83 us minimum. The maximum can be +40%."] - T41US = 2, + T41us = 2, #[doc = "3: The steady state timeout is set to 125 us minimum. The maximum can be +40%."] - T83US = 3, + T83us = 3, #[doc = "4: The steady state timeout is set to 166 us minimum. The maximum can be +40%."] - T125US = 4, + T125us = 4, #[doc = "5: The steady state timeout is set to 208 us minimum. The maximum can be +40%."] - T166US = 5, + T166us = 5, #[doc = "6: The steady state timeout is set to 250 us minimum. The maximum can be +40%."] - T208US = 6, + T208us = 6, #[doc = "7: The steady state timeout is set to 333 us minimum. The maximum can be +40%."] - T250US = 7, + T250us = 7, #[doc = "8: The steady state timeout is set to 416 us minimum. The maximum can be +40%."] - T333US = 8, + T333us = 8, #[doc = "9: The steady state timeout is set to 500 us minimum. The maximum can be +40%."] - T416US = 9, + T416us = 9, #[doc = "10: The steady state timeout is set to 666 us minimum. The maximum can be +40%."] - T500US = 10, + T500us = 10, #[doc = "11: The steady state timeout is set to 833 us minimum. The maximum can be +40%."] - T666US = 11, + T666us = 11, #[doc = "12: The steady state timeout is set to 1666 us minimum. The maximum can be +40%."] - T833US = 12, + T833us = 12, #[doc = "13: The steady state timeout is set to 2500 us minimum. The maximum can be +40%."] - T1666US = 13, + T1666us = 13, #[doc = "14: The steady state timeout is set to 4166 us minimum. The maximum can be +40%."] - T2500US = 14, + T2500us = 14, #[doc = "15: The steady state timeout is set to 7500 us minimum. The maximum can be +40%."] - T4166US = 15, + T4166us = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TIMEOUTSTEADY_A) -> Self { + fn from(variant: Timeoutsteady) -> Self { variant as _ } } -impl TIMEOUTSTEADY_R { +impl crate::FieldSpec for Timeoutsteady { + type Ux = u8; +} +impl crate::IsEnum for Timeoutsteady {} +#[doc = "Field `TIMEOUTSTEADY` reader - Steady State Timeout"] +pub type TimeoutsteadyR = crate::FieldReader; +impl TimeoutsteadyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TIMEOUTSTEADY_A { + pub const fn variant(&self) -> Timeoutsteady { match self.bits { - 0 => TIMEOUTSTEADY_A::T4US, - 1 => TIMEOUTSTEADY_A::T16US, - 2 => TIMEOUTSTEADY_A::T41US, - 3 => TIMEOUTSTEADY_A::T83US, - 4 => TIMEOUTSTEADY_A::T125US, - 5 => TIMEOUTSTEADY_A::T166US, - 6 => TIMEOUTSTEADY_A::T208US, - 7 => TIMEOUTSTEADY_A::T250US, - 8 => TIMEOUTSTEADY_A::T333US, - 9 => TIMEOUTSTEADY_A::T416US, - 10 => TIMEOUTSTEADY_A::T500US, - 11 => TIMEOUTSTEADY_A::T666US, - 12 => TIMEOUTSTEADY_A::T833US, - 13 => TIMEOUTSTEADY_A::T1666US, - 14 => TIMEOUTSTEADY_A::T2500US, - 15 => TIMEOUTSTEADY_A::T4166US, + 0 => Timeoutsteady::T4us, + 1 => Timeoutsteady::T16us, + 2 => Timeoutsteady::T41us, + 3 => Timeoutsteady::T83us, + 4 => Timeoutsteady::T125us, + 5 => Timeoutsteady::T166us, + 6 => Timeoutsteady::T208us, + 7 => Timeoutsteady::T250us, + 8 => Timeoutsteady::T333us, + 9 => Timeoutsteady::T416us, + 10 => Timeoutsteady::T500us, + 11 => Timeoutsteady::T666us, + 12 => Timeoutsteady::T833us, + 13 => Timeoutsteady::T1666us, + 14 => Timeoutsteady::T2500us, + 15 => Timeoutsteady::T4166us, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `T4US`"] + #[doc = "The steady state timeout is set to 16 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t4us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T4US + *self == Timeoutsteady::T4us } - #[doc = "Checks if the value of the field is `T16US`"] + #[doc = "The steady state timeout is set to 41 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t16us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T16US + *self == Timeoutsteady::T16us } - #[doc = "Checks if the value of the field is `T41US`"] + #[doc = "The steady state timeout is set to 83 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t41us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T41US + *self == Timeoutsteady::T41us } - #[doc = "Checks if the value of the field is `T83US`"] + #[doc = "The steady state timeout is set to 125 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t83us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T83US + *self == Timeoutsteady::T83us } - #[doc = "Checks if the value of the field is `T125US`"] + #[doc = "The steady state timeout is set to 166 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t125us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T125US + *self == Timeoutsteady::T125us } - #[doc = "Checks if the value of the field is `T166US`"] + #[doc = "The steady state timeout is set to 208 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t166us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T166US + *self == Timeoutsteady::T166us } - #[doc = "Checks if the value of the field is `T208US`"] + #[doc = "The steady state timeout is set to 250 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t208us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T208US + *self == Timeoutsteady::T208us } - #[doc = "Checks if the value of the field is `T250US`"] + #[doc = "The steady state timeout is set to 333 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t250us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T250US + *self == Timeoutsteady::T250us } - #[doc = "Checks if the value of the field is `T333US`"] + #[doc = "The steady state timeout is set to 416 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t333us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T333US + *self == Timeoutsteady::T333us } - #[doc = "Checks if the value of the field is `T416US`"] + #[doc = "The steady state timeout is set to 500 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t416us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T416US + *self == Timeoutsteady::T416us } - #[doc = "Checks if the value of the field is `T500US`"] + #[doc = "The steady state timeout is set to 666 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t500us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T500US + *self == Timeoutsteady::T500us } - #[doc = "Checks if the value of the field is `T666US`"] + #[doc = "The steady state timeout is set to 833 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t666us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T666US + *self == Timeoutsteady::T666us } - #[doc = "Checks if the value of the field is `T833US`"] + #[doc = "The steady state timeout is set to 1666 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t833us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T833US + *self == Timeoutsteady::T833us } - #[doc = "Checks if the value of the field is `T1666US`"] + #[doc = "The steady state timeout is set to 2500 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t1666us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T1666US + *self == Timeoutsteady::T1666us } - #[doc = "Checks if the value of the field is `T2500US`"] + #[doc = "The steady state timeout is set to 4166 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t2500us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T2500US + *self == Timeoutsteady::T2500us } - #[doc = "Checks if the value of the field is `T4166US`"] + #[doc = "The steady state timeout is set to 7500 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t4166us(&self) -> bool { - *self == TIMEOUTSTEADY_A::T4166US + *self == Timeoutsteady::T4166us } } #[doc = "Field `TIMEOUTSTEADY` writer - Steady State Timeout"] -pub type TIMEOUTSTEADY_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, XTALCFG_SPEC, u8, TIMEOUTSTEADY_A, 4, O>; -impl<'a, const O: u8> TIMEOUTSTEADY_W<'a, O> { +pub type TimeoutsteadyW<'a, REG> = crate::FieldWriter<'a, REG, 4, Timeoutsteady, crate::Safe>; +impl<'a, REG> TimeoutsteadyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The steady state timeout is set to 16 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t4us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T4US) + pub fn t4us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T4us) } #[doc = "The steady state timeout is set to 41 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t16us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T16US) + pub fn t16us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T16us) } #[doc = "The steady state timeout is set to 83 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t41us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T41US) + pub fn t41us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T41us) } #[doc = "The steady state timeout is set to 125 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t83us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T83US) + pub fn t83us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T83us) } #[doc = "The steady state timeout is set to 166 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t125us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T125US) + pub fn t125us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T125us) } #[doc = "The steady state timeout is set to 208 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t166us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T166US) + pub fn t166us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T166us) } #[doc = "The steady state timeout is set to 250 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t208us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T208US) + pub fn t208us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T208us) } #[doc = "The steady state timeout is set to 333 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t250us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T250US) + pub fn t250us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T250us) } #[doc = "The steady state timeout is set to 416 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t333us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T333US) + pub fn t333us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T333us) } #[doc = "The steady state timeout is set to 500 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t416us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T416US) + pub fn t416us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T416us) } #[doc = "The steady state timeout is set to 666 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t500us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T500US) + pub fn t500us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T500us) } #[doc = "The steady state timeout is set to 833 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t666us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T666US) + pub fn t666us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T666us) } #[doc = "The steady state timeout is set to 1666 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t833us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T833US) + pub fn t833us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T833us) } #[doc = "The steady state timeout is set to 2500 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t1666us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T1666US) + pub fn t1666us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T1666us) } #[doc = "The steady state timeout is set to 4166 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t2500us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T2500US) + pub fn t2500us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T2500us) } #[doc = "The steady state timeout is set to 7500 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t4166us(self) -> &'a mut W { - self.variant(TIMEOUTSTEADY_A::T4166US) + pub fn t4166us(self) -> &'a mut crate::W { + self.variant(Timeoutsteady::T4166us) } } -#[doc = "Field `TIMEOUTCBLSB` reader - Core Bias LSB Change Timeout"] -pub type TIMEOUTCBLSB_R = crate::FieldReader; #[doc = "Core Bias LSB Change Timeout\n\nValue on reset: 11"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TIMEOUTCBLSB_A { +pub enum Timeoutcblsb { #[doc = "0: The core bias LSB change timeout is set to 8 us minimum. The maximum can be +40%."] - T8US = 0, + T8us = 0, #[doc = "1: The core bias LSB change timeout is set to 20 us minimum. The maximum can be +40%."] - T20US = 1, + T20us = 1, #[doc = "2: The core bias LSB change timeout is set to 41 us minimum. The maximum can be +40%."] - T41US = 2, + T41us = 2, #[doc = "3: The core bias LSB change timeout is set to 62 us minimum. The maximum can be +40%."] - T62US = 3, + T62us = 3, #[doc = "4: The core bias LSB change timeout is set to 83 us minimum. The maximum can be +40%."] - T83US = 4, + T83us = 4, #[doc = "5: The core bias LSB change timeout is set to 104 us minimum. The maximum can be +40%."] - T104US = 5, + T104us = 5, #[doc = "6: The core bias LSB change timeout is set to 125 us minimum. The maximum can be +40%."] - T125US = 6, + T125us = 6, #[doc = "7: The core bias LSB change timeout is set to 166 us minimum. The maximum can be +40%."] - T166US = 7, + T166us = 7, #[doc = "8: The core bias LSB change timeout is set to 208 us minimum. The maximum can be +40%."] - T208US = 8, + T208us = 8, #[doc = "9: The core bias LSB change timeout is set to 250 us minimum. The maximum can be +40%."] - T250US = 9, + T250us = 9, #[doc = "10: The core bias LSB change timeout is set to 333 us minimum. The maximum can be +40%."] - T333US = 10, + T333us = 10, #[doc = "11: The core bias LSB change timeout is set to 416 us minimum. The maximum can be +40%."] - T416US = 11, + T416us = 11, #[doc = "12: The core bias LSB change timeout is set to 833 us minimum. The maximum can be +40%."] - T833US = 12, + T833us = 12, #[doc = "13: The core bias LSB change timeout is set to 1250 us minimum. The maximum can be +40%."] - T1250US = 13, + T1250us = 13, #[doc = "14: The core bias LSB change timeout is set to 2083 us minimum. The maximum can be +40%."] - T2083US = 14, + T2083us = 14, #[doc = "15: The core bias LSB change timeout is set to 3750 us minimum. The maximum can be +40%."] - T3750US = 15, + T3750us = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TIMEOUTCBLSB_A) -> Self { + fn from(variant: Timeoutcblsb) -> Self { variant as _ } } -impl TIMEOUTCBLSB_R { +impl crate::FieldSpec for Timeoutcblsb { + type Ux = u8; +} +impl crate::IsEnum for Timeoutcblsb {} +#[doc = "Field `TIMEOUTCBLSB` reader - Core Bias LSB Change Timeout"] +pub type TimeoutcblsbR = crate::FieldReader; +impl TimeoutcblsbR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TIMEOUTCBLSB_A { + pub const fn variant(&self) -> Timeoutcblsb { match self.bits { - 0 => TIMEOUTCBLSB_A::T8US, - 1 => TIMEOUTCBLSB_A::T20US, - 2 => TIMEOUTCBLSB_A::T41US, - 3 => TIMEOUTCBLSB_A::T62US, - 4 => TIMEOUTCBLSB_A::T83US, - 5 => TIMEOUTCBLSB_A::T104US, - 6 => TIMEOUTCBLSB_A::T125US, - 7 => TIMEOUTCBLSB_A::T166US, - 8 => TIMEOUTCBLSB_A::T208US, - 9 => TIMEOUTCBLSB_A::T250US, - 10 => TIMEOUTCBLSB_A::T333US, - 11 => TIMEOUTCBLSB_A::T416US, - 12 => TIMEOUTCBLSB_A::T833US, - 13 => TIMEOUTCBLSB_A::T1250US, - 14 => TIMEOUTCBLSB_A::T2083US, - 15 => TIMEOUTCBLSB_A::T3750US, + 0 => Timeoutcblsb::T8us, + 1 => Timeoutcblsb::T20us, + 2 => Timeoutcblsb::T41us, + 3 => Timeoutcblsb::T62us, + 4 => Timeoutcblsb::T83us, + 5 => Timeoutcblsb::T104us, + 6 => Timeoutcblsb::T125us, + 7 => Timeoutcblsb::T166us, + 8 => Timeoutcblsb::T208us, + 9 => Timeoutcblsb::T250us, + 10 => Timeoutcblsb::T333us, + 11 => Timeoutcblsb::T416us, + 12 => Timeoutcblsb::T833us, + 13 => Timeoutcblsb::T1250us, + 14 => Timeoutcblsb::T2083us, + 15 => Timeoutcblsb::T3750us, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `T8US`"] + #[doc = "The core bias LSB change timeout is set to 8 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t8us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T8US + *self == Timeoutcblsb::T8us } - #[doc = "Checks if the value of the field is `T20US`"] + #[doc = "The core bias LSB change timeout is set to 20 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t20us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T20US + *self == Timeoutcblsb::T20us } - #[doc = "Checks if the value of the field is `T41US`"] + #[doc = "The core bias LSB change timeout is set to 41 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t41us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T41US + *self == Timeoutcblsb::T41us } - #[doc = "Checks if the value of the field is `T62US`"] + #[doc = "The core bias LSB change timeout is set to 62 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t62us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T62US + *self == Timeoutcblsb::T62us } - #[doc = "Checks if the value of the field is `T83US`"] + #[doc = "The core bias LSB change timeout is set to 83 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t83us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T83US + *self == Timeoutcblsb::T83us } - #[doc = "Checks if the value of the field is `T104US`"] + #[doc = "The core bias LSB change timeout is set to 104 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t104us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T104US + *self == Timeoutcblsb::T104us } - #[doc = "Checks if the value of the field is `T125US`"] + #[doc = "The core bias LSB change timeout is set to 125 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t125us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T125US + *self == Timeoutcblsb::T125us } - #[doc = "Checks if the value of the field is `T166US`"] + #[doc = "The core bias LSB change timeout is set to 166 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t166us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T166US + *self == Timeoutcblsb::T166us } - #[doc = "Checks if the value of the field is `T208US`"] + #[doc = "The core bias LSB change timeout is set to 208 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t208us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T208US + *self == Timeoutcblsb::T208us } - #[doc = "Checks if the value of the field is `T250US`"] + #[doc = "The core bias LSB change timeout is set to 250 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t250us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T250US + *self == Timeoutcblsb::T250us } - #[doc = "Checks if the value of the field is `T333US`"] + #[doc = "The core bias LSB change timeout is set to 333 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t333us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T333US + *self == Timeoutcblsb::T333us } - #[doc = "Checks if the value of the field is `T416US`"] + #[doc = "The core bias LSB change timeout is set to 416 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t416us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T416US + *self == Timeoutcblsb::T416us } - #[doc = "Checks if the value of the field is `T833US`"] + #[doc = "The core bias LSB change timeout is set to 833 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t833us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T833US + *self == Timeoutcblsb::T833us } - #[doc = "Checks if the value of the field is `T1250US`"] + #[doc = "The core bias LSB change timeout is set to 1250 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t1250us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T1250US + *self == Timeoutcblsb::T1250us } - #[doc = "Checks if the value of the field is `T2083US`"] + #[doc = "The core bias LSB change timeout is set to 2083 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t2083us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T2083US + *self == Timeoutcblsb::T2083us } - #[doc = "Checks if the value of the field is `T3750US`"] + #[doc = "The core bias LSB change timeout is set to 3750 us minimum. The maximum can be +40%."] #[inline(always)] pub fn is_t3750us(&self) -> bool { - *self == TIMEOUTCBLSB_A::T3750US + *self == Timeoutcblsb::T3750us } } #[doc = "Field `TIMEOUTCBLSB` writer - Core Bias LSB Change Timeout"] -pub type TIMEOUTCBLSB_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, XTALCFG_SPEC, u8, TIMEOUTCBLSB_A, 4, O>; -impl<'a, const O: u8> TIMEOUTCBLSB_W<'a, O> { +pub type TimeoutcblsbW<'a, REG> = crate::FieldWriter<'a, REG, 4, Timeoutcblsb, crate::Safe>; +impl<'a, REG> TimeoutcblsbW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The core bias LSB change timeout is set to 8 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t8us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T8US) + pub fn t8us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T8us) } #[doc = "The core bias LSB change timeout is set to 20 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t20us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T20US) + pub fn t20us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T20us) } #[doc = "The core bias LSB change timeout is set to 41 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t41us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T41US) + pub fn t41us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T41us) } #[doc = "The core bias LSB change timeout is set to 62 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t62us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T62US) + pub fn t62us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T62us) } #[doc = "The core bias LSB change timeout is set to 83 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t83us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T83US) + pub fn t83us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T83us) } #[doc = "The core bias LSB change timeout is set to 104 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t104us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T104US) + pub fn t104us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T104us) } #[doc = "The core bias LSB change timeout is set to 125 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t125us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T125US) + pub fn t125us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T125us) } #[doc = "The core bias LSB change timeout is set to 166 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t166us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T166US) + pub fn t166us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T166us) } #[doc = "The core bias LSB change timeout is set to 208 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t208us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T208US) + pub fn t208us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T208us) } #[doc = "The core bias LSB change timeout is set to 250 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t250us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T250US) + pub fn t250us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T250us) } #[doc = "The core bias LSB change timeout is set to 333 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t333us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T333US) + pub fn t333us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T333us) } #[doc = "The core bias LSB change timeout is set to 416 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t416us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T416US) + pub fn t416us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T416us) } #[doc = "The core bias LSB change timeout is set to 833 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t833us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T833US) + pub fn t833us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T833us) } #[doc = "The core bias LSB change timeout is set to 1250 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t1250us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T1250US) + pub fn t1250us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T1250us) } #[doc = "The core bias LSB change timeout is set to 2083 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t2083us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T2083US) + pub fn t2083us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T2083us) } #[doc = "The core bias LSB change timeout is set to 3750 us minimum. The maximum can be +40%."] #[inline(always)] - pub fn t3750us(self) -> &'a mut W { - self.variant(TIMEOUTCBLSB_A::T3750US) + pub fn t3750us(self) -> &'a mut crate::W { + self.variant(Timeoutcblsb::T3750us) } } impl R { #[doc = "Bits 0:5 - Intermediate Startup Core Bias Current"] #[inline(always)] - pub fn corebiasstartupi(&self) -> COREBIASSTARTUPI_R { - COREBIASSTARTUPI_R::new((self.bits & 0x3f) as u8) + pub fn corebiasstartupi(&self) -> CorebiasstartupiR { + CorebiasstartupiR::new((self.bits & 0x3f) as u8) } #[doc = "Bits 6:11 - Startup Core Bias Current"] #[inline(always)] - pub fn corebiasstartup(&self) -> COREBIASSTARTUP_R { - COREBIASSTARTUP_R::new(((self.bits >> 6) & 0x3f) as u8) + pub fn corebiasstartup(&self) -> CorebiasstartupR { + CorebiasstartupR::new(((self.bits >> 6) & 0x3f) as u8) } #[doc = "Bits 12:15 - Startup Tuning Capacitance on XI"] #[inline(always)] - pub fn ctunexistartup(&self) -> CTUNEXISTARTUP_R { - CTUNEXISTARTUP_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn ctunexistartup(&self) -> CtunexistartupR { + CtunexistartupR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:19 - Startup Tuning Capacitance on XO"] #[inline(always)] - pub fn ctunexostartup(&self) -> CTUNEXOSTARTUP_R { - CTUNEXOSTARTUP_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn ctunexostartup(&self) -> CtunexostartupR { + CtunexostartupR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:23 - Steady State Timeout"] #[inline(always)] - pub fn timeoutsteady(&self) -> TIMEOUTSTEADY_R { - TIMEOUTSTEADY_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn timeoutsteady(&self) -> TimeoutsteadyR { + TimeoutsteadyR::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:27 - Core Bias LSB Change Timeout"] #[inline(always)] - pub fn timeoutcblsb(&self) -> TIMEOUTCBLSB_R { - TIMEOUTCBLSB_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn timeoutcblsb(&self) -> TimeoutcblsbR { + TimeoutcblsbR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:5 - Intermediate Startup Core Bias Current"] #[inline(always)] #[must_use] - pub fn corebiasstartupi(&mut self) -> COREBIASSTARTUPI_W<0> { - COREBIASSTARTUPI_W::new(self) + pub fn corebiasstartupi(&mut self) -> CorebiasstartupiW { + CorebiasstartupiW::new(self, 0) } #[doc = "Bits 6:11 - Startup Core Bias Current"] #[inline(always)] #[must_use] - pub fn corebiasstartup(&mut self) -> COREBIASSTARTUP_W<6> { - COREBIASSTARTUP_W::new(self) + pub fn corebiasstartup(&mut self) -> CorebiasstartupW { + CorebiasstartupW::new(self, 6) } #[doc = "Bits 12:15 - Startup Tuning Capacitance on XI"] #[inline(always)] #[must_use] - pub fn ctunexistartup(&mut self) -> CTUNEXISTARTUP_W<12> { - CTUNEXISTARTUP_W::new(self) + pub fn ctunexistartup(&mut self) -> CtunexistartupW { + CtunexistartupW::new(self, 12) } #[doc = "Bits 16:19 - Startup Tuning Capacitance on XO"] #[inline(always)] #[must_use] - pub fn ctunexostartup(&mut self) -> CTUNEXOSTARTUP_W<16> { - CTUNEXOSTARTUP_W::new(self) + pub fn ctunexostartup(&mut self) -> CtunexostartupW { + CtunexostartupW::new(self, 16) } #[doc = "Bits 20:23 - Steady State Timeout"] #[inline(always)] #[must_use] - pub fn timeoutsteady(&mut self) -> TIMEOUTSTEADY_W<20> { - TIMEOUTSTEADY_W::new(self) + pub fn timeoutsteady(&mut self) -> TimeoutsteadyW { + TimeoutsteadyW::new(self, 20) } #[doc = "Bits 24:27 - Core Bias LSB Change Timeout"] #[inline(always)] #[must_use] - pub fn timeoutcblsb(&mut self) -> TIMEOUTCBLSB_W<24> { - TIMEOUTCBLSB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn timeoutcblsb(&mut self) -> TimeoutcblsbW { + TimeoutcblsbW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [xtalcfg](index.html) module"] -pub struct XTALCFG_SPEC; -impl crate::RegisterSpec for XTALCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`xtalcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`xtalcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct XtalcfgSpec; +impl crate::RegisterSpec for XtalcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [xtalcfg::R](R) reader structure"] -impl crate::Readable for XTALCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [xtalcfg::W](W) writer structure"] -impl crate::Writable for XTALCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`xtalcfg::R`](R) reader structure"] +impl crate::Readable for XtalcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`xtalcfg::W`](W) writer structure"] +impl crate::Writable for XtalcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets XTALCFG to value 0x0bb0_0820"] -impl crate::Resettable for XTALCFG_SPEC { - const RESET_VALUE: Self::Ux = 0x0bb0_0820; +impl crate::Resettable for XtalcfgSpec { + const RESET_VALUE: u32 = 0x0bb0_0820; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/xtalctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/xtalctrl.rs index 2b011da..156c4cd 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/xtalctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/xtalctrl.rs @@ -1,305 +1,279 @@ #[doc = "Register `XTALCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `XTALCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `COREBIASANA` reader - Core Bias Current"] -pub type COREBIASANA_R = crate::FieldReader; +pub type CorebiasanaR = crate::FieldReader; #[doc = "Field `COREBIASANA` writer - Core Bias Current"] -pub type COREBIASANA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, XTALCTRL_SPEC, u8, u8, 8, O>; +pub type CorebiasanaW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CTUNEXIANA` reader - Tuning Capacitance on XI"] -pub type CTUNEXIANA_R = crate::FieldReader; +pub type CtunexianaR = crate::FieldReader; #[doc = "Field `CTUNEXIANA` writer - Tuning Capacitance on XI"] -pub type CTUNEXIANA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, XTALCTRL_SPEC, u8, u8, 8, O>; +pub type CtunexianaW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CTUNEXOANA` reader - Tuning Capacitance on XO"] -pub type CTUNEXOANA_R = crate::FieldReader; +pub type CtunexoanaR = crate::FieldReader; #[doc = "Field `CTUNEXOANA` writer - Tuning Capacitance on XO"] -pub type CTUNEXOANA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, XTALCTRL_SPEC, u8, u8, 8, O>; -#[doc = "Field `CTUNEFIXANA` reader - Fixed Tuning Capacitance"] -pub type CTUNEFIXANA_R = crate::FieldReader; +pub type CtunexoanaW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Fixed Tuning Capacitance\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CTUNEFIXANA_A { +pub enum Ctunefixana { #[doc = "0: Remove fixed capacitance on XI and XO nodes"] - NONE = 0, + None = 0, #[doc = "1: Adds fixed capacitance on XI node"] - XI = 1, + Xi = 1, #[doc = "2: Adds fixed capacitance on XO node"] - XO = 2, + Xo = 2, #[doc = "3: Adds fixed capacitance on both XI and XO nodes"] - BOTH = 3, + Both = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CTUNEFIXANA_A) -> Self { + fn from(variant: Ctunefixana) -> Self { variant as _ } } -impl CTUNEFIXANA_R { +impl crate::FieldSpec for Ctunefixana { + type Ux = u8; +} +impl crate::IsEnum for Ctunefixana {} +#[doc = "Field `CTUNEFIXANA` reader - Fixed Tuning Capacitance"] +pub type CtunefixanaR = crate::FieldReader; +impl CtunefixanaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CTUNEFIXANA_A { + pub const fn variant(&self) -> Ctunefixana { match self.bits { - 0 => CTUNEFIXANA_A::NONE, - 1 => CTUNEFIXANA_A::XI, - 2 => CTUNEFIXANA_A::XO, - 3 => CTUNEFIXANA_A::BOTH, + 0 => Ctunefixana::None, + 1 => Ctunefixana::Xi, + 2 => Ctunefixana::Xo, + 3 => Ctunefixana::Both, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Remove fixed capacitance on XI and XO nodes"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CTUNEFIXANA_A::NONE + *self == Ctunefixana::None } - #[doc = "Checks if the value of the field is `XI`"] + #[doc = "Adds fixed capacitance on XI node"] #[inline(always)] pub fn is_xi(&self) -> bool { - *self == CTUNEFIXANA_A::XI + *self == Ctunefixana::Xi } - #[doc = "Checks if the value of the field is `XO`"] + #[doc = "Adds fixed capacitance on XO node"] #[inline(always)] pub fn is_xo(&self) -> bool { - *self == CTUNEFIXANA_A::XO + *self == Ctunefixana::Xo } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Adds fixed capacitance on both XI and XO nodes"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == CTUNEFIXANA_A::BOTH + *self == Ctunefixana::Both } } #[doc = "Field `CTUNEFIXANA` writer - Fixed Tuning Capacitance"] -pub type CTUNEFIXANA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, XTALCTRL_SPEC, u8, CTUNEFIXANA_A, 2, O>; -impl<'a, const O: u8> CTUNEFIXANA_W<'a, O> { +pub type CtunefixanaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Ctunefixana, crate::Safe>; +impl<'a, REG> CtunefixanaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Remove fixed capacitance on XI and XO nodes"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CTUNEFIXANA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Ctunefixana::None) } #[doc = "Adds fixed capacitance on XI node"] #[inline(always)] - pub fn xi(self) -> &'a mut W { - self.variant(CTUNEFIXANA_A::XI) + pub fn xi(self) -> &'a mut crate::W { + self.variant(Ctunefixana::Xi) } #[doc = "Adds fixed capacitance on XO node"] #[inline(always)] - pub fn xo(self) -> &'a mut W { - self.variant(CTUNEFIXANA_A::XO) + pub fn xo(self) -> &'a mut crate::W { + self.variant(Ctunefixana::Xo) } #[doc = "Adds fixed capacitance on both XI and XO nodes"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(CTUNEFIXANA_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Ctunefixana::Both) } } -#[doc = "Field `COREDGENANA` reader - Core Degeneration"] -pub type COREDGENANA_R = crate::FieldReader; #[doc = "Core Degeneration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COREDGENANA_A { +pub enum Coredgenana { #[doc = "0: Do not apply core degeneration resistence"] - NONE = 0, + None = 0, #[doc = "1: Apply 33 ohm core degeneration resistence"] - DGEN33 = 1, + Dgen33 = 1, #[doc = "2: Apply 50 ohm core degeneration resistence"] - DGEN50 = 2, + Dgen50 = 2, #[doc = "3: Apply 100 ohm core degeneration resistence"] - DGEN100 = 3, + Dgen100 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COREDGENANA_A) -> Self { + fn from(variant: Coredgenana) -> Self { variant as _ } } -impl COREDGENANA_R { +impl crate::FieldSpec for Coredgenana { + type Ux = u8; +} +impl crate::IsEnum for Coredgenana {} +#[doc = "Field `COREDGENANA` reader - Core Degeneration"] +pub type CoredgenanaR = crate::FieldReader; +impl CoredgenanaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COREDGENANA_A { + pub const fn variant(&self) -> Coredgenana { match self.bits { - 0 => COREDGENANA_A::NONE, - 1 => COREDGENANA_A::DGEN33, - 2 => COREDGENANA_A::DGEN50, - 3 => COREDGENANA_A::DGEN100, + 0 => Coredgenana::None, + 1 => Coredgenana::Dgen33, + 2 => Coredgenana::Dgen50, + 3 => Coredgenana::Dgen100, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not apply core degeneration resistence"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COREDGENANA_A::NONE + *self == Coredgenana::None } - #[doc = "Checks if the value of the field is `DGEN33`"] + #[doc = "Apply 33 ohm core degeneration resistence"] #[inline(always)] pub fn is_dgen33(&self) -> bool { - *self == COREDGENANA_A::DGEN33 + *self == Coredgenana::Dgen33 } - #[doc = "Checks if the value of the field is `DGEN50`"] + #[doc = "Apply 50 ohm core degeneration resistence"] #[inline(always)] pub fn is_dgen50(&self) -> bool { - *self == COREDGENANA_A::DGEN50 + *self == Coredgenana::Dgen50 } - #[doc = "Checks if the value of the field is `DGEN100`"] + #[doc = "Apply 100 ohm core degeneration resistence"] #[inline(always)] pub fn is_dgen100(&self) -> bool { - *self == COREDGENANA_A::DGEN100 + *self == Coredgenana::Dgen100 } } #[doc = "Field `COREDGENANA` writer - Core Degeneration"] -pub type COREDGENANA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, XTALCTRL_SPEC, u8, COREDGENANA_A, 2, O>; -impl<'a, const O: u8> COREDGENANA_W<'a, O> { +pub type CoredgenanaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Coredgenana, crate::Safe>; +impl<'a, REG> CoredgenanaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Do not apply core degeneration resistence"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COREDGENANA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Coredgenana::None) } #[doc = "Apply 33 ohm core degeneration resistence"] #[inline(always)] - pub fn dgen33(self) -> &'a mut W { - self.variant(COREDGENANA_A::DGEN33) + pub fn dgen33(self) -> &'a mut crate::W { + self.variant(Coredgenana::Dgen33) } #[doc = "Apply 50 ohm core degeneration resistence"] #[inline(always)] - pub fn dgen50(self) -> &'a mut W { - self.variant(COREDGENANA_A::DGEN50) + pub fn dgen50(self) -> &'a mut crate::W { + self.variant(Coredgenana::Dgen50) } #[doc = "Apply 100 ohm core degeneration resistence"] #[inline(always)] - pub fn dgen100(self) -> &'a mut W { - self.variant(COREDGENANA_A::DGEN100) + pub fn dgen100(self) -> &'a mut crate::W { + self.variant(Coredgenana::Dgen100) } } #[doc = "Field `SKIPCOREBIASOPT` reader - Skip Core Bias Optimization"] -pub type SKIPCOREBIASOPT_R = crate::BitReader; +pub type SkipcorebiasoptR = crate::BitReader; #[doc = "Field `SKIPCOREBIASOPT` writer - Skip Core Bias Optimization"] -pub type SKIPCOREBIASOPT_W<'a, const O: u8> = crate::BitWriter<'a, u32, XTALCTRL_SPEC, bool, O>; +pub type SkipcorebiasoptW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:7 - Core Bias Current"] #[inline(always)] - pub fn corebiasana(&self) -> COREBIASANA_R { - COREBIASANA_R::new((self.bits & 0xff) as u8) + pub fn corebiasana(&self) -> CorebiasanaR { + CorebiasanaR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Tuning Capacitance on XI"] #[inline(always)] - pub fn ctunexiana(&self) -> CTUNEXIANA_R { - CTUNEXIANA_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn ctunexiana(&self) -> CtunexianaR { + CtunexianaR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Tuning Capacitance on XO"] #[inline(always)] - pub fn ctunexoana(&self) -> CTUNEXOANA_R { - CTUNEXOANA_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn ctunexoana(&self) -> CtunexoanaR { + CtunexoanaR::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:25 - Fixed Tuning Capacitance"] #[inline(always)] - pub fn ctunefixana(&self) -> CTUNEFIXANA_R { - CTUNEFIXANA_R::new(((self.bits >> 24) & 3) as u8) + pub fn ctunefixana(&self) -> CtunefixanaR { + CtunefixanaR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Core Degeneration"] #[inline(always)] - pub fn coredgenana(&self) -> COREDGENANA_R { - COREDGENANA_R::new(((self.bits >> 26) & 3) as u8) + pub fn coredgenana(&self) -> CoredgenanaR { + CoredgenanaR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bit 31 - Skip Core Bias Optimization"] #[inline(always)] - pub fn skipcorebiasopt(&self) -> SKIPCOREBIASOPT_R { - SKIPCOREBIASOPT_R::new(((self.bits >> 31) & 1) != 0) + pub fn skipcorebiasopt(&self) -> SkipcorebiasoptR { + SkipcorebiasoptR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:7 - Core Bias Current"] #[inline(always)] #[must_use] - pub fn corebiasana(&mut self) -> COREBIASANA_W<0> { - COREBIASANA_W::new(self) + pub fn corebiasana(&mut self) -> CorebiasanaW { + CorebiasanaW::new(self, 0) } #[doc = "Bits 8:15 - Tuning Capacitance on XI"] #[inline(always)] #[must_use] - pub fn ctunexiana(&mut self) -> CTUNEXIANA_W<8> { - CTUNEXIANA_W::new(self) + pub fn ctunexiana(&mut self) -> CtunexianaW { + CtunexianaW::new(self, 8) } #[doc = "Bits 16:23 - Tuning Capacitance on XO"] #[inline(always)] #[must_use] - pub fn ctunexoana(&mut self) -> CTUNEXOANA_W<16> { - CTUNEXOANA_W::new(self) + pub fn ctunexoana(&mut self) -> CtunexoanaW { + CtunexoanaW::new(self, 16) } #[doc = "Bits 24:25 - Fixed Tuning Capacitance"] #[inline(always)] #[must_use] - pub fn ctunefixana(&mut self) -> CTUNEFIXANA_W<24> { - CTUNEFIXANA_W::new(self) + pub fn ctunefixana(&mut self) -> CtunefixanaW { + CtunefixanaW::new(self, 24) } #[doc = "Bits 26:27 - Core Degeneration"] #[inline(always)] #[must_use] - pub fn coredgenana(&mut self) -> COREDGENANA_W<26> { - COREDGENANA_W::new(self) + pub fn coredgenana(&mut self) -> CoredgenanaW { + CoredgenanaW::new(self, 26) } #[doc = "Bit 31 - Skip Core Bias Optimization"] #[inline(always)] #[must_use] - pub fn skipcorebiasopt(&mut self) -> SKIPCOREBIASOPT_W<31> { - SKIPCOREBIASOPT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn skipcorebiasopt(&mut self) -> SkipcorebiasoptW { + SkipcorebiasoptW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [xtalctrl](index.html) module"] -pub struct XTALCTRL_SPEC; -impl crate::RegisterSpec for XTALCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`xtalctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`xtalctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct XtalctrlSpec; +impl crate::RegisterSpec for XtalctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [xtalctrl::R](R) reader structure"] -impl crate::Readable for XTALCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [xtalctrl::W](W) writer structure"] -impl crate::Writable for XTALCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`xtalctrl::R`](R) reader structure"] +impl crate::Readable for XtalctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`xtalctrl::W`](W) writer structure"] +impl crate::Writable for XtalctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets XTALCTRL to value 0x033c_3c3c"] -impl crate::Resettable for XTALCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x033c_3c3c; +impl crate::Resettable for XtalctrlSpec { + const RESET_VALUE: u32 = 0x033c_3c3c; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/xtalctrl1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/xtalctrl1.rs index ae866ee..e06091e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/xtalctrl1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hfxo0_s/xtalctrl1.rs @@ -1,81 +1,40 @@ #[doc = "Register `XTALCTRL1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `XTALCTRL1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CTUNEXIBUFOUTANA` reader - BUFOUT Tuning Capacitance on XI"] -pub type CTUNEXIBUFOUTANA_R = crate::FieldReader; +pub type CtunexibufoutanaR = crate::FieldReader; #[doc = "Field `CTUNEXIBUFOUTANA` writer - BUFOUT Tuning Capacitance on XI"] -pub type CTUNEXIBUFOUTANA_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, XTALCTRL1_SPEC, u8, u8, 8, O>; +pub type CtunexibufoutanaW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - BUFOUT Tuning Capacitance on XI"] #[inline(always)] - pub fn ctunexibufoutana(&self) -> CTUNEXIBUFOUTANA_R { - CTUNEXIBUFOUTANA_R::new((self.bits & 0xff) as u8) + pub fn ctunexibufoutana(&self) -> CtunexibufoutanaR { + CtunexibufoutanaR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - BUFOUT Tuning Capacitance on XI"] #[inline(always)] #[must_use] - pub fn ctunexibufoutana(&mut self) -> CTUNEXIBUFOUTANA_W<0> { - CTUNEXIBUFOUTANA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ctunexibufoutana(&mut self) -> CtunexibufoutanaW { + CtunexibufoutanaW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [xtalctrl1](index.html) module"] -pub struct XTALCTRL1_SPEC; -impl crate::RegisterSpec for XTALCTRL1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`xtalctrl1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`xtalctrl1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Xtalctrl1Spec; +impl crate::RegisterSpec for Xtalctrl1Spec { type Ux = u32; } -#[doc = "`read()` method returns [xtalctrl1::R](R) reader structure"] -impl crate::Readable for XTALCTRL1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [xtalctrl1::W](W) writer structure"] -impl crate::Writable for XTALCTRL1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`xtalctrl1::R`](R) reader structure"] +impl crate::Readable for Xtalctrl1Spec {} +#[doc = "`write(|w| ..)` method takes [`xtalctrl1::W`](W) writer structure"] +impl crate::Writable for Xtalctrl1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets XTALCTRL1 to value 0x3c"] -impl crate::Resettable for XTALCTRL1_SPEC { - const RESET_VALUE: Self::Ux = 0x3c; +impl crate::Resettable for Xtalctrl1Spec { + const RESET_VALUE: u32 = 0x3c; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns.rs index 4d4409d..43f64a8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns.rs @@ -1,41 +1,79 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + msgptr0: Msgptr0, + msgptr1: Msgptr1, + msgptr2: Msgptr2, + msgptr3: Msgptr3, + _reserved4: [u8; 0x30], + if_: If, + ien: Ien, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub msgptr0: MSGPTR0, + #[inline(always)] + pub const fn msgptr0(&self) -> &Msgptr0 { + &self.msgptr0 + } #[doc = "0x04 - No Description"] - pub msgptr1: MSGPTR1, + #[inline(always)] + pub const fn msgptr1(&self) -> &Msgptr1 { + &self.msgptr1 + } #[doc = "0x08 - No Description"] - pub msgptr2: MSGPTR2, + #[inline(always)] + pub const fn msgptr2(&self) -> &Msgptr2 { + &self.msgptr2 + } #[doc = "0x0c - No Description"] - pub msgptr3: MSGPTR3, - _reserved4: [u8; 0x30], + #[inline(always)] + pub const fn msgptr3(&self) -> &Msgptr3 { + &self.msgptr3 + } #[doc = "0x40 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x44 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } } -#[doc = "MSGPTR0 (rw) register accessor: an alias for `Reg`"] -pub type MSGPTR0 = crate::Reg; +#[doc = "MSGPTR0 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`msgptr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`msgptr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msgptr0`] +module"] +#[doc(alias = "MSGPTR0")] +pub type Msgptr0 = crate::Reg; #[doc = "No Description"] pub mod msgptr0; -#[doc = "MSGPTR1 (rw) register accessor: an alias for `Reg`"] -pub type MSGPTR1 = crate::Reg; +#[doc = "MSGPTR1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`msgptr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`msgptr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msgptr1`] +module"] +#[doc(alias = "MSGPTR1")] +pub type Msgptr1 = crate::Reg; #[doc = "No Description"] pub mod msgptr1; -#[doc = "MSGPTR2 (rw) register accessor: an alias for `Reg`"] -pub type MSGPTR2 = crate::Reg; +#[doc = "MSGPTR2 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`msgptr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`msgptr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msgptr2`] +module"] +#[doc(alias = "MSGPTR2")] +pub type Msgptr2 = crate::Reg; #[doc = "No Description"] pub mod msgptr2; -#[doc = "MSGPTR3 (rw) register accessor: an alias for `Reg`"] -pub type MSGPTR3 = crate::Reg; +#[doc = "MSGPTR3 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`msgptr3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`msgptr3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msgptr3`] +module"] +#[doc(alias = "MSGPTR3")] +pub type Msgptr3 = crate::Reg; #[doc = "No Description"] pub mod msgptr3; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns/ien.rs index 20cb65e..48b142d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns/ien.rs @@ -1,125 +1,85 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `MBOXIEN0` reader - Mailbox Interrupt Enable"] -pub type MBOXIEN0_R = crate::BitReader; +pub type Mboxien0R = crate::BitReader; #[doc = "Field `MBOXIEN0` writer - Mailbox Interrupt Enable"] -pub type MBOXIEN0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Mboxien0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MBOXIEN1` reader - Mailbox Interrupt Enable"] -pub type MBOXIEN1_R = crate::BitReader; +pub type Mboxien1R = crate::BitReader; #[doc = "Field `MBOXIEN1` writer - Mailbox Interrupt Enable"] -pub type MBOXIEN1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Mboxien1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MBOXIEN2` reader - Mailbox Interrupt Enable"] -pub type MBOXIEN2_R = crate::BitReader; +pub type Mboxien2R = crate::BitReader; #[doc = "Field `MBOXIEN2` writer - Mailbox Interrupt Enable"] -pub type MBOXIEN2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Mboxien2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MBOXIEN3` reader - Mailbox Interrupt Enable"] -pub type MBOXIEN3_R = crate::BitReader; +pub type Mboxien3R = crate::BitReader; #[doc = "Field `MBOXIEN3` writer - Mailbox Interrupt Enable"] -pub type MBOXIEN3_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Mboxien3W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Mailbox Interrupt Enable"] #[inline(always)] - pub fn mboxien0(&self) -> MBOXIEN0_R { - MBOXIEN0_R::new((self.bits & 1) != 0) + pub fn mboxien0(&self) -> Mboxien0R { + Mboxien0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Mailbox Interrupt Enable"] #[inline(always)] - pub fn mboxien1(&self) -> MBOXIEN1_R { - MBOXIEN1_R::new(((self.bits >> 1) & 1) != 0) + pub fn mboxien1(&self) -> Mboxien1R { + Mboxien1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Mailbox Interrupt Enable"] #[inline(always)] - pub fn mboxien2(&self) -> MBOXIEN2_R { - MBOXIEN2_R::new(((self.bits >> 2) & 1) != 0) + pub fn mboxien2(&self) -> Mboxien2R { + Mboxien2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Mailbox Interrupt Enable"] #[inline(always)] - pub fn mboxien3(&self) -> MBOXIEN3_R { - MBOXIEN3_R::new(((self.bits >> 3) & 1) != 0) + pub fn mboxien3(&self) -> Mboxien3R { + Mboxien3R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Mailbox Interrupt Enable"] #[inline(always)] #[must_use] - pub fn mboxien0(&mut self) -> MBOXIEN0_W<0> { - MBOXIEN0_W::new(self) + pub fn mboxien0(&mut self) -> Mboxien0W { + Mboxien0W::new(self, 0) } #[doc = "Bit 1 - Mailbox Interrupt Enable"] #[inline(always)] #[must_use] - pub fn mboxien1(&mut self) -> MBOXIEN1_W<1> { - MBOXIEN1_W::new(self) + pub fn mboxien1(&mut self) -> Mboxien1W { + Mboxien1W::new(self, 1) } #[doc = "Bit 2 - Mailbox Interrupt Enable"] #[inline(always)] #[must_use] - pub fn mboxien2(&mut self) -> MBOXIEN2_W<2> { - MBOXIEN2_W::new(self) + pub fn mboxien2(&mut self) -> Mboxien2W { + Mboxien2W::new(self, 2) } #[doc = "Bit 3 - Mailbox Interrupt Enable"] #[inline(always)] #[must_use] - pub fn mboxien3(&mut self) -> MBOXIEN3_W<3> { - MBOXIEN3_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn mboxien3(&mut self) -> Mboxien3W { + Mboxien3W::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns/if_.rs index 89953cd..c6daa36 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns/if_.rs @@ -1,125 +1,85 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `MBOXIF0` reader - Mailbox Interupt Flag"] -pub type MBOXIF0_R = crate::BitReader; +pub type Mboxif0R = crate::BitReader; #[doc = "Field `MBOXIF0` writer - Mailbox Interupt Flag"] -pub type MBOXIF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Mboxif0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MBOXIF1` reader - Mailbox Interupt Flag"] -pub type MBOXIF1_R = crate::BitReader; +pub type Mboxif1R = crate::BitReader; #[doc = "Field `MBOXIF1` writer - Mailbox Interupt Flag"] -pub type MBOXIF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Mboxif1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MBOXIF2` reader - Mailbox Interupt Flag"] -pub type MBOXIF2_R = crate::BitReader; +pub type Mboxif2R = crate::BitReader; #[doc = "Field `MBOXIF2` writer - Mailbox Interupt Flag"] -pub type MBOXIF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Mboxif2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MBOXIF3` reader - Mailbox Interupt Flag"] -pub type MBOXIF3_R = crate::BitReader; +pub type Mboxif3R = crate::BitReader; #[doc = "Field `MBOXIF3` writer - Mailbox Interupt Flag"] -pub type MBOXIF3_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Mboxif3W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Mailbox Interupt Flag"] #[inline(always)] - pub fn mboxif0(&self) -> MBOXIF0_R { - MBOXIF0_R::new((self.bits & 1) != 0) + pub fn mboxif0(&self) -> Mboxif0R { + Mboxif0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Mailbox Interupt Flag"] #[inline(always)] - pub fn mboxif1(&self) -> MBOXIF1_R { - MBOXIF1_R::new(((self.bits >> 1) & 1) != 0) + pub fn mboxif1(&self) -> Mboxif1R { + Mboxif1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Mailbox Interupt Flag"] #[inline(always)] - pub fn mboxif2(&self) -> MBOXIF2_R { - MBOXIF2_R::new(((self.bits >> 2) & 1) != 0) + pub fn mboxif2(&self) -> Mboxif2R { + Mboxif2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Mailbox Interupt Flag"] #[inline(always)] - pub fn mboxif3(&self) -> MBOXIF3_R { - MBOXIF3_R::new(((self.bits >> 3) & 1) != 0) + pub fn mboxif3(&self) -> Mboxif3R { + Mboxif3R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Mailbox Interupt Flag"] #[inline(always)] #[must_use] - pub fn mboxif0(&mut self) -> MBOXIF0_W<0> { - MBOXIF0_W::new(self) + pub fn mboxif0(&mut self) -> Mboxif0W { + Mboxif0W::new(self, 0) } #[doc = "Bit 1 - Mailbox Interupt Flag"] #[inline(always)] #[must_use] - pub fn mboxif1(&mut self) -> MBOXIF1_W<1> { - MBOXIF1_W::new(self) + pub fn mboxif1(&mut self) -> Mboxif1W { + Mboxif1W::new(self, 1) } #[doc = "Bit 2 - Mailbox Interupt Flag"] #[inline(always)] #[must_use] - pub fn mboxif2(&mut self) -> MBOXIF2_W<2> { - MBOXIF2_W::new(self) + pub fn mboxif2(&mut self) -> Mboxif2W { + Mboxif2W::new(self, 2) } #[doc = "Bit 3 - Mailbox Interupt Flag"] #[inline(always)] #[must_use] - pub fn mboxif3(&mut self) -> MBOXIF3_W<3> { - MBOXIF3_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn mboxif3(&mut self) -> Mboxif3W { + Mboxif3W::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns/msgptr0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns/msgptr0.rs index 603a56c..0f71d19 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns/msgptr0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns/msgptr0.rs @@ -1,80 +1,40 @@ #[doc = "Register `MSGPTR0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `MSGPTR0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PTR` reader - Pointer"] -pub type PTR_R = crate::FieldReader; +pub type PtrR = crate::FieldReader; #[doc = "Field `PTR` writer - Pointer"] -pub type PTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MSGPTR0_SPEC, u32, u32, 32, O>; +pub type PtrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Pointer"] #[inline(always)] - pub fn ptr(&self) -> PTR_R { - PTR_R::new(self.bits) + pub fn ptr(&self) -> PtrR { + PtrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Pointer"] #[inline(always)] #[must_use] - pub fn ptr(&mut self) -> PTR_W<0> { - PTR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ptr(&mut self) -> PtrW { + PtrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [msgptr0](index.html) module"] -pub struct MSGPTR0_SPEC; -impl crate::RegisterSpec for MSGPTR0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`msgptr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`msgptr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Msgptr0Spec; +impl crate::RegisterSpec for Msgptr0Spec { type Ux = u32; } -#[doc = "`read()` method returns [msgptr0::R](R) reader structure"] -impl crate::Readable for MSGPTR0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [msgptr0::W](W) writer structure"] -impl crate::Writable for MSGPTR0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`msgptr0::R`](R) reader structure"] +impl crate::Readable for Msgptr0Spec {} +#[doc = "`write(|w| ..)` method takes [`msgptr0::W`](W) writer structure"] +impl crate::Writable for Msgptr0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MSGPTR0 to value 0"] -impl crate::Resettable for MSGPTR0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Msgptr0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns/msgptr1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns/msgptr1.rs index 0378ee2..54b154f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns/msgptr1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns/msgptr1.rs @@ -1,80 +1,40 @@ #[doc = "Register `MSGPTR1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `MSGPTR1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PTR` reader - Pointer"] -pub type PTR_R = crate::FieldReader; +pub type PtrR = crate::FieldReader; #[doc = "Field `PTR` writer - Pointer"] -pub type PTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MSGPTR1_SPEC, u32, u32, 32, O>; +pub type PtrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Pointer"] #[inline(always)] - pub fn ptr(&self) -> PTR_R { - PTR_R::new(self.bits) + pub fn ptr(&self) -> PtrR { + PtrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Pointer"] #[inline(always)] #[must_use] - pub fn ptr(&mut self) -> PTR_W<0> { - PTR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ptr(&mut self) -> PtrW { + PtrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [msgptr1](index.html) module"] -pub struct MSGPTR1_SPEC; -impl crate::RegisterSpec for MSGPTR1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`msgptr1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`msgptr1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Msgptr1Spec; +impl crate::RegisterSpec for Msgptr1Spec { type Ux = u32; } -#[doc = "`read()` method returns [msgptr1::R](R) reader structure"] -impl crate::Readable for MSGPTR1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [msgptr1::W](W) writer structure"] -impl crate::Writable for MSGPTR1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`msgptr1::R`](R) reader structure"] +impl crate::Readable for Msgptr1Spec {} +#[doc = "`write(|w| ..)` method takes [`msgptr1::W`](W) writer structure"] +impl crate::Writable for Msgptr1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MSGPTR1 to value 0"] -impl crate::Resettable for MSGPTR1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Msgptr1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns/msgptr2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns/msgptr2.rs index d261091..d33c7d5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns/msgptr2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns/msgptr2.rs @@ -1,80 +1,40 @@ #[doc = "Register `MSGPTR2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `MSGPTR2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PTR` reader - Pointer"] -pub type PTR_R = crate::FieldReader; +pub type PtrR = crate::FieldReader; #[doc = "Field `PTR` writer - Pointer"] -pub type PTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MSGPTR2_SPEC, u32, u32, 32, O>; +pub type PtrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Pointer"] #[inline(always)] - pub fn ptr(&self) -> PTR_R { - PTR_R::new(self.bits) + pub fn ptr(&self) -> PtrR { + PtrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Pointer"] #[inline(always)] #[must_use] - pub fn ptr(&mut self) -> PTR_W<0> { - PTR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ptr(&mut self) -> PtrW { + PtrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [msgptr2](index.html) module"] -pub struct MSGPTR2_SPEC; -impl crate::RegisterSpec for MSGPTR2_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`msgptr2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`msgptr2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Msgptr2Spec; +impl crate::RegisterSpec for Msgptr2Spec { type Ux = u32; } -#[doc = "`read()` method returns [msgptr2::R](R) reader structure"] -impl crate::Readable for MSGPTR2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [msgptr2::W](W) writer structure"] -impl crate::Writable for MSGPTR2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`msgptr2::R`](R) reader structure"] +impl crate::Readable for Msgptr2Spec {} +#[doc = "`write(|w| ..)` method takes [`msgptr2::W`](W) writer structure"] +impl crate::Writable for Msgptr2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MSGPTR2 to value 0"] -impl crate::Resettable for MSGPTR2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Msgptr2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns/msgptr3.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns/msgptr3.rs index aaec726..43eb72b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns/msgptr3.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_ns/msgptr3.rs @@ -1,80 +1,40 @@ #[doc = "Register `MSGPTR3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `MSGPTR3` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PTR` reader - Pointer"] -pub type PTR_R = crate::FieldReader; +pub type PtrR = crate::FieldReader; #[doc = "Field `PTR` writer - Pointer"] -pub type PTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MSGPTR3_SPEC, u32, u32, 32, O>; +pub type PtrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Pointer"] #[inline(always)] - pub fn ptr(&self) -> PTR_R { - PTR_R::new(self.bits) + pub fn ptr(&self) -> PtrR { + PtrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Pointer"] #[inline(always)] #[must_use] - pub fn ptr(&mut self) -> PTR_W<0> { - PTR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ptr(&mut self) -> PtrW { + PtrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [msgptr3](index.html) module"] -pub struct MSGPTR3_SPEC; -impl crate::RegisterSpec for MSGPTR3_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`msgptr3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`msgptr3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Msgptr3Spec; +impl crate::RegisterSpec for Msgptr3Spec { type Ux = u32; } -#[doc = "`read()` method returns [msgptr3::R](R) reader structure"] -impl crate::Readable for MSGPTR3_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [msgptr3::W](W) writer structure"] -impl crate::Writable for MSGPTR3_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`msgptr3::R`](R) reader structure"] +impl crate::Readable for Msgptr3Spec {} +#[doc = "`write(|w| ..)` method takes [`msgptr3::W`](W) writer structure"] +impl crate::Writable for Msgptr3Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MSGPTR3 to value 0"] -impl crate::Resettable for MSGPTR3_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Msgptr3Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s.rs index 4d4409d..43f64a8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s.rs @@ -1,41 +1,79 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + msgptr0: Msgptr0, + msgptr1: Msgptr1, + msgptr2: Msgptr2, + msgptr3: Msgptr3, + _reserved4: [u8; 0x30], + if_: If, + ien: Ien, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub msgptr0: MSGPTR0, + #[inline(always)] + pub const fn msgptr0(&self) -> &Msgptr0 { + &self.msgptr0 + } #[doc = "0x04 - No Description"] - pub msgptr1: MSGPTR1, + #[inline(always)] + pub const fn msgptr1(&self) -> &Msgptr1 { + &self.msgptr1 + } #[doc = "0x08 - No Description"] - pub msgptr2: MSGPTR2, + #[inline(always)] + pub const fn msgptr2(&self) -> &Msgptr2 { + &self.msgptr2 + } #[doc = "0x0c - No Description"] - pub msgptr3: MSGPTR3, - _reserved4: [u8; 0x30], + #[inline(always)] + pub const fn msgptr3(&self) -> &Msgptr3 { + &self.msgptr3 + } #[doc = "0x40 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x44 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } } -#[doc = "MSGPTR0 (rw) register accessor: an alias for `Reg`"] -pub type MSGPTR0 = crate::Reg; +#[doc = "MSGPTR0 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`msgptr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`msgptr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msgptr0`] +module"] +#[doc(alias = "MSGPTR0")] +pub type Msgptr0 = crate::Reg; #[doc = "No Description"] pub mod msgptr0; -#[doc = "MSGPTR1 (rw) register accessor: an alias for `Reg`"] -pub type MSGPTR1 = crate::Reg; +#[doc = "MSGPTR1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`msgptr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`msgptr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msgptr1`] +module"] +#[doc(alias = "MSGPTR1")] +pub type Msgptr1 = crate::Reg; #[doc = "No Description"] pub mod msgptr1; -#[doc = "MSGPTR2 (rw) register accessor: an alias for `Reg`"] -pub type MSGPTR2 = crate::Reg; +#[doc = "MSGPTR2 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`msgptr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`msgptr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msgptr2`] +module"] +#[doc(alias = "MSGPTR2")] +pub type Msgptr2 = crate::Reg; #[doc = "No Description"] pub mod msgptr2; -#[doc = "MSGPTR3 (rw) register accessor: an alias for `Reg`"] -pub type MSGPTR3 = crate::Reg; +#[doc = "MSGPTR3 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`msgptr3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`msgptr3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msgptr3`] +module"] +#[doc(alias = "MSGPTR3")] +pub type Msgptr3 = crate::Reg; #[doc = "No Description"] pub mod msgptr3; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s/ien.rs index 20cb65e..48b142d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s/ien.rs @@ -1,125 +1,85 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `MBOXIEN0` reader - Mailbox Interrupt Enable"] -pub type MBOXIEN0_R = crate::BitReader; +pub type Mboxien0R = crate::BitReader; #[doc = "Field `MBOXIEN0` writer - Mailbox Interrupt Enable"] -pub type MBOXIEN0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Mboxien0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MBOXIEN1` reader - Mailbox Interrupt Enable"] -pub type MBOXIEN1_R = crate::BitReader; +pub type Mboxien1R = crate::BitReader; #[doc = "Field `MBOXIEN1` writer - Mailbox Interrupt Enable"] -pub type MBOXIEN1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Mboxien1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MBOXIEN2` reader - Mailbox Interrupt Enable"] -pub type MBOXIEN2_R = crate::BitReader; +pub type Mboxien2R = crate::BitReader; #[doc = "Field `MBOXIEN2` writer - Mailbox Interrupt Enable"] -pub type MBOXIEN2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Mboxien2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MBOXIEN3` reader - Mailbox Interrupt Enable"] -pub type MBOXIEN3_R = crate::BitReader; +pub type Mboxien3R = crate::BitReader; #[doc = "Field `MBOXIEN3` writer - Mailbox Interrupt Enable"] -pub type MBOXIEN3_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Mboxien3W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Mailbox Interrupt Enable"] #[inline(always)] - pub fn mboxien0(&self) -> MBOXIEN0_R { - MBOXIEN0_R::new((self.bits & 1) != 0) + pub fn mboxien0(&self) -> Mboxien0R { + Mboxien0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Mailbox Interrupt Enable"] #[inline(always)] - pub fn mboxien1(&self) -> MBOXIEN1_R { - MBOXIEN1_R::new(((self.bits >> 1) & 1) != 0) + pub fn mboxien1(&self) -> Mboxien1R { + Mboxien1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Mailbox Interrupt Enable"] #[inline(always)] - pub fn mboxien2(&self) -> MBOXIEN2_R { - MBOXIEN2_R::new(((self.bits >> 2) & 1) != 0) + pub fn mboxien2(&self) -> Mboxien2R { + Mboxien2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Mailbox Interrupt Enable"] #[inline(always)] - pub fn mboxien3(&self) -> MBOXIEN3_R { - MBOXIEN3_R::new(((self.bits >> 3) & 1) != 0) + pub fn mboxien3(&self) -> Mboxien3R { + Mboxien3R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Mailbox Interrupt Enable"] #[inline(always)] #[must_use] - pub fn mboxien0(&mut self) -> MBOXIEN0_W<0> { - MBOXIEN0_W::new(self) + pub fn mboxien0(&mut self) -> Mboxien0W { + Mboxien0W::new(self, 0) } #[doc = "Bit 1 - Mailbox Interrupt Enable"] #[inline(always)] #[must_use] - pub fn mboxien1(&mut self) -> MBOXIEN1_W<1> { - MBOXIEN1_W::new(self) + pub fn mboxien1(&mut self) -> Mboxien1W { + Mboxien1W::new(self, 1) } #[doc = "Bit 2 - Mailbox Interrupt Enable"] #[inline(always)] #[must_use] - pub fn mboxien2(&mut self) -> MBOXIEN2_W<2> { - MBOXIEN2_W::new(self) + pub fn mboxien2(&mut self) -> Mboxien2W { + Mboxien2W::new(self, 2) } #[doc = "Bit 3 - Mailbox Interrupt Enable"] #[inline(always)] #[must_use] - pub fn mboxien3(&mut self) -> MBOXIEN3_W<3> { - MBOXIEN3_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn mboxien3(&mut self) -> Mboxien3W { + Mboxien3W::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s/if_.rs index 89953cd..c6daa36 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s/if_.rs @@ -1,125 +1,85 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `MBOXIF0` reader - Mailbox Interupt Flag"] -pub type MBOXIF0_R = crate::BitReader; +pub type Mboxif0R = crate::BitReader; #[doc = "Field `MBOXIF0` writer - Mailbox Interupt Flag"] -pub type MBOXIF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Mboxif0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MBOXIF1` reader - Mailbox Interupt Flag"] -pub type MBOXIF1_R = crate::BitReader; +pub type Mboxif1R = crate::BitReader; #[doc = "Field `MBOXIF1` writer - Mailbox Interupt Flag"] -pub type MBOXIF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Mboxif1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MBOXIF2` reader - Mailbox Interupt Flag"] -pub type MBOXIF2_R = crate::BitReader; +pub type Mboxif2R = crate::BitReader; #[doc = "Field `MBOXIF2` writer - Mailbox Interupt Flag"] -pub type MBOXIF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Mboxif2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MBOXIF3` reader - Mailbox Interupt Flag"] -pub type MBOXIF3_R = crate::BitReader; +pub type Mboxif3R = crate::BitReader; #[doc = "Field `MBOXIF3` writer - Mailbox Interupt Flag"] -pub type MBOXIF3_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Mboxif3W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Mailbox Interupt Flag"] #[inline(always)] - pub fn mboxif0(&self) -> MBOXIF0_R { - MBOXIF0_R::new((self.bits & 1) != 0) + pub fn mboxif0(&self) -> Mboxif0R { + Mboxif0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Mailbox Interupt Flag"] #[inline(always)] - pub fn mboxif1(&self) -> MBOXIF1_R { - MBOXIF1_R::new(((self.bits >> 1) & 1) != 0) + pub fn mboxif1(&self) -> Mboxif1R { + Mboxif1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Mailbox Interupt Flag"] #[inline(always)] - pub fn mboxif2(&self) -> MBOXIF2_R { - MBOXIF2_R::new(((self.bits >> 2) & 1) != 0) + pub fn mboxif2(&self) -> Mboxif2R { + Mboxif2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Mailbox Interupt Flag"] #[inline(always)] - pub fn mboxif3(&self) -> MBOXIF3_R { - MBOXIF3_R::new(((self.bits >> 3) & 1) != 0) + pub fn mboxif3(&self) -> Mboxif3R { + Mboxif3R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Mailbox Interupt Flag"] #[inline(always)] #[must_use] - pub fn mboxif0(&mut self) -> MBOXIF0_W<0> { - MBOXIF0_W::new(self) + pub fn mboxif0(&mut self) -> Mboxif0W { + Mboxif0W::new(self, 0) } #[doc = "Bit 1 - Mailbox Interupt Flag"] #[inline(always)] #[must_use] - pub fn mboxif1(&mut self) -> MBOXIF1_W<1> { - MBOXIF1_W::new(self) + pub fn mboxif1(&mut self) -> Mboxif1W { + Mboxif1W::new(self, 1) } #[doc = "Bit 2 - Mailbox Interupt Flag"] #[inline(always)] #[must_use] - pub fn mboxif2(&mut self) -> MBOXIF2_W<2> { - MBOXIF2_W::new(self) + pub fn mboxif2(&mut self) -> Mboxif2W { + Mboxif2W::new(self, 2) } #[doc = "Bit 3 - Mailbox Interupt Flag"] #[inline(always)] #[must_use] - pub fn mboxif3(&mut self) -> MBOXIF3_W<3> { - MBOXIF3_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn mboxif3(&mut self) -> Mboxif3W { + Mboxif3W::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s/msgptr0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s/msgptr0.rs index 603a56c..0f71d19 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s/msgptr0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s/msgptr0.rs @@ -1,80 +1,40 @@ #[doc = "Register `MSGPTR0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `MSGPTR0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PTR` reader - Pointer"] -pub type PTR_R = crate::FieldReader; +pub type PtrR = crate::FieldReader; #[doc = "Field `PTR` writer - Pointer"] -pub type PTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MSGPTR0_SPEC, u32, u32, 32, O>; +pub type PtrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Pointer"] #[inline(always)] - pub fn ptr(&self) -> PTR_R { - PTR_R::new(self.bits) + pub fn ptr(&self) -> PtrR { + PtrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Pointer"] #[inline(always)] #[must_use] - pub fn ptr(&mut self) -> PTR_W<0> { - PTR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ptr(&mut self) -> PtrW { + PtrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [msgptr0](index.html) module"] -pub struct MSGPTR0_SPEC; -impl crate::RegisterSpec for MSGPTR0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`msgptr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`msgptr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Msgptr0Spec; +impl crate::RegisterSpec for Msgptr0Spec { type Ux = u32; } -#[doc = "`read()` method returns [msgptr0::R](R) reader structure"] -impl crate::Readable for MSGPTR0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [msgptr0::W](W) writer structure"] -impl crate::Writable for MSGPTR0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`msgptr0::R`](R) reader structure"] +impl crate::Readable for Msgptr0Spec {} +#[doc = "`write(|w| ..)` method takes [`msgptr0::W`](W) writer structure"] +impl crate::Writable for Msgptr0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MSGPTR0 to value 0"] -impl crate::Resettable for MSGPTR0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Msgptr0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s/msgptr1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s/msgptr1.rs index 0378ee2..54b154f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s/msgptr1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s/msgptr1.rs @@ -1,80 +1,40 @@ #[doc = "Register `MSGPTR1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `MSGPTR1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PTR` reader - Pointer"] -pub type PTR_R = crate::FieldReader; +pub type PtrR = crate::FieldReader; #[doc = "Field `PTR` writer - Pointer"] -pub type PTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MSGPTR1_SPEC, u32, u32, 32, O>; +pub type PtrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Pointer"] #[inline(always)] - pub fn ptr(&self) -> PTR_R { - PTR_R::new(self.bits) + pub fn ptr(&self) -> PtrR { + PtrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Pointer"] #[inline(always)] #[must_use] - pub fn ptr(&mut self) -> PTR_W<0> { - PTR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ptr(&mut self) -> PtrW { + PtrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [msgptr1](index.html) module"] -pub struct MSGPTR1_SPEC; -impl crate::RegisterSpec for MSGPTR1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`msgptr1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`msgptr1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Msgptr1Spec; +impl crate::RegisterSpec for Msgptr1Spec { type Ux = u32; } -#[doc = "`read()` method returns [msgptr1::R](R) reader structure"] -impl crate::Readable for MSGPTR1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [msgptr1::W](W) writer structure"] -impl crate::Writable for MSGPTR1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`msgptr1::R`](R) reader structure"] +impl crate::Readable for Msgptr1Spec {} +#[doc = "`write(|w| ..)` method takes [`msgptr1::W`](W) writer structure"] +impl crate::Writable for Msgptr1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MSGPTR1 to value 0"] -impl crate::Resettable for MSGPTR1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Msgptr1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s/msgptr2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s/msgptr2.rs index d261091..d33c7d5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s/msgptr2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s/msgptr2.rs @@ -1,80 +1,40 @@ #[doc = "Register `MSGPTR2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `MSGPTR2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PTR` reader - Pointer"] -pub type PTR_R = crate::FieldReader; +pub type PtrR = crate::FieldReader; #[doc = "Field `PTR` writer - Pointer"] -pub type PTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MSGPTR2_SPEC, u32, u32, 32, O>; +pub type PtrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Pointer"] #[inline(always)] - pub fn ptr(&self) -> PTR_R { - PTR_R::new(self.bits) + pub fn ptr(&self) -> PtrR { + PtrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Pointer"] #[inline(always)] #[must_use] - pub fn ptr(&mut self) -> PTR_W<0> { - PTR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ptr(&mut self) -> PtrW { + PtrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [msgptr2](index.html) module"] -pub struct MSGPTR2_SPEC; -impl crate::RegisterSpec for MSGPTR2_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`msgptr2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`msgptr2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Msgptr2Spec; +impl crate::RegisterSpec for Msgptr2Spec { type Ux = u32; } -#[doc = "`read()` method returns [msgptr2::R](R) reader structure"] -impl crate::Readable for MSGPTR2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [msgptr2::W](W) writer structure"] -impl crate::Writable for MSGPTR2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`msgptr2::R`](R) reader structure"] +impl crate::Readable for Msgptr2Spec {} +#[doc = "`write(|w| ..)` method takes [`msgptr2::W`](W) writer structure"] +impl crate::Writable for Msgptr2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MSGPTR2 to value 0"] -impl crate::Resettable for MSGPTR2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Msgptr2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s/msgptr3.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s/msgptr3.rs index aaec726..43eb72b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s/msgptr3.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/hostmailbox_s/msgptr3.rs @@ -1,80 +1,40 @@ #[doc = "Register `MSGPTR3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `MSGPTR3` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PTR` reader - Pointer"] -pub type PTR_R = crate::FieldReader; +pub type PtrR = crate::FieldReader; #[doc = "Field `PTR` writer - Pointer"] -pub type PTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MSGPTR3_SPEC, u32, u32, 32, O>; +pub type PtrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Pointer"] #[inline(always)] - pub fn ptr(&self) -> PTR_R { - PTR_R::new(self.bits) + pub fn ptr(&self) -> PtrR { + PtrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Pointer"] #[inline(always)] #[must_use] - pub fn ptr(&mut self) -> PTR_W<0> { - PTR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ptr(&mut self) -> PtrW { + PtrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [msgptr3](index.html) module"] -pub struct MSGPTR3_SPEC; -impl crate::RegisterSpec for MSGPTR3_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`msgptr3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`msgptr3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Msgptr3Spec; +impl crate::RegisterSpec for Msgptr3Spec { type Ux = u32; } -#[doc = "`read()` method returns [msgptr3::R](R) reader structure"] -impl crate::Readable for MSGPTR3_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [msgptr3::W](W) writer structure"] -impl crate::Writable for MSGPTR3_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`msgptr3::R`](R) reader structure"] +impl crate::Readable for Msgptr3Spec {} +#[doc = "`write(|w| ..)` method takes [`msgptr3::W`](W) writer structure"] +impl crate::Writable for Msgptr3Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MSGPTR3 to value 0"] -impl crate::Resettable for MSGPTR3_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Msgptr3Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns.rs index 0538763..94a4ce5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns.rs @@ -1,106 +1,210 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + ctrl: Ctrl, + cmd: Cmd, + state: State, + status: Status, + clkdiv: Clkdiv, + saddr: Saddr, + saddrmask: Saddrmask, + rxdata: Rxdata, + rxdouble: Rxdouble, + rxdatap: Rxdatap, + rxdoublep: Rxdoublep, + txdata: Txdata, + txdouble: Txdouble, + if_: If, + ien: Ien, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x0c - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x10 - No Description"] - pub state: STATE, + #[inline(always)] + pub const fn state(&self) -> &State { + &self.state + } #[doc = "0x14 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x18 - No Description"] - pub clkdiv: CLKDIV, + #[inline(always)] + pub const fn clkdiv(&self) -> &Clkdiv { + &self.clkdiv + } #[doc = "0x1c - No Description"] - pub saddr: SADDR, + #[inline(always)] + pub const fn saddr(&self) -> &Saddr { + &self.saddr + } #[doc = "0x20 - No Description"] - pub saddrmask: SADDRMASK, + #[inline(always)] + pub const fn saddrmask(&self) -> &Saddrmask { + &self.saddrmask + } #[doc = "0x24 - No Description"] - pub rxdata: RXDATA, + #[inline(always)] + pub const fn rxdata(&self) -> &Rxdata { + &self.rxdata + } #[doc = "0x28 - No Description"] - pub rxdouble: RXDOUBLE, + #[inline(always)] + pub const fn rxdouble(&self) -> &Rxdouble { + &self.rxdouble + } #[doc = "0x2c - No Description"] - pub rxdatap: RXDATAP, + #[inline(always)] + pub const fn rxdatap(&self) -> &Rxdatap { + &self.rxdatap + } #[doc = "0x30 - No Description"] - pub rxdoublep: RXDOUBLEP, + #[inline(always)] + pub const fn rxdoublep(&self) -> &Rxdoublep { + &self.rxdoublep + } #[doc = "0x34 - No Description"] - pub txdata: TXDATA, + #[inline(always)] + pub const fn txdata(&self) -> &Txdata { + &self.txdata + } #[doc = "0x38 - No Description"] - pub txdouble: TXDOUBLE, + #[inline(always)] + pub const fn txdouble(&self) -> &Txdouble { + &self.txdouble + } #[doc = "0x3c - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x40 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATE (r) register accessor: an alias for `Reg`"] -pub type STATE = crate::Reg; +#[doc = "STATE (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`state::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@state`] +module"] +#[doc(alias = "STATE")] +pub type State = crate::Reg; #[doc = "No Description"] pub mod state; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "CLKDIV (rw) register accessor: an alias for `Reg`"] -pub type CLKDIV = crate::Reg; +#[doc = "CLKDIV (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv`] +module"] +#[doc(alias = "CLKDIV")] +pub type Clkdiv = crate::Reg; #[doc = "No Description"] pub mod clkdiv; -#[doc = "SADDR (rw) register accessor: an alias for `Reg`"] -pub type SADDR = crate::Reg; +#[doc = "SADDR (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`saddr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`saddr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@saddr`] +module"] +#[doc(alias = "SADDR")] +pub type Saddr = crate::Reg; #[doc = "No Description"] pub mod saddr; -#[doc = "SADDRMASK (rw) register accessor: an alias for `Reg`"] -pub type SADDRMASK = crate::Reg; +#[doc = "SADDRMASK (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`saddrmask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`saddrmask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@saddrmask`] +module"] +#[doc(alias = "SADDRMASK")] +pub type Saddrmask = crate::Reg; #[doc = "No Description"] pub mod saddrmask; -#[doc = "RXDATA (r) register accessor: an alias for `Reg`"] -pub type RXDATA = crate::Reg; +#[doc = "RXDATA (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdata::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdata`] +module"] +#[doc(alias = "RXDATA")] +pub type Rxdata = crate::Reg; #[doc = "No Description"] pub mod rxdata; -#[doc = "RXDOUBLE (r) register accessor: an alias for `Reg`"] -pub type RXDOUBLE = crate::Reg; +#[doc = "RXDOUBLE (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdouble::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdouble`] +module"] +#[doc(alias = "RXDOUBLE")] +pub type Rxdouble = crate::Reg; #[doc = "No Description"] pub mod rxdouble; -#[doc = "RXDATAP (r) register accessor: an alias for `Reg`"] -pub type RXDATAP = crate::Reg; +#[doc = "RXDATAP (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdatap::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdatap`] +module"] +#[doc(alias = "RXDATAP")] +pub type Rxdatap = crate::Reg; #[doc = "No Description"] pub mod rxdatap; -#[doc = "RXDOUBLEP (r) register accessor: an alias for `Reg`"] -pub type RXDOUBLEP = crate::Reg; +#[doc = "RXDOUBLEP (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdoublep::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdoublep`] +module"] +#[doc(alias = "RXDOUBLEP")] +pub type Rxdoublep = crate::Reg; #[doc = "No Description"] pub mod rxdoublep; -#[doc = "TXDATA (w) register accessor: an alias for `Reg`"] -pub type TXDATA = crate::Reg; +#[doc = "TXDATA (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdata::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txdata`] +module"] +#[doc(alias = "TXDATA")] +pub type Txdata = crate::Reg; #[doc = "No Description"] pub mod txdata; -#[doc = "TXDOUBLE (w) register accessor: an alias for `Reg`"] -pub type TXDOUBLE = crate::Reg; +#[doc = "TXDOUBLE (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdouble::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txdouble`] +module"] +#[doc(alias = "TXDOUBLE")] +pub type Txdouble = crate::Reg; #[doc = "No Description"] pub mod txdouble; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/clkdiv.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/clkdiv.rs index 90aa445..7b64d88 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/clkdiv.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/clkdiv.rs @@ -1,80 +1,40 @@ #[doc = "Register `CLKDIV` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKDIV` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DIV` reader - Clock Divider"] -pub type DIV_R = crate::FieldReader; +pub type DivR = crate::FieldReader; #[doc = "Field `DIV` writer - Clock Divider"] -pub type DIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CLKDIV_SPEC, u16, u16, 9, O>; +pub type DivW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; impl R { #[doc = "Bits 0:8 - Clock Divider"] #[inline(always)] - pub fn div(&self) -> DIV_R { - DIV_R::new((self.bits & 0x01ff) as u16) + pub fn div(&self) -> DivR { + DivR::new((self.bits & 0x01ff) as u16) } } impl W { #[doc = "Bits 0:8 - Clock Divider"] #[inline(always)] #[must_use] - pub fn div(&mut self) -> DIV_W<0> { - DIV_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn div(&mut self) -> DivW { + DivW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clkdiv](index.html) module"] -pub struct CLKDIV_SPEC; -impl crate::RegisterSpec for CLKDIV_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ClkdivSpec; +impl crate::RegisterSpec for ClkdivSpec { type Ux = u32; } -#[doc = "`read()` method returns [clkdiv::R](R) reader structure"] -impl crate::Readable for CLKDIV_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clkdiv::W](W) writer structure"] -impl crate::Writable for CLKDIV_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`clkdiv::R`](R) reader structure"] +impl crate::Readable for ClkdivSpec {} +#[doc = "`write(|w| ..)` method takes [`clkdiv::W`](W) writer structure"] +impl crate::Writable for ClkdivSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV to value 0"] -impl crate::Resettable for CLKDIV_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ClkdivSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/cmd.rs index 57a4f73..d935390 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/cmd.rs @@ -1,108 +1,83 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` writer - Send start condition"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STOP` writer - Send stop condition"] -pub type STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACK` writer - Send ACK"] -pub type ACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type AckW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NACK` writer - Send NACK"] -pub type NACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type NackW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CONT` writer - Continue transmission"] -pub type CONT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type ContW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ABORT` writer - Abort transmission"] -pub type ABORT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type AbortW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEARTX` writer - Clear TX"] -pub type CLEARTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type CleartxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEARPC` writer - Clear Pending Commands"] -pub type CLEARPC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type ClearpcW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Send start condition"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Send stop condition"] #[inline(always)] #[must_use] - pub fn stop(&mut self) -> STOP_W<1> { - STOP_W::new(self) + pub fn stop(&mut self) -> StopW { + StopW::new(self, 1) } #[doc = "Bit 2 - Send ACK"] #[inline(always)] #[must_use] - pub fn ack(&mut self) -> ACK_W<2> { - ACK_W::new(self) + pub fn ack(&mut self) -> AckW { + AckW::new(self, 2) } #[doc = "Bit 3 - Send NACK"] #[inline(always)] #[must_use] - pub fn nack(&mut self) -> NACK_W<3> { - NACK_W::new(self) + pub fn nack(&mut self) -> NackW { + NackW::new(self, 3) } #[doc = "Bit 4 - Continue transmission"] #[inline(always)] #[must_use] - pub fn cont(&mut self) -> CONT_W<4> { - CONT_W::new(self) + pub fn cont(&mut self) -> ContW { + ContW::new(self, 4) } #[doc = "Bit 5 - Abort transmission"] #[inline(always)] #[must_use] - pub fn abort(&mut self) -> ABORT_W<5> { - ABORT_W::new(self) + pub fn abort(&mut self) -> AbortW { + AbortW::new(self, 5) } #[doc = "Bit 6 - Clear TX"] #[inline(always)] #[must_use] - pub fn cleartx(&mut self) -> CLEARTX_W<6> { - CLEARTX_W::new(self) + pub fn cleartx(&mut self) -> CleartxW { + CleartxW::new(self, 6) } #[doc = "Bit 7 - Clear Pending Commands"] #[inline(always)] #[must_use] - pub fn clearpc(&mut self) -> CLEARPC_W<7> { - CLEARPC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clearpc(&mut self) -> ClearpcW { + ClearpcW::new(self, 7) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/ctrl.rs index b334eef..8e17ecb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/ctrl.rs @@ -1,1016 +1,1033 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CORERST` reader - Soft Reset the internal state registers"] -pub type CORERST_R = crate::BitReader; +pub type W = crate::W; #[doc = "Soft Reset the internal state registers\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CORERST_A { +pub enum Corerst { #[doc = "0: No change to internal state registers"] - DISABLE = 0, + Disable = 0, #[doc = "1: Reset the internal state registers"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CORERST_A) -> Self { + fn from(variant: Corerst) -> Self { variant as u8 != 0 } } -impl CORERST_R { +#[doc = "Field `CORERST` reader - Soft Reset the internal state registers"] +pub type CorerstR = crate::BitReader; +impl CorerstR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CORERST_A { + pub const fn variant(&self) -> Corerst { match self.bits { - false => CORERST_A::DISABLE, - true => CORERST_A::ENABLE, + false => Corerst::Disable, + true => Corerst::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "No change to internal state registers"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CORERST_A::DISABLE + *self == Corerst::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Reset the internal state registers"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CORERST_A::ENABLE + *self == Corerst::Enable } } #[doc = "Field `CORERST` writer - Soft Reset the internal state registers"] -pub type CORERST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, CORERST_A, O>; -impl<'a, const O: u8> CORERST_W<'a, O> { +pub type CorerstW<'a, REG> = crate::BitWriter<'a, REG, Corerst>; +impl<'a, REG> CorerstW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No change to internal state registers"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CORERST_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Corerst::Disable) } #[doc = "Reset the internal state registers"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CORERST_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Corerst::Enable) } } -#[doc = "Field `SLAVE` reader - Addressable as Follower"] -pub type SLAVE_R = crate::BitReader; #[doc = "Addressable as Follower\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SLAVE_A { +pub enum Slave { #[doc = "0: All addresses will be responded to with a NACK"] - DISABLE = 0, + Disable = 0, #[doc = "1: Addresses matching the programmed follower address or the general call address (if enabled) require a response from software. Other addresses are automatically responded to with a NACK."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SLAVE_A) -> Self { + fn from(variant: Slave) -> Self { variant as u8 != 0 } } -impl SLAVE_R { +#[doc = "Field `SLAVE` reader - Addressable as Follower"] +pub type SlaveR = crate::BitReader; +impl SlaveR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SLAVE_A { + pub const fn variant(&self) -> Slave { match self.bits { - false => SLAVE_A::DISABLE, - true => SLAVE_A::ENABLE, + false => Slave::Disable, + true => Slave::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "All addresses will be responded to with a NACK"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == SLAVE_A::DISABLE + *self == Slave::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Addresses matching the programmed follower address or the general call address (if enabled) require a response from software. Other addresses are automatically responded to with a NACK."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == SLAVE_A::ENABLE + *self == Slave::Enable } } #[doc = "Field `SLAVE` writer - Addressable as Follower"] -pub type SLAVE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, SLAVE_A, O>; -impl<'a, const O: u8> SLAVE_W<'a, O> { +pub type SlaveW<'a, REG> = crate::BitWriter<'a, REG, Slave>; +impl<'a, REG> SlaveW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "All addresses will be responded to with a NACK"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(SLAVE_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Slave::Disable) } #[doc = "Addresses matching the programmed follower address or the general call address (if enabled) require a response from software. Other addresses are automatically responded to with a NACK."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(SLAVE_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Slave::Enable) } } -#[doc = "Field `AUTOACK` reader - Automatic Acknowledge"] -pub type AUTOACK_R = crate::BitReader; #[doc = "Automatic Acknowledge\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AUTOACK_A { +pub enum Autoack { #[doc = "0: Software must give one ACK command for each ACK transmitted on the I2C bus."] - DISABLE = 0, + Disable = 0, #[doc = "1: Addresses that are not automatically NACK'ed, and all data is automatically acknowledged."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AUTOACK_A) -> Self { + fn from(variant: Autoack) -> Self { variant as u8 != 0 } } -impl AUTOACK_R { +#[doc = "Field `AUTOACK` reader - Automatic Acknowledge"] +pub type AutoackR = crate::BitReader; +impl AutoackR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> AUTOACK_A { + pub const fn variant(&self) -> Autoack { match self.bits { - false => AUTOACK_A::DISABLE, - true => AUTOACK_A::ENABLE, + false => Autoack::Disable, + true => Autoack::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Software must give one ACK command for each ACK transmitted on the I2C bus."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == AUTOACK_A::DISABLE + *self == Autoack::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Addresses that are not automatically NACK'ed, and all data is automatically acknowledged."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == AUTOACK_A::ENABLE + *self == Autoack::Enable } } #[doc = "Field `AUTOACK` writer - Automatic Acknowledge"] -pub type AUTOACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, AUTOACK_A, O>; -impl<'a, const O: u8> AUTOACK_W<'a, O> { +pub type AutoackW<'a, REG> = crate::BitWriter<'a, REG, Autoack>; +impl<'a, REG> AutoackW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Software must give one ACK command for each ACK transmitted on the I2C bus."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(AUTOACK_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Autoack::Disable) } #[doc = "Addresses that are not automatically NACK'ed, and all data is automatically acknowledged."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(AUTOACK_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Autoack::Enable) } } -#[doc = "Field `AUTOSE` reader - Automatic STOP when Empty"] -pub type AUTOSE_R = crate::BitReader; #[doc = "Automatic STOP when Empty\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AUTOSE_A { +pub enum Autose { #[doc = "0: A stop must be sent manually when no more data is to be transmitted."] - DISABLE = 0, + Disable = 0, #[doc = "1: The leader automatically sends a STOP when no more data is available for transmission."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AUTOSE_A) -> Self { + fn from(variant: Autose) -> Self { variant as u8 != 0 } } -impl AUTOSE_R { +#[doc = "Field `AUTOSE` reader - Automatic STOP when Empty"] +pub type AutoseR = crate::BitReader; +impl AutoseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> AUTOSE_A { + pub const fn variant(&self) -> Autose { match self.bits { - false => AUTOSE_A::DISABLE, - true => AUTOSE_A::ENABLE, + false => Autose::Disable, + true => Autose::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "A stop must be sent manually when no more data is to be transmitted."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == AUTOSE_A::DISABLE + *self == Autose::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The leader automatically sends a STOP when no more data is available for transmission."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == AUTOSE_A::ENABLE + *self == Autose::Enable } } #[doc = "Field `AUTOSE` writer - Automatic STOP when Empty"] -pub type AUTOSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, AUTOSE_A, O>; -impl<'a, const O: u8> AUTOSE_W<'a, O> { +pub type AutoseW<'a, REG> = crate::BitWriter<'a, REG, Autose>; +impl<'a, REG> AutoseW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "A stop must be sent manually when no more data is to be transmitted."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(AUTOSE_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Autose::Disable) } #[doc = "The leader automatically sends a STOP when no more data is available for transmission."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(AUTOSE_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Autose::Enable) } } -#[doc = "Field `AUTOSN` reader - Automatic STOP on NACK"] -pub type AUTOSN_R = crate::BitReader; #[doc = "Automatic STOP on NACK\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AUTOSN_A { +pub enum Autosn { #[doc = "0: Stop is not automatically sent if a NACK is received from a follower."] - DISABLE = 0, + Disable = 0, #[doc = "1: The leader automatically sends a STOP if a NACK is received from a follower."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AUTOSN_A) -> Self { + fn from(variant: Autosn) -> Self { variant as u8 != 0 } } -impl AUTOSN_R { +#[doc = "Field `AUTOSN` reader - Automatic STOP on NACK"] +pub type AutosnR = crate::BitReader; +impl AutosnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> AUTOSN_A { + pub const fn variant(&self) -> Autosn { match self.bits { - false => AUTOSN_A::DISABLE, - true => AUTOSN_A::ENABLE, + false => Autosn::Disable, + true => Autosn::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Stop is not automatically sent if a NACK is received from a follower."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == AUTOSN_A::DISABLE + *self == Autosn::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The leader automatically sends a STOP if a NACK is received from a follower."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == AUTOSN_A::ENABLE + *self == Autosn::Enable } } #[doc = "Field `AUTOSN` writer - Automatic STOP on NACK"] -pub type AUTOSN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, AUTOSN_A, O>; -impl<'a, const O: u8> AUTOSN_W<'a, O> { +pub type AutosnW<'a, REG> = crate::BitWriter<'a, REG, Autosn>; +impl<'a, REG> AutosnW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Stop is not automatically sent if a NACK is received from a follower."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(AUTOSN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Autosn::Disable) } #[doc = "The leader automatically sends a STOP if a NACK is received from a follower."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(AUTOSN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Autosn::Enable) } } -#[doc = "Field `ARBDIS` reader - Arbitration Disable"] -pub type ARBDIS_R = crate::BitReader; #[doc = "Arbitration Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ARBDIS_A { +pub enum Arbdis { #[doc = "0: When a device loses arbitration, the ARBIF interrupt flag is set and the bus is released."] - DISABLE = 0, + Disable = 0, #[doc = "1: When a device loses arbitration, the ARBIF interrupt flag is set, but communication proceeds."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ARBDIS_A) -> Self { + fn from(variant: Arbdis) -> Self { variant as u8 != 0 } } -impl ARBDIS_R { +#[doc = "Field `ARBDIS` reader - Arbitration Disable"] +pub type ArbdisR = crate::BitReader; +impl ArbdisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ARBDIS_A { + pub const fn variant(&self) -> Arbdis { match self.bits { - false => ARBDIS_A::DISABLE, - true => ARBDIS_A::ENABLE, + false => Arbdis::Disable, + true => Arbdis::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "When a device loses arbitration, the ARBIF interrupt flag is set and the bus is released."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ARBDIS_A::DISABLE + *self == Arbdis::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "When a device loses arbitration, the ARBIF interrupt flag is set, but communication proceeds."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ARBDIS_A::ENABLE + *self == Arbdis::Enable } } #[doc = "Field `ARBDIS` writer - Arbitration Disable"] -pub type ARBDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, ARBDIS_A, O>; -impl<'a, const O: u8> ARBDIS_W<'a, O> { +pub type ArbdisW<'a, REG> = crate::BitWriter<'a, REG, Arbdis>; +impl<'a, REG> ArbdisW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "When a device loses arbitration, the ARBIF interrupt flag is set and the bus is released."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ARBDIS_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Arbdis::Disable) } #[doc = "When a device loses arbitration, the ARBIF interrupt flag is set, but communication proceeds."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ARBDIS_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Arbdis::Enable) } } -#[doc = "Field `GCAMEN` reader - General Call Address Match Enable"] -pub type GCAMEN_R = crate::BitReader; #[doc = "General Call Address Match Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GCAMEN_A { +pub enum Gcamen { #[doc = "0: General call address will be NACK'ed if it is not included by the follower address and address mask."] - DISABLE = 0, + Disable = 0, #[doc = "1: When a general call address is received, a software response is required"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GCAMEN_A) -> Self { + fn from(variant: Gcamen) -> Self { variant as u8 != 0 } } -impl GCAMEN_R { +#[doc = "Field `GCAMEN` reader - General Call Address Match Enable"] +pub type GcamenR = crate::BitReader; +impl GcamenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> GCAMEN_A { + pub const fn variant(&self) -> Gcamen { match self.bits { - false => GCAMEN_A::DISABLE, - true => GCAMEN_A::ENABLE, + false => Gcamen::Disable, + true => Gcamen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "General call address will be NACK'ed if it is not included by the follower address and address mask."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == GCAMEN_A::DISABLE + *self == Gcamen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "When a general call address is received, a software response is required"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == GCAMEN_A::ENABLE + *self == Gcamen::Enable } } #[doc = "Field `GCAMEN` writer - General Call Address Match Enable"] -pub type GCAMEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, GCAMEN_A, O>; -impl<'a, const O: u8> GCAMEN_W<'a, O> { +pub type GcamenW<'a, REG> = crate::BitWriter<'a, REG, Gcamen>; +impl<'a, REG> GcamenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "General call address will be NACK'ed if it is not included by the follower address and address mask."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(GCAMEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Gcamen::Disable) } #[doc = "When a general call address is received, a software response is required"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(GCAMEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Gcamen::Enable) } } -#[doc = "Field `TXBIL` reader - TX Buffer Interrupt Level"] -pub type TXBIL_R = crate::BitReader; #[doc = "TX Buffer Interrupt Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TXBIL_A { +pub enum Txbil { #[doc = "0: TXBL status and the TXBL interrupt flag are set when the transmit buffer becomes empty. TXBL is cleared when the buffer becomes nonempty."] - EMPTY = 0, + Empty = 0, #[doc = "1: TXBL status and the TXBL interrupt flag are set when the transmit buffer goes from full to half-full or empty. TXBL is cleared when the buffer becomes full"] - HALF_FULL = 1, + HalfFull = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TXBIL_A) -> Self { + fn from(variant: Txbil) -> Self { variant as u8 != 0 } } -impl TXBIL_R { +#[doc = "Field `TXBIL` reader - TX Buffer Interrupt Level"] +pub type TxbilR = crate::BitReader; +impl TxbilR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXBIL_A { + pub const fn variant(&self) -> Txbil { match self.bits { - false => TXBIL_A::EMPTY, - true => TXBIL_A::HALF_FULL, + false => Txbil::Empty, + true => Txbil::HalfFull, } } - #[doc = "Checks if the value of the field is `EMPTY`"] + #[doc = "TXBL status and the TXBL interrupt flag are set when the transmit buffer becomes empty. TXBL is cleared when the buffer becomes nonempty."] #[inline(always)] pub fn is_empty(&self) -> bool { - *self == TXBIL_A::EMPTY + *self == Txbil::Empty } - #[doc = "Checks if the value of the field is `HALF_FULL`"] + #[doc = "TXBL status and the TXBL interrupt flag are set when the transmit buffer goes from full to half-full or empty. TXBL is cleared when the buffer becomes full"] #[inline(always)] pub fn is_half_full(&self) -> bool { - *self == TXBIL_A::HALF_FULL + *self == Txbil::HalfFull } } #[doc = "Field `TXBIL` writer - TX Buffer Interrupt Level"] -pub type TXBIL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, TXBIL_A, O>; -impl<'a, const O: u8> TXBIL_W<'a, O> { +pub type TxbilW<'a, REG> = crate::BitWriter<'a, REG, Txbil>; +impl<'a, REG> TxbilW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "TXBL status and the TXBL interrupt flag are set when the transmit buffer becomes empty. TXBL is cleared when the buffer becomes nonempty."] #[inline(always)] - pub fn empty(self) -> &'a mut W { - self.variant(TXBIL_A::EMPTY) + pub fn empty(self) -> &'a mut crate::W { + self.variant(Txbil::Empty) } #[doc = "TXBL status and the TXBL interrupt flag are set when the transmit buffer goes from full to half-full or empty. TXBL is cleared when the buffer becomes full"] #[inline(always)] - pub fn half_full(self) -> &'a mut W { - self.variant(TXBIL_A::HALF_FULL) + pub fn half_full(self) -> &'a mut crate::W { + self.variant(Txbil::HalfFull) } } -#[doc = "Field `CLHR` reader - Clock Low High Ratio"] -pub type CLHR_R = crate::FieldReader; #[doc = "Clock Low High Ratio\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLHR_A { +pub enum Clhr { #[doc = "0: Nlow=4 and Nhigh=4, and the Nlow:Nhigh ratio is 4:4"] - STANDARD = 0, + Standard = 0, #[doc = "1: Nlow=6 and Nhigh=3, and the Nlow:Nhigh ratio is 6:3"] - ASYMMETRIC = 1, + Asymmetric = 1, #[doc = "2: Nlow=11 and Nhigh=6, and the Nlow:Nhigh ratio is 11:6"] - FAST = 2, + Fast = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLHR_A) -> Self { + fn from(variant: Clhr) -> Self { variant as _ } } -impl CLHR_R { +impl crate::FieldSpec for Clhr { + type Ux = u8; +} +impl crate::IsEnum for Clhr {} +#[doc = "Field `CLHR` reader - Clock Low High Ratio"] +pub type ClhrR = crate::FieldReader; +impl ClhrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLHR_A::STANDARD), - 1 => Some(CLHR_A::ASYMMETRIC), - 2 => Some(CLHR_A::FAST), + 0 => Some(Clhr::Standard), + 1 => Some(Clhr::Asymmetric), + 2 => Some(Clhr::Fast), _ => None, } } - #[doc = "Checks if the value of the field is `STANDARD`"] + #[doc = "Nlow=4 and Nhigh=4, and the Nlow:Nhigh ratio is 4:4"] #[inline(always)] pub fn is_standard(&self) -> bool { - *self == CLHR_A::STANDARD + *self == Clhr::Standard } - #[doc = "Checks if the value of the field is `ASYMMETRIC`"] + #[doc = "Nlow=6 and Nhigh=3, and the Nlow:Nhigh ratio is 6:3"] #[inline(always)] pub fn is_asymmetric(&self) -> bool { - *self == CLHR_A::ASYMMETRIC + *self == Clhr::Asymmetric } - #[doc = "Checks if the value of the field is `FAST`"] + #[doc = "Nlow=11 and Nhigh=6, and the Nlow:Nhigh ratio is 11:6"] #[inline(always)] pub fn is_fast(&self) -> bool { - *self == CLHR_A::FAST + *self == Clhr::Fast } } #[doc = "Field `CLHR` writer - Clock Low High Ratio"] -pub type CLHR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, CLHR_A, 2, O>; -impl<'a, const O: u8> CLHR_W<'a, O> { +pub type ClhrW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clhr>; +impl<'a, REG> ClhrW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Nlow=4 and Nhigh=4, and the Nlow:Nhigh ratio is 4:4"] #[inline(always)] - pub fn standard(self) -> &'a mut W { - self.variant(CLHR_A::STANDARD) + pub fn standard(self) -> &'a mut crate::W { + self.variant(Clhr::Standard) } #[doc = "Nlow=6 and Nhigh=3, and the Nlow:Nhigh ratio is 6:3"] #[inline(always)] - pub fn asymmetric(self) -> &'a mut W { - self.variant(CLHR_A::ASYMMETRIC) + pub fn asymmetric(self) -> &'a mut crate::W { + self.variant(Clhr::Asymmetric) } #[doc = "Nlow=11 and Nhigh=6, and the Nlow:Nhigh ratio is 11:6"] #[inline(always)] - pub fn fast(self) -> &'a mut W { - self.variant(CLHR_A::FAST) + pub fn fast(self) -> &'a mut crate::W { + self.variant(Clhr::Fast) } } -#[doc = "Field `BITO` reader - Bus Idle Timeout"] -pub type BITO_R = crate::FieldReader; #[doc = "Bus Idle Timeout\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BITO_A { +pub enum Bito { #[doc = "0: Timeout disabled"] - OFF = 0, + Off = 0, #[doc = "1: Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."] - I2C40PCC = 1, + I2c40pcc = 1, #[doc = "2: Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."] - I2C80PCC = 2, + I2c80pcc = 2, #[doc = "3: Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."] - I2C160PCC = 3, + I2c160pcc = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BITO_A) -> Self { + fn from(variant: Bito) -> Self { variant as _ } } -impl BITO_R { +impl crate::FieldSpec for Bito { + type Ux = u8; +} +impl crate::IsEnum for Bito {} +#[doc = "Field `BITO` reader - Bus Idle Timeout"] +pub type BitoR = crate::FieldReader; +impl BitoR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> BITO_A { + pub const fn variant(&self) -> Bito { match self.bits { - 0 => BITO_A::OFF, - 1 => BITO_A::I2C40PCC, - 2 => BITO_A::I2C80PCC, - 3 => BITO_A::I2C160PCC, + 0 => Bito::Off, + 1 => Bito::I2c40pcc, + 2 => Bito::I2c80pcc, + 3 => Bito::I2c160pcc, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Timeout disabled"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == BITO_A::OFF + *self == Bito::Off } - #[doc = "Checks if the value of the field is `I2C40PCC`"] + #[doc = "Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."] #[inline(always)] pub fn is_i2c40pcc(&self) -> bool { - *self == BITO_A::I2C40PCC + *self == Bito::I2c40pcc } - #[doc = "Checks if the value of the field is `I2C80PCC`"] + #[doc = "Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."] #[inline(always)] pub fn is_i2c80pcc(&self) -> bool { - *self == BITO_A::I2C80PCC + *self == Bito::I2c80pcc } - #[doc = "Checks if the value of the field is `I2C160PCC`"] + #[doc = "Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."] #[inline(always)] pub fn is_i2c160pcc(&self) -> bool { - *self == BITO_A::I2C160PCC + *self == Bito::I2c160pcc } } #[doc = "Field `BITO` writer - Bus Idle Timeout"] -pub type BITO_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, BITO_A, 2, O>; -impl<'a, const O: u8> BITO_W<'a, O> { +pub type BitoW<'a, REG> = crate::FieldWriter<'a, REG, 2, Bito, crate::Safe>; +impl<'a, REG> BitoW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Timeout disabled"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(BITO_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Bito::Off) } #[doc = "Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."] #[inline(always)] - pub fn i2c40pcc(self) -> &'a mut W { - self.variant(BITO_A::I2C40PCC) + pub fn i2c40pcc(self) -> &'a mut crate::W { + self.variant(Bito::I2c40pcc) } #[doc = "Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."] #[inline(always)] - pub fn i2c80pcc(self) -> &'a mut W { - self.variant(BITO_A::I2C80PCC) + pub fn i2c80pcc(self) -> &'a mut crate::W { + self.variant(Bito::I2c80pcc) } #[doc = "Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."] #[inline(always)] - pub fn i2c160pcc(self) -> &'a mut W { - self.variant(BITO_A::I2C160PCC) + pub fn i2c160pcc(self) -> &'a mut crate::W { + self.variant(Bito::I2c160pcc) } } -#[doc = "Field `GIBITO` reader - Go Idle on Bus Idle Timeout"] -pub type GIBITO_R = crate::BitReader; #[doc = "Go Idle on Bus Idle Timeout\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GIBITO_A { +pub enum Gibito { #[doc = "0: A bus idle timeout has no effect on the bus state."] - DISABLE = 0, + Disable = 0, #[doc = "1: A bus idle timeout tells the I2C module that the bus is idle, allowing new transfers to be initiated."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GIBITO_A) -> Self { + fn from(variant: Gibito) -> Self { variant as u8 != 0 } } -impl GIBITO_R { +#[doc = "Field `GIBITO` reader - Go Idle on Bus Idle Timeout"] +pub type GibitoR = crate::BitReader; +impl GibitoR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> GIBITO_A { + pub const fn variant(&self) -> Gibito { match self.bits { - false => GIBITO_A::DISABLE, - true => GIBITO_A::ENABLE, + false => Gibito::Disable, + true => Gibito::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "A bus idle timeout has no effect on the bus state."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == GIBITO_A::DISABLE + *self == Gibito::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "A bus idle timeout tells the I2C module that the bus is idle, allowing new transfers to be initiated."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == GIBITO_A::ENABLE + *self == Gibito::Enable } } #[doc = "Field `GIBITO` writer - Go Idle on Bus Idle Timeout"] -pub type GIBITO_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, GIBITO_A, O>; -impl<'a, const O: u8> GIBITO_W<'a, O> { +pub type GibitoW<'a, REG> = crate::BitWriter<'a, REG, Gibito>; +impl<'a, REG> GibitoW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "A bus idle timeout has no effect on the bus state."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(GIBITO_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Gibito::Disable) } #[doc = "A bus idle timeout tells the I2C module that the bus is idle, allowing new transfers to be initiated."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(GIBITO_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Gibito::Enable) } } -#[doc = "Field `CLTO` reader - Clock Low Timeout"] -pub type CLTO_R = crate::FieldReader; #[doc = "Clock Low Timeout\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLTO_A { +pub enum Clto { #[doc = "0: Timeout disabled"] - OFF = 0, + Off = 0, #[doc = "1: Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."] - I2C40PCC = 1, + I2c40pcc = 1, #[doc = "2: Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."] - I2C80PCC = 2, + I2c80pcc = 2, #[doc = "3: Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."] - I2C160PCC = 3, + I2c160pcc = 3, #[doc = "4: Timeout after 320 prescaled clock cycles. In standard mode at 100 kHz, this results in a 400us timeout."] - I2C320PCC = 4, + I2c320pcc = 4, #[doc = "5: Timeout after 1024 prescaled clock cycles. In standard mode at 100 kHz, this results in a 1280us timeout."] - I2C1024PCC = 5, + I2c1024pcc = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLTO_A) -> Self { + fn from(variant: Clto) -> Self { variant as _ } } -impl CLTO_R { +impl crate::FieldSpec for Clto { + type Ux = u8; +} +impl crate::IsEnum for Clto {} +#[doc = "Field `CLTO` reader - Clock Low Timeout"] +pub type CltoR = crate::FieldReader; +impl CltoR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLTO_A::OFF), - 1 => Some(CLTO_A::I2C40PCC), - 2 => Some(CLTO_A::I2C80PCC), - 3 => Some(CLTO_A::I2C160PCC), - 4 => Some(CLTO_A::I2C320PCC), - 5 => Some(CLTO_A::I2C1024PCC), + 0 => Some(Clto::Off), + 1 => Some(Clto::I2c40pcc), + 2 => Some(Clto::I2c80pcc), + 3 => Some(Clto::I2c160pcc), + 4 => Some(Clto::I2c320pcc), + 5 => Some(Clto::I2c1024pcc), _ => None, } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Timeout disabled"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == CLTO_A::OFF + *self == Clto::Off } - #[doc = "Checks if the value of the field is `I2C40PCC`"] + #[doc = "Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."] #[inline(always)] pub fn is_i2c40pcc(&self) -> bool { - *self == CLTO_A::I2C40PCC + *self == Clto::I2c40pcc } - #[doc = "Checks if the value of the field is `I2C80PCC`"] + #[doc = "Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."] #[inline(always)] pub fn is_i2c80pcc(&self) -> bool { - *self == CLTO_A::I2C80PCC + *self == Clto::I2c80pcc } - #[doc = "Checks if the value of the field is `I2C160PCC`"] + #[doc = "Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."] #[inline(always)] pub fn is_i2c160pcc(&self) -> bool { - *self == CLTO_A::I2C160PCC + *self == Clto::I2c160pcc } - #[doc = "Checks if the value of the field is `I2C320PCC`"] + #[doc = "Timeout after 320 prescaled clock cycles. In standard mode at 100 kHz, this results in a 400us timeout."] #[inline(always)] pub fn is_i2c320pcc(&self) -> bool { - *self == CLTO_A::I2C320PCC + *self == Clto::I2c320pcc } - #[doc = "Checks if the value of the field is `I2C1024PCC`"] + #[doc = "Timeout after 1024 prescaled clock cycles. In standard mode at 100 kHz, this results in a 1280us timeout."] #[inline(always)] pub fn is_i2c1024pcc(&self) -> bool { - *self == CLTO_A::I2C1024PCC + *self == Clto::I2c1024pcc } } #[doc = "Field `CLTO` writer - Clock Low Timeout"] -pub type CLTO_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, CLTO_A, 3, O>; -impl<'a, const O: u8> CLTO_W<'a, O> { +pub type CltoW<'a, REG> = crate::FieldWriter<'a, REG, 3, Clto>; +impl<'a, REG> CltoW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Timeout disabled"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(CLTO_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Clto::Off) } #[doc = "Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."] #[inline(always)] - pub fn i2c40pcc(self) -> &'a mut W { - self.variant(CLTO_A::I2C40PCC) + pub fn i2c40pcc(self) -> &'a mut crate::W { + self.variant(Clto::I2c40pcc) } #[doc = "Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."] #[inline(always)] - pub fn i2c80pcc(self) -> &'a mut W { - self.variant(CLTO_A::I2C80PCC) + pub fn i2c80pcc(self) -> &'a mut crate::W { + self.variant(Clto::I2c80pcc) } #[doc = "Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."] #[inline(always)] - pub fn i2c160pcc(self) -> &'a mut W { - self.variant(CLTO_A::I2C160PCC) + pub fn i2c160pcc(self) -> &'a mut crate::W { + self.variant(Clto::I2c160pcc) } #[doc = "Timeout after 320 prescaled clock cycles. In standard mode at 100 kHz, this results in a 400us timeout."] #[inline(always)] - pub fn i2c320pcc(self) -> &'a mut W { - self.variant(CLTO_A::I2C320PCC) + pub fn i2c320pcc(self) -> &'a mut crate::W { + self.variant(Clto::I2c320pcc) } #[doc = "Timeout after 1024 prescaled clock cycles. In standard mode at 100 kHz, this results in a 1280us timeout."] #[inline(always)] - pub fn i2c1024pcc(self) -> &'a mut W { - self.variant(CLTO_A::I2C1024PCC) + pub fn i2c1024pcc(self) -> &'a mut crate::W { + self.variant(Clto::I2c1024pcc) } } -#[doc = "Field `SCLMONEN` reader - SCL Monitor Enable"] -pub type SCLMONEN_R = crate::BitReader; #[doc = "SCL Monitor Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SCLMONEN_A { +pub enum Sclmonen { #[doc = "0: Disable SCL monitor"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enable SCL monitor"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SCLMONEN_A) -> Self { + fn from(variant: Sclmonen) -> Self { variant as u8 != 0 } } -impl SCLMONEN_R { +#[doc = "Field `SCLMONEN` reader - SCL Monitor Enable"] +pub type SclmonenR = crate::BitReader; +impl SclmonenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SCLMONEN_A { + pub const fn variant(&self) -> Sclmonen { match self.bits { - false => SCLMONEN_A::DISABLE, - true => SCLMONEN_A::ENABLE, + false => Sclmonen::Disable, + true => Sclmonen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable SCL monitor"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == SCLMONEN_A::DISABLE + *self == Sclmonen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enable SCL monitor"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == SCLMONEN_A::ENABLE + *self == Sclmonen::Enable } } #[doc = "Field `SCLMONEN` writer - SCL Monitor Enable"] -pub type SCLMONEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, SCLMONEN_A, O>; -impl<'a, const O: u8> SCLMONEN_W<'a, O> { +pub type SclmonenW<'a, REG> = crate::BitWriter<'a, REG, Sclmonen>; +impl<'a, REG> SclmonenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable SCL monitor"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(SCLMONEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Sclmonen::Disable) } #[doc = "Enable SCL monitor"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(SCLMONEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Sclmonen::Enable) } } -#[doc = "Field `SDAMONEN` reader - SDA Monitor Enable"] -pub type SDAMONEN_R = crate::BitReader; #[doc = "SDA Monitor Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SDAMONEN_A { +pub enum Sdamonen { #[doc = "0: Disable SDA Monitor"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enable SDA Monitor"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SDAMONEN_A) -> Self { + fn from(variant: Sdamonen) -> Self { variant as u8 != 0 } } -impl SDAMONEN_R { +#[doc = "Field `SDAMONEN` reader - SDA Monitor Enable"] +pub type SdamonenR = crate::BitReader; +impl SdamonenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SDAMONEN_A { + pub const fn variant(&self) -> Sdamonen { match self.bits { - false => SDAMONEN_A::DISABLE, - true => SDAMONEN_A::ENABLE, + false => Sdamonen::Disable, + true => Sdamonen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable SDA Monitor"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == SDAMONEN_A::DISABLE + *self == Sdamonen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enable SDA Monitor"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == SDAMONEN_A::ENABLE + *self == Sdamonen::Enable } } #[doc = "Field `SDAMONEN` writer - SDA Monitor Enable"] -pub type SDAMONEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, SDAMONEN_A, O>; -impl<'a, const O: u8> SDAMONEN_W<'a, O> { +pub type SdamonenW<'a, REG> = crate::BitWriter<'a, REG, Sdamonen>; +impl<'a, REG> SdamonenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable SDA Monitor"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(SDAMONEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Sdamonen::Disable) } #[doc = "Enable SDA Monitor"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(SDAMONEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Sdamonen::Enable) } } impl R { #[doc = "Bit 0 - Soft Reset the internal state registers"] #[inline(always)] - pub fn corerst(&self) -> CORERST_R { - CORERST_R::new((self.bits & 1) != 0) + pub fn corerst(&self) -> CorerstR { + CorerstR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Addressable as Follower"] #[inline(always)] - pub fn slave(&self) -> SLAVE_R { - SLAVE_R::new(((self.bits >> 1) & 1) != 0) + pub fn slave(&self) -> SlaveR { + SlaveR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Automatic Acknowledge"] #[inline(always)] - pub fn autoack(&self) -> AUTOACK_R { - AUTOACK_R::new(((self.bits >> 2) & 1) != 0) + pub fn autoack(&self) -> AutoackR { + AutoackR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Automatic STOP when Empty"] #[inline(always)] - pub fn autose(&self) -> AUTOSE_R { - AUTOSE_R::new(((self.bits >> 3) & 1) != 0) + pub fn autose(&self) -> AutoseR { + AutoseR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Automatic STOP on NACK"] #[inline(always)] - pub fn autosn(&self) -> AUTOSN_R { - AUTOSN_R::new(((self.bits >> 4) & 1) != 0) + pub fn autosn(&self) -> AutosnR { + AutosnR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Arbitration Disable"] #[inline(always)] - pub fn arbdis(&self) -> ARBDIS_R { - ARBDIS_R::new(((self.bits >> 5) & 1) != 0) + pub fn arbdis(&self) -> ArbdisR { + ArbdisR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - General Call Address Match Enable"] #[inline(always)] - pub fn gcamen(&self) -> GCAMEN_R { - GCAMEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn gcamen(&self) -> GcamenR { + GcamenR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - TX Buffer Interrupt Level"] #[inline(always)] - pub fn txbil(&self) -> TXBIL_R { - TXBIL_R::new(((self.bits >> 7) & 1) != 0) + pub fn txbil(&self) -> TxbilR { + TxbilR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:9 - Clock Low High Ratio"] #[inline(always)] - pub fn clhr(&self) -> CLHR_R { - CLHR_R::new(((self.bits >> 8) & 3) as u8) + pub fn clhr(&self) -> ClhrR { + ClhrR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 12:13 - Bus Idle Timeout"] #[inline(always)] - pub fn bito(&self) -> BITO_R { - BITO_R::new(((self.bits >> 12) & 3) as u8) + pub fn bito(&self) -> BitoR { + BitoR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bit 15 - Go Idle on Bus Idle Timeout"] #[inline(always)] - pub fn gibito(&self) -> GIBITO_R { - GIBITO_R::new(((self.bits >> 15) & 1) != 0) + pub fn gibito(&self) -> GibitoR { + GibitoR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:18 - Clock Low Timeout"] #[inline(always)] - pub fn clto(&self) -> CLTO_R { - CLTO_R::new(((self.bits >> 16) & 7) as u8) + pub fn clto(&self) -> CltoR { + CltoR::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bit 20 - SCL Monitor Enable"] #[inline(always)] - pub fn sclmonen(&self) -> SCLMONEN_R { - SCLMONEN_R::new(((self.bits >> 20) & 1) != 0) + pub fn sclmonen(&self) -> SclmonenR { + SclmonenR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - SDA Monitor Enable"] #[inline(always)] - pub fn sdamonen(&self) -> SDAMONEN_R { - SDAMONEN_R::new(((self.bits >> 21) & 1) != 0) + pub fn sdamonen(&self) -> SdamonenR { + SdamonenR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bit 0 - Soft Reset the internal state registers"] #[inline(always)] #[must_use] - pub fn corerst(&mut self) -> CORERST_W<0> { - CORERST_W::new(self) + pub fn corerst(&mut self) -> CorerstW { + CorerstW::new(self, 0) } #[doc = "Bit 1 - Addressable as Follower"] #[inline(always)] #[must_use] - pub fn slave(&mut self) -> SLAVE_W<1> { - SLAVE_W::new(self) + pub fn slave(&mut self) -> SlaveW { + SlaveW::new(self, 1) } #[doc = "Bit 2 - Automatic Acknowledge"] #[inline(always)] #[must_use] - pub fn autoack(&mut self) -> AUTOACK_W<2> { - AUTOACK_W::new(self) + pub fn autoack(&mut self) -> AutoackW { + AutoackW::new(self, 2) } #[doc = "Bit 3 - Automatic STOP when Empty"] #[inline(always)] #[must_use] - pub fn autose(&mut self) -> AUTOSE_W<3> { - AUTOSE_W::new(self) + pub fn autose(&mut self) -> AutoseW { + AutoseW::new(self, 3) } #[doc = "Bit 4 - Automatic STOP on NACK"] #[inline(always)] #[must_use] - pub fn autosn(&mut self) -> AUTOSN_W<4> { - AUTOSN_W::new(self) + pub fn autosn(&mut self) -> AutosnW { + AutosnW::new(self, 4) } #[doc = "Bit 5 - Arbitration Disable"] #[inline(always)] #[must_use] - pub fn arbdis(&mut self) -> ARBDIS_W<5> { - ARBDIS_W::new(self) + pub fn arbdis(&mut self) -> ArbdisW { + ArbdisW::new(self, 5) } #[doc = "Bit 6 - General Call Address Match Enable"] #[inline(always)] #[must_use] - pub fn gcamen(&mut self) -> GCAMEN_W<6> { - GCAMEN_W::new(self) + pub fn gcamen(&mut self) -> GcamenW { + GcamenW::new(self, 6) } #[doc = "Bit 7 - TX Buffer Interrupt Level"] #[inline(always)] #[must_use] - pub fn txbil(&mut self) -> TXBIL_W<7> { - TXBIL_W::new(self) + pub fn txbil(&mut self) -> TxbilW { + TxbilW::new(self, 7) } #[doc = "Bits 8:9 - Clock Low High Ratio"] #[inline(always)] #[must_use] - pub fn clhr(&mut self) -> CLHR_W<8> { - CLHR_W::new(self) + pub fn clhr(&mut self) -> ClhrW { + ClhrW::new(self, 8) } #[doc = "Bits 12:13 - Bus Idle Timeout"] #[inline(always)] #[must_use] - pub fn bito(&mut self) -> BITO_W<12> { - BITO_W::new(self) + pub fn bito(&mut self) -> BitoW { + BitoW::new(self, 12) } #[doc = "Bit 15 - Go Idle on Bus Idle Timeout"] #[inline(always)] #[must_use] - pub fn gibito(&mut self) -> GIBITO_W<15> { - GIBITO_W::new(self) + pub fn gibito(&mut self) -> GibitoW { + GibitoW::new(self, 15) } #[doc = "Bits 16:18 - Clock Low Timeout"] #[inline(always)] #[must_use] - pub fn clto(&mut self) -> CLTO_W<16> { - CLTO_W::new(self) + pub fn clto(&mut self) -> CltoW { + CltoW::new(self, 16) } #[doc = "Bit 20 - SCL Monitor Enable"] #[inline(always)] #[must_use] - pub fn sclmonen(&mut self) -> SCLMONEN_W<20> { - SCLMONEN_W::new(self) + pub fn sclmonen(&mut self) -> SclmonenW { + SclmonenW::new(self, 20) } #[doc = "Bit 21 - SDA Monitor Enable"] #[inline(always)] #[must_use] - pub fn sdamonen(&mut self) -> SDAMONEN_W<21> { - SDAMONEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sdamonen(&mut self) -> SdamonenW { + SdamonenW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/en.rs index d1c66f9..ccee40a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/en.rs @@ -1,126 +1,89 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EN` reader - module enable"] -pub type EN_R = crate::BitReader; +pub type W = crate::W; #[doc = "module enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EN_A { +pub enum En { #[doc = "0: Disable Peripheral Clock"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enable Peripheral Clock"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EN_A) -> Self { + fn from(variant: En) -> Self { variant as u8 != 0 } } -impl EN_R { +#[doc = "Field `EN` reader - module enable"] +pub type EnR = crate::BitReader; +impl EnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EN_A { + pub const fn variant(&self) -> En { match self.bits { - false => EN_A::DISABLE, - true => EN_A::ENABLE, + false => En::Disable, + true => En::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable Peripheral Clock"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EN_A::DISABLE + *self == En::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enable Peripheral Clock"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EN_A::ENABLE + *self == En::Enable } } #[doc = "Field `EN` writer - module enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, EN_A, O>; -impl<'a, const O: u8> EN_W<'a, O> { +pub type EnW<'a, REG> = crate::BitWriter<'a, REG, En>; +impl<'a, REG> EnW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable Peripheral Clock"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(En::Disable) } #[doc = "Enable Peripheral Clock"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(En::Enable) } } impl R { #[doc = "Bit 0 - module enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - module enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/ien.rs index 7ec6b35..d68e6ae 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/ien.rs @@ -1,380 +1,340 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` reader - START condition Interrupt Flag"] -pub type START_R = crate::BitReader; +pub type StartR = crate::BitReader; #[doc = "Field `START` writer - START condition Interrupt Flag"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RSTART` reader - Repeated START condition Interrupt Flag"] -pub type RSTART_R = crate::BitReader; +pub type RstartR = crate::BitReader; #[doc = "Field `RSTART` writer - Repeated START condition Interrupt Flag"] -pub type RSTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RstartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ADDR` reader - Address Interrupt Flag"] -pub type ADDR_R = crate::BitReader; +pub type AddrR = crate::BitReader; #[doc = "Field `ADDR` writer - Address Interrupt Flag"] -pub type ADDR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AddrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXC` reader - Transfer Completed Interrupt Flag"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXC` writer - Transfer Completed Interrupt Flag"] -pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXBL` reader - Transmit Buffer Level Interrupt Flag"] -pub type TXBL_R = crate::BitReader; +pub type TxblR = crate::BitReader; #[doc = "Field `TXBL` writer - Transmit Buffer Level Interrupt Flag"] -pub type TXBL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxblW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXDATAV` reader - Receive Data Valid Interrupt Flag"] -pub type RXDATAV_R = crate::BitReader; +pub type RxdatavR = crate::BitReader; #[doc = "Field `RXDATAV` writer - Receive Data Valid Interrupt Flag"] -pub type RXDATAV_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxdatavW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACK` reader - Acknowledge Received Interrupt Flag"] -pub type ACK_R = crate::BitReader; +pub type AckR = crate::BitReader; #[doc = "Field `ACK` writer - Acknowledge Received Interrupt Flag"] -pub type ACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AckW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NACK` reader - Not Acknowledge Received Interrupt Flag"] -pub type NACK_R = crate::BitReader; +pub type NackR = crate::BitReader; #[doc = "Field `NACK` writer - Not Acknowledge Received Interrupt Flag"] -pub type NACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type NackW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MSTOP` reader - Leader STOP Condition Interrupt Flag"] -pub type MSTOP_R = crate::BitReader; +pub type MstopR = crate::BitReader; #[doc = "Field `MSTOP` writer - Leader STOP Condition Interrupt Flag"] -pub type MSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type MstopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ARBLOST` reader - Arbitration Lost Interrupt Flag"] -pub type ARBLOST_R = crate::BitReader; +pub type ArblostR = crate::BitReader; #[doc = "Field `ARBLOST` writer - Arbitration Lost Interrupt Flag"] -pub type ARBLOST_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ArblostW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSERR` reader - Bus Error Interrupt Flag"] -pub type BUSERR_R = crate::BitReader; +pub type BuserrR = crate::BitReader; #[doc = "Field `BUSERR` writer - Bus Error Interrupt Flag"] -pub type BUSERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type BuserrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSHOLD` reader - Bus Held Interrupt Flag"] -pub type BUSHOLD_R = crate::BitReader; +pub type BusholdR = crate::BitReader; #[doc = "Field `BUSHOLD` writer - Bus Held Interrupt Flag"] -pub type BUSHOLD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type BusholdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXOF` reader - Transmit Buffer Overflow Interrupt Flag"] -pub type TXOF_R = crate::BitReader; +pub type TxofR = crate::BitReader; #[doc = "Field `TXOF` writer - Transmit Buffer Overflow Interrupt Flag"] -pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUF` reader - Receive Buffer Underflow Interrupt Flag"] -pub type RXUF_R = crate::BitReader; +pub type RxufR = crate::BitReader; #[doc = "Field `RXUF` writer - Receive Buffer Underflow Interrupt Flag"] -pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BITO` reader - Bus Idle Timeout Interrupt Flag"] -pub type BITO_R = crate::BitReader; +pub type BitoR = crate::BitReader; #[doc = "Field `BITO` writer - Bus Idle Timeout Interrupt Flag"] -pub type BITO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type BitoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLTO` reader - Clock Low Timeout Interrupt Flag"] -pub type CLTO_R = crate::BitReader; +pub type CltoR = crate::BitReader; #[doc = "Field `CLTO` writer - Clock Low Timeout Interrupt Flag"] -pub type CLTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type CltoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SSTOP` reader - Follower STOP condition Interrupt Flag"] -pub type SSTOP_R = crate::BitReader; +pub type SstopR = crate::BitReader; #[doc = "Field `SSTOP` writer - Follower STOP condition Interrupt Flag"] -pub type SSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SstopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFULL` reader - Receive Buffer Full Interrupt Flag"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXFULL` writer - Receive Buffer Full Interrupt Flag"] -pub type RXFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxfullW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLERR` reader - Clock Low Error Interrupt Flag"] -pub type CLERR_R = crate::BitReader; +pub type ClerrR = crate::BitReader; #[doc = "Field `CLERR` writer - Clock Low Error Interrupt Flag"] -pub type CLERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ClerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCLERR` reader - SCL Error Interrupt Flag"] -pub type SCLERR_R = crate::BitReader; +pub type SclerrR = crate::BitReader; #[doc = "Field `SCLERR` writer - SCL Error Interrupt Flag"] -pub type SCLERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SclerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SDAERR` reader - SDA Error Interrupt Flag"] -pub type SDAERR_R = crate::BitReader; +pub type SdaerrR = crate::BitReader; #[doc = "Field `SDAERR` writer - SDA Error Interrupt Flag"] -pub type SDAERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SdaerrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - START condition Interrupt Flag"] #[inline(always)] - pub fn start(&self) -> START_R { - START_R::new((self.bits & 1) != 0) + pub fn start(&self) -> StartR { + StartR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Repeated START condition Interrupt Flag"] #[inline(always)] - pub fn rstart(&self) -> RSTART_R { - RSTART_R::new(((self.bits >> 1) & 1) != 0) + pub fn rstart(&self) -> RstartR { + RstartR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Address Interrupt Flag"] #[inline(always)] - pub fn addr(&self) -> ADDR_R { - ADDR_R::new(((self.bits >> 2) & 1) != 0) + pub fn addr(&self) -> AddrR { + AddrR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Transfer Completed Interrupt Flag"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new(((self.bits >> 3) & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Transmit Buffer Level Interrupt Flag"] #[inline(always)] - pub fn txbl(&self) -> TXBL_R { - TXBL_R::new(((self.bits >> 4) & 1) != 0) + pub fn txbl(&self) -> TxblR { + TxblR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Receive Data Valid Interrupt Flag"] #[inline(always)] - pub fn rxdatav(&self) -> RXDATAV_R { - RXDATAV_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxdatav(&self) -> RxdatavR { + RxdatavR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Acknowledge Received Interrupt Flag"] #[inline(always)] - pub fn ack(&self) -> ACK_R { - ACK_R::new(((self.bits >> 6) & 1) != 0) + pub fn ack(&self) -> AckR { + AckR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Not Acknowledge Received Interrupt Flag"] #[inline(always)] - pub fn nack(&self) -> NACK_R { - NACK_R::new(((self.bits >> 7) & 1) != 0) + pub fn nack(&self) -> NackR { + NackR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Leader STOP Condition Interrupt Flag"] #[inline(always)] - pub fn mstop(&self) -> MSTOP_R { - MSTOP_R::new(((self.bits >> 8) & 1) != 0) + pub fn mstop(&self) -> MstopR { + MstopR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Arbitration Lost Interrupt Flag"] #[inline(always)] - pub fn arblost(&self) -> ARBLOST_R { - ARBLOST_R::new(((self.bits >> 9) & 1) != 0) + pub fn arblost(&self) -> ArblostR { + ArblostR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Bus Error Interrupt Flag"] #[inline(always)] - pub fn buserr(&self) -> BUSERR_R { - BUSERR_R::new(((self.bits >> 10) & 1) != 0) + pub fn buserr(&self) -> BuserrR { + BuserrR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Bus Held Interrupt Flag"] #[inline(always)] - pub fn bushold(&self) -> BUSHOLD_R { - BUSHOLD_R::new(((self.bits >> 11) & 1) != 0) + pub fn bushold(&self) -> BusholdR { + BusholdR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Transmit Buffer Overflow Interrupt Flag"] #[inline(always)] - pub fn txof(&self) -> TXOF_R { - TXOF_R::new(((self.bits >> 12) & 1) != 0) + pub fn txof(&self) -> TxofR { + TxofR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Receive Buffer Underflow Interrupt Flag"] #[inline(always)] - pub fn rxuf(&self) -> RXUF_R { - RXUF_R::new(((self.bits >> 13) & 1) != 0) + pub fn rxuf(&self) -> RxufR { + RxufR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Bus Idle Timeout Interrupt Flag"] #[inline(always)] - pub fn bito(&self) -> BITO_R { - BITO_R::new(((self.bits >> 14) & 1) != 0) + pub fn bito(&self) -> BitoR { + BitoR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Clock Low Timeout Interrupt Flag"] #[inline(always)] - pub fn clto(&self) -> CLTO_R { - CLTO_R::new(((self.bits >> 15) & 1) != 0) + pub fn clto(&self) -> CltoR { + CltoR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Follower STOP condition Interrupt Flag"] #[inline(always)] - pub fn sstop(&self) -> SSTOP_R { - SSTOP_R::new(((self.bits >> 16) & 1) != 0) + pub fn sstop(&self) -> SstopR { + SstopR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Receive Buffer Full Interrupt Flag"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 17) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Clock Low Error Interrupt Flag"] #[inline(always)] - pub fn clerr(&self) -> CLERR_R { - CLERR_R::new(((self.bits >> 18) & 1) != 0) + pub fn clerr(&self) -> ClerrR { + ClerrR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - SCL Error Interrupt Flag"] #[inline(always)] - pub fn sclerr(&self) -> SCLERR_R { - SCLERR_R::new(((self.bits >> 19) & 1) != 0) + pub fn sclerr(&self) -> SclerrR { + SclerrR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - SDA Error Interrupt Flag"] #[inline(always)] - pub fn sdaerr(&self) -> SDAERR_R { - SDAERR_R::new(((self.bits >> 20) & 1) != 0) + pub fn sdaerr(&self) -> SdaerrR { + SdaerrR::new(((self.bits >> 20) & 1) != 0) } } impl W { #[doc = "Bit 0 - START condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Repeated START condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rstart(&mut self) -> RSTART_W<1> { - RSTART_W::new(self) + pub fn rstart(&mut self) -> RstartW { + RstartW::new(self, 1) } #[doc = "Bit 2 - Address Interrupt Flag"] #[inline(always)] #[must_use] - pub fn addr(&mut self) -> ADDR_W<2> { - ADDR_W::new(self) + pub fn addr(&mut self) -> AddrW { + AddrW::new(self, 2) } #[doc = "Bit 3 - Transfer Completed Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txc(&mut self) -> TXC_W<3> { - TXC_W::new(self) + pub fn txc(&mut self) -> TxcW { + TxcW::new(self, 3) } #[doc = "Bit 4 - Transmit Buffer Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txbl(&mut self) -> TXBL_W<4> { - TXBL_W::new(self) + pub fn txbl(&mut self) -> TxblW { + TxblW::new(self, 4) } #[doc = "Bit 5 - Receive Data Valid Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxdatav(&mut self) -> RXDATAV_W<5> { - RXDATAV_W::new(self) + pub fn rxdatav(&mut self) -> RxdatavW { + RxdatavW::new(self, 5) } #[doc = "Bit 6 - Acknowledge Received Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ack(&mut self) -> ACK_W<6> { - ACK_W::new(self) + pub fn ack(&mut self) -> AckW { + AckW::new(self, 6) } #[doc = "Bit 7 - Not Acknowledge Received Interrupt Flag"] #[inline(always)] #[must_use] - pub fn nack(&mut self) -> NACK_W<7> { - NACK_W::new(self) + pub fn nack(&mut self) -> NackW { + NackW::new(self, 7) } #[doc = "Bit 8 - Leader STOP Condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn mstop(&mut self) -> MSTOP_W<8> { - MSTOP_W::new(self) + pub fn mstop(&mut self) -> MstopW { + MstopW::new(self, 8) } #[doc = "Bit 9 - Arbitration Lost Interrupt Flag"] #[inline(always)] #[must_use] - pub fn arblost(&mut self) -> ARBLOST_W<9> { - ARBLOST_W::new(self) + pub fn arblost(&mut self) -> ArblostW { + ArblostW::new(self, 9) } #[doc = "Bit 10 - Bus Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn buserr(&mut self) -> BUSERR_W<10> { - BUSERR_W::new(self) + pub fn buserr(&mut self) -> BuserrW { + BuserrW::new(self, 10) } #[doc = "Bit 11 - Bus Held Interrupt Flag"] #[inline(always)] #[must_use] - pub fn bushold(&mut self) -> BUSHOLD_W<11> { - BUSHOLD_W::new(self) + pub fn bushold(&mut self) -> BusholdW { + BusholdW::new(self, 11) } #[doc = "Bit 12 - Transmit Buffer Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txof(&mut self) -> TXOF_W<12> { - TXOF_W::new(self) + pub fn txof(&mut self) -> TxofW { + TxofW::new(self, 12) } #[doc = "Bit 13 - Receive Buffer Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxuf(&mut self) -> RXUF_W<13> { - RXUF_W::new(self) + pub fn rxuf(&mut self) -> RxufW { + RxufW::new(self, 13) } #[doc = "Bit 14 - Bus Idle Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn bito(&mut self) -> BITO_W<14> { - BITO_W::new(self) + pub fn bito(&mut self) -> BitoW { + BitoW::new(self, 14) } #[doc = "Bit 15 - Clock Low Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn clto(&mut self) -> CLTO_W<15> { - CLTO_W::new(self) + pub fn clto(&mut self) -> CltoW { + CltoW::new(self, 15) } #[doc = "Bit 16 - Follower STOP condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sstop(&mut self) -> SSTOP_W<16> { - SSTOP_W::new(self) + pub fn sstop(&mut self) -> SstopW { + SstopW::new(self, 16) } #[doc = "Bit 17 - Receive Buffer Full Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxfull(&mut self) -> RXFULL_W<17> { - RXFULL_W::new(self) + pub fn rxfull(&mut self) -> RxfullW { + RxfullW::new(self, 17) } #[doc = "Bit 18 - Clock Low Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn clerr(&mut self) -> CLERR_W<18> { - CLERR_W::new(self) + pub fn clerr(&mut self) -> ClerrW { + ClerrW::new(self, 18) } #[doc = "Bit 19 - SCL Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sclerr(&mut self) -> SCLERR_W<19> { - SCLERR_W::new(self) + pub fn sclerr(&mut self) -> SclerrW { + SclerrW::new(self, 19) } #[doc = "Bit 20 - SDA Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sdaerr(&mut self) -> SDAERR_W<20> { - SDAERR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sdaerr(&mut self) -> SdaerrW { + SdaerrW::new(self, 20) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/if_.rs index e57ddea..5e8ea0d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/if_.rs @@ -1,380 +1,340 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` reader - START condition Interrupt Flag"] -pub type START_R = crate::BitReader; +pub type StartR = crate::BitReader; #[doc = "Field `START` writer - START condition Interrupt Flag"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RSTART` reader - Repeated START condition Interrupt Flag"] -pub type RSTART_R = crate::BitReader; +pub type RstartR = crate::BitReader; #[doc = "Field `RSTART` writer - Repeated START condition Interrupt Flag"] -pub type RSTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RstartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ADDR` reader - Address Interrupt Flag"] -pub type ADDR_R = crate::BitReader; +pub type AddrR = crate::BitReader; #[doc = "Field `ADDR` writer - Address Interrupt Flag"] -pub type ADDR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AddrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXC` reader - Transfer Completed Interrupt Flag"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXC` writer - Transfer Completed Interrupt Flag"] -pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXBL` reader - Transmit Buffer Level Interrupt Flag"] -pub type TXBL_R = crate::BitReader; +pub type TxblR = crate::BitReader; #[doc = "Field `TXBL` writer - Transmit Buffer Level Interrupt Flag"] -pub type TXBL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxblW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXDATAV` reader - Receive Data Valid Interrupt Flag"] -pub type RXDATAV_R = crate::BitReader; +pub type RxdatavR = crate::BitReader; #[doc = "Field `RXDATAV` writer - Receive Data Valid Interrupt Flag"] -pub type RXDATAV_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxdatavW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACK` reader - Acknowledge Received Interrupt Flag"] -pub type ACK_R = crate::BitReader; +pub type AckR = crate::BitReader; #[doc = "Field `ACK` writer - Acknowledge Received Interrupt Flag"] -pub type ACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AckW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NACK` reader - Not Acknowledge Received Interrupt Flag"] -pub type NACK_R = crate::BitReader; +pub type NackR = crate::BitReader; #[doc = "Field `NACK` writer - Not Acknowledge Received Interrupt Flag"] -pub type NACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type NackW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MSTOP` reader - Leader STOP Condition Interrupt Flag"] -pub type MSTOP_R = crate::BitReader; +pub type MstopR = crate::BitReader; #[doc = "Field `MSTOP` writer - Leader STOP Condition Interrupt Flag"] -pub type MSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type MstopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ARBLOST` reader - Arbitration Lost Interrupt Flag"] -pub type ARBLOST_R = crate::BitReader; +pub type ArblostR = crate::BitReader; #[doc = "Field `ARBLOST` writer - Arbitration Lost Interrupt Flag"] -pub type ARBLOST_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ArblostW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSERR` reader - Bus Error Interrupt Flag"] -pub type BUSERR_R = crate::BitReader; +pub type BuserrR = crate::BitReader; #[doc = "Field `BUSERR` writer - Bus Error Interrupt Flag"] -pub type BUSERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type BuserrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSHOLD` reader - Bus Held Interrupt Flag"] -pub type BUSHOLD_R = crate::BitReader; +pub type BusholdR = crate::BitReader; #[doc = "Field `BUSHOLD` writer - Bus Held Interrupt Flag"] -pub type BUSHOLD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type BusholdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXOF` reader - Transmit Buffer Overflow Interrupt Flag"] -pub type TXOF_R = crate::BitReader; +pub type TxofR = crate::BitReader; #[doc = "Field `TXOF` writer - Transmit Buffer Overflow Interrupt Flag"] -pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUF` reader - Receive Buffer Underflow Interrupt Flag"] -pub type RXUF_R = crate::BitReader; +pub type RxufR = crate::BitReader; #[doc = "Field `RXUF` writer - Receive Buffer Underflow Interrupt Flag"] -pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BITO` reader - Bus Idle Timeout Interrupt Flag"] -pub type BITO_R = crate::BitReader; +pub type BitoR = crate::BitReader; #[doc = "Field `BITO` writer - Bus Idle Timeout Interrupt Flag"] -pub type BITO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type BitoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLTO` reader - Clock Low Timeout Interrupt Flag"] -pub type CLTO_R = crate::BitReader; +pub type CltoR = crate::BitReader; #[doc = "Field `CLTO` writer - Clock Low Timeout Interrupt Flag"] -pub type CLTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type CltoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SSTOP` reader - Follower STOP condition Interrupt Flag"] -pub type SSTOP_R = crate::BitReader; +pub type SstopR = crate::BitReader; #[doc = "Field `SSTOP` writer - Follower STOP condition Interrupt Flag"] -pub type SSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SstopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFULL` reader - Receive Buffer Full Interrupt Flag"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXFULL` writer - Receive Buffer Full Interrupt Flag"] -pub type RXFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxfullW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLERR` reader - Clock Low Error Interrupt Flag"] -pub type CLERR_R = crate::BitReader; +pub type ClerrR = crate::BitReader; #[doc = "Field `CLERR` writer - Clock Low Error Interrupt Flag"] -pub type CLERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ClerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCLERR` reader - SCL Error Interrupt Flag"] -pub type SCLERR_R = crate::BitReader; +pub type SclerrR = crate::BitReader; #[doc = "Field `SCLERR` writer - SCL Error Interrupt Flag"] -pub type SCLERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SclerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SDAERR` reader - SDA Error Interrupt Flag"] -pub type SDAERR_R = crate::BitReader; +pub type SdaerrR = crate::BitReader; #[doc = "Field `SDAERR` writer - SDA Error Interrupt Flag"] -pub type SDAERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SdaerrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - START condition Interrupt Flag"] #[inline(always)] - pub fn start(&self) -> START_R { - START_R::new((self.bits & 1) != 0) + pub fn start(&self) -> StartR { + StartR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Repeated START condition Interrupt Flag"] #[inline(always)] - pub fn rstart(&self) -> RSTART_R { - RSTART_R::new(((self.bits >> 1) & 1) != 0) + pub fn rstart(&self) -> RstartR { + RstartR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Address Interrupt Flag"] #[inline(always)] - pub fn addr(&self) -> ADDR_R { - ADDR_R::new(((self.bits >> 2) & 1) != 0) + pub fn addr(&self) -> AddrR { + AddrR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Transfer Completed Interrupt Flag"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new(((self.bits >> 3) & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Transmit Buffer Level Interrupt Flag"] #[inline(always)] - pub fn txbl(&self) -> TXBL_R { - TXBL_R::new(((self.bits >> 4) & 1) != 0) + pub fn txbl(&self) -> TxblR { + TxblR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Receive Data Valid Interrupt Flag"] #[inline(always)] - pub fn rxdatav(&self) -> RXDATAV_R { - RXDATAV_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxdatav(&self) -> RxdatavR { + RxdatavR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Acknowledge Received Interrupt Flag"] #[inline(always)] - pub fn ack(&self) -> ACK_R { - ACK_R::new(((self.bits >> 6) & 1) != 0) + pub fn ack(&self) -> AckR { + AckR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Not Acknowledge Received Interrupt Flag"] #[inline(always)] - pub fn nack(&self) -> NACK_R { - NACK_R::new(((self.bits >> 7) & 1) != 0) + pub fn nack(&self) -> NackR { + NackR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Leader STOP Condition Interrupt Flag"] #[inline(always)] - pub fn mstop(&self) -> MSTOP_R { - MSTOP_R::new(((self.bits >> 8) & 1) != 0) + pub fn mstop(&self) -> MstopR { + MstopR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Arbitration Lost Interrupt Flag"] #[inline(always)] - pub fn arblost(&self) -> ARBLOST_R { - ARBLOST_R::new(((self.bits >> 9) & 1) != 0) + pub fn arblost(&self) -> ArblostR { + ArblostR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Bus Error Interrupt Flag"] #[inline(always)] - pub fn buserr(&self) -> BUSERR_R { - BUSERR_R::new(((self.bits >> 10) & 1) != 0) + pub fn buserr(&self) -> BuserrR { + BuserrR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Bus Held Interrupt Flag"] #[inline(always)] - pub fn bushold(&self) -> BUSHOLD_R { - BUSHOLD_R::new(((self.bits >> 11) & 1) != 0) + pub fn bushold(&self) -> BusholdR { + BusholdR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Transmit Buffer Overflow Interrupt Flag"] #[inline(always)] - pub fn txof(&self) -> TXOF_R { - TXOF_R::new(((self.bits >> 12) & 1) != 0) + pub fn txof(&self) -> TxofR { + TxofR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Receive Buffer Underflow Interrupt Flag"] #[inline(always)] - pub fn rxuf(&self) -> RXUF_R { - RXUF_R::new(((self.bits >> 13) & 1) != 0) + pub fn rxuf(&self) -> RxufR { + RxufR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Bus Idle Timeout Interrupt Flag"] #[inline(always)] - pub fn bito(&self) -> BITO_R { - BITO_R::new(((self.bits >> 14) & 1) != 0) + pub fn bito(&self) -> BitoR { + BitoR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Clock Low Timeout Interrupt Flag"] #[inline(always)] - pub fn clto(&self) -> CLTO_R { - CLTO_R::new(((self.bits >> 15) & 1) != 0) + pub fn clto(&self) -> CltoR { + CltoR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Follower STOP condition Interrupt Flag"] #[inline(always)] - pub fn sstop(&self) -> SSTOP_R { - SSTOP_R::new(((self.bits >> 16) & 1) != 0) + pub fn sstop(&self) -> SstopR { + SstopR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Receive Buffer Full Interrupt Flag"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 17) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Clock Low Error Interrupt Flag"] #[inline(always)] - pub fn clerr(&self) -> CLERR_R { - CLERR_R::new(((self.bits >> 18) & 1) != 0) + pub fn clerr(&self) -> ClerrR { + ClerrR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - SCL Error Interrupt Flag"] #[inline(always)] - pub fn sclerr(&self) -> SCLERR_R { - SCLERR_R::new(((self.bits >> 19) & 1) != 0) + pub fn sclerr(&self) -> SclerrR { + SclerrR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - SDA Error Interrupt Flag"] #[inline(always)] - pub fn sdaerr(&self) -> SDAERR_R { - SDAERR_R::new(((self.bits >> 20) & 1) != 0) + pub fn sdaerr(&self) -> SdaerrR { + SdaerrR::new(((self.bits >> 20) & 1) != 0) } } impl W { #[doc = "Bit 0 - START condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Repeated START condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rstart(&mut self) -> RSTART_W<1> { - RSTART_W::new(self) + pub fn rstart(&mut self) -> RstartW { + RstartW::new(self, 1) } #[doc = "Bit 2 - Address Interrupt Flag"] #[inline(always)] #[must_use] - pub fn addr(&mut self) -> ADDR_W<2> { - ADDR_W::new(self) + pub fn addr(&mut self) -> AddrW { + AddrW::new(self, 2) } #[doc = "Bit 3 - Transfer Completed Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txc(&mut self) -> TXC_W<3> { - TXC_W::new(self) + pub fn txc(&mut self) -> TxcW { + TxcW::new(self, 3) } #[doc = "Bit 4 - Transmit Buffer Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txbl(&mut self) -> TXBL_W<4> { - TXBL_W::new(self) + pub fn txbl(&mut self) -> TxblW { + TxblW::new(self, 4) } #[doc = "Bit 5 - Receive Data Valid Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxdatav(&mut self) -> RXDATAV_W<5> { - RXDATAV_W::new(self) + pub fn rxdatav(&mut self) -> RxdatavW { + RxdatavW::new(self, 5) } #[doc = "Bit 6 - Acknowledge Received Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ack(&mut self) -> ACK_W<6> { - ACK_W::new(self) + pub fn ack(&mut self) -> AckW { + AckW::new(self, 6) } #[doc = "Bit 7 - Not Acknowledge Received Interrupt Flag"] #[inline(always)] #[must_use] - pub fn nack(&mut self) -> NACK_W<7> { - NACK_W::new(self) + pub fn nack(&mut self) -> NackW { + NackW::new(self, 7) } #[doc = "Bit 8 - Leader STOP Condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn mstop(&mut self) -> MSTOP_W<8> { - MSTOP_W::new(self) + pub fn mstop(&mut self) -> MstopW { + MstopW::new(self, 8) } #[doc = "Bit 9 - Arbitration Lost Interrupt Flag"] #[inline(always)] #[must_use] - pub fn arblost(&mut self) -> ARBLOST_W<9> { - ARBLOST_W::new(self) + pub fn arblost(&mut self) -> ArblostW { + ArblostW::new(self, 9) } #[doc = "Bit 10 - Bus Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn buserr(&mut self) -> BUSERR_W<10> { - BUSERR_W::new(self) + pub fn buserr(&mut self) -> BuserrW { + BuserrW::new(self, 10) } #[doc = "Bit 11 - Bus Held Interrupt Flag"] #[inline(always)] #[must_use] - pub fn bushold(&mut self) -> BUSHOLD_W<11> { - BUSHOLD_W::new(self) + pub fn bushold(&mut self) -> BusholdW { + BusholdW::new(self, 11) } #[doc = "Bit 12 - Transmit Buffer Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txof(&mut self) -> TXOF_W<12> { - TXOF_W::new(self) + pub fn txof(&mut self) -> TxofW { + TxofW::new(self, 12) } #[doc = "Bit 13 - Receive Buffer Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxuf(&mut self) -> RXUF_W<13> { - RXUF_W::new(self) + pub fn rxuf(&mut self) -> RxufW { + RxufW::new(self, 13) } #[doc = "Bit 14 - Bus Idle Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn bito(&mut self) -> BITO_W<14> { - BITO_W::new(self) + pub fn bito(&mut self) -> BitoW { + BitoW::new(self, 14) } #[doc = "Bit 15 - Clock Low Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn clto(&mut self) -> CLTO_W<15> { - CLTO_W::new(self) + pub fn clto(&mut self) -> CltoW { + CltoW::new(self, 15) } #[doc = "Bit 16 - Follower STOP condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sstop(&mut self) -> SSTOP_W<16> { - SSTOP_W::new(self) + pub fn sstop(&mut self) -> SstopW { + SstopW::new(self, 16) } #[doc = "Bit 17 - Receive Buffer Full Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxfull(&mut self) -> RXFULL_W<17> { - RXFULL_W::new(self) + pub fn rxfull(&mut self) -> RxfullW { + RxfullW::new(self, 17) } #[doc = "Bit 18 - Clock Low Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn clerr(&mut self) -> CLERR_W<18> { - CLERR_W::new(self) + pub fn clerr(&mut self) -> ClerrW { + ClerrW::new(self, 18) } #[doc = "Bit 19 - SCL Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sclerr(&mut self) -> SCLERR_W<19> { - SCLERR_W::new(self) + pub fn sclerr(&mut self) -> SclerrW { + SclerrW::new(self, 19) } #[doc = "Bit 20 - SDA Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sdaerr(&mut self) -> SDAERR_W<20> { - SDAERR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sdaerr(&mut self) -> SdaerrW { + SdaerrW::new(self, 20) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/ipversion.rs index 78e00e2..b808ecb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/rxdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/rxdata.rs index 6197259..b8a3ba6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/rxdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/rxdata.rs @@ -1,37 +1,22 @@ #[doc = "Register `RXDATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATA` reader - RX Data"] -pub type RXDATA_R = crate::FieldReader; +pub type RxdataR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - RX Data"] #[inline(always)] - pub fn rxdata(&self) -> RXDATA_R { - RXDATA_R::new((self.bits & 0xff) as u8) + pub fn rxdata(&self) -> RxdataR { + RxdataR::new((self.bits & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdata](index.html) module"] -pub struct RXDATA_SPEC; -impl crate::RegisterSpec for RXDATA_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdata::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdataSpec; +impl crate::RegisterSpec for RxdataSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdata::R](R) reader structure"] -impl crate::Readable for RXDATA_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdata::R`](R) reader structure"] +impl crate::Readable for RxdataSpec {} #[doc = "`reset()` method sets RXDATA to value 0"] -impl crate::Resettable for RXDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/rxdatap.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/rxdatap.rs index f7c8c79..3debe5f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/rxdatap.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/rxdatap.rs @@ -1,37 +1,22 @@ #[doc = "Register `RXDATAP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATAP` reader - RX Data Peek"] -pub type RXDATAP_R = crate::FieldReader; +pub type RxdatapR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - RX Data Peek"] #[inline(always)] - pub fn rxdatap(&self) -> RXDATAP_R { - RXDATAP_R::new((self.bits & 0xff) as u8) + pub fn rxdatap(&self) -> RxdatapR { + RxdatapR::new((self.bits & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdatap](index.html) module"] -pub struct RXDATAP_SPEC; -impl crate::RegisterSpec for RXDATAP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdatap::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdatapSpec; +impl crate::RegisterSpec for RxdatapSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdatap::R](R) reader structure"] -impl crate::Readable for RXDATAP_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdatap::R`](R) reader structure"] +impl crate::Readable for RxdatapSpec {} #[doc = "`reset()` method sets RXDATAP to value 0"] -impl crate::Resettable for RXDATAP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdatapSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/rxdouble.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/rxdouble.rs index d739f89..dcc567b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/rxdouble.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/rxdouble.rs @@ -1,44 +1,29 @@ #[doc = "Register `RXDOUBLE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATA0` reader - RX Data 0"] -pub type RXDATA0_R = crate::FieldReader; +pub type Rxdata0R = crate::FieldReader; #[doc = "Field `RXDATA1` reader - RX Data 1"] -pub type RXDATA1_R = crate::FieldReader; +pub type Rxdata1R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - RX Data 0"] #[inline(always)] - pub fn rxdata0(&self) -> RXDATA0_R { - RXDATA0_R::new((self.bits & 0xff) as u8) + pub fn rxdata0(&self) -> Rxdata0R { + Rxdata0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - RX Data 1"] #[inline(always)] - pub fn rxdata1(&self) -> RXDATA1_R { - RXDATA1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn rxdata1(&self) -> Rxdata1R { + Rxdata1R::new(((self.bits >> 8) & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdouble](index.html) module"] -pub struct RXDOUBLE_SPEC; -impl crate::RegisterSpec for RXDOUBLE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdouble::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdoubleSpec; +impl crate::RegisterSpec for RxdoubleSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdouble::R](R) reader structure"] -impl crate::Readable for RXDOUBLE_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdouble::R`](R) reader structure"] +impl crate::Readable for RxdoubleSpec {} #[doc = "`reset()` method sets RXDOUBLE to value 0"] -impl crate::Resettable for RXDOUBLE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdoubleSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/rxdoublep.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/rxdoublep.rs index e20f7a0..de51da4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/rxdoublep.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/rxdoublep.rs @@ -1,44 +1,29 @@ #[doc = "Register `RXDOUBLEP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATAP0` reader - RX Data 0 Peek"] -pub type RXDATAP0_R = crate::FieldReader; +pub type Rxdatap0R = crate::FieldReader; #[doc = "Field `RXDATAP1` reader - RX Data 1 Peek"] -pub type RXDATAP1_R = crate::FieldReader; +pub type Rxdatap1R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - RX Data 0 Peek"] #[inline(always)] - pub fn rxdatap0(&self) -> RXDATAP0_R { - RXDATAP0_R::new((self.bits & 0xff) as u8) + pub fn rxdatap0(&self) -> Rxdatap0R { + Rxdatap0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - RX Data 1 Peek"] #[inline(always)] - pub fn rxdatap1(&self) -> RXDATAP1_R { - RXDATAP1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn rxdatap1(&self) -> Rxdatap1R { + Rxdatap1R::new(((self.bits >> 8) & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdoublep](index.html) module"] -pub struct RXDOUBLEP_SPEC; -impl crate::RegisterSpec for RXDOUBLEP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdoublep::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdoublepSpec; +impl crate::RegisterSpec for RxdoublepSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdoublep::R](R) reader structure"] -impl crate::Readable for RXDOUBLEP_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdoublep::R`](R) reader structure"] +impl crate::Readable for RxdoublepSpec {} #[doc = "`reset()` method sets RXDOUBLEP to value 0"] -impl crate::Resettable for RXDOUBLEP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdoublepSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/saddr.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/saddr.rs index c1201af..852c222 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/saddr.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/saddr.rs @@ -1,80 +1,40 @@ #[doc = "Register `SADDR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SADDR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ADDR` reader - Follower address"] -pub type ADDR_R = crate::FieldReader; +pub type AddrR = crate::FieldReader; #[doc = "Field `ADDR` writer - Follower address"] -pub type ADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SADDR_SPEC, u8, u8, 7, O>; +pub type AddrW<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { #[doc = "Bits 1:7 - Follower address"] #[inline(always)] - pub fn addr(&self) -> ADDR_R { - ADDR_R::new(((self.bits >> 1) & 0x7f) as u8) + pub fn addr(&self) -> AddrR { + AddrR::new(((self.bits >> 1) & 0x7f) as u8) } } impl W { #[doc = "Bits 1:7 - Follower address"] #[inline(always)] #[must_use] - pub fn addr(&mut self) -> ADDR_W<1> { - ADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn addr(&mut self) -> AddrW { + AddrW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [saddr](index.html) module"] -pub struct SADDR_SPEC; -impl crate::RegisterSpec for SADDR_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`saddr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`saddr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SaddrSpec; +impl crate::RegisterSpec for SaddrSpec { type Ux = u32; } -#[doc = "`read()` method returns [saddr::R](R) reader structure"] -impl crate::Readable for SADDR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [saddr::W](W) writer structure"] -impl crate::Writable for SADDR_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`saddr::R`](R) reader structure"] +impl crate::Readable for SaddrSpec {} +#[doc = "`write(|w| ..)` method takes [`saddr::W`](W) writer structure"] +impl crate::Writable for SaddrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SADDR to value 0"] -impl crate::Resettable for SADDR_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SaddrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/saddrmask.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/saddrmask.rs index 41bf4fc..8bd87ec 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/saddrmask.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/saddrmask.rs @@ -1,80 +1,40 @@ #[doc = "Register `SADDRMASK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SADDRMASK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SADDRMASK` reader - Follower Address Mask"] -pub type SADDRMASK_R = crate::FieldReader; +pub type SaddrmaskR = crate::FieldReader; #[doc = "Field `SADDRMASK` writer - Follower Address Mask"] -pub type SADDRMASK_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SADDRMASK_SPEC, u8, u8, 7, O>; +pub type SaddrmaskW<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { #[doc = "Bits 1:7 - Follower Address Mask"] #[inline(always)] - pub fn saddrmask(&self) -> SADDRMASK_R { - SADDRMASK_R::new(((self.bits >> 1) & 0x7f) as u8) + pub fn saddrmask(&self) -> SaddrmaskR { + SaddrmaskR::new(((self.bits >> 1) & 0x7f) as u8) } } impl W { #[doc = "Bits 1:7 - Follower Address Mask"] #[inline(always)] #[must_use] - pub fn saddrmask(&mut self) -> SADDRMASK_W<1> { - SADDRMASK_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn saddrmask(&mut self) -> SaddrmaskW { + SaddrmaskW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [saddrmask](index.html) module"] -pub struct SADDRMASK_SPEC; -impl crate::RegisterSpec for SADDRMASK_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`saddrmask::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`saddrmask::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SaddrmaskSpec; +impl crate::RegisterSpec for SaddrmaskSpec { type Ux = u32; } -#[doc = "`read()` method returns [saddrmask::R](R) reader structure"] -impl crate::Readable for SADDRMASK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [saddrmask::W](W) writer structure"] -impl crate::Writable for SADDRMASK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`saddrmask::R`](R) reader structure"] +impl crate::Readable for SaddrmaskSpec {} +#[doc = "`write(|w| ..)` method takes [`saddrmask::W`](W) writer structure"] +impl crate::Writable for SaddrmaskSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SADDRMASK to value 0"] -impl crate::Resettable for SADDRMASK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SaddrmaskSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/state.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/state.rs index 67cf43d..8727108 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/state.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/state.rs @@ -1,148 +1,137 @@ #[doc = "Register `STATE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `BUSY` reader - Bus Busy"] -pub type BUSY_R = crate::BitReader; +pub type BusyR = crate::BitReader; #[doc = "Field `MASTER` reader - Leader"] -pub type MASTER_R = crate::BitReader; +pub type MasterR = crate::BitReader; #[doc = "Field `TRANSMITTER` reader - Transmitter"] -pub type TRANSMITTER_R = crate::BitReader; +pub type TransmitterR = crate::BitReader; #[doc = "Field `NACKED` reader - Nack Received"] -pub type NACKED_R = crate::BitReader; +pub type NackedR = crate::BitReader; #[doc = "Field `BUSHOLD` reader - Bus Held"] -pub type BUSHOLD_R = crate::BitReader; -#[doc = "Field `STATE` reader - Transmission State"] -pub type STATE_R = crate::FieldReader; +pub type BusholdR = crate::BitReader; #[doc = "Transmission State\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STATE_A { +pub enum State { #[doc = "0: No transmission is being performed."] - IDLE = 0, + Idle = 0, #[doc = "1: Waiting for idle. Will send a start condition as soon as the bus is idle."] - WAIT = 1, + Wait = 1, #[doc = "2: Start transmit phase"] - START = 2, + Start = 2, #[doc = "3: Address transmit or receive phase"] - ADDR = 3, + Addr = 3, #[doc = "4: Address ack/nack transmit or receive phase"] - ADDRACK = 4, + Addrack = 4, #[doc = "5: Data transmit or receive phase"] - DATA = 5, + Data = 5, #[doc = "6: Data ack/nack transmit or receive phase"] - DATAACK = 6, + Dataack = 6, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STATE_A) -> Self { + fn from(variant: State) -> Self { variant as _ } } -impl STATE_R { +impl crate::FieldSpec for State { + type Ux = u8; +} +impl crate::IsEnum for State {} +#[doc = "Field `STATE` reader - Transmission State"] +pub type StateR = crate::FieldReader; +impl StateR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(STATE_A::IDLE), - 1 => Some(STATE_A::WAIT), - 2 => Some(STATE_A::START), - 3 => Some(STATE_A::ADDR), - 4 => Some(STATE_A::ADDRACK), - 5 => Some(STATE_A::DATA), - 6 => Some(STATE_A::DATAACK), + 0 => Some(State::Idle), + 1 => Some(State::Wait), + 2 => Some(State::Start), + 3 => Some(State::Addr), + 4 => Some(State::Addrack), + 5 => Some(State::Data), + 6 => Some(State::Dataack), _ => None, } } - #[doc = "Checks if the value of the field is `IDLE`"] + #[doc = "No transmission is being performed."] #[inline(always)] pub fn is_idle(&self) -> bool { - *self == STATE_A::IDLE + *self == State::Idle } - #[doc = "Checks if the value of the field is `WAIT`"] + #[doc = "Waiting for idle. Will send a start condition as soon as the bus is idle."] #[inline(always)] pub fn is_wait(&self) -> bool { - *self == STATE_A::WAIT + *self == State::Wait } - #[doc = "Checks if the value of the field is `START`"] + #[doc = "Start transmit phase"] #[inline(always)] pub fn is_start(&self) -> bool { - *self == STATE_A::START + *self == State::Start } - #[doc = "Checks if the value of the field is `ADDR`"] + #[doc = "Address transmit or receive phase"] #[inline(always)] pub fn is_addr(&self) -> bool { - *self == STATE_A::ADDR + *self == State::Addr } - #[doc = "Checks if the value of the field is `ADDRACK`"] + #[doc = "Address ack/nack transmit or receive phase"] #[inline(always)] pub fn is_addrack(&self) -> bool { - *self == STATE_A::ADDRACK + *self == State::Addrack } - #[doc = "Checks if the value of the field is `DATA`"] + #[doc = "Data transmit or receive phase"] #[inline(always)] pub fn is_data(&self) -> bool { - *self == STATE_A::DATA + *self == State::Data } - #[doc = "Checks if the value of the field is `DATAACK`"] + #[doc = "Data ack/nack transmit or receive phase"] #[inline(always)] pub fn is_dataack(&self) -> bool { - *self == STATE_A::DATAACK + *self == State::Dataack } } impl R { #[doc = "Bit 0 - Bus Busy"] #[inline(always)] - pub fn busy(&self) -> BUSY_R { - BUSY_R::new((self.bits & 1) != 0) + pub fn busy(&self) -> BusyR { + BusyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Leader"] #[inline(always)] - pub fn master(&self) -> MASTER_R { - MASTER_R::new(((self.bits >> 1) & 1) != 0) + pub fn master(&self) -> MasterR { + MasterR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Transmitter"] #[inline(always)] - pub fn transmitter(&self) -> TRANSMITTER_R { - TRANSMITTER_R::new(((self.bits >> 2) & 1) != 0) + pub fn transmitter(&self) -> TransmitterR { + TransmitterR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Nack Received"] #[inline(always)] - pub fn nacked(&self) -> NACKED_R { - NACKED_R::new(((self.bits >> 3) & 1) != 0) + pub fn nacked(&self) -> NackedR { + NackedR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Bus Held"] #[inline(always)] - pub fn bushold(&self) -> BUSHOLD_R { - BUSHOLD_R::new(((self.bits >> 4) & 1) != 0) + pub fn bushold(&self) -> BusholdR { + BusholdR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 5:7 - Transmission State"] #[inline(always)] - pub fn state(&self) -> STATE_R { - STATE_R::new(((self.bits >> 5) & 7) as u8) + pub fn state(&self) -> StateR { + StateR::new(((self.bits >> 5) & 7) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [state](index.html) module"] -pub struct STATE_SPEC; -impl crate::RegisterSpec for STATE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`state::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StateSpec; +impl crate::RegisterSpec for StateSpec { type Ux = u32; } -#[doc = "`read()` method returns [state::R](R) reader structure"] -impl crate::Readable for STATE_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`state::R`](R) reader structure"] +impl crate::Readable for StateSpec {} #[doc = "`reset()` method sets STATE to value 0x01"] -impl crate::Resettable for STATE_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for StateSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/status.rs index 1688cd6..8f60c29 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/status.rs @@ -1,107 +1,92 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `PSTART` reader - Pending START"] -pub type PSTART_R = crate::BitReader; +pub type PstartR = crate::BitReader; #[doc = "Field `PSTOP` reader - Pending STOP"] -pub type PSTOP_R = crate::BitReader; +pub type PstopR = crate::BitReader; #[doc = "Field `PACK` reader - Pending ACK"] -pub type PACK_R = crate::BitReader; +pub type PackR = crate::BitReader; #[doc = "Field `PNACK` reader - Pending NACK"] -pub type PNACK_R = crate::BitReader; +pub type PnackR = crate::BitReader; #[doc = "Field `PCONT` reader - Pending continue"] -pub type PCONT_R = crate::BitReader; +pub type PcontR = crate::BitReader; #[doc = "Field `PABORT` reader - Pending abort"] -pub type PABORT_R = crate::BitReader; +pub type PabortR = crate::BitReader; #[doc = "Field `TXC` reader - TX Complete"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXBL` reader - TX Buffer Level"] -pub type TXBL_R = crate::BitReader; +pub type TxblR = crate::BitReader; #[doc = "Field `RXDATAV` reader - RX Data Valid"] -pub type RXDATAV_R = crate::BitReader; +pub type RxdatavR = crate::BitReader; #[doc = "Field `RXFULL` reader - RX FIFO Full"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `TXBUFCNT` reader - TX Buffer Count"] -pub type TXBUFCNT_R = crate::FieldReader; +pub type TxbufcntR = crate::FieldReader; impl R { #[doc = "Bit 0 - Pending START"] #[inline(always)] - pub fn pstart(&self) -> PSTART_R { - PSTART_R::new((self.bits & 1) != 0) + pub fn pstart(&self) -> PstartR { + PstartR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Pending STOP"] #[inline(always)] - pub fn pstop(&self) -> PSTOP_R { - PSTOP_R::new(((self.bits >> 1) & 1) != 0) + pub fn pstop(&self) -> PstopR { + PstopR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Pending ACK"] #[inline(always)] - pub fn pack(&self) -> PACK_R { - PACK_R::new(((self.bits >> 2) & 1) != 0) + pub fn pack(&self) -> PackR { + PackR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Pending NACK"] #[inline(always)] - pub fn pnack(&self) -> PNACK_R { - PNACK_R::new(((self.bits >> 3) & 1) != 0) + pub fn pnack(&self) -> PnackR { + PnackR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Pending continue"] #[inline(always)] - pub fn pcont(&self) -> PCONT_R { - PCONT_R::new(((self.bits >> 4) & 1) != 0) + pub fn pcont(&self) -> PcontR { + PcontR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Pending abort"] #[inline(always)] - pub fn pabort(&self) -> PABORT_R { - PABORT_R::new(((self.bits >> 5) & 1) != 0) + pub fn pabort(&self) -> PabortR { + PabortR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX Complete"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new(((self.bits >> 6) & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - TX Buffer Level"] #[inline(always)] - pub fn txbl(&self) -> TXBL_R { - TXBL_R::new(((self.bits >> 7) & 1) != 0) + pub fn txbl(&self) -> TxblR { + TxblR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - RX Data Valid"] #[inline(always)] - pub fn rxdatav(&self) -> RXDATAV_R { - RXDATAV_R::new(((self.bits >> 8) & 1) != 0) + pub fn rxdatav(&self) -> RxdatavR { + RxdatavR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - RX FIFO Full"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 9) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bits 10:11 - TX Buffer Count"] #[inline(always)] - pub fn txbufcnt(&self) -> TXBUFCNT_R { - TXBUFCNT_R::new(((self.bits >> 10) & 3) as u8) + pub fn txbufcnt(&self) -> TxbufcntR { + TxbufcntR::new(((self.bits >> 10) & 3) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0x80"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0x80; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0x80; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/txdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/txdata.rs index e3980b6..61643d3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/txdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/txdata.rs @@ -1,52 +1,27 @@ #[doc = "Register `TXDATA` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXDATA` writer - TX Data"] -pub type TXDATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDATA_SPEC, u8, u8, 8, O>; +pub type TxdataW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - TX Data"] #[inline(always)] #[must_use] - pub fn txdata(&mut self) -> TXDATA_W<0> { - TXDATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txdata(&mut self) -> TxdataW { + TxdataW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdata](index.html) module"] -pub struct TXDATA_SPEC; -impl crate::RegisterSpec for TXDATA_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdata::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxdataSpec; +impl crate::RegisterSpec for TxdataSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [txdata::W](W) writer structure"] -impl crate::Writable for TXDATA_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`txdata::W`](W) writer structure"] +impl crate::Writable for TxdataSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXDATA to value 0"] -impl crate::Resettable for TXDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/txdouble.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/txdouble.rs index 320dad9..9cb5990 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/txdouble.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_ns/txdouble.rs @@ -1,60 +1,35 @@ #[doc = "Register `TXDOUBLE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXDATA0` writer - TX Data"] -pub type TXDATA0_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDOUBLE_SPEC, u8, u8, 8, O>; +pub type Txdata0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `TXDATA1` writer - TX Data"] -pub type TXDATA1_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDOUBLE_SPEC, u8, u8, 8, O>; +pub type Txdata1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - TX Data"] #[inline(always)] #[must_use] - pub fn txdata0(&mut self) -> TXDATA0_W<0> { - TXDATA0_W::new(self) + pub fn txdata0(&mut self) -> Txdata0W { + Txdata0W::new(self, 0) } #[doc = "Bits 8:15 - TX Data"] #[inline(always)] #[must_use] - pub fn txdata1(&mut self) -> TXDATA1_W<8> { - TXDATA1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txdata1(&mut self) -> Txdata1W { + Txdata1W::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdouble](index.html) module"] -pub struct TXDOUBLE_SPEC; -impl crate::RegisterSpec for TXDOUBLE_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdouble::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxdoubleSpec; +impl crate::RegisterSpec for TxdoubleSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [txdouble::W](W) writer structure"] -impl crate::Writable for TXDOUBLE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`txdouble::W`](W) writer structure"] +impl crate::Writable for TxdoubleSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXDOUBLE to value 0"] -impl crate::Resettable for TXDOUBLE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxdoubleSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s.rs index 0538763..94a4ce5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s.rs @@ -1,106 +1,210 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + ctrl: Ctrl, + cmd: Cmd, + state: State, + status: Status, + clkdiv: Clkdiv, + saddr: Saddr, + saddrmask: Saddrmask, + rxdata: Rxdata, + rxdouble: Rxdouble, + rxdatap: Rxdatap, + rxdoublep: Rxdoublep, + txdata: Txdata, + txdouble: Txdouble, + if_: If, + ien: Ien, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x0c - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x10 - No Description"] - pub state: STATE, + #[inline(always)] + pub const fn state(&self) -> &State { + &self.state + } #[doc = "0x14 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x18 - No Description"] - pub clkdiv: CLKDIV, + #[inline(always)] + pub const fn clkdiv(&self) -> &Clkdiv { + &self.clkdiv + } #[doc = "0x1c - No Description"] - pub saddr: SADDR, + #[inline(always)] + pub const fn saddr(&self) -> &Saddr { + &self.saddr + } #[doc = "0x20 - No Description"] - pub saddrmask: SADDRMASK, + #[inline(always)] + pub const fn saddrmask(&self) -> &Saddrmask { + &self.saddrmask + } #[doc = "0x24 - No Description"] - pub rxdata: RXDATA, + #[inline(always)] + pub const fn rxdata(&self) -> &Rxdata { + &self.rxdata + } #[doc = "0x28 - No Description"] - pub rxdouble: RXDOUBLE, + #[inline(always)] + pub const fn rxdouble(&self) -> &Rxdouble { + &self.rxdouble + } #[doc = "0x2c - No Description"] - pub rxdatap: RXDATAP, + #[inline(always)] + pub const fn rxdatap(&self) -> &Rxdatap { + &self.rxdatap + } #[doc = "0x30 - No Description"] - pub rxdoublep: RXDOUBLEP, + #[inline(always)] + pub const fn rxdoublep(&self) -> &Rxdoublep { + &self.rxdoublep + } #[doc = "0x34 - No Description"] - pub txdata: TXDATA, + #[inline(always)] + pub const fn txdata(&self) -> &Txdata { + &self.txdata + } #[doc = "0x38 - No Description"] - pub txdouble: TXDOUBLE, + #[inline(always)] + pub const fn txdouble(&self) -> &Txdouble { + &self.txdouble + } #[doc = "0x3c - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x40 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATE (r) register accessor: an alias for `Reg`"] -pub type STATE = crate::Reg; +#[doc = "STATE (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`state::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@state`] +module"] +#[doc(alias = "STATE")] +pub type State = crate::Reg; #[doc = "No Description"] pub mod state; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "CLKDIV (rw) register accessor: an alias for `Reg`"] -pub type CLKDIV = crate::Reg; +#[doc = "CLKDIV (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv`] +module"] +#[doc(alias = "CLKDIV")] +pub type Clkdiv = crate::Reg; #[doc = "No Description"] pub mod clkdiv; -#[doc = "SADDR (rw) register accessor: an alias for `Reg`"] -pub type SADDR = crate::Reg; +#[doc = "SADDR (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`saddr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`saddr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@saddr`] +module"] +#[doc(alias = "SADDR")] +pub type Saddr = crate::Reg; #[doc = "No Description"] pub mod saddr; -#[doc = "SADDRMASK (rw) register accessor: an alias for `Reg`"] -pub type SADDRMASK = crate::Reg; +#[doc = "SADDRMASK (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`saddrmask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`saddrmask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@saddrmask`] +module"] +#[doc(alias = "SADDRMASK")] +pub type Saddrmask = crate::Reg; #[doc = "No Description"] pub mod saddrmask; -#[doc = "RXDATA (r) register accessor: an alias for `Reg`"] -pub type RXDATA = crate::Reg; +#[doc = "RXDATA (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdata::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdata`] +module"] +#[doc(alias = "RXDATA")] +pub type Rxdata = crate::Reg; #[doc = "No Description"] pub mod rxdata; -#[doc = "RXDOUBLE (r) register accessor: an alias for `Reg`"] -pub type RXDOUBLE = crate::Reg; +#[doc = "RXDOUBLE (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdouble::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdouble`] +module"] +#[doc(alias = "RXDOUBLE")] +pub type Rxdouble = crate::Reg; #[doc = "No Description"] pub mod rxdouble; -#[doc = "RXDATAP (r) register accessor: an alias for `Reg`"] -pub type RXDATAP = crate::Reg; +#[doc = "RXDATAP (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdatap::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdatap`] +module"] +#[doc(alias = "RXDATAP")] +pub type Rxdatap = crate::Reg; #[doc = "No Description"] pub mod rxdatap; -#[doc = "RXDOUBLEP (r) register accessor: an alias for `Reg`"] -pub type RXDOUBLEP = crate::Reg; +#[doc = "RXDOUBLEP (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdoublep::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdoublep`] +module"] +#[doc(alias = "RXDOUBLEP")] +pub type Rxdoublep = crate::Reg; #[doc = "No Description"] pub mod rxdoublep; -#[doc = "TXDATA (w) register accessor: an alias for `Reg`"] -pub type TXDATA = crate::Reg; +#[doc = "TXDATA (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdata::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txdata`] +module"] +#[doc(alias = "TXDATA")] +pub type Txdata = crate::Reg; #[doc = "No Description"] pub mod txdata; -#[doc = "TXDOUBLE (w) register accessor: an alias for `Reg`"] -pub type TXDOUBLE = crate::Reg; +#[doc = "TXDOUBLE (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdouble::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txdouble`] +module"] +#[doc(alias = "TXDOUBLE")] +pub type Txdouble = crate::Reg; #[doc = "No Description"] pub mod txdouble; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/clkdiv.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/clkdiv.rs index 90aa445..7b64d88 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/clkdiv.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/clkdiv.rs @@ -1,80 +1,40 @@ #[doc = "Register `CLKDIV` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKDIV` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DIV` reader - Clock Divider"] -pub type DIV_R = crate::FieldReader; +pub type DivR = crate::FieldReader; #[doc = "Field `DIV` writer - Clock Divider"] -pub type DIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CLKDIV_SPEC, u16, u16, 9, O>; +pub type DivW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; impl R { #[doc = "Bits 0:8 - Clock Divider"] #[inline(always)] - pub fn div(&self) -> DIV_R { - DIV_R::new((self.bits & 0x01ff) as u16) + pub fn div(&self) -> DivR { + DivR::new((self.bits & 0x01ff) as u16) } } impl W { #[doc = "Bits 0:8 - Clock Divider"] #[inline(always)] #[must_use] - pub fn div(&mut self) -> DIV_W<0> { - DIV_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn div(&mut self) -> DivW { + DivW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clkdiv](index.html) module"] -pub struct CLKDIV_SPEC; -impl crate::RegisterSpec for CLKDIV_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ClkdivSpec; +impl crate::RegisterSpec for ClkdivSpec { type Ux = u32; } -#[doc = "`read()` method returns [clkdiv::R](R) reader structure"] -impl crate::Readable for CLKDIV_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clkdiv::W](W) writer structure"] -impl crate::Writable for CLKDIV_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`clkdiv::R`](R) reader structure"] +impl crate::Readable for ClkdivSpec {} +#[doc = "`write(|w| ..)` method takes [`clkdiv::W`](W) writer structure"] +impl crate::Writable for ClkdivSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV to value 0"] -impl crate::Resettable for CLKDIV_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ClkdivSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/cmd.rs index 57a4f73..d935390 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/cmd.rs @@ -1,108 +1,83 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` writer - Send start condition"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STOP` writer - Send stop condition"] -pub type STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACK` writer - Send ACK"] -pub type ACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type AckW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NACK` writer - Send NACK"] -pub type NACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type NackW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CONT` writer - Continue transmission"] -pub type CONT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type ContW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ABORT` writer - Abort transmission"] -pub type ABORT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type AbortW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEARTX` writer - Clear TX"] -pub type CLEARTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type CleartxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEARPC` writer - Clear Pending Commands"] -pub type CLEARPC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type ClearpcW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Send start condition"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Send stop condition"] #[inline(always)] #[must_use] - pub fn stop(&mut self) -> STOP_W<1> { - STOP_W::new(self) + pub fn stop(&mut self) -> StopW { + StopW::new(self, 1) } #[doc = "Bit 2 - Send ACK"] #[inline(always)] #[must_use] - pub fn ack(&mut self) -> ACK_W<2> { - ACK_W::new(self) + pub fn ack(&mut self) -> AckW { + AckW::new(self, 2) } #[doc = "Bit 3 - Send NACK"] #[inline(always)] #[must_use] - pub fn nack(&mut self) -> NACK_W<3> { - NACK_W::new(self) + pub fn nack(&mut self) -> NackW { + NackW::new(self, 3) } #[doc = "Bit 4 - Continue transmission"] #[inline(always)] #[must_use] - pub fn cont(&mut self) -> CONT_W<4> { - CONT_W::new(self) + pub fn cont(&mut self) -> ContW { + ContW::new(self, 4) } #[doc = "Bit 5 - Abort transmission"] #[inline(always)] #[must_use] - pub fn abort(&mut self) -> ABORT_W<5> { - ABORT_W::new(self) + pub fn abort(&mut self) -> AbortW { + AbortW::new(self, 5) } #[doc = "Bit 6 - Clear TX"] #[inline(always)] #[must_use] - pub fn cleartx(&mut self) -> CLEARTX_W<6> { - CLEARTX_W::new(self) + pub fn cleartx(&mut self) -> CleartxW { + CleartxW::new(self, 6) } #[doc = "Bit 7 - Clear Pending Commands"] #[inline(always)] #[must_use] - pub fn clearpc(&mut self) -> CLEARPC_W<7> { - CLEARPC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clearpc(&mut self) -> ClearpcW { + ClearpcW::new(self, 7) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/ctrl.rs index b334eef..8e17ecb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/ctrl.rs @@ -1,1016 +1,1033 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CORERST` reader - Soft Reset the internal state registers"] -pub type CORERST_R = crate::BitReader; +pub type W = crate::W; #[doc = "Soft Reset the internal state registers\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CORERST_A { +pub enum Corerst { #[doc = "0: No change to internal state registers"] - DISABLE = 0, + Disable = 0, #[doc = "1: Reset the internal state registers"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CORERST_A) -> Self { + fn from(variant: Corerst) -> Self { variant as u8 != 0 } } -impl CORERST_R { +#[doc = "Field `CORERST` reader - Soft Reset the internal state registers"] +pub type CorerstR = crate::BitReader; +impl CorerstR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CORERST_A { + pub const fn variant(&self) -> Corerst { match self.bits { - false => CORERST_A::DISABLE, - true => CORERST_A::ENABLE, + false => Corerst::Disable, + true => Corerst::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "No change to internal state registers"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CORERST_A::DISABLE + *self == Corerst::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Reset the internal state registers"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CORERST_A::ENABLE + *self == Corerst::Enable } } #[doc = "Field `CORERST` writer - Soft Reset the internal state registers"] -pub type CORERST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, CORERST_A, O>; -impl<'a, const O: u8> CORERST_W<'a, O> { +pub type CorerstW<'a, REG> = crate::BitWriter<'a, REG, Corerst>; +impl<'a, REG> CorerstW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No change to internal state registers"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CORERST_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Corerst::Disable) } #[doc = "Reset the internal state registers"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CORERST_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Corerst::Enable) } } -#[doc = "Field `SLAVE` reader - Addressable as Follower"] -pub type SLAVE_R = crate::BitReader; #[doc = "Addressable as Follower\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SLAVE_A { +pub enum Slave { #[doc = "0: All addresses will be responded to with a NACK"] - DISABLE = 0, + Disable = 0, #[doc = "1: Addresses matching the programmed follower address or the general call address (if enabled) require a response from software. Other addresses are automatically responded to with a NACK."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SLAVE_A) -> Self { + fn from(variant: Slave) -> Self { variant as u8 != 0 } } -impl SLAVE_R { +#[doc = "Field `SLAVE` reader - Addressable as Follower"] +pub type SlaveR = crate::BitReader; +impl SlaveR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SLAVE_A { + pub const fn variant(&self) -> Slave { match self.bits { - false => SLAVE_A::DISABLE, - true => SLAVE_A::ENABLE, + false => Slave::Disable, + true => Slave::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "All addresses will be responded to with a NACK"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == SLAVE_A::DISABLE + *self == Slave::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Addresses matching the programmed follower address or the general call address (if enabled) require a response from software. Other addresses are automatically responded to with a NACK."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == SLAVE_A::ENABLE + *self == Slave::Enable } } #[doc = "Field `SLAVE` writer - Addressable as Follower"] -pub type SLAVE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, SLAVE_A, O>; -impl<'a, const O: u8> SLAVE_W<'a, O> { +pub type SlaveW<'a, REG> = crate::BitWriter<'a, REG, Slave>; +impl<'a, REG> SlaveW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "All addresses will be responded to with a NACK"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(SLAVE_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Slave::Disable) } #[doc = "Addresses matching the programmed follower address or the general call address (if enabled) require a response from software. Other addresses are automatically responded to with a NACK."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(SLAVE_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Slave::Enable) } } -#[doc = "Field `AUTOACK` reader - Automatic Acknowledge"] -pub type AUTOACK_R = crate::BitReader; #[doc = "Automatic Acknowledge\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AUTOACK_A { +pub enum Autoack { #[doc = "0: Software must give one ACK command for each ACK transmitted on the I2C bus."] - DISABLE = 0, + Disable = 0, #[doc = "1: Addresses that are not automatically NACK'ed, and all data is automatically acknowledged."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AUTOACK_A) -> Self { + fn from(variant: Autoack) -> Self { variant as u8 != 0 } } -impl AUTOACK_R { +#[doc = "Field `AUTOACK` reader - Automatic Acknowledge"] +pub type AutoackR = crate::BitReader; +impl AutoackR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> AUTOACK_A { + pub const fn variant(&self) -> Autoack { match self.bits { - false => AUTOACK_A::DISABLE, - true => AUTOACK_A::ENABLE, + false => Autoack::Disable, + true => Autoack::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Software must give one ACK command for each ACK transmitted on the I2C bus."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == AUTOACK_A::DISABLE + *self == Autoack::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Addresses that are not automatically NACK'ed, and all data is automatically acknowledged."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == AUTOACK_A::ENABLE + *self == Autoack::Enable } } #[doc = "Field `AUTOACK` writer - Automatic Acknowledge"] -pub type AUTOACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, AUTOACK_A, O>; -impl<'a, const O: u8> AUTOACK_W<'a, O> { +pub type AutoackW<'a, REG> = crate::BitWriter<'a, REG, Autoack>; +impl<'a, REG> AutoackW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Software must give one ACK command for each ACK transmitted on the I2C bus."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(AUTOACK_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Autoack::Disable) } #[doc = "Addresses that are not automatically NACK'ed, and all data is automatically acknowledged."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(AUTOACK_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Autoack::Enable) } } -#[doc = "Field `AUTOSE` reader - Automatic STOP when Empty"] -pub type AUTOSE_R = crate::BitReader; #[doc = "Automatic STOP when Empty\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AUTOSE_A { +pub enum Autose { #[doc = "0: A stop must be sent manually when no more data is to be transmitted."] - DISABLE = 0, + Disable = 0, #[doc = "1: The leader automatically sends a STOP when no more data is available for transmission."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AUTOSE_A) -> Self { + fn from(variant: Autose) -> Self { variant as u8 != 0 } } -impl AUTOSE_R { +#[doc = "Field `AUTOSE` reader - Automatic STOP when Empty"] +pub type AutoseR = crate::BitReader; +impl AutoseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> AUTOSE_A { + pub const fn variant(&self) -> Autose { match self.bits { - false => AUTOSE_A::DISABLE, - true => AUTOSE_A::ENABLE, + false => Autose::Disable, + true => Autose::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "A stop must be sent manually when no more data is to be transmitted."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == AUTOSE_A::DISABLE + *self == Autose::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The leader automatically sends a STOP when no more data is available for transmission."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == AUTOSE_A::ENABLE + *self == Autose::Enable } } #[doc = "Field `AUTOSE` writer - Automatic STOP when Empty"] -pub type AUTOSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, AUTOSE_A, O>; -impl<'a, const O: u8> AUTOSE_W<'a, O> { +pub type AutoseW<'a, REG> = crate::BitWriter<'a, REG, Autose>; +impl<'a, REG> AutoseW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "A stop must be sent manually when no more data is to be transmitted."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(AUTOSE_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Autose::Disable) } #[doc = "The leader automatically sends a STOP when no more data is available for transmission."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(AUTOSE_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Autose::Enable) } } -#[doc = "Field `AUTOSN` reader - Automatic STOP on NACK"] -pub type AUTOSN_R = crate::BitReader; #[doc = "Automatic STOP on NACK\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AUTOSN_A { +pub enum Autosn { #[doc = "0: Stop is not automatically sent if a NACK is received from a follower."] - DISABLE = 0, + Disable = 0, #[doc = "1: The leader automatically sends a STOP if a NACK is received from a follower."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AUTOSN_A) -> Self { + fn from(variant: Autosn) -> Self { variant as u8 != 0 } } -impl AUTOSN_R { +#[doc = "Field `AUTOSN` reader - Automatic STOP on NACK"] +pub type AutosnR = crate::BitReader; +impl AutosnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> AUTOSN_A { + pub const fn variant(&self) -> Autosn { match self.bits { - false => AUTOSN_A::DISABLE, - true => AUTOSN_A::ENABLE, + false => Autosn::Disable, + true => Autosn::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Stop is not automatically sent if a NACK is received from a follower."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == AUTOSN_A::DISABLE + *self == Autosn::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The leader automatically sends a STOP if a NACK is received from a follower."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == AUTOSN_A::ENABLE + *self == Autosn::Enable } } #[doc = "Field `AUTOSN` writer - Automatic STOP on NACK"] -pub type AUTOSN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, AUTOSN_A, O>; -impl<'a, const O: u8> AUTOSN_W<'a, O> { +pub type AutosnW<'a, REG> = crate::BitWriter<'a, REG, Autosn>; +impl<'a, REG> AutosnW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Stop is not automatically sent if a NACK is received from a follower."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(AUTOSN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Autosn::Disable) } #[doc = "The leader automatically sends a STOP if a NACK is received from a follower."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(AUTOSN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Autosn::Enable) } } -#[doc = "Field `ARBDIS` reader - Arbitration Disable"] -pub type ARBDIS_R = crate::BitReader; #[doc = "Arbitration Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ARBDIS_A { +pub enum Arbdis { #[doc = "0: When a device loses arbitration, the ARBIF interrupt flag is set and the bus is released."] - DISABLE = 0, + Disable = 0, #[doc = "1: When a device loses arbitration, the ARBIF interrupt flag is set, but communication proceeds."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ARBDIS_A) -> Self { + fn from(variant: Arbdis) -> Self { variant as u8 != 0 } } -impl ARBDIS_R { +#[doc = "Field `ARBDIS` reader - Arbitration Disable"] +pub type ArbdisR = crate::BitReader; +impl ArbdisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ARBDIS_A { + pub const fn variant(&self) -> Arbdis { match self.bits { - false => ARBDIS_A::DISABLE, - true => ARBDIS_A::ENABLE, + false => Arbdis::Disable, + true => Arbdis::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "When a device loses arbitration, the ARBIF interrupt flag is set and the bus is released."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ARBDIS_A::DISABLE + *self == Arbdis::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "When a device loses arbitration, the ARBIF interrupt flag is set, but communication proceeds."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ARBDIS_A::ENABLE + *self == Arbdis::Enable } } #[doc = "Field `ARBDIS` writer - Arbitration Disable"] -pub type ARBDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, ARBDIS_A, O>; -impl<'a, const O: u8> ARBDIS_W<'a, O> { +pub type ArbdisW<'a, REG> = crate::BitWriter<'a, REG, Arbdis>; +impl<'a, REG> ArbdisW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "When a device loses arbitration, the ARBIF interrupt flag is set and the bus is released."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ARBDIS_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Arbdis::Disable) } #[doc = "When a device loses arbitration, the ARBIF interrupt flag is set, but communication proceeds."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ARBDIS_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Arbdis::Enable) } } -#[doc = "Field `GCAMEN` reader - General Call Address Match Enable"] -pub type GCAMEN_R = crate::BitReader; #[doc = "General Call Address Match Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GCAMEN_A { +pub enum Gcamen { #[doc = "0: General call address will be NACK'ed if it is not included by the follower address and address mask."] - DISABLE = 0, + Disable = 0, #[doc = "1: When a general call address is received, a software response is required"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GCAMEN_A) -> Self { + fn from(variant: Gcamen) -> Self { variant as u8 != 0 } } -impl GCAMEN_R { +#[doc = "Field `GCAMEN` reader - General Call Address Match Enable"] +pub type GcamenR = crate::BitReader; +impl GcamenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> GCAMEN_A { + pub const fn variant(&self) -> Gcamen { match self.bits { - false => GCAMEN_A::DISABLE, - true => GCAMEN_A::ENABLE, + false => Gcamen::Disable, + true => Gcamen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "General call address will be NACK'ed if it is not included by the follower address and address mask."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == GCAMEN_A::DISABLE + *self == Gcamen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "When a general call address is received, a software response is required"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == GCAMEN_A::ENABLE + *self == Gcamen::Enable } } #[doc = "Field `GCAMEN` writer - General Call Address Match Enable"] -pub type GCAMEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, GCAMEN_A, O>; -impl<'a, const O: u8> GCAMEN_W<'a, O> { +pub type GcamenW<'a, REG> = crate::BitWriter<'a, REG, Gcamen>; +impl<'a, REG> GcamenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "General call address will be NACK'ed if it is not included by the follower address and address mask."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(GCAMEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Gcamen::Disable) } #[doc = "When a general call address is received, a software response is required"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(GCAMEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Gcamen::Enable) } } -#[doc = "Field `TXBIL` reader - TX Buffer Interrupt Level"] -pub type TXBIL_R = crate::BitReader; #[doc = "TX Buffer Interrupt Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TXBIL_A { +pub enum Txbil { #[doc = "0: TXBL status and the TXBL interrupt flag are set when the transmit buffer becomes empty. TXBL is cleared when the buffer becomes nonempty."] - EMPTY = 0, + Empty = 0, #[doc = "1: TXBL status and the TXBL interrupt flag are set when the transmit buffer goes from full to half-full or empty. TXBL is cleared when the buffer becomes full"] - HALF_FULL = 1, + HalfFull = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TXBIL_A) -> Self { + fn from(variant: Txbil) -> Self { variant as u8 != 0 } } -impl TXBIL_R { +#[doc = "Field `TXBIL` reader - TX Buffer Interrupt Level"] +pub type TxbilR = crate::BitReader; +impl TxbilR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXBIL_A { + pub const fn variant(&self) -> Txbil { match self.bits { - false => TXBIL_A::EMPTY, - true => TXBIL_A::HALF_FULL, + false => Txbil::Empty, + true => Txbil::HalfFull, } } - #[doc = "Checks if the value of the field is `EMPTY`"] + #[doc = "TXBL status and the TXBL interrupt flag are set when the transmit buffer becomes empty. TXBL is cleared when the buffer becomes nonempty."] #[inline(always)] pub fn is_empty(&self) -> bool { - *self == TXBIL_A::EMPTY + *self == Txbil::Empty } - #[doc = "Checks if the value of the field is `HALF_FULL`"] + #[doc = "TXBL status and the TXBL interrupt flag are set when the transmit buffer goes from full to half-full or empty. TXBL is cleared when the buffer becomes full"] #[inline(always)] pub fn is_half_full(&self) -> bool { - *self == TXBIL_A::HALF_FULL + *self == Txbil::HalfFull } } #[doc = "Field `TXBIL` writer - TX Buffer Interrupt Level"] -pub type TXBIL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, TXBIL_A, O>; -impl<'a, const O: u8> TXBIL_W<'a, O> { +pub type TxbilW<'a, REG> = crate::BitWriter<'a, REG, Txbil>; +impl<'a, REG> TxbilW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "TXBL status and the TXBL interrupt flag are set when the transmit buffer becomes empty. TXBL is cleared when the buffer becomes nonempty."] #[inline(always)] - pub fn empty(self) -> &'a mut W { - self.variant(TXBIL_A::EMPTY) + pub fn empty(self) -> &'a mut crate::W { + self.variant(Txbil::Empty) } #[doc = "TXBL status and the TXBL interrupt flag are set when the transmit buffer goes from full to half-full or empty. TXBL is cleared when the buffer becomes full"] #[inline(always)] - pub fn half_full(self) -> &'a mut W { - self.variant(TXBIL_A::HALF_FULL) + pub fn half_full(self) -> &'a mut crate::W { + self.variant(Txbil::HalfFull) } } -#[doc = "Field `CLHR` reader - Clock Low High Ratio"] -pub type CLHR_R = crate::FieldReader; #[doc = "Clock Low High Ratio\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLHR_A { +pub enum Clhr { #[doc = "0: Nlow=4 and Nhigh=4, and the Nlow:Nhigh ratio is 4:4"] - STANDARD = 0, + Standard = 0, #[doc = "1: Nlow=6 and Nhigh=3, and the Nlow:Nhigh ratio is 6:3"] - ASYMMETRIC = 1, + Asymmetric = 1, #[doc = "2: Nlow=11 and Nhigh=6, and the Nlow:Nhigh ratio is 11:6"] - FAST = 2, + Fast = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLHR_A) -> Self { + fn from(variant: Clhr) -> Self { variant as _ } } -impl CLHR_R { +impl crate::FieldSpec for Clhr { + type Ux = u8; +} +impl crate::IsEnum for Clhr {} +#[doc = "Field `CLHR` reader - Clock Low High Ratio"] +pub type ClhrR = crate::FieldReader; +impl ClhrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLHR_A::STANDARD), - 1 => Some(CLHR_A::ASYMMETRIC), - 2 => Some(CLHR_A::FAST), + 0 => Some(Clhr::Standard), + 1 => Some(Clhr::Asymmetric), + 2 => Some(Clhr::Fast), _ => None, } } - #[doc = "Checks if the value of the field is `STANDARD`"] + #[doc = "Nlow=4 and Nhigh=4, and the Nlow:Nhigh ratio is 4:4"] #[inline(always)] pub fn is_standard(&self) -> bool { - *self == CLHR_A::STANDARD + *self == Clhr::Standard } - #[doc = "Checks if the value of the field is `ASYMMETRIC`"] + #[doc = "Nlow=6 and Nhigh=3, and the Nlow:Nhigh ratio is 6:3"] #[inline(always)] pub fn is_asymmetric(&self) -> bool { - *self == CLHR_A::ASYMMETRIC + *self == Clhr::Asymmetric } - #[doc = "Checks if the value of the field is `FAST`"] + #[doc = "Nlow=11 and Nhigh=6, and the Nlow:Nhigh ratio is 11:6"] #[inline(always)] pub fn is_fast(&self) -> bool { - *self == CLHR_A::FAST + *self == Clhr::Fast } } #[doc = "Field `CLHR` writer - Clock Low High Ratio"] -pub type CLHR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, CLHR_A, 2, O>; -impl<'a, const O: u8> CLHR_W<'a, O> { +pub type ClhrW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clhr>; +impl<'a, REG> ClhrW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Nlow=4 and Nhigh=4, and the Nlow:Nhigh ratio is 4:4"] #[inline(always)] - pub fn standard(self) -> &'a mut W { - self.variant(CLHR_A::STANDARD) + pub fn standard(self) -> &'a mut crate::W { + self.variant(Clhr::Standard) } #[doc = "Nlow=6 and Nhigh=3, and the Nlow:Nhigh ratio is 6:3"] #[inline(always)] - pub fn asymmetric(self) -> &'a mut W { - self.variant(CLHR_A::ASYMMETRIC) + pub fn asymmetric(self) -> &'a mut crate::W { + self.variant(Clhr::Asymmetric) } #[doc = "Nlow=11 and Nhigh=6, and the Nlow:Nhigh ratio is 11:6"] #[inline(always)] - pub fn fast(self) -> &'a mut W { - self.variant(CLHR_A::FAST) + pub fn fast(self) -> &'a mut crate::W { + self.variant(Clhr::Fast) } } -#[doc = "Field `BITO` reader - Bus Idle Timeout"] -pub type BITO_R = crate::FieldReader; #[doc = "Bus Idle Timeout\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BITO_A { +pub enum Bito { #[doc = "0: Timeout disabled"] - OFF = 0, + Off = 0, #[doc = "1: Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."] - I2C40PCC = 1, + I2c40pcc = 1, #[doc = "2: Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."] - I2C80PCC = 2, + I2c80pcc = 2, #[doc = "3: Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."] - I2C160PCC = 3, + I2c160pcc = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BITO_A) -> Self { + fn from(variant: Bito) -> Self { variant as _ } } -impl BITO_R { +impl crate::FieldSpec for Bito { + type Ux = u8; +} +impl crate::IsEnum for Bito {} +#[doc = "Field `BITO` reader - Bus Idle Timeout"] +pub type BitoR = crate::FieldReader; +impl BitoR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> BITO_A { + pub const fn variant(&self) -> Bito { match self.bits { - 0 => BITO_A::OFF, - 1 => BITO_A::I2C40PCC, - 2 => BITO_A::I2C80PCC, - 3 => BITO_A::I2C160PCC, + 0 => Bito::Off, + 1 => Bito::I2c40pcc, + 2 => Bito::I2c80pcc, + 3 => Bito::I2c160pcc, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Timeout disabled"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == BITO_A::OFF + *self == Bito::Off } - #[doc = "Checks if the value of the field is `I2C40PCC`"] + #[doc = "Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."] #[inline(always)] pub fn is_i2c40pcc(&self) -> bool { - *self == BITO_A::I2C40PCC + *self == Bito::I2c40pcc } - #[doc = "Checks if the value of the field is `I2C80PCC`"] + #[doc = "Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."] #[inline(always)] pub fn is_i2c80pcc(&self) -> bool { - *self == BITO_A::I2C80PCC + *self == Bito::I2c80pcc } - #[doc = "Checks if the value of the field is `I2C160PCC`"] + #[doc = "Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."] #[inline(always)] pub fn is_i2c160pcc(&self) -> bool { - *self == BITO_A::I2C160PCC + *self == Bito::I2c160pcc } } #[doc = "Field `BITO` writer - Bus Idle Timeout"] -pub type BITO_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, BITO_A, 2, O>; -impl<'a, const O: u8> BITO_W<'a, O> { +pub type BitoW<'a, REG> = crate::FieldWriter<'a, REG, 2, Bito, crate::Safe>; +impl<'a, REG> BitoW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Timeout disabled"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(BITO_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Bito::Off) } #[doc = "Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."] #[inline(always)] - pub fn i2c40pcc(self) -> &'a mut W { - self.variant(BITO_A::I2C40PCC) + pub fn i2c40pcc(self) -> &'a mut crate::W { + self.variant(Bito::I2c40pcc) } #[doc = "Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."] #[inline(always)] - pub fn i2c80pcc(self) -> &'a mut W { - self.variant(BITO_A::I2C80PCC) + pub fn i2c80pcc(self) -> &'a mut crate::W { + self.variant(Bito::I2c80pcc) } #[doc = "Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."] #[inline(always)] - pub fn i2c160pcc(self) -> &'a mut W { - self.variant(BITO_A::I2C160PCC) + pub fn i2c160pcc(self) -> &'a mut crate::W { + self.variant(Bito::I2c160pcc) } } -#[doc = "Field `GIBITO` reader - Go Idle on Bus Idle Timeout"] -pub type GIBITO_R = crate::BitReader; #[doc = "Go Idle on Bus Idle Timeout\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GIBITO_A { +pub enum Gibito { #[doc = "0: A bus idle timeout has no effect on the bus state."] - DISABLE = 0, + Disable = 0, #[doc = "1: A bus idle timeout tells the I2C module that the bus is idle, allowing new transfers to be initiated."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GIBITO_A) -> Self { + fn from(variant: Gibito) -> Self { variant as u8 != 0 } } -impl GIBITO_R { +#[doc = "Field `GIBITO` reader - Go Idle on Bus Idle Timeout"] +pub type GibitoR = crate::BitReader; +impl GibitoR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> GIBITO_A { + pub const fn variant(&self) -> Gibito { match self.bits { - false => GIBITO_A::DISABLE, - true => GIBITO_A::ENABLE, + false => Gibito::Disable, + true => Gibito::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "A bus idle timeout has no effect on the bus state."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == GIBITO_A::DISABLE + *self == Gibito::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "A bus idle timeout tells the I2C module that the bus is idle, allowing new transfers to be initiated."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == GIBITO_A::ENABLE + *self == Gibito::Enable } } #[doc = "Field `GIBITO` writer - Go Idle on Bus Idle Timeout"] -pub type GIBITO_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, GIBITO_A, O>; -impl<'a, const O: u8> GIBITO_W<'a, O> { +pub type GibitoW<'a, REG> = crate::BitWriter<'a, REG, Gibito>; +impl<'a, REG> GibitoW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "A bus idle timeout has no effect on the bus state."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(GIBITO_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Gibito::Disable) } #[doc = "A bus idle timeout tells the I2C module that the bus is idle, allowing new transfers to be initiated."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(GIBITO_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Gibito::Enable) } } -#[doc = "Field `CLTO` reader - Clock Low Timeout"] -pub type CLTO_R = crate::FieldReader; #[doc = "Clock Low Timeout\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLTO_A { +pub enum Clto { #[doc = "0: Timeout disabled"] - OFF = 0, + Off = 0, #[doc = "1: Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."] - I2C40PCC = 1, + I2c40pcc = 1, #[doc = "2: Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."] - I2C80PCC = 2, + I2c80pcc = 2, #[doc = "3: Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."] - I2C160PCC = 3, + I2c160pcc = 3, #[doc = "4: Timeout after 320 prescaled clock cycles. In standard mode at 100 kHz, this results in a 400us timeout."] - I2C320PCC = 4, + I2c320pcc = 4, #[doc = "5: Timeout after 1024 prescaled clock cycles. In standard mode at 100 kHz, this results in a 1280us timeout."] - I2C1024PCC = 5, + I2c1024pcc = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLTO_A) -> Self { + fn from(variant: Clto) -> Self { variant as _ } } -impl CLTO_R { +impl crate::FieldSpec for Clto { + type Ux = u8; +} +impl crate::IsEnum for Clto {} +#[doc = "Field `CLTO` reader - Clock Low Timeout"] +pub type CltoR = crate::FieldReader; +impl CltoR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLTO_A::OFF), - 1 => Some(CLTO_A::I2C40PCC), - 2 => Some(CLTO_A::I2C80PCC), - 3 => Some(CLTO_A::I2C160PCC), - 4 => Some(CLTO_A::I2C320PCC), - 5 => Some(CLTO_A::I2C1024PCC), + 0 => Some(Clto::Off), + 1 => Some(Clto::I2c40pcc), + 2 => Some(Clto::I2c80pcc), + 3 => Some(Clto::I2c160pcc), + 4 => Some(Clto::I2c320pcc), + 5 => Some(Clto::I2c1024pcc), _ => None, } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Timeout disabled"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == CLTO_A::OFF + *self == Clto::Off } - #[doc = "Checks if the value of the field is `I2C40PCC`"] + #[doc = "Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."] #[inline(always)] pub fn is_i2c40pcc(&self) -> bool { - *self == CLTO_A::I2C40PCC + *self == Clto::I2c40pcc } - #[doc = "Checks if the value of the field is `I2C80PCC`"] + #[doc = "Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."] #[inline(always)] pub fn is_i2c80pcc(&self) -> bool { - *self == CLTO_A::I2C80PCC + *self == Clto::I2c80pcc } - #[doc = "Checks if the value of the field is `I2C160PCC`"] + #[doc = "Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."] #[inline(always)] pub fn is_i2c160pcc(&self) -> bool { - *self == CLTO_A::I2C160PCC + *self == Clto::I2c160pcc } - #[doc = "Checks if the value of the field is `I2C320PCC`"] + #[doc = "Timeout after 320 prescaled clock cycles. In standard mode at 100 kHz, this results in a 400us timeout."] #[inline(always)] pub fn is_i2c320pcc(&self) -> bool { - *self == CLTO_A::I2C320PCC + *self == Clto::I2c320pcc } - #[doc = "Checks if the value of the field is `I2C1024PCC`"] + #[doc = "Timeout after 1024 prescaled clock cycles. In standard mode at 100 kHz, this results in a 1280us timeout."] #[inline(always)] pub fn is_i2c1024pcc(&self) -> bool { - *self == CLTO_A::I2C1024PCC + *self == Clto::I2c1024pcc } } #[doc = "Field `CLTO` writer - Clock Low Timeout"] -pub type CLTO_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, CLTO_A, 3, O>; -impl<'a, const O: u8> CLTO_W<'a, O> { +pub type CltoW<'a, REG> = crate::FieldWriter<'a, REG, 3, Clto>; +impl<'a, REG> CltoW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Timeout disabled"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(CLTO_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Clto::Off) } #[doc = "Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."] #[inline(always)] - pub fn i2c40pcc(self) -> &'a mut W { - self.variant(CLTO_A::I2C40PCC) + pub fn i2c40pcc(self) -> &'a mut crate::W { + self.variant(Clto::I2c40pcc) } #[doc = "Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."] #[inline(always)] - pub fn i2c80pcc(self) -> &'a mut W { - self.variant(CLTO_A::I2C80PCC) + pub fn i2c80pcc(self) -> &'a mut crate::W { + self.variant(Clto::I2c80pcc) } #[doc = "Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."] #[inline(always)] - pub fn i2c160pcc(self) -> &'a mut W { - self.variant(CLTO_A::I2C160PCC) + pub fn i2c160pcc(self) -> &'a mut crate::W { + self.variant(Clto::I2c160pcc) } #[doc = "Timeout after 320 prescaled clock cycles. In standard mode at 100 kHz, this results in a 400us timeout."] #[inline(always)] - pub fn i2c320pcc(self) -> &'a mut W { - self.variant(CLTO_A::I2C320PCC) + pub fn i2c320pcc(self) -> &'a mut crate::W { + self.variant(Clto::I2c320pcc) } #[doc = "Timeout after 1024 prescaled clock cycles. In standard mode at 100 kHz, this results in a 1280us timeout."] #[inline(always)] - pub fn i2c1024pcc(self) -> &'a mut W { - self.variant(CLTO_A::I2C1024PCC) + pub fn i2c1024pcc(self) -> &'a mut crate::W { + self.variant(Clto::I2c1024pcc) } } -#[doc = "Field `SCLMONEN` reader - SCL Monitor Enable"] -pub type SCLMONEN_R = crate::BitReader; #[doc = "SCL Monitor Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SCLMONEN_A { +pub enum Sclmonen { #[doc = "0: Disable SCL monitor"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enable SCL monitor"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SCLMONEN_A) -> Self { + fn from(variant: Sclmonen) -> Self { variant as u8 != 0 } } -impl SCLMONEN_R { +#[doc = "Field `SCLMONEN` reader - SCL Monitor Enable"] +pub type SclmonenR = crate::BitReader; +impl SclmonenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SCLMONEN_A { + pub const fn variant(&self) -> Sclmonen { match self.bits { - false => SCLMONEN_A::DISABLE, - true => SCLMONEN_A::ENABLE, + false => Sclmonen::Disable, + true => Sclmonen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable SCL monitor"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == SCLMONEN_A::DISABLE + *self == Sclmonen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enable SCL monitor"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == SCLMONEN_A::ENABLE + *self == Sclmonen::Enable } } #[doc = "Field `SCLMONEN` writer - SCL Monitor Enable"] -pub type SCLMONEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, SCLMONEN_A, O>; -impl<'a, const O: u8> SCLMONEN_W<'a, O> { +pub type SclmonenW<'a, REG> = crate::BitWriter<'a, REG, Sclmonen>; +impl<'a, REG> SclmonenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable SCL monitor"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(SCLMONEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Sclmonen::Disable) } #[doc = "Enable SCL monitor"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(SCLMONEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Sclmonen::Enable) } } -#[doc = "Field `SDAMONEN` reader - SDA Monitor Enable"] -pub type SDAMONEN_R = crate::BitReader; #[doc = "SDA Monitor Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SDAMONEN_A { +pub enum Sdamonen { #[doc = "0: Disable SDA Monitor"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enable SDA Monitor"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SDAMONEN_A) -> Self { + fn from(variant: Sdamonen) -> Self { variant as u8 != 0 } } -impl SDAMONEN_R { +#[doc = "Field `SDAMONEN` reader - SDA Monitor Enable"] +pub type SdamonenR = crate::BitReader; +impl SdamonenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SDAMONEN_A { + pub const fn variant(&self) -> Sdamonen { match self.bits { - false => SDAMONEN_A::DISABLE, - true => SDAMONEN_A::ENABLE, + false => Sdamonen::Disable, + true => Sdamonen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable SDA Monitor"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == SDAMONEN_A::DISABLE + *self == Sdamonen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enable SDA Monitor"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == SDAMONEN_A::ENABLE + *self == Sdamonen::Enable } } #[doc = "Field `SDAMONEN` writer - SDA Monitor Enable"] -pub type SDAMONEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, SDAMONEN_A, O>; -impl<'a, const O: u8> SDAMONEN_W<'a, O> { +pub type SdamonenW<'a, REG> = crate::BitWriter<'a, REG, Sdamonen>; +impl<'a, REG> SdamonenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable SDA Monitor"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(SDAMONEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Sdamonen::Disable) } #[doc = "Enable SDA Monitor"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(SDAMONEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Sdamonen::Enable) } } impl R { #[doc = "Bit 0 - Soft Reset the internal state registers"] #[inline(always)] - pub fn corerst(&self) -> CORERST_R { - CORERST_R::new((self.bits & 1) != 0) + pub fn corerst(&self) -> CorerstR { + CorerstR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Addressable as Follower"] #[inline(always)] - pub fn slave(&self) -> SLAVE_R { - SLAVE_R::new(((self.bits >> 1) & 1) != 0) + pub fn slave(&self) -> SlaveR { + SlaveR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Automatic Acknowledge"] #[inline(always)] - pub fn autoack(&self) -> AUTOACK_R { - AUTOACK_R::new(((self.bits >> 2) & 1) != 0) + pub fn autoack(&self) -> AutoackR { + AutoackR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Automatic STOP when Empty"] #[inline(always)] - pub fn autose(&self) -> AUTOSE_R { - AUTOSE_R::new(((self.bits >> 3) & 1) != 0) + pub fn autose(&self) -> AutoseR { + AutoseR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Automatic STOP on NACK"] #[inline(always)] - pub fn autosn(&self) -> AUTOSN_R { - AUTOSN_R::new(((self.bits >> 4) & 1) != 0) + pub fn autosn(&self) -> AutosnR { + AutosnR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Arbitration Disable"] #[inline(always)] - pub fn arbdis(&self) -> ARBDIS_R { - ARBDIS_R::new(((self.bits >> 5) & 1) != 0) + pub fn arbdis(&self) -> ArbdisR { + ArbdisR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - General Call Address Match Enable"] #[inline(always)] - pub fn gcamen(&self) -> GCAMEN_R { - GCAMEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn gcamen(&self) -> GcamenR { + GcamenR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - TX Buffer Interrupt Level"] #[inline(always)] - pub fn txbil(&self) -> TXBIL_R { - TXBIL_R::new(((self.bits >> 7) & 1) != 0) + pub fn txbil(&self) -> TxbilR { + TxbilR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:9 - Clock Low High Ratio"] #[inline(always)] - pub fn clhr(&self) -> CLHR_R { - CLHR_R::new(((self.bits >> 8) & 3) as u8) + pub fn clhr(&self) -> ClhrR { + ClhrR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 12:13 - Bus Idle Timeout"] #[inline(always)] - pub fn bito(&self) -> BITO_R { - BITO_R::new(((self.bits >> 12) & 3) as u8) + pub fn bito(&self) -> BitoR { + BitoR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bit 15 - Go Idle on Bus Idle Timeout"] #[inline(always)] - pub fn gibito(&self) -> GIBITO_R { - GIBITO_R::new(((self.bits >> 15) & 1) != 0) + pub fn gibito(&self) -> GibitoR { + GibitoR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:18 - Clock Low Timeout"] #[inline(always)] - pub fn clto(&self) -> CLTO_R { - CLTO_R::new(((self.bits >> 16) & 7) as u8) + pub fn clto(&self) -> CltoR { + CltoR::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bit 20 - SCL Monitor Enable"] #[inline(always)] - pub fn sclmonen(&self) -> SCLMONEN_R { - SCLMONEN_R::new(((self.bits >> 20) & 1) != 0) + pub fn sclmonen(&self) -> SclmonenR { + SclmonenR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - SDA Monitor Enable"] #[inline(always)] - pub fn sdamonen(&self) -> SDAMONEN_R { - SDAMONEN_R::new(((self.bits >> 21) & 1) != 0) + pub fn sdamonen(&self) -> SdamonenR { + SdamonenR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bit 0 - Soft Reset the internal state registers"] #[inline(always)] #[must_use] - pub fn corerst(&mut self) -> CORERST_W<0> { - CORERST_W::new(self) + pub fn corerst(&mut self) -> CorerstW { + CorerstW::new(self, 0) } #[doc = "Bit 1 - Addressable as Follower"] #[inline(always)] #[must_use] - pub fn slave(&mut self) -> SLAVE_W<1> { - SLAVE_W::new(self) + pub fn slave(&mut self) -> SlaveW { + SlaveW::new(self, 1) } #[doc = "Bit 2 - Automatic Acknowledge"] #[inline(always)] #[must_use] - pub fn autoack(&mut self) -> AUTOACK_W<2> { - AUTOACK_W::new(self) + pub fn autoack(&mut self) -> AutoackW { + AutoackW::new(self, 2) } #[doc = "Bit 3 - Automatic STOP when Empty"] #[inline(always)] #[must_use] - pub fn autose(&mut self) -> AUTOSE_W<3> { - AUTOSE_W::new(self) + pub fn autose(&mut self) -> AutoseW { + AutoseW::new(self, 3) } #[doc = "Bit 4 - Automatic STOP on NACK"] #[inline(always)] #[must_use] - pub fn autosn(&mut self) -> AUTOSN_W<4> { - AUTOSN_W::new(self) + pub fn autosn(&mut self) -> AutosnW { + AutosnW::new(self, 4) } #[doc = "Bit 5 - Arbitration Disable"] #[inline(always)] #[must_use] - pub fn arbdis(&mut self) -> ARBDIS_W<5> { - ARBDIS_W::new(self) + pub fn arbdis(&mut self) -> ArbdisW { + ArbdisW::new(self, 5) } #[doc = "Bit 6 - General Call Address Match Enable"] #[inline(always)] #[must_use] - pub fn gcamen(&mut self) -> GCAMEN_W<6> { - GCAMEN_W::new(self) + pub fn gcamen(&mut self) -> GcamenW { + GcamenW::new(self, 6) } #[doc = "Bit 7 - TX Buffer Interrupt Level"] #[inline(always)] #[must_use] - pub fn txbil(&mut self) -> TXBIL_W<7> { - TXBIL_W::new(self) + pub fn txbil(&mut self) -> TxbilW { + TxbilW::new(self, 7) } #[doc = "Bits 8:9 - Clock Low High Ratio"] #[inline(always)] #[must_use] - pub fn clhr(&mut self) -> CLHR_W<8> { - CLHR_W::new(self) + pub fn clhr(&mut self) -> ClhrW { + ClhrW::new(self, 8) } #[doc = "Bits 12:13 - Bus Idle Timeout"] #[inline(always)] #[must_use] - pub fn bito(&mut self) -> BITO_W<12> { - BITO_W::new(self) + pub fn bito(&mut self) -> BitoW { + BitoW::new(self, 12) } #[doc = "Bit 15 - Go Idle on Bus Idle Timeout"] #[inline(always)] #[must_use] - pub fn gibito(&mut self) -> GIBITO_W<15> { - GIBITO_W::new(self) + pub fn gibito(&mut self) -> GibitoW { + GibitoW::new(self, 15) } #[doc = "Bits 16:18 - Clock Low Timeout"] #[inline(always)] #[must_use] - pub fn clto(&mut self) -> CLTO_W<16> { - CLTO_W::new(self) + pub fn clto(&mut self) -> CltoW { + CltoW::new(self, 16) } #[doc = "Bit 20 - SCL Monitor Enable"] #[inline(always)] #[must_use] - pub fn sclmonen(&mut self) -> SCLMONEN_W<20> { - SCLMONEN_W::new(self) + pub fn sclmonen(&mut self) -> SclmonenW { + SclmonenW::new(self, 20) } #[doc = "Bit 21 - SDA Monitor Enable"] #[inline(always)] #[must_use] - pub fn sdamonen(&mut self) -> SDAMONEN_W<21> { - SDAMONEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sdamonen(&mut self) -> SdamonenW { + SdamonenW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/en.rs index d1c66f9..ccee40a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/en.rs @@ -1,126 +1,89 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EN` reader - module enable"] -pub type EN_R = crate::BitReader; +pub type W = crate::W; #[doc = "module enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EN_A { +pub enum En { #[doc = "0: Disable Peripheral Clock"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enable Peripheral Clock"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EN_A) -> Self { + fn from(variant: En) -> Self { variant as u8 != 0 } } -impl EN_R { +#[doc = "Field `EN` reader - module enable"] +pub type EnR = crate::BitReader; +impl EnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EN_A { + pub const fn variant(&self) -> En { match self.bits { - false => EN_A::DISABLE, - true => EN_A::ENABLE, + false => En::Disable, + true => En::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable Peripheral Clock"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EN_A::DISABLE + *self == En::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enable Peripheral Clock"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EN_A::ENABLE + *self == En::Enable } } #[doc = "Field `EN` writer - module enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, EN_A, O>; -impl<'a, const O: u8> EN_W<'a, O> { +pub type EnW<'a, REG> = crate::BitWriter<'a, REG, En>; +impl<'a, REG> EnW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable Peripheral Clock"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(En::Disable) } #[doc = "Enable Peripheral Clock"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(En::Enable) } } impl R { #[doc = "Bit 0 - module enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - module enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/ien.rs index 7ec6b35..d68e6ae 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/ien.rs @@ -1,380 +1,340 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` reader - START condition Interrupt Flag"] -pub type START_R = crate::BitReader; +pub type StartR = crate::BitReader; #[doc = "Field `START` writer - START condition Interrupt Flag"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RSTART` reader - Repeated START condition Interrupt Flag"] -pub type RSTART_R = crate::BitReader; +pub type RstartR = crate::BitReader; #[doc = "Field `RSTART` writer - Repeated START condition Interrupt Flag"] -pub type RSTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RstartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ADDR` reader - Address Interrupt Flag"] -pub type ADDR_R = crate::BitReader; +pub type AddrR = crate::BitReader; #[doc = "Field `ADDR` writer - Address Interrupt Flag"] -pub type ADDR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AddrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXC` reader - Transfer Completed Interrupt Flag"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXC` writer - Transfer Completed Interrupt Flag"] -pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXBL` reader - Transmit Buffer Level Interrupt Flag"] -pub type TXBL_R = crate::BitReader; +pub type TxblR = crate::BitReader; #[doc = "Field `TXBL` writer - Transmit Buffer Level Interrupt Flag"] -pub type TXBL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxblW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXDATAV` reader - Receive Data Valid Interrupt Flag"] -pub type RXDATAV_R = crate::BitReader; +pub type RxdatavR = crate::BitReader; #[doc = "Field `RXDATAV` writer - Receive Data Valid Interrupt Flag"] -pub type RXDATAV_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxdatavW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACK` reader - Acknowledge Received Interrupt Flag"] -pub type ACK_R = crate::BitReader; +pub type AckR = crate::BitReader; #[doc = "Field `ACK` writer - Acknowledge Received Interrupt Flag"] -pub type ACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AckW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NACK` reader - Not Acknowledge Received Interrupt Flag"] -pub type NACK_R = crate::BitReader; +pub type NackR = crate::BitReader; #[doc = "Field `NACK` writer - Not Acknowledge Received Interrupt Flag"] -pub type NACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type NackW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MSTOP` reader - Leader STOP Condition Interrupt Flag"] -pub type MSTOP_R = crate::BitReader; +pub type MstopR = crate::BitReader; #[doc = "Field `MSTOP` writer - Leader STOP Condition Interrupt Flag"] -pub type MSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type MstopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ARBLOST` reader - Arbitration Lost Interrupt Flag"] -pub type ARBLOST_R = crate::BitReader; +pub type ArblostR = crate::BitReader; #[doc = "Field `ARBLOST` writer - Arbitration Lost Interrupt Flag"] -pub type ARBLOST_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ArblostW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSERR` reader - Bus Error Interrupt Flag"] -pub type BUSERR_R = crate::BitReader; +pub type BuserrR = crate::BitReader; #[doc = "Field `BUSERR` writer - Bus Error Interrupt Flag"] -pub type BUSERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type BuserrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSHOLD` reader - Bus Held Interrupt Flag"] -pub type BUSHOLD_R = crate::BitReader; +pub type BusholdR = crate::BitReader; #[doc = "Field `BUSHOLD` writer - Bus Held Interrupt Flag"] -pub type BUSHOLD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type BusholdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXOF` reader - Transmit Buffer Overflow Interrupt Flag"] -pub type TXOF_R = crate::BitReader; +pub type TxofR = crate::BitReader; #[doc = "Field `TXOF` writer - Transmit Buffer Overflow Interrupt Flag"] -pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUF` reader - Receive Buffer Underflow Interrupt Flag"] -pub type RXUF_R = crate::BitReader; +pub type RxufR = crate::BitReader; #[doc = "Field `RXUF` writer - Receive Buffer Underflow Interrupt Flag"] -pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BITO` reader - Bus Idle Timeout Interrupt Flag"] -pub type BITO_R = crate::BitReader; +pub type BitoR = crate::BitReader; #[doc = "Field `BITO` writer - Bus Idle Timeout Interrupt Flag"] -pub type BITO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type BitoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLTO` reader - Clock Low Timeout Interrupt Flag"] -pub type CLTO_R = crate::BitReader; +pub type CltoR = crate::BitReader; #[doc = "Field `CLTO` writer - Clock Low Timeout Interrupt Flag"] -pub type CLTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type CltoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SSTOP` reader - Follower STOP condition Interrupt Flag"] -pub type SSTOP_R = crate::BitReader; +pub type SstopR = crate::BitReader; #[doc = "Field `SSTOP` writer - Follower STOP condition Interrupt Flag"] -pub type SSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SstopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFULL` reader - Receive Buffer Full Interrupt Flag"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXFULL` writer - Receive Buffer Full Interrupt Flag"] -pub type RXFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxfullW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLERR` reader - Clock Low Error Interrupt Flag"] -pub type CLERR_R = crate::BitReader; +pub type ClerrR = crate::BitReader; #[doc = "Field `CLERR` writer - Clock Low Error Interrupt Flag"] -pub type CLERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ClerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCLERR` reader - SCL Error Interrupt Flag"] -pub type SCLERR_R = crate::BitReader; +pub type SclerrR = crate::BitReader; #[doc = "Field `SCLERR` writer - SCL Error Interrupt Flag"] -pub type SCLERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SclerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SDAERR` reader - SDA Error Interrupt Flag"] -pub type SDAERR_R = crate::BitReader; +pub type SdaerrR = crate::BitReader; #[doc = "Field `SDAERR` writer - SDA Error Interrupt Flag"] -pub type SDAERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SdaerrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - START condition Interrupt Flag"] #[inline(always)] - pub fn start(&self) -> START_R { - START_R::new((self.bits & 1) != 0) + pub fn start(&self) -> StartR { + StartR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Repeated START condition Interrupt Flag"] #[inline(always)] - pub fn rstart(&self) -> RSTART_R { - RSTART_R::new(((self.bits >> 1) & 1) != 0) + pub fn rstart(&self) -> RstartR { + RstartR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Address Interrupt Flag"] #[inline(always)] - pub fn addr(&self) -> ADDR_R { - ADDR_R::new(((self.bits >> 2) & 1) != 0) + pub fn addr(&self) -> AddrR { + AddrR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Transfer Completed Interrupt Flag"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new(((self.bits >> 3) & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Transmit Buffer Level Interrupt Flag"] #[inline(always)] - pub fn txbl(&self) -> TXBL_R { - TXBL_R::new(((self.bits >> 4) & 1) != 0) + pub fn txbl(&self) -> TxblR { + TxblR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Receive Data Valid Interrupt Flag"] #[inline(always)] - pub fn rxdatav(&self) -> RXDATAV_R { - RXDATAV_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxdatav(&self) -> RxdatavR { + RxdatavR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Acknowledge Received Interrupt Flag"] #[inline(always)] - pub fn ack(&self) -> ACK_R { - ACK_R::new(((self.bits >> 6) & 1) != 0) + pub fn ack(&self) -> AckR { + AckR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Not Acknowledge Received Interrupt Flag"] #[inline(always)] - pub fn nack(&self) -> NACK_R { - NACK_R::new(((self.bits >> 7) & 1) != 0) + pub fn nack(&self) -> NackR { + NackR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Leader STOP Condition Interrupt Flag"] #[inline(always)] - pub fn mstop(&self) -> MSTOP_R { - MSTOP_R::new(((self.bits >> 8) & 1) != 0) + pub fn mstop(&self) -> MstopR { + MstopR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Arbitration Lost Interrupt Flag"] #[inline(always)] - pub fn arblost(&self) -> ARBLOST_R { - ARBLOST_R::new(((self.bits >> 9) & 1) != 0) + pub fn arblost(&self) -> ArblostR { + ArblostR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Bus Error Interrupt Flag"] #[inline(always)] - pub fn buserr(&self) -> BUSERR_R { - BUSERR_R::new(((self.bits >> 10) & 1) != 0) + pub fn buserr(&self) -> BuserrR { + BuserrR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Bus Held Interrupt Flag"] #[inline(always)] - pub fn bushold(&self) -> BUSHOLD_R { - BUSHOLD_R::new(((self.bits >> 11) & 1) != 0) + pub fn bushold(&self) -> BusholdR { + BusholdR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Transmit Buffer Overflow Interrupt Flag"] #[inline(always)] - pub fn txof(&self) -> TXOF_R { - TXOF_R::new(((self.bits >> 12) & 1) != 0) + pub fn txof(&self) -> TxofR { + TxofR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Receive Buffer Underflow Interrupt Flag"] #[inline(always)] - pub fn rxuf(&self) -> RXUF_R { - RXUF_R::new(((self.bits >> 13) & 1) != 0) + pub fn rxuf(&self) -> RxufR { + RxufR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Bus Idle Timeout Interrupt Flag"] #[inline(always)] - pub fn bito(&self) -> BITO_R { - BITO_R::new(((self.bits >> 14) & 1) != 0) + pub fn bito(&self) -> BitoR { + BitoR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Clock Low Timeout Interrupt Flag"] #[inline(always)] - pub fn clto(&self) -> CLTO_R { - CLTO_R::new(((self.bits >> 15) & 1) != 0) + pub fn clto(&self) -> CltoR { + CltoR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Follower STOP condition Interrupt Flag"] #[inline(always)] - pub fn sstop(&self) -> SSTOP_R { - SSTOP_R::new(((self.bits >> 16) & 1) != 0) + pub fn sstop(&self) -> SstopR { + SstopR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Receive Buffer Full Interrupt Flag"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 17) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Clock Low Error Interrupt Flag"] #[inline(always)] - pub fn clerr(&self) -> CLERR_R { - CLERR_R::new(((self.bits >> 18) & 1) != 0) + pub fn clerr(&self) -> ClerrR { + ClerrR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - SCL Error Interrupt Flag"] #[inline(always)] - pub fn sclerr(&self) -> SCLERR_R { - SCLERR_R::new(((self.bits >> 19) & 1) != 0) + pub fn sclerr(&self) -> SclerrR { + SclerrR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - SDA Error Interrupt Flag"] #[inline(always)] - pub fn sdaerr(&self) -> SDAERR_R { - SDAERR_R::new(((self.bits >> 20) & 1) != 0) + pub fn sdaerr(&self) -> SdaerrR { + SdaerrR::new(((self.bits >> 20) & 1) != 0) } } impl W { #[doc = "Bit 0 - START condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Repeated START condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rstart(&mut self) -> RSTART_W<1> { - RSTART_W::new(self) + pub fn rstart(&mut self) -> RstartW { + RstartW::new(self, 1) } #[doc = "Bit 2 - Address Interrupt Flag"] #[inline(always)] #[must_use] - pub fn addr(&mut self) -> ADDR_W<2> { - ADDR_W::new(self) + pub fn addr(&mut self) -> AddrW { + AddrW::new(self, 2) } #[doc = "Bit 3 - Transfer Completed Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txc(&mut self) -> TXC_W<3> { - TXC_W::new(self) + pub fn txc(&mut self) -> TxcW { + TxcW::new(self, 3) } #[doc = "Bit 4 - Transmit Buffer Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txbl(&mut self) -> TXBL_W<4> { - TXBL_W::new(self) + pub fn txbl(&mut self) -> TxblW { + TxblW::new(self, 4) } #[doc = "Bit 5 - Receive Data Valid Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxdatav(&mut self) -> RXDATAV_W<5> { - RXDATAV_W::new(self) + pub fn rxdatav(&mut self) -> RxdatavW { + RxdatavW::new(self, 5) } #[doc = "Bit 6 - Acknowledge Received Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ack(&mut self) -> ACK_W<6> { - ACK_W::new(self) + pub fn ack(&mut self) -> AckW { + AckW::new(self, 6) } #[doc = "Bit 7 - Not Acknowledge Received Interrupt Flag"] #[inline(always)] #[must_use] - pub fn nack(&mut self) -> NACK_W<7> { - NACK_W::new(self) + pub fn nack(&mut self) -> NackW { + NackW::new(self, 7) } #[doc = "Bit 8 - Leader STOP Condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn mstop(&mut self) -> MSTOP_W<8> { - MSTOP_W::new(self) + pub fn mstop(&mut self) -> MstopW { + MstopW::new(self, 8) } #[doc = "Bit 9 - Arbitration Lost Interrupt Flag"] #[inline(always)] #[must_use] - pub fn arblost(&mut self) -> ARBLOST_W<9> { - ARBLOST_W::new(self) + pub fn arblost(&mut self) -> ArblostW { + ArblostW::new(self, 9) } #[doc = "Bit 10 - Bus Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn buserr(&mut self) -> BUSERR_W<10> { - BUSERR_W::new(self) + pub fn buserr(&mut self) -> BuserrW { + BuserrW::new(self, 10) } #[doc = "Bit 11 - Bus Held Interrupt Flag"] #[inline(always)] #[must_use] - pub fn bushold(&mut self) -> BUSHOLD_W<11> { - BUSHOLD_W::new(self) + pub fn bushold(&mut self) -> BusholdW { + BusholdW::new(self, 11) } #[doc = "Bit 12 - Transmit Buffer Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txof(&mut self) -> TXOF_W<12> { - TXOF_W::new(self) + pub fn txof(&mut self) -> TxofW { + TxofW::new(self, 12) } #[doc = "Bit 13 - Receive Buffer Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxuf(&mut self) -> RXUF_W<13> { - RXUF_W::new(self) + pub fn rxuf(&mut self) -> RxufW { + RxufW::new(self, 13) } #[doc = "Bit 14 - Bus Idle Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn bito(&mut self) -> BITO_W<14> { - BITO_W::new(self) + pub fn bito(&mut self) -> BitoW { + BitoW::new(self, 14) } #[doc = "Bit 15 - Clock Low Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn clto(&mut self) -> CLTO_W<15> { - CLTO_W::new(self) + pub fn clto(&mut self) -> CltoW { + CltoW::new(self, 15) } #[doc = "Bit 16 - Follower STOP condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sstop(&mut self) -> SSTOP_W<16> { - SSTOP_W::new(self) + pub fn sstop(&mut self) -> SstopW { + SstopW::new(self, 16) } #[doc = "Bit 17 - Receive Buffer Full Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxfull(&mut self) -> RXFULL_W<17> { - RXFULL_W::new(self) + pub fn rxfull(&mut self) -> RxfullW { + RxfullW::new(self, 17) } #[doc = "Bit 18 - Clock Low Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn clerr(&mut self) -> CLERR_W<18> { - CLERR_W::new(self) + pub fn clerr(&mut self) -> ClerrW { + ClerrW::new(self, 18) } #[doc = "Bit 19 - SCL Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sclerr(&mut self) -> SCLERR_W<19> { - SCLERR_W::new(self) + pub fn sclerr(&mut self) -> SclerrW { + SclerrW::new(self, 19) } #[doc = "Bit 20 - SDA Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sdaerr(&mut self) -> SDAERR_W<20> { - SDAERR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sdaerr(&mut self) -> SdaerrW { + SdaerrW::new(self, 20) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/if_.rs index e57ddea..5e8ea0d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/if_.rs @@ -1,380 +1,340 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` reader - START condition Interrupt Flag"] -pub type START_R = crate::BitReader; +pub type StartR = crate::BitReader; #[doc = "Field `START` writer - START condition Interrupt Flag"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RSTART` reader - Repeated START condition Interrupt Flag"] -pub type RSTART_R = crate::BitReader; +pub type RstartR = crate::BitReader; #[doc = "Field `RSTART` writer - Repeated START condition Interrupt Flag"] -pub type RSTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RstartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ADDR` reader - Address Interrupt Flag"] -pub type ADDR_R = crate::BitReader; +pub type AddrR = crate::BitReader; #[doc = "Field `ADDR` writer - Address Interrupt Flag"] -pub type ADDR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AddrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXC` reader - Transfer Completed Interrupt Flag"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXC` writer - Transfer Completed Interrupt Flag"] -pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXBL` reader - Transmit Buffer Level Interrupt Flag"] -pub type TXBL_R = crate::BitReader; +pub type TxblR = crate::BitReader; #[doc = "Field `TXBL` writer - Transmit Buffer Level Interrupt Flag"] -pub type TXBL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxblW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXDATAV` reader - Receive Data Valid Interrupt Flag"] -pub type RXDATAV_R = crate::BitReader; +pub type RxdatavR = crate::BitReader; #[doc = "Field `RXDATAV` writer - Receive Data Valid Interrupt Flag"] -pub type RXDATAV_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxdatavW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACK` reader - Acknowledge Received Interrupt Flag"] -pub type ACK_R = crate::BitReader; +pub type AckR = crate::BitReader; #[doc = "Field `ACK` writer - Acknowledge Received Interrupt Flag"] -pub type ACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AckW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NACK` reader - Not Acknowledge Received Interrupt Flag"] -pub type NACK_R = crate::BitReader; +pub type NackR = crate::BitReader; #[doc = "Field `NACK` writer - Not Acknowledge Received Interrupt Flag"] -pub type NACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type NackW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MSTOP` reader - Leader STOP Condition Interrupt Flag"] -pub type MSTOP_R = crate::BitReader; +pub type MstopR = crate::BitReader; #[doc = "Field `MSTOP` writer - Leader STOP Condition Interrupt Flag"] -pub type MSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type MstopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ARBLOST` reader - Arbitration Lost Interrupt Flag"] -pub type ARBLOST_R = crate::BitReader; +pub type ArblostR = crate::BitReader; #[doc = "Field `ARBLOST` writer - Arbitration Lost Interrupt Flag"] -pub type ARBLOST_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ArblostW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSERR` reader - Bus Error Interrupt Flag"] -pub type BUSERR_R = crate::BitReader; +pub type BuserrR = crate::BitReader; #[doc = "Field `BUSERR` writer - Bus Error Interrupt Flag"] -pub type BUSERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type BuserrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSHOLD` reader - Bus Held Interrupt Flag"] -pub type BUSHOLD_R = crate::BitReader; +pub type BusholdR = crate::BitReader; #[doc = "Field `BUSHOLD` writer - Bus Held Interrupt Flag"] -pub type BUSHOLD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type BusholdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXOF` reader - Transmit Buffer Overflow Interrupt Flag"] -pub type TXOF_R = crate::BitReader; +pub type TxofR = crate::BitReader; #[doc = "Field `TXOF` writer - Transmit Buffer Overflow Interrupt Flag"] -pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUF` reader - Receive Buffer Underflow Interrupt Flag"] -pub type RXUF_R = crate::BitReader; +pub type RxufR = crate::BitReader; #[doc = "Field `RXUF` writer - Receive Buffer Underflow Interrupt Flag"] -pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BITO` reader - Bus Idle Timeout Interrupt Flag"] -pub type BITO_R = crate::BitReader; +pub type BitoR = crate::BitReader; #[doc = "Field `BITO` writer - Bus Idle Timeout Interrupt Flag"] -pub type BITO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type BitoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLTO` reader - Clock Low Timeout Interrupt Flag"] -pub type CLTO_R = crate::BitReader; +pub type CltoR = crate::BitReader; #[doc = "Field `CLTO` writer - Clock Low Timeout Interrupt Flag"] -pub type CLTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type CltoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SSTOP` reader - Follower STOP condition Interrupt Flag"] -pub type SSTOP_R = crate::BitReader; +pub type SstopR = crate::BitReader; #[doc = "Field `SSTOP` writer - Follower STOP condition Interrupt Flag"] -pub type SSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SstopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFULL` reader - Receive Buffer Full Interrupt Flag"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXFULL` writer - Receive Buffer Full Interrupt Flag"] -pub type RXFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxfullW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLERR` reader - Clock Low Error Interrupt Flag"] -pub type CLERR_R = crate::BitReader; +pub type ClerrR = crate::BitReader; #[doc = "Field `CLERR` writer - Clock Low Error Interrupt Flag"] -pub type CLERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ClerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCLERR` reader - SCL Error Interrupt Flag"] -pub type SCLERR_R = crate::BitReader; +pub type SclerrR = crate::BitReader; #[doc = "Field `SCLERR` writer - SCL Error Interrupt Flag"] -pub type SCLERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SclerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SDAERR` reader - SDA Error Interrupt Flag"] -pub type SDAERR_R = crate::BitReader; +pub type SdaerrR = crate::BitReader; #[doc = "Field `SDAERR` writer - SDA Error Interrupt Flag"] -pub type SDAERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SdaerrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - START condition Interrupt Flag"] #[inline(always)] - pub fn start(&self) -> START_R { - START_R::new((self.bits & 1) != 0) + pub fn start(&self) -> StartR { + StartR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Repeated START condition Interrupt Flag"] #[inline(always)] - pub fn rstart(&self) -> RSTART_R { - RSTART_R::new(((self.bits >> 1) & 1) != 0) + pub fn rstart(&self) -> RstartR { + RstartR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Address Interrupt Flag"] #[inline(always)] - pub fn addr(&self) -> ADDR_R { - ADDR_R::new(((self.bits >> 2) & 1) != 0) + pub fn addr(&self) -> AddrR { + AddrR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Transfer Completed Interrupt Flag"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new(((self.bits >> 3) & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Transmit Buffer Level Interrupt Flag"] #[inline(always)] - pub fn txbl(&self) -> TXBL_R { - TXBL_R::new(((self.bits >> 4) & 1) != 0) + pub fn txbl(&self) -> TxblR { + TxblR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Receive Data Valid Interrupt Flag"] #[inline(always)] - pub fn rxdatav(&self) -> RXDATAV_R { - RXDATAV_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxdatav(&self) -> RxdatavR { + RxdatavR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Acknowledge Received Interrupt Flag"] #[inline(always)] - pub fn ack(&self) -> ACK_R { - ACK_R::new(((self.bits >> 6) & 1) != 0) + pub fn ack(&self) -> AckR { + AckR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Not Acknowledge Received Interrupt Flag"] #[inline(always)] - pub fn nack(&self) -> NACK_R { - NACK_R::new(((self.bits >> 7) & 1) != 0) + pub fn nack(&self) -> NackR { + NackR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Leader STOP Condition Interrupt Flag"] #[inline(always)] - pub fn mstop(&self) -> MSTOP_R { - MSTOP_R::new(((self.bits >> 8) & 1) != 0) + pub fn mstop(&self) -> MstopR { + MstopR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Arbitration Lost Interrupt Flag"] #[inline(always)] - pub fn arblost(&self) -> ARBLOST_R { - ARBLOST_R::new(((self.bits >> 9) & 1) != 0) + pub fn arblost(&self) -> ArblostR { + ArblostR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Bus Error Interrupt Flag"] #[inline(always)] - pub fn buserr(&self) -> BUSERR_R { - BUSERR_R::new(((self.bits >> 10) & 1) != 0) + pub fn buserr(&self) -> BuserrR { + BuserrR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Bus Held Interrupt Flag"] #[inline(always)] - pub fn bushold(&self) -> BUSHOLD_R { - BUSHOLD_R::new(((self.bits >> 11) & 1) != 0) + pub fn bushold(&self) -> BusholdR { + BusholdR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Transmit Buffer Overflow Interrupt Flag"] #[inline(always)] - pub fn txof(&self) -> TXOF_R { - TXOF_R::new(((self.bits >> 12) & 1) != 0) + pub fn txof(&self) -> TxofR { + TxofR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Receive Buffer Underflow Interrupt Flag"] #[inline(always)] - pub fn rxuf(&self) -> RXUF_R { - RXUF_R::new(((self.bits >> 13) & 1) != 0) + pub fn rxuf(&self) -> RxufR { + RxufR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Bus Idle Timeout Interrupt Flag"] #[inline(always)] - pub fn bito(&self) -> BITO_R { - BITO_R::new(((self.bits >> 14) & 1) != 0) + pub fn bito(&self) -> BitoR { + BitoR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Clock Low Timeout Interrupt Flag"] #[inline(always)] - pub fn clto(&self) -> CLTO_R { - CLTO_R::new(((self.bits >> 15) & 1) != 0) + pub fn clto(&self) -> CltoR { + CltoR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Follower STOP condition Interrupt Flag"] #[inline(always)] - pub fn sstop(&self) -> SSTOP_R { - SSTOP_R::new(((self.bits >> 16) & 1) != 0) + pub fn sstop(&self) -> SstopR { + SstopR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Receive Buffer Full Interrupt Flag"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 17) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Clock Low Error Interrupt Flag"] #[inline(always)] - pub fn clerr(&self) -> CLERR_R { - CLERR_R::new(((self.bits >> 18) & 1) != 0) + pub fn clerr(&self) -> ClerrR { + ClerrR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - SCL Error Interrupt Flag"] #[inline(always)] - pub fn sclerr(&self) -> SCLERR_R { - SCLERR_R::new(((self.bits >> 19) & 1) != 0) + pub fn sclerr(&self) -> SclerrR { + SclerrR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - SDA Error Interrupt Flag"] #[inline(always)] - pub fn sdaerr(&self) -> SDAERR_R { - SDAERR_R::new(((self.bits >> 20) & 1) != 0) + pub fn sdaerr(&self) -> SdaerrR { + SdaerrR::new(((self.bits >> 20) & 1) != 0) } } impl W { #[doc = "Bit 0 - START condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Repeated START condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rstart(&mut self) -> RSTART_W<1> { - RSTART_W::new(self) + pub fn rstart(&mut self) -> RstartW { + RstartW::new(self, 1) } #[doc = "Bit 2 - Address Interrupt Flag"] #[inline(always)] #[must_use] - pub fn addr(&mut self) -> ADDR_W<2> { - ADDR_W::new(self) + pub fn addr(&mut self) -> AddrW { + AddrW::new(self, 2) } #[doc = "Bit 3 - Transfer Completed Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txc(&mut self) -> TXC_W<3> { - TXC_W::new(self) + pub fn txc(&mut self) -> TxcW { + TxcW::new(self, 3) } #[doc = "Bit 4 - Transmit Buffer Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txbl(&mut self) -> TXBL_W<4> { - TXBL_W::new(self) + pub fn txbl(&mut self) -> TxblW { + TxblW::new(self, 4) } #[doc = "Bit 5 - Receive Data Valid Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxdatav(&mut self) -> RXDATAV_W<5> { - RXDATAV_W::new(self) + pub fn rxdatav(&mut self) -> RxdatavW { + RxdatavW::new(self, 5) } #[doc = "Bit 6 - Acknowledge Received Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ack(&mut self) -> ACK_W<6> { - ACK_W::new(self) + pub fn ack(&mut self) -> AckW { + AckW::new(self, 6) } #[doc = "Bit 7 - Not Acknowledge Received Interrupt Flag"] #[inline(always)] #[must_use] - pub fn nack(&mut self) -> NACK_W<7> { - NACK_W::new(self) + pub fn nack(&mut self) -> NackW { + NackW::new(self, 7) } #[doc = "Bit 8 - Leader STOP Condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn mstop(&mut self) -> MSTOP_W<8> { - MSTOP_W::new(self) + pub fn mstop(&mut self) -> MstopW { + MstopW::new(self, 8) } #[doc = "Bit 9 - Arbitration Lost Interrupt Flag"] #[inline(always)] #[must_use] - pub fn arblost(&mut self) -> ARBLOST_W<9> { - ARBLOST_W::new(self) + pub fn arblost(&mut self) -> ArblostW { + ArblostW::new(self, 9) } #[doc = "Bit 10 - Bus Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn buserr(&mut self) -> BUSERR_W<10> { - BUSERR_W::new(self) + pub fn buserr(&mut self) -> BuserrW { + BuserrW::new(self, 10) } #[doc = "Bit 11 - Bus Held Interrupt Flag"] #[inline(always)] #[must_use] - pub fn bushold(&mut self) -> BUSHOLD_W<11> { - BUSHOLD_W::new(self) + pub fn bushold(&mut self) -> BusholdW { + BusholdW::new(self, 11) } #[doc = "Bit 12 - Transmit Buffer Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txof(&mut self) -> TXOF_W<12> { - TXOF_W::new(self) + pub fn txof(&mut self) -> TxofW { + TxofW::new(self, 12) } #[doc = "Bit 13 - Receive Buffer Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxuf(&mut self) -> RXUF_W<13> { - RXUF_W::new(self) + pub fn rxuf(&mut self) -> RxufW { + RxufW::new(self, 13) } #[doc = "Bit 14 - Bus Idle Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn bito(&mut self) -> BITO_W<14> { - BITO_W::new(self) + pub fn bito(&mut self) -> BitoW { + BitoW::new(self, 14) } #[doc = "Bit 15 - Clock Low Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn clto(&mut self) -> CLTO_W<15> { - CLTO_W::new(self) + pub fn clto(&mut self) -> CltoW { + CltoW::new(self, 15) } #[doc = "Bit 16 - Follower STOP condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sstop(&mut self) -> SSTOP_W<16> { - SSTOP_W::new(self) + pub fn sstop(&mut self) -> SstopW { + SstopW::new(self, 16) } #[doc = "Bit 17 - Receive Buffer Full Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxfull(&mut self) -> RXFULL_W<17> { - RXFULL_W::new(self) + pub fn rxfull(&mut self) -> RxfullW { + RxfullW::new(self, 17) } #[doc = "Bit 18 - Clock Low Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn clerr(&mut self) -> CLERR_W<18> { - CLERR_W::new(self) + pub fn clerr(&mut self) -> ClerrW { + ClerrW::new(self, 18) } #[doc = "Bit 19 - SCL Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sclerr(&mut self) -> SCLERR_W<19> { - SCLERR_W::new(self) + pub fn sclerr(&mut self) -> SclerrW { + SclerrW::new(self, 19) } #[doc = "Bit 20 - SDA Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sdaerr(&mut self) -> SDAERR_W<20> { - SDAERR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sdaerr(&mut self) -> SdaerrW { + SdaerrW::new(self, 20) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/ipversion.rs index 78e00e2..b808ecb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/rxdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/rxdata.rs index 6197259..b8a3ba6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/rxdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/rxdata.rs @@ -1,37 +1,22 @@ #[doc = "Register `RXDATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATA` reader - RX Data"] -pub type RXDATA_R = crate::FieldReader; +pub type RxdataR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - RX Data"] #[inline(always)] - pub fn rxdata(&self) -> RXDATA_R { - RXDATA_R::new((self.bits & 0xff) as u8) + pub fn rxdata(&self) -> RxdataR { + RxdataR::new((self.bits & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdata](index.html) module"] -pub struct RXDATA_SPEC; -impl crate::RegisterSpec for RXDATA_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdata::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdataSpec; +impl crate::RegisterSpec for RxdataSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdata::R](R) reader structure"] -impl crate::Readable for RXDATA_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdata::R`](R) reader structure"] +impl crate::Readable for RxdataSpec {} #[doc = "`reset()` method sets RXDATA to value 0"] -impl crate::Resettable for RXDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/rxdatap.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/rxdatap.rs index f7c8c79..3debe5f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/rxdatap.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/rxdatap.rs @@ -1,37 +1,22 @@ #[doc = "Register `RXDATAP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATAP` reader - RX Data Peek"] -pub type RXDATAP_R = crate::FieldReader; +pub type RxdatapR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - RX Data Peek"] #[inline(always)] - pub fn rxdatap(&self) -> RXDATAP_R { - RXDATAP_R::new((self.bits & 0xff) as u8) + pub fn rxdatap(&self) -> RxdatapR { + RxdatapR::new((self.bits & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdatap](index.html) module"] -pub struct RXDATAP_SPEC; -impl crate::RegisterSpec for RXDATAP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdatap::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdatapSpec; +impl crate::RegisterSpec for RxdatapSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdatap::R](R) reader structure"] -impl crate::Readable for RXDATAP_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdatap::R`](R) reader structure"] +impl crate::Readable for RxdatapSpec {} #[doc = "`reset()` method sets RXDATAP to value 0"] -impl crate::Resettable for RXDATAP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdatapSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/rxdouble.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/rxdouble.rs index d739f89..dcc567b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/rxdouble.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/rxdouble.rs @@ -1,44 +1,29 @@ #[doc = "Register `RXDOUBLE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATA0` reader - RX Data 0"] -pub type RXDATA0_R = crate::FieldReader; +pub type Rxdata0R = crate::FieldReader; #[doc = "Field `RXDATA1` reader - RX Data 1"] -pub type RXDATA1_R = crate::FieldReader; +pub type Rxdata1R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - RX Data 0"] #[inline(always)] - pub fn rxdata0(&self) -> RXDATA0_R { - RXDATA0_R::new((self.bits & 0xff) as u8) + pub fn rxdata0(&self) -> Rxdata0R { + Rxdata0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - RX Data 1"] #[inline(always)] - pub fn rxdata1(&self) -> RXDATA1_R { - RXDATA1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn rxdata1(&self) -> Rxdata1R { + Rxdata1R::new(((self.bits >> 8) & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdouble](index.html) module"] -pub struct RXDOUBLE_SPEC; -impl crate::RegisterSpec for RXDOUBLE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdouble::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdoubleSpec; +impl crate::RegisterSpec for RxdoubleSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdouble::R](R) reader structure"] -impl crate::Readable for RXDOUBLE_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdouble::R`](R) reader structure"] +impl crate::Readable for RxdoubleSpec {} #[doc = "`reset()` method sets RXDOUBLE to value 0"] -impl crate::Resettable for RXDOUBLE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdoubleSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/rxdoublep.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/rxdoublep.rs index e20f7a0..de51da4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/rxdoublep.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/rxdoublep.rs @@ -1,44 +1,29 @@ #[doc = "Register `RXDOUBLEP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATAP0` reader - RX Data 0 Peek"] -pub type RXDATAP0_R = crate::FieldReader; +pub type Rxdatap0R = crate::FieldReader; #[doc = "Field `RXDATAP1` reader - RX Data 1 Peek"] -pub type RXDATAP1_R = crate::FieldReader; +pub type Rxdatap1R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - RX Data 0 Peek"] #[inline(always)] - pub fn rxdatap0(&self) -> RXDATAP0_R { - RXDATAP0_R::new((self.bits & 0xff) as u8) + pub fn rxdatap0(&self) -> Rxdatap0R { + Rxdatap0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - RX Data 1 Peek"] #[inline(always)] - pub fn rxdatap1(&self) -> RXDATAP1_R { - RXDATAP1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn rxdatap1(&self) -> Rxdatap1R { + Rxdatap1R::new(((self.bits >> 8) & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdoublep](index.html) module"] -pub struct RXDOUBLEP_SPEC; -impl crate::RegisterSpec for RXDOUBLEP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdoublep::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdoublepSpec; +impl crate::RegisterSpec for RxdoublepSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdoublep::R](R) reader structure"] -impl crate::Readable for RXDOUBLEP_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdoublep::R`](R) reader structure"] +impl crate::Readable for RxdoublepSpec {} #[doc = "`reset()` method sets RXDOUBLEP to value 0"] -impl crate::Resettable for RXDOUBLEP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdoublepSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/saddr.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/saddr.rs index c1201af..852c222 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/saddr.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/saddr.rs @@ -1,80 +1,40 @@ #[doc = "Register `SADDR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SADDR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ADDR` reader - Follower address"] -pub type ADDR_R = crate::FieldReader; +pub type AddrR = crate::FieldReader; #[doc = "Field `ADDR` writer - Follower address"] -pub type ADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SADDR_SPEC, u8, u8, 7, O>; +pub type AddrW<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { #[doc = "Bits 1:7 - Follower address"] #[inline(always)] - pub fn addr(&self) -> ADDR_R { - ADDR_R::new(((self.bits >> 1) & 0x7f) as u8) + pub fn addr(&self) -> AddrR { + AddrR::new(((self.bits >> 1) & 0x7f) as u8) } } impl W { #[doc = "Bits 1:7 - Follower address"] #[inline(always)] #[must_use] - pub fn addr(&mut self) -> ADDR_W<1> { - ADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn addr(&mut self) -> AddrW { + AddrW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [saddr](index.html) module"] -pub struct SADDR_SPEC; -impl crate::RegisterSpec for SADDR_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`saddr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`saddr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SaddrSpec; +impl crate::RegisterSpec for SaddrSpec { type Ux = u32; } -#[doc = "`read()` method returns [saddr::R](R) reader structure"] -impl crate::Readable for SADDR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [saddr::W](W) writer structure"] -impl crate::Writable for SADDR_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`saddr::R`](R) reader structure"] +impl crate::Readable for SaddrSpec {} +#[doc = "`write(|w| ..)` method takes [`saddr::W`](W) writer structure"] +impl crate::Writable for SaddrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SADDR to value 0"] -impl crate::Resettable for SADDR_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SaddrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/saddrmask.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/saddrmask.rs index 41bf4fc..8bd87ec 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/saddrmask.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/saddrmask.rs @@ -1,80 +1,40 @@ #[doc = "Register `SADDRMASK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SADDRMASK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SADDRMASK` reader - Follower Address Mask"] -pub type SADDRMASK_R = crate::FieldReader; +pub type SaddrmaskR = crate::FieldReader; #[doc = "Field `SADDRMASK` writer - Follower Address Mask"] -pub type SADDRMASK_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SADDRMASK_SPEC, u8, u8, 7, O>; +pub type SaddrmaskW<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { #[doc = "Bits 1:7 - Follower Address Mask"] #[inline(always)] - pub fn saddrmask(&self) -> SADDRMASK_R { - SADDRMASK_R::new(((self.bits >> 1) & 0x7f) as u8) + pub fn saddrmask(&self) -> SaddrmaskR { + SaddrmaskR::new(((self.bits >> 1) & 0x7f) as u8) } } impl W { #[doc = "Bits 1:7 - Follower Address Mask"] #[inline(always)] #[must_use] - pub fn saddrmask(&mut self) -> SADDRMASK_W<1> { - SADDRMASK_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn saddrmask(&mut self) -> SaddrmaskW { + SaddrmaskW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [saddrmask](index.html) module"] -pub struct SADDRMASK_SPEC; -impl crate::RegisterSpec for SADDRMASK_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`saddrmask::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`saddrmask::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SaddrmaskSpec; +impl crate::RegisterSpec for SaddrmaskSpec { type Ux = u32; } -#[doc = "`read()` method returns [saddrmask::R](R) reader structure"] -impl crate::Readable for SADDRMASK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [saddrmask::W](W) writer structure"] -impl crate::Writable for SADDRMASK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`saddrmask::R`](R) reader structure"] +impl crate::Readable for SaddrmaskSpec {} +#[doc = "`write(|w| ..)` method takes [`saddrmask::W`](W) writer structure"] +impl crate::Writable for SaddrmaskSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SADDRMASK to value 0"] -impl crate::Resettable for SADDRMASK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SaddrmaskSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/state.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/state.rs index 67cf43d..8727108 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/state.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/state.rs @@ -1,148 +1,137 @@ #[doc = "Register `STATE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `BUSY` reader - Bus Busy"] -pub type BUSY_R = crate::BitReader; +pub type BusyR = crate::BitReader; #[doc = "Field `MASTER` reader - Leader"] -pub type MASTER_R = crate::BitReader; +pub type MasterR = crate::BitReader; #[doc = "Field `TRANSMITTER` reader - Transmitter"] -pub type TRANSMITTER_R = crate::BitReader; +pub type TransmitterR = crate::BitReader; #[doc = "Field `NACKED` reader - Nack Received"] -pub type NACKED_R = crate::BitReader; +pub type NackedR = crate::BitReader; #[doc = "Field `BUSHOLD` reader - Bus Held"] -pub type BUSHOLD_R = crate::BitReader; -#[doc = "Field `STATE` reader - Transmission State"] -pub type STATE_R = crate::FieldReader; +pub type BusholdR = crate::BitReader; #[doc = "Transmission State\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STATE_A { +pub enum State { #[doc = "0: No transmission is being performed."] - IDLE = 0, + Idle = 0, #[doc = "1: Waiting for idle. Will send a start condition as soon as the bus is idle."] - WAIT = 1, + Wait = 1, #[doc = "2: Start transmit phase"] - START = 2, + Start = 2, #[doc = "3: Address transmit or receive phase"] - ADDR = 3, + Addr = 3, #[doc = "4: Address ack/nack transmit or receive phase"] - ADDRACK = 4, + Addrack = 4, #[doc = "5: Data transmit or receive phase"] - DATA = 5, + Data = 5, #[doc = "6: Data ack/nack transmit or receive phase"] - DATAACK = 6, + Dataack = 6, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STATE_A) -> Self { + fn from(variant: State) -> Self { variant as _ } } -impl STATE_R { +impl crate::FieldSpec for State { + type Ux = u8; +} +impl crate::IsEnum for State {} +#[doc = "Field `STATE` reader - Transmission State"] +pub type StateR = crate::FieldReader; +impl StateR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(STATE_A::IDLE), - 1 => Some(STATE_A::WAIT), - 2 => Some(STATE_A::START), - 3 => Some(STATE_A::ADDR), - 4 => Some(STATE_A::ADDRACK), - 5 => Some(STATE_A::DATA), - 6 => Some(STATE_A::DATAACK), + 0 => Some(State::Idle), + 1 => Some(State::Wait), + 2 => Some(State::Start), + 3 => Some(State::Addr), + 4 => Some(State::Addrack), + 5 => Some(State::Data), + 6 => Some(State::Dataack), _ => None, } } - #[doc = "Checks if the value of the field is `IDLE`"] + #[doc = "No transmission is being performed."] #[inline(always)] pub fn is_idle(&self) -> bool { - *self == STATE_A::IDLE + *self == State::Idle } - #[doc = "Checks if the value of the field is `WAIT`"] + #[doc = "Waiting for idle. Will send a start condition as soon as the bus is idle."] #[inline(always)] pub fn is_wait(&self) -> bool { - *self == STATE_A::WAIT + *self == State::Wait } - #[doc = "Checks if the value of the field is `START`"] + #[doc = "Start transmit phase"] #[inline(always)] pub fn is_start(&self) -> bool { - *self == STATE_A::START + *self == State::Start } - #[doc = "Checks if the value of the field is `ADDR`"] + #[doc = "Address transmit or receive phase"] #[inline(always)] pub fn is_addr(&self) -> bool { - *self == STATE_A::ADDR + *self == State::Addr } - #[doc = "Checks if the value of the field is `ADDRACK`"] + #[doc = "Address ack/nack transmit or receive phase"] #[inline(always)] pub fn is_addrack(&self) -> bool { - *self == STATE_A::ADDRACK + *self == State::Addrack } - #[doc = "Checks if the value of the field is `DATA`"] + #[doc = "Data transmit or receive phase"] #[inline(always)] pub fn is_data(&self) -> bool { - *self == STATE_A::DATA + *self == State::Data } - #[doc = "Checks if the value of the field is `DATAACK`"] + #[doc = "Data ack/nack transmit or receive phase"] #[inline(always)] pub fn is_dataack(&self) -> bool { - *self == STATE_A::DATAACK + *self == State::Dataack } } impl R { #[doc = "Bit 0 - Bus Busy"] #[inline(always)] - pub fn busy(&self) -> BUSY_R { - BUSY_R::new((self.bits & 1) != 0) + pub fn busy(&self) -> BusyR { + BusyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Leader"] #[inline(always)] - pub fn master(&self) -> MASTER_R { - MASTER_R::new(((self.bits >> 1) & 1) != 0) + pub fn master(&self) -> MasterR { + MasterR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Transmitter"] #[inline(always)] - pub fn transmitter(&self) -> TRANSMITTER_R { - TRANSMITTER_R::new(((self.bits >> 2) & 1) != 0) + pub fn transmitter(&self) -> TransmitterR { + TransmitterR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Nack Received"] #[inline(always)] - pub fn nacked(&self) -> NACKED_R { - NACKED_R::new(((self.bits >> 3) & 1) != 0) + pub fn nacked(&self) -> NackedR { + NackedR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Bus Held"] #[inline(always)] - pub fn bushold(&self) -> BUSHOLD_R { - BUSHOLD_R::new(((self.bits >> 4) & 1) != 0) + pub fn bushold(&self) -> BusholdR { + BusholdR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 5:7 - Transmission State"] #[inline(always)] - pub fn state(&self) -> STATE_R { - STATE_R::new(((self.bits >> 5) & 7) as u8) + pub fn state(&self) -> StateR { + StateR::new(((self.bits >> 5) & 7) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [state](index.html) module"] -pub struct STATE_SPEC; -impl crate::RegisterSpec for STATE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`state::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StateSpec; +impl crate::RegisterSpec for StateSpec { type Ux = u32; } -#[doc = "`read()` method returns [state::R](R) reader structure"] -impl crate::Readable for STATE_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`state::R`](R) reader structure"] +impl crate::Readable for StateSpec {} #[doc = "`reset()` method sets STATE to value 0x01"] -impl crate::Resettable for STATE_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for StateSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/status.rs index 1688cd6..8f60c29 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/status.rs @@ -1,107 +1,92 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `PSTART` reader - Pending START"] -pub type PSTART_R = crate::BitReader; +pub type PstartR = crate::BitReader; #[doc = "Field `PSTOP` reader - Pending STOP"] -pub type PSTOP_R = crate::BitReader; +pub type PstopR = crate::BitReader; #[doc = "Field `PACK` reader - Pending ACK"] -pub type PACK_R = crate::BitReader; +pub type PackR = crate::BitReader; #[doc = "Field `PNACK` reader - Pending NACK"] -pub type PNACK_R = crate::BitReader; +pub type PnackR = crate::BitReader; #[doc = "Field `PCONT` reader - Pending continue"] -pub type PCONT_R = crate::BitReader; +pub type PcontR = crate::BitReader; #[doc = "Field `PABORT` reader - Pending abort"] -pub type PABORT_R = crate::BitReader; +pub type PabortR = crate::BitReader; #[doc = "Field `TXC` reader - TX Complete"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXBL` reader - TX Buffer Level"] -pub type TXBL_R = crate::BitReader; +pub type TxblR = crate::BitReader; #[doc = "Field `RXDATAV` reader - RX Data Valid"] -pub type RXDATAV_R = crate::BitReader; +pub type RxdatavR = crate::BitReader; #[doc = "Field `RXFULL` reader - RX FIFO Full"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `TXBUFCNT` reader - TX Buffer Count"] -pub type TXBUFCNT_R = crate::FieldReader; +pub type TxbufcntR = crate::FieldReader; impl R { #[doc = "Bit 0 - Pending START"] #[inline(always)] - pub fn pstart(&self) -> PSTART_R { - PSTART_R::new((self.bits & 1) != 0) + pub fn pstart(&self) -> PstartR { + PstartR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Pending STOP"] #[inline(always)] - pub fn pstop(&self) -> PSTOP_R { - PSTOP_R::new(((self.bits >> 1) & 1) != 0) + pub fn pstop(&self) -> PstopR { + PstopR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Pending ACK"] #[inline(always)] - pub fn pack(&self) -> PACK_R { - PACK_R::new(((self.bits >> 2) & 1) != 0) + pub fn pack(&self) -> PackR { + PackR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Pending NACK"] #[inline(always)] - pub fn pnack(&self) -> PNACK_R { - PNACK_R::new(((self.bits >> 3) & 1) != 0) + pub fn pnack(&self) -> PnackR { + PnackR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Pending continue"] #[inline(always)] - pub fn pcont(&self) -> PCONT_R { - PCONT_R::new(((self.bits >> 4) & 1) != 0) + pub fn pcont(&self) -> PcontR { + PcontR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Pending abort"] #[inline(always)] - pub fn pabort(&self) -> PABORT_R { - PABORT_R::new(((self.bits >> 5) & 1) != 0) + pub fn pabort(&self) -> PabortR { + PabortR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX Complete"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new(((self.bits >> 6) & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - TX Buffer Level"] #[inline(always)] - pub fn txbl(&self) -> TXBL_R { - TXBL_R::new(((self.bits >> 7) & 1) != 0) + pub fn txbl(&self) -> TxblR { + TxblR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - RX Data Valid"] #[inline(always)] - pub fn rxdatav(&self) -> RXDATAV_R { - RXDATAV_R::new(((self.bits >> 8) & 1) != 0) + pub fn rxdatav(&self) -> RxdatavR { + RxdatavR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - RX FIFO Full"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 9) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bits 10:11 - TX Buffer Count"] #[inline(always)] - pub fn txbufcnt(&self) -> TXBUFCNT_R { - TXBUFCNT_R::new(((self.bits >> 10) & 3) as u8) + pub fn txbufcnt(&self) -> TxbufcntR { + TxbufcntR::new(((self.bits >> 10) & 3) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0x80"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0x80; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0x80; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/txdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/txdata.rs index e3980b6..61643d3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/txdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/txdata.rs @@ -1,52 +1,27 @@ #[doc = "Register `TXDATA` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXDATA` writer - TX Data"] -pub type TXDATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDATA_SPEC, u8, u8, 8, O>; +pub type TxdataW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - TX Data"] #[inline(always)] #[must_use] - pub fn txdata(&mut self) -> TXDATA_W<0> { - TXDATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txdata(&mut self) -> TxdataW { + TxdataW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdata](index.html) module"] -pub struct TXDATA_SPEC; -impl crate::RegisterSpec for TXDATA_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdata::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxdataSpec; +impl crate::RegisterSpec for TxdataSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [txdata::W](W) writer structure"] -impl crate::Writable for TXDATA_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`txdata::W`](W) writer structure"] +impl crate::Writable for TxdataSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXDATA to value 0"] -impl crate::Resettable for TXDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/txdouble.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/txdouble.rs index 320dad9..9cb5990 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/txdouble.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c0_s/txdouble.rs @@ -1,60 +1,35 @@ #[doc = "Register `TXDOUBLE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXDATA0` writer - TX Data"] -pub type TXDATA0_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDOUBLE_SPEC, u8, u8, 8, O>; +pub type Txdata0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `TXDATA1` writer - TX Data"] -pub type TXDATA1_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDOUBLE_SPEC, u8, u8, 8, O>; +pub type Txdata1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - TX Data"] #[inline(always)] #[must_use] - pub fn txdata0(&mut self) -> TXDATA0_W<0> { - TXDATA0_W::new(self) + pub fn txdata0(&mut self) -> Txdata0W { + Txdata0W::new(self, 0) } #[doc = "Bits 8:15 - TX Data"] #[inline(always)] #[must_use] - pub fn txdata1(&mut self) -> TXDATA1_W<8> { - TXDATA1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txdata1(&mut self) -> Txdata1W { + Txdata1W::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdouble](index.html) module"] -pub struct TXDOUBLE_SPEC; -impl crate::RegisterSpec for TXDOUBLE_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdouble::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxdoubleSpec; +impl crate::RegisterSpec for TxdoubleSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [txdouble::W](W) writer structure"] -impl crate::Writable for TXDOUBLE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`txdouble::W`](W) writer structure"] +impl crate::Writable for TxdoubleSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXDOUBLE to value 0"] -impl crate::Resettable for TXDOUBLE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxdoubleSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns.rs index 0538763..94a4ce5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns.rs @@ -1,106 +1,210 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + ctrl: Ctrl, + cmd: Cmd, + state: State, + status: Status, + clkdiv: Clkdiv, + saddr: Saddr, + saddrmask: Saddrmask, + rxdata: Rxdata, + rxdouble: Rxdouble, + rxdatap: Rxdatap, + rxdoublep: Rxdoublep, + txdata: Txdata, + txdouble: Txdouble, + if_: If, + ien: Ien, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x0c - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x10 - No Description"] - pub state: STATE, + #[inline(always)] + pub const fn state(&self) -> &State { + &self.state + } #[doc = "0x14 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x18 - No Description"] - pub clkdiv: CLKDIV, + #[inline(always)] + pub const fn clkdiv(&self) -> &Clkdiv { + &self.clkdiv + } #[doc = "0x1c - No Description"] - pub saddr: SADDR, + #[inline(always)] + pub const fn saddr(&self) -> &Saddr { + &self.saddr + } #[doc = "0x20 - No Description"] - pub saddrmask: SADDRMASK, + #[inline(always)] + pub const fn saddrmask(&self) -> &Saddrmask { + &self.saddrmask + } #[doc = "0x24 - No Description"] - pub rxdata: RXDATA, + #[inline(always)] + pub const fn rxdata(&self) -> &Rxdata { + &self.rxdata + } #[doc = "0x28 - No Description"] - pub rxdouble: RXDOUBLE, + #[inline(always)] + pub const fn rxdouble(&self) -> &Rxdouble { + &self.rxdouble + } #[doc = "0x2c - No Description"] - pub rxdatap: RXDATAP, + #[inline(always)] + pub const fn rxdatap(&self) -> &Rxdatap { + &self.rxdatap + } #[doc = "0x30 - No Description"] - pub rxdoublep: RXDOUBLEP, + #[inline(always)] + pub const fn rxdoublep(&self) -> &Rxdoublep { + &self.rxdoublep + } #[doc = "0x34 - No Description"] - pub txdata: TXDATA, + #[inline(always)] + pub const fn txdata(&self) -> &Txdata { + &self.txdata + } #[doc = "0x38 - No Description"] - pub txdouble: TXDOUBLE, + #[inline(always)] + pub const fn txdouble(&self) -> &Txdouble { + &self.txdouble + } #[doc = "0x3c - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x40 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATE (r) register accessor: an alias for `Reg`"] -pub type STATE = crate::Reg; +#[doc = "STATE (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`state::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@state`] +module"] +#[doc(alias = "STATE")] +pub type State = crate::Reg; #[doc = "No Description"] pub mod state; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "CLKDIV (rw) register accessor: an alias for `Reg`"] -pub type CLKDIV = crate::Reg; +#[doc = "CLKDIV (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv`] +module"] +#[doc(alias = "CLKDIV")] +pub type Clkdiv = crate::Reg; #[doc = "No Description"] pub mod clkdiv; -#[doc = "SADDR (rw) register accessor: an alias for `Reg`"] -pub type SADDR = crate::Reg; +#[doc = "SADDR (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`saddr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`saddr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@saddr`] +module"] +#[doc(alias = "SADDR")] +pub type Saddr = crate::Reg; #[doc = "No Description"] pub mod saddr; -#[doc = "SADDRMASK (rw) register accessor: an alias for `Reg`"] -pub type SADDRMASK = crate::Reg; +#[doc = "SADDRMASK (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`saddrmask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`saddrmask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@saddrmask`] +module"] +#[doc(alias = "SADDRMASK")] +pub type Saddrmask = crate::Reg; #[doc = "No Description"] pub mod saddrmask; -#[doc = "RXDATA (r) register accessor: an alias for `Reg`"] -pub type RXDATA = crate::Reg; +#[doc = "RXDATA (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdata::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdata`] +module"] +#[doc(alias = "RXDATA")] +pub type Rxdata = crate::Reg; #[doc = "No Description"] pub mod rxdata; -#[doc = "RXDOUBLE (r) register accessor: an alias for `Reg`"] -pub type RXDOUBLE = crate::Reg; +#[doc = "RXDOUBLE (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdouble::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdouble`] +module"] +#[doc(alias = "RXDOUBLE")] +pub type Rxdouble = crate::Reg; #[doc = "No Description"] pub mod rxdouble; -#[doc = "RXDATAP (r) register accessor: an alias for `Reg`"] -pub type RXDATAP = crate::Reg; +#[doc = "RXDATAP (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdatap::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdatap`] +module"] +#[doc(alias = "RXDATAP")] +pub type Rxdatap = crate::Reg; #[doc = "No Description"] pub mod rxdatap; -#[doc = "RXDOUBLEP (r) register accessor: an alias for `Reg`"] -pub type RXDOUBLEP = crate::Reg; +#[doc = "RXDOUBLEP (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdoublep::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdoublep`] +module"] +#[doc(alias = "RXDOUBLEP")] +pub type Rxdoublep = crate::Reg; #[doc = "No Description"] pub mod rxdoublep; -#[doc = "TXDATA (w) register accessor: an alias for `Reg`"] -pub type TXDATA = crate::Reg; +#[doc = "TXDATA (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdata::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txdata`] +module"] +#[doc(alias = "TXDATA")] +pub type Txdata = crate::Reg; #[doc = "No Description"] pub mod txdata; -#[doc = "TXDOUBLE (w) register accessor: an alias for `Reg`"] -pub type TXDOUBLE = crate::Reg; +#[doc = "TXDOUBLE (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdouble::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txdouble`] +module"] +#[doc(alias = "TXDOUBLE")] +pub type Txdouble = crate::Reg; #[doc = "No Description"] pub mod txdouble; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/clkdiv.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/clkdiv.rs index 90aa445..7b64d88 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/clkdiv.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/clkdiv.rs @@ -1,80 +1,40 @@ #[doc = "Register `CLKDIV` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKDIV` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DIV` reader - Clock Divider"] -pub type DIV_R = crate::FieldReader; +pub type DivR = crate::FieldReader; #[doc = "Field `DIV` writer - Clock Divider"] -pub type DIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CLKDIV_SPEC, u16, u16, 9, O>; +pub type DivW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; impl R { #[doc = "Bits 0:8 - Clock Divider"] #[inline(always)] - pub fn div(&self) -> DIV_R { - DIV_R::new((self.bits & 0x01ff) as u16) + pub fn div(&self) -> DivR { + DivR::new((self.bits & 0x01ff) as u16) } } impl W { #[doc = "Bits 0:8 - Clock Divider"] #[inline(always)] #[must_use] - pub fn div(&mut self) -> DIV_W<0> { - DIV_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn div(&mut self) -> DivW { + DivW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clkdiv](index.html) module"] -pub struct CLKDIV_SPEC; -impl crate::RegisterSpec for CLKDIV_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ClkdivSpec; +impl crate::RegisterSpec for ClkdivSpec { type Ux = u32; } -#[doc = "`read()` method returns [clkdiv::R](R) reader structure"] -impl crate::Readable for CLKDIV_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clkdiv::W](W) writer structure"] -impl crate::Writable for CLKDIV_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`clkdiv::R`](R) reader structure"] +impl crate::Readable for ClkdivSpec {} +#[doc = "`write(|w| ..)` method takes [`clkdiv::W`](W) writer structure"] +impl crate::Writable for ClkdivSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV to value 0"] -impl crate::Resettable for CLKDIV_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ClkdivSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/cmd.rs index 57a4f73..d935390 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/cmd.rs @@ -1,108 +1,83 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` writer - Send start condition"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STOP` writer - Send stop condition"] -pub type STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACK` writer - Send ACK"] -pub type ACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type AckW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NACK` writer - Send NACK"] -pub type NACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type NackW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CONT` writer - Continue transmission"] -pub type CONT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type ContW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ABORT` writer - Abort transmission"] -pub type ABORT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type AbortW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEARTX` writer - Clear TX"] -pub type CLEARTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type CleartxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEARPC` writer - Clear Pending Commands"] -pub type CLEARPC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type ClearpcW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Send start condition"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Send stop condition"] #[inline(always)] #[must_use] - pub fn stop(&mut self) -> STOP_W<1> { - STOP_W::new(self) + pub fn stop(&mut self) -> StopW { + StopW::new(self, 1) } #[doc = "Bit 2 - Send ACK"] #[inline(always)] #[must_use] - pub fn ack(&mut self) -> ACK_W<2> { - ACK_W::new(self) + pub fn ack(&mut self) -> AckW { + AckW::new(self, 2) } #[doc = "Bit 3 - Send NACK"] #[inline(always)] #[must_use] - pub fn nack(&mut self) -> NACK_W<3> { - NACK_W::new(self) + pub fn nack(&mut self) -> NackW { + NackW::new(self, 3) } #[doc = "Bit 4 - Continue transmission"] #[inline(always)] #[must_use] - pub fn cont(&mut self) -> CONT_W<4> { - CONT_W::new(self) + pub fn cont(&mut self) -> ContW { + ContW::new(self, 4) } #[doc = "Bit 5 - Abort transmission"] #[inline(always)] #[must_use] - pub fn abort(&mut self) -> ABORT_W<5> { - ABORT_W::new(self) + pub fn abort(&mut self) -> AbortW { + AbortW::new(self, 5) } #[doc = "Bit 6 - Clear TX"] #[inline(always)] #[must_use] - pub fn cleartx(&mut self) -> CLEARTX_W<6> { - CLEARTX_W::new(self) + pub fn cleartx(&mut self) -> CleartxW { + CleartxW::new(self, 6) } #[doc = "Bit 7 - Clear Pending Commands"] #[inline(always)] #[must_use] - pub fn clearpc(&mut self) -> CLEARPC_W<7> { - CLEARPC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clearpc(&mut self) -> ClearpcW { + ClearpcW::new(self, 7) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/ctrl.rs index b334eef..8e17ecb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/ctrl.rs @@ -1,1016 +1,1033 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CORERST` reader - Soft Reset the internal state registers"] -pub type CORERST_R = crate::BitReader; +pub type W = crate::W; #[doc = "Soft Reset the internal state registers\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CORERST_A { +pub enum Corerst { #[doc = "0: No change to internal state registers"] - DISABLE = 0, + Disable = 0, #[doc = "1: Reset the internal state registers"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CORERST_A) -> Self { + fn from(variant: Corerst) -> Self { variant as u8 != 0 } } -impl CORERST_R { +#[doc = "Field `CORERST` reader - Soft Reset the internal state registers"] +pub type CorerstR = crate::BitReader; +impl CorerstR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CORERST_A { + pub const fn variant(&self) -> Corerst { match self.bits { - false => CORERST_A::DISABLE, - true => CORERST_A::ENABLE, + false => Corerst::Disable, + true => Corerst::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "No change to internal state registers"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CORERST_A::DISABLE + *self == Corerst::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Reset the internal state registers"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CORERST_A::ENABLE + *self == Corerst::Enable } } #[doc = "Field `CORERST` writer - Soft Reset the internal state registers"] -pub type CORERST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, CORERST_A, O>; -impl<'a, const O: u8> CORERST_W<'a, O> { +pub type CorerstW<'a, REG> = crate::BitWriter<'a, REG, Corerst>; +impl<'a, REG> CorerstW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No change to internal state registers"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CORERST_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Corerst::Disable) } #[doc = "Reset the internal state registers"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CORERST_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Corerst::Enable) } } -#[doc = "Field `SLAVE` reader - Addressable as Follower"] -pub type SLAVE_R = crate::BitReader; #[doc = "Addressable as Follower\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SLAVE_A { +pub enum Slave { #[doc = "0: All addresses will be responded to with a NACK"] - DISABLE = 0, + Disable = 0, #[doc = "1: Addresses matching the programmed follower address or the general call address (if enabled) require a response from software. Other addresses are automatically responded to with a NACK."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SLAVE_A) -> Self { + fn from(variant: Slave) -> Self { variant as u8 != 0 } } -impl SLAVE_R { +#[doc = "Field `SLAVE` reader - Addressable as Follower"] +pub type SlaveR = crate::BitReader; +impl SlaveR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SLAVE_A { + pub const fn variant(&self) -> Slave { match self.bits { - false => SLAVE_A::DISABLE, - true => SLAVE_A::ENABLE, + false => Slave::Disable, + true => Slave::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "All addresses will be responded to with a NACK"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == SLAVE_A::DISABLE + *self == Slave::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Addresses matching the programmed follower address or the general call address (if enabled) require a response from software. Other addresses are automatically responded to with a NACK."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == SLAVE_A::ENABLE + *self == Slave::Enable } } #[doc = "Field `SLAVE` writer - Addressable as Follower"] -pub type SLAVE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, SLAVE_A, O>; -impl<'a, const O: u8> SLAVE_W<'a, O> { +pub type SlaveW<'a, REG> = crate::BitWriter<'a, REG, Slave>; +impl<'a, REG> SlaveW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "All addresses will be responded to with a NACK"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(SLAVE_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Slave::Disable) } #[doc = "Addresses matching the programmed follower address or the general call address (if enabled) require a response from software. Other addresses are automatically responded to with a NACK."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(SLAVE_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Slave::Enable) } } -#[doc = "Field `AUTOACK` reader - Automatic Acknowledge"] -pub type AUTOACK_R = crate::BitReader; #[doc = "Automatic Acknowledge\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AUTOACK_A { +pub enum Autoack { #[doc = "0: Software must give one ACK command for each ACK transmitted on the I2C bus."] - DISABLE = 0, + Disable = 0, #[doc = "1: Addresses that are not automatically NACK'ed, and all data is automatically acknowledged."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AUTOACK_A) -> Self { + fn from(variant: Autoack) -> Self { variant as u8 != 0 } } -impl AUTOACK_R { +#[doc = "Field `AUTOACK` reader - Automatic Acknowledge"] +pub type AutoackR = crate::BitReader; +impl AutoackR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> AUTOACK_A { + pub const fn variant(&self) -> Autoack { match self.bits { - false => AUTOACK_A::DISABLE, - true => AUTOACK_A::ENABLE, + false => Autoack::Disable, + true => Autoack::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Software must give one ACK command for each ACK transmitted on the I2C bus."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == AUTOACK_A::DISABLE + *self == Autoack::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Addresses that are not automatically NACK'ed, and all data is automatically acknowledged."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == AUTOACK_A::ENABLE + *self == Autoack::Enable } } #[doc = "Field `AUTOACK` writer - Automatic Acknowledge"] -pub type AUTOACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, AUTOACK_A, O>; -impl<'a, const O: u8> AUTOACK_W<'a, O> { +pub type AutoackW<'a, REG> = crate::BitWriter<'a, REG, Autoack>; +impl<'a, REG> AutoackW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Software must give one ACK command for each ACK transmitted on the I2C bus."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(AUTOACK_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Autoack::Disable) } #[doc = "Addresses that are not automatically NACK'ed, and all data is automatically acknowledged."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(AUTOACK_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Autoack::Enable) } } -#[doc = "Field `AUTOSE` reader - Automatic STOP when Empty"] -pub type AUTOSE_R = crate::BitReader; #[doc = "Automatic STOP when Empty\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AUTOSE_A { +pub enum Autose { #[doc = "0: A stop must be sent manually when no more data is to be transmitted."] - DISABLE = 0, + Disable = 0, #[doc = "1: The leader automatically sends a STOP when no more data is available for transmission."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AUTOSE_A) -> Self { + fn from(variant: Autose) -> Self { variant as u8 != 0 } } -impl AUTOSE_R { +#[doc = "Field `AUTOSE` reader - Automatic STOP when Empty"] +pub type AutoseR = crate::BitReader; +impl AutoseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> AUTOSE_A { + pub const fn variant(&self) -> Autose { match self.bits { - false => AUTOSE_A::DISABLE, - true => AUTOSE_A::ENABLE, + false => Autose::Disable, + true => Autose::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "A stop must be sent manually when no more data is to be transmitted."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == AUTOSE_A::DISABLE + *self == Autose::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The leader automatically sends a STOP when no more data is available for transmission."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == AUTOSE_A::ENABLE + *self == Autose::Enable } } #[doc = "Field `AUTOSE` writer - Automatic STOP when Empty"] -pub type AUTOSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, AUTOSE_A, O>; -impl<'a, const O: u8> AUTOSE_W<'a, O> { +pub type AutoseW<'a, REG> = crate::BitWriter<'a, REG, Autose>; +impl<'a, REG> AutoseW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "A stop must be sent manually when no more data is to be transmitted."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(AUTOSE_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Autose::Disable) } #[doc = "The leader automatically sends a STOP when no more data is available for transmission."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(AUTOSE_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Autose::Enable) } } -#[doc = "Field `AUTOSN` reader - Automatic STOP on NACK"] -pub type AUTOSN_R = crate::BitReader; #[doc = "Automatic STOP on NACK\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AUTOSN_A { +pub enum Autosn { #[doc = "0: Stop is not automatically sent if a NACK is received from a follower."] - DISABLE = 0, + Disable = 0, #[doc = "1: The leader automatically sends a STOP if a NACK is received from a follower."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AUTOSN_A) -> Self { + fn from(variant: Autosn) -> Self { variant as u8 != 0 } } -impl AUTOSN_R { +#[doc = "Field `AUTOSN` reader - Automatic STOP on NACK"] +pub type AutosnR = crate::BitReader; +impl AutosnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> AUTOSN_A { + pub const fn variant(&self) -> Autosn { match self.bits { - false => AUTOSN_A::DISABLE, - true => AUTOSN_A::ENABLE, + false => Autosn::Disable, + true => Autosn::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Stop is not automatically sent if a NACK is received from a follower."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == AUTOSN_A::DISABLE + *self == Autosn::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The leader automatically sends a STOP if a NACK is received from a follower."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == AUTOSN_A::ENABLE + *self == Autosn::Enable } } #[doc = "Field `AUTOSN` writer - Automatic STOP on NACK"] -pub type AUTOSN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, AUTOSN_A, O>; -impl<'a, const O: u8> AUTOSN_W<'a, O> { +pub type AutosnW<'a, REG> = crate::BitWriter<'a, REG, Autosn>; +impl<'a, REG> AutosnW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Stop is not automatically sent if a NACK is received from a follower."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(AUTOSN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Autosn::Disable) } #[doc = "The leader automatically sends a STOP if a NACK is received from a follower."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(AUTOSN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Autosn::Enable) } } -#[doc = "Field `ARBDIS` reader - Arbitration Disable"] -pub type ARBDIS_R = crate::BitReader; #[doc = "Arbitration Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ARBDIS_A { +pub enum Arbdis { #[doc = "0: When a device loses arbitration, the ARBIF interrupt flag is set and the bus is released."] - DISABLE = 0, + Disable = 0, #[doc = "1: When a device loses arbitration, the ARBIF interrupt flag is set, but communication proceeds."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ARBDIS_A) -> Self { + fn from(variant: Arbdis) -> Self { variant as u8 != 0 } } -impl ARBDIS_R { +#[doc = "Field `ARBDIS` reader - Arbitration Disable"] +pub type ArbdisR = crate::BitReader; +impl ArbdisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ARBDIS_A { + pub const fn variant(&self) -> Arbdis { match self.bits { - false => ARBDIS_A::DISABLE, - true => ARBDIS_A::ENABLE, + false => Arbdis::Disable, + true => Arbdis::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "When a device loses arbitration, the ARBIF interrupt flag is set and the bus is released."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ARBDIS_A::DISABLE + *self == Arbdis::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "When a device loses arbitration, the ARBIF interrupt flag is set, but communication proceeds."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ARBDIS_A::ENABLE + *self == Arbdis::Enable } } #[doc = "Field `ARBDIS` writer - Arbitration Disable"] -pub type ARBDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, ARBDIS_A, O>; -impl<'a, const O: u8> ARBDIS_W<'a, O> { +pub type ArbdisW<'a, REG> = crate::BitWriter<'a, REG, Arbdis>; +impl<'a, REG> ArbdisW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "When a device loses arbitration, the ARBIF interrupt flag is set and the bus is released."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ARBDIS_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Arbdis::Disable) } #[doc = "When a device loses arbitration, the ARBIF interrupt flag is set, but communication proceeds."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ARBDIS_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Arbdis::Enable) } } -#[doc = "Field `GCAMEN` reader - General Call Address Match Enable"] -pub type GCAMEN_R = crate::BitReader; #[doc = "General Call Address Match Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GCAMEN_A { +pub enum Gcamen { #[doc = "0: General call address will be NACK'ed if it is not included by the follower address and address mask."] - DISABLE = 0, + Disable = 0, #[doc = "1: When a general call address is received, a software response is required"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GCAMEN_A) -> Self { + fn from(variant: Gcamen) -> Self { variant as u8 != 0 } } -impl GCAMEN_R { +#[doc = "Field `GCAMEN` reader - General Call Address Match Enable"] +pub type GcamenR = crate::BitReader; +impl GcamenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> GCAMEN_A { + pub const fn variant(&self) -> Gcamen { match self.bits { - false => GCAMEN_A::DISABLE, - true => GCAMEN_A::ENABLE, + false => Gcamen::Disable, + true => Gcamen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "General call address will be NACK'ed if it is not included by the follower address and address mask."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == GCAMEN_A::DISABLE + *self == Gcamen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "When a general call address is received, a software response is required"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == GCAMEN_A::ENABLE + *self == Gcamen::Enable } } #[doc = "Field `GCAMEN` writer - General Call Address Match Enable"] -pub type GCAMEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, GCAMEN_A, O>; -impl<'a, const O: u8> GCAMEN_W<'a, O> { +pub type GcamenW<'a, REG> = crate::BitWriter<'a, REG, Gcamen>; +impl<'a, REG> GcamenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "General call address will be NACK'ed if it is not included by the follower address and address mask."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(GCAMEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Gcamen::Disable) } #[doc = "When a general call address is received, a software response is required"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(GCAMEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Gcamen::Enable) } } -#[doc = "Field `TXBIL` reader - TX Buffer Interrupt Level"] -pub type TXBIL_R = crate::BitReader; #[doc = "TX Buffer Interrupt Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TXBIL_A { +pub enum Txbil { #[doc = "0: TXBL status and the TXBL interrupt flag are set when the transmit buffer becomes empty. TXBL is cleared when the buffer becomes nonempty."] - EMPTY = 0, + Empty = 0, #[doc = "1: TXBL status and the TXBL interrupt flag are set when the transmit buffer goes from full to half-full or empty. TXBL is cleared when the buffer becomes full"] - HALF_FULL = 1, + HalfFull = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TXBIL_A) -> Self { + fn from(variant: Txbil) -> Self { variant as u8 != 0 } } -impl TXBIL_R { +#[doc = "Field `TXBIL` reader - TX Buffer Interrupt Level"] +pub type TxbilR = crate::BitReader; +impl TxbilR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXBIL_A { + pub const fn variant(&self) -> Txbil { match self.bits { - false => TXBIL_A::EMPTY, - true => TXBIL_A::HALF_FULL, + false => Txbil::Empty, + true => Txbil::HalfFull, } } - #[doc = "Checks if the value of the field is `EMPTY`"] + #[doc = "TXBL status and the TXBL interrupt flag are set when the transmit buffer becomes empty. TXBL is cleared when the buffer becomes nonempty."] #[inline(always)] pub fn is_empty(&self) -> bool { - *self == TXBIL_A::EMPTY + *self == Txbil::Empty } - #[doc = "Checks if the value of the field is `HALF_FULL`"] + #[doc = "TXBL status and the TXBL interrupt flag are set when the transmit buffer goes from full to half-full or empty. TXBL is cleared when the buffer becomes full"] #[inline(always)] pub fn is_half_full(&self) -> bool { - *self == TXBIL_A::HALF_FULL + *self == Txbil::HalfFull } } #[doc = "Field `TXBIL` writer - TX Buffer Interrupt Level"] -pub type TXBIL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, TXBIL_A, O>; -impl<'a, const O: u8> TXBIL_W<'a, O> { +pub type TxbilW<'a, REG> = crate::BitWriter<'a, REG, Txbil>; +impl<'a, REG> TxbilW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "TXBL status and the TXBL interrupt flag are set when the transmit buffer becomes empty. TXBL is cleared when the buffer becomes nonempty."] #[inline(always)] - pub fn empty(self) -> &'a mut W { - self.variant(TXBIL_A::EMPTY) + pub fn empty(self) -> &'a mut crate::W { + self.variant(Txbil::Empty) } #[doc = "TXBL status and the TXBL interrupt flag are set when the transmit buffer goes from full to half-full or empty. TXBL is cleared when the buffer becomes full"] #[inline(always)] - pub fn half_full(self) -> &'a mut W { - self.variant(TXBIL_A::HALF_FULL) + pub fn half_full(self) -> &'a mut crate::W { + self.variant(Txbil::HalfFull) } } -#[doc = "Field `CLHR` reader - Clock Low High Ratio"] -pub type CLHR_R = crate::FieldReader; #[doc = "Clock Low High Ratio\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLHR_A { +pub enum Clhr { #[doc = "0: Nlow=4 and Nhigh=4, and the Nlow:Nhigh ratio is 4:4"] - STANDARD = 0, + Standard = 0, #[doc = "1: Nlow=6 and Nhigh=3, and the Nlow:Nhigh ratio is 6:3"] - ASYMMETRIC = 1, + Asymmetric = 1, #[doc = "2: Nlow=11 and Nhigh=6, and the Nlow:Nhigh ratio is 11:6"] - FAST = 2, + Fast = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLHR_A) -> Self { + fn from(variant: Clhr) -> Self { variant as _ } } -impl CLHR_R { +impl crate::FieldSpec for Clhr { + type Ux = u8; +} +impl crate::IsEnum for Clhr {} +#[doc = "Field `CLHR` reader - Clock Low High Ratio"] +pub type ClhrR = crate::FieldReader; +impl ClhrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLHR_A::STANDARD), - 1 => Some(CLHR_A::ASYMMETRIC), - 2 => Some(CLHR_A::FAST), + 0 => Some(Clhr::Standard), + 1 => Some(Clhr::Asymmetric), + 2 => Some(Clhr::Fast), _ => None, } } - #[doc = "Checks if the value of the field is `STANDARD`"] + #[doc = "Nlow=4 and Nhigh=4, and the Nlow:Nhigh ratio is 4:4"] #[inline(always)] pub fn is_standard(&self) -> bool { - *self == CLHR_A::STANDARD + *self == Clhr::Standard } - #[doc = "Checks if the value of the field is `ASYMMETRIC`"] + #[doc = "Nlow=6 and Nhigh=3, and the Nlow:Nhigh ratio is 6:3"] #[inline(always)] pub fn is_asymmetric(&self) -> bool { - *self == CLHR_A::ASYMMETRIC + *self == Clhr::Asymmetric } - #[doc = "Checks if the value of the field is `FAST`"] + #[doc = "Nlow=11 and Nhigh=6, and the Nlow:Nhigh ratio is 11:6"] #[inline(always)] pub fn is_fast(&self) -> bool { - *self == CLHR_A::FAST + *self == Clhr::Fast } } #[doc = "Field `CLHR` writer - Clock Low High Ratio"] -pub type CLHR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, CLHR_A, 2, O>; -impl<'a, const O: u8> CLHR_W<'a, O> { +pub type ClhrW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clhr>; +impl<'a, REG> ClhrW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Nlow=4 and Nhigh=4, and the Nlow:Nhigh ratio is 4:4"] #[inline(always)] - pub fn standard(self) -> &'a mut W { - self.variant(CLHR_A::STANDARD) + pub fn standard(self) -> &'a mut crate::W { + self.variant(Clhr::Standard) } #[doc = "Nlow=6 and Nhigh=3, and the Nlow:Nhigh ratio is 6:3"] #[inline(always)] - pub fn asymmetric(self) -> &'a mut W { - self.variant(CLHR_A::ASYMMETRIC) + pub fn asymmetric(self) -> &'a mut crate::W { + self.variant(Clhr::Asymmetric) } #[doc = "Nlow=11 and Nhigh=6, and the Nlow:Nhigh ratio is 11:6"] #[inline(always)] - pub fn fast(self) -> &'a mut W { - self.variant(CLHR_A::FAST) + pub fn fast(self) -> &'a mut crate::W { + self.variant(Clhr::Fast) } } -#[doc = "Field `BITO` reader - Bus Idle Timeout"] -pub type BITO_R = crate::FieldReader; #[doc = "Bus Idle Timeout\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BITO_A { +pub enum Bito { #[doc = "0: Timeout disabled"] - OFF = 0, + Off = 0, #[doc = "1: Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."] - I2C40PCC = 1, + I2c40pcc = 1, #[doc = "2: Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."] - I2C80PCC = 2, + I2c80pcc = 2, #[doc = "3: Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."] - I2C160PCC = 3, + I2c160pcc = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BITO_A) -> Self { + fn from(variant: Bito) -> Self { variant as _ } } -impl BITO_R { +impl crate::FieldSpec for Bito { + type Ux = u8; +} +impl crate::IsEnum for Bito {} +#[doc = "Field `BITO` reader - Bus Idle Timeout"] +pub type BitoR = crate::FieldReader; +impl BitoR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> BITO_A { + pub const fn variant(&self) -> Bito { match self.bits { - 0 => BITO_A::OFF, - 1 => BITO_A::I2C40PCC, - 2 => BITO_A::I2C80PCC, - 3 => BITO_A::I2C160PCC, + 0 => Bito::Off, + 1 => Bito::I2c40pcc, + 2 => Bito::I2c80pcc, + 3 => Bito::I2c160pcc, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Timeout disabled"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == BITO_A::OFF + *self == Bito::Off } - #[doc = "Checks if the value of the field is `I2C40PCC`"] + #[doc = "Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."] #[inline(always)] pub fn is_i2c40pcc(&self) -> bool { - *self == BITO_A::I2C40PCC + *self == Bito::I2c40pcc } - #[doc = "Checks if the value of the field is `I2C80PCC`"] + #[doc = "Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."] #[inline(always)] pub fn is_i2c80pcc(&self) -> bool { - *self == BITO_A::I2C80PCC + *self == Bito::I2c80pcc } - #[doc = "Checks if the value of the field is `I2C160PCC`"] + #[doc = "Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."] #[inline(always)] pub fn is_i2c160pcc(&self) -> bool { - *self == BITO_A::I2C160PCC + *self == Bito::I2c160pcc } } #[doc = "Field `BITO` writer - Bus Idle Timeout"] -pub type BITO_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, BITO_A, 2, O>; -impl<'a, const O: u8> BITO_W<'a, O> { +pub type BitoW<'a, REG> = crate::FieldWriter<'a, REG, 2, Bito, crate::Safe>; +impl<'a, REG> BitoW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Timeout disabled"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(BITO_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Bito::Off) } #[doc = "Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."] #[inline(always)] - pub fn i2c40pcc(self) -> &'a mut W { - self.variant(BITO_A::I2C40PCC) + pub fn i2c40pcc(self) -> &'a mut crate::W { + self.variant(Bito::I2c40pcc) } #[doc = "Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."] #[inline(always)] - pub fn i2c80pcc(self) -> &'a mut W { - self.variant(BITO_A::I2C80PCC) + pub fn i2c80pcc(self) -> &'a mut crate::W { + self.variant(Bito::I2c80pcc) } #[doc = "Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."] #[inline(always)] - pub fn i2c160pcc(self) -> &'a mut W { - self.variant(BITO_A::I2C160PCC) + pub fn i2c160pcc(self) -> &'a mut crate::W { + self.variant(Bito::I2c160pcc) } } -#[doc = "Field `GIBITO` reader - Go Idle on Bus Idle Timeout"] -pub type GIBITO_R = crate::BitReader; #[doc = "Go Idle on Bus Idle Timeout\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GIBITO_A { +pub enum Gibito { #[doc = "0: A bus idle timeout has no effect on the bus state."] - DISABLE = 0, + Disable = 0, #[doc = "1: A bus idle timeout tells the I2C module that the bus is idle, allowing new transfers to be initiated."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GIBITO_A) -> Self { + fn from(variant: Gibito) -> Self { variant as u8 != 0 } } -impl GIBITO_R { +#[doc = "Field `GIBITO` reader - Go Idle on Bus Idle Timeout"] +pub type GibitoR = crate::BitReader; +impl GibitoR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> GIBITO_A { + pub const fn variant(&self) -> Gibito { match self.bits { - false => GIBITO_A::DISABLE, - true => GIBITO_A::ENABLE, + false => Gibito::Disable, + true => Gibito::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "A bus idle timeout has no effect on the bus state."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == GIBITO_A::DISABLE + *self == Gibito::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "A bus idle timeout tells the I2C module that the bus is idle, allowing new transfers to be initiated."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == GIBITO_A::ENABLE + *self == Gibito::Enable } } #[doc = "Field `GIBITO` writer - Go Idle on Bus Idle Timeout"] -pub type GIBITO_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, GIBITO_A, O>; -impl<'a, const O: u8> GIBITO_W<'a, O> { +pub type GibitoW<'a, REG> = crate::BitWriter<'a, REG, Gibito>; +impl<'a, REG> GibitoW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "A bus idle timeout has no effect on the bus state."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(GIBITO_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Gibito::Disable) } #[doc = "A bus idle timeout tells the I2C module that the bus is idle, allowing new transfers to be initiated."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(GIBITO_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Gibito::Enable) } } -#[doc = "Field `CLTO` reader - Clock Low Timeout"] -pub type CLTO_R = crate::FieldReader; #[doc = "Clock Low Timeout\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLTO_A { +pub enum Clto { #[doc = "0: Timeout disabled"] - OFF = 0, + Off = 0, #[doc = "1: Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."] - I2C40PCC = 1, + I2c40pcc = 1, #[doc = "2: Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."] - I2C80PCC = 2, + I2c80pcc = 2, #[doc = "3: Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."] - I2C160PCC = 3, + I2c160pcc = 3, #[doc = "4: Timeout after 320 prescaled clock cycles. In standard mode at 100 kHz, this results in a 400us timeout."] - I2C320PCC = 4, + I2c320pcc = 4, #[doc = "5: Timeout after 1024 prescaled clock cycles. In standard mode at 100 kHz, this results in a 1280us timeout."] - I2C1024PCC = 5, + I2c1024pcc = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLTO_A) -> Self { + fn from(variant: Clto) -> Self { variant as _ } } -impl CLTO_R { +impl crate::FieldSpec for Clto { + type Ux = u8; +} +impl crate::IsEnum for Clto {} +#[doc = "Field `CLTO` reader - Clock Low Timeout"] +pub type CltoR = crate::FieldReader; +impl CltoR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLTO_A::OFF), - 1 => Some(CLTO_A::I2C40PCC), - 2 => Some(CLTO_A::I2C80PCC), - 3 => Some(CLTO_A::I2C160PCC), - 4 => Some(CLTO_A::I2C320PCC), - 5 => Some(CLTO_A::I2C1024PCC), + 0 => Some(Clto::Off), + 1 => Some(Clto::I2c40pcc), + 2 => Some(Clto::I2c80pcc), + 3 => Some(Clto::I2c160pcc), + 4 => Some(Clto::I2c320pcc), + 5 => Some(Clto::I2c1024pcc), _ => None, } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Timeout disabled"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == CLTO_A::OFF + *self == Clto::Off } - #[doc = "Checks if the value of the field is `I2C40PCC`"] + #[doc = "Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."] #[inline(always)] pub fn is_i2c40pcc(&self) -> bool { - *self == CLTO_A::I2C40PCC + *self == Clto::I2c40pcc } - #[doc = "Checks if the value of the field is `I2C80PCC`"] + #[doc = "Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."] #[inline(always)] pub fn is_i2c80pcc(&self) -> bool { - *self == CLTO_A::I2C80PCC + *self == Clto::I2c80pcc } - #[doc = "Checks if the value of the field is `I2C160PCC`"] + #[doc = "Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."] #[inline(always)] pub fn is_i2c160pcc(&self) -> bool { - *self == CLTO_A::I2C160PCC + *self == Clto::I2c160pcc } - #[doc = "Checks if the value of the field is `I2C320PCC`"] + #[doc = "Timeout after 320 prescaled clock cycles. In standard mode at 100 kHz, this results in a 400us timeout."] #[inline(always)] pub fn is_i2c320pcc(&self) -> bool { - *self == CLTO_A::I2C320PCC + *self == Clto::I2c320pcc } - #[doc = "Checks if the value of the field is `I2C1024PCC`"] + #[doc = "Timeout after 1024 prescaled clock cycles. In standard mode at 100 kHz, this results in a 1280us timeout."] #[inline(always)] pub fn is_i2c1024pcc(&self) -> bool { - *self == CLTO_A::I2C1024PCC + *self == Clto::I2c1024pcc } } #[doc = "Field `CLTO` writer - Clock Low Timeout"] -pub type CLTO_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, CLTO_A, 3, O>; -impl<'a, const O: u8> CLTO_W<'a, O> { +pub type CltoW<'a, REG> = crate::FieldWriter<'a, REG, 3, Clto>; +impl<'a, REG> CltoW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Timeout disabled"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(CLTO_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Clto::Off) } #[doc = "Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."] #[inline(always)] - pub fn i2c40pcc(self) -> &'a mut W { - self.variant(CLTO_A::I2C40PCC) + pub fn i2c40pcc(self) -> &'a mut crate::W { + self.variant(Clto::I2c40pcc) } #[doc = "Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."] #[inline(always)] - pub fn i2c80pcc(self) -> &'a mut W { - self.variant(CLTO_A::I2C80PCC) + pub fn i2c80pcc(self) -> &'a mut crate::W { + self.variant(Clto::I2c80pcc) } #[doc = "Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."] #[inline(always)] - pub fn i2c160pcc(self) -> &'a mut W { - self.variant(CLTO_A::I2C160PCC) + pub fn i2c160pcc(self) -> &'a mut crate::W { + self.variant(Clto::I2c160pcc) } #[doc = "Timeout after 320 prescaled clock cycles. In standard mode at 100 kHz, this results in a 400us timeout."] #[inline(always)] - pub fn i2c320pcc(self) -> &'a mut W { - self.variant(CLTO_A::I2C320PCC) + pub fn i2c320pcc(self) -> &'a mut crate::W { + self.variant(Clto::I2c320pcc) } #[doc = "Timeout after 1024 prescaled clock cycles. In standard mode at 100 kHz, this results in a 1280us timeout."] #[inline(always)] - pub fn i2c1024pcc(self) -> &'a mut W { - self.variant(CLTO_A::I2C1024PCC) + pub fn i2c1024pcc(self) -> &'a mut crate::W { + self.variant(Clto::I2c1024pcc) } } -#[doc = "Field `SCLMONEN` reader - SCL Monitor Enable"] -pub type SCLMONEN_R = crate::BitReader; #[doc = "SCL Monitor Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SCLMONEN_A { +pub enum Sclmonen { #[doc = "0: Disable SCL monitor"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enable SCL monitor"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SCLMONEN_A) -> Self { + fn from(variant: Sclmonen) -> Self { variant as u8 != 0 } } -impl SCLMONEN_R { +#[doc = "Field `SCLMONEN` reader - SCL Monitor Enable"] +pub type SclmonenR = crate::BitReader; +impl SclmonenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SCLMONEN_A { + pub const fn variant(&self) -> Sclmonen { match self.bits { - false => SCLMONEN_A::DISABLE, - true => SCLMONEN_A::ENABLE, + false => Sclmonen::Disable, + true => Sclmonen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable SCL monitor"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == SCLMONEN_A::DISABLE + *self == Sclmonen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enable SCL monitor"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == SCLMONEN_A::ENABLE + *self == Sclmonen::Enable } } #[doc = "Field `SCLMONEN` writer - SCL Monitor Enable"] -pub type SCLMONEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, SCLMONEN_A, O>; -impl<'a, const O: u8> SCLMONEN_W<'a, O> { +pub type SclmonenW<'a, REG> = crate::BitWriter<'a, REG, Sclmonen>; +impl<'a, REG> SclmonenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable SCL monitor"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(SCLMONEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Sclmonen::Disable) } #[doc = "Enable SCL monitor"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(SCLMONEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Sclmonen::Enable) } } -#[doc = "Field `SDAMONEN` reader - SDA Monitor Enable"] -pub type SDAMONEN_R = crate::BitReader; #[doc = "SDA Monitor Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SDAMONEN_A { +pub enum Sdamonen { #[doc = "0: Disable SDA Monitor"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enable SDA Monitor"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SDAMONEN_A) -> Self { + fn from(variant: Sdamonen) -> Self { variant as u8 != 0 } } -impl SDAMONEN_R { +#[doc = "Field `SDAMONEN` reader - SDA Monitor Enable"] +pub type SdamonenR = crate::BitReader; +impl SdamonenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SDAMONEN_A { + pub const fn variant(&self) -> Sdamonen { match self.bits { - false => SDAMONEN_A::DISABLE, - true => SDAMONEN_A::ENABLE, + false => Sdamonen::Disable, + true => Sdamonen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable SDA Monitor"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == SDAMONEN_A::DISABLE + *self == Sdamonen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enable SDA Monitor"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == SDAMONEN_A::ENABLE + *self == Sdamonen::Enable } } #[doc = "Field `SDAMONEN` writer - SDA Monitor Enable"] -pub type SDAMONEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, SDAMONEN_A, O>; -impl<'a, const O: u8> SDAMONEN_W<'a, O> { +pub type SdamonenW<'a, REG> = crate::BitWriter<'a, REG, Sdamonen>; +impl<'a, REG> SdamonenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable SDA Monitor"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(SDAMONEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Sdamonen::Disable) } #[doc = "Enable SDA Monitor"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(SDAMONEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Sdamonen::Enable) } } impl R { #[doc = "Bit 0 - Soft Reset the internal state registers"] #[inline(always)] - pub fn corerst(&self) -> CORERST_R { - CORERST_R::new((self.bits & 1) != 0) + pub fn corerst(&self) -> CorerstR { + CorerstR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Addressable as Follower"] #[inline(always)] - pub fn slave(&self) -> SLAVE_R { - SLAVE_R::new(((self.bits >> 1) & 1) != 0) + pub fn slave(&self) -> SlaveR { + SlaveR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Automatic Acknowledge"] #[inline(always)] - pub fn autoack(&self) -> AUTOACK_R { - AUTOACK_R::new(((self.bits >> 2) & 1) != 0) + pub fn autoack(&self) -> AutoackR { + AutoackR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Automatic STOP when Empty"] #[inline(always)] - pub fn autose(&self) -> AUTOSE_R { - AUTOSE_R::new(((self.bits >> 3) & 1) != 0) + pub fn autose(&self) -> AutoseR { + AutoseR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Automatic STOP on NACK"] #[inline(always)] - pub fn autosn(&self) -> AUTOSN_R { - AUTOSN_R::new(((self.bits >> 4) & 1) != 0) + pub fn autosn(&self) -> AutosnR { + AutosnR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Arbitration Disable"] #[inline(always)] - pub fn arbdis(&self) -> ARBDIS_R { - ARBDIS_R::new(((self.bits >> 5) & 1) != 0) + pub fn arbdis(&self) -> ArbdisR { + ArbdisR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - General Call Address Match Enable"] #[inline(always)] - pub fn gcamen(&self) -> GCAMEN_R { - GCAMEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn gcamen(&self) -> GcamenR { + GcamenR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - TX Buffer Interrupt Level"] #[inline(always)] - pub fn txbil(&self) -> TXBIL_R { - TXBIL_R::new(((self.bits >> 7) & 1) != 0) + pub fn txbil(&self) -> TxbilR { + TxbilR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:9 - Clock Low High Ratio"] #[inline(always)] - pub fn clhr(&self) -> CLHR_R { - CLHR_R::new(((self.bits >> 8) & 3) as u8) + pub fn clhr(&self) -> ClhrR { + ClhrR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 12:13 - Bus Idle Timeout"] #[inline(always)] - pub fn bito(&self) -> BITO_R { - BITO_R::new(((self.bits >> 12) & 3) as u8) + pub fn bito(&self) -> BitoR { + BitoR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bit 15 - Go Idle on Bus Idle Timeout"] #[inline(always)] - pub fn gibito(&self) -> GIBITO_R { - GIBITO_R::new(((self.bits >> 15) & 1) != 0) + pub fn gibito(&self) -> GibitoR { + GibitoR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:18 - Clock Low Timeout"] #[inline(always)] - pub fn clto(&self) -> CLTO_R { - CLTO_R::new(((self.bits >> 16) & 7) as u8) + pub fn clto(&self) -> CltoR { + CltoR::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bit 20 - SCL Monitor Enable"] #[inline(always)] - pub fn sclmonen(&self) -> SCLMONEN_R { - SCLMONEN_R::new(((self.bits >> 20) & 1) != 0) + pub fn sclmonen(&self) -> SclmonenR { + SclmonenR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - SDA Monitor Enable"] #[inline(always)] - pub fn sdamonen(&self) -> SDAMONEN_R { - SDAMONEN_R::new(((self.bits >> 21) & 1) != 0) + pub fn sdamonen(&self) -> SdamonenR { + SdamonenR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bit 0 - Soft Reset the internal state registers"] #[inline(always)] #[must_use] - pub fn corerst(&mut self) -> CORERST_W<0> { - CORERST_W::new(self) + pub fn corerst(&mut self) -> CorerstW { + CorerstW::new(self, 0) } #[doc = "Bit 1 - Addressable as Follower"] #[inline(always)] #[must_use] - pub fn slave(&mut self) -> SLAVE_W<1> { - SLAVE_W::new(self) + pub fn slave(&mut self) -> SlaveW { + SlaveW::new(self, 1) } #[doc = "Bit 2 - Automatic Acknowledge"] #[inline(always)] #[must_use] - pub fn autoack(&mut self) -> AUTOACK_W<2> { - AUTOACK_W::new(self) + pub fn autoack(&mut self) -> AutoackW { + AutoackW::new(self, 2) } #[doc = "Bit 3 - Automatic STOP when Empty"] #[inline(always)] #[must_use] - pub fn autose(&mut self) -> AUTOSE_W<3> { - AUTOSE_W::new(self) + pub fn autose(&mut self) -> AutoseW { + AutoseW::new(self, 3) } #[doc = "Bit 4 - Automatic STOP on NACK"] #[inline(always)] #[must_use] - pub fn autosn(&mut self) -> AUTOSN_W<4> { - AUTOSN_W::new(self) + pub fn autosn(&mut self) -> AutosnW { + AutosnW::new(self, 4) } #[doc = "Bit 5 - Arbitration Disable"] #[inline(always)] #[must_use] - pub fn arbdis(&mut self) -> ARBDIS_W<5> { - ARBDIS_W::new(self) + pub fn arbdis(&mut self) -> ArbdisW { + ArbdisW::new(self, 5) } #[doc = "Bit 6 - General Call Address Match Enable"] #[inline(always)] #[must_use] - pub fn gcamen(&mut self) -> GCAMEN_W<6> { - GCAMEN_W::new(self) + pub fn gcamen(&mut self) -> GcamenW { + GcamenW::new(self, 6) } #[doc = "Bit 7 - TX Buffer Interrupt Level"] #[inline(always)] #[must_use] - pub fn txbil(&mut self) -> TXBIL_W<7> { - TXBIL_W::new(self) + pub fn txbil(&mut self) -> TxbilW { + TxbilW::new(self, 7) } #[doc = "Bits 8:9 - Clock Low High Ratio"] #[inline(always)] #[must_use] - pub fn clhr(&mut self) -> CLHR_W<8> { - CLHR_W::new(self) + pub fn clhr(&mut self) -> ClhrW { + ClhrW::new(self, 8) } #[doc = "Bits 12:13 - Bus Idle Timeout"] #[inline(always)] #[must_use] - pub fn bito(&mut self) -> BITO_W<12> { - BITO_W::new(self) + pub fn bito(&mut self) -> BitoW { + BitoW::new(self, 12) } #[doc = "Bit 15 - Go Idle on Bus Idle Timeout"] #[inline(always)] #[must_use] - pub fn gibito(&mut self) -> GIBITO_W<15> { - GIBITO_W::new(self) + pub fn gibito(&mut self) -> GibitoW { + GibitoW::new(self, 15) } #[doc = "Bits 16:18 - Clock Low Timeout"] #[inline(always)] #[must_use] - pub fn clto(&mut self) -> CLTO_W<16> { - CLTO_W::new(self) + pub fn clto(&mut self) -> CltoW { + CltoW::new(self, 16) } #[doc = "Bit 20 - SCL Monitor Enable"] #[inline(always)] #[must_use] - pub fn sclmonen(&mut self) -> SCLMONEN_W<20> { - SCLMONEN_W::new(self) + pub fn sclmonen(&mut self) -> SclmonenW { + SclmonenW::new(self, 20) } #[doc = "Bit 21 - SDA Monitor Enable"] #[inline(always)] #[must_use] - pub fn sdamonen(&mut self) -> SDAMONEN_W<21> { - SDAMONEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sdamonen(&mut self) -> SdamonenW { + SdamonenW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/en.rs index d1c66f9..ccee40a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/en.rs @@ -1,126 +1,89 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EN` reader - module enable"] -pub type EN_R = crate::BitReader; +pub type W = crate::W; #[doc = "module enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EN_A { +pub enum En { #[doc = "0: Disable Peripheral Clock"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enable Peripheral Clock"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EN_A) -> Self { + fn from(variant: En) -> Self { variant as u8 != 0 } } -impl EN_R { +#[doc = "Field `EN` reader - module enable"] +pub type EnR = crate::BitReader; +impl EnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EN_A { + pub const fn variant(&self) -> En { match self.bits { - false => EN_A::DISABLE, - true => EN_A::ENABLE, + false => En::Disable, + true => En::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable Peripheral Clock"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EN_A::DISABLE + *self == En::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enable Peripheral Clock"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EN_A::ENABLE + *self == En::Enable } } #[doc = "Field `EN` writer - module enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, EN_A, O>; -impl<'a, const O: u8> EN_W<'a, O> { +pub type EnW<'a, REG> = crate::BitWriter<'a, REG, En>; +impl<'a, REG> EnW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable Peripheral Clock"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(En::Disable) } #[doc = "Enable Peripheral Clock"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(En::Enable) } } impl R { #[doc = "Bit 0 - module enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - module enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/ien.rs index 7ec6b35..d68e6ae 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/ien.rs @@ -1,380 +1,340 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` reader - START condition Interrupt Flag"] -pub type START_R = crate::BitReader; +pub type StartR = crate::BitReader; #[doc = "Field `START` writer - START condition Interrupt Flag"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RSTART` reader - Repeated START condition Interrupt Flag"] -pub type RSTART_R = crate::BitReader; +pub type RstartR = crate::BitReader; #[doc = "Field `RSTART` writer - Repeated START condition Interrupt Flag"] -pub type RSTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RstartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ADDR` reader - Address Interrupt Flag"] -pub type ADDR_R = crate::BitReader; +pub type AddrR = crate::BitReader; #[doc = "Field `ADDR` writer - Address Interrupt Flag"] -pub type ADDR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AddrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXC` reader - Transfer Completed Interrupt Flag"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXC` writer - Transfer Completed Interrupt Flag"] -pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXBL` reader - Transmit Buffer Level Interrupt Flag"] -pub type TXBL_R = crate::BitReader; +pub type TxblR = crate::BitReader; #[doc = "Field `TXBL` writer - Transmit Buffer Level Interrupt Flag"] -pub type TXBL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxblW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXDATAV` reader - Receive Data Valid Interrupt Flag"] -pub type RXDATAV_R = crate::BitReader; +pub type RxdatavR = crate::BitReader; #[doc = "Field `RXDATAV` writer - Receive Data Valid Interrupt Flag"] -pub type RXDATAV_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxdatavW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACK` reader - Acknowledge Received Interrupt Flag"] -pub type ACK_R = crate::BitReader; +pub type AckR = crate::BitReader; #[doc = "Field `ACK` writer - Acknowledge Received Interrupt Flag"] -pub type ACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AckW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NACK` reader - Not Acknowledge Received Interrupt Flag"] -pub type NACK_R = crate::BitReader; +pub type NackR = crate::BitReader; #[doc = "Field `NACK` writer - Not Acknowledge Received Interrupt Flag"] -pub type NACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type NackW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MSTOP` reader - Leader STOP Condition Interrupt Flag"] -pub type MSTOP_R = crate::BitReader; +pub type MstopR = crate::BitReader; #[doc = "Field `MSTOP` writer - Leader STOP Condition Interrupt Flag"] -pub type MSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type MstopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ARBLOST` reader - Arbitration Lost Interrupt Flag"] -pub type ARBLOST_R = crate::BitReader; +pub type ArblostR = crate::BitReader; #[doc = "Field `ARBLOST` writer - Arbitration Lost Interrupt Flag"] -pub type ARBLOST_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ArblostW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSERR` reader - Bus Error Interrupt Flag"] -pub type BUSERR_R = crate::BitReader; +pub type BuserrR = crate::BitReader; #[doc = "Field `BUSERR` writer - Bus Error Interrupt Flag"] -pub type BUSERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type BuserrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSHOLD` reader - Bus Held Interrupt Flag"] -pub type BUSHOLD_R = crate::BitReader; +pub type BusholdR = crate::BitReader; #[doc = "Field `BUSHOLD` writer - Bus Held Interrupt Flag"] -pub type BUSHOLD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type BusholdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXOF` reader - Transmit Buffer Overflow Interrupt Flag"] -pub type TXOF_R = crate::BitReader; +pub type TxofR = crate::BitReader; #[doc = "Field `TXOF` writer - Transmit Buffer Overflow Interrupt Flag"] -pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUF` reader - Receive Buffer Underflow Interrupt Flag"] -pub type RXUF_R = crate::BitReader; +pub type RxufR = crate::BitReader; #[doc = "Field `RXUF` writer - Receive Buffer Underflow Interrupt Flag"] -pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BITO` reader - Bus Idle Timeout Interrupt Flag"] -pub type BITO_R = crate::BitReader; +pub type BitoR = crate::BitReader; #[doc = "Field `BITO` writer - Bus Idle Timeout Interrupt Flag"] -pub type BITO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type BitoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLTO` reader - Clock Low Timeout Interrupt Flag"] -pub type CLTO_R = crate::BitReader; +pub type CltoR = crate::BitReader; #[doc = "Field `CLTO` writer - Clock Low Timeout Interrupt Flag"] -pub type CLTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type CltoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SSTOP` reader - Follower STOP condition Interrupt Flag"] -pub type SSTOP_R = crate::BitReader; +pub type SstopR = crate::BitReader; #[doc = "Field `SSTOP` writer - Follower STOP condition Interrupt Flag"] -pub type SSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SstopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFULL` reader - Receive Buffer Full Interrupt Flag"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXFULL` writer - Receive Buffer Full Interrupt Flag"] -pub type RXFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxfullW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLERR` reader - Clock Low Error Interrupt Flag"] -pub type CLERR_R = crate::BitReader; +pub type ClerrR = crate::BitReader; #[doc = "Field `CLERR` writer - Clock Low Error Interrupt Flag"] -pub type CLERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ClerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCLERR` reader - SCL Error Interrupt Flag"] -pub type SCLERR_R = crate::BitReader; +pub type SclerrR = crate::BitReader; #[doc = "Field `SCLERR` writer - SCL Error Interrupt Flag"] -pub type SCLERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SclerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SDAERR` reader - SDA Error Interrupt Flag"] -pub type SDAERR_R = crate::BitReader; +pub type SdaerrR = crate::BitReader; #[doc = "Field `SDAERR` writer - SDA Error Interrupt Flag"] -pub type SDAERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SdaerrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - START condition Interrupt Flag"] #[inline(always)] - pub fn start(&self) -> START_R { - START_R::new((self.bits & 1) != 0) + pub fn start(&self) -> StartR { + StartR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Repeated START condition Interrupt Flag"] #[inline(always)] - pub fn rstart(&self) -> RSTART_R { - RSTART_R::new(((self.bits >> 1) & 1) != 0) + pub fn rstart(&self) -> RstartR { + RstartR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Address Interrupt Flag"] #[inline(always)] - pub fn addr(&self) -> ADDR_R { - ADDR_R::new(((self.bits >> 2) & 1) != 0) + pub fn addr(&self) -> AddrR { + AddrR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Transfer Completed Interrupt Flag"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new(((self.bits >> 3) & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Transmit Buffer Level Interrupt Flag"] #[inline(always)] - pub fn txbl(&self) -> TXBL_R { - TXBL_R::new(((self.bits >> 4) & 1) != 0) + pub fn txbl(&self) -> TxblR { + TxblR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Receive Data Valid Interrupt Flag"] #[inline(always)] - pub fn rxdatav(&self) -> RXDATAV_R { - RXDATAV_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxdatav(&self) -> RxdatavR { + RxdatavR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Acknowledge Received Interrupt Flag"] #[inline(always)] - pub fn ack(&self) -> ACK_R { - ACK_R::new(((self.bits >> 6) & 1) != 0) + pub fn ack(&self) -> AckR { + AckR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Not Acknowledge Received Interrupt Flag"] #[inline(always)] - pub fn nack(&self) -> NACK_R { - NACK_R::new(((self.bits >> 7) & 1) != 0) + pub fn nack(&self) -> NackR { + NackR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Leader STOP Condition Interrupt Flag"] #[inline(always)] - pub fn mstop(&self) -> MSTOP_R { - MSTOP_R::new(((self.bits >> 8) & 1) != 0) + pub fn mstop(&self) -> MstopR { + MstopR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Arbitration Lost Interrupt Flag"] #[inline(always)] - pub fn arblost(&self) -> ARBLOST_R { - ARBLOST_R::new(((self.bits >> 9) & 1) != 0) + pub fn arblost(&self) -> ArblostR { + ArblostR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Bus Error Interrupt Flag"] #[inline(always)] - pub fn buserr(&self) -> BUSERR_R { - BUSERR_R::new(((self.bits >> 10) & 1) != 0) + pub fn buserr(&self) -> BuserrR { + BuserrR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Bus Held Interrupt Flag"] #[inline(always)] - pub fn bushold(&self) -> BUSHOLD_R { - BUSHOLD_R::new(((self.bits >> 11) & 1) != 0) + pub fn bushold(&self) -> BusholdR { + BusholdR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Transmit Buffer Overflow Interrupt Flag"] #[inline(always)] - pub fn txof(&self) -> TXOF_R { - TXOF_R::new(((self.bits >> 12) & 1) != 0) + pub fn txof(&self) -> TxofR { + TxofR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Receive Buffer Underflow Interrupt Flag"] #[inline(always)] - pub fn rxuf(&self) -> RXUF_R { - RXUF_R::new(((self.bits >> 13) & 1) != 0) + pub fn rxuf(&self) -> RxufR { + RxufR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Bus Idle Timeout Interrupt Flag"] #[inline(always)] - pub fn bito(&self) -> BITO_R { - BITO_R::new(((self.bits >> 14) & 1) != 0) + pub fn bito(&self) -> BitoR { + BitoR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Clock Low Timeout Interrupt Flag"] #[inline(always)] - pub fn clto(&self) -> CLTO_R { - CLTO_R::new(((self.bits >> 15) & 1) != 0) + pub fn clto(&self) -> CltoR { + CltoR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Follower STOP condition Interrupt Flag"] #[inline(always)] - pub fn sstop(&self) -> SSTOP_R { - SSTOP_R::new(((self.bits >> 16) & 1) != 0) + pub fn sstop(&self) -> SstopR { + SstopR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Receive Buffer Full Interrupt Flag"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 17) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Clock Low Error Interrupt Flag"] #[inline(always)] - pub fn clerr(&self) -> CLERR_R { - CLERR_R::new(((self.bits >> 18) & 1) != 0) + pub fn clerr(&self) -> ClerrR { + ClerrR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - SCL Error Interrupt Flag"] #[inline(always)] - pub fn sclerr(&self) -> SCLERR_R { - SCLERR_R::new(((self.bits >> 19) & 1) != 0) + pub fn sclerr(&self) -> SclerrR { + SclerrR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - SDA Error Interrupt Flag"] #[inline(always)] - pub fn sdaerr(&self) -> SDAERR_R { - SDAERR_R::new(((self.bits >> 20) & 1) != 0) + pub fn sdaerr(&self) -> SdaerrR { + SdaerrR::new(((self.bits >> 20) & 1) != 0) } } impl W { #[doc = "Bit 0 - START condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Repeated START condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rstart(&mut self) -> RSTART_W<1> { - RSTART_W::new(self) + pub fn rstart(&mut self) -> RstartW { + RstartW::new(self, 1) } #[doc = "Bit 2 - Address Interrupt Flag"] #[inline(always)] #[must_use] - pub fn addr(&mut self) -> ADDR_W<2> { - ADDR_W::new(self) + pub fn addr(&mut self) -> AddrW { + AddrW::new(self, 2) } #[doc = "Bit 3 - Transfer Completed Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txc(&mut self) -> TXC_W<3> { - TXC_W::new(self) + pub fn txc(&mut self) -> TxcW { + TxcW::new(self, 3) } #[doc = "Bit 4 - Transmit Buffer Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txbl(&mut self) -> TXBL_W<4> { - TXBL_W::new(self) + pub fn txbl(&mut self) -> TxblW { + TxblW::new(self, 4) } #[doc = "Bit 5 - Receive Data Valid Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxdatav(&mut self) -> RXDATAV_W<5> { - RXDATAV_W::new(self) + pub fn rxdatav(&mut self) -> RxdatavW { + RxdatavW::new(self, 5) } #[doc = "Bit 6 - Acknowledge Received Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ack(&mut self) -> ACK_W<6> { - ACK_W::new(self) + pub fn ack(&mut self) -> AckW { + AckW::new(self, 6) } #[doc = "Bit 7 - Not Acknowledge Received Interrupt Flag"] #[inline(always)] #[must_use] - pub fn nack(&mut self) -> NACK_W<7> { - NACK_W::new(self) + pub fn nack(&mut self) -> NackW { + NackW::new(self, 7) } #[doc = "Bit 8 - Leader STOP Condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn mstop(&mut self) -> MSTOP_W<8> { - MSTOP_W::new(self) + pub fn mstop(&mut self) -> MstopW { + MstopW::new(self, 8) } #[doc = "Bit 9 - Arbitration Lost Interrupt Flag"] #[inline(always)] #[must_use] - pub fn arblost(&mut self) -> ARBLOST_W<9> { - ARBLOST_W::new(self) + pub fn arblost(&mut self) -> ArblostW { + ArblostW::new(self, 9) } #[doc = "Bit 10 - Bus Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn buserr(&mut self) -> BUSERR_W<10> { - BUSERR_W::new(self) + pub fn buserr(&mut self) -> BuserrW { + BuserrW::new(self, 10) } #[doc = "Bit 11 - Bus Held Interrupt Flag"] #[inline(always)] #[must_use] - pub fn bushold(&mut self) -> BUSHOLD_W<11> { - BUSHOLD_W::new(self) + pub fn bushold(&mut self) -> BusholdW { + BusholdW::new(self, 11) } #[doc = "Bit 12 - Transmit Buffer Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txof(&mut self) -> TXOF_W<12> { - TXOF_W::new(self) + pub fn txof(&mut self) -> TxofW { + TxofW::new(self, 12) } #[doc = "Bit 13 - Receive Buffer Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxuf(&mut self) -> RXUF_W<13> { - RXUF_W::new(self) + pub fn rxuf(&mut self) -> RxufW { + RxufW::new(self, 13) } #[doc = "Bit 14 - Bus Idle Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn bito(&mut self) -> BITO_W<14> { - BITO_W::new(self) + pub fn bito(&mut self) -> BitoW { + BitoW::new(self, 14) } #[doc = "Bit 15 - Clock Low Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn clto(&mut self) -> CLTO_W<15> { - CLTO_W::new(self) + pub fn clto(&mut self) -> CltoW { + CltoW::new(self, 15) } #[doc = "Bit 16 - Follower STOP condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sstop(&mut self) -> SSTOP_W<16> { - SSTOP_W::new(self) + pub fn sstop(&mut self) -> SstopW { + SstopW::new(self, 16) } #[doc = "Bit 17 - Receive Buffer Full Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxfull(&mut self) -> RXFULL_W<17> { - RXFULL_W::new(self) + pub fn rxfull(&mut self) -> RxfullW { + RxfullW::new(self, 17) } #[doc = "Bit 18 - Clock Low Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn clerr(&mut self) -> CLERR_W<18> { - CLERR_W::new(self) + pub fn clerr(&mut self) -> ClerrW { + ClerrW::new(self, 18) } #[doc = "Bit 19 - SCL Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sclerr(&mut self) -> SCLERR_W<19> { - SCLERR_W::new(self) + pub fn sclerr(&mut self) -> SclerrW { + SclerrW::new(self, 19) } #[doc = "Bit 20 - SDA Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sdaerr(&mut self) -> SDAERR_W<20> { - SDAERR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sdaerr(&mut self) -> SdaerrW { + SdaerrW::new(self, 20) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/if_.rs index e57ddea..5e8ea0d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/if_.rs @@ -1,380 +1,340 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` reader - START condition Interrupt Flag"] -pub type START_R = crate::BitReader; +pub type StartR = crate::BitReader; #[doc = "Field `START` writer - START condition Interrupt Flag"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RSTART` reader - Repeated START condition Interrupt Flag"] -pub type RSTART_R = crate::BitReader; +pub type RstartR = crate::BitReader; #[doc = "Field `RSTART` writer - Repeated START condition Interrupt Flag"] -pub type RSTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RstartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ADDR` reader - Address Interrupt Flag"] -pub type ADDR_R = crate::BitReader; +pub type AddrR = crate::BitReader; #[doc = "Field `ADDR` writer - Address Interrupt Flag"] -pub type ADDR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AddrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXC` reader - Transfer Completed Interrupt Flag"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXC` writer - Transfer Completed Interrupt Flag"] -pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXBL` reader - Transmit Buffer Level Interrupt Flag"] -pub type TXBL_R = crate::BitReader; +pub type TxblR = crate::BitReader; #[doc = "Field `TXBL` writer - Transmit Buffer Level Interrupt Flag"] -pub type TXBL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxblW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXDATAV` reader - Receive Data Valid Interrupt Flag"] -pub type RXDATAV_R = crate::BitReader; +pub type RxdatavR = crate::BitReader; #[doc = "Field `RXDATAV` writer - Receive Data Valid Interrupt Flag"] -pub type RXDATAV_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxdatavW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACK` reader - Acknowledge Received Interrupt Flag"] -pub type ACK_R = crate::BitReader; +pub type AckR = crate::BitReader; #[doc = "Field `ACK` writer - Acknowledge Received Interrupt Flag"] -pub type ACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AckW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NACK` reader - Not Acknowledge Received Interrupt Flag"] -pub type NACK_R = crate::BitReader; +pub type NackR = crate::BitReader; #[doc = "Field `NACK` writer - Not Acknowledge Received Interrupt Flag"] -pub type NACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type NackW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MSTOP` reader - Leader STOP Condition Interrupt Flag"] -pub type MSTOP_R = crate::BitReader; +pub type MstopR = crate::BitReader; #[doc = "Field `MSTOP` writer - Leader STOP Condition Interrupt Flag"] -pub type MSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type MstopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ARBLOST` reader - Arbitration Lost Interrupt Flag"] -pub type ARBLOST_R = crate::BitReader; +pub type ArblostR = crate::BitReader; #[doc = "Field `ARBLOST` writer - Arbitration Lost Interrupt Flag"] -pub type ARBLOST_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ArblostW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSERR` reader - Bus Error Interrupt Flag"] -pub type BUSERR_R = crate::BitReader; +pub type BuserrR = crate::BitReader; #[doc = "Field `BUSERR` writer - Bus Error Interrupt Flag"] -pub type BUSERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type BuserrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSHOLD` reader - Bus Held Interrupt Flag"] -pub type BUSHOLD_R = crate::BitReader; +pub type BusholdR = crate::BitReader; #[doc = "Field `BUSHOLD` writer - Bus Held Interrupt Flag"] -pub type BUSHOLD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type BusholdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXOF` reader - Transmit Buffer Overflow Interrupt Flag"] -pub type TXOF_R = crate::BitReader; +pub type TxofR = crate::BitReader; #[doc = "Field `TXOF` writer - Transmit Buffer Overflow Interrupt Flag"] -pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUF` reader - Receive Buffer Underflow Interrupt Flag"] -pub type RXUF_R = crate::BitReader; +pub type RxufR = crate::BitReader; #[doc = "Field `RXUF` writer - Receive Buffer Underflow Interrupt Flag"] -pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BITO` reader - Bus Idle Timeout Interrupt Flag"] -pub type BITO_R = crate::BitReader; +pub type BitoR = crate::BitReader; #[doc = "Field `BITO` writer - Bus Idle Timeout Interrupt Flag"] -pub type BITO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type BitoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLTO` reader - Clock Low Timeout Interrupt Flag"] -pub type CLTO_R = crate::BitReader; +pub type CltoR = crate::BitReader; #[doc = "Field `CLTO` writer - Clock Low Timeout Interrupt Flag"] -pub type CLTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type CltoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SSTOP` reader - Follower STOP condition Interrupt Flag"] -pub type SSTOP_R = crate::BitReader; +pub type SstopR = crate::BitReader; #[doc = "Field `SSTOP` writer - Follower STOP condition Interrupt Flag"] -pub type SSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SstopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFULL` reader - Receive Buffer Full Interrupt Flag"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXFULL` writer - Receive Buffer Full Interrupt Flag"] -pub type RXFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxfullW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLERR` reader - Clock Low Error Interrupt Flag"] -pub type CLERR_R = crate::BitReader; +pub type ClerrR = crate::BitReader; #[doc = "Field `CLERR` writer - Clock Low Error Interrupt Flag"] -pub type CLERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ClerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCLERR` reader - SCL Error Interrupt Flag"] -pub type SCLERR_R = crate::BitReader; +pub type SclerrR = crate::BitReader; #[doc = "Field `SCLERR` writer - SCL Error Interrupt Flag"] -pub type SCLERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SclerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SDAERR` reader - SDA Error Interrupt Flag"] -pub type SDAERR_R = crate::BitReader; +pub type SdaerrR = crate::BitReader; #[doc = "Field `SDAERR` writer - SDA Error Interrupt Flag"] -pub type SDAERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SdaerrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - START condition Interrupt Flag"] #[inline(always)] - pub fn start(&self) -> START_R { - START_R::new((self.bits & 1) != 0) + pub fn start(&self) -> StartR { + StartR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Repeated START condition Interrupt Flag"] #[inline(always)] - pub fn rstart(&self) -> RSTART_R { - RSTART_R::new(((self.bits >> 1) & 1) != 0) + pub fn rstart(&self) -> RstartR { + RstartR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Address Interrupt Flag"] #[inline(always)] - pub fn addr(&self) -> ADDR_R { - ADDR_R::new(((self.bits >> 2) & 1) != 0) + pub fn addr(&self) -> AddrR { + AddrR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Transfer Completed Interrupt Flag"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new(((self.bits >> 3) & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Transmit Buffer Level Interrupt Flag"] #[inline(always)] - pub fn txbl(&self) -> TXBL_R { - TXBL_R::new(((self.bits >> 4) & 1) != 0) + pub fn txbl(&self) -> TxblR { + TxblR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Receive Data Valid Interrupt Flag"] #[inline(always)] - pub fn rxdatav(&self) -> RXDATAV_R { - RXDATAV_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxdatav(&self) -> RxdatavR { + RxdatavR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Acknowledge Received Interrupt Flag"] #[inline(always)] - pub fn ack(&self) -> ACK_R { - ACK_R::new(((self.bits >> 6) & 1) != 0) + pub fn ack(&self) -> AckR { + AckR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Not Acknowledge Received Interrupt Flag"] #[inline(always)] - pub fn nack(&self) -> NACK_R { - NACK_R::new(((self.bits >> 7) & 1) != 0) + pub fn nack(&self) -> NackR { + NackR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Leader STOP Condition Interrupt Flag"] #[inline(always)] - pub fn mstop(&self) -> MSTOP_R { - MSTOP_R::new(((self.bits >> 8) & 1) != 0) + pub fn mstop(&self) -> MstopR { + MstopR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Arbitration Lost Interrupt Flag"] #[inline(always)] - pub fn arblost(&self) -> ARBLOST_R { - ARBLOST_R::new(((self.bits >> 9) & 1) != 0) + pub fn arblost(&self) -> ArblostR { + ArblostR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Bus Error Interrupt Flag"] #[inline(always)] - pub fn buserr(&self) -> BUSERR_R { - BUSERR_R::new(((self.bits >> 10) & 1) != 0) + pub fn buserr(&self) -> BuserrR { + BuserrR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Bus Held Interrupt Flag"] #[inline(always)] - pub fn bushold(&self) -> BUSHOLD_R { - BUSHOLD_R::new(((self.bits >> 11) & 1) != 0) + pub fn bushold(&self) -> BusholdR { + BusholdR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Transmit Buffer Overflow Interrupt Flag"] #[inline(always)] - pub fn txof(&self) -> TXOF_R { - TXOF_R::new(((self.bits >> 12) & 1) != 0) + pub fn txof(&self) -> TxofR { + TxofR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Receive Buffer Underflow Interrupt Flag"] #[inline(always)] - pub fn rxuf(&self) -> RXUF_R { - RXUF_R::new(((self.bits >> 13) & 1) != 0) + pub fn rxuf(&self) -> RxufR { + RxufR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Bus Idle Timeout Interrupt Flag"] #[inline(always)] - pub fn bito(&self) -> BITO_R { - BITO_R::new(((self.bits >> 14) & 1) != 0) + pub fn bito(&self) -> BitoR { + BitoR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Clock Low Timeout Interrupt Flag"] #[inline(always)] - pub fn clto(&self) -> CLTO_R { - CLTO_R::new(((self.bits >> 15) & 1) != 0) + pub fn clto(&self) -> CltoR { + CltoR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Follower STOP condition Interrupt Flag"] #[inline(always)] - pub fn sstop(&self) -> SSTOP_R { - SSTOP_R::new(((self.bits >> 16) & 1) != 0) + pub fn sstop(&self) -> SstopR { + SstopR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Receive Buffer Full Interrupt Flag"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 17) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Clock Low Error Interrupt Flag"] #[inline(always)] - pub fn clerr(&self) -> CLERR_R { - CLERR_R::new(((self.bits >> 18) & 1) != 0) + pub fn clerr(&self) -> ClerrR { + ClerrR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - SCL Error Interrupt Flag"] #[inline(always)] - pub fn sclerr(&self) -> SCLERR_R { - SCLERR_R::new(((self.bits >> 19) & 1) != 0) + pub fn sclerr(&self) -> SclerrR { + SclerrR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - SDA Error Interrupt Flag"] #[inline(always)] - pub fn sdaerr(&self) -> SDAERR_R { - SDAERR_R::new(((self.bits >> 20) & 1) != 0) + pub fn sdaerr(&self) -> SdaerrR { + SdaerrR::new(((self.bits >> 20) & 1) != 0) } } impl W { #[doc = "Bit 0 - START condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Repeated START condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rstart(&mut self) -> RSTART_W<1> { - RSTART_W::new(self) + pub fn rstart(&mut self) -> RstartW { + RstartW::new(self, 1) } #[doc = "Bit 2 - Address Interrupt Flag"] #[inline(always)] #[must_use] - pub fn addr(&mut self) -> ADDR_W<2> { - ADDR_W::new(self) + pub fn addr(&mut self) -> AddrW { + AddrW::new(self, 2) } #[doc = "Bit 3 - Transfer Completed Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txc(&mut self) -> TXC_W<3> { - TXC_W::new(self) + pub fn txc(&mut self) -> TxcW { + TxcW::new(self, 3) } #[doc = "Bit 4 - Transmit Buffer Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txbl(&mut self) -> TXBL_W<4> { - TXBL_W::new(self) + pub fn txbl(&mut self) -> TxblW { + TxblW::new(self, 4) } #[doc = "Bit 5 - Receive Data Valid Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxdatav(&mut self) -> RXDATAV_W<5> { - RXDATAV_W::new(self) + pub fn rxdatav(&mut self) -> RxdatavW { + RxdatavW::new(self, 5) } #[doc = "Bit 6 - Acknowledge Received Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ack(&mut self) -> ACK_W<6> { - ACK_W::new(self) + pub fn ack(&mut self) -> AckW { + AckW::new(self, 6) } #[doc = "Bit 7 - Not Acknowledge Received Interrupt Flag"] #[inline(always)] #[must_use] - pub fn nack(&mut self) -> NACK_W<7> { - NACK_W::new(self) + pub fn nack(&mut self) -> NackW { + NackW::new(self, 7) } #[doc = "Bit 8 - Leader STOP Condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn mstop(&mut self) -> MSTOP_W<8> { - MSTOP_W::new(self) + pub fn mstop(&mut self) -> MstopW { + MstopW::new(self, 8) } #[doc = "Bit 9 - Arbitration Lost Interrupt Flag"] #[inline(always)] #[must_use] - pub fn arblost(&mut self) -> ARBLOST_W<9> { - ARBLOST_W::new(self) + pub fn arblost(&mut self) -> ArblostW { + ArblostW::new(self, 9) } #[doc = "Bit 10 - Bus Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn buserr(&mut self) -> BUSERR_W<10> { - BUSERR_W::new(self) + pub fn buserr(&mut self) -> BuserrW { + BuserrW::new(self, 10) } #[doc = "Bit 11 - Bus Held Interrupt Flag"] #[inline(always)] #[must_use] - pub fn bushold(&mut self) -> BUSHOLD_W<11> { - BUSHOLD_W::new(self) + pub fn bushold(&mut self) -> BusholdW { + BusholdW::new(self, 11) } #[doc = "Bit 12 - Transmit Buffer Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txof(&mut self) -> TXOF_W<12> { - TXOF_W::new(self) + pub fn txof(&mut self) -> TxofW { + TxofW::new(self, 12) } #[doc = "Bit 13 - Receive Buffer Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxuf(&mut self) -> RXUF_W<13> { - RXUF_W::new(self) + pub fn rxuf(&mut self) -> RxufW { + RxufW::new(self, 13) } #[doc = "Bit 14 - Bus Idle Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn bito(&mut self) -> BITO_W<14> { - BITO_W::new(self) + pub fn bito(&mut self) -> BitoW { + BitoW::new(self, 14) } #[doc = "Bit 15 - Clock Low Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn clto(&mut self) -> CLTO_W<15> { - CLTO_W::new(self) + pub fn clto(&mut self) -> CltoW { + CltoW::new(self, 15) } #[doc = "Bit 16 - Follower STOP condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sstop(&mut self) -> SSTOP_W<16> { - SSTOP_W::new(self) + pub fn sstop(&mut self) -> SstopW { + SstopW::new(self, 16) } #[doc = "Bit 17 - Receive Buffer Full Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxfull(&mut self) -> RXFULL_W<17> { - RXFULL_W::new(self) + pub fn rxfull(&mut self) -> RxfullW { + RxfullW::new(self, 17) } #[doc = "Bit 18 - Clock Low Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn clerr(&mut self) -> CLERR_W<18> { - CLERR_W::new(self) + pub fn clerr(&mut self) -> ClerrW { + ClerrW::new(self, 18) } #[doc = "Bit 19 - SCL Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sclerr(&mut self) -> SCLERR_W<19> { - SCLERR_W::new(self) + pub fn sclerr(&mut self) -> SclerrW { + SclerrW::new(self, 19) } #[doc = "Bit 20 - SDA Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sdaerr(&mut self) -> SDAERR_W<20> { - SDAERR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sdaerr(&mut self) -> SdaerrW { + SdaerrW::new(self, 20) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/ipversion.rs index 78e00e2..b808ecb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/rxdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/rxdata.rs index 6197259..b8a3ba6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/rxdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/rxdata.rs @@ -1,37 +1,22 @@ #[doc = "Register `RXDATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATA` reader - RX Data"] -pub type RXDATA_R = crate::FieldReader; +pub type RxdataR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - RX Data"] #[inline(always)] - pub fn rxdata(&self) -> RXDATA_R { - RXDATA_R::new((self.bits & 0xff) as u8) + pub fn rxdata(&self) -> RxdataR { + RxdataR::new((self.bits & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdata](index.html) module"] -pub struct RXDATA_SPEC; -impl crate::RegisterSpec for RXDATA_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdata::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdataSpec; +impl crate::RegisterSpec for RxdataSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdata::R](R) reader structure"] -impl crate::Readable for RXDATA_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdata::R`](R) reader structure"] +impl crate::Readable for RxdataSpec {} #[doc = "`reset()` method sets RXDATA to value 0"] -impl crate::Resettable for RXDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/rxdatap.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/rxdatap.rs index f7c8c79..3debe5f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/rxdatap.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/rxdatap.rs @@ -1,37 +1,22 @@ #[doc = "Register `RXDATAP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATAP` reader - RX Data Peek"] -pub type RXDATAP_R = crate::FieldReader; +pub type RxdatapR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - RX Data Peek"] #[inline(always)] - pub fn rxdatap(&self) -> RXDATAP_R { - RXDATAP_R::new((self.bits & 0xff) as u8) + pub fn rxdatap(&self) -> RxdatapR { + RxdatapR::new((self.bits & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdatap](index.html) module"] -pub struct RXDATAP_SPEC; -impl crate::RegisterSpec for RXDATAP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdatap::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdatapSpec; +impl crate::RegisterSpec for RxdatapSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdatap::R](R) reader structure"] -impl crate::Readable for RXDATAP_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdatap::R`](R) reader structure"] +impl crate::Readable for RxdatapSpec {} #[doc = "`reset()` method sets RXDATAP to value 0"] -impl crate::Resettable for RXDATAP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdatapSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/rxdouble.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/rxdouble.rs index d739f89..dcc567b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/rxdouble.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/rxdouble.rs @@ -1,44 +1,29 @@ #[doc = "Register `RXDOUBLE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATA0` reader - RX Data 0"] -pub type RXDATA0_R = crate::FieldReader; +pub type Rxdata0R = crate::FieldReader; #[doc = "Field `RXDATA1` reader - RX Data 1"] -pub type RXDATA1_R = crate::FieldReader; +pub type Rxdata1R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - RX Data 0"] #[inline(always)] - pub fn rxdata0(&self) -> RXDATA0_R { - RXDATA0_R::new((self.bits & 0xff) as u8) + pub fn rxdata0(&self) -> Rxdata0R { + Rxdata0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - RX Data 1"] #[inline(always)] - pub fn rxdata1(&self) -> RXDATA1_R { - RXDATA1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn rxdata1(&self) -> Rxdata1R { + Rxdata1R::new(((self.bits >> 8) & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdouble](index.html) module"] -pub struct RXDOUBLE_SPEC; -impl crate::RegisterSpec for RXDOUBLE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdouble::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdoubleSpec; +impl crate::RegisterSpec for RxdoubleSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdouble::R](R) reader structure"] -impl crate::Readable for RXDOUBLE_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdouble::R`](R) reader structure"] +impl crate::Readable for RxdoubleSpec {} #[doc = "`reset()` method sets RXDOUBLE to value 0"] -impl crate::Resettable for RXDOUBLE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdoubleSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/rxdoublep.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/rxdoublep.rs index e20f7a0..de51da4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/rxdoublep.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/rxdoublep.rs @@ -1,44 +1,29 @@ #[doc = "Register `RXDOUBLEP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATAP0` reader - RX Data 0 Peek"] -pub type RXDATAP0_R = crate::FieldReader; +pub type Rxdatap0R = crate::FieldReader; #[doc = "Field `RXDATAP1` reader - RX Data 1 Peek"] -pub type RXDATAP1_R = crate::FieldReader; +pub type Rxdatap1R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - RX Data 0 Peek"] #[inline(always)] - pub fn rxdatap0(&self) -> RXDATAP0_R { - RXDATAP0_R::new((self.bits & 0xff) as u8) + pub fn rxdatap0(&self) -> Rxdatap0R { + Rxdatap0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - RX Data 1 Peek"] #[inline(always)] - pub fn rxdatap1(&self) -> RXDATAP1_R { - RXDATAP1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn rxdatap1(&self) -> Rxdatap1R { + Rxdatap1R::new(((self.bits >> 8) & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdoublep](index.html) module"] -pub struct RXDOUBLEP_SPEC; -impl crate::RegisterSpec for RXDOUBLEP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdoublep::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdoublepSpec; +impl crate::RegisterSpec for RxdoublepSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdoublep::R](R) reader structure"] -impl crate::Readable for RXDOUBLEP_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdoublep::R`](R) reader structure"] +impl crate::Readable for RxdoublepSpec {} #[doc = "`reset()` method sets RXDOUBLEP to value 0"] -impl crate::Resettable for RXDOUBLEP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdoublepSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/saddr.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/saddr.rs index c1201af..852c222 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/saddr.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/saddr.rs @@ -1,80 +1,40 @@ #[doc = "Register `SADDR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SADDR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ADDR` reader - Follower address"] -pub type ADDR_R = crate::FieldReader; +pub type AddrR = crate::FieldReader; #[doc = "Field `ADDR` writer - Follower address"] -pub type ADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SADDR_SPEC, u8, u8, 7, O>; +pub type AddrW<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { #[doc = "Bits 1:7 - Follower address"] #[inline(always)] - pub fn addr(&self) -> ADDR_R { - ADDR_R::new(((self.bits >> 1) & 0x7f) as u8) + pub fn addr(&self) -> AddrR { + AddrR::new(((self.bits >> 1) & 0x7f) as u8) } } impl W { #[doc = "Bits 1:7 - Follower address"] #[inline(always)] #[must_use] - pub fn addr(&mut self) -> ADDR_W<1> { - ADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn addr(&mut self) -> AddrW { + AddrW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [saddr](index.html) module"] -pub struct SADDR_SPEC; -impl crate::RegisterSpec for SADDR_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`saddr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`saddr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SaddrSpec; +impl crate::RegisterSpec for SaddrSpec { type Ux = u32; } -#[doc = "`read()` method returns [saddr::R](R) reader structure"] -impl crate::Readable for SADDR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [saddr::W](W) writer structure"] -impl crate::Writable for SADDR_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`saddr::R`](R) reader structure"] +impl crate::Readable for SaddrSpec {} +#[doc = "`write(|w| ..)` method takes [`saddr::W`](W) writer structure"] +impl crate::Writable for SaddrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SADDR to value 0"] -impl crate::Resettable for SADDR_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SaddrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/saddrmask.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/saddrmask.rs index 41bf4fc..8bd87ec 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/saddrmask.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/saddrmask.rs @@ -1,80 +1,40 @@ #[doc = "Register `SADDRMASK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SADDRMASK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SADDRMASK` reader - Follower Address Mask"] -pub type SADDRMASK_R = crate::FieldReader; +pub type SaddrmaskR = crate::FieldReader; #[doc = "Field `SADDRMASK` writer - Follower Address Mask"] -pub type SADDRMASK_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SADDRMASK_SPEC, u8, u8, 7, O>; +pub type SaddrmaskW<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { #[doc = "Bits 1:7 - Follower Address Mask"] #[inline(always)] - pub fn saddrmask(&self) -> SADDRMASK_R { - SADDRMASK_R::new(((self.bits >> 1) & 0x7f) as u8) + pub fn saddrmask(&self) -> SaddrmaskR { + SaddrmaskR::new(((self.bits >> 1) & 0x7f) as u8) } } impl W { #[doc = "Bits 1:7 - Follower Address Mask"] #[inline(always)] #[must_use] - pub fn saddrmask(&mut self) -> SADDRMASK_W<1> { - SADDRMASK_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn saddrmask(&mut self) -> SaddrmaskW { + SaddrmaskW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [saddrmask](index.html) module"] -pub struct SADDRMASK_SPEC; -impl crate::RegisterSpec for SADDRMASK_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`saddrmask::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`saddrmask::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SaddrmaskSpec; +impl crate::RegisterSpec for SaddrmaskSpec { type Ux = u32; } -#[doc = "`read()` method returns [saddrmask::R](R) reader structure"] -impl crate::Readable for SADDRMASK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [saddrmask::W](W) writer structure"] -impl crate::Writable for SADDRMASK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`saddrmask::R`](R) reader structure"] +impl crate::Readable for SaddrmaskSpec {} +#[doc = "`write(|w| ..)` method takes [`saddrmask::W`](W) writer structure"] +impl crate::Writable for SaddrmaskSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SADDRMASK to value 0"] -impl crate::Resettable for SADDRMASK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SaddrmaskSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/state.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/state.rs index 67cf43d..8727108 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/state.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/state.rs @@ -1,148 +1,137 @@ #[doc = "Register `STATE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `BUSY` reader - Bus Busy"] -pub type BUSY_R = crate::BitReader; +pub type BusyR = crate::BitReader; #[doc = "Field `MASTER` reader - Leader"] -pub type MASTER_R = crate::BitReader; +pub type MasterR = crate::BitReader; #[doc = "Field `TRANSMITTER` reader - Transmitter"] -pub type TRANSMITTER_R = crate::BitReader; +pub type TransmitterR = crate::BitReader; #[doc = "Field `NACKED` reader - Nack Received"] -pub type NACKED_R = crate::BitReader; +pub type NackedR = crate::BitReader; #[doc = "Field `BUSHOLD` reader - Bus Held"] -pub type BUSHOLD_R = crate::BitReader; -#[doc = "Field `STATE` reader - Transmission State"] -pub type STATE_R = crate::FieldReader; +pub type BusholdR = crate::BitReader; #[doc = "Transmission State\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STATE_A { +pub enum State { #[doc = "0: No transmission is being performed."] - IDLE = 0, + Idle = 0, #[doc = "1: Waiting for idle. Will send a start condition as soon as the bus is idle."] - WAIT = 1, + Wait = 1, #[doc = "2: Start transmit phase"] - START = 2, + Start = 2, #[doc = "3: Address transmit or receive phase"] - ADDR = 3, + Addr = 3, #[doc = "4: Address ack/nack transmit or receive phase"] - ADDRACK = 4, + Addrack = 4, #[doc = "5: Data transmit or receive phase"] - DATA = 5, + Data = 5, #[doc = "6: Data ack/nack transmit or receive phase"] - DATAACK = 6, + Dataack = 6, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STATE_A) -> Self { + fn from(variant: State) -> Self { variant as _ } } -impl STATE_R { +impl crate::FieldSpec for State { + type Ux = u8; +} +impl crate::IsEnum for State {} +#[doc = "Field `STATE` reader - Transmission State"] +pub type StateR = crate::FieldReader; +impl StateR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(STATE_A::IDLE), - 1 => Some(STATE_A::WAIT), - 2 => Some(STATE_A::START), - 3 => Some(STATE_A::ADDR), - 4 => Some(STATE_A::ADDRACK), - 5 => Some(STATE_A::DATA), - 6 => Some(STATE_A::DATAACK), + 0 => Some(State::Idle), + 1 => Some(State::Wait), + 2 => Some(State::Start), + 3 => Some(State::Addr), + 4 => Some(State::Addrack), + 5 => Some(State::Data), + 6 => Some(State::Dataack), _ => None, } } - #[doc = "Checks if the value of the field is `IDLE`"] + #[doc = "No transmission is being performed."] #[inline(always)] pub fn is_idle(&self) -> bool { - *self == STATE_A::IDLE + *self == State::Idle } - #[doc = "Checks if the value of the field is `WAIT`"] + #[doc = "Waiting for idle. Will send a start condition as soon as the bus is idle."] #[inline(always)] pub fn is_wait(&self) -> bool { - *self == STATE_A::WAIT + *self == State::Wait } - #[doc = "Checks if the value of the field is `START`"] + #[doc = "Start transmit phase"] #[inline(always)] pub fn is_start(&self) -> bool { - *self == STATE_A::START + *self == State::Start } - #[doc = "Checks if the value of the field is `ADDR`"] + #[doc = "Address transmit or receive phase"] #[inline(always)] pub fn is_addr(&self) -> bool { - *self == STATE_A::ADDR + *self == State::Addr } - #[doc = "Checks if the value of the field is `ADDRACK`"] + #[doc = "Address ack/nack transmit or receive phase"] #[inline(always)] pub fn is_addrack(&self) -> bool { - *self == STATE_A::ADDRACK + *self == State::Addrack } - #[doc = "Checks if the value of the field is `DATA`"] + #[doc = "Data transmit or receive phase"] #[inline(always)] pub fn is_data(&self) -> bool { - *self == STATE_A::DATA + *self == State::Data } - #[doc = "Checks if the value of the field is `DATAACK`"] + #[doc = "Data ack/nack transmit or receive phase"] #[inline(always)] pub fn is_dataack(&self) -> bool { - *self == STATE_A::DATAACK + *self == State::Dataack } } impl R { #[doc = "Bit 0 - Bus Busy"] #[inline(always)] - pub fn busy(&self) -> BUSY_R { - BUSY_R::new((self.bits & 1) != 0) + pub fn busy(&self) -> BusyR { + BusyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Leader"] #[inline(always)] - pub fn master(&self) -> MASTER_R { - MASTER_R::new(((self.bits >> 1) & 1) != 0) + pub fn master(&self) -> MasterR { + MasterR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Transmitter"] #[inline(always)] - pub fn transmitter(&self) -> TRANSMITTER_R { - TRANSMITTER_R::new(((self.bits >> 2) & 1) != 0) + pub fn transmitter(&self) -> TransmitterR { + TransmitterR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Nack Received"] #[inline(always)] - pub fn nacked(&self) -> NACKED_R { - NACKED_R::new(((self.bits >> 3) & 1) != 0) + pub fn nacked(&self) -> NackedR { + NackedR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Bus Held"] #[inline(always)] - pub fn bushold(&self) -> BUSHOLD_R { - BUSHOLD_R::new(((self.bits >> 4) & 1) != 0) + pub fn bushold(&self) -> BusholdR { + BusholdR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 5:7 - Transmission State"] #[inline(always)] - pub fn state(&self) -> STATE_R { - STATE_R::new(((self.bits >> 5) & 7) as u8) + pub fn state(&self) -> StateR { + StateR::new(((self.bits >> 5) & 7) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [state](index.html) module"] -pub struct STATE_SPEC; -impl crate::RegisterSpec for STATE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`state::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StateSpec; +impl crate::RegisterSpec for StateSpec { type Ux = u32; } -#[doc = "`read()` method returns [state::R](R) reader structure"] -impl crate::Readable for STATE_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`state::R`](R) reader structure"] +impl crate::Readable for StateSpec {} #[doc = "`reset()` method sets STATE to value 0x01"] -impl crate::Resettable for STATE_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for StateSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/status.rs index 1688cd6..8f60c29 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/status.rs @@ -1,107 +1,92 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `PSTART` reader - Pending START"] -pub type PSTART_R = crate::BitReader; +pub type PstartR = crate::BitReader; #[doc = "Field `PSTOP` reader - Pending STOP"] -pub type PSTOP_R = crate::BitReader; +pub type PstopR = crate::BitReader; #[doc = "Field `PACK` reader - Pending ACK"] -pub type PACK_R = crate::BitReader; +pub type PackR = crate::BitReader; #[doc = "Field `PNACK` reader - Pending NACK"] -pub type PNACK_R = crate::BitReader; +pub type PnackR = crate::BitReader; #[doc = "Field `PCONT` reader - Pending continue"] -pub type PCONT_R = crate::BitReader; +pub type PcontR = crate::BitReader; #[doc = "Field `PABORT` reader - Pending abort"] -pub type PABORT_R = crate::BitReader; +pub type PabortR = crate::BitReader; #[doc = "Field `TXC` reader - TX Complete"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXBL` reader - TX Buffer Level"] -pub type TXBL_R = crate::BitReader; +pub type TxblR = crate::BitReader; #[doc = "Field `RXDATAV` reader - RX Data Valid"] -pub type RXDATAV_R = crate::BitReader; +pub type RxdatavR = crate::BitReader; #[doc = "Field `RXFULL` reader - RX FIFO Full"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `TXBUFCNT` reader - TX Buffer Count"] -pub type TXBUFCNT_R = crate::FieldReader; +pub type TxbufcntR = crate::FieldReader; impl R { #[doc = "Bit 0 - Pending START"] #[inline(always)] - pub fn pstart(&self) -> PSTART_R { - PSTART_R::new((self.bits & 1) != 0) + pub fn pstart(&self) -> PstartR { + PstartR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Pending STOP"] #[inline(always)] - pub fn pstop(&self) -> PSTOP_R { - PSTOP_R::new(((self.bits >> 1) & 1) != 0) + pub fn pstop(&self) -> PstopR { + PstopR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Pending ACK"] #[inline(always)] - pub fn pack(&self) -> PACK_R { - PACK_R::new(((self.bits >> 2) & 1) != 0) + pub fn pack(&self) -> PackR { + PackR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Pending NACK"] #[inline(always)] - pub fn pnack(&self) -> PNACK_R { - PNACK_R::new(((self.bits >> 3) & 1) != 0) + pub fn pnack(&self) -> PnackR { + PnackR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Pending continue"] #[inline(always)] - pub fn pcont(&self) -> PCONT_R { - PCONT_R::new(((self.bits >> 4) & 1) != 0) + pub fn pcont(&self) -> PcontR { + PcontR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Pending abort"] #[inline(always)] - pub fn pabort(&self) -> PABORT_R { - PABORT_R::new(((self.bits >> 5) & 1) != 0) + pub fn pabort(&self) -> PabortR { + PabortR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX Complete"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new(((self.bits >> 6) & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - TX Buffer Level"] #[inline(always)] - pub fn txbl(&self) -> TXBL_R { - TXBL_R::new(((self.bits >> 7) & 1) != 0) + pub fn txbl(&self) -> TxblR { + TxblR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - RX Data Valid"] #[inline(always)] - pub fn rxdatav(&self) -> RXDATAV_R { - RXDATAV_R::new(((self.bits >> 8) & 1) != 0) + pub fn rxdatav(&self) -> RxdatavR { + RxdatavR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - RX FIFO Full"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 9) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bits 10:11 - TX Buffer Count"] #[inline(always)] - pub fn txbufcnt(&self) -> TXBUFCNT_R { - TXBUFCNT_R::new(((self.bits >> 10) & 3) as u8) + pub fn txbufcnt(&self) -> TxbufcntR { + TxbufcntR::new(((self.bits >> 10) & 3) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0x80"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0x80; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0x80; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/txdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/txdata.rs index e3980b6..61643d3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/txdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/txdata.rs @@ -1,52 +1,27 @@ #[doc = "Register `TXDATA` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXDATA` writer - TX Data"] -pub type TXDATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDATA_SPEC, u8, u8, 8, O>; +pub type TxdataW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - TX Data"] #[inline(always)] #[must_use] - pub fn txdata(&mut self) -> TXDATA_W<0> { - TXDATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txdata(&mut self) -> TxdataW { + TxdataW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdata](index.html) module"] -pub struct TXDATA_SPEC; -impl crate::RegisterSpec for TXDATA_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdata::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxdataSpec; +impl crate::RegisterSpec for TxdataSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [txdata::W](W) writer structure"] -impl crate::Writable for TXDATA_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`txdata::W`](W) writer structure"] +impl crate::Writable for TxdataSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXDATA to value 0"] -impl crate::Resettable for TXDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/txdouble.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/txdouble.rs index 320dad9..9cb5990 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/txdouble.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_ns/txdouble.rs @@ -1,60 +1,35 @@ #[doc = "Register `TXDOUBLE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXDATA0` writer - TX Data"] -pub type TXDATA0_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDOUBLE_SPEC, u8, u8, 8, O>; +pub type Txdata0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `TXDATA1` writer - TX Data"] -pub type TXDATA1_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDOUBLE_SPEC, u8, u8, 8, O>; +pub type Txdata1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - TX Data"] #[inline(always)] #[must_use] - pub fn txdata0(&mut self) -> TXDATA0_W<0> { - TXDATA0_W::new(self) + pub fn txdata0(&mut self) -> Txdata0W { + Txdata0W::new(self, 0) } #[doc = "Bits 8:15 - TX Data"] #[inline(always)] #[must_use] - pub fn txdata1(&mut self) -> TXDATA1_W<8> { - TXDATA1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txdata1(&mut self) -> Txdata1W { + Txdata1W::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdouble](index.html) module"] -pub struct TXDOUBLE_SPEC; -impl crate::RegisterSpec for TXDOUBLE_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdouble::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxdoubleSpec; +impl crate::RegisterSpec for TxdoubleSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [txdouble::W](W) writer structure"] -impl crate::Writable for TXDOUBLE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`txdouble::W`](W) writer structure"] +impl crate::Writable for TxdoubleSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXDOUBLE to value 0"] -impl crate::Resettable for TXDOUBLE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxdoubleSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s.rs index 0538763..94a4ce5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s.rs @@ -1,106 +1,210 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + ctrl: Ctrl, + cmd: Cmd, + state: State, + status: Status, + clkdiv: Clkdiv, + saddr: Saddr, + saddrmask: Saddrmask, + rxdata: Rxdata, + rxdouble: Rxdouble, + rxdatap: Rxdatap, + rxdoublep: Rxdoublep, + txdata: Txdata, + txdouble: Txdouble, + if_: If, + ien: Ien, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x0c - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x10 - No Description"] - pub state: STATE, + #[inline(always)] + pub const fn state(&self) -> &State { + &self.state + } #[doc = "0x14 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x18 - No Description"] - pub clkdiv: CLKDIV, + #[inline(always)] + pub const fn clkdiv(&self) -> &Clkdiv { + &self.clkdiv + } #[doc = "0x1c - No Description"] - pub saddr: SADDR, + #[inline(always)] + pub const fn saddr(&self) -> &Saddr { + &self.saddr + } #[doc = "0x20 - No Description"] - pub saddrmask: SADDRMASK, + #[inline(always)] + pub const fn saddrmask(&self) -> &Saddrmask { + &self.saddrmask + } #[doc = "0x24 - No Description"] - pub rxdata: RXDATA, + #[inline(always)] + pub const fn rxdata(&self) -> &Rxdata { + &self.rxdata + } #[doc = "0x28 - No Description"] - pub rxdouble: RXDOUBLE, + #[inline(always)] + pub const fn rxdouble(&self) -> &Rxdouble { + &self.rxdouble + } #[doc = "0x2c - No Description"] - pub rxdatap: RXDATAP, + #[inline(always)] + pub const fn rxdatap(&self) -> &Rxdatap { + &self.rxdatap + } #[doc = "0x30 - No Description"] - pub rxdoublep: RXDOUBLEP, + #[inline(always)] + pub const fn rxdoublep(&self) -> &Rxdoublep { + &self.rxdoublep + } #[doc = "0x34 - No Description"] - pub txdata: TXDATA, + #[inline(always)] + pub const fn txdata(&self) -> &Txdata { + &self.txdata + } #[doc = "0x38 - No Description"] - pub txdouble: TXDOUBLE, + #[inline(always)] + pub const fn txdouble(&self) -> &Txdouble { + &self.txdouble + } #[doc = "0x3c - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x40 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATE (r) register accessor: an alias for `Reg`"] -pub type STATE = crate::Reg; +#[doc = "STATE (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`state::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@state`] +module"] +#[doc(alias = "STATE")] +pub type State = crate::Reg; #[doc = "No Description"] pub mod state; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "CLKDIV (rw) register accessor: an alias for `Reg`"] -pub type CLKDIV = crate::Reg; +#[doc = "CLKDIV (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv`] +module"] +#[doc(alias = "CLKDIV")] +pub type Clkdiv = crate::Reg; #[doc = "No Description"] pub mod clkdiv; -#[doc = "SADDR (rw) register accessor: an alias for `Reg`"] -pub type SADDR = crate::Reg; +#[doc = "SADDR (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`saddr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`saddr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@saddr`] +module"] +#[doc(alias = "SADDR")] +pub type Saddr = crate::Reg; #[doc = "No Description"] pub mod saddr; -#[doc = "SADDRMASK (rw) register accessor: an alias for `Reg`"] -pub type SADDRMASK = crate::Reg; +#[doc = "SADDRMASK (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`saddrmask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`saddrmask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@saddrmask`] +module"] +#[doc(alias = "SADDRMASK")] +pub type Saddrmask = crate::Reg; #[doc = "No Description"] pub mod saddrmask; -#[doc = "RXDATA (r) register accessor: an alias for `Reg`"] -pub type RXDATA = crate::Reg; +#[doc = "RXDATA (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdata::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdata`] +module"] +#[doc(alias = "RXDATA")] +pub type Rxdata = crate::Reg; #[doc = "No Description"] pub mod rxdata; -#[doc = "RXDOUBLE (r) register accessor: an alias for `Reg`"] -pub type RXDOUBLE = crate::Reg; +#[doc = "RXDOUBLE (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdouble::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdouble`] +module"] +#[doc(alias = "RXDOUBLE")] +pub type Rxdouble = crate::Reg; #[doc = "No Description"] pub mod rxdouble; -#[doc = "RXDATAP (r) register accessor: an alias for `Reg`"] -pub type RXDATAP = crate::Reg; +#[doc = "RXDATAP (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdatap::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdatap`] +module"] +#[doc(alias = "RXDATAP")] +pub type Rxdatap = crate::Reg; #[doc = "No Description"] pub mod rxdatap; -#[doc = "RXDOUBLEP (r) register accessor: an alias for `Reg`"] -pub type RXDOUBLEP = crate::Reg; +#[doc = "RXDOUBLEP (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdoublep::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdoublep`] +module"] +#[doc(alias = "RXDOUBLEP")] +pub type Rxdoublep = crate::Reg; #[doc = "No Description"] pub mod rxdoublep; -#[doc = "TXDATA (w) register accessor: an alias for `Reg`"] -pub type TXDATA = crate::Reg; +#[doc = "TXDATA (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdata::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txdata`] +module"] +#[doc(alias = "TXDATA")] +pub type Txdata = crate::Reg; #[doc = "No Description"] pub mod txdata; -#[doc = "TXDOUBLE (w) register accessor: an alias for `Reg`"] -pub type TXDOUBLE = crate::Reg; +#[doc = "TXDOUBLE (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdouble::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txdouble`] +module"] +#[doc(alias = "TXDOUBLE")] +pub type Txdouble = crate::Reg; #[doc = "No Description"] pub mod txdouble; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/clkdiv.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/clkdiv.rs index 90aa445..7b64d88 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/clkdiv.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/clkdiv.rs @@ -1,80 +1,40 @@ #[doc = "Register `CLKDIV` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKDIV` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DIV` reader - Clock Divider"] -pub type DIV_R = crate::FieldReader; +pub type DivR = crate::FieldReader; #[doc = "Field `DIV` writer - Clock Divider"] -pub type DIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CLKDIV_SPEC, u16, u16, 9, O>; +pub type DivW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; impl R { #[doc = "Bits 0:8 - Clock Divider"] #[inline(always)] - pub fn div(&self) -> DIV_R { - DIV_R::new((self.bits & 0x01ff) as u16) + pub fn div(&self) -> DivR { + DivR::new((self.bits & 0x01ff) as u16) } } impl W { #[doc = "Bits 0:8 - Clock Divider"] #[inline(always)] #[must_use] - pub fn div(&mut self) -> DIV_W<0> { - DIV_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn div(&mut self) -> DivW { + DivW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clkdiv](index.html) module"] -pub struct CLKDIV_SPEC; -impl crate::RegisterSpec for CLKDIV_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ClkdivSpec; +impl crate::RegisterSpec for ClkdivSpec { type Ux = u32; } -#[doc = "`read()` method returns [clkdiv::R](R) reader structure"] -impl crate::Readable for CLKDIV_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clkdiv::W](W) writer structure"] -impl crate::Writable for CLKDIV_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`clkdiv::R`](R) reader structure"] +impl crate::Readable for ClkdivSpec {} +#[doc = "`write(|w| ..)` method takes [`clkdiv::W`](W) writer structure"] +impl crate::Writable for ClkdivSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV to value 0"] -impl crate::Resettable for CLKDIV_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ClkdivSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/cmd.rs index 57a4f73..d935390 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/cmd.rs @@ -1,108 +1,83 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` writer - Send start condition"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STOP` writer - Send stop condition"] -pub type STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACK` writer - Send ACK"] -pub type ACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type AckW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NACK` writer - Send NACK"] -pub type NACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type NackW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CONT` writer - Continue transmission"] -pub type CONT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type ContW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ABORT` writer - Abort transmission"] -pub type ABORT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type AbortW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEARTX` writer - Clear TX"] -pub type CLEARTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type CleartxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEARPC` writer - Clear Pending Commands"] -pub type CLEARPC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type ClearpcW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Send start condition"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Send stop condition"] #[inline(always)] #[must_use] - pub fn stop(&mut self) -> STOP_W<1> { - STOP_W::new(self) + pub fn stop(&mut self) -> StopW { + StopW::new(self, 1) } #[doc = "Bit 2 - Send ACK"] #[inline(always)] #[must_use] - pub fn ack(&mut self) -> ACK_W<2> { - ACK_W::new(self) + pub fn ack(&mut self) -> AckW { + AckW::new(self, 2) } #[doc = "Bit 3 - Send NACK"] #[inline(always)] #[must_use] - pub fn nack(&mut self) -> NACK_W<3> { - NACK_W::new(self) + pub fn nack(&mut self) -> NackW { + NackW::new(self, 3) } #[doc = "Bit 4 - Continue transmission"] #[inline(always)] #[must_use] - pub fn cont(&mut self) -> CONT_W<4> { - CONT_W::new(self) + pub fn cont(&mut self) -> ContW { + ContW::new(self, 4) } #[doc = "Bit 5 - Abort transmission"] #[inline(always)] #[must_use] - pub fn abort(&mut self) -> ABORT_W<5> { - ABORT_W::new(self) + pub fn abort(&mut self) -> AbortW { + AbortW::new(self, 5) } #[doc = "Bit 6 - Clear TX"] #[inline(always)] #[must_use] - pub fn cleartx(&mut self) -> CLEARTX_W<6> { - CLEARTX_W::new(self) + pub fn cleartx(&mut self) -> CleartxW { + CleartxW::new(self, 6) } #[doc = "Bit 7 - Clear Pending Commands"] #[inline(always)] #[must_use] - pub fn clearpc(&mut self) -> CLEARPC_W<7> { - CLEARPC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clearpc(&mut self) -> ClearpcW { + ClearpcW::new(self, 7) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/ctrl.rs index b334eef..8e17ecb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/ctrl.rs @@ -1,1016 +1,1033 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CORERST` reader - Soft Reset the internal state registers"] -pub type CORERST_R = crate::BitReader; +pub type W = crate::W; #[doc = "Soft Reset the internal state registers\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CORERST_A { +pub enum Corerst { #[doc = "0: No change to internal state registers"] - DISABLE = 0, + Disable = 0, #[doc = "1: Reset the internal state registers"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CORERST_A) -> Self { + fn from(variant: Corerst) -> Self { variant as u8 != 0 } } -impl CORERST_R { +#[doc = "Field `CORERST` reader - Soft Reset the internal state registers"] +pub type CorerstR = crate::BitReader; +impl CorerstR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CORERST_A { + pub const fn variant(&self) -> Corerst { match self.bits { - false => CORERST_A::DISABLE, - true => CORERST_A::ENABLE, + false => Corerst::Disable, + true => Corerst::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "No change to internal state registers"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CORERST_A::DISABLE + *self == Corerst::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Reset the internal state registers"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CORERST_A::ENABLE + *self == Corerst::Enable } } #[doc = "Field `CORERST` writer - Soft Reset the internal state registers"] -pub type CORERST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, CORERST_A, O>; -impl<'a, const O: u8> CORERST_W<'a, O> { +pub type CorerstW<'a, REG> = crate::BitWriter<'a, REG, Corerst>; +impl<'a, REG> CorerstW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No change to internal state registers"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CORERST_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Corerst::Disable) } #[doc = "Reset the internal state registers"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CORERST_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Corerst::Enable) } } -#[doc = "Field `SLAVE` reader - Addressable as Follower"] -pub type SLAVE_R = crate::BitReader; #[doc = "Addressable as Follower\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SLAVE_A { +pub enum Slave { #[doc = "0: All addresses will be responded to with a NACK"] - DISABLE = 0, + Disable = 0, #[doc = "1: Addresses matching the programmed follower address or the general call address (if enabled) require a response from software. Other addresses are automatically responded to with a NACK."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SLAVE_A) -> Self { + fn from(variant: Slave) -> Self { variant as u8 != 0 } } -impl SLAVE_R { +#[doc = "Field `SLAVE` reader - Addressable as Follower"] +pub type SlaveR = crate::BitReader; +impl SlaveR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SLAVE_A { + pub const fn variant(&self) -> Slave { match self.bits { - false => SLAVE_A::DISABLE, - true => SLAVE_A::ENABLE, + false => Slave::Disable, + true => Slave::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "All addresses will be responded to with a NACK"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == SLAVE_A::DISABLE + *self == Slave::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Addresses matching the programmed follower address or the general call address (if enabled) require a response from software. Other addresses are automatically responded to with a NACK."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == SLAVE_A::ENABLE + *self == Slave::Enable } } #[doc = "Field `SLAVE` writer - Addressable as Follower"] -pub type SLAVE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, SLAVE_A, O>; -impl<'a, const O: u8> SLAVE_W<'a, O> { +pub type SlaveW<'a, REG> = crate::BitWriter<'a, REG, Slave>; +impl<'a, REG> SlaveW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "All addresses will be responded to with a NACK"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(SLAVE_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Slave::Disable) } #[doc = "Addresses matching the programmed follower address or the general call address (if enabled) require a response from software. Other addresses are automatically responded to with a NACK."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(SLAVE_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Slave::Enable) } } -#[doc = "Field `AUTOACK` reader - Automatic Acknowledge"] -pub type AUTOACK_R = crate::BitReader; #[doc = "Automatic Acknowledge\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AUTOACK_A { +pub enum Autoack { #[doc = "0: Software must give one ACK command for each ACK transmitted on the I2C bus."] - DISABLE = 0, + Disable = 0, #[doc = "1: Addresses that are not automatically NACK'ed, and all data is automatically acknowledged."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AUTOACK_A) -> Self { + fn from(variant: Autoack) -> Self { variant as u8 != 0 } } -impl AUTOACK_R { +#[doc = "Field `AUTOACK` reader - Automatic Acknowledge"] +pub type AutoackR = crate::BitReader; +impl AutoackR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> AUTOACK_A { + pub const fn variant(&self) -> Autoack { match self.bits { - false => AUTOACK_A::DISABLE, - true => AUTOACK_A::ENABLE, + false => Autoack::Disable, + true => Autoack::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Software must give one ACK command for each ACK transmitted on the I2C bus."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == AUTOACK_A::DISABLE + *self == Autoack::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Addresses that are not automatically NACK'ed, and all data is automatically acknowledged."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == AUTOACK_A::ENABLE + *self == Autoack::Enable } } #[doc = "Field `AUTOACK` writer - Automatic Acknowledge"] -pub type AUTOACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, AUTOACK_A, O>; -impl<'a, const O: u8> AUTOACK_W<'a, O> { +pub type AutoackW<'a, REG> = crate::BitWriter<'a, REG, Autoack>; +impl<'a, REG> AutoackW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Software must give one ACK command for each ACK transmitted on the I2C bus."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(AUTOACK_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Autoack::Disable) } #[doc = "Addresses that are not automatically NACK'ed, and all data is automatically acknowledged."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(AUTOACK_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Autoack::Enable) } } -#[doc = "Field `AUTOSE` reader - Automatic STOP when Empty"] -pub type AUTOSE_R = crate::BitReader; #[doc = "Automatic STOP when Empty\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AUTOSE_A { +pub enum Autose { #[doc = "0: A stop must be sent manually when no more data is to be transmitted."] - DISABLE = 0, + Disable = 0, #[doc = "1: The leader automatically sends a STOP when no more data is available for transmission."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AUTOSE_A) -> Self { + fn from(variant: Autose) -> Self { variant as u8 != 0 } } -impl AUTOSE_R { +#[doc = "Field `AUTOSE` reader - Automatic STOP when Empty"] +pub type AutoseR = crate::BitReader; +impl AutoseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> AUTOSE_A { + pub const fn variant(&self) -> Autose { match self.bits { - false => AUTOSE_A::DISABLE, - true => AUTOSE_A::ENABLE, + false => Autose::Disable, + true => Autose::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "A stop must be sent manually when no more data is to be transmitted."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == AUTOSE_A::DISABLE + *self == Autose::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The leader automatically sends a STOP when no more data is available for transmission."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == AUTOSE_A::ENABLE + *self == Autose::Enable } } #[doc = "Field `AUTOSE` writer - Automatic STOP when Empty"] -pub type AUTOSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, AUTOSE_A, O>; -impl<'a, const O: u8> AUTOSE_W<'a, O> { +pub type AutoseW<'a, REG> = crate::BitWriter<'a, REG, Autose>; +impl<'a, REG> AutoseW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "A stop must be sent manually when no more data is to be transmitted."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(AUTOSE_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Autose::Disable) } #[doc = "The leader automatically sends a STOP when no more data is available for transmission."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(AUTOSE_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Autose::Enable) } } -#[doc = "Field `AUTOSN` reader - Automatic STOP on NACK"] -pub type AUTOSN_R = crate::BitReader; #[doc = "Automatic STOP on NACK\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AUTOSN_A { +pub enum Autosn { #[doc = "0: Stop is not automatically sent if a NACK is received from a follower."] - DISABLE = 0, + Disable = 0, #[doc = "1: The leader automatically sends a STOP if a NACK is received from a follower."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AUTOSN_A) -> Self { + fn from(variant: Autosn) -> Self { variant as u8 != 0 } } -impl AUTOSN_R { +#[doc = "Field `AUTOSN` reader - Automatic STOP on NACK"] +pub type AutosnR = crate::BitReader; +impl AutosnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> AUTOSN_A { + pub const fn variant(&self) -> Autosn { match self.bits { - false => AUTOSN_A::DISABLE, - true => AUTOSN_A::ENABLE, + false => Autosn::Disable, + true => Autosn::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Stop is not automatically sent if a NACK is received from a follower."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == AUTOSN_A::DISABLE + *self == Autosn::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The leader automatically sends a STOP if a NACK is received from a follower."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == AUTOSN_A::ENABLE + *self == Autosn::Enable } } #[doc = "Field `AUTOSN` writer - Automatic STOP on NACK"] -pub type AUTOSN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, AUTOSN_A, O>; -impl<'a, const O: u8> AUTOSN_W<'a, O> { +pub type AutosnW<'a, REG> = crate::BitWriter<'a, REG, Autosn>; +impl<'a, REG> AutosnW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Stop is not automatically sent if a NACK is received from a follower."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(AUTOSN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Autosn::Disable) } #[doc = "The leader automatically sends a STOP if a NACK is received from a follower."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(AUTOSN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Autosn::Enable) } } -#[doc = "Field `ARBDIS` reader - Arbitration Disable"] -pub type ARBDIS_R = crate::BitReader; #[doc = "Arbitration Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ARBDIS_A { +pub enum Arbdis { #[doc = "0: When a device loses arbitration, the ARBIF interrupt flag is set and the bus is released."] - DISABLE = 0, + Disable = 0, #[doc = "1: When a device loses arbitration, the ARBIF interrupt flag is set, but communication proceeds."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ARBDIS_A) -> Self { + fn from(variant: Arbdis) -> Self { variant as u8 != 0 } } -impl ARBDIS_R { +#[doc = "Field `ARBDIS` reader - Arbitration Disable"] +pub type ArbdisR = crate::BitReader; +impl ArbdisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ARBDIS_A { + pub const fn variant(&self) -> Arbdis { match self.bits { - false => ARBDIS_A::DISABLE, - true => ARBDIS_A::ENABLE, + false => Arbdis::Disable, + true => Arbdis::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "When a device loses arbitration, the ARBIF interrupt flag is set and the bus is released."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ARBDIS_A::DISABLE + *self == Arbdis::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "When a device loses arbitration, the ARBIF interrupt flag is set, but communication proceeds."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ARBDIS_A::ENABLE + *self == Arbdis::Enable } } #[doc = "Field `ARBDIS` writer - Arbitration Disable"] -pub type ARBDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, ARBDIS_A, O>; -impl<'a, const O: u8> ARBDIS_W<'a, O> { +pub type ArbdisW<'a, REG> = crate::BitWriter<'a, REG, Arbdis>; +impl<'a, REG> ArbdisW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "When a device loses arbitration, the ARBIF interrupt flag is set and the bus is released."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ARBDIS_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Arbdis::Disable) } #[doc = "When a device loses arbitration, the ARBIF interrupt flag is set, but communication proceeds."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ARBDIS_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Arbdis::Enable) } } -#[doc = "Field `GCAMEN` reader - General Call Address Match Enable"] -pub type GCAMEN_R = crate::BitReader; #[doc = "General Call Address Match Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GCAMEN_A { +pub enum Gcamen { #[doc = "0: General call address will be NACK'ed if it is not included by the follower address and address mask."] - DISABLE = 0, + Disable = 0, #[doc = "1: When a general call address is received, a software response is required"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GCAMEN_A) -> Self { + fn from(variant: Gcamen) -> Self { variant as u8 != 0 } } -impl GCAMEN_R { +#[doc = "Field `GCAMEN` reader - General Call Address Match Enable"] +pub type GcamenR = crate::BitReader; +impl GcamenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> GCAMEN_A { + pub const fn variant(&self) -> Gcamen { match self.bits { - false => GCAMEN_A::DISABLE, - true => GCAMEN_A::ENABLE, + false => Gcamen::Disable, + true => Gcamen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "General call address will be NACK'ed if it is not included by the follower address and address mask."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == GCAMEN_A::DISABLE + *self == Gcamen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "When a general call address is received, a software response is required"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == GCAMEN_A::ENABLE + *self == Gcamen::Enable } } #[doc = "Field `GCAMEN` writer - General Call Address Match Enable"] -pub type GCAMEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, GCAMEN_A, O>; -impl<'a, const O: u8> GCAMEN_W<'a, O> { +pub type GcamenW<'a, REG> = crate::BitWriter<'a, REG, Gcamen>; +impl<'a, REG> GcamenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "General call address will be NACK'ed if it is not included by the follower address and address mask."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(GCAMEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Gcamen::Disable) } #[doc = "When a general call address is received, a software response is required"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(GCAMEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Gcamen::Enable) } } -#[doc = "Field `TXBIL` reader - TX Buffer Interrupt Level"] -pub type TXBIL_R = crate::BitReader; #[doc = "TX Buffer Interrupt Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TXBIL_A { +pub enum Txbil { #[doc = "0: TXBL status and the TXBL interrupt flag are set when the transmit buffer becomes empty. TXBL is cleared when the buffer becomes nonempty."] - EMPTY = 0, + Empty = 0, #[doc = "1: TXBL status and the TXBL interrupt flag are set when the transmit buffer goes from full to half-full or empty. TXBL is cleared when the buffer becomes full"] - HALF_FULL = 1, + HalfFull = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TXBIL_A) -> Self { + fn from(variant: Txbil) -> Self { variant as u8 != 0 } } -impl TXBIL_R { +#[doc = "Field `TXBIL` reader - TX Buffer Interrupt Level"] +pub type TxbilR = crate::BitReader; +impl TxbilR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXBIL_A { + pub const fn variant(&self) -> Txbil { match self.bits { - false => TXBIL_A::EMPTY, - true => TXBIL_A::HALF_FULL, + false => Txbil::Empty, + true => Txbil::HalfFull, } } - #[doc = "Checks if the value of the field is `EMPTY`"] + #[doc = "TXBL status and the TXBL interrupt flag are set when the transmit buffer becomes empty. TXBL is cleared when the buffer becomes nonempty."] #[inline(always)] pub fn is_empty(&self) -> bool { - *self == TXBIL_A::EMPTY + *self == Txbil::Empty } - #[doc = "Checks if the value of the field is `HALF_FULL`"] + #[doc = "TXBL status and the TXBL interrupt flag are set when the transmit buffer goes from full to half-full or empty. TXBL is cleared when the buffer becomes full"] #[inline(always)] pub fn is_half_full(&self) -> bool { - *self == TXBIL_A::HALF_FULL + *self == Txbil::HalfFull } } #[doc = "Field `TXBIL` writer - TX Buffer Interrupt Level"] -pub type TXBIL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, TXBIL_A, O>; -impl<'a, const O: u8> TXBIL_W<'a, O> { +pub type TxbilW<'a, REG> = crate::BitWriter<'a, REG, Txbil>; +impl<'a, REG> TxbilW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "TXBL status and the TXBL interrupt flag are set when the transmit buffer becomes empty. TXBL is cleared when the buffer becomes nonempty."] #[inline(always)] - pub fn empty(self) -> &'a mut W { - self.variant(TXBIL_A::EMPTY) + pub fn empty(self) -> &'a mut crate::W { + self.variant(Txbil::Empty) } #[doc = "TXBL status and the TXBL interrupt flag are set when the transmit buffer goes from full to half-full or empty. TXBL is cleared when the buffer becomes full"] #[inline(always)] - pub fn half_full(self) -> &'a mut W { - self.variant(TXBIL_A::HALF_FULL) + pub fn half_full(self) -> &'a mut crate::W { + self.variant(Txbil::HalfFull) } } -#[doc = "Field `CLHR` reader - Clock Low High Ratio"] -pub type CLHR_R = crate::FieldReader; #[doc = "Clock Low High Ratio\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLHR_A { +pub enum Clhr { #[doc = "0: Nlow=4 and Nhigh=4, and the Nlow:Nhigh ratio is 4:4"] - STANDARD = 0, + Standard = 0, #[doc = "1: Nlow=6 and Nhigh=3, and the Nlow:Nhigh ratio is 6:3"] - ASYMMETRIC = 1, + Asymmetric = 1, #[doc = "2: Nlow=11 and Nhigh=6, and the Nlow:Nhigh ratio is 11:6"] - FAST = 2, + Fast = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLHR_A) -> Self { + fn from(variant: Clhr) -> Self { variant as _ } } -impl CLHR_R { +impl crate::FieldSpec for Clhr { + type Ux = u8; +} +impl crate::IsEnum for Clhr {} +#[doc = "Field `CLHR` reader - Clock Low High Ratio"] +pub type ClhrR = crate::FieldReader; +impl ClhrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLHR_A::STANDARD), - 1 => Some(CLHR_A::ASYMMETRIC), - 2 => Some(CLHR_A::FAST), + 0 => Some(Clhr::Standard), + 1 => Some(Clhr::Asymmetric), + 2 => Some(Clhr::Fast), _ => None, } } - #[doc = "Checks if the value of the field is `STANDARD`"] + #[doc = "Nlow=4 and Nhigh=4, and the Nlow:Nhigh ratio is 4:4"] #[inline(always)] pub fn is_standard(&self) -> bool { - *self == CLHR_A::STANDARD + *self == Clhr::Standard } - #[doc = "Checks if the value of the field is `ASYMMETRIC`"] + #[doc = "Nlow=6 and Nhigh=3, and the Nlow:Nhigh ratio is 6:3"] #[inline(always)] pub fn is_asymmetric(&self) -> bool { - *self == CLHR_A::ASYMMETRIC + *self == Clhr::Asymmetric } - #[doc = "Checks if the value of the field is `FAST`"] + #[doc = "Nlow=11 and Nhigh=6, and the Nlow:Nhigh ratio is 11:6"] #[inline(always)] pub fn is_fast(&self) -> bool { - *self == CLHR_A::FAST + *self == Clhr::Fast } } #[doc = "Field `CLHR` writer - Clock Low High Ratio"] -pub type CLHR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, CLHR_A, 2, O>; -impl<'a, const O: u8> CLHR_W<'a, O> { +pub type ClhrW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clhr>; +impl<'a, REG> ClhrW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Nlow=4 and Nhigh=4, and the Nlow:Nhigh ratio is 4:4"] #[inline(always)] - pub fn standard(self) -> &'a mut W { - self.variant(CLHR_A::STANDARD) + pub fn standard(self) -> &'a mut crate::W { + self.variant(Clhr::Standard) } #[doc = "Nlow=6 and Nhigh=3, and the Nlow:Nhigh ratio is 6:3"] #[inline(always)] - pub fn asymmetric(self) -> &'a mut W { - self.variant(CLHR_A::ASYMMETRIC) + pub fn asymmetric(self) -> &'a mut crate::W { + self.variant(Clhr::Asymmetric) } #[doc = "Nlow=11 and Nhigh=6, and the Nlow:Nhigh ratio is 11:6"] #[inline(always)] - pub fn fast(self) -> &'a mut W { - self.variant(CLHR_A::FAST) + pub fn fast(self) -> &'a mut crate::W { + self.variant(Clhr::Fast) } } -#[doc = "Field `BITO` reader - Bus Idle Timeout"] -pub type BITO_R = crate::FieldReader; #[doc = "Bus Idle Timeout\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BITO_A { +pub enum Bito { #[doc = "0: Timeout disabled"] - OFF = 0, + Off = 0, #[doc = "1: Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."] - I2C40PCC = 1, + I2c40pcc = 1, #[doc = "2: Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."] - I2C80PCC = 2, + I2c80pcc = 2, #[doc = "3: Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."] - I2C160PCC = 3, + I2c160pcc = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BITO_A) -> Self { + fn from(variant: Bito) -> Self { variant as _ } } -impl BITO_R { +impl crate::FieldSpec for Bito { + type Ux = u8; +} +impl crate::IsEnum for Bito {} +#[doc = "Field `BITO` reader - Bus Idle Timeout"] +pub type BitoR = crate::FieldReader; +impl BitoR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> BITO_A { + pub const fn variant(&self) -> Bito { match self.bits { - 0 => BITO_A::OFF, - 1 => BITO_A::I2C40PCC, - 2 => BITO_A::I2C80PCC, - 3 => BITO_A::I2C160PCC, + 0 => Bito::Off, + 1 => Bito::I2c40pcc, + 2 => Bito::I2c80pcc, + 3 => Bito::I2c160pcc, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Timeout disabled"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == BITO_A::OFF + *self == Bito::Off } - #[doc = "Checks if the value of the field is `I2C40PCC`"] + #[doc = "Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."] #[inline(always)] pub fn is_i2c40pcc(&self) -> bool { - *self == BITO_A::I2C40PCC + *self == Bito::I2c40pcc } - #[doc = "Checks if the value of the field is `I2C80PCC`"] + #[doc = "Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."] #[inline(always)] pub fn is_i2c80pcc(&self) -> bool { - *self == BITO_A::I2C80PCC + *self == Bito::I2c80pcc } - #[doc = "Checks if the value of the field is `I2C160PCC`"] + #[doc = "Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."] #[inline(always)] pub fn is_i2c160pcc(&self) -> bool { - *self == BITO_A::I2C160PCC + *self == Bito::I2c160pcc } } #[doc = "Field `BITO` writer - Bus Idle Timeout"] -pub type BITO_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, BITO_A, 2, O>; -impl<'a, const O: u8> BITO_W<'a, O> { +pub type BitoW<'a, REG> = crate::FieldWriter<'a, REG, 2, Bito, crate::Safe>; +impl<'a, REG> BitoW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Timeout disabled"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(BITO_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Bito::Off) } #[doc = "Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."] #[inline(always)] - pub fn i2c40pcc(self) -> &'a mut W { - self.variant(BITO_A::I2C40PCC) + pub fn i2c40pcc(self) -> &'a mut crate::W { + self.variant(Bito::I2c40pcc) } #[doc = "Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."] #[inline(always)] - pub fn i2c80pcc(self) -> &'a mut W { - self.variant(BITO_A::I2C80PCC) + pub fn i2c80pcc(self) -> &'a mut crate::W { + self.variant(Bito::I2c80pcc) } #[doc = "Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."] #[inline(always)] - pub fn i2c160pcc(self) -> &'a mut W { - self.variant(BITO_A::I2C160PCC) + pub fn i2c160pcc(self) -> &'a mut crate::W { + self.variant(Bito::I2c160pcc) } } -#[doc = "Field `GIBITO` reader - Go Idle on Bus Idle Timeout"] -pub type GIBITO_R = crate::BitReader; #[doc = "Go Idle on Bus Idle Timeout\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GIBITO_A { +pub enum Gibito { #[doc = "0: A bus idle timeout has no effect on the bus state."] - DISABLE = 0, + Disable = 0, #[doc = "1: A bus idle timeout tells the I2C module that the bus is idle, allowing new transfers to be initiated."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GIBITO_A) -> Self { + fn from(variant: Gibito) -> Self { variant as u8 != 0 } } -impl GIBITO_R { +#[doc = "Field `GIBITO` reader - Go Idle on Bus Idle Timeout"] +pub type GibitoR = crate::BitReader; +impl GibitoR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> GIBITO_A { + pub const fn variant(&self) -> Gibito { match self.bits { - false => GIBITO_A::DISABLE, - true => GIBITO_A::ENABLE, + false => Gibito::Disable, + true => Gibito::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "A bus idle timeout has no effect on the bus state."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == GIBITO_A::DISABLE + *self == Gibito::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "A bus idle timeout tells the I2C module that the bus is idle, allowing new transfers to be initiated."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == GIBITO_A::ENABLE + *self == Gibito::Enable } } #[doc = "Field `GIBITO` writer - Go Idle on Bus Idle Timeout"] -pub type GIBITO_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, GIBITO_A, O>; -impl<'a, const O: u8> GIBITO_W<'a, O> { +pub type GibitoW<'a, REG> = crate::BitWriter<'a, REG, Gibito>; +impl<'a, REG> GibitoW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "A bus idle timeout has no effect on the bus state."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(GIBITO_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Gibito::Disable) } #[doc = "A bus idle timeout tells the I2C module that the bus is idle, allowing new transfers to be initiated."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(GIBITO_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Gibito::Enable) } } -#[doc = "Field `CLTO` reader - Clock Low Timeout"] -pub type CLTO_R = crate::FieldReader; #[doc = "Clock Low Timeout\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLTO_A { +pub enum Clto { #[doc = "0: Timeout disabled"] - OFF = 0, + Off = 0, #[doc = "1: Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."] - I2C40PCC = 1, + I2c40pcc = 1, #[doc = "2: Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."] - I2C80PCC = 2, + I2c80pcc = 2, #[doc = "3: Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."] - I2C160PCC = 3, + I2c160pcc = 3, #[doc = "4: Timeout after 320 prescaled clock cycles. In standard mode at 100 kHz, this results in a 400us timeout."] - I2C320PCC = 4, + I2c320pcc = 4, #[doc = "5: Timeout after 1024 prescaled clock cycles. In standard mode at 100 kHz, this results in a 1280us timeout."] - I2C1024PCC = 5, + I2c1024pcc = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLTO_A) -> Self { + fn from(variant: Clto) -> Self { variant as _ } } -impl CLTO_R { +impl crate::FieldSpec for Clto { + type Ux = u8; +} +impl crate::IsEnum for Clto {} +#[doc = "Field `CLTO` reader - Clock Low Timeout"] +pub type CltoR = crate::FieldReader; +impl CltoR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLTO_A::OFF), - 1 => Some(CLTO_A::I2C40PCC), - 2 => Some(CLTO_A::I2C80PCC), - 3 => Some(CLTO_A::I2C160PCC), - 4 => Some(CLTO_A::I2C320PCC), - 5 => Some(CLTO_A::I2C1024PCC), + 0 => Some(Clto::Off), + 1 => Some(Clto::I2c40pcc), + 2 => Some(Clto::I2c80pcc), + 3 => Some(Clto::I2c160pcc), + 4 => Some(Clto::I2c320pcc), + 5 => Some(Clto::I2c1024pcc), _ => None, } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Timeout disabled"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == CLTO_A::OFF + *self == Clto::Off } - #[doc = "Checks if the value of the field is `I2C40PCC`"] + #[doc = "Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."] #[inline(always)] pub fn is_i2c40pcc(&self) -> bool { - *self == CLTO_A::I2C40PCC + *self == Clto::I2c40pcc } - #[doc = "Checks if the value of the field is `I2C80PCC`"] + #[doc = "Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."] #[inline(always)] pub fn is_i2c80pcc(&self) -> bool { - *self == CLTO_A::I2C80PCC + *self == Clto::I2c80pcc } - #[doc = "Checks if the value of the field is `I2C160PCC`"] + #[doc = "Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."] #[inline(always)] pub fn is_i2c160pcc(&self) -> bool { - *self == CLTO_A::I2C160PCC + *self == Clto::I2c160pcc } - #[doc = "Checks if the value of the field is `I2C320PCC`"] + #[doc = "Timeout after 320 prescaled clock cycles. In standard mode at 100 kHz, this results in a 400us timeout."] #[inline(always)] pub fn is_i2c320pcc(&self) -> bool { - *self == CLTO_A::I2C320PCC + *self == Clto::I2c320pcc } - #[doc = "Checks if the value of the field is `I2C1024PCC`"] + #[doc = "Timeout after 1024 prescaled clock cycles. In standard mode at 100 kHz, this results in a 1280us timeout."] #[inline(always)] pub fn is_i2c1024pcc(&self) -> bool { - *self == CLTO_A::I2C1024PCC + *self == Clto::I2c1024pcc } } #[doc = "Field `CLTO` writer - Clock Low Timeout"] -pub type CLTO_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, CLTO_A, 3, O>; -impl<'a, const O: u8> CLTO_W<'a, O> { +pub type CltoW<'a, REG> = crate::FieldWriter<'a, REG, 3, Clto>; +impl<'a, REG> CltoW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Timeout disabled"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(CLTO_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Clto::Off) } #[doc = "Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."] #[inline(always)] - pub fn i2c40pcc(self) -> &'a mut W { - self.variant(CLTO_A::I2C40PCC) + pub fn i2c40pcc(self) -> &'a mut crate::W { + self.variant(Clto::I2c40pcc) } #[doc = "Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."] #[inline(always)] - pub fn i2c80pcc(self) -> &'a mut W { - self.variant(CLTO_A::I2C80PCC) + pub fn i2c80pcc(self) -> &'a mut crate::W { + self.variant(Clto::I2c80pcc) } #[doc = "Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."] #[inline(always)] - pub fn i2c160pcc(self) -> &'a mut W { - self.variant(CLTO_A::I2C160PCC) + pub fn i2c160pcc(self) -> &'a mut crate::W { + self.variant(Clto::I2c160pcc) } #[doc = "Timeout after 320 prescaled clock cycles. In standard mode at 100 kHz, this results in a 400us timeout."] #[inline(always)] - pub fn i2c320pcc(self) -> &'a mut W { - self.variant(CLTO_A::I2C320PCC) + pub fn i2c320pcc(self) -> &'a mut crate::W { + self.variant(Clto::I2c320pcc) } #[doc = "Timeout after 1024 prescaled clock cycles. In standard mode at 100 kHz, this results in a 1280us timeout."] #[inline(always)] - pub fn i2c1024pcc(self) -> &'a mut W { - self.variant(CLTO_A::I2C1024PCC) + pub fn i2c1024pcc(self) -> &'a mut crate::W { + self.variant(Clto::I2c1024pcc) } } -#[doc = "Field `SCLMONEN` reader - SCL Monitor Enable"] -pub type SCLMONEN_R = crate::BitReader; #[doc = "SCL Monitor Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SCLMONEN_A { +pub enum Sclmonen { #[doc = "0: Disable SCL monitor"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enable SCL monitor"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SCLMONEN_A) -> Self { + fn from(variant: Sclmonen) -> Self { variant as u8 != 0 } } -impl SCLMONEN_R { +#[doc = "Field `SCLMONEN` reader - SCL Monitor Enable"] +pub type SclmonenR = crate::BitReader; +impl SclmonenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SCLMONEN_A { + pub const fn variant(&self) -> Sclmonen { match self.bits { - false => SCLMONEN_A::DISABLE, - true => SCLMONEN_A::ENABLE, + false => Sclmonen::Disable, + true => Sclmonen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable SCL monitor"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == SCLMONEN_A::DISABLE + *self == Sclmonen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enable SCL monitor"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == SCLMONEN_A::ENABLE + *self == Sclmonen::Enable } } #[doc = "Field `SCLMONEN` writer - SCL Monitor Enable"] -pub type SCLMONEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, SCLMONEN_A, O>; -impl<'a, const O: u8> SCLMONEN_W<'a, O> { +pub type SclmonenW<'a, REG> = crate::BitWriter<'a, REG, Sclmonen>; +impl<'a, REG> SclmonenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable SCL monitor"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(SCLMONEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Sclmonen::Disable) } #[doc = "Enable SCL monitor"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(SCLMONEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Sclmonen::Enable) } } -#[doc = "Field `SDAMONEN` reader - SDA Monitor Enable"] -pub type SDAMONEN_R = crate::BitReader; #[doc = "SDA Monitor Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SDAMONEN_A { +pub enum Sdamonen { #[doc = "0: Disable SDA Monitor"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enable SDA Monitor"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SDAMONEN_A) -> Self { + fn from(variant: Sdamonen) -> Self { variant as u8 != 0 } } -impl SDAMONEN_R { +#[doc = "Field `SDAMONEN` reader - SDA Monitor Enable"] +pub type SdamonenR = crate::BitReader; +impl SdamonenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SDAMONEN_A { + pub const fn variant(&self) -> Sdamonen { match self.bits { - false => SDAMONEN_A::DISABLE, - true => SDAMONEN_A::ENABLE, + false => Sdamonen::Disable, + true => Sdamonen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable SDA Monitor"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == SDAMONEN_A::DISABLE + *self == Sdamonen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enable SDA Monitor"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == SDAMONEN_A::ENABLE + *self == Sdamonen::Enable } } #[doc = "Field `SDAMONEN` writer - SDA Monitor Enable"] -pub type SDAMONEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, SDAMONEN_A, O>; -impl<'a, const O: u8> SDAMONEN_W<'a, O> { +pub type SdamonenW<'a, REG> = crate::BitWriter<'a, REG, Sdamonen>; +impl<'a, REG> SdamonenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable SDA Monitor"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(SDAMONEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Sdamonen::Disable) } #[doc = "Enable SDA Monitor"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(SDAMONEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Sdamonen::Enable) } } impl R { #[doc = "Bit 0 - Soft Reset the internal state registers"] #[inline(always)] - pub fn corerst(&self) -> CORERST_R { - CORERST_R::new((self.bits & 1) != 0) + pub fn corerst(&self) -> CorerstR { + CorerstR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Addressable as Follower"] #[inline(always)] - pub fn slave(&self) -> SLAVE_R { - SLAVE_R::new(((self.bits >> 1) & 1) != 0) + pub fn slave(&self) -> SlaveR { + SlaveR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Automatic Acknowledge"] #[inline(always)] - pub fn autoack(&self) -> AUTOACK_R { - AUTOACK_R::new(((self.bits >> 2) & 1) != 0) + pub fn autoack(&self) -> AutoackR { + AutoackR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Automatic STOP when Empty"] #[inline(always)] - pub fn autose(&self) -> AUTOSE_R { - AUTOSE_R::new(((self.bits >> 3) & 1) != 0) + pub fn autose(&self) -> AutoseR { + AutoseR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Automatic STOP on NACK"] #[inline(always)] - pub fn autosn(&self) -> AUTOSN_R { - AUTOSN_R::new(((self.bits >> 4) & 1) != 0) + pub fn autosn(&self) -> AutosnR { + AutosnR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Arbitration Disable"] #[inline(always)] - pub fn arbdis(&self) -> ARBDIS_R { - ARBDIS_R::new(((self.bits >> 5) & 1) != 0) + pub fn arbdis(&self) -> ArbdisR { + ArbdisR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - General Call Address Match Enable"] #[inline(always)] - pub fn gcamen(&self) -> GCAMEN_R { - GCAMEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn gcamen(&self) -> GcamenR { + GcamenR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - TX Buffer Interrupt Level"] #[inline(always)] - pub fn txbil(&self) -> TXBIL_R { - TXBIL_R::new(((self.bits >> 7) & 1) != 0) + pub fn txbil(&self) -> TxbilR { + TxbilR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:9 - Clock Low High Ratio"] #[inline(always)] - pub fn clhr(&self) -> CLHR_R { - CLHR_R::new(((self.bits >> 8) & 3) as u8) + pub fn clhr(&self) -> ClhrR { + ClhrR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 12:13 - Bus Idle Timeout"] #[inline(always)] - pub fn bito(&self) -> BITO_R { - BITO_R::new(((self.bits >> 12) & 3) as u8) + pub fn bito(&self) -> BitoR { + BitoR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bit 15 - Go Idle on Bus Idle Timeout"] #[inline(always)] - pub fn gibito(&self) -> GIBITO_R { - GIBITO_R::new(((self.bits >> 15) & 1) != 0) + pub fn gibito(&self) -> GibitoR { + GibitoR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:18 - Clock Low Timeout"] #[inline(always)] - pub fn clto(&self) -> CLTO_R { - CLTO_R::new(((self.bits >> 16) & 7) as u8) + pub fn clto(&self) -> CltoR { + CltoR::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bit 20 - SCL Monitor Enable"] #[inline(always)] - pub fn sclmonen(&self) -> SCLMONEN_R { - SCLMONEN_R::new(((self.bits >> 20) & 1) != 0) + pub fn sclmonen(&self) -> SclmonenR { + SclmonenR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - SDA Monitor Enable"] #[inline(always)] - pub fn sdamonen(&self) -> SDAMONEN_R { - SDAMONEN_R::new(((self.bits >> 21) & 1) != 0) + pub fn sdamonen(&self) -> SdamonenR { + SdamonenR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bit 0 - Soft Reset the internal state registers"] #[inline(always)] #[must_use] - pub fn corerst(&mut self) -> CORERST_W<0> { - CORERST_W::new(self) + pub fn corerst(&mut self) -> CorerstW { + CorerstW::new(self, 0) } #[doc = "Bit 1 - Addressable as Follower"] #[inline(always)] #[must_use] - pub fn slave(&mut self) -> SLAVE_W<1> { - SLAVE_W::new(self) + pub fn slave(&mut self) -> SlaveW { + SlaveW::new(self, 1) } #[doc = "Bit 2 - Automatic Acknowledge"] #[inline(always)] #[must_use] - pub fn autoack(&mut self) -> AUTOACK_W<2> { - AUTOACK_W::new(self) + pub fn autoack(&mut self) -> AutoackW { + AutoackW::new(self, 2) } #[doc = "Bit 3 - Automatic STOP when Empty"] #[inline(always)] #[must_use] - pub fn autose(&mut self) -> AUTOSE_W<3> { - AUTOSE_W::new(self) + pub fn autose(&mut self) -> AutoseW { + AutoseW::new(self, 3) } #[doc = "Bit 4 - Automatic STOP on NACK"] #[inline(always)] #[must_use] - pub fn autosn(&mut self) -> AUTOSN_W<4> { - AUTOSN_W::new(self) + pub fn autosn(&mut self) -> AutosnW { + AutosnW::new(self, 4) } #[doc = "Bit 5 - Arbitration Disable"] #[inline(always)] #[must_use] - pub fn arbdis(&mut self) -> ARBDIS_W<5> { - ARBDIS_W::new(self) + pub fn arbdis(&mut self) -> ArbdisW { + ArbdisW::new(self, 5) } #[doc = "Bit 6 - General Call Address Match Enable"] #[inline(always)] #[must_use] - pub fn gcamen(&mut self) -> GCAMEN_W<6> { - GCAMEN_W::new(self) + pub fn gcamen(&mut self) -> GcamenW { + GcamenW::new(self, 6) } #[doc = "Bit 7 - TX Buffer Interrupt Level"] #[inline(always)] #[must_use] - pub fn txbil(&mut self) -> TXBIL_W<7> { - TXBIL_W::new(self) + pub fn txbil(&mut self) -> TxbilW { + TxbilW::new(self, 7) } #[doc = "Bits 8:9 - Clock Low High Ratio"] #[inline(always)] #[must_use] - pub fn clhr(&mut self) -> CLHR_W<8> { - CLHR_W::new(self) + pub fn clhr(&mut self) -> ClhrW { + ClhrW::new(self, 8) } #[doc = "Bits 12:13 - Bus Idle Timeout"] #[inline(always)] #[must_use] - pub fn bito(&mut self) -> BITO_W<12> { - BITO_W::new(self) + pub fn bito(&mut self) -> BitoW { + BitoW::new(self, 12) } #[doc = "Bit 15 - Go Idle on Bus Idle Timeout"] #[inline(always)] #[must_use] - pub fn gibito(&mut self) -> GIBITO_W<15> { - GIBITO_W::new(self) + pub fn gibito(&mut self) -> GibitoW { + GibitoW::new(self, 15) } #[doc = "Bits 16:18 - Clock Low Timeout"] #[inline(always)] #[must_use] - pub fn clto(&mut self) -> CLTO_W<16> { - CLTO_W::new(self) + pub fn clto(&mut self) -> CltoW { + CltoW::new(self, 16) } #[doc = "Bit 20 - SCL Monitor Enable"] #[inline(always)] #[must_use] - pub fn sclmonen(&mut self) -> SCLMONEN_W<20> { - SCLMONEN_W::new(self) + pub fn sclmonen(&mut self) -> SclmonenW { + SclmonenW::new(self, 20) } #[doc = "Bit 21 - SDA Monitor Enable"] #[inline(always)] #[must_use] - pub fn sdamonen(&mut self) -> SDAMONEN_W<21> { - SDAMONEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sdamonen(&mut self) -> SdamonenW { + SdamonenW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/en.rs index d1c66f9..ccee40a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/en.rs @@ -1,126 +1,89 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EN` reader - module enable"] -pub type EN_R = crate::BitReader; +pub type W = crate::W; #[doc = "module enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EN_A { +pub enum En { #[doc = "0: Disable Peripheral Clock"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enable Peripheral Clock"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EN_A) -> Self { + fn from(variant: En) -> Self { variant as u8 != 0 } } -impl EN_R { +#[doc = "Field `EN` reader - module enable"] +pub type EnR = crate::BitReader; +impl EnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EN_A { + pub const fn variant(&self) -> En { match self.bits { - false => EN_A::DISABLE, - true => EN_A::ENABLE, + false => En::Disable, + true => En::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable Peripheral Clock"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EN_A::DISABLE + *self == En::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enable Peripheral Clock"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EN_A::ENABLE + *self == En::Enable } } #[doc = "Field `EN` writer - module enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, EN_A, O>; -impl<'a, const O: u8> EN_W<'a, O> { +pub type EnW<'a, REG> = crate::BitWriter<'a, REG, En>; +impl<'a, REG> EnW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable Peripheral Clock"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(En::Disable) } #[doc = "Enable Peripheral Clock"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(En::Enable) } } impl R { #[doc = "Bit 0 - module enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - module enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/ien.rs index 7ec6b35..d68e6ae 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/ien.rs @@ -1,380 +1,340 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` reader - START condition Interrupt Flag"] -pub type START_R = crate::BitReader; +pub type StartR = crate::BitReader; #[doc = "Field `START` writer - START condition Interrupt Flag"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RSTART` reader - Repeated START condition Interrupt Flag"] -pub type RSTART_R = crate::BitReader; +pub type RstartR = crate::BitReader; #[doc = "Field `RSTART` writer - Repeated START condition Interrupt Flag"] -pub type RSTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RstartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ADDR` reader - Address Interrupt Flag"] -pub type ADDR_R = crate::BitReader; +pub type AddrR = crate::BitReader; #[doc = "Field `ADDR` writer - Address Interrupt Flag"] -pub type ADDR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AddrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXC` reader - Transfer Completed Interrupt Flag"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXC` writer - Transfer Completed Interrupt Flag"] -pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXBL` reader - Transmit Buffer Level Interrupt Flag"] -pub type TXBL_R = crate::BitReader; +pub type TxblR = crate::BitReader; #[doc = "Field `TXBL` writer - Transmit Buffer Level Interrupt Flag"] -pub type TXBL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxblW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXDATAV` reader - Receive Data Valid Interrupt Flag"] -pub type RXDATAV_R = crate::BitReader; +pub type RxdatavR = crate::BitReader; #[doc = "Field `RXDATAV` writer - Receive Data Valid Interrupt Flag"] -pub type RXDATAV_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxdatavW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACK` reader - Acknowledge Received Interrupt Flag"] -pub type ACK_R = crate::BitReader; +pub type AckR = crate::BitReader; #[doc = "Field `ACK` writer - Acknowledge Received Interrupt Flag"] -pub type ACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AckW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NACK` reader - Not Acknowledge Received Interrupt Flag"] -pub type NACK_R = crate::BitReader; +pub type NackR = crate::BitReader; #[doc = "Field `NACK` writer - Not Acknowledge Received Interrupt Flag"] -pub type NACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type NackW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MSTOP` reader - Leader STOP Condition Interrupt Flag"] -pub type MSTOP_R = crate::BitReader; +pub type MstopR = crate::BitReader; #[doc = "Field `MSTOP` writer - Leader STOP Condition Interrupt Flag"] -pub type MSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type MstopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ARBLOST` reader - Arbitration Lost Interrupt Flag"] -pub type ARBLOST_R = crate::BitReader; +pub type ArblostR = crate::BitReader; #[doc = "Field `ARBLOST` writer - Arbitration Lost Interrupt Flag"] -pub type ARBLOST_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ArblostW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSERR` reader - Bus Error Interrupt Flag"] -pub type BUSERR_R = crate::BitReader; +pub type BuserrR = crate::BitReader; #[doc = "Field `BUSERR` writer - Bus Error Interrupt Flag"] -pub type BUSERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type BuserrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSHOLD` reader - Bus Held Interrupt Flag"] -pub type BUSHOLD_R = crate::BitReader; +pub type BusholdR = crate::BitReader; #[doc = "Field `BUSHOLD` writer - Bus Held Interrupt Flag"] -pub type BUSHOLD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type BusholdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXOF` reader - Transmit Buffer Overflow Interrupt Flag"] -pub type TXOF_R = crate::BitReader; +pub type TxofR = crate::BitReader; #[doc = "Field `TXOF` writer - Transmit Buffer Overflow Interrupt Flag"] -pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUF` reader - Receive Buffer Underflow Interrupt Flag"] -pub type RXUF_R = crate::BitReader; +pub type RxufR = crate::BitReader; #[doc = "Field `RXUF` writer - Receive Buffer Underflow Interrupt Flag"] -pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BITO` reader - Bus Idle Timeout Interrupt Flag"] -pub type BITO_R = crate::BitReader; +pub type BitoR = crate::BitReader; #[doc = "Field `BITO` writer - Bus Idle Timeout Interrupt Flag"] -pub type BITO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type BitoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLTO` reader - Clock Low Timeout Interrupt Flag"] -pub type CLTO_R = crate::BitReader; +pub type CltoR = crate::BitReader; #[doc = "Field `CLTO` writer - Clock Low Timeout Interrupt Flag"] -pub type CLTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type CltoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SSTOP` reader - Follower STOP condition Interrupt Flag"] -pub type SSTOP_R = crate::BitReader; +pub type SstopR = crate::BitReader; #[doc = "Field `SSTOP` writer - Follower STOP condition Interrupt Flag"] -pub type SSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SstopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFULL` reader - Receive Buffer Full Interrupt Flag"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXFULL` writer - Receive Buffer Full Interrupt Flag"] -pub type RXFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxfullW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLERR` reader - Clock Low Error Interrupt Flag"] -pub type CLERR_R = crate::BitReader; +pub type ClerrR = crate::BitReader; #[doc = "Field `CLERR` writer - Clock Low Error Interrupt Flag"] -pub type CLERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ClerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCLERR` reader - SCL Error Interrupt Flag"] -pub type SCLERR_R = crate::BitReader; +pub type SclerrR = crate::BitReader; #[doc = "Field `SCLERR` writer - SCL Error Interrupt Flag"] -pub type SCLERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SclerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SDAERR` reader - SDA Error Interrupt Flag"] -pub type SDAERR_R = crate::BitReader; +pub type SdaerrR = crate::BitReader; #[doc = "Field `SDAERR` writer - SDA Error Interrupt Flag"] -pub type SDAERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SdaerrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - START condition Interrupt Flag"] #[inline(always)] - pub fn start(&self) -> START_R { - START_R::new((self.bits & 1) != 0) + pub fn start(&self) -> StartR { + StartR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Repeated START condition Interrupt Flag"] #[inline(always)] - pub fn rstart(&self) -> RSTART_R { - RSTART_R::new(((self.bits >> 1) & 1) != 0) + pub fn rstart(&self) -> RstartR { + RstartR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Address Interrupt Flag"] #[inline(always)] - pub fn addr(&self) -> ADDR_R { - ADDR_R::new(((self.bits >> 2) & 1) != 0) + pub fn addr(&self) -> AddrR { + AddrR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Transfer Completed Interrupt Flag"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new(((self.bits >> 3) & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Transmit Buffer Level Interrupt Flag"] #[inline(always)] - pub fn txbl(&self) -> TXBL_R { - TXBL_R::new(((self.bits >> 4) & 1) != 0) + pub fn txbl(&self) -> TxblR { + TxblR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Receive Data Valid Interrupt Flag"] #[inline(always)] - pub fn rxdatav(&self) -> RXDATAV_R { - RXDATAV_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxdatav(&self) -> RxdatavR { + RxdatavR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Acknowledge Received Interrupt Flag"] #[inline(always)] - pub fn ack(&self) -> ACK_R { - ACK_R::new(((self.bits >> 6) & 1) != 0) + pub fn ack(&self) -> AckR { + AckR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Not Acknowledge Received Interrupt Flag"] #[inline(always)] - pub fn nack(&self) -> NACK_R { - NACK_R::new(((self.bits >> 7) & 1) != 0) + pub fn nack(&self) -> NackR { + NackR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Leader STOP Condition Interrupt Flag"] #[inline(always)] - pub fn mstop(&self) -> MSTOP_R { - MSTOP_R::new(((self.bits >> 8) & 1) != 0) + pub fn mstop(&self) -> MstopR { + MstopR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Arbitration Lost Interrupt Flag"] #[inline(always)] - pub fn arblost(&self) -> ARBLOST_R { - ARBLOST_R::new(((self.bits >> 9) & 1) != 0) + pub fn arblost(&self) -> ArblostR { + ArblostR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Bus Error Interrupt Flag"] #[inline(always)] - pub fn buserr(&self) -> BUSERR_R { - BUSERR_R::new(((self.bits >> 10) & 1) != 0) + pub fn buserr(&self) -> BuserrR { + BuserrR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Bus Held Interrupt Flag"] #[inline(always)] - pub fn bushold(&self) -> BUSHOLD_R { - BUSHOLD_R::new(((self.bits >> 11) & 1) != 0) + pub fn bushold(&self) -> BusholdR { + BusholdR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Transmit Buffer Overflow Interrupt Flag"] #[inline(always)] - pub fn txof(&self) -> TXOF_R { - TXOF_R::new(((self.bits >> 12) & 1) != 0) + pub fn txof(&self) -> TxofR { + TxofR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Receive Buffer Underflow Interrupt Flag"] #[inline(always)] - pub fn rxuf(&self) -> RXUF_R { - RXUF_R::new(((self.bits >> 13) & 1) != 0) + pub fn rxuf(&self) -> RxufR { + RxufR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Bus Idle Timeout Interrupt Flag"] #[inline(always)] - pub fn bito(&self) -> BITO_R { - BITO_R::new(((self.bits >> 14) & 1) != 0) + pub fn bito(&self) -> BitoR { + BitoR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Clock Low Timeout Interrupt Flag"] #[inline(always)] - pub fn clto(&self) -> CLTO_R { - CLTO_R::new(((self.bits >> 15) & 1) != 0) + pub fn clto(&self) -> CltoR { + CltoR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Follower STOP condition Interrupt Flag"] #[inline(always)] - pub fn sstop(&self) -> SSTOP_R { - SSTOP_R::new(((self.bits >> 16) & 1) != 0) + pub fn sstop(&self) -> SstopR { + SstopR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Receive Buffer Full Interrupt Flag"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 17) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Clock Low Error Interrupt Flag"] #[inline(always)] - pub fn clerr(&self) -> CLERR_R { - CLERR_R::new(((self.bits >> 18) & 1) != 0) + pub fn clerr(&self) -> ClerrR { + ClerrR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - SCL Error Interrupt Flag"] #[inline(always)] - pub fn sclerr(&self) -> SCLERR_R { - SCLERR_R::new(((self.bits >> 19) & 1) != 0) + pub fn sclerr(&self) -> SclerrR { + SclerrR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - SDA Error Interrupt Flag"] #[inline(always)] - pub fn sdaerr(&self) -> SDAERR_R { - SDAERR_R::new(((self.bits >> 20) & 1) != 0) + pub fn sdaerr(&self) -> SdaerrR { + SdaerrR::new(((self.bits >> 20) & 1) != 0) } } impl W { #[doc = "Bit 0 - START condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Repeated START condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rstart(&mut self) -> RSTART_W<1> { - RSTART_W::new(self) + pub fn rstart(&mut self) -> RstartW { + RstartW::new(self, 1) } #[doc = "Bit 2 - Address Interrupt Flag"] #[inline(always)] #[must_use] - pub fn addr(&mut self) -> ADDR_W<2> { - ADDR_W::new(self) + pub fn addr(&mut self) -> AddrW { + AddrW::new(self, 2) } #[doc = "Bit 3 - Transfer Completed Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txc(&mut self) -> TXC_W<3> { - TXC_W::new(self) + pub fn txc(&mut self) -> TxcW { + TxcW::new(self, 3) } #[doc = "Bit 4 - Transmit Buffer Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txbl(&mut self) -> TXBL_W<4> { - TXBL_W::new(self) + pub fn txbl(&mut self) -> TxblW { + TxblW::new(self, 4) } #[doc = "Bit 5 - Receive Data Valid Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxdatav(&mut self) -> RXDATAV_W<5> { - RXDATAV_W::new(self) + pub fn rxdatav(&mut self) -> RxdatavW { + RxdatavW::new(self, 5) } #[doc = "Bit 6 - Acknowledge Received Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ack(&mut self) -> ACK_W<6> { - ACK_W::new(self) + pub fn ack(&mut self) -> AckW { + AckW::new(self, 6) } #[doc = "Bit 7 - Not Acknowledge Received Interrupt Flag"] #[inline(always)] #[must_use] - pub fn nack(&mut self) -> NACK_W<7> { - NACK_W::new(self) + pub fn nack(&mut self) -> NackW { + NackW::new(self, 7) } #[doc = "Bit 8 - Leader STOP Condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn mstop(&mut self) -> MSTOP_W<8> { - MSTOP_W::new(self) + pub fn mstop(&mut self) -> MstopW { + MstopW::new(self, 8) } #[doc = "Bit 9 - Arbitration Lost Interrupt Flag"] #[inline(always)] #[must_use] - pub fn arblost(&mut self) -> ARBLOST_W<9> { - ARBLOST_W::new(self) + pub fn arblost(&mut self) -> ArblostW { + ArblostW::new(self, 9) } #[doc = "Bit 10 - Bus Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn buserr(&mut self) -> BUSERR_W<10> { - BUSERR_W::new(self) + pub fn buserr(&mut self) -> BuserrW { + BuserrW::new(self, 10) } #[doc = "Bit 11 - Bus Held Interrupt Flag"] #[inline(always)] #[must_use] - pub fn bushold(&mut self) -> BUSHOLD_W<11> { - BUSHOLD_W::new(self) + pub fn bushold(&mut self) -> BusholdW { + BusholdW::new(self, 11) } #[doc = "Bit 12 - Transmit Buffer Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txof(&mut self) -> TXOF_W<12> { - TXOF_W::new(self) + pub fn txof(&mut self) -> TxofW { + TxofW::new(self, 12) } #[doc = "Bit 13 - Receive Buffer Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxuf(&mut self) -> RXUF_W<13> { - RXUF_W::new(self) + pub fn rxuf(&mut self) -> RxufW { + RxufW::new(self, 13) } #[doc = "Bit 14 - Bus Idle Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn bito(&mut self) -> BITO_W<14> { - BITO_W::new(self) + pub fn bito(&mut self) -> BitoW { + BitoW::new(self, 14) } #[doc = "Bit 15 - Clock Low Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn clto(&mut self) -> CLTO_W<15> { - CLTO_W::new(self) + pub fn clto(&mut self) -> CltoW { + CltoW::new(self, 15) } #[doc = "Bit 16 - Follower STOP condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sstop(&mut self) -> SSTOP_W<16> { - SSTOP_W::new(self) + pub fn sstop(&mut self) -> SstopW { + SstopW::new(self, 16) } #[doc = "Bit 17 - Receive Buffer Full Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxfull(&mut self) -> RXFULL_W<17> { - RXFULL_W::new(self) + pub fn rxfull(&mut self) -> RxfullW { + RxfullW::new(self, 17) } #[doc = "Bit 18 - Clock Low Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn clerr(&mut self) -> CLERR_W<18> { - CLERR_W::new(self) + pub fn clerr(&mut self) -> ClerrW { + ClerrW::new(self, 18) } #[doc = "Bit 19 - SCL Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sclerr(&mut self) -> SCLERR_W<19> { - SCLERR_W::new(self) + pub fn sclerr(&mut self) -> SclerrW { + SclerrW::new(self, 19) } #[doc = "Bit 20 - SDA Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sdaerr(&mut self) -> SDAERR_W<20> { - SDAERR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sdaerr(&mut self) -> SdaerrW { + SdaerrW::new(self, 20) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/if_.rs index e57ddea..5e8ea0d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/if_.rs @@ -1,380 +1,340 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` reader - START condition Interrupt Flag"] -pub type START_R = crate::BitReader; +pub type StartR = crate::BitReader; #[doc = "Field `START` writer - START condition Interrupt Flag"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RSTART` reader - Repeated START condition Interrupt Flag"] -pub type RSTART_R = crate::BitReader; +pub type RstartR = crate::BitReader; #[doc = "Field `RSTART` writer - Repeated START condition Interrupt Flag"] -pub type RSTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RstartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ADDR` reader - Address Interrupt Flag"] -pub type ADDR_R = crate::BitReader; +pub type AddrR = crate::BitReader; #[doc = "Field `ADDR` writer - Address Interrupt Flag"] -pub type ADDR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AddrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXC` reader - Transfer Completed Interrupt Flag"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXC` writer - Transfer Completed Interrupt Flag"] -pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXBL` reader - Transmit Buffer Level Interrupt Flag"] -pub type TXBL_R = crate::BitReader; +pub type TxblR = crate::BitReader; #[doc = "Field `TXBL` writer - Transmit Buffer Level Interrupt Flag"] -pub type TXBL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxblW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXDATAV` reader - Receive Data Valid Interrupt Flag"] -pub type RXDATAV_R = crate::BitReader; +pub type RxdatavR = crate::BitReader; #[doc = "Field `RXDATAV` writer - Receive Data Valid Interrupt Flag"] -pub type RXDATAV_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxdatavW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACK` reader - Acknowledge Received Interrupt Flag"] -pub type ACK_R = crate::BitReader; +pub type AckR = crate::BitReader; #[doc = "Field `ACK` writer - Acknowledge Received Interrupt Flag"] -pub type ACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AckW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NACK` reader - Not Acknowledge Received Interrupt Flag"] -pub type NACK_R = crate::BitReader; +pub type NackR = crate::BitReader; #[doc = "Field `NACK` writer - Not Acknowledge Received Interrupt Flag"] -pub type NACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type NackW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MSTOP` reader - Leader STOP Condition Interrupt Flag"] -pub type MSTOP_R = crate::BitReader; +pub type MstopR = crate::BitReader; #[doc = "Field `MSTOP` writer - Leader STOP Condition Interrupt Flag"] -pub type MSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type MstopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ARBLOST` reader - Arbitration Lost Interrupt Flag"] -pub type ARBLOST_R = crate::BitReader; +pub type ArblostR = crate::BitReader; #[doc = "Field `ARBLOST` writer - Arbitration Lost Interrupt Flag"] -pub type ARBLOST_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ArblostW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSERR` reader - Bus Error Interrupt Flag"] -pub type BUSERR_R = crate::BitReader; +pub type BuserrR = crate::BitReader; #[doc = "Field `BUSERR` writer - Bus Error Interrupt Flag"] -pub type BUSERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type BuserrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSHOLD` reader - Bus Held Interrupt Flag"] -pub type BUSHOLD_R = crate::BitReader; +pub type BusholdR = crate::BitReader; #[doc = "Field `BUSHOLD` writer - Bus Held Interrupt Flag"] -pub type BUSHOLD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type BusholdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXOF` reader - Transmit Buffer Overflow Interrupt Flag"] -pub type TXOF_R = crate::BitReader; +pub type TxofR = crate::BitReader; #[doc = "Field `TXOF` writer - Transmit Buffer Overflow Interrupt Flag"] -pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUF` reader - Receive Buffer Underflow Interrupt Flag"] -pub type RXUF_R = crate::BitReader; +pub type RxufR = crate::BitReader; #[doc = "Field `RXUF` writer - Receive Buffer Underflow Interrupt Flag"] -pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BITO` reader - Bus Idle Timeout Interrupt Flag"] -pub type BITO_R = crate::BitReader; +pub type BitoR = crate::BitReader; #[doc = "Field `BITO` writer - Bus Idle Timeout Interrupt Flag"] -pub type BITO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type BitoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLTO` reader - Clock Low Timeout Interrupt Flag"] -pub type CLTO_R = crate::BitReader; +pub type CltoR = crate::BitReader; #[doc = "Field `CLTO` writer - Clock Low Timeout Interrupt Flag"] -pub type CLTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type CltoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SSTOP` reader - Follower STOP condition Interrupt Flag"] -pub type SSTOP_R = crate::BitReader; +pub type SstopR = crate::BitReader; #[doc = "Field `SSTOP` writer - Follower STOP condition Interrupt Flag"] -pub type SSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SstopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFULL` reader - Receive Buffer Full Interrupt Flag"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXFULL` writer - Receive Buffer Full Interrupt Flag"] -pub type RXFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxfullW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLERR` reader - Clock Low Error Interrupt Flag"] -pub type CLERR_R = crate::BitReader; +pub type ClerrR = crate::BitReader; #[doc = "Field `CLERR` writer - Clock Low Error Interrupt Flag"] -pub type CLERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ClerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCLERR` reader - SCL Error Interrupt Flag"] -pub type SCLERR_R = crate::BitReader; +pub type SclerrR = crate::BitReader; #[doc = "Field `SCLERR` writer - SCL Error Interrupt Flag"] -pub type SCLERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SclerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SDAERR` reader - SDA Error Interrupt Flag"] -pub type SDAERR_R = crate::BitReader; +pub type SdaerrR = crate::BitReader; #[doc = "Field `SDAERR` writer - SDA Error Interrupt Flag"] -pub type SDAERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SdaerrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - START condition Interrupt Flag"] #[inline(always)] - pub fn start(&self) -> START_R { - START_R::new((self.bits & 1) != 0) + pub fn start(&self) -> StartR { + StartR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Repeated START condition Interrupt Flag"] #[inline(always)] - pub fn rstart(&self) -> RSTART_R { - RSTART_R::new(((self.bits >> 1) & 1) != 0) + pub fn rstart(&self) -> RstartR { + RstartR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Address Interrupt Flag"] #[inline(always)] - pub fn addr(&self) -> ADDR_R { - ADDR_R::new(((self.bits >> 2) & 1) != 0) + pub fn addr(&self) -> AddrR { + AddrR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Transfer Completed Interrupt Flag"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new(((self.bits >> 3) & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Transmit Buffer Level Interrupt Flag"] #[inline(always)] - pub fn txbl(&self) -> TXBL_R { - TXBL_R::new(((self.bits >> 4) & 1) != 0) + pub fn txbl(&self) -> TxblR { + TxblR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Receive Data Valid Interrupt Flag"] #[inline(always)] - pub fn rxdatav(&self) -> RXDATAV_R { - RXDATAV_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxdatav(&self) -> RxdatavR { + RxdatavR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Acknowledge Received Interrupt Flag"] #[inline(always)] - pub fn ack(&self) -> ACK_R { - ACK_R::new(((self.bits >> 6) & 1) != 0) + pub fn ack(&self) -> AckR { + AckR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Not Acknowledge Received Interrupt Flag"] #[inline(always)] - pub fn nack(&self) -> NACK_R { - NACK_R::new(((self.bits >> 7) & 1) != 0) + pub fn nack(&self) -> NackR { + NackR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Leader STOP Condition Interrupt Flag"] #[inline(always)] - pub fn mstop(&self) -> MSTOP_R { - MSTOP_R::new(((self.bits >> 8) & 1) != 0) + pub fn mstop(&self) -> MstopR { + MstopR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Arbitration Lost Interrupt Flag"] #[inline(always)] - pub fn arblost(&self) -> ARBLOST_R { - ARBLOST_R::new(((self.bits >> 9) & 1) != 0) + pub fn arblost(&self) -> ArblostR { + ArblostR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Bus Error Interrupt Flag"] #[inline(always)] - pub fn buserr(&self) -> BUSERR_R { - BUSERR_R::new(((self.bits >> 10) & 1) != 0) + pub fn buserr(&self) -> BuserrR { + BuserrR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Bus Held Interrupt Flag"] #[inline(always)] - pub fn bushold(&self) -> BUSHOLD_R { - BUSHOLD_R::new(((self.bits >> 11) & 1) != 0) + pub fn bushold(&self) -> BusholdR { + BusholdR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Transmit Buffer Overflow Interrupt Flag"] #[inline(always)] - pub fn txof(&self) -> TXOF_R { - TXOF_R::new(((self.bits >> 12) & 1) != 0) + pub fn txof(&self) -> TxofR { + TxofR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Receive Buffer Underflow Interrupt Flag"] #[inline(always)] - pub fn rxuf(&self) -> RXUF_R { - RXUF_R::new(((self.bits >> 13) & 1) != 0) + pub fn rxuf(&self) -> RxufR { + RxufR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Bus Idle Timeout Interrupt Flag"] #[inline(always)] - pub fn bito(&self) -> BITO_R { - BITO_R::new(((self.bits >> 14) & 1) != 0) + pub fn bito(&self) -> BitoR { + BitoR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Clock Low Timeout Interrupt Flag"] #[inline(always)] - pub fn clto(&self) -> CLTO_R { - CLTO_R::new(((self.bits >> 15) & 1) != 0) + pub fn clto(&self) -> CltoR { + CltoR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Follower STOP condition Interrupt Flag"] #[inline(always)] - pub fn sstop(&self) -> SSTOP_R { - SSTOP_R::new(((self.bits >> 16) & 1) != 0) + pub fn sstop(&self) -> SstopR { + SstopR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Receive Buffer Full Interrupt Flag"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 17) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Clock Low Error Interrupt Flag"] #[inline(always)] - pub fn clerr(&self) -> CLERR_R { - CLERR_R::new(((self.bits >> 18) & 1) != 0) + pub fn clerr(&self) -> ClerrR { + ClerrR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - SCL Error Interrupt Flag"] #[inline(always)] - pub fn sclerr(&self) -> SCLERR_R { - SCLERR_R::new(((self.bits >> 19) & 1) != 0) + pub fn sclerr(&self) -> SclerrR { + SclerrR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - SDA Error Interrupt Flag"] #[inline(always)] - pub fn sdaerr(&self) -> SDAERR_R { - SDAERR_R::new(((self.bits >> 20) & 1) != 0) + pub fn sdaerr(&self) -> SdaerrR { + SdaerrR::new(((self.bits >> 20) & 1) != 0) } } impl W { #[doc = "Bit 0 - START condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Repeated START condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rstart(&mut self) -> RSTART_W<1> { - RSTART_W::new(self) + pub fn rstart(&mut self) -> RstartW { + RstartW::new(self, 1) } #[doc = "Bit 2 - Address Interrupt Flag"] #[inline(always)] #[must_use] - pub fn addr(&mut self) -> ADDR_W<2> { - ADDR_W::new(self) + pub fn addr(&mut self) -> AddrW { + AddrW::new(self, 2) } #[doc = "Bit 3 - Transfer Completed Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txc(&mut self) -> TXC_W<3> { - TXC_W::new(self) + pub fn txc(&mut self) -> TxcW { + TxcW::new(self, 3) } #[doc = "Bit 4 - Transmit Buffer Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txbl(&mut self) -> TXBL_W<4> { - TXBL_W::new(self) + pub fn txbl(&mut self) -> TxblW { + TxblW::new(self, 4) } #[doc = "Bit 5 - Receive Data Valid Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxdatav(&mut self) -> RXDATAV_W<5> { - RXDATAV_W::new(self) + pub fn rxdatav(&mut self) -> RxdatavW { + RxdatavW::new(self, 5) } #[doc = "Bit 6 - Acknowledge Received Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ack(&mut self) -> ACK_W<6> { - ACK_W::new(self) + pub fn ack(&mut self) -> AckW { + AckW::new(self, 6) } #[doc = "Bit 7 - Not Acknowledge Received Interrupt Flag"] #[inline(always)] #[must_use] - pub fn nack(&mut self) -> NACK_W<7> { - NACK_W::new(self) + pub fn nack(&mut self) -> NackW { + NackW::new(self, 7) } #[doc = "Bit 8 - Leader STOP Condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn mstop(&mut self) -> MSTOP_W<8> { - MSTOP_W::new(self) + pub fn mstop(&mut self) -> MstopW { + MstopW::new(self, 8) } #[doc = "Bit 9 - Arbitration Lost Interrupt Flag"] #[inline(always)] #[must_use] - pub fn arblost(&mut self) -> ARBLOST_W<9> { - ARBLOST_W::new(self) + pub fn arblost(&mut self) -> ArblostW { + ArblostW::new(self, 9) } #[doc = "Bit 10 - Bus Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn buserr(&mut self) -> BUSERR_W<10> { - BUSERR_W::new(self) + pub fn buserr(&mut self) -> BuserrW { + BuserrW::new(self, 10) } #[doc = "Bit 11 - Bus Held Interrupt Flag"] #[inline(always)] #[must_use] - pub fn bushold(&mut self) -> BUSHOLD_W<11> { - BUSHOLD_W::new(self) + pub fn bushold(&mut self) -> BusholdW { + BusholdW::new(self, 11) } #[doc = "Bit 12 - Transmit Buffer Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txof(&mut self) -> TXOF_W<12> { - TXOF_W::new(self) + pub fn txof(&mut self) -> TxofW { + TxofW::new(self, 12) } #[doc = "Bit 13 - Receive Buffer Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxuf(&mut self) -> RXUF_W<13> { - RXUF_W::new(self) + pub fn rxuf(&mut self) -> RxufW { + RxufW::new(self, 13) } #[doc = "Bit 14 - Bus Idle Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn bito(&mut self) -> BITO_W<14> { - BITO_W::new(self) + pub fn bito(&mut self) -> BitoW { + BitoW::new(self, 14) } #[doc = "Bit 15 - Clock Low Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn clto(&mut self) -> CLTO_W<15> { - CLTO_W::new(self) + pub fn clto(&mut self) -> CltoW { + CltoW::new(self, 15) } #[doc = "Bit 16 - Follower STOP condition Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sstop(&mut self) -> SSTOP_W<16> { - SSTOP_W::new(self) + pub fn sstop(&mut self) -> SstopW { + SstopW::new(self, 16) } #[doc = "Bit 17 - Receive Buffer Full Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxfull(&mut self) -> RXFULL_W<17> { - RXFULL_W::new(self) + pub fn rxfull(&mut self) -> RxfullW { + RxfullW::new(self, 17) } #[doc = "Bit 18 - Clock Low Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn clerr(&mut self) -> CLERR_W<18> { - CLERR_W::new(self) + pub fn clerr(&mut self) -> ClerrW { + ClerrW::new(self, 18) } #[doc = "Bit 19 - SCL Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sclerr(&mut self) -> SCLERR_W<19> { - SCLERR_W::new(self) + pub fn sclerr(&mut self) -> SclerrW { + SclerrW::new(self, 19) } #[doc = "Bit 20 - SDA Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sdaerr(&mut self) -> SDAERR_W<20> { - SDAERR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sdaerr(&mut self) -> SdaerrW { + SdaerrW::new(self, 20) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/ipversion.rs index 78e00e2..b808ecb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/rxdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/rxdata.rs index 6197259..b8a3ba6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/rxdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/rxdata.rs @@ -1,37 +1,22 @@ #[doc = "Register `RXDATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATA` reader - RX Data"] -pub type RXDATA_R = crate::FieldReader; +pub type RxdataR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - RX Data"] #[inline(always)] - pub fn rxdata(&self) -> RXDATA_R { - RXDATA_R::new((self.bits & 0xff) as u8) + pub fn rxdata(&self) -> RxdataR { + RxdataR::new((self.bits & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdata](index.html) module"] -pub struct RXDATA_SPEC; -impl crate::RegisterSpec for RXDATA_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdata::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdataSpec; +impl crate::RegisterSpec for RxdataSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdata::R](R) reader structure"] -impl crate::Readable for RXDATA_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdata::R`](R) reader structure"] +impl crate::Readable for RxdataSpec {} #[doc = "`reset()` method sets RXDATA to value 0"] -impl crate::Resettable for RXDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/rxdatap.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/rxdatap.rs index f7c8c79..3debe5f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/rxdatap.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/rxdatap.rs @@ -1,37 +1,22 @@ #[doc = "Register `RXDATAP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATAP` reader - RX Data Peek"] -pub type RXDATAP_R = crate::FieldReader; +pub type RxdatapR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - RX Data Peek"] #[inline(always)] - pub fn rxdatap(&self) -> RXDATAP_R { - RXDATAP_R::new((self.bits & 0xff) as u8) + pub fn rxdatap(&self) -> RxdatapR { + RxdatapR::new((self.bits & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdatap](index.html) module"] -pub struct RXDATAP_SPEC; -impl crate::RegisterSpec for RXDATAP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdatap::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdatapSpec; +impl crate::RegisterSpec for RxdatapSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdatap::R](R) reader structure"] -impl crate::Readable for RXDATAP_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdatap::R`](R) reader structure"] +impl crate::Readable for RxdatapSpec {} #[doc = "`reset()` method sets RXDATAP to value 0"] -impl crate::Resettable for RXDATAP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdatapSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/rxdouble.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/rxdouble.rs index d739f89..dcc567b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/rxdouble.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/rxdouble.rs @@ -1,44 +1,29 @@ #[doc = "Register `RXDOUBLE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATA0` reader - RX Data 0"] -pub type RXDATA0_R = crate::FieldReader; +pub type Rxdata0R = crate::FieldReader; #[doc = "Field `RXDATA1` reader - RX Data 1"] -pub type RXDATA1_R = crate::FieldReader; +pub type Rxdata1R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - RX Data 0"] #[inline(always)] - pub fn rxdata0(&self) -> RXDATA0_R { - RXDATA0_R::new((self.bits & 0xff) as u8) + pub fn rxdata0(&self) -> Rxdata0R { + Rxdata0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - RX Data 1"] #[inline(always)] - pub fn rxdata1(&self) -> RXDATA1_R { - RXDATA1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn rxdata1(&self) -> Rxdata1R { + Rxdata1R::new(((self.bits >> 8) & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdouble](index.html) module"] -pub struct RXDOUBLE_SPEC; -impl crate::RegisterSpec for RXDOUBLE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdouble::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdoubleSpec; +impl crate::RegisterSpec for RxdoubleSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdouble::R](R) reader structure"] -impl crate::Readable for RXDOUBLE_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdouble::R`](R) reader structure"] +impl crate::Readable for RxdoubleSpec {} #[doc = "`reset()` method sets RXDOUBLE to value 0"] -impl crate::Resettable for RXDOUBLE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdoubleSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/rxdoublep.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/rxdoublep.rs index e20f7a0..de51da4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/rxdoublep.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/rxdoublep.rs @@ -1,44 +1,29 @@ #[doc = "Register `RXDOUBLEP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATAP0` reader - RX Data 0 Peek"] -pub type RXDATAP0_R = crate::FieldReader; +pub type Rxdatap0R = crate::FieldReader; #[doc = "Field `RXDATAP1` reader - RX Data 1 Peek"] -pub type RXDATAP1_R = crate::FieldReader; +pub type Rxdatap1R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - RX Data 0 Peek"] #[inline(always)] - pub fn rxdatap0(&self) -> RXDATAP0_R { - RXDATAP0_R::new((self.bits & 0xff) as u8) + pub fn rxdatap0(&self) -> Rxdatap0R { + Rxdatap0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - RX Data 1 Peek"] #[inline(always)] - pub fn rxdatap1(&self) -> RXDATAP1_R { - RXDATAP1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn rxdatap1(&self) -> Rxdatap1R { + Rxdatap1R::new(((self.bits >> 8) & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdoublep](index.html) module"] -pub struct RXDOUBLEP_SPEC; -impl crate::RegisterSpec for RXDOUBLEP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdoublep::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdoublepSpec; +impl crate::RegisterSpec for RxdoublepSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdoublep::R](R) reader structure"] -impl crate::Readable for RXDOUBLEP_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdoublep::R`](R) reader structure"] +impl crate::Readable for RxdoublepSpec {} #[doc = "`reset()` method sets RXDOUBLEP to value 0"] -impl crate::Resettable for RXDOUBLEP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdoublepSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/saddr.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/saddr.rs index c1201af..852c222 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/saddr.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/saddr.rs @@ -1,80 +1,40 @@ #[doc = "Register `SADDR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SADDR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ADDR` reader - Follower address"] -pub type ADDR_R = crate::FieldReader; +pub type AddrR = crate::FieldReader; #[doc = "Field `ADDR` writer - Follower address"] -pub type ADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SADDR_SPEC, u8, u8, 7, O>; +pub type AddrW<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { #[doc = "Bits 1:7 - Follower address"] #[inline(always)] - pub fn addr(&self) -> ADDR_R { - ADDR_R::new(((self.bits >> 1) & 0x7f) as u8) + pub fn addr(&self) -> AddrR { + AddrR::new(((self.bits >> 1) & 0x7f) as u8) } } impl W { #[doc = "Bits 1:7 - Follower address"] #[inline(always)] #[must_use] - pub fn addr(&mut self) -> ADDR_W<1> { - ADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn addr(&mut self) -> AddrW { + AddrW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [saddr](index.html) module"] -pub struct SADDR_SPEC; -impl crate::RegisterSpec for SADDR_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`saddr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`saddr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SaddrSpec; +impl crate::RegisterSpec for SaddrSpec { type Ux = u32; } -#[doc = "`read()` method returns [saddr::R](R) reader structure"] -impl crate::Readable for SADDR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [saddr::W](W) writer structure"] -impl crate::Writable for SADDR_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`saddr::R`](R) reader structure"] +impl crate::Readable for SaddrSpec {} +#[doc = "`write(|w| ..)` method takes [`saddr::W`](W) writer structure"] +impl crate::Writable for SaddrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SADDR to value 0"] -impl crate::Resettable for SADDR_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SaddrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/saddrmask.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/saddrmask.rs index 41bf4fc..8bd87ec 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/saddrmask.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/saddrmask.rs @@ -1,80 +1,40 @@ #[doc = "Register `SADDRMASK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SADDRMASK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SADDRMASK` reader - Follower Address Mask"] -pub type SADDRMASK_R = crate::FieldReader; +pub type SaddrmaskR = crate::FieldReader; #[doc = "Field `SADDRMASK` writer - Follower Address Mask"] -pub type SADDRMASK_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SADDRMASK_SPEC, u8, u8, 7, O>; +pub type SaddrmaskW<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { #[doc = "Bits 1:7 - Follower Address Mask"] #[inline(always)] - pub fn saddrmask(&self) -> SADDRMASK_R { - SADDRMASK_R::new(((self.bits >> 1) & 0x7f) as u8) + pub fn saddrmask(&self) -> SaddrmaskR { + SaddrmaskR::new(((self.bits >> 1) & 0x7f) as u8) } } impl W { #[doc = "Bits 1:7 - Follower Address Mask"] #[inline(always)] #[must_use] - pub fn saddrmask(&mut self) -> SADDRMASK_W<1> { - SADDRMASK_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn saddrmask(&mut self) -> SaddrmaskW { + SaddrmaskW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [saddrmask](index.html) module"] -pub struct SADDRMASK_SPEC; -impl crate::RegisterSpec for SADDRMASK_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`saddrmask::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`saddrmask::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SaddrmaskSpec; +impl crate::RegisterSpec for SaddrmaskSpec { type Ux = u32; } -#[doc = "`read()` method returns [saddrmask::R](R) reader structure"] -impl crate::Readable for SADDRMASK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [saddrmask::W](W) writer structure"] -impl crate::Writable for SADDRMASK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`saddrmask::R`](R) reader structure"] +impl crate::Readable for SaddrmaskSpec {} +#[doc = "`write(|w| ..)` method takes [`saddrmask::W`](W) writer structure"] +impl crate::Writable for SaddrmaskSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SADDRMASK to value 0"] -impl crate::Resettable for SADDRMASK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SaddrmaskSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/state.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/state.rs index 67cf43d..8727108 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/state.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/state.rs @@ -1,148 +1,137 @@ #[doc = "Register `STATE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `BUSY` reader - Bus Busy"] -pub type BUSY_R = crate::BitReader; +pub type BusyR = crate::BitReader; #[doc = "Field `MASTER` reader - Leader"] -pub type MASTER_R = crate::BitReader; +pub type MasterR = crate::BitReader; #[doc = "Field `TRANSMITTER` reader - Transmitter"] -pub type TRANSMITTER_R = crate::BitReader; +pub type TransmitterR = crate::BitReader; #[doc = "Field `NACKED` reader - Nack Received"] -pub type NACKED_R = crate::BitReader; +pub type NackedR = crate::BitReader; #[doc = "Field `BUSHOLD` reader - Bus Held"] -pub type BUSHOLD_R = crate::BitReader; -#[doc = "Field `STATE` reader - Transmission State"] -pub type STATE_R = crate::FieldReader; +pub type BusholdR = crate::BitReader; #[doc = "Transmission State\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STATE_A { +pub enum State { #[doc = "0: No transmission is being performed."] - IDLE = 0, + Idle = 0, #[doc = "1: Waiting for idle. Will send a start condition as soon as the bus is idle."] - WAIT = 1, + Wait = 1, #[doc = "2: Start transmit phase"] - START = 2, + Start = 2, #[doc = "3: Address transmit or receive phase"] - ADDR = 3, + Addr = 3, #[doc = "4: Address ack/nack transmit or receive phase"] - ADDRACK = 4, + Addrack = 4, #[doc = "5: Data transmit or receive phase"] - DATA = 5, + Data = 5, #[doc = "6: Data ack/nack transmit or receive phase"] - DATAACK = 6, + Dataack = 6, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STATE_A) -> Self { + fn from(variant: State) -> Self { variant as _ } } -impl STATE_R { +impl crate::FieldSpec for State { + type Ux = u8; +} +impl crate::IsEnum for State {} +#[doc = "Field `STATE` reader - Transmission State"] +pub type StateR = crate::FieldReader; +impl StateR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(STATE_A::IDLE), - 1 => Some(STATE_A::WAIT), - 2 => Some(STATE_A::START), - 3 => Some(STATE_A::ADDR), - 4 => Some(STATE_A::ADDRACK), - 5 => Some(STATE_A::DATA), - 6 => Some(STATE_A::DATAACK), + 0 => Some(State::Idle), + 1 => Some(State::Wait), + 2 => Some(State::Start), + 3 => Some(State::Addr), + 4 => Some(State::Addrack), + 5 => Some(State::Data), + 6 => Some(State::Dataack), _ => None, } } - #[doc = "Checks if the value of the field is `IDLE`"] + #[doc = "No transmission is being performed."] #[inline(always)] pub fn is_idle(&self) -> bool { - *self == STATE_A::IDLE + *self == State::Idle } - #[doc = "Checks if the value of the field is `WAIT`"] + #[doc = "Waiting for idle. Will send a start condition as soon as the bus is idle."] #[inline(always)] pub fn is_wait(&self) -> bool { - *self == STATE_A::WAIT + *self == State::Wait } - #[doc = "Checks if the value of the field is `START`"] + #[doc = "Start transmit phase"] #[inline(always)] pub fn is_start(&self) -> bool { - *self == STATE_A::START + *self == State::Start } - #[doc = "Checks if the value of the field is `ADDR`"] + #[doc = "Address transmit or receive phase"] #[inline(always)] pub fn is_addr(&self) -> bool { - *self == STATE_A::ADDR + *self == State::Addr } - #[doc = "Checks if the value of the field is `ADDRACK`"] + #[doc = "Address ack/nack transmit or receive phase"] #[inline(always)] pub fn is_addrack(&self) -> bool { - *self == STATE_A::ADDRACK + *self == State::Addrack } - #[doc = "Checks if the value of the field is `DATA`"] + #[doc = "Data transmit or receive phase"] #[inline(always)] pub fn is_data(&self) -> bool { - *self == STATE_A::DATA + *self == State::Data } - #[doc = "Checks if the value of the field is `DATAACK`"] + #[doc = "Data ack/nack transmit or receive phase"] #[inline(always)] pub fn is_dataack(&self) -> bool { - *self == STATE_A::DATAACK + *self == State::Dataack } } impl R { #[doc = "Bit 0 - Bus Busy"] #[inline(always)] - pub fn busy(&self) -> BUSY_R { - BUSY_R::new((self.bits & 1) != 0) + pub fn busy(&self) -> BusyR { + BusyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Leader"] #[inline(always)] - pub fn master(&self) -> MASTER_R { - MASTER_R::new(((self.bits >> 1) & 1) != 0) + pub fn master(&self) -> MasterR { + MasterR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Transmitter"] #[inline(always)] - pub fn transmitter(&self) -> TRANSMITTER_R { - TRANSMITTER_R::new(((self.bits >> 2) & 1) != 0) + pub fn transmitter(&self) -> TransmitterR { + TransmitterR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Nack Received"] #[inline(always)] - pub fn nacked(&self) -> NACKED_R { - NACKED_R::new(((self.bits >> 3) & 1) != 0) + pub fn nacked(&self) -> NackedR { + NackedR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Bus Held"] #[inline(always)] - pub fn bushold(&self) -> BUSHOLD_R { - BUSHOLD_R::new(((self.bits >> 4) & 1) != 0) + pub fn bushold(&self) -> BusholdR { + BusholdR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 5:7 - Transmission State"] #[inline(always)] - pub fn state(&self) -> STATE_R { - STATE_R::new(((self.bits >> 5) & 7) as u8) + pub fn state(&self) -> StateR { + StateR::new(((self.bits >> 5) & 7) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [state](index.html) module"] -pub struct STATE_SPEC; -impl crate::RegisterSpec for STATE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`state::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StateSpec; +impl crate::RegisterSpec for StateSpec { type Ux = u32; } -#[doc = "`read()` method returns [state::R](R) reader structure"] -impl crate::Readable for STATE_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`state::R`](R) reader structure"] +impl crate::Readable for StateSpec {} #[doc = "`reset()` method sets STATE to value 0x01"] -impl crate::Resettable for STATE_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for StateSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/status.rs index 1688cd6..8f60c29 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/status.rs @@ -1,107 +1,92 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `PSTART` reader - Pending START"] -pub type PSTART_R = crate::BitReader; +pub type PstartR = crate::BitReader; #[doc = "Field `PSTOP` reader - Pending STOP"] -pub type PSTOP_R = crate::BitReader; +pub type PstopR = crate::BitReader; #[doc = "Field `PACK` reader - Pending ACK"] -pub type PACK_R = crate::BitReader; +pub type PackR = crate::BitReader; #[doc = "Field `PNACK` reader - Pending NACK"] -pub type PNACK_R = crate::BitReader; +pub type PnackR = crate::BitReader; #[doc = "Field `PCONT` reader - Pending continue"] -pub type PCONT_R = crate::BitReader; +pub type PcontR = crate::BitReader; #[doc = "Field `PABORT` reader - Pending abort"] -pub type PABORT_R = crate::BitReader; +pub type PabortR = crate::BitReader; #[doc = "Field `TXC` reader - TX Complete"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXBL` reader - TX Buffer Level"] -pub type TXBL_R = crate::BitReader; +pub type TxblR = crate::BitReader; #[doc = "Field `RXDATAV` reader - RX Data Valid"] -pub type RXDATAV_R = crate::BitReader; +pub type RxdatavR = crate::BitReader; #[doc = "Field `RXFULL` reader - RX FIFO Full"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `TXBUFCNT` reader - TX Buffer Count"] -pub type TXBUFCNT_R = crate::FieldReader; +pub type TxbufcntR = crate::FieldReader; impl R { #[doc = "Bit 0 - Pending START"] #[inline(always)] - pub fn pstart(&self) -> PSTART_R { - PSTART_R::new((self.bits & 1) != 0) + pub fn pstart(&self) -> PstartR { + PstartR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Pending STOP"] #[inline(always)] - pub fn pstop(&self) -> PSTOP_R { - PSTOP_R::new(((self.bits >> 1) & 1) != 0) + pub fn pstop(&self) -> PstopR { + PstopR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Pending ACK"] #[inline(always)] - pub fn pack(&self) -> PACK_R { - PACK_R::new(((self.bits >> 2) & 1) != 0) + pub fn pack(&self) -> PackR { + PackR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Pending NACK"] #[inline(always)] - pub fn pnack(&self) -> PNACK_R { - PNACK_R::new(((self.bits >> 3) & 1) != 0) + pub fn pnack(&self) -> PnackR { + PnackR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Pending continue"] #[inline(always)] - pub fn pcont(&self) -> PCONT_R { - PCONT_R::new(((self.bits >> 4) & 1) != 0) + pub fn pcont(&self) -> PcontR { + PcontR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Pending abort"] #[inline(always)] - pub fn pabort(&self) -> PABORT_R { - PABORT_R::new(((self.bits >> 5) & 1) != 0) + pub fn pabort(&self) -> PabortR { + PabortR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX Complete"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new(((self.bits >> 6) & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - TX Buffer Level"] #[inline(always)] - pub fn txbl(&self) -> TXBL_R { - TXBL_R::new(((self.bits >> 7) & 1) != 0) + pub fn txbl(&self) -> TxblR { + TxblR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - RX Data Valid"] #[inline(always)] - pub fn rxdatav(&self) -> RXDATAV_R { - RXDATAV_R::new(((self.bits >> 8) & 1) != 0) + pub fn rxdatav(&self) -> RxdatavR { + RxdatavR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - RX FIFO Full"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 9) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bits 10:11 - TX Buffer Count"] #[inline(always)] - pub fn txbufcnt(&self) -> TXBUFCNT_R { - TXBUFCNT_R::new(((self.bits >> 10) & 3) as u8) + pub fn txbufcnt(&self) -> TxbufcntR { + TxbufcntR::new(((self.bits >> 10) & 3) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0x80"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0x80; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0x80; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/txdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/txdata.rs index e3980b6..61643d3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/txdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/txdata.rs @@ -1,52 +1,27 @@ #[doc = "Register `TXDATA` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXDATA` writer - TX Data"] -pub type TXDATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDATA_SPEC, u8, u8, 8, O>; +pub type TxdataW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - TX Data"] #[inline(always)] #[must_use] - pub fn txdata(&mut self) -> TXDATA_W<0> { - TXDATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txdata(&mut self) -> TxdataW { + TxdataW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdata](index.html) module"] -pub struct TXDATA_SPEC; -impl crate::RegisterSpec for TXDATA_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdata::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxdataSpec; +impl crate::RegisterSpec for TxdataSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [txdata::W](W) writer structure"] -impl crate::Writable for TXDATA_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`txdata::W`](W) writer structure"] +impl crate::Writable for TxdataSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXDATA to value 0"] -impl crate::Resettable for TXDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/txdouble.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/txdouble.rs index 320dad9..9cb5990 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/txdouble.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/i2c1_s/txdouble.rs @@ -1,60 +1,35 @@ #[doc = "Register `TXDOUBLE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXDATA0` writer - TX Data"] -pub type TXDATA0_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDOUBLE_SPEC, u8, u8, 8, O>; +pub type Txdata0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `TXDATA1` writer - TX Data"] -pub type TXDATA1_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDOUBLE_SPEC, u8, u8, 8, O>; +pub type Txdata1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - TX Data"] #[inline(always)] #[must_use] - pub fn txdata0(&mut self) -> TXDATA0_W<0> { - TXDATA0_W::new(self) + pub fn txdata0(&mut self) -> Txdata0W { + Txdata0W::new(self, 0) } #[doc = "Bits 8:15 - TX Data"] #[inline(always)] #[must_use] - pub fn txdata1(&mut self) -> TXDATA1_W<8> { - TXDATA1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txdata1(&mut self) -> Txdata1W { + Txdata1W::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdouble](index.html) module"] -pub struct TXDOUBLE_SPEC; -impl crate::RegisterSpec for TXDOUBLE_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdouble::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxdoubleSpec; +impl crate::RegisterSpec for TxdoubleSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [txdouble::W](W) writer structure"] -impl crate::Writable for TXDOUBLE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`txdouble::W`](W) writer structure"] +impl crate::Writable for TxdoubleSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXDOUBLE to value 0"] -impl crate::Resettable for TXDOUBLE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxdoubleSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns.rs index 4743dca..71c7d30 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns.rs @@ -1,268 +1,528 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + ctrl: Ctrl, + cmd: Cmd, + timer: Timer, + status: Status, + maskreq: Maskreq, + stmask: Stmask, + cmpthr: Cmpthr, + if_: If, + ien: Ien, + trigger: Trigger, + _reserved12: [u8; 0x18], + cfg0: Cfg0, + _reserved13: [u8; 0x04], + scale0: Scale0, + sched0: Sched0, + cfg1: Cfg1, + _reserved16: [u8; 0x04], + scale1: Scale1, + sched1: Sched1, + _reserved18: [u8; 0x08], + singlefifocfg: Singlefifocfg, + singlefifodata: Singlefifodata, + singlefifostat: Singlefifostat, + singledata: Singledata, + scanfifocfg: Scanfifocfg, + scanfifodata: Scanfifodata, + scanfifostat: Scanfifostat, + scandata: Scandata, + _reserved26: [u8; 0x08], + single: Single, + _reserved27: [u8; 0x04], + scan0: Scan0, + scan1: Scan1, + scan2: Scan2, + scan3: Scan3, + scan4: Scan4, + scan5: Scan5, + scan6: Scan6, + scan7: Scan7, + scan8: Scan8, + scan9: Scan9, + scan10: Scan10, + scan11: Scan11, + scan12: Scan12, + scan13: Scan13, + scan14: Scan14, + scan15: Scan15, +} +impl RegisterBlock { #[doc = "0x00 - IPVERSION"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - Enable"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - Control"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x0c - Command"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x10 - Timer"] - pub timer: TIMER, + #[inline(always)] + pub const fn timer(&self) -> &Timer { + &self.timer + } #[doc = "0x14 - Status"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x18 - Mask Request"] - pub maskreq: MASKREQ, + #[inline(always)] + pub const fn maskreq(&self) -> &Maskreq { + &self.maskreq + } #[doc = "0x1c - Scan Table Mask"] - pub stmask: STMASK, + #[inline(always)] + pub const fn stmask(&self) -> &Stmask { + &self.stmask + } #[doc = "0x20 - Comparator Threshold"] - pub cmpthr: CMPTHR, + #[inline(always)] + pub const fn cmpthr(&self) -> &Cmpthr { + &self.cmpthr + } #[doc = "0x24 - Interrupt Flag"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x28 - Interrupt Enable"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x2c - Trigger"] - pub trigger: TRIGGER, - _reserved12: [u8; 0x18], + #[inline(always)] + pub const fn trigger(&self) -> &Trigger { + &self.trigger + } #[doc = "0x48 - Configration"] - pub cfg0: CFG0, - _reserved13: [u8; 0x04], + #[inline(always)] + pub const fn cfg0(&self) -> &Cfg0 { + &self.cfg0 + } #[doc = "0x50 - Scale"] - pub scale0: SCALE0, + #[inline(always)] + pub const fn scale0(&self) -> &Scale0 { + &self.scale0 + } #[doc = "0x54 - Scheduling"] - pub sched0: SCHED0, + #[inline(always)] + pub const fn sched0(&self) -> &Sched0 { + &self.sched0 + } #[doc = "0x58 - Configration"] - pub cfg1: CFG1, - _reserved16: [u8; 0x04], + #[inline(always)] + pub const fn cfg1(&self) -> &Cfg1 { + &self.cfg1 + } #[doc = "0x60 - Scale"] - pub scale1: SCALE1, + #[inline(always)] + pub const fn scale1(&self) -> &Scale1 { + &self.scale1 + } #[doc = "0x64 - Scheduling"] - pub sched1: SCHED1, - _reserved18: [u8; 0x08], + #[inline(always)] + pub const fn sched1(&self) -> &Sched1 { + &self.sched1 + } #[doc = "0x70 - Single FIFO Configuration"] - pub singlefifocfg: SINGLEFIFOCFG, + #[inline(always)] + pub const fn singlefifocfg(&self) -> &Singlefifocfg { + &self.singlefifocfg + } #[doc = "0x74 - Read the oldest valid data from the single FIFO and pop the FIFO"] - pub singlefifodata: SINGLEFIFODATA, + #[inline(always)] + pub const fn singlefifodata(&self) -> &Singlefifodata { + &self.singlefifodata + } #[doc = "0x78 - Single FIFO status"] - pub singlefifostat: SINGLEFIFOSTAT, + #[inline(always)] + pub const fn singlefifostat(&self) -> &Singlefifostat { + &self.singlefifostat + } #[doc = "0x7c - latest single queue conversion data"] - pub singledata: SINGLEDATA, + #[inline(always)] + pub const fn singledata(&self) -> &Singledata { + &self.singledata + } #[doc = "0x80 - SCAN FIFO configuration"] - pub scanfifocfg: SCANFIFOCFG, + #[inline(always)] + pub const fn scanfifocfg(&self) -> &Scanfifocfg { + &self.scanfifocfg + } #[doc = "0x84 - Read the oldest valid data from the scan FIFO and pop the FIFO"] - pub scanfifodata: SCANFIFODATA, + #[inline(always)] + pub const fn scanfifodata(&self) -> &Scanfifodata { + &self.scanfifodata + } #[doc = "0x88 - Scan FIFO status"] - pub scanfifostat: SCANFIFOSTAT, + #[inline(always)] + pub const fn scanfifostat(&self) -> &Scanfifostat { + &self.scanfifostat + } #[doc = "0x8c - Most recent data data from scan queue conversion"] - pub scandata: SCANDATA, - _reserved26: [u8; 0x08], + #[inline(always)] + pub const fn scandata(&self) -> &Scandata { + &self.scandata + } #[doc = "0x98 - No Description"] - pub single: SINGLE, - _reserved27: [u8; 0x04], + #[inline(always)] + pub const fn single(&self) -> &Single { + &self.single + } #[doc = "0xa0 - No Description"] - pub scan0: SCAN0, + #[inline(always)] + pub const fn scan0(&self) -> &Scan0 { + &self.scan0 + } #[doc = "0xa4 - No Description"] - pub scan1: SCAN1, + #[inline(always)] + pub const fn scan1(&self) -> &Scan1 { + &self.scan1 + } #[doc = "0xa8 - No Description"] - pub scan2: SCAN2, + #[inline(always)] + pub const fn scan2(&self) -> &Scan2 { + &self.scan2 + } #[doc = "0xac - No Description"] - pub scan3: SCAN3, + #[inline(always)] + pub const fn scan3(&self) -> &Scan3 { + &self.scan3 + } #[doc = "0xb0 - No Description"] - pub scan4: SCAN4, + #[inline(always)] + pub const fn scan4(&self) -> &Scan4 { + &self.scan4 + } #[doc = "0xb4 - No Description"] - pub scan5: SCAN5, + #[inline(always)] + pub const fn scan5(&self) -> &Scan5 { + &self.scan5 + } #[doc = "0xb8 - No Description"] - pub scan6: SCAN6, + #[inline(always)] + pub const fn scan6(&self) -> &Scan6 { + &self.scan6 + } #[doc = "0xbc - No Description"] - pub scan7: SCAN7, + #[inline(always)] + pub const fn scan7(&self) -> &Scan7 { + &self.scan7 + } #[doc = "0xc0 - No Description"] - pub scan8: SCAN8, + #[inline(always)] + pub const fn scan8(&self) -> &Scan8 { + &self.scan8 + } #[doc = "0xc4 - No Description"] - pub scan9: SCAN9, + #[inline(always)] + pub const fn scan9(&self) -> &Scan9 { + &self.scan9 + } #[doc = "0xc8 - No Description"] - pub scan10: SCAN10, + #[inline(always)] + pub const fn scan10(&self) -> &Scan10 { + &self.scan10 + } #[doc = "0xcc - No Description"] - pub scan11: SCAN11, + #[inline(always)] + pub const fn scan11(&self) -> &Scan11 { + &self.scan11 + } #[doc = "0xd0 - No Description"] - pub scan12: SCAN12, + #[inline(always)] + pub const fn scan12(&self) -> &Scan12 { + &self.scan12 + } #[doc = "0xd4 - No Description"] - pub scan13: SCAN13, + #[inline(always)] + pub const fn scan13(&self) -> &Scan13 { + &self.scan13 + } #[doc = "0xd8 - No Description"] - pub scan14: SCAN14, + #[inline(always)] + pub const fn scan14(&self) -> &Scan14 { + &self.scan14 + } #[doc = "0xdc - No Description"] - pub scan15: SCAN15, + #[inline(always)] + pub const fn scan15(&self) -> &Scan15 { + &self.scan15 + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: IPVERSION\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "IPVERSION"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "Enable"] pub mod en; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: Control\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "Control"] pub mod ctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: Command\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "Command"] pub mod cmd; -#[doc = "TIMER (rw) register accessor: an alias for `Reg`"] -pub type TIMER = crate::Reg; +#[doc = "TIMER (rw) register accessor: Timer\n\nYou can [`read`](crate::Reg::read) this register and get [`timer::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer`] +module"] +#[doc(alias = "TIMER")] +pub type Timer = crate::Reg; #[doc = "Timer"] pub mod timer; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: Status\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "Status"] pub mod status; -#[doc = "MASKREQ (rw) register accessor: an alias for `Reg`"] -pub type MASKREQ = crate::Reg; +#[doc = "MASKREQ (rw) register accessor: Mask Request\n\nYou can [`read`](crate::Reg::read) this register and get [`maskreq::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`maskreq::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@maskreq`] +module"] +#[doc(alias = "MASKREQ")] +pub type Maskreq = crate::Reg; #[doc = "Mask Request"] pub mod maskreq; -#[doc = "STMASK (r) register accessor: an alias for `Reg`"] -pub type STMASK = crate::Reg; +#[doc = "STMASK (r) register accessor: Scan Table Mask\n\nYou can [`read`](crate::Reg::read) this register and get [`stmask::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stmask`] +module"] +#[doc(alias = "STMASK")] +pub type Stmask = crate::Reg; #[doc = "Scan Table Mask"] pub mod stmask; -#[doc = "CMPTHR (rw) register accessor: an alias for `Reg`"] -pub type CMPTHR = crate::Reg; +#[doc = "CMPTHR (rw) register accessor: Comparator Threshold\n\nYou can [`read`](crate::Reg::read) this register and get [`cmpthr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmpthr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmpthr`] +module"] +#[doc(alias = "CMPTHR")] +pub type Cmpthr = crate::Reg; #[doc = "Comparator Threshold"] pub mod cmpthr; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: Interrupt Flag\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "Interrupt Flag"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "Interrupt Enable"] pub mod ien; -#[doc = "TRIGGER (rw) register accessor: an alias for `Reg`"] -pub type TRIGGER = crate::Reg; +#[doc = "TRIGGER (rw) register accessor: Trigger\n\nYou can [`read`](crate::Reg::read) this register and get [`trigger::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trigger::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trigger`] +module"] +#[doc(alias = "TRIGGER")] +pub type Trigger = crate::Reg; #[doc = "Trigger"] pub mod trigger; -#[doc = "CFG0 (rw) register accessor: an alias for `Reg`"] -pub type CFG0 = crate::Reg; +#[doc = "CFG0 (rw) register accessor: Configration\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg0`] +module"] +#[doc(alias = "CFG0")] +pub type Cfg0 = crate::Reg; #[doc = "Configration"] pub mod cfg0; -#[doc = "SCALE0 (rw) register accessor: an alias for `Reg`"] -pub type SCALE0 = crate::Reg; +#[doc = "SCALE0 (rw) register accessor: Scale\n\nYou can [`read`](crate::Reg::read) this register and get [`scale0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scale0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scale0`] +module"] +#[doc(alias = "SCALE0")] +pub type Scale0 = crate::Reg; #[doc = "Scale"] pub mod scale0; -#[doc = "SCHED0 (rw) register accessor: an alias for `Reg`"] -pub type SCHED0 = crate::Reg; +#[doc = "SCHED0 (rw) register accessor: Scheduling\n\nYou can [`read`](crate::Reg::read) this register and get [`sched0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sched0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sched0`] +module"] +#[doc(alias = "SCHED0")] +pub type Sched0 = crate::Reg; #[doc = "Scheduling"] pub mod sched0; -#[doc = "CFG1 (rw) register accessor: an alias for `Reg`"] -pub type CFG1 = crate::Reg; +#[doc = "CFG1 (rw) register accessor: Configration\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg1`] +module"] +#[doc(alias = "CFG1")] +pub type Cfg1 = crate::Reg; #[doc = "Configration"] pub mod cfg1; -#[doc = "SCALE1 (rw) register accessor: an alias for `Reg`"] -pub type SCALE1 = crate::Reg; +#[doc = "SCALE1 (rw) register accessor: Scale\n\nYou can [`read`](crate::Reg::read) this register and get [`scale1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scale1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scale1`] +module"] +#[doc(alias = "SCALE1")] +pub type Scale1 = crate::Reg; #[doc = "Scale"] pub mod scale1; -#[doc = "SCHED1 (rw) register accessor: an alias for `Reg`"] -pub type SCHED1 = crate::Reg; +#[doc = "SCHED1 (rw) register accessor: Scheduling\n\nYou can [`read`](crate::Reg::read) this register and get [`sched1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sched1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sched1`] +module"] +#[doc(alias = "SCHED1")] +pub type Sched1 = crate::Reg; #[doc = "Scheduling"] pub mod sched1; -#[doc = "SINGLEFIFOCFG (rw) register accessor: an alias for `Reg`"] -pub type SINGLEFIFOCFG = crate::Reg; +#[doc = "SINGLEFIFOCFG (rw) register accessor: Single FIFO Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`singlefifocfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`singlefifocfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@singlefifocfg`] +module"] +#[doc(alias = "SINGLEFIFOCFG")] +pub type Singlefifocfg = crate::Reg; #[doc = "Single FIFO Configuration"] pub mod singlefifocfg; -#[doc = "SINGLEFIFODATA (r) register accessor: an alias for `Reg`"] -pub type SINGLEFIFODATA = crate::Reg; +#[doc = "SINGLEFIFODATA (r) register accessor: Read the oldest valid data from the single FIFO and pop the FIFO\n\nYou can [`read`](crate::Reg::read) this register and get [`singlefifodata::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@singlefifodata`] +module"] +#[doc(alias = "SINGLEFIFODATA")] +pub type Singlefifodata = crate::Reg; #[doc = "Read the oldest valid data from the single FIFO and pop the FIFO"] pub mod singlefifodata; -#[doc = "SINGLEFIFOSTAT (r) register accessor: an alias for `Reg`"] -pub type SINGLEFIFOSTAT = crate::Reg; +#[doc = "SINGLEFIFOSTAT (r) register accessor: Single FIFO status\n\nYou can [`read`](crate::Reg::read) this register and get [`singlefifostat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@singlefifostat`] +module"] +#[doc(alias = "SINGLEFIFOSTAT")] +pub type Singlefifostat = crate::Reg; #[doc = "Single FIFO status"] pub mod singlefifostat; -#[doc = "SINGLEDATA (r) register accessor: an alias for `Reg`"] -pub type SINGLEDATA = crate::Reg; +#[doc = "SINGLEDATA (r) register accessor: latest single queue conversion data\n\nYou can [`read`](crate::Reg::read) this register and get [`singledata::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@singledata`] +module"] +#[doc(alias = "SINGLEDATA")] +pub type Singledata = crate::Reg; #[doc = "latest single queue conversion data"] pub mod singledata; -#[doc = "SCANFIFOCFG (rw) register accessor: an alias for `Reg`"] -pub type SCANFIFOCFG = crate::Reg; +#[doc = "SCANFIFOCFG (rw) register accessor: SCAN FIFO configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`scanfifocfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scanfifocfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scanfifocfg`] +module"] +#[doc(alias = "SCANFIFOCFG")] +pub type Scanfifocfg = crate::Reg; #[doc = "SCAN FIFO configuration"] pub mod scanfifocfg; -#[doc = "SCANFIFODATA (r) register accessor: an alias for `Reg`"] -pub type SCANFIFODATA = crate::Reg; +#[doc = "SCANFIFODATA (r) register accessor: Read the oldest valid data from the scan FIFO and pop the FIFO\n\nYou can [`read`](crate::Reg::read) this register and get [`scanfifodata::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scanfifodata`] +module"] +#[doc(alias = "SCANFIFODATA")] +pub type Scanfifodata = crate::Reg; #[doc = "Read the oldest valid data from the scan FIFO and pop the FIFO"] pub mod scanfifodata; -#[doc = "SCANFIFOSTAT (r) register accessor: an alias for `Reg`"] -pub type SCANFIFOSTAT = crate::Reg; +#[doc = "SCANFIFOSTAT (r) register accessor: Scan FIFO status\n\nYou can [`read`](crate::Reg::read) this register and get [`scanfifostat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scanfifostat`] +module"] +#[doc(alias = "SCANFIFOSTAT")] +pub type Scanfifostat = crate::Reg; #[doc = "Scan FIFO status"] pub mod scanfifostat; -#[doc = "SCANDATA (r) register accessor: an alias for `Reg`"] -pub type SCANDATA = crate::Reg; +#[doc = "SCANDATA (r) register accessor: Most recent data data from scan queue conversion\n\nYou can [`read`](crate::Reg::read) this register and get [`scandata::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scandata`] +module"] +#[doc(alias = "SCANDATA")] +pub type Scandata = crate::Reg; #[doc = "Most recent data data from scan queue conversion"] pub mod scandata; -#[doc = "SINGLE (rw) register accessor: an alias for `Reg`"] -pub type SINGLE = crate::Reg; +#[doc = "SINGLE (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`single::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`single::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@single`] +module"] +#[doc(alias = "SINGLE")] +pub type Single = crate::Reg; #[doc = "No Description"] pub mod single; -#[doc = "SCAN0 (rw) register accessor: an alias for `Reg`"] -pub type SCAN0 = crate::Reg; +#[doc = "SCAN0 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan0`] +module"] +#[doc(alias = "SCAN0")] +pub type Scan0 = crate::Reg; #[doc = "No Description"] pub mod scan0; -#[doc = "SCAN1 (rw) register accessor: an alias for `Reg`"] -pub type SCAN1 = crate::Reg; +#[doc = "SCAN1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan1`] +module"] +#[doc(alias = "SCAN1")] +pub type Scan1 = crate::Reg; #[doc = "No Description"] pub mod scan1; -#[doc = "SCAN2 (rw) register accessor: an alias for `Reg`"] -pub type SCAN2 = crate::Reg; +#[doc = "SCAN2 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan2`] +module"] +#[doc(alias = "SCAN2")] +pub type Scan2 = crate::Reg; #[doc = "No Description"] pub mod scan2; -#[doc = "SCAN3 (rw) register accessor: an alias for `Reg`"] -pub type SCAN3 = crate::Reg; +#[doc = "SCAN3 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan3`] +module"] +#[doc(alias = "SCAN3")] +pub type Scan3 = crate::Reg; #[doc = "No Description"] pub mod scan3; -#[doc = "SCAN4 (rw) register accessor: an alias for `Reg`"] -pub type SCAN4 = crate::Reg; +#[doc = "SCAN4 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan4`] +module"] +#[doc(alias = "SCAN4")] +pub type Scan4 = crate::Reg; #[doc = "No Description"] pub mod scan4; -#[doc = "SCAN5 (rw) register accessor: an alias for `Reg`"] -pub type SCAN5 = crate::Reg; +#[doc = "SCAN5 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan5`] +module"] +#[doc(alias = "SCAN5")] +pub type Scan5 = crate::Reg; #[doc = "No Description"] pub mod scan5; -#[doc = "SCAN6 (rw) register accessor: an alias for `Reg`"] -pub type SCAN6 = crate::Reg; +#[doc = "SCAN6 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan6`] +module"] +#[doc(alias = "SCAN6")] +pub type Scan6 = crate::Reg; #[doc = "No Description"] pub mod scan6; -#[doc = "SCAN7 (rw) register accessor: an alias for `Reg`"] -pub type SCAN7 = crate::Reg; +#[doc = "SCAN7 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan7`] +module"] +#[doc(alias = "SCAN7")] +pub type Scan7 = crate::Reg; #[doc = "No Description"] pub mod scan7; -#[doc = "SCAN8 (rw) register accessor: an alias for `Reg`"] -pub type SCAN8 = crate::Reg; +#[doc = "SCAN8 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan8`] +module"] +#[doc(alias = "SCAN8")] +pub type Scan8 = crate::Reg; #[doc = "No Description"] pub mod scan8; -#[doc = "SCAN9 (rw) register accessor: an alias for `Reg`"] -pub type SCAN9 = crate::Reg; +#[doc = "SCAN9 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan9`] +module"] +#[doc(alias = "SCAN9")] +pub type Scan9 = crate::Reg; #[doc = "No Description"] pub mod scan9; -#[doc = "SCAN10 (rw) register accessor: an alias for `Reg`"] -pub type SCAN10 = crate::Reg; +#[doc = "SCAN10 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan10`] +module"] +#[doc(alias = "SCAN10")] +pub type Scan10 = crate::Reg; #[doc = "No Description"] pub mod scan10; -#[doc = "SCAN11 (rw) register accessor: an alias for `Reg`"] -pub type SCAN11 = crate::Reg; +#[doc = "SCAN11 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan11`] +module"] +#[doc(alias = "SCAN11")] +pub type Scan11 = crate::Reg; #[doc = "No Description"] pub mod scan11; -#[doc = "SCAN12 (rw) register accessor: an alias for `Reg`"] -pub type SCAN12 = crate::Reg; +#[doc = "SCAN12 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan12`] +module"] +#[doc(alias = "SCAN12")] +pub type Scan12 = crate::Reg; #[doc = "No Description"] pub mod scan12; -#[doc = "SCAN13 (rw) register accessor: an alias for `Reg`"] -pub type SCAN13 = crate::Reg; +#[doc = "SCAN13 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan13`] +module"] +#[doc(alias = "SCAN13")] +pub type Scan13 = crate::Reg; #[doc = "No Description"] pub mod scan13; -#[doc = "SCAN14 (rw) register accessor: an alias for `Reg`"] -pub type SCAN14 = crate::Reg; +#[doc = "SCAN14 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan14`] +module"] +#[doc(alias = "SCAN14")] +pub type Scan14 = crate::Reg; #[doc = "No Description"] pub mod scan14; -#[doc = "SCAN15 (rw) register accessor: an alias for `Reg`"] -pub type SCAN15 = crate::Reg; +#[doc = "SCAN15 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan15::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan15::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan15`] +module"] +#[doc(alias = "SCAN15")] +pub type Scan15 = crate::Reg; #[doc = "No Description"] pub mod scan15; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/cfg0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/cfg0.rs index ab1e35c..cc78335 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/cfg0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/cfg0.rs @@ -1,755 +1,607 @@ #[doc = "Register `CFG0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ADCMODE` reader - ADC Mode"] -pub type ADCMODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "ADC Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ADCMODE_A { - #[doc = "0: High speed mode with a maximum CLK_ADC of 10 MHz."] - NORMAL = 0, - #[doc = "1: Double high speed mode with a maximum CLK_ADC of 20 MHz. Power consumption is boosted to allow faster conversions."] - HIGHSPEED = 1, - #[doc = "2: High accuracy mode with maximum CLK_ADC of 5 MHz."] - HIGHACCURACY = 2, +pub enum Adcmode { + #[doc = "0: High speed mode with a maximum ADC_CLK of 10 MHz."] + Normal = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ADCMODE_A) -> Self { + fn from(variant: Adcmode) -> Self { variant as _ } } -impl ADCMODE_R { +impl crate::FieldSpec for Adcmode { + type Ux = u8; +} +impl crate::IsEnum for Adcmode {} +#[doc = "Field `ADCMODE` reader - ADC Mode"] +pub type AdcmodeR = crate::FieldReader; +impl AdcmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ADCMODE_A::NORMAL), - 1 => Some(ADCMODE_A::HIGHSPEED), - 2 => Some(ADCMODE_A::HIGHACCURACY), + 0 => Some(Adcmode::Normal), _ => None, } } - #[doc = "Checks if the value of the field is `NORMAL`"] + #[doc = "High speed mode with a maximum ADC_CLK of 10 MHz."] #[inline(always)] pub fn is_normal(&self) -> bool { - *self == ADCMODE_A::NORMAL - } - #[doc = "Checks if the value of the field is `HIGHSPEED`"] - #[inline(always)] - pub fn is_highspeed(&self) -> bool { - *self == ADCMODE_A::HIGHSPEED - } - #[doc = "Checks if the value of the field is `HIGHACCURACY`"] - #[inline(always)] - pub fn is_highaccuracy(&self) -> bool { - *self == ADCMODE_A::HIGHACCURACY + *self == Adcmode::Normal } } #[doc = "Field `ADCMODE` writer - ADC Mode"] -pub type ADCMODE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG0_SPEC, u8, ADCMODE_A, 2, O>; -impl<'a, const O: u8> ADCMODE_W<'a, O> { - #[doc = "High speed mode with a maximum CLK_ADC of 10 MHz."] +pub type AdcmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Adcmode>; +impl<'a, REG> AdcmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ + #[doc = "High speed mode with a maximum ADC_CLK of 10 MHz."] #[inline(always)] - pub fn normal(self) -> &'a mut W { - self.variant(ADCMODE_A::NORMAL) - } - #[doc = "Double high speed mode with a maximum CLK_ADC of 20 MHz. Power consumption is boosted to allow faster conversions."] - #[inline(always)] - pub fn highspeed(self) -> &'a mut W { - self.variant(ADCMODE_A::HIGHSPEED) - } - #[doc = "High accuracy mode with maximum CLK_ADC of 5 MHz."] - #[inline(always)] - pub fn highaccuracy(self) -> &'a mut W { - self.variant(ADCMODE_A::HIGHACCURACY) + pub fn normal(self) -> &'a mut crate::W { + self.variant(Adcmode::Normal) } } -#[doc = "Field `OSRHS` reader - High Speed OSR"] -pub type OSRHS_R = crate::FieldReader; #[doc = "High Speed OSR\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum OSRHS_A { +pub enum Osrhs { #[doc = "0: High speed over sampling of 2x."] - HISPD2 = 0, + Hispd2 = 0, #[doc = "1: High speed over sampling of 4x."] - HISPD4 = 1, + Hispd4 = 1, #[doc = "2: High speed over sampling of 8x."] - HISPD8 = 2, + Hispd8 = 2, #[doc = "3: High speed over sampling of 16x."] - HISPD16 = 3, + Hispd16 = 3, #[doc = "4: HIgh speed over sampling of 32x."] - HISPD32 = 4, + Hispd32 = 4, #[doc = "5: High speed over sampling of 64x."] - HISPD64 = 5, + Hispd64 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: OSRHS_A) -> Self { + fn from(variant: Osrhs) -> Self { variant as _ } } -impl OSRHS_R { +impl crate::FieldSpec for Osrhs { + type Ux = u8; +} +impl crate::IsEnum for Osrhs {} +#[doc = "Field `OSRHS` reader - High Speed OSR"] +pub type OsrhsR = crate::FieldReader; +impl OsrhsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(OSRHS_A::HISPD2), - 1 => Some(OSRHS_A::HISPD4), - 2 => Some(OSRHS_A::HISPD8), - 3 => Some(OSRHS_A::HISPD16), - 4 => Some(OSRHS_A::HISPD32), - 5 => Some(OSRHS_A::HISPD64), + 0 => Some(Osrhs::Hispd2), + 1 => Some(Osrhs::Hispd4), + 2 => Some(Osrhs::Hispd8), + 3 => Some(Osrhs::Hispd16), + 4 => Some(Osrhs::Hispd32), + 5 => Some(Osrhs::Hispd64), _ => None, } } - #[doc = "Checks if the value of the field is `HISPD2`"] + #[doc = "High speed over sampling of 2x."] #[inline(always)] pub fn is_hispd2(&self) -> bool { - *self == OSRHS_A::HISPD2 + *self == Osrhs::Hispd2 } - #[doc = "Checks if the value of the field is `HISPD4`"] + #[doc = "High speed over sampling of 4x."] #[inline(always)] pub fn is_hispd4(&self) -> bool { - *self == OSRHS_A::HISPD4 + *self == Osrhs::Hispd4 } - #[doc = "Checks if the value of the field is `HISPD8`"] + #[doc = "High speed over sampling of 8x."] #[inline(always)] pub fn is_hispd8(&self) -> bool { - *self == OSRHS_A::HISPD8 + *self == Osrhs::Hispd8 } - #[doc = "Checks if the value of the field is `HISPD16`"] + #[doc = "High speed over sampling of 16x."] #[inline(always)] pub fn is_hispd16(&self) -> bool { - *self == OSRHS_A::HISPD16 + *self == Osrhs::Hispd16 } - #[doc = "Checks if the value of the field is `HISPD32`"] + #[doc = "HIgh speed over sampling of 32x."] #[inline(always)] pub fn is_hispd32(&self) -> bool { - *self == OSRHS_A::HISPD32 + *self == Osrhs::Hispd32 } - #[doc = "Checks if the value of the field is `HISPD64`"] + #[doc = "High speed over sampling of 64x."] #[inline(always)] pub fn is_hispd64(&self) -> bool { - *self == OSRHS_A::HISPD64 + *self == Osrhs::Hispd64 } } #[doc = "Field `OSRHS` writer - High Speed OSR"] -pub type OSRHS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG0_SPEC, u8, OSRHS_A, 3, O>; -impl<'a, const O: u8> OSRHS_W<'a, O> { +pub type OsrhsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Osrhs>; +impl<'a, REG> OsrhsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "High speed over sampling of 2x."] #[inline(always)] - pub fn hispd2(self) -> &'a mut W { - self.variant(OSRHS_A::HISPD2) + pub fn hispd2(self) -> &'a mut crate::W { + self.variant(Osrhs::Hispd2) } #[doc = "High speed over sampling of 4x."] #[inline(always)] - pub fn hispd4(self) -> &'a mut W { - self.variant(OSRHS_A::HISPD4) + pub fn hispd4(self) -> &'a mut crate::W { + self.variant(Osrhs::Hispd4) } #[doc = "High speed over sampling of 8x."] #[inline(always)] - pub fn hispd8(self) -> &'a mut W { - self.variant(OSRHS_A::HISPD8) + pub fn hispd8(self) -> &'a mut crate::W { + self.variant(Osrhs::Hispd8) } #[doc = "High speed over sampling of 16x."] #[inline(always)] - pub fn hispd16(self) -> &'a mut W { - self.variant(OSRHS_A::HISPD16) + pub fn hispd16(self) -> &'a mut crate::W { + self.variant(Osrhs::Hispd16) } #[doc = "HIgh speed over sampling of 32x."] #[inline(always)] - pub fn hispd32(self) -> &'a mut W { - self.variant(OSRHS_A::HISPD32) + pub fn hispd32(self) -> &'a mut crate::W { + self.variant(Osrhs::Hispd32) } #[doc = "High speed over sampling of 64x."] #[inline(always)] - pub fn hispd64(self) -> &'a mut W { - self.variant(OSRHS_A::HISPD64) - } -} -#[doc = "Field `OSRHA` reader - High Accuracy OSR"] -pub type OSRHA_R = crate::FieldReader; -#[doc = "High Accuracy OSR\n\nValue on reset: 3"] -#[derive(Clone, Copy, Debug, PartialEq, Eq)] -#[repr(u8)] -pub enum OSRHA_A { - #[doc = "0: High accuracy over sampling of 16x."] - HIACC16 = 0, - #[doc = "1: High accuracy over sampling of 32x."] - HIACC32 = 1, - #[doc = "2: High accuracy over sampling of 64x."] - HIACC64 = 2, - #[doc = "3: High accuracy over sampling of 92x."] - HIACC92 = 3, - #[doc = "4: High accuracy over sampling of 128x."] - HIACC128 = 4, - #[doc = "5: High accuracy over sampling of 256x."] - HIACC256 = 5, -} -impl From for u8 { - #[inline(always)] - fn from(variant: OSRHA_A) -> Self { - variant as _ + pub fn hispd64(self) -> &'a mut crate::W { + self.variant(Osrhs::Hispd64) } } -impl OSRHA_R { - #[doc = "Get enumerated values variant"] - #[inline(always)] - pub fn variant(&self) -> Option { - match self.bits { - 0 => Some(OSRHA_A::HIACC16), - 1 => Some(OSRHA_A::HIACC32), - 2 => Some(OSRHA_A::HIACC64), - 3 => Some(OSRHA_A::HIACC92), - 4 => Some(OSRHA_A::HIACC128), - 5 => Some(OSRHA_A::HIACC256), - _ => None, - } - } - #[doc = "Checks if the value of the field is `HIACC16`"] - #[inline(always)] - pub fn is_hiacc16(&self) -> bool { - *self == OSRHA_A::HIACC16 - } - #[doc = "Checks if the value of the field is `HIACC32`"] - #[inline(always)] - pub fn is_hiacc32(&self) -> bool { - *self == OSRHA_A::HIACC32 - } - #[doc = "Checks if the value of the field is `HIACC64`"] - #[inline(always)] - pub fn is_hiacc64(&self) -> bool { - *self == OSRHA_A::HIACC64 - } - #[doc = "Checks if the value of the field is `HIACC92`"] - #[inline(always)] - pub fn is_hiacc92(&self) -> bool { - *self == OSRHA_A::HIACC92 - } - #[doc = "Checks if the value of the field is `HIACC128`"] - #[inline(always)] - pub fn is_hiacc128(&self) -> bool { - *self == OSRHA_A::HIACC128 - } - #[doc = "Checks if the value of the field is `HIACC256`"] - #[inline(always)] - pub fn is_hiacc256(&self) -> bool { - *self == OSRHA_A::HIACC256 - } -} -#[doc = "Field `OSRHA` writer - High Accuracy OSR"] -pub type OSRHA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG0_SPEC, u8, OSRHA_A, 3, O>; -impl<'a, const O: u8> OSRHA_W<'a, O> { - #[doc = "High accuracy over sampling of 16x."] - #[inline(always)] - pub fn hiacc16(self) -> &'a mut W { - self.variant(OSRHA_A::HIACC16) - } - #[doc = "High accuracy over sampling of 32x."] - #[inline(always)] - pub fn hiacc32(self) -> &'a mut W { - self.variant(OSRHA_A::HIACC32) - } - #[doc = "High accuracy over sampling of 64x."] - #[inline(always)] - pub fn hiacc64(self) -> &'a mut W { - self.variant(OSRHA_A::HIACC64) - } - #[doc = "High accuracy over sampling of 92x."] - #[inline(always)] - pub fn hiacc92(self) -> &'a mut W { - self.variant(OSRHA_A::HIACC92) - } - #[doc = "High accuracy over sampling of 128x."] - #[inline(always)] - pub fn hiacc128(self) -> &'a mut W { - self.variant(OSRHA_A::HIACC128) - } - #[doc = "High accuracy over sampling of 256x."] - #[inline(always)] - pub fn hiacc256(self) -> &'a mut W { - self.variant(OSRHA_A::HIACC256) - } -} -#[doc = "Field `ANALOGGAIN` reader - Analog Gain"] -pub type ANALOGGAIN_R = crate::FieldReader; #[doc = "Analog Gain\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ANALOGGAIN_A { +pub enum Analoggain { #[doc = "1: Analog gain of 0.5x."] - ANAGAIN0P5 = 1, + Anagain0p5 = 1, #[doc = "2: Analog gain of 1x."] - ANAGAIN1 = 2, + Anagain1 = 2, #[doc = "3: Analog gain of 2x."] - ANAGAIN2 = 3, + Anagain2 = 3, #[doc = "4: Analog gain of 3x."] - ANAGAIN3 = 4, + Anagain3 = 4, #[doc = "5: Analog gain of 4x."] - ANAGAIN4 = 5, + Anagain4 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ANALOGGAIN_A) -> Self { + fn from(variant: Analoggain) -> Self { variant as _ } } -impl ANALOGGAIN_R { +impl crate::FieldSpec for Analoggain { + type Ux = u8; +} +impl crate::IsEnum for Analoggain {} +#[doc = "Field `ANALOGGAIN` reader - Analog Gain"] +pub type AnaloggainR = crate::FieldReader; +impl AnaloggainR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(ANALOGGAIN_A::ANAGAIN0P5), - 2 => Some(ANALOGGAIN_A::ANAGAIN1), - 3 => Some(ANALOGGAIN_A::ANAGAIN2), - 4 => Some(ANALOGGAIN_A::ANAGAIN3), - 5 => Some(ANALOGGAIN_A::ANAGAIN4), + 1 => Some(Analoggain::Anagain0p5), + 2 => Some(Analoggain::Anagain1), + 3 => Some(Analoggain::Anagain2), + 4 => Some(Analoggain::Anagain3), + 5 => Some(Analoggain::Anagain4), _ => None, } } - #[doc = "Checks if the value of the field is `ANAGAIN0P5`"] + #[doc = "Analog gain of 0.5x."] #[inline(always)] pub fn is_anagain0p5(&self) -> bool { - *self == ANALOGGAIN_A::ANAGAIN0P5 + *self == Analoggain::Anagain0p5 } - #[doc = "Checks if the value of the field is `ANAGAIN1`"] + #[doc = "Analog gain of 1x."] #[inline(always)] pub fn is_anagain1(&self) -> bool { - *self == ANALOGGAIN_A::ANAGAIN1 + *self == Analoggain::Anagain1 } - #[doc = "Checks if the value of the field is `ANAGAIN2`"] + #[doc = "Analog gain of 2x."] #[inline(always)] pub fn is_anagain2(&self) -> bool { - *self == ANALOGGAIN_A::ANAGAIN2 + *self == Analoggain::Anagain2 } - #[doc = "Checks if the value of the field is `ANAGAIN3`"] + #[doc = "Analog gain of 3x."] #[inline(always)] pub fn is_anagain3(&self) -> bool { - *self == ANALOGGAIN_A::ANAGAIN3 + *self == Analoggain::Anagain3 } - #[doc = "Checks if the value of the field is `ANAGAIN4`"] + #[doc = "Analog gain of 4x."] #[inline(always)] pub fn is_anagain4(&self) -> bool { - *self == ANALOGGAIN_A::ANAGAIN4 + *self == Analoggain::Anagain4 } } #[doc = "Field `ANALOGGAIN` writer - Analog Gain"] -pub type ANALOGGAIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CFG0_SPEC, u8, ANALOGGAIN_A, 3, O>; -impl<'a, const O: u8> ANALOGGAIN_W<'a, O> { +pub type AnaloggainW<'a, REG> = crate::FieldWriter<'a, REG, 3, Analoggain>; +impl<'a, REG> AnaloggainW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Analog gain of 0.5x."] #[inline(always)] - pub fn anagain0p5(self) -> &'a mut W { - self.variant(ANALOGGAIN_A::ANAGAIN0P5) + pub fn anagain0p5(self) -> &'a mut crate::W { + self.variant(Analoggain::Anagain0p5) } #[doc = "Analog gain of 1x."] #[inline(always)] - pub fn anagain1(self) -> &'a mut W { - self.variant(ANALOGGAIN_A::ANAGAIN1) + pub fn anagain1(self) -> &'a mut crate::W { + self.variant(Analoggain::Anagain1) } #[doc = "Analog gain of 2x."] #[inline(always)] - pub fn anagain2(self) -> &'a mut W { - self.variant(ANALOGGAIN_A::ANAGAIN2) + pub fn anagain2(self) -> &'a mut crate::W { + self.variant(Analoggain::Anagain2) } #[doc = "Analog gain of 3x."] #[inline(always)] - pub fn anagain3(self) -> &'a mut W { - self.variant(ANALOGGAIN_A::ANAGAIN3) + pub fn anagain3(self) -> &'a mut crate::W { + self.variant(Analoggain::Anagain3) } #[doc = "Analog gain of 4x."] #[inline(always)] - pub fn anagain4(self) -> &'a mut W { - self.variant(ANALOGGAIN_A::ANAGAIN4) + pub fn anagain4(self) -> &'a mut crate::W { + self.variant(Analoggain::Anagain4) } } -#[doc = "Field `REFSEL` reader - Reference Select"] -pub type REFSEL_R = crate::FieldReader; #[doc = "Reference Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REFSEL_A { +pub enum Refsel { #[doc = "0: Internal 1.21 V reference."] - VBGR = 0, + Vbgr = 0, #[doc = "1: External Reference. (Calibrated for 1.25V nominal.)"] - VREF = 1, - #[doc = "2: External Reference. Supports 2.5V in high accuracy mode."] - VREF2P5 = 2, + Vref = 1, #[doc = "3: AVDD (unbuffered)"] - VDDX = 3, + Vddx = 3, #[doc = "4: AVDD (buffered) * 0.8"] - VDDX0P8BUF = 4, + Vddx0p8buf = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REFSEL_A) -> Self { + fn from(variant: Refsel) -> Self { variant as _ } } -impl REFSEL_R { +impl crate::FieldSpec for Refsel { + type Ux = u8; +} +impl crate::IsEnum for Refsel {} +#[doc = "Field `REFSEL` reader - Reference Select"] +pub type RefselR = crate::FieldReader; +impl RefselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(REFSEL_A::VBGR), - 1 => Some(REFSEL_A::VREF), - 2 => Some(REFSEL_A::VREF2P5), - 3 => Some(REFSEL_A::VDDX), - 4 => Some(REFSEL_A::VDDX0P8BUF), + 0 => Some(Refsel::Vbgr), + 1 => Some(Refsel::Vref), + 3 => Some(Refsel::Vddx), + 4 => Some(Refsel::Vddx0p8buf), _ => None, } } - #[doc = "Checks if the value of the field is `VBGR`"] + #[doc = "Internal 1.21 V reference."] #[inline(always)] pub fn is_vbgr(&self) -> bool { - *self == REFSEL_A::VBGR + *self == Refsel::Vbgr } - #[doc = "Checks if the value of the field is `VREF`"] + #[doc = "External Reference. (Calibrated for 1.25V nominal.)"] #[inline(always)] pub fn is_vref(&self) -> bool { - *self == REFSEL_A::VREF + *self == Refsel::Vref } - #[doc = "Checks if the value of the field is `VREF2P5`"] - #[inline(always)] - pub fn is_vref2p5(&self) -> bool { - *self == REFSEL_A::VREF2P5 - } - #[doc = "Checks if the value of the field is `VDDX`"] + #[doc = "AVDD (unbuffered)"] #[inline(always)] pub fn is_vddx(&self) -> bool { - *self == REFSEL_A::VDDX + *self == Refsel::Vddx } - #[doc = "Checks if the value of the field is `VDDX0P8BUF`"] + #[doc = "AVDD (buffered) * 0.8"] #[inline(always)] pub fn is_vddx0p8buf(&self) -> bool { - *self == REFSEL_A::VDDX0P8BUF + *self == Refsel::Vddx0p8buf } } #[doc = "Field `REFSEL` writer - Reference Select"] -pub type REFSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG0_SPEC, u8, REFSEL_A, 3, O>; -impl<'a, const O: u8> REFSEL_W<'a, O> { +pub type RefselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Refsel>; +impl<'a, REG> RefselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Internal 1.21 V reference."] #[inline(always)] - pub fn vbgr(self) -> &'a mut W { - self.variant(REFSEL_A::VBGR) + pub fn vbgr(self) -> &'a mut crate::W { + self.variant(Refsel::Vbgr) } #[doc = "External Reference. (Calibrated for 1.25V nominal.)"] #[inline(always)] - pub fn vref(self) -> &'a mut W { - self.variant(REFSEL_A::VREF) - } - #[doc = "External Reference. Supports 2.5V in high accuracy mode."] - #[inline(always)] - pub fn vref2p5(self) -> &'a mut W { - self.variant(REFSEL_A::VREF2P5) + pub fn vref(self) -> &'a mut crate::W { + self.variant(Refsel::Vref) } #[doc = "AVDD (unbuffered)"] #[inline(always)] - pub fn vddx(self) -> &'a mut W { - self.variant(REFSEL_A::VDDX) + pub fn vddx(self) -> &'a mut crate::W { + self.variant(Refsel::Vddx) } #[doc = "AVDD (buffered) * 0.8"] #[inline(always)] - pub fn vddx0p8buf(self) -> &'a mut W { - self.variant(REFSEL_A::VDDX0P8BUF) + pub fn vddx0p8buf(self) -> &'a mut crate::W { + self.variant(Refsel::Vddx0p8buf) } } -#[doc = "Field `DIGAVG` reader - Digital Averaging"] -pub type DIGAVG_R = crate::FieldReader; #[doc = "Digital Averaging\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DIGAVG_A { +pub enum Digavg { #[doc = "0: Collect one output word (no digital averaging)."] - AVG1 = 0, + Avg1 = 0, #[doc = "1: Collect and average 2 digital output words."] - AVG2 = 1, + Avg2 = 1, #[doc = "2: Collect and average 4 digital output words."] - AVG4 = 2, + Avg4 = 2, #[doc = "3: Collect and average 8 digital output words."] - AVG8 = 3, + Avg8 = 3, #[doc = "4: Collect and average 16 digital output words."] - AVG16 = 4, + Avg16 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DIGAVG_A) -> Self { + fn from(variant: Digavg) -> Self { variant as _ } } -impl DIGAVG_R { +impl crate::FieldSpec for Digavg { + type Ux = u8; +} +impl crate::IsEnum for Digavg {} +#[doc = "Field `DIGAVG` reader - Digital Averaging"] +pub type DigavgR = crate::FieldReader; +impl DigavgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(DIGAVG_A::AVG1), - 1 => Some(DIGAVG_A::AVG2), - 2 => Some(DIGAVG_A::AVG4), - 3 => Some(DIGAVG_A::AVG8), - 4 => Some(DIGAVG_A::AVG16), + 0 => Some(Digavg::Avg1), + 1 => Some(Digavg::Avg2), + 2 => Some(Digavg::Avg4), + 3 => Some(Digavg::Avg8), + 4 => Some(Digavg::Avg16), _ => None, } } - #[doc = "Checks if the value of the field is `AVG1`"] + #[doc = "Collect one output word (no digital averaging)."] #[inline(always)] pub fn is_avg1(&self) -> bool { - *self == DIGAVG_A::AVG1 + *self == Digavg::Avg1 } - #[doc = "Checks if the value of the field is `AVG2`"] + #[doc = "Collect and average 2 digital output words."] #[inline(always)] pub fn is_avg2(&self) -> bool { - *self == DIGAVG_A::AVG2 + *self == Digavg::Avg2 } - #[doc = "Checks if the value of the field is `AVG4`"] + #[doc = "Collect and average 4 digital output words."] #[inline(always)] pub fn is_avg4(&self) -> bool { - *self == DIGAVG_A::AVG4 + *self == Digavg::Avg4 } - #[doc = "Checks if the value of the field is `AVG8`"] + #[doc = "Collect and average 8 digital output words."] #[inline(always)] pub fn is_avg8(&self) -> bool { - *self == DIGAVG_A::AVG8 + *self == Digavg::Avg8 } - #[doc = "Checks if the value of the field is `AVG16`"] + #[doc = "Collect and average 16 digital output words."] #[inline(always)] pub fn is_avg16(&self) -> bool { - *self == DIGAVG_A::AVG16 + *self == Digavg::Avg16 } } #[doc = "Field `DIGAVG` writer - Digital Averaging"] -pub type DIGAVG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG0_SPEC, u8, DIGAVG_A, 3, O>; -impl<'a, const O: u8> DIGAVG_W<'a, O> { +pub type DigavgW<'a, REG> = crate::FieldWriter<'a, REG, 3, Digavg>; +impl<'a, REG> DigavgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Collect one output word (no digital averaging)."] #[inline(always)] - pub fn avg1(self) -> &'a mut W { - self.variant(DIGAVG_A::AVG1) + pub fn avg1(self) -> &'a mut crate::W { + self.variant(Digavg::Avg1) } #[doc = "Collect and average 2 digital output words."] #[inline(always)] - pub fn avg2(self) -> &'a mut W { - self.variant(DIGAVG_A::AVG2) + pub fn avg2(self) -> &'a mut crate::W { + self.variant(Digavg::Avg2) } #[doc = "Collect and average 4 digital output words."] #[inline(always)] - pub fn avg4(self) -> &'a mut W { - self.variant(DIGAVG_A::AVG4) + pub fn avg4(self) -> &'a mut crate::W { + self.variant(Digavg::Avg4) } #[doc = "Collect and average 8 digital output words."] #[inline(always)] - pub fn avg8(self) -> &'a mut W { - self.variant(DIGAVG_A::AVG8) + pub fn avg8(self) -> &'a mut crate::W { + self.variant(Digavg::Avg8) } #[doc = "Collect and average 16 digital output words."] #[inline(always)] - pub fn avg16(self) -> &'a mut W { - self.variant(DIGAVG_A::AVG16) + pub fn avg16(self) -> &'a mut crate::W { + self.variant(Digavg::Avg16) } } -#[doc = "Field `TWOSCOMPL` reader - Two's Complement"] -pub type TWOSCOMPL_R = crate::FieldReader; #[doc = "Two's Complement\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TWOSCOMPL_A { +pub enum Twoscompl { #[doc = "0: Automatic: Single ended measurements are reported as unipolar and differential measurements are reported as bipolar."] - AUTO = 0, + Auto = 0, #[doc = "1: Force all measurements to result in unipolar output. Negative differential numbers will saturate to 0."] - FORCEUNIPOLAR = 1, + Forceunipolar = 1, #[doc = "2: Force all measurements to result in bipolar output. Single ended measurements are half the range, but allow for small negative measurements."] - FORCEBIPOLAR = 2, + Forcebipolar = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TWOSCOMPL_A) -> Self { + fn from(variant: Twoscompl) -> Self { variant as _ } } -impl TWOSCOMPL_R { +impl crate::FieldSpec for Twoscompl { + type Ux = u8; +} +impl crate::IsEnum for Twoscompl {} +#[doc = "Field `TWOSCOMPL` reader - Two's Complement"] +pub type TwoscomplR = crate::FieldReader; +impl TwoscomplR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TWOSCOMPL_A::AUTO), - 1 => Some(TWOSCOMPL_A::FORCEUNIPOLAR), - 2 => Some(TWOSCOMPL_A::FORCEBIPOLAR), + 0 => Some(Twoscompl::Auto), + 1 => Some(Twoscompl::Forceunipolar), + 2 => Some(Twoscompl::Forcebipolar), _ => None, } } - #[doc = "Checks if the value of the field is `AUTO`"] + #[doc = "Automatic: Single ended measurements are reported as unipolar and differential measurements are reported as bipolar."] #[inline(always)] pub fn is_auto(&self) -> bool { - *self == TWOSCOMPL_A::AUTO + *self == Twoscompl::Auto } - #[doc = "Checks if the value of the field is `FORCEUNIPOLAR`"] + #[doc = "Force all measurements to result in unipolar output. Negative differential numbers will saturate to 0."] #[inline(always)] pub fn is_forceunipolar(&self) -> bool { - *self == TWOSCOMPL_A::FORCEUNIPOLAR + *self == Twoscompl::Forceunipolar } - #[doc = "Checks if the value of the field is `FORCEBIPOLAR`"] + #[doc = "Force all measurements to result in bipolar output. Single ended measurements are half the range, but allow for small negative measurements."] #[inline(always)] pub fn is_forcebipolar(&self) -> bool { - *self == TWOSCOMPL_A::FORCEBIPOLAR + *self == Twoscompl::Forcebipolar } } #[doc = "Field `TWOSCOMPL` writer - Two's Complement"] -pub type TWOSCOMPL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CFG0_SPEC, u8, TWOSCOMPL_A, 2, O>; -impl<'a, const O: u8> TWOSCOMPL_W<'a, O> { +pub type TwoscomplW<'a, REG> = crate::FieldWriter<'a, REG, 2, Twoscompl>; +impl<'a, REG> TwoscomplW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Automatic: Single ended measurements are reported as unipolar and differential measurements are reported as bipolar."] #[inline(always)] - pub fn auto(self) -> &'a mut W { - self.variant(TWOSCOMPL_A::AUTO) + pub fn auto(self) -> &'a mut crate::W { + self.variant(Twoscompl::Auto) } #[doc = "Force all measurements to result in unipolar output. Negative differential numbers will saturate to 0."] #[inline(always)] - pub fn forceunipolar(self) -> &'a mut W { - self.variant(TWOSCOMPL_A::FORCEUNIPOLAR) + pub fn forceunipolar(self) -> &'a mut crate::W { + self.variant(Twoscompl::Forceunipolar) } #[doc = "Force all measurements to result in bipolar output. Single ended measurements are half the range, but allow for small negative measurements."] #[inline(always)] - pub fn forcebipolar(self) -> &'a mut W { - self.variant(TWOSCOMPL_A::FORCEBIPOLAR) + pub fn forcebipolar(self) -> &'a mut crate::W { + self.variant(Twoscompl::Forcebipolar) } } impl R { #[doc = "Bits 0:1 - ADC Mode"] #[inline(always)] - pub fn adcmode(&self) -> ADCMODE_R { - ADCMODE_R::new((self.bits & 3) as u8) + pub fn adcmode(&self) -> AdcmodeR { + AdcmodeR::new((self.bits & 3) as u8) } #[doc = "Bits 2:4 - High Speed OSR"] #[inline(always)] - pub fn osrhs(&self) -> OSRHS_R { - OSRHS_R::new(((self.bits >> 2) & 7) as u8) - } - #[doc = "Bits 5:7 - High Accuracy OSR"] - #[inline(always)] - pub fn osrha(&self) -> OSRHA_R { - OSRHA_R::new(((self.bits >> 5) & 7) as u8) + pub fn osrhs(&self) -> OsrhsR { + OsrhsR::new(((self.bits >> 2) & 7) as u8) } #[doc = "Bits 12:14 - Analog Gain"] #[inline(always)] - pub fn analoggain(&self) -> ANALOGGAIN_R { - ANALOGGAIN_R::new(((self.bits >> 12) & 7) as u8) + pub fn analoggain(&self) -> AnaloggainR { + AnaloggainR::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Reference Select"] #[inline(always)] - pub fn refsel(&self) -> REFSEL_R { - REFSEL_R::new(((self.bits >> 16) & 7) as u8) + pub fn refsel(&self) -> RefselR { + RefselR::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 21:23 - Digital Averaging"] #[inline(always)] - pub fn digavg(&self) -> DIGAVG_R { - DIGAVG_R::new(((self.bits >> 21) & 7) as u8) + pub fn digavg(&self) -> DigavgR { + DigavgR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 28:29 - Two's Complement"] #[inline(always)] - pub fn twoscompl(&self) -> TWOSCOMPL_R { - TWOSCOMPL_R::new(((self.bits >> 28) & 3) as u8) + pub fn twoscompl(&self) -> TwoscomplR { + TwoscomplR::new(((self.bits >> 28) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - ADC Mode"] #[inline(always)] #[must_use] - pub fn adcmode(&mut self) -> ADCMODE_W<0> { - ADCMODE_W::new(self) + pub fn adcmode(&mut self) -> AdcmodeW { + AdcmodeW::new(self, 0) } #[doc = "Bits 2:4 - High Speed OSR"] #[inline(always)] #[must_use] - pub fn osrhs(&mut self) -> OSRHS_W<2> { - OSRHS_W::new(self) - } - #[doc = "Bits 5:7 - High Accuracy OSR"] - #[inline(always)] - #[must_use] - pub fn osrha(&mut self) -> OSRHA_W<5> { - OSRHA_W::new(self) + pub fn osrhs(&mut self) -> OsrhsW { + OsrhsW::new(self, 2) } #[doc = "Bits 12:14 - Analog Gain"] #[inline(always)] #[must_use] - pub fn analoggain(&mut self) -> ANALOGGAIN_W<12> { - ANALOGGAIN_W::new(self) + pub fn analoggain(&mut self) -> AnaloggainW { + AnaloggainW::new(self, 12) } #[doc = "Bits 16:18 - Reference Select"] #[inline(always)] #[must_use] - pub fn refsel(&mut self) -> REFSEL_W<16> { - REFSEL_W::new(self) + pub fn refsel(&mut self) -> RefselW { + RefselW::new(self, 16) } #[doc = "Bits 21:23 - Digital Averaging"] #[inline(always)] #[must_use] - pub fn digavg(&mut self) -> DIGAVG_W<21> { - DIGAVG_W::new(self) + pub fn digavg(&mut self) -> DigavgW { + DigavgW::new(self, 21) } #[doc = "Bits 28:29 - Two's Complement"] #[inline(always)] #[must_use] - pub fn twoscompl(&mut self) -> TWOSCOMPL_W<28> { - TWOSCOMPL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn twoscompl(&mut self) -> TwoscomplW { + TwoscomplW::new(self, 28) } } -#[doc = "Configration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg0](index.html) module"] -pub struct CFG0_SPEC; -impl crate::RegisterSpec for CFG0_SPEC { +#[doc = "Configration\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cfg0Spec; +impl crate::RegisterSpec for Cfg0Spec { type Ux = u32; } -#[doc = "`read()` method returns [cfg0::R](R) reader structure"] -impl crate::Readable for CFG0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg0::W](W) writer structure"] -impl crate::Writable for CFG0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg0::R`](R) reader structure"] +impl crate::Readable for Cfg0Spec {} +#[doc = "`write(|w| ..)` method takes [`cfg0::W`](W) writer structure"] +impl crate::Writable for Cfg0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG0 to value 0x2060"] -impl crate::Resettable for CFG0_SPEC { - const RESET_VALUE: Self::Ux = 0x2060; +impl crate::Resettable for Cfg0Spec { + const RESET_VALUE: u32 = 0x2060; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/cfg1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/cfg1.rs index b5c4e46..39831b1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/cfg1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/cfg1.rs @@ -1,755 +1,607 @@ #[doc = "Register `CFG1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ADCMODE` reader - ADC Mode"] -pub type ADCMODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "ADC Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ADCMODE_A { - #[doc = "0: High speed mode with a maximum CLK_ADC of 10 MHz."] - NORMAL = 0, - #[doc = "1: Double high speed mode with a maximum CLK_ADC of 20 MHz. Power consumption is boosted to allow faster conversions."] - HIGHSPEED = 1, - #[doc = "2: High accuracy mode with maximum CLK_ADC of 5 MHz."] - HIGHACCURACY = 2, +pub enum Adcmode { + #[doc = "0: High speed mode with a maximum ADC_CLK of 10 MHz."] + Normal = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ADCMODE_A) -> Self { + fn from(variant: Adcmode) -> Self { variant as _ } } -impl ADCMODE_R { +impl crate::FieldSpec for Adcmode { + type Ux = u8; +} +impl crate::IsEnum for Adcmode {} +#[doc = "Field `ADCMODE` reader - ADC Mode"] +pub type AdcmodeR = crate::FieldReader; +impl AdcmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ADCMODE_A::NORMAL), - 1 => Some(ADCMODE_A::HIGHSPEED), - 2 => Some(ADCMODE_A::HIGHACCURACY), + 0 => Some(Adcmode::Normal), _ => None, } } - #[doc = "Checks if the value of the field is `NORMAL`"] + #[doc = "High speed mode with a maximum ADC_CLK of 10 MHz."] #[inline(always)] pub fn is_normal(&self) -> bool { - *self == ADCMODE_A::NORMAL - } - #[doc = "Checks if the value of the field is `HIGHSPEED`"] - #[inline(always)] - pub fn is_highspeed(&self) -> bool { - *self == ADCMODE_A::HIGHSPEED - } - #[doc = "Checks if the value of the field is `HIGHACCURACY`"] - #[inline(always)] - pub fn is_highaccuracy(&self) -> bool { - *self == ADCMODE_A::HIGHACCURACY + *self == Adcmode::Normal } } #[doc = "Field `ADCMODE` writer - ADC Mode"] -pub type ADCMODE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG1_SPEC, u8, ADCMODE_A, 2, O>; -impl<'a, const O: u8> ADCMODE_W<'a, O> { - #[doc = "High speed mode with a maximum CLK_ADC of 10 MHz."] +pub type AdcmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Adcmode>; +impl<'a, REG> AdcmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ + #[doc = "High speed mode with a maximum ADC_CLK of 10 MHz."] #[inline(always)] - pub fn normal(self) -> &'a mut W { - self.variant(ADCMODE_A::NORMAL) - } - #[doc = "Double high speed mode with a maximum CLK_ADC of 20 MHz. Power consumption is boosted to allow faster conversions."] - #[inline(always)] - pub fn highspeed(self) -> &'a mut W { - self.variant(ADCMODE_A::HIGHSPEED) - } - #[doc = "High accuracy mode with maximum CLK_ADC of 5 MHz."] - #[inline(always)] - pub fn highaccuracy(self) -> &'a mut W { - self.variant(ADCMODE_A::HIGHACCURACY) + pub fn normal(self) -> &'a mut crate::W { + self.variant(Adcmode::Normal) } } -#[doc = "Field `OSRHS` reader - High Speed OSR"] -pub type OSRHS_R = crate::FieldReader; #[doc = "High Speed OSR\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum OSRHS_A { +pub enum Osrhs { #[doc = "0: High speed over sampling of 2x."] - HISPD2 = 0, + Hispd2 = 0, #[doc = "1: High speed over sampling of 4x."] - HISPD4 = 1, + Hispd4 = 1, #[doc = "2: High speed over sampling of 8x."] - HISPD8 = 2, + Hispd8 = 2, #[doc = "3: High speed over sampling of 16x."] - HISPD16 = 3, + Hispd16 = 3, #[doc = "4: HIgh speed over sampling of 32x."] - HISPD32 = 4, + Hispd32 = 4, #[doc = "5: High speed over sampling of 64x."] - HISPD64 = 5, + Hispd64 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: OSRHS_A) -> Self { + fn from(variant: Osrhs) -> Self { variant as _ } } -impl OSRHS_R { +impl crate::FieldSpec for Osrhs { + type Ux = u8; +} +impl crate::IsEnum for Osrhs {} +#[doc = "Field `OSRHS` reader - High Speed OSR"] +pub type OsrhsR = crate::FieldReader; +impl OsrhsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(OSRHS_A::HISPD2), - 1 => Some(OSRHS_A::HISPD4), - 2 => Some(OSRHS_A::HISPD8), - 3 => Some(OSRHS_A::HISPD16), - 4 => Some(OSRHS_A::HISPD32), - 5 => Some(OSRHS_A::HISPD64), + 0 => Some(Osrhs::Hispd2), + 1 => Some(Osrhs::Hispd4), + 2 => Some(Osrhs::Hispd8), + 3 => Some(Osrhs::Hispd16), + 4 => Some(Osrhs::Hispd32), + 5 => Some(Osrhs::Hispd64), _ => None, } } - #[doc = "Checks if the value of the field is `HISPD2`"] + #[doc = "High speed over sampling of 2x."] #[inline(always)] pub fn is_hispd2(&self) -> bool { - *self == OSRHS_A::HISPD2 + *self == Osrhs::Hispd2 } - #[doc = "Checks if the value of the field is `HISPD4`"] + #[doc = "High speed over sampling of 4x."] #[inline(always)] pub fn is_hispd4(&self) -> bool { - *self == OSRHS_A::HISPD4 + *self == Osrhs::Hispd4 } - #[doc = "Checks if the value of the field is `HISPD8`"] + #[doc = "High speed over sampling of 8x."] #[inline(always)] pub fn is_hispd8(&self) -> bool { - *self == OSRHS_A::HISPD8 + *self == Osrhs::Hispd8 } - #[doc = "Checks if the value of the field is `HISPD16`"] + #[doc = "High speed over sampling of 16x."] #[inline(always)] pub fn is_hispd16(&self) -> bool { - *self == OSRHS_A::HISPD16 + *self == Osrhs::Hispd16 } - #[doc = "Checks if the value of the field is `HISPD32`"] + #[doc = "HIgh speed over sampling of 32x."] #[inline(always)] pub fn is_hispd32(&self) -> bool { - *self == OSRHS_A::HISPD32 + *self == Osrhs::Hispd32 } - #[doc = "Checks if the value of the field is `HISPD64`"] + #[doc = "High speed over sampling of 64x."] #[inline(always)] pub fn is_hispd64(&self) -> bool { - *self == OSRHS_A::HISPD64 + *self == Osrhs::Hispd64 } } #[doc = "Field `OSRHS` writer - High Speed OSR"] -pub type OSRHS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG1_SPEC, u8, OSRHS_A, 3, O>; -impl<'a, const O: u8> OSRHS_W<'a, O> { +pub type OsrhsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Osrhs>; +impl<'a, REG> OsrhsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "High speed over sampling of 2x."] #[inline(always)] - pub fn hispd2(self) -> &'a mut W { - self.variant(OSRHS_A::HISPD2) + pub fn hispd2(self) -> &'a mut crate::W { + self.variant(Osrhs::Hispd2) } #[doc = "High speed over sampling of 4x."] #[inline(always)] - pub fn hispd4(self) -> &'a mut W { - self.variant(OSRHS_A::HISPD4) + pub fn hispd4(self) -> &'a mut crate::W { + self.variant(Osrhs::Hispd4) } #[doc = "High speed over sampling of 8x."] #[inline(always)] - pub fn hispd8(self) -> &'a mut W { - self.variant(OSRHS_A::HISPD8) + pub fn hispd8(self) -> &'a mut crate::W { + self.variant(Osrhs::Hispd8) } #[doc = "High speed over sampling of 16x."] #[inline(always)] - pub fn hispd16(self) -> &'a mut W { - self.variant(OSRHS_A::HISPD16) + pub fn hispd16(self) -> &'a mut crate::W { + self.variant(Osrhs::Hispd16) } #[doc = "HIgh speed over sampling of 32x."] #[inline(always)] - pub fn hispd32(self) -> &'a mut W { - self.variant(OSRHS_A::HISPD32) + pub fn hispd32(self) -> &'a mut crate::W { + self.variant(Osrhs::Hispd32) } #[doc = "High speed over sampling of 64x."] #[inline(always)] - pub fn hispd64(self) -> &'a mut W { - self.variant(OSRHS_A::HISPD64) - } -} -#[doc = "Field `OSRHA` reader - High Accuracy OSR"] -pub type OSRHA_R = crate::FieldReader; -#[doc = "High Accuracy OSR\n\nValue on reset: 3"] -#[derive(Clone, Copy, Debug, PartialEq, Eq)] -#[repr(u8)] -pub enum OSRHA_A { - #[doc = "0: High accuracy over sampling of 16x."] - HIACC16 = 0, - #[doc = "1: High accuracy over sampling of 32x."] - HIACC32 = 1, - #[doc = "2: High accuracy over sampling of 64x."] - HIACC64 = 2, - #[doc = "3: High accuracy over sampling of 92x."] - HIACC92 = 3, - #[doc = "4: High accuracy over sampling of 128x."] - HIACC128 = 4, - #[doc = "5: High accuracy over sampling of 256x."] - HIACC256 = 5, -} -impl From for u8 { - #[inline(always)] - fn from(variant: OSRHA_A) -> Self { - variant as _ + pub fn hispd64(self) -> &'a mut crate::W { + self.variant(Osrhs::Hispd64) } } -impl OSRHA_R { - #[doc = "Get enumerated values variant"] - #[inline(always)] - pub fn variant(&self) -> Option { - match self.bits { - 0 => Some(OSRHA_A::HIACC16), - 1 => Some(OSRHA_A::HIACC32), - 2 => Some(OSRHA_A::HIACC64), - 3 => Some(OSRHA_A::HIACC92), - 4 => Some(OSRHA_A::HIACC128), - 5 => Some(OSRHA_A::HIACC256), - _ => None, - } - } - #[doc = "Checks if the value of the field is `HIACC16`"] - #[inline(always)] - pub fn is_hiacc16(&self) -> bool { - *self == OSRHA_A::HIACC16 - } - #[doc = "Checks if the value of the field is `HIACC32`"] - #[inline(always)] - pub fn is_hiacc32(&self) -> bool { - *self == OSRHA_A::HIACC32 - } - #[doc = "Checks if the value of the field is `HIACC64`"] - #[inline(always)] - pub fn is_hiacc64(&self) -> bool { - *self == OSRHA_A::HIACC64 - } - #[doc = "Checks if the value of the field is `HIACC92`"] - #[inline(always)] - pub fn is_hiacc92(&self) -> bool { - *self == OSRHA_A::HIACC92 - } - #[doc = "Checks if the value of the field is `HIACC128`"] - #[inline(always)] - pub fn is_hiacc128(&self) -> bool { - *self == OSRHA_A::HIACC128 - } - #[doc = "Checks if the value of the field is `HIACC256`"] - #[inline(always)] - pub fn is_hiacc256(&self) -> bool { - *self == OSRHA_A::HIACC256 - } -} -#[doc = "Field `OSRHA` writer - High Accuracy OSR"] -pub type OSRHA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG1_SPEC, u8, OSRHA_A, 3, O>; -impl<'a, const O: u8> OSRHA_W<'a, O> { - #[doc = "High accuracy over sampling of 16x."] - #[inline(always)] - pub fn hiacc16(self) -> &'a mut W { - self.variant(OSRHA_A::HIACC16) - } - #[doc = "High accuracy over sampling of 32x."] - #[inline(always)] - pub fn hiacc32(self) -> &'a mut W { - self.variant(OSRHA_A::HIACC32) - } - #[doc = "High accuracy over sampling of 64x."] - #[inline(always)] - pub fn hiacc64(self) -> &'a mut W { - self.variant(OSRHA_A::HIACC64) - } - #[doc = "High accuracy over sampling of 92x."] - #[inline(always)] - pub fn hiacc92(self) -> &'a mut W { - self.variant(OSRHA_A::HIACC92) - } - #[doc = "High accuracy over sampling of 128x."] - #[inline(always)] - pub fn hiacc128(self) -> &'a mut W { - self.variant(OSRHA_A::HIACC128) - } - #[doc = "High accuracy over sampling of 256x."] - #[inline(always)] - pub fn hiacc256(self) -> &'a mut W { - self.variant(OSRHA_A::HIACC256) - } -} -#[doc = "Field `ANALOGGAIN` reader - Analog Gain"] -pub type ANALOGGAIN_R = crate::FieldReader; #[doc = "Analog Gain\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ANALOGGAIN_A { +pub enum Analoggain { #[doc = "1: Analog gain of 0.5x."] - ANAGAIN0P5 = 1, + Anagain0p5 = 1, #[doc = "2: Analog gain of 1x."] - ANAGAIN1 = 2, + Anagain1 = 2, #[doc = "3: Analog gain of 2x."] - ANAGAIN2 = 3, + Anagain2 = 3, #[doc = "4: Analog gain of 3x."] - ANAGAIN3 = 4, + Anagain3 = 4, #[doc = "5: Analog gain of 4x."] - ANAGAIN4 = 5, + Anagain4 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ANALOGGAIN_A) -> Self { + fn from(variant: Analoggain) -> Self { variant as _ } } -impl ANALOGGAIN_R { +impl crate::FieldSpec for Analoggain { + type Ux = u8; +} +impl crate::IsEnum for Analoggain {} +#[doc = "Field `ANALOGGAIN` reader - Analog Gain"] +pub type AnaloggainR = crate::FieldReader; +impl AnaloggainR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(ANALOGGAIN_A::ANAGAIN0P5), - 2 => Some(ANALOGGAIN_A::ANAGAIN1), - 3 => Some(ANALOGGAIN_A::ANAGAIN2), - 4 => Some(ANALOGGAIN_A::ANAGAIN3), - 5 => Some(ANALOGGAIN_A::ANAGAIN4), + 1 => Some(Analoggain::Anagain0p5), + 2 => Some(Analoggain::Anagain1), + 3 => Some(Analoggain::Anagain2), + 4 => Some(Analoggain::Anagain3), + 5 => Some(Analoggain::Anagain4), _ => None, } } - #[doc = "Checks if the value of the field is `ANAGAIN0P5`"] + #[doc = "Analog gain of 0.5x."] #[inline(always)] pub fn is_anagain0p5(&self) -> bool { - *self == ANALOGGAIN_A::ANAGAIN0P5 + *self == Analoggain::Anagain0p5 } - #[doc = "Checks if the value of the field is `ANAGAIN1`"] + #[doc = "Analog gain of 1x."] #[inline(always)] pub fn is_anagain1(&self) -> bool { - *self == ANALOGGAIN_A::ANAGAIN1 + *self == Analoggain::Anagain1 } - #[doc = "Checks if the value of the field is `ANAGAIN2`"] + #[doc = "Analog gain of 2x."] #[inline(always)] pub fn is_anagain2(&self) -> bool { - *self == ANALOGGAIN_A::ANAGAIN2 + *self == Analoggain::Anagain2 } - #[doc = "Checks if the value of the field is `ANAGAIN3`"] + #[doc = "Analog gain of 3x."] #[inline(always)] pub fn is_anagain3(&self) -> bool { - *self == ANALOGGAIN_A::ANAGAIN3 + *self == Analoggain::Anagain3 } - #[doc = "Checks if the value of the field is `ANAGAIN4`"] + #[doc = "Analog gain of 4x."] #[inline(always)] pub fn is_anagain4(&self) -> bool { - *self == ANALOGGAIN_A::ANAGAIN4 + *self == Analoggain::Anagain4 } } #[doc = "Field `ANALOGGAIN` writer - Analog Gain"] -pub type ANALOGGAIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CFG1_SPEC, u8, ANALOGGAIN_A, 3, O>; -impl<'a, const O: u8> ANALOGGAIN_W<'a, O> { +pub type AnaloggainW<'a, REG> = crate::FieldWriter<'a, REG, 3, Analoggain>; +impl<'a, REG> AnaloggainW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Analog gain of 0.5x."] #[inline(always)] - pub fn anagain0p5(self) -> &'a mut W { - self.variant(ANALOGGAIN_A::ANAGAIN0P5) + pub fn anagain0p5(self) -> &'a mut crate::W { + self.variant(Analoggain::Anagain0p5) } #[doc = "Analog gain of 1x."] #[inline(always)] - pub fn anagain1(self) -> &'a mut W { - self.variant(ANALOGGAIN_A::ANAGAIN1) + pub fn anagain1(self) -> &'a mut crate::W { + self.variant(Analoggain::Anagain1) } #[doc = "Analog gain of 2x."] #[inline(always)] - pub fn anagain2(self) -> &'a mut W { - self.variant(ANALOGGAIN_A::ANAGAIN2) + pub fn anagain2(self) -> &'a mut crate::W { + self.variant(Analoggain::Anagain2) } #[doc = "Analog gain of 3x."] #[inline(always)] - pub fn anagain3(self) -> &'a mut W { - self.variant(ANALOGGAIN_A::ANAGAIN3) + pub fn anagain3(self) -> &'a mut crate::W { + self.variant(Analoggain::Anagain3) } #[doc = "Analog gain of 4x."] #[inline(always)] - pub fn anagain4(self) -> &'a mut W { - self.variant(ANALOGGAIN_A::ANAGAIN4) + pub fn anagain4(self) -> &'a mut crate::W { + self.variant(Analoggain::Anagain4) } } -#[doc = "Field `REFSEL` reader - Reference Select"] -pub type REFSEL_R = crate::FieldReader; #[doc = "Reference Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REFSEL_A { +pub enum Refsel { #[doc = "0: Internal 1.21 V reference."] - VBGR = 0, + Vbgr = 0, #[doc = "1: External Reference. (Calibrated for 1.25V nominal.)"] - VREF = 1, - #[doc = "2: External Reference. Supports 2.5V in high accuracy mode."] - VREF2P5 = 2, + Vref = 1, #[doc = "3: AVDD (unbuffered)"] - VDDX = 3, + Vddx = 3, #[doc = "4: AVDD (buffered) * 0.8"] - VDDX0P8BUF = 4, + Vddx0p8buf = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REFSEL_A) -> Self { + fn from(variant: Refsel) -> Self { variant as _ } } -impl REFSEL_R { +impl crate::FieldSpec for Refsel { + type Ux = u8; +} +impl crate::IsEnum for Refsel {} +#[doc = "Field `REFSEL` reader - Reference Select"] +pub type RefselR = crate::FieldReader; +impl RefselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(REFSEL_A::VBGR), - 1 => Some(REFSEL_A::VREF), - 2 => Some(REFSEL_A::VREF2P5), - 3 => Some(REFSEL_A::VDDX), - 4 => Some(REFSEL_A::VDDX0P8BUF), + 0 => Some(Refsel::Vbgr), + 1 => Some(Refsel::Vref), + 3 => Some(Refsel::Vddx), + 4 => Some(Refsel::Vddx0p8buf), _ => None, } } - #[doc = "Checks if the value of the field is `VBGR`"] + #[doc = "Internal 1.21 V reference."] #[inline(always)] pub fn is_vbgr(&self) -> bool { - *self == REFSEL_A::VBGR + *self == Refsel::Vbgr } - #[doc = "Checks if the value of the field is `VREF`"] + #[doc = "External Reference. (Calibrated for 1.25V nominal.)"] #[inline(always)] pub fn is_vref(&self) -> bool { - *self == REFSEL_A::VREF + *self == Refsel::Vref } - #[doc = "Checks if the value of the field is `VREF2P5`"] - #[inline(always)] - pub fn is_vref2p5(&self) -> bool { - *self == REFSEL_A::VREF2P5 - } - #[doc = "Checks if the value of the field is `VDDX`"] + #[doc = "AVDD (unbuffered)"] #[inline(always)] pub fn is_vddx(&self) -> bool { - *self == REFSEL_A::VDDX + *self == Refsel::Vddx } - #[doc = "Checks if the value of the field is `VDDX0P8BUF`"] + #[doc = "AVDD (buffered) * 0.8"] #[inline(always)] pub fn is_vddx0p8buf(&self) -> bool { - *self == REFSEL_A::VDDX0P8BUF + *self == Refsel::Vddx0p8buf } } #[doc = "Field `REFSEL` writer - Reference Select"] -pub type REFSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG1_SPEC, u8, REFSEL_A, 3, O>; -impl<'a, const O: u8> REFSEL_W<'a, O> { +pub type RefselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Refsel>; +impl<'a, REG> RefselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Internal 1.21 V reference."] #[inline(always)] - pub fn vbgr(self) -> &'a mut W { - self.variant(REFSEL_A::VBGR) + pub fn vbgr(self) -> &'a mut crate::W { + self.variant(Refsel::Vbgr) } #[doc = "External Reference. (Calibrated for 1.25V nominal.)"] #[inline(always)] - pub fn vref(self) -> &'a mut W { - self.variant(REFSEL_A::VREF) - } - #[doc = "External Reference. Supports 2.5V in high accuracy mode."] - #[inline(always)] - pub fn vref2p5(self) -> &'a mut W { - self.variant(REFSEL_A::VREF2P5) + pub fn vref(self) -> &'a mut crate::W { + self.variant(Refsel::Vref) } #[doc = "AVDD (unbuffered)"] #[inline(always)] - pub fn vddx(self) -> &'a mut W { - self.variant(REFSEL_A::VDDX) + pub fn vddx(self) -> &'a mut crate::W { + self.variant(Refsel::Vddx) } #[doc = "AVDD (buffered) * 0.8"] #[inline(always)] - pub fn vddx0p8buf(self) -> &'a mut W { - self.variant(REFSEL_A::VDDX0P8BUF) + pub fn vddx0p8buf(self) -> &'a mut crate::W { + self.variant(Refsel::Vddx0p8buf) } } -#[doc = "Field `DIGAVG` reader - Digital Averaging"] -pub type DIGAVG_R = crate::FieldReader; #[doc = "Digital Averaging\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DIGAVG_A { +pub enum Digavg { #[doc = "0: Collect one output word (no digital averaging)."] - AVG1 = 0, + Avg1 = 0, #[doc = "1: Collect and average 2 digital output words."] - AVG2 = 1, + Avg2 = 1, #[doc = "2: Collect and average 4 digital output words."] - AVG4 = 2, + Avg4 = 2, #[doc = "3: Collect and average 8 digital output words."] - AVG8 = 3, + Avg8 = 3, #[doc = "4: Collect and average 16 digital output words."] - AVG16 = 4, + Avg16 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DIGAVG_A) -> Self { + fn from(variant: Digavg) -> Self { variant as _ } } -impl DIGAVG_R { +impl crate::FieldSpec for Digavg { + type Ux = u8; +} +impl crate::IsEnum for Digavg {} +#[doc = "Field `DIGAVG` reader - Digital Averaging"] +pub type DigavgR = crate::FieldReader; +impl DigavgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(DIGAVG_A::AVG1), - 1 => Some(DIGAVG_A::AVG2), - 2 => Some(DIGAVG_A::AVG4), - 3 => Some(DIGAVG_A::AVG8), - 4 => Some(DIGAVG_A::AVG16), + 0 => Some(Digavg::Avg1), + 1 => Some(Digavg::Avg2), + 2 => Some(Digavg::Avg4), + 3 => Some(Digavg::Avg8), + 4 => Some(Digavg::Avg16), _ => None, } } - #[doc = "Checks if the value of the field is `AVG1`"] + #[doc = "Collect one output word (no digital averaging)."] #[inline(always)] pub fn is_avg1(&self) -> bool { - *self == DIGAVG_A::AVG1 + *self == Digavg::Avg1 } - #[doc = "Checks if the value of the field is `AVG2`"] + #[doc = "Collect and average 2 digital output words."] #[inline(always)] pub fn is_avg2(&self) -> bool { - *self == DIGAVG_A::AVG2 + *self == Digavg::Avg2 } - #[doc = "Checks if the value of the field is `AVG4`"] + #[doc = "Collect and average 4 digital output words."] #[inline(always)] pub fn is_avg4(&self) -> bool { - *self == DIGAVG_A::AVG4 + *self == Digavg::Avg4 } - #[doc = "Checks if the value of the field is `AVG8`"] + #[doc = "Collect and average 8 digital output words."] #[inline(always)] pub fn is_avg8(&self) -> bool { - *self == DIGAVG_A::AVG8 + *self == Digavg::Avg8 } - #[doc = "Checks if the value of the field is `AVG16`"] + #[doc = "Collect and average 16 digital output words."] #[inline(always)] pub fn is_avg16(&self) -> bool { - *self == DIGAVG_A::AVG16 + *self == Digavg::Avg16 } } #[doc = "Field `DIGAVG` writer - Digital Averaging"] -pub type DIGAVG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG1_SPEC, u8, DIGAVG_A, 3, O>; -impl<'a, const O: u8> DIGAVG_W<'a, O> { +pub type DigavgW<'a, REG> = crate::FieldWriter<'a, REG, 3, Digavg>; +impl<'a, REG> DigavgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Collect one output word (no digital averaging)."] #[inline(always)] - pub fn avg1(self) -> &'a mut W { - self.variant(DIGAVG_A::AVG1) + pub fn avg1(self) -> &'a mut crate::W { + self.variant(Digavg::Avg1) } #[doc = "Collect and average 2 digital output words."] #[inline(always)] - pub fn avg2(self) -> &'a mut W { - self.variant(DIGAVG_A::AVG2) + pub fn avg2(self) -> &'a mut crate::W { + self.variant(Digavg::Avg2) } #[doc = "Collect and average 4 digital output words."] #[inline(always)] - pub fn avg4(self) -> &'a mut W { - self.variant(DIGAVG_A::AVG4) + pub fn avg4(self) -> &'a mut crate::W { + self.variant(Digavg::Avg4) } #[doc = "Collect and average 8 digital output words."] #[inline(always)] - pub fn avg8(self) -> &'a mut W { - self.variant(DIGAVG_A::AVG8) + pub fn avg8(self) -> &'a mut crate::W { + self.variant(Digavg::Avg8) } #[doc = "Collect and average 16 digital output words."] #[inline(always)] - pub fn avg16(self) -> &'a mut W { - self.variant(DIGAVG_A::AVG16) + pub fn avg16(self) -> &'a mut crate::W { + self.variant(Digavg::Avg16) } } -#[doc = "Field `TWOSCOMPL` reader - Two's Complement"] -pub type TWOSCOMPL_R = crate::FieldReader; #[doc = "Two's Complement\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TWOSCOMPL_A { +pub enum Twoscompl { #[doc = "0: Automatic: Single ended measurements are reported as unipolar and differential measurements are reported as bipolar."] - AUTO = 0, + Auto = 0, #[doc = "1: Force all measurements to result in unipolar output. Negative differential numbers will saturate to 0."] - FORCEUNIPOLAR = 1, + Forceunipolar = 1, #[doc = "2: Force all measurements to result in bipolar output. Single ended measurements are half the range, but allow for small negative measurements."] - FORCEBIPOLAR = 2, + Forcebipolar = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TWOSCOMPL_A) -> Self { + fn from(variant: Twoscompl) -> Self { variant as _ } } -impl TWOSCOMPL_R { +impl crate::FieldSpec for Twoscompl { + type Ux = u8; +} +impl crate::IsEnum for Twoscompl {} +#[doc = "Field `TWOSCOMPL` reader - Two's Complement"] +pub type TwoscomplR = crate::FieldReader; +impl TwoscomplR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TWOSCOMPL_A::AUTO), - 1 => Some(TWOSCOMPL_A::FORCEUNIPOLAR), - 2 => Some(TWOSCOMPL_A::FORCEBIPOLAR), + 0 => Some(Twoscompl::Auto), + 1 => Some(Twoscompl::Forceunipolar), + 2 => Some(Twoscompl::Forcebipolar), _ => None, } } - #[doc = "Checks if the value of the field is `AUTO`"] + #[doc = "Automatic: Single ended measurements are reported as unipolar and differential measurements are reported as bipolar."] #[inline(always)] pub fn is_auto(&self) -> bool { - *self == TWOSCOMPL_A::AUTO + *self == Twoscompl::Auto } - #[doc = "Checks if the value of the field is `FORCEUNIPOLAR`"] + #[doc = "Force all measurements to result in unipolar output. Negative differential numbers will saturate to 0."] #[inline(always)] pub fn is_forceunipolar(&self) -> bool { - *self == TWOSCOMPL_A::FORCEUNIPOLAR + *self == Twoscompl::Forceunipolar } - #[doc = "Checks if the value of the field is `FORCEBIPOLAR`"] + #[doc = "Force all measurements to result in bipolar output. Single ended measurements are half the range, but allow for small negative measurements."] #[inline(always)] pub fn is_forcebipolar(&self) -> bool { - *self == TWOSCOMPL_A::FORCEBIPOLAR + *self == Twoscompl::Forcebipolar } } #[doc = "Field `TWOSCOMPL` writer - Two's Complement"] -pub type TWOSCOMPL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CFG1_SPEC, u8, TWOSCOMPL_A, 2, O>; -impl<'a, const O: u8> TWOSCOMPL_W<'a, O> { +pub type TwoscomplW<'a, REG> = crate::FieldWriter<'a, REG, 2, Twoscompl>; +impl<'a, REG> TwoscomplW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Automatic: Single ended measurements are reported as unipolar and differential measurements are reported as bipolar."] #[inline(always)] - pub fn auto(self) -> &'a mut W { - self.variant(TWOSCOMPL_A::AUTO) + pub fn auto(self) -> &'a mut crate::W { + self.variant(Twoscompl::Auto) } #[doc = "Force all measurements to result in unipolar output. Negative differential numbers will saturate to 0."] #[inline(always)] - pub fn forceunipolar(self) -> &'a mut W { - self.variant(TWOSCOMPL_A::FORCEUNIPOLAR) + pub fn forceunipolar(self) -> &'a mut crate::W { + self.variant(Twoscompl::Forceunipolar) } #[doc = "Force all measurements to result in bipolar output. Single ended measurements are half the range, but allow for small negative measurements."] #[inline(always)] - pub fn forcebipolar(self) -> &'a mut W { - self.variant(TWOSCOMPL_A::FORCEBIPOLAR) + pub fn forcebipolar(self) -> &'a mut crate::W { + self.variant(Twoscompl::Forcebipolar) } } impl R { #[doc = "Bits 0:1 - ADC Mode"] #[inline(always)] - pub fn adcmode(&self) -> ADCMODE_R { - ADCMODE_R::new((self.bits & 3) as u8) + pub fn adcmode(&self) -> AdcmodeR { + AdcmodeR::new((self.bits & 3) as u8) } #[doc = "Bits 2:4 - High Speed OSR"] #[inline(always)] - pub fn osrhs(&self) -> OSRHS_R { - OSRHS_R::new(((self.bits >> 2) & 7) as u8) - } - #[doc = "Bits 5:7 - High Accuracy OSR"] - #[inline(always)] - pub fn osrha(&self) -> OSRHA_R { - OSRHA_R::new(((self.bits >> 5) & 7) as u8) + pub fn osrhs(&self) -> OsrhsR { + OsrhsR::new(((self.bits >> 2) & 7) as u8) } #[doc = "Bits 12:14 - Analog Gain"] #[inline(always)] - pub fn analoggain(&self) -> ANALOGGAIN_R { - ANALOGGAIN_R::new(((self.bits >> 12) & 7) as u8) + pub fn analoggain(&self) -> AnaloggainR { + AnaloggainR::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Reference Select"] #[inline(always)] - pub fn refsel(&self) -> REFSEL_R { - REFSEL_R::new(((self.bits >> 16) & 7) as u8) + pub fn refsel(&self) -> RefselR { + RefselR::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 21:23 - Digital Averaging"] #[inline(always)] - pub fn digavg(&self) -> DIGAVG_R { - DIGAVG_R::new(((self.bits >> 21) & 7) as u8) + pub fn digavg(&self) -> DigavgR { + DigavgR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 28:29 - Two's Complement"] #[inline(always)] - pub fn twoscompl(&self) -> TWOSCOMPL_R { - TWOSCOMPL_R::new(((self.bits >> 28) & 3) as u8) + pub fn twoscompl(&self) -> TwoscomplR { + TwoscomplR::new(((self.bits >> 28) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - ADC Mode"] #[inline(always)] #[must_use] - pub fn adcmode(&mut self) -> ADCMODE_W<0> { - ADCMODE_W::new(self) + pub fn adcmode(&mut self) -> AdcmodeW { + AdcmodeW::new(self, 0) } #[doc = "Bits 2:4 - High Speed OSR"] #[inline(always)] #[must_use] - pub fn osrhs(&mut self) -> OSRHS_W<2> { - OSRHS_W::new(self) - } - #[doc = "Bits 5:7 - High Accuracy OSR"] - #[inline(always)] - #[must_use] - pub fn osrha(&mut self) -> OSRHA_W<5> { - OSRHA_W::new(self) + pub fn osrhs(&mut self) -> OsrhsW { + OsrhsW::new(self, 2) } #[doc = "Bits 12:14 - Analog Gain"] #[inline(always)] #[must_use] - pub fn analoggain(&mut self) -> ANALOGGAIN_W<12> { - ANALOGGAIN_W::new(self) + pub fn analoggain(&mut self) -> AnaloggainW { + AnaloggainW::new(self, 12) } #[doc = "Bits 16:18 - Reference Select"] #[inline(always)] #[must_use] - pub fn refsel(&mut self) -> REFSEL_W<16> { - REFSEL_W::new(self) + pub fn refsel(&mut self) -> RefselW { + RefselW::new(self, 16) } #[doc = "Bits 21:23 - Digital Averaging"] #[inline(always)] #[must_use] - pub fn digavg(&mut self) -> DIGAVG_W<21> { - DIGAVG_W::new(self) + pub fn digavg(&mut self) -> DigavgW { + DigavgW::new(self, 21) } #[doc = "Bits 28:29 - Two's Complement"] #[inline(always)] #[must_use] - pub fn twoscompl(&mut self) -> TWOSCOMPL_W<28> { - TWOSCOMPL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn twoscompl(&mut self) -> TwoscomplW { + TwoscomplW::new(self, 28) } } -#[doc = "Configration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg1](index.html) module"] -pub struct CFG1_SPEC; -impl crate::RegisterSpec for CFG1_SPEC { +#[doc = "Configration\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cfg1Spec; +impl crate::RegisterSpec for Cfg1Spec { type Ux = u32; } -#[doc = "`read()` method returns [cfg1::R](R) reader structure"] -impl crate::Readable for CFG1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg1::W](W) writer structure"] -impl crate::Writable for CFG1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg1::R`](R) reader structure"] +impl crate::Readable for Cfg1Spec {} +#[doc = "`write(|w| ..)` method takes [`cfg1::W`](W) writer structure"] +impl crate::Writable for Cfg1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG1 to value 0x2060"] -impl crate::Resettable for CFG1_SPEC { - const RESET_VALUE: Self::Ux = 0x2060; +impl crate::Resettable for Cfg1Spec { + const RESET_VALUE: u32 = 0x2060; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/cmd.rs index bac1679..e3a5d03 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/cmd.rs @@ -1,108 +1,83 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SINGLESTART` writer - Single Queue Start"] -pub type SINGLESTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type SinglestartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SINGLESTOP` writer - Single Queue Stop"] -pub type SINGLESTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type SinglestopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANSTART` writer - Scan Queue Start"] -pub type SCANSTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type ScanstartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANSTOP` writer - Scan Queue Stop"] -pub type SCANSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type ScanstopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMEREN` writer - Timer Enable"] -pub type TIMEREN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TimerenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMERDIS` writer - Timer Disable"] -pub type TIMERDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TimerdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SINGLEFIFOFLUSH` writer - Flush the Single FIFO"] -pub type SINGLEFIFOFLUSH_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type SinglefifoflushW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANFIFOFLUSH` writer - Flush the Scan FIFO"] -pub type SCANFIFOFLUSH_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type ScanfifoflushW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Single Queue Start"] #[inline(always)] #[must_use] - pub fn singlestart(&mut self) -> SINGLESTART_W<0> { - SINGLESTART_W::new(self) + pub fn singlestart(&mut self) -> SinglestartW { + SinglestartW::new(self, 0) } #[doc = "Bit 1 - Single Queue Stop"] #[inline(always)] #[must_use] - pub fn singlestop(&mut self) -> SINGLESTOP_W<1> { - SINGLESTOP_W::new(self) + pub fn singlestop(&mut self) -> SinglestopW { + SinglestopW::new(self, 1) } #[doc = "Bit 3 - Scan Queue Start"] #[inline(always)] #[must_use] - pub fn scanstart(&mut self) -> SCANSTART_W<3> { - SCANSTART_W::new(self) + pub fn scanstart(&mut self) -> ScanstartW { + ScanstartW::new(self, 3) } #[doc = "Bit 4 - Scan Queue Stop"] #[inline(always)] #[must_use] - pub fn scanstop(&mut self) -> SCANSTOP_W<4> { - SCANSTOP_W::new(self) + pub fn scanstop(&mut self) -> ScanstopW { + ScanstopW::new(self, 4) } #[doc = "Bit 16 - Timer Enable"] #[inline(always)] #[must_use] - pub fn timeren(&mut self) -> TIMEREN_W<16> { - TIMEREN_W::new(self) + pub fn timeren(&mut self) -> TimerenW { + TimerenW::new(self, 16) } #[doc = "Bit 17 - Timer Disable"] #[inline(always)] #[must_use] - pub fn timerdis(&mut self) -> TIMERDIS_W<17> { - TIMERDIS_W::new(self) + pub fn timerdis(&mut self) -> TimerdisW { + TimerdisW::new(self, 17) } #[doc = "Bit 24 - Flush the Single FIFO"] #[inline(always)] #[must_use] - pub fn singlefifoflush(&mut self) -> SINGLEFIFOFLUSH_W<24> { - SINGLEFIFOFLUSH_W::new(self) + pub fn singlefifoflush(&mut self) -> SinglefifoflushW { + SinglefifoflushW::new(self, 24) } #[doc = "Bit 25 - Flush the Scan FIFO"] #[inline(always)] #[must_use] - pub fn scanfifoflush(&mut self) -> SCANFIFOFLUSH_W<25> { - SCANFIFOFLUSH_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn scanfifoflush(&mut self) -> ScanfifoflushW { + ScanfifoflushW::new(self, 25) } } -#[doc = "Command\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "Command\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/cmpthr.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/cmpthr.rs index 2b26093..4428ca3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/cmpthr.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/cmpthr.rs @@ -1,95 +1,55 @@ #[doc = "Register `CMPTHR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CMPTHR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ADLT` reader - ADC Less Than or Equal to Threshold"] -pub type ADLT_R = crate::FieldReader; +pub type AdltR = crate::FieldReader; #[doc = "Field `ADLT` writer - ADC Less Than or Equal to Threshold"] -pub type ADLT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CMPTHR_SPEC, u16, u16, 16, O>; +pub type AdltW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `ADGT` reader - ADC Greater Than or Equal to Threshold"] -pub type ADGT_R = crate::FieldReader; +pub type AdgtR = crate::FieldReader; #[doc = "Field `ADGT` writer - ADC Greater Than or Equal to Threshold"] -pub type ADGT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CMPTHR_SPEC, u16, u16, 16, O>; +pub type AdgtW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - ADC Less Than or Equal to Threshold"] #[inline(always)] - pub fn adlt(&self) -> ADLT_R { - ADLT_R::new((self.bits & 0xffff) as u16) + pub fn adlt(&self) -> AdltR { + AdltR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - ADC Greater Than or Equal to Threshold"] #[inline(always)] - pub fn adgt(&self) -> ADGT_R { - ADGT_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn adgt(&self) -> AdgtR { + AdgtR::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - ADC Less Than or Equal to Threshold"] #[inline(always)] #[must_use] - pub fn adlt(&mut self) -> ADLT_W<0> { - ADLT_W::new(self) + pub fn adlt(&mut self) -> AdltW { + AdltW::new(self, 0) } #[doc = "Bits 16:31 - ADC Greater Than or Equal to Threshold"] #[inline(always)] #[must_use] - pub fn adgt(&mut self) -> ADGT_W<16> { - ADGT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn adgt(&mut self) -> AdgtW { + AdgtW::new(self, 16) } } -#[doc = "Comparator Threshold\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmpthr](index.html) module"] -pub struct CMPTHR_SPEC; -impl crate::RegisterSpec for CMPTHR_SPEC { +#[doc = "Comparator Threshold\n\nYou can [`read`](crate::Reg::read) this register and get [`cmpthr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmpthr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmpthrSpec; +impl crate::RegisterSpec for CmpthrSpec { type Ux = u32; } -#[doc = "`read()` method returns [cmpthr::R](R) reader structure"] -impl crate::Readable for CMPTHR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cmpthr::W](W) writer structure"] -impl crate::Writable for CMPTHR_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cmpthr::R`](R) reader structure"] +impl crate::Readable for CmpthrSpec {} +#[doc = "`write(|w| ..)` method takes [`cmpthr::W`](W) writer structure"] +impl crate::Writable for CmpthrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMPTHR to value 0"] -impl crate::Resettable for CMPTHR_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmpthrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/ctrl.rs index 9c6c0db..3bb735d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/ctrl.rs @@ -1,494 +1,477 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EM23WUCONVERT` reader - EM23 Wakeup on Conversion"] -pub type EM23WUCONVERT_R = crate::BitReader; +pub type W = crate::W; #[doc = "EM23 Wakeup on Conversion\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EM23WUCONVERT_A { +pub enum Em23wuconvert { #[doc = "0: When using suspend mode, conversions performed in EM2 or EM3 should not wake up the DMA until the FIFO's DVL setting is reached. This saves more power for large OSR settings or infrequent sampling."] - WUDVL = 0, + Wudvl = 0, #[doc = "1: When using suspend mode, conversions performed in EM2 or EM3 will wake up the DMA and keep it awake until the conversions are done, regardless of the DVL setting. This mode burns more power, but it is useful when the conversion rate is faster than the time for the DMA to cycle through wake up and going back to sleep as it converts more than 4 scan table entries. Without using the wake up on conversion mode, the FIFO may overflow while the DMA is going in and out of sleep."] - WUCONVERT = 1, + Wuconvert = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EM23WUCONVERT_A) -> Self { + fn from(variant: Em23wuconvert) -> Self { variant as u8 != 0 } } -impl EM23WUCONVERT_R { +#[doc = "Field `EM23WUCONVERT` reader - EM23 Wakeup on Conversion"] +pub type Em23wuconvertR = crate::BitReader; +impl Em23wuconvertR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EM23WUCONVERT_A { + pub const fn variant(&self) -> Em23wuconvert { match self.bits { - false => EM23WUCONVERT_A::WUDVL, - true => EM23WUCONVERT_A::WUCONVERT, + false => Em23wuconvert::Wudvl, + true => Em23wuconvert::Wuconvert, } } - #[doc = "Checks if the value of the field is `WUDVL`"] + #[doc = "When using suspend mode, conversions performed in EM2 or EM3 should not wake up the DMA until the FIFO's DVL setting is reached. This saves more power for large OSR settings or infrequent sampling."] #[inline(always)] pub fn is_wudvl(&self) -> bool { - *self == EM23WUCONVERT_A::WUDVL + *self == Em23wuconvert::Wudvl } - #[doc = "Checks if the value of the field is `WUCONVERT`"] + #[doc = "When using suspend mode, conversions performed in EM2 or EM3 will wake up the DMA and keep it awake until the conversions are done, regardless of the DVL setting. This mode burns more power, but it is useful when the conversion rate is faster than the time for the DMA to cycle through wake up and going back to sleep as it converts more than 4 scan table entries. Without using the wake up on conversion mode, the FIFO may overflow while the DMA is going in and out of sleep."] #[inline(always)] pub fn is_wuconvert(&self) -> bool { - *self == EM23WUCONVERT_A::WUCONVERT + *self == Em23wuconvert::Wuconvert } } #[doc = "Field `EM23WUCONVERT` writer - EM23 Wakeup on Conversion"] -pub type EM23WUCONVERT_W<'a, const O: u8> = - crate::BitWriter<'a, u32, CTRL_SPEC, EM23WUCONVERT_A, O>; -impl<'a, const O: u8> EM23WUCONVERT_W<'a, O> { +pub type Em23wuconvertW<'a, REG> = crate::BitWriter<'a, REG, Em23wuconvert>; +impl<'a, REG> Em23wuconvertW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "When using suspend mode, conversions performed in EM2 or EM3 should not wake up the DMA until the FIFO's DVL setting is reached. This saves more power for large OSR settings or infrequent sampling."] #[inline(always)] - pub fn wudvl(self) -> &'a mut W { - self.variant(EM23WUCONVERT_A::WUDVL) + pub fn wudvl(self) -> &'a mut crate::W { + self.variant(Em23wuconvert::Wudvl) } #[doc = "When using suspend mode, conversions performed in EM2 or EM3 will wake up the DMA and keep it awake until the conversions are done, regardless of the DVL setting. This mode burns more power, but it is useful when the conversion rate is faster than the time for the DMA to cycle through wake up and going back to sleep as it converts more than 4 scan table entries. Without using the wake up on conversion mode, the FIFO may overflow while the DMA is going in and out of sleep."] #[inline(always)] - pub fn wuconvert(self) -> &'a mut W { - self.variant(EM23WUCONVERT_A::WUCONVERT) + pub fn wuconvert(self) -> &'a mut crate::W { + self.variant(Em23wuconvert::Wuconvert) } } -#[doc = "Field `ADCCLKSUSPEND0` reader - ADC_CLK Suspend - PRS0"] -pub type ADCCLKSUSPEND0_R = crate::BitReader; #[doc = "ADC_CLK Suspend - PRS0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ADCCLKSUSPEND0_A { +pub enum Adcclksuspend0 { #[doc = "0: Normal mode which does not disable the ADC_CLK."] - PRSWUDIS = 0, + Prswudis = 0, #[doc = "1: ADCCLKWUEN will gate off ADC_CLK until the trigger is detected provided the internal timer is not selected as the trigger. Once the trigger is detected the ADC_CLK will be started, the band gap will be started, the ADC will be warmed up, and the SCAN Table and the Single entry will be converted. Once the conversions are done, the ADC_CLK will be gated off."] - PRSWUEN = 1, + Prswuen = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ADCCLKSUSPEND0_A) -> Self { + fn from(variant: Adcclksuspend0) -> Self { variant as u8 != 0 } } -impl ADCCLKSUSPEND0_R { +#[doc = "Field `ADCCLKSUSPEND0` reader - ADC_CLK Suspend - PRS0"] +pub type Adcclksuspend0R = crate::BitReader; +impl Adcclksuspend0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ADCCLKSUSPEND0_A { + pub const fn variant(&self) -> Adcclksuspend0 { match self.bits { - false => ADCCLKSUSPEND0_A::PRSWUDIS, - true => ADCCLKSUSPEND0_A::PRSWUEN, + false => Adcclksuspend0::Prswudis, + true => Adcclksuspend0::Prswuen, } } - #[doc = "Checks if the value of the field is `PRSWUDIS`"] + #[doc = "Normal mode which does not disable the ADC_CLK."] #[inline(always)] pub fn is_prswudis(&self) -> bool { - *self == ADCCLKSUSPEND0_A::PRSWUDIS + *self == Adcclksuspend0::Prswudis } - #[doc = "Checks if the value of the field is `PRSWUEN`"] + #[doc = "ADCCLKWUEN will gate off ADC_CLK until the trigger is detected provided the internal timer is not selected as the trigger. Once the trigger is detected the ADC_CLK will be started, the band gap will be started, the ADC will be warmed up, and the SCAN Table and the Single entry will be converted. Once the conversions are done, the ADC_CLK will be gated off."] #[inline(always)] pub fn is_prswuen(&self) -> bool { - *self == ADCCLKSUSPEND0_A::PRSWUEN + *self == Adcclksuspend0::Prswuen } } #[doc = "Field `ADCCLKSUSPEND0` writer - ADC_CLK Suspend - PRS0"] -pub type ADCCLKSUSPEND0_W<'a, const O: u8> = - crate::BitWriter<'a, u32, CTRL_SPEC, ADCCLKSUSPEND0_A, O>; -impl<'a, const O: u8> ADCCLKSUSPEND0_W<'a, O> { +pub type Adcclksuspend0W<'a, REG> = crate::BitWriter<'a, REG, Adcclksuspend0>; +impl<'a, REG> Adcclksuspend0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Normal mode which does not disable the ADC_CLK."] #[inline(always)] - pub fn prswudis(self) -> &'a mut W { - self.variant(ADCCLKSUSPEND0_A::PRSWUDIS) + pub fn prswudis(self) -> &'a mut crate::W { + self.variant(Adcclksuspend0::Prswudis) } #[doc = "ADCCLKWUEN will gate off ADC_CLK until the trigger is detected provided the internal timer is not selected as the trigger. Once the trigger is detected the ADC_CLK will be started, the band gap will be started, the ADC will be warmed up, and the SCAN Table and the Single entry will be converted. Once the conversions are done, the ADC_CLK will be gated off."] #[inline(always)] - pub fn prswuen(self) -> &'a mut W { - self.variant(ADCCLKSUSPEND0_A::PRSWUEN) + pub fn prswuen(self) -> &'a mut crate::W { + self.variant(Adcclksuspend0::Prswuen) } } -#[doc = "Field `ADCCLKSUSPEND1` reader - ADC_CLK Suspend - PRS1"] -pub type ADCCLKSUSPEND1_R = crate::BitReader; #[doc = "ADC_CLK Suspend - PRS1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ADCCLKSUSPEND1_A { +pub enum Adcclksuspend1 { #[doc = "0: Normal mode which does not disable the ADC_CLK."] - PRSWUDIS = 0, + Prswudis = 0, #[doc = "1: ADCCLKWUEN will gate off ADC_CLK until the trigger is detected provided the internal timer is not selected as the trigger. Once the trigger is detected the ADC_CLK will be started, the band gap will be started, the ADC will be warmed up, and the SCAN Table and the Single entry will be converted. Once the conversions are done, the ADC_CLK will be gated off."] - PRSWUEN = 1, + Prswuen = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ADCCLKSUSPEND1_A) -> Self { + fn from(variant: Adcclksuspend1) -> Self { variant as u8 != 0 } } -impl ADCCLKSUSPEND1_R { +#[doc = "Field `ADCCLKSUSPEND1` reader - ADC_CLK Suspend - PRS1"] +pub type Adcclksuspend1R = crate::BitReader; +impl Adcclksuspend1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ADCCLKSUSPEND1_A { + pub const fn variant(&self) -> Adcclksuspend1 { match self.bits { - false => ADCCLKSUSPEND1_A::PRSWUDIS, - true => ADCCLKSUSPEND1_A::PRSWUEN, + false => Adcclksuspend1::Prswudis, + true => Adcclksuspend1::Prswuen, } } - #[doc = "Checks if the value of the field is `PRSWUDIS`"] + #[doc = "Normal mode which does not disable the ADC_CLK."] #[inline(always)] pub fn is_prswudis(&self) -> bool { - *self == ADCCLKSUSPEND1_A::PRSWUDIS + *self == Adcclksuspend1::Prswudis } - #[doc = "Checks if the value of the field is `PRSWUEN`"] + #[doc = "ADCCLKWUEN will gate off ADC_CLK until the trigger is detected provided the internal timer is not selected as the trigger. Once the trigger is detected the ADC_CLK will be started, the band gap will be started, the ADC will be warmed up, and the SCAN Table and the Single entry will be converted. Once the conversions are done, the ADC_CLK will be gated off."] #[inline(always)] pub fn is_prswuen(&self) -> bool { - *self == ADCCLKSUSPEND1_A::PRSWUEN + *self == Adcclksuspend1::Prswuen } } #[doc = "Field `ADCCLKSUSPEND1` writer - ADC_CLK Suspend - PRS1"] -pub type ADCCLKSUSPEND1_W<'a, const O: u8> = - crate::BitWriter<'a, u32, CTRL_SPEC, ADCCLKSUSPEND1_A, O>; -impl<'a, const O: u8> ADCCLKSUSPEND1_W<'a, O> { +pub type Adcclksuspend1W<'a, REG> = crate::BitWriter<'a, REG, Adcclksuspend1>; +impl<'a, REG> Adcclksuspend1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Normal mode which does not disable the ADC_CLK."] #[inline(always)] - pub fn prswudis(self) -> &'a mut W { - self.variant(ADCCLKSUSPEND1_A::PRSWUDIS) + pub fn prswudis(self) -> &'a mut crate::W { + self.variant(Adcclksuspend1::Prswudis) } #[doc = "ADCCLKWUEN will gate off ADC_CLK until the trigger is detected provided the internal timer is not selected as the trigger. Once the trigger is detected the ADC_CLK will be started, the band gap will be started, the ADC will be warmed up, and the SCAN Table and the Single entry will be converted. Once the conversions are done, the ADC_CLK will be gated off."] #[inline(always)] - pub fn prswuen(self) -> &'a mut W { - self.variant(ADCCLKSUSPEND1_A::PRSWUEN) + pub fn prswuen(self) -> &'a mut crate::W { + self.variant(Adcclksuspend1::Prswuen) } } -#[doc = "Field `DBGHALT` reader - Debug Halt"] -pub type DBGHALT_R = crate::BitReader; #[doc = "Debug Halt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DBGHALT_A { +pub enum Dbghalt { #[doc = "0: Continue operation as normal during debug mode"] - NORMAL = 0, + Normal = 0, #[doc = "1: Complete the current conversion and then halt during debug mode"] - HALT = 1, + Halt = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DBGHALT_A) -> Self { + fn from(variant: Dbghalt) -> Self { variant as u8 != 0 } } -impl DBGHALT_R { +#[doc = "Field `DBGHALT` reader - Debug Halt"] +pub type DbghaltR = crate::BitReader; +impl DbghaltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DBGHALT_A { + pub const fn variant(&self) -> Dbghalt { match self.bits { - false => DBGHALT_A::NORMAL, - true => DBGHALT_A::HALT, + false => Dbghalt::Normal, + true => Dbghalt::Halt, } } - #[doc = "Checks if the value of the field is `NORMAL`"] + #[doc = "Continue operation as normal during debug mode"] #[inline(always)] pub fn is_normal(&self) -> bool { - *self == DBGHALT_A::NORMAL + *self == Dbghalt::Normal } - #[doc = "Checks if the value of the field is `HALT`"] + #[doc = "Complete the current conversion and then halt during debug mode"] #[inline(always)] pub fn is_halt(&self) -> bool { - *self == DBGHALT_A::HALT + *self == Dbghalt::Halt } } #[doc = "Field `DBGHALT` writer - Debug Halt"] -pub type DBGHALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, DBGHALT_A, O>; -impl<'a, const O: u8> DBGHALT_W<'a, O> { +pub type DbghaltW<'a, REG> = crate::BitWriter<'a, REG, Dbghalt>; +impl<'a, REG> DbghaltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Continue operation as normal during debug mode"] #[inline(always)] - pub fn normal(self) -> &'a mut W { - self.variant(DBGHALT_A::NORMAL) + pub fn normal(self) -> &'a mut crate::W { + self.variant(Dbghalt::Normal) } #[doc = "Complete the current conversion and then halt during debug mode"] #[inline(always)] - pub fn halt(self) -> &'a mut W { - self.variant(DBGHALT_A::HALT) + pub fn halt(self) -> &'a mut crate::W { + self.variant(Dbghalt::Halt) } } -#[doc = "Field `WARMUPMODE` reader - Warmup Mode"] -pub type WARMUPMODE_R = crate::FieldReader; #[doc = "Warmup Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WARMUPMODE_A { +pub enum Warmupmode { #[doc = "0: Shut down the IADC after conversions have completed."] - NORMAL = 0, + Normal = 0, #[doc = "1: Switch to standby mode after conversions have completed. The next warmup time will require 1us."] - KEEPINSTANDBY = 1, + Keepinstandby = 1, #[doc = "2: Keep IADC fully powered after conversions have completed."] - KEEPWARM = 2, + Keepwarm = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WARMUPMODE_A) -> Self { + fn from(variant: Warmupmode) -> Self { variant as _ } } -impl WARMUPMODE_R { +impl crate::FieldSpec for Warmupmode { + type Ux = u8; +} +impl crate::IsEnum for Warmupmode {} +#[doc = "Field `WARMUPMODE` reader - Warmup Mode"] +pub type WarmupmodeR = crate::FieldReader; +impl WarmupmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(WARMUPMODE_A::NORMAL), - 1 => Some(WARMUPMODE_A::KEEPINSTANDBY), - 2 => Some(WARMUPMODE_A::KEEPWARM), + 0 => Some(Warmupmode::Normal), + 1 => Some(Warmupmode::Keepinstandby), + 2 => Some(Warmupmode::Keepwarm), _ => None, } } - #[doc = "Checks if the value of the field is `NORMAL`"] + #[doc = "Shut down the IADC after conversions have completed."] #[inline(always)] pub fn is_normal(&self) -> bool { - *self == WARMUPMODE_A::NORMAL + *self == Warmupmode::Normal } - #[doc = "Checks if the value of the field is `KEEPINSTANDBY`"] + #[doc = "Switch to standby mode after conversions have completed. The next warmup time will require 1us."] #[inline(always)] pub fn is_keepinstandby(&self) -> bool { - *self == WARMUPMODE_A::KEEPINSTANDBY + *self == Warmupmode::Keepinstandby } - #[doc = "Checks if the value of the field is `KEEPWARM`"] + #[doc = "Keep IADC fully powered after conversions have completed."] #[inline(always)] pub fn is_keepwarm(&self) -> bool { - *self == WARMUPMODE_A::KEEPWARM + *self == Warmupmode::Keepwarm } } #[doc = "Field `WARMUPMODE` writer - Warmup Mode"] -pub type WARMUPMODE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CTRL_SPEC, u8, WARMUPMODE_A, 2, O>; -impl<'a, const O: u8> WARMUPMODE_W<'a, O> { +pub type WarmupmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Warmupmode>; +impl<'a, REG> WarmupmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Shut down the IADC after conversions have completed."] #[inline(always)] - pub fn normal(self) -> &'a mut W { - self.variant(WARMUPMODE_A::NORMAL) + pub fn normal(self) -> &'a mut crate::W { + self.variant(Warmupmode::Normal) } #[doc = "Switch to standby mode after conversions have completed. The next warmup time will require 1us."] #[inline(always)] - pub fn keepinstandby(self) -> &'a mut W { - self.variant(WARMUPMODE_A::KEEPINSTANDBY) + pub fn keepinstandby(self) -> &'a mut crate::W { + self.variant(Warmupmode::Keepinstandby) } #[doc = "Keep IADC fully powered after conversions have completed."] #[inline(always)] - pub fn keepwarm(self) -> &'a mut W { - self.variant(WARMUPMODE_A::KEEPWARM) + pub fn keepwarm(self) -> &'a mut crate::W { + self.variant(Warmupmode::Keepwarm) } } #[doc = "Field `TIMEBASE` reader - Time Base"] -pub type TIMEBASE_R = crate::FieldReader; +pub type TimebaseR = crate::FieldReader; #[doc = "Field `TIMEBASE` writer - Time Base"] -pub type TIMEBASE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, u8, 7, O>; -#[doc = "Field `HSCLKRATE` reader - High Speed Clock Rate"] -pub type HSCLKRATE_R = crate::FieldReader; +pub type TimebaseW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "High Speed Clock Rate\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HSCLKRATE_A { +pub enum Hsclkrate { #[doc = "0: Use CMU_CLK_ADC directly. The source clock must be 40 MHz or less."] - DIV1 = 0, + Div1 = 0, #[doc = "1: Divide CMU_CLK_ADC by 2 before using it. The resulting CLK_SRC_ADC must be 40 MHz or less."] - DIV2 = 1, + Div2 = 1, #[doc = "2: Divide CMU_CLK_ADC by 3 before using it. The resulting CLK_SRC_ADC must be 40 MHz or less."] - DIV3 = 2, + Div3 = 2, #[doc = "3: Divide CMU_CLK_ADC by 4 before using it. The resulting CLK_SRC_ADC must be 40 MHz or less."] - DIV4 = 3, + Div4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HSCLKRATE_A) -> Self { + fn from(variant: Hsclkrate) -> Self { variant as _ } } -impl HSCLKRATE_R { +impl crate::FieldSpec for Hsclkrate { + type Ux = u8; +} +impl crate::IsEnum for Hsclkrate {} +#[doc = "Field `HSCLKRATE` reader - High Speed Clock Rate"] +pub type HsclkrateR = crate::FieldReader; +impl HsclkrateR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HSCLKRATE_A::DIV1), - 1 => Some(HSCLKRATE_A::DIV2), - 2 => Some(HSCLKRATE_A::DIV3), - 3 => Some(HSCLKRATE_A::DIV4), + 0 => Some(Hsclkrate::Div1), + 1 => Some(Hsclkrate::Div2), + 2 => Some(Hsclkrate::Div3), + 3 => Some(Hsclkrate::Div4), _ => None, } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "Use CMU_CLK_ADC directly. The source clock must be 40 MHz or less."] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == HSCLKRATE_A::DIV1 + *self == Hsclkrate::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "Divide CMU_CLK_ADC by 2 before using it. The resulting CLK_SRC_ADC must be 40 MHz or less."] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == HSCLKRATE_A::DIV2 + *self == Hsclkrate::Div2 } - #[doc = "Checks if the value of the field is `DIV3`"] + #[doc = "Divide CMU_CLK_ADC by 3 before using it. The resulting CLK_SRC_ADC must be 40 MHz or less."] #[inline(always)] pub fn is_div3(&self) -> bool { - *self == HSCLKRATE_A::DIV3 + *self == Hsclkrate::Div3 } - #[doc = "Checks if the value of the field is `DIV4`"] + #[doc = "Divide CMU_CLK_ADC by 4 before using it. The resulting CLK_SRC_ADC must be 40 MHz or less."] #[inline(always)] pub fn is_div4(&self) -> bool { - *self == HSCLKRATE_A::DIV4 + *self == Hsclkrate::Div4 } } #[doc = "Field `HSCLKRATE` writer - High Speed Clock Rate"] -pub type HSCLKRATE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CTRL_SPEC, u8, HSCLKRATE_A, 3, O>; -impl<'a, const O: u8> HSCLKRATE_W<'a, O> { +pub type HsclkrateW<'a, REG> = crate::FieldWriter<'a, REG, 3, Hsclkrate>; +impl<'a, REG> HsclkrateW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Use CMU_CLK_ADC directly. The source clock must be 40 MHz or less."] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(HSCLKRATE_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Hsclkrate::Div1) } #[doc = "Divide CMU_CLK_ADC by 2 before using it. The resulting CLK_SRC_ADC must be 40 MHz or less."] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(HSCLKRATE_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Hsclkrate::Div2) } #[doc = "Divide CMU_CLK_ADC by 3 before using it. The resulting CLK_SRC_ADC must be 40 MHz or less."] #[inline(always)] - pub fn div3(self) -> &'a mut W { - self.variant(HSCLKRATE_A::DIV3) + pub fn div3(self) -> &'a mut crate::W { + self.variant(Hsclkrate::Div3) } #[doc = "Divide CMU_CLK_ADC by 4 before using it. The resulting CLK_SRC_ADC must be 40 MHz or less."] #[inline(always)] - pub fn div4(self) -> &'a mut W { - self.variant(HSCLKRATE_A::DIV4) + pub fn div4(self) -> &'a mut crate::W { + self.variant(Hsclkrate::Div4) } } impl R { #[doc = "Bit 0 - EM23 Wakeup on Conversion"] #[inline(always)] - pub fn em23wuconvert(&self) -> EM23WUCONVERT_R { - EM23WUCONVERT_R::new((self.bits & 1) != 0) + pub fn em23wuconvert(&self) -> Em23wuconvertR { + Em23wuconvertR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - ADC_CLK Suspend - PRS0"] #[inline(always)] - pub fn adcclksuspend0(&self) -> ADCCLKSUSPEND0_R { - ADCCLKSUSPEND0_R::new(((self.bits >> 1) & 1) != 0) + pub fn adcclksuspend0(&self) -> Adcclksuspend0R { + Adcclksuspend0R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - ADC_CLK Suspend - PRS1"] #[inline(always)] - pub fn adcclksuspend1(&self) -> ADCCLKSUSPEND1_R { - ADCCLKSUSPEND1_R::new(((self.bits >> 2) & 1) != 0) + pub fn adcclksuspend1(&self) -> Adcclksuspend1R { + Adcclksuspend1R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Debug Halt"] #[inline(always)] - pub fn dbghalt(&self) -> DBGHALT_R { - DBGHALT_R::new(((self.bits >> 3) & 1) != 0) + pub fn dbghalt(&self) -> DbghaltR { + DbghaltR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:5 - Warmup Mode"] #[inline(always)] - pub fn warmupmode(&self) -> WARMUPMODE_R { - WARMUPMODE_R::new(((self.bits >> 4) & 3) as u8) + pub fn warmupmode(&self) -> WarmupmodeR { + WarmupmodeR::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 16:22 - Time Base"] #[inline(always)] - pub fn timebase(&self) -> TIMEBASE_R { - TIMEBASE_R::new(((self.bits >> 16) & 0x7f) as u8) + pub fn timebase(&self) -> TimebaseR { + TimebaseR::new(((self.bits >> 16) & 0x7f) as u8) } #[doc = "Bits 28:30 - High Speed Clock Rate"] #[inline(always)] - pub fn hsclkrate(&self) -> HSCLKRATE_R { - HSCLKRATE_R::new(((self.bits >> 28) & 7) as u8) + pub fn hsclkrate(&self) -> HsclkrateR { + HsclkrateR::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bit 0 - EM23 Wakeup on Conversion"] #[inline(always)] #[must_use] - pub fn em23wuconvert(&mut self) -> EM23WUCONVERT_W<0> { - EM23WUCONVERT_W::new(self) + pub fn em23wuconvert(&mut self) -> Em23wuconvertW { + Em23wuconvertW::new(self, 0) } #[doc = "Bit 1 - ADC_CLK Suspend - PRS0"] #[inline(always)] #[must_use] - pub fn adcclksuspend0(&mut self) -> ADCCLKSUSPEND0_W<1> { - ADCCLKSUSPEND0_W::new(self) + pub fn adcclksuspend0(&mut self) -> Adcclksuspend0W { + Adcclksuspend0W::new(self, 1) } #[doc = "Bit 2 - ADC_CLK Suspend - PRS1"] #[inline(always)] #[must_use] - pub fn adcclksuspend1(&mut self) -> ADCCLKSUSPEND1_W<2> { - ADCCLKSUSPEND1_W::new(self) + pub fn adcclksuspend1(&mut self) -> Adcclksuspend1W { + Adcclksuspend1W::new(self, 2) } #[doc = "Bit 3 - Debug Halt"] #[inline(always)] #[must_use] - pub fn dbghalt(&mut self) -> DBGHALT_W<3> { - DBGHALT_W::new(self) + pub fn dbghalt(&mut self) -> DbghaltW { + DbghaltW::new(self, 3) } #[doc = "Bits 4:5 - Warmup Mode"] #[inline(always)] #[must_use] - pub fn warmupmode(&mut self) -> WARMUPMODE_W<4> { - WARMUPMODE_W::new(self) + pub fn warmupmode(&mut self) -> WarmupmodeW { + WarmupmodeW::new(self, 4) } #[doc = "Bits 16:22 - Time Base"] #[inline(always)] #[must_use] - pub fn timebase(&mut self) -> TIMEBASE_W<16> { - TIMEBASE_W::new(self) + pub fn timebase(&mut self) -> TimebaseW { + TimebaseW::new(self, 16) } #[doc = "Bits 28:30 - High Speed Clock Rate"] #[inline(always)] #[must_use] - pub fn hsclkrate(&mut self) -> HSCLKRATE_W<28> { - HSCLKRATE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn hsclkrate(&mut self) -> HsclkrateW { + HsclkrateW::new(self, 28) } } -#[doc = "Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "Control\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/en.rs index 5c71542..4f58fa2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/en.rs @@ -1,133 +1,96 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EN` reader - Enable IADC Module"] -pub type EN_R = crate::BitReader; +pub type W = crate::W; #[doc = "Enable IADC Module\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EN_A { +pub enum En { #[doc = "0: Disable"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enable"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EN_A) -> Self { + fn from(variant: En) -> Self { variant as u8 != 0 } } -impl EN_R { +#[doc = "Field `EN` reader - Enable IADC Module"] +pub type EnR = crate::BitReader; +impl EnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EN_A { + pub const fn variant(&self) -> En { match self.bits { - false => EN_A::DISABLE, - true => EN_A::ENABLE, + false => En::Disable, + true => En::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EN_A::DISABLE + *self == En::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enable"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EN_A::ENABLE + *self == En::Enable } } #[doc = "Field `EN` writer - Enable IADC Module"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, EN_A, O>; -impl<'a, const O: u8> EN_W<'a, O> { +pub type EnW<'a, REG> = crate::BitWriter<'a, REG, En>; +impl<'a, REG> EnW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(En::Disable) } #[doc = "Enable"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(En::Enable) } } #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Enable IADC Module"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable IADC Module"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "Enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/ien.rs index f5945e7..4d21f2b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/ien.rs @@ -1,275 +1,235 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SINGLEFIFODVL` reader - Single FIFO Data Valid Level Enable"] -pub type SINGLEFIFODVL_R = crate::BitReader; +pub type SinglefifodvlR = crate::BitReader; #[doc = "Field `SINGLEFIFODVL` writer - Single FIFO Data Valid Level Enable"] -pub type SINGLEFIFODVL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SinglefifodvlW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANFIFODVL` reader - Scan FIFO Data Valid Level Enable"] -pub type SCANFIFODVL_R = crate::BitReader; +pub type ScanfifodvlR = crate::BitReader; #[doc = "Field `SCANFIFODVL` writer - Scan FIFO Data Valid Level Enable"] -pub type SCANFIFODVL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ScanfifodvlW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SINGLECMP` reader - Single Result Window Compare Enable"] -pub type SINGLECMP_R = crate::BitReader; +pub type SinglecmpR = crate::BitReader; #[doc = "Field `SINGLECMP` writer - Single Result Window Compare Enable"] -pub type SINGLECMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SinglecmpW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANCMP` reader - Scan Result Window Compare Enable"] -pub type SCANCMP_R = crate::BitReader; +pub type ScancmpR = crate::BitReader; #[doc = "Field `SCANCMP` writer - Scan Result Window Compare Enable"] -pub type SCANCMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ScancmpW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANENTRYDONE` reader - Scan Entry Done Enable"] -pub type SCANENTRYDONE_R = crate::BitReader; +pub type ScanentrydoneR = crate::BitReader; #[doc = "Field `SCANENTRYDONE` writer - Scan Entry Done Enable"] -pub type SCANENTRYDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ScanentrydoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANTABLEDONE` reader - Scan Table Done Enable"] -pub type SCANTABLEDONE_R = crate::BitReader; +pub type ScantabledoneR = crate::BitReader; #[doc = "Field `SCANTABLEDONE` writer - Scan Table Done Enable"] -pub type SCANTABLEDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ScantabledoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SINGLEDONE` reader - Single Conversion Done Enable"] -pub type SINGLEDONE_R = crate::BitReader; +pub type SingledoneR = crate::BitReader; #[doc = "Field `SINGLEDONE` writer - Single Conversion Done Enable"] -pub type SINGLEDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SingledoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POLARITYERR` reader - Polarity Error Enable"] -pub type POLARITYERR_R = crate::BitReader; +pub type PolarityerrR = crate::BitReader; #[doc = "Field `POLARITYERR` writer - Polarity Error Enable"] -pub type POLARITYERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PolarityerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PORTALLOCERR` reader - Port Allocation Error Enable"] -pub type PORTALLOCERR_R = crate::BitReader; +pub type PortallocerrR = crate::BitReader; #[doc = "Field `PORTALLOCERR` writer - Port Allocation Error Enable"] -pub type PORTALLOCERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PortallocerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SINGLEFIFOOF` reader - Single FIFO Overflow Enable"] -pub type SINGLEFIFOOF_R = crate::BitReader; +pub type SinglefifoofR = crate::BitReader; #[doc = "Field `SINGLEFIFOOF` writer - Single FIFO Overflow Enable"] -pub type SINGLEFIFOOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SinglefifoofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANFIFOOF` reader - Scan FIFO Overflow Enable"] -pub type SCANFIFOOF_R = crate::BitReader; +pub type ScanfifoofR = crate::BitReader; #[doc = "Field `SCANFIFOOF` writer - Scan FIFO Overflow Enable"] -pub type SCANFIFOOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ScanfifoofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SINGLEFIFOUF` reader - Single FIFO Underflow Enable"] -pub type SINGLEFIFOUF_R = crate::BitReader; +pub type SinglefifoufR = crate::BitReader; #[doc = "Field `SINGLEFIFOUF` writer - Single FIFO Underflow Enable"] -pub type SINGLEFIFOUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SinglefifoufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANFIFOUF` reader - Scan FIFO Underflow Enable"] -pub type SCANFIFOUF_R = crate::BitReader; +pub type ScanfifoufR = crate::BitReader; #[doc = "Field `SCANFIFOUF` writer - Scan FIFO Underflow Enable"] -pub type SCANFIFOUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ScanfifoufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM23ABORTERROR` reader - EM2/3 Abort Error Enable"] -pub type EM23ABORTERROR_R = crate::BitReader; +pub type Em23aborterrorR = crate::BitReader; #[doc = "Field `EM23ABORTERROR` writer - EM2/3 Abort Error Enable"] -pub type EM23ABORTERROR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em23aborterrorW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Single FIFO Data Valid Level Enable"] #[inline(always)] - pub fn singlefifodvl(&self) -> SINGLEFIFODVL_R { - SINGLEFIFODVL_R::new((self.bits & 1) != 0) + pub fn singlefifodvl(&self) -> SinglefifodvlR { + SinglefifodvlR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Scan FIFO Data Valid Level Enable"] #[inline(always)] - pub fn scanfifodvl(&self) -> SCANFIFODVL_R { - SCANFIFODVL_R::new(((self.bits >> 1) & 1) != 0) + pub fn scanfifodvl(&self) -> ScanfifodvlR { + ScanfifodvlR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Single Result Window Compare Enable"] #[inline(always)] - pub fn singlecmp(&self) -> SINGLECMP_R { - SINGLECMP_R::new(((self.bits >> 2) & 1) != 0) + pub fn singlecmp(&self) -> SinglecmpR { + SinglecmpR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Scan Result Window Compare Enable"] #[inline(always)] - pub fn scancmp(&self) -> SCANCMP_R { - SCANCMP_R::new(((self.bits >> 3) & 1) != 0) + pub fn scancmp(&self) -> ScancmpR { + ScancmpR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 7 - Scan Entry Done Enable"] #[inline(always)] - pub fn scanentrydone(&self) -> SCANENTRYDONE_R { - SCANENTRYDONE_R::new(((self.bits >> 7) & 1) != 0) + pub fn scanentrydone(&self) -> ScanentrydoneR { + ScanentrydoneR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Scan Table Done Enable"] #[inline(always)] - pub fn scantabledone(&self) -> SCANTABLEDONE_R { - SCANTABLEDONE_R::new(((self.bits >> 8) & 1) != 0) + pub fn scantabledone(&self) -> ScantabledoneR { + ScantabledoneR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Single Conversion Done Enable"] #[inline(always)] - pub fn singledone(&self) -> SINGLEDONE_R { - SINGLEDONE_R::new(((self.bits >> 9) & 1) != 0) + pub fn singledone(&self) -> SingledoneR { + SingledoneR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 12 - Polarity Error Enable"] #[inline(always)] - pub fn polarityerr(&self) -> POLARITYERR_R { - POLARITYERR_R::new(((self.bits >> 12) & 1) != 0) + pub fn polarityerr(&self) -> PolarityerrR { + PolarityerrR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port Allocation Error Enable"] #[inline(always)] - pub fn portallocerr(&self) -> PORTALLOCERR_R { - PORTALLOCERR_R::new(((self.bits >> 13) & 1) != 0) + pub fn portallocerr(&self) -> PortallocerrR { + PortallocerrR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 16 - Single FIFO Overflow Enable"] #[inline(always)] - pub fn singlefifoof(&self) -> SINGLEFIFOOF_R { - SINGLEFIFOOF_R::new(((self.bits >> 16) & 1) != 0) + pub fn singlefifoof(&self) -> SinglefifoofR { + SinglefifoofR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Scan FIFO Overflow Enable"] #[inline(always)] - pub fn scanfifoof(&self) -> SCANFIFOOF_R { - SCANFIFOOF_R::new(((self.bits >> 17) & 1) != 0) + pub fn scanfifoof(&self) -> ScanfifoofR { + ScanfifoofR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Single FIFO Underflow Enable"] #[inline(always)] - pub fn singlefifouf(&self) -> SINGLEFIFOUF_R { - SINGLEFIFOUF_R::new(((self.bits >> 18) & 1) != 0) + pub fn singlefifouf(&self) -> SinglefifoufR { + SinglefifoufR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Scan FIFO Underflow Enable"] #[inline(always)] - pub fn scanfifouf(&self) -> SCANFIFOUF_R { - SCANFIFOUF_R::new(((self.bits >> 19) & 1) != 0) + pub fn scanfifouf(&self) -> ScanfifoufR { + ScanfifoufR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 31 - EM2/3 Abort Error Enable"] #[inline(always)] - pub fn em23aborterror(&self) -> EM23ABORTERROR_R { - EM23ABORTERROR_R::new(((self.bits >> 31) & 1) != 0) + pub fn em23aborterror(&self) -> Em23aborterrorR { + Em23aborterrorR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Single FIFO Data Valid Level Enable"] #[inline(always)] #[must_use] - pub fn singlefifodvl(&mut self) -> SINGLEFIFODVL_W<0> { - SINGLEFIFODVL_W::new(self) + pub fn singlefifodvl(&mut self) -> SinglefifodvlW { + SinglefifodvlW::new(self, 0) } #[doc = "Bit 1 - Scan FIFO Data Valid Level Enable"] #[inline(always)] #[must_use] - pub fn scanfifodvl(&mut self) -> SCANFIFODVL_W<1> { - SCANFIFODVL_W::new(self) + pub fn scanfifodvl(&mut self) -> ScanfifodvlW { + ScanfifodvlW::new(self, 1) } #[doc = "Bit 2 - Single Result Window Compare Enable"] #[inline(always)] #[must_use] - pub fn singlecmp(&mut self) -> SINGLECMP_W<2> { - SINGLECMP_W::new(self) + pub fn singlecmp(&mut self) -> SinglecmpW { + SinglecmpW::new(self, 2) } #[doc = "Bit 3 - Scan Result Window Compare Enable"] #[inline(always)] #[must_use] - pub fn scancmp(&mut self) -> SCANCMP_W<3> { - SCANCMP_W::new(self) + pub fn scancmp(&mut self) -> ScancmpW { + ScancmpW::new(self, 3) } #[doc = "Bit 7 - Scan Entry Done Enable"] #[inline(always)] #[must_use] - pub fn scanentrydone(&mut self) -> SCANENTRYDONE_W<7> { - SCANENTRYDONE_W::new(self) + pub fn scanentrydone(&mut self) -> ScanentrydoneW { + ScanentrydoneW::new(self, 7) } #[doc = "Bit 8 - Scan Table Done Enable"] #[inline(always)] #[must_use] - pub fn scantabledone(&mut self) -> SCANTABLEDONE_W<8> { - SCANTABLEDONE_W::new(self) + pub fn scantabledone(&mut self) -> ScantabledoneW { + ScantabledoneW::new(self, 8) } #[doc = "Bit 9 - Single Conversion Done Enable"] #[inline(always)] #[must_use] - pub fn singledone(&mut self) -> SINGLEDONE_W<9> { - SINGLEDONE_W::new(self) + pub fn singledone(&mut self) -> SingledoneW { + SingledoneW::new(self, 9) } #[doc = "Bit 12 - Polarity Error Enable"] #[inline(always)] #[must_use] - pub fn polarityerr(&mut self) -> POLARITYERR_W<12> { - POLARITYERR_W::new(self) + pub fn polarityerr(&mut self) -> PolarityerrW { + PolarityerrW::new(self, 12) } #[doc = "Bit 13 - Port Allocation Error Enable"] #[inline(always)] #[must_use] - pub fn portallocerr(&mut self) -> PORTALLOCERR_W<13> { - PORTALLOCERR_W::new(self) + pub fn portallocerr(&mut self) -> PortallocerrW { + PortallocerrW::new(self, 13) } #[doc = "Bit 16 - Single FIFO Overflow Enable"] #[inline(always)] #[must_use] - pub fn singlefifoof(&mut self) -> SINGLEFIFOOF_W<16> { - SINGLEFIFOOF_W::new(self) + pub fn singlefifoof(&mut self) -> SinglefifoofW { + SinglefifoofW::new(self, 16) } #[doc = "Bit 17 - Scan FIFO Overflow Enable"] #[inline(always)] #[must_use] - pub fn scanfifoof(&mut self) -> SCANFIFOOF_W<17> { - SCANFIFOOF_W::new(self) + pub fn scanfifoof(&mut self) -> ScanfifoofW { + ScanfifoofW::new(self, 17) } #[doc = "Bit 18 - Single FIFO Underflow Enable"] #[inline(always)] #[must_use] - pub fn singlefifouf(&mut self) -> SINGLEFIFOUF_W<18> { - SINGLEFIFOUF_W::new(self) + pub fn singlefifouf(&mut self) -> SinglefifoufW { + SinglefifoufW::new(self, 18) } #[doc = "Bit 19 - Scan FIFO Underflow Enable"] #[inline(always)] #[must_use] - pub fn scanfifouf(&mut self) -> SCANFIFOUF_W<19> { - SCANFIFOUF_W::new(self) + pub fn scanfifouf(&mut self) -> ScanfifoufW { + ScanfifoufW::new(self, 19) } #[doc = "Bit 31 - EM2/3 Abort Error Enable"] #[inline(always)] #[must_use] - pub fn em23aborterror(&mut self) -> EM23ABORTERROR_W<31> { - EM23ABORTERROR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn em23aborterror(&mut self) -> Em23aborterrorW { + Em23aborterrorW::new(self, 31) } } -#[doc = "Interrupt Enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/if_.rs index 630543a..fd64e5e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/if_.rs @@ -1,275 +1,235 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SINGLEFIFODVL` reader - Single FIFO Data Valid Level"] -pub type SINGLEFIFODVL_R = crate::BitReader; +pub type SinglefifodvlR = crate::BitReader; #[doc = "Field `SINGLEFIFODVL` writer - Single FIFO Data Valid Level"] -pub type SINGLEFIFODVL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SinglefifodvlW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANFIFODVL` reader - Scan FIFO Data Valid Level"] -pub type SCANFIFODVL_R = crate::BitReader; +pub type ScanfifodvlR = crate::BitReader; #[doc = "Field `SCANFIFODVL` writer - Scan FIFO Data Valid Level"] -pub type SCANFIFODVL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ScanfifodvlW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SINGLECMP` reader - Single Result Window Compare"] -pub type SINGLECMP_R = crate::BitReader; +pub type SinglecmpR = crate::BitReader; #[doc = "Field `SINGLECMP` writer - Single Result Window Compare"] -pub type SINGLECMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SinglecmpW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANCMP` reader - Scan Result Window Compare"] -pub type SCANCMP_R = crate::BitReader; +pub type ScancmpR = crate::BitReader; #[doc = "Field `SCANCMP` writer - Scan Result Window Compare"] -pub type SCANCMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ScancmpW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANENTRYDONE` reader - Scan Entry Done"] -pub type SCANENTRYDONE_R = crate::BitReader; +pub type ScanentrydoneR = crate::BitReader; #[doc = "Field `SCANENTRYDONE` writer - Scan Entry Done"] -pub type SCANENTRYDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ScanentrydoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANTABLEDONE` reader - Scan Table Done"] -pub type SCANTABLEDONE_R = crate::BitReader; +pub type ScantabledoneR = crate::BitReader; #[doc = "Field `SCANTABLEDONE` writer - Scan Table Done"] -pub type SCANTABLEDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ScantabledoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SINGLEDONE` reader - Single Conversion Done"] -pub type SINGLEDONE_R = crate::BitReader; +pub type SingledoneR = crate::BitReader; #[doc = "Field `SINGLEDONE` writer - Single Conversion Done"] -pub type SINGLEDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SingledoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POLARITYERR` reader - Polarity Error"] -pub type POLARITYERR_R = crate::BitReader; +pub type PolarityerrR = crate::BitReader; #[doc = "Field `POLARITYERR` writer - Polarity Error"] -pub type POLARITYERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PolarityerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PORTALLOCERR` reader - Port Allocation Error"] -pub type PORTALLOCERR_R = crate::BitReader; +pub type PortallocerrR = crate::BitReader; #[doc = "Field `PORTALLOCERR` writer - Port Allocation Error"] -pub type PORTALLOCERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PortallocerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SINGLEFIFOOF` reader - Single FIFO Overflow"] -pub type SINGLEFIFOOF_R = crate::BitReader; +pub type SinglefifoofR = crate::BitReader; #[doc = "Field `SINGLEFIFOOF` writer - Single FIFO Overflow"] -pub type SINGLEFIFOOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SinglefifoofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANFIFOOF` reader - Scan FIFO Overflow"] -pub type SCANFIFOOF_R = crate::BitReader; +pub type ScanfifoofR = crate::BitReader; #[doc = "Field `SCANFIFOOF` writer - Scan FIFO Overflow"] -pub type SCANFIFOOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ScanfifoofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SINGLEFIFOUF` reader - Single FIFO Underflow"] -pub type SINGLEFIFOUF_R = crate::BitReader; +pub type SinglefifoufR = crate::BitReader; #[doc = "Field `SINGLEFIFOUF` writer - Single FIFO Underflow"] -pub type SINGLEFIFOUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SinglefifoufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANFIFOUF` reader - Scan FIFO Underflow"] -pub type SCANFIFOUF_R = crate::BitReader; +pub type ScanfifoufR = crate::BitReader; #[doc = "Field `SCANFIFOUF` writer - Scan FIFO Underflow"] -pub type SCANFIFOUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ScanfifoufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM23ABORTERROR` reader - EM2/3 Abort Error"] -pub type EM23ABORTERROR_R = crate::BitReader; +pub type Em23aborterrorR = crate::BitReader; #[doc = "Field `EM23ABORTERROR` writer - EM2/3 Abort Error"] -pub type EM23ABORTERROR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Em23aborterrorW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Single FIFO Data Valid Level"] #[inline(always)] - pub fn singlefifodvl(&self) -> SINGLEFIFODVL_R { - SINGLEFIFODVL_R::new((self.bits & 1) != 0) + pub fn singlefifodvl(&self) -> SinglefifodvlR { + SinglefifodvlR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Scan FIFO Data Valid Level"] #[inline(always)] - pub fn scanfifodvl(&self) -> SCANFIFODVL_R { - SCANFIFODVL_R::new(((self.bits >> 1) & 1) != 0) + pub fn scanfifodvl(&self) -> ScanfifodvlR { + ScanfifodvlR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Single Result Window Compare"] #[inline(always)] - pub fn singlecmp(&self) -> SINGLECMP_R { - SINGLECMP_R::new(((self.bits >> 2) & 1) != 0) + pub fn singlecmp(&self) -> SinglecmpR { + SinglecmpR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Scan Result Window Compare"] #[inline(always)] - pub fn scancmp(&self) -> SCANCMP_R { - SCANCMP_R::new(((self.bits >> 3) & 1) != 0) + pub fn scancmp(&self) -> ScancmpR { + ScancmpR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 7 - Scan Entry Done"] #[inline(always)] - pub fn scanentrydone(&self) -> SCANENTRYDONE_R { - SCANENTRYDONE_R::new(((self.bits >> 7) & 1) != 0) + pub fn scanentrydone(&self) -> ScanentrydoneR { + ScanentrydoneR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Scan Table Done"] #[inline(always)] - pub fn scantabledone(&self) -> SCANTABLEDONE_R { - SCANTABLEDONE_R::new(((self.bits >> 8) & 1) != 0) + pub fn scantabledone(&self) -> ScantabledoneR { + ScantabledoneR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Single Conversion Done"] #[inline(always)] - pub fn singledone(&self) -> SINGLEDONE_R { - SINGLEDONE_R::new(((self.bits >> 9) & 1) != 0) + pub fn singledone(&self) -> SingledoneR { + SingledoneR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 12 - Polarity Error"] #[inline(always)] - pub fn polarityerr(&self) -> POLARITYERR_R { - POLARITYERR_R::new(((self.bits >> 12) & 1) != 0) + pub fn polarityerr(&self) -> PolarityerrR { + PolarityerrR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port Allocation Error"] #[inline(always)] - pub fn portallocerr(&self) -> PORTALLOCERR_R { - PORTALLOCERR_R::new(((self.bits >> 13) & 1) != 0) + pub fn portallocerr(&self) -> PortallocerrR { + PortallocerrR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 16 - Single FIFO Overflow"] #[inline(always)] - pub fn singlefifoof(&self) -> SINGLEFIFOOF_R { - SINGLEFIFOOF_R::new(((self.bits >> 16) & 1) != 0) + pub fn singlefifoof(&self) -> SinglefifoofR { + SinglefifoofR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Scan FIFO Overflow"] #[inline(always)] - pub fn scanfifoof(&self) -> SCANFIFOOF_R { - SCANFIFOOF_R::new(((self.bits >> 17) & 1) != 0) + pub fn scanfifoof(&self) -> ScanfifoofR { + ScanfifoofR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Single FIFO Underflow"] #[inline(always)] - pub fn singlefifouf(&self) -> SINGLEFIFOUF_R { - SINGLEFIFOUF_R::new(((self.bits >> 18) & 1) != 0) + pub fn singlefifouf(&self) -> SinglefifoufR { + SinglefifoufR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Scan FIFO Underflow"] #[inline(always)] - pub fn scanfifouf(&self) -> SCANFIFOUF_R { - SCANFIFOUF_R::new(((self.bits >> 19) & 1) != 0) + pub fn scanfifouf(&self) -> ScanfifoufR { + ScanfifoufR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 31 - EM2/3 Abort Error"] #[inline(always)] - pub fn em23aborterror(&self) -> EM23ABORTERROR_R { - EM23ABORTERROR_R::new(((self.bits >> 31) & 1) != 0) + pub fn em23aborterror(&self) -> Em23aborterrorR { + Em23aborterrorR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Single FIFO Data Valid Level"] #[inline(always)] #[must_use] - pub fn singlefifodvl(&mut self) -> SINGLEFIFODVL_W<0> { - SINGLEFIFODVL_W::new(self) + pub fn singlefifodvl(&mut self) -> SinglefifodvlW { + SinglefifodvlW::new(self, 0) } #[doc = "Bit 1 - Scan FIFO Data Valid Level"] #[inline(always)] #[must_use] - pub fn scanfifodvl(&mut self) -> SCANFIFODVL_W<1> { - SCANFIFODVL_W::new(self) + pub fn scanfifodvl(&mut self) -> ScanfifodvlW { + ScanfifodvlW::new(self, 1) } #[doc = "Bit 2 - Single Result Window Compare"] #[inline(always)] #[must_use] - pub fn singlecmp(&mut self) -> SINGLECMP_W<2> { - SINGLECMP_W::new(self) + pub fn singlecmp(&mut self) -> SinglecmpW { + SinglecmpW::new(self, 2) } #[doc = "Bit 3 - Scan Result Window Compare"] #[inline(always)] #[must_use] - pub fn scancmp(&mut self) -> SCANCMP_W<3> { - SCANCMP_W::new(self) + pub fn scancmp(&mut self) -> ScancmpW { + ScancmpW::new(self, 3) } #[doc = "Bit 7 - Scan Entry Done"] #[inline(always)] #[must_use] - pub fn scanentrydone(&mut self) -> SCANENTRYDONE_W<7> { - SCANENTRYDONE_W::new(self) + pub fn scanentrydone(&mut self) -> ScanentrydoneW { + ScanentrydoneW::new(self, 7) } #[doc = "Bit 8 - Scan Table Done"] #[inline(always)] #[must_use] - pub fn scantabledone(&mut self) -> SCANTABLEDONE_W<8> { - SCANTABLEDONE_W::new(self) + pub fn scantabledone(&mut self) -> ScantabledoneW { + ScantabledoneW::new(self, 8) } #[doc = "Bit 9 - Single Conversion Done"] #[inline(always)] #[must_use] - pub fn singledone(&mut self) -> SINGLEDONE_W<9> { - SINGLEDONE_W::new(self) + pub fn singledone(&mut self) -> SingledoneW { + SingledoneW::new(self, 9) } #[doc = "Bit 12 - Polarity Error"] #[inline(always)] #[must_use] - pub fn polarityerr(&mut self) -> POLARITYERR_W<12> { - POLARITYERR_W::new(self) + pub fn polarityerr(&mut self) -> PolarityerrW { + PolarityerrW::new(self, 12) } #[doc = "Bit 13 - Port Allocation Error"] #[inline(always)] #[must_use] - pub fn portallocerr(&mut self) -> PORTALLOCERR_W<13> { - PORTALLOCERR_W::new(self) + pub fn portallocerr(&mut self) -> PortallocerrW { + PortallocerrW::new(self, 13) } #[doc = "Bit 16 - Single FIFO Overflow"] #[inline(always)] #[must_use] - pub fn singlefifoof(&mut self) -> SINGLEFIFOOF_W<16> { - SINGLEFIFOOF_W::new(self) + pub fn singlefifoof(&mut self) -> SinglefifoofW { + SinglefifoofW::new(self, 16) } #[doc = "Bit 17 - Scan FIFO Overflow"] #[inline(always)] #[must_use] - pub fn scanfifoof(&mut self) -> SCANFIFOOF_W<17> { - SCANFIFOOF_W::new(self) + pub fn scanfifoof(&mut self) -> ScanfifoofW { + ScanfifoofW::new(self, 17) } #[doc = "Bit 18 - Single FIFO Underflow"] #[inline(always)] #[must_use] - pub fn singlefifouf(&mut self) -> SINGLEFIFOUF_W<18> { - SINGLEFIFOUF_W::new(self) + pub fn singlefifouf(&mut self) -> SinglefifoufW { + SinglefifoufW::new(self, 18) } #[doc = "Bit 19 - Scan FIFO Underflow"] #[inline(always)] #[must_use] - pub fn scanfifouf(&mut self) -> SCANFIFOUF_W<19> { - SCANFIFOUF_W::new(self) + pub fn scanfifouf(&mut self) -> ScanfifoufW { + ScanfifoufW::new(self, 19) } #[doc = "Bit 31 - EM2/3 Abort Error"] #[inline(always)] #[must_use] - pub fn em23aborterror(&mut self) -> EM23ABORTERROR_W<31> { - EM23ABORTERROR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn em23aborterror(&mut self) -> Em23aborterrorW { + Em23aborterrorW::new(self, 31) } } -#[doc = "Interrupt Flag\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "Interrupt Flag\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/ipversion.rs index b6076d5..a14e2f2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "IPVERSION\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "IPVERSION\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x02"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/maskreq.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/maskreq.rs index ccf2085..3d60974 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/maskreq.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/maskreq.rs @@ -1,80 +1,40 @@ #[doc = "Register `MASKREQ` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `MASKREQ` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `MASKREQ` reader - Scan Queue Mask Request"] -pub type MASKREQ_R = crate::FieldReader; +pub type MaskreqR = crate::FieldReader; #[doc = "Field `MASKREQ` writer - Scan Queue Mask Request"] -pub type MASKREQ_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MASKREQ_SPEC, u16, u16, 16, O>; +pub type MaskreqW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Scan Queue Mask Request"] #[inline(always)] - pub fn maskreq(&self) -> MASKREQ_R { - MASKREQ_R::new((self.bits & 0xffff) as u16) + pub fn maskreq(&self) -> MaskreqR { + MaskreqR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Scan Queue Mask Request"] #[inline(always)] #[must_use] - pub fn maskreq(&mut self) -> MASKREQ_W<0> { - MASKREQ_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn maskreq(&mut self) -> MaskreqW { + MaskreqW::new(self, 0) } } -#[doc = "Mask Request\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [maskreq](index.html) module"] -pub struct MASKREQ_SPEC; -impl crate::RegisterSpec for MASKREQ_SPEC { +#[doc = "Mask Request\n\nYou can [`read`](crate::Reg::read) this register and get [`maskreq::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`maskreq::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct MaskreqSpec; +impl crate::RegisterSpec for MaskreqSpec { type Ux = u32; } -#[doc = "`read()` method returns [maskreq::R](R) reader structure"] -impl crate::Readable for MASKREQ_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [maskreq::W](W) writer structure"] -impl crate::Writable for MASKREQ_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`maskreq::R`](R) reader structure"] +impl crate::Readable for MaskreqSpec {} +#[doc = "`write(|w| ..)` method takes [`maskreq::W`](W) writer structure"] +impl crate::Writable for MaskreqSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MASKREQ to value 0"] -impl crate::Resettable for MASKREQ_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for MaskreqSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scale0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scale0.rs index 24a9eb2..2fbd2c8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scale0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scale0.rs @@ -1,156 +1,119 @@ #[doc = "Register `SCALE0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCALE0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OFFSET` reader - Offset"] -pub type OFFSET_R = crate::FieldReader; +pub type OffsetR = crate::FieldReader; #[doc = "Field `OFFSET` writer - Offset"] -pub type OFFSET_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCALE0_SPEC, u32, u32, 18, O>; +pub type OffsetW<'a, REG> = crate::FieldWriter<'a, REG, 18, u32>; #[doc = "Field `GAIN13LSB` reader - Gain 13 LSBs"] -pub type GAIN13LSB_R = crate::FieldReader; +pub type Gain13lsbR = crate::FieldReader; #[doc = "Field `GAIN13LSB` writer - Gain 13 LSBs"] -pub type GAIN13LSB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCALE0_SPEC, u16, u16, 13, O>; -#[doc = "Field `GAIN3MSB` reader - Gain 3 MSBs"] -pub type GAIN3MSB_R = crate::BitReader; +pub type Gain13lsbW<'a, REG> = crate::FieldWriter<'a, REG, 13, u16>; #[doc = "Gain 3 MSBs\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GAIN3MSB_A { +pub enum Gain3msb { #[doc = "0: Upper 3 bits of gain = 011 (0.75x)"] - GAIN011 = 0, + Gain011 = 0, #[doc = "1: Upper 3 bits of gain = 100 (1.00x)"] - GAIN100 = 1, + Gain100 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GAIN3MSB_A) -> Self { + fn from(variant: Gain3msb) -> Self { variant as u8 != 0 } } -impl GAIN3MSB_R { +#[doc = "Field `GAIN3MSB` reader - Gain 3 MSBs"] +pub type Gain3msbR = crate::BitReader; +impl Gain3msbR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> GAIN3MSB_A { + pub const fn variant(&self) -> Gain3msb { match self.bits { - false => GAIN3MSB_A::GAIN011, - true => GAIN3MSB_A::GAIN100, + false => Gain3msb::Gain011, + true => Gain3msb::Gain100, } } - #[doc = "Checks if the value of the field is `GAIN011`"] + #[doc = "Upper 3 bits of gain = 011 (0.75x)"] #[inline(always)] pub fn is_gain011(&self) -> bool { - *self == GAIN3MSB_A::GAIN011 + *self == Gain3msb::Gain011 } - #[doc = "Checks if the value of the field is `GAIN100`"] + #[doc = "Upper 3 bits of gain = 100 (1.00x)"] #[inline(always)] pub fn is_gain100(&self) -> bool { - *self == GAIN3MSB_A::GAIN100 + *self == Gain3msb::Gain100 } } #[doc = "Field `GAIN3MSB` writer - Gain 3 MSBs"] -pub type GAIN3MSB_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCALE0_SPEC, GAIN3MSB_A, O>; -impl<'a, const O: u8> GAIN3MSB_W<'a, O> { +pub type Gain3msbW<'a, REG> = crate::BitWriter<'a, REG, Gain3msb>; +impl<'a, REG> Gain3msbW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Upper 3 bits of gain = 011 (0.75x)"] #[inline(always)] - pub fn gain011(self) -> &'a mut W { - self.variant(GAIN3MSB_A::GAIN011) + pub fn gain011(self) -> &'a mut crate::W { + self.variant(Gain3msb::Gain011) } #[doc = "Upper 3 bits of gain = 100 (1.00x)"] #[inline(always)] - pub fn gain100(self) -> &'a mut W { - self.variant(GAIN3MSB_A::GAIN100) + pub fn gain100(self) -> &'a mut crate::W { + self.variant(Gain3msb::Gain100) } } impl R { #[doc = "Bits 0:17 - Offset"] #[inline(always)] - pub fn offset(&self) -> OFFSET_R { - OFFSET_R::new(self.bits & 0x0003_ffff) + pub fn offset(&self) -> OffsetR { + OffsetR::new(self.bits & 0x0003_ffff) } #[doc = "Bits 18:30 - Gain 13 LSBs"] #[inline(always)] - pub fn gain13lsb(&self) -> GAIN13LSB_R { - GAIN13LSB_R::new(((self.bits >> 18) & 0x1fff) as u16) + pub fn gain13lsb(&self) -> Gain13lsbR { + Gain13lsbR::new(((self.bits >> 18) & 0x1fff) as u16) } #[doc = "Bit 31 - Gain 3 MSBs"] #[inline(always)] - pub fn gain3msb(&self) -> GAIN3MSB_R { - GAIN3MSB_R::new(((self.bits >> 31) & 1) != 0) + pub fn gain3msb(&self) -> Gain3msbR { + Gain3msbR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:17 - Offset"] #[inline(always)] #[must_use] - pub fn offset(&mut self) -> OFFSET_W<0> { - OFFSET_W::new(self) + pub fn offset(&mut self) -> OffsetW { + OffsetW::new(self, 0) } #[doc = "Bits 18:30 - Gain 13 LSBs"] #[inline(always)] #[must_use] - pub fn gain13lsb(&mut self) -> GAIN13LSB_W<18> { - GAIN13LSB_W::new(self) + pub fn gain13lsb(&mut self) -> Gain13lsbW { + Gain13lsbW::new(self, 18) } #[doc = "Bit 31 - Gain 3 MSBs"] #[inline(always)] #[must_use] - pub fn gain3msb(&mut self) -> GAIN3MSB_W<31> { - GAIN3MSB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn gain3msb(&mut self) -> Gain3msbW { + Gain3msbW::new(self, 31) } } -#[doc = "Scale\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scale0](index.html) module"] -pub struct SCALE0_SPEC; -impl crate::RegisterSpec for SCALE0_SPEC { +#[doc = "Scale\n\nYou can [`read`](crate::Reg::read) this register and get [`scale0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scale0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scale0Spec; +impl crate::RegisterSpec for Scale0Spec { type Ux = u32; } -#[doc = "`read()` method returns [scale0::R](R) reader structure"] -impl crate::Readable for SCALE0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scale0::W](W) writer structure"] -impl crate::Writable for SCALE0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scale0::R`](R) reader structure"] +impl crate::Readable for Scale0Spec {} +#[doc = "`write(|w| ..)` method takes [`scale0::W`](W) writer structure"] +impl crate::Writable for Scale0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCALE0 to value 0x8002_c000"] -impl crate::Resettable for SCALE0_SPEC { - const RESET_VALUE: Self::Ux = 0x8002_c000; +impl crate::Resettable for Scale0Spec { + const RESET_VALUE: u32 = 0x8002_c000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scale1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scale1.rs index ea4be3e..447c68c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scale1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scale1.rs @@ -1,156 +1,119 @@ #[doc = "Register `SCALE1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCALE1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OFFSET` reader - Offset"] -pub type OFFSET_R = crate::FieldReader; +pub type OffsetR = crate::FieldReader; #[doc = "Field `OFFSET` writer - Offset"] -pub type OFFSET_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCALE1_SPEC, u32, u32, 18, O>; +pub type OffsetW<'a, REG> = crate::FieldWriter<'a, REG, 18, u32>; #[doc = "Field `GAIN13LSB` reader - Gain 13 LSBs"] -pub type GAIN13LSB_R = crate::FieldReader; +pub type Gain13lsbR = crate::FieldReader; #[doc = "Field `GAIN13LSB` writer - Gain 13 LSBs"] -pub type GAIN13LSB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCALE1_SPEC, u16, u16, 13, O>; -#[doc = "Field `GAIN3MSB` reader - Gain 3 MSBs"] -pub type GAIN3MSB_R = crate::BitReader; +pub type Gain13lsbW<'a, REG> = crate::FieldWriter<'a, REG, 13, u16>; #[doc = "Gain 3 MSBs\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GAIN3MSB_A { +pub enum Gain3msb { #[doc = "0: Upper 3 bits of gain = 011 (0.75x)"] - GAIN011 = 0, + Gain011 = 0, #[doc = "1: Upper 3 bits of gain = 100 (1.00x)"] - GAIN100 = 1, + Gain100 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GAIN3MSB_A) -> Self { + fn from(variant: Gain3msb) -> Self { variant as u8 != 0 } } -impl GAIN3MSB_R { +#[doc = "Field `GAIN3MSB` reader - Gain 3 MSBs"] +pub type Gain3msbR = crate::BitReader; +impl Gain3msbR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> GAIN3MSB_A { + pub const fn variant(&self) -> Gain3msb { match self.bits { - false => GAIN3MSB_A::GAIN011, - true => GAIN3MSB_A::GAIN100, + false => Gain3msb::Gain011, + true => Gain3msb::Gain100, } } - #[doc = "Checks if the value of the field is `GAIN011`"] + #[doc = "Upper 3 bits of gain = 011 (0.75x)"] #[inline(always)] pub fn is_gain011(&self) -> bool { - *self == GAIN3MSB_A::GAIN011 + *self == Gain3msb::Gain011 } - #[doc = "Checks if the value of the field is `GAIN100`"] + #[doc = "Upper 3 bits of gain = 100 (1.00x)"] #[inline(always)] pub fn is_gain100(&self) -> bool { - *self == GAIN3MSB_A::GAIN100 + *self == Gain3msb::Gain100 } } #[doc = "Field `GAIN3MSB` writer - Gain 3 MSBs"] -pub type GAIN3MSB_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCALE1_SPEC, GAIN3MSB_A, O>; -impl<'a, const O: u8> GAIN3MSB_W<'a, O> { +pub type Gain3msbW<'a, REG> = crate::BitWriter<'a, REG, Gain3msb>; +impl<'a, REG> Gain3msbW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Upper 3 bits of gain = 011 (0.75x)"] #[inline(always)] - pub fn gain011(self) -> &'a mut W { - self.variant(GAIN3MSB_A::GAIN011) + pub fn gain011(self) -> &'a mut crate::W { + self.variant(Gain3msb::Gain011) } #[doc = "Upper 3 bits of gain = 100 (1.00x)"] #[inline(always)] - pub fn gain100(self) -> &'a mut W { - self.variant(GAIN3MSB_A::GAIN100) + pub fn gain100(self) -> &'a mut crate::W { + self.variant(Gain3msb::Gain100) } } impl R { #[doc = "Bits 0:17 - Offset"] #[inline(always)] - pub fn offset(&self) -> OFFSET_R { - OFFSET_R::new(self.bits & 0x0003_ffff) + pub fn offset(&self) -> OffsetR { + OffsetR::new(self.bits & 0x0003_ffff) } #[doc = "Bits 18:30 - Gain 13 LSBs"] #[inline(always)] - pub fn gain13lsb(&self) -> GAIN13LSB_R { - GAIN13LSB_R::new(((self.bits >> 18) & 0x1fff) as u16) + pub fn gain13lsb(&self) -> Gain13lsbR { + Gain13lsbR::new(((self.bits >> 18) & 0x1fff) as u16) } #[doc = "Bit 31 - Gain 3 MSBs"] #[inline(always)] - pub fn gain3msb(&self) -> GAIN3MSB_R { - GAIN3MSB_R::new(((self.bits >> 31) & 1) != 0) + pub fn gain3msb(&self) -> Gain3msbR { + Gain3msbR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:17 - Offset"] #[inline(always)] #[must_use] - pub fn offset(&mut self) -> OFFSET_W<0> { - OFFSET_W::new(self) + pub fn offset(&mut self) -> OffsetW { + OffsetW::new(self, 0) } #[doc = "Bits 18:30 - Gain 13 LSBs"] #[inline(always)] #[must_use] - pub fn gain13lsb(&mut self) -> GAIN13LSB_W<18> { - GAIN13LSB_W::new(self) + pub fn gain13lsb(&mut self) -> Gain13lsbW { + Gain13lsbW::new(self, 18) } #[doc = "Bit 31 - Gain 3 MSBs"] #[inline(always)] #[must_use] - pub fn gain3msb(&mut self) -> GAIN3MSB_W<31> { - GAIN3MSB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn gain3msb(&mut self) -> Gain3msbW { + Gain3msbW::new(self, 31) } } -#[doc = "Scale\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scale1](index.html) module"] -pub struct SCALE1_SPEC; -impl crate::RegisterSpec for SCALE1_SPEC { +#[doc = "Scale\n\nYou can [`read`](crate::Reg::read) this register and get [`scale1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scale1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scale1Spec; +impl crate::RegisterSpec for Scale1Spec { type Ux = u32; } -#[doc = "`read()` method returns [scale1::R](R) reader structure"] -impl crate::Readable for SCALE1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scale1::W](W) writer structure"] -impl crate::Writable for SCALE1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scale1::R`](R) reader structure"] +impl crate::Readable for Scale1Spec {} +#[doc = "`write(|w| ..)` method takes [`scale1::W`](W) writer structure"] +impl crate::Writable for Scale1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCALE1 to value 0x8002_c000"] -impl crate::Resettable for SCALE1_SPEC { - const RESET_VALUE: Self::Ux = 0x8002_c000; +impl crate::Resettable for Scale1Spec { + const RESET_VALUE: u32 = 0x8002_c000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan0.rs index cecaab4..48ac2b7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan0.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN0_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN0_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN0_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN0_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN0_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN0_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan0](index.html) module"] -pub struct SCAN0_SPEC; -impl crate::RegisterSpec for SCAN0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan0Spec; +impl crate::RegisterSpec for Scan0Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan0::R](R) reader structure"] -impl crate::Readable for SCAN0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan0::W](W) writer structure"] -impl crate::Writable for SCAN0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan0::R`](R) reader structure"] +impl crate::Readable for Scan0Spec {} +#[doc = "`write(|w| ..)` method takes [`scan0::W`](W) writer structure"] +impl crate::Writable for Scan0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN0 to value 0"] -impl crate::Resettable for SCAN0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan1.rs index 26eb4af..f6b58e2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan1.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN1_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN1_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN1_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN1_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN1_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN1_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan1](index.html) module"] -pub struct SCAN1_SPEC; -impl crate::RegisterSpec for SCAN1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan1Spec; +impl crate::RegisterSpec for Scan1Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan1::R](R) reader structure"] -impl crate::Readable for SCAN1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan1::W](W) writer structure"] -impl crate::Writable for SCAN1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan1::R`](R) reader structure"] +impl crate::Readable for Scan1Spec {} +#[doc = "`write(|w| ..)` method takes [`scan1::W`](W) writer structure"] +impl crate::Writable for Scan1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN1 to value 0"] -impl crate::Resettable for SCAN1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan10.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan10.rs index 110a952..24f23b0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan10.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan10.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN10` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN10` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN10_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN10_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN10_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN10_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN10_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN10_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan10](index.html) module"] -pub struct SCAN10_SPEC; -impl crate::RegisterSpec for SCAN10_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan10::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan10::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan10Spec; +impl crate::RegisterSpec for Scan10Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan10::R](R) reader structure"] -impl crate::Readable for SCAN10_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan10::W](W) writer structure"] -impl crate::Writable for SCAN10_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan10::R`](R) reader structure"] +impl crate::Readable for Scan10Spec {} +#[doc = "`write(|w| ..)` method takes [`scan10::W`](W) writer structure"] +impl crate::Writable for Scan10Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN10 to value 0"] -impl crate::Resettable for SCAN10_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan10Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan11.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan11.rs index e2e46e6..0986291 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan11.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan11.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN11` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN11` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN11_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN11_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN11_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN11_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN11_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN11_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan11](index.html) module"] -pub struct SCAN11_SPEC; -impl crate::RegisterSpec for SCAN11_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan11::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan11::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan11Spec; +impl crate::RegisterSpec for Scan11Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan11::R](R) reader structure"] -impl crate::Readable for SCAN11_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan11::W](W) writer structure"] -impl crate::Writable for SCAN11_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan11::R`](R) reader structure"] +impl crate::Readable for Scan11Spec {} +#[doc = "`write(|w| ..)` method takes [`scan11::W`](W) writer structure"] +impl crate::Writable for Scan11Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN11 to value 0"] -impl crate::Resettable for SCAN11_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan11Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan12.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan12.rs index 2db9ffc..613daef 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan12.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan12.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN12` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN12` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN12_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN12_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN12_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN12_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN12_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN12_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan12](index.html) module"] -pub struct SCAN12_SPEC; -impl crate::RegisterSpec for SCAN12_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan12::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan12::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan12Spec; +impl crate::RegisterSpec for Scan12Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan12::R](R) reader structure"] -impl crate::Readable for SCAN12_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan12::W](W) writer structure"] -impl crate::Writable for SCAN12_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan12::R`](R) reader structure"] +impl crate::Readable for Scan12Spec {} +#[doc = "`write(|w| ..)` method takes [`scan12::W`](W) writer structure"] +impl crate::Writable for Scan12Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN12 to value 0"] -impl crate::Resettable for SCAN12_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan12Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan13.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan13.rs index 38ffd59..6eb7786 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan13.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan13.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN13` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN13` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN13_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN13_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN13_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN13_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN13_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN13_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan13](index.html) module"] -pub struct SCAN13_SPEC; -impl crate::RegisterSpec for SCAN13_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan13::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan13::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan13Spec; +impl crate::RegisterSpec for Scan13Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan13::R](R) reader structure"] -impl crate::Readable for SCAN13_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan13::W](W) writer structure"] -impl crate::Writable for SCAN13_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan13::R`](R) reader structure"] +impl crate::Readable for Scan13Spec {} +#[doc = "`write(|w| ..)` method takes [`scan13::W`](W) writer structure"] +impl crate::Writable for Scan13Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN13 to value 0"] -impl crate::Resettable for SCAN13_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan13Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan14.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan14.rs index f1fa900..d761e04 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan14.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan14.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN14` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN14` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN14_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN14_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN14_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN14_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN14_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN14_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan14](index.html) module"] -pub struct SCAN14_SPEC; -impl crate::RegisterSpec for SCAN14_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan14::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan14::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan14Spec; +impl crate::RegisterSpec for Scan14Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan14::R](R) reader structure"] -impl crate::Readable for SCAN14_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan14::W](W) writer structure"] -impl crate::Writable for SCAN14_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan14::R`](R) reader structure"] +impl crate::Readable for Scan14Spec {} +#[doc = "`write(|w| ..)` method takes [`scan14::W`](W) writer structure"] +impl crate::Writable for Scan14Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN14 to value 0"] -impl crate::Resettable for SCAN14_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan14Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan15.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan15.rs index ba160bc..c55dd44 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan15.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan15.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN15` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN15` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN15_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN15_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN15_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN15_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN15_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN15_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan15](index.html) module"] -pub struct SCAN15_SPEC; -impl crate::RegisterSpec for SCAN15_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan15::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan15::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan15Spec; +impl crate::RegisterSpec for Scan15Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan15::R](R) reader structure"] -impl crate::Readable for SCAN15_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan15::W](W) writer structure"] -impl crate::Writable for SCAN15_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan15::R`](R) reader structure"] +impl crate::Readable for Scan15Spec {} +#[doc = "`write(|w| ..)` method takes [`scan15::W`](W) writer structure"] +impl crate::Writable for Scan15Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN15 to value 0"] -impl crate::Resettable for SCAN15_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan15Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan2.rs index 30b842c..a1815f9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan2.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN2_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN2_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN2_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN2_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN2_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN2_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan2](index.html) module"] -pub struct SCAN2_SPEC; -impl crate::RegisterSpec for SCAN2_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan2Spec; +impl crate::RegisterSpec for Scan2Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan2::R](R) reader structure"] -impl crate::Readable for SCAN2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan2::W](W) writer structure"] -impl crate::Writable for SCAN2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan2::R`](R) reader structure"] +impl crate::Readable for Scan2Spec {} +#[doc = "`write(|w| ..)` method takes [`scan2::W`](W) writer structure"] +impl crate::Writable for Scan2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN2 to value 0"] -impl crate::Resettable for SCAN2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan3.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan3.rs index 63b04c2..ad7dda2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan3.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan3.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN3` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN3_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN3_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN3_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN3_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN3_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN3_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan3](index.html) module"] -pub struct SCAN3_SPEC; -impl crate::RegisterSpec for SCAN3_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan3Spec; +impl crate::RegisterSpec for Scan3Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan3::R](R) reader structure"] -impl crate::Readable for SCAN3_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan3::W](W) writer structure"] -impl crate::Writable for SCAN3_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan3::R`](R) reader structure"] +impl crate::Readable for Scan3Spec {} +#[doc = "`write(|w| ..)` method takes [`scan3::W`](W) writer structure"] +impl crate::Writable for Scan3Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN3 to value 0"] -impl crate::Resettable for SCAN3_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan3Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan4.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan4.rs index bb682c7..0e3f0e8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan4.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan4.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN4` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN4` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN4_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN4_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN4_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN4_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN4_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN4_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan4](index.html) module"] -pub struct SCAN4_SPEC; -impl crate::RegisterSpec for SCAN4_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan4::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan4::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan4Spec; +impl crate::RegisterSpec for Scan4Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan4::R](R) reader structure"] -impl crate::Readable for SCAN4_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan4::W](W) writer structure"] -impl crate::Writable for SCAN4_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan4::R`](R) reader structure"] +impl crate::Readable for Scan4Spec {} +#[doc = "`write(|w| ..)` method takes [`scan4::W`](W) writer structure"] +impl crate::Writable for Scan4Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN4 to value 0"] -impl crate::Resettable for SCAN4_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan4Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan5.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan5.rs index 0237bfd..986700e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan5.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan5.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN5` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN5` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN5_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN5_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN5_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN5_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN5_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN5_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan5](index.html) module"] -pub struct SCAN5_SPEC; -impl crate::RegisterSpec for SCAN5_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan5::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan5::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan5Spec; +impl crate::RegisterSpec for Scan5Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan5::R](R) reader structure"] -impl crate::Readable for SCAN5_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan5::W](W) writer structure"] -impl crate::Writable for SCAN5_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan5::R`](R) reader structure"] +impl crate::Readable for Scan5Spec {} +#[doc = "`write(|w| ..)` method takes [`scan5::W`](W) writer structure"] +impl crate::Writable for Scan5Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN5 to value 0"] -impl crate::Resettable for SCAN5_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan5Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan6.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan6.rs index ea465ed..98025b2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan6.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan6.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN6` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN6` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN6_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN6_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN6_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN6_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN6_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN6_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan6](index.html) module"] -pub struct SCAN6_SPEC; -impl crate::RegisterSpec for SCAN6_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan6::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan6::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan6Spec; +impl crate::RegisterSpec for Scan6Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan6::R](R) reader structure"] -impl crate::Readable for SCAN6_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan6::W](W) writer structure"] -impl crate::Writable for SCAN6_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan6::R`](R) reader structure"] +impl crate::Readable for Scan6Spec {} +#[doc = "`write(|w| ..)` method takes [`scan6::W`](W) writer structure"] +impl crate::Writable for Scan6Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN6 to value 0"] -impl crate::Resettable for SCAN6_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan6Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan7.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan7.rs index 8cfbfd3..7ea7eb7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan7.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan7.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN7` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN7` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN7_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN7_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN7_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN7_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN7_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN7_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan7](index.html) module"] -pub struct SCAN7_SPEC; -impl crate::RegisterSpec for SCAN7_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan7::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan7::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan7Spec; +impl crate::RegisterSpec for Scan7Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan7::R](R) reader structure"] -impl crate::Readable for SCAN7_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan7::W](W) writer structure"] -impl crate::Writable for SCAN7_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan7::R`](R) reader structure"] +impl crate::Readable for Scan7Spec {} +#[doc = "`write(|w| ..)` method takes [`scan7::W`](W) writer structure"] +impl crate::Writable for Scan7Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN7 to value 0"] -impl crate::Resettable for SCAN7_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan7Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan8.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan8.rs index c655b8c..ad0fa0f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan8.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan8.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN8` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN8` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN8_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN8_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN8_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN8_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN8_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN8_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan8](index.html) module"] -pub struct SCAN8_SPEC; -impl crate::RegisterSpec for SCAN8_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan8::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan8::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan8Spec; +impl crate::RegisterSpec for Scan8Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan8::R](R) reader structure"] -impl crate::Readable for SCAN8_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan8::W](W) writer structure"] -impl crate::Writable for SCAN8_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan8::R`](R) reader structure"] +impl crate::Readable for Scan8Spec {} +#[doc = "`write(|w| ..)` method takes [`scan8::W`](W) writer structure"] +impl crate::Writable for Scan8Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN8 to value 0"] -impl crate::Resettable for SCAN8_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan8Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan9.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan9.rs index 724e10f..92aa0ad 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan9.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scan9.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN9` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN9` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN9_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN9_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN9_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN9_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN9_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN9_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan9](index.html) module"] -pub struct SCAN9_SPEC; -impl crate::RegisterSpec for SCAN9_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan9::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan9::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan9Spec; +impl crate::RegisterSpec for Scan9Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan9::R](R) reader structure"] -impl crate::Readable for SCAN9_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan9::W](W) writer structure"] -impl crate::Writable for SCAN9_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan9::R`](R) reader structure"] +impl crate::Readable for Scan9Spec {} +#[doc = "`write(|w| ..)` method takes [`scan9::W`](W) writer structure"] +impl crate::Writable for Scan9Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN9 to value 0"] -impl crate::Resettable for SCAN9_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan9Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scandata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scandata.rs index 3e42357..715b820 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scandata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scandata.rs @@ -1,37 +1,22 @@ #[doc = "Register `SCANDATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DATA` reader - Data"] -pub type DATA_R = crate::FieldReader; +pub type DataR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Data"] #[inline(always)] - pub fn data(&self) -> DATA_R { - DATA_R::new(self.bits) + pub fn data(&self) -> DataR { + DataR::new(self.bits) } } -#[doc = "Most recent data data from scan queue conversion\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scandata](index.html) module"] -pub struct SCANDATA_SPEC; -impl crate::RegisterSpec for SCANDATA_SPEC { +#[doc = "Most recent data data from scan queue conversion\n\nYou can [`read`](crate::Reg::read) this register and get [`scandata::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ScandataSpec; +impl crate::RegisterSpec for ScandataSpec { type Ux = u32; } -#[doc = "`read()` method returns [scandata::R](R) reader structure"] -impl crate::Readable for SCANDATA_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`scandata::R`](R) reader structure"] +impl crate::Readable for ScandataSpec {} #[doc = "`reset()` method sets SCANDATA to value 0"] -impl crate::Resettable for SCANDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ScandataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scanfifocfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scanfifocfg.rs index d10cbda..eab98d5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scanfifocfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scanfifocfg.rs @@ -1,400 +1,376 @@ #[doc = "Register `SCANFIFOCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCANFIFOCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ALIGNMENT` reader - Alignment"] -pub type ALIGNMENT_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Alignment\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ALIGNMENT_A { +pub enum Alignment { #[doc = "0: ID\\[7:0\\], SIGN_EXT, DATA\\[11:0\\]"] - RIGHT12 = 0, + Right12 = 0, #[doc = "1: ID\\[7:0\\], SIGN_EXT, DATA\\[15:0\\]"] - RIGHT16 = 1, + Right16 = 1, #[doc = "2: ID\\[7:0\\], SIGN_EXT, DATA\\[19:0\\]"] - RIGHT20 = 2, + Right20 = 2, #[doc = "3: DATA\\[11:0\\], 000000000000, ID\\[7:0\\]"] - LEFT12 = 3, + Left12 = 3, #[doc = "4: DATA\\[15:0\\], 00000000, ID\\[7:0\\]"] - LEFT16 = 4, + Left16 = 4, #[doc = "5: DATA\\[19:0\\], 0000, ID\\[7:0\\]"] - LEFT20 = 5, + Left20 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ALIGNMENT_A) -> Self { + fn from(variant: Alignment) -> Self { variant as _ } } -impl ALIGNMENT_R { +impl crate::FieldSpec for Alignment { + type Ux = u8; +} +impl crate::IsEnum for Alignment {} +#[doc = "Field `ALIGNMENT` reader - Alignment"] +pub type AlignmentR = crate::FieldReader; +impl AlignmentR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ALIGNMENT_A::RIGHT12), - 1 => Some(ALIGNMENT_A::RIGHT16), - 2 => Some(ALIGNMENT_A::RIGHT20), - 3 => Some(ALIGNMENT_A::LEFT12), - 4 => Some(ALIGNMENT_A::LEFT16), - 5 => Some(ALIGNMENT_A::LEFT20), + 0 => Some(Alignment::Right12), + 1 => Some(Alignment::Right16), + 2 => Some(Alignment::Right20), + 3 => Some(Alignment::Left12), + 4 => Some(Alignment::Left16), + 5 => Some(Alignment::Left20), _ => None, } } - #[doc = "Checks if the value of the field is `RIGHT12`"] + #[doc = "ID\\[7:0\\], SIGN_EXT, DATA\\[11:0\\]"] #[inline(always)] pub fn is_right12(&self) -> bool { - *self == ALIGNMENT_A::RIGHT12 + *self == Alignment::Right12 } - #[doc = "Checks if the value of the field is `RIGHT16`"] + #[doc = "ID\\[7:0\\], SIGN_EXT, DATA\\[15:0\\]"] #[inline(always)] pub fn is_right16(&self) -> bool { - *self == ALIGNMENT_A::RIGHT16 + *self == Alignment::Right16 } - #[doc = "Checks if the value of the field is `RIGHT20`"] + #[doc = "ID\\[7:0\\], SIGN_EXT, DATA\\[19:0\\]"] #[inline(always)] pub fn is_right20(&self) -> bool { - *self == ALIGNMENT_A::RIGHT20 + *self == Alignment::Right20 } - #[doc = "Checks if the value of the field is `LEFT12`"] + #[doc = "DATA\\[11:0\\], 000000000000, ID\\[7:0\\]"] #[inline(always)] pub fn is_left12(&self) -> bool { - *self == ALIGNMENT_A::LEFT12 + *self == Alignment::Left12 } - #[doc = "Checks if the value of the field is `LEFT16`"] + #[doc = "DATA\\[15:0\\], 00000000, ID\\[7:0\\]"] #[inline(always)] pub fn is_left16(&self) -> bool { - *self == ALIGNMENT_A::LEFT16 + *self == Alignment::Left16 } - #[doc = "Checks if the value of the field is `LEFT20`"] + #[doc = "DATA\\[19:0\\], 0000, ID\\[7:0\\]"] #[inline(always)] pub fn is_left20(&self) -> bool { - *self == ALIGNMENT_A::LEFT20 + *self == Alignment::Left20 } } #[doc = "Field `ALIGNMENT` writer - Alignment"] -pub type ALIGNMENT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SCANFIFOCFG_SPEC, u8, ALIGNMENT_A, 3, O>; -impl<'a, const O: u8> ALIGNMENT_W<'a, O> { +pub type AlignmentW<'a, REG> = crate::FieldWriter<'a, REG, 3, Alignment>; +impl<'a, REG> AlignmentW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "ID\\[7:0\\], SIGN_EXT, DATA\\[11:0\\]"] #[inline(always)] - pub fn right12(self) -> &'a mut W { - self.variant(ALIGNMENT_A::RIGHT12) + pub fn right12(self) -> &'a mut crate::W { + self.variant(Alignment::Right12) } #[doc = "ID\\[7:0\\], SIGN_EXT, DATA\\[15:0\\]"] #[inline(always)] - pub fn right16(self) -> &'a mut W { - self.variant(ALIGNMENT_A::RIGHT16) + pub fn right16(self) -> &'a mut crate::W { + self.variant(Alignment::Right16) } #[doc = "ID\\[7:0\\], SIGN_EXT, DATA\\[19:0\\]"] #[inline(always)] - pub fn right20(self) -> &'a mut W { - self.variant(ALIGNMENT_A::RIGHT20) + pub fn right20(self) -> &'a mut crate::W { + self.variant(Alignment::Right20) } #[doc = "DATA\\[11:0\\], 000000000000, ID\\[7:0\\]"] #[inline(always)] - pub fn left12(self) -> &'a mut W { - self.variant(ALIGNMENT_A::LEFT12) + pub fn left12(self) -> &'a mut crate::W { + self.variant(Alignment::Left12) } #[doc = "DATA\\[15:0\\], 00000000, ID\\[7:0\\]"] #[inline(always)] - pub fn left16(self) -> &'a mut W { - self.variant(ALIGNMENT_A::LEFT16) + pub fn left16(self) -> &'a mut crate::W { + self.variant(Alignment::Left16) } #[doc = "DATA\\[19:0\\], 0000, ID\\[7:0\\]"] #[inline(always)] - pub fn left20(self) -> &'a mut W { - self.variant(ALIGNMENT_A::LEFT20) + pub fn left20(self) -> &'a mut crate::W { + self.variant(Alignment::Left20) } } #[doc = "Field `SHOWID` reader - Show ID"] -pub type SHOWID_R = crate::BitReader; +pub type ShowidR = crate::BitReader; #[doc = "Field `SHOWID` writer - Show ID"] -pub type SHOWID_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCANFIFOCFG_SPEC, bool, O>; -#[doc = "Field `DVL` reader - Data Valid Level"] -pub type DVL_R = crate::FieldReader; +pub type ShowidW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Data Valid Level\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DVL_A { +pub enum Dvl { #[doc = "0: When 1 entry in the scan FIFO is valid, set the SCANFIFODVL interrupt and request DMA."] - VALID1 = 0, + Valid1 = 0, #[doc = "1: When 2 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] - VALID2 = 1, + Valid2 = 1, #[doc = "2: When 3 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] - VALID3 = 2, + Valid3 = 2, #[doc = "3: When 4 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] - VALID4 = 3, + Valid4 = 3, #[doc = "4: When 5 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] - VALID5 = 4, + Valid5 = 4, #[doc = "5: When 6 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] - VALID6 = 5, + Valid6 = 5, #[doc = "6: When 7 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] - VALID7 = 6, + Valid7 = 6, #[doc = "7: When 8 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] - VALID8 = 7, + Valid8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DVL_A) -> Self { + fn from(variant: Dvl) -> Self { variant as _ } } -impl DVL_R { +impl crate::FieldSpec for Dvl { + type Ux = u8; +} +impl crate::IsEnum for Dvl {} +#[doc = "Field `DVL` reader - Data Valid Level"] +pub type DvlR = crate::FieldReader; +impl DvlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DVL_A { + pub const fn variant(&self) -> Dvl { match self.bits { - 0 => DVL_A::VALID1, - 1 => DVL_A::VALID2, - 2 => DVL_A::VALID3, - 3 => DVL_A::VALID4, - 4 => DVL_A::VALID5, - 5 => DVL_A::VALID6, - 6 => DVL_A::VALID7, - 7 => DVL_A::VALID8, + 0 => Dvl::Valid1, + 1 => Dvl::Valid2, + 2 => Dvl::Valid3, + 3 => Dvl::Valid4, + 4 => Dvl::Valid5, + 5 => Dvl::Valid6, + 6 => Dvl::Valid7, + 7 => Dvl::Valid8, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `VALID1`"] + #[doc = "When 1 entry in the scan FIFO is valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid1(&self) -> bool { - *self == DVL_A::VALID1 + *self == Dvl::Valid1 } - #[doc = "Checks if the value of the field is `VALID2`"] + #[doc = "When 2 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid2(&self) -> bool { - *self == DVL_A::VALID2 + *self == Dvl::Valid2 } - #[doc = "Checks if the value of the field is `VALID3`"] + #[doc = "When 3 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid3(&self) -> bool { - *self == DVL_A::VALID3 + *self == Dvl::Valid3 } - #[doc = "Checks if the value of the field is `VALID4`"] + #[doc = "When 4 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid4(&self) -> bool { - *self == DVL_A::VALID4 + *self == Dvl::Valid4 } - #[doc = "Checks if the value of the field is `VALID5`"] + #[doc = "When 5 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid5(&self) -> bool { - *self == DVL_A::VALID5 + *self == Dvl::Valid5 } - #[doc = "Checks if the value of the field is `VALID6`"] + #[doc = "When 6 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid6(&self) -> bool { - *self == DVL_A::VALID6 + *self == Dvl::Valid6 } - #[doc = "Checks if the value of the field is `VALID7`"] + #[doc = "When 7 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid7(&self) -> bool { - *self == DVL_A::VALID7 + *self == Dvl::Valid7 } - #[doc = "Checks if the value of the field is `VALID8`"] + #[doc = "When 8 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid8(&self) -> bool { - *self == DVL_A::VALID8 + *self == Dvl::Valid8 } } #[doc = "Field `DVL` writer - Data Valid Level"] -pub type DVL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, SCANFIFOCFG_SPEC, u8, DVL_A, 3, O>; -impl<'a, const O: u8> DVL_W<'a, O> { +pub type DvlW<'a, REG> = crate::FieldWriter<'a, REG, 3, Dvl, crate::Safe>; +impl<'a, REG> DvlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "When 1 entry in the scan FIFO is valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid1(self) -> &'a mut W { - self.variant(DVL_A::VALID1) + pub fn valid1(self) -> &'a mut crate::W { + self.variant(Dvl::Valid1) } #[doc = "When 2 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid2(self) -> &'a mut W { - self.variant(DVL_A::VALID2) + pub fn valid2(self) -> &'a mut crate::W { + self.variant(Dvl::Valid2) } #[doc = "When 3 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid3(self) -> &'a mut W { - self.variant(DVL_A::VALID3) + pub fn valid3(self) -> &'a mut crate::W { + self.variant(Dvl::Valid3) } #[doc = "When 4 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid4(self) -> &'a mut W { - self.variant(DVL_A::VALID4) + pub fn valid4(self) -> &'a mut crate::W { + self.variant(Dvl::Valid4) } #[doc = "When 5 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid5(self) -> &'a mut W { - self.variant(DVL_A::VALID5) + pub fn valid5(self) -> &'a mut crate::W { + self.variant(Dvl::Valid5) } #[doc = "When 6 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid6(self) -> &'a mut W { - self.variant(DVL_A::VALID6) + pub fn valid6(self) -> &'a mut crate::W { + self.variant(Dvl::Valid6) } #[doc = "When 7 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid7(self) -> &'a mut W { - self.variant(DVL_A::VALID7) + pub fn valid7(self) -> &'a mut crate::W { + self.variant(Dvl::Valid7) } #[doc = "When 8 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid8(self) -> &'a mut W { - self.variant(DVL_A::VALID8) + pub fn valid8(self) -> &'a mut crate::W { + self.variant(Dvl::Valid8) } } -#[doc = "Field `DMAWUFIFOSCAN` reader - Scan FIFO DMA Wakeup"] -pub type DMAWUFIFOSCAN_R = crate::BitReader; #[doc = "Scan FIFO DMA Wakeup\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DMAWUFIFOSCAN_A { +pub enum Dmawufifoscan { #[doc = "0: While in EM2 or EM3, the DMA controller will not be requested."] - DISABLED = 0, + Disabled = 0, #[doc = "1: While in EM2 or EM3, the DMA controller will be requested when the scan FIFO reaches its Data Valid Level. \\[DVL must be set to 0 (VALID1).\\]"] - ENABLED = 1, + Enabled = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DMAWUFIFOSCAN_A) -> Self { + fn from(variant: Dmawufifoscan) -> Self { variant as u8 != 0 } } -impl DMAWUFIFOSCAN_R { +#[doc = "Field `DMAWUFIFOSCAN` reader - Scan FIFO DMA Wakeup"] +pub type DmawufifoscanR = crate::BitReader; +impl DmawufifoscanR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DMAWUFIFOSCAN_A { + pub const fn variant(&self) -> Dmawufifoscan { match self.bits { - false => DMAWUFIFOSCAN_A::DISABLED, - true => DMAWUFIFOSCAN_A::ENABLED, + false => Dmawufifoscan::Disabled, + true => Dmawufifoscan::Enabled, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "While in EM2 or EM3, the DMA controller will not be requested."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == DMAWUFIFOSCAN_A::DISABLED + *self == Dmawufifoscan::Disabled } - #[doc = "Checks if the value of the field is `ENABLED`"] + #[doc = "While in EM2 or EM3, the DMA controller will be requested when the scan FIFO reaches its Data Valid Level. \\[DVL must be set to 0 (VALID1).\\]"] #[inline(always)] pub fn is_enabled(&self) -> bool { - *self == DMAWUFIFOSCAN_A::ENABLED + *self == Dmawufifoscan::Enabled } } #[doc = "Field `DMAWUFIFOSCAN` writer - Scan FIFO DMA Wakeup"] -pub type DMAWUFIFOSCAN_W<'a, const O: u8> = - crate::BitWriter<'a, u32, SCANFIFOCFG_SPEC, DMAWUFIFOSCAN_A, O>; -impl<'a, const O: u8> DMAWUFIFOSCAN_W<'a, O> { +pub type DmawufifoscanW<'a, REG> = crate::BitWriter<'a, REG, Dmawufifoscan>; +impl<'a, REG> DmawufifoscanW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "While in EM2 or EM3, the DMA controller will not be requested."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(DMAWUFIFOSCAN_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Dmawufifoscan::Disabled) } #[doc = "While in EM2 or EM3, the DMA controller will be requested when the scan FIFO reaches its Data Valid Level. \\[DVL must be set to 0 (VALID1).\\]"] #[inline(always)] - pub fn enabled(self) -> &'a mut W { - self.variant(DMAWUFIFOSCAN_A::ENABLED) + pub fn enabled(self) -> &'a mut crate::W { + self.variant(Dmawufifoscan::Enabled) } } impl R { #[doc = "Bits 0:2 - Alignment"] #[inline(always)] - pub fn alignment(&self) -> ALIGNMENT_R { - ALIGNMENT_R::new((self.bits & 7) as u8) + pub fn alignment(&self) -> AlignmentR { + AlignmentR::new((self.bits & 7) as u8) } #[doc = "Bit 3 - Show ID"] #[inline(always)] - pub fn showid(&self) -> SHOWID_R { - SHOWID_R::new(((self.bits >> 3) & 1) != 0) + pub fn showid(&self) -> ShowidR { + ShowidR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:6 - Data Valid Level"] #[inline(always)] - pub fn dvl(&self) -> DVL_R { - DVL_R::new(((self.bits >> 4) & 7) as u8) + pub fn dvl(&self) -> DvlR { + DvlR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bit 8 - Scan FIFO DMA Wakeup"] #[inline(always)] - pub fn dmawufifoscan(&self) -> DMAWUFIFOSCAN_R { - DMAWUFIFOSCAN_R::new(((self.bits >> 8) & 1) != 0) + pub fn dmawufifoscan(&self) -> DmawufifoscanR { + DmawufifoscanR::new(((self.bits >> 8) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Alignment"] #[inline(always)] #[must_use] - pub fn alignment(&mut self) -> ALIGNMENT_W<0> { - ALIGNMENT_W::new(self) + pub fn alignment(&mut self) -> AlignmentW { + AlignmentW::new(self, 0) } #[doc = "Bit 3 - Show ID"] #[inline(always)] #[must_use] - pub fn showid(&mut self) -> SHOWID_W<3> { - SHOWID_W::new(self) + pub fn showid(&mut self) -> ShowidW { + ShowidW::new(self, 3) } #[doc = "Bits 4:6 - Data Valid Level"] #[inline(always)] #[must_use] - pub fn dvl(&mut self) -> DVL_W<4> { - DVL_W::new(self) + pub fn dvl(&mut self) -> DvlW { + DvlW::new(self, 4) } #[doc = "Bit 8 - Scan FIFO DMA Wakeup"] #[inline(always)] #[must_use] - pub fn dmawufifoscan(&mut self) -> DMAWUFIFOSCAN_W<8> { - DMAWUFIFOSCAN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dmawufifoscan(&mut self) -> DmawufifoscanW { + DmawufifoscanW::new(self, 8) } } -#[doc = "SCAN FIFO configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scanfifocfg](index.html) module"] -pub struct SCANFIFOCFG_SPEC; -impl crate::RegisterSpec for SCANFIFOCFG_SPEC { +#[doc = "SCAN FIFO configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`scanfifocfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scanfifocfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ScanfifocfgSpec; +impl crate::RegisterSpec for ScanfifocfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [scanfifocfg::R](R) reader structure"] -impl crate::Readable for SCANFIFOCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scanfifocfg::W](W) writer structure"] -impl crate::Writable for SCANFIFOCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scanfifocfg::R`](R) reader structure"] +impl crate::Readable for ScanfifocfgSpec {} +#[doc = "`write(|w| ..)` method takes [`scanfifocfg::W`](W) writer structure"] +impl crate::Writable for ScanfifocfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCANFIFOCFG to value 0x30"] -impl crate::Resettable for SCANFIFOCFG_SPEC { - const RESET_VALUE: Self::Ux = 0x30; +impl crate::Resettable for ScanfifocfgSpec { + const RESET_VALUE: u32 = 0x30; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scanfifodata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scanfifodata.rs index 8e206bf..86b0ede 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scanfifodata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scanfifodata.rs @@ -1,37 +1,22 @@ #[doc = "Register `SCANFIFODATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DATA` reader - Data"] -pub type DATA_R = crate::FieldReader; +pub type DataR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Data"] #[inline(always)] - pub fn data(&self) -> DATA_R { - DATA_R::new(self.bits) + pub fn data(&self) -> DataR { + DataR::new(self.bits) } } -#[doc = "Read the oldest valid data from the scan FIFO and pop the FIFO\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scanfifodata](index.html) module"] -pub struct SCANFIFODATA_SPEC; -impl crate::RegisterSpec for SCANFIFODATA_SPEC { +#[doc = "Read the oldest valid data from the scan FIFO and pop the FIFO\n\nYou can [`read`](crate::Reg::read) this register and get [`scanfifodata::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ScanfifodataSpec; +impl crate::RegisterSpec for ScanfifodataSpec { type Ux = u32; } -#[doc = "`read()` method returns [scanfifodata::R](R) reader structure"] -impl crate::Readable for SCANFIFODATA_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`scanfifodata::R`](R) reader structure"] +impl crate::Readable for ScanfifodataSpec {} #[doc = "`reset()` method sets SCANFIFODATA to value 0"] -impl crate::Resettable for SCANFIFODATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ScanfifodataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scanfifostat.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scanfifostat.rs index d57a45c..ee7ad40 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scanfifostat.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/scanfifostat.rs @@ -1,37 +1,22 @@ #[doc = "Register `SCANFIFOSTAT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `FIFOREADCNT` reader - FIFO Read Count"] -pub type FIFOREADCNT_R = crate::FieldReader; +pub type FiforeadcntR = crate::FieldReader; impl R { #[doc = "Bits 0:3 - FIFO Read Count"] #[inline(always)] - pub fn fiforeadcnt(&self) -> FIFOREADCNT_R { - FIFOREADCNT_R::new((self.bits & 0x0f) as u8) + pub fn fiforeadcnt(&self) -> FiforeadcntR { + FiforeadcntR::new((self.bits & 0x0f) as u8) } } -#[doc = "Scan FIFO status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scanfifostat](index.html) module"] -pub struct SCANFIFOSTAT_SPEC; -impl crate::RegisterSpec for SCANFIFOSTAT_SPEC { +#[doc = "Scan FIFO status\n\nYou can [`read`](crate::Reg::read) this register and get [`scanfifostat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ScanfifostatSpec; +impl crate::RegisterSpec for ScanfifostatSpec { type Ux = u32; } -#[doc = "`read()` method returns [scanfifostat::R](R) reader structure"] -impl crate::Readable for SCANFIFOSTAT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`scanfifostat::R`](R) reader structure"] +impl crate::Readable for ScanfifostatSpec {} #[doc = "`reset()` method sets SCANFIFOSTAT to value 0"] -impl crate::Resettable for SCANFIFOSTAT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ScanfifostatSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/sched0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/sched0.rs index 890345c..3253017 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/sched0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/sched0.rs @@ -1,80 +1,40 @@ #[doc = "Register `SCHED0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCHED0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRESCALE` reader - Prescale"] -pub type PRESCALE_R = crate::FieldReader; +pub type PrescaleR = crate::FieldReader; #[doc = "Field `PRESCALE` writer - Prescale"] -pub type PRESCALE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCHED0_SPEC, u16, u16, 10, O>; +pub type PrescaleW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; impl R { #[doc = "Bits 0:9 - Prescale"] #[inline(always)] - pub fn prescale(&self) -> PRESCALE_R { - PRESCALE_R::new((self.bits & 0x03ff) as u16) + pub fn prescale(&self) -> PrescaleR { + PrescaleR::new((self.bits & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:9 - Prescale"] #[inline(always)] #[must_use] - pub fn prescale(&mut self) -> PRESCALE_W<0> { - PRESCALE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prescale(&mut self) -> PrescaleW { + PrescaleW::new(self, 0) } } -#[doc = "Scheduling\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sched0](index.html) module"] -pub struct SCHED0_SPEC; -impl crate::RegisterSpec for SCHED0_SPEC { +#[doc = "Scheduling\n\nYou can [`read`](crate::Reg::read) this register and get [`sched0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sched0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Sched0Spec; +impl crate::RegisterSpec for Sched0Spec { type Ux = u32; } -#[doc = "`read()` method returns [sched0::R](R) reader structure"] -impl crate::Readable for SCHED0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sched0::W](W) writer structure"] -impl crate::Writable for SCHED0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`sched0::R`](R) reader structure"] +impl crate::Readable for Sched0Spec {} +#[doc = "`write(|w| ..)` method takes [`sched0::W`](W) writer structure"] +impl crate::Writable for Sched0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCHED0 to value 0"] -impl crate::Resettable for SCHED0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Sched0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/sched1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/sched1.rs index b20920a..8e25638 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/sched1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/sched1.rs @@ -1,80 +1,40 @@ #[doc = "Register `SCHED1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCHED1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRESCALE` reader - Prescale"] -pub type PRESCALE_R = crate::FieldReader; +pub type PrescaleR = crate::FieldReader; #[doc = "Field `PRESCALE` writer - Prescale"] -pub type PRESCALE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCHED1_SPEC, u16, u16, 10, O>; +pub type PrescaleW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; impl R { #[doc = "Bits 0:9 - Prescale"] #[inline(always)] - pub fn prescale(&self) -> PRESCALE_R { - PRESCALE_R::new((self.bits & 0x03ff) as u16) + pub fn prescale(&self) -> PrescaleR { + PrescaleR::new((self.bits & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:9 - Prescale"] #[inline(always)] #[must_use] - pub fn prescale(&mut self) -> PRESCALE_W<0> { - PRESCALE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prescale(&mut self) -> PrescaleW { + PrescaleW::new(self, 0) } } -#[doc = "Scheduling\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sched1](index.html) module"] -pub struct SCHED1_SPEC; -impl crate::RegisterSpec for SCHED1_SPEC { +#[doc = "Scheduling\n\nYou can [`read`](crate::Reg::read) this register and get [`sched1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sched1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Sched1Spec; +impl crate::RegisterSpec for Sched1Spec { type Ux = u32; } -#[doc = "`read()` method returns [sched1::R](R) reader structure"] -impl crate::Readable for SCHED1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sched1::W](W) writer structure"] -impl crate::Writable for SCHED1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`sched1::R`](R) reader structure"] +impl crate::Readable for Sched1Spec {} +#[doc = "`write(|w| ..)` method takes [`sched1::W`](W) writer structure"] +impl crate::Writable for Sched1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCHED1 to value 0"] -impl crate::Resettable for SCHED1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Sched1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/single.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/single.rs index de2a9cd..01035ed 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/single.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/single.rs @@ -1,440 +1,393 @@ #[doc = "Register `SINGLE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SINGLE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SINGLE_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SINGLE_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SINGLE_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SINGLE_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SINGLE_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SINGLE_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [single](index.html) module"] -pub struct SINGLE_SPEC; -impl crate::RegisterSpec for SINGLE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`single::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`single::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SingleSpec; +impl crate::RegisterSpec for SingleSpec { type Ux = u32; } -#[doc = "`read()` method returns [single::R](R) reader structure"] -impl crate::Readable for SINGLE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [single::W](W) writer structure"] -impl crate::Writable for SINGLE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`single::R`](R) reader structure"] +impl crate::Readable for SingleSpec {} +#[doc = "`write(|w| ..)` method takes [`single::W`](W) writer structure"] +impl crate::Writable for SingleSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SINGLE to value 0"] -impl crate::Resettable for SINGLE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SingleSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/singledata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/singledata.rs index e975114..dfd0821 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/singledata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/singledata.rs @@ -1,37 +1,22 @@ #[doc = "Register `SINGLEDATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DATA` reader - Data"] -pub type DATA_R = crate::FieldReader; +pub type DataR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Data"] #[inline(always)] - pub fn data(&self) -> DATA_R { - DATA_R::new(self.bits) + pub fn data(&self) -> DataR { + DataR::new(self.bits) } } -#[doc = "latest single queue conversion data\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [singledata](index.html) module"] -pub struct SINGLEDATA_SPEC; -impl crate::RegisterSpec for SINGLEDATA_SPEC { +#[doc = "latest single queue conversion data\n\nYou can [`read`](crate::Reg::read) this register and get [`singledata::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SingledataSpec; +impl crate::RegisterSpec for SingledataSpec { type Ux = u32; } -#[doc = "`read()` method returns [singledata::R](R) reader structure"] -impl crate::Readable for SINGLEDATA_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`singledata::R`](R) reader structure"] +impl crate::Readable for SingledataSpec {} #[doc = "`reset()` method sets SINGLEDATA to value 0"] -impl crate::Resettable for SINGLEDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SingledataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/singlefifocfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/singlefifocfg.rs index 22fa3f7..900d11e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/singlefifocfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/singlefifocfg.rs @@ -1,400 +1,376 @@ #[doc = "Register `SINGLEFIFOCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SINGLEFIFOCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ALIGNMENT` reader - Alignment"] -pub type ALIGNMENT_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Alignment\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ALIGNMENT_A { +pub enum Alignment { #[doc = "0: ID\\[7:0\\], SIGN_EXT, DATA\\[11:0\\]"] - RIGHT12 = 0, + Right12 = 0, #[doc = "1: ID\\[7:0\\], SIGN_EXT, DATA\\[15:0\\]"] - RIGHT16 = 1, + Right16 = 1, #[doc = "2: ID\\[7:0\\], SIGN_EXT, DATA\\[19:0\\]"] - RIGHT20 = 2, + Right20 = 2, #[doc = "3: DATA\\[11:0\\], 000000000000, ID\\[7:0\\]"] - LEFT12 = 3, + Left12 = 3, #[doc = "4: DATA\\[15:0\\], 00000000, ID\\[7:0\\]"] - LEFT16 = 4, + Left16 = 4, #[doc = "5: DATA\\[19:0\\], 0000, ID\\[7:0\\]"] - LEFT20 = 5, + Left20 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ALIGNMENT_A) -> Self { + fn from(variant: Alignment) -> Self { variant as _ } } -impl ALIGNMENT_R { +impl crate::FieldSpec for Alignment { + type Ux = u8; +} +impl crate::IsEnum for Alignment {} +#[doc = "Field `ALIGNMENT` reader - Alignment"] +pub type AlignmentR = crate::FieldReader; +impl AlignmentR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ALIGNMENT_A::RIGHT12), - 1 => Some(ALIGNMENT_A::RIGHT16), - 2 => Some(ALIGNMENT_A::RIGHT20), - 3 => Some(ALIGNMENT_A::LEFT12), - 4 => Some(ALIGNMENT_A::LEFT16), - 5 => Some(ALIGNMENT_A::LEFT20), + 0 => Some(Alignment::Right12), + 1 => Some(Alignment::Right16), + 2 => Some(Alignment::Right20), + 3 => Some(Alignment::Left12), + 4 => Some(Alignment::Left16), + 5 => Some(Alignment::Left20), _ => None, } } - #[doc = "Checks if the value of the field is `RIGHT12`"] + #[doc = "ID\\[7:0\\], SIGN_EXT, DATA\\[11:0\\]"] #[inline(always)] pub fn is_right12(&self) -> bool { - *self == ALIGNMENT_A::RIGHT12 + *self == Alignment::Right12 } - #[doc = "Checks if the value of the field is `RIGHT16`"] + #[doc = "ID\\[7:0\\], SIGN_EXT, DATA\\[15:0\\]"] #[inline(always)] pub fn is_right16(&self) -> bool { - *self == ALIGNMENT_A::RIGHT16 + *self == Alignment::Right16 } - #[doc = "Checks if the value of the field is `RIGHT20`"] + #[doc = "ID\\[7:0\\], SIGN_EXT, DATA\\[19:0\\]"] #[inline(always)] pub fn is_right20(&self) -> bool { - *self == ALIGNMENT_A::RIGHT20 + *self == Alignment::Right20 } - #[doc = "Checks if the value of the field is `LEFT12`"] + #[doc = "DATA\\[11:0\\], 000000000000, ID\\[7:0\\]"] #[inline(always)] pub fn is_left12(&self) -> bool { - *self == ALIGNMENT_A::LEFT12 + *self == Alignment::Left12 } - #[doc = "Checks if the value of the field is `LEFT16`"] + #[doc = "DATA\\[15:0\\], 00000000, ID\\[7:0\\]"] #[inline(always)] pub fn is_left16(&self) -> bool { - *self == ALIGNMENT_A::LEFT16 + *self == Alignment::Left16 } - #[doc = "Checks if the value of the field is `LEFT20`"] + #[doc = "DATA\\[19:0\\], 0000, ID\\[7:0\\]"] #[inline(always)] pub fn is_left20(&self) -> bool { - *self == ALIGNMENT_A::LEFT20 + *self == Alignment::Left20 } } #[doc = "Field `ALIGNMENT` writer - Alignment"] -pub type ALIGNMENT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SINGLEFIFOCFG_SPEC, u8, ALIGNMENT_A, 3, O>; -impl<'a, const O: u8> ALIGNMENT_W<'a, O> { +pub type AlignmentW<'a, REG> = crate::FieldWriter<'a, REG, 3, Alignment>; +impl<'a, REG> AlignmentW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "ID\\[7:0\\], SIGN_EXT, DATA\\[11:0\\]"] #[inline(always)] - pub fn right12(self) -> &'a mut W { - self.variant(ALIGNMENT_A::RIGHT12) + pub fn right12(self) -> &'a mut crate::W { + self.variant(Alignment::Right12) } #[doc = "ID\\[7:0\\], SIGN_EXT, DATA\\[15:0\\]"] #[inline(always)] - pub fn right16(self) -> &'a mut W { - self.variant(ALIGNMENT_A::RIGHT16) + pub fn right16(self) -> &'a mut crate::W { + self.variant(Alignment::Right16) } #[doc = "ID\\[7:0\\], SIGN_EXT, DATA\\[19:0\\]"] #[inline(always)] - pub fn right20(self) -> &'a mut W { - self.variant(ALIGNMENT_A::RIGHT20) + pub fn right20(self) -> &'a mut crate::W { + self.variant(Alignment::Right20) } #[doc = "DATA\\[11:0\\], 000000000000, ID\\[7:0\\]"] #[inline(always)] - pub fn left12(self) -> &'a mut W { - self.variant(ALIGNMENT_A::LEFT12) + pub fn left12(self) -> &'a mut crate::W { + self.variant(Alignment::Left12) } #[doc = "DATA\\[15:0\\], 00000000, ID\\[7:0\\]"] #[inline(always)] - pub fn left16(self) -> &'a mut W { - self.variant(ALIGNMENT_A::LEFT16) + pub fn left16(self) -> &'a mut crate::W { + self.variant(Alignment::Left16) } #[doc = "DATA\\[19:0\\], 0000, ID\\[7:0\\]"] #[inline(always)] - pub fn left20(self) -> &'a mut W { - self.variant(ALIGNMENT_A::LEFT20) + pub fn left20(self) -> &'a mut crate::W { + self.variant(Alignment::Left20) } } #[doc = "Field `SHOWID` reader - Show ID"] -pub type SHOWID_R = crate::BitReader; +pub type ShowidR = crate::BitReader; #[doc = "Field `SHOWID` writer - Show ID"] -pub type SHOWID_W<'a, const O: u8> = crate::BitWriter<'a, u32, SINGLEFIFOCFG_SPEC, bool, O>; -#[doc = "Field `DVL` reader - Data Valid Level"] -pub type DVL_R = crate::FieldReader; +pub type ShowidW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Data Valid Level\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DVL_A { +pub enum Dvl { #[doc = "0: When 1 entry in the single FIFO is valid, set the SINGLEFIFODVL interrupt and request DMA."] - VALID1 = 0, + Valid1 = 0, #[doc = "1: When 2 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] - VALID2 = 1, + Valid2 = 1, #[doc = "2: When 3 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] - VALID3 = 2, + Valid3 = 2, #[doc = "3: When 4 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] - VALID4 = 3, + Valid4 = 3, #[doc = "4: When 5 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] - VALID5 = 4, + Valid5 = 4, #[doc = "5: When 6 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] - VALID6 = 5, + Valid6 = 5, #[doc = "6: When 7 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] - VALID7 = 6, + Valid7 = 6, #[doc = "7: When 8 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] - VALID8 = 7, + Valid8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DVL_A) -> Self { + fn from(variant: Dvl) -> Self { variant as _ } } -impl DVL_R { +impl crate::FieldSpec for Dvl { + type Ux = u8; +} +impl crate::IsEnum for Dvl {} +#[doc = "Field `DVL` reader - Data Valid Level"] +pub type DvlR = crate::FieldReader; +impl DvlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DVL_A { + pub const fn variant(&self) -> Dvl { match self.bits { - 0 => DVL_A::VALID1, - 1 => DVL_A::VALID2, - 2 => DVL_A::VALID3, - 3 => DVL_A::VALID4, - 4 => DVL_A::VALID5, - 5 => DVL_A::VALID6, - 6 => DVL_A::VALID7, - 7 => DVL_A::VALID8, + 0 => Dvl::Valid1, + 1 => Dvl::Valid2, + 2 => Dvl::Valid3, + 3 => Dvl::Valid4, + 4 => Dvl::Valid5, + 5 => Dvl::Valid6, + 6 => Dvl::Valid7, + 7 => Dvl::Valid8, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `VALID1`"] + #[doc = "When 1 entry in the single FIFO is valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid1(&self) -> bool { - *self == DVL_A::VALID1 + *self == Dvl::Valid1 } - #[doc = "Checks if the value of the field is `VALID2`"] + #[doc = "When 2 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid2(&self) -> bool { - *self == DVL_A::VALID2 + *self == Dvl::Valid2 } - #[doc = "Checks if the value of the field is `VALID3`"] + #[doc = "When 3 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid3(&self) -> bool { - *self == DVL_A::VALID3 + *self == Dvl::Valid3 } - #[doc = "Checks if the value of the field is `VALID4`"] + #[doc = "When 4 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid4(&self) -> bool { - *self == DVL_A::VALID4 + *self == Dvl::Valid4 } - #[doc = "Checks if the value of the field is `VALID5`"] + #[doc = "When 5 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid5(&self) -> bool { - *self == DVL_A::VALID5 + *self == Dvl::Valid5 } - #[doc = "Checks if the value of the field is `VALID6`"] + #[doc = "When 6 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid6(&self) -> bool { - *self == DVL_A::VALID6 + *self == Dvl::Valid6 } - #[doc = "Checks if the value of the field is `VALID7`"] + #[doc = "When 7 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid7(&self) -> bool { - *self == DVL_A::VALID7 + *self == Dvl::Valid7 } - #[doc = "Checks if the value of the field is `VALID8`"] + #[doc = "When 8 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid8(&self) -> bool { - *self == DVL_A::VALID8 + *self == Dvl::Valid8 } } #[doc = "Field `DVL` writer - Data Valid Level"] -pub type DVL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, SINGLEFIFOCFG_SPEC, u8, DVL_A, 3, O>; -impl<'a, const O: u8> DVL_W<'a, O> { +pub type DvlW<'a, REG> = crate::FieldWriter<'a, REG, 3, Dvl, crate::Safe>; +impl<'a, REG> DvlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "When 1 entry in the single FIFO is valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid1(self) -> &'a mut W { - self.variant(DVL_A::VALID1) + pub fn valid1(self) -> &'a mut crate::W { + self.variant(Dvl::Valid1) } #[doc = "When 2 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid2(self) -> &'a mut W { - self.variant(DVL_A::VALID2) + pub fn valid2(self) -> &'a mut crate::W { + self.variant(Dvl::Valid2) } #[doc = "When 3 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid3(self) -> &'a mut W { - self.variant(DVL_A::VALID3) + pub fn valid3(self) -> &'a mut crate::W { + self.variant(Dvl::Valid3) } #[doc = "When 4 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid4(self) -> &'a mut W { - self.variant(DVL_A::VALID4) + pub fn valid4(self) -> &'a mut crate::W { + self.variant(Dvl::Valid4) } #[doc = "When 5 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid5(self) -> &'a mut W { - self.variant(DVL_A::VALID5) + pub fn valid5(self) -> &'a mut crate::W { + self.variant(Dvl::Valid5) } #[doc = "When 6 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid6(self) -> &'a mut W { - self.variant(DVL_A::VALID6) + pub fn valid6(self) -> &'a mut crate::W { + self.variant(Dvl::Valid6) } #[doc = "When 7 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid7(self) -> &'a mut W { - self.variant(DVL_A::VALID7) + pub fn valid7(self) -> &'a mut crate::W { + self.variant(Dvl::Valid7) } #[doc = "When 8 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid8(self) -> &'a mut W { - self.variant(DVL_A::VALID8) + pub fn valid8(self) -> &'a mut crate::W { + self.variant(Dvl::Valid8) } } -#[doc = "Field `DMAWUFIFOSINGLE` reader - Single FIFO DMA wakeup."] -pub type DMAWUFIFOSINGLE_R = crate::BitReader; #[doc = "Single FIFO DMA wakeup.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DMAWUFIFOSINGLE_A { +pub enum Dmawufifosingle { #[doc = "0: While in EM2 or EM3, the DMA controller will not be requested."] - DISABLED = 0, + Disabled = 0, #[doc = "1: While in EM2 or EM3, the DMA controller will be requested when the single FIFO reaches its Data Valid Level. \\[DVL must be set to 0 (VALID1).\\]"] - ENABLED = 1, + Enabled = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DMAWUFIFOSINGLE_A) -> Self { + fn from(variant: Dmawufifosingle) -> Self { variant as u8 != 0 } } -impl DMAWUFIFOSINGLE_R { +#[doc = "Field `DMAWUFIFOSINGLE` reader - Single FIFO DMA wakeup."] +pub type DmawufifosingleR = crate::BitReader; +impl DmawufifosingleR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DMAWUFIFOSINGLE_A { + pub const fn variant(&self) -> Dmawufifosingle { match self.bits { - false => DMAWUFIFOSINGLE_A::DISABLED, - true => DMAWUFIFOSINGLE_A::ENABLED, + false => Dmawufifosingle::Disabled, + true => Dmawufifosingle::Enabled, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "While in EM2 or EM3, the DMA controller will not be requested."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == DMAWUFIFOSINGLE_A::DISABLED + *self == Dmawufifosingle::Disabled } - #[doc = "Checks if the value of the field is `ENABLED`"] + #[doc = "While in EM2 or EM3, the DMA controller will be requested when the single FIFO reaches its Data Valid Level. \\[DVL must be set to 0 (VALID1).\\]"] #[inline(always)] pub fn is_enabled(&self) -> bool { - *self == DMAWUFIFOSINGLE_A::ENABLED + *self == Dmawufifosingle::Enabled } } #[doc = "Field `DMAWUFIFOSINGLE` writer - Single FIFO DMA wakeup."] -pub type DMAWUFIFOSINGLE_W<'a, const O: u8> = - crate::BitWriter<'a, u32, SINGLEFIFOCFG_SPEC, DMAWUFIFOSINGLE_A, O>; -impl<'a, const O: u8> DMAWUFIFOSINGLE_W<'a, O> { +pub type DmawufifosingleW<'a, REG> = crate::BitWriter<'a, REG, Dmawufifosingle>; +impl<'a, REG> DmawufifosingleW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "While in EM2 or EM3, the DMA controller will not be requested."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(DMAWUFIFOSINGLE_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Dmawufifosingle::Disabled) } #[doc = "While in EM2 or EM3, the DMA controller will be requested when the single FIFO reaches its Data Valid Level. \\[DVL must be set to 0 (VALID1).\\]"] #[inline(always)] - pub fn enabled(self) -> &'a mut W { - self.variant(DMAWUFIFOSINGLE_A::ENABLED) + pub fn enabled(self) -> &'a mut crate::W { + self.variant(Dmawufifosingle::Enabled) } } impl R { #[doc = "Bits 0:2 - Alignment"] #[inline(always)] - pub fn alignment(&self) -> ALIGNMENT_R { - ALIGNMENT_R::new((self.bits & 7) as u8) + pub fn alignment(&self) -> AlignmentR { + AlignmentR::new((self.bits & 7) as u8) } #[doc = "Bit 3 - Show ID"] #[inline(always)] - pub fn showid(&self) -> SHOWID_R { - SHOWID_R::new(((self.bits >> 3) & 1) != 0) + pub fn showid(&self) -> ShowidR { + ShowidR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:6 - Data Valid Level"] #[inline(always)] - pub fn dvl(&self) -> DVL_R { - DVL_R::new(((self.bits >> 4) & 7) as u8) + pub fn dvl(&self) -> DvlR { + DvlR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bit 8 - Single FIFO DMA wakeup."] #[inline(always)] - pub fn dmawufifosingle(&self) -> DMAWUFIFOSINGLE_R { - DMAWUFIFOSINGLE_R::new(((self.bits >> 8) & 1) != 0) + pub fn dmawufifosingle(&self) -> DmawufifosingleR { + DmawufifosingleR::new(((self.bits >> 8) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Alignment"] #[inline(always)] #[must_use] - pub fn alignment(&mut self) -> ALIGNMENT_W<0> { - ALIGNMENT_W::new(self) + pub fn alignment(&mut self) -> AlignmentW { + AlignmentW::new(self, 0) } #[doc = "Bit 3 - Show ID"] #[inline(always)] #[must_use] - pub fn showid(&mut self) -> SHOWID_W<3> { - SHOWID_W::new(self) + pub fn showid(&mut self) -> ShowidW { + ShowidW::new(self, 3) } #[doc = "Bits 4:6 - Data Valid Level"] #[inline(always)] #[must_use] - pub fn dvl(&mut self) -> DVL_W<4> { - DVL_W::new(self) + pub fn dvl(&mut self) -> DvlW { + DvlW::new(self, 4) } #[doc = "Bit 8 - Single FIFO DMA wakeup."] #[inline(always)] #[must_use] - pub fn dmawufifosingle(&mut self) -> DMAWUFIFOSINGLE_W<8> { - DMAWUFIFOSINGLE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dmawufifosingle(&mut self) -> DmawufifosingleW { + DmawufifosingleW::new(self, 8) } } -#[doc = "Single FIFO Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [singlefifocfg](index.html) module"] -pub struct SINGLEFIFOCFG_SPEC; -impl crate::RegisterSpec for SINGLEFIFOCFG_SPEC { +#[doc = "Single FIFO Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`singlefifocfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`singlefifocfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SinglefifocfgSpec; +impl crate::RegisterSpec for SinglefifocfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [singlefifocfg::R](R) reader structure"] -impl crate::Readable for SINGLEFIFOCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [singlefifocfg::W](W) writer structure"] -impl crate::Writable for SINGLEFIFOCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`singlefifocfg::R`](R) reader structure"] +impl crate::Readable for SinglefifocfgSpec {} +#[doc = "`write(|w| ..)` method takes [`singlefifocfg::W`](W) writer structure"] +impl crate::Writable for SinglefifocfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SINGLEFIFOCFG to value 0x30"] -impl crate::Resettable for SINGLEFIFOCFG_SPEC { - const RESET_VALUE: Self::Ux = 0x30; +impl crate::Resettable for SinglefifocfgSpec { + const RESET_VALUE: u32 = 0x30; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/singlefifodata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/singlefifodata.rs index f810c23..1c94717 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/singlefifodata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/singlefifodata.rs @@ -1,37 +1,22 @@ #[doc = "Register `SINGLEFIFODATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DATA` reader - Single FIFO Read Data"] -pub type DATA_R = crate::FieldReader; +pub type DataR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Single FIFO Read Data"] #[inline(always)] - pub fn data(&self) -> DATA_R { - DATA_R::new(self.bits) + pub fn data(&self) -> DataR { + DataR::new(self.bits) } } -#[doc = "Read the oldest valid data from the single FIFO and pop the FIFO\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [singlefifodata](index.html) module"] -pub struct SINGLEFIFODATA_SPEC; -impl crate::RegisterSpec for SINGLEFIFODATA_SPEC { +#[doc = "Read the oldest valid data from the single FIFO and pop the FIFO\n\nYou can [`read`](crate::Reg::read) this register and get [`singlefifodata::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SinglefifodataSpec; +impl crate::RegisterSpec for SinglefifodataSpec { type Ux = u32; } -#[doc = "`read()` method returns [singlefifodata::R](R) reader structure"] -impl crate::Readable for SINGLEFIFODATA_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`singlefifodata::R`](R) reader structure"] +impl crate::Readable for SinglefifodataSpec {} #[doc = "`reset()` method sets SINGLEFIFODATA to value 0"] -impl crate::Resettable for SINGLEFIFODATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SinglefifodataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/singlefifostat.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/singlefifostat.rs index 76e4a9f..8679da5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/singlefifostat.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/singlefifostat.rs @@ -1,37 +1,22 @@ #[doc = "Register `SINGLEFIFOSTAT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `FIFOREADCNT` reader - FIFO Read Count"] -pub type FIFOREADCNT_R = crate::FieldReader; +pub type FiforeadcntR = crate::FieldReader; impl R { #[doc = "Bits 0:3 - FIFO Read Count"] #[inline(always)] - pub fn fiforeadcnt(&self) -> FIFOREADCNT_R { - FIFOREADCNT_R::new((self.bits & 0x0f) as u8) + pub fn fiforeadcnt(&self) -> FiforeadcntR { + FiforeadcntR::new((self.bits & 0x0f) as u8) } } -#[doc = "Single FIFO status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [singlefifostat](index.html) module"] -pub struct SINGLEFIFOSTAT_SPEC; -impl crate::RegisterSpec for SINGLEFIFOSTAT_SPEC { +#[doc = "Single FIFO status\n\nYou can [`read`](crate::Reg::read) this register and get [`singlefifostat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SinglefifostatSpec; +impl crate::RegisterSpec for SinglefifostatSpec { type Ux = u32; } -#[doc = "`read()` method returns [singlefifostat::R](R) reader structure"] -impl crate::Readable for SINGLEFIFOSTAT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`singlefifostat::R`](R) reader structure"] +impl crate::Readable for SinglefifostatSpec {} #[doc = "`reset()` method sets SINGLEFIFOSTAT to value 0"] -impl crate::Resettable for SINGLEFIFOSTAT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SinglefifostatSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/status.rs index c6fece3..8491a08 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/status.rs @@ -1,128 +1,113 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `SINGLEQEN` reader - Single Queue Enabled"] -pub type SINGLEQEN_R = crate::BitReader; +pub type SingleqenR = crate::BitReader; #[doc = "Field `SINGLEQUEUEPENDING` reader - Single Queue Pending"] -pub type SINGLEQUEUEPENDING_R = crate::BitReader; +pub type SinglequeuependingR = crate::BitReader; #[doc = "Field `SCANQEN` reader - Scan Queued Enabled"] -pub type SCANQEN_R = crate::BitReader; +pub type ScanqenR = crate::BitReader; #[doc = "Field `SCANQUEUEPENDING` reader - Scan Queue Pending"] -pub type SCANQUEUEPENDING_R = crate::BitReader; +pub type ScanqueuependingR = crate::BitReader; #[doc = "Field `CONVERTING` reader - Converting"] -pub type CONVERTING_R = crate::BitReader; +pub type ConvertingR = crate::BitReader; #[doc = "Field `SINGLEFIFODV` reader - SINGLEFIFO Data Valid"] -pub type SINGLEFIFODV_R = crate::BitReader; +pub type SinglefifodvR = crate::BitReader; #[doc = "Field `SCANFIFODV` reader - SCANFIFO Data Valid"] -pub type SCANFIFODV_R = crate::BitReader; +pub type ScanfifodvR = crate::BitReader; #[doc = "Field `SINGLEFIFOFLUSHING` reader - The Single FIFO is flushing"] -pub type SINGLEFIFOFLUSHING_R = crate::BitReader; +pub type SinglefifoflushingR = crate::BitReader; #[doc = "Field `SCANFIFOFLUSHING` reader - The Scan FIFO is flushing"] -pub type SCANFIFOFLUSHING_R = crate::BitReader; +pub type ScanfifoflushingR = crate::BitReader; #[doc = "Field `TIMERACTIVE` reader - Timer Active"] -pub type TIMERACTIVE_R = crate::BitReader; +pub type TimeractiveR = crate::BitReader; #[doc = "Field `SINGLEWRITEPENDING` reader - SINGLE write pending"] -pub type SINGLEWRITEPENDING_R = crate::BitReader; +pub type SinglewritependingR = crate::BitReader; #[doc = "Field `MASKREQWRITEPENDING` reader - MASKREQ write pending"] -pub type MASKREQWRITEPENDING_R = crate::BitReader; +pub type MaskreqwritependingR = crate::BitReader; #[doc = "Field `SYNCBUSY` reader - SYNCBUSY"] -pub type SYNCBUSY_R = crate::BitReader; +pub type SyncbusyR = crate::BitReader; #[doc = "Field `ADCWARM` reader - ADCWARM"] -pub type ADCWARM_R = crate::BitReader; +pub type AdcwarmR = crate::BitReader; impl R { #[doc = "Bit 0 - Single Queue Enabled"] #[inline(always)] - pub fn singleqen(&self) -> SINGLEQEN_R { - SINGLEQEN_R::new((self.bits & 1) != 0) + pub fn singleqen(&self) -> SingleqenR { + SingleqenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Single Queue Pending"] #[inline(always)] - pub fn singlequeuepending(&self) -> SINGLEQUEUEPENDING_R { - SINGLEQUEUEPENDING_R::new(((self.bits >> 1) & 1) != 0) + pub fn singlequeuepending(&self) -> SinglequeuependingR { + SinglequeuependingR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - Scan Queued Enabled"] #[inline(always)] - pub fn scanqen(&self) -> SCANQEN_R { - SCANQEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn scanqen(&self) -> ScanqenR { + ScanqenR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Scan Queue Pending"] #[inline(always)] - pub fn scanqueuepending(&self) -> SCANQUEUEPENDING_R { - SCANQUEUEPENDING_R::new(((self.bits >> 4) & 1) != 0) + pub fn scanqueuepending(&self) -> ScanqueuependingR { + ScanqueuependingR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 6 - Converting"] #[inline(always)] - pub fn converting(&self) -> CONVERTING_R { - CONVERTING_R::new(((self.bits >> 6) & 1) != 0) + pub fn converting(&self) -> ConvertingR { + ConvertingR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - SINGLEFIFO Data Valid"] #[inline(always)] - pub fn singlefifodv(&self) -> SINGLEFIFODV_R { - SINGLEFIFODV_R::new(((self.bits >> 8) & 1) != 0) + pub fn singlefifodv(&self) -> SinglefifodvR { + SinglefifodvR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - SCANFIFO Data Valid"] #[inline(always)] - pub fn scanfifodv(&self) -> SCANFIFODV_R { - SCANFIFODV_R::new(((self.bits >> 9) & 1) != 0) + pub fn scanfifodv(&self) -> ScanfifodvR { + ScanfifodvR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 14 - The Single FIFO is flushing"] #[inline(always)] - pub fn singlefifoflushing(&self) -> SINGLEFIFOFLUSHING_R { - SINGLEFIFOFLUSHING_R::new(((self.bits >> 14) & 1) != 0) + pub fn singlefifoflushing(&self) -> SinglefifoflushingR { + SinglefifoflushingR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - The Scan FIFO is flushing"] #[inline(always)] - pub fn scanfifoflushing(&self) -> SCANFIFOFLUSHING_R { - SCANFIFOFLUSHING_R::new(((self.bits >> 15) & 1) != 0) + pub fn scanfifoflushing(&self) -> ScanfifoflushingR { + ScanfifoflushingR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Timer Active"] #[inline(always)] - pub fn timeractive(&self) -> TIMERACTIVE_R { - TIMERACTIVE_R::new(((self.bits >> 16) & 1) != 0) + pub fn timeractive(&self) -> TimeractiveR { + TimeractiveR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 20 - SINGLE write pending"] #[inline(always)] - pub fn singlewritepending(&self) -> SINGLEWRITEPENDING_R { - SINGLEWRITEPENDING_R::new(((self.bits >> 20) & 1) != 0) + pub fn singlewritepending(&self) -> SinglewritependingR { + SinglewritependingR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - MASKREQ write pending"] #[inline(always)] - pub fn maskreqwritepending(&self) -> MASKREQWRITEPENDING_R { - MASKREQWRITEPENDING_R::new(((self.bits >> 21) & 1) != 0) + pub fn maskreqwritepending(&self) -> MaskreqwritependingR { + MaskreqwritependingR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 24 - SYNCBUSY"] #[inline(always)] - pub fn syncbusy(&self) -> SYNCBUSY_R { - SYNCBUSY_R::new(((self.bits >> 24) & 1) != 0) + pub fn syncbusy(&self) -> SyncbusyR { + SyncbusyR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 30 - ADCWARM"] #[inline(always)] - pub fn adcwarm(&self) -> ADCWARM_R { - ADCWARM_R::new(((self.bits >> 30) & 1) != 0) + pub fn adcwarm(&self) -> AdcwarmR { + AdcwarmR::new(((self.bits >> 30) & 1) != 0) } } -#[doc = "Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "Status\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/stmask.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/stmask.rs index d7d6913..68ce79a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/stmask.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/stmask.rs @@ -1,37 +1,22 @@ #[doc = "Register `STMASK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `STMASK` reader - Scan Table Mask"] -pub type STMASK_R = crate::FieldReader; +pub type StmaskR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Scan Table Mask"] #[inline(always)] - pub fn stmask(&self) -> STMASK_R { - STMASK_R::new((self.bits & 0xffff) as u16) + pub fn stmask(&self) -> StmaskR { + StmaskR::new((self.bits & 0xffff) as u16) } } -#[doc = "Scan Table Mask\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [stmask](index.html) module"] -pub struct STMASK_SPEC; -impl crate::RegisterSpec for STMASK_SPEC { +#[doc = "Scan Table Mask\n\nYou can [`read`](crate::Reg::read) this register and get [`stmask::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StmaskSpec; +impl crate::RegisterSpec for StmaskSpec { type Ux = u32; } -#[doc = "`read()` method returns [stmask::R](R) reader structure"] -impl crate::Readable for STMASK_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`stmask::R`](R) reader structure"] +impl crate::Readable for StmaskSpec {} #[doc = "`reset()` method sets STMASK to value 0"] -impl crate::Resettable for STMASK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StmaskSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/timer.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/timer.rs index b913389..edab4ee 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/timer.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/timer.rs @@ -1,80 +1,40 @@ #[doc = "Register `TIMER` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TIMER` reader - Timer Period"] -pub type TIMER_R = crate::FieldReader; +pub type TimerR = crate::FieldReader; #[doc = "Field `TIMER` writer - Timer Period"] -pub type TIMER_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER_SPEC, u16, u16, 16, O>; +pub type TimerW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Timer Period"] #[inline(always)] - pub fn timer(&self) -> TIMER_R { - TIMER_R::new((self.bits & 0xffff) as u16) + pub fn timer(&self) -> TimerR { + TimerR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Timer Period"] #[inline(always)] #[must_use] - pub fn timer(&mut self) -> TIMER_W<0> { - TIMER_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn timer(&mut self) -> TimerW { + TimerW::new(self, 0) } } -#[doc = "Timer\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer](index.html) module"] -pub struct TIMER_SPEC; -impl crate::RegisterSpec for TIMER_SPEC { +#[doc = "Timer\n\nYou can [`read`](crate::Reg::read) this register and get [`timer::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TimerSpec; +impl crate::RegisterSpec for TimerSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer::R](R) reader structure"] -impl crate::Readable for TIMER_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer::W](W) writer structure"] -impl crate::Writable for TIMER_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer::R`](R) reader structure"] +impl crate::Readable for TimerSpec {} +#[doc = "`write(|w| ..)` method takes [`timer::W`](W) writer structure"] +impl crate::Writable for TimerSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER to value 0"] -impl crate::Resettable for TIMER_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TimerSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/trigger.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/trigger.rs index 0b33297..1c3158b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/trigger.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_ns/trigger.rs @@ -1,470 +1,450 @@ #[doc = "Register `TRIGGER` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TRIGGER` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SCANTRIGSEL` reader - Scan Trigger Select"] -pub type SCANTRIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Scan Trigger Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SCANTRIGSEL_A { +pub enum Scantrigsel { #[doc = "0: Immediate triggering. The scan queue will be disabled once all conversions in the scan table are complete, unless TRIGGERACTION is set to continuous."] - IMMEDIATE = 0, + Immediate = 0, #[doc = "1: Triggers when the local timer count reaches zero."] - TIMER = 1, + Timer = 1, #[doc = "2: Triggers on PRS0 from a timer module that is using the same clock group as the ADC and has been programmed to use the same clock source as the ADC. The prescale may be different between the ADC and the timer module."] - PRSCLKGRP = 2, - #[doc = "3: Triggers on asynchronous PRS0 positive edge. Requires PRS0 to go low for 3 ADC_CLKs before another positive edge can be detected. Generates an additional delay of 1 to 2 ADC_SRC_CLK cycles for synchronization."] - PRSPOS = 3, - #[doc = "4: Triggers on asynchronous PRS0 negative edge. Requires PRS0 to go high for 3 ADC_CLKs before another negative edge can be detected. Generates an additional delay of 1 to 2 ADC_SRC_CLK cycles for synchronization. PRSNEG should only be used when the trigger source is from a module that remains powered during EM23. For modules (ie: TIMER) that power down during EM23, PRSPOS should be used for an asynchronous trigger, and PRSCLKGRP should be used for a synchronous trigger."] - PRSNEG = 4, + Prsclkgrp = 2, + #[doc = "3: Triggers on asynchronous PRS0 positive edge. Requires PRS0 to go low for 3 ADC_CLKs before another positive edge can be detected. Generates an additional delay of 1 to 2 CLK_SRC_ADC cycles for synchronization."] + Prspos = 3, + #[doc = "4: Triggers on asynchronous PRS0 negative edge. Requires PRS0 to go high for 3 ADC_CLKs before another negative edge can be detected. Generates an additional delay of 1 to 2 CLK_SRC_ADC cycles for synchronization. PRSNEG should only be used when the trigger source is from a module that remains powered during EM23. For modules (ie: TIMER) that power down during EM23, PRSPOS should be used for an asynchronous trigger, and PRSCLKGRP should be used for a synchronous trigger."] + Prsneg = 4, #[doc = "5: Triggers on LESENSE convert request. When using the LESENSE for the SCAN Table, only one entry is converted per LESENSE convert request."] - LESENSE = 5, + Lesense = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SCANTRIGSEL_A) -> Self { + fn from(variant: Scantrigsel) -> Self { variant as _ } } -impl SCANTRIGSEL_R { +impl crate::FieldSpec for Scantrigsel { + type Ux = u8; +} +impl crate::IsEnum for Scantrigsel {} +#[doc = "Field `SCANTRIGSEL` reader - Scan Trigger Select"] +pub type ScantrigselR = crate::FieldReader; +impl ScantrigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SCANTRIGSEL_A::IMMEDIATE), - 1 => Some(SCANTRIGSEL_A::TIMER), - 2 => Some(SCANTRIGSEL_A::PRSCLKGRP), - 3 => Some(SCANTRIGSEL_A::PRSPOS), - 4 => Some(SCANTRIGSEL_A::PRSNEG), - 5 => Some(SCANTRIGSEL_A::LESENSE), + 0 => Some(Scantrigsel::Immediate), + 1 => Some(Scantrigsel::Timer), + 2 => Some(Scantrigsel::Prsclkgrp), + 3 => Some(Scantrigsel::Prspos), + 4 => Some(Scantrigsel::Prsneg), + 5 => Some(Scantrigsel::Lesense), _ => None, } } - #[doc = "Checks if the value of the field is `IMMEDIATE`"] + #[doc = "Immediate triggering. The scan queue will be disabled once all conversions in the scan table are complete, unless TRIGGERACTION is set to continuous."] #[inline(always)] pub fn is_immediate(&self) -> bool { - *self == SCANTRIGSEL_A::IMMEDIATE + *self == Scantrigsel::Immediate } - #[doc = "Checks if the value of the field is `TIMER`"] + #[doc = "Triggers when the local timer count reaches zero."] #[inline(always)] pub fn is_timer(&self) -> bool { - *self == SCANTRIGSEL_A::TIMER + *self == Scantrigsel::Timer } - #[doc = "Checks if the value of the field is `PRSCLKGRP`"] + #[doc = "Triggers on PRS0 from a timer module that is using the same clock group as the ADC and has been programmed to use the same clock source as the ADC. The prescale may be different between the ADC and the timer module."] #[inline(always)] pub fn is_prsclkgrp(&self) -> bool { - *self == SCANTRIGSEL_A::PRSCLKGRP + *self == Scantrigsel::Prsclkgrp } - #[doc = "Checks if the value of the field is `PRSPOS`"] + #[doc = "Triggers on asynchronous PRS0 positive edge. Requires PRS0 to go low for 3 ADC_CLKs before another positive edge can be detected. Generates an additional delay of 1 to 2 CLK_SRC_ADC cycles for synchronization."] #[inline(always)] pub fn is_prspos(&self) -> bool { - *self == SCANTRIGSEL_A::PRSPOS + *self == Scantrigsel::Prspos } - #[doc = "Checks if the value of the field is `PRSNEG`"] + #[doc = "Triggers on asynchronous PRS0 negative edge. Requires PRS0 to go high for 3 ADC_CLKs before another negative edge can be detected. Generates an additional delay of 1 to 2 CLK_SRC_ADC cycles for synchronization. PRSNEG should only be used when the trigger source is from a module that remains powered during EM23. For modules (ie: TIMER) that power down during EM23, PRSPOS should be used for an asynchronous trigger, and PRSCLKGRP should be used for a synchronous trigger."] #[inline(always)] pub fn is_prsneg(&self) -> bool { - *self == SCANTRIGSEL_A::PRSNEG + *self == Scantrigsel::Prsneg } - #[doc = "Checks if the value of the field is `LESENSE`"] + #[doc = "Triggers on LESENSE convert request. When using the LESENSE for the SCAN Table, only one entry is converted per LESENSE convert request."] #[inline(always)] pub fn is_lesense(&self) -> bool { - *self == SCANTRIGSEL_A::LESENSE + *self == Scantrigsel::Lesense } } #[doc = "Field `SCANTRIGSEL` writer - Scan Trigger Select"] -pub type SCANTRIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TRIGGER_SPEC, u8, SCANTRIGSEL_A, 3, O>; -impl<'a, const O: u8> SCANTRIGSEL_W<'a, O> { +pub type ScantrigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Scantrigsel>; +impl<'a, REG> ScantrigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Immediate triggering. The scan queue will be disabled once all conversions in the scan table are complete, unless TRIGGERACTION is set to continuous."] #[inline(always)] - pub fn immediate(self) -> &'a mut W { - self.variant(SCANTRIGSEL_A::IMMEDIATE) + pub fn immediate(self) -> &'a mut crate::W { + self.variant(Scantrigsel::Immediate) } #[doc = "Triggers when the local timer count reaches zero."] #[inline(always)] - pub fn timer(self) -> &'a mut W { - self.variant(SCANTRIGSEL_A::TIMER) + pub fn timer(self) -> &'a mut crate::W { + self.variant(Scantrigsel::Timer) } #[doc = "Triggers on PRS0 from a timer module that is using the same clock group as the ADC and has been programmed to use the same clock source as the ADC. The prescale may be different between the ADC and the timer module."] #[inline(always)] - pub fn prsclkgrp(self) -> &'a mut W { - self.variant(SCANTRIGSEL_A::PRSCLKGRP) + pub fn prsclkgrp(self) -> &'a mut crate::W { + self.variant(Scantrigsel::Prsclkgrp) } - #[doc = "Triggers on asynchronous PRS0 positive edge. Requires PRS0 to go low for 3 ADC_CLKs before another positive edge can be detected. Generates an additional delay of 1 to 2 ADC_SRC_CLK cycles for synchronization."] + #[doc = "Triggers on asynchronous PRS0 positive edge. Requires PRS0 to go low for 3 ADC_CLKs before another positive edge can be detected. Generates an additional delay of 1 to 2 CLK_SRC_ADC cycles for synchronization."] #[inline(always)] - pub fn prspos(self) -> &'a mut W { - self.variant(SCANTRIGSEL_A::PRSPOS) + pub fn prspos(self) -> &'a mut crate::W { + self.variant(Scantrigsel::Prspos) } - #[doc = "Triggers on asynchronous PRS0 negative edge. Requires PRS0 to go high for 3 ADC_CLKs before another negative edge can be detected. Generates an additional delay of 1 to 2 ADC_SRC_CLK cycles for synchronization. PRSNEG should only be used when the trigger source is from a module that remains powered during EM23. For modules (ie: TIMER) that power down during EM23, PRSPOS should be used for an asynchronous trigger, and PRSCLKGRP should be used for a synchronous trigger."] + #[doc = "Triggers on asynchronous PRS0 negative edge. Requires PRS0 to go high for 3 ADC_CLKs before another negative edge can be detected. Generates an additional delay of 1 to 2 CLK_SRC_ADC cycles for synchronization. PRSNEG should only be used when the trigger source is from a module that remains powered during EM23. For modules (ie: TIMER) that power down during EM23, PRSPOS should be used for an asynchronous trigger, and PRSCLKGRP should be used for a synchronous trigger."] #[inline(always)] - pub fn prsneg(self) -> &'a mut W { - self.variant(SCANTRIGSEL_A::PRSNEG) + pub fn prsneg(self) -> &'a mut crate::W { + self.variant(Scantrigsel::Prsneg) } #[doc = "Triggers on LESENSE convert request. When using the LESENSE for the SCAN Table, only one entry is converted per LESENSE convert request."] #[inline(always)] - pub fn lesense(self) -> &'a mut W { - self.variant(SCANTRIGSEL_A::LESENSE) + pub fn lesense(self) -> &'a mut crate::W { + self.variant(Scantrigsel::Lesense) } } -#[doc = "Field `SCANTRIGACTION` reader - Scan Trigger Action"] -pub type SCANTRIGACTION_R = crate::BitReader; #[doc = "Scan Trigger Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SCANTRIGACTION_A { +pub enum Scantrigaction { #[doc = "0: For TRIGSEL=IMMEDIATE, goes through the scan table once and disables queue. For TRIGSEL = TIMER, PRSCLKGRP, PRSPOS, PRSNEG, goes through the scan table once per trigger."] - ONCE = 0, + Once = 0, #[doc = "1: Goes through the scan table, converts each entry with a mask bit set, and puts it back into the scan queue to repeat again continuously. The queues are first come first serve. If both queues are triggered, the single queue will get to convert after each scan table completes. The scan queue will get to convert after each single conversion completes."] - CONTINUOUS = 1, + Continuous = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SCANTRIGACTION_A) -> Self { + fn from(variant: Scantrigaction) -> Self { variant as u8 != 0 } } -impl SCANTRIGACTION_R { +#[doc = "Field `SCANTRIGACTION` reader - Scan Trigger Action"] +pub type ScantrigactionR = crate::BitReader; +impl ScantrigactionR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SCANTRIGACTION_A { + pub const fn variant(&self) -> Scantrigaction { match self.bits { - false => SCANTRIGACTION_A::ONCE, - true => SCANTRIGACTION_A::CONTINUOUS, + false => Scantrigaction::Once, + true => Scantrigaction::Continuous, } } - #[doc = "Checks if the value of the field is `ONCE`"] + #[doc = "For TRIGSEL=IMMEDIATE, goes through the scan table once and disables queue. For TRIGSEL = TIMER, PRSCLKGRP, PRSPOS, PRSNEG, goes through the scan table once per trigger."] #[inline(always)] pub fn is_once(&self) -> bool { - *self == SCANTRIGACTION_A::ONCE + *self == Scantrigaction::Once } - #[doc = "Checks if the value of the field is `CONTINUOUS`"] + #[doc = "Goes through the scan table, converts each entry with a mask bit set, and puts it back into the scan queue to repeat again continuously. The queues are first come first serve. If both queues are triggered, the single queue will get to convert after each scan table completes. The scan queue will get to convert after each single conversion completes."] #[inline(always)] pub fn is_continuous(&self) -> bool { - *self == SCANTRIGACTION_A::CONTINUOUS + *self == Scantrigaction::Continuous } } #[doc = "Field `SCANTRIGACTION` writer - Scan Trigger Action"] -pub type SCANTRIGACTION_W<'a, const O: u8> = - crate::BitWriter<'a, u32, TRIGGER_SPEC, SCANTRIGACTION_A, O>; -impl<'a, const O: u8> SCANTRIGACTION_W<'a, O> { +pub type ScantrigactionW<'a, REG> = crate::BitWriter<'a, REG, Scantrigaction>; +impl<'a, REG> ScantrigactionW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "For TRIGSEL=IMMEDIATE, goes through the scan table once and disables queue. For TRIGSEL = TIMER, PRSCLKGRP, PRSPOS, PRSNEG, goes through the scan table once per trigger."] #[inline(always)] - pub fn once(self) -> &'a mut W { - self.variant(SCANTRIGACTION_A::ONCE) + pub fn once(self) -> &'a mut crate::W { + self.variant(Scantrigaction::Once) } #[doc = "Goes through the scan table, converts each entry with a mask bit set, and puts it back into the scan queue to repeat again continuously. The queues are first come first serve. If both queues are triggered, the single queue will get to convert after each scan table completes. The scan queue will get to convert after each single conversion completes."] #[inline(always)] - pub fn continuous(self) -> &'a mut W { - self.variant(SCANTRIGACTION_A::CONTINUOUS) + pub fn continuous(self) -> &'a mut crate::W { + self.variant(Scantrigaction::Continuous) } } -#[doc = "Field `SINGLETRIGSEL` reader - Single Trigger Select"] -pub type SINGLETRIGSEL_R = crate::FieldReader; #[doc = "Single Trigger Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SINGLETRIGSEL_A { +pub enum Singletrigsel { #[doc = "0: Immediate triggering. The single queue will be disabled once the conversion is complete, unless TRIGGERACTION is set to continuous."] - IMMEDIATE = 0, + Immediate = 0, #[doc = "1: Triggers when the local timer count reaches zero."] - TIMER = 1, + Timer = 1, #[doc = "2: Triggers on PRS1 from a timer module that is using the same clock group as the ADC and has been programmed to use the same clock source as the ADC. The prescale may be different between the ADC and the timer module."] - PRSCLKGRP = 2, - #[doc = "3: Triggers on asynchronous PRS1 positive edge. Requires PRS1 to go low for 3 ADC_CLKs before another positive edge can be detected. Generates an additional delay of 1 to 2 ADC_SRC_CLK cycles for synchronization."] - PRSPOS = 3, - #[doc = "4: Triggers on asynchronous PRS1 negative edge. Requires PRS1 to go high for 3 ADC_CLKs before another negative edge can be detected. Generates an additional delay of 1 to 2 ADC_SRC_CLK cycles for synchronization. PRSNEG should only be used when the trigger source is from a module that remains powered during EM23. For modules (ie: TIMER) that power down during EM23, PRSPOS should be used for an asynchronous trigger, and PRSCLKGRP should be used for a synchronous trigger."] - PRSNEG = 4, + Prsclkgrp = 2, + #[doc = "3: Triggers on asynchronous PRS1 positive edge. Requires PRS1 to go low for 3 ADC_CLKs before another positive edge can be detected. Generates an additional delay of 1 to 2 CLK_SRC_ADC cycles for synchronization."] + Prspos = 3, + #[doc = "4: Triggers on asynchronous PRS1 negative edge. Requires PRS1 to go high for 3 ADC_CLKs before another negative edge can be detected. Generates an additional delay of 1 to 2 CLK_SRC_ADC cycles for synchronization. PRSNEG should only be used when the trigger source is from a module that remains powered during EM23. For modules (ie: TIMER) that power down during EM23, PRSPOS should be used for an asynchronous trigger, and PRSCLKGRP should be used for a synchronous trigger."] + Prsneg = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SINGLETRIGSEL_A) -> Self { + fn from(variant: Singletrigsel) -> Self { variant as _ } } -impl SINGLETRIGSEL_R { +impl crate::FieldSpec for Singletrigsel { + type Ux = u8; +} +impl crate::IsEnum for Singletrigsel {} +#[doc = "Field `SINGLETRIGSEL` reader - Single Trigger Select"] +pub type SingletrigselR = crate::FieldReader; +impl SingletrigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SINGLETRIGSEL_A::IMMEDIATE), - 1 => Some(SINGLETRIGSEL_A::TIMER), - 2 => Some(SINGLETRIGSEL_A::PRSCLKGRP), - 3 => Some(SINGLETRIGSEL_A::PRSPOS), - 4 => Some(SINGLETRIGSEL_A::PRSNEG), + 0 => Some(Singletrigsel::Immediate), + 1 => Some(Singletrigsel::Timer), + 2 => Some(Singletrigsel::Prsclkgrp), + 3 => Some(Singletrigsel::Prspos), + 4 => Some(Singletrigsel::Prsneg), _ => None, } } - #[doc = "Checks if the value of the field is `IMMEDIATE`"] + #[doc = "Immediate triggering. The single queue will be disabled once the conversion is complete, unless TRIGGERACTION is set to continuous."] #[inline(always)] pub fn is_immediate(&self) -> bool { - *self == SINGLETRIGSEL_A::IMMEDIATE + *self == Singletrigsel::Immediate } - #[doc = "Checks if the value of the field is `TIMER`"] + #[doc = "Triggers when the local timer count reaches zero."] #[inline(always)] pub fn is_timer(&self) -> bool { - *self == SINGLETRIGSEL_A::TIMER + *self == Singletrigsel::Timer } - #[doc = "Checks if the value of the field is `PRSCLKGRP`"] + #[doc = "Triggers on PRS1 from a timer module that is using the same clock group as the ADC and has been programmed to use the same clock source as the ADC. The prescale may be different between the ADC and the timer module."] #[inline(always)] pub fn is_prsclkgrp(&self) -> bool { - *self == SINGLETRIGSEL_A::PRSCLKGRP + *self == Singletrigsel::Prsclkgrp } - #[doc = "Checks if the value of the field is `PRSPOS`"] + #[doc = "Triggers on asynchronous PRS1 positive edge. Requires PRS1 to go low for 3 ADC_CLKs before another positive edge can be detected. Generates an additional delay of 1 to 2 CLK_SRC_ADC cycles for synchronization."] #[inline(always)] pub fn is_prspos(&self) -> bool { - *self == SINGLETRIGSEL_A::PRSPOS + *self == Singletrigsel::Prspos } - #[doc = "Checks if the value of the field is `PRSNEG`"] + #[doc = "Triggers on asynchronous PRS1 negative edge. Requires PRS1 to go high for 3 ADC_CLKs before another negative edge can be detected. Generates an additional delay of 1 to 2 CLK_SRC_ADC cycles for synchronization. PRSNEG should only be used when the trigger source is from a module that remains powered during EM23. For modules (ie: TIMER) that power down during EM23, PRSPOS should be used for an asynchronous trigger, and PRSCLKGRP should be used for a synchronous trigger."] #[inline(always)] pub fn is_prsneg(&self) -> bool { - *self == SINGLETRIGSEL_A::PRSNEG + *self == Singletrigsel::Prsneg } } #[doc = "Field `SINGLETRIGSEL` writer - Single Trigger Select"] -pub type SINGLETRIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TRIGGER_SPEC, u8, SINGLETRIGSEL_A, 3, O>; -impl<'a, const O: u8> SINGLETRIGSEL_W<'a, O> { +pub type SingletrigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Singletrigsel>; +impl<'a, REG> SingletrigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Immediate triggering. The single queue will be disabled once the conversion is complete, unless TRIGGERACTION is set to continuous."] #[inline(always)] - pub fn immediate(self) -> &'a mut W { - self.variant(SINGLETRIGSEL_A::IMMEDIATE) + pub fn immediate(self) -> &'a mut crate::W { + self.variant(Singletrigsel::Immediate) } #[doc = "Triggers when the local timer count reaches zero."] #[inline(always)] - pub fn timer(self) -> &'a mut W { - self.variant(SINGLETRIGSEL_A::TIMER) + pub fn timer(self) -> &'a mut crate::W { + self.variant(Singletrigsel::Timer) } #[doc = "Triggers on PRS1 from a timer module that is using the same clock group as the ADC and has been programmed to use the same clock source as the ADC. The prescale may be different between the ADC and the timer module."] #[inline(always)] - pub fn prsclkgrp(self) -> &'a mut W { - self.variant(SINGLETRIGSEL_A::PRSCLKGRP) + pub fn prsclkgrp(self) -> &'a mut crate::W { + self.variant(Singletrigsel::Prsclkgrp) } - #[doc = "Triggers on asynchronous PRS1 positive edge. Requires PRS1 to go low for 3 ADC_CLKs before another positive edge can be detected. Generates an additional delay of 1 to 2 ADC_SRC_CLK cycles for synchronization."] + #[doc = "Triggers on asynchronous PRS1 positive edge. Requires PRS1 to go low for 3 ADC_CLKs before another positive edge can be detected. Generates an additional delay of 1 to 2 CLK_SRC_ADC cycles for synchronization."] #[inline(always)] - pub fn prspos(self) -> &'a mut W { - self.variant(SINGLETRIGSEL_A::PRSPOS) + pub fn prspos(self) -> &'a mut crate::W { + self.variant(Singletrigsel::Prspos) } - #[doc = "Triggers on asynchronous PRS1 negative edge. Requires PRS1 to go high for 3 ADC_CLKs before another negative edge can be detected. Generates an additional delay of 1 to 2 ADC_SRC_CLK cycles for synchronization. PRSNEG should only be used when the trigger source is from a module that remains powered during EM23. For modules (ie: TIMER) that power down during EM23, PRSPOS should be used for an asynchronous trigger, and PRSCLKGRP should be used for a synchronous trigger."] + #[doc = "Triggers on asynchronous PRS1 negative edge. Requires PRS1 to go high for 3 ADC_CLKs before another negative edge can be detected. Generates an additional delay of 1 to 2 CLK_SRC_ADC cycles for synchronization. PRSNEG should only be used when the trigger source is from a module that remains powered during EM23. For modules (ie: TIMER) that power down during EM23, PRSPOS should be used for an asynchronous trigger, and PRSCLKGRP should be used for a synchronous trigger."] #[inline(always)] - pub fn prsneg(self) -> &'a mut W { - self.variant(SINGLETRIGSEL_A::PRSNEG) + pub fn prsneg(self) -> &'a mut crate::W { + self.variant(Singletrigsel::Prsneg) } } -#[doc = "Field `SINGLETRIGACTION` reader - Single Trigger Action"] -pub type SINGLETRIGACTION_R = crate::BitReader; #[doc = "Single Trigger Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SINGLETRIGACTION_A { +pub enum Singletrigaction { #[doc = "0: For TRIGSEL=IMMEDIATE, converts the single queue once and disables queue. For TRIGSEL = TIMER, PRSCLKGRP, PRSPOS, PRSNEG, converts the single queue once per trigger."] - ONCE = 0, + Once = 0, #[doc = "1: Converts the single queue, then checks for a pending scan queue before converting the single queue again continuously. The queues are first come first serve. If both queues are continuous, the IADC alternates between them."] - CONTINUOUS = 1, + Continuous = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SINGLETRIGACTION_A) -> Self { + fn from(variant: Singletrigaction) -> Self { variant as u8 != 0 } } -impl SINGLETRIGACTION_R { +#[doc = "Field `SINGLETRIGACTION` reader - Single Trigger Action"] +pub type SingletrigactionR = crate::BitReader; +impl SingletrigactionR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SINGLETRIGACTION_A { + pub const fn variant(&self) -> Singletrigaction { match self.bits { - false => SINGLETRIGACTION_A::ONCE, - true => SINGLETRIGACTION_A::CONTINUOUS, + false => Singletrigaction::Once, + true => Singletrigaction::Continuous, } } - #[doc = "Checks if the value of the field is `ONCE`"] + #[doc = "For TRIGSEL=IMMEDIATE, converts the single queue once and disables queue. For TRIGSEL = TIMER, PRSCLKGRP, PRSPOS, PRSNEG, converts the single queue once per trigger."] #[inline(always)] pub fn is_once(&self) -> bool { - *self == SINGLETRIGACTION_A::ONCE + *self == Singletrigaction::Once } - #[doc = "Checks if the value of the field is `CONTINUOUS`"] + #[doc = "Converts the single queue, then checks for a pending scan queue before converting the single queue again continuously. The queues are first come first serve. If both queues are continuous, the IADC alternates between them."] #[inline(always)] pub fn is_continuous(&self) -> bool { - *self == SINGLETRIGACTION_A::CONTINUOUS + *self == Singletrigaction::Continuous } } #[doc = "Field `SINGLETRIGACTION` writer - Single Trigger Action"] -pub type SINGLETRIGACTION_W<'a, const O: u8> = - crate::BitWriter<'a, u32, TRIGGER_SPEC, SINGLETRIGACTION_A, O>; -impl<'a, const O: u8> SINGLETRIGACTION_W<'a, O> { +pub type SingletrigactionW<'a, REG> = crate::BitWriter<'a, REG, Singletrigaction>; +impl<'a, REG> SingletrigactionW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "For TRIGSEL=IMMEDIATE, converts the single queue once and disables queue. For TRIGSEL = TIMER, PRSCLKGRP, PRSPOS, PRSNEG, converts the single queue once per trigger."] #[inline(always)] - pub fn once(self) -> &'a mut W { - self.variant(SINGLETRIGACTION_A::ONCE) + pub fn once(self) -> &'a mut crate::W { + self.variant(Singletrigaction::Once) } #[doc = "Converts the single queue, then checks for a pending scan queue before converting the single queue again continuously. The queues are first come first serve. If both queues are continuous, the IADC alternates between them."] #[inline(always)] - pub fn continuous(self) -> &'a mut W { - self.variant(SINGLETRIGACTION_A::CONTINUOUS) + pub fn continuous(self) -> &'a mut crate::W { + self.variant(Singletrigaction::Continuous) } } -#[doc = "Field `SINGLETAILGATE` reader - Single Tailgate Enable"] -pub type SINGLETAILGATE_R = crate::BitReader; #[doc = "Single Tailgate Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SINGLETAILGATE_A { +pub enum Singletailgate { #[doc = "0: The single queue is ready to start warming up and converting once the trigger had been detected."] - TAILGATEOFF = 0, + Tailgateoff = 0, #[doc = "1: After the single queue's trigger is detected, it must wait until the end of a scan operation before the Single queue can be converted."] - TAILGATEON = 1, + Tailgateon = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SINGLETAILGATE_A) -> Self { + fn from(variant: Singletailgate) -> Self { variant as u8 != 0 } } -impl SINGLETAILGATE_R { +#[doc = "Field `SINGLETAILGATE` reader - Single Tailgate Enable"] +pub type SingletailgateR = crate::BitReader; +impl SingletailgateR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SINGLETAILGATE_A { + pub const fn variant(&self) -> Singletailgate { match self.bits { - false => SINGLETAILGATE_A::TAILGATEOFF, - true => SINGLETAILGATE_A::TAILGATEON, + false => Singletailgate::Tailgateoff, + true => Singletailgate::Tailgateon, } } - #[doc = "Checks if the value of the field is `TAILGATEOFF`"] + #[doc = "The single queue is ready to start warming up and converting once the trigger had been detected."] #[inline(always)] pub fn is_tailgateoff(&self) -> bool { - *self == SINGLETAILGATE_A::TAILGATEOFF + *self == Singletailgate::Tailgateoff } - #[doc = "Checks if the value of the field is `TAILGATEON`"] + #[doc = "After the single queue's trigger is detected, it must wait until the end of a scan operation before the Single queue can be converted."] #[inline(always)] pub fn is_tailgateon(&self) -> bool { - *self == SINGLETAILGATE_A::TAILGATEON + *self == Singletailgate::Tailgateon } } #[doc = "Field `SINGLETAILGATE` writer - Single Tailgate Enable"] -pub type SINGLETAILGATE_W<'a, const O: u8> = - crate::BitWriter<'a, u32, TRIGGER_SPEC, SINGLETAILGATE_A, O>; -impl<'a, const O: u8> SINGLETAILGATE_W<'a, O> { +pub type SingletailgateW<'a, REG> = crate::BitWriter<'a, REG, Singletailgate>; +impl<'a, REG> SingletailgateW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The single queue is ready to start warming up and converting once the trigger had been detected."] #[inline(always)] - pub fn tailgateoff(self) -> &'a mut W { - self.variant(SINGLETAILGATE_A::TAILGATEOFF) + pub fn tailgateoff(self) -> &'a mut crate::W { + self.variant(Singletailgate::Tailgateoff) } #[doc = "After the single queue's trigger is detected, it must wait until the end of a scan operation before the Single queue can be converted."] #[inline(always)] - pub fn tailgateon(self) -> &'a mut W { - self.variant(SINGLETAILGATE_A::TAILGATEON) + pub fn tailgateon(self) -> &'a mut crate::W { + self.variant(Singletailgate::Tailgateon) } } impl R { #[doc = "Bits 0:2 - Scan Trigger Select"] #[inline(always)] - pub fn scantrigsel(&self) -> SCANTRIGSEL_R { - SCANTRIGSEL_R::new((self.bits & 7) as u8) + pub fn scantrigsel(&self) -> ScantrigselR { + ScantrigselR::new((self.bits & 7) as u8) } #[doc = "Bit 4 - Scan Trigger Action"] #[inline(always)] - pub fn scantrigaction(&self) -> SCANTRIGACTION_R { - SCANTRIGACTION_R::new(((self.bits >> 4) & 1) != 0) + pub fn scantrigaction(&self) -> ScantrigactionR { + ScantrigactionR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 8:10 - Single Trigger Select"] #[inline(always)] - pub fn singletrigsel(&self) -> SINGLETRIGSEL_R { - SINGLETRIGSEL_R::new(((self.bits >> 8) & 7) as u8) + pub fn singletrigsel(&self) -> SingletrigselR { + SingletrigselR::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bit 12 - Single Trigger Action"] #[inline(always)] - pub fn singletrigaction(&self) -> SINGLETRIGACTION_R { - SINGLETRIGACTION_R::new(((self.bits >> 12) & 1) != 0) + pub fn singletrigaction(&self) -> SingletrigactionR { + SingletrigactionR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 16 - Single Tailgate Enable"] #[inline(always)] - pub fn singletailgate(&self) -> SINGLETAILGATE_R { - SINGLETAILGATE_R::new(((self.bits >> 16) & 1) != 0) + pub fn singletailgate(&self) -> SingletailgateR { + SingletailgateR::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Scan Trigger Select"] #[inline(always)] #[must_use] - pub fn scantrigsel(&mut self) -> SCANTRIGSEL_W<0> { - SCANTRIGSEL_W::new(self) + pub fn scantrigsel(&mut self) -> ScantrigselW { + ScantrigselW::new(self, 0) } #[doc = "Bit 4 - Scan Trigger Action"] #[inline(always)] #[must_use] - pub fn scantrigaction(&mut self) -> SCANTRIGACTION_W<4> { - SCANTRIGACTION_W::new(self) + pub fn scantrigaction(&mut self) -> ScantrigactionW { + ScantrigactionW::new(self, 4) } #[doc = "Bits 8:10 - Single Trigger Select"] #[inline(always)] #[must_use] - pub fn singletrigsel(&mut self) -> SINGLETRIGSEL_W<8> { - SINGLETRIGSEL_W::new(self) + pub fn singletrigsel(&mut self) -> SingletrigselW { + SingletrigselW::new(self, 8) } #[doc = "Bit 12 - Single Trigger Action"] #[inline(always)] #[must_use] - pub fn singletrigaction(&mut self) -> SINGLETRIGACTION_W<12> { - SINGLETRIGACTION_W::new(self) + pub fn singletrigaction(&mut self) -> SingletrigactionW { + SingletrigactionW::new(self, 12) } #[doc = "Bit 16 - Single Tailgate Enable"] #[inline(always)] #[must_use] - pub fn singletailgate(&mut self) -> SINGLETAILGATE_W<16> { - SINGLETAILGATE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn singletailgate(&mut self) -> SingletailgateW { + SingletailgateW::new(self, 16) } } -#[doc = "Trigger\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [trigger](index.html) module"] -pub struct TRIGGER_SPEC; -impl crate::RegisterSpec for TRIGGER_SPEC { +#[doc = "Trigger\n\nYou can [`read`](crate::Reg::read) this register and get [`trigger::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trigger::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TriggerSpec; +impl crate::RegisterSpec for TriggerSpec { type Ux = u32; } -#[doc = "`read()` method returns [trigger::R](R) reader structure"] -impl crate::Readable for TRIGGER_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [trigger::W](W) writer structure"] -impl crate::Writable for TRIGGER_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`trigger::R`](R) reader structure"] +impl crate::Readable for TriggerSpec {} +#[doc = "`write(|w| ..)` method takes [`trigger::W`](W) writer structure"] +impl crate::Writable for TriggerSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TRIGGER to value 0"] -impl crate::Resettable for TRIGGER_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TriggerSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s.rs index 4743dca..71c7d30 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s.rs @@ -1,268 +1,528 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + ctrl: Ctrl, + cmd: Cmd, + timer: Timer, + status: Status, + maskreq: Maskreq, + stmask: Stmask, + cmpthr: Cmpthr, + if_: If, + ien: Ien, + trigger: Trigger, + _reserved12: [u8; 0x18], + cfg0: Cfg0, + _reserved13: [u8; 0x04], + scale0: Scale0, + sched0: Sched0, + cfg1: Cfg1, + _reserved16: [u8; 0x04], + scale1: Scale1, + sched1: Sched1, + _reserved18: [u8; 0x08], + singlefifocfg: Singlefifocfg, + singlefifodata: Singlefifodata, + singlefifostat: Singlefifostat, + singledata: Singledata, + scanfifocfg: Scanfifocfg, + scanfifodata: Scanfifodata, + scanfifostat: Scanfifostat, + scandata: Scandata, + _reserved26: [u8; 0x08], + single: Single, + _reserved27: [u8; 0x04], + scan0: Scan0, + scan1: Scan1, + scan2: Scan2, + scan3: Scan3, + scan4: Scan4, + scan5: Scan5, + scan6: Scan6, + scan7: Scan7, + scan8: Scan8, + scan9: Scan9, + scan10: Scan10, + scan11: Scan11, + scan12: Scan12, + scan13: Scan13, + scan14: Scan14, + scan15: Scan15, +} +impl RegisterBlock { #[doc = "0x00 - IPVERSION"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - Enable"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - Control"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x0c - Command"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x10 - Timer"] - pub timer: TIMER, + #[inline(always)] + pub const fn timer(&self) -> &Timer { + &self.timer + } #[doc = "0x14 - Status"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x18 - Mask Request"] - pub maskreq: MASKREQ, + #[inline(always)] + pub const fn maskreq(&self) -> &Maskreq { + &self.maskreq + } #[doc = "0x1c - Scan Table Mask"] - pub stmask: STMASK, + #[inline(always)] + pub const fn stmask(&self) -> &Stmask { + &self.stmask + } #[doc = "0x20 - Comparator Threshold"] - pub cmpthr: CMPTHR, + #[inline(always)] + pub const fn cmpthr(&self) -> &Cmpthr { + &self.cmpthr + } #[doc = "0x24 - Interrupt Flag"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x28 - Interrupt Enable"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x2c - Trigger"] - pub trigger: TRIGGER, - _reserved12: [u8; 0x18], + #[inline(always)] + pub const fn trigger(&self) -> &Trigger { + &self.trigger + } #[doc = "0x48 - Configration"] - pub cfg0: CFG0, - _reserved13: [u8; 0x04], + #[inline(always)] + pub const fn cfg0(&self) -> &Cfg0 { + &self.cfg0 + } #[doc = "0x50 - Scale"] - pub scale0: SCALE0, + #[inline(always)] + pub const fn scale0(&self) -> &Scale0 { + &self.scale0 + } #[doc = "0x54 - Scheduling"] - pub sched0: SCHED0, + #[inline(always)] + pub const fn sched0(&self) -> &Sched0 { + &self.sched0 + } #[doc = "0x58 - Configration"] - pub cfg1: CFG1, - _reserved16: [u8; 0x04], + #[inline(always)] + pub const fn cfg1(&self) -> &Cfg1 { + &self.cfg1 + } #[doc = "0x60 - Scale"] - pub scale1: SCALE1, + #[inline(always)] + pub const fn scale1(&self) -> &Scale1 { + &self.scale1 + } #[doc = "0x64 - Scheduling"] - pub sched1: SCHED1, - _reserved18: [u8; 0x08], + #[inline(always)] + pub const fn sched1(&self) -> &Sched1 { + &self.sched1 + } #[doc = "0x70 - Single FIFO Configuration"] - pub singlefifocfg: SINGLEFIFOCFG, + #[inline(always)] + pub const fn singlefifocfg(&self) -> &Singlefifocfg { + &self.singlefifocfg + } #[doc = "0x74 - Read the oldest valid data from the single FIFO and pop the FIFO"] - pub singlefifodata: SINGLEFIFODATA, + #[inline(always)] + pub const fn singlefifodata(&self) -> &Singlefifodata { + &self.singlefifodata + } #[doc = "0x78 - Single FIFO status"] - pub singlefifostat: SINGLEFIFOSTAT, + #[inline(always)] + pub const fn singlefifostat(&self) -> &Singlefifostat { + &self.singlefifostat + } #[doc = "0x7c - latest single queue conversion data"] - pub singledata: SINGLEDATA, + #[inline(always)] + pub const fn singledata(&self) -> &Singledata { + &self.singledata + } #[doc = "0x80 - SCAN FIFO configuration"] - pub scanfifocfg: SCANFIFOCFG, + #[inline(always)] + pub const fn scanfifocfg(&self) -> &Scanfifocfg { + &self.scanfifocfg + } #[doc = "0x84 - Read the oldest valid data from the scan FIFO and pop the FIFO"] - pub scanfifodata: SCANFIFODATA, + #[inline(always)] + pub const fn scanfifodata(&self) -> &Scanfifodata { + &self.scanfifodata + } #[doc = "0x88 - Scan FIFO status"] - pub scanfifostat: SCANFIFOSTAT, + #[inline(always)] + pub const fn scanfifostat(&self) -> &Scanfifostat { + &self.scanfifostat + } #[doc = "0x8c - Most recent data data from scan queue conversion"] - pub scandata: SCANDATA, - _reserved26: [u8; 0x08], + #[inline(always)] + pub const fn scandata(&self) -> &Scandata { + &self.scandata + } #[doc = "0x98 - No Description"] - pub single: SINGLE, - _reserved27: [u8; 0x04], + #[inline(always)] + pub const fn single(&self) -> &Single { + &self.single + } #[doc = "0xa0 - No Description"] - pub scan0: SCAN0, + #[inline(always)] + pub const fn scan0(&self) -> &Scan0 { + &self.scan0 + } #[doc = "0xa4 - No Description"] - pub scan1: SCAN1, + #[inline(always)] + pub const fn scan1(&self) -> &Scan1 { + &self.scan1 + } #[doc = "0xa8 - No Description"] - pub scan2: SCAN2, + #[inline(always)] + pub const fn scan2(&self) -> &Scan2 { + &self.scan2 + } #[doc = "0xac - No Description"] - pub scan3: SCAN3, + #[inline(always)] + pub const fn scan3(&self) -> &Scan3 { + &self.scan3 + } #[doc = "0xb0 - No Description"] - pub scan4: SCAN4, + #[inline(always)] + pub const fn scan4(&self) -> &Scan4 { + &self.scan4 + } #[doc = "0xb4 - No Description"] - pub scan5: SCAN5, + #[inline(always)] + pub const fn scan5(&self) -> &Scan5 { + &self.scan5 + } #[doc = "0xb8 - No Description"] - pub scan6: SCAN6, + #[inline(always)] + pub const fn scan6(&self) -> &Scan6 { + &self.scan6 + } #[doc = "0xbc - No Description"] - pub scan7: SCAN7, + #[inline(always)] + pub const fn scan7(&self) -> &Scan7 { + &self.scan7 + } #[doc = "0xc0 - No Description"] - pub scan8: SCAN8, + #[inline(always)] + pub const fn scan8(&self) -> &Scan8 { + &self.scan8 + } #[doc = "0xc4 - No Description"] - pub scan9: SCAN9, + #[inline(always)] + pub const fn scan9(&self) -> &Scan9 { + &self.scan9 + } #[doc = "0xc8 - No Description"] - pub scan10: SCAN10, + #[inline(always)] + pub const fn scan10(&self) -> &Scan10 { + &self.scan10 + } #[doc = "0xcc - No Description"] - pub scan11: SCAN11, + #[inline(always)] + pub const fn scan11(&self) -> &Scan11 { + &self.scan11 + } #[doc = "0xd0 - No Description"] - pub scan12: SCAN12, + #[inline(always)] + pub const fn scan12(&self) -> &Scan12 { + &self.scan12 + } #[doc = "0xd4 - No Description"] - pub scan13: SCAN13, + #[inline(always)] + pub const fn scan13(&self) -> &Scan13 { + &self.scan13 + } #[doc = "0xd8 - No Description"] - pub scan14: SCAN14, + #[inline(always)] + pub const fn scan14(&self) -> &Scan14 { + &self.scan14 + } #[doc = "0xdc - No Description"] - pub scan15: SCAN15, + #[inline(always)] + pub const fn scan15(&self) -> &Scan15 { + &self.scan15 + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: IPVERSION\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "IPVERSION"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "Enable"] pub mod en; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: Control\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "Control"] pub mod ctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: Command\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "Command"] pub mod cmd; -#[doc = "TIMER (rw) register accessor: an alias for `Reg`"] -pub type TIMER = crate::Reg; +#[doc = "TIMER (rw) register accessor: Timer\n\nYou can [`read`](crate::Reg::read) this register and get [`timer::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer`] +module"] +#[doc(alias = "TIMER")] +pub type Timer = crate::Reg; #[doc = "Timer"] pub mod timer; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: Status\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "Status"] pub mod status; -#[doc = "MASKREQ (rw) register accessor: an alias for `Reg`"] -pub type MASKREQ = crate::Reg; +#[doc = "MASKREQ (rw) register accessor: Mask Request\n\nYou can [`read`](crate::Reg::read) this register and get [`maskreq::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`maskreq::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@maskreq`] +module"] +#[doc(alias = "MASKREQ")] +pub type Maskreq = crate::Reg; #[doc = "Mask Request"] pub mod maskreq; -#[doc = "STMASK (r) register accessor: an alias for `Reg`"] -pub type STMASK = crate::Reg; +#[doc = "STMASK (r) register accessor: Scan Table Mask\n\nYou can [`read`](crate::Reg::read) this register and get [`stmask::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stmask`] +module"] +#[doc(alias = "STMASK")] +pub type Stmask = crate::Reg; #[doc = "Scan Table Mask"] pub mod stmask; -#[doc = "CMPTHR (rw) register accessor: an alias for `Reg`"] -pub type CMPTHR = crate::Reg; +#[doc = "CMPTHR (rw) register accessor: Comparator Threshold\n\nYou can [`read`](crate::Reg::read) this register and get [`cmpthr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmpthr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmpthr`] +module"] +#[doc(alias = "CMPTHR")] +pub type Cmpthr = crate::Reg; #[doc = "Comparator Threshold"] pub mod cmpthr; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: Interrupt Flag\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "Interrupt Flag"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "Interrupt Enable"] pub mod ien; -#[doc = "TRIGGER (rw) register accessor: an alias for `Reg`"] -pub type TRIGGER = crate::Reg; +#[doc = "TRIGGER (rw) register accessor: Trigger\n\nYou can [`read`](crate::Reg::read) this register and get [`trigger::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trigger::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trigger`] +module"] +#[doc(alias = "TRIGGER")] +pub type Trigger = crate::Reg; #[doc = "Trigger"] pub mod trigger; -#[doc = "CFG0 (rw) register accessor: an alias for `Reg`"] -pub type CFG0 = crate::Reg; +#[doc = "CFG0 (rw) register accessor: Configration\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg0`] +module"] +#[doc(alias = "CFG0")] +pub type Cfg0 = crate::Reg; #[doc = "Configration"] pub mod cfg0; -#[doc = "SCALE0 (rw) register accessor: an alias for `Reg`"] -pub type SCALE0 = crate::Reg; +#[doc = "SCALE0 (rw) register accessor: Scale\n\nYou can [`read`](crate::Reg::read) this register and get [`scale0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scale0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scale0`] +module"] +#[doc(alias = "SCALE0")] +pub type Scale0 = crate::Reg; #[doc = "Scale"] pub mod scale0; -#[doc = "SCHED0 (rw) register accessor: an alias for `Reg`"] -pub type SCHED0 = crate::Reg; +#[doc = "SCHED0 (rw) register accessor: Scheduling\n\nYou can [`read`](crate::Reg::read) this register and get [`sched0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sched0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sched0`] +module"] +#[doc(alias = "SCHED0")] +pub type Sched0 = crate::Reg; #[doc = "Scheduling"] pub mod sched0; -#[doc = "CFG1 (rw) register accessor: an alias for `Reg`"] -pub type CFG1 = crate::Reg; +#[doc = "CFG1 (rw) register accessor: Configration\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg1`] +module"] +#[doc(alias = "CFG1")] +pub type Cfg1 = crate::Reg; #[doc = "Configration"] pub mod cfg1; -#[doc = "SCALE1 (rw) register accessor: an alias for `Reg`"] -pub type SCALE1 = crate::Reg; +#[doc = "SCALE1 (rw) register accessor: Scale\n\nYou can [`read`](crate::Reg::read) this register and get [`scale1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scale1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scale1`] +module"] +#[doc(alias = "SCALE1")] +pub type Scale1 = crate::Reg; #[doc = "Scale"] pub mod scale1; -#[doc = "SCHED1 (rw) register accessor: an alias for `Reg`"] -pub type SCHED1 = crate::Reg; +#[doc = "SCHED1 (rw) register accessor: Scheduling\n\nYou can [`read`](crate::Reg::read) this register and get [`sched1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sched1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sched1`] +module"] +#[doc(alias = "SCHED1")] +pub type Sched1 = crate::Reg; #[doc = "Scheduling"] pub mod sched1; -#[doc = "SINGLEFIFOCFG (rw) register accessor: an alias for `Reg`"] -pub type SINGLEFIFOCFG = crate::Reg; +#[doc = "SINGLEFIFOCFG (rw) register accessor: Single FIFO Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`singlefifocfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`singlefifocfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@singlefifocfg`] +module"] +#[doc(alias = "SINGLEFIFOCFG")] +pub type Singlefifocfg = crate::Reg; #[doc = "Single FIFO Configuration"] pub mod singlefifocfg; -#[doc = "SINGLEFIFODATA (r) register accessor: an alias for `Reg`"] -pub type SINGLEFIFODATA = crate::Reg; +#[doc = "SINGLEFIFODATA (r) register accessor: Read the oldest valid data from the single FIFO and pop the FIFO\n\nYou can [`read`](crate::Reg::read) this register and get [`singlefifodata::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@singlefifodata`] +module"] +#[doc(alias = "SINGLEFIFODATA")] +pub type Singlefifodata = crate::Reg; #[doc = "Read the oldest valid data from the single FIFO and pop the FIFO"] pub mod singlefifodata; -#[doc = "SINGLEFIFOSTAT (r) register accessor: an alias for `Reg`"] -pub type SINGLEFIFOSTAT = crate::Reg; +#[doc = "SINGLEFIFOSTAT (r) register accessor: Single FIFO status\n\nYou can [`read`](crate::Reg::read) this register and get [`singlefifostat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@singlefifostat`] +module"] +#[doc(alias = "SINGLEFIFOSTAT")] +pub type Singlefifostat = crate::Reg; #[doc = "Single FIFO status"] pub mod singlefifostat; -#[doc = "SINGLEDATA (r) register accessor: an alias for `Reg`"] -pub type SINGLEDATA = crate::Reg; +#[doc = "SINGLEDATA (r) register accessor: latest single queue conversion data\n\nYou can [`read`](crate::Reg::read) this register and get [`singledata::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@singledata`] +module"] +#[doc(alias = "SINGLEDATA")] +pub type Singledata = crate::Reg; #[doc = "latest single queue conversion data"] pub mod singledata; -#[doc = "SCANFIFOCFG (rw) register accessor: an alias for `Reg`"] -pub type SCANFIFOCFG = crate::Reg; +#[doc = "SCANFIFOCFG (rw) register accessor: SCAN FIFO configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`scanfifocfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scanfifocfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scanfifocfg`] +module"] +#[doc(alias = "SCANFIFOCFG")] +pub type Scanfifocfg = crate::Reg; #[doc = "SCAN FIFO configuration"] pub mod scanfifocfg; -#[doc = "SCANFIFODATA (r) register accessor: an alias for `Reg`"] -pub type SCANFIFODATA = crate::Reg; +#[doc = "SCANFIFODATA (r) register accessor: Read the oldest valid data from the scan FIFO and pop the FIFO\n\nYou can [`read`](crate::Reg::read) this register and get [`scanfifodata::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scanfifodata`] +module"] +#[doc(alias = "SCANFIFODATA")] +pub type Scanfifodata = crate::Reg; #[doc = "Read the oldest valid data from the scan FIFO and pop the FIFO"] pub mod scanfifodata; -#[doc = "SCANFIFOSTAT (r) register accessor: an alias for `Reg`"] -pub type SCANFIFOSTAT = crate::Reg; +#[doc = "SCANFIFOSTAT (r) register accessor: Scan FIFO status\n\nYou can [`read`](crate::Reg::read) this register and get [`scanfifostat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scanfifostat`] +module"] +#[doc(alias = "SCANFIFOSTAT")] +pub type Scanfifostat = crate::Reg; #[doc = "Scan FIFO status"] pub mod scanfifostat; -#[doc = "SCANDATA (r) register accessor: an alias for `Reg`"] -pub type SCANDATA = crate::Reg; +#[doc = "SCANDATA (r) register accessor: Most recent data data from scan queue conversion\n\nYou can [`read`](crate::Reg::read) this register and get [`scandata::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scandata`] +module"] +#[doc(alias = "SCANDATA")] +pub type Scandata = crate::Reg; #[doc = "Most recent data data from scan queue conversion"] pub mod scandata; -#[doc = "SINGLE (rw) register accessor: an alias for `Reg`"] -pub type SINGLE = crate::Reg; +#[doc = "SINGLE (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`single::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`single::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@single`] +module"] +#[doc(alias = "SINGLE")] +pub type Single = crate::Reg; #[doc = "No Description"] pub mod single; -#[doc = "SCAN0 (rw) register accessor: an alias for `Reg`"] -pub type SCAN0 = crate::Reg; +#[doc = "SCAN0 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan0`] +module"] +#[doc(alias = "SCAN0")] +pub type Scan0 = crate::Reg; #[doc = "No Description"] pub mod scan0; -#[doc = "SCAN1 (rw) register accessor: an alias for `Reg`"] -pub type SCAN1 = crate::Reg; +#[doc = "SCAN1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan1`] +module"] +#[doc(alias = "SCAN1")] +pub type Scan1 = crate::Reg; #[doc = "No Description"] pub mod scan1; -#[doc = "SCAN2 (rw) register accessor: an alias for `Reg`"] -pub type SCAN2 = crate::Reg; +#[doc = "SCAN2 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan2`] +module"] +#[doc(alias = "SCAN2")] +pub type Scan2 = crate::Reg; #[doc = "No Description"] pub mod scan2; -#[doc = "SCAN3 (rw) register accessor: an alias for `Reg`"] -pub type SCAN3 = crate::Reg; +#[doc = "SCAN3 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan3`] +module"] +#[doc(alias = "SCAN3")] +pub type Scan3 = crate::Reg; #[doc = "No Description"] pub mod scan3; -#[doc = "SCAN4 (rw) register accessor: an alias for `Reg`"] -pub type SCAN4 = crate::Reg; +#[doc = "SCAN4 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan4`] +module"] +#[doc(alias = "SCAN4")] +pub type Scan4 = crate::Reg; #[doc = "No Description"] pub mod scan4; -#[doc = "SCAN5 (rw) register accessor: an alias for `Reg`"] -pub type SCAN5 = crate::Reg; +#[doc = "SCAN5 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan5`] +module"] +#[doc(alias = "SCAN5")] +pub type Scan5 = crate::Reg; #[doc = "No Description"] pub mod scan5; -#[doc = "SCAN6 (rw) register accessor: an alias for `Reg`"] -pub type SCAN6 = crate::Reg; +#[doc = "SCAN6 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan6`] +module"] +#[doc(alias = "SCAN6")] +pub type Scan6 = crate::Reg; #[doc = "No Description"] pub mod scan6; -#[doc = "SCAN7 (rw) register accessor: an alias for `Reg`"] -pub type SCAN7 = crate::Reg; +#[doc = "SCAN7 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan7`] +module"] +#[doc(alias = "SCAN7")] +pub type Scan7 = crate::Reg; #[doc = "No Description"] pub mod scan7; -#[doc = "SCAN8 (rw) register accessor: an alias for `Reg`"] -pub type SCAN8 = crate::Reg; +#[doc = "SCAN8 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan8`] +module"] +#[doc(alias = "SCAN8")] +pub type Scan8 = crate::Reg; #[doc = "No Description"] pub mod scan8; -#[doc = "SCAN9 (rw) register accessor: an alias for `Reg`"] -pub type SCAN9 = crate::Reg; +#[doc = "SCAN9 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan9`] +module"] +#[doc(alias = "SCAN9")] +pub type Scan9 = crate::Reg; #[doc = "No Description"] pub mod scan9; -#[doc = "SCAN10 (rw) register accessor: an alias for `Reg`"] -pub type SCAN10 = crate::Reg; +#[doc = "SCAN10 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan10`] +module"] +#[doc(alias = "SCAN10")] +pub type Scan10 = crate::Reg; #[doc = "No Description"] pub mod scan10; -#[doc = "SCAN11 (rw) register accessor: an alias for `Reg`"] -pub type SCAN11 = crate::Reg; +#[doc = "SCAN11 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan11`] +module"] +#[doc(alias = "SCAN11")] +pub type Scan11 = crate::Reg; #[doc = "No Description"] pub mod scan11; -#[doc = "SCAN12 (rw) register accessor: an alias for `Reg`"] -pub type SCAN12 = crate::Reg; +#[doc = "SCAN12 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan12`] +module"] +#[doc(alias = "SCAN12")] +pub type Scan12 = crate::Reg; #[doc = "No Description"] pub mod scan12; -#[doc = "SCAN13 (rw) register accessor: an alias for `Reg`"] -pub type SCAN13 = crate::Reg; +#[doc = "SCAN13 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan13`] +module"] +#[doc(alias = "SCAN13")] +pub type Scan13 = crate::Reg; #[doc = "No Description"] pub mod scan13; -#[doc = "SCAN14 (rw) register accessor: an alias for `Reg`"] -pub type SCAN14 = crate::Reg; +#[doc = "SCAN14 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan14`] +module"] +#[doc(alias = "SCAN14")] +pub type Scan14 = crate::Reg; #[doc = "No Description"] pub mod scan14; -#[doc = "SCAN15 (rw) register accessor: an alias for `Reg`"] -pub type SCAN15 = crate::Reg; +#[doc = "SCAN15 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan15::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan15::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scan15`] +module"] +#[doc(alias = "SCAN15")] +pub type Scan15 = crate::Reg; #[doc = "No Description"] pub mod scan15; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/cfg0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/cfg0.rs index ab1e35c..cc78335 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/cfg0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/cfg0.rs @@ -1,755 +1,607 @@ #[doc = "Register `CFG0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ADCMODE` reader - ADC Mode"] -pub type ADCMODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "ADC Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ADCMODE_A { - #[doc = "0: High speed mode with a maximum CLK_ADC of 10 MHz."] - NORMAL = 0, - #[doc = "1: Double high speed mode with a maximum CLK_ADC of 20 MHz. Power consumption is boosted to allow faster conversions."] - HIGHSPEED = 1, - #[doc = "2: High accuracy mode with maximum CLK_ADC of 5 MHz."] - HIGHACCURACY = 2, +pub enum Adcmode { + #[doc = "0: High speed mode with a maximum ADC_CLK of 10 MHz."] + Normal = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ADCMODE_A) -> Self { + fn from(variant: Adcmode) -> Self { variant as _ } } -impl ADCMODE_R { +impl crate::FieldSpec for Adcmode { + type Ux = u8; +} +impl crate::IsEnum for Adcmode {} +#[doc = "Field `ADCMODE` reader - ADC Mode"] +pub type AdcmodeR = crate::FieldReader; +impl AdcmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ADCMODE_A::NORMAL), - 1 => Some(ADCMODE_A::HIGHSPEED), - 2 => Some(ADCMODE_A::HIGHACCURACY), + 0 => Some(Adcmode::Normal), _ => None, } } - #[doc = "Checks if the value of the field is `NORMAL`"] + #[doc = "High speed mode with a maximum ADC_CLK of 10 MHz."] #[inline(always)] pub fn is_normal(&self) -> bool { - *self == ADCMODE_A::NORMAL - } - #[doc = "Checks if the value of the field is `HIGHSPEED`"] - #[inline(always)] - pub fn is_highspeed(&self) -> bool { - *self == ADCMODE_A::HIGHSPEED - } - #[doc = "Checks if the value of the field is `HIGHACCURACY`"] - #[inline(always)] - pub fn is_highaccuracy(&self) -> bool { - *self == ADCMODE_A::HIGHACCURACY + *self == Adcmode::Normal } } #[doc = "Field `ADCMODE` writer - ADC Mode"] -pub type ADCMODE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG0_SPEC, u8, ADCMODE_A, 2, O>; -impl<'a, const O: u8> ADCMODE_W<'a, O> { - #[doc = "High speed mode with a maximum CLK_ADC of 10 MHz."] +pub type AdcmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Adcmode>; +impl<'a, REG> AdcmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ + #[doc = "High speed mode with a maximum ADC_CLK of 10 MHz."] #[inline(always)] - pub fn normal(self) -> &'a mut W { - self.variant(ADCMODE_A::NORMAL) - } - #[doc = "Double high speed mode with a maximum CLK_ADC of 20 MHz. Power consumption is boosted to allow faster conversions."] - #[inline(always)] - pub fn highspeed(self) -> &'a mut W { - self.variant(ADCMODE_A::HIGHSPEED) - } - #[doc = "High accuracy mode with maximum CLK_ADC of 5 MHz."] - #[inline(always)] - pub fn highaccuracy(self) -> &'a mut W { - self.variant(ADCMODE_A::HIGHACCURACY) + pub fn normal(self) -> &'a mut crate::W { + self.variant(Adcmode::Normal) } } -#[doc = "Field `OSRHS` reader - High Speed OSR"] -pub type OSRHS_R = crate::FieldReader; #[doc = "High Speed OSR\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum OSRHS_A { +pub enum Osrhs { #[doc = "0: High speed over sampling of 2x."] - HISPD2 = 0, + Hispd2 = 0, #[doc = "1: High speed over sampling of 4x."] - HISPD4 = 1, + Hispd4 = 1, #[doc = "2: High speed over sampling of 8x."] - HISPD8 = 2, + Hispd8 = 2, #[doc = "3: High speed over sampling of 16x."] - HISPD16 = 3, + Hispd16 = 3, #[doc = "4: HIgh speed over sampling of 32x."] - HISPD32 = 4, + Hispd32 = 4, #[doc = "5: High speed over sampling of 64x."] - HISPD64 = 5, + Hispd64 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: OSRHS_A) -> Self { + fn from(variant: Osrhs) -> Self { variant as _ } } -impl OSRHS_R { +impl crate::FieldSpec for Osrhs { + type Ux = u8; +} +impl crate::IsEnum for Osrhs {} +#[doc = "Field `OSRHS` reader - High Speed OSR"] +pub type OsrhsR = crate::FieldReader; +impl OsrhsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(OSRHS_A::HISPD2), - 1 => Some(OSRHS_A::HISPD4), - 2 => Some(OSRHS_A::HISPD8), - 3 => Some(OSRHS_A::HISPD16), - 4 => Some(OSRHS_A::HISPD32), - 5 => Some(OSRHS_A::HISPD64), + 0 => Some(Osrhs::Hispd2), + 1 => Some(Osrhs::Hispd4), + 2 => Some(Osrhs::Hispd8), + 3 => Some(Osrhs::Hispd16), + 4 => Some(Osrhs::Hispd32), + 5 => Some(Osrhs::Hispd64), _ => None, } } - #[doc = "Checks if the value of the field is `HISPD2`"] + #[doc = "High speed over sampling of 2x."] #[inline(always)] pub fn is_hispd2(&self) -> bool { - *self == OSRHS_A::HISPD2 + *self == Osrhs::Hispd2 } - #[doc = "Checks if the value of the field is `HISPD4`"] + #[doc = "High speed over sampling of 4x."] #[inline(always)] pub fn is_hispd4(&self) -> bool { - *self == OSRHS_A::HISPD4 + *self == Osrhs::Hispd4 } - #[doc = "Checks if the value of the field is `HISPD8`"] + #[doc = "High speed over sampling of 8x."] #[inline(always)] pub fn is_hispd8(&self) -> bool { - *self == OSRHS_A::HISPD8 + *self == Osrhs::Hispd8 } - #[doc = "Checks if the value of the field is `HISPD16`"] + #[doc = "High speed over sampling of 16x."] #[inline(always)] pub fn is_hispd16(&self) -> bool { - *self == OSRHS_A::HISPD16 + *self == Osrhs::Hispd16 } - #[doc = "Checks if the value of the field is `HISPD32`"] + #[doc = "HIgh speed over sampling of 32x."] #[inline(always)] pub fn is_hispd32(&self) -> bool { - *self == OSRHS_A::HISPD32 + *self == Osrhs::Hispd32 } - #[doc = "Checks if the value of the field is `HISPD64`"] + #[doc = "High speed over sampling of 64x."] #[inline(always)] pub fn is_hispd64(&self) -> bool { - *self == OSRHS_A::HISPD64 + *self == Osrhs::Hispd64 } } #[doc = "Field `OSRHS` writer - High Speed OSR"] -pub type OSRHS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG0_SPEC, u8, OSRHS_A, 3, O>; -impl<'a, const O: u8> OSRHS_W<'a, O> { +pub type OsrhsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Osrhs>; +impl<'a, REG> OsrhsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "High speed over sampling of 2x."] #[inline(always)] - pub fn hispd2(self) -> &'a mut W { - self.variant(OSRHS_A::HISPD2) + pub fn hispd2(self) -> &'a mut crate::W { + self.variant(Osrhs::Hispd2) } #[doc = "High speed over sampling of 4x."] #[inline(always)] - pub fn hispd4(self) -> &'a mut W { - self.variant(OSRHS_A::HISPD4) + pub fn hispd4(self) -> &'a mut crate::W { + self.variant(Osrhs::Hispd4) } #[doc = "High speed over sampling of 8x."] #[inline(always)] - pub fn hispd8(self) -> &'a mut W { - self.variant(OSRHS_A::HISPD8) + pub fn hispd8(self) -> &'a mut crate::W { + self.variant(Osrhs::Hispd8) } #[doc = "High speed over sampling of 16x."] #[inline(always)] - pub fn hispd16(self) -> &'a mut W { - self.variant(OSRHS_A::HISPD16) + pub fn hispd16(self) -> &'a mut crate::W { + self.variant(Osrhs::Hispd16) } #[doc = "HIgh speed over sampling of 32x."] #[inline(always)] - pub fn hispd32(self) -> &'a mut W { - self.variant(OSRHS_A::HISPD32) + pub fn hispd32(self) -> &'a mut crate::W { + self.variant(Osrhs::Hispd32) } #[doc = "High speed over sampling of 64x."] #[inline(always)] - pub fn hispd64(self) -> &'a mut W { - self.variant(OSRHS_A::HISPD64) - } -} -#[doc = "Field `OSRHA` reader - High Accuracy OSR"] -pub type OSRHA_R = crate::FieldReader; -#[doc = "High Accuracy OSR\n\nValue on reset: 3"] -#[derive(Clone, Copy, Debug, PartialEq, Eq)] -#[repr(u8)] -pub enum OSRHA_A { - #[doc = "0: High accuracy over sampling of 16x."] - HIACC16 = 0, - #[doc = "1: High accuracy over sampling of 32x."] - HIACC32 = 1, - #[doc = "2: High accuracy over sampling of 64x."] - HIACC64 = 2, - #[doc = "3: High accuracy over sampling of 92x."] - HIACC92 = 3, - #[doc = "4: High accuracy over sampling of 128x."] - HIACC128 = 4, - #[doc = "5: High accuracy over sampling of 256x."] - HIACC256 = 5, -} -impl From for u8 { - #[inline(always)] - fn from(variant: OSRHA_A) -> Self { - variant as _ + pub fn hispd64(self) -> &'a mut crate::W { + self.variant(Osrhs::Hispd64) } } -impl OSRHA_R { - #[doc = "Get enumerated values variant"] - #[inline(always)] - pub fn variant(&self) -> Option { - match self.bits { - 0 => Some(OSRHA_A::HIACC16), - 1 => Some(OSRHA_A::HIACC32), - 2 => Some(OSRHA_A::HIACC64), - 3 => Some(OSRHA_A::HIACC92), - 4 => Some(OSRHA_A::HIACC128), - 5 => Some(OSRHA_A::HIACC256), - _ => None, - } - } - #[doc = "Checks if the value of the field is `HIACC16`"] - #[inline(always)] - pub fn is_hiacc16(&self) -> bool { - *self == OSRHA_A::HIACC16 - } - #[doc = "Checks if the value of the field is `HIACC32`"] - #[inline(always)] - pub fn is_hiacc32(&self) -> bool { - *self == OSRHA_A::HIACC32 - } - #[doc = "Checks if the value of the field is `HIACC64`"] - #[inline(always)] - pub fn is_hiacc64(&self) -> bool { - *self == OSRHA_A::HIACC64 - } - #[doc = "Checks if the value of the field is `HIACC92`"] - #[inline(always)] - pub fn is_hiacc92(&self) -> bool { - *self == OSRHA_A::HIACC92 - } - #[doc = "Checks if the value of the field is `HIACC128`"] - #[inline(always)] - pub fn is_hiacc128(&self) -> bool { - *self == OSRHA_A::HIACC128 - } - #[doc = "Checks if the value of the field is `HIACC256`"] - #[inline(always)] - pub fn is_hiacc256(&self) -> bool { - *self == OSRHA_A::HIACC256 - } -} -#[doc = "Field `OSRHA` writer - High Accuracy OSR"] -pub type OSRHA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG0_SPEC, u8, OSRHA_A, 3, O>; -impl<'a, const O: u8> OSRHA_W<'a, O> { - #[doc = "High accuracy over sampling of 16x."] - #[inline(always)] - pub fn hiacc16(self) -> &'a mut W { - self.variant(OSRHA_A::HIACC16) - } - #[doc = "High accuracy over sampling of 32x."] - #[inline(always)] - pub fn hiacc32(self) -> &'a mut W { - self.variant(OSRHA_A::HIACC32) - } - #[doc = "High accuracy over sampling of 64x."] - #[inline(always)] - pub fn hiacc64(self) -> &'a mut W { - self.variant(OSRHA_A::HIACC64) - } - #[doc = "High accuracy over sampling of 92x."] - #[inline(always)] - pub fn hiacc92(self) -> &'a mut W { - self.variant(OSRHA_A::HIACC92) - } - #[doc = "High accuracy over sampling of 128x."] - #[inline(always)] - pub fn hiacc128(self) -> &'a mut W { - self.variant(OSRHA_A::HIACC128) - } - #[doc = "High accuracy over sampling of 256x."] - #[inline(always)] - pub fn hiacc256(self) -> &'a mut W { - self.variant(OSRHA_A::HIACC256) - } -} -#[doc = "Field `ANALOGGAIN` reader - Analog Gain"] -pub type ANALOGGAIN_R = crate::FieldReader; #[doc = "Analog Gain\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ANALOGGAIN_A { +pub enum Analoggain { #[doc = "1: Analog gain of 0.5x."] - ANAGAIN0P5 = 1, + Anagain0p5 = 1, #[doc = "2: Analog gain of 1x."] - ANAGAIN1 = 2, + Anagain1 = 2, #[doc = "3: Analog gain of 2x."] - ANAGAIN2 = 3, + Anagain2 = 3, #[doc = "4: Analog gain of 3x."] - ANAGAIN3 = 4, + Anagain3 = 4, #[doc = "5: Analog gain of 4x."] - ANAGAIN4 = 5, + Anagain4 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ANALOGGAIN_A) -> Self { + fn from(variant: Analoggain) -> Self { variant as _ } } -impl ANALOGGAIN_R { +impl crate::FieldSpec for Analoggain { + type Ux = u8; +} +impl crate::IsEnum for Analoggain {} +#[doc = "Field `ANALOGGAIN` reader - Analog Gain"] +pub type AnaloggainR = crate::FieldReader; +impl AnaloggainR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(ANALOGGAIN_A::ANAGAIN0P5), - 2 => Some(ANALOGGAIN_A::ANAGAIN1), - 3 => Some(ANALOGGAIN_A::ANAGAIN2), - 4 => Some(ANALOGGAIN_A::ANAGAIN3), - 5 => Some(ANALOGGAIN_A::ANAGAIN4), + 1 => Some(Analoggain::Anagain0p5), + 2 => Some(Analoggain::Anagain1), + 3 => Some(Analoggain::Anagain2), + 4 => Some(Analoggain::Anagain3), + 5 => Some(Analoggain::Anagain4), _ => None, } } - #[doc = "Checks if the value of the field is `ANAGAIN0P5`"] + #[doc = "Analog gain of 0.5x."] #[inline(always)] pub fn is_anagain0p5(&self) -> bool { - *self == ANALOGGAIN_A::ANAGAIN0P5 + *self == Analoggain::Anagain0p5 } - #[doc = "Checks if the value of the field is `ANAGAIN1`"] + #[doc = "Analog gain of 1x."] #[inline(always)] pub fn is_anagain1(&self) -> bool { - *self == ANALOGGAIN_A::ANAGAIN1 + *self == Analoggain::Anagain1 } - #[doc = "Checks if the value of the field is `ANAGAIN2`"] + #[doc = "Analog gain of 2x."] #[inline(always)] pub fn is_anagain2(&self) -> bool { - *self == ANALOGGAIN_A::ANAGAIN2 + *self == Analoggain::Anagain2 } - #[doc = "Checks if the value of the field is `ANAGAIN3`"] + #[doc = "Analog gain of 3x."] #[inline(always)] pub fn is_anagain3(&self) -> bool { - *self == ANALOGGAIN_A::ANAGAIN3 + *self == Analoggain::Anagain3 } - #[doc = "Checks if the value of the field is `ANAGAIN4`"] + #[doc = "Analog gain of 4x."] #[inline(always)] pub fn is_anagain4(&self) -> bool { - *self == ANALOGGAIN_A::ANAGAIN4 + *self == Analoggain::Anagain4 } } #[doc = "Field `ANALOGGAIN` writer - Analog Gain"] -pub type ANALOGGAIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CFG0_SPEC, u8, ANALOGGAIN_A, 3, O>; -impl<'a, const O: u8> ANALOGGAIN_W<'a, O> { +pub type AnaloggainW<'a, REG> = crate::FieldWriter<'a, REG, 3, Analoggain>; +impl<'a, REG> AnaloggainW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Analog gain of 0.5x."] #[inline(always)] - pub fn anagain0p5(self) -> &'a mut W { - self.variant(ANALOGGAIN_A::ANAGAIN0P5) + pub fn anagain0p5(self) -> &'a mut crate::W { + self.variant(Analoggain::Anagain0p5) } #[doc = "Analog gain of 1x."] #[inline(always)] - pub fn anagain1(self) -> &'a mut W { - self.variant(ANALOGGAIN_A::ANAGAIN1) + pub fn anagain1(self) -> &'a mut crate::W { + self.variant(Analoggain::Anagain1) } #[doc = "Analog gain of 2x."] #[inline(always)] - pub fn anagain2(self) -> &'a mut W { - self.variant(ANALOGGAIN_A::ANAGAIN2) + pub fn anagain2(self) -> &'a mut crate::W { + self.variant(Analoggain::Anagain2) } #[doc = "Analog gain of 3x."] #[inline(always)] - pub fn anagain3(self) -> &'a mut W { - self.variant(ANALOGGAIN_A::ANAGAIN3) + pub fn anagain3(self) -> &'a mut crate::W { + self.variant(Analoggain::Anagain3) } #[doc = "Analog gain of 4x."] #[inline(always)] - pub fn anagain4(self) -> &'a mut W { - self.variant(ANALOGGAIN_A::ANAGAIN4) + pub fn anagain4(self) -> &'a mut crate::W { + self.variant(Analoggain::Anagain4) } } -#[doc = "Field `REFSEL` reader - Reference Select"] -pub type REFSEL_R = crate::FieldReader; #[doc = "Reference Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REFSEL_A { +pub enum Refsel { #[doc = "0: Internal 1.21 V reference."] - VBGR = 0, + Vbgr = 0, #[doc = "1: External Reference. (Calibrated for 1.25V nominal.)"] - VREF = 1, - #[doc = "2: External Reference. Supports 2.5V in high accuracy mode."] - VREF2P5 = 2, + Vref = 1, #[doc = "3: AVDD (unbuffered)"] - VDDX = 3, + Vddx = 3, #[doc = "4: AVDD (buffered) * 0.8"] - VDDX0P8BUF = 4, + Vddx0p8buf = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REFSEL_A) -> Self { + fn from(variant: Refsel) -> Self { variant as _ } } -impl REFSEL_R { +impl crate::FieldSpec for Refsel { + type Ux = u8; +} +impl crate::IsEnum for Refsel {} +#[doc = "Field `REFSEL` reader - Reference Select"] +pub type RefselR = crate::FieldReader; +impl RefselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(REFSEL_A::VBGR), - 1 => Some(REFSEL_A::VREF), - 2 => Some(REFSEL_A::VREF2P5), - 3 => Some(REFSEL_A::VDDX), - 4 => Some(REFSEL_A::VDDX0P8BUF), + 0 => Some(Refsel::Vbgr), + 1 => Some(Refsel::Vref), + 3 => Some(Refsel::Vddx), + 4 => Some(Refsel::Vddx0p8buf), _ => None, } } - #[doc = "Checks if the value of the field is `VBGR`"] + #[doc = "Internal 1.21 V reference."] #[inline(always)] pub fn is_vbgr(&self) -> bool { - *self == REFSEL_A::VBGR + *self == Refsel::Vbgr } - #[doc = "Checks if the value of the field is `VREF`"] + #[doc = "External Reference. (Calibrated for 1.25V nominal.)"] #[inline(always)] pub fn is_vref(&self) -> bool { - *self == REFSEL_A::VREF + *self == Refsel::Vref } - #[doc = "Checks if the value of the field is `VREF2P5`"] - #[inline(always)] - pub fn is_vref2p5(&self) -> bool { - *self == REFSEL_A::VREF2P5 - } - #[doc = "Checks if the value of the field is `VDDX`"] + #[doc = "AVDD (unbuffered)"] #[inline(always)] pub fn is_vddx(&self) -> bool { - *self == REFSEL_A::VDDX + *self == Refsel::Vddx } - #[doc = "Checks if the value of the field is `VDDX0P8BUF`"] + #[doc = "AVDD (buffered) * 0.8"] #[inline(always)] pub fn is_vddx0p8buf(&self) -> bool { - *self == REFSEL_A::VDDX0P8BUF + *self == Refsel::Vddx0p8buf } } #[doc = "Field `REFSEL` writer - Reference Select"] -pub type REFSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG0_SPEC, u8, REFSEL_A, 3, O>; -impl<'a, const O: u8> REFSEL_W<'a, O> { +pub type RefselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Refsel>; +impl<'a, REG> RefselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Internal 1.21 V reference."] #[inline(always)] - pub fn vbgr(self) -> &'a mut W { - self.variant(REFSEL_A::VBGR) + pub fn vbgr(self) -> &'a mut crate::W { + self.variant(Refsel::Vbgr) } #[doc = "External Reference. (Calibrated for 1.25V nominal.)"] #[inline(always)] - pub fn vref(self) -> &'a mut W { - self.variant(REFSEL_A::VREF) - } - #[doc = "External Reference. Supports 2.5V in high accuracy mode."] - #[inline(always)] - pub fn vref2p5(self) -> &'a mut W { - self.variant(REFSEL_A::VREF2P5) + pub fn vref(self) -> &'a mut crate::W { + self.variant(Refsel::Vref) } #[doc = "AVDD (unbuffered)"] #[inline(always)] - pub fn vddx(self) -> &'a mut W { - self.variant(REFSEL_A::VDDX) + pub fn vddx(self) -> &'a mut crate::W { + self.variant(Refsel::Vddx) } #[doc = "AVDD (buffered) * 0.8"] #[inline(always)] - pub fn vddx0p8buf(self) -> &'a mut W { - self.variant(REFSEL_A::VDDX0P8BUF) + pub fn vddx0p8buf(self) -> &'a mut crate::W { + self.variant(Refsel::Vddx0p8buf) } } -#[doc = "Field `DIGAVG` reader - Digital Averaging"] -pub type DIGAVG_R = crate::FieldReader; #[doc = "Digital Averaging\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DIGAVG_A { +pub enum Digavg { #[doc = "0: Collect one output word (no digital averaging)."] - AVG1 = 0, + Avg1 = 0, #[doc = "1: Collect and average 2 digital output words."] - AVG2 = 1, + Avg2 = 1, #[doc = "2: Collect and average 4 digital output words."] - AVG4 = 2, + Avg4 = 2, #[doc = "3: Collect and average 8 digital output words."] - AVG8 = 3, + Avg8 = 3, #[doc = "4: Collect and average 16 digital output words."] - AVG16 = 4, + Avg16 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DIGAVG_A) -> Self { + fn from(variant: Digavg) -> Self { variant as _ } } -impl DIGAVG_R { +impl crate::FieldSpec for Digavg { + type Ux = u8; +} +impl crate::IsEnum for Digavg {} +#[doc = "Field `DIGAVG` reader - Digital Averaging"] +pub type DigavgR = crate::FieldReader; +impl DigavgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(DIGAVG_A::AVG1), - 1 => Some(DIGAVG_A::AVG2), - 2 => Some(DIGAVG_A::AVG4), - 3 => Some(DIGAVG_A::AVG8), - 4 => Some(DIGAVG_A::AVG16), + 0 => Some(Digavg::Avg1), + 1 => Some(Digavg::Avg2), + 2 => Some(Digavg::Avg4), + 3 => Some(Digavg::Avg8), + 4 => Some(Digavg::Avg16), _ => None, } } - #[doc = "Checks if the value of the field is `AVG1`"] + #[doc = "Collect one output word (no digital averaging)."] #[inline(always)] pub fn is_avg1(&self) -> bool { - *self == DIGAVG_A::AVG1 + *self == Digavg::Avg1 } - #[doc = "Checks if the value of the field is `AVG2`"] + #[doc = "Collect and average 2 digital output words."] #[inline(always)] pub fn is_avg2(&self) -> bool { - *self == DIGAVG_A::AVG2 + *self == Digavg::Avg2 } - #[doc = "Checks if the value of the field is `AVG4`"] + #[doc = "Collect and average 4 digital output words."] #[inline(always)] pub fn is_avg4(&self) -> bool { - *self == DIGAVG_A::AVG4 + *self == Digavg::Avg4 } - #[doc = "Checks if the value of the field is `AVG8`"] + #[doc = "Collect and average 8 digital output words."] #[inline(always)] pub fn is_avg8(&self) -> bool { - *self == DIGAVG_A::AVG8 + *self == Digavg::Avg8 } - #[doc = "Checks if the value of the field is `AVG16`"] + #[doc = "Collect and average 16 digital output words."] #[inline(always)] pub fn is_avg16(&self) -> bool { - *self == DIGAVG_A::AVG16 + *self == Digavg::Avg16 } } #[doc = "Field `DIGAVG` writer - Digital Averaging"] -pub type DIGAVG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG0_SPEC, u8, DIGAVG_A, 3, O>; -impl<'a, const O: u8> DIGAVG_W<'a, O> { +pub type DigavgW<'a, REG> = crate::FieldWriter<'a, REG, 3, Digavg>; +impl<'a, REG> DigavgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Collect one output word (no digital averaging)."] #[inline(always)] - pub fn avg1(self) -> &'a mut W { - self.variant(DIGAVG_A::AVG1) + pub fn avg1(self) -> &'a mut crate::W { + self.variant(Digavg::Avg1) } #[doc = "Collect and average 2 digital output words."] #[inline(always)] - pub fn avg2(self) -> &'a mut W { - self.variant(DIGAVG_A::AVG2) + pub fn avg2(self) -> &'a mut crate::W { + self.variant(Digavg::Avg2) } #[doc = "Collect and average 4 digital output words."] #[inline(always)] - pub fn avg4(self) -> &'a mut W { - self.variant(DIGAVG_A::AVG4) + pub fn avg4(self) -> &'a mut crate::W { + self.variant(Digavg::Avg4) } #[doc = "Collect and average 8 digital output words."] #[inline(always)] - pub fn avg8(self) -> &'a mut W { - self.variant(DIGAVG_A::AVG8) + pub fn avg8(self) -> &'a mut crate::W { + self.variant(Digavg::Avg8) } #[doc = "Collect and average 16 digital output words."] #[inline(always)] - pub fn avg16(self) -> &'a mut W { - self.variant(DIGAVG_A::AVG16) + pub fn avg16(self) -> &'a mut crate::W { + self.variant(Digavg::Avg16) } } -#[doc = "Field `TWOSCOMPL` reader - Two's Complement"] -pub type TWOSCOMPL_R = crate::FieldReader; #[doc = "Two's Complement\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TWOSCOMPL_A { +pub enum Twoscompl { #[doc = "0: Automatic: Single ended measurements are reported as unipolar and differential measurements are reported as bipolar."] - AUTO = 0, + Auto = 0, #[doc = "1: Force all measurements to result in unipolar output. Negative differential numbers will saturate to 0."] - FORCEUNIPOLAR = 1, + Forceunipolar = 1, #[doc = "2: Force all measurements to result in bipolar output. Single ended measurements are half the range, but allow for small negative measurements."] - FORCEBIPOLAR = 2, + Forcebipolar = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TWOSCOMPL_A) -> Self { + fn from(variant: Twoscompl) -> Self { variant as _ } } -impl TWOSCOMPL_R { +impl crate::FieldSpec for Twoscompl { + type Ux = u8; +} +impl crate::IsEnum for Twoscompl {} +#[doc = "Field `TWOSCOMPL` reader - Two's Complement"] +pub type TwoscomplR = crate::FieldReader; +impl TwoscomplR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TWOSCOMPL_A::AUTO), - 1 => Some(TWOSCOMPL_A::FORCEUNIPOLAR), - 2 => Some(TWOSCOMPL_A::FORCEBIPOLAR), + 0 => Some(Twoscompl::Auto), + 1 => Some(Twoscompl::Forceunipolar), + 2 => Some(Twoscompl::Forcebipolar), _ => None, } } - #[doc = "Checks if the value of the field is `AUTO`"] + #[doc = "Automatic: Single ended measurements are reported as unipolar and differential measurements are reported as bipolar."] #[inline(always)] pub fn is_auto(&self) -> bool { - *self == TWOSCOMPL_A::AUTO + *self == Twoscompl::Auto } - #[doc = "Checks if the value of the field is `FORCEUNIPOLAR`"] + #[doc = "Force all measurements to result in unipolar output. Negative differential numbers will saturate to 0."] #[inline(always)] pub fn is_forceunipolar(&self) -> bool { - *self == TWOSCOMPL_A::FORCEUNIPOLAR + *self == Twoscompl::Forceunipolar } - #[doc = "Checks if the value of the field is `FORCEBIPOLAR`"] + #[doc = "Force all measurements to result in bipolar output. Single ended measurements are half the range, but allow for small negative measurements."] #[inline(always)] pub fn is_forcebipolar(&self) -> bool { - *self == TWOSCOMPL_A::FORCEBIPOLAR + *self == Twoscompl::Forcebipolar } } #[doc = "Field `TWOSCOMPL` writer - Two's Complement"] -pub type TWOSCOMPL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CFG0_SPEC, u8, TWOSCOMPL_A, 2, O>; -impl<'a, const O: u8> TWOSCOMPL_W<'a, O> { +pub type TwoscomplW<'a, REG> = crate::FieldWriter<'a, REG, 2, Twoscompl>; +impl<'a, REG> TwoscomplW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Automatic: Single ended measurements are reported as unipolar and differential measurements are reported as bipolar."] #[inline(always)] - pub fn auto(self) -> &'a mut W { - self.variant(TWOSCOMPL_A::AUTO) + pub fn auto(self) -> &'a mut crate::W { + self.variant(Twoscompl::Auto) } #[doc = "Force all measurements to result in unipolar output. Negative differential numbers will saturate to 0."] #[inline(always)] - pub fn forceunipolar(self) -> &'a mut W { - self.variant(TWOSCOMPL_A::FORCEUNIPOLAR) + pub fn forceunipolar(self) -> &'a mut crate::W { + self.variant(Twoscompl::Forceunipolar) } #[doc = "Force all measurements to result in bipolar output. Single ended measurements are half the range, but allow for small negative measurements."] #[inline(always)] - pub fn forcebipolar(self) -> &'a mut W { - self.variant(TWOSCOMPL_A::FORCEBIPOLAR) + pub fn forcebipolar(self) -> &'a mut crate::W { + self.variant(Twoscompl::Forcebipolar) } } impl R { #[doc = "Bits 0:1 - ADC Mode"] #[inline(always)] - pub fn adcmode(&self) -> ADCMODE_R { - ADCMODE_R::new((self.bits & 3) as u8) + pub fn adcmode(&self) -> AdcmodeR { + AdcmodeR::new((self.bits & 3) as u8) } #[doc = "Bits 2:4 - High Speed OSR"] #[inline(always)] - pub fn osrhs(&self) -> OSRHS_R { - OSRHS_R::new(((self.bits >> 2) & 7) as u8) - } - #[doc = "Bits 5:7 - High Accuracy OSR"] - #[inline(always)] - pub fn osrha(&self) -> OSRHA_R { - OSRHA_R::new(((self.bits >> 5) & 7) as u8) + pub fn osrhs(&self) -> OsrhsR { + OsrhsR::new(((self.bits >> 2) & 7) as u8) } #[doc = "Bits 12:14 - Analog Gain"] #[inline(always)] - pub fn analoggain(&self) -> ANALOGGAIN_R { - ANALOGGAIN_R::new(((self.bits >> 12) & 7) as u8) + pub fn analoggain(&self) -> AnaloggainR { + AnaloggainR::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Reference Select"] #[inline(always)] - pub fn refsel(&self) -> REFSEL_R { - REFSEL_R::new(((self.bits >> 16) & 7) as u8) + pub fn refsel(&self) -> RefselR { + RefselR::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 21:23 - Digital Averaging"] #[inline(always)] - pub fn digavg(&self) -> DIGAVG_R { - DIGAVG_R::new(((self.bits >> 21) & 7) as u8) + pub fn digavg(&self) -> DigavgR { + DigavgR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 28:29 - Two's Complement"] #[inline(always)] - pub fn twoscompl(&self) -> TWOSCOMPL_R { - TWOSCOMPL_R::new(((self.bits >> 28) & 3) as u8) + pub fn twoscompl(&self) -> TwoscomplR { + TwoscomplR::new(((self.bits >> 28) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - ADC Mode"] #[inline(always)] #[must_use] - pub fn adcmode(&mut self) -> ADCMODE_W<0> { - ADCMODE_W::new(self) + pub fn adcmode(&mut self) -> AdcmodeW { + AdcmodeW::new(self, 0) } #[doc = "Bits 2:4 - High Speed OSR"] #[inline(always)] #[must_use] - pub fn osrhs(&mut self) -> OSRHS_W<2> { - OSRHS_W::new(self) - } - #[doc = "Bits 5:7 - High Accuracy OSR"] - #[inline(always)] - #[must_use] - pub fn osrha(&mut self) -> OSRHA_W<5> { - OSRHA_W::new(self) + pub fn osrhs(&mut self) -> OsrhsW { + OsrhsW::new(self, 2) } #[doc = "Bits 12:14 - Analog Gain"] #[inline(always)] #[must_use] - pub fn analoggain(&mut self) -> ANALOGGAIN_W<12> { - ANALOGGAIN_W::new(self) + pub fn analoggain(&mut self) -> AnaloggainW { + AnaloggainW::new(self, 12) } #[doc = "Bits 16:18 - Reference Select"] #[inline(always)] #[must_use] - pub fn refsel(&mut self) -> REFSEL_W<16> { - REFSEL_W::new(self) + pub fn refsel(&mut self) -> RefselW { + RefselW::new(self, 16) } #[doc = "Bits 21:23 - Digital Averaging"] #[inline(always)] #[must_use] - pub fn digavg(&mut self) -> DIGAVG_W<21> { - DIGAVG_W::new(self) + pub fn digavg(&mut self) -> DigavgW { + DigavgW::new(self, 21) } #[doc = "Bits 28:29 - Two's Complement"] #[inline(always)] #[must_use] - pub fn twoscompl(&mut self) -> TWOSCOMPL_W<28> { - TWOSCOMPL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn twoscompl(&mut self) -> TwoscomplW { + TwoscomplW::new(self, 28) } } -#[doc = "Configration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg0](index.html) module"] -pub struct CFG0_SPEC; -impl crate::RegisterSpec for CFG0_SPEC { +#[doc = "Configration\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cfg0Spec; +impl crate::RegisterSpec for Cfg0Spec { type Ux = u32; } -#[doc = "`read()` method returns [cfg0::R](R) reader structure"] -impl crate::Readable for CFG0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg0::W](W) writer structure"] -impl crate::Writable for CFG0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg0::R`](R) reader structure"] +impl crate::Readable for Cfg0Spec {} +#[doc = "`write(|w| ..)` method takes [`cfg0::W`](W) writer structure"] +impl crate::Writable for Cfg0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG0 to value 0x2060"] -impl crate::Resettable for CFG0_SPEC { - const RESET_VALUE: Self::Ux = 0x2060; +impl crate::Resettable for Cfg0Spec { + const RESET_VALUE: u32 = 0x2060; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/cfg1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/cfg1.rs index b5c4e46..39831b1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/cfg1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/cfg1.rs @@ -1,755 +1,607 @@ #[doc = "Register `CFG1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ADCMODE` reader - ADC Mode"] -pub type ADCMODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "ADC Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ADCMODE_A { - #[doc = "0: High speed mode with a maximum CLK_ADC of 10 MHz."] - NORMAL = 0, - #[doc = "1: Double high speed mode with a maximum CLK_ADC of 20 MHz. Power consumption is boosted to allow faster conversions."] - HIGHSPEED = 1, - #[doc = "2: High accuracy mode with maximum CLK_ADC of 5 MHz."] - HIGHACCURACY = 2, +pub enum Adcmode { + #[doc = "0: High speed mode with a maximum ADC_CLK of 10 MHz."] + Normal = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ADCMODE_A) -> Self { + fn from(variant: Adcmode) -> Self { variant as _ } } -impl ADCMODE_R { +impl crate::FieldSpec for Adcmode { + type Ux = u8; +} +impl crate::IsEnum for Adcmode {} +#[doc = "Field `ADCMODE` reader - ADC Mode"] +pub type AdcmodeR = crate::FieldReader; +impl AdcmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ADCMODE_A::NORMAL), - 1 => Some(ADCMODE_A::HIGHSPEED), - 2 => Some(ADCMODE_A::HIGHACCURACY), + 0 => Some(Adcmode::Normal), _ => None, } } - #[doc = "Checks if the value of the field is `NORMAL`"] + #[doc = "High speed mode with a maximum ADC_CLK of 10 MHz."] #[inline(always)] pub fn is_normal(&self) -> bool { - *self == ADCMODE_A::NORMAL - } - #[doc = "Checks if the value of the field is `HIGHSPEED`"] - #[inline(always)] - pub fn is_highspeed(&self) -> bool { - *self == ADCMODE_A::HIGHSPEED - } - #[doc = "Checks if the value of the field is `HIGHACCURACY`"] - #[inline(always)] - pub fn is_highaccuracy(&self) -> bool { - *self == ADCMODE_A::HIGHACCURACY + *self == Adcmode::Normal } } #[doc = "Field `ADCMODE` writer - ADC Mode"] -pub type ADCMODE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG1_SPEC, u8, ADCMODE_A, 2, O>; -impl<'a, const O: u8> ADCMODE_W<'a, O> { - #[doc = "High speed mode with a maximum CLK_ADC of 10 MHz."] +pub type AdcmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Adcmode>; +impl<'a, REG> AdcmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ + #[doc = "High speed mode with a maximum ADC_CLK of 10 MHz."] #[inline(always)] - pub fn normal(self) -> &'a mut W { - self.variant(ADCMODE_A::NORMAL) - } - #[doc = "Double high speed mode with a maximum CLK_ADC of 20 MHz. Power consumption is boosted to allow faster conversions."] - #[inline(always)] - pub fn highspeed(self) -> &'a mut W { - self.variant(ADCMODE_A::HIGHSPEED) - } - #[doc = "High accuracy mode with maximum CLK_ADC of 5 MHz."] - #[inline(always)] - pub fn highaccuracy(self) -> &'a mut W { - self.variant(ADCMODE_A::HIGHACCURACY) + pub fn normal(self) -> &'a mut crate::W { + self.variant(Adcmode::Normal) } } -#[doc = "Field `OSRHS` reader - High Speed OSR"] -pub type OSRHS_R = crate::FieldReader; #[doc = "High Speed OSR\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum OSRHS_A { +pub enum Osrhs { #[doc = "0: High speed over sampling of 2x."] - HISPD2 = 0, + Hispd2 = 0, #[doc = "1: High speed over sampling of 4x."] - HISPD4 = 1, + Hispd4 = 1, #[doc = "2: High speed over sampling of 8x."] - HISPD8 = 2, + Hispd8 = 2, #[doc = "3: High speed over sampling of 16x."] - HISPD16 = 3, + Hispd16 = 3, #[doc = "4: HIgh speed over sampling of 32x."] - HISPD32 = 4, + Hispd32 = 4, #[doc = "5: High speed over sampling of 64x."] - HISPD64 = 5, + Hispd64 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: OSRHS_A) -> Self { + fn from(variant: Osrhs) -> Self { variant as _ } } -impl OSRHS_R { +impl crate::FieldSpec for Osrhs { + type Ux = u8; +} +impl crate::IsEnum for Osrhs {} +#[doc = "Field `OSRHS` reader - High Speed OSR"] +pub type OsrhsR = crate::FieldReader; +impl OsrhsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(OSRHS_A::HISPD2), - 1 => Some(OSRHS_A::HISPD4), - 2 => Some(OSRHS_A::HISPD8), - 3 => Some(OSRHS_A::HISPD16), - 4 => Some(OSRHS_A::HISPD32), - 5 => Some(OSRHS_A::HISPD64), + 0 => Some(Osrhs::Hispd2), + 1 => Some(Osrhs::Hispd4), + 2 => Some(Osrhs::Hispd8), + 3 => Some(Osrhs::Hispd16), + 4 => Some(Osrhs::Hispd32), + 5 => Some(Osrhs::Hispd64), _ => None, } } - #[doc = "Checks if the value of the field is `HISPD2`"] + #[doc = "High speed over sampling of 2x."] #[inline(always)] pub fn is_hispd2(&self) -> bool { - *self == OSRHS_A::HISPD2 + *self == Osrhs::Hispd2 } - #[doc = "Checks if the value of the field is `HISPD4`"] + #[doc = "High speed over sampling of 4x."] #[inline(always)] pub fn is_hispd4(&self) -> bool { - *self == OSRHS_A::HISPD4 + *self == Osrhs::Hispd4 } - #[doc = "Checks if the value of the field is `HISPD8`"] + #[doc = "High speed over sampling of 8x."] #[inline(always)] pub fn is_hispd8(&self) -> bool { - *self == OSRHS_A::HISPD8 + *self == Osrhs::Hispd8 } - #[doc = "Checks if the value of the field is `HISPD16`"] + #[doc = "High speed over sampling of 16x."] #[inline(always)] pub fn is_hispd16(&self) -> bool { - *self == OSRHS_A::HISPD16 + *self == Osrhs::Hispd16 } - #[doc = "Checks if the value of the field is `HISPD32`"] + #[doc = "HIgh speed over sampling of 32x."] #[inline(always)] pub fn is_hispd32(&self) -> bool { - *self == OSRHS_A::HISPD32 + *self == Osrhs::Hispd32 } - #[doc = "Checks if the value of the field is `HISPD64`"] + #[doc = "High speed over sampling of 64x."] #[inline(always)] pub fn is_hispd64(&self) -> bool { - *self == OSRHS_A::HISPD64 + *self == Osrhs::Hispd64 } } #[doc = "Field `OSRHS` writer - High Speed OSR"] -pub type OSRHS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG1_SPEC, u8, OSRHS_A, 3, O>; -impl<'a, const O: u8> OSRHS_W<'a, O> { +pub type OsrhsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Osrhs>; +impl<'a, REG> OsrhsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "High speed over sampling of 2x."] #[inline(always)] - pub fn hispd2(self) -> &'a mut W { - self.variant(OSRHS_A::HISPD2) + pub fn hispd2(self) -> &'a mut crate::W { + self.variant(Osrhs::Hispd2) } #[doc = "High speed over sampling of 4x."] #[inline(always)] - pub fn hispd4(self) -> &'a mut W { - self.variant(OSRHS_A::HISPD4) + pub fn hispd4(self) -> &'a mut crate::W { + self.variant(Osrhs::Hispd4) } #[doc = "High speed over sampling of 8x."] #[inline(always)] - pub fn hispd8(self) -> &'a mut W { - self.variant(OSRHS_A::HISPD8) + pub fn hispd8(self) -> &'a mut crate::W { + self.variant(Osrhs::Hispd8) } #[doc = "High speed over sampling of 16x."] #[inline(always)] - pub fn hispd16(self) -> &'a mut W { - self.variant(OSRHS_A::HISPD16) + pub fn hispd16(self) -> &'a mut crate::W { + self.variant(Osrhs::Hispd16) } #[doc = "HIgh speed over sampling of 32x."] #[inline(always)] - pub fn hispd32(self) -> &'a mut W { - self.variant(OSRHS_A::HISPD32) + pub fn hispd32(self) -> &'a mut crate::W { + self.variant(Osrhs::Hispd32) } #[doc = "High speed over sampling of 64x."] #[inline(always)] - pub fn hispd64(self) -> &'a mut W { - self.variant(OSRHS_A::HISPD64) - } -} -#[doc = "Field `OSRHA` reader - High Accuracy OSR"] -pub type OSRHA_R = crate::FieldReader; -#[doc = "High Accuracy OSR\n\nValue on reset: 3"] -#[derive(Clone, Copy, Debug, PartialEq, Eq)] -#[repr(u8)] -pub enum OSRHA_A { - #[doc = "0: High accuracy over sampling of 16x."] - HIACC16 = 0, - #[doc = "1: High accuracy over sampling of 32x."] - HIACC32 = 1, - #[doc = "2: High accuracy over sampling of 64x."] - HIACC64 = 2, - #[doc = "3: High accuracy over sampling of 92x."] - HIACC92 = 3, - #[doc = "4: High accuracy over sampling of 128x."] - HIACC128 = 4, - #[doc = "5: High accuracy over sampling of 256x."] - HIACC256 = 5, -} -impl From for u8 { - #[inline(always)] - fn from(variant: OSRHA_A) -> Self { - variant as _ + pub fn hispd64(self) -> &'a mut crate::W { + self.variant(Osrhs::Hispd64) } } -impl OSRHA_R { - #[doc = "Get enumerated values variant"] - #[inline(always)] - pub fn variant(&self) -> Option { - match self.bits { - 0 => Some(OSRHA_A::HIACC16), - 1 => Some(OSRHA_A::HIACC32), - 2 => Some(OSRHA_A::HIACC64), - 3 => Some(OSRHA_A::HIACC92), - 4 => Some(OSRHA_A::HIACC128), - 5 => Some(OSRHA_A::HIACC256), - _ => None, - } - } - #[doc = "Checks if the value of the field is `HIACC16`"] - #[inline(always)] - pub fn is_hiacc16(&self) -> bool { - *self == OSRHA_A::HIACC16 - } - #[doc = "Checks if the value of the field is `HIACC32`"] - #[inline(always)] - pub fn is_hiacc32(&self) -> bool { - *self == OSRHA_A::HIACC32 - } - #[doc = "Checks if the value of the field is `HIACC64`"] - #[inline(always)] - pub fn is_hiacc64(&self) -> bool { - *self == OSRHA_A::HIACC64 - } - #[doc = "Checks if the value of the field is `HIACC92`"] - #[inline(always)] - pub fn is_hiacc92(&self) -> bool { - *self == OSRHA_A::HIACC92 - } - #[doc = "Checks if the value of the field is `HIACC128`"] - #[inline(always)] - pub fn is_hiacc128(&self) -> bool { - *self == OSRHA_A::HIACC128 - } - #[doc = "Checks if the value of the field is `HIACC256`"] - #[inline(always)] - pub fn is_hiacc256(&self) -> bool { - *self == OSRHA_A::HIACC256 - } -} -#[doc = "Field `OSRHA` writer - High Accuracy OSR"] -pub type OSRHA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG1_SPEC, u8, OSRHA_A, 3, O>; -impl<'a, const O: u8> OSRHA_W<'a, O> { - #[doc = "High accuracy over sampling of 16x."] - #[inline(always)] - pub fn hiacc16(self) -> &'a mut W { - self.variant(OSRHA_A::HIACC16) - } - #[doc = "High accuracy over sampling of 32x."] - #[inline(always)] - pub fn hiacc32(self) -> &'a mut W { - self.variant(OSRHA_A::HIACC32) - } - #[doc = "High accuracy over sampling of 64x."] - #[inline(always)] - pub fn hiacc64(self) -> &'a mut W { - self.variant(OSRHA_A::HIACC64) - } - #[doc = "High accuracy over sampling of 92x."] - #[inline(always)] - pub fn hiacc92(self) -> &'a mut W { - self.variant(OSRHA_A::HIACC92) - } - #[doc = "High accuracy over sampling of 128x."] - #[inline(always)] - pub fn hiacc128(self) -> &'a mut W { - self.variant(OSRHA_A::HIACC128) - } - #[doc = "High accuracy over sampling of 256x."] - #[inline(always)] - pub fn hiacc256(self) -> &'a mut W { - self.variant(OSRHA_A::HIACC256) - } -} -#[doc = "Field `ANALOGGAIN` reader - Analog Gain"] -pub type ANALOGGAIN_R = crate::FieldReader; #[doc = "Analog Gain\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ANALOGGAIN_A { +pub enum Analoggain { #[doc = "1: Analog gain of 0.5x."] - ANAGAIN0P5 = 1, + Anagain0p5 = 1, #[doc = "2: Analog gain of 1x."] - ANAGAIN1 = 2, + Anagain1 = 2, #[doc = "3: Analog gain of 2x."] - ANAGAIN2 = 3, + Anagain2 = 3, #[doc = "4: Analog gain of 3x."] - ANAGAIN3 = 4, + Anagain3 = 4, #[doc = "5: Analog gain of 4x."] - ANAGAIN4 = 5, + Anagain4 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ANALOGGAIN_A) -> Self { + fn from(variant: Analoggain) -> Self { variant as _ } } -impl ANALOGGAIN_R { +impl crate::FieldSpec for Analoggain { + type Ux = u8; +} +impl crate::IsEnum for Analoggain {} +#[doc = "Field `ANALOGGAIN` reader - Analog Gain"] +pub type AnaloggainR = crate::FieldReader; +impl AnaloggainR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(ANALOGGAIN_A::ANAGAIN0P5), - 2 => Some(ANALOGGAIN_A::ANAGAIN1), - 3 => Some(ANALOGGAIN_A::ANAGAIN2), - 4 => Some(ANALOGGAIN_A::ANAGAIN3), - 5 => Some(ANALOGGAIN_A::ANAGAIN4), + 1 => Some(Analoggain::Anagain0p5), + 2 => Some(Analoggain::Anagain1), + 3 => Some(Analoggain::Anagain2), + 4 => Some(Analoggain::Anagain3), + 5 => Some(Analoggain::Anagain4), _ => None, } } - #[doc = "Checks if the value of the field is `ANAGAIN0P5`"] + #[doc = "Analog gain of 0.5x."] #[inline(always)] pub fn is_anagain0p5(&self) -> bool { - *self == ANALOGGAIN_A::ANAGAIN0P5 + *self == Analoggain::Anagain0p5 } - #[doc = "Checks if the value of the field is `ANAGAIN1`"] + #[doc = "Analog gain of 1x."] #[inline(always)] pub fn is_anagain1(&self) -> bool { - *self == ANALOGGAIN_A::ANAGAIN1 + *self == Analoggain::Anagain1 } - #[doc = "Checks if the value of the field is `ANAGAIN2`"] + #[doc = "Analog gain of 2x."] #[inline(always)] pub fn is_anagain2(&self) -> bool { - *self == ANALOGGAIN_A::ANAGAIN2 + *self == Analoggain::Anagain2 } - #[doc = "Checks if the value of the field is `ANAGAIN3`"] + #[doc = "Analog gain of 3x."] #[inline(always)] pub fn is_anagain3(&self) -> bool { - *self == ANALOGGAIN_A::ANAGAIN3 + *self == Analoggain::Anagain3 } - #[doc = "Checks if the value of the field is `ANAGAIN4`"] + #[doc = "Analog gain of 4x."] #[inline(always)] pub fn is_anagain4(&self) -> bool { - *self == ANALOGGAIN_A::ANAGAIN4 + *self == Analoggain::Anagain4 } } #[doc = "Field `ANALOGGAIN` writer - Analog Gain"] -pub type ANALOGGAIN_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CFG1_SPEC, u8, ANALOGGAIN_A, 3, O>; -impl<'a, const O: u8> ANALOGGAIN_W<'a, O> { +pub type AnaloggainW<'a, REG> = crate::FieldWriter<'a, REG, 3, Analoggain>; +impl<'a, REG> AnaloggainW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Analog gain of 0.5x."] #[inline(always)] - pub fn anagain0p5(self) -> &'a mut W { - self.variant(ANALOGGAIN_A::ANAGAIN0P5) + pub fn anagain0p5(self) -> &'a mut crate::W { + self.variant(Analoggain::Anagain0p5) } #[doc = "Analog gain of 1x."] #[inline(always)] - pub fn anagain1(self) -> &'a mut W { - self.variant(ANALOGGAIN_A::ANAGAIN1) + pub fn anagain1(self) -> &'a mut crate::W { + self.variant(Analoggain::Anagain1) } #[doc = "Analog gain of 2x."] #[inline(always)] - pub fn anagain2(self) -> &'a mut W { - self.variant(ANALOGGAIN_A::ANAGAIN2) + pub fn anagain2(self) -> &'a mut crate::W { + self.variant(Analoggain::Anagain2) } #[doc = "Analog gain of 3x."] #[inline(always)] - pub fn anagain3(self) -> &'a mut W { - self.variant(ANALOGGAIN_A::ANAGAIN3) + pub fn anagain3(self) -> &'a mut crate::W { + self.variant(Analoggain::Anagain3) } #[doc = "Analog gain of 4x."] #[inline(always)] - pub fn anagain4(self) -> &'a mut W { - self.variant(ANALOGGAIN_A::ANAGAIN4) + pub fn anagain4(self) -> &'a mut crate::W { + self.variant(Analoggain::Anagain4) } } -#[doc = "Field `REFSEL` reader - Reference Select"] -pub type REFSEL_R = crate::FieldReader; #[doc = "Reference Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REFSEL_A { +pub enum Refsel { #[doc = "0: Internal 1.21 V reference."] - VBGR = 0, + Vbgr = 0, #[doc = "1: External Reference. (Calibrated for 1.25V nominal.)"] - VREF = 1, - #[doc = "2: External Reference. Supports 2.5V in high accuracy mode."] - VREF2P5 = 2, + Vref = 1, #[doc = "3: AVDD (unbuffered)"] - VDDX = 3, + Vddx = 3, #[doc = "4: AVDD (buffered) * 0.8"] - VDDX0P8BUF = 4, + Vddx0p8buf = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REFSEL_A) -> Self { + fn from(variant: Refsel) -> Self { variant as _ } } -impl REFSEL_R { +impl crate::FieldSpec for Refsel { + type Ux = u8; +} +impl crate::IsEnum for Refsel {} +#[doc = "Field `REFSEL` reader - Reference Select"] +pub type RefselR = crate::FieldReader; +impl RefselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(REFSEL_A::VBGR), - 1 => Some(REFSEL_A::VREF), - 2 => Some(REFSEL_A::VREF2P5), - 3 => Some(REFSEL_A::VDDX), - 4 => Some(REFSEL_A::VDDX0P8BUF), + 0 => Some(Refsel::Vbgr), + 1 => Some(Refsel::Vref), + 3 => Some(Refsel::Vddx), + 4 => Some(Refsel::Vddx0p8buf), _ => None, } } - #[doc = "Checks if the value of the field is `VBGR`"] + #[doc = "Internal 1.21 V reference."] #[inline(always)] pub fn is_vbgr(&self) -> bool { - *self == REFSEL_A::VBGR + *self == Refsel::Vbgr } - #[doc = "Checks if the value of the field is `VREF`"] + #[doc = "External Reference. (Calibrated for 1.25V nominal.)"] #[inline(always)] pub fn is_vref(&self) -> bool { - *self == REFSEL_A::VREF + *self == Refsel::Vref } - #[doc = "Checks if the value of the field is `VREF2P5`"] - #[inline(always)] - pub fn is_vref2p5(&self) -> bool { - *self == REFSEL_A::VREF2P5 - } - #[doc = "Checks if the value of the field is `VDDX`"] + #[doc = "AVDD (unbuffered)"] #[inline(always)] pub fn is_vddx(&self) -> bool { - *self == REFSEL_A::VDDX + *self == Refsel::Vddx } - #[doc = "Checks if the value of the field is `VDDX0P8BUF`"] + #[doc = "AVDD (buffered) * 0.8"] #[inline(always)] pub fn is_vddx0p8buf(&self) -> bool { - *self == REFSEL_A::VDDX0P8BUF + *self == Refsel::Vddx0p8buf } } #[doc = "Field `REFSEL` writer - Reference Select"] -pub type REFSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG1_SPEC, u8, REFSEL_A, 3, O>; -impl<'a, const O: u8> REFSEL_W<'a, O> { +pub type RefselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Refsel>; +impl<'a, REG> RefselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Internal 1.21 V reference."] #[inline(always)] - pub fn vbgr(self) -> &'a mut W { - self.variant(REFSEL_A::VBGR) + pub fn vbgr(self) -> &'a mut crate::W { + self.variant(Refsel::Vbgr) } #[doc = "External Reference. (Calibrated for 1.25V nominal.)"] #[inline(always)] - pub fn vref(self) -> &'a mut W { - self.variant(REFSEL_A::VREF) - } - #[doc = "External Reference. Supports 2.5V in high accuracy mode."] - #[inline(always)] - pub fn vref2p5(self) -> &'a mut W { - self.variant(REFSEL_A::VREF2P5) + pub fn vref(self) -> &'a mut crate::W { + self.variant(Refsel::Vref) } #[doc = "AVDD (unbuffered)"] #[inline(always)] - pub fn vddx(self) -> &'a mut W { - self.variant(REFSEL_A::VDDX) + pub fn vddx(self) -> &'a mut crate::W { + self.variant(Refsel::Vddx) } #[doc = "AVDD (buffered) * 0.8"] #[inline(always)] - pub fn vddx0p8buf(self) -> &'a mut W { - self.variant(REFSEL_A::VDDX0P8BUF) + pub fn vddx0p8buf(self) -> &'a mut crate::W { + self.variant(Refsel::Vddx0p8buf) } } -#[doc = "Field `DIGAVG` reader - Digital Averaging"] -pub type DIGAVG_R = crate::FieldReader; #[doc = "Digital Averaging\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DIGAVG_A { +pub enum Digavg { #[doc = "0: Collect one output word (no digital averaging)."] - AVG1 = 0, + Avg1 = 0, #[doc = "1: Collect and average 2 digital output words."] - AVG2 = 1, + Avg2 = 1, #[doc = "2: Collect and average 4 digital output words."] - AVG4 = 2, + Avg4 = 2, #[doc = "3: Collect and average 8 digital output words."] - AVG8 = 3, + Avg8 = 3, #[doc = "4: Collect and average 16 digital output words."] - AVG16 = 4, + Avg16 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DIGAVG_A) -> Self { + fn from(variant: Digavg) -> Self { variant as _ } } -impl DIGAVG_R { +impl crate::FieldSpec for Digavg { + type Ux = u8; +} +impl crate::IsEnum for Digavg {} +#[doc = "Field `DIGAVG` reader - Digital Averaging"] +pub type DigavgR = crate::FieldReader; +impl DigavgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(DIGAVG_A::AVG1), - 1 => Some(DIGAVG_A::AVG2), - 2 => Some(DIGAVG_A::AVG4), - 3 => Some(DIGAVG_A::AVG8), - 4 => Some(DIGAVG_A::AVG16), + 0 => Some(Digavg::Avg1), + 1 => Some(Digavg::Avg2), + 2 => Some(Digavg::Avg4), + 3 => Some(Digavg::Avg8), + 4 => Some(Digavg::Avg16), _ => None, } } - #[doc = "Checks if the value of the field is `AVG1`"] + #[doc = "Collect one output word (no digital averaging)."] #[inline(always)] pub fn is_avg1(&self) -> bool { - *self == DIGAVG_A::AVG1 + *self == Digavg::Avg1 } - #[doc = "Checks if the value of the field is `AVG2`"] + #[doc = "Collect and average 2 digital output words."] #[inline(always)] pub fn is_avg2(&self) -> bool { - *self == DIGAVG_A::AVG2 + *self == Digavg::Avg2 } - #[doc = "Checks if the value of the field is `AVG4`"] + #[doc = "Collect and average 4 digital output words."] #[inline(always)] pub fn is_avg4(&self) -> bool { - *self == DIGAVG_A::AVG4 + *self == Digavg::Avg4 } - #[doc = "Checks if the value of the field is `AVG8`"] + #[doc = "Collect and average 8 digital output words."] #[inline(always)] pub fn is_avg8(&self) -> bool { - *self == DIGAVG_A::AVG8 + *self == Digavg::Avg8 } - #[doc = "Checks if the value of the field is `AVG16`"] + #[doc = "Collect and average 16 digital output words."] #[inline(always)] pub fn is_avg16(&self) -> bool { - *self == DIGAVG_A::AVG16 + *self == Digavg::Avg16 } } #[doc = "Field `DIGAVG` writer - Digital Averaging"] -pub type DIGAVG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG1_SPEC, u8, DIGAVG_A, 3, O>; -impl<'a, const O: u8> DIGAVG_W<'a, O> { +pub type DigavgW<'a, REG> = crate::FieldWriter<'a, REG, 3, Digavg>; +impl<'a, REG> DigavgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Collect one output word (no digital averaging)."] #[inline(always)] - pub fn avg1(self) -> &'a mut W { - self.variant(DIGAVG_A::AVG1) + pub fn avg1(self) -> &'a mut crate::W { + self.variant(Digavg::Avg1) } #[doc = "Collect and average 2 digital output words."] #[inline(always)] - pub fn avg2(self) -> &'a mut W { - self.variant(DIGAVG_A::AVG2) + pub fn avg2(self) -> &'a mut crate::W { + self.variant(Digavg::Avg2) } #[doc = "Collect and average 4 digital output words."] #[inline(always)] - pub fn avg4(self) -> &'a mut W { - self.variant(DIGAVG_A::AVG4) + pub fn avg4(self) -> &'a mut crate::W { + self.variant(Digavg::Avg4) } #[doc = "Collect and average 8 digital output words."] #[inline(always)] - pub fn avg8(self) -> &'a mut W { - self.variant(DIGAVG_A::AVG8) + pub fn avg8(self) -> &'a mut crate::W { + self.variant(Digavg::Avg8) } #[doc = "Collect and average 16 digital output words."] #[inline(always)] - pub fn avg16(self) -> &'a mut W { - self.variant(DIGAVG_A::AVG16) + pub fn avg16(self) -> &'a mut crate::W { + self.variant(Digavg::Avg16) } } -#[doc = "Field `TWOSCOMPL` reader - Two's Complement"] -pub type TWOSCOMPL_R = crate::FieldReader; #[doc = "Two's Complement\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TWOSCOMPL_A { +pub enum Twoscompl { #[doc = "0: Automatic: Single ended measurements are reported as unipolar and differential measurements are reported as bipolar."] - AUTO = 0, + Auto = 0, #[doc = "1: Force all measurements to result in unipolar output. Negative differential numbers will saturate to 0."] - FORCEUNIPOLAR = 1, + Forceunipolar = 1, #[doc = "2: Force all measurements to result in bipolar output. Single ended measurements are half the range, but allow for small negative measurements."] - FORCEBIPOLAR = 2, + Forcebipolar = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TWOSCOMPL_A) -> Self { + fn from(variant: Twoscompl) -> Self { variant as _ } } -impl TWOSCOMPL_R { +impl crate::FieldSpec for Twoscompl { + type Ux = u8; +} +impl crate::IsEnum for Twoscompl {} +#[doc = "Field `TWOSCOMPL` reader - Two's Complement"] +pub type TwoscomplR = crate::FieldReader; +impl TwoscomplR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TWOSCOMPL_A::AUTO), - 1 => Some(TWOSCOMPL_A::FORCEUNIPOLAR), - 2 => Some(TWOSCOMPL_A::FORCEBIPOLAR), + 0 => Some(Twoscompl::Auto), + 1 => Some(Twoscompl::Forceunipolar), + 2 => Some(Twoscompl::Forcebipolar), _ => None, } } - #[doc = "Checks if the value of the field is `AUTO`"] + #[doc = "Automatic: Single ended measurements are reported as unipolar and differential measurements are reported as bipolar."] #[inline(always)] pub fn is_auto(&self) -> bool { - *self == TWOSCOMPL_A::AUTO + *self == Twoscompl::Auto } - #[doc = "Checks if the value of the field is `FORCEUNIPOLAR`"] + #[doc = "Force all measurements to result in unipolar output. Negative differential numbers will saturate to 0."] #[inline(always)] pub fn is_forceunipolar(&self) -> bool { - *self == TWOSCOMPL_A::FORCEUNIPOLAR + *self == Twoscompl::Forceunipolar } - #[doc = "Checks if the value of the field is `FORCEBIPOLAR`"] + #[doc = "Force all measurements to result in bipolar output. Single ended measurements are half the range, but allow for small negative measurements."] #[inline(always)] pub fn is_forcebipolar(&self) -> bool { - *self == TWOSCOMPL_A::FORCEBIPOLAR + *self == Twoscompl::Forcebipolar } } #[doc = "Field `TWOSCOMPL` writer - Two's Complement"] -pub type TWOSCOMPL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CFG1_SPEC, u8, TWOSCOMPL_A, 2, O>; -impl<'a, const O: u8> TWOSCOMPL_W<'a, O> { +pub type TwoscomplW<'a, REG> = crate::FieldWriter<'a, REG, 2, Twoscompl>; +impl<'a, REG> TwoscomplW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Automatic: Single ended measurements are reported as unipolar and differential measurements are reported as bipolar."] #[inline(always)] - pub fn auto(self) -> &'a mut W { - self.variant(TWOSCOMPL_A::AUTO) + pub fn auto(self) -> &'a mut crate::W { + self.variant(Twoscompl::Auto) } #[doc = "Force all measurements to result in unipolar output. Negative differential numbers will saturate to 0."] #[inline(always)] - pub fn forceunipolar(self) -> &'a mut W { - self.variant(TWOSCOMPL_A::FORCEUNIPOLAR) + pub fn forceunipolar(self) -> &'a mut crate::W { + self.variant(Twoscompl::Forceunipolar) } #[doc = "Force all measurements to result in bipolar output. Single ended measurements are half the range, but allow for small negative measurements."] #[inline(always)] - pub fn forcebipolar(self) -> &'a mut W { - self.variant(TWOSCOMPL_A::FORCEBIPOLAR) + pub fn forcebipolar(self) -> &'a mut crate::W { + self.variant(Twoscompl::Forcebipolar) } } impl R { #[doc = "Bits 0:1 - ADC Mode"] #[inline(always)] - pub fn adcmode(&self) -> ADCMODE_R { - ADCMODE_R::new((self.bits & 3) as u8) + pub fn adcmode(&self) -> AdcmodeR { + AdcmodeR::new((self.bits & 3) as u8) } #[doc = "Bits 2:4 - High Speed OSR"] #[inline(always)] - pub fn osrhs(&self) -> OSRHS_R { - OSRHS_R::new(((self.bits >> 2) & 7) as u8) - } - #[doc = "Bits 5:7 - High Accuracy OSR"] - #[inline(always)] - pub fn osrha(&self) -> OSRHA_R { - OSRHA_R::new(((self.bits >> 5) & 7) as u8) + pub fn osrhs(&self) -> OsrhsR { + OsrhsR::new(((self.bits >> 2) & 7) as u8) } #[doc = "Bits 12:14 - Analog Gain"] #[inline(always)] - pub fn analoggain(&self) -> ANALOGGAIN_R { - ANALOGGAIN_R::new(((self.bits >> 12) & 7) as u8) + pub fn analoggain(&self) -> AnaloggainR { + AnaloggainR::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Reference Select"] #[inline(always)] - pub fn refsel(&self) -> REFSEL_R { - REFSEL_R::new(((self.bits >> 16) & 7) as u8) + pub fn refsel(&self) -> RefselR { + RefselR::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 21:23 - Digital Averaging"] #[inline(always)] - pub fn digavg(&self) -> DIGAVG_R { - DIGAVG_R::new(((self.bits >> 21) & 7) as u8) + pub fn digavg(&self) -> DigavgR { + DigavgR::new(((self.bits >> 21) & 7) as u8) } #[doc = "Bits 28:29 - Two's Complement"] #[inline(always)] - pub fn twoscompl(&self) -> TWOSCOMPL_R { - TWOSCOMPL_R::new(((self.bits >> 28) & 3) as u8) + pub fn twoscompl(&self) -> TwoscomplR { + TwoscomplR::new(((self.bits >> 28) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - ADC Mode"] #[inline(always)] #[must_use] - pub fn adcmode(&mut self) -> ADCMODE_W<0> { - ADCMODE_W::new(self) + pub fn adcmode(&mut self) -> AdcmodeW { + AdcmodeW::new(self, 0) } #[doc = "Bits 2:4 - High Speed OSR"] #[inline(always)] #[must_use] - pub fn osrhs(&mut self) -> OSRHS_W<2> { - OSRHS_W::new(self) - } - #[doc = "Bits 5:7 - High Accuracy OSR"] - #[inline(always)] - #[must_use] - pub fn osrha(&mut self) -> OSRHA_W<5> { - OSRHA_W::new(self) + pub fn osrhs(&mut self) -> OsrhsW { + OsrhsW::new(self, 2) } #[doc = "Bits 12:14 - Analog Gain"] #[inline(always)] #[must_use] - pub fn analoggain(&mut self) -> ANALOGGAIN_W<12> { - ANALOGGAIN_W::new(self) + pub fn analoggain(&mut self) -> AnaloggainW { + AnaloggainW::new(self, 12) } #[doc = "Bits 16:18 - Reference Select"] #[inline(always)] #[must_use] - pub fn refsel(&mut self) -> REFSEL_W<16> { - REFSEL_W::new(self) + pub fn refsel(&mut self) -> RefselW { + RefselW::new(self, 16) } #[doc = "Bits 21:23 - Digital Averaging"] #[inline(always)] #[must_use] - pub fn digavg(&mut self) -> DIGAVG_W<21> { - DIGAVG_W::new(self) + pub fn digavg(&mut self) -> DigavgW { + DigavgW::new(self, 21) } #[doc = "Bits 28:29 - Two's Complement"] #[inline(always)] #[must_use] - pub fn twoscompl(&mut self) -> TWOSCOMPL_W<28> { - TWOSCOMPL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn twoscompl(&mut self) -> TwoscomplW { + TwoscomplW::new(self, 28) } } -#[doc = "Configration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg1](index.html) module"] -pub struct CFG1_SPEC; -impl crate::RegisterSpec for CFG1_SPEC { +#[doc = "Configration\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cfg1Spec; +impl crate::RegisterSpec for Cfg1Spec { type Ux = u32; } -#[doc = "`read()` method returns [cfg1::R](R) reader structure"] -impl crate::Readable for CFG1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg1::W](W) writer structure"] -impl crate::Writable for CFG1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg1::R`](R) reader structure"] +impl crate::Readable for Cfg1Spec {} +#[doc = "`write(|w| ..)` method takes [`cfg1::W`](W) writer structure"] +impl crate::Writable for Cfg1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG1 to value 0x2060"] -impl crate::Resettable for CFG1_SPEC { - const RESET_VALUE: Self::Ux = 0x2060; +impl crate::Resettable for Cfg1Spec { + const RESET_VALUE: u32 = 0x2060; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/cmd.rs index bac1679..e3a5d03 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/cmd.rs @@ -1,108 +1,83 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SINGLESTART` writer - Single Queue Start"] -pub type SINGLESTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type SinglestartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SINGLESTOP` writer - Single Queue Stop"] -pub type SINGLESTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type SinglestopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANSTART` writer - Scan Queue Start"] -pub type SCANSTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type ScanstartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANSTOP` writer - Scan Queue Stop"] -pub type SCANSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type ScanstopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMEREN` writer - Timer Enable"] -pub type TIMEREN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TimerenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMERDIS` writer - Timer Disable"] -pub type TIMERDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TimerdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SINGLEFIFOFLUSH` writer - Flush the Single FIFO"] -pub type SINGLEFIFOFLUSH_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type SinglefifoflushW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANFIFOFLUSH` writer - Flush the Scan FIFO"] -pub type SCANFIFOFLUSH_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type ScanfifoflushW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Single Queue Start"] #[inline(always)] #[must_use] - pub fn singlestart(&mut self) -> SINGLESTART_W<0> { - SINGLESTART_W::new(self) + pub fn singlestart(&mut self) -> SinglestartW { + SinglestartW::new(self, 0) } #[doc = "Bit 1 - Single Queue Stop"] #[inline(always)] #[must_use] - pub fn singlestop(&mut self) -> SINGLESTOP_W<1> { - SINGLESTOP_W::new(self) + pub fn singlestop(&mut self) -> SinglestopW { + SinglestopW::new(self, 1) } #[doc = "Bit 3 - Scan Queue Start"] #[inline(always)] #[must_use] - pub fn scanstart(&mut self) -> SCANSTART_W<3> { - SCANSTART_W::new(self) + pub fn scanstart(&mut self) -> ScanstartW { + ScanstartW::new(self, 3) } #[doc = "Bit 4 - Scan Queue Stop"] #[inline(always)] #[must_use] - pub fn scanstop(&mut self) -> SCANSTOP_W<4> { - SCANSTOP_W::new(self) + pub fn scanstop(&mut self) -> ScanstopW { + ScanstopW::new(self, 4) } #[doc = "Bit 16 - Timer Enable"] #[inline(always)] #[must_use] - pub fn timeren(&mut self) -> TIMEREN_W<16> { - TIMEREN_W::new(self) + pub fn timeren(&mut self) -> TimerenW { + TimerenW::new(self, 16) } #[doc = "Bit 17 - Timer Disable"] #[inline(always)] #[must_use] - pub fn timerdis(&mut self) -> TIMERDIS_W<17> { - TIMERDIS_W::new(self) + pub fn timerdis(&mut self) -> TimerdisW { + TimerdisW::new(self, 17) } #[doc = "Bit 24 - Flush the Single FIFO"] #[inline(always)] #[must_use] - pub fn singlefifoflush(&mut self) -> SINGLEFIFOFLUSH_W<24> { - SINGLEFIFOFLUSH_W::new(self) + pub fn singlefifoflush(&mut self) -> SinglefifoflushW { + SinglefifoflushW::new(self, 24) } #[doc = "Bit 25 - Flush the Scan FIFO"] #[inline(always)] #[must_use] - pub fn scanfifoflush(&mut self) -> SCANFIFOFLUSH_W<25> { - SCANFIFOFLUSH_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn scanfifoflush(&mut self) -> ScanfifoflushW { + ScanfifoflushW::new(self, 25) } } -#[doc = "Command\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "Command\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/cmpthr.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/cmpthr.rs index 2b26093..4428ca3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/cmpthr.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/cmpthr.rs @@ -1,95 +1,55 @@ #[doc = "Register `CMPTHR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CMPTHR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ADLT` reader - ADC Less Than or Equal to Threshold"] -pub type ADLT_R = crate::FieldReader; +pub type AdltR = crate::FieldReader; #[doc = "Field `ADLT` writer - ADC Less Than or Equal to Threshold"] -pub type ADLT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CMPTHR_SPEC, u16, u16, 16, O>; +pub type AdltW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `ADGT` reader - ADC Greater Than or Equal to Threshold"] -pub type ADGT_R = crate::FieldReader; +pub type AdgtR = crate::FieldReader; #[doc = "Field `ADGT` writer - ADC Greater Than or Equal to Threshold"] -pub type ADGT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CMPTHR_SPEC, u16, u16, 16, O>; +pub type AdgtW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - ADC Less Than or Equal to Threshold"] #[inline(always)] - pub fn adlt(&self) -> ADLT_R { - ADLT_R::new((self.bits & 0xffff) as u16) + pub fn adlt(&self) -> AdltR { + AdltR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - ADC Greater Than or Equal to Threshold"] #[inline(always)] - pub fn adgt(&self) -> ADGT_R { - ADGT_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn adgt(&self) -> AdgtR { + AdgtR::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - ADC Less Than or Equal to Threshold"] #[inline(always)] #[must_use] - pub fn adlt(&mut self) -> ADLT_W<0> { - ADLT_W::new(self) + pub fn adlt(&mut self) -> AdltW { + AdltW::new(self, 0) } #[doc = "Bits 16:31 - ADC Greater Than or Equal to Threshold"] #[inline(always)] #[must_use] - pub fn adgt(&mut self) -> ADGT_W<16> { - ADGT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn adgt(&mut self) -> AdgtW { + AdgtW::new(self, 16) } } -#[doc = "Comparator Threshold\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmpthr](index.html) module"] -pub struct CMPTHR_SPEC; -impl crate::RegisterSpec for CMPTHR_SPEC { +#[doc = "Comparator Threshold\n\nYou can [`read`](crate::Reg::read) this register and get [`cmpthr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmpthr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmpthrSpec; +impl crate::RegisterSpec for CmpthrSpec { type Ux = u32; } -#[doc = "`read()` method returns [cmpthr::R](R) reader structure"] -impl crate::Readable for CMPTHR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cmpthr::W](W) writer structure"] -impl crate::Writable for CMPTHR_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cmpthr::R`](R) reader structure"] +impl crate::Readable for CmpthrSpec {} +#[doc = "`write(|w| ..)` method takes [`cmpthr::W`](W) writer structure"] +impl crate::Writable for CmpthrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMPTHR to value 0"] -impl crate::Resettable for CMPTHR_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmpthrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/ctrl.rs index 9c6c0db..3bb735d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/ctrl.rs @@ -1,494 +1,477 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EM23WUCONVERT` reader - EM23 Wakeup on Conversion"] -pub type EM23WUCONVERT_R = crate::BitReader; +pub type W = crate::W; #[doc = "EM23 Wakeup on Conversion\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EM23WUCONVERT_A { +pub enum Em23wuconvert { #[doc = "0: When using suspend mode, conversions performed in EM2 or EM3 should not wake up the DMA until the FIFO's DVL setting is reached. This saves more power for large OSR settings or infrequent sampling."] - WUDVL = 0, + Wudvl = 0, #[doc = "1: When using suspend mode, conversions performed in EM2 or EM3 will wake up the DMA and keep it awake until the conversions are done, regardless of the DVL setting. This mode burns more power, but it is useful when the conversion rate is faster than the time for the DMA to cycle through wake up and going back to sleep as it converts more than 4 scan table entries. Without using the wake up on conversion mode, the FIFO may overflow while the DMA is going in and out of sleep."] - WUCONVERT = 1, + Wuconvert = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EM23WUCONVERT_A) -> Self { + fn from(variant: Em23wuconvert) -> Self { variant as u8 != 0 } } -impl EM23WUCONVERT_R { +#[doc = "Field `EM23WUCONVERT` reader - EM23 Wakeup on Conversion"] +pub type Em23wuconvertR = crate::BitReader; +impl Em23wuconvertR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EM23WUCONVERT_A { + pub const fn variant(&self) -> Em23wuconvert { match self.bits { - false => EM23WUCONVERT_A::WUDVL, - true => EM23WUCONVERT_A::WUCONVERT, + false => Em23wuconvert::Wudvl, + true => Em23wuconvert::Wuconvert, } } - #[doc = "Checks if the value of the field is `WUDVL`"] + #[doc = "When using suspend mode, conversions performed in EM2 or EM3 should not wake up the DMA until the FIFO's DVL setting is reached. This saves more power for large OSR settings or infrequent sampling."] #[inline(always)] pub fn is_wudvl(&self) -> bool { - *self == EM23WUCONVERT_A::WUDVL + *self == Em23wuconvert::Wudvl } - #[doc = "Checks if the value of the field is `WUCONVERT`"] + #[doc = "When using suspend mode, conversions performed in EM2 or EM3 will wake up the DMA and keep it awake until the conversions are done, regardless of the DVL setting. This mode burns more power, but it is useful when the conversion rate is faster than the time for the DMA to cycle through wake up and going back to sleep as it converts more than 4 scan table entries. Without using the wake up on conversion mode, the FIFO may overflow while the DMA is going in and out of sleep."] #[inline(always)] pub fn is_wuconvert(&self) -> bool { - *self == EM23WUCONVERT_A::WUCONVERT + *self == Em23wuconvert::Wuconvert } } #[doc = "Field `EM23WUCONVERT` writer - EM23 Wakeup on Conversion"] -pub type EM23WUCONVERT_W<'a, const O: u8> = - crate::BitWriter<'a, u32, CTRL_SPEC, EM23WUCONVERT_A, O>; -impl<'a, const O: u8> EM23WUCONVERT_W<'a, O> { +pub type Em23wuconvertW<'a, REG> = crate::BitWriter<'a, REG, Em23wuconvert>; +impl<'a, REG> Em23wuconvertW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "When using suspend mode, conversions performed in EM2 or EM3 should not wake up the DMA until the FIFO's DVL setting is reached. This saves more power for large OSR settings or infrequent sampling."] #[inline(always)] - pub fn wudvl(self) -> &'a mut W { - self.variant(EM23WUCONVERT_A::WUDVL) + pub fn wudvl(self) -> &'a mut crate::W { + self.variant(Em23wuconvert::Wudvl) } #[doc = "When using suspend mode, conversions performed in EM2 or EM3 will wake up the DMA and keep it awake until the conversions are done, regardless of the DVL setting. This mode burns more power, but it is useful when the conversion rate is faster than the time for the DMA to cycle through wake up and going back to sleep as it converts more than 4 scan table entries. Without using the wake up on conversion mode, the FIFO may overflow while the DMA is going in and out of sleep."] #[inline(always)] - pub fn wuconvert(self) -> &'a mut W { - self.variant(EM23WUCONVERT_A::WUCONVERT) + pub fn wuconvert(self) -> &'a mut crate::W { + self.variant(Em23wuconvert::Wuconvert) } } -#[doc = "Field `ADCCLKSUSPEND0` reader - ADC_CLK Suspend - PRS0"] -pub type ADCCLKSUSPEND0_R = crate::BitReader; #[doc = "ADC_CLK Suspend - PRS0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ADCCLKSUSPEND0_A { +pub enum Adcclksuspend0 { #[doc = "0: Normal mode which does not disable the ADC_CLK."] - PRSWUDIS = 0, + Prswudis = 0, #[doc = "1: ADCCLKWUEN will gate off ADC_CLK until the trigger is detected provided the internal timer is not selected as the trigger. Once the trigger is detected the ADC_CLK will be started, the band gap will be started, the ADC will be warmed up, and the SCAN Table and the Single entry will be converted. Once the conversions are done, the ADC_CLK will be gated off."] - PRSWUEN = 1, + Prswuen = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ADCCLKSUSPEND0_A) -> Self { + fn from(variant: Adcclksuspend0) -> Self { variant as u8 != 0 } } -impl ADCCLKSUSPEND0_R { +#[doc = "Field `ADCCLKSUSPEND0` reader - ADC_CLK Suspend - PRS0"] +pub type Adcclksuspend0R = crate::BitReader; +impl Adcclksuspend0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ADCCLKSUSPEND0_A { + pub const fn variant(&self) -> Adcclksuspend0 { match self.bits { - false => ADCCLKSUSPEND0_A::PRSWUDIS, - true => ADCCLKSUSPEND0_A::PRSWUEN, + false => Adcclksuspend0::Prswudis, + true => Adcclksuspend0::Prswuen, } } - #[doc = "Checks if the value of the field is `PRSWUDIS`"] + #[doc = "Normal mode which does not disable the ADC_CLK."] #[inline(always)] pub fn is_prswudis(&self) -> bool { - *self == ADCCLKSUSPEND0_A::PRSWUDIS + *self == Adcclksuspend0::Prswudis } - #[doc = "Checks if the value of the field is `PRSWUEN`"] + #[doc = "ADCCLKWUEN will gate off ADC_CLK until the trigger is detected provided the internal timer is not selected as the trigger. Once the trigger is detected the ADC_CLK will be started, the band gap will be started, the ADC will be warmed up, and the SCAN Table and the Single entry will be converted. Once the conversions are done, the ADC_CLK will be gated off."] #[inline(always)] pub fn is_prswuen(&self) -> bool { - *self == ADCCLKSUSPEND0_A::PRSWUEN + *self == Adcclksuspend0::Prswuen } } #[doc = "Field `ADCCLKSUSPEND0` writer - ADC_CLK Suspend - PRS0"] -pub type ADCCLKSUSPEND0_W<'a, const O: u8> = - crate::BitWriter<'a, u32, CTRL_SPEC, ADCCLKSUSPEND0_A, O>; -impl<'a, const O: u8> ADCCLKSUSPEND0_W<'a, O> { +pub type Adcclksuspend0W<'a, REG> = crate::BitWriter<'a, REG, Adcclksuspend0>; +impl<'a, REG> Adcclksuspend0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Normal mode which does not disable the ADC_CLK."] #[inline(always)] - pub fn prswudis(self) -> &'a mut W { - self.variant(ADCCLKSUSPEND0_A::PRSWUDIS) + pub fn prswudis(self) -> &'a mut crate::W { + self.variant(Adcclksuspend0::Prswudis) } #[doc = "ADCCLKWUEN will gate off ADC_CLK until the trigger is detected provided the internal timer is not selected as the trigger. Once the trigger is detected the ADC_CLK will be started, the band gap will be started, the ADC will be warmed up, and the SCAN Table and the Single entry will be converted. Once the conversions are done, the ADC_CLK will be gated off."] #[inline(always)] - pub fn prswuen(self) -> &'a mut W { - self.variant(ADCCLKSUSPEND0_A::PRSWUEN) + pub fn prswuen(self) -> &'a mut crate::W { + self.variant(Adcclksuspend0::Prswuen) } } -#[doc = "Field `ADCCLKSUSPEND1` reader - ADC_CLK Suspend - PRS1"] -pub type ADCCLKSUSPEND1_R = crate::BitReader; #[doc = "ADC_CLK Suspend - PRS1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ADCCLKSUSPEND1_A { +pub enum Adcclksuspend1 { #[doc = "0: Normal mode which does not disable the ADC_CLK."] - PRSWUDIS = 0, + Prswudis = 0, #[doc = "1: ADCCLKWUEN will gate off ADC_CLK until the trigger is detected provided the internal timer is not selected as the trigger. Once the trigger is detected the ADC_CLK will be started, the band gap will be started, the ADC will be warmed up, and the SCAN Table and the Single entry will be converted. Once the conversions are done, the ADC_CLK will be gated off."] - PRSWUEN = 1, + Prswuen = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ADCCLKSUSPEND1_A) -> Self { + fn from(variant: Adcclksuspend1) -> Self { variant as u8 != 0 } } -impl ADCCLKSUSPEND1_R { +#[doc = "Field `ADCCLKSUSPEND1` reader - ADC_CLK Suspend - PRS1"] +pub type Adcclksuspend1R = crate::BitReader; +impl Adcclksuspend1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ADCCLKSUSPEND1_A { + pub const fn variant(&self) -> Adcclksuspend1 { match self.bits { - false => ADCCLKSUSPEND1_A::PRSWUDIS, - true => ADCCLKSUSPEND1_A::PRSWUEN, + false => Adcclksuspend1::Prswudis, + true => Adcclksuspend1::Prswuen, } } - #[doc = "Checks if the value of the field is `PRSWUDIS`"] + #[doc = "Normal mode which does not disable the ADC_CLK."] #[inline(always)] pub fn is_prswudis(&self) -> bool { - *self == ADCCLKSUSPEND1_A::PRSWUDIS + *self == Adcclksuspend1::Prswudis } - #[doc = "Checks if the value of the field is `PRSWUEN`"] + #[doc = "ADCCLKWUEN will gate off ADC_CLK until the trigger is detected provided the internal timer is not selected as the trigger. Once the trigger is detected the ADC_CLK will be started, the band gap will be started, the ADC will be warmed up, and the SCAN Table and the Single entry will be converted. Once the conversions are done, the ADC_CLK will be gated off."] #[inline(always)] pub fn is_prswuen(&self) -> bool { - *self == ADCCLKSUSPEND1_A::PRSWUEN + *self == Adcclksuspend1::Prswuen } } #[doc = "Field `ADCCLKSUSPEND1` writer - ADC_CLK Suspend - PRS1"] -pub type ADCCLKSUSPEND1_W<'a, const O: u8> = - crate::BitWriter<'a, u32, CTRL_SPEC, ADCCLKSUSPEND1_A, O>; -impl<'a, const O: u8> ADCCLKSUSPEND1_W<'a, O> { +pub type Adcclksuspend1W<'a, REG> = crate::BitWriter<'a, REG, Adcclksuspend1>; +impl<'a, REG> Adcclksuspend1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Normal mode which does not disable the ADC_CLK."] #[inline(always)] - pub fn prswudis(self) -> &'a mut W { - self.variant(ADCCLKSUSPEND1_A::PRSWUDIS) + pub fn prswudis(self) -> &'a mut crate::W { + self.variant(Adcclksuspend1::Prswudis) } #[doc = "ADCCLKWUEN will gate off ADC_CLK until the trigger is detected provided the internal timer is not selected as the trigger. Once the trigger is detected the ADC_CLK will be started, the band gap will be started, the ADC will be warmed up, and the SCAN Table and the Single entry will be converted. Once the conversions are done, the ADC_CLK will be gated off."] #[inline(always)] - pub fn prswuen(self) -> &'a mut W { - self.variant(ADCCLKSUSPEND1_A::PRSWUEN) + pub fn prswuen(self) -> &'a mut crate::W { + self.variant(Adcclksuspend1::Prswuen) } } -#[doc = "Field `DBGHALT` reader - Debug Halt"] -pub type DBGHALT_R = crate::BitReader; #[doc = "Debug Halt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DBGHALT_A { +pub enum Dbghalt { #[doc = "0: Continue operation as normal during debug mode"] - NORMAL = 0, + Normal = 0, #[doc = "1: Complete the current conversion and then halt during debug mode"] - HALT = 1, + Halt = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DBGHALT_A) -> Self { + fn from(variant: Dbghalt) -> Self { variant as u8 != 0 } } -impl DBGHALT_R { +#[doc = "Field `DBGHALT` reader - Debug Halt"] +pub type DbghaltR = crate::BitReader; +impl DbghaltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DBGHALT_A { + pub const fn variant(&self) -> Dbghalt { match self.bits { - false => DBGHALT_A::NORMAL, - true => DBGHALT_A::HALT, + false => Dbghalt::Normal, + true => Dbghalt::Halt, } } - #[doc = "Checks if the value of the field is `NORMAL`"] + #[doc = "Continue operation as normal during debug mode"] #[inline(always)] pub fn is_normal(&self) -> bool { - *self == DBGHALT_A::NORMAL + *self == Dbghalt::Normal } - #[doc = "Checks if the value of the field is `HALT`"] + #[doc = "Complete the current conversion and then halt during debug mode"] #[inline(always)] pub fn is_halt(&self) -> bool { - *self == DBGHALT_A::HALT + *self == Dbghalt::Halt } } #[doc = "Field `DBGHALT` writer - Debug Halt"] -pub type DBGHALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, DBGHALT_A, O>; -impl<'a, const O: u8> DBGHALT_W<'a, O> { +pub type DbghaltW<'a, REG> = crate::BitWriter<'a, REG, Dbghalt>; +impl<'a, REG> DbghaltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Continue operation as normal during debug mode"] #[inline(always)] - pub fn normal(self) -> &'a mut W { - self.variant(DBGHALT_A::NORMAL) + pub fn normal(self) -> &'a mut crate::W { + self.variant(Dbghalt::Normal) } #[doc = "Complete the current conversion and then halt during debug mode"] #[inline(always)] - pub fn halt(self) -> &'a mut W { - self.variant(DBGHALT_A::HALT) + pub fn halt(self) -> &'a mut crate::W { + self.variant(Dbghalt::Halt) } } -#[doc = "Field `WARMUPMODE` reader - Warmup Mode"] -pub type WARMUPMODE_R = crate::FieldReader; #[doc = "Warmup Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WARMUPMODE_A { +pub enum Warmupmode { #[doc = "0: Shut down the IADC after conversions have completed."] - NORMAL = 0, + Normal = 0, #[doc = "1: Switch to standby mode after conversions have completed. The next warmup time will require 1us."] - KEEPINSTANDBY = 1, + Keepinstandby = 1, #[doc = "2: Keep IADC fully powered after conversions have completed."] - KEEPWARM = 2, + Keepwarm = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WARMUPMODE_A) -> Self { + fn from(variant: Warmupmode) -> Self { variant as _ } } -impl WARMUPMODE_R { +impl crate::FieldSpec for Warmupmode { + type Ux = u8; +} +impl crate::IsEnum for Warmupmode {} +#[doc = "Field `WARMUPMODE` reader - Warmup Mode"] +pub type WarmupmodeR = crate::FieldReader; +impl WarmupmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(WARMUPMODE_A::NORMAL), - 1 => Some(WARMUPMODE_A::KEEPINSTANDBY), - 2 => Some(WARMUPMODE_A::KEEPWARM), + 0 => Some(Warmupmode::Normal), + 1 => Some(Warmupmode::Keepinstandby), + 2 => Some(Warmupmode::Keepwarm), _ => None, } } - #[doc = "Checks if the value of the field is `NORMAL`"] + #[doc = "Shut down the IADC after conversions have completed."] #[inline(always)] pub fn is_normal(&self) -> bool { - *self == WARMUPMODE_A::NORMAL + *self == Warmupmode::Normal } - #[doc = "Checks if the value of the field is `KEEPINSTANDBY`"] + #[doc = "Switch to standby mode after conversions have completed. The next warmup time will require 1us."] #[inline(always)] pub fn is_keepinstandby(&self) -> bool { - *self == WARMUPMODE_A::KEEPINSTANDBY + *self == Warmupmode::Keepinstandby } - #[doc = "Checks if the value of the field is `KEEPWARM`"] + #[doc = "Keep IADC fully powered after conversions have completed."] #[inline(always)] pub fn is_keepwarm(&self) -> bool { - *self == WARMUPMODE_A::KEEPWARM + *self == Warmupmode::Keepwarm } } #[doc = "Field `WARMUPMODE` writer - Warmup Mode"] -pub type WARMUPMODE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CTRL_SPEC, u8, WARMUPMODE_A, 2, O>; -impl<'a, const O: u8> WARMUPMODE_W<'a, O> { +pub type WarmupmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Warmupmode>; +impl<'a, REG> WarmupmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Shut down the IADC after conversions have completed."] #[inline(always)] - pub fn normal(self) -> &'a mut W { - self.variant(WARMUPMODE_A::NORMAL) + pub fn normal(self) -> &'a mut crate::W { + self.variant(Warmupmode::Normal) } #[doc = "Switch to standby mode after conversions have completed. The next warmup time will require 1us."] #[inline(always)] - pub fn keepinstandby(self) -> &'a mut W { - self.variant(WARMUPMODE_A::KEEPINSTANDBY) + pub fn keepinstandby(self) -> &'a mut crate::W { + self.variant(Warmupmode::Keepinstandby) } #[doc = "Keep IADC fully powered after conversions have completed."] #[inline(always)] - pub fn keepwarm(self) -> &'a mut W { - self.variant(WARMUPMODE_A::KEEPWARM) + pub fn keepwarm(self) -> &'a mut crate::W { + self.variant(Warmupmode::Keepwarm) } } #[doc = "Field `TIMEBASE` reader - Time Base"] -pub type TIMEBASE_R = crate::FieldReader; +pub type TimebaseR = crate::FieldReader; #[doc = "Field `TIMEBASE` writer - Time Base"] -pub type TIMEBASE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, u8, 7, O>; -#[doc = "Field `HSCLKRATE` reader - High Speed Clock Rate"] -pub type HSCLKRATE_R = crate::FieldReader; +pub type TimebaseW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "High Speed Clock Rate\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HSCLKRATE_A { +pub enum Hsclkrate { #[doc = "0: Use CMU_CLK_ADC directly. The source clock must be 40 MHz or less."] - DIV1 = 0, + Div1 = 0, #[doc = "1: Divide CMU_CLK_ADC by 2 before using it. The resulting CLK_SRC_ADC must be 40 MHz or less."] - DIV2 = 1, + Div2 = 1, #[doc = "2: Divide CMU_CLK_ADC by 3 before using it. The resulting CLK_SRC_ADC must be 40 MHz or less."] - DIV3 = 2, + Div3 = 2, #[doc = "3: Divide CMU_CLK_ADC by 4 before using it. The resulting CLK_SRC_ADC must be 40 MHz or less."] - DIV4 = 3, + Div4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HSCLKRATE_A) -> Self { + fn from(variant: Hsclkrate) -> Self { variant as _ } } -impl HSCLKRATE_R { +impl crate::FieldSpec for Hsclkrate { + type Ux = u8; +} +impl crate::IsEnum for Hsclkrate {} +#[doc = "Field `HSCLKRATE` reader - High Speed Clock Rate"] +pub type HsclkrateR = crate::FieldReader; +impl HsclkrateR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HSCLKRATE_A::DIV1), - 1 => Some(HSCLKRATE_A::DIV2), - 2 => Some(HSCLKRATE_A::DIV3), - 3 => Some(HSCLKRATE_A::DIV4), + 0 => Some(Hsclkrate::Div1), + 1 => Some(Hsclkrate::Div2), + 2 => Some(Hsclkrate::Div3), + 3 => Some(Hsclkrate::Div4), _ => None, } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "Use CMU_CLK_ADC directly. The source clock must be 40 MHz or less."] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == HSCLKRATE_A::DIV1 + *self == Hsclkrate::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "Divide CMU_CLK_ADC by 2 before using it. The resulting CLK_SRC_ADC must be 40 MHz or less."] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == HSCLKRATE_A::DIV2 + *self == Hsclkrate::Div2 } - #[doc = "Checks if the value of the field is `DIV3`"] + #[doc = "Divide CMU_CLK_ADC by 3 before using it. The resulting CLK_SRC_ADC must be 40 MHz or less."] #[inline(always)] pub fn is_div3(&self) -> bool { - *self == HSCLKRATE_A::DIV3 + *self == Hsclkrate::Div3 } - #[doc = "Checks if the value of the field is `DIV4`"] + #[doc = "Divide CMU_CLK_ADC by 4 before using it. The resulting CLK_SRC_ADC must be 40 MHz or less."] #[inline(always)] pub fn is_div4(&self) -> bool { - *self == HSCLKRATE_A::DIV4 + *self == Hsclkrate::Div4 } } #[doc = "Field `HSCLKRATE` writer - High Speed Clock Rate"] -pub type HSCLKRATE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CTRL_SPEC, u8, HSCLKRATE_A, 3, O>; -impl<'a, const O: u8> HSCLKRATE_W<'a, O> { +pub type HsclkrateW<'a, REG> = crate::FieldWriter<'a, REG, 3, Hsclkrate>; +impl<'a, REG> HsclkrateW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Use CMU_CLK_ADC directly. The source clock must be 40 MHz or less."] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(HSCLKRATE_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Hsclkrate::Div1) } #[doc = "Divide CMU_CLK_ADC by 2 before using it. The resulting CLK_SRC_ADC must be 40 MHz or less."] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(HSCLKRATE_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Hsclkrate::Div2) } #[doc = "Divide CMU_CLK_ADC by 3 before using it. The resulting CLK_SRC_ADC must be 40 MHz or less."] #[inline(always)] - pub fn div3(self) -> &'a mut W { - self.variant(HSCLKRATE_A::DIV3) + pub fn div3(self) -> &'a mut crate::W { + self.variant(Hsclkrate::Div3) } #[doc = "Divide CMU_CLK_ADC by 4 before using it. The resulting CLK_SRC_ADC must be 40 MHz or less."] #[inline(always)] - pub fn div4(self) -> &'a mut W { - self.variant(HSCLKRATE_A::DIV4) + pub fn div4(self) -> &'a mut crate::W { + self.variant(Hsclkrate::Div4) } } impl R { #[doc = "Bit 0 - EM23 Wakeup on Conversion"] #[inline(always)] - pub fn em23wuconvert(&self) -> EM23WUCONVERT_R { - EM23WUCONVERT_R::new((self.bits & 1) != 0) + pub fn em23wuconvert(&self) -> Em23wuconvertR { + Em23wuconvertR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - ADC_CLK Suspend - PRS0"] #[inline(always)] - pub fn adcclksuspend0(&self) -> ADCCLKSUSPEND0_R { - ADCCLKSUSPEND0_R::new(((self.bits >> 1) & 1) != 0) + pub fn adcclksuspend0(&self) -> Adcclksuspend0R { + Adcclksuspend0R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - ADC_CLK Suspend - PRS1"] #[inline(always)] - pub fn adcclksuspend1(&self) -> ADCCLKSUSPEND1_R { - ADCCLKSUSPEND1_R::new(((self.bits >> 2) & 1) != 0) + pub fn adcclksuspend1(&self) -> Adcclksuspend1R { + Adcclksuspend1R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Debug Halt"] #[inline(always)] - pub fn dbghalt(&self) -> DBGHALT_R { - DBGHALT_R::new(((self.bits >> 3) & 1) != 0) + pub fn dbghalt(&self) -> DbghaltR { + DbghaltR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:5 - Warmup Mode"] #[inline(always)] - pub fn warmupmode(&self) -> WARMUPMODE_R { - WARMUPMODE_R::new(((self.bits >> 4) & 3) as u8) + pub fn warmupmode(&self) -> WarmupmodeR { + WarmupmodeR::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 16:22 - Time Base"] #[inline(always)] - pub fn timebase(&self) -> TIMEBASE_R { - TIMEBASE_R::new(((self.bits >> 16) & 0x7f) as u8) + pub fn timebase(&self) -> TimebaseR { + TimebaseR::new(((self.bits >> 16) & 0x7f) as u8) } #[doc = "Bits 28:30 - High Speed Clock Rate"] #[inline(always)] - pub fn hsclkrate(&self) -> HSCLKRATE_R { - HSCLKRATE_R::new(((self.bits >> 28) & 7) as u8) + pub fn hsclkrate(&self) -> HsclkrateR { + HsclkrateR::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bit 0 - EM23 Wakeup on Conversion"] #[inline(always)] #[must_use] - pub fn em23wuconvert(&mut self) -> EM23WUCONVERT_W<0> { - EM23WUCONVERT_W::new(self) + pub fn em23wuconvert(&mut self) -> Em23wuconvertW { + Em23wuconvertW::new(self, 0) } #[doc = "Bit 1 - ADC_CLK Suspend - PRS0"] #[inline(always)] #[must_use] - pub fn adcclksuspend0(&mut self) -> ADCCLKSUSPEND0_W<1> { - ADCCLKSUSPEND0_W::new(self) + pub fn adcclksuspend0(&mut self) -> Adcclksuspend0W { + Adcclksuspend0W::new(self, 1) } #[doc = "Bit 2 - ADC_CLK Suspend - PRS1"] #[inline(always)] #[must_use] - pub fn adcclksuspend1(&mut self) -> ADCCLKSUSPEND1_W<2> { - ADCCLKSUSPEND1_W::new(self) + pub fn adcclksuspend1(&mut self) -> Adcclksuspend1W { + Adcclksuspend1W::new(self, 2) } #[doc = "Bit 3 - Debug Halt"] #[inline(always)] #[must_use] - pub fn dbghalt(&mut self) -> DBGHALT_W<3> { - DBGHALT_W::new(self) + pub fn dbghalt(&mut self) -> DbghaltW { + DbghaltW::new(self, 3) } #[doc = "Bits 4:5 - Warmup Mode"] #[inline(always)] #[must_use] - pub fn warmupmode(&mut self) -> WARMUPMODE_W<4> { - WARMUPMODE_W::new(self) + pub fn warmupmode(&mut self) -> WarmupmodeW { + WarmupmodeW::new(self, 4) } #[doc = "Bits 16:22 - Time Base"] #[inline(always)] #[must_use] - pub fn timebase(&mut self) -> TIMEBASE_W<16> { - TIMEBASE_W::new(self) + pub fn timebase(&mut self) -> TimebaseW { + TimebaseW::new(self, 16) } #[doc = "Bits 28:30 - High Speed Clock Rate"] #[inline(always)] #[must_use] - pub fn hsclkrate(&mut self) -> HSCLKRATE_W<28> { - HSCLKRATE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn hsclkrate(&mut self) -> HsclkrateW { + HsclkrateW::new(self, 28) } } -#[doc = "Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "Control\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/en.rs index 5c71542..4f58fa2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/en.rs @@ -1,133 +1,96 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EN` reader - Enable IADC Module"] -pub type EN_R = crate::BitReader; +pub type W = crate::W; #[doc = "Enable IADC Module\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EN_A { +pub enum En { #[doc = "0: Disable"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enable"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EN_A) -> Self { + fn from(variant: En) -> Self { variant as u8 != 0 } } -impl EN_R { +#[doc = "Field `EN` reader - Enable IADC Module"] +pub type EnR = crate::BitReader; +impl EnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EN_A { + pub const fn variant(&self) -> En { match self.bits { - false => EN_A::DISABLE, - true => EN_A::ENABLE, + false => En::Disable, + true => En::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EN_A::DISABLE + *self == En::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enable"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EN_A::ENABLE + *self == En::Enable } } #[doc = "Field `EN` writer - Enable IADC Module"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, EN_A, O>; -impl<'a, const O: u8> EN_W<'a, O> { +pub type EnW<'a, REG> = crate::BitWriter<'a, REG, En>; +impl<'a, REG> EnW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(En::Disable) } #[doc = "Enable"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(En::Enable) } } #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Enable IADC Module"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable IADC Module"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "Enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/ien.rs index f5945e7..4d21f2b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/ien.rs @@ -1,275 +1,235 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SINGLEFIFODVL` reader - Single FIFO Data Valid Level Enable"] -pub type SINGLEFIFODVL_R = crate::BitReader; +pub type SinglefifodvlR = crate::BitReader; #[doc = "Field `SINGLEFIFODVL` writer - Single FIFO Data Valid Level Enable"] -pub type SINGLEFIFODVL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SinglefifodvlW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANFIFODVL` reader - Scan FIFO Data Valid Level Enable"] -pub type SCANFIFODVL_R = crate::BitReader; +pub type ScanfifodvlR = crate::BitReader; #[doc = "Field `SCANFIFODVL` writer - Scan FIFO Data Valid Level Enable"] -pub type SCANFIFODVL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ScanfifodvlW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SINGLECMP` reader - Single Result Window Compare Enable"] -pub type SINGLECMP_R = crate::BitReader; +pub type SinglecmpR = crate::BitReader; #[doc = "Field `SINGLECMP` writer - Single Result Window Compare Enable"] -pub type SINGLECMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SinglecmpW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANCMP` reader - Scan Result Window Compare Enable"] -pub type SCANCMP_R = crate::BitReader; +pub type ScancmpR = crate::BitReader; #[doc = "Field `SCANCMP` writer - Scan Result Window Compare Enable"] -pub type SCANCMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ScancmpW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANENTRYDONE` reader - Scan Entry Done Enable"] -pub type SCANENTRYDONE_R = crate::BitReader; +pub type ScanentrydoneR = crate::BitReader; #[doc = "Field `SCANENTRYDONE` writer - Scan Entry Done Enable"] -pub type SCANENTRYDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ScanentrydoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANTABLEDONE` reader - Scan Table Done Enable"] -pub type SCANTABLEDONE_R = crate::BitReader; +pub type ScantabledoneR = crate::BitReader; #[doc = "Field `SCANTABLEDONE` writer - Scan Table Done Enable"] -pub type SCANTABLEDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ScantabledoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SINGLEDONE` reader - Single Conversion Done Enable"] -pub type SINGLEDONE_R = crate::BitReader; +pub type SingledoneR = crate::BitReader; #[doc = "Field `SINGLEDONE` writer - Single Conversion Done Enable"] -pub type SINGLEDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SingledoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POLARITYERR` reader - Polarity Error Enable"] -pub type POLARITYERR_R = crate::BitReader; +pub type PolarityerrR = crate::BitReader; #[doc = "Field `POLARITYERR` writer - Polarity Error Enable"] -pub type POLARITYERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PolarityerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PORTALLOCERR` reader - Port Allocation Error Enable"] -pub type PORTALLOCERR_R = crate::BitReader; +pub type PortallocerrR = crate::BitReader; #[doc = "Field `PORTALLOCERR` writer - Port Allocation Error Enable"] -pub type PORTALLOCERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PortallocerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SINGLEFIFOOF` reader - Single FIFO Overflow Enable"] -pub type SINGLEFIFOOF_R = crate::BitReader; +pub type SinglefifoofR = crate::BitReader; #[doc = "Field `SINGLEFIFOOF` writer - Single FIFO Overflow Enable"] -pub type SINGLEFIFOOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SinglefifoofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANFIFOOF` reader - Scan FIFO Overflow Enable"] -pub type SCANFIFOOF_R = crate::BitReader; +pub type ScanfifoofR = crate::BitReader; #[doc = "Field `SCANFIFOOF` writer - Scan FIFO Overflow Enable"] -pub type SCANFIFOOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ScanfifoofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SINGLEFIFOUF` reader - Single FIFO Underflow Enable"] -pub type SINGLEFIFOUF_R = crate::BitReader; +pub type SinglefifoufR = crate::BitReader; #[doc = "Field `SINGLEFIFOUF` writer - Single FIFO Underflow Enable"] -pub type SINGLEFIFOUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SinglefifoufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANFIFOUF` reader - Scan FIFO Underflow Enable"] -pub type SCANFIFOUF_R = crate::BitReader; +pub type ScanfifoufR = crate::BitReader; #[doc = "Field `SCANFIFOUF` writer - Scan FIFO Underflow Enable"] -pub type SCANFIFOUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ScanfifoufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM23ABORTERROR` reader - EM2/3 Abort Error Enable"] -pub type EM23ABORTERROR_R = crate::BitReader; +pub type Em23aborterrorR = crate::BitReader; #[doc = "Field `EM23ABORTERROR` writer - EM2/3 Abort Error Enable"] -pub type EM23ABORTERROR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Em23aborterrorW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Single FIFO Data Valid Level Enable"] #[inline(always)] - pub fn singlefifodvl(&self) -> SINGLEFIFODVL_R { - SINGLEFIFODVL_R::new((self.bits & 1) != 0) + pub fn singlefifodvl(&self) -> SinglefifodvlR { + SinglefifodvlR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Scan FIFO Data Valid Level Enable"] #[inline(always)] - pub fn scanfifodvl(&self) -> SCANFIFODVL_R { - SCANFIFODVL_R::new(((self.bits >> 1) & 1) != 0) + pub fn scanfifodvl(&self) -> ScanfifodvlR { + ScanfifodvlR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Single Result Window Compare Enable"] #[inline(always)] - pub fn singlecmp(&self) -> SINGLECMP_R { - SINGLECMP_R::new(((self.bits >> 2) & 1) != 0) + pub fn singlecmp(&self) -> SinglecmpR { + SinglecmpR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Scan Result Window Compare Enable"] #[inline(always)] - pub fn scancmp(&self) -> SCANCMP_R { - SCANCMP_R::new(((self.bits >> 3) & 1) != 0) + pub fn scancmp(&self) -> ScancmpR { + ScancmpR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 7 - Scan Entry Done Enable"] #[inline(always)] - pub fn scanentrydone(&self) -> SCANENTRYDONE_R { - SCANENTRYDONE_R::new(((self.bits >> 7) & 1) != 0) + pub fn scanentrydone(&self) -> ScanentrydoneR { + ScanentrydoneR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Scan Table Done Enable"] #[inline(always)] - pub fn scantabledone(&self) -> SCANTABLEDONE_R { - SCANTABLEDONE_R::new(((self.bits >> 8) & 1) != 0) + pub fn scantabledone(&self) -> ScantabledoneR { + ScantabledoneR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Single Conversion Done Enable"] #[inline(always)] - pub fn singledone(&self) -> SINGLEDONE_R { - SINGLEDONE_R::new(((self.bits >> 9) & 1) != 0) + pub fn singledone(&self) -> SingledoneR { + SingledoneR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 12 - Polarity Error Enable"] #[inline(always)] - pub fn polarityerr(&self) -> POLARITYERR_R { - POLARITYERR_R::new(((self.bits >> 12) & 1) != 0) + pub fn polarityerr(&self) -> PolarityerrR { + PolarityerrR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port Allocation Error Enable"] #[inline(always)] - pub fn portallocerr(&self) -> PORTALLOCERR_R { - PORTALLOCERR_R::new(((self.bits >> 13) & 1) != 0) + pub fn portallocerr(&self) -> PortallocerrR { + PortallocerrR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 16 - Single FIFO Overflow Enable"] #[inline(always)] - pub fn singlefifoof(&self) -> SINGLEFIFOOF_R { - SINGLEFIFOOF_R::new(((self.bits >> 16) & 1) != 0) + pub fn singlefifoof(&self) -> SinglefifoofR { + SinglefifoofR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Scan FIFO Overflow Enable"] #[inline(always)] - pub fn scanfifoof(&self) -> SCANFIFOOF_R { - SCANFIFOOF_R::new(((self.bits >> 17) & 1) != 0) + pub fn scanfifoof(&self) -> ScanfifoofR { + ScanfifoofR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Single FIFO Underflow Enable"] #[inline(always)] - pub fn singlefifouf(&self) -> SINGLEFIFOUF_R { - SINGLEFIFOUF_R::new(((self.bits >> 18) & 1) != 0) + pub fn singlefifouf(&self) -> SinglefifoufR { + SinglefifoufR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Scan FIFO Underflow Enable"] #[inline(always)] - pub fn scanfifouf(&self) -> SCANFIFOUF_R { - SCANFIFOUF_R::new(((self.bits >> 19) & 1) != 0) + pub fn scanfifouf(&self) -> ScanfifoufR { + ScanfifoufR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 31 - EM2/3 Abort Error Enable"] #[inline(always)] - pub fn em23aborterror(&self) -> EM23ABORTERROR_R { - EM23ABORTERROR_R::new(((self.bits >> 31) & 1) != 0) + pub fn em23aborterror(&self) -> Em23aborterrorR { + Em23aborterrorR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Single FIFO Data Valid Level Enable"] #[inline(always)] #[must_use] - pub fn singlefifodvl(&mut self) -> SINGLEFIFODVL_W<0> { - SINGLEFIFODVL_W::new(self) + pub fn singlefifodvl(&mut self) -> SinglefifodvlW { + SinglefifodvlW::new(self, 0) } #[doc = "Bit 1 - Scan FIFO Data Valid Level Enable"] #[inline(always)] #[must_use] - pub fn scanfifodvl(&mut self) -> SCANFIFODVL_W<1> { - SCANFIFODVL_W::new(self) + pub fn scanfifodvl(&mut self) -> ScanfifodvlW { + ScanfifodvlW::new(self, 1) } #[doc = "Bit 2 - Single Result Window Compare Enable"] #[inline(always)] #[must_use] - pub fn singlecmp(&mut self) -> SINGLECMP_W<2> { - SINGLECMP_W::new(self) + pub fn singlecmp(&mut self) -> SinglecmpW { + SinglecmpW::new(self, 2) } #[doc = "Bit 3 - Scan Result Window Compare Enable"] #[inline(always)] #[must_use] - pub fn scancmp(&mut self) -> SCANCMP_W<3> { - SCANCMP_W::new(self) + pub fn scancmp(&mut self) -> ScancmpW { + ScancmpW::new(self, 3) } #[doc = "Bit 7 - Scan Entry Done Enable"] #[inline(always)] #[must_use] - pub fn scanentrydone(&mut self) -> SCANENTRYDONE_W<7> { - SCANENTRYDONE_W::new(self) + pub fn scanentrydone(&mut self) -> ScanentrydoneW { + ScanentrydoneW::new(self, 7) } #[doc = "Bit 8 - Scan Table Done Enable"] #[inline(always)] #[must_use] - pub fn scantabledone(&mut self) -> SCANTABLEDONE_W<8> { - SCANTABLEDONE_W::new(self) + pub fn scantabledone(&mut self) -> ScantabledoneW { + ScantabledoneW::new(self, 8) } #[doc = "Bit 9 - Single Conversion Done Enable"] #[inline(always)] #[must_use] - pub fn singledone(&mut self) -> SINGLEDONE_W<9> { - SINGLEDONE_W::new(self) + pub fn singledone(&mut self) -> SingledoneW { + SingledoneW::new(self, 9) } #[doc = "Bit 12 - Polarity Error Enable"] #[inline(always)] #[must_use] - pub fn polarityerr(&mut self) -> POLARITYERR_W<12> { - POLARITYERR_W::new(self) + pub fn polarityerr(&mut self) -> PolarityerrW { + PolarityerrW::new(self, 12) } #[doc = "Bit 13 - Port Allocation Error Enable"] #[inline(always)] #[must_use] - pub fn portallocerr(&mut self) -> PORTALLOCERR_W<13> { - PORTALLOCERR_W::new(self) + pub fn portallocerr(&mut self) -> PortallocerrW { + PortallocerrW::new(self, 13) } #[doc = "Bit 16 - Single FIFO Overflow Enable"] #[inline(always)] #[must_use] - pub fn singlefifoof(&mut self) -> SINGLEFIFOOF_W<16> { - SINGLEFIFOOF_W::new(self) + pub fn singlefifoof(&mut self) -> SinglefifoofW { + SinglefifoofW::new(self, 16) } #[doc = "Bit 17 - Scan FIFO Overflow Enable"] #[inline(always)] #[must_use] - pub fn scanfifoof(&mut self) -> SCANFIFOOF_W<17> { - SCANFIFOOF_W::new(self) + pub fn scanfifoof(&mut self) -> ScanfifoofW { + ScanfifoofW::new(self, 17) } #[doc = "Bit 18 - Single FIFO Underflow Enable"] #[inline(always)] #[must_use] - pub fn singlefifouf(&mut self) -> SINGLEFIFOUF_W<18> { - SINGLEFIFOUF_W::new(self) + pub fn singlefifouf(&mut self) -> SinglefifoufW { + SinglefifoufW::new(self, 18) } #[doc = "Bit 19 - Scan FIFO Underflow Enable"] #[inline(always)] #[must_use] - pub fn scanfifouf(&mut self) -> SCANFIFOUF_W<19> { - SCANFIFOUF_W::new(self) + pub fn scanfifouf(&mut self) -> ScanfifoufW { + ScanfifoufW::new(self, 19) } #[doc = "Bit 31 - EM2/3 Abort Error Enable"] #[inline(always)] #[must_use] - pub fn em23aborterror(&mut self) -> EM23ABORTERROR_W<31> { - EM23ABORTERROR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn em23aborterror(&mut self) -> Em23aborterrorW { + Em23aborterrorW::new(self, 31) } } -#[doc = "Interrupt Enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/if_.rs index 630543a..fd64e5e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/if_.rs @@ -1,275 +1,235 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SINGLEFIFODVL` reader - Single FIFO Data Valid Level"] -pub type SINGLEFIFODVL_R = crate::BitReader; +pub type SinglefifodvlR = crate::BitReader; #[doc = "Field `SINGLEFIFODVL` writer - Single FIFO Data Valid Level"] -pub type SINGLEFIFODVL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SinglefifodvlW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANFIFODVL` reader - Scan FIFO Data Valid Level"] -pub type SCANFIFODVL_R = crate::BitReader; +pub type ScanfifodvlR = crate::BitReader; #[doc = "Field `SCANFIFODVL` writer - Scan FIFO Data Valid Level"] -pub type SCANFIFODVL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ScanfifodvlW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SINGLECMP` reader - Single Result Window Compare"] -pub type SINGLECMP_R = crate::BitReader; +pub type SinglecmpR = crate::BitReader; #[doc = "Field `SINGLECMP` writer - Single Result Window Compare"] -pub type SINGLECMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SinglecmpW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANCMP` reader - Scan Result Window Compare"] -pub type SCANCMP_R = crate::BitReader; +pub type ScancmpR = crate::BitReader; #[doc = "Field `SCANCMP` writer - Scan Result Window Compare"] -pub type SCANCMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ScancmpW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANENTRYDONE` reader - Scan Entry Done"] -pub type SCANENTRYDONE_R = crate::BitReader; +pub type ScanentrydoneR = crate::BitReader; #[doc = "Field `SCANENTRYDONE` writer - Scan Entry Done"] -pub type SCANENTRYDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ScanentrydoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANTABLEDONE` reader - Scan Table Done"] -pub type SCANTABLEDONE_R = crate::BitReader; +pub type ScantabledoneR = crate::BitReader; #[doc = "Field `SCANTABLEDONE` writer - Scan Table Done"] -pub type SCANTABLEDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ScantabledoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SINGLEDONE` reader - Single Conversion Done"] -pub type SINGLEDONE_R = crate::BitReader; +pub type SingledoneR = crate::BitReader; #[doc = "Field `SINGLEDONE` writer - Single Conversion Done"] -pub type SINGLEDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SingledoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POLARITYERR` reader - Polarity Error"] -pub type POLARITYERR_R = crate::BitReader; +pub type PolarityerrR = crate::BitReader; #[doc = "Field `POLARITYERR` writer - Polarity Error"] -pub type POLARITYERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PolarityerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PORTALLOCERR` reader - Port Allocation Error"] -pub type PORTALLOCERR_R = crate::BitReader; +pub type PortallocerrR = crate::BitReader; #[doc = "Field `PORTALLOCERR` writer - Port Allocation Error"] -pub type PORTALLOCERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PortallocerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SINGLEFIFOOF` reader - Single FIFO Overflow"] -pub type SINGLEFIFOOF_R = crate::BitReader; +pub type SinglefifoofR = crate::BitReader; #[doc = "Field `SINGLEFIFOOF` writer - Single FIFO Overflow"] -pub type SINGLEFIFOOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SinglefifoofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANFIFOOF` reader - Scan FIFO Overflow"] -pub type SCANFIFOOF_R = crate::BitReader; +pub type ScanfifoofR = crate::BitReader; #[doc = "Field `SCANFIFOOF` writer - Scan FIFO Overflow"] -pub type SCANFIFOOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ScanfifoofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SINGLEFIFOUF` reader - Single FIFO Underflow"] -pub type SINGLEFIFOUF_R = crate::BitReader; +pub type SinglefifoufR = crate::BitReader; #[doc = "Field `SINGLEFIFOUF` writer - Single FIFO Underflow"] -pub type SINGLEFIFOUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SinglefifoufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANFIFOUF` reader - Scan FIFO Underflow"] -pub type SCANFIFOUF_R = crate::BitReader; +pub type ScanfifoufR = crate::BitReader; #[doc = "Field `SCANFIFOUF` writer - Scan FIFO Underflow"] -pub type SCANFIFOUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ScanfifoufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EM23ABORTERROR` reader - EM2/3 Abort Error"] -pub type EM23ABORTERROR_R = crate::BitReader; +pub type Em23aborterrorR = crate::BitReader; #[doc = "Field `EM23ABORTERROR` writer - EM2/3 Abort Error"] -pub type EM23ABORTERROR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Em23aborterrorW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Single FIFO Data Valid Level"] #[inline(always)] - pub fn singlefifodvl(&self) -> SINGLEFIFODVL_R { - SINGLEFIFODVL_R::new((self.bits & 1) != 0) + pub fn singlefifodvl(&self) -> SinglefifodvlR { + SinglefifodvlR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Scan FIFO Data Valid Level"] #[inline(always)] - pub fn scanfifodvl(&self) -> SCANFIFODVL_R { - SCANFIFODVL_R::new(((self.bits >> 1) & 1) != 0) + pub fn scanfifodvl(&self) -> ScanfifodvlR { + ScanfifodvlR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Single Result Window Compare"] #[inline(always)] - pub fn singlecmp(&self) -> SINGLECMP_R { - SINGLECMP_R::new(((self.bits >> 2) & 1) != 0) + pub fn singlecmp(&self) -> SinglecmpR { + SinglecmpR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Scan Result Window Compare"] #[inline(always)] - pub fn scancmp(&self) -> SCANCMP_R { - SCANCMP_R::new(((self.bits >> 3) & 1) != 0) + pub fn scancmp(&self) -> ScancmpR { + ScancmpR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 7 - Scan Entry Done"] #[inline(always)] - pub fn scanentrydone(&self) -> SCANENTRYDONE_R { - SCANENTRYDONE_R::new(((self.bits >> 7) & 1) != 0) + pub fn scanentrydone(&self) -> ScanentrydoneR { + ScanentrydoneR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Scan Table Done"] #[inline(always)] - pub fn scantabledone(&self) -> SCANTABLEDONE_R { - SCANTABLEDONE_R::new(((self.bits >> 8) & 1) != 0) + pub fn scantabledone(&self) -> ScantabledoneR { + ScantabledoneR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Single Conversion Done"] #[inline(always)] - pub fn singledone(&self) -> SINGLEDONE_R { - SINGLEDONE_R::new(((self.bits >> 9) & 1) != 0) + pub fn singledone(&self) -> SingledoneR { + SingledoneR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 12 - Polarity Error"] #[inline(always)] - pub fn polarityerr(&self) -> POLARITYERR_R { - POLARITYERR_R::new(((self.bits >> 12) & 1) != 0) + pub fn polarityerr(&self) -> PolarityerrR { + PolarityerrR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port Allocation Error"] #[inline(always)] - pub fn portallocerr(&self) -> PORTALLOCERR_R { - PORTALLOCERR_R::new(((self.bits >> 13) & 1) != 0) + pub fn portallocerr(&self) -> PortallocerrR { + PortallocerrR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 16 - Single FIFO Overflow"] #[inline(always)] - pub fn singlefifoof(&self) -> SINGLEFIFOOF_R { - SINGLEFIFOOF_R::new(((self.bits >> 16) & 1) != 0) + pub fn singlefifoof(&self) -> SinglefifoofR { + SinglefifoofR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Scan FIFO Overflow"] #[inline(always)] - pub fn scanfifoof(&self) -> SCANFIFOOF_R { - SCANFIFOOF_R::new(((self.bits >> 17) & 1) != 0) + pub fn scanfifoof(&self) -> ScanfifoofR { + ScanfifoofR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Single FIFO Underflow"] #[inline(always)] - pub fn singlefifouf(&self) -> SINGLEFIFOUF_R { - SINGLEFIFOUF_R::new(((self.bits >> 18) & 1) != 0) + pub fn singlefifouf(&self) -> SinglefifoufR { + SinglefifoufR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Scan FIFO Underflow"] #[inline(always)] - pub fn scanfifouf(&self) -> SCANFIFOUF_R { - SCANFIFOUF_R::new(((self.bits >> 19) & 1) != 0) + pub fn scanfifouf(&self) -> ScanfifoufR { + ScanfifoufR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 31 - EM2/3 Abort Error"] #[inline(always)] - pub fn em23aborterror(&self) -> EM23ABORTERROR_R { - EM23ABORTERROR_R::new(((self.bits >> 31) & 1) != 0) + pub fn em23aborterror(&self) -> Em23aborterrorR { + Em23aborterrorR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Single FIFO Data Valid Level"] #[inline(always)] #[must_use] - pub fn singlefifodvl(&mut self) -> SINGLEFIFODVL_W<0> { - SINGLEFIFODVL_W::new(self) + pub fn singlefifodvl(&mut self) -> SinglefifodvlW { + SinglefifodvlW::new(self, 0) } #[doc = "Bit 1 - Scan FIFO Data Valid Level"] #[inline(always)] #[must_use] - pub fn scanfifodvl(&mut self) -> SCANFIFODVL_W<1> { - SCANFIFODVL_W::new(self) + pub fn scanfifodvl(&mut self) -> ScanfifodvlW { + ScanfifodvlW::new(self, 1) } #[doc = "Bit 2 - Single Result Window Compare"] #[inline(always)] #[must_use] - pub fn singlecmp(&mut self) -> SINGLECMP_W<2> { - SINGLECMP_W::new(self) + pub fn singlecmp(&mut self) -> SinglecmpW { + SinglecmpW::new(self, 2) } #[doc = "Bit 3 - Scan Result Window Compare"] #[inline(always)] #[must_use] - pub fn scancmp(&mut self) -> SCANCMP_W<3> { - SCANCMP_W::new(self) + pub fn scancmp(&mut self) -> ScancmpW { + ScancmpW::new(self, 3) } #[doc = "Bit 7 - Scan Entry Done"] #[inline(always)] #[must_use] - pub fn scanentrydone(&mut self) -> SCANENTRYDONE_W<7> { - SCANENTRYDONE_W::new(self) + pub fn scanentrydone(&mut self) -> ScanentrydoneW { + ScanentrydoneW::new(self, 7) } #[doc = "Bit 8 - Scan Table Done"] #[inline(always)] #[must_use] - pub fn scantabledone(&mut self) -> SCANTABLEDONE_W<8> { - SCANTABLEDONE_W::new(self) + pub fn scantabledone(&mut self) -> ScantabledoneW { + ScantabledoneW::new(self, 8) } #[doc = "Bit 9 - Single Conversion Done"] #[inline(always)] #[must_use] - pub fn singledone(&mut self) -> SINGLEDONE_W<9> { - SINGLEDONE_W::new(self) + pub fn singledone(&mut self) -> SingledoneW { + SingledoneW::new(self, 9) } #[doc = "Bit 12 - Polarity Error"] #[inline(always)] #[must_use] - pub fn polarityerr(&mut self) -> POLARITYERR_W<12> { - POLARITYERR_W::new(self) + pub fn polarityerr(&mut self) -> PolarityerrW { + PolarityerrW::new(self, 12) } #[doc = "Bit 13 - Port Allocation Error"] #[inline(always)] #[must_use] - pub fn portallocerr(&mut self) -> PORTALLOCERR_W<13> { - PORTALLOCERR_W::new(self) + pub fn portallocerr(&mut self) -> PortallocerrW { + PortallocerrW::new(self, 13) } #[doc = "Bit 16 - Single FIFO Overflow"] #[inline(always)] #[must_use] - pub fn singlefifoof(&mut self) -> SINGLEFIFOOF_W<16> { - SINGLEFIFOOF_W::new(self) + pub fn singlefifoof(&mut self) -> SinglefifoofW { + SinglefifoofW::new(self, 16) } #[doc = "Bit 17 - Scan FIFO Overflow"] #[inline(always)] #[must_use] - pub fn scanfifoof(&mut self) -> SCANFIFOOF_W<17> { - SCANFIFOOF_W::new(self) + pub fn scanfifoof(&mut self) -> ScanfifoofW { + ScanfifoofW::new(self, 17) } #[doc = "Bit 18 - Single FIFO Underflow"] #[inline(always)] #[must_use] - pub fn singlefifouf(&mut self) -> SINGLEFIFOUF_W<18> { - SINGLEFIFOUF_W::new(self) + pub fn singlefifouf(&mut self) -> SinglefifoufW { + SinglefifoufW::new(self, 18) } #[doc = "Bit 19 - Scan FIFO Underflow"] #[inline(always)] #[must_use] - pub fn scanfifouf(&mut self) -> SCANFIFOUF_W<19> { - SCANFIFOUF_W::new(self) + pub fn scanfifouf(&mut self) -> ScanfifoufW { + ScanfifoufW::new(self, 19) } #[doc = "Bit 31 - EM2/3 Abort Error"] #[inline(always)] #[must_use] - pub fn em23aborterror(&mut self) -> EM23ABORTERROR_W<31> { - EM23ABORTERROR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn em23aborterror(&mut self) -> Em23aborterrorW { + Em23aborterrorW::new(self, 31) } } -#[doc = "Interrupt Flag\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "Interrupt Flag\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/ipversion.rs index b6076d5..a14e2f2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "IPVERSION\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "IPVERSION\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x02"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/maskreq.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/maskreq.rs index ccf2085..3d60974 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/maskreq.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/maskreq.rs @@ -1,80 +1,40 @@ #[doc = "Register `MASKREQ` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `MASKREQ` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `MASKREQ` reader - Scan Queue Mask Request"] -pub type MASKREQ_R = crate::FieldReader; +pub type MaskreqR = crate::FieldReader; #[doc = "Field `MASKREQ` writer - Scan Queue Mask Request"] -pub type MASKREQ_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MASKREQ_SPEC, u16, u16, 16, O>; +pub type MaskreqW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Scan Queue Mask Request"] #[inline(always)] - pub fn maskreq(&self) -> MASKREQ_R { - MASKREQ_R::new((self.bits & 0xffff) as u16) + pub fn maskreq(&self) -> MaskreqR { + MaskreqR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Scan Queue Mask Request"] #[inline(always)] #[must_use] - pub fn maskreq(&mut self) -> MASKREQ_W<0> { - MASKREQ_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn maskreq(&mut self) -> MaskreqW { + MaskreqW::new(self, 0) } } -#[doc = "Mask Request\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [maskreq](index.html) module"] -pub struct MASKREQ_SPEC; -impl crate::RegisterSpec for MASKREQ_SPEC { +#[doc = "Mask Request\n\nYou can [`read`](crate::Reg::read) this register and get [`maskreq::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`maskreq::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct MaskreqSpec; +impl crate::RegisterSpec for MaskreqSpec { type Ux = u32; } -#[doc = "`read()` method returns [maskreq::R](R) reader structure"] -impl crate::Readable for MASKREQ_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [maskreq::W](W) writer structure"] -impl crate::Writable for MASKREQ_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`maskreq::R`](R) reader structure"] +impl crate::Readable for MaskreqSpec {} +#[doc = "`write(|w| ..)` method takes [`maskreq::W`](W) writer structure"] +impl crate::Writable for MaskreqSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MASKREQ to value 0"] -impl crate::Resettable for MASKREQ_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for MaskreqSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scale0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scale0.rs index 24a9eb2..2fbd2c8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scale0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scale0.rs @@ -1,156 +1,119 @@ #[doc = "Register `SCALE0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCALE0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OFFSET` reader - Offset"] -pub type OFFSET_R = crate::FieldReader; +pub type OffsetR = crate::FieldReader; #[doc = "Field `OFFSET` writer - Offset"] -pub type OFFSET_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCALE0_SPEC, u32, u32, 18, O>; +pub type OffsetW<'a, REG> = crate::FieldWriter<'a, REG, 18, u32>; #[doc = "Field `GAIN13LSB` reader - Gain 13 LSBs"] -pub type GAIN13LSB_R = crate::FieldReader; +pub type Gain13lsbR = crate::FieldReader; #[doc = "Field `GAIN13LSB` writer - Gain 13 LSBs"] -pub type GAIN13LSB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCALE0_SPEC, u16, u16, 13, O>; -#[doc = "Field `GAIN3MSB` reader - Gain 3 MSBs"] -pub type GAIN3MSB_R = crate::BitReader; +pub type Gain13lsbW<'a, REG> = crate::FieldWriter<'a, REG, 13, u16>; #[doc = "Gain 3 MSBs\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GAIN3MSB_A { +pub enum Gain3msb { #[doc = "0: Upper 3 bits of gain = 011 (0.75x)"] - GAIN011 = 0, + Gain011 = 0, #[doc = "1: Upper 3 bits of gain = 100 (1.00x)"] - GAIN100 = 1, + Gain100 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GAIN3MSB_A) -> Self { + fn from(variant: Gain3msb) -> Self { variant as u8 != 0 } } -impl GAIN3MSB_R { +#[doc = "Field `GAIN3MSB` reader - Gain 3 MSBs"] +pub type Gain3msbR = crate::BitReader; +impl Gain3msbR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> GAIN3MSB_A { + pub const fn variant(&self) -> Gain3msb { match self.bits { - false => GAIN3MSB_A::GAIN011, - true => GAIN3MSB_A::GAIN100, + false => Gain3msb::Gain011, + true => Gain3msb::Gain100, } } - #[doc = "Checks if the value of the field is `GAIN011`"] + #[doc = "Upper 3 bits of gain = 011 (0.75x)"] #[inline(always)] pub fn is_gain011(&self) -> bool { - *self == GAIN3MSB_A::GAIN011 + *self == Gain3msb::Gain011 } - #[doc = "Checks if the value of the field is `GAIN100`"] + #[doc = "Upper 3 bits of gain = 100 (1.00x)"] #[inline(always)] pub fn is_gain100(&self) -> bool { - *self == GAIN3MSB_A::GAIN100 + *self == Gain3msb::Gain100 } } #[doc = "Field `GAIN3MSB` writer - Gain 3 MSBs"] -pub type GAIN3MSB_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCALE0_SPEC, GAIN3MSB_A, O>; -impl<'a, const O: u8> GAIN3MSB_W<'a, O> { +pub type Gain3msbW<'a, REG> = crate::BitWriter<'a, REG, Gain3msb>; +impl<'a, REG> Gain3msbW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Upper 3 bits of gain = 011 (0.75x)"] #[inline(always)] - pub fn gain011(self) -> &'a mut W { - self.variant(GAIN3MSB_A::GAIN011) + pub fn gain011(self) -> &'a mut crate::W { + self.variant(Gain3msb::Gain011) } #[doc = "Upper 3 bits of gain = 100 (1.00x)"] #[inline(always)] - pub fn gain100(self) -> &'a mut W { - self.variant(GAIN3MSB_A::GAIN100) + pub fn gain100(self) -> &'a mut crate::W { + self.variant(Gain3msb::Gain100) } } impl R { #[doc = "Bits 0:17 - Offset"] #[inline(always)] - pub fn offset(&self) -> OFFSET_R { - OFFSET_R::new(self.bits & 0x0003_ffff) + pub fn offset(&self) -> OffsetR { + OffsetR::new(self.bits & 0x0003_ffff) } #[doc = "Bits 18:30 - Gain 13 LSBs"] #[inline(always)] - pub fn gain13lsb(&self) -> GAIN13LSB_R { - GAIN13LSB_R::new(((self.bits >> 18) & 0x1fff) as u16) + pub fn gain13lsb(&self) -> Gain13lsbR { + Gain13lsbR::new(((self.bits >> 18) & 0x1fff) as u16) } #[doc = "Bit 31 - Gain 3 MSBs"] #[inline(always)] - pub fn gain3msb(&self) -> GAIN3MSB_R { - GAIN3MSB_R::new(((self.bits >> 31) & 1) != 0) + pub fn gain3msb(&self) -> Gain3msbR { + Gain3msbR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:17 - Offset"] #[inline(always)] #[must_use] - pub fn offset(&mut self) -> OFFSET_W<0> { - OFFSET_W::new(self) + pub fn offset(&mut self) -> OffsetW { + OffsetW::new(self, 0) } #[doc = "Bits 18:30 - Gain 13 LSBs"] #[inline(always)] #[must_use] - pub fn gain13lsb(&mut self) -> GAIN13LSB_W<18> { - GAIN13LSB_W::new(self) + pub fn gain13lsb(&mut self) -> Gain13lsbW { + Gain13lsbW::new(self, 18) } #[doc = "Bit 31 - Gain 3 MSBs"] #[inline(always)] #[must_use] - pub fn gain3msb(&mut self) -> GAIN3MSB_W<31> { - GAIN3MSB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn gain3msb(&mut self) -> Gain3msbW { + Gain3msbW::new(self, 31) } } -#[doc = "Scale\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scale0](index.html) module"] -pub struct SCALE0_SPEC; -impl crate::RegisterSpec for SCALE0_SPEC { +#[doc = "Scale\n\nYou can [`read`](crate::Reg::read) this register and get [`scale0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scale0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scale0Spec; +impl crate::RegisterSpec for Scale0Spec { type Ux = u32; } -#[doc = "`read()` method returns [scale0::R](R) reader structure"] -impl crate::Readable for SCALE0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scale0::W](W) writer structure"] -impl crate::Writable for SCALE0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scale0::R`](R) reader structure"] +impl crate::Readable for Scale0Spec {} +#[doc = "`write(|w| ..)` method takes [`scale0::W`](W) writer structure"] +impl crate::Writable for Scale0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCALE0 to value 0x8002_c000"] -impl crate::Resettable for SCALE0_SPEC { - const RESET_VALUE: Self::Ux = 0x8002_c000; +impl crate::Resettable for Scale0Spec { + const RESET_VALUE: u32 = 0x8002_c000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scale1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scale1.rs index ea4be3e..447c68c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scale1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scale1.rs @@ -1,156 +1,119 @@ #[doc = "Register `SCALE1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCALE1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OFFSET` reader - Offset"] -pub type OFFSET_R = crate::FieldReader; +pub type OffsetR = crate::FieldReader; #[doc = "Field `OFFSET` writer - Offset"] -pub type OFFSET_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCALE1_SPEC, u32, u32, 18, O>; +pub type OffsetW<'a, REG> = crate::FieldWriter<'a, REG, 18, u32>; #[doc = "Field `GAIN13LSB` reader - Gain 13 LSBs"] -pub type GAIN13LSB_R = crate::FieldReader; +pub type Gain13lsbR = crate::FieldReader; #[doc = "Field `GAIN13LSB` writer - Gain 13 LSBs"] -pub type GAIN13LSB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCALE1_SPEC, u16, u16, 13, O>; -#[doc = "Field `GAIN3MSB` reader - Gain 3 MSBs"] -pub type GAIN3MSB_R = crate::BitReader; +pub type Gain13lsbW<'a, REG> = crate::FieldWriter<'a, REG, 13, u16>; #[doc = "Gain 3 MSBs\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GAIN3MSB_A { +pub enum Gain3msb { #[doc = "0: Upper 3 bits of gain = 011 (0.75x)"] - GAIN011 = 0, + Gain011 = 0, #[doc = "1: Upper 3 bits of gain = 100 (1.00x)"] - GAIN100 = 1, + Gain100 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GAIN3MSB_A) -> Self { + fn from(variant: Gain3msb) -> Self { variant as u8 != 0 } } -impl GAIN3MSB_R { +#[doc = "Field `GAIN3MSB` reader - Gain 3 MSBs"] +pub type Gain3msbR = crate::BitReader; +impl Gain3msbR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> GAIN3MSB_A { + pub const fn variant(&self) -> Gain3msb { match self.bits { - false => GAIN3MSB_A::GAIN011, - true => GAIN3MSB_A::GAIN100, + false => Gain3msb::Gain011, + true => Gain3msb::Gain100, } } - #[doc = "Checks if the value of the field is `GAIN011`"] + #[doc = "Upper 3 bits of gain = 011 (0.75x)"] #[inline(always)] pub fn is_gain011(&self) -> bool { - *self == GAIN3MSB_A::GAIN011 + *self == Gain3msb::Gain011 } - #[doc = "Checks if the value of the field is `GAIN100`"] + #[doc = "Upper 3 bits of gain = 100 (1.00x)"] #[inline(always)] pub fn is_gain100(&self) -> bool { - *self == GAIN3MSB_A::GAIN100 + *self == Gain3msb::Gain100 } } #[doc = "Field `GAIN3MSB` writer - Gain 3 MSBs"] -pub type GAIN3MSB_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCALE1_SPEC, GAIN3MSB_A, O>; -impl<'a, const O: u8> GAIN3MSB_W<'a, O> { +pub type Gain3msbW<'a, REG> = crate::BitWriter<'a, REG, Gain3msb>; +impl<'a, REG> Gain3msbW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Upper 3 bits of gain = 011 (0.75x)"] #[inline(always)] - pub fn gain011(self) -> &'a mut W { - self.variant(GAIN3MSB_A::GAIN011) + pub fn gain011(self) -> &'a mut crate::W { + self.variant(Gain3msb::Gain011) } #[doc = "Upper 3 bits of gain = 100 (1.00x)"] #[inline(always)] - pub fn gain100(self) -> &'a mut W { - self.variant(GAIN3MSB_A::GAIN100) + pub fn gain100(self) -> &'a mut crate::W { + self.variant(Gain3msb::Gain100) } } impl R { #[doc = "Bits 0:17 - Offset"] #[inline(always)] - pub fn offset(&self) -> OFFSET_R { - OFFSET_R::new(self.bits & 0x0003_ffff) + pub fn offset(&self) -> OffsetR { + OffsetR::new(self.bits & 0x0003_ffff) } #[doc = "Bits 18:30 - Gain 13 LSBs"] #[inline(always)] - pub fn gain13lsb(&self) -> GAIN13LSB_R { - GAIN13LSB_R::new(((self.bits >> 18) & 0x1fff) as u16) + pub fn gain13lsb(&self) -> Gain13lsbR { + Gain13lsbR::new(((self.bits >> 18) & 0x1fff) as u16) } #[doc = "Bit 31 - Gain 3 MSBs"] #[inline(always)] - pub fn gain3msb(&self) -> GAIN3MSB_R { - GAIN3MSB_R::new(((self.bits >> 31) & 1) != 0) + pub fn gain3msb(&self) -> Gain3msbR { + Gain3msbR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:17 - Offset"] #[inline(always)] #[must_use] - pub fn offset(&mut self) -> OFFSET_W<0> { - OFFSET_W::new(self) + pub fn offset(&mut self) -> OffsetW { + OffsetW::new(self, 0) } #[doc = "Bits 18:30 - Gain 13 LSBs"] #[inline(always)] #[must_use] - pub fn gain13lsb(&mut self) -> GAIN13LSB_W<18> { - GAIN13LSB_W::new(self) + pub fn gain13lsb(&mut self) -> Gain13lsbW { + Gain13lsbW::new(self, 18) } #[doc = "Bit 31 - Gain 3 MSBs"] #[inline(always)] #[must_use] - pub fn gain3msb(&mut self) -> GAIN3MSB_W<31> { - GAIN3MSB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn gain3msb(&mut self) -> Gain3msbW { + Gain3msbW::new(self, 31) } } -#[doc = "Scale\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scale1](index.html) module"] -pub struct SCALE1_SPEC; -impl crate::RegisterSpec for SCALE1_SPEC { +#[doc = "Scale\n\nYou can [`read`](crate::Reg::read) this register and get [`scale1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scale1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scale1Spec; +impl crate::RegisterSpec for Scale1Spec { type Ux = u32; } -#[doc = "`read()` method returns [scale1::R](R) reader structure"] -impl crate::Readable for SCALE1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scale1::W](W) writer structure"] -impl crate::Writable for SCALE1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scale1::R`](R) reader structure"] +impl crate::Readable for Scale1Spec {} +#[doc = "`write(|w| ..)` method takes [`scale1::W`](W) writer structure"] +impl crate::Writable for Scale1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCALE1 to value 0x8002_c000"] -impl crate::Resettable for SCALE1_SPEC { - const RESET_VALUE: Self::Ux = 0x8002_c000; +impl crate::Resettable for Scale1Spec { + const RESET_VALUE: u32 = 0x8002_c000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan0.rs index cecaab4..48ac2b7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan0.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN0_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN0_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN0_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN0_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN0_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN0_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan0](index.html) module"] -pub struct SCAN0_SPEC; -impl crate::RegisterSpec for SCAN0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan0Spec; +impl crate::RegisterSpec for Scan0Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan0::R](R) reader structure"] -impl crate::Readable for SCAN0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan0::W](W) writer structure"] -impl crate::Writable for SCAN0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan0::R`](R) reader structure"] +impl crate::Readable for Scan0Spec {} +#[doc = "`write(|w| ..)` method takes [`scan0::W`](W) writer structure"] +impl crate::Writable for Scan0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN0 to value 0"] -impl crate::Resettable for SCAN0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan1.rs index 26eb4af..f6b58e2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan1.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN1_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN1_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN1_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN1_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN1_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN1_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan1](index.html) module"] -pub struct SCAN1_SPEC; -impl crate::RegisterSpec for SCAN1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan1Spec; +impl crate::RegisterSpec for Scan1Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan1::R](R) reader structure"] -impl crate::Readable for SCAN1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan1::W](W) writer structure"] -impl crate::Writable for SCAN1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan1::R`](R) reader structure"] +impl crate::Readable for Scan1Spec {} +#[doc = "`write(|w| ..)` method takes [`scan1::W`](W) writer structure"] +impl crate::Writable for Scan1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN1 to value 0"] -impl crate::Resettable for SCAN1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan10.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan10.rs index 110a952..24f23b0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan10.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan10.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN10` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN10` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN10_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN10_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN10_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN10_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN10_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN10_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan10](index.html) module"] -pub struct SCAN10_SPEC; -impl crate::RegisterSpec for SCAN10_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan10::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan10::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan10Spec; +impl crate::RegisterSpec for Scan10Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan10::R](R) reader structure"] -impl crate::Readable for SCAN10_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan10::W](W) writer structure"] -impl crate::Writable for SCAN10_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan10::R`](R) reader structure"] +impl crate::Readable for Scan10Spec {} +#[doc = "`write(|w| ..)` method takes [`scan10::W`](W) writer structure"] +impl crate::Writable for Scan10Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN10 to value 0"] -impl crate::Resettable for SCAN10_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan10Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan11.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan11.rs index e2e46e6..0986291 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan11.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan11.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN11` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN11` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN11_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN11_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN11_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN11_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN11_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN11_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan11](index.html) module"] -pub struct SCAN11_SPEC; -impl crate::RegisterSpec for SCAN11_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan11::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan11::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan11Spec; +impl crate::RegisterSpec for Scan11Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan11::R](R) reader structure"] -impl crate::Readable for SCAN11_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan11::W](W) writer structure"] -impl crate::Writable for SCAN11_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan11::R`](R) reader structure"] +impl crate::Readable for Scan11Spec {} +#[doc = "`write(|w| ..)` method takes [`scan11::W`](W) writer structure"] +impl crate::Writable for Scan11Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN11 to value 0"] -impl crate::Resettable for SCAN11_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan11Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan12.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan12.rs index 2db9ffc..613daef 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan12.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan12.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN12` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN12` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN12_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN12_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN12_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN12_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN12_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN12_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan12](index.html) module"] -pub struct SCAN12_SPEC; -impl crate::RegisterSpec for SCAN12_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan12::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan12::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan12Spec; +impl crate::RegisterSpec for Scan12Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan12::R](R) reader structure"] -impl crate::Readable for SCAN12_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan12::W](W) writer structure"] -impl crate::Writable for SCAN12_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan12::R`](R) reader structure"] +impl crate::Readable for Scan12Spec {} +#[doc = "`write(|w| ..)` method takes [`scan12::W`](W) writer structure"] +impl crate::Writable for Scan12Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN12 to value 0"] -impl crate::Resettable for SCAN12_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan12Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan13.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan13.rs index 38ffd59..6eb7786 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan13.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan13.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN13` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN13` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN13_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN13_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN13_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN13_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN13_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN13_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan13](index.html) module"] -pub struct SCAN13_SPEC; -impl crate::RegisterSpec for SCAN13_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan13::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan13::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan13Spec; +impl crate::RegisterSpec for Scan13Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan13::R](R) reader structure"] -impl crate::Readable for SCAN13_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan13::W](W) writer structure"] -impl crate::Writable for SCAN13_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan13::R`](R) reader structure"] +impl crate::Readable for Scan13Spec {} +#[doc = "`write(|w| ..)` method takes [`scan13::W`](W) writer structure"] +impl crate::Writable for Scan13Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN13 to value 0"] -impl crate::Resettable for SCAN13_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan13Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan14.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan14.rs index f1fa900..d761e04 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan14.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan14.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN14` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN14` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN14_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN14_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN14_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN14_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN14_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN14_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan14](index.html) module"] -pub struct SCAN14_SPEC; -impl crate::RegisterSpec for SCAN14_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan14::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan14::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan14Spec; +impl crate::RegisterSpec for Scan14Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan14::R](R) reader structure"] -impl crate::Readable for SCAN14_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan14::W](W) writer structure"] -impl crate::Writable for SCAN14_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan14::R`](R) reader structure"] +impl crate::Readable for Scan14Spec {} +#[doc = "`write(|w| ..)` method takes [`scan14::W`](W) writer structure"] +impl crate::Writable for Scan14Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN14 to value 0"] -impl crate::Resettable for SCAN14_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan14Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan15.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan15.rs index ba160bc..c55dd44 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan15.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan15.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN15` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN15` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN15_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN15_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN15_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN15_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN15_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN15_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan15](index.html) module"] -pub struct SCAN15_SPEC; -impl crate::RegisterSpec for SCAN15_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan15::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan15::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan15Spec; +impl crate::RegisterSpec for Scan15Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan15::R](R) reader structure"] -impl crate::Readable for SCAN15_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan15::W](W) writer structure"] -impl crate::Writable for SCAN15_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan15::R`](R) reader structure"] +impl crate::Readable for Scan15Spec {} +#[doc = "`write(|w| ..)` method takes [`scan15::W`](W) writer structure"] +impl crate::Writable for Scan15Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN15 to value 0"] -impl crate::Resettable for SCAN15_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan15Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan2.rs index 30b842c..a1815f9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan2.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN2_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN2_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN2_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN2_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN2_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN2_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan2](index.html) module"] -pub struct SCAN2_SPEC; -impl crate::RegisterSpec for SCAN2_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan2Spec; +impl crate::RegisterSpec for Scan2Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan2::R](R) reader structure"] -impl crate::Readable for SCAN2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan2::W](W) writer structure"] -impl crate::Writable for SCAN2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan2::R`](R) reader structure"] +impl crate::Readable for Scan2Spec {} +#[doc = "`write(|w| ..)` method takes [`scan2::W`](W) writer structure"] +impl crate::Writable for Scan2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN2 to value 0"] -impl crate::Resettable for SCAN2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan3.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan3.rs index 63b04c2..ad7dda2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan3.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan3.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN3` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN3_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN3_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN3_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN3_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN3_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN3_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan3](index.html) module"] -pub struct SCAN3_SPEC; -impl crate::RegisterSpec for SCAN3_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan3Spec; +impl crate::RegisterSpec for Scan3Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan3::R](R) reader structure"] -impl crate::Readable for SCAN3_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan3::W](W) writer structure"] -impl crate::Writable for SCAN3_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan3::R`](R) reader structure"] +impl crate::Readable for Scan3Spec {} +#[doc = "`write(|w| ..)` method takes [`scan3::W`](W) writer structure"] +impl crate::Writable for Scan3Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN3 to value 0"] -impl crate::Resettable for SCAN3_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan3Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan4.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan4.rs index bb682c7..0e3f0e8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan4.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan4.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN4` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN4` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN4_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN4_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN4_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN4_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN4_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN4_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan4](index.html) module"] -pub struct SCAN4_SPEC; -impl crate::RegisterSpec for SCAN4_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan4::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan4::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan4Spec; +impl crate::RegisterSpec for Scan4Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan4::R](R) reader structure"] -impl crate::Readable for SCAN4_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan4::W](W) writer structure"] -impl crate::Writable for SCAN4_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan4::R`](R) reader structure"] +impl crate::Readable for Scan4Spec {} +#[doc = "`write(|w| ..)` method takes [`scan4::W`](W) writer structure"] +impl crate::Writable for Scan4Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN4 to value 0"] -impl crate::Resettable for SCAN4_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan4Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan5.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan5.rs index 0237bfd..986700e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan5.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan5.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN5` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN5` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN5_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN5_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN5_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN5_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN5_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN5_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan5](index.html) module"] -pub struct SCAN5_SPEC; -impl crate::RegisterSpec for SCAN5_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan5::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan5::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan5Spec; +impl crate::RegisterSpec for Scan5Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan5::R](R) reader structure"] -impl crate::Readable for SCAN5_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan5::W](W) writer structure"] -impl crate::Writable for SCAN5_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan5::R`](R) reader structure"] +impl crate::Readable for Scan5Spec {} +#[doc = "`write(|w| ..)` method takes [`scan5::W`](W) writer structure"] +impl crate::Writable for Scan5Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN5 to value 0"] -impl crate::Resettable for SCAN5_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan5Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan6.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan6.rs index ea465ed..98025b2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan6.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan6.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN6` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN6` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN6_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN6_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN6_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN6_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN6_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN6_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan6](index.html) module"] -pub struct SCAN6_SPEC; -impl crate::RegisterSpec for SCAN6_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan6::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan6::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan6Spec; +impl crate::RegisterSpec for Scan6Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan6::R](R) reader structure"] -impl crate::Readable for SCAN6_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan6::W](W) writer structure"] -impl crate::Writable for SCAN6_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan6::R`](R) reader structure"] +impl crate::Readable for Scan6Spec {} +#[doc = "`write(|w| ..)` method takes [`scan6::W`](W) writer structure"] +impl crate::Writable for Scan6Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN6 to value 0"] -impl crate::Resettable for SCAN6_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan6Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan7.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan7.rs index 8cfbfd3..7ea7eb7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan7.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan7.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN7` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN7` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN7_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN7_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN7_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN7_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN7_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN7_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan7](index.html) module"] -pub struct SCAN7_SPEC; -impl crate::RegisterSpec for SCAN7_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan7::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan7::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan7Spec; +impl crate::RegisterSpec for Scan7Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan7::R](R) reader structure"] -impl crate::Readable for SCAN7_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan7::W](W) writer structure"] -impl crate::Writable for SCAN7_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan7::R`](R) reader structure"] +impl crate::Readable for Scan7Spec {} +#[doc = "`write(|w| ..)` method takes [`scan7::W`](W) writer structure"] +impl crate::Writable for Scan7Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN7 to value 0"] -impl crate::Resettable for SCAN7_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan7Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan8.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan8.rs index c655b8c..ad0fa0f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan8.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan8.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN8` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN8` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN8_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN8_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN8_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN8_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN8_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN8_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan8](index.html) module"] -pub struct SCAN8_SPEC; -impl crate::RegisterSpec for SCAN8_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan8::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan8::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan8Spec; +impl crate::RegisterSpec for Scan8Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan8::R](R) reader structure"] -impl crate::Readable for SCAN8_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan8::W](W) writer structure"] -impl crate::Writable for SCAN8_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan8::R`](R) reader structure"] +impl crate::Readable for Scan8Spec {} +#[doc = "`write(|w| ..)` method takes [`scan8::W`](W) writer structure"] +impl crate::Writable for Scan8Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN8 to value 0"] -impl crate::Resettable for SCAN8_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan8Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan9.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan9.rs index 724e10f..92aa0ad 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan9.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scan9.rs @@ -1,440 +1,393 @@ #[doc = "Register `SCAN9` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCAN9` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN9_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN9_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN9_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN9_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN9_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN9_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan9](index.html) module"] -pub struct SCAN9_SPEC; -impl crate::RegisterSpec for SCAN9_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`scan9::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scan9::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Scan9Spec; +impl crate::RegisterSpec for Scan9Spec { type Ux = u32; } -#[doc = "`read()` method returns [scan9::R](R) reader structure"] -impl crate::Readable for SCAN9_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scan9::W](W) writer structure"] -impl crate::Writable for SCAN9_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scan9::R`](R) reader structure"] +impl crate::Readable for Scan9Spec {} +#[doc = "`write(|w| ..)` method takes [`scan9::W`](W) writer structure"] +impl crate::Writable for Scan9Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCAN9 to value 0"] -impl crate::Resettable for SCAN9_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Scan9Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scandata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scandata.rs index 3e42357..715b820 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scandata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scandata.rs @@ -1,37 +1,22 @@ #[doc = "Register `SCANDATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DATA` reader - Data"] -pub type DATA_R = crate::FieldReader; +pub type DataR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Data"] #[inline(always)] - pub fn data(&self) -> DATA_R { - DATA_R::new(self.bits) + pub fn data(&self) -> DataR { + DataR::new(self.bits) } } -#[doc = "Most recent data data from scan queue conversion\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scandata](index.html) module"] -pub struct SCANDATA_SPEC; -impl crate::RegisterSpec for SCANDATA_SPEC { +#[doc = "Most recent data data from scan queue conversion\n\nYou can [`read`](crate::Reg::read) this register and get [`scandata::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ScandataSpec; +impl crate::RegisterSpec for ScandataSpec { type Ux = u32; } -#[doc = "`read()` method returns [scandata::R](R) reader structure"] -impl crate::Readable for SCANDATA_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`scandata::R`](R) reader structure"] +impl crate::Readable for ScandataSpec {} #[doc = "`reset()` method sets SCANDATA to value 0"] -impl crate::Resettable for SCANDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ScandataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scanfifocfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scanfifocfg.rs index d10cbda..eab98d5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scanfifocfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scanfifocfg.rs @@ -1,400 +1,376 @@ #[doc = "Register `SCANFIFOCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCANFIFOCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ALIGNMENT` reader - Alignment"] -pub type ALIGNMENT_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Alignment\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ALIGNMENT_A { +pub enum Alignment { #[doc = "0: ID\\[7:0\\], SIGN_EXT, DATA\\[11:0\\]"] - RIGHT12 = 0, + Right12 = 0, #[doc = "1: ID\\[7:0\\], SIGN_EXT, DATA\\[15:0\\]"] - RIGHT16 = 1, + Right16 = 1, #[doc = "2: ID\\[7:0\\], SIGN_EXT, DATA\\[19:0\\]"] - RIGHT20 = 2, + Right20 = 2, #[doc = "3: DATA\\[11:0\\], 000000000000, ID\\[7:0\\]"] - LEFT12 = 3, + Left12 = 3, #[doc = "4: DATA\\[15:0\\], 00000000, ID\\[7:0\\]"] - LEFT16 = 4, + Left16 = 4, #[doc = "5: DATA\\[19:0\\], 0000, ID\\[7:0\\]"] - LEFT20 = 5, + Left20 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ALIGNMENT_A) -> Self { + fn from(variant: Alignment) -> Self { variant as _ } } -impl ALIGNMENT_R { +impl crate::FieldSpec for Alignment { + type Ux = u8; +} +impl crate::IsEnum for Alignment {} +#[doc = "Field `ALIGNMENT` reader - Alignment"] +pub type AlignmentR = crate::FieldReader; +impl AlignmentR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ALIGNMENT_A::RIGHT12), - 1 => Some(ALIGNMENT_A::RIGHT16), - 2 => Some(ALIGNMENT_A::RIGHT20), - 3 => Some(ALIGNMENT_A::LEFT12), - 4 => Some(ALIGNMENT_A::LEFT16), - 5 => Some(ALIGNMENT_A::LEFT20), + 0 => Some(Alignment::Right12), + 1 => Some(Alignment::Right16), + 2 => Some(Alignment::Right20), + 3 => Some(Alignment::Left12), + 4 => Some(Alignment::Left16), + 5 => Some(Alignment::Left20), _ => None, } } - #[doc = "Checks if the value of the field is `RIGHT12`"] + #[doc = "ID\\[7:0\\], SIGN_EXT, DATA\\[11:0\\]"] #[inline(always)] pub fn is_right12(&self) -> bool { - *self == ALIGNMENT_A::RIGHT12 + *self == Alignment::Right12 } - #[doc = "Checks if the value of the field is `RIGHT16`"] + #[doc = "ID\\[7:0\\], SIGN_EXT, DATA\\[15:0\\]"] #[inline(always)] pub fn is_right16(&self) -> bool { - *self == ALIGNMENT_A::RIGHT16 + *self == Alignment::Right16 } - #[doc = "Checks if the value of the field is `RIGHT20`"] + #[doc = "ID\\[7:0\\], SIGN_EXT, DATA\\[19:0\\]"] #[inline(always)] pub fn is_right20(&self) -> bool { - *self == ALIGNMENT_A::RIGHT20 + *self == Alignment::Right20 } - #[doc = "Checks if the value of the field is `LEFT12`"] + #[doc = "DATA\\[11:0\\], 000000000000, ID\\[7:0\\]"] #[inline(always)] pub fn is_left12(&self) -> bool { - *self == ALIGNMENT_A::LEFT12 + *self == Alignment::Left12 } - #[doc = "Checks if the value of the field is `LEFT16`"] + #[doc = "DATA\\[15:0\\], 00000000, ID\\[7:0\\]"] #[inline(always)] pub fn is_left16(&self) -> bool { - *self == ALIGNMENT_A::LEFT16 + *self == Alignment::Left16 } - #[doc = "Checks if the value of the field is `LEFT20`"] + #[doc = "DATA\\[19:0\\], 0000, ID\\[7:0\\]"] #[inline(always)] pub fn is_left20(&self) -> bool { - *self == ALIGNMENT_A::LEFT20 + *self == Alignment::Left20 } } #[doc = "Field `ALIGNMENT` writer - Alignment"] -pub type ALIGNMENT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SCANFIFOCFG_SPEC, u8, ALIGNMENT_A, 3, O>; -impl<'a, const O: u8> ALIGNMENT_W<'a, O> { +pub type AlignmentW<'a, REG> = crate::FieldWriter<'a, REG, 3, Alignment>; +impl<'a, REG> AlignmentW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "ID\\[7:0\\], SIGN_EXT, DATA\\[11:0\\]"] #[inline(always)] - pub fn right12(self) -> &'a mut W { - self.variant(ALIGNMENT_A::RIGHT12) + pub fn right12(self) -> &'a mut crate::W { + self.variant(Alignment::Right12) } #[doc = "ID\\[7:0\\], SIGN_EXT, DATA\\[15:0\\]"] #[inline(always)] - pub fn right16(self) -> &'a mut W { - self.variant(ALIGNMENT_A::RIGHT16) + pub fn right16(self) -> &'a mut crate::W { + self.variant(Alignment::Right16) } #[doc = "ID\\[7:0\\], SIGN_EXT, DATA\\[19:0\\]"] #[inline(always)] - pub fn right20(self) -> &'a mut W { - self.variant(ALIGNMENT_A::RIGHT20) + pub fn right20(self) -> &'a mut crate::W { + self.variant(Alignment::Right20) } #[doc = "DATA\\[11:0\\], 000000000000, ID\\[7:0\\]"] #[inline(always)] - pub fn left12(self) -> &'a mut W { - self.variant(ALIGNMENT_A::LEFT12) + pub fn left12(self) -> &'a mut crate::W { + self.variant(Alignment::Left12) } #[doc = "DATA\\[15:0\\], 00000000, ID\\[7:0\\]"] #[inline(always)] - pub fn left16(self) -> &'a mut W { - self.variant(ALIGNMENT_A::LEFT16) + pub fn left16(self) -> &'a mut crate::W { + self.variant(Alignment::Left16) } #[doc = "DATA\\[19:0\\], 0000, ID\\[7:0\\]"] #[inline(always)] - pub fn left20(self) -> &'a mut W { - self.variant(ALIGNMENT_A::LEFT20) + pub fn left20(self) -> &'a mut crate::W { + self.variant(Alignment::Left20) } } #[doc = "Field `SHOWID` reader - Show ID"] -pub type SHOWID_R = crate::BitReader; +pub type ShowidR = crate::BitReader; #[doc = "Field `SHOWID` writer - Show ID"] -pub type SHOWID_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCANFIFOCFG_SPEC, bool, O>; -#[doc = "Field `DVL` reader - Data Valid Level"] -pub type DVL_R = crate::FieldReader; +pub type ShowidW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Data Valid Level\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DVL_A { +pub enum Dvl { #[doc = "0: When 1 entry in the scan FIFO is valid, set the SCANFIFODVL interrupt and request DMA."] - VALID1 = 0, + Valid1 = 0, #[doc = "1: When 2 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] - VALID2 = 1, + Valid2 = 1, #[doc = "2: When 3 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] - VALID3 = 2, + Valid3 = 2, #[doc = "3: When 4 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] - VALID4 = 3, + Valid4 = 3, #[doc = "4: When 5 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] - VALID5 = 4, + Valid5 = 4, #[doc = "5: When 6 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] - VALID6 = 5, + Valid6 = 5, #[doc = "6: When 7 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] - VALID7 = 6, + Valid7 = 6, #[doc = "7: When 8 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] - VALID8 = 7, + Valid8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DVL_A) -> Self { + fn from(variant: Dvl) -> Self { variant as _ } } -impl DVL_R { +impl crate::FieldSpec for Dvl { + type Ux = u8; +} +impl crate::IsEnum for Dvl {} +#[doc = "Field `DVL` reader - Data Valid Level"] +pub type DvlR = crate::FieldReader; +impl DvlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DVL_A { + pub const fn variant(&self) -> Dvl { match self.bits { - 0 => DVL_A::VALID1, - 1 => DVL_A::VALID2, - 2 => DVL_A::VALID3, - 3 => DVL_A::VALID4, - 4 => DVL_A::VALID5, - 5 => DVL_A::VALID6, - 6 => DVL_A::VALID7, - 7 => DVL_A::VALID8, + 0 => Dvl::Valid1, + 1 => Dvl::Valid2, + 2 => Dvl::Valid3, + 3 => Dvl::Valid4, + 4 => Dvl::Valid5, + 5 => Dvl::Valid6, + 6 => Dvl::Valid7, + 7 => Dvl::Valid8, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `VALID1`"] + #[doc = "When 1 entry in the scan FIFO is valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid1(&self) -> bool { - *self == DVL_A::VALID1 + *self == Dvl::Valid1 } - #[doc = "Checks if the value of the field is `VALID2`"] + #[doc = "When 2 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid2(&self) -> bool { - *self == DVL_A::VALID2 + *self == Dvl::Valid2 } - #[doc = "Checks if the value of the field is `VALID3`"] + #[doc = "When 3 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid3(&self) -> bool { - *self == DVL_A::VALID3 + *self == Dvl::Valid3 } - #[doc = "Checks if the value of the field is `VALID4`"] + #[doc = "When 4 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid4(&self) -> bool { - *self == DVL_A::VALID4 + *self == Dvl::Valid4 } - #[doc = "Checks if the value of the field is `VALID5`"] + #[doc = "When 5 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid5(&self) -> bool { - *self == DVL_A::VALID5 + *self == Dvl::Valid5 } - #[doc = "Checks if the value of the field is `VALID6`"] + #[doc = "When 6 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid6(&self) -> bool { - *self == DVL_A::VALID6 + *self == Dvl::Valid6 } - #[doc = "Checks if the value of the field is `VALID7`"] + #[doc = "When 7 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid7(&self) -> bool { - *self == DVL_A::VALID7 + *self == Dvl::Valid7 } - #[doc = "Checks if the value of the field is `VALID8`"] + #[doc = "When 8 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid8(&self) -> bool { - *self == DVL_A::VALID8 + *self == Dvl::Valid8 } } #[doc = "Field `DVL` writer - Data Valid Level"] -pub type DVL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, SCANFIFOCFG_SPEC, u8, DVL_A, 3, O>; -impl<'a, const O: u8> DVL_W<'a, O> { +pub type DvlW<'a, REG> = crate::FieldWriter<'a, REG, 3, Dvl, crate::Safe>; +impl<'a, REG> DvlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "When 1 entry in the scan FIFO is valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid1(self) -> &'a mut W { - self.variant(DVL_A::VALID1) + pub fn valid1(self) -> &'a mut crate::W { + self.variant(Dvl::Valid1) } #[doc = "When 2 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid2(self) -> &'a mut W { - self.variant(DVL_A::VALID2) + pub fn valid2(self) -> &'a mut crate::W { + self.variant(Dvl::Valid2) } #[doc = "When 3 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid3(self) -> &'a mut W { - self.variant(DVL_A::VALID3) + pub fn valid3(self) -> &'a mut crate::W { + self.variant(Dvl::Valid3) } #[doc = "When 4 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid4(self) -> &'a mut W { - self.variant(DVL_A::VALID4) + pub fn valid4(self) -> &'a mut crate::W { + self.variant(Dvl::Valid4) } #[doc = "When 5 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid5(self) -> &'a mut W { - self.variant(DVL_A::VALID5) + pub fn valid5(self) -> &'a mut crate::W { + self.variant(Dvl::Valid5) } #[doc = "When 6 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid6(self) -> &'a mut W { - self.variant(DVL_A::VALID6) + pub fn valid6(self) -> &'a mut crate::W { + self.variant(Dvl::Valid6) } #[doc = "When 7 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid7(self) -> &'a mut W { - self.variant(DVL_A::VALID7) + pub fn valid7(self) -> &'a mut crate::W { + self.variant(Dvl::Valid7) } #[doc = "When 8 entries in the scan FIFO are valid, set the SCANFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid8(self) -> &'a mut W { - self.variant(DVL_A::VALID8) + pub fn valid8(self) -> &'a mut crate::W { + self.variant(Dvl::Valid8) } } -#[doc = "Field `DMAWUFIFOSCAN` reader - Scan FIFO DMA Wakeup"] -pub type DMAWUFIFOSCAN_R = crate::BitReader; #[doc = "Scan FIFO DMA Wakeup\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DMAWUFIFOSCAN_A { +pub enum Dmawufifoscan { #[doc = "0: While in EM2 or EM3, the DMA controller will not be requested."] - DISABLED = 0, + Disabled = 0, #[doc = "1: While in EM2 or EM3, the DMA controller will be requested when the scan FIFO reaches its Data Valid Level. \\[DVL must be set to 0 (VALID1).\\]"] - ENABLED = 1, + Enabled = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DMAWUFIFOSCAN_A) -> Self { + fn from(variant: Dmawufifoscan) -> Self { variant as u8 != 0 } } -impl DMAWUFIFOSCAN_R { +#[doc = "Field `DMAWUFIFOSCAN` reader - Scan FIFO DMA Wakeup"] +pub type DmawufifoscanR = crate::BitReader; +impl DmawufifoscanR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DMAWUFIFOSCAN_A { + pub const fn variant(&self) -> Dmawufifoscan { match self.bits { - false => DMAWUFIFOSCAN_A::DISABLED, - true => DMAWUFIFOSCAN_A::ENABLED, + false => Dmawufifoscan::Disabled, + true => Dmawufifoscan::Enabled, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "While in EM2 or EM3, the DMA controller will not be requested."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == DMAWUFIFOSCAN_A::DISABLED + *self == Dmawufifoscan::Disabled } - #[doc = "Checks if the value of the field is `ENABLED`"] + #[doc = "While in EM2 or EM3, the DMA controller will be requested when the scan FIFO reaches its Data Valid Level. \\[DVL must be set to 0 (VALID1).\\]"] #[inline(always)] pub fn is_enabled(&self) -> bool { - *self == DMAWUFIFOSCAN_A::ENABLED + *self == Dmawufifoscan::Enabled } } #[doc = "Field `DMAWUFIFOSCAN` writer - Scan FIFO DMA Wakeup"] -pub type DMAWUFIFOSCAN_W<'a, const O: u8> = - crate::BitWriter<'a, u32, SCANFIFOCFG_SPEC, DMAWUFIFOSCAN_A, O>; -impl<'a, const O: u8> DMAWUFIFOSCAN_W<'a, O> { +pub type DmawufifoscanW<'a, REG> = crate::BitWriter<'a, REG, Dmawufifoscan>; +impl<'a, REG> DmawufifoscanW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "While in EM2 or EM3, the DMA controller will not be requested."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(DMAWUFIFOSCAN_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Dmawufifoscan::Disabled) } #[doc = "While in EM2 or EM3, the DMA controller will be requested when the scan FIFO reaches its Data Valid Level. \\[DVL must be set to 0 (VALID1).\\]"] #[inline(always)] - pub fn enabled(self) -> &'a mut W { - self.variant(DMAWUFIFOSCAN_A::ENABLED) + pub fn enabled(self) -> &'a mut crate::W { + self.variant(Dmawufifoscan::Enabled) } } impl R { #[doc = "Bits 0:2 - Alignment"] #[inline(always)] - pub fn alignment(&self) -> ALIGNMENT_R { - ALIGNMENT_R::new((self.bits & 7) as u8) + pub fn alignment(&self) -> AlignmentR { + AlignmentR::new((self.bits & 7) as u8) } #[doc = "Bit 3 - Show ID"] #[inline(always)] - pub fn showid(&self) -> SHOWID_R { - SHOWID_R::new(((self.bits >> 3) & 1) != 0) + pub fn showid(&self) -> ShowidR { + ShowidR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:6 - Data Valid Level"] #[inline(always)] - pub fn dvl(&self) -> DVL_R { - DVL_R::new(((self.bits >> 4) & 7) as u8) + pub fn dvl(&self) -> DvlR { + DvlR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bit 8 - Scan FIFO DMA Wakeup"] #[inline(always)] - pub fn dmawufifoscan(&self) -> DMAWUFIFOSCAN_R { - DMAWUFIFOSCAN_R::new(((self.bits >> 8) & 1) != 0) + pub fn dmawufifoscan(&self) -> DmawufifoscanR { + DmawufifoscanR::new(((self.bits >> 8) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Alignment"] #[inline(always)] #[must_use] - pub fn alignment(&mut self) -> ALIGNMENT_W<0> { - ALIGNMENT_W::new(self) + pub fn alignment(&mut self) -> AlignmentW { + AlignmentW::new(self, 0) } #[doc = "Bit 3 - Show ID"] #[inline(always)] #[must_use] - pub fn showid(&mut self) -> SHOWID_W<3> { - SHOWID_W::new(self) + pub fn showid(&mut self) -> ShowidW { + ShowidW::new(self, 3) } #[doc = "Bits 4:6 - Data Valid Level"] #[inline(always)] #[must_use] - pub fn dvl(&mut self) -> DVL_W<4> { - DVL_W::new(self) + pub fn dvl(&mut self) -> DvlW { + DvlW::new(self, 4) } #[doc = "Bit 8 - Scan FIFO DMA Wakeup"] #[inline(always)] #[must_use] - pub fn dmawufifoscan(&mut self) -> DMAWUFIFOSCAN_W<8> { - DMAWUFIFOSCAN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dmawufifoscan(&mut self) -> DmawufifoscanW { + DmawufifoscanW::new(self, 8) } } -#[doc = "SCAN FIFO configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scanfifocfg](index.html) module"] -pub struct SCANFIFOCFG_SPEC; -impl crate::RegisterSpec for SCANFIFOCFG_SPEC { +#[doc = "SCAN FIFO configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`scanfifocfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scanfifocfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ScanfifocfgSpec; +impl crate::RegisterSpec for ScanfifocfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [scanfifocfg::R](R) reader structure"] -impl crate::Readable for SCANFIFOCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [scanfifocfg::W](W) writer structure"] -impl crate::Writable for SCANFIFOCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`scanfifocfg::R`](R) reader structure"] +impl crate::Readable for ScanfifocfgSpec {} +#[doc = "`write(|w| ..)` method takes [`scanfifocfg::W`](W) writer structure"] +impl crate::Writable for ScanfifocfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCANFIFOCFG to value 0x30"] -impl crate::Resettable for SCANFIFOCFG_SPEC { - const RESET_VALUE: Self::Ux = 0x30; +impl crate::Resettable for ScanfifocfgSpec { + const RESET_VALUE: u32 = 0x30; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scanfifodata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scanfifodata.rs index 8e206bf..86b0ede 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scanfifodata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scanfifodata.rs @@ -1,37 +1,22 @@ #[doc = "Register `SCANFIFODATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DATA` reader - Data"] -pub type DATA_R = crate::FieldReader; +pub type DataR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Data"] #[inline(always)] - pub fn data(&self) -> DATA_R { - DATA_R::new(self.bits) + pub fn data(&self) -> DataR { + DataR::new(self.bits) } } -#[doc = "Read the oldest valid data from the scan FIFO and pop the FIFO\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scanfifodata](index.html) module"] -pub struct SCANFIFODATA_SPEC; -impl crate::RegisterSpec for SCANFIFODATA_SPEC { +#[doc = "Read the oldest valid data from the scan FIFO and pop the FIFO\n\nYou can [`read`](crate::Reg::read) this register and get [`scanfifodata::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ScanfifodataSpec; +impl crate::RegisterSpec for ScanfifodataSpec { type Ux = u32; } -#[doc = "`read()` method returns [scanfifodata::R](R) reader structure"] -impl crate::Readable for SCANFIFODATA_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`scanfifodata::R`](R) reader structure"] +impl crate::Readable for ScanfifodataSpec {} #[doc = "`reset()` method sets SCANFIFODATA to value 0"] -impl crate::Resettable for SCANFIFODATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ScanfifodataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scanfifostat.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scanfifostat.rs index d57a45c..ee7ad40 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scanfifostat.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/scanfifostat.rs @@ -1,37 +1,22 @@ #[doc = "Register `SCANFIFOSTAT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `FIFOREADCNT` reader - FIFO Read Count"] -pub type FIFOREADCNT_R = crate::FieldReader; +pub type FiforeadcntR = crate::FieldReader; impl R { #[doc = "Bits 0:3 - FIFO Read Count"] #[inline(always)] - pub fn fiforeadcnt(&self) -> FIFOREADCNT_R { - FIFOREADCNT_R::new((self.bits & 0x0f) as u8) + pub fn fiforeadcnt(&self) -> FiforeadcntR { + FiforeadcntR::new((self.bits & 0x0f) as u8) } } -#[doc = "Scan FIFO status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scanfifostat](index.html) module"] -pub struct SCANFIFOSTAT_SPEC; -impl crate::RegisterSpec for SCANFIFOSTAT_SPEC { +#[doc = "Scan FIFO status\n\nYou can [`read`](crate::Reg::read) this register and get [`scanfifostat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ScanfifostatSpec; +impl crate::RegisterSpec for ScanfifostatSpec { type Ux = u32; } -#[doc = "`read()` method returns [scanfifostat::R](R) reader structure"] -impl crate::Readable for SCANFIFOSTAT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`scanfifostat::R`](R) reader structure"] +impl crate::Readable for ScanfifostatSpec {} #[doc = "`reset()` method sets SCANFIFOSTAT to value 0"] -impl crate::Resettable for SCANFIFOSTAT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ScanfifostatSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/sched0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/sched0.rs index 890345c..3253017 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/sched0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/sched0.rs @@ -1,80 +1,40 @@ #[doc = "Register `SCHED0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCHED0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRESCALE` reader - Prescale"] -pub type PRESCALE_R = crate::FieldReader; +pub type PrescaleR = crate::FieldReader; #[doc = "Field `PRESCALE` writer - Prescale"] -pub type PRESCALE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCHED0_SPEC, u16, u16, 10, O>; +pub type PrescaleW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; impl R { #[doc = "Bits 0:9 - Prescale"] #[inline(always)] - pub fn prescale(&self) -> PRESCALE_R { - PRESCALE_R::new((self.bits & 0x03ff) as u16) + pub fn prescale(&self) -> PrescaleR { + PrescaleR::new((self.bits & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:9 - Prescale"] #[inline(always)] #[must_use] - pub fn prescale(&mut self) -> PRESCALE_W<0> { - PRESCALE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prescale(&mut self) -> PrescaleW { + PrescaleW::new(self, 0) } } -#[doc = "Scheduling\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sched0](index.html) module"] -pub struct SCHED0_SPEC; -impl crate::RegisterSpec for SCHED0_SPEC { +#[doc = "Scheduling\n\nYou can [`read`](crate::Reg::read) this register and get [`sched0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sched0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Sched0Spec; +impl crate::RegisterSpec for Sched0Spec { type Ux = u32; } -#[doc = "`read()` method returns [sched0::R](R) reader structure"] -impl crate::Readable for SCHED0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sched0::W](W) writer structure"] -impl crate::Writable for SCHED0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`sched0::R`](R) reader structure"] +impl crate::Readable for Sched0Spec {} +#[doc = "`write(|w| ..)` method takes [`sched0::W`](W) writer structure"] +impl crate::Writable for Sched0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCHED0 to value 0"] -impl crate::Resettable for SCHED0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Sched0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/sched1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/sched1.rs index b20920a..8e25638 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/sched1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/sched1.rs @@ -1,80 +1,40 @@ #[doc = "Register `SCHED1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SCHED1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRESCALE` reader - Prescale"] -pub type PRESCALE_R = crate::FieldReader; +pub type PrescaleR = crate::FieldReader; #[doc = "Field `PRESCALE` writer - Prescale"] -pub type PRESCALE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCHED1_SPEC, u16, u16, 10, O>; +pub type PrescaleW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; impl R { #[doc = "Bits 0:9 - Prescale"] #[inline(always)] - pub fn prescale(&self) -> PRESCALE_R { - PRESCALE_R::new((self.bits & 0x03ff) as u16) + pub fn prescale(&self) -> PrescaleR { + PrescaleR::new((self.bits & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:9 - Prescale"] #[inline(always)] #[must_use] - pub fn prescale(&mut self) -> PRESCALE_W<0> { - PRESCALE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prescale(&mut self) -> PrescaleW { + PrescaleW::new(self, 0) } } -#[doc = "Scheduling\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sched1](index.html) module"] -pub struct SCHED1_SPEC; -impl crate::RegisterSpec for SCHED1_SPEC { +#[doc = "Scheduling\n\nYou can [`read`](crate::Reg::read) this register and get [`sched1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sched1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Sched1Spec; +impl crate::RegisterSpec for Sched1Spec { type Ux = u32; } -#[doc = "`read()` method returns [sched1::R](R) reader structure"] -impl crate::Readable for SCHED1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sched1::W](W) writer structure"] -impl crate::Writable for SCHED1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`sched1::R`](R) reader structure"] +impl crate::Readable for Sched1Spec {} +#[doc = "`write(|w| ..)` method takes [`sched1::W`](W) writer structure"] +impl crate::Writable for Sched1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCHED1 to value 0"] -impl crate::Resettable for SCHED1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Sched1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/single.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/single.rs index de2a9cd..01035ed 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/single.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/single.rs @@ -1,440 +1,393 @@ #[doc = "Register `SINGLE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SINGLE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PINNEG` reader - Negative Pin Select"] -pub type PINNEG_R = crate::FieldReader; +pub type PinnegR = crate::FieldReader; #[doc = "Field `PINNEG` writer - Negative Pin Select"] -pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SINGLE_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTNEG` reader - Negative Port Select"] -pub type PORTNEG_R = crate::FieldReader; +pub type PinnegW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Negative Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTNEG_A { +pub enum Portneg { #[doc = "0: Ground (single-ended)"] - GND = 0, + Gnd = 0, #[doc = "2: Direct connection to DAC0_CH1"] - DAC1 = 2, - #[doc = "4: Direct connection to AIN1 input pin"] - PADANA1 = 4, + Dac1 = 2, #[doc = "8: Port A - Select pin number using PINNEG"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINNEG"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINNEG"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINNEG"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTNEG_A) -> Self { + fn from(variant: Portneg) -> Self { variant as _ } } -impl PORTNEG_R { +impl crate::FieldSpec for Portneg { + type Ux = u8; +} +impl crate::IsEnum for Portneg {} +#[doc = "Field `PORTNEG` reader - Negative Port Select"] +pub type PortnegR = crate::FieldReader; +impl PortnegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTNEG_A::GND), - 2 => Some(PORTNEG_A::DAC1), - 4 => Some(PORTNEG_A::PADANA1), - 8 => Some(PORTNEG_A::PORTA), - 9 => Some(PORTNEG_A::PORTB), - 10 => Some(PORTNEG_A::PORTC), - 11 => Some(PORTNEG_A::PORTD), + 0 => Some(Portneg::Gnd), + 2 => Some(Portneg::Dac1), + 8 => Some(Portneg::Porta), + 9 => Some(Portneg::Portb), + 10 => Some(Portneg::Portc), + 11 => Some(Portneg::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground (single-ended)"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTNEG_A::GND + *self == Portneg::Gnd } - #[doc = "Checks if the value of the field is `DAC1`"] + #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] pub fn is_dac1(&self) -> bool { - *self == PORTNEG_A::DAC1 - } - #[doc = "Checks if the value of the field is `PADANA1`"] - #[inline(always)] - pub fn is_padana1(&self) -> bool { - *self == PORTNEG_A::PADANA1 + *self == Portneg::Dac1 } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTNEG_A::PORTA + *self == Portneg::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTNEG_A::PORTB + *self == Portneg::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTNEG_A::PORTC + *self == Portneg::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTNEG_A::PORTD + *self == Portneg::Portd } } #[doc = "Field `PORTNEG` writer - Negative Port Select"] -pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SINGLE_SPEC, u8, PORTNEG_A, 4, O>; -impl<'a, const O: u8> PORTNEG_W<'a, O> { +pub type PortnegW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portneg>; +impl<'a, REG> PortnegW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground (single-ended)"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTNEG_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portneg::Gnd) } #[doc = "Direct connection to DAC0_CH1"] #[inline(always)] - pub fn dac1(self) -> &'a mut W { - self.variant(PORTNEG_A::DAC1) - } - #[doc = "Direct connection to AIN1 input pin"] - #[inline(always)] - pub fn padana1(self) -> &'a mut W { - self.variant(PORTNEG_A::PADANA1) + pub fn dac1(self) -> &'a mut crate::W { + self.variant(Portneg::Dac1) } #[doc = "Port A - Select pin number using PINNEG"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portneg::Porta) } #[doc = "Port B - Select pin number using PINNEG"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portneg::Portb) } #[doc = "Port C - Select pin number using PINNEG"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portneg::Portc) } #[doc = "Port D - Select pin number using PINNEG"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTNEG_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portneg::Portd) } } #[doc = "Field `PINPOS` reader - Positive Pin Select"] -pub type PINPOS_R = crate::FieldReader; +pub type PinposR = crate::FieldReader; #[doc = "Field `PINPOS` writer - Positive Pin Select"] -pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SINGLE_SPEC, u8, u8, 4, O>; -#[doc = "Field `PORTPOS` reader - Positive Port Select"] -pub type PORTPOS_R = crate::FieldReader; +pub type PinposW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Positive Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORTPOS_A { +pub enum Portpos { #[doc = "0: Ground"] - GND = 0, + Gnd = 0, #[doc = "1: Supply Pin - Select specific supply using PINPOS"] - SUPPLY = 1, + Supply = 1, #[doc = "2: Direct connection to DAC0_CH0"] - DAC0 = 2, - #[doc = "4: Direct connection to AIN0 input pin"] - PADANA0 = 4, + Dac0 = 2, #[doc = "8: Port A - Select pin number using PINPOS"] - PORTA = 8, + Porta = 8, #[doc = "9: Port B - Select pin number using PINPOS"] - PORTB = 9, + Portb = 9, #[doc = "10: Port C - Select pin number using PINPOS"] - PORTC = 10, + Portc = 10, #[doc = "11: Port D - Select pin number using PINPOS"] - PORTD = 11, + Portd = 11, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORTPOS_A) -> Self { + fn from(variant: Portpos) -> Self { variant as _ } } -impl PORTPOS_R { +impl crate::FieldSpec for Portpos { + type Ux = u8; +} +impl crate::IsEnum for Portpos {} +#[doc = "Field `PORTPOS` reader - Positive Port Select"] +pub type PortposR = crate::FieldReader; +impl PortposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PORTPOS_A::GND), - 1 => Some(PORTPOS_A::SUPPLY), - 2 => Some(PORTPOS_A::DAC0), - 4 => Some(PORTPOS_A::PADANA0), - 8 => Some(PORTPOS_A::PORTA), - 9 => Some(PORTPOS_A::PORTB), - 10 => Some(PORTPOS_A::PORTC), - 11 => Some(PORTPOS_A::PORTD), + 0 => Some(Portpos::Gnd), + 1 => Some(Portpos::Supply), + 2 => Some(Portpos::Dac0), + 8 => Some(Portpos::Porta), + 9 => Some(Portpos::Portb), + 10 => Some(Portpos::Portc), + 11 => Some(Portpos::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `GND`"] + #[doc = "Ground"] #[inline(always)] pub fn is_gnd(&self) -> bool { - *self == PORTPOS_A::GND + *self == Portpos::Gnd } - #[doc = "Checks if the value of the field is `SUPPLY`"] + #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] pub fn is_supply(&self) -> bool { - *self == PORTPOS_A::SUPPLY + *self == Portpos::Supply } - #[doc = "Checks if the value of the field is `DAC0`"] + #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] pub fn is_dac0(&self) -> bool { - *self == PORTPOS_A::DAC0 + *self == Portpos::Dac0 } - #[doc = "Checks if the value of the field is `PADANA0`"] - #[inline(always)] - pub fn is_padana0(&self) -> bool { - *self == PORTPOS_A::PADANA0 - } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == PORTPOS_A::PORTA + *self == Portpos::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == PORTPOS_A::PORTB + *self == Portpos::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == PORTPOS_A::PORTC + *self == Portpos::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == PORTPOS_A::PORTD + *self == Portpos::Portd } } #[doc = "Field `PORTPOS` writer - Positive Port Select"] -pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SINGLE_SPEC, u8, PORTPOS_A, 4, O>; -impl<'a, const O: u8> PORTPOS_W<'a, O> { +pub type PortposW<'a, REG> = crate::FieldWriter<'a, REG, 4, Portpos>; +impl<'a, REG> PortposW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Ground"] #[inline(always)] - pub fn gnd(self) -> &'a mut W { - self.variant(PORTPOS_A::GND) + pub fn gnd(self) -> &'a mut crate::W { + self.variant(Portpos::Gnd) } #[doc = "Supply Pin - Select specific supply using PINPOS"] #[inline(always)] - pub fn supply(self) -> &'a mut W { - self.variant(PORTPOS_A::SUPPLY) + pub fn supply(self) -> &'a mut crate::W { + self.variant(Portpos::Supply) } #[doc = "Direct connection to DAC0_CH0"] #[inline(always)] - pub fn dac0(self) -> &'a mut W { - self.variant(PORTPOS_A::DAC0) - } - #[doc = "Direct connection to AIN0 input pin"] - #[inline(always)] - pub fn padana0(self) -> &'a mut W { - self.variant(PORTPOS_A::PADANA0) + pub fn dac0(self) -> &'a mut crate::W { + self.variant(Portpos::Dac0) } #[doc = "Port A - Select pin number using PINPOS"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Portpos::Porta) } #[doc = "Port B - Select pin number using PINPOS"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Portpos::Portb) } #[doc = "Port C - Select pin number using PINPOS"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Portpos::Portc) } #[doc = "Port D - Select pin number using PINPOS"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(PORTPOS_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Portpos::Portd) } } -#[doc = "Field `CFG` reader - Configuration Group Select"] -pub type CFG_R = crate::BitReader; #[doc = "Configuration Group Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFG_A { +pub enum Cfg { #[doc = "0: Use configuration group 0"] - CONFIG0 = 0, + Config0 = 0, #[doc = "1: Use configuration group 1"] - CONFIG1 = 1, + Config1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFG_A) -> Self { + fn from(variant: Cfg) -> Self { variant as u8 != 0 } } -impl CFG_R { +#[doc = "Field `CFG` reader - Configuration Group Select"] +pub type CfgR = crate::BitReader; +impl CfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CFG_A { + pub const fn variant(&self) -> Cfg { match self.bits { - false => CFG_A::CONFIG0, - true => CFG_A::CONFIG1, + false => Cfg::Config0, + true => Cfg::Config1, } } - #[doc = "Checks if the value of the field is `CONFIG0`"] + #[doc = "Use configuration group 0"] #[inline(always)] pub fn is_config0(&self) -> bool { - *self == CFG_A::CONFIG0 + *self == Cfg::Config0 } - #[doc = "Checks if the value of the field is `CONFIG1`"] + #[doc = "Use configuration group 1"] #[inline(always)] pub fn is_config1(&self) -> bool { - *self == CFG_A::CONFIG1 + *self == Cfg::Config1 } } #[doc = "Field `CFG` writer - Configuration Group Select"] -pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SINGLE_SPEC, CFG_A, O>; -impl<'a, const O: u8> CFG_W<'a, O> { +pub type CfgW<'a, REG> = crate::BitWriter<'a, REG, Cfg>; +impl<'a, REG> CfgW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use configuration group 0"] #[inline(always)] - pub fn config0(self) -> &'a mut W { - self.variant(CFG_A::CONFIG0) + pub fn config0(self) -> &'a mut crate::W { + self.variant(Cfg::Config0) } #[doc = "Use configuration group 1"] #[inline(always)] - pub fn config1(self) -> &'a mut W { - self.variant(CFG_A::CONFIG1) + pub fn config1(self) -> &'a mut crate::W { + self.variant(Cfg::Config1) } } #[doc = "Field `CMP` reader - Comparison Enable"] -pub type CMP_R = crate::BitReader; +pub type CmpR = crate::BitReader; #[doc = "Field `CMP` writer - Comparison Enable"] -pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SINGLE_SPEC, bool, O>; +pub type CmpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] - pub fn pinneg(&self) -> PINNEG_R { - PINNEG_R::new((self.bits & 0x0f) as u8) + pub fn pinneg(&self) -> PinnegR { + PinnegR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] - pub fn portneg(&self) -> PORTNEG_R { - PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn portneg(&self) -> PortnegR { + PortnegR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] - pub fn pinpos(&self) -> PINPOS_R { - PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pinpos(&self) -> PinposR { + PinposR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] - pub fn portpos(&self) -> PORTPOS_R { - PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn portpos(&self) -> PortposR { + PortposR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] - pub fn cfg(&self) -> CFG_R { - CFG_R::new(((self.bits >> 16) & 1) != 0) + pub fn cfg(&self) -> CfgR { + CfgR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] - pub fn cmp(&self) -> CMP_R { - CMP_R::new(((self.bits >> 17) & 1) != 0) + pub fn cmp(&self) -> CmpR { + CmpR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Negative Pin Select"] #[inline(always)] #[must_use] - pub fn pinneg(&mut self) -> PINNEG_W<0> { - PINNEG_W::new(self) + pub fn pinneg(&mut self) -> PinnegW { + PinnegW::new(self, 0) } #[doc = "Bits 4:7 - Negative Port Select"] #[inline(always)] #[must_use] - pub fn portneg(&mut self) -> PORTNEG_W<4> { - PORTNEG_W::new(self) + pub fn portneg(&mut self) -> PortnegW { + PortnegW::new(self, 4) } #[doc = "Bits 8:11 - Positive Pin Select"] #[inline(always)] #[must_use] - pub fn pinpos(&mut self) -> PINPOS_W<8> { - PINPOS_W::new(self) + pub fn pinpos(&mut self) -> PinposW { + PinposW::new(self, 8) } #[doc = "Bits 12:15 - Positive Port Select"] #[inline(always)] #[must_use] - pub fn portpos(&mut self) -> PORTPOS_W<12> { - PORTPOS_W::new(self) + pub fn portpos(&mut self) -> PortposW { + PortposW::new(self, 12) } #[doc = "Bit 16 - Configuration Group Select"] #[inline(always)] #[must_use] - pub fn cfg(&mut self) -> CFG_W<16> { - CFG_W::new(self) + pub fn cfg(&mut self) -> CfgW { + CfgW::new(self, 16) } #[doc = "Bit 17 - Comparison Enable"] #[inline(always)] #[must_use] - pub fn cmp(&mut self) -> CMP_W<17> { - CMP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp(&mut self) -> CmpW { + CmpW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [single](index.html) module"] -pub struct SINGLE_SPEC; -impl crate::RegisterSpec for SINGLE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`single::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`single::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SingleSpec; +impl crate::RegisterSpec for SingleSpec { type Ux = u32; } -#[doc = "`read()` method returns [single::R](R) reader structure"] -impl crate::Readable for SINGLE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [single::W](W) writer structure"] -impl crate::Writable for SINGLE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`single::R`](R) reader structure"] +impl crate::Readable for SingleSpec {} +#[doc = "`write(|w| ..)` method takes [`single::W`](W) writer structure"] +impl crate::Writable for SingleSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SINGLE to value 0"] -impl crate::Resettable for SINGLE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SingleSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/singledata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/singledata.rs index e975114..dfd0821 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/singledata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/singledata.rs @@ -1,37 +1,22 @@ #[doc = "Register `SINGLEDATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DATA` reader - Data"] -pub type DATA_R = crate::FieldReader; +pub type DataR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Data"] #[inline(always)] - pub fn data(&self) -> DATA_R { - DATA_R::new(self.bits) + pub fn data(&self) -> DataR { + DataR::new(self.bits) } } -#[doc = "latest single queue conversion data\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [singledata](index.html) module"] -pub struct SINGLEDATA_SPEC; -impl crate::RegisterSpec for SINGLEDATA_SPEC { +#[doc = "latest single queue conversion data\n\nYou can [`read`](crate::Reg::read) this register and get [`singledata::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SingledataSpec; +impl crate::RegisterSpec for SingledataSpec { type Ux = u32; } -#[doc = "`read()` method returns [singledata::R](R) reader structure"] -impl crate::Readable for SINGLEDATA_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`singledata::R`](R) reader structure"] +impl crate::Readable for SingledataSpec {} #[doc = "`reset()` method sets SINGLEDATA to value 0"] -impl crate::Resettable for SINGLEDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SingledataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/singlefifocfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/singlefifocfg.rs index 22fa3f7..900d11e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/singlefifocfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/singlefifocfg.rs @@ -1,400 +1,376 @@ #[doc = "Register `SINGLEFIFOCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SINGLEFIFOCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ALIGNMENT` reader - Alignment"] -pub type ALIGNMENT_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Alignment\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ALIGNMENT_A { +pub enum Alignment { #[doc = "0: ID\\[7:0\\], SIGN_EXT, DATA\\[11:0\\]"] - RIGHT12 = 0, + Right12 = 0, #[doc = "1: ID\\[7:0\\], SIGN_EXT, DATA\\[15:0\\]"] - RIGHT16 = 1, + Right16 = 1, #[doc = "2: ID\\[7:0\\], SIGN_EXT, DATA\\[19:0\\]"] - RIGHT20 = 2, + Right20 = 2, #[doc = "3: DATA\\[11:0\\], 000000000000, ID\\[7:0\\]"] - LEFT12 = 3, + Left12 = 3, #[doc = "4: DATA\\[15:0\\], 00000000, ID\\[7:0\\]"] - LEFT16 = 4, + Left16 = 4, #[doc = "5: DATA\\[19:0\\], 0000, ID\\[7:0\\]"] - LEFT20 = 5, + Left20 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ALIGNMENT_A) -> Self { + fn from(variant: Alignment) -> Self { variant as _ } } -impl ALIGNMENT_R { +impl crate::FieldSpec for Alignment { + type Ux = u8; +} +impl crate::IsEnum for Alignment {} +#[doc = "Field `ALIGNMENT` reader - Alignment"] +pub type AlignmentR = crate::FieldReader; +impl AlignmentR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ALIGNMENT_A::RIGHT12), - 1 => Some(ALIGNMENT_A::RIGHT16), - 2 => Some(ALIGNMENT_A::RIGHT20), - 3 => Some(ALIGNMENT_A::LEFT12), - 4 => Some(ALIGNMENT_A::LEFT16), - 5 => Some(ALIGNMENT_A::LEFT20), + 0 => Some(Alignment::Right12), + 1 => Some(Alignment::Right16), + 2 => Some(Alignment::Right20), + 3 => Some(Alignment::Left12), + 4 => Some(Alignment::Left16), + 5 => Some(Alignment::Left20), _ => None, } } - #[doc = "Checks if the value of the field is `RIGHT12`"] + #[doc = "ID\\[7:0\\], SIGN_EXT, DATA\\[11:0\\]"] #[inline(always)] pub fn is_right12(&self) -> bool { - *self == ALIGNMENT_A::RIGHT12 + *self == Alignment::Right12 } - #[doc = "Checks if the value of the field is `RIGHT16`"] + #[doc = "ID\\[7:0\\], SIGN_EXT, DATA\\[15:0\\]"] #[inline(always)] pub fn is_right16(&self) -> bool { - *self == ALIGNMENT_A::RIGHT16 + *self == Alignment::Right16 } - #[doc = "Checks if the value of the field is `RIGHT20`"] + #[doc = "ID\\[7:0\\], SIGN_EXT, DATA\\[19:0\\]"] #[inline(always)] pub fn is_right20(&self) -> bool { - *self == ALIGNMENT_A::RIGHT20 + *self == Alignment::Right20 } - #[doc = "Checks if the value of the field is `LEFT12`"] + #[doc = "DATA\\[11:0\\], 000000000000, ID\\[7:0\\]"] #[inline(always)] pub fn is_left12(&self) -> bool { - *self == ALIGNMENT_A::LEFT12 + *self == Alignment::Left12 } - #[doc = "Checks if the value of the field is `LEFT16`"] + #[doc = "DATA\\[15:0\\], 00000000, ID\\[7:0\\]"] #[inline(always)] pub fn is_left16(&self) -> bool { - *self == ALIGNMENT_A::LEFT16 + *self == Alignment::Left16 } - #[doc = "Checks if the value of the field is `LEFT20`"] + #[doc = "DATA\\[19:0\\], 0000, ID\\[7:0\\]"] #[inline(always)] pub fn is_left20(&self) -> bool { - *self == ALIGNMENT_A::LEFT20 + *self == Alignment::Left20 } } #[doc = "Field `ALIGNMENT` writer - Alignment"] -pub type ALIGNMENT_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SINGLEFIFOCFG_SPEC, u8, ALIGNMENT_A, 3, O>; -impl<'a, const O: u8> ALIGNMENT_W<'a, O> { +pub type AlignmentW<'a, REG> = crate::FieldWriter<'a, REG, 3, Alignment>; +impl<'a, REG> AlignmentW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "ID\\[7:0\\], SIGN_EXT, DATA\\[11:0\\]"] #[inline(always)] - pub fn right12(self) -> &'a mut W { - self.variant(ALIGNMENT_A::RIGHT12) + pub fn right12(self) -> &'a mut crate::W { + self.variant(Alignment::Right12) } #[doc = "ID\\[7:0\\], SIGN_EXT, DATA\\[15:0\\]"] #[inline(always)] - pub fn right16(self) -> &'a mut W { - self.variant(ALIGNMENT_A::RIGHT16) + pub fn right16(self) -> &'a mut crate::W { + self.variant(Alignment::Right16) } #[doc = "ID\\[7:0\\], SIGN_EXT, DATA\\[19:0\\]"] #[inline(always)] - pub fn right20(self) -> &'a mut W { - self.variant(ALIGNMENT_A::RIGHT20) + pub fn right20(self) -> &'a mut crate::W { + self.variant(Alignment::Right20) } #[doc = "DATA\\[11:0\\], 000000000000, ID\\[7:0\\]"] #[inline(always)] - pub fn left12(self) -> &'a mut W { - self.variant(ALIGNMENT_A::LEFT12) + pub fn left12(self) -> &'a mut crate::W { + self.variant(Alignment::Left12) } #[doc = "DATA\\[15:0\\], 00000000, ID\\[7:0\\]"] #[inline(always)] - pub fn left16(self) -> &'a mut W { - self.variant(ALIGNMENT_A::LEFT16) + pub fn left16(self) -> &'a mut crate::W { + self.variant(Alignment::Left16) } #[doc = "DATA\\[19:0\\], 0000, ID\\[7:0\\]"] #[inline(always)] - pub fn left20(self) -> &'a mut W { - self.variant(ALIGNMENT_A::LEFT20) + pub fn left20(self) -> &'a mut crate::W { + self.variant(Alignment::Left20) } } #[doc = "Field `SHOWID` reader - Show ID"] -pub type SHOWID_R = crate::BitReader; +pub type ShowidR = crate::BitReader; #[doc = "Field `SHOWID` writer - Show ID"] -pub type SHOWID_W<'a, const O: u8> = crate::BitWriter<'a, u32, SINGLEFIFOCFG_SPEC, bool, O>; -#[doc = "Field `DVL` reader - Data Valid Level"] -pub type DVL_R = crate::FieldReader; +pub type ShowidW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Data Valid Level\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DVL_A { +pub enum Dvl { #[doc = "0: When 1 entry in the single FIFO is valid, set the SINGLEFIFODVL interrupt and request DMA."] - VALID1 = 0, + Valid1 = 0, #[doc = "1: When 2 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] - VALID2 = 1, + Valid2 = 1, #[doc = "2: When 3 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] - VALID3 = 2, + Valid3 = 2, #[doc = "3: When 4 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] - VALID4 = 3, + Valid4 = 3, #[doc = "4: When 5 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] - VALID5 = 4, + Valid5 = 4, #[doc = "5: When 6 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] - VALID6 = 5, + Valid6 = 5, #[doc = "6: When 7 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] - VALID7 = 6, + Valid7 = 6, #[doc = "7: When 8 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] - VALID8 = 7, + Valid8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DVL_A) -> Self { + fn from(variant: Dvl) -> Self { variant as _ } } -impl DVL_R { +impl crate::FieldSpec for Dvl { + type Ux = u8; +} +impl crate::IsEnum for Dvl {} +#[doc = "Field `DVL` reader - Data Valid Level"] +pub type DvlR = crate::FieldReader; +impl DvlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DVL_A { + pub const fn variant(&self) -> Dvl { match self.bits { - 0 => DVL_A::VALID1, - 1 => DVL_A::VALID2, - 2 => DVL_A::VALID3, - 3 => DVL_A::VALID4, - 4 => DVL_A::VALID5, - 5 => DVL_A::VALID6, - 6 => DVL_A::VALID7, - 7 => DVL_A::VALID8, + 0 => Dvl::Valid1, + 1 => Dvl::Valid2, + 2 => Dvl::Valid3, + 3 => Dvl::Valid4, + 4 => Dvl::Valid5, + 5 => Dvl::Valid6, + 6 => Dvl::Valid7, + 7 => Dvl::Valid8, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `VALID1`"] + #[doc = "When 1 entry in the single FIFO is valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid1(&self) -> bool { - *self == DVL_A::VALID1 + *self == Dvl::Valid1 } - #[doc = "Checks if the value of the field is `VALID2`"] + #[doc = "When 2 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid2(&self) -> bool { - *self == DVL_A::VALID2 + *self == Dvl::Valid2 } - #[doc = "Checks if the value of the field is `VALID3`"] + #[doc = "When 3 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid3(&self) -> bool { - *self == DVL_A::VALID3 + *self == Dvl::Valid3 } - #[doc = "Checks if the value of the field is `VALID4`"] + #[doc = "When 4 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid4(&self) -> bool { - *self == DVL_A::VALID4 + *self == Dvl::Valid4 } - #[doc = "Checks if the value of the field is `VALID5`"] + #[doc = "When 5 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid5(&self) -> bool { - *self == DVL_A::VALID5 + *self == Dvl::Valid5 } - #[doc = "Checks if the value of the field is `VALID6`"] + #[doc = "When 6 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid6(&self) -> bool { - *self == DVL_A::VALID6 + *self == Dvl::Valid6 } - #[doc = "Checks if the value of the field is `VALID7`"] + #[doc = "When 7 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid7(&self) -> bool { - *self == DVL_A::VALID7 + *self == Dvl::Valid7 } - #[doc = "Checks if the value of the field is `VALID8`"] + #[doc = "When 8 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] pub fn is_valid8(&self) -> bool { - *self == DVL_A::VALID8 + *self == Dvl::Valid8 } } #[doc = "Field `DVL` writer - Data Valid Level"] -pub type DVL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, SINGLEFIFOCFG_SPEC, u8, DVL_A, 3, O>; -impl<'a, const O: u8> DVL_W<'a, O> { +pub type DvlW<'a, REG> = crate::FieldWriter<'a, REG, 3, Dvl, crate::Safe>; +impl<'a, REG> DvlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "When 1 entry in the single FIFO is valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid1(self) -> &'a mut W { - self.variant(DVL_A::VALID1) + pub fn valid1(self) -> &'a mut crate::W { + self.variant(Dvl::Valid1) } #[doc = "When 2 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid2(self) -> &'a mut W { - self.variant(DVL_A::VALID2) + pub fn valid2(self) -> &'a mut crate::W { + self.variant(Dvl::Valid2) } #[doc = "When 3 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid3(self) -> &'a mut W { - self.variant(DVL_A::VALID3) + pub fn valid3(self) -> &'a mut crate::W { + self.variant(Dvl::Valid3) } #[doc = "When 4 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid4(self) -> &'a mut W { - self.variant(DVL_A::VALID4) + pub fn valid4(self) -> &'a mut crate::W { + self.variant(Dvl::Valid4) } #[doc = "When 5 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid5(self) -> &'a mut W { - self.variant(DVL_A::VALID5) + pub fn valid5(self) -> &'a mut crate::W { + self.variant(Dvl::Valid5) } #[doc = "When 6 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid6(self) -> &'a mut W { - self.variant(DVL_A::VALID6) + pub fn valid6(self) -> &'a mut crate::W { + self.variant(Dvl::Valid6) } #[doc = "When 7 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid7(self) -> &'a mut W { - self.variant(DVL_A::VALID7) + pub fn valid7(self) -> &'a mut crate::W { + self.variant(Dvl::Valid7) } #[doc = "When 8 entries in the single FIFO are valid, set the SINGLEFIFODVL interrupt and request DMA."] #[inline(always)] - pub fn valid8(self) -> &'a mut W { - self.variant(DVL_A::VALID8) + pub fn valid8(self) -> &'a mut crate::W { + self.variant(Dvl::Valid8) } } -#[doc = "Field `DMAWUFIFOSINGLE` reader - Single FIFO DMA wakeup."] -pub type DMAWUFIFOSINGLE_R = crate::BitReader; #[doc = "Single FIFO DMA wakeup.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DMAWUFIFOSINGLE_A { +pub enum Dmawufifosingle { #[doc = "0: While in EM2 or EM3, the DMA controller will not be requested."] - DISABLED = 0, + Disabled = 0, #[doc = "1: While in EM2 or EM3, the DMA controller will be requested when the single FIFO reaches its Data Valid Level. \\[DVL must be set to 0 (VALID1).\\]"] - ENABLED = 1, + Enabled = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DMAWUFIFOSINGLE_A) -> Self { + fn from(variant: Dmawufifosingle) -> Self { variant as u8 != 0 } } -impl DMAWUFIFOSINGLE_R { +#[doc = "Field `DMAWUFIFOSINGLE` reader - Single FIFO DMA wakeup."] +pub type DmawufifosingleR = crate::BitReader; +impl DmawufifosingleR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DMAWUFIFOSINGLE_A { + pub const fn variant(&self) -> Dmawufifosingle { match self.bits { - false => DMAWUFIFOSINGLE_A::DISABLED, - true => DMAWUFIFOSINGLE_A::ENABLED, + false => Dmawufifosingle::Disabled, + true => Dmawufifosingle::Enabled, } } - #[doc = "Checks if the value of the field is `DISABLED`"] + #[doc = "While in EM2 or EM3, the DMA controller will not be requested."] #[inline(always)] pub fn is_disabled(&self) -> bool { - *self == DMAWUFIFOSINGLE_A::DISABLED + *self == Dmawufifosingle::Disabled } - #[doc = "Checks if the value of the field is `ENABLED`"] + #[doc = "While in EM2 or EM3, the DMA controller will be requested when the single FIFO reaches its Data Valid Level. \\[DVL must be set to 0 (VALID1).\\]"] #[inline(always)] pub fn is_enabled(&self) -> bool { - *self == DMAWUFIFOSINGLE_A::ENABLED + *self == Dmawufifosingle::Enabled } } #[doc = "Field `DMAWUFIFOSINGLE` writer - Single FIFO DMA wakeup."] -pub type DMAWUFIFOSINGLE_W<'a, const O: u8> = - crate::BitWriter<'a, u32, SINGLEFIFOCFG_SPEC, DMAWUFIFOSINGLE_A, O>; -impl<'a, const O: u8> DMAWUFIFOSINGLE_W<'a, O> { +pub type DmawufifosingleW<'a, REG> = crate::BitWriter<'a, REG, Dmawufifosingle>; +impl<'a, REG> DmawufifosingleW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "While in EM2 or EM3, the DMA controller will not be requested."] #[inline(always)] - pub fn disabled(self) -> &'a mut W { - self.variant(DMAWUFIFOSINGLE_A::DISABLED) + pub fn disabled(self) -> &'a mut crate::W { + self.variant(Dmawufifosingle::Disabled) } #[doc = "While in EM2 or EM3, the DMA controller will be requested when the single FIFO reaches its Data Valid Level. \\[DVL must be set to 0 (VALID1).\\]"] #[inline(always)] - pub fn enabled(self) -> &'a mut W { - self.variant(DMAWUFIFOSINGLE_A::ENABLED) + pub fn enabled(self) -> &'a mut crate::W { + self.variant(Dmawufifosingle::Enabled) } } impl R { #[doc = "Bits 0:2 - Alignment"] #[inline(always)] - pub fn alignment(&self) -> ALIGNMENT_R { - ALIGNMENT_R::new((self.bits & 7) as u8) + pub fn alignment(&self) -> AlignmentR { + AlignmentR::new((self.bits & 7) as u8) } #[doc = "Bit 3 - Show ID"] #[inline(always)] - pub fn showid(&self) -> SHOWID_R { - SHOWID_R::new(((self.bits >> 3) & 1) != 0) + pub fn showid(&self) -> ShowidR { + ShowidR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:6 - Data Valid Level"] #[inline(always)] - pub fn dvl(&self) -> DVL_R { - DVL_R::new(((self.bits >> 4) & 7) as u8) + pub fn dvl(&self) -> DvlR { + DvlR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bit 8 - Single FIFO DMA wakeup."] #[inline(always)] - pub fn dmawufifosingle(&self) -> DMAWUFIFOSINGLE_R { - DMAWUFIFOSINGLE_R::new(((self.bits >> 8) & 1) != 0) + pub fn dmawufifosingle(&self) -> DmawufifosingleR { + DmawufifosingleR::new(((self.bits >> 8) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Alignment"] #[inline(always)] #[must_use] - pub fn alignment(&mut self) -> ALIGNMENT_W<0> { - ALIGNMENT_W::new(self) + pub fn alignment(&mut self) -> AlignmentW { + AlignmentW::new(self, 0) } #[doc = "Bit 3 - Show ID"] #[inline(always)] #[must_use] - pub fn showid(&mut self) -> SHOWID_W<3> { - SHOWID_W::new(self) + pub fn showid(&mut self) -> ShowidW { + ShowidW::new(self, 3) } #[doc = "Bits 4:6 - Data Valid Level"] #[inline(always)] #[must_use] - pub fn dvl(&mut self) -> DVL_W<4> { - DVL_W::new(self) + pub fn dvl(&mut self) -> DvlW { + DvlW::new(self, 4) } #[doc = "Bit 8 - Single FIFO DMA wakeup."] #[inline(always)] #[must_use] - pub fn dmawufifosingle(&mut self) -> DMAWUFIFOSINGLE_W<8> { - DMAWUFIFOSINGLE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dmawufifosingle(&mut self) -> DmawufifosingleW { + DmawufifosingleW::new(self, 8) } } -#[doc = "Single FIFO Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [singlefifocfg](index.html) module"] -pub struct SINGLEFIFOCFG_SPEC; -impl crate::RegisterSpec for SINGLEFIFOCFG_SPEC { +#[doc = "Single FIFO Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`singlefifocfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`singlefifocfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SinglefifocfgSpec; +impl crate::RegisterSpec for SinglefifocfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [singlefifocfg::R](R) reader structure"] -impl crate::Readable for SINGLEFIFOCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [singlefifocfg::W](W) writer structure"] -impl crate::Writable for SINGLEFIFOCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`singlefifocfg::R`](R) reader structure"] +impl crate::Readable for SinglefifocfgSpec {} +#[doc = "`write(|w| ..)` method takes [`singlefifocfg::W`](W) writer structure"] +impl crate::Writable for SinglefifocfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SINGLEFIFOCFG to value 0x30"] -impl crate::Resettable for SINGLEFIFOCFG_SPEC { - const RESET_VALUE: Self::Ux = 0x30; +impl crate::Resettable for SinglefifocfgSpec { + const RESET_VALUE: u32 = 0x30; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/singlefifodata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/singlefifodata.rs index f810c23..1c94717 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/singlefifodata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/singlefifodata.rs @@ -1,37 +1,22 @@ #[doc = "Register `SINGLEFIFODATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DATA` reader - Single FIFO Read Data"] -pub type DATA_R = crate::FieldReader; +pub type DataR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Single FIFO Read Data"] #[inline(always)] - pub fn data(&self) -> DATA_R { - DATA_R::new(self.bits) + pub fn data(&self) -> DataR { + DataR::new(self.bits) } } -#[doc = "Read the oldest valid data from the single FIFO and pop the FIFO\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [singlefifodata](index.html) module"] -pub struct SINGLEFIFODATA_SPEC; -impl crate::RegisterSpec for SINGLEFIFODATA_SPEC { +#[doc = "Read the oldest valid data from the single FIFO and pop the FIFO\n\nYou can [`read`](crate::Reg::read) this register and get [`singlefifodata::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SinglefifodataSpec; +impl crate::RegisterSpec for SinglefifodataSpec { type Ux = u32; } -#[doc = "`read()` method returns [singlefifodata::R](R) reader structure"] -impl crate::Readable for SINGLEFIFODATA_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`singlefifodata::R`](R) reader structure"] +impl crate::Readable for SinglefifodataSpec {} #[doc = "`reset()` method sets SINGLEFIFODATA to value 0"] -impl crate::Resettable for SINGLEFIFODATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SinglefifodataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/singlefifostat.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/singlefifostat.rs index 76e4a9f..8679da5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/singlefifostat.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/singlefifostat.rs @@ -1,37 +1,22 @@ #[doc = "Register `SINGLEFIFOSTAT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `FIFOREADCNT` reader - FIFO Read Count"] -pub type FIFOREADCNT_R = crate::FieldReader; +pub type FiforeadcntR = crate::FieldReader; impl R { #[doc = "Bits 0:3 - FIFO Read Count"] #[inline(always)] - pub fn fiforeadcnt(&self) -> FIFOREADCNT_R { - FIFOREADCNT_R::new((self.bits & 0x0f) as u8) + pub fn fiforeadcnt(&self) -> FiforeadcntR { + FiforeadcntR::new((self.bits & 0x0f) as u8) } } -#[doc = "Single FIFO status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [singlefifostat](index.html) module"] -pub struct SINGLEFIFOSTAT_SPEC; -impl crate::RegisterSpec for SINGLEFIFOSTAT_SPEC { +#[doc = "Single FIFO status\n\nYou can [`read`](crate::Reg::read) this register and get [`singlefifostat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SinglefifostatSpec; +impl crate::RegisterSpec for SinglefifostatSpec { type Ux = u32; } -#[doc = "`read()` method returns [singlefifostat::R](R) reader structure"] -impl crate::Readable for SINGLEFIFOSTAT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`singlefifostat::R`](R) reader structure"] +impl crate::Readable for SinglefifostatSpec {} #[doc = "`reset()` method sets SINGLEFIFOSTAT to value 0"] -impl crate::Resettable for SINGLEFIFOSTAT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SinglefifostatSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/status.rs index c6fece3..8491a08 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/status.rs @@ -1,128 +1,113 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `SINGLEQEN` reader - Single Queue Enabled"] -pub type SINGLEQEN_R = crate::BitReader; +pub type SingleqenR = crate::BitReader; #[doc = "Field `SINGLEQUEUEPENDING` reader - Single Queue Pending"] -pub type SINGLEQUEUEPENDING_R = crate::BitReader; +pub type SinglequeuependingR = crate::BitReader; #[doc = "Field `SCANQEN` reader - Scan Queued Enabled"] -pub type SCANQEN_R = crate::BitReader; +pub type ScanqenR = crate::BitReader; #[doc = "Field `SCANQUEUEPENDING` reader - Scan Queue Pending"] -pub type SCANQUEUEPENDING_R = crate::BitReader; +pub type ScanqueuependingR = crate::BitReader; #[doc = "Field `CONVERTING` reader - Converting"] -pub type CONVERTING_R = crate::BitReader; +pub type ConvertingR = crate::BitReader; #[doc = "Field `SINGLEFIFODV` reader - SINGLEFIFO Data Valid"] -pub type SINGLEFIFODV_R = crate::BitReader; +pub type SinglefifodvR = crate::BitReader; #[doc = "Field `SCANFIFODV` reader - SCANFIFO Data Valid"] -pub type SCANFIFODV_R = crate::BitReader; +pub type ScanfifodvR = crate::BitReader; #[doc = "Field `SINGLEFIFOFLUSHING` reader - The Single FIFO is flushing"] -pub type SINGLEFIFOFLUSHING_R = crate::BitReader; +pub type SinglefifoflushingR = crate::BitReader; #[doc = "Field `SCANFIFOFLUSHING` reader - The Scan FIFO is flushing"] -pub type SCANFIFOFLUSHING_R = crate::BitReader; +pub type ScanfifoflushingR = crate::BitReader; #[doc = "Field `TIMERACTIVE` reader - Timer Active"] -pub type TIMERACTIVE_R = crate::BitReader; +pub type TimeractiveR = crate::BitReader; #[doc = "Field `SINGLEWRITEPENDING` reader - SINGLE write pending"] -pub type SINGLEWRITEPENDING_R = crate::BitReader; +pub type SinglewritependingR = crate::BitReader; #[doc = "Field `MASKREQWRITEPENDING` reader - MASKREQ write pending"] -pub type MASKREQWRITEPENDING_R = crate::BitReader; +pub type MaskreqwritependingR = crate::BitReader; #[doc = "Field `SYNCBUSY` reader - SYNCBUSY"] -pub type SYNCBUSY_R = crate::BitReader; +pub type SyncbusyR = crate::BitReader; #[doc = "Field `ADCWARM` reader - ADCWARM"] -pub type ADCWARM_R = crate::BitReader; +pub type AdcwarmR = crate::BitReader; impl R { #[doc = "Bit 0 - Single Queue Enabled"] #[inline(always)] - pub fn singleqen(&self) -> SINGLEQEN_R { - SINGLEQEN_R::new((self.bits & 1) != 0) + pub fn singleqen(&self) -> SingleqenR { + SingleqenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Single Queue Pending"] #[inline(always)] - pub fn singlequeuepending(&self) -> SINGLEQUEUEPENDING_R { - SINGLEQUEUEPENDING_R::new(((self.bits >> 1) & 1) != 0) + pub fn singlequeuepending(&self) -> SinglequeuependingR { + SinglequeuependingR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - Scan Queued Enabled"] #[inline(always)] - pub fn scanqen(&self) -> SCANQEN_R { - SCANQEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn scanqen(&self) -> ScanqenR { + ScanqenR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Scan Queue Pending"] #[inline(always)] - pub fn scanqueuepending(&self) -> SCANQUEUEPENDING_R { - SCANQUEUEPENDING_R::new(((self.bits >> 4) & 1) != 0) + pub fn scanqueuepending(&self) -> ScanqueuependingR { + ScanqueuependingR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 6 - Converting"] #[inline(always)] - pub fn converting(&self) -> CONVERTING_R { - CONVERTING_R::new(((self.bits >> 6) & 1) != 0) + pub fn converting(&self) -> ConvertingR { + ConvertingR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - SINGLEFIFO Data Valid"] #[inline(always)] - pub fn singlefifodv(&self) -> SINGLEFIFODV_R { - SINGLEFIFODV_R::new(((self.bits >> 8) & 1) != 0) + pub fn singlefifodv(&self) -> SinglefifodvR { + SinglefifodvR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - SCANFIFO Data Valid"] #[inline(always)] - pub fn scanfifodv(&self) -> SCANFIFODV_R { - SCANFIFODV_R::new(((self.bits >> 9) & 1) != 0) + pub fn scanfifodv(&self) -> ScanfifodvR { + ScanfifodvR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 14 - The Single FIFO is flushing"] #[inline(always)] - pub fn singlefifoflushing(&self) -> SINGLEFIFOFLUSHING_R { - SINGLEFIFOFLUSHING_R::new(((self.bits >> 14) & 1) != 0) + pub fn singlefifoflushing(&self) -> SinglefifoflushingR { + SinglefifoflushingR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - The Scan FIFO is flushing"] #[inline(always)] - pub fn scanfifoflushing(&self) -> SCANFIFOFLUSHING_R { - SCANFIFOFLUSHING_R::new(((self.bits >> 15) & 1) != 0) + pub fn scanfifoflushing(&self) -> ScanfifoflushingR { + ScanfifoflushingR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Timer Active"] #[inline(always)] - pub fn timeractive(&self) -> TIMERACTIVE_R { - TIMERACTIVE_R::new(((self.bits >> 16) & 1) != 0) + pub fn timeractive(&self) -> TimeractiveR { + TimeractiveR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 20 - SINGLE write pending"] #[inline(always)] - pub fn singlewritepending(&self) -> SINGLEWRITEPENDING_R { - SINGLEWRITEPENDING_R::new(((self.bits >> 20) & 1) != 0) + pub fn singlewritepending(&self) -> SinglewritependingR { + SinglewritependingR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - MASKREQ write pending"] #[inline(always)] - pub fn maskreqwritepending(&self) -> MASKREQWRITEPENDING_R { - MASKREQWRITEPENDING_R::new(((self.bits >> 21) & 1) != 0) + pub fn maskreqwritepending(&self) -> MaskreqwritependingR { + MaskreqwritependingR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 24 - SYNCBUSY"] #[inline(always)] - pub fn syncbusy(&self) -> SYNCBUSY_R { - SYNCBUSY_R::new(((self.bits >> 24) & 1) != 0) + pub fn syncbusy(&self) -> SyncbusyR { + SyncbusyR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 30 - ADCWARM"] #[inline(always)] - pub fn adcwarm(&self) -> ADCWARM_R { - ADCWARM_R::new(((self.bits >> 30) & 1) != 0) + pub fn adcwarm(&self) -> AdcwarmR { + AdcwarmR::new(((self.bits >> 30) & 1) != 0) } } -#[doc = "Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "Status\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/stmask.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/stmask.rs index d7d6913..68ce79a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/stmask.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/stmask.rs @@ -1,37 +1,22 @@ #[doc = "Register `STMASK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `STMASK` reader - Scan Table Mask"] -pub type STMASK_R = crate::FieldReader; +pub type StmaskR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Scan Table Mask"] #[inline(always)] - pub fn stmask(&self) -> STMASK_R { - STMASK_R::new((self.bits & 0xffff) as u16) + pub fn stmask(&self) -> StmaskR { + StmaskR::new((self.bits & 0xffff) as u16) } } -#[doc = "Scan Table Mask\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [stmask](index.html) module"] -pub struct STMASK_SPEC; -impl crate::RegisterSpec for STMASK_SPEC { +#[doc = "Scan Table Mask\n\nYou can [`read`](crate::Reg::read) this register and get [`stmask::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StmaskSpec; +impl crate::RegisterSpec for StmaskSpec { type Ux = u32; } -#[doc = "`read()` method returns [stmask::R](R) reader structure"] -impl crate::Readable for STMASK_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`stmask::R`](R) reader structure"] +impl crate::Readable for StmaskSpec {} #[doc = "`reset()` method sets STMASK to value 0"] -impl crate::Resettable for STMASK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StmaskSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/timer.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/timer.rs index b913389..edab4ee 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/timer.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/timer.rs @@ -1,80 +1,40 @@ #[doc = "Register `TIMER` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMER` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TIMER` reader - Timer Period"] -pub type TIMER_R = crate::FieldReader; +pub type TimerR = crate::FieldReader; #[doc = "Field `TIMER` writer - Timer Period"] -pub type TIMER_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMER_SPEC, u16, u16, 16, O>; +pub type TimerW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Timer Period"] #[inline(always)] - pub fn timer(&self) -> TIMER_R { - TIMER_R::new((self.bits & 0xffff) as u16) + pub fn timer(&self) -> TimerR { + TimerR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Timer Period"] #[inline(always)] #[must_use] - pub fn timer(&mut self) -> TIMER_W<0> { - TIMER_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn timer(&mut self) -> TimerW { + TimerW::new(self, 0) } } -#[doc = "Timer\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timer](index.html) module"] -pub struct TIMER_SPEC; -impl crate::RegisterSpec for TIMER_SPEC { +#[doc = "Timer\n\nYou can [`read`](crate::Reg::read) this register and get [`timer::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TimerSpec; +impl crate::RegisterSpec for TimerSpec { type Ux = u32; } -#[doc = "`read()` method returns [timer::R](R) reader structure"] -impl crate::Readable for TIMER_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timer::W](W) writer structure"] -impl crate::Writable for TIMER_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timer::R`](R) reader structure"] +impl crate::Readable for TimerSpec {} +#[doc = "`write(|w| ..)` method takes [`timer::W`](W) writer structure"] +impl crate::Writable for TimerSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER to value 0"] -impl crate::Resettable for TIMER_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TimerSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/trigger.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/trigger.rs index 0b33297..1c3158b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/trigger.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/iadc0_s/trigger.rs @@ -1,470 +1,450 @@ #[doc = "Register `TRIGGER` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TRIGGER` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SCANTRIGSEL` reader - Scan Trigger Select"] -pub type SCANTRIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Scan Trigger Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SCANTRIGSEL_A { +pub enum Scantrigsel { #[doc = "0: Immediate triggering. The scan queue will be disabled once all conversions in the scan table are complete, unless TRIGGERACTION is set to continuous."] - IMMEDIATE = 0, + Immediate = 0, #[doc = "1: Triggers when the local timer count reaches zero."] - TIMER = 1, + Timer = 1, #[doc = "2: Triggers on PRS0 from a timer module that is using the same clock group as the ADC and has been programmed to use the same clock source as the ADC. The prescale may be different between the ADC and the timer module."] - PRSCLKGRP = 2, - #[doc = "3: Triggers on asynchronous PRS0 positive edge. Requires PRS0 to go low for 3 ADC_CLKs before another positive edge can be detected. Generates an additional delay of 1 to 2 ADC_SRC_CLK cycles for synchronization."] - PRSPOS = 3, - #[doc = "4: Triggers on asynchronous PRS0 negative edge. Requires PRS0 to go high for 3 ADC_CLKs before another negative edge can be detected. Generates an additional delay of 1 to 2 ADC_SRC_CLK cycles for synchronization. PRSNEG should only be used when the trigger source is from a module that remains powered during EM23. For modules (ie: TIMER) that power down during EM23, PRSPOS should be used for an asynchronous trigger, and PRSCLKGRP should be used for a synchronous trigger."] - PRSNEG = 4, + Prsclkgrp = 2, + #[doc = "3: Triggers on asynchronous PRS0 positive edge. Requires PRS0 to go low for 3 ADC_CLKs before another positive edge can be detected. Generates an additional delay of 1 to 2 CLK_SRC_ADC cycles for synchronization."] + Prspos = 3, + #[doc = "4: Triggers on asynchronous PRS0 negative edge. Requires PRS0 to go high for 3 ADC_CLKs before another negative edge can be detected. Generates an additional delay of 1 to 2 CLK_SRC_ADC cycles for synchronization. PRSNEG should only be used when the trigger source is from a module that remains powered during EM23. For modules (ie: TIMER) that power down during EM23, PRSPOS should be used for an asynchronous trigger, and PRSCLKGRP should be used for a synchronous trigger."] + Prsneg = 4, #[doc = "5: Triggers on LESENSE convert request. When using the LESENSE for the SCAN Table, only one entry is converted per LESENSE convert request."] - LESENSE = 5, + Lesense = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SCANTRIGSEL_A) -> Self { + fn from(variant: Scantrigsel) -> Self { variant as _ } } -impl SCANTRIGSEL_R { +impl crate::FieldSpec for Scantrigsel { + type Ux = u8; +} +impl crate::IsEnum for Scantrigsel {} +#[doc = "Field `SCANTRIGSEL` reader - Scan Trigger Select"] +pub type ScantrigselR = crate::FieldReader; +impl ScantrigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SCANTRIGSEL_A::IMMEDIATE), - 1 => Some(SCANTRIGSEL_A::TIMER), - 2 => Some(SCANTRIGSEL_A::PRSCLKGRP), - 3 => Some(SCANTRIGSEL_A::PRSPOS), - 4 => Some(SCANTRIGSEL_A::PRSNEG), - 5 => Some(SCANTRIGSEL_A::LESENSE), + 0 => Some(Scantrigsel::Immediate), + 1 => Some(Scantrigsel::Timer), + 2 => Some(Scantrigsel::Prsclkgrp), + 3 => Some(Scantrigsel::Prspos), + 4 => Some(Scantrigsel::Prsneg), + 5 => Some(Scantrigsel::Lesense), _ => None, } } - #[doc = "Checks if the value of the field is `IMMEDIATE`"] + #[doc = "Immediate triggering. The scan queue will be disabled once all conversions in the scan table are complete, unless TRIGGERACTION is set to continuous."] #[inline(always)] pub fn is_immediate(&self) -> bool { - *self == SCANTRIGSEL_A::IMMEDIATE + *self == Scantrigsel::Immediate } - #[doc = "Checks if the value of the field is `TIMER`"] + #[doc = "Triggers when the local timer count reaches zero."] #[inline(always)] pub fn is_timer(&self) -> bool { - *self == SCANTRIGSEL_A::TIMER + *self == Scantrigsel::Timer } - #[doc = "Checks if the value of the field is `PRSCLKGRP`"] + #[doc = "Triggers on PRS0 from a timer module that is using the same clock group as the ADC and has been programmed to use the same clock source as the ADC. The prescale may be different between the ADC and the timer module."] #[inline(always)] pub fn is_prsclkgrp(&self) -> bool { - *self == SCANTRIGSEL_A::PRSCLKGRP + *self == Scantrigsel::Prsclkgrp } - #[doc = "Checks if the value of the field is `PRSPOS`"] + #[doc = "Triggers on asynchronous PRS0 positive edge. Requires PRS0 to go low for 3 ADC_CLKs before another positive edge can be detected. Generates an additional delay of 1 to 2 CLK_SRC_ADC cycles for synchronization."] #[inline(always)] pub fn is_prspos(&self) -> bool { - *self == SCANTRIGSEL_A::PRSPOS + *self == Scantrigsel::Prspos } - #[doc = "Checks if the value of the field is `PRSNEG`"] + #[doc = "Triggers on asynchronous PRS0 negative edge. Requires PRS0 to go high for 3 ADC_CLKs before another negative edge can be detected. Generates an additional delay of 1 to 2 CLK_SRC_ADC cycles for synchronization. PRSNEG should only be used when the trigger source is from a module that remains powered during EM23. For modules (ie: TIMER) that power down during EM23, PRSPOS should be used for an asynchronous trigger, and PRSCLKGRP should be used for a synchronous trigger."] #[inline(always)] pub fn is_prsneg(&self) -> bool { - *self == SCANTRIGSEL_A::PRSNEG + *self == Scantrigsel::Prsneg } - #[doc = "Checks if the value of the field is `LESENSE`"] + #[doc = "Triggers on LESENSE convert request. When using the LESENSE for the SCAN Table, only one entry is converted per LESENSE convert request."] #[inline(always)] pub fn is_lesense(&self) -> bool { - *self == SCANTRIGSEL_A::LESENSE + *self == Scantrigsel::Lesense } } #[doc = "Field `SCANTRIGSEL` writer - Scan Trigger Select"] -pub type SCANTRIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TRIGGER_SPEC, u8, SCANTRIGSEL_A, 3, O>; -impl<'a, const O: u8> SCANTRIGSEL_W<'a, O> { +pub type ScantrigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Scantrigsel>; +impl<'a, REG> ScantrigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Immediate triggering. The scan queue will be disabled once all conversions in the scan table are complete, unless TRIGGERACTION is set to continuous."] #[inline(always)] - pub fn immediate(self) -> &'a mut W { - self.variant(SCANTRIGSEL_A::IMMEDIATE) + pub fn immediate(self) -> &'a mut crate::W { + self.variant(Scantrigsel::Immediate) } #[doc = "Triggers when the local timer count reaches zero."] #[inline(always)] - pub fn timer(self) -> &'a mut W { - self.variant(SCANTRIGSEL_A::TIMER) + pub fn timer(self) -> &'a mut crate::W { + self.variant(Scantrigsel::Timer) } #[doc = "Triggers on PRS0 from a timer module that is using the same clock group as the ADC and has been programmed to use the same clock source as the ADC. The prescale may be different between the ADC and the timer module."] #[inline(always)] - pub fn prsclkgrp(self) -> &'a mut W { - self.variant(SCANTRIGSEL_A::PRSCLKGRP) + pub fn prsclkgrp(self) -> &'a mut crate::W { + self.variant(Scantrigsel::Prsclkgrp) } - #[doc = "Triggers on asynchronous PRS0 positive edge. Requires PRS0 to go low for 3 ADC_CLKs before another positive edge can be detected. Generates an additional delay of 1 to 2 ADC_SRC_CLK cycles for synchronization."] + #[doc = "Triggers on asynchronous PRS0 positive edge. Requires PRS0 to go low for 3 ADC_CLKs before another positive edge can be detected. Generates an additional delay of 1 to 2 CLK_SRC_ADC cycles for synchronization."] #[inline(always)] - pub fn prspos(self) -> &'a mut W { - self.variant(SCANTRIGSEL_A::PRSPOS) + pub fn prspos(self) -> &'a mut crate::W { + self.variant(Scantrigsel::Prspos) } - #[doc = "Triggers on asynchronous PRS0 negative edge. Requires PRS0 to go high for 3 ADC_CLKs before another negative edge can be detected. Generates an additional delay of 1 to 2 ADC_SRC_CLK cycles for synchronization. PRSNEG should only be used when the trigger source is from a module that remains powered during EM23. For modules (ie: TIMER) that power down during EM23, PRSPOS should be used for an asynchronous trigger, and PRSCLKGRP should be used for a synchronous trigger."] + #[doc = "Triggers on asynchronous PRS0 negative edge. Requires PRS0 to go high for 3 ADC_CLKs before another negative edge can be detected. Generates an additional delay of 1 to 2 CLK_SRC_ADC cycles for synchronization. PRSNEG should only be used when the trigger source is from a module that remains powered during EM23. For modules (ie: TIMER) that power down during EM23, PRSPOS should be used for an asynchronous trigger, and PRSCLKGRP should be used for a synchronous trigger."] #[inline(always)] - pub fn prsneg(self) -> &'a mut W { - self.variant(SCANTRIGSEL_A::PRSNEG) + pub fn prsneg(self) -> &'a mut crate::W { + self.variant(Scantrigsel::Prsneg) } #[doc = "Triggers on LESENSE convert request. When using the LESENSE for the SCAN Table, only one entry is converted per LESENSE convert request."] #[inline(always)] - pub fn lesense(self) -> &'a mut W { - self.variant(SCANTRIGSEL_A::LESENSE) + pub fn lesense(self) -> &'a mut crate::W { + self.variant(Scantrigsel::Lesense) } } -#[doc = "Field `SCANTRIGACTION` reader - Scan Trigger Action"] -pub type SCANTRIGACTION_R = crate::BitReader; #[doc = "Scan Trigger Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SCANTRIGACTION_A { +pub enum Scantrigaction { #[doc = "0: For TRIGSEL=IMMEDIATE, goes through the scan table once and disables queue. For TRIGSEL = TIMER, PRSCLKGRP, PRSPOS, PRSNEG, goes through the scan table once per trigger."] - ONCE = 0, + Once = 0, #[doc = "1: Goes through the scan table, converts each entry with a mask bit set, and puts it back into the scan queue to repeat again continuously. The queues are first come first serve. If both queues are triggered, the single queue will get to convert after each scan table completes. The scan queue will get to convert after each single conversion completes."] - CONTINUOUS = 1, + Continuous = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SCANTRIGACTION_A) -> Self { + fn from(variant: Scantrigaction) -> Self { variant as u8 != 0 } } -impl SCANTRIGACTION_R { +#[doc = "Field `SCANTRIGACTION` reader - Scan Trigger Action"] +pub type ScantrigactionR = crate::BitReader; +impl ScantrigactionR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SCANTRIGACTION_A { + pub const fn variant(&self) -> Scantrigaction { match self.bits { - false => SCANTRIGACTION_A::ONCE, - true => SCANTRIGACTION_A::CONTINUOUS, + false => Scantrigaction::Once, + true => Scantrigaction::Continuous, } } - #[doc = "Checks if the value of the field is `ONCE`"] + #[doc = "For TRIGSEL=IMMEDIATE, goes through the scan table once and disables queue. For TRIGSEL = TIMER, PRSCLKGRP, PRSPOS, PRSNEG, goes through the scan table once per trigger."] #[inline(always)] pub fn is_once(&self) -> bool { - *self == SCANTRIGACTION_A::ONCE + *self == Scantrigaction::Once } - #[doc = "Checks if the value of the field is `CONTINUOUS`"] + #[doc = "Goes through the scan table, converts each entry with a mask bit set, and puts it back into the scan queue to repeat again continuously. The queues are first come first serve. If both queues are triggered, the single queue will get to convert after each scan table completes. The scan queue will get to convert after each single conversion completes."] #[inline(always)] pub fn is_continuous(&self) -> bool { - *self == SCANTRIGACTION_A::CONTINUOUS + *self == Scantrigaction::Continuous } } #[doc = "Field `SCANTRIGACTION` writer - Scan Trigger Action"] -pub type SCANTRIGACTION_W<'a, const O: u8> = - crate::BitWriter<'a, u32, TRIGGER_SPEC, SCANTRIGACTION_A, O>; -impl<'a, const O: u8> SCANTRIGACTION_W<'a, O> { +pub type ScantrigactionW<'a, REG> = crate::BitWriter<'a, REG, Scantrigaction>; +impl<'a, REG> ScantrigactionW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "For TRIGSEL=IMMEDIATE, goes through the scan table once and disables queue. For TRIGSEL = TIMER, PRSCLKGRP, PRSPOS, PRSNEG, goes through the scan table once per trigger."] #[inline(always)] - pub fn once(self) -> &'a mut W { - self.variant(SCANTRIGACTION_A::ONCE) + pub fn once(self) -> &'a mut crate::W { + self.variant(Scantrigaction::Once) } #[doc = "Goes through the scan table, converts each entry with a mask bit set, and puts it back into the scan queue to repeat again continuously. The queues are first come first serve. If both queues are triggered, the single queue will get to convert after each scan table completes. The scan queue will get to convert after each single conversion completes."] #[inline(always)] - pub fn continuous(self) -> &'a mut W { - self.variant(SCANTRIGACTION_A::CONTINUOUS) + pub fn continuous(self) -> &'a mut crate::W { + self.variant(Scantrigaction::Continuous) } } -#[doc = "Field `SINGLETRIGSEL` reader - Single Trigger Select"] -pub type SINGLETRIGSEL_R = crate::FieldReader; #[doc = "Single Trigger Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SINGLETRIGSEL_A { +pub enum Singletrigsel { #[doc = "0: Immediate triggering. The single queue will be disabled once the conversion is complete, unless TRIGGERACTION is set to continuous."] - IMMEDIATE = 0, + Immediate = 0, #[doc = "1: Triggers when the local timer count reaches zero."] - TIMER = 1, + Timer = 1, #[doc = "2: Triggers on PRS1 from a timer module that is using the same clock group as the ADC and has been programmed to use the same clock source as the ADC. The prescale may be different between the ADC and the timer module."] - PRSCLKGRP = 2, - #[doc = "3: Triggers on asynchronous PRS1 positive edge. Requires PRS1 to go low for 3 ADC_CLKs before another positive edge can be detected. Generates an additional delay of 1 to 2 ADC_SRC_CLK cycles for synchronization."] - PRSPOS = 3, - #[doc = "4: Triggers on asynchronous PRS1 negative edge. Requires PRS1 to go high for 3 ADC_CLKs before another negative edge can be detected. Generates an additional delay of 1 to 2 ADC_SRC_CLK cycles for synchronization. PRSNEG should only be used when the trigger source is from a module that remains powered during EM23. For modules (ie: TIMER) that power down during EM23, PRSPOS should be used for an asynchronous trigger, and PRSCLKGRP should be used for a synchronous trigger."] - PRSNEG = 4, + Prsclkgrp = 2, + #[doc = "3: Triggers on asynchronous PRS1 positive edge. Requires PRS1 to go low for 3 ADC_CLKs before another positive edge can be detected. Generates an additional delay of 1 to 2 CLK_SRC_ADC cycles for synchronization."] + Prspos = 3, + #[doc = "4: Triggers on asynchronous PRS1 negative edge. Requires PRS1 to go high for 3 ADC_CLKs before another negative edge can be detected. Generates an additional delay of 1 to 2 CLK_SRC_ADC cycles for synchronization. PRSNEG should only be used when the trigger source is from a module that remains powered during EM23. For modules (ie: TIMER) that power down during EM23, PRSPOS should be used for an asynchronous trigger, and PRSCLKGRP should be used for a synchronous trigger."] + Prsneg = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SINGLETRIGSEL_A) -> Self { + fn from(variant: Singletrigsel) -> Self { variant as _ } } -impl SINGLETRIGSEL_R { +impl crate::FieldSpec for Singletrigsel { + type Ux = u8; +} +impl crate::IsEnum for Singletrigsel {} +#[doc = "Field `SINGLETRIGSEL` reader - Single Trigger Select"] +pub type SingletrigselR = crate::FieldReader; +impl SingletrigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SINGLETRIGSEL_A::IMMEDIATE), - 1 => Some(SINGLETRIGSEL_A::TIMER), - 2 => Some(SINGLETRIGSEL_A::PRSCLKGRP), - 3 => Some(SINGLETRIGSEL_A::PRSPOS), - 4 => Some(SINGLETRIGSEL_A::PRSNEG), + 0 => Some(Singletrigsel::Immediate), + 1 => Some(Singletrigsel::Timer), + 2 => Some(Singletrigsel::Prsclkgrp), + 3 => Some(Singletrigsel::Prspos), + 4 => Some(Singletrigsel::Prsneg), _ => None, } } - #[doc = "Checks if the value of the field is `IMMEDIATE`"] + #[doc = "Immediate triggering. The single queue will be disabled once the conversion is complete, unless TRIGGERACTION is set to continuous."] #[inline(always)] pub fn is_immediate(&self) -> bool { - *self == SINGLETRIGSEL_A::IMMEDIATE + *self == Singletrigsel::Immediate } - #[doc = "Checks if the value of the field is `TIMER`"] + #[doc = "Triggers when the local timer count reaches zero."] #[inline(always)] pub fn is_timer(&self) -> bool { - *self == SINGLETRIGSEL_A::TIMER + *self == Singletrigsel::Timer } - #[doc = "Checks if the value of the field is `PRSCLKGRP`"] + #[doc = "Triggers on PRS1 from a timer module that is using the same clock group as the ADC and has been programmed to use the same clock source as the ADC. The prescale may be different between the ADC and the timer module."] #[inline(always)] pub fn is_prsclkgrp(&self) -> bool { - *self == SINGLETRIGSEL_A::PRSCLKGRP + *self == Singletrigsel::Prsclkgrp } - #[doc = "Checks if the value of the field is `PRSPOS`"] + #[doc = "Triggers on asynchronous PRS1 positive edge. Requires PRS1 to go low for 3 ADC_CLKs before another positive edge can be detected. Generates an additional delay of 1 to 2 CLK_SRC_ADC cycles for synchronization."] #[inline(always)] pub fn is_prspos(&self) -> bool { - *self == SINGLETRIGSEL_A::PRSPOS + *self == Singletrigsel::Prspos } - #[doc = "Checks if the value of the field is `PRSNEG`"] + #[doc = "Triggers on asynchronous PRS1 negative edge. Requires PRS1 to go high for 3 ADC_CLKs before another negative edge can be detected. Generates an additional delay of 1 to 2 CLK_SRC_ADC cycles for synchronization. PRSNEG should only be used when the trigger source is from a module that remains powered during EM23. For modules (ie: TIMER) that power down during EM23, PRSPOS should be used for an asynchronous trigger, and PRSCLKGRP should be used for a synchronous trigger."] #[inline(always)] pub fn is_prsneg(&self) -> bool { - *self == SINGLETRIGSEL_A::PRSNEG + *self == Singletrigsel::Prsneg } } #[doc = "Field `SINGLETRIGSEL` writer - Single Trigger Select"] -pub type SINGLETRIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, TRIGGER_SPEC, u8, SINGLETRIGSEL_A, 3, O>; -impl<'a, const O: u8> SINGLETRIGSEL_W<'a, O> { +pub type SingletrigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Singletrigsel>; +impl<'a, REG> SingletrigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Immediate triggering. The single queue will be disabled once the conversion is complete, unless TRIGGERACTION is set to continuous."] #[inline(always)] - pub fn immediate(self) -> &'a mut W { - self.variant(SINGLETRIGSEL_A::IMMEDIATE) + pub fn immediate(self) -> &'a mut crate::W { + self.variant(Singletrigsel::Immediate) } #[doc = "Triggers when the local timer count reaches zero."] #[inline(always)] - pub fn timer(self) -> &'a mut W { - self.variant(SINGLETRIGSEL_A::TIMER) + pub fn timer(self) -> &'a mut crate::W { + self.variant(Singletrigsel::Timer) } #[doc = "Triggers on PRS1 from a timer module that is using the same clock group as the ADC and has been programmed to use the same clock source as the ADC. The prescale may be different between the ADC and the timer module."] #[inline(always)] - pub fn prsclkgrp(self) -> &'a mut W { - self.variant(SINGLETRIGSEL_A::PRSCLKGRP) + pub fn prsclkgrp(self) -> &'a mut crate::W { + self.variant(Singletrigsel::Prsclkgrp) } - #[doc = "Triggers on asynchronous PRS1 positive edge. Requires PRS1 to go low for 3 ADC_CLKs before another positive edge can be detected. Generates an additional delay of 1 to 2 ADC_SRC_CLK cycles for synchronization."] + #[doc = "Triggers on asynchronous PRS1 positive edge. Requires PRS1 to go low for 3 ADC_CLKs before another positive edge can be detected. Generates an additional delay of 1 to 2 CLK_SRC_ADC cycles for synchronization."] #[inline(always)] - pub fn prspos(self) -> &'a mut W { - self.variant(SINGLETRIGSEL_A::PRSPOS) + pub fn prspos(self) -> &'a mut crate::W { + self.variant(Singletrigsel::Prspos) } - #[doc = "Triggers on asynchronous PRS1 negative edge. Requires PRS1 to go high for 3 ADC_CLKs before another negative edge can be detected. Generates an additional delay of 1 to 2 ADC_SRC_CLK cycles for synchronization. PRSNEG should only be used when the trigger source is from a module that remains powered during EM23. For modules (ie: TIMER) that power down during EM23, PRSPOS should be used for an asynchronous trigger, and PRSCLKGRP should be used for a synchronous trigger."] + #[doc = "Triggers on asynchronous PRS1 negative edge. Requires PRS1 to go high for 3 ADC_CLKs before another negative edge can be detected. Generates an additional delay of 1 to 2 CLK_SRC_ADC cycles for synchronization. PRSNEG should only be used when the trigger source is from a module that remains powered during EM23. For modules (ie: TIMER) that power down during EM23, PRSPOS should be used for an asynchronous trigger, and PRSCLKGRP should be used for a synchronous trigger."] #[inline(always)] - pub fn prsneg(self) -> &'a mut W { - self.variant(SINGLETRIGSEL_A::PRSNEG) + pub fn prsneg(self) -> &'a mut crate::W { + self.variant(Singletrigsel::Prsneg) } } -#[doc = "Field `SINGLETRIGACTION` reader - Single Trigger Action"] -pub type SINGLETRIGACTION_R = crate::BitReader; #[doc = "Single Trigger Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SINGLETRIGACTION_A { +pub enum Singletrigaction { #[doc = "0: For TRIGSEL=IMMEDIATE, converts the single queue once and disables queue. For TRIGSEL = TIMER, PRSCLKGRP, PRSPOS, PRSNEG, converts the single queue once per trigger."] - ONCE = 0, + Once = 0, #[doc = "1: Converts the single queue, then checks for a pending scan queue before converting the single queue again continuously. The queues are first come first serve. If both queues are continuous, the IADC alternates between them."] - CONTINUOUS = 1, + Continuous = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SINGLETRIGACTION_A) -> Self { + fn from(variant: Singletrigaction) -> Self { variant as u8 != 0 } } -impl SINGLETRIGACTION_R { +#[doc = "Field `SINGLETRIGACTION` reader - Single Trigger Action"] +pub type SingletrigactionR = crate::BitReader; +impl SingletrigactionR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SINGLETRIGACTION_A { + pub const fn variant(&self) -> Singletrigaction { match self.bits { - false => SINGLETRIGACTION_A::ONCE, - true => SINGLETRIGACTION_A::CONTINUOUS, + false => Singletrigaction::Once, + true => Singletrigaction::Continuous, } } - #[doc = "Checks if the value of the field is `ONCE`"] + #[doc = "For TRIGSEL=IMMEDIATE, converts the single queue once and disables queue. For TRIGSEL = TIMER, PRSCLKGRP, PRSPOS, PRSNEG, converts the single queue once per trigger."] #[inline(always)] pub fn is_once(&self) -> bool { - *self == SINGLETRIGACTION_A::ONCE + *self == Singletrigaction::Once } - #[doc = "Checks if the value of the field is `CONTINUOUS`"] + #[doc = "Converts the single queue, then checks for a pending scan queue before converting the single queue again continuously. The queues are first come first serve. If both queues are continuous, the IADC alternates between them."] #[inline(always)] pub fn is_continuous(&self) -> bool { - *self == SINGLETRIGACTION_A::CONTINUOUS + *self == Singletrigaction::Continuous } } #[doc = "Field `SINGLETRIGACTION` writer - Single Trigger Action"] -pub type SINGLETRIGACTION_W<'a, const O: u8> = - crate::BitWriter<'a, u32, TRIGGER_SPEC, SINGLETRIGACTION_A, O>; -impl<'a, const O: u8> SINGLETRIGACTION_W<'a, O> { +pub type SingletrigactionW<'a, REG> = crate::BitWriter<'a, REG, Singletrigaction>; +impl<'a, REG> SingletrigactionW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "For TRIGSEL=IMMEDIATE, converts the single queue once and disables queue. For TRIGSEL = TIMER, PRSCLKGRP, PRSPOS, PRSNEG, converts the single queue once per trigger."] #[inline(always)] - pub fn once(self) -> &'a mut W { - self.variant(SINGLETRIGACTION_A::ONCE) + pub fn once(self) -> &'a mut crate::W { + self.variant(Singletrigaction::Once) } #[doc = "Converts the single queue, then checks for a pending scan queue before converting the single queue again continuously. The queues are first come first serve. If both queues are continuous, the IADC alternates between them."] #[inline(always)] - pub fn continuous(self) -> &'a mut W { - self.variant(SINGLETRIGACTION_A::CONTINUOUS) + pub fn continuous(self) -> &'a mut crate::W { + self.variant(Singletrigaction::Continuous) } } -#[doc = "Field `SINGLETAILGATE` reader - Single Tailgate Enable"] -pub type SINGLETAILGATE_R = crate::BitReader; #[doc = "Single Tailgate Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SINGLETAILGATE_A { +pub enum Singletailgate { #[doc = "0: The single queue is ready to start warming up and converting once the trigger had been detected."] - TAILGATEOFF = 0, + Tailgateoff = 0, #[doc = "1: After the single queue's trigger is detected, it must wait until the end of a scan operation before the Single queue can be converted."] - TAILGATEON = 1, + Tailgateon = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SINGLETAILGATE_A) -> Self { + fn from(variant: Singletailgate) -> Self { variant as u8 != 0 } } -impl SINGLETAILGATE_R { +#[doc = "Field `SINGLETAILGATE` reader - Single Tailgate Enable"] +pub type SingletailgateR = crate::BitReader; +impl SingletailgateR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SINGLETAILGATE_A { + pub const fn variant(&self) -> Singletailgate { match self.bits { - false => SINGLETAILGATE_A::TAILGATEOFF, - true => SINGLETAILGATE_A::TAILGATEON, + false => Singletailgate::Tailgateoff, + true => Singletailgate::Tailgateon, } } - #[doc = "Checks if the value of the field is `TAILGATEOFF`"] + #[doc = "The single queue is ready to start warming up and converting once the trigger had been detected."] #[inline(always)] pub fn is_tailgateoff(&self) -> bool { - *self == SINGLETAILGATE_A::TAILGATEOFF + *self == Singletailgate::Tailgateoff } - #[doc = "Checks if the value of the field is `TAILGATEON`"] + #[doc = "After the single queue's trigger is detected, it must wait until the end of a scan operation before the Single queue can be converted."] #[inline(always)] pub fn is_tailgateon(&self) -> bool { - *self == SINGLETAILGATE_A::TAILGATEON + *self == Singletailgate::Tailgateon } } #[doc = "Field `SINGLETAILGATE` writer - Single Tailgate Enable"] -pub type SINGLETAILGATE_W<'a, const O: u8> = - crate::BitWriter<'a, u32, TRIGGER_SPEC, SINGLETAILGATE_A, O>; -impl<'a, const O: u8> SINGLETAILGATE_W<'a, O> { +pub type SingletailgateW<'a, REG> = crate::BitWriter<'a, REG, Singletailgate>; +impl<'a, REG> SingletailgateW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The single queue is ready to start warming up and converting once the trigger had been detected."] #[inline(always)] - pub fn tailgateoff(self) -> &'a mut W { - self.variant(SINGLETAILGATE_A::TAILGATEOFF) + pub fn tailgateoff(self) -> &'a mut crate::W { + self.variant(Singletailgate::Tailgateoff) } #[doc = "After the single queue's trigger is detected, it must wait until the end of a scan operation before the Single queue can be converted."] #[inline(always)] - pub fn tailgateon(self) -> &'a mut W { - self.variant(SINGLETAILGATE_A::TAILGATEON) + pub fn tailgateon(self) -> &'a mut crate::W { + self.variant(Singletailgate::Tailgateon) } } impl R { #[doc = "Bits 0:2 - Scan Trigger Select"] #[inline(always)] - pub fn scantrigsel(&self) -> SCANTRIGSEL_R { - SCANTRIGSEL_R::new((self.bits & 7) as u8) + pub fn scantrigsel(&self) -> ScantrigselR { + ScantrigselR::new((self.bits & 7) as u8) } #[doc = "Bit 4 - Scan Trigger Action"] #[inline(always)] - pub fn scantrigaction(&self) -> SCANTRIGACTION_R { - SCANTRIGACTION_R::new(((self.bits >> 4) & 1) != 0) + pub fn scantrigaction(&self) -> ScantrigactionR { + ScantrigactionR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 8:10 - Single Trigger Select"] #[inline(always)] - pub fn singletrigsel(&self) -> SINGLETRIGSEL_R { - SINGLETRIGSEL_R::new(((self.bits >> 8) & 7) as u8) + pub fn singletrigsel(&self) -> SingletrigselR { + SingletrigselR::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bit 12 - Single Trigger Action"] #[inline(always)] - pub fn singletrigaction(&self) -> SINGLETRIGACTION_R { - SINGLETRIGACTION_R::new(((self.bits >> 12) & 1) != 0) + pub fn singletrigaction(&self) -> SingletrigactionR { + SingletrigactionR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 16 - Single Tailgate Enable"] #[inline(always)] - pub fn singletailgate(&self) -> SINGLETAILGATE_R { - SINGLETAILGATE_R::new(((self.bits >> 16) & 1) != 0) + pub fn singletailgate(&self) -> SingletailgateR { + SingletailgateR::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Scan Trigger Select"] #[inline(always)] #[must_use] - pub fn scantrigsel(&mut self) -> SCANTRIGSEL_W<0> { - SCANTRIGSEL_W::new(self) + pub fn scantrigsel(&mut self) -> ScantrigselW { + ScantrigselW::new(self, 0) } #[doc = "Bit 4 - Scan Trigger Action"] #[inline(always)] #[must_use] - pub fn scantrigaction(&mut self) -> SCANTRIGACTION_W<4> { - SCANTRIGACTION_W::new(self) + pub fn scantrigaction(&mut self) -> ScantrigactionW { + ScantrigactionW::new(self, 4) } #[doc = "Bits 8:10 - Single Trigger Select"] #[inline(always)] #[must_use] - pub fn singletrigsel(&mut self) -> SINGLETRIGSEL_W<8> { - SINGLETRIGSEL_W::new(self) + pub fn singletrigsel(&mut self) -> SingletrigselW { + SingletrigselW::new(self, 8) } #[doc = "Bit 12 - Single Trigger Action"] #[inline(always)] #[must_use] - pub fn singletrigaction(&mut self) -> SINGLETRIGACTION_W<12> { - SINGLETRIGACTION_W::new(self) + pub fn singletrigaction(&mut self) -> SingletrigactionW { + SingletrigactionW::new(self, 12) } #[doc = "Bit 16 - Single Tailgate Enable"] #[inline(always)] #[must_use] - pub fn singletailgate(&mut self) -> SINGLETAILGATE_W<16> { - SINGLETAILGATE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn singletailgate(&mut self) -> SingletailgateW { + SingletailgateW::new(self, 16) } } -#[doc = "Trigger\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [trigger](index.html) module"] -pub struct TRIGGER_SPEC; -impl crate::RegisterSpec for TRIGGER_SPEC { +#[doc = "Trigger\n\nYou can [`read`](crate::Reg::read) this register and get [`trigger::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trigger::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TriggerSpec; +impl crate::RegisterSpec for TriggerSpec { type Ux = u32; } -#[doc = "`read()` method returns [trigger::R](R) reader structure"] -impl crate::Readable for TRIGGER_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [trigger::W](W) writer structure"] -impl crate::Writable for TRIGGER_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`trigger::R`](R) reader structure"] +impl crate::Readable for TriggerSpec {} +#[doc = "`write(|w| ..)` method takes [`trigger::W`](W) writer structure"] +impl crate::Writable for TriggerSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TRIGGER to value 0"] -impl crate::Resettable for TRIGGER_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TriggerSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns.rs index 3b2d27f..98e2075 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns.rs @@ -1,64 +1,126 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + ctrl: Ctrl, + pchits: Pchits, + pcmisses: Pcmisses, + pcahits: Pcahits, + status: Status, + cmd: Cmd, + lpmode: Lpmode, + if_: If, + ien: Ien, +} +impl RegisterBlock { #[doc = "0x00 - The read only IPVERSION field gives the version for this module. There may be minor software changes required for modules with different values of IPVERSION."] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x08 - No Description"] - pub pchits: PCHITS, + #[inline(always)] + pub const fn pchits(&self) -> &Pchits { + &self.pchits + } #[doc = "0x0c - No Description"] - pub pcmisses: PCMISSES, + #[inline(always)] + pub const fn pcmisses(&self) -> &Pcmisses { + &self.pcmisses + } #[doc = "0x10 - No Description"] - pub pcahits: PCAHITS, + #[inline(always)] + pub const fn pcahits(&self) -> &Pcahits { + &self.pcahits + } #[doc = "0x14 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x18 - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x1c - No Description"] - pub lpmode: LPMODE, + #[inline(always)] + pub const fn lpmode(&self) -> &Lpmode { + &self.lpmode + } #[doc = "0x20 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x24 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: The read only IPVERSION field gives the version for this module. There may be minor software changes required for modules with different values of IPVERSION.\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "The read only IPVERSION field gives the version for this module. There may be minor software changes required for modules with different values of IPVERSION."] pub mod ipversion; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "PCHITS (r) register accessor: an alias for `Reg`"] -pub type PCHITS = crate::Reg; +#[doc = "PCHITS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pchits::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pchits`] +module"] +#[doc(alias = "PCHITS")] +pub type Pchits = crate::Reg; #[doc = "No Description"] pub mod pchits; -#[doc = "PCMISSES (r) register accessor: an alias for `Reg`"] -pub type PCMISSES = crate::Reg; +#[doc = "PCMISSES (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pcmisses::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcmisses`] +module"] +#[doc(alias = "PCMISSES")] +pub type Pcmisses = crate::Reg; #[doc = "No Description"] pub mod pcmisses; -#[doc = "PCAHITS (r) register accessor: an alias for `Reg`"] -pub type PCAHITS = crate::Reg; +#[doc = "PCAHITS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pcahits::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcahits`] +module"] +#[doc(alias = "PCAHITS")] +pub type Pcahits = crate::Reg; #[doc = "No Description"] pub mod pcahits; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "LPMODE (rw) register accessor: an alias for `Reg`"] -pub type LPMODE = crate::Reg; +#[doc = "LPMODE (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`lpmode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lpmode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lpmode`] +module"] +#[doc(alias = "LPMODE")] +pub type Lpmode = crate::Reg; #[doc = "No Description"] pub mod lpmode; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/cmd.rs index 4fece64..b0dbc37 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/cmd.rs @@ -1,68 +1,43 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `FLUSH` writer - Flush"] -pub type FLUSH_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type FlushW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STARTPC` writer - Start Performance Counters"] -pub type STARTPC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StartpcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STOPPC` writer - Stop Performance Counters"] -pub type STOPPC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StoppcW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Flush"] #[inline(always)] #[must_use] - pub fn flush(&mut self) -> FLUSH_W<0> { - FLUSH_W::new(self) + pub fn flush(&mut self) -> FlushW { + FlushW::new(self, 0) } #[doc = "Bit 1 - Start Performance Counters"] #[inline(always)] #[must_use] - pub fn startpc(&mut self) -> STARTPC_W<1> { - STARTPC_W::new(self) + pub fn startpc(&mut self) -> StartpcW { + StartpcW::new(self, 1) } #[doc = "Bit 2 - Stop Performance Counters"] #[inline(always)] #[must_use] - pub fn stoppc(&mut self) -> STOPPC_W<2> { - STOPPC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stoppc(&mut self) -> StoppcW { + StoppcW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/ctrl.rs index 0c5e78a..123bd27 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/ctrl.rs @@ -1,110 +1,70 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CACHEDIS` reader - Cache Disable"] -pub type CACHEDIS_R = crate::BitReader; +pub type CachedisR = crate::BitReader; #[doc = "Field `CACHEDIS` writer - Cache Disable"] -pub type CACHEDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type CachedisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USEMPU` reader - Use MPU"] -pub type USEMPU_R = crate::BitReader; +pub type UsempuR = crate::BitReader; #[doc = "Field `USEMPU` writer - Use MPU"] -pub type USEMPU_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type UsempuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOFLUSHDIS` reader - Automatic Flushing Disable"] -pub type AUTOFLUSHDIS_R = crate::BitReader; +pub type AutoflushdisR = crate::BitReader; #[doc = "Field `AUTOFLUSHDIS` writer - Automatic Flushing Disable"] -pub type AUTOFLUSHDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type AutoflushdisW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Cache Disable"] #[inline(always)] - pub fn cachedis(&self) -> CACHEDIS_R { - CACHEDIS_R::new((self.bits & 1) != 0) + pub fn cachedis(&self) -> CachedisR { + CachedisR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Use MPU"] #[inline(always)] - pub fn usempu(&self) -> USEMPU_R { - USEMPU_R::new(((self.bits >> 1) & 1) != 0) + pub fn usempu(&self) -> UsempuR { + UsempuR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Automatic Flushing Disable"] #[inline(always)] - pub fn autoflushdis(&self) -> AUTOFLUSHDIS_R { - AUTOFLUSHDIS_R::new(((self.bits >> 2) & 1) != 0) + pub fn autoflushdis(&self) -> AutoflushdisR { + AutoflushdisR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Cache Disable"] #[inline(always)] #[must_use] - pub fn cachedis(&mut self) -> CACHEDIS_W<0> { - CACHEDIS_W::new(self) + pub fn cachedis(&mut self) -> CachedisW { + CachedisW::new(self, 0) } #[doc = "Bit 1 - Use MPU"] #[inline(always)] #[must_use] - pub fn usempu(&mut self) -> USEMPU_W<1> { - USEMPU_W::new(self) + pub fn usempu(&mut self) -> UsempuW { + UsempuW::new(self, 1) } #[doc = "Bit 2 - Automatic Flushing Disable"] #[inline(always)] #[must_use] - pub fn autoflushdis(&mut self) -> AUTOFLUSHDIS_W<2> { - AUTOFLUSHDIS_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn autoflushdis(&mut self) -> AutoflushdisW { + AutoflushdisW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/ien.rs index 5b836a6..f9e47ae 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/ien.rs @@ -1,125 +1,85 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `HITOF` reader - Hit Overflow Interrupt Enable"] -pub type HITOF_R = crate::BitReader; +pub type HitofR = crate::BitReader; #[doc = "Field `HITOF` writer - Hit Overflow Interrupt Enable"] -pub type HITOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type HitofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MISSOF` reader - Miss Overflow Interrupt Enable"] -pub type MISSOF_R = crate::BitReader; +pub type MissofR = crate::BitReader; #[doc = "Field `MISSOF` writer - Miss Overflow Interrupt Enable"] -pub type MISSOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type MissofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHITOF` reader - Advanced Hit Overflow Interrupt Enable"] -pub type AHITOF_R = crate::BitReader; +pub type AhitofR = crate::BitReader; #[doc = "Field `AHITOF` writer - Advanced Hit Overflow Interrupt Enable"] -pub type AHITOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AhitofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RAMERROR` reader - RAM error Interrupt Enable"] -pub type RAMERROR_R = crate::BitReader; +pub type RamerrorR = crate::BitReader; #[doc = "Field `RAMERROR` writer - RAM error Interrupt Enable"] -pub type RAMERROR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RamerrorW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Hit Overflow Interrupt Enable"] #[inline(always)] - pub fn hitof(&self) -> HITOF_R { - HITOF_R::new((self.bits & 1) != 0) + pub fn hitof(&self) -> HitofR { + HitofR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Miss Overflow Interrupt Enable"] #[inline(always)] - pub fn missof(&self) -> MISSOF_R { - MISSOF_R::new(((self.bits >> 1) & 1) != 0) + pub fn missof(&self) -> MissofR { + MissofR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Advanced Hit Overflow Interrupt Enable"] #[inline(always)] - pub fn ahitof(&self) -> AHITOF_R { - AHITOF_R::new(((self.bits >> 2) & 1) != 0) + pub fn ahitof(&self) -> AhitofR { + AhitofR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 8 - RAM error Interrupt Enable"] #[inline(always)] - pub fn ramerror(&self) -> RAMERROR_R { - RAMERROR_R::new(((self.bits >> 8) & 1) != 0) + pub fn ramerror(&self) -> RamerrorR { + RamerrorR::new(((self.bits >> 8) & 1) != 0) } } impl W { #[doc = "Bit 0 - Hit Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn hitof(&mut self) -> HITOF_W<0> { - HITOF_W::new(self) + pub fn hitof(&mut self) -> HitofW { + HitofW::new(self, 0) } #[doc = "Bit 1 - Miss Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn missof(&mut self) -> MISSOF_W<1> { - MISSOF_W::new(self) + pub fn missof(&mut self) -> MissofW { + MissofW::new(self, 1) } #[doc = "Bit 2 - Advanced Hit Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ahitof(&mut self) -> AHITOF_W<2> { - AHITOF_W::new(self) + pub fn ahitof(&mut self) -> AhitofW { + AhitofW::new(self, 2) } #[doc = "Bit 8 - RAM error Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ramerror(&mut self) -> RAMERROR_W<8> { - RAMERROR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ramerror(&mut self) -> RamerrorW { + RamerrorW::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/if_.rs index 1a33623..c47b027 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/if_.rs @@ -1,125 +1,85 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `HITOF` reader - Hit Overflow Interrupt Flag"] -pub type HITOF_R = crate::BitReader; +pub type HitofR = crate::BitReader; #[doc = "Field `HITOF` writer - Hit Overflow Interrupt Flag"] -pub type HITOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type HitofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MISSOF` reader - Miss Overflow Interrupt Flag"] -pub type MISSOF_R = crate::BitReader; +pub type MissofR = crate::BitReader; #[doc = "Field `MISSOF` writer - Miss Overflow Interrupt Flag"] -pub type MISSOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type MissofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHITOF` reader - Advanced Hit Overflow Interrupt Flag"] -pub type AHITOF_R = crate::BitReader; +pub type AhitofR = crate::BitReader; #[doc = "Field `AHITOF` writer - Advanced Hit Overflow Interrupt Flag"] -pub type AHITOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AhitofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RAMERROR` reader - RAM error Interrupt Flag"] -pub type RAMERROR_R = crate::BitReader; +pub type RamerrorR = crate::BitReader; #[doc = "Field `RAMERROR` writer - RAM error Interrupt Flag"] -pub type RAMERROR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RamerrorW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Hit Overflow Interrupt Flag"] #[inline(always)] - pub fn hitof(&self) -> HITOF_R { - HITOF_R::new((self.bits & 1) != 0) + pub fn hitof(&self) -> HitofR { + HitofR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Miss Overflow Interrupt Flag"] #[inline(always)] - pub fn missof(&self) -> MISSOF_R { - MISSOF_R::new(((self.bits >> 1) & 1) != 0) + pub fn missof(&self) -> MissofR { + MissofR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Advanced Hit Overflow Interrupt Flag"] #[inline(always)] - pub fn ahitof(&self) -> AHITOF_R { - AHITOF_R::new(((self.bits >> 2) & 1) != 0) + pub fn ahitof(&self) -> AhitofR { + AhitofR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 8 - RAM error Interrupt Flag"] #[inline(always)] - pub fn ramerror(&self) -> RAMERROR_R { - RAMERROR_R::new(((self.bits >> 8) & 1) != 0) + pub fn ramerror(&self) -> RamerrorR { + RamerrorR::new(((self.bits >> 8) & 1) != 0) } } impl W { #[doc = "Bit 0 - Hit Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn hitof(&mut self) -> HITOF_W<0> { - HITOF_W::new(self) + pub fn hitof(&mut self) -> HitofW { + HitofW::new(self, 0) } #[doc = "Bit 1 - Miss Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn missof(&mut self) -> MISSOF_W<1> { - MISSOF_W::new(self) + pub fn missof(&mut self) -> MissofW { + MissofW::new(self, 1) } #[doc = "Bit 2 - Advanced Hit Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ahitof(&mut self) -> AHITOF_W<2> { - AHITOF_W::new(self) + pub fn ahitof(&mut self) -> AhitofW { + AhitofW::new(self, 2) } #[doc = "Bit 8 - RAM error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ramerror(&mut self) -> RAMERROR_W<8> { - RAMERROR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ramerror(&mut self) -> RamerrorW { + RamerrorW::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/ipversion.rs index 77b8fdb..1717852 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "The read only IPVERSION field gives the version for this module. There may be minor software changes required for modules with different values of IPVERSION.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "The read only IPVERSION field gives the version for this module. There may be minor software changes required for modules with different values of IPVERSION.\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/lpmode.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/lpmode.rs index 7de5ac3..0810d60 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/lpmode.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/lpmode.rs @@ -1,156 +1,124 @@ #[doc = "Register `LPMODE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LPMODE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `LPLEVEL` reader - Low Power Level"] -pub type LPLEVEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Low Power Level\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LPLEVEL_A { +pub enum Lplevel { #[doc = "0: Base instruction cache functionality"] - BASIC = 0, + Basic = 0, #[doc = "1: Advanced buffering mode, where the cache uses the fetch pattern to predict highly accessed data and store it in low-energy memory"] - ADVANCED = 1, + Advanced = 1, #[doc = "3: Minimum activity mode, which allows the cache to minimize activity in logic that it predicts has a low probability being used. This mode can introduce wait-states into the instruction fetch stream when the cache exits one of its low-activity states. The number of wait-states introduced is small, but users running with 0-wait-state memory and wishing to reduce the variability that the cache might introduce with additional wait-states may wish to lower the cache low-power level. Note, this mode includes the advanced buffering mode functionality."] - MINACTIVITY = 3, + Minactivity = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LPLEVEL_A) -> Self { + fn from(variant: Lplevel) -> Self { variant as _ } } -impl LPLEVEL_R { +impl crate::FieldSpec for Lplevel { + type Ux = u8; +} +impl crate::IsEnum for Lplevel {} +#[doc = "Field `LPLEVEL` reader - Low Power Level"] +pub type LplevelR = crate::FieldReader; +impl LplevelR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(LPLEVEL_A::BASIC), - 1 => Some(LPLEVEL_A::ADVANCED), - 3 => Some(LPLEVEL_A::MINACTIVITY), + 0 => Some(Lplevel::Basic), + 1 => Some(Lplevel::Advanced), + 3 => Some(Lplevel::Minactivity), _ => None, } } - #[doc = "Checks if the value of the field is `BASIC`"] + #[doc = "Base instruction cache functionality"] #[inline(always)] pub fn is_basic(&self) -> bool { - *self == LPLEVEL_A::BASIC + *self == Lplevel::Basic } - #[doc = "Checks if the value of the field is `ADVANCED`"] + #[doc = "Advanced buffering mode, where the cache uses the fetch pattern to predict highly accessed data and store it in low-energy memory"] #[inline(always)] pub fn is_advanced(&self) -> bool { - *self == LPLEVEL_A::ADVANCED + *self == Lplevel::Advanced } - #[doc = "Checks if the value of the field is `MINACTIVITY`"] + #[doc = "Minimum activity mode, which allows the cache to minimize activity in logic that it predicts has a low probability being used. This mode can introduce wait-states into the instruction fetch stream when the cache exits one of its low-activity states. The number of wait-states introduced is small, but users running with 0-wait-state memory and wishing to reduce the variability that the cache might introduce with additional wait-states may wish to lower the cache low-power level. Note, this mode includes the advanced buffering mode functionality."] #[inline(always)] pub fn is_minactivity(&self) -> bool { - *self == LPLEVEL_A::MINACTIVITY + *self == Lplevel::Minactivity } } #[doc = "Field `LPLEVEL` writer - Low Power Level"] -pub type LPLEVEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, LPMODE_SPEC, u8, LPLEVEL_A, 2, O>; -impl<'a, const O: u8> LPLEVEL_W<'a, O> { +pub type LplevelW<'a, REG> = crate::FieldWriter<'a, REG, 2, Lplevel>; +impl<'a, REG> LplevelW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Base instruction cache functionality"] #[inline(always)] - pub fn basic(self) -> &'a mut W { - self.variant(LPLEVEL_A::BASIC) + pub fn basic(self) -> &'a mut crate::W { + self.variant(Lplevel::Basic) } #[doc = "Advanced buffering mode, where the cache uses the fetch pattern to predict highly accessed data and store it in low-energy memory"] #[inline(always)] - pub fn advanced(self) -> &'a mut W { - self.variant(LPLEVEL_A::ADVANCED) + pub fn advanced(self) -> &'a mut crate::W { + self.variant(Lplevel::Advanced) } #[doc = "Minimum activity mode, which allows the cache to minimize activity in logic that it predicts has a low probability being used. This mode can introduce wait-states into the instruction fetch stream when the cache exits one of its low-activity states. The number of wait-states introduced is small, but users running with 0-wait-state memory and wishing to reduce the variability that the cache might introduce with additional wait-states may wish to lower the cache low-power level. Note, this mode includes the advanced buffering mode functionality."] #[inline(always)] - pub fn minactivity(self) -> &'a mut W { - self.variant(LPLEVEL_A::MINACTIVITY) + pub fn minactivity(self) -> &'a mut crate::W { + self.variant(Lplevel::Minactivity) } } #[doc = "Field `NESTFACTOR` reader - Low Power Nest Factor"] -pub type NESTFACTOR_R = crate::FieldReader; +pub type NestfactorR = crate::FieldReader; #[doc = "Field `NESTFACTOR` writer - Low Power Nest Factor"] -pub type NESTFACTOR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, LPMODE_SPEC, u8, u8, 4, O>; +pub type NestfactorW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - Low Power Level"] #[inline(always)] - pub fn lplevel(&self) -> LPLEVEL_R { - LPLEVEL_R::new((self.bits & 3) as u8) + pub fn lplevel(&self) -> LplevelR { + LplevelR::new((self.bits & 3) as u8) } #[doc = "Bits 4:7 - Low Power Nest Factor"] #[inline(always)] - pub fn nestfactor(&self) -> NESTFACTOR_R { - NESTFACTOR_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn nestfactor(&self) -> NestfactorR { + NestfactorR::new(((self.bits >> 4) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - Low Power Level"] #[inline(always)] #[must_use] - pub fn lplevel(&mut self) -> LPLEVEL_W<0> { - LPLEVEL_W::new(self) + pub fn lplevel(&mut self) -> LplevelW { + LplevelW::new(self, 0) } #[doc = "Bits 4:7 - Low Power Nest Factor"] #[inline(always)] #[must_use] - pub fn nestfactor(&mut self) -> NESTFACTOR_W<4> { - NESTFACTOR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn nestfactor(&mut self) -> NestfactorW { + NestfactorW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lpmode](index.html) module"] -pub struct LPMODE_SPEC; -impl crate::RegisterSpec for LPMODE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`lpmode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lpmode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LpmodeSpec; +impl crate::RegisterSpec for LpmodeSpec { type Ux = u32; } -#[doc = "`read()` method returns [lpmode::R](R) reader structure"] -impl crate::Readable for LPMODE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lpmode::W](W) writer structure"] -impl crate::Writable for LPMODE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lpmode::R`](R) reader structure"] +impl crate::Readable for LpmodeSpec {} +#[doc = "`write(|w| ..)` method takes [`lpmode::W`](W) writer structure"] +impl crate::Writable for LpmodeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LPMODE to value 0x23"] -impl crate::Resettable for LPMODE_SPEC { - const RESET_VALUE: Self::Ux = 0x23; +impl crate::Resettable for LpmodeSpec { + const RESET_VALUE: u32 = 0x23; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/pcahits.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/pcahits.rs index ba3c33b..19b66bd 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/pcahits.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/pcahits.rs @@ -1,37 +1,22 @@ #[doc = "Register `PCAHITS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `PCAHITS` reader - Performance Counter Advanced Hits"] -pub type PCAHITS_R = crate::FieldReader; +pub type PcahitsR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Performance Counter Advanced Hits"] #[inline(always)] - pub fn pcahits(&self) -> PCAHITS_R { - PCAHITS_R::new(self.bits) + pub fn pcahits(&self) -> PcahitsR { + PcahitsR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pcahits](index.html) module"] -pub struct PCAHITS_SPEC; -impl crate::RegisterSpec for PCAHITS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pcahits::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PcahitsSpec; +impl crate::RegisterSpec for PcahitsSpec { type Ux = u32; } -#[doc = "`read()` method returns [pcahits::R](R) reader structure"] -impl crate::Readable for PCAHITS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`pcahits::R`](R) reader structure"] +impl crate::Readable for PcahitsSpec {} #[doc = "`reset()` method sets PCAHITS to value 0"] -impl crate::Resettable for PCAHITS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PcahitsSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/pchits.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/pchits.rs index a154e40..2220755 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/pchits.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/pchits.rs @@ -1,37 +1,22 @@ #[doc = "Register `PCHITS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `PCHITS` reader - Performance Counter Hits"] -pub type PCHITS_R = crate::FieldReader; +pub type PchitsR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Performance Counter Hits"] #[inline(always)] - pub fn pchits(&self) -> PCHITS_R { - PCHITS_R::new(self.bits) + pub fn pchits(&self) -> PchitsR { + PchitsR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pchits](index.html) module"] -pub struct PCHITS_SPEC; -impl crate::RegisterSpec for PCHITS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pchits::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PchitsSpec; +impl crate::RegisterSpec for PchitsSpec { type Ux = u32; } -#[doc = "`read()` method returns [pchits::R](R) reader structure"] -impl crate::Readable for PCHITS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`pchits::R`](R) reader structure"] +impl crate::Readable for PchitsSpec {} #[doc = "`reset()` method sets PCHITS to value 0"] -impl crate::Resettable for PCHITS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PchitsSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/pcmisses.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/pcmisses.rs index 9a5229b..340dcd5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/pcmisses.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/pcmisses.rs @@ -1,37 +1,22 @@ #[doc = "Register `PCMISSES` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `PCMISSES` reader - Performance Counter Misses"] -pub type PCMISSES_R = crate::FieldReader; +pub type PcmissesR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Performance Counter Misses"] #[inline(always)] - pub fn pcmisses(&self) -> PCMISSES_R { - PCMISSES_R::new(self.bits) + pub fn pcmisses(&self) -> PcmissesR { + PcmissesR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pcmisses](index.html) module"] -pub struct PCMISSES_SPEC; -impl crate::RegisterSpec for PCMISSES_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pcmisses::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PcmissesSpec; +impl crate::RegisterSpec for PcmissesSpec { type Ux = u32; } -#[doc = "`read()` method returns [pcmisses::R](R) reader structure"] -impl crate::Readable for PCMISSES_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`pcmisses::R`](R) reader structure"] +impl crate::Readable for PcmissesSpec {} #[doc = "`reset()` method sets PCMISSES to value 0"] -impl crate::Resettable for PCMISSES_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PcmissesSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/status.rs index 188b8fd..1b79240 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_ns/status.rs @@ -1,37 +1,22 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `PCRUNNING` reader - PC Running"] -pub type PCRUNNING_R = crate::BitReader; +pub type PcrunningR = crate::BitReader; impl R { #[doc = "Bit 0 - PC Running"] #[inline(always)] - pub fn pcrunning(&self) -> PCRUNNING_R { - PCRUNNING_R::new((self.bits & 1) != 0) + pub fn pcrunning(&self) -> PcrunningR { + PcrunningR::new((self.bits & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s.rs index 3b2d27f..98e2075 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s.rs @@ -1,64 +1,126 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + ctrl: Ctrl, + pchits: Pchits, + pcmisses: Pcmisses, + pcahits: Pcahits, + status: Status, + cmd: Cmd, + lpmode: Lpmode, + if_: If, + ien: Ien, +} +impl RegisterBlock { #[doc = "0x00 - The read only IPVERSION field gives the version for this module. There may be minor software changes required for modules with different values of IPVERSION."] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x08 - No Description"] - pub pchits: PCHITS, + #[inline(always)] + pub const fn pchits(&self) -> &Pchits { + &self.pchits + } #[doc = "0x0c - No Description"] - pub pcmisses: PCMISSES, + #[inline(always)] + pub const fn pcmisses(&self) -> &Pcmisses { + &self.pcmisses + } #[doc = "0x10 - No Description"] - pub pcahits: PCAHITS, + #[inline(always)] + pub const fn pcahits(&self) -> &Pcahits { + &self.pcahits + } #[doc = "0x14 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x18 - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x1c - No Description"] - pub lpmode: LPMODE, + #[inline(always)] + pub const fn lpmode(&self) -> &Lpmode { + &self.lpmode + } #[doc = "0x20 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x24 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: The read only IPVERSION field gives the version for this module. There may be minor software changes required for modules with different values of IPVERSION.\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "The read only IPVERSION field gives the version for this module. There may be minor software changes required for modules with different values of IPVERSION."] pub mod ipversion; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "PCHITS (r) register accessor: an alias for `Reg`"] -pub type PCHITS = crate::Reg; +#[doc = "PCHITS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pchits::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pchits`] +module"] +#[doc(alias = "PCHITS")] +pub type Pchits = crate::Reg; #[doc = "No Description"] pub mod pchits; -#[doc = "PCMISSES (r) register accessor: an alias for `Reg`"] -pub type PCMISSES = crate::Reg; +#[doc = "PCMISSES (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pcmisses::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcmisses`] +module"] +#[doc(alias = "PCMISSES")] +pub type Pcmisses = crate::Reg; #[doc = "No Description"] pub mod pcmisses; -#[doc = "PCAHITS (r) register accessor: an alias for `Reg`"] -pub type PCAHITS = crate::Reg; +#[doc = "PCAHITS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pcahits::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcahits`] +module"] +#[doc(alias = "PCAHITS")] +pub type Pcahits = crate::Reg; #[doc = "No Description"] pub mod pcahits; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "LPMODE (rw) register accessor: an alias for `Reg`"] -pub type LPMODE = crate::Reg; +#[doc = "LPMODE (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`lpmode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lpmode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lpmode`] +module"] +#[doc(alias = "LPMODE")] +pub type Lpmode = crate::Reg; #[doc = "No Description"] pub mod lpmode; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/cmd.rs index 4fece64..b0dbc37 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/cmd.rs @@ -1,68 +1,43 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `FLUSH` writer - Flush"] -pub type FLUSH_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type FlushW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STARTPC` writer - Start Performance Counters"] -pub type STARTPC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StartpcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STOPPC` writer - Stop Performance Counters"] -pub type STOPPC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StoppcW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Flush"] #[inline(always)] #[must_use] - pub fn flush(&mut self) -> FLUSH_W<0> { - FLUSH_W::new(self) + pub fn flush(&mut self) -> FlushW { + FlushW::new(self, 0) } #[doc = "Bit 1 - Start Performance Counters"] #[inline(always)] #[must_use] - pub fn startpc(&mut self) -> STARTPC_W<1> { - STARTPC_W::new(self) + pub fn startpc(&mut self) -> StartpcW { + StartpcW::new(self, 1) } #[doc = "Bit 2 - Stop Performance Counters"] #[inline(always)] #[must_use] - pub fn stoppc(&mut self) -> STOPPC_W<2> { - STOPPC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stoppc(&mut self) -> StoppcW { + StoppcW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/ctrl.rs index 0c5e78a..123bd27 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/ctrl.rs @@ -1,110 +1,70 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CACHEDIS` reader - Cache Disable"] -pub type CACHEDIS_R = crate::BitReader; +pub type CachedisR = crate::BitReader; #[doc = "Field `CACHEDIS` writer - Cache Disable"] -pub type CACHEDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type CachedisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USEMPU` reader - Use MPU"] -pub type USEMPU_R = crate::BitReader; +pub type UsempuR = crate::BitReader; #[doc = "Field `USEMPU` writer - Use MPU"] -pub type USEMPU_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type UsempuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOFLUSHDIS` reader - Automatic Flushing Disable"] -pub type AUTOFLUSHDIS_R = crate::BitReader; +pub type AutoflushdisR = crate::BitReader; #[doc = "Field `AUTOFLUSHDIS` writer - Automatic Flushing Disable"] -pub type AUTOFLUSHDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type AutoflushdisW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Cache Disable"] #[inline(always)] - pub fn cachedis(&self) -> CACHEDIS_R { - CACHEDIS_R::new((self.bits & 1) != 0) + pub fn cachedis(&self) -> CachedisR { + CachedisR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Use MPU"] #[inline(always)] - pub fn usempu(&self) -> USEMPU_R { - USEMPU_R::new(((self.bits >> 1) & 1) != 0) + pub fn usempu(&self) -> UsempuR { + UsempuR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Automatic Flushing Disable"] #[inline(always)] - pub fn autoflushdis(&self) -> AUTOFLUSHDIS_R { - AUTOFLUSHDIS_R::new(((self.bits >> 2) & 1) != 0) + pub fn autoflushdis(&self) -> AutoflushdisR { + AutoflushdisR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Cache Disable"] #[inline(always)] #[must_use] - pub fn cachedis(&mut self) -> CACHEDIS_W<0> { - CACHEDIS_W::new(self) + pub fn cachedis(&mut self) -> CachedisW { + CachedisW::new(self, 0) } #[doc = "Bit 1 - Use MPU"] #[inline(always)] #[must_use] - pub fn usempu(&mut self) -> USEMPU_W<1> { - USEMPU_W::new(self) + pub fn usempu(&mut self) -> UsempuW { + UsempuW::new(self, 1) } #[doc = "Bit 2 - Automatic Flushing Disable"] #[inline(always)] #[must_use] - pub fn autoflushdis(&mut self) -> AUTOFLUSHDIS_W<2> { - AUTOFLUSHDIS_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn autoflushdis(&mut self) -> AutoflushdisW { + AutoflushdisW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/ien.rs index 5b836a6..f9e47ae 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/ien.rs @@ -1,125 +1,85 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `HITOF` reader - Hit Overflow Interrupt Enable"] -pub type HITOF_R = crate::BitReader; +pub type HitofR = crate::BitReader; #[doc = "Field `HITOF` writer - Hit Overflow Interrupt Enable"] -pub type HITOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type HitofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MISSOF` reader - Miss Overflow Interrupt Enable"] -pub type MISSOF_R = crate::BitReader; +pub type MissofR = crate::BitReader; #[doc = "Field `MISSOF` writer - Miss Overflow Interrupt Enable"] -pub type MISSOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type MissofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHITOF` reader - Advanced Hit Overflow Interrupt Enable"] -pub type AHITOF_R = crate::BitReader; +pub type AhitofR = crate::BitReader; #[doc = "Field `AHITOF` writer - Advanced Hit Overflow Interrupt Enable"] -pub type AHITOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AhitofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RAMERROR` reader - RAM error Interrupt Enable"] -pub type RAMERROR_R = crate::BitReader; +pub type RamerrorR = crate::BitReader; #[doc = "Field `RAMERROR` writer - RAM error Interrupt Enable"] -pub type RAMERROR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RamerrorW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Hit Overflow Interrupt Enable"] #[inline(always)] - pub fn hitof(&self) -> HITOF_R { - HITOF_R::new((self.bits & 1) != 0) + pub fn hitof(&self) -> HitofR { + HitofR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Miss Overflow Interrupt Enable"] #[inline(always)] - pub fn missof(&self) -> MISSOF_R { - MISSOF_R::new(((self.bits >> 1) & 1) != 0) + pub fn missof(&self) -> MissofR { + MissofR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Advanced Hit Overflow Interrupt Enable"] #[inline(always)] - pub fn ahitof(&self) -> AHITOF_R { - AHITOF_R::new(((self.bits >> 2) & 1) != 0) + pub fn ahitof(&self) -> AhitofR { + AhitofR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 8 - RAM error Interrupt Enable"] #[inline(always)] - pub fn ramerror(&self) -> RAMERROR_R { - RAMERROR_R::new(((self.bits >> 8) & 1) != 0) + pub fn ramerror(&self) -> RamerrorR { + RamerrorR::new(((self.bits >> 8) & 1) != 0) } } impl W { #[doc = "Bit 0 - Hit Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn hitof(&mut self) -> HITOF_W<0> { - HITOF_W::new(self) + pub fn hitof(&mut self) -> HitofW { + HitofW::new(self, 0) } #[doc = "Bit 1 - Miss Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn missof(&mut self) -> MISSOF_W<1> { - MISSOF_W::new(self) + pub fn missof(&mut self) -> MissofW { + MissofW::new(self, 1) } #[doc = "Bit 2 - Advanced Hit Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ahitof(&mut self) -> AHITOF_W<2> { - AHITOF_W::new(self) + pub fn ahitof(&mut self) -> AhitofW { + AhitofW::new(self, 2) } #[doc = "Bit 8 - RAM error Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ramerror(&mut self) -> RAMERROR_W<8> { - RAMERROR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ramerror(&mut self) -> RamerrorW { + RamerrorW::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/if_.rs index 1a33623..c47b027 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/if_.rs @@ -1,125 +1,85 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `HITOF` reader - Hit Overflow Interrupt Flag"] -pub type HITOF_R = crate::BitReader; +pub type HitofR = crate::BitReader; #[doc = "Field `HITOF` writer - Hit Overflow Interrupt Flag"] -pub type HITOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type HitofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MISSOF` reader - Miss Overflow Interrupt Flag"] -pub type MISSOF_R = crate::BitReader; +pub type MissofR = crate::BitReader; #[doc = "Field `MISSOF` writer - Miss Overflow Interrupt Flag"] -pub type MISSOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type MissofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHITOF` reader - Advanced Hit Overflow Interrupt Flag"] -pub type AHITOF_R = crate::BitReader; +pub type AhitofR = crate::BitReader; #[doc = "Field `AHITOF` writer - Advanced Hit Overflow Interrupt Flag"] -pub type AHITOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AhitofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RAMERROR` reader - RAM error Interrupt Flag"] -pub type RAMERROR_R = crate::BitReader; +pub type RamerrorR = crate::BitReader; #[doc = "Field `RAMERROR` writer - RAM error Interrupt Flag"] -pub type RAMERROR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RamerrorW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Hit Overflow Interrupt Flag"] #[inline(always)] - pub fn hitof(&self) -> HITOF_R { - HITOF_R::new((self.bits & 1) != 0) + pub fn hitof(&self) -> HitofR { + HitofR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Miss Overflow Interrupt Flag"] #[inline(always)] - pub fn missof(&self) -> MISSOF_R { - MISSOF_R::new(((self.bits >> 1) & 1) != 0) + pub fn missof(&self) -> MissofR { + MissofR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Advanced Hit Overflow Interrupt Flag"] #[inline(always)] - pub fn ahitof(&self) -> AHITOF_R { - AHITOF_R::new(((self.bits >> 2) & 1) != 0) + pub fn ahitof(&self) -> AhitofR { + AhitofR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 8 - RAM error Interrupt Flag"] #[inline(always)] - pub fn ramerror(&self) -> RAMERROR_R { - RAMERROR_R::new(((self.bits >> 8) & 1) != 0) + pub fn ramerror(&self) -> RamerrorR { + RamerrorR::new(((self.bits >> 8) & 1) != 0) } } impl W { #[doc = "Bit 0 - Hit Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn hitof(&mut self) -> HITOF_W<0> { - HITOF_W::new(self) + pub fn hitof(&mut self) -> HitofW { + HitofW::new(self, 0) } #[doc = "Bit 1 - Miss Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn missof(&mut self) -> MISSOF_W<1> { - MISSOF_W::new(self) + pub fn missof(&mut self) -> MissofW { + MissofW::new(self, 1) } #[doc = "Bit 2 - Advanced Hit Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ahitof(&mut self) -> AHITOF_W<2> { - AHITOF_W::new(self) + pub fn ahitof(&mut self) -> AhitofW { + AhitofW::new(self, 2) } #[doc = "Bit 8 - RAM error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ramerror(&mut self) -> RAMERROR_W<8> { - RAMERROR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ramerror(&mut self) -> RamerrorW { + RamerrorW::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/ipversion.rs index 77b8fdb..1717852 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "The read only IPVERSION field gives the version for this module. There may be minor software changes required for modules with different values of IPVERSION.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "The read only IPVERSION field gives the version for this module. There may be minor software changes required for modules with different values of IPVERSION.\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/lpmode.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/lpmode.rs index 7de5ac3..0810d60 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/lpmode.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/lpmode.rs @@ -1,156 +1,124 @@ #[doc = "Register `LPMODE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `LPMODE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `LPLEVEL` reader - Low Power Level"] -pub type LPLEVEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Low Power Level\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LPLEVEL_A { +pub enum Lplevel { #[doc = "0: Base instruction cache functionality"] - BASIC = 0, + Basic = 0, #[doc = "1: Advanced buffering mode, where the cache uses the fetch pattern to predict highly accessed data and store it in low-energy memory"] - ADVANCED = 1, + Advanced = 1, #[doc = "3: Minimum activity mode, which allows the cache to minimize activity in logic that it predicts has a low probability being used. This mode can introduce wait-states into the instruction fetch stream when the cache exits one of its low-activity states. The number of wait-states introduced is small, but users running with 0-wait-state memory and wishing to reduce the variability that the cache might introduce with additional wait-states may wish to lower the cache low-power level. Note, this mode includes the advanced buffering mode functionality."] - MINACTIVITY = 3, + Minactivity = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LPLEVEL_A) -> Self { + fn from(variant: Lplevel) -> Self { variant as _ } } -impl LPLEVEL_R { +impl crate::FieldSpec for Lplevel { + type Ux = u8; +} +impl crate::IsEnum for Lplevel {} +#[doc = "Field `LPLEVEL` reader - Low Power Level"] +pub type LplevelR = crate::FieldReader; +impl LplevelR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(LPLEVEL_A::BASIC), - 1 => Some(LPLEVEL_A::ADVANCED), - 3 => Some(LPLEVEL_A::MINACTIVITY), + 0 => Some(Lplevel::Basic), + 1 => Some(Lplevel::Advanced), + 3 => Some(Lplevel::Minactivity), _ => None, } } - #[doc = "Checks if the value of the field is `BASIC`"] + #[doc = "Base instruction cache functionality"] #[inline(always)] pub fn is_basic(&self) -> bool { - *self == LPLEVEL_A::BASIC + *self == Lplevel::Basic } - #[doc = "Checks if the value of the field is `ADVANCED`"] + #[doc = "Advanced buffering mode, where the cache uses the fetch pattern to predict highly accessed data and store it in low-energy memory"] #[inline(always)] pub fn is_advanced(&self) -> bool { - *self == LPLEVEL_A::ADVANCED + *self == Lplevel::Advanced } - #[doc = "Checks if the value of the field is `MINACTIVITY`"] + #[doc = "Minimum activity mode, which allows the cache to minimize activity in logic that it predicts has a low probability being used. This mode can introduce wait-states into the instruction fetch stream when the cache exits one of its low-activity states. The number of wait-states introduced is small, but users running with 0-wait-state memory and wishing to reduce the variability that the cache might introduce with additional wait-states may wish to lower the cache low-power level. Note, this mode includes the advanced buffering mode functionality."] #[inline(always)] pub fn is_minactivity(&self) -> bool { - *self == LPLEVEL_A::MINACTIVITY + *self == Lplevel::Minactivity } } #[doc = "Field `LPLEVEL` writer - Low Power Level"] -pub type LPLEVEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, LPMODE_SPEC, u8, LPLEVEL_A, 2, O>; -impl<'a, const O: u8> LPLEVEL_W<'a, O> { +pub type LplevelW<'a, REG> = crate::FieldWriter<'a, REG, 2, Lplevel>; +impl<'a, REG> LplevelW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Base instruction cache functionality"] #[inline(always)] - pub fn basic(self) -> &'a mut W { - self.variant(LPLEVEL_A::BASIC) + pub fn basic(self) -> &'a mut crate::W { + self.variant(Lplevel::Basic) } #[doc = "Advanced buffering mode, where the cache uses the fetch pattern to predict highly accessed data and store it in low-energy memory"] #[inline(always)] - pub fn advanced(self) -> &'a mut W { - self.variant(LPLEVEL_A::ADVANCED) + pub fn advanced(self) -> &'a mut crate::W { + self.variant(Lplevel::Advanced) } #[doc = "Minimum activity mode, which allows the cache to minimize activity in logic that it predicts has a low probability being used. This mode can introduce wait-states into the instruction fetch stream when the cache exits one of its low-activity states. The number of wait-states introduced is small, but users running with 0-wait-state memory and wishing to reduce the variability that the cache might introduce with additional wait-states may wish to lower the cache low-power level. Note, this mode includes the advanced buffering mode functionality."] #[inline(always)] - pub fn minactivity(self) -> &'a mut W { - self.variant(LPLEVEL_A::MINACTIVITY) + pub fn minactivity(self) -> &'a mut crate::W { + self.variant(Lplevel::Minactivity) } } #[doc = "Field `NESTFACTOR` reader - Low Power Nest Factor"] -pub type NESTFACTOR_R = crate::FieldReader; +pub type NestfactorR = crate::FieldReader; #[doc = "Field `NESTFACTOR` writer - Low Power Nest Factor"] -pub type NESTFACTOR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, LPMODE_SPEC, u8, u8, 4, O>; +pub type NestfactorW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:1 - Low Power Level"] #[inline(always)] - pub fn lplevel(&self) -> LPLEVEL_R { - LPLEVEL_R::new((self.bits & 3) as u8) + pub fn lplevel(&self) -> LplevelR { + LplevelR::new((self.bits & 3) as u8) } #[doc = "Bits 4:7 - Low Power Nest Factor"] #[inline(always)] - pub fn nestfactor(&self) -> NESTFACTOR_R { - NESTFACTOR_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn nestfactor(&self) -> NestfactorR { + NestfactorR::new(((self.bits >> 4) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - Low Power Level"] #[inline(always)] #[must_use] - pub fn lplevel(&mut self) -> LPLEVEL_W<0> { - LPLEVEL_W::new(self) + pub fn lplevel(&mut self) -> LplevelW { + LplevelW::new(self, 0) } #[doc = "Bits 4:7 - Low Power Nest Factor"] #[inline(always)] #[must_use] - pub fn nestfactor(&mut self) -> NESTFACTOR_W<4> { - NESTFACTOR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn nestfactor(&mut self) -> NestfactorW { + NestfactorW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lpmode](index.html) module"] -pub struct LPMODE_SPEC; -impl crate::RegisterSpec for LPMODE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`lpmode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lpmode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LpmodeSpec; +impl crate::RegisterSpec for LpmodeSpec { type Ux = u32; } -#[doc = "`read()` method returns [lpmode::R](R) reader structure"] -impl crate::Readable for LPMODE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [lpmode::W](W) writer structure"] -impl crate::Writable for LPMODE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`lpmode::R`](R) reader structure"] +impl crate::Readable for LpmodeSpec {} +#[doc = "`write(|w| ..)` method takes [`lpmode::W`](W) writer structure"] +impl crate::Writable for LpmodeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LPMODE to value 0x23"] -impl crate::Resettable for LPMODE_SPEC { - const RESET_VALUE: Self::Ux = 0x23; +impl crate::Resettable for LpmodeSpec { + const RESET_VALUE: u32 = 0x23; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/pcahits.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/pcahits.rs index ba3c33b..19b66bd 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/pcahits.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/pcahits.rs @@ -1,37 +1,22 @@ #[doc = "Register `PCAHITS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `PCAHITS` reader - Performance Counter Advanced Hits"] -pub type PCAHITS_R = crate::FieldReader; +pub type PcahitsR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Performance Counter Advanced Hits"] #[inline(always)] - pub fn pcahits(&self) -> PCAHITS_R { - PCAHITS_R::new(self.bits) + pub fn pcahits(&self) -> PcahitsR { + PcahitsR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pcahits](index.html) module"] -pub struct PCAHITS_SPEC; -impl crate::RegisterSpec for PCAHITS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pcahits::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PcahitsSpec; +impl crate::RegisterSpec for PcahitsSpec { type Ux = u32; } -#[doc = "`read()` method returns [pcahits::R](R) reader structure"] -impl crate::Readable for PCAHITS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`pcahits::R`](R) reader structure"] +impl crate::Readable for PcahitsSpec {} #[doc = "`reset()` method sets PCAHITS to value 0"] -impl crate::Resettable for PCAHITS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PcahitsSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/pchits.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/pchits.rs index a154e40..2220755 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/pchits.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/pchits.rs @@ -1,37 +1,22 @@ #[doc = "Register `PCHITS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `PCHITS` reader - Performance Counter Hits"] -pub type PCHITS_R = crate::FieldReader; +pub type PchitsR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Performance Counter Hits"] #[inline(always)] - pub fn pchits(&self) -> PCHITS_R { - PCHITS_R::new(self.bits) + pub fn pchits(&self) -> PchitsR { + PchitsR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pchits](index.html) module"] -pub struct PCHITS_SPEC; -impl crate::RegisterSpec for PCHITS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pchits::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PchitsSpec; +impl crate::RegisterSpec for PchitsSpec { type Ux = u32; } -#[doc = "`read()` method returns [pchits::R](R) reader structure"] -impl crate::Readable for PCHITS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`pchits::R`](R) reader structure"] +impl crate::Readable for PchitsSpec {} #[doc = "`reset()` method sets PCHITS to value 0"] -impl crate::Resettable for PCHITS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PchitsSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/pcmisses.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/pcmisses.rs index 9a5229b..340dcd5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/pcmisses.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/pcmisses.rs @@ -1,37 +1,22 @@ #[doc = "Register `PCMISSES` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `PCMISSES` reader - Performance Counter Misses"] -pub type PCMISSES_R = crate::FieldReader; +pub type PcmissesR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Performance Counter Misses"] #[inline(always)] - pub fn pcmisses(&self) -> PCMISSES_R { - PCMISSES_R::new(self.bits) + pub fn pcmisses(&self) -> PcmissesR { + PcmissesR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pcmisses](index.html) module"] -pub struct PCMISSES_SPEC; -impl crate::RegisterSpec for PCMISSES_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pcmisses::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PcmissesSpec; +impl crate::RegisterSpec for PcmissesSpec { type Ux = u32; } -#[doc = "`read()` method returns [pcmisses::R](R) reader structure"] -impl crate::Readable for PCMISSES_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`pcmisses::R`](R) reader structure"] +impl crate::Readable for PcmissesSpec {} #[doc = "`reset()` method sets PCMISSES to value 0"] -impl crate::Resettable for PCMISSES_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PcmissesSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/status.rs index 188b8fd..1b79240 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/icache0_s/status.rs @@ -1,37 +1,22 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `PCRUNNING` reader - PC Running"] -pub type PCRUNNING_R = crate::BitReader; +pub type PcrunningR = crate::BitReader; impl R { #[doc = "Bit 0 - PC Running"] #[inline(always)] - pub fn pcrunning(&self) -> PCRUNNING_R { - PCRUNNING_R::new((self.bits & 1) != 0) + pub fn pcrunning(&self) -> PcrunningR { + PcrunningR::new((self.bits & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns.rs index 68a556f..2f5159a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns.rs @@ -1,58 +1,114 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + swrst: Swrst, + cfg: Cfg, + cmd: Cmd, + delay: Delay, + status: Status, + if_: If, + ien: Ien, +} +impl RegisterBlock { #[doc = "0x00 - IPVERSION"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - Enable"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - Software Reset"] - pub swrst: SWRST, + #[inline(always)] + pub const fn swrst(&self) -> &Swrst { + &self.swrst + } #[doc = "0x0c - Config"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x10 - Command"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x14 - Delay"] - pub delay: DELAY, + #[inline(always)] + pub const fn delay(&self) -> &Delay { + &self.delay + } #[doc = "0x18 - Status"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x1c - Interrupt Flags"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x20 - Interrupt Enables"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: IPVERSION\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "IPVERSION"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "Enable"] pub mod en; -#[doc = "SWRST (rw) register accessor: an alias for `Reg`"] -pub type SWRST = crate::Reg; +#[doc = "SWRST (rw) register accessor: Software Reset\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swrst`] +module"] +#[doc(alias = "SWRST")] +pub type Swrst = crate::Reg; #[doc = "Software Reset"] pub mod swrst; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: Config\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "Config"] pub mod cfg; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: Command\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "Command"] pub mod cmd; -#[doc = "DELAY (rw) register accessor: an alias for `Reg`"] -pub type DELAY = crate::Reg; +#[doc = "DELAY (rw) register accessor: Delay\n\nYou can [`read`](crate::Reg::read) this register and get [`delay::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`delay::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@delay`] +module"] +#[doc(alias = "DELAY")] +pub type Delay = crate::Reg; #[doc = "Delay"] pub mod delay; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: Status\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "Status"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: Interrupt Flags\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "Interrupt Flags"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: Interrupt Enables\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "Interrupt Enables"] pub mod ien; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/cfg.rs index d992c75..9f7078b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/cfg.rs @@ -1,332 +1,306 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CLKDIV` reader - Clock Divider"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CLKDIV` writer - Clock Divider"] -pub type CLKDIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u32, u32, 18, O>; -#[doc = "Field `SINGLEPRESS` reader - Single Press"] -pub type SINGLEPRESS_R = crate::BitReader; +pub type ClkdivW<'a, REG> = crate::FieldWriter<'a, REG, 18, u32>; #[doc = "Single Press\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SINGLEPRESS_A { +pub enum Singlepress { #[doc = "0: After KEYIF is set and then cleared, scanning will continue. This can give multiple interrupts for the same key press, but allow multiple key presses to be detected. To use this mode for multi-key detection, the ISR should update a section of memory of COLNUM bytes on each interrupt, until key release is detected. After key release, the section of memory where key presses are recorded can be processed."] - MULTIPRESS = 0, + Multipress = 0, #[doc = "1: After KEYIF has been set and cleared, it will not set again until no key press is detected. This allows faster response since the ISR can start processing data as soon as the KEYIF is set."] - SINGLEPRESS = 1, + Singlepress = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SINGLEPRESS_A) -> Self { + fn from(variant: Singlepress) -> Self { variant as u8 != 0 } } -impl SINGLEPRESS_R { +#[doc = "Field `SINGLEPRESS` reader - Single Press"] +pub type SinglepressR = crate::BitReader; +impl SinglepressR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SINGLEPRESS_A { + pub const fn variant(&self) -> Singlepress { match self.bits { - false => SINGLEPRESS_A::MULTIPRESS, - true => SINGLEPRESS_A::SINGLEPRESS, + false => Singlepress::Multipress, + true => Singlepress::Singlepress, } } - #[doc = "Checks if the value of the field is `MULTIPRESS`"] + #[doc = "After KEYIF is set and then cleared, scanning will continue. This can give multiple interrupts for the same key press, but allow multiple key presses to be detected. To use this mode for multi-key detection, the ISR should update a section of memory of COLNUM bytes on each interrupt, until key release is detected. After key release, the section of memory where key presses are recorded can be processed."] #[inline(always)] pub fn is_multipress(&self) -> bool { - *self == SINGLEPRESS_A::MULTIPRESS + *self == Singlepress::Multipress } - #[doc = "Checks if the value of the field is `SINGLEPRESS`"] + #[doc = "After KEYIF has been set and cleared, it will not set again until no key press is detected. This allows faster response since the ISR can start processing data as soon as the KEYIF is set."] #[inline(always)] pub fn is_singlepress(&self) -> bool { - *self == SINGLEPRESS_A::SINGLEPRESS + *self == Singlepress::Singlepress } } #[doc = "Field `SINGLEPRESS` writer - Single Press"] -pub type SINGLEPRESS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, SINGLEPRESS_A, O>; -impl<'a, const O: u8> SINGLEPRESS_W<'a, O> { +pub type SinglepressW<'a, REG> = crate::BitWriter<'a, REG, Singlepress>; +impl<'a, REG> SinglepressW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "After KEYIF is set and then cleared, scanning will continue. This can give multiple interrupts for the same key press, but allow multiple key presses to be detected. To use this mode for multi-key detection, the ISR should update a section of memory of COLNUM bytes on each interrupt, until key release is detected. After key release, the section of memory where key presses are recorded can be processed."] #[inline(always)] - pub fn multipress(self) -> &'a mut W { - self.variant(SINGLEPRESS_A::MULTIPRESS) + pub fn multipress(self) -> &'a mut crate::W { + self.variant(Singlepress::Multipress) } #[doc = "After KEYIF has been set and cleared, it will not set again until no key press is detected. This allows faster response since the ISR can start processing data as soon as the KEYIF is set."] #[inline(always)] - pub fn singlepress(self) -> &'a mut W { - self.variant(SINGLEPRESS_A::SINGLEPRESS) + pub fn singlepress(self) -> &'a mut crate::W { + self.variant(Singlepress::Singlepress) } } -#[doc = "Field `AUTOSTART` reader - Automatically Start"] -pub type AUTOSTART_R = crate::BitReader; #[doc = "Automatically Start\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AUTOSTART_A { +pub enum Autostart { #[doc = "0: Auto start is disabled"] - AUTOSTARTDIS = 0, + Autostartdis = 0, #[doc = "1: Auto start is enabled"] - AUTOSTARTEN = 1, + Autostarten = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AUTOSTART_A) -> Self { + fn from(variant: Autostart) -> Self { variant as u8 != 0 } } -impl AUTOSTART_R { +#[doc = "Field `AUTOSTART` reader - Automatically Start"] +pub type AutostartR = crate::BitReader; +impl AutostartR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> AUTOSTART_A { + pub const fn variant(&self) -> Autostart { match self.bits { - false => AUTOSTART_A::AUTOSTARTDIS, - true => AUTOSTART_A::AUTOSTARTEN, + false => Autostart::Autostartdis, + true => Autostart::Autostarten, } } - #[doc = "Checks if the value of the field is `AUTOSTARTDIS`"] + #[doc = "Auto start is disabled"] #[inline(always)] pub fn is_autostartdis(&self) -> bool { - *self == AUTOSTART_A::AUTOSTARTDIS + *self == Autostart::Autostartdis } - #[doc = "Checks if the value of the field is `AUTOSTARTEN`"] + #[doc = "Auto start is enabled"] #[inline(always)] pub fn is_autostarten(&self) -> bool { - *self == AUTOSTART_A::AUTOSTARTEN + *self == Autostart::Autostarten } } #[doc = "Field `AUTOSTART` writer - Automatically Start"] -pub type AUTOSTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, AUTOSTART_A, O>; -impl<'a, const O: u8> AUTOSTART_W<'a, O> { +pub type AutostartW<'a, REG> = crate::BitWriter<'a, REG, Autostart>; +impl<'a, REG> AutostartW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Auto start is disabled"] #[inline(always)] - pub fn autostartdis(self) -> &'a mut W { - self.variant(AUTOSTART_A::AUTOSTARTDIS) + pub fn autostartdis(self) -> &'a mut crate::W { + self.variant(Autostart::Autostartdis) } #[doc = "Auto start is enabled"] #[inline(always)] - pub fn autostarten(self) -> &'a mut W { - self.variant(AUTOSTART_A::AUTOSTARTEN) + pub fn autostarten(self) -> &'a mut crate::W { + self.variant(Autostart::Autostarten) } } -#[doc = "Field `NUMROWS` reader - Number of Rows"] -pub type NUMROWS_R = crate::FieldReader; #[doc = "Number of Rows\n\nValue on reset: 5"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum NUMROWS_A { +pub enum Numrows { #[doc = "0: 1 Row is not supported; defaults to 3 instead"] - RSV1 = 0, + Rsv1 = 0, #[doc = "1: 2 Rows are not supported; defaults to 3 instead"] - RSV2 = 1, + Rsv2 = 1, #[doc = "2: 3 Rows"] - ROW3 = 2, + Row3 = 2, #[doc = "3: 4 Rows"] - ROW4 = 3, + Row4 = 3, #[doc = "4: 5 Rows"] - ROW5 = 4, + Row5 = 4, #[doc = "5: 6 Rows"] - ROW6 = 5, + Row6 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: NUMROWS_A) -> Self { + fn from(variant: Numrows) -> Self { variant as _ } } -impl NUMROWS_R { +impl crate::FieldSpec for Numrows { + type Ux = u8; +} +impl crate::IsEnum for Numrows {} +#[doc = "Field `NUMROWS` reader - Number of Rows"] +pub type NumrowsR = crate::FieldReader; +impl NumrowsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(NUMROWS_A::RSV1), - 1 => Some(NUMROWS_A::RSV2), - 2 => Some(NUMROWS_A::ROW3), - 3 => Some(NUMROWS_A::ROW4), - 4 => Some(NUMROWS_A::ROW5), - 5 => Some(NUMROWS_A::ROW6), + 0 => Some(Numrows::Rsv1), + 1 => Some(Numrows::Rsv2), + 2 => Some(Numrows::Row3), + 3 => Some(Numrows::Row4), + 4 => Some(Numrows::Row5), + 5 => Some(Numrows::Row6), _ => None, } } - #[doc = "Checks if the value of the field is `RSV1`"] + #[doc = "1 Row is not supported; defaults to 3 instead"] #[inline(always)] pub fn is_rsv1(&self) -> bool { - *self == NUMROWS_A::RSV1 + *self == Numrows::Rsv1 } - #[doc = "Checks if the value of the field is `RSV2`"] + #[doc = "2 Rows are not supported; defaults to 3 instead"] #[inline(always)] pub fn is_rsv2(&self) -> bool { - *self == NUMROWS_A::RSV2 + *self == Numrows::Rsv2 } - #[doc = "Checks if the value of the field is `ROW3`"] + #[doc = "3 Rows"] #[inline(always)] pub fn is_row3(&self) -> bool { - *self == NUMROWS_A::ROW3 + *self == Numrows::Row3 } - #[doc = "Checks if the value of the field is `ROW4`"] + #[doc = "4 Rows"] #[inline(always)] pub fn is_row4(&self) -> bool { - *self == NUMROWS_A::ROW4 + *self == Numrows::Row4 } - #[doc = "Checks if the value of the field is `ROW5`"] + #[doc = "5 Rows"] #[inline(always)] pub fn is_row5(&self) -> bool { - *self == NUMROWS_A::ROW5 + *self == Numrows::Row5 } - #[doc = "Checks if the value of the field is `ROW6`"] + #[doc = "6 Rows"] #[inline(always)] pub fn is_row6(&self) -> bool { - *self == NUMROWS_A::ROW6 + *self == Numrows::Row6 } } #[doc = "Field `NUMROWS` writer - Number of Rows"] -pub type NUMROWS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, NUMROWS_A, 3, O>; -impl<'a, const O: u8> NUMROWS_W<'a, O> { +pub type NumrowsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Numrows>; +impl<'a, REG> NumrowsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "1 Row is not supported; defaults to 3 instead"] #[inline(always)] - pub fn rsv1(self) -> &'a mut W { - self.variant(NUMROWS_A::RSV1) + pub fn rsv1(self) -> &'a mut crate::W { + self.variant(Numrows::Rsv1) } #[doc = "2 Rows are not supported; defaults to 3 instead"] #[inline(always)] - pub fn rsv2(self) -> &'a mut W { - self.variant(NUMROWS_A::RSV2) + pub fn rsv2(self) -> &'a mut crate::W { + self.variant(Numrows::Rsv2) } #[doc = "3 Rows"] #[inline(always)] - pub fn row3(self) -> &'a mut W { - self.variant(NUMROWS_A::ROW3) + pub fn row3(self) -> &'a mut crate::W { + self.variant(Numrows::Row3) } #[doc = "4 Rows"] #[inline(always)] - pub fn row4(self) -> &'a mut W { - self.variant(NUMROWS_A::ROW4) + pub fn row4(self) -> &'a mut crate::W { + self.variant(Numrows::Row4) } #[doc = "5 Rows"] #[inline(always)] - pub fn row5(self) -> &'a mut W { - self.variant(NUMROWS_A::ROW5) + pub fn row5(self) -> &'a mut crate::W { + self.variant(Numrows::Row5) } #[doc = "6 Rows"] #[inline(always)] - pub fn row6(self) -> &'a mut W { - self.variant(NUMROWS_A::ROW6) + pub fn row6(self) -> &'a mut crate::W { + self.variant(Numrows::Row6) } } #[doc = "Field `NUMCOLS` reader - Number of Columns"] -pub type NUMCOLS_R = crate::FieldReader; +pub type NumcolsR = crate::FieldReader; #[doc = "Field `NUMCOLS` writer - Number of Columns"] -pub type NUMCOLS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, u8, 3, O>; +pub type NumcolsW<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:17 - Clock Divider"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(self.bits & 0x0003_ffff) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(self.bits & 0x0003_ffff) } #[doc = "Bit 20 - Single Press"] #[inline(always)] - pub fn singlepress(&self) -> SINGLEPRESS_R { - SINGLEPRESS_R::new(((self.bits >> 20) & 1) != 0) + pub fn singlepress(&self) -> SinglepressR { + SinglepressR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 22 - Automatically Start"] #[inline(always)] - pub fn autostart(&self) -> AUTOSTART_R { - AUTOSTART_R::new(((self.bits >> 22) & 1) != 0) + pub fn autostart(&self) -> AutostartR { + AutostartR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bits 24:26 - Number of Rows"] #[inline(always)] - pub fn numrows(&self) -> NUMROWS_R { - NUMROWS_R::new(((self.bits >> 24) & 7) as u8) + pub fn numrows(&self) -> NumrowsR { + NumrowsR::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Number of Columns"] #[inline(always)] - pub fn numcols(&self) -> NUMCOLS_R { - NUMCOLS_R::new(((self.bits >> 28) & 7) as u8) + pub fn numcols(&self) -> NumcolsR { + NumcolsR::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:17 - Clock Divider"] #[inline(always)] #[must_use] - pub fn clkdiv(&mut self) -> CLKDIV_W<0> { - CLKDIV_W::new(self) + pub fn clkdiv(&mut self) -> ClkdivW { + ClkdivW::new(self, 0) } #[doc = "Bit 20 - Single Press"] #[inline(always)] #[must_use] - pub fn singlepress(&mut self) -> SINGLEPRESS_W<20> { - SINGLEPRESS_W::new(self) + pub fn singlepress(&mut self) -> SinglepressW { + SinglepressW::new(self, 20) } #[doc = "Bit 22 - Automatically Start"] #[inline(always)] #[must_use] - pub fn autostart(&mut self) -> AUTOSTART_W<22> { - AUTOSTART_W::new(self) + pub fn autostart(&mut self) -> AutostartW { + AutostartW::new(self, 22) } #[doc = "Bits 24:26 - Number of Rows"] #[inline(always)] #[must_use] - pub fn numrows(&mut self) -> NUMROWS_W<24> { - NUMROWS_W::new(self) + pub fn numrows(&mut self) -> NumrowsW { + NumrowsW::new(self, 24) } #[doc = "Bits 28:30 - Number of Columns"] #[inline(always)] #[must_use] - pub fn numcols(&mut self) -> NUMCOLS_W<28> { - NUMCOLS_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn numcols(&mut self) -> NumcolsW { + NumcolsW::new(self, 28) } } -#[doc = "Config\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "Config\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0x2501_387f"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x2501_387f; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0x2501_387f; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/cmd.rs index 012531e..987c881 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/cmd.rs @@ -1,60 +1,35 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `KEYSCANSTART` writer - Keyscan Start"] -pub type KEYSCANSTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type KeyscanstartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `KEYSCANSTOP` writer - Keyscan Stop"] -pub type KEYSCANSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type KeyscanstopW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Keyscan Start"] #[inline(always)] #[must_use] - pub fn keyscanstart(&mut self) -> KEYSCANSTART_W<0> { - KEYSCANSTART_W::new(self) + pub fn keyscanstart(&mut self) -> KeyscanstartW { + KeyscanstartW::new(self, 0) } #[doc = "Bit 1 - Keyscan Stop"] #[inline(always)] #[must_use] - pub fn keyscanstop(&mut self) -> KEYSCANSTOP_W<1> { - KEYSCANSTOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn keyscanstop(&mut self) -> KeyscanstopW { + KeyscanstopW::new(self, 1) } } -#[doc = "Command\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "Command\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/delay.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/delay.rs index 4d4b012..f0d7813 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/delay.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/delay.rs @@ -1,803 +1,784 @@ #[doc = "Register `DELAY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DELAY` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SCANDLY` reader - Scan Delay"] -pub type SCANDLY_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Scan Delay\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SCANDLY_A { +pub enum Scandly { #[doc = "0: 2ms Scan Delay"] - SCANDLY2 = 0, + Scandly2 = 0, #[doc = "1: 4ms Scan Delay"] - SCANDLY4 = 1, + Scandly4 = 1, #[doc = "2: 6ms Scan Delay"] - SCANDLY6 = 2, + Scandly6 = 2, #[doc = "3: 8ms Scan Delay"] - SCANDLY8 = 3, + Scandly8 = 3, #[doc = "4: 10ms Scan Delay"] - SCANDLY10 = 4, + Scandly10 = 4, #[doc = "5: 12ms Scan Delay"] - SCANDLY12 = 5, + Scandly12 = 5, #[doc = "6: 14ms Scan Delay"] - SCANDLY14 = 6, + Scandly14 = 6, #[doc = "7: 16ms Scan Delay"] - SCANDLY16 = 7, + Scandly16 = 7, #[doc = "8: 18ms Scan Delay"] - SCANDLY18 = 8, + Scandly18 = 8, #[doc = "9: 20ms Scan Delay"] - SCANDLY20 = 9, + Scandly20 = 9, #[doc = "10: 22ms Scan Delay"] - SCANDLY22 = 10, + Scandly22 = 10, #[doc = "11: 24ms Scan Delay"] - SCANDLY24 = 11, + Scandly24 = 11, #[doc = "12: 26ms Scan Delay"] - SCANDLY26 = 12, + Scandly26 = 12, #[doc = "13: 28ms Scan Delay"] - SCANDLY28 = 13, + Scandly28 = 13, #[doc = "14: 30ms Scan Delay"] - SCANDLY30 = 14, + Scandly30 = 14, #[doc = "15: 32ms Scan Delay"] - SCANDLY32 = 15, + Scandly32 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SCANDLY_A) -> Self { + fn from(variant: Scandly) -> Self { variant as _ } } -impl SCANDLY_R { +impl crate::FieldSpec for Scandly { + type Ux = u8; +} +impl crate::IsEnum for Scandly {} +#[doc = "Field `SCANDLY` reader - Scan Delay"] +pub type ScandlyR = crate::FieldReader; +impl ScandlyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SCANDLY_A { + pub const fn variant(&self) -> Scandly { match self.bits { - 0 => SCANDLY_A::SCANDLY2, - 1 => SCANDLY_A::SCANDLY4, - 2 => SCANDLY_A::SCANDLY6, - 3 => SCANDLY_A::SCANDLY8, - 4 => SCANDLY_A::SCANDLY10, - 5 => SCANDLY_A::SCANDLY12, - 6 => SCANDLY_A::SCANDLY14, - 7 => SCANDLY_A::SCANDLY16, - 8 => SCANDLY_A::SCANDLY18, - 9 => SCANDLY_A::SCANDLY20, - 10 => SCANDLY_A::SCANDLY22, - 11 => SCANDLY_A::SCANDLY24, - 12 => SCANDLY_A::SCANDLY26, - 13 => SCANDLY_A::SCANDLY28, - 14 => SCANDLY_A::SCANDLY30, - 15 => SCANDLY_A::SCANDLY32, + 0 => Scandly::Scandly2, + 1 => Scandly::Scandly4, + 2 => Scandly::Scandly6, + 3 => Scandly::Scandly8, + 4 => Scandly::Scandly10, + 5 => Scandly::Scandly12, + 6 => Scandly::Scandly14, + 7 => Scandly::Scandly16, + 8 => Scandly::Scandly18, + 9 => Scandly::Scandly20, + 10 => Scandly::Scandly22, + 11 => Scandly::Scandly24, + 12 => Scandly::Scandly26, + 13 => Scandly::Scandly28, + 14 => Scandly::Scandly30, + 15 => Scandly::Scandly32, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `SCANDLY2`"] + #[doc = "2ms Scan Delay"] #[inline(always)] pub fn is_scandly2(&self) -> bool { - *self == SCANDLY_A::SCANDLY2 + *self == Scandly::Scandly2 } - #[doc = "Checks if the value of the field is `SCANDLY4`"] + #[doc = "4ms Scan Delay"] #[inline(always)] pub fn is_scandly4(&self) -> bool { - *self == SCANDLY_A::SCANDLY4 + *self == Scandly::Scandly4 } - #[doc = "Checks if the value of the field is `SCANDLY6`"] + #[doc = "6ms Scan Delay"] #[inline(always)] pub fn is_scandly6(&self) -> bool { - *self == SCANDLY_A::SCANDLY6 + *self == Scandly::Scandly6 } - #[doc = "Checks if the value of the field is `SCANDLY8`"] + #[doc = "8ms Scan Delay"] #[inline(always)] pub fn is_scandly8(&self) -> bool { - *self == SCANDLY_A::SCANDLY8 + *self == Scandly::Scandly8 } - #[doc = "Checks if the value of the field is `SCANDLY10`"] + #[doc = "10ms Scan Delay"] #[inline(always)] pub fn is_scandly10(&self) -> bool { - *self == SCANDLY_A::SCANDLY10 + *self == Scandly::Scandly10 } - #[doc = "Checks if the value of the field is `SCANDLY12`"] + #[doc = "12ms Scan Delay"] #[inline(always)] pub fn is_scandly12(&self) -> bool { - *self == SCANDLY_A::SCANDLY12 + *self == Scandly::Scandly12 } - #[doc = "Checks if the value of the field is `SCANDLY14`"] + #[doc = "14ms Scan Delay"] #[inline(always)] pub fn is_scandly14(&self) -> bool { - *self == SCANDLY_A::SCANDLY14 + *self == Scandly::Scandly14 } - #[doc = "Checks if the value of the field is `SCANDLY16`"] + #[doc = "16ms Scan Delay"] #[inline(always)] pub fn is_scandly16(&self) -> bool { - *self == SCANDLY_A::SCANDLY16 + *self == Scandly::Scandly16 } - #[doc = "Checks if the value of the field is `SCANDLY18`"] + #[doc = "18ms Scan Delay"] #[inline(always)] pub fn is_scandly18(&self) -> bool { - *self == SCANDLY_A::SCANDLY18 + *self == Scandly::Scandly18 } - #[doc = "Checks if the value of the field is `SCANDLY20`"] + #[doc = "20ms Scan Delay"] #[inline(always)] pub fn is_scandly20(&self) -> bool { - *self == SCANDLY_A::SCANDLY20 + *self == Scandly::Scandly20 } - #[doc = "Checks if the value of the field is `SCANDLY22`"] + #[doc = "22ms Scan Delay"] #[inline(always)] pub fn is_scandly22(&self) -> bool { - *self == SCANDLY_A::SCANDLY22 + *self == Scandly::Scandly22 } - #[doc = "Checks if the value of the field is `SCANDLY24`"] + #[doc = "24ms Scan Delay"] #[inline(always)] pub fn is_scandly24(&self) -> bool { - *self == SCANDLY_A::SCANDLY24 + *self == Scandly::Scandly24 } - #[doc = "Checks if the value of the field is `SCANDLY26`"] + #[doc = "26ms Scan Delay"] #[inline(always)] pub fn is_scandly26(&self) -> bool { - *self == SCANDLY_A::SCANDLY26 + *self == Scandly::Scandly26 } - #[doc = "Checks if the value of the field is `SCANDLY28`"] + #[doc = "28ms Scan Delay"] #[inline(always)] pub fn is_scandly28(&self) -> bool { - *self == SCANDLY_A::SCANDLY28 + *self == Scandly::Scandly28 } - #[doc = "Checks if the value of the field is `SCANDLY30`"] + #[doc = "30ms Scan Delay"] #[inline(always)] pub fn is_scandly30(&self) -> bool { - *self == SCANDLY_A::SCANDLY30 + *self == Scandly::Scandly30 } - #[doc = "Checks if the value of the field is `SCANDLY32`"] + #[doc = "32ms Scan Delay"] #[inline(always)] pub fn is_scandly32(&self) -> bool { - *self == SCANDLY_A::SCANDLY32 + *self == Scandly::Scandly32 } } #[doc = "Field `SCANDLY` writer - Scan Delay"] -pub type SCANDLY_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, DELAY_SPEC, u8, SCANDLY_A, 4, O>; -impl<'a, const O: u8> SCANDLY_W<'a, O> { +pub type ScandlyW<'a, REG> = crate::FieldWriter<'a, REG, 4, Scandly, crate::Safe>; +impl<'a, REG> ScandlyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "2ms Scan Delay"] #[inline(always)] - pub fn scandly2(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY2) + pub fn scandly2(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly2) } #[doc = "4ms Scan Delay"] #[inline(always)] - pub fn scandly4(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY4) + pub fn scandly4(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly4) } #[doc = "6ms Scan Delay"] #[inline(always)] - pub fn scandly6(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY6) + pub fn scandly6(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly6) } #[doc = "8ms Scan Delay"] #[inline(always)] - pub fn scandly8(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY8) + pub fn scandly8(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly8) } #[doc = "10ms Scan Delay"] #[inline(always)] - pub fn scandly10(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY10) + pub fn scandly10(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly10) } #[doc = "12ms Scan Delay"] #[inline(always)] - pub fn scandly12(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY12) + pub fn scandly12(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly12) } #[doc = "14ms Scan Delay"] #[inline(always)] - pub fn scandly14(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY14) + pub fn scandly14(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly14) } #[doc = "16ms Scan Delay"] #[inline(always)] - pub fn scandly16(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY16) + pub fn scandly16(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly16) } #[doc = "18ms Scan Delay"] #[inline(always)] - pub fn scandly18(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY18) + pub fn scandly18(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly18) } #[doc = "20ms Scan Delay"] #[inline(always)] - pub fn scandly20(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY20) + pub fn scandly20(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly20) } #[doc = "22ms Scan Delay"] #[inline(always)] - pub fn scandly22(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY22) + pub fn scandly22(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly22) } #[doc = "24ms Scan Delay"] #[inline(always)] - pub fn scandly24(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY24) + pub fn scandly24(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly24) } #[doc = "26ms Scan Delay"] #[inline(always)] - pub fn scandly26(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY26) + pub fn scandly26(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly26) } #[doc = "28ms Scan Delay"] #[inline(always)] - pub fn scandly28(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY28) + pub fn scandly28(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly28) } #[doc = "30ms Scan Delay"] #[inline(always)] - pub fn scandly30(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY30) + pub fn scandly30(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly30) } #[doc = "32ms Scan Delay"] #[inline(always)] - pub fn scandly32(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY32) + pub fn scandly32(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly32) } } -#[doc = "Field `DEBDLY` reader - Debounce Delay"] -pub type DEBDLY_R = crate::FieldReader; #[doc = "Debounce Delay\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DEBDLY_A { +pub enum Debdly { #[doc = "0: 2ms Debounce Delay"] - DEBDLY2 = 0, + Debdly2 = 0, #[doc = "1: 4ms Debounce Delay"] - DEBDLY4 = 1, + Debdly4 = 1, #[doc = "2: 6ms Debounce Delay"] - DEBDLY6 = 2, + Debdly6 = 2, #[doc = "3: 8ms Debounce Delay"] - DEBDLY8 = 3, + Debdly8 = 3, #[doc = "4: 10ms Debounce Delay"] - DEBDLY10 = 4, + Debdly10 = 4, #[doc = "5: 12ms Debounce Delay"] - DEBDLY12 = 5, + Debdly12 = 5, #[doc = "6: 14ms Debounce Delay"] - DEBDLY14 = 6, + Debdly14 = 6, #[doc = "7: 16ms Debounce Delay"] - DEBDLY16 = 7, + Debdly16 = 7, #[doc = "8: 18ms Debounce Delay"] - DEBDLY18 = 8, + Debdly18 = 8, #[doc = "9: 20ms Debounce Delay"] - DEBDLY20 = 9, + Debdly20 = 9, #[doc = "10: 22ms Debounce Delay"] - DEBDLY22 = 10, + Debdly22 = 10, #[doc = "11: 24ms Debounce Delay"] - DEBDLY24 = 11, + Debdly24 = 11, #[doc = "12: 26ms Debounce Delay"] - DEBDLY26 = 12, + Debdly26 = 12, #[doc = "13: 28ms Debounce Delay"] - DEBDLY28 = 13, + Debdly28 = 13, #[doc = "14: 30ms Debounce Delay"] - DEBDLY30 = 14, + Debdly30 = 14, #[doc = "15: 32ms Debounce Delay"] - DEBDLY32 = 15, + Debdly32 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DEBDLY_A) -> Self { + fn from(variant: Debdly) -> Self { variant as _ } } -impl DEBDLY_R { +impl crate::FieldSpec for Debdly { + type Ux = u8; +} +impl crate::IsEnum for Debdly {} +#[doc = "Field `DEBDLY` reader - Debounce Delay"] +pub type DebdlyR = crate::FieldReader; +impl DebdlyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DEBDLY_A { + pub const fn variant(&self) -> Debdly { match self.bits { - 0 => DEBDLY_A::DEBDLY2, - 1 => DEBDLY_A::DEBDLY4, - 2 => DEBDLY_A::DEBDLY6, - 3 => DEBDLY_A::DEBDLY8, - 4 => DEBDLY_A::DEBDLY10, - 5 => DEBDLY_A::DEBDLY12, - 6 => DEBDLY_A::DEBDLY14, - 7 => DEBDLY_A::DEBDLY16, - 8 => DEBDLY_A::DEBDLY18, - 9 => DEBDLY_A::DEBDLY20, - 10 => DEBDLY_A::DEBDLY22, - 11 => DEBDLY_A::DEBDLY24, - 12 => DEBDLY_A::DEBDLY26, - 13 => DEBDLY_A::DEBDLY28, - 14 => DEBDLY_A::DEBDLY30, - 15 => DEBDLY_A::DEBDLY32, + 0 => Debdly::Debdly2, + 1 => Debdly::Debdly4, + 2 => Debdly::Debdly6, + 3 => Debdly::Debdly8, + 4 => Debdly::Debdly10, + 5 => Debdly::Debdly12, + 6 => Debdly::Debdly14, + 7 => Debdly::Debdly16, + 8 => Debdly::Debdly18, + 9 => Debdly::Debdly20, + 10 => Debdly::Debdly22, + 11 => Debdly::Debdly24, + 12 => Debdly::Debdly26, + 13 => Debdly::Debdly28, + 14 => Debdly::Debdly30, + 15 => Debdly::Debdly32, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DEBDLY2`"] + #[doc = "2ms Debounce Delay"] #[inline(always)] pub fn is_debdly2(&self) -> bool { - *self == DEBDLY_A::DEBDLY2 + *self == Debdly::Debdly2 } - #[doc = "Checks if the value of the field is `DEBDLY4`"] + #[doc = "4ms Debounce Delay"] #[inline(always)] pub fn is_debdly4(&self) -> bool { - *self == DEBDLY_A::DEBDLY4 + *self == Debdly::Debdly4 } - #[doc = "Checks if the value of the field is `DEBDLY6`"] + #[doc = "6ms Debounce Delay"] #[inline(always)] pub fn is_debdly6(&self) -> bool { - *self == DEBDLY_A::DEBDLY6 + *self == Debdly::Debdly6 } - #[doc = "Checks if the value of the field is `DEBDLY8`"] + #[doc = "8ms Debounce Delay"] #[inline(always)] pub fn is_debdly8(&self) -> bool { - *self == DEBDLY_A::DEBDLY8 + *self == Debdly::Debdly8 } - #[doc = "Checks if the value of the field is `DEBDLY10`"] + #[doc = "10ms Debounce Delay"] #[inline(always)] pub fn is_debdly10(&self) -> bool { - *self == DEBDLY_A::DEBDLY10 + *self == Debdly::Debdly10 } - #[doc = "Checks if the value of the field is `DEBDLY12`"] + #[doc = "12ms Debounce Delay"] #[inline(always)] pub fn is_debdly12(&self) -> bool { - *self == DEBDLY_A::DEBDLY12 + *self == Debdly::Debdly12 } - #[doc = "Checks if the value of the field is `DEBDLY14`"] + #[doc = "14ms Debounce Delay"] #[inline(always)] pub fn is_debdly14(&self) -> bool { - *self == DEBDLY_A::DEBDLY14 + *self == Debdly::Debdly14 } - #[doc = "Checks if the value of the field is `DEBDLY16`"] + #[doc = "16ms Debounce Delay"] #[inline(always)] pub fn is_debdly16(&self) -> bool { - *self == DEBDLY_A::DEBDLY16 + *self == Debdly::Debdly16 } - #[doc = "Checks if the value of the field is `DEBDLY18`"] + #[doc = "18ms Debounce Delay"] #[inline(always)] pub fn is_debdly18(&self) -> bool { - *self == DEBDLY_A::DEBDLY18 + *self == Debdly::Debdly18 } - #[doc = "Checks if the value of the field is `DEBDLY20`"] + #[doc = "20ms Debounce Delay"] #[inline(always)] pub fn is_debdly20(&self) -> bool { - *self == DEBDLY_A::DEBDLY20 + *self == Debdly::Debdly20 } - #[doc = "Checks if the value of the field is `DEBDLY22`"] + #[doc = "22ms Debounce Delay"] #[inline(always)] pub fn is_debdly22(&self) -> bool { - *self == DEBDLY_A::DEBDLY22 + *self == Debdly::Debdly22 } - #[doc = "Checks if the value of the field is `DEBDLY24`"] + #[doc = "24ms Debounce Delay"] #[inline(always)] pub fn is_debdly24(&self) -> bool { - *self == DEBDLY_A::DEBDLY24 + *self == Debdly::Debdly24 } - #[doc = "Checks if the value of the field is `DEBDLY26`"] + #[doc = "26ms Debounce Delay"] #[inline(always)] pub fn is_debdly26(&self) -> bool { - *self == DEBDLY_A::DEBDLY26 + *self == Debdly::Debdly26 } - #[doc = "Checks if the value of the field is `DEBDLY28`"] + #[doc = "28ms Debounce Delay"] #[inline(always)] pub fn is_debdly28(&self) -> bool { - *self == DEBDLY_A::DEBDLY28 + *self == Debdly::Debdly28 } - #[doc = "Checks if the value of the field is `DEBDLY30`"] + #[doc = "30ms Debounce Delay"] #[inline(always)] pub fn is_debdly30(&self) -> bool { - *self == DEBDLY_A::DEBDLY30 + *self == Debdly::Debdly30 } - #[doc = "Checks if the value of the field is `DEBDLY32`"] + #[doc = "32ms Debounce Delay"] #[inline(always)] pub fn is_debdly32(&self) -> bool { - *self == DEBDLY_A::DEBDLY32 + *self == Debdly::Debdly32 } } #[doc = "Field `DEBDLY` writer - Debounce Delay"] -pub type DEBDLY_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, DELAY_SPEC, u8, DEBDLY_A, 4, O>; -impl<'a, const O: u8> DEBDLY_W<'a, O> { +pub type DebdlyW<'a, REG> = crate::FieldWriter<'a, REG, 4, Debdly, crate::Safe>; +impl<'a, REG> DebdlyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "2ms Debounce Delay"] #[inline(always)] - pub fn debdly2(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY2) + pub fn debdly2(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly2) } #[doc = "4ms Debounce Delay"] #[inline(always)] - pub fn debdly4(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY4) + pub fn debdly4(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly4) } #[doc = "6ms Debounce Delay"] #[inline(always)] - pub fn debdly6(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY6) + pub fn debdly6(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly6) } #[doc = "8ms Debounce Delay"] #[inline(always)] - pub fn debdly8(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY8) + pub fn debdly8(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly8) } #[doc = "10ms Debounce Delay"] #[inline(always)] - pub fn debdly10(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY10) + pub fn debdly10(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly10) } #[doc = "12ms Debounce Delay"] #[inline(always)] - pub fn debdly12(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY12) + pub fn debdly12(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly12) } #[doc = "14ms Debounce Delay"] #[inline(always)] - pub fn debdly14(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY14) + pub fn debdly14(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly14) } #[doc = "16ms Debounce Delay"] #[inline(always)] - pub fn debdly16(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY16) + pub fn debdly16(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly16) } #[doc = "18ms Debounce Delay"] #[inline(always)] - pub fn debdly18(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY18) + pub fn debdly18(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly18) } #[doc = "20ms Debounce Delay"] #[inline(always)] - pub fn debdly20(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY20) + pub fn debdly20(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly20) } #[doc = "22ms Debounce Delay"] #[inline(always)] - pub fn debdly22(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY22) + pub fn debdly22(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly22) } #[doc = "24ms Debounce Delay"] #[inline(always)] - pub fn debdly24(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY24) + pub fn debdly24(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly24) } #[doc = "26ms Debounce Delay"] #[inline(always)] - pub fn debdly26(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY26) + pub fn debdly26(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly26) } #[doc = "28ms Debounce Delay"] #[inline(always)] - pub fn debdly28(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY28) + pub fn debdly28(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly28) } #[doc = "30ms Debounce Delay"] #[inline(always)] - pub fn debdly30(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY30) + pub fn debdly30(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly30) } #[doc = "32ms Debounce Delay"] #[inline(always)] - pub fn debdly32(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY32) + pub fn debdly32(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly32) } } -#[doc = "Field `STABDLY` reader - Row stable Delay"] -pub type STABDLY_R = crate::FieldReader; #[doc = "Row stable Delay\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STABDLY_A { +pub enum Stabdly { #[doc = "0: 2ms Row Stable Delay"] - STABDLY2 = 0, + Stabdly2 = 0, #[doc = "1: 4ms Row Stable Delay"] - STABDLY4 = 1, + Stabdly4 = 1, #[doc = "2: 6ms Row Stable Delay"] - STABDLY6 = 2, + Stabdly6 = 2, #[doc = "3: 8ms Row Stable Delay"] - STABDLY8 = 3, + Stabdly8 = 3, #[doc = "4: 10ms Row Stable Delay"] - STABDLY10 = 4, + Stabdly10 = 4, #[doc = "5: 12ms Row Stable Delay"] - STABDLY12 = 5, + Stabdly12 = 5, #[doc = "6: 14ms Row Stable Delay"] - STABDLY14 = 6, + Stabdly14 = 6, #[doc = "7: 16ms Row Stable Delay"] - STABDLY16 = 7, + Stabdly16 = 7, #[doc = "8: 18ms Row Stable Delay"] - STABDLY18 = 8, + Stabdly18 = 8, #[doc = "9: 20ms Row Stable Delay"] - STABDLY20 = 9, + Stabdly20 = 9, #[doc = "10: 22ms Row Stable Delay"] - STABDLY22 = 10, + Stabdly22 = 10, #[doc = "11: 24ms Row Stable Delay"] - STABDLY24 = 11, + Stabdly24 = 11, #[doc = "12: 26ms Row Stable Delay"] - STABDLY26 = 12, + Stabdly26 = 12, #[doc = "13: 28ms Row Stable Delay"] - STABDLY28 = 13, + Stabdly28 = 13, #[doc = "14: 30ms Row Stable Delay"] - STABDLY30 = 14, + Stabdly30 = 14, #[doc = "15: 32ms Row Stable Delay"] - STABDLY32 = 15, + Stabdly32 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STABDLY_A) -> Self { + fn from(variant: Stabdly) -> Self { variant as _ } } -impl STABDLY_R { +impl crate::FieldSpec for Stabdly { + type Ux = u8; +} +impl crate::IsEnum for Stabdly {} +#[doc = "Field `STABDLY` reader - Row stable Delay"] +pub type StabdlyR = crate::FieldReader; +impl StabdlyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> STABDLY_A { + pub const fn variant(&self) -> Stabdly { match self.bits { - 0 => STABDLY_A::STABDLY2, - 1 => STABDLY_A::STABDLY4, - 2 => STABDLY_A::STABDLY6, - 3 => STABDLY_A::STABDLY8, - 4 => STABDLY_A::STABDLY10, - 5 => STABDLY_A::STABDLY12, - 6 => STABDLY_A::STABDLY14, - 7 => STABDLY_A::STABDLY16, - 8 => STABDLY_A::STABDLY18, - 9 => STABDLY_A::STABDLY20, - 10 => STABDLY_A::STABDLY22, - 11 => STABDLY_A::STABDLY24, - 12 => STABDLY_A::STABDLY26, - 13 => STABDLY_A::STABDLY28, - 14 => STABDLY_A::STABDLY30, - 15 => STABDLY_A::STABDLY32, + 0 => Stabdly::Stabdly2, + 1 => Stabdly::Stabdly4, + 2 => Stabdly::Stabdly6, + 3 => Stabdly::Stabdly8, + 4 => Stabdly::Stabdly10, + 5 => Stabdly::Stabdly12, + 6 => Stabdly::Stabdly14, + 7 => Stabdly::Stabdly16, + 8 => Stabdly::Stabdly18, + 9 => Stabdly::Stabdly20, + 10 => Stabdly::Stabdly22, + 11 => Stabdly::Stabdly24, + 12 => Stabdly::Stabdly26, + 13 => Stabdly::Stabdly28, + 14 => Stabdly::Stabdly30, + 15 => Stabdly::Stabdly32, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `STABDLY2`"] + #[doc = "2ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly2(&self) -> bool { - *self == STABDLY_A::STABDLY2 + *self == Stabdly::Stabdly2 } - #[doc = "Checks if the value of the field is `STABDLY4`"] + #[doc = "4ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly4(&self) -> bool { - *self == STABDLY_A::STABDLY4 + *self == Stabdly::Stabdly4 } - #[doc = "Checks if the value of the field is `STABDLY6`"] + #[doc = "6ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly6(&self) -> bool { - *self == STABDLY_A::STABDLY6 + *self == Stabdly::Stabdly6 } - #[doc = "Checks if the value of the field is `STABDLY8`"] + #[doc = "8ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly8(&self) -> bool { - *self == STABDLY_A::STABDLY8 + *self == Stabdly::Stabdly8 } - #[doc = "Checks if the value of the field is `STABDLY10`"] + #[doc = "10ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly10(&self) -> bool { - *self == STABDLY_A::STABDLY10 + *self == Stabdly::Stabdly10 } - #[doc = "Checks if the value of the field is `STABDLY12`"] + #[doc = "12ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly12(&self) -> bool { - *self == STABDLY_A::STABDLY12 + *self == Stabdly::Stabdly12 } - #[doc = "Checks if the value of the field is `STABDLY14`"] + #[doc = "14ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly14(&self) -> bool { - *self == STABDLY_A::STABDLY14 + *self == Stabdly::Stabdly14 } - #[doc = "Checks if the value of the field is `STABDLY16`"] + #[doc = "16ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly16(&self) -> bool { - *self == STABDLY_A::STABDLY16 + *self == Stabdly::Stabdly16 } - #[doc = "Checks if the value of the field is `STABDLY18`"] + #[doc = "18ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly18(&self) -> bool { - *self == STABDLY_A::STABDLY18 + *self == Stabdly::Stabdly18 } - #[doc = "Checks if the value of the field is `STABDLY20`"] + #[doc = "20ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly20(&self) -> bool { - *self == STABDLY_A::STABDLY20 + *self == Stabdly::Stabdly20 } - #[doc = "Checks if the value of the field is `STABDLY22`"] + #[doc = "22ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly22(&self) -> bool { - *self == STABDLY_A::STABDLY22 + *self == Stabdly::Stabdly22 } - #[doc = "Checks if the value of the field is `STABDLY24`"] + #[doc = "24ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly24(&self) -> bool { - *self == STABDLY_A::STABDLY24 + *self == Stabdly::Stabdly24 } - #[doc = "Checks if the value of the field is `STABDLY26`"] + #[doc = "26ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly26(&self) -> bool { - *self == STABDLY_A::STABDLY26 + *self == Stabdly::Stabdly26 } - #[doc = "Checks if the value of the field is `STABDLY28`"] + #[doc = "28ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly28(&self) -> bool { - *self == STABDLY_A::STABDLY28 + *self == Stabdly::Stabdly28 } - #[doc = "Checks if the value of the field is `STABDLY30`"] + #[doc = "30ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly30(&self) -> bool { - *self == STABDLY_A::STABDLY30 + *self == Stabdly::Stabdly30 } - #[doc = "Checks if the value of the field is `STABDLY32`"] + #[doc = "32ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly32(&self) -> bool { - *self == STABDLY_A::STABDLY32 + *self == Stabdly::Stabdly32 } } #[doc = "Field `STABDLY` writer - Row stable Delay"] -pub type STABDLY_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, DELAY_SPEC, u8, STABDLY_A, 4, O>; -impl<'a, const O: u8> STABDLY_W<'a, O> { +pub type StabdlyW<'a, REG> = crate::FieldWriter<'a, REG, 4, Stabdly, crate::Safe>; +impl<'a, REG> StabdlyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "2ms Row Stable Delay"] #[inline(always)] - pub fn stabdly2(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY2) + pub fn stabdly2(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly2) } #[doc = "4ms Row Stable Delay"] #[inline(always)] - pub fn stabdly4(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY4) + pub fn stabdly4(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly4) } #[doc = "6ms Row Stable Delay"] #[inline(always)] - pub fn stabdly6(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY6) + pub fn stabdly6(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly6) } #[doc = "8ms Row Stable Delay"] #[inline(always)] - pub fn stabdly8(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY8) + pub fn stabdly8(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly8) } #[doc = "10ms Row Stable Delay"] #[inline(always)] - pub fn stabdly10(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY10) + pub fn stabdly10(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly10) } #[doc = "12ms Row Stable Delay"] #[inline(always)] - pub fn stabdly12(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY12) + pub fn stabdly12(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly12) } #[doc = "14ms Row Stable Delay"] #[inline(always)] - pub fn stabdly14(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY14) + pub fn stabdly14(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly14) } #[doc = "16ms Row Stable Delay"] #[inline(always)] - pub fn stabdly16(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY16) + pub fn stabdly16(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly16) } #[doc = "18ms Row Stable Delay"] #[inline(always)] - pub fn stabdly18(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY18) + pub fn stabdly18(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly18) } #[doc = "20ms Row Stable Delay"] #[inline(always)] - pub fn stabdly20(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY20) + pub fn stabdly20(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly20) } #[doc = "22ms Row Stable Delay"] #[inline(always)] - pub fn stabdly22(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY22) + pub fn stabdly22(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly22) } #[doc = "24ms Row Stable Delay"] #[inline(always)] - pub fn stabdly24(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY24) + pub fn stabdly24(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly24) } #[doc = "26ms Row Stable Delay"] #[inline(always)] - pub fn stabdly26(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY26) + pub fn stabdly26(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly26) } #[doc = "28ms Row Stable Delay"] #[inline(always)] - pub fn stabdly28(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY28) + pub fn stabdly28(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly28) } #[doc = "30ms Row Stable Delay"] #[inline(always)] - pub fn stabdly30(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY30) + pub fn stabdly30(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly30) } #[doc = "32ms Row Stable Delay"] #[inline(always)] - pub fn stabdly32(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY32) + pub fn stabdly32(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly32) } } impl R { #[doc = "Bits 8:11 - Scan Delay"] #[inline(always)] - pub fn scandly(&self) -> SCANDLY_R { - SCANDLY_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn scandly(&self) -> ScandlyR { + ScandlyR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 16:19 - Debounce Delay"] #[inline(always)] - pub fn debdly(&self) -> DEBDLY_R { - DEBDLY_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn debdly(&self) -> DebdlyR { + DebdlyR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - Row stable Delay"] #[inline(always)] - pub fn stabdly(&self) -> STABDLY_R { - STABDLY_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn stabdly(&self) -> StabdlyR { + StabdlyR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 8:11 - Scan Delay"] #[inline(always)] #[must_use] - pub fn scandly(&mut self) -> SCANDLY_W<8> { - SCANDLY_W::new(self) + pub fn scandly(&mut self) -> ScandlyW { + ScandlyW::new(self, 8) } #[doc = "Bits 16:19 - Debounce Delay"] #[inline(always)] #[must_use] - pub fn debdly(&mut self) -> DEBDLY_W<16> { - DEBDLY_W::new(self) + pub fn debdly(&mut self) -> DebdlyW { + DebdlyW::new(self, 16) } #[doc = "Bits 24:27 - Row stable Delay"] #[inline(always)] #[must_use] - pub fn stabdly(&mut self) -> STABDLY_W<24> { - STABDLY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stabdly(&mut self) -> StabdlyW { + StabdlyW::new(self, 24) } } -#[doc = "Delay\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [delay](index.html) module"] -pub struct DELAY_SPEC; -impl crate::RegisterSpec for DELAY_SPEC { +#[doc = "Delay\n\nYou can [`read`](crate::Reg::read) this register and get [`delay::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`delay::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DelaySpec; +impl crate::RegisterSpec for DelaySpec { type Ux = u32; } -#[doc = "`read()` method returns [delay::R](R) reader structure"] -impl crate::Readable for DELAY_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [delay::W](W) writer structure"] -impl crate::Writable for DELAY_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`delay::R`](R) reader structure"] +impl crate::Readable for DelaySpec {} +#[doc = "`write(|w| ..)` method takes [`delay::W`](W) writer structure"] +impl crate::Writable for DelaySpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DELAY to value 0"] -impl crate::Resettable for DELAY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DelaySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/en.rs index cb2b254..cf8e8fa 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/en.rs @@ -1,133 +1,96 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EN` reader - Enable"] -pub type EN_R = crate::BitReader; +pub type W = crate::W; #[doc = "Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EN_A { +pub enum En { #[doc = "0: Stops clocking and resets peripheral core logic."] - DISABLE = 0, + Disable = 0, #[doc = "1: Enables clocking, and begins scanning if CFG.AUTOSTART is 0x1."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EN_A) -> Self { + fn from(variant: En) -> Self { variant as u8 != 0 } } -impl EN_R { +#[doc = "Field `EN` reader - Enable"] +pub type EnR = crate::BitReader; +impl EnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EN_A { + pub const fn variant(&self) -> En { match self.bits { - false => EN_A::DISABLE, - true => EN_A::ENABLE, + false => En::Disable, + true => En::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Stops clocking and resets peripheral core logic."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EN_A::DISABLE + *self == En::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enables clocking, and begins scanning if CFG.AUTOSTART is 0x1."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EN_A::ENABLE + *self == En::Enable } } #[doc = "Field `EN` writer - Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, EN_A, O>; -impl<'a, const O: u8> EN_W<'a, O> { +pub type EnW<'a, REG> = crate::BitWriter<'a, REG, En>; +impl<'a, REG> EnW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Stops clocking and resets peripheral core logic."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(En::Disable) } #[doc = "Enables clocking, and begins scanning if CFG.AUTOSTART is 0x1."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(En::Enable) } } #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "Enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/ien.rs index 0a7e6cd..3468405 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/ien.rs @@ -1,125 +1,85 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `NOKEY` reader - No Key was pressed"] -pub type NOKEY_R = crate::BitReader; +pub type NokeyR = crate::BitReader; #[doc = "Field `NOKEY` writer - No Key was pressed"] -pub type NOKEY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type NokeyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `KEY` reader - A Key was pressed"] -pub type KEY_R = crate::BitReader; +pub type KeyR = crate::BitReader; #[doc = "Field `KEY` writer - A Key was pressed"] -pub type KEY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type KeyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANNED` reader - Completed Scanning"] -pub type SCANNED_R = crate::BitReader; +pub type ScannedR = crate::BitReader; #[doc = "Field `SCANNED` writer - Completed Scanning"] -pub type SCANNED_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ScannedW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WAKEUP` reader - Wake up"] -pub type WAKEUP_R = crate::BitReader; +pub type WakeupR = crate::BitReader; #[doc = "Field `WAKEUP` writer - Wake up"] -pub type WAKEUP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type WakeupW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - No Key was pressed"] #[inline(always)] - pub fn nokey(&self) -> NOKEY_R { - NOKEY_R::new((self.bits & 1) != 0) + pub fn nokey(&self) -> NokeyR { + NokeyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - A Key was pressed"] #[inline(always)] - pub fn key(&self) -> KEY_R { - KEY_R::new(((self.bits >> 1) & 1) != 0) + pub fn key(&self) -> KeyR { + KeyR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Completed Scanning"] #[inline(always)] - pub fn scanned(&self) -> SCANNED_R { - SCANNED_R::new(((self.bits >> 2) & 1) != 0) + pub fn scanned(&self) -> ScannedR { + ScannedR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Wake up"] #[inline(always)] - pub fn wakeup(&self) -> WAKEUP_R { - WAKEUP_R::new(((self.bits >> 3) & 1) != 0) + pub fn wakeup(&self) -> WakeupR { + WakeupR::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - No Key was pressed"] #[inline(always)] #[must_use] - pub fn nokey(&mut self) -> NOKEY_W<0> { - NOKEY_W::new(self) + pub fn nokey(&mut self) -> NokeyW { + NokeyW::new(self, 0) } #[doc = "Bit 1 - A Key was pressed"] #[inline(always)] #[must_use] - pub fn key(&mut self) -> KEY_W<1> { - KEY_W::new(self) + pub fn key(&mut self) -> KeyW { + KeyW::new(self, 1) } #[doc = "Bit 2 - Completed Scanning"] #[inline(always)] #[must_use] - pub fn scanned(&mut self) -> SCANNED_W<2> { - SCANNED_W::new(self) + pub fn scanned(&mut self) -> ScannedW { + ScannedW::new(self, 2) } #[doc = "Bit 3 - Wake up"] #[inline(always)] #[must_use] - pub fn wakeup(&mut self) -> WAKEUP_W<3> { - WAKEUP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn wakeup(&mut self) -> WakeupW { + WakeupW::new(self, 3) } } -#[doc = "Interrupt Enables\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "Interrupt Enables\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/if_.rs index 4119342..b3e9ec3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/if_.rs @@ -1,125 +1,85 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `NOKEY` reader - No key was pressed"] -pub type NOKEY_R = crate::BitReader; +pub type NokeyR = crate::BitReader; #[doc = "Field `NOKEY` writer - No key was pressed"] -pub type NOKEY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type NokeyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `KEY` reader - A key was pressed"] -pub type KEY_R = crate::BitReader; +pub type KeyR = crate::BitReader; #[doc = "Field `KEY` writer - A key was pressed"] -pub type KEY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type KeyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANNED` reader - Completed scan"] -pub type SCANNED_R = crate::BitReader; +pub type ScannedR = crate::BitReader; #[doc = "Field `SCANNED` writer - Completed scan"] -pub type SCANNED_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ScannedW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WAKEUP` reader - Wake up"] -pub type WAKEUP_R = crate::BitReader; +pub type WakeupR = crate::BitReader; #[doc = "Field `WAKEUP` writer - Wake up"] -pub type WAKEUP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type WakeupW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - No key was pressed"] #[inline(always)] - pub fn nokey(&self) -> NOKEY_R { - NOKEY_R::new((self.bits & 1) != 0) + pub fn nokey(&self) -> NokeyR { + NokeyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - A key was pressed"] #[inline(always)] - pub fn key(&self) -> KEY_R { - KEY_R::new(((self.bits >> 1) & 1) != 0) + pub fn key(&self) -> KeyR { + KeyR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Completed scan"] #[inline(always)] - pub fn scanned(&self) -> SCANNED_R { - SCANNED_R::new(((self.bits >> 2) & 1) != 0) + pub fn scanned(&self) -> ScannedR { + ScannedR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Wake up"] #[inline(always)] - pub fn wakeup(&self) -> WAKEUP_R { - WAKEUP_R::new(((self.bits >> 3) & 1) != 0) + pub fn wakeup(&self) -> WakeupR { + WakeupR::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - No key was pressed"] #[inline(always)] #[must_use] - pub fn nokey(&mut self) -> NOKEY_W<0> { - NOKEY_W::new(self) + pub fn nokey(&mut self) -> NokeyW { + NokeyW::new(self, 0) } #[doc = "Bit 1 - A key was pressed"] #[inline(always)] #[must_use] - pub fn key(&mut self) -> KEY_W<1> { - KEY_W::new(self) + pub fn key(&mut self) -> KeyW { + KeyW::new(self, 1) } #[doc = "Bit 2 - Completed scan"] #[inline(always)] #[must_use] - pub fn scanned(&mut self) -> SCANNED_W<2> { - SCANNED_W::new(self) + pub fn scanned(&mut self) -> ScannedW { + ScannedW::new(self, 2) } #[doc = "Bit 3 - Wake up"] #[inline(always)] #[must_use] - pub fn wakeup(&mut self) -> WAKEUP_W<3> { - WAKEUP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn wakeup(&mut self) -> WakeupW { + WakeupW::new(self, 3) } } -#[doc = "Interrupt Flags\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "Interrupt Flags\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/ipversion.rs index 44b0ae3..09a3978 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IPVERSION"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IPVERSION"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "IPVERSION\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "IPVERSION\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/status.rs index fe92fc3..b395671 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/status.rs @@ -1,65 +1,50 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ROW` reader - Row detection"] -pub type ROW_R = crate::FieldReader; +pub type RowR = crate::FieldReader; #[doc = "Field `RUNNING` reader - Running"] -pub type RUNNING_R = crate::BitReader; +pub type RunningR = crate::BitReader; #[doc = "Field `COL` reader - Column Latched"] -pub type COL_R = crate::FieldReader; +pub type ColR = crate::FieldReader; #[doc = "Field `NOKEY` reader - No Key pressed status"] -pub type NOKEY_R = crate::BitReader; +pub type NokeyR = crate::BitReader; #[doc = "Field `SYNCBUSY` reader - Sync Busy"] -pub type SYNCBUSY_R = crate::BitReader; +pub type SyncbusyR = crate::BitReader; impl R { #[doc = "Bits 0:5 - Row detection"] #[inline(always)] - pub fn row(&self) -> ROW_R { - ROW_R::new((self.bits & 0x3f) as u8) + pub fn row(&self) -> RowR { + RowR::new((self.bits & 0x3f) as u8) } #[doc = "Bit 16 - Running"] #[inline(always)] - pub fn running(&self) -> RUNNING_R { - RUNNING_R::new(((self.bits >> 16) & 1) != 0) + pub fn running(&self) -> RunningR { + RunningR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bits 24:26 - Column Latched"] #[inline(always)] - pub fn col(&self) -> COL_R { - COL_R::new(((self.bits >> 24) & 7) as u8) + pub fn col(&self) -> ColR { + ColR::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bit 30 - No Key pressed status"] #[inline(always)] - pub fn nokey(&self) -> NOKEY_R { - NOKEY_R::new(((self.bits >> 30) & 1) != 0) + pub fn nokey(&self) -> NokeyR { + NokeyR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Sync Busy"] #[inline(always)] - pub fn syncbusy(&self) -> SYNCBUSY_R { - SYNCBUSY_R::new(((self.bits >> 31) & 1) != 0) + pub fn syncbusy(&self) -> SyncbusyR { + SyncbusyR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "Status\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0x4000_0000"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0x4000_0000; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0x4000_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/swrst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/swrst.rs index cf614fe..6a1f8f9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/swrst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_ns/swrst.rs @@ -1,80 +1,40 @@ #[doc = "Register `SWRST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SWRST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SWRST` writer - Software reset command"] -pub type SWRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, SWRST_SPEC, bool, O>; +pub type SwrstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESETTING` reader - Software reset busy status"] -pub type RESETTING_R = crate::BitReader; +pub type ResettingR = crate::BitReader; impl R { #[doc = "Bit 1 - Software reset busy status"] #[inline(always)] - pub fn resetting(&self) -> RESETTING_R { - RESETTING_R::new(((self.bits >> 1) & 1) != 0) + pub fn resetting(&self) -> ResettingR { + ResettingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Software reset command"] #[inline(always)] #[must_use] - pub fn swrst(&mut self) -> SWRST_W<0> { - SWRST_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn swrst(&mut self) -> SwrstW { + SwrstW::new(self, 0) } } -#[doc = "Software Reset\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swrst](index.html) module"] -pub struct SWRST_SPEC; -impl crate::RegisterSpec for SWRST_SPEC { +#[doc = "Software Reset\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SwrstSpec; +impl crate::RegisterSpec for SwrstSpec { type Ux = u32; } -#[doc = "`read()` method returns [swrst::R](R) reader structure"] -impl crate::Readable for SWRST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [swrst::W](W) writer structure"] -impl crate::Writable for SWRST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`swrst::R`](R) reader structure"] +impl crate::Readable for SwrstSpec {} +#[doc = "`write(|w| ..)` method takes [`swrst::W`](W) writer structure"] +impl crate::Writable for SwrstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWRST to value 0"] -impl crate::Resettable for SWRST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SwrstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s.rs index 68a556f..2f5159a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s.rs @@ -1,58 +1,114 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + swrst: Swrst, + cfg: Cfg, + cmd: Cmd, + delay: Delay, + status: Status, + if_: If, + ien: Ien, +} +impl RegisterBlock { #[doc = "0x00 - IPVERSION"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - Enable"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - Software Reset"] - pub swrst: SWRST, + #[inline(always)] + pub const fn swrst(&self) -> &Swrst { + &self.swrst + } #[doc = "0x0c - Config"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x10 - Command"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x14 - Delay"] - pub delay: DELAY, + #[inline(always)] + pub const fn delay(&self) -> &Delay { + &self.delay + } #[doc = "0x18 - Status"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x1c - Interrupt Flags"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x20 - Interrupt Enables"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: IPVERSION\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "IPVERSION"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "Enable"] pub mod en; -#[doc = "SWRST (rw) register accessor: an alias for `Reg`"] -pub type SWRST = crate::Reg; +#[doc = "SWRST (rw) register accessor: Software Reset\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swrst`] +module"] +#[doc(alias = "SWRST")] +pub type Swrst = crate::Reg; #[doc = "Software Reset"] pub mod swrst; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: Config\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "Config"] pub mod cfg; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: Command\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "Command"] pub mod cmd; -#[doc = "DELAY (rw) register accessor: an alias for `Reg`"] -pub type DELAY = crate::Reg; +#[doc = "DELAY (rw) register accessor: Delay\n\nYou can [`read`](crate::Reg::read) this register and get [`delay::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`delay::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@delay`] +module"] +#[doc(alias = "DELAY")] +pub type Delay = crate::Reg; #[doc = "Delay"] pub mod delay; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: Status\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "Status"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: Interrupt Flags\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "Interrupt Flags"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: Interrupt Enables\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "Interrupt Enables"] pub mod ien; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/cfg.rs index d992c75..9f7078b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/cfg.rs @@ -1,332 +1,306 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CLKDIV` reader - Clock Divider"] -pub type CLKDIV_R = crate::FieldReader; +pub type ClkdivR = crate::FieldReader; #[doc = "Field `CLKDIV` writer - Clock Divider"] -pub type CLKDIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u32, u32, 18, O>; -#[doc = "Field `SINGLEPRESS` reader - Single Press"] -pub type SINGLEPRESS_R = crate::BitReader; +pub type ClkdivW<'a, REG> = crate::FieldWriter<'a, REG, 18, u32>; #[doc = "Single Press\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SINGLEPRESS_A { +pub enum Singlepress { #[doc = "0: After KEYIF is set and then cleared, scanning will continue. This can give multiple interrupts for the same key press, but allow multiple key presses to be detected. To use this mode for multi-key detection, the ISR should update a section of memory of COLNUM bytes on each interrupt, until key release is detected. After key release, the section of memory where key presses are recorded can be processed."] - MULTIPRESS = 0, + Multipress = 0, #[doc = "1: After KEYIF has been set and cleared, it will not set again until no key press is detected. This allows faster response since the ISR can start processing data as soon as the KEYIF is set."] - SINGLEPRESS = 1, + Singlepress = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SINGLEPRESS_A) -> Self { + fn from(variant: Singlepress) -> Self { variant as u8 != 0 } } -impl SINGLEPRESS_R { +#[doc = "Field `SINGLEPRESS` reader - Single Press"] +pub type SinglepressR = crate::BitReader; +impl SinglepressR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SINGLEPRESS_A { + pub const fn variant(&self) -> Singlepress { match self.bits { - false => SINGLEPRESS_A::MULTIPRESS, - true => SINGLEPRESS_A::SINGLEPRESS, + false => Singlepress::Multipress, + true => Singlepress::Singlepress, } } - #[doc = "Checks if the value of the field is `MULTIPRESS`"] + #[doc = "After KEYIF is set and then cleared, scanning will continue. This can give multiple interrupts for the same key press, but allow multiple key presses to be detected. To use this mode for multi-key detection, the ISR should update a section of memory of COLNUM bytes on each interrupt, until key release is detected. After key release, the section of memory where key presses are recorded can be processed."] #[inline(always)] pub fn is_multipress(&self) -> bool { - *self == SINGLEPRESS_A::MULTIPRESS + *self == Singlepress::Multipress } - #[doc = "Checks if the value of the field is `SINGLEPRESS`"] + #[doc = "After KEYIF has been set and cleared, it will not set again until no key press is detected. This allows faster response since the ISR can start processing data as soon as the KEYIF is set."] #[inline(always)] pub fn is_singlepress(&self) -> bool { - *self == SINGLEPRESS_A::SINGLEPRESS + *self == Singlepress::Singlepress } } #[doc = "Field `SINGLEPRESS` writer - Single Press"] -pub type SINGLEPRESS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, SINGLEPRESS_A, O>; -impl<'a, const O: u8> SINGLEPRESS_W<'a, O> { +pub type SinglepressW<'a, REG> = crate::BitWriter<'a, REG, Singlepress>; +impl<'a, REG> SinglepressW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "After KEYIF is set and then cleared, scanning will continue. This can give multiple interrupts for the same key press, but allow multiple key presses to be detected. To use this mode for multi-key detection, the ISR should update a section of memory of COLNUM bytes on each interrupt, until key release is detected. After key release, the section of memory where key presses are recorded can be processed."] #[inline(always)] - pub fn multipress(self) -> &'a mut W { - self.variant(SINGLEPRESS_A::MULTIPRESS) + pub fn multipress(self) -> &'a mut crate::W { + self.variant(Singlepress::Multipress) } #[doc = "After KEYIF has been set and cleared, it will not set again until no key press is detected. This allows faster response since the ISR can start processing data as soon as the KEYIF is set."] #[inline(always)] - pub fn singlepress(self) -> &'a mut W { - self.variant(SINGLEPRESS_A::SINGLEPRESS) + pub fn singlepress(self) -> &'a mut crate::W { + self.variant(Singlepress::Singlepress) } } -#[doc = "Field `AUTOSTART` reader - Automatically Start"] -pub type AUTOSTART_R = crate::BitReader; #[doc = "Automatically Start\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AUTOSTART_A { +pub enum Autostart { #[doc = "0: Auto start is disabled"] - AUTOSTARTDIS = 0, + Autostartdis = 0, #[doc = "1: Auto start is enabled"] - AUTOSTARTEN = 1, + Autostarten = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AUTOSTART_A) -> Self { + fn from(variant: Autostart) -> Self { variant as u8 != 0 } } -impl AUTOSTART_R { +#[doc = "Field `AUTOSTART` reader - Automatically Start"] +pub type AutostartR = crate::BitReader; +impl AutostartR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> AUTOSTART_A { + pub const fn variant(&self) -> Autostart { match self.bits { - false => AUTOSTART_A::AUTOSTARTDIS, - true => AUTOSTART_A::AUTOSTARTEN, + false => Autostart::Autostartdis, + true => Autostart::Autostarten, } } - #[doc = "Checks if the value of the field is `AUTOSTARTDIS`"] + #[doc = "Auto start is disabled"] #[inline(always)] pub fn is_autostartdis(&self) -> bool { - *self == AUTOSTART_A::AUTOSTARTDIS + *self == Autostart::Autostartdis } - #[doc = "Checks if the value of the field is `AUTOSTARTEN`"] + #[doc = "Auto start is enabled"] #[inline(always)] pub fn is_autostarten(&self) -> bool { - *self == AUTOSTART_A::AUTOSTARTEN + *self == Autostart::Autostarten } } #[doc = "Field `AUTOSTART` writer - Automatically Start"] -pub type AUTOSTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, AUTOSTART_A, O>; -impl<'a, const O: u8> AUTOSTART_W<'a, O> { +pub type AutostartW<'a, REG> = crate::BitWriter<'a, REG, Autostart>; +impl<'a, REG> AutostartW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Auto start is disabled"] #[inline(always)] - pub fn autostartdis(self) -> &'a mut W { - self.variant(AUTOSTART_A::AUTOSTARTDIS) + pub fn autostartdis(self) -> &'a mut crate::W { + self.variant(Autostart::Autostartdis) } #[doc = "Auto start is enabled"] #[inline(always)] - pub fn autostarten(self) -> &'a mut W { - self.variant(AUTOSTART_A::AUTOSTARTEN) + pub fn autostarten(self) -> &'a mut crate::W { + self.variant(Autostart::Autostarten) } } -#[doc = "Field `NUMROWS` reader - Number of Rows"] -pub type NUMROWS_R = crate::FieldReader; #[doc = "Number of Rows\n\nValue on reset: 5"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum NUMROWS_A { +pub enum Numrows { #[doc = "0: 1 Row is not supported; defaults to 3 instead"] - RSV1 = 0, + Rsv1 = 0, #[doc = "1: 2 Rows are not supported; defaults to 3 instead"] - RSV2 = 1, + Rsv2 = 1, #[doc = "2: 3 Rows"] - ROW3 = 2, + Row3 = 2, #[doc = "3: 4 Rows"] - ROW4 = 3, + Row4 = 3, #[doc = "4: 5 Rows"] - ROW5 = 4, + Row5 = 4, #[doc = "5: 6 Rows"] - ROW6 = 5, + Row6 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: NUMROWS_A) -> Self { + fn from(variant: Numrows) -> Self { variant as _ } } -impl NUMROWS_R { +impl crate::FieldSpec for Numrows { + type Ux = u8; +} +impl crate::IsEnum for Numrows {} +#[doc = "Field `NUMROWS` reader - Number of Rows"] +pub type NumrowsR = crate::FieldReader; +impl NumrowsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(NUMROWS_A::RSV1), - 1 => Some(NUMROWS_A::RSV2), - 2 => Some(NUMROWS_A::ROW3), - 3 => Some(NUMROWS_A::ROW4), - 4 => Some(NUMROWS_A::ROW5), - 5 => Some(NUMROWS_A::ROW6), + 0 => Some(Numrows::Rsv1), + 1 => Some(Numrows::Rsv2), + 2 => Some(Numrows::Row3), + 3 => Some(Numrows::Row4), + 4 => Some(Numrows::Row5), + 5 => Some(Numrows::Row6), _ => None, } } - #[doc = "Checks if the value of the field is `RSV1`"] + #[doc = "1 Row is not supported; defaults to 3 instead"] #[inline(always)] pub fn is_rsv1(&self) -> bool { - *self == NUMROWS_A::RSV1 + *self == Numrows::Rsv1 } - #[doc = "Checks if the value of the field is `RSV2`"] + #[doc = "2 Rows are not supported; defaults to 3 instead"] #[inline(always)] pub fn is_rsv2(&self) -> bool { - *self == NUMROWS_A::RSV2 + *self == Numrows::Rsv2 } - #[doc = "Checks if the value of the field is `ROW3`"] + #[doc = "3 Rows"] #[inline(always)] pub fn is_row3(&self) -> bool { - *self == NUMROWS_A::ROW3 + *self == Numrows::Row3 } - #[doc = "Checks if the value of the field is `ROW4`"] + #[doc = "4 Rows"] #[inline(always)] pub fn is_row4(&self) -> bool { - *self == NUMROWS_A::ROW4 + *self == Numrows::Row4 } - #[doc = "Checks if the value of the field is `ROW5`"] + #[doc = "5 Rows"] #[inline(always)] pub fn is_row5(&self) -> bool { - *self == NUMROWS_A::ROW5 + *self == Numrows::Row5 } - #[doc = "Checks if the value of the field is `ROW6`"] + #[doc = "6 Rows"] #[inline(always)] pub fn is_row6(&self) -> bool { - *self == NUMROWS_A::ROW6 + *self == Numrows::Row6 } } #[doc = "Field `NUMROWS` writer - Number of Rows"] -pub type NUMROWS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, NUMROWS_A, 3, O>; -impl<'a, const O: u8> NUMROWS_W<'a, O> { +pub type NumrowsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Numrows>; +impl<'a, REG> NumrowsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "1 Row is not supported; defaults to 3 instead"] #[inline(always)] - pub fn rsv1(self) -> &'a mut W { - self.variant(NUMROWS_A::RSV1) + pub fn rsv1(self) -> &'a mut crate::W { + self.variant(Numrows::Rsv1) } #[doc = "2 Rows are not supported; defaults to 3 instead"] #[inline(always)] - pub fn rsv2(self) -> &'a mut W { - self.variant(NUMROWS_A::RSV2) + pub fn rsv2(self) -> &'a mut crate::W { + self.variant(Numrows::Rsv2) } #[doc = "3 Rows"] #[inline(always)] - pub fn row3(self) -> &'a mut W { - self.variant(NUMROWS_A::ROW3) + pub fn row3(self) -> &'a mut crate::W { + self.variant(Numrows::Row3) } #[doc = "4 Rows"] #[inline(always)] - pub fn row4(self) -> &'a mut W { - self.variant(NUMROWS_A::ROW4) + pub fn row4(self) -> &'a mut crate::W { + self.variant(Numrows::Row4) } #[doc = "5 Rows"] #[inline(always)] - pub fn row5(self) -> &'a mut W { - self.variant(NUMROWS_A::ROW5) + pub fn row5(self) -> &'a mut crate::W { + self.variant(Numrows::Row5) } #[doc = "6 Rows"] #[inline(always)] - pub fn row6(self) -> &'a mut W { - self.variant(NUMROWS_A::ROW6) + pub fn row6(self) -> &'a mut crate::W { + self.variant(Numrows::Row6) } } #[doc = "Field `NUMCOLS` reader - Number of Columns"] -pub type NUMCOLS_R = crate::FieldReader; +pub type NumcolsR = crate::FieldReader; #[doc = "Field `NUMCOLS` writer - Number of Columns"] -pub type NUMCOLS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, u8, 3, O>; +pub type NumcolsW<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:17 - Clock Divider"] #[inline(always)] - pub fn clkdiv(&self) -> CLKDIV_R { - CLKDIV_R::new(self.bits & 0x0003_ffff) + pub fn clkdiv(&self) -> ClkdivR { + ClkdivR::new(self.bits & 0x0003_ffff) } #[doc = "Bit 20 - Single Press"] #[inline(always)] - pub fn singlepress(&self) -> SINGLEPRESS_R { - SINGLEPRESS_R::new(((self.bits >> 20) & 1) != 0) + pub fn singlepress(&self) -> SinglepressR { + SinglepressR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 22 - Automatically Start"] #[inline(always)] - pub fn autostart(&self) -> AUTOSTART_R { - AUTOSTART_R::new(((self.bits >> 22) & 1) != 0) + pub fn autostart(&self) -> AutostartR { + AutostartR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bits 24:26 - Number of Rows"] #[inline(always)] - pub fn numrows(&self) -> NUMROWS_R { - NUMROWS_R::new(((self.bits >> 24) & 7) as u8) + pub fn numrows(&self) -> NumrowsR { + NumrowsR::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Number of Columns"] #[inline(always)] - pub fn numcols(&self) -> NUMCOLS_R { - NUMCOLS_R::new(((self.bits >> 28) & 7) as u8) + pub fn numcols(&self) -> NumcolsR { + NumcolsR::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:17 - Clock Divider"] #[inline(always)] #[must_use] - pub fn clkdiv(&mut self) -> CLKDIV_W<0> { - CLKDIV_W::new(self) + pub fn clkdiv(&mut self) -> ClkdivW { + ClkdivW::new(self, 0) } #[doc = "Bit 20 - Single Press"] #[inline(always)] #[must_use] - pub fn singlepress(&mut self) -> SINGLEPRESS_W<20> { - SINGLEPRESS_W::new(self) + pub fn singlepress(&mut self) -> SinglepressW { + SinglepressW::new(self, 20) } #[doc = "Bit 22 - Automatically Start"] #[inline(always)] #[must_use] - pub fn autostart(&mut self) -> AUTOSTART_W<22> { - AUTOSTART_W::new(self) + pub fn autostart(&mut self) -> AutostartW { + AutostartW::new(self, 22) } #[doc = "Bits 24:26 - Number of Rows"] #[inline(always)] #[must_use] - pub fn numrows(&mut self) -> NUMROWS_W<24> { - NUMROWS_W::new(self) + pub fn numrows(&mut self) -> NumrowsW { + NumrowsW::new(self, 24) } #[doc = "Bits 28:30 - Number of Columns"] #[inline(always)] #[must_use] - pub fn numcols(&mut self) -> NUMCOLS_W<28> { - NUMCOLS_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn numcols(&mut self) -> NumcolsW { + NumcolsW::new(self, 28) } } -#[doc = "Config\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "Config\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0x2501_387f"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x2501_387f; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0x2501_387f; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/cmd.rs index 012531e..987c881 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/cmd.rs @@ -1,60 +1,35 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `KEYSCANSTART` writer - Keyscan Start"] -pub type KEYSCANSTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type KeyscanstartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `KEYSCANSTOP` writer - Keyscan Stop"] -pub type KEYSCANSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type KeyscanstopW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Keyscan Start"] #[inline(always)] #[must_use] - pub fn keyscanstart(&mut self) -> KEYSCANSTART_W<0> { - KEYSCANSTART_W::new(self) + pub fn keyscanstart(&mut self) -> KeyscanstartW { + KeyscanstartW::new(self, 0) } #[doc = "Bit 1 - Keyscan Stop"] #[inline(always)] #[must_use] - pub fn keyscanstop(&mut self) -> KEYSCANSTOP_W<1> { - KEYSCANSTOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn keyscanstop(&mut self) -> KeyscanstopW { + KeyscanstopW::new(self, 1) } } -#[doc = "Command\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "Command\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/delay.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/delay.rs index 4d4b012..f0d7813 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/delay.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/delay.rs @@ -1,803 +1,784 @@ #[doc = "Register `DELAY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DELAY` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SCANDLY` reader - Scan Delay"] -pub type SCANDLY_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Scan Delay\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SCANDLY_A { +pub enum Scandly { #[doc = "0: 2ms Scan Delay"] - SCANDLY2 = 0, + Scandly2 = 0, #[doc = "1: 4ms Scan Delay"] - SCANDLY4 = 1, + Scandly4 = 1, #[doc = "2: 6ms Scan Delay"] - SCANDLY6 = 2, + Scandly6 = 2, #[doc = "3: 8ms Scan Delay"] - SCANDLY8 = 3, + Scandly8 = 3, #[doc = "4: 10ms Scan Delay"] - SCANDLY10 = 4, + Scandly10 = 4, #[doc = "5: 12ms Scan Delay"] - SCANDLY12 = 5, + Scandly12 = 5, #[doc = "6: 14ms Scan Delay"] - SCANDLY14 = 6, + Scandly14 = 6, #[doc = "7: 16ms Scan Delay"] - SCANDLY16 = 7, + Scandly16 = 7, #[doc = "8: 18ms Scan Delay"] - SCANDLY18 = 8, + Scandly18 = 8, #[doc = "9: 20ms Scan Delay"] - SCANDLY20 = 9, + Scandly20 = 9, #[doc = "10: 22ms Scan Delay"] - SCANDLY22 = 10, + Scandly22 = 10, #[doc = "11: 24ms Scan Delay"] - SCANDLY24 = 11, + Scandly24 = 11, #[doc = "12: 26ms Scan Delay"] - SCANDLY26 = 12, + Scandly26 = 12, #[doc = "13: 28ms Scan Delay"] - SCANDLY28 = 13, + Scandly28 = 13, #[doc = "14: 30ms Scan Delay"] - SCANDLY30 = 14, + Scandly30 = 14, #[doc = "15: 32ms Scan Delay"] - SCANDLY32 = 15, + Scandly32 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SCANDLY_A) -> Self { + fn from(variant: Scandly) -> Self { variant as _ } } -impl SCANDLY_R { +impl crate::FieldSpec for Scandly { + type Ux = u8; +} +impl crate::IsEnum for Scandly {} +#[doc = "Field `SCANDLY` reader - Scan Delay"] +pub type ScandlyR = crate::FieldReader; +impl ScandlyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SCANDLY_A { + pub const fn variant(&self) -> Scandly { match self.bits { - 0 => SCANDLY_A::SCANDLY2, - 1 => SCANDLY_A::SCANDLY4, - 2 => SCANDLY_A::SCANDLY6, - 3 => SCANDLY_A::SCANDLY8, - 4 => SCANDLY_A::SCANDLY10, - 5 => SCANDLY_A::SCANDLY12, - 6 => SCANDLY_A::SCANDLY14, - 7 => SCANDLY_A::SCANDLY16, - 8 => SCANDLY_A::SCANDLY18, - 9 => SCANDLY_A::SCANDLY20, - 10 => SCANDLY_A::SCANDLY22, - 11 => SCANDLY_A::SCANDLY24, - 12 => SCANDLY_A::SCANDLY26, - 13 => SCANDLY_A::SCANDLY28, - 14 => SCANDLY_A::SCANDLY30, - 15 => SCANDLY_A::SCANDLY32, + 0 => Scandly::Scandly2, + 1 => Scandly::Scandly4, + 2 => Scandly::Scandly6, + 3 => Scandly::Scandly8, + 4 => Scandly::Scandly10, + 5 => Scandly::Scandly12, + 6 => Scandly::Scandly14, + 7 => Scandly::Scandly16, + 8 => Scandly::Scandly18, + 9 => Scandly::Scandly20, + 10 => Scandly::Scandly22, + 11 => Scandly::Scandly24, + 12 => Scandly::Scandly26, + 13 => Scandly::Scandly28, + 14 => Scandly::Scandly30, + 15 => Scandly::Scandly32, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `SCANDLY2`"] + #[doc = "2ms Scan Delay"] #[inline(always)] pub fn is_scandly2(&self) -> bool { - *self == SCANDLY_A::SCANDLY2 + *self == Scandly::Scandly2 } - #[doc = "Checks if the value of the field is `SCANDLY4`"] + #[doc = "4ms Scan Delay"] #[inline(always)] pub fn is_scandly4(&self) -> bool { - *self == SCANDLY_A::SCANDLY4 + *self == Scandly::Scandly4 } - #[doc = "Checks if the value of the field is `SCANDLY6`"] + #[doc = "6ms Scan Delay"] #[inline(always)] pub fn is_scandly6(&self) -> bool { - *self == SCANDLY_A::SCANDLY6 + *self == Scandly::Scandly6 } - #[doc = "Checks if the value of the field is `SCANDLY8`"] + #[doc = "8ms Scan Delay"] #[inline(always)] pub fn is_scandly8(&self) -> bool { - *self == SCANDLY_A::SCANDLY8 + *self == Scandly::Scandly8 } - #[doc = "Checks if the value of the field is `SCANDLY10`"] + #[doc = "10ms Scan Delay"] #[inline(always)] pub fn is_scandly10(&self) -> bool { - *self == SCANDLY_A::SCANDLY10 + *self == Scandly::Scandly10 } - #[doc = "Checks if the value of the field is `SCANDLY12`"] + #[doc = "12ms Scan Delay"] #[inline(always)] pub fn is_scandly12(&self) -> bool { - *self == SCANDLY_A::SCANDLY12 + *self == Scandly::Scandly12 } - #[doc = "Checks if the value of the field is `SCANDLY14`"] + #[doc = "14ms Scan Delay"] #[inline(always)] pub fn is_scandly14(&self) -> bool { - *self == SCANDLY_A::SCANDLY14 + *self == Scandly::Scandly14 } - #[doc = "Checks if the value of the field is `SCANDLY16`"] + #[doc = "16ms Scan Delay"] #[inline(always)] pub fn is_scandly16(&self) -> bool { - *self == SCANDLY_A::SCANDLY16 + *self == Scandly::Scandly16 } - #[doc = "Checks if the value of the field is `SCANDLY18`"] + #[doc = "18ms Scan Delay"] #[inline(always)] pub fn is_scandly18(&self) -> bool { - *self == SCANDLY_A::SCANDLY18 + *self == Scandly::Scandly18 } - #[doc = "Checks if the value of the field is `SCANDLY20`"] + #[doc = "20ms Scan Delay"] #[inline(always)] pub fn is_scandly20(&self) -> bool { - *self == SCANDLY_A::SCANDLY20 + *self == Scandly::Scandly20 } - #[doc = "Checks if the value of the field is `SCANDLY22`"] + #[doc = "22ms Scan Delay"] #[inline(always)] pub fn is_scandly22(&self) -> bool { - *self == SCANDLY_A::SCANDLY22 + *self == Scandly::Scandly22 } - #[doc = "Checks if the value of the field is `SCANDLY24`"] + #[doc = "24ms Scan Delay"] #[inline(always)] pub fn is_scandly24(&self) -> bool { - *self == SCANDLY_A::SCANDLY24 + *self == Scandly::Scandly24 } - #[doc = "Checks if the value of the field is `SCANDLY26`"] + #[doc = "26ms Scan Delay"] #[inline(always)] pub fn is_scandly26(&self) -> bool { - *self == SCANDLY_A::SCANDLY26 + *self == Scandly::Scandly26 } - #[doc = "Checks if the value of the field is `SCANDLY28`"] + #[doc = "28ms Scan Delay"] #[inline(always)] pub fn is_scandly28(&self) -> bool { - *self == SCANDLY_A::SCANDLY28 + *self == Scandly::Scandly28 } - #[doc = "Checks if the value of the field is `SCANDLY30`"] + #[doc = "30ms Scan Delay"] #[inline(always)] pub fn is_scandly30(&self) -> bool { - *self == SCANDLY_A::SCANDLY30 + *self == Scandly::Scandly30 } - #[doc = "Checks if the value of the field is `SCANDLY32`"] + #[doc = "32ms Scan Delay"] #[inline(always)] pub fn is_scandly32(&self) -> bool { - *self == SCANDLY_A::SCANDLY32 + *self == Scandly::Scandly32 } } #[doc = "Field `SCANDLY` writer - Scan Delay"] -pub type SCANDLY_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, DELAY_SPEC, u8, SCANDLY_A, 4, O>; -impl<'a, const O: u8> SCANDLY_W<'a, O> { +pub type ScandlyW<'a, REG> = crate::FieldWriter<'a, REG, 4, Scandly, crate::Safe>; +impl<'a, REG> ScandlyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "2ms Scan Delay"] #[inline(always)] - pub fn scandly2(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY2) + pub fn scandly2(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly2) } #[doc = "4ms Scan Delay"] #[inline(always)] - pub fn scandly4(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY4) + pub fn scandly4(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly4) } #[doc = "6ms Scan Delay"] #[inline(always)] - pub fn scandly6(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY6) + pub fn scandly6(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly6) } #[doc = "8ms Scan Delay"] #[inline(always)] - pub fn scandly8(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY8) + pub fn scandly8(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly8) } #[doc = "10ms Scan Delay"] #[inline(always)] - pub fn scandly10(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY10) + pub fn scandly10(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly10) } #[doc = "12ms Scan Delay"] #[inline(always)] - pub fn scandly12(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY12) + pub fn scandly12(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly12) } #[doc = "14ms Scan Delay"] #[inline(always)] - pub fn scandly14(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY14) + pub fn scandly14(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly14) } #[doc = "16ms Scan Delay"] #[inline(always)] - pub fn scandly16(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY16) + pub fn scandly16(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly16) } #[doc = "18ms Scan Delay"] #[inline(always)] - pub fn scandly18(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY18) + pub fn scandly18(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly18) } #[doc = "20ms Scan Delay"] #[inline(always)] - pub fn scandly20(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY20) + pub fn scandly20(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly20) } #[doc = "22ms Scan Delay"] #[inline(always)] - pub fn scandly22(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY22) + pub fn scandly22(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly22) } #[doc = "24ms Scan Delay"] #[inline(always)] - pub fn scandly24(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY24) + pub fn scandly24(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly24) } #[doc = "26ms Scan Delay"] #[inline(always)] - pub fn scandly26(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY26) + pub fn scandly26(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly26) } #[doc = "28ms Scan Delay"] #[inline(always)] - pub fn scandly28(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY28) + pub fn scandly28(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly28) } #[doc = "30ms Scan Delay"] #[inline(always)] - pub fn scandly30(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY30) + pub fn scandly30(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly30) } #[doc = "32ms Scan Delay"] #[inline(always)] - pub fn scandly32(self) -> &'a mut W { - self.variant(SCANDLY_A::SCANDLY32) + pub fn scandly32(self) -> &'a mut crate::W { + self.variant(Scandly::Scandly32) } } -#[doc = "Field `DEBDLY` reader - Debounce Delay"] -pub type DEBDLY_R = crate::FieldReader; #[doc = "Debounce Delay\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DEBDLY_A { +pub enum Debdly { #[doc = "0: 2ms Debounce Delay"] - DEBDLY2 = 0, + Debdly2 = 0, #[doc = "1: 4ms Debounce Delay"] - DEBDLY4 = 1, + Debdly4 = 1, #[doc = "2: 6ms Debounce Delay"] - DEBDLY6 = 2, + Debdly6 = 2, #[doc = "3: 8ms Debounce Delay"] - DEBDLY8 = 3, + Debdly8 = 3, #[doc = "4: 10ms Debounce Delay"] - DEBDLY10 = 4, + Debdly10 = 4, #[doc = "5: 12ms Debounce Delay"] - DEBDLY12 = 5, + Debdly12 = 5, #[doc = "6: 14ms Debounce Delay"] - DEBDLY14 = 6, + Debdly14 = 6, #[doc = "7: 16ms Debounce Delay"] - DEBDLY16 = 7, + Debdly16 = 7, #[doc = "8: 18ms Debounce Delay"] - DEBDLY18 = 8, + Debdly18 = 8, #[doc = "9: 20ms Debounce Delay"] - DEBDLY20 = 9, + Debdly20 = 9, #[doc = "10: 22ms Debounce Delay"] - DEBDLY22 = 10, + Debdly22 = 10, #[doc = "11: 24ms Debounce Delay"] - DEBDLY24 = 11, + Debdly24 = 11, #[doc = "12: 26ms Debounce Delay"] - DEBDLY26 = 12, + Debdly26 = 12, #[doc = "13: 28ms Debounce Delay"] - DEBDLY28 = 13, + Debdly28 = 13, #[doc = "14: 30ms Debounce Delay"] - DEBDLY30 = 14, + Debdly30 = 14, #[doc = "15: 32ms Debounce Delay"] - DEBDLY32 = 15, + Debdly32 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DEBDLY_A) -> Self { + fn from(variant: Debdly) -> Self { variant as _ } } -impl DEBDLY_R { +impl crate::FieldSpec for Debdly { + type Ux = u8; +} +impl crate::IsEnum for Debdly {} +#[doc = "Field `DEBDLY` reader - Debounce Delay"] +pub type DebdlyR = crate::FieldReader; +impl DebdlyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DEBDLY_A { + pub const fn variant(&self) -> Debdly { match self.bits { - 0 => DEBDLY_A::DEBDLY2, - 1 => DEBDLY_A::DEBDLY4, - 2 => DEBDLY_A::DEBDLY6, - 3 => DEBDLY_A::DEBDLY8, - 4 => DEBDLY_A::DEBDLY10, - 5 => DEBDLY_A::DEBDLY12, - 6 => DEBDLY_A::DEBDLY14, - 7 => DEBDLY_A::DEBDLY16, - 8 => DEBDLY_A::DEBDLY18, - 9 => DEBDLY_A::DEBDLY20, - 10 => DEBDLY_A::DEBDLY22, - 11 => DEBDLY_A::DEBDLY24, - 12 => DEBDLY_A::DEBDLY26, - 13 => DEBDLY_A::DEBDLY28, - 14 => DEBDLY_A::DEBDLY30, - 15 => DEBDLY_A::DEBDLY32, + 0 => Debdly::Debdly2, + 1 => Debdly::Debdly4, + 2 => Debdly::Debdly6, + 3 => Debdly::Debdly8, + 4 => Debdly::Debdly10, + 5 => Debdly::Debdly12, + 6 => Debdly::Debdly14, + 7 => Debdly::Debdly16, + 8 => Debdly::Debdly18, + 9 => Debdly::Debdly20, + 10 => Debdly::Debdly22, + 11 => Debdly::Debdly24, + 12 => Debdly::Debdly26, + 13 => Debdly::Debdly28, + 14 => Debdly::Debdly30, + 15 => Debdly::Debdly32, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DEBDLY2`"] + #[doc = "2ms Debounce Delay"] #[inline(always)] pub fn is_debdly2(&self) -> bool { - *self == DEBDLY_A::DEBDLY2 + *self == Debdly::Debdly2 } - #[doc = "Checks if the value of the field is `DEBDLY4`"] + #[doc = "4ms Debounce Delay"] #[inline(always)] pub fn is_debdly4(&self) -> bool { - *self == DEBDLY_A::DEBDLY4 + *self == Debdly::Debdly4 } - #[doc = "Checks if the value of the field is `DEBDLY6`"] + #[doc = "6ms Debounce Delay"] #[inline(always)] pub fn is_debdly6(&self) -> bool { - *self == DEBDLY_A::DEBDLY6 + *self == Debdly::Debdly6 } - #[doc = "Checks if the value of the field is `DEBDLY8`"] + #[doc = "8ms Debounce Delay"] #[inline(always)] pub fn is_debdly8(&self) -> bool { - *self == DEBDLY_A::DEBDLY8 + *self == Debdly::Debdly8 } - #[doc = "Checks if the value of the field is `DEBDLY10`"] + #[doc = "10ms Debounce Delay"] #[inline(always)] pub fn is_debdly10(&self) -> bool { - *self == DEBDLY_A::DEBDLY10 + *self == Debdly::Debdly10 } - #[doc = "Checks if the value of the field is `DEBDLY12`"] + #[doc = "12ms Debounce Delay"] #[inline(always)] pub fn is_debdly12(&self) -> bool { - *self == DEBDLY_A::DEBDLY12 + *self == Debdly::Debdly12 } - #[doc = "Checks if the value of the field is `DEBDLY14`"] + #[doc = "14ms Debounce Delay"] #[inline(always)] pub fn is_debdly14(&self) -> bool { - *self == DEBDLY_A::DEBDLY14 + *self == Debdly::Debdly14 } - #[doc = "Checks if the value of the field is `DEBDLY16`"] + #[doc = "16ms Debounce Delay"] #[inline(always)] pub fn is_debdly16(&self) -> bool { - *self == DEBDLY_A::DEBDLY16 + *self == Debdly::Debdly16 } - #[doc = "Checks if the value of the field is `DEBDLY18`"] + #[doc = "18ms Debounce Delay"] #[inline(always)] pub fn is_debdly18(&self) -> bool { - *self == DEBDLY_A::DEBDLY18 + *self == Debdly::Debdly18 } - #[doc = "Checks if the value of the field is `DEBDLY20`"] + #[doc = "20ms Debounce Delay"] #[inline(always)] pub fn is_debdly20(&self) -> bool { - *self == DEBDLY_A::DEBDLY20 + *self == Debdly::Debdly20 } - #[doc = "Checks if the value of the field is `DEBDLY22`"] + #[doc = "22ms Debounce Delay"] #[inline(always)] pub fn is_debdly22(&self) -> bool { - *self == DEBDLY_A::DEBDLY22 + *self == Debdly::Debdly22 } - #[doc = "Checks if the value of the field is `DEBDLY24`"] + #[doc = "24ms Debounce Delay"] #[inline(always)] pub fn is_debdly24(&self) -> bool { - *self == DEBDLY_A::DEBDLY24 + *self == Debdly::Debdly24 } - #[doc = "Checks if the value of the field is `DEBDLY26`"] + #[doc = "26ms Debounce Delay"] #[inline(always)] pub fn is_debdly26(&self) -> bool { - *self == DEBDLY_A::DEBDLY26 + *self == Debdly::Debdly26 } - #[doc = "Checks if the value of the field is `DEBDLY28`"] + #[doc = "28ms Debounce Delay"] #[inline(always)] pub fn is_debdly28(&self) -> bool { - *self == DEBDLY_A::DEBDLY28 + *self == Debdly::Debdly28 } - #[doc = "Checks if the value of the field is `DEBDLY30`"] + #[doc = "30ms Debounce Delay"] #[inline(always)] pub fn is_debdly30(&self) -> bool { - *self == DEBDLY_A::DEBDLY30 + *self == Debdly::Debdly30 } - #[doc = "Checks if the value of the field is `DEBDLY32`"] + #[doc = "32ms Debounce Delay"] #[inline(always)] pub fn is_debdly32(&self) -> bool { - *self == DEBDLY_A::DEBDLY32 + *self == Debdly::Debdly32 } } #[doc = "Field `DEBDLY` writer - Debounce Delay"] -pub type DEBDLY_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, DELAY_SPEC, u8, DEBDLY_A, 4, O>; -impl<'a, const O: u8> DEBDLY_W<'a, O> { +pub type DebdlyW<'a, REG> = crate::FieldWriter<'a, REG, 4, Debdly, crate::Safe>; +impl<'a, REG> DebdlyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "2ms Debounce Delay"] #[inline(always)] - pub fn debdly2(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY2) + pub fn debdly2(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly2) } #[doc = "4ms Debounce Delay"] #[inline(always)] - pub fn debdly4(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY4) + pub fn debdly4(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly4) } #[doc = "6ms Debounce Delay"] #[inline(always)] - pub fn debdly6(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY6) + pub fn debdly6(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly6) } #[doc = "8ms Debounce Delay"] #[inline(always)] - pub fn debdly8(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY8) + pub fn debdly8(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly8) } #[doc = "10ms Debounce Delay"] #[inline(always)] - pub fn debdly10(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY10) + pub fn debdly10(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly10) } #[doc = "12ms Debounce Delay"] #[inline(always)] - pub fn debdly12(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY12) + pub fn debdly12(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly12) } #[doc = "14ms Debounce Delay"] #[inline(always)] - pub fn debdly14(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY14) + pub fn debdly14(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly14) } #[doc = "16ms Debounce Delay"] #[inline(always)] - pub fn debdly16(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY16) + pub fn debdly16(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly16) } #[doc = "18ms Debounce Delay"] #[inline(always)] - pub fn debdly18(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY18) + pub fn debdly18(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly18) } #[doc = "20ms Debounce Delay"] #[inline(always)] - pub fn debdly20(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY20) + pub fn debdly20(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly20) } #[doc = "22ms Debounce Delay"] #[inline(always)] - pub fn debdly22(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY22) + pub fn debdly22(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly22) } #[doc = "24ms Debounce Delay"] #[inline(always)] - pub fn debdly24(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY24) + pub fn debdly24(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly24) } #[doc = "26ms Debounce Delay"] #[inline(always)] - pub fn debdly26(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY26) + pub fn debdly26(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly26) } #[doc = "28ms Debounce Delay"] #[inline(always)] - pub fn debdly28(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY28) + pub fn debdly28(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly28) } #[doc = "30ms Debounce Delay"] #[inline(always)] - pub fn debdly30(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY30) + pub fn debdly30(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly30) } #[doc = "32ms Debounce Delay"] #[inline(always)] - pub fn debdly32(self) -> &'a mut W { - self.variant(DEBDLY_A::DEBDLY32) + pub fn debdly32(self) -> &'a mut crate::W { + self.variant(Debdly::Debdly32) } } -#[doc = "Field `STABDLY` reader - Row stable Delay"] -pub type STABDLY_R = crate::FieldReader; #[doc = "Row stable Delay\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STABDLY_A { +pub enum Stabdly { #[doc = "0: 2ms Row Stable Delay"] - STABDLY2 = 0, + Stabdly2 = 0, #[doc = "1: 4ms Row Stable Delay"] - STABDLY4 = 1, + Stabdly4 = 1, #[doc = "2: 6ms Row Stable Delay"] - STABDLY6 = 2, + Stabdly6 = 2, #[doc = "3: 8ms Row Stable Delay"] - STABDLY8 = 3, + Stabdly8 = 3, #[doc = "4: 10ms Row Stable Delay"] - STABDLY10 = 4, + Stabdly10 = 4, #[doc = "5: 12ms Row Stable Delay"] - STABDLY12 = 5, + Stabdly12 = 5, #[doc = "6: 14ms Row Stable Delay"] - STABDLY14 = 6, + Stabdly14 = 6, #[doc = "7: 16ms Row Stable Delay"] - STABDLY16 = 7, + Stabdly16 = 7, #[doc = "8: 18ms Row Stable Delay"] - STABDLY18 = 8, + Stabdly18 = 8, #[doc = "9: 20ms Row Stable Delay"] - STABDLY20 = 9, + Stabdly20 = 9, #[doc = "10: 22ms Row Stable Delay"] - STABDLY22 = 10, + Stabdly22 = 10, #[doc = "11: 24ms Row Stable Delay"] - STABDLY24 = 11, + Stabdly24 = 11, #[doc = "12: 26ms Row Stable Delay"] - STABDLY26 = 12, + Stabdly26 = 12, #[doc = "13: 28ms Row Stable Delay"] - STABDLY28 = 13, + Stabdly28 = 13, #[doc = "14: 30ms Row Stable Delay"] - STABDLY30 = 14, + Stabdly30 = 14, #[doc = "15: 32ms Row Stable Delay"] - STABDLY32 = 15, + Stabdly32 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STABDLY_A) -> Self { + fn from(variant: Stabdly) -> Self { variant as _ } } -impl STABDLY_R { +impl crate::FieldSpec for Stabdly { + type Ux = u8; +} +impl crate::IsEnum for Stabdly {} +#[doc = "Field `STABDLY` reader - Row stable Delay"] +pub type StabdlyR = crate::FieldReader; +impl StabdlyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> STABDLY_A { + pub const fn variant(&self) -> Stabdly { match self.bits { - 0 => STABDLY_A::STABDLY2, - 1 => STABDLY_A::STABDLY4, - 2 => STABDLY_A::STABDLY6, - 3 => STABDLY_A::STABDLY8, - 4 => STABDLY_A::STABDLY10, - 5 => STABDLY_A::STABDLY12, - 6 => STABDLY_A::STABDLY14, - 7 => STABDLY_A::STABDLY16, - 8 => STABDLY_A::STABDLY18, - 9 => STABDLY_A::STABDLY20, - 10 => STABDLY_A::STABDLY22, - 11 => STABDLY_A::STABDLY24, - 12 => STABDLY_A::STABDLY26, - 13 => STABDLY_A::STABDLY28, - 14 => STABDLY_A::STABDLY30, - 15 => STABDLY_A::STABDLY32, + 0 => Stabdly::Stabdly2, + 1 => Stabdly::Stabdly4, + 2 => Stabdly::Stabdly6, + 3 => Stabdly::Stabdly8, + 4 => Stabdly::Stabdly10, + 5 => Stabdly::Stabdly12, + 6 => Stabdly::Stabdly14, + 7 => Stabdly::Stabdly16, + 8 => Stabdly::Stabdly18, + 9 => Stabdly::Stabdly20, + 10 => Stabdly::Stabdly22, + 11 => Stabdly::Stabdly24, + 12 => Stabdly::Stabdly26, + 13 => Stabdly::Stabdly28, + 14 => Stabdly::Stabdly30, + 15 => Stabdly::Stabdly32, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `STABDLY2`"] + #[doc = "2ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly2(&self) -> bool { - *self == STABDLY_A::STABDLY2 + *self == Stabdly::Stabdly2 } - #[doc = "Checks if the value of the field is `STABDLY4`"] + #[doc = "4ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly4(&self) -> bool { - *self == STABDLY_A::STABDLY4 + *self == Stabdly::Stabdly4 } - #[doc = "Checks if the value of the field is `STABDLY6`"] + #[doc = "6ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly6(&self) -> bool { - *self == STABDLY_A::STABDLY6 + *self == Stabdly::Stabdly6 } - #[doc = "Checks if the value of the field is `STABDLY8`"] + #[doc = "8ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly8(&self) -> bool { - *self == STABDLY_A::STABDLY8 + *self == Stabdly::Stabdly8 } - #[doc = "Checks if the value of the field is `STABDLY10`"] + #[doc = "10ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly10(&self) -> bool { - *self == STABDLY_A::STABDLY10 + *self == Stabdly::Stabdly10 } - #[doc = "Checks if the value of the field is `STABDLY12`"] + #[doc = "12ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly12(&self) -> bool { - *self == STABDLY_A::STABDLY12 + *self == Stabdly::Stabdly12 } - #[doc = "Checks if the value of the field is `STABDLY14`"] + #[doc = "14ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly14(&self) -> bool { - *self == STABDLY_A::STABDLY14 + *self == Stabdly::Stabdly14 } - #[doc = "Checks if the value of the field is `STABDLY16`"] + #[doc = "16ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly16(&self) -> bool { - *self == STABDLY_A::STABDLY16 + *self == Stabdly::Stabdly16 } - #[doc = "Checks if the value of the field is `STABDLY18`"] + #[doc = "18ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly18(&self) -> bool { - *self == STABDLY_A::STABDLY18 + *self == Stabdly::Stabdly18 } - #[doc = "Checks if the value of the field is `STABDLY20`"] + #[doc = "20ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly20(&self) -> bool { - *self == STABDLY_A::STABDLY20 + *self == Stabdly::Stabdly20 } - #[doc = "Checks if the value of the field is `STABDLY22`"] + #[doc = "22ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly22(&self) -> bool { - *self == STABDLY_A::STABDLY22 + *self == Stabdly::Stabdly22 } - #[doc = "Checks if the value of the field is `STABDLY24`"] + #[doc = "24ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly24(&self) -> bool { - *self == STABDLY_A::STABDLY24 + *self == Stabdly::Stabdly24 } - #[doc = "Checks if the value of the field is `STABDLY26`"] + #[doc = "26ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly26(&self) -> bool { - *self == STABDLY_A::STABDLY26 + *self == Stabdly::Stabdly26 } - #[doc = "Checks if the value of the field is `STABDLY28`"] + #[doc = "28ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly28(&self) -> bool { - *self == STABDLY_A::STABDLY28 + *self == Stabdly::Stabdly28 } - #[doc = "Checks if the value of the field is `STABDLY30`"] + #[doc = "30ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly30(&self) -> bool { - *self == STABDLY_A::STABDLY30 + *self == Stabdly::Stabdly30 } - #[doc = "Checks if the value of the field is `STABDLY32`"] + #[doc = "32ms Row Stable Delay"] #[inline(always)] pub fn is_stabdly32(&self) -> bool { - *self == STABDLY_A::STABDLY32 + *self == Stabdly::Stabdly32 } } #[doc = "Field `STABDLY` writer - Row stable Delay"] -pub type STABDLY_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, DELAY_SPEC, u8, STABDLY_A, 4, O>; -impl<'a, const O: u8> STABDLY_W<'a, O> { +pub type StabdlyW<'a, REG> = crate::FieldWriter<'a, REG, 4, Stabdly, crate::Safe>; +impl<'a, REG> StabdlyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "2ms Row Stable Delay"] #[inline(always)] - pub fn stabdly2(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY2) + pub fn stabdly2(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly2) } #[doc = "4ms Row Stable Delay"] #[inline(always)] - pub fn stabdly4(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY4) + pub fn stabdly4(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly4) } #[doc = "6ms Row Stable Delay"] #[inline(always)] - pub fn stabdly6(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY6) + pub fn stabdly6(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly6) } #[doc = "8ms Row Stable Delay"] #[inline(always)] - pub fn stabdly8(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY8) + pub fn stabdly8(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly8) } #[doc = "10ms Row Stable Delay"] #[inline(always)] - pub fn stabdly10(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY10) + pub fn stabdly10(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly10) } #[doc = "12ms Row Stable Delay"] #[inline(always)] - pub fn stabdly12(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY12) + pub fn stabdly12(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly12) } #[doc = "14ms Row Stable Delay"] #[inline(always)] - pub fn stabdly14(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY14) + pub fn stabdly14(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly14) } #[doc = "16ms Row Stable Delay"] #[inline(always)] - pub fn stabdly16(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY16) + pub fn stabdly16(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly16) } #[doc = "18ms Row Stable Delay"] #[inline(always)] - pub fn stabdly18(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY18) + pub fn stabdly18(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly18) } #[doc = "20ms Row Stable Delay"] #[inline(always)] - pub fn stabdly20(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY20) + pub fn stabdly20(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly20) } #[doc = "22ms Row Stable Delay"] #[inline(always)] - pub fn stabdly22(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY22) + pub fn stabdly22(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly22) } #[doc = "24ms Row Stable Delay"] #[inline(always)] - pub fn stabdly24(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY24) + pub fn stabdly24(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly24) } #[doc = "26ms Row Stable Delay"] #[inline(always)] - pub fn stabdly26(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY26) + pub fn stabdly26(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly26) } #[doc = "28ms Row Stable Delay"] #[inline(always)] - pub fn stabdly28(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY28) + pub fn stabdly28(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly28) } #[doc = "30ms Row Stable Delay"] #[inline(always)] - pub fn stabdly30(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY30) + pub fn stabdly30(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly30) } #[doc = "32ms Row Stable Delay"] #[inline(always)] - pub fn stabdly32(self) -> &'a mut W { - self.variant(STABDLY_A::STABDLY32) + pub fn stabdly32(self) -> &'a mut crate::W { + self.variant(Stabdly::Stabdly32) } } impl R { #[doc = "Bits 8:11 - Scan Delay"] #[inline(always)] - pub fn scandly(&self) -> SCANDLY_R { - SCANDLY_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn scandly(&self) -> ScandlyR { + ScandlyR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 16:19 - Debounce Delay"] #[inline(always)] - pub fn debdly(&self) -> DEBDLY_R { - DEBDLY_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn debdly(&self) -> DebdlyR { + DebdlyR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - Row stable Delay"] #[inline(always)] - pub fn stabdly(&self) -> STABDLY_R { - STABDLY_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn stabdly(&self) -> StabdlyR { + StabdlyR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 8:11 - Scan Delay"] #[inline(always)] #[must_use] - pub fn scandly(&mut self) -> SCANDLY_W<8> { - SCANDLY_W::new(self) + pub fn scandly(&mut self) -> ScandlyW { + ScandlyW::new(self, 8) } #[doc = "Bits 16:19 - Debounce Delay"] #[inline(always)] #[must_use] - pub fn debdly(&mut self) -> DEBDLY_W<16> { - DEBDLY_W::new(self) + pub fn debdly(&mut self) -> DebdlyW { + DebdlyW::new(self, 16) } #[doc = "Bits 24:27 - Row stable Delay"] #[inline(always)] #[must_use] - pub fn stabdly(&mut self) -> STABDLY_W<24> { - STABDLY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stabdly(&mut self) -> StabdlyW { + StabdlyW::new(self, 24) } } -#[doc = "Delay\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [delay](index.html) module"] -pub struct DELAY_SPEC; -impl crate::RegisterSpec for DELAY_SPEC { +#[doc = "Delay\n\nYou can [`read`](crate::Reg::read) this register and get [`delay::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`delay::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DelaySpec; +impl crate::RegisterSpec for DelaySpec { type Ux = u32; } -#[doc = "`read()` method returns [delay::R](R) reader structure"] -impl crate::Readable for DELAY_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [delay::W](W) writer structure"] -impl crate::Writable for DELAY_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`delay::R`](R) reader structure"] +impl crate::Readable for DelaySpec {} +#[doc = "`write(|w| ..)` method takes [`delay::W`](W) writer structure"] +impl crate::Writable for DelaySpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DELAY to value 0"] -impl crate::Resettable for DELAY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DelaySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/en.rs index cb2b254..cf8e8fa 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/en.rs @@ -1,133 +1,96 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EN` reader - Enable"] -pub type EN_R = crate::BitReader; +pub type W = crate::W; #[doc = "Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EN_A { +pub enum En { #[doc = "0: Stops clocking and resets peripheral core logic."] - DISABLE = 0, + Disable = 0, #[doc = "1: Enables clocking, and begins scanning if CFG.AUTOSTART is 0x1."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EN_A) -> Self { + fn from(variant: En) -> Self { variant as u8 != 0 } } -impl EN_R { +#[doc = "Field `EN` reader - Enable"] +pub type EnR = crate::BitReader; +impl EnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EN_A { + pub const fn variant(&self) -> En { match self.bits { - false => EN_A::DISABLE, - true => EN_A::ENABLE, + false => En::Disable, + true => En::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Stops clocking and resets peripheral core logic."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EN_A::DISABLE + *self == En::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enables clocking, and begins scanning if CFG.AUTOSTART is 0x1."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EN_A::ENABLE + *self == En::Enable } } #[doc = "Field `EN` writer - Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, EN_A, O>; -impl<'a, const O: u8> EN_W<'a, O> { +pub type EnW<'a, REG> = crate::BitWriter<'a, REG, En>; +impl<'a, REG> EnW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Stops clocking and resets peripheral core logic."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(En::Disable) } #[doc = "Enables clocking, and begins scanning if CFG.AUTOSTART is 0x1."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(En::Enable) } } #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "Enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/ien.rs index 0a7e6cd..3468405 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/ien.rs @@ -1,125 +1,85 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `NOKEY` reader - No Key was pressed"] -pub type NOKEY_R = crate::BitReader; +pub type NokeyR = crate::BitReader; #[doc = "Field `NOKEY` writer - No Key was pressed"] -pub type NOKEY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type NokeyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `KEY` reader - A Key was pressed"] -pub type KEY_R = crate::BitReader; +pub type KeyR = crate::BitReader; #[doc = "Field `KEY` writer - A Key was pressed"] -pub type KEY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type KeyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANNED` reader - Completed Scanning"] -pub type SCANNED_R = crate::BitReader; +pub type ScannedR = crate::BitReader; #[doc = "Field `SCANNED` writer - Completed Scanning"] -pub type SCANNED_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ScannedW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WAKEUP` reader - Wake up"] -pub type WAKEUP_R = crate::BitReader; +pub type WakeupR = crate::BitReader; #[doc = "Field `WAKEUP` writer - Wake up"] -pub type WAKEUP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type WakeupW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - No Key was pressed"] #[inline(always)] - pub fn nokey(&self) -> NOKEY_R { - NOKEY_R::new((self.bits & 1) != 0) + pub fn nokey(&self) -> NokeyR { + NokeyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - A Key was pressed"] #[inline(always)] - pub fn key(&self) -> KEY_R { - KEY_R::new(((self.bits >> 1) & 1) != 0) + pub fn key(&self) -> KeyR { + KeyR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Completed Scanning"] #[inline(always)] - pub fn scanned(&self) -> SCANNED_R { - SCANNED_R::new(((self.bits >> 2) & 1) != 0) + pub fn scanned(&self) -> ScannedR { + ScannedR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Wake up"] #[inline(always)] - pub fn wakeup(&self) -> WAKEUP_R { - WAKEUP_R::new(((self.bits >> 3) & 1) != 0) + pub fn wakeup(&self) -> WakeupR { + WakeupR::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - No Key was pressed"] #[inline(always)] #[must_use] - pub fn nokey(&mut self) -> NOKEY_W<0> { - NOKEY_W::new(self) + pub fn nokey(&mut self) -> NokeyW { + NokeyW::new(self, 0) } #[doc = "Bit 1 - A Key was pressed"] #[inline(always)] #[must_use] - pub fn key(&mut self) -> KEY_W<1> { - KEY_W::new(self) + pub fn key(&mut self) -> KeyW { + KeyW::new(self, 1) } #[doc = "Bit 2 - Completed Scanning"] #[inline(always)] #[must_use] - pub fn scanned(&mut self) -> SCANNED_W<2> { - SCANNED_W::new(self) + pub fn scanned(&mut self) -> ScannedW { + ScannedW::new(self, 2) } #[doc = "Bit 3 - Wake up"] #[inline(always)] #[must_use] - pub fn wakeup(&mut self) -> WAKEUP_W<3> { - WAKEUP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn wakeup(&mut self) -> WakeupW { + WakeupW::new(self, 3) } } -#[doc = "Interrupt Enables\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "Interrupt Enables\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/if_.rs index 4119342..b3e9ec3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/if_.rs @@ -1,125 +1,85 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `NOKEY` reader - No key was pressed"] -pub type NOKEY_R = crate::BitReader; +pub type NokeyR = crate::BitReader; #[doc = "Field `NOKEY` writer - No key was pressed"] -pub type NOKEY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type NokeyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `KEY` reader - A key was pressed"] -pub type KEY_R = crate::BitReader; +pub type KeyR = crate::BitReader; #[doc = "Field `KEY` writer - A key was pressed"] -pub type KEY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type KeyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCANNED` reader - Completed scan"] -pub type SCANNED_R = crate::BitReader; +pub type ScannedR = crate::BitReader; #[doc = "Field `SCANNED` writer - Completed scan"] -pub type SCANNED_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ScannedW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WAKEUP` reader - Wake up"] -pub type WAKEUP_R = crate::BitReader; +pub type WakeupR = crate::BitReader; #[doc = "Field `WAKEUP` writer - Wake up"] -pub type WAKEUP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type WakeupW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - No key was pressed"] #[inline(always)] - pub fn nokey(&self) -> NOKEY_R { - NOKEY_R::new((self.bits & 1) != 0) + pub fn nokey(&self) -> NokeyR { + NokeyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - A key was pressed"] #[inline(always)] - pub fn key(&self) -> KEY_R { - KEY_R::new(((self.bits >> 1) & 1) != 0) + pub fn key(&self) -> KeyR { + KeyR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Completed scan"] #[inline(always)] - pub fn scanned(&self) -> SCANNED_R { - SCANNED_R::new(((self.bits >> 2) & 1) != 0) + pub fn scanned(&self) -> ScannedR { + ScannedR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Wake up"] #[inline(always)] - pub fn wakeup(&self) -> WAKEUP_R { - WAKEUP_R::new(((self.bits >> 3) & 1) != 0) + pub fn wakeup(&self) -> WakeupR { + WakeupR::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - No key was pressed"] #[inline(always)] #[must_use] - pub fn nokey(&mut self) -> NOKEY_W<0> { - NOKEY_W::new(self) + pub fn nokey(&mut self) -> NokeyW { + NokeyW::new(self, 0) } #[doc = "Bit 1 - A key was pressed"] #[inline(always)] #[must_use] - pub fn key(&mut self) -> KEY_W<1> { - KEY_W::new(self) + pub fn key(&mut self) -> KeyW { + KeyW::new(self, 1) } #[doc = "Bit 2 - Completed scan"] #[inline(always)] #[must_use] - pub fn scanned(&mut self) -> SCANNED_W<2> { - SCANNED_W::new(self) + pub fn scanned(&mut self) -> ScannedW { + ScannedW::new(self, 2) } #[doc = "Bit 3 - Wake up"] #[inline(always)] #[must_use] - pub fn wakeup(&mut self) -> WAKEUP_W<3> { - WAKEUP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn wakeup(&mut self) -> WakeupW { + WakeupW::new(self, 3) } } -#[doc = "Interrupt Flags\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "Interrupt Flags\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/ipversion.rs index 44b0ae3..09a3978 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IPVERSION"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IPVERSION"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "IPVERSION\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "IPVERSION\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/status.rs index fe92fc3..b395671 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/status.rs @@ -1,65 +1,50 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ROW` reader - Row detection"] -pub type ROW_R = crate::FieldReader; +pub type RowR = crate::FieldReader; #[doc = "Field `RUNNING` reader - Running"] -pub type RUNNING_R = crate::BitReader; +pub type RunningR = crate::BitReader; #[doc = "Field `COL` reader - Column Latched"] -pub type COL_R = crate::FieldReader; +pub type ColR = crate::FieldReader; #[doc = "Field `NOKEY` reader - No Key pressed status"] -pub type NOKEY_R = crate::BitReader; +pub type NokeyR = crate::BitReader; #[doc = "Field `SYNCBUSY` reader - Sync Busy"] -pub type SYNCBUSY_R = crate::BitReader; +pub type SyncbusyR = crate::BitReader; impl R { #[doc = "Bits 0:5 - Row detection"] #[inline(always)] - pub fn row(&self) -> ROW_R { - ROW_R::new((self.bits & 0x3f) as u8) + pub fn row(&self) -> RowR { + RowR::new((self.bits & 0x3f) as u8) } #[doc = "Bit 16 - Running"] #[inline(always)] - pub fn running(&self) -> RUNNING_R { - RUNNING_R::new(((self.bits >> 16) & 1) != 0) + pub fn running(&self) -> RunningR { + RunningR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bits 24:26 - Column Latched"] #[inline(always)] - pub fn col(&self) -> COL_R { - COL_R::new(((self.bits >> 24) & 7) as u8) + pub fn col(&self) -> ColR { + ColR::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bit 30 - No Key pressed status"] #[inline(always)] - pub fn nokey(&self) -> NOKEY_R { - NOKEY_R::new(((self.bits >> 30) & 1) != 0) + pub fn nokey(&self) -> NokeyR { + NokeyR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Sync Busy"] #[inline(always)] - pub fn syncbusy(&self) -> SYNCBUSY_R { - SYNCBUSY_R::new(((self.bits >> 31) & 1) != 0) + pub fn syncbusy(&self) -> SyncbusyR { + SyncbusyR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "Status\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0x4000_0000"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0x4000_0000; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0x4000_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/swrst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/swrst.rs index cf614fe..6a1f8f9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/swrst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/keyscan_s/swrst.rs @@ -1,80 +1,40 @@ #[doc = "Register `SWRST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SWRST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SWRST` writer - Software reset command"] -pub type SWRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, SWRST_SPEC, bool, O>; +pub type SwrstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESETTING` reader - Software reset busy status"] -pub type RESETTING_R = crate::BitReader; +pub type ResettingR = crate::BitReader; impl R { #[doc = "Bit 1 - Software reset busy status"] #[inline(always)] - pub fn resetting(&self) -> RESETTING_R { - RESETTING_R::new(((self.bits >> 1) & 1) != 0) + pub fn resetting(&self) -> ResettingR { + ResettingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Software reset command"] #[inline(always)] #[must_use] - pub fn swrst(&mut self) -> SWRST_W<0> { - SWRST_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn swrst(&mut self) -> SwrstW { + SwrstW::new(self, 0) } } -#[doc = "Software Reset\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swrst](index.html) module"] -pub struct SWRST_SPEC; -impl crate::RegisterSpec for SWRST_SPEC { +#[doc = "Software Reset\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SwrstSpec; +impl crate::RegisterSpec for SwrstSpec { type Ux = u32; } -#[doc = "`read()` method returns [swrst::R](R) reader structure"] -impl crate::Readable for SWRST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [swrst::W](W) writer structure"] -impl crate::Writable for SWRST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`swrst::R`](R) reader structure"] +impl crate::Readable for SwrstSpec {} +#[doc = "`write(|w| ..)` method takes [`swrst::W`](W) writer structure"] +impl crate::Writable for SwrstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWRST to value 0"] -impl crate::Resettable for SWRST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SwrstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns.rs index f45b480..50aa535 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns.rs @@ -1,136 +1,264 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + swrst: Swrst, + ctrl: Ctrl, + cmd: Cmd, + dispctrl: Dispctrl, + bacfg: Bacfg, + bactrl: Bactrl, + status: Status, + arega: Arega, + aregb: Aregb, + if_: If, + ien: Ien, + biasctrl: Biasctrl, + dispctrlx: Dispctrlx, + _reserved15: [u8; 0x04], + segd0: Segd0, + _reserved16: [u8; 0x04], + segd1: Segd1, + _reserved17: [u8; 0x04], + segd2: Segd2, + _reserved18: [u8; 0x04], + segd3: Segd3, + _reserved19: [u8; 0x64], + updatectrl: Updatectrl, + _reserved20: [u8; 0x2c], + framerate: Framerate, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub swrst: SWRST, + #[inline(always)] + pub const fn swrst(&self) -> &Swrst { + &self.swrst + } #[doc = "0x0c - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x10 - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x14 - No Description"] - pub dispctrl: DISPCTRL, + #[inline(always)] + pub const fn dispctrl(&self) -> &Dispctrl { + &self.dispctrl + } #[doc = "0x18 - No Description"] - pub bacfg: BACFG, + #[inline(always)] + pub const fn bacfg(&self) -> &Bacfg { + &self.bacfg + } #[doc = "0x1c - No Description"] - pub bactrl: BACTRL, + #[inline(always)] + pub const fn bactrl(&self) -> &Bactrl { + &self.bactrl + } #[doc = "0x20 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x24 - No Description"] - pub arega: AREGA, + #[inline(always)] + pub const fn arega(&self) -> &Arega { + &self.arega + } #[doc = "0x28 - No Description"] - pub aregb: AREGB, + #[inline(always)] + pub const fn aregb(&self) -> &Aregb { + &self.aregb + } #[doc = "0x2c - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x30 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x34 - No Description"] - pub biasctrl: BIASCTRL, + #[inline(always)] + pub const fn biasctrl(&self) -> &Biasctrl { + &self.biasctrl + } #[doc = "0x38 - No Description"] - pub dispctrlx: DISPCTRLX, - _reserved15: [u8; 0x04], + #[inline(always)] + pub const fn dispctrlx(&self) -> &Dispctrlx { + &self.dispctrlx + } #[doc = "0x40 - No Description"] - pub segd0: SEGD0, - _reserved16: [u8; 0x04], + #[inline(always)] + pub const fn segd0(&self) -> &Segd0 { + &self.segd0 + } #[doc = "0x48 - No Description"] - pub segd1: SEGD1, - _reserved17: [u8; 0x04], + #[inline(always)] + pub const fn segd1(&self) -> &Segd1 { + &self.segd1 + } #[doc = "0x50 - No Description"] - pub segd2: SEGD2, - _reserved18: [u8; 0x04], + #[inline(always)] + pub const fn segd2(&self) -> &Segd2 { + &self.segd2 + } #[doc = "0x58 - No Description"] - pub segd3: SEGD3, - _reserved19: [u8; 0x64], + #[inline(always)] + pub const fn segd3(&self) -> &Segd3 { + &self.segd3 + } #[doc = "0xc0 - No Description"] - pub updatectrl: UPDATECTRL, - _reserved20: [u8; 0x2c], + #[inline(always)] + pub const fn updatectrl(&self) -> &Updatectrl { + &self.updatectrl + } #[doc = "0xf0 - No Description"] - pub framerate: FRAMERATE, + #[inline(always)] + pub const fn framerate(&self) -> &Framerate { + &self.framerate + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "SWRST (rw) register accessor: an alias for `Reg`"] -pub type SWRST = crate::Reg; +#[doc = "SWRST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swrst`] +module"] +#[doc(alias = "SWRST")] +pub type Swrst = crate::Reg; #[doc = "No Description"] pub mod swrst; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "DISPCTRL (rw) register accessor: an alias for `Reg`"] -pub type DISPCTRL = crate::Reg; +#[doc = "DISPCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dispctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dispctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dispctrl`] +module"] +#[doc(alias = "DISPCTRL")] +pub type Dispctrl = crate::Reg; #[doc = "No Description"] pub mod dispctrl; -#[doc = "BACFG (rw) register accessor: an alias for `Reg`"] -pub type BACFG = crate::Reg; +#[doc = "BACFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bacfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bacfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bacfg`] +module"] +#[doc(alias = "BACFG")] +pub type Bacfg = crate::Reg; #[doc = "No Description"] pub mod bacfg; -#[doc = "BACTRL (rw) register accessor: an alias for `Reg`"] -pub type BACTRL = crate::Reg; +#[doc = "BACTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bactrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bactrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bactrl`] +module"] +#[doc(alias = "BACTRL")] +pub type Bactrl = crate::Reg; #[doc = "No Description"] pub mod bactrl; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "AREGA (rw) register accessor: an alias for `Reg`"] -pub type AREGA = crate::Reg; +#[doc = "AREGA (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`arega::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`arega::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@arega`] +module"] +#[doc(alias = "AREGA")] +pub type Arega = crate::Reg; #[doc = "No Description"] pub mod arega; -#[doc = "AREGB (rw) register accessor: an alias for `Reg`"] -pub type AREGB = crate::Reg; +#[doc = "AREGB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`aregb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`aregb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@aregb`] +module"] +#[doc(alias = "AREGB")] +pub type Aregb = crate::Reg; #[doc = "No Description"] pub mod aregb; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "BIASCTRL (rw) register accessor: an alias for `Reg`"] -pub type BIASCTRL = crate::Reg; +#[doc = "BIASCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`biasctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`biasctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@biasctrl`] +module"] +#[doc(alias = "BIASCTRL")] +pub type Biasctrl = crate::Reg; #[doc = "No Description"] pub mod biasctrl; -#[doc = "DISPCTRLX (rw) register accessor: an alias for `Reg`"] -pub type DISPCTRLX = crate::Reg; +#[doc = "DISPCTRLX (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dispctrlx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dispctrlx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dispctrlx`] +module"] +#[doc(alias = "DISPCTRLX")] +pub type Dispctrlx = crate::Reg; #[doc = "No Description"] pub mod dispctrlx; -#[doc = "SEGD0 (rw) register accessor: an alias for `Reg`"] -pub type SEGD0 = crate::Reg; +#[doc = "SEGD0 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`segd0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`segd0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@segd0`] +module"] +#[doc(alias = "SEGD0")] +pub type Segd0 = crate::Reg; #[doc = "No Description"] pub mod segd0; -#[doc = "SEGD1 (rw) register accessor: an alias for `Reg`"] -pub type SEGD1 = crate::Reg; +#[doc = "SEGD1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`segd1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`segd1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@segd1`] +module"] +#[doc(alias = "SEGD1")] +pub type Segd1 = crate::Reg; #[doc = "No Description"] pub mod segd1; -#[doc = "SEGD2 (rw) register accessor: an alias for `Reg`"] -pub type SEGD2 = crate::Reg; +#[doc = "SEGD2 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`segd2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`segd2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@segd2`] +module"] +#[doc(alias = "SEGD2")] +pub type Segd2 = crate::Reg; #[doc = "No Description"] pub mod segd2; -#[doc = "SEGD3 (rw) register accessor: an alias for `Reg`"] -pub type SEGD3 = crate::Reg; +#[doc = "SEGD3 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`segd3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`segd3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@segd3`] +module"] +#[doc(alias = "SEGD3")] +pub type Segd3 = crate::Reg; #[doc = "No Description"] pub mod segd3; -#[doc = "UPDATECTRL (rw) register accessor: an alias for `Reg`"] -pub type UPDATECTRL = crate::Reg; +#[doc = "UPDATECTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`updatectrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`updatectrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@updatectrl`] +module"] +#[doc(alias = "UPDATECTRL")] +pub type Updatectrl = crate::Reg; #[doc = "No Description"] pub mod updatectrl; -#[doc = "FRAMERATE (rw) register accessor: an alias for `Reg`"] -pub type FRAMERATE = crate::Reg; +#[doc = "FRAMERATE (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`framerate::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`framerate::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@framerate`] +module"] +#[doc(alias = "FRAMERATE")] +pub type Framerate = crate::Reg; #[doc = "No Description"] pub mod framerate; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/arega.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/arega.rs index d47e2f6..dd09194 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/arega.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/arega.rs @@ -1,80 +1,40 @@ #[doc = "Register `AREGA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `AREGA` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `AREGA` reader - Animation Register A Data"] -pub type AREGA_R = crate::FieldReader; +pub type AregaR = crate::FieldReader; #[doc = "Field `AREGA` writer - Animation Register A Data"] -pub type AREGA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, AREGA_SPEC, u8, u8, 8, O>; +pub type AregaW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Animation Register A Data"] #[inline(always)] - pub fn arega(&self) -> AREGA_R { - AREGA_R::new((self.bits & 0xff) as u8) + pub fn arega(&self) -> AregaR { + AregaR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Animation Register A Data"] #[inline(always)] #[must_use] - pub fn arega(&mut self) -> AREGA_W<0> { - AREGA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn arega(&mut self) -> AregaW { + AregaW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [arega](index.html) module"] -pub struct AREGA_SPEC; -impl crate::RegisterSpec for AREGA_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`arega::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`arega::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AregaSpec; +impl crate::RegisterSpec for AregaSpec { type Ux = u32; } -#[doc = "`read()` method returns [arega::R](R) reader structure"] -impl crate::Readable for AREGA_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [arega::W](W) writer structure"] -impl crate::Writable for AREGA_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`arega::R`](R) reader structure"] +impl crate::Readable for AregaSpec {} +#[doc = "`write(|w| ..)` method takes [`arega::W`](W) writer structure"] +impl crate::Writable for AregaSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets AREGA to value 0"] -impl crate::Resettable for AREGA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for AregaSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/aregb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/aregb.rs index a1472e4..4371222 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/aregb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/aregb.rs @@ -1,80 +1,40 @@ #[doc = "Register `AREGB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `AREGB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `AREGB` reader - Animation Register B Data"] -pub type AREGB_R = crate::FieldReader; +pub type AregbR = crate::FieldReader; #[doc = "Field `AREGB` writer - Animation Register B Data"] -pub type AREGB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, AREGB_SPEC, u8, u8, 8, O>; +pub type AregbW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Animation Register B Data"] #[inline(always)] - pub fn aregb(&self) -> AREGB_R { - AREGB_R::new((self.bits & 0xff) as u8) + pub fn aregb(&self) -> AregbR { + AregbR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Animation Register B Data"] #[inline(always)] #[must_use] - pub fn aregb(&mut self) -> AREGB_W<0> { - AREGB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn aregb(&mut self) -> AregbW { + AregbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [aregb](index.html) module"] -pub struct AREGB_SPEC; -impl crate::RegisterSpec for AREGB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`aregb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`aregb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AregbSpec; +impl crate::RegisterSpec for AregbSpec { type Ux = u32; } -#[doc = "`read()` method returns [aregb::R](R) reader structure"] -impl crate::Readable for AREGB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [aregb::W](W) writer structure"] -impl crate::Writable for AREGB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`aregb::R`](R) reader structure"] +impl crate::Readable for AregbSpec {} +#[doc = "`write(|w| ..)` method takes [`aregb::W`](W) writer structure"] +impl crate::Writable for AregbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets AREGB to value 0"] -impl crate::Resettable for AREGB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for AregbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/bacfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/bacfg.rs index 557b2ed..660b41c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/bacfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/bacfg.rs @@ -1,185 +1,152 @@ #[doc = "Register `BACFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `BACFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ASTATETOP` reader - ASTATE top cnt"] -pub type ASTATETOP_R = crate::FieldReader; +pub type AstatetopR = crate::FieldReader; #[doc = "Field `ASTATETOP` writer - ASTATE top cnt"] -pub type ASTATETOP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BACFG_SPEC, u8, u8, 3, O>; -#[doc = "Field `FCPRESC` reader - Frame Counter Prescaler"] -pub type FCPRESC_R = crate::FieldReader; +pub type AstatetopW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Frame Counter Prescaler\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FCPRESC_A { +pub enum Fcpresc { #[doc = "0: every frame clock"] - DIV1 = 0, + Div1 = 0, #[doc = "1: every 2nd frame clock"] - DIV2 = 1, + Div2 = 1, #[doc = "2: every 4th frame clock"] - DIV4 = 2, + Div4 = 2, #[doc = "3: every 8th frame clock"] - DIV8 = 3, + Div8 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FCPRESC_A) -> Self { + fn from(variant: Fcpresc) -> Self { variant as _ } } -impl FCPRESC_R { +impl crate::FieldSpec for Fcpresc { + type Ux = u8; +} +impl crate::IsEnum for Fcpresc {} +#[doc = "Field `FCPRESC` reader - Frame Counter Prescaler"] +pub type FcprescR = crate::FieldReader; +impl FcprescR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FCPRESC_A { + pub const fn variant(&self) -> Fcpresc { match self.bits { - 0 => FCPRESC_A::DIV1, - 1 => FCPRESC_A::DIV2, - 2 => FCPRESC_A::DIV4, - 3 => FCPRESC_A::DIV8, + 0 => Fcpresc::Div1, + 1 => Fcpresc::Div2, + 2 => Fcpresc::Div4, + 3 => Fcpresc::Div8, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "every frame clock"] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == FCPRESC_A::DIV1 + *self == Fcpresc::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "every 2nd frame clock"] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == FCPRESC_A::DIV2 + *self == Fcpresc::Div2 } - #[doc = "Checks if the value of the field is `DIV4`"] + #[doc = "every 4th frame clock"] #[inline(always)] pub fn is_div4(&self) -> bool { - *self == FCPRESC_A::DIV4 + *self == Fcpresc::Div4 } - #[doc = "Checks if the value of the field is `DIV8`"] + #[doc = "every 8th frame clock"] #[inline(always)] pub fn is_div8(&self) -> bool { - *self == FCPRESC_A::DIV8 + *self == Fcpresc::Div8 } } #[doc = "Field `FCPRESC` writer - Frame Counter Prescaler"] -pub type FCPRESC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, BACFG_SPEC, u8, FCPRESC_A, 2, O>; -impl<'a, const O: u8> FCPRESC_W<'a, O> { +pub type FcprescW<'a, REG> = crate::FieldWriter<'a, REG, 2, Fcpresc, crate::Safe>; +impl<'a, REG> FcprescW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "every frame clock"] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(FCPRESC_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Fcpresc::Div1) } #[doc = "every 2nd frame clock"] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(FCPRESC_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Fcpresc::Div2) } #[doc = "every 4th frame clock"] #[inline(always)] - pub fn div4(self) -> &'a mut W { - self.variant(FCPRESC_A::DIV4) + pub fn div4(self) -> &'a mut crate::W { + self.variant(Fcpresc::Div4) } #[doc = "every 8th frame clock"] #[inline(always)] - pub fn div8(self) -> &'a mut W { - self.variant(FCPRESC_A::DIV8) + pub fn div8(self) -> &'a mut crate::W { + self.variant(Fcpresc::Div8) } } #[doc = "Field `FCTOP` reader - Frame Counter Top"] -pub type FCTOP_R = crate::FieldReader; +pub type FctopR = crate::FieldReader; #[doc = "Field `FCTOP` writer - Frame Counter Top"] -pub type FCTOP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BACFG_SPEC, u8, u8, 6, O>; +pub type FctopW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:2 - ASTATE top cnt"] #[inline(always)] - pub fn astatetop(&self) -> ASTATETOP_R { - ASTATETOP_R::new((self.bits & 7) as u8) + pub fn astatetop(&self) -> AstatetopR { + AstatetopR::new((self.bits & 7) as u8) } #[doc = "Bits 16:17 - Frame Counter Prescaler"] #[inline(always)] - pub fn fcpresc(&self) -> FCPRESC_R { - FCPRESC_R::new(((self.bits >> 16) & 3) as u8) + pub fn fcpresc(&self) -> FcprescR { + FcprescR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:23 - Frame Counter Top"] #[inline(always)] - pub fn fctop(&self) -> FCTOP_R { - FCTOP_R::new(((self.bits >> 18) & 0x3f) as u8) + pub fn fctop(&self) -> FctopR { + FctopR::new(((self.bits >> 18) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:2 - ASTATE top cnt"] #[inline(always)] #[must_use] - pub fn astatetop(&mut self) -> ASTATETOP_W<0> { - ASTATETOP_W::new(self) + pub fn astatetop(&mut self) -> AstatetopW { + AstatetopW::new(self, 0) } #[doc = "Bits 16:17 - Frame Counter Prescaler"] #[inline(always)] #[must_use] - pub fn fcpresc(&mut self) -> FCPRESC_W<16> { - FCPRESC_W::new(self) + pub fn fcpresc(&mut self) -> FcprescW { + FcprescW::new(self, 16) } #[doc = "Bits 18:23 - Frame Counter Top"] #[inline(always)] #[must_use] - pub fn fctop(&mut self) -> FCTOP_W<18> { - FCTOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn fctop(&mut self) -> FctopW { + FctopW::new(self, 18) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bacfg](index.html) module"] -pub struct BACFG_SPEC; -impl crate::RegisterSpec for BACFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bacfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bacfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct BacfgSpec; +impl crate::RegisterSpec for BacfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [bacfg::R](R) reader structure"] -impl crate::Readable for BACFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [bacfg::W](W) writer structure"] -impl crate::Writable for BACFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`bacfg::R`](R) reader structure"] +impl crate::Readable for BacfgSpec {} +#[doc = "`write(|w| ..)` method takes [`bacfg::W`](W) writer structure"] +impl crate::Writable for BacfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BACFG to value 0x07"] -impl crate::Resettable for BACFG_SPEC { - const RESET_VALUE: Self::Ux = 0x07; +impl crate::Resettable for BacfgSpec { + const RESET_VALUE: u32 = 0x07; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/bactrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/bactrl.rs index d49b87b..c06c073 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/bactrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/bactrl.rs @@ -1,507 +1,494 @@ #[doc = "Register `BACTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `BACTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `BLINKEN` reader - Blink Enable"] -pub type BLINKEN_R = crate::BitReader; +pub type BlinkenR = crate::BitReader; #[doc = "Field `BLINKEN` writer - Blink Enable"] -pub type BLINKEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, BACTRL_SPEC, bool, O>; -#[doc = "Field `BLANK` reader - Blank Display"] -pub type BLANK_R = crate::BitReader; +pub type BlinkenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Blank Display\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BLANK_A { +pub enum Blank { #[doc = "0: Display is not \"blanked\""] - DISABLE = 0, + Disable = 0, #[doc = "1: Display is \"blanked\""] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BLANK_A) -> Self { + fn from(variant: Blank) -> Self { variant as u8 != 0 } } -impl BLANK_R { +#[doc = "Field `BLANK` reader - Blank Display"] +pub type BlankR = crate::BitReader; +impl BlankR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> BLANK_A { + pub const fn variant(&self) -> Blank { match self.bits { - false => BLANK_A::DISABLE, - true => BLANK_A::ENABLE, + false => Blank::Disable, + true => Blank::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Display is not \"blanked\""] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == BLANK_A::DISABLE + *self == Blank::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Display is \"blanked\""] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == BLANK_A::ENABLE + *self == Blank::Enable } } #[doc = "Field `BLANK` writer - Blank Display"] -pub type BLANK_W<'a, const O: u8> = crate::BitWriter<'a, u32, BACTRL_SPEC, BLANK_A, O>; -impl<'a, const O: u8> BLANK_W<'a, O> { +pub type BlankW<'a, REG> = crate::BitWriter<'a, REG, Blank>; +impl<'a, REG> BlankW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Display is not \"blanked\""] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(BLANK_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Blank::Disable) } #[doc = "Display is \"blanked\""] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(BLANK_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Blank::Enable) } } #[doc = "Field `AEN` reader - Animation Enable"] -pub type AEN_R = crate::BitReader; +pub type AenR = crate::BitReader; #[doc = "Field `AEN` writer - Animation Enable"] -pub type AEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, BACTRL_SPEC, bool, O>; -#[doc = "Field `AREGASC` reader - Animate Register A Shift Control"] -pub type AREGASC_R = crate::FieldReader; +pub type AenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Animate Register A Shift Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum AREGASC_A { +pub enum Aregasc { #[doc = "0: No Shift operation on Animation Register A"] - NOSHIFT = 0, + Noshift = 0, #[doc = "1: Animation Register A is shifted left"] - SHIFTLEFT = 1, + Shiftleft = 1, #[doc = "2: Animation Register A is shifted right"] - SHIFTRIGHT = 2, + Shiftright = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: AREGASC_A) -> Self { + fn from(variant: Aregasc) -> Self { variant as _ } } -impl AREGASC_R { +impl crate::FieldSpec for Aregasc { + type Ux = u8; +} +impl crate::IsEnum for Aregasc {} +#[doc = "Field `AREGASC` reader - Animate Register A Shift Control"] +pub type AregascR = crate::FieldReader; +impl AregascR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(AREGASC_A::NOSHIFT), - 1 => Some(AREGASC_A::SHIFTLEFT), - 2 => Some(AREGASC_A::SHIFTRIGHT), + 0 => Some(Aregasc::Noshift), + 1 => Some(Aregasc::Shiftleft), + 2 => Some(Aregasc::Shiftright), _ => None, } } - #[doc = "Checks if the value of the field is `NOSHIFT`"] + #[doc = "No Shift operation on Animation Register A"] #[inline(always)] pub fn is_noshift(&self) -> bool { - *self == AREGASC_A::NOSHIFT + *self == Aregasc::Noshift } - #[doc = "Checks if the value of the field is `SHIFTLEFT`"] + #[doc = "Animation Register A is shifted left"] #[inline(always)] pub fn is_shiftleft(&self) -> bool { - *self == AREGASC_A::SHIFTLEFT + *self == Aregasc::Shiftleft } - #[doc = "Checks if the value of the field is `SHIFTRIGHT`"] + #[doc = "Animation Register A is shifted right"] #[inline(always)] pub fn is_shiftright(&self) -> bool { - *self == AREGASC_A::SHIFTRIGHT + *self == Aregasc::Shiftright } } #[doc = "Field `AREGASC` writer - Animate Register A Shift Control"] -pub type AREGASC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BACTRL_SPEC, u8, AREGASC_A, 2, O>; -impl<'a, const O: u8> AREGASC_W<'a, O> { +pub type AregascW<'a, REG> = crate::FieldWriter<'a, REG, 2, Aregasc>; +impl<'a, REG> AregascW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No Shift operation on Animation Register A"] #[inline(always)] - pub fn noshift(self) -> &'a mut W { - self.variant(AREGASC_A::NOSHIFT) + pub fn noshift(self) -> &'a mut crate::W { + self.variant(Aregasc::Noshift) } #[doc = "Animation Register A is shifted left"] #[inline(always)] - pub fn shiftleft(self) -> &'a mut W { - self.variant(AREGASC_A::SHIFTLEFT) + pub fn shiftleft(self) -> &'a mut crate::W { + self.variant(Aregasc::Shiftleft) } #[doc = "Animation Register A is shifted right"] #[inline(always)] - pub fn shiftright(self) -> &'a mut W { - self.variant(AREGASC_A::SHIFTRIGHT) + pub fn shiftright(self) -> &'a mut crate::W { + self.variant(Aregasc::Shiftright) } } -#[doc = "Field `AREGBSC` reader - Animate Register B Shift Control"] -pub type AREGBSC_R = crate::FieldReader; #[doc = "Animate Register B Shift Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum AREGBSC_A { +pub enum Aregbsc { #[doc = "0: No Shift operation on Animation Register B"] - NOSHIFT = 0, + Noshift = 0, #[doc = "1: Animation Register B is shifted left"] - SHIFTLEFT = 1, + Shiftleft = 1, #[doc = "2: Animation Register B is shifted right"] - SHIFTRIGHT = 2, + Shiftright = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: AREGBSC_A) -> Self { + fn from(variant: Aregbsc) -> Self { variant as _ } } -impl AREGBSC_R { +impl crate::FieldSpec for Aregbsc { + type Ux = u8; +} +impl crate::IsEnum for Aregbsc {} +#[doc = "Field `AREGBSC` reader - Animate Register B Shift Control"] +pub type AregbscR = crate::FieldReader; +impl AregbscR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(AREGBSC_A::NOSHIFT), - 1 => Some(AREGBSC_A::SHIFTLEFT), - 2 => Some(AREGBSC_A::SHIFTRIGHT), + 0 => Some(Aregbsc::Noshift), + 1 => Some(Aregbsc::Shiftleft), + 2 => Some(Aregbsc::Shiftright), _ => None, } } - #[doc = "Checks if the value of the field is `NOSHIFT`"] + #[doc = "No Shift operation on Animation Register B"] #[inline(always)] pub fn is_noshift(&self) -> bool { - *self == AREGBSC_A::NOSHIFT + *self == Aregbsc::Noshift } - #[doc = "Checks if the value of the field is `SHIFTLEFT`"] + #[doc = "Animation Register B is shifted left"] #[inline(always)] pub fn is_shiftleft(&self) -> bool { - *self == AREGBSC_A::SHIFTLEFT + *self == Aregbsc::Shiftleft } - #[doc = "Checks if the value of the field is `SHIFTRIGHT`"] + #[doc = "Animation Register B is shifted right"] #[inline(always)] pub fn is_shiftright(&self) -> bool { - *self == AREGBSC_A::SHIFTRIGHT + *self == Aregbsc::Shiftright } } #[doc = "Field `AREGBSC` writer - Animate Register B Shift Control"] -pub type AREGBSC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BACTRL_SPEC, u8, AREGBSC_A, 2, O>; -impl<'a, const O: u8> AREGBSC_W<'a, O> { +pub type AregbscW<'a, REG> = crate::FieldWriter<'a, REG, 2, Aregbsc>; +impl<'a, REG> AregbscW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No Shift operation on Animation Register B"] #[inline(always)] - pub fn noshift(self) -> &'a mut W { - self.variant(AREGBSC_A::NOSHIFT) + pub fn noshift(self) -> &'a mut crate::W { + self.variant(Aregbsc::Noshift) } #[doc = "Animation Register B is shifted left"] #[inline(always)] - pub fn shiftleft(self) -> &'a mut W { - self.variant(AREGBSC_A::SHIFTLEFT) + pub fn shiftleft(self) -> &'a mut crate::W { + self.variant(Aregbsc::Shiftleft) } #[doc = "Animation Register B is shifted right"] #[inline(always)] - pub fn shiftright(self) -> &'a mut W { - self.variant(AREGBSC_A::SHIFTRIGHT) + pub fn shiftright(self) -> &'a mut crate::W { + self.variant(Aregbsc::Shiftright) } } -#[doc = "Field `ALOGSEL` reader - Animate Logic Function Select"] -pub type ALOGSEL_R = crate::BitReader; #[doc = "Animate Logic Function Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ALOGSEL_A { +pub enum Alogsel { #[doc = "0: AREGA and AREGB AND'ed"] - AND = 0, + And = 0, #[doc = "1: AREGA and AREGB OR'ed"] - OR = 1, + Or = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ALOGSEL_A) -> Self { + fn from(variant: Alogsel) -> Self { variant as u8 != 0 } } -impl ALOGSEL_R { +#[doc = "Field `ALOGSEL` reader - Animate Logic Function Select"] +pub type AlogselR = crate::BitReader; +impl AlogselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ALOGSEL_A { + pub const fn variant(&self) -> Alogsel { match self.bits { - false => ALOGSEL_A::AND, - true => ALOGSEL_A::OR, + false => Alogsel::And, + true => Alogsel::Or, } } - #[doc = "Checks if the value of the field is `AND`"] + #[doc = "AREGA and AREGB AND'ed"] #[inline(always)] pub fn is_and(&self) -> bool { - *self == ALOGSEL_A::AND + *self == Alogsel::And } - #[doc = "Checks if the value of the field is `OR`"] + #[doc = "AREGA and AREGB OR'ed"] #[inline(always)] pub fn is_or(&self) -> bool { - *self == ALOGSEL_A::OR + *self == Alogsel::Or } } #[doc = "Field `ALOGSEL` writer - Animate Logic Function Select"] -pub type ALOGSEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, BACTRL_SPEC, ALOGSEL_A, O>; -impl<'a, const O: u8> ALOGSEL_W<'a, O> { +pub type AlogselW<'a, REG> = crate::BitWriter<'a, REG, Alogsel>; +impl<'a, REG> AlogselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "AREGA and AREGB AND'ed"] #[inline(always)] - pub fn and(self) -> &'a mut W { - self.variant(ALOGSEL_A::AND) + pub fn and(self) -> &'a mut crate::W { + self.variant(Alogsel::And) } #[doc = "AREGA and AREGB OR'ed"] #[inline(always)] - pub fn or(self) -> &'a mut W { - self.variant(ALOGSEL_A::OR) + pub fn or(self) -> &'a mut crate::W { + self.variant(Alogsel::Or) } } #[doc = "Field `FCEN` reader - Frame Counter Enable"] -pub type FCEN_R = crate::BitReader; +pub type FcenR = crate::BitReader; #[doc = "Field `FCEN` writer - Frame Counter Enable"] -pub type FCEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, BACTRL_SPEC, bool, O>; -#[doc = "Field `DISPLAYCNTEN` reader - Display Counter Enable"] -pub type DISPLAYCNTEN_R = crate::BitReader; +pub type FcenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Display Counter Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DISPLAYCNTEN_A { +pub enum Displaycnten { #[doc = "0: Disable the display counter"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enable the display counter"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DISPLAYCNTEN_A) -> Self { + fn from(variant: Displaycnten) -> Self { variant as u8 != 0 } } -impl DISPLAYCNTEN_R { +#[doc = "Field `DISPLAYCNTEN` reader - Display Counter Enable"] +pub type DisplaycntenR = crate::BitReader; +impl DisplaycntenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DISPLAYCNTEN_A { + pub const fn variant(&self) -> Displaycnten { match self.bits { - false => DISPLAYCNTEN_A::DISABLE, - true => DISPLAYCNTEN_A::ENABLE, + false => Displaycnten::Disable, + true => Displaycnten::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable the display counter"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == DISPLAYCNTEN_A::DISABLE + *self == Displaycnten::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enable the display counter"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == DISPLAYCNTEN_A::ENABLE + *self == Displaycnten::Enable } } #[doc = "Field `DISPLAYCNTEN` writer - Display Counter Enable"] -pub type DISPLAYCNTEN_W<'a, const O: u8> = - crate::BitWriter<'a, u32, BACTRL_SPEC, DISPLAYCNTEN_A, O>; -impl<'a, const O: u8> DISPLAYCNTEN_W<'a, O> { +pub type DisplaycntenW<'a, REG> = crate::BitWriter<'a, REG, Displaycnten>; +impl<'a, REG> DisplaycntenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable the display counter"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(DISPLAYCNTEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Displaycnten::Disable) } #[doc = "Enable the display counter"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(DISPLAYCNTEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Displaycnten::Enable) } } -#[doc = "Field `ALOC` reader - Animation Location"] -pub type ALOC_R = crate::BitReader; #[doc = "Animation Location\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ALOC_A { +pub enum Aloc { #[doc = "0: Animation appears on segments 0 to 7"] - SEG0TO7 = 0, + Seg0to7 = 0, #[doc = "1: Animation appears on segments 8 to 15"] - SEG8TO15 = 1, + Seg8to15 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ALOC_A) -> Self { + fn from(variant: Aloc) -> Self { variant as u8 != 0 } } -impl ALOC_R { +#[doc = "Field `ALOC` reader - Animation Location"] +pub type AlocR = crate::BitReader; +impl AlocR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ALOC_A { + pub const fn variant(&self) -> Aloc { match self.bits { - false => ALOC_A::SEG0TO7, - true => ALOC_A::SEG8TO15, + false => Aloc::Seg0to7, + true => Aloc::Seg8to15, } } - #[doc = "Checks if the value of the field is `SEG0TO7`"] + #[doc = "Animation appears on segments 0 to 7"] #[inline(always)] pub fn is_seg0to7(&self) -> bool { - *self == ALOC_A::SEG0TO7 + *self == Aloc::Seg0to7 } - #[doc = "Checks if the value of the field is `SEG8TO15`"] + #[doc = "Animation appears on segments 8 to 15"] #[inline(always)] pub fn is_seg8to15(&self) -> bool { - *self == ALOC_A::SEG8TO15 + *self == Aloc::Seg8to15 } } #[doc = "Field `ALOC` writer - Animation Location"] -pub type ALOC_W<'a, const O: u8> = crate::BitWriter<'a, u32, BACTRL_SPEC, ALOC_A, O>; -impl<'a, const O: u8> ALOC_W<'a, O> { +pub type AlocW<'a, REG> = crate::BitWriter<'a, REG, Aloc>; +impl<'a, REG> AlocW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Animation appears on segments 0 to 7"] #[inline(always)] - pub fn seg0to7(self) -> &'a mut W { - self.variant(ALOC_A::SEG0TO7) + pub fn seg0to7(self) -> &'a mut crate::W { + self.variant(Aloc::Seg0to7) } #[doc = "Animation appears on segments 8 to 15"] #[inline(always)] - pub fn seg8to15(self) -> &'a mut W { - self.variant(ALOC_A::SEG8TO15) + pub fn seg8to15(self) -> &'a mut crate::W { + self.variant(Aloc::Seg8to15) } } impl R { #[doc = "Bit 0 - Blink Enable"] #[inline(always)] - pub fn blinken(&self) -> BLINKEN_R { - BLINKEN_R::new((self.bits & 1) != 0) + pub fn blinken(&self) -> BlinkenR { + BlinkenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Blank Display"] #[inline(always)] - pub fn blank(&self) -> BLANK_R { - BLANK_R::new(((self.bits >> 1) & 1) != 0) + pub fn blank(&self) -> BlankR { + BlankR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Animation Enable"] #[inline(always)] - pub fn aen(&self) -> AEN_R { - AEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn aen(&self) -> AenR { + AenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 3:4 - Animate Register A Shift Control"] #[inline(always)] - pub fn aregasc(&self) -> AREGASC_R { - AREGASC_R::new(((self.bits >> 3) & 3) as u8) + pub fn aregasc(&self) -> AregascR { + AregascR::new(((self.bits >> 3) & 3) as u8) } #[doc = "Bits 5:6 - Animate Register B Shift Control"] #[inline(always)] - pub fn aregbsc(&self) -> AREGBSC_R { - AREGBSC_R::new(((self.bits >> 5) & 3) as u8) + pub fn aregbsc(&self) -> AregbscR { + AregbscR::new(((self.bits >> 5) & 3) as u8) } #[doc = "Bit 7 - Animate Logic Function Select"] #[inline(always)] - pub fn alogsel(&self) -> ALOGSEL_R { - ALOGSEL_R::new(((self.bits >> 7) & 1) != 0) + pub fn alogsel(&self) -> AlogselR { + AlogselR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Frame Counter Enable"] #[inline(always)] - pub fn fcen(&self) -> FCEN_R { - FCEN_R::new(((self.bits >> 8) & 1) != 0) + pub fn fcen(&self) -> FcenR { + FcenR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Display Counter Enable"] #[inline(always)] - pub fn displaycnten(&self) -> DISPLAYCNTEN_R { - DISPLAYCNTEN_R::new(((self.bits >> 9) & 1) != 0) + pub fn displaycnten(&self) -> DisplaycntenR { + DisplaycntenR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 28 - Animation Location"] #[inline(always)] - pub fn aloc(&self) -> ALOC_R { - ALOC_R::new(((self.bits >> 28) & 1) != 0) + pub fn aloc(&self) -> AlocR { + AlocR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bit 0 - Blink Enable"] #[inline(always)] #[must_use] - pub fn blinken(&mut self) -> BLINKEN_W<0> { - BLINKEN_W::new(self) + pub fn blinken(&mut self) -> BlinkenW { + BlinkenW::new(self, 0) } #[doc = "Bit 1 - Blank Display"] #[inline(always)] #[must_use] - pub fn blank(&mut self) -> BLANK_W<1> { - BLANK_W::new(self) + pub fn blank(&mut self) -> BlankW { + BlankW::new(self, 1) } #[doc = "Bit 2 - Animation Enable"] #[inline(always)] #[must_use] - pub fn aen(&mut self) -> AEN_W<2> { - AEN_W::new(self) + pub fn aen(&mut self) -> AenW { + AenW::new(self, 2) } #[doc = "Bits 3:4 - Animate Register A Shift Control"] #[inline(always)] #[must_use] - pub fn aregasc(&mut self) -> AREGASC_W<3> { - AREGASC_W::new(self) + pub fn aregasc(&mut self) -> AregascW { + AregascW::new(self, 3) } #[doc = "Bits 5:6 - Animate Register B Shift Control"] #[inline(always)] #[must_use] - pub fn aregbsc(&mut self) -> AREGBSC_W<5> { - AREGBSC_W::new(self) + pub fn aregbsc(&mut self) -> AregbscW { + AregbscW::new(self, 5) } #[doc = "Bit 7 - Animate Logic Function Select"] #[inline(always)] #[must_use] - pub fn alogsel(&mut self) -> ALOGSEL_W<7> { - ALOGSEL_W::new(self) + pub fn alogsel(&mut self) -> AlogselW { + AlogselW::new(self, 7) } #[doc = "Bit 8 - Frame Counter Enable"] #[inline(always)] #[must_use] - pub fn fcen(&mut self) -> FCEN_W<8> { - FCEN_W::new(self) + pub fn fcen(&mut self) -> FcenW { + FcenW::new(self, 8) } #[doc = "Bit 9 - Display Counter Enable"] #[inline(always)] #[must_use] - pub fn displaycnten(&mut self) -> DISPLAYCNTEN_W<9> { - DISPLAYCNTEN_W::new(self) + pub fn displaycnten(&mut self) -> DisplaycntenW { + DisplaycntenW::new(self, 9) } #[doc = "Bit 28 - Animation Location"] #[inline(always)] #[must_use] - pub fn aloc(&mut self) -> ALOC_W<28> { - ALOC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn aloc(&mut self) -> AlocW { + AlocW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bactrl](index.html) module"] -pub struct BACTRL_SPEC; -impl crate::RegisterSpec for BACTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bactrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bactrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct BactrlSpec; +impl crate::RegisterSpec for BactrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [bactrl::R](R) reader structure"] -impl crate::Readable for BACTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [bactrl::W](W) writer structure"] -impl crate::Writable for BACTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`bactrl::R`](R) reader structure"] +impl crate::Readable for BactrlSpec {} +#[doc = "`write(|w| ..)` method takes [`bactrl::W`](W) writer structure"] +impl crate::Writable for BactrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BACTRL to value 0"] -impl crate::Resettable for BACTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for BactrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/biasctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/biasctrl.rs index 9c3df34..26f063c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/biasctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/biasctrl.rs @@ -1,387 +1,364 @@ #[doc = "Register `BIASCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `BIASCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RESISTOR` reader - Resistor strength"] -pub type RESISTOR_R = crate::FieldReader; +pub type ResistorR = crate::FieldReader; #[doc = "Field `RESISTOR` writer - Resistor strength"] -pub type RESISTOR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BIASCTRL_SPEC, u8, u8, 4, O>; +pub type ResistorW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `BUFDRV` reader - Buffer Drive Strength"] -pub type BUFDRV_R = crate::FieldReader; +pub type BufdrvR = crate::FieldReader; #[doc = "Field `BUFDRV` writer - Buffer Drive Strength"] -pub type BUFDRV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BIASCTRL_SPEC, u8, u8, 3, O>; +pub type BufdrvW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `BUFBIAS` reader - Buffer Bias Setting"] -pub type BUFBIAS_R = crate::FieldReader; +pub type BufbiasR = crate::FieldReader; #[doc = "Field `BUFBIAS` writer - Buffer Bias Setting"] -pub type BUFBIAS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BIASCTRL_SPEC, u8, u8, 2, O>; -#[doc = "Field `MODE` reader - Mode Setting"] -pub type MODE_R = crate::BitReader; +pub type BufbiasW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Mode Setting\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Use step down control with VLCD less than VDDX. Use VLCD\\[4:0\\] to control VLCD level, and use SPEED to adjust VLCD drive strength."] - STEPDOWN = 0, + Stepdown = 0, #[doc = "1: Use the charge pump to pump VLCD above VDDX."] - CHARGEPUMP = 1, + Chargepump = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as u8 != 0 } } -impl MODE_R { +#[doc = "Field `MODE` reader - Mode Setting"] +pub type ModeR = crate::BitReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - false => MODE_A::STEPDOWN, - true => MODE_A::CHARGEPUMP, + false => Mode::Stepdown, + true => Mode::Chargepump, } } - #[doc = "Checks if the value of the field is `STEPDOWN`"] + #[doc = "Use step down control with VLCD less than VDDX. Use VLCD\\[4:0\\] +to control VLCD level, and use SPEED to adjust VLCD drive strength."] #[inline(always)] pub fn is_stepdown(&self) -> bool { - *self == MODE_A::STEPDOWN + *self == Mode::Stepdown } - #[doc = "Checks if the value of the field is `CHARGEPUMP`"] + #[doc = "Use the charge pump to pump VLCD above VDDX."] #[inline(always)] pub fn is_chargepump(&self) -> bool { - *self == MODE_A::CHARGEPUMP + *self == Mode::Chargepump } } #[doc = "Field `MODE` writer - Mode Setting"] -pub type MODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, BIASCTRL_SPEC, MODE_A, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::BitWriter<'a, REG, Mode>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use step down control with VLCD less than VDDX. Use VLCD\\[4:0\\] to control VLCD level, and use SPEED to adjust VLCD drive strength."] #[inline(always)] - pub fn stepdown(self) -> &'a mut W { - self.variant(MODE_A::STEPDOWN) + pub fn stepdown(self) -> &'a mut crate::W { + self.variant(Mode::Stepdown) } #[doc = "Use the charge pump to pump VLCD above VDDX."] #[inline(always)] - pub fn chargepump(self) -> &'a mut W { - self.variant(MODE_A::CHARGEPUMP) + pub fn chargepump(self) -> &'a mut crate::W { + self.variant(Mode::Chargepump) } } #[doc = "Field `VLCD` reader - VLCD voltage level"] -pub type VLCD_R = crate::FieldReader; +pub type VlcdR = crate::FieldReader; #[doc = "Field `VLCD` writer - VLCD voltage level"] -pub type VLCD_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BIASCTRL_SPEC, u8, u8, 5, O>; -#[doc = "Field `VDDXSEL` reader - VDDX select"] -pub type VDDXSEL_R = crate::BitReader; +pub type VlcdW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "VDDX select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VDDXSEL_A { +pub enum Vddxsel { #[doc = "0: Connect charge pump to digital DVDD supply"] - DVDD = 0, + Dvdd = 0, #[doc = "1: Connect charge pump to analog AVDD supply"] - AVDD = 1, + Avdd = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VDDXSEL_A) -> Self { + fn from(variant: Vddxsel) -> Self { variant as u8 != 0 } } -impl VDDXSEL_R { +#[doc = "Field `VDDXSEL` reader - VDDX select"] +pub type VddxselR = crate::BitReader; +impl VddxselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> VDDXSEL_A { + pub const fn variant(&self) -> Vddxsel { match self.bits { - false => VDDXSEL_A::DVDD, - true => VDDXSEL_A::AVDD, + false => Vddxsel::Dvdd, + true => Vddxsel::Avdd, } } - #[doc = "Checks if the value of the field is `DVDD`"] + #[doc = "Connect charge pump to digital DVDD supply"] #[inline(always)] pub fn is_dvdd(&self) -> bool { - *self == VDDXSEL_A::DVDD + *self == Vddxsel::Dvdd } - #[doc = "Checks if the value of the field is `AVDD`"] + #[doc = "Connect charge pump to analog AVDD supply"] #[inline(always)] pub fn is_avdd(&self) -> bool { - *self == VDDXSEL_A::AVDD + *self == Vddxsel::Avdd } } #[doc = "Field `VDDXSEL` writer - VDDX select"] -pub type VDDXSEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, BIASCTRL_SPEC, VDDXSEL_A, O>; -impl<'a, const O: u8> VDDXSEL_W<'a, O> { +pub type VddxselW<'a, REG> = crate::BitWriter<'a, REG, Vddxsel>; +impl<'a, REG> VddxselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Connect charge pump to digital DVDD supply"] #[inline(always)] - pub fn dvdd(self) -> &'a mut W { - self.variant(VDDXSEL_A::DVDD) + pub fn dvdd(self) -> &'a mut crate::W { + self.variant(Vddxsel::Dvdd) } #[doc = "Connect charge pump to analog AVDD supply"] #[inline(always)] - pub fn avdd(self) -> &'a mut W { - self.variant(VDDXSEL_A::AVDD) + pub fn avdd(self) -> &'a mut crate::W { + self.variant(Vddxsel::Avdd) } } -#[doc = "Field `LCDGATE` reader - LCD Gate"] -pub type LCDGATE_R = crate::BitReader; #[doc = "LCD Gate\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LCDGATE_A { +pub enum Lcdgate { #[doc = "0: LCD BIAS voltages driven onto pins."] - UNGATE = 0, + Ungate = 0, #[doc = "1: LCD BIAS MUX tristated at the pins."] - GATE = 1, + Gate = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LCDGATE_A) -> Self { + fn from(variant: Lcdgate) -> Self { variant as u8 != 0 } } -impl LCDGATE_R { +#[doc = "Field `LCDGATE` reader - LCD Gate"] +pub type LcdgateR = crate::BitReader; +impl LcdgateR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LCDGATE_A { + pub const fn variant(&self) -> Lcdgate { match self.bits { - false => LCDGATE_A::UNGATE, - true => LCDGATE_A::GATE, + false => Lcdgate::Ungate, + true => Lcdgate::Gate, } } - #[doc = "Checks if the value of the field is `UNGATE`"] + #[doc = "LCD BIAS voltages driven onto pins."] #[inline(always)] pub fn is_ungate(&self) -> bool { - *self == LCDGATE_A::UNGATE + *self == Lcdgate::Ungate } - #[doc = "Checks if the value of the field is `GATE`"] + #[doc = "LCD BIAS MUX tristated at the pins."] #[inline(always)] pub fn is_gate(&self) -> bool { - *self == LCDGATE_A::GATE + *self == Lcdgate::Gate } } #[doc = "Field `LCDGATE` writer - LCD Gate"] -pub type LCDGATE_W<'a, const O: u8> = crate::BitWriter<'a, u32, BIASCTRL_SPEC, LCDGATE_A, O>; -impl<'a, const O: u8> LCDGATE_W<'a, O> { +pub type LcdgateW<'a, REG> = crate::BitWriter<'a, REG, Lcdgate>; +impl<'a, REG> LcdgateW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "LCD BIAS voltages driven onto pins."] #[inline(always)] - pub fn ungate(self) -> &'a mut W { - self.variant(LCDGATE_A::UNGATE) + pub fn ungate(self) -> &'a mut crate::W { + self.variant(Lcdgate::Ungate) } #[doc = "LCD BIAS MUX tristated at the pins."] #[inline(always)] - pub fn gate(self) -> &'a mut W { - self.variant(LCDGATE_A::GATE) + pub fn gate(self) -> &'a mut crate::W { + self.variant(Lcdgate::Gate) } } -#[doc = "Field `DMAMODE` reader - DMA Mode"] -pub type DMAMODE_R = crate::FieldReader; #[doc = "DMA Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DMAMODE_A { +pub enum Dmamode { #[doc = "0: No DMA requests are generated"] - DMADISABLE = 0, + Dmadisable = 0, #[doc = "1: DMA request on frame counter event. This will also start a DMA transfer during EM23."] - DMAFC = 1, + Dmafc = 1, #[doc = "2: DMA request on display counter event. This will also start a DMA transfer during EM23."] - DMADISPLAY = 2, + Dmadisplay = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DMAMODE_A) -> Self { + fn from(variant: Dmamode) -> Self { variant as _ } } -impl DMAMODE_R { +impl crate::FieldSpec for Dmamode { + type Ux = u8; +} +impl crate::IsEnum for Dmamode {} +#[doc = "Field `DMAMODE` reader - DMA Mode"] +pub type DmamodeR = crate::FieldReader; +impl DmamodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(DMAMODE_A::DMADISABLE), - 1 => Some(DMAMODE_A::DMAFC), - 2 => Some(DMAMODE_A::DMADISPLAY), + 0 => Some(Dmamode::Dmadisable), + 1 => Some(Dmamode::Dmafc), + 2 => Some(Dmamode::Dmadisplay), _ => None, } } - #[doc = "Checks if the value of the field is `DMADISABLE`"] + #[doc = "No DMA requests are generated"] #[inline(always)] pub fn is_dmadisable(&self) -> bool { - *self == DMAMODE_A::DMADISABLE + *self == Dmamode::Dmadisable } - #[doc = "Checks if the value of the field is `DMAFC`"] + #[doc = "DMA request on frame counter event. This will also start a DMA transfer during EM23."] #[inline(always)] pub fn is_dmafc(&self) -> bool { - *self == DMAMODE_A::DMAFC + *self == Dmamode::Dmafc } - #[doc = "Checks if the value of the field is `DMADISPLAY`"] + #[doc = "DMA request on display counter event. This will also start a DMA transfer during EM23."] #[inline(always)] pub fn is_dmadisplay(&self) -> bool { - *self == DMAMODE_A::DMADISPLAY + *self == Dmamode::Dmadisplay } } #[doc = "Field `DMAMODE` writer - DMA Mode"] -pub type DMAMODE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, BIASCTRL_SPEC, u8, DMAMODE_A, 2, O>; -impl<'a, const O: u8> DMAMODE_W<'a, O> { +pub type DmamodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dmamode>; +impl<'a, REG> DmamodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No DMA requests are generated"] #[inline(always)] - pub fn dmadisable(self) -> &'a mut W { - self.variant(DMAMODE_A::DMADISABLE) + pub fn dmadisable(self) -> &'a mut crate::W { + self.variant(Dmamode::Dmadisable) } #[doc = "DMA request on frame counter event. This will also start a DMA transfer during EM23."] #[inline(always)] - pub fn dmafc(self) -> &'a mut W { - self.variant(DMAMODE_A::DMAFC) + pub fn dmafc(self) -> &'a mut crate::W { + self.variant(Dmamode::Dmafc) } #[doc = "DMA request on display counter event. This will also start a DMA transfer during EM23."] #[inline(always)] - pub fn dmadisplay(self) -> &'a mut W { - self.variant(DMAMODE_A::DMADISPLAY) + pub fn dmadisplay(self) -> &'a mut crate::W { + self.variant(Dmamode::Dmadisplay) } } impl R { #[doc = "Bits 0:3 - Resistor strength"] #[inline(always)] - pub fn resistor(&self) -> RESISTOR_R { - RESISTOR_R::new((self.bits & 0x0f) as u8) + pub fn resistor(&self) -> ResistorR { + ResistorR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:6 - Buffer Drive Strength"] #[inline(always)] - pub fn bufdrv(&self) -> BUFDRV_R { - BUFDRV_R::new(((self.bits >> 4) & 7) as u8) + pub fn bufdrv(&self) -> BufdrvR { + BufdrvR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:9 - Buffer Bias Setting"] #[inline(always)] - pub fn bufbias(&self) -> BUFBIAS_R { - BUFBIAS_R::new(((self.bits >> 8) & 3) as u8) + pub fn bufbias(&self) -> BufbiasR { + BufbiasR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 12 - Mode Setting"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new(((self.bits >> 12) & 1) != 0) + pub fn mode(&self) -> ModeR { + ModeR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bits 16:20 - VLCD voltage level"] #[inline(always)] - pub fn vlcd(&self) -> VLCD_R { - VLCD_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn vlcd(&self) -> VlcdR { + VlcdR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bit 22 - VDDX select"] #[inline(always)] - pub fn vddxsel(&self) -> VDDXSEL_R { - VDDXSEL_R::new(((self.bits >> 22) & 1) != 0) + pub fn vddxsel(&self) -> VddxselR { + VddxselR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 26 - LCD Gate"] #[inline(always)] - pub fn lcdgate(&self) -> LCDGATE_R { - LCDGATE_R::new(((self.bits >> 26) & 1) != 0) + pub fn lcdgate(&self) -> LcdgateR { + LcdgateR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bits 30:31 - DMA Mode"] #[inline(always)] - pub fn dmamode(&self) -> DMAMODE_R { - DMAMODE_R::new(((self.bits >> 30) & 3) as u8) + pub fn dmamode(&self) -> DmamodeR { + DmamodeR::new(((self.bits >> 30) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - Resistor strength"] #[inline(always)] #[must_use] - pub fn resistor(&mut self) -> RESISTOR_W<0> { - RESISTOR_W::new(self) + pub fn resistor(&mut self) -> ResistorW { + ResistorW::new(self, 0) } #[doc = "Bits 4:6 - Buffer Drive Strength"] #[inline(always)] #[must_use] - pub fn bufdrv(&mut self) -> BUFDRV_W<4> { - BUFDRV_W::new(self) + pub fn bufdrv(&mut self) -> BufdrvW { + BufdrvW::new(self, 4) } #[doc = "Bits 8:9 - Buffer Bias Setting"] #[inline(always)] #[must_use] - pub fn bufbias(&mut self) -> BUFBIAS_W<8> { - BUFBIAS_W::new(self) + pub fn bufbias(&mut self) -> BufbiasW { + BufbiasW::new(self, 8) } #[doc = "Bit 12 - Mode Setting"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<12> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 12) } #[doc = "Bits 16:20 - VLCD voltage level"] #[inline(always)] #[must_use] - pub fn vlcd(&mut self) -> VLCD_W<16> { - VLCD_W::new(self) + pub fn vlcd(&mut self) -> VlcdW { + VlcdW::new(self, 16) } #[doc = "Bit 22 - VDDX select"] #[inline(always)] #[must_use] - pub fn vddxsel(&mut self) -> VDDXSEL_W<22> { - VDDXSEL_W::new(self) + pub fn vddxsel(&mut self) -> VddxselW { + VddxselW::new(self, 22) } #[doc = "Bit 26 - LCD Gate"] #[inline(always)] #[must_use] - pub fn lcdgate(&mut self) -> LCDGATE_W<26> { - LCDGATE_W::new(self) + pub fn lcdgate(&mut self) -> LcdgateW { + LcdgateW::new(self, 26) } #[doc = "Bits 30:31 - DMA Mode"] #[inline(always)] #[must_use] - pub fn dmamode(&mut self) -> DMAMODE_W<30> { - DMAMODE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dmamode(&mut self) -> DmamodeW { + DmamodeW::new(self, 30) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [biasctrl](index.html) module"] -pub struct BIASCTRL_SPEC; -impl crate::RegisterSpec for BIASCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`biasctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`biasctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct BiasctrlSpec; +impl crate::RegisterSpec for BiasctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [biasctrl::R](R) reader structure"] -impl crate::Readable for BIASCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [biasctrl::W](W) writer structure"] -impl crate::Writable for BIASCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`biasctrl::R`](R) reader structure"] +impl crate::Readable for BiasctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`biasctrl::W`](W) writer structure"] +impl crate::Writable for BiasctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BIASCTRL to value 0x001f_0000"] -impl crate::Resettable for BIASCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x001f_0000; +impl crate::Resettable for BiasctrlSpec { + const RESET_VALUE: u32 = 0x001f_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/cmd.rs index 5681f4a..314f692 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/cmd.rs @@ -1,60 +1,35 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOAD` writer - Load command"] -pub type LOAD_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type LoadW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEAR` writer - Clear command"] -pub type CLEAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type ClearW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Load command"] #[inline(always)] #[must_use] - pub fn load(&mut self) -> LOAD_W<0> { - LOAD_W::new(self) + pub fn load(&mut self) -> LoadW { + LoadW::new(self, 0) } #[doc = "Bit 1 - Clear command"] #[inline(always)] #[must_use] - pub fn clear(&mut self) -> CLEAR_W<1> { - CLEAR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clear(&mut self) -> ClearW { + ClearW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/ctrl.rs index 8a6f3a7..a26f481 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/ctrl.rs @@ -1,372 +1,350 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `UDCTRL` reader - Update Data Control"] -pub type UDCTRL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Update Data Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum UDCTRL_A { +pub enum Udctrl { #[doc = "0: The data transfer is controlled by SW. Transfer is performed as soon as possible on the next CTRL.PRESCALE clock. This is primarily available for debug only since only some of the new SEGMENT data may be ready by the time of the UPDATE. This should not be used with interrupts since partially updating SEGMENT data may have indeterminant results."] - REGULAR = 0, + Regular = 0, #[doc = "1: Data is loaded continuously at every frame start"] - FRAMESTART = 1, + Framestart = 1, #[doc = "2: The data transfer is done at the next Frame Counter event"] - FCEVENT = 2, + Fcevent = 2, #[doc = "3: The data transfer is done at the next Display Counter event"] - DISPLAYEVENT = 3, + Displayevent = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: UDCTRL_A) -> Self { + fn from(variant: Udctrl) -> Self { variant as _ } } -impl UDCTRL_R { +impl crate::FieldSpec for Udctrl { + type Ux = u8; +} +impl crate::IsEnum for Udctrl {} +#[doc = "Field `UDCTRL` reader - Update Data Control"] +pub type UdctrlR = crate::FieldReader; +impl UdctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> UDCTRL_A { + pub const fn variant(&self) -> Udctrl { match self.bits { - 0 => UDCTRL_A::REGULAR, - 1 => UDCTRL_A::FRAMESTART, - 2 => UDCTRL_A::FCEVENT, - 3 => UDCTRL_A::DISPLAYEVENT, + 0 => Udctrl::Regular, + 1 => Udctrl::Framestart, + 2 => Udctrl::Fcevent, + 3 => Udctrl::Displayevent, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `REGULAR`"] + #[doc = "The data transfer is controlled by SW. Transfer is performed as soon as possible on the next CTRL.PRESCALE clock. This is primarily available for debug only since only some of the new SEGMENT data may be ready by the time of the UPDATE. This should not be used with interrupts since partially updating SEGMENT data may have indeterminant results."] #[inline(always)] pub fn is_regular(&self) -> bool { - *self == UDCTRL_A::REGULAR + *self == Udctrl::Regular } - #[doc = "Checks if the value of the field is `FRAMESTART`"] + #[doc = "Data is loaded continuously at every frame start"] #[inline(always)] pub fn is_framestart(&self) -> bool { - *self == UDCTRL_A::FRAMESTART + *self == Udctrl::Framestart } - #[doc = "Checks if the value of the field is `FCEVENT`"] + #[doc = "The data transfer is done at the next Frame Counter event"] #[inline(always)] pub fn is_fcevent(&self) -> bool { - *self == UDCTRL_A::FCEVENT + *self == Udctrl::Fcevent } - #[doc = "Checks if the value of the field is `DISPLAYEVENT`"] + #[doc = "The data transfer is done at the next Display Counter event"] #[inline(always)] pub fn is_displayevent(&self) -> bool { - *self == UDCTRL_A::DISPLAYEVENT + *self == Udctrl::Displayevent } } #[doc = "Field `UDCTRL` writer - Update Data Control"] -pub type UDCTRL_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, UDCTRL_A, 2, O>; -impl<'a, const O: u8> UDCTRL_W<'a, O> { +pub type UdctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Udctrl, crate::Safe>; +impl<'a, REG> UdctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The data transfer is controlled by SW. Transfer is performed as soon as possible on the next CTRL.PRESCALE clock. This is primarily available for debug only since only some of the new SEGMENT data may be ready by the time of the UPDATE. This should not be used with interrupts since partially updating SEGMENT data may have indeterminant results."] #[inline(always)] - pub fn regular(self) -> &'a mut W { - self.variant(UDCTRL_A::REGULAR) + pub fn regular(self) -> &'a mut crate::W { + self.variant(Udctrl::Regular) } #[doc = "Data is loaded continuously at every frame start"] #[inline(always)] - pub fn framestart(self) -> &'a mut W { - self.variant(UDCTRL_A::FRAMESTART) + pub fn framestart(self) -> &'a mut crate::W { + self.variant(Udctrl::Framestart) } #[doc = "The data transfer is done at the next Frame Counter event"] #[inline(always)] - pub fn fcevent(self) -> &'a mut W { - self.variant(UDCTRL_A::FCEVENT) + pub fn fcevent(self) -> &'a mut crate::W { + self.variant(Udctrl::Fcevent) } #[doc = "The data transfer is done at the next Display Counter event"] #[inline(always)] - pub fn displayevent(self) -> &'a mut W { - self.variant(UDCTRL_A::DISPLAYEVENT) + pub fn displayevent(self) -> &'a mut crate::W { + self.variant(Udctrl::Displayevent) } } -#[doc = "Field `DSC` reader - Direct Segment Control"] -pub type DSC_R = crate::BitReader; #[doc = "Direct Segment Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSC_A { +pub enum Dsc { #[doc = "0: DSC disable"] - DISABLE = 0, + Disable = 0, #[doc = "1: DSC enable"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSC_A) -> Self { + fn from(variant: Dsc) -> Self { variant as u8 != 0 } } -impl DSC_R { +#[doc = "Field `DSC` reader - Direct Segment Control"] +pub type DscR = crate::BitReader; +impl DscR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSC_A { + pub const fn variant(&self) -> Dsc { match self.bits { - false => DSC_A::DISABLE, - true => DSC_A::ENABLE, + false => Dsc::Disable, + true => Dsc::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "DSC disable"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == DSC_A::DISABLE + *self == Dsc::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "DSC enable"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == DSC_A::ENABLE + *self == Dsc::Enable } } #[doc = "Field `DSC` writer - Direct Segment Control"] -pub type DSC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, DSC_A, O>; -impl<'a, const O: u8> DSC_W<'a, O> { +pub type DscW<'a, REG> = crate::BitWriter<'a, REG, Dsc>; +impl<'a, REG> DscW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "DSC disable"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(DSC_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Dsc::Disable) } #[doc = "DSC enable"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(DSC_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Dsc::Enable) } } -#[doc = "Field `WARMUPDLY` reader - Warmup Delay"] -pub type WARMUPDLY_R = crate::FieldReader; #[doc = "Warmup Delay\n\nValue on reset: 4"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WARMUPDLY_A { +pub enum Warmupdly { #[doc = "0: 1mswarm up"] - WARMUP1 = 0, + Warmup1 = 0, #[doc = "1: 31ms warm up"] - WARMUP31 = 1, + Warmup31 = 1, #[doc = "2: 62ms warm up"] - WARMUP63 = 2, + Warmup63 = 2, #[doc = "3: 125ms warm up"] - WARMUP125 = 3, + Warmup125 = 3, #[doc = "4: 250ms warm up"] - WARMUP250 = 4, + Warmup250 = 4, #[doc = "5: 500ms warm up"] - WARMUP500 = 5, + Warmup500 = 5, #[doc = "6: 1000ms warm up"] - WARMUP1000 = 6, + Warmup1000 = 6, #[doc = "7: 2000ms warm up"] - WARMUP2000 = 7, + Warmup2000 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WARMUPDLY_A) -> Self { + fn from(variant: Warmupdly) -> Self { variant as _ } } -impl WARMUPDLY_R { +impl crate::FieldSpec for Warmupdly { + type Ux = u8; +} +impl crate::IsEnum for Warmupdly {} +#[doc = "Field `WARMUPDLY` reader - Warmup Delay"] +pub type WarmupdlyR = crate::FieldReader; +impl WarmupdlyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> WARMUPDLY_A { + pub const fn variant(&self) -> Warmupdly { match self.bits { - 0 => WARMUPDLY_A::WARMUP1, - 1 => WARMUPDLY_A::WARMUP31, - 2 => WARMUPDLY_A::WARMUP63, - 3 => WARMUPDLY_A::WARMUP125, - 4 => WARMUPDLY_A::WARMUP250, - 5 => WARMUPDLY_A::WARMUP500, - 6 => WARMUPDLY_A::WARMUP1000, - 7 => WARMUPDLY_A::WARMUP2000, + 0 => Warmupdly::Warmup1, + 1 => Warmupdly::Warmup31, + 2 => Warmupdly::Warmup63, + 3 => Warmupdly::Warmup125, + 4 => Warmupdly::Warmup250, + 5 => Warmupdly::Warmup500, + 6 => Warmupdly::Warmup1000, + 7 => Warmupdly::Warmup2000, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `WARMUP1`"] + #[doc = "1mswarm up"] #[inline(always)] pub fn is_warmup1(&self) -> bool { - *self == WARMUPDLY_A::WARMUP1 + *self == Warmupdly::Warmup1 } - #[doc = "Checks if the value of the field is `WARMUP31`"] + #[doc = "31ms warm up"] #[inline(always)] pub fn is_warmup31(&self) -> bool { - *self == WARMUPDLY_A::WARMUP31 + *self == Warmupdly::Warmup31 } - #[doc = "Checks if the value of the field is `WARMUP63`"] + #[doc = "62ms warm up"] #[inline(always)] pub fn is_warmup63(&self) -> bool { - *self == WARMUPDLY_A::WARMUP63 + *self == Warmupdly::Warmup63 } - #[doc = "Checks if the value of the field is `WARMUP125`"] + #[doc = "125ms warm up"] #[inline(always)] pub fn is_warmup125(&self) -> bool { - *self == WARMUPDLY_A::WARMUP125 + *self == Warmupdly::Warmup125 } - #[doc = "Checks if the value of the field is `WARMUP250`"] + #[doc = "250ms warm up"] #[inline(always)] pub fn is_warmup250(&self) -> bool { - *self == WARMUPDLY_A::WARMUP250 + *self == Warmupdly::Warmup250 } - #[doc = "Checks if the value of the field is `WARMUP500`"] + #[doc = "500ms warm up"] #[inline(always)] pub fn is_warmup500(&self) -> bool { - *self == WARMUPDLY_A::WARMUP500 + *self == Warmupdly::Warmup500 } - #[doc = "Checks if the value of the field is `WARMUP1000`"] + #[doc = "1000ms warm up"] #[inline(always)] pub fn is_warmup1000(&self) -> bool { - *self == WARMUPDLY_A::WARMUP1000 + *self == Warmupdly::Warmup1000 } - #[doc = "Checks if the value of the field is `WARMUP2000`"] + #[doc = "2000ms warm up"] #[inline(always)] pub fn is_warmup2000(&self) -> bool { - *self == WARMUPDLY_A::WARMUP2000 + *self == Warmupdly::Warmup2000 } } #[doc = "Field `WARMUPDLY` writer - Warmup Delay"] -pub type WARMUPDLY_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, WARMUPDLY_A, 3, O>; -impl<'a, const O: u8> WARMUPDLY_W<'a, O> { +pub type WarmupdlyW<'a, REG> = crate::FieldWriter<'a, REG, 3, Warmupdly, crate::Safe>; +impl<'a, REG> WarmupdlyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "1mswarm up"] #[inline(always)] - pub fn warmup1(self) -> &'a mut W { - self.variant(WARMUPDLY_A::WARMUP1) + pub fn warmup1(self) -> &'a mut crate::W { + self.variant(Warmupdly::Warmup1) } #[doc = "31ms warm up"] #[inline(always)] - pub fn warmup31(self) -> &'a mut W { - self.variant(WARMUPDLY_A::WARMUP31) + pub fn warmup31(self) -> &'a mut crate::W { + self.variant(Warmupdly::Warmup31) } #[doc = "62ms warm up"] #[inline(always)] - pub fn warmup63(self) -> &'a mut W { - self.variant(WARMUPDLY_A::WARMUP63) + pub fn warmup63(self) -> &'a mut crate::W { + self.variant(Warmupdly::Warmup63) } #[doc = "125ms warm up"] #[inline(always)] - pub fn warmup125(self) -> &'a mut W { - self.variant(WARMUPDLY_A::WARMUP125) + pub fn warmup125(self) -> &'a mut crate::W { + self.variant(Warmupdly::Warmup125) } #[doc = "250ms warm up"] #[inline(always)] - pub fn warmup250(self) -> &'a mut W { - self.variant(WARMUPDLY_A::WARMUP250) + pub fn warmup250(self) -> &'a mut crate::W { + self.variant(Warmupdly::Warmup250) } #[doc = "500ms warm up"] #[inline(always)] - pub fn warmup500(self) -> &'a mut W { - self.variant(WARMUPDLY_A::WARMUP500) + pub fn warmup500(self) -> &'a mut crate::W { + self.variant(Warmupdly::Warmup500) } #[doc = "1000ms warm up"] #[inline(always)] - pub fn warmup1000(self) -> &'a mut W { - self.variant(WARMUPDLY_A::WARMUP1000) + pub fn warmup1000(self) -> &'a mut crate::W { + self.variant(Warmupdly::Warmup1000) } #[doc = "2000ms warm up"] #[inline(always)] - pub fn warmup2000(self) -> &'a mut W { - self.variant(WARMUPDLY_A::WARMUP2000) + pub fn warmup2000(self) -> &'a mut crate::W { + self.variant(Warmupdly::Warmup2000) } } #[doc = "Field `PRESCALE` reader - Presclae"] -pub type PRESCALE_R = crate::FieldReader; +pub type PrescaleR = crate::FieldReader; #[doc = "Field `PRESCALE` writer - Presclae"] -pub type PRESCALE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, u8, 7, O>; +pub type PrescaleW<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { #[doc = "Bits 1:2 - Update Data Control"] #[inline(always)] - pub fn udctrl(&self) -> UDCTRL_R { - UDCTRL_R::new(((self.bits >> 1) & 3) as u8) + pub fn udctrl(&self) -> UdctrlR { + UdctrlR::new(((self.bits >> 1) & 3) as u8) } #[doc = "Bit 16 - Direct Segment Control"] #[inline(always)] - pub fn dsc(&self) -> DSC_R { - DSC_R::new(((self.bits >> 16) & 1) != 0) + pub fn dsc(&self) -> DscR { + DscR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bits 18:20 - Warmup Delay"] #[inline(always)] - pub fn warmupdly(&self) -> WARMUPDLY_R { - WARMUPDLY_R::new(((self.bits >> 18) & 7) as u8) + pub fn warmupdly(&self) -> WarmupdlyR { + WarmupdlyR::new(((self.bits >> 18) & 7) as u8) } #[doc = "Bits 24:30 - Presclae"] #[inline(always)] - pub fn prescale(&self) -> PRESCALE_R { - PRESCALE_R::new(((self.bits >> 24) & 0x7f) as u8) + pub fn prescale(&self) -> PrescaleR { + PrescaleR::new(((self.bits >> 24) & 0x7f) as u8) } } impl W { #[doc = "Bits 1:2 - Update Data Control"] #[inline(always)] #[must_use] - pub fn udctrl(&mut self) -> UDCTRL_W<1> { - UDCTRL_W::new(self) + pub fn udctrl(&mut self) -> UdctrlW { + UdctrlW::new(self, 1) } #[doc = "Bit 16 - Direct Segment Control"] #[inline(always)] #[must_use] - pub fn dsc(&mut self) -> DSC_W<16> { - DSC_W::new(self) + pub fn dsc(&mut self) -> DscW { + DscW::new(self, 16) } #[doc = "Bits 18:20 - Warmup Delay"] #[inline(always)] #[must_use] - pub fn warmupdly(&mut self) -> WARMUPDLY_W<18> { - WARMUPDLY_W::new(self) + pub fn warmupdly(&mut self) -> WarmupdlyW { + WarmupdlyW::new(self, 18) } #[doc = "Bits 24:30 - Presclae"] #[inline(always)] #[must_use] - pub fn prescale(&mut self) -> PRESCALE_W<24> { - PRESCALE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prescale(&mut self) -> PrescaleW { + PrescaleW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0x0010_0000"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0010_0000; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0x0010_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/dispctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/dispctrl.rs index 586b0b4..27bdc3d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/dispctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/dispctrl.rs @@ -1,407 +1,393 @@ #[doc = "Register `DISPCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DISPCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MUX` reader - Mux Configuration"] -pub type MUX_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Mux Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MUX_A { +pub enum Mux { #[doc = "0: Static"] - STATIC = 0, + Static = 0, #[doc = "1: Duplex"] - DUPLEX = 1, + Duplex = 1, #[doc = "2: Triplex"] - TRIPLEX = 2, + Triplex = 2, #[doc = "3: Quadruplex"] - QUADRUPLEX = 3, + Quadruplex = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MUX_A) -> Self { + fn from(variant: Mux) -> Self { variant as _ } } -impl MUX_R { +impl crate::FieldSpec for Mux { + type Ux = u8; +} +impl crate::IsEnum for Mux {} +#[doc = "Field `MUX` reader - Mux Configuration"] +pub type MuxR = crate::FieldReader; +impl MuxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(MUX_A::STATIC), - 1 => Some(MUX_A::DUPLEX), - 2 => Some(MUX_A::TRIPLEX), - 3 => Some(MUX_A::QUADRUPLEX), + 0 => Some(Mux::Static), + 1 => Some(Mux::Duplex), + 2 => Some(Mux::Triplex), + 3 => Some(Mux::Quadruplex), _ => None, } } - #[doc = "Checks if the value of the field is `STATIC`"] + #[doc = "Static"] #[inline(always)] pub fn is_static(&self) -> bool { - *self == MUX_A::STATIC + *self == Mux::Static } - #[doc = "Checks if the value of the field is `DUPLEX`"] + #[doc = "Duplex"] #[inline(always)] pub fn is_duplex(&self) -> bool { - *self == MUX_A::DUPLEX + *self == Mux::Duplex } - #[doc = "Checks if the value of the field is `TRIPLEX`"] + #[doc = "Triplex"] #[inline(always)] pub fn is_triplex(&self) -> bool { - *self == MUX_A::TRIPLEX + *self == Mux::Triplex } - #[doc = "Checks if the value of the field is `QUADRUPLEX`"] + #[doc = "Quadruplex"] #[inline(always)] pub fn is_quadruplex(&self) -> bool { - *self == MUX_A::QUADRUPLEX + *self == Mux::Quadruplex } } #[doc = "Field `MUX` writer - Mux Configuration"] -pub type MUX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DISPCTRL_SPEC, u8, MUX_A, 3, O>; -impl<'a, const O: u8> MUX_W<'a, O> { +pub type MuxW<'a, REG> = crate::FieldWriter<'a, REG, 3, Mux>; +impl<'a, REG> MuxW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Static"] #[inline(always)] - pub fn static_(self) -> &'a mut W { - self.variant(MUX_A::STATIC) + pub fn static_(self) -> &'a mut crate::W { + self.variant(Mux::Static) } #[doc = "Duplex"] #[inline(always)] - pub fn duplex(self) -> &'a mut W { - self.variant(MUX_A::DUPLEX) + pub fn duplex(self) -> &'a mut crate::W { + self.variant(Mux::Duplex) } #[doc = "Triplex"] #[inline(always)] - pub fn triplex(self) -> &'a mut W { - self.variant(MUX_A::TRIPLEX) + pub fn triplex(self) -> &'a mut crate::W { + self.variant(Mux::Triplex) } #[doc = "Quadruplex"] #[inline(always)] - pub fn quadruplex(self) -> &'a mut W { - self.variant(MUX_A::QUADRUPLEX) + pub fn quadruplex(self) -> &'a mut crate::W { + self.variant(Mux::Quadruplex) } } -#[doc = "Field `WAVE` reader - Waveform Selection"] -pub type WAVE_R = crate::BitReader; #[doc = "Waveform Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WAVE_A { +pub enum Wave { #[doc = "0: Type B waveform"] - TYPEB = 0, + Typeb = 0, #[doc = "1: Type A waveform"] - TYPEA = 1, + Typea = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WAVE_A) -> Self { + fn from(variant: Wave) -> Self { variant as u8 != 0 } } -impl WAVE_R { +#[doc = "Field `WAVE` reader - Waveform Selection"] +pub type WaveR = crate::BitReader; +impl WaveR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> WAVE_A { + pub const fn variant(&self) -> Wave { match self.bits { - false => WAVE_A::TYPEB, - true => WAVE_A::TYPEA, + false => Wave::Typeb, + true => Wave::Typea, } } - #[doc = "Checks if the value of the field is `TYPEB`"] + #[doc = "Type B waveform"] #[inline(always)] pub fn is_typeb(&self) -> bool { - *self == WAVE_A::TYPEB + *self == Wave::Typeb } - #[doc = "Checks if the value of the field is `TYPEA`"] + #[doc = "Type A waveform"] #[inline(always)] pub fn is_typea(&self) -> bool { - *self == WAVE_A::TYPEA + *self == Wave::Typea } } #[doc = "Field `WAVE` writer - Waveform Selection"] -pub type WAVE_W<'a, const O: u8> = crate::BitWriter<'a, u32, DISPCTRL_SPEC, WAVE_A, O>; -impl<'a, const O: u8> WAVE_W<'a, O> { +pub type WaveW<'a, REG> = crate::BitWriter<'a, REG, Wave>; +impl<'a, REG> WaveW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Type B waveform"] #[inline(always)] - pub fn typeb(self) -> &'a mut W { - self.variant(WAVE_A::TYPEB) + pub fn typeb(self) -> &'a mut crate::W { + self.variant(Wave::Typeb) } #[doc = "Type A waveform"] #[inline(always)] - pub fn typea(self) -> &'a mut W { - self.variant(WAVE_A::TYPEA) + pub fn typea(self) -> &'a mut crate::W { + self.variant(Wave::Typea) } } -#[doc = "Field `CHGRDST` reader - Charge Redistribution Cycles"] -pub type CHGRDST_R = crate::FieldReader; #[doc = "Charge Redistribution Cycles\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CHGRDST_A { +pub enum Chgrdst { #[doc = "0: Disable charge redistribution."] - DISABLE = 0, + Disable = 0, #[doc = "1: Use 1 prescaled low frequency clock cycle for charge redistribution."] - ONE = 1, + One = 1, #[doc = "2: Use 2 prescaled low frequency clock cycles for charge redistribution."] - TWO = 2, + Two = 2, #[doc = "3: Use 3 prescaled low frequency clock cycles for charge redistribution."] - THREE = 3, + Three = 3, #[doc = "4: Use 4 prescaled low frequency clock cycles for charge redistribution."] - FOUR = 4, + Four = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CHGRDST_A) -> Self { + fn from(variant: Chgrdst) -> Self { variant as _ } } -impl CHGRDST_R { +impl crate::FieldSpec for Chgrdst { + type Ux = u8; +} +impl crate::IsEnum for Chgrdst {} +#[doc = "Field `CHGRDST` reader - Charge Redistribution Cycles"] +pub type ChgrdstR = crate::FieldReader; +impl ChgrdstR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CHGRDST_A::DISABLE), - 1 => Some(CHGRDST_A::ONE), - 2 => Some(CHGRDST_A::TWO), - 3 => Some(CHGRDST_A::THREE), - 4 => Some(CHGRDST_A::FOUR), + 0 => Some(Chgrdst::Disable), + 1 => Some(Chgrdst::One), + 2 => Some(Chgrdst::Two), + 3 => Some(Chgrdst::Three), + 4 => Some(Chgrdst::Four), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable charge redistribution."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CHGRDST_A::DISABLE + *self == Chgrdst::Disable } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Use 1 prescaled low frequency clock cycle for charge redistribution."] #[inline(always)] pub fn is_one(&self) -> bool { - *self == CHGRDST_A::ONE + *self == Chgrdst::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Use 2 prescaled low frequency clock cycles for charge redistribution."] #[inline(always)] pub fn is_two(&self) -> bool { - *self == CHGRDST_A::TWO + *self == Chgrdst::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "Use 3 prescaled low frequency clock cycles for charge redistribution."] #[inline(always)] pub fn is_three(&self) -> bool { - *self == CHGRDST_A::THREE + *self == Chgrdst::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Use 4 prescaled low frequency clock cycles for charge redistribution."] #[inline(always)] pub fn is_four(&self) -> bool { - *self == CHGRDST_A::FOUR + *self == Chgrdst::Four } } #[doc = "Field `CHGRDST` writer - Charge Redistribution Cycles"] -pub type CHGRDST_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, DISPCTRL_SPEC, u8, CHGRDST_A, 3, O>; -impl<'a, const O: u8> CHGRDST_W<'a, O> { +pub type ChgrdstW<'a, REG> = crate::FieldWriter<'a, REG, 3, Chgrdst>; +impl<'a, REG> ChgrdstW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Disable charge redistribution."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CHGRDST_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Chgrdst::Disable) } #[doc = "Use 1 prescaled low frequency clock cycle for charge redistribution."] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(CHGRDST_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Chgrdst::One) } #[doc = "Use 2 prescaled low frequency clock cycles for charge redistribution."] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(CHGRDST_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Chgrdst::Two) } #[doc = "Use 3 prescaled low frequency clock cycles for charge redistribution."] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(CHGRDST_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Chgrdst::Three) } #[doc = "Use 4 prescaled low frequency clock cycles for charge redistribution."] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(CHGRDST_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Chgrdst::Four) } } -#[doc = "Field `BIAS` reader - Bias Configuration"] -pub type BIAS_R = crate::FieldReader; #[doc = "Bias Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BIAS_A { +pub enum Bias { #[doc = "0: Static"] - STATIC = 0, + Static = 0, #[doc = "1: 1/2 Bias"] - ONEHALF = 1, + Onehalf = 1, #[doc = "2: 1/3 Bias"] - ONETHIRD = 2, + Onethird = 2, #[doc = "3: 1/4 Bias"] - ONEFOURTH = 3, + Onefourth = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BIAS_A) -> Self { + fn from(variant: Bias) -> Self { variant as _ } } -impl BIAS_R { +impl crate::FieldSpec for Bias { + type Ux = u8; +} +impl crate::IsEnum for Bias {} +#[doc = "Field `BIAS` reader - Bias Configuration"] +pub type BiasR = crate::FieldReader; +impl BiasR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> BIAS_A { + pub const fn variant(&self) -> Bias { match self.bits { - 0 => BIAS_A::STATIC, - 1 => BIAS_A::ONEHALF, - 2 => BIAS_A::ONETHIRD, - 3 => BIAS_A::ONEFOURTH, + 0 => Bias::Static, + 1 => Bias::Onehalf, + 2 => Bias::Onethird, + 3 => Bias::Onefourth, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `STATIC`"] + #[doc = "Static"] #[inline(always)] pub fn is_static(&self) -> bool { - *self == BIAS_A::STATIC + *self == Bias::Static } - #[doc = "Checks if the value of the field is `ONEHALF`"] + #[doc = "1/2 Bias"] #[inline(always)] pub fn is_onehalf(&self) -> bool { - *self == BIAS_A::ONEHALF + *self == Bias::Onehalf } - #[doc = "Checks if the value of the field is `ONETHIRD`"] + #[doc = "1/3 Bias"] #[inline(always)] pub fn is_onethird(&self) -> bool { - *self == BIAS_A::ONETHIRD + *self == Bias::Onethird } - #[doc = "Checks if the value of the field is `ONEFOURTH`"] + #[doc = "1/4 Bias"] #[inline(always)] pub fn is_onefourth(&self) -> bool { - *self == BIAS_A::ONEFOURTH + *self == Bias::Onefourth } } #[doc = "Field `BIAS` writer - Bias Configuration"] -pub type BIAS_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, DISPCTRL_SPEC, u8, BIAS_A, 2, O>; -impl<'a, const O: u8> BIAS_W<'a, O> { +pub type BiasW<'a, REG> = crate::FieldWriter<'a, REG, 2, Bias, crate::Safe>; +impl<'a, REG> BiasW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Static"] #[inline(always)] - pub fn static_(self) -> &'a mut W { - self.variant(BIAS_A::STATIC) + pub fn static_(self) -> &'a mut crate::W { + self.variant(Bias::Static) } #[doc = "1/2 Bias"] #[inline(always)] - pub fn onehalf(self) -> &'a mut W { - self.variant(BIAS_A::ONEHALF) + pub fn onehalf(self) -> &'a mut crate::W { + self.variant(Bias::Onehalf) } #[doc = "1/3 Bias"] #[inline(always)] - pub fn onethird(self) -> &'a mut W { - self.variant(BIAS_A::ONETHIRD) + pub fn onethird(self) -> &'a mut crate::W { + self.variant(Bias::Onethird) } #[doc = "1/4 Bias"] #[inline(always)] - pub fn onefourth(self) -> &'a mut W { - self.variant(BIAS_A::ONEFOURTH) + pub fn onefourth(self) -> &'a mut crate::W { + self.variant(Bias::Onefourth) } } impl R { #[doc = "Bits 0:2 - Mux Configuration"] #[inline(always)] - pub fn mux(&self) -> MUX_R { - MUX_R::new((self.bits & 7) as u8) + pub fn mux(&self) -> MuxR { + MuxR::new((self.bits & 7) as u8) } #[doc = "Bit 4 - Waveform Selection"] #[inline(always)] - pub fn wave(&self) -> WAVE_R { - WAVE_R::new(((self.bits >> 4) & 1) != 0) + pub fn wave(&self) -> WaveR { + WaveR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 20:22 - Charge Redistribution Cycles"] #[inline(always)] - pub fn chgrdst(&self) -> CHGRDST_R { - CHGRDST_R::new(((self.bits >> 20) & 7) as u8) + pub fn chgrdst(&self) -> ChgrdstR { + ChgrdstR::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:25 - Bias Configuration"] #[inline(always)] - pub fn bias(&self) -> BIAS_R { - BIAS_R::new(((self.bits >> 24) & 3) as u8) + pub fn bias(&self) -> BiasR { + BiasR::new(((self.bits >> 24) & 3) as u8) } } impl W { #[doc = "Bits 0:2 - Mux Configuration"] #[inline(always)] #[must_use] - pub fn mux(&mut self) -> MUX_W<0> { - MUX_W::new(self) + pub fn mux(&mut self) -> MuxW { + MuxW::new(self, 0) } #[doc = "Bit 4 - Waveform Selection"] #[inline(always)] #[must_use] - pub fn wave(&mut self) -> WAVE_W<4> { - WAVE_W::new(self) + pub fn wave(&mut self) -> WaveW { + WaveW::new(self, 4) } #[doc = "Bits 20:22 - Charge Redistribution Cycles"] #[inline(always)] #[must_use] - pub fn chgrdst(&mut self) -> CHGRDST_W<20> { - CHGRDST_W::new(self) + pub fn chgrdst(&mut self) -> ChgrdstW { + ChgrdstW::new(self, 20) } #[doc = "Bits 24:25 - Bias Configuration"] #[inline(always)] #[must_use] - pub fn bias(&mut self) -> BIAS_W<24> { - BIAS_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn bias(&mut self) -> BiasW { + BiasW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dispctrl](index.html) module"] -pub struct DISPCTRL_SPEC; -impl crate::RegisterSpec for DISPCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dispctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dispctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DispctrlSpec; +impl crate::RegisterSpec for DispctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [dispctrl::R](R) reader structure"] -impl crate::Readable for DISPCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dispctrl::W](W) writer structure"] -impl crate::Writable for DISPCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dispctrl::R`](R) reader structure"] +impl crate::Readable for DispctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`dispctrl::W`](W) writer structure"] +impl crate::Writable for DispctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DISPCTRL to value 0x0010_0000"] -impl crate::Resettable for DISPCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0010_0000; +impl crate::Resettable for DispctrlSpec { + const RESET_VALUE: u32 = 0x0010_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/dispctrlx.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/dispctrlx.rs index 3d10a41..0a994e5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/dispctrlx.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/dispctrlx.rs @@ -1,81 +1,40 @@ #[doc = "Register `DISPCTRLX` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DISPCTRLX` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DISPLAYDIV` reader - Display Divider"] -pub type DISPLAYDIV_R = crate::FieldReader; +pub type DisplaydivR = crate::FieldReader; #[doc = "Field `DISPLAYDIV` writer - Display Divider"] -pub type DISPLAYDIV_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, DISPCTRLX_SPEC, u16, u16, 10, O>; +pub type DisplaydivW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; impl R { #[doc = "Bits 0:9 - Display Divider"] #[inline(always)] - pub fn displaydiv(&self) -> DISPLAYDIV_R { - DISPLAYDIV_R::new((self.bits & 0x03ff) as u16) + pub fn displaydiv(&self) -> DisplaydivR { + DisplaydivR::new((self.bits & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:9 - Display Divider"] #[inline(always)] #[must_use] - pub fn displaydiv(&mut self) -> DISPLAYDIV_W<0> { - DISPLAYDIV_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn displaydiv(&mut self) -> DisplaydivW { + DisplaydivW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dispctrlx](index.html) module"] -pub struct DISPCTRLX_SPEC; -impl crate::RegisterSpec for DISPCTRLX_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dispctrlx::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dispctrlx::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DispctrlxSpec; +impl crate::RegisterSpec for DispctrlxSpec { type Ux = u32; } -#[doc = "`read()` method returns [dispctrlx::R](R) reader structure"] -impl crate::Readable for DISPCTRLX_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dispctrlx::W](W) writer structure"] -impl crate::Writable for DISPCTRLX_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dispctrlx::R`](R) reader structure"] +impl crate::Readable for DispctrlxSpec {} +#[doc = "`write(|w| ..)` method takes [`dispctrlx::W`](W) writer structure"] +impl crate::Writable for DispctrlxSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DISPCTRLX to value 0"] -impl crate::Resettable for DISPCTRLX_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DispctrlxSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/en.rs index 595be46..f3a0c0a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/en.rs @@ -1,133 +1,96 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EN` reader - Enable"] -pub type EN_R = crate::BitReader; +pub type W = crate::W; #[doc = "Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EN_A { +pub enum En { #[doc = "0: Disable"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enable"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EN_A) -> Self { + fn from(variant: En) -> Self { variant as u8 != 0 } } -impl EN_R { +#[doc = "Field `EN` reader - Enable"] +pub type EnR = crate::BitReader; +impl EnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EN_A { + pub const fn variant(&self) -> En { match self.bits { - false => EN_A::DISABLE, - true => EN_A::ENABLE, + false => En::Disable, + true => En::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EN_A::DISABLE + *self == En::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enable"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EN_A::ENABLE + *self == En::Enable } } #[doc = "Field `EN` writer - Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, EN_A, O>; -impl<'a, const O: u8> EN_W<'a, O> { +pub type EnW<'a, REG> = crate::BitWriter<'a, REG, En>; +impl<'a, REG> EnW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(En::Disable) } #[doc = "Enable"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(En::Enable) } } #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/framerate.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/framerate.rs index 4358079..4a370a5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/framerate.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/framerate.rs @@ -1,80 +1,40 @@ #[doc = "Register `FRAMERATE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `FRAMERATE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `FRDIV` reader - Frame Rate Divider"] -pub type FRDIV_R = crate::FieldReader; +pub type FrdivR = crate::FieldReader; #[doc = "Field `FRDIV` writer - Frame Rate Divider"] -pub type FRDIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, FRAMERATE_SPEC, u16, u16, 9, O>; +pub type FrdivW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; impl R { #[doc = "Bits 0:8 - Frame Rate Divider"] #[inline(always)] - pub fn frdiv(&self) -> FRDIV_R { - FRDIV_R::new((self.bits & 0x01ff) as u16) + pub fn frdiv(&self) -> FrdivR { + FrdivR::new((self.bits & 0x01ff) as u16) } } impl W { #[doc = "Bits 0:8 - Frame Rate Divider"] #[inline(always)] #[must_use] - pub fn frdiv(&mut self) -> FRDIV_W<0> { - FRDIV_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn frdiv(&mut self) -> FrdivW { + FrdivW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [framerate](index.html) module"] -pub struct FRAMERATE_SPEC; -impl crate::RegisterSpec for FRAMERATE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`framerate::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`framerate::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct FramerateSpec; +impl crate::RegisterSpec for FramerateSpec { type Ux = u32; } -#[doc = "`read()` method returns [framerate::R](R) reader structure"] -impl crate::Readable for FRAMERATE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [framerate::W](W) writer structure"] -impl crate::Writable for FRAMERATE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`framerate::R`](R) reader structure"] +impl crate::Readable for FramerateSpec {} +#[doc = "`write(|w| ..)` method takes [`framerate::W`](W) writer structure"] +impl crate::Writable for FramerateSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FRAMERATE to value 0"] -impl crate::Resettable for FRAMERATE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for FramerateSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/ien.rs index b7c7d79..bf905f0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/ien.rs @@ -1,110 +1,70 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `FC` reader - Frame Counter"] -pub type FC_R = crate::BitReader; +pub type FcR = crate::BitReader; #[doc = "Field `FC` writer - Frame Counter"] -pub type FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISPLAY` reader - Display Update Event"] -pub type DISPLAY_R = crate::BitReader; +pub type DisplayR = crate::BitReader; #[doc = "Field `DISPLAY` writer - Display Update Event"] -pub type DISPLAY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type DisplayW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYNCBUSYDONE` reader - Sync Busy Done"] -pub type SYNCBUSYDONE_R = crate::BitReader; +pub type SyncbusydoneR = crate::BitReader; #[doc = "Field `SYNCBUSYDONE` writer - Sync Busy Done"] -pub type SYNCBUSYDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SyncbusydoneW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Frame Counter"] #[inline(always)] - pub fn fc(&self) -> FC_R { - FC_R::new((self.bits & 1) != 0) + pub fn fc(&self) -> FcR { + FcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Display Update Event"] #[inline(always)] - pub fn display(&self) -> DISPLAY_R { - DISPLAY_R::new(((self.bits >> 1) & 1) != 0) + pub fn display(&self) -> DisplayR { + DisplayR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Sync Busy Done"] #[inline(always)] - pub fn syncbusydone(&self) -> SYNCBUSYDONE_R { - SYNCBUSYDONE_R::new(((self.bits >> 2) & 1) != 0) + pub fn syncbusydone(&self) -> SyncbusydoneR { + SyncbusydoneR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Frame Counter"] #[inline(always)] #[must_use] - pub fn fc(&mut self) -> FC_W<0> { - FC_W::new(self) + pub fn fc(&mut self) -> FcW { + FcW::new(self, 0) } #[doc = "Bit 1 - Display Update Event"] #[inline(always)] #[must_use] - pub fn display(&mut self) -> DISPLAY_W<1> { - DISPLAY_W::new(self) + pub fn display(&mut self) -> DisplayW { + DisplayW::new(self, 1) } #[doc = "Bit 2 - Sync Busy Done"] #[inline(always)] #[must_use] - pub fn syncbusydone(&mut self) -> SYNCBUSYDONE_W<2> { - SYNCBUSYDONE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn syncbusydone(&mut self) -> SyncbusydoneW { + SyncbusydoneW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/if_.rs index 51ba600..e3d02d1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/if_.rs @@ -1,110 +1,70 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `FC` reader - Frame Counter"] -pub type FC_R = crate::BitReader; +pub type FcR = crate::BitReader; #[doc = "Field `FC` writer - Frame Counter"] -pub type FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISPLAY` reader - Display Update Event"] -pub type DISPLAY_R = crate::BitReader; +pub type DisplayR = crate::BitReader; #[doc = "Field `DISPLAY` writer - Display Update Event"] -pub type DISPLAY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type DisplayW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYNCBUSYDONE` reader - Synchronization is Done"] -pub type SYNCBUSYDONE_R = crate::BitReader; +pub type SyncbusydoneR = crate::BitReader; #[doc = "Field `SYNCBUSYDONE` writer - Synchronization is Done"] -pub type SYNCBUSYDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SyncbusydoneW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Frame Counter"] #[inline(always)] - pub fn fc(&self) -> FC_R { - FC_R::new((self.bits & 1) != 0) + pub fn fc(&self) -> FcR { + FcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Display Update Event"] #[inline(always)] - pub fn display(&self) -> DISPLAY_R { - DISPLAY_R::new(((self.bits >> 1) & 1) != 0) + pub fn display(&self) -> DisplayR { + DisplayR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Synchronization is Done"] #[inline(always)] - pub fn syncbusydone(&self) -> SYNCBUSYDONE_R { - SYNCBUSYDONE_R::new(((self.bits >> 2) & 1) != 0) + pub fn syncbusydone(&self) -> SyncbusydoneR { + SyncbusydoneR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Frame Counter"] #[inline(always)] #[must_use] - pub fn fc(&mut self) -> FC_W<0> { - FC_W::new(self) + pub fn fc(&mut self) -> FcW { + FcW::new(self, 0) } #[doc = "Bit 1 - Display Update Event"] #[inline(always)] #[must_use] - pub fn display(&mut self) -> DISPLAY_W<1> { - DISPLAY_W::new(self) + pub fn display(&mut self) -> DisplayW { + DisplayW::new(self, 1) } #[doc = "Bit 2 - Synchronization is Done"] #[inline(always)] #[must_use] - pub fn syncbusydone(&mut self) -> SYNCBUSYDONE_W<2> { - SYNCBUSYDONE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn syncbusydone(&mut self) -> SyncbusydoneW { + SyncbusydoneW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/ipversion.rs index 84368b2..1f3dd4e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IPVERSION"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IPVERSION"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/segd0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/segd0.rs index 70762d1..8f8933c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/segd0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/segd0.rs @@ -1,80 +1,40 @@ #[doc = "Register `SEGD0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SEGD0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SEGD0` reader - COM0 Segment Data Low"] -pub type SEGD0_R = crate::FieldReader; +pub type Segd0R = crate::FieldReader; #[doc = "Field `SEGD0` writer - COM0 Segment Data Low"] -pub type SEGD0_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SEGD0_SPEC, u32, u32, 20, O>; +pub type Segd0W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { #[doc = "Bits 0:19 - COM0 Segment Data Low"] #[inline(always)] - pub fn segd0(&self) -> SEGD0_R { - SEGD0_R::new(self.bits & 0x000f_ffff) + pub fn segd0(&self) -> Segd0R { + Segd0R::new(self.bits & 0x000f_ffff) } } impl W { #[doc = "Bits 0:19 - COM0 Segment Data Low"] #[inline(always)] #[must_use] - pub fn segd0(&mut self) -> SEGD0_W<0> { - SEGD0_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn segd0(&mut self) -> Segd0W { + Segd0W::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [segd0](index.html) module"] -pub struct SEGD0_SPEC; -impl crate::RegisterSpec for SEGD0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`segd0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`segd0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Segd0Spec; +impl crate::RegisterSpec for Segd0Spec { type Ux = u32; } -#[doc = "`read()` method returns [segd0::R](R) reader structure"] -impl crate::Readable for SEGD0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [segd0::W](W) writer structure"] -impl crate::Writable for SEGD0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`segd0::R`](R) reader structure"] +impl crate::Readable for Segd0Spec {} +#[doc = "`write(|w| ..)` method takes [`segd0::W`](W) writer structure"] +impl crate::Writable for Segd0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SEGD0 to value 0"] -impl crate::Resettable for SEGD0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Segd0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/segd1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/segd1.rs index b0c4b33..95821c6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/segd1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/segd1.rs @@ -1,80 +1,40 @@ #[doc = "Register `SEGD1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SEGD1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SEGD1` reader - COM1 Segment Data Low"] -pub type SEGD1_R = crate::FieldReader; +pub type Segd1R = crate::FieldReader; #[doc = "Field `SEGD1` writer - COM1 Segment Data Low"] -pub type SEGD1_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SEGD1_SPEC, u32, u32, 20, O>; +pub type Segd1W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { #[doc = "Bits 0:19 - COM1 Segment Data Low"] #[inline(always)] - pub fn segd1(&self) -> SEGD1_R { - SEGD1_R::new(self.bits & 0x000f_ffff) + pub fn segd1(&self) -> Segd1R { + Segd1R::new(self.bits & 0x000f_ffff) } } impl W { #[doc = "Bits 0:19 - COM1 Segment Data Low"] #[inline(always)] #[must_use] - pub fn segd1(&mut self) -> SEGD1_W<0> { - SEGD1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn segd1(&mut self) -> Segd1W { + Segd1W::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [segd1](index.html) module"] -pub struct SEGD1_SPEC; -impl crate::RegisterSpec for SEGD1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`segd1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`segd1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Segd1Spec; +impl crate::RegisterSpec for Segd1Spec { type Ux = u32; } -#[doc = "`read()` method returns [segd1::R](R) reader structure"] -impl crate::Readable for SEGD1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [segd1::W](W) writer structure"] -impl crate::Writable for SEGD1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`segd1::R`](R) reader structure"] +impl crate::Readable for Segd1Spec {} +#[doc = "`write(|w| ..)` method takes [`segd1::W`](W) writer structure"] +impl crate::Writable for Segd1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SEGD1 to value 0"] -impl crate::Resettable for SEGD1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Segd1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/segd2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/segd2.rs index d91cb1e..d32969e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/segd2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/segd2.rs @@ -1,80 +1,40 @@ #[doc = "Register `SEGD2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SEGD2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SEGD2` reader - COM2 Segment Data Low"] -pub type SEGD2_R = crate::FieldReader; +pub type Segd2R = crate::FieldReader; #[doc = "Field `SEGD2` writer - COM2 Segment Data Low"] -pub type SEGD2_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SEGD2_SPEC, u32, u32, 20, O>; +pub type Segd2W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { #[doc = "Bits 0:19 - COM2 Segment Data Low"] #[inline(always)] - pub fn segd2(&self) -> SEGD2_R { - SEGD2_R::new(self.bits & 0x000f_ffff) + pub fn segd2(&self) -> Segd2R { + Segd2R::new(self.bits & 0x000f_ffff) } } impl W { #[doc = "Bits 0:19 - COM2 Segment Data Low"] #[inline(always)] #[must_use] - pub fn segd2(&mut self) -> SEGD2_W<0> { - SEGD2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn segd2(&mut self) -> Segd2W { + Segd2W::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [segd2](index.html) module"] -pub struct SEGD2_SPEC; -impl crate::RegisterSpec for SEGD2_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`segd2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`segd2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Segd2Spec; +impl crate::RegisterSpec for Segd2Spec { type Ux = u32; } -#[doc = "`read()` method returns [segd2::R](R) reader structure"] -impl crate::Readable for SEGD2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [segd2::W](W) writer structure"] -impl crate::Writable for SEGD2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`segd2::R`](R) reader structure"] +impl crate::Readable for Segd2Spec {} +#[doc = "`write(|w| ..)` method takes [`segd2::W`](W) writer structure"] +impl crate::Writable for Segd2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SEGD2 to value 0"] -impl crate::Resettable for SEGD2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Segd2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/segd3.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/segd3.rs index e7a0498..45303a1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/segd3.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/segd3.rs @@ -1,80 +1,40 @@ #[doc = "Register `SEGD3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SEGD3` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SEGD3` reader - COM3 Segment Data Low"] -pub type SEGD3_R = crate::FieldReader; +pub type Segd3R = crate::FieldReader; #[doc = "Field `SEGD3` writer - COM3 Segment Data Low"] -pub type SEGD3_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SEGD3_SPEC, u32, u32, 20, O>; +pub type Segd3W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { #[doc = "Bits 0:19 - COM3 Segment Data Low"] #[inline(always)] - pub fn segd3(&self) -> SEGD3_R { - SEGD3_R::new(self.bits & 0x000f_ffff) + pub fn segd3(&self) -> Segd3R { + Segd3R::new(self.bits & 0x000f_ffff) } } impl W { #[doc = "Bits 0:19 - COM3 Segment Data Low"] #[inline(always)] #[must_use] - pub fn segd3(&mut self) -> SEGD3_W<0> { - SEGD3_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn segd3(&mut self) -> Segd3W { + Segd3W::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [segd3](index.html) module"] -pub struct SEGD3_SPEC; -impl crate::RegisterSpec for SEGD3_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`segd3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`segd3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Segd3Spec; +impl crate::RegisterSpec for Segd3Spec { type Ux = u32; } -#[doc = "`read()` method returns [segd3::R](R) reader structure"] -impl crate::Readable for SEGD3_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [segd3::W](W) writer structure"] -impl crate::Writable for SEGD3_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`segd3::R`](R) reader structure"] +impl crate::Readable for Segd3Spec {} +#[doc = "`write(|w| ..)` method takes [`segd3::W`](W) writer structure"] +impl crate::Writable for Segd3Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SEGD3 to value 0"] -impl crate::Resettable for SEGD3_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Segd3Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/status.rs index 45d458f..de9bdd2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/status.rs @@ -1,51 +1,36 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ASTATE` reader - Current Animation State"] -pub type ASTATE_R = crate::FieldReader; +pub type AstateR = crate::FieldReader; #[doc = "Field `BLINK` reader - Blink State"] -pub type BLINK_R = crate::BitReader; +pub type BlinkR = crate::BitReader; #[doc = "Field `LOADBUSY` reader - Load Synchronization is busy"] -pub type LOADBUSY_R = crate::BitReader; +pub type LoadbusyR = crate::BitReader; impl R { #[doc = "Bits 0:3 - Current Animation State"] #[inline(always)] - pub fn astate(&self) -> ASTATE_R { - ASTATE_R::new((self.bits & 0x0f) as u8) + pub fn astate(&self) -> AstateR { + AstateR::new((self.bits & 0x0f) as u8) } #[doc = "Bit 8 - Blink State"] #[inline(always)] - pub fn blink(&self) -> BLINK_R { - BLINK_R::new(((self.bits >> 8) & 1) != 0) + pub fn blink(&self) -> BlinkR { + BlinkR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 11 - Load Synchronization is busy"] #[inline(always)] - pub fn loadbusy(&self) -> LOADBUSY_R { - LOADBUSY_R::new(((self.bits >> 11) & 1) != 0) + pub fn loadbusy(&self) -> LoadbusyR { + LoadbusyR::new(((self.bits >> 11) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/swrst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/swrst.rs index afd978e..804eaff 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/swrst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/swrst.rs @@ -1,80 +1,40 @@ #[doc = "Register `SWRST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SWRST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SWRST` writer - Software reset command"] -pub type SWRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, SWRST_SPEC, bool, O>; +pub type SwrstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESETTING` reader - Software reset busy status"] -pub type RESETTING_R = crate::BitReader; +pub type ResettingR = crate::BitReader; impl R { #[doc = "Bit 1 - Software reset busy status"] #[inline(always)] - pub fn resetting(&self) -> RESETTING_R { - RESETTING_R::new(((self.bits >> 1) & 1) != 0) + pub fn resetting(&self) -> ResettingR { + ResettingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Software reset command"] #[inline(always)] #[must_use] - pub fn swrst(&mut self) -> SWRST_W<0> { - SWRST_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn swrst(&mut self) -> SwrstW { + SwrstW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swrst](index.html) module"] -pub struct SWRST_SPEC; -impl crate::RegisterSpec for SWRST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SwrstSpec; +impl crate::RegisterSpec for SwrstSpec { type Ux = u32; } -#[doc = "`read()` method returns [swrst::R](R) reader structure"] -impl crate::Readable for SWRST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [swrst::W](W) writer structure"] -impl crate::Writable for SWRST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`swrst::R`](R) reader structure"] +impl crate::Readable for SwrstSpec {} +#[doc = "`write(|w| ..)` method takes [`swrst::W`](W) writer structure"] +impl crate::Writable for SwrstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWRST to value 0"] -impl crate::Resettable for SWRST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SwrstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/updatectrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/updatectrl.rs index 99d0a03..18f8cfb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/updatectrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_ns/updatectrl.rs @@ -1,255 +1,225 @@ #[doc = "Register `UPDATECTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `UPDATECTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `AUTOLOAD` reader - Auto Load"] -pub type AUTOLOAD_R = crate::BitReader; +pub type W = crate::W; #[doc = "Auto Load\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AUTOLOAD_A { +pub enum Autoload { #[doc = "0: CLK_BUS register to CLK_PER register loads must be done manually with a write to CMD.LOAD."] - MANUAL = 0, + Manual = 0, #[doc = "1: CLK_BUS register to CLK_PER register loads will be started automatically after a write to the register in UPDATECTRL.LOADADDR is detected."] - AUTO = 1, + Auto = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AUTOLOAD_A) -> Self { + fn from(variant: Autoload) -> Self { variant as u8 != 0 } } -impl AUTOLOAD_R { +#[doc = "Field `AUTOLOAD` reader - Auto Load"] +pub type AutoloadR = crate::BitReader; +impl AutoloadR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> AUTOLOAD_A { + pub const fn variant(&self) -> Autoload { match self.bits { - false => AUTOLOAD_A::MANUAL, - true => AUTOLOAD_A::AUTO, + false => Autoload::Manual, + true => Autoload::Auto, } } - #[doc = "Checks if the value of the field is `MANUAL`"] + #[doc = "CLK_BUS register to CLK_PER register loads must be done manually with a write to CMD.LOAD."] #[inline(always)] pub fn is_manual(&self) -> bool { - *self == AUTOLOAD_A::MANUAL + *self == Autoload::Manual } - #[doc = "Checks if the value of the field is `AUTO`"] + #[doc = "CLK_BUS register to CLK_PER register loads will be started automatically after a write to the register in UPDATECTRL.LOADADDR is detected."] #[inline(always)] pub fn is_auto(&self) -> bool { - *self == AUTOLOAD_A::AUTO + *self == Autoload::Auto } } #[doc = "Field `AUTOLOAD` writer - Auto Load"] -pub type AUTOLOAD_W<'a, const O: u8> = crate::BitWriter<'a, u32, UPDATECTRL_SPEC, AUTOLOAD_A, O>; -impl<'a, const O: u8> AUTOLOAD_W<'a, O> { +pub type AutoloadW<'a, REG> = crate::BitWriter<'a, REG, Autoload>; +impl<'a, REG> AutoloadW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "CLK_BUS register to CLK_PER register loads must be done manually with a write to CMD.LOAD."] #[inline(always)] - pub fn manual(self) -> &'a mut W { - self.variant(AUTOLOAD_A::MANUAL) + pub fn manual(self) -> &'a mut crate::W { + self.variant(Autoload::Manual) } #[doc = "CLK_BUS register to CLK_PER register loads will be started automatically after a write to the register in UPDATECTRL.LOADADDR is detected."] #[inline(always)] - pub fn auto(self) -> &'a mut W { - self.variant(AUTOLOAD_A::AUTO) + pub fn auto(self) -> &'a mut crate::W { + self.variant(Autoload::Auto) } } -#[doc = "Field `LOADADDR` reader - Load Address"] -pub type LOADADDR_R = crate::FieldReader; #[doc = "Load Address\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LOADADDR_A { +pub enum Loadaddr { #[doc = "0: Starts synchronizing registers from CLK_BUS to CLK_PER after a write to BACTRL. Use with UPDATECTRL.AUTOLOAD"] - BACTRLWR = 0, + Bactrlwr = 0, #[doc = "1: Starts synchronizing registers from CLK_BUS to CLK_PER after a write to AREGA. Use with UPDATECTRL.AUTOLOAD"] - AREGAWR = 1, + Aregawr = 1, #[doc = "2: Starts synchronizing registers from CLK_BUS to CLK_PER after a write to AREGB. Use with UPDATECTRL.AUTOLOAD"] - AREGBWR = 2, + Aregbwr = 2, #[doc = "3: Starts synchronizing registers from CLK_BUS to CLK_PER after a write to SEGD0. Use with UPDATECTRL.AUTOLOAD"] - SEGD0WR = 3, + Segd0wr = 3, #[doc = "4: Starts synchronizing registers from CLK_BUS to CLK_PER after a write to SEGD1. Use with UPDATECTRL.AUTOLOAD"] - SEGD1WR = 4, + Segd1wr = 4, #[doc = "5: Starts synchronizing registers from CLK_BUS to CLK_PER after a write to SEGD2. Use with UPDATECTRL.AUTOLOAD"] - SEGD2WR = 5, + Segd2wr = 5, #[doc = "6: Starts synchronizing registers from CLK_BUS to CLK_PER after a write to SEGD3. Use with UPDATECTRL.AUTOLOAD"] - SEGD3WR = 6, + Segd3wr = 6, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LOADADDR_A) -> Self { + fn from(variant: Loadaddr) -> Self { variant as _ } } -impl LOADADDR_R { +impl crate::FieldSpec for Loadaddr { + type Ux = u8; +} +impl crate::IsEnum for Loadaddr {} +#[doc = "Field `LOADADDR` reader - Load Address"] +pub type LoadaddrR = crate::FieldReader; +impl LoadaddrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(LOADADDR_A::BACTRLWR), - 1 => Some(LOADADDR_A::AREGAWR), - 2 => Some(LOADADDR_A::AREGBWR), - 3 => Some(LOADADDR_A::SEGD0WR), - 4 => Some(LOADADDR_A::SEGD1WR), - 5 => Some(LOADADDR_A::SEGD2WR), - 6 => Some(LOADADDR_A::SEGD3WR), + 0 => Some(Loadaddr::Bactrlwr), + 1 => Some(Loadaddr::Aregawr), + 2 => Some(Loadaddr::Aregbwr), + 3 => Some(Loadaddr::Segd0wr), + 4 => Some(Loadaddr::Segd1wr), + 5 => Some(Loadaddr::Segd2wr), + 6 => Some(Loadaddr::Segd3wr), _ => None, } } - #[doc = "Checks if the value of the field is `BACTRLWR`"] + #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to BACTRL. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] pub fn is_bactrlwr(&self) -> bool { - *self == LOADADDR_A::BACTRLWR + *self == Loadaddr::Bactrlwr } - #[doc = "Checks if the value of the field is `AREGAWR`"] + #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to AREGA. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] pub fn is_aregawr(&self) -> bool { - *self == LOADADDR_A::AREGAWR + *self == Loadaddr::Aregawr } - #[doc = "Checks if the value of the field is `AREGBWR`"] + #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to AREGB. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] pub fn is_aregbwr(&self) -> bool { - *self == LOADADDR_A::AREGBWR + *self == Loadaddr::Aregbwr } - #[doc = "Checks if the value of the field is `SEGD0WR`"] + #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to SEGD0. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] pub fn is_segd0wr(&self) -> bool { - *self == LOADADDR_A::SEGD0WR + *self == Loadaddr::Segd0wr } - #[doc = "Checks if the value of the field is `SEGD1WR`"] + #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to SEGD1. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] pub fn is_segd1wr(&self) -> bool { - *self == LOADADDR_A::SEGD1WR + *self == Loadaddr::Segd1wr } - #[doc = "Checks if the value of the field is `SEGD2WR`"] + #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to SEGD2. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] pub fn is_segd2wr(&self) -> bool { - *self == LOADADDR_A::SEGD2WR + *self == Loadaddr::Segd2wr } - #[doc = "Checks if the value of the field is `SEGD3WR`"] + #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to SEGD3. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] pub fn is_segd3wr(&self) -> bool { - *self == LOADADDR_A::SEGD3WR + *self == Loadaddr::Segd3wr } } #[doc = "Field `LOADADDR` writer - Load Address"] -pub type LOADADDR_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, UPDATECTRL_SPEC, u8, LOADADDR_A, 4, O>; -impl<'a, const O: u8> LOADADDR_W<'a, O> { +pub type LoadaddrW<'a, REG> = crate::FieldWriter<'a, REG, 4, Loadaddr>; +impl<'a, REG> LoadaddrW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to BACTRL. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] - pub fn bactrlwr(self) -> &'a mut W { - self.variant(LOADADDR_A::BACTRLWR) + pub fn bactrlwr(self) -> &'a mut crate::W { + self.variant(Loadaddr::Bactrlwr) } #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to AREGA. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] - pub fn aregawr(self) -> &'a mut W { - self.variant(LOADADDR_A::AREGAWR) + pub fn aregawr(self) -> &'a mut crate::W { + self.variant(Loadaddr::Aregawr) } #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to AREGB. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] - pub fn aregbwr(self) -> &'a mut W { - self.variant(LOADADDR_A::AREGBWR) + pub fn aregbwr(self) -> &'a mut crate::W { + self.variant(Loadaddr::Aregbwr) } #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to SEGD0. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] - pub fn segd0wr(self) -> &'a mut W { - self.variant(LOADADDR_A::SEGD0WR) + pub fn segd0wr(self) -> &'a mut crate::W { + self.variant(Loadaddr::Segd0wr) } #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to SEGD1. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] - pub fn segd1wr(self) -> &'a mut W { - self.variant(LOADADDR_A::SEGD1WR) + pub fn segd1wr(self) -> &'a mut crate::W { + self.variant(Loadaddr::Segd1wr) } #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to SEGD2. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] - pub fn segd2wr(self) -> &'a mut W { - self.variant(LOADADDR_A::SEGD2WR) + pub fn segd2wr(self) -> &'a mut crate::W { + self.variant(Loadaddr::Segd2wr) } #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to SEGD3. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] - pub fn segd3wr(self) -> &'a mut W { - self.variant(LOADADDR_A::SEGD3WR) + pub fn segd3wr(self) -> &'a mut crate::W { + self.variant(Loadaddr::Segd3wr) } } impl R { #[doc = "Bit 8 - Auto Load"] #[inline(always)] - pub fn autoload(&self) -> AUTOLOAD_R { - AUTOLOAD_R::new(((self.bits >> 8) & 1) != 0) + pub fn autoload(&self) -> AutoloadR { + AutoloadR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bits 13:16 - Load Address"] #[inline(always)] - pub fn loadaddr(&self) -> LOADADDR_R { - LOADADDR_R::new(((self.bits >> 13) & 0x0f) as u8) + pub fn loadaddr(&self) -> LoadaddrR { + LoadaddrR::new(((self.bits >> 13) & 0x0f) as u8) } } impl W { #[doc = "Bit 8 - Auto Load"] #[inline(always)] #[must_use] - pub fn autoload(&mut self) -> AUTOLOAD_W<8> { - AUTOLOAD_W::new(self) + pub fn autoload(&mut self) -> AutoloadW { + AutoloadW::new(self, 8) } #[doc = "Bits 13:16 - Load Address"] #[inline(always)] #[must_use] - pub fn loadaddr(&mut self) -> LOADADDR_W<13> { - LOADADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn loadaddr(&mut self) -> LoadaddrW { + LoadaddrW::new(self, 13) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [updatectrl](index.html) module"] -pub struct UPDATECTRL_SPEC; -impl crate::RegisterSpec for UPDATECTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`updatectrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`updatectrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct UpdatectrlSpec; +impl crate::RegisterSpec for UpdatectrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [updatectrl::R](R) reader structure"] -impl crate::Readable for UPDATECTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [updatectrl::W](W) writer structure"] -impl crate::Writable for UPDATECTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`updatectrl::R`](R) reader structure"] +impl crate::Readable for UpdatectrlSpec {} +#[doc = "`write(|w| ..)` method takes [`updatectrl::W`](W) writer structure"] +impl crate::Writable for UpdatectrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets UPDATECTRL to value 0"] -impl crate::Resettable for UPDATECTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for UpdatectrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s.rs index f45b480..50aa535 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s.rs @@ -1,136 +1,264 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + swrst: Swrst, + ctrl: Ctrl, + cmd: Cmd, + dispctrl: Dispctrl, + bacfg: Bacfg, + bactrl: Bactrl, + status: Status, + arega: Arega, + aregb: Aregb, + if_: If, + ien: Ien, + biasctrl: Biasctrl, + dispctrlx: Dispctrlx, + _reserved15: [u8; 0x04], + segd0: Segd0, + _reserved16: [u8; 0x04], + segd1: Segd1, + _reserved17: [u8; 0x04], + segd2: Segd2, + _reserved18: [u8; 0x04], + segd3: Segd3, + _reserved19: [u8; 0x64], + updatectrl: Updatectrl, + _reserved20: [u8; 0x2c], + framerate: Framerate, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub swrst: SWRST, + #[inline(always)] + pub const fn swrst(&self) -> &Swrst { + &self.swrst + } #[doc = "0x0c - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x10 - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x14 - No Description"] - pub dispctrl: DISPCTRL, + #[inline(always)] + pub const fn dispctrl(&self) -> &Dispctrl { + &self.dispctrl + } #[doc = "0x18 - No Description"] - pub bacfg: BACFG, + #[inline(always)] + pub const fn bacfg(&self) -> &Bacfg { + &self.bacfg + } #[doc = "0x1c - No Description"] - pub bactrl: BACTRL, + #[inline(always)] + pub const fn bactrl(&self) -> &Bactrl { + &self.bactrl + } #[doc = "0x20 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x24 - No Description"] - pub arega: AREGA, + #[inline(always)] + pub const fn arega(&self) -> &Arega { + &self.arega + } #[doc = "0x28 - No Description"] - pub aregb: AREGB, + #[inline(always)] + pub const fn aregb(&self) -> &Aregb { + &self.aregb + } #[doc = "0x2c - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x30 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x34 - No Description"] - pub biasctrl: BIASCTRL, + #[inline(always)] + pub const fn biasctrl(&self) -> &Biasctrl { + &self.biasctrl + } #[doc = "0x38 - No Description"] - pub dispctrlx: DISPCTRLX, - _reserved15: [u8; 0x04], + #[inline(always)] + pub const fn dispctrlx(&self) -> &Dispctrlx { + &self.dispctrlx + } #[doc = "0x40 - No Description"] - pub segd0: SEGD0, - _reserved16: [u8; 0x04], + #[inline(always)] + pub const fn segd0(&self) -> &Segd0 { + &self.segd0 + } #[doc = "0x48 - No Description"] - pub segd1: SEGD1, - _reserved17: [u8; 0x04], + #[inline(always)] + pub const fn segd1(&self) -> &Segd1 { + &self.segd1 + } #[doc = "0x50 - No Description"] - pub segd2: SEGD2, - _reserved18: [u8; 0x04], + #[inline(always)] + pub const fn segd2(&self) -> &Segd2 { + &self.segd2 + } #[doc = "0x58 - No Description"] - pub segd3: SEGD3, - _reserved19: [u8; 0x64], + #[inline(always)] + pub const fn segd3(&self) -> &Segd3 { + &self.segd3 + } #[doc = "0xc0 - No Description"] - pub updatectrl: UPDATECTRL, - _reserved20: [u8; 0x2c], + #[inline(always)] + pub const fn updatectrl(&self) -> &Updatectrl { + &self.updatectrl + } #[doc = "0xf0 - No Description"] - pub framerate: FRAMERATE, + #[inline(always)] + pub const fn framerate(&self) -> &Framerate { + &self.framerate + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "SWRST (rw) register accessor: an alias for `Reg`"] -pub type SWRST = crate::Reg; +#[doc = "SWRST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swrst`] +module"] +#[doc(alias = "SWRST")] +pub type Swrst = crate::Reg; #[doc = "No Description"] pub mod swrst; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "DISPCTRL (rw) register accessor: an alias for `Reg`"] -pub type DISPCTRL = crate::Reg; +#[doc = "DISPCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dispctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dispctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dispctrl`] +module"] +#[doc(alias = "DISPCTRL")] +pub type Dispctrl = crate::Reg; #[doc = "No Description"] pub mod dispctrl; -#[doc = "BACFG (rw) register accessor: an alias for `Reg`"] -pub type BACFG = crate::Reg; +#[doc = "BACFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bacfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bacfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bacfg`] +module"] +#[doc(alias = "BACFG")] +pub type Bacfg = crate::Reg; #[doc = "No Description"] pub mod bacfg; -#[doc = "BACTRL (rw) register accessor: an alias for `Reg`"] -pub type BACTRL = crate::Reg; +#[doc = "BACTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bactrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bactrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bactrl`] +module"] +#[doc(alias = "BACTRL")] +pub type Bactrl = crate::Reg; #[doc = "No Description"] pub mod bactrl; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "AREGA (rw) register accessor: an alias for `Reg`"] -pub type AREGA = crate::Reg; +#[doc = "AREGA (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`arega::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`arega::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@arega`] +module"] +#[doc(alias = "AREGA")] +pub type Arega = crate::Reg; #[doc = "No Description"] pub mod arega; -#[doc = "AREGB (rw) register accessor: an alias for `Reg`"] -pub type AREGB = crate::Reg; +#[doc = "AREGB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`aregb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`aregb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@aregb`] +module"] +#[doc(alias = "AREGB")] +pub type Aregb = crate::Reg; #[doc = "No Description"] pub mod aregb; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "BIASCTRL (rw) register accessor: an alias for `Reg`"] -pub type BIASCTRL = crate::Reg; +#[doc = "BIASCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`biasctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`biasctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@biasctrl`] +module"] +#[doc(alias = "BIASCTRL")] +pub type Biasctrl = crate::Reg; #[doc = "No Description"] pub mod biasctrl; -#[doc = "DISPCTRLX (rw) register accessor: an alias for `Reg`"] -pub type DISPCTRLX = crate::Reg; +#[doc = "DISPCTRLX (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dispctrlx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dispctrlx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dispctrlx`] +module"] +#[doc(alias = "DISPCTRLX")] +pub type Dispctrlx = crate::Reg; #[doc = "No Description"] pub mod dispctrlx; -#[doc = "SEGD0 (rw) register accessor: an alias for `Reg`"] -pub type SEGD0 = crate::Reg; +#[doc = "SEGD0 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`segd0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`segd0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@segd0`] +module"] +#[doc(alias = "SEGD0")] +pub type Segd0 = crate::Reg; #[doc = "No Description"] pub mod segd0; -#[doc = "SEGD1 (rw) register accessor: an alias for `Reg`"] -pub type SEGD1 = crate::Reg; +#[doc = "SEGD1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`segd1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`segd1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@segd1`] +module"] +#[doc(alias = "SEGD1")] +pub type Segd1 = crate::Reg; #[doc = "No Description"] pub mod segd1; -#[doc = "SEGD2 (rw) register accessor: an alias for `Reg`"] -pub type SEGD2 = crate::Reg; +#[doc = "SEGD2 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`segd2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`segd2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@segd2`] +module"] +#[doc(alias = "SEGD2")] +pub type Segd2 = crate::Reg; #[doc = "No Description"] pub mod segd2; -#[doc = "SEGD3 (rw) register accessor: an alias for `Reg`"] -pub type SEGD3 = crate::Reg; +#[doc = "SEGD3 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`segd3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`segd3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@segd3`] +module"] +#[doc(alias = "SEGD3")] +pub type Segd3 = crate::Reg; #[doc = "No Description"] pub mod segd3; -#[doc = "UPDATECTRL (rw) register accessor: an alias for `Reg`"] -pub type UPDATECTRL = crate::Reg; +#[doc = "UPDATECTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`updatectrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`updatectrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@updatectrl`] +module"] +#[doc(alias = "UPDATECTRL")] +pub type Updatectrl = crate::Reg; #[doc = "No Description"] pub mod updatectrl; -#[doc = "FRAMERATE (rw) register accessor: an alias for `Reg`"] -pub type FRAMERATE = crate::Reg; +#[doc = "FRAMERATE (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`framerate::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`framerate::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@framerate`] +module"] +#[doc(alias = "FRAMERATE")] +pub type Framerate = crate::Reg; #[doc = "No Description"] pub mod framerate; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/arega.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/arega.rs index d47e2f6..dd09194 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/arega.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/arega.rs @@ -1,80 +1,40 @@ #[doc = "Register `AREGA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `AREGA` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `AREGA` reader - Animation Register A Data"] -pub type AREGA_R = crate::FieldReader; +pub type AregaR = crate::FieldReader; #[doc = "Field `AREGA` writer - Animation Register A Data"] -pub type AREGA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, AREGA_SPEC, u8, u8, 8, O>; +pub type AregaW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Animation Register A Data"] #[inline(always)] - pub fn arega(&self) -> AREGA_R { - AREGA_R::new((self.bits & 0xff) as u8) + pub fn arega(&self) -> AregaR { + AregaR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Animation Register A Data"] #[inline(always)] #[must_use] - pub fn arega(&mut self) -> AREGA_W<0> { - AREGA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn arega(&mut self) -> AregaW { + AregaW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [arega](index.html) module"] -pub struct AREGA_SPEC; -impl crate::RegisterSpec for AREGA_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`arega::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`arega::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AregaSpec; +impl crate::RegisterSpec for AregaSpec { type Ux = u32; } -#[doc = "`read()` method returns [arega::R](R) reader structure"] -impl crate::Readable for AREGA_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [arega::W](W) writer structure"] -impl crate::Writable for AREGA_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`arega::R`](R) reader structure"] +impl crate::Readable for AregaSpec {} +#[doc = "`write(|w| ..)` method takes [`arega::W`](W) writer structure"] +impl crate::Writable for AregaSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets AREGA to value 0"] -impl crate::Resettable for AREGA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for AregaSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/aregb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/aregb.rs index a1472e4..4371222 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/aregb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/aregb.rs @@ -1,80 +1,40 @@ #[doc = "Register `AREGB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `AREGB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `AREGB` reader - Animation Register B Data"] -pub type AREGB_R = crate::FieldReader; +pub type AregbR = crate::FieldReader; #[doc = "Field `AREGB` writer - Animation Register B Data"] -pub type AREGB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, AREGB_SPEC, u8, u8, 8, O>; +pub type AregbW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Animation Register B Data"] #[inline(always)] - pub fn aregb(&self) -> AREGB_R { - AREGB_R::new((self.bits & 0xff) as u8) + pub fn aregb(&self) -> AregbR { + AregbR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Animation Register B Data"] #[inline(always)] #[must_use] - pub fn aregb(&mut self) -> AREGB_W<0> { - AREGB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn aregb(&mut self) -> AregbW { + AregbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [aregb](index.html) module"] -pub struct AREGB_SPEC; -impl crate::RegisterSpec for AREGB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`aregb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`aregb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AregbSpec; +impl crate::RegisterSpec for AregbSpec { type Ux = u32; } -#[doc = "`read()` method returns [aregb::R](R) reader structure"] -impl crate::Readable for AREGB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [aregb::W](W) writer structure"] -impl crate::Writable for AREGB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`aregb::R`](R) reader structure"] +impl crate::Readable for AregbSpec {} +#[doc = "`write(|w| ..)` method takes [`aregb::W`](W) writer structure"] +impl crate::Writable for AregbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets AREGB to value 0"] -impl crate::Resettable for AREGB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for AregbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/bacfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/bacfg.rs index 557b2ed..660b41c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/bacfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/bacfg.rs @@ -1,185 +1,152 @@ #[doc = "Register `BACFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `BACFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ASTATETOP` reader - ASTATE top cnt"] -pub type ASTATETOP_R = crate::FieldReader; +pub type AstatetopR = crate::FieldReader; #[doc = "Field `ASTATETOP` writer - ASTATE top cnt"] -pub type ASTATETOP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BACFG_SPEC, u8, u8, 3, O>; -#[doc = "Field `FCPRESC` reader - Frame Counter Prescaler"] -pub type FCPRESC_R = crate::FieldReader; +pub type AstatetopW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Frame Counter Prescaler\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FCPRESC_A { +pub enum Fcpresc { #[doc = "0: every frame clock"] - DIV1 = 0, + Div1 = 0, #[doc = "1: every 2nd frame clock"] - DIV2 = 1, + Div2 = 1, #[doc = "2: every 4th frame clock"] - DIV4 = 2, + Div4 = 2, #[doc = "3: every 8th frame clock"] - DIV8 = 3, + Div8 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FCPRESC_A) -> Self { + fn from(variant: Fcpresc) -> Self { variant as _ } } -impl FCPRESC_R { +impl crate::FieldSpec for Fcpresc { + type Ux = u8; +} +impl crate::IsEnum for Fcpresc {} +#[doc = "Field `FCPRESC` reader - Frame Counter Prescaler"] +pub type FcprescR = crate::FieldReader; +impl FcprescR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FCPRESC_A { + pub const fn variant(&self) -> Fcpresc { match self.bits { - 0 => FCPRESC_A::DIV1, - 1 => FCPRESC_A::DIV2, - 2 => FCPRESC_A::DIV4, - 3 => FCPRESC_A::DIV8, + 0 => Fcpresc::Div1, + 1 => Fcpresc::Div2, + 2 => Fcpresc::Div4, + 3 => Fcpresc::Div8, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "every frame clock"] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == FCPRESC_A::DIV1 + *self == Fcpresc::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "every 2nd frame clock"] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == FCPRESC_A::DIV2 + *self == Fcpresc::Div2 } - #[doc = "Checks if the value of the field is `DIV4`"] + #[doc = "every 4th frame clock"] #[inline(always)] pub fn is_div4(&self) -> bool { - *self == FCPRESC_A::DIV4 + *self == Fcpresc::Div4 } - #[doc = "Checks if the value of the field is `DIV8`"] + #[doc = "every 8th frame clock"] #[inline(always)] pub fn is_div8(&self) -> bool { - *self == FCPRESC_A::DIV8 + *self == Fcpresc::Div8 } } #[doc = "Field `FCPRESC` writer - Frame Counter Prescaler"] -pub type FCPRESC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, BACFG_SPEC, u8, FCPRESC_A, 2, O>; -impl<'a, const O: u8> FCPRESC_W<'a, O> { +pub type FcprescW<'a, REG> = crate::FieldWriter<'a, REG, 2, Fcpresc, crate::Safe>; +impl<'a, REG> FcprescW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "every frame clock"] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(FCPRESC_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Fcpresc::Div1) } #[doc = "every 2nd frame clock"] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(FCPRESC_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Fcpresc::Div2) } #[doc = "every 4th frame clock"] #[inline(always)] - pub fn div4(self) -> &'a mut W { - self.variant(FCPRESC_A::DIV4) + pub fn div4(self) -> &'a mut crate::W { + self.variant(Fcpresc::Div4) } #[doc = "every 8th frame clock"] #[inline(always)] - pub fn div8(self) -> &'a mut W { - self.variant(FCPRESC_A::DIV8) + pub fn div8(self) -> &'a mut crate::W { + self.variant(Fcpresc::Div8) } } #[doc = "Field `FCTOP` reader - Frame Counter Top"] -pub type FCTOP_R = crate::FieldReader; +pub type FctopR = crate::FieldReader; #[doc = "Field `FCTOP` writer - Frame Counter Top"] -pub type FCTOP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BACFG_SPEC, u8, u8, 6, O>; +pub type FctopW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:2 - ASTATE top cnt"] #[inline(always)] - pub fn astatetop(&self) -> ASTATETOP_R { - ASTATETOP_R::new((self.bits & 7) as u8) + pub fn astatetop(&self) -> AstatetopR { + AstatetopR::new((self.bits & 7) as u8) } #[doc = "Bits 16:17 - Frame Counter Prescaler"] #[inline(always)] - pub fn fcpresc(&self) -> FCPRESC_R { - FCPRESC_R::new(((self.bits >> 16) & 3) as u8) + pub fn fcpresc(&self) -> FcprescR { + FcprescR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:23 - Frame Counter Top"] #[inline(always)] - pub fn fctop(&self) -> FCTOP_R { - FCTOP_R::new(((self.bits >> 18) & 0x3f) as u8) + pub fn fctop(&self) -> FctopR { + FctopR::new(((self.bits >> 18) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:2 - ASTATE top cnt"] #[inline(always)] #[must_use] - pub fn astatetop(&mut self) -> ASTATETOP_W<0> { - ASTATETOP_W::new(self) + pub fn astatetop(&mut self) -> AstatetopW { + AstatetopW::new(self, 0) } #[doc = "Bits 16:17 - Frame Counter Prescaler"] #[inline(always)] #[must_use] - pub fn fcpresc(&mut self) -> FCPRESC_W<16> { - FCPRESC_W::new(self) + pub fn fcpresc(&mut self) -> FcprescW { + FcprescW::new(self, 16) } #[doc = "Bits 18:23 - Frame Counter Top"] #[inline(always)] #[must_use] - pub fn fctop(&mut self) -> FCTOP_W<18> { - FCTOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn fctop(&mut self) -> FctopW { + FctopW::new(self, 18) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bacfg](index.html) module"] -pub struct BACFG_SPEC; -impl crate::RegisterSpec for BACFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bacfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bacfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct BacfgSpec; +impl crate::RegisterSpec for BacfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [bacfg::R](R) reader structure"] -impl crate::Readable for BACFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [bacfg::W](W) writer structure"] -impl crate::Writable for BACFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`bacfg::R`](R) reader structure"] +impl crate::Readable for BacfgSpec {} +#[doc = "`write(|w| ..)` method takes [`bacfg::W`](W) writer structure"] +impl crate::Writable for BacfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BACFG to value 0x07"] -impl crate::Resettable for BACFG_SPEC { - const RESET_VALUE: Self::Ux = 0x07; +impl crate::Resettable for BacfgSpec { + const RESET_VALUE: u32 = 0x07; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/bactrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/bactrl.rs index d49b87b..c06c073 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/bactrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/bactrl.rs @@ -1,507 +1,494 @@ #[doc = "Register `BACTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `BACTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `BLINKEN` reader - Blink Enable"] -pub type BLINKEN_R = crate::BitReader; +pub type BlinkenR = crate::BitReader; #[doc = "Field `BLINKEN` writer - Blink Enable"] -pub type BLINKEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, BACTRL_SPEC, bool, O>; -#[doc = "Field `BLANK` reader - Blank Display"] -pub type BLANK_R = crate::BitReader; +pub type BlinkenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Blank Display\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BLANK_A { +pub enum Blank { #[doc = "0: Display is not \"blanked\""] - DISABLE = 0, + Disable = 0, #[doc = "1: Display is \"blanked\""] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BLANK_A) -> Self { + fn from(variant: Blank) -> Self { variant as u8 != 0 } } -impl BLANK_R { +#[doc = "Field `BLANK` reader - Blank Display"] +pub type BlankR = crate::BitReader; +impl BlankR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> BLANK_A { + pub const fn variant(&self) -> Blank { match self.bits { - false => BLANK_A::DISABLE, - true => BLANK_A::ENABLE, + false => Blank::Disable, + true => Blank::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Display is not \"blanked\""] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == BLANK_A::DISABLE + *self == Blank::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Display is \"blanked\""] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == BLANK_A::ENABLE + *self == Blank::Enable } } #[doc = "Field `BLANK` writer - Blank Display"] -pub type BLANK_W<'a, const O: u8> = crate::BitWriter<'a, u32, BACTRL_SPEC, BLANK_A, O>; -impl<'a, const O: u8> BLANK_W<'a, O> { +pub type BlankW<'a, REG> = crate::BitWriter<'a, REG, Blank>; +impl<'a, REG> BlankW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Display is not \"blanked\""] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(BLANK_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Blank::Disable) } #[doc = "Display is \"blanked\""] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(BLANK_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Blank::Enable) } } #[doc = "Field `AEN` reader - Animation Enable"] -pub type AEN_R = crate::BitReader; +pub type AenR = crate::BitReader; #[doc = "Field `AEN` writer - Animation Enable"] -pub type AEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, BACTRL_SPEC, bool, O>; -#[doc = "Field `AREGASC` reader - Animate Register A Shift Control"] -pub type AREGASC_R = crate::FieldReader; +pub type AenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Animate Register A Shift Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum AREGASC_A { +pub enum Aregasc { #[doc = "0: No Shift operation on Animation Register A"] - NOSHIFT = 0, + Noshift = 0, #[doc = "1: Animation Register A is shifted left"] - SHIFTLEFT = 1, + Shiftleft = 1, #[doc = "2: Animation Register A is shifted right"] - SHIFTRIGHT = 2, + Shiftright = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: AREGASC_A) -> Self { + fn from(variant: Aregasc) -> Self { variant as _ } } -impl AREGASC_R { +impl crate::FieldSpec for Aregasc { + type Ux = u8; +} +impl crate::IsEnum for Aregasc {} +#[doc = "Field `AREGASC` reader - Animate Register A Shift Control"] +pub type AregascR = crate::FieldReader; +impl AregascR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(AREGASC_A::NOSHIFT), - 1 => Some(AREGASC_A::SHIFTLEFT), - 2 => Some(AREGASC_A::SHIFTRIGHT), + 0 => Some(Aregasc::Noshift), + 1 => Some(Aregasc::Shiftleft), + 2 => Some(Aregasc::Shiftright), _ => None, } } - #[doc = "Checks if the value of the field is `NOSHIFT`"] + #[doc = "No Shift operation on Animation Register A"] #[inline(always)] pub fn is_noshift(&self) -> bool { - *self == AREGASC_A::NOSHIFT + *self == Aregasc::Noshift } - #[doc = "Checks if the value of the field is `SHIFTLEFT`"] + #[doc = "Animation Register A is shifted left"] #[inline(always)] pub fn is_shiftleft(&self) -> bool { - *self == AREGASC_A::SHIFTLEFT + *self == Aregasc::Shiftleft } - #[doc = "Checks if the value of the field is `SHIFTRIGHT`"] + #[doc = "Animation Register A is shifted right"] #[inline(always)] pub fn is_shiftright(&self) -> bool { - *self == AREGASC_A::SHIFTRIGHT + *self == Aregasc::Shiftright } } #[doc = "Field `AREGASC` writer - Animate Register A Shift Control"] -pub type AREGASC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BACTRL_SPEC, u8, AREGASC_A, 2, O>; -impl<'a, const O: u8> AREGASC_W<'a, O> { +pub type AregascW<'a, REG> = crate::FieldWriter<'a, REG, 2, Aregasc>; +impl<'a, REG> AregascW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No Shift operation on Animation Register A"] #[inline(always)] - pub fn noshift(self) -> &'a mut W { - self.variant(AREGASC_A::NOSHIFT) + pub fn noshift(self) -> &'a mut crate::W { + self.variant(Aregasc::Noshift) } #[doc = "Animation Register A is shifted left"] #[inline(always)] - pub fn shiftleft(self) -> &'a mut W { - self.variant(AREGASC_A::SHIFTLEFT) + pub fn shiftleft(self) -> &'a mut crate::W { + self.variant(Aregasc::Shiftleft) } #[doc = "Animation Register A is shifted right"] #[inline(always)] - pub fn shiftright(self) -> &'a mut W { - self.variant(AREGASC_A::SHIFTRIGHT) + pub fn shiftright(self) -> &'a mut crate::W { + self.variant(Aregasc::Shiftright) } } -#[doc = "Field `AREGBSC` reader - Animate Register B Shift Control"] -pub type AREGBSC_R = crate::FieldReader; #[doc = "Animate Register B Shift Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum AREGBSC_A { +pub enum Aregbsc { #[doc = "0: No Shift operation on Animation Register B"] - NOSHIFT = 0, + Noshift = 0, #[doc = "1: Animation Register B is shifted left"] - SHIFTLEFT = 1, + Shiftleft = 1, #[doc = "2: Animation Register B is shifted right"] - SHIFTRIGHT = 2, + Shiftright = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: AREGBSC_A) -> Self { + fn from(variant: Aregbsc) -> Self { variant as _ } } -impl AREGBSC_R { +impl crate::FieldSpec for Aregbsc { + type Ux = u8; +} +impl crate::IsEnum for Aregbsc {} +#[doc = "Field `AREGBSC` reader - Animate Register B Shift Control"] +pub type AregbscR = crate::FieldReader; +impl AregbscR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(AREGBSC_A::NOSHIFT), - 1 => Some(AREGBSC_A::SHIFTLEFT), - 2 => Some(AREGBSC_A::SHIFTRIGHT), + 0 => Some(Aregbsc::Noshift), + 1 => Some(Aregbsc::Shiftleft), + 2 => Some(Aregbsc::Shiftright), _ => None, } } - #[doc = "Checks if the value of the field is `NOSHIFT`"] + #[doc = "No Shift operation on Animation Register B"] #[inline(always)] pub fn is_noshift(&self) -> bool { - *self == AREGBSC_A::NOSHIFT + *self == Aregbsc::Noshift } - #[doc = "Checks if the value of the field is `SHIFTLEFT`"] + #[doc = "Animation Register B is shifted left"] #[inline(always)] pub fn is_shiftleft(&self) -> bool { - *self == AREGBSC_A::SHIFTLEFT + *self == Aregbsc::Shiftleft } - #[doc = "Checks if the value of the field is `SHIFTRIGHT`"] + #[doc = "Animation Register B is shifted right"] #[inline(always)] pub fn is_shiftright(&self) -> bool { - *self == AREGBSC_A::SHIFTRIGHT + *self == Aregbsc::Shiftright } } #[doc = "Field `AREGBSC` writer - Animate Register B Shift Control"] -pub type AREGBSC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BACTRL_SPEC, u8, AREGBSC_A, 2, O>; -impl<'a, const O: u8> AREGBSC_W<'a, O> { +pub type AregbscW<'a, REG> = crate::FieldWriter<'a, REG, 2, Aregbsc>; +impl<'a, REG> AregbscW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No Shift operation on Animation Register B"] #[inline(always)] - pub fn noshift(self) -> &'a mut W { - self.variant(AREGBSC_A::NOSHIFT) + pub fn noshift(self) -> &'a mut crate::W { + self.variant(Aregbsc::Noshift) } #[doc = "Animation Register B is shifted left"] #[inline(always)] - pub fn shiftleft(self) -> &'a mut W { - self.variant(AREGBSC_A::SHIFTLEFT) + pub fn shiftleft(self) -> &'a mut crate::W { + self.variant(Aregbsc::Shiftleft) } #[doc = "Animation Register B is shifted right"] #[inline(always)] - pub fn shiftright(self) -> &'a mut W { - self.variant(AREGBSC_A::SHIFTRIGHT) + pub fn shiftright(self) -> &'a mut crate::W { + self.variant(Aregbsc::Shiftright) } } -#[doc = "Field `ALOGSEL` reader - Animate Logic Function Select"] -pub type ALOGSEL_R = crate::BitReader; #[doc = "Animate Logic Function Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ALOGSEL_A { +pub enum Alogsel { #[doc = "0: AREGA and AREGB AND'ed"] - AND = 0, + And = 0, #[doc = "1: AREGA and AREGB OR'ed"] - OR = 1, + Or = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ALOGSEL_A) -> Self { + fn from(variant: Alogsel) -> Self { variant as u8 != 0 } } -impl ALOGSEL_R { +#[doc = "Field `ALOGSEL` reader - Animate Logic Function Select"] +pub type AlogselR = crate::BitReader; +impl AlogselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ALOGSEL_A { + pub const fn variant(&self) -> Alogsel { match self.bits { - false => ALOGSEL_A::AND, - true => ALOGSEL_A::OR, + false => Alogsel::And, + true => Alogsel::Or, } } - #[doc = "Checks if the value of the field is `AND`"] + #[doc = "AREGA and AREGB AND'ed"] #[inline(always)] pub fn is_and(&self) -> bool { - *self == ALOGSEL_A::AND + *self == Alogsel::And } - #[doc = "Checks if the value of the field is `OR`"] + #[doc = "AREGA and AREGB OR'ed"] #[inline(always)] pub fn is_or(&self) -> bool { - *self == ALOGSEL_A::OR + *self == Alogsel::Or } } #[doc = "Field `ALOGSEL` writer - Animate Logic Function Select"] -pub type ALOGSEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, BACTRL_SPEC, ALOGSEL_A, O>; -impl<'a, const O: u8> ALOGSEL_W<'a, O> { +pub type AlogselW<'a, REG> = crate::BitWriter<'a, REG, Alogsel>; +impl<'a, REG> AlogselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "AREGA and AREGB AND'ed"] #[inline(always)] - pub fn and(self) -> &'a mut W { - self.variant(ALOGSEL_A::AND) + pub fn and(self) -> &'a mut crate::W { + self.variant(Alogsel::And) } #[doc = "AREGA and AREGB OR'ed"] #[inline(always)] - pub fn or(self) -> &'a mut W { - self.variant(ALOGSEL_A::OR) + pub fn or(self) -> &'a mut crate::W { + self.variant(Alogsel::Or) } } #[doc = "Field `FCEN` reader - Frame Counter Enable"] -pub type FCEN_R = crate::BitReader; +pub type FcenR = crate::BitReader; #[doc = "Field `FCEN` writer - Frame Counter Enable"] -pub type FCEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, BACTRL_SPEC, bool, O>; -#[doc = "Field `DISPLAYCNTEN` reader - Display Counter Enable"] -pub type DISPLAYCNTEN_R = crate::BitReader; +pub type FcenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Display Counter Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DISPLAYCNTEN_A { +pub enum Displaycnten { #[doc = "0: Disable the display counter"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enable the display counter"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DISPLAYCNTEN_A) -> Self { + fn from(variant: Displaycnten) -> Self { variant as u8 != 0 } } -impl DISPLAYCNTEN_R { +#[doc = "Field `DISPLAYCNTEN` reader - Display Counter Enable"] +pub type DisplaycntenR = crate::BitReader; +impl DisplaycntenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DISPLAYCNTEN_A { + pub const fn variant(&self) -> Displaycnten { match self.bits { - false => DISPLAYCNTEN_A::DISABLE, - true => DISPLAYCNTEN_A::ENABLE, + false => Displaycnten::Disable, + true => Displaycnten::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable the display counter"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == DISPLAYCNTEN_A::DISABLE + *self == Displaycnten::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enable the display counter"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == DISPLAYCNTEN_A::ENABLE + *self == Displaycnten::Enable } } #[doc = "Field `DISPLAYCNTEN` writer - Display Counter Enable"] -pub type DISPLAYCNTEN_W<'a, const O: u8> = - crate::BitWriter<'a, u32, BACTRL_SPEC, DISPLAYCNTEN_A, O>; -impl<'a, const O: u8> DISPLAYCNTEN_W<'a, O> { +pub type DisplaycntenW<'a, REG> = crate::BitWriter<'a, REG, Displaycnten>; +impl<'a, REG> DisplaycntenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable the display counter"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(DISPLAYCNTEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Displaycnten::Disable) } #[doc = "Enable the display counter"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(DISPLAYCNTEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Displaycnten::Enable) } } -#[doc = "Field `ALOC` reader - Animation Location"] -pub type ALOC_R = crate::BitReader; #[doc = "Animation Location\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ALOC_A { +pub enum Aloc { #[doc = "0: Animation appears on segments 0 to 7"] - SEG0TO7 = 0, + Seg0to7 = 0, #[doc = "1: Animation appears on segments 8 to 15"] - SEG8TO15 = 1, + Seg8to15 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ALOC_A) -> Self { + fn from(variant: Aloc) -> Self { variant as u8 != 0 } } -impl ALOC_R { +#[doc = "Field `ALOC` reader - Animation Location"] +pub type AlocR = crate::BitReader; +impl AlocR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ALOC_A { + pub const fn variant(&self) -> Aloc { match self.bits { - false => ALOC_A::SEG0TO7, - true => ALOC_A::SEG8TO15, + false => Aloc::Seg0to7, + true => Aloc::Seg8to15, } } - #[doc = "Checks if the value of the field is `SEG0TO7`"] + #[doc = "Animation appears on segments 0 to 7"] #[inline(always)] pub fn is_seg0to7(&self) -> bool { - *self == ALOC_A::SEG0TO7 + *self == Aloc::Seg0to7 } - #[doc = "Checks if the value of the field is `SEG8TO15`"] + #[doc = "Animation appears on segments 8 to 15"] #[inline(always)] pub fn is_seg8to15(&self) -> bool { - *self == ALOC_A::SEG8TO15 + *self == Aloc::Seg8to15 } } #[doc = "Field `ALOC` writer - Animation Location"] -pub type ALOC_W<'a, const O: u8> = crate::BitWriter<'a, u32, BACTRL_SPEC, ALOC_A, O>; -impl<'a, const O: u8> ALOC_W<'a, O> { +pub type AlocW<'a, REG> = crate::BitWriter<'a, REG, Aloc>; +impl<'a, REG> AlocW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Animation appears on segments 0 to 7"] #[inline(always)] - pub fn seg0to7(self) -> &'a mut W { - self.variant(ALOC_A::SEG0TO7) + pub fn seg0to7(self) -> &'a mut crate::W { + self.variant(Aloc::Seg0to7) } #[doc = "Animation appears on segments 8 to 15"] #[inline(always)] - pub fn seg8to15(self) -> &'a mut W { - self.variant(ALOC_A::SEG8TO15) + pub fn seg8to15(self) -> &'a mut crate::W { + self.variant(Aloc::Seg8to15) } } impl R { #[doc = "Bit 0 - Blink Enable"] #[inline(always)] - pub fn blinken(&self) -> BLINKEN_R { - BLINKEN_R::new((self.bits & 1) != 0) + pub fn blinken(&self) -> BlinkenR { + BlinkenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Blank Display"] #[inline(always)] - pub fn blank(&self) -> BLANK_R { - BLANK_R::new(((self.bits >> 1) & 1) != 0) + pub fn blank(&self) -> BlankR { + BlankR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Animation Enable"] #[inline(always)] - pub fn aen(&self) -> AEN_R { - AEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn aen(&self) -> AenR { + AenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 3:4 - Animate Register A Shift Control"] #[inline(always)] - pub fn aregasc(&self) -> AREGASC_R { - AREGASC_R::new(((self.bits >> 3) & 3) as u8) + pub fn aregasc(&self) -> AregascR { + AregascR::new(((self.bits >> 3) & 3) as u8) } #[doc = "Bits 5:6 - Animate Register B Shift Control"] #[inline(always)] - pub fn aregbsc(&self) -> AREGBSC_R { - AREGBSC_R::new(((self.bits >> 5) & 3) as u8) + pub fn aregbsc(&self) -> AregbscR { + AregbscR::new(((self.bits >> 5) & 3) as u8) } #[doc = "Bit 7 - Animate Logic Function Select"] #[inline(always)] - pub fn alogsel(&self) -> ALOGSEL_R { - ALOGSEL_R::new(((self.bits >> 7) & 1) != 0) + pub fn alogsel(&self) -> AlogselR { + AlogselR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Frame Counter Enable"] #[inline(always)] - pub fn fcen(&self) -> FCEN_R { - FCEN_R::new(((self.bits >> 8) & 1) != 0) + pub fn fcen(&self) -> FcenR { + FcenR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Display Counter Enable"] #[inline(always)] - pub fn displaycnten(&self) -> DISPLAYCNTEN_R { - DISPLAYCNTEN_R::new(((self.bits >> 9) & 1) != 0) + pub fn displaycnten(&self) -> DisplaycntenR { + DisplaycntenR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 28 - Animation Location"] #[inline(always)] - pub fn aloc(&self) -> ALOC_R { - ALOC_R::new(((self.bits >> 28) & 1) != 0) + pub fn aloc(&self) -> AlocR { + AlocR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bit 0 - Blink Enable"] #[inline(always)] #[must_use] - pub fn blinken(&mut self) -> BLINKEN_W<0> { - BLINKEN_W::new(self) + pub fn blinken(&mut self) -> BlinkenW { + BlinkenW::new(self, 0) } #[doc = "Bit 1 - Blank Display"] #[inline(always)] #[must_use] - pub fn blank(&mut self) -> BLANK_W<1> { - BLANK_W::new(self) + pub fn blank(&mut self) -> BlankW { + BlankW::new(self, 1) } #[doc = "Bit 2 - Animation Enable"] #[inline(always)] #[must_use] - pub fn aen(&mut self) -> AEN_W<2> { - AEN_W::new(self) + pub fn aen(&mut self) -> AenW { + AenW::new(self, 2) } #[doc = "Bits 3:4 - Animate Register A Shift Control"] #[inline(always)] #[must_use] - pub fn aregasc(&mut self) -> AREGASC_W<3> { - AREGASC_W::new(self) + pub fn aregasc(&mut self) -> AregascW { + AregascW::new(self, 3) } #[doc = "Bits 5:6 - Animate Register B Shift Control"] #[inline(always)] #[must_use] - pub fn aregbsc(&mut self) -> AREGBSC_W<5> { - AREGBSC_W::new(self) + pub fn aregbsc(&mut self) -> AregbscW { + AregbscW::new(self, 5) } #[doc = "Bit 7 - Animate Logic Function Select"] #[inline(always)] #[must_use] - pub fn alogsel(&mut self) -> ALOGSEL_W<7> { - ALOGSEL_W::new(self) + pub fn alogsel(&mut self) -> AlogselW { + AlogselW::new(self, 7) } #[doc = "Bit 8 - Frame Counter Enable"] #[inline(always)] #[must_use] - pub fn fcen(&mut self) -> FCEN_W<8> { - FCEN_W::new(self) + pub fn fcen(&mut self) -> FcenW { + FcenW::new(self, 8) } #[doc = "Bit 9 - Display Counter Enable"] #[inline(always)] #[must_use] - pub fn displaycnten(&mut self) -> DISPLAYCNTEN_W<9> { - DISPLAYCNTEN_W::new(self) + pub fn displaycnten(&mut self) -> DisplaycntenW { + DisplaycntenW::new(self, 9) } #[doc = "Bit 28 - Animation Location"] #[inline(always)] #[must_use] - pub fn aloc(&mut self) -> ALOC_W<28> { - ALOC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn aloc(&mut self) -> AlocW { + AlocW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bactrl](index.html) module"] -pub struct BACTRL_SPEC; -impl crate::RegisterSpec for BACTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bactrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bactrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct BactrlSpec; +impl crate::RegisterSpec for BactrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [bactrl::R](R) reader structure"] -impl crate::Readable for BACTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [bactrl::W](W) writer structure"] -impl crate::Writable for BACTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`bactrl::R`](R) reader structure"] +impl crate::Readable for BactrlSpec {} +#[doc = "`write(|w| ..)` method takes [`bactrl::W`](W) writer structure"] +impl crate::Writable for BactrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BACTRL to value 0"] -impl crate::Resettable for BACTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for BactrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/biasctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/biasctrl.rs index 9c3df34..26f063c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/biasctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/biasctrl.rs @@ -1,387 +1,364 @@ #[doc = "Register `BIASCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `BIASCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RESISTOR` reader - Resistor strength"] -pub type RESISTOR_R = crate::FieldReader; +pub type ResistorR = crate::FieldReader; #[doc = "Field `RESISTOR` writer - Resistor strength"] -pub type RESISTOR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BIASCTRL_SPEC, u8, u8, 4, O>; +pub type ResistorW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `BUFDRV` reader - Buffer Drive Strength"] -pub type BUFDRV_R = crate::FieldReader; +pub type BufdrvR = crate::FieldReader; #[doc = "Field `BUFDRV` writer - Buffer Drive Strength"] -pub type BUFDRV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BIASCTRL_SPEC, u8, u8, 3, O>; +pub type BufdrvW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `BUFBIAS` reader - Buffer Bias Setting"] -pub type BUFBIAS_R = crate::FieldReader; +pub type BufbiasR = crate::FieldReader; #[doc = "Field `BUFBIAS` writer - Buffer Bias Setting"] -pub type BUFBIAS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BIASCTRL_SPEC, u8, u8, 2, O>; -#[doc = "Field `MODE` reader - Mode Setting"] -pub type MODE_R = crate::BitReader; +pub type BufbiasW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Mode Setting\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Use step down control with VLCD less than VDDX. Use VLCD\\[4:0\\] to control VLCD level, and use SPEED to adjust VLCD drive strength."] - STEPDOWN = 0, + Stepdown = 0, #[doc = "1: Use the charge pump to pump VLCD above VDDX."] - CHARGEPUMP = 1, + Chargepump = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as u8 != 0 } } -impl MODE_R { +#[doc = "Field `MODE` reader - Mode Setting"] +pub type ModeR = crate::BitReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - false => MODE_A::STEPDOWN, - true => MODE_A::CHARGEPUMP, + false => Mode::Stepdown, + true => Mode::Chargepump, } } - #[doc = "Checks if the value of the field is `STEPDOWN`"] + #[doc = "Use step down control with VLCD less than VDDX. Use VLCD\\[4:0\\] +to control VLCD level, and use SPEED to adjust VLCD drive strength."] #[inline(always)] pub fn is_stepdown(&self) -> bool { - *self == MODE_A::STEPDOWN + *self == Mode::Stepdown } - #[doc = "Checks if the value of the field is `CHARGEPUMP`"] + #[doc = "Use the charge pump to pump VLCD above VDDX."] #[inline(always)] pub fn is_chargepump(&self) -> bool { - *self == MODE_A::CHARGEPUMP + *self == Mode::Chargepump } } #[doc = "Field `MODE` writer - Mode Setting"] -pub type MODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, BIASCTRL_SPEC, MODE_A, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::BitWriter<'a, REG, Mode>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Use step down control with VLCD less than VDDX. Use VLCD\\[4:0\\] to control VLCD level, and use SPEED to adjust VLCD drive strength."] #[inline(always)] - pub fn stepdown(self) -> &'a mut W { - self.variant(MODE_A::STEPDOWN) + pub fn stepdown(self) -> &'a mut crate::W { + self.variant(Mode::Stepdown) } #[doc = "Use the charge pump to pump VLCD above VDDX."] #[inline(always)] - pub fn chargepump(self) -> &'a mut W { - self.variant(MODE_A::CHARGEPUMP) + pub fn chargepump(self) -> &'a mut crate::W { + self.variant(Mode::Chargepump) } } #[doc = "Field `VLCD` reader - VLCD voltage level"] -pub type VLCD_R = crate::FieldReader; +pub type VlcdR = crate::FieldReader; #[doc = "Field `VLCD` writer - VLCD voltage level"] -pub type VLCD_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BIASCTRL_SPEC, u8, u8, 5, O>; -#[doc = "Field `VDDXSEL` reader - VDDX select"] -pub type VDDXSEL_R = crate::BitReader; +pub type VlcdW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "VDDX select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VDDXSEL_A { +pub enum Vddxsel { #[doc = "0: Connect charge pump to digital DVDD supply"] - DVDD = 0, + Dvdd = 0, #[doc = "1: Connect charge pump to analog AVDD supply"] - AVDD = 1, + Avdd = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VDDXSEL_A) -> Self { + fn from(variant: Vddxsel) -> Self { variant as u8 != 0 } } -impl VDDXSEL_R { +#[doc = "Field `VDDXSEL` reader - VDDX select"] +pub type VddxselR = crate::BitReader; +impl VddxselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> VDDXSEL_A { + pub const fn variant(&self) -> Vddxsel { match self.bits { - false => VDDXSEL_A::DVDD, - true => VDDXSEL_A::AVDD, + false => Vddxsel::Dvdd, + true => Vddxsel::Avdd, } } - #[doc = "Checks if the value of the field is `DVDD`"] + #[doc = "Connect charge pump to digital DVDD supply"] #[inline(always)] pub fn is_dvdd(&self) -> bool { - *self == VDDXSEL_A::DVDD + *self == Vddxsel::Dvdd } - #[doc = "Checks if the value of the field is `AVDD`"] + #[doc = "Connect charge pump to analog AVDD supply"] #[inline(always)] pub fn is_avdd(&self) -> bool { - *self == VDDXSEL_A::AVDD + *self == Vddxsel::Avdd } } #[doc = "Field `VDDXSEL` writer - VDDX select"] -pub type VDDXSEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, BIASCTRL_SPEC, VDDXSEL_A, O>; -impl<'a, const O: u8> VDDXSEL_W<'a, O> { +pub type VddxselW<'a, REG> = crate::BitWriter<'a, REG, Vddxsel>; +impl<'a, REG> VddxselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Connect charge pump to digital DVDD supply"] #[inline(always)] - pub fn dvdd(self) -> &'a mut W { - self.variant(VDDXSEL_A::DVDD) + pub fn dvdd(self) -> &'a mut crate::W { + self.variant(Vddxsel::Dvdd) } #[doc = "Connect charge pump to analog AVDD supply"] #[inline(always)] - pub fn avdd(self) -> &'a mut W { - self.variant(VDDXSEL_A::AVDD) + pub fn avdd(self) -> &'a mut crate::W { + self.variant(Vddxsel::Avdd) } } -#[doc = "Field `LCDGATE` reader - LCD Gate"] -pub type LCDGATE_R = crate::BitReader; #[doc = "LCD Gate\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LCDGATE_A { +pub enum Lcdgate { #[doc = "0: LCD BIAS voltages driven onto pins."] - UNGATE = 0, + Ungate = 0, #[doc = "1: LCD BIAS MUX tristated at the pins."] - GATE = 1, + Gate = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LCDGATE_A) -> Self { + fn from(variant: Lcdgate) -> Self { variant as u8 != 0 } } -impl LCDGATE_R { +#[doc = "Field `LCDGATE` reader - LCD Gate"] +pub type LcdgateR = crate::BitReader; +impl LcdgateR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LCDGATE_A { + pub const fn variant(&self) -> Lcdgate { match self.bits { - false => LCDGATE_A::UNGATE, - true => LCDGATE_A::GATE, + false => Lcdgate::Ungate, + true => Lcdgate::Gate, } } - #[doc = "Checks if the value of the field is `UNGATE`"] + #[doc = "LCD BIAS voltages driven onto pins."] #[inline(always)] pub fn is_ungate(&self) -> bool { - *self == LCDGATE_A::UNGATE + *self == Lcdgate::Ungate } - #[doc = "Checks if the value of the field is `GATE`"] + #[doc = "LCD BIAS MUX tristated at the pins."] #[inline(always)] pub fn is_gate(&self) -> bool { - *self == LCDGATE_A::GATE + *self == Lcdgate::Gate } } #[doc = "Field `LCDGATE` writer - LCD Gate"] -pub type LCDGATE_W<'a, const O: u8> = crate::BitWriter<'a, u32, BIASCTRL_SPEC, LCDGATE_A, O>; -impl<'a, const O: u8> LCDGATE_W<'a, O> { +pub type LcdgateW<'a, REG> = crate::BitWriter<'a, REG, Lcdgate>; +impl<'a, REG> LcdgateW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "LCD BIAS voltages driven onto pins."] #[inline(always)] - pub fn ungate(self) -> &'a mut W { - self.variant(LCDGATE_A::UNGATE) + pub fn ungate(self) -> &'a mut crate::W { + self.variant(Lcdgate::Ungate) } #[doc = "LCD BIAS MUX tristated at the pins."] #[inline(always)] - pub fn gate(self) -> &'a mut W { - self.variant(LCDGATE_A::GATE) + pub fn gate(self) -> &'a mut crate::W { + self.variant(Lcdgate::Gate) } } -#[doc = "Field `DMAMODE` reader - DMA Mode"] -pub type DMAMODE_R = crate::FieldReader; #[doc = "DMA Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DMAMODE_A { +pub enum Dmamode { #[doc = "0: No DMA requests are generated"] - DMADISABLE = 0, + Dmadisable = 0, #[doc = "1: DMA request on frame counter event. This will also start a DMA transfer during EM23."] - DMAFC = 1, + Dmafc = 1, #[doc = "2: DMA request on display counter event. This will also start a DMA transfer during EM23."] - DMADISPLAY = 2, + Dmadisplay = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DMAMODE_A) -> Self { + fn from(variant: Dmamode) -> Self { variant as _ } } -impl DMAMODE_R { +impl crate::FieldSpec for Dmamode { + type Ux = u8; +} +impl crate::IsEnum for Dmamode {} +#[doc = "Field `DMAMODE` reader - DMA Mode"] +pub type DmamodeR = crate::FieldReader; +impl DmamodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(DMAMODE_A::DMADISABLE), - 1 => Some(DMAMODE_A::DMAFC), - 2 => Some(DMAMODE_A::DMADISPLAY), + 0 => Some(Dmamode::Dmadisable), + 1 => Some(Dmamode::Dmafc), + 2 => Some(Dmamode::Dmadisplay), _ => None, } } - #[doc = "Checks if the value of the field is `DMADISABLE`"] + #[doc = "No DMA requests are generated"] #[inline(always)] pub fn is_dmadisable(&self) -> bool { - *self == DMAMODE_A::DMADISABLE + *self == Dmamode::Dmadisable } - #[doc = "Checks if the value of the field is `DMAFC`"] + #[doc = "DMA request on frame counter event. This will also start a DMA transfer during EM23."] #[inline(always)] pub fn is_dmafc(&self) -> bool { - *self == DMAMODE_A::DMAFC + *self == Dmamode::Dmafc } - #[doc = "Checks if the value of the field is `DMADISPLAY`"] + #[doc = "DMA request on display counter event. This will also start a DMA transfer during EM23."] #[inline(always)] pub fn is_dmadisplay(&self) -> bool { - *self == DMAMODE_A::DMADISPLAY + *self == Dmamode::Dmadisplay } } #[doc = "Field `DMAMODE` writer - DMA Mode"] -pub type DMAMODE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, BIASCTRL_SPEC, u8, DMAMODE_A, 2, O>; -impl<'a, const O: u8> DMAMODE_W<'a, O> { +pub type DmamodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dmamode>; +impl<'a, REG> DmamodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No DMA requests are generated"] #[inline(always)] - pub fn dmadisable(self) -> &'a mut W { - self.variant(DMAMODE_A::DMADISABLE) + pub fn dmadisable(self) -> &'a mut crate::W { + self.variant(Dmamode::Dmadisable) } #[doc = "DMA request on frame counter event. This will also start a DMA transfer during EM23."] #[inline(always)] - pub fn dmafc(self) -> &'a mut W { - self.variant(DMAMODE_A::DMAFC) + pub fn dmafc(self) -> &'a mut crate::W { + self.variant(Dmamode::Dmafc) } #[doc = "DMA request on display counter event. This will also start a DMA transfer during EM23."] #[inline(always)] - pub fn dmadisplay(self) -> &'a mut W { - self.variant(DMAMODE_A::DMADISPLAY) + pub fn dmadisplay(self) -> &'a mut crate::W { + self.variant(Dmamode::Dmadisplay) } } impl R { #[doc = "Bits 0:3 - Resistor strength"] #[inline(always)] - pub fn resistor(&self) -> RESISTOR_R { - RESISTOR_R::new((self.bits & 0x0f) as u8) + pub fn resistor(&self) -> ResistorR { + ResistorR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:6 - Buffer Drive Strength"] #[inline(always)] - pub fn bufdrv(&self) -> BUFDRV_R { - BUFDRV_R::new(((self.bits >> 4) & 7) as u8) + pub fn bufdrv(&self) -> BufdrvR { + BufdrvR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:9 - Buffer Bias Setting"] #[inline(always)] - pub fn bufbias(&self) -> BUFBIAS_R { - BUFBIAS_R::new(((self.bits >> 8) & 3) as u8) + pub fn bufbias(&self) -> BufbiasR { + BufbiasR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 12 - Mode Setting"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new(((self.bits >> 12) & 1) != 0) + pub fn mode(&self) -> ModeR { + ModeR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bits 16:20 - VLCD voltage level"] #[inline(always)] - pub fn vlcd(&self) -> VLCD_R { - VLCD_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn vlcd(&self) -> VlcdR { + VlcdR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bit 22 - VDDX select"] #[inline(always)] - pub fn vddxsel(&self) -> VDDXSEL_R { - VDDXSEL_R::new(((self.bits >> 22) & 1) != 0) + pub fn vddxsel(&self) -> VddxselR { + VddxselR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 26 - LCD Gate"] #[inline(always)] - pub fn lcdgate(&self) -> LCDGATE_R { - LCDGATE_R::new(((self.bits >> 26) & 1) != 0) + pub fn lcdgate(&self) -> LcdgateR { + LcdgateR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bits 30:31 - DMA Mode"] #[inline(always)] - pub fn dmamode(&self) -> DMAMODE_R { - DMAMODE_R::new(((self.bits >> 30) & 3) as u8) + pub fn dmamode(&self) -> DmamodeR { + DmamodeR::new(((self.bits >> 30) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - Resistor strength"] #[inline(always)] #[must_use] - pub fn resistor(&mut self) -> RESISTOR_W<0> { - RESISTOR_W::new(self) + pub fn resistor(&mut self) -> ResistorW { + ResistorW::new(self, 0) } #[doc = "Bits 4:6 - Buffer Drive Strength"] #[inline(always)] #[must_use] - pub fn bufdrv(&mut self) -> BUFDRV_W<4> { - BUFDRV_W::new(self) + pub fn bufdrv(&mut self) -> BufdrvW { + BufdrvW::new(self, 4) } #[doc = "Bits 8:9 - Buffer Bias Setting"] #[inline(always)] #[must_use] - pub fn bufbias(&mut self) -> BUFBIAS_W<8> { - BUFBIAS_W::new(self) + pub fn bufbias(&mut self) -> BufbiasW { + BufbiasW::new(self, 8) } #[doc = "Bit 12 - Mode Setting"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<12> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 12) } #[doc = "Bits 16:20 - VLCD voltage level"] #[inline(always)] #[must_use] - pub fn vlcd(&mut self) -> VLCD_W<16> { - VLCD_W::new(self) + pub fn vlcd(&mut self) -> VlcdW { + VlcdW::new(self, 16) } #[doc = "Bit 22 - VDDX select"] #[inline(always)] #[must_use] - pub fn vddxsel(&mut self) -> VDDXSEL_W<22> { - VDDXSEL_W::new(self) + pub fn vddxsel(&mut self) -> VddxselW { + VddxselW::new(self, 22) } #[doc = "Bit 26 - LCD Gate"] #[inline(always)] #[must_use] - pub fn lcdgate(&mut self) -> LCDGATE_W<26> { - LCDGATE_W::new(self) + pub fn lcdgate(&mut self) -> LcdgateW { + LcdgateW::new(self, 26) } #[doc = "Bits 30:31 - DMA Mode"] #[inline(always)] #[must_use] - pub fn dmamode(&mut self) -> DMAMODE_W<30> { - DMAMODE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dmamode(&mut self) -> DmamodeW { + DmamodeW::new(self, 30) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [biasctrl](index.html) module"] -pub struct BIASCTRL_SPEC; -impl crate::RegisterSpec for BIASCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`biasctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`biasctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct BiasctrlSpec; +impl crate::RegisterSpec for BiasctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [biasctrl::R](R) reader structure"] -impl crate::Readable for BIASCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [biasctrl::W](W) writer structure"] -impl crate::Writable for BIASCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`biasctrl::R`](R) reader structure"] +impl crate::Readable for BiasctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`biasctrl::W`](W) writer structure"] +impl crate::Writable for BiasctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BIASCTRL to value 0x001f_0000"] -impl crate::Resettable for BIASCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x001f_0000; +impl crate::Resettable for BiasctrlSpec { + const RESET_VALUE: u32 = 0x001f_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/cmd.rs index 5681f4a..314f692 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/cmd.rs @@ -1,60 +1,35 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOAD` writer - Load command"] -pub type LOAD_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type LoadW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEAR` writer - Clear command"] -pub type CLEAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type ClearW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Load command"] #[inline(always)] #[must_use] - pub fn load(&mut self) -> LOAD_W<0> { - LOAD_W::new(self) + pub fn load(&mut self) -> LoadW { + LoadW::new(self, 0) } #[doc = "Bit 1 - Clear command"] #[inline(always)] #[must_use] - pub fn clear(&mut self) -> CLEAR_W<1> { - CLEAR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clear(&mut self) -> ClearW { + ClearW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/ctrl.rs index 8a6f3a7..a26f481 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/ctrl.rs @@ -1,372 +1,350 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `UDCTRL` reader - Update Data Control"] -pub type UDCTRL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Update Data Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum UDCTRL_A { +pub enum Udctrl { #[doc = "0: The data transfer is controlled by SW. Transfer is performed as soon as possible on the next CTRL.PRESCALE clock. This is primarily available for debug only since only some of the new SEGMENT data may be ready by the time of the UPDATE. This should not be used with interrupts since partially updating SEGMENT data may have indeterminant results."] - REGULAR = 0, + Regular = 0, #[doc = "1: Data is loaded continuously at every frame start"] - FRAMESTART = 1, + Framestart = 1, #[doc = "2: The data transfer is done at the next Frame Counter event"] - FCEVENT = 2, + Fcevent = 2, #[doc = "3: The data transfer is done at the next Display Counter event"] - DISPLAYEVENT = 3, + Displayevent = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: UDCTRL_A) -> Self { + fn from(variant: Udctrl) -> Self { variant as _ } } -impl UDCTRL_R { +impl crate::FieldSpec for Udctrl { + type Ux = u8; +} +impl crate::IsEnum for Udctrl {} +#[doc = "Field `UDCTRL` reader - Update Data Control"] +pub type UdctrlR = crate::FieldReader; +impl UdctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> UDCTRL_A { + pub const fn variant(&self) -> Udctrl { match self.bits { - 0 => UDCTRL_A::REGULAR, - 1 => UDCTRL_A::FRAMESTART, - 2 => UDCTRL_A::FCEVENT, - 3 => UDCTRL_A::DISPLAYEVENT, + 0 => Udctrl::Regular, + 1 => Udctrl::Framestart, + 2 => Udctrl::Fcevent, + 3 => Udctrl::Displayevent, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `REGULAR`"] + #[doc = "The data transfer is controlled by SW. Transfer is performed as soon as possible on the next CTRL.PRESCALE clock. This is primarily available for debug only since only some of the new SEGMENT data may be ready by the time of the UPDATE. This should not be used with interrupts since partially updating SEGMENT data may have indeterminant results."] #[inline(always)] pub fn is_regular(&self) -> bool { - *self == UDCTRL_A::REGULAR + *self == Udctrl::Regular } - #[doc = "Checks if the value of the field is `FRAMESTART`"] + #[doc = "Data is loaded continuously at every frame start"] #[inline(always)] pub fn is_framestart(&self) -> bool { - *self == UDCTRL_A::FRAMESTART + *self == Udctrl::Framestart } - #[doc = "Checks if the value of the field is `FCEVENT`"] + #[doc = "The data transfer is done at the next Frame Counter event"] #[inline(always)] pub fn is_fcevent(&self) -> bool { - *self == UDCTRL_A::FCEVENT + *self == Udctrl::Fcevent } - #[doc = "Checks if the value of the field is `DISPLAYEVENT`"] + #[doc = "The data transfer is done at the next Display Counter event"] #[inline(always)] pub fn is_displayevent(&self) -> bool { - *self == UDCTRL_A::DISPLAYEVENT + *self == Udctrl::Displayevent } } #[doc = "Field `UDCTRL` writer - Update Data Control"] -pub type UDCTRL_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, UDCTRL_A, 2, O>; -impl<'a, const O: u8> UDCTRL_W<'a, O> { +pub type UdctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Udctrl, crate::Safe>; +impl<'a, REG> UdctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The data transfer is controlled by SW. Transfer is performed as soon as possible on the next CTRL.PRESCALE clock. This is primarily available for debug only since only some of the new SEGMENT data may be ready by the time of the UPDATE. This should not be used with interrupts since partially updating SEGMENT data may have indeterminant results."] #[inline(always)] - pub fn regular(self) -> &'a mut W { - self.variant(UDCTRL_A::REGULAR) + pub fn regular(self) -> &'a mut crate::W { + self.variant(Udctrl::Regular) } #[doc = "Data is loaded continuously at every frame start"] #[inline(always)] - pub fn framestart(self) -> &'a mut W { - self.variant(UDCTRL_A::FRAMESTART) + pub fn framestart(self) -> &'a mut crate::W { + self.variant(Udctrl::Framestart) } #[doc = "The data transfer is done at the next Frame Counter event"] #[inline(always)] - pub fn fcevent(self) -> &'a mut W { - self.variant(UDCTRL_A::FCEVENT) + pub fn fcevent(self) -> &'a mut crate::W { + self.variant(Udctrl::Fcevent) } #[doc = "The data transfer is done at the next Display Counter event"] #[inline(always)] - pub fn displayevent(self) -> &'a mut W { - self.variant(UDCTRL_A::DISPLAYEVENT) + pub fn displayevent(self) -> &'a mut crate::W { + self.variant(Udctrl::Displayevent) } } -#[doc = "Field `DSC` reader - Direct Segment Control"] -pub type DSC_R = crate::BitReader; #[doc = "Direct Segment Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSC_A { +pub enum Dsc { #[doc = "0: DSC disable"] - DISABLE = 0, + Disable = 0, #[doc = "1: DSC enable"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSC_A) -> Self { + fn from(variant: Dsc) -> Self { variant as u8 != 0 } } -impl DSC_R { +#[doc = "Field `DSC` reader - Direct Segment Control"] +pub type DscR = crate::BitReader; +impl DscR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSC_A { + pub const fn variant(&self) -> Dsc { match self.bits { - false => DSC_A::DISABLE, - true => DSC_A::ENABLE, + false => Dsc::Disable, + true => Dsc::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "DSC disable"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == DSC_A::DISABLE + *self == Dsc::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "DSC enable"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == DSC_A::ENABLE + *self == Dsc::Enable } } #[doc = "Field `DSC` writer - Direct Segment Control"] -pub type DSC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, DSC_A, O>; -impl<'a, const O: u8> DSC_W<'a, O> { +pub type DscW<'a, REG> = crate::BitWriter<'a, REG, Dsc>; +impl<'a, REG> DscW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "DSC disable"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(DSC_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Dsc::Disable) } #[doc = "DSC enable"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(DSC_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Dsc::Enable) } } -#[doc = "Field `WARMUPDLY` reader - Warmup Delay"] -pub type WARMUPDLY_R = crate::FieldReader; #[doc = "Warmup Delay\n\nValue on reset: 4"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WARMUPDLY_A { +pub enum Warmupdly { #[doc = "0: 1mswarm up"] - WARMUP1 = 0, + Warmup1 = 0, #[doc = "1: 31ms warm up"] - WARMUP31 = 1, + Warmup31 = 1, #[doc = "2: 62ms warm up"] - WARMUP63 = 2, + Warmup63 = 2, #[doc = "3: 125ms warm up"] - WARMUP125 = 3, + Warmup125 = 3, #[doc = "4: 250ms warm up"] - WARMUP250 = 4, + Warmup250 = 4, #[doc = "5: 500ms warm up"] - WARMUP500 = 5, + Warmup500 = 5, #[doc = "6: 1000ms warm up"] - WARMUP1000 = 6, + Warmup1000 = 6, #[doc = "7: 2000ms warm up"] - WARMUP2000 = 7, + Warmup2000 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WARMUPDLY_A) -> Self { + fn from(variant: Warmupdly) -> Self { variant as _ } } -impl WARMUPDLY_R { +impl crate::FieldSpec for Warmupdly { + type Ux = u8; +} +impl crate::IsEnum for Warmupdly {} +#[doc = "Field `WARMUPDLY` reader - Warmup Delay"] +pub type WarmupdlyR = crate::FieldReader; +impl WarmupdlyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> WARMUPDLY_A { + pub const fn variant(&self) -> Warmupdly { match self.bits { - 0 => WARMUPDLY_A::WARMUP1, - 1 => WARMUPDLY_A::WARMUP31, - 2 => WARMUPDLY_A::WARMUP63, - 3 => WARMUPDLY_A::WARMUP125, - 4 => WARMUPDLY_A::WARMUP250, - 5 => WARMUPDLY_A::WARMUP500, - 6 => WARMUPDLY_A::WARMUP1000, - 7 => WARMUPDLY_A::WARMUP2000, + 0 => Warmupdly::Warmup1, + 1 => Warmupdly::Warmup31, + 2 => Warmupdly::Warmup63, + 3 => Warmupdly::Warmup125, + 4 => Warmupdly::Warmup250, + 5 => Warmupdly::Warmup500, + 6 => Warmupdly::Warmup1000, + 7 => Warmupdly::Warmup2000, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `WARMUP1`"] + #[doc = "1mswarm up"] #[inline(always)] pub fn is_warmup1(&self) -> bool { - *self == WARMUPDLY_A::WARMUP1 + *self == Warmupdly::Warmup1 } - #[doc = "Checks if the value of the field is `WARMUP31`"] + #[doc = "31ms warm up"] #[inline(always)] pub fn is_warmup31(&self) -> bool { - *self == WARMUPDLY_A::WARMUP31 + *self == Warmupdly::Warmup31 } - #[doc = "Checks if the value of the field is `WARMUP63`"] + #[doc = "62ms warm up"] #[inline(always)] pub fn is_warmup63(&self) -> bool { - *self == WARMUPDLY_A::WARMUP63 + *self == Warmupdly::Warmup63 } - #[doc = "Checks if the value of the field is `WARMUP125`"] + #[doc = "125ms warm up"] #[inline(always)] pub fn is_warmup125(&self) -> bool { - *self == WARMUPDLY_A::WARMUP125 + *self == Warmupdly::Warmup125 } - #[doc = "Checks if the value of the field is `WARMUP250`"] + #[doc = "250ms warm up"] #[inline(always)] pub fn is_warmup250(&self) -> bool { - *self == WARMUPDLY_A::WARMUP250 + *self == Warmupdly::Warmup250 } - #[doc = "Checks if the value of the field is `WARMUP500`"] + #[doc = "500ms warm up"] #[inline(always)] pub fn is_warmup500(&self) -> bool { - *self == WARMUPDLY_A::WARMUP500 + *self == Warmupdly::Warmup500 } - #[doc = "Checks if the value of the field is `WARMUP1000`"] + #[doc = "1000ms warm up"] #[inline(always)] pub fn is_warmup1000(&self) -> bool { - *self == WARMUPDLY_A::WARMUP1000 + *self == Warmupdly::Warmup1000 } - #[doc = "Checks if the value of the field is `WARMUP2000`"] + #[doc = "2000ms warm up"] #[inline(always)] pub fn is_warmup2000(&self) -> bool { - *self == WARMUPDLY_A::WARMUP2000 + *self == Warmupdly::Warmup2000 } } #[doc = "Field `WARMUPDLY` writer - Warmup Delay"] -pub type WARMUPDLY_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, WARMUPDLY_A, 3, O>; -impl<'a, const O: u8> WARMUPDLY_W<'a, O> { +pub type WarmupdlyW<'a, REG> = crate::FieldWriter<'a, REG, 3, Warmupdly, crate::Safe>; +impl<'a, REG> WarmupdlyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "1mswarm up"] #[inline(always)] - pub fn warmup1(self) -> &'a mut W { - self.variant(WARMUPDLY_A::WARMUP1) + pub fn warmup1(self) -> &'a mut crate::W { + self.variant(Warmupdly::Warmup1) } #[doc = "31ms warm up"] #[inline(always)] - pub fn warmup31(self) -> &'a mut W { - self.variant(WARMUPDLY_A::WARMUP31) + pub fn warmup31(self) -> &'a mut crate::W { + self.variant(Warmupdly::Warmup31) } #[doc = "62ms warm up"] #[inline(always)] - pub fn warmup63(self) -> &'a mut W { - self.variant(WARMUPDLY_A::WARMUP63) + pub fn warmup63(self) -> &'a mut crate::W { + self.variant(Warmupdly::Warmup63) } #[doc = "125ms warm up"] #[inline(always)] - pub fn warmup125(self) -> &'a mut W { - self.variant(WARMUPDLY_A::WARMUP125) + pub fn warmup125(self) -> &'a mut crate::W { + self.variant(Warmupdly::Warmup125) } #[doc = "250ms warm up"] #[inline(always)] - pub fn warmup250(self) -> &'a mut W { - self.variant(WARMUPDLY_A::WARMUP250) + pub fn warmup250(self) -> &'a mut crate::W { + self.variant(Warmupdly::Warmup250) } #[doc = "500ms warm up"] #[inline(always)] - pub fn warmup500(self) -> &'a mut W { - self.variant(WARMUPDLY_A::WARMUP500) + pub fn warmup500(self) -> &'a mut crate::W { + self.variant(Warmupdly::Warmup500) } #[doc = "1000ms warm up"] #[inline(always)] - pub fn warmup1000(self) -> &'a mut W { - self.variant(WARMUPDLY_A::WARMUP1000) + pub fn warmup1000(self) -> &'a mut crate::W { + self.variant(Warmupdly::Warmup1000) } #[doc = "2000ms warm up"] #[inline(always)] - pub fn warmup2000(self) -> &'a mut W { - self.variant(WARMUPDLY_A::WARMUP2000) + pub fn warmup2000(self) -> &'a mut crate::W { + self.variant(Warmupdly::Warmup2000) } } #[doc = "Field `PRESCALE` reader - Presclae"] -pub type PRESCALE_R = crate::FieldReader; +pub type PrescaleR = crate::FieldReader; #[doc = "Field `PRESCALE` writer - Presclae"] -pub type PRESCALE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, u8, 7, O>; +pub type PrescaleW<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { #[doc = "Bits 1:2 - Update Data Control"] #[inline(always)] - pub fn udctrl(&self) -> UDCTRL_R { - UDCTRL_R::new(((self.bits >> 1) & 3) as u8) + pub fn udctrl(&self) -> UdctrlR { + UdctrlR::new(((self.bits >> 1) & 3) as u8) } #[doc = "Bit 16 - Direct Segment Control"] #[inline(always)] - pub fn dsc(&self) -> DSC_R { - DSC_R::new(((self.bits >> 16) & 1) != 0) + pub fn dsc(&self) -> DscR { + DscR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bits 18:20 - Warmup Delay"] #[inline(always)] - pub fn warmupdly(&self) -> WARMUPDLY_R { - WARMUPDLY_R::new(((self.bits >> 18) & 7) as u8) + pub fn warmupdly(&self) -> WarmupdlyR { + WarmupdlyR::new(((self.bits >> 18) & 7) as u8) } #[doc = "Bits 24:30 - Presclae"] #[inline(always)] - pub fn prescale(&self) -> PRESCALE_R { - PRESCALE_R::new(((self.bits >> 24) & 0x7f) as u8) + pub fn prescale(&self) -> PrescaleR { + PrescaleR::new(((self.bits >> 24) & 0x7f) as u8) } } impl W { #[doc = "Bits 1:2 - Update Data Control"] #[inline(always)] #[must_use] - pub fn udctrl(&mut self) -> UDCTRL_W<1> { - UDCTRL_W::new(self) + pub fn udctrl(&mut self) -> UdctrlW { + UdctrlW::new(self, 1) } #[doc = "Bit 16 - Direct Segment Control"] #[inline(always)] #[must_use] - pub fn dsc(&mut self) -> DSC_W<16> { - DSC_W::new(self) + pub fn dsc(&mut self) -> DscW { + DscW::new(self, 16) } #[doc = "Bits 18:20 - Warmup Delay"] #[inline(always)] #[must_use] - pub fn warmupdly(&mut self) -> WARMUPDLY_W<18> { - WARMUPDLY_W::new(self) + pub fn warmupdly(&mut self) -> WarmupdlyW { + WarmupdlyW::new(self, 18) } #[doc = "Bits 24:30 - Presclae"] #[inline(always)] #[must_use] - pub fn prescale(&mut self) -> PRESCALE_W<24> { - PRESCALE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prescale(&mut self) -> PrescaleW { + PrescaleW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0x0010_0000"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0010_0000; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0x0010_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/dispctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/dispctrl.rs index 586b0b4..27bdc3d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/dispctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/dispctrl.rs @@ -1,407 +1,393 @@ #[doc = "Register `DISPCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DISPCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MUX` reader - Mux Configuration"] -pub type MUX_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Mux Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MUX_A { +pub enum Mux { #[doc = "0: Static"] - STATIC = 0, + Static = 0, #[doc = "1: Duplex"] - DUPLEX = 1, + Duplex = 1, #[doc = "2: Triplex"] - TRIPLEX = 2, + Triplex = 2, #[doc = "3: Quadruplex"] - QUADRUPLEX = 3, + Quadruplex = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MUX_A) -> Self { + fn from(variant: Mux) -> Self { variant as _ } } -impl MUX_R { +impl crate::FieldSpec for Mux { + type Ux = u8; +} +impl crate::IsEnum for Mux {} +#[doc = "Field `MUX` reader - Mux Configuration"] +pub type MuxR = crate::FieldReader; +impl MuxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(MUX_A::STATIC), - 1 => Some(MUX_A::DUPLEX), - 2 => Some(MUX_A::TRIPLEX), - 3 => Some(MUX_A::QUADRUPLEX), + 0 => Some(Mux::Static), + 1 => Some(Mux::Duplex), + 2 => Some(Mux::Triplex), + 3 => Some(Mux::Quadruplex), _ => None, } } - #[doc = "Checks if the value of the field is `STATIC`"] + #[doc = "Static"] #[inline(always)] pub fn is_static(&self) -> bool { - *self == MUX_A::STATIC + *self == Mux::Static } - #[doc = "Checks if the value of the field is `DUPLEX`"] + #[doc = "Duplex"] #[inline(always)] pub fn is_duplex(&self) -> bool { - *self == MUX_A::DUPLEX + *self == Mux::Duplex } - #[doc = "Checks if the value of the field is `TRIPLEX`"] + #[doc = "Triplex"] #[inline(always)] pub fn is_triplex(&self) -> bool { - *self == MUX_A::TRIPLEX + *self == Mux::Triplex } - #[doc = "Checks if the value of the field is `QUADRUPLEX`"] + #[doc = "Quadruplex"] #[inline(always)] pub fn is_quadruplex(&self) -> bool { - *self == MUX_A::QUADRUPLEX + *self == Mux::Quadruplex } } #[doc = "Field `MUX` writer - Mux Configuration"] -pub type MUX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DISPCTRL_SPEC, u8, MUX_A, 3, O>; -impl<'a, const O: u8> MUX_W<'a, O> { +pub type MuxW<'a, REG> = crate::FieldWriter<'a, REG, 3, Mux>; +impl<'a, REG> MuxW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Static"] #[inline(always)] - pub fn static_(self) -> &'a mut W { - self.variant(MUX_A::STATIC) + pub fn static_(self) -> &'a mut crate::W { + self.variant(Mux::Static) } #[doc = "Duplex"] #[inline(always)] - pub fn duplex(self) -> &'a mut W { - self.variant(MUX_A::DUPLEX) + pub fn duplex(self) -> &'a mut crate::W { + self.variant(Mux::Duplex) } #[doc = "Triplex"] #[inline(always)] - pub fn triplex(self) -> &'a mut W { - self.variant(MUX_A::TRIPLEX) + pub fn triplex(self) -> &'a mut crate::W { + self.variant(Mux::Triplex) } #[doc = "Quadruplex"] #[inline(always)] - pub fn quadruplex(self) -> &'a mut W { - self.variant(MUX_A::QUADRUPLEX) + pub fn quadruplex(self) -> &'a mut crate::W { + self.variant(Mux::Quadruplex) } } -#[doc = "Field `WAVE` reader - Waveform Selection"] -pub type WAVE_R = crate::BitReader; #[doc = "Waveform Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WAVE_A { +pub enum Wave { #[doc = "0: Type B waveform"] - TYPEB = 0, + Typeb = 0, #[doc = "1: Type A waveform"] - TYPEA = 1, + Typea = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WAVE_A) -> Self { + fn from(variant: Wave) -> Self { variant as u8 != 0 } } -impl WAVE_R { +#[doc = "Field `WAVE` reader - Waveform Selection"] +pub type WaveR = crate::BitReader; +impl WaveR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> WAVE_A { + pub const fn variant(&self) -> Wave { match self.bits { - false => WAVE_A::TYPEB, - true => WAVE_A::TYPEA, + false => Wave::Typeb, + true => Wave::Typea, } } - #[doc = "Checks if the value of the field is `TYPEB`"] + #[doc = "Type B waveform"] #[inline(always)] pub fn is_typeb(&self) -> bool { - *self == WAVE_A::TYPEB + *self == Wave::Typeb } - #[doc = "Checks if the value of the field is `TYPEA`"] + #[doc = "Type A waveform"] #[inline(always)] pub fn is_typea(&self) -> bool { - *self == WAVE_A::TYPEA + *self == Wave::Typea } } #[doc = "Field `WAVE` writer - Waveform Selection"] -pub type WAVE_W<'a, const O: u8> = crate::BitWriter<'a, u32, DISPCTRL_SPEC, WAVE_A, O>; -impl<'a, const O: u8> WAVE_W<'a, O> { +pub type WaveW<'a, REG> = crate::BitWriter<'a, REG, Wave>; +impl<'a, REG> WaveW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Type B waveform"] #[inline(always)] - pub fn typeb(self) -> &'a mut W { - self.variant(WAVE_A::TYPEB) + pub fn typeb(self) -> &'a mut crate::W { + self.variant(Wave::Typeb) } #[doc = "Type A waveform"] #[inline(always)] - pub fn typea(self) -> &'a mut W { - self.variant(WAVE_A::TYPEA) + pub fn typea(self) -> &'a mut crate::W { + self.variant(Wave::Typea) } } -#[doc = "Field `CHGRDST` reader - Charge Redistribution Cycles"] -pub type CHGRDST_R = crate::FieldReader; #[doc = "Charge Redistribution Cycles\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CHGRDST_A { +pub enum Chgrdst { #[doc = "0: Disable charge redistribution."] - DISABLE = 0, + Disable = 0, #[doc = "1: Use 1 prescaled low frequency clock cycle for charge redistribution."] - ONE = 1, + One = 1, #[doc = "2: Use 2 prescaled low frequency clock cycles for charge redistribution."] - TWO = 2, + Two = 2, #[doc = "3: Use 3 prescaled low frequency clock cycles for charge redistribution."] - THREE = 3, + Three = 3, #[doc = "4: Use 4 prescaled low frequency clock cycles for charge redistribution."] - FOUR = 4, + Four = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CHGRDST_A) -> Self { + fn from(variant: Chgrdst) -> Self { variant as _ } } -impl CHGRDST_R { +impl crate::FieldSpec for Chgrdst { + type Ux = u8; +} +impl crate::IsEnum for Chgrdst {} +#[doc = "Field `CHGRDST` reader - Charge Redistribution Cycles"] +pub type ChgrdstR = crate::FieldReader; +impl ChgrdstR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CHGRDST_A::DISABLE), - 1 => Some(CHGRDST_A::ONE), - 2 => Some(CHGRDST_A::TWO), - 3 => Some(CHGRDST_A::THREE), - 4 => Some(CHGRDST_A::FOUR), + 0 => Some(Chgrdst::Disable), + 1 => Some(Chgrdst::One), + 2 => Some(Chgrdst::Two), + 3 => Some(Chgrdst::Three), + 4 => Some(Chgrdst::Four), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable charge redistribution."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CHGRDST_A::DISABLE + *self == Chgrdst::Disable } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Use 1 prescaled low frequency clock cycle for charge redistribution."] #[inline(always)] pub fn is_one(&self) -> bool { - *self == CHGRDST_A::ONE + *self == Chgrdst::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Use 2 prescaled low frequency clock cycles for charge redistribution."] #[inline(always)] pub fn is_two(&self) -> bool { - *self == CHGRDST_A::TWO + *self == Chgrdst::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "Use 3 prescaled low frequency clock cycles for charge redistribution."] #[inline(always)] pub fn is_three(&self) -> bool { - *self == CHGRDST_A::THREE + *self == Chgrdst::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Use 4 prescaled low frequency clock cycles for charge redistribution."] #[inline(always)] pub fn is_four(&self) -> bool { - *self == CHGRDST_A::FOUR + *self == Chgrdst::Four } } #[doc = "Field `CHGRDST` writer - Charge Redistribution Cycles"] -pub type CHGRDST_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, DISPCTRL_SPEC, u8, CHGRDST_A, 3, O>; -impl<'a, const O: u8> CHGRDST_W<'a, O> { +pub type ChgrdstW<'a, REG> = crate::FieldWriter<'a, REG, 3, Chgrdst>; +impl<'a, REG> ChgrdstW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Disable charge redistribution."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CHGRDST_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Chgrdst::Disable) } #[doc = "Use 1 prescaled low frequency clock cycle for charge redistribution."] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(CHGRDST_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Chgrdst::One) } #[doc = "Use 2 prescaled low frequency clock cycles for charge redistribution."] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(CHGRDST_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Chgrdst::Two) } #[doc = "Use 3 prescaled low frequency clock cycles for charge redistribution."] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(CHGRDST_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Chgrdst::Three) } #[doc = "Use 4 prescaled low frequency clock cycles for charge redistribution."] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(CHGRDST_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Chgrdst::Four) } } -#[doc = "Field `BIAS` reader - Bias Configuration"] -pub type BIAS_R = crate::FieldReader; #[doc = "Bias Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BIAS_A { +pub enum Bias { #[doc = "0: Static"] - STATIC = 0, + Static = 0, #[doc = "1: 1/2 Bias"] - ONEHALF = 1, + Onehalf = 1, #[doc = "2: 1/3 Bias"] - ONETHIRD = 2, + Onethird = 2, #[doc = "3: 1/4 Bias"] - ONEFOURTH = 3, + Onefourth = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BIAS_A) -> Self { + fn from(variant: Bias) -> Self { variant as _ } } -impl BIAS_R { +impl crate::FieldSpec for Bias { + type Ux = u8; +} +impl crate::IsEnum for Bias {} +#[doc = "Field `BIAS` reader - Bias Configuration"] +pub type BiasR = crate::FieldReader; +impl BiasR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> BIAS_A { + pub const fn variant(&self) -> Bias { match self.bits { - 0 => BIAS_A::STATIC, - 1 => BIAS_A::ONEHALF, - 2 => BIAS_A::ONETHIRD, - 3 => BIAS_A::ONEFOURTH, + 0 => Bias::Static, + 1 => Bias::Onehalf, + 2 => Bias::Onethird, + 3 => Bias::Onefourth, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `STATIC`"] + #[doc = "Static"] #[inline(always)] pub fn is_static(&self) -> bool { - *self == BIAS_A::STATIC + *self == Bias::Static } - #[doc = "Checks if the value of the field is `ONEHALF`"] + #[doc = "1/2 Bias"] #[inline(always)] pub fn is_onehalf(&self) -> bool { - *self == BIAS_A::ONEHALF + *self == Bias::Onehalf } - #[doc = "Checks if the value of the field is `ONETHIRD`"] + #[doc = "1/3 Bias"] #[inline(always)] pub fn is_onethird(&self) -> bool { - *self == BIAS_A::ONETHIRD + *self == Bias::Onethird } - #[doc = "Checks if the value of the field is `ONEFOURTH`"] + #[doc = "1/4 Bias"] #[inline(always)] pub fn is_onefourth(&self) -> bool { - *self == BIAS_A::ONEFOURTH + *self == Bias::Onefourth } } #[doc = "Field `BIAS` writer - Bias Configuration"] -pub type BIAS_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, DISPCTRL_SPEC, u8, BIAS_A, 2, O>; -impl<'a, const O: u8> BIAS_W<'a, O> { +pub type BiasW<'a, REG> = crate::FieldWriter<'a, REG, 2, Bias, crate::Safe>; +impl<'a, REG> BiasW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Static"] #[inline(always)] - pub fn static_(self) -> &'a mut W { - self.variant(BIAS_A::STATIC) + pub fn static_(self) -> &'a mut crate::W { + self.variant(Bias::Static) } #[doc = "1/2 Bias"] #[inline(always)] - pub fn onehalf(self) -> &'a mut W { - self.variant(BIAS_A::ONEHALF) + pub fn onehalf(self) -> &'a mut crate::W { + self.variant(Bias::Onehalf) } #[doc = "1/3 Bias"] #[inline(always)] - pub fn onethird(self) -> &'a mut W { - self.variant(BIAS_A::ONETHIRD) + pub fn onethird(self) -> &'a mut crate::W { + self.variant(Bias::Onethird) } #[doc = "1/4 Bias"] #[inline(always)] - pub fn onefourth(self) -> &'a mut W { - self.variant(BIAS_A::ONEFOURTH) + pub fn onefourth(self) -> &'a mut crate::W { + self.variant(Bias::Onefourth) } } impl R { #[doc = "Bits 0:2 - Mux Configuration"] #[inline(always)] - pub fn mux(&self) -> MUX_R { - MUX_R::new((self.bits & 7) as u8) + pub fn mux(&self) -> MuxR { + MuxR::new((self.bits & 7) as u8) } #[doc = "Bit 4 - Waveform Selection"] #[inline(always)] - pub fn wave(&self) -> WAVE_R { - WAVE_R::new(((self.bits >> 4) & 1) != 0) + pub fn wave(&self) -> WaveR { + WaveR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 20:22 - Charge Redistribution Cycles"] #[inline(always)] - pub fn chgrdst(&self) -> CHGRDST_R { - CHGRDST_R::new(((self.bits >> 20) & 7) as u8) + pub fn chgrdst(&self) -> ChgrdstR { + ChgrdstR::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:25 - Bias Configuration"] #[inline(always)] - pub fn bias(&self) -> BIAS_R { - BIAS_R::new(((self.bits >> 24) & 3) as u8) + pub fn bias(&self) -> BiasR { + BiasR::new(((self.bits >> 24) & 3) as u8) } } impl W { #[doc = "Bits 0:2 - Mux Configuration"] #[inline(always)] #[must_use] - pub fn mux(&mut self) -> MUX_W<0> { - MUX_W::new(self) + pub fn mux(&mut self) -> MuxW { + MuxW::new(self, 0) } #[doc = "Bit 4 - Waveform Selection"] #[inline(always)] #[must_use] - pub fn wave(&mut self) -> WAVE_W<4> { - WAVE_W::new(self) + pub fn wave(&mut self) -> WaveW { + WaveW::new(self, 4) } #[doc = "Bits 20:22 - Charge Redistribution Cycles"] #[inline(always)] #[must_use] - pub fn chgrdst(&mut self) -> CHGRDST_W<20> { - CHGRDST_W::new(self) + pub fn chgrdst(&mut self) -> ChgrdstW { + ChgrdstW::new(self, 20) } #[doc = "Bits 24:25 - Bias Configuration"] #[inline(always)] #[must_use] - pub fn bias(&mut self) -> BIAS_W<24> { - BIAS_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn bias(&mut self) -> BiasW { + BiasW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dispctrl](index.html) module"] -pub struct DISPCTRL_SPEC; -impl crate::RegisterSpec for DISPCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dispctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dispctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DispctrlSpec; +impl crate::RegisterSpec for DispctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [dispctrl::R](R) reader structure"] -impl crate::Readable for DISPCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dispctrl::W](W) writer structure"] -impl crate::Writable for DISPCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dispctrl::R`](R) reader structure"] +impl crate::Readable for DispctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`dispctrl::W`](W) writer structure"] +impl crate::Writable for DispctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DISPCTRL to value 0x0010_0000"] -impl crate::Resettable for DISPCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0010_0000; +impl crate::Resettable for DispctrlSpec { + const RESET_VALUE: u32 = 0x0010_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/dispctrlx.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/dispctrlx.rs index 3d10a41..0a994e5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/dispctrlx.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/dispctrlx.rs @@ -1,81 +1,40 @@ #[doc = "Register `DISPCTRLX` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DISPCTRLX` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DISPLAYDIV` reader - Display Divider"] -pub type DISPLAYDIV_R = crate::FieldReader; +pub type DisplaydivR = crate::FieldReader; #[doc = "Field `DISPLAYDIV` writer - Display Divider"] -pub type DISPLAYDIV_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, DISPCTRLX_SPEC, u16, u16, 10, O>; +pub type DisplaydivW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; impl R { #[doc = "Bits 0:9 - Display Divider"] #[inline(always)] - pub fn displaydiv(&self) -> DISPLAYDIV_R { - DISPLAYDIV_R::new((self.bits & 0x03ff) as u16) + pub fn displaydiv(&self) -> DisplaydivR { + DisplaydivR::new((self.bits & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:9 - Display Divider"] #[inline(always)] #[must_use] - pub fn displaydiv(&mut self) -> DISPLAYDIV_W<0> { - DISPLAYDIV_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn displaydiv(&mut self) -> DisplaydivW { + DisplaydivW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dispctrlx](index.html) module"] -pub struct DISPCTRLX_SPEC; -impl crate::RegisterSpec for DISPCTRLX_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dispctrlx::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dispctrlx::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DispctrlxSpec; +impl crate::RegisterSpec for DispctrlxSpec { type Ux = u32; } -#[doc = "`read()` method returns [dispctrlx::R](R) reader structure"] -impl crate::Readable for DISPCTRLX_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dispctrlx::W](W) writer structure"] -impl crate::Writable for DISPCTRLX_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dispctrlx::R`](R) reader structure"] +impl crate::Readable for DispctrlxSpec {} +#[doc = "`write(|w| ..)` method takes [`dispctrlx::W`](W) writer structure"] +impl crate::Writable for DispctrlxSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DISPCTRLX to value 0"] -impl crate::Resettable for DISPCTRLX_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DispctrlxSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/en.rs index 595be46..f3a0c0a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/en.rs @@ -1,133 +1,96 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EN` reader - Enable"] -pub type EN_R = crate::BitReader; +pub type W = crate::W; #[doc = "Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EN_A { +pub enum En { #[doc = "0: Disable"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enable"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EN_A) -> Self { + fn from(variant: En) -> Self { variant as u8 != 0 } } -impl EN_R { +#[doc = "Field `EN` reader - Enable"] +pub type EnR = crate::BitReader; +impl EnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EN_A { + pub const fn variant(&self) -> En { match self.bits { - false => EN_A::DISABLE, - true => EN_A::ENABLE, + false => En::Disable, + true => En::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EN_A::DISABLE + *self == En::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enable"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EN_A::ENABLE + *self == En::Enable } } #[doc = "Field `EN` writer - Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, EN_A, O>; -impl<'a, const O: u8> EN_W<'a, O> { +pub type EnW<'a, REG> = crate::BitWriter<'a, REG, En>; +impl<'a, REG> EnW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(En::Disable) } #[doc = "Enable"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(En::Enable) } } #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/framerate.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/framerate.rs index 4358079..4a370a5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/framerate.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/framerate.rs @@ -1,80 +1,40 @@ #[doc = "Register `FRAMERATE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `FRAMERATE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `FRDIV` reader - Frame Rate Divider"] -pub type FRDIV_R = crate::FieldReader; +pub type FrdivR = crate::FieldReader; #[doc = "Field `FRDIV` writer - Frame Rate Divider"] -pub type FRDIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, FRAMERATE_SPEC, u16, u16, 9, O>; +pub type FrdivW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; impl R { #[doc = "Bits 0:8 - Frame Rate Divider"] #[inline(always)] - pub fn frdiv(&self) -> FRDIV_R { - FRDIV_R::new((self.bits & 0x01ff) as u16) + pub fn frdiv(&self) -> FrdivR { + FrdivR::new((self.bits & 0x01ff) as u16) } } impl W { #[doc = "Bits 0:8 - Frame Rate Divider"] #[inline(always)] #[must_use] - pub fn frdiv(&mut self) -> FRDIV_W<0> { - FRDIV_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn frdiv(&mut self) -> FrdivW { + FrdivW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [framerate](index.html) module"] -pub struct FRAMERATE_SPEC; -impl crate::RegisterSpec for FRAMERATE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`framerate::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`framerate::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct FramerateSpec; +impl crate::RegisterSpec for FramerateSpec { type Ux = u32; } -#[doc = "`read()` method returns [framerate::R](R) reader structure"] -impl crate::Readable for FRAMERATE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [framerate::W](W) writer structure"] -impl crate::Writable for FRAMERATE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`framerate::R`](R) reader structure"] +impl crate::Readable for FramerateSpec {} +#[doc = "`write(|w| ..)` method takes [`framerate::W`](W) writer structure"] +impl crate::Writable for FramerateSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FRAMERATE to value 0"] -impl crate::Resettable for FRAMERATE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for FramerateSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/ien.rs index b7c7d79..bf905f0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/ien.rs @@ -1,110 +1,70 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `FC` reader - Frame Counter"] -pub type FC_R = crate::BitReader; +pub type FcR = crate::BitReader; #[doc = "Field `FC` writer - Frame Counter"] -pub type FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISPLAY` reader - Display Update Event"] -pub type DISPLAY_R = crate::BitReader; +pub type DisplayR = crate::BitReader; #[doc = "Field `DISPLAY` writer - Display Update Event"] -pub type DISPLAY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type DisplayW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYNCBUSYDONE` reader - Sync Busy Done"] -pub type SYNCBUSYDONE_R = crate::BitReader; +pub type SyncbusydoneR = crate::BitReader; #[doc = "Field `SYNCBUSYDONE` writer - Sync Busy Done"] -pub type SYNCBUSYDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SyncbusydoneW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Frame Counter"] #[inline(always)] - pub fn fc(&self) -> FC_R { - FC_R::new((self.bits & 1) != 0) + pub fn fc(&self) -> FcR { + FcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Display Update Event"] #[inline(always)] - pub fn display(&self) -> DISPLAY_R { - DISPLAY_R::new(((self.bits >> 1) & 1) != 0) + pub fn display(&self) -> DisplayR { + DisplayR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Sync Busy Done"] #[inline(always)] - pub fn syncbusydone(&self) -> SYNCBUSYDONE_R { - SYNCBUSYDONE_R::new(((self.bits >> 2) & 1) != 0) + pub fn syncbusydone(&self) -> SyncbusydoneR { + SyncbusydoneR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Frame Counter"] #[inline(always)] #[must_use] - pub fn fc(&mut self) -> FC_W<0> { - FC_W::new(self) + pub fn fc(&mut self) -> FcW { + FcW::new(self, 0) } #[doc = "Bit 1 - Display Update Event"] #[inline(always)] #[must_use] - pub fn display(&mut self) -> DISPLAY_W<1> { - DISPLAY_W::new(self) + pub fn display(&mut self) -> DisplayW { + DisplayW::new(self, 1) } #[doc = "Bit 2 - Sync Busy Done"] #[inline(always)] #[must_use] - pub fn syncbusydone(&mut self) -> SYNCBUSYDONE_W<2> { - SYNCBUSYDONE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn syncbusydone(&mut self) -> SyncbusydoneW { + SyncbusydoneW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/if_.rs index 51ba600..e3d02d1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/if_.rs @@ -1,110 +1,70 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `FC` reader - Frame Counter"] -pub type FC_R = crate::BitReader; +pub type FcR = crate::BitReader; #[doc = "Field `FC` writer - Frame Counter"] -pub type FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISPLAY` reader - Display Update Event"] -pub type DISPLAY_R = crate::BitReader; +pub type DisplayR = crate::BitReader; #[doc = "Field `DISPLAY` writer - Display Update Event"] -pub type DISPLAY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type DisplayW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYNCBUSYDONE` reader - Synchronization is Done"] -pub type SYNCBUSYDONE_R = crate::BitReader; +pub type SyncbusydoneR = crate::BitReader; #[doc = "Field `SYNCBUSYDONE` writer - Synchronization is Done"] -pub type SYNCBUSYDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SyncbusydoneW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Frame Counter"] #[inline(always)] - pub fn fc(&self) -> FC_R { - FC_R::new((self.bits & 1) != 0) + pub fn fc(&self) -> FcR { + FcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Display Update Event"] #[inline(always)] - pub fn display(&self) -> DISPLAY_R { - DISPLAY_R::new(((self.bits >> 1) & 1) != 0) + pub fn display(&self) -> DisplayR { + DisplayR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Synchronization is Done"] #[inline(always)] - pub fn syncbusydone(&self) -> SYNCBUSYDONE_R { - SYNCBUSYDONE_R::new(((self.bits >> 2) & 1) != 0) + pub fn syncbusydone(&self) -> SyncbusydoneR { + SyncbusydoneR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Frame Counter"] #[inline(always)] #[must_use] - pub fn fc(&mut self) -> FC_W<0> { - FC_W::new(self) + pub fn fc(&mut self) -> FcW { + FcW::new(self, 0) } #[doc = "Bit 1 - Display Update Event"] #[inline(always)] #[must_use] - pub fn display(&mut self) -> DISPLAY_W<1> { - DISPLAY_W::new(self) + pub fn display(&mut self) -> DisplayW { + DisplayW::new(self, 1) } #[doc = "Bit 2 - Synchronization is Done"] #[inline(always)] #[must_use] - pub fn syncbusydone(&mut self) -> SYNCBUSYDONE_W<2> { - SYNCBUSYDONE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn syncbusydone(&mut self) -> SyncbusydoneW { + SyncbusydoneW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/ipversion.rs index 84368b2..1f3dd4e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IPVERSION"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IPVERSION"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/segd0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/segd0.rs index 70762d1..8f8933c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/segd0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/segd0.rs @@ -1,80 +1,40 @@ #[doc = "Register `SEGD0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SEGD0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SEGD0` reader - COM0 Segment Data Low"] -pub type SEGD0_R = crate::FieldReader; +pub type Segd0R = crate::FieldReader; #[doc = "Field `SEGD0` writer - COM0 Segment Data Low"] -pub type SEGD0_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SEGD0_SPEC, u32, u32, 20, O>; +pub type Segd0W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { #[doc = "Bits 0:19 - COM0 Segment Data Low"] #[inline(always)] - pub fn segd0(&self) -> SEGD0_R { - SEGD0_R::new(self.bits & 0x000f_ffff) + pub fn segd0(&self) -> Segd0R { + Segd0R::new(self.bits & 0x000f_ffff) } } impl W { #[doc = "Bits 0:19 - COM0 Segment Data Low"] #[inline(always)] #[must_use] - pub fn segd0(&mut self) -> SEGD0_W<0> { - SEGD0_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn segd0(&mut self) -> Segd0W { + Segd0W::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [segd0](index.html) module"] -pub struct SEGD0_SPEC; -impl crate::RegisterSpec for SEGD0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`segd0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`segd0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Segd0Spec; +impl crate::RegisterSpec for Segd0Spec { type Ux = u32; } -#[doc = "`read()` method returns [segd0::R](R) reader structure"] -impl crate::Readable for SEGD0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [segd0::W](W) writer structure"] -impl crate::Writable for SEGD0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`segd0::R`](R) reader structure"] +impl crate::Readable for Segd0Spec {} +#[doc = "`write(|w| ..)` method takes [`segd0::W`](W) writer structure"] +impl crate::Writable for Segd0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SEGD0 to value 0"] -impl crate::Resettable for SEGD0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Segd0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/segd1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/segd1.rs index b0c4b33..95821c6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/segd1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/segd1.rs @@ -1,80 +1,40 @@ #[doc = "Register `SEGD1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SEGD1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SEGD1` reader - COM1 Segment Data Low"] -pub type SEGD1_R = crate::FieldReader; +pub type Segd1R = crate::FieldReader; #[doc = "Field `SEGD1` writer - COM1 Segment Data Low"] -pub type SEGD1_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SEGD1_SPEC, u32, u32, 20, O>; +pub type Segd1W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { #[doc = "Bits 0:19 - COM1 Segment Data Low"] #[inline(always)] - pub fn segd1(&self) -> SEGD1_R { - SEGD1_R::new(self.bits & 0x000f_ffff) + pub fn segd1(&self) -> Segd1R { + Segd1R::new(self.bits & 0x000f_ffff) } } impl W { #[doc = "Bits 0:19 - COM1 Segment Data Low"] #[inline(always)] #[must_use] - pub fn segd1(&mut self) -> SEGD1_W<0> { - SEGD1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn segd1(&mut self) -> Segd1W { + Segd1W::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [segd1](index.html) module"] -pub struct SEGD1_SPEC; -impl crate::RegisterSpec for SEGD1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`segd1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`segd1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Segd1Spec; +impl crate::RegisterSpec for Segd1Spec { type Ux = u32; } -#[doc = "`read()` method returns [segd1::R](R) reader structure"] -impl crate::Readable for SEGD1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [segd1::W](W) writer structure"] -impl crate::Writable for SEGD1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`segd1::R`](R) reader structure"] +impl crate::Readable for Segd1Spec {} +#[doc = "`write(|w| ..)` method takes [`segd1::W`](W) writer structure"] +impl crate::Writable for Segd1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SEGD1 to value 0"] -impl crate::Resettable for SEGD1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Segd1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/segd2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/segd2.rs index d91cb1e..d32969e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/segd2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/segd2.rs @@ -1,80 +1,40 @@ #[doc = "Register `SEGD2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SEGD2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SEGD2` reader - COM2 Segment Data Low"] -pub type SEGD2_R = crate::FieldReader; +pub type Segd2R = crate::FieldReader; #[doc = "Field `SEGD2` writer - COM2 Segment Data Low"] -pub type SEGD2_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SEGD2_SPEC, u32, u32, 20, O>; +pub type Segd2W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { #[doc = "Bits 0:19 - COM2 Segment Data Low"] #[inline(always)] - pub fn segd2(&self) -> SEGD2_R { - SEGD2_R::new(self.bits & 0x000f_ffff) + pub fn segd2(&self) -> Segd2R { + Segd2R::new(self.bits & 0x000f_ffff) } } impl W { #[doc = "Bits 0:19 - COM2 Segment Data Low"] #[inline(always)] #[must_use] - pub fn segd2(&mut self) -> SEGD2_W<0> { - SEGD2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn segd2(&mut self) -> Segd2W { + Segd2W::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [segd2](index.html) module"] -pub struct SEGD2_SPEC; -impl crate::RegisterSpec for SEGD2_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`segd2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`segd2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Segd2Spec; +impl crate::RegisterSpec for Segd2Spec { type Ux = u32; } -#[doc = "`read()` method returns [segd2::R](R) reader structure"] -impl crate::Readable for SEGD2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [segd2::W](W) writer structure"] -impl crate::Writable for SEGD2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`segd2::R`](R) reader structure"] +impl crate::Readable for Segd2Spec {} +#[doc = "`write(|w| ..)` method takes [`segd2::W`](W) writer structure"] +impl crate::Writable for Segd2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SEGD2 to value 0"] -impl crate::Resettable for SEGD2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Segd2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/segd3.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/segd3.rs index e7a0498..45303a1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/segd3.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/segd3.rs @@ -1,80 +1,40 @@ #[doc = "Register `SEGD3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SEGD3` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SEGD3` reader - COM3 Segment Data Low"] -pub type SEGD3_R = crate::FieldReader; +pub type Segd3R = crate::FieldReader; #[doc = "Field `SEGD3` writer - COM3 Segment Data Low"] -pub type SEGD3_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SEGD3_SPEC, u32, u32, 20, O>; +pub type Segd3W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { #[doc = "Bits 0:19 - COM3 Segment Data Low"] #[inline(always)] - pub fn segd3(&self) -> SEGD3_R { - SEGD3_R::new(self.bits & 0x000f_ffff) + pub fn segd3(&self) -> Segd3R { + Segd3R::new(self.bits & 0x000f_ffff) } } impl W { #[doc = "Bits 0:19 - COM3 Segment Data Low"] #[inline(always)] #[must_use] - pub fn segd3(&mut self) -> SEGD3_W<0> { - SEGD3_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn segd3(&mut self) -> Segd3W { + Segd3W::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [segd3](index.html) module"] -pub struct SEGD3_SPEC; -impl crate::RegisterSpec for SEGD3_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`segd3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`segd3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Segd3Spec; +impl crate::RegisterSpec for Segd3Spec { type Ux = u32; } -#[doc = "`read()` method returns [segd3::R](R) reader structure"] -impl crate::Readable for SEGD3_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [segd3::W](W) writer structure"] -impl crate::Writable for SEGD3_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`segd3::R`](R) reader structure"] +impl crate::Readable for Segd3Spec {} +#[doc = "`write(|w| ..)` method takes [`segd3::W`](W) writer structure"] +impl crate::Writable for Segd3Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SEGD3 to value 0"] -impl crate::Resettable for SEGD3_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Segd3Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/status.rs index 45d458f..de9bdd2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/status.rs @@ -1,51 +1,36 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ASTATE` reader - Current Animation State"] -pub type ASTATE_R = crate::FieldReader; +pub type AstateR = crate::FieldReader; #[doc = "Field `BLINK` reader - Blink State"] -pub type BLINK_R = crate::BitReader; +pub type BlinkR = crate::BitReader; #[doc = "Field `LOADBUSY` reader - Load Synchronization is busy"] -pub type LOADBUSY_R = crate::BitReader; +pub type LoadbusyR = crate::BitReader; impl R { #[doc = "Bits 0:3 - Current Animation State"] #[inline(always)] - pub fn astate(&self) -> ASTATE_R { - ASTATE_R::new((self.bits & 0x0f) as u8) + pub fn astate(&self) -> AstateR { + AstateR::new((self.bits & 0x0f) as u8) } #[doc = "Bit 8 - Blink State"] #[inline(always)] - pub fn blink(&self) -> BLINK_R { - BLINK_R::new(((self.bits >> 8) & 1) != 0) + pub fn blink(&self) -> BlinkR { + BlinkR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 11 - Load Synchronization is busy"] #[inline(always)] - pub fn loadbusy(&self) -> LOADBUSY_R { - LOADBUSY_R::new(((self.bits >> 11) & 1) != 0) + pub fn loadbusy(&self) -> LoadbusyR { + LoadbusyR::new(((self.bits >> 11) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/swrst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/swrst.rs index afd978e..804eaff 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/swrst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/swrst.rs @@ -1,80 +1,40 @@ #[doc = "Register `SWRST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SWRST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SWRST` writer - Software reset command"] -pub type SWRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, SWRST_SPEC, bool, O>; +pub type SwrstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESETTING` reader - Software reset busy status"] -pub type RESETTING_R = crate::BitReader; +pub type ResettingR = crate::BitReader; impl R { #[doc = "Bit 1 - Software reset busy status"] #[inline(always)] - pub fn resetting(&self) -> RESETTING_R { - RESETTING_R::new(((self.bits >> 1) & 1) != 0) + pub fn resetting(&self) -> ResettingR { + ResettingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Software reset command"] #[inline(always)] #[must_use] - pub fn swrst(&mut self) -> SWRST_W<0> { - SWRST_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn swrst(&mut self) -> SwrstW { + SwrstW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swrst](index.html) module"] -pub struct SWRST_SPEC; -impl crate::RegisterSpec for SWRST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SwrstSpec; +impl crate::RegisterSpec for SwrstSpec { type Ux = u32; } -#[doc = "`read()` method returns [swrst::R](R) reader structure"] -impl crate::Readable for SWRST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [swrst::W](W) writer structure"] -impl crate::Writable for SWRST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`swrst::R`](R) reader structure"] +impl crate::Readable for SwrstSpec {} +#[doc = "`write(|w| ..)` method takes [`swrst::W`](W) writer structure"] +impl crate::Writable for SwrstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWRST to value 0"] -impl crate::Resettable for SWRST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SwrstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/updatectrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/updatectrl.rs index 99d0a03..18f8cfb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/updatectrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcd_s/updatectrl.rs @@ -1,255 +1,225 @@ #[doc = "Register `UPDATECTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `UPDATECTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `AUTOLOAD` reader - Auto Load"] -pub type AUTOLOAD_R = crate::BitReader; +pub type W = crate::W; #[doc = "Auto Load\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AUTOLOAD_A { +pub enum Autoload { #[doc = "0: CLK_BUS register to CLK_PER register loads must be done manually with a write to CMD.LOAD."] - MANUAL = 0, + Manual = 0, #[doc = "1: CLK_BUS register to CLK_PER register loads will be started automatically after a write to the register in UPDATECTRL.LOADADDR is detected."] - AUTO = 1, + Auto = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AUTOLOAD_A) -> Self { + fn from(variant: Autoload) -> Self { variant as u8 != 0 } } -impl AUTOLOAD_R { +#[doc = "Field `AUTOLOAD` reader - Auto Load"] +pub type AutoloadR = crate::BitReader; +impl AutoloadR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> AUTOLOAD_A { + pub const fn variant(&self) -> Autoload { match self.bits { - false => AUTOLOAD_A::MANUAL, - true => AUTOLOAD_A::AUTO, + false => Autoload::Manual, + true => Autoload::Auto, } } - #[doc = "Checks if the value of the field is `MANUAL`"] + #[doc = "CLK_BUS register to CLK_PER register loads must be done manually with a write to CMD.LOAD."] #[inline(always)] pub fn is_manual(&self) -> bool { - *self == AUTOLOAD_A::MANUAL + *self == Autoload::Manual } - #[doc = "Checks if the value of the field is `AUTO`"] + #[doc = "CLK_BUS register to CLK_PER register loads will be started automatically after a write to the register in UPDATECTRL.LOADADDR is detected."] #[inline(always)] pub fn is_auto(&self) -> bool { - *self == AUTOLOAD_A::AUTO + *self == Autoload::Auto } } #[doc = "Field `AUTOLOAD` writer - Auto Load"] -pub type AUTOLOAD_W<'a, const O: u8> = crate::BitWriter<'a, u32, UPDATECTRL_SPEC, AUTOLOAD_A, O>; -impl<'a, const O: u8> AUTOLOAD_W<'a, O> { +pub type AutoloadW<'a, REG> = crate::BitWriter<'a, REG, Autoload>; +impl<'a, REG> AutoloadW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "CLK_BUS register to CLK_PER register loads must be done manually with a write to CMD.LOAD."] #[inline(always)] - pub fn manual(self) -> &'a mut W { - self.variant(AUTOLOAD_A::MANUAL) + pub fn manual(self) -> &'a mut crate::W { + self.variant(Autoload::Manual) } #[doc = "CLK_BUS register to CLK_PER register loads will be started automatically after a write to the register in UPDATECTRL.LOADADDR is detected."] #[inline(always)] - pub fn auto(self) -> &'a mut W { - self.variant(AUTOLOAD_A::AUTO) + pub fn auto(self) -> &'a mut crate::W { + self.variant(Autoload::Auto) } } -#[doc = "Field `LOADADDR` reader - Load Address"] -pub type LOADADDR_R = crate::FieldReader; #[doc = "Load Address\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LOADADDR_A { +pub enum Loadaddr { #[doc = "0: Starts synchronizing registers from CLK_BUS to CLK_PER after a write to BACTRL. Use with UPDATECTRL.AUTOLOAD"] - BACTRLWR = 0, + Bactrlwr = 0, #[doc = "1: Starts synchronizing registers from CLK_BUS to CLK_PER after a write to AREGA. Use with UPDATECTRL.AUTOLOAD"] - AREGAWR = 1, + Aregawr = 1, #[doc = "2: Starts synchronizing registers from CLK_BUS to CLK_PER after a write to AREGB. Use with UPDATECTRL.AUTOLOAD"] - AREGBWR = 2, + Aregbwr = 2, #[doc = "3: Starts synchronizing registers from CLK_BUS to CLK_PER after a write to SEGD0. Use with UPDATECTRL.AUTOLOAD"] - SEGD0WR = 3, + Segd0wr = 3, #[doc = "4: Starts synchronizing registers from CLK_BUS to CLK_PER after a write to SEGD1. Use with UPDATECTRL.AUTOLOAD"] - SEGD1WR = 4, + Segd1wr = 4, #[doc = "5: Starts synchronizing registers from CLK_BUS to CLK_PER after a write to SEGD2. Use with UPDATECTRL.AUTOLOAD"] - SEGD2WR = 5, + Segd2wr = 5, #[doc = "6: Starts synchronizing registers from CLK_BUS to CLK_PER after a write to SEGD3. Use with UPDATECTRL.AUTOLOAD"] - SEGD3WR = 6, + Segd3wr = 6, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LOADADDR_A) -> Self { + fn from(variant: Loadaddr) -> Self { variant as _ } } -impl LOADADDR_R { +impl crate::FieldSpec for Loadaddr { + type Ux = u8; +} +impl crate::IsEnum for Loadaddr {} +#[doc = "Field `LOADADDR` reader - Load Address"] +pub type LoadaddrR = crate::FieldReader; +impl LoadaddrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(LOADADDR_A::BACTRLWR), - 1 => Some(LOADADDR_A::AREGAWR), - 2 => Some(LOADADDR_A::AREGBWR), - 3 => Some(LOADADDR_A::SEGD0WR), - 4 => Some(LOADADDR_A::SEGD1WR), - 5 => Some(LOADADDR_A::SEGD2WR), - 6 => Some(LOADADDR_A::SEGD3WR), + 0 => Some(Loadaddr::Bactrlwr), + 1 => Some(Loadaddr::Aregawr), + 2 => Some(Loadaddr::Aregbwr), + 3 => Some(Loadaddr::Segd0wr), + 4 => Some(Loadaddr::Segd1wr), + 5 => Some(Loadaddr::Segd2wr), + 6 => Some(Loadaddr::Segd3wr), _ => None, } } - #[doc = "Checks if the value of the field is `BACTRLWR`"] + #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to BACTRL. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] pub fn is_bactrlwr(&self) -> bool { - *self == LOADADDR_A::BACTRLWR + *self == Loadaddr::Bactrlwr } - #[doc = "Checks if the value of the field is `AREGAWR`"] + #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to AREGA. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] pub fn is_aregawr(&self) -> bool { - *self == LOADADDR_A::AREGAWR + *self == Loadaddr::Aregawr } - #[doc = "Checks if the value of the field is `AREGBWR`"] + #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to AREGB. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] pub fn is_aregbwr(&self) -> bool { - *self == LOADADDR_A::AREGBWR + *self == Loadaddr::Aregbwr } - #[doc = "Checks if the value of the field is `SEGD0WR`"] + #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to SEGD0. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] pub fn is_segd0wr(&self) -> bool { - *self == LOADADDR_A::SEGD0WR + *self == Loadaddr::Segd0wr } - #[doc = "Checks if the value of the field is `SEGD1WR`"] + #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to SEGD1. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] pub fn is_segd1wr(&self) -> bool { - *self == LOADADDR_A::SEGD1WR + *self == Loadaddr::Segd1wr } - #[doc = "Checks if the value of the field is `SEGD2WR`"] + #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to SEGD2. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] pub fn is_segd2wr(&self) -> bool { - *self == LOADADDR_A::SEGD2WR + *self == Loadaddr::Segd2wr } - #[doc = "Checks if the value of the field is `SEGD3WR`"] + #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to SEGD3. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] pub fn is_segd3wr(&self) -> bool { - *self == LOADADDR_A::SEGD3WR + *self == Loadaddr::Segd3wr } } #[doc = "Field `LOADADDR` writer - Load Address"] -pub type LOADADDR_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, UPDATECTRL_SPEC, u8, LOADADDR_A, 4, O>; -impl<'a, const O: u8> LOADADDR_W<'a, O> { +pub type LoadaddrW<'a, REG> = crate::FieldWriter<'a, REG, 4, Loadaddr>; +impl<'a, REG> LoadaddrW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to BACTRL. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] - pub fn bactrlwr(self) -> &'a mut W { - self.variant(LOADADDR_A::BACTRLWR) + pub fn bactrlwr(self) -> &'a mut crate::W { + self.variant(Loadaddr::Bactrlwr) } #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to AREGA. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] - pub fn aregawr(self) -> &'a mut W { - self.variant(LOADADDR_A::AREGAWR) + pub fn aregawr(self) -> &'a mut crate::W { + self.variant(Loadaddr::Aregawr) } #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to AREGB. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] - pub fn aregbwr(self) -> &'a mut W { - self.variant(LOADADDR_A::AREGBWR) + pub fn aregbwr(self) -> &'a mut crate::W { + self.variant(Loadaddr::Aregbwr) } #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to SEGD0. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] - pub fn segd0wr(self) -> &'a mut W { - self.variant(LOADADDR_A::SEGD0WR) + pub fn segd0wr(self) -> &'a mut crate::W { + self.variant(Loadaddr::Segd0wr) } #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to SEGD1. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] - pub fn segd1wr(self) -> &'a mut W { - self.variant(LOADADDR_A::SEGD1WR) + pub fn segd1wr(self) -> &'a mut crate::W { + self.variant(Loadaddr::Segd1wr) } #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to SEGD2. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] - pub fn segd2wr(self) -> &'a mut W { - self.variant(LOADADDR_A::SEGD2WR) + pub fn segd2wr(self) -> &'a mut crate::W { + self.variant(Loadaddr::Segd2wr) } #[doc = "Starts synchronizing registers from CLK_BUS to CLK_PER after a write to SEGD3. Use with UPDATECTRL.AUTOLOAD"] #[inline(always)] - pub fn segd3wr(self) -> &'a mut W { - self.variant(LOADADDR_A::SEGD3WR) + pub fn segd3wr(self) -> &'a mut crate::W { + self.variant(Loadaddr::Segd3wr) } } impl R { #[doc = "Bit 8 - Auto Load"] #[inline(always)] - pub fn autoload(&self) -> AUTOLOAD_R { - AUTOLOAD_R::new(((self.bits >> 8) & 1) != 0) + pub fn autoload(&self) -> AutoloadR { + AutoloadR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bits 13:16 - Load Address"] #[inline(always)] - pub fn loadaddr(&self) -> LOADADDR_R { - LOADADDR_R::new(((self.bits >> 13) & 0x0f) as u8) + pub fn loadaddr(&self) -> LoadaddrR { + LoadaddrR::new(((self.bits >> 13) & 0x0f) as u8) } } impl W { #[doc = "Bit 8 - Auto Load"] #[inline(always)] #[must_use] - pub fn autoload(&mut self) -> AUTOLOAD_W<8> { - AUTOLOAD_W::new(self) + pub fn autoload(&mut self) -> AutoloadW { + AutoloadW::new(self, 8) } #[doc = "Bits 13:16 - Load Address"] #[inline(always)] #[must_use] - pub fn loadaddr(&mut self) -> LOADADDR_W<13> { - LOADADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn loadaddr(&mut self) -> LoadaddrW { + LoadaddrW::new(self, 13) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [updatectrl](index.html) module"] -pub struct UPDATECTRL_SPEC; -impl crate::RegisterSpec for UPDATECTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`updatectrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`updatectrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct UpdatectrlSpec; +impl crate::RegisterSpec for UpdatectrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [updatectrl::R](R) reader structure"] -impl crate::Readable for UPDATECTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [updatectrl::W](W) writer structure"] -impl crate::Writable for UPDATECTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`updatectrl::R`](R) reader structure"] +impl crate::Readable for UpdatectrlSpec {} +#[doc = "`write(|w| ..)` method takes [`updatectrl::W`](W) writer structure"] +impl crate::Writable for UpdatectrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets UPDATECTRL to value 0"] -impl crate::Resettable for UPDATECTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for UpdatectrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcdrf_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcdrf_ns.rs index 2a12337..eef5c9e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcdrf_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcdrf_ns.rs @@ -1,10 +1,18 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + rfimlcdctrl: Rfimlcdctrl, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub rfimlcdctrl: RFIMLCDCTRL, + #[inline(always)] + pub const fn rfimlcdctrl(&self) -> &Rfimlcdctrl { + &self.rfimlcdctrl + } } -#[doc = "RFIMLCDCTRL (rw) register accessor: an alias for `Reg`"] -pub type RFIMLCDCTRL = crate::Reg; +#[doc = "RFIMLCDCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rfimlcdctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rfimlcdctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rfimlcdctrl`] +module"] +#[doc(alias = "RFIMLCDCTRL")] +pub type Rfimlcdctrl = crate::Reg; #[doc = "No Description"] pub mod rfimlcdctrl; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcdrf_ns/rfimlcdctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcdrf_ns/rfimlcdctrl.rs index cd7d03d..d581b40 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcdrf_ns/rfimlcdctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcdrf_ns/rfimlcdctrl.rs @@ -1,234 +1,198 @@ #[doc = "Register `RFIMLCDCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RFIMLCDCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LCDCPXOEN` reader - LCD Charge Pump XO Clock Enable"] -pub type LCDCPXOEN_R = crate::BitReader; +pub type LcdcpxoenR = crate::BitReader; #[doc = "Field `LCDCPXOEN` writer - LCD Charge Pump XO Clock Enable"] -pub type LCDCPXOEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, RFIMLCDCTRL_SPEC, bool, O>; -#[doc = "Field `LCDCPXOSEL` reader - LCD Charge Pump XO Select"] -pub type LCDCPXOSEL_R = crate::BitReader; +pub type LcdcpxoenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "LCD Charge Pump XO Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LCDCPXOSEL_A { +pub enum Lcdcpxosel { #[doc = "0: Internal LCD CP 10Mhz RC oscillator"] - INTRCO = 0, + Intrco = 0, #[doc = "1: HFXO divided 4 clock"] - HFXODIV = 1, + Hfxodiv = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LCDCPXOSEL_A) -> Self { + fn from(variant: Lcdcpxosel) -> Self { variant as u8 != 0 } } -impl LCDCPXOSEL_R { +#[doc = "Field `LCDCPXOSEL` reader - LCD Charge Pump XO Select"] +pub type LcdcpxoselR = crate::BitReader; +impl LcdcpxoselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LCDCPXOSEL_A { + pub const fn variant(&self) -> Lcdcpxosel { match self.bits { - false => LCDCPXOSEL_A::INTRCO, - true => LCDCPXOSEL_A::HFXODIV, + false => Lcdcpxosel::Intrco, + true => Lcdcpxosel::Hfxodiv, } } - #[doc = "Checks if the value of the field is `INTRCO`"] + #[doc = "Internal LCD CP 10Mhz RC oscillator"] #[inline(always)] pub fn is_intrco(&self) -> bool { - *self == LCDCPXOSEL_A::INTRCO + *self == Lcdcpxosel::Intrco } - #[doc = "Checks if the value of the field is `HFXODIV`"] + #[doc = "HFXO divided 4 clock"] #[inline(always)] pub fn is_hfxodiv(&self) -> bool { - *self == LCDCPXOSEL_A::HFXODIV + *self == Lcdcpxosel::Hfxodiv } } #[doc = "Field `LCDCPXOSEL` writer - LCD Charge Pump XO Select"] -pub type LCDCPXOSEL_W<'a, const O: u8> = - crate::BitWriter<'a, u32, RFIMLCDCTRL_SPEC, LCDCPXOSEL_A, O>; -impl<'a, const O: u8> LCDCPXOSEL_W<'a, O> { +pub type LcdcpxoselW<'a, REG> = crate::BitWriter<'a, REG, Lcdcpxosel>; +impl<'a, REG> LcdcpxoselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Internal LCD CP 10Mhz RC oscillator"] #[inline(always)] - pub fn intrco(self) -> &'a mut W { - self.variant(LCDCPXOSEL_A::INTRCO) + pub fn intrco(self) -> &'a mut crate::W { + self.variant(Lcdcpxosel::Intrco) } #[doc = "HFXO divided 4 clock"] #[inline(always)] - pub fn hfxodiv(self) -> &'a mut W { - self.variant(LCDCPXOSEL_A::HFXODIV) + pub fn hfxodiv(self) -> &'a mut crate::W { + self.variant(Lcdcpxosel::Hfxodiv) } } #[doc = "Field `LCDCPXORETIMEEN` reader - LCD Charge Pump XO Retime Enable"] -pub type LCDCPXORETIMEEN_R = crate::BitReader; +pub type LcdcpxoretimeenR = crate::BitReader; #[doc = "Field `LCDCPXORETIMEEN` writer - LCD Charge Pump XO Retime Enable"] -pub type LCDCPXORETIMEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, RFIMLCDCTRL_SPEC, bool, O>; -#[doc = "Field `LCDLOWNOISE` reader - LCD Low Noise"] -pub type LCDLOWNOISE_R = crate::BitReader; +pub type LcdcpxoretimeenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "LCD Low Noise\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LCDLOWNOISE_A { +pub enum Lcdlownoise { #[doc = "0: Normal operation"] - NORMAL = 0, + Normal = 0, #[doc = "1: slows down slew rate to reduce RF interference at a cost of additional power consumption"] - SLOW = 1, + Slow = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LCDLOWNOISE_A) -> Self { + fn from(variant: Lcdlownoise) -> Self { variant as u8 != 0 } } -impl LCDLOWNOISE_R { +#[doc = "Field `LCDLOWNOISE` reader - LCD Low Noise"] +pub type LcdlownoiseR = crate::BitReader; +impl LcdlownoiseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LCDLOWNOISE_A { + pub const fn variant(&self) -> Lcdlownoise { match self.bits { - false => LCDLOWNOISE_A::NORMAL, - true => LCDLOWNOISE_A::SLOW, + false => Lcdlownoise::Normal, + true => Lcdlownoise::Slow, } } - #[doc = "Checks if the value of the field is `NORMAL`"] + #[doc = "Normal operation"] #[inline(always)] pub fn is_normal(&self) -> bool { - *self == LCDLOWNOISE_A::NORMAL + *self == Lcdlownoise::Normal } - #[doc = "Checks if the value of the field is `SLOW`"] + #[doc = "slows down slew rate to reduce RF interference at a cost of additional power consumption"] #[inline(always)] pub fn is_slow(&self) -> bool { - *self == LCDLOWNOISE_A::SLOW + *self == Lcdlownoise::Slow } } #[doc = "Field `LCDLOWNOISE` writer - LCD Low Noise"] -pub type LCDLOWNOISE_W<'a, const O: u8> = - crate::BitWriter<'a, u32, RFIMLCDCTRL_SPEC, LCDLOWNOISE_A, O>; -impl<'a, const O: u8> LCDLOWNOISE_W<'a, O> { +pub type LcdlownoiseW<'a, REG> = crate::BitWriter<'a, REG, Lcdlownoise>; +impl<'a, REG> LcdlownoiseW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Normal operation"] #[inline(always)] - pub fn normal(self) -> &'a mut W { - self.variant(LCDLOWNOISE_A::NORMAL) + pub fn normal(self) -> &'a mut crate::W { + self.variant(Lcdlownoise::Normal) } #[doc = "slows down slew rate to reduce RF interference at a cost of additional power consumption"] #[inline(always)] - pub fn slow(self) -> &'a mut W { - self.variant(LCDLOWNOISE_A::SLOW) + pub fn slow(self) -> &'a mut crate::W { + self.variant(Lcdlownoise::Slow) } } #[doc = "Field `LCDCMPDOUT` reader - LCD Comparator Dout"] -pub type LCDCMPDOUT_R = crate::BitReader; +pub type LcdcmpdoutR = crate::BitReader; #[doc = "Field `LCDCMPDOUT` writer - LCD Comparator Dout"] -pub type LCDCMPDOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, RFIMLCDCTRL_SPEC, bool, O>; +pub type LcdcmpdoutW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - LCD Charge Pump XO Clock Enable"] #[inline(always)] - pub fn lcdcpxoen(&self) -> LCDCPXOEN_R { - LCDCPXOEN_R::new((self.bits & 1) != 0) + pub fn lcdcpxoen(&self) -> LcdcpxoenR { + LcdcpxoenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - LCD Charge Pump XO Select"] #[inline(always)] - pub fn lcdcpxosel(&self) -> LCDCPXOSEL_R { - LCDCPXOSEL_R::new(((self.bits >> 1) & 1) != 0) + pub fn lcdcpxosel(&self) -> LcdcpxoselR { + LcdcpxoselR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - LCD Charge Pump XO Retime Enable"] #[inline(always)] - pub fn lcdcpxoretimeen(&self) -> LCDCPXORETIMEEN_R { - LCDCPXORETIMEEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn lcdcpxoretimeen(&self) -> LcdcpxoretimeenR { + LcdcpxoretimeenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - LCD Low Noise"] #[inline(always)] - pub fn lcdlownoise(&self) -> LCDLOWNOISE_R { - LCDLOWNOISE_R::new(((self.bits >> 3) & 1) != 0) + pub fn lcdlownoise(&self) -> LcdlownoiseR { + LcdlownoiseR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - LCD Comparator Dout"] #[inline(always)] - pub fn lcdcmpdout(&self) -> LCDCMPDOUT_R { - LCDCMPDOUT_R::new(((self.bits >> 4) & 1) != 0) + pub fn lcdcmpdout(&self) -> LcdcmpdoutR { + LcdcmpdoutR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - LCD Charge Pump XO Clock Enable"] #[inline(always)] #[must_use] - pub fn lcdcpxoen(&mut self) -> LCDCPXOEN_W<0> { - LCDCPXOEN_W::new(self) + pub fn lcdcpxoen(&mut self) -> LcdcpxoenW { + LcdcpxoenW::new(self, 0) } #[doc = "Bit 1 - LCD Charge Pump XO Select"] #[inline(always)] #[must_use] - pub fn lcdcpxosel(&mut self) -> LCDCPXOSEL_W<1> { - LCDCPXOSEL_W::new(self) + pub fn lcdcpxosel(&mut self) -> LcdcpxoselW { + LcdcpxoselW::new(self, 1) } #[doc = "Bit 2 - LCD Charge Pump XO Retime Enable"] #[inline(always)] #[must_use] - pub fn lcdcpxoretimeen(&mut self) -> LCDCPXORETIMEEN_W<2> { - LCDCPXORETIMEEN_W::new(self) + pub fn lcdcpxoretimeen(&mut self) -> LcdcpxoretimeenW { + LcdcpxoretimeenW::new(self, 2) } #[doc = "Bit 3 - LCD Low Noise"] #[inline(always)] #[must_use] - pub fn lcdlownoise(&mut self) -> LCDLOWNOISE_W<3> { - LCDLOWNOISE_W::new(self) + pub fn lcdlownoise(&mut self) -> LcdlownoiseW { + LcdlownoiseW::new(self, 3) } #[doc = "Bit 4 - LCD Comparator Dout"] #[inline(always)] #[must_use] - pub fn lcdcmpdout(&mut self) -> LCDCMPDOUT_W<4> { - LCDCMPDOUT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lcdcmpdout(&mut self) -> LcdcmpdoutW { + LcdcmpdoutW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rfimlcdctrl](index.html) module"] -pub struct RFIMLCDCTRL_SPEC; -impl crate::RegisterSpec for RFIMLCDCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rfimlcdctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rfimlcdctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RfimlcdctrlSpec; +impl crate::RegisterSpec for RfimlcdctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [rfimlcdctrl::R](R) reader structure"] -impl crate::Readable for RFIMLCDCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rfimlcdctrl::W](W) writer structure"] -impl crate::Writable for RFIMLCDCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`rfimlcdctrl::R`](R) reader structure"] +impl crate::Readable for RfimlcdctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`rfimlcdctrl::W`](W) writer structure"] +impl crate::Writable for RfimlcdctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RFIMLCDCTRL to value 0"] -impl crate::Resettable for RFIMLCDCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RfimlcdctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcdrf_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcdrf_s.rs index 2a12337..eef5c9e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcdrf_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcdrf_s.rs @@ -1,10 +1,18 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + rfimlcdctrl: Rfimlcdctrl, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub rfimlcdctrl: RFIMLCDCTRL, + #[inline(always)] + pub const fn rfimlcdctrl(&self) -> &Rfimlcdctrl { + &self.rfimlcdctrl + } } -#[doc = "RFIMLCDCTRL (rw) register accessor: an alias for `Reg`"] -pub type RFIMLCDCTRL = crate::Reg; +#[doc = "RFIMLCDCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rfimlcdctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rfimlcdctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rfimlcdctrl`] +module"] +#[doc(alias = "RFIMLCDCTRL")] +pub type Rfimlcdctrl = crate::Reg; #[doc = "No Description"] pub mod rfimlcdctrl; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcdrf_s/rfimlcdctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcdrf_s/rfimlcdctrl.rs index cd7d03d..d581b40 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcdrf_s/rfimlcdctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lcdrf_s/rfimlcdctrl.rs @@ -1,234 +1,198 @@ #[doc = "Register `RFIMLCDCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RFIMLCDCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LCDCPXOEN` reader - LCD Charge Pump XO Clock Enable"] -pub type LCDCPXOEN_R = crate::BitReader; +pub type LcdcpxoenR = crate::BitReader; #[doc = "Field `LCDCPXOEN` writer - LCD Charge Pump XO Clock Enable"] -pub type LCDCPXOEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, RFIMLCDCTRL_SPEC, bool, O>; -#[doc = "Field `LCDCPXOSEL` reader - LCD Charge Pump XO Select"] -pub type LCDCPXOSEL_R = crate::BitReader; +pub type LcdcpxoenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "LCD Charge Pump XO Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LCDCPXOSEL_A { +pub enum Lcdcpxosel { #[doc = "0: Internal LCD CP 10Mhz RC oscillator"] - INTRCO = 0, + Intrco = 0, #[doc = "1: HFXO divided 4 clock"] - HFXODIV = 1, + Hfxodiv = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LCDCPXOSEL_A) -> Self { + fn from(variant: Lcdcpxosel) -> Self { variant as u8 != 0 } } -impl LCDCPXOSEL_R { +#[doc = "Field `LCDCPXOSEL` reader - LCD Charge Pump XO Select"] +pub type LcdcpxoselR = crate::BitReader; +impl LcdcpxoselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LCDCPXOSEL_A { + pub const fn variant(&self) -> Lcdcpxosel { match self.bits { - false => LCDCPXOSEL_A::INTRCO, - true => LCDCPXOSEL_A::HFXODIV, + false => Lcdcpxosel::Intrco, + true => Lcdcpxosel::Hfxodiv, } } - #[doc = "Checks if the value of the field is `INTRCO`"] + #[doc = "Internal LCD CP 10Mhz RC oscillator"] #[inline(always)] pub fn is_intrco(&self) -> bool { - *self == LCDCPXOSEL_A::INTRCO + *self == Lcdcpxosel::Intrco } - #[doc = "Checks if the value of the field is `HFXODIV`"] + #[doc = "HFXO divided 4 clock"] #[inline(always)] pub fn is_hfxodiv(&self) -> bool { - *self == LCDCPXOSEL_A::HFXODIV + *self == Lcdcpxosel::Hfxodiv } } #[doc = "Field `LCDCPXOSEL` writer - LCD Charge Pump XO Select"] -pub type LCDCPXOSEL_W<'a, const O: u8> = - crate::BitWriter<'a, u32, RFIMLCDCTRL_SPEC, LCDCPXOSEL_A, O>; -impl<'a, const O: u8> LCDCPXOSEL_W<'a, O> { +pub type LcdcpxoselW<'a, REG> = crate::BitWriter<'a, REG, Lcdcpxosel>; +impl<'a, REG> LcdcpxoselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Internal LCD CP 10Mhz RC oscillator"] #[inline(always)] - pub fn intrco(self) -> &'a mut W { - self.variant(LCDCPXOSEL_A::INTRCO) + pub fn intrco(self) -> &'a mut crate::W { + self.variant(Lcdcpxosel::Intrco) } #[doc = "HFXO divided 4 clock"] #[inline(always)] - pub fn hfxodiv(self) -> &'a mut W { - self.variant(LCDCPXOSEL_A::HFXODIV) + pub fn hfxodiv(self) -> &'a mut crate::W { + self.variant(Lcdcpxosel::Hfxodiv) } } #[doc = "Field `LCDCPXORETIMEEN` reader - LCD Charge Pump XO Retime Enable"] -pub type LCDCPXORETIMEEN_R = crate::BitReader; +pub type LcdcpxoretimeenR = crate::BitReader; #[doc = "Field `LCDCPXORETIMEEN` writer - LCD Charge Pump XO Retime Enable"] -pub type LCDCPXORETIMEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, RFIMLCDCTRL_SPEC, bool, O>; -#[doc = "Field `LCDLOWNOISE` reader - LCD Low Noise"] -pub type LCDLOWNOISE_R = crate::BitReader; +pub type LcdcpxoretimeenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "LCD Low Noise\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LCDLOWNOISE_A { +pub enum Lcdlownoise { #[doc = "0: Normal operation"] - NORMAL = 0, + Normal = 0, #[doc = "1: slows down slew rate to reduce RF interference at a cost of additional power consumption"] - SLOW = 1, + Slow = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LCDLOWNOISE_A) -> Self { + fn from(variant: Lcdlownoise) -> Self { variant as u8 != 0 } } -impl LCDLOWNOISE_R { +#[doc = "Field `LCDLOWNOISE` reader - LCD Low Noise"] +pub type LcdlownoiseR = crate::BitReader; +impl LcdlownoiseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LCDLOWNOISE_A { + pub const fn variant(&self) -> Lcdlownoise { match self.bits { - false => LCDLOWNOISE_A::NORMAL, - true => LCDLOWNOISE_A::SLOW, + false => Lcdlownoise::Normal, + true => Lcdlownoise::Slow, } } - #[doc = "Checks if the value of the field is `NORMAL`"] + #[doc = "Normal operation"] #[inline(always)] pub fn is_normal(&self) -> bool { - *self == LCDLOWNOISE_A::NORMAL + *self == Lcdlownoise::Normal } - #[doc = "Checks if the value of the field is `SLOW`"] + #[doc = "slows down slew rate to reduce RF interference at a cost of additional power consumption"] #[inline(always)] pub fn is_slow(&self) -> bool { - *self == LCDLOWNOISE_A::SLOW + *self == Lcdlownoise::Slow } } #[doc = "Field `LCDLOWNOISE` writer - LCD Low Noise"] -pub type LCDLOWNOISE_W<'a, const O: u8> = - crate::BitWriter<'a, u32, RFIMLCDCTRL_SPEC, LCDLOWNOISE_A, O>; -impl<'a, const O: u8> LCDLOWNOISE_W<'a, O> { +pub type LcdlownoiseW<'a, REG> = crate::BitWriter<'a, REG, Lcdlownoise>; +impl<'a, REG> LcdlownoiseW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Normal operation"] #[inline(always)] - pub fn normal(self) -> &'a mut W { - self.variant(LCDLOWNOISE_A::NORMAL) + pub fn normal(self) -> &'a mut crate::W { + self.variant(Lcdlownoise::Normal) } #[doc = "slows down slew rate to reduce RF interference at a cost of additional power consumption"] #[inline(always)] - pub fn slow(self) -> &'a mut W { - self.variant(LCDLOWNOISE_A::SLOW) + pub fn slow(self) -> &'a mut crate::W { + self.variant(Lcdlownoise::Slow) } } #[doc = "Field `LCDCMPDOUT` reader - LCD Comparator Dout"] -pub type LCDCMPDOUT_R = crate::BitReader; +pub type LcdcmpdoutR = crate::BitReader; #[doc = "Field `LCDCMPDOUT` writer - LCD Comparator Dout"] -pub type LCDCMPDOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, RFIMLCDCTRL_SPEC, bool, O>; +pub type LcdcmpdoutW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - LCD Charge Pump XO Clock Enable"] #[inline(always)] - pub fn lcdcpxoen(&self) -> LCDCPXOEN_R { - LCDCPXOEN_R::new((self.bits & 1) != 0) + pub fn lcdcpxoen(&self) -> LcdcpxoenR { + LcdcpxoenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - LCD Charge Pump XO Select"] #[inline(always)] - pub fn lcdcpxosel(&self) -> LCDCPXOSEL_R { - LCDCPXOSEL_R::new(((self.bits >> 1) & 1) != 0) + pub fn lcdcpxosel(&self) -> LcdcpxoselR { + LcdcpxoselR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - LCD Charge Pump XO Retime Enable"] #[inline(always)] - pub fn lcdcpxoretimeen(&self) -> LCDCPXORETIMEEN_R { - LCDCPXORETIMEEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn lcdcpxoretimeen(&self) -> LcdcpxoretimeenR { + LcdcpxoretimeenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - LCD Low Noise"] #[inline(always)] - pub fn lcdlownoise(&self) -> LCDLOWNOISE_R { - LCDLOWNOISE_R::new(((self.bits >> 3) & 1) != 0) + pub fn lcdlownoise(&self) -> LcdlownoiseR { + LcdlownoiseR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - LCD Comparator Dout"] #[inline(always)] - pub fn lcdcmpdout(&self) -> LCDCMPDOUT_R { - LCDCMPDOUT_R::new(((self.bits >> 4) & 1) != 0) + pub fn lcdcmpdout(&self) -> LcdcmpdoutR { + LcdcmpdoutR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - LCD Charge Pump XO Clock Enable"] #[inline(always)] #[must_use] - pub fn lcdcpxoen(&mut self) -> LCDCPXOEN_W<0> { - LCDCPXOEN_W::new(self) + pub fn lcdcpxoen(&mut self) -> LcdcpxoenW { + LcdcpxoenW::new(self, 0) } #[doc = "Bit 1 - LCD Charge Pump XO Select"] #[inline(always)] #[must_use] - pub fn lcdcpxosel(&mut self) -> LCDCPXOSEL_W<1> { - LCDCPXOSEL_W::new(self) + pub fn lcdcpxosel(&mut self) -> LcdcpxoselW { + LcdcpxoselW::new(self, 1) } #[doc = "Bit 2 - LCD Charge Pump XO Retime Enable"] #[inline(always)] #[must_use] - pub fn lcdcpxoretimeen(&mut self) -> LCDCPXORETIMEEN_W<2> { - LCDCPXORETIMEEN_W::new(self) + pub fn lcdcpxoretimeen(&mut self) -> LcdcpxoretimeenW { + LcdcpxoretimeenW::new(self, 2) } #[doc = "Bit 3 - LCD Low Noise"] #[inline(always)] #[must_use] - pub fn lcdlownoise(&mut self) -> LCDLOWNOISE_W<3> { - LCDLOWNOISE_W::new(self) + pub fn lcdlownoise(&mut self) -> LcdlownoiseW { + LcdlownoiseW::new(self, 3) } #[doc = "Bit 4 - LCD Comparator Dout"] #[inline(always)] #[must_use] - pub fn lcdcmpdout(&mut self) -> LCDCMPDOUT_W<4> { - LCDCMPDOUT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lcdcmpdout(&mut self) -> LcdcmpdoutW { + LcdcmpdoutW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rfimlcdctrl](index.html) module"] -pub struct RFIMLCDCTRL_SPEC; -impl crate::RegisterSpec for RFIMLCDCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rfimlcdctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rfimlcdctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RfimlcdctrlSpec; +impl crate::RegisterSpec for RfimlcdctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [rfimlcdctrl::R](R) reader structure"] -impl crate::Readable for RFIMLCDCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rfimlcdctrl::W](W) writer structure"] -impl crate::Writable for RFIMLCDCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`rfimlcdctrl::R`](R) reader structure"] +impl crate::Readable for RfimlcdctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`rfimlcdctrl::W`](W) writer structure"] +impl crate::Writable for RfimlcdctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RFIMLCDCTRL to value 0"] -impl crate::Resettable for RFIMLCDCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RfimlcdctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns.rs index 4c7511b..6eb6ff1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns.rs @@ -1,432 +1,854 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + ctrl: Ctrl, + status: Status, + syncswset: Syncswset, + syncswclr: Syncswclr, + synchwen: Synchwen, + synchwsel: Synchwsel, + syncstatus: Syncstatus, + chen: Chen, + chdis: Chdis, + chstatus: Chstatus, + chbusy: Chbusy, + chdone: Chdone, + dbghalt: Dbghalt, + swreq: Swreq, + reqdis: Reqdis, + reqpend: Reqpend, + linkload: Linkload, + reqclear: Reqclear, + if_: If, + ien: Ien, + _reserved22: [u8; 0x04], + ch0_cfg: Ch0Cfg, + ch0_loop: Ch0Loop, + ch0_ctrl: Ch0Ctrl, + ch0_src: Ch0Src, + ch0_dst: Ch0Dst, + ch0_link: Ch0Link, + _reserved28: [u8; 0x18], + ch1_cfg: Ch1Cfg, + ch1_loop: Ch1Loop, + ch1_ctrl: Ch1Ctrl, + ch1_src: Ch1Src, + ch1_dst: Ch1Dst, + ch1_link: Ch1Link, + _reserved34: [u8; 0x18], + ch2_cfg: Ch2Cfg, + ch2_loop: Ch2Loop, + ch2_ctrl: Ch2Ctrl, + ch2_src: Ch2Src, + ch2_dst: Ch2Dst, + ch2_link: Ch2Link, + _reserved40: [u8; 0x18], + ch3_cfg: Ch3Cfg, + ch3_loop: Ch3Loop, + ch3_ctrl: Ch3Ctrl, + ch3_src: Ch3Src, + ch3_dst: Ch3Dst, + ch3_link: Ch3Link, + _reserved46: [u8; 0x18], + ch4_cfg: Ch4Cfg, + ch4_loop: Ch4Loop, + ch4_ctrl: Ch4Ctrl, + ch4_src: Ch4Src, + ch4_dst: Ch4Dst, + ch4_link: Ch4Link, + _reserved52: [u8; 0x18], + ch5_cfg: Ch5Cfg, + ch5_loop: Ch5Loop, + ch5_ctrl: Ch5Ctrl, + ch5_src: Ch5Src, + ch5_dst: Ch5Dst, + ch5_link: Ch5Link, + _reserved58: [u8; 0x18], + ch6_cfg: Ch6Cfg, + ch6_loop: Ch6Loop, + ch6_ctrl: Ch6Ctrl, + ch6_src: Ch6Src, + ch6_dst: Ch6Dst, + ch6_link: Ch6Link, + _reserved64: [u8; 0x18], + ch7_cfg: Ch7Cfg, + ch7_loop: Ch7Loop, + ch7_ctrl: Ch7Ctrl, + ch7_src: Ch7Src, + ch7_dst: Ch7Dst, + ch7_link: Ch7Link, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x0c - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x10 - No Description"] - pub syncswset: SYNCSWSET, + #[inline(always)] + pub const fn syncswset(&self) -> &Syncswset { + &self.syncswset + } #[doc = "0x14 - No Description"] - pub syncswclr: SYNCSWCLR, + #[inline(always)] + pub const fn syncswclr(&self) -> &Syncswclr { + &self.syncswclr + } #[doc = "0x18 - No Description"] - pub synchwen: SYNCHWEN, + #[inline(always)] + pub const fn synchwen(&self) -> &Synchwen { + &self.synchwen + } #[doc = "0x1c - No Description"] - pub synchwsel: SYNCHWSEL, + #[inline(always)] + pub const fn synchwsel(&self) -> &Synchwsel { + &self.synchwsel + } #[doc = "0x20 - No Description"] - pub syncstatus: SYNCSTATUS, + #[inline(always)] + pub const fn syncstatus(&self) -> &Syncstatus { + &self.syncstatus + } #[doc = "0x24 - No Description"] - pub chen: CHEN, + #[inline(always)] + pub const fn chen(&self) -> &Chen { + &self.chen + } #[doc = "0x28 - No Description"] - pub chdis: CHDIS, + #[inline(always)] + pub const fn chdis(&self) -> &Chdis { + &self.chdis + } #[doc = "0x2c - No Description"] - pub chstatus: CHSTATUS, + #[inline(always)] + pub const fn chstatus(&self) -> &Chstatus { + &self.chstatus + } #[doc = "0x30 - No Description"] - pub chbusy: CHBUSY, + #[inline(always)] + pub const fn chbusy(&self) -> &Chbusy { + &self.chbusy + } #[doc = "0x34 - No Description"] - pub chdone: CHDONE, + #[inline(always)] + pub const fn chdone(&self) -> &Chdone { + &self.chdone + } #[doc = "0x38 - No Description"] - pub dbghalt: DBGHALT, + #[inline(always)] + pub const fn dbghalt(&self) -> &Dbghalt { + &self.dbghalt + } #[doc = "0x3c - No Description"] - pub swreq: SWREQ, + #[inline(always)] + pub const fn swreq(&self) -> &Swreq { + &self.swreq + } #[doc = "0x40 - No Description"] - pub reqdis: REQDIS, + #[inline(always)] + pub const fn reqdis(&self) -> &Reqdis { + &self.reqdis + } #[doc = "0x44 - No Description"] - pub reqpend: REQPEND, + #[inline(always)] + pub const fn reqpend(&self) -> &Reqpend { + &self.reqpend + } #[doc = "0x48 - No Description"] - pub linkload: LINKLOAD, + #[inline(always)] + pub const fn linkload(&self) -> &Linkload { + &self.linkload + } #[doc = "0x4c - No Description"] - pub reqclear: REQCLEAR, + #[inline(always)] + pub const fn reqclear(&self) -> &Reqclear { + &self.reqclear + } #[doc = "0x50 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x54 - No Description"] - pub ien: IEN, - _reserved22: [u8; 0x04], + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x5c - No Description"] - pub ch0_cfg: CH0_CFG, + #[inline(always)] + pub const fn ch0_cfg(&self) -> &Ch0Cfg { + &self.ch0_cfg + } #[doc = "0x60 - No Description"] - pub ch0_loop: CH0_LOOP, + #[inline(always)] + pub const fn ch0_loop(&self) -> &Ch0Loop { + &self.ch0_loop + } #[doc = "0x64 - No Description"] - pub ch0_ctrl: CH0_CTRL, + #[inline(always)] + pub const fn ch0_ctrl(&self) -> &Ch0Ctrl { + &self.ch0_ctrl + } #[doc = "0x68 - No Description"] - pub ch0_src: CH0_SRC, + #[inline(always)] + pub const fn ch0_src(&self) -> &Ch0Src { + &self.ch0_src + } #[doc = "0x6c - No Description"] - pub ch0_dst: CH0_DST, + #[inline(always)] + pub const fn ch0_dst(&self) -> &Ch0Dst { + &self.ch0_dst + } #[doc = "0x70 - No Description"] - pub ch0_link: CH0_LINK, - _reserved28: [u8; 0x18], + #[inline(always)] + pub const fn ch0_link(&self) -> &Ch0Link { + &self.ch0_link + } #[doc = "0x8c - No Description"] - pub ch1_cfg: CH1_CFG, + #[inline(always)] + pub const fn ch1_cfg(&self) -> &Ch1Cfg { + &self.ch1_cfg + } #[doc = "0x90 - No Description"] - pub ch1_loop: CH1_LOOP, + #[inline(always)] + pub const fn ch1_loop(&self) -> &Ch1Loop { + &self.ch1_loop + } #[doc = "0x94 - No Description"] - pub ch1_ctrl: CH1_CTRL, + #[inline(always)] + pub const fn ch1_ctrl(&self) -> &Ch1Ctrl { + &self.ch1_ctrl + } #[doc = "0x98 - No Description"] - pub ch1_src: CH1_SRC, + #[inline(always)] + pub const fn ch1_src(&self) -> &Ch1Src { + &self.ch1_src + } #[doc = "0x9c - No Description"] - pub ch1_dst: CH1_DST, + #[inline(always)] + pub const fn ch1_dst(&self) -> &Ch1Dst { + &self.ch1_dst + } #[doc = "0xa0 - No Description"] - pub ch1_link: CH1_LINK, - _reserved34: [u8; 0x18], + #[inline(always)] + pub const fn ch1_link(&self) -> &Ch1Link { + &self.ch1_link + } #[doc = "0xbc - No Description"] - pub ch2_cfg: CH2_CFG, + #[inline(always)] + pub const fn ch2_cfg(&self) -> &Ch2Cfg { + &self.ch2_cfg + } #[doc = "0xc0 - No Description"] - pub ch2_loop: CH2_LOOP, + #[inline(always)] + pub const fn ch2_loop(&self) -> &Ch2Loop { + &self.ch2_loop + } #[doc = "0xc4 - No Description"] - pub ch2_ctrl: CH2_CTRL, + #[inline(always)] + pub const fn ch2_ctrl(&self) -> &Ch2Ctrl { + &self.ch2_ctrl + } #[doc = "0xc8 - No Description"] - pub ch2_src: CH2_SRC, + #[inline(always)] + pub const fn ch2_src(&self) -> &Ch2Src { + &self.ch2_src + } #[doc = "0xcc - No Description"] - pub ch2_dst: CH2_DST, + #[inline(always)] + pub const fn ch2_dst(&self) -> &Ch2Dst { + &self.ch2_dst + } #[doc = "0xd0 - No Description"] - pub ch2_link: CH2_LINK, - _reserved40: [u8; 0x18], + #[inline(always)] + pub const fn ch2_link(&self) -> &Ch2Link { + &self.ch2_link + } #[doc = "0xec - No Description"] - pub ch3_cfg: CH3_CFG, + #[inline(always)] + pub const fn ch3_cfg(&self) -> &Ch3Cfg { + &self.ch3_cfg + } #[doc = "0xf0 - No Description"] - pub ch3_loop: CH3_LOOP, + #[inline(always)] + pub const fn ch3_loop(&self) -> &Ch3Loop { + &self.ch3_loop + } #[doc = "0xf4 - No Description"] - pub ch3_ctrl: CH3_CTRL, + #[inline(always)] + pub const fn ch3_ctrl(&self) -> &Ch3Ctrl { + &self.ch3_ctrl + } #[doc = "0xf8 - No Description"] - pub ch3_src: CH3_SRC, + #[inline(always)] + pub const fn ch3_src(&self) -> &Ch3Src { + &self.ch3_src + } #[doc = "0xfc - No Description"] - pub ch3_dst: CH3_DST, + #[inline(always)] + pub const fn ch3_dst(&self) -> &Ch3Dst { + &self.ch3_dst + } #[doc = "0x100 - No Description"] - pub ch3_link: CH3_LINK, - _reserved46: [u8; 0x18], + #[inline(always)] + pub const fn ch3_link(&self) -> &Ch3Link { + &self.ch3_link + } #[doc = "0x11c - No Description"] - pub ch4_cfg: CH4_CFG, + #[inline(always)] + pub const fn ch4_cfg(&self) -> &Ch4Cfg { + &self.ch4_cfg + } #[doc = "0x120 - No Description"] - pub ch4_loop: CH4_LOOP, + #[inline(always)] + pub const fn ch4_loop(&self) -> &Ch4Loop { + &self.ch4_loop + } #[doc = "0x124 - No Description"] - pub ch4_ctrl: CH4_CTRL, + #[inline(always)] + pub const fn ch4_ctrl(&self) -> &Ch4Ctrl { + &self.ch4_ctrl + } #[doc = "0x128 - No Description"] - pub ch4_src: CH4_SRC, + #[inline(always)] + pub const fn ch4_src(&self) -> &Ch4Src { + &self.ch4_src + } #[doc = "0x12c - No Description"] - pub ch4_dst: CH4_DST, + #[inline(always)] + pub const fn ch4_dst(&self) -> &Ch4Dst { + &self.ch4_dst + } #[doc = "0x130 - No Description"] - pub ch4_link: CH4_LINK, - _reserved52: [u8; 0x18], + #[inline(always)] + pub const fn ch4_link(&self) -> &Ch4Link { + &self.ch4_link + } #[doc = "0x14c - No Description"] - pub ch5_cfg: CH5_CFG, + #[inline(always)] + pub const fn ch5_cfg(&self) -> &Ch5Cfg { + &self.ch5_cfg + } #[doc = "0x150 - No Description"] - pub ch5_loop: CH5_LOOP, + #[inline(always)] + pub const fn ch5_loop(&self) -> &Ch5Loop { + &self.ch5_loop + } #[doc = "0x154 - No Description"] - pub ch5_ctrl: CH5_CTRL, + #[inline(always)] + pub const fn ch5_ctrl(&self) -> &Ch5Ctrl { + &self.ch5_ctrl + } #[doc = "0x158 - No Description"] - pub ch5_src: CH5_SRC, + #[inline(always)] + pub const fn ch5_src(&self) -> &Ch5Src { + &self.ch5_src + } #[doc = "0x15c - No Description"] - pub ch5_dst: CH5_DST, + #[inline(always)] + pub const fn ch5_dst(&self) -> &Ch5Dst { + &self.ch5_dst + } #[doc = "0x160 - No Description"] - pub ch5_link: CH5_LINK, - _reserved58: [u8; 0x18], + #[inline(always)] + pub const fn ch5_link(&self) -> &Ch5Link { + &self.ch5_link + } #[doc = "0x17c - No Description"] - pub ch6_cfg: CH6_CFG, + #[inline(always)] + pub const fn ch6_cfg(&self) -> &Ch6Cfg { + &self.ch6_cfg + } #[doc = "0x180 - No Description"] - pub ch6_loop: CH6_LOOP, + #[inline(always)] + pub const fn ch6_loop(&self) -> &Ch6Loop { + &self.ch6_loop + } #[doc = "0x184 - No Description"] - pub ch6_ctrl: CH6_CTRL, + #[inline(always)] + pub const fn ch6_ctrl(&self) -> &Ch6Ctrl { + &self.ch6_ctrl + } #[doc = "0x188 - No Description"] - pub ch6_src: CH6_SRC, + #[inline(always)] + pub const fn ch6_src(&self) -> &Ch6Src { + &self.ch6_src + } #[doc = "0x18c - No Description"] - pub ch6_dst: CH6_DST, + #[inline(always)] + pub const fn ch6_dst(&self) -> &Ch6Dst { + &self.ch6_dst + } #[doc = "0x190 - No Description"] - pub ch6_link: CH6_LINK, - _reserved64: [u8; 0x18], + #[inline(always)] + pub const fn ch6_link(&self) -> &Ch6Link { + &self.ch6_link + } #[doc = "0x1ac - No Description"] - pub ch7_cfg: CH7_CFG, + #[inline(always)] + pub const fn ch7_cfg(&self) -> &Ch7Cfg { + &self.ch7_cfg + } #[doc = "0x1b0 - No Description"] - pub ch7_loop: CH7_LOOP, + #[inline(always)] + pub const fn ch7_loop(&self) -> &Ch7Loop { + &self.ch7_loop + } #[doc = "0x1b4 - No Description"] - pub ch7_ctrl: CH7_CTRL, + #[inline(always)] + pub const fn ch7_ctrl(&self) -> &Ch7Ctrl { + &self.ch7_ctrl + } #[doc = "0x1b8 - No Description"] - pub ch7_src: CH7_SRC, + #[inline(always)] + pub const fn ch7_src(&self) -> &Ch7Src { + &self.ch7_src + } #[doc = "0x1bc - No Description"] - pub ch7_dst: CH7_DST, + #[inline(always)] + pub const fn ch7_dst(&self) -> &Ch7Dst { + &self.ch7_dst + } #[doc = "0x1c0 - No Description"] - pub ch7_link: CH7_LINK, + #[inline(always)] + pub const fn ch7_link(&self) -> &Ch7Link { + &self.ch7_link + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "SYNCSWSET (w) register accessor: an alias for `Reg`"] -pub type SYNCSWSET = crate::Reg; +#[doc = "SYNCSWSET (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`syncswset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncswset`] +module"] +#[doc(alias = "SYNCSWSET")] +pub type Syncswset = crate::Reg; #[doc = "No Description"] pub mod syncswset; -#[doc = "SYNCSWCLR (w) register accessor: an alias for `Reg`"] -pub type SYNCSWCLR = crate::Reg; +#[doc = "SYNCSWCLR (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`syncswclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncswclr`] +module"] +#[doc(alias = "SYNCSWCLR")] +pub type Syncswclr = crate::Reg; #[doc = "No Description"] pub mod syncswclr; -#[doc = "SYNCHWEN (rw) register accessor: an alias for `Reg`"] -pub type SYNCHWEN = crate::Reg; +#[doc = "SYNCHWEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`synchwen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synchwen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synchwen`] +module"] +#[doc(alias = "SYNCHWEN")] +pub type Synchwen = crate::Reg; #[doc = "No Description"] pub mod synchwen; -#[doc = "SYNCHWSEL (rw) register accessor: an alias for `Reg`"] -pub type SYNCHWSEL = crate::Reg; +#[doc = "SYNCHWSEL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`synchwsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synchwsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synchwsel`] +module"] +#[doc(alias = "SYNCHWSEL")] +pub type Synchwsel = crate::Reg; #[doc = "No Description"] pub mod synchwsel; -#[doc = "SYNCSTATUS (r) register accessor: an alias for `Reg`"] -pub type SYNCSTATUS = crate::Reg; +#[doc = "SYNCSTATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncstatus`] +module"] +#[doc(alias = "SYNCSTATUS")] +pub type Syncstatus = crate::Reg; #[doc = "No Description"] pub mod syncstatus; -#[doc = "CHEN (w) register accessor: an alias for `Reg`"] -pub type CHEN = crate::Reg; +#[doc = "CHEN (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chen::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chen`] +module"] +#[doc(alias = "CHEN")] +pub type Chen = crate::Reg; #[doc = "No Description"] pub mod chen; -#[doc = "CHDIS (w) register accessor: an alias for `Reg`"] -pub type CHDIS = crate::Reg; +#[doc = "CHDIS (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chdis::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chdis`] +module"] +#[doc(alias = "CHDIS")] +pub type Chdis = crate::Reg; #[doc = "No Description"] pub mod chdis; -#[doc = "CHSTATUS (r) register accessor: an alias for `Reg`"] -pub type CHSTATUS = crate::Reg; +#[doc = "CHSTATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`chstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chstatus`] +module"] +#[doc(alias = "CHSTATUS")] +pub type Chstatus = crate::Reg; #[doc = "No Description"] pub mod chstatus; -#[doc = "CHBUSY (r) register accessor: an alias for `Reg`"] -pub type CHBUSY = crate::Reg; +#[doc = "CHBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`chbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chbusy`] +module"] +#[doc(alias = "CHBUSY")] +pub type Chbusy = crate::Reg; #[doc = "No Description"] pub mod chbusy; -#[doc = "CHDONE (rw) register accessor: an alias for `Reg`"] -pub type CHDONE = crate::Reg; +#[doc = "CHDONE (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`chdone::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chdone::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chdone`] +module"] +#[doc(alias = "CHDONE")] +pub type Chdone = crate::Reg; #[doc = "No Description"] pub mod chdone; -#[doc = "DBGHALT (rw) register accessor: an alias for `Reg`"] -pub type DBGHALT = crate::Reg; +#[doc = "DBGHALT (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dbghalt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dbghalt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dbghalt`] +module"] +#[doc(alias = "DBGHALT")] +pub type Dbghalt = crate::Reg; #[doc = "No Description"] pub mod dbghalt; -#[doc = "SWREQ (w) register accessor: an alias for `Reg`"] -pub type SWREQ = crate::Reg; +#[doc = "SWREQ (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swreq::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swreq`] +module"] +#[doc(alias = "SWREQ")] +pub type Swreq = crate::Reg; #[doc = "No Description"] pub mod swreq; -#[doc = "REQDIS (rw) register accessor: an alias for `Reg`"] -pub type REQDIS = crate::Reg; +#[doc = "REQDIS (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`reqdis::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`reqdis::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@reqdis`] +module"] +#[doc(alias = "REQDIS")] +pub type Reqdis = crate::Reg; #[doc = "No Description"] pub mod reqdis; -#[doc = "REQPEND (r) register accessor: an alias for `Reg`"] -pub type REQPEND = crate::Reg; +#[doc = "REQPEND (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`reqpend::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@reqpend`] +module"] +#[doc(alias = "REQPEND")] +pub type Reqpend = crate::Reg; #[doc = "No Description"] pub mod reqpend; -#[doc = "LINKLOAD (w) register accessor: an alias for `Reg`"] -pub type LINKLOAD = crate::Reg; +#[doc = "LINKLOAD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`linkload::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@linkload`] +module"] +#[doc(alias = "LINKLOAD")] +pub type Linkload = crate::Reg; #[doc = "No Description"] pub mod linkload; -#[doc = "REQCLEAR (w) register accessor: an alias for `Reg`"] -pub type REQCLEAR = crate::Reg; +#[doc = "REQCLEAR (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`reqclear::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@reqclear`] +module"] +#[doc(alias = "REQCLEAR")] +pub type Reqclear = crate::Reg; #[doc = "No Description"] pub mod reqclear; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "CH0_CFG (rw) register accessor: an alias for `Reg`"] -pub type CH0_CFG = crate::Reg; +#[doc = "CH0_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch0_cfg`] +module"] +#[doc(alias = "CH0_CFG")] +pub type Ch0Cfg = crate::Reg; #[doc = "No Description"] pub mod ch0_cfg; -#[doc = "CH0_LOOP (rw) register accessor: an alias for `Reg`"] -pub type CH0_LOOP = crate::Reg; +#[doc = "CH0_LOOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_loop::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_loop::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch0_loop`] +module"] +#[doc(alias = "CH0_LOOP")] +pub type Ch0Loop = crate::Reg; #[doc = "No Description"] pub mod ch0_loop; -#[doc = "CH0_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CH0_CTRL = crate::Reg; +#[doc = "CH0_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch0_ctrl`] +module"] +#[doc(alias = "CH0_CTRL")] +pub type Ch0Ctrl = crate::Reg; #[doc = "No Description"] pub mod ch0_ctrl; -#[doc = "CH0_SRC (rw) register accessor: an alias for `Reg`"] -pub type CH0_SRC = crate::Reg; +#[doc = "CH0_SRC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_src::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_src::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch0_src`] +module"] +#[doc(alias = "CH0_SRC")] +pub type Ch0Src = crate::Reg; #[doc = "No Description"] pub mod ch0_src; -#[doc = "CH0_DST (rw) register accessor: an alias for `Reg`"] -pub type CH0_DST = crate::Reg; +#[doc = "CH0_DST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_dst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_dst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch0_dst`] +module"] +#[doc(alias = "CH0_DST")] +pub type Ch0Dst = crate::Reg; #[doc = "No Description"] pub mod ch0_dst; -#[doc = "CH0_LINK (rw) register accessor: an alias for `Reg`"] -pub type CH0_LINK = crate::Reg; +#[doc = "CH0_LINK (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_link::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_link::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch0_link`] +module"] +#[doc(alias = "CH0_LINK")] +pub type Ch0Link = crate::Reg; #[doc = "No Description"] pub mod ch0_link; -#[doc = "CH1_CFG (rw) register accessor: an alias for `Reg`"] -pub type CH1_CFG = crate::Reg; +#[doc = "CH1_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch1_cfg`] +module"] +#[doc(alias = "CH1_CFG")] +pub type Ch1Cfg = crate::Reg; #[doc = "No Description"] pub mod ch1_cfg; -#[doc = "CH1_LOOP (rw) register accessor: an alias for `Reg`"] -pub type CH1_LOOP = crate::Reg; +#[doc = "CH1_LOOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_loop::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_loop::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch1_loop`] +module"] +#[doc(alias = "CH1_LOOP")] +pub type Ch1Loop = crate::Reg; #[doc = "No Description"] pub mod ch1_loop; -#[doc = "CH1_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CH1_CTRL = crate::Reg; +#[doc = "CH1_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch1_ctrl`] +module"] +#[doc(alias = "CH1_CTRL")] +pub type Ch1Ctrl = crate::Reg; #[doc = "No Description"] pub mod ch1_ctrl; -#[doc = "CH1_SRC (rw) register accessor: an alias for `Reg`"] -pub type CH1_SRC = crate::Reg; +#[doc = "CH1_SRC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_src::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_src::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch1_src`] +module"] +#[doc(alias = "CH1_SRC")] +pub type Ch1Src = crate::Reg; #[doc = "No Description"] pub mod ch1_src; -#[doc = "CH1_DST (rw) register accessor: an alias for `Reg`"] -pub type CH1_DST = crate::Reg; +#[doc = "CH1_DST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_dst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_dst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch1_dst`] +module"] +#[doc(alias = "CH1_DST")] +pub type Ch1Dst = crate::Reg; #[doc = "No Description"] pub mod ch1_dst; -#[doc = "CH1_LINK (rw) register accessor: an alias for `Reg`"] -pub type CH1_LINK = crate::Reg; +#[doc = "CH1_LINK (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_link::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_link::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch1_link`] +module"] +#[doc(alias = "CH1_LINK")] +pub type Ch1Link = crate::Reg; #[doc = "No Description"] pub mod ch1_link; -#[doc = "CH2_CFG (rw) register accessor: an alias for `Reg`"] -pub type CH2_CFG = crate::Reg; +#[doc = "CH2_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch2_cfg`] +module"] +#[doc(alias = "CH2_CFG")] +pub type Ch2Cfg = crate::Reg; #[doc = "No Description"] pub mod ch2_cfg; -#[doc = "CH2_LOOP (rw) register accessor: an alias for `Reg`"] -pub type CH2_LOOP = crate::Reg; +#[doc = "CH2_LOOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_loop::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_loop::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch2_loop`] +module"] +#[doc(alias = "CH2_LOOP")] +pub type Ch2Loop = crate::Reg; #[doc = "No Description"] pub mod ch2_loop; -#[doc = "CH2_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CH2_CTRL = crate::Reg; +#[doc = "CH2_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch2_ctrl`] +module"] +#[doc(alias = "CH2_CTRL")] +pub type Ch2Ctrl = crate::Reg; #[doc = "No Description"] pub mod ch2_ctrl; -#[doc = "CH2_SRC (rw) register accessor: an alias for `Reg`"] -pub type CH2_SRC = crate::Reg; +#[doc = "CH2_SRC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_src::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_src::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch2_src`] +module"] +#[doc(alias = "CH2_SRC")] +pub type Ch2Src = crate::Reg; #[doc = "No Description"] pub mod ch2_src; -#[doc = "CH2_DST (rw) register accessor: an alias for `Reg`"] -pub type CH2_DST = crate::Reg; +#[doc = "CH2_DST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_dst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_dst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch2_dst`] +module"] +#[doc(alias = "CH2_DST")] +pub type Ch2Dst = crate::Reg; #[doc = "No Description"] pub mod ch2_dst; -#[doc = "CH2_LINK (rw) register accessor: an alias for `Reg`"] -pub type CH2_LINK = crate::Reg; +#[doc = "CH2_LINK (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_link::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_link::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch2_link`] +module"] +#[doc(alias = "CH2_LINK")] +pub type Ch2Link = crate::Reg; #[doc = "No Description"] pub mod ch2_link; -#[doc = "CH3_CFG (rw) register accessor: an alias for `Reg`"] -pub type CH3_CFG = crate::Reg; +#[doc = "CH3_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch3_cfg`] +module"] +#[doc(alias = "CH3_CFG")] +pub type Ch3Cfg = crate::Reg; #[doc = "No Description"] pub mod ch3_cfg; -#[doc = "CH3_LOOP (rw) register accessor: an alias for `Reg`"] -pub type CH3_LOOP = crate::Reg; +#[doc = "CH3_LOOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_loop::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_loop::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch3_loop`] +module"] +#[doc(alias = "CH3_LOOP")] +pub type Ch3Loop = crate::Reg; #[doc = "No Description"] pub mod ch3_loop; -#[doc = "CH3_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CH3_CTRL = crate::Reg; +#[doc = "CH3_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch3_ctrl`] +module"] +#[doc(alias = "CH3_CTRL")] +pub type Ch3Ctrl = crate::Reg; #[doc = "No Description"] pub mod ch3_ctrl; -#[doc = "CH3_SRC (rw) register accessor: an alias for `Reg`"] -pub type CH3_SRC = crate::Reg; +#[doc = "CH3_SRC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_src::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_src::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch3_src`] +module"] +#[doc(alias = "CH3_SRC")] +pub type Ch3Src = crate::Reg; #[doc = "No Description"] pub mod ch3_src; -#[doc = "CH3_DST (rw) register accessor: an alias for `Reg`"] -pub type CH3_DST = crate::Reg; +#[doc = "CH3_DST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_dst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_dst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch3_dst`] +module"] +#[doc(alias = "CH3_DST")] +pub type Ch3Dst = crate::Reg; #[doc = "No Description"] pub mod ch3_dst; -#[doc = "CH3_LINK (rw) register accessor: an alias for `Reg`"] -pub type CH3_LINK = crate::Reg; +#[doc = "CH3_LINK (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_link::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_link::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch3_link`] +module"] +#[doc(alias = "CH3_LINK")] +pub type Ch3Link = crate::Reg; #[doc = "No Description"] pub mod ch3_link; -#[doc = "CH4_CFG (rw) register accessor: an alias for `Reg`"] -pub type CH4_CFG = crate::Reg; +#[doc = "CH4_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch4_cfg`] +module"] +#[doc(alias = "CH4_CFG")] +pub type Ch4Cfg = crate::Reg; #[doc = "No Description"] pub mod ch4_cfg; -#[doc = "CH4_LOOP (rw) register accessor: an alias for `Reg`"] -pub type CH4_LOOP = crate::Reg; +#[doc = "CH4_LOOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_loop::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_loop::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch4_loop`] +module"] +#[doc(alias = "CH4_LOOP")] +pub type Ch4Loop = crate::Reg; #[doc = "No Description"] pub mod ch4_loop; -#[doc = "CH4_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CH4_CTRL = crate::Reg; +#[doc = "CH4_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch4_ctrl`] +module"] +#[doc(alias = "CH4_CTRL")] +pub type Ch4Ctrl = crate::Reg; #[doc = "No Description"] pub mod ch4_ctrl; -#[doc = "CH4_SRC (rw) register accessor: an alias for `Reg`"] -pub type CH4_SRC = crate::Reg; +#[doc = "CH4_SRC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_src::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_src::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch4_src`] +module"] +#[doc(alias = "CH4_SRC")] +pub type Ch4Src = crate::Reg; #[doc = "No Description"] pub mod ch4_src; -#[doc = "CH4_DST (rw) register accessor: an alias for `Reg`"] -pub type CH4_DST = crate::Reg; +#[doc = "CH4_DST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_dst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_dst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch4_dst`] +module"] +#[doc(alias = "CH4_DST")] +pub type Ch4Dst = crate::Reg; #[doc = "No Description"] pub mod ch4_dst; -#[doc = "CH4_LINK (rw) register accessor: an alias for `Reg`"] -pub type CH4_LINK = crate::Reg; +#[doc = "CH4_LINK (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_link::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_link::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch4_link`] +module"] +#[doc(alias = "CH4_LINK")] +pub type Ch4Link = crate::Reg; #[doc = "No Description"] pub mod ch4_link; -#[doc = "CH5_CFG (rw) register accessor: an alias for `Reg`"] -pub type CH5_CFG = crate::Reg; +#[doc = "CH5_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch5_cfg`] +module"] +#[doc(alias = "CH5_CFG")] +pub type Ch5Cfg = crate::Reg; #[doc = "No Description"] pub mod ch5_cfg; -#[doc = "CH5_LOOP (rw) register accessor: an alias for `Reg`"] -pub type CH5_LOOP = crate::Reg; +#[doc = "CH5_LOOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_loop::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_loop::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch5_loop`] +module"] +#[doc(alias = "CH5_LOOP")] +pub type Ch5Loop = crate::Reg; #[doc = "No Description"] pub mod ch5_loop; -#[doc = "CH5_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CH5_CTRL = crate::Reg; +#[doc = "CH5_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch5_ctrl`] +module"] +#[doc(alias = "CH5_CTRL")] +pub type Ch5Ctrl = crate::Reg; #[doc = "No Description"] pub mod ch5_ctrl; -#[doc = "CH5_SRC (rw) register accessor: an alias for `Reg`"] -pub type CH5_SRC = crate::Reg; +#[doc = "CH5_SRC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_src::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_src::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch5_src`] +module"] +#[doc(alias = "CH5_SRC")] +pub type Ch5Src = crate::Reg; #[doc = "No Description"] pub mod ch5_src; -#[doc = "CH5_DST (rw) register accessor: an alias for `Reg`"] -pub type CH5_DST = crate::Reg; +#[doc = "CH5_DST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_dst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_dst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch5_dst`] +module"] +#[doc(alias = "CH5_DST")] +pub type Ch5Dst = crate::Reg; #[doc = "No Description"] pub mod ch5_dst; -#[doc = "CH5_LINK (rw) register accessor: an alias for `Reg`"] -pub type CH5_LINK = crate::Reg; +#[doc = "CH5_LINK (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_link::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_link::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch5_link`] +module"] +#[doc(alias = "CH5_LINK")] +pub type Ch5Link = crate::Reg; #[doc = "No Description"] pub mod ch5_link; -#[doc = "CH6_CFG (rw) register accessor: an alias for `Reg`"] -pub type CH6_CFG = crate::Reg; +#[doc = "CH6_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch6_cfg`] +module"] +#[doc(alias = "CH6_CFG")] +pub type Ch6Cfg = crate::Reg; #[doc = "No Description"] pub mod ch6_cfg; -#[doc = "CH6_LOOP (rw) register accessor: an alias for `Reg`"] -pub type CH6_LOOP = crate::Reg; +#[doc = "CH6_LOOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_loop::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_loop::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch6_loop`] +module"] +#[doc(alias = "CH6_LOOP")] +pub type Ch6Loop = crate::Reg; #[doc = "No Description"] pub mod ch6_loop; -#[doc = "CH6_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CH6_CTRL = crate::Reg; +#[doc = "CH6_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch6_ctrl`] +module"] +#[doc(alias = "CH6_CTRL")] +pub type Ch6Ctrl = crate::Reg; #[doc = "No Description"] pub mod ch6_ctrl; -#[doc = "CH6_SRC (rw) register accessor: an alias for `Reg`"] -pub type CH6_SRC = crate::Reg; +#[doc = "CH6_SRC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_src::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_src::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch6_src`] +module"] +#[doc(alias = "CH6_SRC")] +pub type Ch6Src = crate::Reg; #[doc = "No Description"] pub mod ch6_src; -#[doc = "CH6_DST (rw) register accessor: an alias for `Reg`"] -pub type CH6_DST = crate::Reg; +#[doc = "CH6_DST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_dst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_dst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch6_dst`] +module"] +#[doc(alias = "CH6_DST")] +pub type Ch6Dst = crate::Reg; #[doc = "No Description"] pub mod ch6_dst; -#[doc = "CH6_LINK (rw) register accessor: an alias for `Reg`"] -pub type CH6_LINK = crate::Reg; +#[doc = "CH6_LINK (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_link::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_link::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch6_link`] +module"] +#[doc(alias = "CH6_LINK")] +pub type Ch6Link = crate::Reg; #[doc = "No Description"] pub mod ch6_link; -#[doc = "CH7_CFG (rw) register accessor: an alias for `Reg`"] -pub type CH7_CFG = crate::Reg; +#[doc = "CH7_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch7_cfg`] +module"] +#[doc(alias = "CH7_CFG")] +pub type Ch7Cfg = crate::Reg; #[doc = "No Description"] pub mod ch7_cfg; -#[doc = "CH7_LOOP (rw) register accessor: an alias for `Reg`"] -pub type CH7_LOOP = crate::Reg; +#[doc = "CH7_LOOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_loop::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_loop::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch7_loop`] +module"] +#[doc(alias = "CH7_LOOP")] +pub type Ch7Loop = crate::Reg; #[doc = "No Description"] pub mod ch7_loop; -#[doc = "CH7_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CH7_CTRL = crate::Reg; +#[doc = "CH7_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch7_ctrl`] +module"] +#[doc(alias = "CH7_CTRL")] +pub type Ch7Ctrl = crate::Reg; #[doc = "No Description"] pub mod ch7_ctrl; -#[doc = "CH7_SRC (rw) register accessor: an alias for `Reg`"] -pub type CH7_SRC = crate::Reg; +#[doc = "CH7_SRC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_src::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_src::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch7_src`] +module"] +#[doc(alias = "CH7_SRC")] +pub type Ch7Src = crate::Reg; #[doc = "No Description"] pub mod ch7_src; -#[doc = "CH7_DST (rw) register accessor: an alias for `Reg`"] -pub type CH7_DST = crate::Reg; +#[doc = "CH7_DST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_dst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_dst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch7_dst`] +module"] +#[doc(alias = "CH7_DST")] +pub type Ch7Dst = crate::Reg; #[doc = "No Description"] pub mod ch7_dst; -#[doc = "CH7_LINK (rw) register accessor: an alias for `Reg`"] -pub type CH7_LINK = crate::Reg; +#[doc = "CH7_LINK (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_link::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_link::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch7_link`] +module"] +#[doc(alias = "CH7_LINK")] +pub type Ch7Link = crate::Reg; #[doc = "No Description"] pub mod ch7_link; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch0_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch0_cfg.rs index f7e91ff..adc0333 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch0_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch0_cfg.rs @@ -1,277 +1,250 @@ #[doc = "Register `CH0_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH0_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] -pub type ARBSLOTS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Arbitration Slot Number Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ARBSLOTS_A { +pub enum Arbslots { #[doc = "0: One arbitration slot selected"] - ONE = 0, + One = 0, #[doc = "1: Two arbitration slots selected"] - TWO = 1, + Two = 1, #[doc = "2: Four arbitration slots selected"] - FOUR = 2, + Four = 2, #[doc = "3: Eight arbitration slots selected"] - EIGHT = 3, + Eight = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ARBSLOTS_A) -> Self { + fn from(variant: Arbslots) -> Self { variant as _ } } -impl ARBSLOTS_R { +impl crate::FieldSpec for Arbslots { + type Ux = u8; +} +impl crate::IsEnum for Arbslots {} +#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] +pub type ArbslotsR = crate::FieldReader; +impl ArbslotsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ARBSLOTS_A { + pub const fn variant(&self) -> Arbslots { match self.bits { - 0 => ARBSLOTS_A::ONE, - 1 => ARBSLOTS_A::TWO, - 2 => ARBSLOTS_A::FOUR, - 3 => ARBSLOTS_A::EIGHT, + 0 => Arbslots::One, + 1 => Arbslots::Two, + 2 => Arbslots::Four, + 3 => Arbslots::Eight, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "One arbitration slot selected"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == ARBSLOTS_A::ONE + *self == Arbslots::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Two arbitration slots selected"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == ARBSLOTS_A::TWO + *self == Arbslots::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Four arbitration slots selected"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == ARBSLOTS_A::FOUR + *self == Arbslots::Four } - #[doc = "Checks if the value of the field is `EIGHT`"] + #[doc = "Eight arbitration slots selected"] #[inline(always)] pub fn is_eight(&self) -> bool { - *self == ARBSLOTS_A::EIGHT + *self == Arbslots::Eight } } #[doc = "Field `ARBSLOTS` writer - Arbitration Slot Number Select"] -pub type ARBSLOTS_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH0_CFG_SPEC, u8, ARBSLOTS_A, 2, O>; -impl<'a, const O: u8> ARBSLOTS_W<'a, O> { +pub type ArbslotsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Arbslots, crate::Safe>; +impl<'a, REG> ArbslotsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One arbitration slot selected"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(ARBSLOTS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Arbslots::One) } #[doc = "Two arbitration slots selected"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(ARBSLOTS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Arbslots::Two) } #[doc = "Four arbitration slots selected"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(ARBSLOTS_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Arbslots::Four) } #[doc = "Eight arbitration slots selected"] #[inline(always)] - pub fn eight(self) -> &'a mut W { - self.variant(ARBSLOTS_A::EIGHT) + pub fn eight(self) -> &'a mut crate::W { + self.variant(Arbslots::Eight) } } -#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] -pub type SRCINCSIGN_R = crate::BitReader; #[doc = "Source Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCINCSIGN_A { +pub enum Srcincsign { #[doc = "0: Increment source address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement source address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCINCSIGN_A) -> Self { + fn from(variant: Srcincsign) -> Self { variant as u8 != 0 } } -impl SRCINCSIGN_R { +#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] +pub type SrcincsignR = crate::BitReader; +impl SrcincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINCSIGN_A { + pub const fn variant(&self) -> Srcincsign { match self.bits { - false => SRCINCSIGN_A::POSITIVE, - true => SRCINCSIGN_A::NEGATIVE, + false => Srcincsign::Positive, + true => Srcincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment source address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == SRCINCSIGN_A::POSITIVE + *self == Srcincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement source address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == SRCINCSIGN_A::NEGATIVE + *self == Srcincsign::Negative } } #[doc = "Field `SRCINCSIGN` writer - Source Address Increment Sign"] -pub type SRCINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH0_CFG_SPEC, SRCINCSIGN_A, O>; -impl<'a, const O: u8> SRCINCSIGN_W<'a, O> { +pub type SrcincsignW<'a, REG> = crate::BitWriter<'a, REG, Srcincsign>; +impl<'a, REG> SrcincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment source address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Srcincsign::Positive) } #[doc = "Decrement source address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Srcincsign::Negative) } } -#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] -pub type DSTINCSIGN_R = crate::BitReader; #[doc = "Destination Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTINCSIGN_A { +pub enum Dstincsign { #[doc = "0: Increment destination address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement destination address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTINCSIGN_A) -> Self { + fn from(variant: Dstincsign) -> Self { variant as u8 != 0 } } -impl DSTINCSIGN_R { +#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] +pub type DstincsignR = crate::BitReader; +impl DstincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINCSIGN_A { + pub const fn variant(&self) -> Dstincsign { match self.bits { - false => DSTINCSIGN_A::POSITIVE, - true => DSTINCSIGN_A::NEGATIVE, + false => Dstincsign::Positive, + true => Dstincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment destination address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == DSTINCSIGN_A::POSITIVE + *self == Dstincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement destination address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == DSTINCSIGN_A::NEGATIVE + *self == Dstincsign::Negative } } #[doc = "Field `DSTINCSIGN` writer - Destination Address Increment Sign"] -pub type DSTINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH0_CFG_SPEC, DSTINCSIGN_A, O>; -impl<'a, const O: u8> DSTINCSIGN_W<'a, O> { +pub type DstincsignW<'a, REG> = crate::BitWriter<'a, REG, Dstincsign>; +impl<'a, REG> DstincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment destination address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Dstincsign::Positive) } #[doc = "Decrement destination address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Dstincsign::Negative) } } impl R { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] - pub fn arbslots(&self) -> ARBSLOTS_R { - ARBSLOTS_R::new(((self.bits >> 16) & 3) as u8) + pub fn arbslots(&self) -> ArbslotsR { + ArbslotsR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] - pub fn srcincsign(&self) -> SRCINCSIGN_R { - SRCINCSIGN_R::new(((self.bits >> 20) & 1) != 0) + pub fn srcincsign(&self) -> SrcincsignR { + SrcincsignR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] - pub fn dstincsign(&self) -> DSTINCSIGN_R { - DSTINCSIGN_R::new(((self.bits >> 21) & 1) != 0) + pub fn dstincsign(&self) -> DstincsignR { + DstincsignR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] #[must_use] - pub fn arbslots(&mut self) -> ARBSLOTS_W<16> { - ARBSLOTS_W::new(self) + pub fn arbslots(&mut self) -> ArbslotsW { + ArbslotsW::new(self, 16) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] #[must_use] - pub fn srcincsign(&mut self) -> SRCINCSIGN_W<20> { - SRCINCSIGN_W::new(self) + pub fn srcincsign(&mut self) -> SrcincsignW { + SrcincsignW::new(self, 20) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] #[must_use] - pub fn dstincsign(&mut self) -> DSTINCSIGN_W<21> { - DSTINCSIGN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstincsign(&mut self) -> DstincsignW { + DstincsignW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0_cfg](index.html) module"] -pub struct CH0_CFG_SPEC; -impl crate::RegisterSpec for CH0_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch0CfgSpec; +impl crate::RegisterSpec for Ch0CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch0_cfg::R](R) reader structure"] -impl crate::Readable for CH0_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch0_cfg::W](W) writer structure"] -impl crate::Writable for CH0_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch0_cfg::R`](R) reader structure"] +impl crate::Readable for Ch0CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`ch0_cfg::W`](W) writer structure"] +impl crate::Writable for Ch0CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH0_CFG to value 0"] -impl crate::Resettable for CH0_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch0CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch0_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch0_ctrl.rs index 18f2ce1..4195fe8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch0_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch0_ctrl.rs @@ -1,843 +1,842 @@ #[doc = "Register `CH0_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH0_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] -pub type STRUCTTYPE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DMA Structure Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STRUCTTYPE_A { +pub enum Structtype { #[doc = "0: DMA transfer structure type selected."] - TRANSFER = 0, + Transfer = 0, #[doc = "1: Synchronization structure type selected."] - SYNCHRONIZE = 1, + Synchronize = 1, #[doc = "2: Write immediate value structure type selected."] - WRITE = 2, + Write = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STRUCTTYPE_A) -> Self { + fn from(variant: Structtype) -> Self { variant as _ } } -impl STRUCTTYPE_R { +impl crate::FieldSpec for Structtype { + type Ux = u8; +} +impl crate::IsEnum for Structtype {} +#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] +pub type StructtypeR = crate::FieldReader; +impl StructtypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(STRUCTTYPE_A::TRANSFER), - 1 => Some(STRUCTTYPE_A::SYNCHRONIZE), - 2 => Some(STRUCTTYPE_A::WRITE), + 0 => Some(Structtype::Transfer), + 1 => Some(Structtype::Synchronize), + 2 => Some(Structtype::Write), _ => None, } } - #[doc = "Checks if the value of the field is `TRANSFER`"] + #[doc = "DMA transfer structure type selected."] #[inline(always)] pub fn is_transfer(&self) -> bool { - *self == STRUCTTYPE_A::TRANSFER + *self == Structtype::Transfer } - #[doc = "Checks if the value of the field is `SYNCHRONIZE`"] + #[doc = "Synchronization structure type selected."] #[inline(always)] pub fn is_synchronize(&self) -> bool { - *self == STRUCTTYPE_A::SYNCHRONIZE + *self == Structtype::Synchronize } - #[doc = "Checks if the value of the field is `WRITE`"] + #[doc = "Write immediate value structure type selected."] #[inline(always)] pub fn is_write(&self) -> bool { - *self == STRUCTTYPE_A::WRITE + *self == Structtype::Write } } #[doc = "Field `STRUCTTYPE` writer - DMA Structure Type"] -pub type STRUCTTYPE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH0_CTRL_SPEC, u8, STRUCTTYPE_A, 2, O>; -impl<'a, const O: u8> STRUCTTYPE_W<'a, O> { +pub type StructtypeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Structtype>; +impl<'a, REG> StructtypeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "DMA transfer structure type selected."] #[inline(always)] - pub fn transfer(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::TRANSFER) + pub fn transfer(self) -> &'a mut crate::W { + self.variant(Structtype::Transfer) } #[doc = "Synchronization structure type selected."] #[inline(always)] - pub fn synchronize(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::SYNCHRONIZE) + pub fn synchronize(self) -> &'a mut crate::W { + self.variant(Structtype::Synchronize) } #[doc = "Write immediate value structure type selected."] #[inline(always)] - pub fn write(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::WRITE) + pub fn write(self) -> &'a mut crate::W { + self.variant(Structtype::Write) } } #[doc = "Field `STRUCTREQ` reader - Structure DMA Transfer Request"] -pub type STRUCTREQ_R = crate::BitReader; +pub type StructreqR = crate::BitReader; #[doc = "Field `XFERCNT` reader - DMA Unit Data Transfer Count"] -pub type XFERCNT_R = crate::FieldReader; +pub type XfercntR = crate::FieldReader; #[doc = "Field `XFERCNT` writer - DMA Unit Data Transfer Count"] -pub type XFERCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH0_CTRL_SPEC, u16, u16, 11, O>; +pub type XfercntW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `BYTESWAP` reader - Endian Byte Swap"] -pub type BYTESWAP_R = crate::BitReader; +pub type ByteswapR = crate::BitReader; #[doc = "Field `BYTESWAP` writer - Endian Byte Swap"] -pub type BYTESWAP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH0_CTRL_SPEC, bool, O>; -#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] -pub type BLOCKSIZE_R = crate::FieldReader; +pub type ByteswapW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Block Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BLOCKSIZE_A { +pub enum Blocksize { #[doc = "0: One unit transfer per arbitration"] - UNIT1 = 0, + Unit1 = 0, #[doc = "1: Two unit transfers per arbitration"] - UNIT2 = 1, + Unit2 = 1, #[doc = "2: Three unit transfers per arbitration"] - UNIT3 = 2, + Unit3 = 2, #[doc = "3: Four unit transfers per arbitration"] - UNIT4 = 3, + Unit4 = 3, #[doc = "4: Six unit transfers per arbitration"] - UNIT6 = 4, + Unit6 = 4, #[doc = "5: Eight unit transfers per arbitration"] - UNIT8 = 5, + Unit8 = 5, #[doc = "7: Sixteen unit transfers per arbitration"] - UNIT16 = 7, + Unit16 = 7, #[doc = "9: 32 unit transfers per arbitration"] - UNIT32 = 9, + Unit32 = 9, #[doc = "10: 64 unit transfers per arbitration"] - UNIT64 = 10, + Unit64 = 10, #[doc = "11: 128 unit transfers per arbitration"] - UNIT128 = 11, + Unit128 = 11, #[doc = "12: 256 unit transfers per arbitration"] - UNIT256 = 12, + Unit256 = 12, #[doc = "13: 512 unit transfers per arbitration"] - UNIT512 = 13, + Unit512 = 13, #[doc = "14: 1024 unit transfers per arbitration"] - UNIT1024 = 14, + Unit1024 = 14, #[doc = "15: Transfer all units as specified by the XFRCNT field"] - ALL = 15, + All = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BLOCKSIZE_A) -> Self { + fn from(variant: Blocksize) -> Self { variant as _ } } -impl BLOCKSIZE_R { +impl crate::FieldSpec for Blocksize { + type Ux = u8; +} +impl crate::IsEnum for Blocksize {} +#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] +pub type BlocksizeR = crate::FieldReader; +impl BlocksizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BLOCKSIZE_A::UNIT1), - 1 => Some(BLOCKSIZE_A::UNIT2), - 2 => Some(BLOCKSIZE_A::UNIT3), - 3 => Some(BLOCKSIZE_A::UNIT4), - 4 => Some(BLOCKSIZE_A::UNIT6), - 5 => Some(BLOCKSIZE_A::UNIT8), - 7 => Some(BLOCKSIZE_A::UNIT16), - 9 => Some(BLOCKSIZE_A::UNIT32), - 10 => Some(BLOCKSIZE_A::UNIT64), - 11 => Some(BLOCKSIZE_A::UNIT128), - 12 => Some(BLOCKSIZE_A::UNIT256), - 13 => Some(BLOCKSIZE_A::UNIT512), - 14 => Some(BLOCKSIZE_A::UNIT1024), - 15 => Some(BLOCKSIZE_A::ALL), + 0 => Some(Blocksize::Unit1), + 1 => Some(Blocksize::Unit2), + 2 => Some(Blocksize::Unit3), + 3 => Some(Blocksize::Unit4), + 4 => Some(Blocksize::Unit6), + 5 => Some(Blocksize::Unit8), + 7 => Some(Blocksize::Unit16), + 9 => Some(Blocksize::Unit32), + 10 => Some(Blocksize::Unit64), + 11 => Some(Blocksize::Unit128), + 12 => Some(Blocksize::Unit256), + 13 => Some(Blocksize::Unit512), + 14 => Some(Blocksize::Unit1024), + 15 => Some(Blocksize::All), _ => None, } } - #[doc = "Checks if the value of the field is `UNIT1`"] + #[doc = "One unit transfer per arbitration"] #[inline(always)] pub fn is_unit1(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1 + *self == Blocksize::Unit1 } - #[doc = "Checks if the value of the field is `UNIT2`"] + #[doc = "Two unit transfers per arbitration"] #[inline(always)] pub fn is_unit2(&self) -> bool { - *self == BLOCKSIZE_A::UNIT2 + *self == Blocksize::Unit2 } - #[doc = "Checks if the value of the field is `UNIT3`"] + #[doc = "Three unit transfers per arbitration"] #[inline(always)] pub fn is_unit3(&self) -> bool { - *self == BLOCKSIZE_A::UNIT3 + *self == Blocksize::Unit3 } - #[doc = "Checks if the value of the field is `UNIT4`"] + #[doc = "Four unit transfers per arbitration"] #[inline(always)] pub fn is_unit4(&self) -> bool { - *self == BLOCKSIZE_A::UNIT4 + *self == Blocksize::Unit4 } - #[doc = "Checks if the value of the field is `UNIT6`"] + #[doc = "Six unit transfers per arbitration"] #[inline(always)] pub fn is_unit6(&self) -> bool { - *self == BLOCKSIZE_A::UNIT6 + *self == Blocksize::Unit6 } - #[doc = "Checks if the value of the field is `UNIT8`"] + #[doc = "Eight unit transfers per arbitration"] #[inline(always)] pub fn is_unit8(&self) -> bool { - *self == BLOCKSIZE_A::UNIT8 + *self == Blocksize::Unit8 } - #[doc = "Checks if the value of the field is `UNIT16`"] + #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] pub fn is_unit16(&self) -> bool { - *self == BLOCKSIZE_A::UNIT16 + *self == Blocksize::Unit16 } - #[doc = "Checks if the value of the field is `UNIT32`"] + #[doc = "32 unit transfers per arbitration"] #[inline(always)] pub fn is_unit32(&self) -> bool { - *self == BLOCKSIZE_A::UNIT32 + *self == Blocksize::Unit32 } - #[doc = "Checks if the value of the field is `UNIT64`"] + #[doc = "64 unit transfers per arbitration"] #[inline(always)] pub fn is_unit64(&self) -> bool { - *self == BLOCKSIZE_A::UNIT64 + *self == Blocksize::Unit64 } - #[doc = "Checks if the value of the field is `UNIT128`"] + #[doc = "128 unit transfers per arbitration"] #[inline(always)] pub fn is_unit128(&self) -> bool { - *self == BLOCKSIZE_A::UNIT128 + *self == Blocksize::Unit128 } - #[doc = "Checks if the value of the field is `UNIT256`"] + #[doc = "256 unit transfers per arbitration"] #[inline(always)] pub fn is_unit256(&self) -> bool { - *self == BLOCKSIZE_A::UNIT256 + *self == Blocksize::Unit256 } - #[doc = "Checks if the value of the field is `UNIT512`"] + #[doc = "512 unit transfers per arbitration"] #[inline(always)] pub fn is_unit512(&self) -> bool { - *self == BLOCKSIZE_A::UNIT512 + *self == Blocksize::Unit512 } - #[doc = "Checks if the value of the field is `UNIT1024`"] + #[doc = "1024 unit transfers per arbitration"] #[inline(always)] pub fn is_unit1024(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1024 + *self == Blocksize::Unit1024 } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] pub fn is_all(&self) -> bool { - *self == BLOCKSIZE_A::ALL + *self == Blocksize::All } } #[doc = "Field `BLOCKSIZE` writer - Block Transfer Size"] -pub type BLOCKSIZE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH0_CTRL_SPEC, u8, BLOCKSIZE_A, 4, O>; -impl<'a, const O: u8> BLOCKSIZE_W<'a, O> { +pub type BlocksizeW<'a, REG> = crate::FieldWriter<'a, REG, 4, Blocksize>; +impl<'a, REG> BlocksizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One unit transfer per arbitration"] #[inline(always)] - pub fn unit1(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1) + pub fn unit1(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1) } #[doc = "Two unit transfers per arbitration"] #[inline(always)] - pub fn unit2(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT2) + pub fn unit2(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit2) } #[doc = "Three unit transfers per arbitration"] #[inline(always)] - pub fn unit3(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT3) + pub fn unit3(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit3) } #[doc = "Four unit transfers per arbitration"] #[inline(always)] - pub fn unit4(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT4) + pub fn unit4(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit4) } #[doc = "Six unit transfers per arbitration"] #[inline(always)] - pub fn unit6(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT6) + pub fn unit6(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit6) } #[doc = "Eight unit transfers per arbitration"] #[inline(always)] - pub fn unit8(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT8) + pub fn unit8(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit8) } #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] - pub fn unit16(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT16) + pub fn unit16(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit16) } #[doc = "32 unit transfers per arbitration"] #[inline(always)] - pub fn unit32(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT32) + pub fn unit32(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit32) } #[doc = "64 unit transfers per arbitration"] #[inline(always)] - pub fn unit64(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT64) + pub fn unit64(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit64) } #[doc = "128 unit transfers per arbitration"] #[inline(always)] - pub fn unit128(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT128) + pub fn unit128(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit128) } #[doc = "256 unit transfers per arbitration"] #[inline(always)] - pub fn unit256(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT256) + pub fn unit256(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit256) } #[doc = "512 unit transfers per arbitration"] #[inline(always)] - pub fn unit512(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT512) + pub fn unit512(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit512) } #[doc = "1024 unit transfers per arbitration"] #[inline(always)] - pub fn unit1024(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1024) + pub fn unit1024(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1024) } #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Blocksize::All) } } #[doc = "Field `DONEIEN` reader - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_R = crate::BitReader; +pub type DoneienR = crate::BitReader; #[doc = "Field `DONEIEN` writer - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH0_CTRL_SPEC, bool, O>; -#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] -pub type REQMODE_R = crate::BitReader; +pub type DoneienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "DMA Request Transfer Mode Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REQMODE_A { +pub enum Reqmode { #[doc = "0: The LDMA transfers one BLOCKSIZE per transfer request."] - BLOCK = 0, + Block = 0, #[doc = "1: One transfer request transfers all units as defined by the XFRCNT field."] - ALL = 1, + All = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REQMODE_A) -> Self { + fn from(variant: Reqmode) -> Self { variant as u8 != 0 } } -impl REQMODE_R { +#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] +pub type ReqmodeR = crate::BitReader; +impl ReqmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REQMODE_A { + pub const fn variant(&self) -> Reqmode { match self.bits { - false => REQMODE_A::BLOCK, - true => REQMODE_A::ALL, + false => Reqmode::Block, + true => Reqmode::All, } } - #[doc = "Checks if the value of the field is `BLOCK`"] + #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] pub fn is_block(&self) -> bool { - *self == REQMODE_A::BLOCK + *self == Reqmode::Block } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] pub fn is_all(&self) -> bool { - *self == REQMODE_A::ALL + *self == Reqmode::All } } #[doc = "Field `REQMODE` writer - DMA Request Transfer Mode Select"] -pub type REQMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH0_CTRL_SPEC, REQMODE_A, O>; -impl<'a, const O: u8> REQMODE_W<'a, O> { +pub type ReqmodeW<'a, REG> = crate::BitWriter<'a, REG, Reqmode>; +impl<'a, REG> ReqmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] - pub fn block(self) -> &'a mut W { - self.variant(REQMODE_A::BLOCK) + pub fn block(self) -> &'a mut crate::W { + self.variant(Reqmode::Block) } #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(REQMODE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Reqmode::All) } } #[doc = "Field `DECLOOPCNT` reader - Decrement Loop Count"] -pub type DECLOOPCNT_R = crate::BitReader; +pub type DecloopcntR = crate::BitReader; #[doc = "Field `DECLOOPCNT` writer - Decrement Loop Count"] -pub type DECLOOPCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH0_CTRL_SPEC, bool, O>; +pub type DecloopcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IGNORESREQ` reader - Ignore Sreq"] -pub type IGNORESREQ_R = crate::BitReader; +pub type IgnoresreqR = crate::BitReader; #[doc = "Field `IGNORESREQ` writer - Ignore Sreq"] -pub type IGNORESREQ_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH0_CTRL_SPEC, bool, O>; -#[doc = "Field `SRCINC` reader - Source Address Increment Size"] -pub type SRCINC_R = crate::FieldReader; +pub type IgnoresreqW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SRCINC_A { +pub enum Srcinc { #[doc = "0: Increment source address by one unit data size after each read"] - ONE = 0, + One = 0, #[doc = "1: Increment source address by two unit data sizes after each read"] - TWO = 1, + Two = 1, #[doc = "2: Increment source address by four unit data sizes after each read"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SRCINC_A) -> Self { + fn from(variant: Srcinc) -> Self { variant as _ } } -impl SRCINC_R { +impl crate::FieldSpec for Srcinc { + type Ux = u8; +} +impl crate::IsEnum for Srcinc {} +#[doc = "Field `SRCINC` reader - Source Address Increment Size"] +pub type SrcincR = crate::FieldReader; +impl SrcincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINC_A { + pub const fn variant(&self) -> Srcinc { match self.bits { - 0 => SRCINC_A::ONE, - 1 => SRCINC_A::TWO, - 2 => SRCINC_A::FOUR, - 3 => SRCINC_A::NONE, + 0 => Srcinc::One, + 1 => Srcinc::Two, + 2 => Srcinc::Four, + 3 => Srcinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == SRCINC_A::ONE + *self == Srcinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == SRCINC_A::TWO + *self == Srcinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == SRCINC_A::FOUR + *self == Srcinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SRCINC_A::NONE + *self == Srcinc::None } } #[doc = "Field `SRCINC` writer - Source Address Increment Size"] -pub type SRCINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH0_CTRL_SPEC, u8, SRCINC_A, 2, O>; -impl<'a, const O: u8> SRCINC_W<'a, O> { +pub type SrcincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Srcinc, crate::Safe>; +impl<'a, REG> SrcincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(SRCINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Srcinc::One) } #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(SRCINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Srcinc::Two) } #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(SRCINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Srcinc::Four) } #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SRCINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Srcinc::None) } } -#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] -pub type SIZE_R = crate::FieldReader; #[doc = "Unit Data Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIZE_A { +pub enum Size { #[doc = "0: Each unit transfer is a byte"] - BYTE = 0, + Byte = 0, #[doc = "1: Each unit transfer is a half-word"] - HALFWORD = 1, + Halfword = 1, #[doc = "2: Each unit transfer is a word"] - WORD = 2, + Word = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIZE_A) -> Self { + fn from(variant: Size) -> Self { variant as _ } } -impl SIZE_R { +impl crate::FieldSpec for Size { + type Ux = u8; +} +impl crate::IsEnum for Size {} +#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] +pub type SizeR = crate::FieldReader; +impl SizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIZE_A::BYTE), - 1 => Some(SIZE_A::HALFWORD), - 2 => Some(SIZE_A::WORD), + 0 => Some(Size::Byte), + 1 => Some(Size::Halfword), + 2 => Some(Size::Word), _ => None, } } - #[doc = "Checks if the value of the field is `BYTE`"] + #[doc = "Each unit transfer is a byte"] #[inline(always)] pub fn is_byte(&self) -> bool { - *self == SIZE_A::BYTE + *self == Size::Byte } - #[doc = "Checks if the value of the field is `HALFWORD`"] + #[doc = "Each unit transfer is a half-word"] #[inline(always)] pub fn is_halfword(&self) -> bool { - *self == SIZE_A::HALFWORD + *self == Size::Halfword } - #[doc = "Checks if the value of the field is `WORD`"] + #[doc = "Each unit transfer is a word"] #[inline(always)] pub fn is_word(&self) -> bool { - *self == SIZE_A::WORD + *self == Size::Word } } #[doc = "Field `SIZE` writer - Unit Data Transfer Size"] -pub type SIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH0_CTRL_SPEC, u8, SIZE_A, 2, O>; -impl<'a, const O: u8> SIZE_W<'a, O> { +pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Size>; +impl<'a, REG> SizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Each unit transfer is a byte"] #[inline(always)] - pub fn byte(self) -> &'a mut W { - self.variant(SIZE_A::BYTE) + pub fn byte(self) -> &'a mut crate::W { + self.variant(Size::Byte) } #[doc = "Each unit transfer is a half-word"] #[inline(always)] - pub fn halfword(self) -> &'a mut W { - self.variant(SIZE_A::HALFWORD) + pub fn halfword(self) -> &'a mut crate::W { + self.variant(Size::Halfword) } #[doc = "Each unit transfer is a word"] #[inline(always)] - pub fn word(self) -> &'a mut W { - self.variant(SIZE_A::WORD) + pub fn word(self) -> &'a mut crate::W { + self.variant(Size::Word) } } -#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] -pub type DSTINC_R = crate::FieldReader; #[doc = "Destination Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DSTINC_A { +pub enum Dstinc { #[doc = "0: Increment destination address by one unit data size after each write"] - ONE = 0, + One = 0, #[doc = "1: Increment destination address by two unit data sizes after each write"] - TWO = 1, + Two = 1, #[doc = "2: Increment destination address by four unit data sizes after each write"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DSTINC_A) -> Self { + fn from(variant: Dstinc) -> Self { variant as _ } } -impl DSTINC_R { +impl crate::FieldSpec for Dstinc { + type Ux = u8; +} +impl crate::IsEnum for Dstinc {} +#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] +pub type DstincR = crate::FieldReader; +impl DstincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINC_A { + pub const fn variant(&self) -> Dstinc { match self.bits { - 0 => DSTINC_A::ONE, - 1 => DSTINC_A::TWO, - 2 => DSTINC_A::FOUR, - 3 => DSTINC_A::NONE, + 0 => Dstinc::One, + 1 => Dstinc::Two, + 2 => Dstinc::Four, + 3 => Dstinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == DSTINC_A::ONE + *self == Dstinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == DSTINC_A::TWO + *self == Dstinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == DSTINC_A::FOUR + *self == Dstinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == DSTINC_A::NONE + *self == Dstinc::None } } #[doc = "Field `DSTINC` writer - Destination Address Increment Size"] -pub type DSTINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH0_CTRL_SPEC, u8, DSTINC_A, 2, O>; -impl<'a, const O: u8> DSTINC_W<'a, O> { +pub type DstincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dstinc, crate::Safe>; +impl<'a, REG> DstincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(DSTINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Dstinc::One) } #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(DSTINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Dstinc::Two) } #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(DSTINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Dstinc::Four) } #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(DSTINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Dstinc::None) } } -#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] -pub type SRCMODE_R = crate::BitReader; #[doc = "Source Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCMODE_A { +pub enum Srcmode { #[doc = "0: The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCMODE_A) -> Self { + fn from(variant: Srcmode) -> Self { variant as u8 != 0 } } -impl SRCMODE_R { +#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] +pub type SrcmodeR = crate::BitReader; +impl SrcmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCMODE_A { + pub const fn variant(&self) -> Srcmode { match self.bits { - false => SRCMODE_A::ABSOLUTE, - true => SRCMODE_A::RELATIVE, + false => Srcmode::Absolute, + true => Srcmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == SRCMODE_A::ABSOLUTE + *self == Srcmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == SRCMODE_A::RELATIVE + *self == Srcmode::Relative } } -#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] -pub type DSTMODE_R = crate::BitReader; #[doc = "Destination Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTMODE_A { +pub enum Dstmode { #[doc = "0: The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTMODE_A) -> Self { + fn from(variant: Dstmode) -> Self { variant as u8 != 0 } } -impl DSTMODE_R { +#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] +pub type DstmodeR = crate::BitReader; +impl DstmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTMODE_A { + pub const fn variant(&self) -> Dstmode { match self.bits { - false => DSTMODE_A::ABSOLUTE, - true => DSTMODE_A::RELATIVE, + false => Dstmode::Absolute, + true => Dstmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == DSTMODE_A::ABSOLUTE + *self == Dstmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == DSTMODE_A::RELATIVE + *self == Dstmode::Relative } } impl R { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] - pub fn structtype(&self) -> STRUCTTYPE_R { - STRUCTTYPE_R::new((self.bits & 3) as u8) + pub fn structtype(&self) -> StructtypeR { + StructtypeR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Structure DMA Transfer Request"] #[inline(always)] - pub fn structreq(&self) -> STRUCTREQ_R { - STRUCTREQ_R::new(((self.bits >> 3) & 1) != 0) + pub fn structreq(&self) -> StructreqR { + StructreqR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] - pub fn xfercnt(&self) -> XFERCNT_R { - XFERCNT_R::new(((self.bits >> 4) & 0x07ff) as u16) + pub fn xfercnt(&self) -> XfercntR { + XfercntR::new(((self.bits >> 4) & 0x07ff) as u16) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] - pub fn byteswap(&self) -> BYTESWAP_R { - BYTESWAP_R::new(((self.bits >> 15) & 1) != 0) + pub fn byteswap(&self) -> ByteswapR { + ByteswapR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] - pub fn blocksize(&self) -> BLOCKSIZE_R { - BLOCKSIZE_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn blocksize(&self) -> BlocksizeR { + BlocksizeR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] - pub fn doneien(&self) -> DONEIEN_R { - DONEIEN_R::new(((self.bits >> 20) & 1) != 0) + pub fn doneien(&self) -> DoneienR { + DoneienR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] - pub fn reqmode(&self) -> REQMODE_R { - REQMODE_R::new(((self.bits >> 21) & 1) != 0) + pub fn reqmode(&self) -> ReqmodeR { + ReqmodeR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] - pub fn decloopcnt(&self) -> DECLOOPCNT_R { - DECLOOPCNT_R::new(((self.bits >> 22) & 1) != 0) + pub fn decloopcnt(&self) -> DecloopcntR { + DecloopcntR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] - pub fn ignoresreq(&self) -> IGNORESREQ_R { - IGNORESREQ_R::new(((self.bits >> 23) & 1) != 0) + pub fn ignoresreq(&self) -> IgnoresreqR { + IgnoresreqR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] - pub fn srcinc(&self) -> SRCINC_R { - SRCINC_R::new(((self.bits >> 24) & 3) as u8) + pub fn srcinc(&self) -> SrcincR { + SrcincR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] - pub fn size(&self) -> SIZE_R { - SIZE_R::new(((self.bits >> 26) & 3) as u8) + pub fn size(&self) -> SizeR { + SizeR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] - pub fn dstinc(&self) -> DSTINC_R { - DSTINC_R::new(((self.bits >> 28) & 3) as u8) + pub fn dstinc(&self) -> DstincR { + DstincR::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bit 30 - Source Addressing Mode"] #[inline(always)] - pub fn srcmode(&self) -> SRCMODE_R { - SRCMODE_R::new(((self.bits >> 30) & 1) != 0) + pub fn srcmode(&self) -> SrcmodeR { + SrcmodeR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Destination Addressing Mode"] #[inline(always)] - pub fn dstmode(&self) -> DSTMODE_R { - DSTMODE_R::new(((self.bits >> 31) & 1) != 0) + pub fn dstmode(&self) -> DstmodeR { + DstmodeR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] #[must_use] - pub fn structtype(&mut self) -> STRUCTTYPE_W<0> { - STRUCTTYPE_W::new(self) + pub fn structtype(&mut self) -> StructtypeW { + StructtypeW::new(self, 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] #[must_use] - pub fn xfercnt(&mut self) -> XFERCNT_W<4> { - XFERCNT_W::new(self) + pub fn xfercnt(&mut self) -> XfercntW { + XfercntW::new(self, 4) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] #[must_use] - pub fn byteswap(&mut self) -> BYTESWAP_W<15> { - BYTESWAP_W::new(self) + pub fn byteswap(&mut self) -> ByteswapW { + ByteswapW::new(self, 15) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] #[must_use] - pub fn blocksize(&mut self) -> BLOCKSIZE_W<16> { - BLOCKSIZE_W::new(self) + pub fn blocksize(&mut self) -> BlocksizeW { + BlocksizeW::new(self, 16) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] #[must_use] - pub fn doneien(&mut self) -> DONEIEN_W<20> { - DONEIEN_W::new(self) + pub fn doneien(&mut self) -> DoneienW { + DoneienW::new(self, 20) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] #[must_use] - pub fn reqmode(&mut self) -> REQMODE_W<21> { - REQMODE_W::new(self) + pub fn reqmode(&mut self) -> ReqmodeW { + ReqmodeW::new(self, 21) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] #[must_use] - pub fn decloopcnt(&mut self) -> DECLOOPCNT_W<22> { - DECLOOPCNT_W::new(self) + pub fn decloopcnt(&mut self) -> DecloopcntW { + DecloopcntW::new(self, 22) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] #[must_use] - pub fn ignoresreq(&mut self) -> IGNORESREQ_W<23> { - IGNORESREQ_W::new(self) + pub fn ignoresreq(&mut self) -> IgnoresreqW { + IgnoresreqW::new(self, 23) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] #[must_use] - pub fn srcinc(&mut self) -> SRCINC_W<24> { - SRCINC_W::new(self) + pub fn srcinc(&mut self) -> SrcincW { + SrcincW::new(self, 24) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SIZE_W<26> { - SIZE_W::new(self) + pub fn size(&mut self) -> SizeW { + SizeW::new(self, 26) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] #[must_use] - pub fn dstinc(&mut self) -> DSTINC_W<28> { - DSTINC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstinc(&mut self) -> DstincW { + DstincW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0_ctrl](index.html) module"] -pub struct CH0_CTRL_SPEC; -impl crate::RegisterSpec for CH0_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch0CtrlSpec; +impl crate::RegisterSpec for Ch0CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch0_ctrl::R](R) reader structure"] -impl crate::Readable for CH0_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch0_ctrl::W](W) writer structure"] -impl crate::Writable for CH0_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch0_ctrl::R`](R) reader structure"] +impl crate::Readable for Ch0CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ch0_ctrl::W`](W) writer structure"] +impl crate::Writable for Ch0CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH0_CTRL to value 0"] -impl crate::Resettable for CH0_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch0CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch0_dst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch0_dst.rs index d7d17c2..7ef38b5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch0_dst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch0_dst.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH0_DST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH0_DST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DSTADDR` reader - Destination Data Address"] -pub type DSTADDR_R = crate::FieldReader; +pub type DstaddrR = crate::FieldReader; #[doc = "Field `DSTADDR` writer - Destination Data Address"] -pub type DSTADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH0_DST_SPEC, u32, u32, 32, O>; +pub type DstaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] - pub fn dstaddr(&self) -> DSTADDR_R { - DSTADDR_R::new(self.bits) + pub fn dstaddr(&self) -> DstaddrR { + DstaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] #[must_use] - pub fn dstaddr(&mut self) -> DSTADDR_W<0> { - DSTADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstaddr(&mut self) -> DstaddrW { + DstaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0_dst](index.html) module"] -pub struct CH0_DST_SPEC; -impl crate::RegisterSpec for CH0_DST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_dst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_dst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch0DstSpec; +impl crate::RegisterSpec for Ch0DstSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch0_dst::R](R) reader structure"] -impl crate::Readable for CH0_DST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch0_dst::W](W) writer structure"] -impl crate::Writable for CH0_DST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch0_dst::R`](R) reader structure"] +impl crate::Readable for Ch0DstSpec {} +#[doc = "`write(|w| ..)` method takes [`ch0_dst::W`](W) writer structure"] +impl crate::Writable for Ch0DstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH0_DST to value 0"] -impl crate::Resettable for CH0_DST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch0DstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch0_link.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch0_link.rs index eef3dc5..2a7d503 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch0_link.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch0_link.rs @@ -1,136 +1,96 @@ #[doc = "Register `CH0_LINK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH0_LINK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] -pub type LINKMODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Link Structure Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LINKMODE_A { +pub enum Linkmode { #[doc = "0: The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LINKMODE_A) -> Self { + fn from(variant: Linkmode) -> Self { variant as u8 != 0 } } -impl LINKMODE_R { +#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] +pub type LinkmodeR = crate::BitReader; +impl LinkmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LINKMODE_A { + pub const fn variant(&self) -> Linkmode { match self.bits { - false => LINKMODE_A::ABSOLUTE, - true => LINKMODE_A::RELATIVE, + false => Linkmode::Absolute, + true => Linkmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == LINKMODE_A::ABSOLUTE + *self == Linkmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == LINKMODE_A::RELATIVE + *self == Linkmode::Relative } } #[doc = "Field `LINK` reader - Link Next Structure"] -pub type LINK_R = crate::BitReader; +pub type LinkR = crate::BitReader; #[doc = "Field `LINK` writer - Link Next Structure"] -pub type LINK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH0_LINK_SPEC, bool, O>; +pub type LinkW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LINKADDR` reader - Link Structure Address"] -pub type LINKADDR_R = crate::FieldReader; +pub type LinkaddrR = crate::FieldReader; #[doc = "Field `LINKADDR` writer - Link Structure Address"] -pub type LINKADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH0_LINK_SPEC, u32, u32, 30, O>; +pub type LinkaddrW<'a, REG> = crate::FieldWriter<'a, REG, 30, u32>; impl R { #[doc = "Bit 0 - Link Structure Addressing Mode"] #[inline(always)] - pub fn linkmode(&self) -> LINKMODE_R { - LINKMODE_R::new((self.bits & 1) != 0) + pub fn linkmode(&self) -> LinkmodeR { + LinkmodeR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] - pub fn link(&self) -> LINK_R { - LINK_R::new(((self.bits >> 1) & 1) != 0) + pub fn link(&self) -> LinkR { + LinkR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] - pub fn linkaddr(&self) -> LINKADDR_R { - LINKADDR_R::new((self.bits >> 2) & 0x3fff_ffff) + pub fn linkaddr(&self) -> LinkaddrR { + LinkaddrR::new((self.bits >> 2) & 0x3fff_ffff) } } impl W { #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] #[must_use] - pub fn link(&mut self) -> LINK_W<1> { - LINK_W::new(self) + pub fn link(&mut self) -> LinkW { + LinkW::new(self, 1) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] #[must_use] - pub fn linkaddr(&mut self) -> LINKADDR_W<2> { - LINKADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn linkaddr(&mut self) -> LinkaddrW { + LinkaddrW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0_link](index.html) module"] -pub struct CH0_LINK_SPEC; -impl crate::RegisterSpec for CH0_LINK_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_link::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_link::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch0LinkSpec; +impl crate::RegisterSpec for Ch0LinkSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch0_link::R](R) reader structure"] -impl crate::Readable for CH0_LINK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch0_link::W](W) writer structure"] -impl crate::Writable for CH0_LINK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch0_link::R`](R) reader structure"] +impl crate::Readable for Ch0LinkSpec {} +#[doc = "`write(|w| ..)` method takes [`ch0_link::W`](W) writer structure"] +impl crate::Writable for Ch0LinkSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH0_LINK to value 0"] -impl crate::Resettable for CH0_LINK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch0LinkSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch0_loop.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch0_loop.rs index ff204c0..f9f6f28 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch0_loop.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch0_loop.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH0_LOOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH0_LOOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOOPCNT` reader - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_R = crate::FieldReader; +pub type LoopcntR = crate::FieldReader; #[doc = "Field `LOOPCNT` writer - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH0_LOOP_SPEC, u8, u8, 8, O>; +pub type LoopcntW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] - pub fn loopcnt(&self) -> LOOPCNT_R { - LOOPCNT_R::new((self.bits & 0xff) as u8) + pub fn loopcnt(&self) -> LoopcntR { + LoopcntR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] #[must_use] - pub fn loopcnt(&mut self) -> LOOPCNT_W<0> { - LOOPCNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn loopcnt(&mut self) -> LoopcntW { + LoopcntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0_loop](index.html) module"] -pub struct CH0_LOOP_SPEC; -impl crate::RegisterSpec for CH0_LOOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_loop::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_loop::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch0LoopSpec; +impl crate::RegisterSpec for Ch0LoopSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch0_loop::R](R) reader structure"] -impl crate::Readable for CH0_LOOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch0_loop::W](W) writer structure"] -impl crate::Writable for CH0_LOOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch0_loop::R`](R) reader structure"] +impl crate::Readable for Ch0LoopSpec {} +#[doc = "`write(|w| ..)` method takes [`ch0_loop::W`](W) writer structure"] +impl crate::Writable for Ch0LoopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH0_LOOP to value 0"] -impl crate::Resettable for CH0_LOOP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch0LoopSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch0_src.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch0_src.rs index 0aa839f..fb91b13 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch0_src.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch0_src.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH0_SRC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH0_SRC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SRCADDR` reader - Source Data Address"] -pub type SRCADDR_R = crate::FieldReader; +pub type SrcaddrR = crate::FieldReader; #[doc = "Field `SRCADDR` writer - Source Data Address"] -pub type SRCADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH0_SRC_SPEC, u32, u32, 32, O>; +pub type SrcaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] - pub fn srcaddr(&self) -> SRCADDR_R { - SRCADDR_R::new(self.bits) + pub fn srcaddr(&self) -> SrcaddrR { + SrcaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] #[must_use] - pub fn srcaddr(&mut self) -> SRCADDR_W<0> { - SRCADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn srcaddr(&mut self) -> SrcaddrW { + SrcaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0_src](index.html) module"] -pub struct CH0_SRC_SPEC; -impl crate::RegisterSpec for CH0_SRC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_src::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_src::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch0SrcSpec; +impl crate::RegisterSpec for Ch0SrcSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch0_src::R](R) reader structure"] -impl crate::Readable for CH0_SRC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch0_src::W](W) writer structure"] -impl crate::Writable for CH0_SRC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch0_src::R`](R) reader structure"] +impl crate::Readable for Ch0SrcSpec {} +#[doc = "`write(|w| ..)` method takes [`ch0_src::W`](W) writer structure"] +impl crate::Writable for Ch0SrcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH0_SRC to value 0"] -impl crate::Resettable for CH0_SRC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch0SrcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch1_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch1_cfg.rs index 49318a6..9548a0c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch1_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch1_cfg.rs @@ -1,277 +1,250 @@ #[doc = "Register `CH1_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH1_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] -pub type ARBSLOTS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Arbitration Slot Number Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ARBSLOTS_A { +pub enum Arbslots { #[doc = "0: One arbitration slot selected"] - ONE = 0, + One = 0, #[doc = "1: Two arbitration slots selected"] - TWO = 1, + Two = 1, #[doc = "2: Four arbitration slots selected"] - FOUR = 2, + Four = 2, #[doc = "3: Eight arbitration slots selected"] - EIGHT = 3, + Eight = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ARBSLOTS_A) -> Self { + fn from(variant: Arbslots) -> Self { variant as _ } } -impl ARBSLOTS_R { +impl crate::FieldSpec for Arbslots { + type Ux = u8; +} +impl crate::IsEnum for Arbslots {} +#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] +pub type ArbslotsR = crate::FieldReader; +impl ArbslotsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ARBSLOTS_A { + pub const fn variant(&self) -> Arbslots { match self.bits { - 0 => ARBSLOTS_A::ONE, - 1 => ARBSLOTS_A::TWO, - 2 => ARBSLOTS_A::FOUR, - 3 => ARBSLOTS_A::EIGHT, + 0 => Arbslots::One, + 1 => Arbslots::Two, + 2 => Arbslots::Four, + 3 => Arbslots::Eight, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "One arbitration slot selected"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == ARBSLOTS_A::ONE + *self == Arbslots::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Two arbitration slots selected"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == ARBSLOTS_A::TWO + *self == Arbslots::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Four arbitration slots selected"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == ARBSLOTS_A::FOUR + *self == Arbslots::Four } - #[doc = "Checks if the value of the field is `EIGHT`"] + #[doc = "Eight arbitration slots selected"] #[inline(always)] pub fn is_eight(&self) -> bool { - *self == ARBSLOTS_A::EIGHT + *self == Arbslots::Eight } } #[doc = "Field `ARBSLOTS` writer - Arbitration Slot Number Select"] -pub type ARBSLOTS_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH1_CFG_SPEC, u8, ARBSLOTS_A, 2, O>; -impl<'a, const O: u8> ARBSLOTS_W<'a, O> { +pub type ArbslotsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Arbslots, crate::Safe>; +impl<'a, REG> ArbslotsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One arbitration slot selected"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(ARBSLOTS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Arbslots::One) } #[doc = "Two arbitration slots selected"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(ARBSLOTS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Arbslots::Two) } #[doc = "Four arbitration slots selected"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(ARBSLOTS_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Arbslots::Four) } #[doc = "Eight arbitration slots selected"] #[inline(always)] - pub fn eight(self) -> &'a mut W { - self.variant(ARBSLOTS_A::EIGHT) + pub fn eight(self) -> &'a mut crate::W { + self.variant(Arbslots::Eight) } } -#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] -pub type SRCINCSIGN_R = crate::BitReader; #[doc = "Source Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCINCSIGN_A { +pub enum Srcincsign { #[doc = "0: Increment source address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement source address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCINCSIGN_A) -> Self { + fn from(variant: Srcincsign) -> Self { variant as u8 != 0 } } -impl SRCINCSIGN_R { +#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] +pub type SrcincsignR = crate::BitReader; +impl SrcincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINCSIGN_A { + pub const fn variant(&self) -> Srcincsign { match self.bits { - false => SRCINCSIGN_A::POSITIVE, - true => SRCINCSIGN_A::NEGATIVE, + false => Srcincsign::Positive, + true => Srcincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment source address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == SRCINCSIGN_A::POSITIVE + *self == Srcincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement source address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == SRCINCSIGN_A::NEGATIVE + *self == Srcincsign::Negative } } #[doc = "Field `SRCINCSIGN` writer - Source Address Increment Sign"] -pub type SRCINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH1_CFG_SPEC, SRCINCSIGN_A, O>; -impl<'a, const O: u8> SRCINCSIGN_W<'a, O> { +pub type SrcincsignW<'a, REG> = crate::BitWriter<'a, REG, Srcincsign>; +impl<'a, REG> SrcincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment source address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Srcincsign::Positive) } #[doc = "Decrement source address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Srcincsign::Negative) } } -#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] -pub type DSTINCSIGN_R = crate::BitReader; #[doc = "Destination Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTINCSIGN_A { +pub enum Dstincsign { #[doc = "0: Increment destination address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement destination address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTINCSIGN_A) -> Self { + fn from(variant: Dstincsign) -> Self { variant as u8 != 0 } } -impl DSTINCSIGN_R { +#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] +pub type DstincsignR = crate::BitReader; +impl DstincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINCSIGN_A { + pub const fn variant(&self) -> Dstincsign { match self.bits { - false => DSTINCSIGN_A::POSITIVE, - true => DSTINCSIGN_A::NEGATIVE, + false => Dstincsign::Positive, + true => Dstincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment destination address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == DSTINCSIGN_A::POSITIVE + *self == Dstincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement destination address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == DSTINCSIGN_A::NEGATIVE + *self == Dstincsign::Negative } } #[doc = "Field `DSTINCSIGN` writer - Destination Address Increment Sign"] -pub type DSTINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH1_CFG_SPEC, DSTINCSIGN_A, O>; -impl<'a, const O: u8> DSTINCSIGN_W<'a, O> { +pub type DstincsignW<'a, REG> = crate::BitWriter<'a, REG, Dstincsign>; +impl<'a, REG> DstincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment destination address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Dstincsign::Positive) } #[doc = "Decrement destination address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Dstincsign::Negative) } } impl R { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] - pub fn arbslots(&self) -> ARBSLOTS_R { - ARBSLOTS_R::new(((self.bits >> 16) & 3) as u8) + pub fn arbslots(&self) -> ArbslotsR { + ArbslotsR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] - pub fn srcincsign(&self) -> SRCINCSIGN_R { - SRCINCSIGN_R::new(((self.bits >> 20) & 1) != 0) + pub fn srcincsign(&self) -> SrcincsignR { + SrcincsignR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] - pub fn dstincsign(&self) -> DSTINCSIGN_R { - DSTINCSIGN_R::new(((self.bits >> 21) & 1) != 0) + pub fn dstincsign(&self) -> DstincsignR { + DstincsignR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] #[must_use] - pub fn arbslots(&mut self) -> ARBSLOTS_W<16> { - ARBSLOTS_W::new(self) + pub fn arbslots(&mut self) -> ArbslotsW { + ArbslotsW::new(self, 16) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] #[must_use] - pub fn srcincsign(&mut self) -> SRCINCSIGN_W<20> { - SRCINCSIGN_W::new(self) + pub fn srcincsign(&mut self) -> SrcincsignW { + SrcincsignW::new(self, 20) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] #[must_use] - pub fn dstincsign(&mut self) -> DSTINCSIGN_W<21> { - DSTINCSIGN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstincsign(&mut self) -> DstincsignW { + DstincsignW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch1_cfg](index.html) module"] -pub struct CH1_CFG_SPEC; -impl crate::RegisterSpec for CH1_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch1CfgSpec; +impl crate::RegisterSpec for Ch1CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch1_cfg::R](R) reader structure"] -impl crate::Readable for CH1_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch1_cfg::W](W) writer structure"] -impl crate::Writable for CH1_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch1_cfg::R`](R) reader structure"] +impl crate::Readable for Ch1CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`ch1_cfg::W`](W) writer structure"] +impl crate::Writable for Ch1CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH1_CFG to value 0"] -impl crate::Resettable for CH1_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch1CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch1_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch1_ctrl.rs index 6e4a70c..c8dd5d3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch1_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch1_ctrl.rs @@ -1,843 +1,842 @@ #[doc = "Register `CH1_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH1_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] -pub type STRUCTTYPE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DMA Structure Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STRUCTTYPE_A { +pub enum Structtype { #[doc = "0: DMA transfer structure type selected."] - TRANSFER = 0, + Transfer = 0, #[doc = "1: Synchronization structure type selected."] - SYNCHRONIZE = 1, + Synchronize = 1, #[doc = "2: Write immediate value structure type selected."] - WRITE = 2, + Write = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STRUCTTYPE_A) -> Self { + fn from(variant: Structtype) -> Self { variant as _ } } -impl STRUCTTYPE_R { +impl crate::FieldSpec for Structtype { + type Ux = u8; +} +impl crate::IsEnum for Structtype {} +#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] +pub type StructtypeR = crate::FieldReader; +impl StructtypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(STRUCTTYPE_A::TRANSFER), - 1 => Some(STRUCTTYPE_A::SYNCHRONIZE), - 2 => Some(STRUCTTYPE_A::WRITE), + 0 => Some(Structtype::Transfer), + 1 => Some(Structtype::Synchronize), + 2 => Some(Structtype::Write), _ => None, } } - #[doc = "Checks if the value of the field is `TRANSFER`"] + #[doc = "DMA transfer structure type selected."] #[inline(always)] pub fn is_transfer(&self) -> bool { - *self == STRUCTTYPE_A::TRANSFER + *self == Structtype::Transfer } - #[doc = "Checks if the value of the field is `SYNCHRONIZE`"] + #[doc = "Synchronization structure type selected."] #[inline(always)] pub fn is_synchronize(&self) -> bool { - *self == STRUCTTYPE_A::SYNCHRONIZE + *self == Structtype::Synchronize } - #[doc = "Checks if the value of the field is `WRITE`"] + #[doc = "Write immediate value structure type selected."] #[inline(always)] pub fn is_write(&self) -> bool { - *self == STRUCTTYPE_A::WRITE + *self == Structtype::Write } } #[doc = "Field `STRUCTTYPE` writer - DMA Structure Type"] -pub type STRUCTTYPE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH1_CTRL_SPEC, u8, STRUCTTYPE_A, 2, O>; -impl<'a, const O: u8> STRUCTTYPE_W<'a, O> { +pub type StructtypeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Structtype>; +impl<'a, REG> StructtypeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "DMA transfer structure type selected."] #[inline(always)] - pub fn transfer(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::TRANSFER) + pub fn transfer(self) -> &'a mut crate::W { + self.variant(Structtype::Transfer) } #[doc = "Synchronization structure type selected."] #[inline(always)] - pub fn synchronize(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::SYNCHRONIZE) + pub fn synchronize(self) -> &'a mut crate::W { + self.variant(Structtype::Synchronize) } #[doc = "Write immediate value structure type selected."] #[inline(always)] - pub fn write(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::WRITE) + pub fn write(self) -> &'a mut crate::W { + self.variant(Structtype::Write) } } #[doc = "Field `STRUCTREQ` reader - Structure DMA Transfer Request"] -pub type STRUCTREQ_R = crate::BitReader; +pub type StructreqR = crate::BitReader; #[doc = "Field `XFERCNT` reader - DMA Unit Data Transfer Count"] -pub type XFERCNT_R = crate::FieldReader; +pub type XfercntR = crate::FieldReader; #[doc = "Field `XFERCNT` writer - DMA Unit Data Transfer Count"] -pub type XFERCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH1_CTRL_SPEC, u16, u16, 11, O>; +pub type XfercntW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `BYTESWAP` reader - Endian Byte Swap"] -pub type BYTESWAP_R = crate::BitReader; +pub type ByteswapR = crate::BitReader; #[doc = "Field `BYTESWAP` writer - Endian Byte Swap"] -pub type BYTESWAP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH1_CTRL_SPEC, bool, O>; -#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] -pub type BLOCKSIZE_R = crate::FieldReader; +pub type ByteswapW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Block Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BLOCKSIZE_A { +pub enum Blocksize { #[doc = "0: One unit transfer per arbitration"] - UNIT1 = 0, + Unit1 = 0, #[doc = "1: Two unit transfers per arbitration"] - UNIT2 = 1, + Unit2 = 1, #[doc = "2: Three unit transfers per arbitration"] - UNIT3 = 2, + Unit3 = 2, #[doc = "3: Four unit transfers per arbitration"] - UNIT4 = 3, + Unit4 = 3, #[doc = "4: Six unit transfers per arbitration"] - UNIT6 = 4, + Unit6 = 4, #[doc = "5: Eight unit transfers per arbitration"] - UNIT8 = 5, + Unit8 = 5, #[doc = "7: Sixteen unit transfers per arbitration"] - UNIT16 = 7, + Unit16 = 7, #[doc = "9: 32 unit transfers per arbitration"] - UNIT32 = 9, + Unit32 = 9, #[doc = "10: 64 unit transfers per arbitration"] - UNIT64 = 10, + Unit64 = 10, #[doc = "11: 128 unit transfers per arbitration"] - UNIT128 = 11, + Unit128 = 11, #[doc = "12: 256 unit transfers per arbitration"] - UNIT256 = 12, + Unit256 = 12, #[doc = "13: 512 unit transfers per arbitration"] - UNIT512 = 13, + Unit512 = 13, #[doc = "14: 1024 unit transfers per arbitration"] - UNIT1024 = 14, + Unit1024 = 14, #[doc = "15: Transfer all units as specified by the XFRCNT field"] - ALL = 15, + All = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BLOCKSIZE_A) -> Self { + fn from(variant: Blocksize) -> Self { variant as _ } } -impl BLOCKSIZE_R { +impl crate::FieldSpec for Blocksize { + type Ux = u8; +} +impl crate::IsEnum for Blocksize {} +#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] +pub type BlocksizeR = crate::FieldReader; +impl BlocksizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BLOCKSIZE_A::UNIT1), - 1 => Some(BLOCKSIZE_A::UNIT2), - 2 => Some(BLOCKSIZE_A::UNIT3), - 3 => Some(BLOCKSIZE_A::UNIT4), - 4 => Some(BLOCKSIZE_A::UNIT6), - 5 => Some(BLOCKSIZE_A::UNIT8), - 7 => Some(BLOCKSIZE_A::UNIT16), - 9 => Some(BLOCKSIZE_A::UNIT32), - 10 => Some(BLOCKSIZE_A::UNIT64), - 11 => Some(BLOCKSIZE_A::UNIT128), - 12 => Some(BLOCKSIZE_A::UNIT256), - 13 => Some(BLOCKSIZE_A::UNIT512), - 14 => Some(BLOCKSIZE_A::UNIT1024), - 15 => Some(BLOCKSIZE_A::ALL), + 0 => Some(Blocksize::Unit1), + 1 => Some(Blocksize::Unit2), + 2 => Some(Blocksize::Unit3), + 3 => Some(Blocksize::Unit4), + 4 => Some(Blocksize::Unit6), + 5 => Some(Blocksize::Unit8), + 7 => Some(Blocksize::Unit16), + 9 => Some(Blocksize::Unit32), + 10 => Some(Blocksize::Unit64), + 11 => Some(Blocksize::Unit128), + 12 => Some(Blocksize::Unit256), + 13 => Some(Blocksize::Unit512), + 14 => Some(Blocksize::Unit1024), + 15 => Some(Blocksize::All), _ => None, } } - #[doc = "Checks if the value of the field is `UNIT1`"] + #[doc = "One unit transfer per arbitration"] #[inline(always)] pub fn is_unit1(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1 + *self == Blocksize::Unit1 } - #[doc = "Checks if the value of the field is `UNIT2`"] + #[doc = "Two unit transfers per arbitration"] #[inline(always)] pub fn is_unit2(&self) -> bool { - *self == BLOCKSIZE_A::UNIT2 + *self == Blocksize::Unit2 } - #[doc = "Checks if the value of the field is `UNIT3`"] + #[doc = "Three unit transfers per arbitration"] #[inline(always)] pub fn is_unit3(&self) -> bool { - *self == BLOCKSIZE_A::UNIT3 + *self == Blocksize::Unit3 } - #[doc = "Checks if the value of the field is `UNIT4`"] + #[doc = "Four unit transfers per arbitration"] #[inline(always)] pub fn is_unit4(&self) -> bool { - *self == BLOCKSIZE_A::UNIT4 + *self == Blocksize::Unit4 } - #[doc = "Checks if the value of the field is `UNIT6`"] + #[doc = "Six unit transfers per arbitration"] #[inline(always)] pub fn is_unit6(&self) -> bool { - *self == BLOCKSIZE_A::UNIT6 + *self == Blocksize::Unit6 } - #[doc = "Checks if the value of the field is `UNIT8`"] + #[doc = "Eight unit transfers per arbitration"] #[inline(always)] pub fn is_unit8(&self) -> bool { - *self == BLOCKSIZE_A::UNIT8 + *self == Blocksize::Unit8 } - #[doc = "Checks if the value of the field is `UNIT16`"] + #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] pub fn is_unit16(&self) -> bool { - *self == BLOCKSIZE_A::UNIT16 + *self == Blocksize::Unit16 } - #[doc = "Checks if the value of the field is `UNIT32`"] + #[doc = "32 unit transfers per arbitration"] #[inline(always)] pub fn is_unit32(&self) -> bool { - *self == BLOCKSIZE_A::UNIT32 + *self == Blocksize::Unit32 } - #[doc = "Checks if the value of the field is `UNIT64`"] + #[doc = "64 unit transfers per arbitration"] #[inline(always)] pub fn is_unit64(&self) -> bool { - *self == BLOCKSIZE_A::UNIT64 + *self == Blocksize::Unit64 } - #[doc = "Checks if the value of the field is `UNIT128`"] + #[doc = "128 unit transfers per arbitration"] #[inline(always)] pub fn is_unit128(&self) -> bool { - *self == BLOCKSIZE_A::UNIT128 + *self == Blocksize::Unit128 } - #[doc = "Checks if the value of the field is `UNIT256`"] + #[doc = "256 unit transfers per arbitration"] #[inline(always)] pub fn is_unit256(&self) -> bool { - *self == BLOCKSIZE_A::UNIT256 + *self == Blocksize::Unit256 } - #[doc = "Checks if the value of the field is `UNIT512`"] + #[doc = "512 unit transfers per arbitration"] #[inline(always)] pub fn is_unit512(&self) -> bool { - *self == BLOCKSIZE_A::UNIT512 + *self == Blocksize::Unit512 } - #[doc = "Checks if the value of the field is `UNIT1024`"] + #[doc = "1024 unit transfers per arbitration"] #[inline(always)] pub fn is_unit1024(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1024 + *self == Blocksize::Unit1024 } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] pub fn is_all(&self) -> bool { - *self == BLOCKSIZE_A::ALL + *self == Blocksize::All } } #[doc = "Field `BLOCKSIZE` writer - Block Transfer Size"] -pub type BLOCKSIZE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH1_CTRL_SPEC, u8, BLOCKSIZE_A, 4, O>; -impl<'a, const O: u8> BLOCKSIZE_W<'a, O> { +pub type BlocksizeW<'a, REG> = crate::FieldWriter<'a, REG, 4, Blocksize>; +impl<'a, REG> BlocksizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One unit transfer per arbitration"] #[inline(always)] - pub fn unit1(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1) + pub fn unit1(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1) } #[doc = "Two unit transfers per arbitration"] #[inline(always)] - pub fn unit2(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT2) + pub fn unit2(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit2) } #[doc = "Three unit transfers per arbitration"] #[inline(always)] - pub fn unit3(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT3) + pub fn unit3(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit3) } #[doc = "Four unit transfers per arbitration"] #[inline(always)] - pub fn unit4(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT4) + pub fn unit4(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit4) } #[doc = "Six unit transfers per arbitration"] #[inline(always)] - pub fn unit6(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT6) + pub fn unit6(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit6) } #[doc = "Eight unit transfers per arbitration"] #[inline(always)] - pub fn unit8(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT8) + pub fn unit8(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit8) } #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] - pub fn unit16(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT16) + pub fn unit16(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit16) } #[doc = "32 unit transfers per arbitration"] #[inline(always)] - pub fn unit32(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT32) + pub fn unit32(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit32) } #[doc = "64 unit transfers per arbitration"] #[inline(always)] - pub fn unit64(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT64) + pub fn unit64(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit64) } #[doc = "128 unit transfers per arbitration"] #[inline(always)] - pub fn unit128(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT128) + pub fn unit128(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit128) } #[doc = "256 unit transfers per arbitration"] #[inline(always)] - pub fn unit256(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT256) + pub fn unit256(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit256) } #[doc = "512 unit transfers per arbitration"] #[inline(always)] - pub fn unit512(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT512) + pub fn unit512(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit512) } #[doc = "1024 unit transfers per arbitration"] #[inline(always)] - pub fn unit1024(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1024) + pub fn unit1024(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1024) } #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Blocksize::All) } } #[doc = "Field `DONEIEN` reader - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_R = crate::BitReader; +pub type DoneienR = crate::BitReader; #[doc = "Field `DONEIEN` writer - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH1_CTRL_SPEC, bool, O>; -#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] -pub type REQMODE_R = crate::BitReader; +pub type DoneienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "DMA Request Transfer Mode Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REQMODE_A { +pub enum Reqmode { #[doc = "0: The LDMA transfers one BLOCKSIZE per transfer request."] - BLOCK = 0, + Block = 0, #[doc = "1: One transfer request transfers all units as defined by the XFRCNT field."] - ALL = 1, + All = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REQMODE_A) -> Self { + fn from(variant: Reqmode) -> Self { variant as u8 != 0 } } -impl REQMODE_R { +#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] +pub type ReqmodeR = crate::BitReader; +impl ReqmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REQMODE_A { + pub const fn variant(&self) -> Reqmode { match self.bits { - false => REQMODE_A::BLOCK, - true => REQMODE_A::ALL, + false => Reqmode::Block, + true => Reqmode::All, } } - #[doc = "Checks if the value of the field is `BLOCK`"] + #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] pub fn is_block(&self) -> bool { - *self == REQMODE_A::BLOCK + *self == Reqmode::Block } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] pub fn is_all(&self) -> bool { - *self == REQMODE_A::ALL + *self == Reqmode::All } } #[doc = "Field `REQMODE` writer - DMA Request Transfer Mode Select"] -pub type REQMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH1_CTRL_SPEC, REQMODE_A, O>; -impl<'a, const O: u8> REQMODE_W<'a, O> { +pub type ReqmodeW<'a, REG> = crate::BitWriter<'a, REG, Reqmode>; +impl<'a, REG> ReqmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] - pub fn block(self) -> &'a mut W { - self.variant(REQMODE_A::BLOCK) + pub fn block(self) -> &'a mut crate::W { + self.variant(Reqmode::Block) } #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(REQMODE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Reqmode::All) } } #[doc = "Field `DECLOOPCNT` reader - Decrement Loop Count"] -pub type DECLOOPCNT_R = crate::BitReader; +pub type DecloopcntR = crate::BitReader; #[doc = "Field `DECLOOPCNT` writer - Decrement Loop Count"] -pub type DECLOOPCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH1_CTRL_SPEC, bool, O>; +pub type DecloopcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IGNORESREQ` reader - Ignore Sreq"] -pub type IGNORESREQ_R = crate::BitReader; +pub type IgnoresreqR = crate::BitReader; #[doc = "Field `IGNORESREQ` writer - Ignore Sreq"] -pub type IGNORESREQ_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH1_CTRL_SPEC, bool, O>; -#[doc = "Field `SRCINC` reader - Source Address Increment Size"] -pub type SRCINC_R = crate::FieldReader; +pub type IgnoresreqW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SRCINC_A { +pub enum Srcinc { #[doc = "0: Increment source address by one unit data size after each read"] - ONE = 0, + One = 0, #[doc = "1: Increment source address by two unit data sizes after each read"] - TWO = 1, + Two = 1, #[doc = "2: Increment source address by four unit data sizes after each read"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SRCINC_A) -> Self { + fn from(variant: Srcinc) -> Self { variant as _ } } -impl SRCINC_R { +impl crate::FieldSpec for Srcinc { + type Ux = u8; +} +impl crate::IsEnum for Srcinc {} +#[doc = "Field `SRCINC` reader - Source Address Increment Size"] +pub type SrcincR = crate::FieldReader; +impl SrcincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINC_A { + pub const fn variant(&self) -> Srcinc { match self.bits { - 0 => SRCINC_A::ONE, - 1 => SRCINC_A::TWO, - 2 => SRCINC_A::FOUR, - 3 => SRCINC_A::NONE, + 0 => Srcinc::One, + 1 => Srcinc::Two, + 2 => Srcinc::Four, + 3 => Srcinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == SRCINC_A::ONE + *self == Srcinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == SRCINC_A::TWO + *self == Srcinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == SRCINC_A::FOUR + *self == Srcinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SRCINC_A::NONE + *self == Srcinc::None } } #[doc = "Field `SRCINC` writer - Source Address Increment Size"] -pub type SRCINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH1_CTRL_SPEC, u8, SRCINC_A, 2, O>; -impl<'a, const O: u8> SRCINC_W<'a, O> { +pub type SrcincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Srcinc, crate::Safe>; +impl<'a, REG> SrcincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(SRCINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Srcinc::One) } #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(SRCINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Srcinc::Two) } #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(SRCINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Srcinc::Four) } #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SRCINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Srcinc::None) } } -#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] -pub type SIZE_R = crate::FieldReader; #[doc = "Unit Data Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIZE_A { +pub enum Size { #[doc = "0: Each unit transfer is a byte"] - BYTE = 0, + Byte = 0, #[doc = "1: Each unit transfer is a half-word"] - HALFWORD = 1, + Halfword = 1, #[doc = "2: Each unit transfer is a word"] - WORD = 2, + Word = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIZE_A) -> Self { + fn from(variant: Size) -> Self { variant as _ } } -impl SIZE_R { +impl crate::FieldSpec for Size { + type Ux = u8; +} +impl crate::IsEnum for Size {} +#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] +pub type SizeR = crate::FieldReader; +impl SizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIZE_A::BYTE), - 1 => Some(SIZE_A::HALFWORD), - 2 => Some(SIZE_A::WORD), + 0 => Some(Size::Byte), + 1 => Some(Size::Halfword), + 2 => Some(Size::Word), _ => None, } } - #[doc = "Checks if the value of the field is `BYTE`"] + #[doc = "Each unit transfer is a byte"] #[inline(always)] pub fn is_byte(&self) -> bool { - *self == SIZE_A::BYTE + *self == Size::Byte } - #[doc = "Checks if the value of the field is `HALFWORD`"] + #[doc = "Each unit transfer is a half-word"] #[inline(always)] pub fn is_halfword(&self) -> bool { - *self == SIZE_A::HALFWORD + *self == Size::Halfword } - #[doc = "Checks if the value of the field is `WORD`"] + #[doc = "Each unit transfer is a word"] #[inline(always)] pub fn is_word(&self) -> bool { - *self == SIZE_A::WORD + *self == Size::Word } } #[doc = "Field `SIZE` writer - Unit Data Transfer Size"] -pub type SIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH1_CTRL_SPEC, u8, SIZE_A, 2, O>; -impl<'a, const O: u8> SIZE_W<'a, O> { +pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Size>; +impl<'a, REG> SizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Each unit transfer is a byte"] #[inline(always)] - pub fn byte(self) -> &'a mut W { - self.variant(SIZE_A::BYTE) + pub fn byte(self) -> &'a mut crate::W { + self.variant(Size::Byte) } #[doc = "Each unit transfer is a half-word"] #[inline(always)] - pub fn halfword(self) -> &'a mut W { - self.variant(SIZE_A::HALFWORD) + pub fn halfword(self) -> &'a mut crate::W { + self.variant(Size::Halfword) } #[doc = "Each unit transfer is a word"] #[inline(always)] - pub fn word(self) -> &'a mut W { - self.variant(SIZE_A::WORD) + pub fn word(self) -> &'a mut crate::W { + self.variant(Size::Word) } } -#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] -pub type DSTINC_R = crate::FieldReader; #[doc = "Destination Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DSTINC_A { +pub enum Dstinc { #[doc = "0: Increment destination address by one unit data size after each write"] - ONE = 0, + One = 0, #[doc = "1: Increment destination address by two unit data sizes after each write"] - TWO = 1, + Two = 1, #[doc = "2: Increment destination address by four unit data sizes after each write"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DSTINC_A) -> Self { + fn from(variant: Dstinc) -> Self { variant as _ } } -impl DSTINC_R { +impl crate::FieldSpec for Dstinc { + type Ux = u8; +} +impl crate::IsEnum for Dstinc {} +#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] +pub type DstincR = crate::FieldReader; +impl DstincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINC_A { + pub const fn variant(&self) -> Dstinc { match self.bits { - 0 => DSTINC_A::ONE, - 1 => DSTINC_A::TWO, - 2 => DSTINC_A::FOUR, - 3 => DSTINC_A::NONE, + 0 => Dstinc::One, + 1 => Dstinc::Two, + 2 => Dstinc::Four, + 3 => Dstinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == DSTINC_A::ONE + *self == Dstinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == DSTINC_A::TWO + *self == Dstinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == DSTINC_A::FOUR + *self == Dstinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == DSTINC_A::NONE + *self == Dstinc::None } } #[doc = "Field `DSTINC` writer - Destination Address Increment Size"] -pub type DSTINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH1_CTRL_SPEC, u8, DSTINC_A, 2, O>; -impl<'a, const O: u8> DSTINC_W<'a, O> { +pub type DstincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dstinc, crate::Safe>; +impl<'a, REG> DstincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(DSTINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Dstinc::One) } #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(DSTINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Dstinc::Two) } #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(DSTINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Dstinc::Four) } #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(DSTINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Dstinc::None) } } -#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] -pub type SRCMODE_R = crate::BitReader; #[doc = "Source Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCMODE_A { +pub enum Srcmode { #[doc = "0: The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCMODE_A) -> Self { + fn from(variant: Srcmode) -> Self { variant as u8 != 0 } } -impl SRCMODE_R { +#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] +pub type SrcmodeR = crate::BitReader; +impl SrcmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCMODE_A { + pub const fn variant(&self) -> Srcmode { match self.bits { - false => SRCMODE_A::ABSOLUTE, - true => SRCMODE_A::RELATIVE, + false => Srcmode::Absolute, + true => Srcmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == SRCMODE_A::ABSOLUTE + *self == Srcmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == SRCMODE_A::RELATIVE + *self == Srcmode::Relative } } -#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] -pub type DSTMODE_R = crate::BitReader; #[doc = "Destination Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTMODE_A { +pub enum Dstmode { #[doc = "0: The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTMODE_A) -> Self { + fn from(variant: Dstmode) -> Self { variant as u8 != 0 } } -impl DSTMODE_R { +#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] +pub type DstmodeR = crate::BitReader; +impl DstmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTMODE_A { + pub const fn variant(&self) -> Dstmode { match self.bits { - false => DSTMODE_A::ABSOLUTE, - true => DSTMODE_A::RELATIVE, + false => Dstmode::Absolute, + true => Dstmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == DSTMODE_A::ABSOLUTE + *self == Dstmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == DSTMODE_A::RELATIVE + *self == Dstmode::Relative } } impl R { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] - pub fn structtype(&self) -> STRUCTTYPE_R { - STRUCTTYPE_R::new((self.bits & 3) as u8) + pub fn structtype(&self) -> StructtypeR { + StructtypeR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Structure DMA Transfer Request"] #[inline(always)] - pub fn structreq(&self) -> STRUCTREQ_R { - STRUCTREQ_R::new(((self.bits >> 3) & 1) != 0) + pub fn structreq(&self) -> StructreqR { + StructreqR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] - pub fn xfercnt(&self) -> XFERCNT_R { - XFERCNT_R::new(((self.bits >> 4) & 0x07ff) as u16) + pub fn xfercnt(&self) -> XfercntR { + XfercntR::new(((self.bits >> 4) & 0x07ff) as u16) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] - pub fn byteswap(&self) -> BYTESWAP_R { - BYTESWAP_R::new(((self.bits >> 15) & 1) != 0) + pub fn byteswap(&self) -> ByteswapR { + ByteswapR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] - pub fn blocksize(&self) -> BLOCKSIZE_R { - BLOCKSIZE_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn blocksize(&self) -> BlocksizeR { + BlocksizeR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] - pub fn doneien(&self) -> DONEIEN_R { - DONEIEN_R::new(((self.bits >> 20) & 1) != 0) + pub fn doneien(&self) -> DoneienR { + DoneienR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] - pub fn reqmode(&self) -> REQMODE_R { - REQMODE_R::new(((self.bits >> 21) & 1) != 0) + pub fn reqmode(&self) -> ReqmodeR { + ReqmodeR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] - pub fn decloopcnt(&self) -> DECLOOPCNT_R { - DECLOOPCNT_R::new(((self.bits >> 22) & 1) != 0) + pub fn decloopcnt(&self) -> DecloopcntR { + DecloopcntR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] - pub fn ignoresreq(&self) -> IGNORESREQ_R { - IGNORESREQ_R::new(((self.bits >> 23) & 1) != 0) + pub fn ignoresreq(&self) -> IgnoresreqR { + IgnoresreqR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] - pub fn srcinc(&self) -> SRCINC_R { - SRCINC_R::new(((self.bits >> 24) & 3) as u8) + pub fn srcinc(&self) -> SrcincR { + SrcincR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] - pub fn size(&self) -> SIZE_R { - SIZE_R::new(((self.bits >> 26) & 3) as u8) + pub fn size(&self) -> SizeR { + SizeR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] - pub fn dstinc(&self) -> DSTINC_R { - DSTINC_R::new(((self.bits >> 28) & 3) as u8) + pub fn dstinc(&self) -> DstincR { + DstincR::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bit 30 - Source Addressing Mode"] #[inline(always)] - pub fn srcmode(&self) -> SRCMODE_R { - SRCMODE_R::new(((self.bits >> 30) & 1) != 0) + pub fn srcmode(&self) -> SrcmodeR { + SrcmodeR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Destination Addressing Mode"] #[inline(always)] - pub fn dstmode(&self) -> DSTMODE_R { - DSTMODE_R::new(((self.bits >> 31) & 1) != 0) + pub fn dstmode(&self) -> DstmodeR { + DstmodeR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] #[must_use] - pub fn structtype(&mut self) -> STRUCTTYPE_W<0> { - STRUCTTYPE_W::new(self) + pub fn structtype(&mut self) -> StructtypeW { + StructtypeW::new(self, 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] #[must_use] - pub fn xfercnt(&mut self) -> XFERCNT_W<4> { - XFERCNT_W::new(self) + pub fn xfercnt(&mut self) -> XfercntW { + XfercntW::new(self, 4) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] #[must_use] - pub fn byteswap(&mut self) -> BYTESWAP_W<15> { - BYTESWAP_W::new(self) + pub fn byteswap(&mut self) -> ByteswapW { + ByteswapW::new(self, 15) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] #[must_use] - pub fn blocksize(&mut self) -> BLOCKSIZE_W<16> { - BLOCKSIZE_W::new(self) + pub fn blocksize(&mut self) -> BlocksizeW { + BlocksizeW::new(self, 16) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] #[must_use] - pub fn doneien(&mut self) -> DONEIEN_W<20> { - DONEIEN_W::new(self) + pub fn doneien(&mut self) -> DoneienW { + DoneienW::new(self, 20) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] #[must_use] - pub fn reqmode(&mut self) -> REQMODE_W<21> { - REQMODE_W::new(self) + pub fn reqmode(&mut self) -> ReqmodeW { + ReqmodeW::new(self, 21) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] #[must_use] - pub fn decloopcnt(&mut self) -> DECLOOPCNT_W<22> { - DECLOOPCNT_W::new(self) + pub fn decloopcnt(&mut self) -> DecloopcntW { + DecloopcntW::new(self, 22) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] #[must_use] - pub fn ignoresreq(&mut self) -> IGNORESREQ_W<23> { - IGNORESREQ_W::new(self) + pub fn ignoresreq(&mut self) -> IgnoresreqW { + IgnoresreqW::new(self, 23) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] #[must_use] - pub fn srcinc(&mut self) -> SRCINC_W<24> { - SRCINC_W::new(self) + pub fn srcinc(&mut self) -> SrcincW { + SrcincW::new(self, 24) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SIZE_W<26> { - SIZE_W::new(self) + pub fn size(&mut self) -> SizeW { + SizeW::new(self, 26) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] #[must_use] - pub fn dstinc(&mut self) -> DSTINC_W<28> { - DSTINC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstinc(&mut self) -> DstincW { + DstincW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch1_ctrl](index.html) module"] -pub struct CH1_CTRL_SPEC; -impl crate::RegisterSpec for CH1_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch1CtrlSpec; +impl crate::RegisterSpec for Ch1CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch1_ctrl::R](R) reader structure"] -impl crate::Readable for CH1_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch1_ctrl::W](W) writer structure"] -impl crate::Writable for CH1_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch1_ctrl::R`](R) reader structure"] +impl crate::Readable for Ch1CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ch1_ctrl::W`](W) writer structure"] +impl crate::Writable for Ch1CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH1_CTRL to value 0"] -impl crate::Resettable for CH1_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch1CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch1_dst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch1_dst.rs index 23231f6..b11d3c6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch1_dst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch1_dst.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH1_DST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH1_DST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DSTADDR` reader - Destination Data Address"] -pub type DSTADDR_R = crate::FieldReader; +pub type DstaddrR = crate::FieldReader; #[doc = "Field `DSTADDR` writer - Destination Data Address"] -pub type DSTADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH1_DST_SPEC, u32, u32, 32, O>; +pub type DstaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] - pub fn dstaddr(&self) -> DSTADDR_R { - DSTADDR_R::new(self.bits) + pub fn dstaddr(&self) -> DstaddrR { + DstaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] #[must_use] - pub fn dstaddr(&mut self) -> DSTADDR_W<0> { - DSTADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstaddr(&mut self) -> DstaddrW { + DstaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch1_dst](index.html) module"] -pub struct CH1_DST_SPEC; -impl crate::RegisterSpec for CH1_DST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_dst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_dst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch1DstSpec; +impl crate::RegisterSpec for Ch1DstSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch1_dst::R](R) reader structure"] -impl crate::Readable for CH1_DST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch1_dst::W](W) writer structure"] -impl crate::Writable for CH1_DST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch1_dst::R`](R) reader structure"] +impl crate::Readable for Ch1DstSpec {} +#[doc = "`write(|w| ..)` method takes [`ch1_dst::W`](W) writer structure"] +impl crate::Writable for Ch1DstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH1_DST to value 0"] -impl crate::Resettable for CH1_DST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch1DstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch1_link.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch1_link.rs index 97e44d3..3fdc56e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch1_link.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch1_link.rs @@ -1,136 +1,96 @@ #[doc = "Register `CH1_LINK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH1_LINK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] -pub type LINKMODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Link Structure Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LINKMODE_A { +pub enum Linkmode { #[doc = "0: The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LINKMODE_A) -> Self { + fn from(variant: Linkmode) -> Self { variant as u8 != 0 } } -impl LINKMODE_R { +#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] +pub type LinkmodeR = crate::BitReader; +impl LinkmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LINKMODE_A { + pub const fn variant(&self) -> Linkmode { match self.bits { - false => LINKMODE_A::ABSOLUTE, - true => LINKMODE_A::RELATIVE, + false => Linkmode::Absolute, + true => Linkmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == LINKMODE_A::ABSOLUTE + *self == Linkmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == LINKMODE_A::RELATIVE + *self == Linkmode::Relative } } #[doc = "Field `LINK` reader - Link Next Structure"] -pub type LINK_R = crate::BitReader; +pub type LinkR = crate::BitReader; #[doc = "Field `LINK` writer - Link Next Structure"] -pub type LINK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH1_LINK_SPEC, bool, O>; +pub type LinkW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LINKADDR` reader - Link Structure Address"] -pub type LINKADDR_R = crate::FieldReader; +pub type LinkaddrR = crate::FieldReader; #[doc = "Field `LINKADDR` writer - Link Structure Address"] -pub type LINKADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH1_LINK_SPEC, u32, u32, 30, O>; +pub type LinkaddrW<'a, REG> = crate::FieldWriter<'a, REG, 30, u32>; impl R { #[doc = "Bit 0 - Link Structure Addressing Mode"] #[inline(always)] - pub fn linkmode(&self) -> LINKMODE_R { - LINKMODE_R::new((self.bits & 1) != 0) + pub fn linkmode(&self) -> LinkmodeR { + LinkmodeR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] - pub fn link(&self) -> LINK_R { - LINK_R::new(((self.bits >> 1) & 1) != 0) + pub fn link(&self) -> LinkR { + LinkR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] - pub fn linkaddr(&self) -> LINKADDR_R { - LINKADDR_R::new((self.bits >> 2) & 0x3fff_ffff) + pub fn linkaddr(&self) -> LinkaddrR { + LinkaddrR::new((self.bits >> 2) & 0x3fff_ffff) } } impl W { #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] #[must_use] - pub fn link(&mut self) -> LINK_W<1> { - LINK_W::new(self) + pub fn link(&mut self) -> LinkW { + LinkW::new(self, 1) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] #[must_use] - pub fn linkaddr(&mut self) -> LINKADDR_W<2> { - LINKADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn linkaddr(&mut self) -> LinkaddrW { + LinkaddrW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch1_link](index.html) module"] -pub struct CH1_LINK_SPEC; -impl crate::RegisterSpec for CH1_LINK_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_link::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_link::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch1LinkSpec; +impl crate::RegisterSpec for Ch1LinkSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch1_link::R](R) reader structure"] -impl crate::Readable for CH1_LINK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch1_link::W](W) writer structure"] -impl crate::Writable for CH1_LINK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch1_link::R`](R) reader structure"] +impl crate::Readable for Ch1LinkSpec {} +#[doc = "`write(|w| ..)` method takes [`ch1_link::W`](W) writer structure"] +impl crate::Writable for Ch1LinkSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH1_LINK to value 0"] -impl crate::Resettable for CH1_LINK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch1LinkSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch1_loop.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch1_loop.rs index a787160..cd07f05 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch1_loop.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch1_loop.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH1_LOOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH1_LOOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOOPCNT` reader - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_R = crate::FieldReader; +pub type LoopcntR = crate::FieldReader; #[doc = "Field `LOOPCNT` writer - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH1_LOOP_SPEC, u8, u8, 8, O>; +pub type LoopcntW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] - pub fn loopcnt(&self) -> LOOPCNT_R { - LOOPCNT_R::new((self.bits & 0xff) as u8) + pub fn loopcnt(&self) -> LoopcntR { + LoopcntR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] #[must_use] - pub fn loopcnt(&mut self) -> LOOPCNT_W<0> { - LOOPCNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn loopcnt(&mut self) -> LoopcntW { + LoopcntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch1_loop](index.html) module"] -pub struct CH1_LOOP_SPEC; -impl crate::RegisterSpec for CH1_LOOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_loop::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_loop::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch1LoopSpec; +impl crate::RegisterSpec for Ch1LoopSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch1_loop::R](R) reader structure"] -impl crate::Readable for CH1_LOOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch1_loop::W](W) writer structure"] -impl crate::Writable for CH1_LOOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch1_loop::R`](R) reader structure"] +impl crate::Readable for Ch1LoopSpec {} +#[doc = "`write(|w| ..)` method takes [`ch1_loop::W`](W) writer structure"] +impl crate::Writable for Ch1LoopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH1_LOOP to value 0"] -impl crate::Resettable for CH1_LOOP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch1LoopSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch1_src.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch1_src.rs index 3b46dee..4e04b5b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch1_src.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch1_src.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH1_SRC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH1_SRC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SRCADDR` reader - Source Data Address"] -pub type SRCADDR_R = crate::FieldReader; +pub type SrcaddrR = crate::FieldReader; #[doc = "Field `SRCADDR` writer - Source Data Address"] -pub type SRCADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH1_SRC_SPEC, u32, u32, 32, O>; +pub type SrcaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] - pub fn srcaddr(&self) -> SRCADDR_R { - SRCADDR_R::new(self.bits) + pub fn srcaddr(&self) -> SrcaddrR { + SrcaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] #[must_use] - pub fn srcaddr(&mut self) -> SRCADDR_W<0> { - SRCADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn srcaddr(&mut self) -> SrcaddrW { + SrcaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch1_src](index.html) module"] -pub struct CH1_SRC_SPEC; -impl crate::RegisterSpec for CH1_SRC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_src::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_src::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch1SrcSpec; +impl crate::RegisterSpec for Ch1SrcSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch1_src::R](R) reader structure"] -impl crate::Readable for CH1_SRC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch1_src::W](W) writer structure"] -impl crate::Writable for CH1_SRC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch1_src::R`](R) reader structure"] +impl crate::Readable for Ch1SrcSpec {} +#[doc = "`write(|w| ..)` method takes [`ch1_src::W`](W) writer structure"] +impl crate::Writable for Ch1SrcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH1_SRC to value 0"] -impl crate::Resettable for CH1_SRC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch1SrcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch2_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch2_cfg.rs index 1f41c2d..e23bdad 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch2_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch2_cfg.rs @@ -1,277 +1,250 @@ #[doc = "Register `CH2_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH2_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] -pub type ARBSLOTS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Arbitration Slot Number Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ARBSLOTS_A { +pub enum Arbslots { #[doc = "0: One arbitration slot selected"] - ONE = 0, + One = 0, #[doc = "1: Two arbitration slots selected"] - TWO = 1, + Two = 1, #[doc = "2: Four arbitration slots selected"] - FOUR = 2, + Four = 2, #[doc = "3: Eight arbitration slots selected"] - EIGHT = 3, + Eight = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ARBSLOTS_A) -> Self { + fn from(variant: Arbslots) -> Self { variant as _ } } -impl ARBSLOTS_R { +impl crate::FieldSpec for Arbslots { + type Ux = u8; +} +impl crate::IsEnum for Arbslots {} +#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] +pub type ArbslotsR = crate::FieldReader; +impl ArbslotsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ARBSLOTS_A { + pub const fn variant(&self) -> Arbslots { match self.bits { - 0 => ARBSLOTS_A::ONE, - 1 => ARBSLOTS_A::TWO, - 2 => ARBSLOTS_A::FOUR, - 3 => ARBSLOTS_A::EIGHT, + 0 => Arbslots::One, + 1 => Arbslots::Two, + 2 => Arbslots::Four, + 3 => Arbslots::Eight, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "One arbitration slot selected"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == ARBSLOTS_A::ONE + *self == Arbslots::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Two arbitration slots selected"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == ARBSLOTS_A::TWO + *self == Arbslots::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Four arbitration slots selected"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == ARBSLOTS_A::FOUR + *self == Arbslots::Four } - #[doc = "Checks if the value of the field is `EIGHT`"] + #[doc = "Eight arbitration slots selected"] #[inline(always)] pub fn is_eight(&self) -> bool { - *self == ARBSLOTS_A::EIGHT + *self == Arbslots::Eight } } #[doc = "Field `ARBSLOTS` writer - Arbitration Slot Number Select"] -pub type ARBSLOTS_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH2_CFG_SPEC, u8, ARBSLOTS_A, 2, O>; -impl<'a, const O: u8> ARBSLOTS_W<'a, O> { +pub type ArbslotsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Arbslots, crate::Safe>; +impl<'a, REG> ArbslotsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One arbitration slot selected"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(ARBSLOTS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Arbslots::One) } #[doc = "Two arbitration slots selected"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(ARBSLOTS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Arbslots::Two) } #[doc = "Four arbitration slots selected"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(ARBSLOTS_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Arbslots::Four) } #[doc = "Eight arbitration slots selected"] #[inline(always)] - pub fn eight(self) -> &'a mut W { - self.variant(ARBSLOTS_A::EIGHT) + pub fn eight(self) -> &'a mut crate::W { + self.variant(Arbslots::Eight) } } -#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] -pub type SRCINCSIGN_R = crate::BitReader; #[doc = "Source Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCINCSIGN_A { +pub enum Srcincsign { #[doc = "0: Increment source address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement source address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCINCSIGN_A) -> Self { + fn from(variant: Srcincsign) -> Self { variant as u8 != 0 } } -impl SRCINCSIGN_R { +#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] +pub type SrcincsignR = crate::BitReader; +impl SrcincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINCSIGN_A { + pub const fn variant(&self) -> Srcincsign { match self.bits { - false => SRCINCSIGN_A::POSITIVE, - true => SRCINCSIGN_A::NEGATIVE, + false => Srcincsign::Positive, + true => Srcincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment source address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == SRCINCSIGN_A::POSITIVE + *self == Srcincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement source address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == SRCINCSIGN_A::NEGATIVE + *self == Srcincsign::Negative } } #[doc = "Field `SRCINCSIGN` writer - Source Address Increment Sign"] -pub type SRCINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH2_CFG_SPEC, SRCINCSIGN_A, O>; -impl<'a, const O: u8> SRCINCSIGN_W<'a, O> { +pub type SrcincsignW<'a, REG> = crate::BitWriter<'a, REG, Srcincsign>; +impl<'a, REG> SrcincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment source address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Srcincsign::Positive) } #[doc = "Decrement source address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Srcincsign::Negative) } } -#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] -pub type DSTINCSIGN_R = crate::BitReader; #[doc = "Destination Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTINCSIGN_A { +pub enum Dstincsign { #[doc = "0: Increment destination address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement destination address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTINCSIGN_A) -> Self { + fn from(variant: Dstincsign) -> Self { variant as u8 != 0 } } -impl DSTINCSIGN_R { +#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] +pub type DstincsignR = crate::BitReader; +impl DstincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINCSIGN_A { + pub const fn variant(&self) -> Dstincsign { match self.bits { - false => DSTINCSIGN_A::POSITIVE, - true => DSTINCSIGN_A::NEGATIVE, + false => Dstincsign::Positive, + true => Dstincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment destination address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == DSTINCSIGN_A::POSITIVE + *self == Dstincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement destination address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == DSTINCSIGN_A::NEGATIVE + *self == Dstincsign::Negative } } #[doc = "Field `DSTINCSIGN` writer - Destination Address Increment Sign"] -pub type DSTINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH2_CFG_SPEC, DSTINCSIGN_A, O>; -impl<'a, const O: u8> DSTINCSIGN_W<'a, O> { +pub type DstincsignW<'a, REG> = crate::BitWriter<'a, REG, Dstincsign>; +impl<'a, REG> DstincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment destination address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Dstincsign::Positive) } #[doc = "Decrement destination address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Dstincsign::Negative) } } impl R { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] - pub fn arbslots(&self) -> ARBSLOTS_R { - ARBSLOTS_R::new(((self.bits >> 16) & 3) as u8) + pub fn arbslots(&self) -> ArbslotsR { + ArbslotsR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] - pub fn srcincsign(&self) -> SRCINCSIGN_R { - SRCINCSIGN_R::new(((self.bits >> 20) & 1) != 0) + pub fn srcincsign(&self) -> SrcincsignR { + SrcincsignR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] - pub fn dstincsign(&self) -> DSTINCSIGN_R { - DSTINCSIGN_R::new(((self.bits >> 21) & 1) != 0) + pub fn dstincsign(&self) -> DstincsignR { + DstincsignR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] #[must_use] - pub fn arbslots(&mut self) -> ARBSLOTS_W<16> { - ARBSLOTS_W::new(self) + pub fn arbslots(&mut self) -> ArbslotsW { + ArbslotsW::new(self, 16) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] #[must_use] - pub fn srcincsign(&mut self) -> SRCINCSIGN_W<20> { - SRCINCSIGN_W::new(self) + pub fn srcincsign(&mut self) -> SrcincsignW { + SrcincsignW::new(self, 20) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] #[must_use] - pub fn dstincsign(&mut self) -> DSTINCSIGN_W<21> { - DSTINCSIGN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstincsign(&mut self) -> DstincsignW { + DstincsignW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch2_cfg](index.html) module"] -pub struct CH2_CFG_SPEC; -impl crate::RegisterSpec for CH2_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch2CfgSpec; +impl crate::RegisterSpec for Ch2CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch2_cfg::R](R) reader structure"] -impl crate::Readable for CH2_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch2_cfg::W](W) writer structure"] -impl crate::Writable for CH2_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch2_cfg::R`](R) reader structure"] +impl crate::Readable for Ch2CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`ch2_cfg::W`](W) writer structure"] +impl crate::Writable for Ch2CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH2_CFG to value 0"] -impl crate::Resettable for CH2_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch2CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch2_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch2_ctrl.rs index 1e108dc..2b879f8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch2_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch2_ctrl.rs @@ -1,843 +1,842 @@ #[doc = "Register `CH2_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH2_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] -pub type STRUCTTYPE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DMA Structure Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STRUCTTYPE_A { +pub enum Structtype { #[doc = "0: DMA transfer structure type selected."] - TRANSFER = 0, + Transfer = 0, #[doc = "1: Synchronization structure type selected."] - SYNCHRONIZE = 1, + Synchronize = 1, #[doc = "2: Write immediate value structure type selected."] - WRITE = 2, + Write = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STRUCTTYPE_A) -> Self { + fn from(variant: Structtype) -> Self { variant as _ } } -impl STRUCTTYPE_R { +impl crate::FieldSpec for Structtype { + type Ux = u8; +} +impl crate::IsEnum for Structtype {} +#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] +pub type StructtypeR = crate::FieldReader; +impl StructtypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(STRUCTTYPE_A::TRANSFER), - 1 => Some(STRUCTTYPE_A::SYNCHRONIZE), - 2 => Some(STRUCTTYPE_A::WRITE), + 0 => Some(Structtype::Transfer), + 1 => Some(Structtype::Synchronize), + 2 => Some(Structtype::Write), _ => None, } } - #[doc = "Checks if the value of the field is `TRANSFER`"] + #[doc = "DMA transfer structure type selected."] #[inline(always)] pub fn is_transfer(&self) -> bool { - *self == STRUCTTYPE_A::TRANSFER + *self == Structtype::Transfer } - #[doc = "Checks if the value of the field is `SYNCHRONIZE`"] + #[doc = "Synchronization structure type selected."] #[inline(always)] pub fn is_synchronize(&self) -> bool { - *self == STRUCTTYPE_A::SYNCHRONIZE + *self == Structtype::Synchronize } - #[doc = "Checks if the value of the field is `WRITE`"] + #[doc = "Write immediate value structure type selected."] #[inline(always)] pub fn is_write(&self) -> bool { - *self == STRUCTTYPE_A::WRITE + *self == Structtype::Write } } #[doc = "Field `STRUCTTYPE` writer - DMA Structure Type"] -pub type STRUCTTYPE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH2_CTRL_SPEC, u8, STRUCTTYPE_A, 2, O>; -impl<'a, const O: u8> STRUCTTYPE_W<'a, O> { +pub type StructtypeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Structtype>; +impl<'a, REG> StructtypeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "DMA transfer structure type selected."] #[inline(always)] - pub fn transfer(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::TRANSFER) + pub fn transfer(self) -> &'a mut crate::W { + self.variant(Structtype::Transfer) } #[doc = "Synchronization structure type selected."] #[inline(always)] - pub fn synchronize(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::SYNCHRONIZE) + pub fn synchronize(self) -> &'a mut crate::W { + self.variant(Structtype::Synchronize) } #[doc = "Write immediate value structure type selected."] #[inline(always)] - pub fn write(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::WRITE) + pub fn write(self) -> &'a mut crate::W { + self.variant(Structtype::Write) } } #[doc = "Field `STRUCTREQ` reader - Structure DMA Transfer Request"] -pub type STRUCTREQ_R = crate::BitReader; +pub type StructreqR = crate::BitReader; #[doc = "Field `XFERCNT` reader - DMA Unit Data Transfer Count"] -pub type XFERCNT_R = crate::FieldReader; +pub type XfercntR = crate::FieldReader; #[doc = "Field `XFERCNT` writer - DMA Unit Data Transfer Count"] -pub type XFERCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH2_CTRL_SPEC, u16, u16, 11, O>; +pub type XfercntW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `BYTESWAP` reader - Endian Byte Swap"] -pub type BYTESWAP_R = crate::BitReader; +pub type ByteswapR = crate::BitReader; #[doc = "Field `BYTESWAP` writer - Endian Byte Swap"] -pub type BYTESWAP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH2_CTRL_SPEC, bool, O>; -#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] -pub type BLOCKSIZE_R = crate::FieldReader; +pub type ByteswapW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Block Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BLOCKSIZE_A { +pub enum Blocksize { #[doc = "0: One unit transfer per arbitration"] - UNIT1 = 0, + Unit1 = 0, #[doc = "1: Two unit transfers per arbitration"] - UNIT2 = 1, + Unit2 = 1, #[doc = "2: Three unit transfers per arbitration"] - UNIT3 = 2, + Unit3 = 2, #[doc = "3: Four unit transfers per arbitration"] - UNIT4 = 3, + Unit4 = 3, #[doc = "4: Six unit transfers per arbitration"] - UNIT6 = 4, + Unit6 = 4, #[doc = "5: Eight unit transfers per arbitration"] - UNIT8 = 5, + Unit8 = 5, #[doc = "7: Sixteen unit transfers per arbitration"] - UNIT16 = 7, + Unit16 = 7, #[doc = "9: 32 unit transfers per arbitration"] - UNIT32 = 9, + Unit32 = 9, #[doc = "10: 64 unit transfers per arbitration"] - UNIT64 = 10, + Unit64 = 10, #[doc = "11: 128 unit transfers per arbitration"] - UNIT128 = 11, + Unit128 = 11, #[doc = "12: 256 unit transfers per arbitration"] - UNIT256 = 12, + Unit256 = 12, #[doc = "13: 512 unit transfers per arbitration"] - UNIT512 = 13, + Unit512 = 13, #[doc = "14: 1024 unit transfers per arbitration"] - UNIT1024 = 14, + Unit1024 = 14, #[doc = "15: Transfer all units as specified by the XFRCNT field"] - ALL = 15, + All = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BLOCKSIZE_A) -> Self { + fn from(variant: Blocksize) -> Self { variant as _ } } -impl BLOCKSIZE_R { +impl crate::FieldSpec for Blocksize { + type Ux = u8; +} +impl crate::IsEnum for Blocksize {} +#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] +pub type BlocksizeR = crate::FieldReader; +impl BlocksizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BLOCKSIZE_A::UNIT1), - 1 => Some(BLOCKSIZE_A::UNIT2), - 2 => Some(BLOCKSIZE_A::UNIT3), - 3 => Some(BLOCKSIZE_A::UNIT4), - 4 => Some(BLOCKSIZE_A::UNIT6), - 5 => Some(BLOCKSIZE_A::UNIT8), - 7 => Some(BLOCKSIZE_A::UNIT16), - 9 => Some(BLOCKSIZE_A::UNIT32), - 10 => Some(BLOCKSIZE_A::UNIT64), - 11 => Some(BLOCKSIZE_A::UNIT128), - 12 => Some(BLOCKSIZE_A::UNIT256), - 13 => Some(BLOCKSIZE_A::UNIT512), - 14 => Some(BLOCKSIZE_A::UNIT1024), - 15 => Some(BLOCKSIZE_A::ALL), + 0 => Some(Blocksize::Unit1), + 1 => Some(Blocksize::Unit2), + 2 => Some(Blocksize::Unit3), + 3 => Some(Blocksize::Unit4), + 4 => Some(Blocksize::Unit6), + 5 => Some(Blocksize::Unit8), + 7 => Some(Blocksize::Unit16), + 9 => Some(Blocksize::Unit32), + 10 => Some(Blocksize::Unit64), + 11 => Some(Blocksize::Unit128), + 12 => Some(Blocksize::Unit256), + 13 => Some(Blocksize::Unit512), + 14 => Some(Blocksize::Unit1024), + 15 => Some(Blocksize::All), _ => None, } } - #[doc = "Checks if the value of the field is `UNIT1`"] + #[doc = "One unit transfer per arbitration"] #[inline(always)] pub fn is_unit1(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1 + *self == Blocksize::Unit1 } - #[doc = "Checks if the value of the field is `UNIT2`"] + #[doc = "Two unit transfers per arbitration"] #[inline(always)] pub fn is_unit2(&self) -> bool { - *self == BLOCKSIZE_A::UNIT2 + *self == Blocksize::Unit2 } - #[doc = "Checks if the value of the field is `UNIT3`"] + #[doc = "Three unit transfers per arbitration"] #[inline(always)] pub fn is_unit3(&self) -> bool { - *self == BLOCKSIZE_A::UNIT3 + *self == Blocksize::Unit3 } - #[doc = "Checks if the value of the field is `UNIT4`"] + #[doc = "Four unit transfers per arbitration"] #[inline(always)] pub fn is_unit4(&self) -> bool { - *self == BLOCKSIZE_A::UNIT4 + *self == Blocksize::Unit4 } - #[doc = "Checks if the value of the field is `UNIT6`"] + #[doc = "Six unit transfers per arbitration"] #[inline(always)] pub fn is_unit6(&self) -> bool { - *self == BLOCKSIZE_A::UNIT6 + *self == Blocksize::Unit6 } - #[doc = "Checks if the value of the field is `UNIT8`"] + #[doc = "Eight unit transfers per arbitration"] #[inline(always)] pub fn is_unit8(&self) -> bool { - *self == BLOCKSIZE_A::UNIT8 + *self == Blocksize::Unit8 } - #[doc = "Checks if the value of the field is `UNIT16`"] + #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] pub fn is_unit16(&self) -> bool { - *self == BLOCKSIZE_A::UNIT16 + *self == Blocksize::Unit16 } - #[doc = "Checks if the value of the field is `UNIT32`"] + #[doc = "32 unit transfers per arbitration"] #[inline(always)] pub fn is_unit32(&self) -> bool { - *self == BLOCKSIZE_A::UNIT32 + *self == Blocksize::Unit32 } - #[doc = "Checks if the value of the field is `UNIT64`"] + #[doc = "64 unit transfers per arbitration"] #[inline(always)] pub fn is_unit64(&self) -> bool { - *self == BLOCKSIZE_A::UNIT64 + *self == Blocksize::Unit64 } - #[doc = "Checks if the value of the field is `UNIT128`"] + #[doc = "128 unit transfers per arbitration"] #[inline(always)] pub fn is_unit128(&self) -> bool { - *self == BLOCKSIZE_A::UNIT128 + *self == Blocksize::Unit128 } - #[doc = "Checks if the value of the field is `UNIT256`"] + #[doc = "256 unit transfers per arbitration"] #[inline(always)] pub fn is_unit256(&self) -> bool { - *self == BLOCKSIZE_A::UNIT256 + *self == Blocksize::Unit256 } - #[doc = "Checks if the value of the field is `UNIT512`"] + #[doc = "512 unit transfers per arbitration"] #[inline(always)] pub fn is_unit512(&self) -> bool { - *self == BLOCKSIZE_A::UNIT512 + *self == Blocksize::Unit512 } - #[doc = "Checks if the value of the field is `UNIT1024`"] + #[doc = "1024 unit transfers per arbitration"] #[inline(always)] pub fn is_unit1024(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1024 + *self == Blocksize::Unit1024 } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] pub fn is_all(&self) -> bool { - *self == BLOCKSIZE_A::ALL + *self == Blocksize::All } } #[doc = "Field `BLOCKSIZE` writer - Block Transfer Size"] -pub type BLOCKSIZE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH2_CTRL_SPEC, u8, BLOCKSIZE_A, 4, O>; -impl<'a, const O: u8> BLOCKSIZE_W<'a, O> { +pub type BlocksizeW<'a, REG> = crate::FieldWriter<'a, REG, 4, Blocksize>; +impl<'a, REG> BlocksizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One unit transfer per arbitration"] #[inline(always)] - pub fn unit1(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1) + pub fn unit1(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1) } #[doc = "Two unit transfers per arbitration"] #[inline(always)] - pub fn unit2(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT2) + pub fn unit2(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit2) } #[doc = "Three unit transfers per arbitration"] #[inline(always)] - pub fn unit3(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT3) + pub fn unit3(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit3) } #[doc = "Four unit transfers per arbitration"] #[inline(always)] - pub fn unit4(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT4) + pub fn unit4(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit4) } #[doc = "Six unit transfers per arbitration"] #[inline(always)] - pub fn unit6(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT6) + pub fn unit6(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit6) } #[doc = "Eight unit transfers per arbitration"] #[inline(always)] - pub fn unit8(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT8) + pub fn unit8(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit8) } #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] - pub fn unit16(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT16) + pub fn unit16(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit16) } #[doc = "32 unit transfers per arbitration"] #[inline(always)] - pub fn unit32(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT32) + pub fn unit32(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit32) } #[doc = "64 unit transfers per arbitration"] #[inline(always)] - pub fn unit64(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT64) + pub fn unit64(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit64) } #[doc = "128 unit transfers per arbitration"] #[inline(always)] - pub fn unit128(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT128) + pub fn unit128(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit128) } #[doc = "256 unit transfers per arbitration"] #[inline(always)] - pub fn unit256(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT256) + pub fn unit256(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit256) } #[doc = "512 unit transfers per arbitration"] #[inline(always)] - pub fn unit512(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT512) + pub fn unit512(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit512) } #[doc = "1024 unit transfers per arbitration"] #[inline(always)] - pub fn unit1024(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1024) + pub fn unit1024(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1024) } #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Blocksize::All) } } #[doc = "Field `DONEIEN` reader - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_R = crate::BitReader; +pub type DoneienR = crate::BitReader; #[doc = "Field `DONEIEN` writer - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH2_CTRL_SPEC, bool, O>; -#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] -pub type REQMODE_R = crate::BitReader; +pub type DoneienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "DMA Request Transfer Mode Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REQMODE_A { +pub enum Reqmode { #[doc = "0: The LDMA transfers one BLOCKSIZE per transfer request."] - BLOCK = 0, + Block = 0, #[doc = "1: One transfer request transfers all units as defined by the XFRCNT field."] - ALL = 1, + All = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REQMODE_A) -> Self { + fn from(variant: Reqmode) -> Self { variant as u8 != 0 } } -impl REQMODE_R { +#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] +pub type ReqmodeR = crate::BitReader; +impl ReqmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REQMODE_A { + pub const fn variant(&self) -> Reqmode { match self.bits { - false => REQMODE_A::BLOCK, - true => REQMODE_A::ALL, + false => Reqmode::Block, + true => Reqmode::All, } } - #[doc = "Checks if the value of the field is `BLOCK`"] + #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] pub fn is_block(&self) -> bool { - *self == REQMODE_A::BLOCK + *self == Reqmode::Block } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] pub fn is_all(&self) -> bool { - *self == REQMODE_A::ALL + *self == Reqmode::All } } #[doc = "Field `REQMODE` writer - DMA Request Transfer Mode Select"] -pub type REQMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH2_CTRL_SPEC, REQMODE_A, O>; -impl<'a, const O: u8> REQMODE_W<'a, O> { +pub type ReqmodeW<'a, REG> = crate::BitWriter<'a, REG, Reqmode>; +impl<'a, REG> ReqmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] - pub fn block(self) -> &'a mut W { - self.variant(REQMODE_A::BLOCK) + pub fn block(self) -> &'a mut crate::W { + self.variant(Reqmode::Block) } #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(REQMODE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Reqmode::All) } } #[doc = "Field `DECLOOPCNT` reader - Decrement Loop Count"] -pub type DECLOOPCNT_R = crate::BitReader; +pub type DecloopcntR = crate::BitReader; #[doc = "Field `DECLOOPCNT` writer - Decrement Loop Count"] -pub type DECLOOPCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH2_CTRL_SPEC, bool, O>; +pub type DecloopcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IGNORESREQ` reader - Ignore Sreq"] -pub type IGNORESREQ_R = crate::BitReader; +pub type IgnoresreqR = crate::BitReader; #[doc = "Field `IGNORESREQ` writer - Ignore Sreq"] -pub type IGNORESREQ_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH2_CTRL_SPEC, bool, O>; -#[doc = "Field `SRCINC` reader - Source Address Increment Size"] -pub type SRCINC_R = crate::FieldReader; +pub type IgnoresreqW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SRCINC_A { +pub enum Srcinc { #[doc = "0: Increment source address by one unit data size after each read"] - ONE = 0, + One = 0, #[doc = "1: Increment source address by two unit data sizes after each read"] - TWO = 1, + Two = 1, #[doc = "2: Increment source address by four unit data sizes after each read"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SRCINC_A) -> Self { + fn from(variant: Srcinc) -> Self { variant as _ } } -impl SRCINC_R { +impl crate::FieldSpec for Srcinc { + type Ux = u8; +} +impl crate::IsEnum for Srcinc {} +#[doc = "Field `SRCINC` reader - Source Address Increment Size"] +pub type SrcincR = crate::FieldReader; +impl SrcincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINC_A { + pub const fn variant(&self) -> Srcinc { match self.bits { - 0 => SRCINC_A::ONE, - 1 => SRCINC_A::TWO, - 2 => SRCINC_A::FOUR, - 3 => SRCINC_A::NONE, + 0 => Srcinc::One, + 1 => Srcinc::Two, + 2 => Srcinc::Four, + 3 => Srcinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == SRCINC_A::ONE + *self == Srcinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == SRCINC_A::TWO + *self == Srcinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == SRCINC_A::FOUR + *self == Srcinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SRCINC_A::NONE + *self == Srcinc::None } } #[doc = "Field `SRCINC` writer - Source Address Increment Size"] -pub type SRCINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH2_CTRL_SPEC, u8, SRCINC_A, 2, O>; -impl<'a, const O: u8> SRCINC_W<'a, O> { +pub type SrcincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Srcinc, crate::Safe>; +impl<'a, REG> SrcincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(SRCINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Srcinc::One) } #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(SRCINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Srcinc::Two) } #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(SRCINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Srcinc::Four) } #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SRCINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Srcinc::None) } } -#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] -pub type SIZE_R = crate::FieldReader; #[doc = "Unit Data Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIZE_A { +pub enum Size { #[doc = "0: Each unit transfer is a byte"] - BYTE = 0, + Byte = 0, #[doc = "1: Each unit transfer is a half-word"] - HALFWORD = 1, + Halfword = 1, #[doc = "2: Each unit transfer is a word"] - WORD = 2, + Word = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIZE_A) -> Self { + fn from(variant: Size) -> Self { variant as _ } } -impl SIZE_R { +impl crate::FieldSpec for Size { + type Ux = u8; +} +impl crate::IsEnum for Size {} +#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] +pub type SizeR = crate::FieldReader; +impl SizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIZE_A::BYTE), - 1 => Some(SIZE_A::HALFWORD), - 2 => Some(SIZE_A::WORD), + 0 => Some(Size::Byte), + 1 => Some(Size::Halfword), + 2 => Some(Size::Word), _ => None, } } - #[doc = "Checks if the value of the field is `BYTE`"] + #[doc = "Each unit transfer is a byte"] #[inline(always)] pub fn is_byte(&self) -> bool { - *self == SIZE_A::BYTE + *self == Size::Byte } - #[doc = "Checks if the value of the field is `HALFWORD`"] + #[doc = "Each unit transfer is a half-word"] #[inline(always)] pub fn is_halfword(&self) -> bool { - *self == SIZE_A::HALFWORD + *self == Size::Halfword } - #[doc = "Checks if the value of the field is `WORD`"] + #[doc = "Each unit transfer is a word"] #[inline(always)] pub fn is_word(&self) -> bool { - *self == SIZE_A::WORD + *self == Size::Word } } #[doc = "Field `SIZE` writer - Unit Data Transfer Size"] -pub type SIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH2_CTRL_SPEC, u8, SIZE_A, 2, O>; -impl<'a, const O: u8> SIZE_W<'a, O> { +pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Size>; +impl<'a, REG> SizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Each unit transfer is a byte"] #[inline(always)] - pub fn byte(self) -> &'a mut W { - self.variant(SIZE_A::BYTE) + pub fn byte(self) -> &'a mut crate::W { + self.variant(Size::Byte) } #[doc = "Each unit transfer is a half-word"] #[inline(always)] - pub fn halfword(self) -> &'a mut W { - self.variant(SIZE_A::HALFWORD) + pub fn halfword(self) -> &'a mut crate::W { + self.variant(Size::Halfword) } #[doc = "Each unit transfer is a word"] #[inline(always)] - pub fn word(self) -> &'a mut W { - self.variant(SIZE_A::WORD) + pub fn word(self) -> &'a mut crate::W { + self.variant(Size::Word) } } -#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] -pub type DSTINC_R = crate::FieldReader; #[doc = "Destination Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DSTINC_A { +pub enum Dstinc { #[doc = "0: Increment destination address by one unit data size after each write"] - ONE = 0, + One = 0, #[doc = "1: Increment destination address by two unit data sizes after each write"] - TWO = 1, + Two = 1, #[doc = "2: Increment destination address by four unit data sizes after each write"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DSTINC_A) -> Self { + fn from(variant: Dstinc) -> Self { variant as _ } } -impl DSTINC_R { +impl crate::FieldSpec for Dstinc { + type Ux = u8; +} +impl crate::IsEnum for Dstinc {} +#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] +pub type DstincR = crate::FieldReader; +impl DstincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINC_A { + pub const fn variant(&self) -> Dstinc { match self.bits { - 0 => DSTINC_A::ONE, - 1 => DSTINC_A::TWO, - 2 => DSTINC_A::FOUR, - 3 => DSTINC_A::NONE, + 0 => Dstinc::One, + 1 => Dstinc::Two, + 2 => Dstinc::Four, + 3 => Dstinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == DSTINC_A::ONE + *self == Dstinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == DSTINC_A::TWO + *self == Dstinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == DSTINC_A::FOUR + *self == Dstinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == DSTINC_A::NONE + *self == Dstinc::None } } #[doc = "Field `DSTINC` writer - Destination Address Increment Size"] -pub type DSTINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH2_CTRL_SPEC, u8, DSTINC_A, 2, O>; -impl<'a, const O: u8> DSTINC_W<'a, O> { +pub type DstincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dstinc, crate::Safe>; +impl<'a, REG> DstincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(DSTINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Dstinc::One) } #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(DSTINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Dstinc::Two) } #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(DSTINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Dstinc::Four) } #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(DSTINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Dstinc::None) } } -#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] -pub type SRCMODE_R = crate::BitReader; #[doc = "Source Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCMODE_A { +pub enum Srcmode { #[doc = "0: The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCMODE_A) -> Self { + fn from(variant: Srcmode) -> Self { variant as u8 != 0 } } -impl SRCMODE_R { +#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] +pub type SrcmodeR = crate::BitReader; +impl SrcmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCMODE_A { + pub const fn variant(&self) -> Srcmode { match self.bits { - false => SRCMODE_A::ABSOLUTE, - true => SRCMODE_A::RELATIVE, + false => Srcmode::Absolute, + true => Srcmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == SRCMODE_A::ABSOLUTE + *self == Srcmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == SRCMODE_A::RELATIVE + *self == Srcmode::Relative } } -#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] -pub type DSTMODE_R = crate::BitReader; #[doc = "Destination Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTMODE_A { +pub enum Dstmode { #[doc = "0: The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTMODE_A) -> Self { + fn from(variant: Dstmode) -> Self { variant as u8 != 0 } } -impl DSTMODE_R { +#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] +pub type DstmodeR = crate::BitReader; +impl DstmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTMODE_A { + pub const fn variant(&self) -> Dstmode { match self.bits { - false => DSTMODE_A::ABSOLUTE, - true => DSTMODE_A::RELATIVE, + false => Dstmode::Absolute, + true => Dstmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == DSTMODE_A::ABSOLUTE + *self == Dstmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == DSTMODE_A::RELATIVE + *self == Dstmode::Relative } } impl R { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] - pub fn structtype(&self) -> STRUCTTYPE_R { - STRUCTTYPE_R::new((self.bits & 3) as u8) + pub fn structtype(&self) -> StructtypeR { + StructtypeR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Structure DMA Transfer Request"] #[inline(always)] - pub fn structreq(&self) -> STRUCTREQ_R { - STRUCTREQ_R::new(((self.bits >> 3) & 1) != 0) + pub fn structreq(&self) -> StructreqR { + StructreqR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] - pub fn xfercnt(&self) -> XFERCNT_R { - XFERCNT_R::new(((self.bits >> 4) & 0x07ff) as u16) + pub fn xfercnt(&self) -> XfercntR { + XfercntR::new(((self.bits >> 4) & 0x07ff) as u16) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] - pub fn byteswap(&self) -> BYTESWAP_R { - BYTESWAP_R::new(((self.bits >> 15) & 1) != 0) + pub fn byteswap(&self) -> ByteswapR { + ByteswapR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] - pub fn blocksize(&self) -> BLOCKSIZE_R { - BLOCKSIZE_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn blocksize(&self) -> BlocksizeR { + BlocksizeR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] - pub fn doneien(&self) -> DONEIEN_R { - DONEIEN_R::new(((self.bits >> 20) & 1) != 0) + pub fn doneien(&self) -> DoneienR { + DoneienR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] - pub fn reqmode(&self) -> REQMODE_R { - REQMODE_R::new(((self.bits >> 21) & 1) != 0) + pub fn reqmode(&self) -> ReqmodeR { + ReqmodeR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] - pub fn decloopcnt(&self) -> DECLOOPCNT_R { - DECLOOPCNT_R::new(((self.bits >> 22) & 1) != 0) + pub fn decloopcnt(&self) -> DecloopcntR { + DecloopcntR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] - pub fn ignoresreq(&self) -> IGNORESREQ_R { - IGNORESREQ_R::new(((self.bits >> 23) & 1) != 0) + pub fn ignoresreq(&self) -> IgnoresreqR { + IgnoresreqR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] - pub fn srcinc(&self) -> SRCINC_R { - SRCINC_R::new(((self.bits >> 24) & 3) as u8) + pub fn srcinc(&self) -> SrcincR { + SrcincR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] - pub fn size(&self) -> SIZE_R { - SIZE_R::new(((self.bits >> 26) & 3) as u8) + pub fn size(&self) -> SizeR { + SizeR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] - pub fn dstinc(&self) -> DSTINC_R { - DSTINC_R::new(((self.bits >> 28) & 3) as u8) + pub fn dstinc(&self) -> DstincR { + DstincR::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bit 30 - Source Addressing Mode"] #[inline(always)] - pub fn srcmode(&self) -> SRCMODE_R { - SRCMODE_R::new(((self.bits >> 30) & 1) != 0) + pub fn srcmode(&self) -> SrcmodeR { + SrcmodeR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Destination Addressing Mode"] #[inline(always)] - pub fn dstmode(&self) -> DSTMODE_R { - DSTMODE_R::new(((self.bits >> 31) & 1) != 0) + pub fn dstmode(&self) -> DstmodeR { + DstmodeR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] #[must_use] - pub fn structtype(&mut self) -> STRUCTTYPE_W<0> { - STRUCTTYPE_W::new(self) + pub fn structtype(&mut self) -> StructtypeW { + StructtypeW::new(self, 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] #[must_use] - pub fn xfercnt(&mut self) -> XFERCNT_W<4> { - XFERCNT_W::new(self) + pub fn xfercnt(&mut self) -> XfercntW { + XfercntW::new(self, 4) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] #[must_use] - pub fn byteswap(&mut self) -> BYTESWAP_W<15> { - BYTESWAP_W::new(self) + pub fn byteswap(&mut self) -> ByteswapW { + ByteswapW::new(self, 15) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] #[must_use] - pub fn blocksize(&mut self) -> BLOCKSIZE_W<16> { - BLOCKSIZE_W::new(self) + pub fn blocksize(&mut self) -> BlocksizeW { + BlocksizeW::new(self, 16) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] #[must_use] - pub fn doneien(&mut self) -> DONEIEN_W<20> { - DONEIEN_W::new(self) + pub fn doneien(&mut self) -> DoneienW { + DoneienW::new(self, 20) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] #[must_use] - pub fn reqmode(&mut self) -> REQMODE_W<21> { - REQMODE_W::new(self) + pub fn reqmode(&mut self) -> ReqmodeW { + ReqmodeW::new(self, 21) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] #[must_use] - pub fn decloopcnt(&mut self) -> DECLOOPCNT_W<22> { - DECLOOPCNT_W::new(self) + pub fn decloopcnt(&mut self) -> DecloopcntW { + DecloopcntW::new(self, 22) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] #[must_use] - pub fn ignoresreq(&mut self) -> IGNORESREQ_W<23> { - IGNORESREQ_W::new(self) + pub fn ignoresreq(&mut self) -> IgnoresreqW { + IgnoresreqW::new(self, 23) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] #[must_use] - pub fn srcinc(&mut self) -> SRCINC_W<24> { - SRCINC_W::new(self) + pub fn srcinc(&mut self) -> SrcincW { + SrcincW::new(self, 24) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SIZE_W<26> { - SIZE_W::new(self) + pub fn size(&mut self) -> SizeW { + SizeW::new(self, 26) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] #[must_use] - pub fn dstinc(&mut self) -> DSTINC_W<28> { - DSTINC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstinc(&mut self) -> DstincW { + DstincW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch2_ctrl](index.html) module"] -pub struct CH2_CTRL_SPEC; -impl crate::RegisterSpec for CH2_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch2CtrlSpec; +impl crate::RegisterSpec for Ch2CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch2_ctrl::R](R) reader structure"] -impl crate::Readable for CH2_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch2_ctrl::W](W) writer structure"] -impl crate::Writable for CH2_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch2_ctrl::R`](R) reader structure"] +impl crate::Readable for Ch2CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ch2_ctrl::W`](W) writer structure"] +impl crate::Writable for Ch2CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH2_CTRL to value 0"] -impl crate::Resettable for CH2_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch2CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch2_dst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch2_dst.rs index fd571d1..1a134f2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch2_dst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch2_dst.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH2_DST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH2_DST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DSTADDR` reader - Destination Data Address"] -pub type DSTADDR_R = crate::FieldReader; +pub type DstaddrR = crate::FieldReader; #[doc = "Field `DSTADDR` writer - Destination Data Address"] -pub type DSTADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH2_DST_SPEC, u32, u32, 32, O>; +pub type DstaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] - pub fn dstaddr(&self) -> DSTADDR_R { - DSTADDR_R::new(self.bits) + pub fn dstaddr(&self) -> DstaddrR { + DstaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] #[must_use] - pub fn dstaddr(&mut self) -> DSTADDR_W<0> { - DSTADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstaddr(&mut self) -> DstaddrW { + DstaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch2_dst](index.html) module"] -pub struct CH2_DST_SPEC; -impl crate::RegisterSpec for CH2_DST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_dst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_dst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch2DstSpec; +impl crate::RegisterSpec for Ch2DstSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch2_dst::R](R) reader structure"] -impl crate::Readable for CH2_DST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch2_dst::W](W) writer structure"] -impl crate::Writable for CH2_DST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch2_dst::R`](R) reader structure"] +impl crate::Readable for Ch2DstSpec {} +#[doc = "`write(|w| ..)` method takes [`ch2_dst::W`](W) writer structure"] +impl crate::Writable for Ch2DstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH2_DST to value 0"] -impl crate::Resettable for CH2_DST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch2DstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch2_link.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch2_link.rs index ed7b3e8..746b2ae 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch2_link.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch2_link.rs @@ -1,136 +1,96 @@ #[doc = "Register `CH2_LINK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH2_LINK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] -pub type LINKMODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Link Structure Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LINKMODE_A { +pub enum Linkmode { #[doc = "0: The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LINKMODE_A) -> Self { + fn from(variant: Linkmode) -> Self { variant as u8 != 0 } } -impl LINKMODE_R { +#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] +pub type LinkmodeR = crate::BitReader; +impl LinkmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LINKMODE_A { + pub const fn variant(&self) -> Linkmode { match self.bits { - false => LINKMODE_A::ABSOLUTE, - true => LINKMODE_A::RELATIVE, + false => Linkmode::Absolute, + true => Linkmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == LINKMODE_A::ABSOLUTE + *self == Linkmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == LINKMODE_A::RELATIVE + *self == Linkmode::Relative } } #[doc = "Field `LINK` reader - Link Next Structure"] -pub type LINK_R = crate::BitReader; +pub type LinkR = crate::BitReader; #[doc = "Field `LINK` writer - Link Next Structure"] -pub type LINK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH2_LINK_SPEC, bool, O>; +pub type LinkW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LINKADDR` reader - Link Structure Address"] -pub type LINKADDR_R = crate::FieldReader; +pub type LinkaddrR = crate::FieldReader; #[doc = "Field `LINKADDR` writer - Link Structure Address"] -pub type LINKADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH2_LINK_SPEC, u32, u32, 30, O>; +pub type LinkaddrW<'a, REG> = crate::FieldWriter<'a, REG, 30, u32>; impl R { #[doc = "Bit 0 - Link Structure Addressing Mode"] #[inline(always)] - pub fn linkmode(&self) -> LINKMODE_R { - LINKMODE_R::new((self.bits & 1) != 0) + pub fn linkmode(&self) -> LinkmodeR { + LinkmodeR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] - pub fn link(&self) -> LINK_R { - LINK_R::new(((self.bits >> 1) & 1) != 0) + pub fn link(&self) -> LinkR { + LinkR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] - pub fn linkaddr(&self) -> LINKADDR_R { - LINKADDR_R::new((self.bits >> 2) & 0x3fff_ffff) + pub fn linkaddr(&self) -> LinkaddrR { + LinkaddrR::new((self.bits >> 2) & 0x3fff_ffff) } } impl W { #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] #[must_use] - pub fn link(&mut self) -> LINK_W<1> { - LINK_W::new(self) + pub fn link(&mut self) -> LinkW { + LinkW::new(self, 1) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] #[must_use] - pub fn linkaddr(&mut self) -> LINKADDR_W<2> { - LINKADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn linkaddr(&mut self) -> LinkaddrW { + LinkaddrW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch2_link](index.html) module"] -pub struct CH2_LINK_SPEC; -impl crate::RegisterSpec for CH2_LINK_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_link::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_link::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch2LinkSpec; +impl crate::RegisterSpec for Ch2LinkSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch2_link::R](R) reader structure"] -impl crate::Readable for CH2_LINK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch2_link::W](W) writer structure"] -impl crate::Writable for CH2_LINK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch2_link::R`](R) reader structure"] +impl crate::Readable for Ch2LinkSpec {} +#[doc = "`write(|w| ..)` method takes [`ch2_link::W`](W) writer structure"] +impl crate::Writable for Ch2LinkSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH2_LINK to value 0"] -impl crate::Resettable for CH2_LINK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch2LinkSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch2_loop.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch2_loop.rs index 2deb28b..863d828 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch2_loop.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch2_loop.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH2_LOOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH2_LOOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOOPCNT` reader - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_R = crate::FieldReader; +pub type LoopcntR = crate::FieldReader; #[doc = "Field `LOOPCNT` writer - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH2_LOOP_SPEC, u8, u8, 8, O>; +pub type LoopcntW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] - pub fn loopcnt(&self) -> LOOPCNT_R { - LOOPCNT_R::new((self.bits & 0xff) as u8) + pub fn loopcnt(&self) -> LoopcntR { + LoopcntR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] #[must_use] - pub fn loopcnt(&mut self) -> LOOPCNT_W<0> { - LOOPCNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn loopcnt(&mut self) -> LoopcntW { + LoopcntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch2_loop](index.html) module"] -pub struct CH2_LOOP_SPEC; -impl crate::RegisterSpec for CH2_LOOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_loop::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_loop::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch2LoopSpec; +impl crate::RegisterSpec for Ch2LoopSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch2_loop::R](R) reader structure"] -impl crate::Readable for CH2_LOOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch2_loop::W](W) writer structure"] -impl crate::Writable for CH2_LOOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch2_loop::R`](R) reader structure"] +impl crate::Readable for Ch2LoopSpec {} +#[doc = "`write(|w| ..)` method takes [`ch2_loop::W`](W) writer structure"] +impl crate::Writable for Ch2LoopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH2_LOOP to value 0"] -impl crate::Resettable for CH2_LOOP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch2LoopSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch2_src.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch2_src.rs index 282bf76..6da80df 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch2_src.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch2_src.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH2_SRC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH2_SRC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SRCADDR` reader - Source Data Address"] -pub type SRCADDR_R = crate::FieldReader; +pub type SrcaddrR = crate::FieldReader; #[doc = "Field `SRCADDR` writer - Source Data Address"] -pub type SRCADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH2_SRC_SPEC, u32, u32, 32, O>; +pub type SrcaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] - pub fn srcaddr(&self) -> SRCADDR_R { - SRCADDR_R::new(self.bits) + pub fn srcaddr(&self) -> SrcaddrR { + SrcaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] #[must_use] - pub fn srcaddr(&mut self) -> SRCADDR_W<0> { - SRCADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn srcaddr(&mut self) -> SrcaddrW { + SrcaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch2_src](index.html) module"] -pub struct CH2_SRC_SPEC; -impl crate::RegisterSpec for CH2_SRC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_src::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_src::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch2SrcSpec; +impl crate::RegisterSpec for Ch2SrcSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch2_src::R](R) reader structure"] -impl crate::Readable for CH2_SRC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch2_src::W](W) writer structure"] -impl crate::Writable for CH2_SRC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch2_src::R`](R) reader structure"] +impl crate::Readable for Ch2SrcSpec {} +#[doc = "`write(|w| ..)` method takes [`ch2_src::W`](W) writer structure"] +impl crate::Writable for Ch2SrcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH2_SRC to value 0"] -impl crate::Resettable for CH2_SRC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch2SrcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch3_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch3_cfg.rs index 1d082c4..835af8a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch3_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch3_cfg.rs @@ -1,277 +1,250 @@ #[doc = "Register `CH3_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH3_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] -pub type ARBSLOTS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Arbitration Slot Number Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ARBSLOTS_A { +pub enum Arbslots { #[doc = "0: One arbitration slot selected"] - ONE = 0, + One = 0, #[doc = "1: Two arbitration slots selected"] - TWO = 1, + Two = 1, #[doc = "2: Four arbitration slots selected"] - FOUR = 2, + Four = 2, #[doc = "3: Eight arbitration slots selected"] - EIGHT = 3, + Eight = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ARBSLOTS_A) -> Self { + fn from(variant: Arbslots) -> Self { variant as _ } } -impl ARBSLOTS_R { +impl crate::FieldSpec for Arbslots { + type Ux = u8; +} +impl crate::IsEnum for Arbslots {} +#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] +pub type ArbslotsR = crate::FieldReader; +impl ArbslotsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ARBSLOTS_A { + pub const fn variant(&self) -> Arbslots { match self.bits { - 0 => ARBSLOTS_A::ONE, - 1 => ARBSLOTS_A::TWO, - 2 => ARBSLOTS_A::FOUR, - 3 => ARBSLOTS_A::EIGHT, + 0 => Arbslots::One, + 1 => Arbslots::Two, + 2 => Arbslots::Four, + 3 => Arbslots::Eight, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "One arbitration slot selected"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == ARBSLOTS_A::ONE + *self == Arbslots::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Two arbitration slots selected"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == ARBSLOTS_A::TWO + *self == Arbslots::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Four arbitration slots selected"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == ARBSLOTS_A::FOUR + *self == Arbslots::Four } - #[doc = "Checks if the value of the field is `EIGHT`"] + #[doc = "Eight arbitration slots selected"] #[inline(always)] pub fn is_eight(&self) -> bool { - *self == ARBSLOTS_A::EIGHT + *self == Arbslots::Eight } } #[doc = "Field `ARBSLOTS` writer - Arbitration Slot Number Select"] -pub type ARBSLOTS_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH3_CFG_SPEC, u8, ARBSLOTS_A, 2, O>; -impl<'a, const O: u8> ARBSLOTS_W<'a, O> { +pub type ArbslotsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Arbslots, crate::Safe>; +impl<'a, REG> ArbslotsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One arbitration slot selected"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(ARBSLOTS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Arbslots::One) } #[doc = "Two arbitration slots selected"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(ARBSLOTS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Arbslots::Two) } #[doc = "Four arbitration slots selected"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(ARBSLOTS_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Arbslots::Four) } #[doc = "Eight arbitration slots selected"] #[inline(always)] - pub fn eight(self) -> &'a mut W { - self.variant(ARBSLOTS_A::EIGHT) + pub fn eight(self) -> &'a mut crate::W { + self.variant(Arbslots::Eight) } } -#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] -pub type SRCINCSIGN_R = crate::BitReader; #[doc = "Source Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCINCSIGN_A { +pub enum Srcincsign { #[doc = "0: Increment source address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement source address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCINCSIGN_A) -> Self { + fn from(variant: Srcincsign) -> Self { variant as u8 != 0 } } -impl SRCINCSIGN_R { +#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] +pub type SrcincsignR = crate::BitReader; +impl SrcincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINCSIGN_A { + pub const fn variant(&self) -> Srcincsign { match self.bits { - false => SRCINCSIGN_A::POSITIVE, - true => SRCINCSIGN_A::NEGATIVE, + false => Srcincsign::Positive, + true => Srcincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment source address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == SRCINCSIGN_A::POSITIVE + *self == Srcincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement source address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == SRCINCSIGN_A::NEGATIVE + *self == Srcincsign::Negative } } #[doc = "Field `SRCINCSIGN` writer - Source Address Increment Sign"] -pub type SRCINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH3_CFG_SPEC, SRCINCSIGN_A, O>; -impl<'a, const O: u8> SRCINCSIGN_W<'a, O> { +pub type SrcincsignW<'a, REG> = crate::BitWriter<'a, REG, Srcincsign>; +impl<'a, REG> SrcincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment source address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Srcincsign::Positive) } #[doc = "Decrement source address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Srcincsign::Negative) } } -#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] -pub type DSTINCSIGN_R = crate::BitReader; #[doc = "Destination Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTINCSIGN_A { +pub enum Dstincsign { #[doc = "0: Increment destination address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement destination address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTINCSIGN_A) -> Self { + fn from(variant: Dstincsign) -> Self { variant as u8 != 0 } } -impl DSTINCSIGN_R { +#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] +pub type DstincsignR = crate::BitReader; +impl DstincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINCSIGN_A { + pub const fn variant(&self) -> Dstincsign { match self.bits { - false => DSTINCSIGN_A::POSITIVE, - true => DSTINCSIGN_A::NEGATIVE, + false => Dstincsign::Positive, + true => Dstincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment destination address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == DSTINCSIGN_A::POSITIVE + *self == Dstincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement destination address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == DSTINCSIGN_A::NEGATIVE + *self == Dstincsign::Negative } } #[doc = "Field `DSTINCSIGN` writer - Destination Address Increment Sign"] -pub type DSTINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH3_CFG_SPEC, DSTINCSIGN_A, O>; -impl<'a, const O: u8> DSTINCSIGN_W<'a, O> { +pub type DstincsignW<'a, REG> = crate::BitWriter<'a, REG, Dstincsign>; +impl<'a, REG> DstincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment destination address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Dstincsign::Positive) } #[doc = "Decrement destination address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Dstincsign::Negative) } } impl R { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] - pub fn arbslots(&self) -> ARBSLOTS_R { - ARBSLOTS_R::new(((self.bits >> 16) & 3) as u8) + pub fn arbslots(&self) -> ArbslotsR { + ArbslotsR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] - pub fn srcincsign(&self) -> SRCINCSIGN_R { - SRCINCSIGN_R::new(((self.bits >> 20) & 1) != 0) + pub fn srcincsign(&self) -> SrcincsignR { + SrcincsignR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] - pub fn dstincsign(&self) -> DSTINCSIGN_R { - DSTINCSIGN_R::new(((self.bits >> 21) & 1) != 0) + pub fn dstincsign(&self) -> DstincsignR { + DstincsignR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] #[must_use] - pub fn arbslots(&mut self) -> ARBSLOTS_W<16> { - ARBSLOTS_W::new(self) + pub fn arbslots(&mut self) -> ArbslotsW { + ArbslotsW::new(self, 16) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] #[must_use] - pub fn srcincsign(&mut self) -> SRCINCSIGN_W<20> { - SRCINCSIGN_W::new(self) + pub fn srcincsign(&mut self) -> SrcincsignW { + SrcincsignW::new(self, 20) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] #[must_use] - pub fn dstincsign(&mut self) -> DSTINCSIGN_W<21> { - DSTINCSIGN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstincsign(&mut self) -> DstincsignW { + DstincsignW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch3_cfg](index.html) module"] -pub struct CH3_CFG_SPEC; -impl crate::RegisterSpec for CH3_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch3CfgSpec; +impl crate::RegisterSpec for Ch3CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch3_cfg::R](R) reader structure"] -impl crate::Readable for CH3_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch3_cfg::W](W) writer structure"] -impl crate::Writable for CH3_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch3_cfg::R`](R) reader structure"] +impl crate::Readable for Ch3CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`ch3_cfg::W`](W) writer structure"] +impl crate::Writable for Ch3CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH3_CFG to value 0"] -impl crate::Resettable for CH3_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch3CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch3_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch3_ctrl.rs index a3c8b19..073b1d4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch3_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch3_ctrl.rs @@ -1,843 +1,842 @@ #[doc = "Register `CH3_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH3_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] -pub type STRUCTTYPE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DMA Structure Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STRUCTTYPE_A { +pub enum Structtype { #[doc = "0: DMA transfer structure type selected."] - TRANSFER = 0, + Transfer = 0, #[doc = "1: Synchronization structure type selected."] - SYNCHRONIZE = 1, + Synchronize = 1, #[doc = "2: Write immediate value structure type selected."] - WRITE = 2, + Write = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STRUCTTYPE_A) -> Self { + fn from(variant: Structtype) -> Self { variant as _ } } -impl STRUCTTYPE_R { +impl crate::FieldSpec for Structtype { + type Ux = u8; +} +impl crate::IsEnum for Structtype {} +#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] +pub type StructtypeR = crate::FieldReader; +impl StructtypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(STRUCTTYPE_A::TRANSFER), - 1 => Some(STRUCTTYPE_A::SYNCHRONIZE), - 2 => Some(STRUCTTYPE_A::WRITE), + 0 => Some(Structtype::Transfer), + 1 => Some(Structtype::Synchronize), + 2 => Some(Structtype::Write), _ => None, } } - #[doc = "Checks if the value of the field is `TRANSFER`"] + #[doc = "DMA transfer structure type selected."] #[inline(always)] pub fn is_transfer(&self) -> bool { - *self == STRUCTTYPE_A::TRANSFER + *self == Structtype::Transfer } - #[doc = "Checks if the value of the field is `SYNCHRONIZE`"] + #[doc = "Synchronization structure type selected."] #[inline(always)] pub fn is_synchronize(&self) -> bool { - *self == STRUCTTYPE_A::SYNCHRONIZE + *self == Structtype::Synchronize } - #[doc = "Checks if the value of the field is `WRITE`"] + #[doc = "Write immediate value structure type selected."] #[inline(always)] pub fn is_write(&self) -> bool { - *self == STRUCTTYPE_A::WRITE + *self == Structtype::Write } } #[doc = "Field `STRUCTTYPE` writer - DMA Structure Type"] -pub type STRUCTTYPE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH3_CTRL_SPEC, u8, STRUCTTYPE_A, 2, O>; -impl<'a, const O: u8> STRUCTTYPE_W<'a, O> { +pub type StructtypeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Structtype>; +impl<'a, REG> StructtypeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "DMA transfer structure type selected."] #[inline(always)] - pub fn transfer(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::TRANSFER) + pub fn transfer(self) -> &'a mut crate::W { + self.variant(Structtype::Transfer) } #[doc = "Synchronization structure type selected."] #[inline(always)] - pub fn synchronize(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::SYNCHRONIZE) + pub fn synchronize(self) -> &'a mut crate::W { + self.variant(Structtype::Synchronize) } #[doc = "Write immediate value structure type selected."] #[inline(always)] - pub fn write(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::WRITE) + pub fn write(self) -> &'a mut crate::W { + self.variant(Structtype::Write) } } #[doc = "Field `STRUCTREQ` reader - Structure DMA Transfer Request"] -pub type STRUCTREQ_R = crate::BitReader; +pub type StructreqR = crate::BitReader; #[doc = "Field `XFERCNT` reader - DMA Unit Data Transfer Count"] -pub type XFERCNT_R = crate::FieldReader; +pub type XfercntR = crate::FieldReader; #[doc = "Field `XFERCNT` writer - DMA Unit Data Transfer Count"] -pub type XFERCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH3_CTRL_SPEC, u16, u16, 11, O>; +pub type XfercntW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `BYTESWAP` reader - Endian Byte Swap"] -pub type BYTESWAP_R = crate::BitReader; +pub type ByteswapR = crate::BitReader; #[doc = "Field `BYTESWAP` writer - Endian Byte Swap"] -pub type BYTESWAP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH3_CTRL_SPEC, bool, O>; -#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] -pub type BLOCKSIZE_R = crate::FieldReader; +pub type ByteswapW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Block Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BLOCKSIZE_A { +pub enum Blocksize { #[doc = "0: One unit transfer per arbitration"] - UNIT1 = 0, + Unit1 = 0, #[doc = "1: Two unit transfers per arbitration"] - UNIT2 = 1, + Unit2 = 1, #[doc = "2: Three unit transfers per arbitration"] - UNIT3 = 2, + Unit3 = 2, #[doc = "3: Four unit transfers per arbitration"] - UNIT4 = 3, + Unit4 = 3, #[doc = "4: Six unit transfers per arbitration"] - UNIT6 = 4, + Unit6 = 4, #[doc = "5: Eight unit transfers per arbitration"] - UNIT8 = 5, + Unit8 = 5, #[doc = "7: Sixteen unit transfers per arbitration"] - UNIT16 = 7, + Unit16 = 7, #[doc = "9: 32 unit transfers per arbitration"] - UNIT32 = 9, + Unit32 = 9, #[doc = "10: 64 unit transfers per arbitration"] - UNIT64 = 10, + Unit64 = 10, #[doc = "11: 128 unit transfers per arbitration"] - UNIT128 = 11, + Unit128 = 11, #[doc = "12: 256 unit transfers per arbitration"] - UNIT256 = 12, + Unit256 = 12, #[doc = "13: 512 unit transfers per arbitration"] - UNIT512 = 13, + Unit512 = 13, #[doc = "14: 1024 unit transfers per arbitration"] - UNIT1024 = 14, + Unit1024 = 14, #[doc = "15: Transfer all units as specified by the XFRCNT field"] - ALL = 15, + All = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BLOCKSIZE_A) -> Self { + fn from(variant: Blocksize) -> Self { variant as _ } } -impl BLOCKSIZE_R { +impl crate::FieldSpec for Blocksize { + type Ux = u8; +} +impl crate::IsEnum for Blocksize {} +#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] +pub type BlocksizeR = crate::FieldReader; +impl BlocksizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BLOCKSIZE_A::UNIT1), - 1 => Some(BLOCKSIZE_A::UNIT2), - 2 => Some(BLOCKSIZE_A::UNIT3), - 3 => Some(BLOCKSIZE_A::UNIT4), - 4 => Some(BLOCKSIZE_A::UNIT6), - 5 => Some(BLOCKSIZE_A::UNIT8), - 7 => Some(BLOCKSIZE_A::UNIT16), - 9 => Some(BLOCKSIZE_A::UNIT32), - 10 => Some(BLOCKSIZE_A::UNIT64), - 11 => Some(BLOCKSIZE_A::UNIT128), - 12 => Some(BLOCKSIZE_A::UNIT256), - 13 => Some(BLOCKSIZE_A::UNIT512), - 14 => Some(BLOCKSIZE_A::UNIT1024), - 15 => Some(BLOCKSIZE_A::ALL), + 0 => Some(Blocksize::Unit1), + 1 => Some(Blocksize::Unit2), + 2 => Some(Blocksize::Unit3), + 3 => Some(Blocksize::Unit4), + 4 => Some(Blocksize::Unit6), + 5 => Some(Blocksize::Unit8), + 7 => Some(Blocksize::Unit16), + 9 => Some(Blocksize::Unit32), + 10 => Some(Blocksize::Unit64), + 11 => Some(Blocksize::Unit128), + 12 => Some(Blocksize::Unit256), + 13 => Some(Blocksize::Unit512), + 14 => Some(Blocksize::Unit1024), + 15 => Some(Blocksize::All), _ => None, } } - #[doc = "Checks if the value of the field is `UNIT1`"] + #[doc = "One unit transfer per arbitration"] #[inline(always)] pub fn is_unit1(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1 + *self == Blocksize::Unit1 } - #[doc = "Checks if the value of the field is `UNIT2`"] + #[doc = "Two unit transfers per arbitration"] #[inline(always)] pub fn is_unit2(&self) -> bool { - *self == BLOCKSIZE_A::UNIT2 + *self == Blocksize::Unit2 } - #[doc = "Checks if the value of the field is `UNIT3`"] + #[doc = "Three unit transfers per arbitration"] #[inline(always)] pub fn is_unit3(&self) -> bool { - *self == BLOCKSIZE_A::UNIT3 + *self == Blocksize::Unit3 } - #[doc = "Checks if the value of the field is `UNIT4`"] + #[doc = "Four unit transfers per arbitration"] #[inline(always)] pub fn is_unit4(&self) -> bool { - *self == BLOCKSIZE_A::UNIT4 + *self == Blocksize::Unit4 } - #[doc = "Checks if the value of the field is `UNIT6`"] + #[doc = "Six unit transfers per arbitration"] #[inline(always)] pub fn is_unit6(&self) -> bool { - *self == BLOCKSIZE_A::UNIT6 + *self == Blocksize::Unit6 } - #[doc = "Checks if the value of the field is `UNIT8`"] + #[doc = "Eight unit transfers per arbitration"] #[inline(always)] pub fn is_unit8(&self) -> bool { - *self == BLOCKSIZE_A::UNIT8 + *self == Blocksize::Unit8 } - #[doc = "Checks if the value of the field is `UNIT16`"] + #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] pub fn is_unit16(&self) -> bool { - *self == BLOCKSIZE_A::UNIT16 + *self == Blocksize::Unit16 } - #[doc = "Checks if the value of the field is `UNIT32`"] + #[doc = "32 unit transfers per arbitration"] #[inline(always)] pub fn is_unit32(&self) -> bool { - *self == BLOCKSIZE_A::UNIT32 + *self == Blocksize::Unit32 } - #[doc = "Checks if the value of the field is `UNIT64`"] + #[doc = "64 unit transfers per arbitration"] #[inline(always)] pub fn is_unit64(&self) -> bool { - *self == BLOCKSIZE_A::UNIT64 + *self == Blocksize::Unit64 } - #[doc = "Checks if the value of the field is `UNIT128`"] + #[doc = "128 unit transfers per arbitration"] #[inline(always)] pub fn is_unit128(&self) -> bool { - *self == BLOCKSIZE_A::UNIT128 + *self == Blocksize::Unit128 } - #[doc = "Checks if the value of the field is `UNIT256`"] + #[doc = "256 unit transfers per arbitration"] #[inline(always)] pub fn is_unit256(&self) -> bool { - *self == BLOCKSIZE_A::UNIT256 + *self == Blocksize::Unit256 } - #[doc = "Checks if the value of the field is `UNIT512`"] + #[doc = "512 unit transfers per arbitration"] #[inline(always)] pub fn is_unit512(&self) -> bool { - *self == BLOCKSIZE_A::UNIT512 + *self == Blocksize::Unit512 } - #[doc = "Checks if the value of the field is `UNIT1024`"] + #[doc = "1024 unit transfers per arbitration"] #[inline(always)] pub fn is_unit1024(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1024 + *self == Blocksize::Unit1024 } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] pub fn is_all(&self) -> bool { - *self == BLOCKSIZE_A::ALL + *self == Blocksize::All } } #[doc = "Field `BLOCKSIZE` writer - Block Transfer Size"] -pub type BLOCKSIZE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH3_CTRL_SPEC, u8, BLOCKSIZE_A, 4, O>; -impl<'a, const O: u8> BLOCKSIZE_W<'a, O> { +pub type BlocksizeW<'a, REG> = crate::FieldWriter<'a, REG, 4, Blocksize>; +impl<'a, REG> BlocksizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One unit transfer per arbitration"] #[inline(always)] - pub fn unit1(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1) + pub fn unit1(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1) } #[doc = "Two unit transfers per arbitration"] #[inline(always)] - pub fn unit2(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT2) + pub fn unit2(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit2) } #[doc = "Three unit transfers per arbitration"] #[inline(always)] - pub fn unit3(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT3) + pub fn unit3(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit3) } #[doc = "Four unit transfers per arbitration"] #[inline(always)] - pub fn unit4(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT4) + pub fn unit4(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit4) } #[doc = "Six unit transfers per arbitration"] #[inline(always)] - pub fn unit6(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT6) + pub fn unit6(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit6) } #[doc = "Eight unit transfers per arbitration"] #[inline(always)] - pub fn unit8(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT8) + pub fn unit8(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit8) } #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] - pub fn unit16(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT16) + pub fn unit16(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit16) } #[doc = "32 unit transfers per arbitration"] #[inline(always)] - pub fn unit32(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT32) + pub fn unit32(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit32) } #[doc = "64 unit transfers per arbitration"] #[inline(always)] - pub fn unit64(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT64) + pub fn unit64(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit64) } #[doc = "128 unit transfers per arbitration"] #[inline(always)] - pub fn unit128(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT128) + pub fn unit128(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit128) } #[doc = "256 unit transfers per arbitration"] #[inline(always)] - pub fn unit256(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT256) + pub fn unit256(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit256) } #[doc = "512 unit transfers per arbitration"] #[inline(always)] - pub fn unit512(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT512) + pub fn unit512(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit512) } #[doc = "1024 unit transfers per arbitration"] #[inline(always)] - pub fn unit1024(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1024) + pub fn unit1024(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1024) } #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Blocksize::All) } } #[doc = "Field `DONEIEN` reader - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_R = crate::BitReader; +pub type DoneienR = crate::BitReader; #[doc = "Field `DONEIEN` writer - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH3_CTRL_SPEC, bool, O>; -#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] -pub type REQMODE_R = crate::BitReader; +pub type DoneienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "DMA Request Transfer Mode Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REQMODE_A { +pub enum Reqmode { #[doc = "0: The LDMA transfers one BLOCKSIZE per transfer request."] - BLOCK = 0, + Block = 0, #[doc = "1: One transfer request transfers all units as defined by the XFRCNT field."] - ALL = 1, + All = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REQMODE_A) -> Self { + fn from(variant: Reqmode) -> Self { variant as u8 != 0 } } -impl REQMODE_R { +#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] +pub type ReqmodeR = crate::BitReader; +impl ReqmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REQMODE_A { + pub const fn variant(&self) -> Reqmode { match self.bits { - false => REQMODE_A::BLOCK, - true => REQMODE_A::ALL, + false => Reqmode::Block, + true => Reqmode::All, } } - #[doc = "Checks if the value of the field is `BLOCK`"] + #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] pub fn is_block(&self) -> bool { - *self == REQMODE_A::BLOCK + *self == Reqmode::Block } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] pub fn is_all(&self) -> bool { - *self == REQMODE_A::ALL + *self == Reqmode::All } } #[doc = "Field `REQMODE` writer - DMA Request Transfer Mode Select"] -pub type REQMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH3_CTRL_SPEC, REQMODE_A, O>; -impl<'a, const O: u8> REQMODE_W<'a, O> { +pub type ReqmodeW<'a, REG> = crate::BitWriter<'a, REG, Reqmode>; +impl<'a, REG> ReqmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] - pub fn block(self) -> &'a mut W { - self.variant(REQMODE_A::BLOCK) + pub fn block(self) -> &'a mut crate::W { + self.variant(Reqmode::Block) } #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(REQMODE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Reqmode::All) } } #[doc = "Field `DECLOOPCNT` reader - Decrement Loop Count"] -pub type DECLOOPCNT_R = crate::BitReader; +pub type DecloopcntR = crate::BitReader; #[doc = "Field `DECLOOPCNT` writer - Decrement Loop Count"] -pub type DECLOOPCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH3_CTRL_SPEC, bool, O>; +pub type DecloopcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IGNORESREQ` reader - Ignore Sreq"] -pub type IGNORESREQ_R = crate::BitReader; +pub type IgnoresreqR = crate::BitReader; #[doc = "Field `IGNORESREQ` writer - Ignore Sreq"] -pub type IGNORESREQ_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH3_CTRL_SPEC, bool, O>; -#[doc = "Field `SRCINC` reader - Source Address Increment Size"] -pub type SRCINC_R = crate::FieldReader; +pub type IgnoresreqW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SRCINC_A { +pub enum Srcinc { #[doc = "0: Increment source address by one unit data size after each read"] - ONE = 0, + One = 0, #[doc = "1: Increment source address by two unit data sizes after each read"] - TWO = 1, + Two = 1, #[doc = "2: Increment source address by four unit data sizes after each read"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SRCINC_A) -> Self { + fn from(variant: Srcinc) -> Self { variant as _ } } -impl SRCINC_R { +impl crate::FieldSpec for Srcinc { + type Ux = u8; +} +impl crate::IsEnum for Srcinc {} +#[doc = "Field `SRCINC` reader - Source Address Increment Size"] +pub type SrcincR = crate::FieldReader; +impl SrcincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINC_A { + pub const fn variant(&self) -> Srcinc { match self.bits { - 0 => SRCINC_A::ONE, - 1 => SRCINC_A::TWO, - 2 => SRCINC_A::FOUR, - 3 => SRCINC_A::NONE, + 0 => Srcinc::One, + 1 => Srcinc::Two, + 2 => Srcinc::Four, + 3 => Srcinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == SRCINC_A::ONE + *self == Srcinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == SRCINC_A::TWO + *self == Srcinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == SRCINC_A::FOUR + *self == Srcinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SRCINC_A::NONE + *self == Srcinc::None } } #[doc = "Field `SRCINC` writer - Source Address Increment Size"] -pub type SRCINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH3_CTRL_SPEC, u8, SRCINC_A, 2, O>; -impl<'a, const O: u8> SRCINC_W<'a, O> { +pub type SrcincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Srcinc, crate::Safe>; +impl<'a, REG> SrcincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(SRCINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Srcinc::One) } #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(SRCINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Srcinc::Two) } #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(SRCINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Srcinc::Four) } #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SRCINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Srcinc::None) } } -#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] -pub type SIZE_R = crate::FieldReader; #[doc = "Unit Data Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIZE_A { +pub enum Size { #[doc = "0: Each unit transfer is a byte"] - BYTE = 0, + Byte = 0, #[doc = "1: Each unit transfer is a half-word"] - HALFWORD = 1, + Halfword = 1, #[doc = "2: Each unit transfer is a word"] - WORD = 2, + Word = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIZE_A) -> Self { + fn from(variant: Size) -> Self { variant as _ } } -impl SIZE_R { +impl crate::FieldSpec for Size { + type Ux = u8; +} +impl crate::IsEnum for Size {} +#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] +pub type SizeR = crate::FieldReader; +impl SizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIZE_A::BYTE), - 1 => Some(SIZE_A::HALFWORD), - 2 => Some(SIZE_A::WORD), + 0 => Some(Size::Byte), + 1 => Some(Size::Halfword), + 2 => Some(Size::Word), _ => None, } } - #[doc = "Checks if the value of the field is `BYTE`"] + #[doc = "Each unit transfer is a byte"] #[inline(always)] pub fn is_byte(&self) -> bool { - *self == SIZE_A::BYTE + *self == Size::Byte } - #[doc = "Checks if the value of the field is `HALFWORD`"] + #[doc = "Each unit transfer is a half-word"] #[inline(always)] pub fn is_halfword(&self) -> bool { - *self == SIZE_A::HALFWORD + *self == Size::Halfword } - #[doc = "Checks if the value of the field is `WORD`"] + #[doc = "Each unit transfer is a word"] #[inline(always)] pub fn is_word(&self) -> bool { - *self == SIZE_A::WORD + *self == Size::Word } } #[doc = "Field `SIZE` writer - Unit Data Transfer Size"] -pub type SIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH3_CTRL_SPEC, u8, SIZE_A, 2, O>; -impl<'a, const O: u8> SIZE_W<'a, O> { +pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Size>; +impl<'a, REG> SizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Each unit transfer is a byte"] #[inline(always)] - pub fn byte(self) -> &'a mut W { - self.variant(SIZE_A::BYTE) + pub fn byte(self) -> &'a mut crate::W { + self.variant(Size::Byte) } #[doc = "Each unit transfer is a half-word"] #[inline(always)] - pub fn halfword(self) -> &'a mut W { - self.variant(SIZE_A::HALFWORD) + pub fn halfword(self) -> &'a mut crate::W { + self.variant(Size::Halfword) } #[doc = "Each unit transfer is a word"] #[inline(always)] - pub fn word(self) -> &'a mut W { - self.variant(SIZE_A::WORD) + pub fn word(self) -> &'a mut crate::W { + self.variant(Size::Word) } } -#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] -pub type DSTINC_R = crate::FieldReader; #[doc = "Destination Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DSTINC_A { +pub enum Dstinc { #[doc = "0: Increment destination address by one unit data size after each write"] - ONE = 0, + One = 0, #[doc = "1: Increment destination address by two unit data sizes after each write"] - TWO = 1, + Two = 1, #[doc = "2: Increment destination address by four unit data sizes after each write"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DSTINC_A) -> Self { + fn from(variant: Dstinc) -> Self { variant as _ } } -impl DSTINC_R { +impl crate::FieldSpec for Dstinc { + type Ux = u8; +} +impl crate::IsEnum for Dstinc {} +#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] +pub type DstincR = crate::FieldReader; +impl DstincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINC_A { + pub const fn variant(&self) -> Dstinc { match self.bits { - 0 => DSTINC_A::ONE, - 1 => DSTINC_A::TWO, - 2 => DSTINC_A::FOUR, - 3 => DSTINC_A::NONE, + 0 => Dstinc::One, + 1 => Dstinc::Two, + 2 => Dstinc::Four, + 3 => Dstinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == DSTINC_A::ONE + *self == Dstinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == DSTINC_A::TWO + *self == Dstinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == DSTINC_A::FOUR + *self == Dstinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == DSTINC_A::NONE + *self == Dstinc::None } } #[doc = "Field `DSTINC` writer - Destination Address Increment Size"] -pub type DSTINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH3_CTRL_SPEC, u8, DSTINC_A, 2, O>; -impl<'a, const O: u8> DSTINC_W<'a, O> { +pub type DstincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dstinc, crate::Safe>; +impl<'a, REG> DstincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(DSTINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Dstinc::One) } #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(DSTINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Dstinc::Two) } #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(DSTINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Dstinc::Four) } #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(DSTINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Dstinc::None) } } -#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] -pub type SRCMODE_R = crate::BitReader; #[doc = "Source Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCMODE_A { +pub enum Srcmode { #[doc = "0: The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCMODE_A) -> Self { + fn from(variant: Srcmode) -> Self { variant as u8 != 0 } } -impl SRCMODE_R { +#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] +pub type SrcmodeR = crate::BitReader; +impl SrcmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCMODE_A { + pub const fn variant(&self) -> Srcmode { match self.bits { - false => SRCMODE_A::ABSOLUTE, - true => SRCMODE_A::RELATIVE, + false => Srcmode::Absolute, + true => Srcmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == SRCMODE_A::ABSOLUTE + *self == Srcmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == SRCMODE_A::RELATIVE + *self == Srcmode::Relative } } -#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] -pub type DSTMODE_R = crate::BitReader; #[doc = "Destination Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTMODE_A { +pub enum Dstmode { #[doc = "0: The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTMODE_A) -> Self { + fn from(variant: Dstmode) -> Self { variant as u8 != 0 } } -impl DSTMODE_R { +#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] +pub type DstmodeR = crate::BitReader; +impl DstmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTMODE_A { + pub const fn variant(&self) -> Dstmode { match self.bits { - false => DSTMODE_A::ABSOLUTE, - true => DSTMODE_A::RELATIVE, + false => Dstmode::Absolute, + true => Dstmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == DSTMODE_A::ABSOLUTE + *self == Dstmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == DSTMODE_A::RELATIVE + *self == Dstmode::Relative } } impl R { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] - pub fn structtype(&self) -> STRUCTTYPE_R { - STRUCTTYPE_R::new((self.bits & 3) as u8) + pub fn structtype(&self) -> StructtypeR { + StructtypeR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Structure DMA Transfer Request"] #[inline(always)] - pub fn structreq(&self) -> STRUCTREQ_R { - STRUCTREQ_R::new(((self.bits >> 3) & 1) != 0) + pub fn structreq(&self) -> StructreqR { + StructreqR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] - pub fn xfercnt(&self) -> XFERCNT_R { - XFERCNT_R::new(((self.bits >> 4) & 0x07ff) as u16) + pub fn xfercnt(&self) -> XfercntR { + XfercntR::new(((self.bits >> 4) & 0x07ff) as u16) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] - pub fn byteswap(&self) -> BYTESWAP_R { - BYTESWAP_R::new(((self.bits >> 15) & 1) != 0) + pub fn byteswap(&self) -> ByteswapR { + ByteswapR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] - pub fn blocksize(&self) -> BLOCKSIZE_R { - BLOCKSIZE_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn blocksize(&self) -> BlocksizeR { + BlocksizeR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] - pub fn doneien(&self) -> DONEIEN_R { - DONEIEN_R::new(((self.bits >> 20) & 1) != 0) + pub fn doneien(&self) -> DoneienR { + DoneienR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] - pub fn reqmode(&self) -> REQMODE_R { - REQMODE_R::new(((self.bits >> 21) & 1) != 0) + pub fn reqmode(&self) -> ReqmodeR { + ReqmodeR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] - pub fn decloopcnt(&self) -> DECLOOPCNT_R { - DECLOOPCNT_R::new(((self.bits >> 22) & 1) != 0) + pub fn decloopcnt(&self) -> DecloopcntR { + DecloopcntR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] - pub fn ignoresreq(&self) -> IGNORESREQ_R { - IGNORESREQ_R::new(((self.bits >> 23) & 1) != 0) + pub fn ignoresreq(&self) -> IgnoresreqR { + IgnoresreqR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] - pub fn srcinc(&self) -> SRCINC_R { - SRCINC_R::new(((self.bits >> 24) & 3) as u8) + pub fn srcinc(&self) -> SrcincR { + SrcincR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] - pub fn size(&self) -> SIZE_R { - SIZE_R::new(((self.bits >> 26) & 3) as u8) + pub fn size(&self) -> SizeR { + SizeR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] - pub fn dstinc(&self) -> DSTINC_R { - DSTINC_R::new(((self.bits >> 28) & 3) as u8) + pub fn dstinc(&self) -> DstincR { + DstincR::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bit 30 - Source Addressing Mode"] #[inline(always)] - pub fn srcmode(&self) -> SRCMODE_R { - SRCMODE_R::new(((self.bits >> 30) & 1) != 0) + pub fn srcmode(&self) -> SrcmodeR { + SrcmodeR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Destination Addressing Mode"] #[inline(always)] - pub fn dstmode(&self) -> DSTMODE_R { - DSTMODE_R::new(((self.bits >> 31) & 1) != 0) + pub fn dstmode(&self) -> DstmodeR { + DstmodeR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] #[must_use] - pub fn structtype(&mut self) -> STRUCTTYPE_W<0> { - STRUCTTYPE_W::new(self) + pub fn structtype(&mut self) -> StructtypeW { + StructtypeW::new(self, 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] #[must_use] - pub fn xfercnt(&mut self) -> XFERCNT_W<4> { - XFERCNT_W::new(self) + pub fn xfercnt(&mut self) -> XfercntW { + XfercntW::new(self, 4) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] #[must_use] - pub fn byteswap(&mut self) -> BYTESWAP_W<15> { - BYTESWAP_W::new(self) + pub fn byteswap(&mut self) -> ByteswapW { + ByteswapW::new(self, 15) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] #[must_use] - pub fn blocksize(&mut self) -> BLOCKSIZE_W<16> { - BLOCKSIZE_W::new(self) + pub fn blocksize(&mut self) -> BlocksizeW { + BlocksizeW::new(self, 16) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] #[must_use] - pub fn doneien(&mut self) -> DONEIEN_W<20> { - DONEIEN_W::new(self) + pub fn doneien(&mut self) -> DoneienW { + DoneienW::new(self, 20) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] #[must_use] - pub fn reqmode(&mut self) -> REQMODE_W<21> { - REQMODE_W::new(self) + pub fn reqmode(&mut self) -> ReqmodeW { + ReqmodeW::new(self, 21) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] #[must_use] - pub fn decloopcnt(&mut self) -> DECLOOPCNT_W<22> { - DECLOOPCNT_W::new(self) + pub fn decloopcnt(&mut self) -> DecloopcntW { + DecloopcntW::new(self, 22) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] #[must_use] - pub fn ignoresreq(&mut self) -> IGNORESREQ_W<23> { - IGNORESREQ_W::new(self) + pub fn ignoresreq(&mut self) -> IgnoresreqW { + IgnoresreqW::new(self, 23) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] #[must_use] - pub fn srcinc(&mut self) -> SRCINC_W<24> { - SRCINC_W::new(self) + pub fn srcinc(&mut self) -> SrcincW { + SrcincW::new(self, 24) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SIZE_W<26> { - SIZE_W::new(self) + pub fn size(&mut self) -> SizeW { + SizeW::new(self, 26) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] #[must_use] - pub fn dstinc(&mut self) -> DSTINC_W<28> { - DSTINC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstinc(&mut self) -> DstincW { + DstincW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch3_ctrl](index.html) module"] -pub struct CH3_CTRL_SPEC; -impl crate::RegisterSpec for CH3_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch3CtrlSpec; +impl crate::RegisterSpec for Ch3CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch3_ctrl::R](R) reader structure"] -impl crate::Readable for CH3_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch3_ctrl::W](W) writer structure"] -impl crate::Writable for CH3_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch3_ctrl::R`](R) reader structure"] +impl crate::Readable for Ch3CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ch3_ctrl::W`](W) writer structure"] +impl crate::Writable for Ch3CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH3_CTRL to value 0"] -impl crate::Resettable for CH3_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch3CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch3_dst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch3_dst.rs index daa0721..34e006a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch3_dst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch3_dst.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH3_DST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH3_DST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DSTADDR` reader - Destination Data Address"] -pub type DSTADDR_R = crate::FieldReader; +pub type DstaddrR = crate::FieldReader; #[doc = "Field `DSTADDR` writer - Destination Data Address"] -pub type DSTADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH3_DST_SPEC, u32, u32, 32, O>; +pub type DstaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] - pub fn dstaddr(&self) -> DSTADDR_R { - DSTADDR_R::new(self.bits) + pub fn dstaddr(&self) -> DstaddrR { + DstaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] #[must_use] - pub fn dstaddr(&mut self) -> DSTADDR_W<0> { - DSTADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstaddr(&mut self) -> DstaddrW { + DstaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch3_dst](index.html) module"] -pub struct CH3_DST_SPEC; -impl crate::RegisterSpec for CH3_DST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_dst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_dst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch3DstSpec; +impl crate::RegisterSpec for Ch3DstSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch3_dst::R](R) reader structure"] -impl crate::Readable for CH3_DST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch3_dst::W](W) writer structure"] -impl crate::Writable for CH3_DST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch3_dst::R`](R) reader structure"] +impl crate::Readable for Ch3DstSpec {} +#[doc = "`write(|w| ..)` method takes [`ch3_dst::W`](W) writer structure"] +impl crate::Writable for Ch3DstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH3_DST to value 0"] -impl crate::Resettable for CH3_DST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch3DstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch3_link.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch3_link.rs index eb147f0..973eaed 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch3_link.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch3_link.rs @@ -1,136 +1,96 @@ #[doc = "Register `CH3_LINK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH3_LINK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] -pub type LINKMODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Link Structure Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LINKMODE_A { +pub enum Linkmode { #[doc = "0: The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LINKMODE_A) -> Self { + fn from(variant: Linkmode) -> Self { variant as u8 != 0 } } -impl LINKMODE_R { +#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] +pub type LinkmodeR = crate::BitReader; +impl LinkmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LINKMODE_A { + pub const fn variant(&self) -> Linkmode { match self.bits { - false => LINKMODE_A::ABSOLUTE, - true => LINKMODE_A::RELATIVE, + false => Linkmode::Absolute, + true => Linkmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == LINKMODE_A::ABSOLUTE + *self == Linkmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == LINKMODE_A::RELATIVE + *self == Linkmode::Relative } } #[doc = "Field `LINK` reader - Link Next Structure"] -pub type LINK_R = crate::BitReader; +pub type LinkR = crate::BitReader; #[doc = "Field `LINK` writer - Link Next Structure"] -pub type LINK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH3_LINK_SPEC, bool, O>; +pub type LinkW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LINKADDR` reader - Link Structure Address"] -pub type LINKADDR_R = crate::FieldReader; +pub type LinkaddrR = crate::FieldReader; #[doc = "Field `LINKADDR` writer - Link Structure Address"] -pub type LINKADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH3_LINK_SPEC, u32, u32, 30, O>; +pub type LinkaddrW<'a, REG> = crate::FieldWriter<'a, REG, 30, u32>; impl R { #[doc = "Bit 0 - Link Structure Addressing Mode"] #[inline(always)] - pub fn linkmode(&self) -> LINKMODE_R { - LINKMODE_R::new((self.bits & 1) != 0) + pub fn linkmode(&self) -> LinkmodeR { + LinkmodeR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] - pub fn link(&self) -> LINK_R { - LINK_R::new(((self.bits >> 1) & 1) != 0) + pub fn link(&self) -> LinkR { + LinkR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] - pub fn linkaddr(&self) -> LINKADDR_R { - LINKADDR_R::new((self.bits >> 2) & 0x3fff_ffff) + pub fn linkaddr(&self) -> LinkaddrR { + LinkaddrR::new((self.bits >> 2) & 0x3fff_ffff) } } impl W { #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] #[must_use] - pub fn link(&mut self) -> LINK_W<1> { - LINK_W::new(self) + pub fn link(&mut self) -> LinkW { + LinkW::new(self, 1) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] #[must_use] - pub fn linkaddr(&mut self) -> LINKADDR_W<2> { - LINKADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn linkaddr(&mut self) -> LinkaddrW { + LinkaddrW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch3_link](index.html) module"] -pub struct CH3_LINK_SPEC; -impl crate::RegisterSpec for CH3_LINK_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_link::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_link::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch3LinkSpec; +impl crate::RegisterSpec for Ch3LinkSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch3_link::R](R) reader structure"] -impl crate::Readable for CH3_LINK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch3_link::W](W) writer structure"] -impl crate::Writable for CH3_LINK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch3_link::R`](R) reader structure"] +impl crate::Readable for Ch3LinkSpec {} +#[doc = "`write(|w| ..)` method takes [`ch3_link::W`](W) writer structure"] +impl crate::Writable for Ch3LinkSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH3_LINK to value 0"] -impl crate::Resettable for CH3_LINK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch3LinkSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch3_loop.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch3_loop.rs index 30837ee..e87a874 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch3_loop.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch3_loop.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH3_LOOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH3_LOOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOOPCNT` reader - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_R = crate::FieldReader; +pub type LoopcntR = crate::FieldReader; #[doc = "Field `LOOPCNT` writer - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH3_LOOP_SPEC, u8, u8, 8, O>; +pub type LoopcntW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] - pub fn loopcnt(&self) -> LOOPCNT_R { - LOOPCNT_R::new((self.bits & 0xff) as u8) + pub fn loopcnt(&self) -> LoopcntR { + LoopcntR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] #[must_use] - pub fn loopcnt(&mut self) -> LOOPCNT_W<0> { - LOOPCNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn loopcnt(&mut self) -> LoopcntW { + LoopcntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch3_loop](index.html) module"] -pub struct CH3_LOOP_SPEC; -impl crate::RegisterSpec for CH3_LOOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_loop::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_loop::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch3LoopSpec; +impl crate::RegisterSpec for Ch3LoopSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch3_loop::R](R) reader structure"] -impl crate::Readable for CH3_LOOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch3_loop::W](W) writer structure"] -impl crate::Writable for CH3_LOOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch3_loop::R`](R) reader structure"] +impl crate::Readable for Ch3LoopSpec {} +#[doc = "`write(|w| ..)` method takes [`ch3_loop::W`](W) writer structure"] +impl crate::Writable for Ch3LoopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH3_LOOP to value 0"] -impl crate::Resettable for CH3_LOOP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch3LoopSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch3_src.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch3_src.rs index a1b7622..e3bc8ea 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch3_src.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch3_src.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH3_SRC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH3_SRC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SRCADDR` reader - Source Data Address"] -pub type SRCADDR_R = crate::FieldReader; +pub type SrcaddrR = crate::FieldReader; #[doc = "Field `SRCADDR` writer - Source Data Address"] -pub type SRCADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH3_SRC_SPEC, u32, u32, 32, O>; +pub type SrcaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] - pub fn srcaddr(&self) -> SRCADDR_R { - SRCADDR_R::new(self.bits) + pub fn srcaddr(&self) -> SrcaddrR { + SrcaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] #[must_use] - pub fn srcaddr(&mut self) -> SRCADDR_W<0> { - SRCADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn srcaddr(&mut self) -> SrcaddrW { + SrcaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch3_src](index.html) module"] -pub struct CH3_SRC_SPEC; -impl crate::RegisterSpec for CH3_SRC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_src::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_src::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch3SrcSpec; +impl crate::RegisterSpec for Ch3SrcSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch3_src::R](R) reader structure"] -impl crate::Readable for CH3_SRC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch3_src::W](W) writer structure"] -impl crate::Writable for CH3_SRC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch3_src::R`](R) reader structure"] +impl crate::Readable for Ch3SrcSpec {} +#[doc = "`write(|w| ..)` method takes [`ch3_src::W`](W) writer structure"] +impl crate::Writable for Ch3SrcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH3_SRC to value 0"] -impl crate::Resettable for CH3_SRC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch3SrcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch4_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch4_cfg.rs index 22e2cdf..2fb870b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch4_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch4_cfg.rs @@ -1,277 +1,250 @@ #[doc = "Register `CH4_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH4_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] -pub type ARBSLOTS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Arbitration Slot Number Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ARBSLOTS_A { +pub enum Arbslots { #[doc = "0: One arbitration slot selected"] - ONE = 0, + One = 0, #[doc = "1: Two arbitration slots selected"] - TWO = 1, + Two = 1, #[doc = "2: Four arbitration slots selected"] - FOUR = 2, + Four = 2, #[doc = "3: Eight arbitration slots selected"] - EIGHT = 3, + Eight = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ARBSLOTS_A) -> Self { + fn from(variant: Arbslots) -> Self { variant as _ } } -impl ARBSLOTS_R { +impl crate::FieldSpec for Arbslots { + type Ux = u8; +} +impl crate::IsEnum for Arbslots {} +#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] +pub type ArbslotsR = crate::FieldReader; +impl ArbslotsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ARBSLOTS_A { + pub const fn variant(&self) -> Arbslots { match self.bits { - 0 => ARBSLOTS_A::ONE, - 1 => ARBSLOTS_A::TWO, - 2 => ARBSLOTS_A::FOUR, - 3 => ARBSLOTS_A::EIGHT, + 0 => Arbslots::One, + 1 => Arbslots::Two, + 2 => Arbslots::Four, + 3 => Arbslots::Eight, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "One arbitration slot selected"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == ARBSLOTS_A::ONE + *self == Arbslots::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Two arbitration slots selected"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == ARBSLOTS_A::TWO + *self == Arbslots::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Four arbitration slots selected"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == ARBSLOTS_A::FOUR + *self == Arbslots::Four } - #[doc = "Checks if the value of the field is `EIGHT`"] + #[doc = "Eight arbitration slots selected"] #[inline(always)] pub fn is_eight(&self) -> bool { - *self == ARBSLOTS_A::EIGHT + *self == Arbslots::Eight } } #[doc = "Field `ARBSLOTS` writer - Arbitration Slot Number Select"] -pub type ARBSLOTS_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH4_CFG_SPEC, u8, ARBSLOTS_A, 2, O>; -impl<'a, const O: u8> ARBSLOTS_W<'a, O> { +pub type ArbslotsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Arbslots, crate::Safe>; +impl<'a, REG> ArbslotsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One arbitration slot selected"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(ARBSLOTS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Arbslots::One) } #[doc = "Two arbitration slots selected"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(ARBSLOTS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Arbslots::Two) } #[doc = "Four arbitration slots selected"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(ARBSLOTS_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Arbslots::Four) } #[doc = "Eight arbitration slots selected"] #[inline(always)] - pub fn eight(self) -> &'a mut W { - self.variant(ARBSLOTS_A::EIGHT) + pub fn eight(self) -> &'a mut crate::W { + self.variant(Arbslots::Eight) } } -#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] -pub type SRCINCSIGN_R = crate::BitReader; #[doc = "Source Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCINCSIGN_A { +pub enum Srcincsign { #[doc = "0: Increment source address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement source address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCINCSIGN_A) -> Self { + fn from(variant: Srcincsign) -> Self { variant as u8 != 0 } } -impl SRCINCSIGN_R { +#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] +pub type SrcincsignR = crate::BitReader; +impl SrcincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINCSIGN_A { + pub const fn variant(&self) -> Srcincsign { match self.bits { - false => SRCINCSIGN_A::POSITIVE, - true => SRCINCSIGN_A::NEGATIVE, + false => Srcincsign::Positive, + true => Srcincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment source address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == SRCINCSIGN_A::POSITIVE + *self == Srcincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement source address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == SRCINCSIGN_A::NEGATIVE + *self == Srcincsign::Negative } } #[doc = "Field `SRCINCSIGN` writer - Source Address Increment Sign"] -pub type SRCINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH4_CFG_SPEC, SRCINCSIGN_A, O>; -impl<'a, const O: u8> SRCINCSIGN_W<'a, O> { +pub type SrcincsignW<'a, REG> = crate::BitWriter<'a, REG, Srcincsign>; +impl<'a, REG> SrcincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment source address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Srcincsign::Positive) } #[doc = "Decrement source address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Srcincsign::Negative) } } -#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] -pub type DSTINCSIGN_R = crate::BitReader; #[doc = "Destination Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTINCSIGN_A { +pub enum Dstincsign { #[doc = "0: Increment destination address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement destination address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTINCSIGN_A) -> Self { + fn from(variant: Dstincsign) -> Self { variant as u8 != 0 } } -impl DSTINCSIGN_R { +#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] +pub type DstincsignR = crate::BitReader; +impl DstincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINCSIGN_A { + pub const fn variant(&self) -> Dstincsign { match self.bits { - false => DSTINCSIGN_A::POSITIVE, - true => DSTINCSIGN_A::NEGATIVE, + false => Dstincsign::Positive, + true => Dstincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment destination address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == DSTINCSIGN_A::POSITIVE + *self == Dstincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement destination address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == DSTINCSIGN_A::NEGATIVE + *self == Dstincsign::Negative } } #[doc = "Field `DSTINCSIGN` writer - Destination Address Increment Sign"] -pub type DSTINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH4_CFG_SPEC, DSTINCSIGN_A, O>; -impl<'a, const O: u8> DSTINCSIGN_W<'a, O> { +pub type DstincsignW<'a, REG> = crate::BitWriter<'a, REG, Dstincsign>; +impl<'a, REG> DstincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment destination address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Dstincsign::Positive) } #[doc = "Decrement destination address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Dstincsign::Negative) } } impl R { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] - pub fn arbslots(&self) -> ARBSLOTS_R { - ARBSLOTS_R::new(((self.bits >> 16) & 3) as u8) + pub fn arbslots(&self) -> ArbslotsR { + ArbslotsR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] - pub fn srcincsign(&self) -> SRCINCSIGN_R { - SRCINCSIGN_R::new(((self.bits >> 20) & 1) != 0) + pub fn srcincsign(&self) -> SrcincsignR { + SrcincsignR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] - pub fn dstincsign(&self) -> DSTINCSIGN_R { - DSTINCSIGN_R::new(((self.bits >> 21) & 1) != 0) + pub fn dstincsign(&self) -> DstincsignR { + DstincsignR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] #[must_use] - pub fn arbslots(&mut self) -> ARBSLOTS_W<16> { - ARBSLOTS_W::new(self) + pub fn arbslots(&mut self) -> ArbslotsW { + ArbslotsW::new(self, 16) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] #[must_use] - pub fn srcincsign(&mut self) -> SRCINCSIGN_W<20> { - SRCINCSIGN_W::new(self) + pub fn srcincsign(&mut self) -> SrcincsignW { + SrcincsignW::new(self, 20) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] #[must_use] - pub fn dstincsign(&mut self) -> DSTINCSIGN_W<21> { - DSTINCSIGN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstincsign(&mut self) -> DstincsignW { + DstincsignW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch4_cfg](index.html) module"] -pub struct CH4_CFG_SPEC; -impl crate::RegisterSpec for CH4_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch4CfgSpec; +impl crate::RegisterSpec for Ch4CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch4_cfg::R](R) reader structure"] -impl crate::Readable for CH4_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch4_cfg::W](W) writer structure"] -impl crate::Writable for CH4_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch4_cfg::R`](R) reader structure"] +impl crate::Readable for Ch4CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`ch4_cfg::W`](W) writer structure"] +impl crate::Writable for Ch4CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH4_CFG to value 0"] -impl crate::Resettable for CH4_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch4CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch4_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch4_ctrl.rs index ccfba6a..5e6df62 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch4_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch4_ctrl.rs @@ -1,843 +1,842 @@ #[doc = "Register `CH4_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH4_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] -pub type STRUCTTYPE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DMA Structure Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STRUCTTYPE_A { +pub enum Structtype { #[doc = "0: DMA transfer structure type selected."] - TRANSFER = 0, + Transfer = 0, #[doc = "1: Synchronization structure type selected."] - SYNCHRONIZE = 1, + Synchronize = 1, #[doc = "2: Write immediate value structure type selected."] - WRITE = 2, + Write = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STRUCTTYPE_A) -> Self { + fn from(variant: Structtype) -> Self { variant as _ } } -impl STRUCTTYPE_R { +impl crate::FieldSpec for Structtype { + type Ux = u8; +} +impl crate::IsEnum for Structtype {} +#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] +pub type StructtypeR = crate::FieldReader; +impl StructtypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(STRUCTTYPE_A::TRANSFER), - 1 => Some(STRUCTTYPE_A::SYNCHRONIZE), - 2 => Some(STRUCTTYPE_A::WRITE), + 0 => Some(Structtype::Transfer), + 1 => Some(Structtype::Synchronize), + 2 => Some(Structtype::Write), _ => None, } } - #[doc = "Checks if the value of the field is `TRANSFER`"] + #[doc = "DMA transfer structure type selected."] #[inline(always)] pub fn is_transfer(&self) -> bool { - *self == STRUCTTYPE_A::TRANSFER + *self == Structtype::Transfer } - #[doc = "Checks if the value of the field is `SYNCHRONIZE`"] + #[doc = "Synchronization structure type selected."] #[inline(always)] pub fn is_synchronize(&self) -> bool { - *self == STRUCTTYPE_A::SYNCHRONIZE + *self == Structtype::Synchronize } - #[doc = "Checks if the value of the field is `WRITE`"] + #[doc = "Write immediate value structure type selected."] #[inline(always)] pub fn is_write(&self) -> bool { - *self == STRUCTTYPE_A::WRITE + *self == Structtype::Write } } #[doc = "Field `STRUCTTYPE` writer - DMA Structure Type"] -pub type STRUCTTYPE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH4_CTRL_SPEC, u8, STRUCTTYPE_A, 2, O>; -impl<'a, const O: u8> STRUCTTYPE_W<'a, O> { +pub type StructtypeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Structtype>; +impl<'a, REG> StructtypeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "DMA transfer structure type selected."] #[inline(always)] - pub fn transfer(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::TRANSFER) + pub fn transfer(self) -> &'a mut crate::W { + self.variant(Structtype::Transfer) } #[doc = "Synchronization structure type selected."] #[inline(always)] - pub fn synchronize(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::SYNCHRONIZE) + pub fn synchronize(self) -> &'a mut crate::W { + self.variant(Structtype::Synchronize) } #[doc = "Write immediate value structure type selected."] #[inline(always)] - pub fn write(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::WRITE) + pub fn write(self) -> &'a mut crate::W { + self.variant(Structtype::Write) } } #[doc = "Field `STRUCTREQ` reader - Structure DMA Transfer Request"] -pub type STRUCTREQ_R = crate::BitReader; +pub type StructreqR = crate::BitReader; #[doc = "Field `XFERCNT` reader - DMA Unit Data Transfer Count"] -pub type XFERCNT_R = crate::FieldReader; +pub type XfercntR = crate::FieldReader; #[doc = "Field `XFERCNT` writer - DMA Unit Data Transfer Count"] -pub type XFERCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH4_CTRL_SPEC, u16, u16, 11, O>; +pub type XfercntW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `BYTESWAP` reader - Endian Byte Swap"] -pub type BYTESWAP_R = crate::BitReader; +pub type ByteswapR = crate::BitReader; #[doc = "Field `BYTESWAP` writer - Endian Byte Swap"] -pub type BYTESWAP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH4_CTRL_SPEC, bool, O>; -#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] -pub type BLOCKSIZE_R = crate::FieldReader; +pub type ByteswapW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Block Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BLOCKSIZE_A { +pub enum Blocksize { #[doc = "0: One unit transfer per arbitration"] - UNIT1 = 0, + Unit1 = 0, #[doc = "1: Two unit transfers per arbitration"] - UNIT2 = 1, + Unit2 = 1, #[doc = "2: Three unit transfers per arbitration"] - UNIT3 = 2, + Unit3 = 2, #[doc = "3: Four unit transfers per arbitration"] - UNIT4 = 3, + Unit4 = 3, #[doc = "4: Six unit transfers per arbitration"] - UNIT6 = 4, + Unit6 = 4, #[doc = "5: Eight unit transfers per arbitration"] - UNIT8 = 5, + Unit8 = 5, #[doc = "7: Sixteen unit transfers per arbitration"] - UNIT16 = 7, + Unit16 = 7, #[doc = "9: 32 unit transfers per arbitration"] - UNIT32 = 9, + Unit32 = 9, #[doc = "10: 64 unit transfers per arbitration"] - UNIT64 = 10, + Unit64 = 10, #[doc = "11: 128 unit transfers per arbitration"] - UNIT128 = 11, + Unit128 = 11, #[doc = "12: 256 unit transfers per arbitration"] - UNIT256 = 12, + Unit256 = 12, #[doc = "13: 512 unit transfers per arbitration"] - UNIT512 = 13, + Unit512 = 13, #[doc = "14: 1024 unit transfers per arbitration"] - UNIT1024 = 14, + Unit1024 = 14, #[doc = "15: Transfer all units as specified by the XFRCNT field"] - ALL = 15, + All = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BLOCKSIZE_A) -> Self { + fn from(variant: Blocksize) -> Self { variant as _ } } -impl BLOCKSIZE_R { +impl crate::FieldSpec for Blocksize { + type Ux = u8; +} +impl crate::IsEnum for Blocksize {} +#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] +pub type BlocksizeR = crate::FieldReader; +impl BlocksizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BLOCKSIZE_A::UNIT1), - 1 => Some(BLOCKSIZE_A::UNIT2), - 2 => Some(BLOCKSIZE_A::UNIT3), - 3 => Some(BLOCKSIZE_A::UNIT4), - 4 => Some(BLOCKSIZE_A::UNIT6), - 5 => Some(BLOCKSIZE_A::UNIT8), - 7 => Some(BLOCKSIZE_A::UNIT16), - 9 => Some(BLOCKSIZE_A::UNIT32), - 10 => Some(BLOCKSIZE_A::UNIT64), - 11 => Some(BLOCKSIZE_A::UNIT128), - 12 => Some(BLOCKSIZE_A::UNIT256), - 13 => Some(BLOCKSIZE_A::UNIT512), - 14 => Some(BLOCKSIZE_A::UNIT1024), - 15 => Some(BLOCKSIZE_A::ALL), + 0 => Some(Blocksize::Unit1), + 1 => Some(Blocksize::Unit2), + 2 => Some(Blocksize::Unit3), + 3 => Some(Blocksize::Unit4), + 4 => Some(Blocksize::Unit6), + 5 => Some(Blocksize::Unit8), + 7 => Some(Blocksize::Unit16), + 9 => Some(Blocksize::Unit32), + 10 => Some(Blocksize::Unit64), + 11 => Some(Blocksize::Unit128), + 12 => Some(Blocksize::Unit256), + 13 => Some(Blocksize::Unit512), + 14 => Some(Blocksize::Unit1024), + 15 => Some(Blocksize::All), _ => None, } } - #[doc = "Checks if the value of the field is `UNIT1`"] + #[doc = "One unit transfer per arbitration"] #[inline(always)] pub fn is_unit1(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1 + *self == Blocksize::Unit1 } - #[doc = "Checks if the value of the field is `UNIT2`"] + #[doc = "Two unit transfers per arbitration"] #[inline(always)] pub fn is_unit2(&self) -> bool { - *self == BLOCKSIZE_A::UNIT2 + *self == Blocksize::Unit2 } - #[doc = "Checks if the value of the field is `UNIT3`"] + #[doc = "Three unit transfers per arbitration"] #[inline(always)] pub fn is_unit3(&self) -> bool { - *self == BLOCKSIZE_A::UNIT3 + *self == Blocksize::Unit3 } - #[doc = "Checks if the value of the field is `UNIT4`"] + #[doc = "Four unit transfers per arbitration"] #[inline(always)] pub fn is_unit4(&self) -> bool { - *self == BLOCKSIZE_A::UNIT4 + *self == Blocksize::Unit4 } - #[doc = "Checks if the value of the field is `UNIT6`"] + #[doc = "Six unit transfers per arbitration"] #[inline(always)] pub fn is_unit6(&self) -> bool { - *self == BLOCKSIZE_A::UNIT6 + *self == Blocksize::Unit6 } - #[doc = "Checks if the value of the field is `UNIT8`"] + #[doc = "Eight unit transfers per arbitration"] #[inline(always)] pub fn is_unit8(&self) -> bool { - *self == BLOCKSIZE_A::UNIT8 + *self == Blocksize::Unit8 } - #[doc = "Checks if the value of the field is `UNIT16`"] + #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] pub fn is_unit16(&self) -> bool { - *self == BLOCKSIZE_A::UNIT16 + *self == Blocksize::Unit16 } - #[doc = "Checks if the value of the field is `UNIT32`"] + #[doc = "32 unit transfers per arbitration"] #[inline(always)] pub fn is_unit32(&self) -> bool { - *self == BLOCKSIZE_A::UNIT32 + *self == Blocksize::Unit32 } - #[doc = "Checks if the value of the field is `UNIT64`"] + #[doc = "64 unit transfers per arbitration"] #[inline(always)] pub fn is_unit64(&self) -> bool { - *self == BLOCKSIZE_A::UNIT64 + *self == Blocksize::Unit64 } - #[doc = "Checks if the value of the field is `UNIT128`"] + #[doc = "128 unit transfers per arbitration"] #[inline(always)] pub fn is_unit128(&self) -> bool { - *self == BLOCKSIZE_A::UNIT128 + *self == Blocksize::Unit128 } - #[doc = "Checks if the value of the field is `UNIT256`"] + #[doc = "256 unit transfers per arbitration"] #[inline(always)] pub fn is_unit256(&self) -> bool { - *self == BLOCKSIZE_A::UNIT256 + *self == Blocksize::Unit256 } - #[doc = "Checks if the value of the field is `UNIT512`"] + #[doc = "512 unit transfers per arbitration"] #[inline(always)] pub fn is_unit512(&self) -> bool { - *self == BLOCKSIZE_A::UNIT512 + *self == Blocksize::Unit512 } - #[doc = "Checks if the value of the field is `UNIT1024`"] + #[doc = "1024 unit transfers per arbitration"] #[inline(always)] pub fn is_unit1024(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1024 + *self == Blocksize::Unit1024 } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] pub fn is_all(&self) -> bool { - *self == BLOCKSIZE_A::ALL + *self == Blocksize::All } } #[doc = "Field `BLOCKSIZE` writer - Block Transfer Size"] -pub type BLOCKSIZE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH4_CTRL_SPEC, u8, BLOCKSIZE_A, 4, O>; -impl<'a, const O: u8> BLOCKSIZE_W<'a, O> { +pub type BlocksizeW<'a, REG> = crate::FieldWriter<'a, REG, 4, Blocksize>; +impl<'a, REG> BlocksizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One unit transfer per arbitration"] #[inline(always)] - pub fn unit1(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1) + pub fn unit1(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1) } #[doc = "Two unit transfers per arbitration"] #[inline(always)] - pub fn unit2(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT2) + pub fn unit2(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit2) } #[doc = "Three unit transfers per arbitration"] #[inline(always)] - pub fn unit3(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT3) + pub fn unit3(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit3) } #[doc = "Four unit transfers per arbitration"] #[inline(always)] - pub fn unit4(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT4) + pub fn unit4(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit4) } #[doc = "Six unit transfers per arbitration"] #[inline(always)] - pub fn unit6(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT6) + pub fn unit6(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit6) } #[doc = "Eight unit transfers per arbitration"] #[inline(always)] - pub fn unit8(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT8) + pub fn unit8(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit8) } #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] - pub fn unit16(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT16) + pub fn unit16(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit16) } #[doc = "32 unit transfers per arbitration"] #[inline(always)] - pub fn unit32(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT32) + pub fn unit32(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit32) } #[doc = "64 unit transfers per arbitration"] #[inline(always)] - pub fn unit64(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT64) + pub fn unit64(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit64) } #[doc = "128 unit transfers per arbitration"] #[inline(always)] - pub fn unit128(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT128) + pub fn unit128(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit128) } #[doc = "256 unit transfers per arbitration"] #[inline(always)] - pub fn unit256(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT256) + pub fn unit256(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit256) } #[doc = "512 unit transfers per arbitration"] #[inline(always)] - pub fn unit512(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT512) + pub fn unit512(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit512) } #[doc = "1024 unit transfers per arbitration"] #[inline(always)] - pub fn unit1024(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1024) + pub fn unit1024(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1024) } #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Blocksize::All) } } #[doc = "Field `DONEIEN` reader - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_R = crate::BitReader; +pub type DoneienR = crate::BitReader; #[doc = "Field `DONEIEN` writer - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH4_CTRL_SPEC, bool, O>; -#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] -pub type REQMODE_R = crate::BitReader; +pub type DoneienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "DMA Request Transfer Mode Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REQMODE_A { +pub enum Reqmode { #[doc = "0: The LDMA transfers one BLOCKSIZE per transfer request."] - BLOCK = 0, + Block = 0, #[doc = "1: One transfer request transfers all units as defined by the XFRCNT field."] - ALL = 1, + All = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REQMODE_A) -> Self { + fn from(variant: Reqmode) -> Self { variant as u8 != 0 } } -impl REQMODE_R { +#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] +pub type ReqmodeR = crate::BitReader; +impl ReqmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REQMODE_A { + pub const fn variant(&self) -> Reqmode { match self.bits { - false => REQMODE_A::BLOCK, - true => REQMODE_A::ALL, + false => Reqmode::Block, + true => Reqmode::All, } } - #[doc = "Checks if the value of the field is `BLOCK`"] + #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] pub fn is_block(&self) -> bool { - *self == REQMODE_A::BLOCK + *self == Reqmode::Block } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] pub fn is_all(&self) -> bool { - *self == REQMODE_A::ALL + *self == Reqmode::All } } #[doc = "Field `REQMODE` writer - DMA Request Transfer Mode Select"] -pub type REQMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH4_CTRL_SPEC, REQMODE_A, O>; -impl<'a, const O: u8> REQMODE_W<'a, O> { +pub type ReqmodeW<'a, REG> = crate::BitWriter<'a, REG, Reqmode>; +impl<'a, REG> ReqmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] - pub fn block(self) -> &'a mut W { - self.variant(REQMODE_A::BLOCK) + pub fn block(self) -> &'a mut crate::W { + self.variant(Reqmode::Block) } #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(REQMODE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Reqmode::All) } } #[doc = "Field `DECLOOPCNT` reader - Decrement Loop Count"] -pub type DECLOOPCNT_R = crate::BitReader; +pub type DecloopcntR = crate::BitReader; #[doc = "Field `DECLOOPCNT` writer - Decrement Loop Count"] -pub type DECLOOPCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH4_CTRL_SPEC, bool, O>; +pub type DecloopcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IGNORESREQ` reader - Ignore Sreq"] -pub type IGNORESREQ_R = crate::BitReader; +pub type IgnoresreqR = crate::BitReader; #[doc = "Field `IGNORESREQ` writer - Ignore Sreq"] -pub type IGNORESREQ_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH4_CTRL_SPEC, bool, O>; -#[doc = "Field `SRCINC` reader - Source Address Increment Size"] -pub type SRCINC_R = crate::FieldReader; +pub type IgnoresreqW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SRCINC_A { +pub enum Srcinc { #[doc = "0: Increment source address by one unit data size after each read"] - ONE = 0, + One = 0, #[doc = "1: Increment source address by two unit data sizes after each read"] - TWO = 1, + Two = 1, #[doc = "2: Increment source address by four unit data sizes after each read"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SRCINC_A) -> Self { + fn from(variant: Srcinc) -> Self { variant as _ } } -impl SRCINC_R { +impl crate::FieldSpec for Srcinc { + type Ux = u8; +} +impl crate::IsEnum for Srcinc {} +#[doc = "Field `SRCINC` reader - Source Address Increment Size"] +pub type SrcincR = crate::FieldReader; +impl SrcincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINC_A { + pub const fn variant(&self) -> Srcinc { match self.bits { - 0 => SRCINC_A::ONE, - 1 => SRCINC_A::TWO, - 2 => SRCINC_A::FOUR, - 3 => SRCINC_A::NONE, + 0 => Srcinc::One, + 1 => Srcinc::Two, + 2 => Srcinc::Four, + 3 => Srcinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == SRCINC_A::ONE + *self == Srcinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == SRCINC_A::TWO + *self == Srcinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == SRCINC_A::FOUR + *self == Srcinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SRCINC_A::NONE + *self == Srcinc::None } } #[doc = "Field `SRCINC` writer - Source Address Increment Size"] -pub type SRCINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH4_CTRL_SPEC, u8, SRCINC_A, 2, O>; -impl<'a, const O: u8> SRCINC_W<'a, O> { +pub type SrcincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Srcinc, crate::Safe>; +impl<'a, REG> SrcincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(SRCINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Srcinc::One) } #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(SRCINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Srcinc::Two) } #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(SRCINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Srcinc::Four) } #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SRCINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Srcinc::None) } } -#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] -pub type SIZE_R = crate::FieldReader; #[doc = "Unit Data Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIZE_A { +pub enum Size { #[doc = "0: Each unit transfer is a byte"] - BYTE = 0, + Byte = 0, #[doc = "1: Each unit transfer is a half-word"] - HALFWORD = 1, + Halfword = 1, #[doc = "2: Each unit transfer is a word"] - WORD = 2, + Word = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIZE_A) -> Self { + fn from(variant: Size) -> Self { variant as _ } } -impl SIZE_R { +impl crate::FieldSpec for Size { + type Ux = u8; +} +impl crate::IsEnum for Size {} +#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] +pub type SizeR = crate::FieldReader; +impl SizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIZE_A::BYTE), - 1 => Some(SIZE_A::HALFWORD), - 2 => Some(SIZE_A::WORD), + 0 => Some(Size::Byte), + 1 => Some(Size::Halfword), + 2 => Some(Size::Word), _ => None, } } - #[doc = "Checks if the value of the field is `BYTE`"] + #[doc = "Each unit transfer is a byte"] #[inline(always)] pub fn is_byte(&self) -> bool { - *self == SIZE_A::BYTE + *self == Size::Byte } - #[doc = "Checks if the value of the field is `HALFWORD`"] + #[doc = "Each unit transfer is a half-word"] #[inline(always)] pub fn is_halfword(&self) -> bool { - *self == SIZE_A::HALFWORD + *self == Size::Halfword } - #[doc = "Checks if the value of the field is `WORD`"] + #[doc = "Each unit transfer is a word"] #[inline(always)] pub fn is_word(&self) -> bool { - *self == SIZE_A::WORD + *self == Size::Word } } #[doc = "Field `SIZE` writer - Unit Data Transfer Size"] -pub type SIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH4_CTRL_SPEC, u8, SIZE_A, 2, O>; -impl<'a, const O: u8> SIZE_W<'a, O> { +pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Size>; +impl<'a, REG> SizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Each unit transfer is a byte"] #[inline(always)] - pub fn byte(self) -> &'a mut W { - self.variant(SIZE_A::BYTE) + pub fn byte(self) -> &'a mut crate::W { + self.variant(Size::Byte) } #[doc = "Each unit transfer is a half-word"] #[inline(always)] - pub fn halfword(self) -> &'a mut W { - self.variant(SIZE_A::HALFWORD) + pub fn halfword(self) -> &'a mut crate::W { + self.variant(Size::Halfword) } #[doc = "Each unit transfer is a word"] #[inline(always)] - pub fn word(self) -> &'a mut W { - self.variant(SIZE_A::WORD) + pub fn word(self) -> &'a mut crate::W { + self.variant(Size::Word) } } -#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] -pub type DSTINC_R = crate::FieldReader; #[doc = "Destination Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DSTINC_A { +pub enum Dstinc { #[doc = "0: Increment destination address by one unit data size after each write"] - ONE = 0, + One = 0, #[doc = "1: Increment destination address by two unit data sizes after each write"] - TWO = 1, + Two = 1, #[doc = "2: Increment destination address by four unit data sizes after each write"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DSTINC_A) -> Self { + fn from(variant: Dstinc) -> Self { variant as _ } } -impl DSTINC_R { +impl crate::FieldSpec for Dstinc { + type Ux = u8; +} +impl crate::IsEnum for Dstinc {} +#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] +pub type DstincR = crate::FieldReader; +impl DstincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINC_A { + pub const fn variant(&self) -> Dstinc { match self.bits { - 0 => DSTINC_A::ONE, - 1 => DSTINC_A::TWO, - 2 => DSTINC_A::FOUR, - 3 => DSTINC_A::NONE, + 0 => Dstinc::One, + 1 => Dstinc::Two, + 2 => Dstinc::Four, + 3 => Dstinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == DSTINC_A::ONE + *self == Dstinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == DSTINC_A::TWO + *self == Dstinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == DSTINC_A::FOUR + *self == Dstinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == DSTINC_A::NONE + *self == Dstinc::None } } #[doc = "Field `DSTINC` writer - Destination Address Increment Size"] -pub type DSTINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH4_CTRL_SPEC, u8, DSTINC_A, 2, O>; -impl<'a, const O: u8> DSTINC_W<'a, O> { +pub type DstincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dstinc, crate::Safe>; +impl<'a, REG> DstincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(DSTINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Dstinc::One) } #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(DSTINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Dstinc::Two) } #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(DSTINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Dstinc::Four) } #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(DSTINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Dstinc::None) } } -#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] -pub type SRCMODE_R = crate::BitReader; #[doc = "Source Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCMODE_A { +pub enum Srcmode { #[doc = "0: The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCMODE_A) -> Self { + fn from(variant: Srcmode) -> Self { variant as u8 != 0 } } -impl SRCMODE_R { +#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] +pub type SrcmodeR = crate::BitReader; +impl SrcmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCMODE_A { + pub const fn variant(&self) -> Srcmode { match self.bits { - false => SRCMODE_A::ABSOLUTE, - true => SRCMODE_A::RELATIVE, + false => Srcmode::Absolute, + true => Srcmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == SRCMODE_A::ABSOLUTE + *self == Srcmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == SRCMODE_A::RELATIVE + *self == Srcmode::Relative } } -#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] -pub type DSTMODE_R = crate::BitReader; #[doc = "Destination Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTMODE_A { +pub enum Dstmode { #[doc = "0: The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTMODE_A) -> Self { + fn from(variant: Dstmode) -> Self { variant as u8 != 0 } } -impl DSTMODE_R { +#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] +pub type DstmodeR = crate::BitReader; +impl DstmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTMODE_A { + pub const fn variant(&self) -> Dstmode { match self.bits { - false => DSTMODE_A::ABSOLUTE, - true => DSTMODE_A::RELATIVE, + false => Dstmode::Absolute, + true => Dstmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == DSTMODE_A::ABSOLUTE + *self == Dstmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == DSTMODE_A::RELATIVE + *self == Dstmode::Relative } } impl R { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] - pub fn structtype(&self) -> STRUCTTYPE_R { - STRUCTTYPE_R::new((self.bits & 3) as u8) + pub fn structtype(&self) -> StructtypeR { + StructtypeR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Structure DMA Transfer Request"] #[inline(always)] - pub fn structreq(&self) -> STRUCTREQ_R { - STRUCTREQ_R::new(((self.bits >> 3) & 1) != 0) + pub fn structreq(&self) -> StructreqR { + StructreqR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] - pub fn xfercnt(&self) -> XFERCNT_R { - XFERCNT_R::new(((self.bits >> 4) & 0x07ff) as u16) + pub fn xfercnt(&self) -> XfercntR { + XfercntR::new(((self.bits >> 4) & 0x07ff) as u16) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] - pub fn byteswap(&self) -> BYTESWAP_R { - BYTESWAP_R::new(((self.bits >> 15) & 1) != 0) + pub fn byteswap(&self) -> ByteswapR { + ByteswapR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] - pub fn blocksize(&self) -> BLOCKSIZE_R { - BLOCKSIZE_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn blocksize(&self) -> BlocksizeR { + BlocksizeR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] - pub fn doneien(&self) -> DONEIEN_R { - DONEIEN_R::new(((self.bits >> 20) & 1) != 0) + pub fn doneien(&self) -> DoneienR { + DoneienR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] - pub fn reqmode(&self) -> REQMODE_R { - REQMODE_R::new(((self.bits >> 21) & 1) != 0) + pub fn reqmode(&self) -> ReqmodeR { + ReqmodeR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] - pub fn decloopcnt(&self) -> DECLOOPCNT_R { - DECLOOPCNT_R::new(((self.bits >> 22) & 1) != 0) + pub fn decloopcnt(&self) -> DecloopcntR { + DecloopcntR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] - pub fn ignoresreq(&self) -> IGNORESREQ_R { - IGNORESREQ_R::new(((self.bits >> 23) & 1) != 0) + pub fn ignoresreq(&self) -> IgnoresreqR { + IgnoresreqR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] - pub fn srcinc(&self) -> SRCINC_R { - SRCINC_R::new(((self.bits >> 24) & 3) as u8) + pub fn srcinc(&self) -> SrcincR { + SrcincR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] - pub fn size(&self) -> SIZE_R { - SIZE_R::new(((self.bits >> 26) & 3) as u8) + pub fn size(&self) -> SizeR { + SizeR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] - pub fn dstinc(&self) -> DSTINC_R { - DSTINC_R::new(((self.bits >> 28) & 3) as u8) + pub fn dstinc(&self) -> DstincR { + DstincR::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bit 30 - Source Addressing Mode"] #[inline(always)] - pub fn srcmode(&self) -> SRCMODE_R { - SRCMODE_R::new(((self.bits >> 30) & 1) != 0) + pub fn srcmode(&self) -> SrcmodeR { + SrcmodeR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Destination Addressing Mode"] #[inline(always)] - pub fn dstmode(&self) -> DSTMODE_R { - DSTMODE_R::new(((self.bits >> 31) & 1) != 0) + pub fn dstmode(&self) -> DstmodeR { + DstmodeR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] #[must_use] - pub fn structtype(&mut self) -> STRUCTTYPE_W<0> { - STRUCTTYPE_W::new(self) + pub fn structtype(&mut self) -> StructtypeW { + StructtypeW::new(self, 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] #[must_use] - pub fn xfercnt(&mut self) -> XFERCNT_W<4> { - XFERCNT_W::new(self) + pub fn xfercnt(&mut self) -> XfercntW { + XfercntW::new(self, 4) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] #[must_use] - pub fn byteswap(&mut self) -> BYTESWAP_W<15> { - BYTESWAP_W::new(self) + pub fn byteswap(&mut self) -> ByteswapW { + ByteswapW::new(self, 15) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] #[must_use] - pub fn blocksize(&mut self) -> BLOCKSIZE_W<16> { - BLOCKSIZE_W::new(self) + pub fn blocksize(&mut self) -> BlocksizeW { + BlocksizeW::new(self, 16) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] #[must_use] - pub fn doneien(&mut self) -> DONEIEN_W<20> { - DONEIEN_W::new(self) + pub fn doneien(&mut self) -> DoneienW { + DoneienW::new(self, 20) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] #[must_use] - pub fn reqmode(&mut self) -> REQMODE_W<21> { - REQMODE_W::new(self) + pub fn reqmode(&mut self) -> ReqmodeW { + ReqmodeW::new(self, 21) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] #[must_use] - pub fn decloopcnt(&mut self) -> DECLOOPCNT_W<22> { - DECLOOPCNT_W::new(self) + pub fn decloopcnt(&mut self) -> DecloopcntW { + DecloopcntW::new(self, 22) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] #[must_use] - pub fn ignoresreq(&mut self) -> IGNORESREQ_W<23> { - IGNORESREQ_W::new(self) + pub fn ignoresreq(&mut self) -> IgnoresreqW { + IgnoresreqW::new(self, 23) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] #[must_use] - pub fn srcinc(&mut self) -> SRCINC_W<24> { - SRCINC_W::new(self) + pub fn srcinc(&mut self) -> SrcincW { + SrcincW::new(self, 24) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SIZE_W<26> { - SIZE_W::new(self) + pub fn size(&mut self) -> SizeW { + SizeW::new(self, 26) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] #[must_use] - pub fn dstinc(&mut self) -> DSTINC_W<28> { - DSTINC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstinc(&mut self) -> DstincW { + DstincW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch4_ctrl](index.html) module"] -pub struct CH4_CTRL_SPEC; -impl crate::RegisterSpec for CH4_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch4CtrlSpec; +impl crate::RegisterSpec for Ch4CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch4_ctrl::R](R) reader structure"] -impl crate::Readable for CH4_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch4_ctrl::W](W) writer structure"] -impl crate::Writable for CH4_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch4_ctrl::R`](R) reader structure"] +impl crate::Readable for Ch4CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ch4_ctrl::W`](W) writer structure"] +impl crate::Writable for Ch4CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH4_CTRL to value 0"] -impl crate::Resettable for CH4_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch4CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch4_dst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch4_dst.rs index ea1b8a8..e0a46cf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch4_dst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch4_dst.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH4_DST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH4_DST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DSTADDR` reader - Destination Data Address"] -pub type DSTADDR_R = crate::FieldReader; +pub type DstaddrR = crate::FieldReader; #[doc = "Field `DSTADDR` writer - Destination Data Address"] -pub type DSTADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH4_DST_SPEC, u32, u32, 32, O>; +pub type DstaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] - pub fn dstaddr(&self) -> DSTADDR_R { - DSTADDR_R::new(self.bits) + pub fn dstaddr(&self) -> DstaddrR { + DstaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] #[must_use] - pub fn dstaddr(&mut self) -> DSTADDR_W<0> { - DSTADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstaddr(&mut self) -> DstaddrW { + DstaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch4_dst](index.html) module"] -pub struct CH4_DST_SPEC; -impl crate::RegisterSpec for CH4_DST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_dst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_dst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch4DstSpec; +impl crate::RegisterSpec for Ch4DstSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch4_dst::R](R) reader structure"] -impl crate::Readable for CH4_DST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch4_dst::W](W) writer structure"] -impl crate::Writable for CH4_DST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch4_dst::R`](R) reader structure"] +impl crate::Readable for Ch4DstSpec {} +#[doc = "`write(|w| ..)` method takes [`ch4_dst::W`](W) writer structure"] +impl crate::Writable for Ch4DstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH4_DST to value 0"] -impl crate::Resettable for CH4_DST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch4DstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch4_link.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch4_link.rs index 0cbb3a0..5283b43 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch4_link.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch4_link.rs @@ -1,136 +1,96 @@ #[doc = "Register `CH4_LINK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH4_LINK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] -pub type LINKMODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Link Structure Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LINKMODE_A { +pub enum Linkmode { #[doc = "0: The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LINKMODE_A) -> Self { + fn from(variant: Linkmode) -> Self { variant as u8 != 0 } } -impl LINKMODE_R { +#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] +pub type LinkmodeR = crate::BitReader; +impl LinkmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LINKMODE_A { + pub const fn variant(&self) -> Linkmode { match self.bits { - false => LINKMODE_A::ABSOLUTE, - true => LINKMODE_A::RELATIVE, + false => Linkmode::Absolute, + true => Linkmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == LINKMODE_A::ABSOLUTE + *self == Linkmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == LINKMODE_A::RELATIVE + *self == Linkmode::Relative } } #[doc = "Field `LINK` reader - Link Next Structure"] -pub type LINK_R = crate::BitReader; +pub type LinkR = crate::BitReader; #[doc = "Field `LINK` writer - Link Next Structure"] -pub type LINK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH4_LINK_SPEC, bool, O>; +pub type LinkW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LINKADDR` reader - Link Structure Address"] -pub type LINKADDR_R = crate::FieldReader; +pub type LinkaddrR = crate::FieldReader; #[doc = "Field `LINKADDR` writer - Link Structure Address"] -pub type LINKADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH4_LINK_SPEC, u32, u32, 30, O>; +pub type LinkaddrW<'a, REG> = crate::FieldWriter<'a, REG, 30, u32>; impl R { #[doc = "Bit 0 - Link Structure Addressing Mode"] #[inline(always)] - pub fn linkmode(&self) -> LINKMODE_R { - LINKMODE_R::new((self.bits & 1) != 0) + pub fn linkmode(&self) -> LinkmodeR { + LinkmodeR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] - pub fn link(&self) -> LINK_R { - LINK_R::new(((self.bits >> 1) & 1) != 0) + pub fn link(&self) -> LinkR { + LinkR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] - pub fn linkaddr(&self) -> LINKADDR_R { - LINKADDR_R::new((self.bits >> 2) & 0x3fff_ffff) + pub fn linkaddr(&self) -> LinkaddrR { + LinkaddrR::new((self.bits >> 2) & 0x3fff_ffff) } } impl W { #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] #[must_use] - pub fn link(&mut self) -> LINK_W<1> { - LINK_W::new(self) + pub fn link(&mut self) -> LinkW { + LinkW::new(self, 1) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] #[must_use] - pub fn linkaddr(&mut self) -> LINKADDR_W<2> { - LINKADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn linkaddr(&mut self) -> LinkaddrW { + LinkaddrW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch4_link](index.html) module"] -pub struct CH4_LINK_SPEC; -impl crate::RegisterSpec for CH4_LINK_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_link::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_link::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch4LinkSpec; +impl crate::RegisterSpec for Ch4LinkSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch4_link::R](R) reader structure"] -impl crate::Readable for CH4_LINK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch4_link::W](W) writer structure"] -impl crate::Writable for CH4_LINK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch4_link::R`](R) reader structure"] +impl crate::Readable for Ch4LinkSpec {} +#[doc = "`write(|w| ..)` method takes [`ch4_link::W`](W) writer structure"] +impl crate::Writable for Ch4LinkSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH4_LINK to value 0"] -impl crate::Resettable for CH4_LINK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch4LinkSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch4_loop.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch4_loop.rs index 39f4b34..d9368a2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch4_loop.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch4_loop.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH4_LOOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH4_LOOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOOPCNT` reader - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_R = crate::FieldReader; +pub type LoopcntR = crate::FieldReader; #[doc = "Field `LOOPCNT` writer - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH4_LOOP_SPEC, u8, u8, 8, O>; +pub type LoopcntW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] - pub fn loopcnt(&self) -> LOOPCNT_R { - LOOPCNT_R::new((self.bits & 0xff) as u8) + pub fn loopcnt(&self) -> LoopcntR { + LoopcntR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] #[must_use] - pub fn loopcnt(&mut self) -> LOOPCNT_W<0> { - LOOPCNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn loopcnt(&mut self) -> LoopcntW { + LoopcntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch4_loop](index.html) module"] -pub struct CH4_LOOP_SPEC; -impl crate::RegisterSpec for CH4_LOOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_loop::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_loop::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch4LoopSpec; +impl crate::RegisterSpec for Ch4LoopSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch4_loop::R](R) reader structure"] -impl crate::Readable for CH4_LOOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch4_loop::W](W) writer structure"] -impl crate::Writable for CH4_LOOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch4_loop::R`](R) reader structure"] +impl crate::Readable for Ch4LoopSpec {} +#[doc = "`write(|w| ..)` method takes [`ch4_loop::W`](W) writer structure"] +impl crate::Writable for Ch4LoopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH4_LOOP to value 0"] -impl crate::Resettable for CH4_LOOP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch4LoopSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch4_src.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch4_src.rs index c9fddb1..a805e0f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch4_src.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch4_src.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH4_SRC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH4_SRC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SRCADDR` reader - Source Data Address"] -pub type SRCADDR_R = crate::FieldReader; +pub type SrcaddrR = crate::FieldReader; #[doc = "Field `SRCADDR` writer - Source Data Address"] -pub type SRCADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH4_SRC_SPEC, u32, u32, 32, O>; +pub type SrcaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] - pub fn srcaddr(&self) -> SRCADDR_R { - SRCADDR_R::new(self.bits) + pub fn srcaddr(&self) -> SrcaddrR { + SrcaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] #[must_use] - pub fn srcaddr(&mut self) -> SRCADDR_W<0> { - SRCADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn srcaddr(&mut self) -> SrcaddrW { + SrcaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch4_src](index.html) module"] -pub struct CH4_SRC_SPEC; -impl crate::RegisterSpec for CH4_SRC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_src::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_src::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch4SrcSpec; +impl crate::RegisterSpec for Ch4SrcSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch4_src::R](R) reader structure"] -impl crate::Readable for CH4_SRC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch4_src::W](W) writer structure"] -impl crate::Writable for CH4_SRC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch4_src::R`](R) reader structure"] +impl crate::Readable for Ch4SrcSpec {} +#[doc = "`write(|w| ..)` method takes [`ch4_src::W`](W) writer structure"] +impl crate::Writable for Ch4SrcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH4_SRC to value 0"] -impl crate::Resettable for CH4_SRC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch4SrcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch5_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch5_cfg.rs index e8836be..0873c61 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch5_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch5_cfg.rs @@ -1,277 +1,250 @@ #[doc = "Register `CH5_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH5_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] -pub type ARBSLOTS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Arbitration Slot Number Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ARBSLOTS_A { +pub enum Arbslots { #[doc = "0: One arbitration slot selected"] - ONE = 0, + One = 0, #[doc = "1: Two arbitration slots selected"] - TWO = 1, + Two = 1, #[doc = "2: Four arbitration slots selected"] - FOUR = 2, + Four = 2, #[doc = "3: Eight arbitration slots selected"] - EIGHT = 3, + Eight = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ARBSLOTS_A) -> Self { + fn from(variant: Arbslots) -> Self { variant as _ } } -impl ARBSLOTS_R { +impl crate::FieldSpec for Arbslots { + type Ux = u8; +} +impl crate::IsEnum for Arbslots {} +#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] +pub type ArbslotsR = crate::FieldReader; +impl ArbslotsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ARBSLOTS_A { + pub const fn variant(&self) -> Arbslots { match self.bits { - 0 => ARBSLOTS_A::ONE, - 1 => ARBSLOTS_A::TWO, - 2 => ARBSLOTS_A::FOUR, - 3 => ARBSLOTS_A::EIGHT, + 0 => Arbslots::One, + 1 => Arbslots::Two, + 2 => Arbslots::Four, + 3 => Arbslots::Eight, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "One arbitration slot selected"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == ARBSLOTS_A::ONE + *self == Arbslots::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Two arbitration slots selected"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == ARBSLOTS_A::TWO + *self == Arbslots::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Four arbitration slots selected"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == ARBSLOTS_A::FOUR + *self == Arbslots::Four } - #[doc = "Checks if the value of the field is `EIGHT`"] + #[doc = "Eight arbitration slots selected"] #[inline(always)] pub fn is_eight(&self) -> bool { - *self == ARBSLOTS_A::EIGHT + *self == Arbslots::Eight } } #[doc = "Field `ARBSLOTS` writer - Arbitration Slot Number Select"] -pub type ARBSLOTS_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH5_CFG_SPEC, u8, ARBSLOTS_A, 2, O>; -impl<'a, const O: u8> ARBSLOTS_W<'a, O> { +pub type ArbslotsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Arbslots, crate::Safe>; +impl<'a, REG> ArbslotsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One arbitration slot selected"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(ARBSLOTS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Arbslots::One) } #[doc = "Two arbitration slots selected"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(ARBSLOTS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Arbslots::Two) } #[doc = "Four arbitration slots selected"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(ARBSLOTS_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Arbslots::Four) } #[doc = "Eight arbitration slots selected"] #[inline(always)] - pub fn eight(self) -> &'a mut W { - self.variant(ARBSLOTS_A::EIGHT) + pub fn eight(self) -> &'a mut crate::W { + self.variant(Arbslots::Eight) } } -#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] -pub type SRCINCSIGN_R = crate::BitReader; #[doc = "Source Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCINCSIGN_A { +pub enum Srcincsign { #[doc = "0: Increment source address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement source address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCINCSIGN_A) -> Self { + fn from(variant: Srcincsign) -> Self { variant as u8 != 0 } } -impl SRCINCSIGN_R { +#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] +pub type SrcincsignR = crate::BitReader; +impl SrcincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINCSIGN_A { + pub const fn variant(&self) -> Srcincsign { match self.bits { - false => SRCINCSIGN_A::POSITIVE, - true => SRCINCSIGN_A::NEGATIVE, + false => Srcincsign::Positive, + true => Srcincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment source address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == SRCINCSIGN_A::POSITIVE + *self == Srcincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement source address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == SRCINCSIGN_A::NEGATIVE + *self == Srcincsign::Negative } } #[doc = "Field `SRCINCSIGN` writer - Source Address Increment Sign"] -pub type SRCINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH5_CFG_SPEC, SRCINCSIGN_A, O>; -impl<'a, const O: u8> SRCINCSIGN_W<'a, O> { +pub type SrcincsignW<'a, REG> = crate::BitWriter<'a, REG, Srcincsign>; +impl<'a, REG> SrcincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment source address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Srcincsign::Positive) } #[doc = "Decrement source address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Srcincsign::Negative) } } -#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] -pub type DSTINCSIGN_R = crate::BitReader; #[doc = "Destination Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTINCSIGN_A { +pub enum Dstincsign { #[doc = "0: Increment destination address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement destination address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTINCSIGN_A) -> Self { + fn from(variant: Dstincsign) -> Self { variant as u8 != 0 } } -impl DSTINCSIGN_R { +#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] +pub type DstincsignR = crate::BitReader; +impl DstincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINCSIGN_A { + pub const fn variant(&self) -> Dstincsign { match self.bits { - false => DSTINCSIGN_A::POSITIVE, - true => DSTINCSIGN_A::NEGATIVE, + false => Dstincsign::Positive, + true => Dstincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment destination address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == DSTINCSIGN_A::POSITIVE + *self == Dstincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement destination address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == DSTINCSIGN_A::NEGATIVE + *self == Dstincsign::Negative } } #[doc = "Field `DSTINCSIGN` writer - Destination Address Increment Sign"] -pub type DSTINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH5_CFG_SPEC, DSTINCSIGN_A, O>; -impl<'a, const O: u8> DSTINCSIGN_W<'a, O> { +pub type DstincsignW<'a, REG> = crate::BitWriter<'a, REG, Dstincsign>; +impl<'a, REG> DstincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment destination address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Dstincsign::Positive) } #[doc = "Decrement destination address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Dstincsign::Negative) } } impl R { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] - pub fn arbslots(&self) -> ARBSLOTS_R { - ARBSLOTS_R::new(((self.bits >> 16) & 3) as u8) + pub fn arbslots(&self) -> ArbslotsR { + ArbslotsR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] - pub fn srcincsign(&self) -> SRCINCSIGN_R { - SRCINCSIGN_R::new(((self.bits >> 20) & 1) != 0) + pub fn srcincsign(&self) -> SrcincsignR { + SrcincsignR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] - pub fn dstincsign(&self) -> DSTINCSIGN_R { - DSTINCSIGN_R::new(((self.bits >> 21) & 1) != 0) + pub fn dstincsign(&self) -> DstincsignR { + DstincsignR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] #[must_use] - pub fn arbslots(&mut self) -> ARBSLOTS_W<16> { - ARBSLOTS_W::new(self) + pub fn arbslots(&mut self) -> ArbslotsW { + ArbslotsW::new(self, 16) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] #[must_use] - pub fn srcincsign(&mut self) -> SRCINCSIGN_W<20> { - SRCINCSIGN_W::new(self) + pub fn srcincsign(&mut self) -> SrcincsignW { + SrcincsignW::new(self, 20) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] #[must_use] - pub fn dstincsign(&mut self) -> DSTINCSIGN_W<21> { - DSTINCSIGN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstincsign(&mut self) -> DstincsignW { + DstincsignW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch5_cfg](index.html) module"] -pub struct CH5_CFG_SPEC; -impl crate::RegisterSpec for CH5_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch5CfgSpec; +impl crate::RegisterSpec for Ch5CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch5_cfg::R](R) reader structure"] -impl crate::Readable for CH5_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch5_cfg::W](W) writer structure"] -impl crate::Writable for CH5_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch5_cfg::R`](R) reader structure"] +impl crate::Readable for Ch5CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`ch5_cfg::W`](W) writer structure"] +impl crate::Writable for Ch5CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH5_CFG to value 0"] -impl crate::Resettable for CH5_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch5CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch5_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch5_ctrl.rs index ac51bd3..e124f3d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch5_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch5_ctrl.rs @@ -1,843 +1,842 @@ #[doc = "Register `CH5_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH5_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] -pub type STRUCTTYPE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DMA Structure Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STRUCTTYPE_A { +pub enum Structtype { #[doc = "0: DMA transfer structure type selected."] - TRANSFER = 0, + Transfer = 0, #[doc = "1: Synchronization structure type selected."] - SYNCHRONIZE = 1, + Synchronize = 1, #[doc = "2: Write immediate value structure type selected."] - WRITE = 2, + Write = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STRUCTTYPE_A) -> Self { + fn from(variant: Structtype) -> Self { variant as _ } } -impl STRUCTTYPE_R { +impl crate::FieldSpec for Structtype { + type Ux = u8; +} +impl crate::IsEnum for Structtype {} +#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] +pub type StructtypeR = crate::FieldReader; +impl StructtypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(STRUCTTYPE_A::TRANSFER), - 1 => Some(STRUCTTYPE_A::SYNCHRONIZE), - 2 => Some(STRUCTTYPE_A::WRITE), + 0 => Some(Structtype::Transfer), + 1 => Some(Structtype::Synchronize), + 2 => Some(Structtype::Write), _ => None, } } - #[doc = "Checks if the value of the field is `TRANSFER`"] + #[doc = "DMA transfer structure type selected."] #[inline(always)] pub fn is_transfer(&self) -> bool { - *self == STRUCTTYPE_A::TRANSFER + *self == Structtype::Transfer } - #[doc = "Checks if the value of the field is `SYNCHRONIZE`"] + #[doc = "Synchronization structure type selected."] #[inline(always)] pub fn is_synchronize(&self) -> bool { - *self == STRUCTTYPE_A::SYNCHRONIZE + *self == Structtype::Synchronize } - #[doc = "Checks if the value of the field is `WRITE`"] + #[doc = "Write immediate value structure type selected."] #[inline(always)] pub fn is_write(&self) -> bool { - *self == STRUCTTYPE_A::WRITE + *self == Structtype::Write } } #[doc = "Field `STRUCTTYPE` writer - DMA Structure Type"] -pub type STRUCTTYPE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH5_CTRL_SPEC, u8, STRUCTTYPE_A, 2, O>; -impl<'a, const O: u8> STRUCTTYPE_W<'a, O> { +pub type StructtypeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Structtype>; +impl<'a, REG> StructtypeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "DMA transfer structure type selected."] #[inline(always)] - pub fn transfer(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::TRANSFER) + pub fn transfer(self) -> &'a mut crate::W { + self.variant(Structtype::Transfer) } #[doc = "Synchronization structure type selected."] #[inline(always)] - pub fn synchronize(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::SYNCHRONIZE) + pub fn synchronize(self) -> &'a mut crate::W { + self.variant(Structtype::Synchronize) } #[doc = "Write immediate value structure type selected."] #[inline(always)] - pub fn write(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::WRITE) + pub fn write(self) -> &'a mut crate::W { + self.variant(Structtype::Write) } } #[doc = "Field `STRUCTREQ` reader - Structure DMA Transfer Request"] -pub type STRUCTREQ_R = crate::BitReader; +pub type StructreqR = crate::BitReader; #[doc = "Field `XFERCNT` reader - DMA Unit Data Transfer Count"] -pub type XFERCNT_R = crate::FieldReader; +pub type XfercntR = crate::FieldReader; #[doc = "Field `XFERCNT` writer - DMA Unit Data Transfer Count"] -pub type XFERCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH5_CTRL_SPEC, u16, u16, 11, O>; +pub type XfercntW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `BYTESWAP` reader - Endian Byte Swap"] -pub type BYTESWAP_R = crate::BitReader; +pub type ByteswapR = crate::BitReader; #[doc = "Field `BYTESWAP` writer - Endian Byte Swap"] -pub type BYTESWAP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH5_CTRL_SPEC, bool, O>; -#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] -pub type BLOCKSIZE_R = crate::FieldReader; +pub type ByteswapW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Block Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BLOCKSIZE_A { +pub enum Blocksize { #[doc = "0: One unit transfer per arbitration"] - UNIT1 = 0, + Unit1 = 0, #[doc = "1: Two unit transfers per arbitration"] - UNIT2 = 1, + Unit2 = 1, #[doc = "2: Three unit transfers per arbitration"] - UNIT3 = 2, + Unit3 = 2, #[doc = "3: Four unit transfers per arbitration"] - UNIT4 = 3, + Unit4 = 3, #[doc = "4: Six unit transfers per arbitration"] - UNIT6 = 4, + Unit6 = 4, #[doc = "5: Eight unit transfers per arbitration"] - UNIT8 = 5, + Unit8 = 5, #[doc = "7: Sixteen unit transfers per arbitration"] - UNIT16 = 7, + Unit16 = 7, #[doc = "9: 32 unit transfers per arbitration"] - UNIT32 = 9, + Unit32 = 9, #[doc = "10: 64 unit transfers per arbitration"] - UNIT64 = 10, + Unit64 = 10, #[doc = "11: 128 unit transfers per arbitration"] - UNIT128 = 11, + Unit128 = 11, #[doc = "12: 256 unit transfers per arbitration"] - UNIT256 = 12, + Unit256 = 12, #[doc = "13: 512 unit transfers per arbitration"] - UNIT512 = 13, + Unit512 = 13, #[doc = "14: 1024 unit transfers per arbitration"] - UNIT1024 = 14, + Unit1024 = 14, #[doc = "15: Transfer all units as specified by the XFRCNT field"] - ALL = 15, + All = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BLOCKSIZE_A) -> Self { + fn from(variant: Blocksize) -> Self { variant as _ } } -impl BLOCKSIZE_R { +impl crate::FieldSpec for Blocksize { + type Ux = u8; +} +impl crate::IsEnum for Blocksize {} +#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] +pub type BlocksizeR = crate::FieldReader; +impl BlocksizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BLOCKSIZE_A::UNIT1), - 1 => Some(BLOCKSIZE_A::UNIT2), - 2 => Some(BLOCKSIZE_A::UNIT3), - 3 => Some(BLOCKSIZE_A::UNIT4), - 4 => Some(BLOCKSIZE_A::UNIT6), - 5 => Some(BLOCKSIZE_A::UNIT8), - 7 => Some(BLOCKSIZE_A::UNIT16), - 9 => Some(BLOCKSIZE_A::UNIT32), - 10 => Some(BLOCKSIZE_A::UNIT64), - 11 => Some(BLOCKSIZE_A::UNIT128), - 12 => Some(BLOCKSIZE_A::UNIT256), - 13 => Some(BLOCKSIZE_A::UNIT512), - 14 => Some(BLOCKSIZE_A::UNIT1024), - 15 => Some(BLOCKSIZE_A::ALL), + 0 => Some(Blocksize::Unit1), + 1 => Some(Blocksize::Unit2), + 2 => Some(Blocksize::Unit3), + 3 => Some(Blocksize::Unit4), + 4 => Some(Blocksize::Unit6), + 5 => Some(Blocksize::Unit8), + 7 => Some(Blocksize::Unit16), + 9 => Some(Blocksize::Unit32), + 10 => Some(Blocksize::Unit64), + 11 => Some(Blocksize::Unit128), + 12 => Some(Blocksize::Unit256), + 13 => Some(Blocksize::Unit512), + 14 => Some(Blocksize::Unit1024), + 15 => Some(Blocksize::All), _ => None, } } - #[doc = "Checks if the value of the field is `UNIT1`"] + #[doc = "One unit transfer per arbitration"] #[inline(always)] pub fn is_unit1(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1 + *self == Blocksize::Unit1 } - #[doc = "Checks if the value of the field is `UNIT2`"] + #[doc = "Two unit transfers per arbitration"] #[inline(always)] pub fn is_unit2(&self) -> bool { - *self == BLOCKSIZE_A::UNIT2 + *self == Blocksize::Unit2 } - #[doc = "Checks if the value of the field is `UNIT3`"] + #[doc = "Three unit transfers per arbitration"] #[inline(always)] pub fn is_unit3(&self) -> bool { - *self == BLOCKSIZE_A::UNIT3 + *self == Blocksize::Unit3 } - #[doc = "Checks if the value of the field is `UNIT4`"] + #[doc = "Four unit transfers per arbitration"] #[inline(always)] pub fn is_unit4(&self) -> bool { - *self == BLOCKSIZE_A::UNIT4 + *self == Blocksize::Unit4 } - #[doc = "Checks if the value of the field is `UNIT6`"] + #[doc = "Six unit transfers per arbitration"] #[inline(always)] pub fn is_unit6(&self) -> bool { - *self == BLOCKSIZE_A::UNIT6 + *self == Blocksize::Unit6 } - #[doc = "Checks if the value of the field is `UNIT8`"] + #[doc = "Eight unit transfers per arbitration"] #[inline(always)] pub fn is_unit8(&self) -> bool { - *self == BLOCKSIZE_A::UNIT8 + *self == Blocksize::Unit8 } - #[doc = "Checks if the value of the field is `UNIT16`"] + #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] pub fn is_unit16(&self) -> bool { - *self == BLOCKSIZE_A::UNIT16 + *self == Blocksize::Unit16 } - #[doc = "Checks if the value of the field is `UNIT32`"] + #[doc = "32 unit transfers per arbitration"] #[inline(always)] pub fn is_unit32(&self) -> bool { - *self == BLOCKSIZE_A::UNIT32 + *self == Blocksize::Unit32 } - #[doc = "Checks if the value of the field is `UNIT64`"] + #[doc = "64 unit transfers per arbitration"] #[inline(always)] pub fn is_unit64(&self) -> bool { - *self == BLOCKSIZE_A::UNIT64 + *self == Blocksize::Unit64 } - #[doc = "Checks if the value of the field is `UNIT128`"] + #[doc = "128 unit transfers per arbitration"] #[inline(always)] pub fn is_unit128(&self) -> bool { - *self == BLOCKSIZE_A::UNIT128 + *self == Blocksize::Unit128 } - #[doc = "Checks if the value of the field is `UNIT256`"] + #[doc = "256 unit transfers per arbitration"] #[inline(always)] pub fn is_unit256(&self) -> bool { - *self == BLOCKSIZE_A::UNIT256 + *self == Blocksize::Unit256 } - #[doc = "Checks if the value of the field is `UNIT512`"] + #[doc = "512 unit transfers per arbitration"] #[inline(always)] pub fn is_unit512(&self) -> bool { - *self == BLOCKSIZE_A::UNIT512 + *self == Blocksize::Unit512 } - #[doc = "Checks if the value of the field is `UNIT1024`"] + #[doc = "1024 unit transfers per arbitration"] #[inline(always)] pub fn is_unit1024(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1024 + *self == Blocksize::Unit1024 } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] pub fn is_all(&self) -> bool { - *self == BLOCKSIZE_A::ALL + *self == Blocksize::All } } #[doc = "Field `BLOCKSIZE` writer - Block Transfer Size"] -pub type BLOCKSIZE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH5_CTRL_SPEC, u8, BLOCKSIZE_A, 4, O>; -impl<'a, const O: u8> BLOCKSIZE_W<'a, O> { +pub type BlocksizeW<'a, REG> = crate::FieldWriter<'a, REG, 4, Blocksize>; +impl<'a, REG> BlocksizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One unit transfer per arbitration"] #[inline(always)] - pub fn unit1(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1) + pub fn unit1(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1) } #[doc = "Two unit transfers per arbitration"] #[inline(always)] - pub fn unit2(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT2) + pub fn unit2(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit2) } #[doc = "Three unit transfers per arbitration"] #[inline(always)] - pub fn unit3(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT3) + pub fn unit3(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit3) } #[doc = "Four unit transfers per arbitration"] #[inline(always)] - pub fn unit4(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT4) + pub fn unit4(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit4) } #[doc = "Six unit transfers per arbitration"] #[inline(always)] - pub fn unit6(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT6) + pub fn unit6(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit6) } #[doc = "Eight unit transfers per arbitration"] #[inline(always)] - pub fn unit8(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT8) + pub fn unit8(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit8) } #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] - pub fn unit16(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT16) + pub fn unit16(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit16) } #[doc = "32 unit transfers per arbitration"] #[inline(always)] - pub fn unit32(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT32) + pub fn unit32(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit32) } #[doc = "64 unit transfers per arbitration"] #[inline(always)] - pub fn unit64(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT64) + pub fn unit64(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit64) } #[doc = "128 unit transfers per arbitration"] #[inline(always)] - pub fn unit128(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT128) + pub fn unit128(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit128) } #[doc = "256 unit transfers per arbitration"] #[inline(always)] - pub fn unit256(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT256) + pub fn unit256(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit256) } #[doc = "512 unit transfers per arbitration"] #[inline(always)] - pub fn unit512(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT512) + pub fn unit512(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit512) } #[doc = "1024 unit transfers per arbitration"] #[inline(always)] - pub fn unit1024(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1024) + pub fn unit1024(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1024) } #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Blocksize::All) } } #[doc = "Field `DONEIEN` reader - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_R = crate::BitReader; +pub type DoneienR = crate::BitReader; #[doc = "Field `DONEIEN` writer - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH5_CTRL_SPEC, bool, O>; -#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] -pub type REQMODE_R = crate::BitReader; +pub type DoneienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "DMA Request Transfer Mode Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REQMODE_A { +pub enum Reqmode { #[doc = "0: The LDMA transfers one BLOCKSIZE per transfer request."] - BLOCK = 0, + Block = 0, #[doc = "1: One transfer request transfers all units as defined by the XFRCNT field."] - ALL = 1, + All = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REQMODE_A) -> Self { + fn from(variant: Reqmode) -> Self { variant as u8 != 0 } } -impl REQMODE_R { +#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] +pub type ReqmodeR = crate::BitReader; +impl ReqmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REQMODE_A { + pub const fn variant(&self) -> Reqmode { match self.bits { - false => REQMODE_A::BLOCK, - true => REQMODE_A::ALL, + false => Reqmode::Block, + true => Reqmode::All, } } - #[doc = "Checks if the value of the field is `BLOCK`"] + #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] pub fn is_block(&self) -> bool { - *self == REQMODE_A::BLOCK + *self == Reqmode::Block } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] pub fn is_all(&self) -> bool { - *self == REQMODE_A::ALL + *self == Reqmode::All } } #[doc = "Field `REQMODE` writer - DMA Request Transfer Mode Select"] -pub type REQMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH5_CTRL_SPEC, REQMODE_A, O>; -impl<'a, const O: u8> REQMODE_W<'a, O> { +pub type ReqmodeW<'a, REG> = crate::BitWriter<'a, REG, Reqmode>; +impl<'a, REG> ReqmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] - pub fn block(self) -> &'a mut W { - self.variant(REQMODE_A::BLOCK) + pub fn block(self) -> &'a mut crate::W { + self.variant(Reqmode::Block) } #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(REQMODE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Reqmode::All) } } #[doc = "Field `DECLOOPCNT` reader - Decrement Loop Count"] -pub type DECLOOPCNT_R = crate::BitReader; +pub type DecloopcntR = crate::BitReader; #[doc = "Field `DECLOOPCNT` writer - Decrement Loop Count"] -pub type DECLOOPCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH5_CTRL_SPEC, bool, O>; +pub type DecloopcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IGNORESREQ` reader - Ignore Sreq"] -pub type IGNORESREQ_R = crate::BitReader; +pub type IgnoresreqR = crate::BitReader; #[doc = "Field `IGNORESREQ` writer - Ignore Sreq"] -pub type IGNORESREQ_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH5_CTRL_SPEC, bool, O>; -#[doc = "Field `SRCINC` reader - Source Address Increment Size"] -pub type SRCINC_R = crate::FieldReader; +pub type IgnoresreqW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SRCINC_A { +pub enum Srcinc { #[doc = "0: Increment source address by one unit data size after each read"] - ONE = 0, + One = 0, #[doc = "1: Increment source address by two unit data sizes after each read"] - TWO = 1, + Two = 1, #[doc = "2: Increment source address by four unit data sizes after each read"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SRCINC_A) -> Self { + fn from(variant: Srcinc) -> Self { variant as _ } } -impl SRCINC_R { +impl crate::FieldSpec for Srcinc { + type Ux = u8; +} +impl crate::IsEnum for Srcinc {} +#[doc = "Field `SRCINC` reader - Source Address Increment Size"] +pub type SrcincR = crate::FieldReader; +impl SrcincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINC_A { + pub const fn variant(&self) -> Srcinc { match self.bits { - 0 => SRCINC_A::ONE, - 1 => SRCINC_A::TWO, - 2 => SRCINC_A::FOUR, - 3 => SRCINC_A::NONE, + 0 => Srcinc::One, + 1 => Srcinc::Two, + 2 => Srcinc::Four, + 3 => Srcinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == SRCINC_A::ONE + *self == Srcinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == SRCINC_A::TWO + *self == Srcinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == SRCINC_A::FOUR + *self == Srcinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SRCINC_A::NONE + *self == Srcinc::None } } #[doc = "Field `SRCINC` writer - Source Address Increment Size"] -pub type SRCINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH5_CTRL_SPEC, u8, SRCINC_A, 2, O>; -impl<'a, const O: u8> SRCINC_W<'a, O> { +pub type SrcincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Srcinc, crate::Safe>; +impl<'a, REG> SrcincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(SRCINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Srcinc::One) } #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(SRCINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Srcinc::Two) } #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(SRCINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Srcinc::Four) } #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SRCINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Srcinc::None) } } -#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] -pub type SIZE_R = crate::FieldReader; #[doc = "Unit Data Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIZE_A { +pub enum Size { #[doc = "0: Each unit transfer is a byte"] - BYTE = 0, + Byte = 0, #[doc = "1: Each unit transfer is a half-word"] - HALFWORD = 1, + Halfword = 1, #[doc = "2: Each unit transfer is a word"] - WORD = 2, + Word = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIZE_A) -> Self { + fn from(variant: Size) -> Self { variant as _ } } -impl SIZE_R { +impl crate::FieldSpec for Size { + type Ux = u8; +} +impl crate::IsEnum for Size {} +#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] +pub type SizeR = crate::FieldReader; +impl SizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIZE_A::BYTE), - 1 => Some(SIZE_A::HALFWORD), - 2 => Some(SIZE_A::WORD), + 0 => Some(Size::Byte), + 1 => Some(Size::Halfword), + 2 => Some(Size::Word), _ => None, } } - #[doc = "Checks if the value of the field is `BYTE`"] + #[doc = "Each unit transfer is a byte"] #[inline(always)] pub fn is_byte(&self) -> bool { - *self == SIZE_A::BYTE + *self == Size::Byte } - #[doc = "Checks if the value of the field is `HALFWORD`"] + #[doc = "Each unit transfer is a half-word"] #[inline(always)] pub fn is_halfword(&self) -> bool { - *self == SIZE_A::HALFWORD + *self == Size::Halfword } - #[doc = "Checks if the value of the field is `WORD`"] + #[doc = "Each unit transfer is a word"] #[inline(always)] pub fn is_word(&self) -> bool { - *self == SIZE_A::WORD + *self == Size::Word } } #[doc = "Field `SIZE` writer - Unit Data Transfer Size"] -pub type SIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH5_CTRL_SPEC, u8, SIZE_A, 2, O>; -impl<'a, const O: u8> SIZE_W<'a, O> { +pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Size>; +impl<'a, REG> SizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Each unit transfer is a byte"] #[inline(always)] - pub fn byte(self) -> &'a mut W { - self.variant(SIZE_A::BYTE) + pub fn byte(self) -> &'a mut crate::W { + self.variant(Size::Byte) } #[doc = "Each unit transfer is a half-word"] #[inline(always)] - pub fn halfword(self) -> &'a mut W { - self.variant(SIZE_A::HALFWORD) + pub fn halfword(self) -> &'a mut crate::W { + self.variant(Size::Halfword) } #[doc = "Each unit transfer is a word"] #[inline(always)] - pub fn word(self) -> &'a mut W { - self.variant(SIZE_A::WORD) + pub fn word(self) -> &'a mut crate::W { + self.variant(Size::Word) } } -#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] -pub type DSTINC_R = crate::FieldReader; #[doc = "Destination Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DSTINC_A { +pub enum Dstinc { #[doc = "0: Increment destination address by one unit data size after each write"] - ONE = 0, + One = 0, #[doc = "1: Increment destination address by two unit data sizes after each write"] - TWO = 1, + Two = 1, #[doc = "2: Increment destination address by four unit data sizes after each write"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DSTINC_A) -> Self { + fn from(variant: Dstinc) -> Self { variant as _ } } -impl DSTINC_R { +impl crate::FieldSpec for Dstinc { + type Ux = u8; +} +impl crate::IsEnum for Dstinc {} +#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] +pub type DstincR = crate::FieldReader; +impl DstincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINC_A { + pub const fn variant(&self) -> Dstinc { match self.bits { - 0 => DSTINC_A::ONE, - 1 => DSTINC_A::TWO, - 2 => DSTINC_A::FOUR, - 3 => DSTINC_A::NONE, + 0 => Dstinc::One, + 1 => Dstinc::Two, + 2 => Dstinc::Four, + 3 => Dstinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == DSTINC_A::ONE + *self == Dstinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == DSTINC_A::TWO + *self == Dstinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == DSTINC_A::FOUR + *self == Dstinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == DSTINC_A::NONE + *self == Dstinc::None } } #[doc = "Field `DSTINC` writer - Destination Address Increment Size"] -pub type DSTINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH5_CTRL_SPEC, u8, DSTINC_A, 2, O>; -impl<'a, const O: u8> DSTINC_W<'a, O> { +pub type DstincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dstinc, crate::Safe>; +impl<'a, REG> DstincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(DSTINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Dstinc::One) } #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(DSTINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Dstinc::Two) } #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(DSTINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Dstinc::Four) } #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(DSTINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Dstinc::None) } } -#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] -pub type SRCMODE_R = crate::BitReader; #[doc = "Source Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCMODE_A { +pub enum Srcmode { #[doc = "0: The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCMODE_A) -> Self { + fn from(variant: Srcmode) -> Self { variant as u8 != 0 } } -impl SRCMODE_R { +#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] +pub type SrcmodeR = crate::BitReader; +impl SrcmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCMODE_A { + pub const fn variant(&self) -> Srcmode { match self.bits { - false => SRCMODE_A::ABSOLUTE, - true => SRCMODE_A::RELATIVE, + false => Srcmode::Absolute, + true => Srcmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == SRCMODE_A::ABSOLUTE + *self == Srcmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == SRCMODE_A::RELATIVE + *self == Srcmode::Relative } } -#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] -pub type DSTMODE_R = crate::BitReader; #[doc = "Destination Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTMODE_A { +pub enum Dstmode { #[doc = "0: The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTMODE_A) -> Self { + fn from(variant: Dstmode) -> Self { variant as u8 != 0 } } -impl DSTMODE_R { +#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] +pub type DstmodeR = crate::BitReader; +impl DstmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTMODE_A { + pub const fn variant(&self) -> Dstmode { match self.bits { - false => DSTMODE_A::ABSOLUTE, - true => DSTMODE_A::RELATIVE, + false => Dstmode::Absolute, + true => Dstmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == DSTMODE_A::ABSOLUTE + *self == Dstmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == DSTMODE_A::RELATIVE + *self == Dstmode::Relative } } impl R { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] - pub fn structtype(&self) -> STRUCTTYPE_R { - STRUCTTYPE_R::new((self.bits & 3) as u8) + pub fn structtype(&self) -> StructtypeR { + StructtypeR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Structure DMA Transfer Request"] #[inline(always)] - pub fn structreq(&self) -> STRUCTREQ_R { - STRUCTREQ_R::new(((self.bits >> 3) & 1) != 0) + pub fn structreq(&self) -> StructreqR { + StructreqR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] - pub fn xfercnt(&self) -> XFERCNT_R { - XFERCNT_R::new(((self.bits >> 4) & 0x07ff) as u16) + pub fn xfercnt(&self) -> XfercntR { + XfercntR::new(((self.bits >> 4) & 0x07ff) as u16) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] - pub fn byteswap(&self) -> BYTESWAP_R { - BYTESWAP_R::new(((self.bits >> 15) & 1) != 0) + pub fn byteswap(&self) -> ByteswapR { + ByteswapR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] - pub fn blocksize(&self) -> BLOCKSIZE_R { - BLOCKSIZE_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn blocksize(&self) -> BlocksizeR { + BlocksizeR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] - pub fn doneien(&self) -> DONEIEN_R { - DONEIEN_R::new(((self.bits >> 20) & 1) != 0) + pub fn doneien(&self) -> DoneienR { + DoneienR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] - pub fn reqmode(&self) -> REQMODE_R { - REQMODE_R::new(((self.bits >> 21) & 1) != 0) + pub fn reqmode(&self) -> ReqmodeR { + ReqmodeR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] - pub fn decloopcnt(&self) -> DECLOOPCNT_R { - DECLOOPCNT_R::new(((self.bits >> 22) & 1) != 0) + pub fn decloopcnt(&self) -> DecloopcntR { + DecloopcntR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] - pub fn ignoresreq(&self) -> IGNORESREQ_R { - IGNORESREQ_R::new(((self.bits >> 23) & 1) != 0) + pub fn ignoresreq(&self) -> IgnoresreqR { + IgnoresreqR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] - pub fn srcinc(&self) -> SRCINC_R { - SRCINC_R::new(((self.bits >> 24) & 3) as u8) + pub fn srcinc(&self) -> SrcincR { + SrcincR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] - pub fn size(&self) -> SIZE_R { - SIZE_R::new(((self.bits >> 26) & 3) as u8) + pub fn size(&self) -> SizeR { + SizeR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] - pub fn dstinc(&self) -> DSTINC_R { - DSTINC_R::new(((self.bits >> 28) & 3) as u8) + pub fn dstinc(&self) -> DstincR { + DstincR::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bit 30 - Source Addressing Mode"] #[inline(always)] - pub fn srcmode(&self) -> SRCMODE_R { - SRCMODE_R::new(((self.bits >> 30) & 1) != 0) + pub fn srcmode(&self) -> SrcmodeR { + SrcmodeR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Destination Addressing Mode"] #[inline(always)] - pub fn dstmode(&self) -> DSTMODE_R { - DSTMODE_R::new(((self.bits >> 31) & 1) != 0) + pub fn dstmode(&self) -> DstmodeR { + DstmodeR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] #[must_use] - pub fn structtype(&mut self) -> STRUCTTYPE_W<0> { - STRUCTTYPE_W::new(self) + pub fn structtype(&mut self) -> StructtypeW { + StructtypeW::new(self, 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] #[must_use] - pub fn xfercnt(&mut self) -> XFERCNT_W<4> { - XFERCNT_W::new(self) + pub fn xfercnt(&mut self) -> XfercntW { + XfercntW::new(self, 4) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] #[must_use] - pub fn byteswap(&mut self) -> BYTESWAP_W<15> { - BYTESWAP_W::new(self) + pub fn byteswap(&mut self) -> ByteswapW { + ByteswapW::new(self, 15) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] #[must_use] - pub fn blocksize(&mut self) -> BLOCKSIZE_W<16> { - BLOCKSIZE_W::new(self) + pub fn blocksize(&mut self) -> BlocksizeW { + BlocksizeW::new(self, 16) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] #[must_use] - pub fn doneien(&mut self) -> DONEIEN_W<20> { - DONEIEN_W::new(self) + pub fn doneien(&mut self) -> DoneienW { + DoneienW::new(self, 20) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] #[must_use] - pub fn reqmode(&mut self) -> REQMODE_W<21> { - REQMODE_W::new(self) + pub fn reqmode(&mut self) -> ReqmodeW { + ReqmodeW::new(self, 21) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] #[must_use] - pub fn decloopcnt(&mut self) -> DECLOOPCNT_W<22> { - DECLOOPCNT_W::new(self) + pub fn decloopcnt(&mut self) -> DecloopcntW { + DecloopcntW::new(self, 22) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] #[must_use] - pub fn ignoresreq(&mut self) -> IGNORESREQ_W<23> { - IGNORESREQ_W::new(self) + pub fn ignoresreq(&mut self) -> IgnoresreqW { + IgnoresreqW::new(self, 23) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] #[must_use] - pub fn srcinc(&mut self) -> SRCINC_W<24> { - SRCINC_W::new(self) + pub fn srcinc(&mut self) -> SrcincW { + SrcincW::new(self, 24) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SIZE_W<26> { - SIZE_W::new(self) + pub fn size(&mut self) -> SizeW { + SizeW::new(self, 26) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] #[must_use] - pub fn dstinc(&mut self) -> DSTINC_W<28> { - DSTINC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstinc(&mut self) -> DstincW { + DstincW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch5_ctrl](index.html) module"] -pub struct CH5_CTRL_SPEC; -impl crate::RegisterSpec for CH5_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch5CtrlSpec; +impl crate::RegisterSpec for Ch5CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch5_ctrl::R](R) reader structure"] -impl crate::Readable for CH5_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch5_ctrl::W](W) writer structure"] -impl crate::Writable for CH5_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch5_ctrl::R`](R) reader structure"] +impl crate::Readable for Ch5CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ch5_ctrl::W`](W) writer structure"] +impl crate::Writable for Ch5CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH5_CTRL to value 0"] -impl crate::Resettable for CH5_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch5CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch5_dst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch5_dst.rs index ec85b87..95a5b1b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch5_dst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch5_dst.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH5_DST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH5_DST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DSTADDR` reader - Destination Data Address"] -pub type DSTADDR_R = crate::FieldReader; +pub type DstaddrR = crate::FieldReader; #[doc = "Field `DSTADDR` writer - Destination Data Address"] -pub type DSTADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH5_DST_SPEC, u32, u32, 32, O>; +pub type DstaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] - pub fn dstaddr(&self) -> DSTADDR_R { - DSTADDR_R::new(self.bits) + pub fn dstaddr(&self) -> DstaddrR { + DstaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] #[must_use] - pub fn dstaddr(&mut self) -> DSTADDR_W<0> { - DSTADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstaddr(&mut self) -> DstaddrW { + DstaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch5_dst](index.html) module"] -pub struct CH5_DST_SPEC; -impl crate::RegisterSpec for CH5_DST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_dst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_dst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch5DstSpec; +impl crate::RegisterSpec for Ch5DstSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch5_dst::R](R) reader structure"] -impl crate::Readable for CH5_DST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch5_dst::W](W) writer structure"] -impl crate::Writable for CH5_DST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch5_dst::R`](R) reader structure"] +impl crate::Readable for Ch5DstSpec {} +#[doc = "`write(|w| ..)` method takes [`ch5_dst::W`](W) writer structure"] +impl crate::Writable for Ch5DstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH5_DST to value 0"] -impl crate::Resettable for CH5_DST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch5DstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch5_link.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch5_link.rs index 3a91f31..9da975e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch5_link.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch5_link.rs @@ -1,136 +1,96 @@ #[doc = "Register `CH5_LINK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH5_LINK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] -pub type LINKMODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Link Structure Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LINKMODE_A { +pub enum Linkmode { #[doc = "0: The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LINKMODE_A) -> Self { + fn from(variant: Linkmode) -> Self { variant as u8 != 0 } } -impl LINKMODE_R { +#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] +pub type LinkmodeR = crate::BitReader; +impl LinkmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LINKMODE_A { + pub const fn variant(&self) -> Linkmode { match self.bits { - false => LINKMODE_A::ABSOLUTE, - true => LINKMODE_A::RELATIVE, + false => Linkmode::Absolute, + true => Linkmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == LINKMODE_A::ABSOLUTE + *self == Linkmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == LINKMODE_A::RELATIVE + *self == Linkmode::Relative } } #[doc = "Field `LINK` reader - Link Next Structure"] -pub type LINK_R = crate::BitReader; +pub type LinkR = crate::BitReader; #[doc = "Field `LINK` writer - Link Next Structure"] -pub type LINK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH5_LINK_SPEC, bool, O>; +pub type LinkW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LINKADDR` reader - Link Structure Address"] -pub type LINKADDR_R = crate::FieldReader; +pub type LinkaddrR = crate::FieldReader; #[doc = "Field `LINKADDR` writer - Link Structure Address"] -pub type LINKADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH5_LINK_SPEC, u32, u32, 30, O>; +pub type LinkaddrW<'a, REG> = crate::FieldWriter<'a, REG, 30, u32>; impl R { #[doc = "Bit 0 - Link Structure Addressing Mode"] #[inline(always)] - pub fn linkmode(&self) -> LINKMODE_R { - LINKMODE_R::new((self.bits & 1) != 0) + pub fn linkmode(&self) -> LinkmodeR { + LinkmodeR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] - pub fn link(&self) -> LINK_R { - LINK_R::new(((self.bits >> 1) & 1) != 0) + pub fn link(&self) -> LinkR { + LinkR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] - pub fn linkaddr(&self) -> LINKADDR_R { - LINKADDR_R::new((self.bits >> 2) & 0x3fff_ffff) + pub fn linkaddr(&self) -> LinkaddrR { + LinkaddrR::new((self.bits >> 2) & 0x3fff_ffff) } } impl W { #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] #[must_use] - pub fn link(&mut self) -> LINK_W<1> { - LINK_W::new(self) + pub fn link(&mut self) -> LinkW { + LinkW::new(self, 1) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] #[must_use] - pub fn linkaddr(&mut self) -> LINKADDR_W<2> { - LINKADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn linkaddr(&mut self) -> LinkaddrW { + LinkaddrW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch5_link](index.html) module"] -pub struct CH5_LINK_SPEC; -impl crate::RegisterSpec for CH5_LINK_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_link::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_link::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch5LinkSpec; +impl crate::RegisterSpec for Ch5LinkSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch5_link::R](R) reader structure"] -impl crate::Readable for CH5_LINK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch5_link::W](W) writer structure"] -impl crate::Writable for CH5_LINK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch5_link::R`](R) reader structure"] +impl crate::Readable for Ch5LinkSpec {} +#[doc = "`write(|w| ..)` method takes [`ch5_link::W`](W) writer structure"] +impl crate::Writable for Ch5LinkSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH5_LINK to value 0"] -impl crate::Resettable for CH5_LINK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch5LinkSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch5_loop.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch5_loop.rs index 1dc116e..aa30602 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch5_loop.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch5_loop.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH5_LOOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH5_LOOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOOPCNT` reader - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_R = crate::FieldReader; +pub type LoopcntR = crate::FieldReader; #[doc = "Field `LOOPCNT` writer - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH5_LOOP_SPEC, u8, u8, 8, O>; +pub type LoopcntW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] - pub fn loopcnt(&self) -> LOOPCNT_R { - LOOPCNT_R::new((self.bits & 0xff) as u8) + pub fn loopcnt(&self) -> LoopcntR { + LoopcntR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] #[must_use] - pub fn loopcnt(&mut self) -> LOOPCNT_W<0> { - LOOPCNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn loopcnt(&mut self) -> LoopcntW { + LoopcntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch5_loop](index.html) module"] -pub struct CH5_LOOP_SPEC; -impl crate::RegisterSpec for CH5_LOOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_loop::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_loop::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch5LoopSpec; +impl crate::RegisterSpec for Ch5LoopSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch5_loop::R](R) reader structure"] -impl crate::Readable for CH5_LOOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch5_loop::W](W) writer structure"] -impl crate::Writable for CH5_LOOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch5_loop::R`](R) reader structure"] +impl crate::Readable for Ch5LoopSpec {} +#[doc = "`write(|w| ..)` method takes [`ch5_loop::W`](W) writer structure"] +impl crate::Writable for Ch5LoopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH5_LOOP to value 0"] -impl crate::Resettable for CH5_LOOP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch5LoopSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch5_src.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch5_src.rs index 0aaf2da..01944d2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch5_src.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch5_src.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH5_SRC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH5_SRC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SRCADDR` reader - Source Data Address"] -pub type SRCADDR_R = crate::FieldReader; +pub type SrcaddrR = crate::FieldReader; #[doc = "Field `SRCADDR` writer - Source Data Address"] -pub type SRCADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH5_SRC_SPEC, u32, u32, 32, O>; +pub type SrcaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] - pub fn srcaddr(&self) -> SRCADDR_R { - SRCADDR_R::new(self.bits) + pub fn srcaddr(&self) -> SrcaddrR { + SrcaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] #[must_use] - pub fn srcaddr(&mut self) -> SRCADDR_W<0> { - SRCADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn srcaddr(&mut self) -> SrcaddrW { + SrcaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch5_src](index.html) module"] -pub struct CH5_SRC_SPEC; -impl crate::RegisterSpec for CH5_SRC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_src::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_src::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch5SrcSpec; +impl crate::RegisterSpec for Ch5SrcSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch5_src::R](R) reader structure"] -impl crate::Readable for CH5_SRC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch5_src::W](W) writer structure"] -impl crate::Writable for CH5_SRC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch5_src::R`](R) reader structure"] +impl crate::Readable for Ch5SrcSpec {} +#[doc = "`write(|w| ..)` method takes [`ch5_src::W`](W) writer structure"] +impl crate::Writable for Ch5SrcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH5_SRC to value 0"] -impl crate::Resettable for CH5_SRC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch5SrcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch6_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch6_cfg.rs index 3d30289..4e55328 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch6_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch6_cfg.rs @@ -1,277 +1,250 @@ #[doc = "Register `CH6_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH6_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] -pub type ARBSLOTS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Arbitration Slot Number Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ARBSLOTS_A { +pub enum Arbslots { #[doc = "0: One arbitration slot selected"] - ONE = 0, + One = 0, #[doc = "1: Two arbitration slots selected"] - TWO = 1, + Two = 1, #[doc = "2: Four arbitration slots selected"] - FOUR = 2, + Four = 2, #[doc = "3: Eight arbitration slots selected"] - EIGHT = 3, + Eight = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ARBSLOTS_A) -> Self { + fn from(variant: Arbslots) -> Self { variant as _ } } -impl ARBSLOTS_R { +impl crate::FieldSpec for Arbslots { + type Ux = u8; +} +impl crate::IsEnum for Arbslots {} +#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] +pub type ArbslotsR = crate::FieldReader; +impl ArbslotsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ARBSLOTS_A { + pub const fn variant(&self) -> Arbslots { match self.bits { - 0 => ARBSLOTS_A::ONE, - 1 => ARBSLOTS_A::TWO, - 2 => ARBSLOTS_A::FOUR, - 3 => ARBSLOTS_A::EIGHT, + 0 => Arbslots::One, + 1 => Arbslots::Two, + 2 => Arbslots::Four, + 3 => Arbslots::Eight, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "One arbitration slot selected"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == ARBSLOTS_A::ONE + *self == Arbslots::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Two arbitration slots selected"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == ARBSLOTS_A::TWO + *self == Arbslots::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Four arbitration slots selected"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == ARBSLOTS_A::FOUR + *self == Arbslots::Four } - #[doc = "Checks if the value of the field is `EIGHT`"] + #[doc = "Eight arbitration slots selected"] #[inline(always)] pub fn is_eight(&self) -> bool { - *self == ARBSLOTS_A::EIGHT + *self == Arbslots::Eight } } #[doc = "Field `ARBSLOTS` writer - Arbitration Slot Number Select"] -pub type ARBSLOTS_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH6_CFG_SPEC, u8, ARBSLOTS_A, 2, O>; -impl<'a, const O: u8> ARBSLOTS_W<'a, O> { +pub type ArbslotsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Arbslots, crate::Safe>; +impl<'a, REG> ArbslotsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One arbitration slot selected"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(ARBSLOTS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Arbslots::One) } #[doc = "Two arbitration slots selected"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(ARBSLOTS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Arbslots::Two) } #[doc = "Four arbitration slots selected"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(ARBSLOTS_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Arbslots::Four) } #[doc = "Eight arbitration slots selected"] #[inline(always)] - pub fn eight(self) -> &'a mut W { - self.variant(ARBSLOTS_A::EIGHT) + pub fn eight(self) -> &'a mut crate::W { + self.variant(Arbslots::Eight) } } -#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] -pub type SRCINCSIGN_R = crate::BitReader; #[doc = "Source Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCINCSIGN_A { +pub enum Srcincsign { #[doc = "0: Increment source address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement source address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCINCSIGN_A) -> Self { + fn from(variant: Srcincsign) -> Self { variant as u8 != 0 } } -impl SRCINCSIGN_R { +#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] +pub type SrcincsignR = crate::BitReader; +impl SrcincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINCSIGN_A { + pub const fn variant(&self) -> Srcincsign { match self.bits { - false => SRCINCSIGN_A::POSITIVE, - true => SRCINCSIGN_A::NEGATIVE, + false => Srcincsign::Positive, + true => Srcincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment source address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == SRCINCSIGN_A::POSITIVE + *self == Srcincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement source address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == SRCINCSIGN_A::NEGATIVE + *self == Srcincsign::Negative } } #[doc = "Field `SRCINCSIGN` writer - Source Address Increment Sign"] -pub type SRCINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH6_CFG_SPEC, SRCINCSIGN_A, O>; -impl<'a, const O: u8> SRCINCSIGN_W<'a, O> { +pub type SrcincsignW<'a, REG> = crate::BitWriter<'a, REG, Srcincsign>; +impl<'a, REG> SrcincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment source address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Srcincsign::Positive) } #[doc = "Decrement source address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Srcincsign::Negative) } } -#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] -pub type DSTINCSIGN_R = crate::BitReader; #[doc = "Destination Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTINCSIGN_A { +pub enum Dstincsign { #[doc = "0: Increment destination address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement destination address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTINCSIGN_A) -> Self { + fn from(variant: Dstincsign) -> Self { variant as u8 != 0 } } -impl DSTINCSIGN_R { +#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] +pub type DstincsignR = crate::BitReader; +impl DstincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINCSIGN_A { + pub const fn variant(&self) -> Dstincsign { match self.bits { - false => DSTINCSIGN_A::POSITIVE, - true => DSTINCSIGN_A::NEGATIVE, + false => Dstincsign::Positive, + true => Dstincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment destination address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == DSTINCSIGN_A::POSITIVE + *self == Dstincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement destination address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == DSTINCSIGN_A::NEGATIVE + *self == Dstincsign::Negative } } #[doc = "Field `DSTINCSIGN` writer - Destination Address Increment Sign"] -pub type DSTINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH6_CFG_SPEC, DSTINCSIGN_A, O>; -impl<'a, const O: u8> DSTINCSIGN_W<'a, O> { +pub type DstincsignW<'a, REG> = crate::BitWriter<'a, REG, Dstincsign>; +impl<'a, REG> DstincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment destination address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Dstincsign::Positive) } #[doc = "Decrement destination address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Dstincsign::Negative) } } impl R { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] - pub fn arbslots(&self) -> ARBSLOTS_R { - ARBSLOTS_R::new(((self.bits >> 16) & 3) as u8) + pub fn arbslots(&self) -> ArbslotsR { + ArbslotsR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] - pub fn srcincsign(&self) -> SRCINCSIGN_R { - SRCINCSIGN_R::new(((self.bits >> 20) & 1) != 0) + pub fn srcincsign(&self) -> SrcincsignR { + SrcincsignR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] - pub fn dstincsign(&self) -> DSTINCSIGN_R { - DSTINCSIGN_R::new(((self.bits >> 21) & 1) != 0) + pub fn dstincsign(&self) -> DstincsignR { + DstincsignR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] #[must_use] - pub fn arbslots(&mut self) -> ARBSLOTS_W<16> { - ARBSLOTS_W::new(self) + pub fn arbslots(&mut self) -> ArbslotsW { + ArbslotsW::new(self, 16) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] #[must_use] - pub fn srcincsign(&mut self) -> SRCINCSIGN_W<20> { - SRCINCSIGN_W::new(self) + pub fn srcincsign(&mut self) -> SrcincsignW { + SrcincsignW::new(self, 20) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] #[must_use] - pub fn dstincsign(&mut self) -> DSTINCSIGN_W<21> { - DSTINCSIGN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstincsign(&mut self) -> DstincsignW { + DstincsignW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch6_cfg](index.html) module"] -pub struct CH6_CFG_SPEC; -impl crate::RegisterSpec for CH6_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch6CfgSpec; +impl crate::RegisterSpec for Ch6CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch6_cfg::R](R) reader structure"] -impl crate::Readable for CH6_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch6_cfg::W](W) writer structure"] -impl crate::Writable for CH6_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch6_cfg::R`](R) reader structure"] +impl crate::Readable for Ch6CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`ch6_cfg::W`](W) writer structure"] +impl crate::Writable for Ch6CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH6_CFG to value 0"] -impl crate::Resettable for CH6_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch6CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch6_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch6_ctrl.rs index 6461425..04b2ae8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch6_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch6_ctrl.rs @@ -1,843 +1,842 @@ #[doc = "Register `CH6_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH6_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] -pub type STRUCTTYPE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DMA Structure Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STRUCTTYPE_A { +pub enum Structtype { #[doc = "0: DMA transfer structure type selected."] - TRANSFER = 0, + Transfer = 0, #[doc = "1: Synchronization structure type selected."] - SYNCHRONIZE = 1, + Synchronize = 1, #[doc = "2: Write immediate value structure type selected."] - WRITE = 2, + Write = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STRUCTTYPE_A) -> Self { + fn from(variant: Structtype) -> Self { variant as _ } } -impl STRUCTTYPE_R { +impl crate::FieldSpec for Structtype { + type Ux = u8; +} +impl crate::IsEnum for Structtype {} +#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] +pub type StructtypeR = crate::FieldReader; +impl StructtypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(STRUCTTYPE_A::TRANSFER), - 1 => Some(STRUCTTYPE_A::SYNCHRONIZE), - 2 => Some(STRUCTTYPE_A::WRITE), + 0 => Some(Structtype::Transfer), + 1 => Some(Structtype::Synchronize), + 2 => Some(Structtype::Write), _ => None, } } - #[doc = "Checks if the value of the field is `TRANSFER`"] + #[doc = "DMA transfer structure type selected."] #[inline(always)] pub fn is_transfer(&self) -> bool { - *self == STRUCTTYPE_A::TRANSFER + *self == Structtype::Transfer } - #[doc = "Checks if the value of the field is `SYNCHRONIZE`"] + #[doc = "Synchronization structure type selected."] #[inline(always)] pub fn is_synchronize(&self) -> bool { - *self == STRUCTTYPE_A::SYNCHRONIZE + *self == Structtype::Synchronize } - #[doc = "Checks if the value of the field is `WRITE`"] + #[doc = "Write immediate value structure type selected."] #[inline(always)] pub fn is_write(&self) -> bool { - *self == STRUCTTYPE_A::WRITE + *self == Structtype::Write } } #[doc = "Field `STRUCTTYPE` writer - DMA Structure Type"] -pub type STRUCTTYPE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH6_CTRL_SPEC, u8, STRUCTTYPE_A, 2, O>; -impl<'a, const O: u8> STRUCTTYPE_W<'a, O> { +pub type StructtypeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Structtype>; +impl<'a, REG> StructtypeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "DMA transfer structure type selected."] #[inline(always)] - pub fn transfer(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::TRANSFER) + pub fn transfer(self) -> &'a mut crate::W { + self.variant(Structtype::Transfer) } #[doc = "Synchronization structure type selected."] #[inline(always)] - pub fn synchronize(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::SYNCHRONIZE) + pub fn synchronize(self) -> &'a mut crate::W { + self.variant(Structtype::Synchronize) } #[doc = "Write immediate value structure type selected."] #[inline(always)] - pub fn write(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::WRITE) + pub fn write(self) -> &'a mut crate::W { + self.variant(Structtype::Write) } } #[doc = "Field `STRUCTREQ` reader - Structure DMA Transfer Request"] -pub type STRUCTREQ_R = crate::BitReader; +pub type StructreqR = crate::BitReader; #[doc = "Field `XFERCNT` reader - DMA Unit Data Transfer Count"] -pub type XFERCNT_R = crate::FieldReader; +pub type XfercntR = crate::FieldReader; #[doc = "Field `XFERCNT` writer - DMA Unit Data Transfer Count"] -pub type XFERCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH6_CTRL_SPEC, u16, u16, 11, O>; +pub type XfercntW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `BYTESWAP` reader - Endian Byte Swap"] -pub type BYTESWAP_R = crate::BitReader; +pub type ByteswapR = crate::BitReader; #[doc = "Field `BYTESWAP` writer - Endian Byte Swap"] -pub type BYTESWAP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH6_CTRL_SPEC, bool, O>; -#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] -pub type BLOCKSIZE_R = crate::FieldReader; +pub type ByteswapW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Block Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BLOCKSIZE_A { +pub enum Blocksize { #[doc = "0: One unit transfer per arbitration"] - UNIT1 = 0, + Unit1 = 0, #[doc = "1: Two unit transfers per arbitration"] - UNIT2 = 1, + Unit2 = 1, #[doc = "2: Three unit transfers per arbitration"] - UNIT3 = 2, + Unit3 = 2, #[doc = "3: Four unit transfers per arbitration"] - UNIT4 = 3, + Unit4 = 3, #[doc = "4: Six unit transfers per arbitration"] - UNIT6 = 4, + Unit6 = 4, #[doc = "5: Eight unit transfers per arbitration"] - UNIT8 = 5, + Unit8 = 5, #[doc = "7: Sixteen unit transfers per arbitration"] - UNIT16 = 7, + Unit16 = 7, #[doc = "9: 32 unit transfers per arbitration"] - UNIT32 = 9, + Unit32 = 9, #[doc = "10: 64 unit transfers per arbitration"] - UNIT64 = 10, + Unit64 = 10, #[doc = "11: 128 unit transfers per arbitration"] - UNIT128 = 11, + Unit128 = 11, #[doc = "12: 256 unit transfers per arbitration"] - UNIT256 = 12, + Unit256 = 12, #[doc = "13: 512 unit transfers per arbitration"] - UNIT512 = 13, + Unit512 = 13, #[doc = "14: 1024 unit transfers per arbitration"] - UNIT1024 = 14, + Unit1024 = 14, #[doc = "15: Transfer all units as specified by the XFRCNT field"] - ALL = 15, + All = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BLOCKSIZE_A) -> Self { + fn from(variant: Blocksize) -> Self { variant as _ } } -impl BLOCKSIZE_R { +impl crate::FieldSpec for Blocksize { + type Ux = u8; +} +impl crate::IsEnum for Blocksize {} +#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] +pub type BlocksizeR = crate::FieldReader; +impl BlocksizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BLOCKSIZE_A::UNIT1), - 1 => Some(BLOCKSIZE_A::UNIT2), - 2 => Some(BLOCKSIZE_A::UNIT3), - 3 => Some(BLOCKSIZE_A::UNIT4), - 4 => Some(BLOCKSIZE_A::UNIT6), - 5 => Some(BLOCKSIZE_A::UNIT8), - 7 => Some(BLOCKSIZE_A::UNIT16), - 9 => Some(BLOCKSIZE_A::UNIT32), - 10 => Some(BLOCKSIZE_A::UNIT64), - 11 => Some(BLOCKSIZE_A::UNIT128), - 12 => Some(BLOCKSIZE_A::UNIT256), - 13 => Some(BLOCKSIZE_A::UNIT512), - 14 => Some(BLOCKSIZE_A::UNIT1024), - 15 => Some(BLOCKSIZE_A::ALL), + 0 => Some(Blocksize::Unit1), + 1 => Some(Blocksize::Unit2), + 2 => Some(Blocksize::Unit3), + 3 => Some(Blocksize::Unit4), + 4 => Some(Blocksize::Unit6), + 5 => Some(Blocksize::Unit8), + 7 => Some(Blocksize::Unit16), + 9 => Some(Blocksize::Unit32), + 10 => Some(Blocksize::Unit64), + 11 => Some(Blocksize::Unit128), + 12 => Some(Blocksize::Unit256), + 13 => Some(Blocksize::Unit512), + 14 => Some(Blocksize::Unit1024), + 15 => Some(Blocksize::All), _ => None, } } - #[doc = "Checks if the value of the field is `UNIT1`"] + #[doc = "One unit transfer per arbitration"] #[inline(always)] pub fn is_unit1(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1 + *self == Blocksize::Unit1 } - #[doc = "Checks if the value of the field is `UNIT2`"] + #[doc = "Two unit transfers per arbitration"] #[inline(always)] pub fn is_unit2(&self) -> bool { - *self == BLOCKSIZE_A::UNIT2 + *self == Blocksize::Unit2 } - #[doc = "Checks if the value of the field is `UNIT3`"] + #[doc = "Three unit transfers per arbitration"] #[inline(always)] pub fn is_unit3(&self) -> bool { - *self == BLOCKSIZE_A::UNIT3 + *self == Blocksize::Unit3 } - #[doc = "Checks if the value of the field is `UNIT4`"] + #[doc = "Four unit transfers per arbitration"] #[inline(always)] pub fn is_unit4(&self) -> bool { - *self == BLOCKSIZE_A::UNIT4 + *self == Blocksize::Unit4 } - #[doc = "Checks if the value of the field is `UNIT6`"] + #[doc = "Six unit transfers per arbitration"] #[inline(always)] pub fn is_unit6(&self) -> bool { - *self == BLOCKSIZE_A::UNIT6 + *self == Blocksize::Unit6 } - #[doc = "Checks if the value of the field is `UNIT8`"] + #[doc = "Eight unit transfers per arbitration"] #[inline(always)] pub fn is_unit8(&self) -> bool { - *self == BLOCKSIZE_A::UNIT8 + *self == Blocksize::Unit8 } - #[doc = "Checks if the value of the field is `UNIT16`"] + #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] pub fn is_unit16(&self) -> bool { - *self == BLOCKSIZE_A::UNIT16 + *self == Blocksize::Unit16 } - #[doc = "Checks if the value of the field is `UNIT32`"] + #[doc = "32 unit transfers per arbitration"] #[inline(always)] pub fn is_unit32(&self) -> bool { - *self == BLOCKSIZE_A::UNIT32 + *self == Blocksize::Unit32 } - #[doc = "Checks if the value of the field is `UNIT64`"] + #[doc = "64 unit transfers per arbitration"] #[inline(always)] pub fn is_unit64(&self) -> bool { - *self == BLOCKSIZE_A::UNIT64 + *self == Blocksize::Unit64 } - #[doc = "Checks if the value of the field is `UNIT128`"] + #[doc = "128 unit transfers per arbitration"] #[inline(always)] pub fn is_unit128(&self) -> bool { - *self == BLOCKSIZE_A::UNIT128 + *self == Blocksize::Unit128 } - #[doc = "Checks if the value of the field is `UNIT256`"] + #[doc = "256 unit transfers per arbitration"] #[inline(always)] pub fn is_unit256(&self) -> bool { - *self == BLOCKSIZE_A::UNIT256 + *self == Blocksize::Unit256 } - #[doc = "Checks if the value of the field is `UNIT512`"] + #[doc = "512 unit transfers per arbitration"] #[inline(always)] pub fn is_unit512(&self) -> bool { - *self == BLOCKSIZE_A::UNIT512 + *self == Blocksize::Unit512 } - #[doc = "Checks if the value of the field is `UNIT1024`"] + #[doc = "1024 unit transfers per arbitration"] #[inline(always)] pub fn is_unit1024(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1024 + *self == Blocksize::Unit1024 } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] pub fn is_all(&self) -> bool { - *self == BLOCKSIZE_A::ALL + *self == Blocksize::All } } #[doc = "Field `BLOCKSIZE` writer - Block Transfer Size"] -pub type BLOCKSIZE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH6_CTRL_SPEC, u8, BLOCKSIZE_A, 4, O>; -impl<'a, const O: u8> BLOCKSIZE_W<'a, O> { +pub type BlocksizeW<'a, REG> = crate::FieldWriter<'a, REG, 4, Blocksize>; +impl<'a, REG> BlocksizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One unit transfer per arbitration"] #[inline(always)] - pub fn unit1(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1) + pub fn unit1(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1) } #[doc = "Two unit transfers per arbitration"] #[inline(always)] - pub fn unit2(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT2) + pub fn unit2(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit2) } #[doc = "Three unit transfers per arbitration"] #[inline(always)] - pub fn unit3(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT3) + pub fn unit3(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit3) } #[doc = "Four unit transfers per arbitration"] #[inline(always)] - pub fn unit4(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT4) + pub fn unit4(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit4) } #[doc = "Six unit transfers per arbitration"] #[inline(always)] - pub fn unit6(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT6) + pub fn unit6(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit6) } #[doc = "Eight unit transfers per arbitration"] #[inline(always)] - pub fn unit8(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT8) + pub fn unit8(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit8) } #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] - pub fn unit16(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT16) + pub fn unit16(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit16) } #[doc = "32 unit transfers per arbitration"] #[inline(always)] - pub fn unit32(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT32) + pub fn unit32(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit32) } #[doc = "64 unit transfers per arbitration"] #[inline(always)] - pub fn unit64(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT64) + pub fn unit64(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit64) } #[doc = "128 unit transfers per arbitration"] #[inline(always)] - pub fn unit128(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT128) + pub fn unit128(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit128) } #[doc = "256 unit transfers per arbitration"] #[inline(always)] - pub fn unit256(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT256) + pub fn unit256(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit256) } #[doc = "512 unit transfers per arbitration"] #[inline(always)] - pub fn unit512(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT512) + pub fn unit512(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit512) } #[doc = "1024 unit transfers per arbitration"] #[inline(always)] - pub fn unit1024(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1024) + pub fn unit1024(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1024) } #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Blocksize::All) } } #[doc = "Field `DONEIEN` reader - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_R = crate::BitReader; +pub type DoneienR = crate::BitReader; #[doc = "Field `DONEIEN` writer - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH6_CTRL_SPEC, bool, O>; -#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] -pub type REQMODE_R = crate::BitReader; +pub type DoneienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "DMA Request Transfer Mode Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REQMODE_A { +pub enum Reqmode { #[doc = "0: The LDMA transfers one BLOCKSIZE per transfer request."] - BLOCK = 0, + Block = 0, #[doc = "1: One transfer request transfers all units as defined by the XFRCNT field."] - ALL = 1, + All = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REQMODE_A) -> Self { + fn from(variant: Reqmode) -> Self { variant as u8 != 0 } } -impl REQMODE_R { +#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] +pub type ReqmodeR = crate::BitReader; +impl ReqmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REQMODE_A { + pub const fn variant(&self) -> Reqmode { match self.bits { - false => REQMODE_A::BLOCK, - true => REQMODE_A::ALL, + false => Reqmode::Block, + true => Reqmode::All, } } - #[doc = "Checks if the value of the field is `BLOCK`"] + #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] pub fn is_block(&self) -> bool { - *self == REQMODE_A::BLOCK + *self == Reqmode::Block } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] pub fn is_all(&self) -> bool { - *self == REQMODE_A::ALL + *self == Reqmode::All } } #[doc = "Field `REQMODE` writer - DMA Request Transfer Mode Select"] -pub type REQMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH6_CTRL_SPEC, REQMODE_A, O>; -impl<'a, const O: u8> REQMODE_W<'a, O> { +pub type ReqmodeW<'a, REG> = crate::BitWriter<'a, REG, Reqmode>; +impl<'a, REG> ReqmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] - pub fn block(self) -> &'a mut W { - self.variant(REQMODE_A::BLOCK) + pub fn block(self) -> &'a mut crate::W { + self.variant(Reqmode::Block) } #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(REQMODE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Reqmode::All) } } #[doc = "Field `DECLOOPCNT` reader - Decrement Loop Count"] -pub type DECLOOPCNT_R = crate::BitReader; +pub type DecloopcntR = crate::BitReader; #[doc = "Field `DECLOOPCNT` writer - Decrement Loop Count"] -pub type DECLOOPCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH6_CTRL_SPEC, bool, O>; +pub type DecloopcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IGNORESREQ` reader - Ignore Sreq"] -pub type IGNORESREQ_R = crate::BitReader; +pub type IgnoresreqR = crate::BitReader; #[doc = "Field `IGNORESREQ` writer - Ignore Sreq"] -pub type IGNORESREQ_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH6_CTRL_SPEC, bool, O>; -#[doc = "Field `SRCINC` reader - Source Address Increment Size"] -pub type SRCINC_R = crate::FieldReader; +pub type IgnoresreqW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SRCINC_A { +pub enum Srcinc { #[doc = "0: Increment source address by one unit data size after each read"] - ONE = 0, + One = 0, #[doc = "1: Increment source address by two unit data sizes after each read"] - TWO = 1, + Two = 1, #[doc = "2: Increment source address by four unit data sizes after each read"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SRCINC_A) -> Self { + fn from(variant: Srcinc) -> Self { variant as _ } } -impl SRCINC_R { +impl crate::FieldSpec for Srcinc { + type Ux = u8; +} +impl crate::IsEnum for Srcinc {} +#[doc = "Field `SRCINC` reader - Source Address Increment Size"] +pub type SrcincR = crate::FieldReader; +impl SrcincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINC_A { + pub const fn variant(&self) -> Srcinc { match self.bits { - 0 => SRCINC_A::ONE, - 1 => SRCINC_A::TWO, - 2 => SRCINC_A::FOUR, - 3 => SRCINC_A::NONE, + 0 => Srcinc::One, + 1 => Srcinc::Two, + 2 => Srcinc::Four, + 3 => Srcinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == SRCINC_A::ONE + *self == Srcinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == SRCINC_A::TWO + *self == Srcinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == SRCINC_A::FOUR + *self == Srcinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SRCINC_A::NONE + *self == Srcinc::None } } #[doc = "Field `SRCINC` writer - Source Address Increment Size"] -pub type SRCINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH6_CTRL_SPEC, u8, SRCINC_A, 2, O>; -impl<'a, const O: u8> SRCINC_W<'a, O> { +pub type SrcincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Srcinc, crate::Safe>; +impl<'a, REG> SrcincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(SRCINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Srcinc::One) } #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(SRCINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Srcinc::Two) } #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(SRCINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Srcinc::Four) } #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SRCINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Srcinc::None) } } -#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] -pub type SIZE_R = crate::FieldReader; #[doc = "Unit Data Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIZE_A { +pub enum Size { #[doc = "0: Each unit transfer is a byte"] - BYTE = 0, + Byte = 0, #[doc = "1: Each unit transfer is a half-word"] - HALFWORD = 1, + Halfword = 1, #[doc = "2: Each unit transfer is a word"] - WORD = 2, + Word = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIZE_A) -> Self { + fn from(variant: Size) -> Self { variant as _ } } -impl SIZE_R { +impl crate::FieldSpec for Size { + type Ux = u8; +} +impl crate::IsEnum for Size {} +#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] +pub type SizeR = crate::FieldReader; +impl SizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIZE_A::BYTE), - 1 => Some(SIZE_A::HALFWORD), - 2 => Some(SIZE_A::WORD), + 0 => Some(Size::Byte), + 1 => Some(Size::Halfword), + 2 => Some(Size::Word), _ => None, } } - #[doc = "Checks if the value of the field is `BYTE`"] + #[doc = "Each unit transfer is a byte"] #[inline(always)] pub fn is_byte(&self) -> bool { - *self == SIZE_A::BYTE + *self == Size::Byte } - #[doc = "Checks if the value of the field is `HALFWORD`"] + #[doc = "Each unit transfer is a half-word"] #[inline(always)] pub fn is_halfword(&self) -> bool { - *self == SIZE_A::HALFWORD + *self == Size::Halfword } - #[doc = "Checks if the value of the field is `WORD`"] + #[doc = "Each unit transfer is a word"] #[inline(always)] pub fn is_word(&self) -> bool { - *self == SIZE_A::WORD + *self == Size::Word } } #[doc = "Field `SIZE` writer - Unit Data Transfer Size"] -pub type SIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH6_CTRL_SPEC, u8, SIZE_A, 2, O>; -impl<'a, const O: u8> SIZE_W<'a, O> { +pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Size>; +impl<'a, REG> SizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Each unit transfer is a byte"] #[inline(always)] - pub fn byte(self) -> &'a mut W { - self.variant(SIZE_A::BYTE) + pub fn byte(self) -> &'a mut crate::W { + self.variant(Size::Byte) } #[doc = "Each unit transfer is a half-word"] #[inline(always)] - pub fn halfword(self) -> &'a mut W { - self.variant(SIZE_A::HALFWORD) + pub fn halfword(self) -> &'a mut crate::W { + self.variant(Size::Halfword) } #[doc = "Each unit transfer is a word"] #[inline(always)] - pub fn word(self) -> &'a mut W { - self.variant(SIZE_A::WORD) + pub fn word(self) -> &'a mut crate::W { + self.variant(Size::Word) } } -#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] -pub type DSTINC_R = crate::FieldReader; #[doc = "Destination Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DSTINC_A { +pub enum Dstinc { #[doc = "0: Increment destination address by one unit data size after each write"] - ONE = 0, + One = 0, #[doc = "1: Increment destination address by two unit data sizes after each write"] - TWO = 1, + Two = 1, #[doc = "2: Increment destination address by four unit data sizes after each write"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DSTINC_A) -> Self { + fn from(variant: Dstinc) -> Self { variant as _ } } -impl DSTINC_R { +impl crate::FieldSpec for Dstinc { + type Ux = u8; +} +impl crate::IsEnum for Dstinc {} +#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] +pub type DstincR = crate::FieldReader; +impl DstincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINC_A { + pub const fn variant(&self) -> Dstinc { match self.bits { - 0 => DSTINC_A::ONE, - 1 => DSTINC_A::TWO, - 2 => DSTINC_A::FOUR, - 3 => DSTINC_A::NONE, + 0 => Dstinc::One, + 1 => Dstinc::Two, + 2 => Dstinc::Four, + 3 => Dstinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == DSTINC_A::ONE + *self == Dstinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == DSTINC_A::TWO + *self == Dstinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == DSTINC_A::FOUR + *self == Dstinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == DSTINC_A::NONE + *self == Dstinc::None } } #[doc = "Field `DSTINC` writer - Destination Address Increment Size"] -pub type DSTINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH6_CTRL_SPEC, u8, DSTINC_A, 2, O>; -impl<'a, const O: u8> DSTINC_W<'a, O> { +pub type DstincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dstinc, crate::Safe>; +impl<'a, REG> DstincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(DSTINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Dstinc::One) } #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(DSTINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Dstinc::Two) } #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(DSTINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Dstinc::Four) } #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(DSTINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Dstinc::None) } } -#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] -pub type SRCMODE_R = crate::BitReader; #[doc = "Source Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCMODE_A { +pub enum Srcmode { #[doc = "0: The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCMODE_A) -> Self { + fn from(variant: Srcmode) -> Self { variant as u8 != 0 } } -impl SRCMODE_R { +#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] +pub type SrcmodeR = crate::BitReader; +impl SrcmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCMODE_A { + pub const fn variant(&self) -> Srcmode { match self.bits { - false => SRCMODE_A::ABSOLUTE, - true => SRCMODE_A::RELATIVE, + false => Srcmode::Absolute, + true => Srcmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == SRCMODE_A::ABSOLUTE + *self == Srcmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == SRCMODE_A::RELATIVE + *self == Srcmode::Relative } } -#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] -pub type DSTMODE_R = crate::BitReader; #[doc = "Destination Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTMODE_A { +pub enum Dstmode { #[doc = "0: The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTMODE_A) -> Self { + fn from(variant: Dstmode) -> Self { variant as u8 != 0 } } -impl DSTMODE_R { +#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] +pub type DstmodeR = crate::BitReader; +impl DstmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTMODE_A { + pub const fn variant(&self) -> Dstmode { match self.bits { - false => DSTMODE_A::ABSOLUTE, - true => DSTMODE_A::RELATIVE, + false => Dstmode::Absolute, + true => Dstmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == DSTMODE_A::ABSOLUTE + *self == Dstmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == DSTMODE_A::RELATIVE + *self == Dstmode::Relative } } impl R { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] - pub fn structtype(&self) -> STRUCTTYPE_R { - STRUCTTYPE_R::new((self.bits & 3) as u8) + pub fn structtype(&self) -> StructtypeR { + StructtypeR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Structure DMA Transfer Request"] #[inline(always)] - pub fn structreq(&self) -> STRUCTREQ_R { - STRUCTREQ_R::new(((self.bits >> 3) & 1) != 0) + pub fn structreq(&self) -> StructreqR { + StructreqR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] - pub fn xfercnt(&self) -> XFERCNT_R { - XFERCNT_R::new(((self.bits >> 4) & 0x07ff) as u16) + pub fn xfercnt(&self) -> XfercntR { + XfercntR::new(((self.bits >> 4) & 0x07ff) as u16) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] - pub fn byteswap(&self) -> BYTESWAP_R { - BYTESWAP_R::new(((self.bits >> 15) & 1) != 0) + pub fn byteswap(&self) -> ByteswapR { + ByteswapR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] - pub fn blocksize(&self) -> BLOCKSIZE_R { - BLOCKSIZE_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn blocksize(&self) -> BlocksizeR { + BlocksizeR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] - pub fn doneien(&self) -> DONEIEN_R { - DONEIEN_R::new(((self.bits >> 20) & 1) != 0) + pub fn doneien(&self) -> DoneienR { + DoneienR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] - pub fn reqmode(&self) -> REQMODE_R { - REQMODE_R::new(((self.bits >> 21) & 1) != 0) + pub fn reqmode(&self) -> ReqmodeR { + ReqmodeR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] - pub fn decloopcnt(&self) -> DECLOOPCNT_R { - DECLOOPCNT_R::new(((self.bits >> 22) & 1) != 0) + pub fn decloopcnt(&self) -> DecloopcntR { + DecloopcntR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] - pub fn ignoresreq(&self) -> IGNORESREQ_R { - IGNORESREQ_R::new(((self.bits >> 23) & 1) != 0) + pub fn ignoresreq(&self) -> IgnoresreqR { + IgnoresreqR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] - pub fn srcinc(&self) -> SRCINC_R { - SRCINC_R::new(((self.bits >> 24) & 3) as u8) + pub fn srcinc(&self) -> SrcincR { + SrcincR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] - pub fn size(&self) -> SIZE_R { - SIZE_R::new(((self.bits >> 26) & 3) as u8) + pub fn size(&self) -> SizeR { + SizeR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] - pub fn dstinc(&self) -> DSTINC_R { - DSTINC_R::new(((self.bits >> 28) & 3) as u8) + pub fn dstinc(&self) -> DstincR { + DstincR::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bit 30 - Source Addressing Mode"] #[inline(always)] - pub fn srcmode(&self) -> SRCMODE_R { - SRCMODE_R::new(((self.bits >> 30) & 1) != 0) + pub fn srcmode(&self) -> SrcmodeR { + SrcmodeR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Destination Addressing Mode"] #[inline(always)] - pub fn dstmode(&self) -> DSTMODE_R { - DSTMODE_R::new(((self.bits >> 31) & 1) != 0) + pub fn dstmode(&self) -> DstmodeR { + DstmodeR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] #[must_use] - pub fn structtype(&mut self) -> STRUCTTYPE_W<0> { - STRUCTTYPE_W::new(self) + pub fn structtype(&mut self) -> StructtypeW { + StructtypeW::new(self, 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] #[must_use] - pub fn xfercnt(&mut self) -> XFERCNT_W<4> { - XFERCNT_W::new(self) + pub fn xfercnt(&mut self) -> XfercntW { + XfercntW::new(self, 4) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] #[must_use] - pub fn byteswap(&mut self) -> BYTESWAP_W<15> { - BYTESWAP_W::new(self) + pub fn byteswap(&mut self) -> ByteswapW { + ByteswapW::new(self, 15) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] #[must_use] - pub fn blocksize(&mut self) -> BLOCKSIZE_W<16> { - BLOCKSIZE_W::new(self) + pub fn blocksize(&mut self) -> BlocksizeW { + BlocksizeW::new(self, 16) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] #[must_use] - pub fn doneien(&mut self) -> DONEIEN_W<20> { - DONEIEN_W::new(self) + pub fn doneien(&mut self) -> DoneienW { + DoneienW::new(self, 20) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] #[must_use] - pub fn reqmode(&mut self) -> REQMODE_W<21> { - REQMODE_W::new(self) + pub fn reqmode(&mut self) -> ReqmodeW { + ReqmodeW::new(self, 21) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] #[must_use] - pub fn decloopcnt(&mut self) -> DECLOOPCNT_W<22> { - DECLOOPCNT_W::new(self) + pub fn decloopcnt(&mut self) -> DecloopcntW { + DecloopcntW::new(self, 22) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] #[must_use] - pub fn ignoresreq(&mut self) -> IGNORESREQ_W<23> { - IGNORESREQ_W::new(self) + pub fn ignoresreq(&mut self) -> IgnoresreqW { + IgnoresreqW::new(self, 23) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] #[must_use] - pub fn srcinc(&mut self) -> SRCINC_W<24> { - SRCINC_W::new(self) + pub fn srcinc(&mut self) -> SrcincW { + SrcincW::new(self, 24) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SIZE_W<26> { - SIZE_W::new(self) + pub fn size(&mut self) -> SizeW { + SizeW::new(self, 26) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] #[must_use] - pub fn dstinc(&mut self) -> DSTINC_W<28> { - DSTINC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstinc(&mut self) -> DstincW { + DstincW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch6_ctrl](index.html) module"] -pub struct CH6_CTRL_SPEC; -impl crate::RegisterSpec for CH6_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch6CtrlSpec; +impl crate::RegisterSpec for Ch6CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch6_ctrl::R](R) reader structure"] -impl crate::Readable for CH6_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch6_ctrl::W](W) writer structure"] -impl crate::Writable for CH6_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch6_ctrl::R`](R) reader structure"] +impl crate::Readable for Ch6CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ch6_ctrl::W`](W) writer structure"] +impl crate::Writable for Ch6CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH6_CTRL to value 0"] -impl crate::Resettable for CH6_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch6CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch6_dst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch6_dst.rs index 6502f33..918b452 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch6_dst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch6_dst.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH6_DST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH6_DST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DSTADDR` reader - Destination Data Address"] -pub type DSTADDR_R = crate::FieldReader; +pub type DstaddrR = crate::FieldReader; #[doc = "Field `DSTADDR` writer - Destination Data Address"] -pub type DSTADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH6_DST_SPEC, u32, u32, 32, O>; +pub type DstaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] - pub fn dstaddr(&self) -> DSTADDR_R { - DSTADDR_R::new(self.bits) + pub fn dstaddr(&self) -> DstaddrR { + DstaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] #[must_use] - pub fn dstaddr(&mut self) -> DSTADDR_W<0> { - DSTADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstaddr(&mut self) -> DstaddrW { + DstaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch6_dst](index.html) module"] -pub struct CH6_DST_SPEC; -impl crate::RegisterSpec for CH6_DST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_dst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_dst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch6DstSpec; +impl crate::RegisterSpec for Ch6DstSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch6_dst::R](R) reader structure"] -impl crate::Readable for CH6_DST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch6_dst::W](W) writer structure"] -impl crate::Writable for CH6_DST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch6_dst::R`](R) reader structure"] +impl crate::Readable for Ch6DstSpec {} +#[doc = "`write(|w| ..)` method takes [`ch6_dst::W`](W) writer structure"] +impl crate::Writable for Ch6DstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH6_DST to value 0"] -impl crate::Resettable for CH6_DST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch6DstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch6_link.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch6_link.rs index 3353c82..b58f3b9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch6_link.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch6_link.rs @@ -1,136 +1,96 @@ #[doc = "Register `CH6_LINK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH6_LINK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] -pub type LINKMODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Link Structure Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LINKMODE_A { +pub enum Linkmode { #[doc = "0: The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LINKMODE_A) -> Self { + fn from(variant: Linkmode) -> Self { variant as u8 != 0 } } -impl LINKMODE_R { +#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] +pub type LinkmodeR = crate::BitReader; +impl LinkmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LINKMODE_A { + pub const fn variant(&self) -> Linkmode { match self.bits { - false => LINKMODE_A::ABSOLUTE, - true => LINKMODE_A::RELATIVE, + false => Linkmode::Absolute, + true => Linkmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == LINKMODE_A::ABSOLUTE + *self == Linkmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == LINKMODE_A::RELATIVE + *self == Linkmode::Relative } } #[doc = "Field `LINK` reader - Link Next Structure"] -pub type LINK_R = crate::BitReader; +pub type LinkR = crate::BitReader; #[doc = "Field `LINK` writer - Link Next Structure"] -pub type LINK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH6_LINK_SPEC, bool, O>; +pub type LinkW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LINKADDR` reader - Link Structure Address"] -pub type LINKADDR_R = crate::FieldReader; +pub type LinkaddrR = crate::FieldReader; #[doc = "Field `LINKADDR` writer - Link Structure Address"] -pub type LINKADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH6_LINK_SPEC, u32, u32, 30, O>; +pub type LinkaddrW<'a, REG> = crate::FieldWriter<'a, REG, 30, u32>; impl R { #[doc = "Bit 0 - Link Structure Addressing Mode"] #[inline(always)] - pub fn linkmode(&self) -> LINKMODE_R { - LINKMODE_R::new((self.bits & 1) != 0) + pub fn linkmode(&self) -> LinkmodeR { + LinkmodeR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] - pub fn link(&self) -> LINK_R { - LINK_R::new(((self.bits >> 1) & 1) != 0) + pub fn link(&self) -> LinkR { + LinkR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] - pub fn linkaddr(&self) -> LINKADDR_R { - LINKADDR_R::new((self.bits >> 2) & 0x3fff_ffff) + pub fn linkaddr(&self) -> LinkaddrR { + LinkaddrR::new((self.bits >> 2) & 0x3fff_ffff) } } impl W { #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] #[must_use] - pub fn link(&mut self) -> LINK_W<1> { - LINK_W::new(self) + pub fn link(&mut self) -> LinkW { + LinkW::new(self, 1) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] #[must_use] - pub fn linkaddr(&mut self) -> LINKADDR_W<2> { - LINKADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn linkaddr(&mut self) -> LinkaddrW { + LinkaddrW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch6_link](index.html) module"] -pub struct CH6_LINK_SPEC; -impl crate::RegisterSpec for CH6_LINK_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_link::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_link::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch6LinkSpec; +impl crate::RegisterSpec for Ch6LinkSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch6_link::R](R) reader structure"] -impl crate::Readable for CH6_LINK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch6_link::W](W) writer structure"] -impl crate::Writable for CH6_LINK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch6_link::R`](R) reader structure"] +impl crate::Readable for Ch6LinkSpec {} +#[doc = "`write(|w| ..)` method takes [`ch6_link::W`](W) writer structure"] +impl crate::Writable for Ch6LinkSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH6_LINK to value 0"] -impl crate::Resettable for CH6_LINK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch6LinkSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch6_loop.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch6_loop.rs index 15bcee4..3b5bf9f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch6_loop.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch6_loop.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH6_LOOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH6_LOOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOOPCNT` reader - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_R = crate::FieldReader; +pub type LoopcntR = crate::FieldReader; #[doc = "Field `LOOPCNT` writer - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH6_LOOP_SPEC, u8, u8, 8, O>; +pub type LoopcntW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] - pub fn loopcnt(&self) -> LOOPCNT_R { - LOOPCNT_R::new((self.bits & 0xff) as u8) + pub fn loopcnt(&self) -> LoopcntR { + LoopcntR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] #[must_use] - pub fn loopcnt(&mut self) -> LOOPCNT_W<0> { - LOOPCNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn loopcnt(&mut self) -> LoopcntW { + LoopcntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch6_loop](index.html) module"] -pub struct CH6_LOOP_SPEC; -impl crate::RegisterSpec for CH6_LOOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_loop::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_loop::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch6LoopSpec; +impl crate::RegisterSpec for Ch6LoopSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch6_loop::R](R) reader structure"] -impl crate::Readable for CH6_LOOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch6_loop::W](W) writer structure"] -impl crate::Writable for CH6_LOOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch6_loop::R`](R) reader structure"] +impl crate::Readable for Ch6LoopSpec {} +#[doc = "`write(|w| ..)` method takes [`ch6_loop::W`](W) writer structure"] +impl crate::Writable for Ch6LoopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH6_LOOP to value 0"] -impl crate::Resettable for CH6_LOOP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch6LoopSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch6_src.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch6_src.rs index f06f47d..5fc6b59 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch6_src.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch6_src.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH6_SRC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH6_SRC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SRCADDR` reader - Source Data Address"] -pub type SRCADDR_R = crate::FieldReader; +pub type SrcaddrR = crate::FieldReader; #[doc = "Field `SRCADDR` writer - Source Data Address"] -pub type SRCADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH6_SRC_SPEC, u32, u32, 32, O>; +pub type SrcaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] - pub fn srcaddr(&self) -> SRCADDR_R { - SRCADDR_R::new(self.bits) + pub fn srcaddr(&self) -> SrcaddrR { + SrcaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] #[must_use] - pub fn srcaddr(&mut self) -> SRCADDR_W<0> { - SRCADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn srcaddr(&mut self) -> SrcaddrW { + SrcaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch6_src](index.html) module"] -pub struct CH6_SRC_SPEC; -impl crate::RegisterSpec for CH6_SRC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_src::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_src::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch6SrcSpec; +impl crate::RegisterSpec for Ch6SrcSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch6_src::R](R) reader structure"] -impl crate::Readable for CH6_SRC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch6_src::W](W) writer structure"] -impl crate::Writable for CH6_SRC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch6_src::R`](R) reader structure"] +impl crate::Readable for Ch6SrcSpec {} +#[doc = "`write(|w| ..)` method takes [`ch6_src::W`](W) writer structure"] +impl crate::Writable for Ch6SrcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH6_SRC to value 0"] -impl crate::Resettable for CH6_SRC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch6SrcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch7_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch7_cfg.rs index 1101cbe..5b4ed67 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch7_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch7_cfg.rs @@ -1,277 +1,250 @@ #[doc = "Register `CH7_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH7_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] -pub type ARBSLOTS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Arbitration Slot Number Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ARBSLOTS_A { +pub enum Arbslots { #[doc = "0: One arbitration slot selected"] - ONE = 0, + One = 0, #[doc = "1: Two arbitration slots selected"] - TWO = 1, + Two = 1, #[doc = "2: Four arbitration slots selected"] - FOUR = 2, + Four = 2, #[doc = "3: Eight arbitration slots selected"] - EIGHT = 3, + Eight = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ARBSLOTS_A) -> Self { + fn from(variant: Arbslots) -> Self { variant as _ } } -impl ARBSLOTS_R { +impl crate::FieldSpec for Arbslots { + type Ux = u8; +} +impl crate::IsEnum for Arbslots {} +#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] +pub type ArbslotsR = crate::FieldReader; +impl ArbslotsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ARBSLOTS_A { + pub const fn variant(&self) -> Arbslots { match self.bits { - 0 => ARBSLOTS_A::ONE, - 1 => ARBSLOTS_A::TWO, - 2 => ARBSLOTS_A::FOUR, - 3 => ARBSLOTS_A::EIGHT, + 0 => Arbslots::One, + 1 => Arbslots::Two, + 2 => Arbslots::Four, + 3 => Arbslots::Eight, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "One arbitration slot selected"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == ARBSLOTS_A::ONE + *self == Arbslots::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Two arbitration slots selected"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == ARBSLOTS_A::TWO + *self == Arbslots::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Four arbitration slots selected"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == ARBSLOTS_A::FOUR + *self == Arbslots::Four } - #[doc = "Checks if the value of the field is `EIGHT`"] + #[doc = "Eight arbitration slots selected"] #[inline(always)] pub fn is_eight(&self) -> bool { - *self == ARBSLOTS_A::EIGHT + *self == Arbslots::Eight } } #[doc = "Field `ARBSLOTS` writer - Arbitration Slot Number Select"] -pub type ARBSLOTS_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH7_CFG_SPEC, u8, ARBSLOTS_A, 2, O>; -impl<'a, const O: u8> ARBSLOTS_W<'a, O> { +pub type ArbslotsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Arbslots, crate::Safe>; +impl<'a, REG> ArbslotsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One arbitration slot selected"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(ARBSLOTS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Arbslots::One) } #[doc = "Two arbitration slots selected"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(ARBSLOTS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Arbslots::Two) } #[doc = "Four arbitration slots selected"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(ARBSLOTS_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Arbslots::Four) } #[doc = "Eight arbitration slots selected"] #[inline(always)] - pub fn eight(self) -> &'a mut W { - self.variant(ARBSLOTS_A::EIGHT) + pub fn eight(self) -> &'a mut crate::W { + self.variant(Arbslots::Eight) } } -#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] -pub type SRCINCSIGN_R = crate::BitReader; #[doc = "Source Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCINCSIGN_A { +pub enum Srcincsign { #[doc = "0: Increment source address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement source address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCINCSIGN_A) -> Self { + fn from(variant: Srcincsign) -> Self { variant as u8 != 0 } } -impl SRCINCSIGN_R { +#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] +pub type SrcincsignR = crate::BitReader; +impl SrcincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINCSIGN_A { + pub const fn variant(&self) -> Srcincsign { match self.bits { - false => SRCINCSIGN_A::POSITIVE, - true => SRCINCSIGN_A::NEGATIVE, + false => Srcincsign::Positive, + true => Srcincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment source address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == SRCINCSIGN_A::POSITIVE + *self == Srcincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement source address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == SRCINCSIGN_A::NEGATIVE + *self == Srcincsign::Negative } } #[doc = "Field `SRCINCSIGN` writer - Source Address Increment Sign"] -pub type SRCINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH7_CFG_SPEC, SRCINCSIGN_A, O>; -impl<'a, const O: u8> SRCINCSIGN_W<'a, O> { +pub type SrcincsignW<'a, REG> = crate::BitWriter<'a, REG, Srcincsign>; +impl<'a, REG> SrcincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment source address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Srcincsign::Positive) } #[doc = "Decrement source address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Srcincsign::Negative) } } -#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] -pub type DSTINCSIGN_R = crate::BitReader; #[doc = "Destination Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTINCSIGN_A { +pub enum Dstincsign { #[doc = "0: Increment destination address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement destination address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTINCSIGN_A) -> Self { + fn from(variant: Dstincsign) -> Self { variant as u8 != 0 } } -impl DSTINCSIGN_R { +#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] +pub type DstincsignR = crate::BitReader; +impl DstincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINCSIGN_A { + pub const fn variant(&self) -> Dstincsign { match self.bits { - false => DSTINCSIGN_A::POSITIVE, - true => DSTINCSIGN_A::NEGATIVE, + false => Dstincsign::Positive, + true => Dstincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment destination address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == DSTINCSIGN_A::POSITIVE + *self == Dstincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement destination address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == DSTINCSIGN_A::NEGATIVE + *self == Dstincsign::Negative } } #[doc = "Field `DSTINCSIGN` writer - Destination Address Increment Sign"] -pub type DSTINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH7_CFG_SPEC, DSTINCSIGN_A, O>; -impl<'a, const O: u8> DSTINCSIGN_W<'a, O> { +pub type DstincsignW<'a, REG> = crate::BitWriter<'a, REG, Dstincsign>; +impl<'a, REG> DstincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment destination address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Dstincsign::Positive) } #[doc = "Decrement destination address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Dstincsign::Negative) } } impl R { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] - pub fn arbslots(&self) -> ARBSLOTS_R { - ARBSLOTS_R::new(((self.bits >> 16) & 3) as u8) + pub fn arbslots(&self) -> ArbslotsR { + ArbslotsR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] - pub fn srcincsign(&self) -> SRCINCSIGN_R { - SRCINCSIGN_R::new(((self.bits >> 20) & 1) != 0) + pub fn srcincsign(&self) -> SrcincsignR { + SrcincsignR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] - pub fn dstincsign(&self) -> DSTINCSIGN_R { - DSTINCSIGN_R::new(((self.bits >> 21) & 1) != 0) + pub fn dstincsign(&self) -> DstincsignR { + DstincsignR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] #[must_use] - pub fn arbslots(&mut self) -> ARBSLOTS_W<16> { - ARBSLOTS_W::new(self) + pub fn arbslots(&mut self) -> ArbslotsW { + ArbslotsW::new(self, 16) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] #[must_use] - pub fn srcincsign(&mut self) -> SRCINCSIGN_W<20> { - SRCINCSIGN_W::new(self) + pub fn srcincsign(&mut self) -> SrcincsignW { + SrcincsignW::new(self, 20) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] #[must_use] - pub fn dstincsign(&mut self) -> DSTINCSIGN_W<21> { - DSTINCSIGN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstincsign(&mut self) -> DstincsignW { + DstincsignW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch7_cfg](index.html) module"] -pub struct CH7_CFG_SPEC; -impl crate::RegisterSpec for CH7_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch7CfgSpec; +impl crate::RegisterSpec for Ch7CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch7_cfg::R](R) reader structure"] -impl crate::Readable for CH7_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch7_cfg::W](W) writer structure"] -impl crate::Writable for CH7_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch7_cfg::R`](R) reader structure"] +impl crate::Readable for Ch7CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`ch7_cfg::W`](W) writer structure"] +impl crate::Writable for Ch7CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH7_CFG to value 0"] -impl crate::Resettable for CH7_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch7CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch7_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch7_ctrl.rs index 2a8baee..5d289f3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch7_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch7_ctrl.rs @@ -1,843 +1,842 @@ #[doc = "Register `CH7_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH7_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] -pub type STRUCTTYPE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DMA Structure Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STRUCTTYPE_A { +pub enum Structtype { #[doc = "0: DMA transfer structure type selected."] - TRANSFER = 0, + Transfer = 0, #[doc = "1: Synchronization structure type selected."] - SYNCHRONIZE = 1, + Synchronize = 1, #[doc = "2: Write immediate value structure type selected."] - WRITE = 2, + Write = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STRUCTTYPE_A) -> Self { + fn from(variant: Structtype) -> Self { variant as _ } } -impl STRUCTTYPE_R { +impl crate::FieldSpec for Structtype { + type Ux = u8; +} +impl crate::IsEnum for Structtype {} +#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] +pub type StructtypeR = crate::FieldReader; +impl StructtypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(STRUCTTYPE_A::TRANSFER), - 1 => Some(STRUCTTYPE_A::SYNCHRONIZE), - 2 => Some(STRUCTTYPE_A::WRITE), + 0 => Some(Structtype::Transfer), + 1 => Some(Structtype::Synchronize), + 2 => Some(Structtype::Write), _ => None, } } - #[doc = "Checks if the value of the field is `TRANSFER`"] + #[doc = "DMA transfer structure type selected."] #[inline(always)] pub fn is_transfer(&self) -> bool { - *self == STRUCTTYPE_A::TRANSFER + *self == Structtype::Transfer } - #[doc = "Checks if the value of the field is `SYNCHRONIZE`"] + #[doc = "Synchronization structure type selected."] #[inline(always)] pub fn is_synchronize(&self) -> bool { - *self == STRUCTTYPE_A::SYNCHRONIZE + *self == Structtype::Synchronize } - #[doc = "Checks if the value of the field is `WRITE`"] + #[doc = "Write immediate value structure type selected."] #[inline(always)] pub fn is_write(&self) -> bool { - *self == STRUCTTYPE_A::WRITE + *self == Structtype::Write } } #[doc = "Field `STRUCTTYPE` writer - DMA Structure Type"] -pub type STRUCTTYPE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH7_CTRL_SPEC, u8, STRUCTTYPE_A, 2, O>; -impl<'a, const O: u8> STRUCTTYPE_W<'a, O> { +pub type StructtypeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Structtype>; +impl<'a, REG> StructtypeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "DMA transfer structure type selected."] #[inline(always)] - pub fn transfer(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::TRANSFER) + pub fn transfer(self) -> &'a mut crate::W { + self.variant(Structtype::Transfer) } #[doc = "Synchronization structure type selected."] #[inline(always)] - pub fn synchronize(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::SYNCHRONIZE) + pub fn synchronize(self) -> &'a mut crate::W { + self.variant(Structtype::Synchronize) } #[doc = "Write immediate value structure type selected."] #[inline(always)] - pub fn write(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::WRITE) + pub fn write(self) -> &'a mut crate::W { + self.variant(Structtype::Write) } } #[doc = "Field `STRUCTREQ` reader - Structure DMA Transfer Request"] -pub type STRUCTREQ_R = crate::BitReader; +pub type StructreqR = crate::BitReader; #[doc = "Field `XFERCNT` reader - DMA Unit Data Transfer Count"] -pub type XFERCNT_R = crate::FieldReader; +pub type XfercntR = crate::FieldReader; #[doc = "Field `XFERCNT` writer - DMA Unit Data Transfer Count"] -pub type XFERCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH7_CTRL_SPEC, u16, u16, 11, O>; +pub type XfercntW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `BYTESWAP` reader - Endian Byte Swap"] -pub type BYTESWAP_R = crate::BitReader; +pub type ByteswapR = crate::BitReader; #[doc = "Field `BYTESWAP` writer - Endian Byte Swap"] -pub type BYTESWAP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH7_CTRL_SPEC, bool, O>; -#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] -pub type BLOCKSIZE_R = crate::FieldReader; +pub type ByteswapW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Block Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BLOCKSIZE_A { +pub enum Blocksize { #[doc = "0: One unit transfer per arbitration"] - UNIT1 = 0, + Unit1 = 0, #[doc = "1: Two unit transfers per arbitration"] - UNIT2 = 1, + Unit2 = 1, #[doc = "2: Three unit transfers per arbitration"] - UNIT3 = 2, + Unit3 = 2, #[doc = "3: Four unit transfers per arbitration"] - UNIT4 = 3, + Unit4 = 3, #[doc = "4: Six unit transfers per arbitration"] - UNIT6 = 4, + Unit6 = 4, #[doc = "5: Eight unit transfers per arbitration"] - UNIT8 = 5, + Unit8 = 5, #[doc = "7: Sixteen unit transfers per arbitration"] - UNIT16 = 7, + Unit16 = 7, #[doc = "9: 32 unit transfers per arbitration"] - UNIT32 = 9, + Unit32 = 9, #[doc = "10: 64 unit transfers per arbitration"] - UNIT64 = 10, + Unit64 = 10, #[doc = "11: 128 unit transfers per arbitration"] - UNIT128 = 11, + Unit128 = 11, #[doc = "12: 256 unit transfers per arbitration"] - UNIT256 = 12, + Unit256 = 12, #[doc = "13: 512 unit transfers per arbitration"] - UNIT512 = 13, + Unit512 = 13, #[doc = "14: 1024 unit transfers per arbitration"] - UNIT1024 = 14, + Unit1024 = 14, #[doc = "15: Transfer all units as specified by the XFRCNT field"] - ALL = 15, + All = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BLOCKSIZE_A) -> Self { + fn from(variant: Blocksize) -> Self { variant as _ } } -impl BLOCKSIZE_R { +impl crate::FieldSpec for Blocksize { + type Ux = u8; +} +impl crate::IsEnum for Blocksize {} +#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] +pub type BlocksizeR = crate::FieldReader; +impl BlocksizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BLOCKSIZE_A::UNIT1), - 1 => Some(BLOCKSIZE_A::UNIT2), - 2 => Some(BLOCKSIZE_A::UNIT3), - 3 => Some(BLOCKSIZE_A::UNIT4), - 4 => Some(BLOCKSIZE_A::UNIT6), - 5 => Some(BLOCKSIZE_A::UNIT8), - 7 => Some(BLOCKSIZE_A::UNIT16), - 9 => Some(BLOCKSIZE_A::UNIT32), - 10 => Some(BLOCKSIZE_A::UNIT64), - 11 => Some(BLOCKSIZE_A::UNIT128), - 12 => Some(BLOCKSIZE_A::UNIT256), - 13 => Some(BLOCKSIZE_A::UNIT512), - 14 => Some(BLOCKSIZE_A::UNIT1024), - 15 => Some(BLOCKSIZE_A::ALL), + 0 => Some(Blocksize::Unit1), + 1 => Some(Blocksize::Unit2), + 2 => Some(Blocksize::Unit3), + 3 => Some(Blocksize::Unit4), + 4 => Some(Blocksize::Unit6), + 5 => Some(Blocksize::Unit8), + 7 => Some(Blocksize::Unit16), + 9 => Some(Blocksize::Unit32), + 10 => Some(Blocksize::Unit64), + 11 => Some(Blocksize::Unit128), + 12 => Some(Blocksize::Unit256), + 13 => Some(Blocksize::Unit512), + 14 => Some(Blocksize::Unit1024), + 15 => Some(Blocksize::All), _ => None, } } - #[doc = "Checks if the value of the field is `UNIT1`"] + #[doc = "One unit transfer per arbitration"] #[inline(always)] pub fn is_unit1(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1 + *self == Blocksize::Unit1 } - #[doc = "Checks if the value of the field is `UNIT2`"] + #[doc = "Two unit transfers per arbitration"] #[inline(always)] pub fn is_unit2(&self) -> bool { - *self == BLOCKSIZE_A::UNIT2 + *self == Blocksize::Unit2 } - #[doc = "Checks if the value of the field is `UNIT3`"] + #[doc = "Three unit transfers per arbitration"] #[inline(always)] pub fn is_unit3(&self) -> bool { - *self == BLOCKSIZE_A::UNIT3 + *self == Blocksize::Unit3 } - #[doc = "Checks if the value of the field is `UNIT4`"] + #[doc = "Four unit transfers per arbitration"] #[inline(always)] pub fn is_unit4(&self) -> bool { - *self == BLOCKSIZE_A::UNIT4 + *self == Blocksize::Unit4 } - #[doc = "Checks if the value of the field is `UNIT6`"] + #[doc = "Six unit transfers per arbitration"] #[inline(always)] pub fn is_unit6(&self) -> bool { - *self == BLOCKSIZE_A::UNIT6 + *self == Blocksize::Unit6 } - #[doc = "Checks if the value of the field is `UNIT8`"] + #[doc = "Eight unit transfers per arbitration"] #[inline(always)] pub fn is_unit8(&self) -> bool { - *self == BLOCKSIZE_A::UNIT8 + *self == Blocksize::Unit8 } - #[doc = "Checks if the value of the field is `UNIT16`"] + #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] pub fn is_unit16(&self) -> bool { - *self == BLOCKSIZE_A::UNIT16 + *self == Blocksize::Unit16 } - #[doc = "Checks if the value of the field is `UNIT32`"] + #[doc = "32 unit transfers per arbitration"] #[inline(always)] pub fn is_unit32(&self) -> bool { - *self == BLOCKSIZE_A::UNIT32 + *self == Blocksize::Unit32 } - #[doc = "Checks if the value of the field is `UNIT64`"] + #[doc = "64 unit transfers per arbitration"] #[inline(always)] pub fn is_unit64(&self) -> bool { - *self == BLOCKSIZE_A::UNIT64 + *self == Blocksize::Unit64 } - #[doc = "Checks if the value of the field is `UNIT128`"] + #[doc = "128 unit transfers per arbitration"] #[inline(always)] pub fn is_unit128(&self) -> bool { - *self == BLOCKSIZE_A::UNIT128 + *self == Blocksize::Unit128 } - #[doc = "Checks if the value of the field is `UNIT256`"] + #[doc = "256 unit transfers per arbitration"] #[inline(always)] pub fn is_unit256(&self) -> bool { - *self == BLOCKSIZE_A::UNIT256 + *self == Blocksize::Unit256 } - #[doc = "Checks if the value of the field is `UNIT512`"] + #[doc = "512 unit transfers per arbitration"] #[inline(always)] pub fn is_unit512(&self) -> bool { - *self == BLOCKSIZE_A::UNIT512 + *self == Blocksize::Unit512 } - #[doc = "Checks if the value of the field is `UNIT1024`"] + #[doc = "1024 unit transfers per arbitration"] #[inline(always)] pub fn is_unit1024(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1024 + *self == Blocksize::Unit1024 } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] pub fn is_all(&self) -> bool { - *self == BLOCKSIZE_A::ALL + *self == Blocksize::All } } #[doc = "Field `BLOCKSIZE` writer - Block Transfer Size"] -pub type BLOCKSIZE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH7_CTRL_SPEC, u8, BLOCKSIZE_A, 4, O>; -impl<'a, const O: u8> BLOCKSIZE_W<'a, O> { +pub type BlocksizeW<'a, REG> = crate::FieldWriter<'a, REG, 4, Blocksize>; +impl<'a, REG> BlocksizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One unit transfer per arbitration"] #[inline(always)] - pub fn unit1(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1) + pub fn unit1(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1) } #[doc = "Two unit transfers per arbitration"] #[inline(always)] - pub fn unit2(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT2) + pub fn unit2(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit2) } #[doc = "Three unit transfers per arbitration"] #[inline(always)] - pub fn unit3(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT3) + pub fn unit3(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit3) } #[doc = "Four unit transfers per arbitration"] #[inline(always)] - pub fn unit4(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT4) + pub fn unit4(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit4) } #[doc = "Six unit transfers per arbitration"] #[inline(always)] - pub fn unit6(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT6) + pub fn unit6(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit6) } #[doc = "Eight unit transfers per arbitration"] #[inline(always)] - pub fn unit8(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT8) + pub fn unit8(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit8) } #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] - pub fn unit16(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT16) + pub fn unit16(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit16) } #[doc = "32 unit transfers per arbitration"] #[inline(always)] - pub fn unit32(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT32) + pub fn unit32(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit32) } #[doc = "64 unit transfers per arbitration"] #[inline(always)] - pub fn unit64(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT64) + pub fn unit64(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit64) } #[doc = "128 unit transfers per arbitration"] #[inline(always)] - pub fn unit128(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT128) + pub fn unit128(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit128) } #[doc = "256 unit transfers per arbitration"] #[inline(always)] - pub fn unit256(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT256) + pub fn unit256(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit256) } #[doc = "512 unit transfers per arbitration"] #[inline(always)] - pub fn unit512(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT512) + pub fn unit512(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit512) } #[doc = "1024 unit transfers per arbitration"] #[inline(always)] - pub fn unit1024(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1024) + pub fn unit1024(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1024) } #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Blocksize::All) } } #[doc = "Field `DONEIEN` reader - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_R = crate::BitReader; +pub type DoneienR = crate::BitReader; #[doc = "Field `DONEIEN` writer - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH7_CTRL_SPEC, bool, O>; -#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] -pub type REQMODE_R = crate::BitReader; +pub type DoneienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "DMA Request Transfer Mode Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REQMODE_A { +pub enum Reqmode { #[doc = "0: The LDMA transfers one BLOCKSIZE per transfer request."] - BLOCK = 0, + Block = 0, #[doc = "1: One transfer request transfers all units as defined by the XFRCNT field."] - ALL = 1, + All = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REQMODE_A) -> Self { + fn from(variant: Reqmode) -> Self { variant as u8 != 0 } } -impl REQMODE_R { +#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] +pub type ReqmodeR = crate::BitReader; +impl ReqmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REQMODE_A { + pub const fn variant(&self) -> Reqmode { match self.bits { - false => REQMODE_A::BLOCK, - true => REQMODE_A::ALL, + false => Reqmode::Block, + true => Reqmode::All, } } - #[doc = "Checks if the value of the field is `BLOCK`"] + #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] pub fn is_block(&self) -> bool { - *self == REQMODE_A::BLOCK + *self == Reqmode::Block } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] pub fn is_all(&self) -> bool { - *self == REQMODE_A::ALL + *self == Reqmode::All } } #[doc = "Field `REQMODE` writer - DMA Request Transfer Mode Select"] -pub type REQMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH7_CTRL_SPEC, REQMODE_A, O>; -impl<'a, const O: u8> REQMODE_W<'a, O> { +pub type ReqmodeW<'a, REG> = crate::BitWriter<'a, REG, Reqmode>; +impl<'a, REG> ReqmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] - pub fn block(self) -> &'a mut W { - self.variant(REQMODE_A::BLOCK) + pub fn block(self) -> &'a mut crate::W { + self.variant(Reqmode::Block) } #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(REQMODE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Reqmode::All) } } #[doc = "Field `DECLOOPCNT` reader - Decrement Loop Count"] -pub type DECLOOPCNT_R = crate::BitReader; +pub type DecloopcntR = crate::BitReader; #[doc = "Field `DECLOOPCNT` writer - Decrement Loop Count"] -pub type DECLOOPCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH7_CTRL_SPEC, bool, O>; +pub type DecloopcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IGNORESREQ` reader - Ignore Sreq"] -pub type IGNORESREQ_R = crate::BitReader; +pub type IgnoresreqR = crate::BitReader; #[doc = "Field `IGNORESREQ` writer - Ignore Sreq"] -pub type IGNORESREQ_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH7_CTRL_SPEC, bool, O>; -#[doc = "Field `SRCINC` reader - Source Address Increment Size"] -pub type SRCINC_R = crate::FieldReader; +pub type IgnoresreqW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SRCINC_A { +pub enum Srcinc { #[doc = "0: Increment source address by one unit data size after each read"] - ONE = 0, + One = 0, #[doc = "1: Increment source address by two unit data sizes after each read"] - TWO = 1, + Two = 1, #[doc = "2: Increment source address by four unit data sizes after each read"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SRCINC_A) -> Self { + fn from(variant: Srcinc) -> Self { variant as _ } } -impl SRCINC_R { +impl crate::FieldSpec for Srcinc { + type Ux = u8; +} +impl crate::IsEnum for Srcinc {} +#[doc = "Field `SRCINC` reader - Source Address Increment Size"] +pub type SrcincR = crate::FieldReader; +impl SrcincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINC_A { + pub const fn variant(&self) -> Srcinc { match self.bits { - 0 => SRCINC_A::ONE, - 1 => SRCINC_A::TWO, - 2 => SRCINC_A::FOUR, - 3 => SRCINC_A::NONE, + 0 => Srcinc::One, + 1 => Srcinc::Two, + 2 => Srcinc::Four, + 3 => Srcinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == SRCINC_A::ONE + *self == Srcinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == SRCINC_A::TWO + *self == Srcinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == SRCINC_A::FOUR + *self == Srcinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SRCINC_A::NONE + *self == Srcinc::None } } #[doc = "Field `SRCINC` writer - Source Address Increment Size"] -pub type SRCINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH7_CTRL_SPEC, u8, SRCINC_A, 2, O>; -impl<'a, const O: u8> SRCINC_W<'a, O> { +pub type SrcincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Srcinc, crate::Safe>; +impl<'a, REG> SrcincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(SRCINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Srcinc::One) } #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(SRCINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Srcinc::Two) } #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(SRCINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Srcinc::Four) } #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SRCINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Srcinc::None) } } -#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] -pub type SIZE_R = crate::FieldReader; #[doc = "Unit Data Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIZE_A { +pub enum Size { #[doc = "0: Each unit transfer is a byte"] - BYTE = 0, + Byte = 0, #[doc = "1: Each unit transfer is a half-word"] - HALFWORD = 1, + Halfword = 1, #[doc = "2: Each unit transfer is a word"] - WORD = 2, + Word = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIZE_A) -> Self { + fn from(variant: Size) -> Self { variant as _ } } -impl SIZE_R { +impl crate::FieldSpec for Size { + type Ux = u8; +} +impl crate::IsEnum for Size {} +#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] +pub type SizeR = crate::FieldReader; +impl SizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIZE_A::BYTE), - 1 => Some(SIZE_A::HALFWORD), - 2 => Some(SIZE_A::WORD), + 0 => Some(Size::Byte), + 1 => Some(Size::Halfword), + 2 => Some(Size::Word), _ => None, } } - #[doc = "Checks if the value of the field is `BYTE`"] + #[doc = "Each unit transfer is a byte"] #[inline(always)] pub fn is_byte(&self) -> bool { - *self == SIZE_A::BYTE + *self == Size::Byte } - #[doc = "Checks if the value of the field is `HALFWORD`"] + #[doc = "Each unit transfer is a half-word"] #[inline(always)] pub fn is_halfword(&self) -> bool { - *self == SIZE_A::HALFWORD + *self == Size::Halfword } - #[doc = "Checks if the value of the field is `WORD`"] + #[doc = "Each unit transfer is a word"] #[inline(always)] pub fn is_word(&self) -> bool { - *self == SIZE_A::WORD + *self == Size::Word } } #[doc = "Field `SIZE` writer - Unit Data Transfer Size"] -pub type SIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH7_CTRL_SPEC, u8, SIZE_A, 2, O>; -impl<'a, const O: u8> SIZE_W<'a, O> { +pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Size>; +impl<'a, REG> SizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Each unit transfer is a byte"] #[inline(always)] - pub fn byte(self) -> &'a mut W { - self.variant(SIZE_A::BYTE) + pub fn byte(self) -> &'a mut crate::W { + self.variant(Size::Byte) } #[doc = "Each unit transfer is a half-word"] #[inline(always)] - pub fn halfword(self) -> &'a mut W { - self.variant(SIZE_A::HALFWORD) + pub fn halfword(self) -> &'a mut crate::W { + self.variant(Size::Halfword) } #[doc = "Each unit transfer is a word"] #[inline(always)] - pub fn word(self) -> &'a mut W { - self.variant(SIZE_A::WORD) + pub fn word(self) -> &'a mut crate::W { + self.variant(Size::Word) } } -#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] -pub type DSTINC_R = crate::FieldReader; #[doc = "Destination Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DSTINC_A { +pub enum Dstinc { #[doc = "0: Increment destination address by one unit data size after each write"] - ONE = 0, + One = 0, #[doc = "1: Increment destination address by two unit data sizes after each write"] - TWO = 1, + Two = 1, #[doc = "2: Increment destination address by four unit data sizes after each write"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DSTINC_A) -> Self { + fn from(variant: Dstinc) -> Self { variant as _ } } -impl DSTINC_R { +impl crate::FieldSpec for Dstinc { + type Ux = u8; +} +impl crate::IsEnum for Dstinc {} +#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] +pub type DstincR = crate::FieldReader; +impl DstincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINC_A { + pub const fn variant(&self) -> Dstinc { match self.bits { - 0 => DSTINC_A::ONE, - 1 => DSTINC_A::TWO, - 2 => DSTINC_A::FOUR, - 3 => DSTINC_A::NONE, + 0 => Dstinc::One, + 1 => Dstinc::Two, + 2 => Dstinc::Four, + 3 => Dstinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == DSTINC_A::ONE + *self == Dstinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == DSTINC_A::TWO + *self == Dstinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == DSTINC_A::FOUR + *self == Dstinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == DSTINC_A::NONE + *self == Dstinc::None } } #[doc = "Field `DSTINC` writer - Destination Address Increment Size"] -pub type DSTINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH7_CTRL_SPEC, u8, DSTINC_A, 2, O>; -impl<'a, const O: u8> DSTINC_W<'a, O> { +pub type DstincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dstinc, crate::Safe>; +impl<'a, REG> DstincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(DSTINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Dstinc::One) } #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(DSTINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Dstinc::Two) } #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(DSTINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Dstinc::Four) } #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(DSTINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Dstinc::None) } } -#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] -pub type SRCMODE_R = crate::BitReader; #[doc = "Source Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCMODE_A { +pub enum Srcmode { #[doc = "0: The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCMODE_A) -> Self { + fn from(variant: Srcmode) -> Self { variant as u8 != 0 } } -impl SRCMODE_R { +#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] +pub type SrcmodeR = crate::BitReader; +impl SrcmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCMODE_A { + pub const fn variant(&self) -> Srcmode { match self.bits { - false => SRCMODE_A::ABSOLUTE, - true => SRCMODE_A::RELATIVE, + false => Srcmode::Absolute, + true => Srcmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == SRCMODE_A::ABSOLUTE + *self == Srcmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == SRCMODE_A::RELATIVE + *self == Srcmode::Relative } } -#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] -pub type DSTMODE_R = crate::BitReader; #[doc = "Destination Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTMODE_A { +pub enum Dstmode { #[doc = "0: The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTMODE_A) -> Self { + fn from(variant: Dstmode) -> Self { variant as u8 != 0 } } -impl DSTMODE_R { +#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] +pub type DstmodeR = crate::BitReader; +impl DstmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTMODE_A { + pub const fn variant(&self) -> Dstmode { match self.bits { - false => DSTMODE_A::ABSOLUTE, - true => DSTMODE_A::RELATIVE, + false => Dstmode::Absolute, + true => Dstmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == DSTMODE_A::ABSOLUTE + *self == Dstmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == DSTMODE_A::RELATIVE + *self == Dstmode::Relative } } impl R { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] - pub fn structtype(&self) -> STRUCTTYPE_R { - STRUCTTYPE_R::new((self.bits & 3) as u8) + pub fn structtype(&self) -> StructtypeR { + StructtypeR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Structure DMA Transfer Request"] #[inline(always)] - pub fn structreq(&self) -> STRUCTREQ_R { - STRUCTREQ_R::new(((self.bits >> 3) & 1) != 0) + pub fn structreq(&self) -> StructreqR { + StructreqR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] - pub fn xfercnt(&self) -> XFERCNT_R { - XFERCNT_R::new(((self.bits >> 4) & 0x07ff) as u16) + pub fn xfercnt(&self) -> XfercntR { + XfercntR::new(((self.bits >> 4) & 0x07ff) as u16) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] - pub fn byteswap(&self) -> BYTESWAP_R { - BYTESWAP_R::new(((self.bits >> 15) & 1) != 0) + pub fn byteswap(&self) -> ByteswapR { + ByteswapR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] - pub fn blocksize(&self) -> BLOCKSIZE_R { - BLOCKSIZE_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn blocksize(&self) -> BlocksizeR { + BlocksizeR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] - pub fn doneien(&self) -> DONEIEN_R { - DONEIEN_R::new(((self.bits >> 20) & 1) != 0) + pub fn doneien(&self) -> DoneienR { + DoneienR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] - pub fn reqmode(&self) -> REQMODE_R { - REQMODE_R::new(((self.bits >> 21) & 1) != 0) + pub fn reqmode(&self) -> ReqmodeR { + ReqmodeR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] - pub fn decloopcnt(&self) -> DECLOOPCNT_R { - DECLOOPCNT_R::new(((self.bits >> 22) & 1) != 0) + pub fn decloopcnt(&self) -> DecloopcntR { + DecloopcntR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] - pub fn ignoresreq(&self) -> IGNORESREQ_R { - IGNORESREQ_R::new(((self.bits >> 23) & 1) != 0) + pub fn ignoresreq(&self) -> IgnoresreqR { + IgnoresreqR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] - pub fn srcinc(&self) -> SRCINC_R { - SRCINC_R::new(((self.bits >> 24) & 3) as u8) + pub fn srcinc(&self) -> SrcincR { + SrcincR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] - pub fn size(&self) -> SIZE_R { - SIZE_R::new(((self.bits >> 26) & 3) as u8) + pub fn size(&self) -> SizeR { + SizeR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] - pub fn dstinc(&self) -> DSTINC_R { - DSTINC_R::new(((self.bits >> 28) & 3) as u8) + pub fn dstinc(&self) -> DstincR { + DstincR::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bit 30 - Source Addressing Mode"] #[inline(always)] - pub fn srcmode(&self) -> SRCMODE_R { - SRCMODE_R::new(((self.bits >> 30) & 1) != 0) + pub fn srcmode(&self) -> SrcmodeR { + SrcmodeR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Destination Addressing Mode"] #[inline(always)] - pub fn dstmode(&self) -> DSTMODE_R { - DSTMODE_R::new(((self.bits >> 31) & 1) != 0) + pub fn dstmode(&self) -> DstmodeR { + DstmodeR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] #[must_use] - pub fn structtype(&mut self) -> STRUCTTYPE_W<0> { - STRUCTTYPE_W::new(self) + pub fn structtype(&mut self) -> StructtypeW { + StructtypeW::new(self, 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] #[must_use] - pub fn xfercnt(&mut self) -> XFERCNT_W<4> { - XFERCNT_W::new(self) + pub fn xfercnt(&mut self) -> XfercntW { + XfercntW::new(self, 4) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] #[must_use] - pub fn byteswap(&mut self) -> BYTESWAP_W<15> { - BYTESWAP_W::new(self) + pub fn byteswap(&mut self) -> ByteswapW { + ByteswapW::new(self, 15) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] #[must_use] - pub fn blocksize(&mut self) -> BLOCKSIZE_W<16> { - BLOCKSIZE_W::new(self) + pub fn blocksize(&mut self) -> BlocksizeW { + BlocksizeW::new(self, 16) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] #[must_use] - pub fn doneien(&mut self) -> DONEIEN_W<20> { - DONEIEN_W::new(self) + pub fn doneien(&mut self) -> DoneienW { + DoneienW::new(self, 20) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] #[must_use] - pub fn reqmode(&mut self) -> REQMODE_W<21> { - REQMODE_W::new(self) + pub fn reqmode(&mut self) -> ReqmodeW { + ReqmodeW::new(self, 21) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] #[must_use] - pub fn decloopcnt(&mut self) -> DECLOOPCNT_W<22> { - DECLOOPCNT_W::new(self) + pub fn decloopcnt(&mut self) -> DecloopcntW { + DecloopcntW::new(self, 22) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] #[must_use] - pub fn ignoresreq(&mut self) -> IGNORESREQ_W<23> { - IGNORESREQ_W::new(self) + pub fn ignoresreq(&mut self) -> IgnoresreqW { + IgnoresreqW::new(self, 23) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] #[must_use] - pub fn srcinc(&mut self) -> SRCINC_W<24> { - SRCINC_W::new(self) + pub fn srcinc(&mut self) -> SrcincW { + SrcincW::new(self, 24) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SIZE_W<26> { - SIZE_W::new(self) + pub fn size(&mut self) -> SizeW { + SizeW::new(self, 26) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] #[must_use] - pub fn dstinc(&mut self) -> DSTINC_W<28> { - DSTINC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstinc(&mut self) -> DstincW { + DstincW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch7_ctrl](index.html) module"] -pub struct CH7_CTRL_SPEC; -impl crate::RegisterSpec for CH7_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch7CtrlSpec; +impl crate::RegisterSpec for Ch7CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch7_ctrl::R](R) reader structure"] -impl crate::Readable for CH7_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch7_ctrl::W](W) writer structure"] -impl crate::Writable for CH7_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch7_ctrl::R`](R) reader structure"] +impl crate::Readable for Ch7CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ch7_ctrl::W`](W) writer structure"] +impl crate::Writable for Ch7CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH7_CTRL to value 0"] -impl crate::Resettable for CH7_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch7CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch7_dst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch7_dst.rs index 491f3c6..b6e917a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch7_dst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch7_dst.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH7_DST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH7_DST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DSTADDR` reader - Destination Data Address"] -pub type DSTADDR_R = crate::FieldReader; +pub type DstaddrR = crate::FieldReader; #[doc = "Field `DSTADDR` writer - Destination Data Address"] -pub type DSTADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH7_DST_SPEC, u32, u32, 32, O>; +pub type DstaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] - pub fn dstaddr(&self) -> DSTADDR_R { - DSTADDR_R::new(self.bits) + pub fn dstaddr(&self) -> DstaddrR { + DstaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] #[must_use] - pub fn dstaddr(&mut self) -> DSTADDR_W<0> { - DSTADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstaddr(&mut self) -> DstaddrW { + DstaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch7_dst](index.html) module"] -pub struct CH7_DST_SPEC; -impl crate::RegisterSpec for CH7_DST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_dst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_dst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch7DstSpec; +impl crate::RegisterSpec for Ch7DstSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch7_dst::R](R) reader structure"] -impl crate::Readable for CH7_DST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch7_dst::W](W) writer structure"] -impl crate::Writable for CH7_DST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch7_dst::R`](R) reader structure"] +impl crate::Readable for Ch7DstSpec {} +#[doc = "`write(|w| ..)` method takes [`ch7_dst::W`](W) writer structure"] +impl crate::Writable for Ch7DstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH7_DST to value 0"] -impl crate::Resettable for CH7_DST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch7DstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch7_link.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch7_link.rs index f216919..62ba3aa 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch7_link.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch7_link.rs @@ -1,136 +1,96 @@ #[doc = "Register `CH7_LINK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH7_LINK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] -pub type LINKMODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Link Structure Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LINKMODE_A { +pub enum Linkmode { #[doc = "0: The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LINKMODE_A) -> Self { + fn from(variant: Linkmode) -> Self { variant as u8 != 0 } } -impl LINKMODE_R { +#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] +pub type LinkmodeR = crate::BitReader; +impl LinkmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LINKMODE_A { + pub const fn variant(&self) -> Linkmode { match self.bits { - false => LINKMODE_A::ABSOLUTE, - true => LINKMODE_A::RELATIVE, + false => Linkmode::Absolute, + true => Linkmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == LINKMODE_A::ABSOLUTE + *self == Linkmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == LINKMODE_A::RELATIVE + *self == Linkmode::Relative } } #[doc = "Field `LINK` reader - Link Next Structure"] -pub type LINK_R = crate::BitReader; +pub type LinkR = crate::BitReader; #[doc = "Field `LINK` writer - Link Next Structure"] -pub type LINK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH7_LINK_SPEC, bool, O>; +pub type LinkW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LINKADDR` reader - Link Structure Address"] -pub type LINKADDR_R = crate::FieldReader; +pub type LinkaddrR = crate::FieldReader; #[doc = "Field `LINKADDR` writer - Link Structure Address"] -pub type LINKADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH7_LINK_SPEC, u32, u32, 30, O>; +pub type LinkaddrW<'a, REG> = crate::FieldWriter<'a, REG, 30, u32>; impl R { #[doc = "Bit 0 - Link Structure Addressing Mode"] #[inline(always)] - pub fn linkmode(&self) -> LINKMODE_R { - LINKMODE_R::new((self.bits & 1) != 0) + pub fn linkmode(&self) -> LinkmodeR { + LinkmodeR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] - pub fn link(&self) -> LINK_R { - LINK_R::new(((self.bits >> 1) & 1) != 0) + pub fn link(&self) -> LinkR { + LinkR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] - pub fn linkaddr(&self) -> LINKADDR_R { - LINKADDR_R::new((self.bits >> 2) & 0x3fff_ffff) + pub fn linkaddr(&self) -> LinkaddrR { + LinkaddrR::new((self.bits >> 2) & 0x3fff_ffff) } } impl W { #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] #[must_use] - pub fn link(&mut self) -> LINK_W<1> { - LINK_W::new(self) + pub fn link(&mut self) -> LinkW { + LinkW::new(self, 1) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] #[must_use] - pub fn linkaddr(&mut self) -> LINKADDR_W<2> { - LINKADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn linkaddr(&mut self) -> LinkaddrW { + LinkaddrW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch7_link](index.html) module"] -pub struct CH7_LINK_SPEC; -impl crate::RegisterSpec for CH7_LINK_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_link::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_link::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch7LinkSpec; +impl crate::RegisterSpec for Ch7LinkSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch7_link::R](R) reader structure"] -impl crate::Readable for CH7_LINK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch7_link::W](W) writer structure"] -impl crate::Writable for CH7_LINK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch7_link::R`](R) reader structure"] +impl crate::Readable for Ch7LinkSpec {} +#[doc = "`write(|w| ..)` method takes [`ch7_link::W`](W) writer structure"] +impl crate::Writable for Ch7LinkSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH7_LINK to value 0"] -impl crate::Resettable for CH7_LINK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch7LinkSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch7_loop.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch7_loop.rs index e943d44..aaba647 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch7_loop.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch7_loop.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH7_LOOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH7_LOOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOOPCNT` reader - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_R = crate::FieldReader; +pub type LoopcntR = crate::FieldReader; #[doc = "Field `LOOPCNT` writer - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH7_LOOP_SPEC, u8, u8, 8, O>; +pub type LoopcntW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] - pub fn loopcnt(&self) -> LOOPCNT_R { - LOOPCNT_R::new((self.bits & 0xff) as u8) + pub fn loopcnt(&self) -> LoopcntR { + LoopcntR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] #[must_use] - pub fn loopcnt(&mut self) -> LOOPCNT_W<0> { - LOOPCNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn loopcnt(&mut self) -> LoopcntW { + LoopcntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch7_loop](index.html) module"] -pub struct CH7_LOOP_SPEC; -impl crate::RegisterSpec for CH7_LOOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_loop::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_loop::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch7LoopSpec; +impl crate::RegisterSpec for Ch7LoopSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch7_loop::R](R) reader structure"] -impl crate::Readable for CH7_LOOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch7_loop::W](W) writer structure"] -impl crate::Writable for CH7_LOOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch7_loop::R`](R) reader structure"] +impl crate::Readable for Ch7LoopSpec {} +#[doc = "`write(|w| ..)` method takes [`ch7_loop::W`](W) writer structure"] +impl crate::Writable for Ch7LoopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH7_LOOP to value 0"] -impl crate::Resettable for CH7_LOOP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch7LoopSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch7_src.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch7_src.rs index 094d472..e407512 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch7_src.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ch7_src.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH7_SRC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH7_SRC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SRCADDR` reader - Source Data Address"] -pub type SRCADDR_R = crate::FieldReader; +pub type SrcaddrR = crate::FieldReader; #[doc = "Field `SRCADDR` writer - Source Data Address"] -pub type SRCADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH7_SRC_SPEC, u32, u32, 32, O>; +pub type SrcaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] - pub fn srcaddr(&self) -> SRCADDR_R { - SRCADDR_R::new(self.bits) + pub fn srcaddr(&self) -> SrcaddrR { + SrcaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] #[must_use] - pub fn srcaddr(&mut self) -> SRCADDR_W<0> { - SRCADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn srcaddr(&mut self) -> SrcaddrW { + SrcaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch7_src](index.html) module"] -pub struct CH7_SRC_SPEC; -impl crate::RegisterSpec for CH7_SRC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_src::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_src::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch7SrcSpec; +impl crate::RegisterSpec for Ch7SrcSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch7_src::R](R) reader structure"] -impl crate::Readable for CH7_SRC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch7_src::W](W) writer structure"] -impl crate::Writable for CH7_SRC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch7_src::R`](R) reader structure"] +impl crate::Readable for Ch7SrcSpec {} +#[doc = "`write(|w| ..)` method takes [`ch7_src::W`](W) writer structure"] +impl crate::Writable for Ch7SrcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH7_SRC to value 0"] -impl crate::Resettable for CH7_SRC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch7SrcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/chbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/chbusy.rs index f21fe96..2459826 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/chbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/chbusy.rs @@ -1,37 +1,22 @@ #[doc = "Register `CHBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `BUSY` reader - Channels Busy"] -pub type BUSY_R = crate::FieldReader; +pub type BusyR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Channels Busy"] #[inline(always)] - pub fn busy(&self) -> BUSY_R { - BUSY_R::new((self.bits & 0xff) as u8) + pub fn busy(&self) -> BusyR { + BusyR::new((self.bits & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chbusy](index.html) module"] -pub struct CHBUSY_SPEC; -impl crate::RegisterSpec for CHBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`chbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ChbusySpec; +impl crate::RegisterSpec for ChbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [chbusy::R](R) reader structure"] -impl crate::Readable for CHBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`chbusy::R`](R) reader structure"] +impl crate::Readable for ChbusySpec {} #[doc = "`reset()` method sets CHBUSY to value 0"] -impl crate::Resettable for CHBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ChbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/chdis.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/chdis.rs index 00fa1e0..f52faeb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/chdis.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/chdis.rs @@ -1,52 +1,27 @@ #[doc = "Register `CHDIS` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CHDIS` writer - DMA Channel disable"] -pub type CHDIS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CHDIS_SPEC, u8, u8, 8, O>; +pub type ChdisW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - DMA Channel disable"] #[inline(always)] #[must_use] - pub fn chdis(&mut self) -> CHDIS_W<0> { - CHDIS_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn chdis(&mut self) -> ChdisW { + ChdisW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chdis](index.html) module"] -pub struct CHDIS_SPEC; -impl crate::RegisterSpec for CHDIS_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chdis::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ChdisSpec; +impl crate::RegisterSpec for ChdisSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [chdis::W](W) writer structure"] -impl crate::Writable for CHDIS_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`chdis::W`](W) writer structure"] +impl crate::Writable for ChdisSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHDIS to value 0"] -impl crate::Resettable for CHDIS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ChdisSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/chdone.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/chdone.rs index 739db59..5605c75 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/chdone.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/chdone.rs @@ -1,185 +1,145 @@ #[doc = "Register `CHDONE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CHDONE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CHDONE0` reader - DMA Channel Link done intr flag"] -pub type CHDONE0_R = crate::BitReader; +pub type Chdone0R = crate::BitReader; #[doc = "Field `CHDONE0` writer - DMA Channel Link done intr flag"] -pub type CHDONE0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CHDONE_SPEC, bool, O>; +pub type Chdone0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHDONE1` reader - DMA Channel Link done intr flag"] -pub type CHDONE1_R = crate::BitReader; +pub type Chdone1R = crate::BitReader; #[doc = "Field `CHDONE1` writer - DMA Channel Link done intr flag"] -pub type CHDONE1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CHDONE_SPEC, bool, O>; +pub type Chdone1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHDONE2` reader - DMA Channel Link done intr flag"] -pub type CHDONE2_R = crate::BitReader; +pub type Chdone2R = crate::BitReader; #[doc = "Field `CHDONE2` writer - DMA Channel Link done intr flag"] -pub type CHDONE2_W<'a, const O: u8> = crate::BitWriter<'a, u32, CHDONE_SPEC, bool, O>; +pub type Chdone2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHDONE3` reader - DMA Channel Link done intr flag"] -pub type CHDONE3_R = crate::BitReader; +pub type Chdone3R = crate::BitReader; #[doc = "Field `CHDONE3` writer - DMA Channel Link done intr flag"] -pub type CHDONE3_W<'a, const O: u8> = crate::BitWriter<'a, u32, CHDONE_SPEC, bool, O>; +pub type Chdone3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHDONE4` reader - DMA Channel Link done intr flag"] -pub type CHDONE4_R = crate::BitReader; +pub type Chdone4R = crate::BitReader; #[doc = "Field `CHDONE4` writer - DMA Channel Link done intr flag"] -pub type CHDONE4_W<'a, const O: u8> = crate::BitWriter<'a, u32, CHDONE_SPEC, bool, O>; +pub type Chdone4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHDONE5` reader - DMA Channel Link done intr flag"] -pub type CHDONE5_R = crate::BitReader; +pub type Chdone5R = crate::BitReader; #[doc = "Field `CHDONE5` writer - DMA Channel Link done intr flag"] -pub type CHDONE5_W<'a, const O: u8> = crate::BitWriter<'a, u32, CHDONE_SPEC, bool, O>; +pub type Chdone5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHDONE6` reader - DMA Channel Link done intr flag"] -pub type CHDONE6_R = crate::BitReader; +pub type Chdone6R = crate::BitReader; #[doc = "Field `CHDONE6` writer - DMA Channel Link done intr flag"] -pub type CHDONE6_W<'a, const O: u8> = crate::BitWriter<'a, u32, CHDONE_SPEC, bool, O>; +pub type Chdone6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHDONE7` reader - DMA Channel Link done intr flag"] -pub type CHDONE7_R = crate::BitReader; +pub type Chdone7R = crate::BitReader; #[doc = "Field `CHDONE7` writer - DMA Channel Link done intr flag"] -pub type CHDONE7_W<'a, const O: u8> = crate::BitWriter<'a, u32, CHDONE_SPEC, bool, O>; +pub type Chdone7W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DMA Channel Link done intr flag"] #[inline(always)] - pub fn chdone0(&self) -> CHDONE0_R { - CHDONE0_R::new((self.bits & 1) != 0) + pub fn chdone0(&self) -> Chdone0R { + Chdone0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DMA Channel Link done intr flag"] #[inline(always)] - pub fn chdone1(&self) -> CHDONE1_R { - CHDONE1_R::new(((self.bits >> 1) & 1) != 0) + pub fn chdone1(&self) -> Chdone1R { + Chdone1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DMA Channel Link done intr flag"] #[inline(always)] - pub fn chdone2(&self) -> CHDONE2_R { - CHDONE2_R::new(((self.bits >> 2) & 1) != 0) + pub fn chdone2(&self) -> Chdone2R { + Chdone2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DMA Channel Link done intr flag"] #[inline(always)] - pub fn chdone3(&self) -> CHDONE3_R { - CHDONE3_R::new(((self.bits >> 3) & 1) != 0) + pub fn chdone3(&self) -> Chdone3R { + Chdone3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - DMA Channel Link done intr flag"] #[inline(always)] - pub fn chdone4(&self) -> CHDONE4_R { - CHDONE4_R::new(((self.bits >> 4) & 1) != 0) + pub fn chdone4(&self) -> Chdone4R { + Chdone4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DMA Channel Link done intr flag"] #[inline(always)] - pub fn chdone5(&self) -> CHDONE5_R { - CHDONE5_R::new(((self.bits >> 5) & 1) != 0) + pub fn chdone5(&self) -> Chdone5R { + Chdone5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - DMA Channel Link done intr flag"] #[inline(always)] - pub fn chdone6(&self) -> CHDONE6_R { - CHDONE6_R::new(((self.bits >> 6) & 1) != 0) + pub fn chdone6(&self) -> Chdone6R { + Chdone6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - DMA Channel Link done intr flag"] #[inline(always)] - pub fn chdone7(&self) -> CHDONE7_R { - CHDONE7_R::new(((self.bits >> 7) & 1) != 0) + pub fn chdone7(&self) -> Chdone7R { + Chdone7R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - DMA Channel Link done intr flag"] #[inline(always)] #[must_use] - pub fn chdone0(&mut self) -> CHDONE0_W<0> { - CHDONE0_W::new(self) + pub fn chdone0(&mut self) -> Chdone0W { + Chdone0W::new(self, 0) } #[doc = "Bit 1 - DMA Channel Link done intr flag"] #[inline(always)] #[must_use] - pub fn chdone1(&mut self) -> CHDONE1_W<1> { - CHDONE1_W::new(self) + pub fn chdone1(&mut self) -> Chdone1W { + Chdone1W::new(self, 1) } #[doc = "Bit 2 - DMA Channel Link done intr flag"] #[inline(always)] #[must_use] - pub fn chdone2(&mut self) -> CHDONE2_W<2> { - CHDONE2_W::new(self) + pub fn chdone2(&mut self) -> Chdone2W { + Chdone2W::new(self, 2) } #[doc = "Bit 3 - DMA Channel Link done intr flag"] #[inline(always)] #[must_use] - pub fn chdone3(&mut self) -> CHDONE3_W<3> { - CHDONE3_W::new(self) + pub fn chdone3(&mut self) -> Chdone3W { + Chdone3W::new(self, 3) } #[doc = "Bit 4 - DMA Channel Link done intr flag"] #[inline(always)] #[must_use] - pub fn chdone4(&mut self) -> CHDONE4_W<4> { - CHDONE4_W::new(self) + pub fn chdone4(&mut self) -> Chdone4W { + Chdone4W::new(self, 4) } #[doc = "Bit 5 - DMA Channel Link done intr flag"] #[inline(always)] #[must_use] - pub fn chdone5(&mut self) -> CHDONE5_W<5> { - CHDONE5_W::new(self) + pub fn chdone5(&mut self) -> Chdone5W { + Chdone5W::new(self, 5) } #[doc = "Bit 6 - DMA Channel Link done intr flag"] #[inline(always)] #[must_use] - pub fn chdone6(&mut self) -> CHDONE6_W<6> { - CHDONE6_W::new(self) + pub fn chdone6(&mut self) -> Chdone6W { + Chdone6W::new(self, 6) } #[doc = "Bit 7 - DMA Channel Link done intr flag"] #[inline(always)] #[must_use] - pub fn chdone7(&mut self) -> CHDONE7_W<7> { - CHDONE7_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn chdone7(&mut self) -> Chdone7W { + Chdone7W::new(self, 7) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chdone](index.html) module"] -pub struct CHDONE_SPEC; -impl crate::RegisterSpec for CHDONE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`chdone::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chdone::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ChdoneSpec; +impl crate::RegisterSpec for ChdoneSpec { type Ux = u32; } -#[doc = "`read()` method returns [chdone::R](R) reader structure"] -impl crate::Readable for CHDONE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [chdone::W](W) writer structure"] -impl crate::Writable for CHDONE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`chdone::R`](R) reader structure"] +impl crate::Readable for ChdoneSpec {} +#[doc = "`write(|w| ..)` method takes [`chdone::W`](W) writer structure"] +impl crate::Writable for ChdoneSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHDONE to value 0"] -impl crate::Resettable for CHDONE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ChdoneSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/chen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/chen.rs index 6379f52..7c526f3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/chen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/chen.rs @@ -1,52 +1,27 @@ #[doc = "Register `CHEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CHEN` writer - Channel Enables"] -pub type CHEN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CHEN_SPEC, u8, u8, 8, O>; +pub type ChenW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - Channel Enables"] #[inline(always)] #[must_use] - pub fn chen(&mut self) -> CHEN_W<0> { - CHEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn chen(&mut self) -> ChenW { + ChenW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chen](index.html) module"] -pub struct CHEN_SPEC; -impl crate::RegisterSpec for CHEN_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chen::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ChenSpec; +impl crate::RegisterSpec for ChenSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [chen::W](W) writer structure"] -impl crate::Writable for CHEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`chen::W`](W) writer structure"] +impl crate::Writable for ChenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHEN to value 0"] -impl crate::Resettable for CHEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ChenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/chstatus.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/chstatus.rs index 6ff503b..7fd3c85 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/chstatus.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/chstatus.rs @@ -1,37 +1,22 @@ #[doc = "Register `CHSTATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CHSTATUS` reader - DMA Channel Status"] -pub type CHSTATUS_R = crate::FieldReader; +pub type ChstatusR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - DMA Channel Status"] #[inline(always)] - pub fn chstatus(&self) -> CHSTATUS_R { - CHSTATUS_R::new((self.bits & 0xff) as u8) + pub fn chstatus(&self) -> ChstatusR { + ChstatusR::new((self.bits & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chstatus](index.html) module"] -pub struct CHSTATUS_SPEC; -impl crate::RegisterSpec for CHSTATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`chstatus::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ChstatusSpec; +impl crate::RegisterSpec for ChstatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [chstatus::R](R) reader structure"] -impl crate::Readable for CHSTATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`chstatus::R`](R) reader structure"] +impl crate::Readable for ChstatusSpec {} #[doc = "`reset()` method sets CHSTATUS to value 0"] -impl crate::Resettable for CHSTATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ChstatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ctrl.rs index 4f32327..b3fcd1f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ctrl.rs @@ -1,95 +1,55 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `NUMFIXED` reader - Number of Fixed Priority Channels"] -pub type NUMFIXED_R = crate::FieldReader; +pub type NumfixedR = crate::FieldReader; #[doc = "Field `NUMFIXED` writer - Number of Fixed Priority Channels"] -pub type NUMFIXED_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, u8, 5, O>; +pub type NumfixedW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `CORERST` reader - Reset DMA controller"] -pub type CORERST_R = crate::BitReader; +pub type CorerstR = crate::BitReader; #[doc = "Field `CORERST` writer - Reset DMA controller"] -pub type CORERST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type CorerstW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 24:28 - Number of Fixed Priority Channels"] #[inline(always)] - pub fn numfixed(&self) -> NUMFIXED_R { - NUMFIXED_R::new(((self.bits >> 24) & 0x1f) as u8) + pub fn numfixed(&self) -> NumfixedR { + NumfixedR::new(((self.bits >> 24) & 0x1f) as u8) } #[doc = "Bit 31 - Reset DMA controller"] #[inline(always)] - pub fn corerst(&self) -> CORERST_R { - CORERST_R::new(((self.bits >> 31) & 1) != 0) + pub fn corerst(&self) -> CorerstR { + CorerstR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 24:28 - Number of Fixed Priority Channels"] #[inline(always)] #[must_use] - pub fn numfixed(&mut self) -> NUMFIXED_W<24> { - NUMFIXED_W::new(self) + pub fn numfixed(&mut self) -> NumfixedW { + NumfixedW::new(self, 24) } #[doc = "Bit 31 - Reset DMA controller"] #[inline(always)] #[must_use] - pub fn corerst(&mut self) -> CORERST_W<31> { - CORERST_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn corerst(&mut self) -> CorerstW { + CorerstW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0x1e00_0000"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x1e00_0000; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0x1e00_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/dbghalt.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/dbghalt.rs index 6cd48d4..413452f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/dbghalt.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/dbghalt.rs @@ -1,80 +1,40 @@ #[doc = "Register `DBGHALT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DBGHALT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DBGHALT` reader - DMA Debug Halt"] -pub type DBGHALT_R = crate::FieldReader; +pub type DbghaltR = crate::FieldReader; #[doc = "Field `DBGHALT` writer - DMA Debug Halt"] -pub type DBGHALT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DBGHALT_SPEC, u8, u8, 8, O>; +pub type DbghaltW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - DMA Debug Halt"] #[inline(always)] - pub fn dbghalt(&self) -> DBGHALT_R { - DBGHALT_R::new((self.bits & 0xff) as u8) + pub fn dbghalt(&self) -> DbghaltR { + DbghaltR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - DMA Debug Halt"] #[inline(always)] #[must_use] - pub fn dbghalt(&mut self) -> DBGHALT_W<0> { - DBGHALT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dbghalt(&mut self) -> DbghaltW { + DbghaltW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dbghalt](index.html) module"] -pub struct DBGHALT_SPEC; -impl crate::RegisterSpec for DBGHALT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dbghalt::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dbghalt::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DbghaltSpec; +impl crate::RegisterSpec for DbghaltSpec { type Ux = u32; } -#[doc = "`read()` method returns [dbghalt::R](R) reader structure"] -impl crate::Readable for DBGHALT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dbghalt::W](W) writer structure"] -impl crate::Writable for DBGHALT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dbghalt::R`](R) reader structure"] +impl crate::Readable for DbghaltSpec {} +#[doc = "`write(|w| ..)` method takes [`dbghalt::W`](W) writer structure"] +impl crate::Writable for DbghaltSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DBGHALT to value 0"] -impl crate::Resettable for DBGHALT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DbghaltSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/en.rs index 927745a..51e6ac3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/en.rs @@ -1,80 +1,40 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - LDMA module enable and disable register"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - LDMA module enable and disable register"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - LDMA module enable and disable register"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - LDMA module enable and disable register"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ien.rs index f1439a6..fbe3462 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ien.rs @@ -1,95 +1,55 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CHDONE` reader - Enable or disable the done interrupt"] -pub type CHDONE_R = crate::FieldReader; +pub type ChdoneR = crate::FieldReader; #[doc = "Field `CHDONE` writer - Enable or disable the done interrupt"] -pub type CHDONE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, IEN_SPEC, u8, u8, 8, O>; +pub type ChdoneW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `ERROR` reader - Enable or disable the error interrupt"] -pub type ERROR_R = crate::BitReader; +pub type ErrorR = crate::BitReader; #[doc = "Field `ERROR` writer - Enable or disable the error interrupt"] -pub type ERROR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ErrorW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:7 - Enable or disable the done interrupt"] #[inline(always)] - pub fn chdone(&self) -> CHDONE_R { - CHDONE_R::new((self.bits & 0xff) as u8) + pub fn chdone(&self) -> ChdoneR { + ChdoneR::new((self.bits & 0xff) as u8) } #[doc = "Bit 31 - Enable or disable the error interrupt"] #[inline(always)] - pub fn error(&self) -> ERROR_R { - ERROR_R::new(((self.bits >> 31) & 1) != 0) + pub fn error(&self) -> ErrorR { + ErrorR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:7 - Enable or disable the done interrupt"] #[inline(always)] #[must_use] - pub fn chdone(&mut self) -> CHDONE_W<0> { - CHDONE_W::new(self) + pub fn chdone(&mut self) -> ChdoneW { + ChdoneW::new(self, 0) } #[doc = "Bit 31 - Enable or disable the error interrupt"] #[inline(always)] #[must_use] - pub fn error(&mut self) -> ERROR_W<31> { - ERROR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn error(&mut self) -> ErrorW { + ErrorW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/if_.rs index fefca66..41569cc 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/if_.rs @@ -1,200 +1,160 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DONE0` reader - DMA Structure Operation Done"] -pub type DONE0_R = crate::BitReader; +pub type Done0R = crate::BitReader; #[doc = "Field `DONE0` writer - DMA Structure Operation Done"] -pub type DONE0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Done0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DONE1` reader - DMA Structure Operation Done"] -pub type DONE1_R = crate::BitReader; +pub type Done1R = crate::BitReader; #[doc = "Field `DONE1` writer - DMA Structure Operation Done"] -pub type DONE1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Done1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DONE2` reader - DMA Structure Operation Done"] -pub type DONE2_R = crate::BitReader; +pub type Done2R = crate::BitReader; #[doc = "Field `DONE2` writer - DMA Structure Operation Done"] -pub type DONE2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Done2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DONE3` reader - DMA Structure Operation Done"] -pub type DONE3_R = crate::BitReader; +pub type Done3R = crate::BitReader; #[doc = "Field `DONE3` writer - DMA Structure Operation Done"] -pub type DONE3_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Done3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DONE4` reader - DMA Structure Operation Done"] -pub type DONE4_R = crate::BitReader; +pub type Done4R = crate::BitReader; #[doc = "Field `DONE4` writer - DMA Structure Operation Done"] -pub type DONE4_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Done4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DONE5` reader - DMA Structure Operation Done"] -pub type DONE5_R = crate::BitReader; +pub type Done5R = crate::BitReader; #[doc = "Field `DONE5` writer - DMA Structure Operation Done"] -pub type DONE5_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Done5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DONE6` reader - DMA Structure Operation Done"] -pub type DONE6_R = crate::BitReader; +pub type Done6R = crate::BitReader; #[doc = "Field `DONE6` writer - DMA Structure Operation Done"] -pub type DONE6_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Done6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DONE7` reader - DMA Structure Operation Done"] -pub type DONE7_R = crate::BitReader; +pub type Done7R = crate::BitReader; #[doc = "Field `DONE7` writer - DMA Structure Operation Done"] -pub type DONE7_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Done7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ERROR` reader - Error Flag"] -pub type ERROR_R = crate::BitReader; +pub type ErrorR = crate::BitReader; #[doc = "Field `ERROR` writer - Error Flag"] -pub type ERROR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ErrorW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DMA Structure Operation Done"] #[inline(always)] - pub fn done0(&self) -> DONE0_R { - DONE0_R::new((self.bits & 1) != 0) + pub fn done0(&self) -> Done0R { + Done0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DMA Structure Operation Done"] #[inline(always)] - pub fn done1(&self) -> DONE1_R { - DONE1_R::new(((self.bits >> 1) & 1) != 0) + pub fn done1(&self) -> Done1R { + Done1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DMA Structure Operation Done"] #[inline(always)] - pub fn done2(&self) -> DONE2_R { - DONE2_R::new(((self.bits >> 2) & 1) != 0) + pub fn done2(&self) -> Done2R { + Done2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DMA Structure Operation Done"] #[inline(always)] - pub fn done3(&self) -> DONE3_R { - DONE3_R::new(((self.bits >> 3) & 1) != 0) + pub fn done3(&self) -> Done3R { + Done3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - DMA Structure Operation Done"] #[inline(always)] - pub fn done4(&self) -> DONE4_R { - DONE4_R::new(((self.bits >> 4) & 1) != 0) + pub fn done4(&self) -> Done4R { + Done4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DMA Structure Operation Done"] #[inline(always)] - pub fn done5(&self) -> DONE5_R { - DONE5_R::new(((self.bits >> 5) & 1) != 0) + pub fn done5(&self) -> Done5R { + Done5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - DMA Structure Operation Done"] #[inline(always)] - pub fn done6(&self) -> DONE6_R { - DONE6_R::new(((self.bits >> 6) & 1) != 0) + pub fn done6(&self) -> Done6R { + Done6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - DMA Structure Operation Done"] #[inline(always)] - pub fn done7(&self) -> DONE7_R { - DONE7_R::new(((self.bits >> 7) & 1) != 0) + pub fn done7(&self) -> Done7R { + Done7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 31 - Error Flag"] #[inline(always)] - pub fn error(&self) -> ERROR_R { - ERROR_R::new(((self.bits >> 31) & 1) != 0) + pub fn error(&self) -> ErrorR { + ErrorR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - DMA Structure Operation Done"] #[inline(always)] #[must_use] - pub fn done0(&mut self) -> DONE0_W<0> { - DONE0_W::new(self) + pub fn done0(&mut self) -> Done0W { + Done0W::new(self, 0) } #[doc = "Bit 1 - DMA Structure Operation Done"] #[inline(always)] #[must_use] - pub fn done1(&mut self) -> DONE1_W<1> { - DONE1_W::new(self) + pub fn done1(&mut self) -> Done1W { + Done1W::new(self, 1) } #[doc = "Bit 2 - DMA Structure Operation Done"] #[inline(always)] #[must_use] - pub fn done2(&mut self) -> DONE2_W<2> { - DONE2_W::new(self) + pub fn done2(&mut self) -> Done2W { + Done2W::new(self, 2) } #[doc = "Bit 3 - DMA Structure Operation Done"] #[inline(always)] #[must_use] - pub fn done3(&mut self) -> DONE3_W<3> { - DONE3_W::new(self) + pub fn done3(&mut self) -> Done3W { + Done3W::new(self, 3) } #[doc = "Bit 4 - DMA Structure Operation Done"] #[inline(always)] #[must_use] - pub fn done4(&mut self) -> DONE4_W<4> { - DONE4_W::new(self) + pub fn done4(&mut self) -> Done4W { + Done4W::new(self, 4) } #[doc = "Bit 5 - DMA Structure Operation Done"] #[inline(always)] #[must_use] - pub fn done5(&mut self) -> DONE5_W<5> { - DONE5_W::new(self) + pub fn done5(&mut self) -> Done5W { + Done5W::new(self, 5) } #[doc = "Bit 6 - DMA Structure Operation Done"] #[inline(always)] #[must_use] - pub fn done6(&mut self) -> DONE6_W<6> { - DONE6_W::new(self) + pub fn done6(&mut self) -> Done6W { + Done6W::new(self, 6) } #[doc = "Bit 7 - DMA Structure Operation Done"] #[inline(always)] #[must_use] - pub fn done7(&mut self) -> DONE7_W<7> { - DONE7_W::new(self) + pub fn done7(&mut self) -> Done7W { + Done7W::new(self, 7) } #[doc = "Bit 31 - Error Flag"] #[inline(always)] #[must_use] - pub fn error(&mut self) -> ERROR_W<31> { - ERROR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn error(&mut self) -> ErrorW { + ErrorW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ipversion.rs index 15bc08f..244f2a6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IPVERSION"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - IPVERSION"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new((self.bits & 0xff) as u8) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new((self.bits & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/linkload.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/linkload.rs index b0f4e72..f201a19 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/linkload.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/linkload.rs @@ -1,52 +1,27 @@ #[doc = "Register `LINKLOAD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LINKLOAD` writer - DMA Link Loads"] -pub type LINKLOAD_W<'a, const O: u8> = crate::FieldWriter<'a, u32, LINKLOAD_SPEC, u8, u8, 8, O>; +pub type LinkloadW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - DMA Link Loads"] #[inline(always)] #[must_use] - pub fn linkload(&mut self) -> LINKLOAD_W<0> { - LINKLOAD_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn linkload(&mut self) -> LinkloadW { + LinkloadW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [linkload](index.html) module"] -pub struct LINKLOAD_SPEC; -impl crate::RegisterSpec for LINKLOAD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`linkload::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LinkloadSpec; +impl crate::RegisterSpec for LinkloadSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [linkload::W](W) writer structure"] -impl crate::Writable for LINKLOAD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`linkload::W`](W) writer structure"] +impl crate::Writable for LinkloadSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LINKLOAD to value 0"] -impl crate::Resettable for LINKLOAD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LinkloadSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/reqclear.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/reqclear.rs index cf04bd2..1b06a19 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/reqclear.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/reqclear.rs @@ -1,52 +1,27 @@ #[doc = "Register `REQCLEAR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `REQCLEAR` writer - DMA Request Clear"] -pub type REQCLEAR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, REQCLEAR_SPEC, u8, u8, 8, O>; +pub type ReqclearW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - DMA Request Clear"] #[inline(always)] #[must_use] - pub fn reqclear(&mut self) -> REQCLEAR_W<0> { - REQCLEAR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn reqclear(&mut self) -> ReqclearW { + ReqclearW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [reqclear](index.html) module"] -pub struct REQCLEAR_SPEC; -impl crate::RegisterSpec for REQCLEAR_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`reqclear::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ReqclearSpec; +impl crate::RegisterSpec for ReqclearSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [reqclear::W](W) writer structure"] -impl crate::Writable for REQCLEAR_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`reqclear::W`](W) writer structure"] +impl crate::Writable for ReqclearSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets REQCLEAR to value 0"] -impl crate::Resettable for REQCLEAR_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ReqclearSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/reqdis.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/reqdis.rs index 0a9836d..2bf65a5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/reqdis.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/reqdis.rs @@ -1,80 +1,40 @@ #[doc = "Register `REQDIS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `REQDIS` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `REQDIS` reader - DMA Request Disables"] -pub type REQDIS_R = crate::FieldReader; +pub type ReqdisR = crate::FieldReader; #[doc = "Field `REQDIS` writer - DMA Request Disables"] -pub type REQDIS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, REQDIS_SPEC, u8, u8, 8, O>; +pub type ReqdisW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - DMA Request Disables"] #[inline(always)] - pub fn reqdis(&self) -> REQDIS_R { - REQDIS_R::new((self.bits & 0xff) as u8) + pub fn reqdis(&self) -> ReqdisR { + ReqdisR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - DMA Request Disables"] #[inline(always)] #[must_use] - pub fn reqdis(&mut self) -> REQDIS_W<0> { - REQDIS_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn reqdis(&mut self) -> ReqdisW { + ReqdisW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [reqdis](index.html) module"] -pub struct REQDIS_SPEC; -impl crate::RegisterSpec for REQDIS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`reqdis::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`reqdis::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ReqdisSpec; +impl crate::RegisterSpec for ReqdisSpec { type Ux = u32; } -#[doc = "`read()` method returns [reqdis::R](R) reader structure"] -impl crate::Readable for REQDIS_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [reqdis::W](W) writer structure"] -impl crate::Writable for REQDIS_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`reqdis::R`](R) reader structure"] +impl crate::Readable for ReqdisSpec {} +#[doc = "`write(|w| ..)` method takes [`reqdis::W`](W) writer structure"] +impl crate::Writable for ReqdisSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets REQDIS to value 0"] -impl crate::Resettable for REQDIS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ReqdisSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/reqpend.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/reqpend.rs index 355546c..de90a28 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/reqpend.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/reqpend.rs @@ -1,37 +1,22 @@ #[doc = "Register `REQPEND` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `REQPEND` reader - DMA Requests Pending"] -pub type REQPEND_R = crate::FieldReader; +pub type ReqpendR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - DMA Requests Pending"] #[inline(always)] - pub fn reqpend(&self) -> REQPEND_R { - REQPEND_R::new((self.bits & 0xff) as u8) + pub fn reqpend(&self) -> ReqpendR { + ReqpendR::new((self.bits & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [reqpend](index.html) module"] -pub struct REQPEND_SPEC; -impl crate::RegisterSpec for REQPEND_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`reqpend::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ReqpendSpec; +impl crate::RegisterSpec for ReqpendSpec { type Ux = u32; } -#[doc = "`read()` method returns [reqpend::R](R) reader structure"] -impl crate::Readable for REQPEND_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`reqpend::R`](R) reader structure"] +impl crate::Readable for ReqpendSpec {} #[doc = "`reset()` method sets REQPEND to value 0"] -impl crate::Resettable for REQPEND_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ReqpendSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/status.rs index f9ac19f..887b63f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/status.rs @@ -1,72 +1,57 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ANYBUSY` reader - Any DMA Channel Busy"] -pub type ANYBUSY_R = crate::BitReader; +pub type AnybusyR = crate::BitReader; #[doc = "Field `ANYREQ` reader - Any DMA Channel Request Pending"] -pub type ANYREQ_R = crate::BitReader; +pub type AnyreqR = crate::BitReader; #[doc = "Field `CHGRANT` reader - Granted Channel Number"] -pub type CHGRANT_R = crate::FieldReader; +pub type ChgrantR = crate::FieldReader; #[doc = "Field `CHERROR` reader - Errant Channel Number"] -pub type CHERROR_R = crate::FieldReader; +pub type CherrorR = crate::FieldReader; #[doc = "Field `FIFOLEVEL` reader - FIFO Level"] -pub type FIFOLEVEL_R = crate::FieldReader; +pub type FifolevelR = crate::FieldReader; #[doc = "Field `CHNUM` reader - Number of Channels"] -pub type CHNUM_R = crate::FieldReader; +pub type ChnumR = crate::FieldReader; impl R { #[doc = "Bit 0 - Any DMA Channel Busy"] #[inline(always)] - pub fn anybusy(&self) -> ANYBUSY_R { - ANYBUSY_R::new((self.bits & 1) != 0) + pub fn anybusy(&self) -> AnybusyR { + AnybusyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Any DMA Channel Request Pending"] #[inline(always)] - pub fn anyreq(&self) -> ANYREQ_R { - ANYREQ_R::new(((self.bits >> 1) & 1) != 0) + pub fn anyreq(&self) -> AnyreqR { + AnyreqR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 3:7 - Granted Channel Number"] #[inline(always)] - pub fn chgrant(&self) -> CHGRANT_R { - CHGRANT_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn chgrant(&self) -> ChgrantR { + ChgrantR::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 8:12 - Errant Channel Number"] #[inline(always)] - pub fn cherror(&self) -> CHERROR_R { - CHERROR_R::new(((self.bits >> 8) & 0x1f) as u8) + pub fn cherror(&self) -> CherrorR { + CherrorR::new(((self.bits >> 8) & 0x1f) as u8) } #[doc = "Bits 16:20 - FIFO Level"] #[inline(always)] - pub fn fifolevel(&self) -> FIFOLEVEL_R { - FIFOLEVEL_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn fifolevel(&self) -> FifolevelR { + FifolevelR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 24:28 - Number of Channels"] #[inline(always)] - pub fn chnum(&self) -> CHNUM_R { - CHNUM_R::new(((self.bits >> 24) & 0x1f) as u8) + pub fn chnum(&self) -> ChnumR { + ChnumR::new(((self.bits >> 24) & 0x1f) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} -#[doc = "`reset()` method sets STATUS to value 0x1f10_0000"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0x1f10_0000; +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} +#[doc = "`reset()` method sets STATUS to value 0x0810_0000"] +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0x0810_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/swreq.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/swreq.rs index b7be7b4..084cb55 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/swreq.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/swreq.rs @@ -1,52 +1,27 @@ #[doc = "Register `SWREQ` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SWREQ` writer - Software Transfer Requests"] -pub type SWREQ_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SWREQ_SPEC, u8, u8, 8, O>; +pub type SwreqW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - Software Transfer Requests"] #[inline(always)] #[must_use] - pub fn swreq(&mut self) -> SWREQ_W<0> { - SWREQ_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn swreq(&mut self) -> SwreqW { + SwreqW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swreq](index.html) module"] -pub struct SWREQ_SPEC; -impl crate::RegisterSpec for SWREQ_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swreq::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SwreqSpec; +impl crate::RegisterSpec for SwreqSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [swreq::W](W) writer structure"] -impl crate::Writable for SWREQ_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`swreq::W`](W) writer structure"] +impl crate::Writable for SwreqSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWREQ to value 0"] -impl crate::Resettable for SWREQ_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SwreqSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/synchwen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/synchwen.rs index 7c9bfc9..fc30ca3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/synchwen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/synchwen.rs @@ -1,95 +1,55 @@ #[doc = "Register `SYNCHWEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SYNCHWEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SYNCSETEN` reader - Hardware Sync Trigger Set Enable"] -pub type SYNCSETEN_R = crate::FieldReader; +pub type SyncsetenR = crate::FieldReader; #[doc = "Field `SYNCSETEN` writer - Hardware Sync Trigger Set Enable"] -pub type SYNCSETEN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SYNCHWEN_SPEC, u8, u8, 8, O>; +pub type SyncsetenW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `SYNCCLREN` reader - Hardware Sync Trigger Clear Enable"] -pub type SYNCCLREN_R = crate::FieldReader; +pub type SyncclrenR = crate::FieldReader; #[doc = "Field `SYNCCLREN` writer - Hardware Sync Trigger Clear Enable"] -pub type SYNCCLREN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SYNCHWEN_SPEC, u8, u8, 8, O>; +pub type SyncclrenW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Hardware Sync Trigger Set Enable"] #[inline(always)] - pub fn syncseten(&self) -> SYNCSETEN_R { - SYNCSETEN_R::new((self.bits & 0xff) as u8) + pub fn syncseten(&self) -> SyncsetenR { + SyncsetenR::new((self.bits & 0xff) as u8) } #[doc = "Bits 16:23 - Hardware Sync Trigger Clear Enable"] #[inline(always)] - pub fn syncclren(&self) -> SYNCCLREN_R { - SYNCCLREN_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn syncclren(&self) -> SyncclrenR { + SyncclrenR::new(((self.bits >> 16) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Hardware Sync Trigger Set Enable"] #[inline(always)] #[must_use] - pub fn syncseten(&mut self) -> SYNCSETEN_W<0> { - SYNCSETEN_W::new(self) + pub fn syncseten(&mut self) -> SyncsetenW { + SyncsetenW::new(self, 0) } #[doc = "Bits 16:23 - Hardware Sync Trigger Clear Enable"] #[inline(always)] #[must_use] - pub fn syncclren(&mut self) -> SYNCCLREN_W<16> { - SYNCCLREN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn syncclren(&mut self) -> SyncclrenW { + SyncclrenW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [synchwen](index.html) module"] -pub struct SYNCHWEN_SPEC; -impl crate::RegisterSpec for SYNCHWEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`synchwen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synchwen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SynchwenSpec; +impl crate::RegisterSpec for SynchwenSpec { type Ux = u32; } -#[doc = "`read()` method returns [synchwen::R](R) reader structure"] -impl crate::Readable for SYNCHWEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [synchwen::W](W) writer structure"] -impl crate::Writable for SYNCHWEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`synchwen::R`](R) reader structure"] +impl crate::Readable for SynchwenSpec {} +#[doc = "`write(|w| ..)` method takes [`synchwen::W`](W) writer structure"] +impl crate::Writable for SynchwenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYNCHWEN to value 0"] -impl crate::Resettable for SYNCHWEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SynchwenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/synchwsel.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/synchwsel.rs index cdd9832..2040009 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/synchwsel.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/synchwsel.rs @@ -1,193 +1,167 @@ #[doc = "Register `SYNCHWSEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SYNCHWSEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SYNCSETEDGE` reader - Hardware Sync Trigger Set Edge Select"] -pub type SYNCSETEDGE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Hardware Sync Trigger Set Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SYNCSETEDGE_A { +pub enum Syncsetedge { #[doc = "0: Use rising edge detection"] - RISE = 0, + Rise = 0, #[doc = "1: Use falling edge detection"] - FALL = 1, + Fall = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SYNCSETEDGE_A) -> Self { + fn from(variant: Syncsetedge) -> Self { variant as _ } } -impl SYNCSETEDGE_R { +impl crate::FieldSpec for Syncsetedge { + type Ux = u8; +} +impl crate::IsEnum for Syncsetedge {} +#[doc = "Field `SYNCSETEDGE` reader - Hardware Sync Trigger Set Edge Select"] +pub type SyncsetedgeR = crate::FieldReader; +impl SyncsetedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SYNCSETEDGE_A::RISE), - 1 => Some(SYNCSETEDGE_A::FALL), + 0 => Some(Syncsetedge::Rise), + 1 => Some(Syncsetedge::Fall), _ => None, } } - #[doc = "Checks if the value of the field is `RISE`"] + #[doc = "Use rising edge detection"] #[inline(always)] pub fn is_rise(&self) -> bool { - *self == SYNCSETEDGE_A::RISE + *self == Syncsetedge::Rise } - #[doc = "Checks if the value of the field is `FALL`"] + #[doc = "Use falling edge detection"] #[inline(always)] pub fn is_fall(&self) -> bool { - *self == SYNCSETEDGE_A::FALL + *self == Syncsetedge::Fall } } #[doc = "Field `SYNCSETEDGE` writer - Hardware Sync Trigger Set Edge Select"] -pub type SYNCSETEDGE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYNCHWSEL_SPEC, u8, SYNCSETEDGE_A, 8, O>; -impl<'a, const O: u8> SYNCSETEDGE_W<'a, O> { +pub type SyncsetedgeW<'a, REG> = crate::FieldWriter<'a, REG, 8, Syncsetedge>; +impl<'a, REG> SyncsetedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Use rising edge detection"] #[inline(always)] - pub fn rise(self) -> &'a mut W { - self.variant(SYNCSETEDGE_A::RISE) + pub fn rise(self) -> &'a mut crate::W { + self.variant(Syncsetedge::Rise) } #[doc = "Use falling edge detection"] #[inline(always)] - pub fn fall(self) -> &'a mut W { - self.variant(SYNCSETEDGE_A::FALL) + pub fn fall(self) -> &'a mut crate::W { + self.variant(Syncsetedge::Fall) } } -#[doc = "Field `SYNCCLREDGE` reader - Hardware Sync Trigger Clear Edge Select"] -pub type SYNCCLREDGE_R = crate::FieldReader; #[doc = "Hardware Sync Trigger Clear Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SYNCCLREDGE_A { +pub enum Syncclredge { #[doc = "0: Use rising edge detection"] - RISE = 0, + Rise = 0, #[doc = "1: Use falling edge detection"] - FALL = 1, + Fall = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SYNCCLREDGE_A) -> Self { + fn from(variant: Syncclredge) -> Self { variant as _ } } -impl SYNCCLREDGE_R { +impl crate::FieldSpec for Syncclredge { + type Ux = u8; +} +impl crate::IsEnum for Syncclredge {} +#[doc = "Field `SYNCCLREDGE` reader - Hardware Sync Trigger Clear Edge Select"] +pub type SyncclredgeR = crate::FieldReader; +impl SyncclredgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SYNCCLREDGE_A::RISE), - 1 => Some(SYNCCLREDGE_A::FALL), + 0 => Some(Syncclredge::Rise), + 1 => Some(Syncclredge::Fall), _ => None, } } - #[doc = "Checks if the value of the field is `RISE`"] + #[doc = "Use rising edge detection"] #[inline(always)] pub fn is_rise(&self) -> bool { - *self == SYNCCLREDGE_A::RISE + *self == Syncclredge::Rise } - #[doc = "Checks if the value of the field is `FALL`"] + #[doc = "Use falling edge detection"] #[inline(always)] pub fn is_fall(&self) -> bool { - *self == SYNCCLREDGE_A::FALL + *self == Syncclredge::Fall } } #[doc = "Field `SYNCCLREDGE` writer - Hardware Sync Trigger Clear Edge Select"] -pub type SYNCCLREDGE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYNCHWSEL_SPEC, u8, SYNCCLREDGE_A, 8, O>; -impl<'a, const O: u8> SYNCCLREDGE_W<'a, O> { +pub type SyncclredgeW<'a, REG> = crate::FieldWriter<'a, REG, 8, Syncclredge>; +impl<'a, REG> SyncclredgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Use rising edge detection"] #[inline(always)] - pub fn rise(self) -> &'a mut W { - self.variant(SYNCCLREDGE_A::RISE) + pub fn rise(self) -> &'a mut crate::W { + self.variant(Syncclredge::Rise) } #[doc = "Use falling edge detection"] #[inline(always)] - pub fn fall(self) -> &'a mut W { - self.variant(SYNCCLREDGE_A::FALL) + pub fn fall(self) -> &'a mut crate::W { + self.variant(Syncclredge::Fall) } } impl R { #[doc = "Bits 0:7 - Hardware Sync Trigger Set Edge Select"] #[inline(always)] - pub fn syncsetedge(&self) -> SYNCSETEDGE_R { - SYNCSETEDGE_R::new((self.bits & 0xff) as u8) + pub fn syncsetedge(&self) -> SyncsetedgeR { + SyncsetedgeR::new((self.bits & 0xff) as u8) } #[doc = "Bits 16:23 - Hardware Sync Trigger Clear Edge Select"] #[inline(always)] - pub fn syncclredge(&self) -> SYNCCLREDGE_R { - SYNCCLREDGE_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn syncclredge(&self) -> SyncclredgeR { + SyncclredgeR::new(((self.bits >> 16) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Hardware Sync Trigger Set Edge Select"] #[inline(always)] #[must_use] - pub fn syncsetedge(&mut self) -> SYNCSETEDGE_W<0> { - SYNCSETEDGE_W::new(self) + pub fn syncsetedge(&mut self) -> SyncsetedgeW { + SyncsetedgeW::new(self, 0) } #[doc = "Bits 16:23 - Hardware Sync Trigger Clear Edge Select"] #[inline(always)] #[must_use] - pub fn syncclredge(&mut self) -> SYNCCLREDGE_W<16> { - SYNCCLREDGE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn syncclredge(&mut self) -> SyncclredgeW { + SyncclredgeW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [synchwsel](index.html) module"] -pub struct SYNCHWSEL_SPEC; -impl crate::RegisterSpec for SYNCHWSEL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`synchwsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synchwsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SynchwselSpec; +impl crate::RegisterSpec for SynchwselSpec { type Ux = u32; } -#[doc = "`read()` method returns [synchwsel::R](R) reader structure"] -impl crate::Readable for SYNCHWSEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [synchwsel::W](W) writer structure"] -impl crate::Writable for SYNCHWSEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`synchwsel::R`](R) reader structure"] +impl crate::Readable for SynchwselSpec {} +#[doc = "`write(|w| ..)` method takes [`synchwsel::W`](W) writer structure"] +impl crate::Writable for SynchwselSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYNCHWSEL to value 0"] -impl crate::Resettable for SYNCHWSEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SynchwselSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/syncstatus.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/syncstatus.rs index 15c8e09..cd5ffdd 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/syncstatus.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/syncstatus.rs @@ -1,37 +1,22 @@ #[doc = "Register `SYNCSTATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `SYNCTRIG` reader - sync trig status"] -pub type SYNCTRIG_R = crate::FieldReader; +pub type SynctrigR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - sync trig status"] #[inline(always)] - pub fn synctrig(&self) -> SYNCTRIG_R { - SYNCTRIG_R::new((self.bits & 0xff) as u8) + pub fn synctrig(&self) -> SynctrigR { + SynctrigR::new((self.bits & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncstatus](index.html) module"] -pub struct SYNCSTATUS_SPEC; -impl crate::RegisterSpec for SYNCSTATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncstatus::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncstatusSpec; +impl crate::RegisterSpec for SyncstatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [syncstatus::R](R) reader structure"] -impl crate::Readable for SYNCSTATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncstatus::R`](R) reader structure"] +impl crate::Readable for SyncstatusSpec {} #[doc = "`reset()` method sets SYNCSTATUS to value 0"] -impl crate::Resettable for SYNCSTATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncstatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/syncswclr.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/syncswclr.rs index d02ad6d..b0ed23b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/syncswclr.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/syncswclr.rs @@ -1,52 +1,27 @@ #[doc = "Register `SYNCSWCLR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SYNCSWCLR` writer - DMA SYNC Software Trigger Clear"] -pub type SYNCSWCLR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SYNCSWCLR_SPEC, u8, u8, 8, O>; +pub type SyncswclrW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - DMA SYNC Software Trigger Clear"] #[inline(always)] #[must_use] - pub fn syncswclr(&mut self) -> SYNCSWCLR_W<0> { - SYNCSWCLR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn syncswclr(&mut self) -> SyncswclrW { + SyncswclrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncswclr](index.html) module"] -pub struct SYNCSWCLR_SPEC; -impl crate::RegisterSpec for SYNCSWCLR_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`syncswclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncswclrSpec; +impl crate::RegisterSpec for SyncswclrSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [syncswclr::W](W) writer structure"] -impl crate::Writable for SYNCSWCLR_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`syncswclr::W`](W) writer structure"] +impl crate::Writable for SyncswclrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYNCSWCLR to value 0"] -impl crate::Resettable for SYNCSWCLR_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncswclrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/syncswset.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/syncswset.rs index a9cb984..12c585a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/syncswset.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_ns/syncswset.rs @@ -1,52 +1,27 @@ #[doc = "Register `SYNCSWSET` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SYNCSWSET` writer - DMA SYNC Software Trigger Set"] -pub type SYNCSWSET_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SYNCSWSET_SPEC, u8, u8, 8, O>; +pub type SyncswsetW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - DMA SYNC Software Trigger Set"] #[inline(always)] #[must_use] - pub fn syncswset(&mut self) -> SYNCSWSET_W<0> { - SYNCSWSET_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn syncswset(&mut self) -> SyncswsetW { + SyncswsetW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncswset](index.html) module"] -pub struct SYNCSWSET_SPEC; -impl crate::RegisterSpec for SYNCSWSET_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`syncswset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncswsetSpec; +impl crate::RegisterSpec for SyncswsetSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [syncswset::W](W) writer structure"] -impl crate::Writable for SYNCSWSET_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`syncswset::W`](W) writer structure"] +impl crate::Writable for SyncswsetSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYNCSWSET to value 0"] -impl crate::Resettable for SYNCSWSET_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncswsetSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s.rs index 4c7511b..6eb6ff1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s.rs @@ -1,432 +1,854 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + ctrl: Ctrl, + status: Status, + syncswset: Syncswset, + syncswclr: Syncswclr, + synchwen: Synchwen, + synchwsel: Synchwsel, + syncstatus: Syncstatus, + chen: Chen, + chdis: Chdis, + chstatus: Chstatus, + chbusy: Chbusy, + chdone: Chdone, + dbghalt: Dbghalt, + swreq: Swreq, + reqdis: Reqdis, + reqpend: Reqpend, + linkload: Linkload, + reqclear: Reqclear, + if_: If, + ien: Ien, + _reserved22: [u8; 0x04], + ch0_cfg: Ch0Cfg, + ch0_loop: Ch0Loop, + ch0_ctrl: Ch0Ctrl, + ch0_src: Ch0Src, + ch0_dst: Ch0Dst, + ch0_link: Ch0Link, + _reserved28: [u8; 0x18], + ch1_cfg: Ch1Cfg, + ch1_loop: Ch1Loop, + ch1_ctrl: Ch1Ctrl, + ch1_src: Ch1Src, + ch1_dst: Ch1Dst, + ch1_link: Ch1Link, + _reserved34: [u8; 0x18], + ch2_cfg: Ch2Cfg, + ch2_loop: Ch2Loop, + ch2_ctrl: Ch2Ctrl, + ch2_src: Ch2Src, + ch2_dst: Ch2Dst, + ch2_link: Ch2Link, + _reserved40: [u8; 0x18], + ch3_cfg: Ch3Cfg, + ch3_loop: Ch3Loop, + ch3_ctrl: Ch3Ctrl, + ch3_src: Ch3Src, + ch3_dst: Ch3Dst, + ch3_link: Ch3Link, + _reserved46: [u8; 0x18], + ch4_cfg: Ch4Cfg, + ch4_loop: Ch4Loop, + ch4_ctrl: Ch4Ctrl, + ch4_src: Ch4Src, + ch4_dst: Ch4Dst, + ch4_link: Ch4Link, + _reserved52: [u8; 0x18], + ch5_cfg: Ch5Cfg, + ch5_loop: Ch5Loop, + ch5_ctrl: Ch5Ctrl, + ch5_src: Ch5Src, + ch5_dst: Ch5Dst, + ch5_link: Ch5Link, + _reserved58: [u8; 0x18], + ch6_cfg: Ch6Cfg, + ch6_loop: Ch6Loop, + ch6_ctrl: Ch6Ctrl, + ch6_src: Ch6Src, + ch6_dst: Ch6Dst, + ch6_link: Ch6Link, + _reserved64: [u8; 0x18], + ch7_cfg: Ch7Cfg, + ch7_loop: Ch7Loop, + ch7_ctrl: Ch7Ctrl, + ch7_src: Ch7Src, + ch7_dst: Ch7Dst, + ch7_link: Ch7Link, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x0c - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x10 - No Description"] - pub syncswset: SYNCSWSET, + #[inline(always)] + pub const fn syncswset(&self) -> &Syncswset { + &self.syncswset + } #[doc = "0x14 - No Description"] - pub syncswclr: SYNCSWCLR, + #[inline(always)] + pub const fn syncswclr(&self) -> &Syncswclr { + &self.syncswclr + } #[doc = "0x18 - No Description"] - pub synchwen: SYNCHWEN, + #[inline(always)] + pub const fn synchwen(&self) -> &Synchwen { + &self.synchwen + } #[doc = "0x1c - No Description"] - pub synchwsel: SYNCHWSEL, + #[inline(always)] + pub const fn synchwsel(&self) -> &Synchwsel { + &self.synchwsel + } #[doc = "0x20 - No Description"] - pub syncstatus: SYNCSTATUS, + #[inline(always)] + pub const fn syncstatus(&self) -> &Syncstatus { + &self.syncstatus + } #[doc = "0x24 - No Description"] - pub chen: CHEN, + #[inline(always)] + pub const fn chen(&self) -> &Chen { + &self.chen + } #[doc = "0x28 - No Description"] - pub chdis: CHDIS, + #[inline(always)] + pub const fn chdis(&self) -> &Chdis { + &self.chdis + } #[doc = "0x2c - No Description"] - pub chstatus: CHSTATUS, + #[inline(always)] + pub const fn chstatus(&self) -> &Chstatus { + &self.chstatus + } #[doc = "0x30 - No Description"] - pub chbusy: CHBUSY, + #[inline(always)] + pub const fn chbusy(&self) -> &Chbusy { + &self.chbusy + } #[doc = "0x34 - No Description"] - pub chdone: CHDONE, + #[inline(always)] + pub const fn chdone(&self) -> &Chdone { + &self.chdone + } #[doc = "0x38 - No Description"] - pub dbghalt: DBGHALT, + #[inline(always)] + pub const fn dbghalt(&self) -> &Dbghalt { + &self.dbghalt + } #[doc = "0x3c - No Description"] - pub swreq: SWREQ, + #[inline(always)] + pub const fn swreq(&self) -> &Swreq { + &self.swreq + } #[doc = "0x40 - No Description"] - pub reqdis: REQDIS, + #[inline(always)] + pub const fn reqdis(&self) -> &Reqdis { + &self.reqdis + } #[doc = "0x44 - No Description"] - pub reqpend: REQPEND, + #[inline(always)] + pub const fn reqpend(&self) -> &Reqpend { + &self.reqpend + } #[doc = "0x48 - No Description"] - pub linkload: LINKLOAD, + #[inline(always)] + pub const fn linkload(&self) -> &Linkload { + &self.linkload + } #[doc = "0x4c - No Description"] - pub reqclear: REQCLEAR, + #[inline(always)] + pub const fn reqclear(&self) -> &Reqclear { + &self.reqclear + } #[doc = "0x50 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x54 - No Description"] - pub ien: IEN, - _reserved22: [u8; 0x04], + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x5c - No Description"] - pub ch0_cfg: CH0_CFG, + #[inline(always)] + pub const fn ch0_cfg(&self) -> &Ch0Cfg { + &self.ch0_cfg + } #[doc = "0x60 - No Description"] - pub ch0_loop: CH0_LOOP, + #[inline(always)] + pub const fn ch0_loop(&self) -> &Ch0Loop { + &self.ch0_loop + } #[doc = "0x64 - No Description"] - pub ch0_ctrl: CH0_CTRL, + #[inline(always)] + pub const fn ch0_ctrl(&self) -> &Ch0Ctrl { + &self.ch0_ctrl + } #[doc = "0x68 - No Description"] - pub ch0_src: CH0_SRC, + #[inline(always)] + pub const fn ch0_src(&self) -> &Ch0Src { + &self.ch0_src + } #[doc = "0x6c - No Description"] - pub ch0_dst: CH0_DST, + #[inline(always)] + pub const fn ch0_dst(&self) -> &Ch0Dst { + &self.ch0_dst + } #[doc = "0x70 - No Description"] - pub ch0_link: CH0_LINK, - _reserved28: [u8; 0x18], + #[inline(always)] + pub const fn ch0_link(&self) -> &Ch0Link { + &self.ch0_link + } #[doc = "0x8c - No Description"] - pub ch1_cfg: CH1_CFG, + #[inline(always)] + pub const fn ch1_cfg(&self) -> &Ch1Cfg { + &self.ch1_cfg + } #[doc = "0x90 - No Description"] - pub ch1_loop: CH1_LOOP, + #[inline(always)] + pub const fn ch1_loop(&self) -> &Ch1Loop { + &self.ch1_loop + } #[doc = "0x94 - No Description"] - pub ch1_ctrl: CH1_CTRL, + #[inline(always)] + pub const fn ch1_ctrl(&self) -> &Ch1Ctrl { + &self.ch1_ctrl + } #[doc = "0x98 - No Description"] - pub ch1_src: CH1_SRC, + #[inline(always)] + pub const fn ch1_src(&self) -> &Ch1Src { + &self.ch1_src + } #[doc = "0x9c - No Description"] - pub ch1_dst: CH1_DST, + #[inline(always)] + pub const fn ch1_dst(&self) -> &Ch1Dst { + &self.ch1_dst + } #[doc = "0xa0 - No Description"] - pub ch1_link: CH1_LINK, - _reserved34: [u8; 0x18], + #[inline(always)] + pub const fn ch1_link(&self) -> &Ch1Link { + &self.ch1_link + } #[doc = "0xbc - No Description"] - pub ch2_cfg: CH2_CFG, + #[inline(always)] + pub const fn ch2_cfg(&self) -> &Ch2Cfg { + &self.ch2_cfg + } #[doc = "0xc0 - No Description"] - pub ch2_loop: CH2_LOOP, + #[inline(always)] + pub const fn ch2_loop(&self) -> &Ch2Loop { + &self.ch2_loop + } #[doc = "0xc4 - No Description"] - pub ch2_ctrl: CH2_CTRL, + #[inline(always)] + pub const fn ch2_ctrl(&self) -> &Ch2Ctrl { + &self.ch2_ctrl + } #[doc = "0xc8 - No Description"] - pub ch2_src: CH2_SRC, + #[inline(always)] + pub const fn ch2_src(&self) -> &Ch2Src { + &self.ch2_src + } #[doc = "0xcc - No Description"] - pub ch2_dst: CH2_DST, + #[inline(always)] + pub const fn ch2_dst(&self) -> &Ch2Dst { + &self.ch2_dst + } #[doc = "0xd0 - No Description"] - pub ch2_link: CH2_LINK, - _reserved40: [u8; 0x18], + #[inline(always)] + pub const fn ch2_link(&self) -> &Ch2Link { + &self.ch2_link + } #[doc = "0xec - No Description"] - pub ch3_cfg: CH3_CFG, + #[inline(always)] + pub const fn ch3_cfg(&self) -> &Ch3Cfg { + &self.ch3_cfg + } #[doc = "0xf0 - No Description"] - pub ch3_loop: CH3_LOOP, + #[inline(always)] + pub const fn ch3_loop(&self) -> &Ch3Loop { + &self.ch3_loop + } #[doc = "0xf4 - No Description"] - pub ch3_ctrl: CH3_CTRL, + #[inline(always)] + pub const fn ch3_ctrl(&self) -> &Ch3Ctrl { + &self.ch3_ctrl + } #[doc = "0xf8 - No Description"] - pub ch3_src: CH3_SRC, + #[inline(always)] + pub const fn ch3_src(&self) -> &Ch3Src { + &self.ch3_src + } #[doc = "0xfc - No Description"] - pub ch3_dst: CH3_DST, + #[inline(always)] + pub const fn ch3_dst(&self) -> &Ch3Dst { + &self.ch3_dst + } #[doc = "0x100 - No Description"] - pub ch3_link: CH3_LINK, - _reserved46: [u8; 0x18], + #[inline(always)] + pub const fn ch3_link(&self) -> &Ch3Link { + &self.ch3_link + } #[doc = "0x11c - No Description"] - pub ch4_cfg: CH4_CFG, + #[inline(always)] + pub const fn ch4_cfg(&self) -> &Ch4Cfg { + &self.ch4_cfg + } #[doc = "0x120 - No Description"] - pub ch4_loop: CH4_LOOP, + #[inline(always)] + pub const fn ch4_loop(&self) -> &Ch4Loop { + &self.ch4_loop + } #[doc = "0x124 - No Description"] - pub ch4_ctrl: CH4_CTRL, + #[inline(always)] + pub const fn ch4_ctrl(&self) -> &Ch4Ctrl { + &self.ch4_ctrl + } #[doc = "0x128 - No Description"] - pub ch4_src: CH4_SRC, + #[inline(always)] + pub const fn ch4_src(&self) -> &Ch4Src { + &self.ch4_src + } #[doc = "0x12c - No Description"] - pub ch4_dst: CH4_DST, + #[inline(always)] + pub const fn ch4_dst(&self) -> &Ch4Dst { + &self.ch4_dst + } #[doc = "0x130 - No Description"] - pub ch4_link: CH4_LINK, - _reserved52: [u8; 0x18], + #[inline(always)] + pub const fn ch4_link(&self) -> &Ch4Link { + &self.ch4_link + } #[doc = "0x14c - No Description"] - pub ch5_cfg: CH5_CFG, + #[inline(always)] + pub const fn ch5_cfg(&self) -> &Ch5Cfg { + &self.ch5_cfg + } #[doc = "0x150 - No Description"] - pub ch5_loop: CH5_LOOP, + #[inline(always)] + pub const fn ch5_loop(&self) -> &Ch5Loop { + &self.ch5_loop + } #[doc = "0x154 - No Description"] - pub ch5_ctrl: CH5_CTRL, + #[inline(always)] + pub const fn ch5_ctrl(&self) -> &Ch5Ctrl { + &self.ch5_ctrl + } #[doc = "0x158 - No Description"] - pub ch5_src: CH5_SRC, + #[inline(always)] + pub const fn ch5_src(&self) -> &Ch5Src { + &self.ch5_src + } #[doc = "0x15c - No Description"] - pub ch5_dst: CH5_DST, + #[inline(always)] + pub const fn ch5_dst(&self) -> &Ch5Dst { + &self.ch5_dst + } #[doc = "0x160 - No Description"] - pub ch5_link: CH5_LINK, - _reserved58: [u8; 0x18], + #[inline(always)] + pub const fn ch5_link(&self) -> &Ch5Link { + &self.ch5_link + } #[doc = "0x17c - No Description"] - pub ch6_cfg: CH6_CFG, + #[inline(always)] + pub const fn ch6_cfg(&self) -> &Ch6Cfg { + &self.ch6_cfg + } #[doc = "0x180 - No Description"] - pub ch6_loop: CH6_LOOP, + #[inline(always)] + pub const fn ch6_loop(&self) -> &Ch6Loop { + &self.ch6_loop + } #[doc = "0x184 - No Description"] - pub ch6_ctrl: CH6_CTRL, + #[inline(always)] + pub const fn ch6_ctrl(&self) -> &Ch6Ctrl { + &self.ch6_ctrl + } #[doc = "0x188 - No Description"] - pub ch6_src: CH6_SRC, + #[inline(always)] + pub const fn ch6_src(&self) -> &Ch6Src { + &self.ch6_src + } #[doc = "0x18c - No Description"] - pub ch6_dst: CH6_DST, + #[inline(always)] + pub const fn ch6_dst(&self) -> &Ch6Dst { + &self.ch6_dst + } #[doc = "0x190 - No Description"] - pub ch6_link: CH6_LINK, - _reserved64: [u8; 0x18], + #[inline(always)] + pub const fn ch6_link(&self) -> &Ch6Link { + &self.ch6_link + } #[doc = "0x1ac - No Description"] - pub ch7_cfg: CH7_CFG, + #[inline(always)] + pub const fn ch7_cfg(&self) -> &Ch7Cfg { + &self.ch7_cfg + } #[doc = "0x1b0 - No Description"] - pub ch7_loop: CH7_LOOP, + #[inline(always)] + pub const fn ch7_loop(&self) -> &Ch7Loop { + &self.ch7_loop + } #[doc = "0x1b4 - No Description"] - pub ch7_ctrl: CH7_CTRL, + #[inline(always)] + pub const fn ch7_ctrl(&self) -> &Ch7Ctrl { + &self.ch7_ctrl + } #[doc = "0x1b8 - No Description"] - pub ch7_src: CH7_SRC, + #[inline(always)] + pub const fn ch7_src(&self) -> &Ch7Src { + &self.ch7_src + } #[doc = "0x1bc - No Description"] - pub ch7_dst: CH7_DST, + #[inline(always)] + pub const fn ch7_dst(&self) -> &Ch7Dst { + &self.ch7_dst + } #[doc = "0x1c0 - No Description"] - pub ch7_link: CH7_LINK, + #[inline(always)] + pub const fn ch7_link(&self) -> &Ch7Link { + &self.ch7_link + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "SYNCSWSET (w) register accessor: an alias for `Reg`"] -pub type SYNCSWSET = crate::Reg; +#[doc = "SYNCSWSET (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`syncswset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncswset`] +module"] +#[doc(alias = "SYNCSWSET")] +pub type Syncswset = crate::Reg; #[doc = "No Description"] pub mod syncswset; -#[doc = "SYNCSWCLR (w) register accessor: an alias for `Reg`"] -pub type SYNCSWCLR = crate::Reg; +#[doc = "SYNCSWCLR (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`syncswclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncswclr`] +module"] +#[doc(alias = "SYNCSWCLR")] +pub type Syncswclr = crate::Reg; #[doc = "No Description"] pub mod syncswclr; -#[doc = "SYNCHWEN (rw) register accessor: an alias for `Reg`"] -pub type SYNCHWEN = crate::Reg; +#[doc = "SYNCHWEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`synchwen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synchwen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synchwen`] +module"] +#[doc(alias = "SYNCHWEN")] +pub type Synchwen = crate::Reg; #[doc = "No Description"] pub mod synchwen; -#[doc = "SYNCHWSEL (rw) register accessor: an alias for `Reg`"] -pub type SYNCHWSEL = crate::Reg; +#[doc = "SYNCHWSEL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`synchwsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synchwsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synchwsel`] +module"] +#[doc(alias = "SYNCHWSEL")] +pub type Synchwsel = crate::Reg; #[doc = "No Description"] pub mod synchwsel; -#[doc = "SYNCSTATUS (r) register accessor: an alias for `Reg`"] -pub type SYNCSTATUS = crate::Reg; +#[doc = "SYNCSTATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncstatus`] +module"] +#[doc(alias = "SYNCSTATUS")] +pub type Syncstatus = crate::Reg; #[doc = "No Description"] pub mod syncstatus; -#[doc = "CHEN (w) register accessor: an alias for `Reg`"] -pub type CHEN = crate::Reg; +#[doc = "CHEN (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chen::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chen`] +module"] +#[doc(alias = "CHEN")] +pub type Chen = crate::Reg; #[doc = "No Description"] pub mod chen; -#[doc = "CHDIS (w) register accessor: an alias for `Reg`"] -pub type CHDIS = crate::Reg; +#[doc = "CHDIS (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chdis::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chdis`] +module"] +#[doc(alias = "CHDIS")] +pub type Chdis = crate::Reg; #[doc = "No Description"] pub mod chdis; -#[doc = "CHSTATUS (r) register accessor: an alias for `Reg`"] -pub type CHSTATUS = crate::Reg; +#[doc = "CHSTATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`chstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chstatus`] +module"] +#[doc(alias = "CHSTATUS")] +pub type Chstatus = crate::Reg; #[doc = "No Description"] pub mod chstatus; -#[doc = "CHBUSY (r) register accessor: an alias for `Reg`"] -pub type CHBUSY = crate::Reg; +#[doc = "CHBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`chbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chbusy`] +module"] +#[doc(alias = "CHBUSY")] +pub type Chbusy = crate::Reg; #[doc = "No Description"] pub mod chbusy; -#[doc = "CHDONE (rw) register accessor: an alias for `Reg`"] -pub type CHDONE = crate::Reg; +#[doc = "CHDONE (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`chdone::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chdone::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chdone`] +module"] +#[doc(alias = "CHDONE")] +pub type Chdone = crate::Reg; #[doc = "No Description"] pub mod chdone; -#[doc = "DBGHALT (rw) register accessor: an alias for `Reg`"] -pub type DBGHALT = crate::Reg; +#[doc = "DBGHALT (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dbghalt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dbghalt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dbghalt`] +module"] +#[doc(alias = "DBGHALT")] +pub type Dbghalt = crate::Reg; #[doc = "No Description"] pub mod dbghalt; -#[doc = "SWREQ (w) register accessor: an alias for `Reg`"] -pub type SWREQ = crate::Reg; +#[doc = "SWREQ (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swreq::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swreq`] +module"] +#[doc(alias = "SWREQ")] +pub type Swreq = crate::Reg; #[doc = "No Description"] pub mod swreq; -#[doc = "REQDIS (rw) register accessor: an alias for `Reg`"] -pub type REQDIS = crate::Reg; +#[doc = "REQDIS (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`reqdis::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`reqdis::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@reqdis`] +module"] +#[doc(alias = "REQDIS")] +pub type Reqdis = crate::Reg; #[doc = "No Description"] pub mod reqdis; -#[doc = "REQPEND (r) register accessor: an alias for `Reg`"] -pub type REQPEND = crate::Reg; +#[doc = "REQPEND (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`reqpend::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@reqpend`] +module"] +#[doc(alias = "REQPEND")] +pub type Reqpend = crate::Reg; #[doc = "No Description"] pub mod reqpend; -#[doc = "LINKLOAD (w) register accessor: an alias for `Reg`"] -pub type LINKLOAD = crate::Reg; +#[doc = "LINKLOAD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`linkload::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@linkload`] +module"] +#[doc(alias = "LINKLOAD")] +pub type Linkload = crate::Reg; #[doc = "No Description"] pub mod linkload; -#[doc = "REQCLEAR (w) register accessor: an alias for `Reg`"] -pub type REQCLEAR = crate::Reg; +#[doc = "REQCLEAR (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`reqclear::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@reqclear`] +module"] +#[doc(alias = "REQCLEAR")] +pub type Reqclear = crate::Reg; #[doc = "No Description"] pub mod reqclear; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "CH0_CFG (rw) register accessor: an alias for `Reg`"] -pub type CH0_CFG = crate::Reg; +#[doc = "CH0_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch0_cfg`] +module"] +#[doc(alias = "CH0_CFG")] +pub type Ch0Cfg = crate::Reg; #[doc = "No Description"] pub mod ch0_cfg; -#[doc = "CH0_LOOP (rw) register accessor: an alias for `Reg`"] -pub type CH0_LOOP = crate::Reg; +#[doc = "CH0_LOOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_loop::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_loop::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch0_loop`] +module"] +#[doc(alias = "CH0_LOOP")] +pub type Ch0Loop = crate::Reg; #[doc = "No Description"] pub mod ch0_loop; -#[doc = "CH0_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CH0_CTRL = crate::Reg; +#[doc = "CH0_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch0_ctrl`] +module"] +#[doc(alias = "CH0_CTRL")] +pub type Ch0Ctrl = crate::Reg; #[doc = "No Description"] pub mod ch0_ctrl; -#[doc = "CH0_SRC (rw) register accessor: an alias for `Reg`"] -pub type CH0_SRC = crate::Reg; +#[doc = "CH0_SRC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_src::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_src::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch0_src`] +module"] +#[doc(alias = "CH0_SRC")] +pub type Ch0Src = crate::Reg; #[doc = "No Description"] pub mod ch0_src; -#[doc = "CH0_DST (rw) register accessor: an alias for `Reg`"] -pub type CH0_DST = crate::Reg; +#[doc = "CH0_DST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_dst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_dst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch0_dst`] +module"] +#[doc(alias = "CH0_DST")] +pub type Ch0Dst = crate::Reg; #[doc = "No Description"] pub mod ch0_dst; -#[doc = "CH0_LINK (rw) register accessor: an alias for `Reg`"] -pub type CH0_LINK = crate::Reg; +#[doc = "CH0_LINK (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_link::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_link::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch0_link`] +module"] +#[doc(alias = "CH0_LINK")] +pub type Ch0Link = crate::Reg; #[doc = "No Description"] pub mod ch0_link; -#[doc = "CH1_CFG (rw) register accessor: an alias for `Reg`"] -pub type CH1_CFG = crate::Reg; +#[doc = "CH1_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch1_cfg`] +module"] +#[doc(alias = "CH1_CFG")] +pub type Ch1Cfg = crate::Reg; #[doc = "No Description"] pub mod ch1_cfg; -#[doc = "CH1_LOOP (rw) register accessor: an alias for `Reg`"] -pub type CH1_LOOP = crate::Reg; +#[doc = "CH1_LOOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_loop::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_loop::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch1_loop`] +module"] +#[doc(alias = "CH1_LOOP")] +pub type Ch1Loop = crate::Reg; #[doc = "No Description"] pub mod ch1_loop; -#[doc = "CH1_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CH1_CTRL = crate::Reg; +#[doc = "CH1_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch1_ctrl`] +module"] +#[doc(alias = "CH1_CTRL")] +pub type Ch1Ctrl = crate::Reg; #[doc = "No Description"] pub mod ch1_ctrl; -#[doc = "CH1_SRC (rw) register accessor: an alias for `Reg`"] -pub type CH1_SRC = crate::Reg; +#[doc = "CH1_SRC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_src::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_src::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch1_src`] +module"] +#[doc(alias = "CH1_SRC")] +pub type Ch1Src = crate::Reg; #[doc = "No Description"] pub mod ch1_src; -#[doc = "CH1_DST (rw) register accessor: an alias for `Reg`"] -pub type CH1_DST = crate::Reg; +#[doc = "CH1_DST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_dst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_dst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch1_dst`] +module"] +#[doc(alias = "CH1_DST")] +pub type Ch1Dst = crate::Reg; #[doc = "No Description"] pub mod ch1_dst; -#[doc = "CH1_LINK (rw) register accessor: an alias for `Reg`"] -pub type CH1_LINK = crate::Reg; +#[doc = "CH1_LINK (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_link::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_link::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch1_link`] +module"] +#[doc(alias = "CH1_LINK")] +pub type Ch1Link = crate::Reg; #[doc = "No Description"] pub mod ch1_link; -#[doc = "CH2_CFG (rw) register accessor: an alias for `Reg`"] -pub type CH2_CFG = crate::Reg; +#[doc = "CH2_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch2_cfg`] +module"] +#[doc(alias = "CH2_CFG")] +pub type Ch2Cfg = crate::Reg; #[doc = "No Description"] pub mod ch2_cfg; -#[doc = "CH2_LOOP (rw) register accessor: an alias for `Reg`"] -pub type CH2_LOOP = crate::Reg; +#[doc = "CH2_LOOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_loop::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_loop::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch2_loop`] +module"] +#[doc(alias = "CH2_LOOP")] +pub type Ch2Loop = crate::Reg; #[doc = "No Description"] pub mod ch2_loop; -#[doc = "CH2_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CH2_CTRL = crate::Reg; +#[doc = "CH2_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch2_ctrl`] +module"] +#[doc(alias = "CH2_CTRL")] +pub type Ch2Ctrl = crate::Reg; #[doc = "No Description"] pub mod ch2_ctrl; -#[doc = "CH2_SRC (rw) register accessor: an alias for `Reg`"] -pub type CH2_SRC = crate::Reg; +#[doc = "CH2_SRC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_src::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_src::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch2_src`] +module"] +#[doc(alias = "CH2_SRC")] +pub type Ch2Src = crate::Reg; #[doc = "No Description"] pub mod ch2_src; -#[doc = "CH2_DST (rw) register accessor: an alias for `Reg`"] -pub type CH2_DST = crate::Reg; +#[doc = "CH2_DST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_dst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_dst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch2_dst`] +module"] +#[doc(alias = "CH2_DST")] +pub type Ch2Dst = crate::Reg; #[doc = "No Description"] pub mod ch2_dst; -#[doc = "CH2_LINK (rw) register accessor: an alias for `Reg`"] -pub type CH2_LINK = crate::Reg; +#[doc = "CH2_LINK (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_link::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_link::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch2_link`] +module"] +#[doc(alias = "CH2_LINK")] +pub type Ch2Link = crate::Reg; #[doc = "No Description"] pub mod ch2_link; -#[doc = "CH3_CFG (rw) register accessor: an alias for `Reg`"] -pub type CH3_CFG = crate::Reg; +#[doc = "CH3_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch3_cfg`] +module"] +#[doc(alias = "CH3_CFG")] +pub type Ch3Cfg = crate::Reg; #[doc = "No Description"] pub mod ch3_cfg; -#[doc = "CH3_LOOP (rw) register accessor: an alias for `Reg`"] -pub type CH3_LOOP = crate::Reg; +#[doc = "CH3_LOOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_loop::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_loop::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch3_loop`] +module"] +#[doc(alias = "CH3_LOOP")] +pub type Ch3Loop = crate::Reg; #[doc = "No Description"] pub mod ch3_loop; -#[doc = "CH3_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CH3_CTRL = crate::Reg; +#[doc = "CH3_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch3_ctrl`] +module"] +#[doc(alias = "CH3_CTRL")] +pub type Ch3Ctrl = crate::Reg; #[doc = "No Description"] pub mod ch3_ctrl; -#[doc = "CH3_SRC (rw) register accessor: an alias for `Reg`"] -pub type CH3_SRC = crate::Reg; +#[doc = "CH3_SRC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_src::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_src::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch3_src`] +module"] +#[doc(alias = "CH3_SRC")] +pub type Ch3Src = crate::Reg; #[doc = "No Description"] pub mod ch3_src; -#[doc = "CH3_DST (rw) register accessor: an alias for `Reg`"] -pub type CH3_DST = crate::Reg; +#[doc = "CH3_DST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_dst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_dst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch3_dst`] +module"] +#[doc(alias = "CH3_DST")] +pub type Ch3Dst = crate::Reg; #[doc = "No Description"] pub mod ch3_dst; -#[doc = "CH3_LINK (rw) register accessor: an alias for `Reg`"] -pub type CH3_LINK = crate::Reg; +#[doc = "CH3_LINK (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_link::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_link::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch3_link`] +module"] +#[doc(alias = "CH3_LINK")] +pub type Ch3Link = crate::Reg; #[doc = "No Description"] pub mod ch3_link; -#[doc = "CH4_CFG (rw) register accessor: an alias for `Reg`"] -pub type CH4_CFG = crate::Reg; +#[doc = "CH4_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch4_cfg`] +module"] +#[doc(alias = "CH4_CFG")] +pub type Ch4Cfg = crate::Reg; #[doc = "No Description"] pub mod ch4_cfg; -#[doc = "CH4_LOOP (rw) register accessor: an alias for `Reg`"] -pub type CH4_LOOP = crate::Reg; +#[doc = "CH4_LOOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_loop::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_loop::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch4_loop`] +module"] +#[doc(alias = "CH4_LOOP")] +pub type Ch4Loop = crate::Reg; #[doc = "No Description"] pub mod ch4_loop; -#[doc = "CH4_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CH4_CTRL = crate::Reg; +#[doc = "CH4_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch4_ctrl`] +module"] +#[doc(alias = "CH4_CTRL")] +pub type Ch4Ctrl = crate::Reg; #[doc = "No Description"] pub mod ch4_ctrl; -#[doc = "CH4_SRC (rw) register accessor: an alias for `Reg`"] -pub type CH4_SRC = crate::Reg; +#[doc = "CH4_SRC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_src::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_src::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch4_src`] +module"] +#[doc(alias = "CH4_SRC")] +pub type Ch4Src = crate::Reg; #[doc = "No Description"] pub mod ch4_src; -#[doc = "CH4_DST (rw) register accessor: an alias for `Reg`"] -pub type CH4_DST = crate::Reg; +#[doc = "CH4_DST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_dst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_dst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch4_dst`] +module"] +#[doc(alias = "CH4_DST")] +pub type Ch4Dst = crate::Reg; #[doc = "No Description"] pub mod ch4_dst; -#[doc = "CH4_LINK (rw) register accessor: an alias for `Reg`"] -pub type CH4_LINK = crate::Reg; +#[doc = "CH4_LINK (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_link::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_link::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch4_link`] +module"] +#[doc(alias = "CH4_LINK")] +pub type Ch4Link = crate::Reg; #[doc = "No Description"] pub mod ch4_link; -#[doc = "CH5_CFG (rw) register accessor: an alias for `Reg`"] -pub type CH5_CFG = crate::Reg; +#[doc = "CH5_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch5_cfg`] +module"] +#[doc(alias = "CH5_CFG")] +pub type Ch5Cfg = crate::Reg; #[doc = "No Description"] pub mod ch5_cfg; -#[doc = "CH5_LOOP (rw) register accessor: an alias for `Reg`"] -pub type CH5_LOOP = crate::Reg; +#[doc = "CH5_LOOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_loop::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_loop::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch5_loop`] +module"] +#[doc(alias = "CH5_LOOP")] +pub type Ch5Loop = crate::Reg; #[doc = "No Description"] pub mod ch5_loop; -#[doc = "CH5_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CH5_CTRL = crate::Reg; +#[doc = "CH5_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch5_ctrl`] +module"] +#[doc(alias = "CH5_CTRL")] +pub type Ch5Ctrl = crate::Reg; #[doc = "No Description"] pub mod ch5_ctrl; -#[doc = "CH5_SRC (rw) register accessor: an alias for `Reg`"] -pub type CH5_SRC = crate::Reg; +#[doc = "CH5_SRC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_src::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_src::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch5_src`] +module"] +#[doc(alias = "CH5_SRC")] +pub type Ch5Src = crate::Reg; #[doc = "No Description"] pub mod ch5_src; -#[doc = "CH5_DST (rw) register accessor: an alias for `Reg`"] -pub type CH5_DST = crate::Reg; +#[doc = "CH5_DST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_dst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_dst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch5_dst`] +module"] +#[doc(alias = "CH5_DST")] +pub type Ch5Dst = crate::Reg; #[doc = "No Description"] pub mod ch5_dst; -#[doc = "CH5_LINK (rw) register accessor: an alias for `Reg`"] -pub type CH5_LINK = crate::Reg; +#[doc = "CH5_LINK (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_link::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_link::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch5_link`] +module"] +#[doc(alias = "CH5_LINK")] +pub type Ch5Link = crate::Reg; #[doc = "No Description"] pub mod ch5_link; -#[doc = "CH6_CFG (rw) register accessor: an alias for `Reg`"] -pub type CH6_CFG = crate::Reg; +#[doc = "CH6_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch6_cfg`] +module"] +#[doc(alias = "CH6_CFG")] +pub type Ch6Cfg = crate::Reg; #[doc = "No Description"] pub mod ch6_cfg; -#[doc = "CH6_LOOP (rw) register accessor: an alias for `Reg`"] -pub type CH6_LOOP = crate::Reg; +#[doc = "CH6_LOOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_loop::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_loop::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch6_loop`] +module"] +#[doc(alias = "CH6_LOOP")] +pub type Ch6Loop = crate::Reg; #[doc = "No Description"] pub mod ch6_loop; -#[doc = "CH6_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CH6_CTRL = crate::Reg; +#[doc = "CH6_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch6_ctrl`] +module"] +#[doc(alias = "CH6_CTRL")] +pub type Ch6Ctrl = crate::Reg; #[doc = "No Description"] pub mod ch6_ctrl; -#[doc = "CH6_SRC (rw) register accessor: an alias for `Reg`"] -pub type CH6_SRC = crate::Reg; +#[doc = "CH6_SRC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_src::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_src::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch6_src`] +module"] +#[doc(alias = "CH6_SRC")] +pub type Ch6Src = crate::Reg; #[doc = "No Description"] pub mod ch6_src; -#[doc = "CH6_DST (rw) register accessor: an alias for `Reg`"] -pub type CH6_DST = crate::Reg; +#[doc = "CH6_DST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_dst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_dst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch6_dst`] +module"] +#[doc(alias = "CH6_DST")] +pub type Ch6Dst = crate::Reg; #[doc = "No Description"] pub mod ch6_dst; -#[doc = "CH6_LINK (rw) register accessor: an alias for `Reg`"] -pub type CH6_LINK = crate::Reg; +#[doc = "CH6_LINK (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_link::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_link::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch6_link`] +module"] +#[doc(alias = "CH6_LINK")] +pub type Ch6Link = crate::Reg; #[doc = "No Description"] pub mod ch6_link; -#[doc = "CH7_CFG (rw) register accessor: an alias for `Reg`"] -pub type CH7_CFG = crate::Reg; +#[doc = "CH7_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch7_cfg`] +module"] +#[doc(alias = "CH7_CFG")] +pub type Ch7Cfg = crate::Reg; #[doc = "No Description"] pub mod ch7_cfg; -#[doc = "CH7_LOOP (rw) register accessor: an alias for `Reg`"] -pub type CH7_LOOP = crate::Reg; +#[doc = "CH7_LOOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_loop::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_loop::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch7_loop`] +module"] +#[doc(alias = "CH7_LOOP")] +pub type Ch7Loop = crate::Reg; #[doc = "No Description"] pub mod ch7_loop; -#[doc = "CH7_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CH7_CTRL = crate::Reg; +#[doc = "CH7_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch7_ctrl`] +module"] +#[doc(alias = "CH7_CTRL")] +pub type Ch7Ctrl = crate::Reg; #[doc = "No Description"] pub mod ch7_ctrl; -#[doc = "CH7_SRC (rw) register accessor: an alias for `Reg`"] -pub type CH7_SRC = crate::Reg; +#[doc = "CH7_SRC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_src::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_src::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch7_src`] +module"] +#[doc(alias = "CH7_SRC")] +pub type Ch7Src = crate::Reg; #[doc = "No Description"] pub mod ch7_src; -#[doc = "CH7_DST (rw) register accessor: an alias for `Reg`"] -pub type CH7_DST = crate::Reg; +#[doc = "CH7_DST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_dst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_dst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch7_dst`] +module"] +#[doc(alias = "CH7_DST")] +pub type Ch7Dst = crate::Reg; #[doc = "No Description"] pub mod ch7_dst; -#[doc = "CH7_LINK (rw) register accessor: an alias for `Reg`"] -pub type CH7_LINK = crate::Reg; +#[doc = "CH7_LINK (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_link::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_link::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch7_link`] +module"] +#[doc(alias = "CH7_LINK")] +pub type Ch7Link = crate::Reg; #[doc = "No Description"] pub mod ch7_link; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch0_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch0_cfg.rs index f7e91ff..adc0333 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch0_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch0_cfg.rs @@ -1,277 +1,250 @@ #[doc = "Register `CH0_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH0_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] -pub type ARBSLOTS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Arbitration Slot Number Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ARBSLOTS_A { +pub enum Arbslots { #[doc = "0: One arbitration slot selected"] - ONE = 0, + One = 0, #[doc = "1: Two arbitration slots selected"] - TWO = 1, + Two = 1, #[doc = "2: Four arbitration slots selected"] - FOUR = 2, + Four = 2, #[doc = "3: Eight arbitration slots selected"] - EIGHT = 3, + Eight = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ARBSLOTS_A) -> Self { + fn from(variant: Arbslots) -> Self { variant as _ } } -impl ARBSLOTS_R { +impl crate::FieldSpec for Arbslots { + type Ux = u8; +} +impl crate::IsEnum for Arbslots {} +#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] +pub type ArbslotsR = crate::FieldReader; +impl ArbslotsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ARBSLOTS_A { + pub const fn variant(&self) -> Arbslots { match self.bits { - 0 => ARBSLOTS_A::ONE, - 1 => ARBSLOTS_A::TWO, - 2 => ARBSLOTS_A::FOUR, - 3 => ARBSLOTS_A::EIGHT, + 0 => Arbslots::One, + 1 => Arbslots::Two, + 2 => Arbslots::Four, + 3 => Arbslots::Eight, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "One arbitration slot selected"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == ARBSLOTS_A::ONE + *self == Arbslots::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Two arbitration slots selected"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == ARBSLOTS_A::TWO + *self == Arbslots::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Four arbitration slots selected"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == ARBSLOTS_A::FOUR + *self == Arbslots::Four } - #[doc = "Checks if the value of the field is `EIGHT`"] + #[doc = "Eight arbitration slots selected"] #[inline(always)] pub fn is_eight(&self) -> bool { - *self == ARBSLOTS_A::EIGHT + *self == Arbslots::Eight } } #[doc = "Field `ARBSLOTS` writer - Arbitration Slot Number Select"] -pub type ARBSLOTS_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH0_CFG_SPEC, u8, ARBSLOTS_A, 2, O>; -impl<'a, const O: u8> ARBSLOTS_W<'a, O> { +pub type ArbslotsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Arbslots, crate::Safe>; +impl<'a, REG> ArbslotsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One arbitration slot selected"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(ARBSLOTS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Arbslots::One) } #[doc = "Two arbitration slots selected"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(ARBSLOTS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Arbslots::Two) } #[doc = "Four arbitration slots selected"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(ARBSLOTS_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Arbslots::Four) } #[doc = "Eight arbitration slots selected"] #[inline(always)] - pub fn eight(self) -> &'a mut W { - self.variant(ARBSLOTS_A::EIGHT) + pub fn eight(self) -> &'a mut crate::W { + self.variant(Arbslots::Eight) } } -#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] -pub type SRCINCSIGN_R = crate::BitReader; #[doc = "Source Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCINCSIGN_A { +pub enum Srcincsign { #[doc = "0: Increment source address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement source address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCINCSIGN_A) -> Self { + fn from(variant: Srcincsign) -> Self { variant as u8 != 0 } } -impl SRCINCSIGN_R { +#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] +pub type SrcincsignR = crate::BitReader; +impl SrcincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINCSIGN_A { + pub const fn variant(&self) -> Srcincsign { match self.bits { - false => SRCINCSIGN_A::POSITIVE, - true => SRCINCSIGN_A::NEGATIVE, + false => Srcincsign::Positive, + true => Srcincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment source address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == SRCINCSIGN_A::POSITIVE + *self == Srcincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement source address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == SRCINCSIGN_A::NEGATIVE + *self == Srcincsign::Negative } } #[doc = "Field `SRCINCSIGN` writer - Source Address Increment Sign"] -pub type SRCINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH0_CFG_SPEC, SRCINCSIGN_A, O>; -impl<'a, const O: u8> SRCINCSIGN_W<'a, O> { +pub type SrcincsignW<'a, REG> = crate::BitWriter<'a, REG, Srcincsign>; +impl<'a, REG> SrcincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment source address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Srcincsign::Positive) } #[doc = "Decrement source address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Srcincsign::Negative) } } -#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] -pub type DSTINCSIGN_R = crate::BitReader; #[doc = "Destination Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTINCSIGN_A { +pub enum Dstincsign { #[doc = "0: Increment destination address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement destination address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTINCSIGN_A) -> Self { + fn from(variant: Dstincsign) -> Self { variant as u8 != 0 } } -impl DSTINCSIGN_R { +#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] +pub type DstincsignR = crate::BitReader; +impl DstincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINCSIGN_A { + pub const fn variant(&self) -> Dstincsign { match self.bits { - false => DSTINCSIGN_A::POSITIVE, - true => DSTINCSIGN_A::NEGATIVE, + false => Dstincsign::Positive, + true => Dstincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment destination address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == DSTINCSIGN_A::POSITIVE + *self == Dstincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement destination address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == DSTINCSIGN_A::NEGATIVE + *self == Dstincsign::Negative } } #[doc = "Field `DSTINCSIGN` writer - Destination Address Increment Sign"] -pub type DSTINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH0_CFG_SPEC, DSTINCSIGN_A, O>; -impl<'a, const O: u8> DSTINCSIGN_W<'a, O> { +pub type DstincsignW<'a, REG> = crate::BitWriter<'a, REG, Dstincsign>; +impl<'a, REG> DstincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment destination address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Dstincsign::Positive) } #[doc = "Decrement destination address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Dstincsign::Negative) } } impl R { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] - pub fn arbslots(&self) -> ARBSLOTS_R { - ARBSLOTS_R::new(((self.bits >> 16) & 3) as u8) + pub fn arbslots(&self) -> ArbslotsR { + ArbslotsR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] - pub fn srcincsign(&self) -> SRCINCSIGN_R { - SRCINCSIGN_R::new(((self.bits >> 20) & 1) != 0) + pub fn srcincsign(&self) -> SrcincsignR { + SrcincsignR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] - pub fn dstincsign(&self) -> DSTINCSIGN_R { - DSTINCSIGN_R::new(((self.bits >> 21) & 1) != 0) + pub fn dstincsign(&self) -> DstincsignR { + DstincsignR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] #[must_use] - pub fn arbslots(&mut self) -> ARBSLOTS_W<16> { - ARBSLOTS_W::new(self) + pub fn arbslots(&mut self) -> ArbslotsW { + ArbslotsW::new(self, 16) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] #[must_use] - pub fn srcincsign(&mut self) -> SRCINCSIGN_W<20> { - SRCINCSIGN_W::new(self) + pub fn srcincsign(&mut self) -> SrcincsignW { + SrcincsignW::new(self, 20) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] #[must_use] - pub fn dstincsign(&mut self) -> DSTINCSIGN_W<21> { - DSTINCSIGN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstincsign(&mut self) -> DstincsignW { + DstincsignW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0_cfg](index.html) module"] -pub struct CH0_CFG_SPEC; -impl crate::RegisterSpec for CH0_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch0CfgSpec; +impl crate::RegisterSpec for Ch0CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch0_cfg::R](R) reader structure"] -impl crate::Readable for CH0_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch0_cfg::W](W) writer structure"] -impl crate::Writable for CH0_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch0_cfg::R`](R) reader structure"] +impl crate::Readable for Ch0CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`ch0_cfg::W`](W) writer structure"] +impl crate::Writable for Ch0CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH0_CFG to value 0"] -impl crate::Resettable for CH0_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch0CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch0_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch0_ctrl.rs index 18f2ce1..4195fe8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch0_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch0_ctrl.rs @@ -1,843 +1,842 @@ #[doc = "Register `CH0_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH0_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] -pub type STRUCTTYPE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DMA Structure Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STRUCTTYPE_A { +pub enum Structtype { #[doc = "0: DMA transfer structure type selected."] - TRANSFER = 0, + Transfer = 0, #[doc = "1: Synchronization structure type selected."] - SYNCHRONIZE = 1, + Synchronize = 1, #[doc = "2: Write immediate value structure type selected."] - WRITE = 2, + Write = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STRUCTTYPE_A) -> Self { + fn from(variant: Structtype) -> Self { variant as _ } } -impl STRUCTTYPE_R { +impl crate::FieldSpec for Structtype { + type Ux = u8; +} +impl crate::IsEnum for Structtype {} +#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] +pub type StructtypeR = crate::FieldReader; +impl StructtypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(STRUCTTYPE_A::TRANSFER), - 1 => Some(STRUCTTYPE_A::SYNCHRONIZE), - 2 => Some(STRUCTTYPE_A::WRITE), + 0 => Some(Structtype::Transfer), + 1 => Some(Structtype::Synchronize), + 2 => Some(Structtype::Write), _ => None, } } - #[doc = "Checks if the value of the field is `TRANSFER`"] + #[doc = "DMA transfer structure type selected."] #[inline(always)] pub fn is_transfer(&self) -> bool { - *self == STRUCTTYPE_A::TRANSFER + *self == Structtype::Transfer } - #[doc = "Checks if the value of the field is `SYNCHRONIZE`"] + #[doc = "Synchronization structure type selected."] #[inline(always)] pub fn is_synchronize(&self) -> bool { - *self == STRUCTTYPE_A::SYNCHRONIZE + *self == Structtype::Synchronize } - #[doc = "Checks if the value of the field is `WRITE`"] + #[doc = "Write immediate value structure type selected."] #[inline(always)] pub fn is_write(&self) -> bool { - *self == STRUCTTYPE_A::WRITE + *self == Structtype::Write } } #[doc = "Field `STRUCTTYPE` writer - DMA Structure Type"] -pub type STRUCTTYPE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH0_CTRL_SPEC, u8, STRUCTTYPE_A, 2, O>; -impl<'a, const O: u8> STRUCTTYPE_W<'a, O> { +pub type StructtypeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Structtype>; +impl<'a, REG> StructtypeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "DMA transfer structure type selected."] #[inline(always)] - pub fn transfer(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::TRANSFER) + pub fn transfer(self) -> &'a mut crate::W { + self.variant(Structtype::Transfer) } #[doc = "Synchronization structure type selected."] #[inline(always)] - pub fn synchronize(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::SYNCHRONIZE) + pub fn synchronize(self) -> &'a mut crate::W { + self.variant(Structtype::Synchronize) } #[doc = "Write immediate value structure type selected."] #[inline(always)] - pub fn write(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::WRITE) + pub fn write(self) -> &'a mut crate::W { + self.variant(Structtype::Write) } } #[doc = "Field `STRUCTREQ` reader - Structure DMA Transfer Request"] -pub type STRUCTREQ_R = crate::BitReader; +pub type StructreqR = crate::BitReader; #[doc = "Field `XFERCNT` reader - DMA Unit Data Transfer Count"] -pub type XFERCNT_R = crate::FieldReader; +pub type XfercntR = crate::FieldReader; #[doc = "Field `XFERCNT` writer - DMA Unit Data Transfer Count"] -pub type XFERCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH0_CTRL_SPEC, u16, u16, 11, O>; +pub type XfercntW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `BYTESWAP` reader - Endian Byte Swap"] -pub type BYTESWAP_R = crate::BitReader; +pub type ByteswapR = crate::BitReader; #[doc = "Field `BYTESWAP` writer - Endian Byte Swap"] -pub type BYTESWAP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH0_CTRL_SPEC, bool, O>; -#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] -pub type BLOCKSIZE_R = crate::FieldReader; +pub type ByteswapW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Block Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BLOCKSIZE_A { +pub enum Blocksize { #[doc = "0: One unit transfer per arbitration"] - UNIT1 = 0, + Unit1 = 0, #[doc = "1: Two unit transfers per arbitration"] - UNIT2 = 1, + Unit2 = 1, #[doc = "2: Three unit transfers per arbitration"] - UNIT3 = 2, + Unit3 = 2, #[doc = "3: Four unit transfers per arbitration"] - UNIT4 = 3, + Unit4 = 3, #[doc = "4: Six unit transfers per arbitration"] - UNIT6 = 4, + Unit6 = 4, #[doc = "5: Eight unit transfers per arbitration"] - UNIT8 = 5, + Unit8 = 5, #[doc = "7: Sixteen unit transfers per arbitration"] - UNIT16 = 7, + Unit16 = 7, #[doc = "9: 32 unit transfers per arbitration"] - UNIT32 = 9, + Unit32 = 9, #[doc = "10: 64 unit transfers per arbitration"] - UNIT64 = 10, + Unit64 = 10, #[doc = "11: 128 unit transfers per arbitration"] - UNIT128 = 11, + Unit128 = 11, #[doc = "12: 256 unit transfers per arbitration"] - UNIT256 = 12, + Unit256 = 12, #[doc = "13: 512 unit transfers per arbitration"] - UNIT512 = 13, + Unit512 = 13, #[doc = "14: 1024 unit transfers per arbitration"] - UNIT1024 = 14, + Unit1024 = 14, #[doc = "15: Transfer all units as specified by the XFRCNT field"] - ALL = 15, + All = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BLOCKSIZE_A) -> Self { + fn from(variant: Blocksize) -> Self { variant as _ } } -impl BLOCKSIZE_R { +impl crate::FieldSpec for Blocksize { + type Ux = u8; +} +impl crate::IsEnum for Blocksize {} +#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] +pub type BlocksizeR = crate::FieldReader; +impl BlocksizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BLOCKSIZE_A::UNIT1), - 1 => Some(BLOCKSIZE_A::UNIT2), - 2 => Some(BLOCKSIZE_A::UNIT3), - 3 => Some(BLOCKSIZE_A::UNIT4), - 4 => Some(BLOCKSIZE_A::UNIT6), - 5 => Some(BLOCKSIZE_A::UNIT8), - 7 => Some(BLOCKSIZE_A::UNIT16), - 9 => Some(BLOCKSIZE_A::UNIT32), - 10 => Some(BLOCKSIZE_A::UNIT64), - 11 => Some(BLOCKSIZE_A::UNIT128), - 12 => Some(BLOCKSIZE_A::UNIT256), - 13 => Some(BLOCKSIZE_A::UNIT512), - 14 => Some(BLOCKSIZE_A::UNIT1024), - 15 => Some(BLOCKSIZE_A::ALL), + 0 => Some(Blocksize::Unit1), + 1 => Some(Blocksize::Unit2), + 2 => Some(Blocksize::Unit3), + 3 => Some(Blocksize::Unit4), + 4 => Some(Blocksize::Unit6), + 5 => Some(Blocksize::Unit8), + 7 => Some(Blocksize::Unit16), + 9 => Some(Blocksize::Unit32), + 10 => Some(Blocksize::Unit64), + 11 => Some(Blocksize::Unit128), + 12 => Some(Blocksize::Unit256), + 13 => Some(Blocksize::Unit512), + 14 => Some(Blocksize::Unit1024), + 15 => Some(Blocksize::All), _ => None, } } - #[doc = "Checks if the value of the field is `UNIT1`"] + #[doc = "One unit transfer per arbitration"] #[inline(always)] pub fn is_unit1(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1 + *self == Blocksize::Unit1 } - #[doc = "Checks if the value of the field is `UNIT2`"] + #[doc = "Two unit transfers per arbitration"] #[inline(always)] pub fn is_unit2(&self) -> bool { - *self == BLOCKSIZE_A::UNIT2 + *self == Blocksize::Unit2 } - #[doc = "Checks if the value of the field is `UNIT3`"] + #[doc = "Three unit transfers per arbitration"] #[inline(always)] pub fn is_unit3(&self) -> bool { - *self == BLOCKSIZE_A::UNIT3 + *self == Blocksize::Unit3 } - #[doc = "Checks if the value of the field is `UNIT4`"] + #[doc = "Four unit transfers per arbitration"] #[inline(always)] pub fn is_unit4(&self) -> bool { - *self == BLOCKSIZE_A::UNIT4 + *self == Blocksize::Unit4 } - #[doc = "Checks if the value of the field is `UNIT6`"] + #[doc = "Six unit transfers per arbitration"] #[inline(always)] pub fn is_unit6(&self) -> bool { - *self == BLOCKSIZE_A::UNIT6 + *self == Blocksize::Unit6 } - #[doc = "Checks if the value of the field is `UNIT8`"] + #[doc = "Eight unit transfers per arbitration"] #[inline(always)] pub fn is_unit8(&self) -> bool { - *self == BLOCKSIZE_A::UNIT8 + *self == Blocksize::Unit8 } - #[doc = "Checks if the value of the field is `UNIT16`"] + #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] pub fn is_unit16(&self) -> bool { - *self == BLOCKSIZE_A::UNIT16 + *self == Blocksize::Unit16 } - #[doc = "Checks if the value of the field is `UNIT32`"] + #[doc = "32 unit transfers per arbitration"] #[inline(always)] pub fn is_unit32(&self) -> bool { - *self == BLOCKSIZE_A::UNIT32 + *self == Blocksize::Unit32 } - #[doc = "Checks if the value of the field is `UNIT64`"] + #[doc = "64 unit transfers per arbitration"] #[inline(always)] pub fn is_unit64(&self) -> bool { - *self == BLOCKSIZE_A::UNIT64 + *self == Blocksize::Unit64 } - #[doc = "Checks if the value of the field is `UNIT128`"] + #[doc = "128 unit transfers per arbitration"] #[inline(always)] pub fn is_unit128(&self) -> bool { - *self == BLOCKSIZE_A::UNIT128 + *self == Blocksize::Unit128 } - #[doc = "Checks if the value of the field is `UNIT256`"] + #[doc = "256 unit transfers per arbitration"] #[inline(always)] pub fn is_unit256(&self) -> bool { - *self == BLOCKSIZE_A::UNIT256 + *self == Blocksize::Unit256 } - #[doc = "Checks if the value of the field is `UNIT512`"] + #[doc = "512 unit transfers per arbitration"] #[inline(always)] pub fn is_unit512(&self) -> bool { - *self == BLOCKSIZE_A::UNIT512 + *self == Blocksize::Unit512 } - #[doc = "Checks if the value of the field is `UNIT1024`"] + #[doc = "1024 unit transfers per arbitration"] #[inline(always)] pub fn is_unit1024(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1024 + *self == Blocksize::Unit1024 } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] pub fn is_all(&self) -> bool { - *self == BLOCKSIZE_A::ALL + *self == Blocksize::All } } #[doc = "Field `BLOCKSIZE` writer - Block Transfer Size"] -pub type BLOCKSIZE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH0_CTRL_SPEC, u8, BLOCKSIZE_A, 4, O>; -impl<'a, const O: u8> BLOCKSIZE_W<'a, O> { +pub type BlocksizeW<'a, REG> = crate::FieldWriter<'a, REG, 4, Blocksize>; +impl<'a, REG> BlocksizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One unit transfer per arbitration"] #[inline(always)] - pub fn unit1(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1) + pub fn unit1(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1) } #[doc = "Two unit transfers per arbitration"] #[inline(always)] - pub fn unit2(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT2) + pub fn unit2(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit2) } #[doc = "Three unit transfers per arbitration"] #[inline(always)] - pub fn unit3(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT3) + pub fn unit3(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit3) } #[doc = "Four unit transfers per arbitration"] #[inline(always)] - pub fn unit4(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT4) + pub fn unit4(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit4) } #[doc = "Six unit transfers per arbitration"] #[inline(always)] - pub fn unit6(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT6) + pub fn unit6(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit6) } #[doc = "Eight unit transfers per arbitration"] #[inline(always)] - pub fn unit8(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT8) + pub fn unit8(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit8) } #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] - pub fn unit16(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT16) + pub fn unit16(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit16) } #[doc = "32 unit transfers per arbitration"] #[inline(always)] - pub fn unit32(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT32) + pub fn unit32(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit32) } #[doc = "64 unit transfers per arbitration"] #[inline(always)] - pub fn unit64(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT64) + pub fn unit64(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit64) } #[doc = "128 unit transfers per arbitration"] #[inline(always)] - pub fn unit128(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT128) + pub fn unit128(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit128) } #[doc = "256 unit transfers per arbitration"] #[inline(always)] - pub fn unit256(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT256) + pub fn unit256(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit256) } #[doc = "512 unit transfers per arbitration"] #[inline(always)] - pub fn unit512(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT512) + pub fn unit512(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit512) } #[doc = "1024 unit transfers per arbitration"] #[inline(always)] - pub fn unit1024(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1024) + pub fn unit1024(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1024) } #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Blocksize::All) } } #[doc = "Field `DONEIEN` reader - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_R = crate::BitReader; +pub type DoneienR = crate::BitReader; #[doc = "Field `DONEIEN` writer - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH0_CTRL_SPEC, bool, O>; -#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] -pub type REQMODE_R = crate::BitReader; +pub type DoneienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "DMA Request Transfer Mode Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REQMODE_A { +pub enum Reqmode { #[doc = "0: The LDMA transfers one BLOCKSIZE per transfer request."] - BLOCK = 0, + Block = 0, #[doc = "1: One transfer request transfers all units as defined by the XFRCNT field."] - ALL = 1, + All = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REQMODE_A) -> Self { + fn from(variant: Reqmode) -> Self { variant as u8 != 0 } } -impl REQMODE_R { +#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] +pub type ReqmodeR = crate::BitReader; +impl ReqmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REQMODE_A { + pub const fn variant(&self) -> Reqmode { match self.bits { - false => REQMODE_A::BLOCK, - true => REQMODE_A::ALL, + false => Reqmode::Block, + true => Reqmode::All, } } - #[doc = "Checks if the value of the field is `BLOCK`"] + #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] pub fn is_block(&self) -> bool { - *self == REQMODE_A::BLOCK + *self == Reqmode::Block } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] pub fn is_all(&self) -> bool { - *self == REQMODE_A::ALL + *self == Reqmode::All } } #[doc = "Field `REQMODE` writer - DMA Request Transfer Mode Select"] -pub type REQMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH0_CTRL_SPEC, REQMODE_A, O>; -impl<'a, const O: u8> REQMODE_W<'a, O> { +pub type ReqmodeW<'a, REG> = crate::BitWriter<'a, REG, Reqmode>; +impl<'a, REG> ReqmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] - pub fn block(self) -> &'a mut W { - self.variant(REQMODE_A::BLOCK) + pub fn block(self) -> &'a mut crate::W { + self.variant(Reqmode::Block) } #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(REQMODE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Reqmode::All) } } #[doc = "Field `DECLOOPCNT` reader - Decrement Loop Count"] -pub type DECLOOPCNT_R = crate::BitReader; +pub type DecloopcntR = crate::BitReader; #[doc = "Field `DECLOOPCNT` writer - Decrement Loop Count"] -pub type DECLOOPCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH0_CTRL_SPEC, bool, O>; +pub type DecloopcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IGNORESREQ` reader - Ignore Sreq"] -pub type IGNORESREQ_R = crate::BitReader; +pub type IgnoresreqR = crate::BitReader; #[doc = "Field `IGNORESREQ` writer - Ignore Sreq"] -pub type IGNORESREQ_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH0_CTRL_SPEC, bool, O>; -#[doc = "Field `SRCINC` reader - Source Address Increment Size"] -pub type SRCINC_R = crate::FieldReader; +pub type IgnoresreqW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SRCINC_A { +pub enum Srcinc { #[doc = "0: Increment source address by one unit data size after each read"] - ONE = 0, + One = 0, #[doc = "1: Increment source address by two unit data sizes after each read"] - TWO = 1, + Two = 1, #[doc = "2: Increment source address by four unit data sizes after each read"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SRCINC_A) -> Self { + fn from(variant: Srcinc) -> Self { variant as _ } } -impl SRCINC_R { +impl crate::FieldSpec for Srcinc { + type Ux = u8; +} +impl crate::IsEnum for Srcinc {} +#[doc = "Field `SRCINC` reader - Source Address Increment Size"] +pub type SrcincR = crate::FieldReader; +impl SrcincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINC_A { + pub const fn variant(&self) -> Srcinc { match self.bits { - 0 => SRCINC_A::ONE, - 1 => SRCINC_A::TWO, - 2 => SRCINC_A::FOUR, - 3 => SRCINC_A::NONE, + 0 => Srcinc::One, + 1 => Srcinc::Two, + 2 => Srcinc::Four, + 3 => Srcinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == SRCINC_A::ONE + *self == Srcinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == SRCINC_A::TWO + *self == Srcinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == SRCINC_A::FOUR + *self == Srcinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SRCINC_A::NONE + *self == Srcinc::None } } #[doc = "Field `SRCINC` writer - Source Address Increment Size"] -pub type SRCINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH0_CTRL_SPEC, u8, SRCINC_A, 2, O>; -impl<'a, const O: u8> SRCINC_W<'a, O> { +pub type SrcincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Srcinc, crate::Safe>; +impl<'a, REG> SrcincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(SRCINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Srcinc::One) } #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(SRCINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Srcinc::Two) } #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(SRCINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Srcinc::Four) } #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SRCINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Srcinc::None) } } -#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] -pub type SIZE_R = crate::FieldReader; #[doc = "Unit Data Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIZE_A { +pub enum Size { #[doc = "0: Each unit transfer is a byte"] - BYTE = 0, + Byte = 0, #[doc = "1: Each unit transfer is a half-word"] - HALFWORD = 1, + Halfword = 1, #[doc = "2: Each unit transfer is a word"] - WORD = 2, + Word = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIZE_A) -> Self { + fn from(variant: Size) -> Self { variant as _ } } -impl SIZE_R { +impl crate::FieldSpec for Size { + type Ux = u8; +} +impl crate::IsEnum for Size {} +#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] +pub type SizeR = crate::FieldReader; +impl SizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIZE_A::BYTE), - 1 => Some(SIZE_A::HALFWORD), - 2 => Some(SIZE_A::WORD), + 0 => Some(Size::Byte), + 1 => Some(Size::Halfword), + 2 => Some(Size::Word), _ => None, } } - #[doc = "Checks if the value of the field is `BYTE`"] + #[doc = "Each unit transfer is a byte"] #[inline(always)] pub fn is_byte(&self) -> bool { - *self == SIZE_A::BYTE + *self == Size::Byte } - #[doc = "Checks if the value of the field is `HALFWORD`"] + #[doc = "Each unit transfer is a half-word"] #[inline(always)] pub fn is_halfword(&self) -> bool { - *self == SIZE_A::HALFWORD + *self == Size::Halfword } - #[doc = "Checks if the value of the field is `WORD`"] + #[doc = "Each unit transfer is a word"] #[inline(always)] pub fn is_word(&self) -> bool { - *self == SIZE_A::WORD + *self == Size::Word } } #[doc = "Field `SIZE` writer - Unit Data Transfer Size"] -pub type SIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH0_CTRL_SPEC, u8, SIZE_A, 2, O>; -impl<'a, const O: u8> SIZE_W<'a, O> { +pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Size>; +impl<'a, REG> SizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Each unit transfer is a byte"] #[inline(always)] - pub fn byte(self) -> &'a mut W { - self.variant(SIZE_A::BYTE) + pub fn byte(self) -> &'a mut crate::W { + self.variant(Size::Byte) } #[doc = "Each unit transfer is a half-word"] #[inline(always)] - pub fn halfword(self) -> &'a mut W { - self.variant(SIZE_A::HALFWORD) + pub fn halfword(self) -> &'a mut crate::W { + self.variant(Size::Halfword) } #[doc = "Each unit transfer is a word"] #[inline(always)] - pub fn word(self) -> &'a mut W { - self.variant(SIZE_A::WORD) + pub fn word(self) -> &'a mut crate::W { + self.variant(Size::Word) } } -#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] -pub type DSTINC_R = crate::FieldReader; #[doc = "Destination Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DSTINC_A { +pub enum Dstinc { #[doc = "0: Increment destination address by one unit data size after each write"] - ONE = 0, + One = 0, #[doc = "1: Increment destination address by two unit data sizes after each write"] - TWO = 1, + Two = 1, #[doc = "2: Increment destination address by four unit data sizes after each write"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DSTINC_A) -> Self { + fn from(variant: Dstinc) -> Self { variant as _ } } -impl DSTINC_R { +impl crate::FieldSpec for Dstinc { + type Ux = u8; +} +impl crate::IsEnum for Dstinc {} +#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] +pub type DstincR = crate::FieldReader; +impl DstincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINC_A { + pub const fn variant(&self) -> Dstinc { match self.bits { - 0 => DSTINC_A::ONE, - 1 => DSTINC_A::TWO, - 2 => DSTINC_A::FOUR, - 3 => DSTINC_A::NONE, + 0 => Dstinc::One, + 1 => Dstinc::Two, + 2 => Dstinc::Four, + 3 => Dstinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == DSTINC_A::ONE + *self == Dstinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == DSTINC_A::TWO + *self == Dstinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == DSTINC_A::FOUR + *self == Dstinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == DSTINC_A::NONE + *self == Dstinc::None } } #[doc = "Field `DSTINC` writer - Destination Address Increment Size"] -pub type DSTINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH0_CTRL_SPEC, u8, DSTINC_A, 2, O>; -impl<'a, const O: u8> DSTINC_W<'a, O> { +pub type DstincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dstinc, crate::Safe>; +impl<'a, REG> DstincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(DSTINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Dstinc::One) } #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(DSTINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Dstinc::Two) } #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(DSTINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Dstinc::Four) } #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(DSTINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Dstinc::None) } } -#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] -pub type SRCMODE_R = crate::BitReader; #[doc = "Source Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCMODE_A { +pub enum Srcmode { #[doc = "0: The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCMODE_A) -> Self { + fn from(variant: Srcmode) -> Self { variant as u8 != 0 } } -impl SRCMODE_R { +#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] +pub type SrcmodeR = crate::BitReader; +impl SrcmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCMODE_A { + pub const fn variant(&self) -> Srcmode { match self.bits { - false => SRCMODE_A::ABSOLUTE, - true => SRCMODE_A::RELATIVE, + false => Srcmode::Absolute, + true => Srcmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == SRCMODE_A::ABSOLUTE + *self == Srcmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == SRCMODE_A::RELATIVE + *self == Srcmode::Relative } } -#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] -pub type DSTMODE_R = crate::BitReader; #[doc = "Destination Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTMODE_A { +pub enum Dstmode { #[doc = "0: The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTMODE_A) -> Self { + fn from(variant: Dstmode) -> Self { variant as u8 != 0 } } -impl DSTMODE_R { +#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] +pub type DstmodeR = crate::BitReader; +impl DstmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTMODE_A { + pub const fn variant(&self) -> Dstmode { match self.bits { - false => DSTMODE_A::ABSOLUTE, - true => DSTMODE_A::RELATIVE, + false => Dstmode::Absolute, + true => Dstmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == DSTMODE_A::ABSOLUTE + *self == Dstmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == DSTMODE_A::RELATIVE + *self == Dstmode::Relative } } impl R { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] - pub fn structtype(&self) -> STRUCTTYPE_R { - STRUCTTYPE_R::new((self.bits & 3) as u8) + pub fn structtype(&self) -> StructtypeR { + StructtypeR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Structure DMA Transfer Request"] #[inline(always)] - pub fn structreq(&self) -> STRUCTREQ_R { - STRUCTREQ_R::new(((self.bits >> 3) & 1) != 0) + pub fn structreq(&self) -> StructreqR { + StructreqR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] - pub fn xfercnt(&self) -> XFERCNT_R { - XFERCNT_R::new(((self.bits >> 4) & 0x07ff) as u16) + pub fn xfercnt(&self) -> XfercntR { + XfercntR::new(((self.bits >> 4) & 0x07ff) as u16) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] - pub fn byteswap(&self) -> BYTESWAP_R { - BYTESWAP_R::new(((self.bits >> 15) & 1) != 0) + pub fn byteswap(&self) -> ByteswapR { + ByteswapR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] - pub fn blocksize(&self) -> BLOCKSIZE_R { - BLOCKSIZE_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn blocksize(&self) -> BlocksizeR { + BlocksizeR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] - pub fn doneien(&self) -> DONEIEN_R { - DONEIEN_R::new(((self.bits >> 20) & 1) != 0) + pub fn doneien(&self) -> DoneienR { + DoneienR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] - pub fn reqmode(&self) -> REQMODE_R { - REQMODE_R::new(((self.bits >> 21) & 1) != 0) + pub fn reqmode(&self) -> ReqmodeR { + ReqmodeR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] - pub fn decloopcnt(&self) -> DECLOOPCNT_R { - DECLOOPCNT_R::new(((self.bits >> 22) & 1) != 0) + pub fn decloopcnt(&self) -> DecloopcntR { + DecloopcntR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] - pub fn ignoresreq(&self) -> IGNORESREQ_R { - IGNORESREQ_R::new(((self.bits >> 23) & 1) != 0) + pub fn ignoresreq(&self) -> IgnoresreqR { + IgnoresreqR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] - pub fn srcinc(&self) -> SRCINC_R { - SRCINC_R::new(((self.bits >> 24) & 3) as u8) + pub fn srcinc(&self) -> SrcincR { + SrcincR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] - pub fn size(&self) -> SIZE_R { - SIZE_R::new(((self.bits >> 26) & 3) as u8) + pub fn size(&self) -> SizeR { + SizeR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] - pub fn dstinc(&self) -> DSTINC_R { - DSTINC_R::new(((self.bits >> 28) & 3) as u8) + pub fn dstinc(&self) -> DstincR { + DstincR::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bit 30 - Source Addressing Mode"] #[inline(always)] - pub fn srcmode(&self) -> SRCMODE_R { - SRCMODE_R::new(((self.bits >> 30) & 1) != 0) + pub fn srcmode(&self) -> SrcmodeR { + SrcmodeR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Destination Addressing Mode"] #[inline(always)] - pub fn dstmode(&self) -> DSTMODE_R { - DSTMODE_R::new(((self.bits >> 31) & 1) != 0) + pub fn dstmode(&self) -> DstmodeR { + DstmodeR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] #[must_use] - pub fn structtype(&mut self) -> STRUCTTYPE_W<0> { - STRUCTTYPE_W::new(self) + pub fn structtype(&mut self) -> StructtypeW { + StructtypeW::new(self, 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] #[must_use] - pub fn xfercnt(&mut self) -> XFERCNT_W<4> { - XFERCNT_W::new(self) + pub fn xfercnt(&mut self) -> XfercntW { + XfercntW::new(self, 4) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] #[must_use] - pub fn byteswap(&mut self) -> BYTESWAP_W<15> { - BYTESWAP_W::new(self) + pub fn byteswap(&mut self) -> ByteswapW { + ByteswapW::new(self, 15) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] #[must_use] - pub fn blocksize(&mut self) -> BLOCKSIZE_W<16> { - BLOCKSIZE_W::new(self) + pub fn blocksize(&mut self) -> BlocksizeW { + BlocksizeW::new(self, 16) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] #[must_use] - pub fn doneien(&mut self) -> DONEIEN_W<20> { - DONEIEN_W::new(self) + pub fn doneien(&mut self) -> DoneienW { + DoneienW::new(self, 20) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] #[must_use] - pub fn reqmode(&mut self) -> REQMODE_W<21> { - REQMODE_W::new(self) + pub fn reqmode(&mut self) -> ReqmodeW { + ReqmodeW::new(self, 21) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] #[must_use] - pub fn decloopcnt(&mut self) -> DECLOOPCNT_W<22> { - DECLOOPCNT_W::new(self) + pub fn decloopcnt(&mut self) -> DecloopcntW { + DecloopcntW::new(self, 22) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] #[must_use] - pub fn ignoresreq(&mut self) -> IGNORESREQ_W<23> { - IGNORESREQ_W::new(self) + pub fn ignoresreq(&mut self) -> IgnoresreqW { + IgnoresreqW::new(self, 23) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] #[must_use] - pub fn srcinc(&mut self) -> SRCINC_W<24> { - SRCINC_W::new(self) + pub fn srcinc(&mut self) -> SrcincW { + SrcincW::new(self, 24) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SIZE_W<26> { - SIZE_W::new(self) + pub fn size(&mut self) -> SizeW { + SizeW::new(self, 26) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] #[must_use] - pub fn dstinc(&mut self) -> DSTINC_W<28> { - DSTINC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstinc(&mut self) -> DstincW { + DstincW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0_ctrl](index.html) module"] -pub struct CH0_CTRL_SPEC; -impl crate::RegisterSpec for CH0_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch0CtrlSpec; +impl crate::RegisterSpec for Ch0CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch0_ctrl::R](R) reader structure"] -impl crate::Readable for CH0_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch0_ctrl::W](W) writer structure"] -impl crate::Writable for CH0_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch0_ctrl::R`](R) reader structure"] +impl crate::Readable for Ch0CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ch0_ctrl::W`](W) writer structure"] +impl crate::Writable for Ch0CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH0_CTRL to value 0"] -impl crate::Resettable for CH0_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch0CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch0_dst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch0_dst.rs index d7d17c2..7ef38b5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch0_dst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch0_dst.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH0_DST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH0_DST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DSTADDR` reader - Destination Data Address"] -pub type DSTADDR_R = crate::FieldReader; +pub type DstaddrR = crate::FieldReader; #[doc = "Field `DSTADDR` writer - Destination Data Address"] -pub type DSTADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH0_DST_SPEC, u32, u32, 32, O>; +pub type DstaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] - pub fn dstaddr(&self) -> DSTADDR_R { - DSTADDR_R::new(self.bits) + pub fn dstaddr(&self) -> DstaddrR { + DstaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] #[must_use] - pub fn dstaddr(&mut self) -> DSTADDR_W<0> { - DSTADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstaddr(&mut self) -> DstaddrW { + DstaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0_dst](index.html) module"] -pub struct CH0_DST_SPEC; -impl crate::RegisterSpec for CH0_DST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_dst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_dst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch0DstSpec; +impl crate::RegisterSpec for Ch0DstSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch0_dst::R](R) reader structure"] -impl crate::Readable for CH0_DST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch0_dst::W](W) writer structure"] -impl crate::Writable for CH0_DST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch0_dst::R`](R) reader structure"] +impl crate::Readable for Ch0DstSpec {} +#[doc = "`write(|w| ..)` method takes [`ch0_dst::W`](W) writer structure"] +impl crate::Writable for Ch0DstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH0_DST to value 0"] -impl crate::Resettable for CH0_DST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch0DstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch0_link.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch0_link.rs index eef3dc5..2a7d503 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch0_link.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch0_link.rs @@ -1,136 +1,96 @@ #[doc = "Register `CH0_LINK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH0_LINK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] -pub type LINKMODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Link Structure Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LINKMODE_A { +pub enum Linkmode { #[doc = "0: The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LINKMODE_A) -> Self { + fn from(variant: Linkmode) -> Self { variant as u8 != 0 } } -impl LINKMODE_R { +#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] +pub type LinkmodeR = crate::BitReader; +impl LinkmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LINKMODE_A { + pub const fn variant(&self) -> Linkmode { match self.bits { - false => LINKMODE_A::ABSOLUTE, - true => LINKMODE_A::RELATIVE, + false => Linkmode::Absolute, + true => Linkmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == LINKMODE_A::ABSOLUTE + *self == Linkmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == LINKMODE_A::RELATIVE + *self == Linkmode::Relative } } #[doc = "Field `LINK` reader - Link Next Structure"] -pub type LINK_R = crate::BitReader; +pub type LinkR = crate::BitReader; #[doc = "Field `LINK` writer - Link Next Structure"] -pub type LINK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH0_LINK_SPEC, bool, O>; +pub type LinkW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LINKADDR` reader - Link Structure Address"] -pub type LINKADDR_R = crate::FieldReader; +pub type LinkaddrR = crate::FieldReader; #[doc = "Field `LINKADDR` writer - Link Structure Address"] -pub type LINKADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH0_LINK_SPEC, u32, u32, 30, O>; +pub type LinkaddrW<'a, REG> = crate::FieldWriter<'a, REG, 30, u32>; impl R { #[doc = "Bit 0 - Link Structure Addressing Mode"] #[inline(always)] - pub fn linkmode(&self) -> LINKMODE_R { - LINKMODE_R::new((self.bits & 1) != 0) + pub fn linkmode(&self) -> LinkmodeR { + LinkmodeR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] - pub fn link(&self) -> LINK_R { - LINK_R::new(((self.bits >> 1) & 1) != 0) + pub fn link(&self) -> LinkR { + LinkR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] - pub fn linkaddr(&self) -> LINKADDR_R { - LINKADDR_R::new((self.bits >> 2) & 0x3fff_ffff) + pub fn linkaddr(&self) -> LinkaddrR { + LinkaddrR::new((self.bits >> 2) & 0x3fff_ffff) } } impl W { #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] #[must_use] - pub fn link(&mut self) -> LINK_W<1> { - LINK_W::new(self) + pub fn link(&mut self) -> LinkW { + LinkW::new(self, 1) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] #[must_use] - pub fn linkaddr(&mut self) -> LINKADDR_W<2> { - LINKADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn linkaddr(&mut self) -> LinkaddrW { + LinkaddrW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0_link](index.html) module"] -pub struct CH0_LINK_SPEC; -impl crate::RegisterSpec for CH0_LINK_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_link::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_link::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch0LinkSpec; +impl crate::RegisterSpec for Ch0LinkSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch0_link::R](R) reader structure"] -impl crate::Readable for CH0_LINK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch0_link::W](W) writer structure"] -impl crate::Writable for CH0_LINK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch0_link::R`](R) reader structure"] +impl crate::Readable for Ch0LinkSpec {} +#[doc = "`write(|w| ..)` method takes [`ch0_link::W`](W) writer structure"] +impl crate::Writable for Ch0LinkSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH0_LINK to value 0"] -impl crate::Resettable for CH0_LINK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch0LinkSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch0_loop.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch0_loop.rs index ff204c0..f9f6f28 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch0_loop.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch0_loop.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH0_LOOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH0_LOOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOOPCNT` reader - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_R = crate::FieldReader; +pub type LoopcntR = crate::FieldReader; #[doc = "Field `LOOPCNT` writer - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH0_LOOP_SPEC, u8, u8, 8, O>; +pub type LoopcntW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] - pub fn loopcnt(&self) -> LOOPCNT_R { - LOOPCNT_R::new((self.bits & 0xff) as u8) + pub fn loopcnt(&self) -> LoopcntR { + LoopcntR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] #[must_use] - pub fn loopcnt(&mut self) -> LOOPCNT_W<0> { - LOOPCNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn loopcnt(&mut self) -> LoopcntW { + LoopcntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0_loop](index.html) module"] -pub struct CH0_LOOP_SPEC; -impl crate::RegisterSpec for CH0_LOOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_loop::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_loop::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch0LoopSpec; +impl crate::RegisterSpec for Ch0LoopSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch0_loop::R](R) reader structure"] -impl crate::Readable for CH0_LOOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch0_loop::W](W) writer structure"] -impl crate::Writable for CH0_LOOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch0_loop::R`](R) reader structure"] +impl crate::Readable for Ch0LoopSpec {} +#[doc = "`write(|w| ..)` method takes [`ch0_loop::W`](W) writer structure"] +impl crate::Writable for Ch0LoopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH0_LOOP to value 0"] -impl crate::Resettable for CH0_LOOP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch0LoopSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch0_src.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch0_src.rs index 0aa839f..fb91b13 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch0_src.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch0_src.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH0_SRC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH0_SRC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SRCADDR` reader - Source Data Address"] -pub type SRCADDR_R = crate::FieldReader; +pub type SrcaddrR = crate::FieldReader; #[doc = "Field `SRCADDR` writer - Source Data Address"] -pub type SRCADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH0_SRC_SPEC, u32, u32, 32, O>; +pub type SrcaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] - pub fn srcaddr(&self) -> SRCADDR_R { - SRCADDR_R::new(self.bits) + pub fn srcaddr(&self) -> SrcaddrR { + SrcaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] #[must_use] - pub fn srcaddr(&mut self) -> SRCADDR_W<0> { - SRCADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn srcaddr(&mut self) -> SrcaddrW { + SrcaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0_src](index.html) module"] -pub struct CH0_SRC_SPEC; -impl crate::RegisterSpec for CH0_SRC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_src::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_src::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch0SrcSpec; +impl crate::RegisterSpec for Ch0SrcSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch0_src::R](R) reader structure"] -impl crate::Readable for CH0_SRC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch0_src::W](W) writer structure"] -impl crate::Writable for CH0_SRC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch0_src::R`](R) reader structure"] +impl crate::Readable for Ch0SrcSpec {} +#[doc = "`write(|w| ..)` method takes [`ch0_src::W`](W) writer structure"] +impl crate::Writable for Ch0SrcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH0_SRC to value 0"] -impl crate::Resettable for CH0_SRC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch0SrcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch1_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch1_cfg.rs index 49318a6..9548a0c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch1_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch1_cfg.rs @@ -1,277 +1,250 @@ #[doc = "Register `CH1_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH1_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] -pub type ARBSLOTS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Arbitration Slot Number Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ARBSLOTS_A { +pub enum Arbslots { #[doc = "0: One arbitration slot selected"] - ONE = 0, + One = 0, #[doc = "1: Two arbitration slots selected"] - TWO = 1, + Two = 1, #[doc = "2: Four arbitration slots selected"] - FOUR = 2, + Four = 2, #[doc = "3: Eight arbitration slots selected"] - EIGHT = 3, + Eight = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ARBSLOTS_A) -> Self { + fn from(variant: Arbslots) -> Self { variant as _ } } -impl ARBSLOTS_R { +impl crate::FieldSpec for Arbslots { + type Ux = u8; +} +impl crate::IsEnum for Arbslots {} +#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] +pub type ArbslotsR = crate::FieldReader; +impl ArbslotsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ARBSLOTS_A { + pub const fn variant(&self) -> Arbslots { match self.bits { - 0 => ARBSLOTS_A::ONE, - 1 => ARBSLOTS_A::TWO, - 2 => ARBSLOTS_A::FOUR, - 3 => ARBSLOTS_A::EIGHT, + 0 => Arbslots::One, + 1 => Arbslots::Two, + 2 => Arbslots::Four, + 3 => Arbslots::Eight, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "One arbitration slot selected"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == ARBSLOTS_A::ONE + *self == Arbslots::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Two arbitration slots selected"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == ARBSLOTS_A::TWO + *self == Arbslots::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Four arbitration slots selected"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == ARBSLOTS_A::FOUR + *self == Arbslots::Four } - #[doc = "Checks if the value of the field is `EIGHT`"] + #[doc = "Eight arbitration slots selected"] #[inline(always)] pub fn is_eight(&self) -> bool { - *self == ARBSLOTS_A::EIGHT + *self == Arbslots::Eight } } #[doc = "Field `ARBSLOTS` writer - Arbitration Slot Number Select"] -pub type ARBSLOTS_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH1_CFG_SPEC, u8, ARBSLOTS_A, 2, O>; -impl<'a, const O: u8> ARBSLOTS_W<'a, O> { +pub type ArbslotsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Arbslots, crate::Safe>; +impl<'a, REG> ArbslotsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One arbitration slot selected"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(ARBSLOTS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Arbslots::One) } #[doc = "Two arbitration slots selected"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(ARBSLOTS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Arbslots::Two) } #[doc = "Four arbitration slots selected"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(ARBSLOTS_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Arbslots::Four) } #[doc = "Eight arbitration slots selected"] #[inline(always)] - pub fn eight(self) -> &'a mut W { - self.variant(ARBSLOTS_A::EIGHT) + pub fn eight(self) -> &'a mut crate::W { + self.variant(Arbslots::Eight) } } -#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] -pub type SRCINCSIGN_R = crate::BitReader; #[doc = "Source Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCINCSIGN_A { +pub enum Srcincsign { #[doc = "0: Increment source address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement source address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCINCSIGN_A) -> Self { + fn from(variant: Srcincsign) -> Self { variant as u8 != 0 } } -impl SRCINCSIGN_R { +#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] +pub type SrcincsignR = crate::BitReader; +impl SrcincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINCSIGN_A { + pub const fn variant(&self) -> Srcincsign { match self.bits { - false => SRCINCSIGN_A::POSITIVE, - true => SRCINCSIGN_A::NEGATIVE, + false => Srcincsign::Positive, + true => Srcincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment source address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == SRCINCSIGN_A::POSITIVE + *self == Srcincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement source address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == SRCINCSIGN_A::NEGATIVE + *self == Srcincsign::Negative } } #[doc = "Field `SRCINCSIGN` writer - Source Address Increment Sign"] -pub type SRCINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH1_CFG_SPEC, SRCINCSIGN_A, O>; -impl<'a, const O: u8> SRCINCSIGN_W<'a, O> { +pub type SrcincsignW<'a, REG> = crate::BitWriter<'a, REG, Srcincsign>; +impl<'a, REG> SrcincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment source address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Srcincsign::Positive) } #[doc = "Decrement source address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Srcincsign::Negative) } } -#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] -pub type DSTINCSIGN_R = crate::BitReader; #[doc = "Destination Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTINCSIGN_A { +pub enum Dstincsign { #[doc = "0: Increment destination address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement destination address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTINCSIGN_A) -> Self { + fn from(variant: Dstincsign) -> Self { variant as u8 != 0 } } -impl DSTINCSIGN_R { +#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] +pub type DstincsignR = crate::BitReader; +impl DstincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINCSIGN_A { + pub const fn variant(&self) -> Dstincsign { match self.bits { - false => DSTINCSIGN_A::POSITIVE, - true => DSTINCSIGN_A::NEGATIVE, + false => Dstincsign::Positive, + true => Dstincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment destination address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == DSTINCSIGN_A::POSITIVE + *self == Dstincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement destination address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == DSTINCSIGN_A::NEGATIVE + *self == Dstincsign::Negative } } #[doc = "Field `DSTINCSIGN` writer - Destination Address Increment Sign"] -pub type DSTINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH1_CFG_SPEC, DSTINCSIGN_A, O>; -impl<'a, const O: u8> DSTINCSIGN_W<'a, O> { +pub type DstincsignW<'a, REG> = crate::BitWriter<'a, REG, Dstincsign>; +impl<'a, REG> DstincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment destination address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Dstincsign::Positive) } #[doc = "Decrement destination address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Dstincsign::Negative) } } impl R { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] - pub fn arbslots(&self) -> ARBSLOTS_R { - ARBSLOTS_R::new(((self.bits >> 16) & 3) as u8) + pub fn arbslots(&self) -> ArbslotsR { + ArbslotsR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] - pub fn srcincsign(&self) -> SRCINCSIGN_R { - SRCINCSIGN_R::new(((self.bits >> 20) & 1) != 0) + pub fn srcincsign(&self) -> SrcincsignR { + SrcincsignR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] - pub fn dstincsign(&self) -> DSTINCSIGN_R { - DSTINCSIGN_R::new(((self.bits >> 21) & 1) != 0) + pub fn dstincsign(&self) -> DstincsignR { + DstincsignR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] #[must_use] - pub fn arbslots(&mut self) -> ARBSLOTS_W<16> { - ARBSLOTS_W::new(self) + pub fn arbslots(&mut self) -> ArbslotsW { + ArbslotsW::new(self, 16) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] #[must_use] - pub fn srcincsign(&mut self) -> SRCINCSIGN_W<20> { - SRCINCSIGN_W::new(self) + pub fn srcincsign(&mut self) -> SrcincsignW { + SrcincsignW::new(self, 20) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] #[must_use] - pub fn dstincsign(&mut self) -> DSTINCSIGN_W<21> { - DSTINCSIGN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstincsign(&mut self) -> DstincsignW { + DstincsignW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch1_cfg](index.html) module"] -pub struct CH1_CFG_SPEC; -impl crate::RegisterSpec for CH1_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch1CfgSpec; +impl crate::RegisterSpec for Ch1CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch1_cfg::R](R) reader structure"] -impl crate::Readable for CH1_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch1_cfg::W](W) writer structure"] -impl crate::Writable for CH1_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch1_cfg::R`](R) reader structure"] +impl crate::Readable for Ch1CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`ch1_cfg::W`](W) writer structure"] +impl crate::Writable for Ch1CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH1_CFG to value 0"] -impl crate::Resettable for CH1_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch1CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch1_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch1_ctrl.rs index 6e4a70c..c8dd5d3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch1_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch1_ctrl.rs @@ -1,843 +1,842 @@ #[doc = "Register `CH1_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH1_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] -pub type STRUCTTYPE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DMA Structure Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STRUCTTYPE_A { +pub enum Structtype { #[doc = "0: DMA transfer structure type selected."] - TRANSFER = 0, + Transfer = 0, #[doc = "1: Synchronization structure type selected."] - SYNCHRONIZE = 1, + Synchronize = 1, #[doc = "2: Write immediate value structure type selected."] - WRITE = 2, + Write = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STRUCTTYPE_A) -> Self { + fn from(variant: Structtype) -> Self { variant as _ } } -impl STRUCTTYPE_R { +impl crate::FieldSpec for Structtype { + type Ux = u8; +} +impl crate::IsEnum for Structtype {} +#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] +pub type StructtypeR = crate::FieldReader; +impl StructtypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(STRUCTTYPE_A::TRANSFER), - 1 => Some(STRUCTTYPE_A::SYNCHRONIZE), - 2 => Some(STRUCTTYPE_A::WRITE), + 0 => Some(Structtype::Transfer), + 1 => Some(Structtype::Synchronize), + 2 => Some(Structtype::Write), _ => None, } } - #[doc = "Checks if the value of the field is `TRANSFER`"] + #[doc = "DMA transfer structure type selected."] #[inline(always)] pub fn is_transfer(&self) -> bool { - *self == STRUCTTYPE_A::TRANSFER + *self == Structtype::Transfer } - #[doc = "Checks if the value of the field is `SYNCHRONIZE`"] + #[doc = "Synchronization structure type selected."] #[inline(always)] pub fn is_synchronize(&self) -> bool { - *self == STRUCTTYPE_A::SYNCHRONIZE + *self == Structtype::Synchronize } - #[doc = "Checks if the value of the field is `WRITE`"] + #[doc = "Write immediate value structure type selected."] #[inline(always)] pub fn is_write(&self) -> bool { - *self == STRUCTTYPE_A::WRITE + *self == Structtype::Write } } #[doc = "Field `STRUCTTYPE` writer - DMA Structure Type"] -pub type STRUCTTYPE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH1_CTRL_SPEC, u8, STRUCTTYPE_A, 2, O>; -impl<'a, const O: u8> STRUCTTYPE_W<'a, O> { +pub type StructtypeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Structtype>; +impl<'a, REG> StructtypeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "DMA transfer structure type selected."] #[inline(always)] - pub fn transfer(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::TRANSFER) + pub fn transfer(self) -> &'a mut crate::W { + self.variant(Structtype::Transfer) } #[doc = "Synchronization structure type selected."] #[inline(always)] - pub fn synchronize(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::SYNCHRONIZE) + pub fn synchronize(self) -> &'a mut crate::W { + self.variant(Structtype::Synchronize) } #[doc = "Write immediate value structure type selected."] #[inline(always)] - pub fn write(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::WRITE) + pub fn write(self) -> &'a mut crate::W { + self.variant(Structtype::Write) } } #[doc = "Field `STRUCTREQ` reader - Structure DMA Transfer Request"] -pub type STRUCTREQ_R = crate::BitReader; +pub type StructreqR = crate::BitReader; #[doc = "Field `XFERCNT` reader - DMA Unit Data Transfer Count"] -pub type XFERCNT_R = crate::FieldReader; +pub type XfercntR = crate::FieldReader; #[doc = "Field `XFERCNT` writer - DMA Unit Data Transfer Count"] -pub type XFERCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH1_CTRL_SPEC, u16, u16, 11, O>; +pub type XfercntW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `BYTESWAP` reader - Endian Byte Swap"] -pub type BYTESWAP_R = crate::BitReader; +pub type ByteswapR = crate::BitReader; #[doc = "Field `BYTESWAP` writer - Endian Byte Swap"] -pub type BYTESWAP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH1_CTRL_SPEC, bool, O>; -#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] -pub type BLOCKSIZE_R = crate::FieldReader; +pub type ByteswapW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Block Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BLOCKSIZE_A { +pub enum Blocksize { #[doc = "0: One unit transfer per arbitration"] - UNIT1 = 0, + Unit1 = 0, #[doc = "1: Two unit transfers per arbitration"] - UNIT2 = 1, + Unit2 = 1, #[doc = "2: Three unit transfers per arbitration"] - UNIT3 = 2, + Unit3 = 2, #[doc = "3: Four unit transfers per arbitration"] - UNIT4 = 3, + Unit4 = 3, #[doc = "4: Six unit transfers per arbitration"] - UNIT6 = 4, + Unit6 = 4, #[doc = "5: Eight unit transfers per arbitration"] - UNIT8 = 5, + Unit8 = 5, #[doc = "7: Sixteen unit transfers per arbitration"] - UNIT16 = 7, + Unit16 = 7, #[doc = "9: 32 unit transfers per arbitration"] - UNIT32 = 9, + Unit32 = 9, #[doc = "10: 64 unit transfers per arbitration"] - UNIT64 = 10, + Unit64 = 10, #[doc = "11: 128 unit transfers per arbitration"] - UNIT128 = 11, + Unit128 = 11, #[doc = "12: 256 unit transfers per arbitration"] - UNIT256 = 12, + Unit256 = 12, #[doc = "13: 512 unit transfers per arbitration"] - UNIT512 = 13, + Unit512 = 13, #[doc = "14: 1024 unit transfers per arbitration"] - UNIT1024 = 14, + Unit1024 = 14, #[doc = "15: Transfer all units as specified by the XFRCNT field"] - ALL = 15, + All = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BLOCKSIZE_A) -> Self { + fn from(variant: Blocksize) -> Self { variant as _ } } -impl BLOCKSIZE_R { +impl crate::FieldSpec for Blocksize { + type Ux = u8; +} +impl crate::IsEnum for Blocksize {} +#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] +pub type BlocksizeR = crate::FieldReader; +impl BlocksizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BLOCKSIZE_A::UNIT1), - 1 => Some(BLOCKSIZE_A::UNIT2), - 2 => Some(BLOCKSIZE_A::UNIT3), - 3 => Some(BLOCKSIZE_A::UNIT4), - 4 => Some(BLOCKSIZE_A::UNIT6), - 5 => Some(BLOCKSIZE_A::UNIT8), - 7 => Some(BLOCKSIZE_A::UNIT16), - 9 => Some(BLOCKSIZE_A::UNIT32), - 10 => Some(BLOCKSIZE_A::UNIT64), - 11 => Some(BLOCKSIZE_A::UNIT128), - 12 => Some(BLOCKSIZE_A::UNIT256), - 13 => Some(BLOCKSIZE_A::UNIT512), - 14 => Some(BLOCKSIZE_A::UNIT1024), - 15 => Some(BLOCKSIZE_A::ALL), + 0 => Some(Blocksize::Unit1), + 1 => Some(Blocksize::Unit2), + 2 => Some(Blocksize::Unit3), + 3 => Some(Blocksize::Unit4), + 4 => Some(Blocksize::Unit6), + 5 => Some(Blocksize::Unit8), + 7 => Some(Blocksize::Unit16), + 9 => Some(Blocksize::Unit32), + 10 => Some(Blocksize::Unit64), + 11 => Some(Blocksize::Unit128), + 12 => Some(Blocksize::Unit256), + 13 => Some(Blocksize::Unit512), + 14 => Some(Blocksize::Unit1024), + 15 => Some(Blocksize::All), _ => None, } } - #[doc = "Checks if the value of the field is `UNIT1`"] + #[doc = "One unit transfer per arbitration"] #[inline(always)] pub fn is_unit1(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1 + *self == Blocksize::Unit1 } - #[doc = "Checks if the value of the field is `UNIT2`"] + #[doc = "Two unit transfers per arbitration"] #[inline(always)] pub fn is_unit2(&self) -> bool { - *self == BLOCKSIZE_A::UNIT2 + *self == Blocksize::Unit2 } - #[doc = "Checks if the value of the field is `UNIT3`"] + #[doc = "Three unit transfers per arbitration"] #[inline(always)] pub fn is_unit3(&self) -> bool { - *self == BLOCKSIZE_A::UNIT3 + *self == Blocksize::Unit3 } - #[doc = "Checks if the value of the field is `UNIT4`"] + #[doc = "Four unit transfers per arbitration"] #[inline(always)] pub fn is_unit4(&self) -> bool { - *self == BLOCKSIZE_A::UNIT4 + *self == Blocksize::Unit4 } - #[doc = "Checks if the value of the field is `UNIT6`"] + #[doc = "Six unit transfers per arbitration"] #[inline(always)] pub fn is_unit6(&self) -> bool { - *self == BLOCKSIZE_A::UNIT6 + *self == Blocksize::Unit6 } - #[doc = "Checks if the value of the field is `UNIT8`"] + #[doc = "Eight unit transfers per arbitration"] #[inline(always)] pub fn is_unit8(&self) -> bool { - *self == BLOCKSIZE_A::UNIT8 + *self == Blocksize::Unit8 } - #[doc = "Checks if the value of the field is `UNIT16`"] + #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] pub fn is_unit16(&self) -> bool { - *self == BLOCKSIZE_A::UNIT16 + *self == Blocksize::Unit16 } - #[doc = "Checks if the value of the field is `UNIT32`"] + #[doc = "32 unit transfers per arbitration"] #[inline(always)] pub fn is_unit32(&self) -> bool { - *self == BLOCKSIZE_A::UNIT32 + *self == Blocksize::Unit32 } - #[doc = "Checks if the value of the field is `UNIT64`"] + #[doc = "64 unit transfers per arbitration"] #[inline(always)] pub fn is_unit64(&self) -> bool { - *self == BLOCKSIZE_A::UNIT64 + *self == Blocksize::Unit64 } - #[doc = "Checks if the value of the field is `UNIT128`"] + #[doc = "128 unit transfers per arbitration"] #[inline(always)] pub fn is_unit128(&self) -> bool { - *self == BLOCKSIZE_A::UNIT128 + *self == Blocksize::Unit128 } - #[doc = "Checks if the value of the field is `UNIT256`"] + #[doc = "256 unit transfers per arbitration"] #[inline(always)] pub fn is_unit256(&self) -> bool { - *self == BLOCKSIZE_A::UNIT256 + *self == Blocksize::Unit256 } - #[doc = "Checks if the value of the field is `UNIT512`"] + #[doc = "512 unit transfers per arbitration"] #[inline(always)] pub fn is_unit512(&self) -> bool { - *self == BLOCKSIZE_A::UNIT512 + *self == Blocksize::Unit512 } - #[doc = "Checks if the value of the field is `UNIT1024`"] + #[doc = "1024 unit transfers per arbitration"] #[inline(always)] pub fn is_unit1024(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1024 + *self == Blocksize::Unit1024 } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] pub fn is_all(&self) -> bool { - *self == BLOCKSIZE_A::ALL + *self == Blocksize::All } } #[doc = "Field `BLOCKSIZE` writer - Block Transfer Size"] -pub type BLOCKSIZE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH1_CTRL_SPEC, u8, BLOCKSIZE_A, 4, O>; -impl<'a, const O: u8> BLOCKSIZE_W<'a, O> { +pub type BlocksizeW<'a, REG> = crate::FieldWriter<'a, REG, 4, Blocksize>; +impl<'a, REG> BlocksizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One unit transfer per arbitration"] #[inline(always)] - pub fn unit1(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1) + pub fn unit1(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1) } #[doc = "Two unit transfers per arbitration"] #[inline(always)] - pub fn unit2(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT2) + pub fn unit2(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit2) } #[doc = "Three unit transfers per arbitration"] #[inline(always)] - pub fn unit3(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT3) + pub fn unit3(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit3) } #[doc = "Four unit transfers per arbitration"] #[inline(always)] - pub fn unit4(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT4) + pub fn unit4(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit4) } #[doc = "Six unit transfers per arbitration"] #[inline(always)] - pub fn unit6(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT6) + pub fn unit6(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit6) } #[doc = "Eight unit transfers per arbitration"] #[inline(always)] - pub fn unit8(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT8) + pub fn unit8(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit8) } #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] - pub fn unit16(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT16) + pub fn unit16(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit16) } #[doc = "32 unit transfers per arbitration"] #[inline(always)] - pub fn unit32(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT32) + pub fn unit32(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit32) } #[doc = "64 unit transfers per arbitration"] #[inline(always)] - pub fn unit64(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT64) + pub fn unit64(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit64) } #[doc = "128 unit transfers per arbitration"] #[inline(always)] - pub fn unit128(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT128) + pub fn unit128(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit128) } #[doc = "256 unit transfers per arbitration"] #[inline(always)] - pub fn unit256(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT256) + pub fn unit256(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit256) } #[doc = "512 unit transfers per arbitration"] #[inline(always)] - pub fn unit512(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT512) + pub fn unit512(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit512) } #[doc = "1024 unit transfers per arbitration"] #[inline(always)] - pub fn unit1024(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1024) + pub fn unit1024(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1024) } #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Blocksize::All) } } #[doc = "Field `DONEIEN` reader - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_R = crate::BitReader; +pub type DoneienR = crate::BitReader; #[doc = "Field `DONEIEN` writer - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH1_CTRL_SPEC, bool, O>; -#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] -pub type REQMODE_R = crate::BitReader; +pub type DoneienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "DMA Request Transfer Mode Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REQMODE_A { +pub enum Reqmode { #[doc = "0: The LDMA transfers one BLOCKSIZE per transfer request."] - BLOCK = 0, + Block = 0, #[doc = "1: One transfer request transfers all units as defined by the XFRCNT field."] - ALL = 1, + All = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REQMODE_A) -> Self { + fn from(variant: Reqmode) -> Self { variant as u8 != 0 } } -impl REQMODE_R { +#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] +pub type ReqmodeR = crate::BitReader; +impl ReqmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REQMODE_A { + pub const fn variant(&self) -> Reqmode { match self.bits { - false => REQMODE_A::BLOCK, - true => REQMODE_A::ALL, + false => Reqmode::Block, + true => Reqmode::All, } } - #[doc = "Checks if the value of the field is `BLOCK`"] + #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] pub fn is_block(&self) -> bool { - *self == REQMODE_A::BLOCK + *self == Reqmode::Block } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] pub fn is_all(&self) -> bool { - *self == REQMODE_A::ALL + *self == Reqmode::All } } #[doc = "Field `REQMODE` writer - DMA Request Transfer Mode Select"] -pub type REQMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH1_CTRL_SPEC, REQMODE_A, O>; -impl<'a, const O: u8> REQMODE_W<'a, O> { +pub type ReqmodeW<'a, REG> = crate::BitWriter<'a, REG, Reqmode>; +impl<'a, REG> ReqmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] - pub fn block(self) -> &'a mut W { - self.variant(REQMODE_A::BLOCK) + pub fn block(self) -> &'a mut crate::W { + self.variant(Reqmode::Block) } #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(REQMODE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Reqmode::All) } } #[doc = "Field `DECLOOPCNT` reader - Decrement Loop Count"] -pub type DECLOOPCNT_R = crate::BitReader; +pub type DecloopcntR = crate::BitReader; #[doc = "Field `DECLOOPCNT` writer - Decrement Loop Count"] -pub type DECLOOPCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH1_CTRL_SPEC, bool, O>; +pub type DecloopcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IGNORESREQ` reader - Ignore Sreq"] -pub type IGNORESREQ_R = crate::BitReader; +pub type IgnoresreqR = crate::BitReader; #[doc = "Field `IGNORESREQ` writer - Ignore Sreq"] -pub type IGNORESREQ_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH1_CTRL_SPEC, bool, O>; -#[doc = "Field `SRCINC` reader - Source Address Increment Size"] -pub type SRCINC_R = crate::FieldReader; +pub type IgnoresreqW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SRCINC_A { +pub enum Srcinc { #[doc = "0: Increment source address by one unit data size after each read"] - ONE = 0, + One = 0, #[doc = "1: Increment source address by two unit data sizes after each read"] - TWO = 1, + Two = 1, #[doc = "2: Increment source address by four unit data sizes after each read"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SRCINC_A) -> Self { + fn from(variant: Srcinc) -> Self { variant as _ } } -impl SRCINC_R { +impl crate::FieldSpec for Srcinc { + type Ux = u8; +} +impl crate::IsEnum for Srcinc {} +#[doc = "Field `SRCINC` reader - Source Address Increment Size"] +pub type SrcincR = crate::FieldReader; +impl SrcincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINC_A { + pub const fn variant(&self) -> Srcinc { match self.bits { - 0 => SRCINC_A::ONE, - 1 => SRCINC_A::TWO, - 2 => SRCINC_A::FOUR, - 3 => SRCINC_A::NONE, + 0 => Srcinc::One, + 1 => Srcinc::Two, + 2 => Srcinc::Four, + 3 => Srcinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == SRCINC_A::ONE + *self == Srcinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == SRCINC_A::TWO + *self == Srcinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == SRCINC_A::FOUR + *self == Srcinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SRCINC_A::NONE + *self == Srcinc::None } } #[doc = "Field `SRCINC` writer - Source Address Increment Size"] -pub type SRCINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH1_CTRL_SPEC, u8, SRCINC_A, 2, O>; -impl<'a, const O: u8> SRCINC_W<'a, O> { +pub type SrcincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Srcinc, crate::Safe>; +impl<'a, REG> SrcincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(SRCINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Srcinc::One) } #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(SRCINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Srcinc::Two) } #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(SRCINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Srcinc::Four) } #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SRCINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Srcinc::None) } } -#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] -pub type SIZE_R = crate::FieldReader; #[doc = "Unit Data Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIZE_A { +pub enum Size { #[doc = "0: Each unit transfer is a byte"] - BYTE = 0, + Byte = 0, #[doc = "1: Each unit transfer is a half-word"] - HALFWORD = 1, + Halfword = 1, #[doc = "2: Each unit transfer is a word"] - WORD = 2, + Word = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIZE_A) -> Self { + fn from(variant: Size) -> Self { variant as _ } } -impl SIZE_R { +impl crate::FieldSpec for Size { + type Ux = u8; +} +impl crate::IsEnum for Size {} +#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] +pub type SizeR = crate::FieldReader; +impl SizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIZE_A::BYTE), - 1 => Some(SIZE_A::HALFWORD), - 2 => Some(SIZE_A::WORD), + 0 => Some(Size::Byte), + 1 => Some(Size::Halfword), + 2 => Some(Size::Word), _ => None, } } - #[doc = "Checks if the value of the field is `BYTE`"] + #[doc = "Each unit transfer is a byte"] #[inline(always)] pub fn is_byte(&self) -> bool { - *self == SIZE_A::BYTE + *self == Size::Byte } - #[doc = "Checks if the value of the field is `HALFWORD`"] + #[doc = "Each unit transfer is a half-word"] #[inline(always)] pub fn is_halfword(&self) -> bool { - *self == SIZE_A::HALFWORD + *self == Size::Halfword } - #[doc = "Checks if the value of the field is `WORD`"] + #[doc = "Each unit transfer is a word"] #[inline(always)] pub fn is_word(&self) -> bool { - *self == SIZE_A::WORD + *self == Size::Word } } #[doc = "Field `SIZE` writer - Unit Data Transfer Size"] -pub type SIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH1_CTRL_SPEC, u8, SIZE_A, 2, O>; -impl<'a, const O: u8> SIZE_W<'a, O> { +pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Size>; +impl<'a, REG> SizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Each unit transfer is a byte"] #[inline(always)] - pub fn byte(self) -> &'a mut W { - self.variant(SIZE_A::BYTE) + pub fn byte(self) -> &'a mut crate::W { + self.variant(Size::Byte) } #[doc = "Each unit transfer is a half-word"] #[inline(always)] - pub fn halfword(self) -> &'a mut W { - self.variant(SIZE_A::HALFWORD) + pub fn halfword(self) -> &'a mut crate::W { + self.variant(Size::Halfword) } #[doc = "Each unit transfer is a word"] #[inline(always)] - pub fn word(self) -> &'a mut W { - self.variant(SIZE_A::WORD) + pub fn word(self) -> &'a mut crate::W { + self.variant(Size::Word) } } -#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] -pub type DSTINC_R = crate::FieldReader; #[doc = "Destination Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DSTINC_A { +pub enum Dstinc { #[doc = "0: Increment destination address by one unit data size after each write"] - ONE = 0, + One = 0, #[doc = "1: Increment destination address by two unit data sizes after each write"] - TWO = 1, + Two = 1, #[doc = "2: Increment destination address by four unit data sizes after each write"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DSTINC_A) -> Self { + fn from(variant: Dstinc) -> Self { variant as _ } } -impl DSTINC_R { +impl crate::FieldSpec for Dstinc { + type Ux = u8; +} +impl crate::IsEnum for Dstinc {} +#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] +pub type DstincR = crate::FieldReader; +impl DstincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINC_A { + pub const fn variant(&self) -> Dstinc { match self.bits { - 0 => DSTINC_A::ONE, - 1 => DSTINC_A::TWO, - 2 => DSTINC_A::FOUR, - 3 => DSTINC_A::NONE, + 0 => Dstinc::One, + 1 => Dstinc::Two, + 2 => Dstinc::Four, + 3 => Dstinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == DSTINC_A::ONE + *self == Dstinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == DSTINC_A::TWO + *self == Dstinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == DSTINC_A::FOUR + *self == Dstinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == DSTINC_A::NONE + *self == Dstinc::None } } #[doc = "Field `DSTINC` writer - Destination Address Increment Size"] -pub type DSTINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH1_CTRL_SPEC, u8, DSTINC_A, 2, O>; -impl<'a, const O: u8> DSTINC_W<'a, O> { +pub type DstincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dstinc, crate::Safe>; +impl<'a, REG> DstincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(DSTINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Dstinc::One) } #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(DSTINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Dstinc::Two) } #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(DSTINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Dstinc::Four) } #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(DSTINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Dstinc::None) } } -#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] -pub type SRCMODE_R = crate::BitReader; #[doc = "Source Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCMODE_A { +pub enum Srcmode { #[doc = "0: The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCMODE_A) -> Self { + fn from(variant: Srcmode) -> Self { variant as u8 != 0 } } -impl SRCMODE_R { +#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] +pub type SrcmodeR = crate::BitReader; +impl SrcmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCMODE_A { + pub const fn variant(&self) -> Srcmode { match self.bits { - false => SRCMODE_A::ABSOLUTE, - true => SRCMODE_A::RELATIVE, + false => Srcmode::Absolute, + true => Srcmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == SRCMODE_A::ABSOLUTE + *self == Srcmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == SRCMODE_A::RELATIVE + *self == Srcmode::Relative } } -#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] -pub type DSTMODE_R = crate::BitReader; #[doc = "Destination Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTMODE_A { +pub enum Dstmode { #[doc = "0: The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTMODE_A) -> Self { + fn from(variant: Dstmode) -> Self { variant as u8 != 0 } } -impl DSTMODE_R { +#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] +pub type DstmodeR = crate::BitReader; +impl DstmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTMODE_A { + pub const fn variant(&self) -> Dstmode { match self.bits { - false => DSTMODE_A::ABSOLUTE, - true => DSTMODE_A::RELATIVE, + false => Dstmode::Absolute, + true => Dstmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == DSTMODE_A::ABSOLUTE + *self == Dstmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == DSTMODE_A::RELATIVE + *self == Dstmode::Relative } } impl R { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] - pub fn structtype(&self) -> STRUCTTYPE_R { - STRUCTTYPE_R::new((self.bits & 3) as u8) + pub fn structtype(&self) -> StructtypeR { + StructtypeR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Structure DMA Transfer Request"] #[inline(always)] - pub fn structreq(&self) -> STRUCTREQ_R { - STRUCTREQ_R::new(((self.bits >> 3) & 1) != 0) + pub fn structreq(&self) -> StructreqR { + StructreqR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] - pub fn xfercnt(&self) -> XFERCNT_R { - XFERCNT_R::new(((self.bits >> 4) & 0x07ff) as u16) + pub fn xfercnt(&self) -> XfercntR { + XfercntR::new(((self.bits >> 4) & 0x07ff) as u16) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] - pub fn byteswap(&self) -> BYTESWAP_R { - BYTESWAP_R::new(((self.bits >> 15) & 1) != 0) + pub fn byteswap(&self) -> ByteswapR { + ByteswapR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] - pub fn blocksize(&self) -> BLOCKSIZE_R { - BLOCKSIZE_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn blocksize(&self) -> BlocksizeR { + BlocksizeR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] - pub fn doneien(&self) -> DONEIEN_R { - DONEIEN_R::new(((self.bits >> 20) & 1) != 0) + pub fn doneien(&self) -> DoneienR { + DoneienR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] - pub fn reqmode(&self) -> REQMODE_R { - REQMODE_R::new(((self.bits >> 21) & 1) != 0) + pub fn reqmode(&self) -> ReqmodeR { + ReqmodeR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] - pub fn decloopcnt(&self) -> DECLOOPCNT_R { - DECLOOPCNT_R::new(((self.bits >> 22) & 1) != 0) + pub fn decloopcnt(&self) -> DecloopcntR { + DecloopcntR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] - pub fn ignoresreq(&self) -> IGNORESREQ_R { - IGNORESREQ_R::new(((self.bits >> 23) & 1) != 0) + pub fn ignoresreq(&self) -> IgnoresreqR { + IgnoresreqR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] - pub fn srcinc(&self) -> SRCINC_R { - SRCINC_R::new(((self.bits >> 24) & 3) as u8) + pub fn srcinc(&self) -> SrcincR { + SrcincR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] - pub fn size(&self) -> SIZE_R { - SIZE_R::new(((self.bits >> 26) & 3) as u8) + pub fn size(&self) -> SizeR { + SizeR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] - pub fn dstinc(&self) -> DSTINC_R { - DSTINC_R::new(((self.bits >> 28) & 3) as u8) + pub fn dstinc(&self) -> DstincR { + DstincR::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bit 30 - Source Addressing Mode"] #[inline(always)] - pub fn srcmode(&self) -> SRCMODE_R { - SRCMODE_R::new(((self.bits >> 30) & 1) != 0) + pub fn srcmode(&self) -> SrcmodeR { + SrcmodeR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Destination Addressing Mode"] #[inline(always)] - pub fn dstmode(&self) -> DSTMODE_R { - DSTMODE_R::new(((self.bits >> 31) & 1) != 0) + pub fn dstmode(&self) -> DstmodeR { + DstmodeR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] #[must_use] - pub fn structtype(&mut self) -> STRUCTTYPE_W<0> { - STRUCTTYPE_W::new(self) + pub fn structtype(&mut self) -> StructtypeW { + StructtypeW::new(self, 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] #[must_use] - pub fn xfercnt(&mut self) -> XFERCNT_W<4> { - XFERCNT_W::new(self) + pub fn xfercnt(&mut self) -> XfercntW { + XfercntW::new(self, 4) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] #[must_use] - pub fn byteswap(&mut self) -> BYTESWAP_W<15> { - BYTESWAP_W::new(self) + pub fn byteswap(&mut self) -> ByteswapW { + ByteswapW::new(self, 15) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] #[must_use] - pub fn blocksize(&mut self) -> BLOCKSIZE_W<16> { - BLOCKSIZE_W::new(self) + pub fn blocksize(&mut self) -> BlocksizeW { + BlocksizeW::new(self, 16) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] #[must_use] - pub fn doneien(&mut self) -> DONEIEN_W<20> { - DONEIEN_W::new(self) + pub fn doneien(&mut self) -> DoneienW { + DoneienW::new(self, 20) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] #[must_use] - pub fn reqmode(&mut self) -> REQMODE_W<21> { - REQMODE_W::new(self) + pub fn reqmode(&mut self) -> ReqmodeW { + ReqmodeW::new(self, 21) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] #[must_use] - pub fn decloopcnt(&mut self) -> DECLOOPCNT_W<22> { - DECLOOPCNT_W::new(self) + pub fn decloopcnt(&mut self) -> DecloopcntW { + DecloopcntW::new(self, 22) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] #[must_use] - pub fn ignoresreq(&mut self) -> IGNORESREQ_W<23> { - IGNORESREQ_W::new(self) + pub fn ignoresreq(&mut self) -> IgnoresreqW { + IgnoresreqW::new(self, 23) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] #[must_use] - pub fn srcinc(&mut self) -> SRCINC_W<24> { - SRCINC_W::new(self) + pub fn srcinc(&mut self) -> SrcincW { + SrcincW::new(self, 24) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SIZE_W<26> { - SIZE_W::new(self) + pub fn size(&mut self) -> SizeW { + SizeW::new(self, 26) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] #[must_use] - pub fn dstinc(&mut self) -> DSTINC_W<28> { - DSTINC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstinc(&mut self) -> DstincW { + DstincW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch1_ctrl](index.html) module"] -pub struct CH1_CTRL_SPEC; -impl crate::RegisterSpec for CH1_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch1CtrlSpec; +impl crate::RegisterSpec for Ch1CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch1_ctrl::R](R) reader structure"] -impl crate::Readable for CH1_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch1_ctrl::W](W) writer structure"] -impl crate::Writable for CH1_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch1_ctrl::R`](R) reader structure"] +impl crate::Readable for Ch1CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ch1_ctrl::W`](W) writer structure"] +impl crate::Writable for Ch1CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH1_CTRL to value 0"] -impl crate::Resettable for CH1_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch1CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch1_dst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch1_dst.rs index 23231f6..b11d3c6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch1_dst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch1_dst.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH1_DST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH1_DST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DSTADDR` reader - Destination Data Address"] -pub type DSTADDR_R = crate::FieldReader; +pub type DstaddrR = crate::FieldReader; #[doc = "Field `DSTADDR` writer - Destination Data Address"] -pub type DSTADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH1_DST_SPEC, u32, u32, 32, O>; +pub type DstaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] - pub fn dstaddr(&self) -> DSTADDR_R { - DSTADDR_R::new(self.bits) + pub fn dstaddr(&self) -> DstaddrR { + DstaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] #[must_use] - pub fn dstaddr(&mut self) -> DSTADDR_W<0> { - DSTADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstaddr(&mut self) -> DstaddrW { + DstaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch1_dst](index.html) module"] -pub struct CH1_DST_SPEC; -impl crate::RegisterSpec for CH1_DST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_dst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_dst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch1DstSpec; +impl crate::RegisterSpec for Ch1DstSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch1_dst::R](R) reader structure"] -impl crate::Readable for CH1_DST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch1_dst::W](W) writer structure"] -impl crate::Writable for CH1_DST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch1_dst::R`](R) reader structure"] +impl crate::Readable for Ch1DstSpec {} +#[doc = "`write(|w| ..)` method takes [`ch1_dst::W`](W) writer structure"] +impl crate::Writable for Ch1DstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH1_DST to value 0"] -impl crate::Resettable for CH1_DST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch1DstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch1_link.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch1_link.rs index 97e44d3..3fdc56e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch1_link.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch1_link.rs @@ -1,136 +1,96 @@ #[doc = "Register `CH1_LINK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH1_LINK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] -pub type LINKMODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Link Structure Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LINKMODE_A { +pub enum Linkmode { #[doc = "0: The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LINKMODE_A) -> Self { + fn from(variant: Linkmode) -> Self { variant as u8 != 0 } } -impl LINKMODE_R { +#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] +pub type LinkmodeR = crate::BitReader; +impl LinkmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LINKMODE_A { + pub const fn variant(&self) -> Linkmode { match self.bits { - false => LINKMODE_A::ABSOLUTE, - true => LINKMODE_A::RELATIVE, + false => Linkmode::Absolute, + true => Linkmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == LINKMODE_A::ABSOLUTE + *self == Linkmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == LINKMODE_A::RELATIVE + *self == Linkmode::Relative } } #[doc = "Field `LINK` reader - Link Next Structure"] -pub type LINK_R = crate::BitReader; +pub type LinkR = crate::BitReader; #[doc = "Field `LINK` writer - Link Next Structure"] -pub type LINK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH1_LINK_SPEC, bool, O>; +pub type LinkW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LINKADDR` reader - Link Structure Address"] -pub type LINKADDR_R = crate::FieldReader; +pub type LinkaddrR = crate::FieldReader; #[doc = "Field `LINKADDR` writer - Link Structure Address"] -pub type LINKADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH1_LINK_SPEC, u32, u32, 30, O>; +pub type LinkaddrW<'a, REG> = crate::FieldWriter<'a, REG, 30, u32>; impl R { #[doc = "Bit 0 - Link Structure Addressing Mode"] #[inline(always)] - pub fn linkmode(&self) -> LINKMODE_R { - LINKMODE_R::new((self.bits & 1) != 0) + pub fn linkmode(&self) -> LinkmodeR { + LinkmodeR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] - pub fn link(&self) -> LINK_R { - LINK_R::new(((self.bits >> 1) & 1) != 0) + pub fn link(&self) -> LinkR { + LinkR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] - pub fn linkaddr(&self) -> LINKADDR_R { - LINKADDR_R::new((self.bits >> 2) & 0x3fff_ffff) + pub fn linkaddr(&self) -> LinkaddrR { + LinkaddrR::new((self.bits >> 2) & 0x3fff_ffff) } } impl W { #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] #[must_use] - pub fn link(&mut self) -> LINK_W<1> { - LINK_W::new(self) + pub fn link(&mut self) -> LinkW { + LinkW::new(self, 1) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] #[must_use] - pub fn linkaddr(&mut self) -> LINKADDR_W<2> { - LINKADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn linkaddr(&mut self) -> LinkaddrW { + LinkaddrW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch1_link](index.html) module"] -pub struct CH1_LINK_SPEC; -impl crate::RegisterSpec for CH1_LINK_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_link::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_link::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch1LinkSpec; +impl crate::RegisterSpec for Ch1LinkSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch1_link::R](R) reader structure"] -impl crate::Readable for CH1_LINK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch1_link::W](W) writer structure"] -impl crate::Writable for CH1_LINK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch1_link::R`](R) reader structure"] +impl crate::Readable for Ch1LinkSpec {} +#[doc = "`write(|w| ..)` method takes [`ch1_link::W`](W) writer structure"] +impl crate::Writable for Ch1LinkSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH1_LINK to value 0"] -impl crate::Resettable for CH1_LINK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch1LinkSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch1_loop.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch1_loop.rs index a787160..cd07f05 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch1_loop.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch1_loop.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH1_LOOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH1_LOOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOOPCNT` reader - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_R = crate::FieldReader; +pub type LoopcntR = crate::FieldReader; #[doc = "Field `LOOPCNT` writer - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH1_LOOP_SPEC, u8, u8, 8, O>; +pub type LoopcntW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] - pub fn loopcnt(&self) -> LOOPCNT_R { - LOOPCNT_R::new((self.bits & 0xff) as u8) + pub fn loopcnt(&self) -> LoopcntR { + LoopcntR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] #[must_use] - pub fn loopcnt(&mut self) -> LOOPCNT_W<0> { - LOOPCNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn loopcnt(&mut self) -> LoopcntW { + LoopcntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch1_loop](index.html) module"] -pub struct CH1_LOOP_SPEC; -impl crate::RegisterSpec for CH1_LOOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_loop::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_loop::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch1LoopSpec; +impl crate::RegisterSpec for Ch1LoopSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch1_loop::R](R) reader structure"] -impl crate::Readable for CH1_LOOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch1_loop::W](W) writer structure"] -impl crate::Writable for CH1_LOOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch1_loop::R`](R) reader structure"] +impl crate::Readable for Ch1LoopSpec {} +#[doc = "`write(|w| ..)` method takes [`ch1_loop::W`](W) writer structure"] +impl crate::Writable for Ch1LoopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH1_LOOP to value 0"] -impl crate::Resettable for CH1_LOOP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch1LoopSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch1_src.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch1_src.rs index 3b46dee..4e04b5b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch1_src.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch1_src.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH1_SRC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH1_SRC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SRCADDR` reader - Source Data Address"] -pub type SRCADDR_R = crate::FieldReader; +pub type SrcaddrR = crate::FieldReader; #[doc = "Field `SRCADDR` writer - Source Data Address"] -pub type SRCADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH1_SRC_SPEC, u32, u32, 32, O>; +pub type SrcaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] - pub fn srcaddr(&self) -> SRCADDR_R { - SRCADDR_R::new(self.bits) + pub fn srcaddr(&self) -> SrcaddrR { + SrcaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] #[must_use] - pub fn srcaddr(&mut self) -> SRCADDR_W<0> { - SRCADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn srcaddr(&mut self) -> SrcaddrW { + SrcaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch1_src](index.html) module"] -pub struct CH1_SRC_SPEC; -impl crate::RegisterSpec for CH1_SRC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_src::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_src::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch1SrcSpec; +impl crate::RegisterSpec for Ch1SrcSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch1_src::R](R) reader structure"] -impl crate::Readable for CH1_SRC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch1_src::W](W) writer structure"] -impl crate::Writable for CH1_SRC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch1_src::R`](R) reader structure"] +impl crate::Readable for Ch1SrcSpec {} +#[doc = "`write(|w| ..)` method takes [`ch1_src::W`](W) writer structure"] +impl crate::Writable for Ch1SrcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH1_SRC to value 0"] -impl crate::Resettable for CH1_SRC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch1SrcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch2_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch2_cfg.rs index 1f41c2d..e23bdad 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch2_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch2_cfg.rs @@ -1,277 +1,250 @@ #[doc = "Register `CH2_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH2_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] -pub type ARBSLOTS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Arbitration Slot Number Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ARBSLOTS_A { +pub enum Arbslots { #[doc = "0: One arbitration slot selected"] - ONE = 0, + One = 0, #[doc = "1: Two arbitration slots selected"] - TWO = 1, + Two = 1, #[doc = "2: Four arbitration slots selected"] - FOUR = 2, + Four = 2, #[doc = "3: Eight arbitration slots selected"] - EIGHT = 3, + Eight = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ARBSLOTS_A) -> Self { + fn from(variant: Arbslots) -> Self { variant as _ } } -impl ARBSLOTS_R { +impl crate::FieldSpec for Arbslots { + type Ux = u8; +} +impl crate::IsEnum for Arbslots {} +#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] +pub type ArbslotsR = crate::FieldReader; +impl ArbslotsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ARBSLOTS_A { + pub const fn variant(&self) -> Arbslots { match self.bits { - 0 => ARBSLOTS_A::ONE, - 1 => ARBSLOTS_A::TWO, - 2 => ARBSLOTS_A::FOUR, - 3 => ARBSLOTS_A::EIGHT, + 0 => Arbslots::One, + 1 => Arbslots::Two, + 2 => Arbslots::Four, + 3 => Arbslots::Eight, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "One arbitration slot selected"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == ARBSLOTS_A::ONE + *self == Arbslots::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Two arbitration slots selected"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == ARBSLOTS_A::TWO + *self == Arbslots::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Four arbitration slots selected"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == ARBSLOTS_A::FOUR + *self == Arbslots::Four } - #[doc = "Checks if the value of the field is `EIGHT`"] + #[doc = "Eight arbitration slots selected"] #[inline(always)] pub fn is_eight(&self) -> bool { - *self == ARBSLOTS_A::EIGHT + *self == Arbslots::Eight } } #[doc = "Field `ARBSLOTS` writer - Arbitration Slot Number Select"] -pub type ARBSLOTS_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH2_CFG_SPEC, u8, ARBSLOTS_A, 2, O>; -impl<'a, const O: u8> ARBSLOTS_W<'a, O> { +pub type ArbslotsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Arbslots, crate::Safe>; +impl<'a, REG> ArbslotsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One arbitration slot selected"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(ARBSLOTS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Arbslots::One) } #[doc = "Two arbitration slots selected"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(ARBSLOTS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Arbslots::Two) } #[doc = "Four arbitration slots selected"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(ARBSLOTS_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Arbslots::Four) } #[doc = "Eight arbitration slots selected"] #[inline(always)] - pub fn eight(self) -> &'a mut W { - self.variant(ARBSLOTS_A::EIGHT) + pub fn eight(self) -> &'a mut crate::W { + self.variant(Arbslots::Eight) } } -#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] -pub type SRCINCSIGN_R = crate::BitReader; #[doc = "Source Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCINCSIGN_A { +pub enum Srcincsign { #[doc = "0: Increment source address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement source address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCINCSIGN_A) -> Self { + fn from(variant: Srcincsign) -> Self { variant as u8 != 0 } } -impl SRCINCSIGN_R { +#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] +pub type SrcincsignR = crate::BitReader; +impl SrcincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINCSIGN_A { + pub const fn variant(&self) -> Srcincsign { match self.bits { - false => SRCINCSIGN_A::POSITIVE, - true => SRCINCSIGN_A::NEGATIVE, + false => Srcincsign::Positive, + true => Srcincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment source address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == SRCINCSIGN_A::POSITIVE + *self == Srcincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement source address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == SRCINCSIGN_A::NEGATIVE + *self == Srcincsign::Negative } } #[doc = "Field `SRCINCSIGN` writer - Source Address Increment Sign"] -pub type SRCINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH2_CFG_SPEC, SRCINCSIGN_A, O>; -impl<'a, const O: u8> SRCINCSIGN_W<'a, O> { +pub type SrcincsignW<'a, REG> = crate::BitWriter<'a, REG, Srcincsign>; +impl<'a, REG> SrcincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment source address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Srcincsign::Positive) } #[doc = "Decrement source address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Srcincsign::Negative) } } -#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] -pub type DSTINCSIGN_R = crate::BitReader; #[doc = "Destination Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTINCSIGN_A { +pub enum Dstincsign { #[doc = "0: Increment destination address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement destination address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTINCSIGN_A) -> Self { + fn from(variant: Dstincsign) -> Self { variant as u8 != 0 } } -impl DSTINCSIGN_R { +#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] +pub type DstincsignR = crate::BitReader; +impl DstincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINCSIGN_A { + pub const fn variant(&self) -> Dstincsign { match self.bits { - false => DSTINCSIGN_A::POSITIVE, - true => DSTINCSIGN_A::NEGATIVE, + false => Dstincsign::Positive, + true => Dstincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment destination address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == DSTINCSIGN_A::POSITIVE + *self == Dstincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement destination address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == DSTINCSIGN_A::NEGATIVE + *self == Dstincsign::Negative } } #[doc = "Field `DSTINCSIGN` writer - Destination Address Increment Sign"] -pub type DSTINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH2_CFG_SPEC, DSTINCSIGN_A, O>; -impl<'a, const O: u8> DSTINCSIGN_W<'a, O> { +pub type DstincsignW<'a, REG> = crate::BitWriter<'a, REG, Dstincsign>; +impl<'a, REG> DstincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment destination address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Dstincsign::Positive) } #[doc = "Decrement destination address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Dstincsign::Negative) } } impl R { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] - pub fn arbslots(&self) -> ARBSLOTS_R { - ARBSLOTS_R::new(((self.bits >> 16) & 3) as u8) + pub fn arbslots(&self) -> ArbslotsR { + ArbslotsR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] - pub fn srcincsign(&self) -> SRCINCSIGN_R { - SRCINCSIGN_R::new(((self.bits >> 20) & 1) != 0) + pub fn srcincsign(&self) -> SrcincsignR { + SrcincsignR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] - pub fn dstincsign(&self) -> DSTINCSIGN_R { - DSTINCSIGN_R::new(((self.bits >> 21) & 1) != 0) + pub fn dstincsign(&self) -> DstincsignR { + DstincsignR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] #[must_use] - pub fn arbslots(&mut self) -> ARBSLOTS_W<16> { - ARBSLOTS_W::new(self) + pub fn arbslots(&mut self) -> ArbslotsW { + ArbslotsW::new(self, 16) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] #[must_use] - pub fn srcincsign(&mut self) -> SRCINCSIGN_W<20> { - SRCINCSIGN_W::new(self) + pub fn srcincsign(&mut self) -> SrcincsignW { + SrcincsignW::new(self, 20) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] #[must_use] - pub fn dstincsign(&mut self) -> DSTINCSIGN_W<21> { - DSTINCSIGN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstincsign(&mut self) -> DstincsignW { + DstincsignW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch2_cfg](index.html) module"] -pub struct CH2_CFG_SPEC; -impl crate::RegisterSpec for CH2_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch2CfgSpec; +impl crate::RegisterSpec for Ch2CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch2_cfg::R](R) reader structure"] -impl crate::Readable for CH2_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch2_cfg::W](W) writer structure"] -impl crate::Writable for CH2_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch2_cfg::R`](R) reader structure"] +impl crate::Readable for Ch2CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`ch2_cfg::W`](W) writer structure"] +impl crate::Writable for Ch2CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH2_CFG to value 0"] -impl crate::Resettable for CH2_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch2CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch2_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch2_ctrl.rs index 1e108dc..2b879f8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch2_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch2_ctrl.rs @@ -1,843 +1,842 @@ #[doc = "Register `CH2_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH2_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] -pub type STRUCTTYPE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DMA Structure Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STRUCTTYPE_A { +pub enum Structtype { #[doc = "0: DMA transfer structure type selected."] - TRANSFER = 0, + Transfer = 0, #[doc = "1: Synchronization structure type selected."] - SYNCHRONIZE = 1, + Synchronize = 1, #[doc = "2: Write immediate value structure type selected."] - WRITE = 2, + Write = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STRUCTTYPE_A) -> Self { + fn from(variant: Structtype) -> Self { variant as _ } } -impl STRUCTTYPE_R { +impl crate::FieldSpec for Structtype { + type Ux = u8; +} +impl crate::IsEnum for Structtype {} +#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] +pub type StructtypeR = crate::FieldReader; +impl StructtypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(STRUCTTYPE_A::TRANSFER), - 1 => Some(STRUCTTYPE_A::SYNCHRONIZE), - 2 => Some(STRUCTTYPE_A::WRITE), + 0 => Some(Structtype::Transfer), + 1 => Some(Structtype::Synchronize), + 2 => Some(Structtype::Write), _ => None, } } - #[doc = "Checks if the value of the field is `TRANSFER`"] + #[doc = "DMA transfer structure type selected."] #[inline(always)] pub fn is_transfer(&self) -> bool { - *self == STRUCTTYPE_A::TRANSFER + *self == Structtype::Transfer } - #[doc = "Checks if the value of the field is `SYNCHRONIZE`"] + #[doc = "Synchronization structure type selected."] #[inline(always)] pub fn is_synchronize(&self) -> bool { - *self == STRUCTTYPE_A::SYNCHRONIZE + *self == Structtype::Synchronize } - #[doc = "Checks if the value of the field is `WRITE`"] + #[doc = "Write immediate value structure type selected."] #[inline(always)] pub fn is_write(&self) -> bool { - *self == STRUCTTYPE_A::WRITE + *self == Structtype::Write } } #[doc = "Field `STRUCTTYPE` writer - DMA Structure Type"] -pub type STRUCTTYPE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH2_CTRL_SPEC, u8, STRUCTTYPE_A, 2, O>; -impl<'a, const O: u8> STRUCTTYPE_W<'a, O> { +pub type StructtypeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Structtype>; +impl<'a, REG> StructtypeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "DMA transfer structure type selected."] #[inline(always)] - pub fn transfer(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::TRANSFER) + pub fn transfer(self) -> &'a mut crate::W { + self.variant(Structtype::Transfer) } #[doc = "Synchronization structure type selected."] #[inline(always)] - pub fn synchronize(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::SYNCHRONIZE) + pub fn synchronize(self) -> &'a mut crate::W { + self.variant(Structtype::Synchronize) } #[doc = "Write immediate value structure type selected."] #[inline(always)] - pub fn write(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::WRITE) + pub fn write(self) -> &'a mut crate::W { + self.variant(Structtype::Write) } } #[doc = "Field `STRUCTREQ` reader - Structure DMA Transfer Request"] -pub type STRUCTREQ_R = crate::BitReader; +pub type StructreqR = crate::BitReader; #[doc = "Field `XFERCNT` reader - DMA Unit Data Transfer Count"] -pub type XFERCNT_R = crate::FieldReader; +pub type XfercntR = crate::FieldReader; #[doc = "Field `XFERCNT` writer - DMA Unit Data Transfer Count"] -pub type XFERCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH2_CTRL_SPEC, u16, u16, 11, O>; +pub type XfercntW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `BYTESWAP` reader - Endian Byte Swap"] -pub type BYTESWAP_R = crate::BitReader; +pub type ByteswapR = crate::BitReader; #[doc = "Field `BYTESWAP` writer - Endian Byte Swap"] -pub type BYTESWAP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH2_CTRL_SPEC, bool, O>; -#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] -pub type BLOCKSIZE_R = crate::FieldReader; +pub type ByteswapW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Block Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BLOCKSIZE_A { +pub enum Blocksize { #[doc = "0: One unit transfer per arbitration"] - UNIT1 = 0, + Unit1 = 0, #[doc = "1: Two unit transfers per arbitration"] - UNIT2 = 1, + Unit2 = 1, #[doc = "2: Three unit transfers per arbitration"] - UNIT3 = 2, + Unit3 = 2, #[doc = "3: Four unit transfers per arbitration"] - UNIT4 = 3, + Unit4 = 3, #[doc = "4: Six unit transfers per arbitration"] - UNIT6 = 4, + Unit6 = 4, #[doc = "5: Eight unit transfers per arbitration"] - UNIT8 = 5, + Unit8 = 5, #[doc = "7: Sixteen unit transfers per arbitration"] - UNIT16 = 7, + Unit16 = 7, #[doc = "9: 32 unit transfers per arbitration"] - UNIT32 = 9, + Unit32 = 9, #[doc = "10: 64 unit transfers per arbitration"] - UNIT64 = 10, + Unit64 = 10, #[doc = "11: 128 unit transfers per arbitration"] - UNIT128 = 11, + Unit128 = 11, #[doc = "12: 256 unit transfers per arbitration"] - UNIT256 = 12, + Unit256 = 12, #[doc = "13: 512 unit transfers per arbitration"] - UNIT512 = 13, + Unit512 = 13, #[doc = "14: 1024 unit transfers per arbitration"] - UNIT1024 = 14, + Unit1024 = 14, #[doc = "15: Transfer all units as specified by the XFRCNT field"] - ALL = 15, + All = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BLOCKSIZE_A) -> Self { + fn from(variant: Blocksize) -> Self { variant as _ } } -impl BLOCKSIZE_R { +impl crate::FieldSpec for Blocksize { + type Ux = u8; +} +impl crate::IsEnum for Blocksize {} +#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] +pub type BlocksizeR = crate::FieldReader; +impl BlocksizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BLOCKSIZE_A::UNIT1), - 1 => Some(BLOCKSIZE_A::UNIT2), - 2 => Some(BLOCKSIZE_A::UNIT3), - 3 => Some(BLOCKSIZE_A::UNIT4), - 4 => Some(BLOCKSIZE_A::UNIT6), - 5 => Some(BLOCKSIZE_A::UNIT8), - 7 => Some(BLOCKSIZE_A::UNIT16), - 9 => Some(BLOCKSIZE_A::UNIT32), - 10 => Some(BLOCKSIZE_A::UNIT64), - 11 => Some(BLOCKSIZE_A::UNIT128), - 12 => Some(BLOCKSIZE_A::UNIT256), - 13 => Some(BLOCKSIZE_A::UNIT512), - 14 => Some(BLOCKSIZE_A::UNIT1024), - 15 => Some(BLOCKSIZE_A::ALL), + 0 => Some(Blocksize::Unit1), + 1 => Some(Blocksize::Unit2), + 2 => Some(Blocksize::Unit3), + 3 => Some(Blocksize::Unit4), + 4 => Some(Blocksize::Unit6), + 5 => Some(Blocksize::Unit8), + 7 => Some(Blocksize::Unit16), + 9 => Some(Blocksize::Unit32), + 10 => Some(Blocksize::Unit64), + 11 => Some(Blocksize::Unit128), + 12 => Some(Blocksize::Unit256), + 13 => Some(Blocksize::Unit512), + 14 => Some(Blocksize::Unit1024), + 15 => Some(Blocksize::All), _ => None, } } - #[doc = "Checks if the value of the field is `UNIT1`"] + #[doc = "One unit transfer per arbitration"] #[inline(always)] pub fn is_unit1(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1 + *self == Blocksize::Unit1 } - #[doc = "Checks if the value of the field is `UNIT2`"] + #[doc = "Two unit transfers per arbitration"] #[inline(always)] pub fn is_unit2(&self) -> bool { - *self == BLOCKSIZE_A::UNIT2 + *self == Blocksize::Unit2 } - #[doc = "Checks if the value of the field is `UNIT3`"] + #[doc = "Three unit transfers per arbitration"] #[inline(always)] pub fn is_unit3(&self) -> bool { - *self == BLOCKSIZE_A::UNIT3 + *self == Blocksize::Unit3 } - #[doc = "Checks if the value of the field is `UNIT4`"] + #[doc = "Four unit transfers per arbitration"] #[inline(always)] pub fn is_unit4(&self) -> bool { - *self == BLOCKSIZE_A::UNIT4 + *self == Blocksize::Unit4 } - #[doc = "Checks if the value of the field is `UNIT6`"] + #[doc = "Six unit transfers per arbitration"] #[inline(always)] pub fn is_unit6(&self) -> bool { - *self == BLOCKSIZE_A::UNIT6 + *self == Blocksize::Unit6 } - #[doc = "Checks if the value of the field is `UNIT8`"] + #[doc = "Eight unit transfers per arbitration"] #[inline(always)] pub fn is_unit8(&self) -> bool { - *self == BLOCKSIZE_A::UNIT8 + *self == Blocksize::Unit8 } - #[doc = "Checks if the value of the field is `UNIT16`"] + #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] pub fn is_unit16(&self) -> bool { - *self == BLOCKSIZE_A::UNIT16 + *self == Blocksize::Unit16 } - #[doc = "Checks if the value of the field is `UNIT32`"] + #[doc = "32 unit transfers per arbitration"] #[inline(always)] pub fn is_unit32(&self) -> bool { - *self == BLOCKSIZE_A::UNIT32 + *self == Blocksize::Unit32 } - #[doc = "Checks if the value of the field is `UNIT64`"] + #[doc = "64 unit transfers per arbitration"] #[inline(always)] pub fn is_unit64(&self) -> bool { - *self == BLOCKSIZE_A::UNIT64 + *self == Blocksize::Unit64 } - #[doc = "Checks if the value of the field is `UNIT128`"] + #[doc = "128 unit transfers per arbitration"] #[inline(always)] pub fn is_unit128(&self) -> bool { - *self == BLOCKSIZE_A::UNIT128 + *self == Blocksize::Unit128 } - #[doc = "Checks if the value of the field is `UNIT256`"] + #[doc = "256 unit transfers per arbitration"] #[inline(always)] pub fn is_unit256(&self) -> bool { - *self == BLOCKSIZE_A::UNIT256 + *self == Blocksize::Unit256 } - #[doc = "Checks if the value of the field is `UNIT512`"] + #[doc = "512 unit transfers per arbitration"] #[inline(always)] pub fn is_unit512(&self) -> bool { - *self == BLOCKSIZE_A::UNIT512 + *self == Blocksize::Unit512 } - #[doc = "Checks if the value of the field is `UNIT1024`"] + #[doc = "1024 unit transfers per arbitration"] #[inline(always)] pub fn is_unit1024(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1024 + *self == Blocksize::Unit1024 } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] pub fn is_all(&self) -> bool { - *self == BLOCKSIZE_A::ALL + *self == Blocksize::All } } #[doc = "Field `BLOCKSIZE` writer - Block Transfer Size"] -pub type BLOCKSIZE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH2_CTRL_SPEC, u8, BLOCKSIZE_A, 4, O>; -impl<'a, const O: u8> BLOCKSIZE_W<'a, O> { +pub type BlocksizeW<'a, REG> = crate::FieldWriter<'a, REG, 4, Blocksize>; +impl<'a, REG> BlocksizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One unit transfer per arbitration"] #[inline(always)] - pub fn unit1(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1) + pub fn unit1(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1) } #[doc = "Two unit transfers per arbitration"] #[inline(always)] - pub fn unit2(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT2) + pub fn unit2(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit2) } #[doc = "Three unit transfers per arbitration"] #[inline(always)] - pub fn unit3(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT3) + pub fn unit3(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit3) } #[doc = "Four unit transfers per arbitration"] #[inline(always)] - pub fn unit4(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT4) + pub fn unit4(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit4) } #[doc = "Six unit transfers per arbitration"] #[inline(always)] - pub fn unit6(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT6) + pub fn unit6(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit6) } #[doc = "Eight unit transfers per arbitration"] #[inline(always)] - pub fn unit8(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT8) + pub fn unit8(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit8) } #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] - pub fn unit16(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT16) + pub fn unit16(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit16) } #[doc = "32 unit transfers per arbitration"] #[inline(always)] - pub fn unit32(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT32) + pub fn unit32(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit32) } #[doc = "64 unit transfers per arbitration"] #[inline(always)] - pub fn unit64(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT64) + pub fn unit64(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit64) } #[doc = "128 unit transfers per arbitration"] #[inline(always)] - pub fn unit128(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT128) + pub fn unit128(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit128) } #[doc = "256 unit transfers per arbitration"] #[inline(always)] - pub fn unit256(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT256) + pub fn unit256(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit256) } #[doc = "512 unit transfers per arbitration"] #[inline(always)] - pub fn unit512(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT512) + pub fn unit512(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit512) } #[doc = "1024 unit transfers per arbitration"] #[inline(always)] - pub fn unit1024(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1024) + pub fn unit1024(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1024) } #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Blocksize::All) } } #[doc = "Field `DONEIEN` reader - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_R = crate::BitReader; +pub type DoneienR = crate::BitReader; #[doc = "Field `DONEIEN` writer - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH2_CTRL_SPEC, bool, O>; -#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] -pub type REQMODE_R = crate::BitReader; +pub type DoneienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "DMA Request Transfer Mode Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REQMODE_A { +pub enum Reqmode { #[doc = "0: The LDMA transfers one BLOCKSIZE per transfer request."] - BLOCK = 0, + Block = 0, #[doc = "1: One transfer request transfers all units as defined by the XFRCNT field."] - ALL = 1, + All = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REQMODE_A) -> Self { + fn from(variant: Reqmode) -> Self { variant as u8 != 0 } } -impl REQMODE_R { +#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] +pub type ReqmodeR = crate::BitReader; +impl ReqmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REQMODE_A { + pub const fn variant(&self) -> Reqmode { match self.bits { - false => REQMODE_A::BLOCK, - true => REQMODE_A::ALL, + false => Reqmode::Block, + true => Reqmode::All, } } - #[doc = "Checks if the value of the field is `BLOCK`"] + #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] pub fn is_block(&self) -> bool { - *self == REQMODE_A::BLOCK + *self == Reqmode::Block } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] pub fn is_all(&self) -> bool { - *self == REQMODE_A::ALL + *self == Reqmode::All } } #[doc = "Field `REQMODE` writer - DMA Request Transfer Mode Select"] -pub type REQMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH2_CTRL_SPEC, REQMODE_A, O>; -impl<'a, const O: u8> REQMODE_W<'a, O> { +pub type ReqmodeW<'a, REG> = crate::BitWriter<'a, REG, Reqmode>; +impl<'a, REG> ReqmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] - pub fn block(self) -> &'a mut W { - self.variant(REQMODE_A::BLOCK) + pub fn block(self) -> &'a mut crate::W { + self.variant(Reqmode::Block) } #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(REQMODE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Reqmode::All) } } #[doc = "Field `DECLOOPCNT` reader - Decrement Loop Count"] -pub type DECLOOPCNT_R = crate::BitReader; +pub type DecloopcntR = crate::BitReader; #[doc = "Field `DECLOOPCNT` writer - Decrement Loop Count"] -pub type DECLOOPCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH2_CTRL_SPEC, bool, O>; +pub type DecloopcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IGNORESREQ` reader - Ignore Sreq"] -pub type IGNORESREQ_R = crate::BitReader; +pub type IgnoresreqR = crate::BitReader; #[doc = "Field `IGNORESREQ` writer - Ignore Sreq"] -pub type IGNORESREQ_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH2_CTRL_SPEC, bool, O>; -#[doc = "Field `SRCINC` reader - Source Address Increment Size"] -pub type SRCINC_R = crate::FieldReader; +pub type IgnoresreqW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SRCINC_A { +pub enum Srcinc { #[doc = "0: Increment source address by one unit data size after each read"] - ONE = 0, + One = 0, #[doc = "1: Increment source address by two unit data sizes after each read"] - TWO = 1, + Two = 1, #[doc = "2: Increment source address by four unit data sizes after each read"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SRCINC_A) -> Self { + fn from(variant: Srcinc) -> Self { variant as _ } } -impl SRCINC_R { +impl crate::FieldSpec for Srcinc { + type Ux = u8; +} +impl crate::IsEnum for Srcinc {} +#[doc = "Field `SRCINC` reader - Source Address Increment Size"] +pub type SrcincR = crate::FieldReader; +impl SrcincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINC_A { + pub const fn variant(&self) -> Srcinc { match self.bits { - 0 => SRCINC_A::ONE, - 1 => SRCINC_A::TWO, - 2 => SRCINC_A::FOUR, - 3 => SRCINC_A::NONE, + 0 => Srcinc::One, + 1 => Srcinc::Two, + 2 => Srcinc::Four, + 3 => Srcinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == SRCINC_A::ONE + *self == Srcinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == SRCINC_A::TWO + *self == Srcinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == SRCINC_A::FOUR + *self == Srcinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SRCINC_A::NONE + *self == Srcinc::None } } #[doc = "Field `SRCINC` writer - Source Address Increment Size"] -pub type SRCINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH2_CTRL_SPEC, u8, SRCINC_A, 2, O>; -impl<'a, const O: u8> SRCINC_W<'a, O> { +pub type SrcincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Srcinc, crate::Safe>; +impl<'a, REG> SrcincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(SRCINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Srcinc::One) } #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(SRCINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Srcinc::Two) } #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(SRCINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Srcinc::Four) } #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SRCINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Srcinc::None) } } -#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] -pub type SIZE_R = crate::FieldReader; #[doc = "Unit Data Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIZE_A { +pub enum Size { #[doc = "0: Each unit transfer is a byte"] - BYTE = 0, + Byte = 0, #[doc = "1: Each unit transfer is a half-word"] - HALFWORD = 1, + Halfword = 1, #[doc = "2: Each unit transfer is a word"] - WORD = 2, + Word = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIZE_A) -> Self { + fn from(variant: Size) -> Self { variant as _ } } -impl SIZE_R { +impl crate::FieldSpec for Size { + type Ux = u8; +} +impl crate::IsEnum for Size {} +#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] +pub type SizeR = crate::FieldReader; +impl SizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIZE_A::BYTE), - 1 => Some(SIZE_A::HALFWORD), - 2 => Some(SIZE_A::WORD), + 0 => Some(Size::Byte), + 1 => Some(Size::Halfword), + 2 => Some(Size::Word), _ => None, } } - #[doc = "Checks if the value of the field is `BYTE`"] + #[doc = "Each unit transfer is a byte"] #[inline(always)] pub fn is_byte(&self) -> bool { - *self == SIZE_A::BYTE + *self == Size::Byte } - #[doc = "Checks if the value of the field is `HALFWORD`"] + #[doc = "Each unit transfer is a half-word"] #[inline(always)] pub fn is_halfword(&self) -> bool { - *self == SIZE_A::HALFWORD + *self == Size::Halfword } - #[doc = "Checks if the value of the field is `WORD`"] + #[doc = "Each unit transfer is a word"] #[inline(always)] pub fn is_word(&self) -> bool { - *self == SIZE_A::WORD + *self == Size::Word } } #[doc = "Field `SIZE` writer - Unit Data Transfer Size"] -pub type SIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH2_CTRL_SPEC, u8, SIZE_A, 2, O>; -impl<'a, const O: u8> SIZE_W<'a, O> { +pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Size>; +impl<'a, REG> SizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Each unit transfer is a byte"] #[inline(always)] - pub fn byte(self) -> &'a mut W { - self.variant(SIZE_A::BYTE) + pub fn byte(self) -> &'a mut crate::W { + self.variant(Size::Byte) } #[doc = "Each unit transfer is a half-word"] #[inline(always)] - pub fn halfword(self) -> &'a mut W { - self.variant(SIZE_A::HALFWORD) + pub fn halfword(self) -> &'a mut crate::W { + self.variant(Size::Halfword) } #[doc = "Each unit transfer is a word"] #[inline(always)] - pub fn word(self) -> &'a mut W { - self.variant(SIZE_A::WORD) + pub fn word(self) -> &'a mut crate::W { + self.variant(Size::Word) } } -#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] -pub type DSTINC_R = crate::FieldReader; #[doc = "Destination Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DSTINC_A { +pub enum Dstinc { #[doc = "0: Increment destination address by one unit data size after each write"] - ONE = 0, + One = 0, #[doc = "1: Increment destination address by two unit data sizes after each write"] - TWO = 1, + Two = 1, #[doc = "2: Increment destination address by four unit data sizes after each write"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DSTINC_A) -> Self { + fn from(variant: Dstinc) -> Self { variant as _ } } -impl DSTINC_R { +impl crate::FieldSpec for Dstinc { + type Ux = u8; +} +impl crate::IsEnum for Dstinc {} +#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] +pub type DstincR = crate::FieldReader; +impl DstincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINC_A { + pub const fn variant(&self) -> Dstinc { match self.bits { - 0 => DSTINC_A::ONE, - 1 => DSTINC_A::TWO, - 2 => DSTINC_A::FOUR, - 3 => DSTINC_A::NONE, + 0 => Dstinc::One, + 1 => Dstinc::Two, + 2 => Dstinc::Four, + 3 => Dstinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == DSTINC_A::ONE + *self == Dstinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == DSTINC_A::TWO + *self == Dstinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == DSTINC_A::FOUR + *self == Dstinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == DSTINC_A::NONE + *self == Dstinc::None } } #[doc = "Field `DSTINC` writer - Destination Address Increment Size"] -pub type DSTINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH2_CTRL_SPEC, u8, DSTINC_A, 2, O>; -impl<'a, const O: u8> DSTINC_W<'a, O> { +pub type DstincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dstinc, crate::Safe>; +impl<'a, REG> DstincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(DSTINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Dstinc::One) } #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(DSTINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Dstinc::Two) } #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(DSTINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Dstinc::Four) } #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(DSTINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Dstinc::None) } } -#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] -pub type SRCMODE_R = crate::BitReader; #[doc = "Source Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCMODE_A { +pub enum Srcmode { #[doc = "0: The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCMODE_A) -> Self { + fn from(variant: Srcmode) -> Self { variant as u8 != 0 } } -impl SRCMODE_R { +#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] +pub type SrcmodeR = crate::BitReader; +impl SrcmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCMODE_A { + pub const fn variant(&self) -> Srcmode { match self.bits { - false => SRCMODE_A::ABSOLUTE, - true => SRCMODE_A::RELATIVE, + false => Srcmode::Absolute, + true => Srcmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == SRCMODE_A::ABSOLUTE + *self == Srcmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == SRCMODE_A::RELATIVE + *self == Srcmode::Relative } } -#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] -pub type DSTMODE_R = crate::BitReader; #[doc = "Destination Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTMODE_A { +pub enum Dstmode { #[doc = "0: The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTMODE_A) -> Self { + fn from(variant: Dstmode) -> Self { variant as u8 != 0 } } -impl DSTMODE_R { +#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] +pub type DstmodeR = crate::BitReader; +impl DstmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTMODE_A { + pub const fn variant(&self) -> Dstmode { match self.bits { - false => DSTMODE_A::ABSOLUTE, - true => DSTMODE_A::RELATIVE, + false => Dstmode::Absolute, + true => Dstmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == DSTMODE_A::ABSOLUTE + *self == Dstmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == DSTMODE_A::RELATIVE + *self == Dstmode::Relative } } impl R { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] - pub fn structtype(&self) -> STRUCTTYPE_R { - STRUCTTYPE_R::new((self.bits & 3) as u8) + pub fn structtype(&self) -> StructtypeR { + StructtypeR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Structure DMA Transfer Request"] #[inline(always)] - pub fn structreq(&self) -> STRUCTREQ_R { - STRUCTREQ_R::new(((self.bits >> 3) & 1) != 0) + pub fn structreq(&self) -> StructreqR { + StructreqR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] - pub fn xfercnt(&self) -> XFERCNT_R { - XFERCNT_R::new(((self.bits >> 4) & 0x07ff) as u16) + pub fn xfercnt(&self) -> XfercntR { + XfercntR::new(((self.bits >> 4) & 0x07ff) as u16) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] - pub fn byteswap(&self) -> BYTESWAP_R { - BYTESWAP_R::new(((self.bits >> 15) & 1) != 0) + pub fn byteswap(&self) -> ByteswapR { + ByteswapR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] - pub fn blocksize(&self) -> BLOCKSIZE_R { - BLOCKSIZE_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn blocksize(&self) -> BlocksizeR { + BlocksizeR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] - pub fn doneien(&self) -> DONEIEN_R { - DONEIEN_R::new(((self.bits >> 20) & 1) != 0) + pub fn doneien(&self) -> DoneienR { + DoneienR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] - pub fn reqmode(&self) -> REQMODE_R { - REQMODE_R::new(((self.bits >> 21) & 1) != 0) + pub fn reqmode(&self) -> ReqmodeR { + ReqmodeR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] - pub fn decloopcnt(&self) -> DECLOOPCNT_R { - DECLOOPCNT_R::new(((self.bits >> 22) & 1) != 0) + pub fn decloopcnt(&self) -> DecloopcntR { + DecloopcntR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] - pub fn ignoresreq(&self) -> IGNORESREQ_R { - IGNORESREQ_R::new(((self.bits >> 23) & 1) != 0) + pub fn ignoresreq(&self) -> IgnoresreqR { + IgnoresreqR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] - pub fn srcinc(&self) -> SRCINC_R { - SRCINC_R::new(((self.bits >> 24) & 3) as u8) + pub fn srcinc(&self) -> SrcincR { + SrcincR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] - pub fn size(&self) -> SIZE_R { - SIZE_R::new(((self.bits >> 26) & 3) as u8) + pub fn size(&self) -> SizeR { + SizeR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] - pub fn dstinc(&self) -> DSTINC_R { - DSTINC_R::new(((self.bits >> 28) & 3) as u8) + pub fn dstinc(&self) -> DstincR { + DstincR::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bit 30 - Source Addressing Mode"] #[inline(always)] - pub fn srcmode(&self) -> SRCMODE_R { - SRCMODE_R::new(((self.bits >> 30) & 1) != 0) + pub fn srcmode(&self) -> SrcmodeR { + SrcmodeR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Destination Addressing Mode"] #[inline(always)] - pub fn dstmode(&self) -> DSTMODE_R { - DSTMODE_R::new(((self.bits >> 31) & 1) != 0) + pub fn dstmode(&self) -> DstmodeR { + DstmodeR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] #[must_use] - pub fn structtype(&mut self) -> STRUCTTYPE_W<0> { - STRUCTTYPE_W::new(self) + pub fn structtype(&mut self) -> StructtypeW { + StructtypeW::new(self, 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] #[must_use] - pub fn xfercnt(&mut self) -> XFERCNT_W<4> { - XFERCNT_W::new(self) + pub fn xfercnt(&mut self) -> XfercntW { + XfercntW::new(self, 4) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] #[must_use] - pub fn byteswap(&mut self) -> BYTESWAP_W<15> { - BYTESWAP_W::new(self) + pub fn byteswap(&mut self) -> ByteswapW { + ByteswapW::new(self, 15) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] #[must_use] - pub fn blocksize(&mut self) -> BLOCKSIZE_W<16> { - BLOCKSIZE_W::new(self) + pub fn blocksize(&mut self) -> BlocksizeW { + BlocksizeW::new(self, 16) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] #[must_use] - pub fn doneien(&mut self) -> DONEIEN_W<20> { - DONEIEN_W::new(self) + pub fn doneien(&mut self) -> DoneienW { + DoneienW::new(self, 20) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] #[must_use] - pub fn reqmode(&mut self) -> REQMODE_W<21> { - REQMODE_W::new(self) + pub fn reqmode(&mut self) -> ReqmodeW { + ReqmodeW::new(self, 21) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] #[must_use] - pub fn decloopcnt(&mut self) -> DECLOOPCNT_W<22> { - DECLOOPCNT_W::new(self) + pub fn decloopcnt(&mut self) -> DecloopcntW { + DecloopcntW::new(self, 22) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] #[must_use] - pub fn ignoresreq(&mut self) -> IGNORESREQ_W<23> { - IGNORESREQ_W::new(self) + pub fn ignoresreq(&mut self) -> IgnoresreqW { + IgnoresreqW::new(self, 23) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] #[must_use] - pub fn srcinc(&mut self) -> SRCINC_W<24> { - SRCINC_W::new(self) + pub fn srcinc(&mut self) -> SrcincW { + SrcincW::new(self, 24) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SIZE_W<26> { - SIZE_W::new(self) + pub fn size(&mut self) -> SizeW { + SizeW::new(self, 26) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] #[must_use] - pub fn dstinc(&mut self) -> DSTINC_W<28> { - DSTINC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstinc(&mut self) -> DstincW { + DstincW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch2_ctrl](index.html) module"] -pub struct CH2_CTRL_SPEC; -impl crate::RegisterSpec for CH2_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch2CtrlSpec; +impl crate::RegisterSpec for Ch2CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch2_ctrl::R](R) reader structure"] -impl crate::Readable for CH2_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch2_ctrl::W](W) writer structure"] -impl crate::Writable for CH2_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch2_ctrl::R`](R) reader structure"] +impl crate::Readable for Ch2CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ch2_ctrl::W`](W) writer structure"] +impl crate::Writable for Ch2CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH2_CTRL to value 0"] -impl crate::Resettable for CH2_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch2CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch2_dst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch2_dst.rs index fd571d1..1a134f2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch2_dst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch2_dst.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH2_DST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH2_DST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DSTADDR` reader - Destination Data Address"] -pub type DSTADDR_R = crate::FieldReader; +pub type DstaddrR = crate::FieldReader; #[doc = "Field `DSTADDR` writer - Destination Data Address"] -pub type DSTADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH2_DST_SPEC, u32, u32, 32, O>; +pub type DstaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] - pub fn dstaddr(&self) -> DSTADDR_R { - DSTADDR_R::new(self.bits) + pub fn dstaddr(&self) -> DstaddrR { + DstaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] #[must_use] - pub fn dstaddr(&mut self) -> DSTADDR_W<0> { - DSTADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstaddr(&mut self) -> DstaddrW { + DstaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch2_dst](index.html) module"] -pub struct CH2_DST_SPEC; -impl crate::RegisterSpec for CH2_DST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_dst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_dst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch2DstSpec; +impl crate::RegisterSpec for Ch2DstSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch2_dst::R](R) reader structure"] -impl crate::Readable for CH2_DST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch2_dst::W](W) writer structure"] -impl crate::Writable for CH2_DST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch2_dst::R`](R) reader structure"] +impl crate::Readable for Ch2DstSpec {} +#[doc = "`write(|w| ..)` method takes [`ch2_dst::W`](W) writer structure"] +impl crate::Writable for Ch2DstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH2_DST to value 0"] -impl crate::Resettable for CH2_DST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch2DstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch2_link.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch2_link.rs index ed7b3e8..746b2ae 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch2_link.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch2_link.rs @@ -1,136 +1,96 @@ #[doc = "Register `CH2_LINK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH2_LINK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] -pub type LINKMODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Link Structure Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LINKMODE_A { +pub enum Linkmode { #[doc = "0: The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LINKMODE_A) -> Self { + fn from(variant: Linkmode) -> Self { variant as u8 != 0 } } -impl LINKMODE_R { +#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] +pub type LinkmodeR = crate::BitReader; +impl LinkmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LINKMODE_A { + pub const fn variant(&self) -> Linkmode { match self.bits { - false => LINKMODE_A::ABSOLUTE, - true => LINKMODE_A::RELATIVE, + false => Linkmode::Absolute, + true => Linkmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == LINKMODE_A::ABSOLUTE + *self == Linkmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == LINKMODE_A::RELATIVE + *self == Linkmode::Relative } } #[doc = "Field `LINK` reader - Link Next Structure"] -pub type LINK_R = crate::BitReader; +pub type LinkR = crate::BitReader; #[doc = "Field `LINK` writer - Link Next Structure"] -pub type LINK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH2_LINK_SPEC, bool, O>; +pub type LinkW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LINKADDR` reader - Link Structure Address"] -pub type LINKADDR_R = crate::FieldReader; +pub type LinkaddrR = crate::FieldReader; #[doc = "Field `LINKADDR` writer - Link Structure Address"] -pub type LINKADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH2_LINK_SPEC, u32, u32, 30, O>; +pub type LinkaddrW<'a, REG> = crate::FieldWriter<'a, REG, 30, u32>; impl R { #[doc = "Bit 0 - Link Structure Addressing Mode"] #[inline(always)] - pub fn linkmode(&self) -> LINKMODE_R { - LINKMODE_R::new((self.bits & 1) != 0) + pub fn linkmode(&self) -> LinkmodeR { + LinkmodeR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] - pub fn link(&self) -> LINK_R { - LINK_R::new(((self.bits >> 1) & 1) != 0) + pub fn link(&self) -> LinkR { + LinkR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] - pub fn linkaddr(&self) -> LINKADDR_R { - LINKADDR_R::new((self.bits >> 2) & 0x3fff_ffff) + pub fn linkaddr(&self) -> LinkaddrR { + LinkaddrR::new((self.bits >> 2) & 0x3fff_ffff) } } impl W { #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] #[must_use] - pub fn link(&mut self) -> LINK_W<1> { - LINK_W::new(self) + pub fn link(&mut self) -> LinkW { + LinkW::new(self, 1) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] #[must_use] - pub fn linkaddr(&mut self) -> LINKADDR_W<2> { - LINKADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn linkaddr(&mut self) -> LinkaddrW { + LinkaddrW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch2_link](index.html) module"] -pub struct CH2_LINK_SPEC; -impl crate::RegisterSpec for CH2_LINK_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_link::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_link::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch2LinkSpec; +impl crate::RegisterSpec for Ch2LinkSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch2_link::R](R) reader structure"] -impl crate::Readable for CH2_LINK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch2_link::W](W) writer structure"] -impl crate::Writable for CH2_LINK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch2_link::R`](R) reader structure"] +impl crate::Readable for Ch2LinkSpec {} +#[doc = "`write(|w| ..)` method takes [`ch2_link::W`](W) writer structure"] +impl crate::Writable for Ch2LinkSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH2_LINK to value 0"] -impl crate::Resettable for CH2_LINK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch2LinkSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch2_loop.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch2_loop.rs index 2deb28b..863d828 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch2_loop.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch2_loop.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH2_LOOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH2_LOOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOOPCNT` reader - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_R = crate::FieldReader; +pub type LoopcntR = crate::FieldReader; #[doc = "Field `LOOPCNT` writer - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH2_LOOP_SPEC, u8, u8, 8, O>; +pub type LoopcntW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] - pub fn loopcnt(&self) -> LOOPCNT_R { - LOOPCNT_R::new((self.bits & 0xff) as u8) + pub fn loopcnt(&self) -> LoopcntR { + LoopcntR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] #[must_use] - pub fn loopcnt(&mut self) -> LOOPCNT_W<0> { - LOOPCNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn loopcnt(&mut self) -> LoopcntW { + LoopcntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch2_loop](index.html) module"] -pub struct CH2_LOOP_SPEC; -impl crate::RegisterSpec for CH2_LOOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_loop::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_loop::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch2LoopSpec; +impl crate::RegisterSpec for Ch2LoopSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch2_loop::R](R) reader structure"] -impl crate::Readable for CH2_LOOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch2_loop::W](W) writer structure"] -impl crate::Writable for CH2_LOOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch2_loop::R`](R) reader structure"] +impl crate::Readable for Ch2LoopSpec {} +#[doc = "`write(|w| ..)` method takes [`ch2_loop::W`](W) writer structure"] +impl crate::Writable for Ch2LoopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH2_LOOP to value 0"] -impl crate::Resettable for CH2_LOOP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch2LoopSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch2_src.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch2_src.rs index 282bf76..6da80df 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch2_src.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch2_src.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH2_SRC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH2_SRC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SRCADDR` reader - Source Data Address"] -pub type SRCADDR_R = crate::FieldReader; +pub type SrcaddrR = crate::FieldReader; #[doc = "Field `SRCADDR` writer - Source Data Address"] -pub type SRCADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH2_SRC_SPEC, u32, u32, 32, O>; +pub type SrcaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] - pub fn srcaddr(&self) -> SRCADDR_R { - SRCADDR_R::new(self.bits) + pub fn srcaddr(&self) -> SrcaddrR { + SrcaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] #[must_use] - pub fn srcaddr(&mut self) -> SRCADDR_W<0> { - SRCADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn srcaddr(&mut self) -> SrcaddrW { + SrcaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch2_src](index.html) module"] -pub struct CH2_SRC_SPEC; -impl crate::RegisterSpec for CH2_SRC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_src::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_src::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch2SrcSpec; +impl crate::RegisterSpec for Ch2SrcSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch2_src::R](R) reader structure"] -impl crate::Readable for CH2_SRC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch2_src::W](W) writer structure"] -impl crate::Writable for CH2_SRC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch2_src::R`](R) reader structure"] +impl crate::Readable for Ch2SrcSpec {} +#[doc = "`write(|w| ..)` method takes [`ch2_src::W`](W) writer structure"] +impl crate::Writable for Ch2SrcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH2_SRC to value 0"] -impl crate::Resettable for CH2_SRC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch2SrcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch3_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch3_cfg.rs index 1d082c4..835af8a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch3_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch3_cfg.rs @@ -1,277 +1,250 @@ #[doc = "Register `CH3_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH3_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] -pub type ARBSLOTS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Arbitration Slot Number Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ARBSLOTS_A { +pub enum Arbslots { #[doc = "0: One arbitration slot selected"] - ONE = 0, + One = 0, #[doc = "1: Two arbitration slots selected"] - TWO = 1, + Two = 1, #[doc = "2: Four arbitration slots selected"] - FOUR = 2, + Four = 2, #[doc = "3: Eight arbitration slots selected"] - EIGHT = 3, + Eight = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ARBSLOTS_A) -> Self { + fn from(variant: Arbslots) -> Self { variant as _ } } -impl ARBSLOTS_R { +impl crate::FieldSpec for Arbslots { + type Ux = u8; +} +impl crate::IsEnum for Arbslots {} +#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] +pub type ArbslotsR = crate::FieldReader; +impl ArbslotsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ARBSLOTS_A { + pub const fn variant(&self) -> Arbslots { match self.bits { - 0 => ARBSLOTS_A::ONE, - 1 => ARBSLOTS_A::TWO, - 2 => ARBSLOTS_A::FOUR, - 3 => ARBSLOTS_A::EIGHT, + 0 => Arbslots::One, + 1 => Arbslots::Two, + 2 => Arbslots::Four, + 3 => Arbslots::Eight, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "One arbitration slot selected"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == ARBSLOTS_A::ONE + *self == Arbslots::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Two arbitration slots selected"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == ARBSLOTS_A::TWO + *self == Arbslots::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Four arbitration slots selected"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == ARBSLOTS_A::FOUR + *self == Arbslots::Four } - #[doc = "Checks if the value of the field is `EIGHT`"] + #[doc = "Eight arbitration slots selected"] #[inline(always)] pub fn is_eight(&self) -> bool { - *self == ARBSLOTS_A::EIGHT + *self == Arbslots::Eight } } #[doc = "Field `ARBSLOTS` writer - Arbitration Slot Number Select"] -pub type ARBSLOTS_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH3_CFG_SPEC, u8, ARBSLOTS_A, 2, O>; -impl<'a, const O: u8> ARBSLOTS_W<'a, O> { +pub type ArbslotsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Arbslots, crate::Safe>; +impl<'a, REG> ArbslotsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One arbitration slot selected"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(ARBSLOTS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Arbslots::One) } #[doc = "Two arbitration slots selected"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(ARBSLOTS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Arbslots::Two) } #[doc = "Four arbitration slots selected"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(ARBSLOTS_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Arbslots::Four) } #[doc = "Eight arbitration slots selected"] #[inline(always)] - pub fn eight(self) -> &'a mut W { - self.variant(ARBSLOTS_A::EIGHT) + pub fn eight(self) -> &'a mut crate::W { + self.variant(Arbslots::Eight) } } -#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] -pub type SRCINCSIGN_R = crate::BitReader; #[doc = "Source Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCINCSIGN_A { +pub enum Srcincsign { #[doc = "0: Increment source address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement source address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCINCSIGN_A) -> Self { + fn from(variant: Srcincsign) -> Self { variant as u8 != 0 } } -impl SRCINCSIGN_R { +#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] +pub type SrcincsignR = crate::BitReader; +impl SrcincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINCSIGN_A { + pub const fn variant(&self) -> Srcincsign { match self.bits { - false => SRCINCSIGN_A::POSITIVE, - true => SRCINCSIGN_A::NEGATIVE, + false => Srcincsign::Positive, + true => Srcincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment source address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == SRCINCSIGN_A::POSITIVE + *self == Srcincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement source address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == SRCINCSIGN_A::NEGATIVE + *self == Srcincsign::Negative } } #[doc = "Field `SRCINCSIGN` writer - Source Address Increment Sign"] -pub type SRCINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH3_CFG_SPEC, SRCINCSIGN_A, O>; -impl<'a, const O: u8> SRCINCSIGN_W<'a, O> { +pub type SrcincsignW<'a, REG> = crate::BitWriter<'a, REG, Srcincsign>; +impl<'a, REG> SrcincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment source address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Srcincsign::Positive) } #[doc = "Decrement source address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Srcincsign::Negative) } } -#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] -pub type DSTINCSIGN_R = crate::BitReader; #[doc = "Destination Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTINCSIGN_A { +pub enum Dstincsign { #[doc = "0: Increment destination address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement destination address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTINCSIGN_A) -> Self { + fn from(variant: Dstincsign) -> Self { variant as u8 != 0 } } -impl DSTINCSIGN_R { +#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] +pub type DstincsignR = crate::BitReader; +impl DstincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINCSIGN_A { + pub const fn variant(&self) -> Dstincsign { match self.bits { - false => DSTINCSIGN_A::POSITIVE, - true => DSTINCSIGN_A::NEGATIVE, + false => Dstincsign::Positive, + true => Dstincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment destination address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == DSTINCSIGN_A::POSITIVE + *self == Dstincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement destination address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == DSTINCSIGN_A::NEGATIVE + *self == Dstincsign::Negative } } #[doc = "Field `DSTINCSIGN` writer - Destination Address Increment Sign"] -pub type DSTINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH3_CFG_SPEC, DSTINCSIGN_A, O>; -impl<'a, const O: u8> DSTINCSIGN_W<'a, O> { +pub type DstincsignW<'a, REG> = crate::BitWriter<'a, REG, Dstincsign>; +impl<'a, REG> DstincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment destination address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Dstincsign::Positive) } #[doc = "Decrement destination address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Dstincsign::Negative) } } impl R { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] - pub fn arbslots(&self) -> ARBSLOTS_R { - ARBSLOTS_R::new(((self.bits >> 16) & 3) as u8) + pub fn arbslots(&self) -> ArbslotsR { + ArbslotsR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] - pub fn srcincsign(&self) -> SRCINCSIGN_R { - SRCINCSIGN_R::new(((self.bits >> 20) & 1) != 0) + pub fn srcincsign(&self) -> SrcincsignR { + SrcincsignR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] - pub fn dstincsign(&self) -> DSTINCSIGN_R { - DSTINCSIGN_R::new(((self.bits >> 21) & 1) != 0) + pub fn dstincsign(&self) -> DstincsignR { + DstincsignR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] #[must_use] - pub fn arbslots(&mut self) -> ARBSLOTS_W<16> { - ARBSLOTS_W::new(self) + pub fn arbslots(&mut self) -> ArbslotsW { + ArbslotsW::new(self, 16) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] #[must_use] - pub fn srcincsign(&mut self) -> SRCINCSIGN_W<20> { - SRCINCSIGN_W::new(self) + pub fn srcincsign(&mut self) -> SrcincsignW { + SrcincsignW::new(self, 20) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] #[must_use] - pub fn dstincsign(&mut self) -> DSTINCSIGN_W<21> { - DSTINCSIGN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstincsign(&mut self) -> DstincsignW { + DstincsignW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch3_cfg](index.html) module"] -pub struct CH3_CFG_SPEC; -impl crate::RegisterSpec for CH3_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch3CfgSpec; +impl crate::RegisterSpec for Ch3CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch3_cfg::R](R) reader structure"] -impl crate::Readable for CH3_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch3_cfg::W](W) writer structure"] -impl crate::Writable for CH3_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch3_cfg::R`](R) reader structure"] +impl crate::Readable for Ch3CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`ch3_cfg::W`](W) writer structure"] +impl crate::Writable for Ch3CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH3_CFG to value 0"] -impl crate::Resettable for CH3_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch3CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch3_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch3_ctrl.rs index a3c8b19..073b1d4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch3_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch3_ctrl.rs @@ -1,843 +1,842 @@ #[doc = "Register `CH3_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH3_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] -pub type STRUCTTYPE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DMA Structure Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STRUCTTYPE_A { +pub enum Structtype { #[doc = "0: DMA transfer structure type selected."] - TRANSFER = 0, + Transfer = 0, #[doc = "1: Synchronization structure type selected."] - SYNCHRONIZE = 1, + Synchronize = 1, #[doc = "2: Write immediate value structure type selected."] - WRITE = 2, + Write = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STRUCTTYPE_A) -> Self { + fn from(variant: Structtype) -> Self { variant as _ } } -impl STRUCTTYPE_R { +impl crate::FieldSpec for Structtype { + type Ux = u8; +} +impl crate::IsEnum for Structtype {} +#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] +pub type StructtypeR = crate::FieldReader; +impl StructtypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(STRUCTTYPE_A::TRANSFER), - 1 => Some(STRUCTTYPE_A::SYNCHRONIZE), - 2 => Some(STRUCTTYPE_A::WRITE), + 0 => Some(Structtype::Transfer), + 1 => Some(Structtype::Synchronize), + 2 => Some(Structtype::Write), _ => None, } } - #[doc = "Checks if the value of the field is `TRANSFER`"] + #[doc = "DMA transfer structure type selected."] #[inline(always)] pub fn is_transfer(&self) -> bool { - *self == STRUCTTYPE_A::TRANSFER + *self == Structtype::Transfer } - #[doc = "Checks if the value of the field is `SYNCHRONIZE`"] + #[doc = "Synchronization structure type selected."] #[inline(always)] pub fn is_synchronize(&self) -> bool { - *self == STRUCTTYPE_A::SYNCHRONIZE + *self == Structtype::Synchronize } - #[doc = "Checks if the value of the field is `WRITE`"] + #[doc = "Write immediate value structure type selected."] #[inline(always)] pub fn is_write(&self) -> bool { - *self == STRUCTTYPE_A::WRITE + *self == Structtype::Write } } #[doc = "Field `STRUCTTYPE` writer - DMA Structure Type"] -pub type STRUCTTYPE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH3_CTRL_SPEC, u8, STRUCTTYPE_A, 2, O>; -impl<'a, const O: u8> STRUCTTYPE_W<'a, O> { +pub type StructtypeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Structtype>; +impl<'a, REG> StructtypeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "DMA transfer structure type selected."] #[inline(always)] - pub fn transfer(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::TRANSFER) + pub fn transfer(self) -> &'a mut crate::W { + self.variant(Structtype::Transfer) } #[doc = "Synchronization structure type selected."] #[inline(always)] - pub fn synchronize(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::SYNCHRONIZE) + pub fn synchronize(self) -> &'a mut crate::W { + self.variant(Structtype::Synchronize) } #[doc = "Write immediate value structure type selected."] #[inline(always)] - pub fn write(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::WRITE) + pub fn write(self) -> &'a mut crate::W { + self.variant(Structtype::Write) } } #[doc = "Field `STRUCTREQ` reader - Structure DMA Transfer Request"] -pub type STRUCTREQ_R = crate::BitReader; +pub type StructreqR = crate::BitReader; #[doc = "Field `XFERCNT` reader - DMA Unit Data Transfer Count"] -pub type XFERCNT_R = crate::FieldReader; +pub type XfercntR = crate::FieldReader; #[doc = "Field `XFERCNT` writer - DMA Unit Data Transfer Count"] -pub type XFERCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH3_CTRL_SPEC, u16, u16, 11, O>; +pub type XfercntW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `BYTESWAP` reader - Endian Byte Swap"] -pub type BYTESWAP_R = crate::BitReader; +pub type ByteswapR = crate::BitReader; #[doc = "Field `BYTESWAP` writer - Endian Byte Swap"] -pub type BYTESWAP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH3_CTRL_SPEC, bool, O>; -#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] -pub type BLOCKSIZE_R = crate::FieldReader; +pub type ByteswapW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Block Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BLOCKSIZE_A { +pub enum Blocksize { #[doc = "0: One unit transfer per arbitration"] - UNIT1 = 0, + Unit1 = 0, #[doc = "1: Two unit transfers per arbitration"] - UNIT2 = 1, + Unit2 = 1, #[doc = "2: Three unit transfers per arbitration"] - UNIT3 = 2, + Unit3 = 2, #[doc = "3: Four unit transfers per arbitration"] - UNIT4 = 3, + Unit4 = 3, #[doc = "4: Six unit transfers per arbitration"] - UNIT6 = 4, + Unit6 = 4, #[doc = "5: Eight unit transfers per arbitration"] - UNIT8 = 5, + Unit8 = 5, #[doc = "7: Sixteen unit transfers per arbitration"] - UNIT16 = 7, + Unit16 = 7, #[doc = "9: 32 unit transfers per arbitration"] - UNIT32 = 9, + Unit32 = 9, #[doc = "10: 64 unit transfers per arbitration"] - UNIT64 = 10, + Unit64 = 10, #[doc = "11: 128 unit transfers per arbitration"] - UNIT128 = 11, + Unit128 = 11, #[doc = "12: 256 unit transfers per arbitration"] - UNIT256 = 12, + Unit256 = 12, #[doc = "13: 512 unit transfers per arbitration"] - UNIT512 = 13, + Unit512 = 13, #[doc = "14: 1024 unit transfers per arbitration"] - UNIT1024 = 14, + Unit1024 = 14, #[doc = "15: Transfer all units as specified by the XFRCNT field"] - ALL = 15, + All = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BLOCKSIZE_A) -> Self { + fn from(variant: Blocksize) -> Self { variant as _ } } -impl BLOCKSIZE_R { +impl crate::FieldSpec for Blocksize { + type Ux = u8; +} +impl crate::IsEnum for Blocksize {} +#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] +pub type BlocksizeR = crate::FieldReader; +impl BlocksizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BLOCKSIZE_A::UNIT1), - 1 => Some(BLOCKSIZE_A::UNIT2), - 2 => Some(BLOCKSIZE_A::UNIT3), - 3 => Some(BLOCKSIZE_A::UNIT4), - 4 => Some(BLOCKSIZE_A::UNIT6), - 5 => Some(BLOCKSIZE_A::UNIT8), - 7 => Some(BLOCKSIZE_A::UNIT16), - 9 => Some(BLOCKSIZE_A::UNIT32), - 10 => Some(BLOCKSIZE_A::UNIT64), - 11 => Some(BLOCKSIZE_A::UNIT128), - 12 => Some(BLOCKSIZE_A::UNIT256), - 13 => Some(BLOCKSIZE_A::UNIT512), - 14 => Some(BLOCKSIZE_A::UNIT1024), - 15 => Some(BLOCKSIZE_A::ALL), + 0 => Some(Blocksize::Unit1), + 1 => Some(Blocksize::Unit2), + 2 => Some(Blocksize::Unit3), + 3 => Some(Blocksize::Unit4), + 4 => Some(Blocksize::Unit6), + 5 => Some(Blocksize::Unit8), + 7 => Some(Blocksize::Unit16), + 9 => Some(Blocksize::Unit32), + 10 => Some(Blocksize::Unit64), + 11 => Some(Blocksize::Unit128), + 12 => Some(Blocksize::Unit256), + 13 => Some(Blocksize::Unit512), + 14 => Some(Blocksize::Unit1024), + 15 => Some(Blocksize::All), _ => None, } } - #[doc = "Checks if the value of the field is `UNIT1`"] + #[doc = "One unit transfer per arbitration"] #[inline(always)] pub fn is_unit1(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1 + *self == Blocksize::Unit1 } - #[doc = "Checks if the value of the field is `UNIT2`"] + #[doc = "Two unit transfers per arbitration"] #[inline(always)] pub fn is_unit2(&self) -> bool { - *self == BLOCKSIZE_A::UNIT2 + *self == Blocksize::Unit2 } - #[doc = "Checks if the value of the field is `UNIT3`"] + #[doc = "Three unit transfers per arbitration"] #[inline(always)] pub fn is_unit3(&self) -> bool { - *self == BLOCKSIZE_A::UNIT3 + *self == Blocksize::Unit3 } - #[doc = "Checks if the value of the field is `UNIT4`"] + #[doc = "Four unit transfers per arbitration"] #[inline(always)] pub fn is_unit4(&self) -> bool { - *self == BLOCKSIZE_A::UNIT4 + *self == Blocksize::Unit4 } - #[doc = "Checks if the value of the field is `UNIT6`"] + #[doc = "Six unit transfers per arbitration"] #[inline(always)] pub fn is_unit6(&self) -> bool { - *self == BLOCKSIZE_A::UNIT6 + *self == Blocksize::Unit6 } - #[doc = "Checks if the value of the field is `UNIT8`"] + #[doc = "Eight unit transfers per arbitration"] #[inline(always)] pub fn is_unit8(&self) -> bool { - *self == BLOCKSIZE_A::UNIT8 + *self == Blocksize::Unit8 } - #[doc = "Checks if the value of the field is `UNIT16`"] + #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] pub fn is_unit16(&self) -> bool { - *self == BLOCKSIZE_A::UNIT16 + *self == Blocksize::Unit16 } - #[doc = "Checks if the value of the field is `UNIT32`"] + #[doc = "32 unit transfers per arbitration"] #[inline(always)] pub fn is_unit32(&self) -> bool { - *self == BLOCKSIZE_A::UNIT32 + *self == Blocksize::Unit32 } - #[doc = "Checks if the value of the field is `UNIT64`"] + #[doc = "64 unit transfers per arbitration"] #[inline(always)] pub fn is_unit64(&self) -> bool { - *self == BLOCKSIZE_A::UNIT64 + *self == Blocksize::Unit64 } - #[doc = "Checks if the value of the field is `UNIT128`"] + #[doc = "128 unit transfers per arbitration"] #[inline(always)] pub fn is_unit128(&self) -> bool { - *self == BLOCKSIZE_A::UNIT128 + *self == Blocksize::Unit128 } - #[doc = "Checks if the value of the field is `UNIT256`"] + #[doc = "256 unit transfers per arbitration"] #[inline(always)] pub fn is_unit256(&self) -> bool { - *self == BLOCKSIZE_A::UNIT256 + *self == Blocksize::Unit256 } - #[doc = "Checks if the value of the field is `UNIT512`"] + #[doc = "512 unit transfers per arbitration"] #[inline(always)] pub fn is_unit512(&self) -> bool { - *self == BLOCKSIZE_A::UNIT512 + *self == Blocksize::Unit512 } - #[doc = "Checks if the value of the field is `UNIT1024`"] + #[doc = "1024 unit transfers per arbitration"] #[inline(always)] pub fn is_unit1024(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1024 + *self == Blocksize::Unit1024 } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] pub fn is_all(&self) -> bool { - *self == BLOCKSIZE_A::ALL + *self == Blocksize::All } } #[doc = "Field `BLOCKSIZE` writer - Block Transfer Size"] -pub type BLOCKSIZE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH3_CTRL_SPEC, u8, BLOCKSIZE_A, 4, O>; -impl<'a, const O: u8> BLOCKSIZE_W<'a, O> { +pub type BlocksizeW<'a, REG> = crate::FieldWriter<'a, REG, 4, Blocksize>; +impl<'a, REG> BlocksizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One unit transfer per arbitration"] #[inline(always)] - pub fn unit1(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1) + pub fn unit1(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1) } #[doc = "Two unit transfers per arbitration"] #[inline(always)] - pub fn unit2(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT2) + pub fn unit2(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit2) } #[doc = "Three unit transfers per arbitration"] #[inline(always)] - pub fn unit3(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT3) + pub fn unit3(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit3) } #[doc = "Four unit transfers per arbitration"] #[inline(always)] - pub fn unit4(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT4) + pub fn unit4(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit4) } #[doc = "Six unit transfers per arbitration"] #[inline(always)] - pub fn unit6(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT6) + pub fn unit6(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit6) } #[doc = "Eight unit transfers per arbitration"] #[inline(always)] - pub fn unit8(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT8) + pub fn unit8(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit8) } #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] - pub fn unit16(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT16) + pub fn unit16(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit16) } #[doc = "32 unit transfers per arbitration"] #[inline(always)] - pub fn unit32(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT32) + pub fn unit32(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit32) } #[doc = "64 unit transfers per arbitration"] #[inline(always)] - pub fn unit64(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT64) + pub fn unit64(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit64) } #[doc = "128 unit transfers per arbitration"] #[inline(always)] - pub fn unit128(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT128) + pub fn unit128(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit128) } #[doc = "256 unit transfers per arbitration"] #[inline(always)] - pub fn unit256(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT256) + pub fn unit256(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit256) } #[doc = "512 unit transfers per arbitration"] #[inline(always)] - pub fn unit512(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT512) + pub fn unit512(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit512) } #[doc = "1024 unit transfers per arbitration"] #[inline(always)] - pub fn unit1024(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1024) + pub fn unit1024(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1024) } #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Blocksize::All) } } #[doc = "Field `DONEIEN` reader - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_R = crate::BitReader; +pub type DoneienR = crate::BitReader; #[doc = "Field `DONEIEN` writer - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH3_CTRL_SPEC, bool, O>; -#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] -pub type REQMODE_R = crate::BitReader; +pub type DoneienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "DMA Request Transfer Mode Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REQMODE_A { +pub enum Reqmode { #[doc = "0: The LDMA transfers one BLOCKSIZE per transfer request."] - BLOCK = 0, + Block = 0, #[doc = "1: One transfer request transfers all units as defined by the XFRCNT field."] - ALL = 1, + All = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REQMODE_A) -> Self { + fn from(variant: Reqmode) -> Self { variant as u8 != 0 } } -impl REQMODE_R { +#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] +pub type ReqmodeR = crate::BitReader; +impl ReqmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REQMODE_A { + pub const fn variant(&self) -> Reqmode { match self.bits { - false => REQMODE_A::BLOCK, - true => REQMODE_A::ALL, + false => Reqmode::Block, + true => Reqmode::All, } } - #[doc = "Checks if the value of the field is `BLOCK`"] + #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] pub fn is_block(&self) -> bool { - *self == REQMODE_A::BLOCK + *self == Reqmode::Block } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] pub fn is_all(&self) -> bool { - *self == REQMODE_A::ALL + *self == Reqmode::All } } #[doc = "Field `REQMODE` writer - DMA Request Transfer Mode Select"] -pub type REQMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH3_CTRL_SPEC, REQMODE_A, O>; -impl<'a, const O: u8> REQMODE_W<'a, O> { +pub type ReqmodeW<'a, REG> = crate::BitWriter<'a, REG, Reqmode>; +impl<'a, REG> ReqmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] - pub fn block(self) -> &'a mut W { - self.variant(REQMODE_A::BLOCK) + pub fn block(self) -> &'a mut crate::W { + self.variant(Reqmode::Block) } #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(REQMODE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Reqmode::All) } } #[doc = "Field `DECLOOPCNT` reader - Decrement Loop Count"] -pub type DECLOOPCNT_R = crate::BitReader; +pub type DecloopcntR = crate::BitReader; #[doc = "Field `DECLOOPCNT` writer - Decrement Loop Count"] -pub type DECLOOPCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH3_CTRL_SPEC, bool, O>; +pub type DecloopcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IGNORESREQ` reader - Ignore Sreq"] -pub type IGNORESREQ_R = crate::BitReader; +pub type IgnoresreqR = crate::BitReader; #[doc = "Field `IGNORESREQ` writer - Ignore Sreq"] -pub type IGNORESREQ_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH3_CTRL_SPEC, bool, O>; -#[doc = "Field `SRCINC` reader - Source Address Increment Size"] -pub type SRCINC_R = crate::FieldReader; +pub type IgnoresreqW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SRCINC_A { +pub enum Srcinc { #[doc = "0: Increment source address by one unit data size after each read"] - ONE = 0, + One = 0, #[doc = "1: Increment source address by two unit data sizes after each read"] - TWO = 1, + Two = 1, #[doc = "2: Increment source address by four unit data sizes after each read"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SRCINC_A) -> Self { + fn from(variant: Srcinc) -> Self { variant as _ } } -impl SRCINC_R { +impl crate::FieldSpec for Srcinc { + type Ux = u8; +} +impl crate::IsEnum for Srcinc {} +#[doc = "Field `SRCINC` reader - Source Address Increment Size"] +pub type SrcincR = crate::FieldReader; +impl SrcincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINC_A { + pub const fn variant(&self) -> Srcinc { match self.bits { - 0 => SRCINC_A::ONE, - 1 => SRCINC_A::TWO, - 2 => SRCINC_A::FOUR, - 3 => SRCINC_A::NONE, + 0 => Srcinc::One, + 1 => Srcinc::Two, + 2 => Srcinc::Four, + 3 => Srcinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == SRCINC_A::ONE + *self == Srcinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == SRCINC_A::TWO + *self == Srcinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == SRCINC_A::FOUR + *self == Srcinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SRCINC_A::NONE + *self == Srcinc::None } } #[doc = "Field `SRCINC` writer - Source Address Increment Size"] -pub type SRCINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH3_CTRL_SPEC, u8, SRCINC_A, 2, O>; -impl<'a, const O: u8> SRCINC_W<'a, O> { +pub type SrcincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Srcinc, crate::Safe>; +impl<'a, REG> SrcincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(SRCINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Srcinc::One) } #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(SRCINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Srcinc::Two) } #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(SRCINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Srcinc::Four) } #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SRCINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Srcinc::None) } } -#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] -pub type SIZE_R = crate::FieldReader; #[doc = "Unit Data Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIZE_A { +pub enum Size { #[doc = "0: Each unit transfer is a byte"] - BYTE = 0, + Byte = 0, #[doc = "1: Each unit transfer is a half-word"] - HALFWORD = 1, + Halfword = 1, #[doc = "2: Each unit transfer is a word"] - WORD = 2, + Word = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIZE_A) -> Self { + fn from(variant: Size) -> Self { variant as _ } } -impl SIZE_R { +impl crate::FieldSpec for Size { + type Ux = u8; +} +impl crate::IsEnum for Size {} +#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] +pub type SizeR = crate::FieldReader; +impl SizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIZE_A::BYTE), - 1 => Some(SIZE_A::HALFWORD), - 2 => Some(SIZE_A::WORD), + 0 => Some(Size::Byte), + 1 => Some(Size::Halfword), + 2 => Some(Size::Word), _ => None, } } - #[doc = "Checks if the value of the field is `BYTE`"] + #[doc = "Each unit transfer is a byte"] #[inline(always)] pub fn is_byte(&self) -> bool { - *self == SIZE_A::BYTE + *self == Size::Byte } - #[doc = "Checks if the value of the field is `HALFWORD`"] + #[doc = "Each unit transfer is a half-word"] #[inline(always)] pub fn is_halfword(&self) -> bool { - *self == SIZE_A::HALFWORD + *self == Size::Halfword } - #[doc = "Checks if the value of the field is `WORD`"] + #[doc = "Each unit transfer is a word"] #[inline(always)] pub fn is_word(&self) -> bool { - *self == SIZE_A::WORD + *self == Size::Word } } #[doc = "Field `SIZE` writer - Unit Data Transfer Size"] -pub type SIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH3_CTRL_SPEC, u8, SIZE_A, 2, O>; -impl<'a, const O: u8> SIZE_W<'a, O> { +pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Size>; +impl<'a, REG> SizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Each unit transfer is a byte"] #[inline(always)] - pub fn byte(self) -> &'a mut W { - self.variant(SIZE_A::BYTE) + pub fn byte(self) -> &'a mut crate::W { + self.variant(Size::Byte) } #[doc = "Each unit transfer is a half-word"] #[inline(always)] - pub fn halfword(self) -> &'a mut W { - self.variant(SIZE_A::HALFWORD) + pub fn halfword(self) -> &'a mut crate::W { + self.variant(Size::Halfword) } #[doc = "Each unit transfer is a word"] #[inline(always)] - pub fn word(self) -> &'a mut W { - self.variant(SIZE_A::WORD) + pub fn word(self) -> &'a mut crate::W { + self.variant(Size::Word) } } -#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] -pub type DSTINC_R = crate::FieldReader; #[doc = "Destination Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DSTINC_A { +pub enum Dstinc { #[doc = "0: Increment destination address by one unit data size after each write"] - ONE = 0, + One = 0, #[doc = "1: Increment destination address by two unit data sizes after each write"] - TWO = 1, + Two = 1, #[doc = "2: Increment destination address by four unit data sizes after each write"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DSTINC_A) -> Self { + fn from(variant: Dstinc) -> Self { variant as _ } } -impl DSTINC_R { +impl crate::FieldSpec for Dstinc { + type Ux = u8; +} +impl crate::IsEnum for Dstinc {} +#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] +pub type DstincR = crate::FieldReader; +impl DstincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINC_A { + pub const fn variant(&self) -> Dstinc { match self.bits { - 0 => DSTINC_A::ONE, - 1 => DSTINC_A::TWO, - 2 => DSTINC_A::FOUR, - 3 => DSTINC_A::NONE, + 0 => Dstinc::One, + 1 => Dstinc::Two, + 2 => Dstinc::Four, + 3 => Dstinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == DSTINC_A::ONE + *self == Dstinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == DSTINC_A::TWO + *self == Dstinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == DSTINC_A::FOUR + *self == Dstinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == DSTINC_A::NONE + *self == Dstinc::None } } #[doc = "Field `DSTINC` writer - Destination Address Increment Size"] -pub type DSTINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH3_CTRL_SPEC, u8, DSTINC_A, 2, O>; -impl<'a, const O: u8> DSTINC_W<'a, O> { +pub type DstincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dstinc, crate::Safe>; +impl<'a, REG> DstincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(DSTINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Dstinc::One) } #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(DSTINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Dstinc::Two) } #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(DSTINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Dstinc::Four) } #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(DSTINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Dstinc::None) } } -#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] -pub type SRCMODE_R = crate::BitReader; #[doc = "Source Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCMODE_A { +pub enum Srcmode { #[doc = "0: The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCMODE_A) -> Self { + fn from(variant: Srcmode) -> Self { variant as u8 != 0 } } -impl SRCMODE_R { +#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] +pub type SrcmodeR = crate::BitReader; +impl SrcmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCMODE_A { + pub const fn variant(&self) -> Srcmode { match self.bits { - false => SRCMODE_A::ABSOLUTE, - true => SRCMODE_A::RELATIVE, + false => Srcmode::Absolute, + true => Srcmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == SRCMODE_A::ABSOLUTE + *self == Srcmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == SRCMODE_A::RELATIVE + *self == Srcmode::Relative } } -#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] -pub type DSTMODE_R = crate::BitReader; #[doc = "Destination Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTMODE_A { +pub enum Dstmode { #[doc = "0: The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTMODE_A) -> Self { + fn from(variant: Dstmode) -> Self { variant as u8 != 0 } } -impl DSTMODE_R { +#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] +pub type DstmodeR = crate::BitReader; +impl DstmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTMODE_A { + pub const fn variant(&self) -> Dstmode { match self.bits { - false => DSTMODE_A::ABSOLUTE, - true => DSTMODE_A::RELATIVE, + false => Dstmode::Absolute, + true => Dstmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == DSTMODE_A::ABSOLUTE + *self == Dstmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == DSTMODE_A::RELATIVE + *self == Dstmode::Relative } } impl R { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] - pub fn structtype(&self) -> STRUCTTYPE_R { - STRUCTTYPE_R::new((self.bits & 3) as u8) + pub fn structtype(&self) -> StructtypeR { + StructtypeR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Structure DMA Transfer Request"] #[inline(always)] - pub fn structreq(&self) -> STRUCTREQ_R { - STRUCTREQ_R::new(((self.bits >> 3) & 1) != 0) + pub fn structreq(&self) -> StructreqR { + StructreqR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] - pub fn xfercnt(&self) -> XFERCNT_R { - XFERCNT_R::new(((self.bits >> 4) & 0x07ff) as u16) + pub fn xfercnt(&self) -> XfercntR { + XfercntR::new(((self.bits >> 4) & 0x07ff) as u16) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] - pub fn byteswap(&self) -> BYTESWAP_R { - BYTESWAP_R::new(((self.bits >> 15) & 1) != 0) + pub fn byteswap(&self) -> ByteswapR { + ByteswapR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] - pub fn blocksize(&self) -> BLOCKSIZE_R { - BLOCKSIZE_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn blocksize(&self) -> BlocksizeR { + BlocksizeR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] - pub fn doneien(&self) -> DONEIEN_R { - DONEIEN_R::new(((self.bits >> 20) & 1) != 0) + pub fn doneien(&self) -> DoneienR { + DoneienR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] - pub fn reqmode(&self) -> REQMODE_R { - REQMODE_R::new(((self.bits >> 21) & 1) != 0) + pub fn reqmode(&self) -> ReqmodeR { + ReqmodeR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] - pub fn decloopcnt(&self) -> DECLOOPCNT_R { - DECLOOPCNT_R::new(((self.bits >> 22) & 1) != 0) + pub fn decloopcnt(&self) -> DecloopcntR { + DecloopcntR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] - pub fn ignoresreq(&self) -> IGNORESREQ_R { - IGNORESREQ_R::new(((self.bits >> 23) & 1) != 0) + pub fn ignoresreq(&self) -> IgnoresreqR { + IgnoresreqR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] - pub fn srcinc(&self) -> SRCINC_R { - SRCINC_R::new(((self.bits >> 24) & 3) as u8) + pub fn srcinc(&self) -> SrcincR { + SrcincR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] - pub fn size(&self) -> SIZE_R { - SIZE_R::new(((self.bits >> 26) & 3) as u8) + pub fn size(&self) -> SizeR { + SizeR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] - pub fn dstinc(&self) -> DSTINC_R { - DSTINC_R::new(((self.bits >> 28) & 3) as u8) + pub fn dstinc(&self) -> DstincR { + DstincR::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bit 30 - Source Addressing Mode"] #[inline(always)] - pub fn srcmode(&self) -> SRCMODE_R { - SRCMODE_R::new(((self.bits >> 30) & 1) != 0) + pub fn srcmode(&self) -> SrcmodeR { + SrcmodeR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Destination Addressing Mode"] #[inline(always)] - pub fn dstmode(&self) -> DSTMODE_R { - DSTMODE_R::new(((self.bits >> 31) & 1) != 0) + pub fn dstmode(&self) -> DstmodeR { + DstmodeR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] #[must_use] - pub fn structtype(&mut self) -> STRUCTTYPE_W<0> { - STRUCTTYPE_W::new(self) + pub fn structtype(&mut self) -> StructtypeW { + StructtypeW::new(self, 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] #[must_use] - pub fn xfercnt(&mut self) -> XFERCNT_W<4> { - XFERCNT_W::new(self) + pub fn xfercnt(&mut self) -> XfercntW { + XfercntW::new(self, 4) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] #[must_use] - pub fn byteswap(&mut self) -> BYTESWAP_W<15> { - BYTESWAP_W::new(self) + pub fn byteswap(&mut self) -> ByteswapW { + ByteswapW::new(self, 15) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] #[must_use] - pub fn blocksize(&mut self) -> BLOCKSIZE_W<16> { - BLOCKSIZE_W::new(self) + pub fn blocksize(&mut self) -> BlocksizeW { + BlocksizeW::new(self, 16) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] #[must_use] - pub fn doneien(&mut self) -> DONEIEN_W<20> { - DONEIEN_W::new(self) + pub fn doneien(&mut self) -> DoneienW { + DoneienW::new(self, 20) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] #[must_use] - pub fn reqmode(&mut self) -> REQMODE_W<21> { - REQMODE_W::new(self) + pub fn reqmode(&mut self) -> ReqmodeW { + ReqmodeW::new(self, 21) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] #[must_use] - pub fn decloopcnt(&mut self) -> DECLOOPCNT_W<22> { - DECLOOPCNT_W::new(self) + pub fn decloopcnt(&mut self) -> DecloopcntW { + DecloopcntW::new(self, 22) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] #[must_use] - pub fn ignoresreq(&mut self) -> IGNORESREQ_W<23> { - IGNORESREQ_W::new(self) + pub fn ignoresreq(&mut self) -> IgnoresreqW { + IgnoresreqW::new(self, 23) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] #[must_use] - pub fn srcinc(&mut self) -> SRCINC_W<24> { - SRCINC_W::new(self) + pub fn srcinc(&mut self) -> SrcincW { + SrcincW::new(self, 24) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SIZE_W<26> { - SIZE_W::new(self) + pub fn size(&mut self) -> SizeW { + SizeW::new(self, 26) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] #[must_use] - pub fn dstinc(&mut self) -> DSTINC_W<28> { - DSTINC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstinc(&mut self) -> DstincW { + DstincW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch3_ctrl](index.html) module"] -pub struct CH3_CTRL_SPEC; -impl crate::RegisterSpec for CH3_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch3CtrlSpec; +impl crate::RegisterSpec for Ch3CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch3_ctrl::R](R) reader structure"] -impl crate::Readable for CH3_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch3_ctrl::W](W) writer structure"] -impl crate::Writable for CH3_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch3_ctrl::R`](R) reader structure"] +impl crate::Readable for Ch3CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ch3_ctrl::W`](W) writer structure"] +impl crate::Writable for Ch3CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH3_CTRL to value 0"] -impl crate::Resettable for CH3_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch3CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch3_dst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch3_dst.rs index daa0721..34e006a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch3_dst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch3_dst.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH3_DST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH3_DST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DSTADDR` reader - Destination Data Address"] -pub type DSTADDR_R = crate::FieldReader; +pub type DstaddrR = crate::FieldReader; #[doc = "Field `DSTADDR` writer - Destination Data Address"] -pub type DSTADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH3_DST_SPEC, u32, u32, 32, O>; +pub type DstaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] - pub fn dstaddr(&self) -> DSTADDR_R { - DSTADDR_R::new(self.bits) + pub fn dstaddr(&self) -> DstaddrR { + DstaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] #[must_use] - pub fn dstaddr(&mut self) -> DSTADDR_W<0> { - DSTADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstaddr(&mut self) -> DstaddrW { + DstaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch3_dst](index.html) module"] -pub struct CH3_DST_SPEC; -impl crate::RegisterSpec for CH3_DST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_dst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_dst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch3DstSpec; +impl crate::RegisterSpec for Ch3DstSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch3_dst::R](R) reader structure"] -impl crate::Readable for CH3_DST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch3_dst::W](W) writer structure"] -impl crate::Writable for CH3_DST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch3_dst::R`](R) reader structure"] +impl crate::Readable for Ch3DstSpec {} +#[doc = "`write(|w| ..)` method takes [`ch3_dst::W`](W) writer structure"] +impl crate::Writable for Ch3DstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH3_DST to value 0"] -impl crate::Resettable for CH3_DST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch3DstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch3_link.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch3_link.rs index eb147f0..973eaed 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch3_link.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch3_link.rs @@ -1,136 +1,96 @@ #[doc = "Register `CH3_LINK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH3_LINK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] -pub type LINKMODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Link Structure Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LINKMODE_A { +pub enum Linkmode { #[doc = "0: The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LINKMODE_A) -> Self { + fn from(variant: Linkmode) -> Self { variant as u8 != 0 } } -impl LINKMODE_R { +#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] +pub type LinkmodeR = crate::BitReader; +impl LinkmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LINKMODE_A { + pub const fn variant(&self) -> Linkmode { match self.bits { - false => LINKMODE_A::ABSOLUTE, - true => LINKMODE_A::RELATIVE, + false => Linkmode::Absolute, + true => Linkmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == LINKMODE_A::ABSOLUTE + *self == Linkmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == LINKMODE_A::RELATIVE + *self == Linkmode::Relative } } #[doc = "Field `LINK` reader - Link Next Structure"] -pub type LINK_R = crate::BitReader; +pub type LinkR = crate::BitReader; #[doc = "Field `LINK` writer - Link Next Structure"] -pub type LINK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH3_LINK_SPEC, bool, O>; +pub type LinkW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LINKADDR` reader - Link Structure Address"] -pub type LINKADDR_R = crate::FieldReader; +pub type LinkaddrR = crate::FieldReader; #[doc = "Field `LINKADDR` writer - Link Structure Address"] -pub type LINKADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH3_LINK_SPEC, u32, u32, 30, O>; +pub type LinkaddrW<'a, REG> = crate::FieldWriter<'a, REG, 30, u32>; impl R { #[doc = "Bit 0 - Link Structure Addressing Mode"] #[inline(always)] - pub fn linkmode(&self) -> LINKMODE_R { - LINKMODE_R::new((self.bits & 1) != 0) + pub fn linkmode(&self) -> LinkmodeR { + LinkmodeR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] - pub fn link(&self) -> LINK_R { - LINK_R::new(((self.bits >> 1) & 1) != 0) + pub fn link(&self) -> LinkR { + LinkR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] - pub fn linkaddr(&self) -> LINKADDR_R { - LINKADDR_R::new((self.bits >> 2) & 0x3fff_ffff) + pub fn linkaddr(&self) -> LinkaddrR { + LinkaddrR::new((self.bits >> 2) & 0x3fff_ffff) } } impl W { #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] #[must_use] - pub fn link(&mut self) -> LINK_W<1> { - LINK_W::new(self) + pub fn link(&mut self) -> LinkW { + LinkW::new(self, 1) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] #[must_use] - pub fn linkaddr(&mut self) -> LINKADDR_W<2> { - LINKADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn linkaddr(&mut self) -> LinkaddrW { + LinkaddrW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch3_link](index.html) module"] -pub struct CH3_LINK_SPEC; -impl crate::RegisterSpec for CH3_LINK_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_link::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_link::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch3LinkSpec; +impl crate::RegisterSpec for Ch3LinkSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch3_link::R](R) reader structure"] -impl crate::Readable for CH3_LINK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch3_link::W](W) writer structure"] -impl crate::Writable for CH3_LINK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch3_link::R`](R) reader structure"] +impl crate::Readable for Ch3LinkSpec {} +#[doc = "`write(|w| ..)` method takes [`ch3_link::W`](W) writer structure"] +impl crate::Writable for Ch3LinkSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH3_LINK to value 0"] -impl crate::Resettable for CH3_LINK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch3LinkSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch3_loop.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch3_loop.rs index 30837ee..e87a874 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch3_loop.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch3_loop.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH3_LOOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH3_LOOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOOPCNT` reader - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_R = crate::FieldReader; +pub type LoopcntR = crate::FieldReader; #[doc = "Field `LOOPCNT` writer - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH3_LOOP_SPEC, u8, u8, 8, O>; +pub type LoopcntW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] - pub fn loopcnt(&self) -> LOOPCNT_R { - LOOPCNT_R::new((self.bits & 0xff) as u8) + pub fn loopcnt(&self) -> LoopcntR { + LoopcntR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] #[must_use] - pub fn loopcnt(&mut self) -> LOOPCNT_W<0> { - LOOPCNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn loopcnt(&mut self) -> LoopcntW { + LoopcntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch3_loop](index.html) module"] -pub struct CH3_LOOP_SPEC; -impl crate::RegisterSpec for CH3_LOOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_loop::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_loop::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch3LoopSpec; +impl crate::RegisterSpec for Ch3LoopSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch3_loop::R](R) reader structure"] -impl crate::Readable for CH3_LOOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch3_loop::W](W) writer structure"] -impl crate::Writable for CH3_LOOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch3_loop::R`](R) reader structure"] +impl crate::Readable for Ch3LoopSpec {} +#[doc = "`write(|w| ..)` method takes [`ch3_loop::W`](W) writer structure"] +impl crate::Writable for Ch3LoopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH3_LOOP to value 0"] -impl crate::Resettable for CH3_LOOP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch3LoopSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch3_src.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch3_src.rs index a1b7622..e3bc8ea 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch3_src.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch3_src.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH3_SRC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH3_SRC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SRCADDR` reader - Source Data Address"] -pub type SRCADDR_R = crate::FieldReader; +pub type SrcaddrR = crate::FieldReader; #[doc = "Field `SRCADDR` writer - Source Data Address"] -pub type SRCADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH3_SRC_SPEC, u32, u32, 32, O>; +pub type SrcaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] - pub fn srcaddr(&self) -> SRCADDR_R { - SRCADDR_R::new(self.bits) + pub fn srcaddr(&self) -> SrcaddrR { + SrcaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] #[must_use] - pub fn srcaddr(&mut self) -> SRCADDR_W<0> { - SRCADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn srcaddr(&mut self) -> SrcaddrW { + SrcaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch3_src](index.html) module"] -pub struct CH3_SRC_SPEC; -impl crate::RegisterSpec for CH3_SRC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_src::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_src::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch3SrcSpec; +impl crate::RegisterSpec for Ch3SrcSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch3_src::R](R) reader structure"] -impl crate::Readable for CH3_SRC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch3_src::W](W) writer structure"] -impl crate::Writable for CH3_SRC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch3_src::R`](R) reader structure"] +impl crate::Readable for Ch3SrcSpec {} +#[doc = "`write(|w| ..)` method takes [`ch3_src::W`](W) writer structure"] +impl crate::Writable for Ch3SrcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH3_SRC to value 0"] -impl crate::Resettable for CH3_SRC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch3SrcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch4_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch4_cfg.rs index 22e2cdf..2fb870b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch4_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch4_cfg.rs @@ -1,277 +1,250 @@ #[doc = "Register `CH4_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH4_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] -pub type ARBSLOTS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Arbitration Slot Number Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ARBSLOTS_A { +pub enum Arbslots { #[doc = "0: One arbitration slot selected"] - ONE = 0, + One = 0, #[doc = "1: Two arbitration slots selected"] - TWO = 1, + Two = 1, #[doc = "2: Four arbitration slots selected"] - FOUR = 2, + Four = 2, #[doc = "3: Eight arbitration slots selected"] - EIGHT = 3, + Eight = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ARBSLOTS_A) -> Self { + fn from(variant: Arbslots) -> Self { variant as _ } } -impl ARBSLOTS_R { +impl crate::FieldSpec for Arbslots { + type Ux = u8; +} +impl crate::IsEnum for Arbslots {} +#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] +pub type ArbslotsR = crate::FieldReader; +impl ArbslotsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ARBSLOTS_A { + pub const fn variant(&self) -> Arbslots { match self.bits { - 0 => ARBSLOTS_A::ONE, - 1 => ARBSLOTS_A::TWO, - 2 => ARBSLOTS_A::FOUR, - 3 => ARBSLOTS_A::EIGHT, + 0 => Arbslots::One, + 1 => Arbslots::Two, + 2 => Arbslots::Four, + 3 => Arbslots::Eight, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "One arbitration slot selected"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == ARBSLOTS_A::ONE + *self == Arbslots::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Two arbitration slots selected"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == ARBSLOTS_A::TWO + *self == Arbslots::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Four arbitration slots selected"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == ARBSLOTS_A::FOUR + *self == Arbslots::Four } - #[doc = "Checks if the value of the field is `EIGHT`"] + #[doc = "Eight arbitration slots selected"] #[inline(always)] pub fn is_eight(&self) -> bool { - *self == ARBSLOTS_A::EIGHT + *self == Arbslots::Eight } } #[doc = "Field `ARBSLOTS` writer - Arbitration Slot Number Select"] -pub type ARBSLOTS_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH4_CFG_SPEC, u8, ARBSLOTS_A, 2, O>; -impl<'a, const O: u8> ARBSLOTS_W<'a, O> { +pub type ArbslotsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Arbslots, crate::Safe>; +impl<'a, REG> ArbslotsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One arbitration slot selected"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(ARBSLOTS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Arbslots::One) } #[doc = "Two arbitration slots selected"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(ARBSLOTS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Arbslots::Two) } #[doc = "Four arbitration slots selected"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(ARBSLOTS_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Arbslots::Four) } #[doc = "Eight arbitration slots selected"] #[inline(always)] - pub fn eight(self) -> &'a mut W { - self.variant(ARBSLOTS_A::EIGHT) + pub fn eight(self) -> &'a mut crate::W { + self.variant(Arbslots::Eight) } } -#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] -pub type SRCINCSIGN_R = crate::BitReader; #[doc = "Source Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCINCSIGN_A { +pub enum Srcincsign { #[doc = "0: Increment source address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement source address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCINCSIGN_A) -> Self { + fn from(variant: Srcincsign) -> Self { variant as u8 != 0 } } -impl SRCINCSIGN_R { +#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] +pub type SrcincsignR = crate::BitReader; +impl SrcincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINCSIGN_A { + pub const fn variant(&self) -> Srcincsign { match self.bits { - false => SRCINCSIGN_A::POSITIVE, - true => SRCINCSIGN_A::NEGATIVE, + false => Srcincsign::Positive, + true => Srcincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment source address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == SRCINCSIGN_A::POSITIVE + *self == Srcincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement source address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == SRCINCSIGN_A::NEGATIVE + *self == Srcincsign::Negative } } #[doc = "Field `SRCINCSIGN` writer - Source Address Increment Sign"] -pub type SRCINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH4_CFG_SPEC, SRCINCSIGN_A, O>; -impl<'a, const O: u8> SRCINCSIGN_W<'a, O> { +pub type SrcincsignW<'a, REG> = crate::BitWriter<'a, REG, Srcincsign>; +impl<'a, REG> SrcincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment source address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Srcincsign::Positive) } #[doc = "Decrement source address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Srcincsign::Negative) } } -#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] -pub type DSTINCSIGN_R = crate::BitReader; #[doc = "Destination Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTINCSIGN_A { +pub enum Dstincsign { #[doc = "0: Increment destination address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement destination address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTINCSIGN_A) -> Self { + fn from(variant: Dstincsign) -> Self { variant as u8 != 0 } } -impl DSTINCSIGN_R { +#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] +pub type DstincsignR = crate::BitReader; +impl DstincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINCSIGN_A { + pub const fn variant(&self) -> Dstincsign { match self.bits { - false => DSTINCSIGN_A::POSITIVE, - true => DSTINCSIGN_A::NEGATIVE, + false => Dstincsign::Positive, + true => Dstincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment destination address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == DSTINCSIGN_A::POSITIVE + *self == Dstincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement destination address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == DSTINCSIGN_A::NEGATIVE + *self == Dstincsign::Negative } } #[doc = "Field `DSTINCSIGN` writer - Destination Address Increment Sign"] -pub type DSTINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH4_CFG_SPEC, DSTINCSIGN_A, O>; -impl<'a, const O: u8> DSTINCSIGN_W<'a, O> { +pub type DstincsignW<'a, REG> = crate::BitWriter<'a, REG, Dstincsign>; +impl<'a, REG> DstincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment destination address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Dstincsign::Positive) } #[doc = "Decrement destination address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Dstincsign::Negative) } } impl R { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] - pub fn arbslots(&self) -> ARBSLOTS_R { - ARBSLOTS_R::new(((self.bits >> 16) & 3) as u8) + pub fn arbslots(&self) -> ArbslotsR { + ArbslotsR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] - pub fn srcincsign(&self) -> SRCINCSIGN_R { - SRCINCSIGN_R::new(((self.bits >> 20) & 1) != 0) + pub fn srcincsign(&self) -> SrcincsignR { + SrcincsignR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] - pub fn dstincsign(&self) -> DSTINCSIGN_R { - DSTINCSIGN_R::new(((self.bits >> 21) & 1) != 0) + pub fn dstincsign(&self) -> DstincsignR { + DstincsignR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] #[must_use] - pub fn arbslots(&mut self) -> ARBSLOTS_W<16> { - ARBSLOTS_W::new(self) + pub fn arbslots(&mut self) -> ArbslotsW { + ArbslotsW::new(self, 16) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] #[must_use] - pub fn srcincsign(&mut self) -> SRCINCSIGN_W<20> { - SRCINCSIGN_W::new(self) + pub fn srcincsign(&mut self) -> SrcincsignW { + SrcincsignW::new(self, 20) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] #[must_use] - pub fn dstincsign(&mut self) -> DSTINCSIGN_W<21> { - DSTINCSIGN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstincsign(&mut self) -> DstincsignW { + DstincsignW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch4_cfg](index.html) module"] -pub struct CH4_CFG_SPEC; -impl crate::RegisterSpec for CH4_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch4CfgSpec; +impl crate::RegisterSpec for Ch4CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch4_cfg::R](R) reader structure"] -impl crate::Readable for CH4_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch4_cfg::W](W) writer structure"] -impl crate::Writable for CH4_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch4_cfg::R`](R) reader structure"] +impl crate::Readable for Ch4CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`ch4_cfg::W`](W) writer structure"] +impl crate::Writable for Ch4CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH4_CFG to value 0"] -impl crate::Resettable for CH4_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch4CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch4_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch4_ctrl.rs index ccfba6a..5e6df62 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch4_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch4_ctrl.rs @@ -1,843 +1,842 @@ #[doc = "Register `CH4_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH4_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] -pub type STRUCTTYPE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DMA Structure Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STRUCTTYPE_A { +pub enum Structtype { #[doc = "0: DMA transfer structure type selected."] - TRANSFER = 0, + Transfer = 0, #[doc = "1: Synchronization structure type selected."] - SYNCHRONIZE = 1, + Synchronize = 1, #[doc = "2: Write immediate value structure type selected."] - WRITE = 2, + Write = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STRUCTTYPE_A) -> Self { + fn from(variant: Structtype) -> Self { variant as _ } } -impl STRUCTTYPE_R { +impl crate::FieldSpec for Structtype { + type Ux = u8; +} +impl crate::IsEnum for Structtype {} +#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] +pub type StructtypeR = crate::FieldReader; +impl StructtypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(STRUCTTYPE_A::TRANSFER), - 1 => Some(STRUCTTYPE_A::SYNCHRONIZE), - 2 => Some(STRUCTTYPE_A::WRITE), + 0 => Some(Structtype::Transfer), + 1 => Some(Structtype::Synchronize), + 2 => Some(Structtype::Write), _ => None, } } - #[doc = "Checks if the value of the field is `TRANSFER`"] + #[doc = "DMA transfer structure type selected."] #[inline(always)] pub fn is_transfer(&self) -> bool { - *self == STRUCTTYPE_A::TRANSFER + *self == Structtype::Transfer } - #[doc = "Checks if the value of the field is `SYNCHRONIZE`"] + #[doc = "Synchronization structure type selected."] #[inline(always)] pub fn is_synchronize(&self) -> bool { - *self == STRUCTTYPE_A::SYNCHRONIZE + *self == Structtype::Synchronize } - #[doc = "Checks if the value of the field is `WRITE`"] + #[doc = "Write immediate value structure type selected."] #[inline(always)] pub fn is_write(&self) -> bool { - *self == STRUCTTYPE_A::WRITE + *self == Structtype::Write } } #[doc = "Field `STRUCTTYPE` writer - DMA Structure Type"] -pub type STRUCTTYPE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH4_CTRL_SPEC, u8, STRUCTTYPE_A, 2, O>; -impl<'a, const O: u8> STRUCTTYPE_W<'a, O> { +pub type StructtypeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Structtype>; +impl<'a, REG> StructtypeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "DMA transfer structure type selected."] #[inline(always)] - pub fn transfer(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::TRANSFER) + pub fn transfer(self) -> &'a mut crate::W { + self.variant(Structtype::Transfer) } #[doc = "Synchronization structure type selected."] #[inline(always)] - pub fn synchronize(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::SYNCHRONIZE) + pub fn synchronize(self) -> &'a mut crate::W { + self.variant(Structtype::Synchronize) } #[doc = "Write immediate value structure type selected."] #[inline(always)] - pub fn write(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::WRITE) + pub fn write(self) -> &'a mut crate::W { + self.variant(Structtype::Write) } } #[doc = "Field `STRUCTREQ` reader - Structure DMA Transfer Request"] -pub type STRUCTREQ_R = crate::BitReader; +pub type StructreqR = crate::BitReader; #[doc = "Field `XFERCNT` reader - DMA Unit Data Transfer Count"] -pub type XFERCNT_R = crate::FieldReader; +pub type XfercntR = crate::FieldReader; #[doc = "Field `XFERCNT` writer - DMA Unit Data Transfer Count"] -pub type XFERCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH4_CTRL_SPEC, u16, u16, 11, O>; +pub type XfercntW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `BYTESWAP` reader - Endian Byte Swap"] -pub type BYTESWAP_R = crate::BitReader; +pub type ByteswapR = crate::BitReader; #[doc = "Field `BYTESWAP` writer - Endian Byte Swap"] -pub type BYTESWAP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH4_CTRL_SPEC, bool, O>; -#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] -pub type BLOCKSIZE_R = crate::FieldReader; +pub type ByteswapW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Block Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BLOCKSIZE_A { +pub enum Blocksize { #[doc = "0: One unit transfer per arbitration"] - UNIT1 = 0, + Unit1 = 0, #[doc = "1: Two unit transfers per arbitration"] - UNIT2 = 1, + Unit2 = 1, #[doc = "2: Three unit transfers per arbitration"] - UNIT3 = 2, + Unit3 = 2, #[doc = "3: Four unit transfers per arbitration"] - UNIT4 = 3, + Unit4 = 3, #[doc = "4: Six unit transfers per arbitration"] - UNIT6 = 4, + Unit6 = 4, #[doc = "5: Eight unit transfers per arbitration"] - UNIT8 = 5, + Unit8 = 5, #[doc = "7: Sixteen unit transfers per arbitration"] - UNIT16 = 7, + Unit16 = 7, #[doc = "9: 32 unit transfers per arbitration"] - UNIT32 = 9, + Unit32 = 9, #[doc = "10: 64 unit transfers per arbitration"] - UNIT64 = 10, + Unit64 = 10, #[doc = "11: 128 unit transfers per arbitration"] - UNIT128 = 11, + Unit128 = 11, #[doc = "12: 256 unit transfers per arbitration"] - UNIT256 = 12, + Unit256 = 12, #[doc = "13: 512 unit transfers per arbitration"] - UNIT512 = 13, + Unit512 = 13, #[doc = "14: 1024 unit transfers per arbitration"] - UNIT1024 = 14, + Unit1024 = 14, #[doc = "15: Transfer all units as specified by the XFRCNT field"] - ALL = 15, + All = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BLOCKSIZE_A) -> Self { + fn from(variant: Blocksize) -> Self { variant as _ } } -impl BLOCKSIZE_R { +impl crate::FieldSpec for Blocksize { + type Ux = u8; +} +impl crate::IsEnum for Blocksize {} +#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] +pub type BlocksizeR = crate::FieldReader; +impl BlocksizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BLOCKSIZE_A::UNIT1), - 1 => Some(BLOCKSIZE_A::UNIT2), - 2 => Some(BLOCKSIZE_A::UNIT3), - 3 => Some(BLOCKSIZE_A::UNIT4), - 4 => Some(BLOCKSIZE_A::UNIT6), - 5 => Some(BLOCKSIZE_A::UNIT8), - 7 => Some(BLOCKSIZE_A::UNIT16), - 9 => Some(BLOCKSIZE_A::UNIT32), - 10 => Some(BLOCKSIZE_A::UNIT64), - 11 => Some(BLOCKSIZE_A::UNIT128), - 12 => Some(BLOCKSIZE_A::UNIT256), - 13 => Some(BLOCKSIZE_A::UNIT512), - 14 => Some(BLOCKSIZE_A::UNIT1024), - 15 => Some(BLOCKSIZE_A::ALL), + 0 => Some(Blocksize::Unit1), + 1 => Some(Blocksize::Unit2), + 2 => Some(Blocksize::Unit3), + 3 => Some(Blocksize::Unit4), + 4 => Some(Blocksize::Unit6), + 5 => Some(Blocksize::Unit8), + 7 => Some(Blocksize::Unit16), + 9 => Some(Blocksize::Unit32), + 10 => Some(Blocksize::Unit64), + 11 => Some(Blocksize::Unit128), + 12 => Some(Blocksize::Unit256), + 13 => Some(Blocksize::Unit512), + 14 => Some(Blocksize::Unit1024), + 15 => Some(Blocksize::All), _ => None, } } - #[doc = "Checks if the value of the field is `UNIT1`"] + #[doc = "One unit transfer per arbitration"] #[inline(always)] pub fn is_unit1(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1 + *self == Blocksize::Unit1 } - #[doc = "Checks if the value of the field is `UNIT2`"] + #[doc = "Two unit transfers per arbitration"] #[inline(always)] pub fn is_unit2(&self) -> bool { - *self == BLOCKSIZE_A::UNIT2 + *self == Blocksize::Unit2 } - #[doc = "Checks if the value of the field is `UNIT3`"] + #[doc = "Three unit transfers per arbitration"] #[inline(always)] pub fn is_unit3(&self) -> bool { - *self == BLOCKSIZE_A::UNIT3 + *self == Blocksize::Unit3 } - #[doc = "Checks if the value of the field is `UNIT4`"] + #[doc = "Four unit transfers per arbitration"] #[inline(always)] pub fn is_unit4(&self) -> bool { - *self == BLOCKSIZE_A::UNIT4 + *self == Blocksize::Unit4 } - #[doc = "Checks if the value of the field is `UNIT6`"] + #[doc = "Six unit transfers per arbitration"] #[inline(always)] pub fn is_unit6(&self) -> bool { - *self == BLOCKSIZE_A::UNIT6 + *self == Blocksize::Unit6 } - #[doc = "Checks if the value of the field is `UNIT8`"] + #[doc = "Eight unit transfers per arbitration"] #[inline(always)] pub fn is_unit8(&self) -> bool { - *self == BLOCKSIZE_A::UNIT8 + *self == Blocksize::Unit8 } - #[doc = "Checks if the value of the field is `UNIT16`"] + #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] pub fn is_unit16(&self) -> bool { - *self == BLOCKSIZE_A::UNIT16 + *self == Blocksize::Unit16 } - #[doc = "Checks if the value of the field is `UNIT32`"] + #[doc = "32 unit transfers per arbitration"] #[inline(always)] pub fn is_unit32(&self) -> bool { - *self == BLOCKSIZE_A::UNIT32 + *self == Blocksize::Unit32 } - #[doc = "Checks if the value of the field is `UNIT64`"] + #[doc = "64 unit transfers per arbitration"] #[inline(always)] pub fn is_unit64(&self) -> bool { - *self == BLOCKSIZE_A::UNIT64 + *self == Blocksize::Unit64 } - #[doc = "Checks if the value of the field is `UNIT128`"] + #[doc = "128 unit transfers per arbitration"] #[inline(always)] pub fn is_unit128(&self) -> bool { - *self == BLOCKSIZE_A::UNIT128 + *self == Blocksize::Unit128 } - #[doc = "Checks if the value of the field is `UNIT256`"] + #[doc = "256 unit transfers per arbitration"] #[inline(always)] pub fn is_unit256(&self) -> bool { - *self == BLOCKSIZE_A::UNIT256 + *self == Blocksize::Unit256 } - #[doc = "Checks if the value of the field is `UNIT512`"] + #[doc = "512 unit transfers per arbitration"] #[inline(always)] pub fn is_unit512(&self) -> bool { - *self == BLOCKSIZE_A::UNIT512 + *self == Blocksize::Unit512 } - #[doc = "Checks if the value of the field is `UNIT1024`"] + #[doc = "1024 unit transfers per arbitration"] #[inline(always)] pub fn is_unit1024(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1024 + *self == Blocksize::Unit1024 } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] pub fn is_all(&self) -> bool { - *self == BLOCKSIZE_A::ALL + *self == Blocksize::All } } #[doc = "Field `BLOCKSIZE` writer - Block Transfer Size"] -pub type BLOCKSIZE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH4_CTRL_SPEC, u8, BLOCKSIZE_A, 4, O>; -impl<'a, const O: u8> BLOCKSIZE_W<'a, O> { +pub type BlocksizeW<'a, REG> = crate::FieldWriter<'a, REG, 4, Blocksize>; +impl<'a, REG> BlocksizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One unit transfer per arbitration"] #[inline(always)] - pub fn unit1(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1) + pub fn unit1(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1) } #[doc = "Two unit transfers per arbitration"] #[inline(always)] - pub fn unit2(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT2) + pub fn unit2(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit2) } #[doc = "Three unit transfers per arbitration"] #[inline(always)] - pub fn unit3(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT3) + pub fn unit3(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit3) } #[doc = "Four unit transfers per arbitration"] #[inline(always)] - pub fn unit4(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT4) + pub fn unit4(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit4) } #[doc = "Six unit transfers per arbitration"] #[inline(always)] - pub fn unit6(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT6) + pub fn unit6(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit6) } #[doc = "Eight unit transfers per arbitration"] #[inline(always)] - pub fn unit8(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT8) + pub fn unit8(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit8) } #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] - pub fn unit16(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT16) + pub fn unit16(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit16) } #[doc = "32 unit transfers per arbitration"] #[inline(always)] - pub fn unit32(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT32) + pub fn unit32(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit32) } #[doc = "64 unit transfers per arbitration"] #[inline(always)] - pub fn unit64(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT64) + pub fn unit64(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit64) } #[doc = "128 unit transfers per arbitration"] #[inline(always)] - pub fn unit128(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT128) + pub fn unit128(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit128) } #[doc = "256 unit transfers per arbitration"] #[inline(always)] - pub fn unit256(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT256) + pub fn unit256(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit256) } #[doc = "512 unit transfers per arbitration"] #[inline(always)] - pub fn unit512(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT512) + pub fn unit512(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit512) } #[doc = "1024 unit transfers per arbitration"] #[inline(always)] - pub fn unit1024(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1024) + pub fn unit1024(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1024) } #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Blocksize::All) } } #[doc = "Field `DONEIEN` reader - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_R = crate::BitReader; +pub type DoneienR = crate::BitReader; #[doc = "Field `DONEIEN` writer - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH4_CTRL_SPEC, bool, O>; -#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] -pub type REQMODE_R = crate::BitReader; +pub type DoneienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "DMA Request Transfer Mode Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REQMODE_A { +pub enum Reqmode { #[doc = "0: The LDMA transfers one BLOCKSIZE per transfer request."] - BLOCK = 0, + Block = 0, #[doc = "1: One transfer request transfers all units as defined by the XFRCNT field."] - ALL = 1, + All = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REQMODE_A) -> Self { + fn from(variant: Reqmode) -> Self { variant as u8 != 0 } } -impl REQMODE_R { +#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] +pub type ReqmodeR = crate::BitReader; +impl ReqmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REQMODE_A { + pub const fn variant(&self) -> Reqmode { match self.bits { - false => REQMODE_A::BLOCK, - true => REQMODE_A::ALL, + false => Reqmode::Block, + true => Reqmode::All, } } - #[doc = "Checks if the value of the field is `BLOCK`"] + #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] pub fn is_block(&self) -> bool { - *self == REQMODE_A::BLOCK + *self == Reqmode::Block } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] pub fn is_all(&self) -> bool { - *self == REQMODE_A::ALL + *self == Reqmode::All } } #[doc = "Field `REQMODE` writer - DMA Request Transfer Mode Select"] -pub type REQMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH4_CTRL_SPEC, REQMODE_A, O>; -impl<'a, const O: u8> REQMODE_W<'a, O> { +pub type ReqmodeW<'a, REG> = crate::BitWriter<'a, REG, Reqmode>; +impl<'a, REG> ReqmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] - pub fn block(self) -> &'a mut W { - self.variant(REQMODE_A::BLOCK) + pub fn block(self) -> &'a mut crate::W { + self.variant(Reqmode::Block) } #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(REQMODE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Reqmode::All) } } #[doc = "Field `DECLOOPCNT` reader - Decrement Loop Count"] -pub type DECLOOPCNT_R = crate::BitReader; +pub type DecloopcntR = crate::BitReader; #[doc = "Field `DECLOOPCNT` writer - Decrement Loop Count"] -pub type DECLOOPCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH4_CTRL_SPEC, bool, O>; +pub type DecloopcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IGNORESREQ` reader - Ignore Sreq"] -pub type IGNORESREQ_R = crate::BitReader; +pub type IgnoresreqR = crate::BitReader; #[doc = "Field `IGNORESREQ` writer - Ignore Sreq"] -pub type IGNORESREQ_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH4_CTRL_SPEC, bool, O>; -#[doc = "Field `SRCINC` reader - Source Address Increment Size"] -pub type SRCINC_R = crate::FieldReader; +pub type IgnoresreqW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SRCINC_A { +pub enum Srcinc { #[doc = "0: Increment source address by one unit data size after each read"] - ONE = 0, + One = 0, #[doc = "1: Increment source address by two unit data sizes after each read"] - TWO = 1, + Two = 1, #[doc = "2: Increment source address by four unit data sizes after each read"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SRCINC_A) -> Self { + fn from(variant: Srcinc) -> Self { variant as _ } } -impl SRCINC_R { +impl crate::FieldSpec for Srcinc { + type Ux = u8; +} +impl crate::IsEnum for Srcinc {} +#[doc = "Field `SRCINC` reader - Source Address Increment Size"] +pub type SrcincR = crate::FieldReader; +impl SrcincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINC_A { + pub const fn variant(&self) -> Srcinc { match self.bits { - 0 => SRCINC_A::ONE, - 1 => SRCINC_A::TWO, - 2 => SRCINC_A::FOUR, - 3 => SRCINC_A::NONE, + 0 => Srcinc::One, + 1 => Srcinc::Two, + 2 => Srcinc::Four, + 3 => Srcinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == SRCINC_A::ONE + *self == Srcinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == SRCINC_A::TWO + *self == Srcinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == SRCINC_A::FOUR + *self == Srcinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SRCINC_A::NONE + *self == Srcinc::None } } #[doc = "Field `SRCINC` writer - Source Address Increment Size"] -pub type SRCINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH4_CTRL_SPEC, u8, SRCINC_A, 2, O>; -impl<'a, const O: u8> SRCINC_W<'a, O> { +pub type SrcincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Srcinc, crate::Safe>; +impl<'a, REG> SrcincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(SRCINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Srcinc::One) } #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(SRCINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Srcinc::Two) } #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(SRCINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Srcinc::Four) } #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SRCINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Srcinc::None) } } -#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] -pub type SIZE_R = crate::FieldReader; #[doc = "Unit Data Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIZE_A { +pub enum Size { #[doc = "0: Each unit transfer is a byte"] - BYTE = 0, + Byte = 0, #[doc = "1: Each unit transfer is a half-word"] - HALFWORD = 1, + Halfword = 1, #[doc = "2: Each unit transfer is a word"] - WORD = 2, + Word = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIZE_A) -> Self { + fn from(variant: Size) -> Self { variant as _ } } -impl SIZE_R { +impl crate::FieldSpec for Size { + type Ux = u8; +} +impl crate::IsEnum for Size {} +#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] +pub type SizeR = crate::FieldReader; +impl SizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIZE_A::BYTE), - 1 => Some(SIZE_A::HALFWORD), - 2 => Some(SIZE_A::WORD), + 0 => Some(Size::Byte), + 1 => Some(Size::Halfword), + 2 => Some(Size::Word), _ => None, } } - #[doc = "Checks if the value of the field is `BYTE`"] + #[doc = "Each unit transfer is a byte"] #[inline(always)] pub fn is_byte(&self) -> bool { - *self == SIZE_A::BYTE + *self == Size::Byte } - #[doc = "Checks if the value of the field is `HALFWORD`"] + #[doc = "Each unit transfer is a half-word"] #[inline(always)] pub fn is_halfword(&self) -> bool { - *self == SIZE_A::HALFWORD + *self == Size::Halfword } - #[doc = "Checks if the value of the field is `WORD`"] + #[doc = "Each unit transfer is a word"] #[inline(always)] pub fn is_word(&self) -> bool { - *self == SIZE_A::WORD + *self == Size::Word } } #[doc = "Field `SIZE` writer - Unit Data Transfer Size"] -pub type SIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH4_CTRL_SPEC, u8, SIZE_A, 2, O>; -impl<'a, const O: u8> SIZE_W<'a, O> { +pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Size>; +impl<'a, REG> SizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Each unit transfer is a byte"] #[inline(always)] - pub fn byte(self) -> &'a mut W { - self.variant(SIZE_A::BYTE) + pub fn byte(self) -> &'a mut crate::W { + self.variant(Size::Byte) } #[doc = "Each unit transfer is a half-word"] #[inline(always)] - pub fn halfword(self) -> &'a mut W { - self.variant(SIZE_A::HALFWORD) + pub fn halfword(self) -> &'a mut crate::W { + self.variant(Size::Halfword) } #[doc = "Each unit transfer is a word"] #[inline(always)] - pub fn word(self) -> &'a mut W { - self.variant(SIZE_A::WORD) + pub fn word(self) -> &'a mut crate::W { + self.variant(Size::Word) } } -#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] -pub type DSTINC_R = crate::FieldReader; #[doc = "Destination Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DSTINC_A { +pub enum Dstinc { #[doc = "0: Increment destination address by one unit data size after each write"] - ONE = 0, + One = 0, #[doc = "1: Increment destination address by two unit data sizes after each write"] - TWO = 1, + Two = 1, #[doc = "2: Increment destination address by four unit data sizes after each write"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DSTINC_A) -> Self { + fn from(variant: Dstinc) -> Self { variant as _ } } -impl DSTINC_R { +impl crate::FieldSpec for Dstinc { + type Ux = u8; +} +impl crate::IsEnum for Dstinc {} +#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] +pub type DstincR = crate::FieldReader; +impl DstincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINC_A { + pub const fn variant(&self) -> Dstinc { match self.bits { - 0 => DSTINC_A::ONE, - 1 => DSTINC_A::TWO, - 2 => DSTINC_A::FOUR, - 3 => DSTINC_A::NONE, + 0 => Dstinc::One, + 1 => Dstinc::Two, + 2 => Dstinc::Four, + 3 => Dstinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == DSTINC_A::ONE + *self == Dstinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == DSTINC_A::TWO + *self == Dstinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == DSTINC_A::FOUR + *self == Dstinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == DSTINC_A::NONE + *self == Dstinc::None } } #[doc = "Field `DSTINC` writer - Destination Address Increment Size"] -pub type DSTINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH4_CTRL_SPEC, u8, DSTINC_A, 2, O>; -impl<'a, const O: u8> DSTINC_W<'a, O> { +pub type DstincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dstinc, crate::Safe>; +impl<'a, REG> DstincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(DSTINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Dstinc::One) } #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(DSTINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Dstinc::Two) } #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(DSTINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Dstinc::Four) } #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(DSTINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Dstinc::None) } } -#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] -pub type SRCMODE_R = crate::BitReader; #[doc = "Source Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCMODE_A { +pub enum Srcmode { #[doc = "0: The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCMODE_A) -> Self { + fn from(variant: Srcmode) -> Self { variant as u8 != 0 } } -impl SRCMODE_R { +#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] +pub type SrcmodeR = crate::BitReader; +impl SrcmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCMODE_A { + pub const fn variant(&self) -> Srcmode { match self.bits { - false => SRCMODE_A::ABSOLUTE, - true => SRCMODE_A::RELATIVE, + false => Srcmode::Absolute, + true => Srcmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == SRCMODE_A::ABSOLUTE + *self == Srcmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == SRCMODE_A::RELATIVE + *self == Srcmode::Relative } } -#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] -pub type DSTMODE_R = crate::BitReader; #[doc = "Destination Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTMODE_A { +pub enum Dstmode { #[doc = "0: The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTMODE_A) -> Self { + fn from(variant: Dstmode) -> Self { variant as u8 != 0 } } -impl DSTMODE_R { +#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] +pub type DstmodeR = crate::BitReader; +impl DstmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTMODE_A { + pub const fn variant(&self) -> Dstmode { match self.bits { - false => DSTMODE_A::ABSOLUTE, - true => DSTMODE_A::RELATIVE, + false => Dstmode::Absolute, + true => Dstmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == DSTMODE_A::ABSOLUTE + *self == Dstmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == DSTMODE_A::RELATIVE + *self == Dstmode::Relative } } impl R { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] - pub fn structtype(&self) -> STRUCTTYPE_R { - STRUCTTYPE_R::new((self.bits & 3) as u8) + pub fn structtype(&self) -> StructtypeR { + StructtypeR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Structure DMA Transfer Request"] #[inline(always)] - pub fn structreq(&self) -> STRUCTREQ_R { - STRUCTREQ_R::new(((self.bits >> 3) & 1) != 0) + pub fn structreq(&self) -> StructreqR { + StructreqR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] - pub fn xfercnt(&self) -> XFERCNT_R { - XFERCNT_R::new(((self.bits >> 4) & 0x07ff) as u16) + pub fn xfercnt(&self) -> XfercntR { + XfercntR::new(((self.bits >> 4) & 0x07ff) as u16) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] - pub fn byteswap(&self) -> BYTESWAP_R { - BYTESWAP_R::new(((self.bits >> 15) & 1) != 0) + pub fn byteswap(&self) -> ByteswapR { + ByteswapR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] - pub fn blocksize(&self) -> BLOCKSIZE_R { - BLOCKSIZE_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn blocksize(&self) -> BlocksizeR { + BlocksizeR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] - pub fn doneien(&self) -> DONEIEN_R { - DONEIEN_R::new(((self.bits >> 20) & 1) != 0) + pub fn doneien(&self) -> DoneienR { + DoneienR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] - pub fn reqmode(&self) -> REQMODE_R { - REQMODE_R::new(((self.bits >> 21) & 1) != 0) + pub fn reqmode(&self) -> ReqmodeR { + ReqmodeR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] - pub fn decloopcnt(&self) -> DECLOOPCNT_R { - DECLOOPCNT_R::new(((self.bits >> 22) & 1) != 0) + pub fn decloopcnt(&self) -> DecloopcntR { + DecloopcntR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] - pub fn ignoresreq(&self) -> IGNORESREQ_R { - IGNORESREQ_R::new(((self.bits >> 23) & 1) != 0) + pub fn ignoresreq(&self) -> IgnoresreqR { + IgnoresreqR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] - pub fn srcinc(&self) -> SRCINC_R { - SRCINC_R::new(((self.bits >> 24) & 3) as u8) + pub fn srcinc(&self) -> SrcincR { + SrcincR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] - pub fn size(&self) -> SIZE_R { - SIZE_R::new(((self.bits >> 26) & 3) as u8) + pub fn size(&self) -> SizeR { + SizeR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] - pub fn dstinc(&self) -> DSTINC_R { - DSTINC_R::new(((self.bits >> 28) & 3) as u8) + pub fn dstinc(&self) -> DstincR { + DstincR::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bit 30 - Source Addressing Mode"] #[inline(always)] - pub fn srcmode(&self) -> SRCMODE_R { - SRCMODE_R::new(((self.bits >> 30) & 1) != 0) + pub fn srcmode(&self) -> SrcmodeR { + SrcmodeR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Destination Addressing Mode"] #[inline(always)] - pub fn dstmode(&self) -> DSTMODE_R { - DSTMODE_R::new(((self.bits >> 31) & 1) != 0) + pub fn dstmode(&self) -> DstmodeR { + DstmodeR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] #[must_use] - pub fn structtype(&mut self) -> STRUCTTYPE_W<0> { - STRUCTTYPE_W::new(self) + pub fn structtype(&mut self) -> StructtypeW { + StructtypeW::new(self, 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] #[must_use] - pub fn xfercnt(&mut self) -> XFERCNT_W<4> { - XFERCNT_W::new(self) + pub fn xfercnt(&mut self) -> XfercntW { + XfercntW::new(self, 4) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] #[must_use] - pub fn byteswap(&mut self) -> BYTESWAP_W<15> { - BYTESWAP_W::new(self) + pub fn byteswap(&mut self) -> ByteswapW { + ByteswapW::new(self, 15) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] #[must_use] - pub fn blocksize(&mut self) -> BLOCKSIZE_W<16> { - BLOCKSIZE_W::new(self) + pub fn blocksize(&mut self) -> BlocksizeW { + BlocksizeW::new(self, 16) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] #[must_use] - pub fn doneien(&mut self) -> DONEIEN_W<20> { - DONEIEN_W::new(self) + pub fn doneien(&mut self) -> DoneienW { + DoneienW::new(self, 20) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] #[must_use] - pub fn reqmode(&mut self) -> REQMODE_W<21> { - REQMODE_W::new(self) + pub fn reqmode(&mut self) -> ReqmodeW { + ReqmodeW::new(self, 21) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] #[must_use] - pub fn decloopcnt(&mut self) -> DECLOOPCNT_W<22> { - DECLOOPCNT_W::new(self) + pub fn decloopcnt(&mut self) -> DecloopcntW { + DecloopcntW::new(self, 22) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] #[must_use] - pub fn ignoresreq(&mut self) -> IGNORESREQ_W<23> { - IGNORESREQ_W::new(self) + pub fn ignoresreq(&mut self) -> IgnoresreqW { + IgnoresreqW::new(self, 23) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] #[must_use] - pub fn srcinc(&mut self) -> SRCINC_W<24> { - SRCINC_W::new(self) + pub fn srcinc(&mut self) -> SrcincW { + SrcincW::new(self, 24) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SIZE_W<26> { - SIZE_W::new(self) + pub fn size(&mut self) -> SizeW { + SizeW::new(self, 26) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] #[must_use] - pub fn dstinc(&mut self) -> DSTINC_W<28> { - DSTINC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstinc(&mut self) -> DstincW { + DstincW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch4_ctrl](index.html) module"] -pub struct CH4_CTRL_SPEC; -impl crate::RegisterSpec for CH4_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch4CtrlSpec; +impl crate::RegisterSpec for Ch4CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch4_ctrl::R](R) reader structure"] -impl crate::Readable for CH4_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch4_ctrl::W](W) writer structure"] -impl crate::Writable for CH4_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch4_ctrl::R`](R) reader structure"] +impl crate::Readable for Ch4CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ch4_ctrl::W`](W) writer structure"] +impl crate::Writable for Ch4CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH4_CTRL to value 0"] -impl crate::Resettable for CH4_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch4CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch4_dst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch4_dst.rs index ea1b8a8..e0a46cf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch4_dst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch4_dst.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH4_DST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH4_DST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DSTADDR` reader - Destination Data Address"] -pub type DSTADDR_R = crate::FieldReader; +pub type DstaddrR = crate::FieldReader; #[doc = "Field `DSTADDR` writer - Destination Data Address"] -pub type DSTADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH4_DST_SPEC, u32, u32, 32, O>; +pub type DstaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] - pub fn dstaddr(&self) -> DSTADDR_R { - DSTADDR_R::new(self.bits) + pub fn dstaddr(&self) -> DstaddrR { + DstaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] #[must_use] - pub fn dstaddr(&mut self) -> DSTADDR_W<0> { - DSTADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstaddr(&mut self) -> DstaddrW { + DstaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch4_dst](index.html) module"] -pub struct CH4_DST_SPEC; -impl crate::RegisterSpec for CH4_DST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_dst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_dst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch4DstSpec; +impl crate::RegisterSpec for Ch4DstSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch4_dst::R](R) reader structure"] -impl crate::Readable for CH4_DST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch4_dst::W](W) writer structure"] -impl crate::Writable for CH4_DST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch4_dst::R`](R) reader structure"] +impl crate::Readable for Ch4DstSpec {} +#[doc = "`write(|w| ..)` method takes [`ch4_dst::W`](W) writer structure"] +impl crate::Writable for Ch4DstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH4_DST to value 0"] -impl crate::Resettable for CH4_DST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch4DstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch4_link.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch4_link.rs index 0cbb3a0..5283b43 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch4_link.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch4_link.rs @@ -1,136 +1,96 @@ #[doc = "Register `CH4_LINK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH4_LINK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] -pub type LINKMODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Link Structure Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LINKMODE_A { +pub enum Linkmode { #[doc = "0: The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LINKMODE_A) -> Self { + fn from(variant: Linkmode) -> Self { variant as u8 != 0 } } -impl LINKMODE_R { +#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] +pub type LinkmodeR = crate::BitReader; +impl LinkmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LINKMODE_A { + pub const fn variant(&self) -> Linkmode { match self.bits { - false => LINKMODE_A::ABSOLUTE, - true => LINKMODE_A::RELATIVE, + false => Linkmode::Absolute, + true => Linkmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == LINKMODE_A::ABSOLUTE + *self == Linkmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == LINKMODE_A::RELATIVE + *self == Linkmode::Relative } } #[doc = "Field `LINK` reader - Link Next Structure"] -pub type LINK_R = crate::BitReader; +pub type LinkR = crate::BitReader; #[doc = "Field `LINK` writer - Link Next Structure"] -pub type LINK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH4_LINK_SPEC, bool, O>; +pub type LinkW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LINKADDR` reader - Link Structure Address"] -pub type LINKADDR_R = crate::FieldReader; +pub type LinkaddrR = crate::FieldReader; #[doc = "Field `LINKADDR` writer - Link Structure Address"] -pub type LINKADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH4_LINK_SPEC, u32, u32, 30, O>; +pub type LinkaddrW<'a, REG> = crate::FieldWriter<'a, REG, 30, u32>; impl R { #[doc = "Bit 0 - Link Structure Addressing Mode"] #[inline(always)] - pub fn linkmode(&self) -> LINKMODE_R { - LINKMODE_R::new((self.bits & 1) != 0) + pub fn linkmode(&self) -> LinkmodeR { + LinkmodeR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] - pub fn link(&self) -> LINK_R { - LINK_R::new(((self.bits >> 1) & 1) != 0) + pub fn link(&self) -> LinkR { + LinkR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] - pub fn linkaddr(&self) -> LINKADDR_R { - LINKADDR_R::new((self.bits >> 2) & 0x3fff_ffff) + pub fn linkaddr(&self) -> LinkaddrR { + LinkaddrR::new((self.bits >> 2) & 0x3fff_ffff) } } impl W { #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] #[must_use] - pub fn link(&mut self) -> LINK_W<1> { - LINK_W::new(self) + pub fn link(&mut self) -> LinkW { + LinkW::new(self, 1) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] #[must_use] - pub fn linkaddr(&mut self) -> LINKADDR_W<2> { - LINKADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn linkaddr(&mut self) -> LinkaddrW { + LinkaddrW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch4_link](index.html) module"] -pub struct CH4_LINK_SPEC; -impl crate::RegisterSpec for CH4_LINK_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_link::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_link::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch4LinkSpec; +impl crate::RegisterSpec for Ch4LinkSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch4_link::R](R) reader structure"] -impl crate::Readable for CH4_LINK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch4_link::W](W) writer structure"] -impl crate::Writable for CH4_LINK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch4_link::R`](R) reader structure"] +impl crate::Readable for Ch4LinkSpec {} +#[doc = "`write(|w| ..)` method takes [`ch4_link::W`](W) writer structure"] +impl crate::Writable for Ch4LinkSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH4_LINK to value 0"] -impl crate::Resettable for CH4_LINK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch4LinkSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch4_loop.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch4_loop.rs index 39f4b34..d9368a2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch4_loop.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch4_loop.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH4_LOOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH4_LOOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOOPCNT` reader - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_R = crate::FieldReader; +pub type LoopcntR = crate::FieldReader; #[doc = "Field `LOOPCNT` writer - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH4_LOOP_SPEC, u8, u8, 8, O>; +pub type LoopcntW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] - pub fn loopcnt(&self) -> LOOPCNT_R { - LOOPCNT_R::new((self.bits & 0xff) as u8) + pub fn loopcnt(&self) -> LoopcntR { + LoopcntR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] #[must_use] - pub fn loopcnt(&mut self) -> LOOPCNT_W<0> { - LOOPCNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn loopcnt(&mut self) -> LoopcntW { + LoopcntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch4_loop](index.html) module"] -pub struct CH4_LOOP_SPEC; -impl crate::RegisterSpec for CH4_LOOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_loop::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_loop::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch4LoopSpec; +impl crate::RegisterSpec for Ch4LoopSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch4_loop::R](R) reader structure"] -impl crate::Readable for CH4_LOOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch4_loop::W](W) writer structure"] -impl crate::Writable for CH4_LOOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch4_loop::R`](R) reader structure"] +impl crate::Readable for Ch4LoopSpec {} +#[doc = "`write(|w| ..)` method takes [`ch4_loop::W`](W) writer structure"] +impl crate::Writable for Ch4LoopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH4_LOOP to value 0"] -impl crate::Resettable for CH4_LOOP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch4LoopSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch4_src.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch4_src.rs index c9fddb1..a805e0f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch4_src.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch4_src.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH4_SRC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH4_SRC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SRCADDR` reader - Source Data Address"] -pub type SRCADDR_R = crate::FieldReader; +pub type SrcaddrR = crate::FieldReader; #[doc = "Field `SRCADDR` writer - Source Data Address"] -pub type SRCADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH4_SRC_SPEC, u32, u32, 32, O>; +pub type SrcaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] - pub fn srcaddr(&self) -> SRCADDR_R { - SRCADDR_R::new(self.bits) + pub fn srcaddr(&self) -> SrcaddrR { + SrcaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] #[must_use] - pub fn srcaddr(&mut self) -> SRCADDR_W<0> { - SRCADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn srcaddr(&mut self) -> SrcaddrW { + SrcaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch4_src](index.html) module"] -pub struct CH4_SRC_SPEC; -impl crate::RegisterSpec for CH4_SRC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_src::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_src::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch4SrcSpec; +impl crate::RegisterSpec for Ch4SrcSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch4_src::R](R) reader structure"] -impl crate::Readable for CH4_SRC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch4_src::W](W) writer structure"] -impl crate::Writable for CH4_SRC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch4_src::R`](R) reader structure"] +impl crate::Readable for Ch4SrcSpec {} +#[doc = "`write(|w| ..)` method takes [`ch4_src::W`](W) writer structure"] +impl crate::Writable for Ch4SrcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH4_SRC to value 0"] -impl crate::Resettable for CH4_SRC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch4SrcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch5_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch5_cfg.rs index e8836be..0873c61 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch5_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch5_cfg.rs @@ -1,277 +1,250 @@ #[doc = "Register `CH5_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH5_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] -pub type ARBSLOTS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Arbitration Slot Number Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ARBSLOTS_A { +pub enum Arbslots { #[doc = "0: One arbitration slot selected"] - ONE = 0, + One = 0, #[doc = "1: Two arbitration slots selected"] - TWO = 1, + Two = 1, #[doc = "2: Four arbitration slots selected"] - FOUR = 2, + Four = 2, #[doc = "3: Eight arbitration slots selected"] - EIGHT = 3, + Eight = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ARBSLOTS_A) -> Self { + fn from(variant: Arbslots) -> Self { variant as _ } } -impl ARBSLOTS_R { +impl crate::FieldSpec for Arbslots { + type Ux = u8; +} +impl crate::IsEnum for Arbslots {} +#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] +pub type ArbslotsR = crate::FieldReader; +impl ArbslotsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ARBSLOTS_A { + pub const fn variant(&self) -> Arbslots { match self.bits { - 0 => ARBSLOTS_A::ONE, - 1 => ARBSLOTS_A::TWO, - 2 => ARBSLOTS_A::FOUR, - 3 => ARBSLOTS_A::EIGHT, + 0 => Arbslots::One, + 1 => Arbslots::Two, + 2 => Arbslots::Four, + 3 => Arbslots::Eight, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "One arbitration slot selected"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == ARBSLOTS_A::ONE + *self == Arbslots::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Two arbitration slots selected"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == ARBSLOTS_A::TWO + *self == Arbslots::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Four arbitration slots selected"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == ARBSLOTS_A::FOUR + *self == Arbslots::Four } - #[doc = "Checks if the value of the field is `EIGHT`"] + #[doc = "Eight arbitration slots selected"] #[inline(always)] pub fn is_eight(&self) -> bool { - *self == ARBSLOTS_A::EIGHT + *self == Arbslots::Eight } } #[doc = "Field `ARBSLOTS` writer - Arbitration Slot Number Select"] -pub type ARBSLOTS_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH5_CFG_SPEC, u8, ARBSLOTS_A, 2, O>; -impl<'a, const O: u8> ARBSLOTS_W<'a, O> { +pub type ArbslotsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Arbslots, crate::Safe>; +impl<'a, REG> ArbslotsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One arbitration slot selected"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(ARBSLOTS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Arbslots::One) } #[doc = "Two arbitration slots selected"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(ARBSLOTS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Arbslots::Two) } #[doc = "Four arbitration slots selected"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(ARBSLOTS_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Arbslots::Four) } #[doc = "Eight arbitration slots selected"] #[inline(always)] - pub fn eight(self) -> &'a mut W { - self.variant(ARBSLOTS_A::EIGHT) + pub fn eight(self) -> &'a mut crate::W { + self.variant(Arbslots::Eight) } } -#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] -pub type SRCINCSIGN_R = crate::BitReader; #[doc = "Source Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCINCSIGN_A { +pub enum Srcincsign { #[doc = "0: Increment source address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement source address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCINCSIGN_A) -> Self { + fn from(variant: Srcincsign) -> Self { variant as u8 != 0 } } -impl SRCINCSIGN_R { +#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] +pub type SrcincsignR = crate::BitReader; +impl SrcincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINCSIGN_A { + pub const fn variant(&self) -> Srcincsign { match self.bits { - false => SRCINCSIGN_A::POSITIVE, - true => SRCINCSIGN_A::NEGATIVE, + false => Srcincsign::Positive, + true => Srcincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment source address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == SRCINCSIGN_A::POSITIVE + *self == Srcincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement source address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == SRCINCSIGN_A::NEGATIVE + *self == Srcincsign::Negative } } #[doc = "Field `SRCINCSIGN` writer - Source Address Increment Sign"] -pub type SRCINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH5_CFG_SPEC, SRCINCSIGN_A, O>; -impl<'a, const O: u8> SRCINCSIGN_W<'a, O> { +pub type SrcincsignW<'a, REG> = crate::BitWriter<'a, REG, Srcincsign>; +impl<'a, REG> SrcincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment source address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Srcincsign::Positive) } #[doc = "Decrement source address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Srcincsign::Negative) } } -#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] -pub type DSTINCSIGN_R = crate::BitReader; #[doc = "Destination Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTINCSIGN_A { +pub enum Dstincsign { #[doc = "0: Increment destination address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement destination address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTINCSIGN_A) -> Self { + fn from(variant: Dstincsign) -> Self { variant as u8 != 0 } } -impl DSTINCSIGN_R { +#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] +pub type DstincsignR = crate::BitReader; +impl DstincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINCSIGN_A { + pub const fn variant(&self) -> Dstincsign { match self.bits { - false => DSTINCSIGN_A::POSITIVE, - true => DSTINCSIGN_A::NEGATIVE, + false => Dstincsign::Positive, + true => Dstincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment destination address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == DSTINCSIGN_A::POSITIVE + *self == Dstincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement destination address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == DSTINCSIGN_A::NEGATIVE + *self == Dstincsign::Negative } } #[doc = "Field `DSTINCSIGN` writer - Destination Address Increment Sign"] -pub type DSTINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH5_CFG_SPEC, DSTINCSIGN_A, O>; -impl<'a, const O: u8> DSTINCSIGN_W<'a, O> { +pub type DstincsignW<'a, REG> = crate::BitWriter<'a, REG, Dstincsign>; +impl<'a, REG> DstincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment destination address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Dstincsign::Positive) } #[doc = "Decrement destination address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Dstincsign::Negative) } } impl R { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] - pub fn arbslots(&self) -> ARBSLOTS_R { - ARBSLOTS_R::new(((self.bits >> 16) & 3) as u8) + pub fn arbslots(&self) -> ArbslotsR { + ArbslotsR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] - pub fn srcincsign(&self) -> SRCINCSIGN_R { - SRCINCSIGN_R::new(((self.bits >> 20) & 1) != 0) + pub fn srcincsign(&self) -> SrcincsignR { + SrcincsignR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] - pub fn dstincsign(&self) -> DSTINCSIGN_R { - DSTINCSIGN_R::new(((self.bits >> 21) & 1) != 0) + pub fn dstincsign(&self) -> DstincsignR { + DstincsignR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] #[must_use] - pub fn arbslots(&mut self) -> ARBSLOTS_W<16> { - ARBSLOTS_W::new(self) + pub fn arbslots(&mut self) -> ArbslotsW { + ArbslotsW::new(self, 16) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] #[must_use] - pub fn srcincsign(&mut self) -> SRCINCSIGN_W<20> { - SRCINCSIGN_W::new(self) + pub fn srcincsign(&mut self) -> SrcincsignW { + SrcincsignW::new(self, 20) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] #[must_use] - pub fn dstincsign(&mut self) -> DSTINCSIGN_W<21> { - DSTINCSIGN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstincsign(&mut self) -> DstincsignW { + DstincsignW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch5_cfg](index.html) module"] -pub struct CH5_CFG_SPEC; -impl crate::RegisterSpec for CH5_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch5CfgSpec; +impl crate::RegisterSpec for Ch5CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch5_cfg::R](R) reader structure"] -impl crate::Readable for CH5_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch5_cfg::W](W) writer structure"] -impl crate::Writable for CH5_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch5_cfg::R`](R) reader structure"] +impl crate::Readable for Ch5CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`ch5_cfg::W`](W) writer structure"] +impl crate::Writable for Ch5CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH5_CFG to value 0"] -impl crate::Resettable for CH5_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch5CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch5_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch5_ctrl.rs index ac51bd3..e124f3d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch5_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch5_ctrl.rs @@ -1,843 +1,842 @@ #[doc = "Register `CH5_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH5_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] -pub type STRUCTTYPE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DMA Structure Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STRUCTTYPE_A { +pub enum Structtype { #[doc = "0: DMA transfer structure type selected."] - TRANSFER = 0, + Transfer = 0, #[doc = "1: Synchronization structure type selected."] - SYNCHRONIZE = 1, + Synchronize = 1, #[doc = "2: Write immediate value structure type selected."] - WRITE = 2, + Write = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STRUCTTYPE_A) -> Self { + fn from(variant: Structtype) -> Self { variant as _ } } -impl STRUCTTYPE_R { +impl crate::FieldSpec for Structtype { + type Ux = u8; +} +impl crate::IsEnum for Structtype {} +#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] +pub type StructtypeR = crate::FieldReader; +impl StructtypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(STRUCTTYPE_A::TRANSFER), - 1 => Some(STRUCTTYPE_A::SYNCHRONIZE), - 2 => Some(STRUCTTYPE_A::WRITE), + 0 => Some(Structtype::Transfer), + 1 => Some(Structtype::Synchronize), + 2 => Some(Structtype::Write), _ => None, } } - #[doc = "Checks if the value of the field is `TRANSFER`"] + #[doc = "DMA transfer structure type selected."] #[inline(always)] pub fn is_transfer(&self) -> bool { - *self == STRUCTTYPE_A::TRANSFER + *self == Structtype::Transfer } - #[doc = "Checks if the value of the field is `SYNCHRONIZE`"] + #[doc = "Synchronization structure type selected."] #[inline(always)] pub fn is_synchronize(&self) -> bool { - *self == STRUCTTYPE_A::SYNCHRONIZE + *self == Structtype::Synchronize } - #[doc = "Checks if the value of the field is `WRITE`"] + #[doc = "Write immediate value structure type selected."] #[inline(always)] pub fn is_write(&self) -> bool { - *self == STRUCTTYPE_A::WRITE + *self == Structtype::Write } } #[doc = "Field `STRUCTTYPE` writer - DMA Structure Type"] -pub type STRUCTTYPE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH5_CTRL_SPEC, u8, STRUCTTYPE_A, 2, O>; -impl<'a, const O: u8> STRUCTTYPE_W<'a, O> { +pub type StructtypeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Structtype>; +impl<'a, REG> StructtypeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "DMA transfer structure type selected."] #[inline(always)] - pub fn transfer(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::TRANSFER) + pub fn transfer(self) -> &'a mut crate::W { + self.variant(Structtype::Transfer) } #[doc = "Synchronization structure type selected."] #[inline(always)] - pub fn synchronize(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::SYNCHRONIZE) + pub fn synchronize(self) -> &'a mut crate::W { + self.variant(Structtype::Synchronize) } #[doc = "Write immediate value structure type selected."] #[inline(always)] - pub fn write(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::WRITE) + pub fn write(self) -> &'a mut crate::W { + self.variant(Structtype::Write) } } #[doc = "Field `STRUCTREQ` reader - Structure DMA Transfer Request"] -pub type STRUCTREQ_R = crate::BitReader; +pub type StructreqR = crate::BitReader; #[doc = "Field `XFERCNT` reader - DMA Unit Data Transfer Count"] -pub type XFERCNT_R = crate::FieldReader; +pub type XfercntR = crate::FieldReader; #[doc = "Field `XFERCNT` writer - DMA Unit Data Transfer Count"] -pub type XFERCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH5_CTRL_SPEC, u16, u16, 11, O>; +pub type XfercntW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `BYTESWAP` reader - Endian Byte Swap"] -pub type BYTESWAP_R = crate::BitReader; +pub type ByteswapR = crate::BitReader; #[doc = "Field `BYTESWAP` writer - Endian Byte Swap"] -pub type BYTESWAP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH5_CTRL_SPEC, bool, O>; -#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] -pub type BLOCKSIZE_R = crate::FieldReader; +pub type ByteswapW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Block Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BLOCKSIZE_A { +pub enum Blocksize { #[doc = "0: One unit transfer per arbitration"] - UNIT1 = 0, + Unit1 = 0, #[doc = "1: Two unit transfers per arbitration"] - UNIT2 = 1, + Unit2 = 1, #[doc = "2: Three unit transfers per arbitration"] - UNIT3 = 2, + Unit3 = 2, #[doc = "3: Four unit transfers per arbitration"] - UNIT4 = 3, + Unit4 = 3, #[doc = "4: Six unit transfers per arbitration"] - UNIT6 = 4, + Unit6 = 4, #[doc = "5: Eight unit transfers per arbitration"] - UNIT8 = 5, + Unit8 = 5, #[doc = "7: Sixteen unit transfers per arbitration"] - UNIT16 = 7, + Unit16 = 7, #[doc = "9: 32 unit transfers per arbitration"] - UNIT32 = 9, + Unit32 = 9, #[doc = "10: 64 unit transfers per arbitration"] - UNIT64 = 10, + Unit64 = 10, #[doc = "11: 128 unit transfers per arbitration"] - UNIT128 = 11, + Unit128 = 11, #[doc = "12: 256 unit transfers per arbitration"] - UNIT256 = 12, + Unit256 = 12, #[doc = "13: 512 unit transfers per arbitration"] - UNIT512 = 13, + Unit512 = 13, #[doc = "14: 1024 unit transfers per arbitration"] - UNIT1024 = 14, + Unit1024 = 14, #[doc = "15: Transfer all units as specified by the XFRCNT field"] - ALL = 15, + All = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BLOCKSIZE_A) -> Self { + fn from(variant: Blocksize) -> Self { variant as _ } } -impl BLOCKSIZE_R { +impl crate::FieldSpec for Blocksize { + type Ux = u8; +} +impl crate::IsEnum for Blocksize {} +#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] +pub type BlocksizeR = crate::FieldReader; +impl BlocksizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BLOCKSIZE_A::UNIT1), - 1 => Some(BLOCKSIZE_A::UNIT2), - 2 => Some(BLOCKSIZE_A::UNIT3), - 3 => Some(BLOCKSIZE_A::UNIT4), - 4 => Some(BLOCKSIZE_A::UNIT6), - 5 => Some(BLOCKSIZE_A::UNIT8), - 7 => Some(BLOCKSIZE_A::UNIT16), - 9 => Some(BLOCKSIZE_A::UNIT32), - 10 => Some(BLOCKSIZE_A::UNIT64), - 11 => Some(BLOCKSIZE_A::UNIT128), - 12 => Some(BLOCKSIZE_A::UNIT256), - 13 => Some(BLOCKSIZE_A::UNIT512), - 14 => Some(BLOCKSIZE_A::UNIT1024), - 15 => Some(BLOCKSIZE_A::ALL), + 0 => Some(Blocksize::Unit1), + 1 => Some(Blocksize::Unit2), + 2 => Some(Blocksize::Unit3), + 3 => Some(Blocksize::Unit4), + 4 => Some(Blocksize::Unit6), + 5 => Some(Blocksize::Unit8), + 7 => Some(Blocksize::Unit16), + 9 => Some(Blocksize::Unit32), + 10 => Some(Blocksize::Unit64), + 11 => Some(Blocksize::Unit128), + 12 => Some(Blocksize::Unit256), + 13 => Some(Blocksize::Unit512), + 14 => Some(Blocksize::Unit1024), + 15 => Some(Blocksize::All), _ => None, } } - #[doc = "Checks if the value of the field is `UNIT1`"] + #[doc = "One unit transfer per arbitration"] #[inline(always)] pub fn is_unit1(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1 + *self == Blocksize::Unit1 } - #[doc = "Checks if the value of the field is `UNIT2`"] + #[doc = "Two unit transfers per arbitration"] #[inline(always)] pub fn is_unit2(&self) -> bool { - *self == BLOCKSIZE_A::UNIT2 + *self == Blocksize::Unit2 } - #[doc = "Checks if the value of the field is `UNIT3`"] + #[doc = "Three unit transfers per arbitration"] #[inline(always)] pub fn is_unit3(&self) -> bool { - *self == BLOCKSIZE_A::UNIT3 + *self == Blocksize::Unit3 } - #[doc = "Checks if the value of the field is `UNIT4`"] + #[doc = "Four unit transfers per arbitration"] #[inline(always)] pub fn is_unit4(&self) -> bool { - *self == BLOCKSIZE_A::UNIT4 + *self == Blocksize::Unit4 } - #[doc = "Checks if the value of the field is `UNIT6`"] + #[doc = "Six unit transfers per arbitration"] #[inline(always)] pub fn is_unit6(&self) -> bool { - *self == BLOCKSIZE_A::UNIT6 + *self == Blocksize::Unit6 } - #[doc = "Checks if the value of the field is `UNIT8`"] + #[doc = "Eight unit transfers per arbitration"] #[inline(always)] pub fn is_unit8(&self) -> bool { - *self == BLOCKSIZE_A::UNIT8 + *self == Blocksize::Unit8 } - #[doc = "Checks if the value of the field is `UNIT16`"] + #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] pub fn is_unit16(&self) -> bool { - *self == BLOCKSIZE_A::UNIT16 + *self == Blocksize::Unit16 } - #[doc = "Checks if the value of the field is `UNIT32`"] + #[doc = "32 unit transfers per arbitration"] #[inline(always)] pub fn is_unit32(&self) -> bool { - *self == BLOCKSIZE_A::UNIT32 + *self == Blocksize::Unit32 } - #[doc = "Checks if the value of the field is `UNIT64`"] + #[doc = "64 unit transfers per arbitration"] #[inline(always)] pub fn is_unit64(&self) -> bool { - *self == BLOCKSIZE_A::UNIT64 + *self == Blocksize::Unit64 } - #[doc = "Checks if the value of the field is `UNIT128`"] + #[doc = "128 unit transfers per arbitration"] #[inline(always)] pub fn is_unit128(&self) -> bool { - *self == BLOCKSIZE_A::UNIT128 + *self == Blocksize::Unit128 } - #[doc = "Checks if the value of the field is `UNIT256`"] + #[doc = "256 unit transfers per arbitration"] #[inline(always)] pub fn is_unit256(&self) -> bool { - *self == BLOCKSIZE_A::UNIT256 + *self == Blocksize::Unit256 } - #[doc = "Checks if the value of the field is `UNIT512`"] + #[doc = "512 unit transfers per arbitration"] #[inline(always)] pub fn is_unit512(&self) -> bool { - *self == BLOCKSIZE_A::UNIT512 + *self == Blocksize::Unit512 } - #[doc = "Checks if the value of the field is `UNIT1024`"] + #[doc = "1024 unit transfers per arbitration"] #[inline(always)] pub fn is_unit1024(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1024 + *self == Blocksize::Unit1024 } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] pub fn is_all(&self) -> bool { - *self == BLOCKSIZE_A::ALL + *self == Blocksize::All } } #[doc = "Field `BLOCKSIZE` writer - Block Transfer Size"] -pub type BLOCKSIZE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH5_CTRL_SPEC, u8, BLOCKSIZE_A, 4, O>; -impl<'a, const O: u8> BLOCKSIZE_W<'a, O> { +pub type BlocksizeW<'a, REG> = crate::FieldWriter<'a, REG, 4, Blocksize>; +impl<'a, REG> BlocksizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One unit transfer per arbitration"] #[inline(always)] - pub fn unit1(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1) + pub fn unit1(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1) } #[doc = "Two unit transfers per arbitration"] #[inline(always)] - pub fn unit2(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT2) + pub fn unit2(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit2) } #[doc = "Three unit transfers per arbitration"] #[inline(always)] - pub fn unit3(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT3) + pub fn unit3(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit3) } #[doc = "Four unit transfers per arbitration"] #[inline(always)] - pub fn unit4(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT4) + pub fn unit4(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit4) } #[doc = "Six unit transfers per arbitration"] #[inline(always)] - pub fn unit6(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT6) + pub fn unit6(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit6) } #[doc = "Eight unit transfers per arbitration"] #[inline(always)] - pub fn unit8(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT8) + pub fn unit8(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit8) } #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] - pub fn unit16(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT16) + pub fn unit16(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit16) } #[doc = "32 unit transfers per arbitration"] #[inline(always)] - pub fn unit32(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT32) + pub fn unit32(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit32) } #[doc = "64 unit transfers per arbitration"] #[inline(always)] - pub fn unit64(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT64) + pub fn unit64(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit64) } #[doc = "128 unit transfers per arbitration"] #[inline(always)] - pub fn unit128(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT128) + pub fn unit128(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit128) } #[doc = "256 unit transfers per arbitration"] #[inline(always)] - pub fn unit256(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT256) + pub fn unit256(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit256) } #[doc = "512 unit transfers per arbitration"] #[inline(always)] - pub fn unit512(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT512) + pub fn unit512(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit512) } #[doc = "1024 unit transfers per arbitration"] #[inline(always)] - pub fn unit1024(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1024) + pub fn unit1024(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1024) } #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Blocksize::All) } } #[doc = "Field `DONEIEN` reader - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_R = crate::BitReader; +pub type DoneienR = crate::BitReader; #[doc = "Field `DONEIEN` writer - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH5_CTRL_SPEC, bool, O>; -#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] -pub type REQMODE_R = crate::BitReader; +pub type DoneienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "DMA Request Transfer Mode Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REQMODE_A { +pub enum Reqmode { #[doc = "0: The LDMA transfers one BLOCKSIZE per transfer request."] - BLOCK = 0, + Block = 0, #[doc = "1: One transfer request transfers all units as defined by the XFRCNT field."] - ALL = 1, + All = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REQMODE_A) -> Self { + fn from(variant: Reqmode) -> Self { variant as u8 != 0 } } -impl REQMODE_R { +#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] +pub type ReqmodeR = crate::BitReader; +impl ReqmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REQMODE_A { + pub const fn variant(&self) -> Reqmode { match self.bits { - false => REQMODE_A::BLOCK, - true => REQMODE_A::ALL, + false => Reqmode::Block, + true => Reqmode::All, } } - #[doc = "Checks if the value of the field is `BLOCK`"] + #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] pub fn is_block(&self) -> bool { - *self == REQMODE_A::BLOCK + *self == Reqmode::Block } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] pub fn is_all(&self) -> bool { - *self == REQMODE_A::ALL + *self == Reqmode::All } } #[doc = "Field `REQMODE` writer - DMA Request Transfer Mode Select"] -pub type REQMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH5_CTRL_SPEC, REQMODE_A, O>; -impl<'a, const O: u8> REQMODE_W<'a, O> { +pub type ReqmodeW<'a, REG> = crate::BitWriter<'a, REG, Reqmode>; +impl<'a, REG> ReqmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] - pub fn block(self) -> &'a mut W { - self.variant(REQMODE_A::BLOCK) + pub fn block(self) -> &'a mut crate::W { + self.variant(Reqmode::Block) } #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(REQMODE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Reqmode::All) } } #[doc = "Field `DECLOOPCNT` reader - Decrement Loop Count"] -pub type DECLOOPCNT_R = crate::BitReader; +pub type DecloopcntR = crate::BitReader; #[doc = "Field `DECLOOPCNT` writer - Decrement Loop Count"] -pub type DECLOOPCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH5_CTRL_SPEC, bool, O>; +pub type DecloopcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IGNORESREQ` reader - Ignore Sreq"] -pub type IGNORESREQ_R = crate::BitReader; +pub type IgnoresreqR = crate::BitReader; #[doc = "Field `IGNORESREQ` writer - Ignore Sreq"] -pub type IGNORESREQ_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH5_CTRL_SPEC, bool, O>; -#[doc = "Field `SRCINC` reader - Source Address Increment Size"] -pub type SRCINC_R = crate::FieldReader; +pub type IgnoresreqW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SRCINC_A { +pub enum Srcinc { #[doc = "0: Increment source address by one unit data size after each read"] - ONE = 0, + One = 0, #[doc = "1: Increment source address by two unit data sizes after each read"] - TWO = 1, + Two = 1, #[doc = "2: Increment source address by four unit data sizes after each read"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SRCINC_A) -> Self { + fn from(variant: Srcinc) -> Self { variant as _ } } -impl SRCINC_R { +impl crate::FieldSpec for Srcinc { + type Ux = u8; +} +impl crate::IsEnum for Srcinc {} +#[doc = "Field `SRCINC` reader - Source Address Increment Size"] +pub type SrcincR = crate::FieldReader; +impl SrcincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINC_A { + pub const fn variant(&self) -> Srcinc { match self.bits { - 0 => SRCINC_A::ONE, - 1 => SRCINC_A::TWO, - 2 => SRCINC_A::FOUR, - 3 => SRCINC_A::NONE, + 0 => Srcinc::One, + 1 => Srcinc::Two, + 2 => Srcinc::Four, + 3 => Srcinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == SRCINC_A::ONE + *self == Srcinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == SRCINC_A::TWO + *self == Srcinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == SRCINC_A::FOUR + *self == Srcinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SRCINC_A::NONE + *self == Srcinc::None } } #[doc = "Field `SRCINC` writer - Source Address Increment Size"] -pub type SRCINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH5_CTRL_SPEC, u8, SRCINC_A, 2, O>; -impl<'a, const O: u8> SRCINC_W<'a, O> { +pub type SrcincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Srcinc, crate::Safe>; +impl<'a, REG> SrcincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(SRCINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Srcinc::One) } #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(SRCINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Srcinc::Two) } #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(SRCINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Srcinc::Four) } #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SRCINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Srcinc::None) } } -#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] -pub type SIZE_R = crate::FieldReader; #[doc = "Unit Data Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIZE_A { +pub enum Size { #[doc = "0: Each unit transfer is a byte"] - BYTE = 0, + Byte = 0, #[doc = "1: Each unit transfer is a half-word"] - HALFWORD = 1, + Halfword = 1, #[doc = "2: Each unit transfer is a word"] - WORD = 2, + Word = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIZE_A) -> Self { + fn from(variant: Size) -> Self { variant as _ } } -impl SIZE_R { +impl crate::FieldSpec for Size { + type Ux = u8; +} +impl crate::IsEnum for Size {} +#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] +pub type SizeR = crate::FieldReader; +impl SizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIZE_A::BYTE), - 1 => Some(SIZE_A::HALFWORD), - 2 => Some(SIZE_A::WORD), + 0 => Some(Size::Byte), + 1 => Some(Size::Halfword), + 2 => Some(Size::Word), _ => None, } } - #[doc = "Checks if the value of the field is `BYTE`"] + #[doc = "Each unit transfer is a byte"] #[inline(always)] pub fn is_byte(&self) -> bool { - *self == SIZE_A::BYTE + *self == Size::Byte } - #[doc = "Checks if the value of the field is `HALFWORD`"] + #[doc = "Each unit transfer is a half-word"] #[inline(always)] pub fn is_halfword(&self) -> bool { - *self == SIZE_A::HALFWORD + *self == Size::Halfword } - #[doc = "Checks if the value of the field is `WORD`"] + #[doc = "Each unit transfer is a word"] #[inline(always)] pub fn is_word(&self) -> bool { - *self == SIZE_A::WORD + *self == Size::Word } } #[doc = "Field `SIZE` writer - Unit Data Transfer Size"] -pub type SIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH5_CTRL_SPEC, u8, SIZE_A, 2, O>; -impl<'a, const O: u8> SIZE_W<'a, O> { +pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Size>; +impl<'a, REG> SizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Each unit transfer is a byte"] #[inline(always)] - pub fn byte(self) -> &'a mut W { - self.variant(SIZE_A::BYTE) + pub fn byte(self) -> &'a mut crate::W { + self.variant(Size::Byte) } #[doc = "Each unit transfer is a half-word"] #[inline(always)] - pub fn halfword(self) -> &'a mut W { - self.variant(SIZE_A::HALFWORD) + pub fn halfword(self) -> &'a mut crate::W { + self.variant(Size::Halfword) } #[doc = "Each unit transfer is a word"] #[inline(always)] - pub fn word(self) -> &'a mut W { - self.variant(SIZE_A::WORD) + pub fn word(self) -> &'a mut crate::W { + self.variant(Size::Word) } } -#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] -pub type DSTINC_R = crate::FieldReader; #[doc = "Destination Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DSTINC_A { +pub enum Dstinc { #[doc = "0: Increment destination address by one unit data size after each write"] - ONE = 0, + One = 0, #[doc = "1: Increment destination address by two unit data sizes after each write"] - TWO = 1, + Two = 1, #[doc = "2: Increment destination address by four unit data sizes after each write"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DSTINC_A) -> Self { + fn from(variant: Dstinc) -> Self { variant as _ } } -impl DSTINC_R { +impl crate::FieldSpec for Dstinc { + type Ux = u8; +} +impl crate::IsEnum for Dstinc {} +#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] +pub type DstincR = crate::FieldReader; +impl DstincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINC_A { + pub const fn variant(&self) -> Dstinc { match self.bits { - 0 => DSTINC_A::ONE, - 1 => DSTINC_A::TWO, - 2 => DSTINC_A::FOUR, - 3 => DSTINC_A::NONE, + 0 => Dstinc::One, + 1 => Dstinc::Two, + 2 => Dstinc::Four, + 3 => Dstinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == DSTINC_A::ONE + *self == Dstinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == DSTINC_A::TWO + *self == Dstinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == DSTINC_A::FOUR + *self == Dstinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == DSTINC_A::NONE + *self == Dstinc::None } } #[doc = "Field `DSTINC` writer - Destination Address Increment Size"] -pub type DSTINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH5_CTRL_SPEC, u8, DSTINC_A, 2, O>; -impl<'a, const O: u8> DSTINC_W<'a, O> { +pub type DstincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dstinc, crate::Safe>; +impl<'a, REG> DstincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(DSTINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Dstinc::One) } #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(DSTINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Dstinc::Two) } #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(DSTINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Dstinc::Four) } #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(DSTINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Dstinc::None) } } -#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] -pub type SRCMODE_R = crate::BitReader; #[doc = "Source Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCMODE_A { +pub enum Srcmode { #[doc = "0: The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCMODE_A) -> Self { + fn from(variant: Srcmode) -> Self { variant as u8 != 0 } } -impl SRCMODE_R { +#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] +pub type SrcmodeR = crate::BitReader; +impl SrcmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCMODE_A { + pub const fn variant(&self) -> Srcmode { match self.bits { - false => SRCMODE_A::ABSOLUTE, - true => SRCMODE_A::RELATIVE, + false => Srcmode::Absolute, + true => Srcmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == SRCMODE_A::ABSOLUTE + *self == Srcmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == SRCMODE_A::RELATIVE + *self == Srcmode::Relative } } -#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] -pub type DSTMODE_R = crate::BitReader; #[doc = "Destination Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTMODE_A { +pub enum Dstmode { #[doc = "0: The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTMODE_A) -> Self { + fn from(variant: Dstmode) -> Self { variant as u8 != 0 } } -impl DSTMODE_R { +#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] +pub type DstmodeR = crate::BitReader; +impl DstmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTMODE_A { + pub const fn variant(&self) -> Dstmode { match self.bits { - false => DSTMODE_A::ABSOLUTE, - true => DSTMODE_A::RELATIVE, + false => Dstmode::Absolute, + true => Dstmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == DSTMODE_A::ABSOLUTE + *self == Dstmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == DSTMODE_A::RELATIVE + *self == Dstmode::Relative } } impl R { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] - pub fn structtype(&self) -> STRUCTTYPE_R { - STRUCTTYPE_R::new((self.bits & 3) as u8) + pub fn structtype(&self) -> StructtypeR { + StructtypeR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Structure DMA Transfer Request"] #[inline(always)] - pub fn structreq(&self) -> STRUCTREQ_R { - STRUCTREQ_R::new(((self.bits >> 3) & 1) != 0) + pub fn structreq(&self) -> StructreqR { + StructreqR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] - pub fn xfercnt(&self) -> XFERCNT_R { - XFERCNT_R::new(((self.bits >> 4) & 0x07ff) as u16) + pub fn xfercnt(&self) -> XfercntR { + XfercntR::new(((self.bits >> 4) & 0x07ff) as u16) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] - pub fn byteswap(&self) -> BYTESWAP_R { - BYTESWAP_R::new(((self.bits >> 15) & 1) != 0) + pub fn byteswap(&self) -> ByteswapR { + ByteswapR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] - pub fn blocksize(&self) -> BLOCKSIZE_R { - BLOCKSIZE_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn blocksize(&self) -> BlocksizeR { + BlocksizeR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] - pub fn doneien(&self) -> DONEIEN_R { - DONEIEN_R::new(((self.bits >> 20) & 1) != 0) + pub fn doneien(&self) -> DoneienR { + DoneienR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] - pub fn reqmode(&self) -> REQMODE_R { - REQMODE_R::new(((self.bits >> 21) & 1) != 0) + pub fn reqmode(&self) -> ReqmodeR { + ReqmodeR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] - pub fn decloopcnt(&self) -> DECLOOPCNT_R { - DECLOOPCNT_R::new(((self.bits >> 22) & 1) != 0) + pub fn decloopcnt(&self) -> DecloopcntR { + DecloopcntR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] - pub fn ignoresreq(&self) -> IGNORESREQ_R { - IGNORESREQ_R::new(((self.bits >> 23) & 1) != 0) + pub fn ignoresreq(&self) -> IgnoresreqR { + IgnoresreqR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] - pub fn srcinc(&self) -> SRCINC_R { - SRCINC_R::new(((self.bits >> 24) & 3) as u8) + pub fn srcinc(&self) -> SrcincR { + SrcincR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] - pub fn size(&self) -> SIZE_R { - SIZE_R::new(((self.bits >> 26) & 3) as u8) + pub fn size(&self) -> SizeR { + SizeR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] - pub fn dstinc(&self) -> DSTINC_R { - DSTINC_R::new(((self.bits >> 28) & 3) as u8) + pub fn dstinc(&self) -> DstincR { + DstincR::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bit 30 - Source Addressing Mode"] #[inline(always)] - pub fn srcmode(&self) -> SRCMODE_R { - SRCMODE_R::new(((self.bits >> 30) & 1) != 0) + pub fn srcmode(&self) -> SrcmodeR { + SrcmodeR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Destination Addressing Mode"] #[inline(always)] - pub fn dstmode(&self) -> DSTMODE_R { - DSTMODE_R::new(((self.bits >> 31) & 1) != 0) + pub fn dstmode(&self) -> DstmodeR { + DstmodeR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] #[must_use] - pub fn structtype(&mut self) -> STRUCTTYPE_W<0> { - STRUCTTYPE_W::new(self) + pub fn structtype(&mut self) -> StructtypeW { + StructtypeW::new(self, 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] #[must_use] - pub fn xfercnt(&mut self) -> XFERCNT_W<4> { - XFERCNT_W::new(self) + pub fn xfercnt(&mut self) -> XfercntW { + XfercntW::new(self, 4) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] #[must_use] - pub fn byteswap(&mut self) -> BYTESWAP_W<15> { - BYTESWAP_W::new(self) + pub fn byteswap(&mut self) -> ByteswapW { + ByteswapW::new(self, 15) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] #[must_use] - pub fn blocksize(&mut self) -> BLOCKSIZE_W<16> { - BLOCKSIZE_W::new(self) + pub fn blocksize(&mut self) -> BlocksizeW { + BlocksizeW::new(self, 16) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] #[must_use] - pub fn doneien(&mut self) -> DONEIEN_W<20> { - DONEIEN_W::new(self) + pub fn doneien(&mut self) -> DoneienW { + DoneienW::new(self, 20) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] #[must_use] - pub fn reqmode(&mut self) -> REQMODE_W<21> { - REQMODE_W::new(self) + pub fn reqmode(&mut self) -> ReqmodeW { + ReqmodeW::new(self, 21) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] #[must_use] - pub fn decloopcnt(&mut self) -> DECLOOPCNT_W<22> { - DECLOOPCNT_W::new(self) + pub fn decloopcnt(&mut self) -> DecloopcntW { + DecloopcntW::new(self, 22) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] #[must_use] - pub fn ignoresreq(&mut self) -> IGNORESREQ_W<23> { - IGNORESREQ_W::new(self) + pub fn ignoresreq(&mut self) -> IgnoresreqW { + IgnoresreqW::new(self, 23) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] #[must_use] - pub fn srcinc(&mut self) -> SRCINC_W<24> { - SRCINC_W::new(self) + pub fn srcinc(&mut self) -> SrcincW { + SrcincW::new(self, 24) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SIZE_W<26> { - SIZE_W::new(self) + pub fn size(&mut self) -> SizeW { + SizeW::new(self, 26) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] #[must_use] - pub fn dstinc(&mut self) -> DSTINC_W<28> { - DSTINC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstinc(&mut self) -> DstincW { + DstincW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch5_ctrl](index.html) module"] -pub struct CH5_CTRL_SPEC; -impl crate::RegisterSpec for CH5_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch5CtrlSpec; +impl crate::RegisterSpec for Ch5CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch5_ctrl::R](R) reader structure"] -impl crate::Readable for CH5_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch5_ctrl::W](W) writer structure"] -impl crate::Writable for CH5_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch5_ctrl::R`](R) reader structure"] +impl crate::Readable for Ch5CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ch5_ctrl::W`](W) writer structure"] +impl crate::Writable for Ch5CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH5_CTRL to value 0"] -impl crate::Resettable for CH5_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch5CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch5_dst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch5_dst.rs index ec85b87..95a5b1b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch5_dst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch5_dst.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH5_DST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH5_DST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DSTADDR` reader - Destination Data Address"] -pub type DSTADDR_R = crate::FieldReader; +pub type DstaddrR = crate::FieldReader; #[doc = "Field `DSTADDR` writer - Destination Data Address"] -pub type DSTADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH5_DST_SPEC, u32, u32, 32, O>; +pub type DstaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] - pub fn dstaddr(&self) -> DSTADDR_R { - DSTADDR_R::new(self.bits) + pub fn dstaddr(&self) -> DstaddrR { + DstaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] #[must_use] - pub fn dstaddr(&mut self) -> DSTADDR_W<0> { - DSTADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstaddr(&mut self) -> DstaddrW { + DstaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch5_dst](index.html) module"] -pub struct CH5_DST_SPEC; -impl crate::RegisterSpec for CH5_DST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_dst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_dst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch5DstSpec; +impl crate::RegisterSpec for Ch5DstSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch5_dst::R](R) reader structure"] -impl crate::Readable for CH5_DST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch5_dst::W](W) writer structure"] -impl crate::Writable for CH5_DST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch5_dst::R`](R) reader structure"] +impl crate::Readable for Ch5DstSpec {} +#[doc = "`write(|w| ..)` method takes [`ch5_dst::W`](W) writer structure"] +impl crate::Writable for Ch5DstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH5_DST to value 0"] -impl crate::Resettable for CH5_DST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch5DstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch5_link.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch5_link.rs index 3a91f31..9da975e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch5_link.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch5_link.rs @@ -1,136 +1,96 @@ #[doc = "Register `CH5_LINK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH5_LINK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] -pub type LINKMODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Link Structure Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LINKMODE_A { +pub enum Linkmode { #[doc = "0: The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LINKMODE_A) -> Self { + fn from(variant: Linkmode) -> Self { variant as u8 != 0 } } -impl LINKMODE_R { +#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] +pub type LinkmodeR = crate::BitReader; +impl LinkmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LINKMODE_A { + pub const fn variant(&self) -> Linkmode { match self.bits { - false => LINKMODE_A::ABSOLUTE, - true => LINKMODE_A::RELATIVE, + false => Linkmode::Absolute, + true => Linkmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == LINKMODE_A::ABSOLUTE + *self == Linkmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == LINKMODE_A::RELATIVE + *self == Linkmode::Relative } } #[doc = "Field `LINK` reader - Link Next Structure"] -pub type LINK_R = crate::BitReader; +pub type LinkR = crate::BitReader; #[doc = "Field `LINK` writer - Link Next Structure"] -pub type LINK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH5_LINK_SPEC, bool, O>; +pub type LinkW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LINKADDR` reader - Link Structure Address"] -pub type LINKADDR_R = crate::FieldReader; +pub type LinkaddrR = crate::FieldReader; #[doc = "Field `LINKADDR` writer - Link Structure Address"] -pub type LINKADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH5_LINK_SPEC, u32, u32, 30, O>; +pub type LinkaddrW<'a, REG> = crate::FieldWriter<'a, REG, 30, u32>; impl R { #[doc = "Bit 0 - Link Structure Addressing Mode"] #[inline(always)] - pub fn linkmode(&self) -> LINKMODE_R { - LINKMODE_R::new((self.bits & 1) != 0) + pub fn linkmode(&self) -> LinkmodeR { + LinkmodeR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] - pub fn link(&self) -> LINK_R { - LINK_R::new(((self.bits >> 1) & 1) != 0) + pub fn link(&self) -> LinkR { + LinkR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] - pub fn linkaddr(&self) -> LINKADDR_R { - LINKADDR_R::new((self.bits >> 2) & 0x3fff_ffff) + pub fn linkaddr(&self) -> LinkaddrR { + LinkaddrR::new((self.bits >> 2) & 0x3fff_ffff) } } impl W { #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] #[must_use] - pub fn link(&mut self) -> LINK_W<1> { - LINK_W::new(self) + pub fn link(&mut self) -> LinkW { + LinkW::new(self, 1) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] #[must_use] - pub fn linkaddr(&mut self) -> LINKADDR_W<2> { - LINKADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn linkaddr(&mut self) -> LinkaddrW { + LinkaddrW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch5_link](index.html) module"] -pub struct CH5_LINK_SPEC; -impl crate::RegisterSpec for CH5_LINK_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_link::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_link::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch5LinkSpec; +impl crate::RegisterSpec for Ch5LinkSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch5_link::R](R) reader structure"] -impl crate::Readable for CH5_LINK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch5_link::W](W) writer structure"] -impl crate::Writable for CH5_LINK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch5_link::R`](R) reader structure"] +impl crate::Readable for Ch5LinkSpec {} +#[doc = "`write(|w| ..)` method takes [`ch5_link::W`](W) writer structure"] +impl crate::Writable for Ch5LinkSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH5_LINK to value 0"] -impl crate::Resettable for CH5_LINK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch5LinkSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch5_loop.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch5_loop.rs index 1dc116e..aa30602 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch5_loop.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch5_loop.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH5_LOOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH5_LOOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOOPCNT` reader - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_R = crate::FieldReader; +pub type LoopcntR = crate::FieldReader; #[doc = "Field `LOOPCNT` writer - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH5_LOOP_SPEC, u8, u8, 8, O>; +pub type LoopcntW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] - pub fn loopcnt(&self) -> LOOPCNT_R { - LOOPCNT_R::new((self.bits & 0xff) as u8) + pub fn loopcnt(&self) -> LoopcntR { + LoopcntR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] #[must_use] - pub fn loopcnt(&mut self) -> LOOPCNT_W<0> { - LOOPCNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn loopcnt(&mut self) -> LoopcntW { + LoopcntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch5_loop](index.html) module"] -pub struct CH5_LOOP_SPEC; -impl crate::RegisterSpec for CH5_LOOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_loop::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_loop::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch5LoopSpec; +impl crate::RegisterSpec for Ch5LoopSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch5_loop::R](R) reader structure"] -impl crate::Readable for CH5_LOOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch5_loop::W](W) writer structure"] -impl crate::Writable for CH5_LOOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch5_loop::R`](R) reader structure"] +impl crate::Readable for Ch5LoopSpec {} +#[doc = "`write(|w| ..)` method takes [`ch5_loop::W`](W) writer structure"] +impl crate::Writable for Ch5LoopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH5_LOOP to value 0"] -impl crate::Resettable for CH5_LOOP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch5LoopSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch5_src.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch5_src.rs index 0aaf2da..01944d2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch5_src.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch5_src.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH5_SRC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH5_SRC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SRCADDR` reader - Source Data Address"] -pub type SRCADDR_R = crate::FieldReader; +pub type SrcaddrR = crate::FieldReader; #[doc = "Field `SRCADDR` writer - Source Data Address"] -pub type SRCADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH5_SRC_SPEC, u32, u32, 32, O>; +pub type SrcaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] - pub fn srcaddr(&self) -> SRCADDR_R { - SRCADDR_R::new(self.bits) + pub fn srcaddr(&self) -> SrcaddrR { + SrcaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] #[must_use] - pub fn srcaddr(&mut self) -> SRCADDR_W<0> { - SRCADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn srcaddr(&mut self) -> SrcaddrW { + SrcaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch5_src](index.html) module"] -pub struct CH5_SRC_SPEC; -impl crate::RegisterSpec for CH5_SRC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_src::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_src::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch5SrcSpec; +impl crate::RegisterSpec for Ch5SrcSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch5_src::R](R) reader structure"] -impl crate::Readable for CH5_SRC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch5_src::W](W) writer structure"] -impl crate::Writable for CH5_SRC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch5_src::R`](R) reader structure"] +impl crate::Readable for Ch5SrcSpec {} +#[doc = "`write(|w| ..)` method takes [`ch5_src::W`](W) writer structure"] +impl crate::Writable for Ch5SrcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH5_SRC to value 0"] -impl crate::Resettable for CH5_SRC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch5SrcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch6_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch6_cfg.rs index 3d30289..4e55328 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch6_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch6_cfg.rs @@ -1,277 +1,250 @@ #[doc = "Register `CH6_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH6_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] -pub type ARBSLOTS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Arbitration Slot Number Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ARBSLOTS_A { +pub enum Arbslots { #[doc = "0: One arbitration slot selected"] - ONE = 0, + One = 0, #[doc = "1: Two arbitration slots selected"] - TWO = 1, + Two = 1, #[doc = "2: Four arbitration slots selected"] - FOUR = 2, + Four = 2, #[doc = "3: Eight arbitration slots selected"] - EIGHT = 3, + Eight = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ARBSLOTS_A) -> Self { + fn from(variant: Arbslots) -> Self { variant as _ } } -impl ARBSLOTS_R { +impl crate::FieldSpec for Arbslots { + type Ux = u8; +} +impl crate::IsEnum for Arbslots {} +#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] +pub type ArbslotsR = crate::FieldReader; +impl ArbslotsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ARBSLOTS_A { + pub const fn variant(&self) -> Arbslots { match self.bits { - 0 => ARBSLOTS_A::ONE, - 1 => ARBSLOTS_A::TWO, - 2 => ARBSLOTS_A::FOUR, - 3 => ARBSLOTS_A::EIGHT, + 0 => Arbslots::One, + 1 => Arbslots::Two, + 2 => Arbslots::Four, + 3 => Arbslots::Eight, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "One arbitration slot selected"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == ARBSLOTS_A::ONE + *self == Arbslots::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Two arbitration slots selected"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == ARBSLOTS_A::TWO + *self == Arbslots::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Four arbitration slots selected"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == ARBSLOTS_A::FOUR + *self == Arbslots::Four } - #[doc = "Checks if the value of the field is `EIGHT`"] + #[doc = "Eight arbitration slots selected"] #[inline(always)] pub fn is_eight(&self) -> bool { - *self == ARBSLOTS_A::EIGHT + *self == Arbslots::Eight } } #[doc = "Field `ARBSLOTS` writer - Arbitration Slot Number Select"] -pub type ARBSLOTS_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH6_CFG_SPEC, u8, ARBSLOTS_A, 2, O>; -impl<'a, const O: u8> ARBSLOTS_W<'a, O> { +pub type ArbslotsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Arbslots, crate::Safe>; +impl<'a, REG> ArbslotsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One arbitration slot selected"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(ARBSLOTS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Arbslots::One) } #[doc = "Two arbitration slots selected"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(ARBSLOTS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Arbslots::Two) } #[doc = "Four arbitration slots selected"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(ARBSLOTS_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Arbslots::Four) } #[doc = "Eight arbitration slots selected"] #[inline(always)] - pub fn eight(self) -> &'a mut W { - self.variant(ARBSLOTS_A::EIGHT) + pub fn eight(self) -> &'a mut crate::W { + self.variant(Arbslots::Eight) } } -#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] -pub type SRCINCSIGN_R = crate::BitReader; #[doc = "Source Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCINCSIGN_A { +pub enum Srcincsign { #[doc = "0: Increment source address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement source address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCINCSIGN_A) -> Self { + fn from(variant: Srcincsign) -> Self { variant as u8 != 0 } } -impl SRCINCSIGN_R { +#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] +pub type SrcincsignR = crate::BitReader; +impl SrcincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINCSIGN_A { + pub const fn variant(&self) -> Srcincsign { match self.bits { - false => SRCINCSIGN_A::POSITIVE, - true => SRCINCSIGN_A::NEGATIVE, + false => Srcincsign::Positive, + true => Srcincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment source address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == SRCINCSIGN_A::POSITIVE + *self == Srcincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement source address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == SRCINCSIGN_A::NEGATIVE + *self == Srcincsign::Negative } } #[doc = "Field `SRCINCSIGN` writer - Source Address Increment Sign"] -pub type SRCINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH6_CFG_SPEC, SRCINCSIGN_A, O>; -impl<'a, const O: u8> SRCINCSIGN_W<'a, O> { +pub type SrcincsignW<'a, REG> = crate::BitWriter<'a, REG, Srcincsign>; +impl<'a, REG> SrcincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment source address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Srcincsign::Positive) } #[doc = "Decrement source address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Srcincsign::Negative) } } -#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] -pub type DSTINCSIGN_R = crate::BitReader; #[doc = "Destination Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTINCSIGN_A { +pub enum Dstincsign { #[doc = "0: Increment destination address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement destination address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTINCSIGN_A) -> Self { + fn from(variant: Dstincsign) -> Self { variant as u8 != 0 } } -impl DSTINCSIGN_R { +#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] +pub type DstincsignR = crate::BitReader; +impl DstincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINCSIGN_A { + pub const fn variant(&self) -> Dstincsign { match self.bits { - false => DSTINCSIGN_A::POSITIVE, - true => DSTINCSIGN_A::NEGATIVE, + false => Dstincsign::Positive, + true => Dstincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment destination address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == DSTINCSIGN_A::POSITIVE + *self == Dstincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement destination address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == DSTINCSIGN_A::NEGATIVE + *self == Dstincsign::Negative } } #[doc = "Field `DSTINCSIGN` writer - Destination Address Increment Sign"] -pub type DSTINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH6_CFG_SPEC, DSTINCSIGN_A, O>; -impl<'a, const O: u8> DSTINCSIGN_W<'a, O> { +pub type DstincsignW<'a, REG> = crate::BitWriter<'a, REG, Dstincsign>; +impl<'a, REG> DstincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment destination address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Dstincsign::Positive) } #[doc = "Decrement destination address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Dstincsign::Negative) } } impl R { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] - pub fn arbslots(&self) -> ARBSLOTS_R { - ARBSLOTS_R::new(((self.bits >> 16) & 3) as u8) + pub fn arbslots(&self) -> ArbslotsR { + ArbslotsR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] - pub fn srcincsign(&self) -> SRCINCSIGN_R { - SRCINCSIGN_R::new(((self.bits >> 20) & 1) != 0) + pub fn srcincsign(&self) -> SrcincsignR { + SrcincsignR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] - pub fn dstincsign(&self) -> DSTINCSIGN_R { - DSTINCSIGN_R::new(((self.bits >> 21) & 1) != 0) + pub fn dstincsign(&self) -> DstincsignR { + DstincsignR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] #[must_use] - pub fn arbslots(&mut self) -> ARBSLOTS_W<16> { - ARBSLOTS_W::new(self) + pub fn arbslots(&mut self) -> ArbslotsW { + ArbslotsW::new(self, 16) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] #[must_use] - pub fn srcincsign(&mut self) -> SRCINCSIGN_W<20> { - SRCINCSIGN_W::new(self) + pub fn srcincsign(&mut self) -> SrcincsignW { + SrcincsignW::new(self, 20) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] #[must_use] - pub fn dstincsign(&mut self) -> DSTINCSIGN_W<21> { - DSTINCSIGN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstincsign(&mut self) -> DstincsignW { + DstincsignW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch6_cfg](index.html) module"] -pub struct CH6_CFG_SPEC; -impl crate::RegisterSpec for CH6_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch6CfgSpec; +impl crate::RegisterSpec for Ch6CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch6_cfg::R](R) reader structure"] -impl crate::Readable for CH6_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch6_cfg::W](W) writer structure"] -impl crate::Writable for CH6_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch6_cfg::R`](R) reader structure"] +impl crate::Readable for Ch6CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`ch6_cfg::W`](W) writer structure"] +impl crate::Writable for Ch6CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH6_CFG to value 0"] -impl crate::Resettable for CH6_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch6CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch6_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch6_ctrl.rs index 6461425..04b2ae8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch6_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch6_ctrl.rs @@ -1,843 +1,842 @@ #[doc = "Register `CH6_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH6_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] -pub type STRUCTTYPE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DMA Structure Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STRUCTTYPE_A { +pub enum Structtype { #[doc = "0: DMA transfer structure type selected."] - TRANSFER = 0, + Transfer = 0, #[doc = "1: Synchronization structure type selected."] - SYNCHRONIZE = 1, + Synchronize = 1, #[doc = "2: Write immediate value structure type selected."] - WRITE = 2, + Write = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STRUCTTYPE_A) -> Self { + fn from(variant: Structtype) -> Self { variant as _ } } -impl STRUCTTYPE_R { +impl crate::FieldSpec for Structtype { + type Ux = u8; +} +impl crate::IsEnum for Structtype {} +#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] +pub type StructtypeR = crate::FieldReader; +impl StructtypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(STRUCTTYPE_A::TRANSFER), - 1 => Some(STRUCTTYPE_A::SYNCHRONIZE), - 2 => Some(STRUCTTYPE_A::WRITE), + 0 => Some(Structtype::Transfer), + 1 => Some(Structtype::Synchronize), + 2 => Some(Structtype::Write), _ => None, } } - #[doc = "Checks if the value of the field is `TRANSFER`"] + #[doc = "DMA transfer structure type selected."] #[inline(always)] pub fn is_transfer(&self) -> bool { - *self == STRUCTTYPE_A::TRANSFER + *self == Structtype::Transfer } - #[doc = "Checks if the value of the field is `SYNCHRONIZE`"] + #[doc = "Synchronization structure type selected."] #[inline(always)] pub fn is_synchronize(&self) -> bool { - *self == STRUCTTYPE_A::SYNCHRONIZE + *self == Structtype::Synchronize } - #[doc = "Checks if the value of the field is `WRITE`"] + #[doc = "Write immediate value structure type selected."] #[inline(always)] pub fn is_write(&self) -> bool { - *self == STRUCTTYPE_A::WRITE + *self == Structtype::Write } } #[doc = "Field `STRUCTTYPE` writer - DMA Structure Type"] -pub type STRUCTTYPE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH6_CTRL_SPEC, u8, STRUCTTYPE_A, 2, O>; -impl<'a, const O: u8> STRUCTTYPE_W<'a, O> { +pub type StructtypeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Structtype>; +impl<'a, REG> StructtypeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "DMA transfer structure type selected."] #[inline(always)] - pub fn transfer(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::TRANSFER) + pub fn transfer(self) -> &'a mut crate::W { + self.variant(Structtype::Transfer) } #[doc = "Synchronization structure type selected."] #[inline(always)] - pub fn synchronize(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::SYNCHRONIZE) + pub fn synchronize(self) -> &'a mut crate::W { + self.variant(Structtype::Synchronize) } #[doc = "Write immediate value structure type selected."] #[inline(always)] - pub fn write(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::WRITE) + pub fn write(self) -> &'a mut crate::W { + self.variant(Structtype::Write) } } #[doc = "Field `STRUCTREQ` reader - Structure DMA Transfer Request"] -pub type STRUCTREQ_R = crate::BitReader; +pub type StructreqR = crate::BitReader; #[doc = "Field `XFERCNT` reader - DMA Unit Data Transfer Count"] -pub type XFERCNT_R = crate::FieldReader; +pub type XfercntR = crate::FieldReader; #[doc = "Field `XFERCNT` writer - DMA Unit Data Transfer Count"] -pub type XFERCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH6_CTRL_SPEC, u16, u16, 11, O>; +pub type XfercntW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `BYTESWAP` reader - Endian Byte Swap"] -pub type BYTESWAP_R = crate::BitReader; +pub type ByteswapR = crate::BitReader; #[doc = "Field `BYTESWAP` writer - Endian Byte Swap"] -pub type BYTESWAP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH6_CTRL_SPEC, bool, O>; -#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] -pub type BLOCKSIZE_R = crate::FieldReader; +pub type ByteswapW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Block Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BLOCKSIZE_A { +pub enum Blocksize { #[doc = "0: One unit transfer per arbitration"] - UNIT1 = 0, + Unit1 = 0, #[doc = "1: Two unit transfers per arbitration"] - UNIT2 = 1, + Unit2 = 1, #[doc = "2: Three unit transfers per arbitration"] - UNIT3 = 2, + Unit3 = 2, #[doc = "3: Four unit transfers per arbitration"] - UNIT4 = 3, + Unit4 = 3, #[doc = "4: Six unit transfers per arbitration"] - UNIT6 = 4, + Unit6 = 4, #[doc = "5: Eight unit transfers per arbitration"] - UNIT8 = 5, + Unit8 = 5, #[doc = "7: Sixteen unit transfers per arbitration"] - UNIT16 = 7, + Unit16 = 7, #[doc = "9: 32 unit transfers per arbitration"] - UNIT32 = 9, + Unit32 = 9, #[doc = "10: 64 unit transfers per arbitration"] - UNIT64 = 10, + Unit64 = 10, #[doc = "11: 128 unit transfers per arbitration"] - UNIT128 = 11, + Unit128 = 11, #[doc = "12: 256 unit transfers per arbitration"] - UNIT256 = 12, + Unit256 = 12, #[doc = "13: 512 unit transfers per arbitration"] - UNIT512 = 13, + Unit512 = 13, #[doc = "14: 1024 unit transfers per arbitration"] - UNIT1024 = 14, + Unit1024 = 14, #[doc = "15: Transfer all units as specified by the XFRCNT field"] - ALL = 15, + All = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BLOCKSIZE_A) -> Self { + fn from(variant: Blocksize) -> Self { variant as _ } } -impl BLOCKSIZE_R { +impl crate::FieldSpec for Blocksize { + type Ux = u8; +} +impl crate::IsEnum for Blocksize {} +#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] +pub type BlocksizeR = crate::FieldReader; +impl BlocksizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BLOCKSIZE_A::UNIT1), - 1 => Some(BLOCKSIZE_A::UNIT2), - 2 => Some(BLOCKSIZE_A::UNIT3), - 3 => Some(BLOCKSIZE_A::UNIT4), - 4 => Some(BLOCKSIZE_A::UNIT6), - 5 => Some(BLOCKSIZE_A::UNIT8), - 7 => Some(BLOCKSIZE_A::UNIT16), - 9 => Some(BLOCKSIZE_A::UNIT32), - 10 => Some(BLOCKSIZE_A::UNIT64), - 11 => Some(BLOCKSIZE_A::UNIT128), - 12 => Some(BLOCKSIZE_A::UNIT256), - 13 => Some(BLOCKSIZE_A::UNIT512), - 14 => Some(BLOCKSIZE_A::UNIT1024), - 15 => Some(BLOCKSIZE_A::ALL), + 0 => Some(Blocksize::Unit1), + 1 => Some(Blocksize::Unit2), + 2 => Some(Blocksize::Unit3), + 3 => Some(Blocksize::Unit4), + 4 => Some(Blocksize::Unit6), + 5 => Some(Blocksize::Unit8), + 7 => Some(Blocksize::Unit16), + 9 => Some(Blocksize::Unit32), + 10 => Some(Blocksize::Unit64), + 11 => Some(Blocksize::Unit128), + 12 => Some(Blocksize::Unit256), + 13 => Some(Blocksize::Unit512), + 14 => Some(Blocksize::Unit1024), + 15 => Some(Blocksize::All), _ => None, } } - #[doc = "Checks if the value of the field is `UNIT1`"] + #[doc = "One unit transfer per arbitration"] #[inline(always)] pub fn is_unit1(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1 + *self == Blocksize::Unit1 } - #[doc = "Checks if the value of the field is `UNIT2`"] + #[doc = "Two unit transfers per arbitration"] #[inline(always)] pub fn is_unit2(&self) -> bool { - *self == BLOCKSIZE_A::UNIT2 + *self == Blocksize::Unit2 } - #[doc = "Checks if the value of the field is `UNIT3`"] + #[doc = "Three unit transfers per arbitration"] #[inline(always)] pub fn is_unit3(&self) -> bool { - *self == BLOCKSIZE_A::UNIT3 + *self == Blocksize::Unit3 } - #[doc = "Checks if the value of the field is `UNIT4`"] + #[doc = "Four unit transfers per arbitration"] #[inline(always)] pub fn is_unit4(&self) -> bool { - *self == BLOCKSIZE_A::UNIT4 + *self == Blocksize::Unit4 } - #[doc = "Checks if the value of the field is `UNIT6`"] + #[doc = "Six unit transfers per arbitration"] #[inline(always)] pub fn is_unit6(&self) -> bool { - *self == BLOCKSIZE_A::UNIT6 + *self == Blocksize::Unit6 } - #[doc = "Checks if the value of the field is `UNIT8`"] + #[doc = "Eight unit transfers per arbitration"] #[inline(always)] pub fn is_unit8(&self) -> bool { - *self == BLOCKSIZE_A::UNIT8 + *self == Blocksize::Unit8 } - #[doc = "Checks if the value of the field is `UNIT16`"] + #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] pub fn is_unit16(&self) -> bool { - *self == BLOCKSIZE_A::UNIT16 + *self == Blocksize::Unit16 } - #[doc = "Checks if the value of the field is `UNIT32`"] + #[doc = "32 unit transfers per arbitration"] #[inline(always)] pub fn is_unit32(&self) -> bool { - *self == BLOCKSIZE_A::UNIT32 + *self == Blocksize::Unit32 } - #[doc = "Checks if the value of the field is `UNIT64`"] + #[doc = "64 unit transfers per arbitration"] #[inline(always)] pub fn is_unit64(&self) -> bool { - *self == BLOCKSIZE_A::UNIT64 + *self == Blocksize::Unit64 } - #[doc = "Checks if the value of the field is `UNIT128`"] + #[doc = "128 unit transfers per arbitration"] #[inline(always)] pub fn is_unit128(&self) -> bool { - *self == BLOCKSIZE_A::UNIT128 + *self == Blocksize::Unit128 } - #[doc = "Checks if the value of the field is `UNIT256`"] + #[doc = "256 unit transfers per arbitration"] #[inline(always)] pub fn is_unit256(&self) -> bool { - *self == BLOCKSIZE_A::UNIT256 + *self == Blocksize::Unit256 } - #[doc = "Checks if the value of the field is `UNIT512`"] + #[doc = "512 unit transfers per arbitration"] #[inline(always)] pub fn is_unit512(&self) -> bool { - *self == BLOCKSIZE_A::UNIT512 + *self == Blocksize::Unit512 } - #[doc = "Checks if the value of the field is `UNIT1024`"] + #[doc = "1024 unit transfers per arbitration"] #[inline(always)] pub fn is_unit1024(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1024 + *self == Blocksize::Unit1024 } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] pub fn is_all(&self) -> bool { - *self == BLOCKSIZE_A::ALL + *self == Blocksize::All } } #[doc = "Field `BLOCKSIZE` writer - Block Transfer Size"] -pub type BLOCKSIZE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH6_CTRL_SPEC, u8, BLOCKSIZE_A, 4, O>; -impl<'a, const O: u8> BLOCKSIZE_W<'a, O> { +pub type BlocksizeW<'a, REG> = crate::FieldWriter<'a, REG, 4, Blocksize>; +impl<'a, REG> BlocksizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One unit transfer per arbitration"] #[inline(always)] - pub fn unit1(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1) + pub fn unit1(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1) } #[doc = "Two unit transfers per arbitration"] #[inline(always)] - pub fn unit2(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT2) + pub fn unit2(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit2) } #[doc = "Three unit transfers per arbitration"] #[inline(always)] - pub fn unit3(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT3) + pub fn unit3(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit3) } #[doc = "Four unit transfers per arbitration"] #[inline(always)] - pub fn unit4(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT4) + pub fn unit4(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit4) } #[doc = "Six unit transfers per arbitration"] #[inline(always)] - pub fn unit6(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT6) + pub fn unit6(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit6) } #[doc = "Eight unit transfers per arbitration"] #[inline(always)] - pub fn unit8(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT8) + pub fn unit8(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit8) } #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] - pub fn unit16(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT16) + pub fn unit16(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit16) } #[doc = "32 unit transfers per arbitration"] #[inline(always)] - pub fn unit32(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT32) + pub fn unit32(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit32) } #[doc = "64 unit transfers per arbitration"] #[inline(always)] - pub fn unit64(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT64) + pub fn unit64(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit64) } #[doc = "128 unit transfers per arbitration"] #[inline(always)] - pub fn unit128(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT128) + pub fn unit128(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit128) } #[doc = "256 unit transfers per arbitration"] #[inline(always)] - pub fn unit256(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT256) + pub fn unit256(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit256) } #[doc = "512 unit transfers per arbitration"] #[inline(always)] - pub fn unit512(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT512) + pub fn unit512(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit512) } #[doc = "1024 unit transfers per arbitration"] #[inline(always)] - pub fn unit1024(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1024) + pub fn unit1024(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1024) } #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Blocksize::All) } } #[doc = "Field `DONEIEN` reader - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_R = crate::BitReader; +pub type DoneienR = crate::BitReader; #[doc = "Field `DONEIEN` writer - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH6_CTRL_SPEC, bool, O>; -#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] -pub type REQMODE_R = crate::BitReader; +pub type DoneienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "DMA Request Transfer Mode Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REQMODE_A { +pub enum Reqmode { #[doc = "0: The LDMA transfers one BLOCKSIZE per transfer request."] - BLOCK = 0, + Block = 0, #[doc = "1: One transfer request transfers all units as defined by the XFRCNT field."] - ALL = 1, + All = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REQMODE_A) -> Self { + fn from(variant: Reqmode) -> Self { variant as u8 != 0 } } -impl REQMODE_R { +#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] +pub type ReqmodeR = crate::BitReader; +impl ReqmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REQMODE_A { + pub const fn variant(&self) -> Reqmode { match self.bits { - false => REQMODE_A::BLOCK, - true => REQMODE_A::ALL, + false => Reqmode::Block, + true => Reqmode::All, } } - #[doc = "Checks if the value of the field is `BLOCK`"] + #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] pub fn is_block(&self) -> bool { - *self == REQMODE_A::BLOCK + *self == Reqmode::Block } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] pub fn is_all(&self) -> bool { - *self == REQMODE_A::ALL + *self == Reqmode::All } } #[doc = "Field `REQMODE` writer - DMA Request Transfer Mode Select"] -pub type REQMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH6_CTRL_SPEC, REQMODE_A, O>; -impl<'a, const O: u8> REQMODE_W<'a, O> { +pub type ReqmodeW<'a, REG> = crate::BitWriter<'a, REG, Reqmode>; +impl<'a, REG> ReqmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] - pub fn block(self) -> &'a mut W { - self.variant(REQMODE_A::BLOCK) + pub fn block(self) -> &'a mut crate::W { + self.variant(Reqmode::Block) } #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(REQMODE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Reqmode::All) } } #[doc = "Field `DECLOOPCNT` reader - Decrement Loop Count"] -pub type DECLOOPCNT_R = crate::BitReader; +pub type DecloopcntR = crate::BitReader; #[doc = "Field `DECLOOPCNT` writer - Decrement Loop Count"] -pub type DECLOOPCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH6_CTRL_SPEC, bool, O>; +pub type DecloopcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IGNORESREQ` reader - Ignore Sreq"] -pub type IGNORESREQ_R = crate::BitReader; +pub type IgnoresreqR = crate::BitReader; #[doc = "Field `IGNORESREQ` writer - Ignore Sreq"] -pub type IGNORESREQ_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH6_CTRL_SPEC, bool, O>; -#[doc = "Field `SRCINC` reader - Source Address Increment Size"] -pub type SRCINC_R = crate::FieldReader; +pub type IgnoresreqW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SRCINC_A { +pub enum Srcinc { #[doc = "0: Increment source address by one unit data size after each read"] - ONE = 0, + One = 0, #[doc = "1: Increment source address by two unit data sizes after each read"] - TWO = 1, + Two = 1, #[doc = "2: Increment source address by four unit data sizes after each read"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SRCINC_A) -> Self { + fn from(variant: Srcinc) -> Self { variant as _ } } -impl SRCINC_R { +impl crate::FieldSpec for Srcinc { + type Ux = u8; +} +impl crate::IsEnum for Srcinc {} +#[doc = "Field `SRCINC` reader - Source Address Increment Size"] +pub type SrcincR = crate::FieldReader; +impl SrcincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINC_A { + pub const fn variant(&self) -> Srcinc { match self.bits { - 0 => SRCINC_A::ONE, - 1 => SRCINC_A::TWO, - 2 => SRCINC_A::FOUR, - 3 => SRCINC_A::NONE, + 0 => Srcinc::One, + 1 => Srcinc::Two, + 2 => Srcinc::Four, + 3 => Srcinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == SRCINC_A::ONE + *self == Srcinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == SRCINC_A::TWO + *self == Srcinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == SRCINC_A::FOUR + *self == Srcinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SRCINC_A::NONE + *self == Srcinc::None } } #[doc = "Field `SRCINC` writer - Source Address Increment Size"] -pub type SRCINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH6_CTRL_SPEC, u8, SRCINC_A, 2, O>; -impl<'a, const O: u8> SRCINC_W<'a, O> { +pub type SrcincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Srcinc, crate::Safe>; +impl<'a, REG> SrcincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(SRCINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Srcinc::One) } #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(SRCINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Srcinc::Two) } #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(SRCINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Srcinc::Four) } #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SRCINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Srcinc::None) } } -#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] -pub type SIZE_R = crate::FieldReader; #[doc = "Unit Data Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIZE_A { +pub enum Size { #[doc = "0: Each unit transfer is a byte"] - BYTE = 0, + Byte = 0, #[doc = "1: Each unit transfer is a half-word"] - HALFWORD = 1, + Halfword = 1, #[doc = "2: Each unit transfer is a word"] - WORD = 2, + Word = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIZE_A) -> Self { + fn from(variant: Size) -> Self { variant as _ } } -impl SIZE_R { +impl crate::FieldSpec for Size { + type Ux = u8; +} +impl crate::IsEnum for Size {} +#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] +pub type SizeR = crate::FieldReader; +impl SizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIZE_A::BYTE), - 1 => Some(SIZE_A::HALFWORD), - 2 => Some(SIZE_A::WORD), + 0 => Some(Size::Byte), + 1 => Some(Size::Halfword), + 2 => Some(Size::Word), _ => None, } } - #[doc = "Checks if the value of the field is `BYTE`"] + #[doc = "Each unit transfer is a byte"] #[inline(always)] pub fn is_byte(&self) -> bool { - *self == SIZE_A::BYTE + *self == Size::Byte } - #[doc = "Checks if the value of the field is `HALFWORD`"] + #[doc = "Each unit transfer is a half-word"] #[inline(always)] pub fn is_halfword(&self) -> bool { - *self == SIZE_A::HALFWORD + *self == Size::Halfword } - #[doc = "Checks if the value of the field is `WORD`"] + #[doc = "Each unit transfer is a word"] #[inline(always)] pub fn is_word(&self) -> bool { - *self == SIZE_A::WORD + *self == Size::Word } } #[doc = "Field `SIZE` writer - Unit Data Transfer Size"] -pub type SIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH6_CTRL_SPEC, u8, SIZE_A, 2, O>; -impl<'a, const O: u8> SIZE_W<'a, O> { +pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Size>; +impl<'a, REG> SizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Each unit transfer is a byte"] #[inline(always)] - pub fn byte(self) -> &'a mut W { - self.variant(SIZE_A::BYTE) + pub fn byte(self) -> &'a mut crate::W { + self.variant(Size::Byte) } #[doc = "Each unit transfer is a half-word"] #[inline(always)] - pub fn halfword(self) -> &'a mut W { - self.variant(SIZE_A::HALFWORD) + pub fn halfword(self) -> &'a mut crate::W { + self.variant(Size::Halfword) } #[doc = "Each unit transfer is a word"] #[inline(always)] - pub fn word(self) -> &'a mut W { - self.variant(SIZE_A::WORD) + pub fn word(self) -> &'a mut crate::W { + self.variant(Size::Word) } } -#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] -pub type DSTINC_R = crate::FieldReader; #[doc = "Destination Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DSTINC_A { +pub enum Dstinc { #[doc = "0: Increment destination address by one unit data size after each write"] - ONE = 0, + One = 0, #[doc = "1: Increment destination address by two unit data sizes after each write"] - TWO = 1, + Two = 1, #[doc = "2: Increment destination address by four unit data sizes after each write"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DSTINC_A) -> Self { + fn from(variant: Dstinc) -> Self { variant as _ } } -impl DSTINC_R { +impl crate::FieldSpec for Dstinc { + type Ux = u8; +} +impl crate::IsEnum for Dstinc {} +#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] +pub type DstincR = crate::FieldReader; +impl DstincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINC_A { + pub const fn variant(&self) -> Dstinc { match self.bits { - 0 => DSTINC_A::ONE, - 1 => DSTINC_A::TWO, - 2 => DSTINC_A::FOUR, - 3 => DSTINC_A::NONE, + 0 => Dstinc::One, + 1 => Dstinc::Two, + 2 => Dstinc::Four, + 3 => Dstinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == DSTINC_A::ONE + *self == Dstinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == DSTINC_A::TWO + *self == Dstinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == DSTINC_A::FOUR + *self == Dstinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == DSTINC_A::NONE + *self == Dstinc::None } } #[doc = "Field `DSTINC` writer - Destination Address Increment Size"] -pub type DSTINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH6_CTRL_SPEC, u8, DSTINC_A, 2, O>; -impl<'a, const O: u8> DSTINC_W<'a, O> { +pub type DstincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dstinc, crate::Safe>; +impl<'a, REG> DstincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(DSTINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Dstinc::One) } #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(DSTINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Dstinc::Two) } #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(DSTINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Dstinc::Four) } #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(DSTINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Dstinc::None) } } -#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] -pub type SRCMODE_R = crate::BitReader; #[doc = "Source Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCMODE_A { +pub enum Srcmode { #[doc = "0: The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCMODE_A) -> Self { + fn from(variant: Srcmode) -> Self { variant as u8 != 0 } } -impl SRCMODE_R { +#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] +pub type SrcmodeR = crate::BitReader; +impl SrcmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCMODE_A { + pub const fn variant(&self) -> Srcmode { match self.bits { - false => SRCMODE_A::ABSOLUTE, - true => SRCMODE_A::RELATIVE, + false => Srcmode::Absolute, + true => Srcmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == SRCMODE_A::ABSOLUTE + *self == Srcmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == SRCMODE_A::RELATIVE + *self == Srcmode::Relative } } -#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] -pub type DSTMODE_R = crate::BitReader; #[doc = "Destination Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTMODE_A { +pub enum Dstmode { #[doc = "0: The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTMODE_A) -> Self { + fn from(variant: Dstmode) -> Self { variant as u8 != 0 } } -impl DSTMODE_R { +#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] +pub type DstmodeR = crate::BitReader; +impl DstmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTMODE_A { + pub const fn variant(&self) -> Dstmode { match self.bits { - false => DSTMODE_A::ABSOLUTE, - true => DSTMODE_A::RELATIVE, + false => Dstmode::Absolute, + true => Dstmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == DSTMODE_A::ABSOLUTE + *self == Dstmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == DSTMODE_A::RELATIVE + *self == Dstmode::Relative } } impl R { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] - pub fn structtype(&self) -> STRUCTTYPE_R { - STRUCTTYPE_R::new((self.bits & 3) as u8) + pub fn structtype(&self) -> StructtypeR { + StructtypeR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Structure DMA Transfer Request"] #[inline(always)] - pub fn structreq(&self) -> STRUCTREQ_R { - STRUCTREQ_R::new(((self.bits >> 3) & 1) != 0) + pub fn structreq(&self) -> StructreqR { + StructreqR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] - pub fn xfercnt(&self) -> XFERCNT_R { - XFERCNT_R::new(((self.bits >> 4) & 0x07ff) as u16) + pub fn xfercnt(&self) -> XfercntR { + XfercntR::new(((self.bits >> 4) & 0x07ff) as u16) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] - pub fn byteswap(&self) -> BYTESWAP_R { - BYTESWAP_R::new(((self.bits >> 15) & 1) != 0) + pub fn byteswap(&self) -> ByteswapR { + ByteswapR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] - pub fn blocksize(&self) -> BLOCKSIZE_R { - BLOCKSIZE_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn blocksize(&self) -> BlocksizeR { + BlocksizeR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] - pub fn doneien(&self) -> DONEIEN_R { - DONEIEN_R::new(((self.bits >> 20) & 1) != 0) + pub fn doneien(&self) -> DoneienR { + DoneienR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] - pub fn reqmode(&self) -> REQMODE_R { - REQMODE_R::new(((self.bits >> 21) & 1) != 0) + pub fn reqmode(&self) -> ReqmodeR { + ReqmodeR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] - pub fn decloopcnt(&self) -> DECLOOPCNT_R { - DECLOOPCNT_R::new(((self.bits >> 22) & 1) != 0) + pub fn decloopcnt(&self) -> DecloopcntR { + DecloopcntR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] - pub fn ignoresreq(&self) -> IGNORESREQ_R { - IGNORESREQ_R::new(((self.bits >> 23) & 1) != 0) + pub fn ignoresreq(&self) -> IgnoresreqR { + IgnoresreqR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] - pub fn srcinc(&self) -> SRCINC_R { - SRCINC_R::new(((self.bits >> 24) & 3) as u8) + pub fn srcinc(&self) -> SrcincR { + SrcincR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] - pub fn size(&self) -> SIZE_R { - SIZE_R::new(((self.bits >> 26) & 3) as u8) + pub fn size(&self) -> SizeR { + SizeR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] - pub fn dstinc(&self) -> DSTINC_R { - DSTINC_R::new(((self.bits >> 28) & 3) as u8) + pub fn dstinc(&self) -> DstincR { + DstincR::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bit 30 - Source Addressing Mode"] #[inline(always)] - pub fn srcmode(&self) -> SRCMODE_R { - SRCMODE_R::new(((self.bits >> 30) & 1) != 0) + pub fn srcmode(&self) -> SrcmodeR { + SrcmodeR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Destination Addressing Mode"] #[inline(always)] - pub fn dstmode(&self) -> DSTMODE_R { - DSTMODE_R::new(((self.bits >> 31) & 1) != 0) + pub fn dstmode(&self) -> DstmodeR { + DstmodeR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] #[must_use] - pub fn structtype(&mut self) -> STRUCTTYPE_W<0> { - STRUCTTYPE_W::new(self) + pub fn structtype(&mut self) -> StructtypeW { + StructtypeW::new(self, 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] #[must_use] - pub fn xfercnt(&mut self) -> XFERCNT_W<4> { - XFERCNT_W::new(self) + pub fn xfercnt(&mut self) -> XfercntW { + XfercntW::new(self, 4) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] #[must_use] - pub fn byteswap(&mut self) -> BYTESWAP_W<15> { - BYTESWAP_W::new(self) + pub fn byteswap(&mut self) -> ByteswapW { + ByteswapW::new(self, 15) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] #[must_use] - pub fn blocksize(&mut self) -> BLOCKSIZE_W<16> { - BLOCKSIZE_W::new(self) + pub fn blocksize(&mut self) -> BlocksizeW { + BlocksizeW::new(self, 16) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] #[must_use] - pub fn doneien(&mut self) -> DONEIEN_W<20> { - DONEIEN_W::new(self) + pub fn doneien(&mut self) -> DoneienW { + DoneienW::new(self, 20) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] #[must_use] - pub fn reqmode(&mut self) -> REQMODE_W<21> { - REQMODE_W::new(self) + pub fn reqmode(&mut self) -> ReqmodeW { + ReqmodeW::new(self, 21) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] #[must_use] - pub fn decloopcnt(&mut self) -> DECLOOPCNT_W<22> { - DECLOOPCNT_W::new(self) + pub fn decloopcnt(&mut self) -> DecloopcntW { + DecloopcntW::new(self, 22) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] #[must_use] - pub fn ignoresreq(&mut self) -> IGNORESREQ_W<23> { - IGNORESREQ_W::new(self) + pub fn ignoresreq(&mut self) -> IgnoresreqW { + IgnoresreqW::new(self, 23) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] #[must_use] - pub fn srcinc(&mut self) -> SRCINC_W<24> { - SRCINC_W::new(self) + pub fn srcinc(&mut self) -> SrcincW { + SrcincW::new(self, 24) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SIZE_W<26> { - SIZE_W::new(self) + pub fn size(&mut self) -> SizeW { + SizeW::new(self, 26) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] #[must_use] - pub fn dstinc(&mut self) -> DSTINC_W<28> { - DSTINC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstinc(&mut self) -> DstincW { + DstincW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch6_ctrl](index.html) module"] -pub struct CH6_CTRL_SPEC; -impl crate::RegisterSpec for CH6_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch6CtrlSpec; +impl crate::RegisterSpec for Ch6CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch6_ctrl::R](R) reader structure"] -impl crate::Readable for CH6_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch6_ctrl::W](W) writer structure"] -impl crate::Writable for CH6_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch6_ctrl::R`](R) reader structure"] +impl crate::Readable for Ch6CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ch6_ctrl::W`](W) writer structure"] +impl crate::Writable for Ch6CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH6_CTRL to value 0"] -impl crate::Resettable for CH6_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch6CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch6_dst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch6_dst.rs index 6502f33..918b452 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch6_dst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch6_dst.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH6_DST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH6_DST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DSTADDR` reader - Destination Data Address"] -pub type DSTADDR_R = crate::FieldReader; +pub type DstaddrR = crate::FieldReader; #[doc = "Field `DSTADDR` writer - Destination Data Address"] -pub type DSTADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH6_DST_SPEC, u32, u32, 32, O>; +pub type DstaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] - pub fn dstaddr(&self) -> DSTADDR_R { - DSTADDR_R::new(self.bits) + pub fn dstaddr(&self) -> DstaddrR { + DstaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] #[must_use] - pub fn dstaddr(&mut self) -> DSTADDR_W<0> { - DSTADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstaddr(&mut self) -> DstaddrW { + DstaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch6_dst](index.html) module"] -pub struct CH6_DST_SPEC; -impl crate::RegisterSpec for CH6_DST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_dst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_dst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch6DstSpec; +impl crate::RegisterSpec for Ch6DstSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch6_dst::R](R) reader structure"] -impl crate::Readable for CH6_DST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch6_dst::W](W) writer structure"] -impl crate::Writable for CH6_DST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch6_dst::R`](R) reader structure"] +impl crate::Readable for Ch6DstSpec {} +#[doc = "`write(|w| ..)` method takes [`ch6_dst::W`](W) writer structure"] +impl crate::Writable for Ch6DstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH6_DST to value 0"] -impl crate::Resettable for CH6_DST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch6DstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch6_link.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch6_link.rs index 3353c82..b58f3b9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch6_link.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch6_link.rs @@ -1,136 +1,96 @@ #[doc = "Register `CH6_LINK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH6_LINK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] -pub type LINKMODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Link Structure Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LINKMODE_A { +pub enum Linkmode { #[doc = "0: The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LINKMODE_A) -> Self { + fn from(variant: Linkmode) -> Self { variant as u8 != 0 } } -impl LINKMODE_R { +#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] +pub type LinkmodeR = crate::BitReader; +impl LinkmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LINKMODE_A { + pub const fn variant(&self) -> Linkmode { match self.bits { - false => LINKMODE_A::ABSOLUTE, - true => LINKMODE_A::RELATIVE, + false => Linkmode::Absolute, + true => Linkmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == LINKMODE_A::ABSOLUTE + *self == Linkmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == LINKMODE_A::RELATIVE + *self == Linkmode::Relative } } #[doc = "Field `LINK` reader - Link Next Structure"] -pub type LINK_R = crate::BitReader; +pub type LinkR = crate::BitReader; #[doc = "Field `LINK` writer - Link Next Structure"] -pub type LINK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH6_LINK_SPEC, bool, O>; +pub type LinkW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LINKADDR` reader - Link Structure Address"] -pub type LINKADDR_R = crate::FieldReader; +pub type LinkaddrR = crate::FieldReader; #[doc = "Field `LINKADDR` writer - Link Structure Address"] -pub type LINKADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH6_LINK_SPEC, u32, u32, 30, O>; +pub type LinkaddrW<'a, REG> = crate::FieldWriter<'a, REG, 30, u32>; impl R { #[doc = "Bit 0 - Link Structure Addressing Mode"] #[inline(always)] - pub fn linkmode(&self) -> LINKMODE_R { - LINKMODE_R::new((self.bits & 1) != 0) + pub fn linkmode(&self) -> LinkmodeR { + LinkmodeR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] - pub fn link(&self) -> LINK_R { - LINK_R::new(((self.bits >> 1) & 1) != 0) + pub fn link(&self) -> LinkR { + LinkR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] - pub fn linkaddr(&self) -> LINKADDR_R { - LINKADDR_R::new((self.bits >> 2) & 0x3fff_ffff) + pub fn linkaddr(&self) -> LinkaddrR { + LinkaddrR::new((self.bits >> 2) & 0x3fff_ffff) } } impl W { #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] #[must_use] - pub fn link(&mut self) -> LINK_W<1> { - LINK_W::new(self) + pub fn link(&mut self) -> LinkW { + LinkW::new(self, 1) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] #[must_use] - pub fn linkaddr(&mut self) -> LINKADDR_W<2> { - LINKADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn linkaddr(&mut self) -> LinkaddrW { + LinkaddrW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch6_link](index.html) module"] -pub struct CH6_LINK_SPEC; -impl crate::RegisterSpec for CH6_LINK_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_link::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_link::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch6LinkSpec; +impl crate::RegisterSpec for Ch6LinkSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch6_link::R](R) reader structure"] -impl crate::Readable for CH6_LINK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch6_link::W](W) writer structure"] -impl crate::Writable for CH6_LINK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch6_link::R`](R) reader structure"] +impl crate::Readable for Ch6LinkSpec {} +#[doc = "`write(|w| ..)` method takes [`ch6_link::W`](W) writer structure"] +impl crate::Writable for Ch6LinkSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH6_LINK to value 0"] -impl crate::Resettable for CH6_LINK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch6LinkSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch6_loop.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch6_loop.rs index 15bcee4..3b5bf9f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch6_loop.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch6_loop.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH6_LOOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH6_LOOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOOPCNT` reader - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_R = crate::FieldReader; +pub type LoopcntR = crate::FieldReader; #[doc = "Field `LOOPCNT` writer - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH6_LOOP_SPEC, u8, u8, 8, O>; +pub type LoopcntW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] - pub fn loopcnt(&self) -> LOOPCNT_R { - LOOPCNT_R::new((self.bits & 0xff) as u8) + pub fn loopcnt(&self) -> LoopcntR { + LoopcntR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] #[must_use] - pub fn loopcnt(&mut self) -> LOOPCNT_W<0> { - LOOPCNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn loopcnt(&mut self) -> LoopcntW { + LoopcntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch6_loop](index.html) module"] -pub struct CH6_LOOP_SPEC; -impl crate::RegisterSpec for CH6_LOOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_loop::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_loop::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch6LoopSpec; +impl crate::RegisterSpec for Ch6LoopSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch6_loop::R](R) reader structure"] -impl crate::Readable for CH6_LOOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch6_loop::W](W) writer structure"] -impl crate::Writable for CH6_LOOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch6_loop::R`](R) reader structure"] +impl crate::Readable for Ch6LoopSpec {} +#[doc = "`write(|w| ..)` method takes [`ch6_loop::W`](W) writer structure"] +impl crate::Writable for Ch6LoopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH6_LOOP to value 0"] -impl crate::Resettable for CH6_LOOP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch6LoopSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch6_src.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch6_src.rs index f06f47d..5fc6b59 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch6_src.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch6_src.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH6_SRC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH6_SRC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SRCADDR` reader - Source Data Address"] -pub type SRCADDR_R = crate::FieldReader; +pub type SrcaddrR = crate::FieldReader; #[doc = "Field `SRCADDR` writer - Source Data Address"] -pub type SRCADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH6_SRC_SPEC, u32, u32, 32, O>; +pub type SrcaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] - pub fn srcaddr(&self) -> SRCADDR_R { - SRCADDR_R::new(self.bits) + pub fn srcaddr(&self) -> SrcaddrR { + SrcaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] #[must_use] - pub fn srcaddr(&mut self) -> SRCADDR_W<0> { - SRCADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn srcaddr(&mut self) -> SrcaddrW { + SrcaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch6_src](index.html) module"] -pub struct CH6_SRC_SPEC; -impl crate::RegisterSpec for CH6_SRC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_src::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_src::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch6SrcSpec; +impl crate::RegisterSpec for Ch6SrcSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch6_src::R](R) reader structure"] -impl crate::Readable for CH6_SRC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch6_src::W](W) writer structure"] -impl crate::Writable for CH6_SRC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch6_src::R`](R) reader structure"] +impl crate::Readable for Ch6SrcSpec {} +#[doc = "`write(|w| ..)` method takes [`ch6_src::W`](W) writer structure"] +impl crate::Writable for Ch6SrcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH6_SRC to value 0"] -impl crate::Resettable for CH6_SRC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch6SrcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch7_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch7_cfg.rs index 1101cbe..5b4ed67 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch7_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch7_cfg.rs @@ -1,277 +1,250 @@ #[doc = "Register `CH7_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH7_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] -pub type ARBSLOTS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Arbitration Slot Number Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ARBSLOTS_A { +pub enum Arbslots { #[doc = "0: One arbitration slot selected"] - ONE = 0, + One = 0, #[doc = "1: Two arbitration slots selected"] - TWO = 1, + Two = 1, #[doc = "2: Four arbitration slots selected"] - FOUR = 2, + Four = 2, #[doc = "3: Eight arbitration slots selected"] - EIGHT = 3, + Eight = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ARBSLOTS_A) -> Self { + fn from(variant: Arbslots) -> Self { variant as _ } } -impl ARBSLOTS_R { +impl crate::FieldSpec for Arbslots { + type Ux = u8; +} +impl crate::IsEnum for Arbslots {} +#[doc = "Field `ARBSLOTS` reader - Arbitration Slot Number Select"] +pub type ArbslotsR = crate::FieldReader; +impl ArbslotsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ARBSLOTS_A { + pub const fn variant(&self) -> Arbslots { match self.bits { - 0 => ARBSLOTS_A::ONE, - 1 => ARBSLOTS_A::TWO, - 2 => ARBSLOTS_A::FOUR, - 3 => ARBSLOTS_A::EIGHT, + 0 => Arbslots::One, + 1 => Arbslots::Two, + 2 => Arbslots::Four, + 3 => Arbslots::Eight, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "One arbitration slot selected"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == ARBSLOTS_A::ONE + *self == Arbslots::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Two arbitration slots selected"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == ARBSLOTS_A::TWO + *self == Arbslots::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Four arbitration slots selected"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == ARBSLOTS_A::FOUR + *self == Arbslots::Four } - #[doc = "Checks if the value of the field is `EIGHT`"] + #[doc = "Eight arbitration slots selected"] #[inline(always)] pub fn is_eight(&self) -> bool { - *self == ARBSLOTS_A::EIGHT + *self == Arbslots::Eight } } #[doc = "Field `ARBSLOTS` writer - Arbitration Slot Number Select"] -pub type ARBSLOTS_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH7_CFG_SPEC, u8, ARBSLOTS_A, 2, O>; -impl<'a, const O: u8> ARBSLOTS_W<'a, O> { +pub type ArbslotsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Arbslots, crate::Safe>; +impl<'a, REG> ArbslotsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One arbitration slot selected"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(ARBSLOTS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Arbslots::One) } #[doc = "Two arbitration slots selected"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(ARBSLOTS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Arbslots::Two) } #[doc = "Four arbitration slots selected"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(ARBSLOTS_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Arbslots::Four) } #[doc = "Eight arbitration slots selected"] #[inline(always)] - pub fn eight(self) -> &'a mut W { - self.variant(ARBSLOTS_A::EIGHT) + pub fn eight(self) -> &'a mut crate::W { + self.variant(Arbslots::Eight) } } -#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] -pub type SRCINCSIGN_R = crate::BitReader; #[doc = "Source Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCINCSIGN_A { +pub enum Srcincsign { #[doc = "0: Increment source address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement source address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCINCSIGN_A) -> Self { + fn from(variant: Srcincsign) -> Self { variant as u8 != 0 } } -impl SRCINCSIGN_R { +#[doc = "Field `SRCINCSIGN` reader - Source Address Increment Sign"] +pub type SrcincsignR = crate::BitReader; +impl SrcincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINCSIGN_A { + pub const fn variant(&self) -> Srcincsign { match self.bits { - false => SRCINCSIGN_A::POSITIVE, - true => SRCINCSIGN_A::NEGATIVE, + false => Srcincsign::Positive, + true => Srcincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment source address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == SRCINCSIGN_A::POSITIVE + *self == Srcincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement source address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == SRCINCSIGN_A::NEGATIVE + *self == Srcincsign::Negative } } #[doc = "Field `SRCINCSIGN` writer - Source Address Increment Sign"] -pub type SRCINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH7_CFG_SPEC, SRCINCSIGN_A, O>; -impl<'a, const O: u8> SRCINCSIGN_W<'a, O> { +pub type SrcincsignW<'a, REG> = crate::BitWriter<'a, REG, Srcincsign>; +impl<'a, REG> SrcincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment source address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Srcincsign::Positive) } #[doc = "Decrement source address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(SRCINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Srcincsign::Negative) } } -#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] -pub type DSTINCSIGN_R = crate::BitReader; #[doc = "Destination Address Increment Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTINCSIGN_A { +pub enum Dstincsign { #[doc = "0: Increment destination address"] - POSITIVE = 0, + Positive = 0, #[doc = "1: Decrement destination address"] - NEGATIVE = 1, + Negative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTINCSIGN_A) -> Self { + fn from(variant: Dstincsign) -> Self { variant as u8 != 0 } } -impl DSTINCSIGN_R { +#[doc = "Field `DSTINCSIGN` reader - Destination Address Increment Sign"] +pub type DstincsignR = crate::BitReader; +impl DstincsignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINCSIGN_A { + pub const fn variant(&self) -> Dstincsign { match self.bits { - false => DSTINCSIGN_A::POSITIVE, - true => DSTINCSIGN_A::NEGATIVE, + false => Dstincsign::Positive, + true => Dstincsign::Negative, } } - #[doc = "Checks if the value of the field is `POSITIVE`"] + #[doc = "Increment destination address"] #[inline(always)] pub fn is_positive(&self) -> bool { - *self == DSTINCSIGN_A::POSITIVE + *self == Dstincsign::Positive } - #[doc = "Checks if the value of the field is `NEGATIVE`"] + #[doc = "Decrement destination address"] #[inline(always)] pub fn is_negative(&self) -> bool { - *self == DSTINCSIGN_A::NEGATIVE + *self == Dstincsign::Negative } } #[doc = "Field `DSTINCSIGN` writer - Destination Address Increment Sign"] -pub type DSTINCSIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH7_CFG_SPEC, DSTINCSIGN_A, O>; -impl<'a, const O: u8> DSTINCSIGN_W<'a, O> { +pub type DstincsignW<'a, REG> = crate::BitWriter<'a, REG, Dstincsign>; +impl<'a, REG> DstincsignW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Increment destination address"] #[inline(always)] - pub fn positive(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::POSITIVE) + pub fn positive(self) -> &'a mut crate::W { + self.variant(Dstincsign::Positive) } #[doc = "Decrement destination address"] #[inline(always)] - pub fn negative(self) -> &'a mut W { - self.variant(DSTINCSIGN_A::NEGATIVE) + pub fn negative(self) -> &'a mut crate::W { + self.variant(Dstincsign::Negative) } } impl R { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] - pub fn arbslots(&self) -> ARBSLOTS_R { - ARBSLOTS_R::new(((self.bits >> 16) & 3) as u8) + pub fn arbslots(&self) -> ArbslotsR { + ArbslotsR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] - pub fn srcincsign(&self) -> SRCINCSIGN_R { - SRCINCSIGN_R::new(((self.bits >> 20) & 1) != 0) + pub fn srcincsign(&self) -> SrcincsignR { + SrcincsignR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] - pub fn dstincsign(&self) -> DSTINCSIGN_R { - DSTINCSIGN_R::new(((self.bits >> 21) & 1) != 0) + pub fn dstincsign(&self) -> DstincsignR { + DstincsignR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 16:17 - Arbitration Slot Number Select"] #[inline(always)] #[must_use] - pub fn arbslots(&mut self) -> ARBSLOTS_W<16> { - ARBSLOTS_W::new(self) + pub fn arbslots(&mut self) -> ArbslotsW { + ArbslotsW::new(self, 16) } #[doc = "Bit 20 - Source Address Increment Sign"] #[inline(always)] #[must_use] - pub fn srcincsign(&mut self) -> SRCINCSIGN_W<20> { - SRCINCSIGN_W::new(self) + pub fn srcincsign(&mut self) -> SrcincsignW { + SrcincsignW::new(self, 20) } #[doc = "Bit 21 - Destination Address Increment Sign"] #[inline(always)] #[must_use] - pub fn dstincsign(&mut self) -> DSTINCSIGN_W<21> { - DSTINCSIGN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstincsign(&mut self) -> DstincsignW { + DstincsignW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch7_cfg](index.html) module"] -pub struct CH7_CFG_SPEC; -impl crate::RegisterSpec for CH7_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch7CfgSpec; +impl crate::RegisterSpec for Ch7CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch7_cfg::R](R) reader structure"] -impl crate::Readable for CH7_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch7_cfg::W](W) writer structure"] -impl crate::Writable for CH7_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch7_cfg::R`](R) reader structure"] +impl crate::Readable for Ch7CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`ch7_cfg::W`](W) writer structure"] +impl crate::Writable for Ch7CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH7_CFG to value 0"] -impl crate::Resettable for CH7_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch7CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch7_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch7_ctrl.rs index 2a8baee..5d289f3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch7_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch7_ctrl.rs @@ -1,843 +1,842 @@ #[doc = "Register `CH7_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH7_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] -pub type STRUCTTYPE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DMA Structure Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STRUCTTYPE_A { +pub enum Structtype { #[doc = "0: DMA transfer structure type selected."] - TRANSFER = 0, + Transfer = 0, #[doc = "1: Synchronization structure type selected."] - SYNCHRONIZE = 1, + Synchronize = 1, #[doc = "2: Write immediate value structure type selected."] - WRITE = 2, + Write = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STRUCTTYPE_A) -> Self { + fn from(variant: Structtype) -> Self { variant as _ } } -impl STRUCTTYPE_R { +impl crate::FieldSpec for Structtype { + type Ux = u8; +} +impl crate::IsEnum for Structtype {} +#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"] +pub type StructtypeR = crate::FieldReader; +impl StructtypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(STRUCTTYPE_A::TRANSFER), - 1 => Some(STRUCTTYPE_A::SYNCHRONIZE), - 2 => Some(STRUCTTYPE_A::WRITE), + 0 => Some(Structtype::Transfer), + 1 => Some(Structtype::Synchronize), + 2 => Some(Structtype::Write), _ => None, } } - #[doc = "Checks if the value of the field is `TRANSFER`"] + #[doc = "DMA transfer structure type selected."] #[inline(always)] pub fn is_transfer(&self) -> bool { - *self == STRUCTTYPE_A::TRANSFER + *self == Structtype::Transfer } - #[doc = "Checks if the value of the field is `SYNCHRONIZE`"] + #[doc = "Synchronization structure type selected."] #[inline(always)] pub fn is_synchronize(&self) -> bool { - *self == STRUCTTYPE_A::SYNCHRONIZE + *self == Structtype::Synchronize } - #[doc = "Checks if the value of the field is `WRITE`"] + #[doc = "Write immediate value structure type selected."] #[inline(always)] pub fn is_write(&self) -> bool { - *self == STRUCTTYPE_A::WRITE + *self == Structtype::Write } } #[doc = "Field `STRUCTTYPE` writer - DMA Structure Type"] -pub type STRUCTTYPE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH7_CTRL_SPEC, u8, STRUCTTYPE_A, 2, O>; -impl<'a, const O: u8> STRUCTTYPE_W<'a, O> { +pub type StructtypeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Structtype>; +impl<'a, REG> StructtypeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "DMA transfer structure type selected."] #[inline(always)] - pub fn transfer(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::TRANSFER) + pub fn transfer(self) -> &'a mut crate::W { + self.variant(Structtype::Transfer) } #[doc = "Synchronization structure type selected."] #[inline(always)] - pub fn synchronize(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::SYNCHRONIZE) + pub fn synchronize(self) -> &'a mut crate::W { + self.variant(Structtype::Synchronize) } #[doc = "Write immediate value structure type selected."] #[inline(always)] - pub fn write(self) -> &'a mut W { - self.variant(STRUCTTYPE_A::WRITE) + pub fn write(self) -> &'a mut crate::W { + self.variant(Structtype::Write) } } #[doc = "Field `STRUCTREQ` reader - Structure DMA Transfer Request"] -pub type STRUCTREQ_R = crate::BitReader; +pub type StructreqR = crate::BitReader; #[doc = "Field `XFERCNT` reader - DMA Unit Data Transfer Count"] -pub type XFERCNT_R = crate::FieldReader; +pub type XfercntR = crate::FieldReader; #[doc = "Field `XFERCNT` writer - DMA Unit Data Transfer Count"] -pub type XFERCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH7_CTRL_SPEC, u16, u16, 11, O>; +pub type XfercntW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `BYTESWAP` reader - Endian Byte Swap"] -pub type BYTESWAP_R = crate::BitReader; +pub type ByteswapR = crate::BitReader; #[doc = "Field `BYTESWAP` writer - Endian Byte Swap"] -pub type BYTESWAP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH7_CTRL_SPEC, bool, O>; -#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] -pub type BLOCKSIZE_R = crate::FieldReader; +pub type ByteswapW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Block Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BLOCKSIZE_A { +pub enum Blocksize { #[doc = "0: One unit transfer per arbitration"] - UNIT1 = 0, + Unit1 = 0, #[doc = "1: Two unit transfers per arbitration"] - UNIT2 = 1, + Unit2 = 1, #[doc = "2: Three unit transfers per arbitration"] - UNIT3 = 2, + Unit3 = 2, #[doc = "3: Four unit transfers per arbitration"] - UNIT4 = 3, + Unit4 = 3, #[doc = "4: Six unit transfers per arbitration"] - UNIT6 = 4, + Unit6 = 4, #[doc = "5: Eight unit transfers per arbitration"] - UNIT8 = 5, + Unit8 = 5, #[doc = "7: Sixteen unit transfers per arbitration"] - UNIT16 = 7, + Unit16 = 7, #[doc = "9: 32 unit transfers per arbitration"] - UNIT32 = 9, + Unit32 = 9, #[doc = "10: 64 unit transfers per arbitration"] - UNIT64 = 10, + Unit64 = 10, #[doc = "11: 128 unit transfers per arbitration"] - UNIT128 = 11, + Unit128 = 11, #[doc = "12: 256 unit transfers per arbitration"] - UNIT256 = 12, + Unit256 = 12, #[doc = "13: 512 unit transfers per arbitration"] - UNIT512 = 13, + Unit512 = 13, #[doc = "14: 1024 unit transfers per arbitration"] - UNIT1024 = 14, + Unit1024 = 14, #[doc = "15: Transfer all units as specified by the XFRCNT field"] - ALL = 15, + All = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BLOCKSIZE_A) -> Self { + fn from(variant: Blocksize) -> Self { variant as _ } } -impl BLOCKSIZE_R { +impl crate::FieldSpec for Blocksize { + type Ux = u8; +} +impl crate::IsEnum for Blocksize {} +#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"] +pub type BlocksizeR = crate::FieldReader; +impl BlocksizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BLOCKSIZE_A::UNIT1), - 1 => Some(BLOCKSIZE_A::UNIT2), - 2 => Some(BLOCKSIZE_A::UNIT3), - 3 => Some(BLOCKSIZE_A::UNIT4), - 4 => Some(BLOCKSIZE_A::UNIT6), - 5 => Some(BLOCKSIZE_A::UNIT8), - 7 => Some(BLOCKSIZE_A::UNIT16), - 9 => Some(BLOCKSIZE_A::UNIT32), - 10 => Some(BLOCKSIZE_A::UNIT64), - 11 => Some(BLOCKSIZE_A::UNIT128), - 12 => Some(BLOCKSIZE_A::UNIT256), - 13 => Some(BLOCKSIZE_A::UNIT512), - 14 => Some(BLOCKSIZE_A::UNIT1024), - 15 => Some(BLOCKSIZE_A::ALL), + 0 => Some(Blocksize::Unit1), + 1 => Some(Blocksize::Unit2), + 2 => Some(Blocksize::Unit3), + 3 => Some(Blocksize::Unit4), + 4 => Some(Blocksize::Unit6), + 5 => Some(Blocksize::Unit8), + 7 => Some(Blocksize::Unit16), + 9 => Some(Blocksize::Unit32), + 10 => Some(Blocksize::Unit64), + 11 => Some(Blocksize::Unit128), + 12 => Some(Blocksize::Unit256), + 13 => Some(Blocksize::Unit512), + 14 => Some(Blocksize::Unit1024), + 15 => Some(Blocksize::All), _ => None, } } - #[doc = "Checks if the value of the field is `UNIT1`"] + #[doc = "One unit transfer per arbitration"] #[inline(always)] pub fn is_unit1(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1 + *self == Blocksize::Unit1 } - #[doc = "Checks if the value of the field is `UNIT2`"] + #[doc = "Two unit transfers per arbitration"] #[inline(always)] pub fn is_unit2(&self) -> bool { - *self == BLOCKSIZE_A::UNIT2 + *self == Blocksize::Unit2 } - #[doc = "Checks if the value of the field is `UNIT3`"] + #[doc = "Three unit transfers per arbitration"] #[inline(always)] pub fn is_unit3(&self) -> bool { - *self == BLOCKSIZE_A::UNIT3 + *self == Blocksize::Unit3 } - #[doc = "Checks if the value of the field is `UNIT4`"] + #[doc = "Four unit transfers per arbitration"] #[inline(always)] pub fn is_unit4(&self) -> bool { - *self == BLOCKSIZE_A::UNIT4 + *self == Blocksize::Unit4 } - #[doc = "Checks if the value of the field is `UNIT6`"] + #[doc = "Six unit transfers per arbitration"] #[inline(always)] pub fn is_unit6(&self) -> bool { - *self == BLOCKSIZE_A::UNIT6 + *self == Blocksize::Unit6 } - #[doc = "Checks if the value of the field is `UNIT8`"] + #[doc = "Eight unit transfers per arbitration"] #[inline(always)] pub fn is_unit8(&self) -> bool { - *self == BLOCKSIZE_A::UNIT8 + *self == Blocksize::Unit8 } - #[doc = "Checks if the value of the field is `UNIT16`"] + #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] pub fn is_unit16(&self) -> bool { - *self == BLOCKSIZE_A::UNIT16 + *self == Blocksize::Unit16 } - #[doc = "Checks if the value of the field is `UNIT32`"] + #[doc = "32 unit transfers per arbitration"] #[inline(always)] pub fn is_unit32(&self) -> bool { - *self == BLOCKSIZE_A::UNIT32 + *self == Blocksize::Unit32 } - #[doc = "Checks if the value of the field is `UNIT64`"] + #[doc = "64 unit transfers per arbitration"] #[inline(always)] pub fn is_unit64(&self) -> bool { - *self == BLOCKSIZE_A::UNIT64 + *self == Blocksize::Unit64 } - #[doc = "Checks if the value of the field is `UNIT128`"] + #[doc = "128 unit transfers per arbitration"] #[inline(always)] pub fn is_unit128(&self) -> bool { - *self == BLOCKSIZE_A::UNIT128 + *self == Blocksize::Unit128 } - #[doc = "Checks if the value of the field is `UNIT256`"] + #[doc = "256 unit transfers per arbitration"] #[inline(always)] pub fn is_unit256(&self) -> bool { - *self == BLOCKSIZE_A::UNIT256 + *self == Blocksize::Unit256 } - #[doc = "Checks if the value of the field is `UNIT512`"] + #[doc = "512 unit transfers per arbitration"] #[inline(always)] pub fn is_unit512(&self) -> bool { - *self == BLOCKSIZE_A::UNIT512 + *self == Blocksize::Unit512 } - #[doc = "Checks if the value of the field is `UNIT1024`"] + #[doc = "1024 unit transfers per arbitration"] #[inline(always)] pub fn is_unit1024(&self) -> bool { - *self == BLOCKSIZE_A::UNIT1024 + *self == Blocksize::Unit1024 } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] pub fn is_all(&self) -> bool { - *self == BLOCKSIZE_A::ALL + *self == Blocksize::All } } #[doc = "Field `BLOCKSIZE` writer - Block Transfer Size"] -pub type BLOCKSIZE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH7_CTRL_SPEC, u8, BLOCKSIZE_A, 4, O>; -impl<'a, const O: u8> BLOCKSIZE_W<'a, O> { +pub type BlocksizeW<'a, REG> = crate::FieldWriter<'a, REG, 4, Blocksize>; +impl<'a, REG> BlocksizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "One unit transfer per arbitration"] #[inline(always)] - pub fn unit1(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1) + pub fn unit1(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1) } #[doc = "Two unit transfers per arbitration"] #[inline(always)] - pub fn unit2(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT2) + pub fn unit2(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit2) } #[doc = "Three unit transfers per arbitration"] #[inline(always)] - pub fn unit3(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT3) + pub fn unit3(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit3) } #[doc = "Four unit transfers per arbitration"] #[inline(always)] - pub fn unit4(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT4) + pub fn unit4(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit4) } #[doc = "Six unit transfers per arbitration"] #[inline(always)] - pub fn unit6(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT6) + pub fn unit6(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit6) } #[doc = "Eight unit transfers per arbitration"] #[inline(always)] - pub fn unit8(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT8) + pub fn unit8(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit8) } #[doc = "Sixteen unit transfers per arbitration"] #[inline(always)] - pub fn unit16(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT16) + pub fn unit16(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit16) } #[doc = "32 unit transfers per arbitration"] #[inline(always)] - pub fn unit32(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT32) + pub fn unit32(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit32) } #[doc = "64 unit transfers per arbitration"] #[inline(always)] - pub fn unit64(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT64) + pub fn unit64(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit64) } #[doc = "128 unit transfers per arbitration"] #[inline(always)] - pub fn unit128(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT128) + pub fn unit128(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit128) } #[doc = "256 unit transfers per arbitration"] #[inline(always)] - pub fn unit256(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT256) + pub fn unit256(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit256) } #[doc = "512 unit transfers per arbitration"] #[inline(always)] - pub fn unit512(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT512) + pub fn unit512(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit512) } #[doc = "1024 unit transfers per arbitration"] #[inline(always)] - pub fn unit1024(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::UNIT1024) + pub fn unit1024(self) -> &'a mut crate::W { + self.variant(Blocksize::Unit1024) } #[doc = "Transfer all units as specified by the XFRCNT field"] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(BLOCKSIZE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Blocksize::All) } } #[doc = "Field `DONEIEN` reader - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_R = crate::BitReader; +pub type DoneienR = crate::BitReader; #[doc = "Field `DONEIEN` writer - DMA Operation Done Interrupt Flag Set En"] -pub type DONEIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH7_CTRL_SPEC, bool, O>; -#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] -pub type REQMODE_R = crate::BitReader; +pub type DoneienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "DMA Request Transfer Mode Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REQMODE_A { +pub enum Reqmode { #[doc = "0: The LDMA transfers one BLOCKSIZE per transfer request."] - BLOCK = 0, + Block = 0, #[doc = "1: One transfer request transfers all units as defined by the XFRCNT field."] - ALL = 1, + All = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REQMODE_A) -> Self { + fn from(variant: Reqmode) -> Self { variant as u8 != 0 } } -impl REQMODE_R { +#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"] +pub type ReqmodeR = crate::BitReader; +impl ReqmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REQMODE_A { + pub const fn variant(&self) -> Reqmode { match self.bits { - false => REQMODE_A::BLOCK, - true => REQMODE_A::ALL, + false => Reqmode::Block, + true => Reqmode::All, } } - #[doc = "Checks if the value of the field is `BLOCK`"] + #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] pub fn is_block(&self) -> bool { - *self == REQMODE_A::BLOCK + *self == Reqmode::Block } - #[doc = "Checks if the value of the field is `ALL`"] + #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] pub fn is_all(&self) -> bool { - *self == REQMODE_A::ALL + *self == Reqmode::All } } #[doc = "Field `REQMODE` writer - DMA Request Transfer Mode Select"] -pub type REQMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH7_CTRL_SPEC, REQMODE_A, O>; -impl<'a, const O: u8> REQMODE_W<'a, O> { +pub type ReqmodeW<'a, REG> = crate::BitWriter<'a, REG, Reqmode>; +impl<'a, REG> ReqmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The LDMA transfers one BLOCKSIZE per transfer request."] #[inline(always)] - pub fn block(self) -> &'a mut W { - self.variant(REQMODE_A::BLOCK) + pub fn block(self) -> &'a mut crate::W { + self.variant(Reqmode::Block) } #[doc = "One transfer request transfers all units as defined by the XFRCNT field."] #[inline(always)] - pub fn all(self) -> &'a mut W { - self.variant(REQMODE_A::ALL) + pub fn all(self) -> &'a mut crate::W { + self.variant(Reqmode::All) } } #[doc = "Field `DECLOOPCNT` reader - Decrement Loop Count"] -pub type DECLOOPCNT_R = crate::BitReader; +pub type DecloopcntR = crate::BitReader; #[doc = "Field `DECLOOPCNT` writer - Decrement Loop Count"] -pub type DECLOOPCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH7_CTRL_SPEC, bool, O>; +pub type DecloopcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IGNORESREQ` reader - Ignore Sreq"] -pub type IGNORESREQ_R = crate::BitReader; +pub type IgnoresreqR = crate::BitReader; #[doc = "Field `IGNORESREQ` writer - Ignore Sreq"] -pub type IGNORESREQ_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH7_CTRL_SPEC, bool, O>; -#[doc = "Field `SRCINC` reader - Source Address Increment Size"] -pub type SRCINC_R = crate::FieldReader; +pub type IgnoresreqW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SRCINC_A { +pub enum Srcinc { #[doc = "0: Increment source address by one unit data size after each read"] - ONE = 0, + One = 0, #[doc = "1: Increment source address by two unit data sizes after each read"] - TWO = 1, + Two = 1, #[doc = "2: Increment source address by four unit data sizes after each read"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SRCINC_A) -> Self { + fn from(variant: Srcinc) -> Self { variant as _ } } -impl SRCINC_R { +impl crate::FieldSpec for Srcinc { + type Ux = u8; +} +impl crate::IsEnum for Srcinc {} +#[doc = "Field `SRCINC` reader - Source Address Increment Size"] +pub type SrcincR = crate::FieldReader; +impl SrcincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCINC_A { + pub const fn variant(&self) -> Srcinc { match self.bits { - 0 => SRCINC_A::ONE, - 1 => SRCINC_A::TWO, - 2 => SRCINC_A::FOUR, - 3 => SRCINC_A::NONE, + 0 => Srcinc::One, + 1 => Srcinc::Two, + 2 => Srcinc::Four, + 3 => Srcinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == SRCINC_A::ONE + *self == Srcinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == SRCINC_A::TWO + *self == Srcinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == SRCINC_A::FOUR + *self == Srcinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SRCINC_A::NONE + *self == Srcinc::None } } #[doc = "Field `SRCINC` writer - Source Address Increment Size"] -pub type SRCINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH7_CTRL_SPEC, u8, SRCINC_A, 2, O>; -impl<'a, const O: u8> SRCINC_W<'a, O> { +pub type SrcincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Srcinc, crate::Safe>; +impl<'a, REG> SrcincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment source address by one unit data size after each read"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(SRCINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Srcinc::One) } #[doc = "Increment source address by two unit data sizes after each read"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(SRCINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Srcinc::Two) } #[doc = "Increment source address by four unit data sizes after each read"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(SRCINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Srcinc::Four) } #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SRCINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Srcinc::None) } } -#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] -pub type SIZE_R = crate::FieldReader; #[doc = "Unit Data Transfer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIZE_A { +pub enum Size { #[doc = "0: Each unit transfer is a byte"] - BYTE = 0, + Byte = 0, #[doc = "1: Each unit transfer is a half-word"] - HALFWORD = 1, + Halfword = 1, #[doc = "2: Each unit transfer is a word"] - WORD = 2, + Word = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIZE_A) -> Self { + fn from(variant: Size) -> Self { variant as _ } } -impl SIZE_R { +impl crate::FieldSpec for Size { + type Ux = u8; +} +impl crate::IsEnum for Size {} +#[doc = "Field `SIZE` reader - Unit Data Transfer Size"] +pub type SizeR = crate::FieldReader; +impl SizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIZE_A::BYTE), - 1 => Some(SIZE_A::HALFWORD), - 2 => Some(SIZE_A::WORD), + 0 => Some(Size::Byte), + 1 => Some(Size::Halfword), + 2 => Some(Size::Word), _ => None, } } - #[doc = "Checks if the value of the field is `BYTE`"] + #[doc = "Each unit transfer is a byte"] #[inline(always)] pub fn is_byte(&self) -> bool { - *self == SIZE_A::BYTE + *self == Size::Byte } - #[doc = "Checks if the value of the field is `HALFWORD`"] + #[doc = "Each unit transfer is a half-word"] #[inline(always)] pub fn is_halfword(&self) -> bool { - *self == SIZE_A::HALFWORD + *self == Size::Halfword } - #[doc = "Checks if the value of the field is `WORD`"] + #[doc = "Each unit transfer is a word"] #[inline(always)] pub fn is_word(&self) -> bool { - *self == SIZE_A::WORD + *self == Size::Word } } #[doc = "Field `SIZE` writer - Unit Data Transfer Size"] -pub type SIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH7_CTRL_SPEC, u8, SIZE_A, 2, O>; -impl<'a, const O: u8> SIZE_W<'a, O> { +pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Size>; +impl<'a, REG> SizeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Each unit transfer is a byte"] #[inline(always)] - pub fn byte(self) -> &'a mut W { - self.variant(SIZE_A::BYTE) + pub fn byte(self) -> &'a mut crate::W { + self.variant(Size::Byte) } #[doc = "Each unit transfer is a half-word"] #[inline(always)] - pub fn halfword(self) -> &'a mut W { - self.variant(SIZE_A::HALFWORD) + pub fn halfword(self) -> &'a mut crate::W { + self.variant(Size::Halfword) } #[doc = "Each unit transfer is a word"] #[inline(always)] - pub fn word(self) -> &'a mut W { - self.variant(SIZE_A::WORD) + pub fn word(self) -> &'a mut crate::W { + self.variant(Size::Word) } } -#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] -pub type DSTINC_R = crate::FieldReader; #[doc = "Destination Address Increment Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DSTINC_A { +pub enum Dstinc { #[doc = "0: Increment destination address by one unit data size after each write"] - ONE = 0, + One = 0, #[doc = "1: Increment destination address by two unit data sizes after each write"] - TWO = 1, + Two = 1, #[doc = "2: Increment destination address by four unit data sizes after each write"] - FOUR = 2, + Four = 2, #[doc = "3: Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DSTINC_A) -> Self { + fn from(variant: Dstinc) -> Self { variant as _ } } -impl DSTINC_R { +impl crate::FieldSpec for Dstinc { + type Ux = u8; +} +impl crate::IsEnum for Dstinc {} +#[doc = "Field `DSTINC` reader - Destination Address Increment Size"] +pub type DstincR = crate::FieldReader; +impl DstincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTINC_A { + pub const fn variant(&self) -> Dstinc { match self.bits { - 0 => DSTINC_A::ONE, - 1 => DSTINC_A::TWO, - 2 => DSTINC_A::FOUR, - 3 => DSTINC_A::NONE, + 0 => Dstinc::One, + 1 => Dstinc::Two, + 2 => Dstinc::Four, + 3 => Dstinc::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == DSTINC_A::ONE + *self == Dstinc::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == DSTINC_A::TWO + *self == Dstinc::Two } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == DSTINC_A::FOUR + *self == Dstinc::Four } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == DSTINC_A::NONE + *self == Dstinc::None } } #[doc = "Field `DSTINC` writer - Destination Address Increment Size"] -pub type DSTINC_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH7_CTRL_SPEC, u8, DSTINC_A, 2, O>; -impl<'a, const O: u8> DSTINC_W<'a, O> { +pub type DstincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dstinc, crate::Safe>; +impl<'a, REG> DstincW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Increment destination address by one unit data size after each write"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(DSTINC_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Dstinc::One) } #[doc = "Increment destination address by two unit data sizes after each write"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(DSTINC_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Dstinc::Two) } #[doc = "Increment destination address by four unit data sizes after each write"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(DSTINC_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Dstinc::Four) } #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(DSTINC_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Dstinc::None) } } -#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] -pub type SRCMODE_R = crate::BitReader; #[doc = "Source Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRCMODE_A { +pub enum Srcmode { #[doc = "0: The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRCMODE_A) -> Self { + fn from(variant: Srcmode) -> Self { variant as u8 != 0 } } -impl SRCMODE_R { +#[doc = "Field `SRCMODE` reader - Source Addressing Mode"] +pub type SrcmodeR = crate::BitReader; +impl SrcmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRCMODE_A { + pub const fn variant(&self) -> Srcmode { match self.bits { - false => SRCMODE_A::ABSOLUTE, - true => SRCMODE_A::RELATIVE, + false => Srcmode::Absolute, + true => Srcmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the absolute address of the source data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == SRCMODE_A::ABSOLUTE + *self == Srcmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The SRCADDR field of LDMA_CHx_SRC contains the relative offset of the source data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == SRCMODE_A::RELATIVE + *self == Srcmode::Relative } } -#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] -pub type DSTMODE_R = crate::BitReader; #[doc = "Destination Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSTMODE_A { +pub enum Dstmode { #[doc = "0: The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSTMODE_A) -> Self { + fn from(variant: Dstmode) -> Self { variant as u8 != 0 } } -impl DSTMODE_R { +#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"] +pub type DstmodeR = crate::BitReader; +impl DstmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DSTMODE_A { + pub const fn variant(&self) -> Dstmode { match self.bits { - false => DSTMODE_A::ABSOLUTE, - true => DSTMODE_A::RELATIVE, + false => Dstmode::Absolute, + true => Dstmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the absolute address of the destination data."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == DSTMODE_A::ABSOLUTE + *self == Dstmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The DSTADDR field of LDMA_CHx_DST contains the relative offset of the destination data."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == DSTMODE_A::RELATIVE + *self == Dstmode::Relative } } impl R { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] - pub fn structtype(&self) -> STRUCTTYPE_R { - STRUCTTYPE_R::new((self.bits & 3) as u8) + pub fn structtype(&self) -> StructtypeR { + StructtypeR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Structure DMA Transfer Request"] #[inline(always)] - pub fn structreq(&self) -> STRUCTREQ_R { - STRUCTREQ_R::new(((self.bits >> 3) & 1) != 0) + pub fn structreq(&self) -> StructreqR { + StructreqR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] - pub fn xfercnt(&self) -> XFERCNT_R { - XFERCNT_R::new(((self.bits >> 4) & 0x07ff) as u16) + pub fn xfercnt(&self) -> XfercntR { + XfercntR::new(((self.bits >> 4) & 0x07ff) as u16) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] - pub fn byteswap(&self) -> BYTESWAP_R { - BYTESWAP_R::new(((self.bits >> 15) & 1) != 0) + pub fn byteswap(&self) -> ByteswapR { + ByteswapR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] - pub fn blocksize(&self) -> BLOCKSIZE_R { - BLOCKSIZE_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn blocksize(&self) -> BlocksizeR { + BlocksizeR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] - pub fn doneien(&self) -> DONEIEN_R { - DONEIEN_R::new(((self.bits >> 20) & 1) != 0) + pub fn doneien(&self) -> DoneienR { + DoneienR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] - pub fn reqmode(&self) -> REQMODE_R { - REQMODE_R::new(((self.bits >> 21) & 1) != 0) + pub fn reqmode(&self) -> ReqmodeR { + ReqmodeR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] - pub fn decloopcnt(&self) -> DECLOOPCNT_R { - DECLOOPCNT_R::new(((self.bits >> 22) & 1) != 0) + pub fn decloopcnt(&self) -> DecloopcntR { + DecloopcntR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] - pub fn ignoresreq(&self) -> IGNORESREQ_R { - IGNORESREQ_R::new(((self.bits >> 23) & 1) != 0) + pub fn ignoresreq(&self) -> IgnoresreqR { + IgnoresreqR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] - pub fn srcinc(&self) -> SRCINC_R { - SRCINC_R::new(((self.bits >> 24) & 3) as u8) + pub fn srcinc(&self) -> SrcincR { + SrcincR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] - pub fn size(&self) -> SIZE_R { - SIZE_R::new(((self.bits >> 26) & 3) as u8) + pub fn size(&self) -> SizeR { + SizeR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] - pub fn dstinc(&self) -> DSTINC_R { - DSTINC_R::new(((self.bits >> 28) & 3) as u8) + pub fn dstinc(&self) -> DstincR { + DstincR::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bit 30 - Source Addressing Mode"] #[inline(always)] - pub fn srcmode(&self) -> SRCMODE_R { - SRCMODE_R::new(((self.bits >> 30) & 1) != 0) + pub fn srcmode(&self) -> SrcmodeR { + SrcmodeR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Destination Addressing Mode"] #[inline(always)] - pub fn dstmode(&self) -> DSTMODE_R { - DSTMODE_R::new(((self.bits >> 31) & 1) != 0) + pub fn dstmode(&self) -> DstmodeR { + DstmodeR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - DMA Structure Type"] #[inline(always)] #[must_use] - pub fn structtype(&mut self) -> STRUCTTYPE_W<0> { - STRUCTTYPE_W::new(self) + pub fn structtype(&mut self) -> StructtypeW { + StructtypeW::new(self, 0) } #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"] #[inline(always)] #[must_use] - pub fn xfercnt(&mut self) -> XFERCNT_W<4> { - XFERCNT_W::new(self) + pub fn xfercnt(&mut self) -> XfercntW { + XfercntW::new(self, 4) } #[doc = "Bit 15 - Endian Byte Swap"] #[inline(always)] #[must_use] - pub fn byteswap(&mut self) -> BYTESWAP_W<15> { - BYTESWAP_W::new(self) + pub fn byteswap(&mut self) -> ByteswapW { + ByteswapW::new(self, 15) } #[doc = "Bits 16:19 - Block Transfer Size"] #[inline(always)] #[must_use] - pub fn blocksize(&mut self) -> BLOCKSIZE_W<16> { - BLOCKSIZE_W::new(self) + pub fn blocksize(&mut self) -> BlocksizeW { + BlocksizeW::new(self, 16) } #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set En"] #[inline(always)] #[must_use] - pub fn doneien(&mut self) -> DONEIEN_W<20> { - DONEIEN_W::new(self) + pub fn doneien(&mut self) -> DoneienW { + DoneienW::new(self, 20) } #[doc = "Bit 21 - DMA Request Transfer Mode Select"] #[inline(always)] #[must_use] - pub fn reqmode(&mut self) -> REQMODE_W<21> { - REQMODE_W::new(self) + pub fn reqmode(&mut self) -> ReqmodeW { + ReqmodeW::new(self, 21) } #[doc = "Bit 22 - Decrement Loop Count"] #[inline(always)] #[must_use] - pub fn decloopcnt(&mut self) -> DECLOOPCNT_W<22> { - DECLOOPCNT_W::new(self) + pub fn decloopcnt(&mut self) -> DecloopcntW { + DecloopcntW::new(self, 22) } #[doc = "Bit 23 - Ignore Sreq"] #[inline(always)] #[must_use] - pub fn ignoresreq(&mut self) -> IGNORESREQ_W<23> { - IGNORESREQ_W::new(self) + pub fn ignoresreq(&mut self) -> IgnoresreqW { + IgnoresreqW::new(self, 23) } #[doc = "Bits 24:25 - Source Address Increment Size"] #[inline(always)] #[must_use] - pub fn srcinc(&mut self) -> SRCINC_W<24> { - SRCINC_W::new(self) + pub fn srcinc(&mut self) -> SrcincW { + SrcincW::new(self, 24) } #[doc = "Bits 26:27 - Unit Data Transfer Size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SIZE_W<26> { - SIZE_W::new(self) + pub fn size(&mut self) -> SizeW { + SizeW::new(self, 26) } #[doc = "Bits 28:29 - Destination Address Increment Size"] #[inline(always)] #[must_use] - pub fn dstinc(&mut self) -> DSTINC_W<28> { - DSTINC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstinc(&mut self) -> DstincW { + DstincW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch7_ctrl](index.html) module"] -pub struct CH7_CTRL_SPEC; -impl crate::RegisterSpec for CH7_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch7CtrlSpec; +impl crate::RegisterSpec for Ch7CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch7_ctrl::R](R) reader structure"] -impl crate::Readable for CH7_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch7_ctrl::W](W) writer structure"] -impl crate::Writable for CH7_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch7_ctrl::R`](R) reader structure"] +impl crate::Readable for Ch7CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ch7_ctrl::W`](W) writer structure"] +impl crate::Writable for Ch7CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH7_CTRL to value 0"] -impl crate::Resettable for CH7_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch7CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch7_dst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch7_dst.rs index 491f3c6..b6e917a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch7_dst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch7_dst.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH7_DST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH7_DST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DSTADDR` reader - Destination Data Address"] -pub type DSTADDR_R = crate::FieldReader; +pub type DstaddrR = crate::FieldReader; #[doc = "Field `DSTADDR` writer - Destination Data Address"] -pub type DSTADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH7_DST_SPEC, u32, u32, 32, O>; +pub type DstaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] - pub fn dstaddr(&self) -> DSTADDR_R { - DSTADDR_R::new(self.bits) + pub fn dstaddr(&self) -> DstaddrR { + DstaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Destination Data Address"] #[inline(always)] #[must_use] - pub fn dstaddr(&mut self) -> DSTADDR_W<0> { - DSTADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dstaddr(&mut self) -> DstaddrW { + DstaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch7_dst](index.html) module"] -pub struct CH7_DST_SPEC; -impl crate::RegisterSpec for CH7_DST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_dst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_dst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch7DstSpec; +impl crate::RegisterSpec for Ch7DstSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch7_dst::R](R) reader structure"] -impl crate::Readable for CH7_DST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch7_dst::W](W) writer structure"] -impl crate::Writable for CH7_DST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch7_dst::R`](R) reader structure"] +impl crate::Readable for Ch7DstSpec {} +#[doc = "`write(|w| ..)` method takes [`ch7_dst::W`](W) writer structure"] +impl crate::Writable for Ch7DstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH7_DST to value 0"] -impl crate::Resettable for CH7_DST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch7DstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch7_link.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch7_link.rs index f216919..62ba3aa 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch7_link.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch7_link.rs @@ -1,136 +1,96 @@ #[doc = "Register `CH7_LINK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH7_LINK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] -pub type LINKMODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Link Structure Addressing Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LINKMODE_A { +pub enum Linkmode { #[doc = "0: The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] - ABSOLUTE = 0, + Absolute = 0, #[doc = "1: The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] - RELATIVE = 1, + Relative = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LINKMODE_A) -> Self { + fn from(variant: Linkmode) -> Self { variant as u8 != 0 } } -impl LINKMODE_R { +#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"] +pub type LinkmodeR = crate::BitReader; +impl LinkmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LINKMODE_A { + pub const fn variant(&self) -> Linkmode { match self.bits { - false => LINKMODE_A::ABSOLUTE, - true => LINKMODE_A::RELATIVE, + false => Linkmode::Absolute, + true => Linkmode::Relative, } } - #[doc = "Checks if the value of the field is `ABSOLUTE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the absolute address of the linked descriptor."] #[inline(always)] pub fn is_absolute(&self) -> bool { - *self == LINKMODE_A::ABSOLUTE + *self == Linkmode::Absolute } - #[doc = "Checks if the value of the field is `RELATIVE`"] + #[doc = "The LINKADDR field of LDMA_CHx_LINK contains the relative offset of the linked descriptor."] #[inline(always)] pub fn is_relative(&self) -> bool { - *self == LINKMODE_A::RELATIVE + *self == Linkmode::Relative } } #[doc = "Field `LINK` reader - Link Next Structure"] -pub type LINK_R = crate::BitReader; +pub type LinkR = crate::BitReader; #[doc = "Field `LINK` writer - Link Next Structure"] -pub type LINK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH7_LINK_SPEC, bool, O>; +pub type LinkW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LINKADDR` reader - Link Structure Address"] -pub type LINKADDR_R = crate::FieldReader; +pub type LinkaddrR = crate::FieldReader; #[doc = "Field `LINKADDR` writer - Link Structure Address"] -pub type LINKADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH7_LINK_SPEC, u32, u32, 30, O>; +pub type LinkaddrW<'a, REG> = crate::FieldWriter<'a, REG, 30, u32>; impl R { #[doc = "Bit 0 - Link Structure Addressing Mode"] #[inline(always)] - pub fn linkmode(&self) -> LINKMODE_R { - LINKMODE_R::new((self.bits & 1) != 0) + pub fn linkmode(&self) -> LinkmodeR { + LinkmodeR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] - pub fn link(&self) -> LINK_R { - LINK_R::new(((self.bits >> 1) & 1) != 0) + pub fn link(&self) -> LinkR { + LinkR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] - pub fn linkaddr(&self) -> LINKADDR_R { - LINKADDR_R::new((self.bits >> 2) & 0x3fff_ffff) + pub fn linkaddr(&self) -> LinkaddrR { + LinkaddrR::new((self.bits >> 2) & 0x3fff_ffff) } } impl W { #[doc = "Bit 1 - Link Next Structure"] #[inline(always)] #[must_use] - pub fn link(&mut self) -> LINK_W<1> { - LINK_W::new(self) + pub fn link(&mut self) -> LinkW { + LinkW::new(self, 1) } #[doc = "Bits 2:31 - Link Structure Address"] #[inline(always)] #[must_use] - pub fn linkaddr(&mut self) -> LINKADDR_W<2> { - LINKADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn linkaddr(&mut self) -> LinkaddrW { + LinkaddrW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch7_link](index.html) module"] -pub struct CH7_LINK_SPEC; -impl crate::RegisterSpec for CH7_LINK_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_link::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_link::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch7LinkSpec; +impl crate::RegisterSpec for Ch7LinkSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch7_link::R](R) reader structure"] -impl crate::Readable for CH7_LINK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch7_link::W](W) writer structure"] -impl crate::Writable for CH7_LINK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch7_link::R`](R) reader structure"] +impl crate::Readable for Ch7LinkSpec {} +#[doc = "`write(|w| ..)` method takes [`ch7_link::W`](W) writer structure"] +impl crate::Writable for Ch7LinkSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH7_LINK to value 0"] -impl crate::Resettable for CH7_LINK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch7LinkSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch7_loop.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch7_loop.rs index e943d44..aaba647 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch7_loop.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch7_loop.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH7_LOOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH7_LOOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOOPCNT` reader - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_R = crate::FieldReader; +pub type LoopcntR = crate::FieldReader; #[doc = "Field `LOOPCNT` writer - Linked Structure Sequence Loop Counter"] -pub type LOOPCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH7_LOOP_SPEC, u8, u8, 8, O>; +pub type LoopcntW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] - pub fn loopcnt(&self) -> LOOPCNT_R { - LOOPCNT_R::new((self.bits & 0xff) as u8) + pub fn loopcnt(&self) -> LoopcntR { + LoopcntR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Linked Structure Sequence Loop Counter"] #[inline(always)] #[must_use] - pub fn loopcnt(&mut self) -> LOOPCNT_W<0> { - LOOPCNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn loopcnt(&mut self) -> LoopcntW { + LoopcntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch7_loop](index.html) module"] -pub struct CH7_LOOP_SPEC; -impl crate::RegisterSpec for CH7_LOOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_loop::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_loop::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch7LoopSpec; +impl crate::RegisterSpec for Ch7LoopSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch7_loop::R](R) reader structure"] -impl crate::Readable for CH7_LOOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch7_loop::W](W) writer structure"] -impl crate::Writable for CH7_LOOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch7_loop::R`](R) reader structure"] +impl crate::Readable for Ch7LoopSpec {} +#[doc = "`write(|w| ..)` method takes [`ch7_loop::W`](W) writer structure"] +impl crate::Writable for Ch7LoopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH7_LOOP to value 0"] -impl crate::Resettable for CH7_LOOP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch7LoopSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch7_src.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch7_src.rs index 094d472..e407512 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch7_src.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ch7_src.rs @@ -1,80 +1,40 @@ #[doc = "Register `CH7_SRC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH7_SRC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SRCADDR` reader - Source Data Address"] -pub type SRCADDR_R = crate::FieldReader; +pub type SrcaddrR = crate::FieldReader; #[doc = "Field `SRCADDR` writer - Source Data Address"] -pub type SRCADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH7_SRC_SPEC, u32, u32, 32, O>; +pub type SrcaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] - pub fn srcaddr(&self) -> SRCADDR_R { - SRCADDR_R::new(self.bits) + pub fn srcaddr(&self) -> SrcaddrR { + SrcaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Source Data Address"] #[inline(always)] #[must_use] - pub fn srcaddr(&mut self) -> SRCADDR_W<0> { - SRCADDR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn srcaddr(&mut self) -> SrcaddrW { + SrcaddrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch7_src](index.html) module"] -pub struct CH7_SRC_SPEC; -impl crate::RegisterSpec for CH7_SRC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_src::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_src::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch7SrcSpec; +impl crate::RegisterSpec for Ch7SrcSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch7_src::R](R) reader structure"] -impl crate::Readable for CH7_SRC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch7_src::W](W) writer structure"] -impl crate::Writable for CH7_SRC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch7_src::R`](R) reader structure"] +impl crate::Readable for Ch7SrcSpec {} +#[doc = "`write(|w| ..)` method takes [`ch7_src::W`](W) writer structure"] +impl crate::Writable for Ch7SrcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH7_SRC to value 0"] -impl crate::Resettable for CH7_SRC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch7SrcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/chbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/chbusy.rs index f21fe96..2459826 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/chbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/chbusy.rs @@ -1,37 +1,22 @@ #[doc = "Register `CHBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `BUSY` reader - Channels Busy"] -pub type BUSY_R = crate::FieldReader; +pub type BusyR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Channels Busy"] #[inline(always)] - pub fn busy(&self) -> BUSY_R { - BUSY_R::new((self.bits & 0xff) as u8) + pub fn busy(&self) -> BusyR { + BusyR::new((self.bits & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chbusy](index.html) module"] -pub struct CHBUSY_SPEC; -impl crate::RegisterSpec for CHBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`chbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ChbusySpec; +impl crate::RegisterSpec for ChbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [chbusy::R](R) reader structure"] -impl crate::Readable for CHBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`chbusy::R`](R) reader structure"] +impl crate::Readable for ChbusySpec {} #[doc = "`reset()` method sets CHBUSY to value 0"] -impl crate::Resettable for CHBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ChbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/chdis.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/chdis.rs index 00fa1e0..f52faeb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/chdis.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/chdis.rs @@ -1,52 +1,27 @@ #[doc = "Register `CHDIS` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CHDIS` writer - DMA Channel disable"] -pub type CHDIS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CHDIS_SPEC, u8, u8, 8, O>; +pub type ChdisW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - DMA Channel disable"] #[inline(always)] #[must_use] - pub fn chdis(&mut self) -> CHDIS_W<0> { - CHDIS_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn chdis(&mut self) -> ChdisW { + ChdisW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chdis](index.html) module"] -pub struct CHDIS_SPEC; -impl crate::RegisterSpec for CHDIS_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chdis::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ChdisSpec; +impl crate::RegisterSpec for ChdisSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [chdis::W](W) writer structure"] -impl crate::Writable for CHDIS_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`chdis::W`](W) writer structure"] +impl crate::Writable for ChdisSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHDIS to value 0"] -impl crate::Resettable for CHDIS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ChdisSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/chdone.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/chdone.rs index 739db59..5605c75 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/chdone.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/chdone.rs @@ -1,185 +1,145 @@ #[doc = "Register `CHDONE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CHDONE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CHDONE0` reader - DMA Channel Link done intr flag"] -pub type CHDONE0_R = crate::BitReader; +pub type Chdone0R = crate::BitReader; #[doc = "Field `CHDONE0` writer - DMA Channel Link done intr flag"] -pub type CHDONE0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CHDONE_SPEC, bool, O>; +pub type Chdone0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHDONE1` reader - DMA Channel Link done intr flag"] -pub type CHDONE1_R = crate::BitReader; +pub type Chdone1R = crate::BitReader; #[doc = "Field `CHDONE1` writer - DMA Channel Link done intr flag"] -pub type CHDONE1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CHDONE_SPEC, bool, O>; +pub type Chdone1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHDONE2` reader - DMA Channel Link done intr flag"] -pub type CHDONE2_R = crate::BitReader; +pub type Chdone2R = crate::BitReader; #[doc = "Field `CHDONE2` writer - DMA Channel Link done intr flag"] -pub type CHDONE2_W<'a, const O: u8> = crate::BitWriter<'a, u32, CHDONE_SPEC, bool, O>; +pub type Chdone2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHDONE3` reader - DMA Channel Link done intr flag"] -pub type CHDONE3_R = crate::BitReader; +pub type Chdone3R = crate::BitReader; #[doc = "Field `CHDONE3` writer - DMA Channel Link done intr flag"] -pub type CHDONE3_W<'a, const O: u8> = crate::BitWriter<'a, u32, CHDONE_SPEC, bool, O>; +pub type Chdone3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHDONE4` reader - DMA Channel Link done intr flag"] -pub type CHDONE4_R = crate::BitReader; +pub type Chdone4R = crate::BitReader; #[doc = "Field `CHDONE4` writer - DMA Channel Link done intr flag"] -pub type CHDONE4_W<'a, const O: u8> = crate::BitWriter<'a, u32, CHDONE_SPEC, bool, O>; +pub type Chdone4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHDONE5` reader - DMA Channel Link done intr flag"] -pub type CHDONE5_R = crate::BitReader; +pub type Chdone5R = crate::BitReader; #[doc = "Field `CHDONE5` writer - DMA Channel Link done intr flag"] -pub type CHDONE5_W<'a, const O: u8> = crate::BitWriter<'a, u32, CHDONE_SPEC, bool, O>; +pub type Chdone5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHDONE6` reader - DMA Channel Link done intr flag"] -pub type CHDONE6_R = crate::BitReader; +pub type Chdone6R = crate::BitReader; #[doc = "Field `CHDONE6` writer - DMA Channel Link done intr flag"] -pub type CHDONE6_W<'a, const O: u8> = crate::BitWriter<'a, u32, CHDONE_SPEC, bool, O>; +pub type Chdone6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHDONE7` reader - DMA Channel Link done intr flag"] -pub type CHDONE7_R = crate::BitReader; +pub type Chdone7R = crate::BitReader; #[doc = "Field `CHDONE7` writer - DMA Channel Link done intr flag"] -pub type CHDONE7_W<'a, const O: u8> = crate::BitWriter<'a, u32, CHDONE_SPEC, bool, O>; +pub type Chdone7W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DMA Channel Link done intr flag"] #[inline(always)] - pub fn chdone0(&self) -> CHDONE0_R { - CHDONE0_R::new((self.bits & 1) != 0) + pub fn chdone0(&self) -> Chdone0R { + Chdone0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DMA Channel Link done intr flag"] #[inline(always)] - pub fn chdone1(&self) -> CHDONE1_R { - CHDONE1_R::new(((self.bits >> 1) & 1) != 0) + pub fn chdone1(&self) -> Chdone1R { + Chdone1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DMA Channel Link done intr flag"] #[inline(always)] - pub fn chdone2(&self) -> CHDONE2_R { - CHDONE2_R::new(((self.bits >> 2) & 1) != 0) + pub fn chdone2(&self) -> Chdone2R { + Chdone2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DMA Channel Link done intr flag"] #[inline(always)] - pub fn chdone3(&self) -> CHDONE3_R { - CHDONE3_R::new(((self.bits >> 3) & 1) != 0) + pub fn chdone3(&self) -> Chdone3R { + Chdone3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - DMA Channel Link done intr flag"] #[inline(always)] - pub fn chdone4(&self) -> CHDONE4_R { - CHDONE4_R::new(((self.bits >> 4) & 1) != 0) + pub fn chdone4(&self) -> Chdone4R { + Chdone4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DMA Channel Link done intr flag"] #[inline(always)] - pub fn chdone5(&self) -> CHDONE5_R { - CHDONE5_R::new(((self.bits >> 5) & 1) != 0) + pub fn chdone5(&self) -> Chdone5R { + Chdone5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - DMA Channel Link done intr flag"] #[inline(always)] - pub fn chdone6(&self) -> CHDONE6_R { - CHDONE6_R::new(((self.bits >> 6) & 1) != 0) + pub fn chdone6(&self) -> Chdone6R { + Chdone6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - DMA Channel Link done intr flag"] #[inline(always)] - pub fn chdone7(&self) -> CHDONE7_R { - CHDONE7_R::new(((self.bits >> 7) & 1) != 0) + pub fn chdone7(&self) -> Chdone7R { + Chdone7R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - DMA Channel Link done intr flag"] #[inline(always)] #[must_use] - pub fn chdone0(&mut self) -> CHDONE0_W<0> { - CHDONE0_W::new(self) + pub fn chdone0(&mut self) -> Chdone0W { + Chdone0W::new(self, 0) } #[doc = "Bit 1 - DMA Channel Link done intr flag"] #[inline(always)] #[must_use] - pub fn chdone1(&mut self) -> CHDONE1_W<1> { - CHDONE1_W::new(self) + pub fn chdone1(&mut self) -> Chdone1W { + Chdone1W::new(self, 1) } #[doc = "Bit 2 - DMA Channel Link done intr flag"] #[inline(always)] #[must_use] - pub fn chdone2(&mut self) -> CHDONE2_W<2> { - CHDONE2_W::new(self) + pub fn chdone2(&mut self) -> Chdone2W { + Chdone2W::new(self, 2) } #[doc = "Bit 3 - DMA Channel Link done intr flag"] #[inline(always)] #[must_use] - pub fn chdone3(&mut self) -> CHDONE3_W<3> { - CHDONE3_W::new(self) + pub fn chdone3(&mut self) -> Chdone3W { + Chdone3W::new(self, 3) } #[doc = "Bit 4 - DMA Channel Link done intr flag"] #[inline(always)] #[must_use] - pub fn chdone4(&mut self) -> CHDONE4_W<4> { - CHDONE4_W::new(self) + pub fn chdone4(&mut self) -> Chdone4W { + Chdone4W::new(self, 4) } #[doc = "Bit 5 - DMA Channel Link done intr flag"] #[inline(always)] #[must_use] - pub fn chdone5(&mut self) -> CHDONE5_W<5> { - CHDONE5_W::new(self) + pub fn chdone5(&mut self) -> Chdone5W { + Chdone5W::new(self, 5) } #[doc = "Bit 6 - DMA Channel Link done intr flag"] #[inline(always)] #[must_use] - pub fn chdone6(&mut self) -> CHDONE6_W<6> { - CHDONE6_W::new(self) + pub fn chdone6(&mut self) -> Chdone6W { + Chdone6W::new(self, 6) } #[doc = "Bit 7 - DMA Channel Link done intr flag"] #[inline(always)] #[must_use] - pub fn chdone7(&mut self) -> CHDONE7_W<7> { - CHDONE7_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn chdone7(&mut self) -> Chdone7W { + Chdone7W::new(self, 7) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chdone](index.html) module"] -pub struct CHDONE_SPEC; -impl crate::RegisterSpec for CHDONE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`chdone::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chdone::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ChdoneSpec; +impl crate::RegisterSpec for ChdoneSpec { type Ux = u32; } -#[doc = "`read()` method returns [chdone::R](R) reader structure"] -impl crate::Readable for CHDONE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [chdone::W](W) writer structure"] -impl crate::Writable for CHDONE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`chdone::R`](R) reader structure"] +impl crate::Readable for ChdoneSpec {} +#[doc = "`write(|w| ..)` method takes [`chdone::W`](W) writer structure"] +impl crate::Writable for ChdoneSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHDONE to value 0"] -impl crate::Resettable for CHDONE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ChdoneSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/chen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/chen.rs index 6379f52..7c526f3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/chen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/chen.rs @@ -1,52 +1,27 @@ #[doc = "Register `CHEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CHEN` writer - Channel Enables"] -pub type CHEN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CHEN_SPEC, u8, u8, 8, O>; +pub type ChenW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - Channel Enables"] #[inline(always)] #[must_use] - pub fn chen(&mut self) -> CHEN_W<0> { - CHEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn chen(&mut self) -> ChenW { + ChenW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chen](index.html) module"] -pub struct CHEN_SPEC; -impl crate::RegisterSpec for CHEN_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chen::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ChenSpec; +impl crate::RegisterSpec for ChenSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [chen::W](W) writer structure"] -impl crate::Writable for CHEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`chen::W`](W) writer structure"] +impl crate::Writable for ChenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHEN to value 0"] -impl crate::Resettable for CHEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ChenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/chstatus.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/chstatus.rs index 6ff503b..7fd3c85 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/chstatus.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/chstatus.rs @@ -1,37 +1,22 @@ #[doc = "Register `CHSTATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CHSTATUS` reader - DMA Channel Status"] -pub type CHSTATUS_R = crate::FieldReader; +pub type ChstatusR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - DMA Channel Status"] #[inline(always)] - pub fn chstatus(&self) -> CHSTATUS_R { - CHSTATUS_R::new((self.bits & 0xff) as u8) + pub fn chstatus(&self) -> ChstatusR { + ChstatusR::new((self.bits & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chstatus](index.html) module"] -pub struct CHSTATUS_SPEC; -impl crate::RegisterSpec for CHSTATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`chstatus::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ChstatusSpec; +impl crate::RegisterSpec for ChstatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [chstatus::R](R) reader structure"] -impl crate::Readable for CHSTATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`chstatus::R`](R) reader structure"] +impl crate::Readable for ChstatusSpec {} #[doc = "`reset()` method sets CHSTATUS to value 0"] -impl crate::Resettable for CHSTATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ChstatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ctrl.rs index 4f32327..b3fcd1f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ctrl.rs @@ -1,95 +1,55 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `NUMFIXED` reader - Number of Fixed Priority Channels"] -pub type NUMFIXED_R = crate::FieldReader; +pub type NumfixedR = crate::FieldReader; #[doc = "Field `NUMFIXED` writer - Number of Fixed Priority Channels"] -pub type NUMFIXED_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, u8, 5, O>; +pub type NumfixedW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `CORERST` reader - Reset DMA controller"] -pub type CORERST_R = crate::BitReader; +pub type CorerstR = crate::BitReader; #[doc = "Field `CORERST` writer - Reset DMA controller"] -pub type CORERST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type CorerstW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 24:28 - Number of Fixed Priority Channels"] #[inline(always)] - pub fn numfixed(&self) -> NUMFIXED_R { - NUMFIXED_R::new(((self.bits >> 24) & 0x1f) as u8) + pub fn numfixed(&self) -> NumfixedR { + NumfixedR::new(((self.bits >> 24) & 0x1f) as u8) } #[doc = "Bit 31 - Reset DMA controller"] #[inline(always)] - pub fn corerst(&self) -> CORERST_R { - CORERST_R::new(((self.bits >> 31) & 1) != 0) + pub fn corerst(&self) -> CorerstR { + CorerstR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 24:28 - Number of Fixed Priority Channels"] #[inline(always)] #[must_use] - pub fn numfixed(&mut self) -> NUMFIXED_W<24> { - NUMFIXED_W::new(self) + pub fn numfixed(&mut self) -> NumfixedW { + NumfixedW::new(self, 24) } #[doc = "Bit 31 - Reset DMA controller"] #[inline(always)] #[must_use] - pub fn corerst(&mut self) -> CORERST_W<31> { - CORERST_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn corerst(&mut self) -> CorerstW { + CorerstW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0x1e00_0000"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x1e00_0000; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0x1e00_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/dbghalt.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/dbghalt.rs index 6cd48d4..413452f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/dbghalt.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/dbghalt.rs @@ -1,80 +1,40 @@ #[doc = "Register `DBGHALT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DBGHALT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DBGHALT` reader - DMA Debug Halt"] -pub type DBGHALT_R = crate::FieldReader; +pub type DbghaltR = crate::FieldReader; #[doc = "Field `DBGHALT` writer - DMA Debug Halt"] -pub type DBGHALT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DBGHALT_SPEC, u8, u8, 8, O>; +pub type DbghaltW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - DMA Debug Halt"] #[inline(always)] - pub fn dbghalt(&self) -> DBGHALT_R { - DBGHALT_R::new((self.bits & 0xff) as u8) + pub fn dbghalt(&self) -> DbghaltR { + DbghaltR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - DMA Debug Halt"] #[inline(always)] #[must_use] - pub fn dbghalt(&mut self) -> DBGHALT_W<0> { - DBGHALT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dbghalt(&mut self) -> DbghaltW { + DbghaltW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dbghalt](index.html) module"] -pub struct DBGHALT_SPEC; -impl crate::RegisterSpec for DBGHALT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dbghalt::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dbghalt::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DbghaltSpec; +impl crate::RegisterSpec for DbghaltSpec { type Ux = u32; } -#[doc = "`read()` method returns [dbghalt::R](R) reader structure"] -impl crate::Readable for DBGHALT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dbghalt::W](W) writer structure"] -impl crate::Writable for DBGHALT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dbghalt::R`](R) reader structure"] +impl crate::Readable for DbghaltSpec {} +#[doc = "`write(|w| ..)` method takes [`dbghalt::W`](W) writer structure"] +impl crate::Writable for DbghaltSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DBGHALT to value 0"] -impl crate::Resettable for DBGHALT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DbghaltSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/en.rs index 927745a..51e6ac3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/en.rs @@ -1,80 +1,40 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - LDMA module enable and disable register"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - LDMA module enable and disable register"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - LDMA module enable and disable register"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - LDMA module enable and disable register"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ien.rs index f1439a6..fbe3462 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ien.rs @@ -1,95 +1,55 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CHDONE` reader - Enable or disable the done interrupt"] -pub type CHDONE_R = crate::FieldReader; +pub type ChdoneR = crate::FieldReader; #[doc = "Field `CHDONE` writer - Enable or disable the done interrupt"] -pub type CHDONE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, IEN_SPEC, u8, u8, 8, O>; +pub type ChdoneW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `ERROR` reader - Enable or disable the error interrupt"] -pub type ERROR_R = crate::BitReader; +pub type ErrorR = crate::BitReader; #[doc = "Field `ERROR` writer - Enable or disable the error interrupt"] -pub type ERROR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ErrorW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:7 - Enable or disable the done interrupt"] #[inline(always)] - pub fn chdone(&self) -> CHDONE_R { - CHDONE_R::new((self.bits & 0xff) as u8) + pub fn chdone(&self) -> ChdoneR { + ChdoneR::new((self.bits & 0xff) as u8) } #[doc = "Bit 31 - Enable or disable the error interrupt"] #[inline(always)] - pub fn error(&self) -> ERROR_R { - ERROR_R::new(((self.bits >> 31) & 1) != 0) + pub fn error(&self) -> ErrorR { + ErrorR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:7 - Enable or disable the done interrupt"] #[inline(always)] #[must_use] - pub fn chdone(&mut self) -> CHDONE_W<0> { - CHDONE_W::new(self) + pub fn chdone(&mut self) -> ChdoneW { + ChdoneW::new(self, 0) } #[doc = "Bit 31 - Enable or disable the error interrupt"] #[inline(always)] #[must_use] - pub fn error(&mut self) -> ERROR_W<31> { - ERROR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn error(&mut self) -> ErrorW { + ErrorW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/if_.rs index fefca66..41569cc 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/if_.rs @@ -1,200 +1,160 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DONE0` reader - DMA Structure Operation Done"] -pub type DONE0_R = crate::BitReader; +pub type Done0R = crate::BitReader; #[doc = "Field `DONE0` writer - DMA Structure Operation Done"] -pub type DONE0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Done0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DONE1` reader - DMA Structure Operation Done"] -pub type DONE1_R = crate::BitReader; +pub type Done1R = crate::BitReader; #[doc = "Field `DONE1` writer - DMA Structure Operation Done"] -pub type DONE1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Done1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DONE2` reader - DMA Structure Operation Done"] -pub type DONE2_R = crate::BitReader; +pub type Done2R = crate::BitReader; #[doc = "Field `DONE2` writer - DMA Structure Operation Done"] -pub type DONE2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Done2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DONE3` reader - DMA Structure Operation Done"] -pub type DONE3_R = crate::BitReader; +pub type Done3R = crate::BitReader; #[doc = "Field `DONE3` writer - DMA Structure Operation Done"] -pub type DONE3_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Done3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DONE4` reader - DMA Structure Operation Done"] -pub type DONE4_R = crate::BitReader; +pub type Done4R = crate::BitReader; #[doc = "Field `DONE4` writer - DMA Structure Operation Done"] -pub type DONE4_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Done4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DONE5` reader - DMA Structure Operation Done"] -pub type DONE5_R = crate::BitReader; +pub type Done5R = crate::BitReader; #[doc = "Field `DONE5` writer - DMA Structure Operation Done"] -pub type DONE5_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Done5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DONE6` reader - DMA Structure Operation Done"] -pub type DONE6_R = crate::BitReader; +pub type Done6R = crate::BitReader; #[doc = "Field `DONE6` writer - DMA Structure Operation Done"] -pub type DONE6_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Done6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DONE7` reader - DMA Structure Operation Done"] -pub type DONE7_R = crate::BitReader; +pub type Done7R = crate::BitReader; #[doc = "Field `DONE7` writer - DMA Structure Operation Done"] -pub type DONE7_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Done7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ERROR` reader - Error Flag"] -pub type ERROR_R = crate::BitReader; +pub type ErrorR = crate::BitReader; #[doc = "Field `ERROR` writer - Error Flag"] -pub type ERROR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ErrorW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DMA Structure Operation Done"] #[inline(always)] - pub fn done0(&self) -> DONE0_R { - DONE0_R::new((self.bits & 1) != 0) + pub fn done0(&self) -> Done0R { + Done0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DMA Structure Operation Done"] #[inline(always)] - pub fn done1(&self) -> DONE1_R { - DONE1_R::new(((self.bits >> 1) & 1) != 0) + pub fn done1(&self) -> Done1R { + Done1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DMA Structure Operation Done"] #[inline(always)] - pub fn done2(&self) -> DONE2_R { - DONE2_R::new(((self.bits >> 2) & 1) != 0) + pub fn done2(&self) -> Done2R { + Done2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DMA Structure Operation Done"] #[inline(always)] - pub fn done3(&self) -> DONE3_R { - DONE3_R::new(((self.bits >> 3) & 1) != 0) + pub fn done3(&self) -> Done3R { + Done3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - DMA Structure Operation Done"] #[inline(always)] - pub fn done4(&self) -> DONE4_R { - DONE4_R::new(((self.bits >> 4) & 1) != 0) + pub fn done4(&self) -> Done4R { + Done4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DMA Structure Operation Done"] #[inline(always)] - pub fn done5(&self) -> DONE5_R { - DONE5_R::new(((self.bits >> 5) & 1) != 0) + pub fn done5(&self) -> Done5R { + Done5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - DMA Structure Operation Done"] #[inline(always)] - pub fn done6(&self) -> DONE6_R { - DONE6_R::new(((self.bits >> 6) & 1) != 0) + pub fn done6(&self) -> Done6R { + Done6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - DMA Structure Operation Done"] #[inline(always)] - pub fn done7(&self) -> DONE7_R { - DONE7_R::new(((self.bits >> 7) & 1) != 0) + pub fn done7(&self) -> Done7R { + Done7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 31 - Error Flag"] #[inline(always)] - pub fn error(&self) -> ERROR_R { - ERROR_R::new(((self.bits >> 31) & 1) != 0) + pub fn error(&self) -> ErrorR { + ErrorR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - DMA Structure Operation Done"] #[inline(always)] #[must_use] - pub fn done0(&mut self) -> DONE0_W<0> { - DONE0_W::new(self) + pub fn done0(&mut self) -> Done0W { + Done0W::new(self, 0) } #[doc = "Bit 1 - DMA Structure Operation Done"] #[inline(always)] #[must_use] - pub fn done1(&mut self) -> DONE1_W<1> { - DONE1_W::new(self) + pub fn done1(&mut self) -> Done1W { + Done1W::new(self, 1) } #[doc = "Bit 2 - DMA Structure Operation Done"] #[inline(always)] #[must_use] - pub fn done2(&mut self) -> DONE2_W<2> { - DONE2_W::new(self) + pub fn done2(&mut self) -> Done2W { + Done2W::new(self, 2) } #[doc = "Bit 3 - DMA Structure Operation Done"] #[inline(always)] #[must_use] - pub fn done3(&mut self) -> DONE3_W<3> { - DONE3_W::new(self) + pub fn done3(&mut self) -> Done3W { + Done3W::new(self, 3) } #[doc = "Bit 4 - DMA Structure Operation Done"] #[inline(always)] #[must_use] - pub fn done4(&mut self) -> DONE4_W<4> { - DONE4_W::new(self) + pub fn done4(&mut self) -> Done4W { + Done4W::new(self, 4) } #[doc = "Bit 5 - DMA Structure Operation Done"] #[inline(always)] #[must_use] - pub fn done5(&mut self) -> DONE5_W<5> { - DONE5_W::new(self) + pub fn done5(&mut self) -> Done5W { + Done5W::new(self, 5) } #[doc = "Bit 6 - DMA Structure Operation Done"] #[inline(always)] #[must_use] - pub fn done6(&mut self) -> DONE6_W<6> { - DONE6_W::new(self) + pub fn done6(&mut self) -> Done6W { + Done6W::new(self, 6) } #[doc = "Bit 7 - DMA Structure Operation Done"] #[inline(always)] #[must_use] - pub fn done7(&mut self) -> DONE7_W<7> { - DONE7_W::new(self) + pub fn done7(&mut self) -> Done7W { + Done7W::new(self, 7) } #[doc = "Bit 31 - Error Flag"] #[inline(always)] #[must_use] - pub fn error(&mut self) -> ERROR_W<31> { - ERROR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn error(&mut self) -> ErrorW { + ErrorW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ipversion.rs index 15bc08f..244f2a6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IPVERSION"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - IPVERSION"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new((self.bits & 0xff) as u8) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new((self.bits & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/linkload.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/linkload.rs index b0f4e72..f201a19 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/linkload.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/linkload.rs @@ -1,52 +1,27 @@ #[doc = "Register `LINKLOAD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LINKLOAD` writer - DMA Link Loads"] -pub type LINKLOAD_W<'a, const O: u8> = crate::FieldWriter<'a, u32, LINKLOAD_SPEC, u8, u8, 8, O>; +pub type LinkloadW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - DMA Link Loads"] #[inline(always)] #[must_use] - pub fn linkload(&mut self) -> LINKLOAD_W<0> { - LINKLOAD_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn linkload(&mut self) -> LinkloadW { + LinkloadW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [linkload](index.html) module"] -pub struct LINKLOAD_SPEC; -impl crate::RegisterSpec for LINKLOAD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`linkload::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LinkloadSpec; +impl crate::RegisterSpec for LinkloadSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [linkload::W](W) writer structure"] -impl crate::Writable for LINKLOAD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`linkload::W`](W) writer structure"] +impl crate::Writable for LinkloadSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LINKLOAD to value 0"] -impl crate::Resettable for LINKLOAD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LinkloadSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/reqclear.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/reqclear.rs index cf04bd2..1b06a19 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/reqclear.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/reqclear.rs @@ -1,52 +1,27 @@ #[doc = "Register `REQCLEAR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `REQCLEAR` writer - DMA Request Clear"] -pub type REQCLEAR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, REQCLEAR_SPEC, u8, u8, 8, O>; +pub type ReqclearW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - DMA Request Clear"] #[inline(always)] #[must_use] - pub fn reqclear(&mut self) -> REQCLEAR_W<0> { - REQCLEAR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn reqclear(&mut self) -> ReqclearW { + ReqclearW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [reqclear](index.html) module"] -pub struct REQCLEAR_SPEC; -impl crate::RegisterSpec for REQCLEAR_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`reqclear::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ReqclearSpec; +impl crate::RegisterSpec for ReqclearSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [reqclear::W](W) writer structure"] -impl crate::Writable for REQCLEAR_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`reqclear::W`](W) writer structure"] +impl crate::Writable for ReqclearSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets REQCLEAR to value 0"] -impl crate::Resettable for REQCLEAR_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ReqclearSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/reqdis.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/reqdis.rs index 0a9836d..2bf65a5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/reqdis.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/reqdis.rs @@ -1,80 +1,40 @@ #[doc = "Register `REQDIS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `REQDIS` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `REQDIS` reader - DMA Request Disables"] -pub type REQDIS_R = crate::FieldReader; +pub type ReqdisR = crate::FieldReader; #[doc = "Field `REQDIS` writer - DMA Request Disables"] -pub type REQDIS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, REQDIS_SPEC, u8, u8, 8, O>; +pub type ReqdisW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - DMA Request Disables"] #[inline(always)] - pub fn reqdis(&self) -> REQDIS_R { - REQDIS_R::new((self.bits & 0xff) as u8) + pub fn reqdis(&self) -> ReqdisR { + ReqdisR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - DMA Request Disables"] #[inline(always)] #[must_use] - pub fn reqdis(&mut self) -> REQDIS_W<0> { - REQDIS_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn reqdis(&mut self) -> ReqdisW { + ReqdisW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [reqdis](index.html) module"] -pub struct REQDIS_SPEC; -impl crate::RegisterSpec for REQDIS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`reqdis::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`reqdis::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ReqdisSpec; +impl crate::RegisterSpec for ReqdisSpec { type Ux = u32; } -#[doc = "`read()` method returns [reqdis::R](R) reader structure"] -impl crate::Readable for REQDIS_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [reqdis::W](W) writer structure"] -impl crate::Writable for REQDIS_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`reqdis::R`](R) reader structure"] +impl crate::Readable for ReqdisSpec {} +#[doc = "`write(|w| ..)` method takes [`reqdis::W`](W) writer structure"] +impl crate::Writable for ReqdisSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets REQDIS to value 0"] -impl crate::Resettable for REQDIS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ReqdisSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/reqpend.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/reqpend.rs index 355546c..de90a28 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/reqpend.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/reqpend.rs @@ -1,37 +1,22 @@ #[doc = "Register `REQPEND` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `REQPEND` reader - DMA Requests Pending"] -pub type REQPEND_R = crate::FieldReader; +pub type ReqpendR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - DMA Requests Pending"] #[inline(always)] - pub fn reqpend(&self) -> REQPEND_R { - REQPEND_R::new((self.bits & 0xff) as u8) + pub fn reqpend(&self) -> ReqpendR { + ReqpendR::new((self.bits & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [reqpend](index.html) module"] -pub struct REQPEND_SPEC; -impl crate::RegisterSpec for REQPEND_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`reqpend::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ReqpendSpec; +impl crate::RegisterSpec for ReqpendSpec { type Ux = u32; } -#[doc = "`read()` method returns [reqpend::R](R) reader structure"] -impl crate::Readable for REQPEND_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`reqpend::R`](R) reader structure"] +impl crate::Readable for ReqpendSpec {} #[doc = "`reset()` method sets REQPEND to value 0"] -impl crate::Resettable for REQPEND_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ReqpendSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/status.rs index f9ac19f..887b63f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/status.rs @@ -1,72 +1,57 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ANYBUSY` reader - Any DMA Channel Busy"] -pub type ANYBUSY_R = crate::BitReader; +pub type AnybusyR = crate::BitReader; #[doc = "Field `ANYREQ` reader - Any DMA Channel Request Pending"] -pub type ANYREQ_R = crate::BitReader; +pub type AnyreqR = crate::BitReader; #[doc = "Field `CHGRANT` reader - Granted Channel Number"] -pub type CHGRANT_R = crate::FieldReader; +pub type ChgrantR = crate::FieldReader; #[doc = "Field `CHERROR` reader - Errant Channel Number"] -pub type CHERROR_R = crate::FieldReader; +pub type CherrorR = crate::FieldReader; #[doc = "Field `FIFOLEVEL` reader - FIFO Level"] -pub type FIFOLEVEL_R = crate::FieldReader; +pub type FifolevelR = crate::FieldReader; #[doc = "Field `CHNUM` reader - Number of Channels"] -pub type CHNUM_R = crate::FieldReader; +pub type ChnumR = crate::FieldReader; impl R { #[doc = "Bit 0 - Any DMA Channel Busy"] #[inline(always)] - pub fn anybusy(&self) -> ANYBUSY_R { - ANYBUSY_R::new((self.bits & 1) != 0) + pub fn anybusy(&self) -> AnybusyR { + AnybusyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Any DMA Channel Request Pending"] #[inline(always)] - pub fn anyreq(&self) -> ANYREQ_R { - ANYREQ_R::new(((self.bits >> 1) & 1) != 0) + pub fn anyreq(&self) -> AnyreqR { + AnyreqR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 3:7 - Granted Channel Number"] #[inline(always)] - pub fn chgrant(&self) -> CHGRANT_R { - CHGRANT_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn chgrant(&self) -> ChgrantR { + ChgrantR::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 8:12 - Errant Channel Number"] #[inline(always)] - pub fn cherror(&self) -> CHERROR_R { - CHERROR_R::new(((self.bits >> 8) & 0x1f) as u8) + pub fn cherror(&self) -> CherrorR { + CherrorR::new(((self.bits >> 8) & 0x1f) as u8) } #[doc = "Bits 16:20 - FIFO Level"] #[inline(always)] - pub fn fifolevel(&self) -> FIFOLEVEL_R { - FIFOLEVEL_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn fifolevel(&self) -> FifolevelR { + FifolevelR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 24:28 - Number of Channels"] #[inline(always)] - pub fn chnum(&self) -> CHNUM_R { - CHNUM_R::new(((self.bits >> 24) & 0x1f) as u8) + pub fn chnum(&self) -> ChnumR { + ChnumR::new(((self.bits >> 24) & 0x1f) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} -#[doc = "`reset()` method sets STATUS to value 0x1f10_0000"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0x1f10_0000; +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} +#[doc = "`reset()` method sets STATUS to value 0x0810_0000"] +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0x0810_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/swreq.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/swreq.rs index b7be7b4..084cb55 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/swreq.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/swreq.rs @@ -1,52 +1,27 @@ #[doc = "Register `SWREQ` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SWREQ` writer - Software Transfer Requests"] -pub type SWREQ_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SWREQ_SPEC, u8, u8, 8, O>; +pub type SwreqW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - Software Transfer Requests"] #[inline(always)] #[must_use] - pub fn swreq(&mut self) -> SWREQ_W<0> { - SWREQ_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn swreq(&mut self) -> SwreqW { + SwreqW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swreq](index.html) module"] -pub struct SWREQ_SPEC; -impl crate::RegisterSpec for SWREQ_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swreq::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SwreqSpec; +impl crate::RegisterSpec for SwreqSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [swreq::W](W) writer structure"] -impl crate::Writable for SWREQ_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`swreq::W`](W) writer structure"] +impl crate::Writable for SwreqSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWREQ to value 0"] -impl crate::Resettable for SWREQ_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SwreqSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/synchwen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/synchwen.rs index 7c9bfc9..fc30ca3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/synchwen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/synchwen.rs @@ -1,95 +1,55 @@ #[doc = "Register `SYNCHWEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SYNCHWEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SYNCSETEN` reader - Hardware Sync Trigger Set Enable"] -pub type SYNCSETEN_R = crate::FieldReader; +pub type SyncsetenR = crate::FieldReader; #[doc = "Field `SYNCSETEN` writer - Hardware Sync Trigger Set Enable"] -pub type SYNCSETEN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SYNCHWEN_SPEC, u8, u8, 8, O>; +pub type SyncsetenW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `SYNCCLREN` reader - Hardware Sync Trigger Clear Enable"] -pub type SYNCCLREN_R = crate::FieldReader; +pub type SyncclrenR = crate::FieldReader; #[doc = "Field `SYNCCLREN` writer - Hardware Sync Trigger Clear Enable"] -pub type SYNCCLREN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SYNCHWEN_SPEC, u8, u8, 8, O>; +pub type SyncclrenW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Hardware Sync Trigger Set Enable"] #[inline(always)] - pub fn syncseten(&self) -> SYNCSETEN_R { - SYNCSETEN_R::new((self.bits & 0xff) as u8) + pub fn syncseten(&self) -> SyncsetenR { + SyncsetenR::new((self.bits & 0xff) as u8) } #[doc = "Bits 16:23 - Hardware Sync Trigger Clear Enable"] #[inline(always)] - pub fn syncclren(&self) -> SYNCCLREN_R { - SYNCCLREN_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn syncclren(&self) -> SyncclrenR { + SyncclrenR::new(((self.bits >> 16) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Hardware Sync Trigger Set Enable"] #[inline(always)] #[must_use] - pub fn syncseten(&mut self) -> SYNCSETEN_W<0> { - SYNCSETEN_W::new(self) + pub fn syncseten(&mut self) -> SyncsetenW { + SyncsetenW::new(self, 0) } #[doc = "Bits 16:23 - Hardware Sync Trigger Clear Enable"] #[inline(always)] #[must_use] - pub fn syncclren(&mut self) -> SYNCCLREN_W<16> { - SYNCCLREN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn syncclren(&mut self) -> SyncclrenW { + SyncclrenW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [synchwen](index.html) module"] -pub struct SYNCHWEN_SPEC; -impl crate::RegisterSpec for SYNCHWEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`synchwen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synchwen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SynchwenSpec; +impl crate::RegisterSpec for SynchwenSpec { type Ux = u32; } -#[doc = "`read()` method returns [synchwen::R](R) reader structure"] -impl crate::Readable for SYNCHWEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [synchwen::W](W) writer structure"] -impl crate::Writable for SYNCHWEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`synchwen::R`](R) reader structure"] +impl crate::Readable for SynchwenSpec {} +#[doc = "`write(|w| ..)` method takes [`synchwen::W`](W) writer structure"] +impl crate::Writable for SynchwenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYNCHWEN to value 0"] -impl crate::Resettable for SYNCHWEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SynchwenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/synchwsel.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/synchwsel.rs index cdd9832..2040009 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/synchwsel.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/synchwsel.rs @@ -1,193 +1,167 @@ #[doc = "Register `SYNCHWSEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SYNCHWSEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SYNCSETEDGE` reader - Hardware Sync Trigger Set Edge Select"] -pub type SYNCSETEDGE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Hardware Sync Trigger Set Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SYNCSETEDGE_A { +pub enum Syncsetedge { #[doc = "0: Use rising edge detection"] - RISE = 0, + Rise = 0, #[doc = "1: Use falling edge detection"] - FALL = 1, + Fall = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SYNCSETEDGE_A) -> Self { + fn from(variant: Syncsetedge) -> Self { variant as _ } } -impl SYNCSETEDGE_R { +impl crate::FieldSpec for Syncsetedge { + type Ux = u8; +} +impl crate::IsEnum for Syncsetedge {} +#[doc = "Field `SYNCSETEDGE` reader - Hardware Sync Trigger Set Edge Select"] +pub type SyncsetedgeR = crate::FieldReader; +impl SyncsetedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SYNCSETEDGE_A::RISE), - 1 => Some(SYNCSETEDGE_A::FALL), + 0 => Some(Syncsetedge::Rise), + 1 => Some(Syncsetedge::Fall), _ => None, } } - #[doc = "Checks if the value of the field is `RISE`"] + #[doc = "Use rising edge detection"] #[inline(always)] pub fn is_rise(&self) -> bool { - *self == SYNCSETEDGE_A::RISE + *self == Syncsetedge::Rise } - #[doc = "Checks if the value of the field is `FALL`"] + #[doc = "Use falling edge detection"] #[inline(always)] pub fn is_fall(&self) -> bool { - *self == SYNCSETEDGE_A::FALL + *self == Syncsetedge::Fall } } #[doc = "Field `SYNCSETEDGE` writer - Hardware Sync Trigger Set Edge Select"] -pub type SYNCSETEDGE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYNCHWSEL_SPEC, u8, SYNCSETEDGE_A, 8, O>; -impl<'a, const O: u8> SYNCSETEDGE_W<'a, O> { +pub type SyncsetedgeW<'a, REG> = crate::FieldWriter<'a, REG, 8, Syncsetedge>; +impl<'a, REG> SyncsetedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Use rising edge detection"] #[inline(always)] - pub fn rise(self) -> &'a mut W { - self.variant(SYNCSETEDGE_A::RISE) + pub fn rise(self) -> &'a mut crate::W { + self.variant(Syncsetedge::Rise) } #[doc = "Use falling edge detection"] #[inline(always)] - pub fn fall(self) -> &'a mut W { - self.variant(SYNCSETEDGE_A::FALL) + pub fn fall(self) -> &'a mut crate::W { + self.variant(Syncsetedge::Fall) } } -#[doc = "Field `SYNCCLREDGE` reader - Hardware Sync Trigger Clear Edge Select"] -pub type SYNCCLREDGE_R = crate::FieldReader; #[doc = "Hardware Sync Trigger Clear Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SYNCCLREDGE_A { +pub enum Syncclredge { #[doc = "0: Use rising edge detection"] - RISE = 0, + Rise = 0, #[doc = "1: Use falling edge detection"] - FALL = 1, + Fall = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SYNCCLREDGE_A) -> Self { + fn from(variant: Syncclredge) -> Self { variant as _ } } -impl SYNCCLREDGE_R { +impl crate::FieldSpec for Syncclredge { + type Ux = u8; +} +impl crate::IsEnum for Syncclredge {} +#[doc = "Field `SYNCCLREDGE` reader - Hardware Sync Trigger Clear Edge Select"] +pub type SyncclredgeR = crate::FieldReader; +impl SyncclredgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SYNCCLREDGE_A::RISE), - 1 => Some(SYNCCLREDGE_A::FALL), + 0 => Some(Syncclredge::Rise), + 1 => Some(Syncclredge::Fall), _ => None, } } - #[doc = "Checks if the value of the field is `RISE`"] + #[doc = "Use rising edge detection"] #[inline(always)] pub fn is_rise(&self) -> bool { - *self == SYNCCLREDGE_A::RISE + *self == Syncclredge::Rise } - #[doc = "Checks if the value of the field is `FALL`"] + #[doc = "Use falling edge detection"] #[inline(always)] pub fn is_fall(&self) -> bool { - *self == SYNCCLREDGE_A::FALL + *self == Syncclredge::Fall } } #[doc = "Field `SYNCCLREDGE` writer - Hardware Sync Trigger Clear Edge Select"] -pub type SYNCCLREDGE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYNCHWSEL_SPEC, u8, SYNCCLREDGE_A, 8, O>; -impl<'a, const O: u8> SYNCCLREDGE_W<'a, O> { +pub type SyncclredgeW<'a, REG> = crate::FieldWriter<'a, REG, 8, Syncclredge>; +impl<'a, REG> SyncclredgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Use rising edge detection"] #[inline(always)] - pub fn rise(self) -> &'a mut W { - self.variant(SYNCCLREDGE_A::RISE) + pub fn rise(self) -> &'a mut crate::W { + self.variant(Syncclredge::Rise) } #[doc = "Use falling edge detection"] #[inline(always)] - pub fn fall(self) -> &'a mut W { - self.variant(SYNCCLREDGE_A::FALL) + pub fn fall(self) -> &'a mut crate::W { + self.variant(Syncclredge::Fall) } } impl R { #[doc = "Bits 0:7 - Hardware Sync Trigger Set Edge Select"] #[inline(always)] - pub fn syncsetedge(&self) -> SYNCSETEDGE_R { - SYNCSETEDGE_R::new((self.bits & 0xff) as u8) + pub fn syncsetedge(&self) -> SyncsetedgeR { + SyncsetedgeR::new((self.bits & 0xff) as u8) } #[doc = "Bits 16:23 - Hardware Sync Trigger Clear Edge Select"] #[inline(always)] - pub fn syncclredge(&self) -> SYNCCLREDGE_R { - SYNCCLREDGE_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn syncclredge(&self) -> SyncclredgeR { + SyncclredgeR::new(((self.bits >> 16) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Hardware Sync Trigger Set Edge Select"] #[inline(always)] #[must_use] - pub fn syncsetedge(&mut self) -> SYNCSETEDGE_W<0> { - SYNCSETEDGE_W::new(self) + pub fn syncsetedge(&mut self) -> SyncsetedgeW { + SyncsetedgeW::new(self, 0) } #[doc = "Bits 16:23 - Hardware Sync Trigger Clear Edge Select"] #[inline(always)] #[must_use] - pub fn syncclredge(&mut self) -> SYNCCLREDGE_W<16> { - SYNCCLREDGE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn syncclredge(&mut self) -> SyncclredgeW { + SyncclredgeW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [synchwsel](index.html) module"] -pub struct SYNCHWSEL_SPEC; -impl crate::RegisterSpec for SYNCHWSEL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`synchwsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synchwsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SynchwselSpec; +impl crate::RegisterSpec for SynchwselSpec { type Ux = u32; } -#[doc = "`read()` method returns [synchwsel::R](R) reader structure"] -impl crate::Readable for SYNCHWSEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [synchwsel::W](W) writer structure"] -impl crate::Writable for SYNCHWSEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`synchwsel::R`](R) reader structure"] +impl crate::Readable for SynchwselSpec {} +#[doc = "`write(|w| ..)` method takes [`synchwsel::W`](W) writer structure"] +impl crate::Writable for SynchwselSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYNCHWSEL to value 0"] -impl crate::Resettable for SYNCHWSEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SynchwselSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/syncstatus.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/syncstatus.rs index 15c8e09..cd5ffdd 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/syncstatus.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/syncstatus.rs @@ -1,37 +1,22 @@ #[doc = "Register `SYNCSTATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `SYNCTRIG` reader - sync trig status"] -pub type SYNCTRIG_R = crate::FieldReader; +pub type SynctrigR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - sync trig status"] #[inline(always)] - pub fn synctrig(&self) -> SYNCTRIG_R { - SYNCTRIG_R::new((self.bits & 0xff) as u8) + pub fn synctrig(&self) -> SynctrigR { + SynctrigR::new((self.bits & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncstatus](index.html) module"] -pub struct SYNCSTATUS_SPEC; -impl crate::RegisterSpec for SYNCSTATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncstatus::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncstatusSpec; +impl crate::RegisterSpec for SyncstatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [syncstatus::R](R) reader structure"] -impl crate::Readable for SYNCSTATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncstatus::R`](R) reader structure"] +impl crate::Readable for SyncstatusSpec {} #[doc = "`reset()` method sets SYNCSTATUS to value 0"] -impl crate::Resettable for SYNCSTATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncstatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/syncswclr.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/syncswclr.rs index d02ad6d..b0ed23b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/syncswclr.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/syncswclr.rs @@ -1,52 +1,27 @@ #[doc = "Register `SYNCSWCLR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SYNCSWCLR` writer - DMA SYNC Software Trigger Clear"] -pub type SYNCSWCLR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SYNCSWCLR_SPEC, u8, u8, 8, O>; +pub type SyncswclrW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - DMA SYNC Software Trigger Clear"] #[inline(always)] #[must_use] - pub fn syncswclr(&mut self) -> SYNCSWCLR_W<0> { - SYNCSWCLR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn syncswclr(&mut self) -> SyncswclrW { + SyncswclrW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncswclr](index.html) module"] -pub struct SYNCSWCLR_SPEC; -impl crate::RegisterSpec for SYNCSWCLR_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`syncswclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncswclrSpec; +impl crate::RegisterSpec for SyncswclrSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [syncswclr::W](W) writer structure"] -impl crate::Writable for SYNCSWCLR_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`syncswclr::W`](W) writer structure"] +impl crate::Writable for SyncswclrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYNCSWCLR to value 0"] -impl crate::Resettable for SYNCSWCLR_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncswclrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/syncswset.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/syncswset.rs index a9cb984..12c585a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/syncswset.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldma_s/syncswset.rs @@ -1,52 +1,27 @@ #[doc = "Register `SYNCSWSET` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SYNCSWSET` writer - DMA SYNC Software Trigger Set"] -pub type SYNCSWSET_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SYNCSWSET_SPEC, u8, u8, 8, O>; +pub type SyncswsetW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - DMA SYNC Software Trigger Set"] #[inline(always)] #[must_use] - pub fn syncswset(&mut self) -> SYNCSWSET_W<0> { - SYNCSWSET_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn syncswset(&mut self) -> SyncswsetW { + SyncswsetW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncswset](index.html) module"] -pub struct SYNCSWSET_SPEC; -impl crate::RegisterSpec for SYNCSWSET_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`syncswset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncswsetSpec; +impl crate::RegisterSpec for SyncswsetSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [syncswset::W](W) writer structure"] -impl crate::Writable for SYNCSWSET_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`syncswset::W`](W) writer structure"] +impl crate::Writable for SyncswsetSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYNCSWSET to value 0"] -impl crate::Resettable for SYNCSWSET_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncswsetSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns.rs index c96d8f0..9000a28 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns.rs @@ -1,58 +1,114 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + ch0_reqsel: Ch0Reqsel, + ch1_reqsel: Ch1Reqsel, + ch2_reqsel: Ch2Reqsel, + ch3_reqsel: Ch3Reqsel, + ch4_reqsel: Ch4Reqsel, + ch5_reqsel: Ch5Reqsel, + ch6_reqsel: Ch6Reqsel, + ch7_reqsel: Ch7Reqsel, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub ch0_reqsel: CH0_REQSEL, + #[inline(always)] + pub const fn ch0_reqsel(&self) -> &Ch0Reqsel { + &self.ch0_reqsel + } #[doc = "0x08 - No Description"] - pub ch1_reqsel: CH1_REQSEL, + #[inline(always)] + pub const fn ch1_reqsel(&self) -> &Ch1Reqsel { + &self.ch1_reqsel + } #[doc = "0x0c - No Description"] - pub ch2_reqsel: CH2_REQSEL, + #[inline(always)] + pub const fn ch2_reqsel(&self) -> &Ch2Reqsel { + &self.ch2_reqsel + } #[doc = "0x10 - No Description"] - pub ch3_reqsel: CH3_REQSEL, + #[inline(always)] + pub const fn ch3_reqsel(&self) -> &Ch3Reqsel { + &self.ch3_reqsel + } #[doc = "0x14 - No Description"] - pub ch4_reqsel: CH4_REQSEL, + #[inline(always)] + pub const fn ch4_reqsel(&self) -> &Ch4Reqsel { + &self.ch4_reqsel + } #[doc = "0x18 - No Description"] - pub ch5_reqsel: CH5_REQSEL, + #[inline(always)] + pub const fn ch5_reqsel(&self) -> &Ch5Reqsel { + &self.ch5_reqsel + } #[doc = "0x1c - No Description"] - pub ch6_reqsel: CH6_REQSEL, + #[inline(always)] + pub const fn ch6_reqsel(&self) -> &Ch6Reqsel { + &self.ch6_reqsel + } #[doc = "0x20 - No Description"] - pub ch7_reqsel: CH7_REQSEL, + #[inline(always)] + pub const fn ch7_reqsel(&self) -> &Ch7Reqsel { + &self.ch7_reqsel + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "CH0_REQSEL (rw) register accessor: an alias for `Reg`"] -pub type CH0_REQSEL = crate::Reg; +#[doc = "CH0_REQSEL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_reqsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_reqsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch0_reqsel`] +module"] +#[doc(alias = "CH0_REQSEL")] +pub type Ch0Reqsel = crate::Reg; #[doc = "No Description"] pub mod ch0_reqsel; -#[doc = "CH1_REQSEL (rw) register accessor: an alias for `Reg`"] -pub type CH1_REQSEL = crate::Reg; +#[doc = "CH1_REQSEL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_reqsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_reqsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch1_reqsel`] +module"] +#[doc(alias = "CH1_REQSEL")] +pub type Ch1Reqsel = crate::Reg; #[doc = "No Description"] pub mod ch1_reqsel; -#[doc = "CH2_REQSEL (rw) register accessor: an alias for `Reg`"] -pub type CH2_REQSEL = crate::Reg; +#[doc = "CH2_REQSEL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_reqsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_reqsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch2_reqsel`] +module"] +#[doc(alias = "CH2_REQSEL")] +pub type Ch2Reqsel = crate::Reg; #[doc = "No Description"] pub mod ch2_reqsel; -#[doc = "CH3_REQSEL (rw) register accessor: an alias for `Reg`"] -pub type CH3_REQSEL = crate::Reg; +#[doc = "CH3_REQSEL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_reqsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_reqsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch3_reqsel`] +module"] +#[doc(alias = "CH3_REQSEL")] +pub type Ch3Reqsel = crate::Reg; #[doc = "No Description"] pub mod ch3_reqsel; -#[doc = "CH4_REQSEL (rw) register accessor: an alias for `Reg`"] -pub type CH4_REQSEL = crate::Reg; +#[doc = "CH4_REQSEL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_reqsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_reqsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch4_reqsel`] +module"] +#[doc(alias = "CH4_REQSEL")] +pub type Ch4Reqsel = crate::Reg; #[doc = "No Description"] pub mod ch4_reqsel; -#[doc = "CH5_REQSEL (rw) register accessor: an alias for `Reg`"] -pub type CH5_REQSEL = crate::Reg; +#[doc = "CH5_REQSEL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_reqsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_reqsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch5_reqsel`] +module"] +#[doc(alias = "CH5_REQSEL")] +pub type Ch5Reqsel = crate::Reg; #[doc = "No Description"] pub mod ch5_reqsel; -#[doc = "CH6_REQSEL (rw) register accessor: an alias for `Reg`"] -pub type CH6_REQSEL = crate::Reg; +#[doc = "CH6_REQSEL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_reqsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_reqsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch6_reqsel`] +module"] +#[doc(alias = "CH6_REQSEL")] +pub type Ch6Reqsel = crate::Reg; #[doc = "No Description"] pub mod ch6_reqsel; -#[doc = "CH7_REQSEL (rw) register accessor: an alias for `Reg`"] -pub type CH7_REQSEL = crate::Reg; +#[doc = "CH7_REQSEL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_reqsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_reqsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch7_reqsel`] +module"] +#[doc(alias = "CH7_REQSEL")] +pub type Ch7Reqsel = crate::Reg; #[doc = "No Description"] pub mod ch7_reqsel; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch0_reqsel.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch0_reqsel.rs index c29a0d3..d94b4c7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch0_reqsel.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch0_reqsel.rs @@ -1,95 +1,55 @@ #[doc = "Register `CH0_REQSEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH0_REQSEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type SigselR = crate::FieldReader; #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH0_REQSEL_SPEC, u8, u8, 4, O>; +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH0_REQSEL_SPEC, u8, u8, 6, O>; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 0x0f) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 16) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<16> { - SOURCESEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0_reqsel](index.html) module"] -pub struct CH0_REQSEL_SPEC; -impl crate::RegisterSpec for CH0_REQSEL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_reqsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_reqsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch0ReqselSpec; +impl crate::RegisterSpec for Ch0ReqselSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch0_reqsel::R](R) reader structure"] -impl crate::Readable for CH0_REQSEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch0_reqsel::W](W) writer structure"] -impl crate::Writable for CH0_REQSEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch0_reqsel::R`](R) reader structure"] +impl crate::Readable for Ch0ReqselSpec {} +#[doc = "`write(|w| ..)` method takes [`ch0_reqsel::W`](W) writer structure"] +impl crate::Writable for Ch0ReqselSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH0_REQSEL to value 0"] -impl crate::Resettable for CH0_REQSEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch0ReqselSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch1_reqsel.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch1_reqsel.rs index f3a3804..581ee8d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch1_reqsel.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch1_reqsel.rs @@ -1,95 +1,55 @@ #[doc = "Register `CH1_REQSEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH1_REQSEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type SigselR = crate::FieldReader; #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH1_REQSEL_SPEC, u8, u8, 4, O>; +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH1_REQSEL_SPEC, u8, u8, 6, O>; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 0x0f) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 16) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<16> { - SOURCESEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch1_reqsel](index.html) module"] -pub struct CH1_REQSEL_SPEC; -impl crate::RegisterSpec for CH1_REQSEL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_reqsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_reqsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch1ReqselSpec; +impl crate::RegisterSpec for Ch1ReqselSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch1_reqsel::R](R) reader structure"] -impl crate::Readable for CH1_REQSEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch1_reqsel::W](W) writer structure"] -impl crate::Writable for CH1_REQSEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch1_reqsel::R`](R) reader structure"] +impl crate::Readable for Ch1ReqselSpec {} +#[doc = "`write(|w| ..)` method takes [`ch1_reqsel::W`](W) writer structure"] +impl crate::Writable for Ch1ReqselSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH1_REQSEL to value 0"] -impl crate::Resettable for CH1_REQSEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch1ReqselSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch2_reqsel.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch2_reqsel.rs index be0debc..f409ea2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch2_reqsel.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch2_reqsel.rs @@ -1,95 +1,55 @@ #[doc = "Register `CH2_REQSEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH2_REQSEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type SigselR = crate::FieldReader; #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH2_REQSEL_SPEC, u8, u8, 4, O>; +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH2_REQSEL_SPEC, u8, u8, 6, O>; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 0x0f) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 16) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<16> { - SOURCESEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch2_reqsel](index.html) module"] -pub struct CH2_REQSEL_SPEC; -impl crate::RegisterSpec for CH2_REQSEL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_reqsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_reqsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch2ReqselSpec; +impl crate::RegisterSpec for Ch2ReqselSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch2_reqsel::R](R) reader structure"] -impl crate::Readable for CH2_REQSEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch2_reqsel::W](W) writer structure"] -impl crate::Writable for CH2_REQSEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch2_reqsel::R`](R) reader structure"] +impl crate::Readable for Ch2ReqselSpec {} +#[doc = "`write(|w| ..)` method takes [`ch2_reqsel::W`](W) writer structure"] +impl crate::Writable for Ch2ReqselSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH2_REQSEL to value 0"] -impl crate::Resettable for CH2_REQSEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch2ReqselSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch3_reqsel.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch3_reqsel.rs index b8d788f..56c8a92 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch3_reqsel.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch3_reqsel.rs @@ -1,95 +1,55 @@ #[doc = "Register `CH3_REQSEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH3_REQSEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type SigselR = crate::FieldReader; #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH3_REQSEL_SPEC, u8, u8, 4, O>; +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH3_REQSEL_SPEC, u8, u8, 6, O>; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 0x0f) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 16) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<16> { - SOURCESEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch3_reqsel](index.html) module"] -pub struct CH3_REQSEL_SPEC; -impl crate::RegisterSpec for CH3_REQSEL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_reqsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_reqsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch3ReqselSpec; +impl crate::RegisterSpec for Ch3ReqselSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch3_reqsel::R](R) reader structure"] -impl crate::Readable for CH3_REQSEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch3_reqsel::W](W) writer structure"] -impl crate::Writable for CH3_REQSEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch3_reqsel::R`](R) reader structure"] +impl crate::Readable for Ch3ReqselSpec {} +#[doc = "`write(|w| ..)` method takes [`ch3_reqsel::W`](W) writer structure"] +impl crate::Writable for Ch3ReqselSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH3_REQSEL to value 0"] -impl crate::Resettable for CH3_REQSEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch3ReqselSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch4_reqsel.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch4_reqsel.rs index 20c6933..7afb6ea 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch4_reqsel.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch4_reqsel.rs @@ -1,95 +1,55 @@ #[doc = "Register `CH4_REQSEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH4_REQSEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type SigselR = crate::FieldReader; #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH4_REQSEL_SPEC, u8, u8, 4, O>; +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH4_REQSEL_SPEC, u8, u8, 6, O>; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 0x0f) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 16) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<16> { - SOURCESEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch4_reqsel](index.html) module"] -pub struct CH4_REQSEL_SPEC; -impl crate::RegisterSpec for CH4_REQSEL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_reqsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_reqsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch4ReqselSpec; +impl crate::RegisterSpec for Ch4ReqselSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch4_reqsel::R](R) reader structure"] -impl crate::Readable for CH4_REQSEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch4_reqsel::W](W) writer structure"] -impl crate::Writable for CH4_REQSEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch4_reqsel::R`](R) reader structure"] +impl crate::Readable for Ch4ReqselSpec {} +#[doc = "`write(|w| ..)` method takes [`ch4_reqsel::W`](W) writer structure"] +impl crate::Writable for Ch4ReqselSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH4_REQSEL to value 0"] -impl crate::Resettable for CH4_REQSEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch4ReqselSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch5_reqsel.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch5_reqsel.rs index 3eca5f8..dc536f3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch5_reqsel.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch5_reqsel.rs @@ -1,95 +1,55 @@ #[doc = "Register `CH5_REQSEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH5_REQSEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type SigselR = crate::FieldReader; #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH5_REQSEL_SPEC, u8, u8, 4, O>; +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH5_REQSEL_SPEC, u8, u8, 6, O>; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 0x0f) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 16) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<16> { - SOURCESEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch5_reqsel](index.html) module"] -pub struct CH5_REQSEL_SPEC; -impl crate::RegisterSpec for CH5_REQSEL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_reqsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_reqsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch5ReqselSpec; +impl crate::RegisterSpec for Ch5ReqselSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch5_reqsel::R](R) reader structure"] -impl crate::Readable for CH5_REQSEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch5_reqsel::W](W) writer structure"] -impl crate::Writable for CH5_REQSEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch5_reqsel::R`](R) reader structure"] +impl crate::Readable for Ch5ReqselSpec {} +#[doc = "`write(|w| ..)` method takes [`ch5_reqsel::W`](W) writer structure"] +impl crate::Writable for Ch5ReqselSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH5_REQSEL to value 0"] -impl crate::Resettable for CH5_REQSEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch5ReqselSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch6_reqsel.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch6_reqsel.rs index d5ab1d7..b0fd271 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch6_reqsel.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch6_reqsel.rs @@ -1,95 +1,55 @@ #[doc = "Register `CH6_REQSEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH6_REQSEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type SigselR = crate::FieldReader; #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH6_REQSEL_SPEC, u8, u8, 4, O>; +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH6_REQSEL_SPEC, u8, u8, 6, O>; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 0x0f) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 16) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<16> { - SOURCESEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch6_reqsel](index.html) module"] -pub struct CH6_REQSEL_SPEC; -impl crate::RegisterSpec for CH6_REQSEL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_reqsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_reqsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch6ReqselSpec; +impl crate::RegisterSpec for Ch6ReqselSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch6_reqsel::R](R) reader structure"] -impl crate::Readable for CH6_REQSEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch6_reqsel::W](W) writer structure"] -impl crate::Writable for CH6_REQSEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch6_reqsel::R`](R) reader structure"] +impl crate::Readable for Ch6ReqselSpec {} +#[doc = "`write(|w| ..)` method takes [`ch6_reqsel::W`](W) writer structure"] +impl crate::Writable for Ch6ReqselSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH6_REQSEL to value 0"] -impl crate::Resettable for CH6_REQSEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch6ReqselSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch7_reqsel.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch7_reqsel.rs index b644cea..7c766cf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch7_reqsel.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ch7_reqsel.rs @@ -1,95 +1,55 @@ #[doc = "Register `CH7_REQSEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH7_REQSEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type SigselR = crate::FieldReader; #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH7_REQSEL_SPEC, u8, u8, 4, O>; +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH7_REQSEL_SPEC, u8, u8, 6, O>; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 0x0f) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 16) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<16> { - SOURCESEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch7_reqsel](index.html) module"] -pub struct CH7_REQSEL_SPEC; -impl crate::RegisterSpec for CH7_REQSEL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_reqsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_reqsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch7ReqselSpec; +impl crate::RegisterSpec for Ch7ReqselSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch7_reqsel::R](R) reader structure"] -impl crate::Readable for CH7_REQSEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch7_reqsel::W](W) writer structure"] -impl crate::Writable for CH7_REQSEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch7_reqsel::R`](R) reader structure"] +impl crate::Readable for Ch7ReqselSpec {} +#[doc = "`write(|w| ..)` method takes [`ch7_reqsel::W`](W) writer structure"] +impl crate::Writable for Ch7ReqselSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH7_REQSEL to value 0"] -impl crate::Resettable for CH7_REQSEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch7ReqselSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ipversion.rs index 1c8b3f7..dc1f830 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x02"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s.rs index c96d8f0..9000a28 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s.rs @@ -1,58 +1,114 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + ch0_reqsel: Ch0Reqsel, + ch1_reqsel: Ch1Reqsel, + ch2_reqsel: Ch2Reqsel, + ch3_reqsel: Ch3Reqsel, + ch4_reqsel: Ch4Reqsel, + ch5_reqsel: Ch5Reqsel, + ch6_reqsel: Ch6Reqsel, + ch7_reqsel: Ch7Reqsel, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub ch0_reqsel: CH0_REQSEL, + #[inline(always)] + pub const fn ch0_reqsel(&self) -> &Ch0Reqsel { + &self.ch0_reqsel + } #[doc = "0x08 - No Description"] - pub ch1_reqsel: CH1_REQSEL, + #[inline(always)] + pub const fn ch1_reqsel(&self) -> &Ch1Reqsel { + &self.ch1_reqsel + } #[doc = "0x0c - No Description"] - pub ch2_reqsel: CH2_REQSEL, + #[inline(always)] + pub const fn ch2_reqsel(&self) -> &Ch2Reqsel { + &self.ch2_reqsel + } #[doc = "0x10 - No Description"] - pub ch3_reqsel: CH3_REQSEL, + #[inline(always)] + pub const fn ch3_reqsel(&self) -> &Ch3Reqsel { + &self.ch3_reqsel + } #[doc = "0x14 - No Description"] - pub ch4_reqsel: CH4_REQSEL, + #[inline(always)] + pub const fn ch4_reqsel(&self) -> &Ch4Reqsel { + &self.ch4_reqsel + } #[doc = "0x18 - No Description"] - pub ch5_reqsel: CH5_REQSEL, + #[inline(always)] + pub const fn ch5_reqsel(&self) -> &Ch5Reqsel { + &self.ch5_reqsel + } #[doc = "0x1c - No Description"] - pub ch6_reqsel: CH6_REQSEL, + #[inline(always)] + pub const fn ch6_reqsel(&self) -> &Ch6Reqsel { + &self.ch6_reqsel + } #[doc = "0x20 - No Description"] - pub ch7_reqsel: CH7_REQSEL, + #[inline(always)] + pub const fn ch7_reqsel(&self) -> &Ch7Reqsel { + &self.ch7_reqsel + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "CH0_REQSEL (rw) register accessor: an alias for `Reg`"] -pub type CH0_REQSEL = crate::Reg; +#[doc = "CH0_REQSEL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_reqsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_reqsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch0_reqsel`] +module"] +#[doc(alias = "CH0_REQSEL")] +pub type Ch0Reqsel = crate::Reg; #[doc = "No Description"] pub mod ch0_reqsel; -#[doc = "CH1_REQSEL (rw) register accessor: an alias for `Reg`"] -pub type CH1_REQSEL = crate::Reg; +#[doc = "CH1_REQSEL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_reqsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_reqsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch1_reqsel`] +module"] +#[doc(alias = "CH1_REQSEL")] +pub type Ch1Reqsel = crate::Reg; #[doc = "No Description"] pub mod ch1_reqsel; -#[doc = "CH2_REQSEL (rw) register accessor: an alias for `Reg`"] -pub type CH2_REQSEL = crate::Reg; +#[doc = "CH2_REQSEL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_reqsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_reqsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch2_reqsel`] +module"] +#[doc(alias = "CH2_REQSEL")] +pub type Ch2Reqsel = crate::Reg; #[doc = "No Description"] pub mod ch2_reqsel; -#[doc = "CH3_REQSEL (rw) register accessor: an alias for `Reg`"] -pub type CH3_REQSEL = crate::Reg; +#[doc = "CH3_REQSEL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_reqsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_reqsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch3_reqsel`] +module"] +#[doc(alias = "CH3_REQSEL")] +pub type Ch3Reqsel = crate::Reg; #[doc = "No Description"] pub mod ch3_reqsel; -#[doc = "CH4_REQSEL (rw) register accessor: an alias for `Reg`"] -pub type CH4_REQSEL = crate::Reg; +#[doc = "CH4_REQSEL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_reqsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_reqsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch4_reqsel`] +module"] +#[doc(alias = "CH4_REQSEL")] +pub type Ch4Reqsel = crate::Reg; #[doc = "No Description"] pub mod ch4_reqsel; -#[doc = "CH5_REQSEL (rw) register accessor: an alias for `Reg`"] -pub type CH5_REQSEL = crate::Reg; +#[doc = "CH5_REQSEL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_reqsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_reqsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch5_reqsel`] +module"] +#[doc(alias = "CH5_REQSEL")] +pub type Ch5Reqsel = crate::Reg; #[doc = "No Description"] pub mod ch5_reqsel; -#[doc = "CH6_REQSEL (rw) register accessor: an alias for `Reg`"] -pub type CH6_REQSEL = crate::Reg; +#[doc = "CH6_REQSEL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_reqsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_reqsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch6_reqsel`] +module"] +#[doc(alias = "CH6_REQSEL")] +pub type Ch6Reqsel = crate::Reg; #[doc = "No Description"] pub mod ch6_reqsel; -#[doc = "CH7_REQSEL (rw) register accessor: an alias for `Reg`"] -pub type CH7_REQSEL = crate::Reg; +#[doc = "CH7_REQSEL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_reqsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_reqsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch7_reqsel`] +module"] +#[doc(alias = "CH7_REQSEL")] +pub type Ch7Reqsel = crate::Reg; #[doc = "No Description"] pub mod ch7_reqsel; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch0_reqsel.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch0_reqsel.rs index c29a0d3..d94b4c7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch0_reqsel.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch0_reqsel.rs @@ -1,95 +1,55 @@ #[doc = "Register `CH0_REQSEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH0_REQSEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type SigselR = crate::FieldReader; #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH0_REQSEL_SPEC, u8, u8, 4, O>; +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH0_REQSEL_SPEC, u8, u8, 6, O>; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 0x0f) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 16) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<16> { - SOURCESEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0_reqsel](index.html) module"] -pub struct CH0_REQSEL_SPEC; -impl crate::RegisterSpec for CH0_REQSEL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0_reqsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_reqsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch0ReqselSpec; +impl crate::RegisterSpec for Ch0ReqselSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch0_reqsel::R](R) reader structure"] -impl crate::Readable for CH0_REQSEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch0_reqsel::W](W) writer structure"] -impl crate::Writable for CH0_REQSEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch0_reqsel::R`](R) reader structure"] +impl crate::Readable for Ch0ReqselSpec {} +#[doc = "`write(|w| ..)` method takes [`ch0_reqsel::W`](W) writer structure"] +impl crate::Writable for Ch0ReqselSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH0_REQSEL to value 0"] -impl crate::Resettable for CH0_REQSEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch0ReqselSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch1_reqsel.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch1_reqsel.rs index f3a3804..581ee8d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch1_reqsel.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch1_reqsel.rs @@ -1,95 +1,55 @@ #[doc = "Register `CH1_REQSEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH1_REQSEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type SigselR = crate::FieldReader; #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH1_REQSEL_SPEC, u8, u8, 4, O>; +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH1_REQSEL_SPEC, u8, u8, 6, O>; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 0x0f) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 16) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<16> { - SOURCESEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch1_reqsel](index.html) module"] -pub struct CH1_REQSEL_SPEC; -impl crate::RegisterSpec for CH1_REQSEL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1_reqsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1_reqsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch1ReqselSpec; +impl crate::RegisterSpec for Ch1ReqselSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch1_reqsel::R](R) reader structure"] -impl crate::Readable for CH1_REQSEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch1_reqsel::W](W) writer structure"] -impl crate::Writable for CH1_REQSEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch1_reqsel::R`](R) reader structure"] +impl crate::Readable for Ch1ReqselSpec {} +#[doc = "`write(|w| ..)` method takes [`ch1_reqsel::W`](W) writer structure"] +impl crate::Writable for Ch1ReqselSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH1_REQSEL to value 0"] -impl crate::Resettable for CH1_REQSEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch1ReqselSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch2_reqsel.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch2_reqsel.rs index be0debc..f409ea2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch2_reqsel.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch2_reqsel.rs @@ -1,95 +1,55 @@ #[doc = "Register `CH2_REQSEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH2_REQSEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type SigselR = crate::FieldReader; #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH2_REQSEL_SPEC, u8, u8, 4, O>; +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH2_REQSEL_SPEC, u8, u8, 6, O>; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 0x0f) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 16) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<16> { - SOURCESEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch2_reqsel](index.html) module"] -pub struct CH2_REQSEL_SPEC; -impl crate::RegisterSpec for CH2_REQSEL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch2_reqsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch2_reqsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch2ReqselSpec; +impl crate::RegisterSpec for Ch2ReqselSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch2_reqsel::R](R) reader structure"] -impl crate::Readable for CH2_REQSEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch2_reqsel::W](W) writer structure"] -impl crate::Writable for CH2_REQSEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch2_reqsel::R`](R) reader structure"] +impl crate::Readable for Ch2ReqselSpec {} +#[doc = "`write(|w| ..)` method takes [`ch2_reqsel::W`](W) writer structure"] +impl crate::Writable for Ch2ReqselSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH2_REQSEL to value 0"] -impl crate::Resettable for CH2_REQSEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch2ReqselSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch3_reqsel.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch3_reqsel.rs index b8d788f..56c8a92 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch3_reqsel.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch3_reqsel.rs @@ -1,95 +1,55 @@ #[doc = "Register `CH3_REQSEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH3_REQSEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type SigselR = crate::FieldReader; #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH3_REQSEL_SPEC, u8, u8, 4, O>; +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH3_REQSEL_SPEC, u8, u8, 6, O>; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 0x0f) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 16) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<16> { - SOURCESEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch3_reqsel](index.html) module"] -pub struct CH3_REQSEL_SPEC; -impl crate::RegisterSpec for CH3_REQSEL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch3_reqsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch3_reqsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch3ReqselSpec; +impl crate::RegisterSpec for Ch3ReqselSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch3_reqsel::R](R) reader structure"] -impl crate::Readable for CH3_REQSEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch3_reqsel::W](W) writer structure"] -impl crate::Writable for CH3_REQSEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch3_reqsel::R`](R) reader structure"] +impl crate::Readable for Ch3ReqselSpec {} +#[doc = "`write(|w| ..)` method takes [`ch3_reqsel::W`](W) writer structure"] +impl crate::Writable for Ch3ReqselSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH3_REQSEL to value 0"] -impl crate::Resettable for CH3_REQSEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch3ReqselSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch4_reqsel.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch4_reqsel.rs index 20c6933..7afb6ea 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch4_reqsel.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch4_reqsel.rs @@ -1,95 +1,55 @@ #[doc = "Register `CH4_REQSEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH4_REQSEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type SigselR = crate::FieldReader; #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH4_REQSEL_SPEC, u8, u8, 4, O>; +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH4_REQSEL_SPEC, u8, u8, 6, O>; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 0x0f) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 16) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<16> { - SOURCESEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch4_reqsel](index.html) module"] -pub struct CH4_REQSEL_SPEC; -impl crate::RegisterSpec for CH4_REQSEL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch4_reqsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch4_reqsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch4ReqselSpec; +impl crate::RegisterSpec for Ch4ReqselSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch4_reqsel::R](R) reader structure"] -impl crate::Readable for CH4_REQSEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch4_reqsel::W](W) writer structure"] -impl crate::Writable for CH4_REQSEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch4_reqsel::R`](R) reader structure"] +impl crate::Readable for Ch4ReqselSpec {} +#[doc = "`write(|w| ..)` method takes [`ch4_reqsel::W`](W) writer structure"] +impl crate::Writable for Ch4ReqselSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH4_REQSEL to value 0"] -impl crate::Resettable for CH4_REQSEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch4ReqselSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch5_reqsel.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch5_reqsel.rs index 3eca5f8..dc536f3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch5_reqsel.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch5_reqsel.rs @@ -1,95 +1,55 @@ #[doc = "Register `CH5_REQSEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH5_REQSEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type SigselR = crate::FieldReader; #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH5_REQSEL_SPEC, u8, u8, 4, O>; +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH5_REQSEL_SPEC, u8, u8, 6, O>; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 0x0f) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 16) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<16> { - SOURCESEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch5_reqsel](index.html) module"] -pub struct CH5_REQSEL_SPEC; -impl crate::RegisterSpec for CH5_REQSEL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch5_reqsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch5_reqsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch5ReqselSpec; +impl crate::RegisterSpec for Ch5ReqselSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch5_reqsel::R](R) reader structure"] -impl crate::Readable for CH5_REQSEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch5_reqsel::W](W) writer structure"] -impl crate::Writable for CH5_REQSEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch5_reqsel::R`](R) reader structure"] +impl crate::Readable for Ch5ReqselSpec {} +#[doc = "`write(|w| ..)` method takes [`ch5_reqsel::W`](W) writer structure"] +impl crate::Writable for Ch5ReqselSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH5_REQSEL to value 0"] -impl crate::Resettable for CH5_REQSEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch5ReqselSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch6_reqsel.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch6_reqsel.rs index d5ab1d7..b0fd271 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch6_reqsel.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch6_reqsel.rs @@ -1,95 +1,55 @@ #[doc = "Register `CH6_REQSEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH6_REQSEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type SigselR = crate::FieldReader; #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH6_REQSEL_SPEC, u8, u8, 4, O>; +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH6_REQSEL_SPEC, u8, u8, 6, O>; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 0x0f) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 16) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<16> { - SOURCESEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch6_reqsel](index.html) module"] -pub struct CH6_REQSEL_SPEC; -impl crate::RegisterSpec for CH6_REQSEL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch6_reqsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch6_reqsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch6ReqselSpec; +impl crate::RegisterSpec for Ch6ReqselSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch6_reqsel::R](R) reader structure"] -impl crate::Readable for CH6_REQSEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch6_reqsel::W](W) writer structure"] -impl crate::Writable for CH6_REQSEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch6_reqsel::R`](R) reader structure"] +impl crate::Readable for Ch6ReqselSpec {} +#[doc = "`write(|w| ..)` method takes [`ch6_reqsel::W`](W) writer structure"] +impl crate::Writable for Ch6ReqselSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH6_REQSEL to value 0"] -impl crate::Resettable for CH6_REQSEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch6ReqselSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch7_reqsel.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch7_reqsel.rs index b644cea..7c766cf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch7_reqsel.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ch7_reqsel.rs @@ -1,95 +1,55 @@ #[doc = "Register `CH7_REQSEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH7_REQSEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type SigselR = crate::FieldReader; #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH7_REQSEL_SPEC, u8, u8, 4, O>; +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH7_REQSEL_SPEC, u8, u8, 6, O>; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 0x0f) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 16) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:3 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 16:21 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<16> { - SOURCESEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch7_reqsel](index.html) module"] -pub struct CH7_REQSEL_SPEC; -impl crate::RegisterSpec for CH7_REQSEL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch7_reqsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch7_reqsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch7ReqselSpec; +impl crate::RegisterSpec for Ch7ReqselSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch7_reqsel::R](R) reader structure"] -impl crate::Readable for CH7_REQSEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch7_reqsel::W](W) writer structure"] -impl crate::Writable for CH7_REQSEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch7_reqsel::R`](R) reader structure"] +impl crate::Readable for Ch7ReqselSpec {} +#[doc = "`write(|w| ..)` method takes [`ch7_reqsel::W`](W) writer structure"] +impl crate::Writable for Ch7ReqselSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH7_REQSEL to value 0"] -impl crate::Resettable for CH7_REQSEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch7ReqselSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ipversion.rs index 1c8b3f7..dc1f830 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ldmaxbar_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x02"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns.rs index d267cf4..5031c37 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns.rs @@ -1,113 +1,223 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + swrst: Swrst, + ctrl: Ctrl, + cmd: Cmd, + status: Status, + cnt: Cnt, + comp0: Comp0, + comp1: Comp1, + top: Top, + topbuff: Topbuff, + rep0: Rep0, + rep1: Rep1, + if_: If, + ien: Ien, + lock: Lock, + syncbusy: Syncbusy, + _reserved17: [u8; 0x0c], + prsmode: Prsmode, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub swrst: SWRST, + #[inline(always)] + pub const fn swrst(&self) -> &Swrst { + &self.swrst + } #[doc = "0x0c - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x10 - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x14 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x18 - No Description"] - pub cnt: CNT, + #[inline(always)] + pub const fn cnt(&self) -> &Cnt { + &self.cnt + } #[doc = "0x1c - No Description"] - pub comp0: COMP0, + #[inline(always)] + pub const fn comp0(&self) -> &Comp0 { + &self.comp0 + } #[doc = "0x20 - No Description"] - pub comp1: COMP1, + #[inline(always)] + pub const fn comp1(&self) -> &Comp1 { + &self.comp1 + } #[doc = "0x24 - No Description"] - pub top: TOP, + #[inline(always)] + pub const fn top(&self) -> &Top { + &self.top + } #[doc = "0x28 - No Description"] - pub topbuff: TOPBUFF, + #[inline(always)] + pub const fn topbuff(&self) -> &Topbuff { + &self.topbuff + } #[doc = "0x2c - No Description"] - pub rep0: REP0, + #[inline(always)] + pub const fn rep0(&self) -> &Rep0 { + &self.rep0 + } #[doc = "0x30 - No Description"] - pub rep1: REP1, + #[inline(always)] + pub const fn rep1(&self) -> &Rep1 { + &self.rep1 + } #[doc = "0x34 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x38 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x3c - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x40 - No Description"] - pub syncbusy: SYNCBUSY, - _reserved17: [u8; 0x0c], + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } #[doc = "0x50 - No Description"] - pub prsmode: PRSMODE, + #[inline(always)] + pub const fn prsmode(&self) -> &Prsmode { + &self.prsmode + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "SWRST (rw) register accessor: an alias for `Reg`"] -pub type SWRST = crate::Reg; +#[doc = "SWRST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swrst`] +module"] +#[doc(alias = "SWRST")] +pub type Swrst = crate::Reg; #[doc = "No Description"] pub mod swrst; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "CNT (rw) register accessor: an alias for `Reg`"] -pub type CNT = crate::Reg; +#[doc = "CNT (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnt`] +module"] +#[doc(alias = "CNT")] +pub type Cnt = crate::Reg; #[doc = "No Description"] pub mod cnt; -#[doc = "COMP0 (rw) register accessor: an alias for `Reg`"] -pub type COMP0 = crate::Reg; +#[doc = "COMP0 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`comp0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`comp0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@comp0`] +module"] +#[doc(alias = "COMP0")] +pub type Comp0 = crate::Reg; #[doc = "No Description"] pub mod comp0; -#[doc = "COMP1 (rw) register accessor: an alias for `Reg`"] -pub type COMP1 = crate::Reg; +#[doc = "COMP1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`comp1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`comp1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@comp1`] +module"] +#[doc(alias = "COMP1")] +pub type Comp1 = crate::Reg; #[doc = "No Description"] pub mod comp1; -#[doc = "TOP (rw) register accessor: an alias for `Reg`"] -pub type TOP = crate::Reg; +#[doc = "TOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@top`] +module"] +#[doc(alias = "TOP")] +pub type Top = crate::Reg; #[doc = "No Description"] pub mod top; -#[doc = "TOPBUFF (rw) register accessor: an alias for `Reg`"] -pub type TOPBUFF = crate::Reg; +#[doc = "TOPBUFF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topbuff::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topbuff::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@topbuff`] +module"] +#[doc(alias = "TOPBUFF")] +pub type Topbuff = crate::Reg; #[doc = "No Description"] pub mod topbuff; -#[doc = "REP0 (rw) register accessor: an alias for `Reg`"] -pub type REP0 = crate::Reg; +#[doc = "REP0 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rep0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rep0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rep0`] +module"] +#[doc(alias = "REP0")] +pub type Rep0 = crate::Reg; #[doc = "No Description"] pub mod rep0; -#[doc = "REP1 (rw) register accessor: an alias for `Reg`"] -pub type REP1 = crate::Reg; +#[doc = "REP1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rep1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rep1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rep1`] +module"] +#[doc(alias = "REP1")] +pub type Rep1 = crate::Reg; #[doc = "No Description"] pub mod rep1; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "No Description"] pub mod syncbusy; -#[doc = "PRSMODE (rw) register accessor: an alias for `Reg`"] -pub type PRSMODE = crate::Reg; +#[doc = "PRSMODE (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`prsmode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prsmode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prsmode`] +module"] +#[doc(alias = "PRSMODE")] +pub type Prsmode = crate::Reg; #[doc = "No Description"] pub mod prsmode; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/cmd.rs index f80ad8f..84a911d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/cmd.rs @@ -1,84 +1,59 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` writer - Start LETIMER"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STOP` writer - Stop LETIMER"] -pub type STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEAR` writer - Clear LETIMER"] -pub type CLEAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type ClearW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTO0` writer - Clear Toggle Output 0"] -pub type CTO0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type Cto0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTO1` writer - Clear Toggle Output 1"] -pub type CTO1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type Cto1W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Start LETIMER"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Stop LETIMER"] #[inline(always)] #[must_use] - pub fn stop(&mut self) -> STOP_W<1> { - STOP_W::new(self) + pub fn stop(&mut self) -> StopW { + StopW::new(self, 1) } #[doc = "Bit 2 - Clear LETIMER"] #[inline(always)] #[must_use] - pub fn clear(&mut self) -> CLEAR_W<2> { - CLEAR_W::new(self) + pub fn clear(&mut self) -> ClearW { + ClearW::new(self, 2) } #[doc = "Bit 3 - Clear Toggle Output 0"] #[inline(always)] #[must_use] - pub fn cto0(&mut self) -> CTO0_W<3> { - CTO0_W::new(self) + pub fn cto0(&mut self) -> Cto0W { + Cto0W::new(self, 3) } #[doc = "Bit 4 - Clear Toggle Output 1"] #[inline(always)] #[must_use] - pub fn cto1(&mut self) -> CTO1_W<4> { - CTO1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cto1(&mut self) -> Cto1W { + Cto1W::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/cnt.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/cnt.rs index 0e67761..77898d5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/cnt.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/cnt.rs @@ -1,80 +1,40 @@ #[doc = "Register `CNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CNT` reader - Counter Value"] -pub type CNT_R = crate::FieldReader; +pub type CntR = crate::FieldReader; #[doc = "Field `CNT` writer - Counter Value"] -pub type CNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CNT_SPEC, u32, u32, 24, O>; +pub type CntW<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>; impl R { #[doc = "Bits 0:23 - Counter Value"] #[inline(always)] - pub fn cnt(&self) -> CNT_R { - CNT_R::new(self.bits & 0x00ff_ffff) + pub fn cnt(&self) -> CntR { + CntR::new(self.bits & 0x00ff_ffff) } } impl W { #[doc = "Bits 0:23 - Counter Value"] #[inline(always)] #[must_use] - pub fn cnt(&mut self) -> CNT_W<0> { - CNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cnt(&mut self) -> CntW { + CntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](index.html) module"] -pub struct CNT_SPEC; -impl crate::RegisterSpec for CNT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CntSpec; +impl crate::RegisterSpec for CntSpec { type Ux = u32; } -#[doc = "`read()` method returns [cnt::R](R) reader structure"] -impl crate::Readable for CNT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnt::W](W) writer structure"] -impl crate::Writable for CNT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cnt::R`](R) reader structure"] +impl crate::Readable for CntSpec {} +#[doc = "`write(|w| ..)` method takes [`cnt::W`](W) writer structure"] +impl crate::Writable for CntSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNT to value 0"] -impl crate::Resettable for CNT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CntSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/comp0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/comp0.rs index 985eef6..e6da8ad 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/comp0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/comp0.rs @@ -1,80 +1,40 @@ #[doc = "Register `COMP0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `COMP0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `COMP0` reader - Compare Value 0"] -pub type COMP0_R = crate::FieldReader; +pub type Comp0R = crate::FieldReader; #[doc = "Field `COMP0` writer - Compare Value 0"] -pub type COMP0_W<'a, const O: u8> = crate::FieldWriter<'a, u32, COMP0_SPEC, u32, u32, 24, O>; +pub type Comp0W<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>; impl R { #[doc = "Bits 0:23 - Compare Value 0"] #[inline(always)] - pub fn comp0(&self) -> COMP0_R { - COMP0_R::new(self.bits & 0x00ff_ffff) + pub fn comp0(&self) -> Comp0R { + Comp0R::new(self.bits & 0x00ff_ffff) } } impl W { #[doc = "Bits 0:23 - Compare Value 0"] #[inline(always)] #[must_use] - pub fn comp0(&mut self) -> COMP0_W<0> { - COMP0_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn comp0(&mut self) -> Comp0W { + Comp0W::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [comp0](index.html) module"] -pub struct COMP0_SPEC; -impl crate::RegisterSpec for COMP0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`comp0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`comp0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Comp0Spec; +impl crate::RegisterSpec for Comp0Spec { type Ux = u32; } -#[doc = "`read()` method returns [comp0::R](R) reader structure"] -impl crate::Readable for COMP0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [comp0::W](W) writer structure"] -impl crate::Writable for COMP0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`comp0::R`](R) reader structure"] +impl crate::Readable for Comp0Spec {} +#[doc = "`write(|w| ..)` method takes [`comp0::W`](W) writer structure"] +impl crate::Writable for Comp0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets COMP0 to value 0"] -impl crate::Resettable for COMP0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Comp0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/comp1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/comp1.rs index b553ef7..93e5f74 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/comp1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/comp1.rs @@ -1,80 +1,40 @@ #[doc = "Register `COMP1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `COMP1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `COMP1` reader - Compare Value 1"] -pub type COMP1_R = crate::FieldReader; +pub type Comp1R = crate::FieldReader; #[doc = "Field `COMP1` writer - Compare Value 1"] -pub type COMP1_W<'a, const O: u8> = crate::FieldWriter<'a, u32, COMP1_SPEC, u32, u32, 24, O>; +pub type Comp1W<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>; impl R { #[doc = "Bits 0:23 - Compare Value 1"] #[inline(always)] - pub fn comp1(&self) -> COMP1_R { - COMP1_R::new(self.bits & 0x00ff_ffff) + pub fn comp1(&self) -> Comp1R { + Comp1R::new(self.bits & 0x00ff_ffff) } } impl W { #[doc = "Bits 0:23 - Compare Value 1"] #[inline(always)] #[must_use] - pub fn comp1(&mut self) -> COMP1_W<0> { - COMP1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn comp1(&mut self) -> Comp1W { + Comp1W::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [comp1](index.html) module"] -pub struct COMP1_SPEC; -impl crate::RegisterSpec for COMP1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`comp1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`comp1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Comp1Spec; +impl crate::RegisterSpec for Comp1Spec { type Ux = u32; } -#[doc = "`read()` method returns [comp1::R](R) reader structure"] -impl crate::Readable for COMP1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [comp1::W](W) writer structure"] -impl crate::Writable for COMP1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`comp1::R`](R) reader structure"] +impl crate::Readable for Comp1Spec {} +#[doc = "`write(|w| ..)` method takes [`comp1::W`](W) writer structure"] +impl crate::Writable for Comp1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets COMP1 to value 0"] -impl crate::Resettable for COMP1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Comp1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/ctrl.rs index fcb70b3..baf9831 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/ctrl.rs @@ -1,700 +1,700 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `REPMODE` reader - Repeat Mode"] -pub type REPMODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Repeat Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REPMODE_A { +pub enum Repmode { #[doc = "0: When started, the LETIMER counts down until it is stopped by software"] - FREE = 0, + Free = 0, #[doc = "1: The counter counts REP0 times. When REP0 reaches zero, the counter stops"] - ONESHOT = 1, + Oneshot = 1, #[doc = "2: The counter counts REP0 times. If REP1 has been written, it is loaded into REP0 when REP0 reaches zero, otherwise the counter stops"] - BUFFERED = 2, + Buffered = 2, #[doc = "3: Both REP0 and REP1 are decremented when the LETIMER wraps around. The LETIMER counts until both REP0 and REP1 are zero"] - DOUBLE = 3, + Double = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REPMODE_A) -> Self { + fn from(variant: Repmode) -> Self { variant as _ } } -impl REPMODE_R { +impl crate::FieldSpec for Repmode { + type Ux = u8; +} +impl crate::IsEnum for Repmode {} +#[doc = "Field `REPMODE` reader - Repeat Mode"] +pub type RepmodeR = crate::FieldReader; +impl RepmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REPMODE_A { + pub const fn variant(&self) -> Repmode { match self.bits { - 0 => REPMODE_A::FREE, - 1 => REPMODE_A::ONESHOT, - 2 => REPMODE_A::BUFFERED, - 3 => REPMODE_A::DOUBLE, + 0 => Repmode::Free, + 1 => Repmode::Oneshot, + 2 => Repmode::Buffered, + 3 => Repmode::Double, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `FREE`"] + #[doc = "When started, the LETIMER counts down until it is stopped by software"] #[inline(always)] pub fn is_free(&self) -> bool { - *self == REPMODE_A::FREE + *self == Repmode::Free } - #[doc = "Checks if the value of the field is `ONESHOT`"] + #[doc = "The counter counts REP0 times. When REP0 reaches zero, the counter stops"] #[inline(always)] pub fn is_oneshot(&self) -> bool { - *self == REPMODE_A::ONESHOT + *self == Repmode::Oneshot } - #[doc = "Checks if the value of the field is `BUFFERED`"] + #[doc = "The counter counts REP0 times. If REP1 has been written, it is loaded into REP0 when REP0 reaches zero, otherwise the counter stops"] #[inline(always)] pub fn is_buffered(&self) -> bool { - *self == REPMODE_A::BUFFERED + *self == Repmode::Buffered } - #[doc = "Checks if the value of the field is `DOUBLE`"] + #[doc = "Both REP0 and REP1 are decremented when the LETIMER wraps around. The LETIMER counts until both REP0 and REP1 are zero"] #[inline(always)] pub fn is_double(&self) -> bool { - *self == REPMODE_A::DOUBLE + *self == Repmode::Double } } #[doc = "Field `REPMODE` writer - Repeat Mode"] -pub type REPMODE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, REPMODE_A, 2, O>; -impl<'a, const O: u8> REPMODE_W<'a, O> { +pub type RepmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Repmode, crate::Safe>; +impl<'a, REG> RepmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "When started, the LETIMER counts down until it is stopped by software"] #[inline(always)] - pub fn free(self) -> &'a mut W { - self.variant(REPMODE_A::FREE) + pub fn free(self) -> &'a mut crate::W { + self.variant(Repmode::Free) } #[doc = "The counter counts REP0 times. When REP0 reaches zero, the counter stops"] #[inline(always)] - pub fn oneshot(self) -> &'a mut W { - self.variant(REPMODE_A::ONESHOT) + pub fn oneshot(self) -> &'a mut crate::W { + self.variant(Repmode::Oneshot) } #[doc = "The counter counts REP0 times. If REP1 has been written, it is loaded into REP0 when REP0 reaches zero, otherwise the counter stops"] #[inline(always)] - pub fn buffered(self) -> &'a mut W { - self.variant(REPMODE_A::BUFFERED) + pub fn buffered(self) -> &'a mut crate::W { + self.variant(Repmode::Buffered) } #[doc = "Both REP0 and REP1 are decremented when the LETIMER wraps around. The LETIMER counts until both REP0 and REP1 are zero"] #[inline(always)] - pub fn double(self) -> &'a mut W { - self.variant(REPMODE_A::DOUBLE) + pub fn double(self) -> &'a mut crate::W { + self.variant(Repmode::Double) } } -#[doc = "Field `UFOA0` reader - Underflow Output Action 0"] -pub type UFOA0_R = crate::FieldReader; #[doc = "Underflow Output Action 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum UFOA0_A { +pub enum Ufoa0 { #[doc = "0: LETIMERn_OUT0 is held at its idle value as defined by OPOL0"] - NONE = 0, + None = 0, #[doc = "1: LETIMERn_OUT0 is toggled on CNT underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: LETIMERn_OUT0 is held active for one LETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL0"] - PULSE = 2, + Pulse = 2, #[doc = "3: LETIMERn_OUT0 is set idle on CNT underflow, and active on compare match with COMP1"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: UFOA0_A) -> Self { + fn from(variant: Ufoa0) -> Self { variant as _ } } -impl UFOA0_R { +impl crate::FieldSpec for Ufoa0 { + type Ux = u8; +} +impl crate::IsEnum for Ufoa0 {} +#[doc = "Field `UFOA0` reader - Underflow Output Action 0"] +pub type Ufoa0R = crate::FieldReader; +impl Ufoa0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> UFOA0_A { + pub const fn variant(&self) -> Ufoa0 { match self.bits { - 0 => UFOA0_A::NONE, - 1 => UFOA0_A::TOGGLE, - 2 => UFOA0_A::PULSE, - 3 => UFOA0_A::PWM, + 0 => Ufoa0::None, + 1 => Ufoa0::Toggle, + 2 => Ufoa0::Pulse, + 3 => Ufoa0::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "LETIMERn_OUT0 is held at its idle value as defined by OPOL0"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == UFOA0_A::NONE + *self == Ufoa0::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "LETIMERn_OUT0 is toggled on CNT underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == UFOA0_A::TOGGLE + *self == Ufoa0::Toggle } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "LETIMERn_OUT0 is held active for one LETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL0"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == UFOA0_A::PULSE + *self == Ufoa0::Pulse } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "LETIMERn_OUT0 is set idle on CNT underflow, and active on compare match with COMP1"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == UFOA0_A::PWM + *self == Ufoa0::Pwm } } #[doc = "Field `UFOA0` writer - Underflow Output Action 0"] -pub type UFOA0_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, UFOA0_A, 2, O>; -impl<'a, const O: u8> UFOA0_W<'a, O> { +pub type Ufoa0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Ufoa0, crate::Safe>; +impl<'a, REG> Ufoa0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "LETIMERn_OUT0 is held at its idle value as defined by OPOL0"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(UFOA0_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Ufoa0::None) } #[doc = "LETIMERn_OUT0 is toggled on CNT underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(UFOA0_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Ufoa0::Toggle) } #[doc = "LETIMERn_OUT0 is held active for one LETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL0"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(UFOA0_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Ufoa0::Pulse) } #[doc = "LETIMERn_OUT0 is set idle on CNT underflow, and active on compare match with COMP1"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(UFOA0_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Ufoa0::Pwm) } } -#[doc = "Field `UFOA1` reader - Underflow Output Action 1"] -pub type UFOA1_R = crate::FieldReader; #[doc = "Underflow Output Action 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum UFOA1_A { +pub enum Ufoa1 { #[doc = "0: LETIMERn_OUT1 is held at its idle value as defined by OPOL1"] - NONE = 0, + None = 0, #[doc = "1: LETIMERn_OUT1 is toggled on CNT underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: LETIMERn_OUT1 is held active for one LETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL1"] - PULSE = 2, + Pulse = 2, #[doc = "3: LETIMERn_OUT1 is set idle on CNT underflow, and active on compare match with COMP1"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: UFOA1_A) -> Self { + fn from(variant: Ufoa1) -> Self { variant as _ } } -impl UFOA1_R { +impl crate::FieldSpec for Ufoa1 { + type Ux = u8; +} +impl crate::IsEnum for Ufoa1 {} +#[doc = "Field `UFOA1` reader - Underflow Output Action 1"] +pub type Ufoa1R = crate::FieldReader; +impl Ufoa1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> UFOA1_A { + pub const fn variant(&self) -> Ufoa1 { match self.bits { - 0 => UFOA1_A::NONE, - 1 => UFOA1_A::TOGGLE, - 2 => UFOA1_A::PULSE, - 3 => UFOA1_A::PWM, + 0 => Ufoa1::None, + 1 => Ufoa1::Toggle, + 2 => Ufoa1::Pulse, + 3 => Ufoa1::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "LETIMERn_OUT1 is held at its idle value as defined by OPOL1"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == UFOA1_A::NONE + *self == Ufoa1::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "LETIMERn_OUT1 is toggled on CNT underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == UFOA1_A::TOGGLE + *self == Ufoa1::Toggle } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "LETIMERn_OUT1 is held active for one LETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL1"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == UFOA1_A::PULSE + *self == Ufoa1::Pulse } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "LETIMERn_OUT1 is set idle on CNT underflow, and active on compare match with COMP1"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == UFOA1_A::PWM + *self == Ufoa1::Pwm } } #[doc = "Field `UFOA1` writer - Underflow Output Action 1"] -pub type UFOA1_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, UFOA1_A, 2, O>; -impl<'a, const O: u8> UFOA1_W<'a, O> { +pub type Ufoa1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Ufoa1, crate::Safe>; +impl<'a, REG> Ufoa1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "LETIMERn_OUT1 is held at its idle value as defined by OPOL1"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(UFOA1_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Ufoa1::None) } #[doc = "LETIMERn_OUT1 is toggled on CNT underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(UFOA1_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Ufoa1::Toggle) } #[doc = "LETIMERn_OUT1 is held active for one LETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL1"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(UFOA1_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Ufoa1::Pulse) } #[doc = "LETIMERn_OUT1 is set idle on CNT underflow, and active on compare match with COMP1"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(UFOA1_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Ufoa1::Pwm) } } #[doc = "Field `OPOL0` reader - Output 0 Polarity"] -pub type OPOL0_R = crate::BitReader; +pub type Opol0R = crate::BitReader; #[doc = "Field `OPOL0` writer - Output 0 Polarity"] -pub type OPOL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type Opol0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OPOL1` reader - Output 1 Polarity"] -pub type OPOL1_R = crate::BitReader; +pub type Opol1R = crate::BitReader; #[doc = "Field `OPOL1` writer - Output 1 Polarity"] -pub type OPOL1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; -#[doc = "Field `BUFTOP` reader - Buffered Top"] -pub type BUFTOP_R = crate::BitReader; +pub type Opol1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Buffered Top\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BUFTOP_A { +pub enum Buftop { #[doc = "0: COMP0 is only written by software"] - DISABLE = 0, + Disable = 0, #[doc = "1: COMP0 is set to COMP1 when REP0 reaches 0"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BUFTOP_A) -> Self { + fn from(variant: Buftop) -> Self { variant as u8 != 0 } } -impl BUFTOP_R { +#[doc = "Field `BUFTOP` reader - Buffered Top"] +pub type BuftopR = crate::BitReader; +impl BuftopR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> BUFTOP_A { + pub const fn variant(&self) -> Buftop { match self.bits { - false => BUFTOP_A::DISABLE, - true => BUFTOP_A::ENABLE, + false => Buftop::Disable, + true => Buftop::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "COMP0 is only written by software"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == BUFTOP_A::DISABLE + *self == Buftop::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "COMP0 is set to COMP1 when REP0 reaches 0"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == BUFTOP_A::ENABLE + *self == Buftop::Enable } } #[doc = "Field `BUFTOP` writer - Buffered Top"] -pub type BUFTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, BUFTOP_A, O>; -impl<'a, const O: u8> BUFTOP_W<'a, O> { +pub type BuftopW<'a, REG> = crate::BitWriter<'a, REG, Buftop>; +impl<'a, REG> BuftopW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "COMP0 is only written by software"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(BUFTOP_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Buftop::Disable) } #[doc = "COMP0 is set to COMP1 when REP0 reaches 0"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(BUFTOP_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Buftop::Enable) } } -#[doc = "Field `CNTTOPEN` reader - Compare Value 0 Is Top Value"] -pub type CNTTOPEN_R = crate::BitReader; #[doc = "Compare Value 0 Is Top Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CNTTOPEN_A { +pub enum Cnttopen { #[doc = "0: The top value of the LETIMER is 65535 (0xFFFF)"] - DISABLE = 0, + Disable = 0, #[doc = "1: The top value of the LETIMER is given by COMP0"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CNTTOPEN_A) -> Self { + fn from(variant: Cnttopen) -> Self { variant as u8 != 0 } } -impl CNTTOPEN_R { +#[doc = "Field `CNTTOPEN` reader - Compare Value 0 Is Top Value"] +pub type CnttopenR = crate::BitReader; +impl CnttopenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CNTTOPEN_A { + pub const fn variant(&self) -> Cnttopen { match self.bits { - false => CNTTOPEN_A::DISABLE, - true => CNTTOPEN_A::ENABLE, + false => Cnttopen::Disable, + true => Cnttopen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The top value of the LETIMER is 65535 (0xFFFF)"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CNTTOPEN_A::DISABLE + *self == Cnttopen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The top value of the LETIMER is given by COMP0"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CNTTOPEN_A::ENABLE + *self == Cnttopen::Enable } } #[doc = "Field `CNTTOPEN` writer - Compare Value 0 Is Top Value"] -pub type CNTTOPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, CNTTOPEN_A, O>; -impl<'a, const O: u8> CNTTOPEN_W<'a, O> { +pub type CnttopenW<'a, REG> = crate::BitWriter<'a, REG, Cnttopen>; +impl<'a, REG> CnttopenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The top value of the LETIMER is 65535 (0xFFFF)"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CNTTOPEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Cnttopen::Disable) } #[doc = "The top value of the LETIMER is given by COMP0"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CNTTOPEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Cnttopen::Enable) } } -#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] -pub type DEBUGRUN_R = crate::BitReader; #[doc = "Debug Mode Run Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DEBUGRUN_A { +pub enum Debugrun { #[doc = "0: LETIMER is frozen in debug mode"] - DISABLE = 0, + Disable = 0, #[doc = "1: LETIMER is running in debug mode"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DEBUGRUN_A) -> Self { + fn from(variant: Debugrun) -> Self { variant as u8 != 0 } } -impl DEBUGRUN_R { +#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] +pub type DebugrunR = crate::BitReader; +impl DebugrunR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DEBUGRUN_A { + pub const fn variant(&self) -> Debugrun { match self.bits { - false => DEBUGRUN_A::DISABLE, - true => DEBUGRUN_A::ENABLE, + false => Debugrun::Disable, + true => Debugrun::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "LETIMER is frozen in debug mode"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == DEBUGRUN_A::DISABLE + *self == Debugrun::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "LETIMER is running in debug mode"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == DEBUGRUN_A::ENABLE + *self == Debugrun::Enable } } #[doc = "Field `DEBUGRUN` writer - Debug Mode Run Enable"] -pub type DEBUGRUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, DEBUGRUN_A, O>; -impl<'a, const O: u8> DEBUGRUN_W<'a, O> { +pub type DebugrunW<'a, REG> = crate::BitWriter<'a, REG, Debugrun>; +impl<'a, REG> DebugrunW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "LETIMER is frozen in debug mode"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(DEBUGRUN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Debugrun::Disable) } #[doc = "LETIMER is running in debug mode"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(DEBUGRUN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Debugrun::Enable) } } -#[doc = "Field `CNTPRESC` reader - Counter prescaler value"] -pub type CNTPRESC_R = crate::FieldReader; #[doc = "Counter prescaler value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CNTPRESC_A { +pub enum Cntpresc { #[doc = "0: CLK_CNT = (LETIMER LF CLK)/1"] - DIV1 = 0, + Div1 = 0, #[doc = "1: CLK_CNT = (LETIMER LF CLK)/2"] - DIV2 = 1, + Div2 = 1, #[doc = "2: CLK_CNT = (LETIMER LF CLK)/4"] - DIV4 = 2, + Div4 = 2, #[doc = "3: CLK_CNT = (LETIMER LF CLK)/8"] - DIV8 = 3, + Div8 = 3, #[doc = "4: CLK_CNT = (LETIMER LF CLK)/16"] - DIV16 = 4, + Div16 = 4, #[doc = "5: CLK_CNT = (LETIMER LF CLK)/32"] - DIV32 = 5, + Div32 = 5, #[doc = "6: CLK_CNT = (LETIMER LF CLK)/64"] - DIV64 = 6, + Div64 = 6, #[doc = "7: CLK_CNT = (LETIMER LF CLK)/128"] - DIV128 = 7, + Div128 = 7, #[doc = "8: CLK_CNT = (LETIMER LF CLK)/256"] - DIV256 = 8, + Div256 = 8, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CNTPRESC_A) -> Self { + fn from(variant: Cntpresc) -> Self { variant as _ } } -impl CNTPRESC_R { +impl crate::FieldSpec for Cntpresc { + type Ux = u8; +} +impl crate::IsEnum for Cntpresc {} +#[doc = "Field `CNTPRESC` reader - Counter prescaler value"] +pub type CntprescR = crate::FieldReader; +impl CntprescR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CNTPRESC_A::DIV1), - 1 => Some(CNTPRESC_A::DIV2), - 2 => Some(CNTPRESC_A::DIV4), - 3 => Some(CNTPRESC_A::DIV8), - 4 => Some(CNTPRESC_A::DIV16), - 5 => Some(CNTPRESC_A::DIV32), - 6 => Some(CNTPRESC_A::DIV64), - 7 => Some(CNTPRESC_A::DIV128), - 8 => Some(CNTPRESC_A::DIV256), + 0 => Some(Cntpresc::Div1), + 1 => Some(Cntpresc::Div2), + 2 => Some(Cntpresc::Div4), + 3 => Some(Cntpresc::Div8), + 4 => Some(Cntpresc::Div16), + 5 => Some(Cntpresc::Div32), + 6 => Some(Cntpresc::Div64), + 7 => Some(Cntpresc::Div128), + 8 => Some(Cntpresc::Div256), _ => None, } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "CLK_CNT = (LETIMER LF CLK)/1"] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == CNTPRESC_A::DIV1 + *self == Cntpresc::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "CLK_CNT = (LETIMER LF CLK)/2"] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == CNTPRESC_A::DIV2 + *self == Cntpresc::Div2 } - #[doc = "Checks if the value of the field is `DIV4`"] + #[doc = "CLK_CNT = (LETIMER LF CLK)/4"] #[inline(always)] pub fn is_div4(&self) -> bool { - *self == CNTPRESC_A::DIV4 + *self == Cntpresc::Div4 } - #[doc = "Checks if the value of the field is `DIV8`"] + #[doc = "CLK_CNT = (LETIMER LF CLK)/8"] #[inline(always)] pub fn is_div8(&self) -> bool { - *self == CNTPRESC_A::DIV8 + *self == Cntpresc::Div8 } - #[doc = "Checks if the value of the field is `DIV16`"] + #[doc = "CLK_CNT = (LETIMER LF CLK)/16"] #[inline(always)] pub fn is_div16(&self) -> bool { - *self == CNTPRESC_A::DIV16 + *self == Cntpresc::Div16 } - #[doc = "Checks if the value of the field is `DIV32`"] + #[doc = "CLK_CNT = (LETIMER LF CLK)/32"] #[inline(always)] pub fn is_div32(&self) -> bool { - *self == CNTPRESC_A::DIV32 + *self == Cntpresc::Div32 } - #[doc = "Checks if the value of the field is `DIV64`"] + #[doc = "CLK_CNT = (LETIMER LF CLK)/64"] #[inline(always)] pub fn is_div64(&self) -> bool { - *self == CNTPRESC_A::DIV64 + *self == Cntpresc::Div64 } - #[doc = "Checks if the value of the field is `DIV128`"] + #[doc = "CLK_CNT = (LETIMER LF CLK)/128"] #[inline(always)] pub fn is_div128(&self) -> bool { - *self == CNTPRESC_A::DIV128 + *self == Cntpresc::Div128 } - #[doc = "Checks if the value of the field is `DIV256`"] + #[doc = "CLK_CNT = (LETIMER LF CLK)/256"] #[inline(always)] pub fn is_div256(&self) -> bool { - *self == CNTPRESC_A::DIV256 + *self == Cntpresc::Div256 } } #[doc = "Field `CNTPRESC` writer - Counter prescaler value"] -pub type CNTPRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, CNTPRESC_A, 4, O>; -impl<'a, const O: u8> CNTPRESC_W<'a, O> { +pub type CntprescW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cntpresc>; +impl<'a, REG> CntprescW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "CLK_CNT = (LETIMER LF CLK)/1"] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div1) } #[doc = "CLK_CNT = (LETIMER LF CLK)/2"] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div2) } #[doc = "CLK_CNT = (LETIMER LF CLK)/4"] #[inline(always)] - pub fn div4(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV4) + pub fn div4(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div4) } #[doc = "CLK_CNT = (LETIMER LF CLK)/8"] #[inline(always)] - pub fn div8(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV8) + pub fn div8(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div8) } #[doc = "CLK_CNT = (LETIMER LF CLK)/16"] #[inline(always)] - pub fn div16(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV16) + pub fn div16(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div16) } #[doc = "CLK_CNT = (LETIMER LF CLK)/32"] #[inline(always)] - pub fn div32(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV32) + pub fn div32(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div32) } #[doc = "CLK_CNT = (LETIMER LF CLK)/64"] #[inline(always)] - pub fn div64(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV64) + pub fn div64(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div64) } #[doc = "CLK_CNT = (LETIMER LF CLK)/128"] #[inline(always)] - pub fn div128(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV128) + pub fn div128(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div128) } #[doc = "CLK_CNT = (LETIMER LF CLK)/256"] #[inline(always)] - pub fn div256(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV256) + pub fn div256(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div256) } } impl R { #[doc = "Bits 0:1 - Repeat Mode"] #[inline(always)] - pub fn repmode(&self) -> REPMODE_R { - REPMODE_R::new((self.bits & 3) as u8) + pub fn repmode(&self) -> RepmodeR { + RepmodeR::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Underflow Output Action 0"] #[inline(always)] - pub fn ufoa0(&self) -> UFOA0_R { - UFOA0_R::new(((self.bits >> 2) & 3) as u8) + pub fn ufoa0(&self) -> Ufoa0R { + Ufoa0R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - Underflow Output Action 1"] #[inline(always)] - pub fn ufoa1(&self) -> UFOA1_R { - UFOA1_R::new(((self.bits >> 4) & 3) as u8) + pub fn ufoa1(&self) -> Ufoa1R { + Ufoa1R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bit 6 - Output 0 Polarity"] #[inline(always)] - pub fn opol0(&self) -> OPOL0_R { - OPOL0_R::new(((self.bits >> 6) & 1) != 0) + pub fn opol0(&self) -> Opol0R { + Opol0R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Output 1 Polarity"] #[inline(always)] - pub fn opol1(&self) -> OPOL1_R { - OPOL1_R::new(((self.bits >> 7) & 1) != 0) + pub fn opol1(&self) -> Opol1R { + Opol1R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Buffered Top"] #[inline(always)] - pub fn buftop(&self) -> BUFTOP_R { - BUFTOP_R::new(((self.bits >> 8) & 1) != 0) + pub fn buftop(&self) -> BuftopR { + BuftopR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Compare Value 0 Is Top Value"] #[inline(always)] - pub fn cnttopen(&self) -> CNTTOPEN_R { - CNTTOPEN_R::new(((self.bits >> 9) & 1) != 0) + pub fn cnttopen(&self) -> CnttopenR { + CnttopenR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 12 - Debug Mode Run Enable"] #[inline(always)] - pub fn debugrun(&self) -> DEBUGRUN_R { - DEBUGRUN_R::new(((self.bits >> 12) & 1) != 0) + pub fn debugrun(&self) -> DebugrunR { + DebugrunR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bits 16:19 - Counter prescaler value"] #[inline(always)] - pub fn cntpresc(&self) -> CNTPRESC_R { - CNTPRESC_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn cntpresc(&self) -> CntprescR { + CntprescR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - Repeat Mode"] #[inline(always)] #[must_use] - pub fn repmode(&mut self) -> REPMODE_W<0> { - REPMODE_W::new(self) + pub fn repmode(&mut self) -> RepmodeW { + RepmodeW::new(self, 0) } #[doc = "Bits 2:3 - Underflow Output Action 0"] #[inline(always)] #[must_use] - pub fn ufoa0(&mut self) -> UFOA0_W<2> { - UFOA0_W::new(self) + pub fn ufoa0(&mut self) -> Ufoa0W { + Ufoa0W::new(self, 2) } #[doc = "Bits 4:5 - Underflow Output Action 1"] #[inline(always)] #[must_use] - pub fn ufoa1(&mut self) -> UFOA1_W<4> { - UFOA1_W::new(self) + pub fn ufoa1(&mut self) -> Ufoa1W { + Ufoa1W::new(self, 4) } #[doc = "Bit 6 - Output 0 Polarity"] #[inline(always)] #[must_use] - pub fn opol0(&mut self) -> OPOL0_W<6> { - OPOL0_W::new(self) + pub fn opol0(&mut self) -> Opol0W { + Opol0W::new(self, 6) } #[doc = "Bit 7 - Output 1 Polarity"] #[inline(always)] #[must_use] - pub fn opol1(&mut self) -> OPOL1_W<7> { - OPOL1_W::new(self) + pub fn opol1(&mut self) -> Opol1W { + Opol1W::new(self, 7) } #[doc = "Bit 8 - Buffered Top"] #[inline(always)] #[must_use] - pub fn buftop(&mut self) -> BUFTOP_W<8> { - BUFTOP_W::new(self) + pub fn buftop(&mut self) -> BuftopW { + BuftopW::new(self, 8) } #[doc = "Bit 9 - Compare Value 0 Is Top Value"] #[inline(always)] #[must_use] - pub fn cnttopen(&mut self) -> CNTTOPEN_W<9> { - CNTTOPEN_W::new(self) + pub fn cnttopen(&mut self) -> CnttopenW { + CnttopenW::new(self, 9) } #[doc = "Bit 12 - Debug Mode Run Enable"] #[inline(always)] #[must_use] - pub fn debugrun(&mut self) -> DEBUGRUN_W<12> { - DEBUGRUN_W::new(self) + pub fn debugrun(&mut self) -> DebugrunW { + DebugrunW::new(self, 12) } #[doc = "Bits 16:19 - Counter prescaler value"] #[inline(always)] #[must_use] - pub fn cntpresc(&mut self) -> CNTPRESC_W<16> { - CNTPRESC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cntpresc(&mut self) -> CntprescW { + CntprescW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/en.rs index f020fef..c04b2b1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - module en"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - module en"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - module en"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - module en"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/ien.rs index 3c094b5..d8b8686 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/ien.rs @@ -1,140 +1,100 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `COMP0` reader - Compare Match 0 Interrupt Enable"] -pub type COMP0_R = crate::BitReader; +pub type Comp0R = crate::BitReader; #[doc = "Field `COMP0` writer - Compare Match 0 Interrupt Enable"] -pub type COMP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Comp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COMP1` reader - Compare Match 1 Interrupt Enable"] -pub type COMP1_R = crate::BitReader; +pub type Comp1R = crate::BitReader; #[doc = "Field `COMP1` writer - Compare Match 1 Interrupt Enable"] -pub type COMP1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Comp1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UF` reader - Underflow Interrupt Enable"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Enable"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REP0` reader - Repeat Counter 0 Interrupt Enable"] -pub type REP0_R = crate::BitReader; +pub type Rep0R = crate::BitReader; #[doc = "Field `REP0` writer - Repeat Counter 0 Interrupt Enable"] -pub type REP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Rep0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REP1` reader - Repeat Counter 1 Interrupt Enable"] -pub type REP1_R = crate::BitReader; +pub type Rep1R = crate::BitReader; #[doc = "Field `REP1` writer - Repeat Counter 1 Interrupt Enable"] -pub type REP1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Rep1W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Compare Match 0 Interrupt Enable"] #[inline(always)] - pub fn comp0(&self) -> COMP0_R { - COMP0_R::new((self.bits & 1) != 0) + pub fn comp0(&self) -> Comp0R { + Comp0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Compare Match 1 Interrupt Enable"] #[inline(always)] - pub fn comp1(&self) -> COMP1_R { - COMP1_R::new(((self.bits >> 1) & 1) != 0) + pub fn comp1(&self) -> Comp1R { + Comp1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Underflow Interrupt Enable"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new(((self.bits >> 2) & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Repeat Counter 0 Interrupt Enable"] #[inline(always)] - pub fn rep0(&self) -> REP0_R { - REP0_R::new(((self.bits >> 3) & 1) != 0) + pub fn rep0(&self) -> Rep0R { + Rep0R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Repeat Counter 1 Interrupt Enable"] #[inline(always)] - pub fn rep1(&self) -> REP1_R { - REP1_R::new(((self.bits >> 4) & 1) != 0) + pub fn rep1(&self) -> Rep1R { + Rep1R::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - Compare Match 0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn comp0(&mut self) -> COMP0_W<0> { - COMP0_W::new(self) + pub fn comp0(&mut self) -> Comp0W { + Comp0W::new(self, 0) } #[doc = "Bit 1 - Compare Match 1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn comp1(&mut self) -> COMP1_W<1> { - COMP1_W::new(self) + pub fn comp1(&mut self) -> Comp1W { + Comp1W::new(self, 1) } #[doc = "Bit 2 - Underflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<2> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 2) } #[doc = "Bit 3 - Repeat Counter 0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rep0(&mut self) -> REP0_W<3> { - REP0_W::new(self) + pub fn rep0(&mut self) -> Rep0W { + Rep0W::new(self, 3) } #[doc = "Bit 4 - Repeat Counter 1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rep1(&mut self) -> REP1_W<4> { - REP1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rep1(&mut self) -> Rep1W { + Rep1W::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/if_.rs index 2ad0ae3..c8f1836 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/if_.rs @@ -1,140 +1,100 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `COMP0` reader - Compare Match 0 Interrupt Flag"] -pub type COMP0_R = crate::BitReader; +pub type Comp0R = crate::BitReader; #[doc = "Field `COMP0` writer - Compare Match 0 Interrupt Flag"] -pub type COMP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Comp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COMP1` reader - Compare Match 1 Interrupt Flag"] -pub type COMP1_R = crate::BitReader; +pub type Comp1R = crate::BitReader; #[doc = "Field `COMP1` writer - Compare Match 1 Interrupt Flag"] -pub type COMP1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Comp1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UF` reader - Underflow Interrupt Flag"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Flag"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REP0` reader - Repeat Counter 0 Interrupt Flag"] -pub type REP0_R = crate::BitReader; +pub type Rep0R = crate::BitReader; #[doc = "Field `REP0` writer - Repeat Counter 0 Interrupt Flag"] -pub type REP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Rep0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REP1` reader - Repeat Counter 1 Interrupt Flag"] -pub type REP1_R = crate::BitReader; +pub type Rep1R = crate::BitReader; #[doc = "Field `REP1` writer - Repeat Counter 1 Interrupt Flag"] -pub type REP1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Rep1W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Compare Match 0 Interrupt Flag"] #[inline(always)] - pub fn comp0(&self) -> COMP0_R { - COMP0_R::new((self.bits & 1) != 0) + pub fn comp0(&self) -> Comp0R { + Comp0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Compare Match 1 Interrupt Flag"] #[inline(always)] - pub fn comp1(&self) -> COMP1_R { - COMP1_R::new(((self.bits >> 1) & 1) != 0) + pub fn comp1(&self) -> Comp1R { + Comp1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Underflow Interrupt Flag"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new(((self.bits >> 2) & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Repeat Counter 0 Interrupt Flag"] #[inline(always)] - pub fn rep0(&self) -> REP0_R { - REP0_R::new(((self.bits >> 3) & 1) != 0) + pub fn rep0(&self) -> Rep0R { + Rep0R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Repeat Counter 1 Interrupt Flag"] #[inline(always)] - pub fn rep1(&self) -> REP1_R { - REP1_R::new(((self.bits >> 4) & 1) != 0) + pub fn rep1(&self) -> Rep1R { + Rep1R::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - Compare Match 0 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn comp0(&mut self) -> COMP0_W<0> { - COMP0_W::new(self) + pub fn comp0(&mut self) -> Comp0W { + Comp0W::new(self, 0) } #[doc = "Bit 1 - Compare Match 1 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn comp1(&mut self) -> COMP1_W<1> { - COMP1_W::new(self) + pub fn comp1(&mut self) -> Comp1W { + Comp1W::new(self, 1) } #[doc = "Bit 2 - Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<2> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 2) } #[doc = "Bit 3 - Repeat Counter 0 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rep0(&mut self) -> REP0_W<3> { - REP0_W::new(self) + pub fn rep0(&mut self) -> Rep0W { + Rep0W::new(self, 3) } #[doc = "Bit 4 - Repeat Counter 1 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rep1(&mut self) -> REP1_W<4> { - REP1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rep1(&mut self) -> Rep1W { + Rep1W::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/ipversion.rs index ad2c166..23b42d5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/lock.rs index be5a7f1..01f4312 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Configuration Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LETIMERLOCKKEY_AW { +pub enum Letimerlockkey { #[doc = "52476: Write to unock LETIMER lockable registers"] - UNLOCK = 52476, + Unlock = 52476, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LETIMERLOCKKEY_AW) -> Self { + fn from(variant: Letimerlockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Letimerlockkey { + type Ux = u16; +} +impl crate::IsEnum for Letimerlockkey {} #[doc = "Field `LETIMERLOCKKEY` writer - Configuration Lock Key"] -pub type LETIMERLOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LETIMERLOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LETIMERLOCKKEY_W<'a, O> { +pub type LetimerlockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Letimerlockkey>; +impl<'a, REG> LetimerlockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unock LETIMER lockable registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LETIMERLOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Letimerlockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Configuration Lock Key"] #[inline(always)] #[must_use] - pub fn letimerlockkey(&mut self) -> LETIMERLOCKKEY_W<0> { - LETIMERLOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn letimerlockkey(&mut self) -> LetimerlockkeyW { + LetimerlockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/prsmode.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/prsmode.rs index 6677a25..573ab46 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/prsmode.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/prsmode.rs @@ -1,335 +1,316 @@ #[doc = "Register `PRSMODE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRSMODE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `PRSSTARTMODE` reader - PRS Start Mode"] -pub type PRSSTARTMODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "PRS Start Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PRSSTARTMODE_A { +pub enum Prsstartmode { #[doc = "0: PRS cannot start the LETIMER"] - NONE = 0, + None = 0, #[doc = "1: Rising edge of selected PRS input can start the LETIMER"] - RISING = 1, + Rising = 1, #[doc = "2: Falling edge of selected PRS input can start the LETIMER"] - FALLING = 2, + Falling = 2, #[doc = "3: Both the rising or falling edge of the selected PRS input can start the LETIMER"] - BOTH = 3, + Both = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PRSSTARTMODE_A) -> Self { + fn from(variant: Prsstartmode) -> Self { variant as _ } } -impl PRSSTARTMODE_R { +impl crate::FieldSpec for Prsstartmode { + type Ux = u8; +} +impl crate::IsEnum for Prsstartmode {} +#[doc = "Field `PRSSTARTMODE` reader - PRS Start Mode"] +pub type PrsstartmodeR = crate::FieldReader; +impl PrsstartmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSSTARTMODE_A { + pub const fn variant(&self) -> Prsstartmode { match self.bits { - 0 => PRSSTARTMODE_A::NONE, - 1 => PRSSTARTMODE_A::RISING, - 2 => PRSSTARTMODE_A::FALLING, - 3 => PRSSTARTMODE_A::BOTH, + 0 => Prsstartmode::None, + 1 => Prsstartmode::Rising, + 2 => Prsstartmode::Falling, + 3 => Prsstartmode::Both, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "PRS cannot start the LETIMER"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == PRSSTARTMODE_A::NONE + *self == Prsstartmode::None } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edge of selected PRS input can start the LETIMER"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == PRSSTARTMODE_A::RISING + *self == Prsstartmode::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edge of selected PRS input can start the LETIMER"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == PRSSTARTMODE_A::FALLING + *self == Prsstartmode::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both the rising or falling edge of the selected PRS input can start the LETIMER"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == PRSSTARTMODE_A::BOTH + *self == Prsstartmode::Both } } #[doc = "Field `PRSSTARTMODE` writer - PRS Start Mode"] -pub type PRSSTARTMODE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PRSMODE_SPEC, u8, PRSSTARTMODE_A, 2, O>; -impl<'a, const O: u8> PRSSTARTMODE_W<'a, O> { +pub type PrsstartmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Prsstartmode, crate::Safe>; +impl<'a, REG> PrsstartmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS cannot start the LETIMER"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(PRSSTARTMODE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Prsstartmode::None) } #[doc = "Rising edge of selected PRS input can start the LETIMER"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(PRSSTARTMODE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Prsstartmode::Rising) } #[doc = "Falling edge of selected PRS input can start the LETIMER"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(PRSSTARTMODE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Prsstartmode::Falling) } #[doc = "Both the rising or falling edge of the selected PRS input can start the LETIMER"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(PRSSTARTMODE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Prsstartmode::Both) } } -#[doc = "Field `PRSSTOPMODE` reader - PRS Stop Mode"] -pub type PRSSTOPMODE_R = crate::FieldReader; #[doc = "PRS Stop Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PRSSTOPMODE_A { +pub enum Prsstopmode { #[doc = "0: PRS cannot stop the LETIMER"] - NONE = 0, + None = 0, #[doc = "1: Rising edge of selected PRS input can stop the LETIMER"] - RISING = 1, + Rising = 1, #[doc = "2: Falling edge of selected PRS input can stop the LETIMER"] - FALLING = 2, + Falling = 2, #[doc = "3: Both the rising or falling edge of the selected PRS input can stop the LETIMER"] - BOTH = 3, + Both = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PRSSTOPMODE_A) -> Self { + fn from(variant: Prsstopmode) -> Self { variant as _ } } -impl PRSSTOPMODE_R { +impl crate::FieldSpec for Prsstopmode { + type Ux = u8; +} +impl crate::IsEnum for Prsstopmode {} +#[doc = "Field `PRSSTOPMODE` reader - PRS Stop Mode"] +pub type PrsstopmodeR = crate::FieldReader; +impl PrsstopmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSSTOPMODE_A { + pub const fn variant(&self) -> Prsstopmode { match self.bits { - 0 => PRSSTOPMODE_A::NONE, - 1 => PRSSTOPMODE_A::RISING, - 2 => PRSSTOPMODE_A::FALLING, - 3 => PRSSTOPMODE_A::BOTH, + 0 => Prsstopmode::None, + 1 => Prsstopmode::Rising, + 2 => Prsstopmode::Falling, + 3 => Prsstopmode::Both, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "PRS cannot stop the LETIMER"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == PRSSTOPMODE_A::NONE + *self == Prsstopmode::None } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edge of selected PRS input can stop the LETIMER"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == PRSSTOPMODE_A::RISING + *self == Prsstopmode::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edge of selected PRS input can stop the LETIMER"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == PRSSTOPMODE_A::FALLING + *self == Prsstopmode::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both the rising or falling edge of the selected PRS input can stop the LETIMER"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == PRSSTOPMODE_A::BOTH + *self == Prsstopmode::Both } } #[doc = "Field `PRSSTOPMODE` writer - PRS Stop Mode"] -pub type PRSSTOPMODE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PRSMODE_SPEC, u8, PRSSTOPMODE_A, 2, O>; -impl<'a, const O: u8> PRSSTOPMODE_W<'a, O> { +pub type PrsstopmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Prsstopmode, crate::Safe>; +impl<'a, REG> PrsstopmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS cannot stop the LETIMER"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(PRSSTOPMODE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Prsstopmode::None) } #[doc = "Rising edge of selected PRS input can stop the LETIMER"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(PRSSTOPMODE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Prsstopmode::Rising) } #[doc = "Falling edge of selected PRS input can stop the LETIMER"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(PRSSTOPMODE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Prsstopmode::Falling) } #[doc = "Both the rising or falling edge of the selected PRS input can stop the LETIMER"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(PRSSTOPMODE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Prsstopmode::Both) } } -#[doc = "Field `PRSCLEARMODE` reader - PRS Clear Mode"] -pub type PRSCLEARMODE_R = crate::FieldReader; #[doc = "PRS Clear Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PRSCLEARMODE_A { +pub enum Prsclearmode { #[doc = "0: PRS cannot clear the LETIMER"] - NONE = 0, + None = 0, #[doc = "1: Rising edge of selected PRS input can clear the LETIMER"] - RISING = 1, + Rising = 1, #[doc = "2: Falling edge of selected PRS input can clear the LETIMER"] - FALLING = 2, + Falling = 2, #[doc = "3: Both the rising or falling edge of the selected PRS input can clear the LETIMER"] - BOTH = 3, + Both = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PRSCLEARMODE_A) -> Self { + fn from(variant: Prsclearmode) -> Self { variant as _ } } -impl PRSCLEARMODE_R { +impl crate::FieldSpec for Prsclearmode { + type Ux = u8; +} +impl crate::IsEnum for Prsclearmode {} +#[doc = "Field `PRSCLEARMODE` reader - PRS Clear Mode"] +pub type PrsclearmodeR = crate::FieldReader; +impl PrsclearmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCLEARMODE_A { + pub const fn variant(&self) -> Prsclearmode { match self.bits { - 0 => PRSCLEARMODE_A::NONE, - 1 => PRSCLEARMODE_A::RISING, - 2 => PRSCLEARMODE_A::FALLING, - 3 => PRSCLEARMODE_A::BOTH, + 0 => Prsclearmode::None, + 1 => Prsclearmode::Rising, + 2 => Prsclearmode::Falling, + 3 => Prsclearmode::Both, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "PRS cannot clear the LETIMER"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == PRSCLEARMODE_A::NONE + *self == Prsclearmode::None } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edge of selected PRS input can clear the LETIMER"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == PRSCLEARMODE_A::RISING + *self == Prsclearmode::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edge of selected PRS input can clear the LETIMER"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == PRSCLEARMODE_A::FALLING + *self == Prsclearmode::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both the rising or falling edge of the selected PRS input can clear the LETIMER"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == PRSCLEARMODE_A::BOTH + *self == Prsclearmode::Both } } #[doc = "Field `PRSCLEARMODE` writer - PRS Clear Mode"] -pub type PRSCLEARMODE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PRSMODE_SPEC, u8, PRSCLEARMODE_A, 2, O>; -impl<'a, const O: u8> PRSCLEARMODE_W<'a, O> { +pub type PrsclearmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Prsclearmode, crate::Safe>; +impl<'a, REG> PrsclearmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS cannot clear the LETIMER"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(PRSCLEARMODE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Prsclearmode::None) } #[doc = "Rising edge of selected PRS input can clear the LETIMER"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(PRSCLEARMODE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Prsclearmode::Rising) } #[doc = "Falling edge of selected PRS input can clear the LETIMER"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(PRSCLEARMODE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Prsclearmode::Falling) } #[doc = "Both the rising or falling edge of the selected PRS input can clear the LETIMER"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(PRSCLEARMODE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Prsclearmode::Both) } } impl R { #[doc = "Bits 18:19 - PRS Start Mode"] #[inline(always)] - pub fn prsstartmode(&self) -> PRSSTARTMODE_R { - PRSSTARTMODE_R::new(((self.bits >> 18) & 3) as u8) + pub fn prsstartmode(&self) -> PrsstartmodeR { + PrsstartmodeR::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 22:23 - PRS Stop Mode"] #[inline(always)] - pub fn prsstopmode(&self) -> PRSSTOPMODE_R { - PRSSTOPMODE_R::new(((self.bits >> 22) & 3) as u8) + pub fn prsstopmode(&self) -> PrsstopmodeR { + PrsstopmodeR::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 26:27 - PRS Clear Mode"] #[inline(always)] - pub fn prsclearmode(&self) -> PRSCLEARMODE_R { - PRSCLEARMODE_R::new(((self.bits >> 26) & 3) as u8) + pub fn prsclearmode(&self) -> PrsclearmodeR { + PrsclearmodeR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bits 18:19 - PRS Start Mode"] #[inline(always)] #[must_use] - pub fn prsstartmode(&mut self) -> PRSSTARTMODE_W<18> { - PRSSTARTMODE_W::new(self) + pub fn prsstartmode(&mut self) -> PrsstartmodeW { + PrsstartmodeW::new(self, 18) } #[doc = "Bits 22:23 - PRS Stop Mode"] #[inline(always)] #[must_use] - pub fn prsstopmode(&mut self) -> PRSSTOPMODE_W<22> { - PRSSTOPMODE_W::new(self) + pub fn prsstopmode(&mut self) -> PrsstopmodeW { + PrsstopmodeW::new(self, 22) } #[doc = "Bits 26:27 - PRS Clear Mode"] #[inline(always)] #[must_use] - pub fn prsclearmode(&mut self) -> PRSCLEARMODE_W<26> { - PRSCLEARMODE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prsclearmode(&mut self) -> PrsclearmodeW { + PrsclearmodeW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prsmode](index.html) module"] -pub struct PRSMODE_SPEC; -impl crate::RegisterSpec for PRSMODE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`prsmode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prsmode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PrsmodeSpec; +impl crate::RegisterSpec for PrsmodeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prsmode::R](R) reader structure"] -impl crate::Readable for PRSMODE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prsmode::W](W) writer structure"] -impl crate::Writable for PRSMODE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prsmode::R`](R) reader structure"] +impl crate::Readable for PrsmodeSpec {} +#[doc = "`write(|w| ..)` method takes [`prsmode::W`](W) writer structure"] +impl crate::Writable for PrsmodeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRSMODE to value 0"] -impl crate::Resettable for PRSMODE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PrsmodeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/rep0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/rep0.rs index 10af491..f44eda0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/rep0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/rep0.rs @@ -1,80 +1,40 @@ #[doc = "Register `REP0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `REP0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `REP0` reader - Repeat Counter 0"] -pub type REP0_R = crate::FieldReader; +pub type Rep0R = crate::FieldReader; #[doc = "Field `REP0` writer - Repeat Counter 0"] -pub type REP0_W<'a, const O: u8> = crate::FieldWriter<'a, u32, REP0_SPEC, u8, u8, 8, O>; +pub type Rep0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Repeat Counter 0"] #[inline(always)] - pub fn rep0(&self) -> REP0_R { - REP0_R::new((self.bits & 0xff) as u8) + pub fn rep0(&self) -> Rep0R { + Rep0R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Repeat Counter 0"] #[inline(always)] #[must_use] - pub fn rep0(&mut self) -> REP0_W<0> { - REP0_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rep0(&mut self) -> Rep0W { + Rep0W::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rep0](index.html) module"] -pub struct REP0_SPEC; -impl crate::RegisterSpec for REP0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rep0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rep0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Rep0Spec; +impl crate::RegisterSpec for Rep0Spec { type Ux = u32; } -#[doc = "`read()` method returns [rep0::R](R) reader structure"] -impl crate::Readable for REP0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rep0::W](W) writer structure"] -impl crate::Writable for REP0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`rep0::R`](R) reader structure"] +impl crate::Readable for Rep0Spec {} +#[doc = "`write(|w| ..)` method takes [`rep0::W`](W) writer structure"] +impl crate::Writable for Rep0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets REP0 to value 0"] -impl crate::Resettable for REP0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Rep0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/rep1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/rep1.rs index 1b95f75..4a28c2b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/rep1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/rep1.rs @@ -1,80 +1,40 @@ #[doc = "Register `REP1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `REP1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `REP1` reader - Repeat Counter 1"] -pub type REP1_R = crate::FieldReader; +pub type Rep1R = crate::FieldReader; #[doc = "Field `REP1` writer - Repeat Counter 1"] -pub type REP1_W<'a, const O: u8> = crate::FieldWriter<'a, u32, REP1_SPEC, u8, u8, 8, O>; +pub type Rep1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Repeat Counter 1"] #[inline(always)] - pub fn rep1(&self) -> REP1_R { - REP1_R::new((self.bits & 0xff) as u8) + pub fn rep1(&self) -> Rep1R { + Rep1R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Repeat Counter 1"] #[inline(always)] #[must_use] - pub fn rep1(&mut self) -> REP1_W<0> { - REP1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rep1(&mut self) -> Rep1W { + Rep1W::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rep1](index.html) module"] -pub struct REP1_SPEC; -impl crate::RegisterSpec for REP1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rep1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rep1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Rep1Spec; +impl crate::RegisterSpec for Rep1Spec { type Ux = u32; } -#[doc = "`read()` method returns [rep1::R](R) reader structure"] -impl crate::Readable for REP1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rep1::W](W) writer structure"] -impl crate::Writable for REP1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`rep1::R`](R) reader structure"] +impl crate::Readable for Rep1Spec {} +#[doc = "`write(|w| ..)` method takes [`rep1::W`](W) writer structure"] +impl crate::Writable for Rep1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets REP1 to value 0"] -impl crate::Resettable for REP1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Rep1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/status.rs index dd1a87f..658b025 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/status.rs @@ -1,78 +1,63 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RUNNING` reader - LETIMER Running"] -pub type RUNNING_R = crate::BitReader; -#[doc = "Field `LETIMERLOCKSTATUS` reader - LETIMER Lock Status"] -pub type LETIMERLOCKSTATUS_R = crate::BitReader; +pub type RunningR = crate::BitReader; #[doc = "LETIMER Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LETIMERLOCKSTATUS_A { +pub enum Letimerlockstatus { #[doc = "0: LETIMER registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: LETIMER registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LETIMERLOCKSTATUS_A) -> Self { + fn from(variant: Letimerlockstatus) -> Self { variant as u8 != 0 } } -impl LETIMERLOCKSTATUS_R { +#[doc = "Field `LETIMERLOCKSTATUS` reader - LETIMER Lock Status"] +pub type LetimerlockstatusR = crate::BitReader; +impl LetimerlockstatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LETIMERLOCKSTATUS_A { + pub const fn variant(&self) -> Letimerlockstatus { match self.bits { - false => LETIMERLOCKSTATUS_A::UNLOCKED, - true => LETIMERLOCKSTATUS_A::LOCKED, + false => Letimerlockstatus::Unlocked, + true => Letimerlockstatus::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "LETIMER registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LETIMERLOCKSTATUS_A::UNLOCKED + *self == Letimerlockstatus::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "LETIMER registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LETIMERLOCKSTATUS_A::LOCKED + *self == Letimerlockstatus::Locked } } impl R { #[doc = "Bit 0 - LETIMER Running"] #[inline(always)] - pub fn running(&self) -> RUNNING_R { - RUNNING_R::new((self.bits & 1) != 0) + pub fn running(&self) -> RunningR { + RunningR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - LETIMER Lock Status"] #[inline(always)] - pub fn letimerlockstatus(&self) -> LETIMERLOCKSTATUS_R { - LETIMERLOCKSTATUS_R::new(((self.bits >> 1) & 1) != 0) + pub fn letimerlockstatus(&self) -> LetimerlockstatusR { + LetimerlockstatusR::new(((self.bits >> 1) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/swrst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/swrst.rs index afd978e..804eaff 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/swrst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/swrst.rs @@ -1,80 +1,40 @@ #[doc = "Register `SWRST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SWRST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SWRST` writer - Software reset command"] -pub type SWRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, SWRST_SPEC, bool, O>; +pub type SwrstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESETTING` reader - Software reset busy status"] -pub type RESETTING_R = crate::BitReader; +pub type ResettingR = crate::BitReader; impl R { #[doc = "Bit 1 - Software reset busy status"] #[inline(always)] - pub fn resetting(&self) -> RESETTING_R { - RESETTING_R::new(((self.bits >> 1) & 1) != 0) + pub fn resetting(&self) -> ResettingR { + ResettingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Software reset command"] #[inline(always)] #[must_use] - pub fn swrst(&mut self) -> SWRST_W<0> { - SWRST_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn swrst(&mut self) -> SwrstW { + SwrstW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swrst](index.html) module"] -pub struct SWRST_SPEC; -impl crate::RegisterSpec for SWRST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SwrstSpec; +impl crate::RegisterSpec for SwrstSpec { type Ux = u32; } -#[doc = "`read()` method returns [swrst::R](R) reader structure"] -impl crate::Readable for SWRST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [swrst::W](W) writer structure"] -impl crate::Writable for SWRST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`swrst::R`](R) reader structure"] +impl crate::Readable for SwrstSpec {} +#[doc = "`write(|w| ..)` method takes [`swrst::W`](W) writer structure"] +impl crate::Writable for SwrstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWRST to value 0"] -impl crate::Resettable for SWRST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SwrstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/syncbusy.rs index 545fa37..bf1aa49 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/syncbusy.rs @@ -1,93 +1,78 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CNT` reader - Sync busy for CNT"] -pub type CNT_R = crate::BitReader; +pub type CntR = crate::BitReader; #[doc = "Field `TOP` reader - Sync busy for TOP"] -pub type TOP_R = crate::BitReader; +pub type TopR = crate::BitReader; #[doc = "Field `REP0` reader - Sync busy for REP0"] -pub type REP0_R = crate::BitReader; +pub type Rep0R = crate::BitReader; #[doc = "Field `REP1` reader - Sync busy for REP1"] -pub type REP1_R = crate::BitReader; +pub type Rep1R = crate::BitReader; #[doc = "Field `START` reader - Sync busy for START"] -pub type START_R = crate::BitReader; +pub type StartR = crate::BitReader; #[doc = "Field `STOP` reader - Sync busy for STOP"] -pub type STOP_R = crate::BitReader; +pub type StopR = crate::BitReader; #[doc = "Field `CLEAR` reader - Sync busy for CLEAR"] -pub type CLEAR_R = crate::BitReader; +pub type ClearR = crate::BitReader; #[doc = "Field `CTO0` reader - Sync busy for CTO0"] -pub type CTO0_R = crate::BitReader; +pub type Cto0R = crate::BitReader; #[doc = "Field `CTO1` reader - Sync busy for CTO1"] -pub type CTO1_R = crate::BitReader; +pub type Cto1R = crate::BitReader; impl R { #[doc = "Bit 0 - Sync busy for CNT"] #[inline(always)] - pub fn cnt(&self) -> CNT_R { - CNT_R::new((self.bits & 1) != 0) + pub fn cnt(&self) -> CntR { + CntR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - Sync busy for TOP"] #[inline(always)] - pub fn top(&self) -> TOP_R { - TOP_R::new(((self.bits >> 2) & 1) != 0) + pub fn top(&self) -> TopR { + TopR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Sync busy for REP0"] #[inline(always)] - pub fn rep0(&self) -> REP0_R { - REP0_R::new(((self.bits >> 3) & 1) != 0) + pub fn rep0(&self) -> Rep0R { + Rep0R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Sync busy for REP1"] #[inline(always)] - pub fn rep1(&self) -> REP1_R { - REP1_R::new(((self.bits >> 4) & 1) != 0) + pub fn rep1(&self) -> Rep1R { + Rep1R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Sync busy for START"] #[inline(always)] - pub fn start(&self) -> START_R { - START_R::new(((self.bits >> 5) & 1) != 0) + pub fn start(&self) -> StartR { + StartR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Sync busy for STOP"] #[inline(always)] - pub fn stop(&self) -> STOP_R { - STOP_R::new(((self.bits >> 6) & 1) != 0) + pub fn stop(&self) -> StopR { + StopR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Sync busy for CLEAR"] #[inline(always)] - pub fn clear(&self) -> CLEAR_R { - CLEAR_R::new(((self.bits >> 7) & 1) != 0) + pub fn clear(&self) -> ClearR { + ClearR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Sync busy for CTO0"] #[inline(always)] - pub fn cto0(&self) -> CTO0_R { - CTO0_R::new(((self.bits >> 8) & 1) != 0) + pub fn cto0(&self) -> Cto0R { + Cto0R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Sync busy for CTO1"] #[inline(always)] - pub fn cto1(&self) -> CTO1_R { - CTO1_R::new(((self.bits >> 9) & 1) != 0) + pub fn cto1(&self) -> Cto1R { + Cto1R::new(((self.bits >> 9) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/top.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/top.rs index f973df4..7fde1f1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/top.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/top.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOP` reader - Counter TOP Value"] -pub type TOP_R = crate::FieldReader; +pub type TopR = crate::FieldReader; #[doc = "Field `TOP` writer - Counter TOP Value"] -pub type TOP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOP_SPEC, u32, u32, 24, O>; +pub type TopW<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>; impl R { #[doc = "Bits 0:23 - Counter TOP Value"] #[inline(always)] - pub fn top(&self) -> TOP_R { - TOP_R::new(self.bits & 0x00ff_ffff) + pub fn top(&self) -> TopR { + TopR::new(self.bits & 0x00ff_ffff) } } impl W { #[doc = "Bits 0:23 - Counter TOP Value"] #[inline(always)] #[must_use] - pub fn top(&mut self) -> TOP_W<0> { - TOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn top(&mut self) -> TopW { + TopW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [top](index.html) module"] -pub struct TOP_SPEC; -impl crate::RegisterSpec for TOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopSpec; +impl crate::RegisterSpec for TopSpec { type Ux = u32; } -#[doc = "`read()` method returns [top::R](R) reader structure"] -impl crate::Readable for TOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [top::W](W) writer structure"] -impl crate::Writable for TOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`top::R`](R) reader structure"] +impl crate::Readable for TopSpec {} +#[doc = "`write(|w| ..)` method takes [`top::W`](W) writer structure"] +impl crate::Writable for TopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOP to value 0"] -impl crate::Resettable for TOP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TopSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/topbuff.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/topbuff.rs index e667675..6a3c5f9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/topbuff.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_ns/topbuff.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOPBUFF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOPBUFF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOPBUFF` reader - Buffered Counter TOP Value"] -pub type TOPBUFF_R = crate::FieldReader; +pub type TopbuffR = crate::FieldReader; #[doc = "Field `TOPBUFF` writer - Buffered Counter TOP Value"] -pub type TOPBUFF_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOPBUFF_SPEC, u32, u32, 24, O>; +pub type TopbuffW<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>; impl R { #[doc = "Bits 0:23 - Buffered Counter TOP Value"] #[inline(always)] - pub fn topbuff(&self) -> TOPBUFF_R { - TOPBUFF_R::new(self.bits & 0x00ff_ffff) + pub fn topbuff(&self) -> TopbuffR { + TopbuffR::new(self.bits & 0x00ff_ffff) } } impl W { #[doc = "Bits 0:23 - Buffered Counter TOP Value"] #[inline(always)] #[must_use] - pub fn topbuff(&mut self) -> TOPBUFF_W<0> { - TOPBUFF_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn topbuff(&mut self) -> TopbuffW { + TopbuffW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [topbuff](index.html) module"] -pub struct TOPBUFF_SPEC; -impl crate::RegisterSpec for TOPBUFF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topbuff::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topbuff::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopbuffSpec; +impl crate::RegisterSpec for TopbuffSpec { type Ux = u32; } -#[doc = "`read()` method returns [topbuff::R](R) reader structure"] -impl crate::Readable for TOPBUFF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [topbuff::W](W) writer structure"] -impl crate::Writable for TOPBUFF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`topbuff::R`](R) reader structure"] +impl crate::Readable for TopbuffSpec {} +#[doc = "`write(|w| ..)` method takes [`topbuff::W`](W) writer structure"] +impl crate::Writable for TopbuffSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOPBUFF to value 0"] -impl crate::Resettable for TOPBUFF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TopbuffSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s.rs index d267cf4..5031c37 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s.rs @@ -1,113 +1,223 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + swrst: Swrst, + ctrl: Ctrl, + cmd: Cmd, + status: Status, + cnt: Cnt, + comp0: Comp0, + comp1: Comp1, + top: Top, + topbuff: Topbuff, + rep0: Rep0, + rep1: Rep1, + if_: If, + ien: Ien, + lock: Lock, + syncbusy: Syncbusy, + _reserved17: [u8; 0x0c], + prsmode: Prsmode, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub swrst: SWRST, + #[inline(always)] + pub const fn swrst(&self) -> &Swrst { + &self.swrst + } #[doc = "0x0c - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x10 - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x14 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x18 - No Description"] - pub cnt: CNT, + #[inline(always)] + pub const fn cnt(&self) -> &Cnt { + &self.cnt + } #[doc = "0x1c - No Description"] - pub comp0: COMP0, + #[inline(always)] + pub const fn comp0(&self) -> &Comp0 { + &self.comp0 + } #[doc = "0x20 - No Description"] - pub comp1: COMP1, + #[inline(always)] + pub const fn comp1(&self) -> &Comp1 { + &self.comp1 + } #[doc = "0x24 - No Description"] - pub top: TOP, + #[inline(always)] + pub const fn top(&self) -> &Top { + &self.top + } #[doc = "0x28 - No Description"] - pub topbuff: TOPBUFF, + #[inline(always)] + pub const fn topbuff(&self) -> &Topbuff { + &self.topbuff + } #[doc = "0x2c - No Description"] - pub rep0: REP0, + #[inline(always)] + pub const fn rep0(&self) -> &Rep0 { + &self.rep0 + } #[doc = "0x30 - No Description"] - pub rep1: REP1, + #[inline(always)] + pub const fn rep1(&self) -> &Rep1 { + &self.rep1 + } #[doc = "0x34 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x38 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x3c - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x40 - No Description"] - pub syncbusy: SYNCBUSY, - _reserved17: [u8; 0x0c], + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } #[doc = "0x50 - No Description"] - pub prsmode: PRSMODE, + #[inline(always)] + pub const fn prsmode(&self) -> &Prsmode { + &self.prsmode + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "SWRST (rw) register accessor: an alias for `Reg`"] -pub type SWRST = crate::Reg; +#[doc = "SWRST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swrst`] +module"] +#[doc(alias = "SWRST")] +pub type Swrst = crate::Reg; #[doc = "No Description"] pub mod swrst; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "CNT (rw) register accessor: an alias for `Reg`"] -pub type CNT = crate::Reg; +#[doc = "CNT (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnt`] +module"] +#[doc(alias = "CNT")] +pub type Cnt = crate::Reg; #[doc = "No Description"] pub mod cnt; -#[doc = "COMP0 (rw) register accessor: an alias for `Reg`"] -pub type COMP0 = crate::Reg; +#[doc = "COMP0 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`comp0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`comp0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@comp0`] +module"] +#[doc(alias = "COMP0")] +pub type Comp0 = crate::Reg; #[doc = "No Description"] pub mod comp0; -#[doc = "COMP1 (rw) register accessor: an alias for `Reg`"] -pub type COMP1 = crate::Reg; +#[doc = "COMP1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`comp1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`comp1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@comp1`] +module"] +#[doc(alias = "COMP1")] +pub type Comp1 = crate::Reg; #[doc = "No Description"] pub mod comp1; -#[doc = "TOP (rw) register accessor: an alias for `Reg`"] -pub type TOP = crate::Reg; +#[doc = "TOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@top`] +module"] +#[doc(alias = "TOP")] +pub type Top = crate::Reg; #[doc = "No Description"] pub mod top; -#[doc = "TOPBUFF (rw) register accessor: an alias for `Reg`"] -pub type TOPBUFF = crate::Reg; +#[doc = "TOPBUFF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topbuff::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topbuff::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@topbuff`] +module"] +#[doc(alias = "TOPBUFF")] +pub type Topbuff = crate::Reg; #[doc = "No Description"] pub mod topbuff; -#[doc = "REP0 (rw) register accessor: an alias for `Reg`"] -pub type REP0 = crate::Reg; +#[doc = "REP0 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rep0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rep0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rep0`] +module"] +#[doc(alias = "REP0")] +pub type Rep0 = crate::Reg; #[doc = "No Description"] pub mod rep0; -#[doc = "REP1 (rw) register accessor: an alias for `Reg`"] -pub type REP1 = crate::Reg; +#[doc = "REP1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rep1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rep1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rep1`] +module"] +#[doc(alias = "REP1")] +pub type Rep1 = crate::Reg; #[doc = "No Description"] pub mod rep1; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "No Description"] pub mod syncbusy; -#[doc = "PRSMODE (rw) register accessor: an alias for `Reg`"] -pub type PRSMODE = crate::Reg; +#[doc = "PRSMODE (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`prsmode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prsmode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prsmode`] +module"] +#[doc(alias = "PRSMODE")] +pub type Prsmode = crate::Reg; #[doc = "No Description"] pub mod prsmode; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/cmd.rs index f80ad8f..84a911d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/cmd.rs @@ -1,84 +1,59 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` writer - Start LETIMER"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STOP` writer - Stop LETIMER"] -pub type STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StopW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEAR` writer - Clear LETIMER"] -pub type CLEAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type ClearW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTO0` writer - Clear Toggle Output 0"] -pub type CTO0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type Cto0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTO1` writer - Clear Toggle Output 1"] -pub type CTO1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type Cto1W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Start LETIMER"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Stop LETIMER"] #[inline(always)] #[must_use] - pub fn stop(&mut self) -> STOP_W<1> { - STOP_W::new(self) + pub fn stop(&mut self) -> StopW { + StopW::new(self, 1) } #[doc = "Bit 2 - Clear LETIMER"] #[inline(always)] #[must_use] - pub fn clear(&mut self) -> CLEAR_W<2> { - CLEAR_W::new(self) + pub fn clear(&mut self) -> ClearW { + ClearW::new(self, 2) } #[doc = "Bit 3 - Clear Toggle Output 0"] #[inline(always)] #[must_use] - pub fn cto0(&mut self) -> CTO0_W<3> { - CTO0_W::new(self) + pub fn cto0(&mut self) -> Cto0W { + Cto0W::new(self, 3) } #[doc = "Bit 4 - Clear Toggle Output 1"] #[inline(always)] #[must_use] - pub fn cto1(&mut self) -> CTO1_W<4> { - CTO1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cto1(&mut self) -> Cto1W { + Cto1W::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/cnt.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/cnt.rs index 0e67761..77898d5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/cnt.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/cnt.rs @@ -1,80 +1,40 @@ #[doc = "Register `CNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CNT` reader - Counter Value"] -pub type CNT_R = crate::FieldReader; +pub type CntR = crate::FieldReader; #[doc = "Field `CNT` writer - Counter Value"] -pub type CNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CNT_SPEC, u32, u32, 24, O>; +pub type CntW<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>; impl R { #[doc = "Bits 0:23 - Counter Value"] #[inline(always)] - pub fn cnt(&self) -> CNT_R { - CNT_R::new(self.bits & 0x00ff_ffff) + pub fn cnt(&self) -> CntR { + CntR::new(self.bits & 0x00ff_ffff) } } impl W { #[doc = "Bits 0:23 - Counter Value"] #[inline(always)] #[must_use] - pub fn cnt(&mut self) -> CNT_W<0> { - CNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cnt(&mut self) -> CntW { + CntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](index.html) module"] -pub struct CNT_SPEC; -impl crate::RegisterSpec for CNT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CntSpec; +impl crate::RegisterSpec for CntSpec { type Ux = u32; } -#[doc = "`read()` method returns [cnt::R](R) reader structure"] -impl crate::Readable for CNT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnt::W](W) writer structure"] -impl crate::Writable for CNT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cnt::R`](R) reader structure"] +impl crate::Readable for CntSpec {} +#[doc = "`write(|w| ..)` method takes [`cnt::W`](W) writer structure"] +impl crate::Writable for CntSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNT to value 0"] -impl crate::Resettable for CNT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CntSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/comp0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/comp0.rs index 985eef6..e6da8ad 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/comp0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/comp0.rs @@ -1,80 +1,40 @@ #[doc = "Register `COMP0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `COMP0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `COMP0` reader - Compare Value 0"] -pub type COMP0_R = crate::FieldReader; +pub type Comp0R = crate::FieldReader; #[doc = "Field `COMP0` writer - Compare Value 0"] -pub type COMP0_W<'a, const O: u8> = crate::FieldWriter<'a, u32, COMP0_SPEC, u32, u32, 24, O>; +pub type Comp0W<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>; impl R { #[doc = "Bits 0:23 - Compare Value 0"] #[inline(always)] - pub fn comp0(&self) -> COMP0_R { - COMP0_R::new(self.bits & 0x00ff_ffff) + pub fn comp0(&self) -> Comp0R { + Comp0R::new(self.bits & 0x00ff_ffff) } } impl W { #[doc = "Bits 0:23 - Compare Value 0"] #[inline(always)] #[must_use] - pub fn comp0(&mut self) -> COMP0_W<0> { - COMP0_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn comp0(&mut self) -> Comp0W { + Comp0W::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [comp0](index.html) module"] -pub struct COMP0_SPEC; -impl crate::RegisterSpec for COMP0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`comp0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`comp0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Comp0Spec; +impl crate::RegisterSpec for Comp0Spec { type Ux = u32; } -#[doc = "`read()` method returns [comp0::R](R) reader structure"] -impl crate::Readable for COMP0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [comp0::W](W) writer structure"] -impl crate::Writable for COMP0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`comp0::R`](R) reader structure"] +impl crate::Readable for Comp0Spec {} +#[doc = "`write(|w| ..)` method takes [`comp0::W`](W) writer structure"] +impl crate::Writable for Comp0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets COMP0 to value 0"] -impl crate::Resettable for COMP0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Comp0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/comp1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/comp1.rs index b553ef7..93e5f74 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/comp1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/comp1.rs @@ -1,80 +1,40 @@ #[doc = "Register `COMP1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `COMP1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `COMP1` reader - Compare Value 1"] -pub type COMP1_R = crate::FieldReader; +pub type Comp1R = crate::FieldReader; #[doc = "Field `COMP1` writer - Compare Value 1"] -pub type COMP1_W<'a, const O: u8> = crate::FieldWriter<'a, u32, COMP1_SPEC, u32, u32, 24, O>; +pub type Comp1W<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>; impl R { #[doc = "Bits 0:23 - Compare Value 1"] #[inline(always)] - pub fn comp1(&self) -> COMP1_R { - COMP1_R::new(self.bits & 0x00ff_ffff) + pub fn comp1(&self) -> Comp1R { + Comp1R::new(self.bits & 0x00ff_ffff) } } impl W { #[doc = "Bits 0:23 - Compare Value 1"] #[inline(always)] #[must_use] - pub fn comp1(&mut self) -> COMP1_W<0> { - COMP1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn comp1(&mut self) -> Comp1W { + Comp1W::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [comp1](index.html) module"] -pub struct COMP1_SPEC; -impl crate::RegisterSpec for COMP1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`comp1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`comp1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Comp1Spec; +impl crate::RegisterSpec for Comp1Spec { type Ux = u32; } -#[doc = "`read()` method returns [comp1::R](R) reader structure"] -impl crate::Readable for COMP1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [comp1::W](W) writer structure"] -impl crate::Writable for COMP1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`comp1::R`](R) reader structure"] +impl crate::Readable for Comp1Spec {} +#[doc = "`write(|w| ..)` method takes [`comp1::W`](W) writer structure"] +impl crate::Writable for Comp1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets COMP1 to value 0"] -impl crate::Resettable for COMP1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Comp1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/ctrl.rs index fcb70b3..baf9831 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/ctrl.rs @@ -1,700 +1,700 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `REPMODE` reader - Repeat Mode"] -pub type REPMODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Repeat Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REPMODE_A { +pub enum Repmode { #[doc = "0: When started, the LETIMER counts down until it is stopped by software"] - FREE = 0, + Free = 0, #[doc = "1: The counter counts REP0 times. When REP0 reaches zero, the counter stops"] - ONESHOT = 1, + Oneshot = 1, #[doc = "2: The counter counts REP0 times. If REP1 has been written, it is loaded into REP0 when REP0 reaches zero, otherwise the counter stops"] - BUFFERED = 2, + Buffered = 2, #[doc = "3: Both REP0 and REP1 are decremented when the LETIMER wraps around. The LETIMER counts until both REP0 and REP1 are zero"] - DOUBLE = 3, + Double = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REPMODE_A) -> Self { + fn from(variant: Repmode) -> Self { variant as _ } } -impl REPMODE_R { +impl crate::FieldSpec for Repmode { + type Ux = u8; +} +impl crate::IsEnum for Repmode {} +#[doc = "Field `REPMODE` reader - Repeat Mode"] +pub type RepmodeR = crate::FieldReader; +impl RepmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REPMODE_A { + pub const fn variant(&self) -> Repmode { match self.bits { - 0 => REPMODE_A::FREE, - 1 => REPMODE_A::ONESHOT, - 2 => REPMODE_A::BUFFERED, - 3 => REPMODE_A::DOUBLE, + 0 => Repmode::Free, + 1 => Repmode::Oneshot, + 2 => Repmode::Buffered, + 3 => Repmode::Double, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `FREE`"] + #[doc = "When started, the LETIMER counts down until it is stopped by software"] #[inline(always)] pub fn is_free(&self) -> bool { - *self == REPMODE_A::FREE + *self == Repmode::Free } - #[doc = "Checks if the value of the field is `ONESHOT`"] + #[doc = "The counter counts REP0 times. When REP0 reaches zero, the counter stops"] #[inline(always)] pub fn is_oneshot(&self) -> bool { - *self == REPMODE_A::ONESHOT + *self == Repmode::Oneshot } - #[doc = "Checks if the value of the field is `BUFFERED`"] + #[doc = "The counter counts REP0 times. If REP1 has been written, it is loaded into REP0 when REP0 reaches zero, otherwise the counter stops"] #[inline(always)] pub fn is_buffered(&self) -> bool { - *self == REPMODE_A::BUFFERED + *self == Repmode::Buffered } - #[doc = "Checks if the value of the field is `DOUBLE`"] + #[doc = "Both REP0 and REP1 are decremented when the LETIMER wraps around. The LETIMER counts until both REP0 and REP1 are zero"] #[inline(always)] pub fn is_double(&self) -> bool { - *self == REPMODE_A::DOUBLE + *self == Repmode::Double } } #[doc = "Field `REPMODE` writer - Repeat Mode"] -pub type REPMODE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, REPMODE_A, 2, O>; -impl<'a, const O: u8> REPMODE_W<'a, O> { +pub type RepmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Repmode, crate::Safe>; +impl<'a, REG> RepmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "When started, the LETIMER counts down until it is stopped by software"] #[inline(always)] - pub fn free(self) -> &'a mut W { - self.variant(REPMODE_A::FREE) + pub fn free(self) -> &'a mut crate::W { + self.variant(Repmode::Free) } #[doc = "The counter counts REP0 times. When REP0 reaches zero, the counter stops"] #[inline(always)] - pub fn oneshot(self) -> &'a mut W { - self.variant(REPMODE_A::ONESHOT) + pub fn oneshot(self) -> &'a mut crate::W { + self.variant(Repmode::Oneshot) } #[doc = "The counter counts REP0 times. If REP1 has been written, it is loaded into REP0 when REP0 reaches zero, otherwise the counter stops"] #[inline(always)] - pub fn buffered(self) -> &'a mut W { - self.variant(REPMODE_A::BUFFERED) + pub fn buffered(self) -> &'a mut crate::W { + self.variant(Repmode::Buffered) } #[doc = "Both REP0 and REP1 are decremented when the LETIMER wraps around. The LETIMER counts until both REP0 and REP1 are zero"] #[inline(always)] - pub fn double(self) -> &'a mut W { - self.variant(REPMODE_A::DOUBLE) + pub fn double(self) -> &'a mut crate::W { + self.variant(Repmode::Double) } } -#[doc = "Field `UFOA0` reader - Underflow Output Action 0"] -pub type UFOA0_R = crate::FieldReader; #[doc = "Underflow Output Action 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum UFOA0_A { +pub enum Ufoa0 { #[doc = "0: LETIMERn_OUT0 is held at its idle value as defined by OPOL0"] - NONE = 0, + None = 0, #[doc = "1: LETIMERn_OUT0 is toggled on CNT underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: LETIMERn_OUT0 is held active for one LETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL0"] - PULSE = 2, + Pulse = 2, #[doc = "3: LETIMERn_OUT0 is set idle on CNT underflow, and active on compare match with COMP1"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: UFOA0_A) -> Self { + fn from(variant: Ufoa0) -> Self { variant as _ } } -impl UFOA0_R { +impl crate::FieldSpec for Ufoa0 { + type Ux = u8; +} +impl crate::IsEnum for Ufoa0 {} +#[doc = "Field `UFOA0` reader - Underflow Output Action 0"] +pub type Ufoa0R = crate::FieldReader; +impl Ufoa0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> UFOA0_A { + pub const fn variant(&self) -> Ufoa0 { match self.bits { - 0 => UFOA0_A::NONE, - 1 => UFOA0_A::TOGGLE, - 2 => UFOA0_A::PULSE, - 3 => UFOA0_A::PWM, + 0 => Ufoa0::None, + 1 => Ufoa0::Toggle, + 2 => Ufoa0::Pulse, + 3 => Ufoa0::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "LETIMERn_OUT0 is held at its idle value as defined by OPOL0"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == UFOA0_A::NONE + *self == Ufoa0::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "LETIMERn_OUT0 is toggled on CNT underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == UFOA0_A::TOGGLE + *self == Ufoa0::Toggle } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "LETIMERn_OUT0 is held active for one LETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL0"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == UFOA0_A::PULSE + *self == Ufoa0::Pulse } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "LETIMERn_OUT0 is set idle on CNT underflow, and active on compare match with COMP1"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == UFOA0_A::PWM + *self == Ufoa0::Pwm } } #[doc = "Field `UFOA0` writer - Underflow Output Action 0"] -pub type UFOA0_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, UFOA0_A, 2, O>; -impl<'a, const O: u8> UFOA0_W<'a, O> { +pub type Ufoa0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Ufoa0, crate::Safe>; +impl<'a, REG> Ufoa0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "LETIMERn_OUT0 is held at its idle value as defined by OPOL0"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(UFOA0_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Ufoa0::None) } #[doc = "LETIMERn_OUT0 is toggled on CNT underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(UFOA0_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Ufoa0::Toggle) } #[doc = "LETIMERn_OUT0 is held active for one LETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL0"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(UFOA0_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Ufoa0::Pulse) } #[doc = "LETIMERn_OUT0 is set idle on CNT underflow, and active on compare match with COMP1"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(UFOA0_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Ufoa0::Pwm) } } -#[doc = "Field `UFOA1` reader - Underflow Output Action 1"] -pub type UFOA1_R = crate::FieldReader; #[doc = "Underflow Output Action 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum UFOA1_A { +pub enum Ufoa1 { #[doc = "0: LETIMERn_OUT1 is held at its idle value as defined by OPOL1"] - NONE = 0, + None = 0, #[doc = "1: LETIMERn_OUT1 is toggled on CNT underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: LETIMERn_OUT1 is held active for one LETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL1"] - PULSE = 2, + Pulse = 2, #[doc = "3: LETIMERn_OUT1 is set idle on CNT underflow, and active on compare match with COMP1"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: UFOA1_A) -> Self { + fn from(variant: Ufoa1) -> Self { variant as _ } } -impl UFOA1_R { +impl crate::FieldSpec for Ufoa1 { + type Ux = u8; +} +impl crate::IsEnum for Ufoa1 {} +#[doc = "Field `UFOA1` reader - Underflow Output Action 1"] +pub type Ufoa1R = crate::FieldReader; +impl Ufoa1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> UFOA1_A { + pub const fn variant(&self) -> Ufoa1 { match self.bits { - 0 => UFOA1_A::NONE, - 1 => UFOA1_A::TOGGLE, - 2 => UFOA1_A::PULSE, - 3 => UFOA1_A::PWM, + 0 => Ufoa1::None, + 1 => Ufoa1::Toggle, + 2 => Ufoa1::Pulse, + 3 => Ufoa1::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "LETIMERn_OUT1 is held at its idle value as defined by OPOL1"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == UFOA1_A::NONE + *self == Ufoa1::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "LETIMERn_OUT1 is toggled on CNT underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == UFOA1_A::TOGGLE + *self == Ufoa1::Toggle } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "LETIMERn_OUT1 is held active for one LETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL1"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == UFOA1_A::PULSE + *self == Ufoa1::Pulse } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "LETIMERn_OUT1 is set idle on CNT underflow, and active on compare match with COMP1"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == UFOA1_A::PWM + *self == Ufoa1::Pwm } } #[doc = "Field `UFOA1` writer - Underflow Output Action 1"] -pub type UFOA1_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, UFOA1_A, 2, O>; -impl<'a, const O: u8> UFOA1_W<'a, O> { +pub type Ufoa1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Ufoa1, crate::Safe>; +impl<'a, REG> Ufoa1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "LETIMERn_OUT1 is held at its idle value as defined by OPOL1"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(UFOA1_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Ufoa1::None) } #[doc = "LETIMERn_OUT1 is toggled on CNT underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(UFOA1_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Ufoa1::Toggle) } #[doc = "LETIMERn_OUT1 is held active for one LETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL1"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(UFOA1_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Ufoa1::Pulse) } #[doc = "LETIMERn_OUT1 is set idle on CNT underflow, and active on compare match with COMP1"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(UFOA1_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Ufoa1::Pwm) } } #[doc = "Field `OPOL0` reader - Output 0 Polarity"] -pub type OPOL0_R = crate::BitReader; +pub type Opol0R = crate::BitReader; #[doc = "Field `OPOL0` writer - Output 0 Polarity"] -pub type OPOL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type Opol0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OPOL1` reader - Output 1 Polarity"] -pub type OPOL1_R = crate::BitReader; +pub type Opol1R = crate::BitReader; #[doc = "Field `OPOL1` writer - Output 1 Polarity"] -pub type OPOL1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; -#[doc = "Field `BUFTOP` reader - Buffered Top"] -pub type BUFTOP_R = crate::BitReader; +pub type Opol1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Buffered Top\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BUFTOP_A { +pub enum Buftop { #[doc = "0: COMP0 is only written by software"] - DISABLE = 0, + Disable = 0, #[doc = "1: COMP0 is set to COMP1 when REP0 reaches 0"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BUFTOP_A) -> Self { + fn from(variant: Buftop) -> Self { variant as u8 != 0 } } -impl BUFTOP_R { +#[doc = "Field `BUFTOP` reader - Buffered Top"] +pub type BuftopR = crate::BitReader; +impl BuftopR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> BUFTOP_A { + pub const fn variant(&self) -> Buftop { match self.bits { - false => BUFTOP_A::DISABLE, - true => BUFTOP_A::ENABLE, + false => Buftop::Disable, + true => Buftop::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "COMP0 is only written by software"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == BUFTOP_A::DISABLE + *self == Buftop::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "COMP0 is set to COMP1 when REP0 reaches 0"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == BUFTOP_A::ENABLE + *self == Buftop::Enable } } #[doc = "Field `BUFTOP` writer - Buffered Top"] -pub type BUFTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, BUFTOP_A, O>; -impl<'a, const O: u8> BUFTOP_W<'a, O> { +pub type BuftopW<'a, REG> = crate::BitWriter<'a, REG, Buftop>; +impl<'a, REG> BuftopW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "COMP0 is only written by software"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(BUFTOP_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Buftop::Disable) } #[doc = "COMP0 is set to COMP1 when REP0 reaches 0"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(BUFTOP_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Buftop::Enable) } } -#[doc = "Field `CNTTOPEN` reader - Compare Value 0 Is Top Value"] -pub type CNTTOPEN_R = crate::BitReader; #[doc = "Compare Value 0 Is Top Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CNTTOPEN_A { +pub enum Cnttopen { #[doc = "0: The top value of the LETIMER is 65535 (0xFFFF)"] - DISABLE = 0, + Disable = 0, #[doc = "1: The top value of the LETIMER is given by COMP0"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CNTTOPEN_A) -> Self { + fn from(variant: Cnttopen) -> Self { variant as u8 != 0 } } -impl CNTTOPEN_R { +#[doc = "Field `CNTTOPEN` reader - Compare Value 0 Is Top Value"] +pub type CnttopenR = crate::BitReader; +impl CnttopenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CNTTOPEN_A { + pub const fn variant(&self) -> Cnttopen { match self.bits { - false => CNTTOPEN_A::DISABLE, - true => CNTTOPEN_A::ENABLE, + false => Cnttopen::Disable, + true => Cnttopen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The top value of the LETIMER is 65535 (0xFFFF)"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CNTTOPEN_A::DISABLE + *self == Cnttopen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The top value of the LETIMER is given by COMP0"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CNTTOPEN_A::ENABLE + *self == Cnttopen::Enable } } #[doc = "Field `CNTTOPEN` writer - Compare Value 0 Is Top Value"] -pub type CNTTOPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, CNTTOPEN_A, O>; -impl<'a, const O: u8> CNTTOPEN_W<'a, O> { +pub type CnttopenW<'a, REG> = crate::BitWriter<'a, REG, Cnttopen>; +impl<'a, REG> CnttopenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The top value of the LETIMER is 65535 (0xFFFF)"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CNTTOPEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Cnttopen::Disable) } #[doc = "The top value of the LETIMER is given by COMP0"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CNTTOPEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Cnttopen::Enable) } } -#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] -pub type DEBUGRUN_R = crate::BitReader; #[doc = "Debug Mode Run Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DEBUGRUN_A { +pub enum Debugrun { #[doc = "0: LETIMER is frozen in debug mode"] - DISABLE = 0, + Disable = 0, #[doc = "1: LETIMER is running in debug mode"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DEBUGRUN_A) -> Self { + fn from(variant: Debugrun) -> Self { variant as u8 != 0 } } -impl DEBUGRUN_R { +#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] +pub type DebugrunR = crate::BitReader; +impl DebugrunR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DEBUGRUN_A { + pub const fn variant(&self) -> Debugrun { match self.bits { - false => DEBUGRUN_A::DISABLE, - true => DEBUGRUN_A::ENABLE, + false => Debugrun::Disable, + true => Debugrun::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "LETIMER is frozen in debug mode"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == DEBUGRUN_A::DISABLE + *self == Debugrun::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "LETIMER is running in debug mode"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == DEBUGRUN_A::ENABLE + *self == Debugrun::Enable } } #[doc = "Field `DEBUGRUN` writer - Debug Mode Run Enable"] -pub type DEBUGRUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, DEBUGRUN_A, O>; -impl<'a, const O: u8> DEBUGRUN_W<'a, O> { +pub type DebugrunW<'a, REG> = crate::BitWriter<'a, REG, Debugrun>; +impl<'a, REG> DebugrunW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "LETIMER is frozen in debug mode"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(DEBUGRUN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Debugrun::Disable) } #[doc = "LETIMER is running in debug mode"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(DEBUGRUN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Debugrun::Enable) } } -#[doc = "Field `CNTPRESC` reader - Counter prescaler value"] -pub type CNTPRESC_R = crate::FieldReader; #[doc = "Counter prescaler value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CNTPRESC_A { +pub enum Cntpresc { #[doc = "0: CLK_CNT = (LETIMER LF CLK)/1"] - DIV1 = 0, + Div1 = 0, #[doc = "1: CLK_CNT = (LETIMER LF CLK)/2"] - DIV2 = 1, + Div2 = 1, #[doc = "2: CLK_CNT = (LETIMER LF CLK)/4"] - DIV4 = 2, + Div4 = 2, #[doc = "3: CLK_CNT = (LETIMER LF CLK)/8"] - DIV8 = 3, + Div8 = 3, #[doc = "4: CLK_CNT = (LETIMER LF CLK)/16"] - DIV16 = 4, + Div16 = 4, #[doc = "5: CLK_CNT = (LETIMER LF CLK)/32"] - DIV32 = 5, + Div32 = 5, #[doc = "6: CLK_CNT = (LETIMER LF CLK)/64"] - DIV64 = 6, + Div64 = 6, #[doc = "7: CLK_CNT = (LETIMER LF CLK)/128"] - DIV128 = 7, + Div128 = 7, #[doc = "8: CLK_CNT = (LETIMER LF CLK)/256"] - DIV256 = 8, + Div256 = 8, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CNTPRESC_A) -> Self { + fn from(variant: Cntpresc) -> Self { variant as _ } } -impl CNTPRESC_R { +impl crate::FieldSpec for Cntpresc { + type Ux = u8; +} +impl crate::IsEnum for Cntpresc {} +#[doc = "Field `CNTPRESC` reader - Counter prescaler value"] +pub type CntprescR = crate::FieldReader; +impl CntprescR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CNTPRESC_A::DIV1), - 1 => Some(CNTPRESC_A::DIV2), - 2 => Some(CNTPRESC_A::DIV4), - 3 => Some(CNTPRESC_A::DIV8), - 4 => Some(CNTPRESC_A::DIV16), - 5 => Some(CNTPRESC_A::DIV32), - 6 => Some(CNTPRESC_A::DIV64), - 7 => Some(CNTPRESC_A::DIV128), - 8 => Some(CNTPRESC_A::DIV256), + 0 => Some(Cntpresc::Div1), + 1 => Some(Cntpresc::Div2), + 2 => Some(Cntpresc::Div4), + 3 => Some(Cntpresc::Div8), + 4 => Some(Cntpresc::Div16), + 5 => Some(Cntpresc::Div32), + 6 => Some(Cntpresc::Div64), + 7 => Some(Cntpresc::Div128), + 8 => Some(Cntpresc::Div256), _ => None, } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "CLK_CNT = (LETIMER LF CLK)/1"] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == CNTPRESC_A::DIV1 + *self == Cntpresc::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "CLK_CNT = (LETIMER LF CLK)/2"] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == CNTPRESC_A::DIV2 + *self == Cntpresc::Div2 } - #[doc = "Checks if the value of the field is `DIV4`"] + #[doc = "CLK_CNT = (LETIMER LF CLK)/4"] #[inline(always)] pub fn is_div4(&self) -> bool { - *self == CNTPRESC_A::DIV4 + *self == Cntpresc::Div4 } - #[doc = "Checks if the value of the field is `DIV8`"] + #[doc = "CLK_CNT = (LETIMER LF CLK)/8"] #[inline(always)] pub fn is_div8(&self) -> bool { - *self == CNTPRESC_A::DIV8 + *self == Cntpresc::Div8 } - #[doc = "Checks if the value of the field is `DIV16`"] + #[doc = "CLK_CNT = (LETIMER LF CLK)/16"] #[inline(always)] pub fn is_div16(&self) -> bool { - *self == CNTPRESC_A::DIV16 + *self == Cntpresc::Div16 } - #[doc = "Checks if the value of the field is `DIV32`"] + #[doc = "CLK_CNT = (LETIMER LF CLK)/32"] #[inline(always)] pub fn is_div32(&self) -> bool { - *self == CNTPRESC_A::DIV32 + *self == Cntpresc::Div32 } - #[doc = "Checks if the value of the field is `DIV64`"] + #[doc = "CLK_CNT = (LETIMER LF CLK)/64"] #[inline(always)] pub fn is_div64(&self) -> bool { - *self == CNTPRESC_A::DIV64 + *self == Cntpresc::Div64 } - #[doc = "Checks if the value of the field is `DIV128`"] + #[doc = "CLK_CNT = (LETIMER LF CLK)/128"] #[inline(always)] pub fn is_div128(&self) -> bool { - *self == CNTPRESC_A::DIV128 + *self == Cntpresc::Div128 } - #[doc = "Checks if the value of the field is `DIV256`"] + #[doc = "CLK_CNT = (LETIMER LF CLK)/256"] #[inline(always)] pub fn is_div256(&self) -> bool { - *self == CNTPRESC_A::DIV256 + *self == Cntpresc::Div256 } } #[doc = "Field `CNTPRESC` writer - Counter prescaler value"] -pub type CNTPRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, CNTPRESC_A, 4, O>; -impl<'a, const O: u8> CNTPRESC_W<'a, O> { +pub type CntprescW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cntpresc>; +impl<'a, REG> CntprescW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "CLK_CNT = (LETIMER LF CLK)/1"] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div1) } #[doc = "CLK_CNT = (LETIMER LF CLK)/2"] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div2) } #[doc = "CLK_CNT = (LETIMER LF CLK)/4"] #[inline(always)] - pub fn div4(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV4) + pub fn div4(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div4) } #[doc = "CLK_CNT = (LETIMER LF CLK)/8"] #[inline(always)] - pub fn div8(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV8) + pub fn div8(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div8) } #[doc = "CLK_CNT = (LETIMER LF CLK)/16"] #[inline(always)] - pub fn div16(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV16) + pub fn div16(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div16) } #[doc = "CLK_CNT = (LETIMER LF CLK)/32"] #[inline(always)] - pub fn div32(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV32) + pub fn div32(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div32) } #[doc = "CLK_CNT = (LETIMER LF CLK)/64"] #[inline(always)] - pub fn div64(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV64) + pub fn div64(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div64) } #[doc = "CLK_CNT = (LETIMER LF CLK)/128"] #[inline(always)] - pub fn div128(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV128) + pub fn div128(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div128) } #[doc = "CLK_CNT = (LETIMER LF CLK)/256"] #[inline(always)] - pub fn div256(self) -> &'a mut W { - self.variant(CNTPRESC_A::DIV256) + pub fn div256(self) -> &'a mut crate::W { + self.variant(Cntpresc::Div256) } } impl R { #[doc = "Bits 0:1 - Repeat Mode"] #[inline(always)] - pub fn repmode(&self) -> REPMODE_R { - REPMODE_R::new((self.bits & 3) as u8) + pub fn repmode(&self) -> RepmodeR { + RepmodeR::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Underflow Output Action 0"] #[inline(always)] - pub fn ufoa0(&self) -> UFOA0_R { - UFOA0_R::new(((self.bits >> 2) & 3) as u8) + pub fn ufoa0(&self) -> Ufoa0R { + Ufoa0R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - Underflow Output Action 1"] #[inline(always)] - pub fn ufoa1(&self) -> UFOA1_R { - UFOA1_R::new(((self.bits >> 4) & 3) as u8) + pub fn ufoa1(&self) -> Ufoa1R { + Ufoa1R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bit 6 - Output 0 Polarity"] #[inline(always)] - pub fn opol0(&self) -> OPOL0_R { - OPOL0_R::new(((self.bits >> 6) & 1) != 0) + pub fn opol0(&self) -> Opol0R { + Opol0R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Output 1 Polarity"] #[inline(always)] - pub fn opol1(&self) -> OPOL1_R { - OPOL1_R::new(((self.bits >> 7) & 1) != 0) + pub fn opol1(&self) -> Opol1R { + Opol1R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Buffered Top"] #[inline(always)] - pub fn buftop(&self) -> BUFTOP_R { - BUFTOP_R::new(((self.bits >> 8) & 1) != 0) + pub fn buftop(&self) -> BuftopR { + BuftopR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Compare Value 0 Is Top Value"] #[inline(always)] - pub fn cnttopen(&self) -> CNTTOPEN_R { - CNTTOPEN_R::new(((self.bits >> 9) & 1) != 0) + pub fn cnttopen(&self) -> CnttopenR { + CnttopenR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 12 - Debug Mode Run Enable"] #[inline(always)] - pub fn debugrun(&self) -> DEBUGRUN_R { - DEBUGRUN_R::new(((self.bits >> 12) & 1) != 0) + pub fn debugrun(&self) -> DebugrunR { + DebugrunR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bits 16:19 - Counter prescaler value"] #[inline(always)] - pub fn cntpresc(&self) -> CNTPRESC_R { - CNTPRESC_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn cntpresc(&self) -> CntprescR { + CntprescR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:1 - Repeat Mode"] #[inline(always)] #[must_use] - pub fn repmode(&mut self) -> REPMODE_W<0> { - REPMODE_W::new(self) + pub fn repmode(&mut self) -> RepmodeW { + RepmodeW::new(self, 0) } #[doc = "Bits 2:3 - Underflow Output Action 0"] #[inline(always)] #[must_use] - pub fn ufoa0(&mut self) -> UFOA0_W<2> { - UFOA0_W::new(self) + pub fn ufoa0(&mut self) -> Ufoa0W { + Ufoa0W::new(self, 2) } #[doc = "Bits 4:5 - Underflow Output Action 1"] #[inline(always)] #[must_use] - pub fn ufoa1(&mut self) -> UFOA1_W<4> { - UFOA1_W::new(self) + pub fn ufoa1(&mut self) -> Ufoa1W { + Ufoa1W::new(self, 4) } #[doc = "Bit 6 - Output 0 Polarity"] #[inline(always)] #[must_use] - pub fn opol0(&mut self) -> OPOL0_W<6> { - OPOL0_W::new(self) + pub fn opol0(&mut self) -> Opol0W { + Opol0W::new(self, 6) } #[doc = "Bit 7 - Output 1 Polarity"] #[inline(always)] #[must_use] - pub fn opol1(&mut self) -> OPOL1_W<7> { - OPOL1_W::new(self) + pub fn opol1(&mut self) -> Opol1W { + Opol1W::new(self, 7) } #[doc = "Bit 8 - Buffered Top"] #[inline(always)] #[must_use] - pub fn buftop(&mut self) -> BUFTOP_W<8> { - BUFTOP_W::new(self) + pub fn buftop(&mut self) -> BuftopW { + BuftopW::new(self, 8) } #[doc = "Bit 9 - Compare Value 0 Is Top Value"] #[inline(always)] #[must_use] - pub fn cnttopen(&mut self) -> CNTTOPEN_W<9> { - CNTTOPEN_W::new(self) + pub fn cnttopen(&mut self) -> CnttopenW { + CnttopenW::new(self, 9) } #[doc = "Bit 12 - Debug Mode Run Enable"] #[inline(always)] #[must_use] - pub fn debugrun(&mut self) -> DEBUGRUN_W<12> { - DEBUGRUN_W::new(self) + pub fn debugrun(&mut self) -> DebugrunW { + DebugrunW::new(self, 12) } #[doc = "Bits 16:19 - Counter prescaler value"] #[inline(always)] #[must_use] - pub fn cntpresc(&mut self) -> CNTPRESC_W<16> { - CNTPRESC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cntpresc(&mut self) -> CntprescW { + CntprescW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/en.rs index f020fef..c04b2b1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - module en"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - module en"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - module en"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - module en"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/ien.rs index 3c094b5..d8b8686 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/ien.rs @@ -1,140 +1,100 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `COMP0` reader - Compare Match 0 Interrupt Enable"] -pub type COMP0_R = crate::BitReader; +pub type Comp0R = crate::BitReader; #[doc = "Field `COMP0` writer - Compare Match 0 Interrupt Enable"] -pub type COMP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Comp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COMP1` reader - Compare Match 1 Interrupt Enable"] -pub type COMP1_R = crate::BitReader; +pub type Comp1R = crate::BitReader; #[doc = "Field `COMP1` writer - Compare Match 1 Interrupt Enable"] -pub type COMP1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Comp1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UF` reader - Underflow Interrupt Enable"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Enable"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REP0` reader - Repeat Counter 0 Interrupt Enable"] -pub type REP0_R = crate::BitReader; +pub type Rep0R = crate::BitReader; #[doc = "Field `REP0` writer - Repeat Counter 0 Interrupt Enable"] -pub type REP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Rep0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REP1` reader - Repeat Counter 1 Interrupt Enable"] -pub type REP1_R = crate::BitReader; +pub type Rep1R = crate::BitReader; #[doc = "Field `REP1` writer - Repeat Counter 1 Interrupt Enable"] -pub type REP1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Rep1W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Compare Match 0 Interrupt Enable"] #[inline(always)] - pub fn comp0(&self) -> COMP0_R { - COMP0_R::new((self.bits & 1) != 0) + pub fn comp0(&self) -> Comp0R { + Comp0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Compare Match 1 Interrupt Enable"] #[inline(always)] - pub fn comp1(&self) -> COMP1_R { - COMP1_R::new(((self.bits >> 1) & 1) != 0) + pub fn comp1(&self) -> Comp1R { + Comp1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Underflow Interrupt Enable"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new(((self.bits >> 2) & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Repeat Counter 0 Interrupt Enable"] #[inline(always)] - pub fn rep0(&self) -> REP0_R { - REP0_R::new(((self.bits >> 3) & 1) != 0) + pub fn rep0(&self) -> Rep0R { + Rep0R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Repeat Counter 1 Interrupt Enable"] #[inline(always)] - pub fn rep1(&self) -> REP1_R { - REP1_R::new(((self.bits >> 4) & 1) != 0) + pub fn rep1(&self) -> Rep1R { + Rep1R::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - Compare Match 0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn comp0(&mut self) -> COMP0_W<0> { - COMP0_W::new(self) + pub fn comp0(&mut self) -> Comp0W { + Comp0W::new(self, 0) } #[doc = "Bit 1 - Compare Match 1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn comp1(&mut self) -> COMP1_W<1> { - COMP1_W::new(self) + pub fn comp1(&mut self) -> Comp1W { + Comp1W::new(self, 1) } #[doc = "Bit 2 - Underflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<2> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 2) } #[doc = "Bit 3 - Repeat Counter 0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rep0(&mut self) -> REP0_W<3> { - REP0_W::new(self) + pub fn rep0(&mut self) -> Rep0W { + Rep0W::new(self, 3) } #[doc = "Bit 4 - Repeat Counter 1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rep1(&mut self) -> REP1_W<4> { - REP1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rep1(&mut self) -> Rep1W { + Rep1W::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/if_.rs index 2ad0ae3..c8f1836 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/if_.rs @@ -1,140 +1,100 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `COMP0` reader - Compare Match 0 Interrupt Flag"] -pub type COMP0_R = crate::BitReader; +pub type Comp0R = crate::BitReader; #[doc = "Field `COMP0` writer - Compare Match 0 Interrupt Flag"] -pub type COMP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Comp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `COMP1` reader - Compare Match 1 Interrupt Flag"] -pub type COMP1_R = crate::BitReader; +pub type Comp1R = crate::BitReader; #[doc = "Field `COMP1` writer - Compare Match 1 Interrupt Flag"] -pub type COMP1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Comp1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UF` reader - Underflow Interrupt Flag"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Flag"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REP0` reader - Repeat Counter 0 Interrupt Flag"] -pub type REP0_R = crate::BitReader; +pub type Rep0R = crate::BitReader; #[doc = "Field `REP0` writer - Repeat Counter 0 Interrupt Flag"] -pub type REP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Rep0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `REP1` reader - Repeat Counter 1 Interrupt Flag"] -pub type REP1_R = crate::BitReader; +pub type Rep1R = crate::BitReader; #[doc = "Field `REP1` writer - Repeat Counter 1 Interrupt Flag"] -pub type REP1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Rep1W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Compare Match 0 Interrupt Flag"] #[inline(always)] - pub fn comp0(&self) -> COMP0_R { - COMP0_R::new((self.bits & 1) != 0) + pub fn comp0(&self) -> Comp0R { + Comp0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Compare Match 1 Interrupt Flag"] #[inline(always)] - pub fn comp1(&self) -> COMP1_R { - COMP1_R::new(((self.bits >> 1) & 1) != 0) + pub fn comp1(&self) -> Comp1R { + Comp1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Underflow Interrupt Flag"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new(((self.bits >> 2) & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Repeat Counter 0 Interrupt Flag"] #[inline(always)] - pub fn rep0(&self) -> REP0_R { - REP0_R::new(((self.bits >> 3) & 1) != 0) + pub fn rep0(&self) -> Rep0R { + Rep0R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Repeat Counter 1 Interrupt Flag"] #[inline(always)] - pub fn rep1(&self) -> REP1_R { - REP1_R::new(((self.bits >> 4) & 1) != 0) + pub fn rep1(&self) -> Rep1R { + Rep1R::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - Compare Match 0 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn comp0(&mut self) -> COMP0_W<0> { - COMP0_W::new(self) + pub fn comp0(&mut self) -> Comp0W { + Comp0W::new(self, 0) } #[doc = "Bit 1 - Compare Match 1 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn comp1(&mut self) -> COMP1_W<1> { - COMP1_W::new(self) + pub fn comp1(&mut self) -> Comp1W { + Comp1W::new(self, 1) } #[doc = "Bit 2 - Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<2> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 2) } #[doc = "Bit 3 - Repeat Counter 0 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rep0(&mut self) -> REP0_W<3> { - REP0_W::new(self) + pub fn rep0(&mut self) -> Rep0W { + Rep0W::new(self, 3) } #[doc = "Bit 4 - Repeat Counter 1 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rep1(&mut self) -> REP1_W<4> { - REP1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rep1(&mut self) -> Rep1W { + Rep1W::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/ipversion.rs index ad2c166..23b42d5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/lock.rs index be5a7f1..01f4312 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Configuration Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LETIMERLOCKKEY_AW { +pub enum Letimerlockkey { #[doc = "52476: Write to unock LETIMER lockable registers"] - UNLOCK = 52476, + Unlock = 52476, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LETIMERLOCKKEY_AW) -> Self { + fn from(variant: Letimerlockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Letimerlockkey { + type Ux = u16; +} +impl crate::IsEnum for Letimerlockkey {} #[doc = "Field `LETIMERLOCKKEY` writer - Configuration Lock Key"] -pub type LETIMERLOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LETIMERLOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LETIMERLOCKKEY_W<'a, O> { +pub type LetimerlockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Letimerlockkey>; +impl<'a, REG> LetimerlockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unock LETIMER lockable registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LETIMERLOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Letimerlockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Configuration Lock Key"] #[inline(always)] #[must_use] - pub fn letimerlockkey(&mut self) -> LETIMERLOCKKEY_W<0> { - LETIMERLOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn letimerlockkey(&mut self) -> LetimerlockkeyW { + LetimerlockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/prsmode.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/prsmode.rs index 6677a25..573ab46 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/prsmode.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/prsmode.rs @@ -1,335 +1,316 @@ #[doc = "Register `PRSMODE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PRSMODE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `PRSSTARTMODE` reader - PRS Start Mode"] -pub type PRSSTARTMODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "PRS Start Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PRSSTARTMODE_A { +pub enum Prsstartmode { #[doc = "0: PRS cannot start the LETIMER"] - NONE = 0, + None = 0, #[doc = "1: Rising edge of selected PRS input can start the LETIMER"] - RISING = 1, + Rising = 1, #[doc = "2: Falling edge of selected PRS input can start the LETIMER"] - FALLING = 2, + Falling = 2, #[doc = "3: Both the rising or falling edge of the selected PRS input can start the LETIMER"] - BOTH = 3, + Both = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PRSSTARTMODE_A) -> Self { + fn from(variant: Prsstartmode) -> Self { variant as _ } } -impl PRSSTARTMODE_R { +impl crate::FieldSpec for Prsstartmode { + type Ux = u8; +} +impl crate::IsEnum for Prsstartmode {} +#[doc = "Field `PRSSTARTMODE` reader - PRS Start Mode"] +pub type PrsstartmodeR = crate::FieldReader; +impl PrsstartmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSSTARTMODE_A { + pub const fn variant(&self) -> Prsstartmode { match self.bits { - 0 => PRSSTARTMODE_A::NONE, - 1 => PRSSTARTMODE_A::RISING, - 2 => PRSSTARTMODE_A::FALLING, - 3 => PRSSTARTMODE_A::BOTH, + 0 => Prsstartmode::None, + 1 => Prsstartmode::Rising, + 2 => Prsstartmode::Falling, + 3 => Prsstartmode::Both, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "PRS cannot start the LETIMER"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == PRSSTARTMODE_A::NONE + *self == Prsstartmode::None } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edge of selected PRS input can start the LETIMER"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == PRSSTARTMODE_A::RISING + *self == Prsstartmode::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edge of selected PRS input can start the LETIMER"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == PRSSTARTMODE_A::FALLING + *self == Prsstartmode::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both the rising or falling edge of the selected PRS input can start the LETIMER"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == PRSSTARTMODE_A::BOTH + *self == Prsstartmode::Both } } #[doc = "Field `PRSSTARTMODE` writer - PRS Start Mode"] -pub type PRSSTARTMODE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PRSMODE_SPEC, u8, PRSSTARTMODE_A, 2, O>; -impl<'a, const O: u8> PRSSTARTMODE_W<'a, O> { +pub type PrsstartmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Prsstartmode, crate::Safe>; +impl<'a, REG> PrsstartmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS cannot start the LETIMER"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(PRSSTARTMODE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Prsstartmode::None) } #[doc = "Rising edge of selected PRS input can start the LETIMER"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(PRSSTARTMODE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Prsstartmode::Rising) } #[doc = "Falling edge of selected PRS input can start the LETIMER"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(PRSSTARTMODE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Prsstartmode::Falling) } #[doc = "Both the rising or falling edge of the selected PRS input can start the LETIMER"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(PRSSTARTMODE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Prsstartmode::Both) } } -#[doc = "Field `PRSSTOPMODE` reader - PRS Stop Mode"] -pub type PRSSTOPMODE_R = crate::FieldReader; #[doc = "PRS Stop Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PRSSTOPMODE_A { +pub enum Prsstopmode { #[doc = "0: PRS cannot stop the LETIMER"] - NONE = 0, + None = 0, #[doc = "1: Rising edge of selected PRS input can stop the LETIMER"] - RISING = 1, + Rising = 1, #[doc = "2: Falling edge of selected PRS input can stop the LETIMER"] - FALLING = 2, + Falling = 2, #[doc = "3: Both the rising or falling edge of the selected PRS input can stop the LETIMER"] - BOTH = 3, + Both = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PRSSTOPMODE_A) -> Self { + fn from(variant: Prsstopmode) -> Self { variant as _ } } -impl PRSSTOPMODE_R { +impl crate::FieldSpec for Prsstopmode { + type Ux = u8; +} +impl crate::IsEnum for Prsstopmode {} +#[doc = "Field `PRSSTOPMODE` reader - PRS Stop Mode"] +pub type PrsstopmodeR = crate::FieldReader; +impl PrsstopmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSSTOPMODE_A { + pub const fn variant(&self) -> Prsstopmode { match self.bits { - 0 => PRSSTOPMODE_A::NONE, - 1 => PRSSTOPMODE_A::RISING, - 2 => PRSSTOPMODE_A::FALLING, - 3 => PRSSTOPMODE_A::BOTH, + 0 => Prsstopmode::None, + 1 => Prsstopmode::Rising, + 2 => Prsstopmode::Falling, + 3 => Prsstopmode::Both, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "PRS cannot stop the LETIMER"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == PRSSTOPMODE_A::NONE + *self == Prsstopmode::None } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edge of selected PRS input can stop the LETIMER"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == PRSSTOPMODE_A::RISING + *self == Prsstopmode::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edge of selected PRS input can stop the LETIMER"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == PRSSTOPMODE_A::FALLING + *self == Prsstopmode::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both the rising or falling edge of the selected PRS input can stop the LETIMER"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == PRSSTOPMODE_A::BOTH + *self == Prsstopmode::Both } } #[doc = "Field `PRSSTOPMODE` writer - PRS Stop Mode"] -pub type PRSSTOPMODE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PRSMODE_SPEC, u8, PRSSTOPMODE_A, 2, O>; -impl<'a, const O: u8> PRSSTOPMODE_W<'a, O> { +pub type PrsstopmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Prsstopmode, crate::Safe>; +impl<'a, REG> PrsstopmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS cannot stop the LETIMER"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(PRSSTOPMODE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Prsstopmode::None) } #[doc = "Rising edge of selected PRS input can stop the LETIMER"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(PRSSTOPMODE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Prsstopmode::Rising) } #[doc = "Falling edge of selected PRS input can stop the LETIMER"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(PRSSTOPMODE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Prsstopmode::Falling) } #[doc = "Both the rising or falling edge of the selected PRS input can stop the LETIMER"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(PRSSTOPMODE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Prsstopmode::Both) } } -#[doc = "Field `PRSCLEARMODE` reader - PRS Clear Mode"] -pub type PRSCLEARMODE_R = crate::FieldReader; #[doc = "PRS Clear Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PRSCLEARMODE_A { +pub enum Prsclearmode { #[doc = "0: PRS cannot clear the LETIMER"] - NONE = 0, + None = 0, #[doc = "1: Rising edge of selected PRS input can clear the LETIMER"] - RISING = 1, + Rising = 1, #[doc = "2: Falling edge of selected PRS input can clear the LETIMER"] - FALLING = 2, + Falling = 2, #[doc = "3: Both the rising or falling edge of the selected PRS input can clear the LETIMER"] - BOTH = 3, + Both = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PRSCLEARMODE_A) -> Self { + fn from(variant: Prsclearmode) -> Self { variant as _ } } -impl PRSCLEARMODE_R { +impl crate::FieldSpec for Prsclearmode { + type Ux = u8; +} +impl crate::IsEnum for Prsclearmode {} +#[doc = "Field `PRSCLEARMODE` reader - PRS Clear Mode"] +pub type PrsclearmodeR = crate::FieldReader; +impl PrsclearmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCLEARMODE_A { + pub const fn variant(&self) -> Prsclearmode { match self.bits { - 0 => PRSCLEARMODE_A::NONE, - 1 => PRSCLEARMODE_A::RISING, - 2 => PRSCLEARMODE_A::FALLING, - 3 => PRSCLEARMODE_A::BOTH, + 0 => Prsclearmode::None, + 1 => Prsclearmode::Rising, + 2 => Prsclearmode::Falling, + 3 => Prsclearmode::Both, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "PRS cannot clear the LETIMER"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == PRSCLEARMODE_A::NONE + *self == Prsclearmode::None } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edge of selected PRS input can clear the LETIMER"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == PRSCLEARMODE_A::RISING + *self == Prsclearmode::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edge of selected PRS input can clear the LETIMER"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == PRSCLEARMODE_A::FALLING + *self == Prsclearmode::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both the rising or falling edge of the selected PRS input can clear the LETIMER"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == PRSCLEARMODE_A::BOTH + *self == Prsclearmode::Both } } #[doc = "Field `PRSCLEARMODE` writer - PRS Clear Mode"] -pub type PRSCLEARMODE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, PRSMODE_SPEC, u8, PRSCLEARMODE_A, 2, O>; -impl<'a, const O: u8> PRSCLEARMODE_W<'a, O> { +pub type PrsclearmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Prsclearmode, crate::Safe>; +impl<'a, REG> PrsclearmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS cannot clear the LETIMER"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(PRSCLEARMODE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Prsclearmode::None) } #[doc = "Rising edge of selected PRS input can clear the LETIMER"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(PRSCLEARMODE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Prsclearmode::Rising) } #[doc = "Falling edge of selected PRS input can clear the LETIMER"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(PRSCLEARMODE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Prsclearmode::Falling) } #[doc = "Both the rising or falling edge of the selected PRS input can clear the LETIMER"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(PRSCLEARMODE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Prsclearmode::Both) } } impl R { #[doc = "Bits 18:19 - PRS Start Mode"] #[inline(always)] - pub fn prsstartmode(&self) -> PRSSTARTMODE_R { - PRSSTARTMODE_R::new(((self.bits >> 18) & 3) as u8) + pub fn prsstartmode(&self) -> PrsstartmodeR { + PrsstartmodeR::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 22:23 - PRS Stop Mode"] #[inline(always)] - pub fn prsstopmode(&self) -> PRSSTOPMODE_R { - PRSSTOPMODE_R::new(((self.bits >> 22) & 3) as u8) + pub fn prsstopmode(&self) -> PrsstopmodeR { + PrsstopmodeR::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 26:27 - PRS Clear Mode"] #[inline(always)] - pub fn prsclearmode(&self) -> PRSCLEARMODE_R { - PRSCLEARMODE_R::new(((self.bits >> 26) & 3) as u8) + pub fn prsclearmode(&self) -> PrsclearmodeR { + PrsclearmodeR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bits 18:19 - PRS Start Mode"] #[inline(always)] #[must_use] - pub fn prsstartmode(&mut self) -> PRSSTARTMODE_W<18> { - PRSSTARTMODE_W::new(self) + pub fn prsstartmode(&mut self) -> PrsstartmodeW { + PrsstartmodeW::new(self, 18) } #[doc = "Bits 22:23 - PRS Stop Mode"] #[inline(always)] #[must_use] - pub fn prsstopmode(&mut self) -> PRSSTOPMODE_W<22> { - PRSSTOPMODE_W::new(self) + pub fn prsstopmode(&mut self) -> PrsstopmodeW { + PrsstopmodeW::new(self, 22) } #[doc = "Bits 26:27 - PRS Clear Mode"] #[inline(always)] #[must_use] - pub fn prsclearmode(&mut self) -> PRSCLEARMODE_W<26> { - PRSCLEARMODE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prsclearmode(&mut self) -> PrsclearmodeW { + PrsclearmodeW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prsmode](index.html) module"] -pub struct PRSMODE_SPEC; -impl crate::RegisterSpec for PRSMODE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`prsmode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prsmode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PrsmodeSpec; +impl crate::RegisterSpec for PrsmodeSpec { type Ux = u32; } -#[doc = "`read()` method returns [prsmode::R](R) reader structure"] -impl crate::Readable for PRSMODE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [prsmode::W](W) writer structure"] -impl crate::Writable for PRSMODE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`prsmode::R`](R) reader structure"] +impl crate::Readable for PrsmodeSpec {} +#[doc = "`write(|w| ..)` method takes [`prsmode::W`](W) writer structure"] +impl crate::Writable for PrsmodeSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRSMODE to value 0"] -impl crate::Resettable for PRSMODE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PrsmodeSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/rep0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/rep0.rs index 10af491..f44eda0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/rep0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/rep0.rs @@ -1,80 +1,40 @@ #[doc = "Register `REP0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `REP0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `REP0` reader - Repeat Counter 0"] -pub type REP0_R = crate::FieldReader; +pub type Rep0R = crate::FieldReader; #[doc = "Field `REP0` writer - Repeat Counter 0"] -pub type REP0_W<'a, const O: u8> = crate::FieldWriter<'a, u32, REP0_SPEC, u8, u8, 8, O>; +pub type Rep0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Repeat Counter 0"] #[inline(always)] - pub fn rep0(&self) -> REP0_R { - REP0_R::new((self.bits & 0xff) as u8) + pub fn rep0(&self) -> Rep0R { + Rep0R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Repeat Counter 0"] #[inline(always)] #[must_use] - pub fn rep0(&mut self) -> REP0_W<0> { - REP0_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rep0(&mut self) -> Rep0W { + Rep0W::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rep0](index.html) module"] -pub struct REP0_SPEC; -impl crate::RegisterSpec for REP0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rep0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rep0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Rep0Spec; +impl crate::RegisterSpec for Rep0Spec { type Ux = u32; } -#[doc = "`read()` method returns [rep0::R](R) reader structure"] -impl crate::Readable for REP0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rep0::W](W) writer structure"] -impl crate::Writable for REP0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`rep0::R`](R) reader structure"] +impl crate::Readable for Rep0Spec {} +#[doc = "`write(|w| ..)` method takes [`rep0::W`](W) writer structure"] +impl crate::Writable for Rep0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets REP0 to value 0"] -impl crate::Resettable for REP0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Rep0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/rep1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/rep1.rs index 1b95f75..4a28c2b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/rep1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/rep1.rs @@ -1,80 +1,40 @@ #[doc = "Register `REP1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `REP1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `REP1` reader - Repeat Counter 1"] -pub type REP1_R = crate::FieldReader; +pub type Rep1R = crate::FieldReader; #[doc = "Field `REP1` writer - Repeat Counter 1"] -pub type REP1_W<'a, const O: u8> = crate::FieldWriter<'a, u32, REP1_SPEC, u8, u8, 8, O>; +pub type Rep1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Repeat Counter 1"] #[inline(always)] - pub fn rep1(&self) -> REP1_R { - REP1_R::new((self.bits & 0xff) as u8) + pub fn rep1(&self) -> Rep1R { + Rep1R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Repeat Counter 1"] #[inline(always)] #[must_use] - pub fn rep1(&mut self) -> REP1_W<0> { - REP1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rep1(&mut self) -> Rep1W { + Rep1W::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rep1](index.html) module"] -pub struct REP1_SPEC; -impl crate::RegisterSpec for REP1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rep1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rep1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Rep1Spec; +impl crate::RegisterSpec for Rep1Spec { type Ux = u32; } -#[doc = "`read()` method returns [rep1::R](R) reader structure"] -impl crate::Readable for REP1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rep1::W](W) writer structure"] -impl crate::Writable for REP1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`rep1::R`](R) reader structure"] +impl crate::Readable for Rep1Spec {} +#[doc = "`write(|w| ..)` method takes [`rep1::W`](W) writer structure"] +impl crate::Writable for Rep1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets REP1 to value 0"] -impl crate::Resettable for REP1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Rep1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/status.rs index dd1a87f..658b025 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/status.rs @@ -1,78 +1,63 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RUNNING` reader - LETIMER Running"] -pub type RUNNING_R = crate::BitReader; -#[doc = "Field `LETIMERLOCKSTATUS` reader - LETIMER Lock Status"] -pub type LETIMERLOCKSTATUS_R = crate::BitReader; +pub type RunningR = crate::BitReader; #[doc = "LETIMER Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LETIMERLOCKSTATUS_A { +pub enum Letimerlockstatus { #[doc = "0: LETIMER registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: LETIMER registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LETIMERLOCKSTATUS_A) -> Self { + fn from(variant: Letimerlockstatus) -> Self { variant as u8 != 0 } } -impl LETIMERLOCKSTATUS_R { +#[doc = "Field `LETIMERLOCKSTATUS` reader - LETIMER Lock Status"] +pub type LetimerlockstatusR = crate::BitReader; +impl LetimerlockstatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LETIMERLOCKSTATUS_A { + pub const fn variant(&self) -> Letimerlockstatus { match self.bits { - false => LETIMERLOCKSTATUS_A::UNLOCKED, - true => LETIMERLOCKSTATUS_A::LOCKED, + false => Letimerlockstatus::Unlocked, + true => Letimerlockstatus::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "LETIMER registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LETIMERLOCKSTATUS_A::UNLOCKED + *self == Letimerlockstatus::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "LETIMER registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LETIMERLOCKSTATUS_A::LOCKED + *self == Letimerlockstatus::Locked } } impl R { #[doc = "Bit 0 - LETIMER Running"] #[inline(always)] - pub fn running(&self) -> RUNNING_R { - RUNNING_R::new((self.bits & 1) != 0) + pub fn running(&self) -> RunningR { + RunningR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - LETIMER Lock Status"] #[inline(always)] - pub fn letimerlockstatus(&self) -> LETIMERLOCKSTATUS_R { - LETIMERLOCKSTATUS_R::new(((self.bits >> 1) & 1) != 0) + pub fn letimerlockstatus(&self) -> LetimerlockstatusR { + LetimerlockstatusR::new(((self.bits >> 1) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/swrst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/swrst.rs index afd978e..804eaff 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/swrst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/swrst.rs @@ -1,80 +1,40 @@ #[doc = "Register `SWRST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SWRST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SWRST` writer - Software reset command"] -pub type SWRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, SWRST_SPEC, bool, O>; +pub type SwrstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESETTING` reader - Software reset busy status"] -pub type RESETTING_R = crate::BitReader; +pub type ResettingR = crate::BitReader; impl R { #[doc = "Bit 1 - Software reset busy status"] #[inline(always)] - pub fn resetting(&self) -> RESETTING_R { - RESETTING_R::new(((self.bits >> 1) & 1) != 0) + pub fn resetting(&self) -> ResettingR { + ResettingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Software reset command"] #[inline(always)] #[must_use] - pub fn swrst(&mut self) -> SWRST_W<0> { - SWRST_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn swrst(&mut self) -> SwrstW { + SwrstW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swrst](index.html) module"] -pub struct SWRST_SPEC; -impl crate::RegisterSpec for SWRST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SwrstSpec; +impl crate::RegisterSpec for SwrstSpec { type Ux = u32; } -#[doc = "`read()` method returns [swrst::R](R) reader structure"] -impl crate::Readable for SWRST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [swrst::W](W) writer structure"] -impl crate::Writable for SWRST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`swrst::R`](R) reader structure"] +impl crate::Readable for SwrstSpec {} +#[doc = "`write(|w| ..)` method takes [`swrst::W`](W) writer structure"] +impl crate::Writable for SwrstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWRST to value 0"] -impl crate::Resettable for SWRST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SwrstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/syncbusy.rs index 545fa37..bf1aa49 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/syncbusy.rs @@ -1,93 +1,78 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CNT` reader - Sync busy for CNT"] -pub type CNT_R = crate::BitReader; +pub type CntR = crate::BitReader; #[doc = "Field `TOP` reader - Sync busy for TOP"] -pub type TOP_R = crate::BitReader; +pub type TopR = crate::BitReader; #[doc = "Field `REP0` reader - Sync busy for REP0"] -pub type REP0_R = crate::BitReader; +pub type Rep0R = crate::BitReader; #[doc = "Field `REP1` reader - Sync busy for REP1"] -pub type REP1_R = crate::BitReader; +pub type Rep1R = crate::BitReader; #[doc = "Field `START` reader - Sync busy for START"] -pub type START_R = crate::BitReader; +pub type StartR = crate::BitReader; #[doc = "Field `STOP` reader - Sync busy for STOP"] -pub type STOP_R = crate::BitReader; +pub type StopR = crate::BitReader; #[doc = "Field `CLEAR` reader - Sync busy for CLEAR"] -pub type CLEAR_R = crate::BitReader; +pub type ClearR = crate::BitReader; #[doc = "Field `CTO0` reader - Sync busy for CTO0"] -pub type CTO0_R = crate::BitReader; +pub type Cto0R = crate::BitReader; #[doc = "Field `CTO1` reader - Sync busy for CTO1"] -pub type CTO1_R = crate::BitReader; +pub type Cto1R = crate::BitReader; impl R { #[doc = "Bit 0 - Sync busy for CNT"] #[inline(always)] - pub fn cnt(&self) -> CNT_R { - CNT_R::new((self.bits & 1) != 0) + pub fn cnt(&self) -> CntR { + CntR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - Sync busy for TOP"] #[inline(always)] - pub fn top(&self) -> TOP_R { - TOP_R::new(((self.bits >> 2) & 1) != 0) + pub fn top(&self) -> TopR { + TopR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Sync busy for REP0"] #[inline(always)] - pub fn rep0(&self) -> REP0_R { - REP0_R::new(((self.bits >> 3) & 1) != 0) + pub fn rep0(&self) -> Rep0R { + Rep0R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Sync busy for REP1"] #[inline(always)] - pub fn rep1(&self) -> REP1_R { - REP1_R::new(((self.bits >> 4) & 1) != 0) + pub fn rep1(&self) -> Rep1R { + Rep1R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Sync busy for START"] #[inline(always)] - pub fn start(&self) -> START_R { - START_R::new(((self.bits >> 5) & 1) != 0) + pub fn start(&self) -> StartR { + StartR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Sync busy for STOP"] #[inline(always)] - pub fn stop(&self) -> STOP_R { - STOP_R::new(((self.bits >> 6) & 1) != 0) + pub fn stop(&self) -> StopR { + StopR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Sync busy for CLEAR"] #[inline(always)] - pub fn clear(&self) -> CLEAR_R { - CLEAR_R::new(((self.bits >> 7) & 1) != 0) + pub fn clear(&self) -> ClearR { + ClearR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Sync busy for CTO0"] #[inline(always)] - pub fn cto0(&self) -> CTO0_R { - CTO0_R::new(((self.bits >> 8) & 1) != 0) + pub fn cto0(&self) -> Cto0R { + Cto0R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Sync busy for CTO1"] #[inline(always)] - pub fn cto1(&self) -> CTO1_R { - CTO1_R::new(((self.bits >> 9) & 1) != 0) + pub fn cto1(&self) -> Cto1R { + Cto1R::new(((self.bits >> 9) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/top.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/top.rs index f973df4..7fde1f1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/top.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/top.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOP` reader - Counter TOP Value"] -pub type TOP_R = crate::FieldReader; +pub type TopR = crate::FieldReader; #[doc = "Field `TOP` writer - Counter TOP Value"] -pub type TOP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOP_SPEC, u32, u32, 24, O>; +pub type TopW<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>; impl R { #[doc = "Bits 0:23 - Counter TOP Value"] #[inline(always)] - pub fn top(&self) -> TOP_R { - TOP_R::new(self.bits & 0x00ff_ffff) + pub fn top(&self) -> TopR { + TopR::new(self.bits & 0x00ff_ffff) } } impl W { #[doc = "Bits 0:23 - Counter TOP Value"] #[inline(always)] #[must_use] - pub fn top(&mut self) -> TOP_W<0> { - TOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn top(&mut self) -> TopW { + TopW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [top](index.html) module"] -pub struct TOP_SPEC; -impl crate::RegisterSpec for TOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopSpec; +impl crate::RegisterSpec for TopSpec { type Ux = u32; } -#[doc = "`read()` method returns [top::R](R) reader structure"] -impl crate::Readable for TOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [top::W](W) writer structure"] -impl crate::Writable for TOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`top::R`](R) reader structure"] +impl crate::Readable for TopSpec {} +#[doc = "`write(|w| ..)` method takes [`top::W`](W) writer structure"] +impl crate::Writable for TopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOP to value 0"] -impl crate::Resettable for TOP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TopSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/topbuff.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/topbuff.rs index e667675..6a3c5f9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/topbuff.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/letimer0_s/topbuff.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOPBUFF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOPBUFF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOPBUFF` reader - Buffered Counter TOP Value"] -pub type TOPBUFF_R = crate::FieldReader; +pub type TopbuffR = crate::FieldReader; #[doc = "Field `TOPBUFF` writer - Buffered Counter TOP Value"] -pub type TOPBUFF_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOPBUFF_SPEC, u32, u32, 24, O>; +pub type TopbuffW<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>; impl R { #[doc = "Bits 0:23 - Buffered Counter TOP Value"] #[inline(always)] - pub fn topbuff(&self) -> TOPBUFF_R { - TOPBUFF_R::new(self.bits & 0x00ff_ffff) + pub fn topbuff(&self) -> TopbuffR { + TopbuffR::new(self.bits & 0x00ff_ffff) } } impl W { #[doc = "Bits 0:23 - Buffered Counter TOP Value"] #[inline(always)] #[must_use] - pub fn topbuff(&mut self) -> TOPBUFF_W<0> { - TOPBUFF_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn topbuff(&mut self) -> TopbuffW { + TopbuffW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [topbuff](index.html) module"] -pub struct TOPBUFF_SPEC; -impl crate::RegisterSpec for TOPBUFF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topbuff::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topbuff::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopbuffSpec; +impl crate::RegisterSpec for TopbuffSpec { type Ux = u32; } -#[doc = "`read()` method returns [topbuff::R](R) reader structure"] -impl crate::Readable for TOPBUFF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [topbuff::W](W) writer structure"] -impl crate::Writable for TOPBUFF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`topbuff::R`](R) reader structure"] +impl crate::Readable for TopbuffSpec {} +#[doc = "`write(|w| ..)` method takes [`topbuff::W`](W) writer structure"] +impl crate::Writable for TopbuffSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOPBUFF to value 0"] -impl crate::Resettable for TOPBUFF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TopbuffSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns.rs index d68e719..9fe39c6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns.rs @@ -1,48 +1,92 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - Contains the LFRCO ip version."] - pub ipversion: IPVERSION, + ipversion: Ipversion, _reserved1: [u8; 0x04], + status: Status, + cal: Cal, + _reserved3: [u8; 0x04], + if_: If, + ien: Ien, + syncbusy: Syncbusy, + lock: Lock, +} +impl RegisterBlock { + #[doc = "0x00 - Contains the LFRCO ip version."] + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x08 - Status register"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x0c - Calibration register"] - pub cal: CAL, - _reserved3: [u8; 0x04], + #[inline(always)] + pub const fn cal(&self) -> &Cal { + &self.cal + } #[doc = "0x14 - Interrupt flag register"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x18 - Interrupt enable register."] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x1c - Synchronization busy register"] - pub syncbusy: SYNCBUSY, + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } #[doc = "0x20 - Configuration lock register. Locks/unlocks access to cofiguration registers."] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: Contains the LFRCO ip version.\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "Contains the LFRCO ip version."] pub mod ipversion; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: Status register\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "Status register"] pub mod status; -#[doc = "CAL (rw) register accessor: an alias for `Reg`"] -pub type CAL = crate::Reg; +#[doc = "CAL (rw) register accessor: Calibration register\n\nYou can [`read`](crate::Reg::read) this register and get [`cal::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cal::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cal`] +module"] +#[doc(alias = "CAL")] +pub type Cal = crate::Reg; #[doc = "Calibration register"] pub mod cal; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: Interrupt flag register\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "Interrupt flag register"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: Interrupt enable register.\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "Interrupt enable register."] pub mod ien; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: Synchronization busy register\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "Synchronization busy register"] pub mod syncbusy; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: Configuration lock register. Locks/unlocks access to cofiguration registers.\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "Configuration lock register. Locks/unlocks access to cofiguration registers."] pub mod lock; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/cal.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/cal.rs index 544f0a9..a95972d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/cal.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/cal.rs @@ -1,80 +1,40 @@ #[doc = "Register `CAL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CAL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `FREQTRIM` reader - Frequency Trim"] -pub type FREQTRIM_R = crate::FieldReader; +pub type FreqtrimR = crate::FieldReader; #[doc = "Field `FREQTRIM` writer - Frequency Trim"] -pub type FREQTRIM_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 8, O>; +pub type FreqtrimW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Frequency Trim"] #[inline(always)] - pub fn freqtrim(&self) -> FREQTRIM_R { - FREQTRIM_R::new((self.bits & 0xff) as u8) + pub fn freqtrim(&self) -> FreqtrimR { + FreqtrimR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Frequency Trim"] #[inline(always)] #[must_use] - pub fn freqtrim(&mut self) -> FREQTRIM_W<0> { - FREQTRIM_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn freqtrim(&mut self) -> FreqtrimW { + FreqtrimW::new(self, 0) } } -#[doc = "Calibration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cal](index.html) module"] -pub struct CAL_SPEC; -impl crate::RegisterSpec for CAL_SPEC { +#[doc = "Calibration register\n\nYou can [`read`](crate::Reg::read) this register and get [`cal::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cal::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CalSpec; +impl crate::RegisterSpec for CalSpec { type Ux = u32; } -#[doc = "`read()` method returns [cal::R](R) reader structure"] -impl crate::Readable for CAL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cal::W](W) writer structure"] -impl crate::Writable for CAL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cal::R`](R) reader structure"] +impl crate::Readable for CalSpec {} +#[doc = "`write(|w| ..)` method takes [`cal::W`](W) writer structure"] +impl crate::Writable for CalSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CAL to value 0xa5"] -impl crate::Resettable for CAL_SPEC { - const RESET_VALUE: Self::Ux = 0xa5; +impl crate::Resettable for CalSpec { + const RESET_VALUE: u32 = 0xa5; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/ien.rs index f1b0a6c..adbd9ce 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/ien.rs @@ -1,110 +1,70 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RDY` reader - Ready Interrupt Enable"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `RDY` writer - Ready Interrupt Enable"] -pub type RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POSEDGE` reader - Rising Edge Interrupt Enable"] -pub type POSEDGE_R = crate::BitReader; +pub type PosedgeR = crate::BitReader; #[doc = "Field `POSEDGE` writer - Rising Edge Interrupt Enable"] -pub type POSEDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PosedgeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NEGEDGE` reader - Falling Edge Interrupt Enable"] -pub type NEGEDGE_R = crate::BitReader; +pub type NegedgeR = crate::BitReader; #[doc = "Field `NEGEDGE` writer - Falling Edge Interrupt Enable"] -pub type NEGEDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type NegedgeW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Ready Interrupt Enable"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Rising Edge Interrupt Enable"] #[inline(always)] - pub fn posedge(&self) -> POSEDGE_R { - POSEDGE_R::new(((self.bits >> 1) & 1) != 0) + pub fn posedge(&self) -> PosedgeR { + PosedgeR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Falling Edge Interrupt Enable"] #[inline(always)] - pub fn negedge(&self) -> NEGEDGE_R { - NEGEDGE_R::new(((self.bits >> 2) & 1) != 0) + pub fn negedge(&self) -> NegedgeR { + NegedgeR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Ready Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rdy(&mut self) -> RDY_W<0> { - RDY_W::new(self) + pub fn rdy(&mut self) -> RdyW { + RdyW::new(self, 0) } #[doc = "Bit 1 - Rising Edge Interrupt Enable"] #[inline(always)] #[must_use] - pub fn posedge(&mut self) -> POSEDGE_W<1> { - POSEDGE_W::new(self) + pub fn posedge(&mut self) -> PosedgeW { + PosedgeW::new(self, 1) } #[doc = "Bit 2 - Falling Edge Interrupt Enable"] #[inline(always)] #[must_use] - pub fn negedge(&mut self) -> NEGEDGE_W<2> { - NEGEDGE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn negedge(&mut self) -> NegedgeW { + NegedgeW::new(self, 2) } } -#[doc = "Interrupt enable register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "Interrupt enable register.\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/if_.rs index 547f2c1..6ee05bf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/if_.rs @@ -1,110 +1,70 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RDY` reader - Ready Interrupt Flag"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `RDY` writer - Ready Interrupt Flag"] -pub type RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POSEDGE` reader - Rising Edge Interrupt Flag"] -pub type POSEDGE_R = crate::BitReader; +pub type PosedgeR = crate::BitReader; #[doc = "Field `POSEDGE` writer - Rising Edge Interrupt Flag"] -pub type POSEDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PosedgeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NEGEDGE` reader - Falling Edge Interrupt Flag"] -pub type NEGEDGE_R = crate::BitReader; +pub type NegedgeR = crate::BitReader; #[doc = "Field `NEGEDGE` writer - Falling Edge Interrupt Flag"] -pub type NEGEDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type NegedgeW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Ready Interrupt Flag"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Rising Edge Interrupt Flag"] #[inline(always)] - pub fn posedge(&self) -> POSEDGE_R { - POSEDGE_R::new(((self.bits >> 1) & 1) != 0) + pub fn posedge(&self) -> PosedgeR { + PosedgeR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Falling Edge Interrupt Flag"] #[inline(always)] - pub fn negedge(&self) -> NEGEDGE_R { - NEGEDGE_R::new(((self.bits >> 2) & 1) != 0) + pub fn negedge(&self) -> NegedgeR { + NegedgeR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Ready Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rdy(&mut self) -> RDY_W<0> { - RDY_W::new(self) + pub fn rdy(&mut self) -> RdyW { + RdyW::new(self, 0) } #[doc = "Bit 1 - Rising Edge Interrupt Flag"] #[inline(always)] #[must_use] - pub fn posedge(&mut self) -> POSEDGE_W<1> { - POSEDGE_W::new(self) + pub fn posedge(&mut self) -> PosedgeW { + PosedgeW::new(self, 1) } #[doc = "Bit 2 - Falling Edge Interrupt Flag"] #[inline(always)] #[must_use] - pub fn negedge(&mut self) -> NEGEDGE_W<2> { - NEGEDGE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn negedge(&mut self) -> NegedgeW { + NegedgeW::new(self, 2) } } -#[doc = "Interrupt flag register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "Interrupt flag register\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/ipversion.rs index 8452b00..150b906 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "Contains the LFRCO ip version.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "Contains the LFRCO ip version.\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/lock.rs index ba0bc33..098ae07 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/lock.rs @@ -1,80 +1,62 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Lock Key\n\nValue on reset: 9731"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "0: Lock Configuration Registers"] - LOCK = 0, + Lock = 0, #[doc = "9731: Unlock Configuaration Registers"] - UNLOCK = 9731, + Unlock = 9731, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Lock Configuration Registers"] #[inline(always)] - pub fn lock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::LOCK) + pub fn lock(self) -> &'a mut crate::W { + self.variant(Lockkey::Lock) } #[doc = "Unlock Configuaration Registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "Configuration lock register. Locks/unlocks access to cofiguration registers.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "Configuration lock register. Locks/unlocks access to cofiguration registers.\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0x2603"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0x2603; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0x2603; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/status.rs index 2ad7f82..6abbf4d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/status.rs @@ -1,85 +1,70 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RDY` reader - Ready Status"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `ENS` reader - Enabled Status"] -pub type ENS_R = crate::BitReader; -#[doc = "Field `LOCK` reader - Lock Status"] -pub type LOCK_R = crate::BitReader; +pub type EnsR = crate::BitReader; #[doc = "Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCK_A { +pub enum Lock { #[doc = "0: Access to configuration registers not locked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: Access to configuration registers locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCK_A) -> Self { + fn from(variant: Lock) -> Self { variant as u8 != 0 } } -impl LOCK_R { +#[doc = "Field `LOCK` reader - Lock Status"] +pub type LockR = crate::BitReader; +impl LockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCK_A { + pub const fn variant(&self) -> Lock { match self.bits { - false => LOCK_A::UNLOCKED, - true => LOCK_A::LOCKED, + false => Lock::Unlocked, + true => Lock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "Access to configuration registers not locked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCK_A::UNLOCKED + *self == Lock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "Access to configuration registers locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCK_A::LOCKED + *self == Lock::Locked } } impl R { #[doc = "Bit 0 - Ready Status"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 16 - Enabled Status"] #[inline(always)] - pub fn ens(&self) -> ENS_R { - ENS_R::new(((self.bits >> 16) & 1) != 0) + pub fn ens(&self) -> EnsR { + EnsR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 31 - Lock Status"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new(((self.bits >> 31) & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "Status register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "Status register\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/syncbusy.rs index a475f6c..80a9429 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_ns/syncbusy.rs @@ -1,37 +1,22 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CAL` reader - CAL Busy"] -pub type CAL_R = crate::BitReader; +pub type CalR = crate::BitReader; impl R { #[doc = "Bit 0 - CAL Busy"] #[inline(always)] - pub fn cal(&self) -> CAL_R { - CAL_R::new((self.bits & 1) != 0) + pub fn cal(&self) -> CalR { + CalR::new((self.bits & 1) != 0) } } -#[doc = "Synchronization busy register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "Synchronization busy register\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s.rs index d68e719..9fe39c6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s.rs @@ -1,48 +1,92 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - Contains the LFRCO ip version."] - pub ipversion: IPVERSION, + ipversion: Ipversion, _reserved1: [u8; 0x04], + status: Status, + cal: Cal, + _reserved3: [u8; 0x04], + if_: If, + ien: Ien, + syncbusy: Syncbusy, + lock: Lock, +} +impl RegisterBlock { + #[doc = "0x00 - Contains the LFRCO ip version."] + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x08 - Status register"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x0c - Calibration register"] - pub cal: CAL, - _reserved3: [u8; 0x04], + #[inline(always)] + pub const fn cal(&self) -> &Cal { + &self.cal + } #[doc = "0x14 - Interrupt flag register"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x18 - Interrupt enable register."] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x1c - Synchronization busy register"] - pub syncbusy: SYNCBUSY, + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } #[doc = "0x20 - Configuration lock register. Locks/unlocks access to cofiguration registers."] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: Contains the LFRCO ip version.\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "Contains the LFRCO ip version."] pub mod ipversion; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: Status register\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "Status register"] pub mod status; -#[doc = "CAL (rw) register accessor: an alias for `Reg`"] -pub type CAL = crate::Reg; +#[doc = "CAL (rw) register accessor: Calibration register\n\nYou can [`read`](crate::Reg::read) this register and get [`cal::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cal::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cal`] +module"] +#[doc(alias = "CAL")] +pub type Cal = crate::Reg; #[doc = "Calibration register"] pub mod cal; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: Interrupt flag register\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "Interrupt flag register"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: Interrupt enable register.\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "Interrupt enable register."] pub mod ien; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: Synchronization busy register\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "Synchronization busy register"] pub mod syncbusy; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: Configuration lock register. Locks/unlocks access to cofiguration registers.\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "Configuration lock register. Locks/unlocks access to cofiguration registers."] pub mod lock; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/cal.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/cal.rs index 544f0a9..a95972d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/cal.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/cal.rs @@ -1,80 +1,40 @@ #[doc = "Register `CAL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CAL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `FREQTRIM` reader - Frequency Trim"] -pub type FREQTRIM_R = crate::FieldReader; +pub type FreqtrimR = crate::FieldReader; #[doc = "Field `FREQTRIM` writer - Frequency Trim"] -pub type FREQTRIM_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 8, O>; +pub type FreqtrimW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Frequency Trim"] #[inline(always)] - pub fn freqtrim(&self) -> FREQTRIM_R { - FREQTRIM_R::new((self.bits & 0xff) as u8) + pub fn freqtrim(&self) -> FreqtrimR { + FreqtrimR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Frequency Trim"] #[inline(always)] #[must_use] - pub fn freqtrim(&mut self) -> FREQTRIM_W<0> { - FREQTRIM_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn freqtrim(&mut self) -> FreqtrimW { + FreqtrimW::new(self, 0) } } -#[doc = "Calibration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cal](index.html) module"] -pub struct CAL_SPEC; -impl crate::RegisterSpec for CAL_SPEC { +#[doc = "Calibration register\n\nYou can [`read`](crate::Reg::read) this register and get [`cal::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cal::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CalSpec; +impl crate::RegisterSpec for CalSpec { type Ux = u32; } -#[doc = "`read()` method returns [cal::R](R) reader structure"] -impl crate::Readable for CAL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cal::W](W) writer structure"] -impl crate::Writable for CAL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cal::R`](R) reader structure"] +impl crate::Readable for CalSpec {} +#[doc = "`write(|w| ..)` method takes [`cal::W`](W) writer structure"] +impl crate::Writable for CalSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CAL to value 0xa5"] -impl crate::Resettable for CAL_SPEC { - const RESET_VALUE: Self::Ux = 0xa5; +impl crate::Resettable for CalSpec { + const RESET_VALUE: u32 = 0xa5; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/ien.rs index f1b0a6c..adbd9ce 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/ien.rs @@ -1,110 +1,70 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RDY` reader - Ready Interrupt Enable"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `RDY` writer - Ready Interrupt Enable"] -pub type RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POSEDGE` reader - Rising Edge Interrupt Enable"] -pub type POSEDGE_R = crate::BitReader; +pub type PosedgeR = crate::BitReader; #[doc = "Field `POSEDGE` writer - Rising Edge Interrupt Enable"] -pub type POSEDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PosedgeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NEGEDGE` reader - Falling Edge Interrupt Enable"] -pub type NEGEDGE_R = crate::BitReader; +pub type NegedgeR = crate::BitReader; #[doc = "Field `NEGEDGE` writer - Falling Edge Interrupt Enable"] -pub type NEGEDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type NegedgeW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Ready Interrupt Enable"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Rising Edge Interrupt Enable"] #[inline(always)] - pub fn posedge(&self) -> POSEDGE_R { - POSEDGE_R::new(((self.bits >> 1) & 1) != 0) + pub fn posedge(&self) -> PosedgeR { + PosedgeR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Falling Edge Interrupt Enable"] #[inline(always)] - pub fn negedge(&self) -> NEGEDGE_R { - NEGEDGE_R::new(((self.bits >> 2) & 1) != 0) + pub fn negedge(&self) -> NegedgeR { + NegedgeR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Ready Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rdy(&mut self) -> RDY_W<0> { - RDY_W::new(self) + pub fn rdy(&mut self) -> RdyW { + RdyW::new(self, 0) } #[doc = "Bit 1 - Rising Edge Interrupt Enable"] #[inline(always)] #[must_use] - pub fn posedge(&mut self) -> POSEDGE_W<1> { - POSEDGE_W::new(self) + pub fn posedge(&mut self) -> PosedgeW { + PosedgeW::new(self, 1) } #[doc = "Bit 2 - Falling Edge Interrupt Enable"] #[inline(always)] #[must_use] - pub fn negedge(&mut self) -> NEGEDGE_W<2> { - NEGEDGE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn negedge(&mut self) -> NegedgeW { + NegedgeW::new(self, 2) } } -#[doc = "Interrupt enable register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "Interrupt enable register.\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/if_.rs index 547f2c1..6ee05bf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/if_.rs @@ -1,110 +1,70 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RDY` reader - Ready Interrupt Flag"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `RDY` writer - Ready Interrupt Flag"] -pub type RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POSEDGE` reader - Rising Edge Interrupt Flag"] -pub type POSEDGE_R = crate::BitReader; +pub type PosedgeR = crate::BitReader; #[doc = "Field `POSEDGE` writer - Rising Edge Interrupt Flag"] -pub type POSEDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PosedgeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NEGEDGE` reader - Falling Edge Interrupt Flag"] -pub type NEGEDGE_R = crate::BitReader; +pub type NegedgeR = crate::BitReader; #[doc = "Field `NEGEDGE` writer - Falling Edge Interrupt Flag"] -pub type NEGEDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type NegedgeW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Ready Interrupt Flag"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Rising Edge Interrupt Flag"] #[inline(always)] - pub fn posedge(&self) -> POSEDGE_R { - POSEDGE_R::new(((self.bits >> 1) & 1) != 0) + pub fn posedge(&self) -> PosedgeR { + PosedgeR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Falling Edge Interrupt Flag"] #[inline(always)] - pub fn negedge(&self) -> NEGEDGE_R { - NEGEDGE_R::new(((self.bits >> 2) & 1) != 0) + pub fn negedge(&self) -> NegedgeR { + NegedgeR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Ready Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rdy(&mut self) -> RDY_W<0> { - RDY_W::new(self) + pub fn rdy(&mut self) -> RdyW { + RdyW::new(self, 0) } #[doc = "Bit 1 - Rising Edge Interrupt Flag"] #[inline(always)] #[must_use] - pub fn posedge(&mut self) -> POSEDGE_W<1> { - POSEDGE_W::new(self) + pub fn posedge(&mut self) -> PosedgeW { + PosedgeW::new(self, 1) } #[doc = "Bit 2 - Falling Edge Interrupt Flag"] #[inline(always)] #[must_use] - pub fn negedge(&mut self) -> NEGEDGE_W<2> { - NEGEDGE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn negedge(&mut self) -> NegedgeW { + NegedgeW::new(self, 2) } } -#[doc = "Interrupt flag register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "Interrupt flag register\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/ipversion.rs index 8452b00..150b906 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "Contains the LFRCO ip version.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "Contains the LFRCO ip version.\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/lock.rs index ba0bc33..098ae07 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/lock.rs @@ -1,80 +1,62 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Lock Key\n\nValue on reset: 9731"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "0: Lock Configuration Registers"] - LOCK = 0, + Lock = 0, #[doc = "9731: Unlock Configuaration Registers"] - UNLOCK = 9731, + Unlock = 9731, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Lock Configuration Registers"] #[inline(always)] - pub fn lock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::LOCK) + pub fn lock(self) -> &'a mut crate::W { + self.variant(Lockkey::Lock) } #[doc = "Unlock Configuaration Registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "Configuration lock register. Locks/unlocks access to cofiguration registers.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "Configuration lock register. Locks/unlocks access to cofiguration registers.\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0x2603"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0x2603; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0x2603; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/status.rs index 2ad7f82..6abbf4d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/status.rs @@ -1,85 +1,70 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RDY` reader - Ready Status"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `ENS` reader - Enabled Status"] -pub type ENS_R = crate::BitReader; -#[doc = "Field `LOCK` reader - Lock Status"] -pub type LOCK_R = crate::BitReader; +pub type EnsR = crate::BitReader; #[doc = "Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCK_A { +pub enum Lock { #[doc = "0: Access to configuration registers not locked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: Access to configuration registers locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCK_A) -> Self { + fn from(variant: Lock) -> Self { variant as u8 != 0 } } -impl LOCK_R { +#[doc = "Field `LOCK` reader - Lock Status"] +pub type LockR = crate::BitReader; +impl LockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCK_A { + pub const fn variant(&self) -> Lock { match self.bits { - false => LOCK_A::UNLOCKED, - true => LOCK_A::LOCKED, + false => Lock::Unlocked, + true => Lock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "Access to configuration registers not locked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCK_A::UNLOCKED + *self == Lock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "Access to configuration registers locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCK_A::LOCKED + *self == Lock::Locked } } impl R { #[doc = "Bit 0 - Ready Status"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 16 - Enabled Status"] #[inline(always)] - pub fn ens(&self) -> ENS_R { - ENS_R::new(((self.bits >> 16) & 1) != 0) + pub fn ens(&self) -> EnsR { + EnsR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 31 - Lock Status"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new(((self.bits >> 31) & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "Status register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "Status register\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/syncbusy.rs index a475f6c..80a9429 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfrco_s/syncbusy.rs @@ -1,37 +1,22 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CAL` reader - CAL Busy"] -pub type CAL_R = crate::BitReader; +pub type CalR = crate::BitReader; impl R { #[doc = "Bit 0 - CAL Busy"] #[inline(always)] - pub fn cal(&self) -> CAL_R { - CAL_R::new((self.bits & 1) != 0) + pub fn cal(&self) -> CalR { + CalR::new((self.bits & 1) != 0) } } -#[doc = "Synchronization busy register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "Synchronization busy register\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns.rs index 9e930c6..80e14b3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns.rs @@ -1,59 +1,115 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + ctrl: Ctrl, + cfg: Cfg, + _reserved3: [u8; 0x04], + status: Status, + cal: Cal, + if_: If, + ien: Ien, + syncbusy: Syncbusy, + lock: Lock, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x08 - Do not write to this register unless the oscillator is forced off. The oscillator is forced off if DISONDEMAND is set and FORCEEN is cleared."] - pub cfg: CFG, - _reserved3: [u8; 0x04], + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x10 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x14 - Do not write to this register unless CALBSY in SYNCBUSY register is low."] - pub cal: CAL, + #[inline(always)] + pub const fn cal(&self) -> &Cal { + &self.cal + } #[doc = "0x18 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x1c - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x20 - No Description"] - pub syncbusy: SYNCBUSY, + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } #[doc = "0x24 - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: Do not write to this register unless the oscillator is forced off. The oscillator is forced off if DISONDEMAND is set and FORCEEN is cleared.\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "Do not write to this register unless the oscillator is forced off. The oscillator is forced off if DISONDEMAND is set and FORCEEN is cleared."] pub mod cfg; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "CAL (rw) register accessor: an alias for `Reg`"] -pub type CAL = crate::Reg; +#[doc = "CAL (rw) register accessor: Do not write to this register unless CALBSY in SYNCBUSY register is low.\n\nYou can [`read`](crate::Reg::read) this register and get [`cal::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cal::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cal`] +module"] +#[doc(alias = "CAL")] +pub type Cal = crate::Reg; #[doc = "Do not write to this register unless CALBSY in SYNCBUSY register is low."] pub mod cal; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "No Description"] pub mod syncbusy; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/cal.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/cal.rs index 5fc8777..a5e1335 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/cal.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/cal.rs @@ -1,95 +1,55 @@ #[doc = "Register `CAL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CAL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CAPTUNE` reader - Internal Capacitance Tuning"] -pub type CAPTUNE_R = crate::FieldReader; +pub type CaptuneR = crate::FieldReader; #[doc = "Field `CAPTUNE` writer - Internal Capacitance Tuning"] -pub type CAPTUNE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 7, O>; +pub type CaptuneW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `GAIN` reader - LFXO Startup Gain"] -pub type GAIN_R = crate::FieldReader; +pub type GainR = crate::FieldReader; #[doc = "Field `GAIN` writer - LFXO Startup Gain"] -pub type GAIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 2, O>; +pub type GainW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:6 - Internal Capacitance Tuning"] #[inline(always)] - pub fn captune(&self) -> CAPTUNE_R { - CAPTUNE_R::new((self.bits & 0x7f) as u8) + pub fn captune(&self) -> CaptuneR { + CaptuneR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:9 - LFXO Startup Gain"] #[inline(always)] - pub fn gain(&self) -> GAIN_R { - GAIN_R::new(((self.bits >> 8) & 3) as u8) + pub fn gain(&self) -> GainR { + GainR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:6 - Internal Capacitance Tuning"] #[inline(always)] #[must_use] - pub fn captune(&mut self) -> CAPTUNE_W<0> { - CAPTUNE_W::new(self) + pub fn captune(&mut self) -> CaptuneW { + CaptuneW::new(self, 0) } #[doc = "Bits 8:9 - LFXO Startup Gain"] #[inline(always)] #[must_use] - pub fn gain(&mut self) -> GAIN_W<8> { - GAIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn gain(&mut self) -> GainW { + GainW::new(self, 8) } } -#[doc = "Do not write to this register unless CALBSY in SYNCBUSY register is low.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cal](index.html) module"] -pub struct CAL_SPEC; -impl crate::RegisterSpec for CAL_SPEC { +#[doc = "Do not write to this register unless CALBSY in SYNCBUSY register is low.\n\nYou can [`read`](crate::Reg::read) this register and get [`cal::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cal::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CalSpec; +impl crate::RegisterSpec for CalSpec { type Ux = u32; } -#[doc = "`read()` method returns [cal::R](R) reader structure"] -impl crate::Readable for CAL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cal::W](W) writer structure"] -impl crate::Writable for CAL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cal::R`](R) reader structure"] +impl crate::Readable for CalSpec {} +#[doc = "`write(|w| ..)` method takes [`cal::W`](W) writer structure"] +impl crate::Writable for CalSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CAL to value 0x0200"] -impl crate::Resettable for CAL_SPEC { - const RESET_VALUE: Self::Ux = 0x0200; +impl crate::Resettable for CalSpec { + const RESET_VALUE: u32 = 0x0200; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/cfg.rs index a103a69..04343a7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/cfg.rs @@ -1,313 +1,288 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `AGC` reader - LFXO AGC Enable"] -pub type AGC_R = crate::BitReader; +pub type AgcR = crate::BitReader; #[doc = "Field `AGC` writer - LFXO AGC Enable"] -pub type AGC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type AgcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HIGHAMPL` reader - LFXO High Amplitude Enable"] -pub type HIGHAMPL_R = crate::BitReader; +pub type HighamplR = crate::BitReader; #[doc = "Field `HIGHAMPL` writer - LFXO High Amplitude Enable"] -pub type HIGHAMPL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `MODE` reader - LFXO Mode"] -pub type MODE_R = crate::FieldReader; +pub type HighamplW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "LFXO Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: A 32768Hz crystal should be connected to the LF crystal pads. Voltage must not exceed VDDIO."] - XTAL = 0, + Xtal = 0, #[doc = "1: An external sine source with minimum amplitude 100mv (zero-to-peak) and maximum amplitude 500mV (zero-to-peak) should be connected in series with LFXTAL_I pin. Minimum voltage should be larger than ground and maximum voltage smaller than VDDIO. The sine source does not need to be ac coupled externally as it is ac couples inside LFXO. LFXTAL_O is free to be used as a general purpose GPIO."] - BUFEXTCLK = 1, + Bufextclk = 1, #[doc = "2: An external 32KHz CMOS clock should be provided on LFXTAL_I. LFXTAL_O is free to be used as a general purpose GPIO."] - DIGEXTCLK = 2, + Digextclk = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - LFXO Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(MODE_A::XTAL), - 1 => Some(MODE_A::BUFEXTCLK), - 2 => Some(MODE_A::DIGEXTCLK), + 0 => Some(Mode::Xtal), + 1 => Some(Mode::Bufextclk), + 2 => Some(Mode::Digextclk), _ => None, } } - #[doc = "Checks if the value of the field is `XTAL`"] + #[doc = "A 32768Hz crystal should be connected to the LF crystal pads. Voltage must not exceed VDDIO."] #[inline(always)] pub fn is_xtal(&self) -> bool { - *self == MODE_A::XTAL + *self == Mode::Xtal } - #[doc = "Checks if the value of the field is `BUFEXTCLK`"] + #[doc = "An external sine source with minimum amplitude 100mv (zero-to-peak) and maximum amplitude 500mV (zero-to-peak) should be connected in series with LFXTAL_I pin. Minimum voltage should be larger than ground and maximum voltage smaller than VDDIO. The sine source does not need to be ac coupled externally as it is ac couples inside LFXO. LFXTAL_O is free to be used as a general purpose GPIO."] #[inline(always)] pub fn is_bufextclk(&self) -> bool { - *self == MODE_A::BUFEXTCLK + *self == Mode::Bufextclk } - #[doc = "Checks if the value of the field is `DIGEXTCLK`"] + #[doc = "An external 32KHz CMOS clock should be provided on LFXTAL_I. LFXTAL_O is free to be used as a general purpose GPIO."] #[inline(always)] pub fn is_digextclk(&self) -> bool { - *self == MODE_A::DIGEXTCLK + *self == Mode::Digextclk } } #[doc = "Field `MODE` writer - LFXO Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "A 32768Hz crystal should be connected to the LF crystal pads. Voltage must not exceed VDDIO."] #[inline(always)] - pub fn xtal(self) -> &'a mut W { - self.variant(MODE_A::XTAL) + pub fn xtal(self) -> &'a mut crate::W { + self.variant(Mode::Xtal) } #[doc = "An external sine source with minimum amplitude 100mv (zero-to-peak) and maximum amplitude 500mV (zero-to-peak) should be connected in series with LFXTAL_I pin. Minimum voltage should be larger than ground and maximum voltage smaller than VDDIO. The sine source does not need to be ac coupled externally as it is ac couples inside LFXO. LFXTAL_O is free to be used as a general purpose GPIO."] #[inline(always)] - pub fn bufextclk(self) -> &'a mut W { - self.variant(MODE_A::BUFEXTCLK) + pub fn bufextclk(self) -> &'a mut crate::W { + self.variant(Mode::Bufextclk) } #[doc = "An external 32KHz CMOS clock should be provided on LFXTAL_I. LFXTAL_O is free to be used as a general purpose GPIO."] #[inline(always)] - pub fn digextclk(self) -> &'a mut W { - self.variant(MODE_A::DIGEXTCLK) + pub fn digextclk(self) -> &'a mut crate::W { + self.variant(Mode::Digextclk) } } -#[doc = "Field `TIMEOUT` reader - LFXO Start-up Delay"] -pub type TIMEOUT_R = crate::FieldReader; #[doc = "LFXO Start-up Delay\n\nValue on reset: 7"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TIMEOUT_A { +pub enum Timeout { #[doc = "0: Timeout period of 2 cycles"] - CYCLES2 = 0, + Cycles2 = 0, #[doc = "1: Timeout period of 256 cycles"] - CYCLES256 = 1, + Cycles256 = 1, #[doc = "2: Timeout period of 1024 cycles"] - CYCLES1K = 2, + Cycles1k = 2, #[doc = "3: Timeout period of 2048 cycles"] - CYCLES2K = 3, + Cycles2k = 3, #[doc = "4: Timeout period of 4096 cycles"] - CYCLES4K = 4, + Cycles4k = 4, #[doc = "5: Timeout period of 8192 cycles"] - CYCLES8K = 5, + Cycles8k = 5, #[doc = "6: Timeout period of 16384 cycles"] - CYCLES16K = 6, + Cycles16k = 6, #[doc = "7: Timeout period of 32768 cycles"] - CYCLES32K = 7, + Cycles32k = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TIMEOUT_A) -> Self { + fn from(variant: Timeout) -> Self { variant as _ } } -impl TIMEOUT_R { +impl crate::FieldSpec for Timeout { + type Ux = u8; +} +impl crate::IsEnum for Timeout {} +#[doc = "Field `TIMEOUT` reader - LFXO Start-up Delay"] +pub type TimeoutR = crate::FieldReader; +impl TimeoutR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TIMEOUT_A { + pub const fn variant(&self) -> Timeout { match self.bits { - 0 => TIMEOUT_A::CYCLES2, - 1 => TIMEOUT_A::CYCLES256, - 2 => TIMEOUT_A::CYCLES1K, - 3 => TIMEOUT_A::CYCLES2K, - 4 => TIMEOUT_A::CYCLES4K, - 5 => TIMEOUT_A::CYCLES8K, - 6 => TIMEOUT_A::CYCLES16K, - 7 => TIMEOUT_A::CYCLES32K, + 0 => Timeout::Cycles2, + 1 => Timeout::Cycles256, + 2 => Timeout::Cycles1k, + 3 => Timeout::Cycles2k, + 4 => Timeout::Cycles4k, + 5 => Timeout::Cycles8k, + 6 => Timeout::Cycles16k, + 7 => Timeout::Cycles32k, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `CYCLES2`"] + #[doc = "Timeout period of 2 cycles"] #[inline(always)] pub fn is_cycles2(&self) -> bool { - *self == TIMEOUT_A::CYCLES2 + *self == Timeout::Cycles2 } - #[doc = "Checks if the value of the field is `CYCLES256`"] + #[doc = "Timeout period of 256 cycles"] #[inline(always)] pub fn is_cycles256(&self) -> bool { - *self == TIMEOUT_A::CYCLES256 + *self == Timeout::Cycles256 } - #[doc = "Checks if the value of the field is `CYCLES1K`"] + #[doc = "Timeout period of 1024 cycles"] #[inline(always)] pub fn is_cycles1k(&self) -> bool { - *self == TIMEOUT_A::CYCLES1K + *self == Timeout::Cycles1k } - #[doc = "Checks if the value of the field is `CYCLES2K`"] + #[doc = "Timeout period of 2048 cycles"] #[inline(always)] pub fn is_cycles2k(&self) -> bool { - *self == TIMEOUT_A::CYCLES2K + *self == Timeout::Cycles2k } - #[doc = "Checks if the value of the field is `CYCLES4K`"] + #[doc = "Timeout period of 4096 cycles"] #[inline(always)] pub fn is_cycles4k(&self) -> bool { - *self == TIMEOUT_A::CYCLES4K + *self == Timeout::Cycles4k } - #[doc = "Checks if the value of the field is `CYCLES8K`"] + #[doc = "Timeout period of 8192 cycles"] #[inline(always)] pub fn is_cycles8k(&self) -> bool { - *self == TIMEOUT_A::CYCLES8K + *self == Timeout::Cycles8k } - #[doc = "Checks if the value of the field is `CYCLES16K`"] + #[doc = "Timeout period of 16384 cycles"] #[inline(always)] pub fn is_cycles16k(&self) -> bool { - *self == TIMEOUT_A::CYCLES16K + *self == Timeout::Cycles16k } - #[doc = "Checks if the value of the field is `CYCLES32K`"] + #[doc = "Timeout period of 32768 cycles"] #[inline(always)] pub fn is_cycles32k(&self) -> bool { - *self == TIMEOUT_A::CYCLES32K + *self == Timeout::Cycles32k } } #[doc = "Field `TIMEOUT` writer - LFXO Start-up Delay"] -pub type TIMEOUT_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, TIMEOUT_A, 3, O>; -impl<'a, const O: u8> TIMEOUT_W<'a, O> { +pub type TimeoutW<'a, REG> = crate::FieldWriter<'a, REG, 3, Timeout, crate::Safe>; +impl<'a, REG> TimeoutW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Timeout period of 2 cycles"] #[inline(always)] - pub fn cycles2(self) -> &'a mut W { - self.variant(TIMEOUT_A::CYCLES2) + pub fn cycles2(self) -> &'a mut crate::W { + self.variant(Timeout::Cycles2) } #[doc = "Timeout period of 256 cycles"] #[inline(always)] - pub fn cycles256(self) -> &'a mut W { - self.variant(TIMEOUT_A::CYCLES256) + pub fn cycles256(self) -> &'a mut crate::W { + self.variant(Timeout::Cycles256) } #[doc = "Timeout period of 1024 cycles"] #[inline(always)] - pub fn cycles1k(self) -> &'a mut W { - self.variant(TIMEOUT_A::CYCLES1K) + pub fn cycles1k(self) -> &'a mut crate::W { + self.variant(Timeout::Cycles1k) } #[doc = "Timeout period of 2048 cycles"] #[inline(always)] - pub fn cycles2k(self) -> &'a mut W { - self.variant(TIMEOUT_A::CYCLES2K) + pub fn cycles2k(self) -> &'a mut crate::W { + self.variant(Timeout::Cycles2k) } #[doc = "Timeout period of 4096 cycles"] #[inline(always)] - pub fn cycles4k(self) -> &'a mut W { - self.variant(TIMEOUT_A::CYCLES4K) + pub fn cycles4k(self) -> &'a mut crate::W { + self.variant(Timeout::Cycles4k) } #[doc = "Timeout period of 8192 cycles"] #[inline(always)] - pub fn cycles8k(self) -> &'a mut W { - self.variant(TIMEOUT_A::CYCLES8K) + pub fn cycles8k(self) -> &'a mut crate::W { + self.variant(Timeout::Cycles8k) } #[doc = "Timeout period of 16384 cycles"] #[inline(always)] - pub fn cycles16k(self) -> &'a mut W { - self.variant(TIMEOUT_A::CYCLES16K) + pub fn cycles16k(self) -> &'a mut crate::W { + self.variant(Timeout::Cycles16k) } #[doc = "Timeout period of 32768 cycles"] #[inline(always)] - pub fn cycles32k(self) -> &'a mut W { - self.variant(TIMEOUT_A::CYCLES32K) + pub fn cycles32k(self) -> &'a mut crate::W { + self.variant(Timeout::Cycles32k) } } impl R { #[doc = "Bit 0 - LFXO AGC Enable"] #[inline(always)] - pub fn agc(&self) -> AGC_R { - AGC_R::new((self.bits & 1) != 0) + pub fn agc(&self) -> AgcR { + AgcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - LFXO High Amplitude Enable"] #[inline(always)] - pub fn highampl(&self) -> HIGHAMPL_R { - HIGHAMPL_R::new(((self.bits >> 1) & 1) != 0) + pub fn highampl(&self) -> HighamplR { + HighamplR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 4:5 - LFXO Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new(((self.bits >> 4) & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 8:10 - LFXO Start-up Delay"] #[inline(always)] - pub fn timeout(&self) -> TIMEOUT_R { - TIMEOUT_R::new(((self.bits >> 8) & 7) as u8) + pub fn timeout(&self) -> TimeoutR { + TimeoutR::new(((self.bits >> 8) & 7) as u8) } } impl W { #[doc = "Bit 0 - LFXO AGC Enable"] #[inline(always)] #[must_use] - pub fn agc(&mut self) -> AGC_W<0> { - AGC_W::new(self) + pub fn agc(&mut self) -> AgcW { + AgcW::new(self, 0) } #[doc = "Bit 1 - LFXO High Amplitude Enable"] #[inline(always)] #[must_use] - pub fn highampl(&mut self) -> HIGHAMPL_W<1> { - HIGHAMPL_W::new(self) + pub fn highampl(&mut self) -> HighamplW { + HighamplW::new(self, 1) } #[doc = "Bits 4:5 - LFXO Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<4> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 4) } #[doc = "Bits 8:10 - LFXO Start-up Delay"] #[inline(always)] #[must_use] - pub fn timeout(&mut self) -> TIMEOUT_W<8> { - TIMEOUT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn timeout(&mut self) -> TimeoutW { + TimeoutW::new(self, 8) } } -#[doc = "Do not write to this register unless the oscillator is forced off. The oscillator is forced off if DISONDEMAND is set and FORCEEN is cleared.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "Do not write to this register unless the oscillator is forced off. The oscillator is forced off if DISONDEMAND is set and FORCEEN is cleared.\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0x0701"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x0701; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0x0701; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/ctrl.rs index 0917fe7..6c3bdb6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/ctrl.rs @@ -1,125 +1,85 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `FORCEEN` reader - LFXO Force Enable"] -pub type FORCEEN_R = crate::BitReader; +pub type ForceenR = crate::BitReader; #[doc = "Field `FORCEEN` writer - LFXO Force Enable"] -pub type FORCEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type ForceenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISONDEMAND` reader - LFXO Disable On-demand requests"] -pub type DISONDEMAND_R = crate::BitReader; +pub type DisondemandR = crate::BitReader; #[doc = "Field `DISONDEMAND` writer - LFXO Disable On-demand requests"] -pub type DISONDEMAND_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type DisondemandW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FAILDETEN` reader - LFXO Failure Detection Enable"] -pub type FAILDETEN_R = crate::BitReader; +pub type FaildetenR = crate::BitReader; #[doc = "Field `FAILDETEN` writer - LFXO Failure Detection Enable"] -pub type FAILDETEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type FaildetenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FAILDETEM4WUEN` reader - LFXO Failure Detection EM4WU Enable"] -pub type FAILDETEM4WUEN_R = crate::BitReader; +pub type Faildetem4wuenR = crate::BitReader; #[doc = "Field `FAILDETEM4WUEN` writer - LFXO Failure Detection EM4WU Enable"] -pub type FAILDETEM4WUEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type Faildetem4wuenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - LFXO Force Enable"] #[inline(always)] - pub fn forceen(&self) -> FORCEEN_R { - FORCEEN_R::new((self.bits & 1) != 0) + pub fn forceen(&self) -> ForceenR { + ForceenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - LFXO Disable On-demand requests"] #[inline(always)] - pub fn disondemand(&self) -> DISONDEMAND_R { - DISONDEMAND_R::new(((self.bits >> 1) & 1) != 0) + pub fn disondemand(&self) -> DisondemandR { + DisondemandR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 4 - LFXO Failure Detection Enable"] #[inline(always)] - pub fn faildeten(&self) -> FAILDETEN_R { - FAILDETEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn faildeten(&self) -> FaildetenR { + FaildetenR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - LFXO Failure Detection EM4WU Enable"] #[inline(always)] - pub fn faildetem4wuen(&self) -> FAILDETEM4WUEN_R { - FAILDETEM4WUEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn faildetem4wuen(&self) -> Faildetem4wuenR { + Faildetem4wuenR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - LFXO Force Enable"] #[inline(always)] #[must_use] - pub fn forceen(&mut self) -> FORCEEN_W<0> { - FORCEEN_W::new(self) + pub fn forceen(&mut self) -> ForceenW { + ForceenW::new(self, 0) } #[doc = "Bit 1 - LFXO Disable On-demand requests"] #[inline(always)] #[must_use] - pub fn disondemand(&mut self) -> DISONDEMAND_W<1> { - DISONDEMAND_W::new(self) + pub fn disondemand(&mut self) -> DisondemandW { + DisondemandW::new(self, 1) } #[doc = "Bit 4 - LFXO Failure Detection Enable"] #[inline(always)] #[must_use] - pub fn faildeten(&mut self) -> FAILDETEN_W<4> { - FAILDETEN_W::new(self) + pub fn faildeten(&mut self) -> FaildetenW { + FaildetenW::new(self, 4) } #[doc = "Bit 5 - LFXO Failure Detection EM4WU Enable"] #[inline(always)] #[must_use] - pub fn faildetem4wuen(&mut self) -> FAILDETEM4WUEN_W<5> { - FAILDETEM4WUEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn faildetem4wuen(&mut self) -> Faildetem4wuenW { + Faildetem4wuenW::new(self, 5) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0x02"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/ien.rs index 8d9084d..ff9dab1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/ien.rs @@ -1,125 +1,85 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RDY` reader - LFXO Ready Interrupt Enable"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `RDY` writer - LFXO Ready Interrupt Enable"] -pub type RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POSEDGE` reader - Rising Edge Interrupt Enable"] -pub type POSEDGE_R = crate::BitReader; +pub type PosedgeR = crate::BitReader; #[doc = "Field `POSEDGE` writer - Rising Edge Interrupt Enable"] -pub type POSEDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PosedgeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NEGEDGE` reader - Falling Edge Interrupt Enable"] -pub type NEGEDGE_R = crate::BitReader; +pub type NegedgeR = crate::BitReader; #[doc = "Field `NEGEDGE` writer - Falling Edge Interrupt Enable"] -pub type NEGEDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type NegedgeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FAIL` reader - LFXO Failure Interrupt Enable"] -pub type FAIL_R = crate::BitReader; +pub type FailR = crate::BitReader; #[doc = "Field `FAIL` writer - LFXO Failure Interrupt Enable"] -pub type FAIL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FailW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - LFXO Ready Interrupt Enable"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Rising Edge Interrupt Enable"] #[inline(always)] - pub fn posedge(&self) -> POSEDGE_R { - POSEDGE_R::new(((self.bits >> 1) & 1) != 0) + pub fn posedge(&self) -> PosedgeR { + PosedgeR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Falling Edge Interrupt Enable"] #[inline(always)] - pub fn negedge(&self) -> NEGEDGE_R { - NEGEDGE_R::new(((self.bits >> 2) & 1) != 0) + pub fn negedge(&self) -> NegedgeR { + NegedgeR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - LFXO Failure Interrupt Enable"] #[inline(always)] - pub fn fail(&self) -> FAIL_R { - FAIL_R::new(((self.bits >> 3) & 1) != 0) + pub fn fail(&self) -> FailR { + FailR::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - LFXO Ready Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rdy(&mut self) -> RDY_W<0> { - RDY_W::new(self) + pub fn rdy(&mut self) -> RdyW { + RdyW::new(self, 0) } #[doc = "Bit 1 - Rising Edge Interrupt Enable"] #[inline(always)] #[must_use] - pub fn posedge(&mut self) -> POSEDGE_W<1> { - POSEDGE_W::new(self) + pub fn posedge(&mut self) -> PosedgeW { + PosedgeW::new(self, 1) } #[doc = "Bit 2 - Falling Edge Interrupt Enable"] #[inline(always)] #[must_use] - pub fn negedge(&mut self) -> NEGEDGE_W<2> { - NEGEDGE_W::new(self) + pub fn negedge(&mut self) -> NegedgeW { + NegedgeW::new(self, 2) } #[doc = "Bit 3 - LFXO Failure Interrupt Enable"] #[inline(always)] #[must_use] - pub fn fail(&mut self) -> FAIL_W<3> { - FAIL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn fail(&mut self) -> FailW { + FailW::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/if_.rs index 6f774a8..ea1e2a6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/if_.rs @@ -1,125 +1,85 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RDY` reader - LFXO Ready Interrupt Flag"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `RDY` writer - LFXO Ready Interrupt Flag"] -pub type RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POSEDGE` reader - Rising Edge Interrupt Flag"] -pub type POSEDGE_R = crate::BitReader; +pub type PosedgeR = crate::BitReader; #[doc = "Field `POSEDGE` writer - Rising Edge Interrupt Flag"] -pub type POSEDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PosedgeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NEGEDGE` reader - Falling Edge Interrupt Flag"] -pub type NEGEDGE_R = crate::BitReader; +pub type NegedgeR = crate::BitReader; #[doc = "Field `NEGEDGE` writer - Falling Edge Interrupt Flag"] -pub type NEGEDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type NegedgeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FAIL` reader - LFXO Failure Interrupt Flag"] -pub type FAIL_R = crate::BitReader; +pub type FailR = crate::BitReader; #[doc = "Field `FAIL` writer - LFXO Failure Interrupt Flag"] -pub type FAIL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FailW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - LFXO Ready Interrupt Flag"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Rising Edge Interrupt Flag"] #[inline(always)] - pub fn posedge(&self) -> POSEDGE_R { - POSEDGE_R::new(((self.bits >> 1) & 1) != 0) + pub fn posedge(&self) -> PosedgeR { + PosedgeR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Falling Edge Interrupt Flag"] #[inline(always)] - pub fn negedge(&self) -> NEGEDGE_R { - NEGEDGE_R::new(((self.bits >> 2) & 1) != 0) + pub fn negedge(&self) -> NegedgeR { + NegedgeR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - LFXO Failure Interrupt Flag"] #[inline(always)] - pub fn fail(&self) -> FAIL_R { - FAIL_R::new(((self.bits >> 3) & 1) != 0) + pub fn fail(&self) -> FailR { + FailR::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - LFXO Ready Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rdy(&mut self) -> RDY_W<0> { - RDY_W::new(self) + pub fn rdy(&mut self) -> RdyW { + RdyW::new(self, 0) } #[doc = "Bit 1 - Rising Edge Interrupt Flag"] #[inline(always)] #[must_use] - pub fn posedge(&mut self) -> POSEDGE_W<1> { - POSEDGE_W::new(self) + pub fn posedge(&mut self) -> PosedgeW { + PosedgeW::new(self, 1) } #[doc = "Bit 2 - Falling Edge Interrupt Flag"] #[inline(always)] #[must_use] - pub fn negedge(&mut self) -> NEGEDGE_W<2> { - NEGEDGE_W::new(self) + pub fn negedge(&mut self) -> NegedgeW { + NegedgeW::new(self, 2) } #[doc = "Bit 3 - LFXO Failure Interrupt Flag"] #[inline(always)] #[must_use] - pub fn fail(&mut self) -> FAIL_W<3> { - FAIL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn fail(&mut self) -> FailW { + FailW::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/ipversion.rs index 6e5edd8..9e7f130 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/lock.rs index b69adbd..d73e5fb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Lock Key\n\nValue on reset: 6688"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "6688: Unlock LFXO lockable registers"] - UNLOCK = 6688, + Unlock = 6688, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Unlock LFXO lockable registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0x1a20"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0x1a20; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0x1a20; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/status.rs index e837df1..8819c1c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/status.rs @@ -1,85 +1,70 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RDY` reader - LFXO Ready Status"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `ENS` reader - LFXO Enable Status"] -pub type ENS_R = crate::BitReader; -#[doc = "Field `LOCK` reader - LFXO Locked Status"] -pub type LOCK_R = crate::BitReader; +pub type EnsR = crate::BitReader; #[doc = "LFXO Locked Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCK_A { +pub enum Lock { #[doc = "0: LFXO lockable registers are not locked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: LFXO lockable registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCK_A) -> Self { + fn from(variant: Lock) -> Self { variant as u8 != 0 } } -impl LOCK_R { +#[doc = "Field `LOCK` reader - LFXO Locked Status"] +pub type LockR = crate::BitReader; +impl LockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCK_A { + pub const fn variant(&self) -> Lock { match self.bits { - false => LOCK_A::UNLOCKED, - true => LOCK_A::LOCKED, + false => Lock::Unlocked, + true => Lock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "LFXO lockable registers are not locked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCK_A::UNLOCKED + *self == Lock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "LFXO lockable registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCK_A::LOCKED + *self == Lock::Locked } } impl R { #[doc = "Bit 0 - LFXO Ready Status"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 16 - LFXO Enable Status"] #[inline(always)] - pub fn ens(&self) -> ENS_R { - ENS_R::new(((self.bits >> 16) & 1) != 0) + pub fn ens(&self) -> EnsR { + EnsR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 31 - LFXO Locked Status"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new(((self.bits >> 31) & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/syncbusy.rs index 2e263bd..eabad21 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_ns/syncbusy.rs @@ -1,37 +1,22 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CAL` reader - LFXO Synchronization status"] -pub type CAL_R = crate::BitReader; +pub type CalR = crate::BitReader; impl R { #[doc = "Bit 0 - LFXO Synchronization status"] #[inline(always)] - pub fn cal(&self) -> CAL_R { - CAL_R::new((self.bits & 1) != 0) + pub fn cal(&self) -> CalR { + CalR::new((self.bits & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s.rs index 9e930c6..80e14b3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s.rs @@ -1,59 +1,115 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + ctrl: Ctrl, + cfg: Cfg, + _reserved3: [u8; 0x04], + status: Status, + cal: Cal, + if_: If, + ien: Ien, + syncbusy: Syncbusy, + lock: Lock, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x08 - Do not write to this register unless the oscillator is forced off. The oscillator is forced off if DISONDEMAND is set and FORCEEN is cleared."] - pub cfg: CFG, - _reserved3: [u8; 0x04], + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x10 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x14 - Do not write to this register unless CALBSY in SYNCBUSY register is low."] - pub cal: CAL, + #[inline(always)] + pub const fn cal(&self) -> &Cal { + &self.cal + } #[doc = "0x18 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x1c - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x20 - No Description"] - pub syncbusy: SYNCBUSY, + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } #[doc = "0x24 - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: Do not write to this register unless the oscillator is forced off. The oscillator is forced off if DISONDEMAND is set and FORCEEN is cleared.\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "Do not write to this register unless the oscillator is forced off. The oscillator is forced off if DISONDEMAND is set and FORCEEN is cleared."] pub mod cfg; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "CAL (rw) register accessor: an alias for `Reg`"] -pub type CAL = crate::Reg; +#[doc = "CAL (rw) register accessor: Do not write to this register unless CALBSY in SYNCBUSY register is low.\n\nYou can [`read`](crate::Reg::read) this register and get [`cal::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cal::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cal`] +module"] +#[doc(alias = "CAL")] +pub type Cal = crate::Reg; #[doc = "Do not write to this register unless CALBSY in SYNCBUSY register is low."] pub mod cal; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "No Description"] pub mod syncbusy; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/cal.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/cal.rs index 5fc8777..a5e1335 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/cal.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/cal.rs @@ -1,95 +1,55 @@ #[doc = "Register `CAL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CAL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CAPTUNE` reader - Internal Capacitance Tuning"] -pub type CAPTUNE_R = crate::FieldReader; +pub type CaptuneR = crate::FieldReader; #[doc = "Field `CAPTUNE` writer - Internal Capacitance Tuning"] -pub type CAPTUNE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 7, O>; +pub type CaptuneW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `GAIN` reader - LFXO Startup Gain"] -pub type GAIN_R = crate::FieldReader; +pub type GainR = crate::FieldReader; #[doc = "Field `GAIN` writer - LFXO Startup Gain"] -pub type GAIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 2, O>; +pub type GainW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:6 - Internal Capacitance Tuning"] #[inline(always)] - pub fn captune(&self) -> CAPTUNE_R { - CAPTUNE_R::new((self.bits & 0x7f) as u8) + pub fn captune(&self) -> CaptuneR { + CaptuneR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:9 - LFXO Startup Gain"] #[inline(always)] - pub fn gain(&self) -> GAIN_R { - GAIN_R::new(((self.bits >> 8) & 3) as u8) + pub fn gain(&self) -> GainR { + GainR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:6 - Internal Capacitance Tuning"] #[inline(always)] #[must_use] - pub fn captune(&mut self) -> CAPTUNE_W<0> { - CAPTUNE_W::new(self) + pub fn captune(&mut self) -> CaptuneW { + CaptuneW::new(self, 0) } #[doc = "Bits 8:9 - LFXO Startup Gain"] #[inline(always)] #[must_use] - pub fn gain(&mut self) -> GAIN_W<8> { - GAIN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn gain(&mut self) -> GainW { + GainW::new(self, 8) } } -#[doc = "Do not write to this register unless CALBSY in SYNCBUSY register is low.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cal](index.html) module"] -pub struct CAL_SPEC; -impl crate::RegisterSpec for CAL_SPEC { +#[doc = "Do not write to this register unless CALBSY in SYNCBUSY register is low.\n\nYou can [`read`](crate::Reg::read) this register and get [`cal::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cal::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CalSpec; +impl crate::RegisterSpec for CalSpec { type Ux = u32; } -#[doc = "`read()` method returns [cal::R](R) reader structure"] -impl crate::Readable for CAL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cal::W](W) writer structure"] -impl crate::Writable for CAL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cal::R`](R) reader structure"] +impl crate::Readable for CalSpec {} +#[doc = "`write(|w| ..)` method takes [`cal::W`](W) writer structure"] +impl crate::Writable for CalSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CAL to value 0x0200"] -impl crate::Resettable for CAL_SPEC { - const RESET_VALUE: Self::Ux = 0x0200; +impl crate::Resettable for CalSpec { + const RESET_VALUE: u32 = 0x0200; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/cfg.rs index a103a69..04343a7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/cfg.rs @@ -1,313 +1,288 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `AGC` reader - LFXO AGC Enable"] -pub type AGC_R = crate::BitReader; +pub type AgcR = crate::BitReader; #[doc = "Field `AGC` writer - LFXO AGC Enable"] -pub type AGC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type AgcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HIGHAMPL` reader - LFXO High Amplitude Enable"] -pub type HIGHAMPL_R = crate::BitReader; +pub type HighamplR = crate::BitReader; #[doc = "Field `HIGHAMPL` writer - LFXO High Amplitude Enable"] -pub type HIGHAMPL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `MODE` reader - LFXO Mode"] -pub type MODE_R = crate::FieldReader; +pub type HighamplW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "LFXO Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: A 32768Hz crystal should be connected to the LF crystal pads. Voltage must not exceed VDDIO."] - XTAL = 0, + Xtal = 0, #[doc = "1: An external sine source with minimum amplitude 100mv (zero-to-peak) and maximum amplitude 500mV (zero-to-peak) should be connected in series with LFXTAL_I pin. Minimum voltage should be larger than ground and maximum voltage smaller than VDDIO. The sine source does not need to be ac coupled externally as it is ac couples inside LFXO. LFXTAL_O is free to be used as a general purpose GPIO."] - BUFEXTCLK = 1, + Bufextclk = 1, #[doc = "2: An external 32KHz CMOS clock should be provided on LFXTAL_I. LFXTAL_O is free to be used as a general purpose GPIO."] - DIGEXTCLK = 2, + Digextclk = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - LFXO Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(MODE_A::XTAL), - 1 => Some(MODE_A::BUFEXTCLK), - 2 => Some(MODE_A::DIGEXTCLK), + 0 => Some(Mode::Xtal), + 1 => Some(Mode::Bufextclk), + 2 => Some(Mode::Digextclk), _ => None, } } - #[doc = "Checks if the value of the field is `XTAL`"] + #[doc = "A 32768Hz crystal should be connected to the LF crystal pads. Voltage must not exceed VDDIO."] #[inline(always)] pub fn is_xtal(&self) -> bool { - *self == MODE_A::XTAL + *self == Mode::Xtal } - #[doc = "Checks if the value of the field is `BUFEXTCLK`"] + #[doc = "An external sine source with minimum amplitude 100mv (zero-to-peak) and maximum amplitude 500mV (zero-to-peak) should be connected in series with LFXTAL_I pin. Minimum voltage should be larger than ground and maximum voltage smaller than VDDIO. The sine source does not need to be ac coupled externally as it is ac couples inside LFXO. LFXTAL_O is free to be used as a general purpose GPIO."] #[inline(always)] pub fn is_bufextclk(&self) -> bool { - *self == MODE_A::BUFEXTCLK + *self == Mode::Bufextclk } - #[doc = "Checks if the value of the field is `DIGEXTCLK`"] + #[doc = "An external 32KHz CMOS clock should be provided on LFXTAL_I. LFXTAL_O is free to be used as a general purpose GPIO."] #[inline(always)] pub fn is_digextclk(&self) -> bool { - *self == MODE_A::DIGEXTCLK + *self == Mode::Digextclk } } #[doc = "Field `MODE` writer - LFXO Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "A 32768Hz crystal should be connected to the LF crystal pads. Voltage must not exceed VDDIO."] #[inline(always)] - pub fn xtal(self) -> &'a mut W { - self.variant(MODE_A::XTAL) + pub fn xtal(self) -> &'a mut crate::W { + self.variant(Mode::Xtal) } #[doc = "An external sine source with minimum amplitude 100mv (zero-to-peak) and maximum amplitude 500mV (zero-to-peak) should be connected in series with LFXTAL_I pin. Minimum voltage should be larger than ground and maximum voltage smaller than VDDIO. The sine source does not need to be ac coupled externally as it is ac couples inside LFXO. LFXTAL_O is free to be used as a general purpose GPIO."] #[inline(always)] - pub fn bufextclk(self) -> &'a mut W { - self.variant(MODE_A::BUFEXTCLK) + pub fn bufextclk(self) -> &'a mut crate::W { + self.variant(Mode::Bufextclk) } #[doc = "An external 32KHz CMOS clock should be provided on LFXTAL_I. LFXTAL_O is free to be used as a general purpose GPIO."] #[inline(always)] - pub fn digextclk(self) -> &'a mut W { - self.variant(MODE_A::DIGEXTCLK) + pub fn digextclk(self) -> &'a mut crate::W { + self.variant(Mode::Digextclk) } } -#[doc = "Field `TIMEOUT` reader - LFXO Start-up Delay"] -pub type TIMEOUT_R = crate::FieldReader; #[doc = "LFXO Start-up Delay\n\nValue on reset: 7"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TIMEOUT_A { +pub enum Timeout { #[doc = "0: Timeout period of 2 cycles"] - CYCLES2 = 0, + Cycles2 = 0, #[doc = "1: Timeout period of 256 cycles"] - CYCLES256 = 1, + Cycles256 = 1, #[doc = "2: Timeout period of 1024 cycles"] - CYCLES1K = 2, + Cycles1k = 2, #[doc = "3: Timeout period of 2048 cycles"] - CYCLES2K = 3, + Cycles2k = 3, #[doc = "4: Timeout period of 4096 cycles"] - CYCLES4K = 4, + Cycles4k = 4, #[doc = "5: Timeout period of 8192 cycles"] - CYCLES8K = 5, + Cycles8k = 5, #[doc = "6: Timeout period of 16384 cycles"] - CYCLES16K = 6, + Cycles16k = 6, #[doc = "7: Timeout period of 32768 cycles"] - CYCLES32K = 7, + Cycles32k = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TIMEOUT_A) -> Self { + fn from(variant: Timeout) -> Self { variant as _ } } -impl TIMEOUT_R { +impl crate::FieldSpec for Timeout { + type Ux = u8; +} +impl crate::IsEnum for Timeout {} +#[doc = "Field `TIMEOUT` reader - LFXO Start-up Delay"] +pub type TimeoutR = crate::FieldReader; +impl TimeoutR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TIMEOUT_A { + pub const fn variant(&self) -> Timeout { match self.bits { - 0 => TIMEOUT_A::CYCLES2, - 1 => TIMEOUT_A::CYCLES256, - 2 => TIMEOUT_A::CYCLES1K, - 3 => TIMEOUT_A::CYCLES2K, - 4 => TIMEOUT_A::CYCLES4K, - 5 => TIMEOUT_A::CYCLES8K, - 6 => TIMEOUT_A::CYCLES16K, - 7 => TIMEOUT_A::CYCLES32K, + 0 => Timeout::Cycles2, + 1 => Timeout::Cycles256, + 2 => Timeout::Cycles1k, + 3 => Timeout::Cycles2k, + 4 => Timeout::Cycles4k, + 5 => Timeout::Cycles8k, + 6 => Timeout::Cycles16k, + 7 => Timeout::Cycles32k, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `CYCLES2`"] + #[doc = "Timeout period of 2 cycles"] #[inline(always)] pub fn is_cycles2(&self) -> bool { - *self == TIMEOUT_A::CYCLES2 + *self == Timeout::Cycles2 } - #[doc = "Checks if the value of the field is `CYCLES256`"] + #[doc = "Timeout period of 256 cycles"] #[inline(always)] pub fn is_cycles256(&self) -> bool { - *self == TIMEOUT_A::CYCLES256 + *self == Timeout::Cycles256 } - #[doc = "Checks if the value of the field is `CYCLES1K`"] + #[doc = "Timeout period of 1024 cycles"] #[inline(always)] pub fn is_cycles1k(&self) -> bool { - *self == TIMEOUT_A::CYCLES1K + *self == Timeout::Cycles1k } - #[doc = "Checks if the value of the field is `CYCLES2K`"] + #[doc = "Timeout period of 2048 cycles"] #[inline(always)] pub fn is_cycles2k(&self) -> bool { - *self == TIMEOUT_A::CYCLES2K + *self == Timeout::Cycles2k } - #[doc = "Checks if the value of the field is `CYCLES4K`"] + #[doc = "Timeout period of 4096 cycles"] #[inline(always)] pub fn is_cycles4k(&self) -> bool { - *self == TIMEOUT_A::CYCLES4K + *self == Timeout::Cycles4k } - #[doc = "Checks if the value of the field is `CYCLES8K`"] + #[doc = "Timeout period of 8192 cycles"] #[inline(always)] pub fn is_cycles8k(&self) -> bool { - *self == TIMEOUT_A::CYCLES8K + *self == Timeout::Cycles8k } - #[doc = "Checks if the value of the field is `CYCLES16K`"] + #[doc = "Timeout period of 16384 cycles"] #[inline(always)] pub fn is_cycles16k(&self) -> bool { - *self == TIMEOUT_A::CYCLES16K + *self == Timeout::Cycles16k } - #[doc = "Checks if the value of the field is `CYCLES32K`"] + #[doc = "Timeout period of 32768 cycles"] #[inline(always)] pub fn is_cycles32k(&self) -> bool { - *self == TIMEOUT_A::CYCLES32K + *self == Timeout::Cycles32k } } #[doc = "Field `TIMEOUT` writer - LFXO Start-up Delay"] -pub type TIMEOUT_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, TIMEOUT_A, 3, O>; -impl<'a, const O: u8> TIMEOUT_W<'a, O> { +pub type TimeoutW<'a, REG> = crate::FieldWriter<'a, REG, 3, Timeout, crate::Safe>; +impl<'a, REG> TimeoutW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Timeout period of 2 cycles"] #[inline(always)] - pub fn cycles2(self) -> &'a mut W { - self.variant(TIMEOUT_A::CYCLES2) + pub fn cycles2(self) -> &'a mut crate::W { + self.variant(Timeout::Cycles2) } #[doc = "Timeout period of 256 cycles"] #[inline(always)] - pub fn cycles256(self) -> &'a mut W { - self.variant(TIMEOUT_A::CYCLES256) + pub fn cycles256(self) -> &'a mut crate::W { + self.variant(Timeout::Cycles256) } #[doc = "Timeout period of 1024 cycles"] #[inline(always)] - pub fn cycles1k(self) -> &'a mut W { - self.variant(TIMEOUT_A::CYCLES1K) + pub fn cycles1k(self) -> &'a mut crate::W { + self.variant(Timeout::Cycles1k) } #[doc = "Timeout period of 2048 cycles"] #[inline(always)] - pub fn cycles2k(self) -> &'a mut W { - self.variant(TIMEOUT_A::CYCLES2K) + pub fn cycles2k(self) -> &'a mut crate::W { + self.variant(Timeout::Cycles2k) } #[doc = "Timeout period of 4096 cycles"] #[inline(always)] - pub fn cycles4k(self) -> &'a mut W { - self.variant(TIMEOUT_A::CYCLES4K) + pub fn cycles4k(self) -> &'a mut crate::W { + self.variant(Timeout::Cycles4k) } #[doc = "Timeout period of 8192 cycles"] #[inline(always)] - pub fn cycles8k(self) -> &'a mut W { - self.variant(TIMEOUT_A::CYCLES8K) + pub fn cycles8k(self) -> &'a mut crate::W { + self.variant(Timeout::Cycles8k) } #[doc = "Timeout period of 16384 cycles"] #[inline(always)] - pub fn cycles16k(self) -> &'a mut W { - self.variant(TIMEOUT_A::CYCLES16K) + pub fn cycles16k(self) -> &'a mut crate::W { + self.variant(Timeout::Cycles16k) } #[doc = "Timeout period of 32768 cycles"] #[inline(always)] - pub fn cycles32k(self) -> &'a mut W { - self.variant(TIMEOUT_A::CYCLES32K) + pub fn cycles32k(self) -> &'a mut crate::W { + self.variant(Timeout::Cycles32k) } } impl R { #[doc = "Bit 0 - LFXO AGC Enable"] #[inline(always)] - pub fn agc(&self) -> AGC_R { - AGC_R::new((self.bits & 1) != 0) + pub fn agc(&self) -> AgcR { + AgcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - LFXO High Amplitude Enable"] #[inline(always)] - pub fn highampl(&self) -> HIGHAMPL_R { - HIGHAMPL_R::new(((self.bits >> 1) & 1) != 0) + pub fn highampl(&self) -> HighamplR { + HighamplR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 4:5 - LFXO Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new(((self.bits >> 4) & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 8:10 - LFXO Start-up Delay"] #[inline(always)] - pub fn timeout(&self) -> TIMEOUT_R { - TIMEOUT_R::new(((self.bits >> 8) & 7) as u8) + pub fn timeout(&self) -> TimeoutR { + TimeoutR::new(((self.bits >> 8) & 7) as u8) } } impl W { #[doc = "Bit 0 - LFXO AGC Enable"] #[inline(always)] #[must_use] - pub fn agc(&mut self) -> AGC_W<0> { - AGC_W::new(self) + pub fn agc(&mut self) -> AgcW { + AgcW::new(self, 0) } #[doc = "Bit 1 - LFXO High Amplitude Enable"] #[inline(always)] #[must_use] - pub fn highampl(&mut self) -> HIGHAMPL_W<1> { - HIGHAMPL_W::new(self) + pub fn highampl(&mut self) -> HighamplW { + HighamplW::new(self, 1) } #[doc = "Bits 4:5 - LFXO Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<4> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 4) } #[doc = "Bits 8:10 - LFXO Start-up Delay"] #[inline(always)] #[must_use] - pub fn timeout(&mut self) -> TIMEOUT_W<8> { - TIMEOUT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn timeout(&mut self) -> TimeoutW { + TimeoutW::new(self, 8) } } -#[doc = "Do not write to this register unless the oscillator is forced off. The oscillator is forced off if DISONDEMAND is set and FORCEEN is cleared.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "Do not write to this register unless the oscillator is forced off. The oscillator is forced off if DISONDEMAND is set and FORCEEN is cleared.\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0x0701"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x0701; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0x0701; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/ctrl.rs index 0917fe7..6c3bdb6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/ctrl.rs @@ -1,125 +1,85 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `FORCEEN` reader - LFXO Force Enable"] -pub type FORCEEN_R = crate::BitReader; +pub type ForceenR = crate::BitReader; #[doc = "Field `FORCEEN` writer - LFXO Force Enable"] -pub type FORCEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type ForceenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISONDEMAND` reader - LFXO Disable On-demand requests"] -pub type DISONDEMAND_R = crate::BitReader; +pub type DisondemandR = crate::BitReader; #[doc = "Field `DISONDEMAND` writer - LFXO Disable On-demand requests"] -pub type DISONDEMAND_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type DisondemandW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FAILDETEN` reader - LFXO Failure Detection Enable"] -pub type FAILDETEN_R = crate::BitReader; +pub type FaildetenR = crate::BitReader; #[doc = "Field `FAILDETEN` writer - LFXO Failure Detection Enable"] -pub type FAILDETEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type FaildetenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FAILDETEM4WUEN` reader - LFXO Failure Detection EM4WU Enable"] -pub type FAILDETEM4WUEN_R = crate::BitReader; +pub type Faildetem4wuenR = crate::BitReader; #[doc = "Field `FAILDETEM4WUEN` writer - LFXO Failure Detection EM4WU Enable"] -pub type FAILDETEM4WUEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type Faildetem4wuenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - LFXO Force Enable"] #[inline(always)] - pub fn forceen(&self) -> FORCEEN_R { - FORCEEN_R::new((self.bits & 1) != 0) + pub fn forceen(&self) -> ForceenR { + ForceenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - LFXO Disable On-demand requests"] #[inline(always)] - pub fn disondemand(&self) -> DISONDEMAND_R { - DISONDEMAND_R::new(((self.bits >> 1) & 1) != 0) + pub fn disondemand(&self) -> DisondemandR { + DisondemandR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 4 - LFXO Failure Detection Enable"] #[inline(always)] - pub fn faildeten(&self) -> FAILDETEN_R { - FAILDETEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn faildeten(&self) -> FaildetenR { + FaildetenR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - LFXO Failure Detection EM4WU Enable"] #[inline(always)] - pub fn faildetem4wuen(&self) -> FAILDETEM4WUEN_R { - FAILDETEM4WUEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn faildetem4wuen(&self) -> Faildetem4wuenR { + Faildetem4wuenR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - LFXO Force Enable"] #[inline(always)] #[must_use] - pub fn forceen(&mut self) -> FORCEEN_W<0> { - FORCEEN_W::new(self) + pub fn forceen(&mut self) -> ForceenW { + ForceenW::new(self, 0) } #[doc = "Bit 1 - LFXO Disable On-demand requests"] #[inline(always)] #[must_use] - pub fn disondemand(&mut self) -> DISONDEMAND_W<1> { - DISONDEMAND_W::new(self) + pub fn disondemand(&mut self) -> DisondemandW { + DisondemandW::new(self, 1) } #[doc = "Bit 4 - LFXO Failure Detection Enable"] #[inline(always)] #[must_use] - pub fn faildeten(&mut self) -> FAILDETEN_W<4> { - FAILDETEN_W::new(self) + pub fn faildeten(&mut self) -> FaildetenW { + FaildetenW::new(self, 4) } #[doc = "Bit 5 - LFXO Failure Detection EM4WU Enable"] #[inline(always)] #[must_use] - pub fn faildetem4wuen(&mut self) -> FAILDETEM4WUEN_W<5> { - FAILDETEM4WUEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn faildetem4wuen(&mut self) -> Faildetem4wuenW { + Faildetem4wuenW::new(self, 5) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0x02"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/ien.rs index 8d9084d..ff9dab1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/ien.rs @@ -1,125 +1,85 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RDY` reader - LFXO Ready Interrupt Enable"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `RDY` writer - LFXO Ready Interrupt Enable"] -pub type RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POSEDGE` reader - Rising Edge Interrupt Enable"] -pub type POSEDGE_R = crate::BitReader; +pub type PosedgeR = crate::BitReader; #[doc = "Field `POSEDGE` writer - Rising Edge Interrupt Enable"] -pub type POSEDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PosedgeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NEGEDGE` reader - Falling Edge Interrupt Enable"] -pub type NEGEDGE_R = crate::BitReader; +pub type NegedgeR = crate::BitReader; #[doc = "Field `NEGEDGE` writer - Falling Edge Interrupt Enable"] -pub type NEGEDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type NegedgeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FAIL` reader - LFXO Failure Interrupt Enable"] -pub type FAIL_R = crate::BitReader; +pub type FailR = crate::BitReader; #[doc = "Field `FAIL` writer - LFXO Failure Interrupt Enable"] -pub type FAIL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FailW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - LFXO Ready Interrupt Enable"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Rising Edge Interrupt Enable"] #[inline(always)] - pub fn posedge(&self) -> POSEDGE_R { - POSEDGE_R::new(((self.bits >> 1) & 1) != 0) + pub fn posedge(&self) -> PosedgeR { + PosedgeR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Falling Edge Interrupt Enable"] #[inline(always)] - pub fn negedge(&self) -> NEGEDGE_R { - NEGEDGE_R::new(((self.bits >> 2) & 1) != 0) + pub fn negedge(&self) -> NegedgeR { + NegedgeR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - LFXO Failure Interrupt Enable"] #[inline(always)] - pub fn fail(&self) -> FAIL_R { - FAIL_R::new(((self.bits >> 3) & 1) != 0) + pub fn fail(&self) -> FailR { + FailR::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - LFXO Ready Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rdy(&mut self) -> RDY_W<0> { - RDY_W::new(self) + pub fn rdy(&mut self) -> RdyW { + RdyW::new(self, 0) } #[doc = "Bit 1 - Rising Edge Interrupt Enable"] #[inline(always)] #[must_use] - pub fn posedge(&mut self) -> POSEDGE_W<1> { - POSEDGE_W::new(self) + pub fn posedge(&mut self) -> PosedgeW { + PosedgeW::new(self, 1) } #[doc = "Bit 2 - Falling Edge Interrupt Enable"] #[inline(always)] #[must_use] - pub fn negedge(&mut self) -> NEGEDGE_W<2> { - NEGEDGE_W::new(self) + pub fn negedge(&mut self) -> NegedgeW { + NegedgeW::new(self, 2) } #[doc = "Bit 3 - LFXO Failure Interrupt Enable"] #[inline(always)] #[must_use] - pub fn fail(&mut self) -> FAIL_W<3> { - FAIL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn fail(&mut self) -> FailW { + FailW::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/if_.rs index 6f774a8..ea1e2a6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/if_.rs @@ -1,125 +1,85 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RDY` reader - LFXO Ready Interrupt Flag"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `RDY` writer - LFXO Ready Interrupt Flag"] -pub type RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POSEDGE` reader - Rising Edge Interrupt Flag"] -pub type POSEDGE_R = crate::BitReader; +pub type PosedgeR = crate::BitReader; #[doc = "Field `POSEDGE` writer - Rising Edge Interrupt Flag"] -pub type POSEDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PosedgeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NEGEDGE` reader - Falling Edge Interrupt Flag"] -pub type NEGEDGE_R = crate::BitReader; +pub type NegedgeR = crate::BitReader; #[doc = "Field `NEGEDGE` writer - Falling Edge Interrupt Flag"] -pub type NEGEDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type NegedgeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FAIL` reader - LFXO Failure Interrupt Flag"] -pub type FAIL_R = crate::BitReader; +pub type FailR = crate::BitReader; #[doc = "Field `FAIL` writer - LFXO Failure Interrupt Flag"] -pub type FAIL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FailW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - LFXO Ready Interrupt Flag"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Rising Edge Interrupt Flag"] #[inline(always)] - pub fn posedge(&self) -> POSEDGE_R { - POSEDGE_R::new(((self.bits >> 1) & 1) != 0) + pub fn posedge(&self) -> PosedgeR { + PosedgeR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Falling Edge Interrupt Flag"] #[inline(always)] - pub fn negedge(&self) -> NEGEDGE_R { - NEGEDGE_R::new(((self.bits >> 2) & 1) != 0) + pub fn negedge(&self) -> NegedgeR { + NegedgeR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - LFXO Failure Interrupt Flag"] #[inline(always)] - pub fn fail(&self) -> FAIL_R { - FAIL_R::new(((self.bits >> 3) & 1) != 0) + pub fn fail(&self) -> FailR { + FailR::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - LFXO Ready Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rdy(&mut self) -> RDY_W<0> { - RDY_W::new(self) + pub fn rdy(&mut self) -> RdyW { + RdyW::new(self, 0) } #[doc = "Bit 1 - Rising Edge Interrupt Flag"] #[inline(always)] #[must_use] - pub fn posedge(&mut self) -> POSEDGE_W<1> { - POSEDGE_W::new(self) + pub fn posedge(&mut self) -> PosedgeW { + PosedgeW::new(self, 1) } #[doc = "Bit 2 - Falling Edge Interrupt Flag"] #[inline(always)] #[must_use] - pub fn negedge(&mut self) -> NEGEDGE_W<2> { - NEGEDGE_W::new(self) + pub fn negedge(&mut self) -> NegedgeW { + NegedgeW::new(self, 2) } #[doc = "Bit 3 - LFXO Failure Interrupt Flag"] #[inline(always)] #[must_use] - pub fn fail(&mut self) -> FAIL_W<3> { - FAIL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn fail(&mut self) -> FailW { + FailW::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/ipversion.rs index 6e5edd8..9e7f130 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/lock.rs index b69adbd..d73e5fb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Lock Key\n\nValue on reset: 6688"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "6688: Unlock LFXO lockable registers"] - UNLOCK = 6688, + Unlock = 6688, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Unlock LFXO lockable registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0x1a20"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0x1a20; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0x1a20; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/status.rs index e837df1..8819c1c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/status.rs @@ -1,85 +1,70 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RDY` reader - LFXO Ready Status"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `ENS` reader - LFXO Enable Status"] -pub type ENS_R = crate::BitReader; -#[doc = "Field `LOCK` reader - LFXO Locked Status"] -pub type LOCK_R = crate::BitReader; +pub type EnsR = crate::BitReader; #[doc = "LFXO Locked Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCK_A { +pub enum Lock { #[doc = "0: LFXO lockable registers are not locked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: LFXO lockable registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCK_A) -> Self { + fn from(variant: Lock) -> Self { variant as u8 != 0 } } -impl LOCK_R { +#[doc = "Field `LOCK` reader - LFXO Locked Status"] +pub type LockR = crate::BitReader; +impl LockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCK_A { + pub const fn variant(&self) -> Lock { match self.bits { - false => LOCK_A::UNLOCKED, - true => LOCK_A::LOCKED, + false => Lock::Unlocked, + true => Lock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "LFXO lockable registers are not locked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCK_A::UNLOCKED + *self == Lock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "LFXO lockable registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCK_A::LOCKED + *self == Lock::Locked } } impl R { #[doc = "Bit 0 - LFXO Ready Status"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 16 - LFXO Enable Status"] #[inline(always)] - pub fn ens(&self) -> ENS_R { - ENS_R::new(((self.bits >> 16) & 1) != 0) + pub fn ens(&self) -> EnsR { + EnsR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 31 - LFXO Locked Status"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new(((self.bits >> 31) & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/syncbusy.rs index 2e263bd..eabad21 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lfxo_s/syncbusy.rs @@ -1,37 +1,22 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CAL` reader - LFXO Synchronization status"] -pub type CAL_R = crate::BitReader; +pub type CalR = crate::BitReader; impl R { #[doc = "Bit 0 - LFXO Synchronization status"] #[inline(always)] - pub fn cal(&self) -> CAL_R { - CAL_R::new((self.bits & 1) != 0) + pub fn cal(&self) -> CalR { + CalR::new((self.bits & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lib.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lib.rs index 508ae2f..8892137 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/lib.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/lib.rs @@ -1,20 +1,5 @@ -#![doc = "Peripheral access API for EFM32PG23B310F512IM48 microcontrollers (generated using svd2rust v0.27.2 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] -svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.27.2/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] -#![deny(dead_code)] -#![deny(improper_ctypes)] -#![deny(missing_docs)] -#![deny(no_mangle_generic_items)] -#![deny(non_shorthand_field_patterns)] -#![deny(overflowing_literals)] -#![deny(path_statements)] -#![deny(patterns_in_fns_without_body)] -#![deny(private_bounds)] -#![deny(private_interfaces)] -#![deny(unconditional_recursion)] -#![deny(unused_allocation)] -#![deny(unused_comparisons)] -#![deny(unused_parens)] -#![deny(while_true)] +#![doc = "Peripheral access API for EFM32PG23B200F512IM40 microcontrollers (generated using svd2rust v0.33.4 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] +svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.33.4/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] #![allow(non_camel_case_types)] #![allow(non_snake_case)] #![no_std] @@ -84,6 +69,7 @@ extern "C" { fn KEYSCAN(); } #[doc(hidden)] +#[repr(C)] pub union Vector { _handler: unsafe extern "C" fn(), _reserved: u32, @@ -303,1637 +289,2680 @@ unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt { self as u16 } } -#[doc = "SCRATCHPAD_S Registers"] -pub struct SCRATCHPAD_S { +#[doc = "ACMP0_NS Registers"] +pub struct Acmp0Ns { _marker: PhantomData<*const ()>, } -unsafe impl Send for SCRATCHPAD_S {} -impl SCRATCHPAD_S { +unsafe impl Send for Acmp0Ns {} +impl Acmp0Ns { #[doc = r"Pointer to the register block"] - pub const PTR: *const scratchpad_s::RegisterBlock = 0x4000_0000 as *const _; + pub const PTR: *const acmp0_ns::RegisterBlock = 0x5900_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const scratchpad_s::RegisterBlock { + pub const fn ptr() -> *const acmp0_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for SCRATCHPAD_S { - type Target = scratchpad_s::RegisterBlock; +impl Deref for Acmp0Ns { + type Target = acmp0_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SCRATCHPAD_S { +impl core::fmt::Debug for Acmp0Ns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SCRATCHPAD_S").finish() + f.debug_struct("Acmp0Ns").finish() } } -#[doc = "SCRATCHPAD_S Registers"] -pub mod scratchpad_s; -#[doc = "EMU_S Registers"] -pub struct EMU_S { +#[doc = "ACMP0_NS Registers"] +pub mod acmp0_ns; +#[doc = "ACMP0_S Registers"] +pub struct Acmp0S { _marker: PhantomData<*const ()>, } -unsafe impl Send for EMU_S {} -impl EMU_S { +unsafe impl Send for Acmp0S {} +impl Acmp0S { #[doc = r"Pointer to the register block"] - pub const PTR: *const emu_s::RegisterBlock = 0x4000_4000 as *const _; + pub const PTR: *const acmp0_s::RegisterBlock = 0x4900_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const emu_s::RegisterBlock { + pub const fn ptr() -> *const acmp0_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for EMU_S { - type Target = emu_s::RegisterBlock; +impl Deref for Acmp0S { + type Target = acmp0_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for EMU_S { +impl core::fmt::Debug for Acmp0S { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("EMU_S").finish() + f.debug_struct("Acmp0S").finish() } } -#[doc = "EMU_S Registers"] -pub mod emu_s; -#[doc = "CMU_S Registers"] -pub struct CMU_S { +#[doc = "ACMP0_S Registers"] +pub mod acmp0_s; +#[doc = "ACMP1_NS Registers"] +pub struct Acmp1Ns { _marker: PhantomData<*const ()>, } -unsafe impl Send for CMU_S {} -impl CMU_S { +unsafe impl Send for Acmp1Ns {} +impl Acmp1Ns { #[doc = r"Pointer to the register block"] - pub const PTR: *const cmu_s::RegisterBlock = 0x4000_8000 as *const _; + pub const PTR: *const acmp1_ns::RegisterBlock = 0x5900_c000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const cmu_s::RegisterBlock { + pub const fn ptr() -> *const acmp1_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for CMU_S { - type Target = cmu_s::RegisterBlock; +impl Deref for Acmp1Ns { + type Target = acmp1_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CMU_S { +impl core::fmt::Debug for Acmp1Ns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CMU_S").finish() + f.debug_struct("Acmp1Ns").finish() } } -#[doc = "CMU_S Registers"] -pub mod cmu_s; -#[doc = "HFRCO0_S Registers"] -pub struct HFRCO0_S { +#[doc = "ACMP1_NS Registers"] +pub mod acmp1_ns; +#[doc = "ACMP1_S Registers"] +pub struct Acmp1S { _marker: PhantomData<*const ()>, } -unsafe impl Send for HFRCO0_S {} -impl HFRCO0_S { +unsafe impl Send for Acmp1S {} +impl Acmp1S { #[doc = r"Pointer to the register block"] - pub const PTR: *const hfrco0_s::RegisterBlock = 0x4001_0000 as *const _; + pub const PTR: *const acmp1_s::RegisterBlock = 0x4900_c000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const hfrco0_s::RegisterBlock { + pub const fn ptr() -> *const acmp1_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for HFRCO0_S { - type Target = hfrco0_s::RegisterBlock; +impl Deref for Acmp1S { + type Target = acmp1_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for HFRCO0_S { +impl core::fmt::Debug for Acmp1S { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("HFRCO0_S").finish() + f.debug_struct("Acmp1S").finish() } } -#[doc = "HFRCO0_S Registers"] -pub mod hfrco0_s; -#[doc = "FSRCO_S Registers"] -pub struct FSRCO_S { +#[doc = "ACMP1_S Registers"] +pub mod acmp1_s; +#[doc = "BURAM_NS Registers"] +pub struct BuramNs { _marker: PhantomData<*const ()>, } -unsafe impl Send for FSRCO_S {} -impl FSRCO_S { +unsafe impl Send for BuramNs {} +impl BuramNs { #[doc = r"Pointer to the register block"] - pub const PTR: *const fsrco_s::RegisterBlock = 0x4001_8000 as *const _; + pub const PTR: *const buram_ns::RegisterBlock = 0x5008_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const fsrco_s::RegisterBlock { + pub const fn ptr() -> *const buram_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for FSRCO_S { - type Target = fsrco_s::RegisterBlock; +impl Deref for BuramNs { + type Target = buram_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for FSRCO_S { +impl core::fmt::Debug for BuramNs { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FSRCO_S").finish() + f.debug_struct("BuramNs").finish() } } -#[doc = "FSRCO_S Registers"] -pub mod fsrco_s; -#[doc = "DPLL0_S Registers"] -pub struct DPLL0_S { +#[doc = "BURAM_NS Registers"] +pub mod buram_ns; +#[doc = "BURAM_S Registers"] +pub struct BuramS { _marker: PhantomData<*const ()>, } -unsafe impl Send for DPLL0_S {} -impl DPLL0_S { +unsafe impl Send for BuramS {} +impl BuramS { #[doc = r"Pointer to the register block"] - pub const PTR: *const dpll0_s::RegisterBlock = 0x4001_c000 as *const _; + pub const PTR: *const buram_s::RegisterBlock = 0x4008_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const dpll0_s::RegisterBlock { + pub const fn ptr() -> *const buram_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for DPLL0_S { - type Target = dpll0_s::RegisterBlock; +impl Deref for BuramS { + type Target = buram_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for DPLL0_S { +impl core::fmt::Debug for BuramS { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("DPLL0_S").finish() + f.debug_struct("BuramS").finish() } } -#[doc = "DPLL0_S Registers"] -pub mod dpll0_s; -#[doc = "LFXO_S Registers"] -pub struct LFXO_S { +#[doc = "BURAM_S Registers"] +pub mod buram_s; +#[doc = "BURTC_NS Registers"] +pub struct BurtcNs { _marker: PhantomData<*const ()>, } -unsafe impl Send for LFXO_S {} -impl LFXO_S { +unsafe impl Send for BurtcNs {} +impl BurtcNs { #[doc = r"Pointer to the register block"] - pub const PTR: *const lfxo_s::RegisterBlock = 0x4002_0000 as *const _; + pub const PTR: *const burtc_ns::RegisterBlock = 0x5006_4000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const lfxo_s::RegisterBlock { + pub const fn ptr() -> *const burtc_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for LFXO_S { - type Target = lfxo_s::RegisterBlock; +impl Deref for BurtcNs { + type Target = burtc_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for LFXO_S { +impl core::fmt::Debug for BurtcNs { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("LFXO_S").finish() + f.debug_struct("BurtcNs").finish() } } -#[doc = "LFXO_S Registers"] -pub mod lfxo_s; -#[doc = "LFRCO_S Registers"] -pub struct LFRCO_S { +#[doc = "BURTC_NS Registers"] +pub mod burtc_ns; +#[doc = "BURTC_S Registers"] +pub struct BurtcS { _marker: PhantomData<*const ()>, } -unsafe impl Send for LFRCO_S {} -impl LFRCO_S { +unsafe impl Send for BurtcS {} +impl BurtcS { #[doc = r"Pointer to the register block"] - pub const PTR: *const lfrco_s::RegisterBlock = 0x4002_4000 as *const _; + pub const PTR: *const burtc_s::RegisterBlock = 0x4006_4000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const lfrco_s::RegisterBlock { + pub const fn ptr() -> *const burtc_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for LFRCO_S { - type Target = lfrco_s::RegisterBlock; +impl Deref for BurtcS { + type Target = burtc_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for LFRCO_S { +impl core::fmt::Debug for BurtcS { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("LFRCO_S").finish() + f.debug_struct("BurtcS").finish() } } -#[doc = "LFRCO_S Registers"] -pub mod lfrco_s; -#[doc = "ULFRCO_S Registers"] -pub struct ULFRCO_S { +#[doc = "BURTC_S Registers"] +pub mod burtc_s; +#[doc = "CMU_NS Registers"] +pub struct CmuNs { _marker: PhantomData<*const ()>, } -unsafe impl Send for ULFRCO_S {} -impl ULFRCO_S { +unsafe impl Send for CmuNs {} +impl CmuNs { #[doc = r"Pointer to the register block"] - pub const PTR: *const ulfrco_s::RegisterBlock = 0x4002_8000 as *const _; + pub const PTR: *const cmu_ns::RegisterBlock = 0x5000_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const ulfrco_s::RegisterBlock { + pub const fn ptr() -> *const cmu_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for ULFRCO_S { - type Target = ulfrco_s::RegisterBlock; +impl Deref for CmuNs { + type Target = cmu_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ULFRCO_S { +impl core::fmt::Debug for CmuNs { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ULFRCO_S").finish() + f.debug_struct("CmuNs").finish() } } -#[doc = "ULFRCO_S Registers"] -pub mod ulfrco_s; -#[doc = "MSC_S Registers"] -pub struct MSC_S { +#[doc = "CMU_NS Registers"] +pub mod cmu_ns; +#[doc = "CMU_S Registers"] +pub struct CmuS { _marker: PhantomData<*const ()>, } -unsafe impl Send for MSC_S {} -impl MSC_S { +unsafe impl Send for CmuS {} +impl CmuS { #[doc = r"Pointer to the register block"] - pub const PTR: *const msc_s::RegisterBlock = 0x4003_0000 as *const _; + pub const PTR: *const cmu_s::RegisterBlock = 0x4000_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const msc_s::RegisterBlock { + pub const fn ptr() -> *const cmu_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for MSC_S { - type Target = msc_s::RegisterBlock; +impl Deref for CmuS { + type Target = cmu_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for MSC_S { +impl core::fmt::Debug for CmuS { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("MSC_S").finish() + f.debug_struct("CmuS").finish() } } -#[doc = "MSC_S Registers"] -pub mod msc_s; -#[doc = "ICACHE0_S Registers"] -pub struct ICACHE0_S { +#[doc = "CMU_S Registers"] +pub mod cmu_s; +#[doc = "DCDC_NS Registers"] +pub struct DcdcNs { _marker: PhantomData<*const ()>, } -unsafe impl Send for ICACHE0_S {} -impl ICACHE0_S { +unsafe impl Send for DcdcNs {} +impl DcdcNs { #[doc = r"Pointer to the register block"] - pub const PTR: *const icache0_s::RegisterBlock = 0x4003_4000 as *const _; + pub const PTR: *const dcdc_ns::RegisterBlock = 0x5009_4000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const icache0_s::RegisterBlock { + pub const fn ptr() -> *const dcdc_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for ICACHE0_S { - type Target = icache0_s::RegisterBlock; +impl Deref for DcdcNs { + type Target = dcdc_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ICACHE0_S { +impl core::fmt::Debug for DcdcNs { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ICACHE0_S").finish() + f.debug_struct("DcdcNs").finish() } } -#[doc = "ICACHE0_S Registers"] -pub mod icache0_s; -#[doc = "PRS_S Registers"] -pub struct PRS_S { +#[doc = "DCDC_NS Registers"] +pub mod dcdc_ns; +#[doc = "DCDC_S Registers"] +pub struct DcdcS { _marker: PhantomData<*const ()>, } -unsafe impl Send for PRS_S {} -impl PRS_S { +unsafe impl Send for DcdcS {} +impl DcdcS { #[doc = r"Pointer to the register block"] - pub const PTR: *const prs_s::RegisterBlock = 0x4003_8000 as *const _; + pub const PTR: *const dcdc_s::RegisterBlock = 0x4009_4000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const prs_s::RegisterBlock { + pub const fn ptr() -> *const dcdc_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for PRS_S { - type Target = prs_s::RegisterBlock; +impl Deref for DcdcS { + type Target = dcdc_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PRS_S { +impl core::fmt::Debug for DcdcS { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PRS_S").finish() + f.debug_struct("DcdcS").finish() } } -#[doc = "PRS_S Registers"] -pub mod prs_s; -#[doc = "GPIO_S Registers"] -pub struct GPIO_S { +#[doc = "DCDC_S Registers"] +pub mod dcdc_s; +#[doc = "DMEM_NS Registers"] +pub struct DmemNs { _marker: PhantomData<*const ()>, } -unsafe impl Send for GPIO_S {} -impl GPIO_S { +unsafe impl Send for DmemNs {} +impl DmemNs { #[doc = r"Pointer to the register block"] - pub const PTR: *const gpio_s::RegisterBlock = 0x4003_c000 as *const _; + pub const PTR: *const dmem_ns::RegisterBlock = 0x500b_4000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const gpio_s::RegisterBlock { + pub const fn ptr() -> *const dmem_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for GPIO_S { - type Target = gpio_s::RegisterBlock; +impl Deref for DmemNs { + type Target = dmem_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for GPIO_S { +impl core::fmt::Debug for DmemNs { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("GPIO_S").finish() + f.debug_struct("DmemNs").finish() } } -#[doc = "GPIO_S Registers"] -pub mod gpio_s; -#[doc = "LDMA_S Registers"] -pub struct LDMA_S { +#[doc = "DMEM_NS Registers"] +pub mod dmem_ns; +#[doc = "DMEM_S Registers"] +pub struct DmemS { _marker: PhantomData<*const ()>, } -unsafe impl Send for LDMA_S {} -impl LDMA_S { +unsafe impl Send for DmemS {} +impl DmemS { #[doc = r"Pointer to the register block"] - pub const PTR: *const ldma_s::RegisterBlock = 0x4004_0000 as *const _; + pub const PTR: *const dmem_s::RegisterBlock = 0x400b_4000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const ldma_s::RegisterBlock { + pub const fn ptr() -> *const dmem_s::RegisterBlock { Self::PTR } -} -impl Deref for LDMA_S { - type Target = ldma_s::RegisterBlock; - #[inline(always)] + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } +} +impl Deref for DmemS { + type Target = dmem_s::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for LDMA_S { +impl core::fmt::Debug for DmemS { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("LDMA_S").finish() + f.debug_struct("DmemS").finish() } } -#[doc = "LDMA_S Registers"] -pub mod ldma_s; -#[doc = "LDMAXBAR_S Registers"] -pub struct LDMAXBAR_S { +#[doc = "DMEM_S Registers"] +pub mod dmem_s; +#[doc = "DPLL0_NS Registers"] +pub struct Dpll0Ns { _marker: PhantomData<*const ()>, } -unsafe impl Send for LDMAXBAR_S {} -impl LDMAXBAR_S { +unsafe impl Send for Dpll0Ns {} +impl Dpll0Ns { #[doc = r"Pointer to the register block"] - pub const PTR: *const ldmaxbar_s::RegisterBlock = 0x4004_4000 as *const _; + pub const PTR: *const dpll0_ns::RegisterBlock = 0x5001_c000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const ldmaxbar_s::RegisterBlock { + pub const fn ptr() -> *const dpll0_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for LDMAXBAR_S { - type Target = ldmaxbar_s::RegisterBlock; +impl Deref for Dpll0Ns { + type Target = dpll0_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for LDMAXBAR_S { +impl core::fmt::Debug for Dpll0Ns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("LDMAXBAR_S").finish() + f.debug_struct("Dpll0Ns").finish() } } -#[doc = "LDMAXBAR_S Registers"] -pub mod ldmaxbar_s; -#[doc = "TIMER0_S Registers"] -pub struct TIMER0_S { +#[doc = "DPLL0_NS Registers"] +pub mod dpll0_ns; +#[doc = "DPLL0_S Registers"] +pub struct Dpll0S { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIMER0_S {} -impl TIMER0_S { +unsafe impl Send for Dpll0S {} +impl Dpll0S { #[doc = r"Pointer to the register block"] - pub const PTR: *const timer0_s::RegisterBlock = 0x4004_8000 as *const _; + pub const PTR: *const dpll0_s::RegisterBlock = 0x4001_c000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const timer0_s::RegisterBlock { + pub const fn ptr() -> *const dpll0_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIMER0_S { - type Target = timer0_s::RegisterBlock; +impl Deref for Dpll0S { + type Target = dpll0_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIMER0_S { +impl core::fmt::Debug for Dpll0S { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIMER0_S").finish() + f.debug_struct("Dpll0S").finish() } } -#[doc = "TIMER0_S Registers"] -pub mod timer0_s; -#[doc = "TIMER1_S Registers"] -pub struct TIMER1_S { +#[doc = "DPLL0_S Registers"] +pub mod dpll0_s; +#[doc = "EMU_NS Registers"] +pub struct EmuNs { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIMER1_S {} -impl TIMER1_S { +unsafe impl Send for EmuNs {} +impl EmuNs { #[doc = r"Pointer to the register block"] - pub const PTR: *const timer1_s::RegisterBlock = 0x4004_c000 as *const _; + pub const PTR: *const emu_ns::RegisterBlock = 0x5000_4000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const timer1_s::RegisterBlock { + pub const fn ptr() -> *const emu_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIMER1_S { - type Target = timer1_s::RegisterBlock; +impl Deref for EmuNs { + type Target = emu_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIMER1_S { +impl core::fmt::Debug for EmuNs { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIMER1_S").finish() + f.debug_struct("EmuNs").finish() } } -#[doc = "TIMER1_S Registers"] -pub mod timer1_s; -#[doc = "TIMER2_S Registers"] -pub struct TIMER2_S { +#[doc = "EMU_NS Registers"] +pub mod emu_ns; +#[doc = "EMU_S Registers"] +pub struct EmuS { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIMER2_S {} -impl TIMER2_S { +unsafe impl Send for EmuS {} +impl EmuS { #[doc = r"Pointer to the register block"] - pub const PTR: *const timer2_s::RegisterBlock = 0x4005_0000 as *const _; + pub const PTR: *const emu_s::RegisterBlock = 0x4000_4000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const timer2_s::RegisterBlock { + pub const fn ptr() -> *const emu_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIMER2_S { - type Target = timer2_s::RegisterBlock; +impl Deref for EmuS { + type Target = emu_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIMER2_S { +impl core::fmt::Debug for EmuS { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIMER2_S").finish() + f.debug_struct("EmuS").finish() } } -#[doc = "TIMER2_S Registers"] -pub mod timer2_s; -#[doc = "TIMER3_S Registers"] -pub struct TIMER3_S { +#[doc = "EMU_S Registers"] +pub mod emu_s; +#[doc = "EUSART0_NS Registers"] +pub struct Eusart0Ns { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIMER3_S {} -impl TIMER3_S { +unsafe impl Send for Eusart0Ns {} +impl Eusart0Ns { #[doc = r"Pointer to the register block"] - pub const PTR: *const timer3_s::RegisterBlock = 0x4005_4000 as *const _; + pub const PTR: *const eusart0_ns::RegisterBlock = 0x5b01_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const timer3_s::RegisterBlock { + pub const fn ptr() -> *const eusart0_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIMER3_S { - type Target = timer3_s::RegisterBlock; +impl Deref for Eusart0Ns { + type Target = eusart0_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIMER3_S { +impl core::fmt::Debug for Eusart0Ns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIMER3_S").finish() + f.debug_struct("Eusart0Ns").finish() } } -#[doc = "TIMER3_S Registers"] -pub mod timer3_s; -#[doc = "TIMER4_S Registers"] -pub struct TIMER4_S { +#[doc = "EUSART0_NS Registers"] +pub mod eusart0_ns; +#[doc = "EUSART0_S Registers"] +pub struct Eusart0S { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIMER4_S {} -impl TIMER4_S { +unsafe impl Send for Eusart0S {} +impl Eusart0S { #[doc = r"Pointer to the register block"] - pub const PTR: *const timer4_s::RegisterBlock = 0x4005_8000 as *const _; + pub const PTR: *const eusart0_s::RegisterBlock = 0x4b01_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const timer4_s::RegisterBlock { + pub const fn ptr() -> *const eusart0_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIMER4_S { - type Target = timer4_s::RegisterBlock; +impl Deref for Eusart0S { + type Target = eusart0_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIMER4_S { +impl core::fmt::Debug for Eusart0S { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIMER4_S").finish() + f.debug_struct("Eusart0S").finish() } } -#[doc = "TIMER4_S Registers"] -pub mod timer4_s; -#[doc = "USART0_S Registers"] -pub struct USART0_S { +#[doc = "EUSART0_S Registers"] +pub mod eusart0_s; +#[doc = "EUSART1_NS Registers"] +pub struct Eusart1Ns { _marker: PhantomData<*const ()>, } -unsafe impl Send for USART0_S {} -impl USART0_S { +unsafe impl Send for Eusart1Ns {} +impl Eusart1Ns { #[doc = r"Pointer to the register block"] - pub const PTR: *const usart0_s::RegisterBlock = 0x4005_c000 as *const _; + pub const PTR: *const eusart1_ns::RegisterBlock = 0x500a_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const usart0_s::RegisterBlock { + pub const fn ptr() -> *const eusart1_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for USART0_S { - type Target = usart0_s::RegisterBlock; +impl Deref for Eusart1Ns { + type Target = eusart1_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USART0_S { +impl core::fmt::Debug for Eusart1Ns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USART0_S").finish() + f.debug_struct("Eusart1Ns").finish() } } -#[doc = "USART0_S Registers"] -pub mod usart0_s; -#[doc = "BURTC_S Registers"] -pub struct BURTC_S { +#[doc = "EUSART1_NS Registers"] +pub mod eusart1_ns; +#[doc = "EUSART1_S Registers"] +pub struct Eusart1S { _marker: PhantomData<*const ()>, } -unsafe impl Send for BURTC_S {} -impl BURTC_S { +unsafe impl Send for Eusart1S {} +impl Eusart1S { #[doc = r"Pointer to the register block"] - pub const PTR: *const burtc_s::RegisterBlock = 0x4006_4000 as *const _; + pub const PTR: *const eusart1_s::RegisterBlock = 0x400a_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const burtc_s::RegisterBlock { + pub const fn ptr() -> *const eusart1_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for BURTC_S { - type Target = burtc_s::RegisterBlock; +impl Deref for Eusart1S { + type Target = eusart1_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for BURTC_S { +impl core::fmt::Debug for Eusart1S { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("BURTC_S").finish() + f.debug_struct("Eusart1S").finish() } } -#[doc = "BURTC_S Registers"] -pub mod burtc_s; -#[doc = "I2C1_S Registers"] -pub struct I2C1_S { +#[doc = "EUSART1_S Registers"] +pub mod eusart1_s; +#[doc = "EUSART2_NS Registers"] +pub struct Eusart2Ns { _marker: PhantomData<*const ()>, } -unsafe impl Send for I2C1_S {} -impl I2C1_S { +unsafe impl Send for Eusart2Ns {} +impl Eusart2Ns { #[doc = r"Pointer to the register block"] - pub const PTR: *const i2c1_s::RegisterBlock = 0x4006_8000 as *const _; + pub const PTR: *const eusart2_ns::RegisterBlock = 0x500a_4000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const i2c1_s::RegisterBlock { + pub const fn ptr() -> *const eusart2_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for I2C1_S { - type Target = i2c1_s::RegisterBlock; +impl Deref for Eusart2Ns { + type Target = eusart2_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for I2C1_S { +impl core::fmt::Debug for Eusart2Ns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("I2C1_S").finish() + f.debug_struct("Eusart2Ns").finish() } } -#[doc = "I2C1_S Registers"] -pub mod i2c1_s; -#[doc = "SYSCFG_S_CFGNS Registers"] -pub struct SYSCFG_S_CFGNS { +#[doc = "EUSART2_NS Registers"] +pub mod eusart2_ns; +#[doc = "EUSART2_S Registers"] +pub struct Eusart2S { _marker: PhantomData<*const ()>, } -unsafe impl Send for SYSCFG_S_CFGNS {} -impl SYSCFG_S_CFGNS { +unsafe impl Send for Eusart2S {} +impl Eusart2S { #[doc = r"Pointer to the register block"] - pub const PTR: *const syscfg_s_cfgns::RegisterBlock = 0x4007_8000 as *const _; + pub const PTR: *const eusart2_s::RegisterBlock = 0x400a_4000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const syscfg_s_cfgns::RegisterBlock { + pub const fn ptr() -> *const eusart2_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for SYSCFG_S_CFGNS { - type Target = syscfg_s_cfgns::RegisterBlock; +impl Deref for Eusart2S { + type Target = eusart2_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SYSCFG_S_CFGNS { +impl core::fmt::Debug for Eusart2S { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SYSCFG_S_CFGNS").finish() + f.debug_struct("Eusart2S").finish() } } -#[doc = "SYSCFG_S_CFGNS Registers"] -pub mod syscfg_s_cfgns; -#[doc = "SYSCFG_S Registers"] -pub struct SYSCFG_S { +#[doc = "EUSART2_S Registers"] +pub mod eusart2_s; +#[doc = "FSRCO_NS Registers"] +pub struct FsrcoNs { _marker: PhantomData<*const ()>, } -unsafe impl Send for SYSCFG_S {} -impl SYSCFG_S { +unsafe impl Send for FsrcoNs {} +impl FsrcoNs { #[doc = r"Pointer to the register block"] - pub const PTR: *const syscfg_s::RegisterBlock = 0x4007_c000 as *const _; + pub const PTR: *const fsrco_ns::RegisterBlock = 0x5001_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const syscfg_s::RegisterBlock { + pub const fn ptr() -> *const fsrco_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for SYSCFG_S { - type Target = syscfg_s::RegisterBlock; +impl Deref for FsrcoNs { + type Target = fsrco_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SYSCFG_S { +impl core::fmt::Debug for FsrcoNs { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SYSCFG_S").finish() + f.debug_struct("FsrcoNs").finish() } } -#[doc = "SYSCFG_S Registers"] -pub mod syscfg_s; -#[doc = "BURAM_S Registers"] -pub struct BURAM_S { +#[doc = "FSRCO_NS Registers"] +pub mod fsrco_ns; +#[doc = "FSRCO_S Registers"] +pub struct FsrcoS { _marker: PhantomData<*const ()>, } -unsafe impl Send for BURAM_S {} -impl BURAM_S { +unsafe impl Send for FsrcoS {} +impl FsrcoS { #[doc = r"Pointer to the register block"] - pub const PTR: *const buram_s::RegisterBlock = 0x4008_0000 as *const _; + pub const PTR: *const fsrco_s::RegisterBlock = 0x4001_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const buram_s::RegisterBlock { + pub const fn ptr() -> *const fsrco_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for BURAM_S { - type Target = buram_s::RegisterBlock; +impl Deref for FsrcoS { + type Target = fsrco_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for BURAM_S { +impl core::fmt::Debug for FsrcoS { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("BURAM_S").finish() + f.debug_struct("FsrcoS").finish() } } -#[doc = "BURAM_S Registers"] -pub mod buram_s; -#[doc = "GPCRC_S Registers"] -pub struct GPCRC_S { +#[doc = "FSRCO_S Registers"] +pub mod fsrco_s; +#[doc = "GPCRC_NS Registers"] +pub struct GpcrcNs { _marker: PhantomData<*const ()>, } -unsafe impl Send for GPCRC_S {} -impl GPCRC_S { +unsafe impl Send for GpcrcNs {} +impl GpcrcNs { #[doc = r"Pointer to the register block"] - pub const PTR: *const gpcrc_s::RegisterBlock = 0x4008_8000 as *const _; + pub const PTR: *const gpcrc_ns::RegisterBlock = 0x5008_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const gpcrc_s::RegisterBlock { + pub const fn ptr() -> *const gpcrc_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for GPCRC_S { - type Target = gpcrc_s::RegisterBlock; +impl Deref for GpcrcNs { + type Target = gpcrc_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for GPCRC_S { +impl core::fmt::Debug for GpcrcNs { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("GPCRC_S").finish() + f.debug_struct("GpcrcNs").finish() } } +#[doc = "GPCRC_NS Registers"] +pub mod gpcrc_ns; #[doc = "GPCRC_S Registers"] -pub mod gpcrc_s; -#[doc = "DCDC_S Registers"] -pub struct DCDC_S { +pub struct GpcrcS { _marker: PhantomData<*const ()>, } -unsafe impl Send for DCDC_S {} -impl DCDC_S { +unsafe impl Send for GpcrcS {} +impl GpcrcS { #[doc = r"Pointer to the register block"] - pub const PTR: *const dcdc_s::RegisterBlock = 0x4009_4000 as *const _; + pub const PTR: *const gpcrc_s::RegisterBlock = 0x4008_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const dcdc_s::RegisterBlock { + pub const fn ptr() -> *const gpcrc_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for DCDC_S { - type Target = dcdc_s::RegisterBlock; +impl Deref for GpcrcS { + type Target = gpcrc_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for DCDC_S { +impl core::fmt::Debug for GpcrcS { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("DCDC_S").finish() + f.debug_struct("GpcrcS").finish() } } -#[doc = "DCDC_S Registers"] -pub mod dcdc_s; -#[doc = "HOSTMAILBOX_S Registers"] -pub struct HOSTMAILBOX_S { +#[doc = "GPCRC_S Registers"] +pub mod gpcrc_s; +#[doc = "GPIO_NS Registers"] +pub struct GpioNs { _marker: PhantomData<*const ()>, } -unsafe impl Send for HOSTMAILBOX_S {} -impl HOSTMAILBOX_S { +unsafe impl Send for GpioNs {} +impl GpioNs { #[doc = r"Pointer to the register block"] - pub const PTR: *const hostmailbox_s::RegisterBlock = 0x4009_8000 as *const _; + pub const PTR: *const gpio_ns::RegisterBlock = 0x5003_c000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const hostmailbox_s::RegisterBlock { + pub const fn ptr() -> *const gpio_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for HOSTMAILBOX_S { - type Target = hostmailbox_s::RegisterBlock; +impl Deref for GpioNs { + type Target = gpio_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for HOSTMAILBOX_S { +impl core::fmt::Debug for GpioNs { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("HOSTMAILBOX_S").finish() + f.debug_struct("GpioNs").finish() } } -#[doc = "HOSTMAILBOX_S Registers"] -pub mod hostmailbox_s; -#[doc = "EUSART1_S Registers"] -pub struct EUSART1_S { +#[doc = "GPIO_NS Registers"] +pub mod gpio_ns; +#[doc = "GPIO_S Registers"] +pub struct GpioS { _marker: PhantomData<*const ()>, } -unsafe impl Send for EUSART1_S {} -impl EUSART1_S { +unsafe impl Send for GpioS {} +impl GpioS { #[doc = r"Pointer to the register block"] - pub const PTR: *const eusart1_s::RegisterBlock = 0x400a_0000 as *const _; + pub const PTR: *const gpio_s::RegisterBlock = 0x4003_c000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const eusart1_s::RegisterBlock { + pub const fn ptr() -> *const gpio_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for EUSART1_S { - type Target = eusart1_s::RegisterBlock; +impl Deref for GpioS { + type Target = gpio_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for EUSART1_S { +impl core::fmt::Debug for GpioS { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("EUSART1_S").finish() + f.debug_struct("GpioS").finish() } } -#[doc = "EUSART1_S Registers"] -pub mod eusart1_s; -#[doc = "EUSART2_S Registers"] -pub struct EUSART2_S { +#[doc = "GPIO_S Registers"] +pub mod gpio_s; +#[doc = "HFRCO0_NS Registers"] +pub struct Hfrco0Ns { _marker: PhantomData<*const ()>, } -unsafe impl Send for EUSART2_S {} -impl EUSART2_S { +unsafe impl Send for Hfrco0Ns {} +impl Hfrco0Ns { #[doc = r"Pointer to the register block"] - pub const PTR: *const eusart2_s::RegisterBlock = 0x400a_4000 as *const _; + pub const PTR: *const hfrco0_ns::RegisterBlock = 0x5001_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const eusart2_s::RegisterBlock { + pub const fn ptr() -> *const hfrco0_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for EUSART2_S { - type Target = eusart2_s::RegisterBlock; +impl Deref for Hfrco0Ns { + type Target = hfrco0_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for EUSART2_S { +impl core::fmt::Debug for Hfrco0Ns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("EUSART2_S").finish() + f.debug_struct("Hfrco0Ns").finish() } } -#[doc = "EUSART2_S Registers"] -pub mod eusart2_s; -#[doc = "SYSRTC0_S Registers"] -pub struct SYSRTC0_S { +#[doc = "HFRCO0_NS Registers"] +pub mod hfrco0_ns; +#[doc = "HFRCO0_S Registers"] +pub struct Hfrco0S { _marker: PhantomData<*const ()>, } -unsafe impl Send for SYSRTC0_S {} -impl SYSRTC0_S { +unsafe impl Send for Hfrco0S {} +impl Hfrco0S { #[doc = r"Pointer to the register block"] - pub const PTR: *const sysrtc0_s::RegisterBlock = 0x400a_8000 as *const _; + pub const PTR: *const hfrco0_s::RegisterBlock = 0x4001_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const sysrtc0_s::RegisterBlock { + pub const fn ptr() -> *const hfrco0_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for SYSRTC0_S { - type Target = sysrtc0_s::RegisterBlock; +impl Deref for Hfrco0S { + type Target = hfrco0_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SYSRTC0_S { +impl core::fmt::Debug for Hfrco0S { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SYSRTC0_S").finish() + f.debug_struct("Hfrco0S").finish() } } -#[doc = "SYSRTC0_S Registers"] -pub mod sysrtc0_s; -#[doc = "LCD_S Registers"] -pub struct LCD_S { +#[doc = "HFRCO0_S Registers"] +pub mod hfrco0_s; +#[doc = "HFRCOEM23_NS Registers"] +pub struct Hfrcoem23Ns { _marker: PhantomData<*const ()>, } -unsafe impl Send for LCD_S {} -impl LCD_S { +unsafe impl Send for Hfrcoem23Ns {} +impl Hfrcoem23Ns { #[doc = r"Pointer to the register block"] - pub const PTR: *const lcd_s::RegisterBlock = 0x400a_c000 as *const _; + pub const PTR: *const hfrcoem23_ns::RegisterBlock = 0x5a00_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const lcd_s::RegisterBlock { + pub const fn ptr() -> *const hfrcoem23_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for LCD_S { - type Target = lcd_s::RegisterBlock; +impl Deref for Hfrcoem23Ns { + type Target = hfrcoem23_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for LCD_S { +impl core::fmt::Debug for Hfrcoem23Ns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("LCD_S").finish() + f.debug_struct("Hfrcoem23Ns").finish() } } -#[doc = "LCD_S Registers"] -pub mod lcd_s; -#[doc = "KEYSCAN_S Registers"] -pub struct KEYSCAN_S { +#[doc = "HFRCOEM23_NS Registers"] +pub mod hfrcoem23_ns; +#[doc = "HFRCOEM23_S Registers"] +pub struct Hfrcoem23S { _marker: PhantomData<*const ()>, } -unsafe impl Send for KEYSCAN_S {} -impl KEYSCAN_S { +unsafe impl Send for Hfrcoem23S {} +impl Hfrcoem23S { #[doc = r"Pointer to the register block"] - pub const PTR: *const keyscan_s::RegisterBlock = 0x400b_0000 as *const _; + pub const PTR: *const hfrcoem23_s::RegisterBlock = 0x4a00_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const keyscan_s::RegisterBlock { + pub const fn ptr() -> *const hfrcoem23_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for KEYSCAN_S { - type Target = keyscan_s::RegisterBlock; +impl Deref for Hfrcoem23S { + type Target = hfrcoem23_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for KEYSCAN_S { +impl core::fmt::Debug for Hfrcoem23S { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("KEYSCAN_S").finish() + f.debug_struct("Hfrcoem23S").finish() } } -#[doc = "KEYSCAN_S Registers"] -pub mod keyscan_s; -#[doc = "DMEM_S Registers"] -pub struct DMEM_S { +#[doc = "HFRCOEM23_S Registers"] +pub mod hfrcoem23_s; +#[doc = "HFXO0_NS Registers"] +pub struct Hfxo0Ns { _marker: PhantomData<*const ()>, } -unsafe impl Send for DMEM_S {} -impl DMEM_S { +unsafe impl Send for Hfxo0Ns {} +impl Hfxo0Ns { #[doc = r"Pointer to the register block"] - pub const PTR: *const dmem_s::RegisterBlock = 0x400b_4000 as *const _; + pub const PTR: *const hfxo0_ns::RegisterBlock = 0x5a00_4000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const dmem_s::RegisterBlock { + pub const fn ptr() -> *const hfxo0_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for DMEM_S { - type Target = dmem_s::RegisterBlock; +impl Deref for Hfxo0Ns { + type Target = hfxo0_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for DMEM_S { +impl core::fmt::Debug for Hfxo0Ns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("DMEM_S").finish() + f.debug_struct("Hfxo0Ns").finish() } } -#[doc = "DMEM_S Registers"] -pub mod dmem_s; -#[doc = "LCDRF_S Registers"] -pub struct LCDRF_S { +#[doc = "HFXO0_NS Registers"] +pub mod hfxo0_ns; +#[doc = "HFXO0_S Registers"] +pub struct Hfxo0S { _marker: PhantomData<*const ()>, } -unsafe impl Send for LCDRF_S {} -impl LCDRF_S { +unsafe impl Send for Hfxo0S {} +impl Hfxo0S { #[doc = r"Pointer to the register block"] - pub const PTR: *const lcdrf_s::RegisterBlock = 0x400c_0000 as *const _; + pub const PTR: *const hfxo0_s::RegisterBlock = 0x4a00_4000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const lcdrf_s::RegisterBlock { + pub const fn ptr() -> *const hfxo0_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for LCDRF_S { - type Target = lcdrf_s::RegisterBlock; +impl Deref for Hfxo0S { + type Target = hfxo0_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for LCDRF_S { +impl core::fmt::Debug for Hfxo0S { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("LCDRF_S").finish() + f.debug_struct("Hfxo0S").finish() } } -#[doc = "LCDRF_S Registers"] -pub mod lcdrf_s; -#[doc = "SMU_S Registers"] -pub struct SMU_S { +#[doc = "HFXO0_S Registers"] +pub mod hfxo0_s; +#[doc = "HOSTMAILBOX_NS Registers"] +pub struct HostmailboxNs { _marker: PhantomData<*const ()>, } -unsafe impl Send for SMU_S {} -impl SMU_S { +unsafe impl Send for HostmailboxNs {} +impl HostmailboxNs { #[doc = r"Pointer to the register block"] - pub const PTR: *const smu_s::RegisterBlock = 0x4400_8000 as *const _; + pub const PTR: *const hostmailbox_ns::RegisterBlock = 0x5009_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const smu_s::RegisterBlock { + pub const fn ptr() -> *const hostmailbox_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for SMU_S { - type Target = smu_s::RegisterBlock; +impl Deref for HostmailboxNs { + type Target = hostmailbox_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SMU_S { +impl core::fmt::Debug for HostmailboxNs { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SMU_S").finish() + f.debug_struct("HostmailboxNs").finish() } } -#[doc = "SMU_S Registers"] -pub mod smu_s; -#[doc = "SMU_S_CFGNS Registers"] -pub struct SMU_S_CFGNS { +#[doc = "HOSTMAILBOX_NS Registers"] +pub mod hostmailbox_ns; +#[doc = "HOSTMAILBOX_S Registers"] +pub struct HostmailboxS { _marker: PhantomData<*const ()>, } -unsafe impl Send for SMU_S_CFGNS {} -impl SMU_S_CFGNS { +unsafe impl Send for HostmailboxS {} +impl HostmailboxS { #[doc = r"Pointer to the register block"] - pub const PTR: *const smu_s_cfgns::RegisterBlock = 0x4400_c000 as *const _; + pub const PTR: *const hostmailbox_s::RegisterBlock = 0x4009_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const smu_s_cfgns::RegisterBlock { + pub const fn ptr() -> *const hostmailbox_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for SMU_S_CFGNS { - type Target = smu_s_cfgns::RegisterBlock; +impl Deref for HostmailboxS { + type Target = hostmailbox_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SMU_S_CFGNS { +impl core::fmt::Debug for HostmailboxS { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SMU_S_CFGNS").finish() + f.debug_struct("HostmailboxS").finish() } } -#[doc = "SMU_S_CFGNS Registers"] -pub mod smu_s_cfgns; -#[doc = "LETIMER0_S Registers"] -pub struct LETIMER0_S { +#[doc = "HOSTMAILBOX_S Registers"] +pub mod hostmailbox_s; +#[doc = "I2C0_NS Registers"] +pub struct I2c0Ns { _marker: PhantomData<*const ()>, } -unsafe impl Send for LETIMER0_S {} -impl LETIMER0_S { +unsafe impl Send for I2c0Ns {} +impl I2c0Ns { #[doc = r"Pointer to the register block"] - pub const PTR: *const letimer0_s::RegisterBlock = 0x4900_0000 as *const _; + pub const PTR: *const i2c0_ns::RegisterBlock = 0x5b00_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const letimer0_s::RegisterBlock { + pub const fn ptr() -> *const i2c0_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for LETIMER0_S { - type Target = letimer0_s::RegisterBlock; +impl Deref for I2c0Ns { + type Target = i2c0_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for LETIMER0_S { +impl core::fmt::Debug for I2c0Ns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("LETIMER0_S").finish() + f.debug_struct("I2c0Ns").finish() } } -#[doc = "LETIMER0_S Registers"] -pub mod letimer0_s; -#[doc = "IADC0_S Registers"] -pub struct IADC0_S { +#[doc = "I2C0_NS Registers"] +pub mod i2c0_ns; +#[doc = "I2C0_S Registers"] +pub struct I2c0S { _marker: PhantomData<*const ()>, } -unsafe impl Send for IADC0_S {} -impl IADC0_S { +unsafe impl Send for I2c0S {} +impl I2c0S { #[doc = r"Pointer to the register block"] - pub const PTR: *const iadc0_s::RegisterBlock = 0x4900_4000 as *const _; + pub const PTR: *const i2c0_s::RegisterBlock = 0x4b00_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const iadc0_s::RegisterBlock { + pub const fn ptr() -> *const i2c0_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for IADC0_S { - type Target = iadc0_s::RegisterBlock; +impl Deref for I2c0S { + type Target = i2c0_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for IADC0_S { +impl core::fmt::Debug for I2c0S { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("IADC0_S").finish() + f.debug_struct("I2c0S").finish() } } -#[doc = "IADC0_S Registers"] -pub mod iadc0_s; -#[doc = "ACMP0_S Registers"] -pub struct ACMP0_S { +#[doc = "I2C0_S Registers"] +pub mod i2c0_s; +#[doc = "I2C1_NS Registers"] +pub struct I2c1Ns { _marker: PhantomData<*const ()>, } -unsafe impl Send for ACMP0_S {} -impl ACMP0_S { +unsafe impl Send for I2c1Ns {} +impl I2c1Ns { #[doc = r"Pointer to the register block"] - pub const PTR: *const acmp0_s::RegisterBlock = 0x4900_8000 as *const _; + pub const PTR: *const i2c1_ns::RegisterBlock = 0x5006_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const acmp0_s::RegisterBlock { + pub const fn ptr() -> *const i2c1_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for ACMP0_S { - type Target = acmp0_s::RegisterBlock; +impl Deref for I2c1Ns { + type Target = i2c1_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ACMP0_S { +impl core::fmt::Debug for I2c1Ns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ACMP0_S").finish() + f.debug_struct("I2c1Ns").finish() } } -#[doc = "ACMP0_S Registers"] -pub mod acmp0_s; -#[doc = "ACMP1_S Registers"] -pub struct ACMP1_S { +#[doc = "I2C1_NS Registers"] +pub mod i2c1_ns; +#[doc = "I2C1_S Registers"] +pub struct I2c1S { _marker: PhantomData<*const ()>, } -unsafe impl Send for ACMP1_S {} -impl ACMP1_S { +unsafe impl Send for I2c1S {} +impl I2c1S { #[doc = r"Pointer to the register block"] - pub const PTR: *const acmp1_s::RegisterBlock = 0x4900_c000 as *const _; + pub const PTR: *const i2c1_s::RegisterBlock = 0x4006_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const acmp1_s::RegisterBlock { + pub const fn ptr() -> *const i2c1_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for ACMP1_S { - type Target = acmp1_s::RegisterBlock; +impl Deref for I2c1S { + type Target = i2c1_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ACMP1_S { +impl core::fmt::Debug for I2c1S { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ACMP1_S").finish() + f.debug_struct("I2c1S").finish() } } -#[doc = "ACMP1_S Registers"] -pub mod acmp1_s; -#[doc = "VDAC0_S Registers"] -pub struct VDAC0_S { +#[doc = "I2C1_S Registers"] +pub mod i2c1_s; +#[doc = "IADC0_NS Registers"] +pub struct Iadc0Ns { _marker: PhantomData<*const ()>, } -unsafe impl Send for VDAC0_S {} -impl VDAC0_S { +unsafe impl Send for Iadc0Ns {} +impl Iadc0Ns { #[doc = r"Pointer to the register block"] - pub const PTR: *const vdac0_s::RegisterBlock = 0x4902_4000 as *const _; + pub const PTR: *const iadc0_ns::RegisterBlock = 0x5900_4000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const vdac0_s::RegisterBlock { + pub const fn ptr() -> *const iadc0_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for VDAC0_S { - type Target = vdac0_s::RegisterBlock; +impl Deref for Iadc0Ns { + type Target = iadc0_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for VDAC0_S { +impl core::fmt::Debug for Iadc0Ns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("VDAC0_S").finish() + f.debug_struct("Iadc0Ns").finish() } } -#[doc = "VDAC0_S Registers"] -pub mod vdac0_s; -#[doc = "PCNT0_S Registers"] -pub struct PCNT0_S { +#[doc = "IADC0_NS Registers"] +pub mod iadc0_ns; +#[doc = "IADC0_S Registers"] +pub struct Iadc0S { _marker: PhantomData<*const ()>, } -unsafe impl Send for PCNT0_S {} -impl PCNT0_S { +unsafe impl Send for Iadc0S {} +impl Iadc0S { #[doc = r"Pointer to the register block"] - pub const PTR: *const pcnt0_s::RegisterBlock = 0x4903_0000 as *const _; + pub const PTR: *const iadc0_s::RegisterBlock = 0x4900_4000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const pcnt0_s::RegisterBlock { + pub const fn ptr() -> *const iadc0_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for PCNT0_S { - type Target = pcnt0_s::RegisterBlock; +impl Deref for Iadc0S { + type Target = iadc0_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PCNT0_S { +impl core::fmt::Debug for Iadc0S { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PCNT0_S").finish() + f.debug_struct("Iadc0S").finish() } } -#[doc = "PCNT0_S Registers"] -pub mod pcnt0_s; - -#[doc = "HFRCOEM23_S Registers"] -pub struct HFRCOEM23_S { +#[doc = "IADC0_S Registers"] +pub mod iadc0_s; +#[doc = "ICACHE0_NS Registers"] +pub struct Icache0Ns { _marker: PhantomData<*const ()>, } -unsafe impl Send for HFRCOEM23_S {} -impl HFRCOEM23_S { +unsafe impl Send for Icache0Ns {} +impl Icache0Ns { #[doc = r"Pointer to the register block"] - pub const PTR: *const hfrcoem23_s::RegisterBlock = 0x4a00_0000 as *const _; + pub const PTR: *const icache0_ns::RegisterBlock = 0x5003_4000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const hfrcoem23_s::RegisterBlock { + pub const fn ptr() -> *const icache0_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for HFRCOEM23_S { - type Target = hfrcoem23_s::RegisterBlock; +impl Deref for Icache0Ns { + type Target = icache0_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for HFRCOEM23_S { +impl core::fmt::Debug for Icache0Ns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("HFRCOEM23_S").finish() + f.debug_struct("Icache0Ns").finish() } } -#[doc = "HFRCOEM23_S Registers"] -pub mod hfrcoem23_s; -#[doc = "HFXO0_S Registers"] -pub struct HFXO0_S { +#[doc = "ICACHE0_NS Registers"] +pub mod icache0_ns; +#[doc = "ICACHE0_S Registers"] +pub struct Icache0S { _marker: PhantomData<*const ()>, } -unsafe impl Send for HFXO0_S {} -impl HFXO0_S { +unsafe impl Send for Icache0S {} +impl Icache0S { #[doc = r"Pointer to the register block"] - pub const PTR: *const hfxo0_s::RegisterBlock = 0x4a00_4000 as *const _; + pub const PTR: *const icache0_s::RegisterBlock = 0x4003_4000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const hfxo0_s::RegisterBlock { + pub const fn ptr() -> *const icache0_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for HFXO0_S { - type Target = hfxo0_s::RegisterBlock; +impl Deref for Icache0S { + type Target = icache0_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for HFXO0_S { +impl core::fmt::Debug for Icache0S { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("HFXO0_S").finish() + f.debug_struct("Icache0S").finish() } } -#[doc = "HFXO0_S Registers"] -pub mod hfxo0_s; -#[doc = "I2C0_S Registers"] -pub struct I2C0_S { +#[doc = "ICACHE0_S Registers"] +pub mod icache0_s; +#[doc = "KEYSCAN_NS Registers"] +pub struct KeyscanNs { _marker: PhantomData<*const ()>, } -unsafe impl Send for I2C0_S {} -impl I2C0_S { +unsafe impl Send for KeyscanNs {} +impl KeyscanNs { #[doc = r"Pointer to the register block"] - pub const PTR: *const i2c0_s::RegisterBlock = 0x4b00_0000 as *const _; + pub const PTR: *const keyscan_ns::RegisterBlock = 0x500b_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const i2c0_s::RegisterBlock { + pub const fn ptr() -> *const keyscan_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for I2C0_S { - type Target = i2c0_s::RegisterBlock; +impl Deref for KeyscanNs { + type Target = keyscan_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for I2C0_S { +impl core::fmt::Debug for KeyscanNs { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("I2C0_S").finish() + f.debug_struct("KeyscanNs").finish() } } -#[doc = "I2C0_S Registers"] -pub mod i2c0_s; -#[doc = "WDOG0_S Registers"] -pub struct WDOG0_S { +#[doc = "KEYSCAN_NS Registers"] +pub mod keyscan_ns; +#[doc = "KEYSCAN_S Registers"] +pub struct KeyscanS { _marker: PhantomData<*const ()>, } -unsafe impl Send for WDOG0_S {} -impl WDOG0_S { +unsafe impl Send for KeyscanS {} +impl KeyscanS { #[doc = r"Pointer to the register block"] - pub const PTR: *const wdog0_s::RegisterBlock = 0x4b00_4000 as *const _; + pub const PTR: *const keyscan_s::RegisterBlock = 0x400b_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const wdog0_s::RegisterBlock { + pub const fn ptr() -> *const keyscan_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for WDOG0_S { - type Target = wdog0_s::RegisterBlock; +impl Deref for KeyscanS { + type Target = keyscan_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for WDOG0_S { +impl core::fmt::Debug for KeyscanS { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("WDOG0_S").finish() + f.debug_struct("KeyscanS").finish() } } -#[doc = "WDOG0_S Registers"] -pub mod wdog0_s; -#[doc = "WDOG1_S Registers"] -pub struct WDOG1_S { +#[doc = "KEYSCAN_S Registers"] +pub mod keyscan_s; +#[doc = "LCDRF_NS Registers"] +pub struct LcdrfNs { _marker: PhantomData<*const ()>, } -unsafe impl Send for WDOG1_S {} -impl WDOG1_S { +unsafe impl Send for LcdrfNs {} +impl LcdrfNs { #[doc = r"Pointer to the register block"] - pub const PTR: *const wdog1_s::RegisterBlock = 0x4b00_8000 as *const _; + pub const PTR: *const lcdrf_ns::RegisterBlock = 0x500c_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const wdog1_s::RegisterBlock { + pub const fn ptr() -> *const lcdrf_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for WDOG1_S { - type Target = wdog1_s::RegisterBlock; +impl Deref for LcdrfNs { + type Target = lcdrf_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for WDOG1_S { +impl core::fmt::Debug for LcdrfNs { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("WDOG1_S").finish() + f.debug_struct("LcdrfNs").finish() } } -#[doc = "WDOG1_S Registers"] -pub mod wdog1_s; -#[doc = "EUSART0_S Registers"] -pub struct EUSART0_S { +#[doc = "LCDRF_NS Registers"] +pub mod lcdrf_ns; +#[doc = "LCDRF_S Registers"] +pub struct LcdrfS { _marker: PhantomData<*const ()>, } -unsafe impl Send for EUSART0_S {} -impl EUSART0_S { +unsafe impl Send for LcdrfS {} +impl LcdrfS { #[doc = r"Pointer to the register block"] - pub const PTR: *const eusart0_s::RegisterBlock = 0x4b01_0000 as *const _; + pub const PTR: *const lcdrf_s::RegisterBlock = 0x400c_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const eusart0_s::RegisterBlock { + pub const fn ptr() -> *const lcdrf_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for EUSART0_S { - type Target = eusart0_s::RegisterBlock; +impl Deref for LcdrfS { + type Target = lcdrf_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for EUSART0_S { +impl core::fmt::Debug for LcdrfS { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("EUSART0_S").finish() + f.debug_struct("LcdrfS").finish() } } -#[doc = "EUSART0_S Registers"] -pub mod eusart0_s; -#[doc = "SEMAILBOX_S_HOST Registers"] -pub struct SEMAILBOX_S_HOST { +#[doc = "LCDRF_S Registers"] +pub mod lcdrf_s; +#[doc = "LCD_NS Registers"] +pub struct LcdNs { _marker: PhantomData<*const ()>, } -unsafe impl Send for SEMAILBOX_S_HOST {} -impl SEMAILBOX_S_HOST { +unsafe impl Send for LcdNs {} +impl LcdNs { #[doc = r"Pointer to the register block"] - pub const PTR: *const semailbox_s_host::RegisterBlock = 0x4c00_0000 as *const _; + pub const PTR: *const lcd_ns::RegisterBlock = 0x500a_c000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const semailbox_s_host::RegisterBlock { + pub const fn ptr() -> *const lcd_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for SEMAILBOX_S_HOST { - type Target = semailbox_s_host::RegisterBlock; +impl Deref for LcdNs { + type Target = lcd_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SEMAILBOX_S_HOST { +impl core::fmt::Debug for LcdNs { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SEMAILBOX_S_HOST").finish() + f.debug_struct("LcdNs").finish() } } -#[doc = "SEMAILBOX_S_HOST Registers"] -pub mod semailbox_s_host; -#[doc = "SCRATCHPAD_NS Registers"] -pub struct SCRATCHPAD_NS { +#[doc = "LCD_NS Registers"] +pub mod lcd_ns; +#[doc = "LCD_S Registers"] +pub struct LcdS { _marker: PhantomData<*const ()>, } -unsafe impl Send for SCRATCHPAD_NS {} -impl SCRATCHPAD_NS { +unsafe impl Send for LcdS {} +impl LcdS { #[doc = r"Pointer to the register block"] - pub const PTR: *const scratchpad_ns::RegisterBlock = 0x5000_0000 as *const _; + pub const PTR: *const lcd_s::RegisterBlock = 0x400a_c000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const scratchpad_ns::RegisterBlock { + pub const fn ptr() -> *const lcd_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for SCRATCHPAD_NS { - type Target = scratchpad_ns::RegisterBlock; +impl Deref for LcdS { + type Target = lcd_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SCRATCHPAD_NS { +impl core::fmt::Debug for LcdS { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SCRATCHPAD_NS").finish() + f.debug_struct("LcdS").finish() } } -#[doc = "SCRATCHPAD_NS Registers"] -pub mod scratchpad_ns; -#[doc = "EMU_NS Registers"] -pub struct EMU_NS { +#[doc = "LCD_S Registers"] +pub mod lcd_s; +#[doc = "LDMAXBAR_NS Registers"] +pub struct LdmaxbarNs { _marker: PhantomData<*const ()>, } -unsafe impl Send for EMU_NS {} -impl EMU_NS { +unsafe impl Send for LdmaxbarNs {} +impl LdmaxbarNs { #[doc = r"Pointer to the register block"] - pub const PTR: *const emu_ns::RegisterBlock = 0x5000_4000 as *const _; + pub const PTR: *const ldmaxbar_ns::RegisterBlock = 0x5004_4000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const emu_ns::RegisterBlock { + pub const fn ptr() -> *const ldmaxbar_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for EMU_NS { - type Target = emu_ns::RegisterBlock; +impl Deref for LdmaxbarNs { + type Target = ldmaxbar_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for EMU_NS { +impl core::fmt::Debug for LdmaxbarNs { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("EMU_NS").finish() + f.debug_struct("LdmaxbarNs").finish() } } -#[doc = "EMU_NS Registers"] -pub mod emu_ns; -#[doc = "CMU_NS Registers"] -pub struct CMU_NS { +#[doc = "LDMAXBAR_NS Registers"] +pub mod ldmaxbar_ns; +#[doc = "LDMAXBAR_S Registers"] +pub struct LdmaxbarS { _marker: PhantomData<*const ()>, } -unsafe impl Send for CMU_NS {} -impl CMU_NS { +unsafe impl Send for LdmaxbarS {} +impl LdmaxbarS { #[doc = r"Pointer to the register block"] - pub const PTR: *const cmu_ns::RegisterBlock = 0x5000_8000 as *const _; + pub const PTR: *const ldmaxbar_s::RegisterBlock = 0x4004_4000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const cmu_ns::RegisterBlock { + pub const fn ptr() -> *const ldmaxbar_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for CMU_NS { - type Target = cmu_ns::RegisterBlock; +impl Deref for LdmaxbarS { + type Target = ldmaxbar_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CMU_NS { +impl core::fmt::Debug for LdmaxbarS { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CMU_NS").finish() + f.debug_struct("LdmaxbarS").finish() } } -#[doc = "CMU_NS Registers"] -pub mod cmu_ns; -#[doc = "HFRCO0_NS Registers"] -pub struct HFRCO0_NS { +#[doc = "LDMAXBAR_S Registers"] +pub mod ldmaxbar_s; +#[doc = "LDMA_NS Registers"] +pub struct LdmaNs { _marker: PhantomData<*const ()>, } -unsafe impl Send for HFRCO0_NS {} -impl HFRCO0_NS { +unsafe impl Send for LdmaNs {} +impl LdmaNs { #[doc = r"Pointer to the register block"] - pub const PTR: *const hfrco0_ns::RegisterBlock = 0x5001_0000 as *const _; + pub const PTR: *const ldma_ns::RegisterBlock = 0x5004_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const hfrco0_ns::RegisterBlock { + pub const fn ptr() -> *const ldma_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for HFRCO0_NS { - type Target = hfrco0_ns::RegisterBlock; +impl Deref for LdmaNs { + type Target = ldma_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for HFRCO0_NS { +impl core::fmt::Debug for LdmaNs { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("HFRCO0_NS").finish() + f.debug_struct("LdmaNs").finish() } } -#[doc = "HFRCO0_NS Registers"] -pub mod hfrco0_ns; -#[doc = "FSRCO_NS Registers"] -pub struct FSRCO_NS { +#[doc = "LDMA_NS Registers"] +pub mod ldma_ns; +#[doc = "LDMA_S Registers"] +pub struct LdmaS { _marker: PhantomData<*const ()>, } -unsafe impl Send for FSRCO_NS {} -impl FSRCO_NS { +unsafe impl Send for LdmaS {} +impl LdmaS { #[doc = r"Pointer to the register block"] - pub const PTR: *const fsrco_ns::RegisterBlock = 0x5001_8000 as *const _; + pub const PTR: *const ldma_s::RegisterBlock = 0x4004_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const fsrco_ns::RegisterBlock { + pub const fn ptr() -> *const ldma_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for FSRCO_NS { - type Target = fsrco_ns::RegisterBlock; +impl Deref for LdmaS { + type Target = ldma_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for FSRCO_NS { +impl core::fmt::Debug for LdmaS { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FSRCO_NS").finish() + f.debug_struct("LdmaS").finish() } } -#[doc = "FSRCO_NS Registers"] -pub mod fsrco_ns; -#[doc = "DPLL0_NS Registers"] -pub struct DPLL0_NS { +#[doc = "LDMA_S Registers"] +pub mod ldma_s; +#[doc = "LETIMER0_NS Registers"] +pub struct Letimer0Ns { _marker: PhantomData<*const ()>, } -unsafe impl Send for DPLL0_NS {} -impl DPLL0_NS { +unsafe impl Send for Letimer0Ns {} +impl Letimer0Ns { #[doc = r"Pointer to the register block"] - pub const PTR: *const dpll0_ns::RegisterBlock = 0x5001_c000 as *const _; + pub const PTR: *const letimer0_ns::RegisterBlock = 0x5900_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const dpll0_ns::RegisterBlock { + pub const fn ptr() -> *const letimer0_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for DPLL0_NS { - type Target = dpll0_ns::RegisterBlock; +impl Deref for Letimer0Ns { + type Target = letimer0_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for DPLL0_NS { +impl core::fmt::Debug for Letimer0Ns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("DPLL0_NS").finish() + f.debug_struct("Letimer0Ns").finish() } } -#[doc = "DPLL0_NS Registers"] -pub mod dpll0_ns; -#[doc = "LFXO_NS Registers"] -pub struct LFXO_NS { +#[doc = "LETIMER0_NS Registers"] +pub mod letimer0_ns; +#[doc = "LETIMER0_S Registers"] +pub struct Letimer0S { _marker: PhantomData<*const ()>, } -unsafe impl Send for LFXO_NS {} -impl LFXO_NS { +unsafe impl Send for Letimer0S {} +impl Letimer0S { #[doc = r"Pointer to the register block"] - pub const PTR: *const lfxo_ns::RegisterBlock = 0x5002_0000 as *const _; + pub const PTR: *const letimer0_s::RegisterBlock = 0x4900_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const lfxo_ns::RegisterBlock { + pub const fn ptr() -> *const letimer0_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for LFXO_NS { - type Target = lfxo_ns::RegisterBlock; +impl Deref for Letimer0S { + type Target = letimer0_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for LFXO_NS { +impl core::fmt::Debug for Letimer0S { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("LFXO_NS").finish() + f.debug_struct("Letimer0S").finish() } } -#[doc = "LFXO_NS Registers"] -pub mod lfxo_ns; +#[doc = "LETIMER0_S Registers"] +pub mod letimer0_s; #[doc = "LFRCO_NS Registers"] -pub struct LFRCO_NS { +pub struct LfrcoNs { _marker: PhantomData<*const ()>, } -unsafe impl Send for LFRCO_NS {} -impl LFRCO_NS { +unsafe impl Send for LfrcoNs {} +impl LfrcoNs { #[doc = r"Pointer to the register block"] pub const PTR: *const lfrco_ns::RegisterBlock = 0x5002_4000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1941,1120 +2970,1839 @@ impl LFRCO_NS { pub const fn ptr() -> *const lfrco_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for LFRCO_NS { +impl Deref for LfrcoNs { type Target = lfrco_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for LFRCO_NS { +impl core::fmt::Debug for LfrcoNs { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("LFRCO_NS").finish() + f.debug_struct("LfrcoNs").finish() } } #[doc = "LFRCO_NS Registers"] pub mod lfrco_ns; -#[doc = "ULFRCO_NS Registers"] -pub struct ULFRCO_NS { +#[doc = "LFRCO_S Registers"] +pub struct LfrcoS { _marker: PhantomData<*const ()>, } -unsafe impl Send for ULFRCO_NS {} -impl ULFRCO_NS { +unsafe impl Send for LfrcoS {} +impl LfrcoS { #[doc = r"Pointer to the register block"] - pub const PTR: *const ulfrco_ns::RegisterBlock = 0x5002_8000 as *const _; + pub const PTR: *const lfrco_s::RegisterBlock = 0x4002_4000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const ulfrco_ns::RegisterBlock { + pub const fn ptr() -> *const lfrco_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for ULFRCO_NS { - type Target = ulfrco_ns::RegisterBlock; +impl Deref for LfrcoS { + type Target = lfrco_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ULFRCO_NS { +impl core::fmt::Debug for LfrcoS { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ULFRCO_NS").finish() + f.debug_struct("LfrcoS").finish() } } -#[doc = "ULFRCO_NS Registers"] -pub mod ulfrco_ns; -#[doc = "MSC_NS Registers"] -pub struct MSC_NS { +#[doc = "LFRCO_S Registers"] +pub mod lfrco_s; +#[doc = "LFXO_NS Registers"] +pub struct LfxoNs { _marker: PhantomData<*const ()>, } -unsafe impl Send for MSC_NS {} -impl MSC_NS { +unsafe impl Send for LfxoNs {} +impl LfxoNs { #[doc = r"Pointer to the register block"] - pub const PTR: *const msc_ns::RegisterBlock = 0x5003_0000 as *const _; + pub const PTR: *const lfxo_ns::RegisterBlock = 0x5002_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const msc_ns::RegisterBlock { + pub const fn ptr() -> *const lfxo_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for MSC_NS { - type Target = msc_ns::RegisterBlock; +impl Deref for LfxoNs { + type Target = lfxo_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for MSC_NS { +impl core::fmt::Debug for LfxoNs { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("MSC_NS").finish() + f.debug_struct("LfxoNs").finish() } } -#[doc = "MSC_NS Registers"] -pub mod msc_ns; -#[doc = "ICACHE0_NS Registers"] -pub struct ICACHE0_NS { +#[doc = "LFXO_NS Registers"] +pub mod lfxo_ns; +#[doc = "LFXO_S Registers"] +pub struct LfxoS { _marker: PhantomData<*const ()>, } -unsafe impl Send for ICACHE0_NS {} -impl ICACHE0_NS { +unsafe impl Send for LfxoS {} +impl LfxoS { #[doc = r"Pointer to the register block"] - pub const PTR: *const icache0_ns::RegisterBlock = 0x5003_4000 as *const _; + pub const PTR: *const lfxo_s::RegisterBlock = 0x4002_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const icache0_ns::RegisterBlock { + pub const fn ptr() -> *const lfxo_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for ICACHE0_NS { - type Target = icache0_ns::RegisterBlock; +impl Deref for LfxoS { + type Target = lfxo_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ICACHE0_NS { +impl core::fmt::Debug for LfxoS { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ICACHE0_NS").finish() + f.debug_struct("LfxoS").finish() } } -#[doc = "ICACHE0_NS Registers"] -pub mod icache0_ns; -#[doc = "PRS_NS Registers"] -pub struct PRS_NS { +#[doc = "LFXO_S Registers"] +pub mod lfxo_s; +#[doc = "MSC_NS Registers"] +pub struct MscNs { _marker: PhantomData<*const ()>, } -unsafe impl Send for PRS_NS {} -impl PRS_NS { +unsafe impl Send for MscNs {} +impl MscNs { #[doc = r"Pointer to the register block"] - pub const PTR: *const prs_ns::RegisterBlock = 0x5003_8000 as *const _; + pub const PTR: *const msc_ns::RegisterBlock = 0x5003_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const prs_ns::RegisterBlock { + pub const fn ptr() -> *const msc_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for PRS_NS { - type Target = prs_ns::RegisterBlock; +impl Deref for MscNs { + type Target = msc_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PRS_NS { +impl core::fmt::Debug for MscNs { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PRS_NS").finish() + f.debug_struct("MscNs").finish() } } -#[doc = "PRS_NS Registers"] -pub mod prs_ns; -#[doc = "GPIO_NS Registers"] -pub struct GPIO_NS { +#[doc = "MSC_NS Registers"] +pub mod msc_ns; +#[doc = "MSC_S Registers"] +pub struct MscS { _marker: PhantomData<*const ()>, } -unsafe impl Send for GPIO_NS {} -impl GPIO_NS { +unsafe impl Send for MscS {} +impl MscS { #[doc = r"Pointer to the register block"] - pub const PTR: *const gpio_ns::RegisterBlock = 0x5003_c000 as *const _; + pub const PTR: *const msc_s::RegisterBlock = 0x4003_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const gpio_ns::RegisterBlock { + pub const fn ptr() -> *const msc_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for GPIO_NS { - type Target = gpio_ns::RegisterBlock; +impl Deref for MscS { + type Target = msc_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for GPIO_NS { +impl core::fmt::Debug for MscS { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("GPIO_NS").finish() + f.debug_struct("MscS").finish() } } -#[doc = "GPIO_NS Registers"] -pub mod gpio_ns; -#[doc = "LDMA_NS Registers"] -pub struct LDMA_NS { +#[doc = "MSC_S Registers"] +pub mod msc_s; +#[doc = "PCNT0_NS Registers"] +pub struct Pcnt0Ns { _marker: PhantomData<*const ()>, } -unsafe impl Send for LDMA_NS {} -impl LDMA_NS { +unsafe impl Send for Pcnt0Ns {} +impl Pcnt0Ns { #[doc = r"Pointer to the register block"] - pub const PTR: *const ldma_ns::RegisterBlock = 0x5004_0000 as *const _; + pub const PTR: *const pcnt0_ns::RegisterBlock = 0x5903_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const ldma_ns::RegisterBlock { + pub const fn ptr() -> *const pcnt0_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for LDMA_NS { - type Target = ldma_ns::RegisterBlock; +impl Deref for Pcnt0Ns { + type Target = pcnt0_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for LDMA_NS { +impl core::fmt::Debug for Pcnt0Ns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("LDMA_NS").finish() + f.debug_struct("Pcnt0Ns").finish() } } -#[doc = "LDMA_NS Registers"] -pub mod ldma_ns; -#[doc = "LDMAXBAR_NS Registers"] -pub struct LDMAXBAR_NS { +#[doc = "PCNT0_NS Registers"] +pub mod pcnt0_ns; +#[doc = "PCNT0_S Registers"] +pub struct Pcnt0S { _marker: PhantomData<*const ()>, } -unsafe impl Send for LDMAXBAR_NS {} -impl LDMAXBAR_NS { +unsafe impl Send for Pcnt0S {} +impl Pcnt0S { #[doc = r"Pointer to the register block"] - pub const PTR: *const ldmaxbar_ns::RegisterBlock = 0x5004_4000 as *const _; + pub const PTR: *const pcnt0_s::RegisterBlock = 0x4903_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const ldmaxbar_ns::RegisterBlock { + pub const fn ptr() -> *const pcnt0_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for LDMAXBAR_NS { - type Target = ldmaxbar_ns::RegisterBlock; +impl Deref for Pcnt0S { + type Target = pcnt0_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for LDMAXBAR_NS { +impl core::fmt::Debug for Pcnt0S { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("LDMAXBAR_NS").finish() + f.debug_struct("Pcnt0S").finish() } } -#[doc = "LDMAXBAR_NS Registers"] -pub mod ldmaxbar_ns; -#[doc = "TIMER0_NS Registers"] -pub struct TIMER0_NS { +#[doc = "PCNT0_S Registers"] +pub mod pcnt0_s; +#[doc = "PRS_NS Registers"] +pub struct PrsNs { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIMER0_NS {} -impl TIMER0_NS { +unsafe impl Send for PrsNs {} +impl PrsNs { #[doc = r"Pointer to the register block"] - pub const PTR: *const timer0_ns::RegisterBlock = 0x5004_8000 as *const _; + pub const PTR: *const prs_ns::RegisterBlock = 0x5003_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const timer0_ns::RegisterBlock { + pub const fn ptr() -> *const prs_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIMER0_NS { - type Target = timer0_ns::RegisterBlock; +impl Deref for PrsNs { + type Target = prs_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIMER0_NS { +impl core::fmt::Debug for PrsNs { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIMER0_NS").finish() + f.debug_struct("PrsNs").finish() } } -#[doc = "TIMER0_NS Registers"] -pub mod timer0_ns; -#[doc = "TIMER1_NS Registers"] -pub struct TIMER1_NS { +#[doc = "PRS_NS Registers"] +pub mod prs_ns; +#[doc = "PRS_S Registers"] +pub struct PrsS { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIMER1_NS {} -impl TIMER1_NS { +unsafe impl Send for PrsS {} +impl PrsS { #[doc = r"Pointer to the register block"] - pub const PTR: *const timer1_ns::RegisterBlock = 0x5004_c000 as *const _; + pub const PTR: *const prs_s::RegisterBlock = 0x4003_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const timer1_ns::RegisterBlock { + pub const fn ptr() -> *const prs_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIMER1_NS { - type Target = timer1_ns::RegisterBlock; +impl Deref for PrsS { + type Target = prs_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIMER1_NS { +impl core::fmt::Debug for PrsS { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIMER1_NS").finish() + f.debug_struct("PrsS").finish() } } -#[doc = "TIMER1_NS Registers"] -pub mod timer1_ns; -#[doc = "TIMER2_NS Registers"] -pub struct TIMER2_NS { +#[doc = "PRS_S Registers"] +pub mod prs_s; +#[doc = "SCRATCHPAD_NS Registers"] +pub struct ScratchpadNs { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIMER2_NS {} -impl TIMER2_NS { +unsafe impl Send for ScratchpadNs {} +impl ScratchpadNs { #[doc = r"Pointer to the register block"] - pub const PTR: *const timer2_ns::RegisterBlock = 0x5005_0000 as *const _; + pub const PTR: *const scratchpad_ns::RegisterBlock = 0x5000_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const timer2_ns::RegisterBlock { + pub const fn ptr() -> *const scratchpad_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIMER2_NS { - type Target = timer2_ns::RegisterBlock; +impl Deref for ScratchpadNs { + type Target = scratchpad_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIMER2_NS { +impl core::fmt::Debug for ScratchpadNs { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIMER2_NS").finish() + f.debug_struct("ScratchpadNs").finish() } } -#[doc = "TIMER2_NS Registers"] -pub mod timer2_ns; -#[doc = "TIMER3_NS Registers"] -pub struct TIMER3_NS { +#[doc = "SCRATCHPAD_NS Registers"] +pub mod scratchpad_ns; +#[doc = "SCRATCHPAD_S Registers"] +pub struct ScratchpadS { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIMER3_NS {} -impl TIMER3_NS { +unsafe impl Send for ScratchpadS {} +impl ScratchpadS { #[doc = r"Pointer to the register block"] - pub const PTR: *const timer3_ns::RegisterBlock = 0x5005_4000 as *const _; + pub const PTR: *const scratchpad_s::RegisterBlock = 0x4000_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const timer3_ns::RegisterBlock { + pub const fn ptr() -> *const scratchpad_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIMER3_NS { - type Target = timer3_ns::RegisterBlock; +impl Deref for ScratchpadS { + type Target = scratchpad_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIMER3_NS { +impl core::fmt::Debug for ScratchpadS { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIMER3_NS").finish() + f.debug_struct("ScratchpadS").finish() } } -#[doc = "TIMER3_NS Registers"] -pub mod timer3_ns; -#[doc = "TIMER4_NS Registers"] -pub struct TIMER4_NS { +#[doc = "SCRATCHPAD_S Registers"] +pub mod scratchpad_s; +#[doc = "SEMAILBOX_NS_HOST Registers"] +pub struct SemailboxNsHost { _marker: PhantomData<*const ()>, } -unsafe impl Send for TIMER4_NS {} -impl TIMER4_NS { +unsafe impl Send for SemailboxNsHost {} +impl SemailboxNsHost { #[doc = r"Pointer to the register block"] - pub const PTR: *const timer4_ns::RegisterBlock = 0x5005_8000 as *const _; + pub const PTR: *const semailbox_ns_host::RegisterBlock = 0x5c00_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const timer4_ns::RegisterBlock { + pub const fn ptr() -> *const semailbox_ns_host::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for TIMER4_NS { - type Target = timer4_ns::RegisterBlock; +impl Deref for SemailboxNsHost { + type Target = semailbox_ns_host::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for TIMER4_NS { +impl core::fmt::Debug for SemailboxNsHost { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TIMER4_NS").finish() + f.debug_struct("SemailboxNsHost").finish() } } -#[doc = "TIMER4_NS Registers"] -pub mod timer4_ns; -#[doc = "USART0_NS Registers"] -pub struct USART0_NS { +#[doc = "SEMAILBOX_NS_HOST Registers"] +pub mod semailbox_ns_host; +#[doc = "SEMAILBOX_S_HOST Registers"] +pub struct SemailboxSHost { _marker: PhantomData<*const ()>, } -unsafe impl Send for USART0_NS {} -impl USART0_NS { +unsafe impl Send for SemailboxSHost {} +impl SemailboxSHost { #[doc = r"Pointer to the register block"] - pub const PTR: *const usart0_ns::RegisterBlock = 0x5005_c000 as *const _; + pub const PTR: *const semailbox_s_host::RegisterBlock = 0x4c00_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const usart0_ns::RegisterBlock { + pub const fn ptr() -> *const semailbox_s_host::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for USART0_NS { - type Target = usart0_ns::RegisterBlock; +impl Deref for SemailboxSHost { + type Target = semailbox_s_host::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USART0_NS { +impl core::fmt::Debug for SemailboxSHost { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USART0_NS").finish() + f.debug_struct("SemailboxSHost").finish() } } -#[doc = "USART0_NS Registers"] -pub mod usart0_ns; -#[doc = "BURTC_NS Registers"] -pub struct BURTC_NS { +#[doc = "SEMAILBOX_S_HOST Registers"] +pub mod semailbox_s_host; +#[doc = "SMU_NS Registers"] +pub struct SmuNs { _marker: PhantomData<*const ()>, } -unsafe impl Send for BURTC_NS {} -impl BURTC_NS { +unsafe impl Send for SmuNs {} +impl SmuNs { #[doc = r"Pointer to the register block"] - pub const PTR: *const burtc_ns::RegisterBlock = 0x5006_4000 as *const _; + pub const PTR: *const smu_ns::RegisterBlock = 0x5400_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const burtc_ns::RegisterBlock { + pub const fn ptr() -> *const smu_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for BURTC_NS { - type Target = burtc_ns::RegisterBlock; +impl Deref for SmuNs { + type Target = smu_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for BURTC_NS { +impl core::fmt::Debug for SmuNs { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("BURTC_NS").finish() + f.debug_struct("SmuNs").finish() } } -#[doc = "BURTC_NS Registers"] -pub mod burtc_ns; -#[doc = "I2C1_NS Registers"] -pub struct I2C1_NS { +#[doc = "SMU_NS Registers"] +pub mod smu_ns; +#[doc = "SMU_NS_CFGNS Registers"] +pub struct SmuNsCfgns { _marker: PhantomData<*const ()>, } -unsafe impl Send for I2C1_NS {} -impl I2C1_NS { +unsafe impl Send for SmuNsCfgns {} +impl SmuNsCfgns { #[doc = r"Pointer to the register block"] - pub const PTR: *const i2c1_ns::RegisterBlock = 0x5006_8000 as *const _; + pub const PTR: *const smu_ns_cfgns::RegisterBlock = 0x5400_c000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const i2c1_ns::RegisterBlock { + pub const fn ptr() -> *const smu_ns_cfgns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for I2C1_NS { - type Target = i2c1_ns::RegisterBlock; +impl Deref for SmuNsCfgns { + type Target = smu_ns_cfgns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for I2C1_NS { +impl core::fmt::Debug for SmuNsCfgns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("I2C1_NS").finish() + f.debug_struct("SmuNsCfgns").finish() } } -#[doc = "I2C1_NS Registers"] -pub mod i2c1_ns; -#[doc = "SYSCFG_NS_CFGNS Registers"] -pub struct SYSCFG_NS_CFGNS { +#[doc = "SMU_NS_CFGNS Registers"] +pub mod smu_ns_cfgns; +#[doc = "SMU_S Registers"] +pub struct SmuS { _marker: PhantomData<*const ()>, } -unsafe impl Send for SYSCFG_NS_CFGNS {} -impl SYSCFG_NS_CFGNS { +unsafe impl Send for SmuS {} +impl SmuS { #[doc = r"Pointer to the register block"] - pub const PTR: *const syscfg_ns_cfgns::RegisterBlock = 0x5007_8000 as *const _; + pub const PTR: *const smu_s::RegisterBlock = 0x4400_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const syscfg_ns_cfgns::RegisterBlock { + pub const fn ptr() -> *const smu_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for SYSCFG_NS_CFGNS { - type Target = syscfg_ns_cfgns::RegisterBlock; +impl Deref for SmuS { + type Target = smu_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SYSCFG_NS_CFGNS { +impl core::fmt::Debug for SmuS { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SYSCFG_NS_CFGNS").finish() + f.debug_struct("SmuS").finish() } } -#[doc = "SYSCFG_NS_CFGNS Registers"] -pub mod syscfg_ns_cfgns; -#[doc = "SYSCFG_NS Registers"] -pub struct SYSCFG_NS { +#[doc = "SMU_S Registers"] +pub mod smu_s; +#[doc = "SMU_S_CFGNS Registers"] +pub struct SmuSCfgns { _marker: PhantomData<*const ()>, } -unsafe impl Send for SYSCFG_NS {} -impl SYSCFG_NS { +unsafe impl Send for SmuSCfgns {} +impl SmuSCfgns { #[doc = r"Pointer to the register block"] - pub const PTR: *const syscfg_ns::RegisterBlock = 0x5007_c000 as *const _; + pub const PTR: *const smu_s_cfgns::RegisterBlock = 0x4400_c000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const syscfg_ns::RegisterBlock { + pub const fn ptr() -> *const smu_s_cfgns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for SYSCFG_NS { - type Target = syscfg_ns::RegisterBlock; +impl Deref for SmuSCfgns { + type Target = smu_s_cfgns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SYSCFG_NS { +impl core::fmt::Debug for SmuSCfgns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SYSCFG_NS").finish() + f.debug_struct("SmuSCfgns").finish() } } +#[doc = "SMU_S_CFGNS Registers"] +pub mod smu_s_cfgns; #[doc = "SYSCFG_NS Registers"] -pub mod syscfg_ns; -#[doc = "BURAM_NS Registers"] -pub struct BURAM_NS { +pub struct SyscfgNs { _marker: PhantomData<*const ()>, } -unsafe impl Send for BURAM_NS {} -impl BURAM_NS { +unsafe impl Send for SyscfgNs {} +impl SyscfgNs { #[doc = r"Pointer to the register block"] - pub const PTR: *const buram_ns::RegisterBlock = 0x5008_0000 as *const _; + pub const PTR: *const syscfg_ns::RegisterBlock = 0x5007_c000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const buram_ns::RegisterBlock { + pub const fn ptr() -> *const syscfg_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for BURAM_NS { - type Target = buram_ns::RegisterBlock; +impl Deref for SyscfgNs { + type Target = syscfg_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for BURAM_NS { +impl core::fmt::Debug for SyscfgNs { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("BURAM_NS").finish() + f.debug_struct("SyscfgNs").finish() } } -#[doc = "BURAM_NS Registers"] -pub mod buram_ns; -#[doc = "GPCRC_NS Registers"] -pub struct GPCRC_NS { +#[doc = "SYSCFG_NS Registers"] +pub mod syscfg_ns; +#[doc = "SYSCFG_NS_CFGNS Registers"] +pub struct SyscfgNsCfgns { _marker: PhantomData<*const ()>, } -unsafe impl Send for GPCRC_NS {} -impl GPCRC_NS { +unsafe impl Send for SyscfgNsCfgns {} +impl SyscfgNsCfgns { #[doc = r"Pointer to the register block"] - pub const PTR: *const gpcrc_ns::RegisterBlock = 0x5008_8000 as *const _; + pub const PTR: *const syscfg_ns_cfgns::RegisterBlock = 0x5007_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const gpcrc_ns::RegisterBlock { + pub const fn ptr() -> *const syscfg_ns_cfgns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for GPCRC_NS { - type Target = gpcrc_ns::RegisterBlock; +impl Deref for SyscfgNsCfgns { + type Target = syscfg_ns_cfgns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for GPCRC_NS { +impl core::fmt::Debug for SyscfgNsCfgns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("GPCRC_NS").finish() + f.debug_struct("SyscfgNsCfgns").finish() } } -#[doc = "GPCRC_NS Registers"] -pub mod gpcrc_ns; -#[doc = "DCDC_NS Registers"] -pub struct DCDC_NS { +#[doc = "SYSCFG_NS_CFGNS Registers"] +pub mod syscfg_ns_cfgns; +#[doc = "SYSCFG_S Registers"] +pub struct SyscfgS { _marker: PhantomData<*const ()>, } -unsafe impl Send for DCDC_NS {} -impl DCDC_NS { +unsafe impl Send for SyscfgS {} +impl SyscfgS { #[doc = r"Pointer to the register block"] - pub const PTR: *const dcdc_ns::RegisterBlock = 0x5009_4000 as *const _; + pub const PTR: *const syscfg_s::RegisterBlock = 0x4007_c000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const dcdc_ns::RegisterBlock { + pub const fn ptr() -> *const syscfg_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for DCDC_NS { - type Target = dcdc_ns::RegisterBlock; +impl Deref for SyscfgS { + type Target = syscfg_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for DCDC_NS { +impl core::fmt::Debug for SyscfgS { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("DCDC_NS").finish() + f.debug_struct("SyscfgS").finish() } } -#[doc = "DCDC_NS Registers"] -pub mod dcdc_ns; -#[doc = "HOSTMAILBOX_NS Registers"] -pub struct HOSTMAILBOX_NS { +#[doc = "SYSCFG_S Registers"] +pub mod syscfg_s; +#[doc = "SYSCFG_S_CFGNS Registers"] +pub struct SyscfgSCfgns { _marker: PhantomData<*const ()>, } -unsafe impl Send for HOSTMAILBOX_NS {} -impl HOSTMAILBOX_NS { +unsafe impl Send for SyscfgSCfgns {} +impl SyscfgSCfgns { #[doc = r"Pointer to the register block"] - pub const PTR: *const hostmailbox_ns::RegisterBlock = 0x5009_8000 as *const _; + pub const PTR: *const syscfg_s_cfgns::RegisterBlock = 0x4007_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const hostmailbox_ns::RegisterBlock { + pub const fn ptr() -> *const syscfg_s_cfgns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for HOSTMAILBOX_NS { - type Target = hostmailbox_ns::RegisterBlock; +impl Deref for SyscfgSCfgns { + type Target = syscfg_s_cfgns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for HOSTMAILBOX_NS { +impl core::fmt::Debug for SyscfgSCfgns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("HOSTMAILBOX_NS").finish() + f.debug_struct("SyscfgSCfgns").finish() } } -#[doc = "HOSTMAILBOX_NS Registers"] -pub mod hostmailbox_ns; -#[doc = "EUSART1_NS Registers"] -pub struct EUSART1_NS { +#[doc = "SYSCFG_S_CFGNS Registers"] +pub mod syscfg_s_cfgns; +#[doc = "SYSRTC0_NS Registers"] +pub struct Sysrtc0Ns { _marker: PhantomData<*const ()>, } -unsafe impl Send for EUSART1_NS {} -impl EUSART1_NS { +unsafe impl Send for Sysrtc0Ns {} +impl Sysrtc0Ns { #[doc = r"Pointer to the register block"] - pub const PTR: *const eusart1_ns::RegisterBlock = 0x500a_0000 as *const _; + pub const PTR: *const sysrtc0_ns::RegisterBlock = 0x500a_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const eusart1_ns::RegisterBlock { + pub const fn ptr() -> *const sysrtc0_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for EUSART1_NS { - type Target = eusart1_ns::RegisterBlock; +impl Deref for Sysrtc0Ns { + type Target = sysrtc0_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for EUSART1_NS { +impl core::fmt::Debug for Sysrtc0Ns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("EUSART1_NS").finish() + f.debug_struct("Sysrtc0Ns").finish() } } -#[doc = "EUSART1_NS Registers"] -pub mod eusart1_ns; -#[doc = "EUSART2_NS Registers"] -pub struct EUSART2_NS { +#[doc = "SYSRTC0_NS Registers"] +pub mod sysrtc0_ns; +#[doc = "SYSRTC0_S Registers"] +pub struct Sysrtc0S { _marker: PhantomData<*const ()>, } -unsafe impl Send for EUSART2_NS {} -impl EUSART2_NS { +unsafe impl Send for Sysrtc0S {} +impl Sysrtc0S { #[doc = r"Pointer to the register block"] - pub const PTR: *const eusart2_ns::RegisterBlock = 0x500a_4000 as *const _; + pub const PTR: *const sysrtc0_s::RegisterBlock = 0x400a_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const eusart2_ns::RegisterBlock { + pub const fn ptr() -> *const sysrtc0_s::RegisterBlock { Self::PTR } -} -impl Deref for EUSART2_NS { - type Target = eusart2_ns::RegisterBlock; - #[inline(always)] + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } +} +impl Deref for Sysrtc0S { + type Target = sysrtc0_s::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for EUSART2_NS { +impl core::fmt::Debug for Sysrtc0S { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("EUSART2_NS").finish() + f.debug_struct("Sysrtc0S").finish() } } -#[doc = "EUSART2_NS Registers"] -pub mod eusart2_ns; -#[doc = "SYSRTC0_NS Registers"] -pub struct SYSRTC0_NS { +#[doc = "SYSRTC0_S Registers"] +pub mod sysrtc0_s; +#[doc = "TIMER0_NS Registers"] +pub struct Timer0Ns { _marker: PhantomData<*const ()>, } -unsafe impl Send for SYSRTC0_NS {} -impl SYSRTC0_NS { +unsafe impl Send for Timer0Ns {} +impl Timer0Ns { #[doc = r"Pointer to the register block"] - pub const PTR: *const sysrtc0_ns::RegisterBlock = 0x500a_8000 as *const _; + pub const PTR: *const timer0_ns::RegisterBlock = 0x5004_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const sysrtc0_ns::RegisterBlock { + pub const fn ptr() -> *const timer0_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for SYSRTC0_NS { - type Target = sysrtc0_ns::RegisterBlock; +impl Deref for Timer0Ns { + type Target = timer0_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SYSRTC0_NS { +impl core::fmt::Debug for Timer0Ns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SYSRTC0_NS").finish() + f.debug_struct("Timer0Ns").finish() } } -#[doc = "SYSRTC0_NS Registers"] -pub mod sysrtc0_ns; -#[doc = "LCD_NS Registers"] -pub struct LCD_NS { +#[doc = "TIMER0_NS Registers"] +pub mod timer0_ns; +#[doc = "TIMER0_S Registers"] +pub struct Timer0S { _marker: PhantomData<*const ()>, } -unsafe impl Send for LCD_NS {} -impl LCD_NS { +unsafe impl Send for Timer0S {} +impl Timer0S { #[doc = r"Pointer to the register block"] - pub const PTR: *const lcd_ns::RegisterBlock = 0x500a_c000 as *const _; + pub const PTR: *const timer0_s::RegisterBlock = 0x4004_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const lcd_ns::RegisterBlock { + pub const fn ptr() -> *const timer0_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for LCD_NS { - type Target = lcd_ns::RegisterBlock; +impl Deref for Timer0S { + type Target = timer0_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for LCD_NS { +impl core::fmt::Debug for Timer0S { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("LCD_NS").finish() + f.debug_struct("Timer0S").finish() } } -#[doc = "LCD_NS Registers"] -pub mod lcd_ns; -#[doc = "KEYSCAN_NS Registers"] -pub struct KEYSCAN_NS { +#[doc = "TIMER0_S Registers"] +pub mod timer0_s; +#[doc = "TIMER1_NS Registers"] +pub struct Timer1Ns { _marker: PhantomData<*const ()>, } -unsafe impl Send for KEYSCAN_NS {} -impl KEYSCAN_NS { +unsafe impl Send for Timer1Ns {} +impl Timer1Ns { #[doc = r"Pointer to the register block"] - pub const PTR: *const keyscan_ns::RegisterBlock = 0x500b_0000 as *const _; + pub const PTR: *const timer1_ns::RegisterBlock = 0x5004_c000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const keyscan_ns::RegisterBlock { + pub const fn ptr() -> *const timer1_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for KEYSCAN_NS { - type Target = keyscan_ns::RegisterBlock; +impl Deref for Timer1Ns { + type Target = timer1_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for KEYSCAN_NS { +impl core::fmt::Debug for Timer1Ns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("KEYSCAN_NS").finish() + f.debug_struct("Timer1Ns").finish() } } -#[doc = "KEYSCAN_NS Registers"] -pub mod keyscan_ns; -#[doc = "DMEM_NS Registers"] -pub struct DMEM_NS { +#[doc = "TIMER1_NS Registers"] +pub mod timer1_ns; +#[doc = "TIMER1_S Registers"] +pub struct Timer1S { _marker: PhantomData<*const ()>, } -unsafe impl Send for DMEM_NS {} -impl DMEM_NS { +unsafe impl Send for Timer1S {} +impl Timer1S { #[doc = r"Pointer to the register block"] - pub const PTR: *const dmem_ns::RegisterBlock = 0x500b_4000 as *const _; + pub const PTR: *const timer1_s::RegisterBlock = 0x4004_c000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const dmem_ns::RegisterBlock { + pub const fn ptr() -> *const timer1_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for DMEM_NS { - type Target = dmem_ns::RegisterBlock; +impl Deref for Timer1S { + type Target = timer1_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for DMEM_NS { +impl core::fmt::Debug for Timer1S { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("DMEM_NS").finish() + f.debug_struct("Timer1S").finish() } } -#[doc = "DMEM_NS Registers"] -pub mod dmem_ns; -#[doc = "LCDRF_NS Registers"] -pub struct LCDRF_NS { +#[doc = "TIMER1_S Registers"] +pub mod timer1_s; +#[doc = "TIMER2_NS Registers"] +pub struct Timer2Ns { _marker: PhantomData<*const ()>, } -unsafe impl Send for LCDRF_NS {} -impl LCDRF_NS { +unsafe impl Send for Timer2Ns {} +impl Timer2Ns { #[doc = r"Pointer to the register block"] - pub const PTR: *const lcdrf_ns::RegisterBlock = 0x500c_0000 as *const _; + pub const PTR: *const timer2_ns::RegisterBlock = 0x5005_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const lcdrf_ns::RegisterBlock { + pub const fn ptr() -> *const timer2_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for LCDRF_NS { - type Target = lcdrf_ns::RegisterBlock; +impl Deref for Timer2Ns { + type Target = timer2_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for LCDRF_NS { +impl core::fmt::Debug for Timer2Ns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("LCDRF_NS").finish() + f.debug_struct("Timer2Ns").finish() } } -#[doc = "LCDRF_NS Registers"] -pub mod lcdrf_ns; -#[doc = "SMU_NS Registers"] -pub struct SMU_NS { +#[doc = "TIMER2_NS Registers"] +pub mod timer2_ns; +#[doc = "TIMER2_S Registers"] +pub struct Timer2S { _marker: PhantomData<*const ()>, } -unsafe impl Send for SMU_NS {} -impl SMU_NS { +unsafe impl Send for Timer2S {} +impl Timer2S { #[doc = r"Pointer to the register block"] - pub const PTR: *const smu_ns::RegisterBlock = 0x5400_8000 as *const _; + pub const PTR: *const timer2_s::RegisterBlock = 0x4005_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const smu_ns::RegisterBlock { + pub const fn ptr() -> *const timer2_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for SMU_NS { - type Target = smu_ns::RegisterBlock; +impl Deref for Timer2S { + type Target = timer2_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SMU_NS { +impl core::fmt::Debug for Timer2S { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SMU_NS").finish() + f.debug_struct("Timer2S").finish() } } -#[doc = "SMU_NS Registers"] -pub mod smu_ns; -#[doc = "SMU_NS_CFGNS Registers"] -pub struct SMU_NS_CFGNS { +#[doc = "TIMER2_S Registers"] +pub mod timer2_s; +#[doc = "TIMER3_NS Registers"] +pub struct Timer3Ns { _marker: PhantomData<*const ()>, } -unsafe impl Send for SMU_NS_CFGNS {} -impl SMU_NS_CFGNS { +unsafe impl Send for Timer3Ns {} +impl Timer3Ns { #[doc = r"Pointer to the register block"] - pub const PTR: *const smu_ns_cfgns::RegisterBlock = 0x5400_c000 as *const _; + pub const PTR: *const timer3_ns::RegisterBlock = 0x5005_4000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const smu_ns_cfgns::RegisterBlock { + pub const fn ptr() -> *const timer3_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for SMU_NS_CFGNS { - type Target = smu_ns_cfgns::RegisterBlock; +impl Deref for Timer3Ns { + type Target = timer3_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SMU_NS_CFGNS { +impl core::fmt::Debug for Timer3Ns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SMU_NS_CFGNS").finish() + f.debug_struct("Timer3Ns").finish() } } -#[doc = "SMU_NS_CFGNS Registers"] -pub mod smu_ns_cfgns; -#[doc = "LETIMER0_NS Registers"] -pub struct LETIMER0_NS { +#[doc = "TIMER3_NS Registers"] +pub mod timer3_ns; +#[doc = "TIMER3_S Registers"] +pub struct Timer3S { _marker: PhantomData<*const ()>, } -unsafe impl Send for LETIMER0_NS {} -impl LETIMER0_NS { +unsafe impl Send for Timer3S {} +impl Timer3S { #[doc = r"Pointer to the register block"] - pub const PTR: *const letimer0_ns::RegisterBlock = 0x5900_0000 as *const _; + pub const PTR: *const timer3_s::RegisterBlock = 0x4005_4000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const letimer0_ns::RegisterBlock { + pub const fn ptr() -> *const timer3_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for LETIMER0_NS { - type Target = letimer0_ns::RegisterBlock; +impl Deref for Timer3S { + type Target = timer3_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for LETIMER0_NS { +impl core::fmt::Debug for Timer3S { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("LETIMER0_NS").finish() + f.debug_struct("Timer3S").finish() } } -#[doc = "LETIMER0_NS Registers"] -pub mod letimer0_ns; -#[doc = "IADC0_NS Registers"] -pub struct IADC0_NS { +#[doc = "TIMER3_S Registers"] +pub mod timer3_s; +#[doc = "TIMER4_NS Registers"] +pub struct Timer4Ns { _marker: PhantomData<*const ()>, } -unsafe impl Send for IADC0_NS {} -impl IADC0_NS { +unsafe impl Send for Timer4Ns {} +impl Timer4Ns { #[doc = r"Pointer to the register block"] - pub const PTR: *const iadc0_ns::RegisterBlock = 0x5900_4000 as *const _; + pub const PTR: *const timer4_ns::RegisterBlock = 0x5005_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const iadc0_ns::RegisterBlock { + pub const fn ptr() -> *const timer4_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for IADC0_NS { - type Target = iadc0_ns::RegisterBlock; +impl Deref for Timer4Ns { + type Target = timer4_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for IADC0_NS { +impl core::fmt::Debug for Timer4Ns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("IADC0_NS").finish() + f.debug_struct("Timer4Ns").finish() } } -#[doc = "IADC0_NS Registers"] -pub mod iadc0_ns; -#[doc = "ACMP0_NS Registers"] -pub struct ACMP0_NS { +#[doc = "TIMER4_NS Registers"] +pub mod timer4_ns; +#[doc = "TIMER4_S Registers"] +pub struct Timer4S { _marker: PhantomData<*const ()>, } -unsafe impl Send for ACMP0_NS {} -impl ACMP0_NS { +unsafe impl Send for Timer4S {} +impl Timer4S { #[doc = r"Pointer to the register block"] - pub const PTR: *const acmp0_ns::RegisterBlock = 0x5900_8000 as *const _; + pub const PTR: *const timer4_s::RegisterBlock = 0x4005_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const acmp0_ns::RegisterBlock { + pub const fn ptr() -> *const timer4_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for ACMP0_NS { - type Target = acmp0_ns::RegisterBlock; +impl Deref for Timer4S { + type Target = timer4_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ACMP0_NS { +impl core::fmt::Debug for Timer4S { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ACMP0_NS").finish() + f.debug_struct("Timer4S").finish() } } -#[doc = "ACMP0_NS Registers"] -pub mod acmp0_ns; -#[doc = "ACMP1_NS Registers"] -pub struct ACMP1_NS { +#[doc = "TIMER4_S Registers"] +pub mod timer4_s; +#[doc = "ULFRCO_NS Registers"] +pub struct UlfrcoNs { _marker: PhantomData<*const ()>, } -unsafe impl Send for ACMP1_NS {} -impl ACMP1_NS { +unsafe impl Send for UlfrcoNs {} +impl UlfrcoNs { #[doc = r"Pointer to the register block"] - pub const PTR: *const acmp1_ns::RegisterBlock = 0x5900_c000 as *const _; + pub const PTR: *const ulfrco_ns::RegisterBlock = 0x5002_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const acmp1_ns::RegisterBlock { + pub const fn ptr() -> *const ulfrco_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for ACMP1_NS { - type Target = acmp1_ns::RegisterBlock; +impl Deref for UlfrcoNs { + type Target = ulfrco_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ACMP1_NS { +impl core::fmt::Debug for UlfrcoNs { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ACMP1_NS").finish() + f.debug_struct("UlfrcoNs").finish() } } -#[doc = "ACMP1_NS Registers"] -pub mod acmp1_ns; -#[doc = "VDAC0_NS Registers"] -pub struct VDAC0_NS { +#[doc = "ULFRCO_NS Registers"] +pub mod ulfrco_ns; +#[doc = "ULFRCO_S Registers"] +pub struct UlfrcoS { _marker: PhantomData<*const ()>, } -unsafe impl Send for VDAC0_NS {} -impl VDAC0_NS { +unsafe impl Send for UlfrcoS {} +impl UlfrcoS { #[doc = r"Pointer to the register block"] - pub const PTR: *const vdac0_ns::RegisterBlock = 0x5902_4000 as *const _; + pub const PTR: *const ulfrco_s::RegisterBlock = 0x4002_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const vdac0_ns::RegisterBlock { + pub const fn ptr() -> *const ulfrco_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for VDAC0_NS { - type Target = vdac0_ns::RegisterBlock; +impl Deref for UlfrcoS { + type Target = ulfrco_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for VDAC0_NS { +impl core::fmt::Debug for UlfrcoS { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("VDAC0_NS").finish() + f.debug_struct("UlfrcoS").finish() } } -#[doc = "VDAC0_NS Registers"] -pub mod vdac0_ns; -#[doc = "PCNT0_NS Registers"] -pub struct PCNT0_NS { +#[doc = "ULFRCO_S Registers"] +pub mod ulfrco_s; +#[doc = "USART0_NS Registers"] +pub struct Usart0Ns { _marker: PhantomData<*const ()>, } -unsafe impl Send for PCNT0_NS {} -impl PCNT0_NS { +unsafe impl Send for Usart0Ns {} +impl Usart0Ns { #[doc = r"Pointer to the register block"] - pub const PTR: *const pcnt0_ns::RegisterBlock = 0x5903_0000 as *const _; + pub const PTR: *const usart0_ns::RegisterBlock = 0x5005_c000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const pcnt0_ns::RegisterBlock { + pub const fn ptr() -> *const usart0_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for PCNT0_NS { - type Target = pcnt0_ns::RegisterBlock; +impl Deref for Usart0Ns { + type Target = usart0_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PCNT0_NS { +impl core::fmt::Debug for Usart0Ns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PCNT0_NS").finish() + f.debug_struct("Usart0Ns").finish() } } -#[doc = "PCNT0_NS Registers"] -pub mod pcnt0_ns; - -#[doc = "HFRCOEM23_NS Registers"] -pub struct HFRCOEM23_NS { +#[doc = "USART0_NS Registers"] +pub mod usart0_ns; +#[doc = "USART0_S Registers"] +pub struct Usart0S { _marker: PhantomData<*const ()>, } -unsafe impl Send for HFRCOEM23_NS {} -impl HFRCOEM23_NS { +unsafe impl Send for Usart0S {} +impl Usart0S { #[doc = r"Pointer to the register block"] - pub const PTR: *const hfrcoem23_ns::RegisterBlock = 0x5a00_0000 as *const _; + pub const PTR: *const usart0_s::RegisterBlock = 0x4005_c000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const hfrcoem23_ns::RegisterBlock { + pub const fn ptr() -> *const usart0_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for HFRCOEM23_NS { - type Target = hfrcoem23_ns::RegisterBlock; +impl Deref for Usart0S { + type Target = usart0_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for HFRCOEM23_NS { +impl core::fmt::Debug for Usart0S { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("HFRCOEM23_NS").finish() + f.debug_struct("Usart0S").finish() } } -#[doc = "HFRCOEM23_NS Registers"] -pub mod hfrcoem23_ns; -#[doc = "HFXO0_NS Registers"] -pub struct HFXO0_NS { +#[doc = "USART0_S Registers"] +pub mod usart0_s; +#[doc = "VDAC0_NS Registers"] +pub struct Vdac0Ns { _marker: PhantomData<*const ()>, } -unsafe impl Send for HFXO0_NS {} -impl HFXO0_NS { +unsafe impl Send for Vdac0Ns {} +impl Vdac0Ns { #[doc = r"Pointer to the register block"] - pub const PTR: *const hfxo0_ns::RegisterBlock = 0x5a00_4000 as *const _; + pub const PTR: *const vdac0_ns::RegisterBlock = 0x5902_4000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const hfxo0_ns::RegisterBlock { + pub const fn ptr() -> *const vdac0_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for HFXO0_NS { - type Target = hfxo0_ns::RegisterBlock; +impl Deref for Vdac0Ns { + type Target = vdac0_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for HFXO0_NS { +impl core::fmt::Debug for Vdac0Ns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("HFXO0_NS").finish() + f.debug_struct("Vdac0Ns").finish() } } -#[doc = "HFXO0_NS Registers"] -pub mod hfxo0_ns; -#[doc = "I2C0_NS Registers"] -pub struct I2C0_NS { +#[doc = "VDAC0_NS Registers"] +pub mod vdac0_ns; +#[doc = "VDAC0_S Registers"] +pub struct Vdac0S { _marker: PhantomData<*const ()>, } -unsafe impl Send for I2C0_NS {} -impl I2C0_NS { +unsafe impl Send for Vdac0S {} +impl Vdac0S { #[doc = r"Pointer to the register block"] - pub const PTR: *const i2c0_ns::RegisterBlock = 0x5b00_0000 as *const _; + pub const PTR: *const vdac0_s::RegisterBlock = 0x4902_4000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const i2c0_ns::RegisterBlock { + pub const fn ptr() -> *const vdac0_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for I2C0_NS { - type Target = i2c0_ns::RegisterBlock; +impl Deref for Vdac0S { + type Target = vdac0_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for I2C0_NS { +impl core::fmt::Debug for Vdac0S { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("I2C0_NS").finish() + f.debug_struct("Vdac0S").finish() } } -#[doc = "I2C0_NS Registers"] -pub mod i2c0_ns; +#[doc = "VDAC0_S Registers"] +pub mod vdac0_s; #[doc = "WDOG0_NS Registers"] -pub struct WDOG0_NS { +pub struct Wdog0Ns { _marker: PhantomData<*const ()>, } -unsafe impl Send for WDOG0_NS {} -impl WDOG0_NS { +unsafe impl Send for Wdog0Ns {} +impl Wdog0Ns { #[doc = r"Pointer to the register block"] pub const PTR: *const wdog0_ns::RegisterBlock = 0x5b00_4000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3062,111 +4810,183 @@ impl WDOG0_NS { pub const fn ptr() -> *const wdog0_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for WDOG0_NS { +impl Deref for Wdog0Ns { type Target = wdog0_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for WDOG0_NS { +impl core::fmt::Debug for Wdog0Ns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("WDOG0_NS").finish() + f.debug_struct("Wdog0Ns").finish() } } #[doc = "WDOG0_NS Registers"] pub mod wdog0_ns; -#[doc = "WDOG1_NS Registers"] -pub struct WDOG1_NS { +#[doc = "WDOG0_S Registers"] +pub struct Wdog0S { _marker: PhantomData<*const ()>, } -unsafe impl Send for WDOG1_NS {} -impl WDOG1_NS { +unsafe impl Send for Wdog0S {} +impl Wdog0S { #[doc = r"Pointer to the register block"] - pub const PTR: *const wdog1_ns::RegisterBlock = 0x5b00_8000 as *const _; + pub const PTR: *const wdog0_s::RegisterBlock = 0x4b00_4000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const wdog1_ns::RegisterBlock { + pub const fn ptr() -> *const wdog0_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for WDOG1_NS { - type Target = wdog1_ns::RegisterBlock; +impl Deref for Wdog0S { + type Target = wdog0_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for WDOG1_NS { +impl core::fmt::Debug for Wdog0S { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("WDOG1_NS").finish() + f.debug_struct("Wdog0S").finish() } } +#[doc = "WDOG0_S Registers"] +pub mod wdog0_s; #[doc = "WDOG1_NS Registers"] -pub mod wdog1_ns; -#[doc = "EUSART0_NS Registers"] -pub struct EUSART0_NS { +pub struct Wdog1Ns { _marker: PhantomData<*const ()>, } -unsafe impl Send for EUSART0_NS {} -impl EUSART0_NS { +unsafe impl Send for Wdog1Ns {} +impl Wdog1Ns { #[doc = r"Pointer to the register block"] - pub const PTR: *const eusart0_ns::RegisterBlock = 0x5b01_0000 as *const _; + pub const PTR: *const wdog1_ns::RegisterBlock = 0x5b00_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const eusart0_ns::RegisterBlock { + pub const fn ptr() -> *const wdog1_ns::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for EUSART0_NS { - type Target = eusart0_ns::RegisterBlock; +impl Deref for Wdog1Ns { + type Target = wdog1_ns::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for EUSART0_NS { +impl core::fmt::Debug for Wdog1Ns { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("EUSART0_NS").finish() + f.debug_struct("Wdog1Ns").finish() } } -#[doc = "EUSART0_NS Registers"] -pub mod eusart0_ns; -#[doc = "SEMAILBOX_NS_HOST Registers"] -pub struct SEMAILBOX_NS_HOST { +#[doc = "WDOG1_NS Registers"] +pub mod wdog1_ns; +#[doc = "WDOG1_S Registers"] +pub struct Wdog1S { _marker: PhantomData<*const ()>, } -unsafe impl Send for SEMAILBOX_NS_HOST {} -impl SEMAILBOX_NS_HOST { +unsafe impl Send for Wdog1S {} +impl Wdog1S { #[doc = r"Pointer to the register block"] - pub const PTR: *const semailbox_ns_host::RegisterBlock = 0x5c00_0000 as *const _; + pub const PTR: *const wdog1_s::RegisterBlock = 0x4b00_8000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] - pub const fn ptr() -> *const semailbox_ns_host::RegisterBlock { + pub const fn ptr() -> *const wdog1_s::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for SEMAILBOX_NS_HOST { - type Target = semailbox_ns_host::RegisterBlock; +impl Deref for Wdog1S { + type Target = wdog1_s::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SEMAILBOX_NS_HOST { +impl core::fmt::Debug for Wdog1S { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SEMAILBOX_NS_HOST").finish() + f.debug_struct("Wdog1S").finish() } } -#[doc = "SEMAILBOX_NS_HOST Registers"] -pub mod semailbox_ns_host; +#[doc = "WDOG1_S Registers"] +pub mod wdog1_s; #[doc = "DEVINFO Registers"] -pub struct DEVINFO { +pub struct Devinfo { _marker: PhantomData<*const ()>, } -unsafe impl Send for DEVINFO {} -impl DEVINFO { +unsafe impl Send for Devinfo {} +impl Devinfo { #[doc = r"Pointer to the register block"] pub const PTR: *const devinfo::RegisterBlock = 0x0fe0_8000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3174,17 +4994,35 @@ impl DEVINFO { pub const fn ptr() -> *const devinfo::RegisterBlock { Self::PTR } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } } -impl Deref for DEVINFO { +impl Deref for Devinfo { type Target = devinfo::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for DEVINFO { +impl core::fmt::Debug for Devinfo { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("DEVINFO").finish() + f.debug_struct("Devinfo").finish() } } #[doc = "DEVINFO Registers"] @@ -3194,212 +5032,212 @@ static mut DEVICE_PERIPHERALS: bool = false; #[doc = r" All the peripherals."] #[allow(non_snake_case)] pub struct Peripherals { - #[doc = "SCRATCHPAD_S"] - pub SCRATCHPAD_S: SCRATCHPAD_S, - #[doc = "EMU_S"] - pub EMU_S: EMU_S, - #[doc = "CMU_S"] - pub CMU_S: CMU_S, - #[doc = "HFRCO0_S"] - pub HFRCO0_S: HFRCO0_S, - #[doc = "FSRCO_S"] - pub FSRCO_S: FSRCO_S, - #[doc = "DPLL0_S"] - pub DPLL0_S: DPLL0_S, - #[doc = "LFXO_S"] - pub LFXO_S: LFXO_S, - #[doc = "LFRCO_S"] - pub LFRCO_S: LFRCO_S, - #[doc = "ULFRCO_S"] - pub ULFRCO_S: ULFRCO_S, - #[doc = "MSC_S"] - pub MSC_S: MSC_S, - #[doc = "ICACHE0_S"] - pub ICACHE0_S: ICACHE0_S, - #[doc = "PRS_S"] - pub PRS_S: PRS_S, - #[doc = "GPIO_S"] - pub GPIO_S: GPIO_S, - #[doc = "LDMA_S"] - pub LDMA_S: LDMA_S, - #[doc = "LDMAXBAR_S"] - pub LDMAXBAR_S: LDMAXBAR_S, - #[doc = "TIMER0_S"] - pub TIMER0_S: TIMER0_S, - #[doc = "TIMER1_S"] - pub TIMER1_S: TIMER1_S, - #[doc = "TIMER2_S"] - pub TIMER2_S: TIMER2_S, - #[doc = "TIMER3_S"] - pub TIMER3_S: TIMER3_S, - #[doc = "TIMER4_S"] - pub TIMER4_S: TIMER4_S, - #[doc = "USART0_S"] - pub USART0_S: USART0_S, - #[doc = "BURTC_S"] - pub BURTC_S: BURTC_S, - #[doc = "I2C1_S"] - pub I2C1_S: I2C1_S, - #[doc = "SYSCFG_S_CFGNS"] - pub SYSCFG_S_CFGNS: SYSCFG_S_CFGNS, - #[doc = "SYSCFG_S"] - pub SYSCFG_S: SYSCFG_S, + #[doc = "ACMP0_NS"] + pub acmp0_ns: Acmp0Ns, + #[doc = "ACMP0_S"] + pub acmp0_s: Acmp0S, + #[doc = "ACMP1_NS"] + pub acmp1_ns: Acmp1Ns, + #[doc = "ACMP1_S"] + pub acmp1_s: Acmp1S, + #[doc = "BURAM_NS"] + pub buram_ns: BuramNs, #[doc = "BURAM_S"] - pub BURAM_S: BURAM_S, - #[doc = "GPCRC_S"] - pub GPCRC_S: GPCRC_S, + pub buram_s: BuramS, + #[doc = "BURTC_NS"] + pub burtc_ns: BurtcNs, + #[doc = "BURTC_S"] + pub burtc_s: BurtcS, + #[doc = "CMU_NS"] + pub cmu_ns: CmuNs, + #[doc = "CMU_S"] + pub cmu_s: CmuS, + #[doc = "DCDC_NS"] + pub dcdc_ns: DcdcNs, #[doc = "DCDC_S"] - pub DCDC_S: DCDC_S, - #[doc = "HOSTMAILBOX_S"] - pub HOSTMAILBOX_S: HOSTMAILBOX_S, + pub dcdc_s: DcdcS, + #[doc = "DMEM_NS"] + pub dmem_ns: DmemNs, + #[doc = "DMEM_S"] + pub dmem_s: DmemS, + #[doc = "DPLL0_NS"] + pub dpll0_ns: Dpll0Ns, + #[doc = "DPLL0_S"] + pub dpll0_s: Dpll0S, + #[doc = "EMU_NS"] + pub emu_ns: EmuNs, + #[doc = "EMU_S"] + pub emu_s: EmuS, + #[doc = "EUSART0_NS"] + pub eusart0_ns: Eusart0Ns, + #[doc = "EUSART0_S"] + pub eusart0_s: Eusart0S, + #[doc = "EUSART1_NS"] + pub eusart1_ns: Eusart1Ns, #[doc = "EUSART1_S"] - pub EUSART1_S: EUSART1_S, + pub eusart1_s: Eusart1S, + #[doc = "EUSART2_NS"] + pub eusart2_ns: Eusart2Ns, #[doc = "EUSART2_S"] - pub EUSART2_S: EUSART2_S, - #[doc = "SYSRTC0_S"] - pub SYSRTC0_S: SYSRTC0_S, - #[doc = "LCD_S"] - pub LCD_S: LCD_S, - #[doc = "KEYSCAN_S"] - pub KEYSCAN_S: KEYSCAN_S, - #[doc = "DMEM_S"] - pub DMEM_S: DMEM_S, - #[doc = "LCDRF_S"] - pub LCDRF_S: LCDRF_S, - #[doc = "SMU_S"] - pub SMU_S: SMU_S, - #[doc = "SMU_S_CFGNS"] - pub SMU_S_CFGNS: SMU_S_CFGNS, - #[doc = "LETIMER0_S"] - pub LETIMER0_S: LETIMER0_S, - #[doc = "IADC0_S"] - pub IADC0_S: IADC0_S, - #[doc = "ACMP0_S"] - pub ACMP0_S: ACMP0_S, - #[doc = "ACMP1_S"] - pub ACMP1_S: ACMP1_S, - #[doc = "VDAC0_S"] - pub VDAC0_S: VDAC0_S, - #[doc = "PCNT0_S"] - pub PCNT0_S: PCNT0_S, + pub eusart2_s: Eusart2S, + #[doc = "FSRCO_NS"] + pub fsrco_ns: FsrcoNs, + #[doc = "FSRCO_S"] + pub fsrco_s: FsrcoS, + #[doc = "GPCRC_NS"] + pub gpcrc_ns: GpcrcNs, + #[doc = "GPCRC_S"] + pub gpcrc_s: GpcrcS, + #[doc = "GPIO_NS"] + pub gpio_ns: GpioNs, + #[doc = "GPIO_S"] + pub gpio_s: GpioS, + #[doc = "HFRCO0_NS"] + pub hfrco0_ns: Hfrco0Ns, + #[doc = "HFRCO0_S"] + pub hfrco0_s: Hfrco0S, + #[doc = "HFRCOEM23_NS"] + pub hfrcoem23_ns: Hfrcoem23Ns, #[doc = "HFRCOEM23_S"] - pub HFRCOEM23_S: HFRCOEM23_S, + pub hfrcoem23_s: Hfrcoem23S, + #[doc = "HFXO0_NS"] + pub hfxo0_ns: Hfxo0Ns, #[doc = "HFXO0_S"] - pub HFXO0_S: HFXO0_S, + pub hfxo0_s: Hfxo0S, + #[doc = "HOSTMAILBOX_NS"] + pub hostmailbox_ns: HostmailboxNs, + #[doc = "HOSTMAILBOX_S"] + pub hostmailbox_s: HostmailboxS, + #[doc = "I2C0_NS"] + pub i2c0_ns: I2c0Ns, #[doc = "I2C0_S"] - pub I2C0_S: I2C0_S, - #[doc = "WDOG0_S"] - pub WDOG0_S: WDOG0_S, - #[doc = "WDOG1_S"] - pub WDOG1_S: WDOG1_S, - #[doc = "EUSART0_S"] - pub EUSART0_S: EUSART0_S, - #[doc = "SEMAILBOX_S_HOST"] - pub SEMAILBOX_S_HOST: SEMAILBOX_S_HOST, - #[doc = "SCRATCHPAD_NS"] - pub SCRATCHPAD_NS: SCRATCHPAD_NS, - #[doc = "EMU_NS"] - pub EMU_NS: EMU_NS, - #[doc = "CMU_NS"] - pub CMU_NS: CMU_NS, - #[doc = "HFRCO0_NS"] - pub HFRCO0_NS: HFRCO0_NS, - #[doc = "FSRCO_NS"] - pub FSRCO_NS: FSRCO_NS, - #[doc = "DPLL0_NS"] - pub DPLL0_NS: DPLL0_NS, - #[doc = "LFXO_NS"] - pub LFXO_NS: LFXO_NS, + pub i2c0_s: I2c0S, + #[doc = "I2C1_NS"] + pub i2c1_ns: I2c1Ns, + #[doc = "I2C1_S"] + pub i2c1_s: I2c1S, + #[doc = "IADC0_NS"] + pub iadc0_ns: Iadc0Ns, + #[doc = "IADC0_S"] + pub iadc0_s: Iadc0S, + #[doc = "ICACHE0_NS"] + pub icache0_ns: Icache0Ns, + #[doc = "ICACHE0_S"] + pub icache0_s: Icache0S, + #[doc = "KEYSCAN_NS"] + pub keyscan_ns: KeyscanNs, + #[doc = "KEYSCAN_S"] + pub keyscan_s: KeyscanS, + #[doc = "LCDRF_NS"] + pub lcdrf_ns: LcdrfNs, + #[doc = "LCDRF_S"] + pub lcdrf_s: LcdrfS, + #[doc = "LCD_NS"] + pub lcd_ns: LcdNs, + #[doc = "LCD_S"] + pub lcd_s: LcdS, + #[doc = "LDMAXBAR_NS"] + pub ldmaxbar_ns: LdmaxbarNs, + #[doc = "LDMAXBAR_S"] + pub ldmaxbar_s: LdmaxbarS, + #[doc = "LDMA_NS"] + pub ldma_ns: LdmaNs, + #[doc = "LDMA_S"] + pub ldma_s: LdmaS, + #[doc = "LETIMER0_NS"] + pub letimer0_ns: Letimer0Ns, + #[doc = "LETIMER0_S"] + pub letimer0_s: Letimer0S, #[doc = "LFRCO_NS"] - pub LFRCO_NS: LFRCO_NS, - #[doc = "ULFRCO_NS"] - pub ULFRCO_NS: ULFRCO_NS, + pub lfrco_ns: LfrcoNs, + #[doc = "LFRCO_S"] + pub lfrco_s: LfrcoS, + #[doc = "LFXO_NS"] + pub lfxo_ns: LfxoNs, + #[doc = "LFXO_S"] + pub lfxo_s: LfxoS, #[doc = "MSC_NS"] - pub MSC_NS: MSC_NS, - #[doc = "ICACHE0_NS"] - pub ICACHE0_NS: ICACHE0_NS, + pub msc_ns: MscNs, + #[doc = "MSC_S"] + pub msc_s: MscS, + #[doc = "PCNT0_NS"] + pub pcnt0_ns: Pcnt0Ns, + #[doc = "PCNT0_S"] + pub pcnt0_s: Pcnt0S, #[doc = "PRS_NS"] - pub PRS_NS: PRS_NS, - #[doc = "GPIO_NS"] - pub GPIO_NS: GPIO_NS, - #[doc = "LDMA_NS"] - pub LDMA_NS: LDMA_NS, - #[doc = "LDMAXBAR_NS"] - pub LDMAXBAR_NS: LDMAXBAR_NS, + pub prs_ns: PrsNs, + #[doc = "PRS_S"] + pub prs_s: PrsS, + #[doc = "SCRATCHPAD_NS"] + pub scratchpad_ns: ScratchpadNs, + #[doc = "SCRATCHPAD_S"] + pub scratchpad_s: ScratchpadS, + #[doc = "SEMAILBOX_NS_HOST"] + pub semailbox_ns_host: SemailboxNsHost, + #[doc = "SEMAILBOX_S_HOST"] + pub semailbox_s_host: SemailboxSHost, + #[doc = "SMU_NS"] + pub smu_ns: SmuNs, + #[doc = "SMU_NS_CFGNS"] + pub smu_ns_cfgns: SmuNsCfgns, + #[doc = "SMU_S"] + pub smu_s: SmuS, + #[doc = "SMU_S_CFGNS"] + pub smu_s_cfgns: SmuSCfgns, + #[doc = "SYSCFG_NS"] + pub syscfg_ns: SyscfgNs, + #[doc = "SYSCFG_NS_CFGNS"] + pub syscfg_ns_cfgns: SyscfgNsCfgns, + #[doc = "SYSCFG_S"] + pub syscfg_s: SyscfgS, + #[doc = "SYSCFG_S_CFGNS"] + pub syscfg_s_cfgns: SyscfgSCfgns, + #[doc = "SYSRTC0_NS"] + pub sysrtc0_ns: Sysrtc0Ns, + #[doc = "SYSRTC0_S"] + pub sysrtc0_s: Sysrtc0S, #[doc = "TIMER0_NS"] - pub TIMER0_NS: TIMER0_NS, + pub timer0_ns: Timer0Ns, + #[doc = "TIMER0_S"] + pub timer0_s: Timer0S, #[doc = "TIMER1_NS"] - pub TIMER1_NS: TIMER1_NS, + pub timer1_ns: Timer1Ns, + #[doc = "TIMER1_S"] + pub timer1_s: Timer1S, #[doc = "TIMER2_NS"] - pub TIMER2_NS: TIMER2_NS, + pub timer2_ns: Timer2Ns, + #[doc = "TIMER2_S"] + pub timer2_s: Timer2S, #[doc = "TIMER3_NS"] - pub TIMER3_NS: TIMER3_NS, + pub timer3_ns: Timer3Ns, + #[doc = "TIMER3_S"] + pub timer3_s: Timer3S, #[doc = "TIMER4_NS"] - pub TIMER4_NS: TIMER4_NS, + pub timer4_ns: Timer4Ns, + #[doc = "TIMER4_S"] + pub timer4_s: Timer4S, + #[doc = "ULFRCO_NS"] + pub ulfrco_ns: UlfrcoNs, + #[doc = "ULFRCO_S"] + pub ulfrco_s: UlfrcoS, #[doc = "USART0_NS"] - pub USART0_NS: USART0_NS, - #[doc = "BURTC_NS"] - pub BURTC_NS: BURTC_NS, - #[doc = "I2C1_NS"] - pub I2C1_NS: I2C1_NS, - #[doc = "SYSCFG_NS_CFGNS"] - pub SYSCFG_NS_CFGNS: SYSCFG_NS_CFGNS, - #[doc = "SYSCFG_NS"] - pub SYSCFG_NS: SYSCFG_NS, - #[doc = "BURAM_NS"] - pub BURAM_NS: BURAM_NS, - #[doc = "GPCRC_NS"] - pub GPCRC_NS: GPCRC_NS, - #[doc = "DCDC_NS"] - pub DCDC_NS: DCDC_NS, - #[doc = "HOSTMAILBOX_NS"] - pub HOSTMAILBOX_NS: HOSTMAILBOX_NS, - #[doc = "EUSART1_NS"] - pub EUSART1_NS: EUSART1_NS, - #[doc = "EUSART2_NS"] - pub EUSART2_NS: EUSART2_NS, - #[doc = "SYSRTC0_NS"] - pub SYSRTC0_NS: SYSRTC0_NS, - #[doc = "LCD_NS"] - pub LCD_NS: LCD_NS, - #[doc = "KEYSCAN_NS"] - pub KEYSCAN_NS: KEYSCAN_NS, - #[doc = "DMEM_NS"] - pub DMEM_NS: DMEM_NS, - #[doc = "LCDRF_NS"] - pub LCDRF_NS: LCDRF_NS, - #[doc = "SMU_NS"] - pub SMU_NS: SMU_NS, - #[doc = "SMU_NS_CFGNS"] - pub SMU_NS_CFGNS: SMU_NS_CFGNS, - #[doc = "LETIMER0_NS"] - pub LETIMER0_NS: LETIMER0_NS, - #[doc = "IADC0_NS"] - pub IADC0_NS: IADC0_NS, - #[doc = "ACMP0_NS"] - pub ACMP0_NS: ACMP0_NS, - #[doc = "ACMP1_NS"] - pub ACMP1_NS: ACMP1_NS, + pub usart0_ns: Usart0Ns, + #[doc = "USART0_S"] + pub usart0_s: Usart0S, #[doc = "VDAC0_NS"] - pub VDAC0_NS: VDAC0_NS, - #[doc = "PCNT0_NS"] - pub PCNT0_NS: PCNT0_NS, - #[doc = "HFRCOEM23_NS"] - pub HFRCOEM23_NS: HFRCOEM23_NS, - #[doc = "HFXO0_NS"] - pub HFXO0_NS: HFXO0_NS, - #[doc = "I2C0_NS"] - pub I2C0_NS: I2C0_NS, + pub vdac0_ns: Vdac0Ns, + #[doc = "VDAC0_S"] + pub vdac0_s: Vdac0S, #[doc = "WDOG0_NS"] - pub WDOG0_NS: WDOG0_NS, + pub wdog0_ns: Wdog0Ns, + #[doc = "WDOG0_S"] + pub wdog0_s: Wdog0S, #[doc = "WDOG1_NS"] - pub WDOG1_NS: WDOG1_NS, - #[doc = "EUSART0_NS"] - pub EUSART0_NS: EUSART0_NS, - #[doc = "SEMAILBOX_NS_HOST"] - pub SEMAILBOX_NS_HOST: SEMAILBOX_NS_HOST, + pub wdog1_ns: Wdog1Ns, + #[doc = "WDOG1_S"] + pub wdog1_s: Wdog1S, #[doc = "DEVINFO"] - pub DEVINFO: DEVINFO, + pub devinfo: Devinfo, } impl Peripherals { #[doc = r" Returns all the peripherals *once*."] @@ -3422,315 +5260,109 @@ impl Peripherals { pub unsafe fn steal() -> Self { DEVICE_PERIPHERALS = true; Peripherals { - SCRATCHPAD_S: SCRATCHPAD_S { - _marker: PhantomData, - }, - EMU_S: EMU_S { - _marker: PhantomData, - }, - CMU_S: CMU_S { - _marker: PhantomData, - }, - HFRCO0_S: HFRCO0_S { - _marker: PhantomData, - }, - FSRCO_S: FSRCO_S { - _marker: PhantomData, - }, - DPLL0_S: DPLL0_S { - _marker: PhantomData, - }, - LFXO_S: LFXO_S { - _marker: PhantomData, - }, - LFRCO_S: LFRCO_S { - _marker: PhantomData, - }, - ULFRCO_S: ULFRCO_S { - _marker: PhantomData, - }, - MSC_S: MSC_S { - _marker: PhantomData, - }, - ICACHE0_S: ICACHE0_S { - _marker: PhantomData, - }, - PRS_S: PRS_S { - _marker: PhantomData, - }, - GPIO_S: GPIO_S { - _marker: PhantomData, - }, - LDMA_S: LDMA_S { - _marker: PhantomData, - }, - LDMAXBAR_S: LDMAXBAR_S { - _marker: PhantomData, - }, - TIMER0_S: TIMER0_S { - _marker: PhantomData, - }, - TIMER1_S: TIMER1_S { - _marker: PhantomData, - }, - TIMER2_S: TIMER2_S { - _marker: PhantomData, - }, - TIMER3_S: TIMER3_S { - _marker: PhantomData, - }, - TIMER4_S: TIMER4_S { - _marker: PhantomData, - }, - USART0_S: USART0_S { - _marker: PhantomData, - }, - BURTC_S: BURTC_S { - _marker: PhantomData, - }, - I2C1_S: I2C1_S { - _marker: PhantomData, - }, - SYSCFG_S_CFGNS: SYSCFG_S_CFGNS { - _marker: PhantomData, - }, - SYSCFG_S: SYSCFG_S { - _marker: PhantomData, - }, - BURAM_S: BURAM_S { - _marker: PhantomData, - }, - GPCRC_S: GPCRC_S { - _marker: PhantomData, - }, - DCDC_S: DCDC_S { - _marker: PhantomData, - }, - HOSTMAILBOX_S: HOSTMAILBOX_S { - _marker: PhantomData, - }, - EUSART1_S: EUSART1_S { - _marker: PhantomData, - }, - EUSART2_S: EUSART2_S { - _marker: PhantomData, - }, - SYSRTC0_S: SYSRTC0_S { - _marker: PhantomData, - }, - LCD_S: LCD_S { - _marker: PhantomData, - }, - KEYSCAN_S: KEYSCAN_S { - _marker: PhantomData, - }, - DMEM_S: DMEM_S { - _marker: PhantomData, - }, - LCDRF_S: LCDRF_S { - _marker: PhantomData, - }, - SMU_S: SMU_S { - _marker: PhantomData, - }, - SMU_S_CFGNS: SMU_S_CFGNS { - _marker: PhantomData, - }, - LETIMER0_S: LETIMER0_S { - _marker: PhantomData, - }, - IADC0_S: IADC0_S { - _marker: PhantomData, - }, - ACMP0_S: ACMP0_S { - _marker: PhantomData, - }, - ACMP1_S: ACMP1_S { - _marker: PhantomData, - }, - VDAC0_S: VDAC0_S { - _marker: PhantomData, - }, - PCNT0_S: PCNT0_S { - _marker: PhantomData, - }, - HFRCOEM23_S: HFRCOEM23_S { - _marker: PhantomData, - }, - HFXO0_S: HFXO0_S { - _marker: PhantomData, - }, - I2C0_S: I2C0_S { - _marker: PhantomData, - }, - WDOG0_S: WDOG0_S { - _marker: PhantomData, - }, - WDOG1_S: WDOG1_S { - _marker: PhantomData, - }, - EUSART0_S: EUSART0_S { - _marker: PhantomData, - }, - SEMAILBOX_S_HOST: SEMAILBOX_S_HOST { - _marker: PhantomData, - }, - SCRATCHPAD_NS: SCRATCHPAD_NS { - _marker: PhantomData, - }, - EMU_NS: EMU_NS { - _marker: PhantomData, - }, - CMU_NS: CMU_NS { - _marker: PhantomData, - }, - HFRCO0_NS: HFRCO0_NS { - _marker: PhantomData, - }, - FSRCO_NS: FSRCO_NS { - _marker: PhantomData, - }, - DPLL0_NS: DPLL0_NS { - _marker: PhantomData, - }, - LFXO_NS: LFXO_NS { - _marker: PhantomData, - }, - LFRCO_NS: LFRCO_NS { - _marker: PhantomData, - }, - ULFRCO_NS: ULFRCO_NS { - _marker: PhantomData, - }, - MSC_NS: MSC_NS { - _marker: PhantomData, - }, - ICACHE0_NS: ICACHE0_NS { - _marker: PhantomData, - }, - PRS_NS: PRS_NS { - _marker: PhantomData, - }, - GPIO_NS: GPIO_NS { - _marker: PhantomData, - }, - LDMA_NS: LDMA_NS { - _marker: PhantomData, - }, - LDMAXBAR_NS: LDMAXBAR_NS { - _marker: PhantomData, - }, - TIMER0_NS: TIMER0_NS { - _marker: PhantomData, - }, - TIMER1_NS: TIMER1_NS { - _marker: PhantomData, - }, - TIMER2_NS: TIMER2_NS { - _marker: PhantomData, - }, - TIMER3_NS: TIMER3_NS { - _marker: PhantomData, - }, - TIMER4_NS: TIMER4_NS { - _marker: PhantomData, - }, - USART0_NS: USART0_NS { - _marker: PhantomData, - }, - BURTC_NS: BURTC_NS { - _marker: PhantomData, - }, - I2C1_NS: I2C1_NS { - _marker: PhantomData, - }, - SYSCFG_NS_CFGNS: SYSCFG_NS_CFGNS { - _marker: PhantomData, - }, - SYSCFG_NS: SYSCFG_NS { - _marker: PhantomData, - }, - BURAM_NS: BURAM_NS { - _marker: PhantomData, - }, - GPCRC_NS: GPCRC_NS { - _marker: PhantomData, - }, - DCDC_NS: DCDC_NS { - _marker: PhantomData, - }, - HOSTMAILBOX_NS: HOSTMAILBOX_NS { - _marker: PhantomData, - }, - EUSART1_NS: EUSART1_NS { - _marker: PhantomData, - }, - EUSART2_NS: EUSART2_NS { - _marker: PhantomData, - }, - SYSRTC0_NS: SYSRTC0_NS { - _marker: PhantomData, - }, - LCD_NS: LCD_NS { - _marker: PhantomData, - }, - KEYSCAN_NS: KEYSCAN_NS { - _marker: PhantomData, - }, - DMEM_NS: DMEM_NS { - _marker: PhantomData, - }, - LCDRF_NS: LCDRF_NS { - _marker: PhantomData, - }, - SMU_NS: SMU_NS { - _marker: PhantomData, - }, - SMU_NS_CFGNS: SMU_NS_CFGNS { - _marker: PhantomData, - }, - LETIMER0_NS: LETIMER0_NS { - _marker: PhantomData, - }, - IADC0_NS: IADC0_NS { - _marker: PhantomData, - }, - ACMP0_NS: ACMP0_NS { - _marker: PhantomData, - }, - ACMP1_NS: ACMP1_NS { - _marker: PhantomData, - }, - VDAC0_NS: VDAC0_NS { - _marker: PhantomData, - }, - PCNT0_NS: PCNT0_NS { - _marker: PhantomData, - }, - HFRCOEM23_NS: HFRCOEM23_NS { - _marker: PhantomData, - }, - HFXO0_NS: HFXO0_NS { - _marker: PhantomData, - }, - I2C0_NS: I2C0_NS { - _marker: PhantomData, - }, - WDOG0_NS: WDOG0_NS { - _marker: PhantomData, - }, - WDOG1_NS: WDOG1_NS { - _marker: PhantomData, - }, - EUSART0_NS: EUSART0_NS { - _marker: PhantomData, - }, - SEMAILBOX_NS_HOST: SEMAILBOX_NS_HOST { - _marker: PhantomData, - }, - DEVINFO: DEVINFO { - _marker: PhantomData, - }, + acmp0_ns: Acmp0Ns::steal(), + acmp0_s: Acmp0S::steal(), + acmp1_ns: Acmp1Ns::steal(), + acmp1_s: Acmp1S::steal(), + buram_ns: BuramNs::steal(), + buram_s: BuramS::steal(), + burtc_ns: BurtcNs::steal(), + burtc_s: BurtcS::steal(), + cmu_ns: CmuNs::steal(), + cmu_s: CmuS::steal(), + dcdc_ns: DcdcNs::steal(), + dcdc_s: DcdcS::steal(), + dmem_ns: DmemNs::steal(), + dmem_s: DmemS::steal(), + dpll0_ns: Dpll0Ns::steal(), + dpll0_s: Dpll0S::steal(), + emu_ns: EmuNs::steal(), + emu_s: EmuS::steal(), + eusart0_ns: Eusart0Ns::steal(), + eusart0_s: Eusart0S::steal(), + eusart1_ns: Eusart1Ns::steal(), + eusart1_s: Eusart1S::steal(), + eusart2_ns: Eusart2Ns::steal(), + eusart2_s: Eusart2S::steal(), + fsrco_ns: FsrcoNs::steal(), + fsrco_s: FsrcoS::steal(), + gpcrc_ns: GpcrcNs::steal(), + gpcrc_s: GpcrcS::steal(), + gpio_ns: GpioNs::steal(), + gpio_s: GpioS::steal(), + hfrco0_ns: Hfrco0Ns::steal(), + hfrco0_s: Hfrco0S::steal(), + hfrcoem23_ns: Hfrcoem23Ns::steal(), + hfrcoem23_s: Hfrcoem23S::steal(), + hfxo0_ns: Hfxo0Ns::steal(), + hfxo0_s: Hfxo0S::steal(), + hostmailbox_ns: HostmailboxNs::steal(), + hostmailbox_s: HostmailboxS::steal(), + i2c0_ns: I2c0Ns::steal(), + i2c0_s: I2c0S::steal(), + i2c1_ns: I2c1Ns::steal(), + i2c1_s: I2c1S::steal(), + iadc0_ns: Iadc0Ns::steal(), + iadc0_s: Iadc0S::steal(), + icache0_ns: Icache0Ns::steal(), + icache0_s: Icache0S::steal(), + keyscan_ns: KeyscanNs::steal(), + keyscan_s: KeyscanS::steal(), + lcdrf_ns: LcdrfNs::steal(), + lcdrf_s: LcdrfS::steal(), + lcd_ns: LcdNs::steal(), + lcd_s: LcdS::steal(), + ldmaxbar_ns: LdmaxbarNs::steal(), + ldmaxbar_s: LdmaxbarS::steal(), + ldma_ns: LdmaNs::steal(), + ldma_s: LdmaS::steal(), + letimer0_ns: Letimer0Ns::steal(), + letimer0_s: Letimer0S::steal(), + lfrco_ns: LfrcoNs::steal(), + lfrco_s: LfrcoS::steal(), + lfxo_ns: LfxoNs::steal(), + lfxo_s: LfxoS::steal(), + msc_ns: MscNs::steal(), + msc_s: MscS::steal(), + pcnt0_ns: Pcnt0Ns::steal(), + pcnt0_s: Pcnt0S::steal(), + prs_ns: PrsNs::steal(), + prs_s: PrsS::steal(), + scratchpad_ns: ScratchpadNs::steal(), + scratchpad_s: ScratchpadS::steal(), + semailbox_ns_host: SemailboxNsHost::steal(), + semailbox_s_host: SemailboxSHost::steal(), + smu_ns: SmuNs::steal(), + smu_ns_cfgns: SmuNsCfgns::steal(), + smu_s: SmuS::steal(), + smu_s_cfgns: SmuSCfgns::steal(), + syscfg_ns: SyscfgNs::steal(), + syscfg_ns_cfgns: SyscfgNsCfgns::steal(), + syscfg_s: SyscfgS::steal(), + syscfg_s_cfgns: SyscfgSCfgns::steal(), + sysrtc0_ns: Sysrtc0Ns::steal(), + sysrtc0_s: Sysrtc0S::steal(), + timer0_ns: Timer0Ns::steal(), + timer0_s: Timer0S::steal(), + timer1_ns: Timer1Ns::steal(), + timer1_s: Timer1S::steal(), + timer2_ns: Timer2Ns::steal(), + timer2_s: Timer2S::steal(), + timer3_ns: Timer3Ns::steal(), + timer3_s: Timer3S::steal(), + timer4_ns: Timer4Ns::steal(), + timer4_s: Timer4S::steal(), + ulfrco_ns: UlfrcoNs::steal(), + ulfrco_s: UlfrcoS::steal(), + usart0_ns: Usart0Ns::steal(), + usart0_s: Usart0S::steal(), + vdac0_ns: Vdac0Ns::steal(), + vdac0_s: Vdac0S::steal(), + wdog0_ns: Wdog0Ns::steal(), + wdog0_s: Wdog0S::steal(), + wdog1_ns: Wdog1Ns::steal(), + wdog1_s: Wdog1S::steal(), + devinfo: Devinfo::steal(), } } } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns.rs index 853ee17..62ae0e4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns.rs @@ -1,109 +1,213 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + readctrl: Readctrl, + rdatactrl: Rdatactrl, + writectrl: Writectrl, + writecmd: Writecmd, + addrb: Addrb, + wdata: Wdata, + status: Status, + if_: If, + ien: Ien, + _reserved10: [u8; 0x0c], + userdatasize: Userdatasize, + cmd: Cmd, + lock: Lock, + misclockword: Misclockword, + _reserved14: [u8; 0x0c], + pwrctrl: Pwrctrl, + _reserved15: [u8; 0xcc], + pagelock0: Pagelock0, + pagelock1: Pagelock1, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub readctrl: READCTRL, + #[inline(always)] + pub const fn readctrl(&self) -> &Readctrl { + &self.readctrl + } #[doc = "0x08 - No Description"] - pub rdatactrl: RDATACTRL, + #[inline(always)] + pub const fn rdatactrl(&self) -> &Rdatactrl { + &self.rdatactrl + } #[doc = "0x0c - No Description"] - pub writectrl: WRITECTRL, + #[inline(always)] + pub const fn writectrl(&self) -> &Writectrl { + &self.writectrl + } #[doc = "0x10 - No Description"] - pub writecmd: WRITECMD, + #[inline(always)] + pub const fn writecmd(&self) -> &Writecmd { + &self.writecmd + } #[doc = "0x14 - No Description"] - pub addrb: ADDRB, + #[inline(always)] + pub const fn addrb(&self) -> &Addrb { + &self.addrb + } #[doc = "0x18 - No Description"] - pub wdata: WDATA, + #[inline(always)] + pub const fn wdata(&self) -> &Wdata { + &self.wdata + } #[doc = "0x1c - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x20 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x24 - No Description"] - pub ien: IEN, - _reserved10: [u8; 0x0c], + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x34 - No Description"] - pub userdatasize: USERDATASIZE, + #[inline(always)] + pub const fn userdatasize(&self) -> &Userdatasize { + &self.userdatasize + } #[doc = "0x38 - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x3c - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x40 - No Description"] - pub misclockword: MISCLOCKWORD, - _reserved14: [u8; 0x0c], + #[inline(always)] + pub const fn misclockword(&self) -> &Misclockword { + &self.misclockword + } #[doc = "0x50 - No Description"] - pub pwrctrl: PWRCTRL, - _reserved15: [u8; 0xcc], + #[inline(always)] + pub const fn pwrctrl(&self) -> &Pwrctrl { + &self.pwrctrl + } #[doc = "0x120 - No Description"] - pub pagelock0: PAGELOCK0, + #[inline(always)] + pub const fn pagelock0(&self) -> &Pagelock0 { + &self.pagelock0 + } #[doc = "0x124 - No Description"] - pub pagelock1: PAGELOCK1, + #[inline(always)] + pub const fn pagelock1(&self) -> &Pagelock1 { + &self.pagelock1 + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "READCTRL (rw) register accessor: an alias for `Reg`"] -pub type READCTRL = crate::Reg; +#[doc = "READCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`readctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`readctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@readctrl`] +module"] +#[doc(alias = "READCTRL")] +pub type Readctrl = crate::Reg; #[doc = "No Description"] pub mod readctrl; -#[doc = "RDATACTRL (rw) register accessor: an alias for `Reg`"] -pub type RDATACTRL = crate::Reg; +#[doc = "RDATACTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rdatactrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rdatactrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rdatactrl`] +module"] +#[doc(alias = "RDATACTRL")] +pub type Rdatactrl = crate::Reg; #[doc = "No Description"] pub mod rdatactrl; -#[doc = "WRITECTRL (rw) register accessor: an alias for `Reg`"] -pub type WRITECTRL = crate::Reg; +#[doc = "WRITECTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`writectrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`writectrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@writectrl`] +module"] +#[doc(alias = "WRITECTRL")] +pub type Writectrl = crate::Reg; #[doc = "No Description"] pub mod writectrl; -#[doc = "WRITECMD (w) register accessor: an alias for `Reg`"] -pub type WRITECMD = crate::Reg; +#[doc = "WRITECMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`writecmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@writecmd`] +module"] +#[doc(alias = "WRITECMD")] +pub type Writecmd = crate::Reg; #[doc = "No Description"] pub mod writecmd; -#[doc = "ADDRB (rw) register accessor: an alias for `Reg`"] -pub type ADDRB = crate::Reg; +#[doc = "ADDRB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`addrb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addrb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addrb`] +module"] +#[doc(alias = "ADDRB")] +pub type Addrb = crate::Reg; #[doc = "No Description"] pub mod addrb; -#[doc = "WDATA (rw) register accessor: an alias for `Reg`"] -pub type WDATA = crate::Reg; +#[doc = "WDATA (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`wdata::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdata::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdata`] +module"] +#[doc(alias = "WDATA")] +pub type Wdata = crate::Reg; #[doc = "No Description"] pub mod wdata; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "USERDATASIZE (r) register accessor: an alias for `Reg`"] -pub type USERDATASIZE = crate::Reg; +#[doc = "USERDATASIZE (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`userdatasize::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@userdatasize`] +module"] +#[doc(alias = "USERDATASIZE")] +pub type Userdatasize = crate::Reg; #[doc = "No Description"] pub mod userdatasize; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "MISCLOCKWORD (rw) register accessor: an alias for `Reg`"] -pub type MISCLOCKWORD = crate::Reg; +#[doc = "MISCLOCKWORD (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`misclockword::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`misclockword::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@misclockword`] +module"] +#[doc(alias = "MISCLOCKWORD")] +pub type Misclockword = crate::Reg; #[doc = "No Description"] pub mod misclockword; -#[doc = "PWRCTRL (rw) register accessor: an alias for `Reg`"] -pub type PWRCTRL = crate::Reg; +#[doc = "PWRCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pwrctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwrctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwrctrl`] +module"] +#[doc(alias = "PWRCTRL")] +pub type Pwrctrl = crate::Reg; #[doc = "No Description"] pub mod pwrctrl; -#[doc = "PAGELOCK0 (rw) register accessor: an alias for `Reg`"] -pub type PAGELOCK0 = crate::Reg; +#[doc = "PAGELOCK0 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pagelock0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pagelock0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pagelock0`] +module"] +#[doc(alias = "PAGELOCK0")] +pub type Pagelock0 = crate::Reg; #[doc = "No Description"] pub mod pagelock0; -#[doc = "PAGELOCK1 (rw) register accessor: an alias for `Reg`"] -pub type PAGELOCK1 = crate::Reg; +#[doc = "PAGELOCK1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pagelock1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pagelock1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pagelock1`] +module"] +#[doc(alias = "PAGELOCK1")] +pub type Pagelock1 = crate::Reg; #[doc = "No Description"] pub mod pagelock1; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/addrb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/addrb.rs index 028fa8b..933c3b0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/addrb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/addrb.rs @@ -1,80 +1,40 @@ #[doc = "Register `ADDRB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ADDRB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ADDRB` reader - Page Erase or Write Address Buffer"] -pub type ADDRB_R = crate::FieldReader; +pub type AddrbR = crate::FieldReader; #[doc = "Field `ADDRB` writer - Page Erase or Write Address Buffer"] -pub type ADDRB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ADDRB_SPEC, u32, u32, 32, O>; +pub type AddrbW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Page Erase or Write Address Buffer"] #[inline(always)] - pub fn addrb(&self) -> ADDRB_R { - ADDRB_R::new(self.bits) + pub fn addrb(&self) -> AddrbR { + AddrbR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Page Erase or Write Address Buffer"] #[inline(always)] #[must_use] - pub fn addrb(&mut self) -> ADDRB_W<0> { - ADDRB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn addrb(&mut self) -> AddrbW { + AddrbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [addrb](index.html) module"] -pub struct ADDRB_SPEC; -impl crate::RegisterSpec for ADDRB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`addrb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addrb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AddrbSpec; +impl crate::RegisterSpec for AddrbSpec { type Ux = u32; } -#[doc = "`read()` method returns [addrb::R](R) reader structure"] -impl crate::Readable for ADDRB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [addrb::W](W) writer structure"] -impl crate::Writable for ADDRB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`addrb::R`](R) reader structure"] +impl crate::Readable for AddrbSpec {} +#[doc = "`write(|w| ..)` method takes [`addrb::W`](W) writer structure"] +impl crate::Writable for AddrbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ADDRB to value 0"] -impl crate::Resettable for ADDRB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for AddrbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/cmd.rs index fdab189..351e2e6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/cmd.rs @@ -1,60 +1,35 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PWRUP` writer - Flash Power Up Command"] -pub type PWRUP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type PwrupW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PWROFF` writer - Flash power off/sleep command"] -pub type PWROFF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type PwroffW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Flash Power Up Command"] #[inline(always)] #[must_use] - pub fn pwrup(&mut self) -> PWRUP_W<0> { - PWRUP_W::new(self) + pub fn pwrup(&mut self) -> PwrupW { + PwrupW::new(self, 0) } #[doc = "Bit 4 - Flash power off/sleep command"] #[inline(always)] #[must_use] - pub fn pwroff(&mut self) -> PWROFF_W<4> { - PWROFF_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pwroff(&mut self) -> PwroffW { + PwroffW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/ien.rs index 859c9b6..e425697 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/ien.rs @@ -1,140 +1,100 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ERASE` reader - Erase Done Interrupt enable"] -pub type ERASE_R = crate::BitReader; +pub type EraseR = crate::BitReader; #[doc = "Field `ERASE` writer - Erase Done Interrupt enable"] -pub type ERASE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type EraseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WRITE` reader - Write Done Interrupt enable"] -pub type WRITE_R = crate::BitReader; +pub type WriteR = crate::BitReader; #[doc = "Field `WRITE` writer - Write Done Interrupt enable"] -pub type WRITE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type WriteW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WDATAOV` reader - write data buffer overflow irq enable"] -pub type WDATAOV_R = crate::BitReader; +pub type WdataovR = crate::BitReader; #[doc = "Field `WDATAOV` writer - write data buffer overflow irq enable"] -pub type WDATAOV_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type WdataovW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PWRUPF` reader - Flash Power Up Seq done irq enable"] -pub type PWRUPF_R = crate::BitReader; +pub type PwrupfR = crate::BitReader; #[doc = "Field `PWRUPF` writer - Flash Power Up Seq done irq enable"] -pub type PWRUPF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PwrupfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PWROFF` reader - Flash Power Off Seq done irq enable"] -pub type PWROFF_R = crate::BitReader; +pub type PwroffR = crate::BitReader; #[doc = "Field `PWROFF` writer - Flash Power Off Seq done irq enable"] -pub type PWROFF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PwroffW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Erase Done Interrupt enable"] #[inline(always)] - pub fn erase(&self) -> ERASE_R { - ERASE_R::new((self.bits & 1) != 0) + pub fn erase(&self) -> EraseR { + EraseR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Write Done Interrupt enable"] #[inline(always)] - pub fn write(&self) -> WRITE_R { - WRITE_R::new(((self.bits >> 1) & 1) != 0) + pub fn write(&self) -> WriteR { + WriteR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - write data buffer overflow irq enable"] #[inline(always)] - pub fn wdataov(&self) -> WDATAOV_R { - WDATAOV_R::new(((self.bits >> 2) & 1) != 0) + pub fn wdataov(&self) -> WdataovR { + WdataovR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 8 - Flash Power Up Seq done irq enable"] #[inline(always)] - pub fn pwrupf(&self) -> PWRUPF_R { - PWRUPF_R::new(((self.bits >> 8) & 1) != 0) + pub fn pwrupf(&self) -> PwrupfR { + PwrupfR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Flash Power Off Seq done irq enable"] #[inline(always)] - pub fn pwroff(&self) -> PWROFF_R { - PWROFF_R::new(((self.bits >> 9) & 1) != 0) + pub fn pwroff(&self) -> PwroffR { + PwroffR::new(((self.bits >> 9) & 1) != 0) } } impl W { #[doc = "Bit 0 - Erase Done Interrupt enable"] #[inline(always)] #[must_use] - pub fn erase(&mut self) -> ERASE_W<0> { - ERASE_W::new(self) + pub fn erase(&mut self) -> EraseW { + EraseW::new(self, 0) } #[doc = "Bit 1 - Write Done Interrupt enable"] #[inline(always)] #[must_use] - pub fn write(&mut self) -> WRITE_W<1> { - WRITE_W::new(self) + pub fn write(&mut self) -> WriteW { + WriteW::new(self, 1) } #[doc = "Bit 2 - write data buffer overflow irq enable"] #[inline(always)] #[must_use] - pub fn wdataov(&mut self) -> WDATAOV_W<2> { - WDATAOV_W::new(self) + pub fn wdataov(&mut self) -> WdataovW { + WdataovW::new(self, 2) } #[doc = "Bit 8 - Flash Power Up Seq done irq enable"] #[inline(always)] #[must_use] - pub fn pwrupf(&mut self) -> PWRUPF_W<8> { - PWRUPF_W::new(self) + pub fn pwrupf(&mut self) -> PwrupfW { + PwrupfW::new(self, 8) } #[doc = "Bit 9 - Flash Power Off Seq done irq enable"] #[inline(always)] #[must_use] - pub fn pwroff(&mut self) -> PWROFF_W<9> { - PWROFF_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pwroff(&mut self) -> PwroffW { + PwroffW::new(self, 9) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/if_.rs index abc6f7e..a47016e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/if_.rs @@ -1,140 +1,100 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ERASE` reader - Host Erase Done Interrupt Read Flag"] -pub type ERASE_R = crate::BitReader; +pub type EraseR = crate::BitReader; #[doc = "Field `ERASE` writer - Host Erase Done Interrupt Read Flag"] -pub type ERASE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type EraseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WRITE` reader - Host Write Done Interrupt Read Flag"] -pub type WRITE_R = crate::BitReader; +pub type WriteR = crate::BitReader; #[doc = "Field `WRITE` writer - Host Write Done Interrupt Read Flag"] -pub type WRITE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type WriteW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WDATAOV` reader - Host write buffer overflow"] -pub type WDATAOV_R = crate::BitReader; +pub type WdataovR = crate::BitReader; #[doc = "Field `WDATAOV` writer - Host write buffer overflow"] -pub type WDATAOV_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type WdataovW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PWRUPF` reader - Flash Power Up Sequence Complete Flag"] -pub type PWRUPF_R = crate::BitReader; +pub type PwrupfR = crate::BitReader; #[doc = "Field `PWRUPF` writer - Flash Power Up Sequence Complete Flag"] -pub type PWRUPF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PwrupfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PWROFF` reader - Flash Power Off Sequence Complete Flag"] -pub type PWROFF_R = crate::BitReader; +pub type PwroffR = crate::BitReader; #[doc = "Field `PWROFF` writer - Flash Power Off Sequence Complete Flag"] -pub type PWROFF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PwroffW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Host Erase Done Interrupt Read Flag"] #[inline(always)] - pub fn erase(&self) -> ERASE_R { - ERASE_R::new((self.bits & 1) != 0) + pub fn erase(&self) -> EraseR { + EraseR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Host Write Done Interrupt Read Flag"] #[inline(always)] - pub fn write(&self) -> WRITE_R { - WRITE_R::new(((self.bits >> 1) & 1) != 0) + pub fn write(&self) -> WriteR { + WriteR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Host write buffer overflow"] #[inline(always)] - pub fn wdataov(&self) -> WDATAOV_R { - WDATAOV_R::new(((self.bits >> 2) & 1) != 0) + pub fn wdataov(&self) -> WdataovR { + WdataovR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 8 - Flash Power Up Sequence Complete Flag"] #[inline(always)] - pub fn pwrupf(&self) -> PWRUPF_R { - PWRUPF_R::new(((self.bits >> 8) & 1) != 0) + pub fn pwrupf(&self) -> PwrupfR { + PwrupfR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Flash Power Off Sequence Complete Flag"] #[inline(always)] - pub fn pwroff(&self) -> PWROFF_R { - PWROFF_R::new(((self.bits >> 9) & 1) != 0) + pub fn pwroff(&self) -> PwroffR { + PwroffR::new(((self.bits >> 9) & 1) != 0) } } impl W { #[doc = "Bit 0 - Host Erase Done Interrupt Read Flag"] #[inline(always)] #[must_use] - pub fn erase(&mut self) -> ERASE_W<0> { - ERASE_W::new(self) + pub fn erase(&mut self) -> EraseW { + EraseW::new(self, 0) } #[doc = "Bit 1 - Host Write Done Interrupt Read Flag"] #[inline(always)] #[must_use] - pub fn write(&mut self) -> WRITE_W<1> { - WRITE_W::new(self) + pub fn write(&mut self) -> WriteW { + WriteW::new(self, 1) } #[doc = "Bit 2 - Host write buffer overflow"] #[inline(always)] #[must_use] - pub fn wdataov(&mut self) -> WDATAOV_W<2> { - WDATAOV_W::new(self) + pub fn wdataov(&mut self) -> WdataovW { + WdataovW::new(self, 2) } #[doc = "Bit 8 - Flash Power Up Sequence Complete Flag"] #[inline(always)] #[must_use] - pub fn pwrupf(&mut self) -> PWRUPF_W<8> { - PWRUPF_W::new(self) + pub fn pwrupf(&mut self) -> PwrupfW { + PwrupfW::new(self, 8) } #[doc = "Bit 9 - Flash Power Off Sequence Complete Flag"] #[inline(always)] #[must_use] - pub fn pwroff(&mut self) -> PWROFF_W<9> { - PWROFF_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pwroff(&mut self) -> PwroffW { + PwroffW::new(self, 9) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/ipversion.rs index 1c8b3f7..dc1f830 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x02"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/lock.rs index 58b214a..9394c76 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/lock.rs @@ -1,80 +1,62 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Configuration Lock\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "0: LOCK"] - LOCK = 0, + Lock = 0, #[doc = "7025: UNLOCK"] - UNLOCK = 7025, + Unlock = 7025, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Configuration Lock"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "LOCK"] #[inline(always)] - pub fn lock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::LOCK) + pub fn lock(self) -> &'a mut crate::W { + self.variant(Lockkey::Lock) } #[doc = "UNLOCK"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Configuration Lock"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/misclockword.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/misclockword.rs index 30edd8f..2ca8c20 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/misclockword.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/misclockword.rs @@ -1,95 +1,55 @@ #[doc = "Register `MISCLOCKWORD` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `MISCLOCKWORD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `MELOCKBIT` reader - Mass Erase Lock"] -pub type MELOCKBIT_R = crate::BitReader; +pub type MelockbitR = crate::BitReader; #[doc = "Field `MELOCKBIT` writer - Mass Erase Lock"] -pub type MELOCKBIT_W<'a, const O: u8> = crate::BitWriter<'a, u32, MISCLOCKWORD_SPEC, bool, O>; +pub type MelockbitW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UDLOCKBIT` reader - User Data Lock"] -pub type UDLOCKBIT_R = crate::BitReader; +pub type UdlockbitR = crate::BitReader; #[doc = "Field `UDLOCKBIT` writer - User Data Lock"] -pub type UDLOCKBIT_W<'a, const O: u8> = crate::BitWriter<'a, u32, MISCLOCKWORD_SPEC, bool, O>; +pub type UdlockbitW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Mass Erase Lock"] #[inline(always)] - pub fn melockbit(&self) -> MELOCKBIT_R { - MELOCKBIT_R::new((self.bits & 1) != 0) + pub fn melockbit(&self) -> MelockbitR { + MelockbitR::new((self.bits & 1) != 0) } #[doc = "Bit 4 - User Data Lock"] #[inline(always)] - pub fn udlockbit(&self) -> UDLOCKBIT_R { - UDLOCKBIT_R::new(((self.bits >> 4) & 1) != 0) + pub fn udlockbit(&self) -> UdlockbitR { + UdlockbitR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - Mass Erase Lock"] #[inline(always)] #[must_use] - pub fn melockbit(&mut self) -> MELOCKBIT_W<0> { - MELOCKBIT_W::new(self) + pub fn melockbit(&mut self) -> MelockbitW { + MelockbitW::new(self, 0) } #[doc = "Bit 4 - User Data Lock"] #[inline(always)] #[must_use] - pub fn udlockbit(&mut self) -> UDLOCKBIT_W<4> { - UDLOCKBIT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn udlockbit(&mut self) -> UdlockbitW { + UdlockbitW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [misclockword](index.html) module"] -pub struct MISCLOCKWORD_SPEC; -impl crate::RegisterSpec for MISCLOCKWORD_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`misclockword::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`misclockword::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct MisclockwordSpec; +impl crate::RegisterSpec for MisclockwordSpec { type Ux = u32; } -#[doc = "`read()` method returns [misclockword::R](R) reader structure"] -impl crate::Readable for MISCLOCKWORD_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [misclockword::W](W) writer structure"] -impl crate::Writable for MISCLOCKWORD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`misclockword::R`](R) reader structure"] +impl crate::Readable for MisclockwordSpec {} +#[doc = "`write(|w| ..)` method takes [`misclockword::W`](W) writer structure"] +impl crate::Writable for MisclockwordSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MISCLOCKWORD to value 0x11"] -impl crate::Resettable for MISCLOCKWORD_SPEC { - const RESET_VALUE: Self::Ux = 0x11; +impl crate::Resettable for MisclockwordSpec { + const RESET_VALUE: u32 = 0x11; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/pagelock0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/pagelock0.rs index a87c00c..3965a52 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/pagelock0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/pagelock0.rs @@ -1,80 +1,40 @@ #[doc = "Register `PAGELOCK0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PAGELOCK0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOCKBIT` reader - page lock bit"] -pub type LOCKBIT_R = crate::FieldReader; +pub type LockbitR = crate::FieldReader; #[doc = "Field `LOCKBIT` writer - page lock bit"] -pub type LOCKBIT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PAGELOCK0_SPEC, u32, u32, 32, O>; +pub type LockbitW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - page lock bit"] #[inline(always)] - pub fn lockbit(&self) -> LOCKBIT_R { - LOCKBIT_R::new(self.bits) + pub fn lockbit(&self) -> LockbitR { + LockbitR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - page lock bit"] #[inline(always)] #[must_use] - pub fn lockbit(&mut self) -> LOCKBIT_W<0> { - LOCKBIT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockbit(&mut self) -> LockbitW { + LockbitW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pagelock0](index.html) module"] -pub struct PAGELOCK0_SPEC; -impl crate::RegisterSpec for PAGELOCK0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pagelock0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pagelock0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Pagelock0Spec; +impl crate::RegisterSpec for Pagelock0Spec { type Ux = u32; } -#[doc = "`read()` method returns [pagelock0::R](R) reader structure"] -impl crate::Readable for PAGELOCK0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [pagelock0::W](W) writer structure"] -impl crate::Writable for PAGELOCK0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`pagelock0::R`](R) reader structure"] +impl crate::Readable for Pagelock0Spec {} +#[doc = "`write(|w| ..)` method takes [`pagelock0::W`](W) writer structure"] +impl crate::Writable for Pagelock0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PAGELOCK0 to value 0"] -impl crate::Resettable for PAGELOCK0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Pagelock0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/pagelock1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/pagelock1.rs index 0798b64..19280c2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/pagelock1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/pagelock1.rs @@ -1,80 +1,40 @@ #[doc = "Register `PAGELOCK1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PAGELOCK1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOCKBIT` reader - page lock bit"] -pub type LOCKBIT_R = crate::FieldReader; +pub type LockbitR = crate::FieldReader; #[doc = "Field `LOCKBIT` writer - page lock bit"] -pub type LOCKBIT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PAGELOCK1_SPEC, u32, u32, 32, O>; +pub type LockbitW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - page lock bit"] #[inline(always)] - pub fn lockbit(&self) -> LOCKBIT_R { - LOCKBIT_R::new(self.bits) + pub fn lockbit(&self) -> LockbitR { + LockbitR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - page lock bit"] #[inline(always)] #[must_use] - pub fn lockbit(&mut self) -> LOCKBIT_W<0> { - LOCKBIT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockbit(&mut self) -> LockbitW { + LockbitW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pagelock1](index.html) module"] -pub struct PAGELOCK1_SPEC; -impl crate::RegisterSpec for PAGELOCK1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pagelock1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pagelock1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Pagelock1Spec; +impl crate::RegisterSpec for Pagelock1Spec { type Ux = u32; } -#[doc = "`read()` method returns [pagelock1::R](R) reader structure"] -impl crate::Readable for PAGELOCK1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [pagelock1::W](W) writer structure"] -impl crate::Writable for PAGELOCK1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`pagelock1::R`](R) reader structure"] +impl crate::Readable for Pagelock1Spec {} +#[doc = "`write(|w| ..)` method takes [`pagelock1::W`](W) writer structure"] +impl crate::Writable for Pagelock1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PAGELOCK1 to value 0"] -impl crate::Resettable for PAGELOCK1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Pagelock1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/pwrctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/pwrctrl.rs index bb27acc..268f326 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/pwrctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/pwrctrl.rs @@ -1,125 +1,85 @@ #[doc = "Register `PWRCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PWRCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PWROFFONEM1ENTRY` reader - Power down Flash macro when enter EM1"] -pub type PWROFFONEM1ENTRY_R = crate::BitReader; +pub type Pwroffonem1entryR = crate::BitReader; #[doc = "Field `PWROFFONEM1ENTRY` writer - Power down Flash macro when enter EM1"] -pub type PWROFFONEM1ENTRY_W<'a, const O: u8> = crate::BitWriter<'a, u32, PWRCTRL_SPEC, bool, O>; +pub type Pwroffonem1entryW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PWROFFONEM1PENTRY` reader - Power down Flash macro when enter EM1P"] -pub type PWROFFONEM1PENTRY_R = crate::BitReader; +pub type Pwroffonem1pentryR = crate::BitReader; #[doc = "Field `PWROFFONEM1PENTRY` writer - Power down Flash macro when enter EM1P"] -pub type PWROFFONEM1PENTRY_W<'a, const O: u8> = crate::BitWriter<'a, u32, PWRCTRL_SPEC, bool, O>; +pub type Pwroffonem1pentryW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PWROFFENTRYAGAIN` reader - POWER down flash again in EM1/EM1p"] -pub type PWROFFENTRYAGAIN_R = crate::BitReader; +pub type PwroffentryagainR = crate::BitReader; #[doc = "Field `PWROFFENTRYAGAIN` writer - POWER down flash again in EM1/EM1p"] -pub type PWROFFENTRYAGAIN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PWRCTRL_SPEC, bool, O>; +pub type PwroffentryagainW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PWROFFDLY` reader - Power down delay"] -pub type PWROFFDLY_R = crate::FieldReader; +pub type PwroffdlyR = crate::FieldReader; #[doc = "Field `PWROFFDLY` writer - Power down delay"] -pub type PWROFFDLY_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PWRCTRL_SPEC, u8, u8, 8, O>; +pub type PwroffdlyW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bit 0 - Power down Flash macro when enter EM1"] #[inline(always)] - pub fn pwroffonem1entry(&self) -> PWROFFONEM1ENTRY_R { - PWROFFONEM1ENTRY_R::new((self.bits & 1) != 0) + pub fn pwroffonem1entry(&self) -> Pwroffonem1entryR { + Pwroffonem1entryR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Power down Flash macro when enter EM1P"] #[inline(always)] - pub fn pwroffonem1pentry(&self) -> PWROFFONEM1PENTRY_R { - PWROFFONEM1PENTRY_R::new(((self.bits >> 1) & 1) != 0) + pub fn pwroffonem1pentry(&self) -> Pwroffonem1pentryR { + Pwroffonem1pentryR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 4 - POWER down flash again in EM1/EM1p"] #[inline(always)] - pub fn pwroffentryagain(&self) -> PWROFFENTRYAGAIN_R { - PWROFFENTRYAGAIN_R::new(((self.bits >> 4) & 1) != 0) + pub fn pwroffentryagain(&self) -> PwroffentryagainR { + PwroffentryagainR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 16:23 - Power down delay"] #[inline(always)] - pub fn pwroffdly(&self) -> PWROFFDLY_R { - PWROFFDLY_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pwroffdly(&self) -> PwroffdlyR { + PwroffdlyR::new(((self.bits >> 16) & 0xff) as u8) } } impl W { #[doc = "Bit 0 - Power down Flash macro when enter EM1"] #[inline(always)] #[must_use] - pub fn pwroffonem1entry(&mut self) -> PWROFFONEM1ENTRY_W<0> { - PWROFFONEM1ENTRY_W::new(self) + pub fn pwroffonem1entry(&mut self) -> Pwroffonem1entryW { + Pwroffonem1entryW::new(self, 0) } #[doc = "Bit 1 - Power down Flash macro when enter EM1P"] #[inline(always)] #[must_use] - pub fn pwroffonem1pentry(&mut self) -> PWROFFONEM1PENTRY_W<1> { - PWROFFONEM1PENTRY_W::new(self) + pub fn pwroffonem1pentry(&mut self) -> Pwroffonem1pentryW { + Pwroffonem1pentryW::new(self, 1) } #[doc = "Bit 4 - POWER down flash again in EM1/EM1p"] #[inline(always)] #[must_use] - pub fn pwroffentryagain(&mut self) -> PWROFFENTRYAGAIN_W<4> { - PWROFFENTRYAGAIN_W::new(self) + pub fn pwroffentryagain(&mut self) -> PwroffentryagainW { + PwroffentryagainW::new(self, 4) } #[doc = "Bits 16:23 - Power down delay"] #[inline(always)] #[must_use] - pub fn pwroffdly(&mut self) -> PWROFFDLY_W<16> { - PWROFFDLY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pwroffdly(&mut self) -> PwroffdlyW { + PwroffdlyW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pwrctrl](index.html) module"] -pub struct PWRCTRL_SPEC; -impl crate::RegisterSpec for PWRCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pwrctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwrctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PwrctrlSpec; +impl crate::RegisterSpec for PwrctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [pwrctrl::R](R) reader structure"] -impl crate::Readable for PWRCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [pwrctrl::W](W) writer structure"] -impl crate::Writable for PWRCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`pwrctrl::R`](R) reader structure"] +impl crate::Readable for PwrctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`pwrctrl::W`](W) writer structure"] +impl crate::Writable for PwrctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PWRCTRL to value 0x0010_0002"] -impl crate::Resettable for PWRCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0010_0002; +impl crate::Resettable for PwrctrlSpec { + const RESET_VALUE: u32 = 0x0010_0002; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/rdatactrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/rdatactrl.rs index 3fadc11..c16ed02 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/rdatactrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/rdatactrl.rs @@ -1,95 +1,55 @@ #[doc = "Register `RDATACTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RDATACTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `AFDIS` reader - Automatic Invalidate Disable"] -pub type AFDIS_R = crate::BitReader; +pub type AfdisR = crate::BitReader; #[doc = "Field `AFDIS` writer - Automatic Invalidate Disable"] -pub type AFDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, RDATACTRL_SPEC, bool, O>; +pub type AfdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DOUTBUFEN` reader - Flash dout pipeline buffer enable"] -pub type DOUTBUFEN_R = crate::BitReader; +pub type DoutbufenR = crate::BitReader; #[doc = "Field `DOUTBUFEN` writer - Flash dout pipeline buffer enable"] -pub type DOUTBUFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, RDATACTRL_SPEC, bool, O>; +pub type DoutbufenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 1 - Automatic Invalidate Disable"] #[inline(always)] - pub fn afdis(&self) -> AFDIS_R { - AFDIS_R::new(((self.bits >> 1) & 1) != 0) + pub fn afdis(&self) -> AfdisR { + AfdisR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 12 - Flash dout pipeline buffer enable"] #[inline(always)] - pub fn doutbufen(&self) -> DOUTBUFEN_R { - DOUTBUFEN_R::new(((self.bits >> 12) & 1) != 0) + pub fn doutbufen(&self) -> DoutbufenR { + DoutbufenR::new(((self.bits >> 12) & 1) != 0) } } impl W { #[doc = "Bit 1 - Automatic Invalidate Disable"] #[inline(always)] #[must_use] - pub fn afdis(&mut self) -> AFDIS_W<1> { - AFDIS_W::new(self) + pub fn afdis(&mut self) -> AfdisW { + AfdisW::new(self, 1) } #[doc = "Bit 12 - Flash dout pipeline buffer enable"] #[inline(always)] #[must_use] - pub fn doutbufen(&mut self) -> DOUTBUFEN_W<12> { - DOUTBUFEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn doutbufen(&mut self) -> DoutbufenW { + DoutbufenW::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rdatactrl](index.html) module"] -pub struct RDATACTRL_SPEC; -impl crate::RegisterSpec for RDATACTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rdatactrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rdatactrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RdatactrlSpec; +impl crate::RegisterSpec for RdatactrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [rdatactrl::R](R) reader structure"] -impl crate::Readable for RDATACTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rdatactrl::W](W) writer structure"] -impl crate::Writable for RDATACTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`rdatactrl::R`](R) reader structure"] +impl crate::Readable for RdatactrlSpec {} +#[doc = "`write(|w| ..)` method takes [`rdatactrl::W`](W) writer structure"] +impl crate::Writable for RdatactrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RDATACTRL to value 0x1000"] -impl crate::Resettable for RDATACTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x1000; +impl crate::Resettable for RdatactrlSpec { + const RESET_VALUE: u32 = 0x1000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/readctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/readctrl.rs index 61acce7..e353b80 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/readctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/readctrl.rs @@ -1,154 +1,122 @@ #[doc = "Register `READCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `READCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - Read Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Read Mode\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Zero wait-states inserted in fetch or read transfers"] - WS0 = 0, + Ws0 = 0, #[doc = "1: One wait-state inserted for each fetch or read transfer. See Flash Wait-States table for details"] - WS1 = 1, + Ws1 = 1, #[doc = "2: Two wait-states inserted for eatch fetch or read transfer. See Flash Wait-States table for details"] - WS2 = 2, + Ws2 = 2, #[doc = "3: Three wait-states inserted for eatch fetch or read transfer. See Flash Wait-States table for details"] - WS3 = 3, + Ws3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - Read Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::WS0, - 1 => MODE_A::WS1, - 2 => MODE_A::WS2, - 3 => MODE_A::WS3, + 0 => Mode::Ws0, + 1 => Mode::Ws1, + 2 => Mode::Ws2, + 3 => Mode::Ws3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `WS0`"] + #[doc = "Zero wait-states inserted in fetch or read transfers"] #[inline(always)] pub fn is_ws0(&self) -> bool { - *self == MODE_A::WS0 + *self == Mode::Ws0 } - #[doc = "Checks if the value of the field is `WS1`"] + #[doc = "One wait-state inserted for each fetch or read transfer. See Flash Wait-States table for details"] #[inline(always)] pub fn is_ws1(&self) -> bool { - *self == MODE_A::WS1 + *self == Mode::Ws1 } - #[doc = "Checks if the value of the field is `WS2`"] + #[doc = "Two wait-states inserted for eatch fetch or read transfer. See Flash Wait-States table for details"] #[inline(always)] pub fn is_ws2(&self) -> bool { - *self == MODE_A::WS2 + *self == Mode::Ws2 } - #[doc = "Checks if the value of the field is `WS3`"] + #[doc = "Three wait-states inserted for eatch fetch or read transfer. See Flash Wait-States table for details"] #[inline(always)] pub fn is_ws3(&self) -> bool { - *self == MODE_A::WS3 + *self == Mode::Ws3 } } #[doc = "Field `MODE` writer - Read Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, READCTRL_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Zero wait-states inserted in fetch or read transfers"] #[inline(always)] - pub fn ws0(self) -> &'a mut W { - self.variant(MODE_A::WS0) + pub fn ws0(self) -> &'a mut crate::W { + self.variant(Mode::Ws0) } #[doc = "One wait-state inserted for each fetch or read transfer. See Flash Wait-States table for details"] #[inline(always)] - pub fn ws1(self) -> &'a mut W { - self.variant(MODE_A::WS1) + pub fn ws1(self) -> &'a mut crate::W { + self.variant(Mode::Ws1) } #[doc = "Two wait-states inserted for eatch fetch or read transfer. See Flash Wait-States table for details"] #[inline(always)] - pub fn ws2(self) -> &'a mut W { - self.variant(MODE_A::WS2) + pub fn ws2(self) -> &'a mut crate::W { + self.variant(Mode::Ws2) } #[doc = "Three wait-states inserted for eatch fetch or read transfer. See Flash Wait-States table for details"] #[inline(always)] - pub fn ws3(self) -> &'a mut W { - self.variant(MODE_A::WS3) + pub fn ws3(self) -> &'a mut crate::W { + self.variant(Mode::Ws3) } } impl R { #[doc = "Bits 20:21 - Read Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new(((self.bits >> 20) & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new(((self.bits >> 20) & 3) as u8) } } impl W { #[doc = "Bits 20:21 - Read Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<20> { - MODE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 20) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [readctrl](index.html) module"] -pub struct READCTRL_SPEC; -impl crate::RegisterSpec for READCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`readctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`readctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ReadctrlSpec; +impl crate::RegisterSpec for ReadctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [readctrl::R](R) reader structure"] -impl crate::Readable for READCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [readctrl::W](W) writer structure"] -impl crate::Writable for READCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`readctrl::R`](R) reader structure"] +impl crate::Readable for ReadctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`readctrl::W`](W) writer structure"] +impl crate::Writable for ReadctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets READCTRL to value 0x0020_0000"] -impl crate::Resettable for READCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0020_0000; +impl crate::Resettable for ReadctrlSpec { + const RESET_VALUE: u32 = 0x0020_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/status.rs index 4b8f911..7e0eef6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/status.rs @@ -1,148 +1,133 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `BUSY` reader - Erase/Write Busy"] -pub type BUSY_R = crate::BitReader; +pub type BusyR = crate::BitReader; #[doc = "Field `LOCKED` reader - Access Locked"] -pub type LOCKED_R = crate::BitReader; +pub type LockedR = crate::BitReader; #[doc = "Field `INVADDR` reader - Invalid Write Address or Erase Page"] -pub type INVADDR_R = crate::BitReader; +pub type InvaddrR = crate::BitReader; #[doc = "Field `WDATAREADY` reader - WDATA Write Ready"] -pub type WDATAREADY_R = crate::BitReader; -#[doc = "Field `ERASEABORTED` reader - The Current Flash Erase Operation Aborte"] -pub type ERASEABORTED_R = crate::BitReader; -#[doc = "Field `PENDING` reader - Write command is in queue"] -pub type PENDING_R = crate::BitReader; -#[doc = "Field `TIMEOUT` reader - Write command timeout flag"] -pub type TIMEOUT_R = crate::BitReader; +pub type WdatareadyR = crate::BitReader; +#[doc = "Field `ERASEABORTED` reader - Erase Operation Aborted"] +pub type EraseabortedR = crate::BitReader; +#[doc = "Field `PENDING` reader - Write Command In Queue"] +pub type PendingR = crate::BitReader; +#[doc = "Field `TIMEOUT` reader - Write Command Timeout"] +pub type TimeoutR = crate::BitReader; #[doc = "Field `RANGEPARTIAL` reader - EraseRange with skipped locked pages"] -pub type RANGEPARTIAL_R = crate::BitReader; -#[doc = "Field `REGLOCK` reader - Register Lock Status"] -pub type REGLOCK_R = crate::BitReader; +pub type RangepartialR = crate::BitReader; #[doc = "Register Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REGLOCK_A { +pub enum Reglock { #[doc = "0: UNLOCKED"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: LOCKED"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REGLOCK_A) -> Self { + fn from(variant: Reglock) -> Self { variant as u8 != 0 } } -impl REGLOCK_R { +#[doc = "Field `REGLOCK` reader - Register Lock Status"] +pub type ReglockR = crate::BitReader; +impl ReglockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REGLOCK_A { + pub const fn variant(&self) -> Reglock { match self.bits { - false => REGLOCK_A::UNLOCKED, - true => REGLOCK_A::LOCKED, + false => Reglock::Unlocked, + true => Reglock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "UNLOCKED"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == REGLOCK_A::UNLOCKED + *self == Reglock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "LOCKED"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == REGLOCK_A::LOCKED + *self == Reglock::Locked } } #[doc = "Field `PWRON` reader - Flash power on status"] -pub type PWRON_R = crate::BitReader; +pub type PwronR = crate::BitReader; #[doc = "Field `WREADY` reader - Flash Write Ready"] -pub type WREADY_R = crate::BitReader; +pub type WreadyR = crate::BitReader; #[doc = "Field `PWRUPCKBDFAILCOUNT` reader - Flash power up checkerboard pattern chec"] -pub type PWRUPCKBDFAILCOUNT_R = crate::FieldReader; +pub type PwrupckbdfailcountR = crate::FieldReader; impl R { #[doc = "Bit 0 - Erase/Write Busy"] #[inline(always)] - pub fn busy(&self) -> BUSY_R { - BUSY_R::new((self.bits & 1) != 0) + pub fn busy(&self) -> BusyR { + BusyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Access Locked"] #[inline(always)] - pub fn locked(&self) -> LOCKED_R { - LOCKED_R::new(((self.bits >> 1) & 1) != 0) + pub fn locked(&self) -> LockedR { + LockedR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Invalid Write Address or Erase Page"] #[inline(always)] - pub fn invaddr(&self) -> INVADDR_R { - INVADDR_R::new(((self.bits >> 2) & 1) != 0) + pub fn invaddr(&self) -> InvaddrR { + InvaddrR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - WDATA Write Ready"] #[inline(always)] - pub fn wdataready(&self) -> WDATAREADY_R { - WDATAREADY_R::new(((self.bits >> 3) & 1) != 0) + pub fn wdataready(&self) -> WdatareadyR { + WdatareadyR::new(((self.bits >> 3) & 1) != 0) } - #[doc = "Bit 4 - The Current Flash Erase Operation Aborte"] + #[doc = "Bit 4 - Erase Operation Aborted"] #[inline(always)] - pub fn eraseaborted(&self) -> ERASEABORTED_R { - ERASEABORTED_R::new(((self.bits >> 4) & 1) != 0) + pub fn eraseaborted(&self) -> EraseabortedR { + EraseabortedR::new(((self.bits >> 4) & 1) != 0) } - #[doc = "Bit 5 - Write command is in queue"] + #[doc = "Bit 5 - Write Command In Queue"] #[inline(always)] - pub fn pending(&self) -> PENDING_R { - PENDING_R::new(((self.bits >> 5) & 1) != 0) + pub fn pending(&self) -> PendingR { + PendingR::new(((self.bits >> 5) & 1) != 0) } - #[doc = "Bit 6 - Write command timeout flag"] + #[doc = "Bit 6 - Write Command Timeout"] #[inline(always)] - pub fn timeout(&self) -> TIMEOUT_R { - TIMEOUT_R::new(((self.bits >> 6) & 1) != 0) + pub fn timeout(&self) -> TimeoutR { + TimeoutR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - EraseRange with skipped locked pages"] #[inline(always)] - pub fn rangepartial(&self) -> RANGEPARTIAL_R { - RANGEPARTIAL_R::new(((self.bits >> 7) & 1) != 0) + pub fn rangepartial(&self) -> RangepartialR { + RangepartialR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 16 - Register Lock Status"] #[inline(always)] - pub fn reglock(&self) -> REGLOCK_R { - REGLOCK_R::new(((self.bits >> 16) & 1) != 0) + pub fn reglock(&self) -> ReglockR { + ReglockR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 24 - Flash power on status"] #[inline(always)] - pub fn pwron(&self) -> PWRON_R { - PWRON_R::new(((self.bits >> 24) & 1) != 0) + pub fn pwron(&self) -> PwronR { + PwronR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 27 - Flash Write Ready"] #[inline(always)] - pub fn wready(&self) -> WREADY_R { - WREADY_R::new(((self.bits >> 27) & 1) != 0) + pub fn wready(&self) -> WreadyR { + WreadyR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bits 28:31 - Flash power up checkerboard pattern chec"] #[inline(always)] - pub fn pwrupckbdfailcount(&self) -> PWRUPCKBDFAILCOUNT_R { - PWRUPCKBDFAILCOUNT_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn pwrupckbdfailcount(&self) -> PwrupckbdfailcountR { + PwrupckbdfailcountR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0x0800_0008"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0x0800_0008; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0x0800_0008; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/userdatasize.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/userdatasize.rs index 6759fca..786a59b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/userdatasize.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/userdatasize.rs @@ -1,37 +1,22 @@ #[doc = "Register `USERDATASIZE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `USERDATASIZE` reader - User Data Size"] -pub type USERDATASIZE_R = crate::FieldReader; +pub type UserdatasizeR = crate::FieldReader; impl R { #[doc = "Bits 0:5 - User Data Size"] #[inline(always)] - pub fn userdatasize(&self) -> USERDATASIZE_R { - USERDATASIZE_R::new((self.bits & 0x3f) as u8) + pub fn userdatasize(&self) -> UserdatasizeR { + UserdatasizeR::new((self.bits & 0x3f) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [userdatasize](index.html) module"] -pub struct USERDATASIZE_SPEC; -impl crate::RegisterSpec for USERDATASIZE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`userdatasize::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct UserdatasizeSpec; +impl crate::RegisterSpec for UserdatasizeSpec { type Ux = u32; } -#[doc = "`read()` method returns [userdatasize::R](R) reader structure"] -impl crate::Readable for USERDATASIZE_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`userdatasize::R`](R) reader structure"] +impl crate::Readable for UserdatasizeSpec {} #[doc = "`reset()` method sets USERDATASIZE to value 0x04"] -impl crate::Resettable for USERDATASIZE_SPEC { - const RESET_VALUE: Self::Ux = 0x04; +impl crate::Resettable for UserdatasizeSpec { + const RESET_VALUE: u32 = 0x04; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/wdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/wdata.rs index 6bdf3d7..a1828da 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/wdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/wdata.rs @@ -1,80 +1,40 @@ #[doc = "Register `WDATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `WDATA` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DATAW` reader - Write Data"] -pub type DATAW_R = crate::FieldReader; +pub type DatawR = crate::FieldReader; #[doc = "Field `DATAW` writer - Write Data"] -pub type DATAW_W<'a, const O: u8> = crate::FieldWriter<'a, u32, WDATA_SPEC, u32, u32, 32, O>; +pub type DatawW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Write Data"] #[inline(always)] - pub fn dataw(&self) -> DATAW_R { - DATAW_R::new(self.bits) + pub fn dataw(&self) -> DatawR { + DatawR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Write Data"] #[inline(always)] #[must_use] - pub fn dataw(&mut self) -> DATAW_W<0> { - DATAW_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dataw(&mut self) -> DatawW { + DatawW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdata](index.html) module"] -pub struct WDATA_SPEC; -impl crate::RegisterSpec for WDATA_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`wdata::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdata::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct WdataSpec; +impl crate::RegisterSpec for WdataSpec { type Ux = u32; } -#[doc = "`read()` method returns [wdata::R](R) reader structure"] -impl crate::Readable for WDATA_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [wdata::W](W) writer structure"] -impl crate::Writable for WDATA_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`wdata::R`](R) reader structure"] +impl crate::Readable for WdataSpec {} +#[doc = "`write(|w| ..)` method takes [`wdata::W`](W) writer structure"] +impl crate::Writable for WdataSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WDATA to value 0"] -impl crate::Resettable for WDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for WdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/writecmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/writecmd.rs index 3c049b2..f411730 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/writecmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/writecmd.rs @@ -1,92 +1,67 @@ #[doc = "Register `WRITECMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ERASEPAGE` writer - Erase Page"] -pub type ERASEPAGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, WRITECMD_SPEC, bool, O>; +pub type ErasepageW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WRITEEND` writer - End Write Mode"] -pub type WRITEEND_W<'a, const O: u8> = crate::BitWriter<'a, u32, WRITECMD_SPEC, bool, O>; +pub type WriteendW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ERASERANGE` writer - Erase range of pages"] -pub type ERASERANGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, WRITECMD_SPEC, bool, O>; +pub type EraserangeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ERASEABORT` writer - Abort erase sequence"] -pub type ERASEABORT_W<'a, const O: u8> = crate::BitWriter<'a, u32, WRITECMD_SPEC, bool, O>; +pub type EraseabortW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ERASEMAIN0` writer - Mass erase region 0"] -pub type ERASEMAIN0_W<'a, const O: u8> = crate::BitWriter<'a, u32, WRITECMD_SPEC, bool, O>; +pub type Erasemain0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEARWDATA` writer - Clear WDATA state"] -pub type CLEARWDATA_W<'a, const O: u8> = crate::BitWriter<'a, u32, WRITECMD_SPEC, bool, O>; +pub type ClearwdataW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 1 - Erase Page"] #[inline(always)] #[must_use] - pub fn erasepage(&mut self) -> ERASEPAGE_W<1> { - ERASEPAGE_W::new(self) + pub fn erasepage(&mut self) -> ErasepageW { + ErasepageW::new(self, 1) } #[doc = "Bit 2 - End Write Mode"] #[inline(always)] #[must_use] - pub fn writeend(&mut self) -> WRITEEND_W<2> { - WRITEEND_W::new(self) + pub fn writeend(&mut self) -> WriteendW { + WriteendW::new(self, 2) } #[doc = "Bit 4 - Erase range of pages"] #[inline(always)] #[must_use] - pub fn eraserange(&mut self) -> ERASERANGE_W<4> { - ERASERANGE_W::new(self) + pub fn eraserange(&mut self) -> EraserangeW { + EraserangeW::new(self, 4) } #[doc = "Bit 5 - Abort erase sequence"] #[inline(always)] #[must_use] - pub fn eraseabort(&mut self) -> ERASEABORT_W<5> { - ERASEABORT_W::new(self) + pub fn eraseabort(&mut self) -> EraseabortW { + EraseabortW::new(self, 5) } #[doc = "Bit 8 - Mass erase region 0"] #[inline(always)] #[must_use] - pub fn erasemain0(&mut self) -> ERASEMAIN0_W<8> { - ERASEMAIN0_W::new(self) + pub fn erasemain0(&mut self) -> Erasemain0W { + Erasemain0W::new(self, 8) } #[doc = "Bit 12 - Clear WDATA state"] #[inline(always)] #[must_use] - pub fn clearwdata(&mut self) -> CLEARWDATA_W<12> { - CLEARWDATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clearwdata(&mut self) -> ClearwdataW { + ClearwdataW::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [writecmd](index.html) module"] -pub struct WRITECMD_SPEC; -impl crate::RegisterSpec for WRITECMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`writecmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct WritecmdSpec; +impl crate::RegisterSpec for WritecmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [writecmd::W](W) writer structure"] -impl crate::Writable for WRITECMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`writecmd::W`](W) writer structure"] +impl crate::Writable for WritecmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WRITECMD to value 0"] -impl crate::Resettable for WRITECMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for WritecmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/writectrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/writectrl.rs index 6a2418b..37e7842 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/writectrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_ns/writectrl.rs @@ -1,125 +1,85 @@ #[doc = "Register `WRITECTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `WRITECTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `WREN` reader - Enable Write/Erase Controller"] -pub type WREN_R = crate::BitReader; +pub type WrenR = crate::BitReader; #[doc = "Field `WREN` writer - Enable Write/Erase Controller"] -pub type WREN_W<'a, const O: u8> = crate::BitWriter<'a, u32, WRITECTRL_SPEC, bool, O>; +pub type WrenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IRQERASEABORT` reader - Abort Page Erase on Interrupt"] -pub type IRQERASEABORT_R = crate::BitReader; +pub type IrqeraseabortR = crate::BitReader; #[doc = "Field `IRQERASEABORT` writer - Abort Page Erase on Interrupt"] -pub type IRQERASEABORT_W<'a, const O: u8> = crate::BitWriter<'a, u32, WRITECTRL_SPEC, bool, O>; +pub type IrqeraseabortW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LPWRITE` reader - Low-Power Write"] -pub type LPWRITE_R = crate::BitReader; +pub type LpwriteR = crate::BitReader; #[doc = "Field `LPWRITE` writer - Low-Power Write"] -pub type LPWRITE_W<'a, const O: u8> = crate::BitWriter<'a, u32, WRITECTRL_SPEC, bool, O>; +pub type LpwriteW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RANGECOUNT` reader - EraseRange Count"] -pub type RANGECOUNT_R = crate::FieldReader; +pub type RangecountR = crate::FieldReader; #[doc = "Field `RANGECOUNT` writer - EraseRange Count"] -pub type RANGECOUNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, WRITECTRL_SPEC, u8, u8, 8, O>; +pub type RangecountW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bit 0 - Enable Write/Erase Controller"] #[inline(always)] - pub fn wren(&self) -> WREN_R { - WREN_R::new((self.bits & 1) != 0) + pub fn wren(&self) -> WrenR { + WrenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Abort Page Erase on Interrupt"] #[inline(always)] - pub fn irqeraseabort(&self) -> IRQERASEABORT_R { - IRQERASEABORT_R::new(((self.bits >> 1) & 1) != 0) + pub fn irqeraseabort(&self) -> IrqeraseabortR { + IrqeraseabortR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - Low-Power Write"] #[inline(always)] - pub fn lpwrite(&self) -> LPWRITE_R { - LPWRITE_R::new(((self.bits >> 3) & 1) != 0) + pub fn lpwrite(&self) -> LpwriteR { + LpwriteR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 16:23 - EraseRange Count"] #[inline(always)] - pub fn rangecount(&self) -> RANGECOUNT_R { - RANGECOUNT_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn rangecount(&self) -> RangecountR { + RangecountR::new(((self.bits >> 16) & 0xff) as u8) } } impl W { #[doc = "Bit 0 - Enable Write/Erase Controller"] #[inline(always)] #[must_use] - pub fn wren(&mut self) -> WREN_W<0> { - WREN_W::new(self) + pub fn wren(&mut self) -> WrenW { + WrenW::new(self, 0) } #[doc = "Bit 1 - Abort Page Erase on Interrupt"] #[inline(always)] #[must_use] - pub fn irqeraseabort(&mut self) -> IRQERASEABORT_W<1> { - IRQERASEABORT_W::new(self) + pub fn irqeraseabort(&mut self) -> IrqeraseabortW { + IrqeraseabortW::new(self, 1) } #[doc = "Bit 3 - Low-Power Write"] #[inline(always)] #[must_use] - pub fn lpwrite(&mut self) -> LPWRITE_W<3> { - LPWRITE_W::new(self) + pub fn lpwrite(&mut self) -> LpwriteW { + LpwriteW::new(self, 3) } #[doc = "Bits 16:23 - EraseRange Count"] #[inline(always)] #[must_use] - pub fn rangecount(&mut self) -> RANGECOUNT_W<16> { - RANGECOUNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rangecount(&mut self) -> RangecountW { + RangecountW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [writectrl](index.html) module"] -pub struct WRITECTRL_SPEC; -impl crate::RegisterSpec for WRITECTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`writectrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`writectrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct WritectrlSpec; +impl crate::RegisterSpec for WritectrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [writectrl::R](R) reader structure"] -impl crate::Readable for WRITECTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [writectrl::W](W) writer structure"] -impl crate::Writable for WRITECTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`writectrl::R`](R) reader structure"] +impl crate::Readable for WritectrlSpec {} +#[doc = "`write(|w| ..)` method takes [`writectrl::W`](W) writer structure"] +impl crate::Writable for WritectrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WRITECTRL to value 0"] -impl crate::Resettable for WRITECTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for WritectrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s.rs index 853ee17..62ae0e4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s.rs @@ -1,109 +1,213 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + readctrl: Readctrl, + rdatactrl: Rdatactrl, + writectrl: Writectrl, + writecmd: Writecmd, + addrb: Addrb, + wdata: Wdata, + status: Status, + if_: If, + ien: Ien, + _reserved10: [u8; 0x0c], + userdatasize: Userdatasize, + cmd: Cmd, + lock: Lock, + misclockword: Misclockword, + _reserved14: [u8; 0x0c], + pwrctrl: Pwrctrl, + _reserved15: [u8; 0xcc], + pagelock0: Pagelock0, + pagelock1: Pagelock1, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub readctrl: READCTRL, + #[inline(always)] + pub const fn readctrl(&self) -> &Readctrl { + &self.readctrl + } #[doc = "0x08 - No Description"] - pub rdatactrl: RDATACTRL, + #[inline(always)] + pub const fn rdatactrl(&self) -> &Rdatactrl { + &self.rdatactrl + } #[doc = "0x0c - No Description"] - pub writectrl: WRITECTRL, + #[inline(always)] + pub const fn writectrl(&self) -> &Writectrl { + &self.writectrl + } #[doc = "0x10 - No Description"] - pub writecmd: WRITECMD, + #[inline(always)] + pub const fn writecmd(&self) -> &Writecmd { + &self.writecmd + } #[doc = "0x14 - No Description"] - pub addrb: ADDRB, + #[inline(always)] + pub const fn addrb(&self) -> &Addrb { + &self.addrb + } #[doc = "0x18 - No Description"] - pub wdata: WDATA, + #[inline(always)] + pub const fn wdata(&self) -> &Wdata { + &self.wdata + } #[doc = "0x1c - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x20 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x24 - No Description"] - pub ien: IEN, - _reserved10: [u8; 0x0c], + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x34 - No Description"] - pub userdatasize: USERDATASIZE, + #[inline(always)] + pub const fn userdatasize(&self) -> &Userdatasize { + &self.userdatasize + } #[doc = "0x38 - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x3c - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x40 - No Description"] - pub misclockword: MISCLOCKWORD, - _reserved14: [u8; 0x0c], + #[inline(always)] + pub const fn misclockword(&self) -> &Misclockword { + &self.misclockword + } #[doc = "0x50 - No Description"] - pub pwrctrl: PWRCTRL, - _reserved15: [u8; 0xcc], + #[inline(always)] + pub const fn pwrctrl(&self) -> &Pwrctrl { + &self.pwrctrl + } #[doc = "0x120 - No Description"] - pub pagelock0: PAGELOCK0, + #[inline(always)] + pub const fn pagelock0(&self) -> &Pagelock0 { + &self.pagelock0 + } #[doc = "0x124 - No Description"] - pub pagelock1: PAGELOCK1, + #[inline(always)] + pub const fn pagelock1(&self) -> &Pagelock1 { + &self.pagelock1 + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "READCTRL (rw) register accessor: an alias for `Reg`"] -pub type READCTRL = crate::Reg; +#[doc = "READCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`readctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`readctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@readctrl`] +module"] +#[doc(alias = "READCTRL")] +pub type Readctrl = crate::Reg; #[doc = "No Description"] pub mod readctrl; -#[doc = "RDATACTRL (rw) register accessor: an alias for `Reg`"] -pub type RDATACTRL = crate::Reg; +#[doc = "RDATACTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rdatactrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rdatactrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rdatactrl`] +module"] +#[doc(alias = "RDATACTRL")] +pub type Rdatactrl = crate::Reg; #[doc = "No Description"] pub mod rdatactrl; -#[doc = "WRITECTRL (rw) register accessor: an alias for `Reg`"] -pub type WRITECTRL = crate::Reg; +#[doc = "WRITECTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`writectrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`writectrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@writectrl`] +module"] +#[doc(alias = "WRITECTRL")] +pub type Writectrl = crate::Reg; #[doc = "No Description"] pub mod writectrl; -#[doc = "WRITECMD (w) register accessor: an alias for `Reg`"] -pub type WRITECMD = crate::Reg; +#[doc = "WRITECMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`writecmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@writecmd`] +module"] +#[doc(alias = "WRITECMD")] +pub type Writecmd = crate::Reg; #[doc = "No Description"] pub mod writecmd; -#[doc = "ADDRB (rw) register accessor: an alias for `Reg`"] -pub type ADDRB = crate::Reg; +#[doc = "ADDRB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`addrb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addrb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addrb`] +module"] +#[doc(alias = "ADDRB")] +pub type Addrb = crate::Reg; #[doc = "No Description"] pub mod addrb; -#[doc = "WDATA (rw) register accessor: an alias for `Reg`"] -pub type WDATA = crate::Reg; +#[doc = "WDATA (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`wdata::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdata::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdata`] +module"] +#[doc(alias = "WDATA")] +pub type Wdata = crate::Reg; #[doc = "No Description"] pub mod wdata; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "USERDATASIZE (r) register accessor: an alias for `Reg`"] -pub type USERDATASIZE = crate::Reg; +#[doc = "USERDATASIZE (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`userdatasize::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@userdatasize`] +module"] +#[doc(alias = "USERDATASIZE")] +pub type Userdatasize = crate::Reg; #[doc = "No Description"] pub mod userdatasize; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "MISCLOCKWORD (rw) register accessor: an alias for `Reg`"] -pub type MISCLOCKWORD = crate::Reg; +#[doc = "MISCLOCKWORD (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`misclockword::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`misclockword::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@misclockword`] +module"] +#[doc(alias = "MISCLOCKWORD")] +pub type Misclockword = crate::Reg; #[doc = "No Description"] pub mod misclockword; -#[doc = "PWRCTRL (rw) register accessor: an alias for `Reg`"] -pub type PWRCTRL = crate::Reg; +#[doc = "PWRCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pwrctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwrctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwrctrl`] +module"] +#[doc(alias = "PWRCTRL")] +pub type Pwrctrl = crate::Reg; #[doc = "No Description"] pub mod pwrctrl; -#[doc = "PAGELOCK0 (rw) register accessor: an alias for `Reg`"] -pub type PAGELOCK0 = crate::Reg; +#[doc = "PAGELOCK0 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pagelock0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pagelock0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pagelock0`] +module"] +#[doc(alias = "PAGELOCK0")] +pub type Pagelock0 = crate::Reg; #[doc = "No Description"] pub mod pagelock0; -#[doc = "PAGELOCK1 (rw) register accessor: an alias for `Reg`"] -pub type PAGELOCK1 = crate::Reg; +#[doc = "PAGELOCK1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pagelock1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pagelock1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pagelock1`] +module"] +#[doc(alias = "PAGELOCK1")] +pub type Pagelock1 = crate::Reg; #[doc = "No Description"] pub mod pagelock1; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/addrb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/addrb.rs index 028fa8b..933c3b0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/addrb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/addrb.rs @@ -1,80 +1,40 @@ #[doc = "Register `ADDRB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ADDRB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ADDRB` reader - Page Erase or Write Address Buffer"] -pub type ADDRB_R = crate::FieldReader; +pub type AddrbR = crate::FieldReader; #[doc = "Field `ADDRB` writer - Page Erase or Write Address Buffer"] -pub type ADDRB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ADDRB_SPEC, u32, u32, 32, O>; +pub type AddrbW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Page Erase or Write Address Buffer"] #[inline(always)] - pub fn addrb(&self) -> ADDRB_R { - ADDRB_R::new(self.bits) + pub fn addrb(&self) -> AddrbR { + AddrbR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Page Erase or Write Address Buffer"] #[inline(always)] #[must_use] - pub fn addrb(&mut self) -> ADDRB_W<0> { - ADDRB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn addrb(&mut self) -> AddrbW { + AddrbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [addrb](index.html) module"] -pub struct ADDRB_SPEC; -impl crate::RegisterSpec for ADDRB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`addrb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addrb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AddrbSpec; +impl crate::RegisterSpec for AddrbSpec { type Ux = u32; } -#[doc = "`read()` method returns [addrb::R](R) reader structure"] -impl crate::Readable for ADDRB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [addrb::W](W) writer structure"] -impl crate::Writable for ADDRB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`addrb::R`](R) reader structure"] +impl crate::Readable for AddrbSpec {} +#[doc = "`write(|w| ..)` method takes [`addrb::W`](W) writer structure"] +impl crate::Writable for AddrbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ADDRB to value 0"] -impl crate::Resettable for ADDRB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for AddrbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/cmd.rs index fdab189..351e2e6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/cmd.rs @@ -1,60 +1,35 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PWRUP` writer - Flash Power Up Command"] -pub type PWRUP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type PwrupW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PWROFF` writer - Flash power off/sleep command"] -pub type PWROFF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type PwroffW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Flash Power Up Command"] #[inline(always)] #[must_use] - pub fn pwrup(&mut self) -> PWRUP_W<0> { - PWRUP_W::new(self) + pub fn pwrup(&mut self) -> PwrupW { + PwrupW::new(self, 0) } #[doc = "Bit 4 - Flash power off/sleep command"] #[inline(always)] #[must_use] - pub fn pwroff(&mut self) -> PWROFF_W<4> { - PWROFF_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pwroff(&mut self) -> PwroffW { + PwroffW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/ien.rs index 859c9b6..e425697 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/ien.rs @@ -1,140 +1,100 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ERASE` reader - Erase Done Interrupt enable"] -pub type ERASE_R = crate::BitReader; +pub type EraseR = crate::BitReader; #[doc = "Field `ERASE` writer - Erase Done Interrupt enable"] -pub type ERASE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type EraseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WRITE` reader - Write Done Interrupt enable"] -pub type WRITE_R = crate::BitReader; +pub type WriteR = crate::BitReader; #[doc = "Field `WRITE` writer - Write Done Interrupt enable"] -pub type WRITE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type WriteW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WDATAOV` reader - write data buffer overflow irq enable"] -pub type WDATAOV_R = crate::BitReader; +pub type WdataovR = crate::BitReader; #[doc = "Field `WDATAOV` writer - write data buffer overflow irq enable"] -pub type WDATAOV_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type WdataovW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PWRUPF` reader - Flash Power Up Seq done irq enable"] -pub type PWRUPF_R = crate::BitReader; +pub type PwrupfR = crate::BitReader; #[doc = "Field `PWRUPF` writer - Flash Power Up Seq done irq enable"] -pub type PWRUPF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PwrupfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PWROFF` reader - Flash Power Off Seq done irq enable"] -pub type PWROFF_R = crate::BitReader; +pub type PwroffR = crate::BitReader; #[doc = "Field `PWROFF` writer - Flash Power Off Seq done irq enable"] -pub type PWROFF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PwroffW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Erase Done Interrupt enable"] #[inline(always)] - pub fn erase(&self) -> ERASE_R { - ERASE_R::new((self.bits & 1) != 0) + pub fn erase(&self) -> EraseR { + EraseR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Write Done Interrupt enable"] #[inline(always)] - pub fn write(&self) -> WRITE_R { - WRITE_R::new(((self.bits >> 1) & 1) != 0) + pub fn write(&self) -> WriteR { + WriteR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - write data buffer overflow irq enable"] #[inline(always)] - pub fn wdataov(&self) -> WDATAOV_R { - WDATAOV_R::new(((self.bits >> 2) & 1) != 0) + pub fn wdataov(&self) -> WdataovR { + WdataovR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 8 - Flash Power Up Seq done irq enable"] #[inline(always)] - pub fn pwrupf(&self) -> PWRUPF_R { - PWRUPF_R::new(((self.bits >> 8) & 1) != 0) + pub fn pwrupf(&self) -> PwrupfR { + PwrupfR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Flash Power Off Seq done irq enable"] #[inline(always)] - pub fn pwroff(&self) -> PWROFF_R { - PWROFF_R::new(((self.bits >> 9) & 1) != 0) + pub fn pwroff(&self) -> PwroffR { + PwroffR::new(((self.bits >> 9) & 1) != 0) } } impl W { #[doc = "Bit 0 - Erase Done Interrupt enable"] #[inline(always)] #[must_use] - pub fn erase(&mut self) -> ERASE_W<0> { - ERASE_W::new(self) + pub fn erase(&mut self) -> EraseW { + EraseW::new(self, 0) } #[doc = "Bit 1 - Write Done Interrupt enable"] #[inline(always)] #[must_use] - pub fn write(&mut self) -> WRITE_W<1> { - WRITE_W::new(self) + pub fn write(&mut self) -> WriteW { + WriteW::new(self, 1) } #[doc = "Bit 2 - write data buffer overflow irq enable"] #[inline(always)] #[must_use] - pub fn wdataov(&mut self) -> WDATAOV_W<2> { - WDATAOV_W::new(self) + pub fn wdataov(&mut self) -> WdataovW { + WdataovW::new(self, 2) } #[doc = "Bit 8 - Flash Power Up Seq done irq enable"] #[inline(always)] #[must_use] - pub fn pwrupf(&mut self) -> PWRUPF_W<8> { - PWRUPF_W::new(self) + pub fn pwrupf(&mut self) -> PwrupfW { + PwrupfW::new(self, 8) } #[doc = "Bit 9 - Flash Power Off Seq done irq enable"] #[inline(always)] #[must_use] - pub fn pwroff(&mut self) -> PWROFF_W<9> { - PWROFF_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pwroff(&mut self) -> PwroffW { + PwroffW::new(self, 9) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/if_.rs index abc6f7e..a47016e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/if_.rs @@ -1,140 +1,100 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ERASE` reader - Host Erase Done Interrupt Read Flag"] -pub type ERASE_R = crate::BitReader; +pub type EraseR = crate::BitReader; #[doc = "Field `ERASE` writer - Host Erase Done Interrupt Read Flag"] -pub type ERASE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type EraseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WRITE` reader - Host Write Done Interrupt Read Flag"] -pub type WRITE_R = crate::BitReader; +pub type WriteR = crate::BitReader; #[doc = "Field `WRITE` writer - Host Write Done Interrupt Read Flag"] -pub type WRITE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type WriteW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WDATAOV` reader - Host write buffer overflow"] -pub type WDATAOV_R = crate::BitReader; +pub type WdataovR = crate::BitReader; #[doc = "Field `WDATAOV` writer - Host write buffer overflow"] -pub type WDATAOV_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type WdataovW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PWRUPF` reader - Flash Power Up Sequence Complete Flag"] -pub type PWRUPF_R = crate::BitReader; +pub type PwrupfR = crate::BitReader; #[doc = "Field `PWRUPF` writer - Flash Power Up Sequence Complete Flag"] -pub type PWRUPF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PwrupfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PWROFF` reader - Flash Power Off Sequence Complete Flag"] -pub type PWROFF_R = crate::BitReader; +pub type PwroffR = crate::BitReader; #[doc = "Field `PWROFF` writer - Flash Power Off Sequence Complete Flag"] -pub type PWROFF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PwroffW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Host Erase Done Interrupt Read Flag"] #[inline(always)] - pub fn erase(&self) -> ERASE_R { - ERASE_R::new((self.bits & 1) != 0) + pub fn erase(&self) -> EraseR { + EraseR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Host Write Done Interrupt Read Flag"] #[inline(always)] - pub fn write(&self) -> WRITE_R { - WRITE_R::new(((self.bits >> 1) & 1) != 0) + pub fn write(&self) -> WriteR { + WriteR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Host write buffer overflow"] #[inline(always)] - pub fn wdataov(&self) -> WDATAOV_R { - WDATAOV_R::new(((self.bits >> 2) & 1) != 0) + pub fn wdataov(&self) -> WdataovR { + WdataovR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 8 - Flash Power Up Sequence Complete Flag"] #[inline(always)] - pub fn pwrupf(&self) -> PWRUPF_R { - PWRUPF_R::new(((self.bits >> 8) & 1) != 0) + pub fn pwrupf(&self) -> PwrupfR { + PwrupfR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Flash Power Off Sequence Complete Flag"] #[inline(always)] - pub fn pwroff(&self) -> PWROFF_R { - PWROFF_R::new(((self.bits >> 9) & 1) != 0) + pub fn pwroff(&self) -> PwroffR { + PwroffR::new(((self.bits >> 9) & 1) != 0) } } impl W { #[doc = "Bit 0 - Host Erase Done Interrupt Read Flag"] #[inline(always)] #[must_use] - pub fn erase(&mut self) -> ERASE_W<0> { - ERASE_W::new(self) + pub fn erase(&mut self) -> EraseW { + EraseW::new(self, 0) } #[doc = "Bit 1 - Host Write Done Interrupt Read Flag"] #[inline(always)] #[must_use] - pub fn write(&mut self) -> WRITE_W<1> { - WRITE_W::new(self) + pub fn write(&mut self) -> WriteW { + WriteW::new(self, 1) } #[doc = "Bit 2 - Host write buffer overflow"] #[inline(always)] #[must_use] - pub fn wdataov(&mut self) -> WDATAOV_W<2> { - WDATAOV_W::new(self) + pub fn wdataov(&mut self) -> WdataovW { + WdataovW::new(self, 2) } #[doc = "Bit 8 - Flash Power Up Sequence Complete Flag"] #[inline(always)] #[must_use] - pub fn pwrupf(&mut self) -> PWRUPF_W<8> { - PWRUPF_W::new(self) + pub fn pwrupf(&mut self) -> PwrupfW { + PwrupfW::new(self, 8) } #[doc = "Bit 9 - Flash Power Off Sequence Complete Flag"] #[inline(always)] #[must_use] - pub fn pwroff(&mut self) -> PWROFF_W<9> { - PWROFF_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pwroff(&mut self) -> PwroffW { + PwroffW::new(self, 9) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/ipversion.rs index 1c8b3f7..dc1f830 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x02"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/lock.rs index 58b214a..9394c76 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/lock.rs @@ -1,80 +1,62 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Configuration Lock\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "0: LOCK"] - LOCK = 0, + Lock = 0, #[doc = "7025: UNLOCK"] - UNLOCK = 7025, + Unlock = 7025, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Configuration Lock"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "LOCK"] #[inline(always)] - pub fn lock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::LOCK) + pub fn lock(self) -> &'a mut crate::W { + self.variant(Lockkey::Lock) } #[doc = "UNLOCK"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Configuration Lock"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/misclockword.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/misclockword.rs index 30edd8f..2ca8c20 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/misclockword.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/misclockword.rs @@ -1,95 +1,55 @@ #[doc = "Register `MISCLOCKWORD` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `MISCLOCKWORD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `MELOCKBIT` reader - Mass Erase Lock"] -pub type MELOCKBIT_R = crate::BitReader; +pub type MelockbitR = crate::BitReader; #[doc = "Field `MELOCKBIT` writer - Mass Erase Lock"] -pub type MELOCKBIT_W<'a, const O: u8> = crate::BitWriter<'a, u32, MISCLOCKWORD_SPEC, bool, O>; +pub type MelockbitW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UDLOCKBIT` reader - User Data Lock"] -pub type UDLOCKBIT_R = crate::BitReader; +pub type UdlockbitR = crate::BitReader; #[doc = "Field `UDLOCKBIT` writer - User Data Lock"] -pub type UDLOCKBIT_W<'a, const O: u8> = crate::BitWriter<'a, u32, MISCLOCKWORD_SPEC, bool, O>; +pub type UdlockbitW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Mass Erase Lock"] #[inline(always)] - pub fn melockbit(&self) -> MELOCKBIT_R { - MELOCKBIT_R::new((self.bits & 1) != 0) + pub fn melockbit(&self) -> MelockbitR { + MelockbitR::new((self.bits & 1) != 0) } #[doc = "Bit 4 - User Data Lock"] #[inline(always)] - pub fn udlockbit(&self) -> UDLOCKBIT_R { - UDLOCKBIT_R::new(((self.bits >> 4) & 1) != 0) + pub fn udlockbit(&self) -> UdlockbitR { + UdlockbitR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - Mass Erase Lock"] #[inline(always)] #[must_use] - pub fn melockbit(&mut self) -> MELOCKBIT_W<0> { - MELOCKBIT_W::new(self) + pub fn melockbit(&mut self) -> MelockbitW { + MelockbitW::new(self, 0) } #[doc = "Bit 4 - User Data Lock"] #[inline(always)] #[must_use] - pub fn udlockbit(&mut self) -> UDLOCKBIT_W<4> { - UDLOCKBIT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn udlockbit(&mut self) -> UdlockbitW { + UdlockbitW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [misclockword](index.html) module"] -pub struct MISCLOCKWORD_SPEC; -impl crate::RegisterSpec for MISCLOCKWORD_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`misclockword::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`misclockword::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct MisclockwordSpec; +impl crate::RegisterSpec for MisclockwordSpec { type Ux = u32; } -#[doc = "`read()` method returns [misclockword::R](R) reader structure"] -impl crate::Readable for MISCLOCKWORD_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [misclockword::W](W) writer structure"] -impl crate::Writable for MISCLOCKWORD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`misclockword::R`](R) reader structure"] +impl crate::Readable for MisclockwordSpec {} +#[doc = "`write(|w| ..)` method takes [`misclockword::W`](W) writer structure"] +impl crate::Writable for MisclockwordSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MISCLOCKWORD to value 0x11"] -impl crate::Resettable for MISCLOCKWORD_SPEC { - const RESET_VALUE: Self::Ux = 0x11; +impl crate::Resettable for MisclockwordSpec { + const RESET_VALUE: u32 = 0x11; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/pagelock0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/pagelock0.rs index a87c00c..3965a52 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/pagelock0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/pagelock0.rs @@ -1,80 +1,40 @@ #[doc = "Register `PAGELOCK0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PAGELOCK0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOCKBIT` reader - page lock bit"] -pub type LOCKBIT_R = crate::FieldReader; +pub type LockbitR = crate::FieldReader; #[doc = "Field `LOCKBIT` writer - page lock bit"] -pub type LOCKBIT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PAGELOCK0_SPEC, u32, u32, 32, O>; +pub type LockbitW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - page lock bit"] #[inline(always)] - pub fn lockbit(&self) -> LOCKBIT_R { - LOCKBIT_R::new(self.bits) + pub fn lockbit(&self) -> LockbitR { + LockbitR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - page lock bit"] #[inline(always)] #[must_use] - pub fn lockbit(&mut self) -> LOCKBIT_W<0> { - LOCKBIT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockbit(&mut self) -> LockbitW { + LockbitW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pagelock0](index.html) module"] -pub struct PAGELOCK0_SPEC; -impl crate::RegisterSpec for PAGELOCK0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pagelock0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pagelock0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Pagelock0Spec; +impl crate::RegisterSpec for Pagelock0Spec { type Ux = u32; } -#[doc = "`read()` method returns [pagelock0::R](R) reader structure"] -impl crate::Readable for PAGELOCK0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [pagelock0::W](W) writer structure"] -impl crate::Writable for PAGELOCK0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`pagelock0::R`](R) reader structure"] +impl crate::Readable for Pagelock0Spec {} +#[doc = "`write(|w| ..)` method takes [`pagelock0::W`](W) writer structure"] +impl crate::Writable for Pagelock0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PAGELOCK0 to value 0"] -impl crate::Resettable for PAGELOCK0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Pagelock0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/pagelock1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/pagelock1.rs index 0798b64..19280c2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/pagelock1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/pagelock1.rs @@ -1,80 +1,40 @@ #[doc = "Register `PAGELOCK1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PAGELOCK1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOCKBIT` reader - page lock bit"] -pub type LOCKBIT_R = crate::FieldReader; +pub type LockbitR = crate::FieldReader; #[doc = "Field `LOCKBIT` writer - page lock bit"] -pub type LOCKBIT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PAGELOCK1_SPEC, u32, u32, 32, O>; +pub type LockbitW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - page lock bit"] #[inline(always)] - pub fn lockbit(&self) -> LOCKBIT_R { - LOCKBIT_R::new(self.bits) + pub fn lockbit(&self) -> LockbitR { + LockbitR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - page lock bit"] #[inline(always)] #[must_use] - pub fn lockbit(&mut self) -> LOCKBIT_W<0> { - LOCKBIT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockbit(&mut self) -> LockbitW { + LockbitW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pagelock1](index.html) module"] -pub struct PAGELOCK1_SPEC; -impl crate::RegisterSpec for PAGELOCK1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pagelock1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pagelock1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Pagelock1Spec; +impl crate::RegisterSpec for Pagelock1Spec { type Ux = u32; } -#[doc = "`read()` method returns [pagelock1::R](R) reader structure"] -impl crate::Readable for PAGELOCK1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [pagelock1::W](W) writer structure"] -impl crate::Writable for PAGELOCK1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`pagelock1::R`](R) reader structure"] +impl crate::Readable for Pagelock1Spec {} +#[doc = "`write(|w| ..)` method takes [`pagelock1::W`](W) writer structure"] +impl crate::Writable for Pagelock1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PAGELOCK1 to value 0"] -impl crate::Resettable for PAGELOCK1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Pagelock1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/pwrctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/pwrctrl.rs index bb27acc..268f326 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/pwrctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/pwrctrl.rs @@ -1,125 +1,85 @@ #[doc = "Register `PWRCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PWRCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PWROFFONEM1ENTRY` reader - Power down Flash macro when enter EM1"] -pub type PWROFFONEM1ENTRY_R = crate::BitReader; +pub type Pwroffonem1entryR = crate::BitReader; #[doc = "Field `PWROFFONEM1ENTRY` writer - Power down Flash macro when enter EM1"] -pub type PWROFFONEM1ENTRY_W<'a, const O: u8> = crate::BitWriter<'a, u32, PWRCTRL_SPEC, bool, O>; +pub type Pwroffonem1entryW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PWROFFONEM1PENTRY` reader - Power down Flash macro when enter EM1P"] -pub type PWROFFONEM1PENTRY_R = crate::BitReader; +pub type Pwroffonem1pentryR = crate::BitReader; #[doc = "Field `PWROFFONEM1PENTRY` writer - Power down Flash macro when enter EM1P"] -pub type PWROFFONEM1PENTRY_W<'a, const O: u8> = crate::BitWriter<'a, u32, PWRCTRL_SPEC, bool, O>; +pub type Pwroffonem1pentryW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PWROFFENTRYAGAIN` reader - POWER down flash again in EM1/EM1p"] -pub type PWROFFENTRYAGAIN_R = crate::BitReader; +pub type PwroffentryagainR = crate::BitReader; #[doc = "Field `PWROFFENTRYAGAIN` writer - POWER down flash again in EM1/EM1p"] -pub type PWROFFENTRYAGAIN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PWRCTRL_SPEC, bool, O>; +pub type PwroffentryagainW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PWROFFDLY` reader - Power down delay"] -pub type PWROFFDLY_R = crate::FieldReader; +pub type PwroffdlyR = crate::FieldReader; #[doc = "Field `PWROFFDLY` writer - Power down delay"] -pub type PWROFFDLY_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PWRCTRL_SPEC, u8, u8, 8, O>; +pub type PwroffdlyW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bit 0 - Power down Flash macro when enter EM1"] #[inline(always)] - pub fn pwroffonem1entry(&self) -> PWROFFONEM1ENTRY_R { - PWROFFONEM1ENTRY_R::new((self.bits & 1) != 0) + pub fn pwroffonem1entry(&self) -> Pwroffonem1entryR { + Pwroffonem1entryR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Power down Flash macro when enter EM1P"] #[inline(always)] - pub fn pwroffonem1pentry(&self) -> PWROFFONEM1PENTRY_R { - PWROFFONEM1PENTRY_R::new(((self.bits >> 1) & 1) != 0) + pub fn pwroffonem1pentry(&self) -> Pwroffonem1pentryR { + Pwroffonem1pentryR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 4 - POWER down flash again in EM1/EM1p"] #[inline(always)] - pub fn pwroffentryagain(&self) -> PWROFFENTRYAGAIN_R { - PWROFFENTRYAGAIN_R::new(((self.bits >> 4) & 1) != 0) + pub fn pwroffentryagain(&self) -> PwroffentryagainR { + PwroffentryagainR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 16:23 - Power down delay"] #[inline(always)] - pub fn pwroffdly(&self) -> PWROFFDLY_R { - PWROFFDLY_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pwroffdly(&self) -> PwroffdlyR { + PwroffdlyR::new(((self.bits >> 16) & 0xff) as u8) } } impl W { #[doc = "Bit 0 - Power down Flash macro when enter EM1"] #[inline(always)] #[must_use] - pub fn pwroffonem1entry(&mut self) -> PWROFFONEM1ENTRY_W<0> { - PWROFFONEM1ENTRY_W::new(self) + pub fn pwroffonem1entry(&mut self) -> Pwroffonem1entryW { + Pwroffonem1entryW::new(self, 0) } #[doc = "Bit 1 - Power down Flash macro when enter EM1P"] #[inline(always)] #[must_use] - pub fn pwroffonem1pentry(&mut self) -> PWROFFONEM1PENTRY_W<1> { - PWROFFONEM1PENTRY_W::new(self) + pub fn pwroffonem1pentry(&mut self) -> Pwroffonem1pentryW { + Pwroffonem1pentryW::new(self, 1) } #[doc = "Bit 4 - POWER down flash again in EM1/EM1p"] #[inline(always)] #[must_use] - pub fn pwroffentryagain(&mut self) -> PWROFFENTRYAGAIN_W<4> { - PWROFFENTRYAGAIN_W::new(self) + pub fn pwroffentryagain(&mut self) -> PwroffentryagainW { + PwroffentryagainW::new(self, 4) } #[doc = "Bits 16:23 - Power down delay"] #[inline(always)] #[must_use] - pub fn pwroffdly(&mut self) -> PWROFFDLY_W<16> { - PWROFFDLY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pwroffdly(&mut self) -> PwroffdlyW { + PwroffdlyW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pwrctrl](index.html) module"] -pub struct PWRCTRL_SPEC; -impl crate::RegisterSpec for PWRCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`pwrctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwrctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PwrctrlSpec; +impl crate::RegisterSpec for PwrctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [pwrctrl::R](R) reader structure"] -impl crate::Readable for PWRCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [pwrctrl::W](W) writer structure"] -impl crate::Writable for PWRCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`pwrctrl::R`](R) reader structure"] +impl crate::Readable for PwrctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`pwrctrl::W`](W) writer structure"] +impl crate::Writable for PwrctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PWRCTRL to value 0x0010_0002"] -impl crate::Resettable for PWRCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0010_0002; +impl crate::Resettable for PwrctrlSpec { + const RESET_VALUE: u32 = 0x0010_0002; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/rdatactrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/rdatactrl.rs index 3fadc11..c16ed02 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/rdatactrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/rdatactrl.rs @@ -1,95 +1,55 @@ #[doc = "Register `RDATACTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RDATACTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `AFDIS` reader - Automatic Invalidate Disable"] -pub type AFDIS_R = crate::BitReader; +pub type AfdisR = crate::BitReader; #[doc = "Field `AFDIS` writer - Automatic Invalidate Disable"] -pub type AFDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, RDATACTRL_SPEC, bool, O>; +pub type AfdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DOUTBUFEN` reader - Flash dout pipeline buffer enable"] -pub type DOUTBUFEN_R = crate::BitReader; +pub type DoutbufenR = crate::BitReader; #[doc = "Field `DOUTBUFEN` writer - Flash dout pipeline buffer enable"] -pub type DOUTBUFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, RDATACTRL_SPEC, bool, O>; +pub type DoutbufenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 1 - Automatic Invalidate Disable"] #[inline(always)] - pub fn afdis(&self) -> AFDIS_R { - AFDIS_R::new(((self.bits >> 1) & 1) != 0) + pub fn afdis(&self) -> AfdisR { + AfdisR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 12 - Flash dout pipeline buffer enable"] #[inline(always)] - pub fn doutbufen(&self) -> DOUTBUFEN_R { - DOUTBUFEN_R::new(((self.bits >> 12) & 1) != 0) + pub fn doutbufen(&self) -> DoutbufenR { + DoutbufenR::new(((self.bits >> 12) & 1) != 0) } } impl W { #[doc = "Bit 1 - Automatic Invalidate Disable"] #[inline(always)] #[must_use] - pub fn afdis(&mut self) -> AFDIS_W<1> { - AFDIS_W::new(self) + pub fn afdis(&mut self) -> AfdisW { + AfdisW::new(self, 1) } #[doc = "Bit 12 - Flash dout pipeline buffer enable"] #[inline(always)] #[must_use] - pub fn doutbufen(&mut self) -> DOUTBUFEN_W<12> { - DOUTBUFEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn doutbufen(&mut self) -> DoutbufenW { + DoutbufenW::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rdatactrl](index.html) module"] -pub struct RDATACTRL_SPEC; -impl crate::RegisterSpec for RDATACTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rdatactrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rdatactrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RdatactrlSpec; +impl crate::RegisterSpec for RdatactrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [rdatactrl::R](R) reader structure"] -impl crate::Readable for RDATACTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rdatactrl::W](W) writer structure"] -impl crate::Writable for RDATACTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`rdatactrl::R`](R) reader structure"] +impl crate::Readable for RdatactrlSpec {} +#[doc = "`write(|w| ..)` method takes [`rdatactrl::W`](W) writer structure"] +impl crate::Writable for RdatactrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RDATACTRL to value 0x1000"] -impl crate::Resettable for RDATACTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x1000; +impl crate::Resettable for RdatactrlSpec { + const RESET_VALUE: u32 = 0x1000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/readctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/readctrl.rs index 61acce7..e353b80 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/readctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/readctrl.rs @@ -1,154 +1,122 @@ #[doc = "Register `READCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `READCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - Read Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Read Mode\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Zero wait-states inserted in fetch or read transfers"] - WS0 = 0, + Ws0 = 0, #[doc = "1: One wait-state inserted for each fetch or read transfer. See Flash Wait-States table for details"] - WS1 = 1, + Ws1 = 1, #[doc = "2: Two wait-states inserted for eatch fetch or read transfer. See Flash Wait-States table for details"] - WS2 = 2, + Ws2 = 2, #[doc = "3: Three wait-states inserted for eatch fetch or read transfer. See Flash Wait-States table for details"] - WS3 = 3, + Ws3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - Read Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::WS0, - 1 => MODE_A::WS1, - 2 => MODE_A::WS2, - 3 => MODE_A::WS3, + 0 => Mode::Ws0, + 1 => Mode::Ws1, + 2 => Mode::Ws2, + 3 => Mode::Ws3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `WS0`"] + #[doc = "Zero wait-states inserted in fetch or read transfers"] #[inline(always)] pub fn is_ws0(&self) -> bool { - *self == MODE_A::WS0 + *self == Mode::Ws0 } - #[doc = "Checks if the value of the field is `WS1`"] + #[doc = "One wait-state inserted for each fetch or read transfer. See Flash Wait-States table for details"] #[inline(always)] pub fn is_ws1(&self) -> bool { - *self == MODE_A::WS1 + *self == Mode::Ws1 } - #[doc = "Checks if the value of the field is `WS2`"] + #[doc = "Two wait-states inserted for eatch fetch or read transfer. See Flash Wait-States table for details"] #[inline(always)] pub fn is_ws2(&self) -> bool { - *self == MODE_A::WS2 + *self == Mode::Ws2 } - #[doc = "Checks if the value of the field is `WS3`"] + #[doc = "Three wait-states inserted for eatch fetch or read transfer. See Flash Wait-States table for details"] #[inline(always)] pub fn is_ws3(&self) -> bool { - *self == MODE_A::WS3 + *self == Mode::Ws3 } } #[doc = "Field `MODE` writer - Read Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, READCTRL_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Zero wait-states inserted in fetch or read transfers"] #[inline(always)] - pub fn ws0(self) -> &'a mut W { - self.variant(MODE_A::WS0) + pub fn ws0(self) -> &'a mut crate::W { + self.variant(Mode::Ws0) } #[doc = "One wait-state inserted for each fetch or read transfer. See Flash Wait-States table for details"] #[inline(always)] - pub fn ws1(self) -> &'a mut W { - self.variant(MODE_A::WS1) + pub fn ws1(self) -> &'a mut crate::W { + self.variant(Mode::Ws1) } #[doc = "Two wait-states inserted for eatch fetch or read transfer. See Flash Wait-States table for details"] #[inline(always)] - pub fn ws2(self) -> &'a mut W { - self.variant(MODE_A::WS2) + pub fn ws2(self) -> &'a mut crate::W { + self.variant(Mode::Ws2) } #[doc = "Three wait-states inserted for eatch fetch or read transfer. See Flash Wait-States table for details"] #[inline(always)] - pub fn ws3(self) -> &'a mut W { - self.variant(MODE_A::WS3) + pub fn ws3(self) -> &'a mut crate::W { + self.variant(Mode::Ws3) } } impl R { #[doc = "Bits 20:21 - Read Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new(((self.bits >> 20) & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new(((self.bits >> 20) & 3) as u8) } } impl W { #[doc = "Bits 20:21 - Read Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<20> { - MODE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 20) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [readctrl](index.html) module"] -pub struct READCTRL_SPEC; -impl crate::RegisterSpec for READCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`readctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`readctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ReadctrlSpec; +impl crate::RegisterSpec for ReadctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [readctrl::R](R) reader structure"] -impl crate::Readable for READCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [readctrl::W](W) writer structure"] -impl crate::Writable for READCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`readctrl::R`](R) reader structure"] +impl crate::Readable for ReadctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`readctrl::W`](W) writer structure"] +impl crate::Writable for ReadctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets READCTRL to value 0x0020_0000"] -impl crate::Resettable for READCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x0020_0000; +impl crate::Resettable for ReadctrlSpec { + const RESET_VALUE: u32 = 0x0020_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/status.rs index 4b8f911..7e0eef6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/status.rs @@ -1,148 +1,133 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `BUSY` reader - Erase/Write Busy"] -pub type BUSY_R = crate::BitReader; +pub type BusyR = crate::BitReader; #[doc = "Field `LOCKED` reader - Access Locked"] -pub type LOCKED_R = crate::BitReader; +pub type LockedR = crate::BitReader; #[doc = "Field `INVADDR` reader - Invalid Write Address or Erase Page"] -pub type INVADDR_R = crate::BitReader; +pub type InvaddrR = crate::BitReader; #[doc = "Field `WDATAREADY` reader - WDATA Write Ready"] -pub type WDATAREADY_R = crate::BitReader; -#[doc = "Field `ERASEABORTED` reader - The Current Flash Erase Operation Aborte"] -pub type ERASEABORTED_R = crate::BitReader; -#[doc = "Field `PENDING` reader - Write command is in queue"] -pub type PENDING_R = crate::BitReader; -#[doc = "Field `TIMEOUT` reader - Write command timeout flag"] -pub type TIMEOUT_R = crate::BitReader; +pub type WdatareadyR = crate::BitReader; +#[doc = "Field `ERASEABORTED` reader - Erase Operation Aborted"] +pub type EraseabortedR = crate::BitReader; +#[doc = "Field `PENDING` reader - Write Command In Queue"] +pub type PendingR = crate::BitReader; +#[doc = "Field `TIMEOUT` reader - Write Command Timeout"] +pub type TimeoutR = crate::BitReader; #[doc = "Field `RANGEPARTIAL` reader - EraseRange with skipped locked pages"] -pub type RANGEPARTIAL_R = crate::BitReader; -#[doc = "Field `REGLOCK` reader - Register Lock Status"] -pub type REGLOCK_R = crate::BitReader; +pub type RangepartialR = crate::BitReader; #[doc = "Register Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REGLOCK_A { +pub enum Reglock { #[doc = "0: UNLOCKED"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: LOCKED"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REGLOCK_A) -> Self { + fn from(variant: Reglock) -> Self { variant as u8 != 0 } } -impl REGLOCK_R { +#[doc = "Field `REGLOCK` reader - Register Lock Status"] +pub type ReglockR = crate::BitReader; +impl ReglockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REGLOCK_A { + pub const fn variant(&self) -> Reglock { match self.bits { - false => REGLOCK_A::UNLOCKED, - true => REGLOCK_A::LOCKED, + false => Reglock::Unlocked, + true => Reglock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "UNLOCKED"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == REGLOCK_A::UNLOCKED + *self == Reglock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "LOCKED"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == REGLOCK_A::LOCKED + *self == Reglock::Locked } } #[doc = "Field `PWRON` reader - Flash power on status"] -pub type PWRON_R = crate::BitReader; +pub type PwronR = crate::BitReader; #[doc = "Field `WREADY` reader - Flash Write Ready"] -pub type WREADY_R = crate::BitReader; +pub type WreadyR = crate::BitReader; #[doc = "Field `PWRUPCKBDFAILCOUNT` reader - Flash power up checkerboard pattern chec"] -pub type PWRUPCKBDFAILCOUNT_R = crate::FieldReader; +pub type PwrupckbdfailcountR = crate::FieldReader; impl R { #[doc = "Bit 0 - Erase/Write Busy"] #[inline(always)] - pub fn busy(&self) -> BUSY_R { - BUSY_R::new((self.bits & 1) != 0) + pub fn busy(&self) -> BusyR { + BusyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Access Locked"] #[inline(always)] - pub fn locked(&self) -> LOCKED_R { - LOCKED_R::new(((self.bits >> 1) & 1) != 0) + pub fn locked(&self) -> LockedR { + LockedR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Invalid Write Address or Erase Page"] #[inline(always)] - pub fn invaddr(&self) -> INVADDR_R { - INVADDR_R::new(((self.bits >> 2) & 1) != 0) + pub fn invaddr(&self) -> InvaddrR { + InvaddrR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - WDATA Write Ready"] #[inline(always)] - pub fn wdataready(&self) -> WDATAREADY_R { - WDATAREADY_R::new(((self.bits >> 3) & 1) != 0) + pub fn wdataready(&self) -> WdatareadyR { + WdatareadyR::new(((self.bits >> 3) & 1) != 0) } - #[doc = "Bit 4 - The Current Flash Erase Operation Aborte"] + #[doc = "Bit 4 - Erase Operation Aborted"] #[inline(always)] - pub fn eraseaborted(&self) -> ERASEABORTED_R { - ERASEABORTED_R::new(((self.bits >> 4) & 1) != 0) + pub fn eraseaborted(&self) -> EraseabortedR { + EraseabortedR::new(((self.bits >> 4) & 1) != 0) } - #[doc = "Bit 5 - Write command is in queue"] + #[doc = "Bit 5 - Write Command In Queue"] #[inline(always)] - pub fn pending(&self) -> PENDING_R { - PENDING_R::new(((self.bits >> 5) & 1) != 0) + pub fn pending(&self) -> PendingR { + PendingR::new(((self.bits >> 5) & 1) != 0) } - #[doc = "Bit 6 - Write command timeout flag"] + #[doc = "Bit 6 - Write Command Timeout"] #[inline(always)] - pub fn timeout(&self) -> TIMEOUT_R { - TIMEOUT_R::new(((self.bits >> 6) & 1) != 0) + pub fn timeout(&self) -> TimeoutR { + TimeoutR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - EraseRange with skipped locked pages"] #[inline(always)] - pub fn rangepartial(&self) -> RANGEPARTIAL_R { - RANGEPARTIAL_R::new(((self.bits >> 7) & 1) != 0) + pub fn rangepartial(&self) -> RangepartialR { + RangepartialR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 16 - Register Lock Status"] #[inline(always)] - pub fn reglock(&self) -> REGLOCK_R { - REGLOCK_R::new(((self.bits >> 16) & 1) != 0) + pub fn reglock(&self) -> ReglockR { + ReglockR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 24 - Flash power on status"] #[inline(always)] - pub fn pwron(&self) -> PWRON_R { - PWRON_R::new(((self.bits >> 24) & 1) != 0) + pub fn pwron(&self) -> PwronR { + PwronR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 27 - Flash Write Ready"] #[inline(always)] - pub fn wready(&self) -> WREADY_R { - WREADY_R::new(((self.bits >> 27) & 1) != 0) + pub fn wready(&self) -> WreadyR { + WreadyR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bits 28:31 - Flash power up checkerboard pattern chec"] #[inline(always)] - pub fn pwrupckbdfailcount(&self) -> PWRUPCKBDFAILCOUNT_R { - PWRUPCKBDFAILCOUNT_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn pwrupckbdfailcount(&self) -> PwrupckbdfailcountR { + PwrupckbdfailcountR::new(((self.bits >> 28) & 0x0f) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0x0800_0008"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0x0800_0008; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0x0800_0008; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/userdatasize.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/userdatasize.rs index 6759fca..786a59b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/userdatasize.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/userdatasize.rs @@ -1,37 +1,22 @@ #[doc = "Register `USERDATASIZE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `USERDATASIZE` reader - User Data Size"] -pub type USERDATASIZE_R = crate::FieldReader; +pub type UserdatasizeR = crate::FieldReader; impl R { #[doc = "Bits 0:5 - User Data Size"] #[inline(always)] - pub fn userdatasize(&self) -> USERDATASIZE_R { - USERDATASIZE_R::new((self.bits & 0x3f) as u8) + pub fn userdatasize(&self) -> UserdatasizeR { + UserdatasizeR::new((self.bits & 0x3f) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [userdatasize](index.html) module"] -pub struct USERDATASIZE_SPEC; -impl crate::RegisterSpec for USERDATASIZE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`userdatasize::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct UserdatasizeSpec; +impl crate::RegisterSpec for UserdatasizeSpec { type Ux = u32; } -#[doc = "`read()` method returns [userdatasize::R](R) reader structure"] -impl crate::Readable for USERDATASIZE_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`userdatasize::R`](R) reader structure"] +impl crate::Readable for UserdatasizeSpec {} #[doc = "`reset()` method sets USERDATASIZE to value 0x04"] -impl crate::Resettable for USERDATASIZE_SPEC { - const RESET_VALUE: Self::Ux = 0x04; +impl crate::Resettable for UserdatasizeSpec { + const RESET_VALUE: u32 = 0x04; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/wdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/wdata.rs index 6bdf3d7..a1828da 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/wdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/wdata.rs @@ -1,80 +1,40 @@ #[doc = "Register `WDATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `WDATA` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DATAW` reader - Write Data"] -pub type DATAW_R = crate::FieldReader; +pub type DatawR = crate::FieldReader; #[doc = "Field `DATAW` writer - Write Data"] -pub type DATAW_W<'a, const O: u8> = crate::FieldWriter<'a, u32, WDATA_SPEC, u32, u32, 32, O>; +pub type DatawW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Write Data"] #[inline(always)] - pub fn dataw(&self) -> DATAW_R { - DATAW_R::new(self.bits) + pub fn dataw(&self) -> DatawR { + DatawR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Write Data"] #[inline(always)] #[must_use] - pub fn dataw(&mut self) -> DATAW_W<0> { - DATAW_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dataw(&mut self) -> DatawW { + DatawW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdata](index.html) module"] -pub struct WDATA_SPEC; -impl crate::RegisterSpec for WDATA_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`wdata::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdata::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct WdataSpec; +impl crate::RegisterSpec for WdataSpec { type Ux = u32; } -#[doc = "`read()` method returns [wdata::R](R) reader structure"] -impl crate::Readable for WDATA_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [wdata::W](W) writer structure"] -impl crate::Writable for WDATA_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`wdata::R`](R) reader structure"] +impl crate::Readable for WdataSpec {} +#[doc = "`write(|w| ..)` method takes [`wdata::W`](W) writer structure"] +impl crate::Writable for WdataSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WDATA to value 0"] -impl crate::Resettable for WDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for WdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/writecmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/writecmd.rs index 3c049b2..f411730 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/writecmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/writecmd.rs @@ -1,92 +1,67 @@ #[doc = "Register `WRITECMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ERASEPAGE` writer - Erase Page"] -pub type ERASEPAGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, WRITECMD_SPEC, bool, O>; +pub type ErasepageW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WRITEEND` writer - End Write Mode"] -pub type WRITEEND_W<'a, const O: u8> = crate::BitWriter<'a, u32, WRITECMD_SPEC, bool, O>; +pub type WriteendW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ERASERANGE` writer - Erase range of pages"] -pub type ERASERANGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, WRITECMD_SPEC, bool, O>; +pub type EraserangeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ERASEABORT` writer - Abort erase sequence"] -pub type ERASEABORT_W<'a, const O: u8> = crate::BitWriter<'a, u32, WRITECMD_SPEC, bool, O>; +pub type EraseabortW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ERASEMAIN0` writer - Mass erase region 0"] -pub type ERASEMAIN0_W<'a, const O: u8> = crate::BitWriter<'a, u32, WRITECMD_SPEC, bool, O>; +pub type Erasemain0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEARWDATA` writer - Clear WDATA state"] -pub type CLEARWDATA_W<'a, const O: u8> = crate::BitWriter<'a, u32, WRITECMD_SPEC, bool, O>; +pub type ClearwdataW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 1 - Erase Page"] #[inline(always)] #[must_use] - pub fn erasepage(&mut self) -> ERASEPAGE_W<1> { - ERASEPAGE_W::new(self) + pub fn erasepage(&mut self) -> ErasepageW { + ErasepageW::new(self, 1) } #[doc = "Bit 2 - End Write Mode"] #[inline(always)] #[must_use] - pub fn writeend(&mut self) -> WRITEEND_W<2> { - WRITEEND_W::new(self) + pub fn writeend(&mut self) -> WriteendW { + WriteendW::new(self, 2) } #[doc = "Bit 4 - Erase range of pages"] #[inline(always)] #[must_use] - pub fn eraserange(&mut self) -> ERASERANGE_W<4> { - ERASERANGE_W::new(self) + pub fn eraserange(&mut self) -> EraserangeW { + EraserangeW::new(self, 4) } #[doc = "Bit 5 - Abort erase sequence"] #[inline(always)] #[must_use] - pub fn eraseabort(&mut self) -> ERASEABORT_W<5> { - ERASEABORT_W::new(self) + pub fn eraseabort(&mut self) -> EraseabortW { + EraseabortW::new(self, 5) } #[doc = "Bit 8 - Mass erase region 0"] #[inline(always)] #[must_use] - pub fn erasemain0(&mut self) -> ERASEMAIN0_W<8> { - ERASEMAIN0_W::new(self) + pub fn erasemain0(&mut self) -> Erasemain0W { + Erasemain0W::new(self, 8) } #[doc = "Bit 12 - Clear WDATA state"] #[inline(always)] #[must_use] - pub fn clearwdata(&mut self) -> CLEARWDATA_W<12> { - CLEARWDATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clearwdata(&mut self) -> ClearwdataW { + ClearwdataW::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [writecmd](index.html) module"] -pub struct WRITECMD_SPEC; -impl crate::RegisterSpec for WRITECMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`writecmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct WritecmdSpec; +impl crate::RegisterSpec for WritecmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [writecmd::W](W) writer structure"] -impl crate::Writable for WRITECMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`writecmd::W`](W) writer structure"] +impl crate::Writable for WritecmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WRITECMD to value 0"] -impl crate::Resettable for WRITECMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for WritecmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/writectrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/writectrl.rs index 6a2418b..37e7842 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/writectrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/msc_s/writectrl.rs @@ -1,125 +1,85 @@ #[doc = "Register `WRITECTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `WRITECTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `WREN` reader - Enable Write/Erase Controller"] -pub type WREN_R = crate::BitReader; +pub type WrenR = crate::BitReader; #[doc = "Field `WREN` writer - Enable Write/Erase Controller"] -pub type WREN_W<'a, const O: u8> = crate::BitWriter<'a, u32, WRITECTRL_SPEC, bool, O>; +pub type WrenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IRQERASEABORT` reader - Abort Page Erase on Interrupt"] -pub type IRQERASEABORT_R = crate::BitReader; +pub type IrqeraseabortR = crate::BitReader; #[doc = "Field `IRQERASEABORT` writer - Abort Page Erase on Interrupt"] -pub type IRQERASEABORT_W<'a, const O: u8> = crate::BitWriter<'a, u32, WRITECTRL_SPEC, bool, O>; +pub type IrqeraseabortW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LPWRITE` reader - Low-Power Write"] -pub type LPWRITE_R = crate::BitReader; +pub type LpwriteR = crate::BitReader; #[doc = "Field `LPWRITE` writer - Low-Power Write"] -pub type LPWRITE_W<'a, const O: u8> = crate::BitWriter<'a, u32, WRITECTRL_SPEC, bool, O>; +pub type LpwriteW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RANGECOUNT` reader - EraseRange Count"] -pub type RANGECOUNT_R = crate::FieldReader; +pub type RangecountR = crate::FieldReader; #[doc = "Field `RANGECOUNT` writer - EraseRange Count"] -pub type RANGECOUNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, WRITECTRL_SPEC, u8, u8, 8, O>; +pub type RangecountW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bit 0 - Enable Write/Erase Controller"] #[inline(always)] - pub fn wren(&self) -> WREN_R { - WREN_R::new((self.bits & 1) != 0) + pub fn wren(&self) -> WrenR { + WrenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Abort Page Erase on Interrupt"] #[inline(always)] - pub fn irqeraseabort(&self) -> IRQERASEABORT_R { - IRQERASEABORT_R::new(((self.bits >> 1) & 1) != 0) + pub fn irqeraseabort(&self) -> IrqeraseabortR { + IrqeraseabortR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - Low-Power Write"] #[inline(always)] - pub fn lpwrite(&self) -> LPWRITE_R { - LPWRITE_R::new(((self.bits >> 3) & 1) != 0) + pub fn lpwrite(&self) -> LpwriteR { + LpwriteR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 16:23 - EraseRange Count"] #[inline(always)] - pub fn rangecount(&self) -> RANGECOUNT_R { - RANGECOUNT_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn rangecount(&self) -> RangecountR { + RangecountR::new(((self.bits >> 16) & 0xff) as u8) } } impl W { #[doc = "Bit 0 - Enable Write/Erase Controller"] #[inline(always)] #[must_use] - pub fn wren(&mut self) -> WREN_W<0> { - WREN_W::new(self) + pub fn wren(&mut self) -> WrenW { + WrenW::new(self, 0) } #[doc = "Bit 1 - Abort Page Erase on Interrupt"] #[inline(always)] #[must_use] - pub fn irqeraseabort(&mut self) -> IRQERASEABORT_W<1> { - IRQERASEABORT_W::new(self) + pub fn irqeraseabort(&mut self) -> IrqeraseabortW { + IrqeraseabortW::new(self, 1) } #[doc = "Bit 3 - Low-Power Write"] #[inline(always)] #[must_use] - pub fn lpwrite(&mut self) -> LPWRITE_W<3> { - LPWRITE_W::new(self) + pub fn lpwrite(&mut self) -> LpwriteW { + LpwriteW::new(self, 3) } #[doc = "Bits 16:23 - EraseRange Count"] #[inline(always)] #[must_use] - pub fn rangecount(&mut self) -> RANGECOUNT_W<16> { - RANGECOUNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rangecount(&mut self) -> RangecountW { + RangecountW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [writectrl](index.html) module"] -pub struct WRITECTRL_SPEC; -impl crate::RegisterSpec for WRITECTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`writectrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`writectrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct WritectrlSpec; +impl crate::RegisterSpec for WritectrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [writectrl::R](R) reader structure"] -impl crate::Readable for WRITECTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [writectrl::W](W) writer structure"] -impl crate::Writable for WRITECTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`writectrl::R`](R) reader structure"] +impl crate::Readable for WritectrlSpec {} +#[doc = "`write(|w| ..)` method takes [`writectrl::W`](W) writer structure"] +impl crate::Writable for WritectrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WRITECTRL to value 0"] -impl crate::Resettable for WRITECTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for WritectrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns.rs index 9238945..8c54430 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns.rs @@ -1,100 +1,198 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + swrst: Swrst, + cfg: Cfg, + ctrl: Ctrl, + cmd: Cmd, + status: Status, + if_: If, + ien: Ien, + cnt: Cnt, + auxcnt: Auxcnt, + top: Top, + topb: Topb, + ovsctrl: Ovsctrl, + syncbusy: Syncbusy, + lock: Lock, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub swrst: SWRST, + #[inline(always)] + pub const fn swrst(&self) -> &Swrst { + &self.swrst + } #[doc = "0x0c - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x10 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x14 - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x18 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x1c - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x20 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x24 - No Description"] - pub cnt: CNT, + #[inline(always)] + pub const fn cnt(&self) -> &Cnt { + &self.cnt + } #[doc = "0x28 - No Description"] - pub auxcnt: AUXCNT, + #[inline(always)] + pub const fn auxcnt(&self) -> &Auxcnt { + &self.auxcnt + } #[doc = "0x2c - No Description"] - pub top: TOP, + #[inline(always)] + pub const fn top(&self) -> &Top { + &self.top + } #[doc = "0x30 - No Description"] - pub topb: TOPB, + #[inline(always)] + pub const fn topb(&self) -> &Topb { + &self.topb + } #[doc = "0x34 - No Description"] - pub ovsctrl: OVSCTRL, + #[inline(always)] + pub const fn ovsctrl(&self) -> &Ovsctrl { + &self.ovsctrl + } #[doc = "0x38 - No Description"] - pub syncbusy: SYNCBUSY, + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } #[doc = "0x3c - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "SWRST (rw) register accessor: an alias for `Reg`"] -pub type SWRST = crate::Reg; +#[doc = "SWRST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swrst`] +module"] +#[doc(alias = "SWRST")] +pub type Swrst = crate::Reg; #[doc = "No Description"] pub mod swrst; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "CNT (r) register accessor: an alias for `Reg`"] -pub type CNT = crate::Reg; +#[doc = "CNT (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnt`] +module"] +#[doc(alias = "CNT")] +pub type Cnt = crate::Reg; #[doc = "No Description"] pub mod cnt; -#[doc = "AUXCNT (r) register accessor: an alias for `Reg`"] -pub type AUXCNT = crate::Reg; +#[doc = "AUXCNT (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`auxcnt::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@auxcnt`] +module"] +#[doc(alias = "AUXCNT")] +pub type Auxcnt = crate::Reg; #[doc = "No Description"] pub mod auxcnt; -#[doc = "TOP (rw) register accessor: an alias for `Reg`"] -pub type TOP = crate::Reg; +#[doc = "TOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@top`] +module"] +#[doc(alias = "TOP")] +pub type Top = crate::Reg; #[doc = "No Description"] pub mod top; -#[doc = "TOPB (rw) register accessor: an alias for `Reg`"] -pub type TOPB = crate::Reg; +#[doc = "TOPB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@topb`] +module"] +#[doc(alias = "TOPB")] +pub type Topb = crate::Reg; #[doc = "No Description"] pub mod topb; -#[doc = "OVSCTRL (rw) register accessor: an alias for `Reg`"] -pub type OVSCTRL = crate::Reg; +#[doc = "OVSCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ovsctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ovsctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ovsctrl`] +module"] +#[doc(alias = "OVSCTRL")] +pub type Ovsctrl = crate::Reg; #[doc = "No Description"] pub mod ovsctrl; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "No Description"] pub mod syncbusy; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/auxcnt.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/auxcnt.rs index 88f5b1e..0f28fa0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/auxcnt.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/auxcnt.rs @@ -1,37 +1,22 @@ #[doc = "Register `AUXCNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `AUXCNT` reader - Auxiliary Counter Value"] -pub type AUXCNT_R = crate::FieldReader; +pub type AuxcntR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Auxiliary Counter Value"] #[inline(always)] - pub fn auxcnt(&self) -> AUXCNT_R { - AUXCNT_R::new((self.bits & 0xffff) as u16) + pub fn auxcnt(&self) -> AuxcntR { + AuxcntR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [auxcnt](index.html) module"] -pub struct AUXCNT_SPEC; -impl crate::RegisterSpec for AUXCNT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`auxcnt::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AuxcntSpec; +impl crate::RegisterSpec for AuxcntSpec { type Ux = u32; } -#[doc = "`read()` method returns [auxcnt::R](R) reader structure"] -impl crate::Readable for AUXCNT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`auxcnt::R`](R) reader structure"] +impl crate::Readable for AuxcntSpec {} #[doc = "`reset()` method sets AUXCNT to value 0"] -impl crate::Resettable for AUXCNT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for AuxcntSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/cfg.rs index 6f300fb..6122111 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/cfg.rs @@ -1,301 +1,272 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - Mode Select"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Mode Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Single input EM23GRPACLK oversampling mode (available in EM0-EM3)."] - OVSSINGLE = 0, + Ovssingle = 0, #[doc = "1: Externally clocked single input counter mode (available in EM0-EM3)."] - EXTCLKSINGLE = 1, + Extclksingle = 1, #[doc = "2: Externally clocked quadrature decoder mode (available in EM0-EM3)."] - EXTCLKQUAD = 2, + Extclkquad = 2, #[doc = "3: EM23GRPACLK oversampling quadrature decoder 1X mode (available in EM0-EM3)."] - OVSQUAD1X = 3, + Ovsquad1x = 3, #[doc = "4: EM23GRPACLK oversampling quadrature decoder 2X mode (available in EM0-EM3)."] - OVSQUAD2X = 4, + Ovsquad2x = 4, #[doc = "5: EM23GRPACLK oversampling quadrature decoder 4X mode (available in EM0-EM3)."] - OVSQUAD4X = 5, + Ovsquad4x = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - Mode Select"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(MODE_A::OVSSINGLE), - 1 => Some(MODE_A::EXTCLKSINGLE), - 2 => Some(MODE_A::EXTCLKQUAD), - 3 => Some(MODE_A::OVSQUAD1X), - 4 => Some(MODE_A::OVSQUAD2X), - 5 => Some(MODE_A::OVSQUAD4X), + 0 => Some(Mode::Ovssingle), + 1 => Some(Mode::Extclksingle), + 2 => Some(Mode::Extclkquad), + 3 => Some(Mode::Ovsquad1x), + 4 => Some(Mode::Ovsquad2x), + 5 => Some(Mode::Ovsquad4x), _ => None, } } - #[doc = "Checks if the value of the field is `OVSSINGLE`"] + #[doc = "Single input EM23GRPACLK oversampling mode (available in EM0-EM3)."] #[inline(always)] pub fn is_ovssingle(&self) -> bool { - *self == MODE_A::OVSSINGLE + *self == Mode::Ovssingle } - #[doc = "Checks if the value of the field is `EXTCLKSINGLE`"] + #[doc = "Externally clocked single input counter mode (available in EM0-EM3)."] #[inline(always)] pub fn is_extclksingle(&self) -> bool { - *self == MODE_A::EXTCLKSINGLE + *self == Mode::Extclksingle } - #[doc = "Checks if the value of the field is `EXTCLKQUAD`"] + #[doc = "Externally clocked quadrature decoder mode (available in EM0-EM3)."] #[inline(always)] pub fn is_extclkquad(&self) -> bool { - *self == MODE_A::EXTCLKQUAD + *self == Mode::Extclkquad } - #[doc = "Checks if the value of the field is `OVSQUAD1X`"] + #[doc = "EM23GRPACLK oversampling quadrature decoder 1X mode (available in EM0-EM3)."] #[inline(always)] pub fn is_ovsquad1x(&self) -> bool { - *self == MODE_A::OVSQUAD1X + *self == Mode::Ovsquad1x } - #[doc = "Checks if the value of the field is `OVSQUAD2X`"] + #[doc = "EM23GRPACLK oversampling quadrature decoder 2X mode (available in EM0-EM3)."] #[inline(always)] pub fn is_ovsquad2x(&self) -> bool { - *self == MODE_A::OVSQUAD2X + *self == Mode::Ovsquad2x } - #[doc = "Checks if the value of the field is `OVSQUAD4X`"] + #[doc = "EM23GRPACLK oversampling quadrature decoder 4X mode (available in EM0-EM3)."] #[inline(always)] pub fn is_ovsquad4x(&self) -> bool { - *self == MODE_A::OVSQUAD4X + *self == Mode::Ovsquad4x } } #[doc = "Field `MODE` writer - Mode Select"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, MODE_A, 3, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 3, Mode>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Single input EM23GRPACLK oversampling mode (available in EM0-EM3)."] #[inline(always)] - pub fn ovssingle(self) -> &'a mut W { - self.variant(MODE_A::OVSSINGLE) + pub fn ovssingle(self) -> &'a mut crate::W { + self.variant(Mode::Ovssingle) } #[doc = "Externally clocked single input counter mode (available in EM0-EM3)."] #[inline(always)] - pub fn extclksingle(self) -> &'a mut W { - self.variant(MODE_A::EXTCLKSINGLE) + pub fn extclksingle(self) -> &'a mut crate::W { + self.variant(Mode::Extclksingle) } #[doc = "Externally clocked quadrature decoder mode (available in EM0-EM3)."] #[inline(always)] - pub fn extclkquad(self) -> &'a mut W { - self.variant(MODE_A::EXTCLKQUAD) + pub fn extclkquad(self) -> &'a mut crate::W { + self.variant(Mode::Extclkquad) } #[doc = "EM23GRPACLK oversampling quadrature decoder 1X mode (available in EM0-EM3)."] #[inline(always)] - pub fn ovsquad1x(self) -> &'a mut W { - self.variant(MODE_A::OVSQUAD1X) + pub fn ovsquad1x(self) -> &'a mut crate::W { + self.variant(Mode::Ovsquad1x) } #[doc = "EM23GRPACLK oversampling quadrature decoder 2X mode (available in EM0-EM3)."] #[inline(always)] - pub fn ovsquad2x(self) -> &'a mut W { - self.variant(MODE_A::OVSQUAD2X) + pub fn ovsquad2x(self) -> &'a mut crate::W { + self.variant(Mode::Ovsquad2x) } #[doc = "EM23GRPACLK oversampling quadrature decoder 4X mode (available in EM0-EM3)."] #[inline(always)] - pub fn ovsquad4x(self) -> &'a mut W { - self.variant(MODE_A::OVSQUAD4X) + pub fn ovsquad4x(self) -> &'a mut crate::W { + self.variant(Mode::Ovsquad4x) } } -#[doc = "Field `DEBUGHALT` reader - Debug Mode Halt Enable"] -pub type DEBUGHALT_R = crate::BitReader; #[doc = "Debug Mode Halt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DEBUGHALT_A { +pub enum Debughalt { #[doc = "0: PCNT is running in debug mode."] - DISABLE = 0, + Disable = 0, #[doc = "1: PCNT is frozen in debug mode."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DEBUGHALT_A) -> Self { + fn from(variant: Debughalt) -> Self { variant as u8 != 0 } } -impl DEBUGHALT_R { +#[doc = "Field `DEBUGHALT` reader - Debug Mode Halt Enable"] +pub type DebughaltR = crate::BitReader; +impl DebughaltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DEBUGHALT_A { + pub const fn variant(&self) -> Debughalt { match self.bits { - false => DEBUGHALT_A::DISABLE, - true => DEBUGHALT_A::ENABLE, + false => Debughalt::Disable, + true => Debughalt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "PCNT is running in debug mode."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == DEBUGHALT_A::DISABLE + *self == Debughalt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "PCNT is frozen in debug mode."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == DEBUGHALT_A::ENABLE + *self == Debughalt::Enable } } #[doc = "Field `DEBUGHALT` writer - Debug Mode Halt Enable"] -pub type DEBUGHALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DEBUGHALT_A, O>; -impl<'a, const O: u8> DEBUGHALT_W<'a, O> { +pub type DebughaltW<'a, REG> = crate::BitWriter<'a, REG, Debughalt>; +impl<'a, REG> DebughaltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "PCNT is running in debug mode."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(DEBUGHALT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Debughalt::Disable) } #[doc = "PCNT is frozen in debug mode."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(DEBUGHALT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Debughalt::Enable) } } #[doc = "Field `FILTEN` reader - Enable Digital Pulse Width Filter"] -pub type FILTEN_R = crate::BitReader; +pub type FiltenR = crate::BitReader; #[doc = "Field `FILTEN` writer - Enable Digital Pulse Width Filter"] -pub type FILTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type FiltenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HYST` reader - Enable Hysteresis"] -pub type HYST_R = crate::BitReader; +pub type HystR = crate::BitReader; #[doc = "Field `HYST` writer - Enable Hysteresis"] -pub type HYST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type HystW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0PRSEN` reader - S0IN PRS Enable"] -pub type S0PRSEN_R = crate::BitReader; +pub type S0prsenR = crate::BitReader; #[doc = "Field `S0PRSEN` writer - S0IN PRS Enable"] -pub type S0PRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type S0prsenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1PRSEN` reader - S1IN PRS Enable"] -pub type S1PRSEN_R = crate::BitReader; +pub type S1prsenR = crate::BitReader; #[doc = "Field `S1PRSEN` writer - S1IN PRS Enable"] -pub type S1PRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type S1prsenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:2 - Mode Select"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 7) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 7) as u8) } #[doc = "Bit 4 - Debug Mode Halt Enable"] #[inline(always)] - pub fn debughalt(&self) -> DEBUGHALT_R { - DEBUGHALT_R::new(((self.bits >> 4) & 1) != 0) + pub fn debughalt(&self) -> DebughaltR { + DebughaltR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Enable Digital Pulse Width Filter"] #[inline(always)] - pub fn filten(&self) -> FILTEN_R { - FILTEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn filten(&self) -> FiltenR { + FiltenR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Enable Hysteresis"] #[inline(always)] - pub fn hyst(&self) -> HYST_R { - HYST_R::new(((self.bits >> 6) & 1) != 0) + pub fn hyst(&self) -> HystR { + HystR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - S0IN PRS Enable"] #[inline(always)] - pub fn s0prsen(&self) -> S0PRSEN_R { - S0PRSEN_R::new(((self.bits >> 8) & 1) != 0) + pub fn s0prsen(&self) -> S0prsenR { + S0prsenR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - S1IN PRS Enable"] #[inline(always)] - pub fn s1prsen(&self) -> S1PRSEN_R { - S1PRSEN_R::new(((self.bits >> 9) & 1) != 0) + pub fn s1prsen(&self) -> S1prsenR { + S1prsenR::new(((self.bits >> 9) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Mode Select"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Debug Mode Halt Enable"] #[inline(always)] #[must_use] - pub fn debughalt(&mut self) -> DEBUGHALT_W<4> { - DEBUGHALT_W::new(self) + pub fn debughalt(&mut self) -> DebughaltW { + DebughaltW::new(self, 4) } #[doc = "Bit 5 - Enable Digital Pulse Width Filter"] #[inline(always)] #[must_use] - pub fn filten(&mut self) -> FILTEN_W<5> { - FILTEN_W::new(self) + pub fn filten(&mut self) -> FiltenW { + FiltenW::new(self, 5) } #[doc = "Bit 6 - Enable Hysteresis"] #[inline(always)] #[must_use] - pub fn hyst(&mut self) -> HYST_W<6> { - HYST_W::new(self) + pub fn hyst(&mut self) -> HystW { + HystW::new(self, 6) } #[doc = "Bit 8 - S0IN PRS Enable"] #[inline(always)] #[must_use] - pub fn s0prsen(&mut self) -> S0PRSEN_W<8> { - S0PRSEN_W::new(self) + pub fn s0prsen(&mut self) -> S0prsenW { + S0prsenW::new(self, 8) } #[doc = "Bit 9 - S1IN PRS Enable"] #[inline(always)] #[must_use] - pub fn s1prsen(&mut self) -> S1PRSEN_W<9> { - S1PRSEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn s1prsen(&mut self) -> S1prsenW { + S1prsenW::new(self, 9) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/cmd.rs index 848cf9b..024f2c5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/cmd.rs @@ -1,108 +1,83 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CORERST` writer - PCNT Clock Domain Reset"] -pub type CORERST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type CorerstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CNTRST` writer - CNT Reset"] -pub type CNTRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type CntrstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUXCNTRST` writer - AUXCNT Reset"] -pub type AUXCNTRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type AuxcntrstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LCNTIM` writer - Load CNT Immediately"] -pub type LCNTIM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type LcntimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STARTCNT` writer - Start Main Counter"] -pub type STARTCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StartcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STARTAUXCNT` writer - Start Aux Counter"] -pub type STARTAUXCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StartauxcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STOPCNT` writer - Stop Main Counter"] -pub type STOPCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StopcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STOPAUXCNT` writer - Stop Aux Counter"] -pub type STOPAUXCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StopauxcntW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - PCNT Clock Domain Reset"] #[inline(always)] #[must_use] - pub fn corerst(&mut self) -> CORERST_W<0> { - CORERST_W::new(self) + pub fn corerst(&mut self) -> CorerstW { + CorerstW::new(self, 0) } #[doc = "Bit 1 - CNT Reset"] #[inline(always)] #[must_use] - pub fn cntrst(&mut self) -> CNTRST_W<1> { - CNTRST_W::new(self) + pub fn cntrst(&mut self) -> CntrstW { + CntrstW::new(self, 1) } #[doc = "Bit 2 - AUXCNT Reset"] #[inline(always)] #[must_use] - pub fn auxcntrst(&mut self) -> AUXCNTRST_W<2> { - AUXCNTRST_W::new(self) + pub fn auxcntrst(&mut self) -> AuxcntrstW { + AuxcntrstW::new(self, 2) } #[doc = "Bit 4 - Load CNT Immediately"] #[inline(always)] #[must_use] - pub fn lcntim(&mut self) -> LCNTIM_W<4> { - LCNTIM_W::new(self) + pub fn lcntim(&mut self) -> LcntimW { + LcntimW::new(self, 4) } #[doc = "Bit 8 - Start Main Counter"] #[inline(always)] #[must_use] - pub fn startcnt(&mut self) -> STARTCNT_W<8> { - STARTCNT_W::new(self) + pub fn startcnt(&mut self) -> StartcntW { + StartcntW::new(self, 8) } #[doc = "Bit 9 - Start Aux Counter"] #[inline(always)] #[must_use] - pub fn startauxcnt(&mut self) -> STARTAUXCNT_W<9> { - STARTAUXCNT_W::new(self) + pub fn startauxcnt(&mut self) -> StartauxcntW { + StartauxcntW::new(self, 9) } #[doc = "Bit 10 - Stop Main Counter"] #[inline(always)] #[must_use] - pub fn stopcnt(&mut self) -> STOPCNT_W<10> { - STOPCNT_W::new(self) + pub fn stopcnt(&mut self) -> StopcntW { + StopcntW::new(self, 10) } #[doc = "Bit 11 - Stop Aux Counter"] #[inline(always)] #[must_use] - pub fn stopauxcnt(&mut self) -> STOPAUXCNT_W<11> { - STOPAUXCNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stopauxcnt(&mut self) -> StopauxcntW { + StopauxcntW::new(self, 11) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/cnt.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/cnt.rs index 571ec21..9c603c1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/cnt.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/cnt.rs @@ -1,37 +1,22 @@ #[doc = "Register `CNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CNT` reader - Counter Value"] -pub type CNT_R = crate::FieldReader; +pub type CntR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Counter Value"] #[inline(always)] - pub fn cnt(&self) -> CNT_R { - CNT_R::new((self.bits & 0xffff) as u16) + pub fn cnt(&self) -> CntR { + CntR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](index.html) module"] -pub struct CNT_SPEC; -impl crate::RegisterSpec for CNT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CntSpec; +impl crate::RegisterSpec for CntSpec { type Ux = u32; } -#[doc = "`read()` method returns [cnt::R](R) reader structure"] -impl crate::Readable for CNT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cnt::R`](R) reader structure"] +impl crate::Readable for CntSpec {} #[doc = "`reset()` method sets CNT to value 0"] -impl crate::Resettable for CNT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CntSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/ctrl.rs index c845d08..890b070 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/ctrl.rs @@ -1,354 +1,336 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `S1CDIR` reader - Count Direction Determined By S1"] -pub type S1CDIR_R = crate::BitReader; +pub type S1cdirR = crate::BitReader; #[doc = "Field `S1CDIR` writer - Count Direction Determined By S1"] -pub type S1CDIR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; -#[doc = "Field `CNTDIR` reader - Non-Quadrature Mode Counter Direction Co"] -pub type CNTDIR_R = crate::BitReader; +pub type S1cdirW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Non-Quadrature Mode Counter Direction Co\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CNTDIR_A { +pub enum Cntdir { #[doc = "0: Up counter mode."] - UP = 0, + Up = 0, #[doc = "1: Down counter mode."] - DOWN = 1, + Down = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CNTDIR_A) -> Self { + fn from(variant: Cntdir) -> Self { variant as u8 != 0 } } -impl CNTDIR_R { +#[doc = "Field `CNTDIR` reader - Non-Quadrature Mode Counter Direction Co"] +pub type CntdirR = crate::BitReader; +impl CntdirR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CNTDIR_A { + pub const fn variant(&self) -> Cntdir { match self.bits { - false => CNTDIR_A::UP, - true => CNTDIR_A::DOWN, + false => Cntdir::Up, + true => Cntdir::Down, } } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Up counter mode."] #[inline(always)] pub fn is_up(&self) -> bool { - *self == CNTDIR_A::UP + *self == Cntdir::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Down counter mode."] #[inline(always)] pub fn is_down(&self) -> bool { - *self == CNTDIR_A::DOWN + *self == Cntdir::Down } } #[doc = "Field `CNTDIR` writer - Non-Quadrature Mode Counter Direction Co"] -pub type CNTDIR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, CNTDIR_A, O>; -impl<'a, const O: u8> CNTDIR_W<'a, O> { +pub type CntdirW<'a, REG> = crate::BitWriter<'a, REG, Cntdir>; +impl<'a, REG> CntdirW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Up counter mode."] #[inline(always)] - pub fn up(self) -> &'a mut W { - self.variant(CNTDIR_A::UP) + pub fn up(self) -> &'a mut crate::W { + self.variant(Cntdir::Up) } #[doc = "Down counter mode."] #[inline(always)] - pub fn down(self) -> &'a mut W { - self.variant(CNTDIR_A::DOWN) + pub fn down(self) -> &'a mut crate::W { + self.variant(Cntdir::Down) } } -#[doc = "Field `EDGE` reader - Edge Select"] -pub type EDGE_R = crate::BitReader; #[doc = "Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EDGE_A { +pub enum Edge { #[doc = "0: Positive edges on the PCNTn_S0IN inputs are counted in OVSSINGLE mode. Does not invert PCNTn_S1IN input in OVSSINGLE and EXTCLKSINGLE modes"] - POS = 0, + Pos = 0, #[doc = "1: Negative edges on the PCNTn_S0IN inputs are counted in OVSSINGLE mode. Inverts the PCNTn_S1IN input in OVSSINGLE and EXTCLKSINGLE modes"] - NEG = 1, + Neg = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EDGE_A) -> Self { + fn from(variant: Edge) -> Self { variant as u8 != 0 } } -impl EDGE_R { +#[doc = "Field `EDGE` reader - Edge Select"] +pub type EdgeR = crate::BitReader; +impl EdgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EDGE_A { + pub const fn variant(&self) -> Edge { match self.bits { - false => EDGE_A::POS, - true => EDGE_A::NEG, + false => Edge::Pos, + true => Edge::Neg, } } - #[doc = "Checks if the value of the field is `POS`"] + #[doc = "Positive edges on the PCNTn_S0IN inputs are counted in OVSSINGLE mode. Does not invert PCNTn_S1IN input in OVSSINGLE and EXTCLKSINGLE modes"] #[inline(always)] pub fn is_pos(&self) -> bool { - *self == EDGE_A::POS + *self == Edge::Pos } - #[doc = "Checks if the value of the field is `NEG`"] + #[doc = "Negative edges on the PCNTn_S0IN inputs are counted in OVSSINGLE mode. Inverts the PCNTn_S1IN input in OVSSINGLE and EXTCLKSINGLE modes"] #[inline(always)] pub fn is_neg(&self) -> bool { - *self == EDGE_A::NEG + *self == Edge::Neg } } #[doc = "Field `EDGE` writer - Edge Select"] -pub type EDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, EDGE_A, O>; -impl<'a, const O: u8> EDGE_W<'a, O> { +pub type EdgeW<'a, REG> = crate::BitWriter<'a, REG, Edge>; +impl<'a, REG> EdgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Positive edges on the PCNTn_S0IN inputs are counted in OVSSINGLE mode. Does not invert PCNTn_S1IN input in OVSSINGLE and EXTCLKSINGLE modes"] #[inline(always)] - pub fn pos(self) -> &'a mut W { - self.variant(EDGE_A::POS) + pub fn pos(self) -> &'a mut crate::W { + self.variant(Edge::Pos) } #[doc = "Negative edges on the PCNTn_S0IN inputs are counted in OVSSINGLE mode. Inverts the PCNTn_S1IN input in OVSSINGLE and EXTCLKSINGLE modes"] #[inline(always)] - pub fn neg(self) -> &'a mut W { - self.variant(EDGE_A::NEG) + pub fn neg(self) -> &'a mut crate::W { + self.variant(Edge::Neg) } } -#[doc = "Field `CNTEV` reader - Controls When the Counter Counts"] -pub type CNTEV_R = crate::FieldReader; #[doc = "Controls When the Counter Counts\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CNTEV_A { +pub enum Cntev { #[doc = "0: Counts up on up-count and down on down-count events."] - BOTH = 0, + Both = 0, #[doc = "1: Only counts up on up-count events."] - UP = 1, + Up = 1, #[doc = "2: Only counts down on down-count events."] - DOWN = 2, + Down = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CNTEV_A) -> Self { + fn from(variant: Cntev) -> Self { variant as _ } } -impl CNTEV_R { +impl crate::FieldSpec for Cntev { + type Ux = u8; +} +impl crate::IsEnum for Cntev {} +#[doc = "Field `CNTEV` reader - Controls When the Counter Counts"] +pub type CntevR = crate::FieldReader; +impl CntevR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CNTEV_A::BOTH), - 1 => Some(CNTEV_A::UP), - 2 => Some(CNTEV_A::DOWN), + 0 => Some(Cntev::Both), + 1 => Some(Cntev::Up), + 2 => Some(Cntev::Down), _ => None, } } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Counts up on up-count and down on down-count events."] #[inline(always)] pub fn is_both(&self) -> bool { - *self == CNTEV_A::BOTH + *self == Cntev::Both } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Only counts up on up-count events."] #[inline(always)] pub fn is_up(&self) -> bool { - *self == CNTEV_A::UP + *self == Cntev::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Only counts down on down-count events."] #[inline(always)] pub fn is_down(&self) -> bool { - *self == CNTEV_A::DOWN + *self == Cntev::Down } } #[doc = "Field `CNTEV` writer - Controls When the Counter Counts"] -pub type CNTEV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, CNTEV_A, 2, O>; -impl<'a, const O: u8> CNTEV_W<'a, O> { +pub type CntevW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cntev>; +impl<'a, REG> CntevW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Counts up on up-count and down on down-count events."] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(CNTEV_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Cntev::Both) } #[doc = "Only counts up on up-count events."] #[inline(always)] - pub fn up(self) -> &'a mut W { - self.variant(CNTEV_A::UP) + pub fn up(self) -> &'a mut crate::W { + self.variant(Cntev::Up) } #[doc = "Only counts down on down-count events."] #[inline(always)] - pub fn down(self) -> &'a mut W { - self.variant(CNTEV_A::DOWN) + pub fn down(self) -> &'a mut crate::W { + self.variant(Cntev::Down) } } -#[doc = "Field `AUXCNTEV` reader - Controls When the Aux Counter Counts"] -pub type AUXCNTEV_R = crate::FieldReader; #[doc = "Controls When the Aux Counter Counts\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum AUXCNTEV_A { +pub enum Auxcntev { #[doc = "0: Counts up on both up-count and down-count events."] - BOTH = 0, + Both = 0, #[doc = "1: Counts up on up-count events."] - UP = 1, + Up = 1, #[doc = "2: Counts up on down-count events."] - DOWN = 2, + Down = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: AUXCNTEV_A) -> Self { + fn from(variant: Auxcntev) -> Self { variant as _ } } -impl AUXCNTEV_R { +impl crate::FieldSpec for Auxcntev { + type Ux = u8; +} +impl crate::IsEnum for Auxcntev {} +#[doc = "Field `AUXCNTEV` reader - Controls When the Aux Counter Counts"] +pub type AuxcntevR = crate::FieldReader; +impl AuxcntevR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(AUXCNTEV_A::BOTH), - 1 => Some(AUXCNTEV_A::UP), - 2 => Some(AUXCNTEV_A::DOWN), + 0 => Some(Auxcntev::Both), + 1 => Some(Auxcntev::Up), + 2 => Some(Auxcntev::Down), _ => None, } } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Counts up on both up-count and down-count events."] #[inline(always)] pub fn is_both(&self) -> bool { - *self == AUXCNTEV_A::BOTH + *self == Auxcntev::Both } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Counts up on up-count events."] #[inline(always)] pub fn is_up(&self) -> bool { - *self == AUXCNTEV_A::UP + *self == Auxcntev::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Counts up on down-count events."] #[inline(always)] pub fn is_down(&self) -> bool { - *self == AUXCNTEV_A::DOWN + *self == Auxcntev::Down } } #[doc = "Field `AUXCNTEV` writer - Controls When the Aux Counter Counts"] -pub type AUXCNTEV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, AUXCNTEV_A, 2, O>; -impl<'a, const O: u8> AUXCNTEV_W<'a, O> { +pub type AuxcntevW<'a, REG> = crate::FieldWriter<'a, REG, 2, Auxcntev>; +impl<'a, REG> AuxcntevW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Counts up on both up-count and down-count events."] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(AUXCNTEV_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Auxcntev::Both) } #[doc = "Counts up on up-count events."] #[inline(always)] - pub fn up(self) -> &'a mut W { - self.variant(AUXCNTEV_A::UP) + pub fn up(self) -> &'a mut crate::W { + self.variant(Auxcntev::Up) } #[doc = "Counts up on down-count events."] #[inline(always)] - pub fn down(self) -> &'a mut W { - self.variant(AUXCNTEV_A::DOWN) + pub fn down(self) -> &'a mut crate::W { + self.variant(Auxcntev::Down) } } impl R { #[doc = "Bit 0 - Count Direction Determined By S1"] #[inline(always)] - pub fn s1cdir(&self) -> S1CDIR_R { - S1CDIR_R::new((self.bits & 1) != 0) + pub fn s1cdir(&self) -> S1cdirR { + S1cdirR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Non-Quadrature Mode Counter Direction Co"] #[inline(always)] - pub fn cntdir(&self) -> CNTDIR_R { - CNTDIR_R::new(((self.bits >> 1) & 1) != 0) + pub fn cntdir(&self) -> CntdirR { + CntdirR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Edge Select"] #[inline(always)] - pub fn edge(&self) -> EDGE_R { - EDGE_R::new(((self.bits >> 2) & 1) != 0) + pub fn edge(&self) -> EdgeR { + EdgeR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 4:5 - Controls When the Counter Counts"] #[inline(always)] - pub fn cntev(&self) -> CNTEV_R { - CNTEV_R::new(((self.bits >> 4) & 3) as u8) + pub fn cntev(&self) -> CntevR { + CntevR::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Controls When the Aux Counter Counts"] #[inline(always)] - pub fn auxcntev(&self) -> AUXCNTEV_R { - AUXCNTEV_R::new(((self.bits >> 6) & 3) as u8) + pub fn auxcntev(&self) -> AuxcntevR { + AuxcntevR::new(((self.bits >> 6) & 3) as u8) } } impl W { #[doc = "Bit 0 - Count Direction Determined By S1"] #[inline(always)] #[must_use] - pub fn s1cdir(&mut self) -> S1CDIR_W<0> { - S1CDIR_W::new(self) + pub fn s1cdir(&mut self) -> S1cdirW { + S1cdirW::new(self, 0) } #[doc = "Bit 1 - Non-Quadrature Mode Counter Direction Co"] #[inline(always)] #[must_use] - pub fn cntdir(&mut self) -> CNTDIR_W<1> { - CNTDIR_W::new(self) + pub fn cntdir(&mut self) -> CntdirW { + CntdirW::new(self, 1) } #[doc = "Bit 2 - Edge Select"] #[inline(always)] #[must_use] - pub fn edge(&mut self) -> EDGE_W<2> { - EDGE_W::new(self) + pub fn edge(&mut self) -> EdgeW { + EdgeW::new(self, 2) } #[doc = "Bits 4:5 - Controls When the Counter Counts"] #[inline(always)] #[must_use] - pub fn cntev(&mut self) -> CNTEV_W<4> { - CNTEV_W::new(self) + pub fn cntev(&mut self) -> CntevW { + CntevW::new(self, 4) } #[doc = "Bits 6:7 - Controls When the Aux Counter Counts"] #[inline(always)] #[must_use] - pub fn auxcntev(&mut self) -> AUXCNTEV_W<6> { - AUXCNTEV_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn auxcntev(&mut self) -> AuxcntevW { + AuxcntevW::new(self, 6) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/en.rs index d7a48ac..0bac6e1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - PCNT Module Enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - PCNT Module Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - PCNT Module Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - PCNT Module Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/ien.rs index df81d27..2d4eeee 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/ien.rs @@ -1,140 +1,100 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `UF` reader - Underflow Interrupt Read Flag"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Read Flag"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OF` reader - Overflow Interrupt Read Flag"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Read Flag"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DIRCNG` reader - Direction Change Detect Interrupt Flag"] -pub type DIRCNG_R = crate::BitReader; +pub type DircngR = crate::BitReader; #[doc = "Field `DIRCNG` writer - Direction Change Detect Interrupt Flag"] -pub type DIRCNG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type DircngW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUXOF` reader - Auxiliary Overflow Interrupt Read Flag"] -pub type AUXOF_R = crate::BitReader; +pub type AuxofR = crate::BitReader; #[doc = "Field `AUXOF` writer - Auxiliary Overflow Interrupt Read Flag"] -pub type AUXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AuxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OQSTERR` reader - Oversampling Quad State Err Int Flag"] -pub type OQSTERR_R = crate::BitReader; +pub type OqsterrR = crate::BitReader; #[doc = "Field `OQSTERR` writer - Oversampling Quad State Err Int Flag"] -pub type OQSTERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type OqsterrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Underflow Interrupt Read Flag"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new((self.bits & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Overflow Interrupt Read Flag"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new(((self.bits >> 1) & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] - pub fn dircng(&self) -> DIRCNG_R { - DIRCNG_R::new(((self.bits >> 2) & 1) != 0) + pub fn dircng(&self) -> DircngR { + DircngR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Auxiliary Overflow Interrupt Read Flag"] #[inline(always)] - pub fn auxof(&self) -> AUXOF_R { - AUXOF_R::new(((self.bits >> 3) & 1) != 0) + pub fn auxof(&self) -> AuxofR { + AuxofR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Oversampling Quad State Err Int Flag"] #[inline(always)] - pub fn oqsterr(&self) -> OQSTERR_R { - OQSTERR_R::new(((self.bits >> 4) & 1) != 0) + pub fn oqsterr(&self) -> OqsterrR { + OqsterrR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - Underflow Interrupt Read Flag"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<0> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 0) } #[doc = "Bit 1 - Overflow Interrupt Read Flag"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<1> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 1) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] #[must_use] - pub fn dircng(&mut self) -> DIRCNG_W<2> { - DIRCNG_W::new(self) + pub fn dircng(&mut self) -> DircngW { + DircngW::new(self, 2) } #[doc = "Bit 3 - Auxiliary Overflow Interrupt Read Flag"] #[inline(always)] #[must_use] - pub fn auxof(&mut self) -> AUXOF_W<3> { - AUXOF_W::new(self) + pub fn auxof(&mut self) -> AuxofW { + AuxofW::new(self, 3) } #[doc = "Bit 4 - Oversampling Quad State Err Int Flag"] #[inline(always)] #[must_use] - pub fn oqsterr(&mut self) -> OQSTERR_W<4> { - OQSTERR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oqsterr(&mut self) -> OqsterrW { + OqsterrW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/if_.rs index 0cdb35b..015ad1f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/if_.rs @@ -1,140 +1,100 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `UF` reader - Underflow Interrupt Read Flag"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Read Flag"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OF` reader - Overflow Interrupt Read Flag"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Read Flag"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DIRCNG` reader - Direction Change Detect Interrupt Flag"] -pub type DIRCNG_R = crate::BitReader; +pub type DircngR = crate::BitReader; #[doc = "Field `DIRCNG` writer - Direction Change Detect Interrupt Flag"] -pub type DIRCNG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type DircngW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUXOF` reader - Auxiliary Overflow Interrupt Read Flag"] -pub type AUXOF_R = crate::BitReader; +pub type AuxofR = crate::BitReader; #[doc = "Field `AUXOF` writer - Auxiliary Overflow Interrupt Read Flag"] -pub type AUXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AuxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OQSTERR` reader - Oversampling Quad State Err Int Flag"] -pub type OQSTERR_R = crate::BitReader; +pub type OqsterrR = crate::BitReader; #[doc = "Field `OQSTERR` writer - Oversampling Quad State Err Int Flag"] -pub type OQSTERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type OqsterrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Underflow Interrupt Read Flag"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new((self.bits & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Overflow Interrupt Read Flag"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new(((self.bits >> 1) & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] - pub fn dircng(&self) -> DIRCNG_R { - DIRCNG_R::new(((self.bits >> 2) & 1) != 0) + pub fn dircng(&self) -> DircngR { + DircngR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Auxiliary Overflow Interrupt Read Flag"] #[inline(always)] - pub fn auxof(&self) -> AUXOF_R { - AUXOF_R::new(((self.bits >> 3) & 1) != 0) + pub fn auxof(&self) -> AuxofR { + AuxofR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Oversampling Quad State Err Int Flag"] #[inline(always)] - pub fn oqsterr(&self) -> OQSTERR_R { - OQSTERR_R::new(((self.bits >> 4) & 1) != 0) + pub fn oqsterr(&self) -> OqsterrR { + OqsterrR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - Underflow Interrupt Read Flag"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<0> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 0) } #[doc = "Bit 1 - Overflow Interrupt Read Flag"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<1> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 1) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] #[must_use] - pub fn dircng(&mut self) -> DIRCNG_W<2> { - DIRCNG_W::new(self) + pub fn dircng(&mut self) -> DircngW { + DircngW::new(self, 2) } #[doc = "Bit 3 - Auxiliary Overflow Interrupt Read Flag"] #[inline(always)] #[must_use] - pub fn auxof(&mut self) -> AUXOF_W<3> { - AUXOF_W::new(self) + pub fn auxof(&mut self) -> AuxofW { + AuxofW::new(self, 3) } #[doc = "Bit 4 - Oversampling Quad State Err Int Flag"] #[inline(always)] #[must_use] - pub fn oqsterr(&mut self) -> OQSTERR_W<4> { - OQSTERR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oqsterr(&mut self) -> OqsterrW { + OqsterrW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/ipversion.rs index d3ef76d..f36b122 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP VERSION"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP VERSION"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/lock.rs index 020b7e3..6f6d8bf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Configuration Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum PCNTLOCKKEY_AW { +pub enum Pcntlockkey { #[doc = "42976: Write to unock PCNT lockable registers"] - UNLOCK = 42976, + Unlock = 42976, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: PCNTLOCKKEY_AW) -> Self { + fn from(variant: Pcntlockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Pcntlockkey { + type Ux = u16; +} +impl crate::IsEnum for Pcntlockkey {} #[doc = "Field `PCNTLOCKKEY` writer - Configuration Lock Key"] -pub type PCNTLOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, PCNTLOCKKEY_AW, 16, O>; -impl<'a, const O: u8> PCNTLOCKKEY_W<'a, O> { +pub type PcntlockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Pcntlockkey>; +impl<'a, REG> PcntlockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unock PCNT lockable registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(PCNTLOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Pcntlockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Configuration Lock Key"] #[inline(always)] #[must_use] - pub fn pcntlockkey(&mut self) -> PCNTLOCKKEY_W<0> { - PCNTLOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pcntlockkey(&mut self) -> PcntlockkeyW { + PcntlockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/ovsctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/ovsctrl.rs index 8d3176b..fce7a70 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/ovsctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/ovsctrl.rs @@ -1,95 +1,55 @@ #[doc = "Register `OVSCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `OVSCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `FILTLEN` reader - Configure Filter Length for Inputs S0IN"] -pub type FILTLEN_R = crate::FieldReader; +pub type FiltlenR = crate::FieldReader; #[doc = "Field `FILTLEN` writer - Configure Filter Length for Inputs S0IN"] -pub type FILTLEN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, OVSCTRL_SPEC, u8, u8, 8, O>; +pub type FiltlenW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `FLUTTERRM` reader - Flutter Remove"] -pub type FLUTTERRM_R = crate::BitReader; +pub type FlutterrmR = crate::BitReader; #[doc = "Field `FLUTTERRM` writer - Flutter Remove"] -pub type FLUTTERRM_W<'a, const O: u8> = crate::BitWriter<'a, u32, OVSCTRL_SPEC, bool, O>; +pub type FlutterrmW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:7 - Configure Filter Length for Inputs S0IN"] #[inline(always)] - pub fn filtlen(&self) -> FILTLEN_R { - FILTLEN_R::new((self.bits & 0xff) as u8) + pub fn filtlen(&self) -> FiltlenR { + FiltlenR::new((self.bits & 0xff) as u8) } #[doc = "Bit 12 - Flutter Remove"] #[inline(always)] - pub fn flutterrm(&self) -> FLUTTERRM_R { - FLUTTERRM_R::new(((self.bits >> 12) & 1) != 0) + pub fn flutterrm(&self) -> FlutterrmR { + FlutterrmR::new(((self.bits >> 12) & 1) != 0) } } impl W { #[doc = "Bits 0:7 - Configure Filter Length for Inputs S0IN"] #[inline(always)] #[must_use] - pub fn filtlen(&mut self) -> FILTLEN_W<0> { - FILTLEN_W::new(self) + pub fn filtlen(&mut self) -> FiltlenW { + FiltlenW::new(self, 0) } #[doc = "Bit 12 - Flutter Remove"] #[inline(always)] #[must_use] - pub fn flutterrm(&mut self) -> FLUTTERRM_W<12> { - FLUTTERRM_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn flutterrm(&mut self) -> FlutterrmW { + FlutterrmW::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ovsctrl](index.html) module"] -pub struct OVSCTRL_SPEC; -impl crate::RegisterSpec for OVSCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ovsctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ovsctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct OvsctrlSpec; +impl crate::RegisterSpec for OvsctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ovsctrl::R](R) reader structure"] -impl crate::Readable for OVSCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ovsctrl::W](W) writer structure"] -impl crate::Writable for OVSCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ovsctrl::R`](R) reader structure"] +impl crate::Readable for OvsctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ovsctrl::W`](W) writer structure"] +impl crate::Writable for OvsctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OVSCTRL to value 0"] -impl crate::Resettable for OVSCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for OvsctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/status.rs index 4b4f5ec..88025b1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/status.rs @@ -1,133 +1,118 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `DIR` reader - Current Counter Direction"] -pub type DIR_R = crate::BitReader; +pub type R = crate::R; #[doc = "Current Counter Direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DIR_A { +pub enum Dir { #[doc = "0: Up counter mode (clockwise in EXTCLKQUAD mode with the EDGE bit in PCNTn_CTRL set to 0)."] - UP = 0, + Up = 0, #[doc = "1: Down counter mode."] - DOWN = 1, + Down = 1, } -impl From for bool { +impl From

for bool { #[inline(always)] - fn from(variant: DIR_A) -> Self { + fn from(variant: Dir) -> Self { variant as u8 != 0 } } -impl DIR_R { +#[doc = "Field `DIR` reader - Current Counter Direction"] +pub type DirR = crate::BitReader; +impl DirR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DIR_A { + pub const fn variant(&self) -> Dir { match self.bits { - false => DIR_A::UP, - true => DIR_A::DOWN, + false => Dir::Up, + true => Dir::Down, } } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Up counter mode (clockwise in EXTCLKQUAD mode with the EDGE bit in PCNTn_CTRL set to 0)."] #[inline(always)] pub fn is_up(&self) -> bool { - *self == DIR_A::UP + *self == Dir::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Down counter mode."] #[inline(always)] pub fn is_down(&self) -> bool { - *self == DIR_A::DOWN + *self == Dir::Down } } #[doc = "Field `TOPBV` reader - TOP Buffer Valid"] -pub type TOPBV_R = crate::BitReader; -#[doc = "Field `PCNTLOCKSTATUS` reader - Lock Status"] -pub type PCNTLOCKSTATUS_R = crate::BitReader; +pub type TopbvR = crate::BitReader; #[doc = "Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PCNTLOCKSTATUS_A { +pub enum Pcntlockstatus { #[doc = "0: PCNT registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: PCNT registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PCNTLOCKSTATUS_A) -> Self { + fn from(variant: Pcntlockstatus) -> Self { variant as u8 != 0 } } -impl PCNTLOCKSTATUS_R { +#[doc = "Field `PCNTLOCKSTATUS` reader - Lock Status"] +pub type PcntlockstatusR = crate::BitReader; +impl PcntlockstatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PCNTLOCKSTATUS_A { + pub const fn variant(&self) -> Pcntlockstatus { match self.bits { - false => PCNTLOCKSTATUS_A::UNLOCKED, - true => PCNTLOCKSTATUS_A::LOCKED, + false => Pcntlockstatus::Unlocked, + true => Pcntlockstatus::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "PCNT registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == PCNTLOCKSTATUS_A::UNLOCKED + *self == Pcntlockstatus::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "PCNT registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == PCNTLOCKSTATUS_A::LOCKED + *self == Pcntlockstatus::Locked } } #[doc = "Field `CNTRUNNING` reader - Main Counter running status"] -pub type CNTRUNNING_R = crate::BitReader; +pub type CntrunningR = crate::BitReader; #[doc = "Field `AUXCNTRUNNING` reader - Aux Counter running status"] -pub type AUXCNTRUNNING_R = crate::BitReader; +pub type AuxcntrunningR = crate::BitReader; impl R { #[doc = "Bit 0 - Current Counter Direction"] #[inline(always)] - pub fn dir(&self) -> DIR_R { - DIR_R::new((self.bits & 1) != 0) + pub fn dir(&self) -> DirR { + DirR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - TOP Buffer Valid"] #[inline(always)] - pub fn topbv(&self) -> TOPBV_R { - TOPBV_R::new(((self.bits >> 1) & 1) != 0) + pub fn topbv(&self) -> TopbvR { + TopbvR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Lock Status"] #[inline(always)] - pub fn pcntlockstatus(&self) -> PCNTLOCKSTATUS_R { - PCNTLOCKSTATUS_R::new(((self.bits >> 2) & 1) != 0) + pub fn pcntlockstatus(&self) -> PcntlockstatusR { + PcntlockstatusR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Main Counter running status"] #[inline(always)] - pub fn cntrunning(&self) -> CNTRUNNING_R { - CNTRUNNING_R::new(((self.bits >> 3) & 1) != 0) + pub fn cntrunning(&self) -> CntrunningR { + CntrunningR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Aux Counter running status"] #[inline(always)] - pub fn auxcntrunning(&self) -> AUXCNTRUNNING_R { - AUXCNTRUNNING_R::new(((self.bits >> 4) & 1) != 0) + pub fn auxcntrunning(&self) -> AuxcntrunningR { + AuxcntrunningR::new(((self.bits >> 4) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/swrst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/swrst.rs index afd978e..804eaff 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/swrst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/swrst.rs @@ -1,80 +1,40 @@ #[doc = "Register `SWRST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SWRST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SWRST` writer - Software reset command"] -pub type SWRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, SWRST_SPEC, bool, O>; +pub type SwrstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESETTING` reader - Software reset busy status"] -pub type RESETTING_R = crate::BitReader; +pub type ResettingR = crate::BitReader; impl R { #[doc = "Bit 1 - Software reset busy status"] #[inline(always)] - pub fn resetting(&self) -> RESETTING_R { - RESETTING_R::new(((self.bits >> 1) & 1) != 0) + pub fn resetting(&self) -> ResettingR { + ResettingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Software reset command"] #[inline(always)] #[must_use] - pub fn swrst(&mut self) -> SWRST_W<0> { - SWRST_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn swrst(&mut self) -> SwrstW { + SwrstW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swrst](index.html) module"] -pub struct SWRST_SPEC; -impl crate::RegisterSpec for SWRST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SwrstSpec; +impl crate::RegisterSpec for SwrstSpec { type Ux = u32; } -#[doc = "`read()` method returns [swrst::R](R) reader structure"] -impl crate::Readable for SWRST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [swrst::W](W) writer structure"] -impl crate::Writable for SWRST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`swrst::R`](R) reader structure"] +impl crate::Readable for SwrstSpec {} +#[doc = "`write(|w| ..)` method takes [`swrst::W`](W) writer structure"] +impl crate::Writable for SwrstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWRST to value 0"] -impl crate::Resettable for SWRST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SwrstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/syncbusy.rs index f8ecb76..8d0bb32 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/syncbusy.rs @@ -1,65 +1,50 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CTRL` reader - CTRL Register Busy"] -pub type CTRL_R = crate::BitReader; +pub type CtrlR = crate::BitReader; #[doc = "Field `CMD` reader - CMD Register Busy"] -pub type CMD_R = crate::BitReader; +pub type CmdR = crate::BitReader; #[doc = "Field `TOP` reader - TOP Register Busy"] -pub type TOP_R = crate::BitReader; +pub type TopR = crate::BitReader; #[doc = "Field `TOPB` reader - TOPB Register Busy"] -pub type TOPB_R = crate::BitReader; +pub type TopbR = crate::BitReader; #[doc = "Field `OVSCTRL` reader - OVSCTRL Register Busy"] -pub type OVSCTRL_R = crate::BitReader; +pub type OvsctrlR = crate::BitReader; impl R { #[doc = "Bit 0 - CTRL Register Busy"] #[inline(always)] - pub fn ctrl(&self) -> CTRL_R { - CTRL_R::new((self.bits & 1) != 0) + pub fn ctrl(&self) -> CtrlR { + CtrlR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CMD Register Busy"] #[inline(always)] - pub fn cmd(&self) -> CMD_R { - CMD_R::new(((self.bits >> 1) & 1) != 0) + pub fn cmd(&self) -> CmdR { + CmdR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - TOP Register Busy"] #[inline(always)] - pub fn top(&self) -> TOP_R { - TOP_R::new(((self.bits >> 2) & 1) != 0) + pub fn top(&self) -> TopR { + TopR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - TOPB Register Busy"] #[inline(always)] - pub fn topb(&self) -> TOPB_R { - TOPB_R::new(((self.bits >> 3) & 1) != 0) + pub fn topb(&self) -> TopbR { + TopbR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - OVSCTRL Register Busy"] #[inline(always)] - pub fn ovsctrl(&self) -> OVSCTRL_R { - OVSCTRL_R::new(((self.bits >> 4) & 1) != 0) + pub fn ovsctrl(&self) -> OvsctrlR { + OvsctrlR::new(((self.bits >> 4) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/top.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/top.rs index 7ca84aa..aa1131f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/top.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/top.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOP` reader - Counter Top Value"] -pub type TOP_R = crate::FieldReader; +pub type TopR = crate::FieldReader; #[doc = "Field `TOP` writer - Counter Top Value"] -pub type TOP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOP_SPEC, u16, u16, 16, O>; +pub type TopW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Top Value"] #[inline(always)] - pub fn top(&self) -> TOP_R { - TOP_R::new((self.bits & 0xffff) as u16) + pub fn top(&self) -> TopR { + TopR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Top Value"] #[inline(always)] #[must_use] - pub fn top(&mut self) -> TOP_W<0> { - TOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn top(&mut self) -> TopW { + TopW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [top](index.html) module"] -pub struct TOP_SPEC; -impl crate::RegisterSpec for TOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopSpec; +impl crate::RegisterSpec for TopSpec { type Ux = u32; } -#[doc = "`read()` method returns [top::R](R) reader structure"] -impl crate::Readable for TOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [top::W](W) writer structure"] -impl crate::Writable for TOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`top::R`](R) reader structure"] +impl crate::Readable for TopSpec {} +#[doc = "`write(|w| ..)` method takes [`top::W`](W) writer structure"] +impl crate::Writable for TopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOP to value 0xff"] -impl crate::Resettable for TOP_SPEC { - const RESET_VALUE: Self::Ux = 0xff; +impl crate::Resettable for TopSpec { + const RESET_VALUE: u32 = 0xff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/topb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/topb.rs index de1c14e..89225df 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/topb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_ns/topb.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOPB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOPB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOPB` reader - Counter Top Buffer Register"] -pub type TOPB_R = crate::FieldReader; +pub type TopbR = crate::FieldReader; #[doc = "Field `TOPB` writer - Counter Top Buffer Register"] -pub type TOPB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOPB_SPEC, u16, u16, 16, O>; +pub type TopbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Top Buffer Register"] #[inline(always)] - pub fn topb(&self) -> TOPB_R { - TOPB_R::new((self.bits & 0xffff) as u16) + pub fn topb(&self) -> TopbR { + TopbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Top Buffer Register"] #[inline(always)] #[must_use] - pub fn topb(&mut self) -> TOPB_W<0> { - TOPB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn topb(&mut self) -> TopbW { + TopbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [topb](index.html) module"] -pub struct TOPB_SPEC; -impl crate::RegisterSpec for TOPB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopbSpec; +impl crate::RegisterSpec for TopbSpec { type Ux = u32; } -#[doc = "`read()` method returns [topb::R](R) reader structure"] -impl crate::Readable for TOPB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [topb::W](W) writer structure"] -impl crate::Writable for TOPB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`topb::R`](R) reader structure"] +impl crate::Readable for TopbSpec {} +#[doc = "`write(|w| ..)` method takes [`topb::W`](W) writer structure"] +impl crate::Writable for TopbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOPB to value 0xff"] -impl crate::Resettable for TOPB_SPEC { - const RESET_VALUE: Self::Ux = 0xff; +impl crate::Resettable for TopbSpec { + const RESET_VALUE: u32 = 0xff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s.rs index 9238945..8c54430 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s.rs @@ -1,100 +1,198 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + swrst: Swrst, + cfg: Cfg, + ctrl: Ctrl, + cmd: Cmd, + status: Status, + if_: If, + ien: Ien, + cnt: Cnt, + auxcnt: Auxcnt, + top: Top, + topb: Topb, + ovsctrl: Ovsctrl, + syncbusy: Syncbusy, + lock: Lock, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub swrst: SWRST, + #[inline(always)] + pub const fn swrst(&self) -> &Swrst { + &self.swrst + } #[doc = "0x0c - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x10 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x14 - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x18 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x1c - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x20 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x24 - No Description"] - pub cnt: CNT, + #[inline(always)] + pub const fn cnt(&self) -> &Cnt { + &self.cnt + } #[doc = "0x28 - No Description"] - pub auxcnt: AUXCNT, + #[inline(always)] + pub const fn auxcnt(&self) -> &Auxcnt { + &self.auxcnt + } #[doc = "0x2c - No Description"] - pub top: TOP, + #[inline(always)] + pub const fn top(&self) -> &Top { + &self.top + } #[doc = "0x30 - No Description"] - pub topb: TOPB, + #[inline(always)] + pub const fn topb(&self) -> &Topb { + &self.topb + } #[doc = "0x34 - No Description"] - pub ovsctrl: OVSCTRL, + #[inline(always)] + pub const fn ovsctrl(&self) -> &Ovsctrl { + &self.ovsctrl + } #[doc = "0x38 - No Description"] - pub syncbusy: SYNCBUSY, + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } #[doc = "0x3c - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "SWRST (rw) register accessor: an alias for `Reg`"] -pub type SWRST = crate::Reg; +#[doc = "SWRST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swrst`] +module"] +#[doc(alias = "SWRST")] +pub type Swrst = crate::Reg; #[doc = "No Description"] pub mod swrst; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "CNT (r) register accessor: an alias for `Reg`"] -pub type CNT = crate::Reg; +#[doc = "CNT (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnt`] +module"] +#[doc(alias = "CNT")] +pub type Cnt = crate::Reg; #[doc = "No Description"] pub mod cnt; -#[doc = "AUXCNT (r) register accessor: an alias for `Reg`"] -pub type AUXCNT = crate::Reg; +#[doc = "AUXCNT (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`auxcnt::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@auxcnt`] +module"] +#[doc(alias = "AUXCNT")] +pub type Auxcnt = crate::Reg; #[doc = "No Description"] pub mod auxcnt; -#[doc = "TOP (rw) register accessor: an alias for `Reg`"] -pub type TOP = crate::Reg; +#[doc = "TOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@top`] +module"] +#[doc(alias = "TOP")] +pub type Top = crate::Reg; #[doc = "No Description"] pub mod top; -#[doc = "TOPB (rw) register accessor: an alias for `Reg`"] -pub type TOPB = crate::Reg; +#[doc = "TOPB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@topb`] +module"] +#[doc(alias = "TOPB")] +pub type Topb = crate::Reg; #[doc = "No Description"] pub mod topb; -#[doc = "OVSCTRL (rw) register accessor: an alias for `Reg`"] -pub type OVSCTRL = crate::Reg; +#[doc = "OVSCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ovsctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ovsctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ovsctrl`] +module"] +#[doc(alias = "OVSCTRL")] +pub type Ovsctrl = crate::Reg; #[doc = "No Description"] pub mod ovsctrl; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "No Description"] pub mod syncbusy; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/auxcnt.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/auxcnt.rs index 88f5b1e..0f28fa0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/auxcnt.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/auxcnt.rs @@ -1,37 +1,22 @@ #[doc = "Register `AUXCNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `AUXCNT` reader - Auxiliary Counter Value"] -pub type AUXCNT_R = crate::FieldReader; +pub type AuxcntR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Auxiliary Counter Value"] #[inline(always)] - pub fn auxcnt(&self) -> AUXCNT_R { - AUXCNT_R::new((self.bits & 0xffff) as u16) + pub fn auxcnt(&self) -> AuxcntR { + AuxcntR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [auxcnt](index.html) module"] -pub struct AUXCNT_SPEC; -impl crate::RegisterSpec for AUXCNT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`auxcnt::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AuxcntSpec; +impl crate::RegisterSpec for AuxcntSpec { type Ux = u32; } -#[doc = "`read()` method returns [auxcnt::R](R) reader structure"] -impl crate::Readable for AUXCNT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`auxcnt::R`](R) reader structure"] +impl crate::Readable for AuxcntSpec {} #[doc = "`reset()` method sets AUXCNT to value 0"] -impl crate::Resettable for AUXCNT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for AuxcntSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/cfg.rs index 6f300fb..6122111 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/cfg.rs @@ -1,301 +1,272 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - Mode Select"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Mode Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Single input EM23GRPACLK oversampling mode (available in EM0-EM3)."] - OVSSINGLE = 0, + Ovssingle = 0, #[doc = "1: Externally clocked single input counter mode (available in EM0-EM3)."] - EXTCLKSINGLE = 1, + Extclksingle = 1, #[doc = "2: Externally clocked quadrature decoder mode (available in EM0-EM3)."] - EXTCLKQUAD = 2, + Extclkquad = 2, #[doc = "3: EM23GRPACLK oversampling quadrature decoder 1X mode (available in EM0-EM3)."] - OVSQUAD1X = 3, + Ovsquad1x = 3, #[doc = "4: EM23GRPACLK oversampling quadrature decoder 2X mode (available in EM0-EM3)."] - OVSQUAD2X = 4, + Ovsquad2x = 4, #[doc = "5: EM23GRPACLK oversampling quadrature decoder 4X mode (available in EM0-EM3)."] - OVSQUAD4X = 5, + Ovsquad4x = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - Mode Select"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(MODE_A::OVSSINGLE), - 1 => Some(MODE_A::EXTCLKSINGLE), - 2 => Some(MODE_A::EXTCLKQUAD), - 3 => Some(MODE_A::OVSQUAD1X), - 4 => Some(MODE_A::OVSQUAD2X), - 5 => Some(MODE_A::OVSQUAD4X), + 0 => Some(Mode::Ovssingle), + 1 => Some(Mode::Extclksingle), + 2 => Some(Mode::Extclkquad), + 3 => Some(Mode::Ovsquad1x), + 4 => Some(Mode::Ovsquad2x), + 5 => Some(Mode::Ovsquad4x), _ => None, } } - #[doc = "Checks if the value of the field is `OVSSINGLE`"] + #[doc = "Single input EM23GRPACLK oversampling mode (available in EM0-EM3)."] #[inline(always)] pub fn is_ovssingle(&self) -> bool { - *self == MODE_A::OVSSINGLE + *self == Mode::Ovssingle } - #[doc = "Checks if the value of the field is `EXTCLKSINGLE`"] + #[doc = "Externally clocked single input counter mode (available in EM0-EM3)."] #[inline(always)] pub fn is_extclksingle(&self) -> bool { - *self == MODE_A::EXTCLKSINGLE + *self == Mode::Extclksingle } - #[doc = "Checks if the value of the field is `EXTCLKQUAD`"] + #[doc = "Externally clocked quadrature decoder mode (available in EM0-EM3)."] #[inline(always)] pub fn is_extclkquad(&self) -> bool { - *self == MODE_A::EXTCLKQUAD + *self == Mode::Extclkquad } - #[doc = "Checks if the value of the field is `OVSQUAD1X`"] + #[doc = "EM23GRPACLK oversampling quadrature decoder 1X mode (available in EM0-EM3)."] #[inline(always)] pub fn is_ovsquad1x(&self) -> bool { - *self == MODE_A::OVSQUAD1X + *self == Mode::Ovsquad1x } - #[doc = "Checks if the value of the field is `OVSQUAD2X`"] + #[doc = "EM23GRPACLK oversampling quadrature decoder 2X mode (available in EM0-EM3)."] #[inline(always)] pub fn is_ovsquad2x(&self) -> bool { - *self == MODE_A::OVSQUAD2X + *self == Mode::Ovsquad2x } - #[doc = "Checks if the value of the field is `OVSQUAD4X`"] + #[doc = "EM23GRPACLK oversampling quadrature decoder 4X mode (available in EM0-EM3)."] #[inline(always)] pub fn is_ovsquad4x(&self) -> bool { - *self == MODE_A::OVSQUAD4X + *self == Mode::Ovsquad4x } } #[doc = "Field `MODE` writer - Mode Select"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, MODE_A, 3, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 3, Mode>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Single input EM23GRPACLK oversampling mode (available in EM0-EM3)."] #[inline(always)] - pub fn ovssingle(self) -> &'a mut W { - self.variant(MODE_A::OVSSINGLE) + pub fn ovssingle(self) -> &'a mut crate::W { + self.variant(Mode::Ovssingle) } #[doc = "Externally clocked single input counter mode (available in EM0-EM3)."] #[inline(always)] - pub fn extclksingle(self) -> &'a mut W { - self.variant(MODE_A::EXTCLKSINGLE) + pub fn extclksingle(self) -> &'a mut crate::W { + self.variant(Mode::Extclksingle) } #[doc = "Externally clocked quadrature decoder mode (available in EM0-EM3)."] #[inline(always)] - pub fn extclkquad(self) -> &'a mut W { - self.variant(MODE_A::EXTCLKQUAD) + pub fn extclkquad(self) -> &'a mut crate::W { + self.variant(Mode::Extclkquad) } #[doc = "EM23GRPACLK oversampling quadrature decoder 1X mode (available in EM0-EM3)."] #[inline(always)] - pub fn ovsquad1x(self) -> &'a mut W { - self.variant(MODE_A::OVSQUAD1X) + pub fn ovsquad1x(self) -> &'a mut crate::W { + self.variant(Mode::Ovsquad1x) } #[doc = "EM23GRPACLK oversampling quadrature decoder 2X mode (available in EM0-EM3)."] #[inline(always)] - pub fn ovsquad2x(self) -> &'a mut W { - self.variant(MODE_A::OVSQUAD2X) + pub fn ovsquad2x(self) -> &'a mut crate::W { + self.variant(Mode::Ovsquad2x) } #[doc = "EM23GRPACLK oversampling quadrature decoder 4X mode (available in EM0-EM3)."] #[inline(always)] - pub fn ovsquad4x(self) -> &'a mut W { - self.variant(MODE_A::OVSQUAD4X) + pub fn ovsquad4x(self) -> &'a mut crate::W { + self.variant(Mode::Ovsquad4x) } } -#[doc = "Field `DEBUGHALT` reader - Debug Mode Halt Enable"] -pub type DEBUGHALT_R = crate::BitReader; #[doc = "Debug Mode Halt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DEBUGHALT_A { +pub enum Debughalt { #[doc = "0: PCNT is running in debug mode."] - DISABLE = 0, + Disable = 0, #[doc = "1: PCNT is frozen in debug mode."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DEBUGHALT_A) -> Self { + fn from(variant: Debughalt) -> Self { variant as u8 != 0 } } -impl DEBUGHALT_R { +#[doc = "Field `DEBUGHALT` reader - Debug Mode Halt Enable"] +pub type DebughaltR = crate::BitReader; +impl DebughaltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DEBUGHALT_A { + pub const fn variant(&self) -> Debughalt { match self.bits { - false => DEBUGHALT_A::DISABLE, - true => DEBUGHALT_A::ENABLE, + false => Debughalt::Disable, + true => Debughalt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "PCNT is running in debug mode."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == DEBUGHALT_A::DISABLE + *self == Debughalt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "PCNT is frozen in debug mode."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == DEBUGHALT_A::ENABLE + *self == Debughalt::Enable } } #[doc = "Field `DEBUGHALT` writer - Debug Mode Halt Enable"] -pub type DEBUGHALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DEBUGHALT_A, O>; -impl<'a, const O: u8> DEBUGHALT_W<'a, O> { +pub type DebughaltW<'a, REG> = crate::BitWriter<'a, REG, Debughalt>; +impl<'a, REG> DebughaltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "PCNT is running in debug mode."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(DEBUGHALT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Debughalt::Disable) } #[doc = "PCNT is frozen in debug mode."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(DEBUGHALT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Debughalt::Enable) } } #[doc = "Field `FILTEN` reader - Enable Digital Pulse Width Filter"] -pub type FILTEN_R = crate::BitReader; +pub type FiltenR = crate::BitReader; #[doc = "Field `FILTEN` writer - Enable Digital Pulse Width Filter"] -pub type FILTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type FiltenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HYST` reader - Enable Hysteresis"] -pub type HYST_R = crate::BitReader; +pub type HystR = crate::BitReader; #[doc = "Field `HYST` writer - Enable Hysteresis"] -pub type HYST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type HystW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0PRSEN` reader - S0IN PRS Enable"] -pub type S0PRSEN_R = crate::BitReader; +pub type S0prsenR = crate::BitReader; #[doc = "Field `S0PRSEN` writer - S0IN PRS Enable"] -pub type S0PRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type S0prsenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1PRSEN` reader - S1IN PRS Enable"] -pub type S1PRSEN_R = crate::BitReader; +pub type S1prsenR = crate::BitReader; #[doc = "Field `S1PRSEN` writer - S1IN PRS Enable"] -pub type S1PRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type S1prsenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:2 - Mode Select"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 7) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 7) as u8) } #[doc = "Bit 4 - Debug Mode Halt Enable"] #[inline(always)] - pub fn debughalt(&self) -> DEBUGHALT_R { - DEBUGHALT_R::new(((self.bits >> 4) & 1) != 0) + pub fn debughalt(&self) -> DebughaltR { + DebughaltR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Enable Digital Pulse Width Filter"] #[inline(always)] - pub fn filten(&self) -> FILTEN_R { - FILTEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn filten(&self) -> FiltenR { + FiltenR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Enable Hysteresis"] #[inline(always)] - pub fn hyst(&self) -> HYST_R { - HYST_R::new(((self.bits >> 6) & 1) != 0) + pub fn hyst(&self) -> HystR { + HystR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - S0IN PRS Enable"] #[inline(always)] - pub fn s0prsen(&self) -> S0PRSEN_R { - S0PRSEN_R::new(((self.bits >> 8) & 1) != 0) + pub fn s0prsen(&self) -> S0prsenR { + S0prsenR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - S1IN PRS Enable"] #[inline(always)] - pub fn s1prsen(&self) -> S1PRSEN_R { - S1PRSEN_R::new(((self.bits >> 9) & 1) != 0) + pub fn s1prsen(&self) -> S1prsenR { + S1prsenR::new(((self.bits >> 9) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Mode Select"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Debug Mode Halt Enable"] #[inline(always)] #[must_use] - pub fn debughalt(&mut self) -> DEBUGHALT_W<4> { - DEBUGHALT_W::new(self) + pub fn debughalt(&mut self) -> DebughaltW { + DebughaltW::new(self, 4) } #[doc = "Bit 5 - Enable Digital Pulse Width Filter"] #[inline(always)] #[must_use] - pub fn filten(&mut self) -> FILTEN_W<5> { - FILTEN_W::new(self) + pub fn filten(&mut self) -> FiltenW { + FiltenW::new(self, 5) } #[doc = "Bit 6 - Enable Hysteresis"] #[inline(always)] #[must_use] - pub fn hyst(&mut self) -> HYST_W<6> { - HYST_W::new(self) + pub fn hyst(&mut self) -> HystW { + HystW::new(self, 6) } #[doc = "Bit 8 - S0IN PRS Enable"] #[inline(always)] #[must_use] - pub fn s0prsen(&mut self) -> S0PRSEN_W<8> { - S0PRSEN_W::new(self) + pub fn s0prsen(&mut self) -> S0prsenW { + S0prsenW::new(self, 8) } #[doc = "Bit 9 - S1IN PRS Enable"] #[inline(always)] #[must_use] - pub fn s1prsen(&mut self) -> S1PRSEN_W<9> { - S1PRSEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn s1prsen(&mut self) -> S1prsenW { + S1prsenW::new(self, 9) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/cmd.rs index 848cf9b..024f2c5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/cmd.rs @@ -1,108 +1,83 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CORERST` writer - PCNT Clock Domain Reset"] -pub type CORERST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type CorerstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CNTRST` writer - CNT Reset"] -pub type CNTRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type CntrstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUXCNTRST` writer - AUXCNT Reset"] -pub type AUXCNTRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type AuxcntrstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LCNTIM` writer - Load CNT Immediately"] -pub type LCNTIM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type LcntimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STARTCNT` writer - Start Main Counter"] -pub type STARTCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StartcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STARTAUXCNT` writer - Start Aux Counter"] -pub type STARTAUXCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StartauxcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STOPCNT` writer - Stop Main Counter"] -pub type STOPCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StopcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STOPAUXCNT` writer - Stop Aux Counter"] -pub type STOPAUXCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StopauxcntW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - PCNT Clock Domain Reset"] #[inline(always)] #[must_use] - pub fn corerst(&mut self) -> CORERST_W<0> { - CORERST_W::new(self) + pub fn corerst(&mut self) -> CorerstW { + CorerstW::new(self, 0) } #[doc = "Bit 1 - CNT Reset"] #[inline(always)] #[must_use] - pub fn cntrst(&mut self) -> CNTRST_W<1> { - CNTRST_W::new(self) + pub fn cntrst(&mut self) -> CntrstW { + CntrstW::new(self, 1) } #[doc = "Bit 2 - AUXCNT Reset"] #[inline(always)] #[must_use] - pub fn auxcntrst(&mut self) -> AUXCNTRST_W<2> { - AUXCNTRST_W::new(self) + pub fn auxcntrst(&mut self) -> AuxcntrstW { + AuxcntrstW::new(self, 2) } #[doc = "Bit 4 - Load CNT Immediately"] #[inline(always)] #[must_use] - pub fn lcntim(&mut self) -> LCNTIM_W<4> { - LCNTIM_W::new(self) + pub fn lcntim(&mut self) -> LcntimW { + LcntimW::new(self, 4) } #[doc = "Bit 8 - Start Main Counter"] #[inline(always)] #[must_use] - pub fn startcnt(&mut self) -> STARTCNT_W<8> { - STARTCNT_W::new(self) + pub fn startcnt(&mut self) -> StartcntW { + StartcntW::new(self, 8) } #[doc = "Bit 9 - Start Aux Counter"] #[inline(always)] #[must_use] - pub fn startauxcnt(&mut self) -> STARTAUXCNT_W<9> { - STARTAUXCNT_W::new(self) + pub fn startauxcnt(&mut self) -> StartauxcntW { + StartauxcntW::new(self, 9) } #[doc = "Bit 10 - Stop Main Counter"] #[inline(always)] #[must_use] - pub fn stopcnt(&mut self) -> STOPCNT_W<10> { - STOPCNT_W::new(self) + pub fn stopcnt(&mut self) -> StopcntW { + StopcntW::new(self, 10) } #[doc = "Bit 11 - Stop Aux Counter"] #[inline(always)] #[must_use] - pub fn stopauxcnt(&mut self) -> STOPAUXCNT_W<11> { - STOPAUXCNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stopauxcnt(&mut self) -> StopauxcntW { + StopauxcntW::new(self, 11) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/cnt.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/cnt.rs index 571ec21..9c603c1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/cnt.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/cnt.rs @@ -1,37 +1,22 @@ #[doc = "Register `CNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CNT` reader - Counter Value"] -pub type CNT_R = crate::FieldReader; +pub type CntR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Counter Value"] #[inline(always)] - pub fn cnt(&self) -> CNT_R { - CNT_R::new((self.bits & 0xffff) as u16) + pub fn cnt(&self) -> CntR { + CntR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](index.html) module"] -pub struct CNT_SPEC; -impl crate::RegisterSpec for CNT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CntSpec; +impl crate::RegisterSpec for CntSpec { type Ux = u32; } -#[doc = "`read()` method returns [cnt::R](R) reader structure"] -impl crate::Readable for CNT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cnt::R`](R) reader structure"] +impl crate::Readable for CntSpec {} #[doc = "`reset()` method sets CNT to value 0"] -impl crate::Resettable for CNT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CntSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/ctrl.rs index c845d08..890b070 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/ctrl.rs @@ -1,354 +1,336 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `S1CDIR` reader - Count Direction Determined By S1"] -pub type S1CDIR_R = crate::BitReader; +pub type S1cdirR = crate::BitReader; #[doc = "Field `S1CDIR` writer - Count Direction Determined By S1"] -pub type S1CDIR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; -#[doc = "Field `CNTDIR` reader - Non-Quadrature Mode Counter Direction Co"] -pub type CNTDIR_R = crate::BitReader; +pub type S1cdirW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Non-Quadrature Mode Counter Direction Co\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CNTDIR_A { +pub enum Cntdir { #[doc = "0: Up counter mode."] - UP = 0, + Up = 0, #[doc = "1: Down counter mode."] - DOWN = 1, + Down = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CNTDIR_A) -> Self { + fn from(variant: Cntdir) -> Self { variant as u8 != 0 } } -impl CNTDIR_R { +#[doc = "Field `CNTDIR` reader - Non-Quadrature Mode Counter Direction Co"] +pub type CntdirR = crate::BitReader; +impl CntdirR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CNTDIR_A { + pub const fn variant(&self) -> Cntdir { match self.bits { - false => CNTDIR_A::UP, - true => CNTDIR_A::DOWN, + false => Cntdir::Up, + true => Cntdir::Down, } } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Up counter mode."] #[inline(always)] pub fn is_up(&self) -> bool { - *self == CNTDIR_A::UP + *self == Cntdir::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Down counter mode."] #[inline(always)] pub fn is_down(&self) -> bool { - *self == CNTDIR_A::DOWN + *self == Cntdir::Down } } #[doc = "Field `CNTDIR` writer - Non-Quadrature Mode Counter Direction Co"] -pub type CNTDIR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, CNTDIR_A, O>; -impl<'a, const O: u8> CNTDIR_W<'a, O> { +pub type CntdirW<'a, REG> = crate::BitWriter<'a, REG, Cntdir>; +impl<'a, REG> CntdirW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Up counter mode."] #[inline(always)] - pub fn up(self) -> &'a mut W { - self.variant(CNTDIR_A::UP) + pub fn up(self) -> &'a mut crate::W { + self.variant(Cntdir::Up) } #[doc = "Down counter mode."] #[inline(always)] - pub fn down(self) -> &'a mut W { - self.variant(CNTDIR_A::DOWN) + pub fn down(self) -> &'a mut crate::W { + self.variant(Cntdir::Down) } } -#[doc = "Field `EDGE` reader - Edge Select"] -pub type EDGE_R = crate::BitReader; #[doc = "Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EDGE_A { +pub enum Edge { #[doc = "0: Positive edges on the PCNTn_S0IN inputs are counted in OVSSINGLE mode. Does not invert PCNTn_S1IN input in OVSSINGLE and EXTCLKSINGLE modes"] - POS = 0, + Pos = 0, #[doc = "1: Negative edges on the PCNTn_S0IN inputs are counted in OVSSINGLE mode. Inverts the PCNTn_S1IN input in OVSSINGLE and EXTCLKSINGLE modes"] - NEG = 1, + Neg = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EDGE_A) -> Self { + fn from(variant: Edge) -> Self { variant as u8 != 0 } } -impl EDGE_R { +#[doc = "Field `EDGE` reader - Edge Select"] +pub type EdgeR = crate::BitReader; +impl EdgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EDGE_A { + pub const fn variant(&self) -> Edge { match self.bits { - false => EDGE_A::POS, - true => EDGE_A::NEG, + false => Edge::Pos, + true => Edge::Neg, } } - #[doc = "Checks if the value of the field is `POS`"] + #[doc = "Positive edges on the PCNTn_S0IN inputs are counted in OVSSINGLE mode. Does not invert PCNTn_S1IN input in OVSSINGLE and EXTCLKSINGLE modes"] #[inline(always)] pub fn is_pos(&self) -> bool { - *self == EDGE_A::POS + *self == Edge::Pos } - #[doc = "Checks if the value of the field is `NEG`"] + #[doc = "Negative edges on the PCNTn_S0IN inputs are counted in OVSSINGLE mode. Inverts the PCNTn_S1IN input in OVSSINGLE and EXTCLKSINGLE modes"] #[inline(always)] pub fn is_neg(&self) -> bool { - *self == EDGE_A::NEG + *self == Edge::Neg } } #[doc = "Field `EDGE` writer - Edge Select"] -pub type EDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, EDGE_A, O>; -impl<'a, const O: u8> EDGE_W<'a, O> { +pub type EdgeW<'a, REG> = crate::BitWriter<'a, REG, Edge>; +impl<'a, REG> EdgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Positive edges on the PCNTn_S0IN inputs are counted in OVSSINGLE mode. Does not invert PCNTn_S1IN input in OVSSINGLE and EXTCLKSINGLE modes"] #[inline(always)] - pub fn pos(self) -> &'a mut W { - self.variant(EDGE_A::POS) + pub fn pos(self) -> &'a mut crate::W { + self.variant(Edge::Pos) } #[doc = "Negative edges on the PCNTn_S0IN inputs are counted in OVSSINGLE mode. Inverts the PCNTn_S1IN input in OVSSINGLE and EXTCLKSINGLE modes"] #[inline(always)] - pub fn neg(self) -> &'a mut W { - self.variant(EDGE_A::NEG) + pub fn neg(self) -> &'a mut crate::W { + self.variant(Edge::Neg) } } -#[doc = "Field `CNTEV` reader - Controls When the Counter Counts"] -pub type CNTEV_R = crate::FieldReader; #[doc = "Controls When the Counter Counts\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CNTEV_A { +pub enum Cntev { #[doc = "0: Counts up on up-count and down on down-count events."] - BOTH = 0, + Both = 0, #[doc = "1: Only counts up on up-count events."] - UP = 1, + Up = 1, #[doc = "2: Only counts down on down-count events."] - DOWN = 2, + Down = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CNTEV_A) -> Self { + fn from(variant: Cntev) -> Self { variant as _ } } -impl CNTEV_R { +impl crate::FieldSpec for Cntev { + type Ux = u8; +} +impl crate::IsEnum for Cntev {} +#[doc = "Field `CNTEV` reader - Controls When the Counter Counts"] +pub type CntevR = crate::FieldReader; +impl CntevR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CNTEV_A::BOTH), - 1 => Some(CNTEV_A::UP), - 2 => Some(CNTEV_A::DOWN), + 0 => Some(Cntev::Both), + 1 => Some(Cntev::Up), + 2 => Some(Cntev::Down), _ => None, } } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Counts up on up-count and down on down-count events."] #[inline(always)] pub fn is_both(&self) -> bool { - *self == CNTEV_A::BOTH + *self == Cntev::Both } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Only counts up on up-count events."] #[inline(always)] pub fn is_up(&self) -> bool { - *self == CNTEV_A::UP + *self == Cntev::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Only counts down on down-count events."] #[inline(always)] pub fn is_down(&self) -> bool { - *self == CNTEV_A::DOWN + *self == Cntev::Down } } #[doc = "Field `CNTEV` writer - Controls When the Counter Counts"] -pub type CNTEV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, CNTEV_A, 2, O>; -impl<'a, const O: u8> CNTEV_W<'a, O> { +pub type CntevW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cntev>; +impl<'a, REG> CntevW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Counts up on up-count and down on down-count events."] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(CNTEV_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Cntev::Both) } #[doc = "Only counts up on up-count events."] #[inline(always)] - pub fn up(self) -> &'a mut W { - self.variant(CNTEV_A::UP) + pub fn up(self) -> &'a mut crate::W { + self.variant(Cntev::Up) } #[doc = "Only counts down on down-count events."] #[inline(always)] - pub fn down(self) -> &'a mut W { - self.variant(CNTEV_A::DOWN) + pub fn down(self) -> &'a mut crate::W { + self.variant(Cntev::Down) } } -#[doc = "Field `AUXCNTEV` reader - Controls When the Aux Counter Counts"] -pub type AUXCNTEV_R = crate::FieldReader; #[doc = "Controls When the Aux Counter Counts\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum AUXCNTEV_A { +pub enum Auxcntev { #[doc = "0: Counts up on both up-count and down-count events."] - BOTH = 0, + Both = 0, #[doc = "1: Counts up on up-count events."] - UP = 1, + Up = 1, #[doc = "2: Counts up on down-count events."] - DOWN = 2, + Down = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: AUXCNTEV_A) -> Self { + fn from(variant: Auxcntev) -> Self { variant as _ } } -impl AUXCNTEV_R { +impl crate::FieldSpec for Auxcntev { + type Ux = u8; +} +impl crate::IsEnum for Auxcntev {} +#[doc = "Field `AUXCNTEV` reader - Controls When the Aux Counter Counts"] +pub type AuxcntevR = crate::FieldReader; +impl AuxcntevR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(AUXCNTEV_A::BOTH), - 1 => Some(AUXCNTEV_A::UP), - 2 => Some(AUXCNTEV_A::DOWN), + 0 => Some(Auxcntev::Both), + 1 => Some(Auxcntev::Up), + 2 => Some(Auxcntev::Down), _ => None, } } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Counts up on both up-count and down-count events."] #[inline(always)] pub fn is_both(&self) -> bool { - *self == AUXCNTEV_A::BOTH + *self == Auxcntev::Both } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Counts up on up-count events."] #[inline(always)] pub fn is_up(&self) -> bool { - *self == AUXCNTEV_A::UP + *self == Auxcntev::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Counts up on down-count events."] #[inline(always)] pub fn is_down(&self) -> bool { - *self == AUXCNTEV_A::DOWN + *self == Auxcntev::Down } } #[doc = "Field `AUXCNTEV` writer - Controls When the Aux Counter Counts"] -pub type AUXCNTEV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, AUXCNTEV_A, 2, O>; -impl<'a, const O: u8> AUXCNTEV_W<'a, O> { +pub type AuxcntevW<'a, REG> = crate::FieldWriter<'a, REG, 2, Auxcntev>; +impl<'a, REG> AuxcntevW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Counts up on both up-count and down-count events."] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(AUXCNTEV_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Auxcntev::Both) } #[doc = "Counts up on up-count events."] #[inline(always)] - pub fn up(self) -> &'a mut W { - self.variant(AUXCNTEV_A::UP) + pub fn up(self) -> &'a mut crate::W { + self.variant(Auxcntev::Up) } #[doc = "Counts up on down-count events."] #[inline(always)] - pub fn down(self) -> &'a mut W { - self.variant(AUXCNTEV_A::DOWN) + pub fn down(self) -> &'a mut crate::W { + self.variant(Auxcntev::Down) } } impl R { #[doc = "Bit 0 - Count Direction Determined By S1"] #[inline(always)] - pub fn s1cdir(&self) -> S1CDIR_R { - S1CDIR_R::new((self.bits & 1) != 0) + pub fn s1cdir(&self) -> S1cdirR { + S1cdirR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Non-Quadrature Mode Counter Direction Co"] #[inline(always)] - pub fn cntdir(&self) -> CNTDIR_R { - CNTDIR_R::new(((self.bits >> 1) & 1) != 0) + pub fn cntdir(&self) -> CntdirR { + CntdirR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Edge Select"] #[inline(always)] - pub fn edge(&self) -> EDGE_R { - EDGE_R::new(((self.bits >> 2) & 1) != 0) + pub fn edge(&self) -> EdgeR { + EdgeR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 4:5 - Controls When the Counter Counts"] #[inline(always)] - pub fn cntev(&self) -> CNTEV_R { - CNTEV_R::new(((self.bits >> 4) & 3) as u8) + pub fn cntev(&self) -> CntevR { + CntevR::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Controls When the Aux Counter Counts"] #[inline(always)] - pub fn auxcntev(&self) -> AUXCNTEV_R { - AUXCNTEV_R::new(((self.bits >> 6) & 3) as u8) + pub fn auxcntev(&self) -> AuxcntevR { + AuxcntevR::new(((self.bits >> 6) & 3) as u8) } } impl W { #[doc = "Bit 0 - Count Direction Determined By S1"] #[inline(always)] #[must_use] - pub fn s1cdir(&mut self) -> S1CDIR_W<0> { - S1CDIR_W::new(self) + pub fn s1cdir(&mut self) -> S1cdirW { + S1cdirW::new(self, 0) } #[doc = "Bit 1 - Non-Quadrature Mode Counter Direction Co"] #[inline(always)] #[must_use] - pub fn cntdir(&mut self) -> CNTDIR_W<1> { - CNTDIR_W::new(self) + pub fn cntdir(&mut self) -> CntdirW { + CntdirW::new(self, 1) } #[doc = "Bit 2 - Edge Select"] #[inline(always)] #[must_use] - pub fn edge(&mut self) -> EDGE_W<2> { - EDGE_W::new(self) + pub fn edge(&mut self) -> EdgeW { + EdgeW::new(self, 2) } #[doc = "Bits 4:5 - Controls When the Counter Counts"] #[inline(always)] #[must_use] - pub fn cntev(&mut self) -> CNTEV_W<4> { - CNTEV_W::new(self) + pub fn cntev(&mut self) -> CntevW { + CntevW::new(self, 4) } #[doc = "Bits 6:7 - Controls When the Aux Counter Counts"] #[inline(always)] #[must_use] - pub fn auxcntev(&mut self) -> AUXCNTEV_W<6> { - AUXCNTEV_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn auxcntev(&mut self) -> AuxcntevW { + AuxcntevW::new(self, 6) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/en.rs index d7a48ac..0bac6e1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - PCNT Module Enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - PCNT Module Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - PCNT Module Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - PCNT Module Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/ien.rs index df81d27..2d4eeee 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/ien.rs @@ -1,140 +1,100 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `UF` reader - Underflow Interrupt Read Flag"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Read Flag"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OF` reader - Overflow Interrupt Read Flag"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Read Flag"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DIRCNG` reader - Direction Change Detect Interrupt Flag"] -pub type DIRCNG_R = crate::BitReader; +pub type DircngR = crate::BitReader; #[doc = "Field `DIRCNG` writer - Direction Change Detect Interrupt Flag"] -pub type DIRCNG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type DircngW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUXOF` reader - Auxiliary Overflow Interrupt Read Flag"] -pub type AUXOF_R = crate::BitReader; +pub type AuxofR = crate::BitReader; #[doc = "Field `AUXOF` writer - Auxiliary Overflow Interrupt Read Flag"] -pub type AUXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AuxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OQSTERR` reader - Oversampling Quad State Err Int Flag"] -pub type OQSTERR_R = crate::BitReader; +pub type OqsterrR = crate::BitReader; #[doc = "Field `OQSTERR` writer - Oversampling Quad State Err Int Flag"] -pub type OQSTERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type OqsterrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Underflow Interrupt Read Flag"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new((self.bits & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Overflow Interrupt Read Flag"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new(((self.bits >> 1) & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] - pub fn dircng(&self) -> DIRCNG_R { - DIRCNG_R::new(((self.bits >> 2) & 1) != 0) + pub fn dircng(&self) -> DircngR { + DircngR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Auxiliary Overflow Interrupt Read Flag"] #[inline(always)] - pub fn auxof(&self) -> AUXOF_R { - AUXOF_R::new(((self.bits >> 3) & 1) != 0) + pub fn auxof(&self) -> AuxofR { + AuxofR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Oversampling Quad State Err Int Flag"] #[inline(always)] - pub fn oqsterr(&self) -> OQSTERR_R { - OQSTERR_R::new(((self.bits >> 4) & 1) != 0) + pub fn oqsterr(&self) -> OqsterrR { + OqsterrR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - Underflow Interrupt Read Flag"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<0> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 0) } #[doc = "Bit 1 - Overflow Interrupt Read Flag"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<1> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 1) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] #[must_use] - pub fn dircng(&mut self) -> DIRCNG_W<2> { - DIRCNG_W::new(self) + pub fn dircng(&mut self) -> DircngW { + DircngW::new(self, 2) } #[doc = "Bit 3 - Auxiliary Overflow Interrupt Read Flag"] #[inline(always)] #[must_use] - pub fn auxof(&mut self) -> AUXOF_W<3> { - AUXOF_W::new(self) + pub fn auxof(&mut self) -> AuxofW { + AuxofW::new(self, 3) } #[doc = "Bit 4 - Oversampling Quad State Err Int Flag"] #[inline(always)] #[must_use] - pub fn oqsterr(&mut self) -> OQSTERR_W<4> { - OQSTERR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oqsterr(&mut self) -> OqsterrW { + OqsterrW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/if_.rs index 0cdb35b..015ad1f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/if_.rs @@ -1,140 +1,100 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `UF` reader - Underflow Interrupt Read Flag"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Read Flag"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OF` reader - Overflow Interrupt Read Flag"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Read Flag"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DIRCNG` reader - Direction Change Detect Interrupt Flag"] -pub type DIRCNG_R = crate::BitReader; +pub type DircngR = crate::BitReader; #[doc = "Field `DIRCNG` writer - Direction Change Detect Interrupt Flag"] -pub type DIRCNG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type DircngW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUXOF` reader - Auxiliary Overflow Interrupt Read Flag"] -pub type AUXOF_R = crate::BitReader; +pub type AuxofR = crate::BitReader; #[doc = "Field `AUXOF` writer - Auxiliary Overflow Interrupt Read Flag"] -pub type AUXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AuxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OQSTERR` reader - Oversampling Quad State Err Int Flag"] -pub type OQSTERR_R = crate::BitReader; +pub type OqsterrR = crate::BitReader; #[doc = "Field `OQSTERR` writer - Oversampling Quad State Err Int Flag"] -pub type OQSTERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type OqsterrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Underflow Interrupt Read Flag"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new((self.bits & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Overflow Interrupt Read Flag"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new(((self.bits >> 1) & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] - pub fn dircng(&self) -> DIRCNG_R { - DIRCNG_R::new(((self.bits >> 2) & 1) != 0) + pub fn dircng(&self) -> DircngR { + DircngR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Auxiliary Overflow Interrupt Read Flag"] #[inline(always)] - pub fn auxof(&self) -> AUXOF_R { - AUXOF_R::new(((self.bits >> 3) & 1) != 0) + pub fn auxof(&self) -> AuxofR { + AuxofR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Oversampling Quad State Err Int Flag"] #[inline(always)] - pub fn oqsterr(&self) -> OQSTERR_R { - OQSTERR_R::new(((self.bits >> 4) & 1) != 0) + pub fn oqsterr(&self) -> OqsterrR { + OqsterrR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - Underflow Interrupt Read Flag"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<0> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 0) } #[doc = "Bit 1 - Overflow Interrupt Read Flag"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<1> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 1) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] #[must_use] - pub fn dircng(&mut self) -> DIRCNG_W<2> { - DIRCNG_W::new(self) + pub fn dircng(&mut self) -> DircngW { + DircngW::new(self, 2) } #[doc = "Bit 3 - Auxiliary Overflow Interrupt Read Flag"] #[inline(always)] #[must_use] - pub fn auxof(&mut self) -> AUXOF_W<3> { - AUXOF_W::new(self) + pub fn auxof(&mut self) -> AuxofW { + AuxofW::new(self, 3) } #[doc = "Bit 4 - Oversampling Quad State Err Int Flag"] #[inline(always)] #[must_use] - pub fn oqsterr(&mut self) -> OQSTERR_W<4> { - OQSTERR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oqsterr(&mut self) -> OqsterrW { + OqsterrW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/ipversion.rs index d3ef76d..f36b122 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP VERSION"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP VERSION"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/lock.rs index 020b7e3..6f6d8bf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Configuration Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum PCNTLOCKKEY_AW { +pub enum Pcntlockkey { #[doc = "42976: Write to unock PCNT lockable registers"] - UNLOCK = 42976, + Unlock = 42976, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: PCNTLOCKKEY_AW) -> Self { + fn from(variant: Pcntlockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Pcntlockkey { + type Ux = u16; +} +impl crate::IsEnum for Pcntlockkey {} #[doc = "Field `PCNTLOCKKEY` writer - Configuration Lock Key"] -pub type PCNTLOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, PCNTLOCKKEY_AW, 16, O>; -impl<'a, const O: u8> PCNTLOCKKEY_W<'a, O> { +pub type PcntlockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Pcntlockkey>; +impl<'a, REG> PcntlockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unock PCNT lockable registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(PCNTLOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Pcntlockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Configuration Lock Key"] #[inline(always)] #[must_use] - pub fn pcntlockkey(&mut self) -> PCNTLOCKKEY_W<0> { - PCNTLOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pcntlockkey(&mut self) -> PcntlockkeyW { + PcntlockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/ovsctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/ovsctrl.rs index 8d3176b..fce7a70 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/ovsctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/ovsctrl.rs @@ -1,95 +1,55 @@ #[doc = "Register `OVSCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `OVSCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `FILTLEN` reader - Configure Filter Length for Inputs S0IN"] -pub type FILTLEN_R = crate::FieldReader; +pub type FiltlenR = crate::FieldReader; #[doc = "Field `FILTLEN` writer - Configure Filter Length for Inputs S0IN"] -pub type FILTLEN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, OVSCTRL_SPEC, u8, u8, 8, O>; +pub type FiltlenW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `FLUTTERRM` reader - Flutter Remove"] -pub type FLUTTERRM_R = crate::BitReader; +pub type FlutterrmR = crate::BitReader; #[doc = "Field `FLUTTERRM` writer - Flutter Remove"] -pub type FLUTTERRM_W<'a, const O: u8> = crate::BitWriter<'a, u32, OVSCTRL_SPEC, bool, O>; +pub type FlutterrmW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:7 - Configure Filter Length for Inputs S0IN"] #[inline(always)] - pub fn filtlen(&self) -> FILTLEN_R { - FILTLEN_R::new((self.bits & 0xff) as u8) + pub fn filtlen(&self) -> FiltlenR { + FiltlenR::new((self.bits & 0xff) as u8) } #[doc = "Bit 12 - Flutter Remove"] #[inline(always)] - pub fn flutterrm(&self) -> FLUTTERRM_R { - FLUTTERRM_R::new(((self.bits >> 12) & 1) != 0) + pub fn flutterrm(&self) -> FlutterrmR { + FlutterrmR::new(((self.bits >> 12) & 1) != 0) } } impl W { #[doc = "Bits 0:7 - Configure Filter Length for Inputs S0IN"] #[inline(always)] #[must_use] - pub fn filtlen(&mut self) -> FILTLEN_W<0> { - FILTLEN_W::new(self) + pub fn filtlen(&mut self) -> FiltlenW { + FiltlenW::new(self, 0) } #[doc = "Bit 12 - Flutter Remove"] #[inline(always)] #[must_use] - pub fn flutterrm(&mut self) -> FLUTTERRM_W<12> { - FLUTTERRM_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn flutterrm(&mut self) -> FlutterrmW { + FlutterrmW::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ovsctrl](index.html) module"] -pub struct OVSCTRL_SPEC; -impl crate::RegisterSpec for OVSCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ovsctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ovsctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct OvsctrlSpec; +impl crate::RegisterSpec for OvsctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ovsctrl::R](R) reader structure"] -impl crate::Readable for OVSCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ovsctrl::W](W) writer structure"] -impl crate::Writable for OVSCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ovsctrl::R`](R) reader structure"] +impl crate::Readable for OvsctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ovsctrl::W`](W) writer structure"] +impl crate::Writable for OvsctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OVSCTRL to value 0"] -impl crate::Resettable for OVSCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for OvsctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/status.rs index 4b4f5ec..88025b1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/status.rs @@ -1,133 +1,118 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `DIR` reader - Current Counter Direction"] -pub type DIR_R = crate::BitReader; +pub type R = crate::R; #[doc = "Current Counter Direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DIR_A { +pub enum Dir { #[doc = "0: Up counter mode (clockwise in EXTCLKQUAD mode with the EDGE bit in PCNTn_CTRL set to 0)."] - UP = 0, + Up = 0, #[doc = "1: Down counter mode."] - DOWN = 1, + Down = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DIR_A) -> Self { + fn from(variant: Dir) -> Self { variant as u8 != 0 } } -impl DIR_R { +#[doc = "Field `DIR` reader - Current Counter Direction"] +pub type DirR = crate::BitReader; +impl DirR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DIR_A { + pub const fn variant(&self) -> Dir { match self.bits { - false => DIR_A::UP, - true => DIR_A::DOWN, + false => Dir::Up, + true => Dir::Down, } } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Up counter mode (clockwise in EXTCLKQUAD mode with the EDGE bit in PCNTn_CTRL set to 0)."] #[inline(always)] pub fn is_up(&self) -> bool { - *self == DIR_A::UP + *self == Dir::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Down counter mode."] #[inline(always)] pub fn is_down(&self) -> bool { - *self == DIR_A::DOWN + *self == Dir::Down } } #[doc = "Field `TOPBV` reader - TOP Buffer Valid"] -pub type TOPBV_R = crate::BitReader; -#[doc = "Field `PCNTLOCKSTATUS` reader - Lock Status"] -pub type PCNTLOCKSTATUS_R = crate::BitReader; +pub type TopbvR = crate::BitReader; #[doc = "Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PCNTLOCKSTATUS_A { +pub enum Pcntlockstatus { #[doc = "0: PCNT registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: PCNT registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PCNTLOCKSTATUS_A) -> Self { + fn from(variant: Pcntlockstatus) -> Self { variant as u8 != 0 } } -impl PCNTLOCKSTATUS_R { +#[doc = "Field `PCNTLOCKSTATUS` reader - Lock Status"] +pub type PcntlockstatusR = crate::BitReader; +impl PcntlockstatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PCNTLOCKSTATUS_A { + pub const fn variant(&self) -> Pcntlockstatus { match self.bits { - false => PCNTLOCKSTATUS_A::UNLOCKED, - true => PCNTLOCKSTATUS_A::LOCKED, + false => Pcntlockstatus::Unlocked, + true => Pcntlockstatus::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "PCNT registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == PCNTLOCKSTATUS_A::UNLOCKED + *self == Pcntlockstatus::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "PCNT registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == PCNTLOCKSTATUS_A::LOCKED + *self == Pcntlockstatus::Locked } } #[doc = "Field `CNTRUNNING` reader - Main Counter running status"] -pub type CNTRUNNING_R = crate::BitReader; +pub type CntrunningR = crate::BitReader; #[doc = "Field `AUXCNTRUNNING` reader - Aux Counter running status"] -pub type AUXCNTRUNNING_R = crate::BitReader; +pub type AuxcntrunningR = crate::BitReader; impl R { #[doc = "Bit 0 - Current Counter Direction"] #[inline(always)] - pub fn dir(&self) -> DIR_R { - DIR_R::new((self.bits & 1) != 0) + pub fn dir(&self) -> DirR { + DirR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - TOP Buffer Valid"] #[inline(always)] - pub fn topbv(&self) -> TOPBV_R { - TOPBV_R::new(((self.bits >> 1) & 1) != 0) + pub fn topbv(&self) -> TopbvR { + TopbvR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Lock Status"] #[inline(always)] - pub fn pcntlockstatus(&self) -> PCNTLOCKSTATUS_R { - PCNTLOCKSTATUS_R::new(((self.bits >> 2) & 1) != 0) + pub fn pcntlockstatus(&self) -> PcntlockstatusR { + PcntlockstatusR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Main Counter running status"] #[inline(always)] - pub fn cntrunning(&self) -> CNTRUNNING_R { - CNTRUNNING_R::new(((self.bits >> 3) & 1) != 0) + pub fn cntrunning(&self) -> CntrunningR { + CntrunningR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Aux Counter running status"] #[inline(always)] - pub fn auxcntrunning(&self) -> AUXCNTRUNNING_R { - AUXCNTRUNNING_R::new(((self.bits >> 4) & 1) != 0) + pub fn auxcntrunning(&self) -> AuxcntrunningR { + AuxcntrunningR::new(((self.bits >> 4) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/swrst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/swrst.rs index afd978e..804eaff 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/swrst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/swrst.rs @@ -1,80 +1,40 @@ #[doc = "Register `SWRST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SWRST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SWRST` writer - Software reset command"] -pub type SWRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, SWRST_SPEC, bool, O>; +pub type SwrstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESETTING` reader - Software reset busy status"] -pub type RESETTING_R = crate::BitReader; +pub type ResettingR = crate::BitReader; impl R { #[doc = "Bit 1 - Software reset busy status"] #[inline(always)] - pub fn resetting(&self) -> RESETTING_R { - RESETTING_R::new(((self.bits >> 1) & 1) != 0) + pub fn resetting(&self) -> ResettingR { + ResettingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Software reset command"] #[inline(always)] #[must_use] - pub fn swrst(&mut self) -> SWRST_W<0> { - SWRST_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn swrst(&mut self) -> SwrstW { + SwrstW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swrst](index.html) module"] -pub struct SWRST_SPEC; -impl crate::RegisterSpec for SWRST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SwrstSpec; +impl crate::RegisterSpec for SwrstSpec { type Ux = u32; } -#[doc = "`read()` method returns [swrst::R](R) reader structure"] -impl crate::Readable for SWRST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [swrst::W](W) writer structure"] -impl crate::Writable for SWRST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`swrst::R`](R) reader structure"] +impl crate::Readable for SwrstSpec {} +#[doc = "`write(|w| ..)` method takes [`swrst::W`](W) writer structure"] +impl crate::Writable for SwrstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWRST to value 0"] -impl crate::Resettable for SWRST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SwrstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/syncbusy.rs index f8ecb76..8d0bb32 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/syncbusy.rs @@ -1,65 +1,50 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CTRL` reader - CTRL Register Busy"] -pub type CTRL_R = crate::BitReader; +pub type CtrlR = crate::BitReader; #[doc = "Field `CMD` reader - CMD Register Busy"] -pub type CMD_R = crate::BitReader; +pub type CmdR = crate::BitReader; #[doc = "Field `TOP` reader - TOP Register Busy"] -pub type TOP_R = crate::BitReader; +pub type TopR = crate::BitReader; #[doc = "Field `TOPB` reader - TOPB Register Busy"] -pub type TOPB_R = crate::BitReader; +pub type TopbR = crate::BitReader; #[doc = "Field `OVSCTRL` reader - OVSCTRL Register Busy"] -pub type OVSCTRL_R = crate::BitReader; +pub type OvsctrlR = crate::BitReader; impl R { #[doc = "Bit 0 - CTRL Register Busy"] #[inline(always)] - pub fn ctrl(&self) -> CTRL_R { - CTRL_R::new((self.bits & 1) != 0) + pub fn ctrl(&self) -> CtrlR { + CtrlR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CMD Register Busy"] #[inline(always)] - pub fn cmd(&self) -> CMD_R { - CMD_R::new(((self.bits >> 1) & 1) != 0) + pub fn cmd(&self) -> CmdR { + CmdR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - TOP Register Busy"] #[inline(always)] - pub fn top(&self) -> TOP_R { - TOP_R::new(((self.bits >> 2) & 1) != 0) + pub fn top(&self) -> TopR { + TopR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - TOPB Register Busy"] #[inline(always)] - pub fn topb(&self) -> TOPB_R { - TOPB_R::new(((self.bits >> 3) & 1) != 0) + pub fn topb(&self) -> TopbR { + TopbR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - OVSCTRL Register Busy"] #[inline(always)] - pub fn ovsctrl(&self) -> OVSCTRL_R { - OVSCTRL_R::new(((self.bits >> 4) & 1) != 0) + pub fn ovsctrl(&self) -> OvsctrlR { + OvsctrlR::new(((self.bits >> 4) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/top.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/top.rs index 7ca84aa..aa1131f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/top.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/top.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOP` reader - Counter Top Value"] -pub type TOP_R = crate::FieldReader; +pub type TopR = crate::FieldReader; #[doc = "Field `TOP` writer - Counter Top Value"] -pub type TOP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOP_SPEC, u16, u16, 16, O>; +pub type TopW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Top Value"] #[inline(always)] - pub fn top(&self) -> TOP_R { - TOP_R::new((self.bits & 0xffff) as u16) + pub fn top(&self) -> TopR { + TopR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Top Value"] #[inline(always)] #[must_use] - pub fn top(&mut self) -> TOP_W<0> { - TOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn top(&mut self) -> TopW { + TopW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [top](index.html) module"] -pub struct TOP_SPEC; -impl crate::RegisterSpec for TOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopSpec; +impl crate::RegisterSpec for TopSpec { type Ux = u32; } -#[doc = "`read()` method returns [top::R](R) reader structure"] -impl crate::Readable for TOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [top::W](W) writer structure"] -impl crate::Writable for TOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`top::R`](R) reader structure"] +impl crate::Readable for TopSpec {} +#[doc = "`write(|w| ..)` method takes [`top::W`](W) writer structure"] +impl crate::Writable for TopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOP to value 0xff"] -impl crate::Resettable for TOP_SPEC { - const RESET_VALUE: Self::Ux = 0xff; +impl crate::Resettable for TopSpec { + const RESET_VALUE: u32 = 0xff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/topb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/topb.rs index de1c14e..89225df 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/topb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/pcnt0_s/topb.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOPB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOPB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOPB` reader - Counter Top Buffer Register"] -pub type TOPB_R = crate::FieldReader; +pub type TopbR = crate::FieldReader; #[doc = "Field `TOPB` writer - Counter Top Buffer Register"] -pub type TOPB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOPB_SPEC, u16, u16, 16, O>; +pub type TopbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Top Buffer Register"] #[inline(always)] - pub fn topb(&self) -> TOPB_R { - TOPB_R::new((self.bits & 0xffff) as u16) + pub fn topb(&self) -> TopbR { + TopbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Top Buffer Register"] #[inline(always)] #[must_use] - pub fn topb(&mut self) -> TOPB_W<0> { - TOPB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn topb(&mut self) -> TopbW { + TopbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [topb](index.html) module"] -pub struct TOPB_SPEC; -impl crate::RegisterSpec for TOPB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopbSpec; +impl crate::RegisterSpec for TopbSpec { type Ux = u32; } -#[doc = "`read()` method returns [topb::R](R) reader structure"] -impl crate::Readable for TOPB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [topb::W](W) writer structure"] -impl crate::Writable for TOPB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`topb::R`](R) reader structure"] +impl crate::Readable for TopbSpec {} +#[doc = "`write(|w| ..)` method takes [`topb::W`](W) writer structure"] +impl crate::Writable for TopbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOPB to value 0xff"] -impl crate::Resettable for TOPB_SPEC { - const RESET_VALUE: Self::Ux = 0xff; +impl crate::Resettable for TopbSpec { + const RESET_VALUE: u32 = 0xff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns.rs index ed2b15c..cbd0d82 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns.rs @@ -1,631 +1,1227 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + ipversion: Ipversion, _reserved1: [u8; 0x04], + async_swpulse: AsyncSwpulse, + async_swlevel: AsyncSwlevel, + async_peek: AsyncPeek, + sync_peek: SyncPeek, + async_ch0_ctrl: AsyncCh0Ctrl, + async_ch1_ctrl: AsyncCh1Ctrl, + async_ch2_ctrl: AsyncCh2Ctrl, + async_ch3_ctrl: AsyncCh3Ctrl, + async_ch4_ctrl: AsyncCh4Ctrl, + async_ch5_ctrl: AsyncCh5Ctrl, + async_ch6_ctrl: AsyncCh6Ctrl, + async_ch7_ctrl: AsyncCh7Ctrl, + async_ch8_ctrl: AsyncCh8Ctrl, + async_ch9_ctrl: AsyncCh9Ctrl, + async_ch10_ctrl: AsyncCh10Ctrl, + async_ch11_ctrl: AsyncCh11Ctrl, + sync_ch0_ctrl: SyncCh0Ctrl, + sync_ch1_ctrl: SyncCh1Ctrl, + sync_ch2_ctrl: SyncCh2Ctrl, + sync_ch3_ctrl: SyncCh3Ctrl, + consumer_cmu_caldn: ConsumerCmuCaldn, + consumer_cmu_calup: ConsumerCmuCalup, + consumer_eusart0_clk: ConsumerEusart0Clk, + consumer_eusart0_rx: ConsumerEusart0Rx, + consumer_eusart0_trigger: ConsumerEusart0Trigger, + consumer_eusart1_clk: ConsumerEusart1Clk, + consumer_eusart1_rx: ConsumerEusart1Rx, + consumer_eusart1_trigger: ConsumerEusart1Trigger, + consumer_eusart2_clk: ConsumerEusart2Clk, + consumer_eusart2_rx: ConsumerEusart2Rx, + consumer_eusart2_trigger: ConsumerEusart2Trigger, + _reserved32: [u8; 0x04], + consumer_iadc0_scantrigger: ConsumerIadc0Scantrigger, + consumer_iadc0_singletrigger: ConsumerIadc0Singletrigger, + consumer_ldmaxbar_dmareq0: ConsumerLdmaxbarDmareq0, + consumer_ldmaxbar_dmareq1: ConsumerLdmaxbarDmareq1, + _reserved36: [u8; 0x10], + consumer_lesense_start: ConsumerLesenseStart, + consumer_letimer0_clear: ConsumerLetimer0Clear, + consumer_letimer0_start: ConsumerLetimer0Start, + consumer_letimer0_stop: ConsumerLetimer0Stop, + _reserved40: [u8; 0x04], + consumer_pcnt0_s0in: ConsumerPcnt0S0in, + consumer_pcnt0_s1in: ConsumerPcnt0S1in, + _reserved42: [u8; 0x50], + consumer_setamper_tampersrc25: ConsumerSetamperTampersrc25, + consumer_setamper_tampersrc26: ConsumerSetamperTampersrc26, + consumer_setamper_tampersrc27: ConsumerSetamperTampersrc27, + consumer_setamper_tampersrc28: ConsumerSetamperTampersrc28, + consumer_setamper_tampersrc29: ConsumerSetamperTampersrc29, + consumer_setamper_tampersrc30: ConsumerSetamperTampersrc30, + consumer_setamper_tampersrc31: ConsumerSetamperTampersrc31, + consumer_sysrtc0_in0: ConsumerSysrtc0In0, + consumer_sysrtc0_in1: ConsumerSysrtc0In1, + consumer_hfxo0_oscreq: ConsumerHfxo0Oscreq, + consumer_hfxo0_timeout: ConsumerHfxo0Timeout, + consumer_core_ctiin0: ConsumerCoreCtiin0, + consumer_core_ctiin1: ConsumerCoreCtiin1, + consumer_core_ctiin2: ConsumerCoreCtiin2, + consumer_core_ctiin3: ConsumerCoreCtiin3, + consumer_core_m33rxev: ConsumerCoreM33rxev, + consumer_timer0_cc0: ConsumerTimer0Cc0, + consumer_timer0_cc1: ConsumerTimer0Cc1, + consumer_timer0_cc2: ConsumerTimer0Cc2, + consumer_timer0_dti: ConsumerTimer0Dti, + consumer_timer0_dtifs1: ConsumerTimer0Dtifs1, + consumer_timer0_dtifs2: ConsumerTimer0Dtifs2, + consumer_timer1_cc0: ConsumerTimer1Cc0, + consumer_timer1_cc1: ConsumerTimer1Cc1, + consumer_timer1_cc2: ConsumerTimer1Cc2, + consumer_timer1_dti: ConsumerTimer1Dti, + consumer_timer1_dtifs1: ConsumerTimer1Dtifs1, + consumer_timer1_dtifs2: ConsumerTimer1Dtifs2, + consumer_timer2_cc0: ConsumerTimer2Cc0, + consumer_timer2_cc1: ConsumerTimer2Cc1, + consumer_timer2_cc2: ConsumerTimer2Cc2, + consumer_timer2_dti: ConsumerTimer2Dti, + consumer_timer2_dtifs1: ConsumerTimer2Dtifs1, + consumer_timer2_dtifs2: ConsumerTimer2Dtifs2, + consumer_timer3_cc0: ConsumerTimer3Cc0, + consumer_timer3_cc1: ConsumerTimer3Cc1, + consumer_timer3_cc2: ConsumerTimer3Cc2, + consumer_timer3_dti: ConsumerTimer3Dti, + consumer_timer3_dtifs1: ConsumerTimer3Dtifs1, + consumer_timer3_dtifs2: ConsumerTimer3Dtifs2, + consumer_timer4_cc0: ConsumerTimer4Cc0, + consumer_timer4_cc1: ConsumerTimer4Cc1, + consumer_timer4_cc2: ConsumerTimer4Cc2, + consumer_timer4_dti: ConsumerTimer4Dti, + consumer_timer4_dtifs1: ConsumerTimer4Dtifs1, + consumer_timer4_dtifs2: ConsumerTimer4Dtifs2, + consumer_usart0_clk: ConsumerUsart0Clk, + consumer_usart0_ir: ConsumerUsart0Ir, + consumer_usart0_rx: ConsumerUsart0Rx, + consumer_usart0_trigger: ConsumerUsart0Trigger, + _reserved92: [u8; 0x0c], + consumer_vdac0_asynctrigch0: ConsumerVdac0Asynctrigch0, + consumer_vdac0_asynctrigch1: ConsumerVdac0Asynctrigch1, + consumer_vdac0_synctrigch0: ConsumerVdac0Synctrigch0, + consumer_vdac0_synctrigch1: ConsumerVdac0Synctrigch1, + consumer_wdog0_src0: ConsumerWdog0Src0, + consumer_wdog0_src1: ConsumerWdog0Src1, + consumer_wdog1_src0: ConsumerWdog1Src0, + consumer_wdog1_src1: ConsumerWdog1Src1, +} +impl RegisterBlock { + #[doc = "0x00 - No Description"] + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x08 - No Description"] - pub async_swpulse: ASYNC_SWPULSE, + #[inline(always)] + pub const fn async_swpulse(&self) -> &AsyncSwpulse { + &self.async_swpulse + } #[doc = "0x0c - No Description"] - pub async_swlevel: ASYNC_SWLEVEL, + #[inline(always)] + pub const fn async_swlevel(&self) -> &AsyncSwlevel { + &self.async_swlevel + } #[doc = "0x10 - No Description"] - pub async_peek: ASYNC_PEEK, + #[inline(always)] + pub const fn async_peek(&self) -> &AsyncPeek { + &self.async_peek + } #[doc = "0x14 - No Description"] - pub sync_peek: SYNC_PEEK, + #[inline(always)] + pub const fn sync_peek(&self) -> &SyncPeek { + &self.sync_peek + } #[doc = "0x18 - No Description"] - pub async_ch0_ctrl: ASYNC_CH0_CTRL, + #[inline(always)] + pub const fn async_ch0_ctrl(&self) -> &AsyncCh0Ctrl { + &self.async_ch0_ctrl + } #[doc = "0x1c - No Description"] - pub async_ch1_ctrl: ASYNC_CH1_CTRL, + #[inline(always)] + pub const fn async_ch1_ctrl(&self) -> &AsyncCh1Ctrl { + &self.async_ch1_ctrl + } #[doc = "0x20 - No Description"] - pub async_ch2_ctrl: ASYNC_CH2_CTRL, + #[inline(always)] + pub const fn async_ch2_ctrl(&self) -> &AsyncCh2Ctrl { + &self.async_ch2_ctrl + } #[doc = "0x24 - No Description"] - pub async_ch3_ctrl: ASYNC_CH3_CTRL, + #[inline(always)] + pub const fn async_ch3_ctrl(&self) -> &AsyncCh3Ctrl { + &self.async_ch3_ctrl + } #[doc = "0x28 - No Description"] - pub async_ch4_ctrl: ASYNC_CH4_CTRL, + #[inline(always)] + pub const fn async_ch4_ctrl(&self) -> &AsyncCh4Ctrl { + &self.async_ch4_ctrl + } #[doc = "0x2c - No Description"] - pub async_ch5_ctrl: ASYNC_CH5_CTRL, + #[inline(always)] + pub const fn async_ch5_ctrl(&self) -> &AsyncCh5Ctrl { + &self.async_ch5_ctrl + } #[doc = "0x30 - No Description"] - pub async_ch6_ctrl: ASYNC_CH6_CTRL, + #[inline(always)] + pub const fn async_ch6_ctrl(&self) -> &AsyncCh6Ctrl { + &self.async_ch6_ctrl + } #[doc = "0x34 - No Description"] - pub async_ch7_ctrl: ASYNC_CH7_CTRL, + #[inline(always)] + pub const fn async_ch7_ctrl(&self) -> &AsyncCh7Ctrl { + &self.async_ch7_ctrl + } #[doc = "0x38 - No Description"] - pub async_ch8_ctrl: ASYNC_CH8_CTRL, + #[inline(always)] + pub const fn async_ch8_ctrl(&self) -> &AsyncCh8Ctrl { + &self.async_ch8_ctrl + } #[doc = "0x3c - No Description"] - pub async_ch9_ctrl: ASYNC_CH9_CTRL, + #[inline(always)] + pub const fn async_ch9_ctrl(&self) -> &AsyncCh9Ctrl { + &self.async_ch9_ctrl + } #[doc = "0x40 - No Description"] - pub async_ch10_ctrl: ASYNC_CH10_CTRL, + #[inline(always)] + pub const fn async_ch10_ctrl(&self) -> &AsyncCh10Ctrl { + &self.async_ch10_ctrl + } #[doc = "0x44 - No Description"] - pub async_ch11_ctrl: ASYNC_CH11_CTRL, + #[inline(always)] + pub const fn async_ch11_ctrl(&self) -> &AsyncCh11Ctrl { + &self.async_ch11_ctrl + } #[doc = "0x48 - No Description"] - pub sync_ch0_ctrl: SYNC_CH0_CTRL, + #[inline(always)] + pub const fn sync_ch0_ctrl(&self) -> &SyncCh0Ctrl { + &self.sync_ch0_ctrl + } #[doc = "0x4c - No Description"] - pub sync_ch1_ctrl: SYNC_CH1_CTRL, + #[inline(always)] + pub const fn sync_ch1_ctrl(&self) -> &SyncCh1Ctrl { + &self.sync_ch1_ctrl + } #[doc = "0x50 - No Description"] - pub sync_ch2_ctrl: SYNC_CH2_CTRL, + #[inline(always)] + pub const fn sync_ch2_ctrl(&self) -> &SyncCh2Ctrl { + &self.sync_ch2_ctrl + } #[doc = "0x54 - No Description"] - pub sync_ch3_ctrl: SYNC_CH3_CTRL, + #[inline(always)] + pub const fn sync_ch3_ctrl(&self) -> &SyncCh3Ctrl { + &self.sync_ch3_ctrl + } #[doc = "0x58 - CALDN consumer register"] - pub consumer_cmu_caldn: CONSUMER_CMU_CALDN, + #[inline(always)] + pub const fn consumer_cmu_caldn(&self) -> &ConsumerCmuCaldn { + &self.consumer_cmu_caldn + } #[doc = "0x5c - CALUP Consumer register"] - pub consumer_cmu_calup: CONSUMER_CMU_CALUP, + #[inline(always)] + pub const fn consumer_cmu_calup(&self) -> &ConsumerCmuCalup { + &self.consumer_cmu_calup + } #[doc = "0x60 - CLK consumer register"] - pub consumer_eusart0_clk: CONSUMER_EUSART0_CLK, + #[inline(always)] + pub const fn consumer_eusart0_clk(&self) -> &ConsumerEusart0Clk { + &self.consumer_eusart0_clk + } #[doc = "0x64 - RX Consumer register"] - pub consumer_eusart0_rx: CONSUMER_EUSART0_RX, + #[inline(always)] + pub const fn consumer_eusart0_rx(&self) -> &ConsumerEusart0Rx { + &self.consumer_eusart0_rx + } #[doc = "0x68 - TRIGGER Consumer register"] - pub consumer_eusart0_trigger: CONSUMER_EUSART0_TRIGGER, + #[inline(always)] + pub const fn consumer_eusart0_trigger(&self) -> &ConsumerEusart0Trigger { + &self.consumer_eusart0_trigger + } #[doc = "0x6c - CLK consumer register"] - pub consumer_eusart1_clk: CONSUMER_EUSART1_CLK, + #[inline(always)] + pub const fn consumer_eusart1_clk(&self) -> &ConsumerEusart1Clk { + &self.consumer_eusart1_clk + } #[doc = "0x70 - RX Consumer register"] - pub consumer_eusart1_rx: CONSUMER_EUSART1_RX, + #[inline(always)] + pub const fn consumer_eusart1_rx(&self) -> &ConsumerEusart1Rx { + &self.consumer_eusart1_rx + } #[doc = "0x74 - TRIGGER Consumer register"] - pub consumer_eusart1_trigger: CONSUMER_EUSART1_TRIGGER, + #[inline(always)] + pub const fn consumer_eusart1_trigger(&self) -> &ConsumerEusart1Trigger { + &self.consumer_eusart1_trigger + } #[doc = "0x78 - CLK consumer register"] - pub consumer_eusart2_clk: CONSUMER_EUSART2_CLK, + #[inline(always)] + pub const fn consumer_eusart2_clk(&self) -> &ConsumerEusart2Clk { + &self.consumer_eusart2_clk + } #[doc = "0x7c - RX Consumer register"] - pub consumer_eusart2_rx: CONSUMER_EUSART2_RX, + #[inline(always)] + pub const fn consumer_eusart2_rx(&self) -> &ConsumerEusart2Rx { + &self.consumer_eusart2_rx + } #[doc = "0x80 - TRIGGER Consumer register"] - pub consumer_eusart2_trigger: CONSUMER_EUSART2_TRIGGER, - _reserved32: [u8; 0x04], + #[inline(always)] + pub const fn consumer_eusart2_trigger(&self) -> &ConsumerEusart2Trigger { + &self.consumer_eusart2_trigger + } #[doc = "0x88 - SCAN consumer register"] - pub consumer_iadc0_scantrigger: CONSUMER_IADC0_SCANTRIGGER, + #[inline(always)] + pub const fn consumer_iadc0_scantrigger(&self) -> &ConsumerIadc0Scantrigger { + &self.consumer_iadc0_scantrigger + } #[doc = "0x8c - SINGLE Consumer register"] - pub consumer_iadc0_singletrigger: CONSUMER_IADC0_SINGLETRIGGER, + #[inline(always)] + pub const fn consumer_iadc0_singletrigger(&self) -> &ConsumerIadc0Singletrigger { + &self.consumer_iadc0_singletrigger + } #[doc = "0x90 - DMAREQ0 consumer register"] - pub consumer_ldmaxbar_dmareq0: CONSUMER_LDMAXBAR_DMAREQ0, + #[inline(always)] + pub const fn consumer_ldmaxbar_dmareq0(&self) -> &ConsumerLdmaxbarDmareq0 { + &self.consumer_ldmaxbar_dmareq0 + } #[doc = "0x94 - DMAREQ1 Consumer register"] - pub consumer_ldmaxbar_dmareq1: CONSUMER_LDMAXBAR_DMAREQ1, - _reserved36: [u8; 0x10], + #[inline(always)] + pub const fn consumer_ldmaxbar_dmareq1(&self) -> &ConsumerLdmaxbarDmareq1 { + &self.consumer_ldmaxbar_dmareq1 + } #[doc = "0xa8 - START Consumer register"] - pub consumer_lesense_start: CONSUMER_LESENSE_START, + #[inline(always)] + pub const fn consumer_lesense_start(&self) -> &ConsumerLesenseStart { + &self.consumer_lesense_start + } #[doc = "0xac - CLEAR consumer register"] - pub consumer_letimer0_clear: CONSUMER_LETIMER0_CLEAR, + #[inline(always)] + pub const fn consumer_letimer0_clear(&self) -> &ConsumerLetimer0Clear { + &self.consumer_letimer0_clear + } #[doc = "0xb0 - START Consumer register"] - pub consumer_letimer0_start: CONSUMER_LETIMER0_START, + #[inline(always)] + pub const fn consumer_letimer0_start(&self) -> &ConsumerLetimer0Start { + &self.consumer_letimer0_start + } #[doc = "0xb4 - STOP Consumer register"] - pub consumer_letimer0_stop: CONSUMER_LETIMER0_STOP, - _reserved40: [u8; 0x04], + #[inline(always)] + pub const fn consumer_letimer0_stop(&self) -> &ConsumerLetimer0Stop { + &self.consumer_letimer0_stop + } #[doc = "0xbc - S0IN consumer register"] - pub consumer_pcnt0_s0in: CONSUMER_PCNT0_S0IN, + #[inline(always)] + pub const fn consumer_pcnt0_s0in(&self) -> &ConsumerPcnt0S0in { + &self.consumer_pcnt0_s0in + } #[doc = "0xc0 - S1IN Consumer register"] - pub consumer_pcnt0_s1in: CONSUMER_PCNT0_S1IN, - _reserved42: [u8; 0x50], + #[inline(always)] + pub const fn consumer_pcnt0_s1in(&self) -> &ConsumerPcnt0S1in { + &self.consumer_pcnt0_s1in + } #[doc = "0x114 - TAMPERSRC25 consumer register"] - pub consumer_setamper_tampersrc25: CONSUMER_SETAMPER_TAMPERSRC25, + #[inline(always)] + pub const fn consumer_setamper_tampersrc25(&self) -> &ConsumerSetamperTampersrc25 { + &self.consumer_setamper_tampersrc25 + } #[doc = "0x118 - TAMPERSRC26 Consumer register"] - pub consumer_setamper_tampersrc26: CONSUMER_SETAMPER_TAMPERSRC26, + #[inline(always)] + pub const fn consumer_setamper_tampersrc26(&self) -> &ConsumerSetamperTampersrc26 { + &self.consumer_setamper_tampersrc26 + } #[doc = "0x11c - TAMPERSRC27 Consumer register"] - pub consumer_setamper_tampersrc27: CONSUMER_SETAMPER_TAMPERSRC27, + #[inline(always)] + pub const fn consumer_setamper_tampersrc27(&self) -> &ConsumerSetamperTampersrc27 { + &self.consumer_setamper_tampersrc27 + } #[doc = "0x120 - TAMPERSRC28 Consumer register"] - pub consumer_setamper_tampersrc28: CONSUMER_SETAMPER_TAMPERSRC28, + #[inline(always)] + pub const fn consumer_setamper_tampersrc28(&self) -> &ConsumerSetamperTampersrc28 { + &self.consumer_setamper_tampersrc28 + } #[doc = "0x124 - TAMPERSRC29 Consumer register"] - pub consumer_setamper_tampersrc29: CONSUMER_SETAMPER_TAMPERSRC29, + #[inline(always)] + pub const fn consumer_setamper_tampersrc29(&self) -> &ConsumerSetamperTampersrc29 { + &self.consumer_setamper_tampersrc29 + } #[doc = "0x128 - TAMPERSRC30 Consumer register"] - pub consumer_setamper_tampersrc30: CONSUMER_SETAMPER_TAMPERSRC30, + #[inline(always)] + pub const fn consumer_setamper_tampersrc30(&self) -> &ConsumerSetamperTampersrc30 { + &self.consumer_setamper_tampersrc30 + } #[doc = "0x12c - TAMPERSRC31 Consumer register"] - pub consumer_setamper_tampersrc31: CONSUMER_SETAMPER_TAMPERSRC31, + #[inline(always)] + pub const fn consumer_setamper_tampersrc31(&self) -> &ConsumerSetamperTampersrc31 { + &self.consumer_setamper_tampersrc31 + } #[doc = "0x130 - IN0 consumer register"] - pub consumer_sysrtc0_in0: CONSUMER_SYSRTC0_IN0, + #[inline(always)] + pub const fn consumer_sysrtc0_in0(&self) -> &ConsumerSysrtc0In0 { + &self.consumer_sysrtc0_in0 + } #[doc = "0x134 - IN1 Consumer register"] - pub consumer_sysrtc0_in1: CONSUMER_SYSRTC0_IN1, + #[inline(always)] + pub const fn consumer_sysrtc0_in1(&self) -> &ConsumerSysrtc0In1 { + &self.consumer_sysrtc0_in1 + } #[doc = "0x138 - OSCREQ consumer register"] - pub consumer_hfxo0_oscreq: CONSUMER_HFXO0_OSCREQ, + #[inline(always)] + pub const fn consumer_hfxo0_oscreq(&self) -> &ConsumerHfxo0Oscreq { + &self.consumer_hfxo0_oscreq + } #[doc = "0x13c - TIMEOUT Consumer register"] - pub consumer_hfxo0_timeout: CONSUMER_HFXO0_TIMEOUT, + #[inline(always)] + pub const fn consumer_hfxo0_timeout(&self) -> &ConsumerHfxo0Timeout { + &self.consumer_hfxo0_timeout + } #[doc = "0x140 - CTI Consumer Register"] - pub consumer_core_ctiin0: CONSUMER_CORE_CTIIN0, + #[inline(always)] + pub const fn consumer_core_ctiin0(&self) -> &ConsumerCoreCtiin0 { + &self.consumer_core_ctiin0 + } #[doc = "0x144 - CTI Consumer Register"] - pub consumer_core_ctiin1: CONSUMER_CORE_CTIIN1, + #[inline(always)] + pub const fn consumer_core_ctiin1(&self) -> &ConsumerCoreCtiin1 { + &self.consumer_core_ctiin1 + } #[doc = "0x148 - CTI Consumer Register"] - pub consumer_core_ctiin2: CONSUMER_CORE_CTIIN2, + #[inline(always)] + pub const fn consumer_core_ctiin2(&self) -> &ConsumerCoreCtiin2 { + &self.consumer_core_ctiin2 + } #[doc = "0x14c - CTI Consumer Register"] - pub consumer_core_ctiin3: CONSUMER_CORE_CTIIN3, + #[inline(always)] + pub const fn consumer_core_ctiin3(&self) -> &ConsumerCoreCtiin3 { + &self.consumer_core_ctiin3 + } #[doc = "0x150 - M33 Consumer Register"] - pub consumer_core_m33rxev: CONSUMER_CORE_M33RXEV, + #[inline(always)] + pub const fn consumer_core_m33rxev(&self) -> &ConsumerCoreM33rxev { + &self.consumer_core_m33rxev + } #[doc = "0x154 - CC0 consumer register"] - pub consumer_timer0_cc0: CONSUMER_TIMER0_CC0, + #[inline(always)] + pub const fn consumer_timer0_cc0(&self) -> &ConsumerTimer0Cc0 { + &self.consumer_timer0_cc0 + } #[doc = "0x158 - CC1 Consumer register"] - pub consumer_timer0_cc1: CONSUMER_TIMER0_CC1, + #[inline(always)] + pub const fn consumer_timer0_cc1(&self) -> &ConsumerTimer0Cc1 { + &self.consumer_timer0_cc1 + } #[doc = "0x15c - CC2 Consumer register"] - pub consumer_timer0_cc2: CONSUMER_TIMER0_CC2, + #[inline(always)] + pub const fn consumer_timer0_cc2(&self) -> &ConsumerTimer0Cc2 { + &self.consumer_timer0_cc2 + } #[doc = "0x160 - DTI Consumer register"] - pub consumer_timer0_dti: CONSUMER_TIMER0_DTI, + #[inline(always)] + pub const fn consumer_timer0_dti(&self) -> &ConsumerTimer0Dti { + &self.consumer_timer0_dti + } #[doc = "0x164 - DTI Consumer register"] - pub consumer_timer0_dtifs1: CONSUMER_TIMER0_DTIFS1, + #[inline(always)] + pub const fn consumer_timer0_dtifs1(&self) -> &ConsumerTimer0Dtifs1 { + &self.consumer_timer0_dtifs1 + } #[doc = "0x168 - DTI Consumer register"] - pub consumer_timer0_dtifs2: CONSUMER_TIMER0_DTIFS2, + #[inline(always)] + pub const fn consumer_timer0_dtifs2(&self) -> &ConsumerTimer0Dtifs2 { + &self.consumer_timer0_dtifs2 + } #[doc = "0x16c - CC0 consumer register"] - pub consumer_timer1_cc0: CONSUMER_TIMER1_CC0, + #[inline(always)] + pub const fn consumer_timer1_cc0(&self) -> &ConsumerTimer1Cc0 { + &self.consumer_timer1_cc0 + } #[doc = "0x170 - CC1 Consumer register"] - pub consumer_timer1_cc1: CONSUMER_TIMER1_CC1, + #[inline(always)] + pub const fn consumer_timer1_cc1(&self) -> &ConsumerTimer1Cc1 { + &self.consumer_timer1_cc1 + } #[doc = "0x174 - CC2 Consumer register"] - pub consumer_timer1_cc2: CONSUMER_TIMER1_CC2, + #[inline(always)] + pub const fn consumer_timer1_cc2(&self) -> &ConsumerTimer1Cc2 { + &self.consumer_timer1_cc2 + } #[doc = "0x178 - DTI Consumer register"] - pub consumer_timer1_dti: CONSUMER_TIMER1_DTI, + #[inline(always)] + pub const fn consumer_timer1_dti(&self) -> &ConsumerTimer1Dti { + &self.consumer_timer1_dti + } #[doc = "0x17c - DTI Consumer register"] - pub consumer_timer1_dtifs1: CONSUMER_TIMER1_DTIFS1, + #[inline(always)] + pub const fn consumer_timer1_dtifs1(&self) -> &ConsumerTimer1Dtifs1 { + &self.consumer_timer1_dtifs1 + } #[doc = "0x180 - DTI Consumer register"] - pub consumer_timer1_dtifs2: CONSUMER_TIMER1_DTIFS2, + #[inline(always)] + pub const fn consumer_timer1_dtifs2(&self) -> &ConsumerTimer1Dtifs2 { + &self.consumer_timer1_dtifs2 + } #[doc = "0x184 - CC0 consumer register"] - pub consumer_timer2_cc0: CONSUMER_TIMER2_CC0, + #[inline(always)] + pub const fn consumer_timer2_cc0(&self) -> &ConsumerTimer2Cc0 { + &self.consumer_timer2_cc0 + } #[doc = "0x188 - CC1 Consumer register"] - pub consumer_timer2_cc1: CONSUMER_TIMER2_CC1, + #[inline(always)] + pub const fn consumer_timer2_cc1(&self) -> &ConsumerTimer2Cc1 { + &self.consumer_timer2_cc1 + } #[doc = "0x18c - CC2 Consumer register"] - pub consumer_timer2_cc2: CONSUMER_TIMER2_CC2, + #[inline(always)] + pub const fn consumer_timer2_cc2(&self) -> &ConsumerTimer2Cc2 { + &self.consumer_timer2_cc2 + } #[doc = "0x190 - DTI Consumer register"] - pub consumer_timer2_dti: CONSUMER_TIMER2_DTI, + #[inline(always)] + pub const fn consumer_timer2_dti(&self) -> &ConsumerTimer2Dti { + &self.consumer_timer2_dti + } #[doc = "0x194 - DTI Consumer register"] - pub consumer_timer2_dtifs1: CONSUMER_TIMER2_DTIFS1, + #[inline(always)] + pub const fn consumer_timer2_dtifs1(&self) -> &ConsumerTimer2Dtifs1 { + &self.consumer_timer2_dtifs1 + } #[doc = "0x198 - DTI Consumer register"] - pub consumer_timer2_dtifs2: CONSUMER_TIMER2_DTIFS2, + #[inline(always)] + pub const fn consumer_timer2_dtifs2(&self) -> &ConsumerTimer2Dtifs2 { + &self.consumer_timer2_dtifs2 + } #[doc = "0x19c - CC0 consumer register"] - pub consumer_timer3_cc0: CONSUMER_TIMER3_CC0, + #[inline(always)] + pub const fn consumer_timer3_cc0(&self) -> &ConsumerTimer3Cc0 { + &self.consumer_timer3_cc0 + } #[doc = "0x1a0 - CC1 Consumer register"] - pub consumer_timer3_cc1: CONSUMER_TIMER3_CC1, + #[inline(always)] + pub const fn consumer_timer3_cc1(&self) -> &ConsumerTimer3Cc1 { + &self.consumer_timer3_cc1 + } #[doc = "0x1a4 - CC2 Consumer register"] - pub consumer_timer3_cc2: CONSUMER_TIMER3_CC2, + #[inline(always)] + pub const fn consumer_timer3_cc2(&self) -> &ConsumerTimer3Cc2 { + &self.consumer_timer3_cc2 + } #[doc = "0x1a8 - DTI Consumer register"] - pub consumer_timer3_dti: CONSUMER_TIMER3_DTI, + #[inline(always)] + pub const fn consumer_timer3_dti(&self) -> &ConsumerTimer3Dti { + &self.consumer_timer3_dti + } #[doc = "0x1ac - DTI Consumer register"] - pub consumer_timer3_dtifs1: CONSUMER_TIMER3_DTIFS1, + #[inline(always)] + pub const fn consumer_timer3_dtifs1(&self) -> &ConsumerTimer3Dtifs1 { + &self.consumer_timer3_dtifs1 + } #[doc = "0x1b0 - DTI Consumer register"] - pub consumer_timer3_dtifs2: CONSUMER_TIMER3_DTIFS2, + #[inline(always)] + pub const fn consumer_timer3_dtifs2(&self) -> &ConsumerTimer3Dtifs2 { + &self.consumer_timer3_dtifs2 + } #[doc = "0x1b4 - CC0 consumer register"] - pub consumer_timer4_cc0: CONSUMER_TIMER4_CC0, + #[inline(always)] + pub const fn consumer_timer4_cc0(&self) -> &ConsumerTimer4Cc0 { + &self.consumer_timer4_cc0 + } #[doc = "0x1b8 - CC1 Consumer register"] - pub consumer_timer4_cc1: CONSUMER_TIMER4_CC1, + #[inline(always)] + pub const fn consumer_timer4_cc1(&self) -> &ConsumerTimer4Cc1 { + &self.consumer_timer4_cc1 + } #[doc = "0x1bc - CC2 Consumer register"] - pub consumer_timer4_cc2: CONSUMER_TIMER4_CC2, + #[inline(always)] + pub const fn consumer_timer4_cc2(&self) -> &ConsumerTimer4Cc2 { + &self.consumer_timer4_cc2 + } #[doc = "0x1c0 - DTI Consumer register"] - pub consumer_timer4_dti: CONSUMER_TIMER4_DTI, + #[inline(always)] + pub const fn consumer_timer4_dti(&self) -> &ConsumerTimer4Dti { + &self.consumer_timer4_dti + } #[doc = "0x1c4 - DTI Consumer register"] - pub consumer_timer4_dtifs1: CONSUMER_TIMER4_DTIFS1, + #[inline(always)] + pub const fn consumer_timer4_dtifs1(&self) -> &ConsumerTimer4Dtifs1 { + &self.consumer_timer4_dtifs1 + } #[doc = "0x1c8 - DTI Consumer register"] - pub consumer_timer4_dtifs2: CONSUMER_TIMER4_DTIFS2, + #[inline(always)] + pub const fn consumer_timer4_dtifs2(&self) -> &ConsumerTimer4Dtifs2 { + &self.consumer_timer4_dtifs2 + } #[doc = "0x1cc - CLK consumer register"] - pub consumer_usart0_clk: CONSUMER_USART0_CLK, + #[inline(always)] + pub const fn consumer_usart0_clk(&self) -> &ConsumerUsart0Clk { + &self.consumer_usart0_clk + } #[doc = "0x1d0 - IR Consumer register"] - pub consumer_usart0_ir: CONSUMER_USART0_IR, + #[inline(always)] + pub const fn consumer_usart0_ir(&self) -> &ConsumerUsart0Ir { + &self.consumer_usart0_ir + } #[doc = "0x1d4 - RX Consumer register"] - pub consumer_usart0_rx: CONSUMER_USART0_RX, + #[inline(always)] + pub const fn consumer_usart0_rx(&self) -> &ConsumerUsart0Rx { + &self.consumer_usart0_rx + } #[doc = "0x1d8 - TRIGGER Consumer register"] - pub consumer_usart0_trigger: CONSUMER_USART0_TRIGGER, - _reserved92: [u8; 0x0c], + #[inline(always)] + pub const fn consumer_usart0_trigger(&self) -> &ConsumerUsart0Trigger { + &self.consumer_usart0_trigger + } #[doc = "0x1e8 - ASYNCTRIG consumer register"] - pub consumer_vdac0_asynctrigch0: CONSUMER_VDAC0_ASYNCTRIGCH0, + #[inline(always)] + pub const fn consumer_vdac0_asynctrigch0(&self) -> &ConsumerVdac0Asynctrigch0 { + &self.consumer_vdac0_asynctrigch0 + } #[doc = "0x1ec - ASYNCTRIG Consumer register"] - pub consumer_vdac0_asynctrigch1: CONSUMER_VDAC0_ASYNCTRIGCH1, + #[inline(always)] + pub const fn consumer_vdac0_asynctrigch1(&self) -> &ConsumerVdac0Asynctrigch1 { + &self.consumer_vdac0_asynctrigch1 + } #[doc = "0x1f0 - SYNCTRIG Consumer register"] - pub consumer_vdac0_synctrigch0: CONSUMER_VDAC0_SYNCTRIGCH0, + #[inline(always)] + pub const fn consumer_vdac0_synctrigch0(&self) -> &ConsumerVdac0Synctrigch0 { + &self.consumer_vdac0_synctrigch0 + } #[doc = "0x1f4 - SYNCTRIG Consumer register"] - pub consumer_vdac0_synctrigch1: CONSUMER_VDAC0_SYNCTRIGCH1, + #[inline(always)] + pub const fn consumer_vdac0_synctrigch1(&self) -> &ConsumerVdac0Synctrigch1 { + &self.consumer_vdac0_synctrigch1 + } #[doc = "0x1f8 - SRC0 consumer register"] - pub consumer_wdog0_src0: CONSUMER_WDOG0_SRC0, + #[inline(always)] + pub const fn consumer_wdog0_src0(&self) -> &ConsumerWdog0Src0 { + &self.consumer_wdog0_src0 + } #[doc = "0x1fc - SRC1 Consumer register"] - pub consumer_wdog0_src1: CONSUMER_WDOG0_SRC1, + #[inline(always)] + pub const fn consumer_wdog0_src1(&self) -> &ConsumerWdog0Src1 { + &self.consumer_wdog0_src1 + } #[doc = "0x200 - SRC0 consumer register"] - pub consumer_wdog1_src0: CONSUMER_WDOG1_SRC0, + #[inline(always)] + pub const fn consumer_wdog1_src0(&self) -> &ConsumerWdog1Src0 { + &self.consumer_wdog1_src0 + } #[doc = "0x204 - SRC1 Consumer register"] - pub consumer_wdog1_src1: CONSUMER_WDOG1_SRC1, + #[inline(always)] + pub const fn consumer_wdog1_src1(&self) -> &ConsumerWdog1Src1 { + &self.consumer_wdog1_src1 + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "ASYNC_SWPULSE (w) register accessor: an alias for `Reg`"] -pub type ASYNC_SWPULSE = crate::Reg; +#[doc = "ASYNC_SWPULSE (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_swpulse::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_swpulse`] +module"] +#[doc(alias = "ASYNC_SWPULSE")] +pub type AsyncSwpulse = crate::Reg; #[doc = "No Description"] pub mod async_swpulse; -#[doc = "ASYNC_SWLEVEL (rw) register accessor: an alias for `Reg`"] -pub type ASYNC_SWLEVEL = crate::Reg; +#[doc = "ASYNC_SWLEVEL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_swlevel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_swlevel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_swlevel`] +module"] +#[doc(alias = "ASYNC_SWLEVEL")] +pub type AsyncSwlevel = crate::Reg; #[doc = "No Description"] pub mod async_swlevel; -#[doc = "ASYNC_PEEK (r) register accessor: an alias for `Reg`"] -pub type ASYNC_PEEK = crate::Reg; +#[doc = "ASYNC_PEEK (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_peek::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_peek`] +module"] +#[doc(alias = "ASYNC_PEEK")] +pub type AsyncPeek = crate::Reg; #[doc = "No Description"] pub mod async_peek; -#[doc = "SYNC_PEEK (r) register accessor: an alias for `Reg`"] -pub type SYNC_PEEK = crate::Reg; +#[doc = "SYNC_PEEK (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sync_peek::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sync_peek`] +module"] +#[doc(alias = "SYNC_PEEK")] +pub type SyncPeek = crate::Reg; #[doc = "No Description"] pub mod sync_peek; -#[doc = "ASYNC_CH0_CTRL (rw) register accessor: an alias for `Reg`"] -pub type ASYNC_CH0_CTRL = crate::Reg; +#[doc = "ASYNC_CH0_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch0_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch0_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_ch0_ctrl`] +module"] +#[doc(alias = "ASYNC_CH0_CTRL")] +pub type AsyncCh0Ctrl = crate::Reg; #[doc = "No Description"] pub mod async_ch0_ctrl; -#[doc = "ASYNC_CH1_CTRL (rw) register accessor: an alias for `Reg`"] -pub type ASYNC_CH1_CTRL = crate::Reg; +#[doc = "ASYNC_CH1_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch1_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch1_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_ch1_ctrl`] +module"] +#[doc(alias = "ASYNC_CH1_CTRL")] +pub type AsyncCh1Ctrl = crate::Reg; #[doc = "No Description"] pub mod async_ch1_ctrl; -#[doc = "ASYNC_CH2_CTRL (rw) register accessor: an alias for `Reg`"] -pub type ASYNC_CH2_CTRL = crate::Reg; +#[doc = "ASYNC_CH2_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch2_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch2_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_ch2_ctrl`] +module"] +#[doc(alias = "ASYNC_CH2_CTRL")] +pub type AsyncCh2Ctrl = crate::Reg; #[doc = "No Description"] pub mod async_ch2_ctrl; -#[doc = "ASYNC_CH3_CTRL (rw) register accessor: an alias for `Reg`"] -pub type ASYNC_CH3_CTRL = crate::Reg; +#[doc = "ASYNC_CH3_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch3_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch3_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_ch3_ctrl`] +module"] +#[doc(alias = "ASYNC_CH3_CTRL")] +pub type AsyncCh3Ctrl = crate::Reg; #[doc = "No Description"] pub mod async_ch3_ctrl; -#[doc = "ASYNC_CH4_CTRL (rw) register accessor: an alias for `Reg`"] -pub type ASYNC_CH4_CTRL = crate::Reg; +#[doc = "ASYNC_CH4_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch4_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch4_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_ch4_ctrl`] +module"] +#[doc(alias = "ASYNC_CH4_CTRL")] +pub type AsyncCh4Ctrl = crate::Reg; #[doc = "No Description"] pub mod async_ch4_ctrl; -#[doc = "ASYNC_CH5_CTRL (rw) register accessor: an alias for `Reg`"] -pub type ASYNC_CH5_CTRL = crate::Reg; +#[doc = "ASYNC_CH5_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch5_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch5_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_ch5_ctrl`] +module"] +#[doc(alias = "ASYNC_CH5_CTRL")] +pub type AsyncCh5Ctrl = crate::Reg; #[doc = "No Description"] pub mod async_ch5_ctrl; -#[doc = "ASYNC_CH6_CTRL (rw) register accessor: an alias for `Reg`"] -pub type ASYNC_CH6_CTRL = crate::Reg; +#[doc = "ASYNC_CH6_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch6_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch6_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_ch6_ctrl`] +module"] +#[doc(alias = "ASYNC_CH6_CTRL")] +pub type AsyncCh6Ctrl = crate::Reg; #[doc = "No Description"] pub mod async_ch6_ctrl; -#[doc = "ASYNC_CH7_CTRL (rw) register accessor: an alias for `Reg`"] -pub type ASYNC_CH7_CTRL = crate::Reg; +#[doc = "ASYNC_CH7_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch7_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch7_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_ch7_ctrl`] +module"] +#[doc(alias = "ASYNC_CH7_CTRL")] +pub type AsyncCh7Ctrl = crate::Reg; #[doc = "No Description"] pub mod async_ch7_ctrl; -#[doc = "ASYNC_CH8_CTRL (rw) register accessor: an alias for `Reg`"] -pub type ASYNC_CH8_CTRL = crate::Reg; +#[doc = "ASYNC_CH8_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch8_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch8_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_ch8_ctrl`] +module"] +#[doc(alias = "ASYNC_CH8_CTRL")] +pub type AsyncCh8Ctrl = crate::Reg; #[doc = "No Description"] pub mod async_ch8_ctrl; -#[doc = "ASYNC_CH9_CTRL (rw) register accessor: an alias for `Reg`"] -pub type ASYNC_CH9_CTRL = crate::Reg; +#[doc = "ASYNC_CH9_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch9_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch9_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_ch9_ctrl`] +module"] +#[doc(alias = "ASYNC_CH9_CTRL")] +pub type AsyncCh9Ctrl = crate::Reg; #[doc = "No Description"] pub mod async_ch9_ctrl; -#[doc = "ASYNC_CH10_CTRL (rw) register accessor: an alias for `Reg`"] -pub type ASYNC_CH10_CTRL = crate::Reg; +#[doc = "ASYNC_CH10_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch10_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch10_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_ch10_ctrl`] +module"] +#[doc(alias = "ASYNC_CH10_CTRL")] +pub type AsyncCh10Ctrl = crate::Reg; #[doc = "No Description"] pub mod async_ch10_ctrl; -#[doc = "ASYNC_CH11_CTRL (rw) register accessor: an alias for `Reg`"] -pub type ASYNC_CH11_CTRL = crate::Reg; +#[doc = "ASYNC_CH11_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch11_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch11_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_ch11_ctrl`] +module"] +#[doc(alias = "ASYNC_CH11_CTRL")] +pub type AsyncCh11Ctrl = crate::Reg; #[doc = "No Description"] pub mod async_ch11_ctrl; -#[doc = "SYNC_CH0_CTRL (rw) register accessor: an alias for `Reg`"] -pub type SYNC_CH0_CTRL = crate::Reg; +#[doc = "SYNC_CH0_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sync_ch0_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sync_ch0_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sync_ch0_ctrl`] +module"] +#[doc(alias = "SYNC_CH0_CTRL")] +pub type SyncCh0Ctrl = crate::Reg; #[doc = "No Description"] pub mod sync_ch0_ctrl; -#[doc = "SYNC_CH1_CTRL (rw) register accessor: an alias for `Reg`"] -pub type SYNC_CH1_CTRL = crate::Reg; +#[doc = "SYNC_CH1_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sync_ch1_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sync_ch1_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sync_ch1_ctrl`] +module"] +#[doc(alias = "SYNC_CH1_CTRL")] +pub type SyncCh1Ctrl = crate::Reg; #[doc = "No Description"] pub mod sync_ch1_ctrl; -#[doc = "SYNC_CH2_CTRL (rw) register accessor: an alias for `Reg`"] -pub type SYNC_CH2_CTRL = crate::Reg; +#[doc = "SYNC_CH2_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sync_ch2_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sync_ch2_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sync_ch2_ctrl`] +module"] +#[doc(alias = "SYNC_CH2_CTRL")] +pub type SyncCh2Ctrl = crate::Reg; #[doc = "No Description"] pub mod sync_ch2_ctrl; -#[doc = "SYNC_CH3_CTRL (rw) register accessor: an alias for `Reg`"] -pub type SYNC_CH3_CTRL = crate::Reg; +#[doc = "SYNC_CH3_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sync_ch3_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sync_ch3_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sync_ch3_ctrl`] +module"] +#[doc(alias = "SYNC_CH3_CTRL")] +pub type SyncCh3Ctrl = crate::Reg; #[doc = "No Description"] pub mod sync_ch3_ctrl; -#[doc = "CONSUMER_CMU_CALDN (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_CMU_CALDN = crate::Reg; +#[doc = "CONSUMER_CMU_CALDN (rw) register accessor: CALDN consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_cmu_caldn::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_cmu_caldn::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_cmu_caldn`] +module"] +#[doc(alias = "CONSUMER_CMU_CALDN")] +pub type ConsumerCmuCaldn = crate::Reg; #[doc = "CALDN consumer register"] pub mod consumer_cmu_caldn; -#[doc = "CONSUMER_CMU_CALUP (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_CMU_CALUP = crate::Reg; +#[doc = "CONSUMER_CMU_CALUP (rw) register accessor: CALUP Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_cmu_calup::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_cmu_calup::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_cmu_calup`] +module"] +#[doc(alias = "CONSUMER_CMU_CALUP")] +pub type ConsumerCmuCalup = crate::Reg; #[doc = "CALUP Consumer register"] pub mod consumer_cmu_calup; -#[doc = "CONSUMER_EUSART0_CLK (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_EUSART0_CLK = crate::Reg; +#[doc = "CONSUMER_EUSART0_CLK (rw) register accessor: CLK consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart0_clk::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart0_clk::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_eusart0_clk`] +module"] +#[doc(alias = "CONSUMER_EUSART0_CLK")] +pub type ConsumerEusart0Clk = crate::Reg; #[doc = "CLK consumer register"] pub mod consumer_eusart0_clk; -#[doc = "CONSUMER_EUSART0_RX (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_EUSART0_RX = crate::Reg; +#[doc = "CONSUMER_EUSART0_RX (rw) register accessor: RX Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart0_rx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart0_rx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_eusart0_rx`] +module"] +#[doc(alias = "CONSUMER_EUSART0_RX")] +pub type ConsumerEusart0Rx = crate::Reg; #[doc = "RX Consumer register"] pub mod consumer_eusart0_rx; -#[doc = "CONSUMER_EUSART0_TRIGGER (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_EUSART0_TRIGGER = - crate::Reg; +#[doc = "CONSUMER_EUSART0_TRIGGER (rw) register accessor: TRIGGER Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart0_trigger::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart0_trigger::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_eusart0_trigger`] +module"] +#[doc(alias = "CONSUMER_EUSART0_TRIGGER")] +pub type ConsumerEusart0Trigger = crate::Reg; #[doc = "TRIGGER Consumer register"] pub mod consumer_eusart0_trigger; -#[doc = "CONSUMER_EUSART1_CLK (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_EUSART1_CLK = crate::Reg; +#[doc = "CONSUMER_EUSART1_CLK (rw) register accessor: CLK consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart1_clk::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart1_clk::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_eusart1_clk`] +module"] +#[doc(alias = "CONSUMER_EUSART1_CLK")] +pub type ConsumerEusart1Clk = crate::Reg; #[doc = "CLK consumer register"] pub mod consumer_eusart1_clk; -#[doc = "CONSUMER_EUSART1_RX (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_EUSART1_RX = crate::Reg; +#[doc = "CONSUMER_EUSART1_RX (rw) register accessor: RX Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart1_rx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart1_rx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_eusart1_rx`] +module"] +#[doc(alias = "CONSUMER_EUSART1_RX")] +pub type ConsumerEusart1Rx = crate::Reg; #[doc = "RX Consumer register"] pub mod consumer_eusart1_rx; -#[doc = "CONSUMER_EUSART1_TRIGGER (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_EUSART1_TRIGGER = - crate::Reg; +#[doc = "CONSUMER_EUSART1_TRIGGER (rw) register accessor: TRIGGER Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart1_trigger::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart1_trigger::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_eusart1_trigger`] +module"] +#[doc(alias = "CONSUMER_EUSART1_TRIGGER")] +pub type ConsumerEusart1Trigger = crate::Reg; #[doc = "TRIGGER Consumer register"] pub mod consumer_eusart1_trigger; -#[doc = "CONSUMER_EUSART2_CLK (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_EUSART2_CLK = crate::Reg; +#[doc = "CONSUMER_EUSART2_CLK (rw) register accessor: CLK consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart2_clk::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart2_clk::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_eusart2_clk`] +module"] +#[doc(alias = "CONSUMER_EUSART2_CLK")] +pub type ConsumerEusart2Clk = crate::Reg; #[doc = "CLK consumer register"] pub mod consumer_eusart2_clk; -#[doc = "CONSUMER_EUSART2_RX (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_EUSART2_RX = crate::Reg; +#[doc = "CONSUMER_EUSART2_RX (rw) register accessor: RX Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart2_rx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart2_rx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_eusart2_rx`] +module"] +#[doc(alias = "CONSUMER_EUSART2_RX")] +pub type ConsumerEusart2Rx = crate::Reg; #[doc = "RX Consumer register"] pub mod consumer_eusart2_rx; -#[doc = "CONSUMER_EUSART2_TRIGGER (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_EUSART2_TRIGGER = - crate::Reg; +#[doc = "CONSUMER_EUSART2_TRIGGER (rw) register accessor: TRIGGER Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart2_trigger::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart2_trigger::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_eusart2_trigger`] +module"] +#[doc(alias = "CONSUMER_EUSART2_TRIGGER")] +pub type ConsumerEusart2Trigger = crate::Reg; #[doc = "TRIGGER Consumer register"] pub mod consumer_eusart2_trigger; -#[doc = "CONSUMER_IADC0_SCANTRIGGER (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_IADC0_SCANTRIGGER = - crate::Reg; +#[doc = "CONSUMER_IADC0_SCANTRIGGER (rw) register accessor: SCAN consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_iadc0_scantrigger::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_iadc0_scantrigger::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_iadc0_scantrigger`] +module"] +#[doc(alias = "CONSUMER_IADC0_SCANTRIGGER")] +pub type ConsumerIadc0Scantrigger = + crate::Reg; #[doc = "SCAN consumer register"] pub mod consumer_iadc0_scantrigger; -#[doc = "CONSUMER_IADC0_SINGLETRIGGER (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_IADC0_SINGLETRIGGER = - crate::Reg; +#[doc = "CONSUMER_IADC0_SINGLETRIGGER (rw) register accessor: SINGLE Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_iadc0_singletrigger::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_iadc0_singletrigger::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_iadc0_singletrigger`] +module"] +#[doc(alias = "CONSUMER_IADC0_SINGLETRIGGER")] +pub type ConsumerIadc0Singletrigger = + crate::Reg; #[doc = "SINGLE Consumer register"] pub mod consumer_iadc0_singletrigger; -#[doc = "CONSUMER_LDMAXBAR_DMAREQ0 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_LDMAXBAR_DMAREQ0 = - crate::Reg; +#[doc = "CONSUMER_LDMAXBAR_DMAREQ0 (rw) register accessor: DMAREQ0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_ldmaxbar_dmareq0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_ldmaxbar_dmareq0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_ldmaxbar_dmareq0`] +module"] +#[doc(alias = "CONSUMER_LDMAXBAR_DMAREQ0")] +pub type ConsumerLdmaxbarDmareq0 = + crate::Reg; #[doc = "DMAREQ0 consumer register"] pub mod consumer_ldmaxbar_dmareq0; -#[doc = "CONSUMER_LDMAXBAR_DMAREQ1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_LDMAXBAR_DMAREQ1 = - crate::Reg; +#[doc = "CONSUMER_LDMAXBAR_DMAREQ1 (rw) register accessor: DMAREQ1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_ldmaxbar_dmareq1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_ldmaxbar_dmareq1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_ldmaxbar_dmareq1`] +module"] +#[doc(alias = "CONSUMER_LDMAXBAR_DMAREQ1")] +pub type ConsumerLdmaxbarDmareq1 = + crate::Reg; #[doc = "DMAREQ1 Consumer register"] pub mod consumer_ldmaxbar_dmareq1; -#[doc = "CONSUMER_LESENSE_START (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_LESENSE_START = crate::Reg; +#[doc = "CONSUMER_LESENSE_START (rw) register accessor: START Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_lesense_start::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_lesense_start::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_lesense_start`] +module"] +#[doc(alias = "CONSUMER_LESENSE_START")] +pub type ConsumerLesenseStart = crate::Reg; #[doc = "START Consumer register"] pub mod consumer_lesense_start; -#[doc = "CONSUMER_LETIMER0_CLEAR (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_LETIMER0_CLEAR = - crate::Reg; +#[doc = "CONSUMER_LETIMER0_CLEAR (rw) register accessor: CLEAR consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_letimer0_clear::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_letimer0_clear::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_letimer0_clear`] +module"] +#[doc(alias = "CONSUMER_LETIMER0_CLEAR")] +pub type ConsumerLetimer0Clear = crate::Reg; #[doc = "CLEAR consumer register"] pub mod consumer_letimer0_clear; -#[doc = "CONSUMER_LETIMER0_START (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_LETIMER0_START = - crate::Reg; +#[doc = "CONSUMER_LETIMER0_START (rw) register accessor: START Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_letimer0_start::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_letimer0_start::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_letimer0_start`] +module"] +#[doc(alias = "CONSUMER_LETIMER0_START")] +pub type ConsumerLetimer0Start = crate::Reg; #[doc = "START Consumer register"] pub mod consumer_letimer0_start; -#[doc = "CONSUMER_LETIMER0_STOP (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_LETIMER0_STOP = crate::Reg; +#[doc = "CONSUMER_LETIMER0_STOP (rw) register accessor: STOP Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_letimer0_stop::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_letimer0_stop::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_letimer0_stop`] +module"] +#[doc(alias = "CONSUMER_LETIMER0_STOP")] +pub type ConsumerLetimer0Stop = crate::Reg; #[doc = "STOP Consumer register"] pub mod consumer_letimer0_stop; -#[doc = "CONSUMER_PCNT0_S0IN (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_PCNT0_S0IN = crate::Reg; +#[doc = "CONSUMER_PCNT0_S0IN (rw) register accessor: S0IN consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_pcnt0_s0in::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_pcnt0_s0in::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_pcnt0_s0in`] +module"] +#[doc(alias = "CONSUMER_PCNT0_S0IN")] +pub type ConsumerPcnt0S0in = crate::Reg; #[doc = "S0IN consumer register"] pub mod consumer_pcnt0_s0in; -#[doc = "CONSUMER_PCNT0_S1IN (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_PCNT0_S1IN = crate::Reg; +#[doc = "CONSUMER_PCNT0_S1IN (rw) register accessor: S1IN Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_pcnt0_s1in::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_pcnt0_s1in::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_pcnt0_s1in`] +module"] +#[doc(alias = "CONSUMER_PCNT0_S1IN")] +pub type ConsumerPcnt0S1in = crate::Reg; #[doc = "S1IN Consumer register"] pub mod consumer_pcnt0_s1in; -#[doc = "CONSUMER_SETAMPER_TAMPERSRC25 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_SETAMPER_TAMPERSRC25 = - crate::Reg; +#[doc = "CONSUMER_SETAMPER_TAMPERSRC25 (rw) register accessor: TAMPERSRC25 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc25::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc25::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_setamper_tampersrc25`] +module"] +#[doc(alias = "CONSUMER_SETAMPER_TAMPERSRC25")] +pub type ConsumerSetamperTampersrc25 = + crate::Reg; #[doc = "TAMPERSRC25 consumer register"] pub mod consumer_setamper_tampersrc25; -#[doc = "CONSUMER_SETAMPER_TAMPERSRC26 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_SETAMPER_TAMPERSRC26 = - crate::Reg; +#[doc = "CONSUMER_SETAMPER_TAMPERSRC26 (rw) register accessor: TAMPERSRC26 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc26::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc26::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_setamper_tampersrc26`] +module"] +#[doc(alias = "CONSUMER_SETAMPER_TAMPERSRC26")] +pub type ConsumerSetamperTampersrc26 = + crate::Reg; #[doc = "TAMPERSRC26 Consumer register"] pub mod consumer_setamper_tampersrc26; -#[doc = "CONSUMER_SETAMPER_TAMPERSRC27 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_SETAMPER_TAMPERSRC27 = - crate::Reg; +#[doc = "CONSUMER_SETAMPER_TAMPERSRC27 (rw) register accessor: TAMPERSRC27 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc27::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc27::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_setamper_tampersrc27`] +module"] +#[doc(alias = "CONSUMER_SETAMPER_TAMPERSRC27")] +pub type ConsumerSetamperTampersrc27 = + crate::Reg; #[doc = "TAMPERSRC27 Consumer register"] pub mod consumer_setamper_tampersrc27; -#[doc = "CONSUMER_SETAMPER_TAMPERSRC28 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_SETAMPER_TAMPERSRC28 = - crate::Reg; +#[doc = "CONSUMER_SETAMPER_TAMPERSRC28 (rw) register accessor: TAMPERSRC28 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc28::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc28::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_setamper_tampersrc28`] +module"] +#[doc(alias = "CONSUMER_SETAMPER_TAMPERSRC28")] +pub type ConsumerSetamperTampersrc28 = + crate::Reg; #[doc = "TAMPERSRC28 Consumer register"] pub mod consumer_setamper_tampersrc28; -#[doc = "CONSUMER_SETAMPER_TAMPERSRC29 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_SETAMPER_TAMPERSRC29 = - crate::Reg; +#[doc = "CONSUMER_SETAMPER_TAMPERSRC29 (rw) register accessor: TAMPERSRC29 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc29::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc29::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_setamper_tampersrc29`] +module"] +#[doc(alias = "CONSUMER_SETAMPER_TAMPERSRC29")] +pub type ConsumerSetamperTampersrc29 = + crate::Reg; #[doc = "TAMPERSRC29 Consumer register"] pub mod consumer_setamper_tampersrc29; -#[doc = "CONSUMER_SETAMPER_TAMPERSRC30 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_SETAMPER_TAMPERSRC30 = - crate::Reg; +#[doc = "CONSUMER_SETAMPER_TAMPERSRC30 (rw) register accessor: TAMPERSRC30 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc30::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc30::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_setamper_tampersrc30`] +module"] +#[doc(alias = "CONSUMER_SETAMPER_TAMPERSRC30")] +pub type ConsumerSetamperTampersrc30 = + crate::Reg; #[doc = "TAMPERSRC30 Consumer register"] pub mod consumer_setamper_tampersrc30; -#[doc = "CONSUMER_SETAMPER_TAMPERSRC31 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_SETAMPER_TAMPERSRC31 = - crate::Reg; +#[doc = "CONSUMER_SETAMPER_TAMPERSRC31 (rw) register accessor: TAMPERSRC31 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc31::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc31::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_setamper_tampersrc31`] +module"] +#[doc(alias = "CONSUMER_SETAMPER_TAMPERSRC31")] +pub type ConsumerSetamperTampersrc31 = + crate::Reg; #[doc = "TAMPERSRC31 Consumer register"] pub mod consumer_setamper_tampersrc31; -#[doc = "CONSUMER_SYSRTC0_IN0 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_SYSRTC0_IN0 = crate::Reg; +#[doc = "CONSUMER_SYSRTC0_IN0 (rw) register accessor: IN0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_sysrtc0_in0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_sysrtc0_in0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_sysrtc0_in0`] +module"] +#[doc(alias = "CONSUMER_SYSRTC0_IN0")] +pub type ConsumerSysrtc0In0 = crate::Reg; #[doc = "IN0 consumer register"] pub mod consumer_sysrtc0_in0; -#[doc = "CONSUMER_SYSRTC0_IN1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_SYSRTC0_IN1 = crate::Reg; +#[doc = "CONSUMER_SYSRTC0_IN1 (rw) register accessor: IN1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_sysrtc0_in1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_sysrtc0_in1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_sysrtc0_in1`] +module"] +#[doc(alias = "CONSUMER_SYSRTC0_IN1")] +pub type ConsumerSysrtc0In1 = crate::Reg; #[doc = "IN1 Consumer register"] pub mod consumer_sysrtc0_in1; -#[doc = "CONSUMER_HFXO0_OSCREQ (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_HFXO0_OSCREQ = crate::Reg; +#[doc = "CONSUMER_HFXO0_OSCREQ (rw) register accessor: OSCREQ consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_hfxo0_oscreq::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_hfxo0_oscreq::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_hfxo0_oscreq`] +module"] +#[doc(alias = "CONSUMER_HFXO0_OSCREQ")] +pub type ConsumerHfxo0Oscreq = crate::Reg; #[doc = "OSCREQ consumer register"] pub mod consumer_hfxo0_oscreq; -#[doc = "CONSUMER_HFXO0_TIMEOUT (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_HFXO0_TIMEOUT = crate::Reg; +#[doc = "CONSUMER_HFXO0_TIMEOUT (rw) register accessor: TIMEOUT Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_hfxo0_timeout::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_hfxo0_timeout::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_hfxo0_timeout`] +module"] +#[doc(alias = "CONSUMER_HFXO0_TIMEOUT")] +pub type ConsumerHfxo0Timeout = crate::Reg; #[doc = "TIMEOUT Consumer register"] pub mod consumer_hfxo0_timeout; -#[doc = "CONSUMER_CORE_CTIIN0 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_CORE_CTIIN0 = crate::Reg; +#[doc = "CONSUMER_CORE_CTIIN0 (rw) register accessor: CTI Consumer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_core_ctiin0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_core_ctiin0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_core_ctiin0`] +module"] +#[doc(alias = "CONSUMER_CORE_CTIIN0")] +pub type ConsumerCoreCtiin0 = crate::Reg; #[doc = "CTI Consumer Register"] pub mod consumer_core_ctiin0; -#[doc = "CONSUMER_CORE_CTIIN1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_CORE_CTIIN1 = crate::Reg; +#[doc = "CONSUMER_CORE_CTIIN1 (rw) register accessor: CTI Consumer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_core_ctiin1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_core_ctiin1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_core_ctiin1`] +module"] +#[doc(alias = "CONSUMER_CORE_CTIIN1")] +pub type ConsumerCoreCtiin1 = crate::Reg; #[doc = "CTI Consumer Register"] pub mod consumer_core_ctiin1; -#[doc = "CONSUMER_CORE_CTIIN2 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_CORE_CTIIN2 = crate::Reg; +#[doc = "CONSUMER_CORE_CTIIN2 (rw) register accessor: CTI Consumer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_core_ctiin2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_core_ctiin2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_core_ctiin2`] +module"] +#[doc(alias = "CONSUMER_CORE_CTIIN2")] +pub type ConsumerCoreCtiin2 = crate::Reg; #[doc = "CTI Consumer Register"] pub mod consumer_core_ctiin2; -#[doc = "CONSUMER_CORE_CTIIN3 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_CORE_CTIIN3 = crate::Reg; +#[doc = "CONSUMER_CORE_CTIIN3 (rw) register accessor: CTI Consumer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_core_ctiin3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_core_ctiin3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_core_ctiin3`] +module"] +#[doc(alias = "CONSUMER_CORE_CTIIN3")] +pub type ConsumerCoreCtiin3 = crate::Reg; #[doc = "CTI Consumer Register"] pub mod consumer_core_ctiin3; -#[doc = "CONSUMER_CORE_M33RXEV (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_CORE_M33RXEV = crate::Reg; +#[doc = "CONSUMER_CORE_M33RXEV (rw) register accessor: M33 Consumer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_core_m33rxev::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_core_m33rxev::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_core_m33rxev`] +module"] +#[doc(alias = "CONSUMER_CORE_M33RXEV")] +pub type ConsumerCoreM33rxev = crate::Reg; #[doc = "M33 Consumer Register"] pub mod consumer_core_m33rxev; -#[doc = "CONSUMER_TIMER0_CC0 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER0_CC0 = crate::Reg; +#[doc = "CONSUMER_TIMER0_CC0 (rw) register accessor: CC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer0_cc0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer0_cc0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer0_cc0`] +module"] +#[doc(alias = "CONSUMER_TIMER0_CC0")] +pub type ConsumerTimer0Cc0 = crate::Reg; #[doc = "CC0 consumer register"] pub mod consumer_timer0_cc0; -#[doc = "CONSUMER_TIMER0_CC1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER0_CC1 = crate::Reg; +#[doc = "CONSUMER_TIMER0_CC1 (rw) register accessor: CC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer0_cc1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer0_cc1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer0_cc1`] +module"] +#[doc(alias = "CONSUMER_TIMER0_CC1")] +pub type ConsumerTimer0Cc1 = crate::Reg; #[doc = "CC1 Consumer register"] pub mod consumer_timer0_cc1; -#[doc = "CONSUMER_TIMER0_CC2 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER0_CC2 = crate::Reg; +#[doc = "CONSUMER_TIMER0_CC2 (rw) register accessor: CC2 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer0_cc2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer0_cc2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer0_cc2`] +module"] +#[doc(alias = "CONSUMER_TIMER0_CC2")] +pub type ConsumerTimer0Cc2 = crate::Reg; #[doc = "CC2 Consumer register"] pub mod consumer_timer0_cc2; -#[doc = "CONSUMER_TIMER0_DTI (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER0_DTI = crate::Reg; +#[doc = "CONSUMER_TIMER0_DTI (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer0_dti::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer0_dti::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer0_dti`] +module"] +#[doc(alias = "CONSUMER_TIMER0_DTI")] +pub type ConsumerTimer0Dti = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer0_dti; -#[doc = "CONSUMER_TIMER0_DTIFS1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER0_DTIFS1 = crate::Reg; +#[doc = "CONSUMER_TIMER0_DTIFS1 (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer0_dtifs1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer0_dtifs1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer0_dtifs1`] +module"] +#[doc(alias = "CONSUMER_TIMER0_DTIFS1")] +pub type ConsumerTimer0Dtifs1 = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer0_dtifs1; -#[doc = "CONSUMER_TIMER0_DTIFS2 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER0_DTIFS2 = crate::Reg; +#[doc = "CONSUMER_TIMER0_DTIFS2 (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer0_dtifs2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer0_dtifs2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer0_dtifs2`] +module"] +#[doc(alias = "CONSUMER_TIMER0_DTIFS2")] +pub type ConsumerTimer0Dtifs2 = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer0_dtifs2; -#[doc = "CONSUMER_TIMER1_CC0 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER1_CC0 = crate::Reg; +#[doc = "CONSUMER_TIMER1_CC0 (rw) register accessor: CC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer1_cc0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer1_cc0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer1_cc0`] +module"] +#[doc(alias = "CONSUMER_TIMER1_CC0")] +pub type ConsumerTimer1Cc0 = crate::Reg; #[doc = "CC0 consumer register"] pub mod consumer_timer1_cc0; -#[doc = "CONSUMER_TIMER1_CC1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER1_CC1 = crate::Reg; +#[doc = "CONSUMER_TIMER1_CC1 (rw) register accessor: CC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer1_cc1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer1_cc1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer1_cc1`] +module"] +#[doc(alias = "CONSUMER_TIMER1_CC1")] +pub type ConsumerTimer1Cc1 = crate::Reg; #[doc = "CC1 Consumer register"] pub mod consumer_timer1_cc1; -#[doc = "CONSUMER_TIMER1_CC2 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER1_CC2 = crate::Reg; +#[doc = "CONSUMER_TIMER1_CC2 (rw) register accessor: CC2 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer1_cc2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer1_cc2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer1_cc2`] +module"] +#[doc(alias = "CONSUMER_TIMER1_CC2")] +pub type ConsumerTimer1Cc2 = crate::Reg; #[doc = "CC2 Consumer register"] pub mod consumer_timer1_cc2; -#[doc = "CONSUMER_TIMER1_DTI (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER1_DTI = crate::Reg; +#[doc = "CONSUMER_TIMER1_DTI (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer1_dti::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer1_dti::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer1_dti`] +module"] +#[doc(alias = "CONSUMER_TIMER1_DTI")] +pub type ConsumerTimer1Dti = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer1_dti; -#[doc = "CONSUMER_TIMER1_DTIFS1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER1_DTIFS1 = crate::Reg; +#[doc = "CONSUMER_TIMER1_DTIFS1 (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer1_dtifs1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer1_dtifs1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer1_dtifs1`] +module"] +#[doc(alias = "CONSUMER_TIMER1_DTIFS1")] +pub type ConsumerTimer1Dtifs1 = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer1_dtifs1; -#[doc = "CONSUMER_TIMER1_DTIFS2 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER1_DTIFS2 = crate::Reg; +#[doc = "CONSUMER_TIMER1_DTIFS2 (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer1_dtifs2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer1_dtifs2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer1_dtifs2`] +module"] +#[doc(alias = "CONSUMER_TIMER1_DTIFS2")] +pub type ConsumerTimer1Dtifs2 = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer1_dtifs2; -#[doc = "CONSUMER_TIMER2_CC0 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER2_CC0 = crate::Reg; +#[doc = "CONSUMER_TIMER2_CC0 (rw) register accessor: CC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer2_cc0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer2_cc0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer2_cc0`] +module"] +#[doc(alias = "CONSUMER_TIMER2_CC0")] +pub type ConsumerTimer2Cc0 = crate::Reg; #[doc = "CC0 consumer register"] pub mod consumer_timer2_cc0; -#[doc = "CONSUMER_TIMER2_CC1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER2_CC1 = crate::Reg; +#[doc = "CONSUMER_TIMER2_CC1 (rw) register accessor: CC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer2_cc1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer2_cc1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer2_cc1`] +module"] +#[doc(alias = "CONSUMER_TIMER2_CC1")] +pub type ConsumerTimer2Cc1 = crate::Reg; #[doc = "CC1 Consumer register"] pub mod consumer_timer2_cc1; -#[doc = "CONSUMER_TIMER2_CC2 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER2_CC2 = crate::Reg; +#[doc = "CONSUMER_TIMER2_CC2 (rw) register accessor: CC2 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer2_cc2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer2_cc2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer2_cc2`] +module"] +#[doc(alias = "CONSUMER_TIMER2_CC2")] +pub type ConsumerTimer2Cc2 = crate::Reg; #[doc = "CC2 Consumer register"] pub mod consumer_timer2_cc2; -#[doc = "CONSUMER_TIMER2_DTI (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER2_DTI = crate::Reg; +#[doc = "CONSUMER_TIMER2_DTI (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer2_dti::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer2_dti::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer2_dti`] +module"] +#[doc(alias = "CONSUMER_TIMER2_DTI")] +pub type ConsumerTimer2Dti = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer2_dti; -#[doc = "CONSUMER_TIMER2_DTIFS1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER2_DTIFS1 = crate::Reg; +#[doc = "CONSUMER_TIMER2_DTIFS1 (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer2_dtifs1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer2_dtifs1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer2_dtifs1`] +module"] +#[doc(alias = "CONSUMER_TIMER2_DTIFS1")] +pub type ConsumerTimer2Dtifs1 = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer2_dtifs1; -#[doc = "CONSUMER_TIMER2_DTIFS2 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER2_DTIFS2 = crate::Reg; +#[doc = "CONSUMER_TIMER2_DTIFS2 (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer2_dtifs2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer2_dtifs2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer2_dtifs2`] +module"] +#[doc(alias = "CONSUMER_TIMER2_DTIFS2")] +pub type ConsumerTimer2Dtifs2 = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer2_dtifs2; -#[doc = "CONSUMER_TIMER3_CC0 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER3_CC0 = crate::Reg; +#[doc = "CONSUMER_TIMER3_CC0 (rw) register accessor: CC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer3_cc0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer3_cc0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer3_cc0`] +module"] +#[doc(alias = "CONSUMER_TIMER3_CC0")] +pub type ConsumerTimer3Cc0 = crate::Reg; #[doc = "CC0 consumer register"] pub mod consumer_timer3_cc0; -#[doc = "CONSUMER_TIMER3_CC1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER3_CC1 = crate::Reg; +#[doc = "CONSUMER_TIMER3_CC1 (rw) register accessor: CC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer3_cc1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer3_cc1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer3_cc1`] +module"] +#[doc(alias = "CONSUMER_TIMER3_CC1")] +pub type ConsumerTimer3Cc1 = crate::Reg; #[doc = "CC1 Consumer register"] pub mod consumer_timer3_cc1; -#[doc = "CONSUMER_TIMER3_CC2 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER3_CC2 = crate::Reg; +#[doc = "CONSUMER_TIMER3_CC2 (rw) register accessor: CC2 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer3_cc2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer3_cc2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer3_cc2`] +module"] +#[doc(alias = "CONSUMER_TIMER3_CC2")] +pub type ConsumerTimer3Cc2 = crate::Reg; #[doc = "CC2 Consumer register"] pub mod consumer_timer3_cc2; -#[doc = "CONSUMER_TIMER3_DTI (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER3_DTI = crate::Reg; +#[doc = "CONSUMER_TIMER3_DTI (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer3_dti::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer3_dti::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer3_dti`] +module"] +#[doc(alias = "CONSUMER_TIMER3_DTI")] +pub type ConsumerTimer3Dti = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer3_dti; -#[doc = "CONSUMER_TIMER3_DTIFS1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER3_DTIFS1 = crate::Reg; +#[doc = "CONSUMER_TIMER3_DTIFS1 (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer3_dtifs1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer3_dtifs1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer3_dtifs1`] +module"] +#[doc(alias = "CONSUMER_TIMER3_DTIFS1")] +pub type ConsumerTimer3Dtifs1 = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer3_dtifs1; -#[doc = "CONSUMER_TIMER3_DTIFS2 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER3_DTIFS2 = crate::Reg; +#[doc = "CONSUMER_TIMER3_DTIFS2 (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer3_dtifs2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer3_dtifs2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer3_dtifs2`] +module"] +#[doc(alias = "CONSUMER_TIMER3_DTIFS2")] +pub type ConsumerTimer3Dtifs2 = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer3_dtifs2; -#[doc = "CONSUMER_TIMER4_CC0 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER4_CC0 = crate::Reg; +#[doc = "CONSUMER_TIMER4_CC0 (rw) register accessor: CC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer4_cc0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer4_cc0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer4_cc0`] +module"] +#[doc(alias = "CONSUMER_TIMER4_CC0")] +pub type ConsumerTimer4Cc0 = crate::Reg; #[doc = "CC0 consumer register"] pub mod consumer_timer4_cc0; -#[doc = "CONSUMER_TIMER4_CC1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER4_CC1 = crate::Reg; +#[doc = "CONSUMER_TIMER4_CC1 (rw) register accessor: CC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer4_cc1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer4_cc1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer4_cc1`] +module"] +#[doc(alias = "CONSUMER_TIMER4_CC1")] +pub type ConsumerTimer4Cc1 = crate::Reg; #[doc = "CC1 Consumer register"] pub mod consumer_timer4_cc1; -#[doc = "CONSUMER_TIMER4_CC2 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER4_CC2 = crate::Reg; +#[doc = "CONSUMER_TIMER4_CC2 (rw) register accessor: CC2 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer4_cc2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer4_cc2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer4_cc2`] +module"] +#[doc(alias = "CONSUMER_TIMER4_CC2")] +pub type ConsumerTimer4Cc2 = crate::Reg; #[doc = "CC2 Consumer register"] pub mod consumer_timer4_cc2; -#[doc = "CONSUMER_TIMER4_DTI (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER4_DTI = crate::Reg; +#[doc = "CONSUMER_TIMER4_DTI (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer4_dti::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer4_dti::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer4_dti`] +module"] +#[doc(alias = "CONSUMER_TIMER4_DTI")] +pub type ConsumerTimer4Dti = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer4_dti; -#[doc = "CONSUMER_TIMER4_DTIFS1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER4_DTIFS1 = crate::Reg; +#[doc = "CONSUMER_TIMER4_DTIFS1 (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer4_dtifs1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer4_dtifs1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer4_dtifs1`] +module"] +#[doc(alias = "CONSUMER_TIMER4_DTIFS1")] +pub type ConsumerTimer4Dtifs1 = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer4_dtifs1; -#[doc = "CONSUMER_TIMER4_DTIFS2 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER4_DTIFS2 = crate::Reg; +#[doc = "CONSUMER_TIMER4_DTIFS2 (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer4_dtifs2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer4_dtifs2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer4_dtifs2`] +module"] +#[doc(alias = "CONSUMER_TIMER4_DTIFS2")] +pub type ConsumerTimer4Dtifs2 = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer4_dtifs2; -#[doc = "CONSUMER_USART0_CLK (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_USART0_CLK = crate::Reg; +#[doc = "CONSUMER_USART0_CLK (rw) register accessor: CLK consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_usart0_clk::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_usart0_clk::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_usart0_clk`] +module"] +#[doc(alias = "CONSUMER_USART0_CLK")] +pub type ConsumerUsart0Clk = crate::Reg; #[doc = "CLK consumer register"] pub mod consumer_usart0_clk; -#[doc = "CONSUMER_USART0_IR (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_USART0_IR = crate::Reg; +#[doc = "CONSUMER_USART0_IR (rw) register accessor: IR Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_usart0_ir::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_usart0_ir::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_usart0_ir`] +module"] +#[doc(alias = "CONSUMER_USART0_IR")] +pub type ConsumerUsart0Ir = crate::Reg; #[doc = "IR Consumer register"] pub mod consumer_usart0_ir; -#[doc = "CONSUMER_USART0_RX (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_USART0_RX = crate::Reg; +#[doc = "CONSUMER_USART0_RX (rw) register accessor: RX Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_usart0_rx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_usart0_rx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_usart0_rx`] +module"] +#[doc(alias = "CONSUMER_USART0_RX")] +pub type ConsumerUsart0Rx = crate::Reg; #[doc = "RX Consumer register"] pub mod consumer_usart0_rx; -#[doc = "CONSUMER_USART0_TRIGGER (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_USART0_TRIGGER = - crate::Reg; +#[doc = "CONSUMER_USART0_TRIGGER (rw) register accessor: TRIGGER Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_usart0_trigger::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_usart0_trigger::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_usart0_trigger`] +module"] +#[doc(alias = "CONSUMER_USART0_TRIGGER")] +pub type ConsumerUsart0Trigger = crate::Reg; #[doc = "TRIGGER Consumer register"] pub mod consumer_usart0_trigger; -#[doc = "CONSUMER_VDAC0_ASYNCTRIGCH0 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_VDAC0_ASYNCTRIGCH0 = - crate::Reg; +#[doc = "CONSUMER_VDAC0_ASYNCTRIGCH0 (rw) register accessor: ASYNCTRIG consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_vdac0_asynctrigch0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_vdac0_asynctrigch0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_vdac0_asynctrigch0`] +module"] +#[doc(alias = "CONSUMER_VDAC0_ASYNCTRIGCH0")] +pub type ConsumerVdac0Asynctrigch0 = + crate::Reg; #[doc = "ASYNCTRIG consumer register"] pub mod consumer_vdac0_asynctrigch0; -#[doc = "CONSUMER_VDAC0_ASYNCTRIGCH1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_VDAC0_ASYNCTRIGCH1 = - crate::Reg; +#[doc = "CONSUMER_VDAC0_ASYNCTRIGCH1 (rw) register accessor: ASYNCTRIG Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_vdac0_asynctrigch1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_vdac0_asynctrigch1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_vdac0_asynctrigch1`] +module"] +#[doc(alias = "CONSUMER_VDAC0_ASYNCTRIGCH1")] +pub type ConsumerVdac0Asynctrigch1 = + crate::Reg; #[doc = "ASYNCTRIG Consumer register"] pub mod consumer_vdac0_asynctrigch1; -#[doc = "CONSUMER_VDAC0_SYNCTRIGCH0 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_VDAC0_SYNCTRIGCH0 = - crate::Reg; +#[doc = "CONSUMER_VDAC0_SYNCTRIGCH0 (rw) register accessor: SYNCTRIG Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_vdac0_synctrigch0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_vdac0_synctrigch0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_vdac0_synctrigch0`] +module"] +#[doc(alias = "CONSUMER_VDAC0_SYNCTRIGCH0")] +pub type ConsumerVdac0Synctrigch0 = + crate::Reg; #[doc = "SYNCTRIG Consumer register"] pub mod consumer_vdac0_synctrigch0; -#[doc = "CONSUMER_VDAC0_SYNCTRIGCH1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_VDAC0_SYNCTRIGCH1 = - crate::Reg; +#[doc = "CONSUMER_VDAC0_SYNCTRIGCH1 (rw) register accessor: SYNCTRIG Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_vdac0_synctrigch1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_vdac0_synctrigch1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_vdac0_synctrigch1`] +module"] +#[doc(alias = "CONSUMER_VDAC0_SYNCTRIGCH1")] +pub type ConsumerVdac0Synctrigch1 = + crate::Reg; #[doc = "SYNCTRIG Consumer register"] pub mod consumer_vdac0_synctrigch1; -#[doc = "CONSUMER_WDOG0_SRC0 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_WDOG0_SRC0 = crate::Reg; +#[doc = "CONSUMER_WDOG0_SRC0 (rw) register accessor: SRC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_wdog0_src0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_wdog0_src0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_wdog0_src0`] +module"] +#[doc(alias = "CONSUMER_WDOG0_SRC0")] +pub type ConsumerWdog0Src0 = crate::Reg; #[doc = "SRC0 consumer register"] pub mod consumer_wdog0_src0; -#[doc = "CONSUMER_WDOG0_SRC1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_WDOG0_SRC1 = crate::Reg; +#[doc = "CONSUMER_WDOG0_SRC1 (rw) register accessor: SRC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_wdog0_src1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_wdog0_src1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_wdog0_src1`] +module"] +#[doc(alias = "CONSUMER_WDOG0_SRC1")] +pub type ConsumerWdog0Src1 = crate::Reg; #[doc = "SRC1 Consumer register"] pub mod consumer_wdog0_src1; -#[doc = "CONSUMER_WDOG1_SRC0 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_WDOG1_SRC0 = crate::Reg; +#[doc = "CONSUMER_WDOG1_SRC0 (rw) register accessor: SRC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_wdog1_src0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_wdog1_src0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_wdog1_src0`] +module"] +#[doc(alias = "CONSUMER_WDOG1_SRC0")] +pub type ConsumerWdog1Src0 = crate::Reg; #[doc = "SRC0 consumer register"] pub mod consumer_wdog1_src0; -#[doc = "CONSUMER_WDOG1_SRC1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_WDOG1_SRC1 = crate::Reg; +#[doc = "CONSUMER_WDOG1_SRC1 (rw) register accessor: SRC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_wdog1_src1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_wdog1_src1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_wdog1_src1`] +module"] +#[doc(alias = "CONSUMER_WDOG1_SRC1")] +pub type ConsumerWdog1Src1 = crate::Reg; #[doc = "SRC1 Consumer register"] pub mod consumer_wdog1_src1; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch0_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch0_ctrl.rs index 8f6dddf..3e705eb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch0_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch0_ctrl.rs @@ -1,393 +1,366 @@ #[doc = "Register `ASYNC_CH0_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ASYNC_CH0_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH0_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH0_CTRL_SPEC, u8, u8, 7, O>; -#[doc = "Field `FNSEL` reader - Function Select"] -pub type FNSEL_R = crate::FieldReader; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Function Select\n\nValue on reset: 12"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FNSEL_A { +pub enum Fnsel { #[doc = "0: Logical 0"] - LOGICAL_ZERO = 0, + LogicalZero = 0, #[doc = "1: A NOR B"] - A_NOR_B = 1, + ANorB = 1, #[doc = "2: (!A) AND B"] - NOT_A_AND_B = 2, + NotAAndB = 2, #[doc = "3: !A"] - NOT_A = 3, + NotA = 3, #[doc = "4: A AND (!B)"] - A_AND_NOT_B = 4, + AAndNotB = 4, #[doc = "5: !B"] - NOT_B = 5, + NotB = 5, #[doc = "6: A XOR B"] - A_XOR_B = 6, + AXorB = 6, #[doc = "7: A NAND B"] - A_NAND_B = 7, + ANandB = 7, #[doc = "8: A AND B"] - A_AND_B = 8, + AAndB = 8, #[doc = "9: A XNOR B"] - A_XNOR_B = 9, + AXnorB = 9, #[doc = "10: B"] B = 10, #[doc = "11: (!A) OR B"] - NOT_A_OR_B = 11, + NotAOrB = 11, #[doc = "12: A"] A = 12, #[doc = "13: A OR (!B)"] - A_OR_NOT_B = 13, + AOrNotB = 13, #[doc = "14: A OR B"] - A_OR_B = 14, + AOrB = 14, #[doc = "15: Logical 1"] - LOGICAL_ONE = 15, + LogicalOne = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FNSEL_A) -> Self { + fn from(variant: Fnsel) -> Self { variant as _ } } -impl FNSEL_R { +impl crate::FieldSpec for Fnsel { + type Ux = u8; +} +impl crate::IsEnum for Fnsel {} +#[doc = "Field `FNSEL` reader - Function Select"] +pub type FnselR = crate::FieldReader; +impl FnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FNSEL_A { + pub const fn variant(&self) -> Fnsel { match self.bits { - 0 => FNSEL_A::LOGICAL_ZERO, - 1 => FNSEL_A::A_NOR_B, - 2 => FNSEL_A::NOT_A_AND_B, - 3 => FNSEL_A::NOT_A, - 4 => FNSEL_A::A_AND_NOT_B, - 5 => FNSEL_A::NOT_B, - 6 => FNSEL_A::A_XOR_B, - 7 => FNSEL_A::A_NAND_B, - 8 => FNSEL_A::A_AND_B, - 9 => FNSEL_A::A_XNOR_B, - 10 => FNSEL_A::B, - 11 => FNSEL_A::NOT_A_OR_B, - 12 => FNSEL_A::A, - 13 => FNSEL_A::A_OR_NOT_B, - 14 => FNSEL_A::A_OR_B, - 15 => FNSEL_A::LOGICAL_ONE, + 0 => Fnsel::LogicalZero, + 1 => Fnsel::ANorB, + 2 => Fnsel::NotAAndB, + 3 => Fnsel::NotA, + 4 => Fnsel::AAndNotB, + 5 => Fnsel::NotB, + 6 => Fnsel::AXorB, + 7 => Fnsel::ANandB, + 8 => Fnsel::AAndB, + 9 => Fnsel::AXnorB, + 10 => Fnsel::B, + 11 => Fnsel::NotAOrB, + 12 => Fnsel::A, + 13 => Fnsel::AOrNotB, + 14 => Fnsel::AOrB, + 15 => Fnsel::LogicalOne, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LOGICAL_ZERO`"] + #[doc = "Logical 0"] #[inline(always)] pub fn is_logical_zero(&self) -> bool { - *self == FNSEL_A::LOGICAL_ZERO + *self == Fnsel::LogicalZero } - #[doc = "Checks if the value of the field is `A_NOR_B`"] + #[doc = "A NOR B"] #[inline(always)] pub fn is_a_nor_b(&self) -> bool { - *self == FNSEL_A::A_NOR_B + *self == Fnsel::ANorB } - #[doc = "Checks if the value of the field is `NOT_A_AND_B`"] + #[doc = "(!A) AND B"] #[inline(always)] pub fn is_not_a_and_b(&self) -> bool { - *self == FNSEL_A::NOT_A_AND_B + *self == Fnsel::NotAAndB } - #[doc = "Checks if the value of the field is `NOT_A`"] + #[doc = "!A"] #[inline(always)] pub fn is_not_a(&self) -> bool { - *self == FNSEL_A::NOT_A + *self == Fnsel::NotA } - #[doc = "Checks if the value of the field is `A_AND_NOT_B`"] + #[doc = "A AND (!B)"] #[inline(always)] pub fn is_a_and_not_b(&self) -> bool { - *self == FNSEL_A::A_AND_NOT_B + *self == Fnsel::AAndNotB } - #[doc = "Checks if the value of the field is `NOT_B`"] + #[doc = "!B"] #[inline(always)] pub fn is_not_b(&self) -> bool { - *self == FNSEL_A::NOT_B + *self == Fnsel::NotB } - #[doc = "Checks if the value of the field is `A_XOR_B`"] + #[doc = "A XOR B"] #[inline(always)] pub fn is_a_xor_b(&self) -> bool { - *self == FNSEL_A::A_XOR_B + *self == Fnsel::AXorB } - #[doc = "Checks if the value of the field is `A_NAND_B`"] + #[doc = "A NAND B"] #[inline(always)] pub fn is_a_nand_b(&self) -> bool { - *self == FNSEL_A::A_NAND_B + *self == Fnsel::ANandB } - #[doc = "Checks if the value of the field is `A_AND_B`"] + #[doc = "A AND B"] #[inline(always)] pub fn is_a_and_b(&self) -> bool { - *self == FNSEL_A::A_AND_B + *self == Fnsel::AAndB } - #[doc = "Checks if the value of the field is `A_XNOR_B`"] + #[doc = "A XNOR B"] #[inline(always)] pub fn is_a_xnor_b(&self) -> bool { - *self == FNSEL_A::A_XNOR_B + *self == Fnsel::AXnorB } - #[doc = "Checks if the value of the field is `B`"] + #[doc = "B"] #[inline(always)] pub fn is_b(&self) -> bool { - *self == FNSEL_A::B + *self == Fnsel::B } - #[doc = "Checks if the value of the field is `NOT_A_OR_B`"] + #[doc = "(!A) OR B"] #[inline(always)] pub fn is_not_a_or_b(&self) -> bool { - *self == FNSEL_A::NOT_A_OR_B + *self == Fnsel::NotAOrB } - #[doc = "Checks if the value of the field is `A`"] + #[doc = "A"] #[inline(always)] pub fn is_a(&self) -> bool { - *self == FNSEL_A::A + *self == Fnsel::A } - #[doc = "Checks if the value of the field is `A_OR_NOT_B`"] + #[doc = "A OR (!B)"] #[inline(always)] pub fn is_a_or_not_b(&self) -> bool { - *self == FNSEL_A::A_OR_NOT_B + *self == Fnsel::AOrNotB } - #[doc = "Checks if the value of the field is `A_OR_B`"] + #[doc = "A OR B"] #[inline(always)] pub fn is_a_or_b(&self) -> bool { - *self == FNSEL_A::A_OR_B + *self == Fnsel::AOrB } - #[doc = "Checks if the value of the field is `LOGICAL_ONE`"] + #[doc = "Logical 1"] #[inline(always)] pub fn is_logical_one(&self) -> bool { - *self == FNSEL_A::LOGICAL_ONE + *self == Fnsel::LogicalOne } } #[doc = "Field `FNSEL` writer - Function Select"] -pub type FNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, ASYNC_CH0_CTRL_SPEC, u8, FNSEL_A, 4, O>; -impl<'a, const O: u8> FNSEL_W<'a, O> { +pub type FnselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Fnsel, crate::Safe>; +impl<'a, REG> FnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Logical 0"] #[inline(always)] - pub fn logical_zero(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ZERO) + pub fn logical_zero(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalZero) } #[doc = "A NOR B"] #[inline(always)] - pub fn a_nor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NOR_B) + pub fn a_nor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANorB) } #[doc = "(!A) AND B"] #[inline(always)] - pub fn not_a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_AND_B) + pub fn not_a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAAndB) } #[doc = "!A"] #[inline(always)] - pub fn not_a(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A) + pub fn not_a(self) -> &'a mut crate::W { + self.variant(Fnsel::NotA) } #[doc = "A AND (!B)"] #[inline(always)] - pub fn a_and_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_NOT_B) + pub fn a_and_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndNotB) } #[doc = "!B"] #[inline(always)] - pub fn not_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_B) + pub fn not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotB) } #[doc = "A XOR B"] #[inline(always)] - pub fn a_xor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XOR_B) + pub fn a_xor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXorB) } #[doc = "A NAND B"] #[inline(always)] - pub fn a_nand_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NAND_B) + pub fn a_nand_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANandB) } #[doc = "A AND B"] #[inline(always)] - pub fn a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_B) + pub fn a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndB) } #[doc = "A XNOR B"] #[inline(always)] - pub fn a_xnor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XNOR_B) + pub fn a_xnor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXnorB) } #[doc = "B"] #[inline(always)] - pub fn b(self) -> &'a mut W { - self.variant(FNSEL_A::B) + pub fn b(self) -> &'a mut crate::W { + self.variant(Fnsel::B) } #[doc = "(!A) OR B"] #[inline(always)] - pub fn not_a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_OR_B) + pub fn not_a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAOrB) } #[doc = "A"] #[inline(always)] - pub fn a(self) -> &'a mut W { - self.variant(FNSEL_A::A) + pub fn a(self) -> &'a mut crate::W { + self.variant(Fnsel::A) } #[doc = "A OR (!B)"] #[inline(always)] - pub fn a_or_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_NOT_B) + pub fn a_or_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrNotB) } #[doc = "A OR B"] #[inline(always)] - pub fn a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_B) + pub fn a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrB) } #[doc = "Logical 1"] #[inline(always)] - pub fn logical_one(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ONE) + pub fn logical_one(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalOne) } } #[doc = "Field `AUXSEL` reader - Aux Select"] -pub type AUXSEL_R = crate::FieldReader; +pub type AuxselR = crate::FieldReader; #[doc = "Field `AUXSEL` writer - Aux Select"] -pub type AUXSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ASYNC_CH0_CTRL_SPEC, u8, u8, 4, O>; +pub type AuxselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] - pub fn fnsel(&self) -> FNSEL_R { - FNSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fnsel(&self) -> FnselR { + FnselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] - pub fn auxsel(&self) -> AUXSEL_R { - AUXSEL_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn auxsel(&self) -> AuxselR { + AuxselR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] #[must_use] - pub fn fnsel(&mut self) -> FNSEL_W<16> { - FNSEL_W::new(self) + pub fn fnsel(&mut self) -> FnselW { + FnselW::new(self, 16) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] #[must_use] - pub fn auxsel(&mut self) -> AUXSEL_W<24> { - AUXSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn auxsel(&mut self) -> AuxselW { + AuxselW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_ch0_ctrl](index.html) module"] -pub struct ASYNC_CH0_CTRL_SPEC; -impl crate::RegisterSpec for ASYNC_CH0_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch0_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch0_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncCh0CtrlSpec; +impl crate::RegisterSpec for AsyncCh0CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_ch0_ctrl::R](R) reader structure"] -impl crate::Readable for ASYNC_CH0_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [async_ch0_ctrl::W](W) writer structure"] -impl crate::Writable for ASYNC_CH0_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`async_ch0_ctrl::R`](R) reader structure"] +impl crate::Readable for AsyncCh0CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`async_ch0_ctrl::W`](W) writer structure"] +impl crate::Writable for AsyncCh0CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_CH0_CTRL to value 0x000c_0000"] -impl crate::Resettable for ASYNC_CH0_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x000c_0000; +impl crate::Resettable for AsyncCh0CtrlSpec { + const RESET_VALUE: u32 = 0x000c_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch10_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch10_ctrl.rs index 3185c41..bc43760 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch10_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch10_ctrl.rs @@ -1,394 +1,366 @@ #[doc = "Register `ASYNC_CH10_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ASYNC_CH10_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH10_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH10_CTRL_SPEC, u8, u8, 7, O>; -#[doc = "Field `FNSEL` reader - Function Select"] -pub type FNSEL_R = crate::FieldReader; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Function Select\n\nValue on reset: 12"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FNSEL_A { +pub enum Fnsel { #[doc = "0: Logical 0"] - LOGICAL_ZERO = 0, + LogicalZero = 0, #[doc = "1: A NOR B"] - A_NOR_B = 1, + ANorB = 1, #[doc = "2: (!A) AND B"] - NOT_A_AND_B = 2, + NotAAndB = 2, #[doc = "3: !A"] - NOT_A = 3, + NotA = 3, #[doc = "4: A AND (!B)"] - A_AND_NOT_B = 4, + AAndNotB = 4, #[doc = "5: !B"] - NOT_B = 5, + NotB = 5, #[doc = "6: A XOR B"] - A_XOR_B = 6, + AXorB = 6, #[doc = "7: A NAND B"] - A_NAND_B = 7, + ANandB = 7, #[doc = "8: A AND B"] - A_AND_B = 8, + AAndB = 8, #[doc = "9: A XNOR B"] - A_XNOR_B = 9, + AXnorB = 9, #[doc = "10: B"] B = 10, #[doc = "11: (!A) OR B"] - NOT_A_OR_B = 11, + NotAOrB = 11, #[doc = "12: A"] A = 12, #[doc = "13: A OR (!B)"] - A_OR_NOT_B = 13, + AOrNotB = 13, #[doc = "14: A OR B"] - A_OR_B = 14, + AOrB = 14, #[doc = "15: Logical 1"] - LOGICAL_ONE = 15, + LogicalOne = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FNSEL_A) -> Self { + fn from(variant: Fnsel) -> Self { variant as _ } } -impl FNSEL_R { +impl crate::FieldSpec for Fnsel { + type Ux = u8; +} +impl crate::IsEnum for Fnsel {} +#[doc = "Field `FNSEL` reader - Function Select"] +pub type FnselR = crate::FieldReader; +impl FnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FNSEL_A { + pub const fn variant(&self) -> Fnsel { match self.bits { - 0 => FNSEL_A::LOGICAL_ZERO, - 1 => FNSEL_A::A_NOR_B, - 2 => FNSEL_A::NOT_A_AND_B, - 3 => FNSEL_A::NOT_A, - 4 => FNSEL_A::A_AND_NOT_B, - 5 => FNSEL_A::NOT_B, - 6 => FNSEL_A::A_XOR_B, - 7 => FNSEL_A::A_NAND_B, - 8 => FNSEL_A::A_AND_B, - 9 => FNSEL_A::A_XNOR_B, - 10 => FNSEL_A::B, - 11 => FNSEL_A::NOT_A_OR_B, - 12 => FNSEL_A::A, - 13 => FNSEL_A::A_OR_NOT_B, - 14 => FNSEL_A::A_OR_B, - 15 => FNSEL_A::LOGICAL_ONE, + 0 => Fnsel::LogicalZero, + 1 => Fnsel::ANorB, + 2 => Fnsel::NotAAndB, + 3 => Fnsel::NotA, + 4 => Fnsel::AAndNotB, + 5 => Fnsel::NotB, + 6 => Fnsel::AXorB, + 7 => Fnsel::ANandB, + 8 => Fnsel::AAndB, + 9 => Fnsel::AXnorB, + 10 => Fnsel::B, + 11 => Fnsel::NotAOrB, + 12 => Fnsel::A, + 13 => Fnsel::AOrNotB, + 14 => Fnsel::AOrB, + 15 => Fnsel::LogicalOne, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LOGICAL_ZERO`"] + #[doc = "Logical 0"] #[inline(always)] pub fn is_logical_zero(&self) -> bool { - *self == FNSEL_A::LOGICAL_ZERO + *self == Fnsel::LogicalZero } - #[doc = "Checks if the value of the field is `A_NOR_B`"] + #[doc = "A NOR B"] #[inline(always)] pub fn is_a_nor_b(&self) -> bool { - *self == FNSEL_A::A_NOR_B + *self == Fnsel::ANorB } - #[doc = "Checks if the value of the field is `NOT_A_AND_B`"] + #[doc = "(!A) AND B"] #[inline(always)] pub fn is_not_a_and_b(&self) -> bool { - *self == FNSEL_A::NOT_A_AND_B + *self == Fnsel::NotAAndB } - #[doc = "Checks if the value of the field is `NOT_A`"] + #[doc = "!A"] #[inline(always)] pub fn is_not_a(&self) -> bool { - *self == FNSEL_A::NOT_A + *self == Fnsel::NotA } - #[doc = "Checks if the value of the field is `A_AND_NOT_B`"] + #[doc = "A AND (!B)"] #[inline(always)] pub fn is_a_and_not_b(&self) -> bool { - *self == FNSEL_A::A_AND_NOT_B + *self == Fnsel::AAndNotB } - #[doc = "Checks if the value of the field is `NOT_B`"] + #[doc = "!B"] #[inline(always)] pub fn is_not_b(&self) -> bool { - *self == FNSEL_A::NOT_B + *self == Fnsel::NotB } - #[doc = "Checks if the value of the field is `A_XOR_B`"] + #[doc = "A XOR B"] #[inline(always)] pub fn is_a_xor_b(&self) -> bool { - *self == FNSEL_A::A_XOR_B + *self == Fnsel::AXorB } - #[doc = "Checks if the value of the field is `A_NAND_B`"] + #[doc = "A NAND B"] #[inline(always)] pub fn is_a_nand_b(&self) -> bool { - *self == FNSEL_A::A_NAND_B + *self == Fnsel::ANandB } - #[doc = "Checks if the value of the field is `A_AND_B`"] + #[doc = "A AND B"] #[inline(always)] pub fn is_a_and_b(&self) -> bool { - *self == FNSEL_A::A_AND_B + *self == Fnsel::AAndB } - #[doc = "Checks if the value of the field is `A_XNOR_B`"] + #[doc = "A XNOR B"] #[inline(always)] pub fn is_a_xnor_b(&self) -> bool { - *self == FNSEL_A::A_XNOR_B + *self == Fnsel::AXnorB } - #[doc = "Checks if the value of the field is `B`"] + #[doc = "B"] #[inline(always)] pub fn is_b(&self) -> bool { - *self == FNSEL_A::B + *self == Fnsel::B } - #[doc = "Checks if the value of the field is `NOT_A_OR_B`"] + #[doc = "(!A) OR B"] #[inline(always)] pub fn is_not_a_or_b(&self) -> bool { - *self == FNSEL_A::NOT_A_OR_B + *self == Fnsel::NotAOrB } - #[doc = "Checks if the value of the field is `A`"] + #[doc = "A"] #[inline(always)] pub fn is_a(&self) -> bool { - *self == FNSEL_A::A + *self == Fnsel::A } - #[doc = "Checks if the value of the field is `A_OR_NOT_B`"] + #[doc = "A OR (!B)"] #[inline(always)] pub fn is_a_or_not_b(&self) -> bool { - *self == FNSEL_A::A_OR_NOT_B + *self == Fnsel::AOrNotB } - #[doc = "Checks if the value of the field is `A_OR_B`"] + #[doc = "A OR B"] #[inline(always)] pub fn is_a_or_b(&self) -> bool { - *self == FNSEL_A::A_OR_B + *self == Fnsel::AOrB } - #[doc = "Checks if the value of the field is `LOGICAL_ONE`"] + #[doc = "Logical 1"] #[inline(always)] pub fn is_logical_one(&self) -> bool { - *self == FNSEL_A::LOGICAL_ONE + *self == Fnsel::LogicalOne } } #[doc = "Field `FNSEL` writer - Function Select"] -pub type FNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, ASYNC_CH10_CTRL_SPEC, u8, FNSEL_A, 4, O>; -impl<'a, const O: u8> FNSEL_W<'a, O> { +pub type FnselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Fnsel, crate::Safe>; +impl<'a, REG> FnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Logical 0"] #[inline(always)] - pub fn logical_zero(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ZERO) + pub fn logical_zero(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalZero) } #[doc = "A NOR B"] #[inline(always)] - pub fn a_nor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NOR_B) + pub fn a_nor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANorB) } #[doc = "(!A) AND B"] #[inline(always)] - pub fn not_a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_AND_B) + pub fn not_a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAAndB) } #[doc = "!A"] #[inline(always)] - pub fn not_a(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A) + pub fn not_a(self) -> &'a mut crate::W { + self.variant(Fnsel::NotA) } #[doc = "A AND (!B)"] #[inline(always)] - pub fn a_and_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_NOT_B) + pub fn a_and_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndNotB) } #[doc = "!B"] #[inline(always)] - pub fn not_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_B) + pub fn not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotB) } #[doc = "A XOR B"] #[inline(always)] - pub fn a_xor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XOR_B) + pub fn a_xor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXorB) } #[doc = "A NAND B"] #[inline(always)] - pub fn a_nand_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NAND_B) + pub fn a_nand_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANandB) } #[doc = "A AND B"] #[inline(always)] - pub fn a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_B) + pub fn a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndB) } #[doc = "A XNOR B"] #[inline(always)] - pub fn a_xnor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XNOR_B) + pub fn a_xnor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXnorB) } #[doc = "B"] #[inline(always)] - pub fn b(self) -> &'a mut W { - self.variant(FNSEL_A::B) + pub fn b(self) -> &'a mut crate::W { + self.variant(Fnsel::B) } #[doc = "(!A) OR B"] #[inline(always)] - pub fn not_a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_OR_B) + pub fn not_a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAOrB) } #[doc = "A"] #[inline(always)] - pub fn a(self) -> &'a mut W { - self.variant(FNSEL_A::A) + pub fn a(self) -> &'a mut crate::W { + self.variant(Fnsel::A) } #[doc = "A OR (!B)"] #[inline(always)] - pub fn a_or_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_NOT_B) + pub fn a_or_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrNotB) } #[doc = "A OR B"] #[inline(always)] - pub fn a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_B) + pub fn a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrB) } #[doc = "Logical 1"] #[inline(always)] - pub fn logical_one(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ONE) + pub fn logical_one(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalOne) } } #[doc = "Field `AUXSEL` reader - Aux Select"] -pub type AUXSEL_R = crate::FieldReader; +pub type AuxselR = crate::FieldReader; #[doc = "Field `AUXSEL` writer - Aux Select"] -pub type AUXSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH10_CTRL_SPEC, u8, u8, 4, O>; +pub type AuxselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] - pub fn fnsel(&self) -> FNSEL_R { - FNSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fnsel(&self) -> FnselR { + FnselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] - pub fn auxsel(&self) -> AUXSEL_R { - AUXSEL_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn auxsel(&self) -> AuxselR { + AuxselR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] #[must_use] - pub fn fnsel(&mut self) -> FNSEL_W<16> { - FNSEL_W::new(self) + pub fn fnsel(&mut self) -> FnselW { + FnselW::new(self, 16) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] #[must_use] - pub fn auxsel(&mut self) -> AUXSEL_W<24> { - AUXSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn auxsel(&mut self) -> AuxselW { + AuxselW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_ch10_ctrl](index.html) module"] -pub struct ASYNC_CH10_CTRL_SPEC; -impl crate::RegisterSpec for ASYNC_CH10_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch10_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch10_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncCh10CtrlSpec; +impl crate::RegisterSpec for AsyncCh10CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_ch10_ctrl::R](R) reader structure"] -impl crate::Readable for ASYNC_CH10_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [async_ch10_ctrl::W](W) writer structure"] -impl crate::Writable for ASYNC_CH10_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`async_ch10_ctrl::R`](R) reader structure"] +impl crate::Readable for AsyncCh10CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`async_ch10_ctrl::W`](W) writer structure"] +impl crate::Writable for AsyncCh10CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_CH10_CTRL to value 0x000c_0000"] -impl crate::Resettable for ASYNC_CH10_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x000c_0000; +impl crate::Resettable for AsyncCh10CtrlSpec { + const RESET_VALUE: u32 = 0x000c_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch11_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch11_ctrl.rs index e9bb400..35990df 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch11_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch11_ctrl.rs @@ -1,394 +1,366 @@ #[doc = "Register `ASYNC_CH11_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ASYNC_CH11_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH11_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH11_CTRL_SPEC, u8, u8, 7, O>; -#[doc = "Field `FNSEL` reader - Function Select"] -pub type FNSEL_R = crate::FieldReader; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Function Select\n\nValue on reset: 12"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FNSEL_A { +pub enum Fnsel { #[doc = "0: Logical 0"] - LOGICAL_ZERO = 0, + LogicalZero = 0, #[doc = "1: A NOR B"] - A_NOR_B = 1, + ANorB = 1, #[doc = "2: (!A) AND B"] - NOT_A_AND_B = 2, + NotAAndB = 2, #[doc = "3: !A"] - NOT_A = 3, + NotA = 3, #[doc = "4: A AND (!B)"] - A_AND_NOT_B = 4, + AAndNotB = 4, #[doc = "5: !B"] - NOT_B = 5, + NotB = 5, #[doc = "6: A XOR B"] - A_XOR_B = 6, + AXorB = 6, #[doc = "7: A NAND B"] - A_NAND_B = 7, + ANandB = 7, #[doc = "8: A AND B"] - A_AND_B = 8, + AAndB = 8, #[doc = "9: A XNOR B"] - A_XNOR_B = 9, + AXnorB = 9, #[doc = "10: B"] B = 10, #[doc = "11: (!A) OR B"] - NOT_A_OR_B = 11, + NotAOrB = 11, #[doc = "12: A"] A = 12, #[doc = "13: A OR (!B)"] - A_OR_NOT_B = 13, + AOrNotB = 13, #[doc = "14: A OR B"] - A_OR_B = 14, + AOrB = 14, #[doc = "15: Logical 1"] - LOGICAL_ONE = 15, + LogicalOne = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FNSEL_A) -> Self { + fn from(variant: Fnsel) -> Self { variant as _ } } -impl FNSEL_R { +impl crate::FieldSpec for Fnsel { + type Ux = u8; +} +impl crate::IsEnum for Fnsel {} +#[doc = "Field `FNSEL` reader - Function Select"] +pub type FnselR = crate::FieldReader; +impl FnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FNSEL_A { + pub const fn variant(&self) -> Fnsel { match self.bits { - 0 => FNSEL_A::LOGICAL_ZERO, - 1 => FNSEL_A::A_NOR_B, - 2 => FNSEL_A::NOT_A_AND_B, - 3 => FNSEL_A::NOT_A, - 4 => FNSEL_A::A_AND_NOT_B, - 5 => FNSEL_A::NOT_B, - 6 => FNSEL_A::A_XOR_B, - 7 => FNSEL_A::A_NAND_B, - 8 => FNSEL_A::A_AND_B, - 9 => FNSEL_A::A_XNOR_B, - 10 => FNSEL_A::B, - 11 => FNSEL_A::NOT_A_OR_B, - 12 => FNSEL_A::A, - 13 => FNSEL_A::A_OR_NOT_B, - 14 => FNSEL_A::A_OR_B, - 15 => FNSEL_A::LOGICAL_ONE, + 0 => Fnsel::LogicalZero, + 1 => Fnsel::ANorB, + 2 => Fnsel::NotAAndB, + 3 => Fnsel::NotA, + 4 => Fnsel::AAndNotB, + 5 => Fnsel::NotB, + 6 => Fnsel::AXorB, + 7 => Fnsel::ANandB, + 8 => Fnsel::AAndB, + 9 => Fnsel::AXnorB, + 10 => Fnsel::B, + 11 => Fnsel::NotAOrB, + 12 => Fnsel::A, + 13 => Fnsel::AOrNotB, + 14 => Fnsel::AOrB, + 15 => Fnsel::LogicalOne, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LOGICAL_ZERO`"] + #[doc = "Logical 0"] #[inline(always)] pub fn is_logical_zero(&self) -> bool { - *self == FNSEL_A::LOGICAL_ZERO + *self == Fnsel::LogicalZero } - #[doc = "Checks if the value of the field is `A_NOR_B`"] + #[doc = "A NOR B"] #[inline(always)] pub fn is_a_nor_b(&self) -> bool { - *self == FNSEL_A::A_NOR_B + *self == Fnsel::ANorB } - #[doc = "Checks if the value of the field is `NOT_A_AND_B`"] + #[doc = "(!A) AND B"] #[inline(always)] pub fn is_not_a_and_b(&self) -> bool { - *self == FNSEL_A::NOT_A_AND_B + *self == Fnsel::NotAAndB } - #[doc = "Checks if the value of the field is `NOT_A`"] + #[doc = "!A"] #[inline(always)] pub fn is_not_a(&self) -> bool { - *self == FNSEL_A::NOT_A + *self == Fnsel::NotA } - #[doc = "Checks if the value of the field is `A_AND_NOT_B`"] + #[doc = "A AND (!B)"] #[inline(always)] pub fn is_a_and_not_b(&self) -> bool { - *self == FNSEL_A::A_AND_NOT_B + *self == Fnsel::AAndNotB } - #[doc = "Checks if the value of the field is `NOT_B`"] + #[doc = "!B"] #[inline(always)] pub fn is_not_b(&self) -> bool { - *self == FNSEL_A::NOT_B + *self == Fnsel::NotB } - #[doc = "Checks if the value of the field is `A_XOR_B`"] + #[doc = "A XOR B"] #[inline(always)] pub fn is_a_xor_b(&self) -> bool { - *self == FNSEL_A::A_XOR_B + *self == Fnsel::AXorB } - #[doc = "Checks if the value of the field is `A_NAND_B`"] + #[doc = "A NAND B"] #[inline(always)] pub fn is_a_nand_b(&self) -> bool { - *self == FNSEL_A::A_NAND_B + *self == Fnsel::ANandB } - #[doc = "Checks if the value of the field is `A_AND_B`"] + #[doc = "A AND B"] #[inline(always)] pub fn is_a_and_b(&self) -> bool { - *self == FNSEL_A::A_AND_B + *self == Fnsel::AAndB } - #[doc = "Checks if the value of the field is `A_XNOR_B`"] + #[doc = "A XNOR B"] #[inline(always)] pub fn is_a_xnor_b(&self) -> bool { - *self == FNSEL_A::A_XNOR_B + *self == Fnsel::AXnorB } - #[doc = "Checks if the value of the field is `B`"] + #[doc = "B"] #[inline(always)] pub fn is_b(&self) -> bool { - *self == FNSEL_A::B + *self == Fnsel::B } - #[doc = "Checks if the value of the field is `NOT_A_OR_B`"] + #[doc = "(!A) OR B"] #[inline(always)] pub fn is_not_a_or_b(&self) -> bool { - *self == FNSEL_A::NOT_A_OR_B + *self == Fnsel::NotAOrB } - #[doc = "Checks if the value of the field is `A`"] + #[doc = "A"] #[inline(always)] pub fn is_a(&self) -> bool { - *self == FNSEL_A::A + *self == Fnsel::A } - #[doc = "Checks if the value of the field is `A_OR_NOT_B`"] + #[doc = "A OR (!B)"] #[inline(always)] pub fn is_a_or_not_b(&self) -> bool { - *self == FNSEL_A::A_OR_NOT_B + *self == Fnsel::AOrNotB } - #[doc = "Checks if the value of the field is `A_OR_B`"] + #[doc = "A OR B"] #[inline(always)] pub fn is_a_or_b(&self) -> bool { - *self == FNSEL_A::A_OR_B + *self == Fnsel::AOrB } - #[doc = "Checks if the value of the field is `LOGICAL_ONE`"] + #[doc = "Logical 1"] #[inline(always)] pub fn is_logical_one(&self) -> bool { - *self == FNSEL_A::LOGICAL_ONE + *self == Fnsel::LogicalOne } } #[doc = "Field `FNSEL` writer - Function Select"] -pub type FNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, ASYNC_CH11_CTRL_SPEC, u8, FNSEL_A, 4, O>; -impl<'a, const O: u8> FNSEL_W<'a, O> { +pub type FnselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Fnsel, crate::Safe>; +impl<'a, REG> FnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Logical 0"] #[inline(always)] - pub fn logical_zero(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ZERO) + pub fn logical_zero(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalZero) } #[doc = "A NOR B"] #[inline(always)] - pub fn a_nor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NOR_B) + pub fn a_nor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANorB) } #[doc = "(!A) AND B"] #[inline(always)] - pub fn not_a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_AND_B) + pub fn not_a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAAndB) } #[doc = "!A"] #[inline(always)] - pub fn not_a(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A) + pub fn not_a(self) -> &'a mut crate::W { + self.variant(Fnsel::NotA) } #[doc = "A AND (!B)"] #[inline(always)] - pub fn a_and_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_NOT_B) + pub fn a_and_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndNotB) } #[doc = "!B"] #[inline(always)] - pub fn not_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_B) + pub fn not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotB) } #[doc = "A XOR B"] #[inline(always)] - pub fn a_xor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XOR_B) + pub fn a_xor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXorB) } #[doc = "A NAND B"] #[inline(always)] - pub fn a_nand_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NAND_B) + pub fn a_nand_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANandB) } #[doc = "A AND B"] #[inline(always)] - pub fn a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_B) + pub fn a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndB) } #[doc = "A XNOR B"] #[inline(always)] - pub fn a_xnor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XNOR_B) + pub fn a_xnor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXnorB) } #[doc = "B"] #[inline(always)] - pub fn b(self) -> &'a mut W { - self.variant(FNSEL_A::B) + pub fn b(self) -> &'a mut crate::W { + self.variant(Fnsel::B) } #[doc = "(!A) OR B"] #[inline(always)] - pub fn not_a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_OR_B) + pub fn not_a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAOrB) } #[doc = "A"] #[inline(always)] - pub fn a(self) -> &'a mut W { - self.variant(FNSEL_A::A) + pub fn a(self) -> &'a mut crate::W { + self.variant(Fnsel::A) } #[doc = "A OR (!B)"] #[inline(always)] - pub fn a_or_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_NOT_B) + pub fn a_or_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrNotB) } #[doc = "A OR B"] #[inline(always)] - pub fn a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_B) + pub fn a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrB) } #[doc = "Logical 1"] #[inline(always)] - pub fn logical_one(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ONE) + pub fn logical_one(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalOne) } } #[doc = "Field `AUXSEL` reader - Aux Select"] -pub type AUXSEL_R = crate::FieldReader; +pub type AuxselR = crate::FieldReader; #[doc = "Field `AUXSEL` writer - Aux Select"] -pub type AUXSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH11_CTRL_SPEC, u8, u8, 4, O>; +pub type AuxselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] - pub fn fnsel(&self) -> FNSEL_R { - FNSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fnsel(&self) -> FnselR { + FnselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] - pub fn auxsel(&self) -> AUXSEL_R { - AUXSEL_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn auxsel(&self) -> AuxselR { + AuxselR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] #[must_use] - pub fn fnsel(&mut self) -> FNSEL_W<16> { - FNSEL_W::new(self) + pub fn fnsel(&mut self) -> FnselW { + FnselW::new(self, 16) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] #[must_use] - pub fn auxsel(&mut self) -> AUXSEL_W<24> { - AUXSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn auxsel(&mut self) -> AuxselW { + AuxselW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_ch11_ctrl](index.html) module"] -pub struct ASYNC_CH11_CTRL_SPEC; -impl crate::RegisterSpec for ASYNC_CH11_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch11_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch11_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncCh11CtrlSpec; +impl crate::RegisterSpec for AsyncCh11CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_ch11_ctrl::R](R) reader structure"] -impl crate::Readable for ASYNC_CH11_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [async_ch11_ctrl::W](W) writer structure"] -impl crate::Writable for ASYNC_CH11_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`async_ch11_ctrl::R`](R) reader structure"] +impl crate::Readable for AsyncCh11CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`async_ch11_ctrl::W`](W) writer structure"] +impl crate::Writable for AsyncCh11CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_CH11_CTRL to value 0x000c_0000"] -impl crate::Resettable for ASYNC_CH11_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x000c_0000; +impl crate::Resettable for AsyncCh11CtrlSpec { + const RESET_VALUE: u32 = 0x000c_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch1_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch1_ctrl.rs index f2c4b0f..2d14e8b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch1_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch1_ctrl.rs @@ -1,393 +1,366 @@ #[doc = "Register `ASYNC_CH1_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ASYNC_CH1_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH1_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH1_CTRL_SPEC, u8, u8, 7, O>; -#[doc = "Field `FNSEL` reader - Function Select"] -pub type FNSEL_R = crate::FieldReader; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Function Select\n\nValue on reset: 12"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FNSEL_A { +pub enum Fnsel { #[doc = "0: Logical 0"] - LOGICAL_ZERO = 0, + LogicalZero = 0, #[doc = "1: A NOR B"] - A_NOR_B = 1, + ANorB = 1, #[doc = "2: (!A) AND B"] - NOT_A_AND_B = 2, + NotAAndB = 2, #[doc = "3: !A"] - NOT_A = 3, + NotA = 3, #[doc = "4: A AND (!B)"] - A_AND_NOT_B = 4, + AAndNotB = 4, #[doc = "5: !B"] - NOT_B = 5, + NotB = 5, #[doc = "6: A XOR B"] - A_XOR_B = 6, + AXorB = 6, #[doc = "7: A NAND B"] - A_NAND_B = 7, + ANandB = 7, #[doc = "8: A AND B"] - A_AND_B = 8, + AAndB = 8, #[doc = "9: A XNOR B"] - A_XNOR_B = 9, + AXnorB = 9, #[doc = "10: B"] B = 10, #[doc = "11: (!A) OR B"] - NOT_A_OR_B = 11, + NotAOrB = 11, #[doc = "12: A"] A = 12, #[doc = "13: A OR (!B)"] - A_OR_NOT_B = 13, + AOrNotB = 13, #[doc = "14: A OR B"] - A_OR_B = 14, + AOrB = 14, #[doc = "15: Logical 1"] - LOGICAL_ONE = 15, + LogicalOne = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FNSEL_A) -> Self { + fn from(variant: Fnsel) -> Self { variant as _ } } -impl FNSEL_R { +impl crate::FieldSpec for Fnsel { + type Ux = u8; +} +impl crate::IsEnum for Fnsel {} +#[doc = "Field `FNSEL` reader - Function Select"] +pub type FnselR = crate::FieldReader; +impl FnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FNSEL_A { + pub const fn variant(&self) -> Fnsel { match self.bits { - 0 => FNSEL_A::LOGICAL_ZERO, - 1 => FNSEL_A::A_NOR_B, - 2 => FNSEL_A::NOT_A_AND_B, - 3 => FNSEL_A::NOT_A, - 4 => FNSEL_A::A_AND_NOT_B, - 5 => FNSEL_A::NOT_B, - 6 => FNSEL_A::A_XOR_B, - 7 => FNSEL_A::A_NAND_B, - 8 => FNSEL_A::A_AND_B, - 9 => FNSEL_A::A_XNOR_B, - 10 => FNSEL_A::B, - 11 => FNSEL_A::NOT_A_OR_B, - 12 => FNSEL_A::A, - 13 => FNSEL_A::A_OR_NOT_B, - 14 => FNSEL_A::A_OR_B, - 15 => FNSEL_A::LOGICAL_ONE, + 0 => Fnsel::LogicalZero, + 1 => Fnsel::ANorB, + 2 => Fnsel::NotAAndB, + 3 => Fnsel::NotA, + 4 => Fnsel::AAndNotB, + 5 => Fnsel::NotB, + 6 => Fnsel::AXorB, + 7 => Fnsel::ANandB, + 8 => Fnsel::AAndB, + 9 => Fnsel::AXnorB, + 10 => Fnsel::B, + 11 => Fnsel::NotAOrB, + 12 => Fnsel::A, + 13 => Fnsel::AOrNotB, + 14 => Fnsel::AOrB, + 15 => Fnsel::LogicalOne, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LOGICAL_ZERO`"] + #[doc = "Logical 0"] #[inline(always)] pub fn is_logical_zero(&self) -> bool { - *self == FNSEL_A::LOGICAL_ZERO + *self == Fnsel::LogicalZero } - #[doc = "Checks if the value of the field is `A_NOR_B`"] + #[doc = "A NOR B"] #[inline(always)] pub fn is_a_nor_b(&self) -> bool { - *self == FNSEL_A::A_NOR_B + *self == Fnsel::ANorB } - #[doc = "Checks if the value of the field is `NOT_A_AND_B`"] + #[doc = "(!A) AND B"] #[inline(always)] pub fn is_not_a_and_b(&self) -> bool { - *self == FNSEL_A::NOT_A_AND_B + *self == Fnsel::NotAAndB } - #[doc = "Checks if the value of the field is `NOT_A`"] + #[doc = "!A"] #[inline(always)] pub fn is_not_a(&self) -> bool { - *self == FNSEL_A::NOT_A + *self == Fnsel::NotA } - #[doc = "Checks if the value of the field is `A_AND_NOT_B`"] + #[doc = "A AND (!B)"] #[inline(always)] pub fn is_a_and_not_b(&self) -> bool { - *self == FNSEL_A::A_AND_NOT_B + *self == Fnsel::AAndNotB } - #[doc = "Checks if the value of the field is `NOT_B`"] + #[doc = "!B"] #[inline(always)] pub fn is_not_b(&self) -> bool { - *self == FNSEL_A::NOT_B + *self == Fnsel::NotB } - #[doc = "Checks if the value of the field is `A_XOR_B`"] + #[doc = "A XOR B"] #[inline(always)] pub fn is_a_xor_b(&self) -> bool { - *self == FNSEL_A::A_XOR_B + *self == Fnsel::AXorB } - #[doc = "Checks if the value of the field is `A_NAND_B`"] + #[doc = "A NAND B"] #[inline(always)] pub fn is_a_nand_b(&self) -> bool { - *self == FNSEL_A::A_NAND_B + *self == Fnsel::ANandB } - #[doc = "Checks if the value of the field is `A_AND_B`"] + #[doc = "A AND B"] #[inline(always)] pub fn is_a_and_b(&self) -> bool { - *self == FNSEL_A::A_AND_B + *self == Fnsel::AAndB } - #[doc = "Checks if the value of the field is `A_XNOR_B`"] + #[doc = "A XNOR B"] #[inline(always)] pub fn is_a_xnor_b(&self) -> bool { - *self == FNSEL_A::A_XNOR_B + *self == Fnsel::AXnorB } - #[doc = "Checks if the value of the field is `B`"] + #[doc = "B"] #[inline(always)] pub fn is_b(&self) -> bool { - *self == FNSEL_A::B + *self == Fnsel::B } - #[doc = "Checks if the value of the field is `NOT_A_OR_B`"] + #[doc = "(!A) OR B"] #[inline(always)] pub fn is_not_a_or_b(&self) -> bool { - *self == FNSEL_A::NOT_A_OR_B + *self == Fnsel::NotAOrB } - #[doc = "Checks if the value of the field is `A`"] + #[doc = "A"] #[inline(always)] pub fn is_a(&self) -> bool { - *self == FNSEL_A::A + *self == Fnsel::A } - #[doc = "Checks if the value of the field is `A_OR_NOT_B`"] + #[doc = "A OR (!B)"] #[inline(always)] pub fn is_a_or_not_b(&self) -> bool { - *self == FNSEL_A::A_OR_NOT_B + *self == Fnsel::AOrNotB } - #[doc = "Checks if the value of the field is `A_OR_B`"] + #[doc = "A OR B"] #[inline(always)] pub fn is_a_or_b(&self) -> bool { - *self == FNSEL_A::A_OR_B + *self == Fnsel::AOrB } - #[doc = "Checks if the value of the field is `LOGICAL_ONE`"] + #[doc = "Logical 1"] #[inline(always)] pub fn is_logical_one(&self) -> bool { - *self == FNSEL_A::LOGICAL_ONE + *self == Fnsel::LogicalOne } } #[doc = "Field `FNSEL` writer - Function Select"] -pub type FNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, ASYNC_CH1_CTRL_SPEC, u8, FNSEL_A, 4, O>; -impl<'a, const O: u8> FNSEL_W<'a, O> { +pub type FnselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Fnsel, crate::Safe>; +impl<'a, REG> FnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Logical 0"] #[inline(always)] - pub fn logical_zero(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ZERO) + pub fn logical_zero(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalZero) } #[doc = "A NOR B"] #[inline(always)] - pub fn a_nor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NOR_B) + pub fn a_nor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANorB) } #[doc = "(!A) AND B"] #[inline(always)] - pub fn not_a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_AND_B) + pub fn not_a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAAndB) } #[doc = "!A"] #[inline(always)] - pub fn not_a(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A) + pub fn not_a(self) -> &'a mut crate::W { + self.variant(Fnsel::NotA) } #[doc = "A AND (!B)"] #[inline(always)] - pub fn a_and_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_NOT_B) + pub fn a_and_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndNotB) } #[doc = "!B"] #[inline(always)] - pub fn not_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_B) + pub fn not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotB) } #[doc = "A XOR B"] #[inline(always)] - pub fn a_xor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XOR_B) + pub fn a_xor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXorB) } #[doc = "A NAND B"] #[inline(always)] - pub fn a_nand_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NAND_B) + pub fn a_nand_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANandB) } #[doc = "A AND B"] #[inline(always)] - pub fn a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_B) + pub fn a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndB) } #[doc = "A XNOR B"] #[inline(always)] - pub fn a_xnor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XNOR_B) + pub fn a_xnor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXnorB) } #[doc = "B"] #[inline(always)] - pub fn b(self) -> &'a mut W { - self.variant(FNSEL_A::B) + pub fn b(self) -> &'a mut crate::W { + self.variant(Fnsel::B) } #[doc = "(!A) OR B"] #[inline(always)] - pub fn not_a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_OR_B) + pub fn not_a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAOrB) } #[doc = "A"] #[inline(always)] - pub fn a(self) -> &'a mut W { - self.variant(FNSEL_A::A) + pub fn a(self) -> &'a mut crate::W { + self.variant(Fnsel::A) } #[doc = "A OR (!B)"] #[inline(always)] - pub fn a_or_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_NOT_B) + pub fn a_or_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrNotB) } #[doc = "A OR B"] #[inline(always)] - pub fn a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_B) + pub fn a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrB) } #[doc = "Logical 1"] #[inline(always)] - pub fn logical_one(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ONE) + pub fn logical_one(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalOne) } } #[doc = "Field `AUXSEL` reader - Aux Select"] -pub type AUXSEL_R = crate::FieldReader; +pub type AuxselR = crate::FieldReader; #[doc = "Field `AUXSEL` writer - Aux Select"] -pub type AUXSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ASYNC_CH1_CTRL_SPEC, u8, u8, 4, O>; +pub type AuxselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] - pub fn fnsel(&self) -> FNSEL_R { - FNSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fnsel(&self) -> FnselR { + FnselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] - pub fn auxsel(&self) -> AUXSEL_R { - AUXSEL_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn auxsel(&self) -> AuxselR { + AuxselR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] #[must_use] - pub fn fnsel(&mut self) -> FNSEL_W<16> { - FNSEL_W::new(self) + pub fn fnsel(&mut self) -> FnselW { + FnselW::new(self, 16) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] #[must_use] - pub fn auxsel(&mut self) -> AUXSEL_W<24> { - AUXSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn auxsel(&mut self) -> AuxselW { + AuxselW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_ch1_ctrl](index.html) module"] -pub struct ASYNC_CH1_CTRL_SPEC; -impl crate::RegisterSpec for ASYNC_CH1_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch1_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch1_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncCh1CtrlSpec; +impl crate::RegisterSpec for AsyncCh1CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_ch1_ctrl::R](R) reader structure"] -impl crate::Readable for ASYNC_CH1_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [async_ch1_ctrl::W](W) writer structure"] -impl crate::Writable for ASYNC_CH1_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`async_ch1_ctrl::R`](R) reader structure"] +impl crate::Readable for AsyncCh1CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`async_ch1_ctrl::W`](W) writer structure"] +impl crate::Writable for AsyncCh1CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_CH1_CTRL to value 0x000c_0000"] -impl crate::Resettable for ASYNC_CH1_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x000c_0000; +impl crate::Resettable for AsyncCh1CtrlSpec { + const RESET_VALUE: u32 = 0x000c_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch2_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch2_ctrl.rs index 9d8a036..61f81fa 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch2_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch2_ctrl.rs @@ -1,393 +1,366 @@ #[doc = "Register `ASYNC_CH2_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ASYNC_CH2_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH2_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH2_CTRL_SPEC, u8, u8, 7, O>; -#[doc = "Field `FNSEL` reader - Function Select"] -pub type FNSEL_R = crate::FieldReader; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Function Select\n\nValue on reset: 12"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FNSEL_A { +pub enum Fnsel { #[doc = "0: Logical 0"] - LOGICAL_ZERO = 0, + LogicalZero = 0, #[doc = "1: A NOR B"] - A_NOR_B = 1, + ANorB = 1, #[doc = "2: (!A) AND B"] - NOT_A_AND_B = 2, + NotAAndB = 2, #[doc = "3: !A"] - NOT_A = 3, + NotA = 3, #[doc = "4: A AND (!B)"] - A_AND_NOT_B = 4, + AAndNotB = 4, #[doc = "5: !B"] - NOT_B = 5, + NotB = 5, #[doc = "6: A XOR B"] - A_XOR_B = 6, + AXorB = 6, #[doc = "7: A NAND B"] - A_NAND_B = 7, + ANandB = 7, #[doc = "8: A AND B"] - A_AND_B = 8, + AAndB = 8, #[doc = "9: A XNOR B"] - A_XNOR_B = 9, + AXnorB = 9, #[doc = "10: B"] B = 10, #[doc = "11: (!A) OR B"] - NOT_A_OR_B = 11, + NotAOrB = 11, #[doc = "12: A"] A = 12, #[doc = "13: A OR (!B)"] - A_OR_NOT_B = 13, + AOrNotB = 13, #[doc = "14: A OR B"] - A_OR_B = 14, + AOrB = 14, #[doc = "15: Logical 1"] - LOGICAL_ONE = 15, + LogicalOne = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FNSEL_A) -> Self { + fn from(variant: Fnsel) -> Self { variant as _ } } -impl FNSEL_R { +impl crate::FieldSpec for Fnsel { + type Ux = u8; +} +impl crate::IsEnum for Fnsel {} +#[doc = "Field `FNSEL` reader - Function Select"] +pub type FnselR = crate::FieldReader; +impl FnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FNSEL_A { + pub const fn variant(&self) -> Fnsel { match self.bits { - 0 => FNSEL_A::LOGICAL_ZERO, - 1 => FNSEL_A::A_NOR_B, - 2 => FNSEL_A::NOT_A_AND_B, - 3 => FNSEL_A::NOT_A, - 4 => FNSEL_A::A_AND_NOT_B, - 5 => FNSEL_A::NOT_B, - 6 => FNSEL_A::A_XOR_B, - 7 => FNSEL_A::A_NAND_B, - 8 => FNSEL_A::A_AND_B, - 9 => FNSEL_A::A_XNOR_B, - 10 => FNSEL_A::B, - 11 => FNSEL_A::NOT_A_OR_B, - 12 => FNSEL_A::A, - 13 => FNSEL_A::A_OR_NOT_B, - 14 => FNSEL_A::A_OR_B, - 15 => FNSEL_A::LOGICAL_ONE, + 0 => Fnsel::LogicalZero, + 1 => Fnsel::ANorB, + 2 => Fnsel::NotAAndB, + 3 => Fnsel::NotA, + 4 => Fnsel::AAndNotB, + 5 => Fnsel::NotB, + 6 => Fnsel::AXorB, + 7 => Fnsel::ANandB, + 8 => Fnsel::AAndB, + 9 => Fnsel::AXnorB, + 10 => Fnsel::B, + 11 => Fnsel::NotAOrB, + 12 => Fnsel::A, + 13 => Fnsel::AOrNotB, + 14 => Fnsel::AOrB, + 15 => Fnsel::LogicalOne, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LOGICAL_ZERO`"] + #[doc = "Logical 0"] #[inline(always)] pub fn is_logical_zero(&self) -> bool { - *self == FNSEL_A::LOGICAL_ZERO + *self == Fnsel::LogicalZero } - #[doc = "Checks if the value of the field is `A_NOR_B`"] + #[doc = "A NOR B"] #[inline(always)] pub fn is_a_nor_b(&self) -> bool { - *self == FNSEL_A::A_NOR_B + *self == Fnsel::ANorB } - #[doc = "Checks if the value of the field is `NOT_A_AND_B`"] + #[doc = "(!A) AND B"] #[inline(always)] pub fn is_not_a_and_b(&self) -> bool { - *self == FNSEL_A::NOT_A_AND_B + *self == Fnsel::NotAAndB } - #[doc = "Checks if the value of the field is `NOT_A`"] + #[doc = "!A"] #[inline(always)] pub fn is_not_a(&self) -> bool { - *self == FNSEL_A::NOT_A + *self == Fnsel::NotA } - #[doc = "Checks if the value of the field is `A_AND_NOT_B`"] + #[doc = "A AND (!B)"] #[inline(always)] pub fn is_a_and_not_b(&self) -> bool { - *self == FNSEL_A::A_AND_NOT_B + *self == Fnsel::AAndNotB } - #[doc = "Checks if the value of the field is `NOT_B`"] + #[doc = "!B"] #[inline(always)] pub fn is_not_b(&self) -> bool { - *self == FNSEL_A::NOT_B + *self == Fnsel::NotB } - #[doc = "Checks if the value of the field is `A_XOR_B`"] + #[doc = "A XOR B"] #[inline(always)] pub fn is_a_xor_b(&self) -> bool { - *self == FNSEL_A::A_XOR_B + *self == Fnsel::AXorB } - #[doc = "Checks if the value of the field is `A_NAND_B`"] + #[doc = "A NAND B"] #[inline(always)] pub fn is_a_nand_b(&self) -> bool { - *self == FNSEL_A::A_NAND_B + *self == Fnsel::ANandB } - #[doc = "Checks if the value of the field is `A_AND_B`"] + #[doc = "A AND B"] #[inline(always)] pub fn is_a_and_b(&self) -> bool { - *self == FNSEL_A::A_AND_B + *self == Fnsel::AAndB } - #[doc = "Checks if the value of the field is `A_XNOR_B`"] + #[doc = "A XNOR B"] #[inline(always)] pub fn is_a_xnor_b(&self) -> bool { - *self == FNSEL_A::A_XNOR_B + *self == Fnsel::AXnorB } - #[doc = "Checks if the value of the field is `B`"] + #[doc = "B"] #[inline(always)] pub fn is_b(&self) -> bool { - *self == FNSEL_A::B + *self == Fnsel::B } - #[doc = "Checks if the value of the field is `NOT_A_OR_B`"] + #[doc = "(!A) OR B"] #[inline(always)] pub fn is_not_a_or_b(&self) -> bool { - *self == FNSEL_A::NOT_A_OR_B + *self == Fnsel::NotAOrB } - #[doc = "Checks if the value of the field is `A`"] + #[doc = "A"] #[inline(always)] pub fn is_a(&self) -> bool { - *self == FNSEL_A::A + *self == Fnsel::A } - #[doc = "Checks if the value of the field is `A_OR_NOT_B`"] + #[doc = "A OR (!B)"] #[inline(always)] pub fn is_a_or_not_b(&self) -> bool { - *self == FNSEL_A::A_OR_NOT_B + *self == Fnsel::AOrNotB } - #[doc = "Checks if the value of the field is `A_OR_B`"] + #[doc = "A OR B"] #[inline(always)] pub fn is_a_or_b(&self) -> bool { - *self == FNSEL_A::A_OR_B + *self == Fnsel::AOrB } - #[doc = "Checks if the value of the field is `LOGICAL_ONE`"] + #[doc = "Logical 1"] #[inline(always)] pub fn is_logical_one(&self) -> bool { - *self == FNSEL_A::LOGICAL_ONE + *self == Fnsel::LogicalOne } } #[doc = "Field `FNSEL` writer - Function Select"] -pub type FNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, ASYNC_CH2_CTRL_SPEC, u8, FNSEL_A, 4, O>; -impl<'a, const O: u8> FNSEL_W<'a, O> { +pub type FnselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Fnsel, crate::Safe>; +impl<'a, REG> FnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Logical 0"] #[inline(always)] - pub fn logical_zero(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ZERO) + pub fn logical_zero(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalZero) } #[doc = "A NOR B"] #[inline(always)] - pub fn a_nor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NOR_B) + pub fn a_nor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANorB) } #[doc = "(!A) AND B"] #[inline(always)] - pub fn not_a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_AND_B) + pub fn not_a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAAndB) } #[doc = "!A"] #[inline(always)] - pub fn not_a(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A) + pub fn not_a(self) -> &'a mut crate::W { + self.variant(Fnsel::NotA) } #[doc = "A AND (!B)"] #[inline(always)] - pub fn a_and_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_NOT_B) + pub fn a_and_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndNotB) } #[doc = "!B"] #[inline(always)] - pub fn not_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_B) + pub fn not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotB) } #[doc = "A XOR B"] #[inline(always)] - pub fn a_xor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XOR_B) + pub fn a_xor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXorB) } #[doc = "A NAND B"] #[inline(always)] - pub fn a_nand_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NAND_B) + pub fn a_nand_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANandB) } #[doc = "A AND B"] #[inline(always)] - pub fn a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_B) + pub fn a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndB) } #[doc = "A XNOR B"] #[inline(always)] - pub fn a_xnor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XNOR_B) + pub fn a_xnor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXnorB) } #[doc = "B"] #[inline(always)] - pub fn b(self) -> &'a mut W { - self.variant(FNSEL_A::B) + pub fn b(self) -> &'a mut crate::W { + self.variant(Fnsel::B) } #[doc = "(!A) OR B"] #[inline(always)] - pub fn not_a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_OR_B) + pub fn not_a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAOrB) } #[doc = "A"] #[inline(always)] - pub fn a(self) -> &'a mut W { - self.variant(FNSEL_A::A) + pub fn a(self) -> &'a mut crate::W { + self.variant(Fnsel::A) } #[doc = "A OR (!B)"] #[inline(always)] - pub fn a_or_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_NOT_B) + pub fn a_or_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrNotB) } #[doc = "A OR B"] #[inline(always)] - pub fn a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_B) + pub fn a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrB) } #[doc = "Logical 1"] #[inline(always)] - pub fn logical_one(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ONE) + pub fn logical_one(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalOne) } } #[doc = "Field `AUXSEL` reader - Aux Select"] -pub type AUXSEL_R = crate::FieldReader; +pub type AuxselR = crate::FieldReader; #[doc = "Field `AUXSEL` writer - Aux Select"] -pub type AUXSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ASYNC_CH2_CTRL_SPEC, u8, u8, 4, O>; +pub type AuxselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] - pub fn fnsel(&self) -> FNSEL_R { - FNSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fnsel(&self) -> FnselR { + FnselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] - pub fn auxsel(&self) -> AUXSEL_R { - AUXSEL_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn auxsel(&self) -> AuxselR { + AuxselR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] #[must_use] - pub fn fnsel(&mut self) -> FNSEL_W<16> { - FNSEL_W::new(self) + pub fn fnsel(&mut self) -> FnselW { + FnselW::new(self, 16) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] #[must_use] - pub fn auxsel(&mut self) -> AUXSEL_W<24> { - AUXSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn auxsel(&mut self) -> AuxselW { + AuxselW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_ch2_ctrl](index.html) module"] -pub struct ASYNC_CH2_CTRL_SPEC; -impl crate::RegisterSpec for ASYNC_CH2_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch2_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch2_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncCh2CtrlSpec; +impl crate::RegisterSpec for AsyncCh2CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_ch2_ctrl::R](R) reader structure"] -impl crate::Readable for ASYNC_CH2_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [async_ch2_ctrl::W](W) writer structure"] -impl crate::Writable for ASYNC_CH2_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`async_ch2_ctrl::R`](R) reader structure"] +impl crate::Readable for AsyncCh2CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`async_ch2_ctrl::W`](W) writer structure"] +impl crate::Writable for AsyncCh2CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_CH2_CTRL to value 0x000c_0000"] -impl crate::Resettable for ASYNC_CH2_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x000c_0000; +impl crate::Resettable for AsyncCh2CtrlSpec { + const RESET_VALUE: u32 = 0x000c_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch3_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch3_ctrl.rs index 2127e34..0195e9b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch3_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch3_ctrl.rs @@ -1,393 +1,366 @@ #[doc = "Register `ASYNC_CH3_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ASYNC_CH3_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH3_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH3_CTRL_SPEC, u8, u8, 7, O>; -#[doc = "Field `FNSEL` reader - Function Select"] -pub type FNSEL_R = crate::FieldReader; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Function Select\n\nValue on reset: 12"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FNSEL_A { +pub enum Fnsel { #[doc = "0: Logical 0"] - LOGICAL_ZERO = 0, + LogicalZero = 0, #[doc = "1: A NOR B"] - A_NOR_B = 1, + ANorB = 1, #[doc = "2: (!A) AND B"] - NOT_A_AND_B = 2, + NotAAndB = 2, #[doc = "3: !A"] - NOT_A = 3, + NotA = 3, #[doc = "4: A AND (!B)"] - A_AND_NOT_B = 4, + AAndNotB = 4, #[doc = "5: !B"] - NOT_B = 5, + NotB = 5, #[doc = "6: A XOR B"] - A_XOR_B = 6, + AXorB = 6, #[doc = "7: A NAND B"] - A_NAND_B = 7, + ANandB = 7, #[doc = "8: A AND B"] - A_AND_B = 8, + AAndB = 8, #[doc = "9: A XNOR B"] - A_XNOR_B = 9, + AXnorB = 9, #[doc = "10: B"] B = 10, #[doc = "11: (!A) OR B"] - NOT_A_OR_B = 11, + NotAOrB = 11, #[doc = "12: A"] A = 12, #[doc = "13: A OR (!B)"] - A_OR_NOT_B = 13, + AOrNotB = 13, #[doc = "14: A OR B"] - A_OR_B = 14, + AOrB = 14, #[doc = "15: Logical 1"] - LOGICAL_ONE = 15, + LogicalOne = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FNSEL_A) -> Self { + fn from(variant: Fnsel) -> Self { variant as _ } } -impl FNSEL_R { +impl crate::FieldSpec for Fnsel { + type Ux = u8; +} +impl crate::IsEnum for Fnsel {} +#[doc = "Field `FNSEL` reader - Function Select"] +pub type FnselR = crate::FieldReader; +impl FnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FNSEL_A { + pub const fn variant(&self) -> Fnsel { match self.bits { - 0 => FNSEL_A::LOGICAL_ZERO, - 1 => FNSEL_A::A_NOR_B, - 2 => FNSEL_A::NOT_A_AND_B, - 3 => FNSEL_A::NOT_A, - 4 => FNSEL_A::A_AND_NOT_B, - 5 => FNSEL_A::NOT_B, - 6 => FNSEL_A::A_XOR_B, - 7 => FNSEL_A::A_NAND_B, - 8 => FNSEL_A::A_AND_B, - 9 => FNSEL_A::A_XNOR_B, - 10 => FNSEL_A::B, - 11 => FNSEL_A::NOT_A_OR_B, - 12 => FNSEL_A::A, - 13 => FNSEL_A::A_OR_NOT_B, - 14 => FNSEL_A::A_OR_B, - 15 => FNSEL_A::LOGICAL_ONE, + 0 => Fnsel::LogicalZero, + 1 => Fnsel::ANorB, + 2 => Fnsel::NotAAndB, + 3 => Fnsel::NotA, + 4 => Fnsel::AAndNotB, + 5 => Fnsel::NotB, + 6 => Fnsel::AXorB, + 7 => Fnsel::ANandB, + 8 => Fnsel::AAndB, + 9 => Fnsel::AXnorB, + 10 => Fnsel::B, + 11 => Fnsel::NotAOrB, + 12 => Fnsel::A, + 13 => Fnsel::AOrNotB, + 14 => Fnsel::AOrB, + 15 => Fnsel::LogicalOne, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LOGICAL_ZERO`"] + #[doc = "Logical 0"] #[inline(always)] pub fn is_logical_zero(&self) -> bool { - *self == FNSEL_A::LOGICAL_ZERO + *self == Fnsel::LogicalZero } - #[doc = "Checks if the value of the field is `A_NOR_B`"] + #[doc = "A NOR B"] #[inline(always)] pub fn is_a_nor_b(&self) -> bool { - *self == FNSEL_A::A_NOR_B + *self == Fnsel::ANorB } - #[doc = "Checks if the value of the field is `NOT_A_AND_B`"] + #[doc = "(!A) AND B"] #[inline(always)] pub fn is_not_a_and_b(&self) -> bool { - *self == FNSEL_A::NOT_A_AND_B + *self == Fnsel::NotAAndB } - #[doc = "Checks if the value of the field is `NOT_A`"] + #[doc = "!A"] #[inline(always)] pub fn is_not_a(&self) -> bool { - *self == FNSEL_A::NOT_A + *self == Fnsel::NotA } - #[doc = "Checks if the value of the field is `A_AND_NOT_B`"] + #[doc = "A AND (!B)"] #[inline(always)] pub fn is_a_and_not_b(&self) -> bool { - *self == FNSEL_A::A_AND_NOT_B + *self == Fnsel::AAndNotB } - #[doc = "Checks if the value of the field is `NOT_B`"] + #[doc = "!B"] #[inline(always)] pub fn is_not_b(&self) -> bool { - *self == FNSEL_A::NOT_B + *self == Fnsel::NotB } - #[doc = "Checks if the value of the field is `A_XOR_B`"] + #[doc = "A XOR B"] #[inline(always)] pub fn is_a_xor_b(&self) -> bool { - *self == FNSEL_A::A_XOR_B + *self == Fnsel::AXorB } - #[doc = "Checks if the value of the field is `A_NAND_B`"] + #[doc = "A NAND B"] #[inline(always)] pub fn is_a_nand_b(&self) -> bool { - *self == FNSEL_A::A_NAND_B + *self == Fnsel::ANandB } - #[doc = "Checks if the value of the field is `A_AND_B`"] + #[doc = "A AND B"] #[inline(always)] pub fn is_a_and_b(&self) -> bool { - *self == FNSEL_A::A_AND_B + *self == Fnsel::AAndB } - #[doc = "Checks if the value of the field is `A_XNOR_B`"] + #[doc = "A XNOR B"] #[inline(always)] pub fn is_a_xnor_b(&self) -> bool { - *self == FNSEL_A::A_XNOR_B + *self == Fnsel::AXnorB } - #[doc = "Checks if the value of the field is `B`"] + #[doc = "B"] #[inline(always)] pub fn is_b(&self) -> bool { - *self == FNSEL_A::B + *self == Fnsel::B } - #[doc = "Checks if the value of the field is `NOT_A_OR_B`"] + #[doc = "(!A) OR B"] #[inline(always)] pub fn is_not_a_or_b(&self) -> bool { - *self == FNSEL_A::NOT_A_OR_B + *self == Fnsel::NotAOrB } - #[doc = "Checks if the value of the field is `A`"] + #[doc = "A"] #[inline(always)] pub fn is_a(&self) -> bool { - *self == FNSEL_A::A + *self == Fnsel::A } - #[doc = "Checks if the value of the field is `A_OR_NOT_B`"] + #[doc = "A OR (!B)"] #[inline(always)] pub fn is_a_or_not_b(&self) -> bool { - *self == FNSEL_A::A_OR_NOT_B + *self == Fnsel::AOrNotB } - #[doc = "Checks if the value of the field is `A_OR_B`"] + #[doc = "A OR B"] #[inline(always)] pub fn is_a_or_b(&self) -> bool { - *self == FNSEL_A::A_OR_B + *self == Fnsel::AOrB } - #[doc = "Checks if the value of the field is `LOGICAL_ONE`"] + #[doc = "Logical 1"] #[inline(always)] pub fn is_logical_one(&self) -> bool { - *self == FNSEL_A::LOGICAL_ONE + *self == Fnsel::LogicalOne } } #[doc = "Field `FNSEL` writer - Function Select"] -pub type FNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, ASYNC_CH3_CTRL_SPEC, u8, FNSEL_A, 4, O>; -impl<'a, const O: u8> FNSEL_W<'a, O> { +pub type FnselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Fnsel, crate::Safe>; +impl<'a, REG> FnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Logical 0"] #[inline(always)] - pub fn logical_zero(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ZERO) + pub fn logical_zero(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalZero) } #[doc = "A NOR B"] #[inline(always)] - pub fn a_nor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NOR_B) + pub fn a_nor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANorB) } #[doc = "(!A) AND B"] #[inline(always)] - pub fn not_a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_AND_B) + pub fn not_a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAAndB) } #[doc = "!A"] #[inline(always)] - pub fn not_a(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A) + pub fn not_a(self) -> &'a mut crate::W { + self.variant(Fnsel::NotA) } #[doc = "A AND (!B)"] #[inline(always)] - pub fn a_and_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_NOT_B) + pub fn a_and_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndNotB) } #[doc = "!B"] #[inline(always)] - pub fn not_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_B) + pub fn not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotB) } #[doc = "A XOR B"] #[inline(always)] - pub fn a_xor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XOR_B) + pub fn a_xor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXorB) } #[doc = "A NAND B"] #[inline(always)] - pub fn a_nand_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NAND_B) + pub fn a_nand_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANandB) } #[doc = "A AND B"] #[inline(always)] - pub fn a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_B) + pub fn a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndB) } #[doc = "A XNOR B"] #[inline(always)] - pub fn a_xnor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XNOR_B) + pub fn a_xnor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXnorB) } #[doc = "B"] #[inline(always)] - pub fn b(self) -> &'a mut W { - self.variant(FNSEL_A::B) + pub fn b(self) -> &'a mut crate::W { + self.variant(Fnsel::B) } #[doc = "(!A) OR B"] #[inline(always)] - pub fn not_a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_OR_B) + pub fn not_a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAOrB) } #[doc = "A"] #[inline(always)] - pub fn a(self) -> &'a mut W { - self.variant(FNSEL_A::A) + pub fn a(self) -> &'a mut crate::W { + self.variant(Fnsel::A) } #[doc = "A OR (!B)"] #[inline(always)] - pub fn a_or_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_NOT_B) + pub fn a_or_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrNotB) } #[doc = "A OR B"] #[inline(always)] - pub fn a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_B) + pub fn a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrB) } #[doc = "Logical 1"] #[inline(always)] - pub fn logical_one(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ONE) + pub fn logical_one(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalOne) } } #[doc = "Field `AUXSEL` reader - Aux Select"] -pub type AUXSEL_R = crate::FieldReader; +pub type AuxselR = crate::FieldReader; #[doc = "Field `AUXSEL` writer - Aux Select"] -pub type AUXSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ASYNC_CH3_CTRL_SPEC, u8, u8, 4, O>; +pub type AuxselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] - pub fn fnsel(&self) -> FNSEL_R { - FNSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fnsel(&self) -> FnselR { + FnselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] - pub fn auxsel(&self) -> AUXSEL_R { - AUXSEL_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn auxsel(&self) -> AuxselR { + AuxselR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] #[must_use] - pub fn fnsel(&mut self) -> FNSEL_W<16> { - FNSEL_W::new(self) + pub fn fnsel(&mut self) -> FnselW { + FnselW::new(self, 16) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] #[must_use] - pub fn auxsel(&mut self) -> AUXSEL_W<24> { - AUXSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn auxsel(&mut self) -> AuxselW { + AuxselW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_ch3_ctrl](index.html) module"] -pub struct ASYNC_CH3_CTRL_SPEC; -impl crate::RegisterSpec for ASYNC_CH3_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch3_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch3_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncCh3CtrlSpec; +impl crate::RegisterSpec for AsyncCh3CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_ch3_ctrl::R](R) reader structure"] -impl crate::Readable for ASYNC_CH3_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [async_ch3_ctrl::W](W) writer structure"] -impl crate::Writable for ASYNC_CH3_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`async_ch3_ctrl::R`](R) reader structure"] +impl crate::Readable for AsyncCh3CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`async_ch3_ctrl::W`](W) writer structure"] +impl crate::Writable for AsyncCh3CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_CH3_CTRL to value 0x000c_0000"] -impl crate::Resettable for ASYNC_CH3_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x000c_0000; +impl crate::Resettable for AsyncCh3CtrlSpec { + const RESET_VALUE: u32 = 0x000c_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch4_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch4_ctrl.rs index 996c460..e8d4b50 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch4_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch4_ctrl.rs @@ -1,393 +1,366 @@ #[doc = "Register `ASYNC_CH4_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ASYNC_CH4_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH4_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH4_CTRL_SPEC, u8, u8, 7, O>; -#[doc = "Field `FNSEL` reader - Function Select"] -pub type FNSEL_R = crate::FieldReader; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Function Select\n\nValue on reset: 12"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FNSEL_A { +pub enum Fnsel { #[doc = "0: Logical 0"] - LOGICAL_ZERO = 0, + LogicalZero = 0, #[doc = "1: A NOR B"] - A_NOR_B = 1, + ANorB = 1, #[doc = "2: (!A) AND B"] - NOT_A_AND_B = 2, + NotAAndB = 2, #[doc = "3: !A"] - NOT_A = 3, + NotA = 3, #[doc = "4: A AND (!B)"] - A_AND_NOT_B = 4, + AAndNotB = 4, #[doc = "5: !B"] - NOT_B = 5, + NotB = 5, #[doc = "6: A XOR B"] - A_XOR_B = 6, + AXorB = 6, #[doc = "7: A NAND B"] - A_NAND_B = 7, + ANandB = 7, #[doc = "8: A AND B"] - A_AND_B = 8, + AAndB = 8, #[doc = "9: A XNOR B"] - A_XNOR_B = 9, + AXnorB = 9, #[doc = "10: B"] B = 10, #[doc = "11: (!A) OR B"] - NOT_A_OR_B = 11, + NotAOrB = 11, #[doc = "12: A"] A = 12, #[doc = "13: A OR (!B)"] - A_OR_NOT_B = 13, + AOrNotB = 13, #[doc = "14: A OR B"] - A_OR_B = 14, + AOrB = 14, #[doc = "15: Logical 1"] - LOGICAL_ONE = 15, + LogicalOne = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FNSEL_A) -> Self { + fn from(variant: Fnsel) -> Self { variant as _ } } -impl FNSEL_R { +impl crate::FieldSpec for Fnsel { + type Ux = u8; +} +impl crate::IsEnum for Fnsel {} +#[doc = "Field `FNSEL` reader - Function Select"] +pub type FnselR = crate::FieldReader; +impl FnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FNSEL_A { + pub const fn variant(&self) -> Fnsel { match self.bits { - 0 => FNSEL_A::LOGICAL_ZERO, - 1 => FNSEL_A::A_NOR_B, - 2 => FNSEL_A::NOT_A_AND_B, - 3 => FNSEL_A::NOT_A, - 4 => FNSEL_A::A_AND_NOT_B, - 5 => FNSEL_A::NOT_B, - 6 => FNSEL_A::A_XOR_B, - 7 => FNSEL_A::A_NAND_B, - 8 => FNSEL_A::A_AND_B, - 9 => FNSEL_A::A_XNOR_B, - 10 => FNSEL_A::B, - 11 => FNSEL_A::NOT_A_OR_B, - 12 => FNSEL_A::A, - 13 => FNSEL_A::A_OR_NOT_B, - 14 => FNSEL_A::A_OR_B, - 15 => FNSEL_A::LOGICAL_ONE, + 0 => Fnsel::LogicalZero, + 1 => Fnsel::ANorB, + 2 => Fnsel::NotAAndB, + 3 => Fnsel::NotA, + 4 => Fnsel::AAndNotB, + 5 => Fnsel::NotB, + 6 => Fnsel::AXorB, + 7 => Fnsel::ANandB, + 8 => Fnsel::AAndB, + 9 => Fnsel::AXnorB, + 10 => Fnsel::B, + 11 => Fnsel::NotAOrB, + 12 => Fnsel::A, + 13 => Fnsel::AOrNotB, + 14 => Fnsel::AOrB, + 15 => Fnsel::LogicalOne, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LOGICAL_ZERO`"] + #[doc = "Logical 0"] #[inline(always)] pub fn is_logical_zero(&self) -> bool { - *self == FNSEL_A::LOGICAL_ZERO + *self == Fnsel::LogicalZero } - #[doc = "Checks if the value of the field is `A_NOR_B`"] + #[doc = "A NOR B"] #[inline(always)] pub fn is_a_nor_b(&self) -> bool { - *self == FNSEL_A::A_NOR_B + *self == Fnsel::ANorB } - #[doc = "Checks if the value of the field is `NOT_A_AND_B`"] + #[doc = "(!A) AND B"] #[inline(always)] pub fn is_not_a_and_b(&self) -> bool { - *self == FNSEL_A::NOT_A_AND_B + *self == Fnsel::NotAAndB } - #[doc = "Checks if the value of the field is `NOT_A`"] + #[doc = "!A"] #[inline(always)] pub fn is_not_a(&self) -> bool { - *self == FNSEL_A::NOT_A + *self == Fnsel::NotA } - #[doc = "Checks if the value of the field is `A_AND_NOT_B`"] + #[doc = "A AND (!B)"] #[inline(always)] pub fn is_a_and_not_b(&self) -> bool { - *self == FNSEL_A::A_AND_NOT_B + *self == Fnsel::AAndNotB } - #[doc = "Checks if the value of the field is `NOT_B`"] + #[doc = "!B"] #[inline(always)] pub fn is_not_b(&self) -> bool { - *self == FNSEL_A::NOT_B + *self == Fnsel::NotB } - #[doc = "Checks if the value of the field is `A_XOR_B`"] + #[doc = "A XOR B"] #[inline(always)] pub fn is_a_xor_b(&self) -> bool { - *self == FNSEL_A::A_XOR_B + *self == Fnsel::AXorB } - #[doc = "Checks if the value of the field is `A_NAND_B`"] + #[doc = "A NAND B"] #[inline(always)] pub fn is_a_nand_b(&self) -> bool { - *self == FNSEL_A::A_NAND_B + *self == Fnsel::ANandB } - #[doc = "Checks if the value of the field is `A_AND_B`"] + #[doc = "A AND B"] #[inline(always)] pub fn is_a_and_b(&self) -> bool { - *self == FNSEL_A::A_AND_B + *self == Fnsel::AAndB } - #[doc = "Checks if the value of the field is `A_XNOR_B`"] + #[doc = "A XNOR B"] #[inline(always)] pub fn is_a_xnor_b(&self) -> bool { - *self == FNSEL_A::A_XNOR_B + *self == Fnsel::AXnorB } - #[doc = "Checks if the value of the field is `B`"] + #[doc = "B"] #[inline(always)] pub fn is_b(&self) -> bool { - *self == FNSEL_A::B + *self == Fnsel::B } - #[doc = "Checks if the value of the field is `NOT_A_OR_B`"] + #[doc = "(!A) OR B"] #[inline(always)] pub fn is_not_a_or_b(&self) -> bool { - *self == FNSEL_A::NOT_A_OR_B + *self == Fnsel::NotAOrB } - #[doc = "Checks if the value of the field is `A`"] + #[doc = "A"] #[inline(always)] pub fn is_a(&self) -> bool { - *self == FNSEL_A::A + *self == Fnsel::A } - #[doc = "Checks if the value of the field is `A_OR_NOT_B`"] + #[doc = "A OR (!B)"] #[inline(always)] pub fn is_a_or_not_b(&self) -> bool { - *self == FNSEL_A::A_OR_NOT_B + *self == Fnsel::AOrNotB } - #[doc = "Checks if the value of the field is `A_OR_B`"] + #[doc = "A OR B"] #[inline(always)] pub fn is_a_or_b(&self) -> bool { - *self == FNSEL_A::A_OR_B + *self == Fnsel::AOrB } - #[doc = "Checks if the value of the field is `LOGICAL_ONE`"] + #[doc = "Logical 1"] #[inline(always)] pub fn is_logical_one(&self) -> bool { - *self == FNSEL_A::LOGICAL_ONE + *self == Fnsel::LogicalOne } } #[doc = "Field `FNSEL` writer - Function Select"] -pub type FNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, ASYNC_CH4_CTRL_SPEC, u8, FNSEL_A, 4, O>; -impl<'a, const O: u8> FNSEL_W<'a, O> { +pub type FnselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Fnsel, crate::Safe>; +impl<'a, REG> FnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Logical 0"] #[inline(always)] - pub fn logical_zero(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ZERO) + pub fn logical_zero(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalZero) } #[doc = "A NOR B"] #[inline(always)] - pub fn a_nor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NOR_B) + pub fn a_nor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANorB) } #[doc = "(!A) AND B"] #[inline(always)] - pub fn not_a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_AND_B) + pub fn not_a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAAndB) } #[doc = "!A"] #[inline(always)] - pub fn not_a(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A) + pub fn not_a(self) -> &'a mut crate::W { + self.variant(Fnsel::NotA) } #[doc = "A AND (!B)"] #[inline(always)] - pub fn a_and_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_NOT_B) + pub fn a_and_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndNotB) } #[doc = "!B"] #[inline(always)] - pub fn not_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_B) + pub fn not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotB) } #[doc = "A XOR B"] #[inline(always)] - pub fn a_xor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XOR_B) + pub fn a_xor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXorB) } #[doc = "A NAND B"] #[inline(always)] - pub fn a_nand_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NAND_B) + pub fn a_nand_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANandB) } #[doc = "A AND B"] #[inline(always)] - pub fn a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_B) + pub fn a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndB) } #[doc = "A XNOR B"] #[inline(always)] - pub fn a_xnor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XNOR_B) + pub fn a_xnor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXnorB) } #[doc = "B"] #[inline(always)] - pub fn b(self) -> &'a mut W { - self.variant(FNSEL_A::B) + pub fn b(self) -> &'a mut crate::W { + self.variant(Fnsel::B) } #[doc = "(!A) OR B"] #[inline(always)] - pub fn not_a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_OR_B) + pub fn not_a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAOrB) } #[doc = "A"] #[inline(always)] - pub fn a(self) -> &'a mut W { - self.variant(FNSEL_A::A) + pub fn a(self) -> &'a mut crate::W { + self.variant(Fnsel::A) } #[doc = "A OR (!B)"] #[inline(always)] - pub fn a_or_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_NOT_B) + pub fn a_or_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrNotB) } #[doc = "A OR B"] #[inline(always)] - pub fn a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_B) + pub fn a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrB) } #[doc = "Logical 1"] #[inline(always)] - pub fn logical_one(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ONE) + pub fn logical_one(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalOne) } } #[doc = "Field `AUXSEL` reader - Aux Select"] -pub type AUXSEL_R = crate::FieldReader; +pub type AuxselR = crate::FieldReader; #[doc = "Field `AUXSEL` writer - Aux Select"] -pub type AUXSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ASYNC_CH4_CTRL_SPEC, u8, u8, 4, O>; +pub type AuxselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] - pub fn fnsel(&self) -> FNSEL_R { - FNSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fnsel(&self) -> FnselR { + FnselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] - pub fn auxsel(&self) -> AUXSEL_R { - AUXSEL_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn auxsel(&self) -> AuxselR { + AuxselR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] #[must_use] - pub fn fnsel(&mut self) -> FNSEL_W<16> { - FNSEL_W::new(self) + pub fn fnsel(&mut self) -> FnselW { + FnselW::new(self, 16) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] #[must_use] - pub fn auxsel(&mut self) -> AUXSEL_W<24> { - AUXSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn auxsel(&mut self) -> AuxselW { + AuxselW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_ch4_ctrl](index.html) module"] -pub struct ASYNC_CH4_CTRL_SPEC; -impl crate::RegisterSpec for ASYNC_CH4_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch4_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch4_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncCh4CtrlSpec; +impl crate::RegisterSpec for AsyncCh4CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_ch4_ctrl::R](R) reader structure"] -impl crate::Readable for ASYNC_CH4_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [async_ch4_ctrl::W](W) writer structure"] -impl crate::Writable for ASYNC_CH4_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`async_ch4_ctrl::R`](R) reader structure"] +impl crate::Readable for AsyncCh4CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`async_ch4_ctrl::W`](W) writer structure"] +impl crate::Writable for AsyncCh4CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_CH4_CTRL to value 0x000c_0000"] -impl crate::Resettable for ASYNC_CH4_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x000c_0000; +impl crate::Resettable for AsyncCh4CtrlSpec { + const RESET_VALUE: u32 = 0x000c_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch5_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch5_ctrl.rs index f312297..7de5853 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch5_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch5_ctrl.rs @@ -1,393 +1,366 @@ #[doc = "Register `ASYNC_CH5_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ASYNC_CH5_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH5_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH5_CTRL_SPEC, u8, u8, 7, O>; -#[doc = "Field `FNSEL` reader - Function Select"] -pub type FNSEL_R = crate::FieldReader; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Function Select\n\nValue on reset: 12"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FNSEL_A { +pub enum Fnsel { #[doc = "0: Logical 0"] - LOGICAL_ZERO = 0, + LogicalZero = 0, #[doc = "1: A NOR B"] - A_NOR_B = 1, + ANorB = 1, #[doc = "2: (!A) AND B"] - NOT_A_AND_B = 2, + NotAAndB = 2, #[doc = "3: !A"] - NOT_A = 3, + NotA = 3, #[doc = "4: A AND (!B)"] - A_AND_NOT_B = 4, + AAndNotB = 4, #[doc = "5: !B"] - NOT_B = 5, + NotB = 5, #[doc = "6: A XOR B"] - A_XOR_B = 6, + AXorB = 6, #[doc = "7: A NAND B"] - A_NAND_B = 7, + ANandB = 7, #[doc = "8: A AND B"] - A_AND_B = 8, + AAndB = 8, #[doc = "9: A XNOR B"] - A_XNOR_B = 9, + AXnorB = 9, #[doc = "10: B"] B = 10, #[doc = "11: (!A) OR B"] - NOT_A_OR_B = 11, + NotAOrB = 11, #[doc = "12: A"] A = 12, #[doc = "13: A OR (!B)"] - A_OR_NOT_B = 13, + AOrNotB = 13, #[doc = "14: A OR B"] - A_OR_B = 14, + AOrB = 14, #[doc = "15: Logical 1"] - LOGICAL_ONE = 15, + LogicalOne = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FNSEL_A) -> Self { + fn from(variant: Fnsel) -> Self { variant as _ } } -impl FNSEL_R { +impl crate::FieldSpec for Fnsel { + type Ux = u8; +} +impl crate::IsEnum for Fnsel {} +#[doc = "Field `FNSEL` reader - Function Select"] +pub type FnselR = crate::FieldReader; +impl FnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FNSEL_A { + pub const fn variant(&self) -> Fnsel { match self.bits { - 0 => FNSEL_A::LOGICAL_ZERO, - 1 => FNSEL_A::A_NOR_B, - 2 => FNSEL_A::NOT_A_AND_B, - 3 => FNSEL_A::NOT_A, - 4 => FNSEL_A::A_AND_NOT_B, - 5 => FNSEL_A::NOT_B, - 6 => FNSEL_A::A_XOR_B, - 7 => FNSEL_A::A_NAND_B, - 8 => FNSEL_A::A_AND_B, - 9 => FNSEL_A::A_XNOR_B, - 10 => FNSEL_A::B, - 11 => FNSEL_A::NOT_A_OR_B, - 12 => FNSEL_A::A, - 13 => FNSEL_A::A_OR_NOT_B, - 14 => FNSEL_A::A_OR_B, - 15 => FNSEL_A::LOGICAL_ONE, + 0 => Fnsel::LogicalZero, + 1 => Fnsel::ANorB, + 2 => Fnsel::NotAAndB, + 3 => Fnsel::NotA, + 4 => Fnsel::AAndNotB, + 5 => Fnsel::NotB, + 6 => Fnsel::AXorB, + 7 => Fnsel::ANandB, + 8 => Fnsel::AAndB, + 9 => Fnsel::AXnorB, + 10 => Fnsel::B, + 11 => Fnsel::NotAOrB, + 12 => Fnsel::A, + 13 => Fnsel::AOrNotB, + 14 => Fnsel::AOrB, + 15 => Fnsel::LogicalOne, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LOGICAL_ZERO`"] + #[doc = "Logical 0"] #[inline(always)] pub fn is_logical_zero(&self) -> bool { - *self == FNSEL_A::LOGICAL_ZERO + *self == Fnsel::LogicalZero } - #[doc = "Checks if the value of the field is `A_NOR_B`"] + #[doc = "A NOR B"] #[inline(always)] pub fn is_a_nor_b(&self) -> bool { - *self == FNSEL_A::A_NOR_B + *self == Fnsel::ANorB } - #[doc = "Checks if the value of the field is `NOT_A_AND_B`"] + #[doc = "(!A) AND B"] #[inline(always)] pub fn is_not_a_and_b(&self) -> bool { - *self == FNSEL_A::NOT_A_AND_B + *self == Fnsel::NotAAndB } - #[doc = "Checks if the value of the field is `NOT_A`"] + #[doc = "!A"] #[inline(always)] pub fn is_not_a(&self) -> bool { - *self == FNSEL_A::NOT_A + *self == Fnsel::NotA } - #[doc = "Checks if the value of the field is `A_AND_NOT_B`"] + #[doc = "A AND (!B)"] #[inline(always)] pub fn is_a_and_not_b(&self) -> bool { - *self == FNSEL_A::A_AND_NOT_B + *self == Fnsel::AAndNotB } - #[doc = "Checks if the value of the field is `NOT_B`"] + #[doc = "!B"] #[inline(always)] pub fn is_not_b(&self) -> bool { - *self == FNSEL_A::NOT_B + *self == Fnsel::NotB } - #[doc = "Checks if the value of the field is `A_XOR_B`"] + #[doc = "A XOR B"] #[inline(always)] pub fn is_a_xor_b(&self) -> bool { - *self == FNSEL_A::A_XOR_B + *self == Fnsel::AXorB } - #[doc = "Checks if the value of the field is `A_NAND_B`"] + #[doc = "A NAND B"] #[inline(always)] pub fn is_a_nand_b(&self) -> bool { - *self == FNSEL_A::A_NAND_B + *self == Fnsel::ANandB } - #[doc = "Checks if the value of the field is `A_AND_B`"] + #[doc = "A AND B"] #[inline(always)] pub fn is_a_and_b(&self) -> bool { - *self == FNSEL_A::A_AND_B + *self == Fnsel::AAndB } - #[doc = "Checks if the value of the field is `A_XNOR_B`"] + #[doc = "A XNOR B"] #[inline(always)] pub fn is_a_xnor_b(&self) -> bool { - *self == FNSEL_A::A_XNOR_B + *self == Fnsel::AXnorB } - #[doc = "Checks if the value of the field is `B`"] + #[doc = "B"] #[inline(always)] pub fn is_b(&self) -> bool { - *self == FNSEL_A::B + *self == Fnsel::B } - #[doc = "Checks if the value of the field is `NOT_A_OR_B`"] + #[doc = "(!A) OR B"] #[inline(always)] pub fn is_not_a_or_b(&self) -> bool { - *self == FNSEL_A::NOT_A_OR_B + *self == Fnsel::NotAOrB } - #[doc = "Checks if the value of the field is `A`"] + #[doc = "A"] #[inline(always)] pub fn is_a(&self) -> bool { - *self == FNSEL_A::A + *self == Fnsel::A } - #[doc = "Checks if the value of the field is `A_OR_NOT_B`"] + #[doc = "A OR (!B)"] #[inline(always)] pub fn is_a_or_not_b(&self) -> bool { - *self == FNSEL_A::A_OR_NOT_B + *self == Fnsel::AOrNotB } - #[doc = "Checks if the value of the field is `A_OR_B`"] + #[doc = "A OR B"] #[inline(always)] pub fn is_a_or_b(&self) -> bool { - *self == FNSEL_A::A_OR_B + *self == Fnsel::AOrB } - #[doc = "Checks if the value of the field is `LOGICAL_ONE`"] + #[doc = "Logical 1"] #[inline(always)] pub fn is_logical_one(&self) -> bool { - *self == FNSEL_A::LOGICAL_ONE + *self == Fnsel::LogicalOne } } #[doc = "Field `FNSEL` writer - Function Select"] -pub type FNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, ASYNC_CH5_CTRL_SPEC, u8, FNSEL_A, 4, O>; -impl<'a, const O: u8> FNSEL_W<'a, O> { +pub type FnselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Fnsel, crate::Safe>; +impl<'a, REG> FnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Logical 0"] #[inline(always)] - pub fn logical_zero(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ZERO) + pub fn logical_zero(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalZero) } #[doc = "A NOR B"] #[inline(always)] - pub fn a_nor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NOR_B) + pub fn a_nor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANorB) } #[doc = "(!A) AND B"] #[inline(always)] - pub fn not_a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_AND_B) + pub fn not_a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAAndB) } #[doc = "!A"] #[inline(always)] - pub fn not_a(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A) + pub fn not_a(self) -> &'a mut crate::W { + self.variant(Fnsel::NotA) } #[doc = "A AND (!B)"] #[inline(always)] - pub fn a_and_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_NOT_B) + pub fn a_and_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndNotB) } #[doc = "!B"] #[inline(always)] - pub fn not_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_B) + pub fn not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotB) } #[doc = "A XOR B"] #[inline(always)] - pub fn a_xor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XOR_B) + pub fn a_xor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXorB) } #[doc = "A NAND B"] #[inline(always)] - pub fn a_nand_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NAND_B) + pub fn a_nand_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANandB) } #[doc = "A AND B"] #[inline(always)] - pub fn a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_B) + pub fn a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndB) } #[doc = "A XNOR B"] #[inline(always)] - pub fn a_xnor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XNOR_B) + pub fn a_xnor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXnorB) } #[doc = "B"] #[inline(always)] - pub fn b(self) -> &'a mut W { - self.variant(FNSEL_A::B) + pub fn b(self) -> &'a mut crate::W { + self.variant(Fnsel::B) } #[doc = "(!A) OR B"] #[inline(always)] - pub fn not_a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_OR_B) + pub fn not_a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAOrB) } #[doc = "A"] #[inline(always)] - pub fn a(self) -> &'a mut W { - self.variant(FNSEL_A::A) + pub fn a(self) -> &'a mut crate::W { + self.variant(Fnsel::A) } #[doc = "A OR (!B)"] #[inline(always)] - pub fn a_or_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_NOT_B) + pub fn a_or_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrNotB) } #[doc = "A OR B"] #[inline(always)] - pub fn a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_B) + pub fn a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrB) } #[doc = "Logical 1"] #[inline(always)] - pub fn logical_one(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ONE) + pub fn logical_one(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalOne) } } #[doc = "Field `AUXSEL` reader - Aux Select"] -pub type AUXSEL_R = crate::FieldReader; +pub type AuxselR = crate::FieldReader; #[doc = "Field `AUXSEL` writer - Aux Select"] -pub type AUXSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ASYNC_CH5_CTRL_SPEC, u8, u8, 4, O>; +pub type AuxselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] - pub fn fnsel(&self) -> FNSEL_R { - FNSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fnsel(&self) -> FnselR { + FnselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] - pub fn auxsel(&self) -> AUXSEL_R { - AUXSEL_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn auxsel(&self) -> AuxselR { + AuxselR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] #[must_use] - pub fn fnsel(&mut self) -> FNSEL_W<16> { - FNSEL_W::new(self) + pub fn fnsel(&mut self) -> FnselW { + FnselW::new(self, 16) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] #[must_use] - pub fn auxsel(&mut self) -> AUXSEL_W<24> { - AUXSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn auxsel(&mut self) -> AuxselW { + AuxselW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_ch5_ctrl](index.html) module"] -pub struct ASYNC_CH5_CTRL_SPEC; -impl crate::RegisterSpec for ASYNC_CH5_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch5_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch5_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncCh5CtrlSpec; +impl crate::RegisterSpec for AsyncCh5CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_ch5_ctrl::R](R) reader structure"] -impl crate::Readable for ASYNC_CH5_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [async_ch5_ctrl::W](W) writer structure"] -impl crate::Writable for ASYNC_CH5_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`async_ch5_ctrl::R`](R) reader structure"] +impl crate::Readable for AsyncCh5CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`async_ch5_ctrl::W`](W) writer structure"] +impl crate::Writable for AsyncCh5CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_CH5_CTRL to value 0x000c_0000"] -impl crate::Resettable for ASYNC_CH5_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x000c_0000; +impl crate::Resettable for AsyncCh5CtrlSpec { + const RESET_VALUE: u32 = 0x000c_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch6_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch6_ctrl.rs index 53af2c2..84c188e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch6_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch6_ctrl.rs @@ -1,393 +1,366 @@ #[doc = "Register `ASYNC_CH6_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ASYNC_CH6_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH6_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH6_CTRL_SPEC, u8, u8, 7, O>; -#[doc = "Field `FNSEL` reader - Function Select"] -pub type FNSEL_R = crate::FieldReader; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Function Select\n\nValue on reset: 12"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FNSEL_A { +pub enum Fnsel { #[doc = "0: Logical 0"] - LOGICAL_ZERO = 0, + LogicalZero = 0, #[doc = "1: A NOR B"] - A_NOR_B = 1, + ANorB = 1, #[doc = "2: (!A) AND B"] - NOT_A_AND_B = 2, + NotAAndB = 2, #[doc = "3: !A"] - NOT_A = 3, + NotA = 3, #[doc = "4: A AND (!B)"] - A_AND_NOT_B = 4, + AAndNotB = 4, #[doc = "5: !B"] - NOT_B = 5, + NotB = 5, #[doc = "6: A XOR B"] - A_XOR_B = 6, + AXorB = 6, #[doc = "7: A NAND B"] - A_NAND_B = 7, + ANandB = 7, #[doc = "8: A AND B"] - A_AND_B = 8, + AAndB = 8, #[doc = "9: A XNOR B"] - A_XNOR_B = 9, + AXnorB = 9, #[doc = "10: B"] B = 10, #[doc = "11: (!A) OR B"] - NOT_A_OR_B = 11, + NotAOrB = 11, #[doc = "12: A"] A = 12, #[doc = "13: A OR (!B)"] - A_OR_NOT_B = 13, + AOrNotB = 13, #[doc = "14: A OR B"] - A_OR_B = 14, + AOrB = 14, #[doc = "15: Logical 1"] - LOGICAL_ONE = 15, + LogicalOne = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FNSEL_A) -> Self { + fn from(variant: Fnsel) -> Self { variant as _ } } -impl FNSEL_R { +impl crate::FieldSpec for Fnsel { + type Ux = u8; +} +impl crate::IsEnum for Fnsel {} +#[doc = "Field `FNSEL` reader - Function Select"] +pub type FnselR = crate::FieldReader; +impl FnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FNSEL_A { + pub const fn variant(&self) -> Fnsel { match self.bits { - 0 => FNSEL_A::LOGICAL_ZERO, - 1 => FNSEL_A::A_NOR_B, - 2 => FNSEL_A::NOT_A_AND_B, - 3 => FNSEL_A::NOT_A, - 4 => FNSEL_A::A_AND_NOT_B, - 5 => FNSEL_A::NOT_B, - 6 => FNSEL_A::A_XOR_B, - 7 => FNSEL_A::A_NAND_B, - 8 => FNSEL_A::A_AND_B, - 9 => FNSEL_A::A_XNOR_B, - 10 => FNSEL_A::B, - 11 => FNSEL_A::NOT_A_OR_B, - 12 => FNSEL_A::A, - 13 => FNSEL_A::A_OR_NOT_B, - 14 => FNSEL_A::A_OR_B, - 15 => FNSEL_A::LOGICAL_ONE, + 0 => Fnsel::LogicalZero, + 1 => Fnsel::ANorB, + 2 => Fnsel::NotAAndB, + 3 => Fnsel::NotA, + 4 => Fnsel::AAndNotB, + 5 => Fnsel::NotB, + 6 => Fnsel::AXorB, + 7 => Fnsel::ANandB, + 8 => Fnsel::AAndB, + 9 => Fnsel::AXnorB, + 10 => Fnsel::B, + 11 => Fnsel::NotAOrB, + 12 => Fnsel::A, + 13 => Fnsel::AOrNotB, + 14 => Fnsel::AOrB, + 15 => Fnsel::LogicalOne, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LOGICAL_ZERO`"] + #[doc = "Logical 0"] #[inline(always)] pub fn is_logical_zero(&self) -> bool { - *self == FNSEL_A::LOGICAL_ZERO + *self == Fnsel::LogicalZero } - #[doc = "Checks if the value of the field is `A_NOR_B`"] + #[doc = "A NOR B"] #[inline(always)] pub fn is_a_nor_b(&self) -> bool { - *self == FNSEL_A::A_NOR_B + *self == Fnsel::ANorB } - #[doc = "Checks if the value of the field is `NOT_A_AND_B`"] + #[doc = "(!A) AND B"] #[inline(always)] pub fn is_not_a_and_b(&self) -> bool { - *self == FNSEL_A::NOT_A_AND_B + *self == Fnsel::NotAAndB } - #[doc = "Checks if the value of the field is `NOT_A`"] + #[doc = "!A"] #[inline(always)] pub fn is_not_a(&self) -> bool { - *self == FNSEL_A::NOT_A + *self == Fnsel::NotA } - #[doc = "Checks if the value of the field is `A_AND_NOT_B`"] + #[doc = "A AND (!B)"] #[inline(always)] pub fn is_a_and_not_b(&self) -> bool { - *self == FNSEL_A::A_AND_NOT_B + *self == Fnsel::AAndNotB } - #[doc = "Checks if the value of the field is `NOT_B`"] + #[doc = "!B"] #[inline(always)] pub fn is_not_b(&self) -> bool { - *self == FNSEL_A::NOT_B + *self == Fnsel::NotB } - #[doc = "Checks if the value of the field is `A_XOR_B`"] + #[doc = "A XOR B"] #[inline(always)] pub fn is_a_xor_b(&self) -> bool { - *self == FNSEL_A::A_XOR_B + *self == Fnsel::AXorB } - #[doc = "Checks if the value of the field is `A_NAND_B`"] + #[doc = "A NAND B"] #[inline(always)] pub fn is_a_nand_b(&self) -> bool { - *self == FNSEL_A::A_NAND_B + *self == Fnsel::ANandB } - #[doc = "Checks if the value of the field is `A_AND_B`"] + #[doc = "A AND B"] #[inline(always)] pub fn is_a_and_b(&self) -> bool { - *self == FNSEL_A::A_AND_B + *self == Fnsel::AAndB } - #[doc = "Checks if the value of the field is `A_XNOR_B`"] + #[doc = "A XNOR B"] #[inline(always)] pub fn is_a_xnor_b(&self) -> bool { - *self == FNSEL_A::A_XNOR_B + *self == Fnsel::AXnorB } - #[doc = "Checks if the value of the field is `B`"] + #[doc = "B"] #[inline(always)] pub fn is_b(&self) -> bool { - *self == FNSEL_A::B + *self == Fnsel::B } - #[doc = "Checks if the value of the field is `NOT_A_OR_B`"] + #[doc = "(!A) OR B"] #[inline(always)] pub fn is_not_a_or_b(&self) -> bool { - *self == FNSEL_A::NOT_A_OR_B + *self == Fnsel::NotAOrB } - #[doc = "Checks if the value of the field is `A`"] + #[doc = "A"] #[inline(always)] pub fn is_a(&self) -> bool { - *self == FNSEL_A::A + *self == Fnsel::A } - #[doc = "Checks if the value of the field is `A_OR_NOT_B`"] + #[doc = "A OR (!B)"] #[inline(always)] pub fn is_a_or_not_b(&self) -> bool { - *self == FNSEL_A::A_OR_NOT_B + *self == Fnsel::AOrNotB } - #[doc = "Checks if the value of the field is `A_OR_B`"] + #[doc = "A OR B"] #[inline(always)] pub fn is_a_or_b(&self) -> bool { - *self == FNSEL_A::A_OR_B + *self == Fnsel::AOrB } - #[doc = "Checks if the value of the field is `LOGICAL_ONE`"] + #[doc = "Logical 1"] #[inline(always)] pub fn is_logical_one(&self) -> bool { - *self == FNSEL_A::LOGICAL_ONE + *self == Fnsel::LogicalOne } } #[doc = "Field `FNSEL` writer - Function Select"] -pub type FNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, ASYNC_CH6_CTRL_SPEC, u8, FNSEL_A, 4, O>; -impl<'a, const O: u8> FNSEL_W<'a, O> { +pub type FnselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Fnsel, crate::Safe>; +impl<'a, REG> FnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Logical 0"] #[inline(always)] - pub fn logical_zero(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ZERO) + pub fn logical_zero(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalZero) } #[doc = "A NOR B"] #[inline(always)] - pub fn a_nor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NOR_B) + pub fn a_nor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANorB) } #[doc = "(!A) AND B"] #[inline(always)] - pub fn not_a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_AND_B) + pub fn not_a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAAndB) } #[doc = "!A"] #[inline(always)] - pub fn not_a(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A) + pub fn not_a(self) -> &'a mut crate::W { + self.variant(Fnsel::NotA) } #[doc = "A AND (!B)"] #[inline(always)] - pub fn a_and_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_NOT_B) + pub fn a_and_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndNotB) } #[doc = "!B"] #[inline(always)] - pub fn not_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_B) + pub fn not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotB) } #[doc = "A XOR B"] #[inline(always)] - pub fn a_xor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XOR_B) + pub fn a_xor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXorB) } #[doc = "A NAND B"] #[inline(always)] - pub fn a_nand_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NAND_B) + pub fn a_nand_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANandB) } #[doc = "A AND B"] #[inline(always)] - pub fn a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_B) + pub fn a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndB) } #[doc = "A XNOR B"] #[inline(always)] - pub fn a_xnor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XNOR_B) + pub fn a_xnor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXnorB) } #[doc = "B"] #[inline(always)] - pub fn b(self) -> &'a mut W { - self.variant(FNSEL_A::B) + pub fn b(self) -> &'a mut crate::W { + self.variant(Fnsel::B) } #[doc = "(!A) OR B"] #[inline(always)] - pub fn not_a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_OR_B) + pub fn not_a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAOrB) } #[doc = "A"] #[inline(always)] - pub fn a(self) -> &'a mut W { - self.variant(FNSEL_A::A) + pub fn a(self) -> &'a mut crate::W { + self.variant(Fnsel::A) } #[doc = "A OR (!B)"] #[inline(always)] - pub fn a_or_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_NOT_B) + pub fn a_or_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrNotB) } #[doc = "A OR B"] #[inline(always)] - pub fn a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_B) + pub fn a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrB) } #[doc = "Logical 1"] #[inline(always)] - pub fn logical_one(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ONE) + pub fn logical_one(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalOne) } } #[doc = "Field `AUXSEL` reader - Aux Select"] -pub type AUXSEL_R = crate::FieldReader; +pub type AuxselR = crate::FieldReader; #[doc = "Field `AUXSEL` writer - Aux Select"] -pub type AUXSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ASYNC_CH6_CTRL_SPEC, u8, u8, 4, O>; +pub type AuxselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] - pub fn fnsel(&self) -> FNSEL_R { - FNSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fnsel(&self) -> FnselR { + FnselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] - pub fn auxsel(&self) -> AUXSEL_R { - AUXSEL_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn auxsel(&self) -> AuxselR { + AuxselR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] #[must_use] - pub fn fnsel(&mut self) -> FNSEL_W<16> { - FNSEL_W::new(self) + pub fn fnsel(&mut self) -> FnselW { + FnselW::new(self, 16) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] #[must_use] - pub fn auxsel(&mut self) -> AUXSEL_W<24> { - AUXSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn auxsel(&mut self) -> AuxselW { + AuxselW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_ch6_ctrl](index.html) module"] -pub struct ASYNC_CH6_CTRL_SPEC; -impl crate::RegisterSpec for ASYNC_CH6_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch6_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch6_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncCh6CtrlSpec; +impl crate::RegisterSpec for AsyncCh6CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_ch6_ctrl::R](R) reader structure"] -impl crate::Readable for ASYNC_CH6_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [async_ch6_ctrl::W](W) writer structure"] -impl crate::Writable for ASYNC_CH6_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`async_ch6_ctrl::R`](R) reader structure"] +impl crate::Readable for AsyncCh6CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`async_ch6_ctrl::W`](W) writer structure"] +impl crate::Writable for AsyncCh6CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_CH6_CTRL to value 0x000c_0000"] -impl crate::Resettable for ASYNC_CH6_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x000c_0000; +impl crate::Resettable for AsyncCh6CtrlSpec { + const RESET_VALUE: u32 = 0x000c_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch7_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch7_ctrl.rs index cd9025f..ab12a10 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch7_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch7_ctrl.rs @@ -1,393 +1,366 @@ #[doc = "Register `ASYNC_CH7_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ASYNC_CH7_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH7_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH7_CTRL_SPEC, u8, u8, 7, O>; -#[doc = "Field `FNSEL` reader - Function Select"] -pub type FNSEL_R = crate::FieldReader; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Function Select\n\nValue on reset: 12"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FNSEL_A { +pub enum Fnsel { #[doc = "0: Logical 0"] - LOGICAL_ZERO = 0, + LogicalZero = 0, #[doc = "1: A NOR B"] - A_NOR_B = 1, + ANorB = 1, #[doc = "2: (!A) AND B"] - NOT_A_AND_B = 2, + NotAAndB = 2, #[doc = "3: !A"] - NOT_A = 3, + NotA = 3, #[doc = "4: A AND (!B)"] - A_AND_NOT_B = 4, + AAndNotB = 4, #[doc = "5: !B"] - NOT_B = 5, + NotB = 5, #[doc = "6: A XOR B"] - A_XOR_B = 6, + AXorB = 6, #[doc = "7: A NAND B"] - A_NAND_B = 7, + ANandB = 7, #[doc = "8: A AND B"] - A_AND_B = 8, + AAndB = 8, #[doc = "9: A XNOR B"] - A_XNOR_B = 9, + AXnorB = 9, #[doc = "10: B"] B = 10, #[doc = "11: (!A) OR B"] - NOT_A_OR_B = 11, + NotAOrB = 11, #[doc = "12: A"] A = 12, #[doc = "13: A OR (!B)"] - A_OR_NOT_B = 13, + AOrNotB = 13, #[doc = "14: A OR B"] - A_OR_B = 14, + AOrB = 14, #[doc = "15: Logical 1"] - LOGICAL_ONE = 15, + LogicalOne = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FNSEL_A) -> Self { + fn from(variant: Fnsel) -> Self { variant as _ } } -impl FNSEL_R { +impl crate::FieldSpec for Fnsel { + type Ux = u8; +} +impl crate::IsEnum for Fnsel {} +#[doc = "Field `FNSEL` reader - Function Select"] +pub type FnselR = crate::FieldReader; +impl FnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FNSEL_A { + pub const fn variant(&self) -> Fnsel { match self.bits { - 0 => FNSEL_A::LOGICAL_ZERO, - 1 => FNSEL_A::A_NOR_B, - 2 => FNSEL_A::NOT_A_AND_B, - 3 => FNSEL_A::NOT_A, - 4 => FNSEL_A::A_AND_NOT_B, - 5 => FNSEL_A::NOT_B, - 6 => FNSEL_A::A_XOR_B, - 7 => FNSEL_A::A_NAND_B, - 8 => FNSEL_A::A_AND_B, - 9 => FNSEL_A::A_XNOR_B, - 10 => FNSEL_A::B, - 11 => FNSEL_A::NOT_A_OR_B, - 12 => FNSEL_A::A, - 13 => FNSEL_A::A_OR_NOT_B, - 14 => FNSEL_A::A_OR_B, - 15 => FNSEL_A::LOGICAL_ONE, + 0 => Fnsel::LogicalZero, + 1 => Fnsel::ANorB, + 2 => Fnsel::NotAAndB, + 3 => Fnsel::NotA, + 4 => Fnsel::AAndNotB, + 5 => Fnsel::NotB, + 6 => Fnsel::AXorB, + 7 => Fnsel::ANandB, + 8 => Fnsel::AAndB, + 9 => Fnsel::AXnorB, + 10 => Fnsel::B, + 11 => Fnsel::NotAOrB, + 12 => Fnsel::A, + 13 => Fnsel::AOrNotB, + 14 => Fnsel::AOrB, + 15 => Fnsel::LogicalOne, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LOGICAL_ZERO`"] + #[doc = "Logical 0"] #[inline(always)] pub fn is_logical_zero(&self) -> bool { - *self == FNSEL_A::LOGICAL_ZERO + *self == Fnsel::LogicalZero } - #[doc = "Checks if the value of the field is `A_NOR_B`"] + #[doc = "A NOR B"] #[inline(always)] pub fn is_a_nor_b(&self) -> bool { - *self == FNSEL_A::A_NOR_B + *self == Fnsel::ANorB } - #[doc = "Checks if the value of the field is `NOT_A_AND_B`"] + #[doc = "(!A) AND B"] #[inline(always)] pub fn is_not_a_and_b(&self) -> bool { - *self == FNSEL_A::NOT_A_AND_B + *self == Fnsel::NotAAndB } - #[doc = "Checks if the value of the field is `NOT_A`"] + #[doc = "!A"] #[inline(always)] pub fn is_not_a(&self) -> bool { - *self == FNSEL_A::NOT_A + *self == Fnsel::NotA } - #[doc = "Checks if the value of the field is `A_AND_NOT_B`"] + #[doc = "A AND (!B)"] #[inline(always)] pub fn is_a_and_not_b(&self) -> bool { - *self == FNSEL_A::A_AND_NOT_B + *self == Fnsel::AAndNotB } - #[doc = "Checks if the value of the field is `NOT_B`"] + #[doc = "!B"] #[inline(always)] pub fn is_not_b(&self) -> bool { - *self == FNSEL_A::NOT_B + *self == Fnsel::NotB } - #[doc = "Checks if the value of the field is `A_XOR_B`"] + #[doc = "A XOR B"] #[inline(always)] pub fn is_a_xor_b(&self) -> bool { - *self == FNSEL_A::A_XOR_B + *self == Fnsel::AXorB } - #[doc = "Checks if the value of the field is `A_NAND_B`"] + #[doc = "A NAND B"] #[inline(always)] pub fn is_a_nand_b(&self) -> bool { - *self == FNSEL_A::A_NAND_B + *self == Fnsel::ANandB } - #[doc = "Checks if the value of the field is `A_AND_B`"] + #[doc = "A AND B"] #[inline(always)] pub fn is_a_and_b(&self) -> bool { - *self == FNSEL_A::A_AND_B + *self == Fnsel::AAndB } - #[doc = "Checks if the value of the field is `A_XNOR_B`"] + #[doc = "A XNOR B"] #[inline(always)] pub fn is_a_xnor_b(&self) -> bool { - *self == FNSEL_A::A_XNOR_B + *self == Fnsel::AXnorB } - #[doc = "Checks if the value of the field is `B`"] + #[doc = "B"] #[inline(always)] pub fn is_b(&self) -> bool { - *self == FNSEL_A::B + *self == Fnsel::B } - #[doc = "Checks if the value of the field is `NOT_A_OR_B`"] + #[doc = "(!A) OR B"] #[inline(always)] pub fn is_not_a_or_b(&self) -> bool { - *self == FNSEL_A::NOT_A_OR_B + *self == Fnsel::NotAOrB } - #[doc = "Checks if the value of the field is `A`"] + #[doc = "A"] #[inline(always)] pub fn is_a(&self) -> bool { - *self == FNSEL_A::A + *self == Fnsel::A } - #[doc = "Checks if the value of the field is `A_OR_NOT_B`"] + #[doc = "A OR (!B)"] #[inline(always)] pub fn is_a_or_not_b(&self) -> bool { - *self == FNSEL_A::A_OR_NOT_B + *self == Fnsel::AOrNotB } - #[doc = "Checks if the value of the field is `A_OR_B`"] + #[doc = "A OR B"] #[inline(always)] pub fn is_a_or_b(&self) -> bool { - *self == FNSEL_A::A_OR_B + *self == Fnsel::AOrB } - #[doc = "Checks if the value of the field is `LOGICAL_ONE`"] + #[doc = "Logical 1"] #[inline(always)] pub fn is_logical_one(&self) -> bool { - *self == FNSEL_A::LOGICAL_ONE + *self == Fnsel::LogicalOne } } #[doc = "Field `FNSEL` writer - Function Select"] -pub type FNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, ASYNC_CH7_CTRL_SPEC, u8, FNSEL_A, 4, O>; -impl<'a, const O: u8> FNSEL_W<'a, O> { +pub type FnselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Fnsel, crate::Safe>; +impl<'a, REG> FnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Logical 0"] #[inline(always)] - pub fn logical_zero(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ZERO) + pub fn logical_zero(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalZero) } #[doc = "A NOR B"] #[inline(always)] - pub fn a_nor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NOR_B) + pub fn a_nor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANorB) } #[doc = "(!A) AND B"] #[inline(always)] - pub fn not_a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_AND_B) + pub fn not_a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAAndB) } #[doc = "!A"] #[inline(always)] - pub fn not_a(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A) + pub fn not_a(self) -> &'a mut crate::W { + self.variant(Fnsel::NotA) } #[doc = "A AND (!B)"] #[inline(always)] - pub fn a_and_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_NOT_B) + pub fn a_and_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndNotB) } #[doc = "!B"] #[inline(always)] - pub fn not_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_B) + pub fn not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotB) } #[doc = "A XOR B"] #[inline(always)] - pub fn a_xor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XOR_B) + pub fn a_xor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXorB) } #[doc = "A NAND B"] #[inline(always)] - pub fn a_nand_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NAND_B) + pub fn a_nand_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANandB) } #[doc = "A AND B"] #[inline(always)] - pub fn a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_B) + pub fn a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndB) } #[doc = "A XNOR B"] #[inline(always)] - pub fn a_xnor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XNOR_B) + pub fn a_xnor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXnorB) } #[doc = "B"] #[inline(always)] - pub fn b(self) -> &'a mut W { - self.variant(FNSEL_A::B) + pub fn b(self) -> &'a mut crate::W { + self.variant(Fnsel::B) } #[doc = "(!A) OR B"] #[inline(always)] - pub fn not_a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_OR_B) + pub fn not_a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAOrB) } #[doc = "A"] #[inline(always)] - pub fn a(self) -> &'a mut W { - self.variant(FNSEL_A::A) + pub fn a(self) -> &'a mut crate::W { + self.variant(Fnsel::A) } #[doc = "A OR (!B)"] #[inline(always)] - pub fn a_or_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_NOT_B) + pub fn a_or_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrNotB) } #[doc = "A OR B"] #[inline(always)] - pub fn a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_B) + pub fn a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrB) } #[doc = "Logical 1"] #[inline(always)] - pub fn logical_one(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ONE) + pub fn logical_one(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalOne) } } #[doc = "Field `AUXSEL` reader - Aux Select"] -pub type AUXSEL_R = crate::FieldReader; +pub type AuxselR = crate::FieldReader; #[doc = "Field `AUXSEL` writer - Aux Select"] -pub type AUXSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ASYNC_CH7_CTRL_SPEC, u8, u8, 4, O>; +pub type AuxselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] - pub fn fnsel(&self) -> FNSEL_R { - FNSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fnsel(&self) -> FnselR { + FnselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] - pub fn auxsel(&self) -> AUXSEL_R { - AUXSEL_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn auxsel(&self) -> AuxselR { + AuxselR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] #[must_use] - pub fn fnsel(&mut self) -> FNSEL_W<16> { - FNSEL_W::new(self) + pub fn fnsel(&mut self) -> FnselW { + FnselW::new(self, 16) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] #[must_use] - pub fn auxsel(&mut self) -> AUXSEL_W<24> { - AUXSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn auxsel(&mut self) -> AuxselW { + AuxselW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_ch7_ctrl](index.html) module"] -pub struct ASYNC_CH7_CTRL_SPEC; -impl crate::RegisterSpec for ASYNC_CH7_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch7_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch7_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncCh7CtrlSpec; +impl crate::RegisterSpec for AsyncCh7CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_ch7_ctrl::R](R) reader structure"] -impl crate::Readable for ASYNC_CH7_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [async_ch7_ctrl::W](W) writer structure"] -impl crate::Writable for ASYNC_CH7_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`async_ch7_ctrl::R`](R) reader structure"] +impl crate::Readable for AsyncCh7CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`async_ch7_ctrl::W`](W) writer structure"] +impl crate::Writable for AsyncCh7CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_CH7_CTRL to value 0x000c_0000"] -impl crate::Resettable for ASYNC_CH7_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x000c_0000; +impl crate::Resettable for AsyncCh7CtrlSpec { + const RESET_VALUE: u32 = 0x000c_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch8_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch8_ctrl.rs index 4d03009..9e46eed 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch8_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch8_ctrl.rs @@ -1,393 +1,366 @@ #[doc = "Register `ASYNC_CH8_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ASYNC_CH8_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH8_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH8_CTRL_SPEC, u8, u8, 7, O>; -#[doc = "Field `FNSEL` reader - Function Select"] -pub type FNSEL_R = crate::FieldReader; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Function Select\n\nValue on reset: 12"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FNSEL_A { +pub enum Fnsel { #[doc = "0: Logical 0"] - LOGICAL_ZERO = 0, + LogicalZero = 0, #[doc = "1: A NOR B"] - A_NOR_B = 1, + ANorB = 1, #[doc = "2: (!A) AND B"] - NOT_A_AND_B = 2, + NotAAndB = 2, #[doc = "3: !A"] - NOT_A = 3, + NotA = 3, #[doc = "4: A AND (!B)"] - A_AND_NOT_B = 4, + AAndNotB = 4, #[doc = "5: !B"] - NOT_B = 5, + NotB = 5, #[doc = "6: A XOR B"] - A_XOR_B = 6, + AXorB = 6, #[doc = "7: A NAND B"] - A_NAND_B = 7, + ANandB = 7, #[doc = "8: A AND B"] - A_AND_B = 8, + AAndB = 8, #[doc = "9: A XNOR B"] - A_XNOR_B = 9, + AXnorB = 9, #[doc = "10: B"] B = 10, #[doc = "11: (!A) OR B"] - NOT_A_OR_B = 11, + NotAOrB = 11, #[doc = "12: A"] A = 12, #[doc = "13: A OR (!B)"] - A_OR_NOT_B = 13, + AOrNotB = 13, #[doc = "14: A OR B"] - A_OR_B = 14, + AOrB = 14, #[doc = "15: Logical 1"] - LOGICAL_ONE = 15, + LogicalOne = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FNSEL_A) -> Self { + fn from(variant: Fnsel) -> Self { variant as _ } } -impl FNSEL_R { +impl crate::FieldSpec for Fnsel { + type Ux = u8; +} +impl crate::IsEnum for Fnsel {} +#[doc = "Field `FNSEL` reader - Function Select"] +pub type FnselR = crate::FieldReader; +impl FnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FNSEL_A { + pub const fn variant(&self) -> Fnsel { match self.bits { - 0 => FNSEL_A::LOGICAL_ZERO, - 1 => FNSEL_A::A_NOR_B, - 2 => FNSEL_A::NOT_A_AND_B, - 3 => FNSEL_A::NOT_A, - 4 => FNSEL_A::A_AND_NOT_B, - 5 => FNSEL_A::NOT_B, - 6 => FNSEL_A::A_XOR_B, - 7 => FNSEL_A::A_NAND_B, - 8 => FNSEL_A::A_AND_B, - 9 => FNSEL_A::A_XNOR_B, - 10 => FNSEL_A::B, - 11 => FNSEL_A::NOT_A_OR_B, - 12 => FNSEL_A::A, - 13 => FNSEL_A::A_OR_NOT_B, - 14 => FNSEL_A::A_OR_B, - 15 => FNSEL_A::LOGICAL_ONE, + 0 => Fnsel::LogicalZero, + 1 => Fnsel::ANorB, + 2 => Fnsel::NotAAndB, + 3 => Fnsel::NotA, + 4 => Fnsel::AAndNotB, + 5 => Fnsel::NotB, + 6 => Fnsel::AXorB, + 7 => Fnsel::ANandB, + 8 => Fnsel::AAndB, + 9 => Fnsel::AXnorB, + 10 => Fnsel::B, + 11 => Fnsel::NotAOrB, + 12 => Fnsel::A, + 13 => Fnsel::AOrNotB, + 14 => Fnsel::AOrB, + 15 => Fnsel::LogicalOne, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LOGICAL_ZERO`"] + #[doc = "Logical 0"] #[inline(always)] pub fn is_logical_zero(&self) -> bool { - *self == FNSEL_A::LOGICAL_ZERO + *self == Fnsel::LogicalZero } - #[doc = "Checks if the value of the field is `A_NOR_B`"] + #[doc = "A NOR B"] #[inline(always)] pub fn is_a_nor_b(&self) -> bool { - *self == FNSEL_A::A_NOR_B + *self == Fnsel::ANorB } - #[doc = "Checks if the value of the field is `NOT_A_AND_B`"] + #[doc = "(!A) AND B"] #[inline(always)] pub fn is_not_a_and_b(&self) -> bool { - *self == FNSEL_A::NOT_A_AND_B + *self == Fnsel::NotAAndB } - #[doc = "Checks if the value of the field is `NOT_A`"] + #[doc = "!A"] #[inline(always)] pub fn is_not_a(&self) -> bool { - *self == FNSEL_A::NOT_A + *self == Fnsel::NotA } - #[doc = "Checks if the value of the field is `A_AND_NOT_B`"] + #[doc = "A AND (!B)"] #[inline(always)] pub fn is_a_and_not_b(&self) -> bool { - *self == FNSEL_A::A_AND_NOT_B + *self == Fnsel::AAndNotB } - #[doc = "Checks if the value of the field is `NOT_B`"] + #[doc = "!B"] #[inline(always)] pub fn is_not_b(&self) -> bool { - *self == FNSEL_A::NOT_B + *self == Fnsel::NotB } - #[doc = "Checks if the value of the field is `A_XOR_B`"] + #[doc = "A XOR B"] #[inline(always)] pub fn is_a_xor_b(&self) -> bool { - *self == FNSEL_A::A_XOR_B + *self == Fnsel::AXorB } - #[doc = "Checks if the value of the field is `A_NAND_B`"] + #[doc = "A NAND B"] #[inline(always)] pub fn is_a_nand_b(&self) -> bool { - *self == FNSEL_A::A_NAND_B + *self == Fnsel::ANandB } - #[doc = "Checks if the value of the field is `A_AND_B`"] + #[doc = "A AND B"] #[inline(always)] pub fn is_a_and_b(&self) -> bool { - *self == FNSEL_A::A_AND_B + *self == Fnsel::AAndB } - #[doc = "Checks if the value of the field is `A_XNOR_B`"] + #[doc = "A XNOR B"] #[inline(always)] pub fn is_a_xnor_b(&self) -> bool { - *self == FNSEL_A::A_XNOR_B + *self == Fnsel::AXnorB } - #[doc = "Checks if the value of the field is `B`"] + #[doc = "B"] #[inline(always)] pub fn is_b(&self) -> bool { - *self == FNSEL_A::B + *self == Fnsel::B } - #[doc = "Checks if the value of the field is `NOT_A_OR_B`"] + #[doc = "(!A) OR B"] #[inline(always)] pub fn is_not_a_or_b(&self) -> bool { - *self == FNSEL_A::NOT_A_OR_B + *self == Fnsel::NotAOrB } - #[doc = "Checks if the value of the field is `A`"] + #[doc = "A"] #[inline(always)] pub fn is_a(&self) -> bool { - *self == FNSEL_A::A + *self == Fnsel::A } - #[doc = "Checks if the value of the field is `A_OR_NOT_B`"] + #[doc = "A OR (!B)"] #[inline(always)] pub fn is_a_or_not_b(&self) -> bool { - *self == FNSEL_A::A_OR_NOT_B + *self == Fnsel::AOrNotB } - #[doc = "Checks if the value of the field is `A_OR_B`"] + #[doc = "A OR B"] #[inline(always)] pub fn is_a_or_b(&self) -> bool { - *self == FNSEL_A::A_OR_B + *self == Fnsel::AOrB } - #[doc = "Checks if the value of the field is `LOGICAL_ONE`"] + #[doc = "Logical 1"] #[inline(always)] pub fn is_logical_one(&self) -> bool { - *self == FNSEL_A::LOGICAL_ONE + *self == Fnsel::LogicalOne } } #[doc = "Field `FNSEL` writer - Function Select"] -pub type FNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, ASYNC_CH8_CTRL_SPEC, u8, FNSEL_A, 4, O>; -impl<'a, const O: u8> FNSEL_W<'a, O> { +pub type FnselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Fnsel, crate::Safe>; +impl<'a, REG> FnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Logical 0"] #[inline(always)] - pub fn logical_zero(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ZERO) + pub fn logical_zero(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalZero) } #[doc = "A NOR B"] #[inline(always)] - pub fn a_nor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NOR_B) + pub fn a_nor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANorB) } #[doc = "(!A) AND B"] #[inline(always)] - pub fn not_a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_AND_B) + pub fn not_a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAAndB) } #[doc = "!A"] #[inline(always)] - pub fn not_a(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A) + pub fn not_a(self) -> &'a mut crate::W { + self.variant(Fnsel::NotA) } #[doc = "A AND (!B)"] #[inline(always)] - pub fn a_and_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_NOT_B) + pub fn a_and_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndNotB) } #[doc = "!B"] #[inline(always)] - pub fn not_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_B) + pub fn not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotB) } #[doc = "A XOR B"] #[inline(always)] - pub fn a_xor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XOR_B) + pub fn a_xor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXorB) } #[doc = "A NAND B"] #[inline(always)] - pub fn a_nand_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NAND_B) + pub fn a_nand_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANandB) } #[doc = "A AND B"] #[inline(always)] - pub fn a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_B) + pub fn a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndB) } #[doc = "A XNOR B"] #[inline(always)] - pub fn a_xnor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XNOR_B) + pub fn a_xnor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXnorB) } #[doc = "B"] #[inline(always)] - pub fn b(self) -> &'a mut W { - self.variant(FNSEL_A::B) + pub fn b(self) -> &'a mut crate::W { + self.variant(Fnsel::B) } #[doc = "(!A) OR B"] #[inline(always)] - pub fn not_a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_OR_B) + pub fn not_a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAOrB) } #[doc = "A"] #[inline(always)] - pub fn a(self) -> &'a mut W { - self.variant(FNSEL_A::A) + pub fn a(self) -> &'a mut crate::W { + self.variant(Fnsel::A) } #[doc = "A OR (!B)"] #[inline(always)] - pub fn a_or_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_NOT_B) + pub fn a_or_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrNotB) } #[doc = "A OR B"] #[inline(always)] - pub fn a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_B) + pub fn a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrB) } #[doc = "Logical 1"] #[inline(always)] - pub fn logical_one(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ONE) + pub fn logical_one(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalOne) } } #[doc = "Field `AUXSEL` reader - Aux Select"] -pub type AUXSEL_R = crate::FieldReader; +pub type AuxselR = crate::FieldReader; #[doc = "Field `AUXSEL` writer - Aux Select"] -pub type AUXSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ASYNC_CH8_CTRL_SPEC, u8, u8, 4, O>; +pub type AuxselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] - pub fn fnsel(&self) -> FNSEL_R { - FNSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fnsel(&self) -> FnselR { + FnselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] - pub fn auxsel(&self) -> AUXSEL_R { - AUXSEL_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn auxsel(&self) -> AuxselR { + AuxselR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] #[must_use] - pub fn fnsel(&mut self) -> FNSEL_W<16> { - FNSEL_W::new(self) + pub fn fnsel(&mut self) -> FnselW { + FnselW::new(self, 16) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] #[must_use] - pub fn auxsel(&mut self) -> AUXSEL_W<24> { - AUXSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn auxsel(&mut self) -> AuxselW { + AuxselW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_ch8_ctrl](index.html) module"] -pub struct ASYNC_CH8_CTRL_SPEC; -impl crate::RegisterSpec for ASYNC_CH8_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch8_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch8_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncCh8CtrlSpec; +impl crate::RegisterSpec for AsyncCh8CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_ch8_ctrl::R](R) reader structure"] -impl crate::Readable for ASYNC_CH8_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [async_ch8_ctrl::W](W) writer structure"] -impl crate::Writable for ASYNC_CH8_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`async_ch8_ctrl::R`](R) reader structure"] +impl crate::Readable for AsyncCh8CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`async_ch8_ctrl::W`](W) writer structure"] +impl crate::Writable for AsyncCh8CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_CH8_CTRL to value 0x000c_0000"] -impl crate::Resettable for ASYNC_CH8_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x000c_0000; +impl crate::Resettable for AsyncCh8CtrlSpec { + const RESET_VALUE: u32 = 0x000c_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch9_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch9_ctrl.rs index 790310a..1c99810 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch9_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_ch9_ctrl.rs @@ -1,393 +1,366 @@ #[doc = "Register `ASYNC_CH9_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ASYNC_CH9_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH9_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH9_CTRL_SPEC, u8, u8, 7, O>; -#[doc = "Field `FNSEL` reader - Function Select"] -pub type FNSEL_R = crate::FieldReader; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Function Select\n\nValue on reset: 12"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FNSEL_A { +pub enum Fnsel { #[doc = "0: Logical 0"] - LOGICAL_ZERO = 0, + LogicalZero = 0, #[doc = "1: A NOR B"] - A_NOR_B = 1, + ANorB = 1, #[doc = "2: (!A) AND B"] - NOT_A_AND_B = 2, + NotAAndB = 2, #[doc = "3: !A"] - NOT_A = 3, + NotA = 3, #[doc = "4: A AND (!B)"] - A_AND_NOT_B = 4, + AAndNotB = 4, #[doc = "5: !B"] - NOT_B = 5, + NotB = 5, #[doc = "6: A XOR B"] - A_XOR_B = 6, + AXorB = 6, #[doc = "7: A NAND B"] - A_NAND_B = 7, + ANandB = 7, #[doc = "8: A AND B"] - A_AND_B = 8, + AAndB = 8, #[doc = "9: A XNOR B"] - A_XNOR_B = 9, + AXnorB = 9, #[doc = "10: B"] B = 10, #[doc = "11: (!A) OR B"] - NOT_A_OR_B = 11, + NotAOrB = 11, #[doc = "12: A"] A = 12, #[doc = "13: A OR (!B)"] - A_OR_NOT_B = 13, + AOrNotB = 13, #[doc = "14: A OR B"] - A_OR_B = 14, + AOrB = 14, #[doc = "15: Logical 1"] - LOGICAL_ONE = 15, + LogicalOne = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FNSEL_A) -> Self { + fn from(variant: Fnsel) -> Self { variant as _ } } -impl FNSEL_R { +impl crate::FieldSpec for Fnsel { + type Ux = u8; +} +impl crate::IsEnum for Fnsel {} +#[doc = "Field `FNSEL` reader - Function Select"] +pub type FnselR = crate::FieldReader; +impl FnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FNSEL_A { + pub const fn variant(&self) -> Fnsel { match self.bits { - 0 => FNSEL_A::LOGICAL_ZERO, - 1 => FNSEL_A::A_NOR_B, - 2 => FNSEL_A::NOT_A_AND_B, - 3 => FNSEL_A::NOT_A, - 4 => FNSEL_A::A_AND_NOT_B, - 5 => FNSEL_A::NOT_B, - 6 => FNSEL_A::A_XOR_B, - 7 => FNSEL_A::A_NAND_B, - 8 => FNSEL_A::A_AND_B, - 9 => FNSEL_A::A_XNOR_B, - 10 => FNSEL_A::B, - 11 => FNSEL_A::NOT_A_OR_B, - 12 => FNSEL_A::A, - 13 => FNSEL_A::A_OR_NOT_B, - 14 => FNSEL_A::A_OR_B, - 15 => FNSEL_A::LOGICAL_ONE, + 0 => Fnsel::LogicalZero, + 1 => Fnsel::ANorB, + 2 => Fnsel::NotAAndB, + 3 => Fnsel::NotA, + 4 => Fnsel::AAndNotB, + 5 => Fnsel::NotB, + 6 => Fnsel::AXorB, + 7 => Fnsel::ANandB, + 8 => Fnsel::AAndB, + 9 => Fnsel::AXnorB, + 10 => Fnsel::B, + 11 => Fnsel::NotAOrB, + 12 => Fnsel::A, + 13 => Fnsel::AOrNotB, + 14 => Fnsel::AOrB, + 15 => Fnsel::LogicalOne, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LOGICAL_ZERO`"] + #[doc = "Logical 0"] #[inline(always)] pub fn is_logical_zero(&self) -> bool { - *self == FNSEL_A::LOGICAL_ZERO + *self == Fnsel::LogicalZero } - #[doc = "Checks if the value of the field is `A_NOR_B`"] + #[doc = "A NOR B"] #[inline(always)] pub fn is_a_nor_b(&self) -> bool { - *self == FNSEL_A::A_NOR_B + *self == Fnsel::ANorB } - #[doc = "Checks if the value of the field is `NOT_A_AND_B`"] + #[doc = "(!A) AND B"] #[inline(always)] pub fn is_not_a_and_b(&self) -> bool { - *self == FNSEL_A::NOT_A_AND_B + *self == Fnsel::NotAAndB } - #[doc = "Checks if the value of the field is `NOT_A`"] + #[doc = "!A"] #[inline(always)] pub fn is_not_a(&self) -> bool { - *self == FNSEL_A::NOT_A + *self == Fnsel::NotA } - #[doc = "Checks if the value of the field is `A_AND_NOT_B`"] + #[doc = "A AND (!B)"] #[inline(always)] pub fn is_a_and_not_b(&self) -> bool { - *self == FNSEL_A::A_AND_NOT_B + *self == Fnsel::AAndNotB } - #[doc = "Checks if the value of the field is `NOT_B`"] + #[doc = "!B"] #[inline(always)] pub fn is_not_b(&self) -> bool { - *self == FNSEL_A::NOT_B + *self == Fnsel::NotB } - #[doc = "Checks if the value of the field is `A_XOR_B`"] + #[doc = "A XOR B"] #[inline(always)] pub fn is_a_xor_b(&self) -> bool { - *self == FNSEL_A::A_XOR_B + *self == Fnsel::AXorB } - #[doc = "Checks if the value of the field is `A_NAND_B`"] + #[doc = "A NAND B"] #[inline(always)] pub fn is_a_nand_b(&self) -> bool { - *self == FNSEL_A::A_NAND_B + *self == Fnsel::ANandB } - #[doc = "Checks if the value of the field is `A_AND_B`"] + #[doc = "A AND B"] #[inline(always)] pub fn is_a_and_b(&self) -> bool { - *self == FNSEL_A::A_AND_B + *self == Fnsel::AAndB } - #[doc = "Checks if the value of the field is `A_XNOR_B`"] + #[doc = "A XNOR B"] #[inline(always)] pub fn is_a_xnor_b(&self) -> bool { - *self == FNSEL_A::A_XNOR_B + *self == Fnsel::AXnorB } - #[doc = "Checks if the value of the field is `B`"] + #[doc = "B"] #[inline(always)] pub fn is_b(&self) -> bool { - *self == FNSEL_A::B + *self == Fnsel::B } - #[doc = "Checks if the value of the field is `NOT_A_OR_B`"] + #[doc = "(!A) OR B"] #[inline(always)] pub fn is_not_a_or_b(&self) -> bool { - *self == FNSEL_A::NOT_A_OR_B + *self == Fnsel::NotAOrB } - #[doc = "Checks if the value of the field is `A`"] + #[doc = "A"] #[inline(always)] pub fn is_a(&self) -> bool { - *self == FNSEL_A::A + *self == Fnsel::A } - #[doc = "Checks if the value of the field is `A_OR_NOT_B`"] + #[doc = "A OR (!B)"] #[inline(always)] pub fn is_a_or_not_b(&self) -> bool { - *self == FNSEL_A::A_OR_NOT_B + *self == Fnsel::AOrNotB } - #[doc = "Checks if the value of the field is `A_OR_B`"] + #[doc = "A OR B"] #[inline(always)] pub fn is_a_or_b(&self) -> bool { - *self == FNSEL_A::A_OR_B + *self == Fnsel::AOrB } - #[doc = "Checks if the value of the field is `LOGICAL_ONE`"] + #[doc = "Logical 1"] #[inline(always)] pub fn is_logical_one(&self) -> bool { - *self == FNSEL_A::LOGICAL_ONE + *self == Fnsel::LogicalOne } } #[doc = "Field `FNSEL` writer - Function Select"] -pub type FNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, ASYNC_CH9_CTRL_SPEC, u8, FNSEL_A, 4, O>; -impl<'a, const O: u8> FNSEL_W<'a, O> { +pub type FnselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Fnsel, crate::Safe>; +impl<'a, REG> FnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Logical 0"] #[inline(always)] - pub fn logical_zero(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ZERO) + pub fn logical_zero(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalZero) } #[doc = "A NOR B"] #[inline(always)] - pub fn a_nor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NOR_B) + pub fn a_nor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANorB) } #[doc = "(!A) AND B"] #[inline(always)] - pub fn not_a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_AND_B) + pub fn not_a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAAndB) } #[doc = "!A"] #[inline(always)] - pub fn not_a(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A) + pub fn not_a(self) -> &'a mut crate::W { + self.variant(Fnsel::NotA) } #[doc = "A AND (!B)"] #[inline(always)] - pub fn a_and_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_NOT_B) + pub fn a_and_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndNotB) } #[doc = "!B"] #[inline(always)] - pub fn not_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_B) + pub fn not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotB) } #[doc = "A XOR B"] #[inline(always)] - pub fn a_xor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XOR_B) + pub fn a_xor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXorB) } #[doc = "A NAND B"] #[inline(always)] - pub fn a_nand_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NAND_B) + pub fn a_nand_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANandB) } #[doc = "A AND B"] #[inline(always)] - pub fn a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_B) + pub fn a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndB) } #[doc = "A XNOR B"] #[inline(always)] - pub fn a_xnor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XNOR_B) + pub fn a_xnor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXnorB) } #[doc = "B"] #[inline(always)] - pub fn b(self) -> &'a mut W { - self.variant(FNSEL_A::B) + pub fn b(self) -> &'a mut crate::W { + self.variant(Fnsel::B) } #[doc = "(!A) OR B"] #[inline(always)] - pub fn not_a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_OR_B) + pub fn not_a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAOrB) } #[doc = "A"] #[inline(always)] - pub fn a(self) -> &'a mut W { - self.variant(FNSEL_A::A) + pub fn a(self) -> &'a mut crate::W { + self.variant(Fnsel::A) } #[doc = "A OR (!B)"] #[inline(always)] - pub fn a_or_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_NOT_B) + pub fn a_or_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrNotB) } #[doc = "A OR B"] #[inline(always)] - pub fn a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_B) + pub fn a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrB) } #[doc = "Logical 1"] #[inline(always)] - pub fn logical_one(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ONE) + pub fn logical_one(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalOne) } } #[doc = "Field `AUXSEL` reader - Aux Select"] -pub type AUXSEL_R = crate::FieldReader; +pub type AuxselR = crate::FieldReader; #[doc = "Field `AUXSEL` writer - Aux Select"] -pub type AUXSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ASYNC_CH9_CTRL_SPEC, u8, u8, 4, O>; +pub type AuxselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] - pub fn fnsel(&self) -> FNSEL_R { - FNSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fnsel(&self) -> FnselR { + FnselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] - pub fn auxsel(&self) -> AUXSEL_R { - AUXSEL_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn auxsel(&self) -> AuxselR { + AuxselR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] #[must_use] - pub fn fnsel(&mut self) -> FNSEL_W<16> { - FNSEL_W::new(self) + pub fn fnsel(&mut self) -> FnselW { + FnselW::new(self, 16) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] #[must_use] - pub fn auxsel(&mut self) -> AUXSEL_W<24> { - AUXSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn auxsel(&mut self) -> AuxselW { + AuxselW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_ch9_ctrl](index.html) module"] -pub struct ASYNC_CH9_CTRL_SPEC; -impl crate::RegisterSpec for ASYNC_CH9_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch9_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch9_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncCh9CtrlSpec; +impl crate::RegisterSpec for AsyncCh9CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_ch9_ctrl::R](R) reader structure"] -impl crate::Readable for ASYNC_CH9_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [async_ch9_ctrl::W](W) writer structure"] -impl crate::Writable for ASYNC_CH9_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`async_ch9_ctrl::R`](R) reader structure"] +impl crate::Readable for AsyncCh9CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`async_ch9_ctrl::W`](W) writer structure"] +impl crate::Writable for AsyncCh9CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_CH9_CTRL to value 0x000c_0000"] -impl crate::Resettable for ASYNC_CH9_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x000c_0000; +impl crate::Resettable for AsyncCh9CtrlSpec { + const RESET_VALUE: u32 = 0x000c_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_peek.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_peek.rs index 27e531b..ee00163 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_peek.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_peek.rs @@ -1,114 +1,99 @@ #[doc = "Register `ASYNC_PEEK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CH0VAL` reader - Channel 0 Current Value"] -pub type CH0VAL_R = crate::BitReader; +pub type Ch0valR = crate::BitReader; #[doc = "Field `CH1VAL` reader - Channel 1 Current Value"] -pub type CH1VAL_R = crate::BitReader; +pub type Ch1valR = crate::BitReader; #[doc = "Field `CH2VAL` reader - Channel 2 Current Value"] -pub type CH2VAL_R = crate::BitReader; +pub type Ch2valR = crate::BitReader; #[doc = "Field `CH3VAL` reader - Channel 3 Current Value"] -pub type CH3VAL_R = crate::BitReader; +pub type Ch3valR = crate::BitReader; #[doc = "Field `CH4VAL` reader - Channel 4 Current Value"] -pub type CH4VAL_R = crate::BitReader; +pub type Ch4valR = crate::BitReader; #[doc = "Field `CH5VAL` reader - Channel 5 Current Value"] -pub type CH5VAL_R = crate::BitReader; +pub type Ch5valR = crate::BitReader; #[doc = "Field `CH6VAL` reader - Channel 6 Current Value"] -pub type CH6VAL_R = crate::BitReader; +pub type Ch6valR = crate::BitReader; #[doc = "Field `CH7VAL` reader - Channel 7 Current Value"] -pub type CH7VAL_R = crate::BitReader; +pub type Ch7valR = crate::BitReader; #[doc = "Field `CH8VAL` reader - Channel 8 Current Value"] -pub type CH8VAL_R = crate::BitReader; +pub type Ch8valR = crate::BitReader; #[doc = "Field `CH9VAL` reader - Channel 9 Current Value"] -pub type CH9VAL_R = crate::BitReader; +pub type Ch9valR = crate::BitReader; #[doc = "Field `CH10VAL` reader - Channel 10 Current Value"] -pub type CH10VAL_R = crate::BitReader; +pub type Ch10valR = crate::BitReader; #[doc = "Field `CH11VAL` reader - Channel 11 Current Value"] -pub type CH11VAL_R = crate::BitReader; +pub type Ch11valR = crate::BitReader; impl R { #[doc = "Bit 0 - Channel 0 Current Value"] #[inline(always)] - pub fn ch0val(&self) -> CH0VAL_R { - CH0VAL_R::new((self.bits & 1) != 0) + pub fn ch0val(&self) -> Ch0valR { + Ch0valR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channel 1 Current Value"] #[inline(always)] - pub fn ch1val(&self) -> CH1VAL_R { - CH1VAL_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1val(&self) -> Ch1valR { + Ch1valR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Channel 2 Current Value"] #[inline(always)] - pub fn ch2val(&self) -> CH2VAL_R { - CH2VAL_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2val(&self) -> Ch2valR { + Ch2valR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Channel 3 Current Value"] #[inline(always)] - pub fn ch3val(&self) -> CH3VAL_R { - CH3VAL_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3val(&self) -> Ch3valR { + Ch3valR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Channel 4 Current Value"] #[inline(always)] - pub fn ch4val(&self) -> CH4VAL_R { - CH4VAL_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4val(&self) -> Ch4valR { + Ch4valR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Channel 5 Current Value"] #[inline(always)] - pub fn ch5val(&self) -> CH5VAL_R { - CH5VAL_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5val(&self) -> Ch5valR { + Ch5valR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Channel 6 Current Value"] #[inline(always)] - pub fn ch6val(&self) -> CH6VAL_R { - CH6VAL_R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6val(&self) -> Ch6valR { + Ch6valR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Channel 7 Current Value"] #[inline(always)] - pub fn ch7val(&self) -> CH7VAL_R { - CH7VAL_R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7val(&self) -> Ch7valR { + Ch7valR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Channel 8 Current Value"] #[inline(always)] - pub fn ch8val(&self) -> CH8VAL_R { - CH8VAL_R::new(((self.bits >> 8) & 1) != 0) + pub fn ch8val(&self) -> Ch8valR { + Ch8valR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Channel 9 Current Value"] #[inline(always)] - pub fn ch9val(&self) -> CH9VAL_R { - CH9VAL_R::new(((self.bits >> 9) & 1) != 0) + pub fn ch9val(&self) -> Ch9valR { + Ch9valR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Channel 10 Current Value"] #[inline(always)] - pub fn ch10val(&self) -> CH10VAL_R { - CH10VAL_R::new(((self.bits >> 10) & 1) != 0) + pub fn ch10val(&self) -> Ch10valR { + Ch10valR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Channel 11 Current Value"] #[inline(always)] - pub fn ch11val(&self) -> CH11VAL_R { - CH11VAL_R::new(((self.bits >> 11) & 1) != 0) + pub fn ch11val(&self) -> Ch11valR { + Ch11valR::new(((self.bits >> 11) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_peek](index.html) module"] -pub struct ASYNC_PEEK_SPEC; -impl crate::RegisterSpec for ASYNC_PEEK_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_peek::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncPeekSpec; +impl crate::RegisterSpec for AsyncPeekSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_peek::R](R) reader structure"] -impl crate::Readable for ASYNC_PEEK_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`async_peek::R`](R) reader structure"] +impl crate::Readable for AsyncPeekSpec {} #[doc = "`reset()` method sets ASYNC_PEEK to value 0"] -impl crate::Resettable for ASYNC_PEEK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for AsyncPeekSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_swlevel.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_swlevel.rs index 139e959..acb898e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_swlevel.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_swlevel.rs @@ -1,245 +1,205 @@ #[doc = "Register `ASYNC_SWLEVEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ASYNC_SWLEVEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CH0LEVEL` reader - Channel Level"] -pub type CH0LEVEL_R = crate::BitReader; +pub type Ch0levelR = crate::BitReader; #[doc = "Field `CH0LEVEL` writer - Channel Level"] -pub type CH0LEVEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWLEVEL_SPEC, bool, O>; +pub type Ch0levelW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1LEVEL` reader - Channel Level"] -pub type CH1LEVEL_R = crate::BitReader; +pub type Ch1levelR = crate::BitReader; #[doc = "Field `CH1LEVEL` writer - Channel Level"] -pub type CH1LEVEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWLEVEL_SPEC, bool, O>; +pub type Ch1levelW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2LEVEL` reader - Channel Level"] -pub type CH2LEVEL_R = crate::BitReader; +pub type Ch2levelR = crate::BitReader; #[doc = "Field `CH2LEVEL` writer - Channel Level"] -pub type CH2LEVEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWLEVEL_SPEC, bool, O>; +pub type Ch2levelW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3LEVEL` reader - Channel Level"] -pub type CH3LEVEL_R = crate::BitReader; +pub type Ch3levelR = crate::BitReader; #[doc = "Field `CH3LEVEL` writer - Channel Level"] -pub type CH3LEVEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWLEVEL_SPEC, bool, O>; +pub type Ch3levelW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH4LEVEL` reader - Channel Level"] -pub type CH4LEVEL_R = crate::BitReader; +pub type Ch4levelR = crate::BitReader; #[doc = "Field `CH4LEVEL` writer - Channel Level"] -pub type CH4LEVEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWLEVEL_SPEC, bool, O>; +pub type Ch4levelW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH5LEVEL` reader - Channel Level"] -pub type CH5LEVEL_R = crate::BitReader; +pub type Ch5levelR = crate::BitReader; #[doc = "Field `CH5LEVEL` writer - Channel Level"] -pub type CH5LEVEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWLEVEL_SPEC, bool, O>; +pub type Ch5levelW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH6LEVEL` reader - Channel Level"] -pub type CH6LEVEL_R = crate::BitReader; +pub type Ch6levelR = crate::BitReader; #[doc = "Field `CH6LEVEL` writer - Channel Level"] -pub type CH6LEVEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWLEVEL_SPEC, bool, O>; +pub type Ch6levelW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH7LEVEL` reader - Channel Level"] -pub type CH7LEVEL_R = crate::BitReader; +pub type Ch7levelR = crate::BitReader; #[doc = "Field `CH7LEVEL` writer - Channel Level"] -pub type CH7LEVEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWLEVEL_SPEC, bool, O>; +pub type Ch7levelW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH8LEVEL` reader - Channel Level"] -pub type CH8LEVEL_R = crate::BitReader; +pub type Ch8levelR = crate::BitReader; #[doc = "Field `CH8LEVEL` writer - Channel Level"] -pub type CH8LEVEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWLEVEL_SPEC, bool, O>; +pub type Ch8levelW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH9LEVEL` reader - Channel Level"] -pub type CH9LEVEL_R = crate::BitReader; +pub type Ch9levelR = crate::BitReader; #[doc = "Field `CH9LEVEL` writer - Channel Level"] -pub type CH9LEVEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWLEVEL_SPEC, bool, O>; +pub type Ch9levelW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH10LEVEL` reader - Channel Level"] -pub type CH10LEVEL_R = crate::BitReader; +pub type Ch10levelR = crate::BitReader; #[doc = "Field `CH10LEVEL` writer - Channel Level"] -pub type CH10LEVEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWLEVEL_SPEC, bool, O>; +pub type Ch10levelW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH11LEVEL` reader - Channel Level"] -pub type CH11LEVEL_R = crate::BitReader; +pub type Ch11levelR = crate::BitReader; #[doc = "Field `CH11LEVEL` writer - Channel Level"] -pub type CH11LEVEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWLEVEL_SPEC, bool, O>; +pub type Ch11levelW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Channel Level"] #[inline(always)] - pub fn ch0level(&self) -> CH0LEVEL_R { - CH0LEVEL_R::new((self.bits & 1) != 0) + pub fn ch0level(&self) -> Ch0levelR { + Ch0levelR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channel Level"] #[inline(always)] - pub fn ch1level(&self) -> CH1LEVEL_R { - CH1LEVEL_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1level(&self) -> Ch1levelR { + Ch1levelR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Channel Level"] #[inline(always)] - pub fn ch2level(&self) -> CH2LEVEL_R { - CH2LEVEL_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2level(&self) -> Ch2levelR { + Ch2levelR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Channel Level"] #[inline(always)] - pub fn ch3level(&self) -> CH3LEVEL_R { - CH3LEVEL_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3level(&self) -> Ch3levelR { + Ch3levelR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Channel Level"] #[inline(always)] - pub fn ch4level(&self) -> CH4LEVEL_R { - CH4LEVEL_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4level(&self) -> Ch4levelR { + Ch4levelR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Channel Level"] #[inline(always)] - pub fn ch5level(&self) -> CH5LEVEL_R { - CH5LEVEL_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5level(&self) -> Ch5levelR { + Ch5levelR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Channel Level"] #[inline(always)] - pub fn ch6level(&self) -> CH6LEVEL_R { - CH6LEVEL_R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6level(&self) -> Ch6levelR { + Ch6levelR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Channel Level"] #[inline(always)] - pub fn ch7level(&self) -> CH7LEVEL_R { - CH7LEVEL_R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7level(&self) -> Ch7levelR { + Ch7levelR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Channel Level"] #[inline(always)] - pub fn ch8level(&self) -> CH8LEVEL_R { - CH8LEVEL_R::new(((self.bits >> 8) & 1) != 0) + pub fn ch8level(&self) -> Ch8levelR { + Ch8levelR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Channel Level"] #[inline(always)] - pub fn ch9level(&self) -> CH9LEVEL_R { - CH9LEVEL_R::new(((self.bits >> 9) & 1) != 0) + pub fn ch9level(&self) -> Ch9levelR { + Ch9levelR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Channel Level"] #[inline(always)] - pub fn ch10level(&self) -> CH10LEVEL_R { - CH10LEVEL_R::new(((self.bits >> 10) & 1) != 0) + pub fn ch10level(&self) -> Ch10levelR { + Ch10levelR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Channel Level"] #[inline(always)] - pub fn ch11level(&self) -> CH11LEVEL_R { - CH11LEVEL_R::new(((self.bits >> 11) & 1) != 0) + pub fn ch11level(&self) -> Ch11levelR { + Ch11levelR::new(((self.bits >> 11) & 1) != 0) } } impl W { #[doc = "Bit 0 - Channel Level"] #[inline(always)] #[must_use] - pub fn ch0level(&mut self) -> CH0LEVEL_W<0> { - CH0LEVEL_W::new(self) + pub fn ch0level(&mut self) -> Ch0levelW { + Ch0levelW::new(self, 0) } #[doc = "Bit 1 - Channel Level"] #[inline(always)] #[must_use] - pub fn ch1level(&mut self) -> CH1LEVEL_W<1> { - CH1LEVEL_W::new(self) + pub fn ch1level(&mut self) -> Ch1levelW { + Ch1levelW::new(self, 1) } #[doc = "Bit 2 - Channel Level"] #[inline(always)] #[must_use] - pub fn ch2level(&mut self) -> CH2LEVEL_W<2> { - CH2LEVEL_W::new(self) + pub fn ch2level(&mut self) -> Ch2levelW { + Ch2levelW::new(self, 2) } #[doc = "Bit 3 - Channel Level"] #[inline(always)] #[must_use] - pub fn ch3level(&mut self) -> CH3LEVEL_W<3> { - CH3LEVEL_W::new(self) + pub fn ch3level(&mut self) -> Ch3levelW { + Ch3levelW::new(self, 3) } #[doc = "Bit 4 - Channel Level"] #[inline(always)] #[must_use] - pub fn ch4level(&mut self) -> CH4LEVEL_W<4> { - CH4LEVEL_W::new(self) + pub fn ch4level(&mut self) -> Ch4levelW { + Ch4levelW::new(self, 4) } #[doc = "Bit 5 - Channel Level"] #[inline(always)] #[must_use] - pub fn ch5level(&mut self) -> CH5LEVEL_W<5> { - CH5LEVEL_W::new(self) + pub fn ch5level(&mut self) -> Ch5levelW { + Ch5levelW::new(self, 5) } #[doc = "Bit 6 - Channel Level"] #[inline(always)] #[must_use] - pub fn ch6level(&mut self) -> CH6LEVEL_W<6> { - CH6LEVEL_W::new(self) + pub fn ch6level(&mut self) -> Ch6levelW { + Ch6levelW::new(self, 6) } #[doc = "Bit 7 - Channel Level"] #[inline(always)] #[must_use] - pub fn ch7level(&mut self) -> CH7LEVEL_W<7> { - CH7LEVEL_W::new(self) + pub fn ch7level(&mut self) -> Ch7levelW { + Ch7levelW::new(self, 7) } #[doc = "Bit 8 - Channel Level"] #[inline(always)] #[must_use] - pub fn ch8level(&mut self) -> CH8LEVEL_W<8> { - CH8LEVEL_W::new(self) + pub fn ch8level(&mut self) -> Ch8levelW { + Ch8levelW::new(self, 8) } #[doc = "Bit 9 - Channel Level"] #[inline(always)] #[must_use] - pub fn ch9level(&mut self) -> CH9LEVEL_W<9> { - CH9LEVEL_W::new(self) + pub fn ch9level(&mut self) -> Ch9levelW { + Ch9levelW::new(self, 9) } #[doc = "Bit 10 - Channel Level"] #[inline(always)] #[must_use] - pub fn ch10level(&mut self) -> CH10LEVEL_W<10> { - CH10LEVEL_W::new(self) + pub fn ch10level(&mut self) -> Ch10levelW { + Ch10levelW::new(self, 10) } #[doc = "Bit 11 - Channel Level"] #[inline(always)] #[must_use] - pub fn ch11level(&mut self) -> CH11LEVEL_W<11> { - CH11LEVEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ch11level(&mut self) -> Ch11levelW { + Ch11levelW::new(self, 11) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_swlevel](index.html) module"] -pub struct ASYNC_SWLEVEL_SPEC; -impl crate::RegisterSpec for ASYNC_SWLEVEL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_swlevel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_swlevel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncSwlevelSpec; +impl crate::RegisterSpec for AsyncSwlevelSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_swlevel::R](R) reader structure"] -impl crate::Readable for ASYNC_SWLEVEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [async_swlevel::W](W) writer structure"] -impl crate::Writable for ASYNC_SWLEVEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`async_swlevel::R`](R) reader structure"] +impl crate::Readable for AsyncSwlevelSpec {} +#[doc = "`write(|w| ..)` method takes [`async_swlevel::W`](W) writer structure"] +impl crate::Writable for AsyncSwlevelSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_SWLEVEL to value 0"] -impl crate::Resettable for ASYNC_SWLEVEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for AsyncSwlevelSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_swpulse.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_swpulse.rs index 0ba83a7..233c01c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_swpulse.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/async_swpulse.rs @@ -1,140 +1,115 @@ #[doc = "Register `ASYNC_SWPULSE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CH0PULSE` writer - Channel pulse"] -pub type CH0PULSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWPULSE_SPEC, bool, O>; +pub type Ch0pulseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1PULSE` writer - Channel pulse"] -pub type CH1PULSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWPULSE_SPEC, bool, O>; +pub type Ch1pulseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2PULSE` writer - Channel pulse"] -pub type CH2PULSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWPULSE_SPEC, bool, O>; +pub type Ch2pulseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3PULSE` writer - Channel pulse"] -pub type CH3PULSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWPULSE_SPEC, bool, O>; +pub type Ch3pulseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH4PULSE` writer - Channel pulse"] -pub type CH4PULSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWPULSE_SPEC, bool, O>; +pub type Ch4pulseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH5PULSE` writer - Channel pulse"] -pub type CH5PULSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWPULSE_SPEC, bool, O>; +pub type Ch5pulseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH6PULSE` writer - Channel pulse"] -pub type CH6PULSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWPULSE_SPEC, bool, O>; +pub type Ch6pulseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH7PULSE` writer - Channel pulse"] -pub type CH7PULSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWPULSE_SPEC, bool, O>; +pub type Ch7pulseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH8PULSE` writer - Channel pulse"] -pub type CH8PULSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWPULSE_SPEC, bool, O>; +pub type Ch8pulseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH9PULSE` writer - Channel pulse"] -pub type CH9PULSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWPULSE_SPEC, bool, O>; +pub type Ch9pulseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH10PULSE` writer - Channel pulse"] -pub type CH10PULSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWPULSE_SPEC, bool, O>; +pub type Ch10pulseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH11PULSE` writer - Channel pulse"] -pub type CH11PULSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWPULSE_SPEC, bool, O>; +pub type Ch11pulseW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Channel pulse"] #[inline(always)] #[must_use] - pub fn ch0pulse(&mut self) -> CH0PULSE_W<0> { - CH0PULSE_W::new(self) + pub fn ch0pulse(&mut self) -> Ch0pulseW { + Ch0pulseW::new(self, 0) } #[doc = "Bit 1 - Channel pulse"] #[inline(always)] #[must_use] - pub fn ch1pulse(&mut self) -> CH1PULSE_W<1> { - CH1PULSE_W::new(self) + pub fn ch1pulse(&mut self) -> Ch1pulseW { + Ch1pulseW::new(self, 1) } #[doc = "Bit 2 - Channel pulse"] #[inline(always)] #[must_use] - pub fn ch2pulse(&mut self) -> CH2PULSE_W<2> { - CH2PULSE_W::new(self) + pub fn ch2pulse(&mut self) -> Ch2pulseW { + Ch2pulseW::new(self, 2) } #[doc = "Bit 3 - Channel pulse"] #[inline(always)] #[must_use] - pub fn ch3pulse(&mut self) -> CH3PULSE_W<3> { - CH3PULSE_W::new(self) + pub fn ch3pulse(&mut self) -> Ch3pulseW { + Ch3pulseW::new(self, 3) } #[doc = "Bit 4 - Channel pulse"] #[inline(always)] #[must_use] - pub fn ch4pulse(&mut self) -> CH4PULSE_W<4> { - CH4PULSE_W::new(self) + pub fn ch4pulse(&mut self) -> Ch4pulseW { + Ch4pulseW::new(self, 4) } #[doc = "Bit 5 - Channel pulse"] #[inline(always)] #[must_use] - pub fn ch5pulse(&mut self) -> CH5PULSE_W<5> { - CH5PULSE_W::new(self) + pub fn ch5pulse(&mut self) -> Ch5pulseW { + Ch5pulseW::new(self, 5) } #[doc = "Bit 6 - Channel pulse"] #[inline(always)] #[must_use] - pub fn ch6pulse(&mut self) -> CH6PULSE_W<6> { - CH6PULSE_W::new(self) + pub fn ch6pulse(&mut self) -> Ch6pulseW { + Ch6pulseW::new(self, 6) } #[doc = "Bit 7 - Channel pulse"] #[inline(always)] #[must_use] - pub fn ch7pulse(&mut self) -> CH7PULSE_W<7> { - CH7PULSE_W::new(self) + pub fn ch7pulse(&mut self) -> Ch7pulseW { + Ch7pulseW::new(self, 7) } #[doc = "Bit 8 - Channel pulse"] #[inline(always)] #[must_use] - pub fn ch8pulse(&mut self) -> CH8PULSE_W<8> { - CH8PULSE_W::new(self) + pub fn ch8pulse(&mut self) -> Ch8pulseW { + Ch8pulseW::new(self, 8) } #[doc = "Bit 9 - Channel pulse"] #[inline(always)] #[must_use] - pub fn ch9pulse(&mut self) -> CH9PULSE_W<9> { - CH9PULSE_W::new(self) + pub fn ch9pulse(&mut self) -> Ch9pulseW { + Ch9pulseW::new(self, 9) } #[doc = "Bit 10 - Channel pulse"] #[inline(always)] #[must_use] - pub fn ch10pulse(&mut self) -> CH10PULSE_W<10> { - CH10PULSE_W::new(self) + pub fn ch10pulse(&mut self) -> Ch10pulseW { + Ch10pulseW::new(self, 10) } #[doc = "Bit 11 - Channel pulse"] #[inline(always)] #[must_use] - pub fn ch11pulse(&mut self) -> CH11PULSE_W<11> { - CH11PULSE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ch11pulse(&mut self) -> Ch11pulseW { + Ch11pulseW::new(self, 11) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_swpulse](index.html) module"] -pub struct ASYNC_SWPULSE_SPEC; -impl crate::RegisterSpec for ASYNC_SWPULSE_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_swpulse::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncSwpulseSpec; +impl crate::RegisterSpec for AsyncSwpulseSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [async_swpulse::W](W) writer structure"] -impl crate::Writable for ASYNC_SWPULSE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`async_swpulse::W`](W) writer structure"] +impl crate::Writable for AsyncSwpulseSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_SWPULSE to value 0"] -impl crate::Resettable for ASYNC_SWPULSE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for AsyncSwpulseSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_cmu_caldn.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_cmu_caldn.rs index 509a27c..72fe013 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_cmu_caldn.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_cmu_caldn.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_CMU_CALDN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_CMU_CALDN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CALDN async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CALDN async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_CMU_CALDN_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - CALDN async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - CALDN async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "CALDN consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_cmu_caldn](index.html) module"] -pub struct CONSUMER_CMU_CALDN_SPEC; -impl crate::RegisterSpec for CONSUMER_CMU_CALDN_SPEC { +#[doc = "CALDN consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_cmu_caldn::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_cmu_caldn::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerCmuCaldnSpec; +impl crate::RegisterSpec for ConsumerCmuCaldnSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_cmu_caldn::R](R) reader structure"] -impl crate::Readable for CONSUMER_CMU_CALDN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_cmu_caldn::W](W) writer structure"] -impl crate::Writable for CONSUMER_CMU_CALDN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_cmu_caldn::R`](R) reader structure"] +impl crate::Readable for ConsumerCmuCaldnSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_cmu_caldn::W`](W) writer structure"] +impl crate::Writable for ConsumerCmuCaldnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_CMU_CALDN to value 0"] -impl crate::Resettable for CONSUMER_CMU_CALDN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerCmuCaldnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_cmu_calup.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_cmu_calup.rs index b5d631b..f9d52f4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_cmu_calup.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_cmu_calup.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_CMU_CALUP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_CMU_CALUP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CALUP async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CALUP async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_CMU_CALUP_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - CALUP async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - CALUP async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "CALUP Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_cmu_calup](index.html) module"] -pub struct CONSUMER_CMU_CALUP_SPEC; -impl crate::RegisterSpec for CONSUMER_CMU_CALUP_SPEC { +#[doc = "CALUP Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_cmu_calup::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_cmu_calup::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerCmuCalupSpec; +impl crate::RegisterSpec for ConsumerCmuCalupSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_cmu_calup::R](R) reader structure"] -impl crate::Readable for CONSUMER_CMU_CALUP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_cmu_calup::W](W) writer structure"] -impl crate::Writable for CONSUMER_CMU_CALUP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_cmu_calup::R`](R) reader structure"] +impl crate::Readable for ConsumerCmuCalupSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_cmu_calup::W`](W) writer structure"] +impl crate::Writable for ConsumerCmuCalupSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_CMU_CALUP to value 0"] -impl crate::Resettable for CONSUMER_CMU_CALUP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerCmuCalupSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_core_ctiin0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_core_ctiin0.rs index cae99a5..bb1fa9f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_core_ctiin0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_core_ctiin0.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_CORE_CTIIN0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_CORE_CTIIN0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_CORE_CTIIN0_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - CTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - CTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "CTI Consumer Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_core_ctiin0](index.html) module"] -pub struct CONSUMER_CORE_CTIIN0_SPEC; -impl crate::RegisterSpec for CONSUMER_CORE_CTIIN0_SPEC { +#[doc = "CTI Consumer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_core_ctiin0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_core_ctiin0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerCoreCtiin0Spec; +impl crate::RegisterSpec for ConsumerCoreCtiin0Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_core_ctiin0::R](R) reader structure"] -impl crate::Readable for CONSUMER_CORE_CTIIN0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_core_ctiin0::W](W) writer structure"] -impl crate::Writable for CONSUMER_CORE_CTIIN0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_core_ctiin0::R`](R) reader structure"] +impl crate::Readable for ConsumerCoreCtiin0Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_core_ctiin0::W`](W) writer structure"] +impl crate::Writable for ConsumerCoreCtiin0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_CORE_CTIIN0 to value 0"] -impl crate::Resettable for CONSUMER_CORE_CTIIN0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerCoreCtiin0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_core_ctiin1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_core_ctiin1.rs index dc522a5..0be4956 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_core_ctiin1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_core_ctiin1.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_CORE_CTIIN1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_CORE_CTIIN1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_CORE_CTIIN1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - CTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - CTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "CTI Consumer Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_core_ctiin1](index.html) module"] -pub struct CONSUMER_CORE_CTIIN1_SPEC; -impl crate::RegisterSpec for CONSUMER_CORE_CTIIN1_SPEC { +#[doc = "CTI Consumer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_core_ctiin1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_core_ctiin1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerCoreCtiin1Spec; +impl crate::RegisterSpec for ConsumerCoreCtiin1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_core_ctiin1::R](R) reader structure"] -impl crate::Readable for CONSUMER_CORE_CTIIN1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_core_ctiin1::W](W) writer structure"] -impl crate::Writable for CONSUMER_CORE_CTIIN1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_core_ctiin1::R`](R) reader structure"] +impl crate::Readable for ConsumerCoreCtiin1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_core_ctiin1::W`](W) writer structure"] +impl crate::Writable for ConsumerCoreCtiin1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_CORE_CTIIN1 to value 0"] -impl crate::Resettable for CONSUMER_CORE_CTIIN1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerCoreCtiin1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_core_ctiin2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_core_ctiin2.rs index 0e775d7..f94a862 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_core_ctiin2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_core_ctiin2.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_CORE_CTIIN2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_CORE_CTIIN2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_CORE_CTIIN2_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - CTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - CTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "CTI Consumer Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_core_ctiin2](index.html) module"] -pub struct CONSUMER_CORE_CTIIN2_SPEC; -impl crate::RegisterSpec for CONSUMER_CORE_CTIIN2_SPEC { +#[doc = "CTI Consumer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_core_ctiin2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_core_ctiin2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerCoreCtiin2Spec; +impl crate::RegisterSpec for ConsumerCoreCtiin2Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_core_ctiin2::R](R) reader structure"] -impl crate::Readable for CONSUMER_CORE_CTIIN2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_core_ctiin2::W](W) writer structure"] -impl crate::Writable for CONSUMER_CORE_CTIIN2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_core_ctiin2::R`](R) reader structure"] +impl crate::Readable for ConsumerCoreCtiin2Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_core_ctiin2::W`](W) writer structure"] +impl crate::Writable for ConsumerCoreCtiin2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_CORE_CTIIN2 to value 0"] -impl crate::Resettable for CONSUMER_CORE_CTIIN2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerCoreCtiin2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_core_ctiin3.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_core_ctiin3.rs index 853f837..ae7bf65 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_core_ctiin3.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_core_ctiin3.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_CORE_CTIIN3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_CORE_CTIIN3` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_CORE_CTIIN3_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - CTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - CTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "CTI Consumer Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_core_ctiin3](index.html) module"] -pub struct CONSUMER_CORE_CTIIN3_SPEC; -impl crate::RegisterSpec for CONSUMER_CORE_CTIIN3_SPEC { +#[doc = "CTI Consumer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_core_ctiin3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_core_ctiin3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerCoreCtiin3Spec; +impl crate::RegisterSpec for ConsumerCoreCtiin3Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_core_ctiin3::R](R) reader structure"] -impl crate::Readable for CONSUMER_CORE_CTIIN3_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_core_ctiin3::W](W) writer structure"] -impl crate::Writable for CONSUMER_CORE_CTIIN3_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_core_ctiin3::R`](R) reader structure"] +impl crate::Readable for ConsumerCoreCtiin3Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_core_ctiin3::W`](W) writer structure"] +impl crate::Writable for ConsumerCoreCtiin3Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_CORE_CTIIN3 to value 0"] -impl crate::Resettable for CONSUMER_CORE_CTIIN3_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerCoreCtiin3Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_core_m33rxev.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_core_m33rxev.rs index 5af4b0f..9b5c345 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_core_m33rxev.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_core_m33rxev.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_CORE_M33RXEV` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_CORE_M33RXEV` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - M33 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - M33 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_CORE_M33RXEV_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - M33 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - M33 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "M33 Consumer Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_core_m33rxev](index.html) module"] -pub struct CONSUMER_CORE_M33RXEV_SPEC; -impl crate::RegisterSpec for CONSUMER_CORE_M33RXEV_SPEC { +#[doc = "M33 Consumer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_core_m33rxev::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_core_m33rxev::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerCoreM33rxevSpec; +impl crate::RegisterSpec for ConsumerCoreM33rxevSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_core_m33rxev::R](R) reader structure"] -impl crate::Readable for CONSUMER_CORE_M33RXEV_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_core_m33rxev::W](W) writer structure"] -impl crate::Writable for CONSUMER_CORE_M33RXEV_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_core_m33rxev::R`](R) reader structure"] +impl crate::Readable for ConsumerCoreM33rxevSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_core_m33rxev::W`](W) writer structure"] +impl crate::Writable for ConsumerCoreM33rxevSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_CORE_M33RXEV to value 0"] -impl crate::Resettable for CONSUMER_CORE_M33RXEV_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerCoreM33rxevSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart0_clk.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart0_clk.rs index 864e43b..10bb315 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart0_clk.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart0_clk.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_EUSART0_CLK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_EUSART0_CLK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CLK async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CLK async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_EUSART0_CLK_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - CLK async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - CLK async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "CLK consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_eusart0_clk](index.html) module"] -pub struct CONSUMER_EUSART0_CLK_SPEC; -impl crate::RegisterSpec for CONSUMER_EUSART0_CLK_SPEC { +#[doc = "CLK consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart0_clk::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart0_clk::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerEusart0ClkSpec; +impl crate::RegisterSpec for ConsumerEusart0ClkSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_eusart0_clk::R](R) reader structure"] -impl crate::Readable for CONSUMER_EUSART0_CLK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_eusart0_clk::W](W) writer structure"] -impl crate::Writable for CONSUMER_EUSART0_CLK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_eusart0_clk::R`](R) reader structure"] +impl crate::Readable for ConsumerEusart0ClkSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_eusart0_clk::W`](W) writer structure"] +impl crate::Writable for ConsumerEusart0ClkSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_EUSART0_CLK to value 0"] -impl crate::Resettable for CONSUMER_EUSART0_CLK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerEusart0ClkSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart0_rx.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart0_rx.rs index 399c87e..a057d66 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart0_rx.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart0_rx.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_EUSART0_RX` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_EUSART0_RX` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - RX async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - RX async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_EUSART0_RX_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - RX async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - RX async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "RX Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_eusart0_rx](index.html) module"] -pub struct CONSUMER_EUSART0_RX_SPEC; -impl crate::RegisterSpec for CONSUMER_EUSART0_RX_SPEC { +#[doc = "RX Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart0_rx::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart0_rx::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerEusart0RxSpec; +impl crate::RegisterSpec for ConsumerEusart0RxSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_eusart0_rx::R](R) reader structure"] -impl crate::Readable for CONSUMER_EUSART0_RX_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_eusart0_rx::W](W) writer structure"] -impl crate::Writable for CONSUMER_EUSART0_RX_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_eusart0_rx::R`](R) reader structure"] +impl crate::Readable for ConsumerEusart0RxSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_eusart0_rx::W`](W) writer structure"] +impl crate::Writable for ConsumerEusart0RxSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_EUSART0_RX to value 0"] -impl crate::Resettable for CONSUMER_EUSART0_RX_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerEusart0RxSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart0_trigger.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart0_trigger.rs index 5f690e6..93c6df4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart0_trigger.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart0_trigger.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_EUSART0_TRIGGER` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_EUSART0_TRIGGER` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - TRIGGER async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - TRIGGER async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_EUSART0_TRIGGER_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - TRIGGER async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - TRIGGER async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "TRIGGER Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_eusart0_trigger](index.html) module"] -pub struct CONSUMER_EUSART0_TRIGGER_SPEC; -impl crate::RegisterSpec for CONSUMER_EUSART0_TRIGGER_SPEC { +#[doc = "TRIGGER Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart0_trigger::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart0_trigger::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerEusart0TriggerSpec; +impl crate::RegisterSpec for ConsumerEusart0TriggerSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_eusart0_trigger::R](R) reader structure"] -impl crate::Readable for CONSUMER_EUSART0_TRIGGER_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_eusart0_trigger::W](W) writer structure"] -impl crate::Writable for CONSUMER_EUSART0_TRIGGER_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_eusart0_trigger::R`](R) reader structure"] +impl crate::Readable for ConsumerEusart0TriggerSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_eusart0_trigger::W`](W) writer structure"] +impl crate::Writable for ConsumerEusart0TriggerSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_EUSART0_TRIGGER to value 0"] -impl crate::Resettable for CONSUMER_EUSART0_TRIGGER_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerEusart0TriggerSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart1_clk.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart1_clk.rs index 9ac213b..26cc900 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart1_clk.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart1_clk.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_EUSART1_CLK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_EUSART1_CLK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CLK async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CLK async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_EUSART1_CLK_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - CLK async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - CLK async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "CLK consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_eusart1_clk](index.html) module"] -pub struct CONSUMER_EUSART1_CLK_SPEC; -impl crate::RegisterSpec for CONSUMER_EUSART1_CLK_SPEC { +#[doc = "CLK consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart1_clk::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart1_clk::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerEusart1ClkSpec; +impl crate::RegisterSpec for ConsumerEusart1ClkSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_eusart1_clk::R](R) reader structure"] -impl crate::Readable for CONSUMER_EUSART1_CLK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_eusart1_clk::W](W) writer structure"] -impl crate::Writable for CONSUMER_EUSART1_CLK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_eusart1_clk::R`](R) reader structure"] +impl crate::Readable for ConsumerEusart1ClkSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_eusart1_clk::W`](W) writer structure"] +impl crate::Writable for ConsumerEusart1ClkSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_EUSART1_CLK to value 0"] -impl crate::Resettable for CONSUMER_EUSART1_CLK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerEusart1ClkSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart1_rx.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart1_rx.rs index e67c2f3..18647cc 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart1_rx.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart1_rx.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_EUSART1_RX` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_EUSART1_RX` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - RX async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - RX async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_EUSART1_RX_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - RX async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - RX async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "RX Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_eusart1_rx](index.html) module"] -pub struct CONSUMER_EUSART1_RX_SPEC; -impl crate::RegisterSpec for CONSUMER_EUSART1_RX_SPEC { +#[doc = "RX Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart1_rx::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart1_rx::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerEusart1RxSpec; +impl crate::RegisterSpec for ConsumerEusart1RxSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_eusart1_rx::R](R) reader structure"] -impl crate::Readable for CONSUMER_EUSART1_RX_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_eusart1_rx::W](W) writer structure"] -impl crate::Writable for CONSUMER_EUSART1_RX_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_eusart1_rx::R`](R) reader structure"] +impl crate::Readable for ConsumerEusart1RxSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_eusart1_rx::W`](W) writer structure"] +impl crate::Writable for ConsumerEusart1RxSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_EUSART1_RX to value 0"] -impl crate::Resettable for CONSUMER_EUSART1_RX_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerEusart1RxSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart1_trigger.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart1_trigger.rs index acda99a..cd1a1d1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart1_trigger.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart1_trigger.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_EUSART1_TRIGGER` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_EUSART1_TRIGGER` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - TRIGGER async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - TRIGGER async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_EUSART1_TRIGGER_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - TRIGGER async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - TRIGGER async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "TRIGGER Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_eusart1_trigger](index.html) module"] -pub struct CONSUMER_EUSART1_TRIGGER_SPEC; -impl crate::RegisterSpec for CONSUMER_EUSART1_TRIGGER_SPEC { +#[doc = "TRIGGER Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart1_trigger::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart1_trigger::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerEusart1TriggerSpec; +impl crate::RegisterSpec for ConsumerEusart1TriggerSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_eusart1_trigger::R](R) reader structure"] -impl crate::Readable for CONSUMER_EUSART1_TRIGGER_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_eusart1_trigger::W](W) writer structure"] -impl crate::Writable for CONSUMER_EUSART1_TRIGGER_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_eusart1_trigger::R`](R) reader structure"] +impl crate::Readable for ConsumerEusart1TriggerSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_eusart1_trigger::W`](W) writer structure"] +impl crate::Writable for ConsumerEusart1TriggerSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_EUSART1_TRIGGER to value 0"] -impl crate::Resettable for CONSUMER_EUSART1_TRIGGER_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerEusart1TriggerSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart2_clk.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart2_clk.rs index b783e2d..0953166 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart2_clk.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart2_clk.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_EUSART2_CLK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_EUSART2_CLK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CLK async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CLK async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_EUSART2_CLK_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - CLK async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - CLK async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "CLK consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_eusart2_clk](index.html) module"] -pub struct CONSUMER_EUSART2_CLK_SPEC; -impl crate::RegisterSpec for CONSUMER_EUSART2_CLK_SPEC { +#[doc = "CLK consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart2_clk::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart2_clk::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerEusart2ClkSpec; +impl crate::RegisterSpec for ConsumerEusart2ClkSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_eusart2_clk::R](R) reader structure"] -impl crate::Readable for CONSUMER_EUSART2_CLK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_eusart2_clk::W](W) writer structure"] -impl crate::Writable for CONSUMER_EUSART2_CLK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_eusart2_clk::R`](R) reader structure"] +impl crate::Readable for ConsumerEusart2ClkSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_eusart2_clk::W`](W) writer structure"] +impl crate::Writable for ConsumerEusart2ClkSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_EUSART2_CLK to value 0"] -impl crate::Resettable for CONSUMER_EUSART2_CLK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerEusart2ClkSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart2_rx.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart2_rx.rs index bb58f55..440a88b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart2_rx.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart2_rx.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_EUSART2_RX` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_EUSART2_RX` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - RX async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - RX async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_EUSART2_RX_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - RX async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - RX async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "RX Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_eusart2_rx](index.html) module"] -pub struct CONSUMER_EUSART2_RX_SPEC; -impl crate::RegisterSpec for CONSUMER_EUSART2_RX_SPEC { +#[doc = "RX Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart2_rx::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart2_rx::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerEusart2RxSpec; +impl crate::RegisterSpec for ConsumerEusart2RxSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_eusart2_rx::R](R) reader structure"] -impl crate::Readable for CONSUMER_EUSART2_RX_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_eusart2_rx::W](W) writer structure"] -impl crate::Writable for CONSUMER_EUSART2_RX_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_eusart2_rx::R`](R) reader structure"] +impl crate::Readable for ConsumerEusart2RxSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_eusart2_rx::W`](W) writer structure"] +impl crate::Writable for ConsumerEusart2RxSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_EUSART2_RX to value 0"] -impl crate::Resettable for CONSUMER_EUSART2_RX_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerEusart2RxSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart2_trigger.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart2_trigger.rs index 5f29a76..eefcf1a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart2_trigger.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_eusart2_trigger.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_EUSART2_TRIGGER` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_EUSART2_TRIGGER` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - TRIGGER async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - TRIGGER async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_EUSART2_TRIGGER_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - TRIGGER async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - TRIGGER async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "TRIGGER Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_eusart2_trigger](index.html) module"] -pub struct CONSUMER_EUSART2_TRIGGER_SPEC; -impl crate::RegisterSpec for CONSUMER_EUSART2_TRIGGER_SPEC { +#[doc = "TRIGGER Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart2_trigger::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart2_trigger::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerEusart2TriggerSpec; +impl crate::RegisterSpec for ConsumerEusart2TriggerSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_eusart2_trigger::R](R) reader structure"] -impl crate::Readable for CONSUMER_EUSART2_TRIGGER_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_eusart2_trigger::W](W) writer structure"] -impl crate::Writable for CONSUMER_EUSART2_TRIGGER_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_eusart2_trigger::R`](R) reader structure"] +impl crate::Readable for ConsumerEusart2TriggerSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_eusart2_trigger::W`](W) writer structure"] +impl crate::Writable for ConsumerEusart2TriggerSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_EUSART2_TRIGGER to value 0"] -impl crate::Resettable for CONSUMER_EUSART2_TRIGGER_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerEusart2TriggerSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_hfxo0_oscreq.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_hfxo0_oscreq.rs index 534d890..c725e08 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_hfxo0_oscreq.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_hfxo0_oscreq.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_HFXO0_OSCREQ` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_HFXO0_OSCREQ` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - OSC async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - OSC async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_HFXO0_OSCREQ_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - OSC async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - OSC async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "OSCREQ consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_hfxo0_oscreq](index.html) module"] -pub struct CONSUMER_HFXO0_OSCREQ_SPEC; -impl crate::RegisterSpec for CONSUMER_HFXO0_OSCREQ_SPEC { +#[doc = "OSCREQ consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_hfxo0_oscreq::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_hfxo0_oscreq::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerHfxo0OscreqSpec; +impl crate::RegisterSpec for ConsumerHfxo0OscreqSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_hfxo0_oscreq::R](R) reader structure"] -impl crate::Readable for CONSUMER_HFXO0_OSCREQ_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_hfxo0_oscreq::W](W) writer structure"] -impl crate::Writable for CONSUMER_HFXO0_OSCREQ_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_hfxo0_oscreq::R`](R) reader structure"] +impl crate::Readable for ConsumerHfxo0OscreqSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_hfxo0_oscreq::W`](W) writer structure"] +impl crate::Writable for ConsumerHfxo0OscreqSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_HFXO0_OSCREQ to value 0"] -impl crate::Resettable for CONSUMER_HFXO0_OSCREQ_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerHfxo0OscreqSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_hfxo0_timeout.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_hfxo0_timeout.rs index fedd9f9..2d4cb8f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_hfxo0_timeout.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_hfxo0_timeout.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_HFXO0_TIMEOUT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_HFXO0_TIMEOUT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - TIMEOUT async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - TIMEOUT async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_HFXO0_TIMEOUT_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - TIMEOUT async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - TIMEOUT async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "TIMEOUT Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_hfxo0_timeout](index.html) module"] -pub struct CONSUMER_HFXO0_TIMEOUT_SPEC; -impl crate::RegisterSpec for CONSUMER_HFXO0_TIMEOUT_SPEC { +#[doc = "TIMEOUT Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_hfxo0_timeout::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_hfxo0_timeout::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerHfxo0TimeoutSpec; +impl crate::RegisterSpec for ConsumerHfxo0TimeoutSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_hfxo0_timeout::R](R) reader structure"] -impl crate::Readable for CONSUMER_HFXO0_TIMEOUT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_hfxo0_timeout::W](W) writer structure"] -impl crate::Writable for CONSUMER_HFXO0_TIMEOUT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_hfxo0_timeout::R`](R) reader structure"] +impl crate::Readable for ConsumerHfxo0TimeoutSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_hfxo0_timeout::W`](W) writer structure"] +impl crate::Writable for ConsumerHfxo0TimeoutSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_HFXO0_TIMEOUT to value 0"] -impl crate::Resettable for CONSUMER_HFXO0_TIMEOUT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerHfxo0TimeoutSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_iadc0_scantrigger.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_iadc0_scantrigger.rs index c6ea999..0be67d0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_iadc0_scantrigger.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_iadc0_scantrigger.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_IADC0_SCANTRIGGER` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_IADC0_SCANTRIGGER` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - SCAN async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - SCAN async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_IADC0_SCANTRIGGER_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - SCAN sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - SCAN sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_IADC0_SCANTRIGGER_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - SCAN async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - SCAN sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - SCAN async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - SCAN sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "SCAN consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_iadc0_scantrigger](index.html) module"] -pub struct CONSUMER_IADC0_SCANTRIGGER_SPEC; -impl crate::RegisterSpec for CONSUMER_IADC0_SCANTRIGGER_SPEC { +#[doc = "SCAN consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_iadc0_scantrigger::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_iadc0_scantrigger::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerIadc0ScantriggerSpec; +impl crate::RegisterSpec for ConsumerIadc0ScantriggerSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_iadc0_scantrigger::R](R) reader structure"] -impl crate::Readable for CONSUMER_IADC0_SCANTRIGGER_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_iadc0_scantrigger::W](W) writer structure"] -impl crate::Writable for CONSUMER_IADC0_SCANTRIGGER_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_iadc0_scantrigger::R`](R) reader structure"] +impl crate::Readable for ConsumerIadc0ScantriggerSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_iadc0_scantrigger::W`](W) writer structure"] +impl crate::Writable for ConsumerIadc0ScantriggerSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_IADC0_SCANTRIGGER to value 0"] -impl crate::Resettable for CONSUMER_IADC0_SCANTRIGGER_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerIadc0ScantriggerSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_iadc0_singletrigger.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_iadc0_singletrigger.rs index b038822..a26b07e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_iadc0_singletrigger.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_iadc0_singletrigger.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_IADC0_SINGLETRIGGER` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_IADC0_SINGLETRIGGER` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - SINGLE async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - SINGLE async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_IADC0_SINGLETRIGGER_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - SINGLE sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - SINGLE sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_IADC0_SINGLETRIGGER_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - SINGLE async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - SINGLE sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - SINGLE async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - SINGLE sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "SINGLE Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_iadc0_singletrigger](index.html) module"] -pub struct CONSUMER_IADC0_SINGLETRIGGER_SPEC; -impl crate::RegisterSpec for CONSUMER_IADC0_SINGLETRIGGER_SPEC { +#[doc = "SINGLE Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_iadc0_singletrigger::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_iadc0_singletrigger::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerIadc0SingletriggerSpec; +impl crate::RegisterSpec for ConsumerIadc0SingletriggerSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_iadc0_singletrigger::R](R) reader structure"] -impl crate::Readable for CONSUMER_IADC0_SINGLETRIGGER_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_iadc0_singletrigger::W](W) writer structure"] -impl crate::Writable for CONSUMER_IADC0_SINGLETRIGGER_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_iadc0_singletrigger::R`](R) reader structure"] +impl crate::Readable for ConsumerIadc0SingletriggerSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_iadc0_singletrigger::W`](W) writer structure"] +impl crate::Writable for ConsumerIadc0SingletriggerSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_IADC0_SINGLETRIGGER to value 0"] -impl crate::Resettable for CONSUMER_IADC0_SINGLETRIGGER_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerIadc0SingletriggerSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_ldmaxbar_dmareq0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_ldmaxbar_dmareq0.rs index fb13f84..c539842 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_ldmaxbar_dmareq0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_ldmaxbar_dmareq0.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_LDMAXBAR_DMAREQ0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_LDMAXBAR_DMAREQ0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DMAREQ0 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DMAREQ0 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_LDMAXBAR_DMAREQ0_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DMAREQ0 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DMAREQ0 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DMAREQ0 consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_ldmaxbar_dmareq0](index.html) module"] -pub struct CONSUMER_LDMAXBAR_DMAREQ0_SPEC; -impl crate::RegisterSpec for CONSUMER_LDMAXBAR_DMAREQ0_SPEC { +#[doc = "DMAREQ0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_ldmaxbar_dmareq0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_ldmaxbar_dmareq0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerLdmaxbarDmareq0Spec; +impl crate::RegisterSpec for ConsumerLdmaxbarDmareq0Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_ldmaxbar_dmareq0::R](R) reader structure"] -impl crate::Readable for CONSUMER_LDMAXBAR_DMAREQ0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_ldmaxbar_dmareq0::W](W) writer structure"] -impl crate::Writable for CONSUMER_LDMAXBAR_DMAREQ0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_ldmaxbar_dmareq0::R`](R) reader structure"] +impl crate::Readable for ConsumerLdmaxbarDmareq0Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_ldmaxbar_dmareq0::W`](W) writer structure"] +impl crate::Writable for ConsumerLdmaxbarDmareq0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_LDMAXBAR_DMAREQ0 to value 0"] -impl crate::Resettable for CONSUMER_LDMAXBAR_DMAREQ0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerLdmaxbarDmareq0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_ldmaxbar_dmareq1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_ldmaxbar_dmareq1.rs index 0da231d..cfff2ee 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_ldmaxbar_dmareq1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_ldmaxbar_dmareq1.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_LDMAXBAR_DMAREQ1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_LDMAXBAR_DMAREQ1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DMAREQ1 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DMAREQ1 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_LDMAXBAR_DMAREQ1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DMAREQ1 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DMAREQ1 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DMAREQ1 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_ldmaxbar_dmareq1](index.html) module"] -pub struct CONSUMER_LDMAXBAR_DMAREQ1_SPEC; -impl crate::RegisterSpec for CONSUMER_LDMAXBAR_DMAREQ1_SPEC { +#[doc = "DMAREQ1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_ldmaxbar_dmareq1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_ldmaxbar_dmareq1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerLdmaxbarDmareq1Spec; +impl crate::RegisterSpec for ConsumerLdmaxbarDmareq1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_ldmaxbar_dmareq1::R](R) reader structure"] -impl crate::Readable for CONSUMER_LDMAXBAR_DMAREQ1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_ldmaxbar_dmareq1::W](W) writer structure"] -impl crate::Writable for CONSUMER_LDMAXBAR_DMAREQ1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_ldmaxbar_dmareq1::R`](R) reader structure"] +impl crate::Readable for ConsumerLdmaxbarDmareq1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_ldmaxbar_dmareq1::W`](W) writer structure"] +impl crate::Writable for ConsumerLdmaxbarDmareq1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_LDMAXBAR_DMAREQ1 to value 0"] -impl crate::Resettable for CONSUMER_LDMAXBAR_DMAREQ1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerLdmaxbarDmareq1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_lesense_start.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_lesense_start.rs index 56b0a31..0c1341c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_lesense_start.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_lesense_start.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_LESENSE_START` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_LESENSE_START` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - START async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - START async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_LESENSE_START_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - START async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - START async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "START Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_lesense_start](index.html) module"] -pub struct CONSUMER_LESENSE_START_SPEC; -impl crate::RegisterSpec for CONSUMER_LESENSE_START_SPEC { +#[doc = "START Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_lesense_start::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_lesense_start::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerLesenseStartSpec; +impl crate::RegisterSpec for ConsumerLesenseStartSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_lesense_start::R](R) reader structure"] -impl crate::Readable for CONSUMER_LESENSE_START_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_lesense_start::W](W) writer structure"] -impl crate::Writable for CONSUMER_LESENSE_START_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_lesense_start::R`](R) reader structure"] +impl crate::Readable for ConsumerLesenseStartSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_lesense_start::W`](W) writer structure"] +impl crate::Writable for ConsumerLesenseStartSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_LESENSE_START to value 0"] -impl crate::Resettable for CONSUMER_LESENSE_START_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerLesenseStartSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_letimer0_clear.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_letimer0_clear.rs index f856bd8..5929624 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_letimer0_clear.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_letimer0_clear.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_LETIMER0_CLEAR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_LETIMER0_CLEAR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CLEAR async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CLEAR async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_LETIMER0_CLEAR_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - CLEAR async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - CLEAR async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "CLEAR consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_letimer0_clear](index.html) module"] -pub struct CONSUMER_LETIMER0_CLEAR_SPEC; -impl crate::RegisterSpec for CONSUMER_LETIMER0_CLEAR_SPEC { +#[doc = "CLEAR consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_letimer0_clear::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_letimer0_clear::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerLetimer0ClearSpec; +impl crate::RegisterSpec for ConsumerLetimer0ClearSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_letimer0_clear::R](R) reader structure"] -impl crate::Readable for CONSUMER_LETIMER0_CLEAR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_letimer0_clear::W](W) writer structure"] -impl crate::Writable for CONSUMER_LETIMER0_CLEAR_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_letimer0_clear::R`](R) reader structure"] +impl crate::Readable for ConsumerLetimer0ClearSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_letimer0_clear::W`](W) writer structure"] +impl crate::Writable for ConsumerLetimer0ClearSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_LETIMER0_CLEAR to value 0"] -impl crate::Resettable for CONSUMER_LETIMER0_CLEAR_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerLetimer0ClearSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_letimer0_start.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_letimer0_start.rs index 125ed4d..fedb425 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_letimer0_start.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_letimer0_start.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_LETIMER0_START` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_LETIMER0_START` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - START async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - START async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_LETIMER0_START_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - START async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - START async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "START Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_letimer0_start](index.html) module"] -pub struct CONSUMER_LETIMER0_START_SPEC; -impl crate::RegisterSpec for CONSUMER_LETIMER0_START_SPEC { +#[doc = "START Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_letimer0_start::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_letimer0_start::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerLetimer0StartSpec; +impl crate::RegisterSpec for ConsumerLetimer0StartSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_letimer0_start::R](R) reader structure"] -impl crate::Readable for CONSUMER_LETIMER0_START_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_letimer0_start::W](W) writer structure"] -impl crate::Writable for CONSUMER_LETIMER0_START_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_letimer0_start::R`](R) reader structure"] +impl crate::Readable for ConsumerLetimer0StartSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_letimer0_start::W`](W) writer structure"] +impl crate::Writable for ConsumerLetimer0StartSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_LETIMER0_START to value 0"] -impl crate::Resettable for CONSUMER_LETIMER0_START_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerLetimer0StartSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_letimer0_stop.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_letimer0_stop.rs index e658ba1..14e2b3a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_letimer0_stop.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_letimer0_stop.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_LETIMER0_STOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_LETIMER0_STOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - STOP async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - STOP async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_LETIMER0_STOP_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - STOP async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - STOP async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "STOP Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_letimer0_stop](index.html) module"] -pub struct CONSUMER_LETIMER0_STOP_SPEC; -impl crate::RegisterSpec for CONSUMER_LETIMER0_STOP_SPEC { +#[doc = "STOP Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_letimer0_stop::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_letimer0_stop::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerLetimer0StopSpec; +impl crate::RegisterSpec for ConsumerLetimer0StopSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_letimer0_stop::R](R) reader structure"] -impl crate::Readable for CONSUMER_LETIMER0_STOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_letimer0_stop::W](W) writer structure"] -impl crate::Writable for CONSUMER_LETIMER0_STOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_letimer0_stop::R`](R) reader structure"] +impl crate::Readable for ConsumerLetimer0StopSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_letimer0_stop::W`](W) writer structure"] +impl crate::Writable for ConsumerLetimer0StopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_LETIMER0_STOP to value 0"] -impl crate::Resettable for CONSUMER_LETIMER0_STOP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerLetimer0StopSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_pcnt0_s0in.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_pcnt0_s0in.rs index 141d5e7..742da37 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_pcnt0_s0in.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_pcnt0_s0in.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_PCNT0_S0IN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_PCNT0_S0IN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - S0IN async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - S0IN async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_PCNT0_S0IN_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - S0IN async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - S0IN async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "S0IN consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_pcnt0_s0in](index.html) module"] -pub struct CONSUMER_PCNT0_S0IN_SPEC; -impl crate::RegisterSpec for CONSUMER_PCNT0_S0IN_SPEC { +#[doc = "S0IN consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_pcnt0_s0in::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_pcnt0_s0in::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerPcnt0S0inSpec; +impl crate::RegisterSpec for ConsumerPcnt0S0inSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_pcnt0_s0in::R](R) reader structure"] -impl crate::Readable for CONSUMER_PCNT0_S0IN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_pcnt0_s0in::W](W) writer structure"] -impl crate::Writable for CONSUMER_PCNT0_S0IN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_pcnt0_s0in::R`](R) reader structure"] +impl crate::Readable for ConsumerPcnt0S0inSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_pcnt0_s0in::W`](W) writer structure"] +impl crate::Writable for ConsumerPcnt0S0inSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_PCNT0_S0IN to value 0"] -impl crate::Resettable for CONSUMER_PCNT0_S0IN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerPcnt0S0inSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_pcnt0_s1in.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_pcnt0_s1in.rs index 2984124..3afa5ab 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_pcnt0_s1in.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_pcnt0_s1in.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_PCNT0_S1IN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_PCNT0_S1IN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - S1IN async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - S1IN async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_PCNT0_S1IN_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - S1IN async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - S1IN async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "S1IN Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_pcnt0_s1in](index.html) module"] -pub struct CONSUMER_PCNT0_S1IN_SPEC; -impl crate::RegisterSpec for CONSUMER_PCNT0_S1IN_SPEC { +#[doc = "S1IN Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_pcnt0_s1in::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_pcnt0_s1in::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerPcnt0S1inSpec; +impl crate::RegisterSpec for ConsumerPcnt0S1inSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_pcnt0_s1in::R](R) reader structure"] -impl crate::Readable for CONSUMER_PCNT0_S1IN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_pcnt0_s1in::W](W) writer structure"] -impl crate::Writable for CONSUMER_PCNT0_S1IN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_pcnt0_s1in::R`](R) reader structure"] +impl crate::Readable for ConsumerPcnt0S1inSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_pcnt0_s1in::W`](W) writer structure"] +impl crate::Writable for ConsumerPcnt0S1inSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_PCNT0_S1IN to value 0"] -impl crate::Resettable for CONSUMER_PCNT0_S1IN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerPcnt0S1inSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc25.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc25.rs index a59278c..c7286fc 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc25.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc25.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC25` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC25` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - TAMPERSRC25 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - TAMPERSRC25 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_SETAMPER_TAMPERSRC25_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - TAMPERSRC25 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - TAMPERSRC25 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "TAMPERSRC25 consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_setamper_tampersrc25](index.html) module"] -pub struct CONSUMER_SETAMPER_TAMPERSRC25_SPEC; -impl crate::RegisterSpec for CONSUMER_SETAMPER_TAMPERSRC25_SPEC { +#[doc = "TAMPERSRC25 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc25::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc25::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerSetamperTampersrc25Spec; +impl crate::RegisterSpec for ConsumerSetamperTampersrc25Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_setamper_tampersrc25::R](R) reader structure"] -impl crate::Readable for CONSUMER_SETAMPER_TAMPERSRC25_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_setamper_tampersrc25::W](W) writer structure"] -impl crate::Writable for CONSUMER_SETAMPER_TAMPERSRC25_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_setamper_tampersrc25::R`](R) reader structure"] +impl crate::Readable for ConsumerSetamperTampersrc25Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_setamper_tampersrc25::W`](W) writer structure"] +impl crate::Writable for ConsumerSetamperTampersrc25Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_SETAMPER_TAMPERSRC25 to value 0"] -impl crate::Resettable for CONSUMER_SETAMPER_TAMPERSRC25_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerSetamperTampersrc25Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc26.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc26.rs index c478579..e32cc38 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc26.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc26.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC26` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC26` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - TAMPERSRC26 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - TAMPERSRC26 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_SETAMPER_TAMPERSRC26_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - TAMPERSRC26 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - TAMPERSRC26 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "TAMPERSRC26 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_setamper_tampersrc26](index.html) module"] -pub struct CONSUMER_SETAMPER_TAMPERSRC26_SPEC; -impl crate::RegisterSpec for CONSUMER_SETAMPER_TAMPERSRC26_SPEC { +#[doc = "TAMPERSRC26 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc26::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc26::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerSetamperTampersrc26Spec; +impl crate::RegisterSpec for ConsumerSetamperTampersrc26Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_setamper_tampersrc26::R](R) reader structure"] -impl crate::Readable for CONSUMER_SETAMPER_TAMPERSRC26_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_setamper_tampersrc26::W](W) writer structure"] -impl crate::Writable for CONSUMER_SETAMPER_TAMPERSRC26_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_setamper_tampersrc26::R`](R) reader structure"] +impl crate::Readable for ConsumerSetamperTampersrc26Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_setamper_tampersrc26::W`](W) writer structure"] +impl crate::Writable for ConsumerSetamperTampersrc26Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_SETAMPER_TAMPERSRC26 to value 0"] -impl crate::Resettable for CONSUMER_SETAMPER_TAMPERSRC26_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerSetamperTampersrc26Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc27.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc27.rs index f5d1145..da447f6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc27.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc27.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC27` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC27` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - TAMPERSRC27 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - TAMPERSRC27 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_SETAMPER_TAMPERSRC27_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - TAMPERSRC27 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - TAMPERSRC27 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "TAMPERSRC27 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_setamper_tampersrc27](index.html) module"] -pub struct CONSUMER_SETAMPER_TAMPERSRC27_SPEC; -impl crate::RegisterSpec for CONSUMER_SETAMPER_TAMPERSRC27_SPEC { +#[doc = "TAMPERSRC27 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc27::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc27::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerSetamperTampersrc27Spec; +impl crate::RegisterSpec for ConsumerSetamperTampersrc27Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_setamper_tampersrc27::R](R) reader structure"] -impl crate::Readable for CONSUMER_SETAMPER_TAMPERSRC27_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_setamper_tampersrc27::W](W) writer structure"] -impl crate::Writable for CONSUMER_SETAMPER_TAMPERSRC27_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_setamper_tampersrc27::R`](R) reader structure"] +impl crate::Readable for ConsumerSetamperTampersrc27Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_setamper_tampersrc27::W`](W) writer structure"] +impl crate::Writable for ConsumerSetamperTampersrc27Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_SETAMPER_TAMPERSRC27 to value 0"] -impl crate::Resettable for CONSUMER_SETAMPER_TAMPERSRC27_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerSetamperTampersrc27Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc28.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc28.rs index 0ec3649..a980c53 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc28.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc28.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC28` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC28` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - TAMPERSRC28 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - TAMPERSRC28 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_SETAMPER_TAMPERSRC28_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - TAMPERSRC28 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - TAMPERSRC28 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "TAMPERSRC28 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_setamper_tampersrc28](index.html) module"] -pub struct CONSUMER_SETAMPER_TAMPERSRC28_SPEC; -impl crate::RegisterSpec for CONSUMER_SETAMPER_TAMPERSRC28_SPEC { +#[doc = "TAMPERSRC28 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc28::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc28::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerSetamperTampersrc28Spec; +impl crate::RegisterSpec for ConsumerSetamperTampersrc28Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_setamper_tampersrc28::R](R) reader structure"] -impl crate::Readable for CONSUMER_SETAMPER_TAMPERSRC28_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_setamper_tampersrc28::W](W) writer structure"] -impl crate::Writable for CONSUMER_SETAMPER_TAMPERSRC28_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_setamper_tampersrc28::R`](R) reader structure"] +impl crate::Readable for ConsumerSetamperTampersrc28Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_setamper_tampersrc28::W`](W) writer structure"] +impl crate::Writable for ConsumerSetamperTampersrc28Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_SETAMPER_TAMPERSRC28 to value 0"] -impl crate::Resettable for CONSUMER_SETAMPER_TAMPERSRC28_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerSetamperTampersrc28Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc29.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc29.rs index 8c73d6b..33cbb71 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc29.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc29.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC29` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC29` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - TAMPERSRC29 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - TAMPERSRC29 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_SETAMPER_TAMPERSRC29_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - TAMPERSRC29 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - TAMPERSRC29 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "TAMPERSRC29 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_setamper_tampersrc29](index.html) module"] -pub struct CONSUMER_SETAMPER_TAMPERSRC29_SPEC; -impl crate::RegisterSpec for CONSUMER_SETAMPER_TAMPERSRC29_SPEC { +#[doc = "TAMPERSRC29 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc29::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc29::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerSetamperTampersrc29Spec; +impl crate::RegisterSpec for ConsumerSetamperTampersrc29Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_setamper_tampersrc29::R](R) reader structure"] -impl crate::Readable for CONSUMER_SETAMPER_TAMPERSRC29_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_setamper_tampersrc29::W](W) writer structure"] -impl crate::Writable for CONSUMER_SETAMPER_TAMPERSRC29_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_setamper_tampersrc29::R`](R) reader structure"] +impl crate::Readable for ConsumerSetamperTampersrc29Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_setamper_tampersrc29::W`](W) writer structure"] +impl crate::Writable for ConsumerSetamperTampersrc29Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_SETAMPER_TAMPERSRC29 to value 0"] -impl crate::Resettable for CONSUMER_SETAMPER_TAMPERSRC29_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerSetamperTampersrc29Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc30.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc30.rs index fbab4b3..afb63c8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc30.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc30.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC30` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC30` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - TAMPERSRC30 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - TAMPERSRC30 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_SETAMPER_TAMPERSRC30_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - TAMPERSRC30 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - TAMPERSRC30 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "TAMPERSRC30 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_setamper_tampersrc30](index.html) module"] -pub struct CONSUMER_SETAMPER_TAMPERSRC30_SPEC; -impl crate::RegisterSpec for CONSUMER_SETAMPER_TAMPERSRC30_SPEC { +#[doc = "TAMPERSRC30 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc30::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc30::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerSetamperTampersrc30Spec; +impl crate::RegisterSpec for ConsumerSetamperTampersrc30Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_setamper_tampersrc30::R](R) reader structure"] -impl crate::Readable for CONSUMER_SETAMPER_TAMPERSRC30_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_setamper_tampersrc30::W](W) writer structure"] -impl crate::Writable for CONSUMER_SETAMPER_TAMPERSRC30_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_setamper_tampersrc30::R`](R) reader structure"] +impl crate::Readable for ConsumerSetamperTampersrc30Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_setamper_tampersrc30::W`](W) writer structure"] +impl crate::Writable for ConsumerSetamperTampersrc30Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_SETAMPER_TAMPERSRC30 to value 0"] -impl crate::Resettable for CONSUMER_SETAMPER_TAMPERSRC30_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerSetamperTampersrc30Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc31.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc31.rs index 16a1986..cadc773 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc31.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_setamper_tampersrc31.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC31` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC31` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - TAMPERSRC31 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - TAMPERSRC31 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_SETAMPER_TAMPERSRC31_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - TAMPERSRC31 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - TAMPERSRC31 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "TAMPERSRC31 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_setamper_tampersrc31](index.html) module"] -pub struct CONSUMER_SETAMPER_TAMPERSRC31_SPEC; -impl crate::RegisterSpec for CONSUMER_SETAMPER_TAMPERSRC31_SPEC { +#[doc = "TAMPERSRC31 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc31::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc31::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerSetamperTampersrc31Spec; +impl crate::RegisterSpec for ConsumerSetamperTampersrc31Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_setamper_tampersrc31::R](R) reader structure"] -impl crate::Readable for CONSUMER_SETAMPER_TAMPERSRC31_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_setamper_tampersrc31::W](W) writer structure"] -impl crate::Writable for CONSUMER_SETAMPER_TAMPERSRC31_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_setamper_tampersrc31::R`](R) reader structure"] +impl crate::Readable for ConsumerSetamperTampersrc31Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_setamper_tampersrc31::W`](W) writer structure"] +impl crate::Writable for ConsumerSetamperTampersrc31Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_SETAMPER_TAMPERSRC31 to value 0"] -impl crate::Resettable for CONSUMER_SETAMPER_TAMPERSRC31_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerSetamperTampersrc31Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_sysrtc0_in0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_sysrtc0_in0.rs index 0bee907..270032a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_sysrtc0_in0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_sysrtc0_in0.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_SYSRTC0_IN0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_SYSRTC0_IN0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - IN0 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - IN0 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_SYSRTC0_IN0_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - IN0 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - IN0 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "IN0 consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_sysrtc0_in0](index.html) module"] -pub struct CONSUMER_SYSRTC0_IN0_SPEC; -impl crate::RegisterSpec for CONSUMER_SYSRTC0_IN0_SPEC { +#[doc = "IN0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_sysrtc0_in0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_sysrtc0_in0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerSysrtc0In0Spec; +impl crate::RegisterSpec for ConsumerSysrtc0In0Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_sysrtc0_in0::R](R) reader structure"] -impl crate::Readable for CONSUMER_SYSRTC0_IN0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_sysrtc0_in0::W](W) writer structure"] -impl crate::Writable for CONSUMER_SYSRTC0_IN0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_sysrtc0_in0::R`](R) reader structure"] +impl crate::Readable for ConsumerSysrtc0In0Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_sysrtc0_in0::W`](W) writer structure"] +impl crate::Writable for ConsumerSysrtc0In0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_SYSRTC0_IN0 to value 0"] -impl crate::Resettable for CONSUMER_SYSRTC0_IN0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerSysrtc0In0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_sysrtc0_in1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_sysrtc0_in1.rs index 087ad3b..1853966 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_sysrtc0_in1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_sysrtc0_in1.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_SYSRTC0_IN1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_SYSRTC0_IN1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - IN1 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - IN1 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_SYSRTC0_IN1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - IN1 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - IN1 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "IN1 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_sysrtc0_in1](index.html) module"] -pub struct CONSUMER_SYSRTC0_IN1_SPEC; -impl crate::RegisterSpec for CONSUMER_SYSRTC0_IN1_SPEC { +#[doc = "IN1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_sysrtc0_in1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_sysrtc0_in1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerSysrtc0In1Spec; +impl crate::RegisterSpec for ConsumerSysrtc0In1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_sysrtc0_in1::R](R) reader structure"] -impl crate::Readable for CONSUMER_SYSRTC0_IN1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_sysrtc0_in1::W](W) writer structure"] -impl crate::Writable for CONSUMER_SYSRTC0_IN1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_sysrtc0_in1::R`](R) reader structure"] +impl crate::Readable for ConsumerSysrtc0In1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_sysrtc0_in1::W`](W) writer structure"] +impl crate::Writable for ConsumerSysrtc0In1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_SYSRTC0_IN1 to value 0"] -impl crate::Resettable for CONSUMER_SYSRTC0_IN1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerSysrtc0In1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer0_cc0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer0_cc0.rs index 9863eb4..bec07f0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer0_cc0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer0_cc0.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER0_CC0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER0_CC0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC0 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC0 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER0_CC0_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC0 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC0 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER0_CC0_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC0 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC0 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC0 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC0 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC0 consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer0_cc0](index.html) module"] -pub struct CONSUMER_TIMER0_CC0_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER0_CC0_SPEC { +#[doc = "CC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer0_cc0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer0_cc0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer0Cc0Spec; +impl crate::RegisterSpec for ConsumerTimer0Cc0Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer0_cc0::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER0_CC0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer0_cc0::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER0_CC0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer0_cc0::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer0Cc0Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer0_cc0::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer0Cc0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER0_CC0 to value 0"] -impl crate::Resettable for CONSUMER_TIMER0_CC0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer0Cc0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer0_cc1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer0_cc1.rs index 1c0ac5d..3bbce00 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer0_cc1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer0_cc1.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER0_CC1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER0_CC1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC1 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC1 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER0_CC1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC1 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC1 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER0_CC1_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC1 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC1 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC1 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC1 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC1 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer0_cc1](index.html) module"] -pub struct CONSUMER_TIMER0_CC1_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER0_CC1_SPEC { +#[doc = "CC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer0_cc1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer0_cc1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer0Cc1Spec; +impl crate::RegisterSpec for ConsumerTimer0Cc1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer0_cc1::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER0_CC1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer0_cc1::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER0_CC1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer0_cc1::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer0Cc1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer0_cc1::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer0Cc1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER0_CC1 to value 0"] -impl crate::Resettable for CONSUMER_TIMER0_CC1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer0Cc1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer0_cc2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer0_cc2.rs index 9e0defb..0dc9313 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer0_cc2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer0_cc2.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER0_CC2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER0_CC2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC2 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC2 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER0_CC2_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC2 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC2 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER0_CC2_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC2 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC2 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC2 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC2 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC2 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer0_cc2](index.html) module"] -pub struct CONSUMER_TIMER0_CC2_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER0_CC2_SPEC { +#[doc = "CC2 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer0_cc2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer0_cc2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer0Cc2Spec; +impl crate::RegisterSpec for ConsumerTimer0Cc2Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer0_cc2::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER0_CC2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer0_cc2::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER0_CC2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer0_cc2::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer0Cc2Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer0_cc2::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer0Cc2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER0_CC2 to value 0"] -impl crate::Resettable for CONSUMER_TIMER0_CC2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer0Cc2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer0_dti.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer0_dti.rs index c8e1194..cd7b596 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer0_dti.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer0_dti.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER0_DTI` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER0_DTI` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER0_DTI_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer0_dti](index.html) module"] -pub struct CONSUMER_TIMER0_DTI_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER0_DTI_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer0_dti::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer0_dti::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer0DtiSpec; +impl crate::RegisterSpec for ConsumerTimer0DtiSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer0_dti::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER0_DTI_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer0_dti::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER0_DTI_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer0_dti::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer0DtiSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer0_dti::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer0DtiSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER0_DTI to value 0"] -impl crate::Resettable for CONSUMER_TIMER0_DTI_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer0DtiSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer0_dtifs1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer0_dtifs1.rs index ab8c570..c106c1a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer0_dtifs1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer0_dtifs1.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER0_DTIFS1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER0_DTIFS1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER0_DTIFS1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer0_dtifs1](index.html) module"] -pub struct CONSUMER_TIMER0_DTIFS1_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER0_DTIFS1_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer0_dtifs1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer0_dtifs1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer0Dtifs1Spec; +impl crate::RegisterSpec for ConsumerTimer0Dtifs1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer0_dtifs1::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER0_DTIFS1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer0_dtifs1::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER0_DTIFS1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer0_dtifs1::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer0Dtifs1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer0_dtifs1::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer0Dtifs1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER0_DTIFS1 to value 0"] -impl crate::Resettable for CONSUMER_TIMER0_DTIFS1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer0Dtifs1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer0_dtifs2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer0_dtifs2.rs index aef135e..967a68a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer0_dtifs2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer0_dtifs2.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER0_DTIFS2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER0_DTIFS2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER0_DTIFS2_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer0_dtifs2](index.html) module"] -pub struct CONSUMER_TIMER0_DTIFS2_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER0_DTIFS2_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer0_dtifs2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer0_dtifs2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer0Dtifs2Spec; +impl crate::RegisterSpec for ConsumerTimer0Dtifs2Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer0_dtifs2::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER0_DTIFS2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer0_dtifs2::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER0_DTIFS2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer0_dtifs2::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer0Dtifs2Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer0_dtifs2::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer0Dtifs2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER0_DTIFS2 to value 0"] -impl crate::Resettable for CONSUMER_TIMER0_DTIFS2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer0Dtifs2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer1_cc0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer1_cc0.rs index 808ca82..7cadd90 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer1_cc0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer1_cc0.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER1_CC0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER1_CC0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC0 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC0 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER1_CC0_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC0 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC0 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER1_CC0_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC0 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC0 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC0 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC0 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC0 consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer1_cc0](index.html) module"] -pub struct CONSUMER_TIMER1_CC0_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER1_CC0_SPEC { +#[doc = "CC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer1_cc0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer1_cc0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer1Cc0Spec; +impl crate::RegisterSpec for ConsumerTimer1Cc0Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer1_cc0::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER1_CC0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer1_cc0::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER1_CC0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer1_cc0::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer1Cc0Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer1_cc0::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer1Cc0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER1_CC0 to value 0"] -impl crate::Resettable for CONSUMER_TIMER1_CC0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer1Cc0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer1_cc1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer1_cc1.rs index fb2b169..ab1779b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer1_cc1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer1_cc1.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER1_CC1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER1_CC1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC1 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC1 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER1_CC1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC1 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC1 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER1_CC1_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC1 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC1 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC1 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC1 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC1 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer1_cc1](index.html) module"] -pub struct CONSUMER_TIMER1_CC1_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER1_CC1_SPEC { +#[doc = "CC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer1_cc1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer1_cc1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer1Cc1Spec; +impl crate::RegisterSpec for ConsumerTimer1Cc1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer1_cc1::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER1_CC1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer1_cc1::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER1_CC1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer1_cc1::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer1Cc1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer1_cc1::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer1Cc1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER1_CC1 to value 0"] -impl crate::Resettable for CONSUMER_TIMER1_CC1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer1Cc1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer1_cc2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer1_cc2.rs index f094225..fc9bef0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer1_cc2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer1_cc2.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER1_CC2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER1_CC2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC2 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC2 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER1_CC2_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC2 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC2 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER1_CC2_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC2 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC2 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC2 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC2 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC2 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer1_cc2](index.html) module"] -pub struct CONSUMER_TIMER1_CC2_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER1_CC2_SPEC { +#[doc = "CC2 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer1_cc2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer1_cc2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer1Cc2Spec; +impl crate::RegisterSpec for ConsumerTimer1Cc2Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer1_cc2::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER1_CC2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer1_cc2::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER1_CC2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer1_cc2::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer1Cc2Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer1_cc2::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer1Cc2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER1_CC2 to value 0"] -impl crate::Resettable for CONSUMER_TIMER1_CC2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer1Cc2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer1_dti.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer1_dti.rs index 87ac70a..046677e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer1_dti.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer1_dti.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER1_DTI` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER1_DTI` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER1_DTI_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer1_dti](index.html) module"] -pub struct CONSUMER_TIMER1_DTI_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER1_DTI_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer1_dti::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer1_dti::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer1DtiSpec; +impl crate::RegisterSpec for ConsumerTimer1DtiSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer1_dti::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER1_DTI_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer1_dti::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER1_DTI_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer1_dti::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer1DtiSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer1_dti::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer1DtiSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER1_DTI to value 0"] -impl crate::Resettable for CONSUMER_TIMER1_DTI_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer1DtiSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer1_dtifs1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer1_dtifs1.rs index e158d55..16abeb3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer1_dtifs1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer1_dtifs1.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER1_DTIFS1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER1_DTIFS1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER1_DTIFS1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer1_dtifs1](index.html) module"] -pub struct CONSUMER_TIMER1_DTIFS1_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER1_DTIFS1_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer1_dtifs1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer1_dtifs1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer1Dtifs1Spec; +impl crate::RegisterSpec for ConsumerTimer1Dtifs1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer1_dtifs1::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER1_DTIFS1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer1_dtifs1::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER1_DTIFS1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer1_dtifs1::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer1Dtifs1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer1_dtifs1::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer1Dtifs1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER1_DTIFS1 to value 0"] -impl crate::Resettable for CONSUMER_TIMER1_DTIFS1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer1Dtifs1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer1_dtifs2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer1_dtifs2.rs index e2f4021..6fa7bb2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer1_dtifs2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer1_dtifs2.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER1_DTIFS2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER1_DTIFS2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER1_DTIFS2_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer1_dtifs2](index.html) module"] -pub struct CONSUMER_TIMER1_DTIFS2_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER1_DTIFS2_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer1_dtifs2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer1_dtifs2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer1Dtifs2Spec; +impl crate::RegisterSpec for ConsumerTimer1Dtifs2Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer1_dtifs2::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER1_DTIFS2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer1_dtifs2::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER1_DTIFS2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer1_dtifs2::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer1Dtifs2Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer1_dtifs2::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer1Dtifs2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER1_DTIFS2 to value 0"] -impl crate::Resettable for CONSUMER_TIMER1_DTIFS2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer1Dtifs2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer2_cc0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer2_cc0.rs index 7c8be93..6072834 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer2_cc0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer2_cc0.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER2_CC0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER2_CC0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC0 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC0 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER2_CC0_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC0 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC0 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER2_CC0_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC0 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC0 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC0 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC0 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC0 consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer2_cc0](index.html) module"] -pub struct CONSUMER_TIMER2_CC0_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER2_CC0_SPEC { +#[doc = "CC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer2_cc0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer2_cc0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer2Cc0Spec; +impl crate::RegisterSpec for ConsumerTimer2Cc0Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer2_cc0::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER2_CC0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer2_cc0::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER2_CC0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer2_cc0::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer2Cc0Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer2_cc0::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer2Cc0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER2_CC0 to value 0"] -impl crate::Resettable for CONSUMER_TIMER2_CC0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer2Cc0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer2_cc1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer2_cc1.rs index 15965ff..44b3e8d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer2_cc1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer2_cc1.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER2_CC1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER2_CC1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC1 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC1 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER2_CC1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC1 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC1 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER2_CC1_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC1 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC1 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC1 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC1 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC1 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer2_cc1](index.html) module"] -pub struct CONSUMER_TIMER2_CC1_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER2_CC1_SPEC { +#[doc = "CC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer2_cc1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer2_cc1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer2Cc1Spec; +impl crate::RegisterSpec for ConsumerTimer2Cc1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer2_cc1::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER2_CC1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer2_cc1::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER2_CC1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer2_cc1::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer2Cc1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer2_cc1::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer2Cc1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER2_CC1 to value 0"] -impl crate::Resettable for CONSUMER_TIMER2_CC1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer2Cc1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer2_cc2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer2_cc2.rs index 861c970..c0b2729 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer2_cc2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer2_cc2.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER2_CC2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER2_CC2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC2 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC2 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER2_CC2_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC2 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC2 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER2_CC2_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC2 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC2 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC2 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC2 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC2 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer2_cc2](index.html) module"] -pub struct CONSUMER_TIMER2_CC2_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER2_CC2_SPEC { +#[doc = "CC2 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer2_cc2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer2_cc2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer2Cc2Spec; +impl crate::RegisterSpec for ConsumerTimer2Cc2Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer2_cc2::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER2_CC2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer2_cc2::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER2_CC2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer2_cc2::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer2Cc2Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer2_cc2::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer2Cc2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER2_CC2 to value 0"] -impl crate::Resettable for CONSUMER_TIMER2_CC2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer2Cc2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer2_dti.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer2_dti.rs index 25ddbae..6f55334 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer2_dti.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer2_dti.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER2_DTI` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER2_DTI` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER2_DTI_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer2_dti](index.html) module"] -pub struct CONSUMER_TIMER2_DTI_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER2_DTI_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer2_dti::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer2_dti::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer2DtiSpec; +impl crate::RegisterSpec for ConsumerTimer2DtiSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer2_dti::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER2_DTI_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer2_dti::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER2_DTI_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer2_dti::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer2DtiSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer2_dti::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer2DtiSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER2_DTI to value 0"] -impl crate::Resettable for CONSUMER_TIMER2_DTI_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer2DtiSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer2_dtifs1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer2_dtifs1.rs index 98a3d55..c2347a2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer2_dtifs1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer2_dtifs1.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER2_DTIFS1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER2_DTIFS1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER2_DTIFS1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer2_dtifs1](index.html) module"] -pub struct CONSUMER_TIMER2_DTIFS1_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER2_DTIFS1_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer2_dtifs1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer2_dtifs1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer2Dtifs1Spec; +impl crate::RegisterSpec for ConsumerTimer2Dtifs1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer2_dtifs1::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER2_DTIFS1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer2_dtifs1::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER2_DTIFS1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer2_dtifs1::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer2Dtifs1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer2_dtifs1::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer2Dtifs1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER2_DTIFS1 to value 0"] -impl crate::Resettable for CONSUMER_TIMER2_DTIFS1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer2Dtifs1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer2_dtifs2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer2_dtifs2.rs index fb41428..8ffa4b8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer2_dtifs2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer2_dtifs2.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER2_DTIFS2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER2_DTIFS2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER2_DTIFS2_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer2_dtifs2](index.html) module"] -pub struct CONSUMER_TIMER2_DTIFS2_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER2_DTIFS2_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer2_dtifs2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer2_dtifs2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer2Dtifs2Spec; +impl crate::RegisterSpec for ConsumerTimer2Dtifs2Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer2_dtifs2::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER2_DTIFS2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer2_dtifs2::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER2_DTIFS2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer2_dtifs2::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer2Dtifs2Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer2_dtifs2::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer2Dtifs2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER2_DTIFS2 to value 0"] -impl crate::Resettable for CONSUMER_TIMER2_DTIFS2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer2Dtifs2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer3_cc0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer3_cc0.rs index 229e6f4..1b16277 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer3_cc0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer3_cc0.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER3_CC0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER3_CC0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC0 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC0 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER3_CC0_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC0 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC0 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER3_CC0_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC0 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC0 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC0 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC0 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC0 consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer3_cc0](index.html) module"] -pub struct CONSUMER_TIMER3_CC0_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER3_CC0_SPEC { +#[doc = "CC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer3_cc0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer3_cc0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer3Cc0Spec; +impl crate::RegisterSpec for ConsumerTimer3Cc0Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer3_cc0::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER3_CC0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer3_cc0::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER3_CC0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer3_cc0::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer3Cc0Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer3_cc0::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer3Cc0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER3_CC0 to value 0"] -impl crate::Resettable for CONSUMER_TIMER3_CC0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer3Cc0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer3_cc1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer3_cc1.rs index e763c25..3e51955 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer3_cc1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer3_cc1.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER3_CC1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER3_CC1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC1 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC1 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER3_CC1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC1 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC1 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER3_CC1_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC1 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC1 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC1 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC1 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC1 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer3_cc1](index.html) module"] -pub struct CONSUMER_TIMER3_CC1_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER3_CC1_SPEC { +#[doc = "CC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer3_cc1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer3_cc1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer3Cc1Spec; +impl crate::RegisterSpec for ConsumerTimer3Cc1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer3_cc1::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER3_CC1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer3_cc1::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER3_CC1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer3_cc1::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer3Cc1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer3_cc1::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer3Cc1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER3_CC1 to value 0"] -impl crate::Resettable for CONSUMER_TIMER3_CC1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer3Cc1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer3_cc2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer3_cc2.rs index 6af32a2..78dfc24 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer3_cc2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer3_cc2.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER3_CC2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER3_CC2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC2 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC2 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER3_CC2_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC2 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC2 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER3_CC2_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC2 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC2 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC2 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC2 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC2 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer3_cc2](index.html) module"] -pub struct CONSUMER_TIMER3_CC2_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER3_CC2_SPEC { +#[doc = "CC2 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer3_cc2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer3_cc2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer3Cc2Spec; +impl crate::RegisterSpec for ConsumerTimer3Cc2Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer3_cc2::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER3_CC2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer3_cc2::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER3_CC2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer3_cc2::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer3Cc2Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer3_cc2::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer3Cc2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER3_CC2 to value 0"] -impl crate::Resettable for CONSUMER_TIMER3_CC2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer3Cc2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer3_dti.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer3_dti.rs index f21b80b..81ee0e7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer3_dti.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer3_dti.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER3_DTI` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER3_DTI` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER3_DTI_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer3_dti](index.html) module"] -pub struct CONSUMER_TIMER3_DTI_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER3_DTI_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer3_dti::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer3_dti::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer3DtiSpec; +impl crate::RegisterSpec for ConsumerTimer3DtiSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer3_dti::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER3_DTI_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer3_dti::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER3_DTI_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer3_dti::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer3DtiSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer3_dti::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer3DtiSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER3_DTI to value 0"] -impl crate::Resettable for CONSUMER_TIMER3_DTI_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer3DtiSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer3_dtifs1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer3_dtifs1.rs index 9cb29d3..ad774af 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer3_dtifs1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer3_dtifs1.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER3_DTIFS1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER3_DTIFS1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER3_DTIFS1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer3_dtifs1](index.html) module"] -pub struct CONSUMER_TIMER3_DTIFS1_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER3_DTIFS1_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer3_dtifs1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer3_dtifs1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer3Dtifs1Spec; +impl crate::RegisterSpec for ConsumerTimer3Dtifs1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer3_dtifs1::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER3_DTIFS1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer3_dtifs1::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER3_DTIFS1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer3_dtifs1::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer3Dtifs1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer3_dtifs1::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer3Dtifs1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER3_DTIFS1 to value 0"] -impl crate::Resettable for CONSUMER_TIMER3_DTIFS1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer3Dtifs1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer3_dtifs2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer3_dtifs2.rs index 350b801..6803949 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer3_dtifs2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer3_dtifs2.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER3_DTIFS2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER3_DTIFS2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER3_DTIFS2_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer3_dtifs2](index.html) module"] -pub struct CONSUMER_TIMER3_DTIFS2_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER3_DTIFS2_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer3_dtifs2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer3_dtifs2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer3Dtifs2Spec; +impl crate::RegisterSpec for ConsumerTimer3Dtifs2Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer3_dtifs2::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER3_DTIFS2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer3_dtifs2::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER3_DTIFS2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer3_dtifs2::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer3Dtifs2Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer3_dtifs2::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer3Dtifs2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER3_DTIFS2 to value 0"] -impl crate::Resettable for CONSUMER_TIMER3_DTIFS2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer3Dtifs2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer4_cc0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer4_cc0.rs index 5a4ceb5..c393539 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer4_cc0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer4_cc0.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER4_CC0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER4_CC0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC0 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC0 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER4_CC0_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC0 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC0 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER4_CC0_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC0 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC0 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC0 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC0 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC0 consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer4_cc0](index.html) module"] -pub struct CONSUMER_TIMER4_CC0_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER4_CC0_SPEC { +#[doc = "CC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer4_cc0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer4_cc0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer4Cc0Spec; +impl crate::RegisterSpec for ConsumerTimer4Cc0Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer4_cc0::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER4_CC0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer4_cc0::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER4_CC0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer4_cc0::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer4Cc0Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer4_cc0::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer4Cc0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER4_CC0 to value 0"] -impl crate::Resettable for CONSUMER_TIMER4_CC0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer4Cc0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer4_cc1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer4_cc1.rs index 50dd374..09c6cd3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer4_cc1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer4_cc1.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER4_CC1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER4_CC1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC1 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC1 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER4_CC1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC1 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC1 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER4_CC1_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC1 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC1 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC1 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC1 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC1 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer4_cc1](index.html) module"] -pub struct CONSUMER_TIMER4_CC1_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER4_CC1_SPEC { +#[doc = "CC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer4_cc1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer4_cc1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer4Cc1Spec; +impl crate::RegisterSpec for ConsumerTimer4Cc1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer4_cc1::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER4_CC1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer4_cc1::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER4_CC1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer4_cc1::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer4Cc1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer4_cc1::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer4Cc1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER4_CC1 to value 0"] -impl crate::Resettable for CONSUMER_TIMER4_CC1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer4Cc1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer4_cc2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer4_cc2.rs index cf91104..2bbc653 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer4_cc2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer4_cc2.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER4_CC2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER4_CC2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC2 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC2 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER4_CC2_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC2 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC2 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER4_CC2_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC2 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC2 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC2 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC2 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC2 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer4_cc2](index.html) module"] -pub struct CONSUMER_TIMER4_CC2_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER4_CC2_SPEC { +#[doc = "CC2 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer4_cc2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer4_cc2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer4Cc2Spec; +impl crate::RegisterSpec for ConsumerTimer4Cc2Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer4_cc2::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER4_CC2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer4_cc2::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER4_CC2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer4_cc2::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer4Cc2Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer4_cc2::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer4Cc2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER4_CC2 to value 0"] -impl crate::Resettable for CONSUMER_TIMER4_CC2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer4Cc2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer4_dti.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer4_dti.rs index 34e9676..f9b4d1e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer4_dti.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer4_dti.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER4_DTI` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER4_DTI` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER4_DTI_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer4_dti](index.html) module"] -pub struct CONSUMER_TIMER4_DTI_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER4_DTI_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer4_dti::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer4_dti::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer4DtiSpec; +impl crate::RegisterSpec for ConsumerTimer4DtiSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer4_dti::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER4_DTI_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer4_dti::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER4_DTI_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer4_dti::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer4DtiSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer4_dti::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer4DtiSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER4_DTI to value 0"] -impl crate::Resettable for CONSUMER_TIMER4_DTI_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer4DtiSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer4_dtifs1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer4_dtifs1.rs index 338f259..9b916c1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer4_dtifs1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer4_dtifs1.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER4_DTIFS1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER4_DTIFS1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER4_DTIFS1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer4_dtifs1](index.html) module"] -pub struct CONSUMER_TIMER4_DTIFS1_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER4_DTIFS1_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer4_dtifs1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer4_dtifs1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer4Dtifs1Spec; +impl crate::RegisterSpec for ConsumerTimer4Dtifs1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer4_dtifs1::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER4_DTIFS1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer4_dtifs1::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER4_DTIFS1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer4_dtifs1::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer4Dtifs1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer4_dtifs1::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer4Dtifs1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER4_DTIFS1 to value 0"] -impl crate::Resettable for CONSUMER_TIMER4_DTIFS1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer4Dtifs1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer4_dtifs2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer4_dtifs2.rs index 16f7ee5..b1caadb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer4_dtifs2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_timer4_dtifs2.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER4_DTIFS2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER4_DTIFS2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER4_DTIFS2_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer4_dtifs2](index.html) module"] -pub struct CONSUMER_TIMER4_DTIFS2_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER4_DTIFS2_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer4_dtifs2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer4_dtifs2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer4Dtifs2Spec; +impl crate::RegisterSpec for ConsumerTimer4Dtifs2Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer4_dtifs2::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER4_DTIFS2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer4_dtifs2::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER4_DTIFS2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer4_dtifs2::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer4Dtifs2Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer4_dtifs2::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer4Dtifs2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER4_DTIFS2 to value 0"] -impl crate::Resettable for CONSUMER_TIMER4_DTIFS2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer4Dtifs2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_usart0_clk.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_usart0_clk.rs index b3cfd81..97aa1e0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_usart0_clk.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_usart0_clk.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_USART0_CLK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_USART0_CLK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CLK async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CLK async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_USART0_CLK_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - CLK async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - CLK async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "CLK consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_usart0_clk](index.html) module"] -pub struct CONSUMER_USART0_CLK_SPEC; -impl crate::RegisterSpec for CONSUMER_USART0_CLK_SPEC { +#[doc = "CLK consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_usart0_clk::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_usart0_clk::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerUsart0ClkSpec; +impl crate::RegisterSpec for ConsumerUsart0ClkSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_usart0_clk::R](R) reader structure"] -impl crate::Readable for CONSUMER_USART0_CLK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_usart0_clk::W](W) writer structure"] -impl crate::Writable for CONSUMER_USART0_CLK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_usart0_clk::R`](R) reader structure"] +impl crate::Readable for ConsumerUsart0ClkSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_usart0_clk::W`](W) writer structure"] +impl crate::Writable for ConsumerUsart0ClkSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_USART0_CLK to value 0"] -impl crate::Resettable for CONSUMER_USART0_CLK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerUsart0ClkSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_usart0_ir.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_usart0_ir.rs index 1761a55..027086b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_usart0_ir.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_usart0_ir.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_USART0_IR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_USART0_IR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - IR async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - IR async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_USART0_IR_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - IR async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - IR async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "IR Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_usart0_ir](index.html) module"] -pub struct CONSUMER_USART0_IR_SPEC; -impl crate::RegisterSpec for CONSUMER_USART0_IR_SPEC { +#[doc = "IR Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_usart0_ir::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_usart0_ir::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerUsart0IrSpec; +impl crate::RegisterSpec for ConsumerUsart0IrSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_usart0_ir::R](R) reader structure"] -impl crate::Readable for CONSUMER_USART0_IR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_usart0_ir::W](W) writer structure"] -impl crate::Writable for CONSUMER_USART0_IR_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_usart0_ir::R`](R) reader structure"] +impl crate::Readable for ConsumerUsart0IrSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_usart0_ir::W`](W) writer structure"] +impl crate::Writable for ConsumerUsart0IrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_USART0_IR to value 0"] -impl crate::Resettable for CONSUMER_USART0_IR_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerUsart0IrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_usart0_rx.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_usart0_rx.rs index 8305d8c..fec43de 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_usart0_rx.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_usart0_rx.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_USART0_RX` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_USART0_RX` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - RX async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - RX async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_USART0_RX_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - RX async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - RX async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "RX Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_usart0_rx](index.html) module"] -pub struct CONSUMER_USART0_RX_SPEC; -impl crate::RegisterSpec for CONSUMER_USART0_RX_SPEC { +#[doc = "RX Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_usart0_rx::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_usart0_rx::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerUsart0RxSpec; +impl crate::RegisterSpec for ConsumerUsart0RxSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_usart0_rx::R](R) reader structure"] -impl crate::Readable for CONSUMER_USART0_RX_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_usart0_rx::W](W) writer structure"] -impl crate::Writable for CONSUMER_USART0_RX_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_usart0_rx::R`](R) reader structure"] +impl crate::Readable for ConsumerUsart0RxSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_usart0_rx::W`](W) writer structure"] +impl crate::Writable for ConsumerUsart0RxSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_USART0_RX to value 0"] -impl crate::Resettable for CONSUMER_USART0_RX_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerUsart0RxSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_usart0_trigger.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_usart0_trigger.rs index cfe2cd4..4336d75 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_usart0_trigger.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_usart0_trigger.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_USART0_TRIGGER` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_USART0_TRIGGER` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - TRIGGER async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - TRIGGER async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_USART0_TRIGGER_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - TRIGGER async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - TRIGGER async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "TRIGGER Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_usart0_trigger](index.html) module"] -pub struct CONSUMER_USART0_TRIGGER_SPEC; -impl crate::RegisterSpec for CONSUMER_USART0_TRIGGER_SPEC { +#[doc = "TRIGGER Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_usart0_trigger::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_usart0_trigger::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerUsart0TriggerSpec; +impl crate::RegisterSpec for ConsumerUsart0TriggerSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_usart0_trigger::R](R) reader structure"] -impl crate::Readable for CONSUMER_USART0_TRIGGER_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_usart0_trigger::W](W) writer structure"] -impl crate::Writable for CONSUMER_USART0_TRIGGER_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_usart0_trigger::R`](R) reader structure"] +impl crate::Readable for ConsumerUsart0TriggerSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_usart0_trigger::W`](W) writer structure"] +impl crate::Writable for ConsumerUsart0TriggerSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_USART0_TRIGGER to value 0"] -impl crate::Resettable for CONSUMER_USART0_TRIGGER_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerUsart0TriggerSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_vdac0_asynctrigch0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_vdac0_asynctrigch0.rs index 210a9b6..63e7e37 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_vdac0_asynctrigch0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_vdac0_asynctrigch0.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_VDAC0_ASYNCTRIGCH0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_VDAC0_ASYNCTRIGCH0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - ASYNCTRIG async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - ASYNCTRIG async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_VDAC0_ASYNCTRIGCH0_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - ASYNCTRIG async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - ASYNCTRIG async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "ASYNCTRIG consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_vdac0_asynctrigch0](index.html) module"] -pub struct CONSUMER_VDAC0_ASYNCTRIGCH0_SPEC; -impl crate::RegisterSpec for CONSUMER_VDAC0_ASYNCTRIGCH0_SPEC { +#[doc = "ASYNCTRIG consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_vdac0_asynctrigch0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_vdac0_asynctrigch0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerVdac0Asynctrigch0Spec; +impl crate::RegisterSpec for ConsumerVdac0Asynctrigch0Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_vdac0_asynctrigch0::R](R) reader structure"] -impl crate::Readable for CONSUMER_VDAC0_ASYNCTRIGCH0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_vdac0_asynctrigch0::W](W) writer structure"] -impl crate::Writable for CONSUMER_VDAC0_ASYNCTRIGCH0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_vdac0_asynctrigch0::R`](R) reader structure"] +impl crate::Readable for ConsumerVdac0Asynctrigch0Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_vdac0_asynctrigch0::W`](W) writer structure"] +impl crate::Writable for ConsumerVdac0Asynctrigch0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_VDAC0_ASYNCTRIGCH0 to value 0"] -impl crate::Resettable for CONSUMER_VDAC0_ASYNCTRIGCH0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerVdac0Asynctrigch0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_vdac0_asynctrigch1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_vdac0_asynctrigch1.rs index 664f430..c3db7c3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_vdac0_asynctrigch1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_vdac0_asynctrigch1.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_VDAC0_ASYNCTRIGCH1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_VDAC0_ASYNCTRIGCH1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - ASYNCTRIG async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - ASYNCTRIG async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_VDAC0_ASYNCTRIGCH1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - ASYNCTRIG async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - ASYNCTRIG async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "ASYNCTRIG Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_vdac0_asynctrigch1](index.html) module"] -pub struct CONSUMER_VDAC0_ASYNCTRIGCH1_SPEC; -impl crate::RegisterSpec for CONSUMER_VDAC0_ASYNCTRIGCH1_SPEC { +#[doc = "ASYNCTRIG Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_vdac0_asynctrigch1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_vdac0_asynctrigch1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerVdac0Asynctrigch1Spec; +impl crate::RegisterSpec for ConsumerVdac0Asynctrigch1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_vdac0_asynctrigch1::R](R) reader structure"] -impl crate::Readable for CONSUMER_VDAC0_ASYNCTRIGCH1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_vdac0_asynctrigch1::W](W) writer structure"] -impl crate::Writable for CONSUMER_VDAC0_ASYNCTRIGCH1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_vdac0_asynctrigch1::R`](R) reader structure"] +impl crate::Readable for ConsumerVdac0Asynctrigch1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_vdac0_asynctrigch1::W`](W) writer structure"] +impl crate::Writable for ConsumerVdac0Asynctrigch1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_VDAC0_ASYNCTRIGCH1 to value 0"] -impl crate::Resettable for CONSUMER_VDAC0_ASYNCTRIGCH1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerVdac0Asynctrigch1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_vdac0_synctrigch0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_vdac0_synctrigch0.rs index d4da9f9..3e8f595 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_vdac0_synctrigch0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_vdac0_synctrigch0.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_VDAC0_SYNCTRIGCH0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_VDAC0_SYNCTRIGCH0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SPRSSEL` reader - SYNCTRIG sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - SYNCTRIG sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_VDAC0_SYNCTRIGCH0_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 8:9 - SYNCTRIG sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 8:9 - SYNCTRIG sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "SYNCTRIG Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_vdac0_synctrigch0](index.html) module"] -pub struct CONSUMER_VDAC0_SYNCTRIGCH0_SPEC; -impl crate::RegisterSpec for CONSUMER_VDAC0_SYNCTRIGCH0_SPEC { +#[doc = "SYNCTRIG Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_vdac0_synctrigch0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_vdac0_synctrigch0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerVdac0Synctrigch0Spec; +impl crate::RegisterSpec for ConsumerVdac0Synctrigch0Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_vdac0_synctrigch0::R](R) reader structure"] -impl crate::Readable for CONSUMER_VDAC0_SYNCTRIGCH0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_vdac0_synctrigch0::W](W) writer structure"] -impl crate::Writable for CONSUMER_VDAC0_SYNCTRIGCH0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_vdac0_synctrigch0::R`](R) reader structure"] +impl crate::Readable for ConsumerVdac0Synctrigch0Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_vdac0_synctrigch0::W`](W) writer structure"] +impl crate::Writable for ConsumerVdac0Synctrigch0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_VDAC0_SYNCTRIGCH0 to value 0"] -impl crate::Resettable for CONSUMER_VDAC0_SYNCTRIGCH0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerVdac0Synctrigch0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_vdac0_synctrigch1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_vdac0_synctrigch1.rs index a8410da..12088e9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_vdac0_synctrigch1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_vdac0_synctrigch1.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_VDAC0_SYNCTRIGCH1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_VDAC0_SYNCTRIGCH1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SPRSSEL` reader - SYNCTRIG sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - SYNCTRIG sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_VDAC0_SYNCTRIGCH1_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 8:9 - SYNCTRIG sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 8:9 - SYNCTRIG sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "SYNCTRIG Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_vdac0_synctrigch1](index.html) module"] -pub struct CONSUMER_VDAC0_SYNCTRIGCH1_SPEC; -impl crate::RegisterSpec for CONSUMER_VDAC0_SYNCTRIGCH1_SPEC { +#[doc = "SYNCTRIG Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_vdac0_synctrigch1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_vdac0_synctrigch1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerVdac0Synctrigch1Spec; +impl crate::RegisterSpec for ConsumerVdac0Synctrigch1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_vdac0_synctrigch1::R](R) reader structure"] -impl crate::Readable for CONSUMER_VDAC0_SYNCTRIGCH1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_vdac0_synctrigch1::W](W) writer structure"] -impl crate::Writable for CONSUMER_VDAC0_SYNCTRIGCH1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_vdac0_synctrigch1::R`](R) reader structure"] +impl crate::Readable for ConsumerVdac0Synctrigch1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_vdac0_synctrigch1::W`](W) writer structure"] +impl crate::Writable for ConsumerVdac0Synctrigch1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_VDAC0_SYNCTRIGCH1 to value 0"] -impl crate::Resettable for CONSUMER_VDAC0_SYNCTRIGCH1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerVdac0Synctrigch1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_wdog0_src0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_wdog0_src0.rs index 58f76c6..ca44da0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_wdog0_src0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_wdog0_src0.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_WDOG0_SRC0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_WDOG0_SRC0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - SRC0 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - SRC0 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_WDOG0_SRC0_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - SRC0 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - SRC0 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "SRC0 consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_wdog0_src0](index.html) module"] -pub struct CONSUMER_WDOG0_SRC0_SPEC; -impl crate::RegisterSpec for CONSUMER_WDOG0_SRC0_SPEC { +#[doc = "SRC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_wdog0_src0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_wdog0_src0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerWdog0Src0Spec; +impl crate::RegisterSpec for ConsumerWdog0Src0Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_wdog0_src0::R](R) reader structure"] -impl crate::Readable for CONSUMER_WDOG0_SRC0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_wdog0_src0::W](W) writer structure"] -impl crate::Writable for CONSUMER_WDOG0_SRC0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_wdog0_src0::R`](R) reader structure"] +impl crate::Readable for ConsumerWdog0Src0Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_wdog0_src0::W`](W) writer structure"] +impl crate::Writable for ConsumerWdog0Src0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_WDOG0_SRC0 to value 0"] -impl crate::Resettable for CONSUMER_WDOG0_SRC0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerWdog0Src0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_wdog0_src1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_wdog0_src1.rs index c1c5e7d..0570cb0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_wdog0_src1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_wdog0_src1.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_WDOG0_SRC1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_WDOG0_SRC1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - SRC1 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - SRC1 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_WDOG0_SRC1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - SRC1 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - SRC1 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "SRC1 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_wdog0_src1](index.html) module"] -pub struct CONSUMER_WDOG0_SRC1_SPEC; -impl crate::RegisterSpec for CONSUMER_WDOG0_SRC1_SPEC { +#[doc = "SRC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_wdog0_src1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_wdog0_src1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerWdog0Src1Spec; +impl crate::RegisterSpec for ConsumerWdog0Src1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_wdog0_src1::R](R) reader structure"] -impl crate::Readable for CONSUMER_WDOG0_SRC1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_wdog0_src1::W](W) writer structure"] -impl crate::Writable for CONSUMER_WDOG0_SRC1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_wdog0_src1::R`](R) reader structure"] +impl crate::Readable for ConsumerWdog0Src1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_wdog0_src1::W`](W) writer structure"] +impl crate::Writable for ConsumerWdog0Src1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_WDOG0_SRC1 to value 0"] -impl crate::Resettable for CONSUMER_WDOG0_SRC1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerWdog0Src1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_wdog1_src0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_wdog1_src0.rs index 87cbf9a..ebaad91 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_wdog1_src0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_wdog1_src0.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_WDOG1_SRC0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_WDOG1_SRC0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - SRC0 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - SRC0 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_WDOG1_SRC0_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - SRC0 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - SRC0 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "SRC0 consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_wdog1_src0](index.html) module"] -pub struct CONSUMER_WDOG1_SRC0_SPEC; -impl crate::RegisterSpec for CONSUMER_WDOG1_SRC0_SPEC { +#[doc = "SRC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_wdog1_src0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_wdog1_src0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerWdog1Src0Spec; +impl crate::RegisterSpec for ConsumerWdog1Src0Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_wdog1_src0::R](R) reader structure"] -impl crate::Readable for CONSUMER_WDOG1_SRC0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_wdog1_src0::W](W) writer structure"] -impl crate::Writable for CONSUMER_WDOG1_SRC0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_wdog1_src0::R`](R) reader structure"] +impl crate::Readable for ConsumerWdog1Src0Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_wdog1_src0::W`](W) writer structure"] +impl crate::Writable for ConsumerWdog1Src0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_WDOG1_SRC0 to value 0"] -impl crate::Resettable for CONSUMER_WDOG1_SRC0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerWdog1Src0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_wdog1_src1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_wdog1_src1.rs index 8a39e1c..f933aad 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_wdog1_src1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/consumer_wdog1_src1.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_WDOG1_SRC1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_WDOG1_SRC1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - SRC1 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - SRC1 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_WDOG1_SRC1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - SRC1 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - SRC1 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "SRC1 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_wdog1_src1](index.html) module"] -pub struct CONSUMER_WDOG1_SRC1_SPEC; -impl crate::RegisterSpec for CONSUMER_WDOG1_SRC1_SPEC { +#[doc = "SRC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_wdog1_src1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_wdog1_src1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerWdog1Src1Spec; +impl crate::RegisterSpec for ConsumerWdog1Src1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_wdog1_src1::R](R) reader structure"] -impl crate::Readable for CONSUMER_WDOG1_SRC1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_wdog1_src1::W](W) writer structure"] -impl crate::Writable for CONSUMER_WDOG1_SRC1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_wdog1_src1::R`](R) reader structure"] +impl crate::Readable for ConsumerWdog1Src1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_wdog1_src1::W`](W) writer structure"] +impl crate::Writable for ConsumerWdog1Src1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_WDOG1_SRC1 to value 0"] -impl crate::Resettable for CONSUMER_WDOG1_SRC1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerWdog1Src1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/ipversion.rs index 6001e4c..997a40c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - New BitField"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - New BitField"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x02"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/sync_ch0_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/sync_ch0_ctrl.rs index 631e69e..51a2e4a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/sync_ch0_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/sync_ch0_ctrl.rs @@ -1,132 +1,98 @@ #[doc = "Register `SYNC_CH0_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SYNC_CH0_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYNC_CH0_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYNC_CH0_CTRL_SPEC, u8, u8, 7, O>; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sync_ch0_ctrl](index.html) module"] -pub struct SYNC_CH0_CTRL_SPEC; -impl crate::RegisterSpec for SYNC_CH0_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sync_ch0_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sync_ch0_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncCh0CtrlSpec; +impl crate::RegisterSpec for SyncCh0CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [sync_ch0_ctrl::R](R) reader structure"] -impl crate::Readable for SYNC_CH0_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sync_ch0_ctrl::W](W) writer structure"] -impl crate::Writable for SYNC_CH0_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`sync_ch0_ctrl::R`](R) reader structure"] +impl crate::Readable for SyncCh0CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`sync_ch0_ctrl::W`](W) writer structure"] +impl crate::Writable for SyncCh0CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYNC_CH0_CTRL to value 0"] -impl crate::Resettable for SYNC_CH0_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncCh0CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/sync_ch1_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/sync_ch1_ctrl.rs index 03153f6..2dca602 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/sync_ch1_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/sync_ch1_ctrl.rs @@ -1,132 +1,98 @@ #[doc = "Register `SYNC_CH1_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SYNC_CH1_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYNC_CH1_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYNC_CH1_CTRL_SPEC, u8, u8, 7, O>; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sync_ch1_ctrl](index.html) module"] -pub struct SYNC_CH1_CTRL_SPEC; -impl crate::RegisterSpec for SYNC_CH1_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sync_ch1_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sync_ch1_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncCh1CtrlSpec; +impl crate::RegisterSpec for SyncCh1CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [sync_ch1_ctrl::R](R) reader structure"] -impl crate::Readable for SYNC_CH1_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sync_ch1_ctrl::W](W) writer structure"] -impl crate::Writable for SYNC_CH1_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`sync_ch1_ctrl::R`](R) reader structure"] +impl crate::Readable for SyncCh1CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`sync_ch1_ctrl::W`](W) writer structure"] +impl crate::Writable for SyncCh1CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYNC_CH1_CTRL to value 0"] -impl crate::Resettable for SYNC_CH1_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncCh1CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/sync_ch2_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/sync_ch2_ctrl.rs index 6e929b6..4ace9c8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/sync_ch2_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/sync_ch2_ctrl.rs @@ -1,132 +1,98 @@ #[doc = "Register `SYNC_CH2_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SYNC_CH2_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYNC_CH2_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYNC_CH2_CTRL_SPEC, u8, u8, 7, O>; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sync_ch2_ctrl](index.html) module"] -pub struct SYNC_CH2_CTRL_SPEC; -impl crate::RegisterSpec for SYNC_CH2_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sync_ch2_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sync_ch2_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncCh2CtrlSpec; +impl crate::RegisterSpec for SyncCh2CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [sync_ch2_ctrl::R](R) reader structure"] -impl crate::Readable for SYNC_CH2_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sync_ch2_ctrl::W](W) writer structure"] -impl crate::Writable for SYNC_CH2_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`sync_ch2_ctrl::R`](R) reader structure"] +impl crate::Readable for SyncCh2CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`sync_ch2_ctrl::W`](W) writer structure"] +impl crate::Writable for SyncCh2CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYNC_CH2_CTRL to value 0"] -impl crate::Resettable for SYNC_CH2_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncCh2CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/sync_ch3_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/sync_ch3_ctrl.rs index a757217..52961f4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/sync_ch3_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/sync_ch3_ctrl.rs @@ -1,132 +1,98 @@ #[doc = "Register `SYNC_CH3_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SYNC_CH3_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYNC_CH3_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYNC_CH3_CTRL_SPEC, u8, u8, 7, O>; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sync_ch3_ctrl](index.html) module"] -pub struct SYNC_CH3_CTRL_SPEC; -impl crate::RegisterSpec for SYNC_CH3_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sync_ch3_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sync_ch3_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncCh3CtrlSpec; +impl crate::RegisterSpec for SyncCh3CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [sync_ch3_ctrl::R](R) reader structure"] -impl crate::Readable for SYNC_CH3_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sync_ch3_ctrl::W](W) writer structure"] -impl crate::Writable for SYNC_CH3_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`sync_ch3_ctrl::R`](R) reader structure"] +impl crate::Readable for SyncCh3CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`sync_ch3_ctrl::W`](W) writer structure"] +impl crate::Writable for SyncCh3CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYNC_CH3_CTRL to value 0"] -impl crate::Resettable for SYNC_CH3_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncCh3CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/sync_peek.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/sync_peek.rs index efc7a5c..b237ece 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/sync_peek.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_ns/sync_peek.rs @@ -1,58 +1,43 @@ #[doc = "Register `SYNC_PEEK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CH0VAL` reader - Channel Value"] -pub type CH0VAL_R = crate::BitReader; +pub type Ch0valR = crate::BitReader; #[doc = "Field `CH1VAL` reader - Channel Value"] -pub type CH1VAL_R = crate::BitReader; +pub type Ch1valR = crate::BitReader; #[doc = "Field `CH2VAL` reader - Channel Value"] -pub type CH2VAL_R = crate::BitReader; +pub type Ch2valR = crate::BitReader; #[doc = "Field `CH3VAL` reader - Channel Value"] -pub type CH3VAL_R = crate::BitReader; +pub type Ch3valR = crate::BitReader; impl R { #[doc = "Bit 0 - Channel Value"] #[inline(always)] - pub fn ch0val(&self) -> CH0VAL_R { - CH0VAL_R::new((self.bits & 1) != 0) + pub fn ch0val(&self) -> Ch0valR { + Ch0valR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channel Value"] #[inline(always)] - pub fn ch1val(&self) -> CH1VAL_R { - CH1VAL_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1val(&self) -> Ch1valR { + Ch1valR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Channel Value"] #[inline(always)] - pub fn ch2val(&self) -> CH2VAL_R { - CH2VAL_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2val(&self) -> Ch2valR { + Ch2valR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Channel Value"] #[inline(always)] - pub fn ch3val(&self) -> CH3VAL_R { - CH3VAL_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3val(&self) -> Ch3valR { + Ch3valR::new(((self.bits >> 3) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sync_peek](index.html) module"] -pub struct SYNC_PEEK_SPEC; -impl crate::RegisterSpec for SYNC_PEEK_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sync_peek::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncPeekSpec; +impl crate::RegisterSpec for SyncPeekSpec { type Ux = u32; } -#[doc = "`read()` method returns [sync_peek::R](R) reader structure"] -impl crate::Readable for SYNC_PEEK_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`sync_peek::R`](R) reader structure"] +impl crate::Readable for SyncPeekSpec {} #[doc = "`reset()` method sets SYNC_PEEK to value 0"] -impl crate::Resettable for SYNC_PEEK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncPeekSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s.rs index ed2b15c..cbd0d82 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s.rs @@ -1,631 +1,1227 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + ipversion: Ipversion, _reserved1: [u8; 0x04], + async_swpulse: AsyncSwpulse, + async_swlevel: AsyncSwlevel, + async_peek: AsyncPeek, + sync_peek: SyncPeek, + async_ch0_ctrl: AsyncCh0Ctrl, + async_ch1_ctrl: AsyncCh1Ctrl, + async_ch2_ctrl: AsyncCh2Ctrl, + async_ch3_ctrl: AsyncCh3Ctrl, + async_ch4_ctrl: AsyncCh4Ctrl, + async_ch5_ctrl: AsyncCh5Ctrl, + async_ch6_ctrl: AsyncCh6Ctrl, + async_ch7_ctrl: AsyncCh7Ctrl, + async_ch8_ctrl: AsyncCh8Ctrl, + async_ch9_ctrl: AsyncCh9Ctrl, + async_ch10_ctrl: AsyncCh10Ctrl, + async_ch11_ctrl: AsyncCh11Ctrl, + sync_ch0_ctrl: SyncCh0Ctrl, + sync_ch1_ctrl: SyncCh1Ctrl, + sync_ch2_ctrl: SyncCh2Ctrl, + sync_ch3_ctrl: SyncCh3Ctrl, + consumer_cmu_caldn: ConsumerCmuCaldn, + consumer_cmu_calup: ConsumerCmuCalup, + consumer_eusart0_clk: ConsumerEusart0Clk, + consumer_eusart0_rx: ConsumerEusart0Rx, + consumer_eusart0_trigger: ConsumerEusart0Trigger, + consumer_eusart1_clk: ConsumerEusart1Clk, + consumer_eusart1_rx: ConsumerEusart1Rx, + consumer_eusart1_trigger: ConsumerEusart1Trigger, + consumer_eusart2_clk: ConsumerEusart2Clk, + consumer_eusart2_rx: ConsumerEusart2Rx, + consumer_eusart2_trigger: ConsumerEusart2Trigger, + _reserved32: [u8; 0x04], + consumer_iadc0_scantrigger: ConsumerIadc0Scantrigger, + consumer_iadc0_singletrigger: ConsumerIadc0Singletrigger, + consumer_ldmaxbar_dmareq0: ConsumerLdmaxbarDmareq0, + consumer_ldmaxbar_dmareq1: ConsumerLdmaxbarDmareq1, + _reserved36: [u8; 0x10], + consumer_lesense_start: ConsumerLesenseStart, + consumer_letimer0_clear: ConsumerLetimer0Clear, + consumer_letimer0_start: ConsumerLetimer0Start, + consumer_letimer0_stop: ConsumerLetimer0Stop, + _reserved40: [u8; 0x04], + consumer_pcnt0_s0in: ConsumerPcnt0S0in, + consumer_pcnt0_s1in: ConsumerPcnt0S1in, + _reserved42: [u8; 0x50], + consumer_setamper_tampersrc25: ConsumerSetamperTampersrc25, + consumer_setamper_tampersrc26: ConsumerSetamperTampersrc26, + consumer_setamper_tampersrc27: ConsumerSetamperTampersrc27, + consumer_setamper_tampersrc28: ConsumerSetamperTampersrc28, + consumer_setamper_tampersrc29: ConsumerSetamperTampersrc29, + consumer_setamper_tampersrc30: ConsumerSetamperTampersrc30, + consumer_setamper_tampersrc31: ConsumerSetamperTampersrc31, + consumer_sysrtc0_in0: ConsumerSysrtc0In0, + consumer_sysrtc0_in1: ConsumerSysrtc0In1, + consumer_hfxo0_oscreq: ConsumerHfxo0Oscreq, + consumer_hfxo0_timeout: ConsumerHfxo0Timeout, + consumer_core_ctiin0: ConsumerCoreCtiin0, + consumer_core_ctiin1: ConsumerCoreCtiin1, + consumer_core_ctiin2: ConsumerCoreCtiin2, + consumer_core_ctiin3: ConsumerCoreCtiin3, + consumer_core_m33rxev: ConsumerCoreM33rxev, + consumer_timer0_cc0: ConsumerTimer0Cc0, + consumer_timer0_cc1: ConsumerTimer0Cc1, + consumer_timer0_cc2: ConsumerTimer0Cc2, + consumer_timer0_dti: ConsumerTimer0Dti, + consumer_timer0_dtifs1: ConsumerTimer0Dtifs1, + consumer_timer0_dtifs2: ConsumerTimer0Dtifs2, + consumer_timer1_cc0: ConsumerTimer1Cc0, + consumer_timer1_cc1: ConsumerTimer1Cc1, + consumer_timer1_cc2: ConsumerTimer1Cc2, + consumer_timer1_dti: ConsumerTimer1Dti, + consumer_timer1_dtifs1: ConsumerTimer1Dtifs1, + consumer_timer1_dtifs2: ConsumerTimer1Dtifs2, + consumer_timer2_cc0: ConsumerTimer2Cc0, + consumer_timer2_cc1: ConsumerTimer2Cc1, + consumer_timer2_cc2: ConsumerTimer2Cc2, + consumer_timer2_dti: ConsumerTimer2Dti, + consumer_timer2_dtifs1: ConsumerTimer2Dtifs1, + consumer_timer2_dtifs2: ConsumerTimer2Dtifs2, + consumer_timer3_cc0: ConsumerTimer3Cc0, + consumer_timer3_cc1: ConsumerTimer3Cc1, + consumer_timer3_cc2: ConsumerTimer3Cc2, + consumer_timer3_dti: ConsumerTimer3Dti, + consumer_timer3_dtifs1: ConsumerTimer3Dtifs1, + consumer_timer3_dtifs2: ConsumerTimer3Dtifs2, + consumer_timer4_cc0: ConsumerTimer4Cc0, + consumer_timer4_cc1: ConsumerTimer4Cc1, + consumer_timer4_cc2: ConsumerTimer4Cc2, + consumer_timer4_dti: ConsumerTimer4Dti, + consumer_timer4_dtifs1: ConsumerTimer4Dtifs1, + consumer_timer4_dtifs2: ConsumerTimer4Dtifs2, + consumer_usart0_clk: ConsumerUsart0Clk, + consumer_usart0_ir: ConsumerUsart0Ir, + consumer_usart0_rx: ConsumerUsart0Rx, + consumer_usart0_trigger: ConsumerUsart0Trigger, + _reserved92: [u8; 0x0c], + consumer_vdac0_asynctrigch0: ConsumerVdac0Asynctrigch0, + consumer_vdac0_asynctrigch1: ConsumerVdac0Asynctrigch1, + consumer_vdac0_synctrigch0: ConsumerVdac0Synctrigch0, + consumer_vdac0_synctrigch1: ConsumerVdac0Synctrigch1, + consumer_wdog0_src0: ConsumerWdog0Src0, + consumer_wdog0_src1: ConsumerWdog0Src1, + consumer_wdog1_src0: ConsumerWdog1Src0, + consumer_wdog1_src1: ConsumerWdog1Src1, +} +impl RegisterBlock { + #[doc = "0x00 - No Description"] + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x08 - No Description"] - pub async_swpulse: ASYNC_SWPULSE, + #[inline(always)] + pub const fn async_swpulse(&self) -> &AsyncSwpulse { + &self.async_swpulse + } #[doc = "0x0c - No Description"] - pub async_swlevel: ASYNC_SWLEVEL, + #[inline(always)] + pub const fn async_swlevel(&self) -> &AsyncSwlevel { + &self.async_swlevel + } #[doc = "0x10 - No Description"] - pub async_peek: ASYNC_PEEK, + #[inline(always)] + pub const fn async_peek(&self) -> &AsyncPeek { + &self.async_peek + } #[doc = "0x14 - No Description"] - pub sync_peek: SYNC_PEEK, + #[inline(always)] + pub const fn sync_peek(&self) -> &SyncPeek { + &self.sync_peek + } #[doc = "0x18 - No Description"] - pub async_ch0_ctrl: ASYNC_CH0_CTRL, + #[inline(always)] + pub const fn async_ch0_ctrl(&self) -> &AsyncCh0Ctrl { + &self.async_ch0_ctrl + } #[doc = "0x1c - No Description"] - pub async_ch1_ctrl: ASYNC_CH1_CTRL, + #[inline(always)] + pub const fn async_ch1_ctrl(&self) -> &AsyncCh1Ctrl { + &self.async_ch1_ctrl + } #[doc = "0x20 - No Description"] - pub async_ch2_ctrl: ASYNC_CH2_CTRL, + #[inline(always)] + pub const fn async_ch2_ctrl(&self) -> &AsyncCh2Ctrl { + &self.async_ch2_ctrl + } #[doc = "0x24 - No Description"] - pub async_ch3_ctrl: ASYNC_CH3_CTRL, + #[inline(always)] + pub const fn async_ch3_ctrl(&self) -> &AsyncCh3Ctrl { + &self.async_ch3_ctrl + } #[doc = "0x28 - No Description"] - pub async_ch4_ctrl: ASYNC_CH4_CTRL, + #[inline(always)] + pub const fn async_ch4_ctrl(&self) -> &AsyncCh4Ctrl { + &self.async_ch4_ctrl + } #[doc = "0x2c - No Description"] - pub async_ch5_ctrl: ASYNC_CH5_CTRL, + #[inline(always)] + pub const fn async_ch5_ctrl(&self) -> &AsyncCh5Ctrl { + &self.async_ch5_ctrl + } #[doc = "0x30 - No Description"] - pub async_ch6_ctrl: ASYNC_CH6_CTRL, + #[inline(always)] + pub const fn async_ch6_ctrl(&self) -> &AsyncCh6Ctrl { + &self.async_ch6_ctrl + } #[doc = "0x34 - No Description"] - pub async_ch7_ctrl: ASYNC_CH7_CTRL, + #[inline(always)] + pub const fn async_ch7_ctrl(&self) -> &AsyncCh7Ctrl { + &self.async_ch7_ctrl + } #[doc = "0x38 - No Description"] - pub async_ch8_ctrl: ASYNC_CH8_CTRL, + #[inline(always)] + pub const fn async_ch8_ctrl(&self) -> &AsyncCh8Ctrl { + &self.async_ch8_ctrl + } #[doc = "0x3c - No Description"] - pub async_ch9_ctrl: ASYNC_CH9_CTRL, + #[inline(always)] + pub const fn async_ch9_ctrl(&self) -> &AsyncCh9Ctrl { + &self.async_ch9_ctrl + } #[doc = "0x40 - No Description"] - pub async_ch10_ctrl: ASYNC_CH10_CTRL, + #[inline(always)] + pub const fn async_ch10_ctrl(&self) -> &AsyncCh10Ctrl { + &self.async_ch10_ctrl + } #[doc = "0x44 - No Description"] - pub async_ch11_ctrl: ASYNC_CH11_CTRL, + #[inline(always)] + pub const fn async_ch11_ctrl(&self) -> &AsyncCh11Ctrl { + &self.async_ch11_ctrl + } #[doc = "0x48 - No Description"] - pub sync_ch0_ctrl: SYNC_CH0_CTRL, + #[inline(always)] + pub const fn sync_ch0_ctrl(&self) -> &SyncCh0Ctrl { + &self.sync_ch0_ctrl + } #[doc = "0x4c - No Description"] - pub sync_ch1_ctrl: SYNC_CH1_CTRL, + #[inline(always)] + pub const fn sync_ch1_ctrl(&self) -> &SyncCh1Ctrl { + &self.sync_ch1_ctrl + } #[doc = "0x50 - No Description"] - pub sync_ch2_ctrl: SYNC_CH2_CTRL, + #[inline(always)] + pub const fn sync_ch2_ctrl(&self) -> &SyncCh2Ctrl { + &self.sync_ch2_ctrl + } #[doc = "0x54 - No Description"] - pub sync_ch3_ctrl: SYNC_CH3_CTRL, + #[inline(always)] + pub const fn sync_ch3_ctrl(&self) -> &SyncCh3Ctrl { + &self.sync_ch3_ctrl + } #[doc = "0x58 - CALDN consumer register"] - pub consumer_cmu_caldn: CONSUMER_CMU_CALDN, + #[inline(always)] + pub const fn consumer_cmu_caldn(&self) -> &ConsumerCmuCaldn { + &self.consumer_cmu_caldn + } #[doc = "0x5c - CALUP Consumer register"] - pub consumer_cmu_calup: CONSUMER_CMU_CALUP, + #[inline(always)] + pub const fn consumer_cmu_calup(&self) -> &ConsumerCmuCalup { + &self.consumer_cmu_calup + } #[doc = "0x60 - CLK consumer register"] - pub consumer_eusart0_clk: CONSUMER_EUSART0_CLK, + #[inline(always)] + pub const fn consumer_eusart0_clk(&self) -> &ConsumerEusart0Clk { + &self.consumer_eusart0_clk + } #[doc = "0x64 - RX Consumer register"] - pub consumer_eusart0_rx: CONSUMER_EUSART0_RX, + #[inline(always)] + pub const fn consumer_eusart0_rx(&self) -> &ConsumerEusart0Rx { + &self.consumer_eusart0_rx + } #[doc = "0x68 - TRIGGER Consumer register"] - pub consumer_eusart0_trigger: CONSUMER_EUSART0_TRIGGER, + #[inline(always)] + pub const fn consumer_eusart0_trigger(&self) -> &ConsumerEusart0Trigger { + &self.consumer_eusart0_trigger + } #[doc = "0x6c - CLK consumer register"] - pub consumer_eusart1_clk: CONSUMER_EUSART1_CLK, + #[inline(always)] + pub const fn consumer_eusart1_clk(&self) -> &ConsumerEusart1Clk { + &self.consumer_eusart1_clk + } #[doc = "0x70 - RX Consumer register"] - pub consumer_eusart1_rx: CONSUMER_EUSART1_RX, + #[inline(always)] + pub const fn consumer_eusart1_rx(&self) -> &ConsumerEusart1Rx { + &self.consumer_eusart1_rx + } #[doc = "0x74 - TRIGGER Consumer register"] - pub consumer_eusart1_trigger: CONSUMER_EUSART1_TRIGGER, + #[inline(always)] + pub const fn consumer_eusart1_trigger(&self) -> &ConsumerEusart1Trigger { + &self.consumer_eusart1_trigger + } #[doc = "0x78 - CLK consumer register"] - pub consumer_eusart2_clk: CONSUMER_EUSART2_CLK, + #[inline(always)] + pub const fn consumer_eusart2_clk(&self) -> &ConsumerEusart2Clk { + &self.consumer_eusart2_clk + } #[doc = "0x7c - RX Consumer register"] - pub consumer_eusart2_rx: CONSUMER_EUSART2_RX, + #[inline(always)] + pub const fn consumer_eusart2_rx(&self) -> &ConsumerEusart2Rx { + &self.consumer_eusart2_rx + } #[doc = "0x80 - TRIGGER Consumer register"] - pub consumer_eusart2_trigger: CONSUMER_EUSART2_TRIGGER, - _reserved32: [u8; 0x04], + #[inline(always)] + pub const fn consumer_eusart2_trigger(&self) -> &ConsumerEusart2Trigger { + &self.consumer_eusart2_trigger + } #[doc = "0x88 - SCAN consumer register"] - pub consumer_iadc0_scantrigger: CONSUMER_IADC0_SCANTRIGGER, + #[inline(always)] + pub const fn consumer_iadc0_scantrigger(&self) -> &ConsumerIadc0Scantrigger { + &self.consumer_iadc0_scantrigger + } #[doc = "0x8c - SINGLE Consumer register"] - pub consumer_iadc0_singletrigger: CONSUMER_IADC0_SINGLETRIGGER, + #[inline(always)] + pub const fn consumer_iadc0_singletrigger(&self) -> &ConsumerIadc0Singletrigger { + &self.consumer_iadc0_singletrigger + } #[doc = "0x90 - DMAREQ0 consumer register"] - pub consumer_ldmaxbar_dmareq0: CONSUMER_LDMAXBAR_DMAREQ0, + #[inline(always)] + pub const fn consumer_ldmaxbar_dmareq0(&self) -> &ConsumerLdmaxbarDmareq0 { + &self.consumer_ldmaxbar_dmareq0 + } #[doc = "0x94 - DMAREQ1 Consumer register"] - pub consumer_ldmaxbar_dmareq1: CONSUMER_LDMAXBAR_DMAREQ1, - _reserved36: [u8; 0x10], + #[inline(always)] + pub const fn consumer_ldmaxbar_dmareq1(&self) -> &ConsumerLdmaxbarDmareq1 { + &self.consumer_ldmaxbar_dmareq1 + } #[doc = "0xa8 - START Consumer register"] - pub consumer_lesense_start: CONSUMER_LESENSE_START, + #[inline(always)] + pub const fn consumer_lesense_start(&self) -> &ConsumerLesenseStart { + &self.consumer_lesense_start + } #[doc = "0xac - CLEAR consumer register"] - pub consumer_letimer0_clear: CONSUMER_LETIMER0_CLEAR, + #[inline(always)] + pub const fn consumer_letimer0_clear(&self) -> &ConsumerLetimer0Clear { + &self.consumer_letimer0_clear + } #[doc = "0xb0 - START Consumer register"] - pub consumer_letimer0_start: CONSUMER_LETIMER0_START, + #[inline(always)] + pub const fn consumer_letimer0_start(&self) -> &ConsumerLetimer0Start { + &self.consumer_letimer0_start + } #[doc = "0xb4 - STOP Consumer register"] - pub consumer_letimer0_stop: CONSUMER_LETIMER0_STOP, - _reserved40: [u8; 0x04], + #[inline(always)] + pub const fn consumer_letimer0_stop(&self) -> &ConsumerLetimer0Stop { + &self.consumer_letimer0_stop + } #[doc = "0xbc - S0IN consumer register"] - pub consumer_pcnt0_s0in: CONSUMER_PCNT0_S0IN, + #[inline(always)] + pub const fn consumer_pcnt0_s0in(&self) -> &ConsumerPcnt0S0in { + &self.consumer_pcnt0_s0in + } #[doc = "0xc0 - S1IN Consumer register"] - pub consumer_pcnt0_s1in: CONSUMER_PCNT0_S1IN, - _reserved42: [u8; 0x50], + #[inline(always)] + pub const fn consumer_pcnt0_s1in(&self) -> &ConsumerPcnt0S1in { + &self.consumer_pcnt0_s1in + } #[doc = "0x114 - TAMPERSRC25 consumer register"] - pub consumer_setamper_tampersrc25: CONSUMER_SETAMPER_TAMPERSRC25, + #[inline(always)] + pub const fn consumer_setamper_tampersrc25(&self) -> &ConsumerSetamperTampersrc25 { + &self.consumer_setamper_tampersrc25 + } #[doc = "0x118 - TAMPERSRC26 Consumer register"] - pub consumer_setamper_tampersrc26: CONSUMER_SETAMPER_TAMPERSRC26, + #[inline(always)] + pub const fn consumer_setamper_tampersrc26(&self) -> &ConsumerSetamperTampersrc26 { + &self.consumer_setamper_tampersrc26 + } #[doc = "0x11c - TAMPERSRC27 Consumer register"] - pub consumer_setamper_tampersrc27: CONSUMER_SETAMPER_TAMPERSRC27, + #[inline(always)] + pub const fn consumer_setamper_tampersrc27(&self) -> &ConsumerSetamperTampersrc27 { + &self.consumer_setamper_tampersrc27 + } #[doc = "0x120 - TAMPERSRC28 Consumer register"] - pub consumer_setamper_tampersrc28: CONSUMER_SETAMPER_TAMPERSRC28, + #[inline(always)] + pub const fn consumer_setamper_tampersrc28(&self) -> &ConsumerSetamperTampersrc28 { + &self.consumer_setamper_tampersrc28 + } #[doc = "0x124 - TAMPERSRC29 Consumer register"] - pub consumer_setamper_tampersrc29: CONSUMER_SETAMPER_TAMPERSRC29, + #[inline(always)] + pub const fn consumer_setamper_tampersrc29(&self) -> &ConsumerSetamperTampersrc29 { + &self.consumer_setamper_tampersrc29 + } #[doc = "0x128 - TAMPERSRC30 Consumer register"] - pub consumer_setamper_tampersrc30: CONSUMER_SETAMPER_TAMPERSRC30, + #[inline(always)] + pub const fn consumer_setamper_tampersrc30(&self) -> &ConsumerSetamperTampersrc30 { + &self.consumer_setamper_tampersrc30 + } #[doc = "0x12c - TAMPERSRC31 Consumer register"] - pub consumer_setamper_tampersrc31: CONSUMER_SETAMPER_TAMPERSRC31, + #[inline(always)] + pub const fn consumer_setamper_tampersrc31(&self) -> &ConsumerSetamperTampersrc31 { + &self.consumer_setamper_tampersrc31 + } #[doc = "0x130 - IN0 consumer register"] - pub consumer_sysrtc0_in0: CONSUMER_SYSRTC0_IN0, + #[inline(always)] + pub const fn consumer_sysrtc0_in0(&self) -> &ConsumerSysrtc0In0 { + &self.consumer_sysrtc0_in0 + } #[doc = "0x134 - IN1 Consumer register"] - pub consumer_sysrtc0_in1: CONSUMER_SYSRTC0_IN1, + #[inline(always)] + pub const fn consumer_sysrtc0_in1(&self) -> &ConsumerSysrtc0In1 { + &self.consumer_sysrtc0_in1 + } #[doc = "0x138 - OSCREQ consumer register"] - pub consumer_hfxo0_oscreq: CONSUMER_HFXO0_OSCREQ, + #[inline(always)] + pub const fn consumer_hfxo0_oscreq(&self) -> &ConsumerHfxo0Oscreq { + &self.consumer_hfxo0_oscreq + } #[doc = "0x13c - TIMEOUT Consumer register"] - pub consumer_hfxo0_timeout: CONSUMER_HFXO0_TIMEOUT, + #[inline(always)] + pub const fn consumer_hfxo0_timeout(&self) -> &ConsumerHfxo0Timeout { + &self.consumer_hfxo0_timeout + } #[doc = "0x140 - CTI Consumer Register"] - pub consumer_core_ctiin0: CONSUMER_CORE_CTIIN0, + #[inline(always)] + pub const fn consumer_core_ctiin0(&self) -> &ConsumerCoreCtiin0 { + &self.consumer_core_ctiin0 + } #[doc = "0x144 - CTI Consumer Register"] - pub consumer_core_ctiin1: CONSUMER_CORE_CTIIN1, + #[inline(always)] + pub const fn consumer_core_ctiin1(&self) -> &ConsumerCoreCtiin1 { + &self.consumer_core_ctiin1 + } #[doc = "0x148 - CTI Consumer Register"] - pub consumer_core_ctiin2: CONSUMER_CORE_CTIIN2, + #[inline(always)] + pub const fn consumer_core_ctiin2(&self) -> &ConsumerCoreCtiin2 { + &self.consumer_core_ctiin2 + } #[doc = "0x14c - CTI Consumer Register"] - pub consumer_core_ctiin3: CONSUMER_CORE_CTIIN3, + #[inline(always)] + pub const fn consumer_core_ctiin3(&self) -> &ConsumerCoreCtiin3 { + &self.consumer_core_ctiin3 + } #[doc = "0x150 - M33 Consumer Register"] - pub consumer_core_m33rxev: CONSUMER_CORE_M33RXEV, + #[inline(always)] + pub const fn consumer_core_m33rxev(&self) -> &ConsumerCoreM33rxev { + &self.consumer_core_m33rxev + } #[doc = "0x154 - CC0 consumer register"] - pub consumer_timer0_cc0: CONSUMER_TIMER0_CC0, + #[inline(always)] + pub const fn consumer_timer0_cc0(&self) -> &ConsumerTimer0Cc0 { + &self.consumer_timer0_cc0 + } #[doc = "0x158 - CC1 Consumer register"] - pub consumer_timer0_cc1: CONSUMER_TIMER0_CC1, + #[inline(always)] + pub const fn consumer_timer0_cc1(&self) -> &ConsumerTimer0Cc1 { + &self.consumer_timer0_cc1 + } #[doc = "0x15c - CC2 Consumer register"] - pub consumer_timer0_cc2: CONSUMER_TIMER0_CC2, + #[inline(always)] + pub const fn consumer_timer0_cc2(&self) -> &ConsumerTimer0Cc2 { + &self.consumer_timer0_cc2 + } #[doc = "0x160 - DTI Consumer register"] - pub consumer_timer0_dti: CONSUMER_TIMER0_DTI, + #[inline(always)] + pub const fn consumer_timer0_dti(&self) -> &ConsumerTimer0Dti { + &self.consumer_timer0_dti + } #[doc = "0x164 - DTI Consumer register"] - pub consumer_timer0_dtifs1: CONSUMER_TIMER0_DTIFS1, + #[inline(always)] + pub const fn consumer_timer0_dtifs1(&self) -> &ConsumerTimer0Dtifs1 { + &self.consumer_timer0_dtifs1 + } #[doc = "0x168 - DTI Consumer register"] - pub consumer_timer0_dtifs2: CONSUMER_TIMER0_DTIFS2, + #[inline(always)] + pub const fn consumer_timer0_dtifs2(&self) -> &ConsumerTimer0Dtifs2 { + &self.consumer_timer0_dtifs2 + } #[doc = "0x16c - CC0 consumer register"] - pub consumer_timer1_cc0: CONSUMER_TIMER1_CC0, + #[inline(always)] + pub const fn consumer_timer1_cc0(&self) -> &ConsumerTimer1Cc0 { + &self.consumer_timer1_cc0 + } #[doc = "0x170 - CC1 Consumer register"] - pub consumer_timer1_cc1: CONSUMER_TIMER1_CC1, + #[inline(always)] + pub const fn consumer_timer1_cc1(&self) -> &ConsumerTimer1Cc1 { + &self.consumer_timer1_cc1 + } #[doc = "0x174 - CC2 Consumer register"] - pub consumer_timer1_cc2: CONSUMER_TIMER1_CC2, + #[inline(always)] + pub const fn consumer_timer1_cc2(&self) -> &ConsumerTimer1Cc2 { + &self.consumer_timer1_cc2 + } #[doc = "0x178 - DTI Consumer register"] - pub consumer_timer1_dti: CONSUMER_TIMER1_DTI, + #[inline(always)] + pub const fn consumer_timer1_dti(&self) -> &ConsumerTimer1Dti { + &self.consumer_timer1_dti + } #[doc = "0x17c - DTI Consumer register"] - pub consumer_timer1_dtifs1: CONSUMER_TIMER1_DTIFS1, + #[inline(always)] + pub const fn consumer_timer1_dtifs1(&self) -> &ConsumerTimer1Dtifs1 { + &self.consumer_timer1_dtifs1 + } #[doc = "0x180 - DTI Consumer register"] - pub consumer_timer1_dtifs2: CONSUMER_TIMER1_DTIFS2, + #[inline(always)] + pub const fn consumer_timer1_dtifs2(&self) -> &ConsumerTimer1Dtifs2 { + &self.consumer_timer1_dtifs2 + } #[doc = "0x184 - CC0 consumer register"] - pub consumer_timer2_cc0: CONSUMER_TIMER2_CC0, + #[inline(always)] + pub const fn consumer_timer2_cc0(&self) -> &ConsumerTimer2Cc0 { + &self.consumer_timer2_cc0 + } #[doc = "0x188 - CC1 Consumer register"] - pub consumer_timer2_cc1: CONSUMER_TIMER2_CC1, + #[inline(always)] + pub const fn consumer_timer2_cc1(&self) -> &ConsumerTimer2Cc1 { + &self.consumer_timer2_cc1 + } #[doc = "0x18c - CC2 Consumer register"] - pub consumer_timer2_cc2: CONSUMER_TIMER2_CC2, + #[inline(always)] + pub const fn consumer_timer2_cc2(&self) -> &ConsumerTimer2Cc2 { + &self.consumer_timer2_cc2 + } #[doc = "0x190 - DTI Consumer register"] - pub consumer_timer2_dti: CONSUMER_TIMER2_DTI, + #[inline(always)] + pub const fn consumer_timer2_dti(&self) -> &ConsumerTimer2Dti { + &self.consumer_timer2_dti + } #[doc = "0x194 - DTI Consumer register"] - pub consumer_timer2_dtifs1: CONSUMER_TIMER2_DTIFS1, + #[inline(always)] + pub const fn consumer_timer2_dtifs1(&self) -> &ConsumerTimer2Dtifs1 { + &self.consumer_timer2_dtifs1 + } #[doc = "0x198 - DTI Consumer register"] - pub consumer_timer2_dtifs2: CONSUMER_TIMER2_DTIFS2, + #[inline(always)] + pub const fn consumer_timer2_dtifs2(&self) -> &ConsumerTimer2Dtifs2 { + &self.consumer_timer2_dtifs2 + } #[doc = "0x19c - CC0 consumer register"] - pub consumer_timer3_cc0: CONSUMER_TIMER3_CC0, + #[inline(always)] + pub const fn consumer_timer3_cc0(&self) -> &ConsumerTimer3Cc0 { + &self.consumer_timer3_cc0 + } #[doc = "0x1a0 - CC1 Consumer register"] - pub consumer_timer3_cc1: CONSUMER_TIMER3_CC1, + #[inline(always)] + pub const fn consumer_timer3_cc1(&self) -> &ConsumerTimer3Cc1 { + &self.consumer_timer3_cc1 + } #[doc = "0x1a4 - CC2 Consumer register"] - pub consumer_timer3_cc2: CONSUMER_TIMER3_CC2, + #[inline(always)] + pub const fn consumer_timer3_cc2(&self) -> &ConsumerTimer3Cc2 { + &self.consumer_timer3_cc2 + } #[doc = "0x1a8 - DTI Consumer register"] - pub consumer_timer3_dti: CONSUMER_TIMER3_DTI, + #[inline(always)] + pub const fn consumer_timer3_dti(&self) -> &ConsumerTimer3Dti { + &self.consumer_timer3_dti + } #[doc = "0x1ac - DTI Consumer register"] - pub consumer_timer3_dtifs1: CONSUMER_TIMER3_DTIFS1, + #[inline(always)] + pub const fn consumer_timer3_dtifs1(&self) -> &ConsumerTimer3Dtifs1 { + &self.consumer_timer3_dtifs1 + } #[doc = "0x1b0 - DTI Consumer register"] - pub consumer_timer3_dtifs2: CONSUMER_TIMER3_DTIFS2, + #[inline(always)] + pub const fn consumer_timer3_dtifs2(&self) -> &ConsumerTimer3Dtifs2 { + &self.consumer_timer3_dtifs2 + } #[doc = "0x1b4 - CC0 consumer register"] - pub consumer_timer4_cc0: CONSUMER_TIMER4_CC0, + #[inline(always)] + pub const fn consumer_timer4_cc0(&self) -> &ConsumerTimer4Cc0 { + &self.consumer_timer4_cc0 + } #[doc = "0x1b8 - CC1 Consumer register"] - pub consumer_timer4_cc1: CONSUMER_TIMER4_CC1, + #[inline(always)] + pub const fn consumer_timer4_cc1(&self) -> &ConsumerTimer4Cc1 { + &self.consumer_timer4_cc1 + } #[doc = "0x1bc - CC2 Consumer register"] - pub consumer_timer4_cc2: CONSUMER_TIMER4_CC2, + #[inline(always)] + pub const fn consumer_timer4_cc2(&self) -> &ConsumerTimer4Cc2 { + &self.consumer_timer4_cc2 + } #[doc = "0x1c0 - DTI Consumer register"] - pub consumer_timer4_dti: CONSUMER_TIMER4_DTI, + #[inline(always)] + pub const fn consumer_timer4_dti(&self) -> &ConsumerTimer4Dti { + &self.consumer_timer4_dti + } #[doc = "0x1c4 - DTI Consumer register"] - pub consumer_timer4_dtifs1: CONSUMER_TIMER4_DTIFS1, + #[inline(always)] + pub const fn consumer_timer4_dtifs1(&self) -> &ConsumerTimer4Dtifs1 { + &self.consumer_timer4_dtifs1 + } #[doc = "0x1c8 - DTI Consumer register"] - pub consumer_timer4_dtifs2: CONSUMER_TIMER4_DTIFS2, + #[inline(always)] + pub const fn consumer_timer4_dtifs2(&self) -> &ConsumerTimer4Dtifs2 { + &self.consumer_timer4_dtifs2 + } #[doc = "0x1cc - CLK consumer register"] - pub consumer_usart0_clk: CONSUMER_USART0_CLK, + #[inline(always)] + pub const fn consumer_usart0_clk(&self) -> &ConsumerUsart0Clk { + &self.consumer_usart0_clk + } #[doc = "0x1d0 - IR Consumer register"] - pub consumer_usart0_ir: CONSUMER_USART0_IR, + #[inline(always)] + pub const fn consumer_usart0_ir(&self) -> &ConsumerUsart0Ir { + &self.consumer_usart0_ir + } #[doc = "0x1d4 - RX Consumer register"] - pub consumer_usart0_rx: CONSUMER_USART0_RX, + #[inline(always)] + pub const fn consumer_usart0_rx(&self) -> &ConsumerUsart0Rx { + &self.consumer_usart0_rx + } #[doc = "0x1d8 - TRIGGER Consumer register"] - pub consumer_usart0_trigger: CONSUMER_USART0_TRIGGER, - _reserved92: [u8; 0x0c], + #[inline(always)] + pub const fn consumer_usart0_trigger(&self) -> &ConsumerUsart0Trigger { + &self.consumer_usart0_trigger + } #[doc = "0x1e8 - ASYNCTRIG consumer register"] - pub consumer_vdac0_asynctrigch0: CONSUMER_VDAC0_ASYNCTRIGCH0, + #[inline(always)] + pub const fn consumer_vdac0_asynctrigch0(&self) -> &ConsumerVdac0Asynctrigch0 { + &self.consumer_vdac0_asynctrigch0 + } #[doc = "0x1ec - ASYNCTRIG Consumer register"] - pub consumer_vdac0_asynctrigch1: CONSUMER_VDAC0_ASYNCTRIGCH1, + #[inline(always)] + pub const fn consumer_vdac0_asynctrigch1(&self) -> &ConsumerVdac0Asynctrigch1 { + &self.consumer_vdac0_asynctrigch1 + } #[doc = "0x1f0 - SYNCTRIG Consumer register"] - pub consumer_vdac0_synctrigch0: CONSUMER_VDAC0_SYNCTRIGCH0, + #[inline(always)] + pub const fn consumer_vdac0_synctrigch0(&self) -> &ConsumerVdac0Synctrigch0 { + &self.consumer_vdac0_synctrigch0 + } #[doc = "0x1f4 - SYNCTRIG Consumer register"] - pub consumer_vdac0_synctrigch1: CONSUMER_VDAC0_SYNCTRIGCH1, + #[inline(always)] + pub const fn consumer_vdac0_synctrigch1(&self) -> &ConsumerVdac0Synctrigch1 { + &self.consumer_vdac0_synctrigch1 + } #[doc = "0x1f8 - SRC0 consumer register"] - pub consumer_wdog0_src0: CONSUMER_WDOG0_SRC0, + #[inline(always)] + pub const fn consumer_wdog0_src0(&self) -> &ConsumerWdog0Src0 { + &self.consumer_wdog0_src0 + } #[doc = "0x1fc - SRC1 Consumer register"] - pub consumer_wdog0_src1: CONSUMER_WDOG0_SRC1, + #[inline(always)] + pub const fn consumer_wdog0_src1(&self) -> &ConsumerWdog0Src1 { + &self.consumer_wdog0_src1 + } #[doc = "0x200 - SRC0 consumer register"] - pub consumer_wdog1_src0: CONSUMER_WDOG1_SRC0, + #[inline(always)] + pub const fn consumer_wdog1_src0(&self) -> &ConsumerWdog1Src0 { + &self.consumer_wdog1_src0 + } #[doc = "0x204 - SRC1 Consumer register"] - pub consumer_wdog1_src1: CONSUMER_WDOG1_SRC1, + #[inline(always)] + pub const fn consumer_wdog1_src1(&self) -> &ConsumerWdog1Src1 { + &self.consumer_wdog1_src1 + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "ASYNC_SWPULSE (w) register accessor: an alias for `Reg`"] -pub type ASYNC_SWPULSE = crate::Reg; +#[doc = "ASYNC_SWPULSE (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_swpulse::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_swpulse`] +module"] +#[doc(alias = "ASYNC_SWPULSE")] +pub type AsyncSwpulse = crate::Reg; #[doc = "No Description"] pub mod async_swpulse; -#[doc = "ASYNC_SWLEVEL (rw) register accessor: an alias for `Reg`"] -pub type ASYNC_SWLEVEL = crate::Reg; +#[doc = "ASYNC_SWLEVEL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_swlevel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_swlevel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_swlevel`] +module"] +#[doc(alias = "ASYNC_SWLEVEL")] +pub type AsyncSwlevel = crate::Reg; #[doc = "No Description"] pub mod async_swlevel; -#[doc = "ASYNC_PEEK (r) register accessor: an alias for `Reg`"] -pub type ASYNC_PEEK = crate::Reg; +#[doc = "ASYNC_PEEK (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_peek::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_peek`] +module"] +#[doc(alias = "ASYNC_PEEK")] +pub type AsyncPeek = crate::Reg; #[doc = "No Description"] pub mod async_peek; -#[doc = "SYNC_PEEK (r) register accessor: an alias for `Reg`"] -pub type SYNC_PEEK = crate::Reg; +#[doc = "SYNC_PEEK (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sync_peek::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sync_peek`] +module"] +#[doc(alias = "SYNC_PEEK")] +pub type SyncPeek = crate::Reg; #[doc = "No Description"] pub mod sync_peek; -#[doc = "ASYNC_CH0_CTRL (rw) register accessor: an alias for `Reg`"] -pub type ASYNC_CH0_CTRL = crate::Reg; +#[doc = "ASYNC_CH0_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch0_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch0_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_ch0_ctrl`] +module"] +#[doc(alias = "ASYNC_CH0_CTRL")] +pub type AsyncCh0Ctrl = crate::Reg; #[doc = "No Description"] pub mod async_ch0_ctrl; -#[doc = "ASYNC_CH1_CTRL (rw) register accessor: an alias for `Reg`"] -pub type ASYNC_CH1_CTRL = crate::Reg; +#[doc = "ASYNC_CH1_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch1_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch1_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_ch1_ctrl`] +module"] +#[doc(alias = "ASYNC_CH1_CTRL")] +pub type AsyncCh1Ctrl = crate::Reg; #[doc = "No Description"] pub mod async_ch1_ctrl; -#[doc = "ASYNC_CH2_CTRL (rw) register accessor: an alias for `Reg`"] -pub type ASYNC_CH2_CTRL = crate::Reg; +#[doc = "ASYNC_CH2_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch2_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch2_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_ch2_ctrl`] +module"] +#[doc(alias = "ASYNC_CH2_CTRL")] +pub type AsyncCh2Ctrl = crate::Reg; #[doc = "No Description"] pub mod async_ch2_ctrl; -#[doc = "ASYNC_CH3_CTRL (rw) register accessor: an alias for `Reg`"] -pub type ASYNC_CH3_CTRL = crate::Reg; +#[doc = "ASYNC_CH3_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch3_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch3_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_ch3_ctrl`] +module"] +#[doc(alias = "ASYNC_CH3_CTRL")] +pub type AsyncCh3Ctrl = crate::Reg; #[doc = "No Description"] pub mod async_ch3_ctrl; -#[doc = "ASYNC_CH4_CTRL (rw) register accessor: an alias for `Reg`"] -pub type ASYNC_CH4_CTRL = crate::Reg; +#[doc = "ASYNC_CH4_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch4_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch4_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_ch4_ctrl`] +module"] +#[doc(alias = "ASYNC_CH4_CTRL")] +pub type AsyncCh4Ctrl = crate::Reg; #[doc = "No Description"] pub mod async_ch4_ctrl; -#[doc = "ASYNC_CH5_CTRL (rw) register accessor: an alias for `Reg`"] -pub type ASYNC_CH5_CTRL = crate::Reg; +#[doc = "ASYNC_CH5_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch5_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch5_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_ch5_ctrl`] +module"] +#[doc(alias = "ASYNC_CH5_CTRL")] +pub type AsyncCh5Ctrl = crate::Reg; #[doc = "No Description"] pub mod async_ch5_ctrl; -#[doc = "ASYNC_CH6_CTRL (rw) register accessor: an alias for `Reg`"] -pub type ASYNC_CH6_CTRL = crate::Reg; +#[doc = "ASYNC_CH6_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch6_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch6_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_ch6_ctrl`] +module"] +#[doc(alias = "ASYNC_CH6_CTRL")] +pub type AsyncCh6Ctrl = crate::Reg; #[doc = "No Description"] pub mod async_ch6_ctrl; -#[doc = "ASYNC_CH7_CTRL (rw) register accessor: an alias for `Reg`"] -pub type ASYNC_CH7_CTRL = crate::Reg; +#[doc = "ASYNC_CH7_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch7_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch7_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_ch7_ctrl`] +module"] +#[doc(alias = "ASYNC_CH7_CTRL")] +pub type AsyncCh7Ctrl = crate::Reg; #[doc = "No Description"] pub mod async_ch7_ctrl; -#[doc = "ASYNC_CH8_CTRL (rw) register accessor: an alias for `Reg`"] -pub type ASYNC_CH8_CTRL = crate::Reg; +#[doc = "ASYNC_CH8_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch8_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch8_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_ch8_ctrl`] +module"] +#[doc(alias = "ASYNC_CH8_CTRL")] +pub type AsyncCh8Ctrl = crate::Reg; #[doc = "No Description"] pub mod async_ch8_ctrl; -#[doc = "ASYNC_CH9_CTRL (rw) register accessor: an alias for `Reg`"] -pub type ASYNC_CH9_CTRL = crate::Reg; +#[doc = "ASYNC_CH9_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch9_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch9_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_ch9_ctrl`] +module"] +#[doc(alias = "ASYNC_CH9_CTRL")] +pub type AsyncCh9Ctrl = crate::Reg; #[doc = "No Description"] pub mod async_ch9_ctrl; -#[doc = "ASYNC_CH10_CTRL (rw) register accessor: an alias for `Reg`"] -pub type ASYNC_CH10_CTRL = crate::Reg; +#[doc = "ASYNC_CH10_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch10_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch10_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_ch10_ctrl`] +module"] +#[doc(alias = "ASYNC_CH10_CTRL")] +pub type AsyncCh10Ctrl = crate::Reg; #[doc = "No Description"] pub mod async_ch10_ctrl; -#[doc = "ASYNC_CH11_CTRL (rw) register accessor: an alias for `Reg`"] -pub type ASYNC_CH11_CTRL = crate::Reg; +#[doc = "ASYNC_CH11_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch11_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch11_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@async_ch11_ctrl`] +module"] +#[doc(alias = "ASYNC_CH11_CTRL")] +pub type AsyncCh11Ctrl = crate::Reg; #[doc = "No Description"] pub mod async_ch11_ctrl; -#[doc = "SYNC_CH0_CTRL (rw) register accessor: an alias for `Reg`"] -pub type SYNC_CH0_CTRL = crate::Reg; +#[doc = "SYNC_CH0_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sync_ch0_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sync_ch0_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sync_ch0_ctrl`] +module"] +#[doc(alias = "SYNC_CH0_CTRL")] +pub type SyncCh0Ctrl = crate::Reg; #[doc = "No Description"] pub mod sync_ch0_ctrl; -#[doc = "SYNC_CH1_CTRL (rw) register accessor: an alias for `Reg`"] -pub type SYNC_CH1_CTRL = crate::Reg; +#[doc = "SYNC_CH1_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sync_ch1_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sync_ch1_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sync_ch1_ctrl`] +module"] +#[doc(alias = "SYNC_CH1_CTRL")] +pub type SyncCh1Ctrl = crate::Reg; #[doc = "No Description"] pub mod sync_ch1_ctrl; -#[doc = "SYNC_CH2_CTRL (rw) register accessor: an alias for `Reg`"] -pub type SYNC_CH2_CTRL = crate::Reg; +#[doc = "SYNC_CH2_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sync_ch2_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sync_ch2_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sync_ch2_ctrl`] +module"] +#[doc(alias = "SYNC_CH2_CTRL")] +pub type SyncCh2Ctrl = crate::Reg; #[doc = "No Description"] pub mod sync_ch2_ctrl; -#[doc = "SYNC_CH3_CTRL (rw) register accessor: an alias for `Reg`"] -pub type SYNC_CH3_CTRL = crate::Reg; +#[doc = "SYNC_CH3_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sync_ch3_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sync_ch3_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sync_ch3_ctrl`] +module"] +#[doc(alias = "SYNC_CH3_CTRL")] +pub type SyncCh3Ctrl = crate::Reg; #[doc = "No Description"] pub mod sync_ch3_ctrl; -#[doc = "CONSUMER_CMU_CALDN (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_CMU_CALDN = crate::Reg; +#[doc = "CONSUMER_CMU_CALDN (rw) register accessor: CALDN consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_cmu_caldn::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_cmu_caldn::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_cmu_caldn`] +module"] +#[doc(alias = "CONSUMER_CMU_CALDN")] +pub type ConsumerCmuCaldn = crate::Reg; #[doc = "CALDN consumer register"] pub mod consumer_cmu_caldn; -#[doc = "CONSUMER_CMU_CALUP (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_CMU_CALUP = crate::Reg; +#[doc = "CONSUMER_CMU_CALUP (rw) register accessor: CALUP Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_cmu_calup::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_cmu_calup::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_cmu_calup`] +module"] +#[doc(alias = "CONSUMER_CMU_CALUP")] +pub type ConsumerCmuCalup = crate::Reg; #[doc = "CALUP Consumer register"] pub mod consumer_cmu_calup; -#[doc = "CONSUMER_EUSART0_CLK (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_EUSART0_CLK = crate::Reg; +#[doc = "CONSUMER_EUSART0_CLK (rw) register accessor: CLK consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart0_clk::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart0_clk::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_eusart0_clk`] +module"] +#[doc(alias = "CONSUMER_EUSART0_CLK")] +pub type ConsumerEusart0Clk = crate::Reg; #[doc = "CLK consumer register"] pub mod consumer_eusart0_clk; -#[doc = "CONSUMER_EUSART0_RX (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_EUSART0_RX = crate::Reg; +#[doc = "CONSUMER_EUSART0_RX (rw) register accessor: RX Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart0_rx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart0_rx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_eusart0_rx`] +module"] +#[doc(alias = "CONSUMER_EUSART0_RX")] +pub type ConsumerEusart0Rx = crate::Reg; #[doc = "RX Consumer register"] pub mod consumer_eusart0_rx; -#[doc = "CONSUMER_EUSART0_TRIGGER (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_EUSART0_TRIGGER = - crate::Reg; +#[doc = "CONSUMER_EUSART0_TRIGGER (rw) register accessor: TRIGGER Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart0_trigger::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart0_trigger::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_eusart0_trigger`] +module"] +#[doc(alias = "CONSUMER_EUSART0_TRIGGER")] +pub type ConsumerEusart0Trigger = crate::Reg; #[doc = "TRIGGER Consumer register"] pub mod consumer_eusart0_trigger; -#[doc = "CONSUMER_EUSART1_CLK (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_EUSART1_CLK = crate::Reg; +#[doc = "CONSUMER_EUSART1_CLK (rw) register accessor: CLK consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart1_clk::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart1_clk::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_eusart1_clk`] +module"] +#[doc(alias = "CONSUMER_EUSART1_CLK")] +pub type ConsumerEusart1Clk = crate::Reg; #[doc = "CLK consumer register"] pub mod consumer_eusart1_clk; -#[doc = "CONSUMER_EUSART1_RX (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_EUSART1_RX = crate::Reg; +#[doc = "CONSUMER_EUSART1_RX (rw) register accessor: RX Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart1_rx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart1_rx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_eusart1_rx`] +module"] +#[doc(alias = "CONSUMER_EUSART1_RX")] +pub type ConsumerEusart1Rx = crate::Reg; #[doc = "RX Consumer register"] pub mod consumer_eusart1_rx; -#[doc = "CONSUMER_EUSART1_TRIGGER (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_EUSART1_TRIGGER = - crate::Reg; +#[doc = "CONSUMER_EUSART1_TRIGGER (rw) register accessor: TRIGGER Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart1_trigger::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart1_trigger::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_eusart1_trigger`] +module"] +#[doc(alias = "CONSUMER_EUSART1_TRIGGER")] +pub type ConsumerEusart1Trigger = crate::Reg; #[doc = "TRIGGER Consumer register"] pub mod consumer_eusart1_trigger; -#[doc = "CONSUMER_EUSART2_CLK (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_EUSART2_CLK = crate::Reg; +#[doc = "CONSUMER_EUSART2_CLK (rw) register accessor: CLK consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart2_clk::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart2_clk::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_eusart2_clk`] +module"] +#[doc(alias = "CONSUMER_EUSART2_CLK")] +pub type ConsumerEusart2Clk = crate::Reg; #[doc = "CLK consumer register"] pub mod consumer_eusart2_clk; -#[doc = "CONSUMER_EUSART2_RX (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_EUSART2_RX = crate::Reg; +#[doc = "CONSUMER_EUSART2_RX (rw) register accessor: RX Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart2_rx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart2_rx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_eusart2_rx`] +module"] +#[doc(alias = "CONSUMER_EUSART2_RX")] +pub type ConsumerEusart2Rx = crate::Reg; #[doc = "RX Consumer register"] pub mod consumer_eusart2_rx; -#[doc = "CONSUMER_EUSART2_TRIGGER (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_EUSART2_TRIGGER = - crate::Reg; +#[doc = "CONSUMER_EUSART2_TRIGGER (rw) register accessor: TRIGGER Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart2_trigger::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart2_trigger::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_eusart2_trigger`] +module"] +#[doc(alias = "CONSUMER_EUSART2_TRIGGER")] +pub type ConsumerEusart2Trigger = crate::Reg; #[doc = "TRIGGER Consumer register"] pub mod consumer_eusart2_trigger; -#[doc = "CONSUMER_IADC0_SCANTRIGGER (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_IADC0_SCANTRIGGER = - crate::Reg; +#[doc = "CONSUMER_IADC0_SCANTRIGGER (rw) register accessor: SCAN consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_iadc0_scantrigger::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_iadc0_scantrigger::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_iadc0_scantrigger`] +module"] +#[doc(alias = "CONSUMER_IADC0_SCANTRIGGER")] +pub type ConsumerIadc0Scantrigger = + crate::Reg; #[doc = "SCAN consumer register"] pub mod consumer_iadc0_scantrigger; -#[doc = "CONSUMER_IADC0_SINGLETRIGGER (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_IADC0_SINGLETRIGGER = - crate::Reg; +#[doc = "CONSUMER_IADC0_SINGLETRIGGER (rw) register accessor: SINGLE Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_iadc0_singletrigger::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_iadc0_singletrigger::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_iadc0_singletrigger`] +module"] +#[doc(alias = "CONSUMER_IADC0_SINGLETRIGGER")] +pub type ConsumerIadc0Singletrigger = + crate::Reg; #[doc = "SINGLE Consumer register"] pub mod consumer_iadc0_singletrigger; -#[doc = "CONSUMER_LDMAXBAR_DMAREQ0 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_LDMAXBAR_DMAREQ0 = - crate::Reg; +#[doc = "CONSUMER_LDMAXBAR_DMAREQ0 (rw) register accessor: DMAREQ0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_ldmaxbar_dmareq0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_ldmaxbar_dmareq0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_ldmaxbar_dmareq0`] +module"] +#[doc(alias = "CONSUMER_LDMAXBAR_DMAREQ0")] +pub type ConsumerLdmaxbarDmareq0 = + crate::Reg; #[doc = "DMAREQ0 consumer register"] pub mod consumer_ldmaxbar_dmareq0; -#[doc = "CONSUMER_LDMAXBAR_DMAREQ1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_LDMAXBAR_DMAREQ1 = - crate::Reg; +#[doc = "CONSUMER_LDMAXBAR_DMAREQ1 (rw) register accessor: DMAREQ1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_ldmaxbar_dmareq1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_ldmaxbar_dmareq1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_ldmaxbar_dmareq1`] +module"] +#[doc(alias = "CONSUMER_LDMAXBAR_DMAREQ1")] +pub type ConsumerLdmaxbarDmareq1 = + crate::Reg; #[doc = "DMAREQ1 Consumer register"] pub mod consumer_ldmaxbar_dmareq1; -#[doc = "CONSUMER_LESENSE_START (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_LESENSE_START = crate::Reg; +#[doc = "CONSUMER_LESENSE_START (rw) register accessor: START Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_lesense_start::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_lesense_start::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_lesense_start`] +module"] +#[doc(alias = "CONSUMER_LESENSE_START")] +pub type ConsumerLesenseStart = crate::Reg; #[doc = "START Consumer register"] pub mod consumer_lesense_start; -#[doc = "CONSUMER_LETIMER0_CLEAR (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_LETIMER0_CLEAR = - crate::Reg; +#[doc = "CONSUMER_LETIMER0_CLEAR (rw) register accessor: CLEAR consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_letimer0_clear::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_letimer0_clear::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_letimer0_clear`] +module"] +#[doc(alias = "CONSUMER_LETIMER0_CLEAR")] +pub type ConsumerLetimer0Clear = crate::Reg; #[doc = "CLEAR consumer register"] pub mod consumer_letimer0_clear; -#[doc = "CONSUMER_LETIMER0_START (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_LETIMER0_START = - crate::Reg; +#[doc = "CONSUMER_LETIMER0_START (rw) register accessor: START Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_letimer0_start::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_letimer0_start::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_letimer0_start`] +module"] +#[doc(alias = "CONSUMER_LETIMER0_START")] +pub type ConsumerLetimer0Start = crate::Reg; #[doc = "START Consumer register"] pub mod consumer_letimer0_start; -#[doc = "CONSUMER_LETIMER0_STOP (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_LETIMER0_STOP = crate::Reg; +#[doc = "CONSUMER_LETIMER0_STOP (rw) register accessor: STOP Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_letimer0_stop::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_letimer0_stop::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_letimer0_stop`] +module"] +#[doc(alias = "CONSUMER_LETIMER0_STOP")] +pub type ConsumerLetimer0Stop = crate::Reg; #[doc = "STOP Consumer register"] pub mod consumer_letimer0_stop; -#[doc = "CONSUMER_PCNT0_S0IN (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_PCNT0_S0IN = crate::Reg; +#[doc = "CONSUMER_PCNT0_S0IN (rw) register accessor: S0IN consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_pcnt0_s0in::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_pcnt0_s0in::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_pcnt0_s0in`] +module"] +#[doc(alias = "CONSUMER_PCNT0_S0IN")] +pub type ConsumerPcnt0S0in = crate::Reg; #[doc = "S0IN consumer register"] pub mod consumer_pcnt0_s0in; -#[doc = "CONSUMER_PCNT0_S1IN (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_PCNT0_S1IN = crate::Reg; +#[doc = "CONSUMER_PCNT0_S1IN (rw) register accessor: S1IN Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_pcnt0_s1in::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_pcnt0_s1in::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_pcnt0_s1in`] +module"] +#[doc(alias = "CONSUMER_PCNT0_S1IN")] +pub type ConsumerPcnt0S1in = crate::Reg; #[doc = "S1IN Consumer register"] pub mod consumer_pcnt0_s1in; -#[doc = "CONSUMER_SETAMPER_TAMPERSRC25 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_SETAMPER_TAMPERSRC25 = - crate::Reg; +#[doc = "CONSUMER_SETAMPER_TAMPERSRC25 (rw) register accessor: TAMPERSRC25 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc25::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc25::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_setamper_tampersrc25`] +module"] +#[doc(alias = "CONSUMER_SETAMPER_TAMPERSRC25")] +pub type ConsumerSetamperTampersrc25 = + crate::Reg; #[doc = "TAMPERSRC25 consumer register"] pub mod consumer_setamper_tampersrc25; -#[doc = "CONSUMER_SETAMPER_TAMPERSRC26 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_SETAMPER_TAMPERSRC26 = - crate::Reg; +#[doc = "CONSUMER_SETAMPER_TAMPERSRC26 (rw) register accessor: TAMPERSRC26 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc26::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc26::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_setamper_tampersrc26`] +module"] +#[doc(alias = "CONSUMER_SETAMPER_TAMPERSRC26")] +pub type ConsumerSetamperTampersrc26 = + crate::Reg; #[doc = "TAMPERSRC26 Consumer register"] pub mod consumer_setamper_tampersrc26; -#[doc = "CONSUMER_SETAMPER_TAMPERSRC27 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_SETAMPER_TAMPERSRC27 = - crate::Reg; +#[doc = "CONSUMER_SETAMPER_TAMPERSRC27 (rw) register accessor: TAMPERSRC27 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc27::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc27::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_setamper_tampersrc27`] +module"] +#[doc(alias = "CONSUMER_SETAMPER_TAMPERSRC27")] +pub type ConsumerSetamperTampersrc27 = + crate::Reg; #[doc = "TAMPERSRC27 Consumer register"] pub mod consumer_setamper_tampersrc27; -#[doc = "CONSUMER_SETAMPER_TAMPERSRC28 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_SETAMPER_TAMPERSRC28 = - crate::Reg; +#[doc = "CONSUMER_SETAMPER_TAMPERSRC28 (rw) register accessor: TAMPERSRC28 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc28::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc28::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_setamper_tampersrc28`] +module"] +#[doc(alias = "CONSUMER_SETAMPER_TAMPERSRC28")] +pub type ConsumerSetamperTampersrc28 = + crate::Reg; #[doc = "TAMPERSRC28 Consumer register"] pub mod consumer_setamper_tampersrc28; -#[doc = "CONSUMER_SETAMPER_TAMPERSRC29 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_SETAMPER_TAMPERSRC29 = - crate::Reg; +#[doc = "CONSUMER_SETAMPER_TAMPERSRC29 (rw) register accessor: TAMPERSRC29 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc29::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc29::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_setamper_tampersrc29`] +module"] +#[doc(alias = "CONSUMER_SETAMPER_TAMPERSRC29")] +pub type ConsumerSetamperTampersrc29 = + crate::Reg; #[doc = "TAMPERSRC29 Consumer register"] pub mod consumer_setamper_tampersrc29; -#[doc = "CONSUMER_SETAMPER_TAMPERSRC30 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_SETAMPER_TAMPERSRC30 = - crate::Reg; +#[doc = "CONSUMER_SETAMPER_TAMPERSRC30 (rw) register accessor: TAMPERSRC30 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc30::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc30::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_setamper_tampersrc30`] +module"] +#[doc(alias = "CONSUMER_SETAMPER_TAMPERSRC30")] +pub type ConsumerSetamperTampersrc30 = + crate::Reg; #[doc = "TAMPERSRC30 Consumer register"] pub mod consumer_setamper_tampersrc30; -#[doc = "CONSUMER_SETAMPER_TAMPERSRC31 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_SETAMPER_TAMPERSRC31 = - crate::Reg; +#[doc = "CONSUMER_SETAMPER_TAMPERSRC31 (rw) register accessor: TAMPERSRC31 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc31::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc31::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_setamper_tampersrc31`] +module"] +#[doc(alias = "CONSUMER_SETAMPER_TAMPERSRC31")] +pub type ConsumerSetamperTampersrc31 = + crate::Reg; #[doc = "TAMPERSRC31 Consumer register"] pub mod consumer_setamper_tampersrc31; -#[doc = "CONSUMER_SYSRTC0_IN0 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_SYSRTC0_IN0 = crate::Reg; +#[doc = "CONSUMER_SYSRTC0_IN0 (rw) register accessor: IN0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_sysrtc0_in0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_sysrtc0_in0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_sysrtc0_in0`] +module"] +#[doc(alias = "CONSUMER_SYSRTC0_IN0")] +pub type ConsumerSysrtc0In0 = crate::Reg; #[doc = "IN0 consumer register"] pub mod consumer_sysrtc0_in0; -#[doc = "CONSUMER_SYSRTC0_IN1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_SYSRTC0_IN1 = crate::Reg; +#[doc = "CONSUMER_SYSRTC0_IN1 (rw) register accessor: IN1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_sysrtc0_in1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_sysrtc0_in1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_sysrtc0_in1`] +module"] +#[doc(alias = "CONSUMER_SYSRTC0_IN1")] +pub type ConsumerSysrtc0In1 = crate::Reg; #[doc = "IN1 Consumer register"] pub mod consumer_sysrtc0_in1; -#[doc = "CONSUMER_HFXO0_OSCREQ (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_HFXO0_OSCREQ = crate::Reg; +#[doc = "CONSUMER_HFXO0_OSCREQ (rw) register accessor: OSCREQ consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_hfxo0_oscreq::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_hfxo0_oscreq::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_hfxo0_oscreq`] +module"] +#[doc(alias = "CONSUMER_HFXO0_OSCREQ")] +pub type ConsumerHfxo0Oscreq = crate::Reg; #[doc = "OSCREQ consumer register"] pub mod consumer_hfxo0_oscreq; -#[doc = "CONSUMER_HFXO0_TIMEOUT (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_HFXO0_TIMEOUT = crate::Reg; +#[doc = "CONSUMER_HFXO0_TIMEOUT (rw) register accessor: TIMEOUT Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_hfxo0_timeout::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_hfxo0_timeout::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_hfxo0_timeout`] +module"] +#[doc(alias = "CONSUMER_HFXO0_TIMEOUT")] +pub type ConsumerHfxo0Timeout = crate::Reg; #[doc = "TIMEOUT Consumer register"] pub mod consumer_hfxo0_timeout; -#[doc = "CONSUMER_CORE_CTIIN0 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_CORE_CTIIN0 = crate::Reg; +#[doc = "CONSUMER_CORE_CTIIN0 (rw) register accessor: CTI Consumer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_core_ctiin0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_core_ctiin0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_core_ctiin0`] +module"] +#[doc(alias = "CONSUMER_CORE_CTIIN0")] +pub type ConsumerCoreCtiin0 = crate::Reg; #[doc = "CTI Consumer Register"] pub mod consumer_core_ctiin0; -#[doc = "CONSUMER_CORE_CTIIN1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_CORE_CTIIN1 = crate::Reg; +#[doc = "CONSUMER_CORE_CTIIN1 (rw) register accessor: CTI Consumer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_core_ctiin1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_core_ctiin1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_core_ctiin1`] +module"] +#[doc(alias = "CONSUMER_CORE_CTIIN1")] +pub type ConsumerCoreCtiin1 = crate::Reg; #[doc = "CTI Consumer Register"] pub mod consumer_core_ctiin1; -#[doc = "CONSUMER_CORE_CTIIN2 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_CORE_CTIIN2 = crate::Reg; +#[doc = "CONSUMER_CORE_CTIIN2 (rw) register accessor: CTI Consumer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_core_ctiin2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_core_ctiin2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_core_ctiin2`] +module"] +#[doc(alias = "CONSUMER_CORE_CTIIN2")] +pub type ConsumerCoreCtiin2 = crate::Reg; #[doc = "CTI Consumer Register"] pub mod consumer_core_ctiin2; -#[doc = "CONSUMER_CORE_CTIIN3 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_CORE_CTIIN3 = crate::Reg; +#[doc = "CONSUMER_CORE_CTIIN3 (rw) register accessor: CTI Consumer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_core_ctiin3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_core_ctiin3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_core_ctiin3`] +module"] +#[doc(alias = "CONSUMER_CORE_CTIIN3")] +pub type ConsumerCoreCtiin3 = crate::Reg; #[doc = "CTI Consumer Register"] pub mod consumer_core_ctiin3; -#[doc = "CONSUMER_CORE_M33RXEV (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_CORE_M33RXEV = crate::Reg; +#[doc = "CONSUMER_CORE_M33RXEV (rw) register accessor: M33 Consumer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_core_m33rxev::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_core_m33rxev::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_core_m33rxev`] +module"] +#[doc(alias = "CONSUMER_CORE_M33RXEV")] +pub type ConsumerCoreM33rxev = crate::Reg; #[doc = "M33 Consumer Register"] pub mod consumer_core_m33rxev; -#[doc = "CONSUMER_TIMER0_CC0 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER0_CC0 = crate::Reg; +#[doc = "CONSUMER_TIMER0_CC0 (rw) register accessor: CC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer0_cc0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer0_cc0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer0_cc0`] +module"] +#[doc(alias = "CONSUMER_TIMER0_CC0")] +pub type ConsumerTimer0Cc0 = crate::Reg; #[doc = "CC0 consumer register"] pub mod consumer_timer0_cc0; -#[doc = "CONSUMER_TIMER0_CC1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER0_CC1 = crate::Reg; +#[doc = "CONSUMER_TIMER0_CC1 (rw) register accessor: CC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer0_cc1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer0_cc1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer0_cc1`] +module"] +#[doc(alias = "CONSUMER_TIMER0_CC1")] +pub type ConsumerTimer0Cc1 = crate::Reg; #[doc = "CC1 Consumer register"] pub mod consumer_timer0_cc1; -#[doc = "CONSUMER_TIMER0_CC2 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER0_CC2 = crate::Reg; +#[doc = "CONSUMER_TIMER0_CC2 (rw) register accessor: CC2 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer0_cc2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer0_cc2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer0_cc2`] +module"] +#[doc(alias = "CONSUMER_TIMER0_CC2")] +pub type ConsumerTimer0Cc2 = crate::Reg; #[doc = "CC2 Consumer register"] pub mod consumer_timer0_cc2; -#[doc = "CONSUMER_TIMER0_DTI (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER0_DTI = crate::Reg; +#[doc = "CONSUMER_TIMER0_DTI (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer0_dti::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer0_dti::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer0_dti`] +module"] +#[doc(alias = "CONSUMER_TIMER0_DTI")] +pub type ConsumerTimer0Dti = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer0_dti; -#[doc = "CONSUMER_TIMER0_DTIFS1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER0_DTIFS1 = crate::Reg; +#[doc = "CONSUMER_TIMER0_DTIFS1 (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer0_dtifs1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer0_dtifs1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer0_dtifs1`] +module"] +#[doc(alias = "CONSUMER_TIMER0_DTIFS1")] +pub type ConsumerTimer0Dtifs1 = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer0_dtifs1; -#[doc = "CONSUMER_TIMER0_DTIFS2 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER0_DTIFS2 = crate::Reg; +#[doc = "CONSUMER_TIMER0_DTIFS2 (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer0_dtifs2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer0_dtifs2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer0_dtifs2`] +module"] +#[doc(alias = "CONSUMER_TIMER0_DTIFS2")] +pub type ConsumerTimer0Dtifs2 = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer0_dtifs2; -#[doc = "CONSUMER_TIMER1_CC0 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER1_CC0 = crate::Reg; +#[doc = "CONSUMER_TIMER1_CC0 (rw) register accessor: CC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer1_cc0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer1_cc0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer1_cc0`] +module"] +#[doc(alias = "CONSUMER_TIMER1_CC0")] +pub type ConsumerTimer1Cc0 = crate::Reg; #[doc = "CC0 consumer register"] pub mod consumer_timer1_cc0; -#[doc = "CONSUMER_TIMER1_CC1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER1_CC1 = crate::Reg; +#[doc = "CONSUMER_TIMER1_CC1 (rw) register accessor: CC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer1_cc1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer1_cc1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer1_cc1`] +module"] +#[doc(alias = "CONSUMER_TIMER1_CC1")] +pub type ConsumerTimer1Cc1 = crate::Reg; #[doc = "CC1 Consumer register"] pub mod consumer_timer1_cc1; -#[doc = "CONSUMER_TIMER1_CC2 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER1_CC2 = crate::Reg; +#[doc = "CONSUMER_TIMER1_CC2 (rw) register accessor: CC2 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer1_cc2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer1_cc2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer1_cc2`] +module"] +#[doc(alias = "CONSUMER_TIMER1_CC2")] +pub type ConsumerTimer1Cc2 = crate::Reg; #[doc = "CC2 Consumer register"] pub mod consumer_timer1_cc2; -#[doc = "CONSUMER_TIMER1_DTI (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER1_DTI = crate::Reg; +#[doc = "CONSUMER_TIMER1_DTI (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer1_dti::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer1_dti::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer1_dti`] +module"] +#[doc(alias = "CONSUMER_TIMER1_DTI")] +pub type ConsumerTimer1Dti = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer1_dti; -#[doc = "CONSUMER_TIMER1_DTIFS1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER1_DTIFS1 = crate::Reg; +#[doc = "CONSUMER_TIMER1_DTIFS1 (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer1_dtifs1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer1_dtifs1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer1_dtifs1`] +module"] +#[doc(alias = "CONSUMER_TIMER1_DTIFS1")] +pub type ConsumerTimer1Dtifs1 = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer1_dtifs1; -#[doc = "CONSUMER_TIMER1_DTIFS2 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER1_DTIFS2 = crate::Reg; +#[doc = "CONSUMER_TIMER1_DTIFS2 (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer1_dtifs2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer1_dtifs2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer1_dtifs2`] +module"] +#[doc(alias = "CONSUMER_TIMER1_DTIFS2")] +pub type ConsumerTimer1Dtifs2 = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer1_dtifs2; -#[doc = "CONSUMER_TIMER2_CC0 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER2_CC0 = crate::Reg; +#[doc = "CONSUMER_TIMER2_CC0 (rw) register accessor: CC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer2_cc0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer2_cc0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer2_cc0`] +module"] +#[doc(alias = "CONSUMER_TIMER2_CC0")] +pub type ConsumerTimer2Cc0 = crate::Reg; #[doc = "CC0 consumer register"] pub mod consumer_timer2_cc0; -#[doc = "CONSUMER_TIMER2_CC1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER2_CC1 = crate::Reg; +#[doc = "CONSUMER_TIMER2_CC1 (rw) register accessor: CC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer2_cc1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer2_cc1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer2_cc1`] +module"] +#[doc(alias = "CONSUMER_TIMER2_CC1")] +pub type ConsumerTimer2Cc1 = crate::Reg; #[doc = "CC1 Consumer register"] pub mod consumer_timer2_cc1; -#[doc = "CONSUMER_TIMER2_CC2 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER2_CC2 = crate::Reg; +#[doc = "CONSUMER_TIMER2_CC2 (rw) register accessor: CC2 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer2_cc2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer2_cc2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer2_cc2`] +module"] +#[doc(alias = "CONSUMER_TIMER2_CC2")] +pub type ConsumerTimer2Cc2 = crate::Reg; #[doc = "CC2 Consumer register"] pub mod consumer_timer2_cc2; -#[doc = "CONSUMER_TIMER2_DTI (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER2_DTI = crate::Reg; +#[doc = "CONSUMER_TIMER2_DTI (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer2_dti::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer2_dti::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer2_dti`] +module"] +#[doc(alias = "CONSUMER_TIMER2_DTI")] +pub type ConsumerTimer2Dti = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer2_dti; -#[doc = "CONSUMER_TIMER2_DTIFS1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER2_DTIFS1 = crate::Reg; +#[doc = "CONSUMER_TIMER2_DTIFS1 (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer2_dtifs1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer2_dtifs1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer2_dtifs1`] +module"] +#[doc(alias = "CONSUMER_TIMER2_DTIFS1")] +pub type ConsumerTimer2Dtifs1 = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer2_dtifs1; -#[doc = "CONSUMER_TIMER2_DTIFS2 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER2_DTIFS2 = crate::Reg; +#[doc = "CONSUMER_TIMER2_DTIFS2 (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer2_dtifs2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer2_dtifs2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer2_dtifs2`] +module"] +#[doc(alias = "CONSUMER_TIMER2_DTIFS2")] +pub type ConsumerTimer2Dtifs2 = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer2_dtifs2; -#[doc = "CONSUMER_TIMER3_CC0 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER3_CC0 = crate::Reg; +#[doc = "CONSUMER_TIMER3_CC0 (rw) register accessor: CC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer3_cc0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer3_cc0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer3_cc0`] +module"] +#[doc(alias = "CONSUMER_TIMER3_CC0")] +pub type ConsumerTimer3Cc0 = crate::Reg; #[doc = "CC0 consumer register"] pub mod consumer_timer3_cc0; -#[doc = "CONSUMER_TIMER3_CC1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER3_CC1 = crate::Reg; +#[doc = "CONSUMER_TIMER3_CC1 (rw) register accessor: CC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer3_cc1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer3_cc1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer3_cc1`] +module"] +#[doc(alias = "CONSUMER_TIMER3_CC1")] +pub type ConsumerTimer3Cc1 = crate::Reg; #[doc = "CC1 Consumer register"] pub mod consumer_timer3_cc1; -#[doc = "CONSUMER_TIMER3_CC2 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER3_CC2 = crate::Reg; +#[doc = "CONSUMER_TIMER3_CC2 (rw) register accessor: CC2 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer3_cc2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer3_cc2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer3_cc2`] +module"] +#[doc(alias = "CONSUMER_TIMER3_CC2")] +pub type ConsumerTimer3Cc2 = crate::Reg; #[doc = "CC2 Consumer register"] pub mod consumer_timer3_cc2; -#[doc = "CONSUMER_TIMER3_DTI (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER3_DTI = crate::Reg; +#[doc = "CONSUMER_TIMER3_DTI (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer3_dti::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer3_dti::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer3_dti`] +module"] +#[doc(alias = "CONSUMER_TIMER3_DTI")] +pub type ConsumerTimer3Dti = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer3_dti; -#[doc = "CONSUMER_TIMER3_DTIFS1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER3_DTIFS1 = crate::Reg; +#[doc = "CONSUMER_TIMER3_DTIFS1 (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer3_dtifs1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer3_dtifs1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer3_dtifs1`] +module"] +#[doc(alias = "CONSUMER_TIMER3_DTIFS1")] +pub type ConsumerTimer3Dtifs1 = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer3_dtifs1; -#[doc = "CONSUMER_TIMER3_DTIFS2 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER3_DTIFS2 = crate::Reg; +#[doc = "CONSUMER_TIMER3_DTIFS2 (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer3_dtifs2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer3_dtifs2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer3_dtifs2`] +module"] +#[doc(alias = "CONSUMER_TIMER3_DTIFS2")] +pub type ConsumerTimer3Dtifs2 = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer3_dtifs2; -#[doc = "CONSUMER_TIMER4_CC0 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER4_CC0 = crate::Reg; +#[doc = "CONSUMER_TIMER4_CC0 (rw) register accessor: CC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer4_cc0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer4_cc0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer4_cc0`] +module"] +#[doc(alias = "CONSUMER_TIMER4_CC0")] +pub type ConsumerTimer4Cc0 = crate::Reg; #[doc = "CC0 consumer register"] pub mod consumer_timer4_cc0; -#[doc = "CONSUMER_TIMER4_CC1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER4_CC1 = crate::Reg; +#[doc = "CONSUMER_TIMER4_CC1 (rw) register accessor: CC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer4_cc1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer4_cc1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer4_cc1`] +module"] +#[doc(alias = "CONSUMER_TIMER4_CC1")] +pub type ConsumerTimer4Cc1 = crate::Reg; #[doc = "CC1 Consumer register"] pub mod consumer_timer4_cc1; -#[doc = "CONSUMER_TIMER4_CC2 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER4_CC2 = crate::Reg; +#[doc = "CONSUMER_TIMER4_CC2 (rw) register accessor: CC2 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer4_cc2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer4_cc2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer4_cc2`] +module"] +#[doc(alias = "CONSUMER_TIMER4_CC2")] +pub type ConsumerTimer4Cc2 = crate::Reg; #[doc = "CC2 Consumer register"] pub mod consumer_timer4_cc2; -#[doc = "CONSUMER_TIMER4_DTI (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER4_DTI = crate::Reg; +#[doc = "CONSUMER_TIMER4_DTI (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer4_dti::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer4_dti::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer4_dti`] +module"] +#[doc(alias = "CONSUMER_TIMER4_DTI")] +pub type ConsumerTimer4Dti = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer4_dti; -#[doc = "CONSUMER_TIMER4_DTIFS1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER4_DTIFS1 = crate::Reg; +#[doc = "CONSUMER_TIMER4_DTIFS1 (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer4_dtifs1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer4_dtifs1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer4_dtifs1`] +module"] +#[doc(alias = "CONSUMER_TIMER4_DTIFS1")] +pub type ConsumerTimer4Dtifs1 = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer4_dtifs1; -#[doc = "CONSUMER_TIMER4_DTIFS2 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_TIMER4_DTIFS2 = crate::Reg; +#[doc = "CONSUMER_TIMER4_DTIFS2 (rw) register accessor: DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer4_dtifs2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer4_dtifs2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_timer4_dtifs2`] +module"] +#[doc(alias = "CONSUMER_TIMER4_DTIFS2")] +pub type ConsumerTimer4Dtifs2 = crate::Reg; #[doc = "DTI Consumer register"] pub mod consumer_timer4_dtifs2; -#[doc = "CONSUMER_USART0_CLK (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_USART0_CLK = crate::Reg; +#[doc = "CONSUMER_USART0_CLK (rw) register accessor: CLK consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_usart0_clk::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_usart0_clk::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_usart0_clk`] +module"] +#[doc(alias = "CONSUMER_USART0_CLK")] +pub type ConsumerUsart0Clk = crate::Reg; #[doc = "CLK consumer register"] pub mod consumer_usart0_clk; -#[doc = "CONSUMER_USART0_IR (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_USART0_IR = crate::Reg; +#[doc = "CONSUMER_USART0_IR (rw) register accessor: IR Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_usart0_ir::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_usart0_ir::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_usart0_ir`] +module"] +#[doc(alias = "CONSUMER_USART0_IR")] +pub type ConsumerUsart0Ir = crate::Reg; #[doc = "IR Consumer register"] pub mod consumer_usart0_ir; -#[doc = "CONSUMER_USART0_RX (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_USART0_RX = crate::Reg; +#[doc = "CONSUMER_USART0_RX (rw) register accessor: RX Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_usart0_rx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_usart0_rx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_usart0_rx`] +module"] +#[doc(alias = "CONSUMER_USART0_RX")] +pub type ConsumerUsart0Rx = crate::Reg; #[doc = "RX Consumer register"] pub mod consumer_usart0_rx; -#[doc = "CONSUMER_USART0_TRIGGER (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_USART0_TRIGGER = - crate::Reg; +#[doc = "CONSUMER_USART0_TRIGGER (rw) register accessor: TRIGGER Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_usart0_trigger::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_usart0_trigger::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_usart0_trigger`] +module"] +#[doc(alias = "CONSUMER_USART0_TRIGGER")] +pub type ConsumerUsart0Trigger = crate::Reg; #[doc = "TRIGGER Consumer register"] pub mod consumer_usart0_trigger; -#[doc = "CONSUMER_VDAC0_ASYNCTRIGCH0 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_VDAC0_ASYNCTRIGCH0 = - crate::Reg; +#[doc = "CONSUMER_VDAC0_ASYNCTRIGCH0 (rw) register accessor: ASYNCTRIG consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_vdac0_asynctrigch0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_vdac0_asynctrigch0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_vdac0_asynctrigch0`] +module"] +#[doc(alias = "CONSUMER_VDAC0_ASYNCTRIGCH0")] +pub type ConsumerVdac0Asynctrigch0 = + crate::Reg; #[doc = "ASYNCTRIG consumer register"] pub mod consumer_vdac0_asynctrigch0; -#[doc = "CONSUMER_VDAC0_ASYNCTRIGCH1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_VDAC0_ASYNCTRIGCH1 = - crate::Reg; +#[doc = "CONSUMER_VDAC0_ASYNCTRIGCH1 (rw) register accessor: ASYNCTRIG Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_vdac0_asynctrigch1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_vdac0_asynctrigch1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_vdac0_asynctrigch1`] +module"] +#[doc(alias = "CONSUMER_VDAC0_ASYNCTRIGCH1")] +pub type ConsumerVdac0Asynctrigch1 = + crate::Reg; #[doc = "ASYNCTRIG Consumer register"] pub mod consumer_vdac0_asynctrigch1; -#[doc = "CONSUMER_VDAC0_SYNCTRIGCH0 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_VDAC0_SYNCTRIGCH0 = - crate::Reg; +#[doc = "CONSUMER_VDAC0_SYNCTRIGCH0 (rw) register accessor: SYNCTRIG Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_vdac0_synctrigch0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_vdac0_synctrigch0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_vdac0_synctrigch0`] +module"] +#[doc(alias = "CONSUMER_VDAC0_SYNCTRIGCH0")] +pub type ConsumerVdac0Synctrigch0 = + crate::Reg; #[doc = "SYNCTRIG Consumer register"] pub mod consumer_vdac0_synctrigch0; -#[doc = "CONSUMER_VDAC0_SYNCTRIGCH1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_VDAC0_SYNCTRIGCH1 = - crate::Reg; +#[doc = "CONSUMER_VDAC0_SYNCTRIGCH1 (rw) register accessor: SYNCTRIG Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_vdac0_synctrigch1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_vdac0_synctrigch1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_vdac0_synctrigch1`] +module"] +#[doc(alias = "CONSUMER_VDAC0_SYNCTRIGCH1")] +pub type ConsumerVdac0Synctrigch1 = + crate::Reg; #[doc = "SYNCTRIG Consumer register"] pub mod consumer_vdac0_synctrigch1; -#[doc = "CONSUMER_WDOG0_SRC0 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_WDOG0_SRC0 = crate::Reg; +#[doc = "CONSUMER_WDOG0_SRC0 (rw) register accessor: SRC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_wdog0_src0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_wdog0_src0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_wdog0_src0`] +module"] +#[doc(alias = "CONSUMER_WDOG0_SRC0")] +pub type ConsumerWdog0Src0 = crate::Reg; #[doc = "SRC0 consumer register"] pub mod consumer_wdog0_src0; -#[doc = "CONSUMER_WDOG0_SRC1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_WDOG0_SRC1 = crate::Reg; +#[doc = "CONSUMER_WDOG0_SRC1 (rw) register accessor: SRC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_wdog0_src1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_wdog0_src1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_wdog0_src1`] +module"] +#[doc(alias = "CONSUMER_WDOG0_SRC1")] +pub type ConsumerWdog0Src1 = crate::Reg; #[doc = "SRC1 Consumer register"] pub mod consumer_wdog0_src1; -#[doc = "CONSUMER_WDOG1_SRC0 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_WDOG1_SRC0 = crate::Reg; +#[doc = "CONSUMER_WDOG1_SRC0 (rw) register accessor: SRC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_wdog1_src0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_wdog1_src0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_wdog1_src0`] +module"] +#[doc(alias = "CONSUMER_WDOG1_SRC0")] +pub type ConsumerWdog1Src0 = crate::Reg; #[doc = "SRC0 consumer register"] pub mod consumer_wdog1_src0; -#[doc = "CONSUMER_WDOG1_SRC1 (rw) register accessor: an alias for `Reg`"] -pub type CONSUMER_WDOG1_SRC1 = crate::Reg; +#[doc = "CONSUMER_WDOG1_SRC1 (rw) register accessor: SRC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_wdog1_src1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_wdog1_src1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@consumer_wdog1_src1`] +module"] +#[doc(alias = "CONSUMER_WDOG1_SRC1")] +pub type ConsumerWdog1Src1 = crate::Reg; #[doc = "SRC1 Consumer register"] pub mod consumer_wdog1_src1; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch0_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch0_ctrl.rs index 8f6dddf..3e705eb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch0_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch0_ctrl.rs @@ -1,393 +1,366 @@ #[doc = "Register `ASYNC_CH0_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ASYNC_CH0_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH0_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH0_CTRL_SPEC, u8, u8, 7, O>; -#[doc = "Field `FNSEL` reader - Function Select"] -pub type FNSEL_R = crate::FieldReader; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Function Select\n\nValue on reset: 12"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FNSEL_A { +pub enum Fnsel { #[doc = "0: Logical 0"] - LOGICAL_ZERO = 0, + LogicalZero = 0, #[doc = "1: A NOR B"] - A_NOR_B = 1, + ANorB = 1, #[doc = "2: (!A) AND B"] - NOT_A_AND_B = 2, + NotAAndB = 2, #[doc = "3: !A"] - NOT_A = 3, + NotA = 3, #[doc = "4: A AND (!B)"] - A_AND_NOT_B = 4, + AAndNotB = 4, #[doc = "5: !B"] - NOT_B = 5, + NotB = 5, #[doc = "6: A XOR B"] - A_XOR_B = 6, + AXorB = 6, #[doc = "7: A NAND B"] - A_NAND_B = 7, + ANandB = 7, #[doc = "8: A AND B"] - A_AND_B = 8, + AAndB = 8, #[doc = "9: A XNOR B"] - A_XNOR_B = 9, + AXnorB = 9, #[doc = "10: B"] B = 10, #[doc = "11: (!A) OR B"] - NOT_A_OR_B = 11, + NotAOrB = 11, #[doc = "12: A"] A = 12, #[doc = "13: A OR (!B)"] - A_OR_NOT_B = 13, + AOrNotB = 13, #[doc = "14: A OR B"] - A_OR_B = 14, + AOrB = 14, #[doc = "15: Logical 1"] - LOGICAL_ONE = 15, + LogicalOne = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FNSEL_A) -> Self { + fn from(variant: Fnsel) -> Self { variant as _ } } -impl FNSEL_R { +impl crate::FieldSpec for Fnsel { + type Ux = u8; +} +impl crate::IsEnum for Fnsel {} +#[doc = "Field `FNSEL` reader - Function Select"] +pub type FnselR = crate::FieldReader; +impl FnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FNSEL_A { + pub const fn variant(&self) -> Fnsel { match self.bits { - 0 => FNSEL_A::LOGICAL_ZERO, - 1 => FNSEL_A::A_NOR_B, - 2 => FNSEL_A::NOT_A_AND_B, - 3 => FNSEL_A::NOT_A, - 4 => FNSEL_A::A_AND_NOT_B, - 5 => FNSEL_A::NOT_B, - 6 => FNSEL_A::A_XOR_B, - 7 => FNSEL_A::A_NAND_B, - 8 => FNSEL_A::A_AND_B, - 9 => FNSEL_A::A_XNOR_B, - 10 => FNSEL_A::B, - 11 => FNSEL_A::NOT_A_OR_B, - 12 => FNSEL_A::A, - 13 => FNSEL_A::A_OR_NOT_B, - 14 => FNSEL_A::A_OR_B, - 15 => FNSEL_A::LOGICAL_ONE, + 0 => Fnsel::LogicalZero, + 1 => Fnsel::ANorB, + 2 => Fnsel::NotAAndB, + 3 => Fnsel::NotA, + 4 => Fnsel::AAndNotB, + 5 => Fnsel::NotB, + 6 => Fnsel::AXorB, + 7 => Fnsel::ANandB, + 8 => Fnsel::AAndB, + 9 => Fnsel::AXnorB, + 10 => Fnsel::B, + 11 => Fnsel::NotAOrB, + 12 => Fnsel::A, + 13 => Fnsel::AOrNotB, + 14 => Fnsel::AOrB, + 15 => Fnsel::LogicalOne, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LOGICAL_ZERO`"] + #[doc = "Logical 0"] #[inline(always)] pub fn is_logical_zero(&self) -> bool { - *self == FNSEL_A::LOGICAL_ZERO + *self == Fnsel::LogicalZero } - #[doc = "Checks if the value of the field is `A_NOR_B`"] + #[doc = "A NOR B"] #[inline(always)] pub fn is_a_nor_b(&self) -> bool { - *self == FNSEL_A::A_NOR_B + *self == Fnsel::ANorB } - #[doc = "Checks if the value of the field is `NOT_A_AND_B`"] + #[doc = "(!A) AND B"] #[inline(always)] pub fn is_not_a_and_b(&self) -> bool { - *self == FNSEL_A::NOT_A_AND_B + *self == Fnsel::NotAAndB } - #[doc = "Checks if the value of the field is `NOT_A`"] + #[doc = "!A"] #[inline(always)] pub fn is_not_a(&self) -> bool { - *self == FNSEL_A::NOT_A + *self == Fnsel::NotA } - #[doc = "Checks if the value of the field is `A_AND_NOT_B`"] + #[doc = "A AND (!B)"] #[inline(always)] pub fn is_a_and_not_b(&self) -> bool { - *self == FNSEL_A::A_AND_NOT_B + *self == Fnsel::AAndNotB } - #[doc = "Checks if the value of the field is `NOT_B`"] + #[doc = "!B"] #[inline(always)] pub fn is_not_b(&self) -> bool { - *self == FNSEL_A::NOT_B + *self == Fnsel::NotB } - #[doc = "Checks if the value of the field is `A_XOR_B`"] + #[doc = "A XOR B"] #[inline(always)] pub fn is_a_xor_b(&self) -> bool { - *self == FNSEL_A::A_XOR_B + *self == Fnsel::AXorB } - #[doc = "Checks if the value of the field is `A_NAND_B`"] + #[doc = "A NAND B"] #[inline(always)] pub fn is_a_nand_b(&self) -> bool { - *self == FNSEL_A::A_NAND_B + *self == Fnsel::ANandB } - #[doc = "Checks if the value of the field is `A_AND_B`"] + #[doc = "A AND B"] #[inline(always)] pub fn is_a_and_b(&self) -> bool { - *self == FNSEL_A::A_AND_B + *self == Fnsel::AAndB } - #[doc = "Checks if the value of the field is `A_XNOR_B`"] + #[doc = "A XNOR B"] #[inline(always)] pub fn is_a_xnor_b(&self) -> bool { - *self == FNSEL_A::A_XNOR_B + *self == Fnsel::AXnorB } - #[doc = "Checks if the value of the field is `B`"] + #[doc = "B"] #[inline(always)] pub fn is_b(&self) -> bool { - *self == FNSEL_A::B + *self == Fnsel::B } - #[doc = "Checks if the value of the field is `NOT_A_OR_B`"] + #[doc = "(!A) OR B"] #[inline(always)] pub fn is_not_a_or_b(&self) -> bool { - *self == FNSEL_A::NOT_A_OR_B + *self == Fnsel::NotAOrB } - #[doc = "Checks if the value of the field is `A`"] + #[doc = "A"] #[inline(always)] pub fn is_a(&self) -> bool { - *self == FNSEL_A::A + *self == Fnsel::A } - #[doc = "Checks if the value of the field is `A_OR_NOT_B`"] + #[doc = "A OR (!B)"] #[inline(always)] pub fn is_a_or_not_b(&self) -> bool { - *self == FNSEL_A::A_OR_NOT_B + *self == Fnsel::AOrNotB } - #[doc = "Checks if the value of the field is `A_OR_B`"] + #[doc = "A OR B"] #[inline(always)] pub fn is_a_or_b(&self) -> bool { - *self == FNSEL_A::A_OR_B + *self == Fnsel::AOrB } - #[doc = "Checks if the value of the field is `LOGICAL_ONE`"] + #[doc = "Logical 1"] #[inline(always)] pub fn is_logical_one(&self) -> bool { - *self == FNSEL_A::LOGICAL_ONE + *self == Fnsel::LogicalOne } } #[doc = "Field `FNSEL` writer - Function Select"] -pub type FNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, ASYNC_CH0_CTRL_SPEC, u8, FNSEL_A, 4, O>; -impl<'a, const O: u8> FNSEL_W<'a, O> { +pub type FnselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Fnsel, crate::Safe>; +impl<'a, REG> FnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Logical 0"] #[inline(always)] - pub fn logical_zero(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ZERO) + pub fn logical_zero(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalZero) } #[doc = "A NOR B"] #[inline(always)] - pub fn a_nor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NOR_B) + pub fn a_nor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANorB) } #[doc = "(!A) AND B"] #[inline(always)] - pub fn not_a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_AND_B) + pub fn not_a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAAndB) } #[doc = "!A"] #[inline(always)] - pub fn not_a(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A) + pub fn not_a(self) -> &'a mut crate::W { + self.variant(Fnsel::NotA) } #[doc = "A AND (!B)"] #[inline(always)] - pub fn a_and_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_NOT_B) + pub fn a_and_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndNotB) } #[doc = "!B"] #[inline(always)] - pub fn not_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_B) + pub fn not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotB) } #[doc = "A XOR B"] #[inline(always)] - pub fn a_xor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XOR_B) + pub fn a_xor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXorB) } #[doc = "A NAND B"] #[inline(always)] - pub fn a_nand_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NAND_B) + pub fn a_nand_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANandB) } #[doc = "A AND B"] #[inline(always)] - pub fn a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_B) + pub fn a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndB) } #[doc = "A XNOR B"] #[inline(always)] - pub fn a_xnor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XNOR_B) + pub fn a_xnor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXnorB) } #[doc = "B"] #[inline(always)] - pub fn b(self) -> &'a mut W { - self.variant(FNSEL_A::B) + pub fn b(self) -> &'a mut crate::W { + self.variant(Fnsel::B) } #[doc = "(!A) OR B"] #[inline(always)] - pub fn not_a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_OR_B) + pub fn not_a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAOrB) } #[doc = "A"] #[inline(always)] - pub fn a(self) -> &'a mut W { - self.variant(FNSEL_A::A) + pub fn a(self) -> &'a mut crate::W { + self.variant(Fnsel::A) } #[doc = "A OR (!B)"] #[inline(always)] - pub fn a_or_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_NOT_B) + pub fn a_or_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrNotB) } #[doc = "A OR B"] #[inline(always)] - pub fn a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_B) + pub fn a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrB) } #[doc = "Logical 1"] #[inline(always)] - pub fn logical_one(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ONE) + pub fn logical_one(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalOne) } } #[doc = "Field `AUXSEL` reader - Aux Select"] -pub type AUXSEL_R = crate::FieldReader; +pub type AuxselR = crate::FieldReader; #[doc = "Field `AUXSEL` writer - Aux Select"] -pub type AUXSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ASYNC_CH0_CTRL_SPEC, u8, u8, 4, O>; +pub type AuxselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] - pub fn fnsel(&self) -> FNSEL_R { - FNSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fnsel(&self) -> FnselR { + FnselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] - pub fn auxsel(&self) -> AUXSEL_R { - AUXSEL_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn auxsel(&self) -> AuxselR { + AuxselR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] #[must_use] - pub fn fnsel(&mut self) -> FNSEL_W<16> { - FNSEL_W::new(self) + pub fn fnsel(&mut self) -> FnselW { + FnselW::new(self, 16) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] #[must_use] - pub fn auxsel(&mut self) -> AUXSEL_W<24> { - AUXSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn auxsel(&mut self) -> AuxselW { + AuxselW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_ch0_ctrl](index.html) module"] -pub struct ASYNC_CH0_CTRL_SPEC; -impl crate::RegisterSpec for ASYNC_CH0_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch0_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch0_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncCh0CtrlSpec; +impl crate::RegisterSpec for AsyncCh0CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_ch0_ctrl::R](R) reader structure"] -impl crate::Readable for ASYNC_CH0_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [async_ch0_ctrl::W](W) writer structure"] -impl crate::Writable for ASYNC_CH0_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`async_ch0_ctrl::R`](R) reader structure"] +impl crate::Readable for AsyncCh0CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`async_ch0_ctrl::W`](W) writer structure"] +impl crate::Writable for AsyncCh0CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_CH0_CTRL to value 0x000c_0000"] -impl crate::Resettable for ASYNC_CH0_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x000c_0000; +impl crate::Resettable for AsyncCh0CtrlSpec { + const RESET_VALUE: u32 = 0x000c_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch10_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch10_ctrl.rs index 3185c41..bc43760 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch10_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch10_ctrl.rs @@ -1,394 +1,366 @@ #[doc = "Register `ASYNC_CH10_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ASYNC_CH10_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH10_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH10_CTRL_SPEC, u8, u8, 7, O>; -#[doc = "Field `FNSEL` reader - Function Select"] -pub type FNSEL_R = crate::FieldReader; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Function Select\n\nValue on reset: 12"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FNSEL_A { +pub enum Fnsel { #[doc = "0: Logical 0"] - LOGICAL_ZERO = 0, + LogicalZero = 0, #[doc = "1: A NOR B"] - A_NOR_B = 1, + ANorB = 1, #[doc = "2: (!A) AND B"] - NOT_A_AND_B = 2, + NotAAndB = 2, #[doc = "3: !A"] - NOT_A = 3, + NotA = 3, #[doc = "4: A AND (!B)"] - A_AND_NOT_B = 4, + AAndNotB = 4, #[doc = "5: !B"] - NOT_B = 5, + NotB = 5, #[doc = "6: A XOR B"] - A_XOR_B = 6, + AXorB = 6, #[doc = "7: A NAND B"] - A_NAND_B = 7, + ANandB = 7, #[doc = "8: A AND B"] - A_AND_B = 8, + AAndB = 8, #[doc = "9: A XNOR B"] - A_XNOR_B = 9, + AXnorB = 9, #[doc = "10: B"] B = 10, #[doc = "11: (!A) OR B"] - NOT_A_OR_B = 11, + NotAOrB = 11, #[doc = "12: A"] A = 12, #[doc = "13: A OR (!B)"] - A_OR_NOT_B = 13, + AOrNotB = 13, #[doc = "14: A OR B"] - A_OR_B = 14, + AOrB = 14, #[doc = "15: Logical 1"] - LOGICAL_ONE = 15, + LogicalOne = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FNSEL_A) -> Self { + fn from(variant: Fnsel) -> Self { variant as _ } } -impl FNSEL_R { +impl crate::FieldSpec for Fnsel { + type Ux = u8; +} +impl crate::IsEnum for Fnsel {} +#[doc = "Field `FNSEL` reader - Function Select"] +pub type FnselR = crate::FieldReader; +impl FnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FNSEL_A { + pub const fn variant(&self) -> Fnsel { match self.bits { - 0 => FNSEL_A::LOGICAL_ZERO, - 1 => FNSEL_A::A_NOR_B, - 2 => FNSEL_A::NOT_A_AND_B, - 3 => FNSEL_A::NOT_A, - 4 => FNSEL_A::A_AND_NOT_B, - 5 => FNSEL_A::NOT_B, - 6 => FNSEL_A::A_XOR_B, - 7 => FNSEL_A::A_NAND_B, - 8 => FNSEL_A::A_AND_B, - 9 => FNSEL_A::A_XNOR_B, - 10 => FNSEL_A::B, - 11 => FNSEL_A::NOT_A_OR_B, - 12 => FNSEL_A::A, - 13 => FNSEL_A::A_OR_NOT_B, - 14 => FNSEL_A::A_OR_B, - 15 => FNSEL_A::LOGICAL_ONE, + 0 => Fnsel::LogicalZero, + 1 => Fnsel::ANorB, + 2 => Fnsel::NotAAndB, + 3 => Fnsel::NotA, + 4 => Fnsel::AAndNotB, + 5 => Fnsel::NotB, + 6 => Fnsel::AXorB, + 7 => Fnsel::ANandB, + 8 => Fnsel::AAndB, + 9 => Fnsel::AXnorB, + 10 => Fnsel::B, + 11 => Fnsel::NotAOrB, + 12 => Fnsel::A, + 13 => Fnsel::AOrNotB, + 14 => Fnsel::AOrB, + 15 => Fnsel::LogicalOne, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LOGICAL_ZERO`"] + #[doc = "Logical 0"] #[inline(always)] pub fn is_logical_zero(&self) -> bool { - *self == FNSEL_A::LOGICAL_ZERO + *self == Fnsel::LogicalZero } - #[doc = "Checks if the value of the field is `A_NOR_B`"] + #[doc = "A NOR B"] #[inline(always)] pub fn is_a_nor_b(&self) -> bool { - *self == FNSEL_A::A_NOR_B + *self == Fnsel::ANorB } - #[doc = "Checks if the value of the field is `NOT_A_AND_B`"] + #[doc = "(!A) AND B"] #[inline(always)] pub fn is_not_a_and_b(&self) -> bool { - *self == FNSEL_A::NOT_A_AND_B + *self == Fnsel::NotAAndB } - #[doc = "Checks if the value of the field is `NOT_A`"] + #[doc = "!A"] #[inline(always)] pub fn is_not_a(&self) -> bool { - *self == FNSEL_A::NOT_A + *self == Fnsel::NotA } - #[doc = "Checks if the value of the field is `A_AND_NOT_B`"] + #[doc = "A AND (!B)"] #[inline(always)] pub fn is_a_and_not_b(&self) -> bool { - *self == FNSEL_A::A_AND_NOT_B + *self == Fnsel::AAndNotB } - #[doc = "Checks if the value of the field is `NOT_B`"] + #[doc = "!B"] #[inline(always)] pub fn is_not_b(&self) -> bool { - *self == FNSEL_A::NOT_B + *self == Fnsel::NotB } - #[doc = "Checks if the value of the field is `A_XOR_B`"] + #[doc = "A XOR B"] #[inline(always)] pub fn is_a_xor_b(&self) -> bool { - *self == FNSEL_A::A_XOR_B + *self == Fnsel::AXorB } - #[doc = "Checks if the value of the field is `A_NAND_B`"] + #[doc = "A NAND B"] #[inline(always)] pub fn is_a_nand_b(&self) -> bool { - *self == FNSEL_A::A_NAND_B + *self == Fnsel::ANandB } - #[doc = "Checks if the value of the field is `A_AND_B`"] + #[doc = "A AND B"] #[inline(always)] pub fn is_a_and_b(&self) -> bool { - *self == FNSEL_A::A_AND_B + *self == Fnsel::AAndB } - #[doc = "Checks if the value of the field is `A_XNOR_B`"] + #[doc = "A XNOR B"] #[inline(always)] pub fn is_a_xnor_b(&self) -> bool { - *self == FNSEL_A::A_XNOR_B + *self == Fnsel::AXnorB } - #[doc = "Checks if the value of the field is `B`"] + #[doc = "B"] #[inline(always)] pub fn is_b(&self) -> bool { - *self == FNSEL_A::B + *self == Fnsel::B } - #[doc = "Checks if the value of the field is `NOT_A_OR_B`"] + #[doc = "(!A) OR B"] #[inline(always)] pub fn is_not_a_or_b(&self) -> bool { - *self == FNSEL_A::NOT_A_OR_B + *self == Fnsel::NotAOrB } - #[doc = "Checks if the value of the field is `A`"] + #[doc = "A"] #[inline(always)] pub fn is_a(&self) -> bool { - *self == FNSEL_A::A + *self == Fnsel::A } - #[doc = "Checks if the value of the field is `A_OR_NOT_B`"] + #[doc = "A OR (!B)"] #[inline(always)] pub fn is_a_or_not_b(&self) -> bool { - *self == FNSEL_A::A_OR_NOT_B + *self == Fnsel::AOrNotB } - #[doc = "Checks if the value of the field is `A_OR_B`"] + #[doc = "A OR B"] #[inline(always)] pub fn is_a_or_b(&self) -> bool { - *self == FNSEL_A::A_OR_B + *self == Fnsel::AOrB } - #[doc = "Checks if the value of the field is `LOGICAL_ONE`"] + #[doc = "Logical 1"] #[inline(always)] pub fn is_logical_one(&self) -> bool { - *self == FNSEL_A::LOGICAL_ONE + *self == Fnsel::LogicalOne } } #[doc = "Field `FNSEL` writer - Function Select"] -pub type FNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, ASYNC_CH10_CTRL_SPEC, u8, FNSEL_A, 4, O>; -impl<'a, const O: u8> FNSEL_W<'a, O> { +pub type FnselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Fnsel, crate::Safe>; +impl<'a, REG> FnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Logical 0"] #[inline(always)] - pub fn logical_zero(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ZERO) + pub fn logical_zero(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalZero) } #[doc = "A NOR B"] #[inline(always)] - pub fn a_nor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NOR_B) + pub fn a_nor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANorB) } #[doc = "(!A) AND B"] #[inline(always)] - pub fn not_a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_AND_B) + pub fn not_a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAAndB) } #[doc = "!A"] #[inline(always)] - pub fn not_a(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A) + pub fn not_a(self) -> &'a mut crate::W { + self.variant(Fnsel::NotA) } #[doc = "A AND (!B)"] #[inline(always)] - pub fn a_and_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_NOT_B) + pub fn a_and_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndNotB) } #[doc = "!B"] #[inline(always)] - pub fn not_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_B) + pub fn not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotB) } #[doc = "A XOR B"] #[inline(always)] - pub fn a_xor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XOR_B) + pub fn a_xor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXorB) } #[doc = "A NAND B"] #[inline(always)] - pub fn a_nand_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NAND_B) + pub fn a_nand_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANandB) } #[doc = "A AND B"] #[inline(always)] - pub fn a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_B) + pub fn a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndB) } #[doc = "A XNOR B"] #[inline(always)] - pub fn a_xnor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XNOR_B) + pub fn a_xnor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXnorB) } #[doc = "B"] #[inline(always)] - pub fn b(self) -> &'a mut W { - self.variant(FNSEL_A::B) + pub fn b(self) -> &'a mut crate::W { + self.variant(Fnsel::B) } #[doc = "(!A) OR B"] #[inline(always)] - pub fn not_a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_OR_B) + pub fn not_a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAOrB) } #[doc = "A"] #[inline(always)] - pub fn a(self) -> &'a mut W { - self.variant(FNSEL_A::A) + pub fn a(self) -> &'a mut crate::W { + self.variant(Fnsel::A) } #[doc = "A OR (!B)"] #[inline(always)] - pub fn a_or_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_NOT_B) + pub fn a_or_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrNotB) } #[doc = "A OR B"] #[inline(always)] - pub fn a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_B) + pub fn a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrB) } #[doc = "Logical 1"] #[inline(always)] - pub fn logical_one(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ONE) + pub fn logical_one(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalOne) } } #[doc = "Field `AUXSEL` reader - Aux Select"] -pub type AUXSEL_R = crate::FieldReader; +pub type AuxselR = crate::FieldReader; #[doc = "Field `AUXSEL` writer - Aux Select"] -pub type AUXSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH10_CTRL_SPEC, u8, u8, 4, O>; +pub type AuxselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] - pub fn fnsel(&self) -> FNSEL_R { - FNSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fnsel(&self) -> FnselR { + FnselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] - pub fn auxsel(&self) -> AUXSEL_R { - AUXSEL_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn auxsel(&self) -> AuxselR { + AuxselR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] #[must_use] - pub fn fnsel(&mut self) -> FNSEL_W<16> { - FNSEL_W::new(self) + pub fn fnsel(&mut self) -> FnselW { + FnselW::new(self, 16) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] #[must_use] - pub fn auxsel(&mut self) -> AUXSEL_W<24> { - AUXSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn auxsel(&mut self) -> AuxselW { + AuxselW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_ch10_ctrl](index.html) module"] -pub struct ASYNC_CH10_CTRL_SPEC; -impl crate::RegisterSpec for ASYNC_CH10_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch10_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch10_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncCh10CtrlSpec; +impl crate::RegisterSpec for AsyncCh10CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_ch10_ctrl::R](R) reader structure"] -impl crate::Readable for ASYNC_CH10_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [async_ch10_ctrl::W](W) writer structure"] -impl crate::Writable for ASYNC_CH10_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`async_ch10_ctrl::R`](R) reader structure"] +impl crate::Readable for AsyncCh10CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`async_ch10_ctrl::W`](W) writer structure"] +impl crate::Writable for AsyncCh10CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_CH10_CTRL to value 0x000c_0000"] -impl crate::Resettable for ASYNC_CH10_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x000c_0000; +impl crate::Resettable for AsyncCh10CtrlSpec { + const RESET_VALUE: u32 = 0x000c_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch11_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch11_ctrl.rs index e9bb400..35990df 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch11_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch11_ctrl.rs @@ -1,394 +1,366 @@ #[doc = "Register `ASYNC_CH11_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ASYNC_CH11_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH11_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH11_CTRL_SPEC, u8, u8, 7, O>; -#[doc = "Field `FNSEL` reader - Function Select"] -pub type FNSEL_R = crate::FieldReader; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Function Select\n\nValue on reset: 12"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FNSEL_A { +pub enum Fnsel { #[doc = "0: Logical 0"] - LOGICAL_ZERO = 0, + LogicalZero = 0, #[doc = "1: A NOR B"] - A_NOR_B = 1, + ANorB = 1, #[doc = "2: (!A) AND B"] - NOT_A_AND_B = 2, + NotAAndB = 2, #[doc = "3: !A"] - NOT_A = 3, + NotA = 3, #[doc = "4: A AND (!B)"] - A_AND_NOT_B = 4, + AAndNotB = 4, #[doc = "5: !B"] - NOT_B = 5, + NotB = 5, #[doc = "6: A XOR B"] - A_XOR_B = 6, + AXorB = 6, #[doc = "7: A NAND B"] - A_NAND_B = 7, + ANandB = 7, #[doc = "8: A AND B"] - A_AND_B = 8, + AAndB = 8, #[doc = "9: A XNOR B"] - A_XNOR_B = 9, + AXnorB = 9, #[doc = "10: B"] B = 10, #[doc = "11: (!A) OR B"] - NOT_A_OR_B = 11, + NotAOrB = 11, #[doc = "12: A"] A = 12, #[doc = "13: A OR (!B)"] - A_OR_NOT_B = 13, + AOrNotB = 13, #[doc = "14: A OR B"] - A_OR_B = 14, + AOrB = 14, #[doc = "15: Logical 1"] - LOGICAL_ONE = 15, + LogicalOne = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FNSEL_A) -> Self { + fn from(variant: Fnsel) -> Self { variant as _ } } -impl FNSEL_R { +impl crate::FieldSpec for Fnsel { + type Ux = u8; +} +impl crate::IsEnum for Fnsel {} +#[doc = "Field `FNSEL` reader - Function Select"] +pub type FnselR = crate::FieldReader; +impl FnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FNSEL_A { + pub const fn variant(&self) -> Fnsel { match self.bits { - 0 => FNSEL_A::LOGICAL_ZERO, - 1 => FNSEL_A::A_NOR_B, - 2 => FNSEL_A::NOT_A_AND_B, - 3 => FNSEL_A::NOT_A, - 4 => FNSEL_A::A_AND_NOT_B, - 5 => FNSEL_A::NOT_B, - 6 => FNSEL_A::A_XOR_B, - 7 => FNSEL_A::A_NAND_B, - 8 => FNSEL_A::A_AND_B, - 9 => FNSEL_A::A_XNOR_B, - 10 => FNSEL_A::B, - 11 => FNSEL_A::NOT_A_OR_B, - 12 => FNSEL_A::A, - 13 => FNSEL_A::A_OR_NOT_B, - 14 => FNSEL_A::A_OR_B, - 15 => FNSEL_A::LOGICAL_ONE, + 0 => Fnsel::LogicalZero, + 1 => Fnsel::ANorB, + 2 => Fnsel::NotAAndB, + 3 => Fnsel::NotA, + 4 => Fnsel::AAndNotB, + 5 => Fnsel::NotB, + 6 => Fnsel::AXorB, + 7 => Fnsel::ANandB, + 8 => Fnsel::AAndB, + 9 => Fnsel::AXnorB, + 10 => Fnsel::B, + 11 => Fnsel::NotAOrB, + 12 => Fnsel::A, + 13 => Fnsel::AOrNotB, + 14 => Fnsel::AOrB, + 15 => Fnsel::LogicalOne, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LOGICAL_ZERO`"] + #[doc = "Logical 0"] #[inline(always)] pub fn is_logical_zero(&self) -> bool { - *self == FNSEL_A::LOGICAL_ZERO + *self == Fnsel::LogicalZero } - #[doc = "Checks if the value of the field is `A_NOR_B`"] + #[doc = "A NOR B"] #[inline(always)] pub fn is_a_nor_b(&self) -> bool { - *self == FNSEL_A::A_NOR_B + *self == Fnsel::ANorB } - #[doc = "Checks if the value of the field is `NOT_A_AND_B`"] + #[doc = "(!A) AND B"] #[inline(always)] pub fn is_not_a_and_b(&self) -> bool { - *self == FNSEL_A::NOT_A_AND_B + *self == Fnsel::NotAAndB } - #[doc = "Checks if the value of the field is `NOT_A`"] + #[doc = "!A"] #[inline(always)] pub fn is_not_a(&self) -> bool { - *self == FNSEL_A::NOT_A + *self == Fnsel::NotA } - #[doc = "Checks if the value of the field is `A_AND_NOT_B`"] + #[doc = "A AND (!B)"] #[inline(always)] pub fn is_a_and_not_b(&self) -> bool { - *self == FNSEL_A::A_AND_NOT_B + *self == Fnsel::AAndNotB } - #[doc = "Checks if the value of the field is `NOT_B`"] + #[doc = "!B"] #[inline(always)] pub fn is_not_b(&self) -> bool { - *self == FNSEL_A::NOT_B + *self == Fnsel::NotB } - #[doc = "Checks if the value of the field is `A_XOR_B`"] + #[doc = "A XOR B"] #[inline(always)] pub fn is_a_xor_b(&self) -> bool { - *self == FNSEL_A::A_XOR_B + *self == Fnsel::AXorB } - #[doc = "Checks if the value of the field is `A_NAND_B`"] + #[doc = "A NAND B"] #[inline(always)] pub fn is_a_nand_b(&self) -> bool { - *self == FNSEL_A::A_NAND_B + *self == Fnsel::ANandB } - #[doc = "Checks if the value of the field is `A_AND_B`"] + #[doc = "A AND B"] #[inline(always)] pub fn is_a_and_b(&self) -> bool { - *self == FNSEL_A::A_AND_B + *self == Fnsel::AAndB } - #[doc = "Checks if the value of the field is `A_XNOR_B`"] + #[doc = "A XNOR B"] #[inline(always)] pub fn is_a_xnor_b(&self) -> bool { - *self == FNSEL_A::A_XNOR_B + *self == Fnsel::AXnorB } - #[doc = "Checks if the value of the field is `B`"] + #[doc = "B"] #[inline(always)] pub fn is_b(&self) -> bool { - *self == FNSEL_A::B + *self == Fnsel::B } - #[doc = "Checks if the value of the field is `NOT_A_OR_B`"] + #[doc = "(!A) OR B"] #[inline(always)] pub fn is_not_a_or_b(&self) -> bool { - *self == FNSEL_A::NOT_A_OR_B + *self == Fnsel::NotAOrB } - #[doc = "Checks if the value of the field is `A`"] + #[doc = "A"] #[inline(always)] pub fn is_a(&self) -> bool { - *self == FNSEL_A::A + *self == Fnsel::A } - #[doc = "Checks if the value of the field is `A_OR_NOT_B`"] + #[doc = "A OR (!B)"] #[inline(always)] pub fn is_a_or_not_b(&self) -> bool { - *self == FNSEL_A::A_OR_NOT_B + *self == Fnsel::AOrNotB } - #[doc = "Checks if the value of the field is `A_OR_B`"] + #[doc = "A OR B"] #[inline(always)] pub fn is_a_or_b(&self) -> bool { - *self == FNSEL_A::A_OR_B + *self == Fnsel::AOrB } - #[doc = "Checks if the value of the field is `LOGICAL_ONE`"] + #[doc = "Logical 1"] #[inline(always)] pub fn is_logical_one(&self) -> bool { - *self == FNSEL_A::LOGICAL_ONE + *self == Fnsel::LogicalOne } } #[doc = "Field `FNSEL` writer - Function Select"] -pub type FNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, ASYNC_CH11_CTRL_SPEC, u8, FNSEL_A, 4, O>; -impl<'a, const O: u8> FNSEL_W<'a, O> { +pub type FnselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Fnsel, crate::Safe>; +impl<'a, REG> FnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Logical 0"] #[inline(always)] - pub fn logical_zero(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ZERO) + pub fn logical_zero(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalZero) } #[doc = "A NOR B"] #[inline(always)] - pub fn a_nor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NOR_B) + pub fn a_nor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANorB) } #[doc = "(!A) AND B"] #[inline(always)] - pub fn not_a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_AND_B) + pub fn not_a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAAndB) } #[doc = "!A"] #[inline(always)] - pub fn not_a(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A) + pub fn not_a(self) -> &'a mut crate::W { + self.variant(Fnsel::NotA) } #[doc = "A AND (!B)"] #[inline(always)] - pub fn a_and_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_NOT_B) + pub fn a_and_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndNotB) } #[doc = "!B"] #[inline(always)] - pub fn not_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_B) + pub fn not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotB) } #[doc = "A XOR B"] #[inline(always)] - pub fn a_xor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XOR_B) + pub fn a_xor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXorB) } #[doc = "A NAND B"] #[inline(always)] - pub fn a_nand_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NAND_B) + pub fn a_nand_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANandB) } #[doc = "A AND B"] #[inline(always)] - pub fn a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_B) + pub fn a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndB) } #[doc = "A XNOR B"] #[inline(always)] - pub fn a_xnor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XNOR_B) + pub fn a_xnor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXnorB) } #[doc = "B"] #[inline(always)] - pub fn b(self) -> &'a mut W { - self.variant(FNSEL_A::B) + pub fn b(self) -> &'a mut crate::W { + self.variant(Fnsel::B) } #[doc = "(!A) OR B"] #[inline(always)] - pub fn not_a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_OR_B) + pub fn not_a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAOrB) } #[doc = "A"] #[inline(always)] - pub fn a(self) -> &'a mut W { - self.variant(FNSEL_A::A) + pub fn a(self) -> &'a mut crate::W { + self.variant(Fnsel::A) } #[doc = "A OR (!B)"] #[inline(always)] - pub fn a_or_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_NOT_B) + pub fn a_or_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrNotB) } #[doc = "A OR B"] #[inline(always)] - pub fn a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_B) + pub fn a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrB) } #[doc = "Logical 1"] #[inline(always)] - pub fn logical_one(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ONE) + pub fn logical_one(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalOne) } } #[doc = "Field `AUXSEL` reader - Aux Select"] -pub type AUXSEL_R = crate::FieldReader; +pub type AuxselR = crate::FieldReader; #[doc = "Field `AUXSEL` writer - Aux Select"] -pub type AUXSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH11_CTRL_SPEC, u8, u8, 4, O>; +pub type AuxselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] - pub fn fnsel(&self) -> FNSEL_R { - FNSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fnsel(&self) -> FnselR { + FnselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] - pub fn auxsel(&self) -> AUXSEL_R { - AUXSEL_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn auxsel(&self) -> AuxselR { + AuxselR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] #[must_use] - pub fn fnsel(&mut self) -> FNSEL_W<16> { - FNSEL_W::new(self) + pub fn fnsel(&mut self) -> FnselW { + FnselW::new(self, 16) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] #[must_use] - pub fn auxsel(&mut self) -> AUXSEL_W<24> { - AUXSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn auxsel(&mut self) -> AuxselW { + AuxselW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_ch11_ctrl](index.html) module"] -pub struct ASYNC_CH11_CTRL_SPEC; -impl crate::RegisterSpec for ASYNC_CH11_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch11_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch11_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncCh11CtrlSpec; +impl crate::RegisterSpec for AsyncCh11CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_ch11_ctrl::R](R) reader structure"] -impl crate::Readable for ASYNC_CH11_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [async_ch11_ctrl::W](W) writer structure"] -impl crate::Writable for ASYNC_CH11_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`async_ch11_ctrl::R`](R) reader structure"] +impl crate::Readable for AsyncCh11CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`async_ch11_ctrl::W`](W) writer structure"] +impl crate::Writable for AsyncCh11CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_CH11_CTRL to value 0x000c_0000"] -impl crate::Resettable for ASYNC_CH11_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x000c_0000; +impl crate::Resettable for AsyncCh11CtrlSpec { + const RESET_VALUE: u32 = 0x000c_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch1_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch1_ctrl.rs index f2c4b0f..2d14e8b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch1_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch1_ctrl.rs @@ -1,393 +1,366 @@ #[doc = "Register `ASYNC_CH1_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ASYNC_CH1_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH1_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH1_CTRL_SPEC, u8, u8, 7, O>; -#[doc = "Field `FNSEL` reader - Function Select"] -pub type FNSEL_R = crate::FieldReader; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Function Select\n\nValue on reset: 12"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FNSEL_A { +pub enum Fnsel { #[doc = "0: Logical 0"] - LOGICAL_ZERO = 0, + LogicalZero = 0, #[doc = "1: A NOR B"] - A_NOR_B = 1, + ANorB = 1, #[doc = "2: (!A) AND B"] - NOT_A_AND_B = 2, + NotAAndB = 2, #[doc = "3: !A"] - NOT_A = 3, + NotA = 3, #[doc = "4: A AND (!B)"] - A_AND_NOT_B = 4, + AAndNotB = 4, #[doc = "5: !B"] - NOT_B = 5, + NotB = 5, #[doc = "6: A XOR B"] - A_XOR_B = 6, + AXorB = 6, #[doc = "7: A NAND B"] - A_NAND_B = 7, + ANandB = 7, #[doc = "8: A AND B"] - A_AND_B = 8, + AAndB = 8, #[doc = "9: A XNOR B"] - A_XNOR_B = 9, + AXnorB = 9, #[doc = "10: B"] B = 10, #[doc = "11: (!A) OR B"] - NOT_A_OR_B = 11, + NotAOrB = 11, #[doc = "12: A"] A = 12, #[doc = "13: A OR (!B)"] - A_OR_NOT_B = 13, + AOrNotB = 13, #[doc = "14: A OR B"] - A_OR_B = 14, + AOrB = 14, #[doc = "15: Logical 1"] - LOGICAL_ONE = 15, + LogicalOne = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FNSEL_A) -> Self { + fn from(variant: Fnsel) -> Self { variant as _ } } -impl FNSEL_R { +impl crate::FieldSpec for Fnsel { + type Ux = u8; +} +impl crate::IsEnum for Fnsel {} +#[doc = "Field `FNSEL` reader - Function Select"] +pub type FnselR = crate::FieldReader; +impl FnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FNSEL_A { + pub const fn variant(&self) -> Fnsel { match self.bits { - 0 => FNSEL_A::LOGICAL_ZERO, - 1 => FNSEL_A::A_NOR_B, - 2 => FNSEL_A::NOT_A_AND_B, - 3 => FNSEL_A::NOT_A, - 4 => FNSEL_A::A_AND_NOT_B, - 5 => FNSEL_A::NOT_B, - 6 => FNSEL_A::A_XOR_B, - 7 => FNSEL_A::A_NAND_B, - 8 => FNSEL_A::A_AND_B, - 9 => FNSEL_A::A_XNOR_B, - 10 => FNSEL_A::B, - 11 => FNSEL_A::NOT_A_OR_B, - 12 => FNSEL_A::A, - 13 => FNSEL_A::A_OR_NOT_B, - 14 => FNSEL_A::A_OR_B, - 15 => FNSEL_A::LOGICAL_ONE, + 0 => Fnsel::LogicalZero, + 1 => Fnsel::ANorB, + 2 => Fnsel::NotAAndB, + 3 => Fnsel::NotA, + 4 => Fnsel::AAndNotB, + 5 => Fnsel::NotB, + 6 => Fnsel::AXorB, + 7 => Fnsel::ANandB, + 8 => Fnsel::AAndB, + 9 => Fnsel::AXnorB, + 10 => Fnsel::B, + 11 => Fnsel::NotAOrB, + 12 => Fnsel::A, + 13 => Fnsel::AOrNotB, + 14 => Fnsel::AOrB, + 15 => Fnsel::LogicalOne, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LOGICAL_ZERO`"] + #[doc = "Logical 0"] #[inline(always)] pub fn is_logical_zero(&self) -> bool { - *self == FNSEL_A::LOGICAL_ZERO + *self == Fnsel::LogicalZero } - #[doc = "Checks if the value of the field is `A_NOR_B`"] + #[doc = "A NOR B"] #[inline(always)] pub fn is_a_nor_b(&self) -> bool { - *self == FNSEL_A::A_NOR_B + *self == Fnsel::ANorB } - #[doc = "Checks if the value of the field is `NOT_A_AND_B`"] + #[doc = "(!A) AND B"] #[inline(always)] pub fn is_not_a_and_b(&self) -> bool { - *self == FNSEL_A::NOT_A_AND_B + *self == Fnsel::NotAAndB } - #[doc = "Checks if the value of the field is `NOT_A`"] + #[doc = "!A"] #[inline(always)] pub fn is_not_a(&self) -> bool { - *self == FNSEL_A::NOT_A + *self == Fnsel::NotA } - #[doc = "Checks if the value of the field is `A_AND_NOT_B`"] + #[doc = "A AND (!B)"] #[inline(always)] pub fn is_a_and_not_b(&self) -> bool { - *self == FNSEL_A::A_AND_NOT_B + *self == Fnsel::AAndNotB } - #[doc = "Checks if the value of the field is `NOT_B`"] + #[doc = "!B"] #[inline(always)] pub fn is_not_b(&self) -> bool { - *self == FNSEL_A::NOT_B + *self == Fnsel::NotB } - #[doc = "Checks if the value of the field is `A_XOR_B`"] + #[doc = "A XOR B"] #[inline(always)] pub fn is_a_xor_b(&self) -> bool { - *self == FNSEL_A::A_XOR_B + *self == Fnsel::AXorB } - #[doc = "Checks if the value of the field is `A_NAND_B`"] + #[doc = "A NAND B"] #[inline(always)] pub fn is_a_nand_b(&self) -> bool { - *self == FNSEL_A::A_NAND_B + *self == Fnsel::ANandB } - #[doc = "Checks if the value of the field is `A_AND_B`"] + #[doc = "A AND B"] #[inline(always)] pub fn is_a_and_b(&self) -> bool { - *self == FNSEL_A::A_AND_B + *self == Fnsel::AAndB } - #[doc = "Checks if the value of the field is `A_XNOR_B`"] + #[doc = "A XNOR B"] #[inline(always)] pub fn is_a_xnor_b(&self) -> bool { - *self == FNSEL_A::A_XNOR_B + *self == Fnsel::AXnorB } - #[doc = "Checks if the value of the field is `B`"] + #[doc = "B"] #[inline(always)] pub fn is_b(&self) -> bool { - *self == FNSEL_A::B + *self == Fnsel::B } - #[doc = "Checks if the value of the field is `NOT_A_OR_B`"] + #[doc = "(!A) OR B"] #[inline(always)] pub fn is_not_a_or_b(&self) -> bool { - *self == FNSEL_A::NOT_A_OR_B + *self == Fnsel::NotAOrB } - #[doc = "Checks if the value of the field is `A`"] + #[doc = "A"] #[inline(always)] pub fn is_a(&self) -> bool { - *self == FNSEL_A::A + *self == Fnsel::A } - #[doc = "Checks if the value of the field is `A_OR_NOT_B`"] + #[doc = "A OR (!B)"] #[inline(always)] pub fn is_a_or_not_b(&self) -> bool { - *self == FNSEL_A::A_OR_NOT_B + *self == Fnsel::AOrNotB } - #[doc = "Checks if the value of the field is `A_OR_B`"] + #[doc = "A OR B"] #[inline(always)] pub fn is_a_or_b(&self) -> bool { - *self == FNSEL_A::A_OR_B + *self == Fnsel::AOrB } - #[doc = "Checks if the value of the field is `LOGICAL_ONE`"] + #[doc = "Logical 1"] #[inline(always)] pub fn is_logical_one(&self) -> bool { - *self == FNSEL_A::LOGICAL_ONE + *self == Fnsel::LogicalOne } } #[doc = "Field `FNSEL` writer - Function Select"] -pub type FNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, ASYNC_CH1_CTRL_SPEC, u8, FNSEL_A, 4, O>; -impl<'a, const O: u8> FNSEL_W<'a, O> { +pub type FnselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Fnsel, crate::Safe>; +impl<'a, REG> FnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Logical 0"] #[inline(always)] - pub fn logical_zero(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ZERO) + pub fn logical_zero(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalZero) } #[doc = "A NOR B"] #[inline(always)] - pub fn a_nor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NOR_B) + pub fn a_nor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANorB) } #[doc = "(!A) AND B"] #[inline(always)] - pub fn not_a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_AND_B) + pub fn not_a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAAndB) } #[doc = "!A"] #[inline(always)] - pub fn not_a(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A) + pub fn not_a(self) -> &'a mut crate::W { + self.variant(Fnsel::NotA) } #[doc = "A AND (!B)"] #[inline(always)] - pub fn a_and_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_NOT_B) + pub fn a_and_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndNotB) } #[doc = "!B"] #[inline(always)] - pub fn not_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_B) + pub fn not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotB) } #[doc = "A XOR B"] #[inline(always)] - pub fn a_xor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XOR_B) + pub fn a_xor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXorB) } #[doc = "A NAND B"] #[inline(always)] - pub fn a_nand_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NAND_B) + pub fn a_nand_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANandB) } #[doc = "A AND B"] #[inline(always)] - pub fn a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_B) + pub fn a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndB) } #[doc = "A XNOR B"] #[inline(always)] - pub fn a_xnor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XNOR_B) + pub fn a_xnor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXnorB) } #[doc = "B"] #[inline(always)] - pub fn b(self) -> &'a mut W { - self.variant(FNSEL_A::B) + pub fn b(self) -> &'a mut crate::W { + self.variant(Fnsel::B) } #[doc = "(!A) OR B"] #[inline(always)] - pub fn not_a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_OR_B) + pub fn not_a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAOrB) } #[doc = "A"] #[inline(always)] - pub fn a(self) -> &'a mut W { - self.variant(FNSEL_A::A) + pub fn a(self) -> &'a mut crate::W { + self.variant(Fnsel::A) } #[doc = "A OR (!B)"] #[inline(always)] - pub fn a_or_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_NOT_B) + pub fn a_or_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrNotB) } #[doc = "A OR B"] #[inline(always)] - pub fn a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_B) + pub fn a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrB) } #[doc = "Logical 1"] #[inline(always)] - pub fn logical_one(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ONE) + pub fn logical_one(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalOne) } } #[doc = "Field `AUXSEL` reader - Aux Select"] -pub type AUXSEL_R = crate::FieldReader; +pub type AuxselR = crate::FieldReader; #[doc = "Field `AUXSEL` writer - Aux Select"] -pub type AUXSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ASYNC_CH1_CTRL_SPEC, u8, u8, 4, O>; +pub type AuxselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] - pub fn fnsel(&self) -> FNSEL_R { - FNSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fnsel(&self) -> FnselR { + FnselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] - pub fn auxsel(&self) -> AUXSEL_R { - AUXSEL_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn auxsel(&self) -> AuxselR { + AuxselR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] #[must_use] - pub fn fnsel(&mut self) -> FNSEL_W<16> { - FNSEL_W::new(self) + pub fn fnsel(&mut self) -> FnselW { + FnselW::new(self, 16) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] #[must_use] - pub fn auxsel(&mut self) -> AUXSEL_W<24> { - AUXSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn auxsel(&mut self) -> AuxselW { + AuxselW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_ch1_ctrl](index.html) module"] -pub struct ASYNC_CH1_CTRL_SPEC; -impl crate::RegisterSpec for ASYNC_CH1_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch1_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch1_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncCh1CtrlSpec; +impl crate::RegisterSpec for AsyncCh1CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_ch1_ctrl::R](R) reader structure"] -impl crate::Readable for ASYNC_CH1_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [async_ch1_ctrl::W](W) writer structure"] -impl crate::Writable for ASYNC_CH1_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`async_ch1_ctrl::R`](R) reader structure"] +impl crate::Readable for AsyncCh1CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`async_ch1_ctrl::W`](W) writer structure"] +impl crate::Writable for AsyncCh1CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_CH1_CTRL to value 0x000c_0000"] -impl crate::Resettable for ASYNC_CH1_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x000c_0000; +impl crate::Resettable for AsyncCh1CtrlSpec { + const RESET_VALUE: u32 = 0x000c_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch2_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch2_ctrl.rs index 9d8a036..61f81fa 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch2_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch2_ctrl.rs @@ -1,393 +1,366 @@ #[doc = "Register `ASYNC_CH2_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ASYNC_CH2_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH2_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH2_CTRL_SPEC, u8, u8, 7, O>; -#[doc = "Field `FNSEL` reader - Function Select"] -pub type FNSEL_R = crate::FieldReader; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Function Select\n\nValue on reset: 12"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FNSEL_A { +pub enum Fnsel { #[doc = "0: Logical 0"] - LOGICAL_ZERO = 0, + LogicalZero = 0, #[doc = "1: A NOR B"] - A_NOR_B = 1, + ANorB = 1, #[doc = "2: (!A) AND B"] - NOT_A_AND_B = 2, + NotAAndB = 2, #[doc = "3: !A"] - NOT_A = 3, + NotA = 3, #[doc = "4: A AND (!B)"] - A_AND_NOT_B = 4, + AAndNotB = 4, #[doc = "5: !B"] - NOT_B = 5, + NotB = 5, #[doc = "6: A XOR B"] - A_XOR_B = 6, + AXorB = 6, #[doc = "7: A NAND B"] - A_NAND_B = 7, + ANandB = 7, #[doc = "8: A AND B"] - A_AND_B = 8, + AAndB = 8, #[doc = "9: A XNOR B"] - A_XNOR_B = 9, + AXnorB = 9, #[doc = "10: B"] B = 10, #[doc = "11: (!A) OR B"] - NOT_A_OR_B = 11, + NotAOrB = 11, #[doc = "12: A"] A = 12, #[doc = "13: A OR (!B)"] - A_OR_NOT_B = 13, + AOrNotB = 13, #[doc = "14: A OR B"] - A_OR_B = 14, + AOrB = 14, #[doc = "15: Logical 1"] - LOGICAL_ONE = 15, + LogicalOne = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FNSEL_A) -> Self { + fn from(variant: Fnsel) -> Self { variant as _ } } -impl FNSEL_R { +impl crate::FieldSpec for Fnsel { + type Ux = u8; +} +impl crate::IsEnum for Fnsel {} +#[doc = "Field `FNSEL` reader - Function Select"] +pub type FnselR = crate::FieldReader; +impl FnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FNSEL_A { + pub const fn variant(&self) -> Fnsel { match self.bits { - 0 => FNSEL_A::LOGICAL_ZERO, - 1 => FNSEL_A::A_NOR_B, - 2 => FNSEL_A::NOT_A_AND_B, - 3 => FNSEL_A::NOT_A, - 4 => FNSEL_A::A_AND_NOT_B, - 5 => FNSEL_A::NOT_B, - 6 => FNSEL_A::A_XOR_B, - 7 => FNSEL_A::A_NAND_B, - 8 => FNSEL_A::A_AND_B, - 9 => FNSEL_A::A_XNOR_B, - 10 => FNSEL_A::B, - 11 => FNSEL_A::NOT_A_OR_B, - 12 => FNSEL_A::A, - 13 => FNSEL_A::A_OR_NOT_B, - 14 => FNSEL_A::A_OR_B, - 15 => FNSEL_A::LOGICAL_ONE, + 0 => Fnsel::LogicalZero, + 1 => Fnsel::ANorB, + 2 => Fnsel::NotAAndB, + 3 => Fnsel::NotA, + 4 => Fnsel::AAndNotB, + 5 => Fnsel::NotB, + 6 => Fnsel::AXorB, + 7 => Fnsel::ANandB, + 8 => Fnsel::AAndB, + 9 => Fnsel::AXnorB, + 10 => Fnsel::B, + 11 => Fnsel::NotAOrB, + 12 => Fnsel::A, + 13 => Fnsel::AOrNotB, + 14 => Fnsel::AOrB, + 15 => Fnsel::LogicalOne, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LOGICAL_ZERO`"] + #[doc = "Logical 0"] #[inline(always)] pub fn is_logical_zero(&self) -> bool { - *self == FNSEL_A::LOGICAL_ZERO + *self == Fnsel::LogicalZero } - #[doc = "Checks if the value of the field is `A_NOR_B`"] + #[doc = "A NOR B"] #[inline(always)] pub fn is_a_nor_b(&self) -> bool { - *self == FNSEL_A::A_NOR_B + *self == Fnsel::ANorB } - #[doc = "Checks if the value of the field is `NOT_A_AND_B`"] + #[doc = "(!A) AND B"] #[inline(always)] pub fn is_not_a_and_b(&self) -> bool { - *self == FNSEL_A::NOT_A_AND_B + *self == Fnsel::NotAAndB } - #[doc = "Checks if the value of the field is `NOT_A`"] + #[doc = "!A"] #[inline(always)] pub fn is_not_a(&self) -> bool { - *self == FNSEL_A::NOT_A + *self == Fnsel::NotA } - #[doc = "Checks if the value of the field is `A_AND_NOT_B`"] + #[doc = "A AND (!B)"] #[inline(always)] pub fn is_a_and_not_b(&self) -> bool { - *self == FNSEL_A::A_AND_NOT_B + *self == Fnsel::AAndNotB } - #[doc = "Checks if the value of the field is `NOT_B`"] + #[doc = "!B"] #[inline(always)] pub fn is_not_b(&self) -> bool { - *self == FNSEL_A::NOT_B + *self == Fnsel::NotB } - #[doc = "Checks if the value of the field is `A_XOR_B`"] + #[doc = "A XOR B"] #[inline(always)] pub fn is_a_xor_b(&self) -> bool { - *self == FNSEL_A::A_XOR_B + *self == Fnsel::AXorB } - #[doc = "Checks if the value of the field is `A_NAND_B`"] + #[doc = "A NAND B"] #[inline(always)] pub fn is_a_nand_b(&self) -> bool { - *self == FNSEL_A::A_NAND_B + *self == Fnsel::ANandB } - #[doc = "Checks if the value of the field is `A_AND_B`"] + #[doc = "A AND B"] #[inline(always)] pub fn is_a_and_b(&self) -> bool { - *self == FNSEL_A::A_AND_B + *self == Fnsel::AAndB } - #[doc = "Checks if the value of the field is `A_XNOR_B`"] + #[doc = "A XNOR B"] #[inline(always)] pub fn is_a_xnor_b(&self) -> bool { - *self == FNSEL_A::A_XNOR_B + *self == Fnsel::AXnorB } - #[doc = "Checks if the value of the field is `B`"] + #[doc = "B"] #[inline(always)] pub fn is_b(&self) -> bool { - *self == FNSEL_A::B + *self == Fnsel::B } - #[doc = "Checks if the value of the field is `NOT_A_OR_B`"] + #[doc = "(!A) OR B"] #[inline(always)] pub fn is_not_a_or_b(&self) -> bool { - *self == FNSEL_A::NOT_A_OR_B + *self == Fnsel::NotAOrB } - #[doc = "Checks if the value of the field is `A`"] + #[doc = "A"] #[inline(always)] pub fn is_a(&self) -> bool { - *self == FNSEL_A::A + *self == Fnsel::A } - #[doc = "Checks if the value of the field is `A_OR_NOT_B`"] + #[doc = "A OR (!B)"] #[inline(always)] pub fn is_a_or_not_b(&self) -> bool { - *self == FNSEL_A::A_OR_NOT_B + *self == Fnsel::AOrNotB } - #[doc = "Checks if the value of the field is `A_OR_B`"] + #[doc = "A OR B"] #[inline(always)] pub fn is_a_or_b(&self) -> bool { - *self == FNSEL_A::A_OR_B + *self == Fnsel::AOrB } - #[doc = "Checks if the value of the field is `LOGICAL_ONE`"] + #[doc = "Logical 1"] #[inline(always)] pub fn is_logical_one(&self) -> bool { - *self == FNSEL_A::LOGICAL_ONE + *self == Fnsel::LogicalOne } } #[doc = "Field `FNSEL` writer - Function Select"] -pub type FNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, ASYNC_CH2_CTRL_SPEC, u8, FNSEL_A, 4, O>; -impl<'a, const O: u8> FNSEL_W<'a, O> { +pub type FnselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Fnsel, crate::Safe>; +impl<'a, REG> FnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Logical 0"] #[inline(always)] - pub fn logical_zero(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ZERO) + pub fn logical_zero(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalZero) } #[doc = "A NOR B"] #[inline(always)] - pub fn a_nor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NOR_B) + pub fn a_nor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANorB) } #[doc = "(!A) AND B"] #[inline(always)] - pub fn not_a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_AND_B) + pub fn not_a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAAndB) } #[doc = "!A"] #[inline(always)] - pub fn not_a(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A) + pub fn not_a(self) -> &'a mut crate::W { + self.variant(Fnsel::NotA) } #[doc = "A AND (!B)"] #[inline(always)] - pub fn a_and_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_NOT_B) + pub fn a_and_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndNotB) } #[doc = "!B"] #[inline(always)] - pub fn not_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_B) + pub fn not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotB) } #[doc = "A XOR B"] #[inline(always)] - pub fn a_xor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XOR_B) + pub fn a_xor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXorB) } #[doc = "A NAND B"] #[inline(always)] - pub fn a_nand_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NAND_B) + pub fn a_nand_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANandB) } #[doc = "A AND B"] #[inline(always)] - pub fn a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_B) + pub fn a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndB) } #[doc = "A XNOR B"] #[inline(always)] - pub fn a_xnor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XNOR_B) + pub fn a_xnor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXnorB) } #[doc = "B"] #[inline(always)] - pub fn b(self) -> &'a mut W { - self.variant(FNSEL_A::B) + pub fn b(self) -> &'a mut crate::W { + self.variant(Fnsel::B) } #[doc = "(!A) OR B"] #[inline(always)] - pub fn not_a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_OR_B) + pub fn not_a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAOrB) } #[doc = "A"] #[inline(always)] - pub fn a(self) -> &'a mut W { - self.variant(FNSEL_A::A) + pub fn a(self) -> &'a mut crate::W { + self.variant(Fnsel::A) } #[doc = "A OR (!B)"] #[inline(always)] - pub fn a_or_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_NOT_B) + pub fn a_or_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrNotB) } #[doc = "A OR B"] #[inline(always)] - pub fn a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_B) + pub fn a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrB) } #[doc = "Logical 1"] #[inline(always)] - pub fn logical_one(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ONE) + pub fn logical_one(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalOne) } } #[doc = "Field `AUXSEL` reader - Aux Select"] -pub type AUXSEL_R = crate::FieldReader; +pub type AuxselR = crate::FieldReader; #[doc = "Field `AUXSEL` writer - Aux Select"] -pub type AUXSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ASYNC_CH2_CTRL_SPEC, u8, u8, 4, O>; +pub type AuxselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] - pub fn fnsel(&self) -> FNSEL_R { - FNSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fnsel(&self) -> FnselR { + FnselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] - pub fn auxsel(&self) -> AUXSEL_R { - AUXSEL_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn auxsel(&self) -> AuxselR { + AuxselR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] #[must_use] - pub fn fnsel(&mut self) -> FNSEL_W<16> { - FNSEL_W::new(self) + pub fn fnsel(&mut self) -> FnselW { + FnselW::new(self, 16) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] #[must_use] - pub fn auxsel(&mut self) -> AUXSEL_W<24> { - AUXSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn auxsel(&mut self) -> AuxselW { + AuxselW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_ch2_ctrl](index.html) module"] -pub struct ASYNC_CH2_CTRL_SPEC; -impl crate::RegisterSpec for ASYNC_CH2_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch2_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch2_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncCh2CtrlSpec; +impl crate::RegisterSpec for AsyncCh2CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_ch2_ctrl::R](R) reader structure"] -impl crate::Readable for ASYNC_CH2_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [async_ch2_ctrl::W](W) writer structure"] -impl crate::Writable for ASYNC_CH2_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`async_ch2_ctrl::R`](R) reader structure"] +impl crate::Readable for AsyncCh2CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`async_ch2_ctrl::W`](W) writer structure"] +impl crate::Writable for AsyncCh2CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_CH2_CTRL to value 0x000c_0000"] -impl crate::Resettable for ASYNC_CH2_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x000c_0000; +impl crate::Resettable for AsyncCh2CtrlSpec { + const RESET_VALUE: u32 = 0x000c_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch3_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch3_ctrl.rs index 2127e34..0195e9b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch3_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch3_ctrl.rs @@ -1,393 +1,366 @@ #[doc = "Register `ASYNC_CH3_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ASYNC_CH3_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH3_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH3_CTRL_SPEC, u8, u8, 7, O>; -#[doc = "Field `FNSEL` reader - Function Select"] -pub type FNSEL_R = crate::FieldReader; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Function Select\n\nValue on reset: 12"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FNSEL_A { +pub enum Fnsel { #[doc = "0: Logical 0"] - LOGICAL_ZERO = 0, + LogicalZero = 0, #[doc = "1: A NOR B"] - A_NOR_B = 1, + ANorB = 1, #[doc = "2: (!A) AND B"] - NOT_A_AND_B = 2, + NotAAndB = 2, #[doc = "3: !A"] - NOT_A = 3, + NotA = 3, #[doc = "4: A AND (!B)"] - A_AND_NOT_B = 4, + AAndNotB = 4, #[doc = "5: !B"] - NOT_B = 5, + NotB = 5, #[doc = "6: A XOR B"] - A_XOR_B = 6, + AXorB = 6, #[doc = "7: A NAND B"] - A_NAND_B = 7, + ANandB = 7, #[doc = "8: A AND B"] - A_AND_B = 8, + AAndB = 8, #[doc = "9: A XNOR B"] - A_XNOR_B = 9, + AXnorB = 9, #[doc = "10: B"] B = 10, #[doc = "11: (!A) OR B"] - NOT_A_OR_B = 11, + NotAOrB = 11, #[doc = "12: A"] A = 12, #[doc = "13: A OR (!B)"] - A_OR_NOT_B = 13, + AOrNotB = 13, #[doc = "14: A OR B"] - A_OR_B = 14, + AOrB = 14, #[doc = "15: Logical 1"] - LOGICAL_ONE = 15, + LogicalOne = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FNSEL_A) -> Self { + fn from(variant: Fnsel) -> Self { variant as _ } } -impl FNSEL_R { +impl crate::FieldSpec for Fnsel { + type Ux = u8; +} +impl crate::IsEnum for Fnsel {} +#[doc = "Field `FNSEL` reader - Function Select"] +pub type FnselR = crate::FieldReader; +impl FnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FNSEL_A { + pub const fn variant(&self) -> Fnsel { match self.bits { - 0 => FNSEL_A::LOGICAL_ZERO, - 1 => FNSEL_A::A_NOR_B, - 2 => FNSEL_A::NOT_A_AND_B, - 3 => FNSEL_A::NOT_A, - 4 => FNSEL_A::A_AND_NOT_B, - 5 => FNSEL_A::NOT_B, - 6 => FNSEL_A::A_XOR_B, - 7 => FNSEL_A::A_NAND_B, - 8 => FNSEL_A::A_AND_B, - 9 => FNSEL_A::A_XNOR_B, - 10 => FNSEL_A::B, - 11 => FNSEL_A::NOT_A_OR_B, - 12 => FNSEL_A::A, - 13 => FNSEL_A::A_OR_NOT_B, - 14 => FNSEL_A::A_OR_B, - 15 => FNSEL_A::LOGICAL_ONE, + 0 => Fnsel::LogicalZero, + 1 => Fnsel::ANorB, + 2 => Fnsel::NotAAndB, + 3 => Fnsel::NotA, + 4 => Fnsel::AAndNotB, + 5 => Fnsel::NotB, + 6 => Fnsel::AXorB, + 7 => Fnsel::ANandB, + 8 => Fnsel::AAndB, + 9 => Fnsel::AXnorB, + 10 => Fnsel::B, + 11 => Fnsel::NotAOrB, + 12 => Fnsel::A, + 13 => Fnsel::AOrNotB, + 14 => Fnsel::AOrB, + 15 => Fnsel::LogicalOne, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LOGICAL_ZERO`"] + #[doc = "Logical 0"] #[inline(always)] pub fn is_logical_zero(&self) -> bool { - *self == FNSEL_A::LOGICAL_ZERO + *self == Fnsel::LogicalZero } - #[doc = "Checks if the value of the field is `A_NOR_B`"] + #[doc = "A NOR B"] #[inline(always)] pub fn is_a_nor_b(&self) -> bool { - *self == FNSEL_A::A_NOR_B + *self == Fnsel::ANorB } - #[doc = "Checks if the value of the field is `NOT_A_AND_B`"] + #[doc = "(!A) AND B"] #[inline(always)] pub fn is_not_a_and_b(&self) -> bool { - *self == FNSEL_A::NOT_A_AND_B + *self == Fnsel::NotAAndB } - #[doc = "Checks if the value of the field is `NOT_A`"] + #[doc = "!A"] #[inline(always)] pub fn is_not_a(&self) -> bool { - *self == FNSEL_A::NOT_A + *self == Fnsel::NotA } - #[doc = "Checks if the value of the field is `A_AND_NOT_B`"] + #[doc = "A AND (!B)"] #[inline(always)] pub fn is_a_and_not_b(&self) -> bool { - *self == FNSEL_A::A_AND_NOT_B + *self == Fnsel::AAndNotB } - #[doc = "Checks if the value of the field is `NOT_B`"] + #[doc = "!B"] #[inline(always)] pub fn is_not_b(&self) -> bool { - *self == FNSEL_A::NOT_B + *self == Fnsel::NotB } - #[doc = "Checks if the value of the field is `A_XOR_B`"] + #[doc = "A XOR B"] #[inline(always)] pub fn is_a_xor_b(&self) -> bool { - *self == FNSEL_A::A_XOR_B + *self == Fnsel::AXorB } - #[doc = "Checks if the value of the field is `A_NAND_B`"] + #[doc = "A NAND B"] #[inline(always)] pub fn is_a_nand_b(&self) -> bool { - *self == FNSEL_A::A_NAND_B + *self == Fnsel::ANandB } - #[doc = "Checks if the value of the field is `A_AND_B`"] + #[doc = "A AND B"] #[inline(always)] pub fn is_a_and_b(&self) -> bool { - *self == FNSEL_A::A_AND_B + *self == Fnsel::AAndB } - #[doc = "Checks if the value of the field is `A_XNOR_B`"] + #[doc = "A XNOR B"] #[inline(always)] pub fn is_a_xnor_b(&self) -> bool { - *self == FNSEL_A::A_XNOR_B + *self == Fnsel::AXnorB } - #[doc = "Checks if the value of the field is `B`"] + #[doc = "B"] #[inline(always)] pub fn is_b(&self) -> bool { - *self == FNSEL_A::B + *self == Fnsel::B } - #[doc = "Checks if the value of the field is `NOT_A_OR_B`"] + #[doc = "(!A) OR B"] #[inline(always)] pub fn is_not_a_or_b(&self) -> bool { - *self == FNSEL_A::NOT_A_OR_B + *self == Fnsel::NotAOrB } - #[doc = "Checks if the value of the field is `A`"] + #[doc = "A"] #[inline(always)] pub fn is_a(&self) -> bool { - *self == FNSEL_A::A + *self == Fnsel::A } - #[doc = "Checks if the value of the field is `A_OR_NOT_B`"] + #[doc = "A OR (!B)"] #[inline(always)] pub fn is_a_or_not_b(&self) -> bool { - *self == FNSEL_A::A_OR_NOT_B + *self == Fnsel::AOrNotB } - #[doc = "Checks if the value of the field is `A_OR_B`"] + #[doc = "A OR B"] #[inline(always)] pub fn is_a_or_b(&self) -> bool { - *self == FNSEL_A::A_OR_B + *self == Fnsel::AOrB } - #[doc = "Checks if the value of the field is `LOGICAL_ONE`"] + #[doc = "Logical 1"] #[inline(always)] pub fn is_logical_one(&self) -> bool { - *self == FNSEL_A::LOGICAL_ONE + *self == Fnsel::LogicalOne } } #[doc = "Field `FNSEL` writer - Function Select"] -pub type FNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, ASYNC_CH3_CTRL_SPEC, u8, FNSEL_A, 4, O>; -impl<'a, const O: u8> FNSEL_W<'a, O> { +pub type FnselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Fnsel, crate::Safe>; +impl<'a, REG> FnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Logical 0"] #[inline(always)] - pub fn logical_zero(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ZERO) + pub fn logical_zero(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalZero) } #[doc = "A NOR B"] #[inline(always)] - pub fn a_nor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NOR_B) + pub fn a_nor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANorB) } #[doc = "(!A) AND B"] #[inline(always)] - pub fn not_a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_AND_B) + pub fn not_a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAAndB) } #[doc = "!A"] #[inline(always)] - pub fn not_a(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A) + pub fn not_a(self) -> &'a mut crate::W { + self.variant(Fnsel::NotA) } #[doc = "A AND (!B)"] #[inline(always)] - pub fn a_and_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_NOT_B) + pub fn a_and_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndNotB) } #[doc = "!B"] #[inline(always)] - pub fn not_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_B) + pub fn not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotB) } #[doc = "A XOR B"] #[inline(always)] - pub fn a_xor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XOR_B) + pub fn a_xor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXorB) } #[doc = "A NAND B"] #[inline(always)] - pub fn a_nand_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NAND_B) + pub fn a_nand_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANandB) } #[doc = "A AND B"] #[inline(always)] - pub fn a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_B) + pub fn a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndB) } #[doc = "A XNOR B"] #[inline(always)] - pub fn a_xnor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XNOR_B) + pub fn a_xnor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXnorB) } #[doc = "B"] #[inline(always)] - pub fn b(self) -> &'a mut W { - self.variant(FNSEL_A::B) + pub fn b(self) -> &'a mut crate::W { + self.variant(Fnsel::B) } #[doc = "(!A) OR B"] #[inline(always)] - pub fn not_a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_OR_B) + pub fn not_a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAOrB) } #[doc = "A"] #[inline(always)] - pub fn a(self) -> &'a mut W { - self.variant(FNSEL_A::A) + pub fn a(self) -> &'a mut crate::W { + self.variant(Fnsel::A) } #[doc = "A OR (!B)"] #[inline(always)] - pub fn a_or_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_NOT_B) + pub fn a_or_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrNotB) } #[doc = "A OR B"] #[inline(always)] - pub fn a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_B) + pub fn a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrB) } #[doc = "Logical 1"] #[inline(always)] - pub fn logical_one(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ONE) + pub fn logical_one(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalOne) } } #[doc = "Field `AUXSEL` reader - Aux Select"] -pub type AUXSEL_R = crate::FieldReader; +pub type AuxselR = crate::FieldReader; #[doc = "Field `AUXSEL` writer - Aux Select"] -pub type AUXSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ASYNC_CH3_CTRL_SPEC, u8, u8, 4, O>; +pub type AuxselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] - pub fn fnsel(&self) -> FNSEL_R { - FNSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fnsel(&self) -> FnselR { + FnselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] - pub fn auxsel(&self) -> AUXSEL_R { - AUXSEL_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn auxsel(&self) -> AuxselR { + AuxselR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] #[must_use] - pub fn fnsel(&mut self) -> FNSEL_W<16> { - FNSEL_W::new(self) + pub fn fnsel(&mut self) -> FnselW { + FnselW::new(self, 16) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] #[must_use] - pub fn auxsel(&mut self) -> AUXSEL_W<24> { - AUXSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn auxsel(&mut self) -> AuxselW { + AuxselW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_ch3_ctrl](index.html) module"] -pub struct ASYNC_CH3_CTRL_SPEC; -impl crate::RegisterSpec for ASYNC_CH3_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch3_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch3_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncCh3CtrlSpec; +impl crate::RegisterSpec for AsyncCh3CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_ch3_ctrl::R](R) reader structure"] -impl crate::Readable for ASYNC_CH3_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [async_ch3_ctrl::W](W) writer structure"] -impl crate::Writable for ASYNC_CH3_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`async_ch3_ctrl::R`](R) reader structure"] +impl crate::Readable for AsyncCh3CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`async_ch3_ctrl::W`](W) writer structure"] +impl crate::Writable for AsyncCh3CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_CH3_CTRL to value 0x000c_0000"] -impl crate::Resettable for ASYNC_CH3_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x000c_0000; +impl crate::Resettable for AsyncCh3CtrlSpec { + const RESET_VALUE: u32 = 0x000c_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch4_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch4_ctrl.rs index 996c460..e8d4b50 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch4_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch4_ctrl.rs @@ -1,393 +1,366 @@ #[doc = "Register `ASYNC_CH4_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ASYNC_CH4_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH4_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH4_CTRL_SPEC, u8, u8, 7, O>; -#[doc = "Field `FNSEL` reader - Function Select"] -pub type FNSEL_R = crate::FieldReader; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Function Select\n\nValue on reset: 12"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FNSEL_A { +pub enum Fnsel { #[doc = "0: Logical 0"] - LOGICAL_ZERO = 0, + LogicalZero = 0, #[doc = "1: A NOR B"] - A_NOR_B = 1, + ANorB = 1, #[doc = "2: (!A) AND B"] - NOT_A_AND_B = 2, + NotAAndB = 2, #[doc = "3: !A"] - NOT_A = 3, + NotA = 3, #[doc = "4: A AND (!B)"] - A_AND_NOT_B = 4, + AAndNotB = 4, #[doc = "5: !B"] - NOT_B = 5, + NotB = 5, #[doc = "6: A XOR B"] - A_XOR_B = 6, + AXorB = 6, #[doc = "7: A NAND B"] - A_NAND_B = 7, + ANandB = 7, #[doc = "8: A AND B"] - A_AND_B = 8, + AAndB = 8, #[doc = "9: A XNOR B"] - A_XNOR_B = 9, + AXnorB = 9, #[doc = "10: B"] B = 10, #[doc = "11: (!A) OR B"] - NOT_A_OR_B = 11, + NotAOrB = 11, #[doc = "12: A"] A = 12, #[doc = "13: A OR (!B)"] - A_OR_NOT_B = 13, + AOrNotB = 13, #[doc = "14: A OR B"] - A_OR_B = 14, + AOrB = 14, #[doc = "15: Logical 1"] - LOGICAL_ONE = 15, + LogicalOne = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FNSEL_A) -> Self { + fn from(variant: Fnsel) -> Self { variant as _ } } -impl FNSEL_R { +impl crate::FieldSpec for Fnsel { + type Ux = u8; +} +impl crate::IsEnum for Fnsel {} +#[doc = "Field `FNSEL` reader - Function Select"] +pub type FnselR = crate::FieldReader; +impl FnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FNSEL_A { + pub const fn variant(&self) -> Fnsel { match self.bits { - 0 => FNSEL_A::LOGICAL_ZERO, - 1 => FNSEL_A::A_NOR_B, - 2 => FNSEL_A::NOT_A_AND_B, - 3 => FNSEL_A::NOT_A, - 4 => FNSEL_A::A_AND_NOT_B, - 5 => FNSEL_A::NOT_B, - 6 => FNSEL_A::A_XOR_B, - 7 => FNSEL_A::A_NAND_B, - 8 => FNSEL_A::A_AND_B, - 9 => FNSEL_A::A_XNOR_B, - 10 => FNSEL_A::B, - 11 => FNSEL_A::NOT_A_OR_B, - 12 => FNSEL_A::A, - 13 => FNSEL_A::A_OR_NOT_B, - 14 => FNSEL_A::A_OR_B, - 15 => FNSEL_A::LOGICAL_ONE, + 0 => Fnsel::LogicalZero, + 1 => Fnsel::ANorB, + 2 => Fnsel::NotAAndB, + 3 => Fnsel::NotA, + 4 => Fnsel::AAndNotB, + 5 => Fnsel::NotB, + 6 => Fnsel::AXorB, + 7 => Fnsel::ANandB, + 8 => Fnsel::AAndB, + 9 => Fnsel::AXnorB, + 10 => Fnsel::B, + 11 => Fnsel::NotAOrB, + 12 => Fnsel::A, + 13 => Fnsel::AOrNotB, + 14 => Fnsel::AOrB, + 15 => Fnsel::LogicalOne, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LOGICAL_ZERO`"] + #[doc = "Logical 0"] #[inline(always)] pub fn is_logical_zero(&self) -> bool { - *self == FNSEL_A::LOGICAL_ZERO + *self == Fnsel::LogicalZero } - #[doc = "Checks if the value of the field is `A_NOR_B`"] + #[doc = "A NOR B"] #[inline(always)] pub fn is_a_nor_b(&self) -> bool { - *self == FNSEL_A::A_NOR_B + *self == Fnsel::ANorB } - #[doc = "Checks if the value of the field is `NOT_A_AND_B`"] + #[doc = "(!A) AND B"] #[inline(always)] pub fn is_not_a_and_b(&self) -> bool { - *self == FNSEL_A::NOT_A_AND_B + *self == Fnsel::NotAAndB } - #[doc = "Checks if the value of the field is `NOT_A`"] + #[doc = "!A"] #[inline(always)] pub fn is_not_a(&self) -> bool { - *self == FNSEL_A::NOT_A + *self == Fnsel::NotA } - #[doc = "Checks if the value of the field is `A_AND_NOT_B`"] + #[doc = "A AND (!B)"] #[inline(always)] pub fn is_a_and_not_b(&self) -> bool { - *self == FNSEL_A::A_AND_NOT_B + *self == Fnsel::AAndNotB } - #[doc = "Checks if the value of the field is `NOT_B`"] + #[doc = "!B"] #[inline(always)] pub fn is_not_b(&self) -> bool { - *self == FNSEL_A::NOT_B + *self == Fnsel::NotB } - #[doc = "Checks if the value of the field is `A_XOR_B`"] + #[doc = "A XOR B"] #[inline(always)] pub fn is_a_xor_b(&self) -> bool { - *self == FNSEL_A::A_XOR_B + *self == Fnsel::AXorB } - #[doc = "Checks if the value of the field is `A_NAND_B`"] + #[doc = "A NAND B"] #[inline(always)] pub fn is_a_nand_b(&self) -> bool { - *self == FNSEL_A::A_NAND_B + *self == Fnsel::ANandB } - #[doc = "Checks if the value of the field is `A_AND_B`"] + #[doc = "A AND B"] #[inline(always)] pub fn is_a_and_b(&self) -> bool { - *self == FNSEL_A::A_AND_B + *self == Fnsel::AAndB } - #[doc = "Checks if the value of the field is `A_XNOR_B`"] + #[doc = "A XNOR B"] #[inline(always)] pub fn is_a_xnor_b(&self) -> bool { - *self == FNSEL_A::A_XNOR_B + *self == Fnsel::AXnorB } - #[doc = "Checks if the value of the field is `B`"] + #[doc = "B"] #[inline(always)] pub fn is_b(&self) -> bool { - *self == FNSEL_A::B + *self == Fnsel::B } - #[doc = "Checks if the value of the field is `NOT_A_OR_B`"] + #[doc = "(!A) OR B"] #[inline(always)] pub fn is_not_a_or_b(&self) -> bool { - *self == FNSEL_A::NOT_A_OR_B + *self == Fnsel::NotAOrB } - #[doc = "Checks if the value of the field is `A`"] + #[doc = "A"] #[inline(always)] pub fn is_a(&self) -> bool { - *self == FNSEL_A::A + *self == Fnsel::A } - #[doc = "Checks if the value of the field is `A_OR_NOT_B`"] + #[doc = "A OR (!B)"] #[inline(always)] pub fn is_a_or_not_b(&self) -> bool { - *self == FNSEL_A::A_OR_NOT_B + *self == Fnsel::AOrNotB } - #[doc = "Checks if the value of the field is `A_OR_B`"] + #[doc = "A OR B"] #[inline(always)] pub fn is_a_or_b(&self) -> bool { - *self == FNSEL_A::A_OR_B + *self == Fnsel::AOrB } - #[doc = "Checks if the value of the field is `LOGICAL_ONE`"] + #[doc = "Logical 1"] #[inline(always)] pub fn is_logical_one(&self) -> bool { - *self == FNSEL_A::LOGICAL_ONE + *self == Fnsel::LogicalOne } } #[doc = "Field `FNSEL` writer - Function Select"] -pub type FNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, ASYNC_CH4_CTRL_SPEC, u8, FNSEL_A, 4, O>; -impl<'a, const O: u8> FNSEL_W<'a, O> { +pub type FnselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Fnsel, crate::Safe>; +impl<'a, REG> FnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Logical 0"] #[inline(always)] - pub fn logical_zero(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ZERO) + pub fn logical_zero(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalZero) } #[doc = "A NOR B"] #[inline(always)] - pub fn a_nor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NOR_B) + pub fn a_nor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANorB) } #[doc = "(!A) AND B"] #[inline(always)] - pub fn not_a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_AND_B) + pub fn not_a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAAndB) } #[doc = "!A"] #[inline(always)] - pub fn not_a(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A) + pub fn not_a(self) -> &'a mut crate::W { + self.variant(Fnsel::NotA) } #[doc = "A AND (!B)"] #[inline(always)] - pub fn a_and_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_NOT_B) + pub fn a_and_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndNotB) } #[doc = "!B"] #[inline(always)] - pub fn not_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_B) + pub fn not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotB) } #[doc = "A XOR B"] #[inline(always)] - pub fn a_xor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XOR_B) + pub fn a_xor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXorB) } #[doc = "A NAND B"] #[inline(always)] - pub fn a_nand_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NAND_B) + pub fn a_nand_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANandB) } #[doc = "A AND B"] #[inline(always)] - pub fn a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_B) + pub fn a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndB) } #[doc = "A XNOR B"] #[inline(always)] - pub fn a_xnor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XNOR_B) + pub fn a_xnor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXnorB) } #[doc = "B"] #[inline(always)] - pub fn b(self) -> &'a mut W { - self.variant(FNSEL_A::B) + pub fn b(self) -> &'a mut crate::W { + self.variant(Fnsel::B) } #[doc = "(!A) OR B"] #[inline(always)] - pub fn not_a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_OR_B) + pub fn not_a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAOrB) } #[doc = "A"] #[inline(always)] - pub fn a(self) -> &'a mut W { - self.variant(FNSEL_A::A) + pub fn a(self) -> &'a mut crate::W { + self.variant(Fnsel::A) } #[doc = "A OR (!B)"] #[inline(always)] - pub fn a_or_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_NOT_B) + pub fn a_or_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrNotB) } #[doc = "A OR B"] #[inline(always)] - pub fn a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_B) + pub fn a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrB) } #[doc = "Logical 1"] #[inline(always)] - pub fn logical_one(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ONE) + pub fn logical_one(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalOne) } } #[doc = "Field `AUXSEL` reader - Aux Select"] -pub type AUXSEL_R = crate::FieldReader; +pub type AuxselR = crate::FieldReader; #[doc = "Field `AUXSEL` writer - Aux Select"] -pub type AUXSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ASYNC_CH4_CTRL_SPEC, u8, u8, 4, O>; +pub type AuxselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] - pub fn fnsel(&self) -> FNSEL_R { - FNSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fnsel(&self) -> FnselR { + FnselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] - pub fn auxsel(&self) -> AUXSEL_R { - AUXSEL_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn auxsel(&self) -> AuxselR { + AuxselR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] #[must_use] - pub fn fnsel(&mut self) -> FNSEL_W<16> { - FNSEL_W::new(self) + pub fn fnsel(&mut self) -> FnselW { + FnselW::new(self, 16) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] #[must_use] - pub fn auxsel(&mut self) -> AUXSEL_W<24> { - AUXSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn auxsel(&mut self) -> AuxselW { + AuxselW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_ch4_ctrl](index.html) module"] -pub struct ASYNC_CH4_CTRL_SPEC; -impl crate::RegisterSpec for ASYNC_CH4_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch4_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch4_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncCh4CtrlSpec; +impl crate::RegisterSpec for AsyncCh4CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_ch4_ctrl::R](R) reader structure"] -impl crate::Readable for ASYNC_CH4_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [async_ch4_ctrl::W](W) writer structure"] -impl crate::Writable for ASYNC_CH4_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`async_ch4_ctrl::R`](R) reader structure"] +impl crate::Readable for AsyncCh4CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`async_ch4_ctrl::W`](W) writer structure"] +impl crate::Writable for AsyncCh4CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_CH4_CTRL to value 0x000c_0000"] -impl crate::Resettable for ASYNC_CH4_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x000c_0000; +impl crate::Resettable for AsyncCh4CtrlSpec { + const RESET_VALUE: u32 = 0x000c_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch5_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch5_ctrl.rs index f312297..7de5853 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch5_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch5_ctrl.rs @@ -1,393 +1,366 @@ #[doc = "Register `ASYNC_CH5_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ASYNC_CH5_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH5_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH5_CTRL_SPEC, u8, u8, 7, O>; -#[doc = "Field `FNSEL` reader - Function Select"] -pub type FNSEL_R = crate::FieldReader; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Function Select\n\nValue on reset: 12"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FNSEL_A { +pub enum Fnsel { #[doc = "0: Logical 0"] - LOGICAL_ZERO = 0, + LogicalZero = 0, #[doc = "1: A NOR B"] - A_NOR_B = 1, + ANorB = 1, #[doc = "2: (!A) AND B"] - NOT_A_AND_B = 2, + NotAAndB = 2, #[doc = "3: !A"] - NOT_A = 3, + NotA = 3, #[doc = "4: A AND (!B)"] - A_AND_NOT_B = 4, + AAndNotB = 4, #[doc = "5: !B"] - NOT_B = 5, + NotB = 5, #[doc = "6: A XOR B"] - A_XOR_B = 6, + AXorB = 6, #[doc = "7: A NAND B"] - A_NAND_B = 7, + ANandB = 7, #[doc = "8: A AND B"] - A_AND_B = 8, + AAndB = 8, #[doc = "9: A XNOR B"] - A_XNOR_B = 9, + AXnorB = 9, #[doc = "10: B"] B = 10, #[doc = "11: (!A) OR B"] - NOT_A_OR_B = 11, + NotAOrB = 11, #[doc = "12: A"] A = 12, #[doc = "13: A OR (!B)"] - A_OR_NOT_B = 13, + AOrNotB = 13, #[doc = "14: A OR B"] - A_OR_B = 14, + AOrB = 14, #[doc = "15: Logical 1"] - LOGICAL_ONE = 15, + LogicalOne = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FNSEL_A) -> Self { + fn from(variant: Fnsel) -> Self { variant as _ } } -impl FNSEL_R { +impl crate::FieldSpec for Fnsel { + type Ux = u8; +} +impl crate::IsEnum for Fnsel {} +#[doc = "Field `FNSEL` reader - Function Select"] +pub type FnselR = crate::FieldReader; +impl FnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FNSEL_A { + pub const fn variant(&self) -> Fnsel { match self.bits { - 0 => FNSEL_A::LOGICAL_ZERO, - 1 => FNSEL_A::A_NOR_B, - 2 => FNSEL_A::NOT_A_AND_B, - 3 => FNSEL_A::NOT_A, - 4 => FNSEL_A::A_AND_NOT_B, - 5 => FNSEL_A::NOT_B, - 6 => FNSEL_A::A_XOR_B, - 7 => FNSEL_A::A_NAND_B, - 8 => FNSEL_A::A_AND_B, - 9 => FNSEL_A::A_XNOR_B, - 10 => FNSEL_A::B, - 11 => FNSEL_A::NOT_A_OR_B, - 12 => FNSEL_A::A, - 13 => FNSEL_A::A_OR_NOT_B, - 14 => FNSEL_A::A_OR_B, - 15 => FNSEL_A::LOGICAL_ONE, + 0 => Fnsel::LogicalZero, + 1 => Fnsel::ANorB, + 2 => Fnsel::NotAAndB, + 3 => Fnsel::NotA, + 4 => Fnsel::AAndNotB, + 5 => Fnsel::NotB, + 6 => Fnsel::AXorB, + 7 => Fnsel::ANandB, + 8 => Fnsel::AAndB, + 9 => Fnsel::AXnorB, + 10 => Fnsel::B, + 11 => Fnsel::NotAOrB, + 12 => Fnsel::A, + 13 => Fnsel::AOrNotB, + 14 => Fnsel::AOrB, + 15 => Fnsel::LogicalOne, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LOGICAL_ZERO`"] + #[doc = "Logical 0"] #[inline(always)] pub fn is_logical_zero(&self) -> bool { - *self == FNSEL_A::LOGICAL_ZERO + *self == Fnsel::LogicalZero } - #[doc = "Checks if the value of the field is `A_NOR_B`"] + #[doc = "A NOR B"] #[inline(always)] pub fn is_a_nor_b(&self) -> bool { - *self == FNSEL_A::A_NOR_B + *self == Fnsel::ANorB } - #[doc = "Checks if the value of the field is `NOT_A_AND_B`"] + #[doc = "(!A) AND B"] #[inline(always)] pub fn is_not_a_and_b(&self) -> bool { - *self == FNSEL_A::NOT_A_AND_B + *self == Fnsel::NotAAndB } - #[doc = "Checks if the value of the field is `NOT_A`"] + #[doc = "!A"] #[inline(always)] pub fn is_not_a(&self) -> bool { - *self == FNSEL_A::NOT_A + *self == Fnsel::NotA } - #[doc = "Checks if the value of the field is `A_AND_NOT_B`"] + #[doc = "A AND (!B)"] #[inline(always)] pub fn is_a_and_not_b(&self) -> bool { - *self == FNSEL_A::A_AND_NOT_B + *self == Fnsel::AAndNotB } - #[doc = "Checks if the value of the field is `NOT_B`"] + #[doc = "!B"] #[inline(always)] pub fn is_not_b(&self) -> bool { - *self == FNSEL_A::NOT_B + *self == Fnsel::NotB } - #[doc = "Checks if the value of the field is `A_XOR_B`"] + #[doc = "A XOR B"] #[inline(always)] pub fn is_a_xor_b(&self) -> bool { - *self == FNSEL_A::A_XOR_B + *self == Fnsel::AXorB } - #[doc = "Checks if the value of the field is `A_NAND_B`"] + #[doc = "A NAND B"] #[inline(always)] pub fn is_a_nand_b(&self) -> bool { - *self == FNSEL_A::A_NAND_B + *self == Fnsel::ANandB } - #[doc = "Checks if the value of the field is `A_AND_B`"] + #[doc = "A AND B"] #[inline(always)] pub fn is_a_and_b(&self) -> bool { - *self == FNSEL_A::A_AND_B + *self == Fnsel::AAndB } - #[doc = "Checks if the value of the field is `A_XNOR_B`"] + #[doc = "A XNOR B"] #[inline(always)] pub fn is_a_xnor_b(&self) -> bool { - *self == FNSEL_A::A_XNOR_B + *self == Fnsel::AXnorB } - #[doc = "Checks if the value of the field is `B`"] + #[doc = "B"] #[inline(always)] pub fn is_b(&self) -> bool { - *self == FNSEL_A::B + *self == Fnsel::B } - #[doc = "Checks if the value of the field is `NOT_A_OR_B`"] + #[doc = "(!A) OR B"] #[inline(always)] pub fn is_not_a_or_b(&self) -> bool { - *self == FNSEL_A::NOT_A_OR_B + *self == Fnsel::NotAOrB } - #[doc = "Checks if the value of the field is `A`"] + #[doc = "A"] #[inline(always)] pub fn is_a(&self) -> bool { - *self == FNSEL_A::A + *self == Fnsel::A } - #[doc = "Checks if the value of the field is `A_OR_NOT_B`"] + #[doc = "A OR (!B)"] #[inline(always)] pub fn is_a_or_not_b(&self) -> bool { - *self == FNSEL_A::A_OR_NOT_B + *self == Fnsel::AOrNotB } - #[doc = "Checks if the value of the field is `A_OR_B`"] + #[doc = "A OR B"] #[inline(always)] pub fn is_a_or_b(&self) -> bool { - *self == FNSEL_A::A_OR_B + *self == Fnsel::AOrB } - #[doc = "Checks if the value of the field is `LOGICAL_ONE`"] + #[doc = "Logical 1"] #[inline(always)] pub fn is_logical_one(&self) -> bool { - *self == FNSEL_A::LOGICAL_ONE + *self == Fnsel::LogicalOne } } #[doc = "Field `FNSEL` writer - Function Select"] -pub type FNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, ASYNC_CH5_CTRL_SPEC, u8, FNSEL_A, 4, O>; -impl<'a, const O: u8> FNSEL_W<'a, O> { +pub type FnselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Fnsel, crate::Safe>; +impl<'a, REG> FnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Logical 0"] #[inline(always)] - pub fn logical_zero(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ZERO) + pub fn logical_zero(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalZero) } #[doc = "A NOR B"] #[inline(always)] - pub fn a_nor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NOR_B) + pub fn a_nor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANorB) } #[doc = "(!A) AND B"] #[inline(always)] - pub fn not_a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_AND_B) + pub fn not_a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAAndB) } #[doc = "!A"] #[inline(always)] - pub fn not_a(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A) + pub fn not_a(self) -> &'a mut crate::W { + self.variant(Fnsel::NotA) } #[doc = "A AND (!B)"] #[inline(always)] - pub fn a_and_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_NOT_B) + pub fn a_and_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndNotB) } #[doc = "!B"] #[inline(always)] - pub fn not_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_B) + pub fn not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotB) } #[doc = "A XOR B"] #[inline(always)] - pub fn a_xor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XOR_B) + pub fn a_xor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXorB) } #[doc = "A NAND B"] #[inline(always)] - pub fn a_nand_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NAND_B) + pub fn a_nand_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANandB) } #[doc = "A AND B"] #[inline(always)] - pub fn a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_B) + pub fn a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndB) } #[doc = "A XNOR B"] #[inline(always)] - pub fn a_xnor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XNOR_B) + pub fn a_xnor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXnorB) } #[doc = "B"] #[inline(always)] - pub fn b(self) -> &'a mut W { - self.variant(FNSEL_A::B) + pub fn b(self) -> &'a mut crate::W { + self.variant(Fnsel::B) } #[doc = "(!A) OR B"] #[inline(always)] - pub fn not_a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_OR_B) + pub fn not_a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAOrB) } #[doc = "A"] #[inline(always)] - pub fn a(self) -> &'a mut W { - self.variant(FNSEL_A::A) + pub fn a(self) -> &'a mut crate::W { + self.variant(Fnsel::A) } #[doc = "A OR (!B)"] #[inline(always)] - pub fn a_or_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_NOT_B) + pub fn a_or_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrNotB) } #[doc = "A OR B"] #[inline(always)] - pub fn a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_B) + pub fn a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrB) } #[doc = "Logical 1"] #[inline(always)] - pub fn logical_one(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ONE) + pub fn logical_one(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalOne) } } #[doc = "Field `AUXSEL` reader - Aux Select"] -pub type AUXSEL_R = crate::FieldReader; +pub type AuxselR = crate::FieldReader; #[doc = "Field `AUXSEL` writer - Aux Select"] -pub type AUXSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ASYNC_CH5_CTRL_SPEC, u8, u8, 4, O>; +pub type AuxselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] - pub fn fnsel(&self) -> FNSEL_R { - FNSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fnsel(&self) -> FnselR { + FnselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] - pub fn auxsel(&self) -> AUXSEL_R { - AUXSEL_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn auxsel(&self) -> AuxselR { + AuxselR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] #[must_use] - pub fn fnsel(&mut self) -> FNSEL_W<16> { - FNSEL_W::new(self) + pub fn fnsel(&mut self) -> FnselW { + FnselW::new(self, 16) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] #[must_use] - pub fn auxsel(&mut self) -> AUXSEL_W<24> { - AUXSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn auxsel(&mut self) -> AuxselW { + AuxselW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_ch5_ctrl](index.html) module"] -pub struct ASYNC_CH5_CTRL_SPEC; -impl crate::RegisterSpec for ASYNC_CH5_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch5_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch5_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncCh5CtrlSpec; +impl crate::RegisterSpec for AsyncCh5CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_ch5_ctrl::R](R) reader structure"] -impl crate::Readable for ASYNC_CH5_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [async_ch5_ctrl::W](W) writer structure"] -impl crate::Writable for ASYNC_CH5_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`async_ch5_ctrl::R`](R) reader structure"] +impl crate::Readable for AsyncCh5CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`async_ch5_ctrl::W`](W) writer structure"] +impl crate::Writable for AsyncCh5CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_CH5_CTRL to value 0x000c_0000"] -impl crate::Resettable for ASYNC_CH5_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x000c_0000; +impl crate::Resettable for AsyncCh5CtrlSpec { + const RESET_VALUE: u32 = 0x000c_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch6_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch6_ctrl.rs index 53af2c2..84c188e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch6_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch6_ctrl.rs @@ -1,393 +1,366 @@ #[doc = "Register `ASYNC_CH6_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ASYNC_CH6_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH6_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH6_CTRL_SPEC, u8, u8, 7, O>; -#[doc = "Field `FNSEL` reader - Function Select"] -pub type FNSEL_R = crate::FieldReader; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Function Select\n\nValue on reset: 12"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FNSEL_A { +pub enum Fnsel { #[doc = "0: Logical 0"] - LOGICAL_ZERO = 0, + LogicalZero = 0, #[doc = "1: A NOR B"] - A_NOR_B = 1, + ANorB = 1, #[doc = "2: (!A) AND B"] - NOT_A_AND_B = 2, + NotAAndB = 2, #[doc = "3: !A"] - NOT_A = 3, + NotA = 3, #[doc = "4: A AND (!B)"] - A_AND_NOT_B = 4, + AAndNotB = 4, #[doc = "5: !B"] - NOT_B = 5, + NotB = 5, #[doc = "6: A XOR B"] - A_XOR_B = 6, + AXorB = 6, #[doc = "7: A NAND B"] - A_NAND_B = 7, + ANandB = 7, #[doc = "8: A AND B"] - A_AND_B = 8, + AAndB = 8, #[doc = "9: A XNOR B"] - A_XNOR_B = 9, + AXnorB = 9, #[doc = "10: B"] B = 10, #[doc = "11: (!A) OR B"] - NOT_A_OR_B = 11, + NotAOrB = 11, #[doc = "12: A"] A = 12, #[doc = "13: A OR (!B)"] - A_OR_NOT_B = 13, + AOrNotB = 13, #[doc = "14: A OR B"] - A_OR_B = 14, + AOrB = 14, #[doc = "15: Logical 1"] - LOGICAL_ONE = 15, + LogicalOne = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FNSEL_A) -> Self { + fn from(variant: Fnsel) -> Self { variant as _ } } -impl FNSEL_R { +impl crate::FieldSpec for Fnsel { + type Ux = u8; +} +impl crate::IsEnum for Fnsel {} +#[doc = "Field `FNSEL` reader - Function Select"] +pub type FnselR = crate::FieldReader; +impl FnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FNSEL_A { + pub const fn variant(&self) -> Fnsel { match self.bits { - 0 => FNSEL_A::LOGICAL_ZERO, - 1 => FNSEL_A::A_NOR_B, - 2 => FNSEL_A::NOT_A_AND_B, - 3 => FNSEL_A::NOT_A, - 4 => FNSEL_A::A_AND_NOT_B, - 5 => FNSEL_A::NOT_B, - 6 => FNSEL_A::A_XOR_B, - 7 => FNSEL_A::A_NAND_B, - 8 => FNSEL_A::A_AND_B, - 9 => FNSEL_A::A_XNOR_B, - 10 => FNSEL_A::B, - 11 => FNSEL_A::NOT_A_OR_B, - 12 => FNSEL_A::A, - 13 => FNSEL_A::A_OR_NOT_B, - 14 => FNSEL_A::A_OR_B, - 15 => FNSEL_A::LOGICAL_ONE, + 0 => Fnsel::LogicalZero, + 1 => Fnsel::ANorB, + 2 => Fnsel::NotAAndB, + 3 => Fnsel::NotA, + 4 => Fnsel::AAndNotB, + 5 => Fnsel::NotB, + 6 => Fnsel::AXorB, + 7 => Fnsel::ANandB, + 8 => Fnsel::AAndB, + 9 => Fnsel::AXnorB, + 10 => Fnsel::B, + 11 => Fnsel::NotAOrB, + 12 => Fnsel::A, + 13 => Fnsel::AOrNotB, + 14 => Fnsel::AOrB, + 15 => Fnsel::LogicalOne, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LOGICAL_ZERO`"] + #[doc = "Logical 0"] #[inline(always)] pub fn is_logical_zero(&self) -> bool { - *self == FNSEL_A::LOGICAL_ZERO + *self == Fnsel::LogicalZero } - #[doc = "Checks if the value of the field is `A_NOR_B`"] + #[doc = "A NOR B"] #[inline(always)] pub fn is_a_nor_b(&self) -> bool { - *self == FNSEL_A::A_NOR_B + *self == Fnsel::ANorB } - #[doc = "Checks if the value of the field is `NOT_A_AND_B`"] + #[doc = "(!A) AND B"] #[inline(always)] pub fn is_not_a_and_b(&self) -> bool { - *self == FNSEL_A::NOT_A_AND_B + *self == Fnsel::NotAAndB } - #[doc = "Checks if the value of the field is `NOT_A`"] + #[doc = "!A"] #[inline(always)] pub fn is_not_a(&self) -> bool { - *self == FNSEL_A::NOT_A + *self == Fnsel::NotA } - #[doc = "Checks if the value of the field is `A_AND_NOT_B`"] + #[doc = "A AND (!B)"] #[inline(always)] pub fn is_a_and_not_b(&self) -> bool { - *self == FNSEL_A::A_AND_NOT_B + *self == Fnsel::AAndNotB } - #[doc = "Checks if the value of the field is `NOT_B`"] + #[doc = "!B"] #[inline(always)] pub fn is_not_b(&self) -> bool { - *self == FNSEL_A::NOT_B + *self == Fnsel::NotB } - #[doc = "Checks if the value of the field is `A_XOR_B`"] + #[doc = "A XOR B"] #[inline(always)] pub fn is_a_xor_b(&self) -> bool { - *self == FNSEL_A::A_XOR_B + *self == Fnsel::AXorB } - #[doc = "Checks if the value of the field is `A_NAND_B`"] + #[doc = "A NAND B"] #[inline(always)] pub fn is_a_nand_b(&self) -> bool { - *self == FNSEL_A::A_NAND_B + *self == Fnsel::ANandB } - #[doc = "Checks if the value of the field is `A_AND_B`"] + #[doc = "A AND B"] #[inline(always)] pub fn is_a_and_b(&self) -> bool { - *self == FNSEL_A::A_AND_B + *self == Fnsel::AAndB } - #[doc = "Checks if the value of the field is `A_XNOR_B`"] + #[doc = "A XNOR B"] #[inline(always)] pub fn is_a_xnor_b(&self) -> bool { - *self == FNSEL_A::A_XNOR_B + *self == Fnsel::AXnorB } - #[doc = "Checks if the value of the field is `B`"] + #[doc = "B"] #[inline(always)] pub fn is_b(&self) -> bool { - *self == FNSEL_A::B + *self == Fnsel::B } - #[doc = "Checks if the value of the field is `NOT_A_OR_B`"] + #[doc = "(!A) OR B"] #[inline(always)] pub fn is_not_a_or_b(&self) -> bool { - *self == FNSEL_A::NOT_A_OR_B + *self == Fnsel::NotAOrB } - #[doc = "Checks if the value of the field is `A`"] + #[doc = "A"] #[inline(always)] pub fn is_a(&self) -> bool { - *self == FNSEL_A::A + *self == Fnsel::A } - #[doc = "Checks if the value of the field is `A_OR_NOT_B`"] + #[doc = "A OR (!B)"] #[inline(always)] pub fn is_a_or_not_b(&self) -> bool { - *self == FNSEL_A::A_OR_NOT_B + *self == Fnsel::AOrNotB } - #[doc = "Checks if the value of the field is `A_OR_B`"] + #[doc = "A OR B"] #[inline(always)] pub fn is_a_or_b(&self) -> bool { - *self == FNSEL_A::A_OR_B + *self == Fnsel::AOrB } - #[doc = "Checks if the value of the field is `LOGICAL_ONE`"] + #[doc = "Logical 1"] #[inline(always)] pub fn is_logical_one(&self) -> bool { - *self == FNSEL_A::LOGICAL_ONE + *self == Fnsel::LogicalOne } } #[doc = "Field `FNSEL` writer - Function Select"] -pub type FNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, ASYNC_CH6_CTRL_SPEC, u8, FNSEL_A, 4, O>; -impl<'a, const O: u8> FNSEL_W<'a, O> { +pub type FnselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Fnsel, crate::Safe>; +impl<'a, REG> FnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Logical 0"] #[inline(always)] - pub fn logical_zero(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ZERO) + pub fn logical_zero(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalZero) } #[doc = "A NOR B"] #[inline(always)] - pub fn a_nor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NOR_B) + pub fn a_nor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANorB) } #[doc = "(!A) AND B"] #[inline(always)] - pub fn not_a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_AND_B) + pub fn not_a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAAndB) } #[doc = "!A"] #[inline(always)] - pub fn not_a(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A) + pub fn not_a(self) -> &'a mut crate::W { + self.variant(Fnsel::NotA) } #[doc = "A AND (!B)"] #[inline(always)] - pub fn a_and_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_NOT_B) + pub fn a_and_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndNotB) } #[doc = "!B"] #[inline(always)] - pub fn not_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_B) + pub fn not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotB) } #[doc = "A XOR B"] #[inline(always)] - pub fn a_xor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XOR_B) + pub fn a_xor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXorB) } #[doc = "A NAND B"] #[inline(always)] - pub fn a_nand_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NAND_B) + pub fn a_nand_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANandB) } #[doc = "A AND B"] #[inline(always)] - pub fn a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_B) + pub fn a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndB) } #[doc = "A XNOR B"] #[inline(always)] - pub fn a_xnor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XNOR_B) + pub fn a_xnor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXnorB) } #[doc = "B"] #[inline(always)] - pub fn b(self) -> &'a mut W { - self.variant(FNSEL_A::B) + pub fn b(self) -> &'a mut crate::W { + self.variant(Fnsel::B) } #[doc = "(!A) OR B"] #[inline(always)] - pub fn not_a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_OR_B) + pub fn not_a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAOrB) } #[doc = "A"] #[inline(always)] - pub fn a(self) -> &'a mut W { - self.variant(FNSEL_A::A) + pub fn a(self) -> &'a mut crate::W { + self.variant(Fnsel::A) } #[doc = "A OR (!B)"] #[inline(always)] - pub fn a_or_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_NOT_B) + pub fn a_or_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrNotB) } #[doc = "A OR B"] #[inline(always)] - pub fn a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_B) + pub fn a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrB) } #[doc = "Logical 1"] #[inline(always)] - pub fn logical_one(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ONE) + pub fn logical_one(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalOne) } } #[doc = "Field `AUXSEL` reader - Aux Select"] -pub type AUXSEL_R = crate::FieldReader; +pub type AuxselR = crate::FieldReader; #[doc = "Field `AUXSEL` writer - Aux Select"] -pub type AUXSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ASYNC_CH6_CTRL_SPEC, u8, u8, 4, O>; +pub type AuxselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] - pub fn fnsel(&self) -> FNSEL_R { - FNSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fnsel(&self) -> FnselR { + FnselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] - pub fn auxsel(&self) -> AUXSEL_R { - AUXSEL_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn auxsel(&self) -> AuxselR { + AuxselR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] #[must_use] - pub fn fnsel(&mut self) -> FNSEL_W<16> { - FNSEL_W::new(self) + pub fn fnsel(&mut self) -> FnselW { + FnselW::new(self, 16) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] #[must_use] - pub fn auxsel(&mut self) -> AUXSEL_W<24> { - AUXSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn auxsel(&mut self) -> AuxselW { + AuxselW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_ch6_ctrl](index.html) module"] -pub struct ASYNC_CH6_CTRL_SPEC; -impl crate::RegisterSpec for ASYNC_CH6_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch6_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch6_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncCh6CtrlSpec; +impl crate::RegisterSpec for AsyncCh6CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_ch6_ctrl::R](R) reader structure"] -impl crate::Readable for ASYNC_CH6_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [async_ch6_ctrl::W](W) writer structure"] -impl crate::Writable for ASYNC_CH6_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`async_ch6_ctrl::R`](R) reader structure"] +impl crate::Readable for AsyncCh6CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`async_ch6_ctrl::W`](W) writer structure"] +impl crate::Writable for AsyncCh6CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_CH6_CTRL to value 0x000c_0000"] -impl crate::Resettable for ASYNC_CH6_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x000c_0000; +impl crate::Resettable for AsyncCh6CtrlSpec { + const RESET_VALUE: u32 = 0x000c_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch7_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch7_ctrl.rs index cd9025f..ab12a10 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch7_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch7_ctrl.rs @@ -1,393 +1,366 @@ #[doc = "Register `ASYNC_CH7_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ASYNC_CH7_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH7_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH7_CTRL_SPEC, u8, u8, 7, O>; -#[doc = "Field `FNSEL` reader - Function Select"] -pub type FNSEL_R = crate::FieldReader; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Function Select\n\nValue on reset: 12"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FNSEL_A { +pub enum Fnsel { #[doc = "0: Logical 0"] - LOGICAL_ZERO = 0, + LogicalZero = 0, #[doc = "1: A NOR B"] - A_NOR_B = 1, + ANorB = 1, #[doc = "2: (!A) AND B"] - NOT_A_AND_B = 2, + NotAAndB = 2, #[doc = "3: !A"] - NOT_A = 3, + NotA = 3, #[doc = "4: A AND (!B)"] - A_AND_NOT_B = 4, + AAndNotB = 4, #[doc = "5: !B"] - NOT_B = 5, + NotB = 5, #[doc = "6: A XOR B"] - A_XOR_B = 6, + AXorB = 6, #[doc = "7: A NAND B"] - A_NAND_B = 7, + ANandB = 7, #[doc = "8: A AND B"] - A_AND_B = 8, + AAndB = 8, #[doc = "9: A XNOR B"] - A_XNOR_B = 9, + AXnorB = 9, #[doc = "10: B"] B = 10, #[doc = "11: (!A) OR B"] - NOT_A_OR_B = 11, + NotAOrB = 11, #[doc = "12: A"] A = 12, #[doc = "13: A OR (!B)"] - A_OR_NOT_B = 13, + AOrNotB = 13, #[doc = "14: A OR B"] - A_OR_B = 14, + AOrB = 14, #[doc = "15: Logical 1"] - LOGICAL_ONE = 15, + LogicalOne = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FNSEL_A) -> Self { + fn from(variant: Fnsel) -> Self { variant as _ } } -impl FNSEL_R { +impl crate::FieldSpec for Fnsel { + type Ux = u8; +} +impl crate::IsEnum for Fnsel {} +#[doc = "Field `FNSEL` reader - Function Select"] +pub type FnselR = crate::FieldReader; +impl FnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FNSEL_A { + pub const fn variant(&self) -> Fnsel { match self.bits { - 0 => FNSEL_A::LOGICAL_ZERO, - 1 => FNSEL_A::A_NOR_B, - 2 => FNSEL_A::NOT_A_AND_B, - 3 => FNSEL_A::NOT_A, - 4 => FNSEL_A::A_AND_NOT_B, - 5 => FNSEL_A::NOT_B, - 6 => FNSEL_A::A_XOR_B, - 7 => FNSEL_A::A_NAND_B, - 8 => FNSEL_A::A_AND_B, - 9 => FNSEL_A::A_XNOR_B, - 10 => FNSEL_A::B, - 11 => FNSEL_A::NOT_A_OR_B, - 12 => FNSEL_A::A, - 13 => FNSEL_A::A_OR_NOT_B, - 14 => FNSEL_A::A_OR_B, - 15 => FNSEL_A::LOGICAL_ONE, + 0 => Fnsel::LogicalZero, + 1 => Fnsel::ANorB, + 2 => Fnsel::NotAAndB, + 3 => Fnsel::NotA, + 4 => Fnsel::AAndNotB, + 5 => Fnsel::NotB, + 6 => Fnsel::AXorB, + 7 => Fnsel::ANandB, + 8 => Fnsel::AAndB, + 9 => Fnsel::AXnorB, + 10 => Fnsel::B, + 11 => Fnsel::NotAOrB, + 12 => Fnsel::A, + 13 => Fnsel::AOrNotB, + 14 => Fnsel::AOrB, + 15 => Fnsel::LogicalOne, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LOGICAL_ZERO`"] + #[doc = "Logical 0"] #[inline(always)] pub fn is_logical_zero(&self) -> bool { - *self == FNSEL_A::LOGICAL_ZERO + *self == Fnsel::LogicalZero } - #[doc = "Checks if the value of the field is `A_NOR_B`"] + #[doc = "A NOR B"] #[inline(always)] pub fn is_a_nor_b(&self) -> bool { - *self == FNSEL_A::A_NOR_B + *self == Fnsel::ANorB } - #[doc = "Checks if the value of the field is `NOT_A_AND_B`"] + #[doc = "(!A) AND B"] #[inline(always)] pub fn is_not_a_and_b(&self) -> bool { - *self == FNSEL_A::NOT_A_AND_B + *self == Fnsel::NotAAndB } - #[doc = "Checks if the value of the field is `NOT_A`"] + #[doc = "!A"] #[inline(always)] pub fn is_not_a(&self) -> bool { - *self == FNSEL_A::NOT_A + *self == Fnsel::NotA } - #[doc = "Checks if the value of the field is `A_AND_NOT_B`"] + #[doc = "A AND (!B)"] #[inline(always)] pub fn is_a_and_not_b(&self) -> bool { - *self == FNSEL_A::A_AND_NOT_B + *self == Fnsel::AAndNotB } - #[doc = "Checks if the value of the field is `NOT_B`"] + #[doc = "!B"] #[inline(always)] pub fn is_not_b(&self) -> bool { - *self == FNSEL_A::NOT_B + *self == Fnsel::NotB } - #[doc = "Checks if the value of the field is `A_XOR_B`"] + #[doc = "A XOR B"] #[inline(always)] pub fn is_a_xor_b(&self) -> bool { - *self == FNSEL_A::A_XOR_B + *self == Fnsel::AXorB } - #[doc = "Checks if the value of the field is `A_NAND_B`"] + #[doc = "A NAND B"] #[inline(always)] pub fn is_a_nand_b(&self) -> bool { - *self == FNSEL_A::A_NAND_B + *self == Fnsel::ANandB } - #[doc = "Checks if the value of the field is `A_AND_B`"] + #[doc = "A AND B"] #[inline(always)] pub fn is_a_and_b(&self) -> bool { - *self == FNSEL_A::A_AND_B + *self == Fnsel::AAndB } - #[doc = "Checks if the value of the field is `A_XNOR_B`"] + #[doc = "A XNOR B"] #[inline(always)] pub fn is_a_xnor_b(&self) -> bool { - *self == FNSEL_A::A_XNOR_B + *self == Fnsel::AXnorB } - #[doc = "Checks if the value of the field is `B`"] + #[doc = "B"] #[inline(always)] pub fn is_b(&self) -> bool { - *self == FNSEL_A::B + *self == Fnsel::B } - #[doc = "Checks if the value of the field is `NOT_A_OR_B`"] + #[doc = "(!A) OR B"] #[inline(always)] pub fn is_not_a_or_b(&self) -> bool { - *self == FNSEL_A::NOT_A_OR_B + *self == Fnsel::NotAOrB } - #[doc = "Checks if the value of the field is `A`"] + #[doc = "A"] #[inline(always)] pub fn is_a(&self) -> bool { - *self == FNSEL_A::A + *self == Fnsel::A } - #[doc = "Checks if the value of the field is `A_OR_NOT_B`"] + #[doc = "A OR (!B)"] #[inline(always)] pub fn is_a_or_not_b(&self) -> bool { - *self == FNSEL_A::A_OR_NOT_B + *self == Fnsel::AOrNotB } - #[doc = "Checks if the value of the field is `A_OR_B`"] + #[doc = "A OR B"] #[inline(always)] pub fn is_a_or_b(&self) -> bool { - *self == FNSEL_A::A_OR_B + *self == Fnsel::AOrB } - #[doc = "Checks if the value of the field is `LOGICAL_ONE`"] + #[doc = "Logical 1"] #[inline(always)] pub fn is_logical_one(&self) -> bool { - *self == FNSEL_A::LOGICAL_ONE + *self == Fnsel::LogicalOne } } #[doc = "Field `FNSEL` writer - Function Select"] -pub type FNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, ASYNC_CH7_CTRL_SPEC, u8, FNSEL_A, 4, O>; -impl<'a, const O: u8> FNSEL_W<'a, O> { +pub type FnselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Fnsel, crate::Safe>; +impl<'a, REG> FnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Logical 0"] #[inline(always)] - pub fn logical_zero(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ZERO) + pub fn logical_zero(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalZero) } #[doc = "A NOR B"] #[inline(always)] - pub fn a_nor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NOR_B) + pub fn a_nor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANorB) } #[doc = "(!A) AND B"] #[inline(always)] - pub fn not_a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_AND_B) + pub fn not_a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAAndB) } #[doc = "!A"] #[inline(always)] - pub fn not_a(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A) + pub fn not_a(self) -> &'a mut crate::W { + self.variant(Fnsel::NotA) } #[doc = "A AND (!B)"] #[inline(always)] - pub fn a_and_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_NOT_B) + pub fn a_and_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndNotB) } #[doc = "!B"] #[inline(always)] - pub fn not_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_B) + pub fn not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotB) } #[doc = "A XOR B"] #[inline(always)] - pub fn a_xor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XOR_B) + pub fn a_xor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXorB) } #[doc = "A NAND B"] #[inline(always)] - pub fn a_nand_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NAND_B) + pub fn a_nand_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANandB) } #[doc = "A AND B"] #[inline(always)] - pub fn a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_B) + pub fn a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndB) } #[doc = "A XNOR B"] #[inline(always)] - pub fn a_xnor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XNOR_B) + pub fn a_xnor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXnorB) } #[doc = "B"] #[inline(always)] - pub fn b(self) -> &'a mut W { - self.variant(FNSEL_A::B) + pub fn b(self) -> &'a mut crate::W { + self.variant(Fnsel::B) } #[doc = "(!A) OR B"] #[inline(always)] - pub fn not_a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_OR_B) + pub fn not_a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAOrB) } #[doc = "A"] #[inline(always)] - pub fn a(self) -> &'a mut W { - self.variant(FNSEL_A::A) + pub fn a(self) -> &'a mut crate::W { + self.variant(Fnsel::A) } #[doc = "A OR (!B)"] #[inline(always)] - pub fn a_or_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_NOT_B) + pub fn a_or_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrNotB) } #[doc = "A OR B"] #[inline(always)] - pub fn a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_B) + pub fn a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrB) } #[doc = "Logical 1"] #[inline(always)] - pub fn logical_one(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ONE) + pub fn logical_one(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalOne) } } #[doc = "Field `AUXSEL` reader - Aux Select"] -pub type AUXSEL_R = crate::FieldReader; +pub type AuxselR = crate::FieldReader; #[doc = "Field `AUXSEL` writer - Aux Select"] -pub type AUXSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ASYNC_CH7_CTRL_SPEC, u8, u8, 4, O>; +pub type AuxselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] - pub fn fnsel(&self) -> FNSEL_R { - FNSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fnsel(&self) -> FnselR { + FnselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] - pub fn auxsel(&self) -> AUXSEL_R { - AUXSEL_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn auxsel(&self) -> AuxselR { + AuxselR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] #[must_use] - pub fn fnsel(&mut self) -> FNSEL_W<16> { - FNSEL_W::new(self) + pub fn fnsel(&mut self) -> FnselW { + FnselW::new(self, 16) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] #[must_use] - pub fn auxsel(&mut self) -> AUXSEL_W<24> { - AUXSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn auxsel(&mut self) -> AuxselW { + AuxselW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_ch7_ctrl](index.html) module"] -pub struct ASYNC_CH7_CTRL_SPEC; -impl crate::RegisterSpec for ASYNC_CH7_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch7_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch7_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncCh7CtrlSpec; +impl crate::RegisterSpec for AsyncCh7CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_ch7_ctrl::R](R) reader structure"] -impl crate::Readable for ASYNC_CH7_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [async_ch7_ctrl::W](W) writer structure"] -impl crate::Writable for ASYNC_CH7_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`async_ch7_ctrl::R`](R) reader structure"] +impl crate::Readable for AsyncCh7CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`async_ch7_ctrl::W`](W) writer structure"] +impl crate::Writable for AsyncCh7CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_CH7_CTRL to value 0x000c_0000"] -impl crate::Resettable for ASYNC_CH7_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x000c_0000; +impl crate::Resettable for AsyncCh7CtrlSpec { + const RESET_VALUE: u32 = 0x000c_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch8_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch8_ctrl.rs index 4d03009..9e46eed 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch8_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch8_ctrl.rs @@ -1,393 +1,366 @@ #[doc = "Register `ASYNC_CH8_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ASYNC_CH8_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH8_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH8_CTRL_SPEC, u8, u8, 7, O>; -#[doc = "Field `FNSEL` reader - Function Select"] -pub type FNSEL_R = crate::FieldReader; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Function Select\n\nValue on reset: 12"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FNSEL_A { +pub enum Fnsel { #[doc = "0: Logical 0"] - LOGICAL_ZERO = 0, + LogicalZero = 0, #[doc = "1: A NOR B"] - A_NOR_B = 1, + ANorB = 1, #[doc = "2: (!A) AND B"] - NOT_A_AND_B = 2, + NotAAndB = 2, #[doc = "3: !A"] - NOT_A = 3, + NotA = 3, #[doc = "4: A AND (!B)"] - A_AND_NOT_B = 4, + AAndNotB = 4, #[doc = "5: !B"] - NOT_B = 5, + NotB = 5, #[doc = "6: A XOR B"] - A_XOR_B = 6, + AXorB = 6, #[doc = "7: A NAND B"] - A_NAND_B = 7, + ANandB = 7, #[doc = "8: A AND B"] - A_AND_B = 8, + AAndB = 8, #[doc = "9: A XNOR B"] - A_XNOR_B = 9, + AXnorB = 9, #[doc = "10: B"] B = 10, #[doc = "11: (!A) OR B"] - NOT_A_OR_B = 11, + NotAOrB = 11, #[doc = "12: A"] A = 12, #[doc = "13: A OR (!B)"] - A_OR_NOT_B = 13, + AOrNotB = 13, #[doc = "14: A OR B"] - A_OR_B = 14, + AOrB = 14, #[doc = "15: Logical 1"] - LOGICAL_ONE = 15, + LogicalOne = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FNSEL_A) -> Self { + fn from(variant: Fnsel) -> Self { variant as _ } } -impl FNSEL_R { +impl crate::FieldSpec for Fnsel { + type Ux = u8; +} +impl crate::IsEnum for Fnsel {} +#[doc = "Field `FNSEL` reader - Function Select"] +pub type FnselR = crate::FieldReader; +impl FnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FNSEL_A { + pub const fn variant(&self) -> Fnsel { match self.bits { - 0 => FNSEL_A::LOGICAL_ZERO, - 1 => FNSEL_A::A_NOR_B, - 2 => FNSEL_A::NOT_A_AND_B, - 3 => FNSEL_A::NOT_A, - 4 => FNSEL_A::A_AND_NOT_B, - 5 => FNSEL_A::NOT_B, - 6 => FNSEL_A::A_XOR_B, - 7 => FNSEL_A::A_NAND_B, - 8 => FNSEL_A::A_AND_B, - 9 => FNSEL_A::A_XNOR_B, - 10 => FNSEL_A::B, - 11 => FNSEL_A::NOT_A_OR_B, - 12 => FNSEL_A::A, - 13 => FNSEL_A::A_OR_NOT_B, - 14 => FNSEL_A::A_OR_B, - 15 => FNSEL_A::LOGICAL_ONE, + 0 => Fnsel::LogicalZero, + 1 => Fnsel::ANorB, + 2 => Fnsel::NotAAndB, + 3 => Fnsel::NotA, + 4 => Fnsel::AAndNotB, + 5 => Fnsel::NotB, + 6 => Fnsel::AXorB, + 7 => Fnsel::ANandB, + 8 => Fnsel::AAndB, + 9 => Fnsel::AXnorB, + 10 => Fnsel::B, + 11 => Fnsel::NotAOrB, + 12 => Fnsel::A, + 13 => Fnsel::AOrNotB, + 14 => Fnsel::AOrB, + 15 => Fnsel::LogicalOne, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LOGICAL_ZERO`"] + #[doc = "Logical 0"] #[inline(always)] pub fn is_logical_zero(&self) -> bool { - *self == FNSEL_A::LOGICAL_ZERO + *self == Fnsel::LogicalZero } - #[doc = "Checks if the value of the field is `A_NOR_B`"] + #[doc = "A NOR B"] #[inline(always)] pub fn is_a_nor_b(&self) -> bool { - *self == FNSEL_A::A_NOR_B + *self == Fnsel::ANorB } - #[doc = "Checks if the value of the field is `NOT_A_AND_B`"] + #[doc = "(!A) AND B"] #[inline(always)] pub fn is_not_a_and_b(&self) -> bool { - *self == FNSEL_A::NOT_A_AND_B + *self == Fnsel::NotAAndB } - #[doc = "Checks if the value of the field is `NOT_A`"] + #[doc = "!A"] #[inline(always)] pub fn is_not_a(&self) -> bool { - *self == FNSEL_A::NOT_A + *self == Fnsel::NotA } - #[doc = "Checks if the value of the field is `A_AND_NOT_B`"] + #[doc = "A AND (!B)"] #[inline(always)] pub fn is_a_and_not_b(&self) -> bool { - *self == FNSEL_A::A_AND_NOT_B + *self == Fnsel::AAndNotB } - #[doc = "Checks if the value of the field is `NOT_B`"] + #[doc = "!B"] #[inline(always)] pub fn is_not_b(&self) -> bool { - *self == FNSEL_A::NOT_B + *self == Fnsel::NotB } - #[doc = "Checks if the value of the field is `A_XOR_B`"] + #[doc = "A XOR B"] #[inline(always)] pub fn is_a_xor_b(&self) -> bool { - *self == FNSEL_A::A_XOR_B + *self == Fnsel::AXorB } - #[doc = "Checks if the value of the field is `A_NAND_B`"] + #[doc = "A NAND B"] #[inline(always)] pub fn is_a_nand_b(&self) -> bool { - *self == FNSEL_A::A_NAND_B + *self == Fnsel::ANandB } - #[doc = "Checks if the value of the field is `A_AND_B`"] + #[doc = "A AND B"] #[inline(always)] pub fn is_a_and_b(&self) -> bool { - *self == FNSEL_A::A_AND_B + *self == Fnsel::AAndB } - #[doc = "Checks if the value of the field is `A_XNOR_B`"] + #[doc = "A XNOR B"] #[inline(always)] pub fn is_a_xnor_b(&self) -> bool { - *self == FNSEL_A::A_XNOR_B + *self == Fnsel::AXnorB } - #[doc = "Checks if the value of the field is `B`"] + #[doc = "B"] #[inline(always)] pub fn is_b(&self) -> bool { - *self == FNSEL_A::B + *self == Fnsel::B } - #[doc = "Checks if the value of the field is `NOT_A_OR_B`"] + #[doc = "(!A) OR B"] #[inline(always)] pub fn is_not_a_or_b(&self) -> bool { - *self == FNSEL_A::NOT_A_OR_B + *self == Fnsel::NotAOrB } - #[doc = "Checks if the value of the field is `A`"] + #[doc = "A"] #[inline(always)] pub fn is_a(&self) -> bool { - *self == FNSEL_A::A + *self == Fnsel::A } - #[doc = "Checks if the value of the field is `A_OR_NOT_B`"] + #[doc = "A OR (!B)"] #[inline(always)] pub fn is_a_or_not_b(&self) -> bool { - *self == FNSEL_A::A_OR_NOT_B + *self == Fnsel::AOrNotB } - #[doc = "Checks if the value of the field is `A_OR_B`"] + #[doc = "A OR B"] #[inline(always)] pub fn is_a_or_b(&self) -> bool { - *self == FNSEL_A::A_OR_B + *self == Fnsel::AOrB } - #[doc = "Checks if the value of the field is `LOGICAL_ONE`"] + #[doc = "Logical 1"] #[inline(always)] pub fn is_logical_one(&self) -> bool { - *self == FNSEL_A::LOGICAL_ONE + *self == Fnsel::LogicalOne } } #[doc = "Field `FNSEL` writer - Function Select"] -pub type FNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, ASYNC_CH8_CTRL_SPEC, u8, FNSEL_A, 4, O>; -impl<'a, const O: u8> FNSEL_W<'a, O> { +pub type FnselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Fnsel, crate::Safe>; +impl<'a, REG> FnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Logical 0"] #[inline(always)] - pub fn logical_zero(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ZERO) + pub fn logical_zero(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalZero) } #[doc = "A NOR B"] #[inline(always)] - pub fn a_nor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NOR_B) + pub fn a_nor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANorB) } #[doc = "(!A) AND B"] #[inline(always)] - pub fn not_a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_AND_B) + pub fn not_a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAAndB) } #[doc = "!A"] #[inline(always)] - pub fn not_a(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A) + pub fn not_a(self) -> &'a mut crate::W { + self.variant(Fnsel::NotA) } #[doc = "A AND (!B)"] #[inline(always)] - pub fn a_and_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_NOT_B) + pub fn a_and_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndNotB) } #[doc = "!B"] #[inline(always)] - pub fn not_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_B) + pub fn not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotB) } #[doc = "A XOR B"] #[inline(always)] - pub fn a_xor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XOR_B) + pub fn a_xor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXorB) } #[doc = "A NAND B"] #[inline(always)] - pub fn a_nand_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NAND_B) + pub fn a_nand_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANandB) } #[doc = "A AND B"] #[inline(always)] - pub fn a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_B) + pub fn a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndB) } #[doc = "A XNOR B"] #[inline(always)] - pub fn a_xnor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XNOR_B) + pub fn a_xnor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXnorB) } #[doc = "B"] #[inline(always)] - pub fn b(self) -> &'a mut W { - self.variant(FNSEL_A::B) + pub fn b(self) -> &'a mut crate::W { + self.variant(Fnsel::B) } #[doc = "(!A) OR B"] #[inline(always)] - pub fn not_a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_OR_B) + pub fn not_a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAOrB) } #[doc = "A"] #[inline(always)] - pub fn a(self) -> &'a mut W { - self.variant(FNSEL_A::A) + pub fn a(self) -> &'a mut crate::W { + self.variant(Fnsel::A) } #[doc = "A OR (!B)"] #[inline(always)] - pub fn a_or_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_NOT_B) + pub fn a_or_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrNotB) } #[doc = "A OR B"] #[inline(always)] - pub fn a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_B) + pub fn a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrB) } #[doc = "Logical 1"] #[inline(always)] - pub fn logical_one(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ONE) + pub fn logical_one(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalOne) } } #[doc = "Field `AUXSEL` reader - Aux Select"] -pub type AUXSEL_R = crate::FieldReader; +pub type AuxselR = crate::FieldReader; #[doc = "Field `AUXSEL` writer - Aux Select"] -pub type AUXSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ASYNC_CH8_CTRL_SPEC, u8, u8, 4, O>; +pub type AuxselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] - pub fn fnsel(&self) -> FNSEL_R { - FNSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fnsel(&self) -> FnselR { + FnselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] - pub fn auxsel(&self) -> AUXSEL_R { - AUXSEL_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn auxsel(&self) -> AuxselR { + AuxselR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] #[must_use] - pub fn fnsel(&mut self) -> FNSEL_W<16> { - FNSEL_W::new(self) + pub fn fnsel(&mut self) -> FnselW { + FnselW::new(self, 16) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] #[must_use] - pub fn auxsel(&mut self) -> AUXSEL_W<24> { - AUXSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn auxsel(&mut self) -> AuxselW { + AuxselW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_ch8_ctrl](index.html) module"] -pub struct ASYNC_CH8_CTRL_SPEC; -impl crate::RegisterSpec for ASYNC_CH8_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch8_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch8_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncCh8CtrlSpec; +impl crate::RegisterSpec for AsyncCh8CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_ch8_ctrl::R](R) reader structure"] -impl crate::Readable for ASYNC_CH8_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [async_ch8_ctrl::W](W) writer structure"] -impl crate::Writable for ASYNC_CH8_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`async_ch8_ctrl::R`](R) reader structure"] +impl crate::Readable for AsyncCh8CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`async_ch8_ctrl::W`](W) writer structure"] +impl crate::Writable for AsyncCh8CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_CH8_CTRL to value 0x000c_0000"] -impl crate::Resettable for ASYNC_CH8_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x000c_0000; +impl crate::Resettable for AsyncCh8CtrlSpec { + const RESET_VALUE: u32 = 0x000c_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch9_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch9_ctrl.rs index 790310a..1c99810 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch9_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_ch9_ctrl.rs @@ -1,393 +1,366 @@ #[doc = "Register `ASYNC_CH9_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ASYNC_CH9_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH9_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ASYNC_CH9_CTRL_SPEC, u8, u8, 7, O>; -#[doc = "Field `FNSEL` reader - Function Select"] -pub type FNSEL_R = crate::FieldReader; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Function Select\n\nValue on reset: 12"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FNSEL_A { +pub enum Fnsel { #[doc = "0: Logical 0"] - LOGICAL_ZERO = 0, + LogicalZero = 0, #[doc = "1: A NOR B"] - A_NOR_B = 1, + ANorB = 1, #[doc = "2: (!A) AND B"] - NOT_A_AND_B = 2, + NotAAndB = 2, #[doc = "3: !A"] - NOT_A = 3, + NotA = 3, #[doc = "4: A AND (!B)"] - A_AND_NOT_B = 4, + AAndNotB = 4, #[doc = "5: !B"] - NOT_B = 5, + NotB = 5, #[doc = "6: A XOR B"] - A_XOR_B = 6, + AXorB = 6, #[doc = "7: A NAND B"] - A_NAND_B = 7, + ANandB = 7, #[doc = "8: A AND B"] - A_AND_B = 8, + AAndB = 8, #[doc = "9: A XNOR B"] - A_XNOR_B = 9, + AXnorB = 9, #[doc = "10: B"] B = 10, #[doc = "11: (!A) OR B"] - NOT_A_OR_B = 11, + NotAOrB = 11, #[doc = "12: A"] A = 12, #[doc = "13: A OR (!B)"] - A_OR_NOT_B = 13, + AOrNotB = 13, #[doc = "14: A OR B"] - A_OR_B = 14, + AOrB = 14, #[doc = "15: Logical 1"] - LOGICAL_ONE = 15, + LogicalOne = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FNSEL_A) -> Self { + fn from(variant: Fnsel) -> Self { variant as _ } } -impl FNSEL_R { +impl crate::FieldSpec for Fnsel { + type Ux = u8; +} +impl crate::IsEnum for Fnsel {} +#[doc = "Field `FNSEL` reader - Function Select"] +pub type FnselR = crate::FieldReader; +impl FnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FNSEL_A { + pub const fn variant(&self) -> Fnsel { match self.bits { - 0 => FNSEL_A::LOGICAL_ZERO, - 1 => FNSEL_A::A_NOR_B, - 2 => FNSEL_A::NOT_A_AND_B, - 3 => FNSEL_A::NOT_A, - 4 => FNSEL_A::A_AND_NOT_B, - 5 => FNSEL_A::NOT_B, - 6 => FNSEL_A::A_XOR_B, - 7 => FNSEL_A::A_NAND_B, - 8 => FNSEL_A::A_AND_B, - 9 => FNSEL_A::A_XNOR_B, - 10 => FNSEL_A::B, - 11 => FNSEL_A::NOT_A_OR_B, - 12 => FNSEL_A::A, - 13 => FNSEL_A::A_OR_NOT_B, - 14 => FNSEL_A::A_OR_B, - 15 => FNSEL_A::LOGICAL_ONE, + 0 => Fnsel::LogicalZero, + 1 => Fnsel::ANorB, + 2 => Fnsel::NotAAndB, + 3 => Fnsel::NotA, + 4 => Fnsel::AAndNotB, + 5 => Fnsel::NotB, + 6 => Fnsel::AXorB, + 7 => Fnsel::ANandB, + 8 => Fnsel::AAndB, + 9 => Fnsel::AXnorB, + 10 => Fnsel::B, + 11 => Fnsel::NotAOrB, + 12 => Fnsel::A, + 13 => Fnsel::AOrNotB, + 14 => Fnsel::AOrB, + 15 => Fnsel::LogicalOne, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `LOGICAL_ZERO`"] + #[doc = "Logical 0"] #[inline(always)] pub fn is_logical_zero(&self) -> bool { - *self == FNSEL_A::LOGICAL_ZERO + *self == Fnsel::LogicalZero } - #[doc = "Checks if the value of the field is `A_NOR_B`"] + #[doc = "A NOR B"] #[inline(always)] pub fn is_a_nor_b(&self) -> bool { - *self == FNSEL_A::A_NOR_B + *self == Fnsel::ANorB } - #[doc = "Checks if the value of the field is `NOT_A_AND_B`"] + #[doc = "(!A) AND B"] #[inline(always)] pub fn is_not_a_and_b(&self) -> bool { - *self == FNSEL_A::NOT_A_AND_B + *self == Fnsel::NotAAndB } - #[doc = "Checks if the value of the field is `NOT_A`"] + #[doc = "!A"] #[inline(always)] pub fn is_not_a(&self) -> bool { - *self == FNSEL_A::NOT_A + *self == Fnsel::NotA } - #[doc = "Checks if the value of the field is `A_AND_NOT_B`"] + #[doc = "A AND (!B)"] #[inline(always)] pub fn is_a_and_not_b(&self) -> bool { - *self == FNSEL_A::A_AND_NOT_B + *self == Fnsel::AAndNotB } - #[doc = "Checks if the value of the field is `NOT_B`"] + #[doc = "!B"] #[inline(always)] pub fn is_not_b(&self) -> bool { - *self == FNSEL_A::NOT_B + *self == Fnsel::NotB } - #[doc = "Checks if the value of the field is `A_XOR_B`"] + #[doc = "A XOR B"] #[inline(always)] pub fn is_a_xor_b(&self) -> bool { - *self == FNSEL_A::A_XOR_B + *self == Fnsel::AXorB } - #[doc = "Checks if the value of the field is `A_NAND_B`"] + #[doc = "A NAND B"] #[inline(always)] pub fn is_a_nand_b(&self) -> bool { - *self == FNSEL_A::A_NAND_B + *self == Fnsel::ANandB } - #[doc = "Checks if the value of the field is `A_AND_B`"] + #[doc = "A AND B"] #[inline(always)] pub fn is_a_and_b(&self) -> bool { - *self == FNSEL_A::A_AND_B + *self == Fnsel::AAndB } - #[doc = "Checks if the value of the field is `A_XNOR_B`"] + #[doc = "A XNOR B"] #[inline(always)] pub fn is_a_xnor_b(&self) -> bool { - *self == FNSEL_A::A_XNOR_B + *self == Fnsel::AXnorB } - #[doc = "Checks if the value of the field is `B`"] + #[doc = "B"] #[inline(always)] pub fn is_b(&self) -> bool { - *self == FNSEL_A::B + *self == Fnsel::B } - #[doc = "Checks if the value of the field is `NOT_A_OR_B`"] + #[doc = "(!A) OR B"] #[inline(always)] pub fn is_not_a_or_b(&self) -> bool { - *self == FNSEL_A::NOT_A_OR_B + *self == Fnsel::NotAOrB } - #[doc = "Checks if the value of the field is `A`"] + #[doc = "A"] #[inline(always)] pub fn is_a(&self) -> bool { - *self == FNSEL_A::A + *self == Fnsel::A } - #[doc = "Checks if the value of the field is `A_OR_NOT_B`"] + #[doc = "A OR (!B)"] #[inline(always)] pub fn is_a_or_not_b(&self) -> bool { - *self == FNSEL_A::A_OR_NOT_B + *self == Fnsel::AOrNotB } - #[doc = "Checks if the value of the field is `A_OR_B`"] + #[doc = "A OR B"] #[inline(always)] pub fn is_a_or_b(&self) -> bool { - *self == FNSEL_A::A_OR_B + *self == Fnsel::AOrB } - #[doc = "Checks if the value of the field is `LOGICAL_ONE`"] + #[doc = "Logical 1"] #[inline(always)] pub fn is_logical_one(&self) -> bool { - *self == FNSEL_A::LOGICAL_ONE + *self == Fnsel::LogicalOne } } #[doc = "Field `FNSEL` writer - Function Select"] -pub type FNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, ASYNC_CH9_CTRL_SPEC, u8, FNSEL_A, 4, O>; -impl<'a, const O: u8> FNSEL_W<'a, O> { +pub type FnselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Fnsel, crate::Safe>; +impl<'a, REG> FnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Logical 0"] #[inline(always)] - pub fn logical_zero(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ZERO) + pub fn logical_zero(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalZero) } #[doc = "A NOR B"] #[inline(always)] - pub fn a_nor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NOR_B) + pub fn a_nor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANorB) } #[doc = "(!A) AND B"] #[inline(always)] - pub fn not_a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_AND_B) + pub fn not_a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAAndB) } #[doc = "!A"] #[inline(always)] - pub fn not_a(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A) + pub fn not_a(self) -> &'a mut crate::W { + self.variant(Fnsel::NotA) } #[doc = "A AND (!B)"] #[inline(always)] - pub fn a_and_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_NOT_B) + pub fn a_and_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndNotB) } #[doc = "!B"] #[inline(always)] - pub fn not_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_B) + pub fn not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotB) } #[doc = "A XOR B"] #[inline(always)] - pub fn a_xor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XOR_B) + pub fn a_xor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXorB) } #[doc = "A NAND B"] #[inline(always)] - pub fn a_nand_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_NAND_B) + pub fn a_nand_b(self) -> &'a mut crate::W { + self.variant(Fnsel::ANandB) } #[doc = "A AND B"] #[inline(always)] - pub fn a_and_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_AND_B) + pub fn a_and_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AAndB) } #[doc = "A XNOR B"] #[inline(always)] - pub fn a_xnor_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_XNOR_B) + pub fn a_xnor_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AXnorB) } #[doc = "B"] #[inline(always)] - pub fn b(self) -> &'a mut W { - self.variant(FNSEL_A::B) + pub fn b(self) -> &'a mut crate::W { + self.variant(Fnsel::B) } #[doc = "(!A) OR B"] #[inline(always)] - pub fn not_a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::NOT_A_OR_B) + pub fn not_a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::NotAOrB) } #[doc = "A"] #[inline(always)] - pub fn a(self) -> &'a mut W { - self.variant(FNSEL_A::A) + pub fn a(self) -> &'a mut crate::W { + self.variant(Fnsel::A) } #[doc = "A OR (!B)"] #[inline(always)] - pub fn a_or_not_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_NOT_B) + pub fn a_or_not_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrNotB) } #[doc = "A OR B"] #[inline(always)] - pub fn a_or_b(self) -> &'a mut W { - self.variant(FNSEL_A::A_OR_B) + pub fn a_or_b(self) -> &'a mut crate::W { + self.variant(Fnsel::AOrB) } #[doc = "Logical 1"] #[inline(always)] - pub fn logical_one(self) -> &'a mut W { - self.variant(FNSEL_A::LOGICAL_ONE) + pub fn logical_one(self) -> &'a mut crate::W { + self.variant(Fnsel::LogicalOne) } } #[doc = "Field `AUXSEL` reader - Aux Select"] -pub type AUXSEL_R = crate::FieldReader; +pub type AuxselR = crate::FieldReader; #[doc = "Field `AUXSEL` writer - Aux Select"] -pub type AUXSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ASYNC_CH9_CTRL_SPEC, u8, u8, 4, O>; +pub type AuxselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] - pub fn fnsel(&self) -> FNSEL_R { - FNSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fnsel(&self) -> FnselR { + FnselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] - pub fn auxsel(&self) -> AUXSEL_R { - AUXSEL_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn auxsel(&self) -> AuxselR { + AuxselR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } #[doc = "Bits 16:19 - Function Select"] #[inline(always)] #[must_use] - pub fn fnsel(&mut self) -> FNSEL_W<16> { - FNSEL_W::new(self) + pub fn fnsel(&mut self) -> FnselW { + FnselW::new(self, 16) } #[doc = "Bits 24:27 - Aux Select"] #[inline(always)] #[must_use] - pub fn auxsel(&mut self) -> AUXSEL_W<24> { - AUXSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn auxsel(&mut self) -> AuxselW { + AuxselW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_ch9_ctrl](index.html) module"] -pub struct ASYNC_CH9_CTRL_SPEC; -impl crate::RegisterSpec for ASYNC_CH9_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_ch9_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_ch9_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncCh9CtrlSpec; +impl crate::RegisterSpec for AsyncCh9CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_ch9_ctrl::R](R) reader structure"] -impl crate::Readable for ASYNC_CH9_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [async_ch9_ctrl::W](W) writer structure"] -impl crate::Writable for ASYNC_CH9_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`async_ch9_ctrl::R`](R) reader structure"] +impl crate::Readable for AsyncCh9CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`async_ch9_ctrl::W`](W) writer structure"] +impl crate::Writable for AsyncCh9CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_CH9_CTRL to value 0x000c_0000"] -impl crate::Resettable for ASYNC_CH9_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x000c_0000; +impl crate::Resettable for AsyncCh9CtrlSpec { + const RESET_VALUE: u32 = 0x000c_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_peek.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_peek.rs index 27e531b..ee00163 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_peek.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_peek.rs @@ -1,114 +1,99 @@ #[doc = "Register `ASYNC_PEEK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CH0VAL` reader - Channel 0 Current Value"] -pub type CH0VAL_R = crate::BitReader; +pub type Ch0valR = crate::BitReader; #[doc = "Field `CH1VAL` reader - Channel 1 Current Value"] -pub type CH1VAL_R = crate::BitReader; +pub type Ch1valR = crate::BitReader; #[doc = "Field `CH2VAL` reader - Channel 2 Current Value"] -pub type CH2VAL_R = crate::BitReader; +pub type Ch2valR = crate::BitReader; #[doc = "Field `CH3VAL` reader - Channel 3 Current Value"] -pub type CH3VAL_R = crate::BitReader; +pub type Ch3valR = crate::BitReader; #[doc = "Field `CH4VAL` reader - Channel 4 Current Value"] -pub type CH4VAL_R = crate::BitReader; +pub type Ch4valR = crate::BitReader; #[doc = "Field `CH5VAL` reader - Channel 5 Current Value"] -pub type CH5VAL_R = crate::BitReader; +pub type Ch5valR = crate::BitReader; #[doc = "Field `CH6VAL` reader - Channel 6 Current Value"] -pub type CH6VAL_R = crate::BitReader; +pub type Ch6valR = crate::BitReader; #[doc = "Field `CH7VAL` reader - Channel 7 Current Value"] -pub type CH7VAL_R = crate::BitReader; +pub type Ch7valR = crate::BitReader; #[doc = "Field `CH8VAL` reader - Channel 8 Current Value"] -pub type CH8VAL_R = crate::BitReader; +pub type Ch8valR = crate::BitReader; #[doc = "Field `CH9VAL` reader - Channel 9 Current Value"] -pub type CH9VAL_R = crate::BitReader; +pub type Ch9valR = crate::BitReader; #[doc = "Field `CH10VAL` reader - Channel 10 Current Value"] -pub type CH10VAL_R = crate::BitReader; +pub type Ch10valR = crate::BitReader; #[doc = "Field `CH11VAL` reader - Channel 11 Current Value"] -pub type CH11VAL_R = crate::BitReader; +pub type Ch11valR = crate::BitReader; impl R { #[doc = "Bit 0 - Channel 0 Current Value"] #[inline(always)] - pub fn ch0val(&self) -> CH0VAL_R { - CH0VAL_R::new((self.bits & 1) != 0) + pub fn ch0val(&self) -> Ch0valR { + Ch0valR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channel 1 Current Value"] #[inline(always)] - pub fn ch1val(&self) -> CH1VAL_R { - CH1VAL_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1val(&self) -> Ch1valR { + Ch1valR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Channel 2 Current Value"] #[inline(always)] - pub fn ch2val(&self) -> CH2VAL_R { - CH2VAL_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2val(&self) -> Ch2valR { + Ch2valR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Channel 3 Current Value"] #[inline(always)] - pub fn ch3val(&self) -> CH3VAL_R { - CH3VAL_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3val(&self) -> Ch3valR { + Ch3valR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Channel 4 Current Value"] #[inline(always)] - pub fn ch4val(&self) -> CH4VAL_R { - CH4VAL_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4val(&self) -> Ch4valR { + Ch4valR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Channel 5 Current Value"] #[inline(always)] - pub fn ch5val(&self) -> CH5VAL_R { - CH5VAL_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5val(&self) -> Ch5valR { + Ch5valR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Channel 6 Current Value"] #[inline(always)] - pub fn ch6val(&self) -> CH6VAL_R { - CH6VAL_R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6val(&self) -> Ch6valR { + Ch6valR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Channel 7 Current Value"] #[inline(always)] - pub fn ch7val(&self) -> CH7VAL_R { - CH7VAL_R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7val(&self) -> Ch7valR { + Ch7valR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Channel 8 Current Value"] #[inline(always)] - pub fn ch8val(&self) -> CH8VAL_R { - CH8VAL_R::new(((self.bits >> 8) & 1) != 0) + pub fn ch8val(&self) -> Ch8valR { + Ch8valR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Channel 9 Current Value"] #[inline(always)] - pub fn ch9val(&self) -> CH9VAL_R { - CH9VAL_R::new(((self.bits >> 9) & 1) != 0) + pub fn ch9val(&self) -> Ch9valR { + Ch9valR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Channel 10 Current Value"] #[inline(always)] - pub fn ch10val(&self) -> CH10VAL_R { - CH10VAL_R::new(((self.bits >> 10) & 1) != 0) + pub fn ch10val(&self) -> Ch10valR { + Ch10valR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Channel 11 Current Value"] #[inline(always)] - pub fn ch11val(&self) -> CH11VAL_R { - CH11VAL_R::new(((self.bits >> 11) & 1) != 0) + pub fn ch11val(&self) -> Ch11valR { + Ch11valR::new(((self.bits >> 11) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_peek](index.html) module"] -pub struct ASYNC_PEEK_SPEC; -impl crate::RegisterSpec for ASYNC_PEEK_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_peek::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncPeekSpec; +impl crate::RegisterSpec for AsyncPeekSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_peek::R](R) reader structure"] -impl crate::Readable for ASYNC_PEEK_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`async_peek::R`](R) reader structure"] +impl crate::Readable for AsyncPeekSpec {} #[doc = "`reset()` method sets ASYNC_PEEK to value 0"] -impl crate::Resettable for ASYNC_PEEK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for AsyncPeekSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_swlevel.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_swlevel.rs index 139e959..acb898e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_swlevel.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_swlevel.rs @@ -1,245 +1,205 @@ #[doc = "Register `ASYNC_SWLEVEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ASYNC_SWLEVEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CH0LEVEL` reader - Channel Level"] -pub type CH0LEVEL_R = crate::BitReader; +pub type Ch0levelR = crate::BitReader; #[doc = "Field `CH0LEVEL` writer - Channel Level"] -pub type CH0LEVEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWLEVEL_SPEC, bool, O>; +pub type Ch0levelW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1LEVEL` reader - Channel Level"] -pub type CH1LEVEL_R = crate::BitReader; +pub type Ch1levelR = crate::BitReader; #[doc = "Field `CH1LEVEL` writer - Channel Level"] -pub type CH1LEVEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWLEVEL_SPEC, bool, O>; +pub type Ch1levelW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2LEVEL` reader - Channel Level"] -pub type CH2LEVEL_R = crate::BitReader; +pub type Ch2levelR = crate::BitReader; #[doc = "Field `CH2LEVEL` writer - Channel Level"] -pub type CH2LEVEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWLEVEL_SPEC, bool, O>; +pub type Ch2levelW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3LEVEL` reader - Channel Level"] -pub type CH3LEVEL_R = crate::BitReader; +pub type Ch3levelR = crate::BitReader; #[doc = "Field `CH3LEVEL` writer - Channel Level"] -pub type CH3LEVEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWLEVEL_SPEC, bool, O>; +pub type Ch3levelW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH4LEVEL` reader - Channel Level"] -pub type CH4LEVEL_R = crate::BitReader; +pub type Ch4levelR = crate::BitReader; #[doc = "Field `CH4LEVEL` writer - Channel Level"] -pub type CH4LEVEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWLEVEL_SPEC, bool, O>; +pub type Ch4levelW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH5LEVEL` reader - Channel Level"] -pub type CH5LEVEL_R = crate::BitReader; +pub type Ch5levelR = crate::BitReader; #[doc = "Field `CH5LEVEL` writer - Channel Level"] -pub type CH5LEVEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWLEVEL_SPEC, bool, O>; +pub type Ch5levelW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH6LEVEL` reader - Channel Level"] -pub type CH6LEVEL_R = crate::BitReader; +pub type Ch6levelR = crate::BitReader; #[doc = "Field `CH6LEVEL` writer - Channel Level"] -pub type CH6LEVEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWLEVEL_SPEC, bool, O>; +pub type Ch6levelW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH7LEVEL` reader - Channel Level"] -pub type CH7LEVEL_R = crate::BitReader; +pub type Ch7levelR = crate::BitReader; #[doc = "Field `CH7LEVEL` writer - Channel Level"] -pub type CH7LEVEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWLEVEL_SPEC, bool, O>; +pub type Ch7levelW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH8LEVEL` reader - Channel Level"] -pub type CH8LEVEL_R = crate::BitReader; +pub type Ch8levelR = crate::BitReader; #[doc = "Field `CH8LEVEL` writer - Channel Level"] -pub type CH8LEVEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWLEVEL_SPEC, bool, O>; +pub type Ch8levelW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH9LEVEL` reader - Channel Level"] -pub type CH9LEVEL_R = crate::BitReader; +pub type Ch9levelR = crate::BitReader; #[doc = "Field `CH9LEVEL` writer - Channel Level"] -pub type CH9LEVEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWLEVEL_SPEC, bool, O>; +pub type Ch9levelW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH10LEVEL` reader - Channel Level"] -pub type CH10LEVEL_R = crate::BitReader; +pub type Ch10levelR = crate::BitReader; #[doc = "Field `CH10LEVEL` writer - Channel Level"] -pub type CH10LEVEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWLEVEL_SPEC, bool, O>; +pub type Ch10levelW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH11LEVEL` reader - Channel Level"] -pub type CH11LEVEL_R = crate::BitReader; +pub type Ch11levelR = crate::BitReader; #[doc = "Field `CH11LEVEL` writer - Channel Level"] -pub type CH11LEVEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWLEVEL_SPEC, bool, O>; +pub type Ch11levelW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Channel Level"] #[inline(always)] - pub fn ch0level(&self) -> CH0LEVEL_R { - CH0LEVEL_R::new((self.bits & 1) != 0) + pub fn ch0level(&self) -> Ch0levelR { + Ch0levelR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channel Level"] #[inline(always)] - pub fn ch1level(&self) -> CH1LEVEL_R { - CH1LEVEL_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1level(&self) -> Ch1levelR { + Ch1levelR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Channel Level"] #[inline(always)] - pub fn ch2level(&self) -> CH2LEVEL_R { - CH2LEVEL_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2level(&self) -> Ch2levelR { + Ch2levelR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Channel Level"] #[inline(always)] - pub fn ch3level(&self) -> CH3LEVEL_R { - CH3LEVEL_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3level(&self) -> Ch3levelR { + Ch3levelR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Channel Level"] #[inline(always)] - pub fn ch4level(&self) -> CH4LEVEL_R { - CH4LEVEL_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4level(&self) -> Ch4levelR { + Ch4levelR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Channel Level"] #[inline(always)] - pub fn ch5level(&self) -> CH5LEVEL_R { - CH5LEVEL_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5level(&self) -> Ch5levelR { + Ch5levelR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Channel Level"] #[inline(always)] - pub fn ch6level(&self) -> CH6LEVEL_R { - CH6LEVEL_R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6level(&self) -> Ch6levelR { + Ch6levelR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Channel Level"] #[inline(always)] - pub fn ch7level(&self) -> CH7LEVEL_R { - CH7LEVEL_R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7level(&self) -> Ch7levelR { + Ch7levelR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Channel Level"] #[inline(always)] - pub fn ch8level(&self) -> CH8LEVEL_R { - CH8LEVEL_R::new(((self.bits >> 8) & 1) != 0) + pub fn ch8level(&self) -> Ch8levelR { + Ch8levelR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Channel Level"] #[inline(always)] - pub fn ch9level(&self) -> CH9LEVEL_R { - CH9LEVEL_R::new(((self.bits >> 9) & 1) != 0) + pub fn ch9level(&self) -> Ch9levelR { + Ch9levelR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Channel Level"] #[inline(always)] - pub fn ch10level(&self) -> CH10LEVEL_R { - CH10LEVEL_R::new(((self.bits >> 10) & 1) != 0) + pub fn ch10level(&self) -> Ch10levelR { + Ch10levelR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Channel Level"] #[inline(always)] - pub fn ch11level(&self) -> CH11LEVEL_R { - CH11LEVEL_R::new(((self.bits >> 11) & 1) != 0) + pub fn ch11level(&self) -> Ch11levelR { + Ch11levelR::new(((self.bits >> 11) & 1) != 0) } } impl W { #[doc = "Bit 0 - Channel Level"] #[inline(always)] #[must_use] - pub fn ch0level(&mut self) -> CH0LEVEL_W<0> { - CH0LEVEL_W::new(self) + pub fn ch0level(&mut self) -> Ch0levelW { + Ch0levelW::new(self, 0) } #[doc = "Bit 1 - Channel Level"] #[inline(always)] #[must_use] - pub fn ch1level(&mut self) -> CH1LEVEL_W<1> { - CH1LEVEL_W::new(self) + pub fn ch1level(&mut self) -> Ch1levelW { + Ch1levelW::new(self, 1) } #[doc = "Bit 2 - Channel Level"] #[inline(always)] #[must_use] - pub fn ch2level(&mut self) -> CH2LEVEL_W<2> { - CH2LEVEL_W::new(self) + pub fn ch2level(&mut self) -> Ch2levelW { + Ch2levelW::new(self, 2) } #[doc = "Bit 3 - Channel Level"] #[inline(always)] #[must_use] - pub fn ch3level(&mut self) -> CH3LEVEL_W<3> { - CH3LEVEL_W::new(self) + pub fn ch3level(&mut self) -> Ch3levelW { + Ch3levelW::new(self, 3) } #[doc = "Bit 4 - Channel Level"] #[inline(always)] #[must_use] - pub fn ch4level(&mut self) -> CH4LEVEL_W<4> { - CH4LEVEL_W::new(self) + pub fn ch4level(&mut self) -> Ch4levelW { + Ch4levelW::new(self, 4) } #[doc = "Bit 5 - Channel Level"] #[inline(always)] #[must_use] - pub fn ch5level(&mut self) -> CH5LEVEL_W<5> { - CH5LEVEL_W::new(self) + pub fn ch5level(&mut self) -> Ch5levelW { + Ch5levelW::new(self, 5) } #[doc = "Bit 6 - Channel Level"] #[inline(always)] #[must_use] - pub fn ch6level(&mut self) -> CH6LEVEL_W<6> { - CH6LEVEL_W::new(self) + pub fn ch6level(&mut self) -> Ch6levelW { + Ch6levelW::new(self, 6) } #[doc = "Bit 7 - Channel Level"] #[inline(always)] #[must_use] - pub fn ch7level(&mut self) -> CH7LEVEL_W<7> { - CH7LEVEL_W::new(self) + pub fn ch7level(&mut self) -> Ch7levelW { + Ch7levelW::new(self, 7) } #[doc = "Bit 8 - Channel Level"] #[inline(always)] #[must_use] - pub fn ch8level(&mut self) -> CH8LEVEL_W<8> { - CH8LEVEL_W::new(self) + pub fn ch8level(&mut self) -> Ch8levelW { + Ch8levelW::new(self, 8) } #[doc = "Bit 9 - Channel Level"] #[inline(always)] #[must_use] - pub fn ch9level(&mut self) -> CH9LEVEL_W<9> { - CH9LEVEL_W::new(self) + pub fn ch9level(&mut self) -> Ch9levelW { + Ch9levelW::new(self, 9) } #[doc = "Bit 10 - Channel Level"] #[inline(always)] #[must_use] - pub fn ch10level(&mut self) -> CH10LEVEL_W<10> { - CH10LEVEL_W::new(self) + pub fn ch10level(&mut self) -> Ch10levelW { + Ch10levelW::new(self, 10) } #[doc = "Bit 11 - Channel Level"] #[inline(always)] #[must_use] - pub fn ch11level(&mut self) -> CH11LEVEL_W<11> { - CH11LEVEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ch11level(&mut self) -> Ch11levelW { + Ch11levelW::new(self, 11) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_swlevel](index.html) module"] -pub struct ASYNC_SWLEVEL_SPEC; -impl crate::RegisterSpec for ASYNC_SWLEVEL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`async_swlevel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_swlevel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncSwlevelSpec; +impl crate::RegisterSpec for AsyncSwlevelSpec { type Ux = u32; } -#[doc = "`read()` method returns [async_swlevel::R](R) reader structure"] -impl crate::Readable for ASYNC_SWLEVEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [async_swlevel::W](W) writer structure"] -impl crate::Writable for ASYNC_SWLEVEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`async_swlevel::R`](R) reader structure"] +impl crate::Readable for AsyncSwlevelSpec {} +#[doc = "`write(|w| ..)` method takes [`async_swlevel::W`](W) writer structure"] +impl crate::Writable for AsyncSwlevelSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_SWLEVEL to value 0"] -impl crate::Resettable for ASYNC_SWLEVEL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for AsyncSwlevelSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_swpulse.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_swpulse.rs index 0ba83a7..233c01c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_swpulse.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/async_swpulse.rs @@ -1,140 +1,115 @@ #[doc = "Register `ASYNC_SWPULSE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CH0PULSE` writer - Channel pulse"] -pub type CH0PULSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWPULSE_SPEC, bool, O>; +pub type Ch0pulseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1PULSE` writer - Channel pulse"] -pub type CH1PULSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWPULSE_SPEC, bool, O>; +pub type Ch1pulseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2PULSE` writer - Channel pulse"] -pub type CH2PULSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWPULSE_SPEC, bool, O>; +pub type Ch2pulseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3PULSE` writer - Channel pulse"] -pub type CH3PULSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWPULSE_SPEC, bool, O>; +pub type Ch3pulseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH4PULSE` writer - Channel pulse"] -pub type CH4PULSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWPULSE_SPEC, bool, O>; +pub type Ch4pulseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH5PULSE` writer - Channel pulse"] -pub type CH5PULSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWPULSE_SPEC, bool, O>; +pub type Ch5pulseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH6PULSE` writer - Channel pulse"] -pub type CH6PULSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWPULSE_SPEC, bool, O>; +pub type Ch6pulseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH7PULSE` writer - Channel pulse"] -pub type CH7PULSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWPULSE_SPEC, bool, O>; +pub type Ch7pulseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH8PULSE` writer - Channel pulse"] -pub type CH8PULSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWPULSE_SPEC, bool, O>; +pub type Ch8pulseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH9PULSE` writer - Channel pulse"] -pub type CH9PULSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWPULSE_SPEC, bool, O>; +pub type Ch9pulseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH10PULSE` writer - Channel pulse"] -pub type CH10PULSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWPULSE_SPEC, bool, O>; +pub type Ch10pulseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH11PULSE` writer - Channel pulse"] -pub type CH11PULSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ASYNC_SWPULSE_SPEC, bool, O>; +pub type Ch11pulseW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Channel pulse"] #[inline(always)] #[must_use] - pub fn ch0pulse(&mut self) -> CH0PULSE_W<0> { - CH0PULSE_W::new(self) + pub fn ch0pulse(&mut self) -> Ch0pulseW { + Ch0pulseW::new(self, 0) } #[doc = "Bit 1 - Channel pulse"] #[inline(always)] #[must_use] - pub fn ch1pulse(&mut self) -> CH1PULSE_W<1> { - CH1PULSE_W::new(self) + pub fn ch1pulse(&mut self) -> Ch1pulseW { + Ch1pulseW::new(self, 1) } #[doc = "Bit 2 - Channel pulse"] #[inline(always)] #[must_use] - pub fn ch2pulse(&mut self) -> CH2PULSE_W<2> { - CH2PULSE_W::new(self) + pub fn ch2pulse(&mut self) -> Ch2pulseW { + Ch2pulseW::new(self, 2) } #[doc = "Bit 3 - Channel pulse"] #[inline(always)] #[must_use] - pub fn ch3pulse(&mut self) -> CH3PULSE_W<3> { - CH3PULSE_W::new(self) + pub fn ch3pulse(&mut self) -> Ch3pulseW { + Ch3pulseW::new(self, 3) } #[doc = "Bit 4 - Channel pulse"] #[inline(always)] #[must_use] - pub fn ch4pulse(&mut self) -> CH4PULSE_W<4> { - CH4PULSE_W::new(self) + pub fn ch4pulse(&mut self) -> Ch4pulseW { + Ch4pulseW::new(self, 4) } #[doc = "Bit 5 - Channel pulse"] #[inline(always)] #[must_use] - pub fn ch5pulse(&mut self) -> CH5PULSE_W<5> { - CH5PULSE_W::new(self) + pub fn ch5pulse(&mut self) -> Ch5pulseW { + Ch5pulseW::new(self, 5) } #[doc = "Bit 6 - Channel pulse"] #[inline(always)] #[must_use] - pub fn ch6pulse(&mut self) -> CH6PULSE_W<6> { - CH6PULSE_W::new(self) + pub fn ch6pulse(&mut self) -> Ch6pulseW { + Ch6pulseW::new(self, 6) } #[doc = "Bit 7 - Channel pulse"] #[inline(always)] #[must_use] - pub fn ch7pulse(&mut self) -> CH7PULSE_W<7> { - CH7PULSE_W::new(self) + pub fn ch7pulse(&mut self) -> Ch7pulseW { + Ch7pulseW::new(self, 7) } #[doc = "Bit 8 - Channel pulse"] #[inline(always)] #[must_use] - pub fn ch8pulse(&mut self) -> CH8PULSE_W<8> { - CH8PULSE_W::new(self) + pub fn ch8pulse(&mut self) -> Ch8pulseW { + Ch8pulseW::new(self, 8) } #[doc = "Bit 9 - Channel pulse"] #[inline(always)] #[must_use] - pub fn ch9pulse(&mut self) -> CH9PULSE_W<9> { - CH9PULSE_W::new(self) + pub fn ch9pulse(&mut self) -> Ch9pulseW { + Ch9pulseW::new(self, 9) } #[doc = "Bit 10 - Channel pulse"] #[inline(always)] #[must_use] - pub fn ch10pulse(&mut self) -> CH10PULSE_W<10> { - CH10PULSE_W::new(self) + pub fn ch10pulse(&mut self) -> Ch10pulseW { + Ch10pulseW::new(self, 10) } #[doc = "Bit 11 - Channel pulse"] #[inline(always)] #[must_use] - pub fn ch11pulse(&mut self) -> CH11PULSE_W<11> { - CH11PULSE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ch11pulse(&mut self) -> Ch11pulseW { + Ch11pulseW::new(self, 11) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_swpulse](index.html) module"] -pub struct ASYNC_SWPULSE_SPEC; -impl crate::RegisterSpec for ASYNC_SWPULSE_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`async_swpulse::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AsyncSwpulseSpec; +impl crate::RegisterSpec for AsyncSwpulseSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [async_swpulse::W](W) writer structure"] -impl crate::Writable for ASYNC_SWPULSE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`async_swpulse::W`](W) writer structure"] +impl crate::Writable for AsyncSwpulseSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASYNC_SWPULSE to value 0"] -impl crate::Resettable for ASYNC_SWPULSE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for AsyncSwpulseSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_cmu_caldn.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_cmu_caldn.rs index 509a27c..72fe013 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_cmu_caldn.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_cmu_caldn.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_CMU_CALDN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_CMU_CALDN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CALDN async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CALDN async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_CMU_CALDN_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - CALDN async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - CALDN async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "CALDN consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_cmu_caldn](index.html) module"] -pub struct CONSUMER_CMU_CALDN_SPEC; -impl crate::RegisterSpec for CONSUMER_CMU_CALDN_SPEC { +#[doc = "CALDN consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_cmu_caldn::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_cmu_caldn::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerCmuCaldnSpec; +impl crate::RegisterSpec for ConsumerCmuCaldnSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_cmu_caldn::R](R) reader structure"] -impl crate::Readable for CONSUMER_CMU_CALDN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_cmu_caldn::W](W) writer structure"] -impl crate::Writable for CONSUMER_CMU_CALDN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_cmu_caldn::R`](R) reader structure"] +impl crate::Readable for ConsumerCmuCaldnSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_cmu_caldn::W`](W) writer structure"] +impl crate::Writable for ConsumerCmuCaldnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_CMU_CALDN to value 0"] -impl crate::Resettable for CONSUMER_CMU_CALDN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerCmuCaldnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_cmu_calup.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_cmu_calup.rs index b5d631b..f9d52f4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_cmu_calup.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_cmu_calup.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_CMU_CALUP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_CMU_CALUP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CALUP async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CALUP async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_CMU_CALUP_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - CALUP async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - CALUP async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "CALUP Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_cmu_calup](index.html) module"] -pub struct CONSUMER_CMU_CALUP_SPEC; -impl crate::RegisterSpec for CONSUMER_CMU_CALUP_SPEC { +#[doc = "CALUP Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_cmu_calup::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_cmu_calup::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerCmuCalupSpec; +impl crate::RegisterSpec for ConsumerCmuCalupSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_cmu_calup::R](R) reader structure"] -impl crate::Readable for CONSUMER_CMU_CALUP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_cmu_calup::W](W) writer structure"] -impl crate::Writable for CONSUMER_CMU_CALUP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_cmu_calup::R`](R) reader structure"] +impl crate::Readable for ConsumerCmuCalupSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_cmu_calup::W`](W) writer structure"] +impl crate::Writable for ConsumerCmuCalupSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_CMU_CALUP to value 0"] -impl crate::Resettable for CONSUMER_CMU_CALUP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerCmuCalupSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_core_ctiin0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_core_ctiin0.rs index cae99a5..bb1fa9f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_core_ctiin0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_core_ctiin0.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_CORE_CTIIN0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_CORE_CTIIN0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_CORE_CTIIN0_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - CTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - CTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "CTI Consumer Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_core_ctiin0](index.html) module"] -pub struct CONSUMER_CORE_CTIIN0_SPEC; -impl crate::RegisterSpec for CONSUMER_CORE_CTIIN0_SPEC { +#[doc = "CTI Consumer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_core_ctiin0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_core_ctiin0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerCoreCtiin0Spec; +impl crate::RegisterSpec for ConsumerCoreCtiin0Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_core_ctiin0::R](R) reader structure"] -impl crate::Readable for CONSUMER_CORE_CTIIN0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_core_ctiin0::W](W) writer structure"] -impl crate::Writable for CONSUMER_CORE_CTIIN0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_core_ctiin0::R`](R) reader structure"] +impl crate::Readable for ConsumerCoreCtiin0Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_core_ctiin0::W`](W) writer structure"] +impl crate::Writable for ConsumerCoreCtiin0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_CORE_CTIIN0 to value 0"] -impl crate::Resettable for CONSUMER_CORE_CTIIN0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerCoreCtiin0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_core_ctiin1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_core_ctiin1.rs index dc522a5..0be4956 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_core_ctiin1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_core_ctiin1.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_CORE_CTIIN1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_CORE_CTIIN1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_CORE_CTIIN1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - CTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - CTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "CTI Consumer Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_core_ctiin1](index.html) module"] -pub struct CONSUMER_CORE_CTIIN1_SPEC; -impl crate::RegisterSpec for CONSUMER_CORE_CTIIN1_SPEC { +#[doc = "CTI Consumer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_core_ctiin1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_core_ctiin1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerCoreCtiin1Spec; +impl crate::RegisterSpec for ConsumerCoreCtiin1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_core_ctiin1::R](R) reader structure"] -impl crate::Readable for CONSUMER_CORE_CTIIN1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_core_ctiin1::W](W) writer structure"] -impl crate::Writable for CONSUMER_CORE_CTIIN1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_core_ctiin1::R`](R) reader structure"] +impl crate::Readable for ConsumerCoreCtiin1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_core_ctiin1::W`](W) writer structure"] +impl crate::Writable for ConsumerCoreCtiin1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_CORE_CTIIN1 to value 0"] -impl crate::Resettable for CONSUMER_CORE_CTIIN1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerCoreCtiin1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_core_ctiin2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_core_ctiin2.rs index 0e775d7..f94a862 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_core_ctiin2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_core_ctiin2.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_CORE_CTIIN2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_CORE_CTIIN2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_CORE_CTIIN2_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - CTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - CTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "CTI Consumer Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_core_ctiin2](index.html) module"] -pub struct CONSUMER_CORE_CTIIN2_SPEC; -impl crate::RegisterSpec for CONSUMER_CORE_CTIIN2_SPEC { +#[doc = "CTI Consumer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_core_ctiin2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_core_ctiin2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerCoreCtiin2Spec; +impl crate::RegisterSpec for ConsumerCoreCtiin2Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_core_ctiin2::R](R) reader structure"] -impl crate::Readable for CONSUMER_CORE_CTIIN2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_core_ctiin2::W](W) writer structure"] -impl crate::Writable for CONSUMER_CORE_CTIIN2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_core_ctiin2::R`](R) reader structure"] +impl crate::Readable for ConsumerCoreCtiin2Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_core_ctiin2::W`](W) writer structure"] +impl crate::Writable for ConsumerCoreCtiin2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_CORE_CTIIN2 to value 0"] -impl crate::Resettable for CONSUMER_CORE_CTIIN2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerCoreCtiin2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_core_ctiin3.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_core_ctiin3.rs index 853f837..ae7bf65 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_core_ctiin3.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_core_ctiin3.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_CORE_CTIIN3` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_CORE_CTIIN3` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_CORE_CTIIN3_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - CTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - CTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "CTI Consumer Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_core_ctiin3](index.html) module"] -pub struct CONSUMER_CORE_CTIIN3_SPEC; -impl crate::RegisterSpec for CONSUMER_CORE_CTIIN3_SPEC { +#[doc = "CTI Consumer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_core_ctiin3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_core_ctiin3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerCoreCtiin3Spec; +impl crate::RegisterSpec for ConsumerCoreCtiin3Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_core_ctiin3::R](R) reader structure"] -impl crate::Readable for CONSUMER_CORE_CTIIN3_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_core_ctiin3::W](W) writer structure"] -impl crate::Writable for CONSUMER_CORE_CTIIN3_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_core_ctiin3::R`](R) reader structure"] +impl crate::Readable for ConsumerCoreCtiin3Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_core_ctiin3::W`](W) writer structure"] +impl crate::Writable for ConsumerCoreCtiin3Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_CORE_CTIIN3 to value 0"] -impl crate::Resettable for CONSUMER_CORE_CTIIN3_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerCoreCtiin3Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_core_m33rxev.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_core_m33rxev.rs index 5af4b0f..9b5c345 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_core_m33rxev.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_core_m33rxev.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_CORE_M33RXEV` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_CORE_M33RXEV` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - M33 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - M33 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_CORE_M33RXEV_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - M33 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - M33 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "M33 Consumer Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_core_m33rxev](index.html) module"] -pub struct CONSUMER_CORE_M33RXEV_SPEC; -impl crate::RegisterSpec for CONSUMER_CORE_M33RXEV_SPEC { +#[doc = "M33 Consumer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_core_m33rxev::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_core_m33rxev::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerCoreM33rxevSpec; +impl crate::RegisterSpec for ConsumerCoreM33rxevSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_core_m33rxev::R](R) reader structure"] -impl crate::Readable for CONSUMER_CORE_M33RXEV_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_core_m33rxev::W](W) writer structure"] -impl crate::Writable for CONSUMER_CORE_M33RXEV_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_core_m33rxev::R`](R) reader structure"] +impl crate::Readable for ConsumerCoreM33rxevSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_core_m33rxev::W`](W) writer structure"] +impl crate::Writable for ConsumerCoreM33rxevSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_CORE_M33RXEV to value 0"] -impl crate::Resettable for CONSUMER_CORE_M33RXEV_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerCoreM33rxevSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart0_clk.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart0_clk.rs index 864e43b..10bb315 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart0_clk.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart0_clk.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_EUSART0_CLK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_EUSART0_CLK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CLK async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CLK async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_EUSART0_CLK_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - CLK async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - CLK async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "CLK consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_eusart0_clk](index.html) module"] -pub struct CONSUMER_EUSART0_CLK_SPEC; -impl crate::RegisterSpec for CONSUMER_EUSART0_CLK_SPEC { +#[doc = "CLK consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart0_clk::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart0_clk::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerEusart0ClkSpec; +impl crate::RegisterSpec for ConsumerEusart0ClkSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_eusart0_clk::R](R) reader structure"] -impl crate::Readable for CONSUMER_EUSART0_CLK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_eusart0_clk::W](W) writer structure"] -impl crate::Writable for CONSUMER_EUSART0_CLK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_eusart0_clk::R`](R) reader structure"] +impl crate::Readable for ConsumerEusart0ClkSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_eusart0_clk::W`](W) writer structure"] +impl crate::Writable for ConsumerEusart0ClkSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_EUSART0_CLK to value 0"] -impl crate::Resettable for CONSUMER_EUSART0_CLK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerEusart0ClkSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart0_rx.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart0_rx.rs index 399c87e..a057d66 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart0_rx.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart0_rx.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_EUSART0_RX` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_EUSART0_RX` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - RX async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - RX async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_EUSART0_RX_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - RX async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - RX async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "RX Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_eusart0_rx](index.html) module"] -pub struct CONSUMER_EUSART0_RX_SPEC; -impl crate::RegisterSpec for CONSUMER_EUSART0_RX_SPEC { +#[doc = "RX Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart0_rx::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart0_rx::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerEusart0RxSpec; +impl crate::RegisterSpec for ConsumerEusart0RxSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_eusart0_rx::R](R) reader structure"] -impl crate::Readable for CONSUMER_EUSART0_RX_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_eusart0_rx::W](W) writer structure"] -impl crate::Writable for CONSUMER_EUSART0_RX_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_eusart0_rx::R`](R) reader structure"] +impl crate::Readable for ConsumerEusart0RxSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_eusart0_rx::W`](W) writer structure"] +impl crate::Writable for ConsumerEusart0RxSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_EUSART0_RX to value 0"] -impl crate::Resettable for CONSUMER_EUSART0_RX_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerEusart0RxSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart0_trigger.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart0_trigger.rs index 5f690e6..93c6df4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart0_trigger.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart0_trigger.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_EUSART0_TRIGGER` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_EUSART0_TRIGGER` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - TRIGGER async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - TRIGGER async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_EUSART0_TRIGGER_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - TRIGGER async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - TRIGGER async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "TRIGGER Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_eusart0_trigger](index.html) module"] -pub struct CONSUMER_EUSART0_TRIGGER_SPEC; -impl crate::RegisterSpec for CONSUMER_EUSART0_TRIGGER_SPEC { +#[doc = "TRIGGER Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart0_trigger::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart0_trigger::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerEusart0TriggerSpec; +impl crate::RegisterSpec for ConsumerEusart0TriggerSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_eusart0_trigger::R](R) reader structure"] -impl crate::Readable for CONSUMER_EUSART0_TRIGGER_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_eusart0_trigger::W](W) writer structure"] -impl crate::Writable for CONSUMER_EUSART0_TRIGGER_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_eusart0_trigger::R`](R) reader structure"] +impl crate::Readable for ConsumerEusart0TriggerSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_eusart0_trigger::W`](W) writer structure"] +impl crate::Writable for ConsumerEusart0TriggerSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_EUSART0_TRIGGER to value 0"] -impl crate::Resettable for CONSUMER_EUSART0_TRIGGER_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerEusart0TriggerSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart1_clk.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart1_clk.rs index 9ac213b..26cc900 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart1_clk.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart1_clk.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_EUSART1_CLK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_EUSART1_CLK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CLK async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CLK async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_EUSART1_CLK_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - CLK async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - CLK async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "CLK consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_eusart1_clk](index.html) module"] -pub struct CONSUMER_EUSART1_CLK_SPEC; -impl crate::RegisterSpec for CONSUMER_EUSART1_CLK_SPEC { +#[doc = "CLK consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart1_clk::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart1_clk::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerEusart1ClkSpec; +impl crate::RegisterSpec for ConsumerEusart1ClkSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_eusart1_clk::R](R) reader structure"] -impl crate::Readable for CONSUMER_EUSART1_CLK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_eusart1_clk::W](W) writer structure"] -impl crate::Writable for CONSUMER_EUSART1_CLK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_eusart1_clk::R`](R) reader structure"] +impl crate::Readable for ConsumerEusart1ClkSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_eusart1_clk::W`](W) writer structure"] +impl crate::Writable for ConsumerEusart1ClkSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_EUSART1_CLK to value 0"] -impl crate::Resettable for CONSUMER_EUSART1_CLK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerEusart1ClkSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart1_rx.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart1_rx.rs index e67c2f3..18647cc 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart1_rx.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart1_rx.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_EUSART1_RX` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_EUSART1_RX` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - RX async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - RX async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_EUSART1_RX_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - RX async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - RX async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "RX Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_eusart1_rx](index.html) module"] -pub struct CONSUMER_EUSART1_RX_SPEC; -impl crate::RegisterSpec for CONSUMER_EUSART1_RX_SPEC { +#[doc = "RX Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart1_rx::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart1_rx::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerEusart1RxSpec; +impl crate::RegisterSpec for ConsumerEusart1RxSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_eusart1_rx::R](R) reader structure"] -impl crate::Readable for CONSUMER_EUSART1_RX_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_eusart1_rx::W](W) writer structure"] -impl crate::Writable for CONSUMER_EUSART1_RX_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_eusart1_rx::R`](R) reader structure"] +impl crate::Readable for ConsumerEusart1RxSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_eusart1_rx::W`](W) writer structure"] +impl crate::Writable for ConsumerEusart1RxSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_EUSART1_RX to value 0"] -impl crate::Resettable for CONSUMER_EUSART1_RX_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerEusart1RxSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart1_trigger.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart1_trigger.rs index acda99a..cd1a1d1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart1_trigger.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart1_trigger.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_EUSART1_TRIGGER` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_EUSART1_TRIGGER` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - TRIGGER async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - TRIGGER async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_EUSART1_TRIGGER_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - TRIGGER async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - TRIGGER async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "TRIGGER Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_eusart1_trigger](index.html) module"] -pub struct CONSUMER_EUSART1_TRIGGER_SPEC; -impl crate::RegisterSpec for CONSUMER_EUSART1_TRIGGER_SPEC { +#[doc = "TRIGGER Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart1_trigger::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart1_trigger::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerEusart1TriggerSpec; +impl crate::RegisterSpec for ConsumerEusart1TriggerSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_eusart1_trigger::R](R) reader structure"] -impl crate::Readable for CONSUMER_EUSART1_TRIGGER_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_eusart1_trigger::W](W) writer structure"] -impl crate::Writable for CONSUMER_EUSART1_TRIGGER_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_eusart1_trigger::R`](R) reader structure"] +impl crate::Readable for ConsumerEusart1TriggerSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_eusart1_trigger::W`](W) writer structure"] +impl crate::Writable for ConsumerEusart1TriggerSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_EUSART1_TRIGGER to value 0"] -impl crate::Resettable for CONSUMER_EUSART1_TRIGGER_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerEusart1TriggerSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart2_clk.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart2_clk.rs index b783e2d..0953166 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart2_clk.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart2_clk.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_EUSART2_CLK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_EUSART2_CLK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CLK async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CLK async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_EUSART2_CLK_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - CLK async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - CLK async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "CLK consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_eusart2_clk](index.html) module"] -pub struct CONSUMER_EUSART2_CLK_SPEC; -impl crate::RegisterSpec for CONSUMER_EUSART2_CLK_SPEC { +#[doc = "CLK consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart2_clk::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart2_clk::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerEusart2ClkSpec; +impl crate::RegisterSpec for ConsumerEusart2ClkSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_eusart2_clk::R](R) reader structure"] -impl crate::Readable for CONSUMER_EUSART2_CLK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_eusart2_clk::W](W) writer structure"] -impl crate::Writable for CONSUMER_EUSART2_CLK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_eusart2_clk::R`](R) reader structure"] +impl crate::Readable for ConsumerEusart2ClkSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_eusart2_clk::W`](W) writer structure"] +impl crate::Writable for ConsumerEusart2ClkSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_EUSART2_CLK to value 0"] -impl crate::Resettable for CONSUMER_EUSART2_CLK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerEusart2ClkSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart2_rx.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart2_rx.rs index bb58f55..440a88b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart2_rx.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart2_rx.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_EUSART2_RX` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_EUSART2_RX` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - RX async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - RX async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_EUSART2_RX_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - RX async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - RX async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "RX Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_eusart2_rx](index.html) module"] -pub struct CONSUMER_EUSART2_RX_SPEC; -impl crate::RegisterSpec for CONSUMER_EUSART2_RX_SPEC { +#[doc = "RX Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart2_rx::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart2_rx::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerEusart2RxSpec; +impl crate::RegisterSpec for ConsumerEusart2RxSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_eusart2_rx::R](R) reader structure"] -impl crate::Readable for CONSUMER_EUSART2_RX_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_eusart2_rx::W](W) writer structure"] -impl crate::Writable for CONSUMER_EUSART2_RX_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_eusart2_rx::R`](R) reader structure"] +impl crate::Readable for ConsumerEusart2RxSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_eusart2_rx::W`](W) writer structure"] +impl crate::Writable for ConsumerEusart2RxSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_EUSART2_RX to value 0"] -impl crate::Resettable for CONSUMER_EUSART2_RX_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerEusart2RxSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart2_trigger.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart2_trigger.rs index 5f29a76..eefcf1a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart2_trigger.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_eusart2_trigger.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_EUSART2_TRIGGER` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_EUSART2_TRIGGER` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - TRIGGER async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - TRIGGER async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_EUSART2_TRIGGER_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - TRIGGER async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - TRIGGER async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "TRIGGER Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_eusart2_trigger](index.html) module"] -pub struct CONSUMER_EUSART2_TRIGGER_SPEC; -impl crate::RegisterSpec for CONSUMER_EUSART2_TRIGGER_SPEC { +#[doc = "TRIGGER Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_eusart2_trigger::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_eusart2_trigger::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerEusart2TriggerSpec; +impl crate::RegisterSpec for ConsumerEusart2TriggerSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_eusart2_trigger::R](R) reader structure"] -impl crate::Readable for CONSUMER_EUSART2_TRIGGER_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_eusart2_trigger::W](W) writer structure"] -impl crate::Writable for CONSUMER_EUSART2_TRIGGER_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_eusart2_trigger::R`](R) reader structure"] +impl crate::Readable for ConsumerEusart2TriggerSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_eusart2_trigger::W`](W) writer structure"] +impl crate::Writable for ConsumerEusart2TriggerSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_EUSART2_TRIGGER to value 0"] -impl crate::Resettable for CONSUMER_EUSART2_TRIGGER_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerEusart2TriggerSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_hfxo0_oscreq.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_hfxo0_oscreq.rs index 534d890..c725e08 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_hfxo0_oscreq.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_hfxo0_oscreq.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_HFXO0_OSCREQ` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_HFXO0_OSCREQ` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - OSC async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - OSC async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_HFXO0_OSCREQ_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - OSC async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - OSC async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "OSCREQ consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_hfxo0_oscreq](index.html) module"] -pub struct CONSUMER_HFXO0_OSCREQ_SPEC; -impl crate::RegisterSpec for CONSUMER_HFXO0_OSCREQ_SPEC { +#[doc = "OSCREQ consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_hfxo0_oscreq::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_hfxo0_oscreq::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerHfxo0OscreqSpec; +impl crate::RegisterSpec for ConsumerHfxo0OscreqSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_hfxo0_oscreq::R](R) reader structure"] -impl crate::Readable for CONSUMER_HFXO0_OSCREQ_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_hfxo0_oscreq::W](W) writer structure"] -impl crate::Writable for CONSUMER_HFXO0_OSCREQ_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_hfxo0_oscreq::R`](R) reader structure"] +impl crate::Readable for ConsumerHfxo0OscreqSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_hfxo0_oscreq::W`](W) writer structure"] +impl crate::Writable for ConsumerHfxo0OscreqSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_HFXO0_OSCREQ to value 0"] -impl crate::Resettable for CONSUMER_HFXO0_OSCREQ_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerHfxo0OscreqSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_hfxo0_timeout.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_hfxo0_timeout.rs index fedd9f9..2d4cb8f 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_hfxo0_timeout.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_hfxo0_timeout.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_HFXO0_TIMEOUT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_HFXO0_TIMEOUT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - TIMEOUT async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - TIMEOUT async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_HFXO0_TIMEOUT_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - TIMEOUT async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - TIMEOUT async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "TIMEOUT Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_hfxo0_timeout](index.html) module"] -pub struct CONSUMER_HFXO0_TIMEOUT_SPEC; -impl crate::RegisterSpec for CONSUMER_HFXO0_TIMEOUT_SPEC { +#[doc = "TIMEOUT Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_hfxo0_timeout::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_hfxo0_timeout::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerHfxo0TimeoutSpec; +impl crate::RegisterSpec for ConsumerHfxo0TimeoutSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_hfxo0_timeout::R](R) reader structure"] -impl crate::Readable for CONSUMER_HFXO0_TIMEOUT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_hfxo0_timeout::W](W) writer structure"] -impl crate::Writable for CONSUMER_HFXO0_TIMEOUT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_hfxo0_timeout::R`](R) reader structure"] +impl crate::Readable for ConsumerHfxo0TimeoutSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_hfxo0_timeout::W`](W) writer structure"] +impl crate::Writable for ConsumerHfxo0TimeoutSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_HFXO0_TIMEOUT to value 0"] -impl crate::Resettable for CONSUMER_HFXO0_TIMEOUT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerHfxo0TimeoutSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_iadc0_scantrigger.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_iadc0_scantrigger.rs index c6ea999..0be67d0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_iadc0_scantrigger.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_iadc0_scantrigger.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_IADC0_SCANTRIGGER` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_IADC0_SCANTRIGGER` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - SCAN async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - SCAN async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_IADC0_SCANTRIGGER_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - SCAN sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - SCAN sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_IADC0_SCANTRIGGER_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - SCAN async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - SCAN sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - SCAN async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - SCAN sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "SCAN consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_iadc0_scantrigger](index.html) module"] -pub struct CONSUMER_IADC0_SCANTRIGGER_SPEC; -impl crate::RegisterSpec for CONSUMER_IADC0_SCANTRIGGER_SPEC { +#[doc = "SCAN consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_iadc0_scantrigger::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_iadc0_scantrigger::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerIadc0ScantriggerSpec; +impl crate::RegisterSpec for ConsumerIadc0ScantriggerSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_iadc0_scantrigger::R](R) reader structure"] -impl crate::Readable for CONSUMER_IADC0_SCANTRIGGER_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_iadc0_scantrigger::W](W) writer structure"] -impl crate::Writable for CONSUMER_IADC0_SCANTRIGGER_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_iadc0_scantrigger::R`](R) reader structure"] +impl crate::Readable for ConsumerIadc0ScantriggerSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_iadc0_scantrigger::W`](W) writer structure"] +impl crate::Writable for ConsumerIadc0ScantriggerSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_IADC0_SCANTRIGGER to value 0"] -impl crate::Resettable for CONSUMER_IADC0_SCANTRIGGER_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerIadc0ScantriggerSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_iadc0_singletrigger.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_iadc0_singletrigger.rs index b038822..a26b07e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_iadc0_singletrigger.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_iadc0_singletrigger.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_IADC0_SINGLETRIGGER` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_IADC0_SINGLETRIGGER` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - SINGLE async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - SINGLE async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_IADC0_SINGLETRIGGER_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - SINGLE sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - SINGLE sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_IADC0_SINGLETRIGGER_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - SINGLE async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - SINGLE sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - SINGLE async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - SINGLE sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "SINGLE Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_iadc0_singletrigger](index.html) module"] -pub struct CONSUMER_IADC0_SINGLETRIGGER_SPEC; -impl crate::RegisterSpec for CONSUMER_IADC0_SINGLETRIGGER_SPEC { +#[doc = "SINGLE Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_iadc0_singletrigger::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_iadc0_singletrigger::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerIadc0SingletriggerSpec; +impl crate::RegisterSpec for ConsumerIadc0SingletriggerSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_iadc0_singletrigger::R](R) reader structure"] -impl crate::Readable for CONSUMER_IADC0_SINGLETRIGGER_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_iadc0_singletrigger::W](W) writer structure"] -impl crate::Writable for CONSUMER_IADC0_SINGLETRIGGER_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_iadc0_singletrigger::R`](R) reader structure"] +impl crate::Readable for ConsumerIadc0SingletriggerSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_iadc0_singletrigger::W`](W) writer structure"] +impl crate::Writable for ConsumerIadc0SingletriggerSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_IADC0_SINGLETRIGGER to value 0"] -impl crate::Resettable for CONSUMER_IADC0_SINGLETRIGGER_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerIadc0SingletriggerSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_ldmaxbar_dmareq0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_ldmaxbar_dmareq0.rs index fb13f84..c539842 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_ldmaxbar_dmareq0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_ldmaxbar_dmareq0.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_LDMAXBAR_DMAREQ0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_LDMAXBAR_DMAREQ0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DMAREQ0 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DMAREQ0 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_LDMAXBAR_DMAREQ0_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DMAREQ0 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DMAREQ0 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DMAREQ0 consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_ldmaxbar_dmareq0](index.html) module"] -pub struct CONSUMER_LDMAXBAR_DMAREQ0_SPEC; -impl crate::RegisterSpec for CONSUMER_LDMAXBAR_DMAREQ0_SPEC { +#[doc = "DMAREQ0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_ldmaxbar_dmareq0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_ldmaxbar_dmareq0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerLdmaxbarDmareq0Spec; +impl crate::RegisterSpec for ConsumerLdmaxbarDmareq0Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_ldmaxbar_dmareq0::R](R) reader structure"] -impl crate::Readable for CONSUMER_LDMAXBAR_DMAREQ0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_ldmaxbar_dmareq0::W](W) writer structure"] -impl crate::Writable for CONSUMER_LDMAXBAR_DMAREQ0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_ldmaxbar_dmareq0::R`](R) reader structure"] +impl crate::Readable for ConsumerLdmaxbarDmareq0Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_ldmaxbar_dmareq0::W`](W) writer structure"] +impl crate::Writable for ConsumerLdmaxbarDmareq0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_LDMAXBAR_DMAREQ0 to value 0"] -impl crate::Resettable for CONSUMER_LDMAXBAR_DMAREQ0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerLdmaxbarDmareq0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_ldmaxbar_dmareq1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_ldmaxbar_dmareq1.rs index 0da231d..cfff2ee 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_ldmaxbar_dmareq1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_ldmaxbar_dmareq1.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_LDMAXBAR_DMAREQ1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_LDMAXBAR_DMAREQ1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DMAREQ1 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DMAREQ1 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_LDMAXBAR_DMAREQ1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DMAREQ1 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DMAREQ1 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DMAREQ1 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_ldmaxbar_dmareq1](index.html) module"] -pub struct CONSUMER_LDMAXBAR_DMAREQ1_SPEC; -impl crate::RegisterSpec for CONSUMER_LDMAXBAR_DMAREQ1_SPEC { +#[doc = "DMAREQ1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_ldmaxbar_dmareq1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_ldmaxbar_dmareq1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerLdmaxbarDmareq1Spec; +impl crate::RegisterSpec for ConsumerLdmaxbarDmareq1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_ldmaxbar_dmareq1::R](R) reader structure"] -impl crate::Readable for CONSUMER_LDMAXBAR_DMAREQ1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_ldmaxbar_dmareq1::W](W) writer structure"] -impl crate::Writable for CONSUMER_LDMAXBAR_DMAREQ1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_ldmaxbar_dmareq1::R`](R) reader structure"] +impl crate::Readable for ConsumerLdmaxbarDmareq1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_ldmaxbar_dmareq1::W`](W) writer structure"] +impl crate::Writable for ConsumerLdmaxbarDmareq1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_LDMAXBAR_DMAREQ1 to value 0"] -impl crate::Resettable for CONSUMER_LDMAXBAR_DMAREQ1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerLdmaxbarDmareq1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_lesense_start.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_lesense_start.rs index 56b0a31..0c1341c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_lesense_start.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_lesense_start.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_LESENSE_START` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_LESENSE_START` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - START async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - START async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_LESENSE_START_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - START async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - START async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "START Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_lesense_start](index.html) module"] -pub struct CONSUMER_LESENSE_START_SPEC; -impl crate::RegisterSpec for CONSUMER_LESENSE_START_SPEC { +#[doc = "START Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_lesense_start::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_lesense_start::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerLesenseStartSpec; +impl crate::RegisterSpec for ConsumerLesenseStartSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_lesense_start::R](R) reader structure"] -impl crate::Readable for CONSUMER_LESENSE_START_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_lesense_start::W](W) writer structure"] -impl crate::Writable for CONSUMER_LESENSE_START_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_lesense_start::R`](R) reader structure"] +impl crate::Readable for ConsumerLesenseStartSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_lesense_start::W`](W) writer structure"] +impl crate::Writable for ConsumerLesenseStartSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_LESENSE_START to value 0"] -impl crate::Resettable for CONSUMER_LESENSE_START_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerLesenseStartSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_letimer0_clear.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_letimer0_clear.rs index f856bd8..5929624 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_letimer0_clear.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_letimer0_clear.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_LETIMER0_CLEAR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_LETIMER0_CLEAR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CLEAR async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CLEAR async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_LETIMER0_CLEAR_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - CLEAR async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - CLEAR async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "CLEAR consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_letimer0_clear](index.html) module"] -pub struct CONSUMER_LETIMER0_CLEAR_SPEC; -impl crate::RegisterSpec for CONSUMER_LETIMER0_CLEAR_SPEC { +#[doc = "CLEAR consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_letimer0_clear::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_letimer0_clear::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerLetimer0ClearSpec; +impl crate::RegisterSpec for ConsumerLetimer0ClearSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_letimer0_clear::R](R) reader structure"] -impl crate::Readable for CONSUMER_LETIMER0_CLEAR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_letimer0_clear::W](W) writer structure"] -impl crate::Writable for CONSUMER_LETIMER0_CLEAR_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_letimer0_clear::R`](R) reader structure"] +impl crate::Readable for ConsumerLetimer0ClearSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_letimer0_clear::W`](W) writer structure"] +impl crate::Writable for ConsumerLetimer0ClearSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_LETIMER0_CLEAR to value 0"] -impl crate::Resettable for CONSUMER_LETIMER0_CLEAR_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerLetimer0ClearSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_letimer0_start.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_letimer0_start.rs index 125ed4d..fedb425 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_letimer0_start.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_letimer0_start.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_LETIMER0_START` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_LETIMER0_START` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - START async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - START async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_LETIMER0_START_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - START async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - START async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "START Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_letimer0_start](index.html) module"] -pub struct CONSUMER_LETIMER0_START_SPEC; -impl crate::RegisterSpec for CONSUMER_LETIMER0_START_SPEC { +#[doc = "START Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_letimer0_start::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_letimer0_start::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerLetimer0StartSpec; +impl crate::RegisterSpec for ConsumerLetimer0StartSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_letimer0_start::R](R) reader structure"] -impl crate::Readable for CONSUMER_LETIMER0_START_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_letimer0_start::W](W) writer structure"] -impl crate::Writable for CONSUMER_LETIMER0_START_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_letimer0_start::R`](R) reader structure"] +impl crate::Readable for ConsumerLetimer0StartSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_letimer0_start::W`](W) writer structure"] +impl crate::Writable for ConsumerLetimer0StartSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_LETIMER0_START to value 0"] -impl crate::Resettable for CONSUMER_LETIMER0_START_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerLetimer0StartSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_letimer0_stop.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_letimer0_stop.rs index e658ba1..14e2b3a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_letimer0_stop.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_letimer0_stop.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_LETIMER0_STOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_LETIMER0_STOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - STOP async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - STOP async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_LETIMER0_STOP_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - STOP async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - STOP async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "STOP Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_letimer0_stop](index.html) module"] -pub struct CONSUMER_LETIMER0_STOP_SPEC; -impl crate::RegisterSpec for CONSUMER_LETIMER0_STOP_SPEC { +#[doc = "STOP Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_letimer0_stop::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_letimer0_stop::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerLetimer0StopSpec; +impl crate::RegisterSpec for ConsumerLetimer0StopSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_letimer0_stop::R](R) reader structure"] -impl crate::Readable for CONSUMER_LETIMER0_STOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_letimer0_stop::W](W) writer structure"] -impl crate::Writable for CONSUMER_LETIMER0_STOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_letimer0_stop::R`](R) reader structure"] +impl crate::Readable for ConsumerLetimer0StopSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_letimer0_stop::W`](W) writer structure"] +impl crate::Writable for ConsumerLetimer0StopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_LETIMER0_STOP to value 0"] -impl crate::Resettable for CONSUMER_LETIMER0_STOP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerLetimer0StopSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_pcnt0_s0in.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_pcnt0_s0in.rs index 141d5e7..742da37 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_pcnt0_s0in.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_pcnt0_s0in.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_PCNT0_S0IN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_PCNT0_S0IN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - S0IN async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - S0IN async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_PCNT0_S0IN_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - S0IN async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - S0IN async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "S0IN consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_pcnt0_s0in](index.html) module"] -pub struct CONSUMER_PCNT0_S0IN_SPEC; -impl crate::RegisterSpec for CONSUMER_PCNT0_S0IN_SPEC { +#[doc = "S0IN consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_pcnt0_s0in::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_pcnt0_s0in::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerPcnt0S0inSpec; +impl crate::RegisterSpec for ConsumerPcnt0S0inSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_pcnt0_s0in::R](R) reader structure"] -impl crate::Readable for CONSUMER_PCNT0_S0IN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_pcnt0_s0in::W](W) writer structure"] -impl crate::Writable for CONSUMER_PCNT0_S0IN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_pcnt0_s0in::R`](R) reader structure"] +impl crate::Readable for ConsumerPcnt0S0inSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_pcnt0_s0in::W`](W) writer structure"] +impl crate::Writable for ConsumerPcnt0S0inSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_PCNT0_S0IN to value 0"] -impl crate::Resettable for CONSUMER_PCNT0_S0IN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerPcnt0S0inSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_pcnt0_s1in.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_pcnt0_s1in.rs index 2984124..3afa5ab 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_pcnt0_s1in.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_pcnt0_s1in.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_PCNT0_S1IN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_PCNT0_S1IN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - S1IN async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - S1IN async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_PCNT0_S1IN_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - S1IN async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - S1IN async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "S1IN Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_pcnt0_s1in](index.html) module"] -pub struct CONSUMER_PCNT0_S1IN_SPEC; -impl crate::RegisterSpec for CONSUMER_PCNT0_S1IN_SPEC { +#[doc = "S1IN Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_pcnt0_s1in::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_pcnt0_s1in::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerPcnt0S1inSpec; +impl crate::RegisterSpec for ConsumerPcnt0S1inSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_pcnt0_s1in::R](R) reader structure"] -impl crate::Readable for CONSUMER_PCNT0_S1IN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_pcnt0_s1in::W](W) writer structure"] -impl crate::Writable for CONSUMER_PCNT0_S1IN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_pcnt0_s1in::R`](R) reader structure"] +impl crate::Readable for ConsumerPcnt0S1inSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_pcnt0_s1in::W`](W) writer structure"] +impl crate::Writable for ConsumerPcnt0S1inSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_PCNT0_S1IN to value 0"] -impl crate::Resettable for CONSUMER_PCNT0_S1IN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerPcnt0S1inSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc25.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc25.rs index a59278c..c7286fc 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc25.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc25.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC25` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC25` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - TAMPERSRC25 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - TAMPERSRC25 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_SETAMPER_TAMPERSRC25_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - TAMPERSRC25 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - TAMPERSRC25 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "TAMPERSRC25 consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_setamper_tampersrc25](index.html) module"] -pub struct CONSUMER_SETAMPER_TAMPERSRC25_SPEC; -impl crate::RegisterSpec for CONSUMER_SETAMPER_TAMPERSRC25_SPEC { +#[doc = "TAMPERSRC25 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc25::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc25::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerSetamperTampersrc25Spec; +impl crate::RegisterSpec for ConsumerSetamperTampersrc25Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_setamper_tampersrc25::R](R) reader structure"] -impl crate::Readable for CONSUMER_SETAMPER_TAMPERSRC25_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_setamper_tampersrc25::W](W) writer structure"] -impl crate::Writable for CONSUMER_SETAMPER_TAMPERSRC25_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_setamper_tampersrc25::R`](R) reader structure"] +impl crate::Readable for ConsumerSetamperTampersrc25Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_setamper_tampersrc25::W`](W) writer structure"] +impl crate::Writable for ConsumerSetamperTampersrc25Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_SETAMPER_TAMPERSRC25 to value 0"] -impl crate::Resettable for CONSUMER_SETAMPER_TAMPERSRC25_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerSetamperTampersrc25Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc26.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc26.rs index c478579..e32cc38 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc26.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc26.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC26` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC26` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - TAMPERSRC26 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - TAMPERSRC26 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_SETAMPER_TAMPERSRC26_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - TAMPERSRC26 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - TAMPERSRC26 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "TAMPERSRC26 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_setamper_tampersrc26](index.html) module"] -pub struct CONSUMER_SETAMPER_TAMPERSRC26_SPEC; -impl crate::RegisterSpec for CONSUMER_SETAMPER_TAMPERSRC26_SPEC { +#[doc = "TAMPERSRC26 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc26::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc26::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerSetamperTampersrc26Spec; +impl crate::RegisterSpec for ConsumerSetamperTampersrc26Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_setamper_tampersrc26::R](R) reader structure"] -impl crate::Readable for CONSUMER_SETAMPER_TAMPERSRC26_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_setamper_tampersrc26::W](W) writer structure"] -impl crate::Writable for CONSUMER_SETAMPER_TAMPERSRC26_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_setamper_tampersrc26::R`](R) reader structure"] +impl crate::Readable for ConsumerSetamperTampersrc26Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_setamper_tampersrc26::W`](W) writer structure"] +impl crate::Writable for ConsumerSetamperTampersrc26Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_SETAMPER_TAMPERSRC26 to value 0"] -impl crate::Resettable for CONSUMER_SETAMPER_TAMPERSRC26_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerSetamperTampersrc26Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc27.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc27.rs index f5d1145..da447f6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc27.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc27.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC27` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC27` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - TAMPERSRC27 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - TAMPERSRC27 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_SETAMPER_TAMPERSRC27_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - TAMPERSRC27 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - TAMPERSRC27 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "TAMPERSRC27 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_setamper_tampersrc27](index.html) module"] -pub struct CONSUMER_SETAMPER_TAMPERSRC27_SPEC; -impl crate::RegisterSpec for CONSUMER_SETAMPER_TAMPERSRC27_SPEC { +#[doc = "TAMPERSRC27 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc27::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc27::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerSetamperTampersrc27Spec; +impl crate::RegisterSpec for ConsumerSetamperTampersrc27Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_setamper_tampersrc27::R](R) reader structure"] -impl crate::Readable for CONSUMER_SETAMPER_TAMPERSRC27_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_setamper_tampersrc27::W](W) writer structure"] -impl crate::Writable for CONSUMER_SETAMPER_TAMPERSRC27_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_setamper_tampersrc27::R`](R) reader structure"] +impl crate::Readable for ConsumerSetamperTampersrc27Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_setamper_tampersrc27::W`](W) writer structure"] +impl crate::Writable for ConsumerSetamperTampersrc27Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_SETAMPER_TAMPERSRC27 to value 0"] -impl crate::Resettable for CONSUMER_SETAMPER_TAMPERSRC27_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerSetamperTampersrc27Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc28.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc28.rs index 0ec3649..a980c53 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc28.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc28.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC28` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC28` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - TAMPERSRC28 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - TAMPERSRC28 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_SETAMPER_TAMPERSRC28_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - TAMPERSRC28 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - TAMPERSRC28 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "TAMPERSRC28 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_setamper_tampersrc28](index.html) module"] -pub struct CONSUMER_SETAMPER_TAMPERSRC28_SPEC; -impl crate::RegisterSpec for CONSUMER_SETAMPER_TAMPERSRC28_SPEC { +#[doc = "TAMPERSRC28 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc28::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc28::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerSetamperTampersrc28Spec; +impl crate::RegisterSpec for ConsumerSetamperTampersrc28Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_setamper_tampersrc28::R](R) reader structure"] -impl crate::Readable for CONSUMER_SETAMPER_TAMPERSRC28_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_setamper_tampersrc28::W](W) writer structure"] -impl crate::Writable for CONSUMER_SETAMPER_TAMPERSRC28_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_setamper_tampersrc28::R`](R) reader structure"] +impl crate::Readable for ConsumerSetamperTampersrc28Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_setamper_tampersrc28::W`](W) writer structure"] +impl crate::Writable for ConsumerSetamperTampersrc28Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_SETAMPER_TAMPERSRC28 to value 0"] -impl crate::Resettable for CONSUMER_SETAMPER_TAMPERSRC28_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerSetamperTampersrc28Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc29.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc29.rs index 8c73d6b..33cbb71 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc29.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc29.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC29` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC29` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - TAMPERSRC29 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - TAMPERSRC29 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_SETAMPER_TAMPERSRC29_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - TAMPERSRC29 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - TAMPERSRC29 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "TAMPERSRC29 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_setamper_tampersrc29](index.html) module"] -pub struct CONSUMER_SETAMPER_TAMPERSRC29_SPEC; -impl crate::RegisterSpec for CONSUMER_SETAMPER_TAMPERSRC29_SPEC { +#[doc = "TAMPERSRC29 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc29::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc29::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerSetamperTampersrc29Spec; +impl crate::RegisterSpec for ConsumerSetamperTampersrc29Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_setamper_tampersrc29::R](R) reader structure"] -impl crate::Readable for CONSUMER_SETAMPER_TAMPERSRC29_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_setamper_tampersrc29::W](W) writer structure"] -impl crate::Writable for CONSUMER_SETAMPER_TAMPERSRC29_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_setamper_tampersrc29::R`](R) reader structure"] +impl crate::Readable for ConsumerSetamperTampersrc29Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_setamper_tampersrc29::W`](W) writer structure"] +impl crate::Writable for ConsumerSetamperTampersrc29Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_SETAMPER_TAMPERSRC29 to value 0"] -impl crate::Resettable for CONSUMER_SETAMPER_TAMPERSRC29_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerSetamperTampersrc29Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc30.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc30.rs index fbab4b3..afb63c8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc30.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc30.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC30` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC30` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - TAMPERSRC30 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - TAMPERSRC30 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_SETAMPER_TAMPERSRC30_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - TAMPERSRC30 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - TAMPERSRC30 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "TAMPERSRC30 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_setamper_tampersrc30](index.html) module"] -pub struct CONSUMER_SETAMPER_TAMPERSRC30_SPEC; -impl crate::RegisterSpec for CONSUMER_SETAMPER_TAMPERSRC30_SPEC { +#[doc = "TAMPERSRC30 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc30::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc30::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerSetamperTampersrc30Spec; +impl crate::RegisterSpec for ConsumerSetamperTampersrc30Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_setamper_tampersrc30::R](R) reader structure"] -impl crate::Readable for CONSUMER_SETAMPER_TAMPERSRC30_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_setamper_tampersrc30::W](W) writer structure"] -impl crate::Writable for CONSUMER_SETAMPER_TAMPERSRC30_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_setamper_tampersrc30::R`](R) reader structure"] +impl crate::Readable for ConsumerSetamperTampersrc30Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_setamper_tampersrc30::W`](W) writer structure"] +impl crate::Writable for ConsumerSetamperTampersrc30Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_SETAMPER_TAMPERSRC30 to value 0"] -impl crate::Resettable for CONSUMER_SETAMPER_TAMPERSRC30_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerSetamperTampersrc30Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc31.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc31.rs index 16a1986..cadc773 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc31.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_setamper_tampersrc31.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC31` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_SETAMPER_TAMPERSRC31` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - TAMPERSRC31 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - TAMPERSRC31 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_SETAMPER_TAMPERSRC31_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - TAMPERSRC31 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - TAMPERSRC31 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "TAMPERSRC31 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_setamper_tampersrc31](index.html) module"] -pub struct CONSUMER_SETAMPER_TAMPERSRC31_SPEC; -impl crate::RegisterSpec for CONSUMER_SETAMPER_TAMPERSRC31_SPEC { +#[doc = "TAMPERSRC31 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_setamper_tampersrc31::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_setamper_tampersrc31::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerSetamperTampersrc31Spec; +impl crate::RegisterSpec for ConsumerSetamperTampersrc31Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_setamper_tampersrc31::R](R) reader structure"] -impl crate::Readable for CONSUMER_SETAMPER_TAMPERSRC31_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_setamper_tampersrc31::W](W) writer structure"] -impl crate::Writable for CONSUMER_SETAMPER_TAMPERSRC31_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_setamper_tampersrc31::R`](R) reader structure"] +impl crate::Readable for ConsumerSetamperTampersrc31Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_setamper_tampersrc31::W`](W) writer structure"] +impl crate::Writable for ConsumerSetamperTampersrc31Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_SETAMPER_TAMPERSRC31 to value 0"] -impl crate::Resettable for CONSUMER_SETAMPER_TAMPERSRC31_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerSetamperTampersrc31Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_sysrtc0_in0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_sysrtc0_in0.rs index 0bee907..270032a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_sysrtc0_in0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_sysrtc0_in0.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_SYSRTC0_IN0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_SYSRTC0_IN0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - IN0 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - IN0 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_SYSRTC0_IN0_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - IN0 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - IN0 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "IN0 consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_sysrtc0_in0](index.html) module"] -pub struct CONSUMER_SYSRTC0_IN0_SPEC; -impl crate::RegisterSpec for CONSUMER_SYSRTC0_IN0_SPEC { +#[doc = "IN0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_sysrtc0_in0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_sysrtc0_in0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerSysrtc0In0Spec; +impl crate::RegisterSpec for ConsumerSysrtc0In0Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_sysrtc0_in0::R](R) reader structure"] -impl crate::Readable for CONSUMER_SYSRTC0_IN0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_sysrtc0_in0::W](W) writer structure"] -impl crate::Writable for CONSUMER_SYSRTC0_IN0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_sysrtc0_in0::R`](R) reader structure"] +impl crate::Readable for ConsumerSysrtc0In0Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_sysrtc0_in0::W`](W) writer structure"] +impl crate::Writable for ConsumerSysrtc0In0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_SYSRTC0_IN0 to value 0"] -impl crate::Resettable for CONSUMER_SYSRTC0_IN0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerSysrtc0In0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_sysrtc0_in1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_sysrtc0_in1.rs index 087ad3b..1853966 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_sysrtc0_in1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_sysrtc0_in1.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_SYSRTC0_IN1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_SYSRTC0_IN1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - IN1 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - IN1 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_SYSRTC0_IN1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - IN1 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - IN1 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "IN1 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_sysrtc0_in1](index.html) module"] -pub struct CONSUMER_SYSRTC0_IN1_SPEC; -impl crate::RegisterSpec for CONSUMER_SYSRTC0_IN1_SPEC { +#[doc = "IN1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_sysrtc0_in1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_sysrtc0_in1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerSysrtc0In1Spec; +impl crate::RegisterSpec for ConsumerSysrtc0In1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_sysrtc0_in1::R](R) reader structure"] -impl crate::Readable for CONSUMER_SYSRTC0_IN1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_sysrtc0_in1::W](W) writer structure"] -impl crate::Writable for CONSUMER_SYSRTC0_IN1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_sysrtc0_in1::R`](R) reader structure"] +impl crate::Readable for ConsumerSysrtc0In1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_sysrtc0_in1::W`](W) writer structure"] +impl crate::Writable for ConsumerSysrtc0In1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_SYSRTC0_IN1 to value 0"] -impl crate::Resettable for CONSUMER_SYSRTC0_IN1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerSysrtc0In1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer0_cc0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer0_cc0.rs index 9863eb4..bec07f0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer0_cc0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer0_cc0.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER0_CC0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER0_CC0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC0 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC0 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER0_CC0_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC0 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC0 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER0_CC0_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC0 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC0 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC0 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC0 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC0 consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer0_cc0](index.html) module"] -pub struct CONSUMER_TIMER0_CC0_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER0_CC0_SPEC { +#[doc = "CC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer0_cc0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer0_cc0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer0Cc0Spec; +impl crate::RegisterSpec for ConsumerTimer0Cc0Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer0_cc0::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER0_CC0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer0_cc0::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER0_CC0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer0_cc0::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer0Cc0Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer0_cc0::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer0Cc0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER0_CC0 to value 0"] -impl crate::Resettable for CONSUMER_TIMER0_CC0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer0Cc0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer0_cc1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer0_cc1.rs index 1c0ac5d..3bbce00 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer0_cc1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer0_cc1.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER0_CC1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER0_CC1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC1 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC1 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER0_CC1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC1 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC1 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER0_CC1_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC1 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC1 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC1 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC1 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC1 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer0_cc1](index.html) module"] -pub struct CONSUMER_TIMER0_CC1_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER0_CC1_SPEC { +#[doc = "CC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer0_cc1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer0_cc1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer0Cc1Spec; +impl crate::RegisterSpec for ConsumerTimer0Cc1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer0_cc1::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER0_CC1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer0_cc1::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER0_CC1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer0_cc1::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer0Cc1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer0_cc1::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer0Cc1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER0_CC1 to value 0"] -impl crate::Resettable for CONSUMER_TIMER0_CC1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer0Cc1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer0_cc2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer0_cc2.rs index 9e0defb..0dc9313 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer0_cc2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer0_cc2.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER0_CC2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER0_CC2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC2 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC2 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER0_CC2_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC2 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC2 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER0_CC2_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC2 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC2 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC2 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC2 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC2 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer0_cc2](index.html) module"] -pub struct CONSUMER_TIMER0_CC2_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER0_CC2_SPEC { +#[doc = "CC2 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer0_cc2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer0_cc2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer0Cc2Spec; +impl crate::RegisterSpec for ConsumerTimer0Cc2Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer0_cc2::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER0_CC2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer0_cc2::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER0_CC2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer0_cc2::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer0Cc2Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer0_cc2::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer0Cc2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER0_CC2 to value 0"] -impl crate::Resettable for CONSUMER_TIMER0_CC2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer0Cc2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer0_dti.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer0_dti.rs index c8e1194..cd7b596 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer0_dti.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer0_dti.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER0_DTI` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER0_DTI` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER0_DTI_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer0_dti](index.html) module"] -pub struct CONSUMER_TIMER0_DTI_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER0_DTI_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer0_dti::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer0_dti::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer0DtiSpec; +impl crate::RegisterSpec for ConsumerTimer0DtiSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer0_dti::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER0_DTI_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer0_dti::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER0_DTI_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer0_dti::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer0DtiSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer0_dti::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer0DtiSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER0_DTI to value 0"] -impl crate::Resettable for CONSUMER_TIMER0_DTI_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer0DtiSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer0_dtifs1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer0_dtifs1.rs index ab8c570..c106c1a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer0_dtifs1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer0_dtifs1.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER0_DTIFS1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER0_DTIFS1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER0_DTIFS1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer0_dtifs1](index.html) module"] -pub struct CONSUMER_TIMER0_DTIFS1_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER0_DTIFS1_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer0_dtifs1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer0_dtifs1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer0Dtifs1Spec; +impl crate::RegisterSpec for ConsumerTimer0Dtifs1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer0_dtifs1::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER0_DTIFS1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer0_dtifs1::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER0_DTIFS1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer0_dtifs1::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer0Dtifs1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer0_dtifs1::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer0Dtifs1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER0_DTIFS1 to value 0"] -impl crate::Resettable for CONSUMER_TIMER0_DTIFS1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer0Dtifs1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer0_dtifs2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer0_dtifs2.rs index aef135e..967a68a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer0_dtifs2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer0_dtifs2.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER0_DTIFS2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER0_DTIFS2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER0_DTIFS2_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer0_dtifs2](index.html) module"] -pub struct CONSUMER_TIMER0_DTIFS2_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER0_DTIFS2_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer0_dtifs2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer0_dtifs2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer0Dtifs2Spec; +impl crate::RegisterSpec for ConsumerTimer0Dtifs2Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer0_dtifs2::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER0_DTIFS2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer0_dtifs2::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER0_DTIFS2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer0_dtifs2::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer0Dtifs2Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer0_dtifs2::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer0Dtifs2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER0_DTIFS2 to value 0"] -impl crate::Resettable for CONSUMER_TIMER0_DTIFS2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer0Dtifs2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer1_cc0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer1_cc0.rs index 808ca82..7cadd90 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer1_cc0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer1_cc0.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER1_CC0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER1_CC0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC0 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC0 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER1_CC0_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC0 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC0 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER1_CC0_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC0 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC0 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC0 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC0 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC0 consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer1_cc0](index.html) module"] -pub struct CONSUMER_TIMER1_CC0_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER1_CC0_SPEC { +#[doc = "CC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer1_cc0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer1_cc0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer1Cc0Spec; +impl crate::RegisterSpec for ConsumerTimer1Cc0Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer1_cc0::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER1_CC0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer1_cc0::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER1_CC0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer1_cc0::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer1Cc0Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer1_cc0::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer1Cc0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER1_CC0 to value 0"] -impl crate::Resettable for CONSUMER_TIMER1_CC0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer1Cc0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer1_cc1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer1_cc1.rs index fb2b169..ab1779b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer1_cc1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer1_cc1.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER1_CC1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER1_CC1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC1 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC1 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER1_CC1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC1 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC1 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER1_CC1_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC1 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC1 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC1 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC1 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC1 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer1_cc1](index.html) module"] -pub struct CONSUMER_TIMER1_CC1_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER1_CC1_SPEC { +#[doc = "CC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer1_cc1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer1_cc1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer1Cc1Spec; +impl crate::RegisterSpec for ConsumerTimer1Cc1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer1_cc1::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER1_CC1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer1_cc1::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER1_CC1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer1_cc1::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer1Cc1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer1_cc1::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer1Cc1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER1_CC1 to value 0"] -impl crate::Resettable for CONSUMER_TIMER1_CC1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer1Cc1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer1_cc2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer1_cc2.rs index f094225..fc9bef0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer1_cc2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer1_cc2.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER1_CC2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER1_CC2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC2 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC2 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER1_CC2_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC2 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC2 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER1_CC2_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC2 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC2 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC2 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC2 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC2 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer1_cc2](index.html) module"] -pub struct CONSUMER_TIMER1_CC2_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER1_CC2_SPEC { +#[doc = "CC2 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer1_cc2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer1_cc2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer1Cc2Spec; +impl crate::RegisterSpec for ConsumerTimer1Cc2Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer1_cc2::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER1_CC2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer1_cc2::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER1_CC2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer1_cc2::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer1Cc2Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer1_cc2::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer1Cc2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER1_CC2 to value 0"] -impl crate::Resettable for CONSUMER_TIMER1_CC2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer1Cc2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer1_dti.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer1_dti.rs index 87ac70a..046677e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer1_dti.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer1_dti.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER1_DTI` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER1_DTI` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER1_DTI_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer1_dti](index.html) module"] -pub struct CONSUMER_TIMER1_DTI_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER1_DTI_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer1_dti::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer1_dti::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer1DtiSpec; +impl crate::RegisterSpec for ConsumerTimer1DtiSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer1_dti::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER1_DTI_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer1_dti::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER1_DTI_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer1_dti::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer1DtiSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer1_dti::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer1DtiSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER1_DTI to value 0"] -impl crate::Resettable for CONSUMER_TIMER1_DTI_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer1DtiSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer1_dtifs1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer1_dtifs1.rs index e158d55..16abeb3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer1_dtifs1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer1_dtifs1.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER1_DTIFS1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER1_DTIFS1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER1_DTIFS1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer1_dtifs1](index.html) module"] -pub struct CONSUMER_TIMER1_DTIFS1_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER1_DTIFS1_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer1_dtifs1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer1_dtifs1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer1Dtifs1Spec; +impl crate::RegisterSpec for ConsumerTimer1Dtifs1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer1_dtifs1::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER1_DTIFS1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer1_dtifs1::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER1_DTIFS1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer1_dtifs1::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer1Dtifs1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer1_dtifs1::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer1Dtifs1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER1_DTIFS1 to value 0"] -impl crate::Resettable for CONSUMER_TIMER1_DTIFS1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer1Dtifs1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer1_dtifs2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer1_dtifs2.rs index e2f4021..6fa7bb2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer1_dtifs2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer1_dtifs2.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER1_DTIFS2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER1_DTIFS2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER1_DTIFS2_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer1_dtifs2](index.html) module"] -pub struct CONSUMER_TIMER1_DTIFS2_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER1_DTIFS2_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer1_dtifs2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer1_dtifs2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer1Dtifs2Spec; +impl crate::RegisterSpec for ConsumerTimer1Dtifs2Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer1_dtifs2::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER1_DTIFS2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer1_dtifs2::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER1_DTIFS2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer1_dtifs2::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer1Dtifs2Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer1_dtifs2::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer1Dtifs2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER1_DTIFS2 to value 0"] -impl crate::Resettable for CONSUMER_TIMER1_DTIFS2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer1Dtifs2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer2_cc0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer2_cc0.rs index 7c8be93..6072834 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer2_cc0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer2_cc0.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER2_CC0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER2_CC0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC0 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC0 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER2_CC0_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC0 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC0 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER2_CC0_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC0 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC0 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC0 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC0 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC0 consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer2_cc0](index.html) module"] -pub struct CONSUMER_TIMER2_CC0_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER2_CC0_SPEC { +#[doc = "CC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer2_cc0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer2_cc0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer2Cc0Spec; +impl crate::RegisterSpec for ConsumerTimer2Cc0Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer2_cc0::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER2_CC0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer2_cc0::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER2_CC0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer2_cc0::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer2Cc0Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer2_cc0::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer2Cc0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER2_CC0 to value 0"] -impl crate::Resettable for CONSUMER_TIMER2_CC0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer2Cc0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer2_cc1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer2_cc1.rs index 15965ff..44b3e8d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer2_cc1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer2_cc1.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER2_CC1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER2_CC1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC1 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC1 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER2_CC1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC1 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC1 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER2_CC1_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC1 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC1 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC1 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC1 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC1 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer2_cc1](index.html) module"] -pub struct CONSUMER_TIMER2_CC1_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER2_CC1_SPEC { +#[doc = "CC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer2_cc1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer2_cc1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer2Cc1Spec; +impl crate::RegisterSpec for ConsumerTimer2Cc1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer2_cc1::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER2_CC1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer2_cc1::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER2_CC1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer2_cc1::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer2Cc1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer2_cc1::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer2Cc1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER2_CC1 to value 0"] -impl crate::Resettable for CONSUMER_TIMER2_CC1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer2Cc1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer2_cc2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer2_cc2.rs index 861c970..c0b2729 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer2_cc2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer2_cc2.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER2_CC2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER2_CC2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC2 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC2 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER2_CC2_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC2 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC2 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER2_CC2_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC2 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC2 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC2 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC2 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC2 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer2_cc2](index.html) module"] -pub struct CONSUMER_TIMER2_CC2_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER2_CC2_SPEC { +#[doc = "CC2 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer2_cc2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer2_cc2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer2Cc2Spec; +impl crate::RegisterSpec for ConsumerTimer2Cc2Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer2_cc2::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER2_CC2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer2_cc2::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER2_CC2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer2_cc2::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer2Cc2Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer2_cc2::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer2Cc2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER2_CC2 to value 0"] -impl crate::Resettable for CONSUMER_TIMER2_CC2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer2Cc2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer2_dti.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer2_dti.rs index 25ddbae..6f55334 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer2_dti.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer2_dti.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER2_DTI` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER2_DTI` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER2_DTI_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer2_dti](index.html) module"] -pub struct CONSUMER_TIMER2_DTI_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER2_DTI_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer2_dti::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer2_dti::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer2DtiSpec; +impl crate::RegisterSpec for ConsumerTimer2DtiSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer2_dti::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER2_DTI_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer2_dti::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER2_DTI_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer2_dti::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer2DtiSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer2_dti::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer2DtiSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER2_DTI to value 0"] -impl crate::Resettable for CONSUMER_TIMER2_DTI_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer2DtiSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer2_dtifs1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer2_dtifs1.rs index 98a3d55..c2347a2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer2_dtifs1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer2_dtifs1.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER2_DTIFS1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER2_DTIFS1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER2_DTIFS1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer2_dtifs1](index.html) module"] -pub struct CONSUMER_TIMER2_DTIFS1_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER2_DTIFS1_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer2_dtifs1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer2_dtifs1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer2Dtifs1Spec; +impl crate::RegisterSpec for ConsumerTimer2Dtifs1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer2_dtifs1::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER2_DTIFS1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer2_dtifs1::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER2_DTIFS1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer2_dtifs1::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer2Dtifs1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer2_dtifs1::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer2Dtifs1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER2_DTIFS1 to value 0"] -impl crate::Resettable for CONSUMER_TIMER2_DTIFS1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer2Dtifs1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer2_dtifs2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer2_dtifs2.rs index fb41428..8ffa4b8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer2_dtifs2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer2_dtifs2.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER2_DTIFS2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER2_DTIFS2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER2_DTIFS2_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer2_dtifs2](index.html) module"] -pub struct CONSUMER_TIMER2_DTIFS2_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER2_DTIFS2_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer2_dtifs2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer2_dtifs2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer2Dtifs2Spec; +impl crate::RegisterSpec for ConsumerTimer2Dtifs2Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer2_dtifs2::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER2_DTIFS2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer2_dtifs2::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER2_DTIFS2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer2_dtifs2::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer2Dtifs2Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer2_dtifs2::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer2Dtifs2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER2_DTIFS2 to value 0"] -impl crate::Resettable for CONSUMER_TIMER2_DTIFS2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer2Dtifs2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer3_cc0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer3_cc0.rs index 229e6f4..1b16277 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer3_cc0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer3_cc0.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER3_CC0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER3_CC0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC0 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC0 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER3_CC0_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC0 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC0 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER3_CC0_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC0 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC0 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC0 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC0 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC0 consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer3_cc0](index.html) module"] -pub struct CONSUMER_TIMER3_CC0_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER3_CC0_SPEC { +#[doc = "CC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer3_cc0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer3_cc0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer3Cc0Spec; +impl crate::RegisterSpec for ConsumerTimer3Cc0Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer3_cc0::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER3_CC0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer3_cc0::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER3_CC0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer3_cc0::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer3Cc0Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer3_cc0::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer3Cc0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER3_CC0 to value 0"] -impl crate::Resettable for CONSUMER_TIMER3_CC0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer3Cc0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer3_cc1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer3_cc1.rs index e763c25..3e51955 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer3_cc1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer3_cc1.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER3_CC1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER3_CC1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC1 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC1 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER3_CC1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC1 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC1 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER3_CC1_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC1 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC1 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC1 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC1 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC1 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer3_cc1](index.html) module"] -pub struct CONSUMER_TIMER3_CC1_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER3_CC1_SPEC { +#[doc = "CC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer3_cc1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer3_cc1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer3Cc1Spec; +impl crate::RegisterSpec for ConsumerTimer3Cc1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer3_cc1::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER3_CC1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer3_cc1::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER3_CC1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer3_cc1::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer3Cc1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer3_cc1::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer3Cc1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER3_CC1 to value 0"] -impl crate::Resettable for CONSUMER_TIMER3_CC1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer3Cc1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer3_cc2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer3_cc2.rs index 6af32a2..78dfc24 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer3_cc2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer3_cc2.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER3_CC2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER3_CC2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC2 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC2 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER3_CC2_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC2 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC2 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER3_CC2_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC2 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC2 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC2 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC2 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC2 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer3_cc2](index.html) module"] -pub struct CONSUMER_TIMER3_CC2_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER3_CC2_SPEC { +#[doc = "CC2 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer3_cc2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer3_cc2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer3Cc2Spec; +impl crate::RegisterSpec for ConsumerTimer3Cc2Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer3_cc2::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER3_CC2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer3_cc2::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER3_CC2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer3_cc2::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer3Cc2Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer3_cc2::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer3Cc2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER3_CC2 to value 0"] -impl crate::Resettable for CONSUMER_TIMER3_CC2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer3Cc2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer3_dti.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer3_dti.rs index f21b80b..81ee0e7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer3_dti.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer3_dti.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER3_DTI` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER3_DTI` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER3_DTI_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer3_dti](index.html) module"] -pub struct CONSUMER_TIMER3_DTI_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER3_DTI_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer3_dti::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer3_dti::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer3DtiSpec; +impl crate::RegisterSpec for ConsumerTimer3DtiSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer3_dti::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER3_DTI_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer3_dti::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER3_DTI_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer3_dti::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer3DtiSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer3_dti::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer3DtiSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER3_DTI to value 0"] -impl crate::Resettable for CONSUMER_TIMER3_DTI_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer3DtiSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer3_dtifs1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer3_dtifs1.rs index 9cb29d3..ad774af 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer3_dtifs1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer3_dtifs1.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER3_DTIFS1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER3_DTIFS1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER3_DTIFS1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer3_dtifs1](index.html) module"] -pub struct CONSUMER_TIMER3_DTIFS1_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER3_DTIFS1_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer3_dtifs1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer3_dtifs1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer3Dtifs1Spec; +impl crate::RegisterSpec for ConsumerTimer3Dtifs1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer3_dtifs1::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER3_DTIFS1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer3_dtifs1::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER3_DTIFS1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer3_dtifs1::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer3Dtifs1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer3_dtifs1::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer3Dtifs1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER3_DTIFS1 to value 0"] -impl crate::Resettable for CONSUMER_TIMER3_DTIFS1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer3Dtifs1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer3_dtifs2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer3_dtifs2.rs index 350b801..6803949 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer3_dtifs2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer3_dtifs2.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER3_DTIFS2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER3_DTIFS2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER3_DTIFS2_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer3_dtifs2](index.html) module"] -pub struct CONSUMER_TIMER3_DTIFS2_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER3_DTIFS2_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer3_dtifs2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer3_dtifs2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer3Dtifs2Spec; +impl crate::RegisterSpec for ConsumerTimer3Dtifs2Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer3_dtifs2::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER3_DTIFS2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer3_dtifs2::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER3_DTIFS2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer3_dtifs2::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer3Dtifs2Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer3_dtifs2::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer3Dtifs2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER3_DTIFS2 to value 0"] -impl crate::Resettable for CONSUMER_TIMER3_DTIFS2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer3Dtifs2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer4_cc0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer4_cc0.rs index 5a4ceb5..c393539 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer4_cc0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer4_cc0.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER4_CC0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER4_CC0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC0 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC0 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER4_CC0_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC0 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC0 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER4_CC0_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC0 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC0 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC0 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC0 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC0 consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer4_cc0](index.html) module"] -pub struct CONSUMER_TIMER4_CC0_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER4_CC0_SPEC { +#[doc = "CC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer4_cc0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer4_cc0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer4Cc0Spec; +impl crate::RegisterSpec for ConsumerTimer4Cc0Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer4_cc0::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER4_CC0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer4_cc0::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER4_CC0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer4_cc0::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer4Cc0Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer4_cc0::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer4Cc0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER4_CC0 to value 0"] -impl crate::Resettable for CONSUMER_TIMER4_CC0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer4Cc0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer4_cc1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer4_cc1.rs index 50dd374..09c6cd3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer4_cc1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer4_cc1.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER4_CC1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER4_CC1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC1 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC1 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER4_CC1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC1 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC1 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER4_CC1_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC1 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC1 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC1 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC1 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC1 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer4_cc1](index.html) module"] -pub struct CONSUMER_TIMER4_CC1_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER4_CC1_SPEC { +#[doc = "CC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer4_cc1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer4_cc1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer4Cc1Spec; +impl crate::RegisterSpec for ConsumerTimer4Cc1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer4_cc1::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER4_CC1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer4_cc1::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER4_CC1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer4_cc1::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer4Cc1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer4_cc1::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer4Cc1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER4_CC1 to value 0"] -impl crate::Resettable for CONSUMER_TIMER4_CC1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer4Cc1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer4_cc2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer4_cc2.rs index cf91104..2bbc653 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer4_cc2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer4_cc2.rs @@ -1,97 +1,55 @@ #[doc = "Register `CONSUMER_TIMER4_CC2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER4_CC2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CC2 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CC2 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER4_CC2_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `SPRSSEL` reader - CC2 sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - CC2 sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER4_CC2_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:3 - CC2 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - CC2 sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - CC2 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } #[doc = "Bits 8:9 - CC2 sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "CC2 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer4_cc2](index.html) module"] -pub struct CONSUMER_TIMER4_CC2_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER4_CC2_SPEC { +#[doc = "CC2 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer4_cc2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer4_cc2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer4Cc2Spec; +impl crate::RegisterSpec for ConsumerTimer4Cc2Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer4_cc2::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER4_CC2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer4_cc2::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER4_CC2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer4_cc2::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer4Cc2Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer4_cc2::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer4Cc2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER4_CC2 to value 0"] -impl crate::Resettable for CONSUMER_TIMER4_CC2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer4Cc2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer4_dti.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer4_dti.rs index 34e9676..f9b4d1e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer4_dti.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer4_dti.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER4_DTI` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER4_DTI` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER4_DTI_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer4_dti](index.html) module"] -pub struct CONSUMER_TIMER4_DTI_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER4_DTI_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer4_dti::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer4_dti::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer4DtiSpec; +impl crate::RegisterSpec for ConsumerTimer4DtiSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer4_dti::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER4_DTI_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer4_dti::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER4_DTI_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer4_dti::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer4DtiSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer4_dti::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer4DtiSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER4_DTI to value 0"] -impl crate::Resettable for CONSUMER_TIMER4_DTI_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer4DtiSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer4_dtifs1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer4_dtifs1.rs index 338f259..9b916c1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer4_dtifs1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer4_dtifs1.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER4_DTIFS1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER4_DTIFS1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER4_DTIFS1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer4_dtifs1](index.html) module"] -pub struct CONSUMER_TIMER4_DTIFS1_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER4_DTIFS1_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer4_dtifs1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer4_dtifs1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer4Dtifs1Spec; +impl crate::RegisterSpec for ConsumerTimer4Dtifs1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer4_dtifs1::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER4_DTIFS1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer4_dtifs1::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER4_DTIFS1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer4_dtifs1::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer4Dtifs1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer4_dtifs1::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer4Dtifs1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER4_DTIFS1 to value 0"] -impl crate::Resettable for CONSUMER_TIMER4_DTIFS1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer4Dtifs1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer4_dtifs2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer4_dtifs2.rs index 16f7ee5..b1caadb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer4_dtifs2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_timer4_dtifs2.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_TIMER4_DTIFS2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_TIMER4_DTIFS2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - DTI async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - DTI async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_TIMER4_DTIFS2_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - DTI async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "DTI Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_timer4_dtifs2](index.html) module"] -pub struct CONSUMER_TIMER4_DTIFS2_SPEC; -impl crate::RegisterSpec for CONSUMER_TIMER4_DTIFS2_SPEC { +#[doc = "DTI Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_timer4_dtifs2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_timer4_dtifs2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerTimer4Dtifs2Spec; +impl crate::RegisterSpec for ConsumerTimer4Dtifs2Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_timer4_dtifs2::R](R) reader structure"] -impl crate::Readable for CONSUMER_TIMER4_DTIFS2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_timer4_dtifs2::W](W) writer structure"] -impl crate::Writable for CONSUMER_TIMER4_DTIFS2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_timer4_dtifs2::R`](R) reader structure"] +impl crate::Readable for ConsumerTimer4Dtifs2Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_timer4_dtifs2::W`](W) writer structure"] +impl crate::Writable for ConsumerTimer4Dtifs2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_TIMER4_DTIFS2 to value 0"] -impl crate::Resettable for CONSUMER_TIMER4_DTIFS2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerTimer4Dtifs2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_usart0_clk.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_usart0_clk.rs index b3cfd81..97aa1e0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_usart0_clk.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_usart0_clk.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_USART0_CLK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_USART0_CLK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - CLK async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - CLK async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_USART0_CLK_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - CLK async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - CLK async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "CLK consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_usart0_clk](index.html) module"] -pub struct CONSUMER_USART0_CLK_SPEC; -impl crate::RegisterSpec for CONSUMER_USART0_CLK_SPEC { +#[doc = "CLK consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_usart0_clk::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_usart0_clk::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerUsart0ClkSpec; +impl crate::RegisterSpec for ConsumerUsart0ClkSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_usart0_clk::R](R) reader structure"] -impl crate::Readable for CONSUMER_USART0_CLK_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_usart0_clk::W](W) writer structure"] -impl crate::Writable for CONSUMER_USART0_CLK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_usart0_clk::R`](R) reader structure"] +impl crate::Readable for ConsumerUsart0ClkSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_usart0_clk::W`](W) writer structure"] +impl crate::Writable for ConsumerUsart0ClkSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_USART0_CLK to value 0"] -impl crate::Resettable for CONSUMER_USART0_CLK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerUsart0ClkSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_usart0_ir.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_usart0_ir.rs index 1761a55..027086b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_usart0_ir.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_usart0_ir.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_USART0_IR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_USART0_IR` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - IR async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - IR async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_USART0_IR_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - IR async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - IR async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "IR Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_usart0_ir](index.html) module"] -pub struct CONSUMER_USART0_IR_SPEC; -impl crate::RegisterSpec for CONSUMER_USART0_IR_SPEC { +#[doc = "IR Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_usart0_ir::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_usart0_ir::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerUsart0IrSpec; +impl crate::RegisterSpec for ConsumerUsart0IrSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_usart0_ir::R](R) reader structure"] -impl crate::Readable for CONSUMER_USART0_IR_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_usart0_ir::W](W) writer structure"] -impl crate::Writable for CONSUMER_USART0_IR_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_usart0_ir::R`](R) reader structure"] +impl crate::Readable for ConsumerUsart0IrSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_usart0_ir::W`](W) writer structure"] +impl crate::Writable for ConsumerUsart0IrSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_USART0_IR to value 0"] -impl crate::Resettable for CONSUMER_USART0_IR_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerUsart0IrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_usart0_rx.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_usart0_rx.rs index 8305d8c..fec43de 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_usart0_rx.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_usart0_rx.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_USART0_RX` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_USART0_RX` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - RX async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - RX async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_USART0_RX_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - RX async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - RX async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "RX Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_usart0_rx](index.html) module"] -pub struct CONSUMER_USART0_RX_SPEC; -impl crate::RegisterSpec for CONSUMER_USART0_RX_SPEC { +#[doc = "RX Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_usart0_rx::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_usart0_rx::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerUsart0RxSpec; +impl crate::RegisterSpec for ConsumerUsart0RxSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_usart0_rx::R](R) reader structure"] -impl crate::Readable for CONSUMER_USART0_RX_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_usart0_rx::W](W) writer structure"] -impl crate::Writable for CONSUMER_USART0_RX_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_usart0_rx::R`](R) reader structure"] +impl crate::Readable for ConsumerUsart0RxSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_usart0_rx::W`](W) writer structure"] +impl crate::Writable for ConsumerUsart0RxSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_USART0_RX to value 0"] -impl crate::Resettable for CONSUMER_USART0_RX_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerUsart0RxSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_usart0_trigger.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_usart0_trigger.rs index cfe2cd4..4336d75 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_usart0_trigger.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_usart0_trigger.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_USART0_TRIGGER` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_USART0_TRIGGER` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - TRIGGER async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - TRIGGER async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_USART0_TRIGGER_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - TRIGGER async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - TRIGGER async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "TRIGGER Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_usart0_trigger](index.html) module"] -pub struct CONSUMER_USART0_TRIGGER_SPEC; -impl crate::RegisterSpec for CONSUMER_USART0_TRIGGER_SPEC { +#[doc = "TRIGGER Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_usart0_trigger::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_usart0_trigger::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerUsart0TriggerSpec; +impl crate::RegisterSpec for ConsumerUsart0TriggerSpec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_usart0_trigger::R](R) reader structure"] -impl crate::Readable for CONSUMER_USART0_TRIGGER_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_usart0_trigger::W](W) writer structure"] -impl crate::Writable for CONSUMER_USART0_TRIGGER_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_usart0_trigger::R`](R) reader structure"] +impl crate::Readable for ConsumerUsart0TriggerSpec {} +#[doc = "`write(|w| ..)` method takes [`consumer_usart0_trigger::W`](W) writer structure"] +impl crate::Writable for ConsumerUsart0TriggerSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_USART0_TRIGGER to value 0"] -impl crate::Resettable for CONSUMER_USART0_TRIGGER_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerUsart0TriggerSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_vdac0_asynctrigch0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_vdac0_asynctrigch0.rs index 210a9b6..63e7e37 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_vdac0_asynctrigch0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_vdac0_asynctrigch0.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_VDAC0_ASYNCTRIGCH0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_VDAC0_ASYNCTRIGCH0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - ASYNCTRIG async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - ASYNCTRIG async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_VDAC0_ASYNCTRIGCH0_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - ASYNCTRIG async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - ASYNCTRIG async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "ASYNCTRIG consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_vdac0_asynctrigch0](index.html) module"] -pub struct CONSUMER_VDAC0_ASYNCTRIGCH0_SPEC; -impl crate::RegisterSpec for CONSUMER_VDAC0_ASYNCTRIGCH0_SPEC { +#[doc = "ASYNCTRIG consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_vdac0_asynctrigch0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_vdac0_asynctrigch0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerVdac0Asynctrigch0Spec; +impl crate::RegisterSpec for ConsumerVdac0Asynctrigch0Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_vdac0_asynctrigch0::R](R) reader structure"] -impl crate::Readable for CONSUMER_VDAC0_ASYNCTRIGCH0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_vdac0_asynctrigch0::W](W) writer structure"] -impl crate::Writable for CONSUMER_VDAC0_ASYNCTRIGCH0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_vdac0_asynctrigch0::R`](R) reader structure"] +impl crate::Readable for ConsumerVdac0Asynctrigch0Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_vdac0_asynctrigch0::W`](W) writer structure"] +impl crate::Writable for ConsumerVdac0Asynctrigch0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_VDAC0_ASYNCTRIGCH0 to value 0"] -impl crate::Resettable for CONSUMER_VDAC0_ASYNCTRIGCH0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerVdac0Asynctrigch0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_vdac0_asynctrigch1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_vdac0_asynctrigch1.rs index 664f430..c3db7c3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_vdac0_asynctrigch1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_vdac0_asynctrigch1.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_VDAC0_ASYNCTRIGCH1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_VDAC0_ASYNCTRIGCH1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - ASYNCTRIG async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - ASYNCTRIG async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_VDAC0_ASYNCTRIGCH1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - ASYNCTRIG async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - ASYNCTRIG async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "ASYNCTRIG Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_vdac0_asynctrigch1](index.html) module"] -pub struct CONSUMER_VDAC0_ASYNCTRIGCH1_SPEC; -impl crate::RegisterSpec for CONSUMER_VDAC0_ASYNCTRIGCH1_SPEC { +#[doc = "ASYNCTRIG Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_vdac0_asynctrigch1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_vdac0_asynctrigch1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerVdac0Asynctrigch1Spec; +impl crate::RegisterSpec for ConsumerVdac0Asynctrigch1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_vdac0_asynctrigch1::R](R) reader structure"] -impl crate::Readable for CONSUMER_VDAC0_ASYNCTRIGCH1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_vdac0_asynctrigch1::W](W) writer structure"] -impl crate::Writable for CONSUMER_VDAC0_ASYNCTRIGCH1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_vdac0_asynctrigch1::R`](R) reader structure"] +impl crate::Readable for ConsumerVdac0Asynctrigch1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_vdac0_asynctrigch1::W`](W) writer structure"] +impl crate::Writable for ConsumerVdac0Asynctrigch1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_VDAC0_ASYNCTRIGCH1 to value 0"] -impl crate::Resettable for CONSUMER_VDAC0_ASYNCTRIGCH1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerVdac0Asynctrigch1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_vdac0_synctrigch0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_vdac0_synctrigch0.rs index d4da9f9..3e8f595 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_vdac0_synctrigch0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_vdac0_synctrigch0.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_VDAC0_SYNCTRIGCH0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_VDAC0_SYNCTRIGCH0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SPRSSEL` reader - SYNCTRIG sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - SYNCTRIG sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_VDAC0_SYNCTRIGCH0_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 8:9 - SYNCTRIG sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 8:9 - SYNCTRIG sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "SYNCTRIG Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_vdac0_synctrigch0](index.html) module"] -pub struct CONSUMER_VDAC0_SYNCTRIGCH0_SPEC; -impl crate::RegisterSpec for CONSUMER_VDAC0_SYNCTRIGCH0_SPEC { +#[doc = "SYNCTRIG Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_vdac0_synctrigch0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_vdac0_synctrigch0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerVdac0Synctrigch0Spec; +impl crate::RegisterSpec for ConsumerVdac0Synctrigch0Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_vdac0_synctrigch0::R](R) reader structure"] -impl crate::Readable for CONSUMER_VDAC0_SYNCTRIGCH0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_vdac0_synctrigch0::W](W) writer structure"] -impl crate::Writable for CONSUMER_VDAC0_SYNCTRIGCH0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_vdac0_synctrigch0::R`](R) reader structure"] +impl crate::Readable for ConsumerVdac0Synctrigch0Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_vdac0_synctrigch0::W`](W) writer structure"] +impl crate::Writable for ConsumerVdac0Synctrigch0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_VDAC0_SYNCTRIGCH0 to value 0"] -impl crate::Resettable for CONSUMER_VDAC0_SYNCTRIGCH0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerVdac0Synctrigch0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_vdac0_synctrigch1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_vdac0_synctrigch1.rs index a8410da..12088e9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_vdac0_synctrigch1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_vdac0_synctrigch1.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_VDAC0_SYNCTRIGCH1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_VDAC0_SYNCTRIGCH1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SPRSSEL` reader - SYNCTRIG sync channel select"] -pub type SPRSSEL_R = crate::FieldReader; +pub type SprsselR = crate::FieldReader; #[doc = "Field `SPRSSEL` writer - SYNCTRIG sync channel select"] -pub type SPRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_VDAC0_SYNCTRIGCH1_SPEC, u8, u8, 2, O>; +pub type SprsselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 8:9 - SYNCTRIG sync channel select"] #[inline(always)] - pub fn sprssel(&self) -> SPRSSEL_R { - SPRSSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn sprssel(&self) -> SprsselR { + SprsselR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 8:9 - SYNCTRIG sync channel select"] #[inline(always)] #[must_use] - pub fn sprssel(&mut self) -> SPRSSEL_W<8> { - SPRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sprssel(&mut self) -> SprsselW { + SprsselW::new(self, 8) } } -#[doc = "SYNCTRIG Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_vdac0_synctrigch1](index.html) module"] -pub struct CONSUMER_VDAC0_SYNCTRIGCH1_SPEC; -impl crate::RegisterSpec for CONSUMER_VDAC0_SYNCTRIGCH1_SPEC { +#[doc = "SYNCTRIG Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_vdac0_synctrigch1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_vdac0_synctrigch1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerVdac0Synctrigch1Spec; +impl crate::RegisterSpec for ConsumerVdac0Synctrigch1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_vdac0_synctrigch1::R](R) reader structure"] -impl crate::Readable for CONSUMER_VDAC0_SYNCTRIGCH1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_vdac0_synctrigch1::W](W) writer structure"] -impl crate::Writable for CONSUMER_VDAC0_SYNCTRIGCH1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_vdac0_synctrigch1::R`](R) reader structure"] +impl crate::Readable for ConsumerVdac0Synctrigch1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_vdac0_synctrigch1::W`](W) writer structure"] +impl crate::Writable for ConsumerVdac0Synctrigch1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_VDAC0_SYNCTRIGCH1 to value 0"] -impl crate::Resettable for CONSUMER_VDAC0_SYNCTRIGCH1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerVdac0Synctrigch1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_wdog0_src0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_wdog0_src0.rs index 58f76c6..ca44da0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_wdog0_src0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_wdog0_src0.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_WDOG0_SRC0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_WDOG0_SRC0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - SRC0 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - SRC0 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_WDOG0_SRC0_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - SRC0 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - SRC0 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "SRC0 consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_wdog0_src0](index.html) module"] -pub struct CONSUMER_WDOG0_SRC0_SPEC; -impl crate::RegisterSpec for CONSUMER_WDOG0_SRC0_SPEC { +#[doc = "SRC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_wdog0_src0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_wdog0_src0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerWdog0Src0Spec; +impl crate::RegisterSpec for ConsumerWdog0Src0Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_wdog0_src0::R](R) reader structure"] -impl crate::Readable for CONSUMER_WDOG0_SRC0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_wdog0_src0::W](W) writer structure"] -impl crate::Writable for CONSUMER_WDOG0_SRC0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_wdog0_src0::R`](R) reader structure"] +impl crate::Readable for ConsumerWdog0Src0Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_wdog0_src0::W`](W) writer structure"] +impl crate::Writable for ConsumerWdog0Src0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_WDOG0_SRC0 to value 0"] -impl crate::Resettable for CONSUMER_WDOG0_SRC0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerWdog0Src0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_wdog0_src1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_wdog0_src1.rs index c1c5e7d..0570cb0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_wdog0_src1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_wdog0_src1.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_WDOG0_SRC1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_WDOG0_SRC1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - SRC1 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - SRC1 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_WDOG0_SRC1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - SRC1 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - SRC1 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "SRC1 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_wdog0_src1](index.html) module"] -pub struct CONSUMER_WDOG0_SRC1_SPEC; -impl crate::RegisterSpec for CONSUMER_WDOG0_SRC1_SPEC { +#[doc = "SRC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_wdog0_src1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_wdog0_src1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerWdog0Src1Spec; +impl crate::RegisterSpec for ConsumerWdog0Src1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_wdog0_src1::R](R) reader structure"] -impl crate::Readable for CONSUMER_WDOG0_SRC1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_wdog0_src1::W](W) writer structure"] -impl crate::Writable for CONSUMER_WDOG0_SRC1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_wdog0_src1::R`](R) reader structure"] +impl crate::Readable for ConsumerWdog0Src1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_wdog0_src1::W`](W) writer structure"] +impl crate::Writable for ConsumerWdog0Src1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_WDOG0_SRC1 to value 0"] -impl crate::Resettable for CONSUMER_WDOG0_SRC1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerWdog0Src1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_wdog1_src0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_wdog1_src0.rs index 87cbf9a..ebaad91 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_wdog1_src0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_wdog1_src0.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_WDOG1_SRC0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_WDOG1_SRC0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - SRC0 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - SRC0 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_WDOG1_SRC0_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - SRC0 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - SRC0 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "SRC0 consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_wdog1_src0](index.html) module"] -pub struct CONSUMER_WDOG1_SRC0_SPEC; -impl crate::RegisterSpec for CONSUMER_WDOG1_SRC0_SPEC { +#[doc = "SRC0 consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_wdog1_src0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_wdog1_src0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerWdog1Src0Spec; +impl crate::RegisterSpec for ConsumerWdog1Src0Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_wdog1_src0::R](R) reader structure"] -impl crate::Readable for CONSUMER_WDOG1_SRC0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_wdog1_src0::W](W) writer structure"] -impl crate::Writable for CONSUMER_WDOG1_SRC0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_wdog1_src0::R`](R) reader structure"] +impl crate::Readable for ConsumerWdog1Src0Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_wdog1_src0::W`](W) writer structure"] +impl crate::Writable for ConsumerWdog1Src0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_WDOG1_SRC0 to value 0"] -impl crate::Resettable for CONSUMER_WDOG1_SRC0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerWdog1Src0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_wdog1_src1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_wdog1_src1.rs index 8a39e1c..f933aad 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_wdog1_src1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/consumer_wdog1_src1.rs @@ -1,81 +1,40 @@ #[doc = "Register `CONSUMER_WDOG1_SRC1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONSUMER_WDOG1_SRC1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PRSSEL` reader - SRC1 async channel select"] -pub type PRSSEL_R = crate::FieldReader; +pub type PrsselR = crate::FieldReader; #[doc = "Field `PRSSEL` writer - SRC1 async channel select"] -pub type PRSSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CONSUMER_WDOG1_SRC1_SPEC, u8, u8, 4, O>; +pub type PrsselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - SRC1 async channel select"] #[inline(always)] - pub fn prssel(&self) -> PRSSEL_R { - PRSSEL_R::new((self.bits & 0x0f) as u8) + pub fn prssel(&self) -> PrsselR { + PrsselR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - SRC1 async channel select"] #[inline(always)] #[must_use] - pub fn prssel(&mut self) -> PRSSEL_W<0> { - PRSSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn prssel(&mut self) -> PrsselW { + PrsselW::new(self, 0) } } -#[doc = "SRC1 Consumer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [consumer_wdog1_src1](index.html) module"] -pub struct CONSUMER_WDOG1_SRC1_SPEC; -impl crate::RegisterSpec for CONSUMER_WDOG1_SRC1_SPEC { +#[doc = "SRC1 Consumer register\n\nYou can [`read`](crate::Reg::read) this register and get [`consumer_wdog1_src1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`consumer_wdog1_src1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConsumerWdog1Src1Spec; +impl crate::RegisterSpec for ConsumerWdog1Src1Spec { type Ux = u32; } -#[doc = "`read()` method returns [consumer_wdog1_src1::R](R) reader structure"] -impl crate::Readable for CONSUMER_WDOG1_SRC1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [consumer_wdog1_src1::W](W) writer structure"] -impl crate::Writable for CONSUMER_WDOG1_SRC1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`consumer_wdog1_src1::R`](R) reader structure"] +impl crate::Readable for ConsumerWdog1Src1Spec {} +#[doc = "`write(|w| ..)` method takes [`consumer_wdog1_src1::W`](W) writer structure"] +impl crate::Writable for ConsumerWdog1Src1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONSUMER_WDOG1_SRC1 to value 0"] -impl crate::Resettable for CONSUMER_WDOG1_SRC1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConsumerWdog1Src1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/ipversion.rs index 6001e4c..997a40c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - New BitField"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - New BitField"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x02"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/sync_ch0_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/sync_ch0_ctrl.rs index 631e69e..51a2e4a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/sync_ch0_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/sync_ch0_ctrl.rs @@ -1,132 +1,98 @@ #[doc = "Register `SYNC_CH0_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SYNC_CH0_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYNC_CH0_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYNC_CH0_CTRL_SPEC, u8, u8, 7, O>; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sync_ch0_ctrl](index.html) module"] -pub struct SYNC_CH0_CTRL_SPEC; -impl crate::RegisterSpec for SYNC_CH0_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sync_ch0_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sync_ch0_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncCh0CtrlSpec; +impl crate::RegisterSpec for SyncCh0CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [sync_ch0_ctrl::R](R) reader structure"] -impl crate::Readable for SYNC_CH0_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sync_ch0_ctrl::W](W) writer structure"] -impl crate::Writable for SYNC_CH0_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`sync_ch0_ctrl::R`](R) reader structure"] +impl crate::Readable for SyncCh0CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`sync_ch0_ctrl::W`](W) writer structure"] +impl crate::Writable for SyncCh0CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYNC_CH0_CTRL to value 0"] -impl crate::Resettable for SYNC_CH0_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncCh0CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/sync_ch1_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/sync_ch1_ctrl.rs index 03153f6..2dca602 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/sync_ch1_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/sync_ch1_ctrl.rs @@ -1,132 +1,98 @@ #[doc = "Register `SYNC_CH1_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SYNC_CH1_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYNC_CH1_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYNC_CH1_CTRL_SPEC, u8, u8, 7, O>; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sync_ch1_ctrl](index.html) module"] -pub struct SYNC_CH1_CTRL_SPEC; -impl crate::RegisterSpec for SYNC_CH1_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sync_ch1_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sync_ch1_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncCh1CtrlSpec; +impl crate::RegisterSpec for SyncCh1CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [sync_ch1_ctrl::R](R) reader structure"] -impl crate::Readable for SYNC_CH1_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sync_ch1_ctrl::W](W) writer structure"] -impl crate::Writable for SYNC_CH1_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`sync_ch1_ctrl::R`](R) reader structure"] +impl crate::Readable for SyncCh1CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`sync_ch1_ctrl::W`](W) writer structure"] +impl crate::Writable for SyncCh1CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYNC_CH1_CTRL to value 0"] -impl crate::Resettable for SYNC_CH1_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncCh1CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/sync_ch2_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/sync_ch2_ctrl.rs index 6e929b6..4ace9c8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/sync_ch2_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/sync_ch2_ctrl.rs @@ -1,132 +1,98 @@ #[doc = "Register `SYNC_CH2_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SYNC_CH2_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYNC_CH2_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYNC_CH2_CTRL_SPEC, u8, u8, 7, O>; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sync_ch2_ctrl](index.html) module"] -pub struct SYNC_CH2_CTRL_SPEC; -impl crate::RegisterSpec for SYNC_CH2_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sync_ch2_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sync_ch2_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncCh2CtrlSpec; +impl crate::RegisterSpec for SyncCh2CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [sync_ch2_ctrl::R](R) reader structure"] -impl crate::Readable for SYNC_CH2_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sync_ch2_ctrl::W](W) writer structure"] -impl crate::Writable for SYNC_CH2_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`sync_ch2_ctrl::R`](R) reader structure"] +impl crate::Readable for SyncCh2CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`sync_ch2_ctrl::W`](W) writer structure"] +impl crate::Writable for SyncCh2CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYNC_CH2_CTRL to value 0"] -impl crate::Resettable for SYNC_CH2_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncCh2CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/sync_ch3_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/sync_ch3_ctrl.rs index a757217..52961f4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/sync_ch3_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/sync_ch3_ctrl.rs @@ -1,132 +1,98 @@ #[doc = "Register `SYNC_CH3_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SYNC_CH3_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SIGSEL` reader - Signal Select"] -pub type SIGSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Signal Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIGSEL_A { +pub enum Sigsel { #[doc = "0: NONE"] - NONE = 0, + None = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIGSEL_A) -> Self { + fn from(variant: Sigsel) -> Self { variant as _ } } -impl SIGSEL_R { +impl crate::FieldSpec for Sigsel { + type Ux = u8; +} +impl crate::IsEnum for Sigsel {} +#[doc = "Field `SIGSEL` reader - Signal Select"] +pub type SigselR = crate::FieldReader; +impl SigselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIGSEL_A::NONE), + 0 => Some(Sigsel::None), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "NONE"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == SIGSEL_A::NONE + *self == Sigsel::None } } #[doc = "Field `SIGSEL` writer - Signal Select"] -pub type SIGSEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYNC_CH3_CTRL_SPEC, u8, SIGSEL_A, 3, O>; -impl<'a, const O: u8> SIGSEL_W<'a, O> { +pub type SigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Sigsel>; +impl<'a, REG> SigselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "NONE"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(SIGSEL_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Sigsel::None) } } #[doc = "Field `SOURCESEL` reader - Source Select"] -pub type SOURCESEL_R = crate::FieldReader; +pub type SourceselR = crate::FieldReader; #[doc = "Field `SOURCESEL` writer - Source Select"] -pub type SOURCESEL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, SYNC_CH3_CTRL_SPEC, u8, u8, 7, O>; +pub type SourceselW<'a, REG> = crate::FieldWriter<'a, REG, 7>; impl R { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] - pub fn sigsel(&self) -> SIGSEL_R { - SIGSEL_R::new((self.bits & 7) as u8) + pub fn sigsel(&self) -> SigselR { + SigselR::new((self.bits & 7) as u8) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] - pub fn sourcesel(&self) -> SOURCESEL_R { - SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn sourcesel(&self) -> SourceselR { + SourceselR::new(((self.bits >> 8) & 0x7f) as u8) } } impl W { #[doc = "Bits 0:2 - Signal Select"] #[inline(always)] #[must_use] - pub fn sigsel(&mut self) -> SIGSEL_W<0> { - SIGSEL_W::new(self) + pub fn sigsel(&mut self) -> SigselW { + SigselW::new(self, 0) } #[doc = "Bits 8:14 - Source Select"] #[inline(always)] #[must_use] - pub fn sourcesel(&mut self) -> SOURCESEL_W<8> { - SOURCESEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sourcesel(&mut self) -> SourceselW { + SourceselW::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sync_ch3_ctrl](index.html) module"] -pub struct SYNC_CH3_CTRL_SPEC; -impl crate::RegisterSpec for SYNC_CH3_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sync_ch3_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sync_ch3_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncCh3CtrlSpec; +impl crate::RegisterSpec for SyncCh3CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [sync_ch3_ctrl::R](R) reader structure"] -impl crate::Readable for SYNC_CH3_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sync_ch3_ctrl::W](W) writer structure"] -impl crate::Writable for SYNC_CH3_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`sync_ch3_ctrl::R`](R) reader structure"] +impl crate::Readable for SyncCh3CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`sync_ch3_ctrl::W`](W) writer structure"] +impl crate::Writable for SyncCh3CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYNC_CH3_CTRL to value 0"] -impl crate::Resettable for SYNC_CH3_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncCh3CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/sync_peek.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/sync_peek.rs index efc7a5c..b237ece 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/sync_peek.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/prs_s/sync_peek.rs @@ -1,58 +1,43 @@ #[doc = "Register `SYNC_PEEK` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CH0VAL` reader - Channel Value"] -pub type CH0VAL_R = crate::BitReader; +pub type Ch0valR = crate::BitReader; #[doc = "Field `CH1VAL` reader - Channel Value"] -pub type CH1VAL_R = crate::BitReader; +pub type Ch1valR = crate::BitReader; #[doc = "Field `CH2VAL` reader - Channel Value"] -pub type CH2VAL_R = crate::BitReader; +pub type Ch2valR = crate::BitReader; #[doc = "Field `CH3VAL` reader - Channel Value"] -pub type CH3VAL_R = crate::BitReader; +pub type Ch3valR = crate::BitReader; impl R { #[doc = "Bit 0 - Channel Value"] #[inline(always)] - pub fn ch0val(&self) -> CH0VAL_R { - CH0VAL_R::new((self.bits & 1) != 0) + pub fn ch0val(&self) -> Ch0valR { + Ch0valR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channel Value"] #[inline(always)] - pub fn ch1val(&self) -> CH1VAL_R { - CH1VAL_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1val(&self) -> Ch1valR { + Ch1valR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Channel Value"] #[inline(always)] - pub fn ch2val(&self) -> CH2VAL_R { - CH2VAL_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2val(&self) -> Ch2valR { + Ch2valR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Channel Value"] #[inline(always)] - pub fn ch3val(&self) -> CH3VAL_R { - CH3VAL_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3val(&self) -> Ch3valR { + Ch3valR::new(((self.bits >> 3) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sync_peek](index.html) module"] -pub struct SYNC_PEEK_SPEC; -impl crate::RegisterSpec for SYNC_PEEK_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`sync_peek::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncPeekSpec; +impl crate::RegisterSpec for SyncPeekSpec { type Ux = u32; } -#[doc = "`read()` method returns [sync_peek::R](R) reader structure"] -impl crate::Readable for SYNC_PEEK_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`sync_peek::R`](R) reader structure"] +impl crate::Readable for SyncPeekSpec {} #[doc = "`reset()` method sets SYNC_PEEK to value 0"] -impl crate::Resettable for SYNC_PEEK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncPeekSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/scratchpad_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/scratchpad_ns.rs index 9e42ba7..63e948a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/scratchpad_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/scratchpad_ns.rs @@ -1,16 +1,30 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + sreg0: Sreg0, + sreg1: Sreg1, +} +impl RegisterBlock { #[doc = "0x00 - Used for SIMCTRL Pointer in Verification Environment"] - pub sreg0: SREG0, + #[inline(always)] + pub const fn sreg0(&self) -> &Sreg0 { + &self.sreg0 + } #[doc = "0x04 - Used for SIMCTRL Data Access in Verification Environment"] - pub sreg1: SREG1, + #[inline(always)] + pub const fn sreg1(&self) -> &Sreg1 { + &self.sreg1 + } } -#[doc = "SREG0 (rw) register accessor: an alias for `Reg`"] -pub type SREG0 = crate::Reg; +#[doc = "SREG0 (rw) register accessor: Used for SIMCTRL Pointer in Verification Environment\n\nYou can [`read`](crate::Reg::read) this register and get [`sreg0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sreg0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sreg0`] +module"] +#[doc(alias = "SREG0")] +pub type Sreg0 = crate::Reg; #[doc = "Used for SIMCTRL Pointer in Verification Environment"] pub mod sreg0; -#[doc = "SREG1 (rw) register accessor: an alias for `Reg`"] -pub type SREG1 = crate::Reg; +#[doc = "SREG1 (rw) register accessor: Used for SIMCTRL Data Access in Verification Environment\n\nYou can [`read`](crate::Reg::read) this register and get [`sreg1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sreg1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sreg1`] +module"] +#[doc(alias = "SREG1")] +pub type Sreg1 = crate::Reg; #[doc = "Used for SIMCTRL Data Access in Verification Environment"] pub mod sreg1; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/scratchpad_ns/sreg0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/scratchpad_ns/sreg0.rs index d1cc6f9..65b876b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/scratchpad_ns/sreg0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/scratchpad_ns/sreg0.rs @@ -1,80 +1,40 @@ #[doc = "Register `SREG0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SREG0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SCRATCH` reader - Scratch Pad Register"] -pub type SCRATCH_R = crate::FieldReader; +pub type ScratchR = crate::FieldReader; #[doc = "Field `SCRATCH` writer - Scratch Pad Register"] -pub type SCRATCH_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SREG0_SPEC, u32, u32, 32, O>; +pub type ScratchW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Scratch Pad Register"] #[inline(always)] - pub fn scratch(&self) -> SCRATCH_R { - SCRATCH_R::new(self.bits) + pub fn scratch(&self) -> ScratchR { + ScratchR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Scratch Pad Register"] #[inline(always)] #[must_use] - pub fn scratch(&mut self) -> SCRATCH_W<0> { - SCRATCH_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn scratch(&mut self) -> ScratchW { + ScratchW::new(self, 0) } } -#[doc = "Used for SIMCTRL Pointer in Verification Environment\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sreg0](index.html) module"] -pub struct SREG0_SPEC; -impl crate::RegisterSpec for SREG0_SPEC { +#[doc = "Used for SIMCTRL Pointer in Verification Environment\n\nYou can [`read`](crate::Reg::read) this register and get [`sreg0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sreg0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Sreg0Spec; +impl crate::RegisterSpec for Sreg0Spec { type Ux = u32; } -#[doc = "`read()` method returns [sreg0::R](R) reader structure"] -impl crate::Readable for SREG0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sreg0::W](W) writer structure"] -impl crate::Writable for SREG0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`sreg0::R`](R) reader structure"] +impl crate::Readable for Sreg0Spec {} +#[doc = "`write(|w| ..)` method takes [`sreg0::W`](W) writer structure"] +impl crate::Writable for Sreg0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SREG0 to value 0"] -impl crate::Resettable for SREG0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Sreg0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/scratchpad_ns/sreg1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/scratchpad_ns/sreg1.rs index 6f72a3a..5a1b422 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/scratchpad_ns/sreg1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/scratchpad_ns/sreg1.rs @@ -1,80 +1,40 @@ #[doc = "Register `SREG1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SREG1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SCRATCH` reader - Scratch Register"] -pub type SCRATCH_R = crate::FieldReader; +pub type ScratchR = crate::FieldReader; #[doc = "Field `SCRATCH` writer - Scratch Register"] -pub type SCRATCH_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SREG1_SPEC, u32, u32, 32, O>; +pub type ScratchW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Scratch Register"] #[inline(always)] - pub fn scratch(&self) -> SCRATCH_R { - SCRATCH_R::new(self.bits) + pub fn scratch(&self) -> ScratchR { + ScratchR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Scratch Register"] #[inline(always)] #[must_use] - pub fn scratch(&mut self) -> SCRATCH_W<0> { - SCRATCH_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn scratch(&mut self) -> ScratchW { + ScratchW::new(self, 0) } } -#[doc = "Used for SIMCTRL Data Access in Verification Environment\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sreg1](index.html) module"] -pub struct SREG1_SPEC; -impl crate::RegisterSpec for SREG1_SPEC { +#[doc = "Used for SIMCTRL Data Access in Verification Environment\n\nYou can [`read`](crate::Reg::read) this register and get [`sreg1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sreg1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Sreg1Spec; +impl crate::RegisterSpec for Sreg1Spec { type Ux = u32; } -#[doc = "`read()` method returns [sreg1::R](R) reader structure"] -impl crate::Readable for SREG1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sreg1::W](W) writer structure"] -impl crate::Writable for SREG1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`sreg1::R`](R) reader structure"] +impl crate::Readable for Sreg1Spec {} +#[doc = "`write(|w| ..)` method takes [`sreg1::W`](W) writer structure"] +impl crate::Writable for Sreg1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SREG1 to value 0"] -impl crate::Resettable for SREG1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Sreg1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/scratchpad_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/scratchpad_s.rs index 9e42ba7..63e948a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/scratchpad_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/scratchpad_s.rs @@ -1,16 +1,30 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + sreg0: Sreg0, + sreg1: Sreg1, +} +impl RegisterBlock { #[doc = "0x00 - Used for SIMCTRL Pointer in Verification Environment"] - pub sreg0: SREG0, + #[inline(always)] + pub const fn sreg0(&self) -> &Sreg0 { + &self.sreg0 + } #[doc = "0x04 - Used for SIMCTRL Data Access in Verification Environment"] - pub sreg1: SREG1, + #[inline(always)] + pub const fn sreg1(&self) -> &Sreg1 { + &self.sreg1 + } } -#[doc = "SREG0 (rw) register accessor: an alias for `Reg`"] -pub type SREG0 = crate::Reg; +#[doc = "SREG0 (rw) register accessor: Used for SIMCTRL Pointer in Verification Environment\n\nYou can [`read`](crate::Reg::read) this register and get [`sreg0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sreg0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sreg0`] +module"] +#[doc(alias = "SREG0")] +pub type Sreg0 = crate::Reg; #[doc = "Used for SIMCTRL Pointer in Verification Environment"] pub mod sreg0; -#[doc = "SREG1 (rw) register accessor: an alias for `Reg`"] -pub type SREG1 = crate::Reg; +#[doc = "SREG1 (rw) register accessor: Used for SIMCTRL Data Access in Verification Environment\n\nYou can [`read`](crate::Reg::read) this register and get [`sreg1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sreg1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sreg1`] +module"] +#[doc(alias = "SREG1")] +pub type Sreg1 = crate::Reg; #[doc = "Used for SIMCTRL Data Access in Verification Environment"] pub mod sreg1; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/scratchpad_s/sreg0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/scratchpad_s/sreg0.rs index d1cc6f9..65b876b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/scratchpad_s/sreg0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/scratchpad_s/sreg0.rs @@ -1,80 +1,40 @@ #[doc = "Register `SREG0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SREG0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SCRATCH` reader - Scratch Pad Register"] -pub type SCRATCH_R = crate::FieldReader; +pub type ScratchR = crate::FieldReader; #[doc = "Field `SCRATCH` writer - Scratch Pad Register"] -pub type SCRATCH_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SREG0_SPEC, u32, u32, 32, O>; +pub type ScratchW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Scratch Pad Register"] #[inline(always)] - pub fn scratch(&self) -> SCRATCH_R { - SCRATCH_R::new(self.bits) + pub fn scratch(&self) -> ScratchR { + ScratchR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Scratch Pad Register"] #[inline(always)] #[must_use] - pub fn scratch(&mut self) -> SCRATCH_W<0> { - SCRATCH_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn scratch(&mut self) -> ScratchW { + ScratchW::new(self, 0) } } -#[doc = "Used for SIMCTRL Pointer in Verification Environment\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sreg0](index.html) module"] -pub struct SREG0_SPEC; -impl crate::RegisterSpec for SREG0_SPEC { +#[doc = "Used for SIMCTRL Pointer in Verification Environment\n\nYou can [`read`](crate::Reg::read) this register and get [`sreg0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sreg0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Sreg0Spec; +impl crate::RegisterSpec for Sreg0Spec { type Ux = u32; } -#[doc = "`read()` method returns [sreg0::R](R) reader structure"] -impl crate::Readable for SREG0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sreg0::W](W) writer structure"] -impl crate::Writable for SREG0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`sreg0::R`](R) reader structure"] +impl crate::Readable for Sreg0Spec {} +#[doc = "`write(|w| ..)` method takes [`sreg0::W`](W) writer structure"] +impl crate::Writable for Sreg0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SREG0 to value 0"] -impl crate::Resettable for SREG0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Sreg0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/scratchpad_s/sreg1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/scratchpad_s/sreg1.rs index 6f72a3a..5a1b422 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/scratchpad_s/sreg1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/scratchpad_s/sreg1.rs @@ -1,80 +1,40 @@ #[doc = "Register `SREG1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SREG1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SCRATCH` reader - Scratch Register"] -pub type SCRATCH_R = crate::FieldReader; +pub type ScratchR = crate::FieldReader; #[doc = "Field `SCRATCH` writer - Scratch Register"] -pub type SCRATCH_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SREG1_SPEC, u32, u32, 32, O>; +pub type ScratchW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Scratch Register"] #[inline(always)] - pub fn scratch(&self) -> SCRATCH_R { - SCRATCH_R::new(self.bits) + pub fn scratch(&self) -> ScratchR { + ScratchR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Scratch Register"] #[inline(always)] #[must_use] - pub fn scratch(&mut self) -> SCRATCH_W<0> { - SCRATCH_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn scratch(&mut self) -> ScratchW { + ScratchW::new(self, 0) } } -#[doc = "Used for SIMCTRL Data Access in Verification Environment\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sreg1](index.html) module"] -pub struct SREG1_SPEC; -impl crate::RegisterSpec for SREG1_SPEC { +#[doc = "Used for SIMCTRL Data Access in Verification Environment\n\nYou can [`read`](crate::Reg::read) this register and get [`sreg1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sreg1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Sreg1Spec; +impl crate::RegisterSpec for Sreg1Spec { type Ux = u32; } -#[doc = "`read()` method returns [sreg1::R](R) reader structure"] -impl crate::Readable for SREG1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [sreg1::W](W) writer structure"] -impl crate::Writable for SREG1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`sreg1::R`](R) reader structure"] +impl crate::Readable for Sreg1Spec {} +#[doc = "`write(|w| ..)` method takes [`sreg1::W`](W) writer structure"] +impl crate::Writable for Sreg1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SREG1 to value 0"] -impl crate::Resettable for SREG1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Sreg1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host.rs index b184ec5..6e799fb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host.rs @@ -1,53 +1,103 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - A write access to any address in this area will be mapped to the TX FIFO (only for the payload). A read access to any address in this area will be mapped to the RX FIFO (only for the payload). Using an address range (16 x 32-bit) rather than one single address mapped to the FIFO allows using incremental bursts."] - pub fifo: FIFO, + fifo: Fifo, _reserved1: [u8; 0x3c], + tx_status: TxStatus, + rx_status: RxStatus, + tx_prot: TxProt, + rx_prot: RxProt, + tx_header: TxHeader, + rx_header: RxHeader, + configuration: Configuration, +} +impl RegisterBlock { + #[doc = "0x00 - A write access to any address in this area will be mapped to the TX FIFO (only for the payload). A read access to any address in this area will be mapped to the RX FIFO (only for the payload). Using an address range (16 x 32-bit) rather than one single address mapped to the FIFO allows using incremental bursts."] + #[inline(always)] + pub const fn fifo(&self) -> &Fifo { + &self.fifo + } #[doc = "0x40 - TX Status register."] - pub tx_status: TX_STATUS, + #[inline(always)] + pub const fn tx_status(&self) -> &TxStatus { + &self.tx_status + } #[doc = "0x44 - RX Status register."] - pub rx_status: RX_STATUS, + #[inline(always)] + pub const fn rx_status(&self) -> &RxStatus { + &self.rx_status + } #[doc = "0x48 - TX Protection register."] - pub tx_prot: TX_PROT, + #[inline(always)] + pub const fn tx_prot(&self) -> &TxProt { + &self.tx_prot + } #[doc = "0x4c - RX Protection register."] - pub rx_prot: RX_PROT, + #[inline(always)] + pub const fn rx_prot(&self) -> &RxProt { + &self.rx_prot + } #[doc = "0x50 - A write access to this register will be mapped to the TX FIFO (only for header)."] - pub tx_header: TX_HEADER, + #[inline(always)] + pub const fn tx_header(&self) -> &TxHeader { + &self.tx_header + } #[doc = "0x54 - A read access to this register will be mapped to the RX FIFO (only for the header)."] - pub rx_header: RX_HEADER, + #[inline(always)] + pub const fn rx_header(&self) -> &RxHeader { + &self.rx_header + } #[doc = "0x58 - Configuration register."] - pub configuration: CONFIGURATION, + #[inline(always)] + pub const fn configuration(&self) -> &Configuration { + &self.configuration + } } -#[doc = "FIFO (rw) register accessor: an alias for `Reg`"] -pub type FIFO = crate::Reg; +#[doc = "FIFO (rw) register accessor: A write access to any address in this area will be mapped to the TX FIFO (only for the payload). A read access to any address in this area will be mapped to the RX FIFO (only for the payload). Using an address range (16 x 32-bit) rather than one single address mapped to the FIFO allows using incremental bursts.\n\nYou can [`read`](crate::Reg::read) this register and get [`fifo::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo`] +module"] +#[doc(alias = "FIFO")] +pub type Fifo = crate::Reg; #[doc = "A write access to any address in this area will be mapped to the TX FIFO (only for the payload). A read access to any address in this area will be mapped to the RX FIFO (only for the payload). Using an address range (16 x 32-bit) rather than one single address mapped to the FIFO allows using incremental bursts."] pub mod fifo; -#[doc = "TX_STATUS (r) register accessor: an alias for `Reg`"] -pub type TX_STATUS = crate::Reg; +#[doc = "TX_STATUS (r) register accessor: TX Status register.\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_status`] +module"] +#[doc(alias = "TX_STATUS")] +pub type TxStatus = crate::Reg; #[doc = "TX Status register."] pub mod tx_status; -#[doc = "RX_STATUS (r) register accessor: an alias for `Reg`"] -pub type RX_STATUS = crate::Reg; +#[doc = "RX_STATUS (r) register accessor: RX Status register.\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_status`] +module"] +#[doc(alias = "RX_STATUS")] +pub type RxStatus = crate::Reg; #[doc = "RX Status register."] pub mod rx_status; -#[doc = "TX_PROT (r) register accessor: an alias for `Reg`"] -pub type TX_PROT = crate::Reg; +#[doc = "TX_PROT (r) register accessor: TX Protection register.\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_prot::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_prot`] +module"] +#[doc(alias = "TX_PROT")] +pub type TxProt = crate::Reg; #[doc = "TX Protection register."] pub mod tx_prot; -#[doc = "RX_PROT (r) register accessor: an alias for `Reg`"] -pub type RX_PROT = crate::Reg; +#[doc = "RX_PROT (r) register accessor: RX Protection register.\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_prot::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_prot`] +module"] +#[doc(alias = "RX_PROT")] +pub type RxProt = crate::Reg; #[doc = "RX Protection register."] pub mod rx_prot; -#[doc = "TX_HEADER (w) register accessor: an alias for `Reg`"] -pub type TX_HEADER = crate::Reg; +#[doc = "TX_HEADER (w) register accessor: A write access to this register will be mapped to the TX FIFO (only for header).\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tx_header::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_header`] +module"] +#[doc(alias = "TX_HEADER")] +pub type TxHeader = crate::Reg; #[doc = "A write access to this register will be mapped to the TX FIFO (only for header)."] pub mod tx_header; -#[doc = "RX_HEADER (r) register accessor: an alias for `Reg`"] -pub type RX_HEADER = crate::Reg; +#[doc = "RX_HEADER (r) register accessor: A read access to this register will be mapped to the RX FIFO (only for the header).\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_header::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_header`] +module"] +#[doc(alias = "RX_HEADER")] +pub type RxHeader = crate::Reg; #[doc = "A read access to this register will be mapped to the RX FIFO (only for the header)."] pub mod rx_header; -#[doc = "CONFIGURATION (rw) register accessor: an alias for `Reg`"] -pub type CONFIGURATION = crate::Reg; +#[doc = "CONFIGURATION (rw) register accessor: Configuration register.\n\nYou can [`read`](crate::Reg::read) this register and get [`configuration::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`configuration::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@configuration`] +module"] +#[doc(alias = "CONFIGURATION")] +pub type Configuration = crate::Reg; #[doc = "Configuration register."] pub mod configuration; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/configuration.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/configuration.rs index da4bbc7..e7020d7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/configuration.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/configuration.rs @@ -1,95 +1,55 @@ #[doc = "Register `CONFIGURATION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONFIGURATION` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXINTEN` reader - TXINTEN"] -pub type TXINTEN_R = crate::BitReader; +pub type TxintenR = crate::BitReader; #[doc = "Field `TXINTEN` writer - TXINTEN"] -pub type TXINTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CONFIGURATION_SPEC, bool, O>; +pub type TxintenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXINTEN` reader - RXINTEN"] -pub type RXINTEN_R = crate::BitReader; +pub type RxintenR = crate::BitReader; #[doc = "Field `RXINTEN` writer - RXINTEN"] -pub type RXINTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CONFIGURATION_SPEC, bool, O>; +pub type RxintenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - TXINTEN"] #[inline(always)] - pub fn txinten(&self) -> TXINTEN_R { - TXINTEN_R::new((self.bits & 1) != 0) + pub fn txinten(&self) -> TxintenR { + TxintenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - RXINTEN"] #[inline(always)] - pub fn rxinten(&self) -> RXINTEN_R { - RXINTEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn rxinten(&self) -> RxintenR { + RxintenR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - TXINTEN"] #[inline(always)] #[must_use] - pub fn txinten(&mut self) -> TXINTEN_W<0> { - TXINTEN_W::new(self) + pub fn txinten(&mut self) -> TxintenW { + TxintenW::new(self, 0) } #[doc = "Bit 1 - RXINTEN"] #[inline(always)] #[must_use] - pub fn rxinten(&mut self) -> RXINTEN_W<1> { - RXINTEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rxinten(&mut self) -> RxintenW { + RxintenW::new(self, 1) } } -#[doc = "Configuration register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [configuration](index.html) module"] -pub struct CONFIGURATION_SPEC; -impl crate::RegisterSpec for CONFIGURATION_SPEC { +#[doc = "Configuration register.\n\nYou can [`read`](crate::Reg::read) this register and get [`configuration::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`configuration::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConfigurationSpec; +impl crate::RegisterSpec for ConfigurationSpec { type Ux = u32; } -#[doc = "`read()` method returns [configuration::R](R) reader structure"] -impl crate::Readable for CONFIGURATION_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [configuration::W](W) writer structure"] -impl crate::Writable for CONFIGURATION_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`configuration::R`](R) reader structure"] +impl crate::Readable for ConfigurationSpec {} +#[doc = "`write(|w| ..)` method takes [`configuration::W`](W) writer structure"] +impl crate::Writable for ConfigurationSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONFIGURATION to value 0"] -impl crate::Resettable for CONFIGURATION_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConfigurationSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/fifo.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/fifo.rs index a3e1a63..bf0124e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/fifo.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/fifo.rs @@ -1,80 +1,40 @@ #[doc = "Register `FIFO` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `FIFO` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `FIFO` reader - FIFO"] -pub type FIFO_R = crate::FieldReader; +pub type FifoR = crate::FieldReader; #[doc = "Field `FIFO` writer - FIFO"] -pub type FIFO_W<'a, const O: u8> = crate::FieldWriter<'a, u32, FIFO_SPEC, u32, u32, 32, O>; +pub type FifoW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - FIFO"] #[inline(always)] - pub fn fifo(&self) -> FIFO_R { - FIFO_R::new(self.bits) + pub fn fifo(&self) -> FifoR { + FifoR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - FIFO"] #[inline(always)] #[must_use] - pub fn fifo(&mut self) -> FIFO_W<0> { - FIFO_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn fifo(&mut self) -> FifoW { + FifoW::new(self, 0) } } -#[doc = "A write access to any address in this area will be mapped to the TX FIFO (only for the payload). A read access to any address in this area will be mapped to the RX FIFO (only for the payload). Using an address range (16 x 32-bit) rather than one single address mapped to the FIFO allows using incremental bursts.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fifo](index.html) module"] -pub struct FIFO_SPEC; -impl crate::RegisterSpec for FIFO_SPEC { +#[doc = "A write access to any address in this area will be mapped to the TX FIFO (only for the payload). A read access to any address in this area will be mapped to the RX FIFO (only for the payload). Using an address range (16 x 32-bit) rather than one single address mapped to the FIFO allows using incremental bursts.\n\nYou can [`read`](crate::Reg::read) this register and get [`fifo::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct FifoSpec; +impl crate::RegisterSpec for FifoSpec { type Ux = u32; } -#[doc = "`read()` method returns [fifo::R](R) reader structure"] -impl crate::Readable for FIFO_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [fifo::W](W) writer structure"] -impl crate::Writable for FIFO_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`fifo::R`](R) reader structure"] +impl crate::Readable for FifoSpec {} +#[doc = "`write(|w| ..)` method takes [`fifo::W`](W) writer structure"] +impl crate::Writable for FifoSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FIFO to value 0"] -impl crate::Resettable for FIFO_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for FifoSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/rx_header.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/rx_header.rs index 8037b83..543202d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/rx_header.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/rx_header.rs @@ -1,37 +1,22 @@ #[doc = "Register `RX_HEADER` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXHEADER` reader - RXHEADER"] -pub type RXHEADER_R = crate::FieldReader; +pub type RxheaderR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - RXHEADER"] #[inline(always)] - pub fn rxheader(&self) -> RXHEADER_R { - RXHEADER_R::new(self.bits) + pub fn rxheader(&self) -> RxheaderR { + RxheaderR::new(self.bits) } } -#[doc = "A read access to this register will be mapped to the RX FIFO (only for the header).\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rx_header](index.html) module"] -pub struct RX_HEADER_SPEC; -impl crate::RegisterSpec for RX_HEADER_SPEC { +#[doc = "A read access to this register will be mapped to the RX FIFO (only for the header).\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_header::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxHeaderSpec; +impl crate::RegisterSpec for RxHeaderSpec { type Ux = u32; } -#[doc = "`read()` method returns [rx_header::R](R) reader structure"] -impl crate::Readable for RX_HEADER_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rx_header::R`](R) reader structure"] +impl crate::Readable for RxHeaderSpec {} #[doc = "`reset()` method sets RX_HEADER to value 0"] -impl crate::Resettable for RX_HEADER_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxHeaderSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/rx_prot.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/rx_prot.rs index b10fab6..7511667 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/rx_prot.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/rx_prot.rs @@ -1,58 +1,43 @@ #[doc = "Register `RX_PROT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `UNPROTECTED` reader - UNPROTECTED"] -pub type UNPROTECTED_R = crate::BitReader; +pub type UnprotectedR = crate::BitReader; #[doc = "Field `PRIVILEGED` reader - PRIVILEGED"] -pub type PRIVILEGED_R = crate::BitReader; +pub type PrivilegedR = crate::BitReader; #[doc = "Field `NONSECURE` reader - NONSECURE"] -pub type NONSECURE_R = crate::BitReader; +pub type NonsecureR = crate::BitReader; #[doc = "Field `USER` reader - USER"] -pub type USER_R = crate::FieldReader; +pub type UserR = crate::FieldReader; impl R { #[doc = "Bit 21 - UNPROTECTED"] #[inline(always)] - pub fn unprotected(&self) -> UNPROTECTED_R { - UNPROTECTED_R::new(((self.bits >> 21) & 1) != 0) + pub fn unprotected(&self) -> UnprotectedR { + UnprotectedR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - PRIVILEGED"] #[inline(always)] - pub fn privileged(&self) -> PRIVILEGED_R { - PRIVILEGED_R::new(((self.bits >> 22) & 1) != 0) + pub fn privileged(&self) -> PrivilegedR { + PrivilegedR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - NONSECURE"] #[inline(always)] - pub fn nonsecure(&self) -> NONSECURE_R { - NONSECURE_R::new(((self.bits >> 23) & 1) != 0) + pub fn nonsecure(&self) -> NonsecureR { + NonsecureR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:31 - USER"] #[inline(always)] - pub fn user(&self) -> USER_R { - USER_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn user(&self) -> UserR { + UserR::new(((self.bits >> 24) & 0xff) as u8) } } -#[doc = "RX Protection register.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rx_prot](index.html) module"] -pub struct RX_PROT_SPEC; -impl crate::RegisterSpec for RX_PROT_SPEC { +#[doc = "RX Protection register.\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_prot::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxProtSpec; +impl crate::RegisterSpec for RxProtSpec { type Ux = u32; } -#[doc = "`read()` method returns [rx_prot::R](R) reader structure"] -impl crate::Readable for RX_PROT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rx_prot::R`](R) reader structure"] +impl crate::Readable for RxProtSpec {} #[doc = "`reset()` method sets RX_PROT to value 0"] -impl crate::Resettable for RX_PROT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxProtSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/rx_status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/rx_status.rs index 41ca8c3..e102464 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/rx_status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/rx_status.rs @@ -1,72 +1,57 @@ #[doc = "Register `RX_STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `REMBYTES` reader - REMBYTES"] -pub type REMBYTES_R = crate::FieldReader; +pub type RembytesR = crate::FieldReader; #[doc = "Field `MSGINFO` reader - MSGINFO"] -pub type MSGINFO_R = crate::FieldReader; +pub type MsginfoR = crate::FieldReader; #[doc = "Field `RXINT` reader - RXINT"] -pub type RXINT_R = crate::BitReader; +pub type RxintR = crate::BitReader; #[doc = "Field `RXEMPTY` reader - RXEMPTY"] -pub type RXEMPTY_R = crate::BitReader; +pub type RxemptyR = crate::BitReader; #[doc = "Field `RXHDR` reader - RXHDR"] -pub type RXHDR_R = crate::BitReader; +pub type RxhdrR = crate::BitReader; #[doc = "Field `RXERROR` reader - RXERROR"] -pub type RXERROR_R = crate::BitReader; +pub type RxerrorR = crate::BitReader; impl R { #[doc = "Bits 0:15 - REMBYTES"] #[inline(always)] - pub fn rembytes(&self) -> REMBYTES_R { - REMBYTES_R::new((self.bits & 0xffff) as u16) + pub fn rembytes(&self) -> RembytesR { + RembytesR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - MSGINFO"] #[inline(always)] - pub fn msginfo(&self) -> MSGINFO_R { - MSGINFO_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn msginfo(&self) -> MsginfoR { + MsginfoR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - RXINT"] #[inline(always)] - pub fn rxint(&self) -> RXINT_R { - RXINT_R::new(((self.bits >> 20) & 1) != 0) + pub fn rxint(&self) -> RxintR { + RxintR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - RXEMPTY"] #[inline(always)] - pub fn rxempty(&self) -> RXEMPTY_R { - RXEMPTY_R::new(((self.bits >> 21) & 1) != 0) + pub fn rxempty(&self) -> RxemptyR { + RxemptyR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - RXHDR"] #[inline(always)] - pub fn rxhdr(&self) -> RXHDR_R { - RXHDR_R::new(((self.bits >> 22) & 1) != 0) + pub fn rxhdr(&self) -> RxhdrR { + RxhdrR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - RXERROR"] #[inline(always)] - pub fn rxerror(&self) -> RXERROR_R { - RXERROR_R::new(((self.bits >> 23) & 1) != 0) + pub fn rxerror(&self) -> RxerrorR { + RxerrorR::new(((self.bits >> 23) & 1) != 0) } } -#[doc = "RX Status register.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rx_status](index.html) module"] -pub struct RX_STATUS_SPEC; -impl crate::RegisterSpec for RX_STATUS_SPEC { +#[doc = "RX Status register.\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxStatusSpec; +impl crate::RegisterSpec for RxStatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [rx_status::R](R) reader structure"] -impl crate::Readable for RX_STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rx_status::R`](R) reader structure"] +impl crate::Readable for RxStatusSpec {} #[doc = "`reset()` method sets RX_STATUS to value 0"] -impl crate::Resettable for RX_STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxStatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/tx_header.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/tx_header.rs index d7b343d..775decb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/tx_header.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/tx_header.rs @@ -1,52 +1,27 @@ #[doc = "Register `TX_HEADER` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXHEADER` writer - TXHEADER"] -pub type TXHEADER_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TX_HEADER_SPEC, u32, u32, 32, O>; +pub type TxheaderW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl W { #[doc = "Bits 0:31 - TXHEADER"] #[inline(always)] #[must_use] - pub fn txheader(&mut self) -> TXHEADER_W<0> { - TXHEADER_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txheader(&mut self) -> TxheaderW { + TxheaderW::new(self, 0) } } -#[doc = "A write access to this register will be mapped to the TX FIFO (only for header).\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tx_header](index.html) module"] -pub struct TX_HEADER_SPEC; -impl crate::RegisterSpec for TX_HEADER_SPEC { +#[doc = "A write access to this register will be mapped to the TX FIFO (only for header).\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tx_header::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxHeaderSpec; +impl crate::RegisterSpec for TxHeaderSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [tx_header::W](W) writer structure"] -impl crate::Writable for TX_HEADER_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`tx_header::W`](W) writer structure"] +impl crate::Writable for TxHeaderSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TX_HEADER to value 0"] -impl crate::Resettable for TX_HEADER_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxHeaderSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/tx_prot.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/tx_prot.rs index 9be8038..c32f56e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/tx_prot.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/tx_prot.rs @@ -1,58 +1,43 @@ #[doc = "Register `TX_PROT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `UNPROTECTED` reader - UNPROTECTED"] -pub type UNPROTECTED_R = crate::BitReader; +pub type UnprotectedR = crate::BitReader; #[doc = "Field `PRIVILEGED` reader - PRIVILEGED"] -pub type PRIVILEGED_R = crate::BitReader; +pub type PrivilegedR = crate::BitReader; #[doc = "Field `NONSECURE` reader - NONSECURE"] -pub type NONSECURE_R = crate::BitReader; +pub type NonsecureR = crate::BitReader; #[doc = "Field `USER` reader - USER"] -pub type USER_R = crate::FieldReader; +pub type UserR = crate::FieldReader; impl R { #[doc = "Bit 21 - UNPROTECTED"] #[inline(always)] - pub fn unprotected(&self) -> UNPROTECTED_R { - UNPROTECTED_R::new(((self.bits >> 21) & 1) != 0) + pub fn unprotected(&self) -> UnprotectedR { + UnprotectedR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - PRIVILEGED"] #[inline(always)] - pub fn privileged(&self) -> PRIVILEGED_R { - PRIVILEGED_R::new(((self.bits >> 22) & 1) != 0) + pub fn privileged(&self) -> PrivilegedR { + PrivilegedR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - NONSECURE"] #[inline(always)] - pub fn nonsecure(&self) -> NONSECURE_R { - NONSECURE_R::new(((self.bits >> 23) & 1) != 0) + pub fn nonsecure(&self) -> NonsecureR { + NonsecureR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:31 - USER"] #[inline(always)] - pub fn user(&self) -> USER_R { - USER_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn user(&self) -> UserR { + UserR::new(((self.bits >> 24) & 0xff) as u8) } } -#[doc = "TX Protection register.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tx_prot](index.html) module"] -pub struct TX_PROT_SPEC; -impl crate::RegisterSpec for TX_PROT_SPEC { +#[doc = "TX Protection register.\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_prot::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxProtSpec; +impl crate::RegisterSpec for TxProtSpec { type Ux = u32; } -#[doc = "`read()` method returns [tx_prot::R](R) reader structure"] -impl crate::Readable for TX_PROT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`tx_prot::R`](R) reader structure"] +impl crate::Readable for TxProtSpec {} #[doc = "`reset()` method sets TX_PROT to value 0"] -impl crate::Resettable for TX_PROT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxProtSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/tx_status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/tx_status.rs index dcc9703..e9f4af1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/tx_status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_ns_host/tx_status.rs @@ -1,65 +1,50 @@ #[doc = "Register `TX_STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `REMBYTES` reader - REMBYTES"] -pub type REMBYTES_R = crate::FieldReader; +pub type RembytesR = crate::FieldReader; #[doc = "Field `MSGINFO` reader - MSGINFO"] -pub type MSGINFO_R = crate::FieldReader; +pub type MsginfoR = crate::FieldReader; #[doc = "Field `TXINT` reader - TXINT"] -pub type TXINT_R = crate::BitReader; +pub type TxintR = crate::BitReader; #[doc = "Field `TXFULL` reader - TXFULL"] -pub type TXFULL_R = crate::BitReader; +pub type TxfullR = crate::BitReader; #[doc = "Field `TXERROR` reader - TXERROR"] -pub type TXERROR_R = crate::BitReader; +pub type TxerrorR = crate::BitReader; impl R { #[doc = "Bits 0:15 - REMBYTES"] #[inline(always)] - pub fn rembytes(&self) -> REMBYTES_R { - REMBYTES_R::new((self.bits & 0xffff) as u16) + pub fn rembytes(&self) -> RembytesR { + RembytesR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - MSGINFO"] #[inline(always)] - pub fn msginfo(&self) -> MSGINFO_R { - MSGINFO_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn msginfo(&self) -> MsginfoR { + MsginfoR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - TXINT"] #[inline(always)] - pub fn txint(&self) -> TXINT_R { - TXINT_R::new(((self.bits >> 20) & 1) != 0) + pub fn txint(&self) -> TxintR { + TxintR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - TXFULL"] #[inline(always)] - pub fn txfull(&self) -> TXFULL_R { - TXFULL_R::new(((self.bits >> 21) & 1) != 0) + pub fn txfull(&self) -> TxfullR { + TxfullR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 23 - TXERROR"] #[inline(always)] - pub fn txerror(&self) -> TXERROR_R { - TXERROR_R::new(((self.bits >> 23) & 1) != 0) + pub fn txerror(&self) -> TxerrorR { + TxerrorR::new(((self.bits >> 23) & 1) != 0) } } -#[doc = "TX Status register.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tx_status](index.html) module"] -pub struct TX_STATUS_SPEC; -impl crate::RegisterSpec for TX_STATUS_SPEC { +#[doc = "TX Status register.\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxStatusSpec; +impl crate::RegisterSpec for TxStatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [tx_status::R](R) reader structure"] -impl crate::Readable for TX_STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`tx_status::R`](R) reader structure"] +impl crate::Readable for TxStatusSpec {} #[doc = "`reset()` method sets TX_STATUS to value 0"] -impl crate::Resettable for TX_STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxStatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host.rs index b184ec5..6e799fb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host.rs @@ -1,53 +1,103 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - A write access to any address in this area will be mapped to the TX FIFO (only for the payload). A read access to any address in this area will be mapped to the RX FIFO (only for the payload). Using an address range (16 x 32-bit) rather than one single address mapped to the FIFO allows using incremental bursts."] - pub fifo: FIFO, + fifo: Fifo, _reserved1: [u8; 0x3c], + tx_status: TxStatus, + rx_status: RxStatus, + tx_prot: TxProt, + rx_prot: RxProt, + tx_header: TxHeader, + rx_header: RxHeader, + configuration: Configuration, +} +impl RegisterBlock { + #[doc = "0x00 - A write access to any address in this area will be mapped to the TX FIFO (only for the payload). A read access to any address in this area will be mapped to the RX FIFO (only for the payload). Using an address range (16 x 32-bit) rather than one single address mapped to the FIFO allows using incremental bursts."] + #[inline(always)] + pub const fn fifo(&self) -> &Fifo { + &self.fifo + } #[doc = "0x40 - TX Status register."] - pub tx_status: TX_STATUS, + #[inline(always)] + pub const fn tx_status(&self) -> &TxStatus { + &self.tx_status + } #[doc = "0x44 - RX Status register."] - pub rx_status: RX_STATUS, + #[inline(always)] + pub const fn rx_status(&self) -> &RxStatus { + &self.rx_status + } #[doc = "0x48 - TX Protection register."] - pub tx_prot: TX_PROT, + #[inline(always)] + pub const fn tx_prot(&self) -> &TxProt { + &self.tx_prot + } #[doc = "0x4c - RX Protection register."] - pub rx_prot: RX_PROT, + #[inline(always)] + pub const fn rx_prot(&self) -> &RxProt { + &self.rx_prot + } #[doc = "0x50 - A write access to this register will be mapped to the TX FIFO (only for header)."] - pub tx_header: TX_HEADER, + #[inline(always)] + pub const fn tx_header(&self) -> &TxHeader { + &self.tx_header + } #[doc = "0x54 - A read access to this register will be mapped to the RX FIFO (only for the header)."] - pub rx_header: RX_HEADER, + #[inline(always)] + pub const fn rx_header(&self) -> &RxHeader { + &self.rx_header + } #[doc = "0x58 - Configuration register."] - pub configuration: CONFIGURATION, + #[inline(always)] + pub const fn configuration(&self) -> &Configuration { + &self.configuration + } } -#[doc = "FIFO (rw) register accessor: an alias for `Reg`"] -pub type FIFO = crate::Reg; +#[doc = "FIFO (rw) register accessor: A write access to any address in this area will be mapped to the TX FIFO (only for the payload). A read access to any address in this area will be mapped to the RX FIFO (only for the payload). Using an address range (16 x 32-bit) rather than one single address mapped to the FIFO allows using incremental bursts.\n\nYou can [`read`](crate::Reg::read) this register and get [`fifo::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo`] +module"] +#[doc(alias = "FIFO")] +pub type Fifo = crate::Reg; #[doc = "A write access to any address in this area will be mapped to the TX FIFO (only for the payload). A read access to any address in this area will be mapped to the RX FIFO (only for the payload). Using an address range (16 x 32-bit) rather than one single address mapped to the FIFO allows using incremental bursts."] pub mod fifo; -#[doc = "TX_STATUS (r) register accessor: an alias for `Reg`"] -pub type TX_STATUS = crate::Reg; +#[doc = "TX_STATUS (r) register accessor: TX Status register.\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_status`] +module"] +#[doc(alias = "TX_STATUS")] +pub type TxStatus = crate::Reg; #[doc = "TX Status register."] pub mod tx_status; -#[doc = "RX_STATUS (r) register accessor: an alias for `Reg`"] -pub type RX_STATUS = crate::Reg; +#[doc = "RX_STATUS (r) register accessor: RX Status register.\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_status`] +module"] +#[doc(alias = "RX_STATUS")] +pub type RxStatus = crate::Reg; #[doc = "RX Status register."] pub mod rx_status; -#[doc = "TX_PROT (r) register accessor: an alias for `Reg`"] -pub type TX_PROT = crate::Reg; +#[doc = "TX_PROT (r) register accessor: TX Protection register.\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_prot::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_prot`] +module"] +#[doc(alias = "TX_PROT")] +pub type TxProt = crate::Reg; #[doc = "TX Protection register."] pub mod tx_prot; -#[doc = "RX_PROT (r) register accessor: an alias for `Reg`"] -pub type RX_PROT = crate::Reg; +#[doc = "RX_PROT (r) register accessor: RX Protection register.\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_prot::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_prot`] +module"] +#[doc(alias = "RX_PROT")] +pub type RxProt = crate::Reg; #[doc = "RX Protection register."] pub mod rx_prot; -#[doc = "TX_HEADER (w) register accessor: an alias for `Reg`"] -pub type TX_HEADER = crate::Reg; +#[doc = "TX_HEADER (w) register accessor: A write access to this register will be mapped to the TX FIFO (only for header).\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tx_header::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_header`] +module"] +#[doc(alias = "TX_HEADER")] +pub type TxHeader = crate::Reg; #[doc = "A write access to this register will be mapped to the TX FIFO (only for header)."] pub mod tx_header; -#[doc = "RX_HEADER (r) register accessor: an alias for `Reg`"] -pub type RX_HEADER = crate::Reg; +#[doc = "RX_HEADER (r) register accessor: A read access to this register will be mapped to the RX FIFO (only for the header).\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_header::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_header`] +module"] +#[doc(alias = "RX_HEADER")] +pub type RxHeader = crate::Reg; #[doc = "A read access to this register will be mapped to the RX FIFO (only for the header)."] pub mod rx_header; -#[doc = "CONFIGURATION (rw) register accessor: an alias for `Reg`"] -pub type CONFIGURATION = crate::Reg; +#[doc = "CONFIGURATION (rw) register accessor: Configuration register.\n\nYou can [`read`](crate::Reg::read) this register and get [`configuration::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`configuration::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@configuration`] +module"] +#[doc(alias = "CONFIGURATION")] +pub type Configuration = crate::Reg; #[doc = "Configuration register."] pub mod configuration; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/configuration.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/configuration.rs index da4bbc7..e7020d7 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/configuration.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/configuration.rs @@ -1,95 +1,55 @@ #[doc = "Register `CONFIGURATION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CONFIGURATION` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXINTEN` reader - TXINTEN"] -pub type TXINTEN_R = crate::BitReader; +pub type TxintenR = crate::BitReader; #[doc = "Field `TXINTEN` writer - TXINTEN"] -pub type TXINTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CONFIGURATION_SPEC, bool, O>; +pub type TxintenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXINTEN` reader - RXINTEN"] -pub type RXINTEN_R = crate::BitReader; +pub type RxintenR = crate::BitReader; #[doc = "Field `RXINTEN` writer - RXINTEN"] -pub type RXINTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CONFIGURATION_SPEC, bool, O>; +pub type RxintenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - TXINTEN"] #[inline(always)] - pub fn txinten(&self) -> TXINTEN_R { - TXINTEN_R::new((self.bits & 1) != 0) + pub fn txinten(&self) -> TxintenR { + TxintenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - RXINTEN"] #[inline(always)] - pub fn rxinten(&self) -> RXINTEN_R { - RXINTEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn rxinten(&self) -> RxintenR { + RxintenR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - TXINTEN"] #[inline(always)] #[must_use] - pub fn txinten(&mut self) -> TXINTEN_W<0> { - TXINTEN_W::new(self) + pub fn txinten(&mut self) -> TxintenW { + TxintenW::new(self, 0) } #[doc = "Bit 1 - RXINTEN"] #[inline(always)] #[must_use] - pub fn rxinten(&mut self) -> RXINTEN_W<1> { - RXINTEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rxinten(&mut self) -> RxintenW { + RxintenW::new(self, 1) } } -#[doc = "Configuration register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [configuration](index.html) module"] -pub struct CONFIGURATION_SPEC; -impl crate::RegisterSpec for CONFIGURATION_SPEC { +#[doc = "Configuration register.\n\nYou can [`read`](crate::Reg::read) this register and get [`configuration::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`configuration::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ConfigurationSpec; +impl crate::RegisterSpec for ConfigurationSpec { type Ux = u32; } -#[doc = "`read()` method returns [configuration::R](R) reader structure"] -impl crate::Readable for CONFIGURATION_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [configuration::W](W) writer structure"] -impl crate::Writable for CONFIGURATION_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`configuration::R`](R) reader structure"] +impl crate::Readable for ConfigurationSpec {} +#[doc = "`write(|w| ..)` method takes [`configuration::W`](W) writer structure"] +impl crate::Writable for ConfigurationSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONFIGURATION to value 0"] -impl crate::Resettable for CONFIGURATION_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ConfigurationSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/fifo.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/fifo.rs index a3e1a63..bf0124e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/fifo.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/fifo.rs @@ -1,80 +1,40 @@ #[doc = "Register `FIFO` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `FIFO` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `FIFO` reader - FIFO"] -pub type FIFO_R = crate::FieldReader; +pub type FifoR = crate::FieldReader; #[doc = "Field `FIFO` writer - FIFO"] -pub type FIFO_W<'a, const O: u8> = crate::FieldWriter<'a, u32, FIFO_SPEC, u32, u32, 32, O>; +pub type FifoW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - FIFO"] #[inline(always)] - pub fn fifo(&self) -> FIFO_R { - FIFO_R::new(self.bits) + pub fn fifo(&self) -> FifoR { + FifoR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - FIFO"] #[inline(always)] #[must_use] - pub fn fifo(&mut self) -> FIFO_W<0> { - FIFO_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn fifo(&mut self) -> FifoW { + FifoW::new(self, 0) } } -#[doc = "A write access to any address in this area will be mapped to the TX FIFO (only for the payload). A read access to any address in this area will be mapped to the RX FIFO (only for the payload). Using an address range (16 x 32-bit) rather than one single address mapped to the FIFO allows using incremental bursts.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fifo](index.html) module"] -pub struct FIFO_SPEC; -impl crate::RegisterSpec for FIFO_SPEC { +#[doc = "A write access to any address in this area will be mapped to the TX FIFO (only for the payload). A read access to any address in this area will be mapped to the RX FIFO (only for the payload). Using an address range (16 x 32-bit) rather than one single address mapped to the FIFO allows using incremental bursts.\n\nYou can [`read`](crate::Reg::read) this register and get [`fifo::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct FifoSpec; +impl crate::RegisterSpec for FifoSpec { type Ux = u32; } -#[doc = "`read()` method returns [fifo::R](R) reader structure"] -impl crate::Readable for FIFO_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [fifo::W](W) writer structure"] -impl crate::Writable for FIFO_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`fifo::R`](R) reader structure"] +impl crate::Readable for FifoSpec {} +#[doc = "`write(|w| ..)` method takes [`fifo::W`](W) writer structure"] +impl crate::Writable for FifoSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FIFO to value 0"] -impl crate::Resettable for FIFO_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for FifoSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/rx_header.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/rx_header.rs index 8037b83..543202d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/rx_header.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/rx_header.rs @@ -1,37 +1,22 @@ #[doc = "Register `RX_HEADER` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXHEADER` reader - RXHEADER"] -pub type RXHEADER_R = crate::FieldReader; +pub type RxheaderR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - RXHEADER"] #[inline(always)] - pub fn rxheader(&self) -> RXHEADER_R { - RXHEADER_R::new(self.bits) + pub fn rxheader(&self) -> RxheaderR { + RxheaderR::new(self.bits) } } -#[doc = "A read access to this register will be mapped to the RX FIFO (only for the header).\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rx_header](index.html) module"] -pub struct RX_HEADER_SPEC; -impl crate::RegisterSpec for RX_HEADER_SPEC { +#[doc = "A read access to this register will be mapped to the RX FIFO (only for the header).\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_header::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxHeaderSpec; +impl crate::RegisterSpec for RxHeaderSpec { type Ux = u32; } -#[doc = "`read()` method returns [rx_header::R](R) reader structure"] -impl crate::Readable for RX_HEADER_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rx_header::R`](R) reader structure"] +impl crate::Readable for RxHeaderSpec {} #[doc = "`reset()` method sets RX_HEADER to value 0"] -impl crate::Resettable for RX_HEADER_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxHeaderSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/rx_prot.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/rx_prot.rs index b10fab6..7511667 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/rx_prot.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/rx_prot.rs @@ -1,58 +1,43 @@ #[doc = "Register `RX_PROT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `UNPROTECTED` reader - UNPROTECTED"] -pub type UNPROTECTED_R = crate::BitReader; +pub type UnprotectedR = crate::BitReader; #[doc = "Field `PRIVILEGED` reader - PRIVILEGED"] -pub type PRIVILEGED_R = crate::BitReader; +pub type PrivilegedR = crate::BitReader; #[doc = "Field `NONSECURE` reader - NONSECURE"] -pub type NONSECURE_R = crate::BitReader; +pub type NonsecureR = crate::BitReader; #[doc = "Field `USER` reader - USER"] -pub type USER_R = crate::FieldReader; +pub type UserR = crate::FieldReader; impl R { #[doc = "Bit 21 - UNPROTECTED"] #[inline(always)] - pub fn unprotected(&self) -> UNPROTECTED_R { - UNPROTECTED_R::new(((self.bits >> 21) & 1) != 0) + pub fn unprotected(&self) -> UnprotectedR { + UnprotectedR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - PRIVILEGED"] #[inline(always)] - pub fn privileged(&self) -> PRIVILEGED_R { - PRIVILEGED_R::new(((self.bits >> 22) & 1) != 0) + pub fn privileged(&self) -> PrivilegedR { + PrivilegedR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - NONSECURE"] #[inline(always)] - pub fn nonsecure(&self) -> NONSECURE_R { - NONSECURE_R::new(((self.bits >> 23) & 1) != 0) + pub fn nonsecure(&self) -> NonsecureR { + NonsecureR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:31 - USER"] #[inline(always)] - pub fn user(&self) -> USER_R { - USER_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn user(&self) -> UserR { + UserR::new(((self.bits >> 24) & 0xff) as u8) } } -#[doc = "RX Protection register.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rx_prot](index.html) module"] -pub struct RX_PROT_SPEC; -impl crate::RegisterSpec for RX_PROT_SPEC { +#[doc = "RX Protection register.\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_prot::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxProtSpec; +impl crate::RegisterSpec for RxProtSpec { type Ux = u32; } -#[doc = "`read()` method returns [rx_prot::R](R) reader structure"] -impl crate::Readable for RX_PROT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rx_prot::R`](R) reader structure"] +impl crate::Readable for RxProtSpec {} #[doc = "`reset()` method sets RX_PROT to value 0"] -impl crate::Resettable for RX_PROT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxProtSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/rx_status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/rx_status.rs index 41ca8c3..e102464 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/rx_status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/rx_status.rs @@ -1,72 +1,57 @@ #[doc = "Register `RX_STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `REMBYTES` reader - REMBYTES"] -pub type REMBYTES_R = crate::FieldReader; +pub type RembytesR = crate::FieldReader; #[doc = "Field `MSGINFO` reader - MSGINFO"] -pub type MSGINFO_R = crate::FieldReader; +pub type MsginfoR = crate::FieldReader; #[doc = "Field `RXINT` reader - RXINT"] -pub type RXINT_R = crate::BitReader; +pub type RxintR = crate::BitReader; #[doc = "Field `RXEMPTY` reader - RXEMPTY"] -pub type RXEMPTY_R = crate::BitReader; +pub type RxemptyR = crate::BitReader; #[doc = "Field `RXHDR` reader - RXHDR"] -pub type RXHDR_R = crate::BitReader; +pub type RxhdrR = crate::BitReader; #[doc = "Field `RXERROR` reader - RXERROR"] -pub type RXERROR_R = crate::BitReader; +pub type RxerrorR = crate::BitReader; impl R { #[doc = "Bits 0:15 - REMBYTES"] #[inline(always)] - pub fn rembytes(&self) -> REMBYTES_R { - REMBYTES_R::new((self.bits & 0xffff) as u16) + pub fn rembytes(&self) -> RembytesR { + RembytesR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - MSGINFO"] #[inline(always)] - pub fn msginfo(&self) -> MSGINFO_R { - MSGINFO_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn msginfo(&self) -> MsginfoR { + MsginfoR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - RXINT"] #[inline(always)] - pub fn rxint(&self) -> RXINT_R { - RXINT_R::new(((self.bits >> 20) & 1) != 0) + pub fn rxint(&self) -> RxintR { + RxintR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - RXEMPTY"] #[inline(always)] - pub fn rxempty(&self) -> RXEMPTY_R { - RXEMPTY_R::new(((self.bits >> 21) & 1) != 0) + pub fn rxempty(&self) -> RxemptyR { + RxemptyR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - RXHDR"] #[inline(always)] - pub fn rxhdr(&self) -> RXHDR_R { - RXHDR_R::new(((self.bits >> 22) & 1) != 0) + pub fn rxhdr(&self) -> RxhdrR { + RxhdrR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - RXERROR"] #[inline(always)] - pub fn rxerror(&self) -> RXERROR_R { - RXERROR_R::new(((self.bits >> 23) & 1) != 0) + pub fn rxerror(&self) -> RxerrorR { + RxerrorR::new(((self.bits >> 23) & 1) != 0) } } -#[doc = "RX Status register.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rx_status](index.html) module"] -pub struct RX_STATUS_SPEC; -impl crate::RegisterSpec for RX_STATUS_SPEC { +#[doc = "RX Status register.\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxStatusSpec; +impl crate::RegisterSpec for RxStatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [rx_status::R](R) reader structure"] -impl crate::Readable for RX_STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rx_status::R`](R) reader structure"] +impl crate::Readable for RxStatusSpec {} #[doc = "`reset()` method sets RX_STATUS to value 0"] -impl crate::Resettable for RX_STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxStatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/tx_header.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/tx_header.rs index d7b343d..775decb 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/tx_header.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/tx_header.rs @@ -1,52 +1,27 @@ #[doc = "Register `TX_HEADER` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXHEADER` writer - TXHEADER"] -pub type TXHEADER_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TX_HEADER_SPEC, u32, u32, 32, O>; +pub type TxheaderW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl W { #[doc = "Bits 0:31 - TXHEADER"] #[inline(always)] #[must_use] - pub fn txheader(&mut self) -> TXHEADER_W<0> { - TXHEADER_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txheader(&mut self) -> TxheaderW { + TxheaderW::new(self, 0) } } -#[doc = "A write access to this register will be mapped to the TX FIFO (only for header).\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tx_header](index.html) module"] -pub struct TX_HEADER_SPEC; -impl crate::RegisterSpec for TX_HEADER_SPEC { +#[doc = "A write access to this register will be mapped to the TX FIFO (only for header).\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tx_header::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxHeaderSpec; +impl crate::RegisterSpec for TxHeaderSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [tx_header::W](W) writer structure"] -impl crate::Writable for TX_HEADER_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`tx_header::W`](W) writer structure"] +impl crate::Writable for TxHeaderSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TX_HEADER to value 0"] -impl crate::Resettable for TX_HEADER_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxHeaderSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/tx_prot.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/tx_prot.rs index 9be8038..c32f56e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/tx_prot.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/tx_prot.rs @@ -1,58 +1,43 @@ #[doc = "Register `TX_PROT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `UNPROTECTED` reader - UNPROTECTED"] -pub type UNPROTECTED_R = crate::BitReader; +pub type UnprotectedR = crate::BitReader; #[doc = "Field `PRIVILEGED` reader - PRIVILEGED"] -pub type PRIVILEGED_R = crate::BitReader; +pub type PrivilegedR = crate::BitReader; #[doc = "Field `NONSECURE` reader - NONSECURE"] -pub type NONSECURE_R = crate::BitReader; +pub type NonsecureR = crate::BitReader; #[doc = "Field `USER` reader - USER"] -pub type USER_R = crate::FieldReader; +pub type UserR = crate::FieldReader; impl R { #[doc = "Bit 21 - UNPROTECTED"] #[inline(always)] - pub fn unprotected(&self) -> UNPROTECTED_R { - UNPROTECTED_R::new(((self.bits >> 21) & 1) != 0) + pub fn unprotected(&self) -> UnprotectedR { + UnprotectedR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - PRIVILEGED"] #[inline(always)] - pub fn privileged(&self) -> PRIVILEGED_R { - PRIVILEGED_R::new(((self.bits >> 22) & 1) != 0) + pub fn privileged(&self) -> PrivilegedR { + PrivilegedR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - NONSECURE"] #[inline(always)] - pub fn nonsecure(&self) -> NONSECURE_R { - NONSECURE_R::new(((self.bits >> 23) & 1) != 0) + pub fn nonsecure(&self) -> NonsecureR { + NonsecureR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:31 - USER"] #[inline(always)] - pub fn user(&self) -> USER_R { - USER_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn user(&self) -> UserR { + UserR::new(((self.bits >> 24) & 0xff) as u8) } } -#[doc = "TX Protection register.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tx_prot](index.html) module"] -pub struct TX_PROT_SPEC; -impl crate::RegisterSpec for TX_PROT_SPEC { +#[doc = "TX Protection register.\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_prot::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxProtSpec; +impl crate::RegisterSpec for TxProtSpec { type Ux = u32; } -#[doc = "`read()` method returns [tx_prot::R](R) reader structure"] -impl crate::Readable for TX_PROT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`tx_prot::R`](R) reader structure"] +impl crate::Readable for TxProtSpec {} #[doc = "`reset()` method sets TX_PROT to value 0"] -impl crate::Resettable for TX_PROT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxProtSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/tx_status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/tx_status.rs index dcc9703..e9f4af1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/tx_status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/semailbox_s_host/tx_status.rs @@ -1,65 +1,50 @@ #[doc = "Register `TX_STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `REMBYTES` reader - REMBYTES"] -pub type REMBYTES_R = crate::FieldReader; +pub type RembytesR = crate::FieldReader; #[doc = "Field `MSGINFO` reader - MSGINFO"] -pub type MSGINFO_R = crate::FieldReader; +pub type MsginfoR = crate::FieldReader; #[doc = "Field `TXINT` reader - TXINT"] -pub type TXINT_R = crate::BitReader; +pub type TxintR = crate::BitReader; #[doc = "Field `TXFULL` reader - TXFULL"] -pub type TXFULL_R = crate::BitReader; +pub type TxfullR = crate::BitReader; #[doc = "Field `TXERROR` reader - TXERROR"] -pub type TXERROR_R = crate::BitReader; +pub type TxerrorR = crate::BitReader; impl R { #[doc = "Bits 0:15 - REMBYTES"] #[inline(always)] - pub fn rembytes(&self) -> REMBYTES_R { - REMBYTES_R::new((self.bits & 0xffff) as u16) + pub fn rembytes(&self) -> RembytesR { + RembytesR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - MSGINFO"] #[inline(always)] - pub fn msginfo(&self) -> MSGINFO_R { - MSGINFO_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn msginfo(&self) -> MsginfoR { + MsginfoR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - TXINT"] #[inline(always)] - pub fn txint(&self) -> TXINT_R { - TXINT_R::new(((self.bits >> 20) & 1) != 0) + pub fn txint(&self) -> TxintR { + TxintR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - TXFULL"] #[inline(always)] - pub fn txfull(&self) -> TXFULL_R { - TXFULL_R::new(((self.bits >> 21) & 1) != 0) + pub fn txfull(&self) -> TxfullR { + TxfullR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 23 - TXERROR"] #[inline(always)] - pub fn txerror(&self) -> TXERROR_R { - TXERROR_R::new(((self.bits >> 23) & 1) != 0) + pub fn txerror(&self) -> TxerrorR { + TxerrorR::new(((self.bits >> 23) & 1) != 0) } } -#[doc = "TX Status register.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tx_status](index.html) module"] -pub struct TX_STATUS_SPEC; -impl crate::RegisterSpec for TX_STATUS_SPEC { +#[doc = "TX Status register.\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxStatusSpec; +impl crate::RegisterSpec for TxStatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [tx_status::R](R) reader structure"] -impl crate::Readable for TX_STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`tx_status::R`](R) reader structure"] +impl crate::Readable for TxStatusSpec {} #[doc = "`reset()` method sets TX_STATUS to value 0"] -impl crate::Resettable for TX_STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxStatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns.rs index b3ca308..e8f1950 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns.rs @@ -1,140 +1,268 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + status: Status, + lock: Lock, + if_: If, + ien: Ien, + _reserved5: [u8; 0x0c], + m33ctrl: M33ctrl, + _reserved6: [u8; 0x1c], + ppupatd0: Ppupatd0, + ppupatd1: Ppupatd1, + _reserved8: [u8; 0x18], + ppusatd0: Ppusatd0, + ppusatd1: Ppusatd1, + _reserved10: [u8; 0xd8], + ppufs: Ppufs, + _reserved11: [u8; 0x0c], + bmpupatd0: Bmpupatd0, + _reserved12: [u8; 0x1c], + bmpusatd0: Bmpusatd0, + _reserved13: [u8; 0xdc], + bmpufs: Bmpufs, + bmpufsaddr: Bmpufsaddr, + _reserved15: [u8; 0x08], + esaurtypes0: Esaurtypes0, + esaurtypes1: Esaurtypes1, + _reserved17: [u8; 0x08], + esaumrb01: Esaumrb01, + esaumrb12: Esaumrb12, + _reserved19: [u8; 0x08], + esaumrb45: Esaumrb45, + esaumrb56: Esaumrb56, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x08 - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x0c - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x10 - No Description"] - pub ien: IEN, - _reserved5: [u8; 0x0c], + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x20 - Holds the M33 control settings"] - pub m33ctrl: M33CTRL, - _reserved6: [u8; 0x1c], + #[inline(always)] + pub const fn m33ctrl(&self) -> &M33ctrl { + &self.m33ctrl + } #[doc = "0x40 - Set peripheral bits to 1 to mark as privileged access only"] - pub ppupatd0: PPUPATD0, + #[inline(always)] + pub const fn ppupatd0(&self) -> &Ppupatd0 { + &self.ppupatd0 + } #[doc = "0x44 - Set peripheral bits to 1 to mark as privileged access only"] - pub ppupatd1: PPUPATD1, - _reserved8: [u8; 0x18], + #[inline(always)] + pub const fn ppupatd1(&self) -> &Ppupatd1 { + &self.ppupatd1 + } #[doc = "0x60 - Set peripheral bits to 1 to mark as secure access only"] - pub ppusatd0: PPUSATD0, + #[inline(always)] + pub const fn ppusatd0(&self) -> &Ppusatd0 { + &self.ppusatd0 + } #[doc = "0x64 - Set peripheral bits to 1 to mark as secure access only"] - pub ppusatd1: PPUSATD1, - _reserved10: [u8; 0xd8], + #[inline(always)] + pub const fn ppusatd1(&self) -> &Ppusatd1 { + &self.ppusatd1 + } #[doc = "0x140 - No Description"] - pub ppufs: PPUFS, - _reserved11: [u8; 0x0c], + #[inline(always)] + pub const fn ppufs(&self) -> &Ppufs { + &self.ppufs + } #[doc = "0x150 - Set master bits to 1 to mark as a privileged master"] - pub bmpupatd0: BMPUPATD0, - _reserved12: [u8; 0x1c], + #[inline(always)] + pub const fn bmpupatd0(&self) -> &Bmpupatd0 { + &self.bmpupatd0 + } #[doc = "0x170 - Set master bits to 1 to mark as a secure master"] - pub bmpusatd0: BMPUSATD0, - _reserved13: [u8; 0xdc], + #[inline(always)] + pub const fn bmpusatd0(&self) -> &Bmpusatd0 { + &self.bmpusatd0 + } #[doc = "0x250 - No Description"] - pub bmpufs: BMPUFS, + #[inline(always)] + pub const fn bmpufs(&self) -> &Bmpufs { + &self.bmpufs + } #[doc = "0x254 - No Description"] - pub bmpufsaddr: BMPUFSADDR, - _reserved15: [u8; 0x08], + #[inline(always)] + pub const fn bmpufsaddr(&self) -> &Bmpufsaddr { + &self.bmpufsaddr + } #[doc = "0x260 - No Description"] - pub esaurtypes0: ESAURTYPES0, + #[inline(always)] + pub const fn esaurtypes0(&self) -> &Esaurtypes0 { + &self.esaurtypes0 + } #[doc = "0x264 - No Description"] - pub esaurtypes1: ESAURTYPES1, - _reserved17: [u8; 0x08], + #[inline(always)] + pub const fn esaurtypes1(&self) -> &Esaurtypes1 { + &self.esaurtypes1 + } #[doc = "0x270 - No Description"] - pub esaumrb01: ESAUMRB01, + #[inline(always)] + pub const fn esaumrb01(&self) -> &Esaumrb01 { + &self.esaumrb01 + } #[doc = "0x274 - No Description"] - pub esaumrb12: ESAUMRB12, - _reserved19: [u8; 0x08], + #[inline(always)] + pub const fn esaumrb12(&self) -> &Esaumrb12 { + &self.esaumrb12 + } #[doc = "0x280 - No Description"] - pub esaumrb45: ESAUMRB45, + #[inline(always)] + pub const fn esaumrb45(&self) -> &Esaumrb45 { + &self.esaumrb45 + } #[doc = "0x284 - No Description"] - pub esaumrb56: ESAUMRB56, + #[inline(always)] + pub const fn esaumrb56(&self) -> &Esaumrb56 { + &self.esaumrb56 + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "M33CTRL (rw) register accessor: an alias for `Reg`"] -pub type M33CTRL = crate::Reg; +#[doc = "M33CTRL (rw) register accessor: Holds the M33 control settings\n\nYou can [`read`](crate::Reg::read) this register and get [`m33ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`m33ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@m33ctrl`] +module"] +#[doc(alias = "M33CTRL")] +pub type M33ctrl = crate::Reg; #[doc = "Holds the M33 control settings"] pub mod m33ctrl; -#[doc = "PPUPATD0 (rw) register accessor: an alias for `Reg`"] -pub type PPUPATD0 = crate::Reg; +#[doc = "PPUPATD0 (rw) register accessor: Set peripheral bits to 1 to mark as privileged access only\n\nYou can [`read`](crate::Reg::read) this register and get [`ppupatd0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ppupatd0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ppupatd0`] +module"] +#[doc(alias = "PPUPATD0")] +pub type Ppupatd0 = crate::Reg; #[doc = "Set peripheral bits to 1 to mark as privileged access only"] pub mod ppupatd0; -#[doc = "PPUPATD1 (rw) register accessor: an alias for `Reg`"] -pub type PPUPATD1 = crate::Reg; +#[doc = "PPUPATD1 (rw) register accessor: Set peripheral bits to 1 to mark as privileged access only\n\nYou can [`read`](crate::Reg::read) this register and get [`ppupatd1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ppupatd1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ppupatd1`] +module"] +#[doc(alias = "PPUPATD1")] +pub type Ppupatd1 = crate::Reg; #[doc = "Set peripheral bits to 1 to mark as privileged access only"] pub mod ppupatd1; -#[doc = "PPUSATD0 (rw) register accessor: an alias for `Reg`"] -pub type PPUSATD0 = crate::Reg; +#[doc = "PPUSATD0 (rw) register accessor: Set peripheral bits to 1 to mark as secure access only\n\nYou can [`read`](crate::Reg::read) this register and get [`ppusatd0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ppusatd0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ppusatd0`] +module"] +#[doc(alias = "PPUSATD0")] +pub type Ppusatd0 = crate::Reg; #[doc = "Set peripheral bits to 1 to mark as secure access only"] pub mod ppusatd0; -#[doc = "PPUSATD1 (rw) register accessor: an alias for `Reg`"] -pub type PPUSATD1 = crate::Reg; +#[doc = "PPUSATD1 (rw) register accessor: Set peripheral bits to 1 to mark as secure access only\n\nYou can [`read`](crate::Reg::read) this register and get [`ppusatd1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ppusatd1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ppusatd1`] +module"] +#[doc(alias = "PPUSATD1")] +pub type Ppusatd1 = crate::Reg; #[doc = "Set peripheral bits to 1 to mark as secure access only"] pub mod ppusatd1; -#[doc = "PPUFS (r) register accessor: an alias for `Reg`"] -pub type PPUFS = crate::Reg; +#[doc = "PPUFS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ppufs::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ppufs`] +module"] +#[doc(alias = "PPUFS")] +pub type Ppufs = crate::Reg; #[doc = "No Description"] pub mod ppufs; -#[doc = "BMPUPATD0 (rw) register accessor: an alias for `Reg`"] -pub type BMPUPATD0 = crate::Reg; +#[doc = "BMPUPATD0 (rw) register accessor: Set master bits to 1 to mark as a privileged master\n\nYou can [`read`](crate::Reg::read) this register and get [`bmpupatd0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bmpupatd0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bmpupatd0`] +module"] +#[doc(alias = "BMPUPATD0")] +pub type Bmpupatd0 = crate::Reg; #[doc = "Set master bits to 1 to mark as a privileged master"] pub mod bmpupatd0; -#[doc = "BMPUSATD0 (rw) register accessor: an alias for `Reg`"] -pub type BMPUSATD0 = crate::Reg; +#[doc = "BMPUSATD0 (rw) register accessor: Set master bits to 1 to mark as a secure master\n\nYou can [`read`](crate::Reg::read) this register and get [`bmpusatd0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bmpusatd0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bmpusatd0`] +module"] +#[doc(alias = "BMPUSATD0")] +pub type Bmpusatd0 = crate::Reg; #[doc = "Set master bits to 1 to mark as a secure master"] pub mod bmpusatd0; -#[doc = "BMPUFS (r) register accessor: an alias for `Reg`"] -pub type BMPUFS = crate::Reg; +#[doc = "BMPUFS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bmpufs::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bmpufs`] +module"] +#[doc(alias = "BMPUFS")] +pub type Bmpufs = crate::Reg; #[doc = "No Description"] pub mod bmpufs; -#[doc = "BMPUFSADDR (r) register accessor: an alias for `Reg`"] -pub type BMPUFSADDR = crate::Reg; +#[doc = "BMPUFSADDR (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bmpufsaddr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bmpufsaddr`] +module"] +#[doc(alias = "BMPUFSADDR")] +pub type Bmpufsaddr = crate::Reg; #[doc = "No Description"] pub mod bmpufsaddr; -#[doc = "ESAURTYPES0 (rw) register accessor: an alias for `Reg`"] -pub type ESAURTYPES0 = crate::Reg; +#[doc = "ESAURTYPES0 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`esaurtypes0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`esaurtypes0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@esaurtypes0`] +module"] +#[doc(alias = "ESAURTYPES0")] +pub type Esaurtypes0 = crate::Reg; #[doc = "No Description"] pub mod esaurtypes0; -#[doc = "ESAURTYPES1 (rw) register accessor: an alias for `Reg`"] -pub type ESAURTYPES1 = crate::Reg; +#[doc = "ESAURTYPES1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`esaurtypes1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`esaurtypes1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@esaurtypes1`] +module"] +#[doc(alias = "ESAURTYPES1")] +pub type Esaurtypes1 = crate::Reg; #[doc = "No Description"] pub mod esaurtypes1; -#[doc = "ESAUMRB01 (rw) register accessor: an alias for `Reg`"] -pub type ESAUMRB01 = crate::Reg; +#[doc = "ESAUMRB01 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`esaumrb01::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`esaumrb01::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@esaumrb01`] +module"] +#[doc(alias = "ESAUMRB01")] +pub type Esaumrb01 = crate::Reg; #[doc = "No Description"] pub mod esaumrb01; -#[doc = "ESAUMRB12 (rw) register accessor: an alias for `Reg`"] -pub type ESAUMRB12 = crate::Reg; +#[doc = "ESAUMRB12 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`esaumrb12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`esaumrb12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@esaumrb12`] +module"] +#[doc(alias = "ESAUMRB12")] +pub type Esaumrb12 = crate::Reg; #[doc = "No Description"] pub mod esaumrb12; -#[doc = "ESAUMRB45 (rw) register accessor: an alias for `Reg`"] -pub type ESAUMRB45 = crate::Reg; +#[doc = "ESAUMRB45 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`esaumrb45::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`esaumrb45::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@esaumrb45`] +module"] +#[doc(alias = "ESAUMRB45")] +pub type Esaumrb45 = crate::Reg; #[doc = "No Description"] pub mod esaumrb45; -#[doc = "ESAUMRB56 (rw) register accessor: an alias for `Reg`"] -pub type ESAUMRB56 = crate::Reg; +#[doc = "ESAUMRB56 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`esaumrb56::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`esaumrb56::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@esaumrb56`] +module"] +#[doc(alias = "ESAUMRB56")] +pub type Esaumrb56 = crate::Reg; #[doc = "No Description"] pub mod esaumrb56; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/bmpufs.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/bmpufs.rs index 2259250..876bb3a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/bmpufs.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/bmpufs.rs @@ -1,37 +1,22 @@ #[doc = "Register `BMPUFS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `BMPUFSMASTERID` reader - Bus Manager ID"] -pub type BMPUFSMASTERID_R = crate::FieldReader; +pub type BmpufsmasteridR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Bus Manager ID"] #[inline(always)] - pub fn bmpufsmasterid(&self) -> BMPUFSMASTERID_R { - BMPUFSMASTERID_R::new((self.bits & 0xff) as u8) + pub fn bmpufsmasterid(&self) -> BmpufsmasteridR { + BmpufsmasteridR::new((self.bits & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bmpufs](index.html) module"] -pub struct BMPUFS_SPEC; -impl crate::RegisterSpec for BMPUFS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bmpufs::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct BmpufsSpec; +impl crate::RegisterSpec for BmpufsSpec { type Ux = u32; } -#[doc = "`read()` method returns [bmpufs::R](R) reader structure"] -impl crate::Readable for BMPUFS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`bmpufs::R`](R) reader structure"] +impl crate::Readable for BmpufsSpec {} #[doc = "`reset()` method sets BMPUFS to value 0"] -impl crate::Resettable for BMPUFS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for BmpufsSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/bmpufsaddr.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/bmpufsaddr.rs index b9f40fe..663623c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/bmpufsaddr.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/bmpufsaddr.rs @@ -1,37 +1,22 @@ #[doc = "Register `BMPUFSADDR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `BMPUFSADDR` reader - Fault Address"] -pub type BMPUFSADDR_R = crate::FieldReader; +pub type BmpufsaddrR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Fault Address"] #[inline(always)] - pub fn bmpufsaddr(&self) -> BMPUFSADDR_R { - BMPUFSADDR_R::new(self.bits) + pub fn bmpufsaddr(&self) -> BmpufsaddrR { + BmpufsaddrR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bmpufsaddr](index.html) module"] -pub struct BMPUFSADDR_SPEC; -impl crate::RegisterSpec for BMPUFSADDR_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bmpufsaddr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct BmpufsaddrSpec; +impl crate::RegisterSpec for BmpufsaddrSpec { type Ux = u32; } -#[doc = "`read()` method returns [bmpufsaddr::R](R) reader structure"] -impl crate::Readable for BMPUFSADDR_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`bmpufsaddr::R`](R) reader structure"] +impl crate::Readable for BmpufsaddrSpec {} #[doc = "`reset()` method sets BMPUFSADDR to value 0"] -impl crate::Resettable for BMPUFSADDR_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for BmpufsaddrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/bmpupatd0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/bmpupatd0.rs index bd4f01a..a1c3895 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/bmpupatd0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/bmpupatd0.rs @@ -1,95 +1,55 @@ #[doc = "Register `BMPUPATD0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `BMPUPATD0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LDMA` reader - MCU LDMA privileged mode"] -pub type LDMA_R = crate::BitReader; +pub type LdmaR = crate::BitReader; #[doc = "Field `LDMA` writer - MCU LDMA privileged mode"] -pub type LDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, BMPUPATD0_SPEC, bool, O>; +pub type LdmaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SEEXTDMA` reader - SEEXTDMA privileged mode"] -pub type SEEXTDMA_R = crate::BitReader; +pub type SeextdmaR = crate::BitReader; #[doc = "Field `SEEXTDMA` writer - SEEXTDMA privileged mode"] -pub type SEEXTDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, BMPUPATD0_SPEC, bool, O>; +pub type SeextdmaW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 2 - MCU LDMA privileged mode"] #[inline(always)] - pub fn ldma(&self) -> LDMA_R { - LDMA_R::new(((self.bits >> 2) & 1) != 0) + pub fn ldma(&self) -> LdmaR { + LdmaR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 5 - SEEXTDMA privileged mode"] #[inline(always)] - pub fn seextdma(&self) -> SEEXTDMA_R { - SEEXTDMA_R::new(((self.bits >> 5) & 1) != 0) + pub fn seextdma(&self) -> SeextdmaR { + SeextdmaR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 2 - MCU LDMA privileged mode"] #[inline(always)] #[must_use] - pub fn ldma(&mut self) -> LDMA_W<2> { - LDMA_W::new(self) + pub fn ldma(&mut self) -> LdmaW { + LdmaW::new(self, 2) } #[doc = "Bit 5 - SEEXTDMA privileged mode"] #[inline(always)] #[must_use] - pub fn seextdma(&mut self) -> SEEXTDMA_W<5> { - SEEXTDMA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn seextdma(&mut self) -> SeextdmaW { + SeextdmaW::new(self, 5) } } -#[doc = "Set master bits to 1 to mark as a privileged master\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bmpupatd0](index.html) module"] -pub struct BMPUPATD0_SPEC; -impl crate::RegisterSpec for BMPUPATD0_SPEC { +#[doc = "Set master bits to 1 to mark as a privileged master\n\nYou can [`read`](crate::Reg::read) this register and get [`bmpupatd0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bmpupatd0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Bmpupatd0Spec; +impl crate::RegisterSpec for Bmpupatd0Spec { type Ux = u32; } -#[doc = "`read()` method returns [bmpupatd0::R](R) reader structure"] -impl crate::Readable for BMPUPATD0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [bmpupatd0::W](W) writer structure"] -impl crate::Writable for BMPUPATD0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`bmpupatd0::R`](R) reader structure"] +impl crate::Readable for Bmpupatd0Spec {} +#[doc = "`write(|w| ..)` method takes [`bmpupatd0::W`](W) writer structure"] +impl crate::Writable for Bmpupatd0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BMPUPATD0 to value 0x3f"] -impl crate::Resettable for BMPUPATD0_SPEC { - const RESET_VALUE: Self::Ux = 0x3f; +impl crate::Resettable for Bmpupatd0Spec { + const RESET_VALUE: u32 = 0x3f; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/bmpusatd0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/bmpusatd0.rs index 0639f64..680ffa1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/bmpusatd0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/bmpusatd0.rs @@ -1,95 +1,55 @@ #[doc = "Register `BMPUSATD0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `BMPUSATD0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LDMA` reader - MCU LDMA secure mode"] -pub type LDMA_R = crate::BitReader; +pub type LdmaR = crate::BitReader; #[doc = "Field `LDMA` writer - MCU LDMA secure mode"] -pub type LDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, BMPUSATD0_SPEC, bool, O>; +pub type LdmaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SEEXTDMA` reader - SEEXTDMA secure mode"] -pub type SEEXTDMA_R = crate::BitReader; +pub type SeextdmaR = crate::BitReader; #[doc = "Field `SEEXTDMA` writer - SEEXTDMA secure mode"] -pub type SEEXTDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, BMPUSATD0_SPEC, bool, O>; +pub type SeextdmaW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 2 - MCU LDMA secure mode"] #[inline(always)] - pub fn ldma(&self) -> LDMA_R { - LDMA_R::new(((self.bits >> 2) & 1) != 0) + pub fn ldma(&self) -> LdmaR { + LdmaR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 5 - SEEXTDMA secure mode"] #[inline(always)] - pub fn seextdma(&self) -> SEEXTDMA_R { - SEEXTDMA_R::new(((self.bits >> 5) & 1) != 0) + pub fn seextdma(&self) -> SeextdmaR { + SeextdmaR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 2 - MCU LDMA secure mode"] #[inline(always)] #[must_use] - pub fn ldma(&mut self) -> LDMA_W<2> { - LDMA_W::new(self) + pub fn ldma(&mut self) -> LdmaW { + LdmaW::new(self, 2) } #[doc = "Bit 5 - SEEXTDMA secure mode"] #[inline(always)] #[must_use] - pub fn seextdma(&mut self) -> SEEXTDMA_W<5> { - SEEXTDMA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn seextdma(&mut self) -> SeextdmaW { + SeextdmaW::new(self, 5) } } -#[doc = "Set master bits to 1 to mark as a secure master\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bmpusatd0](index.html) module"] -pub struct BMPUSATD0_SPEC; -impl crate::RegisterSpec for BMPUSATD0_SPEC { +#[doc = "Set master bits to 1 to mark as a secure master\n\nYou can [`read`](crate::Reg::read) this register and get [`bmpusatd0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bmpusatd0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Bmpusatd0Spec; +impl crate::RegisterSpec for Bmpusatd0Spec { type Ux = u32; } -#[doc = "`read()` method returns [bmpusatd0::R](R) reader structure"] -impl crate::Readable for BMPUSATD0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [bmpusatd0::W](W) writer structure"] -impl crate::Writable for BMPUSATD0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`bmpusatd0::R`](R) reader structure"] +impl crate::Readable for Bmpusatd0Spec {} +#[doc = "`write(|w| ..)` method takes [`bmpusatd0::W`](W) writer structure"] +impl crate::Writable for Bmpusatd0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BMPUSATD0 to value 0x3f"] -impl crate::Resettable for BMPUSATD0_SPEC { - const RESET_VALUE: Self::Ux = 0x3f; +impl crate::Resettable for Bmpusatd0Spec { + const RESET_VALUE: u32 = 0x3f; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/esaumrb01.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/esaumrb01.rs index e7111ac..1f0656e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/esaumrb01.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/esaumrb01.rs @@ -1,81 +1,40 @@ #[doc = "Register `ESAUMRB01` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ESAUMRB01` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ESAUMRB01` reader - Moveable Region Boundary"] -pub type ESAUMRB01_R = crate::FieldReader; +pub type Esaumrb01R = crate::FieldReader; #[doc = "Field `ESAUMRB01` writer - Moveable Region Boundary"] -pub type ESAUMRB01_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ESAUMRB01_SPEC, u16, u16, 16, O>; +pub type Esaumrb01W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 12:27 - Moveable Region Boundary"] #[inline(always)] - pub fn esaumrb01(&self) -> ESAUMRB01_R { - ESAUMRB01_R::new(((self.bits >> 12) & 0xffff) as u16) + pub fn esaumrb01(&self) -> Esaumrb01R { + Esaumrb01R::new(((self.bits >> 12) & 0xffff) as u16) } } impl W { #[doc = "Bits 12:27 - Moveable Region Boundary"] #[inline(always)] #[must_use] - pub fn esaumrb01(&mut self) -> ESAUMRB01_W<12> { - ESAUMRB01_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn esaumrb01(&mut self) -> Esaumrb01W { + Esaumrb01W::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [esaumrb01](index.html) module"] -pub struct ESAUMRB01_SPEC; -impl crate::RegisterSpec for ESAUMRB01_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`esaumrb01::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`esaumrb01::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Esaumrb01Spec; +impl crate::RegisterSpec for Esaumrb01Spec { type Ux = u32; } -#[doc = "`read()` method returns [esaumrb01::R](R) reader structure"] -impl crate::Readable for ESAUMRB01_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [esaumrb01::W](W) writer structure"] -impl crate::Writable for ESAUMRB01_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`esaumrb01::R`](R) reader structure"] +impl crate::Readable for Esaumrb01Spec {} +#[doc = "`write(|w| ..)` method takes [`esaumrb01::W`](W) writer structure"] +impl crate::Writable for Esaumrb01Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ESAUMRB01 to value 0x0a00_0000"] -impl crate::Resettable for ESAUMRB01_SPEC { - const RESET_VALUE: Self::Ux = 0x0a00_0000; +impl crate::Resettable for Esaumrb01Spec { + const RESET_VALUE: u32 = 0x0a00_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/esaumrb12.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/esaumrb12.rs index 43de56f..7a0f730 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/esaumrb12.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/esaumrb12.rs @@ -1,81 +1,40 @@ #[doc = "Register `ESAUMRB12` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ESAUMRB12` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ESAUMRB12` reader - Moveable Region Boundary"] -pub type ESAUMRB12_R = crate::FieldReader; +pub type Esaumrb12R = crate::FieldReader; #[doc = "Field `ESAUMRB12` writer - Moveable Region Boundary"] -pub type ESAUMRB12_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ESAUMRB12_SPEC, u16, u16, 16, O>; +pub type Esaumrb12W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 12:27 - Moveable Region Boundary"] #[inline(always)] - pub fn esaumrb12(&self) -> ESAUMRB12_R { - ESAUMRB12_R::new(((self.bits >> 12) & 0xffff) as u16) + pub fn esaumrb12(&self) -> Esaumrb12R { + Esaumrb12R::new(((self.bits >> 12) & 0xffff) as u16) } } impl W { #[doc = "Bits 12:27 - Moveable Region Boundary"] #[inline(always)] #[must_use] - pub fn esaumrb12(&mut self) -> ESAUMRB12_W<12> { - ESAUMRB12_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn esaumrb12(&mut self) -> Esaumrb12W { + Esaumrb12W::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [esaumrb12](index.html) module"] -pub struct ESAUMRB12_SPEC; -impl crate::RegisterSpec for ESAUMRB12_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`esaumrb12::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`esaumrb12::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Esaumrb12Spec; +impl crate::RegisterSpec for Esaumrb12Spec { type Ux = u32; } -#[doc = "`read()` method returns [esaumrb12::R](R) reader structure"] -impl crate::Readable for ESAUMRB12_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [esaumrb12::W](W) writer structure"] -impl crate::Writable for ESAUMRB12_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`esaumrb12::R`](R) reader structure"] +impl crate::Readable for Esaumrb12Spec {} +#[doc = "`write(|w| ..)` method takes [`esaumrb12::W`](W) writer structure"] +impl crate::Writable for Esaumrb12Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ESAUMRB12 to value 0x0c00_0000"] -impl crate::Resettable for ESAUMRB12_SPEC { - const RESET_VALUE: Self::Ux = 0x0c00_0000; +impl crate::Resettable for Esaumrb12Spec { + const RESET_VALUE: u32 = 0x0c00_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/esaumrb45.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/esaumrb45.rs index eff5303..7784d42 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/esaumrb45.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/esaumrb45.rs @@ -1,81 +1,40 @@ #[doc = "Register `ESAUMRB45` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ESAUMRB45` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ESAUMRB45` reader - Moveable Region Boundary"] -pub type ESAUMRB45_R = crate::FieldReader; +pub type Esaumrb45R = crate::FieldReader; #[doc = "Field `ESAUMRB45` writer - Moveable Region Boundary"] -pub type ESAUMRB45_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ESAUMRB45_SPEC, u16, u16, 16, O>; +pub type Esaumrb45W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 12:27 - Moveable Region Boundary"] #[inline(always)] - pub fn esaumrb45(&self) -> ESAUMRB45_R { - ESAUMRB45_R::new(((self.bits >> 12) & 0xffff) as u16) + pub fn esaumrb45(&self) -> Esaumrb45R { + Esaumrb45R::new(((self.bits >> 12) & 0xffff) as u16) } } impl W { #[doc = "Bits 12:27 - Moveable Region Boundary"] #[inline(always)] #[must_use] - pub fn esaumrb45(&mut self) -> ESAUMRB45_W<12> { - ESAUMRB45_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn esaumrb45(&mut self) -> Esaumrb45W { + Esaumrb45W::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [esaumrb45](index.html) module"] -pub struct ESAUMRB45_SPEC; -impl crate::RegisterSpec for ESAUMRB45_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`esaumrb45::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`esaumrb45::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Esaumrb45Spec; +impl crate::RegisterSpec for Esaumrb45Spec { type Ux = u32; } -#[doc = "`read()` method returns [esaumrb45::R](R) reader structure"] -impl crate::Readable for ESAUMRB45_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [esaumrb45::W](W) writer structure"] -impl crate::Writable for ESAUMRB45_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`esaumrb45::R`](R) reader structure"] +impl crate::Readable for Esaumrb45Spec {} +#[doc = "`write(|w| ..)` method takes [`esaumrb45::W`](W) writer structure"] +impl crate::Writable for Esaumrb45Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ESAUMRB45 to value 0x0200_0000"] -impl crate::Resettable for ESAUMRB45_SPEC { - const RESET_VALUE: Self::Ux = 0x0200_0000; +impl crate::Resettable for Esaumrb45Spec { + const RESET_VALUE: u32 = 0x0200_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/esaumrb56.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/esaumrb56.rs index 2b55649..5588918 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/esaumrb56.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/esaumrb56.rs @@ -1,81 +1,40 @@ #[doc = "Register `ESAUMRB56` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ESAUMRB56` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ESAUMRB56` reader - Moveable Region Boundary"] -pub type ESAUMRB56_R = crate::FieldReader; +pub type Esaumrb56R = crate::FieldReader; #[doc = "Field `ESAUMRB56` writer - Moveable Region Boundary"] -pub type ESAUMRB56_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ESAUMRB56_SPEC, u16, u16, 16, O>; +pub type Esaumrb56W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 12:27 - Moveable Region Boundary"] #[inline(always)] - pub fn esaumrb56(&self) -> ESAUMRB56_R { - ESAUMRB56_R::new(((self.bits >> 12) & 0xffff) as u16) + pub fn esaumrb56(&self) -> Esaumrb56R { + Esaumrb56R::new(((self.bits >> 12) & 0xffff) as u16) } } impl W { #[doc = "Bits 12:27 - Moveable Region Boundary"] #[inline(always)] #[must_use] - pub fn esaumrb56(&mut self) -> ESAUMRB56_W<12> { - ESAUMRB56_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn esaumrb56(&mut self) -> Esaumrb56W { + Esaumrb56W::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [esaumrb56](index.html) module"] -pub struct ESAUMRB56_SPEC; -impl crate::RegisterSpec for ESAUMRB56_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`esaumrb56::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`esaumrb56::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Esaumrb56Spec; +impl crate::RegisterSpec for Esaumrb56Spec { type Ux = u32; } -#[doc = "`read()` method returns [esaumrb56::R](R) reader structure"] -impl crate::Readable for ESAUMRB56_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [esaumrb56::W](W) writer structure"] -impl crate::Writable for ESAUMRB56_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`esaumrb56::R`](R) reader structure"] +impl crate::Readable for Esaumrb56Spec {} +#[doc = "`write(|w| ..)` method takes [`esaumrb56::W`](W) writer structure"] +impl crate::Writable for Esaumrb56Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ESAUMRB56 to value 0x0400_0000"] -impl crate::Resettable for ESAUMRB56_SPEC { - const RESET_VALUE: Self::Ux = 0x0400_0000; +impl crate::Resettable for Esaumrb56Spec { + const RESET_VALUE: u32 = 0x0400_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/esaurtypes0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/esaurtypes0.rs index 34b515f..ea9c88e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/esaurtypes0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/esaurtypes0.rs @@ -1,80 +1,40 @@ #[doc = "Register `ESAURTYPES0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ESAURTYPES0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ESAUR3NS` reader - Region 3 Non-Secure"] -pub type ESAUR3NS_R = crate::BitReader; +pub type Esaur3nsR = crate::BitReader; #[doc = "Field `ESAUR3NS` writer - Region 3 Non-Secure"] -pub type ESAUR3NS_W<'a, const O: u8> = crate::BitWriter<'a, u32, ESAURTYPES0_SPEC, bool, O>; +pub type Esaur3nsW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 12 - Region 3 Non-Secure"] #[inline(always)] - pub fn esaur3ns(&self) -> ESAUR3NS_R { - ESAUR3NS_R::new(((self.bits >> 12) & 1) != 0) + pub fn esaur3ns(&self) -> Esaur3nsR { + Esaur3nsR::new(((self.bits >> 12) & 1) != 0) } } impl W { #[doc = "Bit 12 - Region 3 Non-Secure"] #[inline(always)] #[must_use] - pub fn esaur3ns(&mut self) -> ESAUR3NS_W<12> { - ESAUR3NS_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn esaur3ns(&mut self) -> Esaur3nsW { + Esaur3nsW::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [esaurtypes0](index.html) module"] -pub struct ESAURTYPES0_SPEC; -impl crate::RegisterSpec for ESAURTYPES0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`esaurtypes0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`esaurtypes0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Esaurtypes0Spec; +impl crate::RegisterSpec for Esaurtypes0Spec { type Ux = u32; } -#[doc = "`read()` method returns [esaurtypes0::R](R) reader structure"] -impl crate::Readable for ESAURTYPES0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [esaurtypes0::W](W) writer structure"] -impl crate::Writable for ESAURTYPES0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`esaurtypes0::R`](R) reader structure"] +impl crate::Readable for Esaurtypes0Spec {} +#[doc = "`write(|w| ..)` method takes [`esaurtypes0::W`](W) writer structure"] +impl crate::Writable for Esaurtypes0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ESAURTYPES0 to value 0"] -impl crate::Resettable for ESAURTYPES0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Esaurtypes0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/esaurtypes1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/esaurtypes1.rs index 8abfe0e..fb10c3c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/esaurtypes1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/esaurtypes1.rs @@ -1,80 +1,40 @@ #[doc = "Register `ESAURTYPES1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ESAURTYPES1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ESAUR11NS` reader - Region 11 Non-Secure"] -pub type ESAUR11NS_R = crate::BitReader; +pub type Esaur11nsR = crate::BitReader; #[doc = "Field `ESAUR11NS` writer - Region 11 Non-Secure"] -pub type ESAUR11NS_W<'a, const O: u8> = crate::BitWriter<'a, u32, ESAURTYPES1_SPEC, bool, O>; +pub type Esaur11nsW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 12 - Region 11 Non-Secure"] #[inline(always)] - pub fn esaur11ns(&self) -> ESAUR11NS_R { - ESAUR11NS_R::new(((self.bits >> 12) & 1) != 0) + pub fn esaur11ns(&self) -> Esaur11nsR { + Esaur11nsR::new(((self.bits >> 12) & 1) != 0) } } impl W { #[doc = "Bit 12 - Region 11 Non-Secure"] #[inline(always)] #[must_use] - pub fn esaur11ns(&mut self) -> ESAUR11NS_W<12> { - ESAUR11NS_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn esaur11ns(&mut self) -> Esaur11nsW { + Esaur11nsW::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [esaurtypes1](index.html) module"] -pub struct ESAURTYPES1_SPEC; -impl crate::RegisterSpec for ESAURTYPES1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`esaurtypes1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`esaurtypes1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Esaurtypes1Spec; +impl crate::RegisterSpec for Esaurtypes1Spec { type Ux = u32; } -#[doc = "`read()` method returns [esaurtypes1::R](R) reader structure"] -impl crate::Readable for ESAURTYPES1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [esaurtypes1::W](W) writer structure"] -impl crate::Writable for ESAURTYPES1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`esaurtypes1::R`](R) reader structure"] +impl crate::Readable for Esaurtypes1Spec {} +#[doc = "`write(|w| ..)` method takes [`esaurtypes1::W`](W) writer structure"] +impl crate::Writable for Esaurtypes1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ESAURTYPES1 to value 0"] -impl crate::Resettable for ESAURTYPES1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Esaurtypes1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ien.rs index 90d2e3e..d3f09e1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ien.rs @@ -1,125 +1,85 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PPUPRIV` reader - PPU Privilege Interrupt Enable"] -pub type PPUPRIV_R = crate::BitReader; +pub type PpuprivR = crate::BitReader; #[doc = "Field `PPUPRIV` writer - PPU Privilege Interrupt Enable"] -pub type PPUPRIV_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PpuprivW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PPUINST` reader - PPU Instruction Interrupt Enable"] -pub type PPUINST_R = crate::BitReader; +pub type PpuinstR = crate::BitReader; #[doc = "Field `PPUINST` writer - PPU Instruction Interrupt Enable"] -pub type PPUINST_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PpuinstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PPUSEC` reader - PPU Security Interrupt Enable"] -pub type PPUSEC_R = crate::BitReader; +pub type PpusecR = crate::BitReader; #[doc = "Field `PPUSEC` writer - PPU Security Interrupt Enable"] -pub type PPUSEC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PpusecW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BMPUSEC` reader - BMPU Security Interrupt Enable"] -pub type BMPUSEC_R = crate::BitReader; +pub type BmpusecR = crate::BitReader; #[doc = "Field `BMPUSEC` writer - BMPU Security Interrupt Enable"] -pub type BMPUSEC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type BmpusecW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - PPU Privilege Interrupt Enable"] #[inline(always)] - pub fn ppupriv(&self) -> PPUPRIV_R { - PPUPRIV_R::new((self.bits & 1) != 0) + pub fn ppupriv(&self) -> PpuprivR { + PpuprivR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - PPU Instruction Interrupt Enable"] #[inline(always)] - pub fn ppuinst(&self) -> PPUINST_R { - PPUINST_R::new(((self.bits >> 2) & 1) != 0) + pub fn ppuinst(&self) -> PpuinstR { + PpuinstR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 16 - PPU Security Interrupt Enable"] #[inline(always)] - pub fn ppusec(&self) -> PPUSEC_R { - PPUSEC_R::new(((self.bits >> 16) & 1) != 0) + pub fn ppusec(&self) -> PpusecR { + PpusecR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - BMPU Security Interrupt Enable"] #[inline(always)] - pub fn bmpusec(&self) -> BMPUSEC_R { - BMPUSEC_R::new(((self.bits >> 17) & 1) != 0) + pub fn bmpusec(&self) -> BmpusecR { + BmpusecR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bit 0 - PPU Privilege Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ppupriv(&mut self) -> PPUPRIV_W<0> { - PPUPRIV_W::new(self) + pub fn ppupriv(&mut self) -> PpuprivW { + PpuprivW::new(self, 0) } #[doc = "Bit 2 - PPU Instruction Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ppuinst(&mut self) -> PPUINST_W<2> { - PPUINST_W::new(self) + pub fn ppuinst(&mut self) -> PpuinstW { + PpuinstW::new(self, 2) } #[doc = "Bit 16 - PPU Security Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ppusec(&mut self) -> PPUSEC_W<16> { - PPUSEC_W::new(self) + pub fn ppusec(&mut self) -> PpusecW { + PpusecW::new(self, 16) } #[doc = "Bit 17 - BMPU Security Interrupt Enable"] #[inline(always)] #[must_use] - pub fn bmpusec(&mut self) -> BMPUSEC_W<17> { - BMPUSEC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn bmpusec(&mut self) -> BmpusecW { + BmpusecW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/if_.rs index 38a2619..51a5d45 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/if_.rs @@ -1,125 +1,85 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PPUPRIV` reader - PPU Privilege Interrupt Flag"] -pub type PPUPRIV_R = crate::BitReader; +pub type PpuprivR = crate::BitReader; #[doc = "Field `PPUPRIV` writer - PPU Privilege Interrupt Flag"] -pub type PPUPRIV_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PpuprivW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PPUINST` reader - PPU Instruction Interrupt Flag"] -pub type PPUINST_R = crate::BitReader; +pub type PpuinstR = crate::BitReader; #[doc = "Field `PPUINST` writer - PPU Instruction Interrupt Flag"] -pub type PPUINST_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PpuinstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PPUSEC` reader - PPU Security Interrupt Flag"] -pub type PPUSEC_R = crate::BitReader; +pub type PpusecR = crate::BitReader; #[doc = "Field `PPUSEC` writer - PPU Security Interrupt Flag"] -pub type PPUSEC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PpusecW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BMPUSEC` reader - BMPU Security Interrupt Flag"] -pub type BMPUSEC_R = crate::BitReader; +pub type BmpusecR = crate::BitReader; #[doc = "Field `BMPUSEC` writer - BMPU Security Interrupt Flag"] -pub type BMPUSEC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type BmpusecW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - PPU Privilege Interrupt Flag"] #[inline(always)] - pub fn ppupriv(&self) -> PPUPRIV_R { - PPUPRIV_R::new((self.bits & 1) != 0) + pub fn ppupriv(&self) -> PpuprivR { + PpuprivR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - PPU Instruction Interrupt Flag"] #[inline(always)] - pub fn ppuinst(&self) -> PPUINST_R { - PPUINST_R::new(((self.bits >> 2) & 1) != 0) + pub fn ppuinst(&self) -> PpuinstR { + PpuinstR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 16 - PPU Security Interrupt Flag"] #[inline(always)] - pub fn ppusec(&self) -> PPUSEC_R { - PPUSEC_R::new(((self.bits >> 16) & 1) != 0) + pub fn ppusec(&self) -> PpusecR { + PpusecR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - BMPU Security Interrupt Flag"] #[inline(always)] - pub fn bmpusec(&self) -> BMPUSEC_R { - BMPUSEC_R::new(((self.bits >> 17) & 1) != 0) + pub fn bmpusec(&self) -> BmpusecR { + BmpusecR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bit 0 - PPU Privilege Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ppupriv(&mut self) -> PPUPRIV_W<0> { - PPUPRIV_W::new(self) + pub fn ppupriv(&mut self) -> PpuprivW { + PpuprivW::new(self, 0) } #[doc = "Bit 2 - PPU Instruction Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ppuinst(&mut self) -> PPUINST_W<2> { - PPUINST_W::new(self) + pub fn ppuinst(&mut self) -> PpuinstW { + PpuinstW::new(self, 2) } #[doc = "Bit 16 - PPU Security Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ppusec(&mut self) -> PPUSEC_W<16> { - PPUSEC_W::new(self) + pub fn ppusec(&mut self) -> PpusecW { + PpusecW::new(self, 16) } #[doc = "Bit 17 - BMPU Security Interrupt Flag"] #[inline(always)] #[must_use] - pub fn bmpusec(&mut self) -> BMPUSEC_W<17> { - BMPUSEC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn bmpusec(&mut self) -> BmpusecW { + BmpusecW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ipversion.rs index 5a9852f..568e909 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x02"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/lock.rs index f1fb4d1..a780ac2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "No Description\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum SMULOCKKEY_AW { +pub enum Smulockkey { #[doc = "11325013: Unlocks Registers"] - UNLOCK = 11325013, + Unlock = 11325013, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: SMULOCKKEY_AW) -> Self { + fn from(variant: Smulockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Smulockkey { + type Ux = u32; +} +impl crate::IsEnum for Smulockkey {} #[doc = "Field `SMULOCKKEY` writer - No Description"] -pub type SMULOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u32, SMULOCKKEY_AW, 24, O>; -impl<'a, const O: u8> SMULOCKKEY_W<'a, O> { +pub type SmulockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 24, Smulockkey>; +impl<'a, REG> SmulockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Unlocks Registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(SMULOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Smulockkey::Unlock) } } impl W { #[doc = "Bits 0:23 - No Description"] #[inline(always)] #[must_use] - pub fn smulockkey(&mut self) -> SMULOCKKEY_W<0> { - SMULOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn smulockkey(&mut self) -> SmulockkeyW { + SmulockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/m33ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/m33ctrl.rs index d7d3031..6771bf2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/m33ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/m33ctrl.rs @@ -1,140 +1,100 @@ #[doc = "Register `M33CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `M33CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOCKSVTAIRCR` reader - New BitField"] -pub type LOCKSVTAIRCR_R = crate::BitReader; +pub type LocksvtaircrR = crate::BitReader; #[doc = "Field `LOCKSVTAIRCR` writer - New BitField"] -pub type LOCKSVTAIRCR_W<'a, const O: u8> = crate::BitWriter<'a, u32, M33CTRL_SPEC, bool, O>; +pub type LocksvtaircrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOCKNSVTOR` reader - New BitField"] -pub type LOCKNSVTOR_R = crate::BitReader; +pub type LocknsvtorR = crate::BitReader; #[doc = "Field `LOCKNSVTOR` writer - New BitField"] -pub type LOCKNSVTOR_W<'a, const O: u8> = crate::BitWriter<'a, u32, M33CTRL_SPEC, bool, O>; +pub type LocknsvtorW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOCKSMPU` reader - New BitField"] -pub type LOCKSMPU_R = crate::BitReader; +pub type LocksmpuR = crate::BitReader; #[doc = "Field `LOCKSMPU` writer - New BitField"] -pub type LOCKSMPU_W<'a, const O: u8> = crate::BitWriter<'a, u32, M33CTRL_SPEC, bool, O>; +pub type LocksmpuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOCKNSMPU` reader - New BitField"] -pub type LOCKNSMPU_R = crate::BitReader; +pub type LocknsmpuR = crate::BitReader; #[doc = "Field `LOCKNSMPU` writer - New BitField"] -pub type LOCKNSMPU_W<'a, const O: u8> = crate::BitWriter<'a, u32, M33CTRL_SPEC, bool, O>; +pub type LocknsmpuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOCKSAU` reader - New BitField"] -pub type LOCKSAU_R = crate::BitReader; +pub type LocksauR = crate::BitReader; #[doc = "Field `LOCKSAU` writer - New BitField"] -pub type LOCKSAU_W<'a, const O: u8> = crate::BitWriter<'a, u32, M33CTRL_SPEC, bool, O>; +pub type LocksauW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - New BitField"] #[inline(always)] - pub fn locksvtaircr(&self) -> LOCKSVTAIRCR_R { - LOCKSVTAIRCR_R::new((self.bits & 1) != 0) + pub fn locksvtaircr(&self) -> LocksvtaircrR { + LocksvtaircrR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - New BitField"] #[inline(always)] - pub fn locknsvtor(&self) -> LOCKNSVTOR_R { - LOCKNSVTOR_R::new(((self.bits >> 1) & 1) != 0) + pub fn locknsvtor(&self) -> LocknsvtorR { + LocknsvtorR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - New BitField"] #[inline(always)] - pub fn locksmpu(&self) -> LOCKSMPU_R { - LOCKSMPU_R::new(((self.bits >> 2) & 1) != 0) + pub fn locksmpu(&self) -> LocksmpuR { + LocksmpuR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - New BitField"] #[inline(always)] - pub fn locknsmpu(&self) -> LOCKNSMPU_R { - LOCKNSMPU_R::new(((self.bits >> 3) & 1) != 0) + pub fn locknsmpu(&self) -> LocknsmpuR { + LocknsmpuR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - New BitField"] #[inline(always)] - pub fn locksau(&self) -> LOCKSAU_R { - LOCKSAU_R::new(((self.bits >> 4) & 1) != 0) + pub fn locksau(&self) -> LocksauR { + LocksauR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - New BitField"] #[inline(always)] #[must_use] - pub fn locksvtaircr(&mut self) -> LOCKSVTAIRCR_W<0> { - LOCKSVTAIRCR_W::new(self) + pub fn locksvtaircr(&mut self) -> LocksvtaircrW { + LocksvtaircrW::new(self, 0) } #[doc = "Bit 1 - New BitField"] #[inline(always)] #[must_use] - pub fn locknsvtor(&mut self) -> LOCKNSVTOR_W<1> { - LOCKNSVTOR_W::new(self) + pub fn locknsvtor(&mut self) -> LocknsvtorW { + LocknsvtorW::new(self, 1) } #[doc = "Bit 2 - New BitField"] #[inline(always)] #[must_use] - pub fn locksmpu(&mut self) -> LOCKSMPU_W<2> { - LOCKSMPU_W::new(self) + pub fn locksmpu(&mut self) -> LocksmpuW { + LocksmpuW::new(self, 2) } #[doc = "Bit 3 - New BitField"] #[inline(always)] #[must_use] - pub fn locknsmpu(&mut self) -> LOCKNSMPU_W<3> { - LOCKNSMPU_W::new(self) + pub fn locknsmpu(&mut self) -> LocknsmpuW { + LocknsmpuW::new(self, 3) } #[doc = "Bit 4 - New BitField"] #[inline(always)] #[must_use] - pub fn locksau(&mut self) -> LOCKSAU_W<4> { - LOCKSAU_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn locksau(&mut self) -> LocksauW { + LocksauW::new(self, 4) } } -#[doc = "Holds the M33 control settings\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [m33ctrl](index.html) module"] -pub struct M33CTRL_SPEC; -impl crate::RegisterSpec for M33CTRL_SPEC { +#[doc = "Holds the M33 control settings\n\nYou can [`read`](crate::Reg::read) this register and get [`m33ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`m33ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct M33ctrlSpec; +impl crate::RegisterSpec for M33ctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [m33ctrl::R](R) reader structure"] -impl crate::Readable for M33CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [m33ctrl::W](W) writer structure"] -impl crate::Writable for M33CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`m33ctrl::R`](R) reader structure"] +impl crate::Readable for M33ctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`m33ctrl::W`](W) writer structure"] +impl crate::Writable for M33ctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets M33CTRL to value 0"] -impl crate::Resettable for M33CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for M33ctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ppufs.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ppufs.rs index 0c3c6a4..e5f2ef0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ppufs.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ppufs.rs @@ -1,37 +1,22 @@ #[doc = "Register `PPUFS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `PPUFSPERIPHID` reader - Peripheral ID"] -pub type PPUFSPERIPHID_R = crate::FieldReader; +pub type PpufsperiphidR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Peripheral ID"] #[inline(always)] - pub fn ppufsperiphid(&self) -> PPUFSPERIPHID_R { - PPUFSPERIPHID_R::new((self.bits & 0xff) as u8) + pub fn ppufsperiphid(&self) -> PpufsperiphidR { + PpufsperiphidR::new((self.bits & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ppufs](index.html) module"] -pub struct PPUFS_SPEC; -impl crate::RegisterSpec for PPUFS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ppufs::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PpufsSpec; +impl crate::RegisterSpec for PpufsSpec { type Ux = u32; } -#[doc = "`read()` method returns [ppufs::R](R) reader structure"] -impl crate::Readable for PPUFS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ppufs::R`](R) reader structure"] +impl crate::Readable for PpufsSpec {} #[doc = "`reset()` method sets PPUFS to value 0"] -impl crate::Resettable for PPUFS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PpufsSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ppupatd0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ppupatd0.rs index af0e0f9..45b6f17 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ppupatd0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ppupatd0.rs @@ -1,530 +1,490 @@ #[doc = "Register `PPUPATD0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PPUPATD0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EMU` reader - EMU Privileged Access"] -pub type EMU_R = crate::BitReader; +pub type EmuR = crate::BitReader; #[doc = "Field `EMU` writer - EMU Privileged Access"] -pub type EMU_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type EmuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CMU` reader - CMU Privileged Access"] -pub type CMU_R = crate::BitReader; +pub type CmuR = crate::BitReader; #[doc = "Field `CMU` writer - CMU Privileged Access"] -pub type CMU_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type CmuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HFRCO0` reader - HFRCO0 Privileged Access"] -pub type HFRCO0_R = crate::BitReader; +pub type Hfrco0R = crate::BitReader; #[doc = "Field `HFRCO0` writer - HFRCO0 Privileged Access"] -pub type HFRCO0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type Hfrco0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FSRCO` reader - FSRCO Privileged Access"] -pub type FSRCO_R = crate::BitReader; +pub type FsrcoR = crate::BitReader; #[doc = "Field `FSRCO` writer - FSRCO Privileged Access"] -pub type FSRCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type FsrcoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DPLL0` reader - DPLL0 Privileged Access"] -pub type DPLL0_R = crate::BitReader; +pub type Dpll0R = crate::BitReader; #[doc = "Field `DPLL0` writer - DPLL0 Privileged Access"] -pub type DPLL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type Dpll0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LFXO` reader - LFXO Privileged Access"] -pub type LFXO_R = crate::BitReader; +pub type LfxoR = crate::BitReader; #[doc = "Field `LFXO` writer - LFXO Privileged Access"] -pub type LFXO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type LfxoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LFRCO` reader - LFRCO Privileged Access"] -pub type LFRCO_R = crate::BitReader; +pub type LfrcoR = crate::BitReader; #[doc = "Field `LFRCO` writer - LFRCO Privileged Access"] -pub type LFRCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type LfrcoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ULFRCO` reader - ULFRCO Privileged Access"] -pub type ULFRCO_R = crate::BitReader; +pub type UlfrcoR = crate::BitReader; #[doc = "Field `ULFRCO` writer - ULFRCO Privileged Access"] -pub type ULFRCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type UlfrcoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MSC` reader - MSC Privileged Access"] -pub type MSC_R = crate::BitReader; +pub type MscR = crate::BitReader; #[doc = "Field `MSC` writer - MSC Privileged Access"] -pub type MSC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type MscW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICACHE0` reader - ICACHE0 Privileged Access"] -pub type ICACHE0_R = crate::BitReader; +pub type Icache0R = crate::BitReader; #[doc = "Field `ICACHE0` writer - ICACHE0 Privileged Access"] -pub type ICACHE0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type Icache0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRS` reader - PRS Privileged Access"] -pub type PRS_R = crate::BitReader; +pub type PrsR = crate::BitReader; #[doc = "Field `PRS` writer - PRS Privileged Access"] -pub type PRS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type PrsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GPIO` reader - GPIO Privileged Access"] -pub type GPIO_R = crate::BitReader; +pub type GpioR = crate::BitReader; #[doc = "Field `GPIO` writer - GPIO Privileged Access"] -pub type GPIO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type GpioW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LDMA` reader - LDMA Privileged Access"] -pub type LDMA_R = crate::BitReader; +pub type LdmaR = crate::BitReader; #[doc = "Field `LDMA` writer - LDMA Privileged Access"] -pub type LDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type LdmaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LDMAXBAR` reader - LDMAXBAR Privileged Access"] -pub type LDMAXBAR_R = crate::BitReader; +pub type LdmaxbarR = crate::BitReader; #[doc = "Field `LDMAXBAR` writer - LDMAXBAR Privileged Access"] -pub type LDMAXBAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type LdmaxbarW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER0` reader - TIMER0 Privileged Access"] -pub type TIMER0_R = crate::BitReader; +pub type Timer0R = crate::BitReader; #[doc = "Field `TIMER0` writer - TIMER0 Privileged Access"] -pub type TIMER0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type Timer0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER1` reader - TIMER1 Privileged Access"] -pub type TIMER1_R = crate::BitReader; +pub type Timer1R = crate::BitReader; #[doc = "Field `TIMER1` writer - TIMER1 Privileged Access"] -pub type TIMER1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type Timer1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER2` reader - TIMER2 Privileged Access"] -pub type TIMER2_R = crate::BitReader; +pub type Timer2R = crate::BitReader; #[doc = "Field `TIMER2` writer - TIMER2 Privileged Access"] -pub type TIMER2_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type Timer2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER3` reader - TIMER3 Privileged Access"] -pub type TIMER3_R = crate::BitReader; +pub type Timer3R = crate::BitReader; #[doc = "Field `TIMER3` writer - TIMER3 Privileged Access"] -pub type TIMER3_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type Timer3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER4` reader - TIMER4 Privileged Access"] -pub type TIMER4_R = crate::BitReader; +pub type Timer4R = crate::BitReader; #[doc = "Field `TIMER4` writer - TIMER4 Privileged Access"] -pub type TIMER4_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type Timer4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USART0` reader - USART0 Privileged Access"] -pub type USART0_R = crate::BitReader; +pub type Usart0R = crate::BitReader; #[doc = "Field `USART0` writer - USART0 Privileged Access"] -pub type USART0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type Usart0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BURTC` reader - BURTC Privileged Access"] -pub type BURTC_R = crate::BitReader; +pub type BurtcR = crate::BitReader; #[doc = "Field `BURTC` writer - BURTC Privileged Access"] -pub type BURTC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type BurtcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C1` reader - I2C1 Privileged Access"] -pub type I2C1_R = crate::BitReader; +pub type I2c1R = crate::BitReader; #[doc = "Field `I2C1` writer - I2C1 Privileged Access"] -pub type I2C1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type I2c1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHIPTESTCTRL` reader - CHIPTESTCTRL Privileged Access"] -pub type CHIPTESTCTRL_R = crate::BitReader; +pub type ChiptestctrlR = crate::BitReader; #[doc = "Field `CHIPTESTCTRL` writer - CHIPTESTCTRL Privileged Access"] -pub type CHIPTESTCTRL_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type ChiptestctrlW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYSCFGCFGNS` reader - SYSCFGCFGNS Privileged Access"] -pub type SYSCFGCFGNS_R = crate::BitReader; +pub type SyscfgcfgnsR = crate::BitReader; #[doc = "Field `SYSCFGCFGNS` writer - SYSCFGCFGNS Privileged Access"] -pub type SYSCFGCFGNS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type SyscfgcfgnsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYSCFG` reader - SYSCFG Privileged Access"] -pub type SYSCFG_R = crate::BitReader; +pub type SyscfgR = crate::BitReader; #[doc = "Field `SYSCFG` writer - SYSCFG Privileged Access"] -pub type SYSCFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type SyscfgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BURAM` reader - BURAM Privileged Access"] -pub type BURAM_R = crate::BitReader; +pub type BuramR = crate::BitReader; #[doc = "Field `BURAM` writer - BURAM Privileged Access"] -pub type BURAM_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type BuramW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GPCRC` reader - GPCRC Privileged Access"] -pub type GPCRC_R = crate::BitReader; +pub type GpcrcR = crate::BitReader; #[doc = "Field `GPCRC` writer - GPCRC Privileged Access"] -pub type GPCRC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type GpcrcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCDC` reader - DCDC Privileged Access"] -pub type DCDC_R = crate::BitReader; +pub type DcdcR = crate::BitReader; #[doc = "Field `DCDC` writer - DCDC Privileged Access"] -pub type DCDC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type DcdcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HOSTMAILBOX` reader - HOSTMAILBOX Privileged Access"] -pub type HOSTMAILBOX_R = crate::BitReader; +pub type HostmailboxR = crate::BitReader; #[doc = "Field `HOSTMAILBOX` writer - HOSTMAILBOX Privileged Access"] -pub type HOSTMAILBOX_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type HostmailboxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EUSART1` reader - EUSART1 Privileged Access"] -pub type EUSART1_R = crate::BitReader; +pub type Eusart1R = crate::BitReader; #[doc = "Field `EUSART1` writer - EUSART1 Privileged Access"] -pub type EUSART1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type Eusart1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EUSART2` reader - EUSART2 Privileged Access"] -pub type EUSART2_R = crate::BitReader; +pub type Eusart2R = crate::BitReader; #[doc = "Field `EUSART2` writer - EUSART2 Privileged Access"] -pub type EUSART2_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type Eusart2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 1 - EMU Privileged Access"] #[inline(always)] - pub fn emu(&self) -> EMU_R { - EMU_R::new(((self.bits >> 1) & 1) != 0) + pub fn emu(&self) -> EmuR { + EmuR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CMU Privileged Access"] #[inline(always)] - pub fn cmu(&self) -> CMU_R { - CMU_R::new(((self.bits >> 2) & 1) != 0) + pub fn cmu(&self) -> CmuR { + CmuR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - HFRCO0 Privileged Access"] #[inline(always)] - pub fn hfrco0(&self) -> HFRCO0_R { - HFRCO0_R::new(((self.bits >> 3) & 1) != 0) + pub fn hfrco0(&self) -> Hfrco0R { + Hfrco0R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - FSRCO Privileged Access"] #[inline(always)] - pub fn fsrco(&self) -> FSRCO_R { - FSRCO_R::new(((self.bits >> 4) & 1) != 0) + pub fn fsrco(&self) -> FsrcoR { + FsrcoR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DPLL0 Privileged Access"] #[inline(always)] - pub fn dpll0(&self) -> DPLL0_R { - DPLL0_R::new(((self.bits >> 5) & 1) != 0) + pub fn dpll0(&self) -> Dpll0R { + Dpll0R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - LFXO Privileged Access"] #[inline(always)] - pub fn lfxo(&self) -> LFXO_R { - LFXO_R::new(((self.bits >> 6) & 1) != 0) + pub fn lfxo(&self) -> LfxoR { + LfxoR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - LFRCO Privileged Access"] #[inline(always)] - pub fn lfrco(&self) -> LFRCO_R { - LFRCO_R::new(((self.bits >> 7) & 1) != 0) + pub fn lfrco(&self) -> LfrcoR { + LfrcoR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - ULFRCO Privileged Access"] #[inline(always)] - pub fn ulfrco(&self) -> ULFRCO_R { - ULFRCO_R::new(((self.bits >> 8) & 1) != 0) + pub fn ulfrco(&self) -> UlfrcoR { + UlfrcoR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - MSC Privileged Access"] #[inline(always)] - pub fn msc(&self) -> MSC_R { - MSC_R::new(((self.bits >> 9) & 1) != 0) + pub fn msc(&self) -> MscR { + MscR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - ICACHE0 Privileged Access"] #[inline(always)] - pub fn icache0(&self) -> ICACHE0_R { - ICACHE0_R::new(((self.bits >> 10) & 1) != 0) + pub fn icache0(&self) -> Icache0R { + Icache0R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - PRS Privileged Access"] #[inline(always)] - pub fn prs(&self) -> PRS_R { - PRS_R::new(((self.bits >> 11) & 1) != 0) + pub fn prs(&self) -> PrsR { + PrsR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - GPIO Privileged Access"] #[inline(always)] - pub fn gpio(&self) -> GPIO_R { - GPIO_R::new(((self.bits >> 12) & 1) != 0) + pub fn gpio(&self) -> GpioR { + GpioR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - LDMA Privileged Access"] #[inline(always)] - pub fn ldma(&self) -> LDMA_R { - LDMA_R::new(((self.bits >> 13) & 1) != 0) + pub fn ldma(&self) -> LdmaR { + LdmaR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - LDMAXBAR Privileged Access"] #[inline(always)] - pub fn ldmaxbar(&self) -> LDMAXBAR_R { - LDMAXBAR_R::new(((self.bits >> 14) & 1) != 0) + pub fn ldmaxbar(&self) -> LdmaxbarR { + LdmaxbarR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - TIMER0 Privileged Access"] #[inline(always)] - pub fn timer0(&self) -> TIMER0_R { - TIMER0_R::new(((self.bits >> 15) & 1) != 0) + pub fn timer0(&self) -> Timer0R { + Timer0R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - TIMER1 Privileged Access"] #[inline(always)] - pub fn timer1(&self) -> TIMER1_R { - TIMER1_R::new(((self.bits >> 16) & 1) != 0) + pub fn timer1(&self) -> Timer1R { + Timer1R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - TIMER2 Privileged Access"] #[inline(always)] - pub fn timer2(&self) -> TIMER2_R { - TIMER2_R::new(((self.bits >> 17) & 1) != 0) + pub fn timer2(&self) -> Timer2R { + Timer2R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - TIMER3 Privileged Access"] #[inline(always)] - pub fn timer3(&self) -> TIMER3_R { - TIMER3_R::new(((self.bits >> 18) & 1) != 0) + pub fn timer3(&self) -> Timer3R { + Timer3R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - TIMER4 Privileged Access"] #[inline(always)] - pub fn timer4(&self) -> TIMER4_R { - TIMER4_R::new(((self.bits >> 19) & 1) != 0) + pub fn timer4(&self) -> Timer4R { + Timer4R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - USART0 Privileged Access"] #[inline(always)] - pub fn usart0(&self) -> USART0_R { - USART0_R::new(((self.bits >> 20) & 1) != 0) + pub fn usart0(&self) -> Usart0R { + Usart0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - BURTC Privileged Access"] #[inline(always)] - pub fn burtc(&self) -> BURTC_R { - BURTC_R::new(((self.bits >> 21) & 1) != 0) + pub fn burtc(&self) -> BurtcR { + BurtcR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - I2C1 Privileged Access"] #[inline(always)] - pub fn i2c1(&self) -> I2C1_R { - I2C1_R::new(((self.bits >> 22) & 1) != 0) + pub fn i2c1(&self) -> I2c1R { + I2c1R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - CHIPTESTCTRL Privileged Access"] #[inline(always)] - pub fn chiptestctrl(&self) -> CHIPTESTCTRL_R { - CHIPTESTCTRL_R::new(((self.bits >> 23) & 1) != 0) + pub fn chiptestctrl(&self) -> ChiptestctrlR { + ChiptestctrlR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - SYSCFGCFGNS Privileged Access"] #[inline(always)] - pub fn syscfgcfgns(&self) -> SYSCFGCFGNS_R { - SYSCFGCFGNS_R::new(((self.bits >> 24) & 1) != 0) + pub fn syscfgcfgns(&self) -> SyscfgcfgnsR { + SyscfgcfgnsR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - SYSCFG Privileged Access"] #[inline(always)] - pub fn syscfg(&self) -> SYSCFG_R { - SYSCFG_R::new(((self.bits >> 25) & 1) != 0) + pub fn syscfg(&self) -> SyscfgR { + SyscfgR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - BURAM Privileged Access"] #[inline(always)] - pub fn buram(&self) -> BURAM_R { - BURAM_R::new(((self.bits >> 26) & 1) != 0) + pub fn buram(&self) -> BuramR { + BuramR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - GPCRC Privileged Access"] #[inline(always)] - pub fn gpcrc(&self) -> GPCRC_R { - GPCRC_R::new(((self.bits >> 27) & 1) != 0) + pub fn gpcrc(&self) -> GpcrcR { + GpcrcR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - DCDC Privileged Access"] #[inline(always)] - pub fn dcdc(&self) -> DCDC_R { - DCDC_R::new(((self.bits >> 28) & 1) != 0) + pub fn dcdc(&self) -> DcdcR { + DcdcR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - HOSTMAILBOX Privileged Access"] #[inline(always)] - pub fn hostmailbox(&self) -> HOSTMAILBOX_R { - HOSTMAILBOX_R::new(((self.bits >> 29) & 1) != 0) + pub fn hostmailbox(&self) -> HostmailboxR { + HostmailboxR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - EUSART1 Privileged Access"] #[inline(always)] - pub fn eusart1(&self) -> EUSART1_R { - EUSART1_R::new(((self.bits >> 30) & 1) != 0) + pub fn eusart1(&self) -> Eusart1R { + Eusart1R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - EUSART2 Privileged Access"] #[inline(always)] - pub fn eusart2(&self) -> EUSART2_R { - EUSART2_R::new(((self.bits >> 31) & 1) != 0) + pub fn eusart2(&self) -> Eusart2R { + Eusart2R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 1 - EMU Privileged Access"] #[inline(always)] #[must_use] - pub fn emu(&mut self) -> EMU_W<1> { - EMU_W::new(self) + pub fn emu(&mut self) -> EmuW { + EmuW::new(self, 1) } #[doc = "Bit 2 - CMU Privileged Access"] #[inline(always)] #[must_use] - pub fn cmu(&mut self) -> CMU_W<2> { - CMU_W::new(self) + pub fn cmu(&mut self) -> CmuW { + CmuW::new(self, 2) } #[doc = "Bit 3 - HFRCO0 Privileged Access"] #[inline(always)] #[must_use] - pub fn hfrco0(&mut self) -> HFRCO0_W<3> { - HFRCO0_W::new(self) + pub fn hfrco0(&mut self) -> Hfrco0W { + Hfrco0W::new(self, 3) } #[doc = "Bit 4 - FSRCO Privileged Access"] #[inline(always)] #[must_use] - pub fn fsrco(&mut self) -> FSRCO_W<4> { - FSRCO_W::new(self) + pub fn fsrco(&mut self) -> FsrcoW { + FsrcoW::new(self, 4) } #[doc = "Bit 5 - DPLL0 Privileged Access"] #[inline(always)] #[must_use] - pub fn dpll0(&mut self) -> DPLL0_W<5> { - DPLL0_W::new(self) + pub fn dpll0(&mut self) -> Dpll0W { + Dpll0W::new(self, 5) } #[doc = "Bit 6 - LFXO Privileged Access"] #[inline(always)] #[must_use] - pub fn lfxo(&mut self) -> LFXO_W<6> { - LFXO_W::new(self) + pub fn lfxo(&mut self) -> LfxoW { + LfxoW::new(self, 6) } #[doc = "Bit 7 - LFRCO Privileged Access"] #[inline(always)] #[must_use] - pub fn lfrco(&mut self) -> LFRCO_W<7> { - LFRCO_W::new(self) + pub fn lfrco(&mut self) -> LfrcoW { + LfrcoW::new(self, 7) } #[doc = "Bit 8 - ULFRCO Privileged Access"] #[inline(always)] #[must_use] - pub fn ulfrco(&mut self) -> ULFRCO_W<8> { - ULFRCO_W::new(self) + pub fn ulfrco(&mut self) -> UlfrcoW { + UlfrcoW::new(self, 8) } #[doc = "Bit 9 - MSC Privileged Access"] #[inline(always)] #[must_use] - pub fn msc(&mut self) -> MSC_W<9> { - MSC_W::new(self) + pub fn msc(&mut self) -> MscW { + MscW::new(self, 9) } #[doc = "Bit 10 - ICACHE0 Privileged Access"] #[inline(always)] #[must_use] - pub fn icache0(&mut self) -> ICACHE0_W<10> { - ICACHE0_W::new(self) + pub fn icache0(&mut self) -> Icache0W { + Icache0W::new(self, 10) } #[doc = "Bit 11 - PRS Privileged Access"] #[inline(always)] #[must_use] - pub fn prs(&mut self) -> PRS_W<11> { - PRS_W::new(self) + pub fn prs(&mut self) -> PrsW { + PrsW::new(self, 11) } #[doc = "Bit 12 - GPIO Privileged Access"] #[inline(always)] #[must_use] - pub fn gpio(&mut self) -> GPIO_W<12> { - GPIO_W::new(self) + pub fn gpio(&mut self) -> GpioW { + GpioW::new(self, 12) } #[doc = "Bit 13 - LDMA Privileged Access"] #[inline(always)] #[must_use] - pub fn ldma(&mut self) -> LDMA_W<13> { - LDMA_W::new(self) + pub fn ldma(&mut self) -> LdmaW { + LdmaW::new(self, 13) } #[doc = "Bit 14 - LDMAXBAR Privileged Access"] #[inline(always)] #[must_use] - pub fn ldmaxbar(&mut self) -> LDMAXBAR_W<14> { - LDMAXBAR_W::new(self) + pub fn ldmaxbar(&mut self) -> LdmaxbarW { + LdmaxbarW::new(self, 14) } #[doc = "Bit 15 - TIMER0 Privileged Access"] #[inline(always)] #[must_use] - pub fn timer0(&mut self) -> TIMER0_W<15> { - TIMER0_W::new(self) + pub fn timer0(&mut self) -> Timer0W { + Timer0W::new(self, 15) } #[doc = "Bit 16 - TIMER1 Privileged Access"] #[inline(always)] #[must_use] - pub fn timer1(&mut self) -> TIMER1_W<16> { - TIMER1_W::new(self) + pub fn timer1(&mut self) -> Timer1W { + Timer1W::new(self, 16) } #[doc = "Bit 17 - TIMER2 Privileged Access"] #[inline(always)] #[must_use] - pub fn timer2(&mut self) -> TIMER2_W<17> { - TIMER2_W::new(self) + pub fn timer2(&mut self) -> Timer2W { + Timer2W::new(self, 17) } #[doc = "Bit 18 - TIMER3 Privileged Access"] #[inline(always)] #[must_use] - pub fn timer3(&mut self) -> TIMER3_W<18> { - TIMER3_W::new(self) + pub fn timer3(&mut self) -> Timer3W { + Timer3W::new(self, 18) } #[doc = "Bit 19 - TIMER4 Privileged Access"] #[inline(always)] #[must_use] - pub fn timer4(&mut self) -> TIMER4_W<19> { - TIMER4_W::new(self) + pub fn timer4(&mut self) -> Timer4W { + Timer4W::new(self, 19) } #[doc = "Bit 20 - USART0 Privileged Access"] #[inline(always)] #[must_use] - pub fn usart0(&mut self) -> USART0_W<20> { - USART0_W::new(self) + pub fn usart0(&mut self) -> Usart0W { + Usart0W::new(self, 20) } #[doc = "Bit 21 - BURTC Privileged Access"] #[inline(always)] #[must_use] - pub fn burtc(&mut self) -> BURTC_W<21> { - BURTC_W::new(self) + pub fn burtc(&mut self) -> BurtcW { + BurtcW::new(self, 21) } #[doc = "Bit 22 - I2C1 Privileged Access"] #[inline(always)] #[must_use] - pub fn i2c1(&mut self) -> I2C1_W<22> { - I2C1_W::new(self) + pub fn i2c1(&mut self) -> I2c1W { + I2c1W::new(self, 22) } #[doc = "Bit 23 - CHIPTESTCTRL Privileged Access"] #[inline(always)] #[must_use] - pub fn chiptestctrl(&mut self) -> CHIPTESTCTRL_W<23> { - CHIPTESTCTRL_W::new(self) + pub fn chiptestctrl(&mut self) -> ChiptestctrlW { + ChiptestctrlW::new(self, 23) } #[doc = "Bit 24 - SYSCFGCFGNS Privileged Access"] #[inline(always)] #[must_use] - pub fn syscfgcfgns(&mut self) -> SYSCFGCFGNS_W<24> { - SYSCFGCFGNS_W::new(self) + pub fn syscfgcfgns(&mut self) -> SyscfgcfgnsW { + SyscfgcfgnsW::new(self, 24) } #[doc = "Bit 25 - SYSCFG Privileged Access"] #[inline(always)] #[must_use] - pub fn syscfg(&mut self) -> SYSCFG_W<25> { - SYSCFG_W::new(self) + pub fn syscfg(&mut self) -> SyscfgW { + SyscfgW::new(self, 25) } #[doc = "Bit 26 - BURAM Privileged Access"] #[inline(always)] #[must_use] - pub fn buram(&mut self) -> BURAM_W<26> { - BURAM_W::new(self) + pub fn buram(&mut self) -> BuramW { + BuramW::new(self, 26) } #[doc = "Bit 27 - GPCRC Privileged Access"] #[inline(always)] #[must_use] - pub fn gpcrc(&mut self) -> GPCRC_W<27> { - GPCRC_W::new(self) + pub fn gpcrc(&mut self) -> GpcrcW { + GpcrcW::new(self, 27) } #[doc = "Bit 28 - DCDC Privileged Access"] #[inline(always)] #[must_use] - pub fn dcdc(&mut self) -> DCDC_W<28> { - DCDC_W::new(self) + pub fn dcdc(&mut self) -> DcdcW { + DcdcW::new(self, 28) } #[doc = "Bit 29 - HOSTMAILBOX Privileged Access"] #[inline(always)] #[must_use] - pub fn hostmailbox(&mut self) -> HOSTMAILBOX_W<29> { - HOSTMAILBOX_W::new(self) + pub fn hostmailbox(&mut self) -> HostmailboxW { + HostmailboxW::new(self, 29) } #[doc = "Bit 30 - EUSART1 Privileged Access"] #[inline(always)] #[must_use] - pub fn eusart1(&mut self) -> EUSART1_W<30> { - EUSART1_W::new(self) + pub fn eusart1(&mut self) -> Eusart1W { + Eusart1W::new(self, 30) } #[doc = "Bit 31 - EUSART2 Privileged Access"] #[inline(always)] #[must_use] - pub fn eusart2(&mut self) -> EUSART2_W<31> { - EUSART2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn eusart2(&mut self) -> Eusart2W { + Eusart2W::new(self, 31) } } -#[doc = "Set peripheral bits to 1 to mark as privileged access only\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ppupatd0](index.html) module"] -pub struct PPUPATD0_SPEC; -impl crate::RegisterSpec for PPUPATD0_SPEC { +#[doc = "Set peripheral bits to 1 to mark as privileged access only\n\nYou can [`read`](crate::Reg::read) this register and get [`ppupatd0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ppupatd0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ppupatd0Spec; +impl crate::RegisterSpec for Ppupatd0Spec { type Ux = u32; } -#[doc = "`read()` method returns [ppupatd0::R](R) reader structure"] -impl crate::Readable for PPUPATD0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ppupatd0::W](W) writer structure"] -impl crate::Writable for PPUPATD0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ppupatd0::R`](R) reader structure"] +impl crate::Readable for Ppupatd0Spec {} +#[doc = "`write(|w| ..)` method takes [`ppupatd0::W`](W) writer structure"] +impl crate::Writable for Ppupatd0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPUPATD0 to value 0xffff_ffff"] -impl crate::Resettable for PPUPATD0_SPEC { - const RESET_VALUE: Self::Ux = 0xffff_ffff; +impl crate::Resettable for Ppupatd0Spec { + const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ppupatd1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ppupatd1.rs index 10d44e8..0bc49a8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ppupatd1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ppupatd1.rs @@ -1,395 +1,355 @@ #[doc = "Register `PPUPATD1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PPUPATD1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SYSRTC` reader - SYSRTC Privileged Access"] -pub type SYSRTC_R = crate::BitReader; +pub type SysrtcR = crate::BitReader; #[doc = "Field `SYSRTC` writer - SYSRTC Privileged Access"] -pub type SYSRTC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type SysrtcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LCD` reader - LCD Privileged Access"] -pub type LCD_R = crate::BitReader; +pub type LcdR = crate::BitReader; #[doc = "Field `LCD` writer - LCD Privileged Access"] -pub type LCD_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type LcdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `KEYSCAN` reader - KEYSCAN Privileged Access"] -pub type KEYSCAN_R = crate::BitReader; +pub type KeyscanR = crate::BitReader; #[doc = "Field `KEYSCAN` writer - KEYSCAN Privileged Access"] -pub type KEYSCAN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type KeyscanW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMEM` reader - DMEM Privileged Access"] -pub type DMEM_R = crate::BitReader; +pub type DmemR = crate::BitReader; #[doc = "Field `DMEM` writer - DMEM Privileged Access"] -pub type DMEM_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type DmemW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LCDRF` reader - LCDRF Privileged Access"] -pub type LCDRF_R = crate::BitReader; +pub type LcdrfR = crate::BitReader; #[doc = "Field `LCDRF` writer - LCDRF Privileged Access"] -pub type LCDRF_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type LcdrfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SMU` reader - SMU Privileged Access"] -pub type SMU_R = crate::BitReader; +pub type SmuR = crate::BitReader; #[doc = "Field `SMU` writer - SMU Privileged Access"] -pub type SMU_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type SmuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SMUCFGNS` reader - SMUCFGNS Privileged Access"] -pub type SMUCFGNS_R = crate::BitReader; +pub type SmucfgnsR = crate::BitReader; #[doc = "Field `SMUCFGNS` writer - SMUCFGNS Privileged Access"] -pub type SMUCFGNS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type SmucfgnsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LETIMER0` reader - LETIMER0 Privileged Access"] -pub type LETIMER0_R = crate::BitReader; +pub type Letimer0R = crate::BitReader; #[doc = "Field `LETIMER0` writer - LETIMER0 Privileged Access"] -pub type LETIMER0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type Letimer0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IADC0` reader - IADC0 Privileged Access"] -pub type IADC0_R = crate::BitReader; +pub type Iadc0R = crate::BitReader; #[doc = "Field `IADC0` writer - IADC0 Privileged Access"] -pub type IADC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type Iadc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMP0` reader - ACMP0 Privileged Access"] -pub type ACMP0_R = crate::BitReader; +pub type Acmp0R = crate::BitReader; #[doc = "Field `ACMP0` writer - ACMP0 Privileged Access"] -pub type ACMP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type Acmp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMP1` reader - ACMP1 Privileged Access"] -pub type ACMP1_R = crate::BitReader; +pub type Acmp1R = crate::BitReader; #[doc = "Field `ACMP1` writer - ACMP1 Privileged Access"] -pub type ACMP1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type Acmp1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AMUXCP0` reader - AMUXCP0 Privileged Access"] -pub type AMUXCP0_R = crate::BitReader; +pub type Amuxcp0R = crate::BitReader; #[doc = "Field `AMUXCP0` writer - AMUXCP0 Privileged Access"] -pub type AMUXCP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type Amuxcp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VDAC0` reader - VDAC0 Privileged Access"] -pub type VDAC0_R = crate::BitReader; +pub type Vdac0R = crate::BitReader; #[doc = "Field `VDAC0` writer - VDAC0 Privileged Access"] -pub type VDAC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type Vdac0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PCNT` reader - PCNT Privileged Access"] -pub type PCNT_R = crate::BitReader; +pub type PcntR = crate::BitReader; #[doc = "Field `PCNT` writer - PCNT Privileged Access"] -pub type PCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type PcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LESENSE` reader - LESENSE Privileged Access"] -pub type LESENSE_R = crate::BitReader; +pub type LesenseR = crate::BitReader; #[doc = "Field `LESENSE` writer - LESENSE Privileged Access"] -pub type LESENSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type LesenseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HFRCO1` reader - HFRCO1 Privileged Access"] -pub type HFRCO1_R = crate::BitReader; +pub type Hfrco1R = crate::BitReader; #[doc = "Field `HFRCO1` writer - HFRCO1 Privileged Access"] -pub type HFRCO1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type Hfrco1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HFXO0` reader - HFXO0 Privileged Access"] -pub type HFXO0_R = crate::BitReader; +pub type Hfxo0R = crate::BitReader; #[doc = "Field `HFXO0` writer - HFXO0 Privileged Access"] -pub type HFXO0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type Hfxo0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C0` reader - I2C0 Privileged Access"] -pub type I2C0_R = crate::BitReader; +pub type I2c0R = crate::BitReader; #[doc = "Field `I2C0` writer - I2C0 Privileged Access"] -pub type I2C0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type I2c0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WDOG0` reader - WDOG0 Privileged Access"] -pub type WDOG0_R = crate::BitReader; +pub type Wdog0R = crate::BitReader; #[doc = "Field `WDOG0` writer - WDOG0 Privileged Access"] -pub type WDOG0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type Wdog0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WDOG1` reader - WDOG1 Privileged Access"] -pub type WDOG1_R = crate::BitReader; +pub type Wdog1R = crate::BitReader; #[doc = "Field `WDOG1` writer - WDOG1 Privileged Access"] -pub type WDOG1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type Wdog1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EUSART0` reader - EUSART0 Privileged Access"] -pub type EUSART0_R = crate::BitReader; +pub type Eusart0R = crate::BitReader; #[doc = "Field `EUSART0` writer - EUSART0 Privileged Access"] -pub type EUSART0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type Eusart0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SEMAILBOX` reader - SEMAILBOX Privileged Access"] -pub type SEMAILBOX_R = crate::BitReader; +pub type SemailboxR = crate::BitReader; #[doc = "Field `SEMAILBOX` writer - SEMAILBOX Privileged Access"] -pub type SEMAILBOX_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type SemailboxW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - SYSRTC Privileged Access"] #[inline(always)] - pub fn sysrtc(&self) -> SYSRTC_R { - SYSRTC_R::new((self.bits & 1) != 0) + pub fn sysrtc(&self) -> SysrtcR { + SysrtcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - LCD Privileged Access"] #[inline(always)] - pub fn lcd(&self) -> LCD_R { - LCD_R::new(((self.bits >> 1) & 1) != 0) + pub fn lcd(&self) -> LcdR { + LcdR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - KEYSCAN Privileged Access"] #[inline(always)] - pub fn keyscan(&self) -> KEYSCAN_R { - KEYSCAN_R::new(((self.bits >> 2) & 1) != 0) + pub fn keyscan(&self) -> KeyscanR { + KeyscanR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DMEM Privileged Access"] #[inline(always)] - pub fn dmem(&self) -> DMEM_R { - DMEM_R::new(((self.bits >> 3) & 1) != 0) + pub fn dmem(&self) -> DmemR { + DmemR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - LCDRF Privileged Access"] #[inline(always)] - pub fn lcdrf(&self) -> LCDRF_R { - LCDRF_R::new(((self.bits >> 4) & 1) != 0) + pub fn lcdrf(&self) -> LcdrfR { + LcdrfR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 7 - SMU Privileged Access"] #[inline(always)] - pub fn smu(&self) -> SMU_R { - SMU_R::new(((self.bits >> 7) & 1) != 0) + pub fn smu(&self) -> SmuR { + SmuR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - SMUCFGNS Privileged Access"] #[inline(always)] - pub fn smucfgns(&self) -> SMUCFGNS_R { - SMUCFGNS_R::new(((self.bits >> 8) & 1) != 0) + pub fn smucfgns(&self) -> SmucfgnsR { + SmucfgnsR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - LETIMER0 Privileged Access"] #[inline(always)] - pub fn letimer0(&self) -> LETIMER0_R { - LETIMER0_R::new(((self.bits >> 9) & 1) != 0) + pub fn letimer0(&self) -> Letimer0R { + Letimer0R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - IADC0 Privileged Access"] #[inline(always)] - pub fn iadc0(&self) -> IADC0_R { - IADC0_R::new(((self.bits >> 10) & 1) != 0) + pub fn iadc0(&self) -> Iadc0R { + Iadc0R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - ACMP0 Privileged Access"] #[inline(always)] - pub fn acmp0(&self) -> ACMP0_R { - ACMP0_R::new(((self.bits >> 11) & 1) != 0) + pub fn acmp0(&self) -> Acmp0R { + Acmp0R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - ACMP1 Privileged Access"] #[inline(always)] - pub fn acmp1(&self) -> ACMP1_R { - ACMP1_R::new(((self.bits >> 12) & 1) != 0) + pub fn acmp1(&self) -> Acmp1R { + Acmp1R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - AMUXCP0 Privileged Access"] #[inline(always)] - pub fn amuxcp0(&self) -> AMUXCP0_R { - AMUXCP0_R::new(((self.bits >> 13) & 1) != 0) + pub fn amuxcp0(&self) -> Amuxcp0R { + Amuxcp0R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - VDAC0 Privileged Access"] #[inline(always)] - pub fn vdac0(&self) -> VDAC0_R { - VDAC0_R::new(((self.bits >> 14) & 1) != 0) + pub fn vdac0(&self) -> Vdac0R { + Vdac0R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - PCNT Privileged Access"] #[inline(always)] - pub fn pcnt(&self) -> PCNT_R { - PCNT_R::new(((self.bits >> 15) & 1) != 0) + pub fn pcnt(&self) -> PcntR { + PcntR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - LESENSE Privileged Access"] #[inline(always)] - pub fn lesense(&self) -> LESENSE_R { - LESENSE_R::new(((self.bits >> 16) & 1) != 0) + pub fn lesense(&self) -> LesenseR { + LesenseR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - HFRCO1 Privileged Access"] #[inline(always)] - pub fn hfrco1(&self) -> HFRCO1_R { - HFRCO1_R::new(((self.bits >> 17) & 1) != 0) + pub fn hfrco1(&self) -> Hfrco1R { + Hfrco1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - HFXO0 Privileged Access"] #[inline(always)] - pub fn hfxo0(&self) -> HFXO0_R { - HFXO0_R::new(((self.bits >> 18) & 1) != 0) + pub fn hfxo0(&self) -> Hfxo0R { + Hfxo0R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - I2C0 Privileged Access"] #[inline(always)] - pub fn i2c0(&self) -> I2C0_R { - I2C0_R::new(((self.bits >> 19) & 1) != 0) + pub fn i2c0(&self) -> I2c0R { + I2c0R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - WDOG0 Privileged Access"] #[inline(always)] - pub fn wdog0(&self) -> WDOG0_R { - WDOG0_R::new(((self.bits >> 20) & 1) != 0) + pub fn wdog0(&self) -> Wdog0R { + Wdog0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - WDOG1 Privileged Access"] #[inline(always)] - pub fn wdog1(&self) -> WDOG1_R { - WDOG1_R::new(((self.bits >> 21) & 1) != 0) + pub fn wdog1(&self) -> Wdog1R { + Wdog1R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - EUSART0 Privileged Access"] #[inline(always)] - pub fn eusart0(&self) -> EUSART0_R { - EUSART0_R::new(((self.bits >> 22) & 1) != 0) + pub fn eusart0(&self) -> Eusart0R { + Eusart0R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - SEMAILBOX Privileged Access"] #[inline(always)] - pub fn semailbox(&self) -> SEMAILBOX_R { - SEMAILBOX_R::new(((self.bits >> 23) & 1) != 0) + pub fn semailbox(&self) -> SemailboxR { + SemailboxR::new(((self.bits >> 23) & 1) != 0) } } impl W { #[doc = "Bit 0 - SYSRTC Privileged Access"] #[inline(always)] #[must_use] - pub fn sysrtc(&mut self) -> SYSRTC_W<0> { - SYSRTC_W::new(self) + pub fn sysrtc(&mut self) -> SysrtcW { + SysrtcW::new(self, 0) } #[doc = "Bit 1 - LCD Privileged Access"] #[inline(always)] #[must_use] - pub fn lcd(&mut self) -> LCD_W<1> { - LCD_W::new(self) + pub fn lcd(&mut self) -> LcdW { + LcdW::new(self, 1) } #[doc = "Bit 2 - KEYSCAN Privileged Access"] #[inline(always)] #[must_use] - pub fn keyscan(&mut self) -> KEYSCAN_W<2> { - KEYSCAN_W::new(self) + pub fn keyscan(&mut self) -> KeyscanW { + KeyscanW::new(self, 2) } #[doc = "Bit 3 - DMEM Privileged Access"] #[inline(always)] #[must_use] - pub fn dmem(&mut self) -> DMEM_W<3> { - DMEM_W::new(self) + pub fn dmem(&mut self) -> DmemW { + DmemW::new(self, 3) } #[doc = "Bit 4 - LCDRF Privileged Access"] #[inline(always)] #[must_use] - pub fn lcdrf(&mut self) -> LCDRF_W<4> { - LCDRF_W::new(self) + pub fn lcdrf(&mut self) -> LcdrfW { + LcdrfW::new(self, 4) } #[doc = "Bit 7 - SMU Privileged Access"] #[inline(always)] #[must_use] - pub fn smu(&mut self) -> SMU_W<7> { - SMU_W::new(self) + pub fn smu(&mut self) -> SmuW { + SmuW::new(self, 7) } #[doc = "Bit 8 - SMUCFGNS Privileged Access"] #[inline(always)] #[must_use] - pub fn smucfgns(&mut self) -> SMUCFGNS_W<8> { - SMUCFGNS_W::new(self) + pub fn smucfgns(&mut self) -> SmucfgnsW { + SmucfgnsW::new(self, 8) } #[doc = "Bit 9 - LETIMER0 Privileged Access"] #[inline(always)] #[must_use] - pub fn letimer0(&mut self) -> LETIMER0_W<9> { - LETIMER0_W::new(self) + pub fn letimer0(&mut self) -> Letimer0W { + Letimer0W::new(self, 9) } #[doc = "Bit 10 - IADC0 Privileged Access"] #[inline(always)] #[must_use] - pub fn iadc0(&mut self) -> IADC0_W<10> { - IADC0_W::new(self) + pub fn iadc0(&mut self) -> Iadc0W { + Iadc0W::new(self, 10) } #[doc = "Bit 11 - ACMP0 Privileged Access"] #[inline(always)] #[must_use] - pub fn acmp0(&mut self) -> ACMP0_W<11> { - ACMP0_W::new(self) + pub fn acmp0(&mut self) -> Acmp0W { + Acmp0W::new(self, 11) } #[doc = "Bit 12 - ACMP1 Privileged Access"] #[inline(always)] #[must_use] - pub fn acmp1(&mut self) -> ACMP1_W<12> { - ACMP1_W::new(self) + pub fn acmp1(&mut self) -> Acmp1W { + Acmp1W::new(self, 12) } #[doc = "Bit 13 - AMUXCP0 Privileged Access"] #[inline(always)] #[must_use] - pub fn amuxcp0(&mut self) -> AMUXCP0_W<13> { - AMUXCP0_W::new(self) + pub fn amuxcp0(&mut self) -> Amuxcp0W { + Amuxcp0W::new(self, 13) } #[doc = "Bit 14 - VDAC0 Privileged Access"] #[inline(always)] #[must_use] - pub fn vdac0(&mut self) -> VDAC0_W<14> { - VDAC0_W::new(self) + pub fn vdac0(&mut self) -> Vdac0W { + Vdac0W::new(self, 14) } #[doc = "Bit 15 - PCNT Privileged Access"] #[inline(always)] #[must_use] - pub fn pcnt(&mut self) -> PCNT_W<15> { - PCNT_W::new(self) + pub fn pcnt(&mut self) -> PcntW { + PcntW::new(self, 15) } #[doc = "Bit 16 - LESENSE Privileged Access"] #[inline(always)] #[must_use] - pub fn lesense(&mut self) -> LESENSE_W<16> { - LESENSE_W::new(self) + pub fn lesense(&mut self) -> LesenseW { + LesenseW::new(self, 16) } #[doc = "Bit 17 - HFRCO1 Privileged Access"] #[inline(always)] #[must_use] - pub fn hfrco1(&mut self) -> HFRCO1_W<17> { - HFRCO1_W::new(self) + pub fn hfrco1(&mut self) -> Hfrco1W { + Hfrco1W::new(self, 17) } #[doc = "Bit 18 - HFXO0 Privileged Access"] #[inline(always)] #[must_use] - pub fn hfxo0(&mut self) -> HFXO0_W<18> { - HFXO0_W::new(self) + pub fn hfxo0(&mut self) -> Hfxo0W { + Hfxo0W::new(self, 18) } #[doc = "Bit 19 - I2C0 Privileged Access"] #[inline(always)] #[must_use] - pub fn i2c0(&mut self) -> I2C0_W<19> { - I2C0_W::new(self) + pub fn i2c0(&mut self) -> I2c0W { + I2c0W::new(self, 19) } #[doc = "Bit 20 - WDOG0 Privileged Access"] #[inline(always)] #[must_use] - pub fn wdog0(&mut self) -> WDOG0_W<20> { - WDOG0_W::new(self) + pub fn wdog0(&mut self) -> Wdog0W { + Wdog0W::new(self, 20) } #[doc = "Bit 21 - WDOG1 Privileged Access"] #[inline(always)] #[must_use] - pub fn wdog1(&mut self) -> WDOG1_W<21> { - WDOG1_W::new(self) + pub fn wdog1(&mut self) -> Wdog1W { + Wdog1W::new(self, 21) } #[doc = "Bit 22 - EUSART0 Privileged Access"] #[inline(always)] #[must_use] - pub fn eusart0(&mut self) -> EUSART0_W<22> { - EUSART0_W::new(self) + pub fn eusart0(&mut self) -> Eusart0W { + Eusart0W::new(self, 22) } #[doc = "Bit 23 - SEMAILBOX Privileged Access"] #[inline(always)] #[must_use] - pub fn semailbox(&mut self) -> SEMAILBOX_W<23> { - SEMAILBOX_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn semailbox(&mut self) -> SemailboxW { + SemailboxW::new(self, 23) } } -#[doc = "Set peripheral bits to 1 to mark as privileged access only\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ppupatd1](index.html) module"] -pub struct PPUPATD1_SPEC; -impl crate::RegisterSpec for PPUPATD1_SPEC { +#[doc = "Set peripheral bits to 1 to mark as privileged access only\n\nYou can [`read`](crate::Reg::read) this register and get [`ppupatd1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ppupatd1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ppupatd1Spec; +impl crate::RegisterSpec for Ppupatd1Spec { type Ux = u32; } -#[doc = "`read()` method returns [ppupatd1::R](R) reader structure"] -impl crate::Readable for PPUPATD1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ppupatd1::W](W) writer structure"] -impl crate::Writable for PPUPATD1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ppupatd1::R`](R) reader structure"] +impl crate::Readable for Ppupatd1Spec {} +#[doc = "`write(|w| ..)` method takes [`ppupatd1::W`](W) writer structure"] +impl crate::Writable for Ppupatd1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPUPATD1 to value 0x01ff_ffff"] -impl crate::Resettable for PPUPATD1_SPEC { - const RESET_VALUE: Self::Ux = 0x01ff_ffff; +impl crate::Resettable for Ppupatd1Spec { + const RESET_VALUE: u32 = 0x01ff_ffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ppusatd0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ppusatd0.rs index 2408809..89299ad 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ppusatd0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ppusatd0.rs @@ -1,530 +1,490 @@ #[doc = "Register `PPUSATD0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PPUSATD0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EMU` reader - EMU Secure Access"] -pub type EMU_R = crate::BitReader; +pub type EmuR = crate::BitReader; #[doc = "Field `EMU` writer - EMU Secure Access"] -pub type EMU_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type EmuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CMU` reader - CMU Secure Access"] -pub type CMU_R = crate::BitReader; +pub type CmuR = crate::BitReader; #[doc = "Field `CMU` writer - CMU Secure Access"] -pub type CMU_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type CmuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HFRCO0` reader - HFRCO0 Secure Access"] -pub type HFRCO0_R = crate::BitReader; +pub type Hfrco0R = crate::BitReader; #[doc = "Field `HFRCO0` writer - HFRCO0 Secure Access"] -pub type HFRCO0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type Hfrco0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FSRCO` reader - FSRCO Secure Access"] -pub type FSRCO_R = crate::BitReader; +pub type FsrcoR = crate::BitReader; #[doc = "Field `FSRCO` writer - FSRCO Secure Access"] -pub type FSRCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type FsrcoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DPLL0` reader - DPLL0 Secure Access"] -pub type DPLL0_R = crate::BitReader; +pub type Dpll0R = crate::BitReader; #[doc = "Field `DPLL0` writer - DPLL0 Secure Access"] -pub type DPLL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type Dpll0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LFXO` reader - LFXO Secure Access"] -pub type LFXO_R = crate::BitReader; +pub type LfxoR = crate::BitReader; #[doc = "Field `LFXO` writer - LFXO Secure Access"] -pub type LFXO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type LfxoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LFRCO` reader - LFRCO Secure Access"] -pub type LFRCO_R = crate::BitReader; +pub type LfrcoR = crate::BitReader; #[doc = "Field `LFRCO` writer - LFRCO Secure Access"] -pub type LFRCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type LfrcoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ULFRCO` reader - ULFRCO Secure Access"] -pub type ULFRCO_R = crate::BitReader; +pub type UlfrcoR = crate::BitReader; #[doc = "Field `ULFRCO` writer - ULFRCO Secure Access"] -pub type ULFRCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type UlfrcoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MSC` reader - MSC Secure Access"] -pub type MSC_R = crate::BitReader; +pub type MscR = crate::BitReader; #[doc = "Field `MSC` writer - MSC Secure Access"] -pub type MSC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type MscW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICACHE0` reader - ICACHE0 Secure Access"] -pub type ICACHE0_R = crate::BitReader; +pub type Icache0R = crate::BitReader; #[doc = "Field `ICACHE0` writer - ICACHE0 Secure Access"] -pub type ICACHE0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type Icache0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRS` reader - PRS Secure Access"] -pub type PRS_R = crate::BitReader; +pub type PrsR = crate::BitReader; #[doc = "Field `PRS` writer - PRS Secure Access"] -pub type PRS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type PrsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GPIO` reader - GPIO Secure Access"] -pub type GPIO_R = crate::BitReader; +pub type GpioR = crate::BitReader; #[doc = "Field `GPIO` writer - GPIO Secure Access"] -pub type GPIO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type GpioW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LDMA` reader - LDMA Secure Access"] -pub type LDMA_R = crate::BitReader; +pub type LdmaR = crate::BitReader; #[doc = "Field `LDMA` writer - LDMA Secure Access"] -pub type LDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type LdmaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LDMAXBAR` reader - LDMAXBAR Secure Access"] -pub type LDMAXBAR_R = crate::BitReader; +pub type LdmaxbarR = crate::BitReader; #[doc = "Field `LDMAXBAR` writer - LDMAXBAR Secure Access"] -pub type LDMAXBAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type LdmaxbarW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER0` reader - TIMER0 Secure Access"] -pub type TIMER0_R = crate::BitReader; +pub type Timer0R = crate::BitReader; #[doc = "Field `TIMER0` writer - TIMER0 Secure Access"] -pub type TIMER0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type Timer0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER1` reader - TIMER1 Secure Access"] -pub type TIMER1_R = crate::BitReader; +pub type Timer1R = crate::BitReader; #[doc = "Field `TIMER1` writer - TIMER1 Secure Access"] -pub type TIMER1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type Timer1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER2` reader - TIMER2 Secure Access"] -pub type TIMER2_R = crate::BitReader; +pub type Timer2R = crate::BitReader; #[doc = "Field `TIMER2` writer - TIMER2 Secure Access"] -pub type TIMER2_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type Timer2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER3` reader - TIMER3 Secure Access"] -pub type TIMER3_R = crate::BitReader; +pub type Timer3R = crate::BitReader; #[doc = "Field `TIMER3` writer - TIMER3 Secure Access"] -pub type TIMER3_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type Timer3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER4` reader - TIMER4 Secure Access"] -pub type TIMER4_R = crate::BitReader; +pub type Timer4R = crate::BitReader; #[doc = "Field `TIMER4` writer - TIMER4 Secure Access"] -pub type TIMER4_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type Timer4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USART0` reader - USART0 Secure Access"] -pub type USART0_R = crate::BitReader; +pub type Usart0R = crate::BitReader; #[doc = "Field `USART0` writer - USART0 Secure Access"] -pub type USART0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type Usart0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BURTC` reader - BURTC Secure Access"] -pub type BURTC_R = crate::BitReader; +pub type BurtcR = crate::BitReader; #[doc = "Field `BURTC` writer - BURTC Secure Access"] -pub type BURTC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type BurtcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C1` reader - I2C1 Secure Access"] -pub type I2C1_R = crate::BitReader; +pub type I2c1R = crate::BitReader; #[doc = "Field `I2C1` writer - I2C1 Secure Access"] -pub type I2C1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type I2c1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHIPTESTCTRL` reader - CHIPTESTCTRL Secure Access"] -pub type CHIPTESTCTRL_R = crate::BitReader; +pub type ChiptestctrlR = crate::BitReader; #[doc = "Field `CHIPTESTCTRL` writer - CHIPTESTCTRL Secure Access"] -pub type CHIPTESTCTRL_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type ChiptestctrlW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYSCFGCFGNS` reader - SYSCFGCFGNS Secure Access"] -pub type SYSCFGCFGNS_R = crate::BitReader; +pub type SyscfgcfgnsR = crate::BitReader; #[doc = "Field `SYSCFGCFGNS` writer - SYSCFGCFGNS Secure Access"] -pub type SYSCFGCFGNS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type SyscfgcfgnsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYSCFG` reader - SYSCFG Secure Access"] -pub type SYSCFG_R = crate::BitReader; +pub type SyscfgR = crate::BitReader; #[doc = "Field `SYSCFG` writer - SYSCFG Secure Access"] -pub type SYSCFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type SyscfgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BURAM` reader - BURAM Secure Access"] -pub type BURAM_R = crate::BitReader; +pub type BuramR = crate::BitReader; #[doc = "Field `BURAM` writer - BURAM Secure Access"] -pub type BURAM_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type BuramW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GPCRC` reader - GPCRC Secure Access"] -pub type GPCRC_R = crate::BitReader; +pub type GpcrcR = crate::BitReader; #[doc = "Field `GPCRC` writer - GPCRC Secure Access"] -pub type GPCRC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type GpcrcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCDC` reader - DCDC Secure Access"] -pub type DCDC_R = crate::BitReader; +pub type DcdcR = crate::BitReader; #[doc = "Field `DCDC` writer - DCDC Secure Access"] -pub type DCDC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type DcdcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HOSTMAILBOX` reader - HOSTMAILBOX Secure Access"] -pub type HOSTMAILBOX_R = crate::BitReader; +pub type HostmailboxR = crate::BitReader; #[doc = "Field `HOSTMAILBOX` writer - HOSTMAILBOX Secure Access"] -pub type HOSTMAILBOX_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type HostmailboxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EUSART1` reader - EUSART1 Secure Access"] -pub type EUSART1_R = crate::BitReader; +pub type Eusart1R = crate::BitReader; #[doc = "Field `EUSART1` writer - EUSART1 Secure Access"] -pub type EUSART1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type Eusart1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EUSART2` reader - EUSART2 Secure Access"] -pub type EUSART2_R = crate::BitReader; +pub type Eusart2R = crate::BitReader; #[doc = "Field `EUSART2` writer - EUSART2 Secure Access"] -pub type EUSART2_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type Eusart2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 1 - EMU Secure Access"] #[inline(always)] - pub fn emu(&self) -> EMU_R { - EMU_R::new(((self.bits >> 1) & 1) != 0) + pub fn emu(&self) -> EmuR { + EmuR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CMU Secure Access"] #[inline(always)] - pub fn cmu(&self) -> CMU_R { - CMU_R::new(((self.bits >> 2) & 1) != 0) + pub fn cmu(&self) -> CmuR { + CmuR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - HFRCO0 Secure Access"] #[inline(always)] - pub fn hfrco0(&self) -> HFRCO0_R { - HFRCO0_R::new(((self.bits >> 3) & 1) != 0) + pub fn hfrco0(&self) -> Hfrco0R { + Hfrco0R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - FSRCO Secure Access"] #[inline(always)] - pub fn fsrco(&self) -> FSRCO_R { - FSRCO_R::new(((self.bits >> 4) & 1) != 0) + pub fn fsrco(&self) -> FsrcoR { + FsrcoR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DPLL0 Secure Access"] #[inline(always)] - pub fn dpll0(&self) -> DPLL0_R { - DPLL0_R::new(((self.bits >> 5) & 1) != 0) + pub fn dpll0(&self) -> Dpll0R { + Dpll0R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - LFXO Secure Access"] #[inline(always)] - pub fn lfxo(&self) -> LFXO_R { - LFXO_R::new(((self.bits >> 6) & 1) != 0) + pub fn lfxo(&self) -> LfxoR { + LfxoR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - LFRCO Secure Access"] #[inline(always)] - pub fn lfrco(&self) -> LFRCO_R { - LFRCO_R::new(((self.bits >> 7) & 1) != 0) + pub fn lfrco(&self) -> LfrcoR { + LfrcoR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - ULFRCO Secure Access"] #[inline(always)] - pub fn ulfrco(&self) -> ULFRCO_R { - ULFRCO_R::new(((self.bits >> 8) & 1) != 0) + pub fn ulfrco(&self) -> UlfrcoR { + UlfrcoR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - MSC Secure Access"] #[inline(always)] - pub fn msc(&self) -> MSC_R { - MSC_R::new(((self.bits >> 9) & 1) != 0) + pub fn msc(&self) -> MscR { + MscR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - ICACHE0 Secure Access"] #[inline(always)] - pub fn icache0(&self) -> ICACHE0_R { - ICACHE0_R::new(((self.bits >> 10) & 1) != 0) + pub fn icache0(&self) -> Icache0R { + Icache0R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - PRS Secure Access"] #[inline(always)] - pub fn prs(&self) -> PRS_R { - PRS_R::new(((self.bits >> 11) & 1) != 0) + pub fn prs(&self) -> PrsR { + PrsR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - GPIO Secure Access"] #[inline(always)] - pub fn gpio(&self) -> GPIO_R { - GPIO_R::new(((self.bits >> 12) & 1) != 0) + pub fn gpio(&self) -> GpioR { + GpioR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - LDMA Secure Access"] #[inline(always)] - pub fn ldma(&self) -> LDMA_R { - LDMA_R::new(((self.bits >> 13) & 1) != 0) + pub fn ldma(&self) -> LdmaR { + LdmaR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - LDMAXBAR Secure Access"] #[inline(always)] - pub fn ldmaxbar(&self) -> LDMAXBAR_R { - LDMAXBAR_R::new(((self.bits >> 14) & 1) != 0) + pub fn ldmaxbar(&self) -> LdmaxbarR { + LdmaxbarR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - TIMER0 Secure Access"] #[inline(always)] - pub fn timer0(&self) -> TIMER0_R { - TIMER0_R::new(((self.bits >> 15) & 1) != 0) + pub fn timer0(&self) -> Timer0R { + Timer0R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - TIMER1 Secure Access"] #[inline(always)] - pub fn timer1(&self) -> TIMER1_R { - TIMER1_R::new(((self.bits >> 16) & 1) != 0) + pub fn timer1(&self) -> Timer1R { + Timer1R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - TIMER2 Secure Access"] #[inline(always)] - pub fn timer2(&self) -> TIMER2_R { - TIMER2_R::new(((self.bits >> 17) & 1) != 0) + pub fn timer2(&self) -> Timer2R { + Timer2R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - TIMER3 Secure Access"] #[inline(always)] - pub fn timer3(&self) -> TIMER3_R { - TIMER3_R::new(((self.bits >> 18) & 1) != 0) + pub fn timer3(&self) -> Timer3R { + Timer3R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - TIMER4 Secure Access"] #[inline(always)] - pub fn timer4(&self) -> TIMER4_R { - TIMER4_R::new(((self.bits >> 19) & 1) != 0) + pub fn timer4(&self) -> Timer4R { + Timer4R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - USART0 Secure Access"] #[inline(always)] - pub fn usart0(&self) -> USART0_R { - USART0_R::new(((self.bits >> 20) & 1) != 0) + pub fn usart0(&self) -> Usart0R { + Usart0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - BURTC Secure Access"] #[inline(always)] - pub fn burtc(&self) -> BURTC_R { - BURTC_R::new(((self.bits >> 21) & 1) != 0) + pub fn burtc(&self) -> BurtcR { + BurtcR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - I2C1 Secure Access"] #[inline(always)] - pub fn i2c1(&self) -> I2C1_R { - I2C1_R::new(((self.bits >> 22) & 1) != 0) + pub fn i2c1(&self) -> I2c1R { + I2c1R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - CHIPTESTCTRL Secure Access"] #[inline(always)] - pub fn chiptestctrl(&self) -> CHIPTESTCTRL_R { - CHIPTESTCTRL_R::new(((self.bits >> 23) & 1) != 0) + pub fn chiptestctrl(&self) -> ChiptestctrlR { + ChiptestctrlR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - SYSCFGCFGNS Secure Access"] #[inline(always)] - pub fn syscfgcfgns(&self) -> SYSCFGCFGNS_R { - SYSCFGCFGNS_R::new(((self.bits >> 24) & 1) != 0) + pub fn syscfgcfgns(&self) -> SyscfgcfgnsR { + SyscfgcfgnsR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - SYSCFG Secure Access"] #[inline(always)] - pub fn syscfg(&self) -> SYSCFG_R { - SYSCFG_R::new(((self.bits >> 25) & 1) != 0) + pub fn syscfg(&self) -> SyscfgR { + SyscfgR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - BURAM Secure Access"] #[inline(always)] - pub fn buram(&self) -> BURAM_R { - BURAM_R::new(((self.bits >> 26) & 1) != 0) + pub fn buram(&self) -> BuramR { + BuramR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - GPCRC Secure Access"] #[inline(always)] - pub fn gpcrc(&self) -> GPCRC_R { - GPCRC_R::new(((self.bits >> 27) & 1) != 0) + pub fn gpcrc(&self) -> GpcrcR { + GpcrcR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - DCDC Secure Access"] #[inline(always)] - pub fn dcdc(&self) -> DCDC_R { - DCDC_R::new(((self.bits >> 28) & 1) != 0) + pub fn dcdc(&self) -> DcdcR { + DcdcR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - HOSTMAILBOX Secure Access"] #[inline(always)] - pub fn hostmailbox(&self) -> HOSTMAILBOX_R { - HOSTMAILBOX_R::new(((self.bits >> 29) & 1) != 0) + pub fn hostmailbox(&self) -> HostmailboxR { + HostmailboxR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - EUSART1 Secure Access"] #[inline(always)] - pub fn eusart1(&self) -> EUSART1_R { - EUSART1_R::new(((self.bits >> 30) & 1) != 0) + pub fn eusart1(&self) -> Eusart1R { + Eusart1R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - EUSART2 Secure Access"] #[inline(always)] - pub fn eusart2(&self) -> EUSART2_R { - EUSART2_R::new(((self.bits >> 31) & 1) != 0) + pub fn eusart2(&self) -> Eusart2R { + Eusart2R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 1 - EMU Secure Access"] #[inline(always)] #[must_use] - pub fn emu(&mut self) -> EMU_W<1> { - EMU_W::new(self) + pub fn emu(&mut self) -> EmuW { + EmuW::new(self, 1) } #[doc = "Bit 2 - CMU Secure Access"] #[inline(always)] #[must_use] - pub fn cmu(&mut self) -> CMU_W<2> { - CMU_W::new(self) + pub fn cmu(&mut self) -> CmuW { + CmuW::new(self, 2) } #[doc = "Bit 3 - HFRCO0 Secure Access"] #[inline(always)] #[must_use] - pub fn hfrco0(&mut self) -> HFRCO0_W<3> { - HFRCO0_W::new(self) + pub fn hfrco0(&mut self) -> Hfrco0W { + Hfrco0W::new(self, 3) } #[doc = "Bit 4 - FSRCO Secure Access"] #[inline(always)] #[must_use] - pub fn fsrco(&mut self) -> FSRCO_W<4> { - FSRCO_W::new(self) + pub fn fsrco(&mut self) -> FsrcoW { + FsrcoW::new(self, 4) } #[doc = "Bit 5 - DPLL0 Secure Access"] #[inline(always)] #[must_use] - pub fn dpll0(&mut self) -> DPLL0_W<5> { - DPLL0_W::new(self) + pub fn dpll0(&mut self) -> Dpll0W { + Dpll0W::new(self, 5) } #[doc = "Bit 6 - LFXO Secure Access"] #[inline(always)] #[must_use] - pub fn lfxo(&mut self) -> LFXO_W<6> { - LFXO_W::new(self) + pub fn lfxo(&mut self) -> LfxoW { + LfxoW::new(self, 6) } #[doc = "Bit 7 - LFRCO Secure Access"] #[inline(always)] #[must_use] - pub fn lfrco(&mut self) -> LFRCO_W<7> { - LFRCO_W::new(self) + pub fn lfrco(&mut self) -> LfrcoW { + LfrcoW::new(self, 7) } #[doc = "Bit 8 - ULFRCO Secure Access"] #[inline(always)] #[must_use] - pub fn ulfrco(&mut self) -> ULFRCO_W<8> { - ULFRCO_W::new(self) + pub fn ulfrco(&mut self) -> UlfrcoW { + UlfrcoW::new(self, 8) } #[doc = "Bit 9 - MSC Secure Access"] #[inline(always)] #[must_use] - pub fn msc(&mut self) -> MSC_W<9> { - MSC_W::new(self) + pub fn msc(&mut self) -> MscW { + MscW::new(self, 9) } #[doc = "Bit 10 - ICACHE0 Secure Access"] #[inline(always)] #[must_use] - pub fn icache0(&mut self) -> ICACHE0_W<10> { - ICACHE0_W::new(self) + pub fn icache0(&mut self) -> Icache0W { + Icache0W::new(self, 10) } #[doc = "Bit 11 - PRS Secure Access"] #[inline(always)] #[must_use] - pub fn prs(&mut self) -> PRS_W<11> { - PRS_W::new(self) + pub fn prs(&mut self) -> PrsW { + PrsW::new(self, 11) } #[doc = "Bit 12 - GPIO Secure Access"] #[inline(always)] #[must_use] - pub fn gpio(&mut self) -> GPIO_W<12> { - GPIO_W::new(self) + pub fn gpio(&mut self) -> GpioW { + GpioW::new(self, 12) } #[doc = "Bit 13 - LDMA Secure Access"] #[inline(always)] #[must_use] - pub fn ldma(&mut self) -> LDMA_W<13> { - LDMA_W::new(self) + pub fn ldma(&mut self) -> LdmaW { + LdmaW::new(self, 13) } #[doc = "Bit 14 - LDMAXBAR Secure Access"] #[inline(always)] #[must_use] - pub fn ldmaxbar(&mut self) -> LDMAXBAR_W<14> { - LDMAXBAR_W::new(self) + pub fn ldmaxbar(&mut self) -> LdmaxbarW { + LdmaxbarW::new(self, 14) } #[doc = "Bit 15 - TIMER0 Secure Access"] #[inline(always)] #[must_use] - pub fn timer0(&mut self) -> TIMER0_W<15> { - TIMER0_W::new(self) + pub fn timer0(&mut self) -> Timer0W { + Timer0W::new(self, 15) } #[doc = "Bit 16 - TIMER1 Secure Access"] #[inline(always)] #[must_use] - pub fn timer1(&mut self) -> TIMER1_W<16> { - TIMER1_W::new(self) + pub fn timer1(&mut self) -> Timer1W { + Timer1W::new(self, 16) } #[doc = "Bit 17 - TIMER2 Secure Access"] #[inline(always)] #[must_use] - pub fn timer2(&mut self) -> TIMER2_W<17> { - TIMER2_W::new(self) + pub fn timer2(&mut self) -> Timer2W { + Timer2W::new(self, 17) } #[doc = "Bit 18 - TIMER3 Secure Access"] #[inline(always)] #[must_use] - pub fn timer3(&mut self) -> TIMER3_W<18> { - TIMER3_W::new(self) + pub fn timer3(&mut self) -> Timer3W { + Timer3W::new(self, 18) } #[doc = "Bit 19 - TIMER4 Secure Access"] #[inline(always)] #[must_use] - pub fn timer4(&mut self) -> TIMER4_W<19> { - TIMER4_W::new(self) + pub fn timer4(&mut self) -> Timer4W { + Timer4W::new(self, 19) } #[doc = "Bit 20 - USART0 Secure Access"] #[inline(always)] #[must_use] - pub fn usart0(&mut self) -> USART0_W<20> { - USART0_W::new(self) + pub fn usart0(&mut self) -> Usart0W { + Usart0W::new(self, 20) } #[doc = "Bit 21 - BURTC Secure Access"] #[inline(always)] #[must_use] - pub fn burtc(&mut self) -> BURTC_W<21> { - BURTC_W::new(self) + pub fn burtc(&mut self) -> BurtcW { + BurtcW::new(self, 21) } #[doc = "Bit 22 - I2C1 Secure Access"] #[inline(always)] #[must_use] - pub fn i2c1(&mut self) -> I2C1_W<22> { - I2C1_W::new(self) + pub fn i2c1(&mut self) -> I2c1W { + I2c1W::new(self, 22) } #[doc = "Bit 23 - CHIPTESTCTRL Secure Access"] #[inline(always)] #[must_use] - pub fn chiptestctrl(&mut self) -> CHIPTESTCTRL_W<23> { - CHIPTESTCTRL_W::new(self) + pub fn chiptestctrl(&mut self) -> ChiptestctrlW { + ChiptestctrlW::new(self, 23) } #[doc = "Bit 24 - SYSCFGCFGNS Secure Access"] #[inline(always)] #[must_use] - pub fn syscfgcfgns(&mut self) -> SYSCFGCFGNS_W<24> { - SYSCFGCFGNS_W::new(self) + pub fn syscfgcfgns(&mut self) -> SyscfgcfgnsW { + SyscfgcfgnsW::new(self, 24) } #[doc = "Bit 25 - SYSCFG Secure Access"] #[inline(always)] #[must_use] - pub fn syscfg(&mut self) -> SYSCFG_W<25> { - SYSCFG_W::new(self) + pub fn syscfg(&mut self) -> SyscfgW { + SyscfgW::new(self, 25) } #[doc = "Bit 26 - BURAM Secure Access"] #[inline(always)] #[must_use] - pub fn buram(&mut self) -> BURAM_W<26> { - BURAM_W::new(self) + pub fn buram(&mut self) -> BuramW { + BuramW::new(self, 26) } #[doc = "Bit 27 - GPCRC Secure Access"] #[inline(always)] #[must_use] - pub fn gpcrc(&mut self) -> GPCRC_W<27> { - GPCRC_W::new(self) + pub fn gpcrc(&mut self) -> GpcrcW { + GpcrcW::new(self, 27) } #[doc = "Bit 28 - DCDC Secure Access"] #[inline(always)] #[must_use] - pub fn dcdc(&mut self) -> DCDC_W<28> { - DCDC_W::new(self) + pub fn dcdc(&mut self) -> DcdcW { + DcdcW::new(self, 28) } #[doc = "Bit 29 - HOSTMAILBOX Secure Access"] #[inline(always)] #[must_use] - pub fn hostmailbox(&mut self) -> HOSTMAILBOX_W<29> { - HOSTMAILBOX_W::new(self) + pub fn hostmailbox(&mut self) -> HostmailboxW { + HostmailboxW::new(self, 29) } #[doc = "Bit 30 - EUSART1 Secure Access"] #[inline(always)] #[must_use] - pub fn eusart1(&mut self) -> EUSART1_W<30> { - EUSART1_W::new(self) + pub fn eusart1(&mut self) -> Eusart1W { + Eusart1W::new(self, 30) } #[doc = "Bit 31 - EUSART2 Secure Access"] #[inline(always)] #[must_use] - pub fn eusart2(&mut self) -> EUSART2_W<31> { - EUSART2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn eusart2(&mut self) -> Eusart2W { + Eusart2W::new(self, 31) } } -#[doc = "Set peripheral bits to 1 to mark as secure access only\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ppusatd0](index.html) module"] -pub struct PPUSATD0_SPEC; -impl crate::RegisterSpec for PPUSATD0_SPEC { +#[doc = "Set peripheral bits to 1 to mark as secure access only\n\nYou can [`read`](crate::Reg::read) this register and get [`ppusatd0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ppusatd0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ppusatd0Spec; +impl crate::RegisterSpec for Ppusatd0Spec { type Ux = u32; } -#[doc = "`read()` method returns [ppusatd0::R](R) reader structure"] -impl crate::Readable for PPUSATD0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ppusatd0::W](W) writer structure"] -impl crate::Writable for PPUSATD0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ppusatd0::R`](R) reader structure"] +impl crate::Readable for Ppusatd0Spec {} +#[doc = "`write(|w| ..)` method takes [`ppusatd0::W`](W) writer structure"] +impl crate::Writable for Ppusatd0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPUSATD0 to value 0xffff_ffff"] -impl crate::Resettable for PPUSATD0_SPEC { - const RESET_VALUE: Self::Ux = 0xffff_ffff; +impl crate::Resettable for Ppusatd0Spec { + const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ppusatd1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ppusatd1.rs index fcd74db..7ce957d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ppusatd1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/ppusatd1.rs @@ -1,395 +1,355 @@ #[doc = "Register `PPUSATD1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PPUSATD1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SYSRTC` reader - SYSRTC Secure Access"] -pub type SYSRTC_R = crate::BitReader; +pub type SysrtcR = crate::BitReader; #[doc = "Field `SYSRTC` writer - SYSRTC Secure Access"] -pub type SYSRTC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type SysrtcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LCD` reader - LCD Secure Access"] -pub type LCD_R = crate::BitReader; +pub type LcdR = crate::BitReader; #[doc = "Field `LCD` writer - LCD Secure Access"] -pub type LCD_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type LcdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `KEYSCAN` reader - KEYSCAN Secure Access"] -pub type KEYSCAN_R = crate::BitReader; +pub type KeyscanR = crate::BitReader; #[doc = "Field `KEYSCAN` writer - KEYSCAN Secure Access"] -pub type KEYSCAN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type KeyscanW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMEM` reader - DMEM Secure Access"] -pub type DMEM_R = crate::BitReader; +pub type DmemR = crate::BitReader; #[doc = "Field `DMEM` writer - DMEM Secure Access"] -pub type DMEM_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type DmemW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LCDRF` reader - LCDRF Secure Access"] -pub type LCDRF_R = crate::BitReader; +pub type LcdrfR = crate::BitReader; #[doc = "Field `LCDRF` writer - LCDRF Secure Access"] -pub type LCDRF_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type LcdrfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SMU` reader - SMU Secure Access"] -pub type SMU_R = crate::BitReader; +pub type SmuR = crate::BitReader; #[doc = "Field `SMU` writer - SMU Secure Access"] -pub type SMU_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type SmuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SMUCFGNS` reader - SMUCFGNS Secure Access"] -pub type SMUCFGNS_R = crate::BitReader; +pub type SmucfgnsR = crate::BitReader; #[doc = "Field `SMUCFGNS` writer - SMUCFGNS Secure Access"] -pub type SMUCFGNS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type SmucfgnsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LETIMER0` reader - LETIMER0 Secure Access"] -pub type LETIMER0_R = crate::BitReader; +pub type Letimer0R = crate::BitReader; #[doc = "Field `LETIMER0` writer - LETIMER0 Secure Access"] -pub type LETIMER0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type Letimer0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IADC0` reader - IADC0 Secure Access"] -pub type IADC0_R = crate::BitReader; +pub type Iadc0R = crate::BitReader; #[doc = "Field `IADC0` writer - IADC0 Secure Access"] -pub type IADC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type Iadc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMP0` reader - ACMP0 Secure Access"] -pub type ACMP0_R = crate::BitReader; +pub type Acmp0R = crate::BitReader; #[doc = "Field `ACMP0` writer - ACMP0 Secure Access"] -pub type ACMP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type Acmp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMP1` reader - ACMP1 Secure Access"] -pub type ACMP1_R = crate::BitReader; +pub type Acmp1R = crate::BitReader; #[doc = "Field `ACMP1` writer - ACMP1 Secure Access"] -pub type ACMP1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type Acmp1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AMUXCP0` reader - AMUXCP0 Secure Access"] -pub type AMUXCP0_R = crate::BitReader; +pub type Amuxcp0R = crate::BitReader; #[doc = "Field `AMUXCP0` writer - AMUXCP0 Secure Access"] -pub type AMUXCP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type Amuxcp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VDAC0` reader - VDAC0 Secure Access"] -pub type VDAC0_R = crate::BitReader; +pub type Vdac0R = crate::BitReader; #[doc = "Field `VDAC0` writer - VDAC0 Secure Access"] -pub type VDAC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type Vdac0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PCNT` reader - PCNT Secure Access"] -pub type PCNT_R = crate::BitReader; +pub type PcntR = crate::BitReader; #[doc = "Field `PCNT` writer - PCNT Secure Access"] -pub type PCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type PcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LESENSE` reader - LESENSE Secure Access"] -pub type LESENSE_R = crate::BitReader; +pub type LesenseR = crate::BitReader; #[doc = "Field `LESENSE` writer - LESENSE Secure Access"] -pub type LESENSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type LesenseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HFRCO1` reader - HFRCO1 Secure Access"] -pub type HFRCO1_R = crate::BitReader; +pub type Hfrco1R = crate::BitReader; #[doc = "Field `HFRCO1` writer - HFRCO1 Secure Access"] -pub type HFRCO1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type Hfrco1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HFXO0` reader - HFXO0 Secure Access"] -pub type HFXO0_R = crate::BitReader; +pub type Hfxo0R = crate::BitReader; #[doc = "Field `HFXO0` writer - HFXO0 Secure Access"] -pub type HFXO0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type Hfxo0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C0` reader - I2C0 Secure Access"] -pub type I2C0_R = crate::BitReader; +pub type I2c0R = crate::BitReader; #[doc = "Field `I2C0` writer - I2C0 Secure Access"] -pub type I2C0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type I2c0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WDOG0` reader - WDOG0 Secure Access"] -pub type WDOG0_R = crate::BitReader; +pub type Wdog0R = crate::BitReader; #[doc = "Field `WDOG0` writer - WDOG0 Secure Access"] -pub type WDOG0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type Wdog0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WDOG1` reader - WDOG1 Secure Access"] -pub type WDOG1_R = crate::BitReader; +pub type Wdog1R = crate::BitReader; #[doc = "Field `WDOG1` writer - WDOG1 Secure Access"] -pub type WDOG1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type Wdog1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EUSART0` reader - EUSART0 Secure Access"] -pub type EUSART0_R = crate::BitReader; +pub type Eusart0R = crate::BitReader; #[doc = "Field `EUSART0` writer - EUSART0 Secure Access"] -pub type EUSART0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type Eusart0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SEMAILBOX` reader - SEMAILBOX Secure Access"] -pub type SEMAILBOX_R = crate::BitReader; +pub type SemailboxR = crate::BitReader; #[doc = "Field `SEMAILBOX` writer - SEMAILBOX Secure Access"] -pub type SEMAILBOX_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type SemailboxW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - SYSRTC Secure Access"] #[inline(always)] - pub fn sysrtc(&self) -> SYSRTC_R { - SYSRTC_R::new((self.bits & 1) != 0) + pub fn sysrtc(&self) -> SysrtcR { + SysrtcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - LCD Secure Access"] #[inline(always)] - pub fn lcd(&self) -> LCD_R { - LCD_R::new(((self.bits >> 1) & 1) != 0) + pub fn lcd(&self) -> LcdR { + LcdR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - KEYSCAN Secure Access"] #[inline(always)] - pub fn keyscan(&self) -> KEYSCAN_R { - KEYSCAN_R::new(((self.bits >> 2) & 1) != 0) + pub fn keyscan(&self) -> KeyscanR { + KeyscanR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DMEM Secure Access"] #[inline(always)] - pub fn dmem(&self) -> DMEM_R { - DMEM_R::new(((self.bits >> 3) & 1) != 0) + pub fn dmem(&self) -> DmemR { + DmemR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - LCDRF Secure Access"] #[inline(always)] - pub fn lcdrf(&self) -> LCDRF_R { - LCDRF_R::new(((self.bits >> 4) & 1) != 0) + pub fn lcdrf(&self) -> LcdrfR { + LcdrfR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 7 - SMU Secure Access"] #[inline(always)] - pub fn smu(&self) -> SMU_R { - SMU_R::new(((self.bits >> 7) & 1) != 0) + pub fn smu(&self) -> SmuR { + SmuR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - SMUCFGNS Secure Access"] #[inline(always)] - pub fn smucfgns(&self) -> SMUCFGNS_R { - SMUCFGNS_R::new(((self.bits >> 8) & 1) != 0) + pub fn smucfgns(&self) -> SmucfgnsR { + SmucfgnsR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - LETIMER0 Secure Access"] #[inline(always)] - pub fn letimer0(&self) -> LETIMER0_R { - LETIMER0_R::new(((self.bits >> 9) & 1) != 0) + pub fn letimer0(&self) -> Letimer0R { + Letimer0R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - IADC0 Secure Access"] #[inline(always)] - pub fn iadc0(&self) -> IADC0_R { - IADC0_R::new(((self.bits >> 10) & 1) != 0) + pub fn iadc0(&self) -> Iadc0R { + Iadc0R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - ACMP0 Secure Access"] #[inline(always)] - pub fn acmp0(&self) -> ACMP0_R { - ACMP0_R::new(((self.bits >> 11) & 1) != 0) + pub fn acmp0(&self) -> Acmp0R { + Acmp0R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - ACMP1 Secure Access"] #[inline(always)] - pub fn acmp1(&self) -> ACMP1_R { - ACMP1_R::new(((self.bits >> 12) & 1) != 0) + pub fn acmp1(&self) -> Acmp1R { + Acmp1R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - AMUXCP0 Secure Access"] #[inline(always)] - pub fn amuxcp0(&self) -> AMUXCP0_R { - AMUXCP0_R::new(((self.bits >> 13) & 1) != 0) + pub fn amuxcp0(&self) -> Amuxcp0R { + Amuxcp0R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - VDAC0 Secure Access"] #[inline(always)] - pub fn vdac0(&self) -> VDAC0_R { - VDAC0_R::new(((self.bits >> 14) & 1) != 0) + pub fn vdac0(&self) -> Vdac0R { + Vdac0R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - PCNT Secure Access"] #[inline(always)] - pub fn pcnt(&self) -> PCNT_R { - PCNT_R::new(((self.bits >> 15) & 1) != 0) + pub fn pcnt(&self) -> PcntR { + PcntR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - LESENSE Secure Access"] #[inline(always)] - pub fn lesense(&self) -> LESENSE_R { - LESENSE_R::new(((self.bits >> 16) & 1) != 0) + pub fn lesense(&self) -> LesenseR { + LesenseR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - HFRCO1 Secure Access"] #[inline(always)] - pub fn hfrco1(&self) -> HFRCO1_R { - HFRCO1_R::new(((self.bits >> 17) & 1) != 0) + pub fn hfrco1(&self) -> Hfrco1R { + Hfrco1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - HFXO0 Secure Access"] #[inline(always)] - pub fn hfxo0(&self) -> HFXO0_R { - HFXO0_R::new(((self.bits >> 18) & 1) != 0) + pub fn hfxo0(&self) -> Hfxo0R { + Hfxo0R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - I2C0 Secure Access"] #[inline(always)] - pub fn i2c0(&self) -> I2C0_R { - I2C0_R::new(((self.bits >> 19) & 1) != 0) + pub fn i2c0(&self) -> I2c0R { + I2c0R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - WDOG0 Secure Access"] #[inline(always)] - pub fn wdog0(&self) -> WDOG0_R { - WDOG0_R::new(((self.bits >> 20) & 1) != 0) + pub fn wdog0(&self) -> Wdog0R { + Wdog0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - WDOG1 Secure Access"] #[inline(always)] - pub fn wdog1(&self) -> WDOG1_R { - WDOG1_R::new(((self.bits >> 21) & 1) != 0) + pub fn wdog1(&self) -> Wdog1R { + Wdog1R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - EUSART0 Secure Access"] #[inline(always)] - pub fn eusart0(&self) -> EUSART0_R { - EUSART0_R::new(((self.bits >> 22) & 1) != 0) + pub fn eusart0(&self) -> Eusart0R { + Eusart0R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - SEMAILBOX Secure Access"] #[inline(always)] - pub fn semailbox(&self) -> SEMAILBOX_R { - SEMAILBOX_R::new(((self.bits >> 23) & 1) != 0) + pub fn semailbox(&self) -> SemailboxR { + SemailboxR::new(((self.bits >> 23) & 1) != 0) } } impl W { #[doc = "Bit 0 - SYSRTC Secure Access"] #[inline(always)] #[must_use] - pub fn sysrtc(&mut self) -> SYSRTC_W<0> { - SYSRTC_W::new(self) + pub fn sysrtc(&mut self) -> SysrtcW { + SysrtcW::new(self, 0) } #[doc = "Bit 1 - LCD Secure Access"] #[inline(always)] #[must_use] - pub fn lcd(&mut self) -> LCD_W<1> { - LCD_W::new(self) + pub fn lcd(&mut self) -> LcdW { + LcdW::new(self, 1) } #[doc = "Bit 2 - KEYSCAN Secure Access"] #[inline(always)] #[must_use] - pub fn keyscan(&mut self) -> KEYSCAN_W<2> { - KEYSCAN_W::new(self) + pub fn keyscan(&mut self) -> KeyscanW { + KeyscanW::new(self, 2) } #[doc = "Bit 3 - DMEM Secure Access"] #[inline(always)] #[must_use] - pub fn dmem(&mut self) -> DMEM_W<3> { - DMEM_W::new(self) + pub fn dmem(&mut self) -> DmemW { + DmemW::new(self, 3) } #[doc = "Bit 4 - LCDRF Secure Access"] #[inline(always)] #[must_use] - pub fn lcdrf(&mut self) -> LCDRF_W<4> { - LCDRF_W::new(self) + pub fn lcdrf(&mut self) -> LcdrfW { + LcdrfW::new(self, 4) } #[doc = "Bit 7 - SMU Secure Access"] #[inline(always)] #[must_use] - pub fn smu(&mut self) -> SMU_W<7> { - SMU_W::new(self) + pub fn smu(&mut self) -> SmuW { + SmuW::new(self, 7) } #[doc = "Bit 8 - SMUCFGNS Secure Access"] #[inline(always)] #[must_use] - pub fn smucfgns(&mut self) -> SMUCFGNS_W<8> { - SMUCFGNS_W::new(self) + pub fn smucfgns(&mut self) -> SmucfgnsW { + SmucfgnsW::new(self, 8) } #[doc = "Bit 9 - LETIMER0 Secure Access"] #[inline(always)] #[must_use] - pub fn letimer0(&mut self) -> LETIMER0_W<9> { - LETIMER0_W::new(self) + pub fn letimer0(&mut self) -> Letimer0W { + Letimer0W::new(self, 9) } #[doc = "Bit 10 - IADC0 Secure Access"] #[inline(always)] #[must_use] - pub fn iadc0(&mut self) -> IADC0_W<10> { - IADC0_W::new(self) + pub fn iadc0(&mut self) -> Iadc0W { + Iadc0W::new(self, 10) } #[doc = "Bit 11 - ACMP0 Secure Access"] #[inline(always)] #[must_use] - pub fn acmp0(&mut self) -> ACMP0_W<11> { - ACMP0_W::new(self) + pub fn acmp0(&mut self) -> Acmp0W { + Acmp0W::new(self, 11) } #[doc = "Bit 12 - ACMP1 Secure Access"] #[inline(always)] #[must_use] - pub fn acmp1(&mut self) -> ACMP1_W<12> { - ACMP1_W::new(self) + pub fn acmp1(&mut self) -> Acmp1W { + Acmp1W::new(self, 12) } #[doc = "Bit 13 - AMUXCP0 Secure Access"] #[inline(always)] #[must_use] - pub fn amuxcp0(&mut self) -> AMUXCP0_W<13> { - AMUXCP0_W::new(self) + pub fn amuxcp0(&mut self) -> Amuxcp0W { + Amuxcp0W::new(self, 13) } #[doc = "Bit 14 - VDAC0 Secure Access"] #[inline(always)] #[must_use] - pub fn vdac0(&mut self) -> VDAC0_W<14> { - VDAC0_W::new(self) + pub fn vdac0(&mut self) -> Vdac0W { + Vdac0W::new(self, 14) } #[doc = "Bit 15 - PCNT Secure Access"] #[inline(always)] #[must_use] - pub fn pcnt(&mut self) -> PCNT_W<15> { - PCNT_W::new(self) + pub fn pcnt(&mut self) -> PcntW { + PcntW::new(self, 15) } #[doc = "Bit 16 - LESENSE Secure Access"] #[inline(always)] #[must_use] - pub fn lesense(&mut self) -> LESENSE_W<16> { - LESENSE_W::new(self) + pub fn lesense(&mut self) -> LesenseW { + LesenseW::new(self, 16) } #[doc = "Bit 17 - HFRCO1 Secure Access"] #[inline(always)] #[must_use] - pub fn hfrco1(&mut self) -> HFRCO1_W<17> { - HFRCO1_W::new(self) + pub fn hfrco1(&mut self) -> Hfrco1W { + Hfrco1W::new(self, 17) } #[doc = "Bit 18 - HFXO0 Secure Access"] #[inline(always)] #[must_use] - pub fn hfxo0(&mut self) -> HFXO0_W<18> { - HFXO0_W::new(self) + pub fn hfxo0(&mut self) -> Hfxo0W { + Hfxo0W::new(self, 18) } #[doc = "Bit 19 - I2C0 Secure Access"] #[inline(always)] #[must_use] - pub fn i2c0(&mut self) -> I2C0_W<19> { - I2C0_W::new(self) + pub fn i2c0(&mut self) -> I2c0W { + I2c0W::new(self, 19) } #[doc = "Bit 20 - WDOG0 Secure Access"] #[inline(always)] #[must_use] - pub fn wdog0(&mut self) -> WDOG0_W<20> { - WDOG0_W::new(self) + pub fn wdog0(&mut self) -> Wdog0W { + Wdog0W::new(self, 20) } #[doc = "Bit 21 - WDOG1 Secure Access"] #[inline(always)] #[must_use] - pub fn wdog1(&mut self) -> WDOG1_W<21> { - WDOG1_W::new(self) + pub fn wdog1(&mut self) -> Wdog1W { + Wdog1W::new(self, 21) } #[doc = "Bit 22 - EUSART0 Secure Access"] #[inline(always)] #[must_use] - pub fn eusart0(&mut self) -> EUSART0_W<22> { - EUSART0_W::new(self) + pub fn eusart0(&mut self) -> Eusart0W { + Eusart0W::new(self, 22) } #[doc = "Bit 23 - SEMAILBOX Secure Access"] #[inline(always)] #[must_use] - pub fn semailbox(&mut self) -> SEMAILBOX_W<23> { - SEMAILBOX_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn semailbox(&mut self) -> SemailboxW { + SemailboxW::new(self, 23) } } -#[doc = "Set peripheral bits to 1 to mark as secure access only\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ppusatd1](index.html) module"] -pub struct PPUSATD1_SPEC; -impl crate::RegisterSpec for PPUSATD1_SPEC { +#[doc = "Set peripheral bits to 1 to mark as secure access only\n\nYou can [`read`](crate::Reg::read) this register and get [`ppusatd1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ppusatd1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ppusatd1Spec; +impl crate::RegisterSpec for Ppusatd1Spec { type Ux = u32; } -#[doc = "`read()` method returns [ppusatd1::R](R) reader structure"] -impl crate::Readable for PPUSATD1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ppusatd1::W](W) writer structure"] -impl crate::Writable for PPUSATD1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ppusatd1::R`](R) reader structure"] +impl crate::Readable for Ppusatd1Spec {} +#[doc = "`write(|w| ..)` method takes [`ppusatd1::W`](W) writer structure"] +impl crate::Writable for Ppusatd1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPUSATD1 to value 0x01ff_ffff"] -impl crate::Resettable for PPUSATD1_SPEC { - const RESET_VALUE: Self::Ux = 0x01ff_ffff; +impl crate::Resettable for Ppusatd1Spec { + const RESET_VALUE: u32 = 0x01ff_ffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/status.rs index aa5937e..7117013 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns/status.rs @@ -1,78 +1,63 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `SMULOCK` reader - SMU Lock"] -pub type SMULOCK_R = crate::BitReader; +pub type R = crate::R; #[doc = "SMU Lock\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMULOCK_A { +pub enum Smulock { #[doc = "0: UNLOCKED"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: LOCKED"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMULOCK_A) -> Self { + fn from(variant: Smulock) -> Self { variant as u8 != 0 } } -impl SMULOCK_R { +#[doc = "Field `SMULOCK` reader - SMU Lock"] +pub type SmulockR = crate::BitReader; +impl SmulockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SMULOCK_A { + pub const fn variant(&self) -> Smulock { match self.bits { - false => SMULOCK_A::UNLOCKED, - true => SMULOCK_A::LOCKED, + false => Smulock::Unlocked, + true => Smulock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "UNLOCKED"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == SMULOCK_A::UNLOCKED + *self == Smulock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "LOCKED"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == SMULOCK_A::LOCKED + *self == Smulock::Locked } } #[doc = "Field `SMUPRGERR` reader - SMU Programming Error"] -pub type SMUPRGERR_R = crate::BitReader; +pub type SmuprgerrR = crate::BitReader; impl R { #[doc = "Bit 0 - SMU Lock"] #[inline(always)] - pub fn smulock(&self) -> SMULOCK_R { - SMULOCK_R::new((self.bits & 1) != 0) + pub fn smulock(&self) -> SmulockR { + SmulockR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - SMU Programming Error"] #[inline(always)] - pub fn smuprgerr(&self) -> SMUPRGERR_R { - SMUPRGERR_R::new(((self.bits >> 1) & 1) != 0) + pub fn smuprgerr(&self) -> SmuprgerrR { + SmuprgerrR::new(((self.bits >> 1) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns.rs index d7c9725..9a8a89b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns.rs @@ -1,56 +1,106 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { _reserved0: [u8; 0x04], + nsstatus: Nsstatus, + nslock: Nslock, + nsif: Nsif, + nsien: Nsien, + _reserved4: [u8; 0x2c], + ppunspatd0: Ppunspatd0, + ppunspatd1: Ppunspatd1, + _reserved6: [u8; 0xf8], + ppunsfs: Ppunsfs, + _reserved7: [u8; 0x0c], + bmpunspatd0: Bmpunspatd0, +} +impl RegisterBlock { #[doc = "0x04 - No Description"] - pub nsstatus: NSSTATUS, + #[inline(always)] + pub const fn nsstatus(&self) -> &Nsstatus { + &self.nsstatus + } #[doc = "0x08 - No Description"] - pub nslock: NSLOCK, + #[inline(always)] + pub const fn nslock(&self) -> &Nslock { + &self.nslock + } #[doc = "0x0c - No Description"] - pub nsif: NSIF, + #[inline(always)] + pub const fn nsif(&self) -> &Nsif { + &self.nsif + } #[doc = "0x10 - No Description"] - pub nsien: NSIEN, - _reserved4: [u8; 0x2c], + #[inline(always)] + pub const fn nsien(&self) -> &Nsien { + &self.nsien + } #[doc = "0x40 - Set peripheral bits to 1 to mark as privileged access only"] - pub ppunspatd0: PPUNSPATD0, + #[inline(always)] + pub const fn ppunspatd0(&self) -> &Ppunspatd0 { + &self.ppunspatd0 + } #[doc = "0x44 - Set peripheral bits to 1 to mark as privileged access only"] - pub ppunspatd1: PPUNSPATD1, - _reserved6: [u8; 0xf8], + #[inline(always)] + pub const fn ppunspatd1(&self) -> &Ppunspatd1 { + &self.ppunspatd1 + } #[doc = "0x140 - No Description"] - pub ppunsfs: PPUNSFS, - _reserved7: [u8; 0x0c], + #[inline(always)] + pub const fn ppunsfs(&self) -> &Ppunsfs { + &self.ppunsfs + } #[doc = "0x150 - No Description"] - pub bmpunspatd0: BMPUNSPATD0, + #[inline(always)] + pub const fn bmpunspatd0(&self) -> &Bmpunspatd0 { + &self.bmpunspatd0 + } } -#[doc = "NSSTATUS (r) register accessor: an alias for `Reg`"] -pub type NSSTATUS = crate::Reg; +#[doc = "NSSTATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`nsstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nsstatus`] +module"] +#[doc(alias = "NSSTATUS")] +pub type Nsstatus = crate::Reg; #[doc = "No Description"] pub mod nsstatus; -#[doc = "NSLOCK (w) register accessor: an alias for `Reg`"] -pub type NSLOCK = crate::Reg; +#[doc = "NSLOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nslock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nslock`] +module"] +#[doc(alias = "NSLOCK")] +pub type Nslock = crate::Reg; #[doc = "No Description"] pub mod nslock; -#[doc = "NSIF (rw) register accessor: an alias for `Reg`"] -pub type NSIF = crate::Reg; +#[doc = "NSIF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`nsif::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nsif::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nsif`] +module"] +#[doc(alias = "NSIF")] +pub type Nsif = crate::Reg; #[doc = "No Description"] pub mod nsif; -#[doc = "NSIEN (rw) register accessor: an alias for `Reg`"] -pub type NSIEN = crate::Reg; +#[doc = "NSIEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`nsien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nsien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nsien`] +module"] +#[doc(alias = "NSIEN")] +pub type Nsien = crate::Reg; #[doc = "No Description"] pub mod nsien; -#[doc = "PPUNSPATD0 (rw) register accessor: an alias for `Reg`"] -pub type PPUNSPATD0 = crate::Reg; +#[doc = "PPUNSPATD0 (rw) register accessor: Set peripheral bits to 1 to mark as privileged access only\n\nYou can [`read`](crate::Reg::read) this register and get [`ppunspatd0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ppunspatd0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ppunspatd0`] +module"] +#[doc(alias = "PPUNSPATD0")] +pub type Ppunspatd0 = crate::Reg; #[doc = "Set peripheral bits to 1 to mark as privileged access only"] pub mod ppunspatd0; -#[doc = "PPUNSPATD1 (rw) register accessor: an alias for `Reg`"] -pub type PPUNSPATD1 = crate::Reg; +#[doc = "PPUNSPATD1 (rw) register accessor: Set peripheral bits to 1 to mark as privileged access only\n\nYou can [`read`](crate::Reg::read) this register and get [`ppunspatd1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ppunspatd1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ppunspatd1`] +module"] +#[doc(alias = "PPUNSPATD1")] +pub type Ppunspatd1 = crate::Reg; #[doc = "Set peripheral bits to 1 to mark as privileged access only"] pub mod ppunspatd1; -#[doc = "PPUNSFS (r) register accessor: an alias for `Reg`"] -pub type PPUNSFS = crate::Reg; +#[doc = "PPUNSFS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ppunsfs::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ppunsfs`] +module"] +#[doc(alias = "PPUNSFS")] +pub type Ppunsfs = crate::Reg; #[doc = "No Description"] pub mod ppunsfs; -#[doc = "BMPUNSPATD0 (rw) register accessor: an alias for `Reg`"] -pub type BMPUNSPATD0 = crate::Reg; +#[doc = "BMPUNSPATD0 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bmpunspatd0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bmpunspatd0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bmpunspatd0`] +module"] +#[doc(alias = "BMPUNSPATD0")] +pub type Bmpunspatd0 = crate::Reg; #[doc = "No Description"] pub mod bmpunspatd0; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/bmpunspatd0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/bmpunspatd0.rs index 6d48412..5adeabf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/bmpunspatd0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/bmpunspatd0.rs @@ -1,95 +1,55 @@ #[doc = "Register `BMPUNSPATD0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `BMPUNSPATD0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LDMA` reader - MCU LDMA privileged mode"] -pub type LDMA_R = crate::BitReader; +pub type LdmaR = crate::BitReader; #[doc = "Field `LDMA` writer - MCU LDMA privileged mode"] -pub type LDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, BMPUNSPATD0_SPEC, bool, O>; +pub type LdmaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SEEXTDMA` reader - SEEXTDMA privileged mode"] -pub type SEEXTDMA_R = crate::BitReader; +pub type SeextdmaR = crate::BitReader; #[doc = "Field `SEEXTDMA` writer - SEEXTDMA privileged mode"] -pub type SEEXTDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, BMPUNSPATD0_SPEC, bool, O>; +pub type SeextdmaW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 2 - MCU LDMA privileged mode"] #[inline(always)] - pub fn ldma(&self) -> LDMA_R { - LDMA_R::new(((self.bits >> 2) & 1) != 0) + pub fn ldma(&self) -> LdmaR { + LdmaR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 5 - SEEXTDMA privileged mode"] #[inline(always)] - pub fn seextdma(&self) -> SEEXTDMA_R { - SEEXTDMA_R::new(((self.bits >> 5) & 1) != 0) + pub fn seextdma(&self) -> SeextdmaR { + SeextdmaR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 2 - MCU LDMA privileged mode"] #[inline(always)] #[must_use] - pub fn ldma(&mut self) -> LDMA_W<2> { - LDMA_W::new(self) + pub fn ldma(&mut self) -> LdmaW { + LdmaW::new(self, 2) } #[doc = "Bit 5 - SEEXTDMA privileged mode"] #[inline(always)] #[must_use] - pub fn seextdma(&mut self) -> SEEXTDMA_W<5> { - SEEXTDMA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn seextdma(&mut self) -> SeextdmaW { + SeextdmaW::new(self, 5) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bmpunspatd0](index.html) module"] -pub struct BMPUNSPATD0_SPEC; -impl crate::RegisterSpec for BMPUNSPATD0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bmpunspatd0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bmpunspatd0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Bmpunspatd0Spec; +impl crate::RegisterSpec for Bmpunspatd0Spec { type Ux = u32; } -#[doc = "`read()` method returns [bmpunspatd0::R](R) reader structure"] -impl crate::Readable for BMPUNSPATD0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [bmpunspatd0::W](W) writer structure"] -impl crate::Writable for BMPUNSPATD0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`bmpunspatd0::R`](R) reader structure"] +impl crate::Readable for Bmpunspatd0Spec {} +#[doc = "`write(|w| ..)` method takes [`bmpunspatd0::W`](W) writer structure"] +impl crate::Writable for Bmpunspatd0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BMPUNSPATD0 to value 0"] -impl crate::Resettable for BMPUNSPATD0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Bmpunspatd0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/nsien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/nsien.rs index 7656169..bf1f648 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/nsien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/nsien.rs @@ -1,95 +1,55 @@ #[doc = "Register `NSIEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `NSIEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PPUNSPRIV` reader - PPUNS Privilege Interrupt Enable"] -pub type PPUNSPRIV_R = crate::BitReader; +pub type PpunsprivR = crate::BitReader; #[doc = "Field `PPUNSPRIV` writer - PPUNS Privilege Interrupt Enable"] -pub type PPUNSPRIV_W<'a, const O: u8> = crate::BitWriter<'a, u32, NSIEN_SPEC, bool, O>; +pub type PpunsprivW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PPUNSINST` reader - PPUNS Instruction Interrupt Enable"] -pub type PPUNSINST_R = crate::BitReader; +pub type PpunsinstR = crate::BitReader; #[doc = "Field `PPUNSINST` writer - PPUNS Instruction Interrupt Enable"] -pub type PPUNSINST_W<'a, const O: u8> = crate::BitWriter<'a, u32, NSIEN_SPEC, bool, O>; +pub type PpunsinstW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - PPUNS Privilege Interrupt Enable"] #[inline(always)] - pub fn ppunspriv(&self) -> PPUNSPRIV_R { - PPUNSPRIV_R::new((self.bits & 1) != 0) + pub fn ppunspriv(&self) -> PpunsprivR { + PpunsprivR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - PPUNS Instruction Interrupt Enable"] #[inline(always)] - pub fn ppunsinst(&self) -> PPUNSINST_R { - PPUNSINST_R::new(((self.bits >> 2) & 1) != 0) + pub fn ppunsinst(&self) -> PpunsinstR { + PpunsinstR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - PPUNS Privilege Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ppunspriv(&mut self) -> PPUNSPRIV_W<0> { - PPUNSPRIV_W::new(self) + pub fn ppunspriv(&mut self) -> PpunsprivW { + PpunsprivW::new(self, 0) } #[doc = "Bit 2 - PPUNS Instruction Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ppunsinst(&mut self) -> PPUNSINST_W<2> { - PPUNSINST_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ppunsinst(&mut self) -> PpunsinstW { + PpunsinstW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [nsien](index.html) module"] -pub struct NSIEN_SPEC; -impl crate::RegisterSpec for NSIEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`nsien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nsien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct NsienSpec; +impl crate::RegisterSpec for NsienSpec { type Ux = u32; } -#[doc = "`read()` method returns [nsien::R](R) reader structure"] -impl crate::Readable for NSIEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [nsien::W](W) writer structure"] -impl crate::Writable for NSIEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`nsien::R`](R) reader structure"] +impl crate::Readable for NsienSpec {} +#[doc = "`write(|w| ..)` method takes [`nsien::W`](W) writer structure"] +impl crate::Writable for NsienSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NSIEN to value 0"] -impl crate::Resettable for NSIEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for NsienSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/nsif.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/nsif.rs index 24c9fe2..f3650f9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/nsif.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/nsif.rs @@ -1,95 +1,55 @@ #[doc = "Register `NSIF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `NSIF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PPUNSPRIV` reader - PPUNS Privilege Interrupt Flag"] -pub type PPUNSPRIV_R = crate::BitReader; +pub type PpunsprivR = crate::BitReader; #[doc = "Field `PPUNSPRIV` writer - PPUNS Privilege Interrupt Flag"] -pub type PPUNSPRIV_W<'a, const O: u8> = crate::BitWriter<'a, u32, NSIF_SPEC, bool, O>; +pub type PpunsprivW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PPUNSINST` reader - PPUNS Instruction Interrupt Flag"] -pub type PPUNSINST_R = crate::BitReader; +pub type PpunsinstR = crate::BitReader; #[doc = "Field `PPUNSINST` writer - PPUNS Instruction Interrupt Flag"] -pub type PPUNSINST_W<'a, const O: u8> = crate::BitWriter<'a, u32, NSIF_SPEC, bool, O>; +pub type PpunsinstW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - PPUNS Privilege Interrupt Flag"] #[inline(always)] - pub fn ppunspriv(&self) -> PPUNSPRIV_R { - PPUNSPRIV_R::new((self.bits & 1) != 0) + pub fn ppunspriv(&self) -> PpunsprivR { + PpunsprivR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - PPUNS Instruction Interrupt Flag"] #[inline(always)] - pub fn ppunsinst(&self) -> PPUNSINST_R { - PPUNSINST_R::new(((self.bits >> 2) & 1) != 0) + pub fn ppunsinst(&self) -> PpunsinstR { + PpunsinstR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - PPUNS Privilege Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ppunspriv(&mut self) -> PPUNSPRIV_W<0> { - PPUNSPRIV_W::new(self) + pub fn ppunspriv(&mut self) -> PpunsprivW { + PpunsprivW::new(self, 0) } #[doc = "Bit 2 - PPUNS Instruction Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ppunsinst(&mut self) -> PPUNSINST_W<2> { - PPUNSINST_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ppunsinst(&mut self) -> PpunsinstW { + PpunsinstW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [nsif](index.html) module"] -pub struct NSIF_SPEC; -impl crate::RegisterSpec for NSIF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`nsif::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nsif::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct NsifSpec; +impl crate::RegisterSpec for NsifSpec { type Ux = u32; } -#[doc = "`read()` method returns [nsif::R](R) reader structure"] -impl crate::Readable for NSIF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [nsif::W](W) writer structure"] -impl crate::Writable for NSIF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`nsif::R`](R) reader structure"] +impl crate::Readable for NsifSpec {} +#[doc = "`write(|w| ..)` method takes [`nsif::W`](W) writer structure"] +impl crate::Writable for NsifSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NSIF to value 0"] -impl crate::Resettable for NSIF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for NsifSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/nslock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/nslock.rs index 9175cc2..8baae75 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/nslock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/nslock.rs @@ -1,73 +1,55 @@ #[doc = "Register `NSLOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "No Description\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum SMUNSLOCKKEY_AW { +pub enum Smunslockkey { #[doc = "11325013: Unlocks Registers"] - UNLOCK = 11325013, + Unlock = 11325013, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: SMUNSLOCKKEY_AW) -> Self { + fn from(variant: Smunslockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Smunslockkey { + type Ux = u32; +} +impl crate::IsEnum for Smunslockkey {} #[doc = "Field `SMUNSLOCKKEY` writer - No Description"] -pub type SMUNSLOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, NSLOCK_SPEC, u32, SMUNSLOCKKEY_AW, 24, O>; -impl<'a, const O: u8> SMUNSLOCKKEY_W<'a, O> { +pub type SmunslockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 24, Smunslockkey>; +impl<'a, REG> SmunslockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Unlocks Registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(SMUNSLOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Smunslockkey::Unlock) } } impl W { #[doc = "Bits 0:23 - No Description"] #[inline(always)] #[must_use] - pub fn smunslockkey(&mut self) -> SMUNSLOCKKEY_W<0> { - SMUNSLOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn smunslockkey(&mut self) -> SmunslockkeyW { + SmunslockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [nslock](index.html) module"] -pub struct NSLOCK_SPEC; -impl crate::RegisterSpec for NSLOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nslock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct NslockSpec; +impl crate::RegisterSpec for NslockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [nslock::W](W) writer structure"] -impl crate::Writable for NSLOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`nslock::W`](W) writer structure"] +impl crate::Writable for NslockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NSLOCK to value 0"] -impl crate::Resettable for NSLOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for NslockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/nsstatus.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/nsstatus.rs index 0774b66..7d99670 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/nsstatus.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/nsstatus.rs @@ -1,71 +1,56 @@ #[doc = "Register `NSSTATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `SMUNSLOCK` reader - SMUNS Lock"] -pub type SMUNSLOCK_R = crate::BitReader; +pub type R = crate::R; #[doc = "SMUNS Lock\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMUNSLOCK_A { +pub enum Smunslock { #[doc = "0: UNLOCKED"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: LOCKED"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMUNSLOCK_A) -> Self { + fn from(variant: Smunslock) -> Self { variant as u8 != 0 } } -impl SMUNSLOCK_R { +#[doc = "Field `SMUNSLOCK` reader - SMUNS Lock"] +pub type SmunslockR = crate::BitReader; +impl SmunslockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SMUNSLOCK_A { + pub const fn variant(&self) -> Smunslock { match self.bits { - false => SMUNSLOCK_A::UNLOCKED, - true => SMUNSLOCK_A::LOCKED, + false => Smunslock::Unlocked, + true => Smunslock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "UNLOCKED"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == SMUNSLOCK_A::UNLOCKED + *self == Smunslock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "LOCKED"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == SMUNSLOCK_A::LOCKED + *self == Smunslock::Locked } } impl R { #[doc = "Bit 0 - SMUNS Lock"] #[inline(always)] - pub fn smunslock(&self) -> SMUNSLOCK_R { - SMUNSLOCK_R::new((self.bits & 1) != 0) + pub fn smunslock(&self) -> SmunslockR { + SmunslockR::new((self.bits & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [nsstatus](index.html) module"] -pub struct NSSTATUS_SPEC; -impl crate::RegisterSpec for NSSTATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`nsstatus::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct NsstatusSpec; +impl crate::RegisterSpec for NsstatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [nsstatus::R](R) reader structure"] -impl crate::Readable for NSSTATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`nsstatus::R`](R) reader structure"] +impl crate::Readable for NsstatusSpec {} #[doc = "`reset()` method sets NSSTATUS to value 0"] -impl crate::Resettable for NSSTATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for NsstatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/ppunsfs.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/ppunsfs.rs index 513146d..76e0e70 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/ppunsfs.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/ppunsfs.rs @@ -1,37 +1,22 @@ #[doc = "Register `PPUNSFS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `PPUFSPERIPHID` reader - Peripheral I"] -pub type PPUFSPERIPHID_R = crate::FieldReader; +pub type PpufsperiphidR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Peripheral I"] #[inline(always)] - pub fn ppufsperiphid(&self) -> PPUFSPERIPHID_R { - PPUFSPERIPHID_R::new((self.bits & 0xff) as u8) + pub fn ppufsperiphid(&self) -> PpufsperiphidR { + PpufsperiphidR::new((self.bits & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ppunsfs](index.html) module"] -pub struct PPUNSFS_SPEC; -impl crate::RegisterSpec for PPUNSFS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ppunsfs::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PpunsfsSpec; +impl crate::RegisterSpec for PpunsfsSpec { type Ux = u32; } -#[doc = "`read()` method returns [ppunsfs::R](R) reader structure"] -impl crate::Readable for PPUNSFS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ppunsfs::R`](R) reader structure"] +impl crate::Readable for PpunsfsSpec {} #[doc = "`reset()` method sets PPUNSFS to value 0"] -impl crate::Resettable for PPUNSFS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PpunsfsSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/ppunspatd0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/ppunspatd0.rs index 16c62e4..d698c7a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/ppunspatd0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/ppunspatd0.rs @@ -1,545 +1,505 @@ #[doc = "Register `PPUNSPATD0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PPUNSPATD0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SCRATCHPAD` reader - SCRATCHPAD Privileged Access"] -pub type SCRATCHPAD_R = crate::BitReader; +pub type ScratchpadR = crate::BitReader; #[doc = "Field `SCRATCHPAD` writer - SCRATCHPAD Privileged Access"] -pub type SCRATCHPAD_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type ScratchpadW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EMU` reader - EMU Privileged Access"] -pub type EMU_R = crate::BitReader; +pub type EmuR = crate::BitReader; #[doc = "Field `EMU` writer - EMU Privileged Access"] -pub type EMU_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type EmuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CMU` reader - CMU Privileged Access"] -pub type CMU_R = crate::BitReader; +pub type CmuR = crate::BitReader; #[doc = "Field `CMU` writer - CMU Privileged Access"] -pub type CMU_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type CmuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HFRCO0` reader - HFRCO0 Privileged Access"] -pub type HFRCO0_R = crate::BitReader; +pub type Hfrco0R = crate::BitReader; #[doc = "Field `HFRCO0` writer - HFRCO0 Privileged Access"] -pub type HFRCO0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type Hfrco0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FSRCO` reader - FSRCO Privileged Access"] -pub type FSRCO_R = crate::BitReader; +pub type FsrcoR = crate::BitReader; #[doc = "Field `FSRCO` writer - FSRCO Privileged Access"] -pub type FSRCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type FsrcoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DPLL0` reader - DPLL0 Privileged Access"] -pub type DPLL0_R = crate::BitReader; +pub type Dpll0R = crate::BitReader; #[doc = "Field `DPLL0` writer - DPLL0 Privileged Access"] -pub type DPLL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type Dpll0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LFXO` reader - LFXO Privileged Access"] -pub type LFXO_R = crate::BitReader; +pub type LfxoR = crate::BitReader; #[doc = "Field `LFXO` writer - LFXO Privileged Access"] -pub type LFXO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type LfxoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LFRCO` reader - LFRCO Privileged Access"] -pub type LFRCO_R = crate::BitReader; +pub type LfrcoR = crate::BitReader; #[doc = "Field `LFRCO` writer - LFRCO Privileged Access"] -pub type LFRCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type LfrcoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ULFRCO` reader - ULFRCO Privileged Access"] -pub type ULFRCO_R = crate::BitReader; +pub type UlfrcoR = crate::BitReader; #[doc = "Field `ULFRCO` writer - ULFRCO Privileged Access"] -pub type ULFRCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type UlfrcoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MSC` reader - MSC Privileged Access"] -pub type MSC_R = crate::BitReader; +pub type MscR = crate::BitReader; #[doc = "Field `MSC` writer - MSC Privileged Access"] -pub type MSC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type MscW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICACHE0` reader - ICACHE0 Privileged Access"] -pub type ICACHE0_R = crate::BitReader; +pub type Icache0R = crate::BitReader; #[doc = "Field `ICACHE0` writer - ICACHE0 Privileged Access"] -pub type ICACHE0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type Icache0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRS` reader - PRS Privileged Access"] -pub type PRS_R = crate::BitReader; +pub type PrsR = crate::BitReader; #[doc = "Field `PRS` writer - PRS Privileged Access"] -pub type PRS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type PrsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GPIO` reader - GPIO Privileged Access"] -pub type GPIO_R = crate::BitReader; +pub type GpioR = crate::BitReader; #[doc = "Field `GPIO` writer - GPIO Privileged Access"] -pub type GPIO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type GpioW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LDMA` reader - LDMA Privileged Access"] -pub type LDMA_R = crate::BitReader; +pub type LdmaR = crate::BitReader; #[doc = "Field `LDMA` writer - LDMA Privileged Access"] -pub type LDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type LdmaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LDMAXBAR` reader - LDMAXBAR Privileged Access"] -pub type LDMAXBAR_R = crate::BitReader; +pub type LdmaxbarR = crate::BitReader; #[doc = "Field `LDMAXBAR` writer - LDMAXBAR Privileged Access"] -pub type LDMAXBAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type LdmaxbarW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER0` reader - TIMER0 Privileged Access"] -pub type TIMER0_R = crate::BitReader; +pub type Timer0R = crate::BitReader; #[doc = "Field `TIMER0` writer - TIMER0 Privileged Access"] -pub type TIMER0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type Timer0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER1` reader - TIMER1 Privileged Access"] -pub type TIMER1_R = crate::BitReader; +pub type Timer1R = crate::BitReader; #[doc = "Field `TIMER1` writer - TIMER1 Privileged Access"] -pub type TIMER1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type Timer1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER2` reader - TIMER2 Privileged Access"] -pub type TIMER2_R = crate::BitReader; +pub type Timer2R = crate::BitReader; #[doc = "Field `TIMER2` writer - TIMER2 Privileged Access"] -pub type TIMER2_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type Timer2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER3` reader - TIMER3 Privileged Access"] -pub type TIMER3_R = crate::BitReader; +pub type Timer3R = crate::BitReader; #[doc = "Field `TIMER3` writer - TIMER3 Privileged Access"] -pub type TIMER3_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type Timer3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER4` reader - TIMER4 Privileged Access"] -pub type TIMER4_R = crate::BitReader; +pub type Timer4R = crate::BitReader; #[doc = "Field `TIMER4` writer - TIMER4 Privileged Access"] -pub type TIMER4_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type Timer4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USART0` reader - USART0 Privileged Access"] -pub type USART0_R = crate::BitReader; +pub type Usart0R = crate::BitReader; #[doc = "Field `USART0` writer - USART0 Privileged Access"] -pub type USART0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type Usart0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BURTC` reader - BURTC Privileged Access"] -pub type BURTC_R = crate::BitReader; +pub type BurtcR = crate::BitReader; #[doc = "Field `BURTC` writer - BURTC Privileged Access"] -pub type BURTC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type BurtcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C1` reader - I2C1 Privileged Access"] -pub type I2C1_R = crate::BitReader; +pub type I2c1R = crate::BitReader; #[doc = "Field `I2C1` writer - I2C1 Privileged Access"] -pub type I2C1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type I2c1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHIPTESTCTRL` reader - CHIPTESTCTRL Privileged Access"] -pub type CHIPTESTCTRL_R = crate::BitReader; +pub type ChiptestctrlR = crate::BitReader; #[doc = "Field `CHIPTESTCTRL` writer - CHIPTESTCTRL Privileged Access"] -pub type CHIPTESTCTRL_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type ChiptestctrlW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYSCFGCFGNS` reader - SYSCFGCFGNS Privileged Access"] -pub type SYSCFGCFGNS_R = crate::BitReader; +pub type SyscfgcfgnsR = crate::BitReader; #[doc = "Field `SYSCFGCFGNS` writer - SYSCFGCFGNS Privileged Access"] -pub type SYSCFGCFGNS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type SyscfgcfgnsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYSCFG` reader - SYSCFG Privileged Access"] -pub type SYSCFG_R = crate::BitReader; +pub type SyscfgR = crate::BitReader; #[doc = "Field `SYSCFG` writer - SYSCFG Privileged Access"] -pub type SYSCFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type SyscfgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BURAM` reader - BURAM Privileged Access"] -pub type BURAM_R = crate::BitReader; +pub type BuramR = crate::BitReader; #[doc = "Field `BURAM` writer - BURAM Privileged Access"] -pub type BURAM_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type BuramW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GPCRC` reader - GPCRC Privileged Access"] -pub type GPCRC_R = crate::BitReader; +pub type GpcrcR = crate::BitReader; #[doc = "Field `GPCRC` writer - GPCRC Privileged Access"] -pub type GPCRC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type GpcrcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCDC` reader - DCDC Privileged Access"] -pub type DCDC_R = crate::BitReader; +pub type DcdcR = crate::BitReader; #[doc = "Field `DCDC` writer - DCDC Privileged Access"] -pub type DCDC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type DcdcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HOSTMAILBOX` reader - HOSTMAILBOX Privileged Access"] -pub type HOSTMAILBOX_R = crate::BitReader; +pub type HostmailboxR = crate::BitReader; #[doc = "Field `HOSTMAILBOX` writer - HOSTMAILBOX Privileged Access"] -pub type HOSTMAILBOX_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type HostmailboxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EUSART1` reader - EUSART1 Privileged Access"] -pub type EUSART1_R = crate::BitReader; +pub type Eusart1R = crate::BitReader; #[doc = "Field `EUSART1` writer - EUSART1 Privileged Access"] -pub type EUSART1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type Eusart1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EUSART2` reader - EUSART2 Privileged Access"] -pub type EUSART2_R = crate::BitReader; +pub type Eusart2R = crate::BitReader; #[doc = "Field `EUSART2` writer - EUSART2 Privileged Access"] -pub type EUSART2_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type Eusart2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - SCRATCHPAD Privileged Access"] #[inline(always)] - pub fn scratchpad(&self) -> SCRATCHPAD_R { - SCRATCHPAD_R::new((self.bits & 1) != 0) + pub fn scratchpad(&self) -> ScratchpadR { + ScratchpadR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - EMU Privileged Access"] #[inline(always)] - pub fn emu(&self) -> EMU_R { - EMU_R::new(((self.bits >> 1) & 1) != 0) + pub fn emu(&self) -> EmuR { + EmuR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CMU Privileged Access"] #[inline(always)] - pub fn cmu(&self) -> CMU_R { - CMU_R::new(((self.bits >> 2) & 1) != 0) + pub fn cmu(&self) -> CmuR { + CmuR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - HFRCO0 Privileged Access"] #[inline(always)] - pub fn hfrco0(&self) -> HFRCO0_R { - HFRCO0_R::new(((self.bits >> 3) & 1) != 0) + pub fn hfrco0(&self) -> Hfrco0R { + Hfrco0R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - FSRCO Privileged Access"] #[inline(always)] - pub fn fsrco(&self) -> FSRCO_R { - FSRCO_R::new(((self.bits >> 4) & 1) != 0) + pub fn fsrco(&self) -> FsrcoR { + FsrcoR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DPLL0 Privileged Access"] #[inline(always)] - pub fn dpll0(&self) -> DPLL0_R { - DPLL0_R::new(((self.bits >> 5) & 1) != 0) + pub fn dpll0(&self) -> Dpll0R { + Dpll0R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - LFXO Privileged Access"] #[inline(always)] - pub fn lfxo(&self) -> LFXO_R { - LFXO_R::new(((self.bits >> 6) & 1) != 0) + pub fn lfxo(&self) -> LfxoR { + LfxoR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - LFRCO Privileged Access"] #[inline(always)] - pub fn lfrco(&self) -> LFRCO_R { - LFRCO_R::new(((self.bits >> 7) & 1) != 0) + pub fn lfrco(&self) -> LfrcoR { + LfrcoR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - ULFRCO Privileged Access"] #[inline(always)] - pub fn ulfrco(&self) -> ULFRCO_R { - ULFRCO_R::new(((self.bits >> 8) & 1) != 0) + pub fn ulfrco(&self) -> UlfrcoR { + UlfrcoR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - MSC Privileged Access"] #[inline(always)] - pub fn msc(&self) -> MSC_R { - MSC_R::new(((self.bits >> 9) & 1) != 0) + pub fn msc(&self) -> MscR { + MscR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - ICACHE0 Privileged Access"] #[inline(always)] - pub fn icache0(&self) -> ICACHE0_R { - ICACHE0_R::new(((self.bits >> 10) & 1) != 0) + pub fn icache0(&self) -> Icache0R { + Icache0R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - PRS Privileged Access"] #[inline(always)] - pub fn prs(&self) -> PRS_R { - PRS_R::new(((self.bits >> 11) & 1) != 0) + pub fn prs(&self) -> PrsR { + PrsR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - GPIO Privileged Access"] #[inline(always)] - pub fn gpio(&self) -> GPIO_R { - GPIO_R::new(((self.bits >> 12) & 1) != 0) + pub fn gpio(&self) -> GpioR { + GpioR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - LDMA Privileged Access"] #[inline(always)] - pub fn ldma(&self) -> LDMA_R { - LDMA_R::new(((self.bits >> 13) & 1) != 0) + pub fn ldma(&self) -> LdmaR { + LdmaR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - LDMAXBAR Privileged Access"] #[inline(always)] - pub fn ldmaxbar(&self) -> LDMAXBAR_R { - LDMAXBAR_R::new(((self.bits >> 14) & 1) != 0) + pub fn ldmaxbar(&self) -> LdmaxbarR { + LdmaxbarR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - TIMER0 Privileged Access"] #[inline(always)] - pub fn timer0(&self) -> TIMER0_R { - TIMER0_R::new(((self.bits >> 15) & 1) != 0) + pub fn timer0(&self) -> Timer0R { + Timer0R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - TIMER1 Privileged Access"] #[inline(always)] - pub fn timer1(&self) -> TIMER1_R { - TIMER1_R::new(((self.bits >> 16) & 1) != 0) + pub fn timer1(&self) -> Timer1R { + Timer1R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - TIMER2 Privileged Access"] #[inline(always)] - pub fn timer2(&self) -> TIMER2_R { - TIMER2_R::new(((self.bits >> 17) & 1) != 0) + pub fn timer2(&self) -> Timer2R { + Timer2R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - TIMER3 Privileged Access"] #[inline(always)] - pub fn timer3(&self) -> TIMER3_R { - TIMER3_R::new(((self.bits >> 18) & 1) != 0) + pub fn timer3(&self) -> Timer3R { + Timer3R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - TIMER4 Privileged Access"] #[inline(always)] - pub fn timer4(&self) -> TIMER4_R { - TIMER4_R::new(((self.bits >> 19) & 1) != 0) + pub fn timer4(&self) -> Timer4R { + Timer4R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - USART0 Privileged Access"] #[inline(always)] - pub fn usart0(&self) -> USART0_R { - USART0_R::new(((self.bits >> 20) & 1) != 0) + pub fn usart0(&self) -> Usart0R { + Usart0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - BURTC Privileged Access"] #[inline(always)] - pub fn burtc(&self) -> BURTC_R { - BURTC_R::new(((self.bits >> 21) & 1) != 0) + pub fn burtc(&self) -> BurtcR { + BurtcR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - I2C1 Privileged Access"] #[inline(always)] - pub fn i2c1(&self) -> I2C1_R { - I2C1_R::new(((self.bits >> 22) & 1) != 0) + pub fn i2c1(&self) -> I2c1R { + I2c1R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - CHIPTESTCTRL Privileged Access"] #[inline(always)] - pub fn chiptestctrl(&self) -> CHIPTESTCTRL_R { - CHIPTESTCTRL_R::new(((self.bits >> 23) & 1) != 0) + pub fn chiptestctrl(&self) -> ChiptestctrlR { + ChiptestctrlR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - SYSCFGCFGNS Privileged Access"] #[inline(always)] - pub fn syscfgcfgns(&self) -> SYSCFGCFGNS_R { - SYSCFGCFGNS_R::new(((self.bits >> 24) & 1) != 0) + pub fn syscfgcfgns(&self) -> SyscfgcfgnsR { + SyscfgcfgnsR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - SYSCFG Privileged Access"] #[inline(always)] - pub fn syscfg(&self) -> SYSCFG_R { - SYSCFG_R::new(((self.bits >> 25) & 1) != 0) + pub fn syscfg(&self) -> SyscfgR { + SyscfgR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - BURAM Privileged Access"] #[inline(always)] - pub fn buram(&self) -> BURAM_R { - BURAM_R::new(((self.bits >> 26) & 1) != 0) + pub fn buram(&self) -> BuramR { + BuramR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - GPCRC Privileged Access"] #[inline(always)] - pub fn gpcrc(&self) -> GPCRC_R { - GPCRC_R::new(((self.bits >> 27) & 1) != 0) + pub fn gpcrc(&self) -> GpcrcR { + GpcrcR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - DCDC Privileged Access"] #[inline(always)] - pub fn dcdc(&self) -> DCDC_R { - DCDC_R::new(((self.bits >> 28) & 1) != 0) + pub fn dcdc(&self) -> DcdcR { + DcdcR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - HOSTMAILBOX Privileged Access"] #[inline(always)] - pub fn hostmailbox(&self) -> HOSTMAILBOX_R { - HOSTMAILBOX_R::new(((self.bits >> 29) & 1) != 0) + pub fn hostmailbox(&self) -> HostmailboxR { + HostmailboxR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - EUSART1 Privileged Access"] #[inline(always)] - pub fn eusart1(&self) -> EUSART1_R { - EUSART1_R::new(((self.bits >> 30) & 1) != 0) + pub fn eusart1(&self) -> Eusart1R { + Eusart1R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - EUSART2 Privileged Access"] #[inline(always)] - pub fn eusart2(&self) -> EUSART2_R { - EUSART2_R::new(((self.bits >> 31) & 1) != 0) + pub fn eusart2(&self) -> Eusart2R { + Eusart2R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - SCRATCHPAD Privileged Access"] #[inline(always)] #[must_use] - pub fn scratchpad(&mut self) -> SCRATCHPAD_W<0> { - SCRATCHPAD_W::new(self) + pub fn scratchpad(&mut self) -> ScratchpadW { + ScratchpadW::new(self, 0) } #[doc = "Bit 1 - EMU Privileged Access"] #[inline(always)] #[must_use] - pub fn emu(&mut self) -> EMU_W<1> { - EMU_W::new(self) + pub fn emu(&mut self) -> EmuW { + EmuW::new(self, 1) } #[doc = "Bit 2 - CMU Privileged Access"] #[inline(always)] #[must_use] - pub fn cmu(&mut self) -> CMU_W<2> { - CMU_W::new(self) + pub fn cmu(&mut self) -> CmuW { + CmuW::new(self, 2) } #[doc = "Bit 3 - HFRCO0 Privileged Access"] #[inline(always)] #[must_use] - pub fn hfrco0(&mut self) -> HFRCO0_W<3> { - HFRCO0_W::new(self) + pub fn hfrco0(&mut self) -> Hfrco0W { + Hfrco0W::new(self, 3) } #[doc = "Bit 4 - FSRCO Privileged Access"] #[inline(always)] #[must_use] - pub fn fsrco(&mut self) -> FSRCO_W<4> { - FSRCO_W::new(self) + pub fn fsrco(&mut self) -> FsrcoW { + FsrcoW::new(self, 4) } #[doc = "Bit 5 - DPLL0 Privileged Access"] #[inline(always)] #[must_use] - pub fn dpll0(&mut self) -> DPLL0_W<5> { - DPLL0_W::new(self) + pub fn dpll0(&mut self) -> Dpll0W { + Dpll0W::new(self, 5) } #[doc = "Bit 6 - LFXO Privileged Access"] #[inline(always)] #[must_use] - pub fn lfxo(&mut self) -> LFXO_W<6> { - LFXO_W::new(self) + pub fn lfxo(&mut self) -> LfxoW { + LfxoW::new(self, 6) } #[doc = "Bit 7 - LFRCO Privileged Access"] #[inline(always)] #[must_use] - pub fn lfrco(&mut self) -> LFRCO_W<7> { - LFRCO_W::new(self) + pub fn lfrco(&mut self) -> LfrcoW { + LfrcoW::new(self, 7) } #[doc = "Bit 8 - ULFRCO Privileged Access"] #[inline(always)] #[must_use] - pub fn ulfrco(&mut self) -> ULFRCO_W<8> { - ULFRCO_W::new(self) + pub fn ulfrco(&mut self) -> UlfrcoW { + UlfrcoW::new(self, 8) } #[doc = "Bit 9 - MSC Privileged Access"] #[inline(always)] #[must_use] - pub fn msc(&mut self) -> MSC_W<9> { - MSC_W::new(self) + pub fn msc(&mut self) -> MscW { + MscW::new(self, 9) } #[doc = "Bit 10 - ICACHE0 Privileged Access"] #[inline(always)] #[must_use] - pub fn icache0(&mut self) -> ICACHE0_W<10> { - ICACHE0_W::new(self) + pub fn icache0(&mut self) -> Icache0W { + Icache0W::new(self, 10) } #[doc = "Bit 11 - PRS Privileged Access"] #[inline(always)] #[must_use] - pub fn prs(&mut self) -> PRS_W<11> { - PRS_W::new(self) + pub fn prs(&mut self) -> PrsW { + PrsW::new(self, 11) } #[doc = "Bit 12 - GPIO Privileged Access"] #[inline(always)] #[must_use] - pub fn gpio(&mut self) -> GPIO_W<12> { - GPIO_W::new(self) + pub fn gpio(&mut self) -> GpioW { + GpioW::new(self, 12) } #[doc = "Bit 13 - LDMA Privileged Access"] #[inline(always)] #[must_use] - pub fn ldma(&mut self) -> LDMA_W<13> { - LDMA_W::new(self) + pub fn ldma(&mut self) -> LdmaW { + LdmaW::new(self, 13) } #[doc = "Bit 14 - LDMAXBAR Privileged Access"] #[inline(always)] #[must_use] - pub fn ldmaxbar(&mut self) -> LDMAXBAR_W<14> { - LDMAXBAR_W::new(self) + pub fn ldmaxbar(&mut self) -> LdmaxbarW { + LdmaxbarW::new(self, 14) } #[doc = "Bit 15 - TIMER0 Privileged Access"] #[inline(always)] #[must_use] - pub fn timer0(&mut self) -> TIMER0_W<15> { - TIMER0_W::new(self) + pub fn timer0(&mut self) -> Timer0W { + Timer0W::new(self, 15) } #[doc = "Bit 16 - TIMER1 Privileged Access"] #[inline(always)] #[must_use] - pub fn timer1(&mut self) -> TIMER1_W<16> { - TIMER1_W::new(self) + pub fn timer1(&mut self) -> Timer1W { + Timer1W::new(self, 16) } #[doc = "Bit 17 - TIMER2 Privileged Access"] #[inline(always)] #[must_use] - pub fn timer2(&mut self) -> TIMER2_W<17> { - TIMER2_W::new(self) + pub fn timer2(&mut self) -> Timer2W { + Timer2W::new(self, 17) } #[doc = "Bit 18 - TIMER3 Privileged Access"] #[inline(always)] #[must_use] - pub fn timer3(&mut self) -> TIMER3_W<18> { - TIMER3_W::new(self) + pub fn timer3(&mut self) -> Timer3W { + Timer3W::new(self, 18) } #[doc = "Bit 19 - TIMER4 Privileged Access"] #[inline(always)] #[must_use] - pub fn timer4(&mut self) -> TIMER4_W<19> { - TIMER4_W::new(self) + pub fn timer4(&mut self) -> Timer4W { + Timer4W::new(self, 19) } #[doc = "Bit 20 - USART0 Privileged Access"] #[inline(always)] #[must_use] - pub fn usart0(&mut self) -> USART0_W<20> { - USART0_W::new(self) + pub fn usart0(&mut self) -> Usart0W { + Usart0W::new(self, 20) } #[doc = "Bit 21 - BURTC Privileged Access"] #[inline(always)] #[must_use] - pub fn burtc(&mut self) -> BURTC_W<21> { - BURTC_W::new(self) + pub fn burtc(&mut self) -> BurtcW { + BurtcW::new(self, 21) } #[doc = "Bit 22 - I2C1 Privileged Access"] #[inline(always)] #[must_use] - pub fn i2c1(&mut self) -> I2C1_W<22> { - I2C1_W::new(self) + pub fn i2c1(&mut self) -> I2c1W { + I2c1W::new(self, 22) } #[doc = "Bit 23 - CHIPTESTCTRL Privileged Access"] #[inline(always)] #[must_use] - pub fn chiptestctrl(&mut self) -> CHIPTESTCTRL_W<23> { - CHIPTESTCTRL_W::new(self) + pub fn chiptestctrl(&mut self) -> ChiptestctrlW { + ChiptestctrlW::new(self, 23) } #[doc = "Bit 24 - SYSCFGCFGNS Privileged Access"] #[inline(always)] #[must_use] - pub fn syscfgcfgns(&mut self) -> SYSCFGCFGNS_W<24> { - SYSCFGCFGNS_W::new(self) + pub fn syscfgcfgns(&mut self) -> SyscfgcfgnsW { + SyscfgcfgnsW::new(self, 24) } #[doc = "Bit 25 - SYSCFG Privileged Access"] #[inline(always)] #[must_use] - pub fn syscfg(&mut self) -> SYSCFG_W<25> { - SYSCFG_W::new(self) + pub fn syscfg(&mut self) -> SyscfgW { + SyscfgW::new(self, 25) } #[doc = "Bit 26 - BURAM Privileged Access"] #[inline(always)] #[must_use] - pub fn buram(&mut self) -> BURAM_W<26> { - BURAM_W::new(self) + pub fn buram(&mut self) -> BuramW { + BuramW::new(self, 26) } #[doc = "Bit 27 - GPCRC Privileged Access"] #[inline(always)] #[must_use] - pub fn gpcrc(&mut self) -> GPCRC_W<27> { - GPCRC_W::new(self) + pub fn gpcrc(&mut self) -> GpcrcW { + GpcrcW::new(self, 27) } #[doc = "Bit 28 - DCDC Privileged Access"] #[inline(always)] #[must_use] - pub fn dcdc(&mut self) -> DCDC_W<28> { - DCDC_W::new(self) + pub fn dcdc(&mut self) -> DcdcW { + DcdcW::new(self, 28) } #[doc = "Bit 29 - HOSTMAILBOX Privileged Access"] #[inline(always)] #[must_use] - pub fn hostmailbox(&mut self) -> HOSTMAILBOX_W<29> { - HOSTMAILBOX_W::new(self) + pub fn hostmailbox(&mut self) -> HostmailboxW { + HostmailboxW::new(self, 29) } #[doc = "Bit 30 - EUSART1 Privileged Access"] #[inline(always)] #[must_use] - pub fn eusart1(&mut self) -> EUSART1_W<30> { - EUSART1_W::new(self) + pub fn eusart1(&mut self) -> Eusart1W { + Eusart1W::new(self, 30) } #[doc = "Bit 31 - EUSART2 Privileged Access"] #[inline(always)] #[must_use] - pub fn eusart2(&mut self) -> EUSART2_W<31> { - EUSART2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn eusart2(&mut self) -> Eusart2W { + Eusart2W::new(self, 31) } } -#[doc = "Set peripheral bits to 1 to mark as privileged access only\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ppunspatd0](index.html) module"] -pub struct PPUNSPATD0_SPEC; -impl crate::RegisterSpec for PPUNSPATD0_SPEC { +#[doc = "Set peripheral bits to 1 to mark as privileged access only\n\nYou can [`read`](crate::Reg::read) this register and get [`ppunspatd0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ppunspatd0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ppunspatd0Spec; +impl crate::RegisterSpec for Ppunspatd0Spec { type Ux = u32; } -#[doc = "`read()` method returns [ppunspatd0::R](R) reader structure"] -impl crate::Readable for PPUNSPATD0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ppunspatd0::W](W) writer structure"] -impl crate::Writable for PPUNSPATD0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ppunspatd0::R`](R) reader structure"] +impl crate::Readable for Ppunspatd0Spec {} +#[doc = "`write(|w| ..)` method takes [`ppunspatd0::W`](W) writer structure"] +impl crate::Writable for Ppunspatd0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPUNSPATD0 to value 0"] -impl crate::Resettable for PPUNSPATD0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ppunspatd0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/ppunspatd1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/ppunspatd1.rs index 78a00d1..b482bf9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/ppunspatd1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_ns_cfgns/ppunspatd1.rs @@ -1,395 +1,355 @@ #[doc = "Register `PPUNSPATD1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PPUNSPATD1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SYSRTC` reader - SYSRTC Privileged Access"] -pub type SYSRTC_R = crate::BitReader; +pub type SysrtcR = crate::BitReader; #[doc = "Field `SYSRTC` writer - SYSRTC Privileged Access"] -pub type SYSRTC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type SysrtcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LCD` reader - LCD Privileged Access"] -pub type LCD_R = crate::BitReader; +pub type LcdR = crate::BitReader; #[doc = "Field `LCD` writer - LCD Privileged Access"] -pub type LCD_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type LcdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `KEYSCAN` reader - KEYSCAN Privileged Access"] -pub type KEYSCAN_R = crate::BitReader; +pub type KeyscanR = crate::BitReader; #[doc = "Field `KEYSCAN` writer - KEYSCAN Privileged Access"] -pub type KEYSCAN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type KeyscanW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMEM` reader - DMEM Privileged Access"] -pub type DMEM_R = crate::BitReader; +pub type DmemR = crate::BitReader; #[doc = "Field `DMEM` writer - DMEM Privileged Access"] -pub type DMEM_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type DmemW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LCDRF` reader - LCDRF Privileged Access"] -pub type LCDRF_R = crate::BitReader; +pub type LcdrfR = crate::BitReader; #[doc = "Field `LCDRF` writer - LCDRF Privileged Access"] -pub type LCDRF_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type LcdrfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SMU` reader - SMU Privileged Access"] -pub type SMU_R = crate::BitReader; +pub type SmuR = crate::BitReader; #[doc = "Field `SMU` writer - SMU Privileged Access"] -pub type SMU_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type SmuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SMUCFGNS` reader - SMUCFGNS Privileged Access"] -pub type SMUCFGNS_R = crate::BitReader; +pub type SmucfgnsR = crate::BitReader; #[doc = "Field `SMUCFGNS` writer - SMUCFGNS Privileged Access"] -pub type SMUCFGNS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type SmucfgnsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LETIMER0` reader - LETIMER0 Privileged Access"] -pub type LETIMER0_R = crate::BitReader; +pub type Letimer0R = crate::BitReader; #[doc = "Field `LETIMER0` writer - LETIMER0 Privileged Access"] -pub type LETIMER0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type Letimer0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IADC0` reader - IADC0 Privileged Access"] -pub type IADC0_R = crate::BitReader; +pub type Iadc0R = crate::BitReader; #[doc = "Field `IADC0` writer - IADC0 Privileged Access"] -pub type IADC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type Iadc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMP0` reader - ACMP0 Privileged Access"] -pub type ACMP0_R = crate::BitReader; +pub type Acmp0R = crate::BitReader; #[doc = "Field `ACMP0` writer - ACMP0 Privileged Access"] -pub type ACMP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type Acmp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMP1` reader - ACMP1 Privileged Access"] -pub type ACMP1_R = crate::BitReader; +pub type Acmp1R = crate::BitReader; #[doc = "Field `ACMP1` writer - ACMP1 Privileged Access"] -pub type ACMP1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type Acmp1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AMUXCP0` reader - AMUXCP0 Privileged Access"] -pub type AMUXCP0_R = crate::BitReader; +pub type Amuxcp0R = crate::BitReader; #[doc = "Field `AMUXCP0` writer - AMUXCP0 Privileged Access"] -pub type AMUXCP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type Amuxcp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VDAC0` reader - VDAC0 Privileged Access"] -pub type VDAC0_R = crate::BitReader; +pub type Vdac0R = crate::BitReader; #[doc = "Field `VDAC0` writer - VDAC0 Privileged Access"] -pub type VDAC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type Vdac0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PCNT` reader - PCNT Privileged Access"] -pub type PCNT_R = crate::BitReader; +pub type PcntR = crate::BitReader; #[doc = "Field `PCNT` writer - PCNT Privileged Access"] -pub type PCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type PcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LESENSE` reader - LESENSE Privileged Access"] -pub type LESENSE_R = crate::BitReader; +pub type LesenseR = crate::BitReader; #[doc = "Field `LESENSE` writer - LESENSE Privileged Access"] -pub type LESENSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type LesenseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HFRCO1` reader - HFRCO1 Privileged Access"] -pub type HFRCO1_R = crate::BitReader; +pub type Hfrco1R = crate::BitReader; #[doc = "Field `HFRCO1` writer - HFRCO1 Privileged Access"] -pub type HFRCO1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type Hfrco1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HFXO0` reader - HFXO0 Privileged Access"] -pub type HFXO0_R = crate::BitReader; +pub type Hfxo0R = crate::BitReader; #[doc = "Field `HFXO0` writer - HFXO0 Privileged Access"] -pub type HFXO0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type Hfxo0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C0` reader - I2C0 Privileged Access"] -pub type I2C0_R = crate::BitReader; +pub type I2c0R = crate::BitReader; #[doc = "Field `I2C0` writer - I2C0 Privileged Access"] -pub type I2C0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type I2c0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WDOG0` reader - WDOG0 Privileged Access"] -pub type WDOG0_R = crate::BitReader; +pub type Wdog0R = crate::BitReader; #[doc = "Field `WDOG0` writer - WDOG0 Privileged Access"] -pub type WDOG0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type Wdog0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WDOG1` reader - WDOG1 Privileged Access"] -pub type WDOG1_R = crate::BitReader; +pub type Wdog1R = crate::BitReader; #[doc = "Field `WDOG1` writer - WDOG1 Privileged Access"] -pub type WDOG1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type Wdog1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EUSART0` reader - EUSART0 Privileged Access"] -pub type EUSART0_R = crate::BitReader; +pub type Eusart0R = crate::BitReader; #[doc = "Field `EUSART0` writer - EUSART0 Privileged Access"] -pub type EUSART0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type Eusart0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SEMAILBOX` reader - SEMAILBOX Privileged Access"] -pub type SEMAILBOX_R = crate::BitReader; +pub type SemailboxR = crate::BitReader; #[doc = "Field `SEMAILBOX` writer - SEMAILBOX Privileged Access"] -pub type SEMAILBOX_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type SemailboxW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - SYSRTC Privileged Access"] #[inline(always)] - pub fn sysrtc(&self) -> SYSRTC_R { - SYSRTC_R::new((self.bits & 1) != 0) + pub fn sysrtc(&self) -> SysrtcR { + SysrtcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - LCD Privileged Access"] #[inline(always)] - pub fn lcd(&self) -> LCD_R { - LCD_R::new(((self.bits >> 1) & 1) != 0) + pub fn lcd(&self) -> LcdR { + LcdR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - KEYSCAN Privileged Access"] #[inline(always)] - pub fn keyscan(&self) -> KEYSCAN_R { - KEYSCAN_R::new(((self.bits >> 2) & 1) != 0) + pub fn keyscan(&self) -> KeyscanR { + KeyscanR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DMEM Privileged Access"] #[inline(always)] - pub fn dmem(&self) -> DMEM_R { - DMEM_R::new(((self.bits >> 3) & 1) != 0) + pub fn dmem(&self) -> DmemR { + DmemR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - LCDRF Privileged Access"] #[inline(always)] - pub fn lcdrf(&self) -> LCDRF_R { - LCDRF_R::new(((self.bits >> 4) & 1) != 0) + pub fn lcdrf(&self) -> LcdrfR { + LcdrfR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 7 - SMU Privileged Access"] #[inline(always)] - pub fn smu(&self) -> SMU_R { - SMU_R::new(((self.bits >> 7) & 1) != 0) + pub fn smu(&self) -> SmuR { + SmuR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - SMUCFGNS Privileged Access"] #[inline(always)] - pub fn smucfgns(&self) -> SMUCFGNS_R { - SMUCFGNS_R::new(((self.bits >> 8) & 1) != 0) + pub fn smucfgns(&self) -> SmucfgnsR { + SmucfgnsR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - LETIMER0 Privileged Access"] #[inline(always)] - pub fn letimer0(&self) -> LETIMER0_R { - LETIMER0_R::new(((self.bits >> 9) & 1) != 0) + pub fn letimer0(&self) -> Letimer0R { + Letimer0R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - IADC0 Privileged Access"] #[inline(always)] - pub fn iadc0(&self) -> IADC0_R { - IADC0_R::new(((self.bits >> 10) & 1) != 0) + pub fn iadc0(&self) -> Iadc0R { + Iadc0R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - ACMP0 Privileged Access"] #[inline(always)] - pub fn acmp0(&self) -> ACMP0_R { - ACMP0_R::new(((self.bits >> 11) & 1) != 0) + pub fn acmp0(&self) -> Acmp0R { + Acmp0R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - ACMP1 Privileged Access"] #[inline(always)] - pub fn acmp1(&self) -> ACMP1_R { - ACMP1_R::new(((self.bits >> 12) & 1) != 0) + pub fn acmp1(&self) -> Acmp1R { + Acmp1R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - AMUXCP0 Privileged Access"] #[inline(always)] - pub fn amuxcp0(&self) -> AMUXCP0_R { - AMUXCP0_R::new(((self.bits >> 13) & 1) != 0) + pub fn amuxcp0(&self) -> Amuxcp0R { + Amuxcp0R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - VDAC0 Privileged Access"] #[inline(always)] - pub fn vdac0(&self) -> VDAC0_R { - VDAC0_R::new(((self.bits >> 14) & 1) != 0) + pub fn vdac0(&self) -> Vdac0R { + Vdac0R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - PCNT Privileged Access"] #[inline(always)] - pub fn pcnt(&self) -> PCNT_R { - PCNT_R::new(((self.bits >> 15) & 1) != 0) + pub fn pcnt(&self) -> PcntR { + PcntR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - LESENSE Privileged Access"] #[inline(always)] - pub fn lesense(&self) -> LESENSE_R { - LESENSE_R::new(((self.bits >> 16) & 1) != 0) + pub fn lesense(&self) -> LesenseR { + LesenseR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - HFRCO1 Privileged Access"] #[inline(always)] - pub fn hfrco1(&self) -> HFRCO1_R { - HFRCO1_R::new(((self.bits >> 17) & 1) != 0) + pub fn hfrco1(&self) -> Hfrco1R { + Hfrco1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - HFXO0 Privileged Access"] #[inline(always)] - pub fn hfxo0(&self) -> HFXO0_R { - HFXO0_R::new(((self.bits >> 18) & 1) != 0) + pub fn hfxo0(&self) -> Hfxo0R { + Hfxo0R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - I2C0 Privileged Access"] #[inline(always)] - pub fn i2c0(&self) -> I2C0_R { - I2C0_R::new(((self.bits >> 19) & 1) != 0) + pub fn i2c0(&self) -> I2c0R { + I2c0R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - WDOG0 Privileged Access"] #[inline(always)] - pub fn wdog0(&self) -> WDOG0_R { - WDOG0_R::new(((self.bits >> 20) & 1) != 0) + pub fn wdog0(&self) -> Wdog0R { + Wdog0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - WDOG1 Privileged Access"] #[inline(always)] - pub fn wdog1(&self) -> WDOG1_R { - WDOG1_R::new(((self.bits >> 21) & 1) != 0) + pub fn wdog1(&self) -> Wdog1R { + Wdog1R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - EUSART0 Privileged Access"] #[inline(always)] - pub fn eusart0(&self) -> EUSART0_R { - EUSART0_R::new(((self.bits >> 22) & 1) != 0) + pub fn eusart0(&self) -> Eusart0R { + Eusart0R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - SEMAILBOX Privileged Access"] #[inline(always)] - pub fn semailbox(&self) -> SEMAILBOX_R { - SEMAILBOX_R::new(((self.bits >> 23) & 1) != 0) + pub fn semailbox(&self) -> SemailboxR { + SemailboxR::new(((self.bits >> 23) & 1) != 0) } } impl W { #[doc = "Bit 0 - SYSRTC Privileged Access"] #[inline(always)] #[must_use] - pub fn sysrtc(&mut self) -> SYSRTC_W<0> { - SYSRTC_W::new(self) + pub fn sysrtc(&mut self) -> SysrtcW { + SysrtcW::new(self, 0) } #[doc = "Bit 1 - LCD Privileged Access"] #[inline(always)] #[must_use] - pub fn lcd(&mut self) -> LCD_W<1> { - LCD_W::new(self) + pub fn lcd(&mut self) -> LcdW { + LcdW::new(self, 1) } #[doc = "Bit 2 - KEYSCAN Privileged Access"] #[inline(always)] #[must_use] - pub fn keyscan(&mut self) -> KEYSCAN_W<2> { - KEYSCAN_W::new(self) + pub fn keyscan(&mut self) -> KeyscanW { + KeyscanW::new(self, 2) } #[doc = "Bit 3 - DMEM Privileged Access"] #[inline(always)] #[must_use] - pub fn dmem(&mut self) -> DMEM_W<3> { - DMEM_W::new(self) + pub fn dmem(&mut self) -> DmemW { + DmemW::new(self, 3) } #[doc = "Bit 4 - LCDRF Privileged Access"] #[inline(always)] #[must_use] - pub fn lcdrf(&mut self) -> LCDRF_W<4> { - LCDRF_W::new(self) + pub fn lcdrf(&mut self) -> LcdrfW { + LcdrfW::new(self, 4) } #[doc = "Bit 7 - SMU Privileged Access"] #[inline(always)] #[must_use] - pub fn smu(&mut self) -> SMU_W<7> { - SMU_W::new(self) + pub fn smu(&mut self) -> SmuW { + SmuW::new(self, 7) } #[doc = "Bit 8 - SMUCFGNS Privileged Access"] #[inline(always)] #[must_use] - pub fn smucfgns(&mut self) -> SMUCFGNS_W<8> { - SMUCFGNS_W::new(self) + pub fn smucfgns(&mut self) -> SmucfgnsW { + SmucfgnsW::new(self, 8) } #[doc = "Bit 9 - LETIMER0 Privileged Access"] #[inline(always)] #[must_use] - pub fn letimer0(&mut self) -> LETIMER0_W<9> { - LETIMER0_W::new(self) + pub fn letimer0(&mut self) -> Letimer0W { + Letimer0W::new(self, 9) } #[doc = "Bit 10 - IADC0 Privileged Access"] #[inline(always)] #[must_use] - pub fn iadc0(&mut self) -> IADC0_W<10> { - IADC0_W::new(self) + pub fn iadc0(&mut self) -> Iadc0W { + Iadc0W::new(self, 10) } #[doc = "Bit 11 - ACMP0 Privileged Access"] #[inline(always)] #[must_use] - pub fn acmp0(&mut self) -> ACMP0_W<11> { - ACMP0_W::new(self) + pub fn acmp0(&mut self) -> Acmp0W { + Acmp0W::new(self, 11) } #[doc = "Bit 12 - ACMP1 Privileged Access"] #[inline(always)] #[must_use] - pub fn acmp1(&mut self) -> ACMP1_W<12> { - ACMP1_W::new(self) + pub fn acmp1(&mut self) -> Acmp1W { + Acmp1W::new(self, 12) } #[doc = "Bit 13 - AMUXCP0 Privileged Access"] #[inline(always)] #[must_use] - pub fn amuxcp0(&mut self) -> AMUXCP0_W<13> { - AMUXCP0_W::new(self) + pub fn amuxcp0(&mut self) -> Amuxcp0W { + Amuxcp0W::new(self, 13) } #[doc = "Bit 14 - VDAC0 Privileged Access"] #[inline(always)] #[must_use] - pub fn vdac0(&mut self) -> VDAC0_W<14> { - VDAC0_W::new(self) + pub fn vdac0(&mut self) -> Vdac0W { + Vdac0W::new(self, 14) } #[doc = "Bit 15 - PCNT Privileged Access"] #[inline(always)] #[must_use] - pub fn pcnt(&mut self) -> PCNT_W<15> { - PCNT_W::new(self) + pub fn pcnt(&mut self) -> PcntW { + PcntW::new(self, 15) } #[doc = "Bit 16 - LESENSE Privileged Access"] #[inline(always)] #[must_use] - pub fn lesense(&mut self) -> LESENSE_W<16> { - LESENSE_W::new(self) + pub fn lesense(&mut self) -> LesenseW { + LesenseW::new(self, 16) } #[doc = "Bit 17 - HFRCO1 Privileged Access"] #[inline(always)] #[must_use] - pub fn hfrco1(&mut self) -> HFRCO1_W<17> { - HFRCO1_W::new(self) + pub fn hfrco1(&mut self) -> Hfrco1W { + Hfrco1W::new(self, 17) } #[doc = "Bit 18 - HFXO0 Privileged Access"] #[inline(always)] #[must_use] - pub fn hfxo0(&mut self) -> HFXO0_W<18> { - HFXO0_W::new(self) + pub fn hfxo0(&mut self) -> Hfxo0W { + Hfxo0W::new(self, 18) } #[doc = "Bit 19 - I2C0 Privileged Access"] #[inline(always)] #[must_use] - pub fn i2c0(&mut self) -> I2C0_W<19> { - I2C0_W::new(self) + pub fn i2c0(&mut self) -> I2c0W { + I2c0W::new(self, 19) } #[doc = "Bit 20 - WDOG0 Privileged Access"] #[inline(always)] #[must_use] - pub fn wdog0(&mut self) -> WDOG0_W<20> { - WDOG0_W::new(self) + pub fn wdog0(&mut self) -> Wdog0W { + Wdog0W::new(self, 20) } #[doc = "Bit 21 - WDOG1 Privileged Access"] #[inline(always)] #[must_use] - pub fn wdog1(&mut self) -> WDOG1_W<21> { - WDOG1_W::new(self) + pub fn wdog1(&mut self) -> Wdog1W { + Wdog1W::new(self, 21) } #[doc = "Bit 22 - EUSART0 Privileged Access"] #[inline(always)] #[must_use] - pub fn eusart0(&mut self) -> EUSART0_W<22> { - EUSART0_W::new(self) + pub fn eusart0(&mut self) -> Eusart0W { + Eusart0W::new(self, 22) } #[doc = "Bit 23 - SEMAILBOX Privileged Access"] #[inline(always)] #[must_use] - pub fn semailbox(&mut self) -> SEMAILBOX_W<23> { - SEMAILBOX_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn semailbox(&mut self) -> SemailboxW { + SemailboxW::new(self, 23) } } -#[doc = "Set peripheral bits to 1 to mark as privileged access only\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ppunspatd1](index.html) module"] -pub struct PPUNSPATD1_SPEC; -impl crate::RegisterSpec for PPUNSPATD1_SPEC { +#[doc = "Set peripheral bits to 1 to mark as privileged access only\n\nYou can [`read`](crate::Reg::read) this register and get [`ppunspatd1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ppunspatd1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ppunspatd1Spec; +impl crate::RegisterSpec for Ppunspatd1Spec { type Ux = u32; } -#[doc = "`read()` method returns [ppunspatd1::R](R) reader structure"] -impl crate::Readable for PPUNSPATD1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ppunspatd1::W](W) writer structure"] -impl crate::Writable for PPUNSPATD1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ppunspatd1::R`](R) reader structure"] +impl crate::Readable for Ppunspatd1Spec {} +#[doc = "`write(|w| ..)` method takes [`ppunspatd1::W`](W) writer structure"] +impl crate::Writable for Ppunspatd1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPUNSPATD1 to value 0"] -impl crate::Resettable for PPUNSPATD1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ppunspatd1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s.rs index b3ca308..e8f1950 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s.rs @@ -1,140 +1,268 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + status: Status, + lock: Lock, + if_: If, + ien: Ien, + _reserved5: [u8; 0x0c], + m33ctrl: M33ctrl, + _reserved6: [u8; 0x1c], + ppupatd0: Ppupatd0, + ppupatd1: Ppupatd1, + _reserved8: [u8; 0x18], + ppusatd0: Ppusatd0, + ppusatd1: Ppusatd1, + _reserved10: [u8; 0xd8], + ppufs: Ppufs, + _reserved11: [u8; 0x0c], + bmpupatd0: Bmpupatd0, + _reserved12: [u8; 0x1c], + bmpusatd0: Bmpusatd0, + _reserved13: [u8; 0xdc], + bmpufs: Bmpufs, + bmpufsaddr: Bmpufsaddr, + _reserved15: [u8; 0x08], + esaurtypes0: Esaurtypes0, + esaurtypes1: Esaurtypes1, + _reserved17: [u8; 0x08], + esaumrb01: Esaumrb01, + esaumrb12: Esaumrb12, + _reserved19: [u8; 0x08], + esaumrb45: Esaumrb45, + esaumrb56: Esaumrb56, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x08 - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x0c - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x10 - No Description"] - pub ien: IEN, - _reserved5: [u8; 0x0c], + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x20 - Holds the M33 control settings"] - pub m33ctrl: M33CTRL, - _reserved6: [u8; 0x1c], + #[inline(always)] + pub const fn m33ctrl(&self) -> &M33ctrl { + &self.m33ctrl + } #[doc = "0x40 - Set peripheral bits to 1 to mark as privileged access only"] - pub ppupatd0: PPUPATD0, + #[inline(always)] + pub const fn ppupatd0(&self) -> &Ppupatd0 { + &self.ppupatd0 + } #[doc = "0x44 - Set peripheral bits to 1 to mark as privileged access only"] - pub ppupatd1: PPUPATD1, - _reserved8: [u8; 0x18], + #[inline(always)] + pub const fn ppupatd1(&self) -> &Ppupatd1 { + &self.ppupatd1 + } #[doc = "0x60 - Set peripheral bits to 1 to mark as secure access only"] - pub ppusatd0: PPUSATD0, + #[inline(always)] + pub const fn ppusatd0(&self) -> &Ppusatd0 { + &self.ppusatd0 + } #[doc = "0x64 - Set peripheral bits to 1 to mark as secure access only"] - pub ppusatd1: PPUSATD1, - _reserved10: [u8; 0xd8], + #[inline(always)] + pub const fn ppusatd1(&self) -> &Ppusatd1 { + &self.ppusatd1 + } #[doc = "0x140 - No Description"] - pub ppufs: PPUFS, - _reserved11: [u8; 0x0c], + #[inline(always)] + pub const fn ppufs(&self) -> &Ppufs { + &self.ppufs + } #[doc = "0x150 - Set master bits to 1 to mark as a privileged master"] - pub bmpupatd0: BMPUPATD0, - _reserved12: [u8; 0x1c], + #[inline(always)] + pub const fn bmpupatd0(&self) -> &Bmpupatd0 { + &self.bmpupatd0 + } #[doc = "0x170 - Set master bits to 1 to mark as a secure master"] - pub bmpusatd0: BMPUSATD0, - _reserved13: [u8; 0xdc], + #[inline(always)] + pub const fn bmpusatd0(&self) -> &Bmpusatd0 { + &self.bmpusatd0 + } #[doc = "0x250 - No Description"] - pub bmpufs: BMPUFS, + #[inline(always)] + pub const fn bmpufs(&self) -> &Bmpufs { + &self.bmpufs + } #[doc = "0x254 - No Description"] - pub bmpufsaddr: BMPUFSADDR, - _reserved15: [u8; 0x08], + #[inline(always)] + pub const fn bmpufsaddr(&self) -> &Bmpufsaddr { + &self.bmpufsaddr + } #[doc = "0x260 - No Description"] - pub esaurtypes0: ESAURTYPES0, + #[inline(always)] + pub const fn esaurtypes0(&self) -> &Esaurtypes0 { + &self.esaurtypes0 + } #[doc = "0x264 - No Description"] - pub esaurtypes1: ESAURTYPES1, - _reserved17: [u8; 0x08], + #[inline(always)] + pub const fn esaurtypes1(&self) -> &Esaurtypes1 { + &self.esaurtypes1 + } #[doc = "0x270 - No Description"] - pub esaumrb01: ESAUMRB01, + #[inline(always)] + pub const fn esaumrb01(&self) -> &Esaumrb01 { + &self.esaumrb01 + } #[doc = "0x274 - No Description"] - pub esaumrb12: ESAUMRB12, - _reserved19: [u8; 0x08], + #[inline(always)] + pub const fn esaumrb12(&self) -> &Esaumrb12 { + &self.esaumrb12 + } #[doc = "0x280 - No Description"] - pub esaumrb45: ESAUMRB45, + #[inline(always)] + pub const fn esaumrb45(&self) -> &Esaumrb45 { + &self.esaumrb45 + } #[doc = "0x284 - No Description"] - pub esaumrb56: ESAUMRB56, + #[inline(always)] + pub const fn esaumrb56(&self) -> &Esaumrb56 { + &self.esaumrb56 + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "M33CTRL (rw) register accessor: an alias for `Reg`"] -pub type M33CTRL = crate::Reg; +#[doc = "M33CTRL (rw) register accessor: Holds the M33 control settings\n\nYou can [`read`](crate::Reg::read) this register and get [`m33ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`m33ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@m33ctrl`] +module"] +#[doc(alias = "M33CTRL")] +pub type M33ctrl = crate::Reg; #[doc = "Holds the M33 control settings"] pub mod m33ctrl; -#[doc = "PPUPATD0 (rw) register accessor: an alias for `Reg`"] -pub type PPUPATD0 = crate::Reg; +#[doc = "PPUPATD0 (rw) register accessor: Set peripheral bits to 1 to mark as privileged access only\n\nYou can [`read`](crate::Reg::read) this register and get [`ppupatd0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ppupatd0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ppupatd0`] +module"] +#[doc(alias = "PPUPATD0")] +pub type Ppupatd0 = crate::Reg; #[doc = "Set peripheral bits to 1 to mark as privileged access only"] pub mod ppupatd0; -#[doc = "PPUPATD1 (rw) register accessor: an alias for `Reg`"] -pub type PPUPATD1 = crate::Reg; +#[doc = "PPUPATD1 (rw) register accessor: Set peripheral bits to 1 to mark as privileged access only\n\nYou can [`read`](crate::Reg::read) this register and get [`ppupatd1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ppupatd1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ppupatd1`] +module"] +#[doc(alias = "PPUPATD1")] +pub type Ppupatd1 = crate::Reg; #[doc = "Set peripheral bits to 1 to mark as privileged access only"] pub mod ppupatd1; -#[doc = "PPUSATD0 (rw) register accessor: an alias for `Reg`"] -pub type PPUSATD0 = crate::Reg; +#[doc = "PPUSATD0 (rw) register accessor: Set peripheral bits to 1 to mark as secure access only\n\nYou can [`read`](crate::Reg::read) this register and get [`ppusatd0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ppusatd0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ppusatd0`] +module"] +#[doc(alias = "PPUSATD0")] +pub type Ppusatd0 = crate::Reg; #[doc = "Set peripheral bits to 1 to mark as secure access only"] pub mod ppusatd0; -#[doc = "PPUSATD1 (rw) register accessor: an alias for `Reg`"] -pub type PPUSATD1 = crate::Reg; +#[doc = "PPUSATD1 (rw) register accessor: Set peripheral bits to 1 to mark as secure access only\n\nYou can [`read`](crate::Reg::read) this register and get [`ppusatd1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ppusatd1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ppusatd1`] +module"] +#[doc(alias = "PPUSATD1")] +pub type Ppusatd1 = crate::Reg; #[doc = "Set peripheral bits to 1 to mark as secure access only"] pub mod ppusatd1; -#[doc = "PPUFS (r) register accessor: an alias for `Reg`"] -pub type PPUFS = crate::Reg; +#[doc = "PPUFS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ppufs::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ppufs`] +module"] +#[doc(alias = "PPUFS")] +pub type Ppufs = crate::Reg; #[doc = "No Description"] pub mod ppufs; -#[doc = "BMPUPATD0 (rw) register accessor: an alias for `Reg`"] -pub type BMPUPATD0 = crate::Reg; +#[doc = "BMPUPATD0 (rw) register accessor: Set master bits to 1 to mark as a privileged master\n\nYou can [`read`](crate::Reg::read) this register and get [`bmpupatd0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bmpupatd0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bmpupatd0`] +module"] +#[doc(alias = "BMPUPATD0")] +pub type Bmpupatd0 = crate::Reg; #[doc = "Set master bits to 1 to mark as a privileged master"] pub mod bmpupatd0; -#[doc = "BMPUSATD0 (rw) register accessor: an alias for `Reg`"] -pub type BMPUSATD0 = crate::Reg; +#[doc = "BMPUSATD0 (rw) register accessor: Set master bits to 1 to mark as a secure master\n\nYou can [`read`](crate::Reg::read) this register and get [`bmpusatd0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bmpusatd0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bmpusatd0`] +module"] +#[doc(alias = "BMPUSATD0")] +pub type Bmpusatd0 = crate::Reg; #[doc = "Set master bits to 1 to mark as a secure master"] pub mod bmpusatd0; -#[doc = "BMPUFS (r) register accessor: an alias for `Reg`"] -pub type BMPUFS = crate::Reg; +#[doc = "BMPUFS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bmpufs::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bmpufs`] +module"] +#[doc(alias = "BMPUFS")] +pub type Bmpufs = crate::Reg; #[doc = "No Description"] pub mod bmpufs; -#[doc = "BMPUFSADDR (r) register accessor: an alias for `Reg`"] -pub type BMPUFSADDR = crate::Reg; +#[doc = "BMPUFSADDR (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bmpufsaddr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bmpufsaddr`] +module"] +#[doc(alias = "BMPUFSADDR")] +pub type Bmpufsaddr = crate::Reg; #[doc = "No Description"] pub mod bmpufsaddr; -#[doc = "ESAURTYPES0 (rw) register accessor: an alias for `Reg`"] -pub type ESAURTYPES0 = crate::Reg; +#[doc = "ESAURTYPES0 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`esaurtypes0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`esaurtypes0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@esaurtypes0`] +module"] +#[doc(alias = "ESAURTYPES0")] +pub type Esaurtypes0 = crate::Reg; #[doc = "No Description"] pub mod esaurtypes0; -#[doc = "ESAURTYPES1 (rw) register accessor: an alias for `Reg`"] -pub type ESAURTYPES1 = crate::Reg; +#[doc = "ESAURTYPES1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`esaurtypes1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`esaurtypes1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@esaurtypes1`] +module"] +#[doc(alias = "ESAURTYPES1")] +pub type Esaurtypes1 = crate::Reg; #[doc = "No Description"] pub mod esaurtypes1; -#[doc = "ESAUMRB01 (rw) register accessor: an alias for `Reg`"] -pub type ESAUMRB01 = crate::Reg; +#[doc = "ESAUMRB01 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`esaumrb01::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`esaumrb01::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@esaumrb01`] +module"] +#[doc(alias = "ESAUMRB01")] +pub type Esaumrb01 = crate::Reg; #[doc = "No Description"] pub mod esaumrb01; -#[doc = "ESAUMRB12 (rw) register accessor: an alias for `Reg`"] -pub type ESAUMRB12 = crate::Reg; +#[doc = "ESAUMRB12 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`esaumrb12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`esaumrb12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@esaumrb12`] +module"] +#[doc(alias = "ESAUMRB12")] +pub type Esaumrb12 = crate::Reg; #[doc = "No Description"] pub mod esaumrb12; -#[doc = "ESAUMRB45 (rw) register accessor: an alias for `Reg`"] -pub type ESAUMRB45 = crate::Reg; +#[doc = "ESAUMRB45 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`esaumrb45::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`esaumrb45::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@esaumrb45`] +module"] +#[doc(alias = "ESAUMRB45")] +pub type Esaumrb45 = crate::Reg; #[doc = "No Description"] pub mod esaumrb45; -#[doc = "ESAUMRB56 (rw) register accessor: an alias for `Reg`"] -pub type ESAUMRB56 = crate::Reg; +#[doc = "ESAUMRB56 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`esaumrb56::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`esaumrb56::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@esaumrb56`] +module"] +#[doc(alias = "ESAUMRB56")] +pub type Esaumrb56 = crate::Reg; #[doc = "No Description"] pub mod esaumrb56; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/bmpufs.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/bmpufs.rs index 2259250..876bb3a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/bmpufs.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/bmpufs.rs @@ -1,37 +1,22 @@ #[doc = "Register `BMPUFS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `BMPUFSMASTERID` reader - Bus Manager ID"] -pub type BMPUFSMASTERID_R = crate::FieldReader; +pub type BmpufsmasteridR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Bus Manager ID"] #[inline(always)] - pub fn bmpufsmasterid(&self) -> BMPUFSMASTERID_R { - BMPUFSMASTERID_R::new((self.bits & 0xff) as u8) + pub fn bmpufsmasterid(&self) -> BmpufsmasteridR { + BmpufsmasteridR::new((self.bits & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bmpufs](index.html) module"] -pub struct BMPUFS_SPEC; -impl crate::RegisterSpec for BMPUFS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bmpufs::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct BmpufsSpec; +impl crate::RegisterSpec for BmpufsSpec { type Ux = u32; } -#[doc = "`read()` method returns [bmpufs::R](R) reader structure"] -impl crate::Readable for BMPUFS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`bmpufs::R`](R) reader structure"] +impl crate::Readable for BmpufsSpec {} #[doc = "`reset()` method sets BMPUFS to value 0"] -impl crate::Resettable for BMPUFS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for BmpufsSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/bmpufsaddr.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/bmpufsaddr.rs index b9f40fe..663623c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/bmpufsaddr.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/bmpufsaddr.rs @@ -1,37 +1,22 @@ #[doc = "Register `BMPUFSADDR` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `BMPUFSADDR` reader - Fault Address"] -pub type BMPUFSADDR_R = crate::FieldReader; +pub type BmpufsaddrR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Fault Address"] #[inline(always)] - pub fn bmpufsaddr(&self) -> BMPUFSADDR_R { - BMPUFSADDR_R::new(self.bits) + pub fn bmpufsaddr(&self) -> BmpufsaddrR { + BmpufsaddrR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bmpufsaddr](index.html) module"] -pub struct BMPUFSADDR_SPEC; -impl crate::RegisterSpec for BMPUFSADDR_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bmpufsaddr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct BmpufsaddrSpec; +impl crate::RegisterSpec for BmpufsaddrSpec { type Ux = u32; } -#[doc = "`read()` method returns [bmpufsaddr::R](R) reader structure"] -impl crate::Readable for BMPUFSADDR_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`bmpufsaddr::R`](R) reader structure"] +impl crate::Readable for BmpufsaddrSpec {} #[doc = "`reset()` method sets BMPUFSADDR to value 0"] -impl crate::Resettable for BMPUFSADDR_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for BmpufsaddrSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/bmpupatd0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/bmpupatd0.rs index bd4f01a..a1c3895 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/bmpupatd0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/bmpupatd0.rs @@ -1,95 +1,55 @@ #[doc = "Register `BMPUPATD0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `BMPUPATD0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LDMA` reader - MCU LDMA privileged mode"] -pub type LDMA_R = crate::BitReader; +pub type LdmaR = crate::BitReader; #[doc = "Field `LDMA` writer - MCU LDMA privileged mode"] -pub type LDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, BMPUPATD0_SPEC, bool, O>; +pub type LdmaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SEEXTDMA` reader - SEEXTDMA privileged mode"] -pub type SEEXTDMA_R = crate::BitReader; +pub type SeextdmaR = crate::BitReader; #[doc = "Field `SEEXTDMA` writer - SEEXTDMA privileged mode"] -pub type SEEXTDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, BMPUPATD0_SPEC, bool, O>; +pub type SeextdmaW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 2 - MCU LDMA privileged mode"] #[inline(always)] - pub fn ldma(&self) -> LDMA_R { - LDMA_R::new(((self.bits >> 2) & 1) != 0) + pub fn ldma(&self) -> LdmaR { + LdmaR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 5 - SEEXTDMA privileged mode"] #[inline(always)] - pub fn seextdma(&self) -> SEEXTDMA_R { - SEEXTDMA_R::new(((self.bits >> 5) & 1) != 0) + pub fn seextdma(&self) -> SeextdmaR { + SeextdmaR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 2 - MCU LDMA privileged mode"] #[inline(always)] #[must_use] - pub fn ldma(&mut self) -> LDMA_W<2> { - LDMA_W::new(self) + pub fn ldma(&mut self) -> LdmaW { + LdmaW::new(self, 2) } #[doc = "Bit 5 - SEEXTDMA privileged mode"] #[inline(always)] #[must_use] - pub fn seextdma(&mut self) -> SEEXTDMA_W<5> { - SEEXTDMA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn seextdma(&mut self) -> SeextdmaW { + SeextdmaW::new(self, 5) } } -#[doc = "Set master bits to 1 to mark as a privileged master\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bmpupatd0](index.html) module"] -pub struct BMPUPATD0_SPEC; -impl crate::RegisterSpec for BMPUPATD0_SPEC { +#[doc = "Set master bits to 1 to mark as a privileged master\n\nYou can [`read`](crate::Reg::read) this register and get [`bmpupatd0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bmpupatd0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Bmpupatd0Spec; +impl crate::RegisterSpec for Bmpupatd0Spec { type Ux = u32; } -#[doc = "`read()` method returns [bmpupatd0::R](R) reader structure"] -impl crate::Readable for BMPUPATD0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [bmpupatd0::W](W) writer structure"] -impl crate::Writable for BMPUPATD0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`bmpupatd0::R`](R) reader structure"] +impl crate::Readable for Bmpupatd0Spec {} +#[doc = "`write(|w| ..)` method takes [`bmpupatd0::W`](W) writer structure"] +impl crate::Writable for Bmpupatd0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BMPUPATD0 to value 0x3f"] -impl crate::Resettable for BMPUPATD0_SPEC { - const RESET_VALUE: Self::Ux = 0x3f; +impl crate::Resettable for Bmpupatd0Spec { + const RESET_VALUE: u32 = 0x3f; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/bmpusatd0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/bmpusatd0.rs index 0639f64..680ffa1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/bmpusatd0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/bmpusatd0.rs @@ -1,95 +1,55 @@ #[doc = "Register `BMPUSATD0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `BMPUSATD0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LDMA` reader - MCU LDMA secure mode"] -pub type LDMA_R = crate::BitReader; +pub type LdmaR = crate::BitReader; #[doc = "Field `LDMA` writer - MCU LDMA secure mode"] -pub type LDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, BMPUSATD0_SPEC, bool, O>; +pub type LdmaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SEEXTDMA` reader - SEEXTDMA secure mode"] -pub type SEEXTDMA_R = crate::BitReader; +pub type SeextdmaR = crate::BitReader; #[doc = "Field `SEEXTDMA` writer - SEEXTDMA secure mode"] -pub type SEEXTDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, BMPUSATD0_SPEC, bool, O>; +pub type SeextdmaW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 2 - MCU LDMA secure mode"] #[inline(always)] - pub fn ldma(&self) -> LDMA_R { - LDMA_R::new(((self.bits >> 2) & 1) != 0) + pub fn ldma(&self) -> LdmaR { + LdmaR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 5 - SEEXTDMA secure mode"] #[inline(always)] - pub fn seextdma(&self) -> SEEXTDMA_R { - SEEXTDMA_R::new(((self.bits >> 5) & 1) != 0) + pub fn seextdma(&self) -> SeextdmaR { + SeextdmaR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 2 - MCU LDMA secure mode"] #[inline(always)] #[must_use] - pub fn ldma(&mut self) -> LDMA_W<2> { - LDMA_W::new(self) + pub fn ldma(&mut self) -> LdmaW { + LdmaW::new(self, 2) } #[doc = "Bit 5 - SEEXTDMA secure mode"] #[inline(always)] #[must_use] - pub fn seextdma(&mut self) -> SEEXTDMA_W<5> { - SEEXTDMA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn seextdma(&mut self) -> SeextdmaW { + SeextdmaW::new(self, 5) } } -#[doc = "Set master bits to 1 to mark as a secure master\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bmpusatd0](index.html) module"] -pub struct BMPUSATD0_SPEC; -impl crate::RegisterSpec for BMPUSATD0_SPEC { +#[doc = "Set master bits to 1 to mark as a secure master\n\nYou can [`read`](crate::Reg::read) this register and get [`bmpusatd0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bmpusatd0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Bmpusatd0Spec; +impl crate::RegisterSpec for Bmpusatd0Spec { type Ux = u32; } -#[doc = "`read()` method returns [bmpusatd0::R](R) reader structure"] -impl crate::Readable for BMPUSATD0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [bmpusatd0::W](W) writer structure"] -impl crate::Writable for BMPUSATD0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`bmpusatd0::R`](R) reader structure"] +impl crate::Readable for Bmpusatd0Spec {} +#[doc = "`write(|w| ..)` method takes [`bmpusatd0::W`](W) writer structure"] +impl crate::Writable for Bmpusatd0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BMPUSATD0 to value 0x3f"] -impl crate::Resettable for BMPUSATD0_SPEC { - const RESET_VALUE: Self::Ux = 0x3f; +impl crate::Resettable for Bmpusatd0Spec { + const RESET_VALUE: u32 = 0x3f; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/esaumrb01.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/esaumrb01.rs index e7111ac..1f0656e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/esaumrb01.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/esaumrb01.rs @@ -1,81 +1,40 @@ #[doc = "Register `ESAUMRB01` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ESAUMRB01` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ESAUMRB01` reader - Moveable Region Boundary"] -pub type ESAUMRB01_R = crate::FieldReader; +pub type Esaumrb01R = crate::FieldReader; #[doc = "Field `ESAUMRB01` writer - Moveable Region Boundary"] -pub type ESAUMRB01_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ESAUMRB01_SPEC, u16, u16, 16, O>; +pub type Esaumrb01W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 12:27 - Moveable Region Boundary"] #[inline(always)] - pub fn esaumrb01(&self) -> ESAUMRB01_R { - ESAUMRB01_R::new(((self.bits >> 12) & 0xffff) as u16) + pub fn esaumrb01(&self) -> Esaumrb01R { + Esaumrb01R::new(((self.bits >> 12) & 0xffff) as u16) } } impl W { #[doc = "Bits 12:27 - Moveable Region Boundary"] #[inline(always)] #[must_use] - pub fn esaumrb01(&mut self) -> ESAUMRB01_W<12> { - ESAUMRB01_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn esaumrb01(&mut self) -> Esaumrb01W { + Esaumrb01W::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [esaumrb01](index.html) module"] -pub struct ESAUMRB01_SPEC; -impl crate::RegisterSpec for ESAUMRB01_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`esaumrb01::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`esaumrb01::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Esaumrb01Spec; +impl crate::RegisterSpec for Esaumrb01Spec { type Ux = u32; } -#[doc = "`read()` method returns [esaumrb01::R](R) reader structure"] -impl crate::Readable for ESAUMRB01_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [esaumrb01::W](W) writer structure"] -impl crate::Writable for ESAUMRB01_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`esaumrb01::R`](R) reader structure"] +impl crate::Readable for Esaumrb01Spec {} +#[doc = "`write(|w| ..)` method takes [`esaumrb01::W`](W) writer structure"] +impl crate::Writable for Esaumrb01Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ESAUMRB01 to value 0x0a00_0000"] -impl crate::Resettable for ESAUMRB01_SPEC { - const RESET_VALUE: Self::Ux = 0x0a00_0000; +impl crate::Resettable for Esaumrb01Spec { + const RESET_VALUE: u32 = 0x0a00_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/esaumrb12.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/esaumrb12.rs index 43de56f..7a0f730 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/esaumrb12.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/esaumrb12.rs @@ -1,81 +1,40 @@ #[doc = "Register `ESAUMRB12` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ESAUMRB12` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ESAUMRB12` reader - Moveable Region Boundary"] -pub type ESAUMRB12_R = crate::FieldReader; +pub type Esaumrb12R = crate::FieldReader; #[doc = "Field `ESAUMRB12` writer - Moveable Region Boundary"] -pub type ESAUMRB12_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ESAUMRB12_SPEC, u16, u16, 16, O>; +pub type Esaumrb12W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 12:27 - Moveable Region Boundary"] #[inline(always)] - pub fn esaumrb12(&self) -> ESAUMRB12_R { - ESAUMRB12_R::new(((self.bits >> 12) & 0xffff) as u16) + pub fn esaumrb12(&self) -> Esaumrb12R { + Esaumrb12R::new(((self.bits >> 12) & 0xffff) as u16) } } impl W { #[doc = "Bits 12:27 - Moveable Region Boundary"] #[inline(always)] #[must_use] - pub fn esaumrb12(&mut self) -> ESAUMRB12_W<12> { - ESAUMRB12_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn esaumrb12(&mut self) -> Esaumrb12W { + Esaumrb12W::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [esaumrb12](index.html) module"] -pub struct ESAUMRB12_SPEC; -impl crate::RegisterSpec for ESAUMRB12_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`esaumrb12::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`esaumrb12::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Esaumrb12Spec; +impl crate::RegisterSpec for Esaumrb12Spec { type Ux = u32; } -#[doc = "`read()` method returns [esaumrb12::R](R) reader structure"] -impl crate::Readable for ESAUMRB12_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [esaumrb12::W](W) writer structure"] -impl crate::Writable for ESAUMRB12_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`esaumrb12::R`](R) reader structure"] +impl crate::Readable for Esaumrb12Spec {} +#[doc = "`write(|w| ..)` method takes [`esaumrb12::W`](W) writer structure"] +impl crate::Writable for Esaumrb12Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ESAUMRB12 to value 0x0c00_0000"] -impl crate::Resettable for ESAUMRB12_SPEC { - const RESET_VALUE: Self::Ux = 0x0c00_0000; +impl crate::Resettable for Esaumrb12Spec { + const RESET_VALUE: u32 = 0x0c00_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/esaumrb45.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/esaumrb45.rs index eff5303..7784d42 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/esaumrb45.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/esaumrb45.rs @@ -1,81 +1,40 @@ #[doc = "Register `ESAUMRB45` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ESAUMRB45` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ESAUMRB45` reader - Moveable Region Boundary"] -pub type ESAUMRB45_R = crate::FieldReader; +pub type Esaumrb45R = crate::FieldReader; #[doc = "Field `ESAUMRB45` writer - Moveable Region Boundary"] -pub type ESAUMRB45_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ESAUMRB45_SPEC, u16, u16, 16, O>; +pub type Esaumrb45W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 12:27 - Moveable Region Boundary"] #[inline(always)] - pub fn esaumrb45(&self) -> ESAUMRB45_R { - ESAUMRB45_R::new(((self.bits >> 12) & 0xffff) as u16) + pub fn esaumrb45(&self) -> Esaumrb45R { + Esaumrb45R::new(((self.bits >> 12) & 0xffff) as u16) } } impl W { #[doc = "Bits 12:27 - Moveable Region Boundary"] #[inline(always)] #[must_use] - pub fn esaumrb45(&mut self) -> ESAUMRB45_W<12> { - ESAUMRB45_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn esaumrb45(&mut self) -> Esaumrb45W { + Esaumrb45W::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [esaumrb45](index.html) module"] -pub struct ESAUMRB45_SPEC; -impl crate::RegisterSpec for ESAUMRB45_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`esaumrb45::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`esaumrb45::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Esaumrb45Spec; +impl crate::RegisterSpec for Esaumrb45Spec { type Ux = u32; } -#[doc = "`read()` method returns [esaumrb45::R](R) reader structure"] -impl crate::Readable for ESAUMRB45_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [esaumrb45::W](W) writer structure"] -impl crate::Writable for ESAUMRB45_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`esaumrb45::R`](R) reader structure"] +impl crate::Readable for Esaumrb45Spec {} +#[doc = "`write(|w| ..)` method takes [`esaumrb45::W`](W) writer structure"] +impl crate::Writable for Esaumrb45Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ESAUMRB45 to value 0x0200_0000"] -impl crate::Resettable for ESAUMRB45_SPEC { - const RESET_VALUE: Self::Ux = 0x0200_0000; +impl crate::Resettable for Esaumrb45Spec { + const RESET_VALUE: u32 = 0x0200_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/esaumrb56.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/esaumrb56.rs index 2b55649..5588918 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/esaumrb56.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/esaumrb56.rs @@ -1,81 +1,40 @@ #[doc = "Register `ESAUMRB56` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ESAUMRB56` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ESAUMRB56` reader - Moveable Region Boundary"] -pub type ESAUMRB56_R = crate::FieldReader; +pub type Esaumrb56R = crate::FieldReader; #[doc = "Field `ESAUMRB56` writer - Moveable Region Boundary"] -pub type ESAUMRB56_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ESAUMRB56_SPEC, u16, u16, 16, O>; +pub type Esaumrb56W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 12:27 - Moveable Region Boundary"] #[inline(always)] - pub fn esaumrb56(&self) -> ESAUMRB56_R { - ESAUMRB56_R::new(((self.bits >> 12) & 0xffff) as u16) + pub fn esaumrb56(&self) -> Esaumrb56R { + Esaumrb56R::new(((self.bits >> 12) & 0xffff) as u16) } } impl W { #[doc = "Bits 12:27 - Moveable Region Boundary"] #[inline(always)] #[must_use] - pub fn esaumrb56(&mut self) -> ESAUMRB56_W<12> { - ESAUMRB56_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn esaumrb56(&mut self) -> Esaumrb56W { + Esaumrb56W::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [esaumrb56](index.html) module"] -pub struct ESAUMRB56_SPEC; -impl crate::RegisterSpec for ESAUMRB56_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`esaumrb56::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`esaumrb56::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Esaumrb56Spec; +impl crate::RegisterSpec for Esaumrb56Spec { type Ux = u32; } -#[doc = "`read()` method returns [esaumrb56::R](R) reader structure"] -impl crate::Readable for ESAUMRB56_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [esaumrb56::W](W) writer structure"] -impl crate::Writable for ESAUMRB56_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`esaumrb56::R`](R) reader structure"] +impl crate::Readable for Esaumrb56Spec {} +#[doc = "`write(|w| ..)` method takes [`esaumrb56::W`](W) writer structure"] +impl crate::Writable for Esaumrb56Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ESAUMRB56 to value 0x0400_0000"] -impl crate::Resettable for ESAUMRB56_SPEC { - const RESET_VALUE: Self::Ux = 0x0400_0000; +impl crate::Resettable for Esaumrb56Spec { + const RESET_VALUE: u32 = 0x0400_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/esaurtypes0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/esaurtypes0.rs index 34b515f..ea9c88e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/esaurtypes0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/esaurtypes0.rs @@ -1,80 +1,40 @@ #[doc = "Register `ESAURTYPES0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ESAURTYPES0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ESAUR3NS` reader - Region 3 Non-Secure"] -pub type ESAUR3NS_R = crate::BitReader; +pub type Esaur3nsR = crate::BitReader; #[doc = "Field `ESAUR3NS` writer - Region 3 Non-Secure"] -pub type ESAUR3NS_W<'a, const O: u8> = crate::BitWriter<'a, u32, ESAURTYPES0_SPEC, bool, O>; +pub type Esaur3nsW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 12 - Region 3 Non-Secure"] #[inline(always)] - pub fn esaur3ns(&self) -> ESAUR3NS_R { - ESAUR3NS_R::new(((self.bits >> 12) & 1) != 0) + pub fn esaur3ns(&self) -> Esaur3nsR { + Esaur3nsR::new(((self.bits >> 12) & 1) != 0) } } impl W { #[doc = "Bit 12 - Region 3 Non-Secure"] #[inline(always)] #[must_use] - pub fn esaur3ns(&mut self) -> ESAUR3NS_W<12> { - ESAUR3NS_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn esaur3ns(&mut self) -> Esaur3nsW { + Esaur3nsW::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [esaurtypes0](index.html) module"] -pub struct ESAURTYPES0_SPEC; -impl crate::RegisterSpec for ESAURTYPES0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`esaurtypes0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`esaurtypes0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Esaurtypes0Spec; +impl crate::RegisterSpec for Esaurtypes0Spec { type Ux = u32; } -#[doc = "`read()` method returns [esaurtypes0::R](R) reader structure"] -impl crate::Readable for ESAURTYPES0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [esaurtypes0::W](W) writer structure"] -impl crate::Writable for ESAURTYPES0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`esaurtypes0::R`](R) reader structure"] +impl crate::Readable for Esaurtypes0Spec {} +#[doc = "`write(|w| ..)` method takes [`esaurtypes0::W`](W) writer structure"] +impl crate::Writable for Esaurtypes0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ESAURTYPES0 to value 0"] -impl crate::Resettable for ESAURTYPES0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Esaurtypes0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/esaurtypes1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/esaurtypes1.rs index 8abfe0e..fb10c3c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/esaurtypes1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/esaurtypes1.rs @@ -1,80 +1,40 @@ #[doc = "Register `ESAURTYPES1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ESAURTYPES1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ESAUR11NS` reader - Region 11 Non-Secure"] -pub type ESAUR11NS_R = crate::BitReader; +pub type Esaur11nsR = crate::BitReader; #[doc = "Field `ESAUR11NS` writer - Region 11 Non-Secure"] -pub type ESAUR11NS_W<'a, const O: u8> = crate::BitWriter<'a, u32, ESAURTYPES1_SPEC, bool, O>; +pub type Esaur11nsW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 12 - Region 11 Non-Secure"] #[inline(always)] - pub fn esaur11ns(&self) -> ESAUR11NS_R { - ESAUR11NS_R::new(((self.bits >> 12) & 1) != 0) + pub fn esaur11ns(&self) -> Esaur11nsR { + Esaur11nsR::new(((self.bits >> 12) & 1) != 0) } } impl W { #[doc = "Bit 12 - Region 11 Non-Secure"] #[inline(always)] #[must_use] - pub fn esaur11ns(&mut self) -> ESAUR11NS_W<12> { - ESAUR11NS_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn esaur11ns(&mut self) -> Esaur11nsW { + Esaur11nsW::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [esaurtypes1](index.html) module"] -pub struct ESAURTYPES1_SPEC; -impl crate::RegisterSpec for ESAURTYPES1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`esaurtypes1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`esaurtypes1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Esaurtypes1Spec; +impl crate::RegisterSpec for Esaurtypes1Spec { type Ux = u32; } -#[doc = "`read()` method returns [esaurtypes1::R](R) reader structure"] -impl crate::Readable for ESAURTYPES1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [esaurtypes1::W](W) writer structure"] -impl crate::Writable for ESAURTYPES1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`esaurtypes1::R`](R) reader structure"] +impl crate::Readable for Esaurtypes1Spec {} +#[doc = "`write(|w| ..)` method takes [`esaurtypes1::W`](W) writer structure"] +impl crate::Writable for Esaurtypes1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ESAURTYPES1 to value 0"] -impl crate::Resettable for ESAURTYPES1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Esaurtypes1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ien.rs index 90d2e3e..d3f09e1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ien.rs @@ -1,125 +1,85 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PPUPRIV` reader - PPU Privilege Interrupt Enable"] -pub type PPUPRIV_R = crate::BitReader; +pub type PpuprivR = crate::BitReader; #[doc = "Field `PPUPRIV` writer - PPU Privilege Interrupt Enable"] -pub type PPUPRIV_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PpuprivW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PPUINST` reader - PPU Instruction Interrupt Enable"] -pub type PPUINST_R = crate::BitReader; +pub type PpuinstR = crate::BitReader; #[doc = "Field `PPUINST` writer - PPU Instruction Interrupt Enable"] -pub type PPUINST_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PpuinstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PPUSEC` reader - PPU Security Interrupt Enable"] -pub type PPUSEC_R = crate::BitReader; +pub type PpusecR = crate::BitReader; #[doc = "Field `PPUSEC` writer - PPU Security Interrupt Enable"] -pub type PPUSEC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PpusecW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BMPUSEC` reader - BMPU Security Interrupt Enable"] -pub type BMPUSEC_R = crate::BitReader; +pub type BmpusecR = crate::BitReader; #[doc = "Field `BMPUSEC` writer - BMPU Security Interrupt Enable"] -pub type BMPUSEC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type BmpusecW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - PPU Privilege Interrupt Enable"] #[inline(always)] - pub fn ppupriv(&self) -> PPUPRIV_R { - PPUPRIV_R::new((self.bits & 1) != 0) + pub fn ppupriv(&self) -> PpuprivR { + PpuprivR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - PPU Instruction Interrupt Enable"] #[inline(always)] - pub fn ppuinst(&self) -> PPUINST_R { - PPUINST_R::new(((self.bits >> 2) & 1) != 0) + pub fn ppuinst(&self) -> PpuinstR { + PpuinstR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 16 - PPU Security Interrupt Enable"] #[inline(always)] - pub fn ppusec(&self) -> PPUSEC_R { - PPUSEC_R::new(((self.bits >> 16) & 1) != 0) + pub fn ppusec(&self) -> PpusecR { + PpusecR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - BMPU Security Interrupt Enable"] #[inline(always)] - pub fn bmpusec(&self) -> BMPUSEC_R { - BMPUSEC_R::new(((self.bits >> 17) & 1) != 0) + pub fn bmpusec(&self) -> BmpusecR { + BmpusecR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bit 0 - PPU Privilege Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ppupriv(&mut self) -> PPUPRIV_W<0> { - PPUPRIV_W::new(self) + pub fn ppupriv(&mut self) -> PpuprivW { + PpuprivW::new(self, 0) } #[doc = "Bit 2 - PPU Instruction Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ppuinst(&mut self) -> PPUINST_W<2> { - PPUINST_W::new(self) + pub fn ppuinst(&mut self) -> PpuinstW { + PpuinstW::new(self, 2) } #[doc = "Bit 16 - PPU Security Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ppusec(&mut self) -> PPUSEC_W<16> { - PPUSEC_W::new(self) + pub fn ppusec(&mut self) -> PpusecW { + PpusecW::new(self, 16) } #[doc = "Bit 17 - BMPU Security Interrupt Enable"] #[inline(always)] #[must_use] - pub fn bmpusec(&mut self) -> BMPUSEC_W<17> { - BMPUSEC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn bmpusec(&mut self) -> BmpusecW { + BmpusecW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/if_.rs index 38a2619..51a5d45 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/if_.rs @@ -1,125 +1,85 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PPUPRIV` reader - PPU Privilege Interrupt Flag"] -pub type PPUPRIV_R = crate::BitReader; +pub type PpuprivR = crate::BitReader; #[doc = "Field `PPUPRIV` writer - PPU Privilege Interrupt Flag"] -pub type PPUPRIV_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PpuprivW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PPUINST` reader - PPU Instruction Interrupt Flag"] -pub type PPUINST_R = crate::BitReader; +pub type PpuinstR = crate::BitReader; #[doc = "Field `PPUINST` writer - PPU Instruction Interrupt Flag"] -pub type PPUINST_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PpuinstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PPUSEC` reader - PPU Security Interrupt Flag"] -pub type PPUSEC_R = crate::BitReader; +pub type PpusecR = crate::BitReader; #[doc = "Field `PPUSEC` writer - PPU Security Interrupt Flag"] -pub type PPUSEC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PpusecW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BMPUSEC` reader - BMPU Security Interrupt Flag"] -pub type BMPUSEC_R = crate::BitReader; +pub type BmpusecR = crate::BitReader; #[doc = "Field `BMPUSEC` writer - BMPU Security Interrupt Flag"] -pub type BMPUSEC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type BmpusecW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - PPU Privilege Interrupt Flag"] #[inline(always)] - pub fn ppupriv(&self) -> PPUPRIV_R { - PPUPRIV_R::new((self.bits & 1) != 0) + pub fn ppupriv(&self) -> PpuprivR { + PpuprivR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - PPU Instruction Interrupt Flag"] #[inline(always)] - pub fn ppuinst(&self) -> PPUINST_R { - PPUINST_R::new(((self.bits >> 2) & 1) != 0) + pub fn ppuinst(&self) -> PpuinstR { + PpuinstR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 16 - PPU Security Interrupt Flag"] #[inline(always)] - pub fn ppusec(&self) -> PPUSEC_R { - PPUSEC_R::new(((self.bits >> 16) & 1) != 0) + pub fn ppusec(&self) -> PpusecR { + PpusecR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - BMPU Security Interrupt Flag"] #[inline(always)] - pub fn bmpusec(&self) -> BMPUSEC_R { - BMPUSEC_R::new(((self.bits >> 17) & 1) != 0) + pub fn bmpusec(&self) -> BmpusecR { + BmpusecR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bit 0 - PPU Privilege Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ppupriv(&mut self) -> PPUPRIV_W<0> { - PPUPRIV_W::new(self) + pub fn ppupriv(&mut self) -> PpuprivW { + PpuprivW::new(self, 0) } #[doc = "Bit 2 - PPU Instruction Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ppuinst(&mut self) -> PPUINST_W<2> { - PPUINST_W::new(self) + pub fn ppuinst(&mut self) -> PpuinstW { + PpuinstW::new(self, 2) } #[doc = "Bit 16 - PPU Security Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ppusec(&mut self) -> PPUSEC_W<16> { - PPUSEC_W::new(self) + pub fn ppusec(&mut self) -> PpusecW { + PpusecW::new(self, 16) } #[doc = "Bit 17 - BMPU Security Interrupt Flag"] #[inline(always)] #[must_use] - pub fn bmpusec(&mut self) -> BMPUSEC_W<17> { - BMPUSEC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn bmpusec(&mut self) -> BmpusecW { + BmpusecW::new(self, 17) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ipversion.rs index 5a9852f..568e909 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x02"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/lock.rs index f1fb4d1..a780ac2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "No Description\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum SMULOCKKEY_AW { +pub enum Smulockkey { #[doc = "11325013: Unlocks Registers"] - UNLOCK = 11325013, + Unlock = 11325013, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: SMULOCKKEY_AW) -> Self { + fn from(variant: Smulockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Smulockkey { + type Ux = u32; +} +impl crate::IsEnum for Smulockkey {} #[doc = "Field `SMULOCKKEY` writer - No Description"] -pub type SMULOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u32, SMULOCKKEY_AW, 24, O>; -impl<'a, const O: u8> SMULOCKKEY_W<'a, O> { +pub type SmulockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 24, Smulockkey>; +impl<'a, REG> SmulockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Unlocks Registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(SMULOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Smulockkey::Unlock) } } impl W { #[doc = "Bits 0:23 - No Description"] #[inline(always)] #[must_use] - pub fn smulockkey(&mut self) -> SMULOCKKEY_W<0> { - SMULOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn smulockkey(&mut self) -> SmulockkeyW { + SmulockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/m33ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/m33ctrl.rs index d7d3031..6771bf2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/m33ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/m33ctrl.rs @@ -1,140 +1,100 @@ #[doc = "Register `M33CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `M33CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LOCKSVTAIRCR` reader - New BitField"] -pub type LOCKSVTAIRCR_R = crate::BitReader; +pub type LocksvtaircrR = crate::BitReader; #[doc = "Field `LOCKSVTAIRCR` writer - New BitField"] -pub type LOCKSVTAIRCR_W<'a, const O: u8> = crate::BitWriter<'a, u32, M33CTRL_SPEC, bool, O>; +pub type LocksvtaircrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOCKNSVTOR` reader - New BitField"] -pub type LOCKNSVTOR_R = crate::BitReader; +pub type LocknsvtorR = crate::BitReader; #[doc = "Field `LOCKNSVTOR` writer - New BitField"] -pub type LOCKNSVTOR_W<'a, const O: u8> = crate::BitWriter<'a, u32, M33CTRL_SPEC, bool, O>; +pub type LocknsvtorW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOCKSMPU` reader - New BitField"] -pub type LOCKSMPU_R = crate::BitReader; +pub type LocksmpuR = crate::BitReader; #[doc = "Field `LOCKSMPU` writer - New BitField"] -pub type LOCKSMPU_W<'a, const O: u8> = crate::BitWriter<'a, u32, M33CTRL_SPEC, bool, O>; +pub type LocksmpuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOCKNSMPU` reader - New BitField"] -pub type LOCKNSMPU_R = crate::BitReader; +pub type LocknsmpuR = crate::BitReader; #[doc = "Field `LOCKNSMPU` writer - New BitField"] -pub type LOCKNSMPU_W<'a, const O: u8> = crate::BitWriter<'a, u32, M33CTRL_SPEC, bool, O>; +pub type LocknsmpuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOCKSAU` reader - New BitField"] -pub type LOCKSAU_R = crate::BitReader; +pub type LocksauR = crate::BitReader; #[doc = "Field `LOCKSAU` writer - New BitField"] -pub type LOCKSAU_W<'a, const O: u8> = crate::BitWriter<'a, u32, M33CTRL_SPEC, bool, O>; +pub type LocksauW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - New BitField"] #[inline(always)] - pub fn locksvtaircr(&self) -> LOCKSVTAIRCR_R { - LOCKSVTAIRCR_R::new((self.bits & 1) != 0) + pub fn locksvtaircr(&self) -> LocksvtaircrR { + LocksvtaircrR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - New BitField"] #[inline(always)] - pub fn locknsvtor(&self) -> LOCKNSVTOR_R { - LOCKNSVTOR_R::new(((self.bits >> 1) & 1) != 0) + pub fn locknsvtor(&self) -> LocknsvtorR { + LocknsvtorR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - New BitField"] #[inline(always)] - pub fn locksmpu(&self) -> LOCKSMPU_R { - LOCKSMPU_R::new(((self.bits >> 2) & 1) != 0) + pub fn locksmpu(&self) -> LocksmpuR { + LocksmpuR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - New BitField"] #[inline(always)] - pub fn locknsmpu(&self) -> LOCKNSMPU_R { - LOCKNSMPU_R::new(((self.bits >> 3) & 1) != 0) + pub fn locknsmpu(&self) -> LocknsmpuR { + LocknsmpuR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - New BitField"] #[inline(always)] - pub fn locksau(&self) -> LOCKSAU_R { - LOCKSAU_R::new(((self.bits >> 4) & 1) != 0) + pub fn locksau(&self) -> LocksauR { + LocksauR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - New BitField"] #[inline(always)] #[must_use] - pub fn locksvtaircr(&mut self) -> LOCKSVTAIRCR_W<0> { - LOCKSVTAIRCR_W::new(self) + pub fn locksvtaircr(&mut self) -> LocksvtaircrW { + LocksvtaircrW::new(self, 0) } #[doc = "Bit 1 - New BitField"] #[inline(always)] #[must_use] - pub fn locknsvtor(&mut self) -> LOCKNSVTOR_W<1> { - LOCKNSVTOR_W::new(self) + pub fn locknsvtor(&mut self) -> LocknsvtorW { + LocknsvtorW::new(self, 1) } #[doc = "Bit 2 - New BitField"] #[inline(always)] #[must_use] - pub fn locksmpu(&mut self) -> LOCKSMPU_W<2> { - LOCKSMPU_W::new(self) + pub fn locksmpu(&mut self) -> LocksmpuW { + LocksmpuW::new(self, 2) } #[doc = "Bit 3 - New BitField"] #[inline(always)] #[must_use] - pub fn locknsmpu(&mut self) -> LOCKNSMPU_W<3> { - LOCKNSMPU_W::new(self) + pub fn locknsmpu(&mut self) -> LocknsmpuW { + LocknsmpuW::new(self, 3) } #[doc = "Bit 4 - New BitField"] #[inline(always)] #[must_use] - pub fn locksau(&mut self) -> LOCKSAU_W<4> { - LOCKSAU_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn locksau(&mut self) -> LocksauW { + LocksauW::new(self, 4) } } -#[doc = "Holds the M33 control settings\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [m33ctrl](index.html) module"] -pub struct M33CTRL_SPEC; -impl crate::RegisterSpec for M33CTRL_SPEC { +#[doc = "Holds the M33 control settings\n\nYou can [`read`](crate::Reg::read) this register and get [`m33ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`m33ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct M33ctrlSpec; +impl crate::RegisterSpec for M33ctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [m33ctrl::R](R) reader structure"] -impl crate::Readable for M33CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [m33ctrl::W](W) writer structure"] -impl crate::Writable for M33CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`m33ctrl::R`](R) reader structure"] +impl crate::Readable for M33ctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`m33ctrl::W`](W) writer structure"] +impl crate::Writable for M33ctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets M33CTRL to value 0"] -impl crate::Resettable for M33CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for M33ctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ppufs.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ppufs.rs index 0c3c6a4..e5f2ef0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ppufs.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ppufs.rs @@ -1,37 +1,22 @@ #[doc = "Register `PPUFS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `PPUFSPERIPHID` reader - Peripheral ID"] -pub type PPUFSPERIPHID_R = crate::FieldReader; +pub type PpufsperiphidR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Peripheral ID"] #[inline(always)] - pub fn ppufsperiphid(&self) -> PPUFSPERIPHID_R { - PPUFSPERIPHID_R::new((self.bits & 0xff) as u8) + pub fn ppufsperiphid(&self) -> PpufsperiphidR { + PpufsperiphidR::new((self.bits & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ppufs](index.html) module"] -pub struct PPUFS_SPEC; -impl crate::RegisterSpec for PPUFS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ppufs::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PpufsSpec; +impl crate::RegisterSpec for PpufsSpec { type Ux = u32; } -#[doc = "`read()` method returns [ppufs::R](R) reader structure"] -impl crate::Readable for PPUFS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ppufs::R`](R) reader structure"] +impl crate::Readable for PpufsSpec {} #[doc = "`reset()` method sets PPUFS to value 0"] -impl crate::Resettable for PPUFS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PpufsSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ppupatd0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ppupatd0.rs index af0e0f9..45b6f17 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ppupatd0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ppupatd0.rs @@ -1,530 +1,490 @@ #[doc = "Register `PPUPATD0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PPUPATD0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EMU` reader - EMU Privileged Access"] -pub type EMU_R = crate::BitReader; +pub type EmuR = crate::BitReader; #[doc = "Field `EMU` writer - EMU Privileged Access"] -pub type EMU_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type EmuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CMU` reader - CMU Privileged Access"] -pub type CMU_R = crate::BitReader; +pub type CmuR = crate::BitReader; #[doc = "Field `CMU` writer - CMU Privileged Access"] -pub type CMU_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type CmuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HFRCO0` reader - HFRCO0 Privileged Access"] -pub type HFRCO0_R = crate::BitReader; +pub type Hfrco0R = crate::BitReader; #[doc = "Field `HFRCO0` writer - HFRCO0 Privileged Access"] -pub type HFRCO0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type Hfrco0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FSRCO` reader - FSRCO Privileged Access"] -pub type FSRCO_R = crate::BitReader; +pub type FsrcoR = crate::BitReader; #[doc = "Field `FSRCO` writer - FSRCO Privileged Access"] -pub type FSRCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type FsrcoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DPLL0` reader - DPLL0 Privileged Access"] -pub type DPLL0_R = crate::BitReader; +pub type Dpll0R = crate::BitReader; #[doc = "Field `DPLL0` writer - DPLL0 Privileged Access"] -pub type DPLL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type Dpll0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LFXO` reader - LFXO Privileged Access"] -pub type LFXO_R = crate::BitReader; +pub type LfxoR = crate::BitReader; #[doc = "Field `LFXO` writer - LFXO Privileged Access"] -pub type LFXO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type LfxoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LFRCO` reader - LFRCO Privileged Access"] -pub type LFRCO_R = crate::BitReader; +pub type LfrcoR = crate::BitReader; #[doc = "Field `LFRCO` writer - LFRCO Privileged Access"] -pub type LFRCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type LfrcoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ULFRCO` reader - ULFRCO Privileged Access"] -pub type ULFRCO_R = crate::BitReader; +pub type UlfrcoR = crate::BitReader; #[doc = "Field `ULFRCO` writer - ULFRCO Privileged Access"] -pub type ULFRCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type UlfrcoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MSC` reader - MSC Privileged Access"] -pub type MSC_R = crate::BitReader; +pub type MscR = crate::BitReader; #[doc = "Field `MSC` writer - MSC Privileged Access"] -pub type MSC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type MscW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICACHE0` reader - ICACHE0 Privileged Access"] -pub type ICACHE0_R = crate::BitReader; +pub type Icache0R = crate::BitReader; #[doc = "Field `ICACHE0` writer - ICACHE0 Privileged Access"] -pub type ICACHE0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type Icache0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRS` reader - PRS Privileged Access"] -pub type PRS_R = crate::BitReader; +pub type PrsR = crate::BitReader; #[doc = "Field `PRS` writer - PRS Privileged Access"] -pub type PRS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type PrsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GPIO` reader - GPIO Privileged Access"] -pub type GPIO_R = crate::BitReader; +pub type GpioR = crate::BitReader; #[doc = "Field `GPIO` writer - GPIO Privileged Access"] -pub type GPIO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type GpioW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LDMA` reader - LDMA Privileged Access"] -pub type LDMA_R = crate::BitReader; +pub type LdmaR = crate::BitReader; #[doc = "Field `LDMA` writer - LDMA Privileged Access"] -pub type LDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type LdmaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LDMAXBAR` reader - LDMAXBAR Privileged Access"] -pub type LDMAXBAR_R = crate::BitReader; +pub type LdmaxbarR = crate::BitReader; #[doc = "Field `LDMAXBAR` writer - LDMAXBAR Privileged Access"] -pub type LDMAXBAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type LdmaxbarW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER0` reader - TIMER0 Privileged Access"] -pub type TIMER0_R = crate::BitReader; +pub type Timer0R = crate::BitReader; #[doc = "Field `TIMER0` writer - TIMER0 Privileged Access"] -pub type TIMER0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type Timer0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER1` reader - TIMER1 Privileged Access"] -pub type TIMER1_R = crate::BitReader; +pub type Timer1R = crate::BitReader; #[doc = "Field `TIMER1` writer - TIMER1 Privileged Access"] -pub type TIMER1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type Timer1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER2` reader - TIMER2 Privileged Access"] -pub type TIMER2_R = crate::BitReader; +pub type Timer2R = crate::BitReader; #[doc = "Field `TIMER2` writer - TIMER2 Privileged Access"] -pub type TIMER2_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type Timer2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER3` reader - TIMER3 Privileged Access"] -pub type TIMER3_R = crate::BitReader; +pub type Timer3R = crate::BitReader; #[doc = "Field `TIMER3` writer - TIMER3 Privileged Access"] -pub type TIMER3_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type Timer3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER4` reader - TIMER4 Privileged Access"] -pub type TIMER4_R = crate::BitReader; +pub type Timer4R = crate::BitReader; #[doc = "Field `TIMER4` writer - TIMER4 Privileged Access"] -pub type TIMER4_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type Timer4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USART0` reader - USART0 Privileged Access"] -pub type USART0_R = crate::BitReader; +pub type Usart0R = crate::BitReader; #[doc = "Field `USART0` writer - USART0 Privileged Access"] -pub type USART0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type Usart0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BURTC` reader - BURTC Privileged Access"] -pub type BURTC_R = crate::BitReader; +pub type BurtcR = crate::BitReader; #[doc = "Field `BURTC` writer - BURTC Privileged Access"] -pub type BURTC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type BurtcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C1` reader - I2C1 Privileged Access"] -pub type I2C1_R = crate::BitReader; +pub type I2c1R = crate::BitReader; #[doc = "Field `I2C1` writer - I2C1 Privileged Access"] -pub type I2C1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type I2c1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHIPTESTCTRL` reader - CHIPTESTCTRL Privileged Access"] -pub type CHIPTESTCTRL_R = crate::BitReader; +pub type ChiptestctrlR = crate::BitReader; #[doc = "Field `CHIPTESTCTRL` writer - CHIPTESTCTRL Privileged Access"] -pub type CHIPTESTCTRL_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type ChiptestctrlW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYSCFGCFGNS` reader - SYSCFGCFGNS Privileged Access"] -pub type SYSCFGCFGNS_R = crate::BitReader; +pub type SyscfgcfgnsR = crate::BitReader; #[doc = "Field `SYSCFGCFGNS` writer - SYSCFGCFGNS Privileged Access"] -pub type SYSCFGCFGNS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type SyscfgcfgnsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYSCFG` reader - SYSCFG Privileged Access"] -pub type SYSCFG_R = crate::BitReader; +pub type SyscfgR = crate::BitReader; #[doc = "Field `SYSCFG` writer - SYSCFG Privileged Access"] -pub type SYSCFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type SyscfgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BURAM` reader - BURAM Privileged Access"] -pub type BURAM_R = crate::BitReader; +pub type BuramR = crate::BitReader; #[doc = "Field `BURAM` writer - BURAM Privileged Access"] -pub type BURAM_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type BuramW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GPCRC` reader - GPCRC Privileged Access"] -pub type GPCRC_R = crate::BitReader; +pub type GpcrcR = crate::BitReader; #[doc = "Field `GPCRC` writer - GPCRC Privileged Access"] -pub type GPCRC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type GpcrcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCDC` reader - DCDC Privileged Access"] -pub type DCDC_R = crate::BitReader; +pub type DcdcR = crate::BitReader; #[doc = "Field `DCDC` writer - DCDC Privileged Access"] -pub type DCDC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type DcdcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HOSTMAILBOX` reader - HOSTMAILBOX Privileged Access"] -pub type HOSTMAILBOX_R = crate::BitReader; +pub type HostmailboxR = crate::BitReader; #[doc = "Field `HOSTMAILBOX` writer - HOSTMAILBOX Privileged Access"] -pub type HOSTMAILBOX_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type HostmailboxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EUSART1` reader - EUSART1 Privileged Access"] -pub type EUSART1_R = crate::BitReader; +pub type Eusart1R = crate::BitReader; #[doc = "Field `EUSART1` writer - EUSART1 Privileged Access"] -pub type EUSART1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type Eusart1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EUSART2` reader - EUSART2 Privileged Access"] -pub type EUSART2_R = crate::BitReader; +pub type Eusart2R = crate::BitReader; #[doc = "Field `EUSART2` writer - EUSART2 Privileged Access"] -pub type EUSART2_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD0_SPEC, bool, O>; +pub type Eusart2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 1 - EMU Privileged Access"] #[inline(always)] - pub fn emu(&self) -> EMU_R { - EMU_R::new(((self.bits >> 1) & 1) != 0) + pub fn emu(&self) -> EmuR { + EmuR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CMU Privileged Access"] #[inline(always)] - pub fn cmu(&self) -> CMU_R { - CMU_R::new(((self.bits >> 2) & 1) != 0) + pub fn cmu(&self) -> CmuR { + CmuR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - HFRCO0 Privileged Access"] #[inline(always)] - pub fn hfrco0(&self) -> HFRCO0_R { - HFRCO0_R::new(((self.bits >> 3) & 1) != 0) + pub fn hfrco0(&self) -> Hfrco0R { + Hfrco0R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - FSRCO Privileged Access"] #[inline(always)] - pub fn fsrco(&self) -> FSRCO_R { - FSRCO_R::new(((self.bits >> 4) & 1) != 0) + pub fn fsrco(&self) -> FsrcoR { + FsrcoR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DPLL0 Privileged Access"] #[inline(always)] - pub fn dpll0(&self) -> DPLL0_R { - DPLL0_R::new(((self.bits >> 5) & 1) != 0) + pub fn dpll0(&self) -> Dpll0R { + Dpll0R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - LFXO Privileged Access"] #[inline(always)] - pub fn lfxo(&self) -> LFXO_R { - LFXO_R::new(((self.bits >> 6) & 1) != 0) + pub fn lfxo(&self) -> LfxoR { + LfxoR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - LFRCO Privileged Access"] #[inline(always)] - pub fn lfrco(&self) -> LFRCO_R { - LFRCO_R::new(((self.bits >> 7) & 1) != 0) + pub fn lfrco(&self) -> LfrcoR { + LfrcoR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - ULFRCO Privileged Access"] #[inline(always)] - pub fn ulfrco(&self) -> ULFRCO_R { - ULFRCO_R::new(((self.bits >> 8) & 1) != 0) + pub fn ulfrco(&self) -> UlfrcoR { + UlfrcoR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - MSC Privileged Access"] #[inline(always)] - pub fn msc(&self) -> MSC_R { - MSC_R::new(((self.bits >> 9) & 1) != 0) + pub fn msc(&self) -> MscR { + MscR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - ICACHE0 Privileged Access"] #[inline(always)] - pub fn icache0(&self) -> ICACHE0_R { - ICACHE0_R::new(((self.bits >> 10) & 1) != 0) + pub fn icache0(&self) -> Icache0R { + Icache0R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - PRS Privileged Access"] #[inline(always)] - pub fn prs(&self) -> PRS_R { - PRS_R::new(((self.bits >> 11) & 1) != 0) + pub fn prs(&self) -> PrsR { + PrsR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - GPIO Privileged Access"] #[inline(always)] - pub fn gpio(&self) -> GPIO_R { - GPIO_R::new(((self.bits >> 12) & 1) != 0) + pub fn gpio(&self) -> GpioR { + GpioR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - LDMA Privileged Access"] #[inline(always)] - pub fn ldma(&self) -> LDMA_R { - LDMA_R::new(((self.bits >> 13) & 1) != 0) + pub fn ldma(&self) -> LdmaR { + LdmaR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - LDMAXBAR Privileged Access"] #[inline(always)] - pub fn ldmaxbar(&self) -> LDMAXBAR_R { - LDMAXBAR_R::new(((self.bits >> 14) & 1) != 0) + pub fn ldmaxbar(&self) -> LdmaxbarR { + LdmaxbarR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - TIMER0 Privileged Access"] #[inline(always)] - pub fn timer0(&self) -> TIMER0_R { - TIMER0_R::new(((self.bits >> 15) & 1) != 0) + pub fn timer0(&self) -> Timer0R { + Timer0R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - TIMER1 Privileged Access"] #[inline(always)] - pub fn timer1(&self) -> TIMER1_R { - TIMER1_R::new(((self.bits >> 16) & 1) != 0) + pub fn timer1(&self) -> Timer1R { + Timer1R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - TIMER2 Privileged Access"] #[inline(always)] - pub fn timer2(&self) -> TIMER2_R { - TIMER2_R::new(((self.bits >> 17) & 1) != 0) + pub fn timer2(&self) -> Timer2R { + Timer2R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - TIMER3 Privileged Access"] #[inline(always)] - pub fn timer3(&self) -> TIMER3_R { - TIMER3_R::new(((self.bits >> 18) & 1) != 0) + pub fn timer3(&self) -> Timer3R { + Timer3R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - TIMER4 Privileged Access"] #[inline(always)] - pub fn timer4(&self) -> TIMER4_R { - TIMER4_R::new(((self.bits >> 19) & 1) != 0) + pub fn timer4(&self) -> Timer4R { + Timer4R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - USART0 Privileged Access"] #[inline(always)] - pub fn usart0(&self) -> USART0_R { - USART0_R::new(((self.bits >> 20) & 1) != 0) + pub fn usart0(&self) -> Usart0R { + Usart0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - BURTC Privileged Access"] #[inline(always)] - pub fn burtc(&self) -> BURTC_R { - BURTC_R::new(((self.bits >> 21) & 1) != 0) + pub fn burtc(&self) -> BurtcR { + BurtcR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - I2C1 Privileged Access"] #[inline(always)] - pub fn i2c1(&self) -> I2C1_R { - I2C1_R::new(((self.bits >> 22) & 1) != 0) + pub fn i2c1(&self) -> I2c1R { + I2c1R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - CHIPTESTCTRL Privileged Access"] #[inline(always)] - pub fn chiptestctrl(&self) -> CHIPTESTCTRL_R { - CHIPTESTCTRL_R::new(((self.bits >> 23) & 1) != 0) + pub fn chiptestctrl(&self) -> ChiptestctrlR { + ChiptestctrlR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - SYSCFGCFGNS Privileged Access"] #[inline(always)] - pub fn syscfgcfgns(&self) -> SYSCFGCFGNS_R { - SYSCFGCFGNS_R::new(((self.bits >> 24) & 1) != 0) + pub fn syscfgcfgns(&self) -> SyscfgcfgnsR { + SyscfgcfgnsR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - SYSCFG Privileged Access"] #[inline(always)] - pub fn syscfg(&self) -> SYSCFG_R { - SYSCFG_R::new(((self.bits >> 25) & 1) != 0) + pub fn syscfg(&self) -> SyscfgR { + SyscfgR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - BURAM Privileged Access"] #[inline(always)] - pub fn buram(&self) -> BURAM_R { - BURAM_R::new(((self.bits >> 26) & 1) != 0) + pub fn buram(&self) -> BuramR { + BuramR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - GPCRC Privileged Access"] #[inline(always)] - pub fn gpcrc(&self) -> GPCRC_R { - GPCRC_R::new(((self.bits >> 27) & 1) != 0) + pub fn gpcrc(&self) -> GpcrcR { + GpcrcR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - DCDC Privileged Access"] #[inline(always)] - pub fn dcdc(&self) -> DCDC_R { - DCDC_R::new(((self.bits >> 28) & 1) != 0) + pub fn dcdc(&self) -> DcdcR { + DcdcR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - HOSTMAILBOX Privileged Access"] #[inline(always)] - pub fn hostmailbox(&self) -> HOSTMAILBOX_R { - HOSTMAILBOX_R::new(((self.bits >> 29) & 1) != 0) + pub fn hostmailbox(&self) -> HostmailboxR { + HostmailboxR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - EUSART1 Privileged Access"] #[inline(always)] - pub fn eusart1(&self) -> EUSART1_R { - EUSART1_R::new(((self.bits >> 30) & 1) != 0) + pub fn eusart1(&self) -> Eusart1R { + Eusart1R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - EUSART2 Privileged Access"] #[inline(always)] - pub fn eusart2(&self) -> EUSART2_R { - EUSART2_R::new(((self.bits >> 31) & 1) != 0) + pub fn eusart2(&self) -> Eusart2R { + Eusart2R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 1 - EMU Privileged Access"] #[inline(always)] #[must_use] - pub fn emu(&mut self) -> EMU_W<1> { - EMU_W::new(self) + pub fn emu(&mut self) -> EmuW { + EmuW::new(self, 1) } #[doc = "Bit 2 - CMU Privileged Access"] #[inline(always)] #[must_use] - pub fn cmu(&mut self) -> CMU_W<2> { - CMU_W::new(self) + pub fn cmu(&mut self) -> CmuW { + CmuW::new(self, 2) } #[doc = "Bit 3 - HFRCO0 Privileged Access"] #[inline(always)] #[must_use] - pub fn hfrco0(&mut self) -> HFRCO0_W<3> { - HFRCO0_W::new(self) + pub fn hfrco0(&mut self) -> Hfrco0W { + Hfrco0W::new(self, 3) } #[doc = "Bit 4 - FSRCO Privileged Access"] #[inline(always)] #[must_use] - pub fn fsrco(&mut self) -> FSRCO_W<4> { - FSRCO_W::new(self) + pub fn fsrco(&mut self) -> FsrcoW { + FsrcoW::new(self, 4) } #[doc = "Bit 5 - DPLL0 Privileged Access"] #[inline(always)] #[must_use] - pub fn dpll0(&mut self) -> DPLL0_W<5> { - DPLL0_W::new(self) + pub fn dpll0(&mut self) -> Dpll0W { + Dpll0W::new(self, 5) } #[doc = "Bit 6 - LFXO Privileged Access"] #[inline(always)] #[must_use] - pub fn lfxo(&mut self) -> LFXO_W<6> { - LFXO_W::new(self) + pub fn lfxo(&mut self) -> LfxoW { + LfxoW::new(self, 6) } #[doc = "Bit 7 - LFRCO Privileged Access"] #[inline(always)] #[must_use] - pub fn lfrco(&mut self) -> LFRCO_W<7> { - LFRCO_W::new(self) + pub fn lfrco(&mut self) -> LfrcoW { + LfrcoW::new(self, 7) } #[doc = "Bit 8 - ULFRCO Privileged Access"] #[inline(always)] #[must_use] - pub fn ulfrco(&mut self) -> ULFRCO_W<8> { - ULFRCO_W::new(self) + pub fn ulfrco(&mut self) -> UlfrcoW { + UlfrcoW::new(self, 8) } #[doc = "Bit 9 - MSC Privileged Access"] #[inline(always)] #[must_use] - pub fn msc(&mut self) -> MSC_W<9> { - MSC_W::new(self) + pub fn msc(&mut self) -> MscW { + MscW::new(self, 9) } #[doc = "Bit 10 - ICACHE0 Privileged Access"] #[inline(always)] #[must_use] - pub fn icache0(&mut self) -> ICACHE0_W<10> { - ICACHE0_W::new(self) + pub fn icache0(&mut self) -> Icache0W { + Icache0W::new(self, 10) } #[doc = "Bit 11 - PRS Privileged Access"] #[inline(always)] #[must_use] - pub fn prs(&mut self) -> PRS_W<11> { - PRS_W::new(self) + pub fn prs(&mut self) -> PrsW { + PrsW::new(self, 11) } #[doc = "Bit 12 - GPIO Privileged Access"] #[inline(always)] #[must_use] - pub fn gpio(&mut self) -> GPIO_W<12> { - GPIO_W::new(self) + pub fn gpio(&mut self) -> GpioW { + GpioW::new(self, 12) } #[doc = "Bit 13 - LDMA Privileged Access"] #[inline(always)] #[must_use] - pub fn ldma(&mut self) -> LDMA_W<13> { - LDMA_W::new(self) + pub fn ldma(&mut self) -> LdmaW { + LdmaW::new(self, 13) } #[doc = "Bit 14 - LDMAXBAR Privileged Access"] #[inline(always)] #[must_use] - pub fn ldmaxbar(&mut self) -> LDMAXBAR_W<14> { - LDMAXBAR_W::new(self) + pub fn ldmaxbar(&mut self) -> LdmaxbarW { + LdmaxbarW::new(self, 14) } #[doc = "Bit 15 - TIMER0 Privileged Access"] #[inline(always)] #[must_use] - pub fn timer0(&mut self) -> TIMER0_W<15> { - TIMER0_W::new(self) + pub fn timer0(&mut self) -> Timer0W { + Timer0W::new(self, 15) } #[doc = "Bit 16 - TIMER1 Privileged Access"] #[inline(always)] #[must_use] - pub fn timer1(&mut self) -> TIMER1_W<16> { - TIMER1_W::new(self) + pub fn timer1(&mut self) -> Timer1W { + Timer1W::new(self, 16) } #[doc = "Bit 17 - TIMER2 Privileged Access"] #[inline(always)] #[must_use] - pub fn timer2(&mut self) -> TIMER2_W<17> { - TIMER2_W::new(self) + pub fn timer2(&mut self) -> Timer2W { + Timer2W::new(self, 17) } #[doc = "Bit 18 - TIMER3 Privileged Access"] #[inline(always)] #[must_use] - pub fn timer3(&mut self) -> TIMER3_W<18> { - TIMER3_W::new(self) + pub fn timer3(&mut self) -> Timer3W { + Timer3W::new(self, 18) } #[doc = "Bit 19 - TIMER4 Privileged Access"] #[inline(always)] #[must_use] - pub fn timer4(&mut self) -> TIMER4_W<19> { - TIMER4_W::new(self) + pub fn timer4(&mut self) -> Timer4W { + Timer4W::new(self, 19) } #[doc = "Bit 20 - USART0 Privileged Access"] #[inline(always)] #[must_use] - pub fn usart0(&mut self) -> USART0_W<20> { - USART0_W::new(self) + pub fn usart0(&mut self) -> Usart0W { + Usart0W::new(self, 20) } #[doc = "Bit 21 - BURTC Privileged Access"] #[inline(always)] #[must_use] - pub fn burtc(&mut self) -> BURTC_W<21> { - BURTC_W::new(self) + pub fn burtc(&mut self) -> BurtcW { + BurtcW::new(self, 21) } #[doc = "Bit 22 - I2C1 Privileged Access"] #[inline(always)] #[must_use] - pub fn i2c1(&mut self) -> I2C1_W<22> { - I2C1_W::new(self) + pub fn i2c1(&mut self) -> I2c1W { + I2c1W::new(self, 22) } #[doc = "Bit 23 - CHIPTESTCTRL Privileged Access"] #[inline(always)] #[must_use] - pub fn chiptestctrl(&mut self) -> CHIPTESTCTRL_W<23> { - CHIPTESTCTRL_W::new(self) + pub fn chiptestctrl(&mut self) -> ChiptestctrlW { + ChiptestctrlW::new(self, 23) } #[doc = "Bit 24 - SYSCFGCFGNS Privileged Access"] #[inline(always)] #[must_use] - pub fn syscfgcfgns(&mut self) -> SYSCFGCFGNS_W<24> { - SYSCFGCFGNS_W::new(self) + pub fn syscfgcfgns(&mut self) -> SyscfgcfgnsW { + SyscfgcfgnsW::new(self, 24) } #[doc = "Bit 25 - SYSCFG Privileged Access"] #[inline(always)] #[must_use] - pub fn syscfg(&mut self) -> SYSCFG_W<25> { - SYSCFG_W::new(self) + pub fn syscfg(&mut self) -> SyscfgW { + SyscfgW::new(self, 25) } #[doc = "Bit 26 - BURAM Privileged Access"] #[inline(always)] #[must_use] - pub fn buram(&mut self) -> BURAM_W<26> { - BURAM_W::new(self) + pub fn buram(&mut self) -> BuramW { + BuramW::new(self, 26) } #[doc = "Bit 27 - GPCRC Privileged Access"] #[inline(always)] #[must_use] - pub fn gpcrc(&mut self) -> GPCRC_W<27> { - GPCRC_W::new(self) + pub fn gpcrc(&mut self) -> GpcrcW { + GpcrcW::new(self, 27) } #[doc = "Bit 28 - DCDC Privileged Access"] #[inline(always)] #[must_use] - pub fn dcdc(&mut self) -> DCDC_W<28> { - DCDC_W::new(self) + pub fn dcdc(&mut self) -> DcdcW { + DcdcW::new(self, 28) } #[doc = "Bit 29 - HOSTMAILBOX Privileged Access"] #[inline(always)] #[must_use] - pub fn hostmailbox(&mut self) -> HOSTMAILBOX_W<29> { - HOSTMAILBOX_W::new(self) + pub fn hostmailbox(&mut self) -> HostmailboxW { + HostmailboxW::new(self, 29) } #[doc = "Bit 30 - EUSART1 Privileged Access"] #[inline(always)] #[must_use] - pub fn eusart1(&mut self) -> EUSART1_W<30> { - EUSART1_W::new(self) + pub fn eusart1(&mut self) -> Eusart1W { + Eusart1W::new(self, 30) } #[doc = "Bit 31 - EUSART2 Privileged Access"] #[inline(always)] #[must_use] - pub fn eusart2(&mut self) -> EUSART2_W<31> { - EUSART2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn eusart2(&mut self) -> Eusart2W { + Eusart2W::new(self, 31) } } -#[doc = "Set peripheral bits to 1 to mark as privileged access only\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ppupatd0](index.html) module"] -pub struct PPUPATD0_SPEC; -impl crate::RegisterSpec for PPUPATD0_SPEC { +#[doc = "Set peripheral bits to 1 to mark as privileged access only\n\nYou can [`read`](crate::Reg::read) this register and get [`ppupatd0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ppupatd0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ppupatd0Spec; +impl crate::RegisterSpec for Ppupatd0Spec { type Ux = u32; } -#[doc = "`read()` method returns [ppupatd0::R](R) reader structure"] -impl crate::Readable for PPUPATD0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ppupatd0::W](W) writer structure"] -impl crate::Writable for PPUPATD0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ppupatd0::R`](R) reader structure"] +impl crate::Readable for Ppupatd0Spec {} +#[doc = "`write(|w| ..)` method takes [`ppupatd0::W`](W) writer structure"] +impl crate::Writable for Ppupatd0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPUPATD0 to value 0xffff_ffff"] -impl crate::Resettable for PPUPATD0_SPEC { - const RESET_VALUE: Self::Ux = 0xffff_ffff; +impl crate::Resettable for Ppupatd0Spec { + const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ppupatd1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ppupatd1.rs index 10d44e8..0bc49a8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ppupatd1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ppupatd1.rs @@ -1,395 +1,355 @@ #[doc = "Register `PPUPATD1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PPUPATD1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SYSRTC` reader - SYSRTC Privileged Access"] -pub type SYSRTC_R = crate::BitReader; +pub type SysrtcR = crate::BitReader; #[doc = "Field `SYSRTC` writer - SYSRTC Privileged Access"] -pub type SYSRTC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type SysrtcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LCD` reader - LCD Privileged Access"] -pub type LCD_R = crate::BitReader; +pub type LcdR = crate::BitReader; #[doc = "Field `LCD` writer - LCD Privileged Access"] -pub type LCD_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type LcdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `KEYSCAN` reader - KEYSCAN Privileged Access"] -pub type KEYSCAN_R = crate::BitReader; +pub type KeyscanR = crate::BitReader; #[doc = "Field `KEYSCAN` writer - KEYSCAN Privileged Access"] -pub type KEYSCAN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type KeyscanW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMEM` reader - DMEM Privileged Access"] -pub type DMEM_R = crate::BitReader; +pub type DmemR = crate::BitReader; #[doc = "Field `DMEM` writer - DMEM Privileged Access"] -pub type DMEM_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type DmemW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LCDRF` reader - LCDRF Privileged Access"] -pub type LCDRF_R = crate::BitReader; +pub type LcdrfR = crate::BitReader; #[doc = "Field `LCDRF` writer - LCDRF Privileged Access"] -pub type LCDRF_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type LcdrfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SMU` reader - SMU Privileged Access"] -pub type SMU_R = crate::BitReader; +pub type SmuR = crate::BitReader; #[doc = "Field `SMU` writer - SMU Privileged Access"] -pub type SMU_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type SmuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SMUCFGNS` reader - SMUCFGNS Privileged Access"] -pub type SMUCFGNS_R = crate::BitReader; +pub type SmucfgnsR = crate::BitReader; #[doc = "Field `SMUCFGNS` writer - SMUCFGNS Privileged Access"] -pub type SMUCFGNS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type SmucfgnsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LETIMER0` reader - LETIMER0 Privileged Access"] -pub type LETIMER0_R = crate::BitReader; +pub type Letimer0R = crate::BitReader; #[doc = "Field `LETIMER0` writer - LETIMER0 Privileged Access"] -pub type LETIMER0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type Letimer0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IADC0` reader - IADC0 Privileged Access"] -pub type IADC0_R = crate::BitReader; +pub type Iadc0R = crate::BitReader; #[doc = "Field `IADC0` writer - IADC0 Privileged Access"] -pub type IADC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type Iadc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMP0` reader - ACMP0 Privileged Access"] -pub type ACMP0_R = crate::BitReader; +pub type Acmp0R = crate::BitReader; #[doc = "Field `ACMP0` writer - ACMP0 Privileged Access"] -pub type ACMP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type Acmp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMP1` reader - ACMP1 Privileged Access"] -pub type ACMP1_R = crate::BitReader; +pub type Acmp1R = crate::BitReader; #[doc = "Field `ACMP1` writer - ACMP1 Privileged Access"] -pub type ACMP1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type Acmp1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AMUXCP0` reader - AMUXCP0 Privileged Access"] -pub type AMUXCP0_R = crate::BitReader; +pub type Amuxcp0R = crate::BitReader; #[doc = "Field `AMUXCP0` writer - AMUXCP0 Privileged Access"] -pub type AMUXCP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type Amuxcp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VDAC0` reader - VDAC0 Privileged Access"] -pub type VDAC0_R = crate::BitReader; +pub type Vdac0R = crate::BitReader; #[doc = "Field `VDAC0` writer - VDAC0 Privileged Access"] -pub type VDAC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type Vdac0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PCNT` reader - PCNT Privileged Access"] -pub type PCNT_R = crate::BitReader; +pub type PcntR = crate::BitReader; #[doc = "Field `PCNT` writer - PCNT Privileged Access"] -pub type PCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type PcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LESENSE` reader - LESENSE Privileged Access"] -pub type LESENSE_R = crate::BitReader; +pub type LesenseR = crate::BitReader; #[doc = "Field `LESENSE` writer - LESENSE Privileged Access"] -pub type LESENSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type LesenseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HFRCO1` reader - HFRCO1 Privileged Access"] -pub type HFRCO1_R = crate::BitReader; +pub type Hfrco1R = crate::BitReader; #[doc = "Field `HFRCO1` writer - HFRCO1 Privileged Access"] -pub type HFRCO1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type Hfrco1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HFXO0` reader - HFXO0 Privileged Access"] -pub type HFXO0_R = crate::BitReader; +pub type Hfxo0R = crate::BitReader; #[doc = "Field `HFXO0` writer - HFXO0 Privileged Access"] -pub type HFXO0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type Hfxo0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C0` reader - I2C0 Privileged Access"] -pub type I2C0_R = crate::BitReader; +pub type I2c0R = crate::BitReader; #[doc = "Field `I2C0` writer - I2C0 Privileged Access"] -pub type I2C0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type I2c0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WDOG0` reader - WDOG0 Privileged Access"] -pub type WDOG0_R = crate::BitReader; +pub type Wdog0R = crate::BitReader; #[doc = "Field `WDOG0` writer - WDOG0 Privileged Access"] -pub type WDOG0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type Wdog0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WDOG1` reader - WDOG1 Privileged Access"] -pub type WDOG1_R = crate::BitReader; +pub type Wdog1R = crate::BitReader; #[doc = "Field `WDOG1` writer - WDOG1 Privileged Access"] -pub type WDOG1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type Wdog1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EUSART0` reader - EUSART0 Privileged Access"] -pub type EUSART0_R = crate::BitReader; +pub type Eusart0R = crate::BitReader; #[doc = "Field `EUSART0` writer - EUSART0 Privileged Access"] -pub type EUSART0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type Eusart0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SEMAILBOX` reader - SEMAILBOX Privileged Access"] -pub type SEMAILBOX_R = crate::BitReader; +pub type SemailboxR = crate::BitReader; #[doc = "Field `SEMAILBOX` writer - SEMAILBOX Privileged Access"] -pub type SEMAILBOX_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUPATD1_SPEC, bool, O>; +pub type SemailboxW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - SYSRTC Privileged Access"] #[inline(always)] - pub fn sysrtc(&self) -> SYSRTC_R { - SYSRTC_R::new((self.bits & 1) != 0) + pub fn sysrtc(&self) -> SysrtcR { + SysrtcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - LCD Privileged Access"] #[inline(always)] - pub fn lcd(&self) -> LCD_R { - LCD_R::new(((self.bits >> 1) & 1) != 0) + pub fn lcd(&self) -> LcdR { + LcdR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - KEYSCAN Privileged Access"] #[inline(always)] - pub fn keyscan(&self) -> KEYSCAN_R { - KEYSCAN_R::new(((self.bits >> 2) & 1) != 0) + pub fn keyscan(&self) -> KeyscanR { + KeyscanR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DMEM Privileged Access"] #[inline(always)] - pub fn dmem(&self) -> DMEM_R { - DMEM_R::new(((self.bits >> 3) & 1) != 0) + pub fn dmem(&self) -> DmemR { + DmemR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - LCDRF Privileged Access"] #[inline(always)] - pub fn lcdrf(&self) -> LCDRF_R { - LCDRF_R::new(((self.bits >> 4) & 1) != 0) + pub fn lcdrf(&self) -> LcdrfR { + LcdrfR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 7 - SMU Privileged Access"] #[inline(always)] - pub fn smu(&self) -> SMU_R { - SMU_R::new(((self.bits >> 7) & 1) != 0) + pub fn smu(&self) -> SmuR { + SmuR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - SMUCFGNS Privileged Access"] #[inline(always)] - pub fn smucfgns(&self) -> SMUCFGNS_R { - SMUCFGNS_R::new(((self.bits >> 8) & 1) != 0) + pub fn smucfgns(&self) -> SmucfgnsR { + SmucfgnsR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - LETIMER0 Privileged Access"] #[inline(always)] - pub fn letimer0(&self) -> LETIMER0_R { - LETIMER0_R::new(((self.bits >> 9) & 1) != 0) + pub fn letimer0(&self) -> Letimer0R { + Letimer0R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - IADC0 Privileged Access"] #[inline(always)] - pub fn iadc0(&self) -> IADC0_R { - IADC0_R::new(((self.bits >> 10) & 1) != 0) + pub fn iadc0(&self) -> Iadc0R { + Iadc0R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - ACMP0 Privileged Access"] #[inline(always)] - pub fn acmp0(&self) -> ACMP0_R { - ACMP0_R::new(((self.bits >> 11) & 1) != 0) + pub fn acmp0(&self) -> Acmp0R { + Acmp0R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - ACMP1 Privileged Access"] #[inline(always)] - pub fn acmp1(&self) -> ACMP1_R { - ACMP1_R::new(((self.bits >> 12) & 1) != 0) + pub fn acmp1(&self) -> Acmp1R { + Acmp1R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - AMUXCP0 Privileged Access"] #[inline(always)] - pub fn amuxcp0(&self) -> AMUXCP0_R { - AMUXCP0_R::new(((self.bits >> 13) & 1) != 0) + pub fn amuxcp0(&self) -> Amuxcp0R { + Amuxcp0R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - VDAC0 Privileged Access"] #[inline(always)] - pub fn vdac0(&self) -> VDAC0_R { - VDAC0_R::new(((self.bits >> 14) & 1) != 0) + pub fn vdac0(&self) -> Vdac0R { + Vdac0R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - PCNT Privileged Access"] #[inline(always)] - pub fn pcnt(&self) -> PCNT_R { - PCNT_R::new(((self.bits >> 15) & 1) != 0) + pub fn pcnt(&self) -> PcntR { + PcntR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - LESENSE Privileged Access"] #[inline(always)] - pub fn lesense(&self) -> LESENSE_R { - LESENSE_R::new(((self.bits >> 16) & 1) != 0) + pub fn lesense(&self) -> LesenseR { + LesenseR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - HFRCO1 Privileged Access"] #[inline(always)] - pub fn hfrco1(&self) -> HFRCO1_R { - HFRCO1_R::new(((self.bits >> 17) & 1) != 0) + pub fn hfrco1(&self) -> Hfrco1R { + Hfrco1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - HFXO0 Privileged Access"] #[inline(always)] - pub fn hfxo0(&self) -> HFXO0_R { - HFXO0_R::new(((self.bits >> 18) & 1) != 0) + pub fn hfxo0(&self) -> Hfxo0R { + Hfxo0R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - I2C0 Privileged Access"] #[inline(always)] - pub fn i2c0(&self) -> I2C0_R { - I2C0_R::new(((self.bits >> 19) & 1) != 0) + pub fn i2c0(&self) -> I2c0R { + I2c0R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - WDOG0 Privileged Access"] #[inline(always)] - pub fn wdog0(&self) -> WDOG0_R { - WDOG0_R::new(((self.bits >> 20) & 1) != 0) + pub fn wdog0(&self) -> Wdog0R { + Wdog0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - WDOG1 Privileged Access"] #[inline(always)] - pub fn wdog1(&self) -> WDOG1_R { - WDOG1_R::new(((self.bits >> 21) & 1) != 0) + pub fn wdog1(&self) -> Wdog1R { + Wdog1R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - EUSART0 Privileged Access"] #[inline(always)] - pub fn eusart0(&self) -> EUSART0_R { - EUSART0_R::new(((self.bits >> 22) & 1) != 0) + pub fn eusart0(&self) -> Eusart0R { + Eusart0R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - SEMAILBOX Privileged Access"] #[inline(always)] - pub fn semailbox(&self) -> SEMAILBOX_R { - SEMAILBOX_R::new(((self.bits >> 23) & 1) != 0) + pub fn semailbox(&self) -> SemailboxR { + SemailboxR::new(((self.bits >> 23) & 1) != 0) } } impl W { #[doc = "Bit 0 - SYSRTC Privileged Access"] #[inline(always)] #[must_use] - pub fn sysrtc(&mut self) -> SYSRTC_W<0> { - SYSRTC_W::new(self) + pub fn sysrtc(&mut self) -> SysrtcW { + SysrtcW::new(self, 0) } #[doc = "Bit 1 - LCD Privileged Access"] #[inline(always)] #[must_use] - pub fn lcd(&mut self) -> LCD_W<1> { - LCD_W::new(self) + pub fn lcd(&mut self) -> LcdW { + LcdW::new(self, 1) } #[doc = "Bit 2 - KEYSCAN Privileged Access"] #[inline(always)] #[must_use] - pub fn keyscan(&mut self) -> KEYSCAN_W<2> { - KEYSCAN_W::new(self) + pub fn keyscan(&mut self) -> KeyscanW { + KeyscanW::new(self, 2) } #[doc = "Bit 3 - DMEM Privileged Access"] #[inline(always)] #[must_use] - pub fn dmem(&mut self) -> DMEM_W<3> { - DMEM_W::new(self) + pub fn dmem(&mut self) -> DmemW { + DmemW::new(self, 3) } #[doc = "Bit 4 - LCDRF Privileged Access"] #[inline(always)] #[must_use] - pub fn lcdrf(&mut self) -> LCDRF_W<4> { - LCDRF_W::new(self) + pub fn lcdrf(&mut self) -> LcdrfW { + LcdrfW::new(self, 4) } #[doc = "Bit 7 - SMU Privileged Access"] #[inline(always)] #[must_use] - pub fn smu(&mut self) -> SMU_W<7> { - SMU_W::new(self) + pub fn smu(&mut self) -> SmuW { + SmuW::new(self, 7) } #[doc = "Bit 8 - SMUCFGNS Privileged Access"] #[inline(always)] #[must_use] - pub fn smucfgns(&mut self) -> SMUCFGNS_W<8> { - SMUCFGNS_W::new(self) + pub fn smucfgns(&mut self) -> SmucfgnsW { + SmucfgnsW::new(self, 8) } #[doc = "Bit 9 - LETIMER0 Privileged Access"] #[inline(always)] #[must_use] - pub fn letimer0(&mut self) -> LETIMER0_W<9> { - LETIMER0_W::new(self) + pub fn letimer0(&mut self) -> Letimer0W { + Letimer0W::new(self, 9) } #[doc = "Bit 10 - IADC0 Privileged Access"] #[inline(always)] #[must_use] - pub fn iadc0(&mut self) -> IADC0_W<10> { - IADC0_W::new(self) + pub fn iadc0(&mut self) -> Iadc0W { + Iadc0W::new(self, 10) } #[doc = "Bit 11 - ACMP0 Privileged Access"] #[inline(always)] #[must_use] - pub fn acmp0(&mut self) -> ACMP0_W<11> { - ACMP0_W::new(self) + pub fn acmp0(&mut self) -> Acmp0W { + Acmp0W::new(self, 11) } #[doc = "Bit 12 - ACMP1 Privileged Access"] #[inline(always)] #[must_use] - pub fn acmp1(&mut self) -> ACMP1_W<12> { - ACMP1_W::new(self) + pub fn acmp1(&mut self) -> Acmp1W { + Acmp1W::new(self, 12) } #[doc = "Bit 13 - AMUXCP0 Privileged Access"] #[inline(always)] #[must_use] - pub fn amuxcp0(&mut self) -> AMUXCP0_W<13> { - AMUXCP0_W::new(self) + pub fn amuxcp0(&mut self) -> Amuxcp0W { + Amuxcp0W::new(self, 13) } #[doc = "Bit 14 - VDAC0 Privileged Access"] #[inline(always)] #[must_use] - pub fn vdac0(&mut self) -> VDAC0_W<14> { - VDAC0_W::new(self) + pub fn vdac0(&mut self) -> Vdac0W { + Vdac0W::new(self, 14) } #[doc = "Bit 15 - PCNT Privileged Access"] #[inline(always)] #[must_use] - pub fn pcnt(&mut self) -> PCNT_W<15> { - PCNT_W::new(self) + pub fn pcnt(&mut self) -> PcntW { + PcntW::new(self, 15) } #[doc = "Bit 16 - LESENSE Privileged Access"] #[inline(always)] #[must_use] - pub fn lesense(&mut self) -> LESENSE_W<16> { - LESENSE_W::new(self) + pub fn lesense(&mut self) -> LesenseW { + LesenseW::new(self, 16) } #[doc = "Bit 17 - HFRCO1 Privileged Access"] #[inline(always)] #[must_use] - pub fn hfrco1(&mut self) -> HFRCO1_W<17> { - HFRCO1_W::new(self) + pub fn hfrco1(&mut self) -> Hfrco1W { + Hfrco1W::new(self, 17) } #[doc = "Bit 18 - HFXO0 Privileged Access"] #[inline(always)] #[must_use] - pub fn hfxo0(&mut self) -> HFXO0_W<18> { - HFXO0_W::new(self) + pub fn hfxo0(&mut self) -> Hfxo0W { + Hfxo0W::new(self, 18) } #[doc = "Bit 19 - I2C0 Privileged Access"] #[inline(always)] #[must_use] - pub fn i2c0(&mut self) -> I2C0_W<19> { - I2C0_W::new(self) + pub fn i2c0(&mut self) -> I2c0W { + I2c0W::new(self, 19) } #[doc = "Bit 20 - WDOG0 Privileged Access"] #[inline(always)] #[must_use] - pub fn wdog0(&mut self) -> WDOG0_W<20> { - WDOG0_W::new(self) + pub fn wdog0(&mut self) -> Wdog0W { + Wdog0W::new(self, 20) } #[doc = "Bit 21 - WDOG1 Privileged Access"] #[inline(always)] #[must_use] - pub fn wdog1(&mut self) -> WDOG1_W<21> { - WDOG1_W::new(self) + pub fn wdog1(&mut self) -> Wdog1W { + Wdog1W::new(self, 21) } #[doc = "Bit 22 - EUSART0 Privileged Access"] #[inline(always)] #[must_use] - pub fn eusart0(&mut self) -> EUSART0_W<22> { - EUSART0_W::new(self) + pub fn eusart0(&mut self) -> Eusart0W { + Eusart0W::new(self, 22) } #[doc = "Bit 23 - SEMAILBOX Privileged Access"] #[inline(always)] #[must_use] - pub fn semailbox(&mut self) -> SEMAILBOX_W<23> { - SEMAILBOX_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn semailbox(&mut self) -> SemailboxW { + SemailboxW::new(self, 23) } } -#[doc = "Set peripheral bits to 1 to mark as privileged access only\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ppupatd1](index.html) module"] -pub struct PPUPATD1_SPEC; -impl crate::RegisterSpec for PPUPATD1_SPEC { +#[doc = "Set peripheral bits to 1 to mark as privileged access only\n\nYou can [`read`](crate::Reg::read) this register and get [`ppupatd1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ppupatd1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ppupatd1Spec; +impl crate::RegisterSpec for Ppupatd1Spec { type Ux = u32; } -#[doc = "`read()` method returns [ppupatd1::R](R) reader structure"] -impl crate::Readable for PPUPATD1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ppupatd1::W](W) writer structure"] -impl crate::Writable for PPUPATD1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ppupatd1::R`](R) reader structure"] +impl crate::Readable for Ppupatd1Spec {} +#[doc = "`write(|w| ..)` method takes [`ppupatd1::W`](W) writer structure"] +impl crate::Writable for Ppupatd1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPUPATD1 to value 0x01ff_ffff"] -impl crate::Resettable for PPUPATD1_SPEC { - const RESET_VALUE: Self::Ux = 0x01ff_ffff; +impl crate::Resettable for Ppupatd1Spec { + const RESET_VALUE: u32 = 0x01ff_ffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ppusatd0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ppusatd0.rs index 2408809..89299ad 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ppusatd0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ppusatd0.rs @@ -1,530 +1,490 @@ #[doc = "Register `PPUSATD0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PPUSATD0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EMU` reader - EMU Secure Access"] -pub type EMU_R = crate::BitReader; +pub type EmuR = crate::BitReader; #[doc = "Field `EMU` writer - EMU Secure Access"] -pub type EMU_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type EmuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CMU` reader - CMU Secure Access"] -pub type CMU_R = crate::BitReader; +pub type CmuR = crate::BitReader; #[doc = "Field `CMU` writer - CMU Secure Access"] -pub type CMU_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type CmuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HFRCO0` reader - HFRCO0 Secure Access"] -pub type HFRCO0_R = crate::BitReader; +pub type Hfrco0R = crate::BitReader; #[doc = "Field `HFRCO0` writer - HFRCO0 Secure Access"] -pub type HFRCO0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type Hfrco0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FSRCO` reader - FSRCO Secure Access"] -pub type FSRCO_R = crate::BitReader; +pub type FsrcoR = crate::BitReader; #[doc = "Field `FSRCO` writer - FSRCO Secure Access"] -pub type FSRCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type FsrcoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DPLL0` reader - DPLL0 Secure Access"] -pub type DPLL0_R = crate::BitReader; +pub type Dpll0R = crate::BitReader; #[doc = "Field `DPLL0` writer - DPLL0 Secure Access"] -pub type DPLL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type Dpll0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LFXO` reader - LFXO Secure Access"] -pub type LFXO_R = crate::BitReader; +pub type LfxoR = crate::BitReader; #[doc = "Field `LFXO` writer - LFXO Secure Access"] -pub type LFXO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type LfxoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LFRCO` reader - LFRCO Secure Access"] -pub type LFRCO_R = crate::BitReader; +pub type LfrcoR = crate::BitReader; #[doc = "Field `LFRCO` writer - LFRCO Secure Access"] -pub type LFRCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type LfrcoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ULFRCO` reader - ULFRCO Secure Access"] -pub type ULFRCO_R = crate::BitReader; +pub type UlfrcoR = crate::BitReader; #[doc = "Field `ULFRCO` writer - ULFRCO Secure Access"] -pub type ULFRCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type UlfrcoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MSC` reader - MSC Secure Access"] -pub type MSC_R = crate::BitReader; +pub type MscR = crate::BitReader; #[doc = "Field `MSC` writer - MSC Secure Access"] -pub type MSC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type MscW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICACHE0` reader - ICACHE0 Secure Access"] -pub type ICACHE0_R = crate::BitReader; +pub type Icache0R = crate::BitReader; #[doc = "Field `ICACHE0` writer - ICACHE0 Secure Access"] -pub type ICACHE0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type Icache0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRS` reader - PRS Secure Access"] -pub type PRS_R = crate::BitReader; +pub type PrsR = crate::BitReader; #[doc = "Field `PRS` writer - PRS Secure Access"] -pub type PRS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type PrsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GPIO` reader - GPIO Secure Access"] -pub type GPIO_R = crate::BitReader; +pub type GpioR = crate::BitReader; #[doc = "Field `GPIO` writer - GPIO Secure Access"] -pub type GPIO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type GpioW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LDMA` reader - LDMA Secure Access"] -pub type LDMA_R = crate::BitReader; +pub type LdmaR = crate::BitReader; #[doc = "Field `LDMA` writer - LDMA Secure Access"] -pub type LDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type LdmaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LDMAXBAR` reader - LDMAXBAR Secure Access"] -pub type LDMAXBAR_R = crate::BitReader; +pub type LdmaxbarR = crate::BitReader; #[doc = "Field `LDMAXBAR` writer - LDMAXBAR Secure Access"] -pub type LDMAXBAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type LdmaxbarW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER0` reader - TIMER0 Secure Access"] -pub type TIMER0_R = crate::BitReader; +pub type Timer0R = crate::BitReader; #[doc = "Field `TIMER0` writer - TIMER0 Secure Access"] -pub type TIMER0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type Timer0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER1` reader - TIMER1 Secure Access"] -pub type TIMER1_R = crate::BitReader; +pub type Timer1R = crate::BitReader; #[doc = "Field `TIMER1` writer - TIMER1 Secure Access"] -pub type TIMER1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type Timer1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER2` reader - TIMER2 Secure Access"] -pub type TIMER2_R = crate::BitReader; +pub type Timer2R = crate::BitReader; #[doc = "Field `TIMER2` writer - TIMER2 Secure Access"] -pub type TIMER2_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type Timer2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER3` reader - TIMER3 Secure Access"] -pub type TIMER3_R = crate::BitReader; +pub type Timer3R = crate::BitReader; #[doc = "Field `TIMER3` writer - TIMER3 Secure Access"] -pub type TIMER3_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type Timer3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER4` reader - TIMER4 Secure Access"] -pub type TIMER4_R = crate::BitReader; +pub type Timer4R = crate::BitReader; #[doc = "Field `TIMER4` writer - TIMER4 Secure Access"] -pub type TIMER4_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type Timer4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USART0` reader - USART0 Secure Access"] -pub type USART0_R = crate::BitReader; +pub type Usart0R = crate::BitReader; #[doc = "Field `USART0` writer - USART0 Secure Access"] -pub type USART0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type Usart0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BURTC` reader - BURTC Secure Access"] -pub type BURTC_R = crate::BitReader; +pub type BurtcR = crate::BitReader; #[doc = "Field `BURTC` writer - BURTC Secure Access"] -pub type BURTC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type BurtcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C1` reader - I2C1 Secure Access"] -pub type I2C1_R = crate::BitReader; +pub type I2c1R = crate::BitReader; #[doc = "Field `I2C1` writer - I2C1 Secure Access"] -pub type I2C1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type I2c1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHIPTESTCTRL` reader - CHIPTESTCTRL Secure Access"] -pub type CHIPTESTCTRL_R = crate::BitReader; +pub type ChiptestctrlR = crate::BitReader; #[doc = "Field `CHIPTESTCTRL` writer - CHIPTESTCTRL Secure Access"] -pub type CHIPTESTCTRL_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type ChiptestctrlW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYSCFGCFGNS` reader - SYSCFGCFGNS Secure Access"] -pub type SYSCFGCFGNS_R = crate::BitReader; +pub type SyscfgcfgnsR = crate::BitReader; #[doc = "Field `SYSCFGCFGNS` writer - SYSCFGCFGNS Secure Access"] -pub type SYSCFGCFGNS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type SyscfgcfgnsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYSCFG` reader - SYSCFG Secure Access"] -pub type SYSCFG_R = crate::BitReader; +pub type SyscfgR = crate::BitReader; #[doc = "Field `SYSCFG` writer - SYSCFG Secure Access"] -pub type SYSCFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type SyscfgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BURAM` reader - BURAM Secure Access"] -pub type BURAM_R = crate::BitReader; +pub type BuramR = crate::BitReader; #[doc = "Field `BURAM` writer - BURAM Secure Access"] -pub type BURAM_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type BuramW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GPCRC` reader - GPCRC Secure Access"] -pub type GPCRC_R = crate::BitReader; +pub type GpcrcR = crate::BitReader; #[doc = "Field `GPCRC` writer - GPCRC Secure Access"] -pub type GPCRC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type GpcrcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCDC` reader - DCDC Secure Access"] -pub type DCDC_R = crate::BitReader; +pub type DcdcR = crate::BitReader; #[doc = "Field `DCDC` writer - DCDC Secure Access"] -pub type DCDC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type DcdcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HOSTMAILBOX` reader - HOSTMAILBOX Secure Access"] -pub type HOSTMAILBOX_R = crate::BitReader; +pub type HostmailboxR = crate::BitReader; #[doc = "Field `HOSTMAILBOX` writer - HOSTMAILBOX Secure Access"] -pub type HOSTMAILBOX_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type HostmailboxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EUSART1` reader - EUSART1 Secure Access"] -pub type EUSART1_R = crate::BitReader; +pub type Eusart1R = crate::BitReader; #[doc = "Field `EUSART1` writer - EUSART1 Secure Access"] -pub type EUSART1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type Eusart1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EUSART2` reader - EUSART2 Secure Access"] -pub type EUSART2_R = crate::BitReader; +pub type Eusart2R = crate::BitReader; #[doc = "Field `EUSART2` writer - EUSART2 Secure Access"] -pub type EUSART2_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD0_SPEC, bool, O>; +pub type Eusart2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 1 - EMU Secure Access"] #[inline(always)] - pub fn emu(&self) -> EMU_R { - EMU_R::new(((self.bits >> 1) & 1) != 0) + pub fn emu(&self) -> EmuR { + EmuR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CMU Secure Access"] #[inline(always)] - pub fn cmu(&self) -> CMU_R { - CMU_R::new(((self.bits >> 2) & 1) != 0) + pub fn cmu(&self) -> CmuR { + CmuR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - HFRCO0 Secure Access"] #[inline(always)] - pub fn hfrco0(&self) -> HFRCO0_R { - HFRCO0_R::new(((self.bits >> 3) & 1) != 0) + pub fn hfrco0(&self) -> Hfrco0R { + Hfrco0R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - FSRCO Secure Access"] #[inline(always)] - pub fn fsrco(&self) -> FSRCO_R { - FSRCO_R::new(((self.bits >> 4) & 1) != 0) + pub fn fsrco(&self) -> FsrcoR { + FsrcoR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DPLL0 Secure Access"] #[inline(always)] - pub fn dpll0(&self) -> DPLL0_R { - DPLL0_R::new(((self.bits >> 5) & 1) != 0) + pub fn dpll0(&self) -> Dpll0R { + Dpll0R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - LFXO Secure Access"] #[inline(always)] - pub fn lfxo(&self) -> LFXO_R { - LFXO_R::new(((self.bits >> 6) & 1) != 0) + pub fn lfxo(&self) -> LfxoR { + LfxoR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - LFRCO Secure Access"] #[inline(always)] - pub fn lfrco(&self) -> LFRCO_R { - LFRCO_R::new(((self.bits >> 7) & 1) != 0) + pub fn lfrco(&self) -> LfrcoR { + LfrcoR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - ULFRCO Secure Access"] #[inline(always)] - pub fn ulfrco(&self) -> ULFRCO_R { - ULFRCO_R::new(((self.bits >> 8) & 1) != 0) + pub fn ulfrco(&self) -> UlfrcoR { + UlfrcoR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - MSC Secure Access"] #[inline(always)] - pub fn msc(&self) -> MSC_R { - MSC_R::new(((self.bits >> 9) & 1) != 0) + pub fn msc(&self) -> MscR { + MscR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - ICACHE0 Secure Access"] #[inline(always)] - pub fn icache0(&self) -> ICACHE0_R { - ICACHE0_R::new(((self.bits >> 10) & 1) != 0) + pub fn icache0(&self) -> Icache0R { + Icache0R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - PRS Secure Access"] #[inline(always)] - pub fn prs(&self) -> PRS_R { - PRS_R::new(((self.bits >> 11) & 1) != 0) + pub fn prs(&self) -> PrsR { + PrsR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - GPIO Secure Access"] #[inline(always)] - pub fn gpio(&self) -> GPIO_R { - GPIO_R::new(((self.bits >> 12) & 1) != 0) + pub fn gpio(&self) -> GpioR { + GpioR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - LDMA Secure Access"] #[inline(always)] - pub fn ldma(&self) -> LDMA_R { - LDMA_R::new(((self.bits >> 13) & 1) != 0) + pub fn ldma(&self) -> LdmaR { + LdmaR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - LDMAXBAR Secure Access"] #[inline(always)] - pub fn ldmaxbar(&self) -> LDMAXBAR_R { - LDMAXBAR_R::new(((self.bits >> 14) & 1) != 0) + pub fn ldmaxbar(&self) -> LdmaxbarR { + LdmaxbarR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - TIMER0 Secure Access"] #[inline(always)] - pub fn timer0(&self) -> TIMER0_R { - TIMER0_R::new(((self.bits >> 15) & 1) != 0) + pub fn timer0(&self) -> Timer0R { + Timer0R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - TIMER1 Secure Access"] #[inline(always)] - pub fn timer1(&self) -> TIMER1_R { - TIMER1_R::new(((self.bits >> 16) & 1) != 0) + pub fn timer1(&self) -> Timer1R { + Timer1R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - TIMER2 Secure Access"] #[inline(always)] - pub fn timer2(&self) -> TIMER2_R { - TIMER2_R::new(((self.bits >> 17) & 1) != 0) + pub fn timer2(&self) -> Timer2R { + Timer2R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - TIMER3 Secure Access"] #[inline(always)] - pub fn timer3(&self) -> TIMER3_R { - TIMER3_R::new(((self.bits >> 18) & 1) != 0) + pub fn timer3(&self) -> Timer3R { + Timer3R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - TIMER4 Secure Access"] #[inline(always)] - pub fn timer4(&self) -> TIMER4_R { - TIMER4_R::new(((self.bits >> 19) & 1) != 0) + pub fn timer4(&self) -> Timer4R { + Timer4R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - USART0 Secure Access"] #[inline(always)] - pub fn usart0(&self) -> USART0_R { - USART0_R::new(((self.bits >> 20) & 1) != 0) + pub fn usart0(&self) -> Usart0R { + Usart0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - BURTC Secure Access"] #[inline(always)] - pub fn burtc(&self) -> BURTC_R { - BURTC_R::new(((self.bits >> 21) & 1) != 0) + pub fn burtc(&self) -> BurtcR { + BurtcR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - I2C1 Secure Access"] #[inline(always)] - pub fn i2c1(&self) -> I2C1_R { - I2C1_R::new(((self.bits >> 22) & 1) != 0) + pub fn i2c1(&self) -> I2c1R { + I2c1R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - CHIPTESTCTRL Secure Access"] #[inline(always)] - pub fn chiptestctrl(&self) -> CHIPTESTCTRL_R { - CHIPTESTCTRL_R::new(((self.bits >> 23) & 1) != 0) + pub fn chiptestctrl(&self) -> ChiptestctrlR { + ChiptestctrlR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - SYSCFGCFGNS Secure Access"] #[inline(always)] - pub fn syscfgcfgns(&self) -> SYSCFGCFGNS_R { - SYSCFGCFGNS_R::new(((self.bits >> 24) & 1) != 0) + pub fn syscfgcfgns(&self) -> SyscfgcfgnsR { + SyscfgcfgnsR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - SYSCFG Secure Access"] #[inline(always)] - pub fn syscfg(&self) -> SYSCFG_R { - SYSCFG_R::new(((self.bits >> 25) & 1) != 0) + pub fn syscfg(&self) -> SyscfgR { + SyscfgR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - BURAM Secure Access"] #[inline(always)] - pub fn buram(&self) -> BURAM_R { - BURAM_R::new(((self.bits >> 26) & 1) != 0) + pub fn buram(&self) -> BuramR { + BuramR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - GPCRC Secure Access"] #[inline(always)] - pub fn gpcrc(&self) -> GPCRC_R { - GPCRC_R::new(((self.bits >> 27) & 1) != 0) + pub fn gpcrc(&self) -> GpcrcR { + GpcrcR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - DCDC Secure Access"] #[inline(always)] - pub fn dcdc(&self) -> DCDC_R { - DCDC_R::new(((self.bits >> 28) & 1) != 0) + pub fn dcdc(&self) -> DcdcR { + DcdcR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - HOSTMAILBOX Secure Access"] #[inline(always)] - pub fn hostmailbox(&self) -> HOSTMAILBOX_R { - HOSTMAILBOX_R::new(((self.bits >> 29) & 1) != 0) + pub fn hostmailbox(&self) -> HostmailboxR { + HostmailboxR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - EUSART1 Secure Access"] #[inline(always)] - pub fn eusart1(&self) -> EUSART1_R { - EUSART1_R::new(((self.bits >> 30) & 1) != 0) + pub fn eusart1(&self) -> Eusart1R { + Eusart1R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - EUSART2 Secure Access"] #[inline(always)] - pub fn eusart2(&self) -> EUSART2_R { - EUSART2_R::new(((self.bits >> 31) & 1) != 0) + pub fn eusart2(&self) -> Eusart2R { + Eusart2R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 1 - EMU Secure Access"] #[inline(always)] #[must_use] - pub fn emu(&mut self) -> EMU_W<1> { - EMU_W::new(self) + pub fn emu(&mut self) -> EmuW { + EmuW::new(self, 1) } #[doc = "Bit 2 - CMU Secure Access"] #[inline(always)] #[must_use] - pub fn cmu(&mut self) -> CMU_W<2> { - CMU_W::new(self) + pub fn cmu(&mut self) -> CmuW { + CmuW::new(self, 2) } #[doc = "Bit 3 - HFRCO0 Secure Access"] #[inline(always)] #[must_use] - pub fn hfrco0(&mut self) -> HFRCO0_W<3> { - HFRCO0_W::new(self) + pub fn hfrco0(&mut self) -> Hfrco0W { + Hfrco0W::new(self, 3) } #[doc = "Bit 4 - FSRCO Secure Access"] #[inline(always)] #[must_use] - pub fn fsrco(&mut self) -> FSRCO_W<4> { - FSRCO_W::new(self) + pub fn fsrco(&mut self) -> FsrcoW { + FsrcoW::new(self, 4) } #[doc = "Bit 5 - DPLL0 Secure Access"] #[inline(always)] #[must_use] - pub fn dpll0(&mut self) -> DPLL0_W<5> { - DPLL0_W::new(self) + pub fn dpll0(&mut self) -> Dpll0W { + Dpll0W::new(self, 5) } #[doc = "Bit 6 - LFXO Secure Access"] #[inline(always)] #[must_use] - pub fn lfxo(&mut self) -> LFXO_W<6> { - LFXO_W::new(self) + pub fn lfxo(&mut self) -> LfxoW { + LfxoW::new(self, 6) } #[doc = "Bit 7 - LFRCO Secure Access"] #[inline(always)] #[must_use] - pub fn lfrco(&mut self) -> LFRCO_W<7> { - LFRCO_W::new(self) + pub fn lfrco(&mut self) -> LfrcoW { + LfrcoW::new(self, 7) } #[doc = "Bit 8 - ULFRCO Secure Access"] #[inline(always)] #[must_use] - pub fn ulfrco(&mut self) -> ULFRCO_W<8> { - ULFRCO_W::new(self) + pub fn ulfrco(&mut self) -> UlfrcoW { + UlfrcoW::new(self, 8) } #[doc = "Bit 9 - MSC Secure Access"] #[inline(always)] #[must_use] - pub fn msc(&mut self) -> MSC_W<9> { - MSC_W::new(self) + pub fn msc(&mut self) -> MscW { + MscW::new(self, 9) } #[doc = "Bit 10 - ICACHE0 Secure Access"] #[inline(always)] #[must_use] - pub fn icache0(&mut self) -> ICACHE0_W<10> { - ICACHE0_W::new(self) + pub fn icache0(&mut self) -> Icache0W { + Icache0W::new(self, 10) } #[doc = "Bit 11 - PRS Secure Access"] #[inline(always)] #[must_use] - pub fn prs(&mut self) -> PRS_W<11> { - PRS_W::new(self) + pub fn prs(&mut self) -> PrsW { + PrsW::new(self, 11) } #[doc = "Bit 12 - GPIO Secure Access"] #[inline(always)] #[must_use] - pub fn gpio(&mut self) -> GPIO_W<12> { - GPIO_W::new(self) + pub fn gpio(&mut self) -> GpioW { + GpioW::new(self, 12) } #[doc = "Bit 13 - LDMA Secure Access"] #[inline(always)] #[must_use] - pub fn ldma(&mut self) -> LDMA_W<13> { - LDMA_W::new(self) + pub fn ldma(&mut self) -> LdmaW { + LdmaW::new(self, 13) } #[doc = "Bit 14 - LDMAXBAR Secure Access"] #[inline(always)] #[must_use] - pub fn ldmaxbar(&mut self) -> LDMAXBAR_W<14> { - LDMAXBAR_W::new(self) + pub fn ldmaxbar(&mut self) -> LdmaxbarW { + LdmaxbarW::new(self, 14) } #[doc = "Bit 15 - TIMER0 Secure Access"] #[inline(always)] #[must_use] - pub fn timer0(&mut self) -> TIMER0_W<15> { - TIMER0_W::new(self) + pub fn timer0(&mut self) -> Timer0W { + Timer0W::new(self, 15) } #[doc = "Bit 16 - TIMER1 Secure Access"] #[inline(always)] #[must_use] - pub fn timer1(&mut self) -> TIMER1_W<16> { - TIMER1_W::new(self) + pub fn timer1(&mut self) -> Timer1W { + Timer1W::new(self, 16) } #[doc = "Bit 17 - TIMER2 Secure Access"] #[inline(always)] #[must_use] - pub fn timer2(&mut self) -> TIMER2_W<17> { - TIMER2_W::new(self) + pub fn timer2(&mut self) -> Timer2W { + Timer2W::new(self, 17) } #[doc = "Bit 18 - TIMER3 Secure Access"] #[inline(always)] #[must_use] - pub fn timer3(&mut self) -> TIMER3_W<18> { - TIMER3_W::new(self) + pub fn timer3(&mut self) -> Timer3W { + Timer3W::new(self, 18) } #[doc = "Bit 19 - TIMER4 Secure Access"] #[inline(always)] #[must_use] - pub fn timer4(&mut self) -> TIMER4_W<19> { - TIMER4_W::new(self) + pub fn timer4(&mut self) -> Timer4W { + Timer4W::new(self, 19) } #[doc = "Bit 20 - USART0 Secure Access"] #[inline(always)] #[must_use] - pub fn usart0(&mut self) -> USART0_W<20> { - USART0_W::new(self) + pub fn usart0(&mut self) -> Usart0W { + Usart0W::new(self, 20) } #[doc = "Bit 21 - BURTC Secure Access"] #[inline(always)] #[must_use] - pub fn burtc(&mut self) -> BURTC_W<21> { - BURTC_W::new(self) + pub fn burtc(&mut self) -> BurtcW { + BurtcW::new(self, 21) } #[doc = "Bit 22 - I2C1 Secure Access"] #[inline(always)] #[must_use] - pub fn i2c1(&mut self) -> I2C1_W<22> { - I2C1_W::new(self) + pub fn i2c1(&mut self) -> I2c1W { + I2c1W::new(self, 22) } #[doc = "Bit 23 - CHIPTESTCTRL Secure Access"] #[inline(always)] #[must_use] - pub fn chiptestctrl(&mut self) -> CHIPTESTCTRL_W<23> { - CHIPTESTCTRL_W::new(self) + pub fn chiptestctrl(&mut self) -> ChiptestctrlW { + ChiptestctrlW::new(self, 23) } #[doc = "Bit 24 - SYSCFGCFGNS Secure Access"] #[inline(always)] #[must_use] - pub fn syscfgcfgns(&mut self) -> SYSCFGCFGNS_W<24> { - SYSCFGCFGNS_W::new(self) + pub fn syscfgcfgns(&mut self) -> SyscfgcfgnsW { + SyscfgcfgnsW::new(self, 24) } #[doc = "Bit 25 - SYSCFG Secure Access"] #[inline(always)] #[must_use] - pub fn syscfg(&mut self) -> SYSCFG_W<25> { - SYSCFG_W::new(self) + pub fn syscfg(&mut self) -> SyscfgW { + SyscfgW::new(self, 25) } #[doc = "Bit 26 - BURAM Secure Access"] #[inline(always)] #[must_use] - pub fn buram(&mut self) -> BURAM_W<26> { - BURAM_W::new(self) + pub fn buram(&mut self) -> BuramW { + BuramW::new(self, 26) } #[doc = "Bit 27 - GPCRC Secure Access"] #[inline(always)] #[must_use] - pub fn gpcrc(&mut self) -> GPCRC_W<27> { - GPCRC_W::new(self) + pub fn gpcrc(&mut self) -> GpcrcW { + GpcrcW::new(self, 27) } #[doc = "Bit 28 - DCDC Secure Access"] #[inline(always)] #[must_use] - pub fn dcdc(&mut self) -> DCDC_W<28> { - DCDC_W::new(self) + pub fn dcdc(&mut self) -> DcdcW { + DcdcW::new(self, 28) } #[doc = "Bit 29 - HOSTMAILBOX Secure Access"] #[inline(always)] #[must_use] - pub fn hostmailbox(&mut self) -> HOSTMAILBOX_W<29> { - HOSTMAILBOX_W::new(self) + pub fn hostmailbox(&mut self) -> HostmailboxW { + HostmailboxW::new(self, 29) } #[doc = "Bit 30 - EUSART1 Secure Access"] #[inline(always)] #[must_use] - pub fn eusart1(&mut self) -> EUSART1_W<30> { - EUSART1_W::new(self) + pub fn eusart1(&mut self) -> Eusart1W { + Eusart1W::new(self, 30) } #[doc = "Bit 31 - EUSART2 Secure Access"] #[inline(always)] #[must_use] - pub fn eusart2(&mut self) -> EUSART2_W<31> { - EUSART2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn eusart2(&mut self) -> Eusart2W { + Eusart2W::new(self, 31) } } -#[doc = "Set peripheral bits to 1 to mark as secure access only\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ppusatd0](index.html) module"] -pub struct PPUSATD0_SPEC; -impl crate::RegisterSpec for PPUSATD0_SPEC { +#[doc = "Set peripheral bits to 1 to mark as secure access only\n\nYou can [`read`](crate::Reg::read) this register and get [`ppusatd0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ppusatd0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ppusatd0Spec; +impl crate::RegisterSpec for Ppusatd0Spec { type Ux = u32; } -#[doc = "`read()` method returns [ppusatd0::R](R) reader structure"] -impl crate::Readable for PPUSATD0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ppusatd0::W](W) writer structure"] -impl crate::Writable for PPUSATD0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ppusatd0::R`](R) reader structure"] +impl crate::Readable for Ppusatd0Spec {} +#[doc = "`write(|w| ..)` method takes [`ppusatd0::W`](W) writer structure"] +impl crate::Writable for Ppusatd0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPUSATD0 to value 0xffff_ffff"] -impl crate::Resettable for PPUSATD0_SPEC { - const RESET_VALUE: Self::Ux = 0xffff_ffff; +impl crate::Resettable for Ppusatd0Spec { + const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ppusatd1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ppusatd1.rs index fcd74db..7ce957d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ppusatd1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/ppusatd1.rs @@ -1,395 +1,355 @@ #[doc = "Register `PPUSATD1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PPUSATD1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SYSRTC` reader - SYSRTC Secure Access"] -pub type SYSRTC_R = crate::BitReader; +pub type SysrtcR = crate::BitReader; #[doc = "Field `SYSRTC` writer - SYSRTC Secure Access"] -pub type SYSRTC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type SysrtcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LCD` reader - LCD Secure Access"] -pub type LCD_R = crate::BitReader; +pub type LcdR = crate::BitReader; #[doc = "Field `LCD` writer - LCD Secure Access"] -pub type LCD_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type LcdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `KEYSCAN` reader - KEYSCAN Secure Access"] -pub type KEYSCAN_R = crate::BitReader; +pub type KeyscanR = crate::BitReader; #[doc = "Field `KEYSCAN` writer - KEYSCAN Secure Access"] -pub type KEYSCAN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type KeyscanW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMEM` reader - DMEM Secure Access"] -pub type DMEM_R = crate::BitReader; +pub type DmemR = crate::BitReader; #[doc = "Field `DMEM` writer - DMEM Secure Access"] -pub type DMEM_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type DmemW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LCDRF` reader - LCDRF Secure Access"] -pub type LCDRF_R = crate::BitReader; +pub type LcdrfR = crate::BitReader; #[doc = "Field `LCDRF` writer - LCDRF Secure Access"] -pub type LCDRF_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type LcdrfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SMU` reader - SMU Secure Access"] -pub type SMU_R = crate::BitReader; +pub type SmuR = crate::BitReader; #[doc = "Field `SMU` writer - SMU Secure Access"] -pub type SMU_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type SmuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SMUCFGNS` reader - SMUCFGNS Secure Access"] -pub type SMUCFGNS_R = crate::BitReader; +pub type SmucfgnsR = crate::BitReader; #[doc = "Field `SMUCFGNS` writer - SMUCFGNS Secure Access"] -pub type SMUCFGNS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type SmucfgnsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LETIMER0` reader - LETIMER0 Secure Access"] -pub type LETIMER0_R = crate::BitReader; +pub type Letimer0R = crate::BitReader; #[doc = "Field `LETIMER0` writer - LETIMER0 Secure Access"] -pub type LETIMER0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type Letimer0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IADC0` reader - IADC0 Secure Access"] -pub type IADC0_R = crate::BitReader; +pub type Iadc0R = crate::BitReader; #[doc = "Field `IADC0` writer - IADC0 Secure Access"] -pub type IADC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type Iadc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMP0` reader - ACMP0 Secure Access"] -pub type ACMP0_R = crate::BitReader; +pub type Acmp0R = crate::BitReader; #[doc = "Field `ACMP0` writer - ACMP0 Secure Access"] -pub type ACMP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type Acmp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMP1` reader - ACMP1 Secure Access"] -pub type ACMP1_R = crate::BitReader; +pub type Acmp1R = crate::BitReader; #[doc = "Field `ACMP1` writer - ACMP1 Secure Access"] -pub type ACMP1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type Acmp1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AMUXCP0` reader - AMUXCP0 Secure Access"] -pub type AMUXCP0_R = crate::BitReader; +pub type Amuxcp0R = crate::BitReader; #[doc = "Field `AMUXCP0` writer - AMUXCP0 Secure Access"] -pub type AMUXCP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type Amuxcp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VDAC0` reader - VDAC0 Secure Access"] -pub type VDAC0_R = crate::BitReader; +pub type Vdac0R = crate::BitReader; #[doc = "Field `VDAC0` writer - VDAC0 Secure Access"] -pub type VDAC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type Vdac0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PCNT` reader - PCNT Secure Access"] -pub type PCNT_R = crate::BitReader; +pub type PcntR = crate::BitReader; #[doc = "Field `PCNT` writer - PCNT Secure Access"] -pub type PCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type PcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LESENSE` reader - LESENSE Secure Access"] -pub type LESENSE_R = crate::BitReader; +pub type LesenseR = crate::BitReader; #[doc = "Field `LESENSE` writer - LESENSE Secure Access"] -pub type LESENSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type LesenseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HFRCO1` reader - HFRCO1 Secure Access"] -pub type HFRCO1_R = crate::BitReader; +pub type Hfrco1R = crate::BitReader; #[doc = "Field `HFRCO1` writer - HFRCO1 Secure Access"] -pub type HFRCO1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type Hfrco1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HFXO0` reader - HFXO0 Secure Access"] -pub type HFXO0_R = crate::BitReader; +pub type Hfxo0R = crate::BitReader; #[doc = "Field `HFXO0` writer - HFXO0 Secure Access"] -pub type HFXO0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type Hfxo0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C0` reader - I2C0 Secure Access"] -pub type I2C0_R = crate::BitReader; +pub type I2c0R = crate::BitReader; #[doc = "Field `I2C0` writer - I2C0 Secure Access"] -pub type I2C0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type I2c0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WDOG0` reader - WDOG0 Secure Access"] -pub type WDOG0_R = crate::BitReader; +pub type Wdog0R = crate::BitReader; #[doc = "Field `WDOG0` writer - WDOG0 Secure Access"] -pub type WDOG0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type Wdog0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WDOG1` reader - WDOG1 Secure Access"] -pub type WDOG1_R = crate::BitReader; +pub type Wdog1R = crate::BitReader; #[doc = "Field `WDOG1` writer - WDOG1 Secure Access"] -pub type WDOG1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type Wdog1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EUSART0` reader - EUSART0 Secure Access"] -pub type EUSART0_R = crate::BitReader; +pub type Eusart0R = crate::BitReader; #[doc = "Field `EUSART0` writer - EUSART0 Secure Access"] -pub type EUSART0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type Eusart0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SEMAILBOX` reader - SEMAILBOX Secure Access"] -pub type SEMAILBOX_R = crate::BitReader; +pub type SemailboxR = crate::BitReader; #[doc = "Field `SEMAILBOX` writer - SEMAILBOX Secure Access"] -pub type SEMAILBOX_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUSATD1_SPEC, bool, O>; +pub type SemailboxW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - SYSRTC Secure Access"] #[inline(always)] - pub fn sysrtc(&self) -> SYSRTC_R { - SYSRTC_R::new((self.bits & 1) != 0) + pub fn sysrtc(&self) -> SysrtcR { + SysrtcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - LCD Secure Access"] #[inline(always)] - pub fn lcd(&self) -> LCD_R { - LCD_R::new(((self.bits >> 1) & 1) != 0) + pub fn lcd(&self) -> LcdR { + LcdR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - KEYSCAN Secure Access"] #[inline(always)] - pub fn keyscan(&self) -> KEYSCAN_R { - KEYSCAN_R::new(((self.bits >> 2) & 1) != 0) + pub fn keyscan(&self) -> KeyscanR { + KeyscanR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DMEM Secure Access"] #[inline(always)] - pub fn dmem(&self) -> DMEM_R { - DMEM_R::new(((self.bits >> 3) & 1) != 0) + pub fn dmem(&self) -> DmemR { + DmemR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - LCDRF Secure Access"] #[inline(always)] - pub fn lcdrf(&self) -> LCDRF_R { - LCDRF_R::new(((self.bits >> 4) & 1) != 0) + pub fn lcdrf(&self) -> LcdrfR { + LcdrfR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 7 - SMU Secure Access"] #[inline(always)] - pub fn smu(&self) -> SMU_R { - SMU_R::new(((self.bits >> 7) & 1) != 0) + pub fn smu(&self) -> SmuR { + SmuR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - SMUCFGNS Secure Access"] #[inline(always)] - pub fn smucfgns(&self) -> SMUCFGNS_R { - SMUCFGNS_R::new(((self.bits >> 8) & 1) != 0) + pub fn smucfgns(&self) -> SmucfgnsR { + SmucfgnsR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - LETIMER0 Secure Access"] #[inline(always)] - pub fn letimer0(&self) -> LETIMER0_R { - LETIMER0_R::new(((self.bits >> 9) & 1) != 0) + pub fn letimer0(&self) -> Letimer0R { + Letimer0R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - IADC0 Secure Access"] #[inline(always)] - pub fn iadc0(&self) -> IADC0_R { - IADC0_R::new(((self.bits >> 10) & 1) != 0) + pub fn iadc0(&self) -> Iadc0R { + Iadc0R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - ACMP0 Secure Access"] #[inline(always)] - pub fn acmp0(&self) -> ACMP0_R { - ACMP0_R::new(((self.bits >> 11) & 1) != 0) + pub fn acmp0(&self) -> Acmp0R { + Acmp0R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - ACMP1 Secure Access"] #[inline(always)] - pub fn acmp1(&self) -> ACMP1_R { - ACMP1_R::new(((self.bits >> 12) & 1) != 0) + pub fn acmp1(&self) -> Acmp1R { + Acmp1R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - AMUXCP0 Secure Access"] #[inline(always)] - pub fn amuxcp0(&self) -> AMUXCP0_R { - AMUXCP0_R::new(((self.bits >> 13) & 1) != 0) + pub fn amuxcp0(&self) -> Amuxcp0R { + Amuxcp0R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - VDAC0 Secure Access"] #[inline(always)] - pub fn vdac0(&self) -> VDAC0_R { - VDAC0_R::new(((self.bits >> 14) & 1) != 0) + pub fn vdac0(&self) -> Vdac0R { + Vdac0R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - PCNT Secure Access"] #[inline(always)] - pub fn pcnt(&self) -> PCNT_R { - PCNT_R::new(((self.bits >> 15) & 1) != 0) + pub fn pcnt(&self) -> PcntR { + PcntR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - LESENSE Secure Access"] #[inline(always)] - pub fn lesense(&self) -> LESENSE_R { - LESENSE_R::new(((self.bits >> 16) & 1) != 0) + pub fn lesense(&self) -> LesenseR { + LesenseR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - HFRCO1 Secure Access"] #[inline(always)] - pub fn hfrco1(&self) -> HFRCO1_R { - HFRCO1_R::new(((self.bits >> 17) & 1) != 0) + pub fn hfrco1(&self) -> Hfrco1R { + Hfrco1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - HFXO0 Secure Access"] #[inline(always)] - pub fn hfxo0(&self) -> HFXO0_R { - HFXO0_R::new(((self.bits >> 18) & 1) != 0) + pub fn hfxo0(&self) -> Hfxo0R { + Hfxo0R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - I2C0 Secure Access"] #[inline(always)] - pub fn i2c0(&self) -> I2C0_R { - I2C0_R::new(((self.bits >> 19) & 1) != 0) + pub fn i2c0(&self) -> I2c0R { + I2c0R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - WDOG0 Secure Access"] #[inline(always)] - pub fn wdog0(&self) -> WDOG0_R { - WDOG0_R::new(((self.bits >> 20) & 1) != 0) + pub fn wdog0(&self) -> Wdog0R { + Wdog0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - WDOG1 Secure Access"] #[inline(always)] - pub fn wdog1(&self) -> WDOG1_R { - WDOG1_R::new(((self.bits >> 21) & 1) != 0) + pub fn wdog1(&self) -> Wdog1R { + Wdog1R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - EUSART0 Secure Access"] #[inline(always)] - pub fn eusart0(&self) -> EUSART0_R { - EUSART0_R::new(((self.bits >> 22) & 1) != 0) + pub fn eusart0(&self) -> Eusart0R { + Eusart0R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - SEMAILBOX Secure Access"] #[inline(always)] - pub fn semailbox(&self) -> SEMAILBOX_R { - SEMAILBOX_R::new(((self.bits >> 23) & 1) != 0) + pub fn semailbox(&self) -> SemailboxR { + SemailboxR::new(((self.bits >> 23) & 1) != 0) } } impl W { #[doc = "Bit 0 - SYSRTC Secure Access"] #[inline(always)] #[must_use] - pub fn sysrtc(&mut self) -> SYSRTC_W<0> { - SYSRTC_W::new(self) + pub fn sysrtc(&mut self) -> SysrtcW { + SysrtcW::new(self, 0) } #[doc = "Bit 1 - LCD Secure Access"] #[inline(always)] #[must_use] - pub fn lcd(&mut self) -> LCD_W<1> { - LCD_W::new(self) + pub fn lcd(&mut self) -> LcdW { + LcdW::new(self, 1) } #[doc = "Bit 2 - KEYSCAN Secure Access"] #[inline(always)] #[must_use] - pub fn keyscan(&mut self) -> KEYSCAN_W<2> { - KEYSCAN_W::new(self) + pub fn keyscan(&mut self) -> KeyscanW { + KeyscanW::new(self, 2) } #[doc = "Bit 3 - DMEM Secure Access"] #[inline(always)] #[must_use] - pub fn dmem(&mut self) -> DMEM_W<3> { - DMEM_W::new(self) + pub fn dmem(&mut self) -> DmemW { + DmemW::new(self, 3) } #[doc = "Bit 4 - LCDRF Secure Access"] #[inline(always)] #[must_use] - pub fn lcdrf(&mut self) -> LCDRF_W<4> { - LCDRF_W::new(self) + pub fn lcdrf(&mut self) -> LcdrfW { + LcdrfW::new(self, 4) } #[doc = "Bit 7 - SMU Secure Access"] #[inline(always)] #[must_use] - pub fn smu(&mut self) -> SMU_W<7> { - SMU_W::new(self) + pub fn smu(&mut self) -> SmuW { + SmuW::new(self, 7) } #[doc = "Bit 8 - SMUCFGNS Secure Access"] #[inline(always)] #[must_use] - pub fn smucfgns(&mut self) -> SMUCFGNS_W<8> { - SMUCFGNS_W::new(self) + pub fn smucfgns(&mut self) -> SmucfgnsW { + SmucfgnsW::new(self, 8) } #[doc = "Bit 9 - LETIMER0 Secure Access"] #[inline(always)] #[must_use] - pub fn letimer0(&mut self) -> LETIMER0_W<9> { - LETIMER0_W::new(self) + pub fn letimer0(&mut self) -> Letimer0W { + Letimer0W::new(self, 9) } #[doc = "Bit 10 - IADC0 Secure Access"] #[inline(always)] #[must_use] - pub fn iadc0(&mut self) -> IADC0_W<10> { - IADC0_W::new(self) + pub fn iadc0(&mut self) -> Iadc0W { + Iadc0W::new(self, 10) } #[doc = "Bit 11 - ACMP0 Secure Access"] #[inline(always)] #[must_use] - pub fn acmp0(&mut self) -> ACMP0_W<11> { - ACMP0_W::new(self) + pub fn acmp0(&mut self) -> Acmp0W { + Acmp0W::new(self, 11) } #[doc = "Bit 12 - ACMP1 Secure Access"] #[inline(always)] #[must_use] - pub fn acmp1(&mut self) -> ACMP1_W<12> { - ACMP1_W::new(self) + pub fn acmp1(&mut self) -> Acmp1W { + Acmp1W::new(self, 12) } #[doc = "Bit 13 - AMUXCP0 Secure Access"] #[inline(always)] #[must_use] - pub fn amuxcp0(&mut self) -> AMUXCP0_W<13> { - AMUXCP0_W::new(self) + pub fn amuxcp0(&mut self) -> Amuxcp0W { + Amuxcp0W::new(self, 13) } #[doc = "Bit 14 - VDAC0 Secure Access"] #[inline(always)] #[must_use] - pub fn vdac0(&mut self) -> VDAC0_W<14> { - VDAC0_W::new(self) + pub fn vdac0(&mut self) -> Vdac0W { + Vdac0W::new(self, 14) } #[doc = "Bit 15 - PCNT Secure Access"] #[inline(always)] #[must_use] - pub fn pcnt(&mut self) -> PCNT_W<15> { - PCNT_W::new(self) + pub fn pcnt(&mut self) -> PcntW { + PcntW::new(self, 15) } #[doc = "Bit 16 - LESENSE Secure Access"] #[inline(always)] #[must_use] - pub fn lesense(&mut self) -> LESENSE_W<16> { - LESENSE_W::new(self) + pub fn lesense(&mut self) -> LesenseW { + LesenseW::new(self, 16) } #[doc = "Bit 17 - HFRCO1 Secure Access"] #[inline(always)] #[must_use] - pub fn hfrco1(&mut self) -> HFRCO1_W<17> { - HFRCO1_W::new(self) + pub fn hfrco1(&mut self) -> Hfrco1W { + Hfrco1W::new(self, 17) } #[doc = "Bit 18 - HFXO0 Secure Access"] #[inline(always)] #[must_use] - pub fn hfxo0(&mut self) -> HFXO0_W<18> { - HFXO0_W::new(self) + pub fn hfxo0(&mut self) -> Hfxo0W { + Hfxo0W::new(self, 18) } #[doc = "Bit 19 - I2C0 Secure Access"] #[inline(always)] #[must_use] - pub fn i2c0(&mut self) -> I2C0_W<19> { - I2C0_W::new(self) + pub fn i2c0(&mut self) -> I2c0W { + I2c0W::new(self, 19) } #[doc = "Bit 20 - WDOG0 Secure Access"] #[inline(always)] #[must_use] - pub fn wdog0(&mut self) -> WDOG0_W<20> { - WDOG0_W::new(self) + pub fn wdog0(&mut self) -> Wdog0W { + Wdog0W::new(self, 20) } #[doc = "Bit 21 - WDOG1 Secure Access"] #[inline(always)] #[must_use] - pub fn wdog1(&mut self) -> WDOG1_W<21> { - WDOG1_W::new(self) + pub fn wdog1(&mut self) -> Wdog1W { + Wdog1W::new(self, 21) } #[doc = "Bit 22 - EUSART0 Secure Access"] #[inline(always)] #[must_use] - pub fn eusart0(&mut self) -> EUSART0_W<22> { - EUSART0_W::new(self) + pub fn eusart0(&mut self) -> Eusart0W { + Eusart0W::new(self, 22) } #[doc = "Bit 23 - SEMAILBOX Secure Access"] #[inline(always)] #[must_use] - pub fn semailbox(&mut self) -> SEMAILBOX_W<23> { - SEMAILBOX_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn semailbox(&mut self) -> SemailboxW { + SemailboxW::new(self, 23) } } -#[doc = "Set peripheral bits to 1 to mark as secure access only\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ppusatd1](index.html) module"] -pub struct PPUSATD1_SPEC; -impl crate::RegisterSpec for PPUSATD1_SPEC { +#[doc = "Set peripheral bits to 1 to mark as secure access only\n\nYou can [`read`](crate::Reg::read) this register and get [`ppusatd1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ppusatd1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ppusatd1Spec; +impl crate::RegisterSpec for Ppusatd1Spec { type Ux = u32; } -#[doc = "`read()` method returns [ppusatd1::R](R) reader structure"] -impl crate::Readable for PPUSATD1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ppusatd1::W](W) writer structure"] -impl crate::Writable for PPUSATD1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ppusatd1::R`](R) reader structure"] +impl crate::Readable for Ppusatd1Spec {} +#[doc = "`write(|w| ..)` method takes [`ppusatd1::W`](W) writer structure"] +impl crate::Writable for Ppusatd1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPUSATD1 to value 0x01ff_ffff"] -impl crate::Resettable for PPUSATD1_SPEC { - const RESET_VALUE: Self::Ux = 0x01ff_ffff; +impl crate::Resettable for Ppusatd1Spec { + const RESET_VALUE: u32 = 0x01ff_ffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/status.rs index aa5937e..7117013 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s/status.rs @@ -1,78 +1,63 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `SMULOCK` reader - SMU Lock"] -pub type SMULOCK_R = crate::BitReader; +pub type R = crate::R; #[doc = "SMU Lock\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMULOCK_A { +pub enum Smulock { #[doc = "0: UNLOCKED"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: LOCKED"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMULOCK_A) -> Self { + fn from(variant: Smulock) -> Self { variant as u8 != 0 } } -impl SMULOCK_R { +#[doc = "Field `SMULOCK` reader - SMU Lock"] +pub type SmulockR = crate::BitReader; +impl SmulockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SMULOCK_A { + pub const fn variant(&self) -> Smulock { match self.bits { - false => SMULOCK_A::UNLOCKED, - true => SMULOCK_A::LOCKED, + false => Smulock::Unlocked, + true => Smulock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "UNLOCKED"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == SMULOCK_A::UNLOCKED + *self == Smulock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "LOCKED"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == SMULOCK_A::LOCKED + *self == Smulock::Locked } } #[doc = "Field `SMUPRGERR` reader - SMU Programming Error"] -pub type SMUPRGERR_R = crate::BitReader; +pub type SmuprgerrR = crate::BitReader; impl R { #[doc = "Bit 0 - SMU Lock"] #[inline(always)] - pub fn smulock(&self) -> SMULOCK_R { - SMULOCK_R::new((self.bits & 1) != 0) + pub fn smulock(&self) -> SmulockR { + SmulockR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - SMU Programming Error"] #[inline(always)] - pub fn smuprgerr(&self) -> SMUPRGERR_R { - SMUPRGERR_R::new(((self.bits >> 1) & 1) != 0) + pub fn smuprgerr(&self) -> SmuprgerrR { + SmuprgerrR::new(((self.bits >> 1) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns.rs index d7c9725..9a8a89b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns.rs @@ -1,56 +1,106 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { _reserved0: [u8; 0x04], + nsstatus: Nsstatus, + nslock: Nslock, + nsif: Nsif, + nsien: Nsien, + _reserved4: [u8; 0x2c], + ppunspatd0: Ppunspatd0, + ppunspatd1: Ppunspatd1, + _reserved6: [u8; 0xf8], + ppunsfs: Ppunsfs, + _reserved7: [u8; 0x0c], + bmpunspatd0: Bmpunspatd0, +} +impl RegisterBlock { #[doc = "0x04 - No Description"] - pub nsstatus: NSSTATUS, + #[inline(always)] + pub const fn nsstatus(&self) -> &Nsstatus { + &self.nsstatus + } #[doc = "0x08 - No Description"] - pub nslock: NSLOCK, + #[inline(always)] + pub const fn nslock(&self) -> &Nslock { + &self.nslock + } #[doc = "0x0c - No Description"] - pub nsif: NSIF, + #[inline(always)] + pub const fn nsif(&self) -> &Nsif { + &self.nsif + } #[doc = "0x10 - No Description"] - pub nsien: NSIEN, - _reserved4: [u8; 0x2c], + #[inline(always)] + pub const fn nsien(&self) -> &Nsien { + &self.nsien + } #[doc = "0x40 - Set peripheral bits to 1 to mark as privileged access only"] - pub ppunspatd0: PPUNSPATD0, + #[inline(always)] + pub const fn ppunspatd0(&self) -> &Ppunspatd0 { + &self.ppunspatd0 + } #[doc = "0x44 - Set peripheral bits to 1 to mark as privileged access only"] - pub ppunspatd1: PPUNSPATD1, - _reserved6: [u8; 0xf8], + #[inline(always)] + pub const fn ppunspatd1(&self) -> &Ppunspatd1 { + &self.ppunspatd1 + } #[doc = "0x140 - No Description"] - pub ppunsfs: PPUNSFS, - _reserved7: [u8; 0x0c], + #[inline(always)] + pub const fn ppunsfs(&self) -> &Ppunsfs { + &self.ppunsfs + } #[doc = "0x150 - No Description"] - pub bmpunspatd0: BMPUNSPATD0, + #[inline(always)] + pub const fn bmpunspatd0(&self) -> &Bmpunspatd0 { + &self.bmpunspatd0 + } } -#[doc = "NSSTATUS (r) register accessor: an alias for `Reg`"] -pub type NSSTATUS = crate::Reg; +#[doc = "NSSTATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`nsstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nsstatus`] +module"] +#[doc(alias = "NSSTATUS")] +pub type Nsstatus = crate::Reg; #[doc = "No Description"] pub mod nsstatus; -#[doc = "NSLOCK (w) register accessor: an alias for `Reg`"] -pub type NSLOCK = crate::Reg; +#[doc = "NSLOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nslock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nslock`] +module"] +#[doc(alias = "NSLOCK")] +pub type Nslock = crate::Reg; #[doc = "No Description"] pub mod nslock; -#[doc = "NSIF (rw) register accessor: an alias for `Reg`"] -pub type NSIF = crate::Reg; +#[doc = "NSIF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`nsif::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nsif::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nsif`] +module"] +#[doc(alias = "NSIF")] +pub type Nsif = crate::Reg; #[doc = "No Description"] pub mod nsif; -#[doc = "NSIEN (rw) register accessor: an alias for `Reg`"] -pub type NSIEN = crate::Reg; +#[doc = "NSIEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`nsien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nsien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nsien`] +module"] +#[doc(alias = "NSIEN")] +pub type Nsien = crate::Reg; #[doc = "No Description"] pub mod nsien; -#[doc = "PPUNSPATD0 (rw) register accessor: an alias for `Reg`"] -pub type PPUNSPATD0 = crate::Reg; +#[doc = "PPUNSPATD0 (rw) register accessor: Set peripheral bits to 1 to mark as privileged access only\n\nYou can [`read`](crate::Reg::read) this register and get [`ppunspatd0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ppunspatd0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ppunspatd0`] +module"] +#[doc(alias = "PPUNSPATD0")] +pub type Ppunspatd0 = crate::Reg; #[doc = "Set peripheral bits to 1 to mark as privileged access only"] pub mod ppunspatd0; -#[doc = "PPUNSPATD1 (rw) register accessor: an alias for `Reg`"] -pub type PPUNSPATD1 = crate::Reg; +#[doc = "PPUNSPATD1 (rw) register accessor: Set peripheral bits to 1 to mark as privileged access only\n\nYou can [`read`](crate::Reg::read) this register and get [`ppunspatd1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ppunspatd1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ppunspatd1`] +module"] +#[doc(alias = "PPUNSPATD1")] +pub type Ppunspatd1 = crate::Reg; #[doc = "Set peripheral bits to 1 to mark as privileged access only"] pub mod ppunspatd1; -#[doc = "PPUNSFS (r) register accessor: an alias for `Reg`"] -pub type PPUNSFS = crate::Reg; +#[doc = "PPUNSFS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ppunsfs::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ppunsfs`] +module"] +#[doc(alias = "PPUNSFS")] +pub type Ppunsfs = crate::Reg; #[doc = "No Description"] pub mod ppunsfs; -#[doc = "BMPUNSPATD0 (rw) register accessor: an alias for `Reg`"] -pub type BMPUNSPATD0 = crate::Reg; +#[doc = "BMPUNSPATD0 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bmpunspatd0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bmpunspatd0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bmpunspatd0`] +module"] +#[doc(alias = "BMPUNSPATD0")] +pub type Bmpunspatd0 = crate::Reg; #[doc = "No Description"] pub mod bmpunspatd0; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/bmpunspatd0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/bmpunspatd0.rs index 6d48412..5adeabf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/bmpunspatd0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/bmpunspatd0.rs @@ -1,95 +1,55 @@ #[doc = "Register `BMPUNSPATD0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `BMPUNSPATD0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LDMA` reader - MCU LDMA privileged mode"] -pub type LDMA_R = crate::BitReader; +pub type LdmaR = crate::BitReader; #[doc = "Field `LDMA` writer - MCU LDMA privileged mode"] -pub type LDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, BMPUNSPATD0_SPEC, bool, O>; +pub type LdmaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SEEXTDMA` reader - SEEXTDMA privileged mode"] -pub type SEEXTDMA_R = crate::BitReader; +pub type SeextdmaR = crate::BitReader; #[doc = "Field `SEEXTDMA` writer - SEEXTDMA privileged mode"] -pub type SEEXTDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, BMPUNSPATD0_SPEC, bool, O>; +pub type SeextdmaW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 2 - MCU LDMA privileged mode"] #[inline(always)] - pub fn ldma(&self) -> LDMA_R { - LDMA_R::new(((self.bits >> 2) & 1) != 0) + pub fn ldma(&self) -> LdmaR { + LdmaR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 5 - SEEXTDMA privileged mode"] #[inline(always)] - pub fn seextdma(&self) -> SEEXTDMA_R { - SEEXTDMA_R::new(((self.bits >> 5) & 1) != 0) + pub fn seextdma(&self) -> SeextdmaR { + SeextdmaR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 2 - MCU LDMA privileged mode"] #[inline(always)] #[must_use] - pub fn ldma(&mut self) -> LDMA_W<2> { - LDMA_W::new(self) + pub fn ldma(&mut self) -> LdmaW { + LdmaW::new(self, 2) } #[doc = "Bit 5 - SEEXTDMA privileged mode"] #[inline(always)] #[must_use] - pub fn seextdma(&mut self) -> SEEXTDMA_W<5> { - SEEXTDMA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn seextdma(&mut self) -> SeextdmaW { + SeextdmaW::new(self, 5) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bmpunspatd0](index.html) module"] -pub struct BMPUNSPATD0_SPEC; -impl crate::RegisterSpec for BMPUNSPATD0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`bmpunspatd0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bmpunspatd0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Bmpunspatd0Spec; +impl crate::RegisterSpec for Bmpunspatd0Spec { type Ux = u32; } -#[doc = "`read()` method returns [bmpunspatd0::R](R) reader structure"] -impl crate::Readable for BMPUNSPATD0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [bmpunspatd0::W](W) writer structure"] -impl crate::Writable for BMPUNSPATD0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`bmpunspatd0::R`](R) reader structure"] +impl crate::Readable for Bmpunspatd0Spec {} +#[doc = "`write(|w| ..)` method takes [`bmpunspatd0::W`](W) writer structure"] +impl crate::Writable for Bmpunspatd0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BMPUNSPATD0 to value 0"] -impl crate::Resettable for BMPUNSPATD0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Bmpunspatd0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/nsien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/nsien.rs index 7656169..bf1f648 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/nsien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/nsien.rs @@ -1,95 +1,55 @@ #[doc = "Register `NSIEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `NSIEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PPUNSPRIV` reader - PPUNS Privilege Interrupt Enable"] -pub type PPUNSPRIV_R = crate::BitReader; +pub type PpunsprivR = crate::BitReader; #[doc = "Field `PPUNSPRIV` writer - PPUNS Privilege Interrupt Enable"] -pub type PPUNSPRIV_W<'a, const O: u8> = crate::BitWriter<'a, u32, NSIEN_SPEC, bool, O>; +pub type PpunsprivW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PPUNSINST` reader - PPUNS Instruction Interrupt Enable"] -pub type PPUNSINST_R = crate::BitReader; +pub type PpunsinstR = crate::BitReader; #[doc = "Field `PPUNSINST` writer - PPUNS Instruction Interrupt Enable"] -pub type PPUNSINST_W<'a, const O: u8> = crate::BitWriter<'a, u32, NSIEN_SPEC, bool, O>; +pub type PpunsinstW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - PPUNS Privilege Interrupt Enable"] #[inline(always)] - pub fn ppunspriv(&self) -> PPUNSPRIV_R { - PPUNSPRIV_R::new((self.bits & 1) != 0) + pub fn ppunspriv(&self) -> PpunsprivR { + PpunsprivR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - PPUNS Instruction Interrupt Enable"] #[inline(always)] - pub fn ppunsinst(&self) -> PPUNSINST_R { - PPUNSINST_R::new(((self.bits >> 2) & 1) != 0) + pub fn ppunsinst(&self) -> PpunsinstR { + PpunsinstR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - PPUNS Privilege Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ppunspriv(&mut self) -> PPUNSPRIV_W<0> { - PPUNSPRIV_W::new(self) + pub fn ppunspriv(&mut self) -> PpunsprivW { + PpunsprivW::new(self, 0) } #[doc = "Bit 2 - PPUNS Instruction Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ppunsinst(&mut self) -> PPUNSINST_W<2> { - PPUNSINST_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ppunsinst(&mut self) -> PpunsinstW { + PpunsinstW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [nsien](index.html) module"] -pub struct NSIEN_SPEC; -impl crate::RegisterSpec for NSIEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`nsien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nsien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct NsienSpec; +impl crate::RegisterSpec for NsienSpec { type Ux = u32; } -#[doc = "`read()` method returns [nsien::R](R) reader structure"] -impl crate::Readable for NSIEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [nsien::W](W) writer structure"] -impl crate::Writable for NSIEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`nsien::R`](R) reader structure"] +impl crate::Readable for NsienSpec {} +#[doc = "`write(|w| ..)` method takes [`nsien::W`](W) writer structure"] +impl crate::Writable for NsienSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NSIEN to value 0"] -impl crate::Resettable for NSIEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for NsienSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/nsif.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/nsif.rs index 24c9fe2..f3650f9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/nsif.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/nsif.rs @@ -1,95 +1,55 @@ #[doc = "Register `NSIF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `NSIF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `PPUNSPRIV` reader - PPUNS Privilege Interrupt Flag"] -pub type PPUNSPRIV_R = crate::BitReader; +pub type PpunsprivR = crate::BitReader; #[doc = "Field `PPUNSPRIV` writer - PPUNS Privilege Interrupt Flag"] -pub type PPUNSPRIV_W<'a, const O: u8> = crate::BitWriter<'a, u32, NSIF_SPEC, bool, O>; +pub type PpunsprivW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PPUNSINST` reader - PPUNS Instruction Interrupt Flag"] -pub type PPUNSINST_R = crate::BitReader; +pub type PpunsinstR = crate::BitReader; #[doc = "Field `PPUNSINST` writer - PPUNS Instruction Interrupt Flag"] -pub type PPUNSINST_W<'a, const O: u8> = crate::BitWriter<'a, u32, NSIF_SPEC, bool, O>; +pub type PpunsinstW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - PPUNS Privilege Interrupt Flag"] #[inline(always)] - pub fn ppunspriv(&self) -> PPUNSPRIV_R { - PPUNSPRIV_R::new((self.bits & 1) != 0) + pub fn ppunspriv(&self) -> PpunsprivR { + PpunsprivR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - PPUNS Instruction Interrupt Flag"] #[inline(always)] - pub fn ppunsinst(&self) -> PPUNSINST_R { - PPUNSINST_R::new(((self.bits >> 2) & 1) != 0) + pub fn ppunsinst(&self) -> PpunsinstR { + PpunsinstR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - PPUNS Privilege Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ppunspriv(&mut self) -> PPUNSPRIV_W<0> { - PPUNSPRIV_W::new(self) + pub fn ppunspriv(&mut self) -> PpunsprivW { + PpunsprivW::new(self, 0) } #[doc = "Bit 2 - PPUNS Instruction Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ppunsinst(&mut self) -> PPUNSINST_W<2> { - PPUNSINST_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ppunsinst(&mut self) -> PpunsinstW { + PpunsinstW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [nsif](index.html) module"] -pub struct NSIF_SPEC; -impl crate::RegisterSpec for NSIF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`nsif::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nsif::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct NsifSpec; +impl crate::RegisterSpec for NsifSpec { type Ux = u32; } -#[doc = "`read()` method returns [nsif::R](R) reader structure"] -impl crate::Readable for NSIF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [nsif::W](W) writer structure"] -impl crate::Writable for NSIF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`nsif::R`](R) reader structure"] +impl crate::Readable for NsifSpec {} +#[doc = "`write(|w| ..)` method takes [`nsif::W`](W) writer structure"] +impl crate::Writable for NsifSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NSIF to value 0"] -impl crate::Resettable for NSIF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for NsifSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/nslock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/nslock.rs index 9175cc2..8baae75 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/nslock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/nslock.rs @@ -1,73 +1,55 @@ #[doc = "Register `NSLOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "No Description\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum SMUNSLOCKKEY_AW { +pub enum Smunslockkey { #[doc = "11325013: Unlocks Registers"] - UNLOCK = 11325013, + Unlock = 11325013, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: SMUNSLOCKKEY_AW) -> Self { + fn from(variant: Smunslockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Smunslockkey { + type Ux = u32; +} +impl crate::IsEnum for Smunslockkey {} #[doc = "Field `SMUNSLOCKKEY` writer - No Description"] -pub type SMUNSLOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, NSLOCK_SPEC, u32, SMUNSLOCKKEY_AW, 24, O>; -impl<'a, const O: u8> SMUNSLOCKKEY_W<'a, O> { +pub type SmunslockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 24, Smunslockkey>; +impl<'a, REG> SmunslockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Unlocks Registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(SMUNSLOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Smunslockkey::Unlock) } } impl W { #[doc = "Bits 0:23 - No Description"] #[inline(always)] #[must_use] - pub fn smunslockkey(&mut self) -> SMUNSLOCKKEY_W<0> { - SMUNSLOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn smunslockkey(&mut self) -> SmunslockkeyW { + SmunslockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [nslock](index.html) module"] -pub struct NSLOCK_SPEC; -impl crate::RegisterSpec for NSLOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nslock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct NslockSpec; +impl crate::RegisterSpec for NslockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [nslock::W](W) writer structure"] -impl crate::Writable for NSLOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`nslock::W`](W) writer structure"] +impl crate::Writable for NslockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NSLOCK to value 0"] -impl crate::Resettable for NSLOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for NslockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/nsstatus.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/nsstatus.rs index 0774b66..7d99670 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/nsstatus.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/nsstatus.rs @@ -1,71 +1,56 @@ #[doc = "Register `NSSTATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `SMUNSLOCK` reader - SMUNS Lock"] -pub type SMUNSLOCK_R = crate::BitReader; +pub type R = crate::R; #[doc = "SMUNS Lock\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMUNSLOCK_A { +pub enum Smunslock { #[doc = "0: UNLOCKED"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: LOCKED"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMUNSLOCK_A) -> Self { + fn from(variant: Smunslock) -> Self { variant as u8 != 0 } } -impl SMUNSLOCK_R { +#[doc = "Field `SMUNSLOCK` reader - SMUNS Lock"] +pub type SmunslockR = crate::BitReader; +impl SmunslockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SMUNSLOCK_A { + pub const fn variant(&self) -> Smunslock { match self.bits { - false => SMUNSLOCK_A::UNLOCKED, - true => SMUNSLOCK_A::LOCKED, + false => Smunslock::Unlocked, + true => Smunslock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "UNLOCKED"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == SMUNSLOCK_A::UNLOCKED + *self == Smunslock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "LOCKED"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == SMUNSLOCK_A::LOCKED + *self == Smunslock::Locked } } impl R { #[doc = "Bit 0 - SMUNS Lock"] #[inline(always)] - pub fn smunslock(&self) -> SMUNSLOCK_R { - SMUNSLOCK_R::new((self.bits & 1) != 0) + pub fn smunslock(&self) -> SmunslockR { + SmunslockR::new((self.bits & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [nsstatus](index.html) module"] -pub struct NSSTATUS_SPEC; -impl crate::RegisterSpec for NSSTATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`nsstatus::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct NsstatusSpec; +impl crate::RegisterSpec for NsstatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [nsstatus::R](R) reader structure"] -impl crate::Readable for NSSTATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`nsstatus::R`](R) reader structure"] +impl crate::Readable for NsstatusSpec {} #[doc = "`reset()` method sets NSSTATUS to value 0"] -impl crate::Resettable for NSSTATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for NsstatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/ppunsfs.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/ppunsfs.rs index 513146d..76e0e70 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/ppunsfs.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/ppunsfs.rs @@ -1,37 +1,22 @@ #[doc = "Register `PPUNSFS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `PPUFSPERIPHID` reader - Peripheral I"] -pub type PPUFSPERIPHID_R = crate::FieldReader; +pub type PpufsperiphidR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Peripheral I"] #[inline(always)] - pub fn ppufsperiphid(&self) -> PPUFSPERIPHID_R { - PPUFSPERIPHID_R::new((self.bits & 0xff) as u8) + pub fn ppufsperiphid(&self) -> PpufsperiphidR { + PpufsperiphidR::new((self.bits & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ppunsfs](index.html) module"] -pub struct PPUNSFS_SPEC; -impl crate::RegisterSpec for PPUNSFS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ppunsfs::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PpunsfsSpec; +impl crate::RegisterSpec for PpunsfsSpec { type Ux = u32; } -#[doc = "`read()` method returns [ppunsfs::R](R) reader structure"] -impl crate::Readable for PPUNSFS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ppunsfs::R`](R) reader structure"] +impl crate::Readable for PpunsfsSpec {} #[doc = "`reset()` method sets PPUNSFS to value 0"] -impl crate::Resettable for PPUNSFS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for PpunsfsSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/ppunspatd0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/ppunspatd0.rs index 16c62e4..d698c7a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/ppunspatd0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/ppunspatd0.rs @@ -1,545 +1,505 @@ #[doc = "Register `PPUNSPATD0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PPUNSPATD0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SCRATCHPAD` reader - SCRATCHPAD Privileged Access"] -pub type SCRATCHPAD_R = crate::BitReader; +pub type ScratchpadR = crate::BitReader; #[doc = "Field `SCRATCHPAD` writer - SCRATCHPAD Privileged Access"] -pub type SCRATCHPAD_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type ScratchpadW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EMU` reader - EMU Privileged Access"] -pub type EMU_R = crate::BitReader; +pub type EmuR = crate::BitReader; #[doc = "Field `EMU` writer - EMU Privileged Access"] -pub type EMU_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type EmuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CMU` reader - CMU Privileged Access"] -pub type CMU_R = crate::BitReader; +pub type CmuR = crate::BitReader; #[doc = "Field `CMU` writer - CMU Privileged Access"] -pub type CMU_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type CmuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HFRCO0` reader - HFRCO0 Privileged Access"] -pub type HFRCO0_R = crate::BitReader; +pub type Hfrco0R = crate::BitReader; #[doc = "Field `HFRCO0` writer - HFRCO0 Privileged Access"] -pub type HFRCO0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type Hfrco0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FSRCO` reader - FSRCO Privileged Access"] -pub type FSRCO_R = crate::BitReader; +pub type FsrcoR = crate::BitReader; #[doc = "Field `FSRCO` writer - FSRCO Privileged Access"] -pub type FSRCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type FsrcoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DPLL0` reader - DPLL0 Privileged Access"] -pub type DPLL0_R = crate::BitReader; +pub type Dpll0R = crate::BitReader; #[doc = "Field `DPLL0` writer - DPLL0 Privileged Access"] -pub type DPLL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type Dpll0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LFXO` reader - LFXO Privileged Access"] -pub type LFXO_R = crate::BitReader; +pub type LfxoR = crate::BitReader; #[doc = "Field `LFXO` writer - LFXO Privileged Access"] -pub type LFXO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type LfxoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LFRCO` reader - LFRCO Privileged Access"] -pub type LFRCO_R = crate::BitReader; +pub type LfrcoR = crate::BitReader; #[doc = "Field `LFRCO` writer - LFRCO Privileged Access"] -pub type LFRCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type LfrcoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ULFRCO` reader - ULFRCO Privileged Access"] -pub type ULFRCO_R = crate::BitReader; +pub type UlfrcoR = crate::BitReader; #[doc = "Field `ULFRCO` writer - ULFRCO Privileged Access"] -pub type ULFRCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type UlfrcoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MSC` reader - MSC Privileged Access"] -pub type MSC_R = crate::BitReader; +pub type MscR = crate::BitReader; #[doc = "Field `MSC` writer - MSC Privileged Access"] -pub type MSC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type MscW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICACHE0` reader - ICACHE0 Privileged Access"] -pub type ICACHE0_R = crate::BitReader; +pub type Icache0R = crate::BitReader; #[doc = "Field `ICACHE0` writer - ICACHE0 Privileged Access"] -pub type ICACHE0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type Icache0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRS` reader - PRS Privileged Access"] -pub type PRS_R = crate::BitReader; +pub type PrsR = crate::BitReader; #[doc = "Field `PRS` writer - PRS Privileged Access"] -pub type PRS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type PrsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GPIO` reader - GPIO Privileged Access"] -pub type GPIO_R = crate::BitReader; +pub type GpioR = crate::BitReader; #[doc = "Field `GPIO` writer - GPIO Privileged Access"] -pub type GPIO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type GpioW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LDMA` reader - LDMA Privileged Access"] -pub type LDMA_R = crate::BitReader; +pub type LdmaR = crate::BitReader; #[doc = "Field `LDMA` writer - LDMA Privileged Access"] -pub type LDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type LdmaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LDMAXBAR` reader - LDMAXBAR Privileged Access"] -pub type LDMAXBAR_R = crate::BitReader; +pub type LdmaxbarR = crate::BitReader; #[doc = "Field `LDMAXBAR` writer - LDMAXBAR Privileged Access"] -pub type LDMAXBAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type LdmaxbarW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER0` reader - TIMER0 Privileged Access"] -pub type TIMER0_R = crate::BitReader; +pub type Timer0R = crate::BitReader; #[doc = "Field `TIMER0` writer - TIMER0 Privileged Access"] -pub type TIMER0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type Timer0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER1` reader - TIMER1 Privileged Access"] -pub type TIMER1_R = crate::BitReader; +pub type Timer1R = crate::BitReader; #[doc = "Field `TIMER1` writer - TIMER1 Privileged Access"] -pub type TIMER1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type Timer1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER2` reader - TIMER2 Privileged Access"] -pub type TIMER2_R = crate::BitReader; +pub type Timer2R = crate::BitReader; #[doc = "Field `TIMER2` writer - TIMER2 Privileged Access"] -pub type TIMER2_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type Timer2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER3` reader - TIMER3 Privileged Access"] -pub type TIMER3_R = crate::BitReader; +pub type Timer3R = crate::BitReader; #[doc = "Field `TIMER3` writer - TIMER3 Privileged Access"] -pub type TIMER3_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type Timer3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TIMER4` reader - TIMER4 Privileged Access"] -pub type TIMER4_R = crate::BitReader; +pub type Timer4R = crate::BitReader; #[doc = "Field `TIMER4` writer - TIMER4 Privileged Access"] -pub type TIMER4_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type Timer4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USART0` reader - USART0 Privileged Access"] -pub type USART0_R = crate::BitReader; +pub type Usart0R = crate::BitReader; #[doc = "Field `USART0` writer - USART0 Privileged Access"] -pub type USART0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type Usart0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BURTC` reader - BURTC Privileged Access"] -pub type BURTC_R = crate::BitReader; +pub type BurtcR = crate::BitReader; #[doc = "Field `BURTC` writer - BURTC Privileged Access"] -pub type BURTC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type BurtcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C1` reader - I2C1 Privileged Access"] -pub type I2C1_R = crate::BitReader; +pub type I2c1R = crate::BitReader; #[doc = "Field `I2C1` writer - I2C1 Privileged Access"] -pub type I2C1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type I2c1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHIPTESTCTRL` reader - CHIPTESTCTRL Privileged Access"] -pub type CHIPTESTCTRL_R = crate::BitReader; +pub type ChiptestctrlR = crate::BitReader; #[doc = "Field `CHIPTESTCTRL` writer - CHIPTESTCTRL Privileged Access"] -pub type CHIPTESTCTRL_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type ChiptestctrlW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYSCFGCFGNS` reader - SYSCFGCFGNS Privileged Access"] -pub type SYSCFGCFGNS_R = crate::BitReader; +pub type SyscfgcfgnsR = crate::BitReader; #[doc = "Field `SYSCFGCFGNS` writer - SYSCFGCFGNS Privileged Access"] -pub type SYSCFGCFGNS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type SyscfgcfgnsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYSCFG` reader - SYSCFG Privileged Access"] -pub type SYSCFG_R = crate::BitReader; +pub type SyscfgR = crate::BitReader; #[doc = "Field `SYSCFG` writer - SYSCFG Privileged Access"] -pub type SYSCFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type SyscfgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BURAM` reader - BURAM Privileged Access"] -pub type BURAM_R = crate::BitReader; +pub type BuramR = crate::BitReader; #[doc = "Field `BURAM` writer - BURAM Privileged Access"] -pub type BURAM_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type BuramW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GPCRC` reader - GPCRC Privileged Access"] -pub type GPCRC_R = crate::BitReader; +pub type GpcrcR = crate::BitReader; #[doc = "Field `GPCRC` writer - GPCRC Privileged Access"] -pub type GPCRC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type GpcrcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCDC` reader - DCDC Privileged Access"] -pub type DCDC_R = crate::BitReader; +pub type DcdcR = crate::BitReader; #[doc = "Field `DCDC` writer - DCDC Privileged Access"] -pub type DCDC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type DcdcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HOSTMAILBOX` reader - HOSTMAILBOX Privileged Access"] -pub type HOSTMAILBOX_R = crate::BitReader; +pub type HostmailboxR = crate::BitReader; #[doc = "Field `HOSTMAILBOX` writer - HOSTMAILBOX Privileged Access"] -pub type HOSTMAILBOX_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type HostmailboxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EUSART1` reader - EUSART1 Privileged Access"] -pub type EUSART1_R = crate::BitReader; +pub type Eusart1R = crate::BitReader; #[doc = "Field `EUSART1` writer - EUSART1 Privileged Access"] -pub type EUSART1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type Eusart1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EUSART2` reader - EUSART2 Privileged Access"] -pub type EUSART2_R = crate::BitReader; +pub type Eusart2R = crate::BitReader; #[doc = "Field `EUSART2` writer - EUSART2 Privileged Access"] -pub type EUSART2_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>; +pub type Eusart2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - SCRATCHPAD Privileged Access"] #[inline(always)] - pub fn scratchpad(&self) -> SCRATCHPAD_R { - SCRATCHPAD_R::new((self.bits & 1) != 0) + pub fn scratchpad(&self) -> ScratchpadR { + ScratchpadR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - EMU Privileged Access"] #[inline(always)] - pub fn emu(&self) -> EMU_R { - EMU_R::new(((self.bits >> 1) & 1) != 0) + pub fn emu(&self) -> EmuR { + EmuR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CMU Privileged Access"] #[inline(always)] - pub fn cmu(&self) -> CMU_R { - CMU_R::new(((self.bits >> 2) & 1) != 0) + pub fn cmu(&self) -> CmuR { + CmuR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - HFRCO0 Privileged Access"] #[inline(always)] - pub fn hfrco0(&self) -> HFRCO0_R { - HFRCO0_R::new(((self.bits >> 3) & 1) != 0) + pub fn hfrco0(&self) -> Hfrco0R { + Hfrco0R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - FSRCO Privileged Access"] #[inline(always)] - pub fn fsrco(&self) -> FSRCO_R { - FSRCO_R::new(((self.bits >> 4) & 1) != 0) + pub fn fsrco(&self) -> FsrcoR { + FsrcoR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DPLL0 Privileged Access"] #[inline(always)] - pub fn dpll0(&self) -> DPLL0_R { - DPLL0_R::new(((self.bits >> 5) & 1) != 0) + pub fn dpll0(&self) -> Dpll0R { + Dpll0R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - LFXO Privileged Access"] #[inline(always)] - pub fn lfxo(&self) -> LFXO_R { - LFXO_R::new(((self.bits >> 6) & 1) != 0) + pub fn lfxo(&self) -> LfxoR { + LfxoR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - LFRCO Privileged Access"] #[inline(always)] - pub fn lfrco(&self) -> LFRCO_R { - LFRCO_R::new(((self.bits >> 7) & 1) != 0) + pub fn lfrco(&self) -> LfrcoR { + LfrcoR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - ULFRCO Privileged Access"] #[inline(always)] - pub fn ulfrco(&self) -> ULFRCO_R { - ULFRCO_R::new(((self.bits >> 8) & 1) != 0) + pub fn ulfrco(&self) -> UlfrcoR { + UlfrcoR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - MSC Privileged Access"] #[inline(always)] - pub fn msc(&self) -> MSC_R { - MSC_R::new(((self.bits >> 9) & 1) != 0) + pub fn msc(&self) -> MscR { + MscR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - ICACHE0 Privileged Access"] #[inline(always)] - pub fn icache0(&self) -> ICACHE0_R { - ICACHE0_R::new(((self.bits >> 10) & 1) != 0) + pub fn icache0(&self) -> Icache0R { + Icache0R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - PRS Privileged Access"] #[inline(always)] - pub fn prs(&self) -> PRS_R { - PRS_R::new(((self.bits >> 11) & 1) != 0) + pub fn prs(&self) -> PrsR { + PrsR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - GPIO Privileged Access"] #[inline(always)] - pub fn gpio(&self) -> GPIO_R { - GPIO_R::new(((self.bits >> 12) & 1) != 0) + pub fn gpio(&self) -> GpioR { + GpioR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - LDMA Privileged Access"] #[inline(always)] - pub fn ldma(&self) -> LDMA_R { - LDMA_R::new(((self.bits >> 13) & 1) != 0) + pub fn ldma(&self) -> LdmaR { + LdmaR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - LDMAXBAR Privileged Access"] #[inline(always)] - pub fn ldmaxbar(&self) -> LDMAXBAR_R { - LDMAXBAR_R::new(((self.bits >> 14) & 1) != 0) + pub fn ldmaxbar(&self) -> LdmaxbarR { + LdmaxbarR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - TIMER0 Privileged Access"] #[inline(always)] - pub fn timer0(&self) -> TIMER0_R { - TIMER0_R::new(((self.bits >> 15) & 1) != 0) + pub fn timer0(&self) -> Timer0R { + Timer0R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - TIMER1 Privileged Access"] #[inline(always)] - pub fn timer1(&self) -> TIMER1_R { - TIMER1_R::new(((self.bits >> 16) & 1) != 0) + pub fn timer1(&self) -> Timer1R { + Timer1R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - TIMER2 Privileged Access"] #[inline(always)] - pub fn timer2(&self) -> TIMER2_R { - TIMER2_R::new(((self.bits >> 17) & 1) != 0) + pub fn timer2(&self) -> Timer2R { + Timer2R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - TIMER3 Privileged Access"] #[inline(always)] - pub fn timer3(&self) -> TIMER3_R { - TIMER3_R::new(((self.bits >> 18) & 1) != 0) + pub fn timer3(&self) -> Timer3R { + Timer3R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - TIMER4 Privileged Access"] #[inline(always)] - pub fn timer4(&self) -> TIMER4_R { - TIMER4_R::new(((self.bits >> 19) & 1) != 0) + pub fn timer4(&self) -> Timer4R { + Timer4R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - USART0 Privileged Access"] #[inline(always)] - pub fn usart0(&self) -> USART0_R { - USART0_R::new(((self.bits >> 20) & 1) != 0) + pub fn usart0(&self) -> Usart0R { + Usart0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - BURTC Privileged Access"] #[inline(always)] - pub fn burtc(&self) -> BURTC_R { - BURTC_R::new(((self.bits >> 21) & 1) != 0) + pub fn burtc(&self) -> BurtcR { + BurtcR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - I2C1 Privileged Access"] #[inline(always)] - pub fn i2c1(&self) -> I2C1_R { - I2C1_R::new(((self.bits >> 22) & 1) != 0) + pub fn i2c1(&self) -> I2c1R { + I2c1R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - CHIPTESTCTRL Privileged Access"] #[inline(always)] - pub fn chiptestctrl(&self) -> CHIPTESTCTRL_R { - CHIPTESTCTRL_R::new(((self.bits >> 23) & 1) != 0) + pub fn chiptestctrl(&self) -> ChiptestctrlR { + ChiptestctrlR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - SYSCFGCFGNS Privileged Access"] #[inline(always)] - pub fn syscfgcfgns(&self) -> SYSCFGCFGNS_R { - SYSCFGCFGNS_R::new(((self.bits >> 24) & 1) != 0) + pub fn syscfgcfgns(&self) -> SyscfgcfgnsR { + SyscfgcfgnsR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - SYSCFG Privileged Access"] #[inline(always)] - pub fn syscfg(&self) -> SYSCFG_R { - SYSCFG_R::new(((self.bits >> 25) & 1) != 0) + pub fn syscfg(&self) -> SyscfgR { + SyscfgR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - BURAM Privileged Access"] #[inline(always)] - pub fn buram(&self) -> BURAM_R { - BURAM_R::new(((self.bits >> 26) & 1) != 0) + pub fn buram(&self) -> BuramR { + BuramR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - GPCRC Privileged Access"] #[inline(always)] - pub fn gpcrc(&self) -> GPCRC_R { - GPCRC_R::new(((self.bits >> 27) & 1) != 0) + pub fn gpcrc(&self) -> GpcrcR { + GpcrcR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - DCDC Privileged Access"] #[inline(always)] - pub fn dcdc(&self) -> DCDC_R { - DCDC_R::new(((self.bits >> 28) & 1) != 0) + pub fn dcdc(&self) -> DcdcR { + DcdcR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - HOSTMAILBOX Privileged Access"] #[inline(always)] - pub fn hostmailbox(&self) -> HOSTMAILBOX_R { - HOSTMAILBOX_R::new(((self.bits >> 29) & 1) != 0) + pub fn hostmailbox(&self) -> HostmailboxR { + HostmailboxR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - EUSART1 Privileged Access"] #[inline(always)] - pub fn eusart1(&self) -> EUSART1_R { - EUSART1_R::new(((self.bits >> 30) & 1) != 0) + pub fn eusart1(&self) -> Eusart1R { + Eusart1R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - EUSART2 Privileged Access"] #[inline(always)] - pub fn eusart2(&self) -> EUSART2_R { - EUSART2_R::new(((self.bits >> 31) & 1) != 0) + pub fn eusart2(&self) -> Eusart2R { + Eusart2R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - SCRATCHPAD Privileged Access"] #[inline(always)] #[must_use] - pub fn scratchpad(&mut self) -> SCRATCHPAD_W<0> { - SCRATCHPAD_W::new(self) + pub fn scratchpad(&mut self) -> ScratchpadW { + ScratchpadW::new(self, 0) } #[doc = "Bit 1 - EMU Privileged Access"] #[inline(always)] #[must_use] - pub fn emu(&mut self) -> EMU_W<1> { - EMU_W::new(self) + pub fn emu(&mut self) -> EmuW { + EmuW::new(self, 1) } #[doc = "Bit 2 - CMU Privileged Access"] #[inline(always)] #[must_use] - pub fn cmu(&mut self) -> CMU_W<2> { - CMU_W::new(self) + pub fn cmu(&mut self) -> CmuW { + CmuW::new(self, 2) } #[doc = "Bit 3 - HFRCO0 Privileged Access"] #[inline(always)] #[must_use] - pub fn hfrco0(&mut self) -> HFRCO0_W<3> { - HFRCO0_W::new(self) + pub fn hfrco0(&mut self) -> Hfrco0W { + Hfrco0W::new(self, 3) } #[doc = "Bit 4 - FSRCO Privileged Access"] #[inline(always)] #[must_use] - pub fn fsrco(&mut self) -> FSRCO_W<4> { - FSRCO_W::new(self) + pub fn fsrco(&mut self) -> FsrcoW { + FsrcoW::new(self, 4) } #[doc = "Bit 5 - DPLL0 Privileged Access"] #[inline(always)] #[must_use] - pub fn dpll0(&mut self) -> DPLL0_W<5> { - DPLL0_W::new(self) + pub fn dpll0(&mut self) -> Dpll0W { + Dpll0W::new(self, 5) } #[doc = "Bit 6 - LFXO Privileged Access"] #[inline(always)] #[must_use] - pub fn lfxo(&mut self) -> LFXO_W<6> { - LFXO_W::new(self) + pub fn lfxo(&mut self) -> LfxoW { + LfxoW::new(self, 6) } #[doc = "Bit 7 - LFRCO Privileged Access"] #[inline(always)] #[must_use] - pub fn lfrco(&mut self) -> LFRCO_W<7> { - LFRCO_W::new(self) + pub fn lfrco(&mut self) -> LfrcoW { + LfrcoW::new(self, 7) } #[doc = "Bit 8 - ULFRCO Privileged Access"] #[inline(always)] #[must_use] - pub fn ulfrco(&mut self) -> ULFRCO_W<8> { - ULFRCO_W::new(self) + pub fn ulfrco(&mut self) -> UlfrcoW { + UlfrcoW::new(self, 8) } #[doc = "Bit 9 - MSC Privileged Access"] #[inline(always)] #[must_use] - pub fn msc(&mut self) -> MSC_W<9> { - MSC_W::new(self) + pub fn msc(&mut self) -> MscW { + MscW::new(self, 9) } #[doc = "Bit 10 - ICACHE0 Privileged Access"] #[inline(always)] #[must_use] - pub fn icache0(&mut self) -> ICACHE0_W<10> { - ICACHE0_W::new(self) + pub fn icache0(&mut self) -> Icache0W { + Icache0W::new(self, 10) } #[doc = "Bit 11 - PRS Privileged Access"] #[inline(always)] #[must_use] - pub fn prs(&mut self) -> PRS_W<11> { - PRS_W::new(self) + pub fn prs(&mut self) -> PrsW { + PrsW::new(self, 11) } #[doc = "Bit 12 - GPIO Privileged Access"] #[inline(always)] #[must_use] - pub fn gpio(&mut self) -> GPIO_W<12> { - GPIO_W::new(self) + pub fn gpio(&mut self) -> GpioW { + GpioW::new(self, 12) } #[doc = "Bit 13 - LDMA Privileged Access"] #[inline(always)] #[must_use] - pub fn ldma(&mut self) -> LDMA_W<13> { - LDMA_W::new(self) + pub fn ldma(&mut self) -> LdmaW { + LdmaW::new(self, 13) } #[doc = "Bit 14 - LDMAXBAR Privileged Access"] #[inline(always)] #[must_use] - pub fn ldmaxbar(&mut self) -> LDMAXBAR_W<14> { - LDMAXBAR_W::new(self) + pub fn ldmaxbar(&mut self) -> LdmaxbarW { + LdmaxbarW::new(self, 14) } #[doc = "Bit 15 - TIMER0 Privileged Access"] #[inline(always)] #[must_use] - pub fn timer0(&mut self) -> TIMER0_W<15> { - TIMER0_W::new(self) + pub fn timer0(&mut self) -> Timer0W { + Timer0W::new(self, 15) } #[doc = "Bit 16 - TIMER1 Privileged Access"] #[inline(always)] #[must_use] - pub fn timer1(&mut self) -> TIMER1_W<16> { - TIMER1_W::new(self) + pub fn timer1(&mut self) -> Timer1W { + Timer1W::new(self, 16) } #[doc = "Bit 17 - TIMER2 Privileged Access"] #[inline(always)] #[must_use] - pub fn timer2(&mut self) -> TIMER2_W<17> { - TIMER2_W::new(self) + pub fn timer2(&mut self) -> Timer2W { + Timer2W::new(self, 17) } #[doc = "Bit 18 - TIMER3 Privileged Access"] #[inline(always)] #[must_use] - pub fn timer3(&mut self) -> TIMER3_W<18> { - TIMER3_W::new(self) + pub fn timer3(&mut self) -> Timer3W { + Timer3W::new(self, 18) } #[doc = "Bit 19 - TIMER4 Privileged Access"] #[inline(always)] #[must_use] - pub fn timer4(&mut self) -> TIMER4_W<19> { - TIMER4_W::new(self) + pub fn timer4(&mut self) -> Timer4W { + Timer4W::new(self, 19) } #[doc = "Bit 20 - USART0 Privileged Access"] #[inline(always)] #[must_use] - pub fn usart0(&mut self) -> USART0_W<20> { - USART0_W::new(self) + pub fn usart0(&mut self) -> Usart0W { + Usart0W::new(self, 20) } #[doc = "Bit 21 - BURTC Privileged Access"] #[inline(always)] #[must_use] - pub fn burtc(&mut self) -> BURTC_W<21> { - BURTC_W::new(self) + pub fn burtc(&mut self) -> BurtcW { + BurtcW::new(self, 21) } #[doc = "Bit 22 - I2C1 Privileged Access"] #[inline(always)] #[must_use] - pub fn i2c1(&mut self) -> I2C1_W<22> { - I2C1_W::new(self) + pub fn i2c1(&mut self) -> I2c1W { + I2c1W::new(self, 22) } #[doc = "Bit 23 - CHIPTESTCTRL Privileged Access"] #[inline(always)] #[must_use] - pub fn chiptestctrl(&mut self) -> CHIPTESTCTRL_W<23> { - CHIPTESTCTRL_W::new(self) + pub fn chiptestctrl(&mut self) -> ChiptestctrlW { + ChiptestctrlW::new(self, 23) } #[doc = "Bit 24 - SYSCFGCFGNS Privileged Access"] #[inline(always)] #[must_use] - pub fn syscfgcfgns(&mut self) -> SYSCFGCFGNS_W<24> { - SYSCFGCFGNS_W::new(self) + pub fn syscfgcfgns(&mut self) -> SyscfgcfgnsW { + SyscfgcfgnsW::new(self, 24) } #[doc = "Bit 25 - SYSCFG Privileged Access"] #[inline(always)] #[must_use] - pub fn syscfg(&mut self) -> SYSCFG_W<25> { - SYSCFG_W::new(self) + pub fn syscfg(&mut self) -> SyscfgW { + SyscfgW::new(self, 25) } #[doc = "Bit 26 - BURAM Privileged Access"] #[inline(always)] #[must_use] - pub fn buram(&mut self) -> BURAM_W<26> { - BURAM_W::new(self) + pub fn buram(&mut self) -> BuramW { + BuramW::new(self, 26) } #[doc = "Bit 27 - GPCRC Privileged Access"] #[inline(always)] #[must_use] - pub fn gpcrc(&mut self) -> GPCRC_W<27> { - GPCRC_W::new(self) + pub fn gpcrc(&mut self) -> GpcrcW { + GpcrcW::new(self, 27) } #[doc = "Bit 28 - DCDC Privileged Access"] #[inline(always)] #[must_use] - pub fn dcdc(&mut self) -> DCDC_W<28> { - DCDC_W::new(self) + pub fn dcdc(&mut self) -> DcdcW { + DcdcW::new(self, 28) } #[doc = "Bit 29 - HOSTMAILBOX Privileged Access"] #[inline(always)] #[must_use] - pub fn hostmailbox(&mut self) -> HOSTMAILBOX_W<29> { - HOSTMAILBOX_W::new(self) + pub fn hostmailbox(&mut self) -> HostmailboxW { + HostmailboxW::new(self, 29) } #[doc = "Bit 30 - EUSART1 Privileged Access"] #[inline(always)] #[must_use] - pub fn eusart1(&mut self) -> EUSART1_W<30> { - EUSART1_W::new(self) + pub fn eusart1(&mut self) -> Eusart1W { + Eusart1W::new(self, 30) } #[doc = "Bit 31 - EUSART2 Privileged Access"] #[inline(always)] #[must_use] - pub fn eusart2(&mut self) -> EUSART2_W<31> { - EUSART2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn eusart2(&mut self) -> Eusart2W { + Eusart2W::new(self, 31) } } -#[doc = "Set peripheral bits to 1 to mark as privileged access only\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ppunspatd0](index.html) module"] -pub struct PPUNSPATD0_SPEC; -impl crate::RegisterSpec for PPUNSPATD0_SPEC { +#[doc = "Set peripheral bits to 1 to mark as privileged access only\n\nYou can [`read`](crate::Reg::read) this register and get [`ppunspatd0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ppunspatd0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ppunspatd0Spec; +impl crate::RegisterSpec for Ppunspatd0Spec { type Ux = u32; } -#[doc = "`read()` method returns [ppunspatd0::R](R) reader structure"] -impl crate::Readable for PPUNSPATD0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ppunspatd0::W](W) writer structure"] -impl crate::Writable for PPUNSPATD0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ppunspatd0::R`](R) reader structure"] +impl crate::Readable for Ppunspatd0Spec {} +#[doc = "`write(|w| ..)` method takes [`ppunspatd0::W`](W) writer structure"] +impl crate::Writable for Ppunspatd0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPUNSPATD0 to value 0"] -impl crate::Resettable for PPUNSPATD0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ppunspatd0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/ppunspatd1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/ppunspatd1.rs index 78a00d1..b482bf9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/ppunspatd1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/smu_s_cfgns/ppunspatd1.rs @@ -1,395 +1,355 @@ #[doc = "Register `PPUNSPATD1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `PPUNSPATD1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SYSRTC` reader - SYSRTC Privileged Access"] -pub type SYSRTC_R = crate::BitReader; +pub type SysrtcR = crate::BitReader; #[doc = "Field `SYSRTC` writer - SYSRTC Privileged Access"] -pub type SYSRTC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type SysrtcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LCD` reader - LCD Privileged Access"] -pub type LCD_R = crate::BitReader; +pub type LcdR = crate::BitReader; #[doc = "Field `LCD` writer - LCD Privileged Access"] -pub type LCD_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type LcdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `KEYSCAN` reader - KEYSCAN Privileged Access"] -pub type KEYSCAN_R = crate::BitReader; +pub type KeyscanR = crate::BitReader; #[doc = "Field `KEYSCAN` writer - KEYSCAN Privileged Access"] -pub type KEYSCAN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type KeyscanW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMEM` reader - DMEM Privileged Access"] -pub type DMEM_R = crate::BitReader; +pub type DmemR = crate::BitReader; #[doc = "Field `DMEM` writer - DMEM Privileged Access"] -pub type DMEM_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type DmemW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LCDRF` reader - LCDRF Privileged Access"] -pub type LCDRF_R = crate::BitReader; +pub type LcdrfR = crate::BitReader; #[doc = "Field `LCDRF` writer - LCDRF Privileged Access"] -pub type LCDRF_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type LcdrfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SMU` reader - SMU Privileged Access"] -pub type SMU_R = crate::BitReader; +pub type SmuR = crate::BitReader; #[doc = "Field `SMU` writer - SMU Privileged Access"] -pub type SMU_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type SmuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SMUCFGNS` reader - SMUCFGNS Privileged Access"] -pub type SMUCFGNS_R = crate::BitReader; +pub type SmucfgnsR = crate::BitReader; #[doc = "Field `SMUCFGNS` writer - SMUCFGNS Privileged Access"] -pub type SMUCFGNS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type SmucfgnsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LETIMER0` reader - LETIMER0 Privileged Access"] -pub type LETIMER0_R = crate::BitReader; +pub type Letimer0R = crate::BitReader; #[doc = "Field `LETIMER0` writer - LETIMER0 Privileged Access"] -pub type LETIMER0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type Letimer0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IADC0` reader - IADC0 Privileged Access"] -pub type IADC0_R = crate::BitReader; +pub type Iadc0R = crate::BitReader; #[doc = "Field `IADC0` writer - IADC0 Privileged Access"] -pub type IADC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type Iadc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMP0` reader - ACMP0 Privileged Access"] -pub type ACMP0_R = crate::BitReader; +pub type Acmp0R = crate::BitReader; #[doc = "Field `ACMP0` writer - ACMP0 Privileged Access"] -pub type ACMP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type Acmp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACMP1` reader - ACMP1 Privileged Access"] -pub type ACMP1_R = crate::BitReader; +pub type Acmp1R = crate::BitReader; #[doc = "Field `ACMP1` writer - ACMP1 Privileged Access"] -pub type ACMP1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type Acmp1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AMUXCP0` reader - AMUXCP0 Privileged Access"] -pub type AMUXCP0_R = crate::BitReader; +pub type Amuxcp0R = crate::BitReader; #[doc = "Field `AMUXCP0` writer - AMUXCP0 Privileged Access"] -pub type AMUXCP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type Amuxcp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VDAC0` reader - VDAC0 Privileged Access"] -pub type VDAC0_R = crate::BitReader; +pub type Vdac0R = crate::BitReader; #[doc = "Field `VDAC0` writer - VDAC0 Privileged Access"] -pub type VDAC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type Vdac0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PCNT` reader - PCNT Privileged Access"] -pub type PCNT_R = crate::BitReader; +pub type PcntR = crate::BitReader; #[doc = "Field `PCNT` writer - PCNT Privileged Access"] -pub type PCNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type PcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LESENSE` reader - LESENSE Privileged Access"] -pub type LESENSE_R = crate::BitReader; +pub type LesenseR = crate::BitReader; #[doc = "Field `LESENSE` writer - LESENSE Privileged Access"] -pub type LESENSE_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type LesenseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HFRCO1` reader - HFRCO1 Privileged Access"] -pub type HFRCO1_R = crate::BitReader; +pub type Hfrco1R = crate::BitReader; #[doc = "Field `HFRCO1` writer - HFRCO1 Privileged Access"] -pub type HFRCO1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type Hfrco1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HFXO0` reader - HFXO0 Privileged Access"] -pub type HFXO0_R = crate::BitReader; +pub type Hfxo0R = crate::BitReader; #[doc = "Field `HFXO0` writer - HFXO0 Privileged Access"] -pub type HFXO0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type Hfxo0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `I2C0` reader - I2C0 Privileged Access"] -pub type I2C0_R = crate::BitReader; +pub type I2c0R = crate::BitReader; #[doc = "Field `I2C0` writer - I2C0 Privileged Access"] -pub type I2C0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type I2c0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WDOG0` reader - WDOG0 Privileged Access"] -pub type WDOG0_R = crate::BitReader; +pub type Wdog0R = crate::BitReader; #[doc = "Field `WDOG0` writer - WDOG0 Privileged Access"] -pub type WDOG0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type Wdog0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WDOG1` reader - WDOG1 Privileged Access"] -pub type WDOG1_R = crate::BitReader; +pub type Wdog1R = crate::BitReader; #[doc = "Field `WDOG1` writer - WDOG1 Privileged Access"] -pub type WDOG1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type Wdog1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EUSART0` reader - EUSART0 Privileged Access"] -pub type EUSART0_R = crate::BitReader; +pub type Eusart0R = crate::BitReader; #[doc = "Field `EUSART0` writer - EUSART0 Privileged Access"] -pub type EUSART0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type Eusart0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SEMAILBOX` reader - SEMAILBOX Privileged Access"] -pub type SEMAILBOX_R = crate::BitReader; +pub type SemailboxR = crate::BitReader; #[doc = "Field `SEMAILBOX` writer - SEMAILBOX Privileged Access"] -pub type SEMAILBOX_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD1_SPEC, bool, O>; +pub type SemailboxW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - SYSRTC Privileged Access"] #[inline(always)] - pub fn sysrtc(&self) -> SYSRTC_R { - SYSRTC_R::new((self.bits & 1) != 0) + pub fn sysrtc(&self) -> SysrtcR { + SysrtcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - LCD Privileged Access"] #[inline(always)] - pub fn lcd(&self) -> LCD_R { - LCD_R::new(((self.bits >> 1) & 1) != 0) + pub fn lcd(&self) -> LcdR { + LcdR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - KEYSCAN Privileged Access"] #[inline(always)] - pub fn keyscan(&self) -> KEYSCAN_R { - KEYSCAN_R::new(((self.bits >> 2) & 1) != 0) + pub fn keyscan(&self) -> KeyscanR { + KeyscanR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DMEM Privileged Access"] #[inline(always)] - pub fn dmem(&self) -> DMEM_R { - DMEM_R::new(((self.bits >> 3) & 1) != 0) + pub fn dmem(&self) -> DmemR { + DmemR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - LCDRF Privileged Access"] #[inline(always)] - pub fn lcdrf(&self) -> LCDRF_R { - LCDRF_R::new(((self.bits >> 4) & 1) != 0) + pub fn lcdrf(&self) -> LcdrfR { + LcdrfR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 7 - SMU Privileged Access"] #[inline(always)] - pub fn smu(&self) -> SMU_R { - SMU_R::new(((self.bits >> 7) & 1) != 0) + pub fn smu(&self) -> SmuR { + SmuR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - SMUCFGNS Privileged Access"] #[inline(always)] - pub fn smucfgns(&self) -> SMUCFGNS_R { - SMUCFGNS_R::new(((self.bits >> 8) & 1) != 0) + pub fn smucfgns(&self) -> SmucfgnsR { + SmucfgnsR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - LETIMER0 Privileged Access"] #[inline(always)] - pub fn letimer0(&self) -> LETIMER0_R { - LETIMER0_R::new(((self.bits >> 9) & 1) != 0) + pub fn letimer0(&self) -> Letimer0R { + Letimer0R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - IADC0 Privileged Access"] #[inline(always)] - pub fn iadc0(&self) -> IADC0_R { - IADC0_R::new(((self.bits >> 10) & 1) != 0) + pub fn iadc0(&self) -> Iadc0R { + Iadc0R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - ACMP0 Privileged Access"] #[inline(always)] - pub fn acmp0(&self) -> ACMP0_R { - ACMP0_R::new(((self.bits >> 11) & 1) != 0) + pub fn acmp0(&self) -> Acmp0R { + Acmp0R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - ACMP1 Privileged Access"] #[inline(always)] - pub fn acmp1(&self) -> ACMP1_R { - ACMP1_R::new(((self.bits >> 12) & 1) != 0) + pub fn acmp1(&self) -> Acmp1R { + Acmp1R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - AMUXCP0 Privileged Access"] #[inline(always)] - pub fn amuxcp0(&self) -> AMUXCP0_R { - AMUXCP0_R::new(((self.bits >> 13) & 1) != 0) + pub fn amuxcp0(&self) -> Amuxcp0R { + Amuxcp0R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - VDAC0 Privileged Access"] #[inline(always)] - pub fn vdac0(&self) -> VDAC0_R { - VDAC0_R::new(((self.bits >> 14) & 1) != 0) + pub fn vdac0(&self) -> Vdac0R { + Vdac0R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - PCNT Privileged Access"] #[inline(always)] - pub fn pcnt(&self) -> PCNT_R { - PCNT_R::new(((self.bits >> 15) & 1) != 0) + pub fn pcnt(&self) -> PcntR { + PcntR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - LESENSE Privileged Access"] #[inline(always)] - pub fn lesense(&self) -> LESENSE_R { - LESENSE_R::new(((self.bits >> 16) & 1) != 0) + pub fn lesense(&self) -> LesenseR { + LesenseR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - HFRCO1 Privileged Access"] #[inline(always)] - pub fn hfrco1(&self) -> HFRCO1_R { - HFRCO1_R::new(((self.bits >> 17) & 1) != 0) + pub fn hfrco1(&self) -> Hfrco1R { + Hfrco1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - HFXO0 Privileged Access"] #[inline(always)] - pub fn hfxo0(&self) -> HFXO0_R { - HFXO0_R::new(((self.bits >> 18) & 1) != 0) + pub fn hfxo0(&self) -> Hfxo0R { + Hfxo0R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - I2C0 Privileged Access"] #[inline(always)] - pub fn i2c0(&self) -> I2C0_R { - I2C0_R::new(((self.bits >> 19) & 1) != 0) + pub fn i2c0(&self) -> I2c0R { + I2c0R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - WDOG0 Privileged Access"] #[inline(always)] - pub fn wdog0(&self) -> WDOG0_R { - WDOG0_R::new(((self.bits >> 20) & 1) != 0) + pub fn wdog0(&self) -> Wdog0R { + Wdog0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - WDOG1 Privileged Access"] #[inline(always)] - pub fn wdog1(&self) -> WDOG1_R { - WDOG1_R::new(((self.bits >> 21) & 1) != 0) + pub fn wdog1(&self) -> Wdog1R { + Wdog1R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - EUSART0 Privileged Access"] #[inline(always)] - pub fn eusart0(&self) -> EUSART0_R { - EUSART0_R::new(((self.bits >> 22) & 1) != 0) + pub fn eusart0(&self) -> Eusart0R { + Eusart0R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - SEMAILBOX Privileged Access"] #[inline(always)] - pub fn semailbox(&self) -> SEMAILBOX_R { - SEMAILBOX_R::new(((self.bits >> 23) & 1) != 0) + pub fn semailbox(&self) -> SemailboxR { + SemailboxR::new(((self.bits >> 23) & 1) != 0) } } impl W { #[doc = "Bit 0 - SYSRTC Privileged Access"] #[inline(always)] #[must_use] - pub fn sysrtc(&mut self) -> SYSRTC_W<0> { - SYSRTC_W::new(self) + pub fn sysrtc(&mut self) -> SysrtcW { + SysrtcW::new(self, 0) } #[doc = "Bit 1 - LCD Privileged Access"] #[inline(always)] #[must_use] - pub fn lcd(&mut self) -> LCD_W<1> { - LCD_W::new(self) + pub fn lcd(&mut self) -> LcdW { + LcdW::new(self, 1) } #[doc = "Bit 2 - KEYSCAN Privileged Access"] #[inline(always)] #[must_use] - pub fn keyscan(&mut self) -> KEYSCAN_W<2> { - KEYSCAN_W::new(self) + pub fn keyscan(&mut self) -> KeyscanW { + KeyscanW::new(self, 2) } #[doc = "Bit 3 - DMEM Privileged Access"] #[inline(always)] #[must_use] - pub fn dmem(&mut self) -> DMEM_W<3> { - DMEM_W::new(self) + pub fn dmem(&mut self) -> DmemW { + DmemW::new(self, 3) } #[doc = "Bit 4 - LCDRF Privileged Access"] #[inline(always)] #[must_use] - pub fn lcdrf(&mut self) -> LCDRF_W<4> { - LCDRF_W::new(self) + pub fn lcdrf(&mut self) -> LcdrfW { + LcdrfW::new(self, 4) } #[doc = "Bit 7 - SMU Privileged Access"] #[inline(always)] #[must_use] - pub fn smu(&mut self) -> SMU_W<7> { - SMU_W::new(self) + pub fn smu(&mut self) -> SmuW { + SmuW::new(self, 7) } #[doc = "Bit 8 - SMUCFGNS Privileged Access"] #[inline(always)] #[must_use] - pub fn smucfgns(&mut self) -> SMUCFGNS_W<8> { - SMUCFGNS_W::new(self) + pub fn smucfgns(&mut self) -> SmucfgnsW { + SmucfgnsW::new(self, 8) } #[doc = "Bit 9 - LETIMER0 Privileged Access"] #[inline(always)] #[must_use] - pub fn letimer0(&mut self) -> LETIMER0_W<9> { - LETIMER0_W::new(self) + pub fn letimer0(&mut self) -> Letimer0W { + Letimer0W::new(self, 9) } #[doc = "Bit 10 - IADC0 Privileged Access"] #[inline(always)] #[must_use] - pub fn iadc0(&mut self) -> IADC0_W<10> { - IADC0_W::new(self) + pub fn iadc0(&mut self) -> Iadc0W { + Iadc0W::new(self, 10) } #[doc = "Bit 11 - ACMP0 Privileged Access"] #[inline(always)] #[must_use] - pub fn acmp0(&mut self) -> ACMP0_W<11> { - ACMP0_W::new(self) + pub fn acmp0(&mut self) -> Acmp0W { + Acmp0W::new(self, 11) } #[doc = "Bit 12 - ACMP1 Privileged Access"] #[inline(always)] #[must_use] - pub fn acmp1(&mut self) -> ACMP1_W<12> { - ACMP1_W::new(self) + pub fn acmp1(&mut self) -> Acmp1W { + Acmp1W::new(self, 12) } #[doc = "Bit 13 - AMUXCP0 Privileged Access"] #[inline(always)] #[must_use] - pub fn amuxcp0(&mut self) -> AMUXCP0_W<13> { - AMUXCP0_W::new(self) + pub fn amuxcp0(&mut self) -> Amuxcp0W { + Amuxcp0W::new(self, 13) } #[doc = "Bit 14 - VDAC0 Privileged Access"] #[inline(always)] #[must_use] - pub fn vdac0(&mut self) -> VDAC0_W<14> { - VDAC0_W::new(self) + pub fn vdac0(&mut self) -> Vdac0W { + Vdac0W::new(self, 14) } #[doc = "Bit 15 - PCNT Privileged Access"] #[inline(always)] #[must_use] - pub fn pcnt(&mut self) -> PCNT_W<15> { - PCNT_W::new(self) + pub fn pcnt(&mut self) -> PcntW { + PcntW::new(self, 15) } #[doc = "Bit 16 - LESENSE Privileged Access"] #[inline(always)] #[must_use] - pub fn lesense(&mut self) -> LESENSE_W<16> { - LESENSE_W::new(self) + pub fn lesense(&mut self) -> LesenseW { + LesenseW::new(self, 16) } #[doc = "Bit 17 - HFRCO1 Privileged Access"] #[inline(always)] #[must_use] - pub fn hfrco1(&mut self) -> HFRCO1_W<17> { - HFRCO1_W::new(self) + pub fn hfrco1(&mut self) -> Hfrco1W { + Hfrco1W::new(self, 17) } #[doc = "Bit 18 - HFXO0 Privileged Access"] #[inline(always)] #[must_use] - pub fn hfxo0(&mut self) -> HFXO0_W<18> { - HFXO0_W::new(self) + pub fn hfxo0(&mut self) -> Hfxo0W { + Hfxo0W::new(self, 18) } #[doc = "Bit 19 - I2C0 Privileged Access"] #[inline(always)] #[must_use] - pub fn i2c0(&mut self) -> I2C0_W<19> { - I2C0_W::new(self) + pub fn i2c0(&mut self) -> I2c0W { + I2c0W::new(self, 19) } #[doc = "Bit 20 - WDOG0 Privileged Access"] #[inline(always)] #[must_use] - pub fn wdog0(&mut self) -> WDOG0_W<20> { - WDOG0_W::new(self) + pub fn wdog0(&mut self) -> Wdog0W { + Wdog0W::new(self, 20) } #[doc = "Bit 21 - WDOG1 Privileged Access"] #[inline(always)] #[must_use] - pub fn wdog1(&mut self) -> WDOG1_W<21> { - WDOG1_W::new(self) + pub fn wdog1(&mut self) -> Wdog1W { + Wdog1W::new(self, 21) } #[doc = "Bit 22 - EUSART0 Privileged Access"] #[inline(always)] #[must_use] - pub fn eusart0(&mut self) -> EUSART0_W<22> { - EUSART0_W::new(self) + pub fn eusart0(&mut self) -> Eusart0W { + Eusart0W::new(self, 22) } #[doc = "Bit 23 - SEMAILBOX Privileged Access"] #[inline(always)] #[must_use] - pub fn semailbox(&mut self) -> SEMAILBOX_W<23> { - SEMAILBOX_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn semailbox(&mut self) -> SemailboxW { + SemailboxW::new(self, 23) } } -#[doc = "Set peripheral bits to 1 to mark as privileged access only\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ppunspatd1](index.html) module"] -pub struct PPUNSPATD1_SPEC; -impl crate::RegisterSpec for PPUNSPATD1_SPEC { +#[doc = "Set peripheral bits to 1 to mark as privileged access only\n\nYou can [`read`](crate::Reg::read) this register and get [`ppunspatd1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ppunspatd1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ppunspatd1Spec; +impl crate::RegisterSpec for Ppunspatd1Spec { type Ux = u32; } -#[doc = "`read()` method returns [ppunspatd1::R](R) reader structure"] -impl crate::Readable for PPUNSPATD1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ppunspatd1::W](W) writer structure"] -impl crate::Writable for PPUNSPATD1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ppunspatd1::R`](R) reader structure"] +impl crate::Readable for Ppunspatd1Spec {} +#[doc = "`write(|w| ..)` method takes [`ppunspatd1::W`](W) writer structure"] +impl crate::Writable for Ppunspatd1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPUNSPATD1 to value 0"] -impl crate::Resettable for PPUNSPATD1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ppunspatd1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns.rs index 8e028f5..4da41d2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns.rs @@ -1,102 +1,194 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { _reserved0: [u8; 0x04], + ipversion: Ipversion, + if_: If, + ien: Ien, + _reserved3: [u8; 0x04], + chiprevhw: Chiprevhw, + chiprev: Chiprev, + _reserved5: [u8; 0x08], + cfgsystic: Cfgsystic, + _reserved6: [u8; 0x01d8], + ctrl: Ctrl, + _reserved7: [u8; 0x04], + dmem0retnctrl: Dmem0retnctrl, + _reserved8: [u8; 0x0100], + rambiasconf: Rambiasconf, + _reserved9: [u8; 0x0108], + icacheramretnctrl: Icacheramretnctrl, + dmem0portmapsel: Dmem0portmapsel, + _reserved11: [u8; 0x01e0], + rootdata0: Rootdata0, + rootdata1: Rootdata1, + rootlockstatus: Rootlockstatus, + rootseswversion: Rootseswversion, +} +impl RegisterBlock { #[doc = "0x04 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x08 - Read to get system status."] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x0c - Write to enable interrupts."] - pub ien: IEN, - _reserved3: [u8; 0x04], + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x14 - Read to get the hard-wired chip revision."] - pub chiprevhw: CHIPREVHW, + #[inline(always)] + pub const fn chiprevhw(&self) -> &Chiprevhw { + &self.chiprevhw + } #[doc = "0x18 - Read to get the chip revision programmed by feature configuration."] - pub chiprev: CHIPREV, - _reserved5: [u8; 0x08], + #[inline(always)] + pub const fn chiprev(&self) -> &Chiprev { + &self.chiprev + } #[doc = "0x24 - Configure the source of the system tick for the M33."] - pub cfgsystic: CFGSYSTIC, - _reserved6: [u8; 0x01d8], + #[inline(always)] + pub const fn cfgsystic(&self) -> &Cfgsystic { + &self.cfgsystic + } #[doc = "0x200 - Configure to provide general RAM configuration."] - pub ctrl: CTRL, - _reserved7: [u8; 0x04], + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x208 - Configure to provide general RAM retention configuration."] - pub dmem0retnctrl: DMEM0RETNCTRL, - _reserved8: [u8; 0x0100], + #[inline(always)] + pub const fn dmem0retnctrl(&self) -> &Dmem0retnctrl { + &self.dmem0retnctrl + } #[doc = "0x30c - Configure RAM bias configure bits."] - pub rambiasconf: RAMBIASCONF, - _reserved9: [u8; 0x0108], + #[inline(always)] + pub const fn rambiasconf(&self) -> &Rambiasconf { + &self.rambiasconf + } #[doc = "0x418 - Configure Host ICACHERAM retention configuration."] - pub icacheramretnctrl: ICACHERAMRETNCTRL, + #[inline(always)] + pub const fn icacheramretnctrl(&self) -> &Icacheramretnctrl { + &self.icacheramretnctrl + } #[doc = "0x41c - Configure DMEM0 port remap selection."] - pub dmem0portmapsel: DMEM0PORTMAPSEL, - _reserved11: [u8; 0x01e0], + #[inline(always)] + pub const fn dmem0portmapsel(&self) -> &Dmem0portmapsel { + &self.dmem0portmapsel + } #[doc = "0x600 - Generic data space for user to pass to root, e.g., address of struct in mem"] - pub rootdata0: ROOTDATA0, + #[inline(always)] + pub const fn rootdata0(&self) -> &Rootdata0 { + &self.rootdata0 + } #[doc = "0x604 - Generic data space for user to pass to root, e.g., address of struct in mem"] - pub rootdata1: ROOTDATA1, + #[inline(always)] + pub const fn rootdata1(&self) -> &Rootdata1 { + &self.rootdata1 + } #[doc = "0x608 - This register returns the status of the SE managed locks."] - pub rootlockstatus: ROOTLOCKSTATUS, + #[inline(always)] + pub const fn rootlockstatus(&self) -> &Rootlockstatus { + &self.rootlockstatus + } #[doc = "0x60c - SE Software version"] - pub rootseswversion: ROOTSESWVERSION, + #[inline(always)] + pub const fn rootseswversion(&self) -> &Rootseswversion { + &self.rootseswversion + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: Read to get system status.\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "Read to get system status."] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: Write to enable interrupts.\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "Write to enable interrupts."] pub mod ien; -#[doc = "CHIPREVHW (rw) register accessor: an alias for `Reg`"] -pub type CHIPREVHW = crate::Reg; +#[doc = "CHIPREVHW (rw) register accessor: Read to get the hard-wired chip revision.\n\nYou can [`read`](crate::Reg::read) this register and get [`chiprevhw::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chiprevhw::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chiprevhw`] +module"] +#[doc(alias = "CHIPREVHW")] +pub type Chiprevhw = crate::Reg; #[doc = "Read to get the hard-wired chip revision."] pub mod chiprevhw; -#[doc = "CHIPREV (rw) register accessor: an alias for `Reg`"] -pub type CHIPREV = crate::Reg; +#[doc = "CHIPREV (rw) register accessor: Read to get the chip revision programmed by feature configuration.\n\nYou can [`read`](crate::Reg::read) this register and get [`chiprev::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chiprev::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chiprev`] +module"] +#[doc(alias = "CHIPREV")] +pub type Chiprev = crate::Reg; #[doc = "Read to get the chip revision programmed by feature configuration."] pub mod chiprev; -#[doc = "CFGSYSTIC (rw) register accessor: an alias for `Reg`"] -pub type CFGSYSTIC = crate::Reg; +#[doc = "CFGSYSTIC (rw) register accessor: Configure the source of the system tick for the M33.\n\nYou can [`read`](crate::Reg::read) this register and get [`cfgsystic::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgsystic::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfgsystic`] +module"] +#[doc(alias = "CFGSYSTIC")] +pub type Cfgsystic = crate::Reg; #[doc = "Configure the source of the system tick for the M33."] pub mod cfgsystic; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: Configure to provide general RAM configuration.\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "Configure to provide general RAM configuration."] pub mod ctrl; -#[doc = "DMEM0RETNCTRL (rw) register accessor: an alias for `Reg`"] -pub type DMEM0RETNCTRL = crate::Reg; +#[doc = "DMEM0RETNCTRL (rw) register accessor: Configure to provide general RAM retention configuration.\n\nYou can [`read`](crate::Reg::read) this register and get [`dmem0retnctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmem0retnctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmem0retnctrl`] +module"] +#[doc(alias = "DMEM0RETNCTRL")] +pub type Dmem0retnctrl = crate::Reg; #[doc = "Configure to provide general RAM retention configuration."] pub mod dmem0retnctrl; -#[doc = "RAMBIASCONF (rw) register accessor: an alias for `Reg`"] -pub type RAMBIASCONF = crate::Reg; +#[doc = "RAMBIASCONF (rw) register accessor: Configure RAM bias configure bits.\n\nYou can [`read`](crate::Reg::read) this register and get [`rambiasconf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rambiasconf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rambiasconf`] +module"] +#[doc(alias = "RAMBIASCONF")] +pub type Rambiasconf = crate::Reg; #[doc = "Configure RAM bias configure bits."] pub mod rambiasconf; -#[doc = "ICACHERAMRETNCTRL (rw) register accessor: an alias for `Reg`"] -pub type ICACHERAMRETNCTRL = crate::Reg; +#[doc = "ICACHERAMRETNCTRL (rw) register accessor: Configure Host ICACHERAM retention configuration.\n\nYou can [`read`](crate::Reg::read) this register and get [`icacheramretnctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icacheramretnctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icacheramretnctrl`] +module"] +#[doc(alias = "ICACHERAMRETNCTRL")] +pub type Icacheramretnctrl = crate::Reg; #[doc = "Configure Host ICACHERAM retention configuration."] pub mod icacheramretnctrl; -#[doc = "DMEM0PORTMAPSEL (rw) register accessor: an alias for `Reg`"] -pub type DMEM0PORTMAPSEL = crate::Reg; +#[doc = "DMEM0PORTMAPSEL (rw) register accessor: Configure DMEM0 port remap selection.\n\nYou can [`read`](crate::Reg::read) this register and get [`dmem0portmapsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmem0portmapsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmem0portmapsel`] +module"] +#[doc(alias = "DMEM0PORTMAPSEL")] +pub type Dmem0portmapsel = crate::Reg; #[doc = "Configure DMEM0 port remap selection."] pub mod dmem0portmapsel; -#[doc = "ROOTDATA0 (rw) register accessor: an alias for `Reg`"] -pub type ROOTDATA0 = crate::Reg; +#[doc = "ROOTDATA0 (rw) register accessor: Generic data space for user to pass to root, e.g., address of struct in mem\n\nYou can [`read`](crate::Reg::read) this register and get [`rootdata0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rootdata0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rootdata0`] +module"] +#[doc(alias = "ROOTDATA0")] +pub type Rootdata0 = crate::Reg; #[doc = "Generic data space for user to pass to root, e.g., address of struct in mem"] pub mod rootdata0; -#[doc = "ROOTDATA1 (rw) register accessor: an alias for `Reg`"] -pub type ROOTDATA1 = crate::Reg; +#[doc = "ROOTDATA1 (rw) register accessor: Generic data space for user to pass to root, e.g., address of struct in mem\n\nYou can [`read`](crate::Reg::read) this register and get [`rootdata1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rootdata1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rootdata1`] +module"] +#[doc(alias = "ROOTDATA1")] +pub type Rootdata1 = crate::Reg; #[doc = "Generic data space for user to pass to root, e.g., address of struct in mem"] pub mod rootdata1; -#[doc = "ROOTLOCKSTATUS (r) register accessor: an alias for `Reg`"] -pub type ROOTLOCKSTATUS = crate::Reg; +#[doc = "ROOTLOCKSTATUS (r) register accessor: This register returns the status of the SE managed locks.\n\nYou can [`read`](crate::Reg::read) this register and get [`rootlockstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rootlockstatus`] +module"] +#[doc(alias = "ROOTLOCKSTATUS")] +pub type Rootlockstatus = crate::Reg; #[doc = "This register returns the status of the SE managed locks."] pub mod rootlockstatus; -#[doc = "ROOTSESWVERSION (rw) register accessor: an alias for `Reg`"] -pub type ROOTSESWVERSION = crate::Reg; +#[doc = "ROOTSESWVERSION (rw) register accessor: SE Software version\n\nYou can [`read`](crate::Reg::read) this register and get [`rootseswversion::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rootseswversion::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rootseswversion`] +module"] +#[doc(alias = "ROOTSESWVERSION")] +pub type Rootseswversion = crate::Reg; #[doc = "SE Software version"] pub mod rootseswversion; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/cfgsystic.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/cfgsystic.rs index 5eac7f3..11cf15a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/cfgsystic.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/cfgsystic.rs @@ -1,80 +1,40 @@ #[doc = "Register `CFGSYSTIC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFGSYSTIC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SYSTICEXTCLKEN` reader - SysTick External Clock Enable"] -pub type SYSTICEXTCLKEN_R = crate::BitReader; +pub type SysticextclkenR = crate::BitReader; #[doc = "Field `SYSTICEXTCLKEN` writer - SysTick External Clock Enable"] -pub type SYSTICEXTCLKEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFGSYSTIC_SPEC, bool, O>; +pub type SysticextclkenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - SysTick External Clock Enable"] #[inline(always)] - pub fn systicextclken(&self) -> SYSTICEXTCLKEN_R { - SYSTICEXTCLKEN_R::new((self.bits & 1) != 0) + pub fn systicextclken(&self) -> SysticextclkenR { + SysticextclkenR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - SysTick External Clock Enable"] #[inline(always)] #[must_use] - pub fn systicextclken(&mut self) -> SYSTICEXTCLKEN_W<0> { - SYSTICEXTCLKEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn systicextclken(&mut self) -> SysticextclkenW { + SysticextclkenW::new(self, 0) } } -#[doc = "Configure the source of the system tick for the M33.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfgsystic](index.html) module"] -pub struct CFGSYSTIC_SPEC; -impl crate::RegisterSpec for CFGSYSTIC_SPEC { +#[doc = "Configure the source of the system tick for the M33.\n\nYou can [`read`](crate::Reg::read) this register and get [`cfgsystic::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgsystic::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgsysticSpec; +impl crate::RegisterSpec for CfgsysticSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfgsystic::R](R) reader structure"] -impl crate::Readable for CFGSYSTIC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfgsystic::W](W) writer structure"] -impl crate::Writable for CFGSYSTIC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfgsystic::R`](R) reader structure"] +impl crate::Readable for CfgsysticSpec {} +#[doc = "`write(|w| ..)` method takes [`cfgsystic::W`](W) writer structure"] +impl crate::Writable for CfgsysticSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFGSYSTIC to value 0"] -impl crate::Resettable for CFGSYSTIC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CfgsysticSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/chiprev.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/chiprev.rs index 3fdcc1a..e41fa26 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/chiprev.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/chiprev.rs @@ -1,110 +1,152 @@ #[doc = "Register `CHIPREV` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; +pub type R = crate::R; +#[doc = "Register `CHIPREV` writer"] +pub type W = crate::W; +#[doc = "Field `MAJOR` reader - Chip Revision Major value"] +pub type MajorR = crate::FieldReader; +#[doc = "Field `MAJOR` writer - Chip Revision Major value"] +pub type MajorW<'a, REG> = crate::FieldWriter<'a, REG, 6>; +#[doc = "Chip Family value\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq, Eq)] +#[repr(u8)] +pub enum Family { + #[doc = "26: Product is in PG23 family"] + Pg23 = 26, + #[doc = "56: Product is in FG23 family"] + Fg23 = 56, + #[doc = "57: Product is in ZG23 family"] + Zg23 = 57, + #[doc = "58: Product is in SG23 family"] + Sg23 = 58, +} +impl From for u8 { #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 + fn from(variant: Family) -> Self { + variant as _ } } -impl From> for R { +impl crate::FieldSpec for Family { + type Ux = u8; +} +impl crate::IsEnum for Family {} +#[doc = "Field `FAMILY` reader - Chip Family value"] +pub type FamilyR = crate::FieldReader; +impl FamilyR { + #[doc = "Get enumerated values variant"] #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) + pub const fn variant(&self) -> Option { + match self.bits { + 26 => Some(Family::Pg23), + 56 => Some(Family::Fg23), + 57 => Some(Family::Zg23), + 58 => Some(Family::Sg23), + _ => None, + } } -} -#[doc = "Register `CHIPREV` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; + #[doc = "Product is in PG23 family"] #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 + pub fn is_pg23(&self) -> bool { + *self == Family::Pg23 } -} -impl core::ops::DerefMut for W { + #[doc = "Product is in FG23 family"] #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 + pub fn is_fg23(&self) -> bool { + *self == Family::Fg23 } -} -impl From> for W { + #[doc = "Product is in ZG23 family"] #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) + pub fn is_zg23(&self) -> bool { + *self == Family::Zg23 + } + #[doc = "Product is in SG23 family"] + #[inline(always)] + pub fn is_sg23(&self) -> bool { + *self == Family::Sg23 } } -#[doc = "Field `MAJOR` reader - Chip Revision Major value"] -pub type MAJOR_R = crate::FieldReader; -#[doc = "Field `MAJOR` writer - Chip Revision Major value"] -pub type MAJOR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CHIPREV_SPEC, u8, u8, 6, O>; -#[doc = "Field `FAMILY` reader - Chip Family value"] -pub type FAMILY_R = crate::FieldReader; #[doc = "Field `FAMILY` writer - Chip Family value"] -pub type FAMILY_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CHIPREV_SPEC, u8, u8, 6, O>; +pub type FamilyW<'a, REG> = crate::FieldWriter<'a, REG, 6, Family>; +impl<'a, REG> FamilyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ + #[doc = "Product is in PG23 family"] + #[inline(always)] + pub fn pg23(self) -> &'a mut crate::W { + self.variant(Family::Pg23) + } + #[doc = "Product is in FG23 family"] + #[inline(always)] + pub fn fg23(self) -> &'a mut crate::W { + self.variant(Family::Fg23) + } + #[doc = "Product is in ZG23 family"] + #[inline(always)] + pub fn zg23(self) -> &'a mut crate::W { + self.variant(Family::Zg23) + } + #[doc = "Product is in SG23 family"] + #[inline(always)] + pub fn sg23(self) -> &'a mut crate::W { + self.variant(Family::Sg23) + } +} #[doc = "Field `MINOR` reader - Chip Revision Minor value"] -pub type MINOR_R = crate::FieldReader; +pub type MinorR = crate::FieldReader; #[doc = "Field `MINOR` writer - Chip Revision Minor value"] -pub type MINOR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CHIPREV_SPEC, u8, u8, 8, O>; +pub type MinorW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:5 - Chip Revision Major value"] #[inline(always)] - pub fn major(&self) -> MAJOR_R { - MAJOR_R::new((self.bits & 0x3f) as u8) + pub fn major(&self) -> MajorR { + MajorR::new((self.bits & 0x3f) as u8) } #[doc = "Bits 6:11 - Chip Family value"] #[inline(always)] - pub fn family(&self) -> FAMILY_R { - FAMILY_R::new(((self.bits >> 6) & 0x3f) as u8) + pub fn family(&self) -> FamilyR { + FamilyR::new(((self.bits >> 6) & 0x3f) as u8) } #[doc = "Bits 12:19 - Chip Revision Minor value"] #[inline(always)] - pub fn minor(&self) -> MINOR_R { - MINOR_R::new(((self.bits >> 12) & 0xff) as u8) + pub fn minor(&self) -> MinorR { + MinorR::new(((self.bits >> 12) & 0xff) as u8) } } impl W { #[doc = "Bits 0:5 - Chip Revision Major value"] #[inline(always)] #[must_use] - pub fn major(&mut self) -> MAJOR_W<0> { - MAJOR_W::new(self) + pub fn major(&mut self) -> MajorW { + MajorW::new(self, 0) } #[doc = "Bits 6:11 - Chip Family value"] #[inline(always)] #[must_use] - pub fn family(&mut self) -> FAMILY_W<6> { - FAMILY_W::new(self) + pub fn family(&mut self) -> FamilyW { + FamilyW::new(self, 6) } #[doc = "Bits 12:19 - Chip Revision Minor value"] #[inline(always)] #[must_use] - pub fn minor(&mut self) -> MINOR_W<12> { - MINOR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn minor(&mut self) -> MinorW { + MinorW::new(self, 12) } } -#[doc = "Read to get the chip revision programmed by feature configuration.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chiprev](index.html) module"] -pub struct CHIPREV_SPEC; -impl crate::RegisterSpec for CHIPREV_SPEC { +#[doc = "Read to get the chip revision programmed by feature configuration.\n\nYou can [`read`](crate::Reg::read) this register and get [`chiprev::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chiprev::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ChiprevSpec; +impl crate::RegisterSpec for ChiprevSpec { type Ux = u32; } -#[doc = "`read()` method returns [chiprev::R](R) reader structure"] -impl crate::Readable for CHIPREV_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [chiprev::W](W) writer structure"] -impl crate::Writable for CHIPREV_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`chiprev::R`](R) reader structure"] +impl crate::Readable for ChiprevSpec {} +#[doc = "`write(|w| ..)` method takes [`chiprev::W`](W) writer structure"] +impl crate::Writable for ChiprevSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHIPREV to value 0"] -impl crate::Resettable for CHIPREV_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ChiprevSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/chiprevhw.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/chiprevhw.rs index 17e94d9..c609d3a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/chiprevhw.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/chiprevhw.rs @@ -1,110 +1,70 @@ #[doc = "Register `CHIPREVHW` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CHIPREVHW` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `MAJOR` reader - Hardwired Chip Revision Major value"] -pub type MAJOR_R = crate::FieldReader; +pub type MajorR = crate::FieldReader; #[doc = "Field `MAJOR` writer - Hardwired Chip Revision Major value"] -pub type MAJOR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CHIPREVHW_SPEC, u8, u8, 6, O>; +pub type MajorW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `FAMILY` reader - Hardwired Chip Family value"] -pub type FAMILY_R = crate::FieldReader; +pub type FamilyR = crate::FieldReader; #[doc = "Field `FAMILY` writer - Hardwired Chip Family value"] -pub type FAMILY_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CHIPREVHW_SPEC, u8, u8, 6, O>; +pub type FamilyW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `MINOR` reader - Hardwired Chip Revision Minor value"] -pub type MINOR_R = crate::FieldReader; +pub type MinorR = crate::FieldReader; #[doc = "Field `MINOR` writer - Hardwired Chip Revision Minor value"] -pub type MINOR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CHIPREVHW_SPEC, u8, u8, 8, O>; +pub type MinorW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:5 - Hardwired Chip Revision Major value"] #[inline(always)] - pub fn major(&self) -> MAJOR_R { - MAJOR_R::new((self.bits & 0x3f) as u8) + pub fn major(&self) -> MajorR { + MajorR::new((self.bits & 0x3f) as u8) } #[doc = "Bits 6:11 - Hardwired Chip Family value"] #[inline(always)] - pub fn family(&self) -> FAMILY_R { - FAMILY_R::new(((self.bits >> 6) & 0x3f) as u8) + pub fn family(&self) -> FamilyR { + FamilyR::new(((self.bits >> 6) & 0x3f) as u8) } #[doc = "Bits 12:19 - Hardwired Chip Revision Minor value"] #[inline(always)] - pub fn minor(&self) -> MINOR_R { - MINOR_R::new(((self.bits >> 12) & 0xff) as u8) + pub fn minor(&self) -> MinorR { + MinorR::new(((self.bits >> 12) & 0xff) as u8) } } impl W { #[doc = "Bits 0:5 - Hardwired Chip Revision Major value"] #[inline(always)] #[must_use] - pub fn major(&mut self) -> MAJOR_W<0> { - MAJOR_W::new(self) + pub fn major(&mut self) -> MajorW { + MajorW::new(self, 0) } #[doc = "Bits 6:11 - Hardwired Chip Family value"] #[inline(always)] #[must_use] - pub fn family(&mut self) -> FAMILY_W<6> { - FAMILY_W::new(self) + pub fn family(&mut self) -> FamilyW { + FamilyW::new(self, 6) } #[doc = "Bits 12:19 - Hardwired Chip Revision Minor value"] #[inline(always)] #[must_use] - pub fn minor(&mut self) -> MINOR_W<12> { - MINOR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn minor(&mut self) -> MinorW { + MinorW::new(self, 12) } } -#[doc = "Read to get the hard-wired chip revision.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chiprevhw](index.html) module"] -pub struct CHIPREVHW_SPEC; -impl crate::RegisterSpec for CHIPREVHW_SPEC { +#[doc = "Read to get the hard-wired chip revision.\n\nYou can [`read`](crate::Reg::read) this register and get [`chiprevhw::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chiprevhw::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ChiprevhwSpec; +impl crate::RegisterSpec for ChiprevhwSpec { type Ux = u32; } -#[doc = "`read()` method returns [chiprevhw::R](R) reader structure"] -impl crate::Readable for CHIPREVHW_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [chiprevhw::W](W) writer structure"] -impl crate::Writable for CHIPREVHW_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`chiprevhw::R`](R) reader structure"] +impl crate::Readable for ChiprevhwSpec {} +#[doc = "`write(|w| ..)` method takes [`chiprevhw::W`](W) writer structure"] +impl crate::Writable for ChiprevhwSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHIPREVHW to value 0x0e01"] -impl crate::Resettable for CHIPREVHW_SPEC { - const RESET_VALUE: Self::Ux = 0x0e01; +impl crate::Resettable for ChiprevhwSpec { + const RESET_VALUE: u32 = 0x0e01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/ctrl.rs index da87de6..a952353 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/ctrl.rs @@ -1,110 +1,70 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ADDRFAULTEN` reader - Invalid Address Bus Fault Response Enabl"] -pub type ADDRFAULTEN_R = crate::BitReader; +pub type AddrfaultenR = crate::BitReader; #[doc = "Field `ADDRFAULTEN` writer - Invalid Address Bus Fault Response Enabl"] -pub type ADDRFAULTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type AddrfaultenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLKDISFAULTEN` reader - Disabled Clkbus Bus Fault Enable"] -pub type CLKDISFAULTEN_R = crate::BitReader; +pub type ClkdisfaultenR = crate::BitReader; #[doc = "Field `CLKDISFAULTEN` writer - Disabled Clkbus Bus Fault Enable"] -pub type CLKDISFAULTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type ClkdisfaultenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RAMECCERRFAULTEN` reader - Two bit ECC error bus fault response ena"] -pub type RAMECCERRFAULTEN_R = crate::BitReader; +pub type RameccerrfaultenR = crate::BitReader; #[doc = "Field `RAMECCERRFAULTEN` writer - Two bit ECC error bus fault response ena"] -pub type RAMECCERRFAULTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type RameccerrfaultenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Invalid Address Bus Fault Response Enabl"] #[inline(always)] - pub fn addrfaulten(&self) -> ADDRFAULTEN_R { - ADDRFAULTEN_R::new((self.bits & 1) != 0) + pub fn addrfaulten(&self) -> AddrfaultenR { + AddrfaultenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disabled Clkbus Bus Fault Enable"] #[inline(always)] - pub fn clkdisfaulten(&self) -> CLKDISFAULTEN_R { - CLKDISFAULTEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn clkdisfaulten(&self) -> ClkdisfaultenR { + ClkdisfaultenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 5 - Two bit ECC error bus fault response ena"] #[inline(always)] - pub fn rameccerrfaulten(&self) -> RAMECCERRFAULTEN_R { - RAMECCERRFAULTEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn rameccerrfaulten(&self) -> RameccerrfaultenR { + RameccerrfaultenR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - Invalid Address Bus Fault Response Enabl"] #[inline(always)] #[must_use] - pub fn addrfaulten(&mut self) -> ADDRFAULTEN_W<0> { - ADDRFAULTEN_W::new(self) + pub fn addrfaulten(&mut self) -> AddrfaultenW { + AddrfaultenW::new(self, 0) } #[doc = "Bit 1 - Disabled Clkbus Bus Fault Enable"] #[inline(always)] #[must_use] - pub fn clkdisfaulten(&mut self) -> CLKDISFAULTEN_W<1> { - CLKDISFAULTEN_W::new(self) + pub fn clkdisfaulten(&mut self) -> ClkdisfaultenW { + ClkdisfaultenW::new(self, 1) } #[doc = "Bit 5 - Two bit ECC error bus fault response ena"] #[inline(always)] #[must_use] - pub fn rameccerrfaulten(&mut self) -> RAMECCERRFAULTEN_W<5> { - RAMECCERRFAULTEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rameccerrfaulten(&mut self) -> RameccerrfaultenW { + RameccerrfaultenW::new(self, 5) } } -#[doc = "Configure to provide general RAM configuration.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "Configure to provide general RAM configuration.\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0x23"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x23; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0x23; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/dmem0portmapsel.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/dmem0portmapsel.rs index b79aa9d..bfeaf38 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/dmem0portmapsel.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/dmem0portmapsel.rs @@ -1,144 +1,100 @@ #[doc = "Register `DMEM0PORTMAPSEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMEM0PORTMAPSEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LDMAPORTSEL` reader - LDMA portmap selection"] -pub type LDMAPORTSEL_R = crate::BitReader; +pub type LdmaportselR = crate::BitReader; #[doc = "Field `LDMAPORTSEL` writer - LDMA portmap selection"] -pub type LDMAPORTSEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, DMEM0PORTMAPSEL_SPEC, bool, O>; +pub type LdmaportselW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SRWAESPORTSEL` reader - SRWAES portmap selection"] -pub type SRWAESPORTSEL_R = crate::BitReader; +pub type SrwaesportselR = crate::BitReader; #[doc = "Field `SRWAESPORTSEL` writer - SRWAES portmap selection"] -pub type SRWAESPORTSEL_W<'a, const O: u8> = - crate::BitWriter<'a, u32, DMEM0PORTMAPSEL_SPEC, bool, O>; +pub type SrwaesportselW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHBSRWPORTSEL` reader - AHBSRW portmap selection"] -pub type AHBSRWPORTSEL_R = crate::BitReader; +pub type AhbsrwportselR = crate::BitReader; #[doc = "Field `AHBSRWPORTSEL` writer - AHBSRW portmap selection"] -pub type AHBSRWPORTSEL_W<'a, const O: u8> = - crate::BitWriter<'a, u32, DMEM0PORTMAPSEL_SPEC, bool, O>; +pub type AhbsrwportselW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SRWECA0PORTSEL` reader - SRWECA0 portmap selection"] -pub type SRWECA0PORTSEL_R = crate::BitReader; +pub type Srweca0portselR = crate::BitReader; #[doc = "Field `SRWECA0PORTSEL` writer - SRWECA0 portmap selection"] -pub type SRWECA0PORTSEL_W<'a, const O: u8> = - crate::BitWriter<'a, u32, DMEM0PORTMAPSEL_SPEC, bool, O>; +pub type Srweca0portselW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SRWECA1PORTSEL` reader - SRWECA1 portmap selection"] -pub type SRWECA1PORTSEL_R = crate::BitReader; +pub type Srweca1portselR = crate::BitReader; #[doc = "Field `SRWECA1PORTSEL` writer - SRWECA1 portmap selection"] -pub type SRWECA1PORTSEL_W<'a, const O: u8> = - crate::BitWriter<'a, u32, DMEM0PORTMAPSEL_SPEC, bool, O>; +pub type Srweca1portselW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - LDMA portmap selection"] #[inline(always)] - pub fn ldmaportsel(&self) -> LDMAPORTSEL_R { - LDMAPORTSEL_R::new((self.bits & 1) != 0) + pub fn ldmaportsel(&self) -> LdmaportselR { + LdmaportselR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - SRWAES portmap selection"] #[inline(always)] - pub fn srwaesportsel(&self) -> SRWAESPORTSEL_R { - SRWAESPORTSEL_R::new(((self.bits >> 1) & 1) != 0) + pub fn srwaesportsel(&self) -> SrwaesportselR { + SrwaesportselR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - AHBSRW portmap selection"] #[inline(always)] - pub fn ahbsrwportsel(&self) -> AHBSRWPORTSEL_R { - AHBSRWPORTSEL_R::new(((self.bits >> 2) & 1) != 0) + pub fn ahbsrwportsel(&self) -> AhbsrwportselR { + AhbsrwportselR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - SRWECA0 portmap selection"] #[inline(always)] - pub fn srweca0portsel(&self) -> SRWECA0PORTSEL_R { - SRWECA0PORTSEL_R::new(((self.bits >> 3) & 1) != 0) + pub fn srweca0portsel(&self) -> Srweca0portselR { + Srweca0portselR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - SRWECA1 portmap selection"] #[inline(always)] - pub fn srweca1portsel(&self) -> SRWECA1PORTSEL_R { - SRWECA1PORTSEL_R::new(((self.bits >> 4) & 1) != 0) + pub fn srweca1portsel(&self) -> Srweca1portselR { + Srweca1portselR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - LDMA portmap selection"] #[inline(always)] #[must_use] - pub fn ldmaportsel(&mut self) -> LDMAPORTSEL_W<0> { - LDMAPORTSEL_W::new(self) + pub fn ldmaportsel(&mut self) -> LdmaportselW { + LdmaportselW::new(self, 0) } #[doc = "Bit 1 - SRWAES portmap selection"] #[inline(always)] #[must_use] - pub fn srwaesportsel(&mut self) -> SRWAESPORTSEL_W<1> { - SRWAESPORTSEL_W::new(self) + pub fn srwaesportsel(&mut self) -> SrwaesportselW { + SrwaesportselW::new(self, 1) } #[doc = "Bit 2 - AHBSRW portmap selection"] #[inline(always)] #[must_use] - pub fn ahbsrwportsel(&mut self) -> AHBSRWPORTSEL_W<2> { - AHBSRWPORTSEL_W::new(self) + pub fn ahbsrwportsel(&mut self) -> AhbsrwportselW { + AhbsrwportselW::new(self, 2) } #[doc = "Bit 3 - SRWECA0 portmap selection"] #[inline(always)] #[must_use] - pub fn srweca0portsel(&mut self) -> SRWECA0PORTSEL_W<3> { - SRWECA0PORTSEL_W::new(self) + pub fn srweca0portsel(&mut self) -> Srweca0portselW { + Srweca0portselW::new(self, 3) } #[doc = "Bit 4 - SRWECA1 portmap selection"] #[inline(always)] #[must_use] - pub fn srweca1portsel(&mut self) -> SRWECA1PORTSEL_W<4> { - SRWECA1PORTSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn srweca1portsel(&mut self) -> Srweca1portselW { + Srweca1portselW::new(self, 4) } } -#[doc = "Configure DMEM0 port remap selection.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmem0portmapsel](index.html) module"] -pub struct DMEM0PORTMAPSEL_SPEC; -impl crate::RegisterSpec for DMEM0PORTMAPSEL_SPEC { +#[doc = "Configure DMEM0 port remap selection.\n\nYou can [`read`](crate::Reg::read) this register and get [`dmem0portmapsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmem0portmapsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Dmem0portmapselSpec; +impl crate::RegisterSpec for Dmem0portmapselSpec { type Ux = u32; } -#[doc = "`read()` method returns [dmem0portmapsel::R](R) reader structure"] -impl crate::Readable for DMEM0PORTMAPSEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dmem0portmapsel::W](W) writer structure"] -impl crate::Writable for DMEM0PORTMAPSEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dmem0portmapsel::R`](R) reader structure"] +impl crate::Readable for Dmem0portmapselSpec {} +#[doc = "`write(|w| ..)` method takes [`dmem0portmapsel::W`](W) writer structure"] +impl crate::Writable for Dmem0portmapselSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMEM0PORTMAPSEL to value 0x13"] -impl crate::Resettable for DMEM0PORTMAPSEL_SPEC { - const RESET_VALUE: Self::Ux = 0x13; +impl crate::Resettable for Dmem0portmapselSpec { + const RESET_VALUE: u32 = 0x13; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/dmem0retnctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/dmem0retnctrl.rs index 90539fb..e556b77 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/dmem0retnctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/dmem0retnctrl.rs @@ -1,155 +1,122 @@ #[doc = "Register `DMEM0RETNCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMEM0RETNCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `RAMRETNCTRL` reader - DMEM0 blockset retention control"] -pub type RAMRETNCTRL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DMEM0 blockset retention control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RAMRETNCTRL_A { +pub enum Ramretnctrl { #[doc = "0: None of the RAM blocks powered down"] - ALLON = 0, + Allon = 0, #[doc = "4: Power down RAM block 3 (address range 0x2000C000-0x20010000)"] - BLK3 = 4, + Blk3 = 4, #[doc = "6: Power down RAM blocks 2 and above (address range 0x20008000-0x20010000)"] - BLK2TO3 = 6, + Blk2to3 = 6, #[doc = "7: Power down RAM blocks 1 and above (address range 0x20004000-0x20010000)"] - BLK1TO3 = 7, + Blk1to3 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RAMRETNCTRL_A) -> Self { + fn from(variant: Ramretnctrl) -> Self { variant as _ } } -impl RAMRETNCTRL_R { +impl crate::FieldSpec for Ramretnctrl { + type Ux = u8; +} +impl crate::IsEnum for Ramretnctrl {} +#[doc = "Field `RAMRETNCTRL` reader - DMEM0 blockset retention control"] +pub type RamretnctrlR = crate::FieldReader; +impl RamretnctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(RAMRETNCTRL_A::ALLON), - 4 => Some(RAMRETNCTRL_A::BLK3), - 6 => Some(RAMRETNCTRL_A::BLK2TO3), - 7 => Some(RAMRETNCTRL_A::BLK1TO3), + 0 => Some(Ramretnctrl::Allon), + 4 => Some(Ramretnctrl::Blk3), + 6 => Some(Ramretnctrl::Blk2to3), + 7 => Some(Ramretnctrl::Blk1to3), _ => None, } } - #[doc = "Checks if the value of the field is `ALLON`"] + #[doc = "None of the RAM blocks powered down"] #[inline(always)] pub fn is_allon(&self) -> bool { - *self == RAMRETNCTRL_A::ALLON + *self == Ramretnctrl::Allon } - #[doc = "Checks if the value of the field is `BLK3`"] + #[doc = "Power down RAM block 3 (address range 0x2000C000-0x20010000)"] #[inline(always)] pub fn is_blk3(&self) -> bool { - *self == RAMRETNCTRL_A::BLK3 + *self == Ramretnctrl::Blk3 } - #[doc = "Checks if the value of the field is `BLK2TO3`"] + #[doc = "Power down RAM blocks 2 and above (address range 0x20008000-0x20010000)"] #[inline(always)] pub fn is_blk2to3(&self) -> bool { - *self == RAMRETNCTRL_A::BLK2TO3 + *self == Ramretnctrl::Blk2to3 } - #[doc = "Checks if the value of the field is `BLK1TO3`"] + #[doc = "Power down RAM blocks 1 and above (address range 0x20004000-0x20010000)"] #[inline(always)] pub fn is_blk1to3(&self) -> bool { - *self == RAMRETNCTRL_A::BLK1TO3 + *self == Ramretnctrl::Blk1to3 } } #[doc = "Field `RAMRETNCTRL` writer - DMEM0 blockset retention control"] -pub type RAMRETNCTRL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, DMEM0RETNCTRL_SPEC, u8, RAMRETNCTRL_A, 3, O>; -impl<'a, const O: u8> RAMRETNCTRL_W<'a, O> { +pub type RamretnctrlW<'a, REG> = crate::FieldWriter<'a, REG, 3, Ramretnctrl>; +impl<'a, REG> RamretnctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "None of the RAM blocks powered down"] #[inline(always)] - pub fn allon(self) -> &'a mut W { - self.variant(RAMRETNCTRL_A::ALLON) + pub fn allon(self) -> &'a mut crate::W { + self.variant(Ramretnctrl::Allon) } #[doc = "Power down RAM block 3 (address range 0x2000C000-0x20010000)"] #[inline(always)] - pub fn blk3(self) -> &'a mut W { - self.variant(RAMRETNCTRL_A::BLK3) + pub fn blk3(self) -> &'a mut crate::W { + self.variant(Ramretnctrl::Blk3) } #[doc = "Power down RAM blocks 2 and above (address range 0x20008000-0x20010000)"] #[inline(always)] - pub fn blk2to3(self) -> &'a mut W { - self.variant(RAMRETNCTRL_A::BLK2TO3) + pub fn blk2to3(self) -> &'a mut crate::W { + self.variant(Ramretnctrl::Blk2to3) } #[doc = "Power down RAM blocks 1 and above (address range 0x20004000-0x20010000)"] #[inline(always)] - pub fn blk1to3(self) -> &'a mut W { - self.variant(RAMRETNCTRL_A::BLK1TO3) + pub fn blk1to3(self) -> &'a mut crate::W { + self.variant(Ramretnctrl::Blk1to3) } } impl R { #[doc = "Bits 0:2 - DMEM0 blockset retention control"] #[inline(always)] - pub fn ramretnctrl(&self) -> RAMRETNCTRL_R { - RAMRETNCTRL_R::new((self.bits & 7) as u8) + pub fn ramretnctrl(&self) -> RamretnctrlR { + RamretnctrlR::new((self.bits & 7) as u8) } } impl W { #[doc = "Bits 0:2 - DMEM0 blockset retention control"] #[inline(always)] #[must_use] - pub fn ramretnctrl(&mut self) -> RAMRETNCTRL_W<0> { - RAMRETNCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ramretnctrl(&mut self) -> RamretnctrlW { + RamretnctrlW::new(self, 0) } } -#[doc = "Configure to provide general RAM retention configuration.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmem0retnctrl](index.html) module"] -pub struct DMEM0RETNCTRL_SPEC; -impl crate::RegisterSpec for DMEM0RETNCTRL_SPEC { +#[doc = "Configure to provide general RAM retention configuration.\n\nYou can [`read`](crate::Reg::read) this register and get [`dmem0retnctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmem0retnctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Dmem0retnctrlSpec; +impl crate::RegisterSpec for Dmem0retnctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [dmem0retnctrl::R](R) reader structure"] -impl crate::Readable for DMEM0RETNCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dmem0retnctrl::W](W) writer structure"] -impl crate::Writable for DMEM0RETNCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dmem0retnctrl::R`](R) reader structure"] +impl crate::Readable for Dmem0retnctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`dmem0retnctrl::W`](W) writer structure"] +impl crate::Writable for Dmem0retnctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMEM0RETNCTRL to value 0"] -impl crate::Resettable for DMEM0RETNCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Dmem0retnctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/icacheramretnctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/icacheramretnctrl.rs index 30307db..4f9eb51 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/icacheramretnctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/icacheramretnctrl.rs @@ -1,127 +1,89 @@ #[doc = "Register `ICACHERAMRETNCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ICACHERAMRETNCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `RAMRETNCTRL` reader - ICACHERAM Retention control"] -pub type RAMRETNCTRL_R = crate::BitReader; +pub type W = crate::W; #[doc = "ICACHERAM Retention control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RAMRETNCTRL_A { +pub enum Ramretnctrl { #[doc = "0: None of the Host ICACHE RAM blocks powered down"] - ALLON = 0, + Allon = 0, #[doc = "1: Power down all Host ICACHE RAM blocks"] - ALLOFF = 1, + Alloff = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RAMRETNCTRL_A) -> Self { + fn from(variant: Ramretnctrl) -> Self { variant as u8 != 0 } } -impl RAMRETNCTRL_R { +#[doc = "Field `RAMRETNCTRL` reader - ICACHERAM Retention control"] +pub type RamretnctrlR = crate::BitReader; +impl RamretnctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RAMRETNCTRL_A { + pub const fn variant(&self) -> Ramretnctrl { match self.bits { - false => RAMRETNCTRL_A::ALLON, - true => RAMRETNCTRL_A::ALLOFF, + false => Ramretnctrl::Allon, + true => Ramretnctrl::Alloff, } } - #[doc = "Checks if the value of the field is `ALLON`"] + #[doc = "None of the Host ICACHE RAM blocks powered down"] #[inline(always)] pub fn is_allon(&self) -> bool { - *self == RAMRETNCTRL_A::ALLON + *self == Ramretnctrl::Allon } - #[doc = "Checks if the value of the field is `ALLOFF`"] + #[doc = "Power down all Host ICACHE RAM blocks"] #[inline(always)] pub fn is_alloff(&self) -> bool { - *self == RAMRETNCTRL_A::ALLOFF + *self == Ramretnctrl::Alloff } } #[doc = "Field `RAMRETNCTRL` writer - ICACHERAM Retention control"] -pub type RAMRETNCTRL_W<'a, const O: u8> = - crate::BitWriter<'a, u32, ICACHERAMRETNCTRL_SPEC, RAMRETNCTRL_A, O>; -impl<'a, const O: u8> RAMRETNCTRL_W<'a, O> { +pub type RamretnctrlW<'a, REG> = crate::BitWriter<'a, REG, Ramretnctrl>; +impl<'a, REG> RamretnctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "None of the Host ICACHE RAM blocks powered down"] #[inline(always)] - pub fn allon(self) -> &'a mut W { - self.variant(RAMRETNCTRL_A::ALLON) + pub fn allon(self) -> &'a mut crate::W { + self.variant(Ramretnctrl::Allon) } #[doc = "Power down all Host ICACHE RAM blocks"] #[inline(always)] - pub fn alloff(self) -> &'a mut W { - self.variant(RAMRETNCTRL_A::ALLOFF) + pub fn alloff(self) -> &'a mut crate::W { + self.variant(Ramretnctrl::Alloff) } } impl R { #[doc = "Bit 0 - ICACHERAM Retention control"] #[inline(always)] - pub fn ramretnctrl(&self) -> RAMRETNCTRL_R { - RAMRETNCTRL_R::new((self.bits & 1) != 0) + pub fn ramretnctrl(&self) -> RamretnctrlR { + RamretnctrlR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - ICACHERAM Retention control"] #[inline(always)] #[must_use] - pub fn ramretnctrl(&mut self) -> RAMRETNCTRL_W<0> { - RAMRETNCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ramretnctrl(&mut self) -> RamretnctrlW { + RamretnctrlW::new(self, 0) } } -#[doc = "Configure Host ICACHERAM retention configuration.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [icacheramretnctrl](index.html) module"] -pub struct ICACHERAMRETNCTRL_SPEC; -impl crate::RegisterSpec for ICACHERAMRETNCTRL_SPEC { +#[doc = "Configure Host ICACHERAM retention configuration.\n\nYou can [`read`](crate::Reg::read) this register and get [`icacheramretnctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icacheramretnctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IcacheramretnctrlSpec; +impl crate::RegisterSpec for IcacheramretnctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [icacheramretnctrl::R](R) reader structure"] -impl crate::Readable for ICACHERAMRETNCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [icacheramretnctrl::W](W) writer structure"] -impl crate::Writable for ICACHERAMRETNCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`icacheramretnctrl::R`](R) reader structure"] +impl crate::Readable for IcacheramretnctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`icacheramretnctrl::W`](W) writer structure"] +impl crate::Writable for IcacheramretnctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ICACHERAMRETNCTRL to value 0"] -impl crate::Resettable for ICACHERAMRETNCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IcacheramretnctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/ien.rs index f88bb0d..1e8474b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/ien.rs @@ -1,275 +1,235 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SW0` reader - Software Interrupt Enable"] -pub type SW0_R = crate::BitReader; +pub type Sw0R = crate::BitReader; #[doc = "Field `SW0` writer - Software Interrupt Enable"] -pub type SW0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Sw0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SW1` reader - Software Interrupt Enable"] -pub type SW1_R = crate::BitReader; +pub type Sw1R = crate::BitReader; #[doc = "Field `SW1` writer - Software Interrupt Enable"] -pub type SW1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Sw1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SW2` reader - Software Interrupt Enable"] -pub type SW2_R = crate::BitReader; +pub type Sw2R = crate::BitReader; #[doc = "Field `SW2` writer - Software Interrupt Enable"] -pub type SW2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Sw2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SW3` reader - Software Interrupt Enable"] -pub type SW3_R = crate::BitReader; +pub type Sw3R = crate::BitReader; #[doc = "Field `SW3` writer - Software Interrupt Enable"] -pub type SW3_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Sw3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FPIOC` reader - FPU Invalid Operation Interrupt Enable"] -pub type FPIOC_R = crate::BitReader; +pub type FpiocR = crate::BitReader; #[doc = "Field `FPIOC` writer - FPU Invalid Operation Interrupt Enable"] -pub type FPIOC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FpiocW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FPDZC` reader - FPU Divide by zero Interrupt Enable"] -pub type FPDZC_R = crate::BitReader; +pub type FpdzcR = crate::BitReader; #[doc = "Field `FPDZC` writer - FPU Divide by zero Interrupt Enable"] -pub type FPDZC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FpdzcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FPUFC` reader - FPU Underflow Interrupt Enable"] -pub type FPUFC_R = crate::BitReader; +pub type FpufcR = crate::BitReader; #[doc = "Field `FPUFC` writer - FPU Underflow Interrupt Enable"] -pub type FPUFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FpufcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FPOFC` reader - FPU Overflow Interrupt Enable"] -pub type FPOFC_R = crate::BitReader; +pub type FpofcR = crate::BitReader; #[doc = "Field `FPOFC` writer - FPU Overflow Interrupt Enable"] -pub type FPOFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FpofcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FPIDC` reader - FPU Input denormal Interrupt Enable"] -pub type FPIDC_R = crate::BitReader; +pub type FpidcR = crate::BitReader; #[doc = "Field `FPIDC` writer - FPU Input denormal Interrupt Enable"] -pub type FPIDC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FpidcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FPIXC` reader - FPU Inexact Interrupt Enable"] -pub type FPIXC_R = crate::BitReader; +pub type FpixcR = crate::BitReader; #[doc = "Field `FPIXC` writer - FPU Inexact Interrupt Enable"] -pub type FPIXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FpixcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SEQRAMERR1B` reader - SEQRAM Error 1-bit Interrupt Enable"] -pub type SEQRAMERR1B_R = crate::BitReader; +pub type Seqramerr1bR = crate::BitReader; #[doc = "Field `SEQRAMERR1B` writer - SEQRAM Error 1-bit Interrupt Enable"] -pub type SEQRAMERR1B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Seqramerr1bW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SEQRAMERR2B` reader - SEQRAM Error 2-bit Interrupt Enable"] -pub type SEQRAMERR2B_R = crate::BitReader; +pub type Seqramerr2bR = crate::BitReader; #[doc = "Field `SEQRAMERR2B` writer - SEQRAM Error 2-bit Interrupt Enable"] -pub type SEQRAMERR2B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Seqramerr2bW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FRCRAMERR1B` reader - FRCRAM Error 1-bit Interrupt Enable"] -pub type FRCRAMERR1B_R = crate::BitReader; +pub type Frcramerr1bR = crate::BitReader; #[doc = "Field `FRCRAMERR1B` writer - FRCRAM Error 1-bit Interrupt Enable"] -pub type FRCRAMERR1B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Frcramerr1bW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FRCRAMERR2B` reader - FRCRAM Error 2-bit Interrupt Enable"] -pub type FRCRAMERR2B_R = crate::BitReader; +pub type Frcramerr2bR = crate::BitReader; #[doc = "Field `FRCRAMERR2B` writer - FRCRAM Error 2-bit Interrupt Enable"] -pub type FRCRAMERR2B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Frcramerr2bW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Software Interrupt Enable"] #[inline(always)] - pub fn sw0(&self) -> SW0_R { - SW0_R::new((self.bits & 1) != 0) + pub fn sw0(&self) -> Sw0R { + Sw0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Software Interrupt Enable"] #[inline(always)] - pub fn sw1(&self) -> SW1_R { - SW1_R::new(((self.bits >> 1) & 1) != 0) + pub fn sw1(&self) -> Sw1R { + Sw1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Software Interrupt Enable"] #[inline(always)] - pub fn sw2(&self) -> SW2_R { - SW2_R::new(((self.bits >> 2) & 1) != 0) + pub fn sw2(&self) -> Sw2R { + Sw2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Software Interrupt Enable"] #[inline(always)] - pub fn sw3(&self) -> SW3_R { - SW3_R::new(((self.bits >> 3) & 1) != 0) + pub fn sw3(&self) -> Sw3R { + Sw3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 8 - FPU Invalid Operation Interrupt Enable"] #[inline(always)] - pub fn fpioc(&self) -> FPIOC_R { - FPIOC_R::new(((self.bits >> 8) & 1) != 0) + pub fn fpioc(&self) -> FpiocR { + FpiocR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - FPU Divide by zero Interrupt Enable"] #[inline(always)] - pub fn fpdzc(&self) -> FPDZC_R { - FPDZC_R::new(((self.bits >> 9) & 1) != 0) + pub fn fpdzc(&self) -> FpdzcR { + FpdzcR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - FPU Underflow Interrupt Enable"] #[inline(always)] - pub fn fpufc(&self) -> FPUFC_R { - FPUFC_R::new(((self.bits >> 10) & 1) != 0) + pub fn fpufc(&self) -> FpufcR { + FpufcR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - FPU Overflow Interrupt Enable"] #[inline(always)] - pub fn fpofc(&self) -> FPOFC_R { - FPOFC_R::new(((self.bits >> 11) & 1) != 0) + pub fn fpofc(&self) -> FpofcR { + FpofcR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - FPU Input denormal Interrupt Enable"] #[inline(always)] - pub fn fpidc(&self) -> FPIDC_R { - FPIDC_R::new(((self.bits >> 12) & 1) != 0) + pub fn fpidc(&self) -> FpidcR { + FpidcR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - FPU Inexact Interrupt Enable"] #[inline(always)] - pub fn fpixc(&self) -> FPIXC_R { - FPIXC_R::new(((self.bits >> 13) & 1) != 0) + pub fn fpixc(&self) -> FpixcR { + FpixcR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 24 - SEQRAM Error 1-bit Interrupt Enable"] #[inline(always)] - pub fn seqramerr1b(&self) -> SEQRAMERR1B_R { - SEQRAMERR1B_R::new(((self.bits >> 24) & 1) != 0) + pub fn seqramerr1b(&self) -> Seqramerr1bR { + Seqramerr1bR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - SEQRAM Error 2-bit Interrupt Enable"] #[inline(always)] - pub fn seqramerr2b(&self) -> SEQRAMERR2B_R { - SEQRAMERR2B_R::new(((self.bits >> 25) & 1) != 0) + pub fn seqramerr2b(&self) -> Seqramerr2bR { + Seqramerr2bR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 28 - FRCRAM Error 1-bit Interrupt Enable"] #[inline(always)] - pub fn frcramerr1b(&self) -> FRCRAMERR1B_R { - FRCRAMERR1B_R::new(((self.bits >> 28) & 1) != 0) + pub fn frcramerr1b(&self) -> Frcramerr1bR { + Frcramerr1bR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - FRCRAM Error 2-bit Interrupt Enable"] #[inline(always)] - pub fn frcramerr2b(&self) -> FRCRAMERR2B_R { - FRCRAMERR2B_R::new(((self.bits >> 29) & 1) != 0) + pub fn frcramerr2b(&self) -> Frcramerr2bR { + Frcramerr2bR::new(((self.bits >> 29) & 1) != 0) } } impl W { #[doc = "Bit 0 - Software Interrupt Enable"] #[inline(always)] #[must_use] - pub fn sw0(&mut self) -> SW0_W<0> { - SW0_W::new(self) + pub fn sw0(&mut self) -> Sw0W { + Sw0W::new(self, 0) } #[doc = "Bit 1 - Software Interrupt Enable"] #[inline(always)] #[must_use] - pub fn sw1(&mut self) -> SW1_W<1> { - SW1_W::new(self) + pub fn sw1(&mut self) -> Sw1W { + Sw1W::new(self, 1) } #[doc = "Bit 2 - Software Interrupt Enable"] #[inline(always)] #[must_use] - pub fn sw2(&mut self) -> SW2_W<2> { - SW2_W::new(self) + pub fn sw2(&mut self) -> Sw2W { + Sw2W::new(self, 2) } #[doc = "Bit 3 - Software Interrupt Enable"] #[inline(always)] #[must_use] - pub fn sw3(&mut self) -> SW3_W<3> { - SW3_W::new(self) + pub fn sw3(&mut self) -> Sw3W { + Sw3W::new(self, 3) } #[doc = "Bit 8 - FPU Invalid Operation Interrupt Enable"] #[inline(always)] #[must_use] - pub fn fpioc(&mut self) -> FPIOC_W<8> { - FPIOC_W::new(self) + pub fn fpioc(&mut self) -> FpiocW { + FpiocW::new(self, 8) } #[doc = "Bit 9 - FPU Divide by zero Interrupt Enable"] #[inline(always)] #[must_use] - pub fn fpdzc(&mut self) -> FPDZC_W<9> { - FPDZC_W::new(self) + pub fn fpdzc(&mut self) -> FpdzcW { + FpdzcW::new(self, 9) } #[doc = "Bit 10 - FPU Underflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn fpufc(&mut self) -> FPUFC_W<10> { - FPUFC_W::new(self) + pub fn fpufc(&mut self) -> FpufcW { + FpufcW::new(self, 10) } #[doc = "Bit 11 - FPU Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn fpofc(&mut self) -> FPOFC_W<11> { - FPOFC_W::new(self) + pub fn fpofc(&mut self) -> FpofcW { + FpofcW::new(self, 11) } #[doc = "Bit 12 - FPU Input denormal Interrupt Enable"] #[inline(always)] #[must_use] - pub fn fpidc(&mut self) -> FPIDC_W<12> { - FPIDC_W::new(self) + pub fn fpidc(&mut self) -> FpidcW { + FpidcW::new(self, 12) } #[doc = "Bit 13 - FPU Inexact Interrupt Enable"] #[inline(always)] #[must_use] - pub fn fpixc(&mut self) -> FPIXC_W<13> { - FPIXC_W::new(self) + pub fn fpixc(&mut self) -> FpixcW { + FpixcW::new(self, 13) } #[doc = "Bit 24 - SEQRAM Error 1-bit Interrupt Enable"] #[inline(always)] #[must_use] - pub fn seqramerr1b(&mut self) -> SEQRAMERR1B_W<24> { - SEQRAMERR1B_W::new(self) + pub fn seqramerr1b(&mut self) -> Seqramerr1bW { + Seqramerr1bW::new(self, 24) } #[doc = "Bit 25 - SEQRAM Error 2-bit Interrupt Enable"] #[inline(always)] #[must_use] - pub fn seqramerr2b(&mut self) -> SEQRAMERR2B_W<25> { - SEQRAMERR2B_W::new(self) + pub fn seqramerr2b(&mut self) -> Seqramerr2bW { + Seqramerr2bW::new(self, 25) } #[doc = "Bit 28 - FRCRAM Error 1-bit Interrupt Enable"] #[inline(always)] #[must_use] - pub fn frcramerr1b(&mut self) -> FRCRAMERR1B_W<28> { - FRCRAMERR1B_W::new(self) + pub fn frcramerr1b(&mut self) -> Frcramerr1bW { + Frcramerr1bW::new(self, 28) } #[doc = "Bit 29 - FRCRAM Error 2-bit Interrupt Enable"] #[inline(always)] #[must_use] - pub fn frcramerr2b(&mut self) -> FRCRAMERR2B_W<29> { - FRCRAMERR2B_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn frcramerr2b(&mut self) -> Frcramerr2bW { + Frcramerr2bW::new(self, 29) } } -#[doc = "Write to enable interrupts.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "Write to enable interrupts.\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/if_.rs index 1163eb9..648b976 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/if_.rs @@ -1,275 +1,235 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SW0` reader - Software Interrupt Flag"] -pub type SW0_R = crate::BitReader; +pub type Sw0R = crate::BitReader; #[doc = "Field `SW0` writer - Software Interrupt Flag"] -pub type SW0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Sw0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SW1` reader - Software Interrupt Flag"] -pub type SW1_R = crate::BitReader; +pub type Sw1R = crate::BitReader; #[doc = "Field `SW1` writer - Software Interrupt Flag"] -pub type SW1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Sw1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SW2` reader - Software Interrupt Flag"] -pub type SW2_R = crate::BitReader; +pub type Sw2R = crate::BitReader; #[doc = "Field `SW2` writer - Software Interrupt Flag"] -pub type SW2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Sw2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SW3` reader - Software Interrupt Flag"] -pub type SW3_R = crate::BitReader; +pub type Sw3R = crate::BitReader; #[doc = "Field `SW3` writer - Software Interrupt Flag"] -pub type SW3_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Sw3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FPIOC` reader - FPU Invalid Operation interrupt flag"] -pub type FPIOC_R = crate::BitReader; +pub type FpiocR = crate::BitReader; #[doc = "Field `FPIOC` writer - FPU Invalid Operation interrupt flag"] -pub type FPIOC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FpiocW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FPDZC` reader - FPU Divide by zero interrupt flag"] -pub type FPDZC_R = crate::BitReader; +pub type FpdzcR = crate::BitReader; #[doc = "Field `FPDZC` writer - FPU Divide by zero interrupt flag"] -pub type FPDZC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FpdzcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FPUFC` reader - FPU Underflow interrupt flag"] -pub type FPUFC_R = crate::BitReader; +pub type FpufcR = crate::BitReader; #[doc = "Field `FPUFC` writer - FPU Underflow interrupt flag"] -pub type FPUFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FpufcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FPOFC` reader - FPU Overflow interrupt flag"] -pub type FPOFC_R = crate::BitReader; +pub type FpofcR = crate::BitReader; #[doc = "Field `FPOFC` writer - FPU Overflow interrupt flag"] -pub type FPOFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FpofcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FPIDC` reader - FPU Input denormal interrupt flag"] -pub type FPIDC_R = crate::BitReader; +pub type FpidcR = crate::BitReader; #[doc = "Field `FPIDC` writer - FPU Input denormal interrupt flag"] -pub type FPIDC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FpidcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FPIXC` reader - FPU Inexact interrupt flag"] -pub type FPIXC_R = crate::BitReader; +pub type FpixcR = crate::BitReader; #[doc = "Field `FPIXC` writer - FPU Inexact interrupt flag"] -pub type FPIXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FpixcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SEQRAMERR1B` reader - SEQRAM Error 1-bit Interrupt Flag"] -pub type SEQRAMERR1B_R = crate::BitReader; +pub type Seqramerr1bR = crate::BitReader; #[doc = "Field `SEQRAMERR1B` writer - SEQRAM Error 1-bit Interrupt Flag"] -pub type SEQRAMERR1B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Seqramerr1bW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SEQRAMERR2B` reader - SEQRAM Error 2-bit Interrupt Flag"] -pub type SEQRAMERR2B_R = crate::BitReader; +pub type Seqramerr2bR = crate::BitReader; #[doc = "Field `SEQRAMERR2B` writer - SEQRAM Error 2-bit Interrupt Flag"] -pub type SEQRAMERR2B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Seqramerr2bW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FRCRAMERR1B` reader - FRCRAM Error 1-bit Interrupt Flag"] -pub type FRCRAMERR1B_R = crate::BitReader; +pub type Frcramerr1bR = crate::BitReader; #[doc = "Field `FRCRAMERR1B` writer - FRCRAM Error 1-bit Interrupt Flag"] -pub type FRCRAMERR1B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Frcramerr1bW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FRCRAMERR2B` reader - FRCRAM Error 2-bit Interrupt Flag"] -pub type FRCRAMERR2B_R = crate::BitReader; +pub type Frcramerr2bR = crate::BitReader; #[doc = "Field `FRCRAMERR2B` writer - FRCRAM Error 2-bit Interrupt Flag"] -pub type FRCRAMERR2B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Frcramerr2bW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Software Interrupt Flag"] #[inline(always)] - pub fn sw0(&self) -> SW0_R { - SW0_R::new((self.bits & 1) != 0) + pub fn sw0(&self) -> Sw0R { + Sw0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Software Interrupt Flag"] #[inline(always)] - pub fn sw1(&self) -> SW1_R { - SW1_R::new(((self.bits >> 1) & 1) != 0) + pub fn sw1(&self) -> Sw1R { + Sw1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Software Interrupt Flag"] #[inline(always)] - pub fn sw2(&self) -> SW2_R { - SW2_R::new(((self.bits >> 2) & 1) != 0) + pub fn sw2(&self) -> Sw2R { + Sw2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Software Interrupt Flag"] #[inline(always)] - pub fn sw3(&self) -> SW3_R { - SW3_R::new(((self.bits >> 3) & 1) != 0) + pub fn sw3(&self) -> Sw3R { + Sw3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 8 - FPU Invalid Operation interrupt flag"] #[inline(always)] - pub fn fpioc(&self) -> FPIOC_R { - FPIOC_R::new(((self.bits >> 8) & 1) != 0) + pub fn fpioc(&self) -> FpiocR { + FpiocR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - FPU Divide by zero interrupt flag"] #[inline(always)] - pub fn fpdzc(&self) -> FPDZC_R { - FPDZC_R::new(((self.bits >> 9) & 1) != 0) + pub fn fpdzc(&self) -> FpdzcR { + FpdzcR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - FPU Underflow interrupt flag"] #[inline(always)] - pub fn fpufc(&self) -> FPUFC_R { - FPUFC_R::new(((self.bits >> 10) & 1) != 0) + pub fn fpufc(&self) -> FpufcR { + FpufcR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - FPU Overflow interrupt flag"] #[inline(always)] - pub fn fpofc(&self) -> FPOFC_R { - FPOFC_R::new(((self.bits >> 11) & 1) != 0) + pub fn fpofc(&self) -> FpofcR { + FpofcR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - FPU Input denormal interrupt flag"] #[inline(always)] - pub fn fpidc(&self) -> FPIDC_R { - FPIDC_R::new(((self.bits >> 12) & 1) != 0) + pub fn fpidc(&self) -> FpidcR { + FpidcR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - FPU Inexact interrupt flag"] #[inline(always)] - pub fn fpixc(&self) -> FPIXC_R { - FPIXC_R::new(((self.bits >> 13) & 1) != 0) + pub fn fpixc(&self) -> FpixcR { + FpixcR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 24 - SEQRAM Error 1-bit Interrupt Flag"] #[inline(always)] - pub fn seqramerr1b(&self) -> SEQRAMERR1B_R { - SEQRAMERR1B_R::new(((self.bits >> 24) & 1) != 0) + pub fn seqramerr1b(&self) -> Seqramerr1bR { + Seqramerr1bR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - SEQRAM Error 2-bit Interrupt Flag"] #[inline(always)] - pub fn seqramerr2b(&self) -> SEQRAMERR2B_R { - SEQRAMERR2B_R::new(((self.bits >> 25) & 1) != 0) + pub fn seqramerr2b(&self) -> Seqramerr2bR { + Seqramerr2bR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 28 - FRCRAM Error 1-bit Interrupt Flag"] #[inline(always)] - pub fn frcramerr1b(&self) -> FRCRAMERR1B_R { - FRCRAMERR1B_R::new(((self.bits >> 28) & 1) != 0) + pub fn frcramerr1b(&self) -> Frcramerr1bR { + Frcramerr1bR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - FRCRAM Error 2-bit Interrupt Flag"] #[inline(always)] - pub fn frcramerr2b(&self) -> FRCRAMERR2B_R { - FRCRAMERR2B_R::new(((self.bits >> 29) & 1) != 0) + pub fn frcramerr2b(&self) -> Frcramerr2bR { + Frcramerr2bR::new(((self.bits >> 29) & 1) != 0) } } impl W { #[doc = "Bit 0 - Software Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sw0(&mut self) -> SW0_W<0> { - SW0_W::new(self) + pub fn sw0(&mut self) -> Sw0W { + Sw0W::new(self, 0) } #[doc = "Bit 1 - Software Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sw1(&mut self) -> SW1_W<1> { - SW1_W::new(self) + pub fn sw1(&mut self) -> Sw1W { + Sw1W::new(self, 1) } #[doc = "Bit 2 - Software Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sw2(&mut self) -> SW2_W<2> { - SW2_W::new(self) + pub fn sw2(&mut self) -> Sw2W { + Sw2W::new(self, 2) } #[doc = "Bit 3 - Software Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sw3(&mut self) -> SW3_W<3> { - SW3_W::new(self) + pub fn sw3(&mut self) -> Sw3W { + Sw3W::new(self, 3) } #[doc = "Bit 8 - FPU Invalid Operation interrupt flag"] #[inline(always)] #[must_use] - pub fn fpioc(&mut self) -> FPIOC_W<8> { - FPIOC_W::new(self) + pub fn fpioc(&mut self) -> FpiocW { + FpiocW::new(self, 8) } #[doc = "Bit 9 - FPU Divide by zero interrupt flag"] #[inline(always)] #[must_use] - pub fn fpdzc(&mut self) -> FPDZC_W<9> { - FPDZC_W::new(self) + pub fn fpdzc(&mut self) -> FpdzcW { + FpdzcW::new(self, 9) } #[doc = "Bit 10 - FPU Underflow interrupt flag"] #[inline(always)] #[must_use] - pub fn fpufc(&mut self) -> FPUFC_W<10> { - FPUFC_W::new(self) + pub fn fpufc(&mut self) -> FpufcW { + FpufcW::new(self, 10) } #[doc = "Bit 11 - FPU Overflow interrupt flag"] #[inline(always)] #[must_use] - pub fn fpofc(&mut self) -> FPOFC_W<11> { - FPOFC_W::new(self) + pub fn fpofc(&mut self) -> FpofcW { + FpofcW::new(self, 11) } #[doc = "Bit 12 - FPU Input denormal interrupt flag"] #[inline(always)] #[must_use] - pub fn fpidc(&mut self) -> FPIDC_W<12> { - FPIDC_W::new(self) + pub fn fpidc(&mut self) -> FpidcW { + FpidcW::new(self, 12) } #[doc = "Bit 13 - FPU Inexact interrupt flag"] #[inline(always)] #[must_use] - pub fn fpixc(&mut self) -> FPIXC_W<13> { - FPIXC_W::new(self) + pub fn fpixc(&mut self) -> FpixcW { + FpixcW::new(self, 13) } #[doc = "Bit 24 - SEQRAM Error 1-bit Interrupt Flag"] #[inline(always)] #[must_use] - pub fn seqramerr1b(&mut self) -> SEQRAMERR1B_W<24> { - SEQRAMERR1B_W::new(self) + pub fn seqramerr1b(&mut self) -> Seqramerr1bW { + Seqramerr1bW::new(self, 24) } #[doc = "Bit 25 - SEQRAM Error 2-bit Interrupt Flag"] #[inline(always)] #[must_use] - pub fn seqramerr2b(&mut self) -> SEQRAMERR2B_W<25> { - SEQRAMERR2B_W::new(self) + pub fn seqramerr2b(&mut self) -> Seqramerr2bW { + Seqramerr2bW::new(self, 25) } #[doc = "Bit 28 - FRCRAM Error 1-bit Interrupt Flag"] #[inline(always)] #[must_use] - pub fn frcramerr1b(&mut self) -> FRCRAMERR1B_W<28> { - FRCRAMERR1B_W::new(self) + pub fn frcramerr1b(&mut self) -> Frcramerr1bW { + Frcramerr1bW::new(self, 28) } #[doc = "Bit 29 - FRCRAM Error 2-bit Interrupt Flag"] #[inline(always)] #[must_use] - pub fn frcramerr2b(&mut self) -> FRCRAMERR2B_W<29> { - FRCRAMERR2B_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn frcramerr2b(&mut self) -> Frcramerr2bW { + Frcramerr2bW::new(self, 29) } } -#[doc = "Read to get system status.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "Read to get system status.\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/ipversion.rs index 6001e4c..997a40c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - New BitField"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - New BitField"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x02"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/rambiasconf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/rambiasconf.rs index d05f025..a68a361 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/rambiasconf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/rambiasconf.rs @@ -1,168 +1,135 @@ #[doc = "Register `RAMBIASCONF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RAMBIASCONF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `RAMBIASCTRL` reader - RAM Bias Control"] -pub type RAMBIASCTRL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "RAM Bias Control\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RAMBIASCTRL_A { +pub enum Rambiasctrl { #[doc = "0: None"] - NO = 0, + No = 0, #[doc = "1: Voltage Source Bias 100mV"] - VSB100 = 1, + Vsb100 = 1, #[doc = "2: Voltage Source Bias 200mV"] - VSB200 = 2, + Vsb200 = 2, #[doc = "4: Voltage Source Bias 300mV"] - VSB300 = 4, + Vsb300 = 4, #[doc = "8: Voltage Source Bias 400mV"] - VSB400 = 8, + Vsb400 = 8, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RAMBIASCTRL_A) -> Self { + fn from(variant: Rambiasctrl) -> Self { variant as _ } } -impl RAMBIASCTRL_R { +impl crate::FieldSpec for Rambiasctrl { + type Ux = u8; +} +impl crate::IsEnum for Rambiasctrl {} +#[doc = "Field `RAMBIASCTRL` reader - RAM Bias Control"] +pub type RambiasctrlR = crate::FieldReader; +impl RambiasctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(RAMBIASCTRL_A::NO), - 1 => Some(RAMBIASCTRL_A::VSB100), - 2 => Some(RAMBIASCTRL_A::VSB200), - 4 => Some(RAMBIASCTRL_A::VSB300), - 8 => Some(RAMBIASCTRL_A::VSB400), + 0 => Some(Rambiasctrl::No), + 1 => Some(Rambiasctrl::Vsb100), + 2 => Some(Rambiasctrl::Vsb200), + 4 => Some(Rambiasctrl::Vsb300), + 8 => Some(Rambiasctrl::Vsb400), _ => None, } } - #[doc = "Checks if the value of the field is `NO`"] + #[doc = "None"] #[inline(always)] pub fn is_no(&self) -> bool { - *self == RAMBIASCTRL_A::NO + *self == Rambiasctrl::No } - #[doc = "Checks if the value of the field is `VSB100`"] + #[doc = "Voltage Source Bias 100mV"] #[inline(always)] pub fn is_vsb100(&self) -> bool { - *self == RAMBIASCTRL_A::VSB100 + *self == Rambiasctrl::Vsb100 } - #[doc = "Checks if the value of the field is `VSB200`"] + #[doc = "Voltage Source Bias 200mV"] #[inline(always)] pub fn is_vsb200(&self) -> bool { - *self == RAMBIASCTRL_A::VSB200 + *self == Rambiasctrl::Vsb200 } - #[doc = "Checks if the value of the field is `VSB300`"] + #[doc = "Voltage Source Bias 300mV"] #[inline(always)] pub fn is_vsb300(&self) -> bool { - *self == RAMBIASCTRL_A::VSB300 + *self == Rambiasctrl::Vsb300 } - #[doc = "Checks if the value of the field is `VSB400`"] + #[doc = "Voltage Source Bias 400mV"] #[inline(always)] pub fn is_vsb400(&self) -> bool { - *self == RAMBIASCTRL_A::VSB400 + *self == Rambiasctrl::Vsb400 } } #[doc = "Field `RAMBIASCTRL` writer - RAM Bias Control"] -pub type RAMBIASCTRL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, RAMBIASCONF_SPEC, u8, RAMBIASCTRL_A, 4, O>; -impl<'a, const O: u8> RAMBIASCTRL_W<'a, O> { +pub type RambiasctrlW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rambiasctrl>; +impl<'a, REG> RambiasctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "None"] #[inline(always)] - pub fn no(self) -> &'a mut W { - self.variant(RAMBIASCTRL_A::NO) + pub fn no(self) -> &'a mut crate::W { + self.variant(Rambiasctrl::No) } #[doc = "Voltage Source Bias 100mV"] #[inline(always)] - pub fn vsb100(self) -> &'a mut W { - self.variant(RAMBIASCTRL_A::VSB100) + pub fn vsb100(self) -> &'a mut crate::W { + self.variant(Rambiasctrl::Vsb100) } #[doc = "Voltage Source Bias 200mV"] #[inline(always)] - pub fn vsb200(self) -> &'a mut W { - self.variant(RAMBIASCTRL_A::VSB200) + pub fn vsb200(self) -> &'a mut crate::W { + self.variant(Rambiasctrl::Vsb200) } #[doc = "Voltage Source Bias 300mV"] #[inline(always)] - pub fn vsb300(self) -> &'a mut W { - self.variant(RAMBIASCTRL_A::VSB300) + pub fn vsb300(self) -> &'a mut crate::W { + self.variant(Rambiasctrl::Vsb300) } #[doc = "Voltage Source Bias 400mV"] #[inline(always)] - pub fn vsb400(self) -> &'a mut W { - self.variant(RAMBIASCTRL_A::VSB400) + pub fn vsb400(self) -> &'a mut crate::W { + self.variant(Rambiasctrl::Vsb400) } } impl R { #[doc = "Bits 0:3 - RAM Bias Control"] #[inline(always)] - pub fn rambiasctrl(&self) -> RAMBIASCTRL_R { - RAMBIASCTRL_R::new((self.bits & 0x0f) as u8) + pub fn rambiasctrl(&self) -> RambiasctrlR { + RambiasctrlR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - RAM Bias Control"] #[inline(always)] #[must_use] - pub fn rambiasctrl(&mut self) -> RAMBIASCTRL_W<0> { - RAMBIASCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rambiasctrl(&mut self) -> RambiasctrlW { + RambiasctrlW::new(self, 0) } } -#[doc = "Configure RAM bias configure bits.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rambiasconf](index.html) module"] -pub struct RAMBIASCONF_SPEC; -impl crate::RegisterSpec for RAMBIASCONF_SPEC { +#[doc = "Configure RAM bias configure bits.\n\nYou can [`read`](crate::Reg::read) this register and get [`rambiasconf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rambiasconf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RambiasconfSpec; +impl crate::RegisterSpec for RambiasconfSpec { type Ux = u32; } -#[doc = "`read()` method returns [rambiasconf::R](R) reader structure"] -impl crate::Readable for RAMBIASCONF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rambiasconf::W](W) writer structure"] -impl crate::Writable for RAMBIASCONF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`rambiasconf::R`](R) reader structure"] +impl crate::Readable for RambiasconfSpec {} +#[doc = "`write(|w| ..)` method takes [`rambiasconf::W`](W) writer structure"] +impl crate::Writable for RambiasconfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAMBIASCONF to value 0x02"] -impl crate::Resettable for RAMBIASCONF_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for RambiasconfSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/rootdata0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/rootdata0.rs index aafe866..5216ba2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/rootdata0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/rootdata0.rs @@ -1,80 +1,40 @@ #[doc = "Register `ROOTDATA0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ROOTDATA0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DATA` reader - Data"] -pub type DATA_R = crate::FieldReader; +pub type DataR = crate::FieldReader; #[doc = "Field `DATA` writer - Data"] -pub type DATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ROOTDATA0_SPEC, u32, u32, 32, O>; +pub type DataW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Data"] #[inline(always)] - pub fn data(&self) -> DATA_R { - DATA_R::new(self.bits) + pub fn data(&self) -> DataR { + DataR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Data"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W<0> { - DATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn data(&mut self) -> DataW { + DataW::new(self, 0) } } -#[doc = "Generic data space for user to pass to root, e.g., address of struct in mem\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rootdata0](index.html) module"] -pub struct ROOTDATA0_SPEC; -impl crate::RegisterSpec for ROOTDATA0_SPEC { +#[doc = "Generic data space for user to pass to root, e.g., address of struct in mem\n\nYou can [`read`](crate::Reg::read) this register and get [`rootdata0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rootdata0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Rootdata0Spec; +impl crate::RegisterSpec for Rootdata0Spec { type Ux = u32; } -#[doc = "`read()` method returns [rootdata0::R](R) reader structure"] -impl crate::Readable for ROOTDATA0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rootdata0::W](W) writer structure"] -impl crate::Writable for ROOTDATA0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`rootdata0::R`](R) reader structure"] +impl crate::Readable for Rootdata0Spec {} +#[doc = "`write(|w| ..)` method takes [`rootdata0::W`](W) writer structure"] +impl crate::Writable for Rootdata0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ROOTDATA0 to value 0"] -impl crate::Resettable for ROOTDATA0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Rootdata0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/rootdata1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/rootdata1.rs index f386677..d673338 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/rootdata1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/rootdata1.rs @@ -1,80 +1,40 @@ #[doc = "Register `ROOTDATA1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ROOTDATA1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DATA` reader - Data"] -pub type DATA_R = crate::FieldReader; +pub type DataR = crate::FieldReader; #[doc = "Field `DATA` writer - Data"] -pub type DATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ROOTDATA1_SPEC, u32, u32, 32, O>; +pub type DataW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Data"] #[inline(always)] - pub fn data(&self) -> DATA_R { - DATA_R::new(self.bits) + pub fn data(&self) -> DataR { + DataR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Data"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W<0> { - DATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn data(&mut self) -> DataW { + DataW::new(self, 0) } } -#[doc = "Generic data space for user to pass to root, e.g., address of struct in mem\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rootdata1](index.html) module"] -pub struct ROOTDATA1_SPEC; -impl crate::RegisterSpec for ROOTDATA1_SPEC { +#[doc = "Generic data space for user to pass to root, e.g., address of struct in mem\n\nYou can [`read`](crate::Reg::read) this register and get [`rootdata1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rootdata1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Rootdata1Spec; +impl crate::RegisterSpec for Rootdata1Spec { type Ux = u32; } -#[doc = "`read()` method returns [rootdata1::R](R) reader structure"] -impl crate::Readable for ROOTDATA1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rootdata1::W](W) writer structure"] -impl crate::Writable for ROOTDATA1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`rootdata1::R`](R) reader structure"] +impl crate::Readable for Rootdata1Spec {} +#[doc = "`write(|w| ..)` method takes [`rootdata1::W`](W) writer structure"] +impl crate::Writable for Rootdata1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ROOTDATA1 to value 0"] -impl crate::Resettable for ROOTDATA1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Rootdata1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/rootlockstatus.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/rootlockstatus.rs index b0971a8..187e0a6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/rootlockstatus.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/rootlockstatus.rs @@ -1,100 +1,85 @@ #[doc = "Register `ROOTLOCKSTATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `BUSLOCK` reader - Bus Lock"] -pub type BUSLOCK_R = crate::BitReader; +pub type BuslockR = crate::BitReader; #[doc = "Field `REGLOCK` reader - Register Lock"] -pub type REGLOCK_R = crate::BitReader; +pub type ReglockR = crate::BitReader; #[doc = "Field `MFRLOCK` reader - Manufacture Lock"] -pub type MFRLOCK_R = crate::BitReader; +pub type MfrlockR = crate::BitReader; #[doc = "Field `ROOTDBGLOCK` reader - Root Debug Lock"] -pub type ROOTDBGLOCK_R = crate::BitReader; +pub type RootdbglockR = crate::BitReader; #[doc = "Field `USERDBGAPLOCK` reader - User Debug Access Port Lock"] -pub type USERDBGAPLOCK_R = crate::BitReader; +pub type UserdbgaplockR = crate::BitReader; #[doc = "Field `USERDBGLOCK` reader - User Invasive Debug Lock"] -pub type USERDBGLOCK_R = crate::BitReader; +pub type UserdbglockR = crate::BitReader; #[doc = "Field `USERNIDLOCK` reader - User Non-invasive Debug Lock"] -pub type USERNIDLOCK_R = crate::BitReader; +pub type UsernidlockR = crate::BitReader; #[doc = "Field `USERSPIDLOCK` reader - User Secure Invasive Debug Lock"] -pub type USERSPIDLOCK_R = crate::BitReader; +pub type UserspidlockR = crate::BitReader; #[doc = "Field `USERSPNIDLOCK` reader - User Secure Non-invasive Debug Lock"] -pub type USERSPNIDLOCK_R = crate::BitReader; +pub type UserspnidlockR = crate::BitReader; #[doc = "Field `EFUSEUNLOCKED` reader - E-Fuse Unlocked"] -pub type EFUSEUNLOCKED_R = crate::BitReader; +pub type EfuseunlockedR = crate::BitReader; impl R { #[doc = "Bit 0 - Bus Lock"] #[inline(always)] - pub fn buslock(&self) -> BUSLOCK_R { - BUSLOCK_R::new((self.bits & 1) != 0) + pub fn buslock(&self) -> BuslockR { + BuslockR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Register Lock"] #[inline(always)] - pub fn reglock(&self) -> REGLOCK_R { - REGLOCK_R::new(((self.bits >> 1) & 1) != 0) + pub fn reglock(&self) -> ReglockR { + ReglockR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Manufacture Lock"] #[inline(always)] - pub fn mfrlock(&self) -> MFRLOCK_R { - MFRLOCK_R::new(((self.bits >> 2) & 1) != 0) + pub fn mfrlock(&self) -> MfrlockR { + MfrlockR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 8 - Root Debug Lock"] #[inline(always)] - pub fn rootdbglock(&self) -> ROOTDBGLOCK_R { - ROOTDBGLOCK_R::new(((self.bits >> 8) & 1) != 0) + pub fn rootdbglock(&self) -> RootdbglockR { + RootdbglockR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 16 - User Debug Access Port Lock"] #[inline(always)] - pub fn userdbgaplock(&self) -> USERDBGAPLOCK_R { - USERDBGAPLOCK_R::new(((self.bits >> 16) & 1) != 0) + pub fn userdbgaplock(&self) -> UserdbgaplockR { + UserdbgaplockR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - User Invasive Debug Lock"] #[inline(always)] - pub fn userdbglock(&self) -> USERDBGLOCK_R { - USERDBGLOCK_R::new(((self.bits >> 17) & 1) != 0) + pub fn userdbglock(&self) -> UserdbglockR { + UserdbglockR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - User Non-invasive Debug Lock"] #[inline(always)] - pub fn usernidlock(&self) -> USERNIDLOCK_R { - USERNIDLOCK_R::new(((self.bits >> 18) & 1) != 0) + pub fn usernidlock(&self) -> UsernidlockR { + UsernidlockR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - User Secure Invasive Debug Lock"] #[inline(always)] - pub fn userspidlock(&self) -> USERSPIDLOCK_R { - USERSPIDLOCK_R::new(((self.bits >> 19) & 1) != 0) + pub fn userspidlock(&self) -> UserspidlockR { + UserspidlockR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - User Secure Non-invasive Debug Lock"] #[inline(always)] - pub fn userspnidlock(&self) -> USERSPNIDLOCK_R { - USERSPNIDLOCK_R::new(((self.bits >> 20) & 1) != 0) + pub fn userspnidlock(&self) -> UserspnidlockR { + UserspnidlockR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 31 - E-Fuse Unlocked"] #[inline(always)] - pub fn efuseunlocked(&self) -> EFUSEUNLOCKED_R { - EFUSEUNLOCKED_R::new(((self.bits >> 31) & 1) != 0) + pub fn efuseunlocked(&self) -> EfuseunlockedR { + EfuseunlockedR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "This register returns the status of the SE managed locks.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rootlockstatus](index.html) module"] -pub struct ROOTLOCKSTATUS_SPEC; -impl crate::RegisterSpec for ROOTLOCKSTATUS_SPEC { +#[doc = "This register returns the status of the SE managed locks.\n\nYou can [`read`](crate::Reg::read) this register and get [`rootlockstatus::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RootlockstatusSpec; +impl crate::RegisterSpec for RootlockstatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [rootlockstatus::R](R) reader structure"] -impl crate::Readable for ROOTLOCKSTATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rootlockstatus::R`](R) reader structure"] +impl crate::Readable for RootlockstatusSpec {} #[doc = "`reset()` method sets ROOTLOCKSTATUS to value 0x007f_0107"] -impl crate::Resettable for ROOTLOCKSTATUS_SPEC { - const RESET_VALUE: Self::Ux = 0x007f_0107; +impl crate::Resettable for RootlockstatusSpec { + const RESET_VALUE: u32 = 0x007f_0107; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/rootseswversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/rootseswversion.rs index 9e94d10..af764e9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/rootseswversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns/rootseswversion.rs @@ -1,81 +1,40 @@ #[doc = "Register `ROOTSESWVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ROOTSESWVERSION` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SWVERSION` reader - SW Version"] -pub type SWVERSION_R = crate::FieldReader; +pub type SwversionR = crate::FieldReader; #[doc = "Field `SWVERSION` writer - SW Version"] -pub type SWVERSION_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ROOTSESWVERSION_SPEC, u32, u32, 32, O>; +pub type SwversionW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - SW Version"] #[inline(always)] - pub fn swversion(&self) -> SWVERSION_R { - SWVERSION_R::new(self.bits) + pub fn swversion(&self) -> SwversionR { + SwversionR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - SW Version"] #[inline(always)] #[must_use] - pub fn swversion(&mut self) -> SWVERSION_W<0> { - SWVERSION_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn swversion(&mut self) -> SwversionW { + SwversionW::new(self, 0) } } -#[doc = "SE Software version\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rootseswversion](index.html) module"] -pub struct ROOTSESWVERSION_SPEC; -impl crate::RegisterSpec for ROOTSESWVERSION_SPEC { +#[doc = "SE Software version\n\nYou can [`read`](crate::Reg::read) this register and get [`rootseswversion::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rootseswversion::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RootseswversionSpec; +impl crate::RegisterSpec for RootseswversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [rootseswversion::R](R) reader structure"] -impl crate::Readable for ROOTSESWVERSION_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rootseswversion::W](W) writer structure"] -impl crate::Writable for ROOTSESWVERSION_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`rootseswversion::R`](R) reader structure"] +impl crate::Readable for RootseswversionSpec {} +#[doc = "`write(|w| ..)` method takes [`rootseswversion::W`](W) writer structure"] +impl crate::Writable for RootseswversionSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ROOTSESWVERSION to value 0"] -impl crate::Resettable for ROOTSESWVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RootseswversionSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns_cfgns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns_cfgns.rs index a128eee..992fc00 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns_cfgns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns_cfgns.rs @@ -1,24 +1,44 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { _reserved0: [u8; 0x1c], - #[doc = "0x1c - Configure to define the system tick for the M33."] - pub cfgnstcalib: CFGNSTCALIB, + cfgnstcalib: Cfgnstcalib, _reserved1: [u8; 0x05e0], + rootnsdata0: Rootnsdata0, + rootnsdata1: Rootnsdata1, +} +impl RegisterBlock { + #[doc = "0x1c - Configure to define the system tick for the M33."] + #[inline(always)] + pub const fn cfgnstcalib(&self) -> &Cfgnstcalib { + &self.cfgnstcalib + } #[doc = "0x600 - Generic data space for user to pass to root, e.g., address of struct in mem"] - pub rootnsdata0: ROOTNSDATA0, + #[inline(always)] + pub const fn rootnsdata0(&self) -> &Rootnsdata0 { + &self.rootnsdata0 + } #[doc = "0x604 - Generic data space for user to pass to root, e.g., address of struct in mem"] - pub rootnsdata1: ROOTNSDATA1, + #[inline(always)] + pub const fn rootnsdata1(&self) -> &Rootnsdata1 { + &self.rootnsdata1 + } } -#[doc = "CFGNSTCALIB (rw) register accessor: an alias for `Reg`"] -pub type CFGNSTCALIB = crate::Reg; +#[doc = "CFGNSTCALIB (rw) register accessor: Configure to define the system tick for the M33.\n\nYou can [`read`](crate::Reg::read) this register and get [`cfgnstcalib::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgnstcalib::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfgnstcalib`] +module"] +#[doc(alias = "CFGNSTCALIB")] +pub type Cfgnstcalib = crate::Reg; #[doc = "Configure to define the system tick for the M33."] pub mod cfgnstcalib; -#[doc = "ROOTNSDATA0 (rw) register accessor: an alias for `Reg`"] -pub type ROOTNSDATA0 = crate::Reg; +#[doc = "ROOTNSDATA0 (rw) register accessor: Generic data space for user to pass to root, e.g., address of struct in mem\n\nYou can [`read`](crate::Reg::read) this register and get [`rootnsdata0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rootnsdata0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rootnsdata0`] +module"] +#[doc(alias = "ROOTNSDATA0")] +pub type Rootnsdata0 = crate::Reg; #[doc = "Generic data space for user to pass to root, e.g., address of struct in mem"] pub mod rootnsdata0; -#[doc = "ROOTNSDATA1 (rw) register accessor: an alias for `Reg`"] -pub type ROOTNSDATA1 = crate::Reg; +#[doc = "ROOTNSDATA1 (rw) register accessor: Generic data space for user to pass to root, e.g., address of struct in mem\n\nYou can [`read`](crate::Reg::read) this register and get [`rootnsdata1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rootnsdata1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rootnsdata1`] +module"] +#[doc(alias = "ROOTNSDATA1")] +pub type Rootnsdata1 = crate::Reg; #[doc = "Generic data space for user to pass to root, e.g., address of struct in mem"] pub mod rootnsdata1; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns_cfgns/cfgnstcalib.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns_cfgns/cfgnstcalib.rs index 0f795a0..a65de4a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns_cfgns/cfgnstcalib.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns_cfgns/cfgnstcalib.rs @@ -1,156 +1,119 @@ #[doc = "Register `CFGNSTCALIB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFGNSTCALIB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TENMS` reader - Ten Milliseconds"] -pub type TENMS_R = crate::FieldReader; +pub type TenmsR = crate::FieldReader; #[doc = "Field `TENMS` writer - Ten Milliseconds"] -pub type TENMS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFGNSTCALIB_SPEC, u32, u32, 24, O>; +pub type TenmsW<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>; #[doc = "Field `SKEW` reader - Skew"] -pub type SKEW_R = crate::BitReader; +pub type SkewR = crate::BitReader; #[doc = "Field `SKEW` writer - Skew"] -pub type SKEW_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFGNSTCALIB_SPEC, bool, O>; -#[doc = "Field `NOREF` reader - No Reference"] -pub type NOREF_R = crate::BitReader; +pub type SkewW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "No Reference\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum NOREF_A { +pub enum Noref { #[doc = "0: Reference clock is implemented"] - REF = 0, + Ref = 0, #[doc = "1: Reference clock is not implemented"] - NOREF = 1, + Noref = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: NOREF_A) -> Self { + fn from(variant: Noref) -> Self { variant as u8 != 0 } } -impl NOREF_R { +#[doc = "Field `NOREF` reader - No Reference"] +pub type NorefR = crate::BitReader; +impl NorefR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> NOREF_A { + pub const fn variant(&self) -> Noref { match self.bits { - false => NOREF_A::REF, - true => NOREF_A::NOREF, + false => Noref::Ref, + true => Noref::Noref, } } - #[doc = "Checks if the value of the field is `REF`"] + #[doc = "Reference clock is implemented"] #[inline(always)] pub fn is_ref(&self) -> bool { - *self == NOREF_A::REF + *self == Noref::Ref } - #[doc = "Checks if the value of the field is `NOREF`"] + #[doc = "Reference clock is not implemented"] #[inline(always)] pub fn is_noref(&self) -> bool { - *self == NOREF_A::NOREF + *self == Noref::Noref } } #[doc = "Field `NOREF` writer - No Reference"] -pub type NOREF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFGNSTCALIB_SPEC, NOREF_A, O>; -impl<'a, const O: u8> NOREF_W<'a, O> { +pub type NorefW<'a, REG> = crate::BitWriter<'a, REG, Noref>; +impl<'a, REG> NorefW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Reference clock is implemented"] #[inline(always)] - pub fn ref_(self) -> &'a mut W { - self.variant(NOREF_A::REF) + pub fn ref_(self) -> &'a mut crate::W { + self.variant(Noref::Ref) } #[doc = "Reference clock is not implemented"] #[inline(always)] - pub fn noref(self) -> &'a mut W { - self.variant(NOREF_A::NOREF) + pub fn noref(self) -> &'a mut crate::W { + self.variant(Noref::Noref) } } impl R { #[doc = "Bits 0:23 - Ten Milliseconds"] #[inline(always)] - pub fn tenms(&self) -> TENMS_R { - TENMS_R::new(self.bits & 0x00ff_ffff) + pub fn tenms(&self) -> TenmsR { + TenmsR::new(self.bits & 0x00ff_ffff) } #[doc = "Bit 24 - Skew"] #[inline(always)] - pub fn skew(&self) -> SKEW_R { - SKEW_R::new(((self.bits >> 24) & 1) != 0) + pub fn skew(&self) -> SkewR { + SkewR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - No Reference"] #[inline(always)] - pub fn noref(&self) -> NOREF_R { - NOREF_R::new(((self.bits >> 25) & 1) != 0) + pub fn noref(&self) -> NorefR { + NorefR::new(((self.bits >> 25) & 1) != 0) } } impl W { #[doc = "Bits 0:23 - Ten Milliseconds"] #[inline(always)] #[must_use] - pub fn tenms(&mut self) -> TENMS_W<0> { - TENMS_W::new(self) + pub fn tenms(&mut self) -> TenmsW { + TenmsW::new(self, 0) } #[doc = "Bit 24 - Skew"] #[inline(always)] #[must_use] - pub fn skew(&mut self) -> SKEW_W<24> { - SKEW_W::new(self) + pub fn skew(&mut self) -> SkewW { + SkewW::new(self, 24) } #[doc = "Bit 25 - No Reference"] #[inline(always)] #[must_use] - pub fn noref(&mut self) -> NOREF_W<25> { - NOREF_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn noref(&mut self) -> NorefW { + NorefW::new(self, 25) } } -#[doc = "Configure to define the system tick for the M33.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfgnstcalib](index.html) module"] -pub struct CFGNSTCALIB_SPEC; -impl crate::RegisterSpec for CFGNSTCALIB_SPEC { +#[doc = "Configure to define the system tick for the M33.\n\nYou can [`read`](crate::Reg::read) this register and get [`cfgnstcalib::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgnstcalib::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgnstcalibSpec; +impl crate::RegisterSpec for CfgnstcalibSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfgnstcalib::R](R) reader structure"] -impl crate::Readable for CFGNSTCALIB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfgnstcalib::W](W) writer structure"] -impl crate::Writable for CFGNSTCALIB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfgnstcalib::R`](R) reader structure"] +impl crate::Readable for CfgnstcalibSpec {} +#[doc = "`write(|w| ..)` method takes [`cfgnstcalib::W`](W) writer structure"] +impl crate::Writable for CfgnstcalibSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFGNSTCALIB to value 0x0100_4a37"] -impl crate::Resettable for CFGNSTCALIB_SPEC { - const RESET_VALUE: Self::Ux = 0x0100_4a37; +impl crate::Resettable for CfgnstcalibSpec { + const RESET_VALUE: u32 = 0x0100_4a37; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns_cfgns/rootnsdata0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns_cfgns/rootnsdata0.rs index 0e6b770..ee72038 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns_cfgns/rootnsdata0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns_cfgns/rootnsdata0.rs @@ -1,80 +1,40 @@ #[doc = "Register `ROOTNSDATA0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ROOTNSDATA0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DATA` reader - Data"] -pub type DATA_R = crate::FieldReader; +pub type DataR = crate::FieldReader; #[doc = "Field `DATA` writer - Data"] -pub type DATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ROOTNSDATA0_SPEC, u32, u32, 32, O>; +pub type DataW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Data"] #[inline(always)] - pub fn data(&self) -> DATA_R { - DATA_R::new(self.bits) + pub fn data(&self) -> DataR { + DataR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Data"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W<0> { - DATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn data(&mut self) -> DataW { + DataW::new(self, 0) } } -#[doc = "Generic data space for user to pass to root, e.g., address of struct in mem\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rootnsdata0](index.html) module"] -pub struct ROOTNSDATA0_SPEC; -impl crate::RegisterSpec for ROOTNSDATA0_SPEC { +#[doc = "Generic data space for user to pass to root, e.g., address of struct in mem\n\nYou can [`read`](crate::Reg::read) this register and get [`rootnsdata0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rootnsdata0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Rootnsdata0Spec; +impl crate::RegisterSpec for Rootnsdata0Spec { type Ux = u32; } -#[doc = "`read()` method returns [rootnsdata0::R](R) reader structure"] -impl crate::Readable for ROOTNSDATA0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rootnsdata0::W](W) writer structure"] -impl crate::Writable for ROOTNSDATA0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`rootnsdata0::R`](R) reader structure"] +impl crate::Readable for Rootnsdata0Spec {} +#[doc = "`write(|w| ..)` method takes [`rootnsdata0::W`](W) writer structure"] +impl crate::Writable for Rootnsdata0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ROOTNSDATA0 to value 0"] -impl crate::Resettable for ROOTNSDATA0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Rootnsdata0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns_cfgns/rootnsdata1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns_cfgns/rootnsdata1.rs index bbca598..ab91344 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns_cfgns/rootnsdata1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_ns_cfgns/rootnsdata1.rs @@ -1,80 +1,40 @@ #[doc = "Register `ROOTNSDATA1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ROOTNSDATA1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DATA` reader - Data"] -pub type DATA_R = crate::FieldReader; +pub type DataR = crate::FieldReader; #[doc = "Field `DATA` writer - Data"] -pub type DATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ROOTNSDATA1_SPEC, u32, u32, 32, O>; +pub type DataW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Data"] #[inline(always)] - pub fn data(&self) -> DATA_R { - DATA_R::new(self.bits) + pub fn data(&self) -> DataR { + DataR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Data"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W<0> { - DATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn data(&mut self) -> DataW { + DataW::new(self, 0) } } -#[doc = "Generic data space for user to pass to root, e.g., address of struct in mem\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rootnsdata1](index.html) module"] -pub struct ROOTNSDATA1_SPEC; -impl crate::RegisterSpec for ROOTNSDATA1_SPEC { +#[doc = "Generic data space for user to pass to root, e.g., address of struct in mem\n\nYou can [`read`](crate::Reg::read) this register and get [`rootnsdata1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rootnsdata1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Rootnsdata1Spec; +impl crate::RegisterSpec for Rootnsdata1Spec { type Ux = u32; } -#[doc = "`read()` method returns [rootnsdata1::R](R) reader structure"] -impl crate::Readable for ROOTNSDATA1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rootnsdata1::W](W) writer structure"] -impl crate::Writable for ROOTNSDATA1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`rootnsdata1::R`](R) reader structure"] +impl crate::Readable for Rootnsdata1Spec {} +#[doc = "`write(|w| ..)` method takes [`rootnsdata1::W`](W) writer structure"] +impl crate::Writable for Rootnsdata1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ROOTNSDATA1 to value 0"] -impl crate::Resettable for ROOTNSDATA1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Rootnsdata1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s.rs index 8e028f5..4da41d2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s.rs @@ -1,102 +1,194 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { _reserved0: [u8; 0x04], + ipversion: Ipversion, + if_: If, + ien: Ien, + _reserved3: [u8; 0x04], + chiprevhw: Chiprevhw, + chiprev: Chiprev, + _reserved5: [u8; 0x08], + cfgsystic: Cfgsystic, + _reserved6: [u8; 0x01d8], + ctrl: Ctrl, + _reserved7: [u8; 0x04], + dmem0retnctrl: Dmem0retnctrl, + _reserved8: [u8; 0x0100], + rambiasconf: Rambiasconf, + _reserved9: [u8; 0x0108], + icacheramretnctrl: Icacheramretnctrl, + dmem0portmapsel: Dmem0portmapsel, + _reserved11: [u8; 0x01e0], + rootdata0: Rootdata0, + rootdata1: Rootdata1, + rootlockstatus: Rootlockstatus, + rootseswversion: Rootseswversion, +} +impl RegisterBlock { #[doc = "0x04 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x08 - Read to get system status."] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x0c - Write to enable interrupts."] - pub ien: IEN, - _reserved3: [u8; 0x04], + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x14 - Read to get the hard-wired chip revision."] - pub chiprevhw: CHIPREVHW, + #[inline(always)] + pub const fn chiprevhw(&self) -> &Chiprevhw { + &self.chiprevhw + } #[doc = "0x18 - Read to get the chip revision programmed by feature configuration."] - pub chiprev: CHIPREV, - _reserved5: [u8; 0x08], + #[inline(always)] + pub const fn chiprev(&self) -> &Chiprev { + &self.chiprev + } #[doc = "0x24 - Configure the source of the system tick for the M33."] - pub cfgsystic: CFGSYSTIC, - _reserved6: [u8; 0x01d8], + #[inline(always)] + pub const fn cfgsystic(&self) -> &Cfgsystic { + &self.cfgsystic + } #[doc = "0x200 - Configure to provide general RAM configuration."] - pub ctrl: CTRL, - _reserved7: [u8; 0x04], + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x208 - Configure to provide general RAM retention configuration."] - pub dmem0retnctrl: DMEM0RETNCTRL, - _reserved8: [u8; 0x0100], + #[inline(always)] + pub const fn dmem0retnctrl(&self) -> &Dmem0retnctrl { + &self.dmem0retnctrl + } #[doc = "0x30c - Configure RAM bias configure bits."] - pub rambiasconf: RAMBIASCONF, - _reserved9: [u8; 0x0108], + #[inline(always)] + pub const fn rambiasconf(&self) -> &Rambiasconf { + &self.rambiasconf + } #[doc = "0x418 - Configure Host ICACHERAM retention configuration."] - pub icacheramretnctrl: ICACHERAMRETNCTRL, + #[inline(always)] + pub const fn icacheramretnctrl(&self) -> &Icacheramretnctrl { + &self.icacheramretnctrl + } #[doc = "0x41c - Configure DMEM0 port remap selection."] - pub dmem0portmapsel: DMEM0PORTMAPSEL, - _reserved11: [u8; 0x01e0], + #[inline(always)] + pub const fn dmem0portmapsel(&self) -> &Dmem0portmapsel { + &self.dmem0portmapsel + } #[doc = "0x600 - Generic data space for user to pass to root, e.g., address of struct in mem"] - pub rootdata0: ROOTDATA0, + #[inline(always)] + pub const fn rootdata0(&self) -> &Rootdata0 { + &self.rootdata0 + } #[doc = "0x604 - Generic data space for user to pass to root, e.g., address of struct in mem"] - pub rootdata1: ROOTDATA1, + #[inline(always)] + pub const fn rootdata1(&self) -> &Rootdata1 { + &self.rootdata1 + } #[doc = "0x608 - This register returns the status of the SE managed locks."] - pub rootlockstatus: ROOTLOCKSTATUS, + #[inline(always)] + pub const fn rootlockstatus(&self) -> &Rootlockstatus { + &self.rootlockstatus + } #[doc = "0x60c - SE Software version"] - pub rootseswversion: ROOTSESWVERSION, + #[inline(always)] + pub const fn rootseswversion(&self) -> &Rootseswversion { + &self.rootseswversion + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: Read to get system status.\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "Read to get system status."] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: Write to enable interrupts.\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "Write to enable interrupts."] pub mod ien; -#[doc = "CHIPREVHW (rw) register accessor: an alias for `Reg`"] -pub type CHIPREVHW = crate::Reg; +#[doc = "CHIPREVHW (rw) register accessor: Read to get the hard-wired chip revision.\n\nYou can [`read`](crate::Reg::read) this register and get [`chiprevhw::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chiprevhw::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chiprevhw`] +module"] +#[doc(alias = "CHIPREVHW")] +pub type Chiprevhw = crate::Reg; #[doc = "Read to get the hard-wired chip revision."] pub mod chiprevhw; -#[doc = "CHIPREV (rw) register accessor: an alias for `Reg`"] -pub type CHIPREV = crate::Reg; +#[doc = "CHIPREV (rw) register accessor: Read to get the chip revision programmed by feature configuration.\n\nYou can [`read`](crate::Reg::read) this register and get [`chiprev::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chiprev::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chiprev`] +module"] +#[doc(alias = "CHIPREV")] +pub type Chiprev = crate::Reg; #[doc = "Read to get the chip revision programmed by feature configuration."] pub mod chiprev; -#[doc = "CFGSYSTIC (rw) register accessor: an alias for `Reg`"] -pub type CFGSYSTIC = crate::Reg; +#[doc = "CFGSYSTIC (rw) register accessor: Configure the source of the system tick for the M33.\n\nYou can [`read`](crate::Reg::read) this register and get [`cfgsystic::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgsystic::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfgsystic`] +module"] +#[doc(alias = "CFGSYSTIC")] +pub type Cfgsystic = crate::Reg; #[doc = "Configure the source of the system tick for the M33."] pub mod cfgsystic; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: Configure to provide general RAM configuration.\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "Configure to provide general RAM configuration."] pub mod ctrl; -#[doc = "DMEM0RETNCTRL (rw) register accessor: an alias for `Reg`"] -pub type DMEM0RETNCTRL = crate::Reg; +#[doc = "DMEM0RETNCTRL (rw) register accessor: Configure to provide general RAM retention configuration.\n\nYou can [`read`](crate::Reg::read) this register and get [`dmem0retnctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmem0retnctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmem0retnctrl`] +module"] +#[doc(alias = "DMEM0RETNCTRL")] +pub type Dmem0retnctrl = crate::Reg; #[doc = "Configure to provide general RAM retention configuration."] pub mod dmem0retnctrl; -#[doc = "RAMBIASCONF (rw) register accessor: an alias for `Reg`"] -pub type RAMBIASCONF = crate::Reg; +#[doc = "RAMBIASCONF (rw) register accessor: Configure RAM bias configure bits.\n\nYou can [`read`](crate::Reg::read) this register and get [`rambiasconf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rambiasconf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rambiasconf`] +module"] +#[doc(alias = "RAMBIASCONF")] +pub type Rambiasconf = crate::Reg; #[doc = "Configure RAM bias configure bits."] pub mod rambiasconf; -#[doc = "ICACHERAMRETNCTRL (rw) register accessor: an alias for `Reg`"] -pub type ICACHERAMRETNCTRL = crate::Reg; +#[doc = "ICACHERAMRETNCTRL (rw) register accessor: Configure Host ICACHERAM retention configuration.\n\nYou can [`read`](crate::Reg::read) this register and get [`icacheramretnctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icacheramretnctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icacheramretnctrl`] +module"] +#[doc(alias = "ICACHERAMRETNCTRL")] +pub type Icacheramretnctrl = crate::Reg; #[doc = "Configure Host ICACHERAM retention configuration."] pub mod icacheramretnctrl; -#[doc = "DMEM0PORTMAPSEL (rw) register accessor: an alias for `Reg`"] -pub type DMEM0PORTMAPSEL = crate::Reg; +#[doc = "DMEM0PORTMAPSEL (rw) register accessor: Configure DMEM0 port remap selection.\n\nYou can [`read`](crate::Reg::read) this register and get [`dmem0portmapsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmem0portmapsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmem0portmapsel`] +module"] +#[doc(alias = "DMEM0PORTMAPSEL")] +pub type Dmem0portmapsel = crate::Reg; #[doc = "Configure DMEM0 port remap selection."] pub mod dmem0portmapsel; -#[doc = "ROOTDATA0 (rw) register accessor: an alias for `Reg`"] -pub type ROOTDATA0 = crate::Reg; +#[doc = "ROOTDATA0 (rw) register accessor: Generic data space for user to pass to root, e.g., address of struct in mem\n\nYou can [`read`](crate::Reg::read) this register and get [`rootdata0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rootdata0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rootdata0`] +module"] +#[doc(alias = "ROOTDATA0")] +pub type Rootdata0 = crate::Reg; #[doc = "Generic data space for user to pass to root, e.g., address of struct in mem"] pub mod rootdata0; -#[doc = "ROOTDATA1 (rw) register accessor: an alias for `Reg`"] -pub type ROOTDATA1 = crate::Reg; +#[doc = "ROOTDATA1 (rw) register accessor: Generic data space for user to pass to root, e.g., address of struct in mem\n\nYou can [`read`](crate::Reg::read) this register and get [`rootdata1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rootdata1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rootdata1`] +module"] +#[doc(alias = "ROOTDATA1")] +pub type Rootdata1 = crate::Reg; #[doc = "Generic data space for user to pass to root, e.g., address of struct in mem"] pub mod rootdata1; -#[doc = "ROOTLOCKSTATUS (r) register accessor: an alias for `Reg`"] -pub type ROOTLOCKSTATUS = crate::Reg; +#[doc = "ROOTLOCKSTATUS (r) register accessor: This register returns the status of the SE managed locks.\n\nYou can [`read`](crate::Reg::read) this register and get [`rootlockstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rootlockstatus`] +module"] +#[doc(alias = "ROOTLOCKSTATUS")] +pub type Rootlockstatus = crate::Reg; #[doc = "This register returns the status of the SE managed locks."] pub mod rootlockstatus; -#[doc = "ROOTSESWVERSION (rw) register accessor: an alias for `Reg`"] -pub type ROOTSESWVERSION = crate::Reg; +#[doc = "ROOTSESWVERSION (rw) register accessor: SE Software version\n\nYou can [`read`](crate::Reg::read) this register and get [`rootseswversion::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rootseswversion::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rootseswversion`] +module"] +#[doc(alias = "ROOTSESWVERSION")] +pub type Rootseswversion = crate::Reg; #[doc = "SE Software version"] pub mod rootseswversion; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/cfgsystic.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/cfgsystic.rs index 5eac7f3..11cf15a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/cfgsystic.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/cfgsystic.rs @@ -1,80 +1,40 @@ #[doc = "Register `CFGSYSTIC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFGSYSTIC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SYSTICEXTCLKEN` reader - SysTick External Clock Enable"] -pub type SYSTICEXTCLKEN_R = crate::BitReader; +pub type SysticextclkenR = crate::BitReader; #[doc = "Field `SYSTICEXTCLKEN` writer - SysTick External Clock Enable"] -pub type SYSTICEXTCLKEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFGSYSTIC_SPEC, bool, O>; +pub type SysticextclkenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - SysTick External Clock Enable"] #[inline(always)] - pub fn systicextclken(&self) -> SYSTICEXTCLKEN_R { - SYSTICEXTCLKEN_R::new((self.bits & 1) != 0) + pub fn systicextclken(&self) -> SysticextclkenR { + SysticextclkenR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - SysTick External Clock Enable"] #[inline(always)] #[must_use] - pub fn systicextclken(&mut self) -> SYSTICEXTCLKEN_W<0> { - SYSTICEXTCLKEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn systicextclken(&mut self) -> SysticextclkenW { + SysticextclkenW::new(self, 0) } } -#[doc = "Configure the source of the system tick for the M33.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfgsystic](index.html) module"] -pub struct CFGSYSTIC_SPEC; -impl crate::RegisterSpec for CFGSYSTIC_SPEC { +#[doc = "Configure the source of the system tick for the M33.\n\nYou can [`read`](crate::Reg::read) this register and get [`cfgsystic::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgsystic::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgsysticSpec; +impl crate::RegisterSpec for CfgsysticSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfgsystic::R](R) reader structure"] -impl crate::Readable for CFGSYSTIC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfgsystic::W](W) writer structure"] -impl crate::Writable for CFGSYSTIC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfgsystic::R`](R) reader structure"] +impl crate::Readable for CfgsysticSpec {} +#[doc = "`write(|w| ..)` method takes [`cfgsystic::W`](W) writer structure"] +impl crate::Writable for CfgsysticSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFGSYSTIC to value 0"] -impl crate::Resettable for CFGSYSTIC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CfgsysticSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/chiprev.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/chiprev.rs index 3fdcc1a..e41fa26 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/chiprev.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/chiprev.rs @@ -1,110 +1,152 @@ #[doc = "Register `CHIPREV` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; +pub type R = crate::R; +#[doc = "Register `CHIPREV` writer"] +pub type W = crate::W; +#[doc = "Field `MAJOR` reader - Chip Revision Major value"] +pub type MajorR = crate::FieldReader; +#[doc = "Field `MAJOR` writer - Chip Revision Major value"] +pub type MajorW<'a, REG> = crate::FieldWriter<'a, REG, 6>; +#[doc = "Chip Family value\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq, Eq)] +#[repr(u8)] +pub enum Family { + #[doc = "26: Product is in PG23 family"] + Pg23 = 26, + #[doc = "56: Product is in FG23 family"] + Fg23 = 56, + #[doc = "57: Product is in ZG23 family"] + Zg23 = 57, + #[doc = "58: Product is in SG23 family"] + Sg23 = 58, +} +impl From for u8 { #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 + fn from(variant: Family) -> Self { + variant as _ } } -impl From> for R { +impl crate::FieldSpec for Family { + type Ux = u8; +} +impl crate::IsEnum for Family {} +#[doc = "Field `FAMILY` reader - Chip Family value"] +pub type FamilyR = crate::FieldReader; +impl FamilyR { + #[doc = "Get enumerated values variant"] #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) + pub const fn variant(&self) -> Option { + match self.bits { + 26 => Some(Family::Pg23), + 56 => Some(Family::Fg23), + 57 => Some(Family::Zg23), + 58 => Some(Family::Sg23), + _ => None, + } } -} -#[doc = "Register `CHIPREV` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; + #[doc = "Product is in PG23 family"] #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 + pub fn is_pg23(&self) -> bool { + *self == Family::Pg23 } -} -impl core::ops::DerefMut for W { + #[doc = "Product is in FG23 family"] #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 + pub fn is_fg23(&self) -> bool { + *self == Family::Fg23 } -} -impl From> for W { + #[doc = "Product is in ZG23 family"] #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) + pub fn is_zg23(&self) -> bool { + *self == Family::Zg23 + } + #[doc = "Product is in SG23 family"] + #[inline(always)] + pub fn is_sg23(&self) -> bool { + *self == Family::Sg23 } } -#[doc = "Field `MAJOR` reader - Chip Revision Major value"] -pub type MAJOR_R = crate::FieldReader; -#[doc = "Field `MAJOR` writer - Chip Revision Major value"] -pub type MAJOR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CHIPREV_SPEC, u8, u8, 6, O>; -#[doc = "Field `FAMILY` reader - Chip Family value"] -pub type FAMILY_R = crate::FieldReader; #[doc = "Field `FAMILY` writer - Chip Family value"] -pub type FAMILY_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CHIPREV_SPEC, u8, u8, 6, O>; +pub type FamilyW<'a, REG> = crate::FieldWriter<'a, REG, 6, Family>; +impl<'a, REG> FamilyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ + #[doc = "Product is in PG23 family"] + #[inline(always)] + pub fn pg23(self) -> &'a mut crate::W { + self.variant(Family::Pg23) + } + #[doc = "Product is in FG23 family"] + #[inline(always)] + pub fn fg23(self) -> &'a mut crate::W { + self.variant(Family::Fg23) + } + #[doc = "Product is in ZG23 family"] + #[inline(always)] + pub fn zg23(self) -> &'a mut crate::W { + self.variant(Family::Zg23) + } + #[doc = "Product is in SG23 family"] + #[inline(always)] + pub fn sg23(self) -> &'a mut crate::W { + self.variant(Family::Sg23) + } +} #[doc = "Field `MINOR` reader - Chip Revision Minor value"] -pub type MINOR_R = crate::FieldReader; +pub type MinorR = crate::FieldReader; #[doc = "Field `MINOR` writer - Chip Revision Minor value"] -pub type MINOR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CHIPREV_SPEC, u8, u8, 8, O>; +pub type MinorW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:5 - Chip Revision Major value"] #[inline(always)] - pub fn major(&self) -> MAJOR_R { - MAJOR_R::new((self.bits & 0x3f) as u8) + pub fn major(&self) -> MajorR { + MajorR::new((self.bits & 0x3f) as u8) } #[doc = "Bits 6:11 - Chip Family value"] #[inline(always)] - pub fn family(&self) -> FAMILY_R { - FAMILY_R::new(((self.bits >> 6) & 0x3f) as u8) + pub fn family(&self) -> FamilyR { + FamilyR::new(((self.bits >> 6) & 0x3f) as u8) } #[doc = "Bits 12:19 - Chip Revision Minor value"] #[inline(always)] - pub fn minor(&self) -> MINOR_R { - MINOR_R::new(((self.bits >> 12) & 0xff) as u8) + pub fn minor(&self) -> MinorR { + MinorR::new(((self.bits >> 12) & 0xff) as u8) } } impl W { #[doc = "Bits 0:5 - Chip Revision Major value"] #[inline(always)] #[must_use] - pub fn major(&mut self) -> MAJOR_W<0> { - MAJOR_W::new(self) + pub fn major(&mut self) -> MajorW { + MajorW::new(self, 0) } #[doc = "Bits 6:11 - Chip Family value"] #[inline(always)] #[must_use] - pub fn family(&mut self) -> FAMILY_W<6> { - FAMILY_W::new(self) + pub fn family(&mut self) -> FamilyW { + FamilyW::new(self, 6) } #[doc = "Bits 12:19 - Chip Revision Minor value"] #[inline(always)] #[must_use] - pub fn minor(&mut self) -> MINOR_W<12> { - MINOR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn minor(&mut self) -> MinorW { + MinorW::new(self, 12) } } -#[doc = "Read to get the chip revision programmed by feature configuration.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chiprev](index.html) module"] -pub struct CHIPREV_SPEC; -impl crate::RegisterSpec for CHIPREV_SPEC { +#[doc = "Read to get the chip revision programmed by feature configuration.\n\nYou can [`read`](crate::Reg::read) this register and get [`chiprev::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chiprev::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ChiprevSpec; +impl crate::RegisterSpec for ChiprevSpec { type Ux = u32; } -#[doc = "`read()` method returns [chiprev::R](R) reader structure"] -impl crate::Readable for CHIPREV_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [chiprev::W](W) writer structure"] -impl crate::Writable for CHIPREV_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`chiprev::R`](R) reader structure"] +impl crate::Readable for ChiprevSpec {} +#[doc = "`write(|w| ..)` method takes [`chiprev::W`](W) writer structure"] +impl crate::Writable for ChiprevSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHIPREV to value 0"] -impl crate::Resettable for CHIPREV_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ChiprevSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/chiprevhw.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/chiprevhw.rs index 17e94d9..c609d3a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/chiprevhw.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/chiprevhw.rs @@ -1,110 +1,70 @@ #[doc = "Register `CHIPREVHW` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CHIPREVHW` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `MAJOR` reader - Hardwired Chip Revision Major value"] -pub type MAJOR_R = crate::FieldReader; +pub type MajorR = crate::FieldReader; #[doc = "Field `MAJOR` writer - Hardwired Chip Revision Major value"] -pub type MAJOR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CHIPREVHW_SPEC, u8, u8, 6, O>; +pub type MajorW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `FAMILY` reader - Hardwired Chip Family value"] -pub type FAMILY_R = crate::FieldReader; +pub type FamilyR = crate::FieldReader; #[doc = "Field `FAMILY` writer - Hardwired Chip Family value"] -pub type FAMILY_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CHIPREVHW_SPEC, u8, u8, 6, O>; +pub type FamilyW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `MINOR` reader - Hardwired Chip Revision Minor value"] -pub type MINOR_R = crate::FieldReader; +pub type MinorR = crate::FieldReader; #[doc = "Field `MINOR` writer - Hardwired Chip Revision Minor value"] -pub type MINOR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CHIPREVHW_SPEC, u8, u8, 8, O>; +pub type MinorW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:5 - Hardwired Chip Revision Major value"] #[inline(always)] - pub fn major(&self) -> MAJOR_R { - MAJOR_R::new((self.bits & 0x3f) as u8) + pub fn major(&self) -> MajorR { + MajorR::new((self.bits & 0x3f) as u8) } #[doc = "Bits 6:11 - Hardwired Chip Family value"] #[inline(always)] - pub fn family(&self) -> FAMILY_R { - FAMILY_R::new(((self.bits >> 6) & 0x3f) as u8) + pub fn family(&self) -> FamilyR { + FamilyR::new(((self.bits >> 6) & 0x3f) as u8) } #[doc = "Bits 12:19 - Hardwired Chip Revision Minor value"] #[inline(always)] - pub fn minor(&self) -> MINOR_R { - MINOR_R::new(((self.bits >> 12) & 0xff) as u8) + pub fn minor(&self) -> MinorR { + MinorR::new(((self.bits >> 12) & 0xff) as u8) } } impl W { #[doc = "Bits 0:5 - Hardwired Chip Revision Major value"] #[inline(always)] #[must_use] - pub fn major(&mut self) -> MAJOR_W<0> { - MAJOR_W::new(self) + pub fn major(&mut self) -> MajorW { + MajorW::new(self, 0) } #[doc = "Bits 6:11 - Hardwired Chip Family value"] #[inline(always)] #[must_use] - pub fn family(&mut self) -> FAMILY_W<6> { - FAMILY_W::new(self) + pub fn family(&mut self) -> FamilyW { + FamilyW::new(self, 6) } #[doc = "Bits 12:19 - Hardwired Chip Revision Minor value"] #[inline(always)] #[must_use] - pub fn minor(&mut self) -> MINOR_W<12> { - MINOR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn minor(&mut self) -> MinorW { + MinorW::new(self, 12) } } -#[doc = "Read to get the hard-wired chip revision.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chiprevhw](index.html) module"] -pub struct CHIPREVHW_SPEC; -impl crate::RegisterSpec for CHIPREVHW_SPEC { +#[doc = "Read to get the hard-wired chip revision.\n\nYou can [`read`](crate::Reg::read) this register and get [`chiprevhw::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chiprevhw::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ChiprevhwSpec; +impl crate::RegisterSpec for ChiprevhwSpec { type Ux = u32; } -#[doc = "`read()` method returns [chiprevhw::R](R) reader structure"] -impl crate::Readable for CHIPREVHW_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [chiprevhw::W](W) writer structure"] -impl crate::Writable for CHIPREVHW_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`chiprevhw::R`](R) reader structure"] +impl crate::Readable for ChiprevhwSpec {} +#[doc = "`write(|w| ..)` method takes [`chiprevhw::W`](W) writer structure"] +impl crate::Writable for ChiprevhwSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHIPREVHW to value 0x0e01"] -impl crate::Resettable for CHIPREVHW_SPEC { - const RESET_VALUE: Self::Ux = 0x0e01; +impl crate::Resettable for ChiprevhwSpec { + const RESET_VALUE: u32 = 0x0e01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/ctrl.rs index da87de6..a952353 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/ctrl.rs @@ -1,110 +1,70 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `ADDRFAULTEN` reader - Invalid Address Bus Fault Response Enabl"] -pub type ADDRFAULTEN_R = crate::BitReader; +pub type AddrfaultenR = crate::BitReader; #[doc = "Field `ADDRFAULTEN` writer - Invalid Address Bus Fault Response Enabl"] -pub type ADDRFAULTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type AddrfaultenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLKDISFAULTEN` reader - Disabled Clkbus Bus Fault Enable"] -pub type CLKDISFAULTEN_R = crate::BitReader; +pub type ClkdisfaultenR = crate::BitReader; #[doc = "Field `CLKDISFAULTEN` writer - Disabled Clkbus Bus Fault Enable"] -pub type CLKDISFAULTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type ClkdisfaultenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RAMECCERRFAULTEN` reader - Two bit ECC error bus fault response ena"] -pub type RAMECCERRFAULTEN_R = crate::BitReader; +pub type RameccerrfaultenR = crate::BitReader; #[doc = "Field `RAMECCERRFAULTEN` writer - Two bit ECC error bus fault response ena"] -pub type RAMECCERRFAULTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type RameccerrfaultenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Invalid Address Bus Fault Response Enabl"] #[inline(always)] - pub fn addrfaulten(&self) -> ADDRFAULTEN_R { - ADDRFAULTEN_R::new((self.bits & 1) != 0) + pub fn addrfaulten(&self) -> AddrfaultenR { + AddrfaultenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disabled Clkbus Bus Fault Enable"] #[inline(always)] - pub fn clkdisfaulten(&self) -> CLKDISFAULTEN_R { - CLKDISFAULTEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn clkdisfaulten(&self) -> ClkdisfaultenR { + ClkdisfaultenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 5 - Two bit ECC error bus fault response ena"] #[inline(always)] - pub fn rameccerrfaulten(&self) -> RAMECCERRFAULTEN_R { - RAMECCERRFAULTEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn rameccerrfaulten(&self) -> RameccerrfaultenR { + RameccerrfaultenR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - Invalid Address Bus Fault Response Enabl"] #[inline(always)] #[must_use] - pub fn addrfaulten(&mut self) -> ADDRFAULTEN_W<0> { - ADDRFAULTEN_W::new(self) + pub fn addrfaulten(&mut self) -> AddrfaultenW { + AddrfaultenW::new(self, 0) } #[doc = "Bit 1 - Disabled Clkbus Bus Fault Enable"] #[inline(always)] #[must_use] - pub fn clkdisfaulten(&mut self) -> CLKDISFAULTEN_W<1> { - CLKDISFAULTEN_W::new(self) + pub fn clkdisfaulten(&mut self) -> ClkdisfaultenW { + ClkdisfaultenW::new(self, 1) } #[doc = "Bit 5 - Two bit ECC error bus fault response ena"] #[inline(always)] #[must_use] - pub fn rameccerrfaulten(&mut self) -> RAMECCERRFAULTEN_W<5> { - RAMECCERRFAULTEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rameccerrfaulten(&mut self) -> RameccerrfaultenW { + RameccerrfaultenW::new(self, 5) } } -#[doc = "Configure to provide general RAM configuration.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "Configure to provide general RAM configuration.\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0x23"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0x23; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0x23; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/dmem0portmapsel.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/dmem0portmapsel.rs index b79aa9d..bfeaf38 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/dmem0portmapsel.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/dmem0portmapsel.rs @@ -1,144 +1,100 @@ #[doc = "Register `DMEM0PORTMAPSEL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMEM0PORTMAPSEL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `LDMAPORTSEL` reader - LDMA portmap selection"] -pub type LDMAPORTSEL_R = crate::BitReader; +pub type LdmaportselR = crate::BitReader; #[doc = "Field `LDMAPORTSEL` writer - LDMA portmap selection"] -pub type LDMAPORTSEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, DMEM0PORTMAPSEL_SPEC, bool, O>; +pub type LdmaportselW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SRWAESPORTSEL` reader - SRWAES portmap selection"] -pub type SRWAESPORTSEL_R = crate::BitReader; +pub type SrwaesportselR = crate::BitReader; #[doc = "Field `SRWAESPORTSEL` writer - SRWAES portmap selection"] -pub type SRWAESPORTSEL_W<'a, const O: u8> = - crate::BitWriter<'a, u32, DMEM0PORTMAPSEL_SPEC, bool, O>; +pub type SrwaesportselW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHBSRWPORTSEL` reader - AHBSRW portmap selection"] -pub type AHBSRWPORTSEL_R = crate::BitReader; +pub type AhbsrwportselR = crate::BitReader; #[doc = "Field `AHBSRWPORTSEL` writer - AHBSRW portmap selection"] -pub type AHBSRWPORTSEL_W<'a, const O: u8> = - crate::BitWriter<'a, u32, DMEM0PORTMAPSEL_SPEC, bool, O>; +pub type AhbsrwportselW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SRWECA0PORTSEL` reader - SRWECA0 portmap selection"] -pub type SRWECA0PORTSEL_R = crate::BitReader; +pub type Srweca0portselR = crate::BitReader; #[doc = "Field `SRWECA0PORTSEL` writer - SRWECA0 portmap selection"] -pub type SRWECA0PORTSEL_W<'a, const O: u8> = - crate::BitWriter<'a, u32, DMEM0PORTMAPSEL_SPEC, bool, O>; +pub type Srweca0portselW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SRWECA1PORTSEL` reader - SRWECA1 portmap selection"] -pub type SRWECA1PORTSEL_R = crate::BitReader; +pub type Srweca1portselR = crate::BitReader; #[doc = "Field `SRWECA1PORTSEL` writer - SRWECA1 portmap selection"] -pub type SRWECA1PORTSEL_W<'a, const O: u8> = - crate::BitWriter<'a, u32, DMEM0PORTMAPSEL_SPEC, bool, O>; +pub type Srweca1portselW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - LDMA portmap selection"] #[inline(always)] - pub fn ldmaportsel(&self) -> LDMAPORTSEL_R { - LDMAPORTSEL_R::new((self.bits & 1) != 0) + pub fn ldmaportsel(&self) -> LdmaportselR { + LdmaportselR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - SRWAES portmap selection"] #[inline(always)] - pub fn srwaesportsel(&self) -> SRWAESPORTSEL_R { - SRWAESPORTSEL_R::new(((self.bits >> 1) & 1) != 0) + pub fn srwaesportsel(&self) -> SrwaesportselR { + SrwaesportselR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - AHBSRW portmap selection"] #[inline(always)] - pub fn ahbsrwportsel(&self) -> AHBSRWPORTSEL_R { - AHBSRWPORTSEL_R::new(((self.bits >> 2) & 1) != 0) + pub fn ahbsrwportsel(&self) -> AhbsrwportselR { + AhbsrwportselR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - SRWECA0 portmap selection"] #[inline(always)] - pub fn srweca0portsel(&self) -> SRWECA0PORTSEL_R { - SRWECA0PORTSEL_R::new(((self.bits >> 3) & 1) != 0) + pub fn srweca0portsel(&self) -> Srweca0portselR { + Srweca0portselR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - SRWECA1 portmap selection"] #[inline(always)] - pub fn srweca1portsel(&self) -> SRWECA1PORTSEL_R { - SRWECA1PORTSEL_R::new(((self.bits >> 4) & 1) != 0) + pub fn srweca1portsel(&self) -> Srweca1portselR { + Srweca1portselR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - LDMA portmap selection"] #[inline(always)] #[must_use] - pub fn ldmaportsel(&mut self) -> LDMAPORTSEL_W<0> { - LDMAPORTSEL_W::new(self) + pub fn ldmaportsel(&mut self) -> LdmaportselW { + LdmaportselW::new(self, 0) } #[doc = "Bit 1 - SRWAES portmap selection"] #[inline(always)] #[must_use] - pub fn srwaesportsel(&mut self) -> SRWAESPORTSEL_W<1> { - SRWAESPORTSEL_W::new(self) + pub fn srwaesportsel(&mut self) -> SrwaesportselW { + SrwaesportselW::new(self, 1) } #[doc = "Bit 2 - AHBSRW portmap selection"] #[inline(always)] #[must_use] - pub fn ahbsrwportsel(&mut self) -> AHBSRWPORTSEL_W<2> { - AHBSRWPORTSEL_W::new(self) + pub fn ahbsrwportsel(&mut self) -> AhbsrwportselW { + AhbsrwportselW::new(self, 2) } #[doc = "Bit 3 - SRWECA0 portmap selection"] #[inline(always)] #[must_use] - pub fn srweca0portsel(&mut self) -> SRWECA0PORTSEL_W<3> { - SRWECA0PORTSEL_W::new(self) + pub fn srweca0portsel(&mut self) -> Srweca0portselW { + Srweca0portselW::new(self, 3) } #[doc = "Bit 4 - SRWECA1 portmap selection"] #[inline(always)] #[must_use] - pub fn srweca1portsel(&mut self) -> SRWECA1PORTSEL_W<4> { - SRWECA1PORTSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn srweca1portsel(&mut self) -> Srweca1portselW { + Srweca1portselW::new(self, 4) } } -#[doc = "Configure DMEM0 port remap selection.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmem0portmapsel](index.html) module"] -pub struct DMEM0PORTMAPSEL_SPEC; -impl crate::RegisterSpec for DMEM0PORTMAPSEL_SPEC { +#[doc = "Configure DMEM0 port remap selection.\n\nYou can [`read`](crate::Reg::read) this register and get [`dmem0portmapsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmem0portmapsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Dmem0portmapselSpec; +impl crate::RegisterSpec for Dmem0portmapselSpec { type Ux = u32; } -#[doc = "`read()` method returns [dmem0portmapsel::R](R) reader structure"] -impl crate::Readable for DMEM0PORTMAPSEL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dmem0portmapsel::W](W) writer structure"] -impl crate::Writable for DMEM0PORTMAPSEL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dmem0portmapsel::R`](R) reader structure"] +impl crate::Readable for Dmem0portmapselSpec {} +#[doc = "`write(|w| ..)` method takes [`dmem0portmapsel::W`](W) writer structure"] +impl crate::Writable for Dmem0portmapselSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMEM0PORTMAPSEL to value 0x13"] -impl crate::Resettable for DMEM0PORTMAPSEL_SPEC { - const RESET_VALUE: Self::Ux = 0x13; +impl crate::Resettable for Dmem0portmapselSpec { + const RESET_VALUE: u32 = 0x13; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/dmem0retnctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/dmem0retnctrl.rs index 90539fb..e556b77 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/dmem0retnctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/dmem0retnctrl.rs @@ -1,155 +1,122 @@ #[doc = "Register `DMEM0RETNCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DMEM0RETNCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `RAMRETNCTRL` reader - DMEM0 blockset retention control"] -pub type RAMRETNCTRL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DMEM0 blockset retention control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RAMRETNCTRL_A { +pub enum Ramretnctrl { #[doc = "0: None of the RAM blocks powered down"] - ALLON = 0, + Allon = 0, #[doc = "4: Power down RAM block 3 (address range 0x2000C000-0x20010000)"] - BLK3 = 4, + Blk3 = 4, #[doc = "6: Power down RAM blocks 2 and above (address range 0x20008000-0x20010000)"] - BLK2TO3 = 6, + Blk2to3 = 6, #[doc = "7: Power down RAM blocks 1 and above (address range 0x20004000-0x20010000)"] - BLK1TO3 = 7, + Blk1to3 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RAMRETNCTRL_A) -> Self { + fn from(variant: Ramretnctrl) -> Self { variant as _ } } -impl RAMRETNCTRL_R { +impl crate::FieldSpec for Ramretnctrl { + type Ux = u8; +} +impl crate::IsEnum for Ramretnctrl {} +#[doc = "Field `RAMRETNCTRL` reader - DMEM0 blockset retention control"] +pub type RamretnctrlR = crate::FieldReader; +impl RamretnctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(RAMRETNCTRL_A::ALLON), - 4 => Some(RAMRETNCTRL_A::BLK3), - 6 => Some(RAMRETNCTRL_A::BLK2TO3), - 7 => Some(RAMRETNCTRL_A::BLK1TO3), + 0 => Some(Ramretnctrl::Allon), + 4 => Some(Ramretnctrl::Blk3), + 6 => Some(Ramretnctrl::Blk2to3), + 7 => Some(Ramretnctrl::Blk1to3), _ => None, } } - #[doc = "Checks if the value of the field is `ALLON`"] + #[doc = "None of the RAM blocks powered down"] #[inline(always)] pub fn is_allon(&self) -> bool { - *self == RAMRETNCTRL_A::ALLON + *self == Ramretnctrl::Allon } - #[doc = "Checks if the value of the field is `BLK3`"] + #[doc = "Power down RAM block 3 (address range 0x2000C000-0x20010000)"] #[inline(always)] pub fn is_blk3(&self) -> bool { - *self == RAMRETNCTRL_A::BLK3 + *self == Ramretnctrl::Blk3 } - #[doc = "Checks if the value of the field is `BLK2TO3`"] + #[doc = "Power down RAM blocks 2 and above (address range 0x20008000-0x20010000)"] #[inline(always)] pub fn is_blk2to3(&self) -> bool { - *self == RAMRETNCTRL_A::BLK2TO3 + *self == Ramretnctrl::Blk2to3 } - #[doc = "Checks if the value of the field is `BLK1TO3`"] + #[doc = "Power down RAM blocks 1 and above (address range 0x20004000-0x20010000)"] #[inline(always)] pub fn is_blk1to3(&self) -> bool { - *self == RAMRETNCTRL_A::BLK1TO3 + *self == Ramretnctrl::Blk1to3 } } #[doc = "Field `RAMRETNCTRL` writer - DMEM0 blockset retention control"] -pub type RAMRETNCTRL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, DMEM0RETNCTRL_SPEC, u8, RAMRETNCTRL_A, 3, O>; -impl<'a, const O: u8> RAMRETNCTRL_W<'a, O> { +pub type RamretnctrlW<'a, REG> = crate::FieldWriter<'a, REG, 3, Ramretnctrl>; +impl<'a, REG> RamretnctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "None of the RAM blocks powered down"] #[inline(always)] - pub fn allon(self) -> &'a mut W { - self.variant(RAMRETNCTRL_A::ALLON) + pub fn allon(self) -> &'a mut crate::W { + self.variant(Ramretnctrl::Allon) } #[doc = "Power down RAM block 3 (address range 0x2000C000-0x20010000)"] #[inline(always)] - pub fn blk3(self) -> &'a mut W { - self.variant(RAMRETNCTRL_A::BLK3) + pub fn blk3(self) -> &'a mut crate::W { + self.variant(Ramretnctrl::Blk3) } #[doc = "Power down RAM blocks 2 and above (address range 0x20008000-0x20010000)"] #[inline(always)] - pub fn blk2to3(self) -> &'a mut W { - self.variant(RAMRETNCTRL_A::BLK2TO3) + pub fn blk2to3(self) -> &'a mut crate::W { + self.variant(Ramretnctrl::Blk2to3) } #[doc = "Power down RAM blocks 1 and above (address range 0x20004000-0x20010000)"] #[inline(always)] - pub fn blk1to3(self) -> &'a mut W { - self.variant(RAMRETNCTRL_A::BLK1TO3) + pub fn blk1to3(self) -> &'a mut crate::W { + self.variant(Ramretnctrl::Blk1to3) } } impl R { #[doc = "Bits 0:2 - DMEM0 blockset retention control"] #[inline(always)] - pub fn ramretnctrl(&self) -> RAMRETNCTRL_R { - RAMRETNCTRL_R::new((self.bits & 7) as u8) + pub fn ramretnctrl(&self) -> RamretnctrlR { + RamretnctrlR::new((self.bits & 7) as u8) } } impl W { #[doc = "Bits 0:2 - DMEM0 blockset retention control"] #[inline(always)] #[must_use] - pub fn ramretnctrl(&mut self) -> RAMRETNCTRL_W<0> { - RAMRETNCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ramretnctrl(&mut self) -> RamretnctrlW { + RamretnctrlW::new(self, 0) } } -#[doc = "Configure to provide general RAM retention configuration.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmem0retnctrl](index.html) module"] -pub struct DMEM0RETNCTRL_SPEC; -impl crate::RegisterSpec for DMEM0RETNCTRL_SPEC { +#[doc = "Configure to provide general RAM retention configuration.\n\nYou can [`read`](crate::Reg::read) this register and get [`dmem0retnctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmem0retnctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Dmem0retnctrlSpec; +impl crate::RegisterSpec for Dmem0retnctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [dmem0retnctrl::R](R) reader structure"] -impl crate::Readable for DMEM0RETNCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dmem0retnctrl::W](W) writer structure"] -impl crate::Writable for DMEM0RETNCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dmem0retnctrl::R`](R) reader structure"] +impl crate::Readable for Dmem0retnctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`dmem0retnctrl::W`](W) writer structure"] +impl crate::Writable for Dmem0retnctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMEM0RETNCTRL to value 0"] -impl crate::Resettable for DMEM0RETNCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Dmem0retnctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/icacheramretnctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/icacheramretnctrl.rs index 30307db..4f9eb51 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/icacheramretnctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/icacheramretnctrl.rs @@ -1,127 +1,89 @@ #[doc = "Register `ICACHERAMRETNCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ICACHERAMRETNCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `RAMRETNCTRL` reader - ICACHERAM Retention control"] -pub type RAMRETNCTRL_R = crate::BitReader; +pub type W = crate::W; #[doc = "ICACHERAM Retention control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RAMRETNCTRL_A { +pub enum Ramretnctrl { #[doc = "0: None of the Host ICACHE RAM blocks powered down"] - ALLON = 0, + Allon = 0, #[doc = "1: Power down all Host ICACHE RAM blocks"] - ALLOFF = 1, + Alloff = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RAMRETNCTRL_A) -> Self { + fn from(variant: Ramretnctrl) -> Self { variant as u8 != 0 } } -impl RAMRETNCTRL_R { +#[doc = "Field `RAMRETNCTRL` reader - ICACHERAM Retention control"] +pub type RamretnctrlR = crate::BitReader; +impl RamretnctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RAMRETNCTRL_A { + pub const fn variant(&self) -> Ramretnctrl { match self.bits { - false => RAMRETNCTRL_A::ALLON, - true => RAMRETNCTRL_A::ALLOFF, + false => Ramretnctrl::Allon, + true => Ramretnctrl::Alloff, } } - #[doc = "Checks if the value of the field is `ALLON`"] + #[doc = "None of the Host ICACHE RAM blocks powered down"] #[inline(always)] pub fn is_allon(&self) -> bool { - *self == RAMRETNCTRL_A::ALLON + *self == Ramretnctrl::Allon } - #[doc = "Checks if the value of the field is `ALLOFF`"] + #[doc = "Power down all Host ICACHE RAM blocks"] #[inline(always)] pub fn is_alloff(&self) -> bool { - *self == RAMRETNCTRL_A::ALLOFF + *self == Ramretnctrl::Alloff } } #[doc = "Field `RAMRETNCTRL` writer - ICACHERAM Retention control"] -pub type RAMRETNCTRL_W<'a, const O: u8> = - crate::BitWriter<'a, u32, ICACHERAMRETNCTRL_SPEC, RAMRETNCTRL_A, O>; -impl<'a, const O: u8> RAMRETNCTRL_W<'a, O> { +pub type RamretnctrlW<'a, REG> = crate::BitWriter<'a, REG, Ramretnctrl>; +impl<'a, REG> RamretnctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "None of the Host ICACHE RAM blocks powered down"] #[inline(always)] - pub fn allon(self) -> &'a mut W { - self.variant(RAMRETNCTRL_A::ALLON) + pub fn allon(self) -> &'a mut crate::W { + self.variant(Ramretnctrl::Allon) } #[doc = "Power down all Host ICACHE RAM blocks"] #[inline(always)] - pub fn alloff(self) -> &'a mut W { - self.variant(RAMRETNCTRL_A::ALLOFF) + pub fn alloff(self) -> &'a mut crate::W { + self.variant(Ramretnctrl::Alloff) } } impl R { #[doc = "Bit 0 - ICACHERAM Retention control"] #[inline(always)] - pub fn ramretnctrl(&self) -> RAMRETNCTRL_R { - RAMRETNCTRL_R::new((self.bits & 1) != 0) + pub fn ramretnctrl(&self) -> RamretnctrlR { + RamretnctrlR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - ICACHERAM Retention control"] #[inline(always)] #[must_use] - pub fn ramretnctrl(&mut self) -> RAMRETNCTRL_W<0> { - RAMRETNCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ramretnctrl(&mut self) -> RamretnctrlW { + RamretnctrlW::new(self, 0) } } -#[doc = "Configure Host ICACHERAM retention configuration.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [icacheramretnctrl](index.html) module"] -pub struct ICACHERAMRETNCTRL_SPEC; -impl crate::RegisterSpec for ICACHERAMRETNCTRL_SPEC { +#[doc = "Configure Host ICACHERAM retention configuration.\n\nYou can [`read`](crate::Reg::read) this register and get [`icacheramretnctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icacheramretnctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IcacheramretnctrlSpec; +impl crate::RegisterSpec for IcacheramretnctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [icacheramretnctrl::R](R) reader structure"] -impl crate::Readable for ICACHERAMRETNCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [icacheramretnctrl::W](W) writer structure"] -impl crate::Writable for ICACHERAMRETNCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`icacheramretnctrl::R`](R) reader structure"] +impl crate::Readable for IcacheramretnctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`icacheramretnctrl::W`](W) writer structure"] +impl crate::Writable for IcacheramretnctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ICACHERAMRETNCTRL to value 0"] -impl crate::Resettable for ICACHERAMRETNCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IcacheramretnctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/ien.rs index f88bb0d..1e8474b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/ien.rs @@ -1,275 +1,235 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SW0` reader - Software Interrupt Enable"] -pub type SW0_R = crate::BitReader; +pub type Sw0R = crate::BitReader; #[doc = "Field `SW0` writer - Software Interrupt Enable"] -pub type SW0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Sw0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SW1` reader - Software Interrupt Enable"] -pub type SW1_R = crate::BitReader; +pub type Sw1R = crate::BitReader; #[doc = "Field `SW1` writer - Software Interrupt Enable"] -pub type SW1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Sw1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SW2` reader - Software Interrupt Enable"] -pub type SW2_R = crate::BitReader; +pub type Sw2R = crate::BitReader; #[doc = "Field `SW2` writer - Software Interrupt Enable"] -pub type SW2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Sw2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SW3` reader - Software Interrupt Enable"] -pub type SW3_R = crate::BitReader; +pub type Sw3R = crate::BitReader; #[doc = "Field `SW3` writer - Software Interrupt Enable"] -pub type SW3_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Sw3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FPIOC` reader - FPU Invalid Operation Interrupt Enable"] -pub type FPIOC_R = crate::BitReader; +pub type FpiocR = crate::BitReader; #[doc = "Field `FPIOC` writer - FPU Invalid Operation Interrupt Enable"] -pub type FPIOC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FpiocW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FPDZC` reader - FPU Divide by zero Interrupt Enable"] -pub type FPDZC_R = crate::BitReader; +pub type FpdzcR = crate::BitReader; #[doc = "Field `FPDZC` writer - FPU Divide by zero Interrupt Enable"] -pub type FPDZC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FpdzcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FPUFC` reader - FPU Underflow Interrupt Enable"] -pub type FPUFC_R = crate::BitReader; +pub type FpufcR = crate::BitReader; #[doc = "Field `FPUFC` writer - FPU Underflow Interrupt Enable"] -pub type FPUFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FpufcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FPOFC` reader - FPU Overflow Interrupt Enable"] -pub type FPOFC_R = crate::BitReader; +pub type FpofcR = crate::BitReader; #[doc = "Field `FPOFC` writer - FPU Overflow Interrupt Enable"] -pub type FPOFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FpofcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FPIDC` reader - FPU Input denormal Interrupt Enable"] -pub type FPIDC_R = crate::BitReader; +pub type FpidcR = crate::BitReader; #[doc = "Field `FPIDC` writer - FPU Input denormal Interrupt Enable"] -pub type FPIDC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FpidcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FPIXC` reader - FPU Inexact Interrupt Enable"] -pub type FPIXC_R = crate::BitReader; +pub type FpixcR = crate::BitReader; #[doc = "Field `FPIXC` writer - FPU Inexact Interrupt Enable"] -pub type FPIXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FpixcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SEQRAMERR1B` reader - SEQRAM Error 1-bit Interrupt Enable"] -pub type SEQRAMERR1B_R = crate::BitReader; +pub type Seqramerr1bR = crate::BitReader; #[doc = "Field `SEQRAMERR1B` writer - SEQRAM Error 1-bit Interrupt Enable"] -pub type SEQRAMERR1B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Seqramerr1bW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SEQRAMERR2B` reader - SEQRAM Error 2-bit Interrupt Enable"] -pub type SEQRAMERR2B_R = crate::BitReader; +pub type Seqramerr2bR = crate::BitReader; #[doc = "Field `SEQRAMERR2B` writer - SEQRAM Error 2-bit Interrupt Enable"] -pub type SEQRAMERR2B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Seqramerr2bW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FRCRAMERR1B` reader - FRCRAM Error 1-bit Interrupt Enable"] -pub type FRCRAMERR1B_R = crate::BitReader; +pub type Frcramerr1bR = crate::BitReader; #[doc = "Field `FRCRAMERR1B` writer - FRCRAM Error 1-bit Interrupt Enable"] -pub type FRCRAMERR1B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Frcramerr1bW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FRCRAMERR2B` reader - FRCRAM Error 2-bit Interrupt Enable"] -pub type FRCRAMERR2B_R = crate::BitReader; +pub type Frcramerr2bR = crate::BitReader; #[doc = "Field `FRCRAMERR2B` writer - FRCRAM Error 2-bit Interrupt Enable"] -pub type FRCRAMERR2B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Frcramerr2bW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Software Interrupt Enable"] #[inline(always)] - pub fn sw0(&self) -> SW0_R { - SW0_R::new((self.bits & 1) != 0) + pub fn sw0(&self) -> Sw0R { + Sw0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Software Interrupt Enable"] #[inline(always)] - pub fn sw1(&self) -> SW1_R { - SW1_R::new(((self.bits >> 1) & 1) != 0) + pub fn sw1(&self) -> Sw1R { + Sw1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Software Interrupt Enable"] #[inline(always)] - pub fn sw2(&self) -> SW2_R { - SW2_R::new(((self.bits >> 2) & 1) != 0) + pub fn sw2(&self) -> Sw2R { + Sw2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Software Interrupt Enable"] #[inline(always)] - pub fn sw3(&self) -> SW3_R { - SW3_R::new(((self.bits >> 3) & 1) != 0) + pub fn sw3(&self) -> Sw3R { + Sw3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 8 - FPU Invalid Operation Interrupt Enable"] #[inline(always)] - pub fn fpioc(&self) -> FPIOC_R { - FPIOC_R::new(((self.bits >> 8) & 1) != 0) + pub fn fpioc(&self) -> FpiocR { + FpiocR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - FPU Divide by zero Interrupt Enable"] #[inline(always)] - pub fn fpdzc(&self) -> FPDZC_R { - FPDZC_R::new(((self.bits >> 9) & 1) != 0) + pub fn fpdzc(&self) -> FpdzcR { + FpdzcR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - FPU Underflow Interrupt Enable"] #[inline(always)] - pub fn fpufc(&self) -> FPUFC_R { - FPUFC_R::new(((self.bits >> 10) & 1) != 0) + pub fn fpufc(&self) -> FpufcR { + FpufcR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - FPU Overflow Interrupt Enable"] #[inline(always)] - pub fn fpofc(&self) -> FPOFC_R { - FPOFC_R::new(((self.bits >> 11) & 1) != 0) + pub fn fpofc(&self) -> FpofcR { + FpofcR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - FPU Input denormal Interrupt Enable"] #[inline(always)] - pub fn fpidc(&self) -> FPIDC_R { - FPIDC_R::new(((self.bits >> 12) & 1) != 0) + pub fn fpidc(&self) -> FpidcR { + FpidcR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - FPU Inexact Interrupt Enable"] #[inline(always)] - pub fn fpixc(&self) -> FPIXC_R { - FPIXC_R::new(((self.bits >> 13) & 1) != 0) + pub fn fpixc(&self) -> FpixcR { + FpixcR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 24 - SEQRAM Error 1-bit Interrupt Enable"] #[inline(always)] - pub fn seqramerr1b(&self) -> SEQRAMERR1B_R { - SEQRAMERR1B_R::new(((self.bits >> 24) & 1) != 0) + pub fn seqramerr1b(&self) -> Seqramerr1bR { + Seqramerr1bR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - SEQRAM Error 2-bit Interrupt Enable"] #[inline(always)] - pub fn seqramerr2b(&self) -> SEQRAMERR2B_R { - SEQRAMERR2B_R::new(((self.bits >> 25) & 1) != 0) + pub fn seqramerr2b(&self) -> Seqramerr2bR { + Seqramerr2bR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 28 - FRCRAM Error 1-bit Interrupt Enable"] #[inline(always)] - pub fn frcramerr1b(&self) -> FRCRAMERR1B_R { - FRCRAMERR1B_R::new(((self.bits >> 28) & 1) != 0) + pub fn frcramerr1b(&self) -> Frcramerr1bR { + Frcramerr1bR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - FRCRAM Error 2-bit Interrupt Enable"] #[inline(always)] - pub fn frcramerr2b(&self) -> FRCRAMERR2B_R { - FRCRAMERR2B_R::new(((self.bits >> 29) & 1) != 0) + pub fn frcramerr2b(&self) -> Frcramerr2bR { + Frcramerr2bR::new(((self.bits >> 29) & 1) != 0) } } impl W { #[doc = "Bit 0 - Software Interrupt Enable"] #[inline(always)] #[must_use] - pub fn sw0(&mut self) -> SW0_W<0> { - SW0_W::new(self) + pub fn sw0(&mut self) -> Sw0W { + Sw0W::new(self, 0) } #[doc = "Bit 1 - Software Interrupt Enable"] #[inline(always)] #[must_use] - pub fn sw1(&mut self) -> SW1_W<1> { - SW1_W::new(self) + pub fn sw1(&mut self) -> Sw1W { + Sw1W::new(self, 1) } #[doc = "Bit 2 - Software Interrupt Enable"] #[inline(always)] #[must_use] - pub fn sw2(&mut self) -> SW2_W<2> { - SW2_W::new(self) + pub fn sw2(&mut self) -> Sw2W { + Sw2W::new(self, 2) } #[doc = "Bit 3 - Software Interrupt Enable"] #[inline(always)] #[must_use] - pub fn sw3(&mut self) -> SW3_W<3> { - SW3_W::new(self) + pub fn sw3(&mut self) -> Sw3W { + Sw3W::new(self, 3) } #[doc = "Bit 8 - FPU Invalid Operation Interrupt Enable"] #[inline(always)] #[must_use] - pub fn fpioc(&mut self) -> FPIOC_W<8> { - FPIOC_W::new(self) + pub fn fpioc(&mut self) -> FpiocW { + FpiocW::new(self, 8) } #[doc = "Bit 9 - FPU Divide by zero Interrupt Enable"] #[inline(always)] #[must_use] - pub fn fpdzc(&mut self) -> FPDZC_W<9> { - FPDZC_W::new(self) + pub fn fpdzc(&mut self) -> FpdzcW { + FpdzcW::new(self, 9) } #[doc = "Bit 10 - FPU Underflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn fpufc(&mut self) -> FPUFC_W<10> { - FPUFC_W::new(self) + pub fn fpufc(&mut self) -> FpufcW { + FpufcW::new(self, 10) } #[doc = "Bit 11 - FPU Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn fpofc(&mut self) -> FPOFC_W<11> { - FPOFC_W::new(self) + pub fn fpofc(&mut self) -> FpofcW { + FpofcW::new(self, 11) } #[doc = "Bit 12 - FPU Input denormal Interrupt Enable"] #[inline(always)] #[must_use] - pub fn fpidc(&mut self) -> FPIDC_W<12> { - FPIDC_W::new(self) + pub fn fpidc(&mut self) -> FpidcW { + FpidcW::new(self, 12) } #[doc = "Bit 13 - FPU Inexact Interrupt Enable"] #[inline(always)] #[must_use] - pub fn fpixc(&mut self) -> FPIXC_W<13> { - FPIXC_W::new(self) + pub fn fpixc(&mut self) -> FpixcW { + FpixcW::new(self, 13) } #[doc = "Bit 24 - SEQRAM Error 1-bit Interrupt Enable"] #[inline(always)] #[must_use] - pub fn seqramerr1b(&mut self) -> SEQRAMERR1B_W<24> { - SEQRAMERR1B_W::new(self) + pub fn seqramerr1b(&mut self) -> Seqramerr1bW { + Seqramerr1bW::new(self, 24) } #[doc = "Bit 25 - SEQRAM Error 2-bit Interrupt Enable"] #[inline(always)] #[must_use] - pub fn seqramerr2b(&mut self) -> SEQRAMERR2B_W<25> { - SEQRAMERR2B_W::new(self) + pub fn seqramerr2b(&mut self) -> Seqramerr2bW { + Seqramerr2bW::new(self, 25) } #[doc = "Bit 28 - FRCRAM Error 1-bit Interrupt Enable"] #[inline(always)] #[must_use] - pub fn frcramerr1b(&mut self) -> FRCRAMERR1B_W<28> { - FRCRAMERR1B_W::new(self) + pub fn frcramerr1b(&mut self) -> Frcramerr1bW { + Frcramerr1bW::new(self, 28) } #[doc = "Bit 29 - FRCRAM Error 2-bit Interrupt Enable"] #[inline(always)] #[must_use] - pub fn frcramerr2b(&mut self) -> FRCRAMERR2B_W<29> { - FRCRAMERR2B_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn frcramerr2b(&mut self) -> Frcramerr2bW { + Frcramerr2bW::new(self, 29) } } -#[doc = "Write to enable interrupts.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "Write to enable interrupts.\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/if_.rs index 1163eb9..648b976 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/if_.rs @@ -1,275 +1,235 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SW0` reader - Software Interrupt Flag"] -pub type SW0_R = crate::BitReader; +pub type Sw0R = crate::BitReader; #[doc = "Field `SW0` writer - Software Interrupt Flag"] -pub type SW0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Sw0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SW1` reader - Software Interrupt Flag"] -pub type SW1_R = crate::BitReader; +pub type Sw1R = crate::BitReader; #[doc = "Field `SW1` writer - Software Interrupt Flag"] -pub type SW1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Sw1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SW2` reader - Software Interrupt Flag"] -pub type SW2_R = crate::BitReader; +pub type Sw2R = crate::BitReader; #[doc = "Field `SW2` writer - Software Interrupt Flag"] -pub type SW2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Sw2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SW3` reader - Software Interrupt Flag"] -pub type SW3_R = crate::BitReader; +pub type Sw3R = crate::BitReader; #[doc = "Field `SW3` writer - Software Interrupt Flag"] -pub type SW3_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Sw3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FPIOC` reader - FPU Invalid Operation interrupt flag"] -pub type FPIOC_R = crate::BitReader; +pub type FpiocR = crate::BitReader; #[doc = "Field `FPIOC` writer - FPU Invalid Operation interrupt flag"] -pub type FPIOC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FpiocW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FPDZC` reader - FPU Divide by zero interrupt flag"] -pub type FPDZC_R = crate::BitReader; +pub type FpdzcR = crate::BitReader; #[doc = "Field `FPDZC` writer - FPU Divide by zero interrupt flag"] -pub type FPDZC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FpdzcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FPUFC` reader - FPU Underflow interrupt flag"] -pub type FPUFC_R = crate::BitReader; +pub type FpufcR = crate::BitReader; #[doc = "Field `FPUFC` writer - FPU Underflow interrupt flag"] -pub type FPUFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FpufcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FPOFC` reader - FPU Overflow interrupt flag"] -pub type FPOFC_R = crate::BitReader; +pub type FpofcR = crate::BitReader; #[doc = "Field `FPOFC` writer - FPU Overflow interrupt flag"] -pub type FPOFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FpofcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FPIDC` reader - FPU Input denormal interrupt flag"] -pub type FPIDC_R = crate::BitReader; +pub type FpidcR = crate::BitReader; #[doc = "Field `FPIDC` writer - FPU Input denormal interrupt flag"] -pub type FPIDC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FpidcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FPIXC` reader - FPU Inexact interrupt flag"] -pub type FPIXC_R = crate::BitReader; +pub type FpixcR = crate::BitReader; #[doc = "Field `FPIXC` writer - FPU Inexact interrupt flag"] -pub type FPIXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FpixcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SEQRAMERR1B` reader - SEQRAM Error 1-bit Interrupt Flag"] -pub type SEQRAMERR1B_R = crate::BitReader; +pub type Seqramerr1bR = crate::BitReader; #[doc = "Field `SEQRAMERR1B` writer - SEQRAM Error 1-bit Interrupt Flag"] -pub type SEQRAMERR1B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Seqramerr1bW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SEQRAMERR2B` reader - SEQRAM Error 2-bit Interrupt Flag"] -pub type SEQRAMERR2B_R = crate::BitReader; +pub type Seqramerr2bR = crate::BitReader; #[doc = "Field `SEQRAMERR2B` writer - SEQRAM Error 2-bit Interrupt Flag"] -pub type SEQRAMERR2B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Seqramerr2bW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FRCRAMERR1B` reader - FRCRAM Error 1-bit Interrupt Flag"] -pub type FRCRAMERR1B_R = crate::BitReader; +pub type Frcramerr1bR = crate::BitReader; #[doc = "Field `FRCRAMERR1B` writer - FRCRAM Error 1-bit Interrupt Flag"] -pub type FRCRAMERR1B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Frcramerr1bW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FRCRAMERR2B` reader - FRCRAM Error 2-bit Interrupt Flag"] -pub type FRCRAMERR2B_R = crate::BitReader; +pub type Frcramerr2bR = crate::BitReader; #[doc = "Field `FRCRAMERR2B` writer - FRCRAM Error 2-bit Interrupt Flag"] -pub type FRCRAMERR2B_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Frcramerr2bW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Software Interrupt Flag"] #[inline(always)] - pub fn sw0(&self) -> SW0_R { - SW0_R::new((self.bits & 1) != 0) + pub fn sw0(&self) -> Sw0R { + Sw0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Software Interrupt Flag"] #[inline(always)] - pub fn sw1(&self) -> SW1_R { - SW1_R::new(((self.bits >> 1) & 1) != 0) + pub fn sw1(&self) -> Sw1R { + Sw1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Software Interrupt Flag"] #[inline(always)] - pub fn sw2(&self) -> SW2_R { - SW2_R::new(((self.bits >> 2) & 1) != 0) + pub fn sw2(&self) -> Sw2R { + Sw2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Software Interrupt Flag"] #[inline(always)] - pub fn sw3(&self) -> SW3_R { - SW3_R::new(((self.bits >> 3) & 1) != 0) + pub fn sw3(&self) -> Sw3R { + Sw3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 8 - FPU Invalid Operation interrupt flag"] #[inline(always)] - pub fn fpioc(&self) -> FPIOC_R { - FPIOC_R::new(((self.bits >> 8) & 1) != 0) + pub fn fpioc(&self) -> FpiocR { + FpiocR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - FPU Divide by zero interrupt flag"] #[inline(always)] - pub fn fpdzc(&self) -> FPDZC_R { - FPDZC_R::new(((self.bits >> 9) & 1) != 0) + pub fn fpdzc(&self) -> FpdzcR { + FpdzcR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - FPU Underflow interrupt flag"] #[inline(always)] - pub fn fpufc(&self) -> FPUFC_R { - FPUFC_R::new(((self.bits >> 10) & 1) != 0) + pub fn fpufc(&self) -> FpufcR { + FpufcR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - FPU Overflow interrupt flag"] #[inline(always)] - pub fn fpofc(&self) -> FPOFC_R { - FPOFC_R::new(((self.bits >> 11) & 1) != 0) + pub fn fpofc(&self) -> FpofcR { + FpofcR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - FPU Input denormal interrupt flag"] #[inline(always)] - pub fn fpidc(&self) -> FPIDC_R { - FPIDC_R::new(((self.bits >> 12) & 1) != 0) + pub fn fpidc(&self) -> FpidcR { + FpidcR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - FPU Inexact interrupt flag"] #[inline(always)] - pub fn fpixc(&self) -> FPIXC_R { - FPIXC_R::new(((self.bits >> 13) & 1) != 0) + pub fn fpixc(&self) -> FpixcR { + FpixcR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 24 - SEQRAM Error 1-bit Interrupt Flag"] #[inline(always)] - pub fn seqramerr1b(&self) -> SEQRAMERR1B_R { - SEQRAMERR1B_R::new(((self.bits >> 24) & 1) != 0) + pub fn seqramerr1b(&self) -> Seqramerr1bR { + Seqramerr1bR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - SEQRAM Error 2-bit Interrupt Flag"] #[inline(always)] - pub fn seqramerr2b(&self) -> SEQRAMERR2B_R { - SEQRAMERR2B_R::new(((self.bits >> 25) & 1) != 0) + pub fn seqramerr2b(&self) -> Seqramerr2bR { + Seqramerr2bR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 28 - FRCRAM Error 1-bit Interrupt Flag"] #[inline(always)] - pub fn frcramerr1b(&self) -> FRCRAMERR1B_R { - FRCRAMERR1B_R::new(((self.bits >> 28) & 1) != 0) + pub fn frcramerr1b(&self) -> Frcramerr1bR { + Frcramerr1bR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - FRCRAM Error 2-bit Interrupt Flag"] #[inline(always)] - pub fn frcramerr2b(&self) -> FRCRAMERR2B_R { - FRCRAMERR2B_R::new(((self.bits >> 29) & 1) != 0) + pub fn frcramerr2b(&self) -> Frcramerr2bR { + Frcramerr2bR::new(((self.bits >> 29) & 1) != 0) } } impl W { #[doc = "Bit 0 - Software Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sw0(&mut self) -> SW0_W<0> { - SW0_W::new(self) + pub fn sw0(&mut self) -> Sw0W { + Sw0W::new(self, 0) } #[doc = "Bit 1 - Software Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sw1(&mut self) -> SW1_W<1> { - SW1_W::new(self) + pub fn sw1(&mut self) -> Sw1W { + Sw1W::new(self, 1) } #[doc = "Bit 2 - Software Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sw2(&mut self) -> SW2_W<2> { - SW2_W::new(self) + pub fn sw2(&mut self) -> Sw2W { + Sw2W::new(self, 2) } #[doc = "Bit 3 - Software Interrupt Flag"] #[inline(always)] #[must_use] - pub fn sw3(&mut self) -> SW3_W<3> { - SW3_W::new(self) + pub fn sw3(&mut self) -> Sw3W { + Sw3W::new(self, 3) } #[doc = "Bit 8 - FPU Invalid Operation interrupt flag"] #[inline(always)] #[must_use] - pub fn fpioc(&mut self) -> FPIOC_W<8> { - FPIOC_W::new(self) + pub fn fpioc(&mut self) -> FpiocW { + FpiocW::new(self, 8) } #[doc = "Bit 9 - FPU Divide by zero interrupt flag"] #[inline(always)] #[must_use] - pub fn fpdzc(&mut self) -> FPDZC_W<9> { - FPDZC_W::new(self) + pub fn fpdzc(&mut self) -> FpdzcW { + FpdzcW::new(self, 9) } #[doc = "Bit 10 - FPU Underflow interrupt flag"] #[inline(always)] #[must_use] - pub fn fpufc(&mut self) -> FPUFC_W<10> { - FPUFC_W::new(self) + pub fn fpufc(&mut self) -> FpufcW { + FpufcW::new(self, 10) } #[doc = "Bit 11 - FPU Overflow interrupt flag"] #[inline(always)] #[must_use] - pub fn fpofc(&mut self) -> FPOFC_W<11> { - FPOFC_W::new(self) + pub fn fpofc(&mut self) -> FpofcW { + FpofcW::new(self, 11) } #[doc = "Bit 12 - FPU Input denormal interrupt flag"] #[inline(always)] #[must_use] - pub fn fpidc(&mut self) -> FPIDC_W<12> { - FPIDC_W::new(self) + pub fn fpidc(&mut self) -> FpidcW { + FpidcW::new(self, 12) } #[doc = "Bit 13 - FPU Inexact interrupt flag"] #[inline(always)] #[must_use] - pub fn fpixc(&mut self) -> FPIXC_W<13> { - FPIXC_W::new(self) + pub fn fpixc(&mut self) -> FpixcW { + FpixcW::new(self, 13) } #[doc = "Bit 24 - SEQRAM Error 1-bit Interrupt Flag"] #[inline(always)] #[must_use] - pub fn seqramerr1b(&mut self) -> SEQRAMERR1B_W<24> { - SEQRAMERR1B_W::new(self) + pub fn seqramerr1b(&mut self) -> Seqramerr1bW { + Seqramerr1bW::new(self, 24) } #[doc = "Bit 25 - SEQRAM Error 2-bit Interrupt Flag"] #[inline(always)] #[must_use] - pub fn seqramerr2b(&mut self) -> SEQRAMERR2B_W<25> { - SEQRAMERR2B_W::new(self) + pub fn seqramerr2b(&mut self) -> Seqramerr2bW { + Seqramerr2bW::new(self, 25) } #[doc = "Bit 28 - FRCRAM Error 1-bit Interrupt Flag"] #[inline(always)] #[must_use] - pub fn frcramerr1b(&mut self) -> FRCRAMERR1B_W<28> { - FRCRAMERR1B_W::new(self) + pub fn frcramerr1b(&mut self) -> Frcramerr1bW { + Frcramerr1bW::new(self, 28) } #[doc = "Bit 29 - FRCRAM Error 2-bit Interrupt Flag"] #[inline(always)] #[must_use] - pub fn frcramerr2b(&mut self) -> FRCRAMERR2B_W<29> { - FRCRAMERR2B_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn frcramerr2b(&mut self) -> Frcramerr2bW { + Frcramerr2bW::new(self, 29) } } -#[doc = "Read to get system status.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "Read to get system status.\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/ipversion.rs index 6001e4c..997a40c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - New BitField"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - New BitField"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x02"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/rambiasconf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/rambiasconf.rs index d05f025..a68a361 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/rambiasconf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/rambiasconf.rs @@ -1,168 +1,135 @@ #[doc = "Register `RAMBIASCONF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `RAMBIASCONF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `RAMBIASCTRL` reader - RAM Bias Control"] -pub type RAMBIASCTRL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "RAM Bias Control\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RAMBIASCTRL_A { +pub enum Rambiasctrl { #[doc = "0: None"] - NO = 0, + No = 0, #[doc = "1: Voltage Source Bias 100mV"] - VSB100 = 1, + Vsb100 = 1, #[doc = "2: Voltage Source Bias 200mV"] - VSB200 = 2, + Vsb200 = 2, #[doc = "4: Voltage Source Bias 300mV"] - VSB300 = 4, + Vsb300 = 4, #[doc = "8: Voltage Source Bias 400mV"] - VSB400 = 8, + Vsb400 = 8, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RAMBIASCTRL_A) -> Self { + fn from(variant: Rambiasctrl) -> Self { variant as _ } } -impl RAMBIASCTRL_R { +impl crate::FieldSpec for Rambiasctrl { + type Ux = u8; +} +impl crate::IsEnum for Rambiasctrl {} +#[doc = "Field `RAMBIASCTRL` reader - RAM Bias Control"] +pub type RambiasctrlR = crate::FieldReader; +impl RambiasctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(RAMBIASCTRL_A::NO), - 1 => Some(RAMBIASCTRL_A::VSB100), - 2 => Some(RAMBIASCTRL_A::VSB200), - 4 => Some(RAMBIASCTRL_A::VSB300), - 8 => Some(RAMBIASCTRL_A::VSB400), + 0 => Some(Rambiasctrl::No), + 1 => Some(Rambiasctrl::Vsb100), + 2 => Some(Rambiasctrl::Vsb200), + 4 => Some(Rambiasctrl::Vsb300), + 8 => Some(Rambiasctrl::Vsb400), _ => None, } } - #[doc = "Checks if the value of the field is `NO`"] + #[doc = "None"] #[inline(always)] pub fn is_no(&self) -> bool { - *self == RAMBIASCTRL_A::NO + *self == Rambiasctrl::No } - #[doc = "Checks if the value of the field is `VSB100`"] + #[doc = "Voltage Source Bias 100mV"] #[inline(always)] pub fn is_vsb100(&self) -> bool { - *self == RAMBIASCTRL_A::VSB100 + *self == Rambiasctrl::Vsb100 } - #[doc = "Checks if the value of the field is `VSB200`"] + #[doc = "Voltage Source Bias 200mV"] #[inline(always)] pub fn is_vsb200(&self) -> bool { - *self == RAMBIASCTRL_A::VSB200 + *self == Rambiasctrl::Vsb200 } - #[doc = "Checks if the value of the field is `VSB300`"] + #[doc = "Voltage Source Bias 300mV"] #[inline(always)] pub fn is_vsb300(&self) -> bool { - *self == RAMBIASCTRL_A::VSB300 + *self == Rambiasctrl::Vsb300 } - #[doc = "Checks if the value of the field is `VSB400`"] + #[doc = "Voltage Source Bias 400mV"] #[inline(always)] pub fn is_vsb400(&self) -> bool { - *self == RAMBIASCTRL_A::VSB400 + *self == Rambiasctrl::Vsb400 } } #[doc = "Field `RAMBIASCTRL` writer - RAM Bias Control"] -pub type RAMBIASCTRL_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, RAMBIASCONF_SPEC, u8, RAMBIASCTRL_A, 4, O>; -impl<'a, const O: u8> RAMBIASCTRL_W<'a, O> { +pub type RambiasctrlW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rambiasctrl>; +impl<'a, REG> RambiasctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "None"] #[inline(always)] - pub fn no(self) -> &'a mut W { - self.variant(RAMBIASCTRL_A::NO) + pub fn no(self) -> &'a mut crate::W { + self.variant(Rambiasctrl::No) } #[doc = "Voltage Source Bias 100mV"] #[inline(always)] - pub fn vsb100(self) -> &'a mut W { - self.variant(RAMBIASCTRL_A::VSB100) + pub fn vsb100(self) -> &'a mut crate::W { + self.variant(Rambiasctrl::Vsb100) } #[doc = "Voltage Source Bias 200mV"] #[inline(always)] - pub fn vsb200(self) -> &'a mut W { - self.variant(RAMBIASCTRL_A::VSB200) + pub fn vsb200(self) -> &'a mut crate::W { + self.variant(Rambiasctrl::Vsb200) } #[doc = "Voltage Source Bias 300mV"] #[inline(always)] - pub fn vsb300(self) -> &'a mut W { - self.variant(RAMBIASCTRL_A::VSB300) + pub fn vsb300(self) -> &'a mut crate::W { + self.variant(Rambiasctrl::Vsb300) } #[doc = "Voltage Source Bias 400mV"] #[inline(always)] - pub fn vsb400(self) -> &'a mut W { - self.variant(RAMBIASCTRL_A::VSB400) + pub fn vsb400(self) -> &'a mut crate::W { + self.variant(Rambiasctrl::Vsb400) } } impl R { #[doc = "Bits 0:3 - RAM Bias Control"] #[inline(always)] - pub fn rambiasctrl(&self) -> RAMBIASCTRL_R { - RAMBIASCTRL_R::new((self.bits & 0x0f) as u8) + pub fn rambiasctrl(&self) -> RambiasctrlR { + RambiasctrlR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - RAM Bias Control"] #[inline(always)] #[must_use] - pub fn rambiasctrl(&mut self) -> RAMBIASCTRL_W<0> { - RAMBIASCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rambiasctrl(&mut self) -> RambiasctrlW { + RambiasctrlW::new(self, 0) } } -#[doc = "Configure RAM bias configure bits.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rambiasconf](index.html) module"] -pub struct RAMBIASCONF_SPEC; -impl crate::RegisterSpec for RAMBIASCONF_SPEC { +#[doc = "Configure RAM bias configure bits.\n\nYou can [`read`](crate::Reg::read) this register and get [`rambiasconf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rambiasconf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RambiasconfSpec; +impl crate::RegisterSpec for RambiasconfSpec { type Ux = u32; } -#[doc = "`read()` method returns [rambiasconf::R](R) reader structure"] -impl crate::Readable for RAMBIASCONF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rambiasconf::W](W) writer structure"] -impl crate::Writable for RAMBIASCONF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`rambiasconf::R`](R) reader structure"] +impl crate::Readable for RambiasconfSpec {} +#[doc = "`write(|w| ..)` method takes [`rambiasconf::W`](W) writer structure"] +impl crate::Writable for RambiasconfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAMBIASCONF to value 0x02"] -impl crate::Resettable for RAMBIASCONF_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for RambiasconfSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/rootdata0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/rootdata0.rs index aafe866..5216ba2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/rootdata0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/rootdata0.rs @@ -1,80 +1,40 @@ #[doc = "Register `ROOTDATA0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ROOTDATA0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DATA` reader - Data"] -pub type DATA_R = crate::FieldReader; +pub type DataR = crate::FieldReader; #[doc = "Field `DATA` writer - Data"] -pub type DATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ROOTDATA0_SPEC, u32, u32, 32, O>; +pub type DataW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Data"] #[inline(always)] - pub fn data(&self) -> DATA_R { - DATA_R::new(self.bits) + pub fn data(&self) -> DataR { + DataR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Data"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W<0> { - DATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn data(&mut self) -> DataW { + DataW::new(self, 0) } } -#[doc = "Generic data space for user to pass to root, e.g., address of struct in mem\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rootdata0](index.html) module"] -pub struct ROOTDATA0_SPEC; -impl crate::RegisterSpec for ROOTDATA0_SPEC { +#[doc = "Generic data space for user to pass to root, e.g., address of struct in mem\n\nYou can [`read`](crate::Reg::read) this register and get [`rootdata0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rootdata0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Rootdata0Spec; +impl crate::RegisterSpec for Rootdata0Spec { type Ux = u32; } -#[doc = "`read()` method returns [rootdata0::R](R) reader structure"] -impl crate::Readable for ROOTDATA0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rootdata0::W](W) writer structure"] -impl crate::Writable for ROOTDATA0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`rootdata0::R`](R) reader structure"] +impl crate::Readable for Rootdata0Spec {} +#[doc = "`write(|w| ..)` method takes [`rootdata0::W`](W) writer structure"] +impl crate::Writable for Rootdata0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ROOTDATA0 to value 0"] -impl crate::Resettable for ROOTDATA0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Rootdata0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/rootdata1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/rootdata1.rs index f386677..d673338 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/rootdata1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/rootdata1.rs @@ -1,80 +1,40 @@ #[doc = "Register `ROOTDATA1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ROOTDATA1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DATA` reader - Data"] -pub type DATA_R = crate::FieldReader; +pub type DataR = crate::FieldReader; #[doc = "Field `DATA` writer - Data"] -pub type DATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ROOTDATA1_SPEC, u32, u32, 32, O>; +pub type DataW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Data"] #[inline(always)] - pub fn data(&self) -> DATA_R { - DATA_R::new(self.bits) + pub fn data(&self) -> DataR { + DataR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Data"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W<0> { - DATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn data(&mut self) -> DataW { + DataW::new(self, 0) } } -#[doc = "Generic data space for user to pass to root, e.g., address of struct in mem\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rootdata1](index.html) module"] -pub struct ROOTDATA1_SPEC; -impl crate::RegisterSpec for ROOTDATA1_SPEC { +#[doc = "Generic data space for user to pass to root, e.g., address of struct in mem\n\nYou can [`read`](crate::Reg::read) this register and get [`rootdata1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rootdata1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Rootdata1Spec; +impl crate::RegisterSpec for Rootdata1Spec { type Ux = u32; } -#[doc = "`read()` method returns [rootdata1::R](R) reader structure"] -impl crate::Readable for ROOTDATA1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rootdata1::W](W) writer structure"] -impl crate::Writable for ROOTDATA1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`rootdata1::R`](R) reader structure"] +impl crate::Readable for Rootdata1Spec {} +#[doc = "`write(|w| ..)` method takes [`rootdata1::W`](W) writer structure"] +impl crate::Writable for Rootdata1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ROOTDATA1 to value 0"] -impl crate::Resettable for ROOTDATA1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Rootdata1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/rootlockstatus.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/rootlockstatus.rs index b0971a8..187e0a6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/rootlockstatus.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/rootlockstatus.rs @@ -1,100 +1,85 @@ #[doc = "Register `ROOTLOCKSTATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `BUSLOCK` reader - Bus Lock"] -pub type BUSLOCK_R = crate::BitReader; +pub type BuslockR = crate::BitReader; #[doc = "Field `REGLOCK` reader - Register Lock"] -pub type REGLOCK_R = crate::BitReader; +pub type ReglockR = crate::BitReader; #[doc = "Field `MFRLOCK` reader - Manufacture Lock"] -pub type MFRLOCK_R = crate::BitReader; +pub type MfrlockR = crate::BitReader; #[doc = "Field `ROOTDBGLOCK` reader - Root Debug Lock"] -pub type ROOTDBGLOCK_R = crate::BitReader; +pub type RootdbglockR = crate::BitReader; #[doc = "Field `USERDBGAPLOCK` reader - User Debug Access Port Lock"] -pub type USERDBGAPLOCK_R = crate::BitReader; +pub type UserdbgaplockR = crate::BitReader; #[doc = "Field `USERDBGLOCK` reader - User Invasive Debug Lock"] -pub type USERDBGLOCK_R = crate::BitReader; +pub type UserdbglockR = crate::BitReader; #[doc = "Field `USERNIDLOCK` reader - User Non-invasive Debug Lock"] -pub type USERNIDLOCK_R = crate::BitReader; +pub type UsernidlockR = crate::BitReader; #[doc = "Field `USERSPIDLOCK` reader - User Secure Invasive Debug Lock"] -pub type USERSPIDLOCK_R = crate::BitReader; +pub type UserspidlockR = crate::BitReader; #[doc = "Field `USERSPNIDLOCK` reader - User Secure Non-invasive Debug Lock"] -pub type USERSPNIDLOCK_R = crate::BitReader; +pub type UserspnidlockR = crate::BitReader; #[doc = "Field `EFUSEUNLOCKED` reader - E-Fuse Unlocked"] -pub type EFUSEUNLOCKED_R = crate::BitReader; +pub type EfuseunlockedR = crate::BitReader; impl R { #[doc = "Bit 0 - Bus Lock"] #[inline(always)] - pub fn buslock(&self) -> BUSLOCK_R { - BUSLOCK_R::new((self.bits & 1) != 0) + pub fn buslock(&self) -> BuslockR { + BuslockR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Register Lock"] #[inline(always)] - pub fn reglock(&self) -> REGLOCK_R { - REGLOCK_R::new(((self.bits >> 1) & 1) != 0) + pub fn reglock(&self) -> ReglockR { + ReglockR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Manufacture Lock"] #[inline(always)] - pub fn mfrlock(&self) -> MFRLOCK_R { - MFRLOCK_R::new(((self.bits >> 2) & 1) != 0) + pub fn mfrlock(&self) -> MfrlockR { + MfrlockR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 8 - Root Debug Lock"] #[inline(always)] - pub fn rootdbglock(&self) -> ROOTDBGLOCK_R { - ROOTDBGLOCK_R::new(((self.bits >> 8) & 1) != 0) + pub fn rootdbglock(&self) -> RootdbglockR { + RootdbglockR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 16 - User Debug Access Port Lock"] #[inline(always)] - pub fn userdbgaplock(&self) -> USERDBGAPLOCK_R { - USERDBGAPLOCK_R::new(((self.bits >> 16) & 1) != 0) + pub fn userdbgaplock(&self) -> UserdbgaplockR { + UserdbgaplockR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - User Invasive Debug Lock"] #[inline(always)] - pub fn userdbglock(&self) -> USERDBGLOCK_R { - USERDBGLOCK_R::new(((self.bits >> 17) & 1) != 0) + pub fn userdbglock(&self) -> UserdbglockR { + UserdbglockR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - User Non-invasive Debug Lock"] #[inline(always)] - pub fn usernidlock(&self) -> USERNIDLOCK_R { - USERNIDLOCK_R::new(((self.bits >> 18) & 1) != 0) + pub fn usernidlock(&self) -> UsernidlockR { + UsernidlockR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - User Secure Invasive Debug Lock"] #[inline(always)] - pub fn userspidlock(&self) -> USERSPIDLOCK_R { - USERSPIDLOCK_R::new(((self.bits >> 19) & 1) != 0) + pub fn userspidlock(&self) -> UserspidlockR { + UserspidlockR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - User Secure Non-invasive Debug Lock"] #[inline(always)] - pub fn userspnidlock(&self) -> USERSPNIDLOCK_R { - USERSPNIDLOCK_R::new(((self.bits >> 20) & 1) != 0) + pub fn userspnidlock(&self) -> UserspnidlockR { + UserspnidlockR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 31 - E-Fuse Unlocked"] #[inline(always)] - pub fn efuseunlocked(&self) -> EFUSEUNLOCKED_R { - EFUSEUNLOCKED_R::new(((self.bits >> 31) & 1) != 0) + pub fn efuseunlocked(&self) -> EfuseunlockedR { + EfuseunlockedR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "This register returns the status of the SE managed locks.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rootlockstatus](index.html) module"] -pub struct ROOTLOCKSTATUS_SPEC; -impl crate::RegisterSpec for ROOTLOCKSTATUS_SPEC { +#[doc = "This register returns the status of the SE managed locks.\n\nYou can [`read`](crate::Reg::read) this register and get [`rootlockstatus::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RootlockstatusSpec; +impl crate::RegisterSpec for RootlockstatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [rootlockstatus::R](R) reader structure"] -impl crate::Readable for ROOTLOCKSTATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rootlockstatus::R`](R) reader structure"] +impl crate::Readable for RootlockstatusSpec {} #[doc = "`reset()` method sets ROOTLOCKSTATUS to value 0x007f_0107"] -impl crate::Resettable for ROOTLOCKSTATUS_SPEC { - const RESET_VALUE: Self::Ux = 0x007f_0107; +impl crate::Resettable for RootlockstatusSpec { + const RESET_VALUE: u32 = 0x007f_0107; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/rootseswversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/rootseswversion.rs index 9e94d10..af764e9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/rootseswversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s/rootseswversion.rs @@ -1,81 +1,40 @@ #[doc = "Register `ROOTSESWVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ROOTSESWVERSION` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SWVERSION` reader - SW Version"] -pub type SWVERSION_R = crate::FieldReader; +pub type SwversionR = crate::FieldReader; #[doc = "Field `SWVERSION` writer - SW Version"] -pub type SWVERSION_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, ROOTSESWVERSION_SPEC, u32, u32, 32, O>; +pub type SwversionW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - SW Version"] #[inline(always)] - pub fn swversion(&self) -> SWVERSION_R { - SWVERSION_R::new(self.bits) + pub fn swversion(&self) -> SwversionR { + SwversionR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - SW Version"] #[inline(always)] #[must_use] - pub fn swversion(&mut self) -> SWVERSION_W<0> { - SWVERSION_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn swversion(&mut self) -> SwversionW { + SwversionW::new(self, 0) } } -#[doc = "SE Software version\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rootseswversion](index.html) module"] -pub struct ROOTSESWVERSION_SPEC; -impl crate::RegisterSpec for ROOTSESWVERSION_SPEC { +#[doc = "SE Software version\n\nYou can [`read`](crate::Reg::read) this register and get [`rootseswversion::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rootseswversion::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RootseswversionSpec; +impl crate::RegisterSpec for RootseswversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [rootseswversion::R](R) reader structure"] -impl crate::Readable for ROOTSESWVERSION_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rootseswversion::W](W) writer structure"] -impl crate::Writable for ROOTSESWVERSION_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`rootseswversion::R`](R) reader structure"] +impl crate::Readable for RootseswversionSpec {} +#[doc = "`write(|w| ..)` method takes [`rootseswversion::W`](W) writer structure"] +impl crate::Writable for RootseswversionSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ROOTSESWVERSION to value 0"] -impl crate::Resettable for ROOTSESWVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RootseswversionSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s_cfgns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s_cfgns.rs index a128eee..992fc00 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s_cfgns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s_cfgns.rs @@ -1,24 +1,44 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { _reserved0: [u8; 0x1c], - #[doc = "0x1c - Configure to define the system tick for the M33."] - pub cfgnstcalib: CFGNSTCALIB, + cfgnstcalib: Cfgnstcalib, _reserved1: [u8; 0x05e0], + rootnsdata0: Rootnsdata0, + rootnsdata1: Rootnsdata1, +} +impl RegisterBlock { + #[doc = "0x1c - Configure to define the system tick for the M33."] + #[inline(always)] + pub const fn cfgnstcalib(&self) -> &Cfgnstcalib { + &self.cfgnstcalib + } #[doc = "0x600 - Generic data space for user to pass to root, e.g., address of struct in mem"] - pub rootnsdata0: ROOTNSDATA0, + #[inline(always)] + pub const fn rootnsdata0(&self) -> &Rootnsdata0 { + &self.rootnsdata0 + } #[doc = "0x604 - Generic data space for user to pass to root, e.g., address of struct in mem"] - pub rootnsdata1: ROOTNSDATA1, + #[inline(always)] + pub const fn rootnsdata1(&self) -> &Rootnsdata1 { + &self.rootnsdata1 + } } -#[doc = "CFGNSTCALIB (rw) register accessor: an alias for `Reg`"] -pub type CFGNSTCALIB = crate::Reg; +#[doc = "CFGNSTCALIB (rw) register accessor: Configure to define the system tick for the M33.\n\nYou can [`read`](crate::Reg::read) this register and get [`cfgnstcalib::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgnstcalib::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfgnstcalib`] +module"] +#[doc(alias = "CFGNSTCALIB")] +pub type Cfgnstcalib = crate::Reg; #[doc = "Configure to define the system tick for the M33."] pub mod cfgnstcalib; -#[doc = "ROOTNSDATA0 (rw) register accessor: an alias for `Reg`"] -pub type ROOTNSDATA0 = crate::Reg; +#[doc = "ROOTNSDATA0 (rw) register accessor: Generic data space for user to pass to root, e.g., address of struct in mem\n\nYou can [`read`](crate::Reg::read) this register and get [`rootnsdata0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rootnsdata0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rootnsdata0`] +module"] +#[doc(alias = "ROOTNSDATA0")] +pub type Rootnsdata0 = crate::Reg; #[doc = "Generic data space for user to pass to root, e.g., address of struct in mem"] pub mod rootnsdata0; -#[doc = "ROOTNSDATA1 (rw) register accessor: an alias for `Reg`"] -pub type ROOTNSDATA1 = crate::Reg; +#[doc = "ROOTNSDATA1 (rw) register accessor: Generic data space for user to pass to root, e.g., address of struct in mem\n\nYou can [`read`](crate::Reg::read) this register and get [`rootnsdata1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rootnsdata1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rootnsdata1`] +module"] +#[doc(alias = "ROOTNSDATA1")] +pub type Rootnsdata1 = crate::Reg; #[doc = "Generic data space for user to pass to root, e.g., address of struct in mem"] pub mod rootnsdata1; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s_cfgns/cfgnstcalib.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s_cfgns/cfgnstcalib.rs index 0f795a0..a65de4a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s_cfgns/cfgnstcalib.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s_cfgns/cfgnstcalib.rs @@ -1,156 +1,119 @@ #[doc = "Register `CFGNSTCALIB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFGNSTCALIB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TENMS` reader - Ten Milliseconds"] -pub type TENMS_R = crate::FieldReader; +pub type TenmsR = crate::FieldReader; #[doc = "Field `TENMS` writer - Ten Milliseconds"] -pub type TENMS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFGNSTCALIB_SPEC, u32, u32, 24, O>; +pub type TenmsW<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>; #[doc = "Field `SKEW` reader - Skew"] -pub type SKEW_R = crate::BitReader; +pub type SkewR = crate::BitReader; #[doc = "Field `SKEW` writer - Skew"] -pub type SKEW_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFGNSTCALIB_SPEC, bool, O>; -#[doc = "Field `NOREF` reader - No Reference"] -pub type NOREF_R = crate::BitReader; +pub type SkewW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "No Reference\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum NOREF_A { +pub enum Noref { #[doc = "0: Reference clock is implemented"] - REF = 0, + Ref = 0, #[doc = "1: Reference clock is not implemented"] - NOREF = 1, + Noref = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: NOREF_A) -> Self { + fn from(variant: Noref) -> Self { variant as u8 != 0 } } -impl NOREF_R { +#[doc = "Field `NOREF` reader - No Reference"] +pub type NorefR = crate::BitReader; +impl NorefR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> NOREF_A { + pub const fn variant(&self) -> Noref { match self.bits { - false => NOREF_A::REF, - true => NOREF_A::NOREF, + false => Noref::Ref, + true => Noref::Noref, } } - #[doc = "Checks if the value of the field is `REF`"] + #[doc = "Reference clock is implemented"] #[inline(always)] pub fn is_ref(&self) -> bool { - *self == NOREF_A::REF + *self == Noref::Ref } - #[doc = "Checks if the value of the field is `NOREF`"] + #[doc = "Reference clock is not implemented"] #[inline(always)] pub fn is_noref(&self) -> bool { - *self == NOREF_A::NOREF + *self == Noref::Noref } } #[doc = "Field `NOREF` writer - No Reference"] -pub type NOREF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFGNSTCALIB_SPEC, NOREF_A, O>; -impl<'a, const O: u8> NOREF_W<'a, O> { +pub type NorefW<'a, REG> = crate::BitWriter<'a, REG, Noref>; +impl<'a, REG> NorefW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Reference clock is implemented"] #[inline(always)] - pub fn ref_(self) -> &'a mut W { - self.variant(NOREF_A::REF) + pub fn ref_(self) -> &'a mut crate::W { + self.variant(Noref::Ref) } #[doc = "Reference clock is not implemented"] #[inline(always)] - pub fn noref(self) -> &'a mut W { - self.variant(NOREF_A::NOREF) + pub fn noref(self) -> &'a mut crate::W { + self.variant(Noref::Noref) } } impl R { #[doc = "Bits 0:23 - Ten Milliseconds"] #[inline(always)] - pub fn tenms(&self) -> TENMS_R { - TENMS_R::new(self.bits & 0x00ff_ffff) + pub fn tenms(&self) -> TenmsR { + TenmsR::new(self.bits & 0x00ff_ffff) } #[doc = "Bit 24 - Skew"] #[inline(always)] - pub fn skew(&self) -> SKEW_R { - SKEW_R::new(((self.bits >> 24) & 1) != 0) + pub fn skew(&self) -> SkewR { + SkewR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - No Reference"] #[inline(always)] - pub fn noref(&self) -> NOREF_R { - NOREF_R::new(((self.bits >> 25) & 1) != 0) + pub fn noref(&self) -> NorefR { + NorefR::new(((self.bits >> 25) & 1) != 0) } } impl W { #[doc = "Bits 0:23 - Ten Milliseconds"] #[inline(always)] #[must_use] - pub fn tenms(&mut self) -> TENMS_W<0> { - TENMS_W::new(self) + pub fn tenms(&mut self) -> TenmsW { + TenmsW::new(self, 0) } #[doc = "Bit 24 - Skew"] #[inline(always)] #[must_use] - pub fn skew(&mut self) -> SKEW_W<24> { - SKEW_W::new(self) + pub fn skew(&mut self) -> SkewW { + SkewW::new(self, 24) } #[doc = "Bit 25 - No Reference"] #[inline(always)] #[must_use] - pub fn noref(&mut self) -> NOREF_W<25> { - NOREF_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn noref(&mut self) -> NorefW { + NorefW::new(self, 25) } } -#[doc = "Configure to define the system tick for the M33.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfgnstcalib](index.html) module"] -pub struct CFGNSTCALIB_SPEC; -impl crate::RegisterSpec for CFGNSTCALIB_SPEC { +#[doc = "Configure to define the system tick for the M33.\n\nYou can [`read`](crate::Reg::read) this register and get [`cfgnstcalib::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgnstcalib::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgnstcalibSpec; +impl crate::RegisterSpec for CfgnstcalibSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfgnstcalib::R](R) reader structure"] -impl crate::Readable for CFGNSTCALIB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfgnstcalib::W](W) writer structure"] -impl crate::Writable for CFGNSTCALIB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfgnstcalib::R`](R) reader structure"] +impl crate::Readable for CfgnstcalibSpec {} +#[doc = "`write(|w| ..)` method takes [`cfgnstcalib::W`](W) writer structure"] +impl crate::Writable for CfgnstcalibSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFGNSTCALIB to value 0x0100_4a37"] -impl crate::Resettable for CFGNSTCALIB_SPEC { - const RESET_VALUE: Self::Ux = 0x0100_4a37; +impl crate::Resettable for CfgnstcalibSpec { + const RESET_VALUE: u32 = 0x0100_4a37; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s_cfgns/rootnsdata0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s_cfgns/rootnsdata0.rs index 0e6b770..ee72038 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s_cfgns/rootnsdata0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s_cfgns/rootnsdata0.rs @@ -1,80 +1,40 @@ #[doc = "Register `ROOTNSDATA0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ROOTNSDATA0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DATA` reader - Data"] -pub type DATA_R = crate::FieldReader; +pub type DataR = crate::FieldReader; #[doc = "Field `DATA` writer - Data"] -pub type DATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ROOTNSDATA0_SPEC, u32, u32, 32, O>; +pub type DataW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Data"] #[inline(always)] - pub fn data(&self) -> DATA_R { - DATA_R::new(self.bits) + pub fn data(&self) -> DataR { + DataR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Data"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W<0> { - DATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn data(&mut self) -> DataW { + DataW::new(self, 0) } } -#[doc = "Generic data space for user to pass to root, e.g., address of struct in mem\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rootnsdata0](index.html) module"] -pub struct ROOTNSDATA0_SPEC; -impl crate::RegisterSpec for ROOTNSDATA0_SPEC { +#[doc = "Generic data space for user to pass to root, e.g., address of struct in mem\n\nYou can [`read`](crate::Reg::read) this register and get [`rootnsdata0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rootnsdata0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Rootnsdata0Spec; +impl crate::RegisterSpec for Rootnsdata0Spec { type Ux = u32; } -#[doc = "`read()` method returns [rootnsdata0::R](R) reader structure"] -impl crate::Readable for ROOTNSDATA0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rootnsdata0::W](W) writer structure"] -impl crate::Writable for ROOTNSDATA0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`rootnsdata0::R`](R) reader structure"] +impl crate::Readable for Rootnsdata0Spec {} +#[doc = "`write(|w| ..)` method takes [`rootnsdata0::W`](W) writer structure"] +impl crate::Writable for Rootnsdata0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ROOTNSDATA0 to value 0"] -impl crate::Resettable for ROOTNSDATA0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Rootnsdata0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s_cfgns/rootnsdata1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s_cfgns/rootnsdata1.rs index bbca598..ab91344 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s_cfgns/rootnsdata1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/syscfg_s_cfgns/rootnsdata1.rs @@ -1,80 +1,40 @@ #[doc = "Register `ROOTNSDATA1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `ROOTNSDATA1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DATA` reader - Data"] -pub type DATA_R = crate::FieldReader; +pub type DataR = crate::FieldReader; #[doc = "Field `DATA` writer - Data"] -pub type DATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ROOTNSDATA1_SPEC, u32, u32, 32, O>; +pub type DataW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Data"] #[inline(always)] - pub fn data(&self) -> DATA_R { - DATA_R::new(self.bits) + pub fn data(&self) -> DataR { + DataR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Data"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W<0> { - DATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn data(&mut self) -> DataW { + DataW::new(self, 0) } } -#[doc = "Generic data space for user to pass to root, e.g., address of struct in mem\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rootnsdata1](index.html) module"] -pub struct ROOTNSDATA1_SPEC; -impl crate::RegisterSpec for ROOTNSDATA1_SPEC { +#[doc = "Generic data space for user to pass to root, e.g., address of struct in mem\n\nYou can [`read`](crate::Reg::read) this register and get [`rootnsdata1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rootnsdata1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Rootnsdata1Spec; +impl crate::RegisterSpec for Rootnsdata1Spec { type Ux = u32; } -#[doc = "`read()` method returns [rootnsdata1::R](R) reader structure"] -impl crate::Readable for ROOTNSDATA1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [rootnsdata1::W](W) writer structure"] -impl crate::Writable for ROOTNSDATA1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`rootnsdata1::R`](R) reader structure"] +impl crate::Readable for Rootnsdata1Spec {} +#[doc = "`write(|w| ..)` method takes [`rootnsdata1::W`](W) writer structure"] +impl crate::Writable for Rootnsdata1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ROOTNSDATA1 to value 0"] -impl crate::Resettable for ROOTNSDATA1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Rootnsdata1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns.rs index 98ef475..8a3a542 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns.rs @@ -1,101 +1,199 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + swrst: Swrst, + cfg: Cfg, + cmd: Cmd, + status: Status, + cnt: Cnt, + syncbusy: Syncbusy, + lock: Lock, + _reserved9: [u8; 0x1c], + grp0_if: Grp0If, + grp0_ien: Grp0Ien, + grp0_ctrl: Grp0Ctrl, + grp0_cmp0value: Grp0Cmp0value, + grp0_cmp1value: Grp0Cmp1value, + grp0_cap0value: Grp0Cap0value, + grp0_syncbusy: Grp0Syncbusy, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub swrst: SWRST, + #[inline(always)] + pub const fn swrst(&self) -> &Swrst { + &self.swrst + } #[doc = "0x0c - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x10 - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x14 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x18 - No Description"] - pub cnt: CNT, + #[inline(always)] + pub const fn cnt(&self) -> &Cnt { + &self.cnt + } #[doc = "0x1c - No Description"] - pub syncbusy: SYNCBUSY, + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } #[doc = "0x20 - No Description"] - pub lock: LOCK, - _reserved9: [u8; 0x1c], + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x40 - No Description"] - pub grp0_if: GRP0_IF, + #[inline(always)] + pub const fn grp0_if(&self) -> &Grp0If { + &self.grp0_if + } #[doc = "0x44 - No Description"] - pub grp0_ien: GRP0_IEN, + #[inline(always)] + pub const fn grp0_ien(&self) -> &Grp0Ien { + &self.grp0_ien + } #[doc = "0x48 - No Description"] - pub grp0_ctrl: GRP0_CTRL, + #[inline(always)] + pub const fn grp0_ctrl(&self) -> &Grp0Ctrl { + &self.grp0_ctrl + } #[doc = "0x4c - No Description"] - pub grp0_cmp0value: GRP0_CMP0VALUE, + #[inline(always)] + pub const fn grp0_cmp0value(&self) -> &Grp0Cmp0value { + &self.grp0_cmp0value + } #[doc = "0x50 - No Description"] - pub grp0_cmp1value: GRP0_CMP1VALUE, + #[inline(always)] + pub const fn grp0_cmp1value(&self) -> &Grp0Cmp1value { + &self.grp0_cmp1value + } #[doc = "0x54 - No Description"] - pub grp0_cap0value: GRP0_CAP0VALUE, + #[inline(always)] + pub const fn grp0_cap0value(&self) -> &Grp0Cap0value { + &self.grp0_cap0value + } #[doc = "0x58 - No Description"] - pub grp0_syncbusy: GRP0_SYNCBUSY, + #[inline(always)] + pub const fn grp0_syncbusy(&self) -> &Grp0Syncbusy { + &self.grp0_syncbusy + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "SWRST (rw) register accessor: an alias for `Reg`"] -pub type SWRST = crate::Reg; +#[doc = "SWRST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swrst`] +module"] +#[doc(alias = "SWRST")] +pub type Swrst = crate::Reg; #[doc = "No Description"] pub mod swrst; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "CNT (rw) register accessor: an alias for `Reg`"] -pub type CNT = crate::Reg; +#[doc = "CNT (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnt`] +module"] +#[doc(alias = "CNT")] +pub type Cnt = crate::Reg; #[doc = "No Description"] pub mod cnt; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "No Description"] pub mod syncbusy; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "GRP0_IF (rw) register accessor: an alias for `Reg`"] -pub type GRP0_IF = crate::Reg; +#[doc = "GRP0_IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_if::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`grp0_if::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grp0_if`] +module"] +#[doc(alias = "GRP0_IF")] +pub type Grp0If = crate::Reg; #[doc = "No Description"] pub mod grp0_if; -#[doc = "GRP0_IEN (rw) register accessor: an alias for `Reg`"] -pub type GRP0_IEN = crate::Reg; +#[doc = "GRP0_IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`grp0_ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grp0_ien`] +module"] +#[doc(alias = "GRP0_IEN")] +pub type Grp0Ien = crate::Reg; #[doc = "No Description"] pub mod grp0_ien; -#[doc = "GRP0_CTRL (rw) register accessor: an alias for `Reg`"] -pub type GRP0_CTRL = crate::Reg; +#[doc = "GRP0_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`grp0_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grp0_ctrl`] +module"] +#[doc(alias = "GRP0_CTRL")] +pub type Grp0Ctrl = crate::Reg; #[doc = "No Description"] pub mod grp0_ctrl; -#[doc = "GRP0_CMP0VALUE (rw) register accessor: an alias for `Reg`"] -pub type GRP0_CMP0VALUE = crate::Reg; +#[doc = "GRP0_CMP0VALUE (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_cmp0value::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`grp0_cmp0value::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grp0_cmp0value`] +module"] +#[doc(alias = "GRP0_CMP0VALUE")] +pub type Grp0Cmp0value = crate::Reg; #[doc = "No Description"] pub mod grp0_cmp0value; -#[doc = "GRP0_CMP1VALUE (rw) register accessor: an alias for `Reg`"] -pub type GRP0_CMP1VALUE = crate::Reg; +#[doc = "GRP0_CMP1VALUE (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_cmp1value::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`grp0_cmp1value::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grp0_cmp1value`] +module"] +#[doc(alias = "GRP0_CMP1VALUE")] +pub type Grp0Cmp1value = crate::Reg; #[doc = "No Description"] pub mod grp0_cmp1value; -#[doc = "GRP0_CAP0VALUE (r) register accessor: an alias for `Reg`"] -pub type GRP0_CAP0VALUE = crate::Reg; +#[doc = "GRP0_CAP0VALUE (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_cap0value::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grp0_cap0value`] +module"] +#[doc(alias = "GRP0_CAP0VALUE")] +pub type Grp0Cap0value = crate::Reg; #[doc = "No Description"] pub mod grp0_cap0value; -#[doc = "GRP0_SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type GRP0_SYNCBUSY = crate::Reg; +#[doc = "GRP0_SYNCBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grp0_syncbusy`] +module"] +#[doc(alias = "GRP0_SYNCBUSY")] +pub type Grp0Syncbusy = crate::Reg; #[doc = "No Description"] pub mod grp0_syncbusy; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/cfg.rs index db5c4aa..be5e46a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/cfg.rs @@ -1,126 +1,89 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] -pub type DEBUGRUN_R = crate::BitReader; +pub type W = crate::W; #[doc = "Debug Mode Run Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DEBUGRUN_A { +pub enum Debugrun { #[doc = "0: SYSRTC is frozen in debug mode"] - DISABLE = 0, + Disable = 0, #[doc = "1: SYSRTC is running in debug mode"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DEBUGRUN_A) -> Self { + fn from(variant: Debugrun) -> Self { variant as u8 != 0 } } -impl DEBUGRUN_R { +#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] +pub type DebugrunR = crate::BitReader; +impl DebugrunR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DEBUGRUN_A { + pub const fn variant(&self) -> Debugrun { match self.bits { - false => DEBUGRUN_A::DISABLE, - true => DEBUGRUN_A::ENABLE, + false => Debugrun::Disable, + true => Debugrun::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "SYSRTC is frozen in debug mode"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == DEBUGRUN_A::DISABLE + *self == Debugrun::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "SYSRTC is running in debug mode"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == DEBUGRUN_A::ENABLE + *self == Debugrun::Enable } } #[doc = "Field `DEBUGRUN` writer - Debug Mode Run Enable"] -pub type DEBUGRUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DEBUGRUN_A, O>; -impl<'a, const O: u8> DEBUGRUN_W<'a, O> { +pub type DebugrunW<'a, REG> = crate::BitWriter<'a, REG, Debugrun>; +impl<'a, REG> DebugrunW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "SYSRTC is frozen in debug mode"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(DEBUGRUN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Debugrun::Disable) } #[doc = "SYSRTC is running in debug mode"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(DEBUGRUN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Debugrun::Enable) } } impl R { #[doc = "Bit 0 - Debug Mode Run Enable"] #[inline(always)] - pub fn debugrun(&self) -> DEBUGRUN_R { - DEBUGRUN_R::new((self.bits & 1) != 0) + pub fn debugrun(&self) -> DebugrunR { + DebugrunR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - Debug Mode Run Enable"] #[inline(always)] #[must_use] - pub fn debugrun(&mut self) -> DEBUGRUN_W<0> { - DEBUGRUN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn debugrun(&mut self) -> DebugrunW { + DebugrunW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/cmd.rs index 409faed..a498a0a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/cmd.rs @@ -1,60 +1,35 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` writer - Start SYSRTC"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STOP` writer - Stop SYSRTC"] -pub type STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StopW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Start SYSRTC"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Stop SYSRTC"] #[inline(always)] #[must_use] - pub fn stop(&mut self) -> STOP_W<1> { - STOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stop(&mut self) -> StopW { + StopW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/cnt.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/cnt.rs index 6e69c3d..4064743 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/cnt.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/cnt.rs @@ -1,80 +1,40 @@ #[doc = "Register `CNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CNT` reader - Counter Value"] -pub type CNT_R = crate::FieldReader; +pub type CntR = crate::FieldReader; #[doc = "Field `CNT` writer - Counter Value"] -pub type CNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CNT_SPEC, u32, u32, 32, O>; +pub type CntW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Counter Value"] #[inline(always)] - pub fn cnt(&self) -> CNT_R { - CNT_R::new(self.bits) + pub fn cnt(&self) -> CntR { + CntR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Counter Value"] #[inline(always)] #[must_use] - pub fn cnt(&mut self) -> CNT_W<0> { - CNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cnt(&mut self) -> CntW { + CntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](index.html) module"] -pub struct CNT_SPEC; -impl crate::RegisterSpec for CNT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CntSpec; +impl crate::RegisterSpec for CntSpec { type Ux = u32; } -#[doc = "`read()` method returns [cnt::R](R) reader structure"] -impl crate::Readable for CNT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnt::W](W) writer structure"] -impl crate::Writable for CNT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cnt::R`](R) reader structure"] +impl crate::Readable for CntSpec {} +#[doc = "`write(|w| ..)` method takes [`cnt::W`](W) writer structure"] +impl crate::Writable for CntSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNT to value 0"] -impl crate::Resettable for CNT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CntSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/en.rs index c9ce205..cd75ec1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - SYSRTC Enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - SYSRTC Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - SYSRTC Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - SYSRTC Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_cap0value.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_cap0value.rs index 2629121..cbbb55b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_cap0value.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_cap0value.rs @@ -1,37 +1,22 @@ #[doc = "Register `GRP0_CAP0VALUE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CAP0VALUE` reader - Capture 0 Value"] -pub type CAP0VALUE_R = crate::FieldReader; +pub type Cap0valueR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Capture 0 Value"] #[inline(always)] - pub fn cap0value(&self) -> CAP0VALUE_R { - CAP0VALUE_R::new(self.bits) + pub fn cap0value(&self) -> Cap0valueR { + Cap0valueR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [grp0_cap0value](index.html) module"] -pub struct GRP0_CAP0VALUE_SPEC; -impl crate::RegisterSpec for GRP0_CAP0VALUE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_cap0value::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Grp0Cap0valueSpec; +impl crate::RegisterSpec for Grp0Cap0valueSpec { type Ux = u32; } -#[doc = "`read()` method returns [grp0_cap0value::R](R) reader structure"] -impl crate::Readable for GRP0_CAP0VALUE_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`grp0_cap0value::R`](R) reader structure"] +impl crate::Readable for Grp0Cap0valueSpec {} #[doc = "`reset()` method sets GRP0_CAP0VALUE to value 0"] -impl crate::Resettable for GRP0_CAP0VALUE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Grp0Cap0valueSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_cmp0value.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_cmp0value.rs index b41874e..0d73be6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_cmp0value.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_cmp0value.rs @@ -1,81 +1,40 @@ #[doc = "Register `GRP0_CMP0VALUE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `GRP0_CMP0VALUE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CMP0VALUE` reader - Compare 0 Value"] -pub type CMP0VALUE_R = crate::FieldReader; +pub type Cmp0valueR = crate::FieldReader; #[doc = "Field `CMP0VALUE` writer - Compare 0 Value"] -pub type CMP0VALUE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, GRP0_CMP0VALUE_SPEC, u32, u32, 32, O>; +pub type Cmp0valueW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Compare 0 Value"] #[inline(always)] - pub fn cmp0value(&self) -> CMP0VALUE_R { - CMP0VALUE_R::new(self.bits) + pub fn cmp0value(&self) -> Cmp0valueR { + Cmp0valueR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Compare 0 Value"] #[inline(always)] #[must_use] - pub fn cmp0value(&mut self) -> CMP0VALUE_W<0> { - CMP0VALUE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp0value(&mut self) -> Cmp0valueW { + Cmp0valueW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [grp0_cmp0value](index.html) module"] -pub struct GRP0_CMP0VALUE_SPEC; -impl crate::RegisterSpec for GRP0_CMP0VALUE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_cmp0value::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`grp0_cmp0value::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Grp0Cmp0valueSpec; +impl crate::RegisterSpec for Grp0Cmp0valueSpec { type Ux = u32; } -#[doc = "`read()` method returns [grp0_cmp0value::R](R) reader structure"] -impl crate::Readable for GRP0_CMP0VALUE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [grp0_cmp0value::W](W) writer structure"] -impl crate::Writable for GRP0_CMP0VALUE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`grp0_cmp0value::R`](R) reader structure"] +impl crate::Readable for Grp0Cmp0valueSpec {} +#[doc = "`write(|w| ..)` method takes [`grp0_cmp0value::W`](W) writer structure"] +impl crate::Writable for Grp0Cmp0valueSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GRP0_CMP0VALUE to value 0"] -impl crate::Resettable for GRP0_CMP0VALUE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Grp0Cmp0valueSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_cmp1value.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_cmp1value.rs index cdd0898..1c30876 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_cmp1value.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_cmp1value.rs @@ -1,81 +1,40 @@ #[doc = "Register `GRP0_CMP1VALUE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `GRP0_CMP1VALUE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CMP1VALUE` reader - Compare 1 Value"] -pub type CMP1VALUE_R = crate::FieldReader; +pub type Cmp1valueR = crate::FieldReader; #[doc = "Field `CMP1VALUE` writer - Compare 1 Value"] -pub type CMP1VALUE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, GRP0_CMP1VALUE_SPEC, u32, u32, 32, O>; +pub type Cmp1valueW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Compare 1 Value"] #[inline(always)] - pub fn cmp1value(&self) -> CMP1VALUE_R { - CMP1VALUE_R::new(self.bits) + pub fn cmp1value(&self) -> Cmp1valueR { + Cmp1valueR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Compare 1 Value"] #[inline(always)] #[must_use] - pub fn cmp1value(&mut self) -> CMP1VALUE_W<0> { - CMP1VALUE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp1value(&mut self) -> Cmp1valueW { + Cmp1valueW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [grp0_cmp1value](index.html) module"] -pub struct GRP0_CMP1VALUE_SPEC; -impl crate::RegisterSpec for GRP0_CMP1VALUE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_cmp1value::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`grp0_cmp1value::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Grp0Cmp1valueSpec; +impl crate::RegisterSpec for Grp0Cmp1valueSpec { type Ux = u32; } -#[doc = "`read()` method returns [grp0_cmp1value::R](R) reader structure"] -impl crate::Readable for GRP0_CMP1VALUE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [grp0_cmp1value::W](W) writer structure"] -impl crate::Writable for GRP0_CMP1VALUE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`grp0_cmp1value::R`](R) reader structure"] +impl crate::Readable for Grp0Cmp1valueSpec {} +#[doc = "`write(|w| ..)` method takes [`grp0_cmp1value::W`](W) writer structure"] +impl crate::Writable for Grp0Cmp1valueSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GRP0_CMP1VALUE to value 0"] -impl crate::Resettable for GRP0_CMP1VALUE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Grp0Cmp1valueSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_ctrl.rs index c570996..aca33e8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_ctrl.rs @@ -1,393 +1,374 @@ #[doc = "Register `GRP0_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `GRP0_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CMP0EN` reader - Compare 0 Enable"] -pub type CMP0EN_R = crate::BitReader; +pub type Cmp0enR = crate::BitReader; #[doc = "Field `CMP0EN` writer - Compare 0 Enable"] -pub type CMP0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, GRP0_CTRL_SPEC, bool, O>; +pub type Cmp0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CMP1EN` reader - Compare 1 Enable"] -pub type CMP1EN_R = crate::BitReader; +pub type Cmp1enR = crate::BitReader; #[doc = "Field `CMP1EN` writer - Compare 1 Enable"] -pub type CMP1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, GRP0_CTRL_SPEC, bool, O>; +pub type Cmp1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CAP0EN` reader - Capture 0 Enable"] -pub type CAP0EN_R = crate::BitReader; +pub type Cap0enR = crate::BitReader; #[doc = "Field `CAP0EN` writer - Capture 0 Enable"] -pub type CAP0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, GRP0_CTRL_SPEC, bool, O>; -#[doc = "Field `CMP0CMOA` reader - Compare 0 Compare Match Output Action"] -pub type CMP0CMOA_R = crate::FieldReader; +pub type Cap0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare 0 Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMP0CMOA_A { +pub enum Cmp0cmoa { #[doc = "0: Cleared on the next cycle"] - CLEAR = 0, + Clear = 0, #[doc = "1: Set on the next cycle"] - SET = 1, + Set = 1, #[doc = "2: Set on the next cycle, cleared on the cycle after"] - PULSE = 2, + Pulse = 2, #[doc = "3: Inverted on the next cycle"] - TOGGLE = 3, + Toggle = 3, #[doc = "4: Export this channel's CMP IF"] - CMPIF = 4, + Cmpif = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMP0CMOA_A) -> Self { + fn from(variant: Cmp0cmoa) -> Self { variant as _ } } -impl CMP0CMOA_R { +impl crate::FieldSpec for Cmp0cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmp0cmoa {} +#[doc = "Field `CMP0CMOA` reader - Compare 0 Compare Match Output Action"] +pub type Cmp0cmoaR = crate::FieldReader; +impl Cmp0cmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CMP0CMOA_A::CLEAR), - 1 => Some(CMP0CMOA_A::SET), - 2 => Some(CMP0CMOA_A::PULSE), - 3 => Some(CMP0CMOA_A::TOGGLE), - 4 => Some(CMP0CMOA_A::CMPIF), + 0 => Some(Cmp0cmoa::Clear), + 1 => Some(Cmp0cmoa::Set), + 2 => Some(Cmp0cmoa::Pulse), + 3 => Some(Cmp0cmoa::Toggle), + 4 => Some(Cmp0cmoa::Cmpif), _ => None, } } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Cleared on the next cycle"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMP0CMOA_A::CLEAR + *self == Cmp0cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set on the next cycle"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMP0CMOA_A::SET + *self == Cmp0cmoa::Set } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Set on the next cycle, cleared on the cycle after"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == CMP0CMOA_A::PULSE + *self == Cmp0cmoa::Pulse } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Inverted on the next cycle"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMP0CMOA_A::TOGGLE + *self == Cmp0cmoa::Toggle } - #[doc = "Checks if the value of the field is `CMPIF`"] + #[doc = "Export this channel's CMP IF"] #[inline(always)] pub fn is_cmpif(&self) -> bool { - *self == CMP0CMOA_A::CMPIF + *self == Cmp0cmoa::Cmpif } } #[doc = "Field `CMP0CMOA` writer - Compare 0 Compare Match Output Action"] -pub type CMP0CMOA_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, GRP0_CTRL_SPEC, u8, CMP0CMOA_A, 3, O>; -impl<'a, const O: u8> CMP0CMOA_W<'a, O> { +pub type Cmp0cmoaW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cmp0cmoa>; +impl<'a, REG> Cmp0cmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Cleared on the next cycle"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMP0CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmp0cmoa::Clear) } #[doc = "Set on the next cycle"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMP0CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmp0cmoa::Set) } #[doc = "Set on the next cycle, cleared on the cycle after"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(CMP0CMOA_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Cmp0cmoa::Pulse) } #[doc = "Inverted on the next cycle"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMP0CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmp0cmoa::Toggle) } #[doc = "Export this channel's CMP IF"] #[inline(always)] - pub fn cmpif(self) -> &'a mut W { - self.variant(CMP0CMOA_A::CMPIF) + pub fn cmpif(self) -> &'a mut crate::W { + self.variant(Cmp0cmoa::Cmpif) } } -#[doc = "Field `CMP1CMOA` reader - Compare 1 Compare Match Output Action"] -pub type CMP1CMOA_R = crate::FieldReader; #[doc = "Compare 1 Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMP1CMOA_A { +pub enum Cmp1cmoa { #[doc = "0: Cleared on the next cycle"] - CLEAR = 0, + Clear = 0, #[doc = "1: Set on the next cycle"] - SET = 1, + Set = 1, #[doc = "2: Set on the next cycle, cleared on the cycle after"] - PULSE = 2, + Pulse = 2, #[doc = "3: Inverted on the next cycle"] - TOGGLE = 3, + Toggle = 3, #[doc = "4: Export this channel's CMP IF"] - CMPIF = 4, + Cmpif = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMP1CMOA_A) -> Self { + fn from(variant: Cmp1cmoa) -> Self { variant as _ } } -impl CMP1CMOA_R { +impl crate::FieldSpec for Cmp1cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmp1cmoa {} +#[doc = "Field `CMP1CMOA` reader - Compare 1 Compare Match Output Action"] +pub type Cmp1cmoaR = crate::FieldReader; +impl Cmp1cmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CMP1CMOA_A::CLEAR), - 1 => Some(CMP1CMOA_A::SET), - 2 => Some(CMP1CMOA_A::PULSE), - 3 => Some(CMP1CMOA_A::TOGGLE), - 4 => Some(CMP1CMOA_A::CMPIF), + 0 => Some(Cmp1cmoa::Clear), + 1 => Some(Cmp1cmoa::Set), + 2 => Some(Cmp1cmoa::Pulse), + 3 => Some(Cmp1cmoa::Toggle), + 4 => Some(Cmp1cmoa::Cmpif), _ => None, } } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Cleared on the next cycle"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMP1CMOA_A::CLEAR + *self == Cmp1cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set on the next cycle"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMP1CMOA_A::SET + *self == Cmp1cmoa::Set } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Set on the next cycle, cleared on the cycle after"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == CMP1CMOA_A::PULSE + *self == Cmp1cmoa::Pulse } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Inverted on the next cycle"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMP1CMOA_A::TOGGLE + *self == Cmp1cmoa::Toggle } - #[doc = "Checks if the value of the field is `CMPIF`"] + #[doc = "Export this channel's CMP IF"] #[inline(always)] pub fn is_cmpif(&self) -> bool { - *self == CMP1CMOA_A::CMPIF + *self == Cmp1cmoa::Cmpif } } #[doc = "Field `CMP1CMOA` writer - Compare 1 Compare Match Output Action"] -pub type CMP1CMOA_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, GRP0_CTRL_SPEC, u8, CMP1CMOA_A, 3, O>; -impl<'a, const O: u8> CMP1CMOA_W<'a, O> { +pub type Cmp1cmoaW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cmp1cmoa>; +impl<'a, REG> Cmp1cmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Cleared on the next cycle"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMP1CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmp1cmoa::Clear) } #[doc = "Set on the next cycle"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMP1CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmp1cmoa::Set) } #[doc = "Set on the next cycle, cleared on the cycle after"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(CMP1CMOA_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Cmp1cmoa::Pulse) } #[doc = "Inverted on the next cycle"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMP1CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmp1cmoa::Toggle) } #[doc = "Export this channel's CMP IF"] #[inline(always)] - pub fn cmpif(self) -> &'a mut W { - self.variant(CMP1CMOA_A::CMPIF) + pub fn cmpif(self) -> &'a mut crate::W { + self.variant(Cmp1cmoa::Cmpif) } } -#[doc = "Field `CAP0EDGE` reader - Capture 0 Edge Select"] -pub type CAP0EDGE_R = crate::FieldReader; #[doc = "Capture 0 Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CAP0EDGE_A { +pub enum Cap0edge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CAP0EDGE_A) -> Self { + fn from(variant: Cap0edge) -> Self { variant as _ } } -impl CAP0EDGE_R { +impl crate::FieldSpec for Cap0edge { + type Ux = u8; +} +impl crate::IsEnum for Cap0edge {} +#[doc = "Field `CAP0EDGE` reader - Capture 0 Edge Select"] +pub type Cap0edgeR = crate::FieldReader; +impl Cap0edgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CAP0EDGE_A::RISING), - 1 => Some(CAP0EDGE_A::FALLING), - 2 => Some(CAP0EDGE_A::BOTH), + 0 => Some(Cap0edge::Rising), + 1 => Some(Cap0edge::Falling), + 2 => Some(Cap0edge::Both), _ => None, } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == CAP0EDGE_A::RISING + *self == Cap0edge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == CAP0EDGE_A::FALLING + *self == Cap0edge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == CAP0EDGE_A::BOTH + *self == Cap0edge::Both } } #[doc = "Field `CAP0EDGE` writer - Capture 0 Edge Select"] -pub type CAP0EDGE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, GRP0_CTRL_SPEC, u8, CAP0EDGE_A, 2, O>; -impl<'a, const O: u8> CAP0EDGE_W<'a, O> { +pub type Cap0edgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cap0edge>; +impl<'a, REG> Cap0edgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(CAP0EDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Cap0edge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(CAP0EDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Cap0edge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(CAP0EDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Cap0edge::Both) } } impl R { #[doc = "Bit 0 - Compare 0 Enable"] #[inline(always)] - pub fn cmp0en(&self) -> CMP0EN_R { - CMP0EN_R::new((self.bits & 1) != 0) + pub fn cmp0en(&self) -> Cmp0enR { + Cmp0enR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Compare 1 Enable"] #[inline(always)] - pub fn cmp1en(&self) -> CMP1EN_R { - CMP1EN_R::new(((self.bits >> 1) & 1) != 0) + pub fn cmp1en(&self) -> Cmp1enR { + Cmp1enR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Capture 0 Enable"] #[inline(always)] - pub fn cap0en(&self) -> CAP0EN_R { - CAP0EN_R::new(((self.bits >> 2) & 1) != 0) + pub fn cap0en(&self) -> Cap0enR { + Cap0enR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 3:5 - Compare 0 Compare Match Output Action"] #[inline(always)] - pub fn cmp0cmoa(&self) -> CMP0CMOA_R { - CMP0CMOA_R::new(((self.bits >> 3) & 7) as u8) + pub fn cmp0cmoa(&self) -> Cmp0cmoaR { + Cmp0cmoaR::new(((self.bits >> 3) & 7) as u8) } #[doc = "Bits 6:8 - Compare 1 Compare Match Output Action"] #[inline(always)] - pub fn cmp1cmoa(&self) -> CMP1CMOA_R { - CMP1CMOA_R::new(((self.bits >> 6) & 7) as u8) + pub fn cmp1cmoa(&self) -> Cmp1cmoaR { + Cmp1cmoaR::new(((self.bits >> 6) & 7) as u8) } #[doc = "Bits 9:10 - Capture 0 Edge Select"] #[inline(always)] - pub fn cap0edge(&self) -> CAP0EDGE_R { - CAP0EDGE_R::new(((self.bits >> 9) & 3) as u8) + pub fn cap0edge(&self) -> Cap0edgeR { + Cap0edgeR::new(((self.bits >> 9) & 3) as u8) } } impl W { #[doc = "Bit 0 - Compare 0 Enable"] #[inline(always)] #[must_use] - pub fn cmp0en(&mut self) -> CMP0EN_W<0> { - CMP0EN_W::new(self) + pub fn cmp0en(&mut self) -> Cmp0enW { + Cmp0enW::new(self, 0) } #[doc = "Bit 1 - Compare 1 Enable"] #[inline(always)] #[must_use] - pub fn cmp1en(&mut self) -> CMP1EN_W<1> { - CMP1EN_W::new(self) + pub fn cmp1en(&mut self) -> Cmp1enW { + Cmp1enW::new(self, 1) } #[doc = "Bit 2 - Capture 0 Enable"] #[inline(always)] #[must_use] - pub fn cap0en(&mut self) -> CAP0EN_W<2> { - CAP0EN_W::new(self) + pub fn cap0en(&mut self) -> Cap0enW { + Cap0enW::new(self, 2) } #[doc = "Bits 3:5 - Compare 0 Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmp0cmoa(&mut self) -> CMP0CMOA_W<3> { - CMP0CMOA_W::new(self) + pub fn cmp0cmoa(&mut self) -> Cmp0cmoaW { + Cmp0cmoaW::new(self, 3) } #[doc = "Bits 6:8 - Compare 1 Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmp1cmoa(&mut self) -> CMP1CMOA_W<6> { - CMP1CMOA_W::new(self) + pub fn cmp1cmoa(&mut self) -> Cmp1cmoaW { + Cmp1cmoaW::new(self, 6) } #[doc = "Bits 9:10 - Capture 0 Edge Select"] #[inline(always)] #[must_use] - pub fn cap0edge(&mut self) -> CAP0EDGE_W<9> { - CAP0EDGE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cap0edge(&mut self) -> Cap0edgeW { + Cap0edgeW::new(self, 9) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [grp0_ctrl](index.html) module"] -pub struct GRP0_CTRL_SPEC; -impl crate::RegisterSpec for GRP0_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`grp0_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Grp0CtrlSpec; +impl crate::RegisterSpec for Grp0CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [grp0_ctrl::R](R) reader structure"] -impl crate::Readable for GRP0_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [grp0_ctrl::W](W) writer structure"] -impl crate::Writable for GRP0_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`grp0_ctrl::R`](R) reader structure"] +impl crate::Readable for Grp0CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`grp0_ctrl::W`](W) writer structure"] +impl crate::Writable for Grp0CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GRP0_CTRL to value 0"] -impl crate::Resettable for GRP0_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Grp0CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_ien.rs index 3d45f36..8174624 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_ien.rs @@ -1,125 +1,85 @@ #[doc = "Register `GRP0_IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `GRP0_IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OVF` reader - Overflow Interrupt Enable"] -pub type OVF_R = crate::BitReader; +pub type OvfR = crate::BitReader; #[doc = "Field `OVF` writer - Overflow Interrupt Enable"] -pub type OVF_W<'a, const O: u8> = crate::BitWriter<'a, u32, GRP0_IEN_SPEC, bool, O>; +pub type OvfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CMP0` reader - Compare 0 Interrupt Enable"] -pub type CMP0_R = crate::BitReader; +pub type Cmp0R = crate::BitReader; #[doc = "Field `CMP0` writer - Compare 0 Interrupt Enable"] -pub type CMP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, GRP0_IEN_SPEC, bool, O>; +pub type Cmp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CMP1` reader - Compare 1 Interrupt Enable"] -pub type CMP1_R = crate::BitReader; +pub type Cmp1R = crate::BitReader; #[doc = "Field `CMP1` writer - Compare 1 Interrupt Enable"] -pub type CMP1_W<'a, const O: u8> = crate::BitWriter<'a, u32, GRP0_IEN_SPEC, bool, O>; +pub type Cmp1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CAP0` reader - Capture 0 Interrupt Enable"] -pub type CAP0_R = crate::BitReader; +pub type Cap0R = crate::BitReader; #[doc = "Field `CAP0` writer - Capture 0 Interrupt Enable"] -pub type CAP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, GRP0_IEN_SPEC, bool, O>; +pub type Cap0W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Enable"] #[inline(always)] - pub fn ovf(&self) -> OVF_R { - OVF_R::new((self.bits & 1) != 0) + pub fn ovf(&self) -> OvfR { + OvfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Compare 0 Interrupt Enable"] #[inline(always)] - pub fn cmp0(&self) -> CMP0_R { - CMP0_R::new(((self.bits >> 1) & 1) != 0) + pub fn cmp0(&self) -> Cmp0R { + Cmp0R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Compare 1 Interrupt Enable"] #[inline(always)] - pub fn cmp1(&self) -> CMP1_R { - CMP1_R::new(((self.bits >> 2) & 1) != 0) + pub fn cmp1(&self) -> Cmp1R { + Cmp1R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Capture 0 Interrupt Enable"] #[inline(always)] - pub fn cap0(&self) -> CAP0_R { - CAP0_R::new(((self.bits >> 3) & 1) != 0) + pub fn cap0(&self) -> Cap0R { + Cap0R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ovf(&mut self) -> OVF_W<0> { - OVF_W::new(self) + pub fn ovf(&mut self) -> OvfW { + OvfW::new(self, 0) } #[doc = "Bit 1 - Compare 0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cmp0(&mut self) -> CMP0_W<1> { - CMP0_W::new(self) + pub fn cmp0(&mut self) -> Cmp0W { + Cmp0W::new(self, 1) } #[doc = "Bit 2 - Compare 1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cmp1(&mut self) -> CMP1_W<2> { - CMP1_W::new(self) + pub fn cmp1(&mut self) -> Cmp1W { + Cmp1W::new(self, 2) } #[doc = "Bit 3 - Capture 0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cap0(&mut self) -> CAP0_W<3> { - CAP0_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cap0(&mut self) -> Cap0W { + Cap0W::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [grp0_ien](index.html) module"] -pub struct GRP0_IEN_SPEC; -impl crate::RegisterSpec for GRP0_IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`grp0_ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Grp0IenSpec; +impl crate::RegisterSpec for Grp0IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [grp0_ien::R](R) reader structure"] -impl crate::Readable for GRP0_IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [grp0_ien::W](W) writer structure"] -impl crate::Writable for GRP0_IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`grp0_ien::R`](R) reader structure"] +impl crate::Readable for Grp0IenSpec {} +#[doc = "`write(|w| ..)` method takes [`grp0_ien::W`](W) writer structure"] +impl crate::Writable for Grp0IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GRP0_IEN to value 0"] -impl crate::Resettable for GRP0_IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Grp0IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_if.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_if.rs index 57e98dd..7c978f4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_if.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_if.rs @@ -1,125 +1,85 @@ #[doc = "Register `GRP0_IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `GRP0_IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OVF` reader - Overflow Interrupt Flag"] -pub type OVF_R = crate::BitReader; +pub type OvfR = crate::BitReader; #[doc = "Field `OVF` writer - Overflow Interrupt Flag"] -pub type OVF_W<'a, const O: u8> = crate::BitWriter<'a, u32, GRP0_IF_SPEC, bool, O>; +pub type OvfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CMP0` reader - Compare 0 Interrupt Flag"] -pub type CMP0_R = crate::BitReader; +pub type Cmp0R = crate::BitReader; #[doc = "Field `CMP0` writer - Compare 0 Interrupt Flag"] -pub type CMP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, GRP0_IF_SPEC, bool, O>; +pub type Cmp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CMP1` reader - Compare 1 Interrupt Flag"] -pub type CMP1_R = crate::BitReader; +pub type Cmp1R = crate::BitReader; #[doc = "Field `CMP1` writer - Compare 1 Interrupt Flag"] -pub type CMP1_W<'a, const O: u8> = crate::BitWriter<'a, u32, GRP0_IF_SPEC, bool, O>; +pub type Cmp1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CAP0` reader - Capture 0 Interrupt Flag"] -pub type CAP0_R = crate::BitReader; +pub type Cap0R = crate::BitReader; #[doc = "Field `CAP0` writer - Capture 0 Interrupt Flag"] -pub type CAP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, GRP0_IF_SPEC, bool, O>; +pub type Cap0W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] - pub fn ovf(&self) -> OVF_R { - OVF_R::new((self.bits & 1) != 0) + pub fn ovf(&self) -> OvfR { + OvfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Compare 0 Interrupt Flag"] #[inline(always)] - pub fn cmp0(&self) -> CMP0_R { - CMP0_R::new(((self.bits >> 1) & 1) != 0) + pub fn cmp0(&self) -> Cmp0R { + Cmp0R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Compare 1 Interrupt Flag"] #[inline(always)] - pub fn cmp1(&self) -> CMP1_R { - CMP1_R::new(((self.bits >> 2) & 1) != 0) + pub fn cmp1(&self) -> Cmp1R { + Cmp1R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Capture 0 Interrupt Flag"] #[inline(always)] - pub fn cap0(&self) -> CAP0_R { - CAP0_R::new(((self.bits >> 3) & 1) != 0) + pub fn cap0(&self) -> Cap0R { + Cap0R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ovf(&mut self) -> OVF_W<0> { - OVF_W::new(self) + pub fn ovf(&mut self) -> OvfW { + OvfW::new(self, 0) } #[doc = "Bit 1 - Compare 0 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cmp0(&mut self) -> CMP0_W<1> { - CMP0_W::new(self) + pub fn cmp0(&mut self) -> Cmp0W { + Cmp0W::new(self, 1) } #[doc = "Bit 2 - Compare 1 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cmp1(&mut self) -> CMP1_W<2> { - CMP1_W::new(self) + pub fn cmp1(&mut self) -> Cmp1W { + Cmp1W::new(self, 2) } #[doc = "Bit 3 - Capture 0 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cap0(&mut self) -> CAP0_W<3> { - CAP0_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cap0(&mut self) -> Cap0W { + Cap0W::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [grp0_if](index.html) module"] -pub struct GRP0_IF_SPEC; -impl crate::RegisterSpec for GRP0_IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_if::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`grp0_if::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Grp0IfSpec; +impl crate::RegisterSpec for Grp0IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [grp0_if::R](R) reader structure"] -impl crate::Readable for GRP0_IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [grp0_if::W](W) writer structure"] -impl crate::Writable for GRP0_IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`grp0_if::R`](R) reader structure"] +impl crate::Readable for Grp0IfSpec {} +#[doc = "`write(|w| ..)` method takes [`grp0_if::W`](W) writer structure"] +impl crate::Writable for Grp0IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GRP0_IF to value 0"] -impl crate::Resettable for GRP0_IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Grp0IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_syncbusy.rs index 477552b..f5c218c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/grp0_syncbusy.rs @@ -1,51 +1,36 @@ #[doc = "Register `GRP0_SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CTRL` reader - Sync busy for CTRL register"] -pub type CTRL_R = crate::BitReader; +pub type CtrlR = crate::BitReader; #[doc = "Field `CMP0VALUE` reader - Sync busy for CMP0VALUE register"] -pub type CMP0VALUE_R = crate::BitReader; +pub type Cmp0valueR = crate::BitReader; #[doc = "Field `CMP1VALUE` reader - Sync busy for CMP1VALUE register"] -pub type CMP1VALUE_R = crate::BitReader; +pub type Cmp1valueR = crate::BitReader; impl R { #[doc = "Bit 0 - Sync busy for CTRL register"] #[inline(always)] - pub fn ctrl(&self) -> CTRL_R { - CTRL_R::new((self.bits & 1) != 0) + pub fn ctrl(&self) -> CtrlR { + CtrlR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Sync busy for CMP0VALUE register"] #[inline(always)] - pub fn cmp0value(&self) -> CMP0VALUE_R { - CMP0VALUE_R::new(((self.bits >> 1) & 1) != 0) + pub fn cmp0value(&self) -> Cmp0valueR { + Cmp0valueR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Sync busy for CMP1VALUE register"] #[inline(always)] - pub fn cmp1value(&self) -> CMP1VALUE_R { - CMP1VALUE_R::new(((self.bits >> 2) & 1) != 0) + pub fn cmp1value(&self) -> Cmp1valueR { + Cmp1valueR::new(((self.bits >> 2) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [grp0_syncbusy](index.html) module"] -pub struct GRP0_SYNCBUSY_SPEC; -impl crate::RegisterSpec for GRP0_SYNCBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Grp0SyncbusySpec; +impl crate::RegisterSpec for Grp0SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [grp0_syncbusy::R](R) reader structure"] -impl crate::Readable for GRP0_SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`grp0_syncbusy::R`](R) reader structure"] +impl crate::Readable for Grp0SyncbusySpec {} #[doc = "`reset()` method sets GRP0_SYNCBUSY to value 0"] -impl crate::Resettable for GRP0_SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Grp0SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/ipversion.rs index d3ef76d..f36b122 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP VERSION"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP VERSION"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/lock.rs index 0d4e8b0..fcb67e2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Configuration Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "18294: Write to unlock SYSRTC lockable registers"] - UNLOCK = 18294, + Unlock = 18294, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Configuration Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unlock SYSRTC lockable registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Configuration Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/status.rs index 48df53e..3236958 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/status.rs @@ -1,78 +1,63 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RUNNING` reader - SYSRTC running status"] -pub type RUNNING_R = crate::BitReader; -#[doc = "Field `LOCKSTATUS` reader - Lock Status"] -pub type LOCKSTATUS_R = crate::BitReader; +pub type RunningR = crate::BitReader; #[doc = "Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCKSTATUS_A { +pub enum Lockstatus { #[doc = "0: SYSRTC registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: SYSRTC registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCKSTATUS_A) -> Self { + fn from(variant: Lockstatus) -> Self { variant as u8 != 0 } } -impl LOCKSTATUS_R { +#[doc = "Field `LOCKSTATUS` reader - Lock Status"] +pub type LockstatusR = crate::BitReader; +impl LockstatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCKSTATUS_A { + pub const fn variant(&self) -> Lockstatus { match self.bits { - false => LOCKSTATUS_A::UNLOCKED, - true => LOCKSTATUS_A::LOCKED, + false => Lockstatus::Unlocked, + true => Lockstatus::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "SYSRTC registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCKSTATUS_A::UNLOCKED + *self == Lockstatus::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "SYSRTC registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCKSTATUS_A::LOCKED + *self == Lockstatus::Locked } } impl R { #[doc = "Bit 0 - SYSRTC running status"] #[inline(always)] - pub fn running(&self) -> RUNNING_R { - RUNNING_R::new((self.bits & 1) != 0) + pub fn running(&self) -> RunningR { + RunningR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Lock Status"] #[inline(always)] - pub fn lockstatus(&self) -> LOCKSTATUS_R { - LOCKSTATUS_R::new(((self.bits >> 1) & 1) != 0) + pub fn lockstatus(&self) -> LockstatusR { + LockstatusR::new(((self.bits >> 1) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/swrst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/swrst.rs index afd978e..804eaff 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/swrst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/swrst.rs @@ -1,80 +1,40 @@ #[doc = "Register `SWRST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SWRST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SWRST` writer - Software reset command"] -pub type SWRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, SWRST_SPEC, bool, O>; +pub type SwrstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESETTING` reader - Software reset busy status"] -pub type RESETTING_R = crate::BitReader; +pub type ResettingR = crate::BitReader; impl R { #[doc = "Bit 1 - Software reset busy status"] #[inline(always)] - pub fn resetting(&self) -> RESETTING_R { - RESETTING_R::new(((self.bits >> 1) & 1) != 0) + pub fn resetting(&self) -> ResettingR { + ResettingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Software reset command"] #[inline(always)] #[must_use] - pub fn swrst(&mut self) -> SWRST_W<0> { - SWRST_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn swrst(&mut self) -> SwrstW { + SwrstW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swrst](index.html) module"] -pub struct SWRST_SPEC; -impl crate::RegisterSpec for SWRST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SwrstSpec; +impl crate::RegisterSpec for SwrstSpec { type Ux = u32; } -#[doc = "`read()` method returns [swrst::R](R) reader structure"] -impl crate::Readable for SWRST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [swrst::W](W) writer structure"] -impl crate::Writable for SWRST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`swrst::R`](R) reader structure"] +impl crate::Readable for SwrstSpec {} +#[doc = "`write(|w| ..)` method takes [`swrst::W`](W) writer structure"] +impl crate::Writable for SwrstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWRST to value 0"] -impl crate::Resettable for SWRST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SwrstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/syncbusy.rs index 333a182..a70066c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_ns/syncbusy.rs @@ -1,51 +1,36 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `START` reader - Sync busy for START bitfield"] -pub type START_R = crate::BitReader; +pub type StartR = crate::BitReader; #[doc = "Field `STOP` reader - Sync busy for STOP bitfield"] -pub type STOP_R = crate::BitReader; +pub type StopR = crate::BitReader; #[doc = "Field `CNT` reader - Sync busy for CNT bitfield"] -pub type CNT_R = crate::BitReader; +pub type CntR = crate::BitReader; impl R { #[doc = "Bit 0 - Sync busy for START bitfield"] #[inline(always)] - pub fn start(&self) -> START_R { - START_R::new((self.bits & 1) != 0) + pub fn start(&self) -> StartR { + StartR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Sync busy for STOP bitfield"] #[inline(always)] - pub fn stop(&self) -> STOP_R { - STOP_R::new(((self.bits >> 1) & 1) != 0) + pub fn stop(&self) -> StopR { + StopR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Sync busy for CNT bitfield"] #[inline(always)] - pub fn cnt(&self) -> CNT_R { - CNT_R::new(((self.bits >> 2) & 1) != 0) + pub fn cnt(&self) -> CntR { + CntR::new(((self.bits >> 2) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s.rs index 98ef475..8a3a542 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s.rs @@ -1,101 +1,199 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + swrst: Swrst, + cfg: Cfg, + cmd: Cmd, + status: Status, + cnt: Cnt, + syncbusy: Syncbusy, + lock: Lock, + _reserved9: [u8; 0x1c], + grp0_if: Grp0If, + grp0_ien: Grp0Ien, + grp0_ctrl: Grp0Ctrl, + grp0_cmp0value: Grp0Cmp0value, + grp0_cmp1value: Grp0Cmp1value, + grp0_cap0value: Grp0Cap0value, + grp0_syncbusy: Grp0Syncbusy, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub swrst: SWRST, + #[inline(always)] + pub const fn swrst(&self) -> &Swrst { + &self.swrst + } #[doc = "0x0c - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x10 - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x14 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x18 - No Description"] - pub cnt: CNT, + #[inline(always)] + pub const fn cnt(&self) -> &Cnt { + &self.cnt + } #[doc = "0x1c - No Description"] - pub syncbusy: SYNCBUSY, + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } #[doc = "0x20 - No Description"] - pub lock: LOCK, - _reserved9: [u8; 0x1c], + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x40 - No Description"] - pub grp0_if: GRP0_IF, + #[inline(always)] + pub const fn grp0_if(&self) -> &Grp0If { + &self.grp0_if + } #[doc = "0x44 - No Description"] - pub grp0_ien: GRP0_IEN, + #[inline(always)] + pub const fn grp0_ien(&self) -> &Grp0Ien { + &self.grp0_ien + } #[doc = "0x48 - No Description"] - pub grp0_ctrl: GRP0_CTRL, + #[inline(always)] + pub const fn grp0_ctrl(&self) -> &Grp0Ctrl { + &self.grp0_ctrl + } #[doc = "0x4c - No Description"] - pub grp0_cmp0value: GRP0_CMP0VALUE, + #[inline(always)] + pub const fn grp0_cmp0value(&self) -> &Grp0Cmp0value { + &self.grp0_cmp0value + } #[doc = "0x50 - No Description"] - pub grp0_cmp1value: GRP0_CMP1VALUE, + #[inline(always)] + pub const fn grp0_cmp1value(&self) -> &Grp0Cmp1value { + &self.grp0_cmp1value + } #[doc = "0x54 - No Description"] - pub grp0_cap0value: GRP0_CAP0VALUE, + #[inline(always)] + pub const fn grp0_cap0value(&self) -> &Grp0Cap0value { + &self.grp0_cap0value + } #[doc = "0x58 - No Description"] - pub grp0_syncbusy: GRP0_SYNCBUSY, + #[inline(always)] + pub const fn grp0_syncbusy(&self) -> &Grp0Syncbusy { + &self.grp0_syncbusy + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "SWRST (rw) register accessor: an alias for `Reg`"] -pub type SWRST = crate::Reg; +#[doc = "SWRST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swrst`] +module"] +#[doc(alias = "SWRST")] +pub type Swrst = crate::Reg; #[doc = "No Description"] pub mod swrst; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "CNT (rw) register accessor: an alias for `Reg`"] -pub type CNT = crate::Reg; +#[doc = "CNT (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnt`] +module"] +#[doc(alias = "CNT")] +pub type Cnt = crate::Reg; #[doc = "No Description"] pub mod cnt; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "No Description"] pub mod syncbusy; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "GRP0_IF (rw) register accessor: an alias for `Reg`"] -pub type GRP0_IF = crate::Reg; +#[doc = "GRP0_IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_if::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`grp0_if::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grp0_if`] +module"] +#[doc(alias = "GRP0_IF")] +pub type Grp0If = crate::Reg; #[doc = "No Description"] pub mod grp0_if; -#[doc = "GRP0_IEN (rw) register accessor: an alias for `Reg`"] -pub type GRP0_IEN = crate::Reg; +#[doc = "GRP0_IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`grp0_ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grp0_ien`] +module"] +#[doc(alias = "GRP0_IEN")] +pub type Grp0Ien = crate::Reg; #[doc = "No Description"] pub mod grp0_ien; -#[doc = "GRP0_CTRL (rw) register accessor: an alias for `Reg`"] -pub type GRP0_CTRL = crate::Reg; +#[doc = "GRP0_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`grp0_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grp0_ctrl`] +module"] +#[doc(alias = "GRP0_CTRL")] +pub type Grp0Ctrl = crate::Reg; #[doc = "No Description"] pub mod grp0_ctrl; -#[doc = "GRP0_CMP0VALUE (rw) register accessor: an alias for `Reg`"] -pub type GRP0_CMP0VALUE = crate::Reg; +#[doc = "GRP0_CMP0VALUE (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_cmp0value::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`grp0_cmp0value::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grp0_cmp0value`] +module"] +#[doc(alias = "GRP0_CMP0VALUE")] +pub type Grp0Cmp0value = crate::Reg; #[doc = "No Description"] pub mod grp0_cmp0value; -#[doc = "GRP0_CMP1VALUE (rw) register accessor: an alias for `Reg`"] -pub type GRP0_CMP1VALUE = crate::Reg; +#[doc = "GRP0_CMP1VALUE (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_cmp1value::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`grp0_cmp1value::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grp0_cmp1value`] +module"] +#[doc(alias = "GRP0_CMP1VALUE")] +pub type Grp0Cmp1value = crate::Reg; #[doc = "No Description"] pub mod grp0_cmp1value; -#[doc = "GRP0_CAP0VALUE (r) register accessor: an alias for `Reg`"] -pub type GRP0_CAP0VALUE = crate::Reg; +#[doc = "GRP0_CAP0VALUE (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_cap0value::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grp0_cap0value`] +module"] +#[doc(alias = "GRP0_CAP0VALUE")] +pub type Grp0Cap0value = crate::Reg; #[doc = "No Description"] pub mod grp0_cap0value; -#[doc = "GRP0_SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type GRP0_SYNCBUSY = crate::Reg; +#[doc = "GRP0_SYNCBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grp0_syncbusy`] +module"] +#[doc(alias = "GRP0_SYNCBUSY")] +pub type Grp0Syncbusy = crate::Reg; #[doc = "No Description"] pub mod grp0_syncbusy; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/cfg.rs index db5c4aa..be5e46a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/cfg.rs @@ -1,126 +1,89 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] -pub type DEBUGRUN_R = crate::BitReader; +pub type W = crate::W; #[doc = "Debug Mode Run Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DEBUGRUN_A { +pub enum Debugrun { #[doc = "0: SYSRTC is frozen in debug mode"] - DISABLE = 0, + Disable = 0, #[doc = "1: SYSRTC is running in debug mode"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DEBUGRUN_A) -> Self { + fn from(variant: Debugrun) -> Self { variant as u8 != 0 } } -impl DEBUGRUN_R { +#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] +pub type DebugrunR = crate::BitReader; +impl DebugrunR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DEBUGRUN_A { + pub const fn variant(&self) -> Debugrun { match self.bits { - false => DEBUGRUN_A::DISABLE, - true => DEBUGRUN_A::ENABLE, + false => Debugrun::Disable, + true => Debugrun::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "SYSRTC is frozen in debug mode"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == DEBUGRUN_A::DISABLE + *self == Debugrun::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "SYSRTC is running in debug mode"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == DEBUGRUN_A::ENABLE + *self == Debugrun::Enable } } #[doc = "Field `DEBUGRUN` writer - Debug Mode Run Enable"] -pub type DEBUGRUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DEBUGRUN_A, O>; -impl<'a, const O: u8> DEBUGRUN_W<'a, O> { +pub type DebugrunW<'a, REG> = crate::BitWriter<'a, REG, Debugrun>; +impl<'a, REG> DebugrunW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "SYSRTC is frozen in debug mode"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(DEBUGRUN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Debugrun::Disable) } #[doc = "SYSRTC is running in debug mode"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(DEBUGRUN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Debugrun::Enable) } } impl R { #[doc = "Bit 0 - Debug Mode Run Enable"] #[inline(always)] - pub fn debugrun(&self) -> DEBUGRUN_R { - DEBUGRUN_R::new((self.bits & 1) != 0) + pub fn debugrun(&self) -> DebugrunR { + DebugrunR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - Debug Mode Run Enable"] #[inline(always)] #[must_use] - pub fn debugrun(&mut self) -> DEBUGRUN_W<0> { - DEBUGRUN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn debugrun(&mut self) -> DebugrunW { + DebugrunW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/cmd.rs index 409faed..a498a0a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/cmd.rs @@ -1,60 +1,35 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` writer - Start SYSRTC"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STOP` writer - Stop SYSRTC"] -pub type STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StopW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Start SYSRTC"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Stop SYSRTC"] #[inline(always)] #[must_use] - pub fn stop(&mut self) -> STOP_W<1> { - STOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stop(&mut self) -> StopW { + StopW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/cnt.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/cnt.rs index 6e69c3d..4064743 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/cnt.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/cnt.rs @@ -1,80 +1,40 @@ #[doc = "Register `CNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CNT` reader - Counter Value"] -pub type CNT_R = crate::FieldReader; +pub type CntR = crate::FieldReader; #[doc = "Field `CNT` writer - Counter Value"] -pub type CNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CNT_SPEC, u32, u32, 32, O>; +pub type CntW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Counter Value"] #[inline(always)] - pub fn cnt(&self) -> CNT_R { - CNT_R::new(self.bits) + pub fn cnt(&self) -> CntR { + CntR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Counter Value"] #[inline(always)] #[must_use] - pub fn cnt(&mut self) -> CNT_W<0> { - CNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cnt(&mut self) -> CntW { + CntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](index.html) module"] -pub struct CNT_SPEC; -impl crate::RegisterSpec for CNT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CntSpec; +impl crate::RegisterSpec for CntSpec { type Ux = u32; } -#[doc = "`read()` method returns [cnt::R](R) reader structure"] -impl crate::Readable for CNT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnt::W](W) writer structure"] -impl crate::Writable for CNT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cnt::R`](R) reader structure"] +impl crate::Readable for CntSpec {} +#[doc = "`write(|w| ..)` method takes [`cnt::W`](W) writer structure"] +impl crate::Writable for CntSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNT to value 0"] -impl crate::Resettable for CNT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CntSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/en.rs index c9ce205..cd75ec1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - SYSRTC Enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - SYSRTC Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - SYSRTC Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - SYSRTC Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_cap0value.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_cap0value.rs index 2629121..cbbb55b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_cap0value.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_cap0value.rs @@ -1,37 +1,22 @@ #[doc = "Register `GRP0_CAP0VALUE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CAP0VALUE` reader - Capture 0 Value"] -pub type CAP0VALUE_R = crate::FieldReader; +pub type Cap0valueR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Capture 0 Value"] #[inline(always)] - pub fn cap0value(&self) -> CAP0VALUE_R { - CAP0VALUE_R::new(self.bits) + pub fn cap0value(&self) -> Cap0valueR { + Cap0valueR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [grp0_cap0value](index.html) module"] -pub struct GRP0_CAP0VALUE_SPEC; -impl crate::RegisterSpec for GRP0_CAP0VALUE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_cap0value::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Grp0Cap0valueSpec; +impl crate::RegisterSpec for Grp0Cap0valueSpec { type Ux = u32; } -#[doc = "`read()` method returns [grp0_cap0value::R](R) reader structure"] -impl crate::Readable for GRP0_CAP0VALUE_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`grp0_cap0value::R`](R) reader structure"] +impl crate::Readable for Grp0Cap0valueSpec {} #[doc = "`reset()` method sets GRP0_CAP0VALUE to value 0"] -impl crate::Resettable for GRP0_CAP0VALUE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Grp0Cap0valueSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_cmp0value.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_cmp0value.rs index b41874e..0d73be6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_cmp0value.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_cmp0value.rs @@ -1,81 +1,40 @@ #[doc = "Register `GRP0_CMP0VALUE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `GRP0_CMP0VALUE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CMP0VALUE` reader - Compare 0 Value"] -pub type CMP0VALUE_R = crate::FieldReader; +pub type Cmp0valueR = crate::FieldReader; #[doc = "Field `CMP0VALUE` writer - Compare 0 Value"] -pub type CMP0VALUE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, GRP0_CMP0VALUE_SPEC, u32, u32, 32, O>; +pub type Cmp0valueW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Compare 0 Value"] #[inline(always)] - pub fn cmp0value(&self) -> CMP0VALUE_R { - CMP0VALUE_R::new(self.bits) + pub fn cmp0value(&self) -> Cmp0valueR { + Cmp0valueR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Compare 0 Value"] #[inline(always)] #[must_use] - pub fn cmp0value(&mut self) -> CMP0VALUE_W<0> { - CMP0VALUE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp0value(&mut self) -> Cmp0valueW { + Cmp0valueW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [grp0_cmp0value](index.html) module"] -pub struct GRP0_CMP0VALUE_SPEC; -impl crate::RegisterSpec for GRP0_CMP0VALUE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_cmp0value::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`grp0_cmp0value::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Grp0Cmp0valueSpec; +impl crate::RegisterSpec for Grp0Cmp0valueSpec { type Ux = u32; } -#[doc = "`read()` method returns [grp0_cmp0value::R](R) reader structure"] -impl crate::Readable for GRP0_CMP0VALUE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [grp0_cmp0value::W](W) writer structure"] -impl crate::Writable for GRP0_CMP0VALUE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`grp0_cmp0value::R`](R) reader structure"] +impl crate::Readable for Grp0Cmp0valueSpec {} +#[doc = "`write(|w| ..)` method takes [`grp0_cmp0value::W`](W) writer structure"] +impl crate::Writable for Grp0Cmp0valueSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GRP0_CMP0VALUE to value 0"] -impl crate::Resettable for GRP0_CMP0VALUE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Grp0Cmp0valueSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_cmp1value.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_cmp1value.rs index cdd0898..1c30876 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_cmp1value.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_cmp1value.rs @@ -1,81 +1,40 @@ #[doc = "Register `GRP0_CMP1VALUE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `GRP0_CMP1VALUE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CMP1VALUE` reader - Compare 1 Value"] -pub type CMP1VALUE_R = crate::FieldReader; +pub type Cmp1valueR = crate::FieldReader; #[doc = "Field `CMP1VALUE` writer - Compare 1 Value"] -pub type CMP1VALUE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, GRP0_CMP1VALUE_SPEC, u32, u32, 32, O>; +pub type Cmp1valueW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Compare 1 Value"] #[inline(always)] - pub fn cmp1value(&self) -> CMP1VALUE_R { - CMP1VALUE_R::new(self.bits) + pub fn cmp1value(&self) -> Cmp1valueR { + Cmp1valueR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Compare 1 Value"] #[inline(always)] #[must_use] - pub fn cmp1value(&mut self) -> CMP1VALUE_W<0> { - CMP1VALUE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cmp1value(&mut self) -> Cmp1valueW { + Cmp1valueW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [grp0_cmp1value](index.html) module"] -pub struct GRP0_CMP1VALUE_SPEC; -impl crate::RegisterSpec for GRP0_CMP1VALUE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_cmp1value::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`grp0_cmp1value::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Grp0Cmp1valueSpec; +impl crate::RegisterSpec for Grp0Cmp1valueSpec { type Ux = u32; } -#[doc = "`read()` method returns [grp0_cmp1value::R](R) reader structure"] -impl crate::Readable for GRP0_CMP1VALUE_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [grp0_cmp1value::W](W) writer structure"] -impl crate::Writable for GRP0_CMP1VALUE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`grp0_cmp1value::R`](R) reader structure"] +impl crate::Readable for Grp0Cmp1valueSpec {} +#[doc = "`write(|w| ..)` method takes [`grp0_cmp1value::W`](W) writer structure"] +impl crate::Writable for Grp0Cmp1valueSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GRP0_CMP1VALUE to value 0"] -impl crate::Resettable for GRP0_CMP1VALUE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Grp0Cmp1valueSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_ctrl.rs index c570996..aca33e8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_ctrl.rs @@ -1,393 +1,374 @@ #[doc = "Register `GRP0_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `GRP0_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CMP0EN` reader - Compare 0 Enable"] -pub type CMP0EN_R = crate::BitReader; +pub type Cmp0enR = crate::BitReader; #[doc = "Field `CMP0EN` writer - Compare 0 Enable"] -pub type CMP0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, GRP0_CTRL_SPEC, bool, O>; +pub type Cmp0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CMP1EN` reader - Compare 1 Enable"] -pub type CMP1EN_R = crate::BitReader; +pub type Cmp1enR = crate::BitReader; #[doc = "Field `CMP1EN` writer - Compare 1 Enable"] -pub type CMP1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, GRP0_CTRL_SPEC, bool, O>; +pub type Cmp1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CAP0EN` reader - Capture 0 Enable"] -pub type CAP0EN_R = crate::BitReader; +pub type Cap0enR = crate::BitReader; #[doc = "Field `CAP0EN` writer - Capture 0 Enable"] -pub type CAP0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, GRP0_CTRL_SPEC, bool, O>; -#[doc = "Field `CMP0CMOA` reader - Compare 0 Compare Match Output Action"] -pub type CMP0CMOA_R = crate::FieldReader; +pub type Cap0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare 0 Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMP0CMOA_A { +pub enum Cmp0cmoa { #[doc = "0: Cleared on the next cycle"] - CLEAR = 0, + Clear = 0, #[doc = "1: Set on the next cycle"] - SET = 1, + Set = 1, #[doc = "2: Set on the next cycle, cleared on the cycle after"] - PULSE = 2, + Pulse = 2, #[doc = "3: Inverted on the next cycle"] - TOGGLE = 3, + Toggle = 3, #[doc = "4: Export this channel's CMP IF"] - CMPIF = 4, + Cmpif = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMP0CMOA_A) -> Self { + fn from(variant: Cmp0cmoa) -> Self { variant as _ } } -impl CMP0CMOA_R { +impl crate::FieldSpec for Cmp0cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmp0cmoa {} +#[doc = "Field `CMP0CMOA` reader - Compare 0 Compare Match Output Action"] +pub type Cmp0cmoaR = crate::FieldReader; +impl Cmp0cmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CMP0CMOA_A::CLEAR), - 1 => Some(CMP0CMOA_A::SET), - 2 => Some(CMP0CMOA_A::PULSE), - 3 => Some(CMP0CMOA_A::TOGGLE), - 4 => Some(CMP0CMOA_A::CMPIF), + 0 => Some(Cmp0cmoa::Clear), + 1 => Some(Cmp0cmoa::Set), + 2 => Some(Cmp0cmoa::Pulse), + 3 => Some(Cmp0cmoa::Toggle), + 4 => Some(Cmp0cmoa::Cmpif), _ => None, } } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Cleared on the next cycle"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMP0CMOA_A::CLEAR + *self == Cmp0cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set on the next cycle"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMP0CMOA_A::SET + *self == Cmp0cmoa::Set } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Set on the next cycle, cleared on the cycle after"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == CMP0CMOA_A::PULSE + *self == Cmp0cmoa::Pulse } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Inverted on the next cycle"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMP0CMOA_A::TOGGLE + *self == Cmp0cmoa::Toggle } - #[doc = "Checks if the value of the field is `CMPIF`"] + #[doc = "Export this channel's CMP IF"] #[inline(always)] pub fn is_cmpif(&self) -> bool { - *self == CMP0CMOA_A::CMPIF + *self == Cmp0cmoa::Cmpif } } #[doc = "Field `CMP0CMOA` writer - Compare 0 Compare Match Output Action"] -pub type CMP0CMOA_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, GRP0_CTRL_SPEC, u8, CMP0CMOA_A, 3, O>; -impl<'a, const O: u8> CMP0CMOA_W<'a, O> { +pub type Cmp0cmoaW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cmp0cmoa>; +impl<'a, REG> Cmp0cmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Cleared on the next cycle"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMP0CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmp0cmoa::Clear) } #[doc = "Set on the next cycle"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMP0CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmp0cmoa::Set) } #[doc = "Set on the next cycle, cleared on the cycle after"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(CMP0CMOA_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Cmp0cmoa::Pulse) } #[doc = "Inverted on the next cycle"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMP0CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmp0cmoa::Toggle) } #[doc = "Export this channel's CMP IF"] #[inline(always)] - pub fn cmpif(self) -> &'a mut W { - self.variant(CMP0CMOA_A::CMPIF) + pub fn cmpif(self) -> &'a mut crate::W { + self.variant(Cmp0cmoa::Cmpif) } } -#[doc = "Field `CMP1CMOA` reader - Compare 1 Compare Match Output Action"] -pub type CMP1CMOA_R = crate::FieldReader; #[doc = "Compare 1 Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMP1CMOA_A { +pub enum Cmp1cmoa { #[doc = "0: Cleared on the next cycle"] - CLEAR = 0, + Clear = 0, #[doc = "1: Set on the next cycle"] - SET = 1, + Set = 1, #[doc = "2: Set on the next cycle, cleared on the cycle after"] - PULSE = 2, + Pulse = 2, #[doc = "3: Inverted on the next cycle"] - TOGGLE = 3, + Toggle = 3, #[doc = "4: Export this channel's CMP IF"] - CMPIF = 4, + Cmpif = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMP1CMOA_A) -> Self { + fn from(variant: Cmp1cmoa) -> Self { variant as _ } } -impl CMP1CMOA_R { +impl crate::FieldSpec for Cmp1cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmp1cmoa {} +#[doc = "Field `CMP1CMOA` reader - Compare 1 Compare Match Output Action"] +pub type Cmp1cmoaR = crate::FieldReader; +impl Cmp1cmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CMP1CMOA_A::CLEAR), - 1 => Some(CMP1CMOA_A::SET), - 2 => Some(CMP1CMOA_A::PULSE), - 3 => Some(CMP1CMOA_A::TOGGLE), - 4 => Some(CMP1CMOA_A::CMPIF), + 0 => Some(Cmp1cmoa::Clear), + 1 => Some(Cmp1cmoa::Set), + 2 => Some(Cmp1cmoa::Pulse), + 3 => Some(Cmp1cmoa::Toggle), + 4 => Some(Cmp1cmoa::Cmpif), _ => None, } } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Cleared on the next cycle"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMP1CMOA_A::CLEAR + *self == Cmp1cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set on the next cycle"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMP1CMOA_A::SET + *self == Cmp1cmoa::Set } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Set on the next cycle, cleared on the cycle after"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == CMP1CMOA_A::PULSE + *self == Cmp1cmoa::Pulse } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Inverted on the next cycle"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMP1CMOA_A::TOGGLE + *self == Cmp1cmoa::Toggle } - #[doc = "Checks if the value of the field is `CMPIF`"] + #[doc = "Export this channel's CMP IF"] #[inline(always)] pub fn is_cmpif(&self) -> bool { - *self == CMP1CMOA_A::CMPIF + *self == Cmp1cmoa::Cmpif } } #[doc = "Field `CMP1CMOA` writer - Compare 1 Compare Match Output Action"] -pub type CMP1CMOA_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, GRP0_CTRL_SPEC, u8, CMP1CMOA_A, 3, O>; -impl<'a, const O: u8> CMP1CMOA_W<'a, O> { +pub type Cmp1cmoaW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cmp1cmoa>; +impl<'a, REG> Cmp1cmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Cleared on the next cycle"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMP1CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmp1cmoa::Clear) } #[doc = "Set on the next cycle"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMP1CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmp1cmoa::Set) } #[doc = "Set on the next cycle, cleared on the cycle after"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(CMP1CMOA_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Cmp1cmoa::Pulse) } #[doc = "Inverted on the next cycle"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMP1CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmp1cmoa::Toggle) } #[doc = "Export this channel's CMP IF"] #[inline(always)] - pub fn cmpif(self) -> &'a mut W { - self.variant(CMP1CMOA_A::CMPIF) + pub fn cmpif(self) -> &'a mut crate::W { + self.variant(Cmp1cmoa::Cmpif) } } -#[doc = "Field `CAP0EDGE` reader - Capture 0 Edge Select"] -pub type CAP0EDGE_R = crate::FieldReader; #[doc = "Capture 0 Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CAP0EDGE_A { +pub enum Cap0edge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CAP0EDGE_A) -> Self { + fn from(variant: Cap0edge) -> Self { variant as _ } } -impl CAP0EDGE_R { +impl crate::FieldSpec for Cap0edge { + type Ux = u8; +} +impl crate::IsEnum for Cap0edge {} +#[doc = "Field `CAP0EDGE` reader - Capture 0 Edge Select"] +pub type Cap0edgeR = crate::FieldReader; +impl Cap0edgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CAP0EDGE_A::RISING), - 1 => Some(CAP0EDGE_A::FALLING), - 2 => Some(CAP0EDGE_A::BOTH), + 0 => Some(Cap0edge::Rising), + 1 => Some(Cap0edge::Falling), + 2 => Some(Cap0edge::Both), _ => None, } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == CAP0EDGE_A::RISING + *self == Cap0edge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == CAP0EDGE_A::FALLING + *self == Cap0edge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == CAP0EDGE_A::BOTH + *self == Cap0edge::Both } } #[doc = "Field `CAP0EDGE` writer - Capture 0 Edge Select"] -pub type CAP0EDGE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, GRP0_CTRL_SPEC, u8, CAP0EDGE_A, 2, O>; -impl<'a, const O: u8> CAP0EDGE_W<'a, O> { +pub type Cap0edgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cap0edge>; +impl<'a, REG> Cap0edgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(CAP0EDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Cap0edge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(CAP0EDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Cap0edge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(CAP0EDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Cap0edge::Both) } } impl R { #[doc = "Bit 0 - Compare 0 Enable"] #[inline(always)] - pub fn cmp0en(&self) -> CMP0EN_R { - CMP0EN_R::new((self.bits & 1) != 0) + pub fn cmp0en(&self) -> Cmp0enR { + Cmp0enR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Compare 1 Enable"] #[inline(always)] - pub fn cmp1en(&self) -> CMP1EN_R { - CMP1EN_R::new(((self.bits >> 1) & 1) != 0) + pub fn cmp1en(&self) -> Cmp1enR { + Cmp1enR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Capture 0 Enable"] #[inline(always)] - pub fn cap0en(&self) -> CAP0EN_R { - CAP0EN_R::new(((self.bits >> 2) & 1) != 0) + pub fn cap0en(&self) -> Cap0enR { + Cap0enR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 3:5 - Compare 0 Compare Match Output Action"] #[inline(always)] - pub fn cmp0cmoa(&self) -> CMP0CMOA_R { - CMP0CMOA_R::new(((self.bits >> 3) & 7) as u8) + pub fn cmp0cmoa(&self) -> Cmp0cmoaR { + Cmp0cmoaR::new(((self.bits >> 3) & 7) as u8) } #[doc = "Bits 6:8 - Compare 1 Compare Match Output Action"] #[inline(always)] - pub fn cmp1cmoa(&self) -> CMP1CMOA_R { - CMP1CMOA_R::new(((self.bits >> 6) & 7) as u8) + pub fn cmp1cmoa(&self) -> Cmp1cmoaR { + Cmp1cmoaR::new(((self.bits >> 6) & 7) as u8) } #[doc = "Bits 9:10 - Capture 0 Edge Select"] #[inline(always)] - pub fn cap0edge(&self) -> CAP0EDGE_R { - CAP0EDGE_R::new(((self.bits >> 9) & 3) as u8) + pub fn cap0edge(&self) -> Cap0edgeR { + Cap0edgeR::new(((self.bits >> 9) & 3) as u8) } } impl W { #[doc = "Bit 0 - Compare 0 Enable"] #[inline(always)] #[must_use] - pub fn cmp0en(&mut self) -> CMP0EN_W<0> { - CMP0EN_W::new(self) + pub fn cmp0en(&mut self) -> Cmp0enW { + Cmp0enW::new(self, 0) } #[doc = "Bit 1 - Compare 1 Enable"] #[inline(always)] #[must_use] - pub fn cmp1en(&mut self) -> CMP1EN_W<1> { - CMP1EN_W::new(self) + pub fn cmp1en(&mut self) -> Cmp1enW { + Cmp1enW::new(self, 1) } #[doc = "Bit 2 - Capture 0 Enable"] #[inline(always)] #[must_use] - pub fn cap0en(&mut self) -> CAP0EN_W<2> { - CAP0EN_W::new(self) + pub fn cap0en(&mut self) -> Cap0enW { + Cap0enW::new(self, 2) } #[doc = "Bits 3:5 - Compare 0 Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmp0cmoa(&mut self) -> CMP0CMOA_W<3> { - CMP0CMOA_W::new(self) + pub fn cmp0cmoa(&mut self) -> Cmp0cmoaW { + Cmp0cmoaW::new(self, 3) } #[doc = "Bits 6:8 - Compare 1 Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmp1cmoa(&mut self) -> CMP1CMOA_W<6> { - CMP1CMOA_W::new(self) + pub fn cmp1cmoa(&mut self) -> Cmp1cmoaW { + Cmp1cmoaW::new(self, 6) } #[doc = "Bits 9:10 - Capture 0 Edge Select"] #[inline(always)] #[must_use] - pub fn cap0edge(&mut self) -> CAP0EDGE_W<9> { - CAP0EDGE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cap0edge(&mut self) -> Cap0edgeW { + Cap0edgeW::new(self, 9) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [grp0_ctrl](index.html) module"] -pub struct GRP0_CTRL_SPEC; -impl crate::RegisterSpec for GRP0_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`grp0_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Grp0CtrlSpec; +impl crate::RegisterSpec for Grp0CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [grp0_ctrl::R](R) reader structure"] -impl crate::Readable for GRP0_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [grp0_ctrl::W](W) writer structure"] -impl crate::Writable for GRP0_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`grp0_ctrl::R`](R) reader structure"] +impl crate::Readable for Grp0CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`grp0_ctrl::W`](W) writer structure"] +impl crate::Writable for Grp0CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GRP0_CTRL to value 0"] -impl crate::Resettable for GRP0_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Grp0CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_ien.rs index 3d45f36..8174624 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_ien.rs @@ -1,125 +1,85 @@ #[doc = "Register `GRP0_IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `GRP0_IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OVF` reader - Overflow Interrupt Enable"] -pub type OVF_R = crate::BitReader; +pub type OvfR = crate::BitReader; #[doc = "Field `OVF` writer - Overflow Interrupt Enable"] -pub type OVF_W<'a, const O: u8> = crate::BitWriter<'a, u32, GRP0_IEN_SPEC, bool, O>; +pub type OvfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CMP0` reader - Compare 0 Interrupt Enable"] -pub type CMP0_R = crate::BitReader; +pub type Cmp0R = crate::BitReader; #[doc = "Field `CMP0` writer - Compare 0 Interrupt Enable"] -pub type CMP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, GRP0_IEN_SPEC, bool, O>; +pub type Cmp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CMP1` reader - Compare 1 Interrupt Enable"] -pub type CMP1_R = crate::BitReader; +pub type Cmp1R = crate::BitReader; #[doc = "Field `CMP1` writer - Compare 1 Interrupt Enable"] -pub type CMP1_W<'a, const O: u8> = crate::BitWriter<'a, u32, GRP0_IEN_SPEC, bool, O>; +pub type Cmp1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CAP0` reader - Capture 0 Interrupt Enable"] -pub type CAP0_R = crate::BitReader; +pub type Cap0R = crate::BitReader; #[doc = "Field `CAP0` writer - Capture 0 Interrupt Enable"] -pub type CAP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, GRP0_IEN_SPEC, bool, O>; +pub type Cap0W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Enable"] #[inline(always)] - pub fn ovf(&self) -> OVF_R { - OVF_R::new((self.bits & 1) != 0) + pub fn ovf(&self) -> OvfR { + OvfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Compare 0 Interrupt Enable"] #[inline(always)] - pub fn cmp0(&self) -> CMP0_R { - CMP0_R::new(((self.bits >> 1) & 1) != 0) + pub fn cmp0(&self) -> Cmp0R { + Cmp0R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Compare 1 Interrupt Enable"] #[inline(always)] - pub fn cmp1(&self) -> CMP1_R { - CMP1_R::new(((self.bits >> 2) & 1) != 0) + pub fn cmp1(&self) -> Cmp1R { + Cmp1R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Capture 0 Interrupt Enable"] #[inline(always)] - pub fn cap0(&self) -> CAP0_R { - CAP0_R::new(((self.bits >> 3) & 1) != 0) + pub fn cap0(&self) -> Cap0R { + Cap0R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ovf(&mut self) -> OVF_W<0> { - OVF_W::new(self) + pub fn ovf(&mut self) -> OvfW { + OvfW::new(self, 0) } #[doc = "Bit 1 - Compare 0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cmp0(&mut self) -> CMP0_W<1> { - CMP0_W::new(self) + pub fn cmp0(&mut self) -> Cmp0W { + Cmp0W::new(self, 1) } #[doc = "Bit 2 - Compare 1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cmp1(&mut self) -> CMP1_W<2> { - CMP1_W::new(self) + pub fn cmp1(&mut self) -> Cmp1W { + Cmp1W::new(self, 2) } #[doc = "Bit 3 - Capture 0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cap0(&mut self) -> CAP0_W<3> { - CAP0_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cap0(&mut self) -> Cap0W { + Cap0W::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [grp0_ien](index.html) module"] -pub struct GRP0_IEN_SPEC; -impl crate::RegisterSpec for GRP0_IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`grp0_ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Grp0IenSpec; +impl crate::RegisterSpec for Grp0IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [grp0_ien::R](R) reader structure"] -impl crate::Readable for GRP0_IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [grp0_ien::W](W) writer structure"] -impl crate::Writable for GRP0_IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`grp0_ien::R`](R) reader structure"] +impl crate::Readable for Grp0IenSpec {} +#[doc = "`write(|w| ..)` method takes [`grp0_ien::W`](W) writer structure"] +impl crate::Writable for Grp0IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GRP0_IEN to value 0"] -impl crate::Resettable for GRP0_IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Grp0IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_if.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_if.rs index 57e98dd..7c978f4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_if.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_if.rs @@ -1,125 +1,85 @@ #[doc = "Register `GRP0_IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `GRP0_IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OVF` reader - Overflow Interrupt Flag"] -pub type OVF_R = crate::BitReader; +pub type OvfR = crate::BitReader; #[doc = "Field `OVF` writer - Overflow Interrupt Flag"] -pub type OVF_W<'a, const O: u8> = crate::BitWriter<'a, u32, GRP0_IF_SPEC, bool, O>; +pub type OvfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CMP0` reader - Compare 0 Interrupt Flag"] -pub type CMP0_R = crate::BitReader; +pub type Cmp0R = crate::BitReader; #[doc = "Field `CMP0` writer - Compare 0 Interrupt Flag"] -pub type CMP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, GRP0_IF_SPEC, bool, O>; +pub type Cmp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CMP1` reader - Compare 1 Interrupt Flag"] -pub type CMP1_R = crate::BitReader; +pub type Cmp1R = crate::BitReader; #[doc = "Field `CMP1` writer - Compare 1 Interrupt Flag"] -pub type CMP1_W<'a, const O: u8> = crate::BitWriter<'a, u32, GRP0_IF_SPEC, bool, O>; +pub type Cmp1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CAP0` reader - Capture 0 Interrupt Flag"] -pub type CAP0_R = crate::BitReader; +pub type Cap0R = crate::BitReader; #[doc = "Field `CAP0` writer - Capture 0 Interrupt Flag"] -pub type CAP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, GRP0_IF_SPEC, bool, O>; +pub type Cap0W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] - pub fn ovf(&self) -> OVF_R { - OVF_R::new((self.bits & 1) != 0) + pub fn ovf(&self) -> OvfR { + OvfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Compare 0 Interrupt Flag"] #[inline(always)] - pub fn cmp0(&self) -> CMP0_R { - CMP0_R::new(((self.bits >> 1) & 1) != 0) + pub fn cmp0(&self) -> Cmp0R { + Cmp0R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Compare 1 Interrupt Flag"] #[inline(always)] - pub fn cmp1(&self) -> CMP1_R { - CMP1_R::new(((self.bits >> 2) & 1) != 0) + pub fn cmp1(&self) -> Cmp1R { + Cmp1R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Capture 0 Interrupt Flag"] #[inline(always)] - pub fn cap0(&self) -> CAP0_R { - CAP0_R::new(((self.bits >> 3) & 1) != 0) + pub fn cap0(&self) -> Cap0R { + Cap0R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ovf(&mut self) -> OVF_W<0> { - OVF_W::new(self) + pub fn ovf(&mut self) -> OvfW { + OvfW::new(self, 0) } #[doc = "Bit 1 - Compare 0 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cmp0(&mut self) -> CMP0_W<1> { - CMP0_W::new(self) + pub fn cmp0(&mut self) -> Cmp0W { + Cmp0W::new(self, 1) } #[doc = "Bit 2 - Compare 1 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cmp1(&mut self) -> CMP1_W<2> { - CMP1_W::new(self) + pub fn cmp1(&mut self) -> Cmp1W { + Cmp1W::new(self, 2) } #[doc = "Bit 3 - Capture 0 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cap0(&mut self) -> CAP0_W<3> { - CAP0_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cap0(&mut self) -> Cap0W { + Cap0W::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [grp0_if](index.html) module"] -pub struct GRP0_IF_SPEC; -impl crate::RegisterSpec for GRP0_IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_if::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`grp0_if::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Grp0IfSpec; +impl crate::RegisterSpec for Grp0IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [grp0_if::R](R) reader structure"] -impl crate::Readable for GRP0_IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [grp0_if::W](W) writer structure"] -impl crate::Writable for GRP0_IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`grp0_if::R`](R) reader structure"] +impl crate::Readable for Grp0IfSpec {} +#[doc = "`write(|w| ..)` method takes [`grp0_if::W`](W) writer structure"] +impl crate::Writable for Grp0IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GRP0_IF to value 0"] -impl crate::Resettable for GRP0_IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Grp0IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_syncbusy.rs index 477552b..f5c218c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/grp0_syncbusy.rs @@ -1,51 +1,36 @@ #[doc = "Register `GRP0_SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CTRL` reader - Sync busy for CTRL register"] -pub type CTRL_R = crate::BitReader; +pub type CtrlR = crate::BitReader; #[doc = "Field `CMP0VALUE` reader - Sync busy for CMP0VALUE register"] -pub type CMP0VALUE_R = crate::BitReader; +pub type Cmp0valueR = crate::BitReader; #[doc = "Field `CMP1VALUE` reader - Sync busy for CMP1VALUE register"] -pub type CMP1VALUE_R = crate::BitReader; +pub type Cmp1valueR = crate::BitReader; impl R { #[doc = "Bit 0 - Sync busy for CTRL register"] #[inline(always)] - pub fn ctrl(&self) -> CTRL_R { - CTRL_R::new((self.bits & 1) != 0) + pub fn ctrl(&self) -> CtrlR { + CtrlR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Sync busy for CMP0VALUE register"] #[inline(always)] - pub fn cmp0value(&self) -> CMP0VALUE_R { - CMP0VALUE_R::new(((self.bits >> 1) & 1) != 0) + pub fn cmp0value(&self) -> Cmp0valueR { + Cmp0valueR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Sync busy for CMP1VALUE register"] #[inline(always)] - pub fn cmp1value(&self) -> CMP1VALUE_R { - CMP1VALUE_R::new(((self.bits >> 2) & 1) != 0) + pub fn cmp1value(&self) -> Cmp1valueR { + Cmp1valueR::new(((self.bits >> 2) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [grp0_syncbusy](index.html) module"] -pub struct GRP0_SYNCBUSY_SPEC; -impl crate::RegisterSpec for GRP0_SYNCBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`grp0_syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Grp0SyncbusySpec; +impl crate::RegisterSpec for Grp0SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [grp0_syncbusy::R](R) reader structure"] -impl crate::Readable for GRP0_SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`grp0_syncbusy::R`](R) reader structure"] +impl crate::Readable for Grp0SyncbusySpec {} #[doc = "`reset()` method sets GRP0_SYNCBUSY to value 0"] -impl crate::Resettable for GRP0_SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Grp0SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/ipversion.rs index d3ef76d..f36b122 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP VERSION"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP VERSION"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/lock.rs index 0d4e8b0..fcb67e2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Configuration Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "18294: Write to unlock SYSRTC lockable registers"] - UNLOCK = 18294, + Unlock = 18294, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Configuration Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unlock SYSRTC lockable registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Configuration Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/status.rs index 48df53e..3236958 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/status.rs @@ -1,78 +1,63 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RUNNING` reader - SYSRTC running status"] -pub type RUNNING_R = crate::BitReader; -#[doc = "Field `LOCKSTATUS` reader - Lock Status"] -pub type LOCKSTATUS_R = crate::BitReader; +pub type RunningR = crate::BitReader; #[doc = "Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCKSTATUS_A { +pub enum Lockstatus { #[doc = "0: SYSRTC registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: SYSRTC registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCKSTATUS_A) -> Self { + fn from(variant: Lockstatus) -> Self { variant as u8 != 0 } } -impl LOCKSTATUS_R { +#[doc = "Field `LOCKSTATUS` reader - Lock Status"] +pub type LockstatusR = crate::BitReader; +impl LockstatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCKSTATUS_A { + pub const fn variant(&self) -> Lockstatus { match self.bits { - false => LOCKSTATUS_A::UNLOCKED, - true => LOCKSTATUS_A::LOCKED, + false => Lockstatus::Unlocked, + true => Lockstatus::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "SYSRTC registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCKSTATUS_A::UNLOCKED + *self == Lockstatus::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "SYSRTC registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCKSTATUS_A::LOCKED + *self == Lockstatus::Locked } } impl R { #[doc = "Bit 0 - SYSRTC running status"] #[inline(always)] - pub fn running(&self) -> RUNNING_R { - RUNNING_R::new((self.bits & 1) != 0) + pub fn running(&self) -> RunningR { + RunningR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Lock Status"] #[inline(always)] - pub fn lockstatus(&self) -> LOCKSTATUS_R { - LOCKSTATUS_R::new(((self.bits >> 1) & 1) != 0) + pub fn lockstatus(&self) -> LockstatusR { + LockstatusR::new(((self.bits >> 1) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/swrst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/swrst.rs index afd978e..804eaff 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/swrst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/swrst.rs @@ -1,80 +1,40 @@ #[doc = "Register `SWRST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SWRST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SWRST` writer - Software reset command"] -pub type SWRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, SWRST_SPEC, bool, O>; +pub type SwrstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESETTING` reader - Software reset busy status"] -pub type RESETTING_R = crate::BitReader; +pub type ResettingR = crate::BitReader; impl R { #[doc = "Bit 1 - Software reset busy status"] #[inline(always)] - pub fn resetting(&self) -> RESETTING_R { - RESETTING_R::new(((self.bits >> 1) & 1) != 0) + pub fn resetting(&self) -> ResettingR { + ResettingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Software reset command"] #[inline(always)] #[must_use] - pub fn swrst(&mut self) -> SWRST_W<0> { - SWRST_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn swrst(&mut self) -> SwrstW { + SwrstW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swrst](index.html) module"] -pub struct SWRST_SPEC; -impl crate::RegisterSpec for SWRST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SwrstSpec; +impl crate::RegisterSpec for SwrstSpec { type Ux = u32; } -#[doc = "`read()` method returns [swrst::R](R) reader structure"] -impl crate::Readable for SWRST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [swrst::W](W) writer structure"] -impl crate::Writable for SWRST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`swrst::R`](R) reader structure"] +impl crate::Readable for SwrstSpec {} +#[doc = "`write(|w| ..)` method takes [`swrst::W`](W) writer structure"] +impl crate::Writable for SwrstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWRST to value 0"] -impl crate::Resettable for SWRST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SwrstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/syncbusy.rs index 333a182..a70066c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/sysrtc0_s/syncbusy.rs @@ -1,51 +1,36 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `START` reader - Sync busy for START bitfield"] -pub type START_R = crate::BitReader; +pub type StartR = crate::BitReader; #[doc = "Field `STOP` reader - Sync busy for STOP bitfield"] -pub type STOP_R = crate::BitReader; +pub type StopR = crate::BitReader; #[doc = "Field `CNT` reader - Sync busy for CNT bitfield"] -pub type CNT_R = crate::BitReader; +pub type CntR = crate::BitReader; impl R { #[doc = "Bit 0 - Sync busy for START bitfield"] #[inline(always)] - pub fn start(&self) -> START_R { - START_R::new((self.bits & 1) != 0) + pub fn start(&self) -> StartR { + StartR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Sync busy for STOP bitfield"] #[inline(always)] - pub fn stop(&self) -> STOP_R { - STOP_R::new(((self.bits >> 1) & 1) != 0) + pub fn stop(&self) -> StopR { + StopR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Sync busy for CNT bitfield"] #[inline(always)] - pub fn cnt(&self) -> CNT_R { - CNT_R::new(((self.bits >> 2) & 1) != 0) + pub fn cnt(&self) -> CntR { + CntR::new(((self.bits >> 2) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns.rs index 50b1dd4..e4e8a9b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns.rs @@ -1,240 +1,470 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + cfg: Cfg, + ctrl: Ctrl, + cmd: Cmd, + status: Status, + if_: If, + ien: Ien, + top: Top, + topb: Topb, + cnt: Cnt, + _reserved10: [u8; 0x04], + lock: Lock, + en: En, + _reserved12: [u8; 0x2c], + cc0_cfg: Cc0Cfg, + cc0_ctrl: Cc0Ctrl, + cc0_oc: Cc0Oc, + _reserved15: [u8; 0x04], + cc0_ocb: Cc0Ocb, + cc0_icf: Cc0Icf, + cc0_icof: Cc0Icof, + _reserved18: [u8; 0x04], + cc1_cfg: Cc1Cfg, + cc1_ctrl: Cc1Ctrl, + cc1_oc: Cc1Oc, + _reserved21: [u8; 0x04], + cc1_ocb: Cc1Ocb, + cc1_icf: Cc1Icf, + cc1_icof: Cc1Icof, + _reserved24: [u8; 0x04], + cc2_cfg: Cc2Cfg, + cc2_ctrl: Cc2Ctrl, + cc2_oc: Cc2Oc, + _reserved27: [u8; 0x04], + cc2_ocb: Cc2Ocb, + cc2_icf: Cc2Icf, + cc2_icof: Cc2Icof, + _reserved30: [u8; 0x24], + dtcfg: Dtcfg, + dttimecfg: Dttimecfg, + dtfcfg: Dtfcfg, + dtctrl: Dtctrl, + dtogen: Dtogen, + dtfault: Dtfault, + dtfaultc: Dtfaultc, + dtlock: Dtlock, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x08 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x0c - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x10 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x14 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x18 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x1c - No Description"] - pub top: TOP, + #[inline(always)] + pub const fn top(&self) -> &Top { + &self.top + } #[doc = "0x20 - No Description"] - pub topb: TOPB, + #[inline(always)] + pub const fn topb(&self) -> &Topb { + &self.topb + } #[doc = "0x24 - No Description"] - pub cnt: CNT, - _reserved10: [u8; 0x04], + #[inline(always)] + pub const fn cnt(&self) -> &Cnt { + &self.cnt + } #[doc = "0x2c - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x30 - No Description"] - pub en: EN, - _reserved12: [u8; 0x2c], + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x60 - No Description"] - pub cc0_cfg: CC0_CFG, + #[inline(always)] + pub const fn cc0_cfg(&self) -> &Cc0Cfg { + &self.cc0_cfg + } #[doc = "0x64 - No Description"] - pub cc0_ctrl: CC0_CTRL, + #[inline(always)] + pub const fn cc0_ctrl(&self) -> &Cc0Ctrl { + &self.cc0_ctrl + } #[doc = "0x68 - No Description"] - pub cc0_oc: CC0_OC, - _reserved15: [u8; 0x04], + #[inline(always)] + pub const fn cc0_oc(&self) -> &Cc0Oc { + &self.cc0_oc + } #[doc = "0x70 - No Description"] - pub cc0_ocb: CC0_OCB, + #[inline(always)] + pub const fn cc0_ocb(&self) -> &Cc0Ocb { + &self.cc0_ocb + } #[doc = "0x74 - No Description"] - pub cc0_icf: CC0_ICF, + #[inline(always)] + pub const fn cc0_icf(&self) -> &Cc0Icf { + &self.cc0_icf + } #[doc = "0x78 - No Description"] - pub cc0_icof: CC0_ICOF, - _reserved18: [u8; 0x04], + #[inline(always)] + pub const fn cc0_icof(&self) -> &Cc0Icof { + &self.cc0_icof + } #[doc = "0x80 - No Description"] - pub cc1_cfg: CC1_CFG, + #[inline(always)] + pub const fn cc1_cfg(&self) -> &Cc1Cfg { + &self.cc1_cfg + } #[doc = "0x84 - No Description"] - pub cc1_ctrl: CC1_CTRL, + #[inline(always)] + pub const fn cc1_ctrl(&self) -> &Cc1Ctrl { + &self.cc1_ctrl + } #[doc = "0x88 - No Description"] - pub cc1_oc: CC1_OC, - _reserved21: [u8; 0x04], + #[inline(always)] + pub const fn cc1_oc(&self) -> &Cc1Oc { + &self.cc1_oc + } #[doc = "0x90 - No Description"] - pub cc1_ocb: CC1_OCB, + #[inline(always)] + pub const fn cc1_ocb(&self) -> &Cc1Ocb { + &self.cc1_ocb + } #[doc = "0x94 - No Description"] - pub cc1_icf: CC1_ICF, + #[inline(always)] + pub const fn cc1_icf(&self) -> &Cc1Icf { + &self.cc1_icf + } #[doc = "0x98 - No Description"] - pub cc1_icof: CC1_ICOF, - _reserved24: [u8; 0x04], + #[inline(always)] + pub const fn cc1_icof(&self) -> &Cc1Icof { + &self.cc1_icof + } #[doc = "0xa0 - No Description"] - pub cc2_cfg: CC2_CFG, + #[inline(always)] + pub const fn cc2_cfg(&self) -> &Cc2Cfg { + &self.cc2_cfg + } #[doc = "0xa4 - No Description"] - pub cc2_ctrl: CC2_CTRL, + #[inline(always)] + pub const fn cc2_ctrl(&self) -> &Cc2Ctrl { + &self.cc2_ctrl + } #[doc = "0xa8 - No Description"] - pub cc2_oc: CC2_OC, - _reserved27: [u8; 0x04], + #[inline(always)] + pub const fn cc2_oc(&self) -> &Cc2Oc { + &self.cc2_oc + } #[doc = "0xb0 - No Description"] - pub cc2_ocb: CC2_OCB, + #[inline(always)] + pub const fn cc2_ocb(&self) -> &Cc2Ocb { + &self.cc2_ocb + } #[doc = "0xb4 - No Description"] - pub cc2_icf: CC2_ICF, + #[inline(always)] + pub const fn cc2_icf(&self) -> &Cc2Icf { + &self.cc2_icf + } #[doc = "0xb8 - No Description"] - pub cc2_icof: CC2_ICOF, - _reserved30: [u8; 0x24], + #[inline(always)] + pub const fn cc2_icof(&self) -> &Cc2Icof { + &self.cc2_icof + } #[doc = "0xe0 - No Description"] - pub dtcfg: DTCFG, + #[inline(always)] + pub const fn dtcfg(&self) -> &Dtcfg { + &self.dtcfg + } #[doc = "0xe4 - No Description"] - pub dttimecfg: DTTIMECFG, + #[inline(always)] + pub const fn dttimecfg(&self) -> &Dttimecfg { + &self.dttimecfg + } #[doc = "0xe8 - No Description"] - pub dtfcfg: DTFCFG, + #[inline(always)] + pub const fn dtfcfg(&self) -> &Dtfcfg { + &self.dtfcfg + } #[doc = "0xec - No Description"] - pub dtctrl: DTCTRL, + #[inline(always)] + pub const fn dtctrl(&self) -> &Dtctrl { + &self.dtctrl + } #[doc = "0xf0 - No Description"] - pub dtogen: DTOGEN, + #[inline(always)] + pub const fn dtogen(&self) -> &Dtogen { + &self.dtogen + } #[doc = "0xf4 - No Description"] - pub dtfault: DTFAULT, + #[inline(always)] + pub const fn dtfault(&self) -> &Dtfault { + &self.dtfault + } #[doc = "0xf8 - No Description"] - pub dtfaultc: DTFAULTC, + #[inline(always)] + pub const fn dtfaultc(&self) -> &Dtfaultc { + &self.dtfaultc + } #[doc = "0xfc - No Description"] - pub dtlock: DTLOCK, + #[inline(always)] + pub const fn dtlock(&self) -> &Dtlock { + &self.dtlock + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "TOP (rw) register accessor: an alias for `Reg`"] -pub type TOP = crate::Reg; +#[doc = "TOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@top`] +module"] +#[doc(alias = "TOP")] +pub type Top = crate::Reg; #[doc = "No Description"] pub mod top; -#[doc = "TOPB (rw) register accessor: an alias for `Reg`"] -pub type TOPB = crate::Reg; +#[doc = "TOPB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@topb`] +module"] +#[doc(alias = "TOPB")] +pub type Topb = crate::Reg; #[doc = "No Description"] pub mod topb; -#[doc = "CNT (rw) register accessor: an alias for `Reg`"] -pub type CNT = crate::Reg; +#[doc = "CNT (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnt`] +module"] +#[doc(alias = "CNT")] +pub type Cnt = crate::Reg; #[doc = "No Description"] pub mod cnt; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CC0_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC0_CFG = crate::Reg; +#[doc = "CC0_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_cfg`] +module"] +#[doc(alias = "CC0_CFG")] +pub type Cc0Cfg = crate::Reg; #[doc = "No Description"] pub mod cc0_cfg; -#[doc = "CC0_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC0_CTRL = crate::Reg; +#[doc = "CC0_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_ctrl`] +module"] +#[doc(alias = "CC0_CTRL")] +pub type Cc0Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc0_ctrl; -#[doc = "CC0_OC (rw) register accessor: an alias for `Reg`"] -pub type CC0_OC = crate::Reg; +#[doc = "CC0_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_oc`] +module"] +#[doc(alias = "CC0_OC")] +pub type Cc0Oc = crate::Reg; #[doc = "No Description"] pub mod cc0_oc; -#[doc = "CC0_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC0_OCB = crate::Reg; +#[doc = "CC0_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_ocb`] +module"] +#[doc(alias = "CC0_OCB")] +pub type Cc0Ocb = crate::Reg; #[doc = "No Description"] pub mod cc0_ocb; -#[doc = "CC0_ICF (r) register accessor: an alias for `Reg`"] -pub type CC0_ICF = crate::Reg; +#[doc = "CC0_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_icf`] +module"] +#[doc(alias = "CC0_ICF")] +pub type Cc0Icf = crate::Reg; #[doc = "No Description"] pub mod cc0_icf; -#[doc = "CC0_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC0_ICOF = crate::Reg; +#[doc = "CC0_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_icof`] +module"] +#[doc(alias = "CC0_ICOF")] +pub type Cc0Icof = crate::Reg; #[doc = "No Description"] pub mod cc0_icof; -#[doc = "CC1_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC1_CFG = crate::Reg; +#[doc = "CC1_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_cfg`] +module"] +#[doc(alias = "CC1_CFG")] +pub type Cc1Cfg = crate::Reg; #[doc = "No Description"] pub mod cc1_cfg; -#[doc = "CC1_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC1_CTRL = crate::Reg; +#[doc = "CC1_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_ctrl`] +module"] +#[doc(alias = "CC1_CTRL")] +pub type Cc1Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc1_ctrl; -#[doc = "CC1_OC (rw) register accessor: an alias for `Reg`"] -pub type CC1_OC = crate::Reg; +#[doc = "CC1_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_oc`] +module"] +#[doc(alias = "CC1_OC")] +pub type Cc1Oc = crate::Reg; #[doc = "No Description"] pub mod cc1_oc; -#[doc = "CC1_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC1_OCB = crate::Reg; +#[doc = "CC1_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_ocb`] +module"] +#[doc(alias = "CC1_OCB")] +pub type Cc1Ocb = crate::Reg; #[doc = "No Description"] pub mod cc1_ocb; -#[doc = "CC1_ICF (r) register accessor: an alias for `Reg`"] -pub type CC1_ICF = crate::Reg; +#[doc = "CC1_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_icf`] +module"] +#[doc(alias = "CC1_ICF")] +pub type Cc1Icf = crate::Reg; #[doc = "No Description"] pub mod cc1_icf; -#[doc = "CC1_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC1_ICOF = crate::Reg; +#[doc = "CC1_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_icof`] +module"] +#[doc(alias = "CC1_ICOF")] +pub type Cc1Icof = crate::Reg; #[doc = "No Description"] pub mod cc1_icof; -#[doc = "CC2_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC2_CFG = crate::Reg; +#[doc = "CC2_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_cfg`] +module"] +#[doc(alias = "CC2_CFG")] +pub type Cc2Cfg = crate::Reg; #[doc = "No Description"] pub mod cc2_cfg; -#[doc = "CC2_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC2_CTRL = crate::Reg; +#[doc = "CC2_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_ctrl`] +module"] +#[doc(alias = "CC2_CTRL")] +pub type Cc2Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc2_ctrl; -#[doc = "CC2_OC (rw) register accessor: an alias for `Reg`"] -pub type CC2_OC = crate::Reg; +#[doc = "CC2_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_oc`] +module"] +#[doc(alias = "CC2_OC")] +pub type Cc2Oc = crate::Reg; #[doc = "No Description"] pub mod cc2_oc; -#[doc = "CC2_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC2_OCB = crate::Reg; +#[doc = "CC2_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_ocb`] +module"] +#[doc(alias = "CC2_OCB")] +pub type Cc2Ocb = crate::Reg; #[doc = "No Description"] pub mod cc2_ocb; -#[doc = "CC2_ICF (r) register accessor: an alias for `Reg`"] -pub type CC2_ICF = crate::Reg; +#[doc = "CC2_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_icf`] +module"] +#[doc(alias = "CC2_ICF")] +pub type Cc2Icf = crate::Reg; #[doc = "No Description"] pub mod cc2_icf; -#[doc = "CC2_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC2_ICOF = crate::Reg; +#[doc = "CC2_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_icof`] +module"] +#[doc(alias = "CC2_ICOF")] +pub type Cc2Icof = crate::Reg; #[doc = "No Description"] pub mod cc2_icof; -#[doc = "DTCFG (rw) register accessor: an alias for `Reg`"] -pub type DTCFG = crate::Reg; +#[doc = "DTCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtcfg`] +module"] +#[doc(alias = "DTCFG")] +pub type Dtcfg = crate::Reg; #[doc = "No Description"] pub mod dtcfg; -#[doc = "DTTIMECFG (rw) register accessor: an alias for `Reg`"] -pub type DTTIMECFG = crate::Reg; +#[doc = "DTTIMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dttimecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dttimecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dttimecfg`] +module"] +#[doc(alias = "DTTIMECFG")] +pub type Dttimecfg = crate::Reg; #[doc = "No Description"] pub mod dttimecfg; -#[doc = "DTFCFG (rw) register accessor: an alias for `Reg`"] -pub type DTFCFG = crate::Reg; +#[doc = "DTFCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfcfg`] +module"] +#[doc(alias = "DTFCFG")] +pub type Dtfcfg = crate::Reg; #[doc = "No Description"] pub mod dtfcfg; -#[doc = "DTCTRL (rw) register accessor: an alias for `Reg`"] -pub type DTCTRL = crate::Reg; +#[doc = "DTCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtctrl`] +module"] +#[doc(alias = "DTCTRL")] +pub type Dtctrl = crate::Reg; #[doc = "No Description"] pub mod dtctrl; -#[doc = "DTOGEN (rw) register accessor: an alias for `Reg`"] -pub type DTOGEN = crate::Reg; +#[doc = "DTOGEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtogen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtogen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtogen`] +module"] +#[doc(alias = "DTOGEN")] +pub type Dtogen = crate::Reg; #[doc = "No Description"] pub mod dtogen; -#[doc = "DTFAULT (r) register accessor: an alias for `Reg`"] -pub type DTFAULT = crate::Reg; +#[doc = "DTFAULT (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfault::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfault`] +module"] +#[doc(alias = "DTFAULT")] +pub type Dtfault = crate::Reg; #[doc = "No Description"] pub mod dtfault; -#[doc = "DTFAULTC (w) register accessor: an alias for `Reg`"] -pub type DTFAULTC = crate::Reg; +#[doc = "DTFAULTC (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfaultc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfaultc`] +module"] +#[doc(alias = "DTFAULTC")] +pub type Dtfaultc = crate::Reg; #[doc = "No Description"] pub mod dtfaultc; -#[doc = "DTLOCK (w) register accessor: an alias for `Reg`"] -pub type DTLOCK = crate::Reg; +#[doc = "DTLOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtlock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtlock`] +module"] +#[doc(alias = "DTLOCK")] +pub type Dtlock = crate::Reg; #[doc = "No Description"] pub mod dtlock; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc0_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc0_cfg.rs index 547eeb0..b3aac62 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc0_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc0_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC0_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC0_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_cfg](index.html) module"] -pub struct CC0_CFG_SPEC; -impl crate::RegisterSpec for CC0_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0CfgSpec; +impl crate::RegisterSpec for Cc0CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_cfg::R](R) reader structure"] -impl crate::Readable for CC0_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_cfg::W](W) writer structure"] -impl crate::Writable for CC0_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_cfg::R`](R) reader structure"] +impl crate::Readable for Cc0CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_cfg::W`](W) writer structure"] +impl crate::Writable for Cc0CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_CFG to value 0"] -impl crate::Resettable for CC0_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc0_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc0_ctrl.rs index 71b40e4..1b92d0c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc0_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc0_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC0_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_ctrl](index.html) module"] -pub struct CC0_CTRL_SPEC; -impl crate::RegisterSpec for CC0_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0CtrlSpec; +impl crate::RegisterSpec for Cc0CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_ctrl::R](R) reader structure"] -impl crate::Readable for CC0_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_ctrl::W](W) writer structure"] -impl crate::Writable for CC0_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc0CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc0CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_CTRL to value 0"] -impl crate::Resettable for CC0_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc0_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc0_icf.rs index 393663e..7857cd3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc0_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc0_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC0_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new(self.bits) + pub fn icf(&self) -> IcfR { + IcfR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_icf](index.html) module"] -pub struct CC0_ICF_SPEC; -impl crate::RegisterSpec for CC0_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0IcfSpec; +impl crate::RegisterSpec for Cc0IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_icf::R](R) reader structure"] -impl crate::Readable for CC0_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc0_icf::R`](R) reader structure"] +impl crate::Readable for Cc0IcfSpec {} #[doc = "`reset()` method sets CC0_ICF to value 0"] -impl crate::Resettable for CC0_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc0_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc0_icof.rs index cded1c9..517621b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc0_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc0_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC0_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new(self.bits) + pub fn icof(&self) -> IcofR { + IcofR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_icof](index.html) module"] -pub struct CC0_ICOF_SPEC; -impl crate::RegisterSpec for CC0_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0IcofSpec; +impl crate::RegisterSpec for Cc0IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_icof::R](R) reader structure"] -impl crate::Readable for CC0_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc0_icof::R`](R) reader structure"] +impl crate::Readable for Cc0IcofSpec {} #[doc = "`reset()` method sets CC0_ICOF to value 0"] -impl crate::Resettable for CC0_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc0_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc0_oc.rs index 2606e85..daec18d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc0_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc0_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC0_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC0_OC_SPEC, u32, u32, 32, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new(self.bits) + pub fn oc(&self) -> OcR { + OcR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_oc](index.html) module"] -pub struct CC0_OC_SPEC; -impl crate::RegisterSpec for CC0_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0OcSpec; +impl crate::RegisterSpec for Cc0OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_oc::R](R) reader structure"] -impl crate::Readable for CC0_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_oc::W](W) writer structure"] -impl crate::Writable for CC0_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_oc::R`](R) reader structure"] +impl crate::Readable for Cc0OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_oc::W`](W) writer structure"] +impl crate::Writable for Cc0OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_OC to value 0"] -impl crate::Resettable for CC0_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc0_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc0_ocb.rs index e61eaac..26a4aec 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc0_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc0_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC0_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC0_OCB_SPEC, u32, u32, 32, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new(self.bits) + pub fn ocb(&self) -> OcbR { + OcbR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_ocb](index.html) module"] -pub struct CC0_OCB_SPEC; -impl crate::RegisterSpec for CC0_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0OcbSpec; +impl crate::RegisterSpec for Cc0OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_ocb::R](R) reader structure"] -impl crate::Readable for CC0_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_ocb::W](W) writer structure"] -impl crate::Writable for CC0_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_ocb::R`](R) reader structure"] +impl crate::Readable for Cc0OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_ocb::W`](W) writer structure"] +impl crate::Writable for Cc0OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_OCB to value 0"] -impl crate::Resettable for CC0_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc1_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc1_cfg.rs index b3424c2..2243932 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc1_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc1_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC1_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC1_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_cfg](index.html) module"] -pub struct CC1_CFG_SPEC; -impl crate::RegisterSpec for CC1_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1CfgSpec; +impl crate::RegisterSpec for Cc1CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_cfg::R](R) reader structure"] -impl crate::Readable for CC1_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_cfg::W](W) writer structure"] -impl crate::Writable for CC1_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_cfg::R`](R) reader structure"] +impl crate::Readable for Cc1CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_cfg::W`](W) writer structure"] +impl crate::Writable for Cc1CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_CFG to value 0"] -impl crate::Resettable for CC1_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc1_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc1_ctrl.rs index 38927de..bc41282 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc1_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc1_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC1_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_ctrl](index.html) module"] -pub struct CC1_CTRL_SPEC; -impl crate::RegisterSpec for CC1_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1CtrlSpec; +impl crate::RegisterSpec for Cc1CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_ctrl::R](R) reader structure"] -impl crate::Readable for CC1_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_ctrl::W](W) writer structure"] -impl crate::Writable for CC1_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc1CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc1CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_CTRL to value 0"] -impl crate::Resettable for CC1_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc1_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc1_icf.rs index c898364..a1eb181 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc1_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc1_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC1_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new(self.bits) + pub fn icf(&self) -> IcfR { + IcfR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_icf](index.html) module"] -pub struct CC1_ICF_SPEC; -impl crate::RegisterSpec for CC1_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1IcfSpec; +impl crate::RegisterSpec for Cc1IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_icf::R](R) reader structure"] -impl crate::Readable for CC1_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc1_icf::R`](R) reader structure"] +impl crate::Readable for Cc1IcfSpec {} #[doc = "`reset()` method sets CC1_ICF to value 0"] -impl crate::Resettable for CC1_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc1_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc1_icof.rs index bbaba90..9130067 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc1_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc1_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC1_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new(self.bits) + pub fn icof(&self) -> IcofR { + IcofR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_icof](index.html) module"] -pub struct CC1_ICOF_SPEC; -impl crate::RegisterSpec for CC1_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1IcofSpec; +impl crate::RegisterSpec for Cc1IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_icof::R](R) reader structure"] -impl crate::Readable for CC1_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc1_icof::R`](R) reader structure"] +impl crate::Readable for Cc1IcofSpec {} #[doc = "`reset()` method sets CC1_ICOF to value 0"] -impl crate::Resettable for CC1_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc1_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc1_oc.rs index bd89532..cdd33a1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc1_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc1_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC1_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC1_OC_SPEC, u32, u32, 32, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new(self.bits) + pub fn oc(&self) -> OcR { + OcR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_oc](index.html) module"] -pub struct CC1_OC_SPEC; -impl crate::RegisterSpec for CC1_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1OcSpec; +impl crate::RegisterSpec for Cc1OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_oc::R](R) reader structure"] -impl crate::Readable for CC1_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_oc::W](W) writer structure"] -impl crate::Writable for CC1_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_oc::R`](R) reader structure"] +impl crate::Readable for Cc1OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_oc::W`](W) writer structure"] +impl crate::Writable for Cc1OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_OC to value 0"] -impl crate::Resettable for CC1_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc1_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc1_ocb.rs index 06418d1..4378eff 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc1_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc1_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC1_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC1_OCB_SPEC, u32, u32, 32, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new(self.bits) + pub fn ocb(&self) -> OcbR { + OcbR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_ocb](index.html) module"] -pub struct CC1_OCB_SPEC; -impl crate::RegisterSpec for CC1_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1OcbSpec; +impl crate::RegisterSpec for Cc1OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_ocb::R](R) reader structure"] -impl crate::Readable for CC1_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_ocb::W](W) writer structure"] -impl crate::Writable for CC1_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_ocb::R`](R) reader structure"] +impl crate::Readable for Cc1OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_ocb::W`](W) writer structure"] +impl crate::Writable for Cc1OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_OCB to value 0"] -impl crate::Resettable for CC1_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc2_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc2_cfg.rs index 6b108e5..97bec45 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc2_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc2_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC2_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC2_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_cfg](index.html) module"] -pub struct CC2_CFG_SPEC; -impl crate::RegisterSpec for CC2_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2CfgSpec; +impl crate::RegisterSpec for Cc2CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_cfg::R](R) reader structure"] -impl crate::Readable for CC2_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_cfg::W](W) writer structure"] -impl crate::Writable for CC2_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_cfg::R`](R) reader structure"] +impl crate::Readable for Cc2CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_cfg::W`](W) writer structure"] +impl crate::Writable for Cc2CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_CFG to value 0"] -impl crate::Resettable for CC2_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc2_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc2_ctrl.rs index b42d120..317952a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc2_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc2_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC2_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_ctrl](index.html) module"] -pub struct CC2_CTRL_SPEC; -impl crate::RegisterSpec for CC2_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2CtrlSpec; +impl crate::RegisterSpec for Cc2CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_ctrl::R](R) reader structure"] -impl crate::Readable for CC2_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_ctrl::W](W) writer structure"] -impl crate::Writable for CC2_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc2CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc2CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_CTRL to value 0"] -impl crate::Resettable for CC2_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc2_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc2_icf.rs index c6060b6..817b4ed 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc2_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc2_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC2_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new(self.bits) + pub fn icf(&self) -> IcfR { + IcfR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_icf](index.html) module"] -pub struct CC2_ICF_SPEC; -impl crate::RegisterSpec for CC2_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2IcfSpec; +impl crate::RegisterSpec for Cc2IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_icf::R](R) reader structure"] -impl crate::Readable for CC2_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc2_icf::R`](R) reader structure"] +impl crate::Readable for Cc2IcfSpec {} #[doc = "`reset()` method sets CC2_ICF to value 0"] -impl crate::Resettable for CC2_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc2_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc2_icof.rs index 389eac4..32bce48 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc2_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc2_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC2_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new(self.bits) + pub fn icof(&self) -> IcofR { + IcofR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_icof](index.html) module"] -pub struct CC2_ICOF_SPEC; -impl crate::RegisterSpec for CC2_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2IcofSpec; +impl crate::RegisterSpec for Cc2IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_icof::R](R) reader structure"] -impl crate::Readable for CC2_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc2_icof::R`](R) reader structure"] +impl crate::Readable for Cc2IcofSpec {} #[doc = "`reset()` method sets CC2_ICOF to value 0"] -impl crate::Resettable for CC2_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc2_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc2_oc.rs index 94bc70d..3351629 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc2_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc2_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC2_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC2_OC_SPEC, u32, u32, 32, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new(self.bits) + pub fn oc(&self) -> OcR { + OcR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_oc](index.html) module"] -pub struct CC2_OC_SPEC; -impl crate::RegisterSpec for CC2_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2OcSpec; +impl crate::RegisterSpec for Cc2OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_oc::R](R) reader structure"] -impl crate::Readable for CC2_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_oc::W](W) writer structure"] -impl crate::Writable for CC2_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_oc::R`](R) reader structure"] +impl crate::Readable for Cc2OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_oc::W`](W) writer structure"] +impl crate::Writable for Cc2OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_OC to value 0"] -impl crate::Resettable for CC2_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc2_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc2_ocb.rs index f192169..49f056e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc2_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cc2_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC2_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC2_OCB_SPEC, u32, u32, 32, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new(self.bits) + pub fn ocb(&self) -> OcbR { + OcbR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_ocb](index.html) module"] -pub struct CC2_OCB_SPEC; -impl crate::RegisterSpec for CC2_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2OcbSpec; +impl crate::RegisterSpec for Cc2OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_ocb::R](R) reader structure"] -impl crate::Readable for CC2_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_ocb::W](W) writer structure"] -impl crate::Writable for CC2_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_ocb::R`](R) reader structure"] +impl crate::Readable for Cc2OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_ocb::W`](W) writer structure"] +impl crate::Writable for Cc2OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_OCB to value 0"] -impl crate::Resettable for CC2_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cfg.rs index ea2a1e1..b4cc2fd 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cfg.rs @@ -1,775 +1,774 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - Timer Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Timer Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Up-count mode"] - UP = 0, + Up = 0, #[doc = "1: Down-count mode"] - DOWN = 1, + Down = 1, #[doc = "2: Up/down-count mode"] - UPDOWN = 2, + Updown = 2, #[doc = "3: Quadrature decoder mode"] - QDEC = 3, + Qdec = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - Timer Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::UP, - 1 => MODE_A::DOWN, - 2 => MODE_A::UPDOWN, - 3 => MODE_A::QDEC, + 0 => Mode::Up, + 1 => Mode::Down, + 2 => Mode::Updown, + 3 => Mode::Qdec, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Up-count mode"] #[inline(always)] pub fn is_up(&self) -> bool { - *self == MODE_A::UP + *self == Mode::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Down-count mode"] #[inline(always)] pub fn is_down(&self) -> bool { - *self == MODE_A::DOWN + *self == Mode::Down } - #[doc = "Checks if the value of the field is `UPDOWN`"] + #[doc = "Up/down-count mode"] #[inline(always)] pub fn is_updown(&self) -> bool { - *self == MODE_A::UPDOWN + *self == Mode::Updown } - #[doc = "Checks if the value of the field is `QDEC`"] + #[doc = "Quadrature decoder mode"] #[inline(always)] pub fn is_qdec(&self) -> bool { - *self == MODE_A::QDEC + *self == Mode::Qdec } } #[doc = "Field `MODE` writer - Timer Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Up-count mode"] #[inline(always)] - pub fn up(self) -> &'a mut W { - self.variant(MODE_A::UP) + pub fn up(self) -> &'a mut crate::W { + self.variant(Mode::Up) } #[doc = "Down-count mode"] #[inline(always)] - pub fn down(self) -> &'a mut W { - self.variant(MODE_A::DOWN) + pub fn down(self) -> &'a mut crate::W { + self.variant(Mode::Down) } #[doc = "Up/down-count mode"] #[inline(always)] - pub fn updown(self) -> &'a mut W { - self.variant(MODE_A::UPDOWN) + pub fn updown(self) -> &'a mut crate::W { + self.variant(Mode::Updown) } #[doc = "Quadrature decoder mode"] #[inline(always)] - pub fn qdec(self) -> &'a mut W { - self.variant(MODE_A::QDEC) + pub fn qdec(self) -> &'a mut crate::W { + self.variant(Mode::Qdec) } } -#[doc = "Field `SYNC` reader - Timer Start/Stop/Reload Synchronization"] -pub type SYNC_R = crate::BitReader; #[doc = "Timer Start/Stop/Reload Synchronization\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYNC_A { +pub enum Sync { #[doc = "0: Timer operation is unaffected by other timers."] - DISABLE = 0, + Disable = 0, #[doc = "1: Timer may be started, stopped and re-loaded from other timer instances."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYNC_A) -> Self { + fn from(variant: Sync) -> Self { variant as u8 != 0 } } -impl SYNC_R { +#[doc = "Field `SYNC` reader - Timer Start/Stop/Reload Synchronization"] +pub type SyncR = crate::BitReader; +impl SyncR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SYNC_A { + pub const fn variant(&self) -> Sync { match self.bits { - false => SYNC_A::DISABLE, - true => SYNC_A::ENABLE, + false => Sync::Disable, + true => Sync::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Timer operation is unaffected by other timers."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == SYNC_A::DISABLE + *self == Sync::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Timer may be started, stopped and re-loaded from other timer instances."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == SYNC_A::ENABLE + *self == Sync::Enable } } #[doc = "Field `SYNC` writer - Timer Start/Stop/Reload Synchronization"] -pub type SYNC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, SYNC_A, O>; -impl<'a, const O: u8> SYNC_W<'a, O> { +pub type SyncW<'a, REG> = crate::BitWriter<'a, REG, Sync>; +impl<'a, REG> SyncW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer operation is unaffected by other timers."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(SYNC_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Sync::Disable) } #[doc = "Timer may be started, stopped and re-loaded from other timer instances."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(SYNC_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Sync::Enable) } } #[doc = "Field `OSMEN` reader - One-shot Mode Enable"] -pub type OSMEN_R = crate::BitReader; +pub type OsmenR = crate::BitReader; #[doc = "Field `OSMEN` writer - One-shot Mode Enable"] -pub type OSMEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `QDM` reader - Quadrature Decoder Mode Selection"] -pub type QDM_R = crate::BitReader; +pub type OsmenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Quadrature Decoder Mode Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum QDM_A { +pub enum Qdm { #[doc = "0: X2 mode selected"] X2 = 0, #[doc = "1: X4 mode selected"] X4 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: QDM_A) -> Self { + fn from(variant: Qdm) -> Self { variant as u8 != 0 } } -impl QDM_R { +#[doc = "Field `QDM` reader - Quadrature Decoder Mode Selection"] +pub type QdmR = crate::BitReader; +impl QdmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> QDM_A { + pub const fn variant(&self) -> Qdm { match self.bits { - false => QDM_A::X2, - true => QDM_A::X4, + false => Qdm::X2, + true => Qdm::X4, } } - #[doc = "Checks if the value of the field is `X2`"] + #[doc = "X2 mode selected"] #[inline(always)] pub fn is_x2(&self) -> bool { - *self == QDM_A::X2 + *self == Qdm::X2 } - #[doc = "Checks if the value of the field is `X4`"] + #[doc = "X4 mode selected"] #[inline(always)] pub fn is_x4(&self) -> bool { - *self == QDM_A::X4 + *self == Qdm::X4 } } #[doc = "Field `QDM` writer - Quadrature Decoder Mode Selection"] -pub type QDM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, QDM_A, O>; -impl<'a, const O: u8> QDM_W<'a, O> { +pub type QdmW<'a, REG> = crate::BitWriter<'a, REG, Qdm>; +impl<'a, REG> QdmW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "X2 mode selected"] #[inline(always)] - pub fn x2(self) -> &'a mut W { - self.variant(QDM_A::X2) + pub fn x2(self) -> &'a mut crate::W { + self.variant(Qdm::X2) } #[doc = "X4 mode selected"] #[inline(always)] - pub fn x4(self) -> &'a mut W { - self.variant(QDM_A::X4) + pub fn x4(self) -> &'a mut crate::W { + self.variant(Qdm::X4) } } -#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] -pub type DEBUGRUN_R = crate::BitReader; #[doc = "Debug Mode Run Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DEBUGRUN_A { +pub enum Debugrun { #[doc = "0: Timer is halted in debug mode"] - HALT = 0, + Halt = 0, #[doc = "1: Timer is running in debug mode"] - RUN = 1, + Run = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DEBUGRUN_A) -> Self { + fn from(variant: Debugrun) -> Self { variant as u8 != 0 } } -impl DEBUGRUN_R { +#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] +pub type DebugrunR = crate::BitReader; +impl DebugrunR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DEBUGRUN_A { + pub const fn variant(&self) -> Debugrun { match self.bits { - false => DEBUGRUN_A::HALT, - true => DEBUGRUN_A::RUN, + false => Debugrun::Halt, + true => Debugrun::Run, } } - #[doc = "Checks if the value of the field is `HALT`"] + #[doc = "Timer is halted in debug mode"] #[inline(always)] pub fn is_halt(&self) -> bool { - *self == DEBUGRUN_A::HALT + *self == Debugrun::Halt } - #[doc = "Checks if the value of the field is `RUN`"] + #[doc = "Timer is running in debug mode"] #[inline(always)] pub fn is_run(&self) -> bool { - *self == DEBUGRUN_A::RUN + *self == Debugrun::Run } } #[doc = "Field `DEBUGRUN` writer - Debug Mode Run Enable"] -pub type DEBUGRUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DEBUGRUN_A, O>; -impl<'a, const O: u8> DEBUGRUN_W<'a, O> { +pub type DebugrunW<'a, REG> = crate::BitWriter<'a, REG, Debugrun>; +impl<'a, REG> DebugrunW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer is halted in debug mode"] #[inline(always)] - pub fn halt(self) -> &'a mut W { - self.variant(DEBUGRUN_A::HALT) + pub fn halt(self) -> &'a mut crate::W { + self.variant(Debugrun::Halt) } #[doc = "Timer is running in debug mode"] #[inline(always)] - pub fn run(self) -> &'a mut W { - self.variant(DEBUGRUN_A::RUN) + pub fn run(self) -> &'a mut crate::W { + self.variant(Debugrun::Run) } } #[doc = "Field `DMACLRACT` reader - DMA Request Clear on Active"] -pub type DMACLRACT_R = crate::BitReader; +pub type DmaclractR = crate::BitReader; #[doc = "Field `DMACLRACT` writer - DMA Request Clear on Active"] -pub type DMACLRACT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `CLKSEL` reader - Clock Source Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type DmaclractW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Clock Source Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "0: Prescaled EM01GRPACLK"] - PRESCEM01GRPACLK = 0, + Prescem01grpaclk = 0, #[doc = "1: Compare/Capture Channel 1 Input"] - CC1 = 1, + Cc1 = 1, #[doc = "2: Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] - TIMEROUF = 2, + Timerouf = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Source Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKSEL_A::PRESCEM01GRPACLK), - 1 => Some(CLKSEL_A::CC1), - 2 => Some(CLKSEL_A::TIMEROUF), + 0 => Some(Clksel::Prescem01grpaclk), + 1 => Some(Clksel::Cc1), + 2 => Some(Clksel::Timerouf), _ => None, } } - #[doc = "Checks if the value of the field is `PRESCEM01GRPACLK`"] + #[doc = "Prescaled EM01GRPACLK"] #[inline(always)] pub fn is_prescem01grpaclk(&self) -> bool { - *self == CLKSEL_A::PRESCEM01GRPACLK + *self == Clksel::Prescem01grpaclk } - #[doc = "Checks if the value of the field is `CC1`"] + #[doc = "Compare/Capture Channel 1 Input"] #[inline(always)] pub fn is_cc1(&self) -> bool { - *self == CLKSEL_A::CC1 + *self == Clksel::Cc1 } - #[doc = "Checks if the value of the field is `TIMEROUF`"] + #[doc = "Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] #[inline(always)] pub fn is_timerouf(&self) -> bool { - *self == CLKSEL_A::TIMEROUF + *self == Clksel::Timerouf } } #[doc = "Field `CLKSEL` writer - Clock Source Select"] -pub type CLKSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, CLKSEL_A, 2, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Prescaled EM01GRPACLK"] #[inline(always)] - pub fn prescem01grpaclk(self) -> &'a mut W { - self.variant(CLKSEL_A::PRESCEM01GRPACLK) + pub fn prescem01grpaclk(self) -> &'a mut crate::W { + self.variant(Clksel::Prescem01grpaclk) } #[doc = "Compare/Capture Channel 1 Input"] #[inline(always)] - pub fn cc1(self) -> &'a mut W { - self.variant(CLKSEL_A::CC1) + pub fn cc1(self) -> &'a mut crate::W { + self.variant(Clksel::Cc1) } #[doc = "Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] #[inline(always)] - pub fn timerouf(self) -> &'a mut W { - self.variant(CLKSEL_A::TIMEROUF) + pub fn timerouf(self) -> &'a mut crate::W { + self.variant(Clksel::Timerouf) } } -#[doc = "Field `RETIMEEN` reader - PWM output retimed enable"] -pub type RETIMEEN_R = crate::BitReader; #[doc = "PWM output retimed enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RETIMEEN_A { +pub enum Retimeen { #[doc = "0: PWM outputs are not re-timed."] - DISABLE = 0, + Disable = 0, #[doc = "1: PWM outputs are re-timed."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RETIMEEN_A) -> Self { + fn from(variant: Retimeen) -> Self { variant as u8 != 0 } } -impl RETIMEEN_R { +#[doc = "Field `RETIMEEN` reader - PWM output retimed enable"] +pub type RetimeenR = crate::BitReader; +impl RetimeenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RETIMEEN_A { + pub const fn variant(&self) -> Retimeen { match self.bits { - false => RETIMEEN_A::DISABLE, - true => RETIMEEN_A::ENABLE, + false => Retimeen::Disable, + true => Retimeen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "PWM outputs are not re-timed."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RETIMEEN_A::DISABLE + *self == Retimeen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "PWM outputs are re-timed."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RETIMEEN_A::ENABLE + *self == Retimeen::Enable } } #[doc = "Field `RETIMEEN` writer - PWM output retimed enable"] -pub type RETIMEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, RETIMEEN_A, O>; -impl<'a, const O: u8> RETIMEEN_W<'a, O> { +pub type RetimeenW<'a, REG> = crate::BitWriter<'a, REG, Retimeen>; +impl<'a, REG> RetimeenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "PWM outputs are not re-timed."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RETIMEEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Retimeen::Disable) } #[doc = "PWM outputs are re-timed."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RETIMEEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Retimeen::Enable) } } -#[doc = "Field `DISSYNCOUT` reader - Disable Timer Start/Stop/Reload output"] -pub type DISSYNCOUT_R = crate::BitReader; #[doc = "Disable Timer Start/Stop/Reload output\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DISSYNCOUT_A { +pub enum Dissyncout { #[doc = "0: Timer can start/stop/reload other timers with SYNC bit set"] - EN = 0, + En = 0, #[doc = "1: Timer cannot start/stop/reload other timers with SYNC bit set"] - DIS = 1, + Dis = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DISSYNCOUT_A) -> Self { + fn from(variant: Dissyncout) -> Self { variant as u8 != 0 } } -impl DISSYNCOUT_R { +#[doc = "Field `DISSYNCOUT` reader - Disable Timer Start/Stop/Reload output"] +pub type DissyncoutR = crate::BitReader; +impl DissyncoutR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DISSYNCOUT_A { + pub const fn variant(&self) -> Dissyncout { match self.bits { - false => DISSYNCOUT_A::EN, - true => DISSYNCOUT_A::DIS, + false => Dissyncout::En, + true => Dissyncout::Dis, } } - #[doc = "Checks if the value of the field is `EN`"] + #[doc = "Timer can start/stop/reload other timers with SYNC bit set"] #[inline(always)] pub fn is_en(&self) -> bool { - *self == DISSYNCOUT_A::EN + *self == Dissyncout::En } - #[doc = "Checks if the value of the field is `DIS`"] + #[doc = "Timer cannot start/stop/reload other timers with SYNC bit set"] #[inline(always)] pub fn is_dis(&self) -> bool { - *self == DISSYNCOUT_A::DIS + *self == Dissyncout::Dis } } #[doc = "Field `DISSYNCOUT` writer - Disable Timer Start/Stop/Reload output"] -pub type DISSYNCOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DISSYNCOUT_A, O>; -impl<'a, const O: u8> DISSYNCOUT_W<'a, O> { +pub type DissyncoutW<'a, REG> = crate::BitWriter<'a, REG, Dissyncout>; +impl<'a, REG> DissyncoutW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer can start/stop/reload other timers with SYNC bit set"] #[inline(always)] - pub fn en(self) -> &'a mut W { - self.variant(DISSYNCOUT_A::EN) + pub fn en(self) -> &'a mut crate::W { + self.variant(Dissyncout::En) } #[doc = "Timer cannot start/stop/reload other timers with SYNC bit set"] #[inline(always)] - pub fn dis(self) -> &'a mut W { - self.variant(DISSYNCOUT_A::DIS) + pub fn dis(self) -> &'a mut crate::W { + self.variant(Dissyncout::Dis) } } #[doc = "Field `ATI` reader - Always Track Inputs"] -pub type ATI_R = crate::BitReader; +pub type AtiR = crate::BitReader; #[doc = "Field `ATI` writer - Always Track Inputs"] -pub type ATI_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type AtiW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RSSCOIST` reader - Reload-Start Sets COIST"] -pub type RSSCOIST_R = crate::BitReader; +pub type RsscoistR = crate::BitReader; #[doc = "Field `RSSCOIST` writer - Reload-Start Sets COIST"] -pub type RSSCOIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `PRESC` reader - Prescaler Setting"] -pub type PRESC_R = crate::FieldReader; +pub type RsscoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Prescaler Setting\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum PRESC_A { +pub enum Presc { #[doc = "0: No prescaling"] - DIV1 = 0, + Div1 = 0, #[doc = "1: Prescale by 2"] - DIV2 = 1, + Div2 = 1, #[doc = "3: Prescale by 4"] - DIV4 = 3, + Div4 = 3, #[doc = "7: Prescale by 8"] - DIV8 = 7, + Div8 = 7, #[doc = "15: Prescale by 16"] - DIV16 = 15, + Div16 = 15, #[doc = "31: Prescale by 32"] - DIV32 = 31, + Div32 = 31, #[doc = "63: Prescale by 64"] - DIV64 = 63, + Div64 = 63, #[doc = "127: Prescale by 128"] - DIV128 = 127, + Div128 = 127, #[doc = "255: Prescale by 256"] - DIV256 = 255, + Div256 = 255, #[doc = "511: Prescale by 512"] - DIV512 = 511, + Div512 = 511, #[doc = "1023: Prescale by 1024"] - DIV1024 = 1023, + Div1024 = 1023, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: PRESC_A) -> Self { + fn from(variant: Presc) -> Self { variant as _ } } -impl PRESC_R { +impl crate::FieldSpec for Presc { + type Ux = u16; +} +impl crate::IsEnum for Presc {} +#[doc = "Field `PRESC` reader - Prescaler Setting"] +pub type PrescR = crate::FieldReader; +impl PrescR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PRESC_A::DIV1), - 1 => Some(PRESC_A::DIV2), - 3 => Some(PRESC_A::DIV4), - 7 => Some(PRESC_A::DIV8), - 15 => Some(PRESC_A::DIV16), - 31 => Some(PRESC_A::DIV32), - 63 => Some(PRESC_A::DIV64), - 127 => Some(PRESC_A::DIV128), - 255 => Some(PRESC_A::DIV256), - 511 => Some(PRESC_A::DIV512), - 1023 => Some(PRESC_A::DIV1024), + 0 => Some(Presc::Div1), + 1 => Some(Presc::Div2), + 3 => Some(Presc::Div4), + 7 => Some(Presc::Div8), + 15 => Some(Presc::Div16), + 31 => Some(Presc::Div32), + 63 => Some(Presc::Div64), + 127 => Some(Presc::Div128), + 255 => Some(Presc::Div256), + 511 => Some(Presc::Div512), + 1023 => Some(Presc::Div1024), _ => None, } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "No prescaling"] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == PRESC_A::DIV1 + *self == Presc::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "Prescale by 2"] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == PRESC_A::DIV2 + *self == Presc::Div2 } - #[doc = "Checks if the value of the field is `DIV4`"] + #[doc = "Prescale by 4"] #[inline(always)] pub fn is_div4(&self) -> bool { - *self == PRESC_A::DIV4 + *self == Presc::Div4 } - #[doc = "Checks if the value of the field is `DIV8`"] + #[doc = "Prescale by 8"] #[inline(always)] pub fn is_div8(&self) -> bool { - *self == PRESC_A::DIV8 + *self == Presc::Div8 } - #[doc = "Checks if the value of the field is `DIV16`"] + #[doc = "Prescale by 16"] #[inline(always)] pub fn is_div16(&self) -> bool { - *self == PRESC_A::DIV16 + *self == Presc::Div16 } - #[doc = "Checks if the value of the field is `DIV32`"] + #[doc = "Prescale by 32"] #[inline(always)] pub fn is_div32(&self) -> bool { - *self == PRESC_A::DIV32 + *self == Presc::Div32 } - #[doc = "Checks if the value of the field is `DIV64`"] + #[doc = "Prescale by 64"] #[inline(always)] pub fn is_div64(&self) -> bool { - *self == PRESC_A::DIV64 + *self == Presc::Div64 } - #[doc = "Checks if the value of the field is `DIV128`"] + #[doc = "Prescale by 128"] #[inline(always)] pub fn is_div128(&self) -> bool { - *self == PRESC_A::DIV128 + *self == Presc::Div128 } - #[doc = "Checks if the value of the field is `DIV256`"] + #[doc = "Prescale by 256"] #[inline(always)] pub fn is_div256(&self) -> bool { - *self == PRESC_A::DIV256 + *self == Presc::Div256 } - #[doc = "Checks if the value of the field is `DIV512`"] + #[doc = "Prescale by 512"] #[inline(always)] pub fn is_div512(&self) -> bool { - *self == PRESC_A::DIV512 + *self == Presc::Div512 } - #[doc = "Checks if the value of the field is `DIV1024`"] + #[doc = "Prescale by 1024"] #[inline(always)] pub fn is_div1024(&self) -> bool { - *self == PRESC_A::DIV1024 + *self == Presc::Div1024 } } #[doc = "Field `PRESC` writer - Prescaler Setting"] -pub type PRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u16, PRESC_A, 10, O>; -impl<'a, const O: u8> PRESC_W<'a, O> { +pub type PrescW<'a, REG> = crate::FieldWriter<'a, REG, 10, Presc>; +impl<'a, REG> PrescW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No prescaling"] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(PRESC_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Presc::Div1) } #[doc = "Prescale by 2"] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(PRESC_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Presc::Div2) } #[doc = "Prescale by 4"] #[inline(always)] - pub fn div4(self) -> &'a mut W { - self.variant(PRESC_A::DIV4) + pub fn div4(self) -> &'a mut crate::W { + self.variant(Presc::Div4) } #[doc = "Prescale by 8"] #[inline(always)] - pub fn div8(self) -> &'a mut W { - self.variant(PRESC_A::DIV8) + pub fn div8(self) -> &'a mut crate::W { + self.variant(Presc::Div8) } #[doc = "Prescale by 16"] #[inline(always)] - pub fn div16(self) -> &'a mut W { - self.variant(PRESC_A::DIV16) + pub fn div16(self) -> &'a mut crate::W { + self.variant(Presc::Div16) } #[doc = "Prescale by 32"] #[inline(always)] - pub fn div32(self) -> &'a mut W { - self.variant(PRESC_A::DIV32) + pub fn div32(self) -> &'a mut crate::W { + self.variant(Presc::Div32) } #[doc = "Prescale by 64"] #[inline(always)] - pub fn div64(self) -> &'a mut W { - self.variant(PRESC_A::DIV64) + pub fn div64(self) -> &'a mut crate::W { + self.variant(Presc::Div64) } #[doc = "Prescale by 128"] #[inline(always)] - pub fn div128(self) -> &'a mut W { - self.variant(PRESC_A::DIV128) + pub fn div128(self) -> &'a mut crate::W { + self.variant(Presc::Div128) } #[doc = "Prescale by 256"] #[inline(always)] - pub fn div256(self) -> &'a mut W { - self.variant(PRESC_A::DIV256) + pub fn div256(self) -> &'a mut crate::W { + self.variant(Presc::Div256) } #[doc = "Prescale by 512"] #[inline(always)] - pub fn div512(self) -> &'a mut W { - self.variant(PRESC_A::DIV512) + pub fn div512(self) -> &'a mut crate::W { + self.variant(Presc::Div512) } #[doc = "Prescale by 1024"] #[inline(always)] - pub fn div1024(self) -> &'a mut W { - self.variant(PRESC_A::DIV1024) + pub fn div1024(self) -> &'a mut crate::W { + self.variant(Presc::Div1024) } } impl R { #[doc = "Bits 0:1 - Timer Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Timer Start/Stop/Reload Synchronization"] #[inline(always)] - pub fn sync(&self) -> SYNC_R { - SYNC_R::new(((self.bits >> 3) & 1) != 0) + pub fn sync(&self) -> SyncR { + SyncR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - One-shot Mode Enable"] #[inline(always)] - pub fn osmen(&self) -> OSMEN_R { - OSMEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn osmen(&self) -> OsmenR { + OsmenR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Quadrature Decoder Mode Selection"] #[inline(always)] - pub fn qdm(&self) -> QDM_R { - QDM_R::new(((self.bits >> 5) & 1) != 0) + pub fn qdm(&self) -> QdmR { + QdmR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Debug Mode Run Enable"] #[inline(always)] - pub fn debugrun(&self) -> DEBUGRUN_R { - DEBUGRUN_R::new(((self.bits >> 6) & 1) != 0) + pub fn debugrun(&self) -> DebugrunR { + DebugrunR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - DMA Request Clear on Active"] #[inline(always)] - pub fn dmaclract(&self) -> DMACLRACT_R { - DMACLRACT_R::new(((self.bits >> 7) & 1) != 0) + pub fn dmaclract(&self) -> DmaclractR { + DmaclractR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:9 - Clock Source Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 10 - PWM output retimed enable"] #[inline(always)] - pub fn retimeen(&self) -> RETIMEEN_R { - RETIMEEN_R::new(((self.bits >> 10) & 1) != 0) + pub fn retimeen(&self) -> RetimeenR { + RetimeenR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Disable Timer Start/Stop/Reload output"] #[inline(always)] - pub fn dissyncout(&self) -> DISSYNCOUT_R { - DISSYNCOUT_R::new(((self.bits >> 11) & 1) != 0) + pub fn dissyncout(&self) -> DissyncoutR { + DissyncoutR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 16 - Always Track Inputs"] #[inline(always)] - pub fn ati(&self) -> ATI_R { - ATI_R::new(((self.bits >> 16) & 1) != 0) + pub fn ati(&self) -> AtiR { + AtiR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Reload-Start Sets COIST"] #[inline(always)] - pub fn rsscoist(&self) -> RSSCOIST_R { - RSSCOIST_R::new(((self.bits >> 17) & 1) != 0) + pub fn rsscoist(&self) -> RsscoistR { + RsscoistR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:27 - Prescaler Setting"] #[inline(always)] - pub fn presc(&self) -> PRESC_R { - PRESC_R::new(((self.bits >> 18) & 0x03ff) as u16) + pub fn presc(&self) -> PrescR { + PrescR::new(((self.bits >> 18) & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:1 - Timer Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 3 - Timer Start/Stop/Reload Synchronization"] #[inline(always)] #[must_use] - pub fn sync(&mut self) -> SYNC_W<3> { - SYNC_W::new(self) + pub fn sync(&mut self) -> SyncW { + SyncW::new(self, 3) } #[doc = "Bit 4 - One-shot Mode Enable"] #[inline(always)] #[must_use] - pub fn osmen(&mut self) -> OSMEN_W<4> { - OSMEN_W::new(self) + pub fn osmen(&mut self) -> OsmenW { + OsmenW::new(self, 4) } #[doc = "Bit 5 - Quadrature Decoder Mode Selection"] #[inline(always)] #[must_use] - pub fn qdm(&mut self) -> QDM_W<5> { - QDM_W::new(self) + pub fn qdm(&mut self) -> QdmW { + QdmW::new(self, 5) } #[doc = "Bit 6 - Debug Mode Run Enable"] #[inline(always)] #[must_use] - pub fn debugrun(&mut self) -> DEBUGRUN_W<6> { - DEBUGRUN_W::new(self) + pub fn debugrun(&mut self) -> DebugrunW { + DebugrunW::new(self, 6) } #[doc = "Bit 7 - DMA Request Clear on Active"] #[inline(always)] #[must_use] - pub fn dmaclract(&mut self) -> DMACLRACT_W<7> { - DMACLRACT_W::new(self) + pub fn dmaclract(&mut self) -> DmaclractW { + DmaclractW::new(self, 7) } #[doc = "Bits 8:9 - Clock Source Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<8> { - CLKSEL_W::new(self) + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 8) } #[doc = "Bit 10 - PWM output retimed enable"] #[inline(always)] #[must_use] - pub fn retimeen(&mut self) -> RETIMEEN_W<10> { - RETIMEEN_W::new(self) + pub fn retimeen(&mut self) -> RetimeenW { + RetimeenW::new(self, 10) } #[doc = "Bit 11 - Disable Timer Start/Stop/Reload output"] #[inline(always)] #[must_use] - pub fn dissyncout(&mut self) -> DISSYNCOUT_W<11> { - DISSYNCOUT_W::new(self) + pub fn dissyncout(&mut self) -> DissyncoutW { + DissyncoutW::new(self, 11) } #[doc = "Bit 16 - Always Track Inputs"] #[inline(always)] #[must_use] - pub fn ati(&mut self) -> ATI_W<16> { - ATI_W::new(self) + pub fn ati(&mut self) -> AtiW { + AtiW::new(self, 16) } #[doc = "Bit 17 - Reload-Start Sets COIST"] #[inline(always)] #[must_use] - pub fn rsscoist(&mut self) -> RSSCOIST_W<17> { - RSSCOIST_W::new(self) + pub fn rsscoist(&mut self) -> RsscoistW { + RsscoistW::new(self, 17) } #[doc = "Bits 18:27 - Prescaler Setting"] #[inline(always)] #[must_use] - pub fn presc(&mut self) -> PRESC_W<18> { - PRESC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn presc(&mut self) -> PrescW { + PrescW::new(self, 18) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cmd.rs index ca6d3b1..bf41157 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cmd.rs @@ -1,60 +1,35 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` writer - Start Timer"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STOP` writer - Stop Timer"] -pub type STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StopW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Start Timer"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Stop Timer"] #[inline(always)] #[must_use] - pub fn stop(&mut self) -> STOP_W<1> { - STOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stop(&mut self) -> StopW { + StopW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cnt.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cnt.rs index 6e69c3d..4064743 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cnt.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/cnt.rs @@ -1,80 +1,40 @@ #[doc = "Register `CNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CNT` reader - Counter Value"] -pub type CNT_R = crate::FieldReader; +pub type CntR = crate::FieldReader; #[doc = "Field `CNT` writer - Counter Value"] -pub type CNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CNT_SPEC, u32, u32, 32, O>; +pub type CntW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Counter Value"] #[inline(always)] - pub fn cnt(&self) -> CNT_R { - CNT_R::new(self.bits) + pub fn cnt(&self) -> CntR { + CntR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Counter Value"] #[inline(always)] #[must_use] - pub fn cnt(&mut self) -> CNT_W<0> { - CNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cnt(&mut self) -> CntW { + CntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](index.html) module"] -pub struct CNT_SPEC; -impl crate::RegisterSpec for CNT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CntSpec; +impl crate::RegisterSpec for CntSpec { type Ux = u32; } -#[doc = "`read()` method returns [cnt::R](R) reader structure"] -impl crate::Readable for CNT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnt::W](W) writer structure"] -impl crate::Writable for CNT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cnt::R`](R) reader structure"] +impl crate::Readable for CntSpec {} +#[doc = "`write(|w| ..)` method takes [`cnt::W`](W) writer structure"] +impl crate::Writable for CntSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNT to value 0"] -impl crate::Resettable for CNT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CntSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/ctrl.rs index 08e646b..e2ed153 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/ctrl.rs @@ -1,258 +1,234 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `RISEA` reader - Timer Rising Input Edge Action"] -pub type RISEA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Timer Rising Input Edge Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RISEA_A { +pub enum Risea { #[doc = "0: No action"] - NONE = 0, + None = 0, #[doc = "1: Start counter without reload"] - START = 1, + Start = 1, #[doc = "2: Stop counter without reload"] - STOP = 2, + Stop = 2, #[doc = "3: Reload and start counter"] - RELOADSTART = 3, + Reloadstart = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RISEA_A) -> Self { + fn from(variant: Risea) -> Self { variant as _ } } -impl RISEA_R { +impl crate::FieldSpec for Risea { + type Ux = u8; +} +impl crate::IsEnum for Risea {} +#[doc = "Field `RISEA` reader - Timer Rising Input Edge Action"] +pub type RiseaR = crate::FieldReader; +impl RiseaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RISEA_A { + pub const fn variant(&self) -> Risea { match self.bits { - 0 => RISEA_A::NONE, - 1 => RISEA_A::START, - 2 => RISEA_A::STOP, - 3 => RISEA_A::RELOADSTART, + 0 => Risea::None, + 1 => Risea::Start, + 2 => Risea::Stop, + 3 => Risea::Reloadstart, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == RISEA_A::NONE + *self == Risea::None } - #[doc = "Checks if the value of the field is `START`"] + #[doc = "Start counter without reload"] #[inline(always)] pub fn is_start(&self) -> bool { - *self == RISEA_A::START + *self == Risea::Start } - #[doc = "Checks if the value of the field is `STOP`"] + #[doc = "Stop counter without reload"] #[inline(always)] pub fn is_stop(&self) -> bool { - *self == RISEA_A::STOP + *self == Risea::Stop } - #[doc = "Checks if the value of the field is `RELOADSTART`"] + #[doc = "Reload and start counter"] #[inline(always)] pub fn is_reloadstart(&self) -> bool { - *self == RISEA_A::RELOADSTART + *self == Risea::Reloadstart } } #[doc = "Field `RISEA` writer - Timer Rising Input Edge Action"] -pub type RISEA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, RISEA_A, 2, O>; -impl<'a, const O: u8> RISEA_W<'a, O> { +pub type RiseaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Risea, crate::Safe>; +impl<'a, REG> RiseaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(RISEA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Risea::None) } #[doc = "Start counter without reload"] #[inline(always)] - pub fn start(self) -> &'a mut W { - self.variant(RISEA_A::START) + pub fn start(self) -> &'a mut crate::W { + self.variant(Risea::Start) } #[doc = "Stop counter without reload"] #[inline(always)] - pub fn stop(self) -> &'a mut W { - self.variant(RISEA_A::STOP) + pub fn stop(self) -> &'a mut crate::W { + self.variant(Risea::Stop) } #[doc = "Reload and start counter"] #[inline(always)] - pub fn reloadstart(self) -> &'a mut W { - self.variant(RISEA_A::RELOADSTART) + pub fn reloadstart(self) -> &'a mut crate::W { + self.variant(Risea::Reloadstart) } } -#[doc = "Field `FALLA` reader - Timer Falling Input Edge Action"] -pub type FALLA_R = crate::FieldReader; #[doc = "Timer Falling Input Edge Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FALLA_A { +pub enum Falla { #[doc = "0: No action"] - NONE = 0, + None = 0, #[doc = "1: Start counter without reload"] - START = 1, + Start = 1, #[doc = "2: Stop counter without reload"] - STOP = 2, + Stop = 2, #[doc = "3: Reload and start counter"] - RELOADSTART = 3, + Reloadstart = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FALLA_A) -> Self { + fn from(variant: Falla) -> Self { variant as _ } } -impl FALLA_R { +impl crate::FieldSpec for Falla { + type Ux = u8; +} +impl crate::IsEnum for Falla {} +#[doc = "Field `FALLA` reader - Timer Falling Input Edge Action"] +pub type FallaR = crate::FieldReader; +impl FallaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FALLA_A { + pub const fn variant(&self) -> Falla { match self.bits { - 0 => FALLA_A::NONE, - 1 => FALLA_A::START, - 2 => FALLA_A::STOP, - 3 => FALLA_A::RELOADSTART, + 0 => Falla::None, + 1 => Falla::Start, + 2 => Falla::Stop, + 3 => Falla::Reloadstart, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == FALLA_A::NONE + *self == Falla::None } - #[doc = "Checks if the value of the field is `START`"] + #[doc = "Start counter without reload"] #[inline(always)] pub fn is_start(&self) -> bool { - *self == FALLA_A::START + *self == Falla::Start } - #[doc = "Checks if the value of the field is `STOP`"] + #[doc = "Stop counter without reload"] #[inline(always)] pub fn is_stop(&self) -> bool { - *self == FALLA_A::STOP + *self == Falla::Stop } - #[doc = "Checks if the value of the field is `RELOADSTART`"] + #[doc = "Reload and start counter"] #[inline(always)] pub fn is_reloadstart(&self) -> bool { - *self == FALLA_A::RELOADSTART + *self == Falla::Reloadstart } } #[doc = "Field `FALLA` writer - Timer Falling Input Edge Action"] -pub type FALLA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, FALLA_A, 2, O>; -impl<'a, const O: u8> FALLA_W<'a, O> { +pub type FallaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Falla, crate::Safe>; +impl<'a, REG> FallaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(FALLA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Falla::None) } #[doc = "Start counter without reload"] #[inline(always)] - pub fn start(self) -> &'a mut W { - self.variant(FALLA_A::START) + pub fn start(self) -> &'a mut crate::W { + self.variant(Falla::Start) } #[doc = "Stop counter without reload"] #[inline(always)] - pub fn stop(self) -> &'a mut W { - self.variant(FALLA_A::STOP) + pub fn stop(self) -> &'a mut crate::W { + self.variant(Falla::Stop) } #[doc = "Reload and start counter"] #[inline(always)] - pub fn reloadstart(self) -> &'a mut W { - self.variant(FALLA_A::RELOADSTART) + pub fn reloadstart(self) -> &'a mut crate::W { + self.variant(Falla::Reloadstart) } } #[doc = "Field `X2CNT` reader - 2x Count Mode"] -pub type X2CNT_R = crate::BitReader; +pub type X2cntR = crate::BitReader; #[doc = "Field `X2CNT` writer - 2x Count Mode"] -pub type X2CNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type X2cntW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - Timer Rising Input Edge Action"] #[inline(always)] - pub fn risea(&self) -> RISEA_R { - RISEA_R::new((self.bits & 3) as u8) + pub fn risea(&self) -> RiseaR { + RiseaR::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Timer Falling Input Edge Action"] #[inline(always)] - pub fn falla(&self) -> FALLA_R { - FALLA_R::new(((self.bits >> 2) & 3) as u8) + pub fn falla(&self) -> FallaR { + FallaR::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bit 4 - 2x Count Mode"] #[inline(always)] - pub fn x2cnt(&self) -> X2CNT_R { - X2CNT_R::new(((self.bits >> 4) & 1) != 0) + pub fn x2cnt(&self) -> X2cntR { + X2cntR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Timer Rising Input Edge Action"] #[inline(always)] #[must_use] - pub fn risea(&mut self) -> RISEA_W<0> { - RISEA_W::new(self) + pub fn risea(&mut self) -> RiseaW { + RiseaW::new(self, 0) } #[doc = "Bits 2:3 - Timer Falling Input Edge Action"] #[inline(always)] #[must_use] - pub fn falla(&mut self) -> FALLA_W<2> { - FALLA_W::new(self) + pub fn falla(&mut self) -> FallaW { + FallaW::new(self, 2) } #[doc = "Bit 4 - 2x Count Mode"] #[inline(always)] #[must_use] - pub fn x2cnt(&mut self) -> X2CNT_W<4> { - X2CNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn x2cnt(&mut self) -> X2cntW { + X2cntW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtcfg.rs index d19a9a3..82b97e1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtcfg.rs @@ -1,186 +1,149 @@ #[doc = "Register `DTCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTEN` reader - DTI Enable"] -pub type DTEN_R = crate::BitReader; +pub type DtenR = crate::BitReader; #[doc = "Field `DTEN` writer - DTI Enable"] -pub type DTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; -#[doc = "Field `DTDAS` reader - DTI Automatic Start-up Functionality"] -pub type DTDAS_R = crate::BitReader; +pub type DtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "DTI Automatic Start-up Functionality\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DTDAS_A { +pub enum Dtdas { #[doc = "0: No DTI restart on debugger exit"] - NORESTART = 0, + Norestart = 0, #[doc = "1: DTI restart on debugger exit"] - RESTART = 1, + Restart = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DTDAS_A) -> Self { + fn from(variant: Dtdas) -> Self { variant as u8 != 0 } } -impl DTDAS_R { +#[doc = "Field `DTDAS` reader - DTI Automatic Start-up Functionality"] +pub type DtdasR = crate::BitReader; +impl DtdasR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTDAS_A { + pub const fn variant(&self) -> Dtdas { match self.bits { - false => DTDAS_A::NORESTART, - true => DTDAS_A::RESTART, + false => Dtdas::Norestart, + true => Dtdas::Restart, } } - #[doc = "Checks if the value of the field is `NORESTART`"] + #[doc = "No DTI restart on debugger exit"] #[inline(always)] pub fn is_norestart(&self) -> bool { - *self == DTDAS_A::NORESTART + *self == Dtdas::Norestart } - #[doc = "Checks if the value of the field is `RESTART`"] + #[doc = "DTI restart on debugger exit"] #[inline(always)] pub fn is_restart(&self) -> bool { - *self == DTDAS_A::RESTART + *self == Dtdas::Restart } } #[doc = "Field `DTDAS` writer - DTI Automatic Start-up Functionality"] -pub type DTDAS_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, DTDAS_A, O>; -impl<'a, const O: u8> DTDAS_W<'a, O> { +pub type DtdasW<'a, REG> = crate::BitWriter<'a, REG, Dtdas>; +impl<'a, REG> DtdasW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No DTI restart on debugger exit"] #[inline(always)] - pub fn norestart(self) -> &'a mut W { - self.variant(DTDAS_A::NORESTART) + pub fn norestart(self) -> &'a mut crate::W { + self.variant(Dtdas::Norestart) } #[doc = "DTI restart on debugger exit"] #[inline(always)] - pub fn restart(self) -> &'a mut W { - self.variant(DTDAS_A::RESTART) + pub fn restart(self) -> &'a mut crate::W { + self.variant(Dtdas::Restart) } } #[doc = "Field `DTAR` reader - DTI Always Run"] -pub type DTAR_R = crate::BitReader; +pub type DtarR = crate::BitReader; #[doc = "Field `DTAR` writer - DTI Always Run"] -pub type DTAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtarW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTFATS` reader - DTI Fault Action on Timer Stop"] -pub type DTFATS_R = crate::BitReader; +pub type DtfatsR = crate::BitReader; #[doc = "Field `DTFATS` writer - DTI Fault Action on Timer Stop"] -pub type DTFATS_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtfatsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRSEN` reader - DTI PRS Source Enable"] -pub type DTPRSEN_R = crate::BitReader; +pub type DtprsenR = crate::BitReader; #[doc = "Field `DTPRSEN` writer - DTI PRS Source Enable"] -pub type DTPRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtprsenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI Enable"] #[inline(always)] - pub fn dten(&self) -> DTEN_R { - DTEN_R::new((self.bits & 1) != 0) + pub fn dten(&self) -> DtenR { + DtenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI Automatic Start-up Functionality"] #[inline(always)] - pub fn dtdas(&self) -> DTDAS_R { - DTDAS_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtdas(&self) -> DtdasR { + DtdasR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 9 - DTI Always Run"] #[inline(always)] - pub fn dtar(&self) -> DTAR_R { - DTAR_R::new(((self.bits >> 9) & 1) != 0) + pub fn dtar(&self) -> DtarR { + DtarR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - DTI Fault Action on Timer Stop"] #[inline(always)] - pub fn dtfats(&self) -> DTFATS_R { - DTFATS_R::new(((self.bits >> 10) & 1) != 0) + pub fn dtfats(&self) -> DtfatsR { + DtfatsR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - DTI PRS Source Enable"] #[inline(always)] - pub fn dtprsen(&self) -> DTPRSEN_R { - DTPRSEN_R::new(((self.bits >> 11) & 1) != 0) + pub fn dtprsen(&self) -> DtprsenR { + DtprsenR::new(((self.bits >> 11) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI Enable"] #[inline(always)] #[must_use] - pub fn dten(&mut self) -> DTEN_W<0> { - DTEN_W::new(self) + pub fn dten(&mut self) -> DtenW { + DtenW::new(self, 0) } #[doc = "Bit 1 - DTI Automatic Start-up Functionality"] #[inline(always)] #[must_use] - pub fn dtdas(&mut self) -> DTDAS_W<1> { - DTDAS_W::new(self) + pub fn dtdas(&mut self) -> DtdasW { + DtdasW::new(self, 1) } #[doc = "Bit 9 - DTI Always Run"] #[inline(always)] #[must_use] - pub fn dtar(&mut self) -> DTAR_W<9> { - DTAR_W::new(self) + pub fn dtar(&mut self) -> DtarW { + DtarW::new(self, 9) } #[doc = "Bit 10 - DTI Fault Action on Timer Stop"] #[inline(always)] #[must_use] - pub fn dtfats(&mut self) -> DTFATS_W<10> { - DTFATS_W::new(self) + pub fn dtfats(&mut self) -> DtfatsW { + DtfatsW::new(self, 10) } #[doc = "Bit 11 - DTI PRS Source Enable"] #[inline(always)] #[must_use] - pub fn dtprsen(&mut self) -> DTPRSEN_W<11> { - DTPRSEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtprsen(&mut self) -> DtprsenW { + DtprsenW::new(self, 11) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtcfg](index.html) module"] -pub struct DTCFG_SPEC; -impl crate::RegisterSpec for DTCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtcfgSpec; +impl crate::RegisterSpec for DtcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtcfg::R](R) reader structure"] -impl crate::Readable for DTCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtcfg::W](W) writer structure"] -impl crate::Writable for DTCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtcfg::R`](R) reader structure"] +impl crate::Readable for DtcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dtcfg::W`](W) writer structure"] +impl crate::Writable for DtcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTCFG to value 0"] -impl crate::Resettable for DTCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtctrl.rs index 816a05e..84f6d17 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtctrl.rs @@ -1,95 +1,55 @@ #[doc = "Register `DTCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTCINV` reader - DTI Complementary Output Invert."] -pub type DTCINV_R = crate::BitReader; +pub type DtcinvR = crate::BitReader; #[doc = "Field `DTCINV` writer - DTI Complementary Output Invert."] -pub type DTCINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, O>; +pub type DtcinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTIPOL` reader - DTI Inactive Polarity"] -pub type DTIPOL_R = crate::BitReader; +pub type DtipolR = crate::BitReader; #[doc = "Field `DTIPOL` writer - DTI Inactive Polarity"] -pub type DTIPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, O>; +pub type DtipolW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI Complementary Output Invert."] #[inline(always)] - pub fn dtcinv(&self) -> DTCINV_R { - DTCINV_R::new((self.bits & 1) != 0) + pub fn dtcinv(&self) -> DtcinvR { + DtcinvR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI Inactive Polarity"] #[inline(always)] - pub fn dtipol(&self) -> DTIPOL_R { - DTIPOL_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtipol(&self) -> DtipolR { + DtipolR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI Complementary Output Invert."] #[inline(always)] #[must_use] - pub fn dtcinv(&mut self) -> DTCINV_W<0> { - DTCINV_W::new(self) + pub fn dtcinv(&mut self) -> DtcinvW { + DtcinvW::new(self, 0) } #[doc = "Bit 1 - DTI Inactive Polarity"] #[inline(always)] #[must_use] - pub fn dtipol(&mut self) -> DTIPOL_W<1> { - DTIPOL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtipol(&mut self) -> DtipolW { + DtipolW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtctrl](index.html) module"] -pub struct DTCTRL_SPEC; -impl crate::RegisterSpec for DTCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtctrlSpec; +impl crate::RegisterSpec for DtctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtctrl::R](R) reader structure"] -impl crate::Readable for DTCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtctrl::W](W) writer structure"] -impl crate::Writable for DTCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtctrl::R`](R) reader structure"] +impl crate::Readable for DtctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`dtctrl::W`](W) writer structure"] +impl crate::Writable for DtctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTCTRL to value 0"] -impl crate::Resettable for DTCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtfault.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtfault.rs index 01a53f9..ecd21aa 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtfault.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtfault.rs @@ -1,65 +1,50 @@ #[doc = "Register `DTFAULT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DTPRS0F` reader - DTI PRS 0 Fault"] -pub type DTPRS0F_R = crate::BitReader; +pub type Dtprs0fR = crate::BitReader; #[doc = "Field `DTPRS1F` reader - DTI PRS 1 Fault"] -pub type DTPRS1F_R = crate::BitReader; +pub type Dtprs1fR = crate::BitReader; #[doc = "Field `DTDBGF` reader - DTI Debugger Fault"] -pub type DTDBGF_R = crate::BitReader; +pub type DtdbgfR = crate::BitReader; #[doc = "Field `DTLOCKUPF` reader - DTI Lockup Fault"] -pub type DTLOCKUPF_R = crate::BitReader; +pub type DtlockupfR = crate::BitReader; #[doc = "Field `DTEM23F` reader - DTI EM23 Entry Fault"] -pub type DTEM23F_R = crate::BitReader; +pub type Dtem23fR = crate::BitReader; impl R { #[doc = "Bit 0 - DTI PRS 0 Fault"] #[inline(always)] - pub fn dtprs0f(&self) -> DTPRS0F_R { - DTPRS0F_R::new((self.bits & 1) != 0) + pub fn dtprs0f(&self) -> Dtprs0fR { + Dtprs0fR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI PRS 1 Fault"] #[inline(always)] - pub fn dtprs1f(&self) -> DTPRS1F_R { - DTPRS1F_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtprs1f(&self) -> Dtprs1fR { + Dtprs1fR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DTI Debugger Fault"] #[inline(always)] - pub fn dtdbgf(&self) -> DTDBGF_R { - DTDBGF_R::new(((self.bits >> 2) & 1) != 0) + pub fn dtdbgf(&self) -> DtdbgfR { + DtdbgfR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DTI Lockup Fault"] #[inline(always)] - pub fn dtlockupf(&self) -> DTLOCKUPF_R { - DTLOCKUPF_R::new(((self.bits >> 3) & 1) != 0) + pub fn dtlockupf(&self) -> DtlockupfR { + DtlockupfR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - DTI EM23 Entry Fault"] #[inline(always)] - pub fn dtem23f(&self) -> DTEM23F_R { - DTEM23F_R::new(((self.bits >> 4) & 1) != 0) + pub fn dtem23f(&self) -> Dtem23fR { + Dtem23fR::new(((self.bits >> 4) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfault](index.html) module"] -pub struct DTFAULT_SPEC; -impl crate::RegisterSpec for DTFAULT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfault::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfaultSpec; +impl crate::RegisterSpec for DtfaultSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtfault::R](R) reader structure"] -impl crate::Readable for DTFAULT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`dtfault::R`](R) reader structure"] +impl crate::Readable for DtfaultSpec {} #[doc = "`reset()` method sets DTFAULT to value 0"] -impl crate::Resettable for DTFAULT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfaultSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtfaultc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtfaultc.rs index 1c3d1ba..bcb21e2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtfaultc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtfaultc.rs @@ -1,84 +1,59 @@ #[doc = "Register `DTFAULTC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTPRS0FC` writer - DTI PRS0 Fault Clear"] -pub type DTPRS0FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtprs0fcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRS1FC` writer - DTI PRS1 Fault Clear"] -pub type DTPRS1FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtprs1fcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTDBGFC` writer - DTI Debugger Fault Clear"] -pub type DTDBGFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type DtdbgfcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTLOCKUPFC` writer - DTI Lockup Fault Clear"] -pub type DTLOCKUPFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type DtlockupfcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTEM23FC` writer - DTI EM23 Fault Clear"] -pub type DTEM23FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtem23fcW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - DTI PRS0 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtprs0fc(&mut self) -> DTPRS0FC_W<0> { - DTPRS0FC_W::new(self) + pub fn dtprs0fc(&mut self) -> Dtprs0fcW { + Dtprs0fcW::new(self, 0) } #[doc = "Bit 1 - DTI PRS1 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtprs1fc(&mut self) -> DTPRS1FC_W<1> { - DTPRS1FC_W::new(self) + pub fn dtprs1fc(&mut self) -> Dtprs1fcW { + Dtprs1fcW::new(self, 1) } #[doc = "Bit 2 - DTI Debugger Fault Clear"] #[inline(always)] #[must_use] - pub fn dtdbgfc(&mut self) -> DTDBGFC_W<2> { - DTDBGFC_W::new(self) + pub fn dtdbgfc(&mut self) -> DtdbgfcW { + DtdbgfcW::new(self, 2) } #[doc = "Bit 3 - DTI Lockup Fault Clear"] #[inline(always)] #[must_use] - pub fn dtlockupfc(&mut self) -> DTLOCKUPFC_W<3> { - DTLOCKUPFC_W::new(self) + pub fn dtlockupfc(&mut self) -> DtlockupfcW { + DtlockupfcW::new(self, 3) } #[doc = "Bit 4 - DTI EM23 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtem23fc(&mut self) -> DTEM23FC_W<4> { - DTEM23FC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtem23fc(&mut self) -> Dtem23fcW { + Dtem23fcW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfaultc](index.html) module"] -pub struct DTFAULTC_SPEC; -impl crate::RegisterSpec for DTFAULTC_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfaultc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfaultcSpec; +impl crate::RegisterSpec for DtfaultcSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [dtfaultc::W](W) writer structure"] -impl crate::Writable for DTFAULTC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`dtfaultc::W`](W) writer structure"] +impl crate::Writable for DtfaultcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTFAULTC to value 0"] -impl crate::Resettable for DTFAULTC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfaultcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtfcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtfcfg.rs index 91dee4b..6179df8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtfcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtfcfg.rs @@ -1,229 +1,197 @@ #[doc = "Register `DTFCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTFCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DTFA` reader - DTI Fault Action"] -pub type DTFA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DTI Fault Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DTFA_A { +pub enum Dtfa { #[doc = "0: No action on fault"] - NONE = 0, + None = 0, #[doc = "1: Set outputs inactive"] - INACTIVE = 1, + Inactive = 1, #[doc = "2: Clear outputs"] - CLEAR = 2, + Clear = 2, #[doc = "3: Tristate outputs"] - TRISTATE = 3, + Tristate = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DTFA_A) -> Self { + fn from(variant: Dtfa) -> Self { variant as _ } } -impl DTFA_R { +impl crate::FieldSpec for Dtfa { + type Ux = u8; +} +impl crate::IsEnum for Dtfa {} +#[doc = "Field `DTFA` reader - DTI Fault Action"] +pub type DtfaR = crate::FieldReader; +impl DtfaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTFA_A { + pub const fn variant(&self) -> Dtfa { match self.bits { - 0 => DTFA_A::NONE, - 1 => DTFA_A::INACTIVE, - 2 => DTFA_A::CLEAR, - 3 => DTFA_A::TRISTATE, + 0 => Dtfa::None, + 1 => Dtfa::Inactive, + 2 => Dtfa::Clear, + 3 => Dtfa::Tristate, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on fault"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == DTFA_A::NONE + *self == Dtfa::None } - #[doc = "Checks if the value of the field is `INACTIVE`"] + #[doc = "Set outputs inactive"] #[inline(always)] pub fn is_inactive(&self) -> bool { - *self == DTFA_A::INACTIVE + *self == Dtfa::Inactive } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear outputs"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == DTFA_A::CLEAR + *self == Dtfa::Clear } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "Tristate outputs"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == DTFA_A::TRISTATE + *self == Dtfa::Tristate } } #[doc = "Field `DTFA` writer - DTI Fault Action"] -pub type DTFA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, DTFCFG_SPEC, u8, DTFA_A, 2, O>; -impl<'a, const O: u8> DTFA_W<'a, O> { +pub type DtfaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dtfa, crate::Safe>; +impl<'a, REG> DtfaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on fault"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(DTFA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Dtfa::None) } #[doc = "Set outputs inactive"] #[inline(always)] - pub fn inactive(self) -> &'a mut W { - self.variant(DTFA_A::INACTIVE) + pub fn inactive(self) -> &'a mut crate::W { + self.variant(Dtfa::Inactive) } #[doc = "Clear outputs"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(DTFA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Dtfa::Clear) } #[doc = "Tristate outputs"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(DTFA_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Dtfa::Tristate) } } #[doc = "Field `DTPRS0FEN` reader - DTI PRS 0 Fault Enable"] -pub type DTPRS0FEN_R = crate::BitReader; +pub type Dtprs0fenR = crate::BitReader; #[doc = "Field `DTPRS0FEN` writer - DTI PRS 0 Fault Enable"] -pub type DTPRS0FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtprs0fenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRS1FEN` reader - DTI PRS 1 Fault Enable"] -pub type DTPRS1FEN_R = crate::BitReader; +pub type Dtprs1fenR = crate::BitReader; #[doc = "Field `DTPRS1FEN` writer - DTI PRS 1 Fault Enable"] -pub type DTPRS1FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtprs1fenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTDBGFEN` reader - DTI Debugger Fault Enable"] -pub type DTDBGFEN_R = crate::BitReader; +pub type DtdbgfenR = crate::BitReader; #[doc = "Field `DTDBGFEN` writer - DTI Debugger Fault Enable"] -pub type DTDBGFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type DtdbgfenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTLOCKUPFEN` reader - DTI Lockup Fault Enable"] -pub type DTLOCKUPFEN_R = crate::BitReader; +pub type DtlockupfenR = crate::BitReader; #[doc = "Field `DTLOCKUPFEN` writer - DTI Lockup Fault Enable"] -pub type DTLOCKUPFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type DtlockupfenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTEM23FEN` reader - DTI EM23 Fault Enable"] -pub type DTEM23FEN_R = crate::BitReader; +pub type Dtem23fenR = crate::BitReader; #[doc = "Field `DTEM23FEN` writer - DTI EM23 Fault Enable"] -pub type DTEM23FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtem23fenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 16:17 - DTI Fault Action"] #[inline(always)] - pub fn dtfa(&self) -> DTFA_R { - DTFA_R::new(((self.bits >> 16) & 3) as u8) + pub fn dtfa(&self) -> DtfaR { + DtfaR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 24 - DTI PRS 0 Fault Enable"] #[inline(always)] - pub fn dtprs0fen(&self) -> DTPRS0FEN_R { - DTPRS0FEN_R::new(((self.bits >> 24) & 1) != 0) + pub fn dtprs0fen(&self) -> Dtprs0fenR { + Dtprs0fenR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - DTI PRS 1 Fault Enable"] #[inline(always)] - pub fn dtprs1fen(&self) -> DTPRS1FEN_R { - DTPRS1FEN_R::new(((self.bits >> 25) & 1) != 0) + pub fn dtprs1fen(&self) -> Dtprs1fenR { + Dtprs1fenR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - DTI Debugger Fault Enable"] #[inline(always)] - pub fn dtdbgfen(&self) -> DTDBGFEN_R { - DTDBGFEN_R::new(((self.bits >> 26) & 1) != 0) + pub fn dtdbgfen(&self) -> DtdbgfenR { + DtdbgfenR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - DTI Lockup Fault Enable"] #[inline(always)] - pub fn dtlockupfen(&self) -> DTLOCKUPFEN_R { - DTLOCKUPFEN_R::new(((self.bits >> 27) & 1) != 0) + pub fn dtlockupfen(&self) -> DtlockupfenR { + DtlockupfenR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - DTI EM23 Fault Enable"] #[inline(always)] - pub fn dtem23fen(&self) -> DTEM23FEN_R { - DTEM23FEN_R::new(((self.bits >> 28) & 1) != 0) + pub fn dtem23fen(&self) -> Dtem23fenR { + Dtem23fenR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bits 16:17 - DTI Fault Action"] #[inline(always)] #[must_use] - pub fn dtfa(&mut self) -> DTFA_W<16> { - DTFA_W::new(self) + pub fn dtfa(&mut self) -> DtfaW { + DtfaW::new(self, 16) } #[doc = "Bit 24 - DTI PRS 0 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtprs0fen(&mut self) -> DTPRS0FEN_W<24> { - DTPRS0FEN_W::new(self) + pub fn dtprs0fen(&mut self) -> Dtprs0fenW { + Dtprs0fenW::new(self, 24) } #[doc = "Bit 25 - DTI PRS 1 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtprs1fen(&mut self) -> DTPRS1FEN_W<25> { - DTPRS1FEN_W::new(self) + pub fn dtprs1fen(&mut self) -> Dtprs1fenW { + Dtprs1fenW::new(self, 25) } #[doc = "Bit 26 - DTI Debugger Fault Enable"] #[inline(always)] #[must_use] - pub fn dtdbgfen(&mut self) -> DTDBGFEN_W<26> { - DTDBGFEN_W::new(self) + pub fn dtdbgfen(&mut self) -> DtdbgfenW { + DtdbgfenW::new(self, 26) } #[doc = "Bit 27 - DTI Lockup Fault Enable"] #[inline(always)] #[must_use] - pub fn dtlockupfen(&mut self) -> DTLOCKUPFEN_W<27> { - DTLOCKUPFEN_W::new(self) + pub fn dtlockupfen(&mut self) -> DtlockupfenW { + DtlockupfenW::new(self, 27) } #[doc = "Bit 28 - DTI EM23 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtem23fen(&mut self) -> DTEM23FEN_W<28> { - DTEM23FEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtem23fen(&mut self) -> Dtem23fenW { + Dtem23fenW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfcfg](index.html) module"] -pub struct DTFCFG_SPEC; -impl crate::RegisterSpec for DTFCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfcfgSpec; +impl crate::RegisterSpec for DtfcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtfcfg::R](R) reader structure"] -impl crate::Readable for DTFCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtfcfg::W](W) writer structure"] -impl crate::Writable for DTFCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtfcfg::R`](R) reader structure"] +impl crate::Readable for DtfcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dtfcfg::W`](W) writer structure"] +impl crate::Writable for DtfcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTFCFG to value 0"] -impl crate::Resettable for DTFCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtlock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtlock.rs index 434789a..5ce63f5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtlock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtlock.rs @@ -1,73 +1,55 @@ #[doc = "Register `DTLOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "DTI Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum DTILOCKKEY_AW { +pub enum Dtilockkey { #[doc = "52864: Write to unlock TIMER DTI registers"] - UNLOCK = 52864, + Unlock = 52864, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: DTILOCKKEY_AW) -> Self { + fn from(variant: Dtilockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Dtilockkey { + type Ux = u16; +} +impl crate::IsEnum for Dtilockkey {} #[doc = "Field `DTILOCKKEY` writer - DTI Lock Key"] -pub type DTILOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, DTLOCK_SPEC, u16, DTILOCKKEY_AW, 16, O>; -impl<'a, const O: u8> DTILOCKKEY_W<'a, O> { +pub type DtilockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Dtilockkey>; +impl<'a, REG> DtilockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unlock TIMER DTI registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(DTILOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Dtilockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - DTI Lock Key"] #[inline(always)] #[must_use] - pub fn dtilockkey(&mut self) -> DTILOCKKEY_W<0> { - DTILOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtilockkey(&mut self) -> DtilockkeyW { + DtilockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtlock](index.html) module"] -pub struct DTLOCK_SPEC; -impl crate::RegisterSpec for DTLOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtlock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtlockSpec; +impl crate::RegisterSpec for DtlockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [dtlock::W](W) writer structure"] -impl crate::Writable for DTLOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`dtlock::W`](W) writer structure"] +impl crate::Writable for DtlockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTLOCK to value 0"] -impl crate::Resettable for DTLOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtlockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtogen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtogen.rs index 818b4bb..35926ca 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtogen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dtogen.rs @@ -1,155 +1,115 @@ #[doc = "Register `DTOGEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTOGEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTOGCC0EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC0EN_R = crate::BitReader; +pub type Dtogcc0enR = crate::BitReader; #[doc = "Field `DTOGCC0EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCC1EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC1EN_R = crate::BitReader; +pub type Dtogcc1enR = crate::BitReader; #[doc = "Field `DTOGCC1EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCC2EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC2EN_R = crate::BitReader; +pub type Dtogcc2enR = crate::BitReader; #[doc = "Field `DTOGCC2EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC2EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc2enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI0EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI0EN_R = crate::BitReader; +pub type Dtogcdti0enR = crate::BitReader; #[doc = "Field `DTOGCDTI0EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI1EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI1EN_R = crate::BitReader; +pub type Dtogcdti1enR = crate::BitReader; #[doc = "Field `DTOGCDTI1EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI2EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI2EN_R = crate::BitReader; +pub type Dtogcdti2enR = crate::BitReader; #[doc = "Field `DTOGCDTI2EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI2EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti2enW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc0en(&self) -> DTOGCC0EN_R { - DTOGCC0EN_R::new((self.bits & 1) != 0) + pub fn dtogcc0en(&self) -> Dtogcc0enR { + Dtogcc0enR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc1en(&self) -> DTOGCC1EN_R { - DTOGCC1EN_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtogcc1en(&self) -> Dtogcc1enR { + Dtogcc1enR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc2en(&self) -> DTOGCC2EN_R { - DTOGCC2EN_R::new(((self.bits >> 2) & 1) != 0) + pub fn dtogcc2en(&self) -> Dtogcc2enR { + Dtogcc2enR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti0en(&self) -> DTOGCDTI0EN_R { - DTOGCDTI0EN_R::new(((self.bits >> 3) & 1) != 0) + pub fn dtogcdti0en(&self) -> Dtogcdti0enR { + Dtogcdti0enR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti1en(&self) -> DTOGCDTI1EN_R { - DTOGCDTI1EN_R::new(((self.bits >> 4) & 1) != 0) + pub fn dtogcdti1en(&self) -> Dtogcdti1enR { + Dtogcdti1enR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti2en(&self) -> DTOGCDTI2EN_R { - DTOGCDTI2EN_R::new(((self.bits >> 5) & 1) != 0) + pub fn dtogcdti2en(&self) -> Dtogcdti2enR { + Dtogcdti2enR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc0en(&mut self) -> DTOGCC0EN_W<0> { - DTOGCC0EN_W::new(self) + pub fn dtogcc0en(&mut self) -> Dtogcc0enW { + Dtogcc0enW::new(self, 0) } #[doc = "Bit 1 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc1en(&mut self) -> DTOGCC1EN_W<1> { - DTOGCC1EN_W::new(self) + pub fn dtogcc1en(&mut self) -> Dtogcc1enW { + Dtogcc1enW::new(self, 1) } #[doc = "Bit 2 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc2en(&mut self) -> DTOGCC2EN_W<2> { - DTOGCC2EN_W::new(self) + pub fn dtogcc2en(&mut self) -> Dtogcc2enW { + Dtogcc2enW::new(self, 2) } #[doc = "Bit 3 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti0en(&mut self) -> DTOGCDTI0EN_W<3> { - DTOGCDTI0EN_W::new(self) + pub fn dtogcdti0en(&mut self) -> Dtogcdti0enW { + Dtogcdti0enW::new(self, 3) } #[doc = "Bit 4 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti1en(&mut self) -> DTOGCDTI1EN_W<4> { - DTOGCDTI1EN_W::new(self) + pub fn dtogcdti1en(&mut self) -> Dtogcdti1enW { + Dtogcdti1enW::new(self, 4) } #[doc = "Bit 5 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti2en(&mut self) -> DTOGCDTI2EN_W<5> { - DTOGCDTI2EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtogcdti2en(&mut self) -> Dtogcdti2enW { + Dtogcdti2enW::new(self, 5) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtogen](index.html) module"] -pub struct DTOGEN_SPEC; -impl crate::RegisterSpec for DTOGEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtogen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtogen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtogenSpec; +impl crate::RegisterSpec for DtogenSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtogen::R](R) reader structure"] -impl crate::Readable for DTOGEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtogen::W](W) writer structure"] -impl crate::Writable for DTOGEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtogen::R`](R) reader structure"] +impl crate::Readable for DtogenSpec {} +#[doc = "`write(|w| ..)` method takes [`dtogen::W`](W) writer structure"] +impl crate::Writable for DtogenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTOGEN to value 0"] -impl crate::Resettable for DTOGEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtogenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dttimecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dttimecfg.rs index 63e4c73..9577f86 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dttimecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/dttimecfg.rs @@ -1,110 +1,70 @@ #[doc = "Register `DTTIMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTTIMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTPRESC` reader - DTI Prescaler Setting"] -pub type DTPRESC_R = crate::FieldReader; +pub type DtprescR = crate::FieldReader; #[doc = "Field `DTPRESC` writer - DTI Prescaler Setting"] -pub type DTPRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u16, u16, 10, O>; +pub type DtprescW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `DTRISET` reader - DTI Rise-time"] -pub type DTRISET_R = crate::FieldReader; +pub type DtrisetR = crate::FieldReader; #[doc = "Field `DTRISET` writer - DTI Rise-time"] -pub type DTRISET_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u8, u8, 6, O>; +pub type DtrisetW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `DTFALLT` reader - DTI Fall-time"] -pub type DTFALLT_R = crate::FieldReader; +pub type DtfalltR = crate::FieldReader; #[doc = "Field `DTFALLT` writer - DTI Fall-time"] -pub type DTFALLT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u8, u8, 6, O>; +pub type DtfalltW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:9 - DTI Prescaler Setting"] #[inline(always)] - pub fn dtpresc(&self) -> DTPRESC_R { - DTPRESC_R::new((self.bits & 0x03ff) as u16) + pub fn dtpresc(&self) -> DtprescR { + DtprescR::new((self.bits & 0x03ff) as u16) } #[doc = "Bits 10:15 - DTI Rise-time"] #[inline(always)] - pub fn dtriset(&self) -> DTRISET_R { - DTRISET_R::new(((self.bits >> 10) & 0x3f) as u8) + pub fn dtriset(&self) -> DtrisetR { + DtrisetR::new(((self.bits >> 10) & 0x3f) as u8) } #[doc = "Bits 16:21 - DTI Fall-time"] #[inline(always)] - pub fn dtfallt(&self) -> DTFALLT_R { - DTFALLT_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn dtfallt(&self) -> DtfalltR { + DtfalltR::new(((self.bits >> 16) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:9 - DTI Prescaler Setting"] #[inline(always)] #[must_use] - pub fn dtpresc(&mut self) -> DTPRESC_W<0> { - DTPRESC_W::new(self) + pub fn dtpresc(&mut self) -> DtprescW { + DtprescW::new(self, 0) } #[doc = "Bits 10:15 - DTI Rise-time"] #[inline(always)] #[must_use] - pub fn dtriset(&mut self) -> DTRISET_W<10> { - DTRISET_W::new(self) + pub fn dtriset(&mut self) -> DtrisetW { + DtrisetW::new(self, 10) } #[doc = "Bits 16:21 - DTI Fall-time"] #[inline(always)] #[must_use] - pub fn dtfallt(&mut self) -> DTFALLT_W<16> { - DTFALLT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtfallt(&mut self) -> DtfalltW { + DtfalltW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dttimecfg](index.html) module"] -pub struct DTTIMECFG_SPEC; -impl crate::RegisterSpec for DTTIMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dttimecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dttimecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DttimecfgSpec; +impl crate::RegisterSpec for DttimecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dttimecfg::R](R) reader structure"] -impl crate::Readable for DTTIMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dttimecfg::W](W) writer structure"] -impl crate::Writable for DTTIMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dttimecfg::R`](R) reader structure"] +impl crate::Readable for DttimecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dttimecfg::W`](W) writer structure"] +impl crate::Writable for DttimecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTTIMECFG to value 0"] -impl crate::Resettable for DTTIMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DttimecfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/en.rs index 9392483..303507b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Timer Module Enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Timer Module Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Timer Module Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Timer Module Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/ien.rs index 66588d7..73273ef 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/ien.rs @@ -1,290 +1,250 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OF` reader - Overflow Interrupt Enable"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Enable"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UF` reader - Underflow Interrupt Enable"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Enable"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DIRCHG` reader - Direction Change Detect Interrupt Enable"] -pub type DIRCHG_R = crate::BitReader; +pub type DirchgR = crate::BitReader; #[doc = "Field `DIRCHG` writer - Direction Change Detect Interrupt Enable"] -pub type DIRCHG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type DirchgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC0` reader - CC0 Interrupt Enable"] -pub type CC0_R = crate::BitReader; +pub type Cc0R = crate::BitReader; #[doc = "Field `CC0` writer - CC0 Interrupt Enable"] -pub type CC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1` reader - CC1 Interrupt Enable"] -pub type CC1_R = crate::BitReader; +pub type Cc1R = crate::BitReader; #[doc = "Field `CC1` writer - CC1 Interrupt Enable"] -pub type CC1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2` reader - CC2 Interrupt Enable"] -pub type CC2_R = crate::BitReader; +pub type Cc2R = crate::BitReader; #[doc = "Field `CC2` writer - CC2 Interrupt Enable"] -pub type CC2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL0` reader - ICFWLFULL0 Interrupt Enable"] -pub type ICFWLFULL0_R = crate::BitReader; +pub type Icfwlfull0R = crate::BitReader; #[doc = "Field `ICFWLFULL0` writer - ICFWLFULL0 Interrupt Enable"] -pub type ICFWLFULL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL1` reader - ICFWLFULL1 Interrupt Enable"] -pub type ICFWLFULL1_R = crate::BitReader; +pub type Icfwlfull1R = crate::BitReader; #[doc = "Field `ICFWLFULL1` writer - ICFWLFULL1 Interrupt Enable"] -pub type ICFWLFULL1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL2` reader - ICFWLFULL2 Interrupt Enable"] -pub type ICFWLFULL2_R = crate::BitReader; +pub type Icfwlfull2R = crate::BitReader; #[doc = "Field `ICFWLFULL2` writer - ICFWLFULL2 Interrupt Enable"] -pub type ICFWLFULL2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF0` reader - ICFOF0 Interrupt Enable"] -pub type ICFOF0_R = crate::BitReader; +pub type Icfof0R = crate::BitReader; #[doc = "Field `ICFOF0` writer - ICFOF0 Interrupt Enable"] -pub type ICFOF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF1` reader - ICFOF1 Interrupt Enable"] -pub type ICFOF1_R = crate::BitReader; +pub type Icfof1R = crate::BitReader; #[doc = "Field `ICFOF1` writer - ICFOF1 Interrupt Enable"] -pub type ICFOF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF2` reader - ICFOF2 Interrupt Enable"] -pub type ICFOF2_R = crate::BitReader; +pub type Icfof2R = crate::BitReader; #[doc = "Field `ICFOF2` writer - ICFOF2 Interrupt Enable"] -pub type ICFOF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF0` reader - ICFUF0 Interrupt Enable"] -pub type ICFUF0_R = crate::BitReader; +pub type Icfuf0R = crate::BitReader; #[doc = "Field `ICFUF0` writer - ICFUF0 Interrupt Enable"] -pub type ICFUF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF1` reader - ICFUF1 Interrupt Enable"] -pub type ICFUF1_R = crate::BitReader; +pub type Icfuf1R = crate::BitReader; #[doc = "Field `ICFUF1` writer - ICFUF1 Interrupt Enable"] -pub type ICFUF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF2` reader - ICFUF2 Interrupt Enable"] -pub type ICFUF2_R = crate::BitReader; +pub type Icfuf2R = crate::BitReader; #[doc = "Field `ICFUF2` writer - ICFUF2 Interrupt Enable"] -pub type ICFUF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Enable"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new((self.bits & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Underflow Interrupt Enable"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new(((self.bits >> 1) & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Direction Change Detect Interrupt Enable"] #[inline(always)] - pub fn dirchg(&self) -> DIRCHG_R { - DIRCHG_R::new(((self.bits >> 2) & 1) != 0) + pub fn dirchg(&self) -> DirchgR { + DirchgR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - CC0 Interrupt Enable"] #[inline(always)] - pub fn cc0(&self) -> CC0_R { - CC0_R::new(((self.bits >> 4) & 1) != 0) + pub fn cc0(&self) -> Cc0R { + Cc0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CC1 Interrupt Enable"] #[inline(always)] - pub fn cc1(&self) -> CC1_R { - CC1_R::new(((self.bits >> 5) & 1) != 0) + pub fn cc1(&self) -> Cc1R { + Cc1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - CC2 Interrupt Enable"] #[inline(always)] - pub fn cc2(&self) -> CC2_R { - CC2_R::new(((self.bits >> 6) & 1) != 0) + pub fn cc2(&self) -> Cc2R { + Cc2R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 16 - ICFWLFULL0 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull0(&self) -> ICFWLFULL0_R { - ICFWLFULL0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfwlfull0(&self) -> Icfwlfull0R { + Icfwlfull0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - ICFWLFULL1 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull1(&self) -> ICFWLFULL1_R { - ICFWLFULL1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfwlfull1(&self) -> Icfwlfull1R { + Icfwlfull1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - ICFWLFULL2 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull2(&self) -> ICFWLFULL2_R { - ICFWLFULL2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfwlfull2(&self) -> Icfwlfull2R { + Icfwlfull2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - ICFOF0 Interrupt Enable"] #[inline(always)] - pub fn icfof0(&self) -> ICFOF0_R { - ICFOF0_R::new(((self.bits >> 20) & 1) != 0) + pub fn icfof0(&self) -> Icfof0R { + Icfof0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - ICFOF1 Interrupt Enable"] #[inline(always)] - pub fn icfof1(&self) -> ICFOF1_R { - ICFOF1_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfof1(&self) -> Icfof1R { + Icfof1R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - ICFOF2 Interrupt Enable"] #[inline(always)] - pub fn icfof2(&self) -> ICFOF2_R { - ICFOF2_R::new(((self.bits >> 22) & 1) != 0) + pub fn icfof2(&self) -> Icfof2R { + Icfof2R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 24 - ICFUF0 Interrupt Enable"] #[inline(always)] - pub fn icfuf0(&self) -> ICFUF0_R { - ICFUF0_R::new(((self.bits >> 24) & 1) != 0) + pub fn icfuf0(&self) -> Icfuf0R { + Icfuf0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - ICFUF1 Interrupt Enable"] #[inline(always)] - pub fn icfuf1(&self) -> ICFUF1_R { - ICFUF1_R::new(((self.bits >> 25) & 1) != 0) + pub fn icfuf1(&self) -> Icfuf1R { + Icfuf1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - ICFUF2 Interrupt Enable"] #[inline(always)] - pub fn icfuf2(&self) -> ICFUF2_R { - ICFUF2_R::new(((self.bits >> 26) & 1) != 0) + pub fn icfuf2(&self) -> Icfuf2R { + Icfuf2R::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<0> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 0) } #[doc = "Bit 1 - Underflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<1> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 1) } #[doc = "Bit 2 - Direction Change Detect Interrupt Enable"] #[inline(always)] #[must_use] - pub fn dirchg(&mut self) -> DIRCHG_W<2> { - DIRCHG_W::new(self) + pub fn dirchg(&mut self) -> DirchgW { + DirchgW::new(self, 2) } #[doc = "Bit 4 - CC0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc0(&mut self) -> CC0_W<4> { - CC0_W::new(self) + pub fn cc0(&mut self) -> Cc0W { + Cc0W::new(self, 4) } #[doc = "Bit 5 - CC1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc1(&mut self) -> CC1_W<5> { - CC1_W::new(self) + pub fn cc1(&mut self) -> Cc1W { + Cc1W::new(self, 5) } #[doc = "Bit 6 - CC2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc2(&mut self) -> CC2_W<6> { - CC2_W::new(self) + pub fn cc2(&mut self) -> Cc2W { + Cc2W::new(self, 6) } #[doc = "Bit 16 - ICFWLFULL0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull0(&mut self) -> ICFWLFULL0_W<16> { - ICFWLFULL0_W::new(self) + pub fn icfwlfull0(&mut self) -> Icfwlfull0W { + Icfwlfull0W::new(self, 16) } #[doc = "Bit 17 - ICFWLFULL1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull1(&mut self) -> ICFWLFULL1_W<17> { - ICFWLFULL1_W::new(self) + pub fn icfwlfull1(&mut self) -> Icfwlfull1W { + Icfwlfull1W::new(self, 17) } #[doc = "Bit 18 - ICFWLFULL2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull2(&mut self) -> ICFWLFULL2_W<18> { - ICFWLFULL2_W::new(self) + pub fn icfwlfull2(&mut self) -> Icfwlfull2W { + Icfwlfull2W::new(self, 18) } #[doc = "Bit 20 - ICFOF0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof0(&mut self) -> ICFOF0_W<20> { - ICFOF0_W::new(self) + pub fn icfof0(&mut self) -> Icfof0W { + Icfof0W::new(self, 20) } #[doc = "Bit 21 - ICFOF1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof1(&mut self) -> ICFOF1_W<21> { - ICFOF1_W::new(self) + pub fn icfof1(&mut self) -> Icfof1W { + Icfof1W::new(self, 21) } #[doc = "Bit 22 - ICFOF2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof2(&mut self) -> ICFOF2_W<22> { - ICFOF2_W::new(self) + pub fn icfof2(&mut self) -> Icfof2W { + Icfof2W::new(self, 22) } #[doc = "Bit 24 - ICFUF0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf0(&mut self) -> ICFUF0_W<24> { - ICFUF0_W::new(self) + pub fn icfuf0(&mut self) -> Icfuf0W { + Icfuf0W::new(self, 24) } #[doc = "Bit 25 - ICFUF1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf1(&mut self) -> ICFUF1_W<25> { - ICFUF1_W::new(self) + pub fn icfuf1(&mut self) -> Icfuf1W { + Icfuf1W::new(self, 25) } #[doc = "Bit 26 - ICFUF2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf2(&mut self) -> ICFUF2_W<26> { - ICFUF2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfuf2(&mut self) -> Icfuf2W { + Icfuf2W::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/if_.rs index edde0f3..fad1cd1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/if_.rs @@ -1,290 +1,250 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OF` reader - Overflow Interrupt Flag"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Flag"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UF` reader - Underflow Interrupt Flag"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Flag"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DIRCHG` reader - Direction Change Detect Interrupt Flag"] -pub type DIRCHG_R = crate::BitReader; +pub type DirchgR = crate::BitReader; #[doc = "Field `DIRCHG` writer - Direction Change Detect Interrupt Flag"] -pub type DIRCHG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type DirchgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC0` reader - Capture Compare Channel 0 Interrupt Flag"] -pub type CC0_R = crate::BitReader; +pub type Cc0R = crate::BitReader; #[doc = "Field `CC0` writer - Capture Compare Channel 0 Interrupt Flag"] -pub type CC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1` reader - Capture Compare Channel 1 Interrupt Flag"] -pub type CC1_R = crate::BitReader; +pub type Cc1R = crate::BitReader; #[doc = "Field `CC1` writer - Capture Compare Channel 1 Interrupt Flag"] -pub type CC1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2` reader - Capture Compare Channel 2 Interrupt Flag"] -pub type CC2_R = crate::BitReader; +pub type Cc2R = crate::BitReader; #[doc = "Field `CC2` writer - Capture Compare Channel 2 Interrupt Flag"] -pub type CC2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL0` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL0_R = crate::BitReader; +pub type Icfwlfull0R = crate::BitReader; #[doc = "Field `ICFWLFULL0` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL1` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL1_R = crate::BitReader; +pub type Icfwlfull1R = crate::BitReader; #[doc = "Field `ICFWLFULL1` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL2` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL2_R = crate::BitReader; +pub type Icfwlfull2R = crate::BitReader; #[doc = "Field `ICFWLFULL2` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF0` reader - Input Capture FIFO overflow"] -pub type ICFOF0_R = crate::BitReader; +pub type Icfof0R = crate::BitReader; #[doc = "Field `ICFOF0` writer - Input Capture FIFO overflow"] -pub type ICFOF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF1` reader - Input Capture FIFO overflow"] -pub type ICFOF1_R = crate::BitReader; +pub type Icfof1R = crate::BitReader; #[doc = "Field `ICFOF1` writer - Input Capture FIFO overflow"] -pub type ICFOF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF2` reader - Input Capture FIFO overflow"] -pub type ICFOF2_R = crate::BitReader; +pub type Icfof2R = crate::BitReader; #[doc = "Field `ICFOF2` writer - Input Capture FIFO overflow"] -pub type ICFOF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF0` reader - Input capture FIFO underflow"] -pub type ICFUF0_R = crate::BitReader; +pub type Icfuf0R = crate::BitReader; #[doc = "Field `ICFUF0` writer - Input capture FIFO underflow"] -pub type ICFUF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF1` reader - Input capture FIFO underflow"] -pub type ICFUF1_R = crate::BitReader; +pub type Icfuf1R = crate::BitReader; #[doc = "Field `ICFUF1` writer - Input capture FIFO underflow"] -pub type ICFUF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF2` reader - Input capture FIFO underflow"] -pub type ICFUF2_R = crate::BitReader; +pub type Icfuf2R = crate::BitReader; #[doc = "Field `ICFUF2` writer - Input capture FIFO underflow"] -pub type ICFUF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new((self.bits & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Underflow Interrupt Flag"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new(((self.bits >> 1) & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] - pub fn dirchg(&self) -> DIRCHG_R { - DIRCHG_R::new(((self.bits >> 2) & 1) != 0) + pub fn dirchg(&self) -> DirchgR { + DirchgR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Capture Compare Channel 0 Interrupt Flag"] #[inline(always)] - pub fn cc0(&self) -> CC0_R { - CC0_R::new(((self.bits >> 4) & 1) != 0) + pub fn cc0(&self) -> Cc0R { + Cc0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Capture Compare Channel 1 Interrupt Flag"] #[inline(always)] - pub fn cc1(&self) -> CC1_R { - CC1_R::new(((self.bits >> 5) & 1) != 0) + pub fn cc1(&self) -> Cc1R { + Cc1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Capture Compare Channel 2 Interrupt Flag"] #[inline(always)] - pub fn cc2(&self) -> CC2_R { - CC2_R::new(((self.bits >> 6) & 1) != 0) + pub fn cc2(&self) -> Cc2R { + Cc2R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 16 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull0(&self) -> ICFWLFULL0_R { - ICFWLFULL0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfwlfull0(&self) -> Icfwlfull0R { + Icfwlfull0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull1(&self) -> ICFWLFULL1_R { - ICFWLFULL1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfwlfull1(&self) -> Icfwlfull1R { + Icfwlfull1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull2(&self) -> ICFWLFULL2_R { - ICFWLFULL2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfwlfull2(&self) -> Icfwlfull2R { + Icfwlfull2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof0(&self) -> ICFOF0_R { - ICFOF0_R::new(((self.bits >> 20) & 1) != 0) + pub fn icfof0(&self) -> Icfof0R { + Icfof0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof1(&self) -> ICFOF1_R { - ICFOF1_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfof1(&self) -> Icfof1R { + Icfof1R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof2(&self) -> ICFOF2_R { - ICFOF2_R::new(((self.bits >> 22) & 1) != 0) + pub fn icfof2(&self) -> Icfof2R { + Icfof2R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 24 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf0(&self) -> ICFUF0_R { - ICFUF0_R::new(((self.bits >> 24) & 1) != 0) + pub fn icfuf0(&self) -> Icfuf0R { + Icfuf0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf1(&self) -> ICFUF1_R { - ICFUF1_R::new(((self.bits >> 25) & 1) != 0) + pub fn icfuf1(&self) -> Icfuf1R { + Icfuf1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf2(&self) -> ICFUF2_R { - ICFUF2_R::new(((self.bits >> 26) & 1) != 0) + pub fn icfuf2(&self) -> Icfuf2R { + Icfuf2R::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<0> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 0) } #[doc = "Bit 1 - Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<1> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 1) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] #[must_use] - pub fn dirchg(&mut self) -> DIRCHG_W<2> { - DIRCHG_W::new(self) + pub fn dirchg(&mut self) -> DirchgW { + DirchgW::new(self, 2) } #[doc = "Bit 4 - Capture Compare Channel 0 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc0(&mut self) -> CC0_W<4> { - CC0_W::new(self) + pub fn cc0(&mut self) -> Cc0W { + Cc0W::new(self, 4) } #[doc = "Bit 5 - Capture Compare Channel 1 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc1(&mut self) -> CC1_W<5> { - CC1_W::new(self) + pub fn cc1(&mut self) -> Cc1W { + Cc1W::new(self, 5) } #[doc = "Bit 6 - Capture Compare Channel 2 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc2(&mut self) -> CC2_W<6> { - CC2_W::new(self) + pub fn cc2(&mut self) -> Cc2W { + Cc2W::new(self, 6) } #[doc = "Bit 16 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull0(&mut self) -> ICFWLFULL0_W<16> { - ICFWLFULL0_W::new(self) + pub fn icfwlfull0(&mut self) -> Icfwlfull0W { + Icfwlfull0W::new(self, 16) } #[doc = "Bit 17 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull1(&mut self) -> ICFWLFULL1_W<17> { - ICFWLFULL1_W::new(self) + pub fn icfwlfull1(&mut self) -> Icfwlfull1W { + Icfwlfull1W::new(self, 17) } #[doc = "Bit 18 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull2(&mut self) -> ICFWLFULL2_W<18> { - ICFWLFULL2_W::new(self) + pub fn icfwlfull2(&mut self) -> Icfwlfull2W { + Icfwlfull2W::new(self, 18) } #[doc = "Bit 20 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof0(&mut self) -> ICFOF0_W<20> { - ICFOF0_W::new(self) + pub fn icfof0(&mut self) -> Icfof0W { + Icfof0W::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof1(&mut self) -> ICFOF1_W<21> { - ICFOF1_W::new(self) + pub fn icfof1(&mut self) -> Icfof1W { + Icfof1W::new(self, 21) } #[doc = "Bit 22 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof2(&mut self) -> ICFOF2_W<22> { - ICFOF2_W::new(self) + pub fn icfof2(&mut self) -> Icfof2W { + Icfof2W::new(self, 22) } #[doc = "Bit 24 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf0(&mut self) -> ICFUF0_W<24> { - ICFUF0_W::new(self) + pub fn icfuf0(&mut self) -> Icfuf0W { + Icfuf0W::new(self, 24) } #[doc = "Bit 25 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf1(&mut self) -> ICFUF1_W<25> { - ICFUF1_W::new(self) + pub fn icfuf1(&mut self) -> Icfuf1W { + Icfuf1W::new(self, 25) } #[doc = "Bit 26 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf2(&mut self) -> ICFUF2_W<26> { - ICFUF2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfuf2(&mut self) -> Icfuf2W { + Icfuf2W::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/ipversion.rs index fd8f758..0b161f8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/lock.rs index 4d444ca..4d6d1fe 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Timer Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "52864: Write to unlock TIMER registers"] - UNLOCK = 52864, + Unlock = 52864, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Timer Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unlock TIMER registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Timer Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/status.rs index 1a2964d..25d646e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/status.rs @@ -1,339 +1,324 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RUNNING` reader - Running"] -pub type RUNNING_R = crate::BitReader; -#[doc = "Field `DIR` reader - Direction"] -pub type DIR_R = crate::BitReader; +pub type RunningR = crate::BitReader; #[doc = "Direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DIR_A { +pub enum Dir { #[doc = "0: Counting up"] - UP = 0, + Up = 0, #[doc = "1: Counting down"] - DOWN = 1, + Down = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DIR_A) -> Self { + fn from(variant: Dir) -> Self { variant as u8 != 0 } } -impl DIR_R { +#[doc = "Field `DIR` reader - Direction"] +pub type DirR = crate::BitReader; +impl DirR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DIR_A { + pub const fn variant(&self) -> Dir { match self.bits { - false => DIR_A::UP, - true => DIR_A::DOWN, + false => Dir::Up, + true => Dir::Down, } } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Counting up"] #[inline(always)] pub fn is_up(&self) -> bool { - *self == DIR_A::UP + *self == Dir::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Counting down"] #[inline(always)] pub fn is_down(&self) -> bool { - *self == DIR_A::DOWN + *self == Dir::Down } } #[doc = "Field `TOPBV` reader - TOP Buffer Valid"] -pub type TOPBV_R = crate::BitReader; -#[doc = "Field `TIMERLOCKSTATUS` reader - Timer lock status"] -pub type TIMERLOCKSTATUS_R = crate::BitReader; +pub type TopbvR = crate::BitReader; #[doc = "Timer lock status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TIMERLOCKSTATUS_A { +pub enum Timerlockstatus { #[doc = "0: TIMER registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: TIMER registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TIMERLOCKSTATUS_A) -> Self { + fn from(variant: Timerlockstatus) -> Self { variant as u8 != 0 } } -impl TIMERLOCKSTATUS_R { +#[doc = "Field `TIMERLOCKSTATUS` reader - Timer lock status"] +pub type TimerlockstatusR = crate::BitReader; +impl TimerlockstatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TIMERLOCKSTATUS_A { + pub const fn variant(&self) -> Timerlockstatus { match self.bits { - false => TIMERLOCKSTATUS_A::UNLOCKED, - true => TIMERLOCKSTATUS_A::LOCKED, + false => Timerlockstatus::Unlocked, + true => Timerlockstatus::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "TIMER registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == TIMERLOCKSTATUS_A::UNLOCKED + *self == Timerlockstatus::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "TIMER registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == TIMERLOCKSTATUS_A::LOCKED + *self == Timerlockstatus::Locked } } -#[doc = "Field `DTILOCKSTATUS` reader - DTI lock status"] -pub type DTILOCKSTATUS_R = crate::BitReader; #[doc = "DTI lock status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DTILOCKSTATUS_A { +pub enum Dtilockstatus { #[doc = "0: DTI registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: DTI registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DTILOCKSTATUS_A) -> Self { + fn from(variant: Dtilockstatus) -> Self { variant as u8 != 0 } } -impl DTILOCKSTATUS_R { +#[doc = "Field `DTILOCKSTATUS` reader - DTI lock status"] +pub type DtilockstatusR = crate::BitReader; +impl DtilockstatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTILOCKSTATUS_A { + pub const fn variant(&self) -> Dtilockstatus { match self.bits { - false => DTILOCKSTATUS_A::UNLOCKED, - true => DTILOCKSTATUS_A::LOCKED, + false => Dtilockstatus::Unlocked, + true => Dtilockstatus::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "DTI registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == DTILOCKSTATUS_A::UNLOCKED + *self == Dtilockstatus::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "DTI registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == DTILOCKSTATUS_A::LOCKED + *self == Dtilockstatus::Locked } } #[doc = "Field `SYNCBUSY` reader - Sync Busy"] -pub type SYNCBUSY_R = crate::BitReader; +pub type SyncbusyR = crate::BitReader; #[doc = "Field `OCBV0` reader - Output Compare Buffer Valid"] -pub type OCBV0_R = crate::BitReader; +pub type Ocbv0R = crate::BitReader; #[doc = "Field `OCBV1` reader - Output Compare Buffer Valid"] -pub type OCBV1_R = crate::BitReader; +pub type Ocbv1R = crate::BitReader; #[doc = "Field `OCBV2` reader - Output Compare Buffer Valid"] -pub type OCBV2_R = crate::BitReader; +pub type Ocbv2R = crate::BitReader; #[doc = "Field `ICFEMPTY0` reader - Input capture fifo empty"] -pub type ICFEMPTY0_R = crate::BitReader; +pub type Icfempty0R = crate::BitReader; #[doc = "Field `ICFEMPTY1` reader - Input capture fifo empty"] -pub type ICFEMPTY1_R = crate::BitReader; +pub type Icfempty1R = crate::BitReader; #[doc = "Field `ICFEMPTY2` reader - Input capture fifo empty"] -pub type ICFEMPTY2_R = crate::BitReader; -#[doc = "Field `CCPOL0` reader - Compare/Capture Polarity"] -pub type CCPOL0_R = crate::BitReader; +pub type Icfempty2R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL0_A { +pub enum Ccpol0 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL0_A) -> Self { + fn from(variant: Ccpol0) -> Self { variant as u8 != 0 } } -impl CCPOL0_R { +#[doc = "Field `CCPOL0` reader - Compare/Capture Polarity"] +pub type Ccpol0R = crate::BitReader; +impl Ccpol0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL0_A { + pub const fn variant(&self) -> Ccpol0 { match self.bits { - false => CCPOL0_A::LOWRISE, - true => CCPOL0_A::HIGHFALL, + false => Ccpol0::Lowrise, + true => Ccpol0::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL0_A::LOWRISE + *self == Ccpol0::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL0_A::HIGHFALL + *self == Ccpol0::Highfall } } -#[doc = "Field `CCPOL1` reader - Compare/Capture Polarity"] -pub type CCPOL1_R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL1_A { +pub enum Ccpol1 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL1_A) -> Self { + fn from(variant: Ccpol1) -> Self { variant as u8 != 0 } } -impl CCPOL1_R { +#[doc = "Field `CCPOL1` reader - Compare/Capture Polarity"] +pub type Ccpol1R = crate::BitReader; +impl Ccpol1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL1_A { + pub const fn variant(&self) -> Ccpol1 { match self.bits { - false => CCPOL1_A::LOWRISE, - true => CCPOL1_A::HIGHFALL, + false => Ccpol1::Lowrise, + true => Ccpol1::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL1_A::LOWRISE + *self == Ccpol1::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL1_A::HIGHFALL + *self == Ccpol1::Highfall } } -#[doc = "Field `CCPOL2` reader - Compare/Capture Polarity"] -pub type CCPOL2_R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL2_A { +pub enum Ccpol2 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL2_A) -> Self { + fn from(variant: Ccpol2) -> Self { variant as u8 != 0 } } -impl CCPOL2_R { +#[doc = "Field `CCPOL2` reader - Compare/Capture Polarity"] +pub type Ccpol2R = crate::BitReader; +impl Ccpol2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL2_A { + pub const fn variant(&self) -> Ccpol2 { match self.bits { - false => CCPOL2_A::LOWRISE, - true => CCPOL2_A::HIGHFALL, + false => Ccpol2::Lowrise, + true => Ccpol2::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL2_A::LOWRISE + *self == Ccpol2::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL2_A::HIGHFALL + *self == Ccpol2::Highfall } } impl R { #[doc = "Bit 0 - Running"] #[inline(always)] - pub fn running(&self) -> RUNNING_R { - RUNNING_R::new((self.bits & 1) != 0) + pub fn running(&self) -> RunningR { + RunningR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Direction"] #[inline(always)] - pub fn dir(&self) -> DIR_R { - DIR_R::new(((self.bits >> 1) & 1) != 0) + pub fn dir(&self) -> DirR { + DirR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - TOP Buffer Valid"] #[inline(always)] - pub fn topbv(&self) -> TOPBV_R { - TOPBV_R::new(((self.bits >> 2) & 1) != 0) + pub fn topbv(&self) -> TopbvR { + TopbvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Timer lock status"] #[inline(always)] - pub fn timerlockstatus(&self) -> TIMERLOCKSTATUS_R { - TIMERLOCKSTATUS_R::new(((self.bits >> 4) & 1) != 0) + pub fn timerlockstatus(&self) -> TimerlockstatusR { + TimerlockstatusR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DTI lock status"] #[inline(always)] - pub fn dtilockstatus(&self) -> DTILOCKSTATUS_R { - DTILOCKSTATUS_R::new(((self.bits >> 5) & 1) != 0) + pub fn dtilockstatus(&self) -> DtilockstatusR { + DtilockstatusR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Sync Busy"] #[inline(always)] - pub fn syncbusy(&self) -> SYNCBUSY_R { - SYNCBUSY_R::new(((self.bits >> 6) & 1) != 0) + pub fn syncbusy(&self) -> SyncbusyR { + SyncbusyR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv0(&self) -> OCBV0_R { - OCBV0_R::new(((self.bits >> 8) & 1) != 0) + pub fn ocbv0(&self) -> Ocbv0R { + Ocbv0R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv1(&self) -> OCBV1_R { - OCBV1_R::new(((self.bits >> 9) & 1) != 0) + pub fn ocbv1(&self) -> Ocbv1R { + Ocbv1R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv2(&self) -> OCBV2_R { - OCBV2_R::new(((self.bits >> 10) & 1) != 0) + pub fn ocbv2(&self) -> Ocbv2R { + Ocbv2R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 16 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty0(&self) -> ICFEMPTY0_R { - ICFEMPTY0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfempty0(&self) -> Icfempty0R { + Icfempty0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty1(&self) -> ICFEMPTY1_R { - ICFEMPTY1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfempty1(&self) -> Icfempty1R { + Icfempty1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty2(&self) -> ICFEMPTY2_R { - ICFEMPTY2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfempty2(&self) -> Icfempty2R { + Icfempty2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 24 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol0(&self) -> CCPOL0_R { - CCPOL0_R::new(((self.bits >> 24) & 1) != 0) + pub fn ccpol0(&self) -> Ccpol0R { + Ccpol0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol1(&self) -> CCPOL1_R { - CCPOL1_R::new(((self.bits >> 25) & 1) != 0) + pub fn ccpol1(&self) -> Ccpol1R { + Ccpol1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol2(&self) -> CCPOL2_R { - CCPOL2_R::new(((self.bits >> 26) & 1) != 0) + pub fn ccpol2(&self) -> Ccpol2R { + Ccpol2R::new(((self.bits >> 26) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/top.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/top.rs index c852559..1cb3d99 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/top.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/top.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOP` reader - Counter Top Value"] -pub type TOP_R = crate::FieldReader; +pub type TopR = crate::FieldReader; #[doc = "Field `TOP` writer - Counter Top Value"] -pub type TOP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOP_SPEC, u32, u32, 32, O>; +pub type TopW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Counter Top Value"] #[inline(always)] - pub fn top(&self) -> TOP_R { - TOP_R::new(self.bits) + pub fn top(&self) -> TopR { + TopR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Counter Top Value"] #[inline(always)] #[must_use] - pub fn top(&mut self) -> TOP_W<0> { - TOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn top(&mut self) -> TopW { + TopW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [top](index.html) module"] -pub struct TOP_SPEC; -impl crate::RegisterSpec for TOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopSpec; +impl crate::RegisterSpec for TopSpec { type Ux = u32; } -#[doc = "`read()` method returns [top::R](R) reader structure"] -impl crate::Readable for TOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [top::W](W) writer structure"] -impl crate::Writable for TOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`top::R`](R) reader structure"] +impl crate::Readable for TopSpec {} +#[doc = "`write(|w| ..)` method takes [`top::W`](W) writer structure"] +impl crate::Writable for TopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOP to value 0xffff"] -impl crate::Resettable for TOP_SPEC { - const RESET_VALUE: Self::Ux = 0xffff; +impl crate::Resettable for TopSpec { + const RESET_VALUE: u32 = 0xffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/topb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/topb.rs index 4f70070..b4415f8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/topb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_ns/topb.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOPB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOPB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOPB` reader - Counter Top Buffer Register"] -pub type TOPB_R = crate::FieldReader; +pub type TopbR = crate::FieldReader; #[doc = "Field `TOPB` writer - Counter Top Buffer Register"] -pub type TOPB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOPB_SPEC, u32, u32, 32, O>; +pub type TopbW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Counter Top Buffer Register"] #[inline(always)] - pub fn topb(&self) -> TOPB_R { - TOPB_R::new(self.bits) + pub fn topb(&self) -> TopbR { + TopbR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Counter Top Buffer Register"] #[inline(always)] #[must_use] - pub fn topb(&mut self) -> TOPB_W<0> { - TOPB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn topb(&mut self) -> TopbW { + TopbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [topb](index.html) module"] -pub struct TOPB_SPEC; -impl crate::RegisterSpec for TOPB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopbSpec; +impl crate::RegisterSpec for TopbSpec { type Ux = u32; } -#[doc = "`read()` method returns [topb::R](R) reader structure"] -impl crate::Readable for TOPB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [topb::W](W) writer structure"] -impl crate::Writable for TOPB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`topb::R`](R) reader structure"] +impl crate::Readable for TopbSpec {} +#[doc = "`write(|w| ..)` method takes [`topb::W`](W) writer structure"] +impl crate::Writable for TopbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOPB to value 0"] -impl crate::Resettable for TOPB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TopbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s.rs index 50b1dd4..e4e8a9b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s.rs @@ -1,240 +1,470 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + cfg: Cfg, + ctrl: Ctrl, + cmd: Cmd, + status: Status, + if_: If, + ien: Ien, + top: Top, + topb: Topb, + cnt: Cnt, + _reserved10: [u8; 0x04], + lock: Lock, + en: En, + _reserved12: [u8; 0x2c], + cc0_cfg: Cc0Cfg, + cc0_ctrl: Cc0Ctrl, + cc0_oc: Cc0Oc, + _reserved15: [u8; 0x04], + cc0_ocb: Cc0Ocb, + cc0_icf: Cc0Icf, + cc0_icof: Cc0Icof, + _reserved18: [u8; 0x04], + cc1_cfg: Cc1Cfg, + cc1_ctrl: Cc1Ctrl, + cc1_oc: Cc1Oc, + _reserved21: [u8; 0x04], + cc1_ocb: Cc1Ocb, + cc1_icf: Cc1Icf, + cc1_icof: Cc1Icof, + _reserved24: [u8; 0x04], + cc2_cfg: Cc2Cfg, + cc2_ctrl: Cc2Ctrl, + cc2_oc: Cc2Oc, + _reserved27: [u8; 0x04], + cc2_ocb: Cc2Ocb, + cc2_icf: Cc2Icf, + cc2_icof: Cc2Icof, + _reserved30: [u8; 0x24], + dtcfg: Dtcfg, + dttimecfg: Dttimecfg, + dtfcfg: Dtfcfg, + dtctrl: Dtctrl, + dtogen: Dtogen, + dtfault: Dtfault, + dtfaultc: Dtfaultc, + dtlock: Dtlock, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x08 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x0c - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x10 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x14 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x18 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x1c - No Description"] - pub top: TOP, + #[inline(always)] + pub const fn top(&self) -> &Top { + &self.top + } #[doc = "0x20 - No Description"] - pub topb: TOPB, + #[inline(always)] + pub const fn topb(&self) -> &Topb { + &self.topb + } #[doc = "0x24 - No Description"] - pub cnt: CNT, - _reserved10: [u8; 0x04], + #[inline(always)] + pub const fn cnt(&self) -> &Cnt { + &self.cnt + } #[doc = "0x2c - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x30 - No Description"] - pub en: EN, - _reserved12: [u8; 0x2c], + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x60 - No Description"] - pub cc0_cfg: CC0_CFG, + #[inline(always)] + pub const fn cc0_cfg(&self) -> &Cc0Cfg { + &self.cc0_cfg + } #[doc = "0x64 - No Description"] - pub cc0_ctrl: CC0_CTRL, + #[inline(always)] + pub const fn cc0_ctrl(&self) -> &Cc0Ctrl { + &self.cc0_ctrl + } #[doc = "0x68 - No Description"] - pub cc0_oc: CC0_OC, - _reserved15: [u8; 0x04], + #[inline(always)] + pub const fn cc0_oc(&self) -> &Cc0Oc { + &self.cc0_oc + } #[doc = "0x70 - No Description"] - pub cc0_ocb: CC0_OCB, + #[inline(always)] + pub const fn cc0_ocb(&self) -> &Cc0Ocb { + &self.cc0_ocb + } #[doc = "0x74 - No Description"] - pub cc0_icf: CC0_ICF, + #[inline(always)] + pub const fn cc0_icf(&self) -> &Cc0Icf { + &self.cc0_icf + } #[doc = "0x78 - No Description"] - pub cc0_icof: CC0_ICOF, - _reserved18: [u8; 0x04], + #[inline(always)] + pub const fn cc0_icof(&self) -> &Cc0Icof { + &self.cc0_icof + } #[doc = "0x80 - No Description"] - pub cc1_cfg: CC1_CFG, + #[inline(always)] + pub const fn cc1_cfg(&self) -> &Cc1Cfg { + &self.cc1_cfg + } #[doc = "0x84 - No Description"] - pub cc1_ctrl: CC1_CTRL, + #[inline(always)] + pub const fn cc1_ctrl(&self) -> &Cc1Ctrl { + &self.cc1_ctrl + } #[doc = "0x88 - No Description"] - pub cc1_oc: CC1_OC, - _reserved21: [u8; 0x04], + #[inline(always)] + pub const fn cc1_oc(&self) -> &Cc1Oc { + &self.cc1_oc + } #[doc = "0x90 - No Description"] - pub cc1_ocb: CC1_OCB, + #[inline(always)] + pub const fn cc1_ocb(&self) -> &Cc1Ocb { + &self.cc1_ocb + } #[doc = "0x94 - No Description"] - pub cc1_icf: CC1_ICF, + #[inline(always)] + pub const fn cc1_icf(&self) -> &Cc1Icf { + &self.cc1_icf + } #[doc = "0x98 - No Description"] - pub cc1_icof: CC1_ICOF, - _reserved24: [u8; 0x04], + #[inline(always)] + pub const fn cc1_icof(&self) -> &Cc1Icof { + &self.cc1_icof + } #[doc = "0xa0 - No Description"] - pub cc2_cfg: CC2_CFG, + #[inline(always)] + pub const fn cc2_cfg(&self) -> &Cc2Cfg { + &self.cc2_cfg + } #[doc = "0xa4 - No Description"] - pub cc2_ctrl: CC2_CTRL, + #[inline(always)] + pub const fn cc2_ctrl(&self) -> &Cc2Ctrl { + &self.cc2_ctrl + } #[doc = "0xa8 - No Description"] - pub cc2_oc: CC2_OC, - _reserved27: [u8; 0x04], + #[inline(always)] + pub const fn cc2_oc(&self) -> &Cc2Oc { + &self.cc2_oc + } #[doc = "0xb0 - No Description"] - pub cc2_ocb: CC2_OCB, + #[inline(always)] + pub const fn cc2_ocb(&self) -> &Cc2Ocb { + &self.cc2_ocb + } #[doc = "0xb4 - No Description"] - pub cc2_icf: CC2_ICF, + #[inline(always)] + pub const fn cc2_icf(&self) -> &Cc2Icf { + &self.cc2_icf + } #[doc = "0xb8 - No Description"] - pub cc2_icof: CC2_ICOF, - _reserved30: [u8; 0x24], + #[inline(always)] + pub const fn cc2_icof(&self) -> &Cc2Icof { + &self.cc2_icof + } #[doc = "0xe0 - No Description"] - pub dtcfg: DTCFG, + #[inline(always)] + pub const fn dtcfg(&self) -> &Dtcfg { + &self.dtcfg + } #[doc = "0xe4 - No Description"] - pub dttimecfg: DTTIMECFG, + #[inline(always)] + pub const fn dttimecfg(&self) -> &Dttimecfg { + &self.dttimecfg + } #[doc = "0xe8 - No Description"] - pub dtfcfg: DTFCFG, + #[inline(always)] + pub const fn dtfcfg(&self) -> &Dtfcfg { + &self.dtfcfg + } #[doc = "0xec - No Description"] - pub dtctrl: DTCTRL, + #[inline(always)] + pub const fn dtctrl(&self) -> &Dtctrl { + &self.dtctrl + } #[doc = "0xf0 - No Description"] - pub dtogen: DTOGEN, + #[inline(always)] + pub const fn dtogen(&self) -> &Dtogen { + &self.dtogen + } #[doc = "0xf4 - No Description"] - pub dtfault: DTFAULT, + #[inline(always)] + pub const fn dtfault(&self) -> &Dtfault { + &self.dtfault + } #[doc = "0xf8 - No Description"] - pub dtfaultc: DTFAULTC, + #[inline(always)] + pub const fn dtfaultc(&self) -> &Dtfaultc { + &self.dtfaultc + } #[doc = "0xfc - No Description"] - pub dtlock: DTLOCK, + #[inline(always)] + pub const fn dtlock(&self) -> &Dtlock { + &self.dtlock + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "TOP (rw) register accessor: an alias for `Reg`"] -pub type TOP = crate::Reg; +#[doc = "TOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@top`] +module"] +#[doc(alias = "TOP")] +pub type Top = crate::Reg; #[doc = "No Description"] pub mod top; -#[doc = "TOPB (rw) register accessor: an alias for `Reg`"] -pub type TOPB = crate::Reg; +#[doc = "TOPB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@topb`] +module"] +#[doc(alias = "TOPB")] +pub type Topb = crate::Reg; #[doc = "No Description"] pub mod topb; -#[doc = "CNT (rw) register accessor: an alias for `Reg`"] -pub type CNT = crate::Reg; +#[doc = "CNT (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnt`] +module"] +#[doc(alias = "CNT")] +pub type Cnt = crate::Reg; #[doc = "No Description"] pub mod cnt; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CC0_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC0_CFG = crate::Reg; +#[doc = "CC0_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_cfg`] +module"] +#[doc(alias = "CC0_CFG")] +pub type Cc0Cfg = crate::Reg; #[doc = "No Description"] pub mod cc0_cfg; -#[doc = "CC0_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC0_CTRL = crate::Reg; +#[doc = "CC0_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_ctrl`] +module"] +#[doc(alias = "CC0_CTRL")] +pub type Cc0Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc0_ctrl; -#[doc = "CC0_OC (rw) register accessor: an alias for `Reg`"] -pub type CC0_OC = crate::Reg; +#[doc = "CC0_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_oc`] +module"] +#[doc(alias = "CC0_OC")] +pub type Cc0Oc = crate::Reg; #[doc = "No Description"] pub mod cc0_oc; -#[doc = "CC0_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC0_OCB = crate::Reg; +#[doc = "CC0_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_ocb`] +module"] +#[doc(alias = "CC0_OCB")] +pub type Cc0Ocb = crate::Reg; #[doc = "No Description"] pub mod cc0_ocb; -#[doc = "CC0_ICF (r) register accessor: an alias for `Reg`"] -pub type CC0_ICF = crate::Reg; +#[doc = "CC0_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_icf`] +module"] +#[doc(alias = "CC0_ICF")] +pub type Cc0Icf = crate::Reg; #[doc = "No Description"] pub mod cc0_icf; -#[doc = "CC0_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC0_ICOF = crate::Reg; +#[doc = "CC0_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_icof`] +module"] +#[doc(alias = "CC0_ICOF")] +pub type Cc0Icof = crate::Reg; #[doc = "No Description"] pub mod cc0_icof; -#[doc = "CC1_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC1_CFG = crate::Reg; +#[doc = "CC1_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_cfg`] +module"] +#[doc(alias = "CC1_CFG")] +pub type Cc1Cfg = crate::Reg; #[doc = "No Description"] pub mod cc1_cfg; -#[doc = "CC1_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC1_CTRL = crate::Reg; +#[doc = "CC1_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_ctrl`] +module"] +#[doc(alias = "CC1_CTRL")] +pub type Cc1Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc1_ctrl; -#[doc = "CC1_OC (rw) register accessor: an alias for `Reg`"] -pub type CC1_OC = crate::Reg; +#[doc = "CC1_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_oc`] +module"] +#[doc(alias = "CC1_OC")] +pub type Cc1Oc = crate::Reg; #[doc = "No Description"] pub mod cc1_oc; -#[doc = "CC1_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC1_OCB = crate::Reg; +#[doc = "CC1_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_ocb`] +module"] +#[doc(alias = "CC1_OCB")] +pub type Cc1Ocb = crate::Reg; #[doc = "No Description"] pub mod cc1_ocb; -#[doc = "CC1_ICF (r) register accessor: an alias for `Reg`"] -pub type CC1_ICF = crate::Reg; +#[doc = "CC1_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_icf`] +module"] +#[doc(alias = "CC1_ICF")] +pub type Cc1Icf = crate::Reg; #[doc = "No Description"] pub mod cc1_icf; -#[doc = "CC1_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC1_ICOF = crate::Reg; +#[doc = "CC1_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_icof`] +module"] +#[doc(alias = "CC1_ICOF")] +pub type Cc1Icof = crate::Reg; #[doc = "No Description"] pub mod cc1_icof; -#[doc = "CC2_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC2_CFG = crate::Reg; +#[doc = "CC2_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_cfg`] +module"] +#[doc(alias = "CC2_CFG")] +pub type Cc2Cfg = crate::Reg; #[doc = "No Description"] pub mod cc2_cfg; -#[doc = "CC2_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC2_CTRL = crate::Reg; +#[doc = "CC2_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_ctrl`] +module"] +#[doc(alias = "CC2_CTRL")] +pub type Cc2Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc2_ctrl; -#[doc = "CC2_OC (rw) register accessor: an alias for `Reg`"] -pub type CC2_OC = crate::Reg; +#[doc = "CC2_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_oc`] +module"] +#[doc(alias = "CC2_OC")] +pub type Cc2Oc = crate::Reg; #[doc = "No Description"] pub mod cc2_oc; -#[doc = "CC2_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC2_OCB = crate::Reg; +#[doc = "CC2_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_ocb`] +module"] +#[doc(alias = "CC2_OCB")] +pub type Cc2Ocb = crate::Reg; #[doc = "No Description"] pub mod cc2_ocb; -#[doc = "CC2_ICF (r) register accessor: an alias for `Reg`"] -pub type CC2_ICF = crate::Reg; +#[doc = "CC2_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_icf`] +module"] +#[doc(alias = "CC2_ICF")] +pub type Cc2Icf = crate::Reg; #[doc = "No Description"] pub mod cc2_icf; -#[doc = "CC2_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC2_ICOF = crate::Reg; +#[doc = "CC2_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_icof`] +module"] +#[doc(alias = "CC2_ICOF")] +pub type Cc2Icof = crate::Reg; #[doc = "No Description"] pub mod cc2_icof; -#[doc = "DTCFG (rw) register accessor: an alias for `Reg`"] -pub type DTCFG = crate::Reg; +#[doc = "DTCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtcfg`] +module"] +#[doc(alias = "DTCFG")] +pub type Dtcfg = crate::Reg; #[doc = "No Description"] pub mod dtcfg; -#[doc = "DTTIMECFG (rw) register accessor: an alias for `Reg`"] -pub type DTTIMECFG = crate::Reg; +#[doc = "DTTIMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dttimecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dttimecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dttimecfg`] +module"] +#[doc(alias = "DTTIMECFG")] +pub type Dttimecfg = crate::Reg; #[doc = "No Description"] pub mod dttimecfg; -#[doc = "DTFCFG (rw) register accessor: an alias for `Reg`"] -pub type DTFCFG = crate::Reg; +#[doc = "DTFCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfcfg`] +module"] +#[doc(alias = "DTFCFG")] +pub type Dtfcfg = crate::Reg; #[doc = "No Description"] pub mod dtfcfg; -#[doc = "DTCTRL (rw) register accessor: an alias for `Reg`"] -pub type DTCTRL = crate::Reg; +#[doc = "DTCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtctrl`] +module"] +#[doc(alias = "DTCTRL")] +pub type Dtctrl = crate::Reg; #[doc = "No Description"] pub mod dtctrl; -#[doc = "DTOGEN (rw) register accessor: an alias for `Reg`"] -pub type DTOGEN = crate::Reg; +#[doc = "DTOGEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtogen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtogen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtogen`] +module"] +#[doc(alias = "DTOGEN")] +pub type Dtogen = crate::Reg; #[doc = "No Description"] pub mod dtogen; -#[doc = "DTFAULT (r) register accessor: an alias for `Reg`"] -pub type DTFAULT = crate::Reg; +#[doc = "DTFAULT (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfault::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfault`] +module"] +#[doc(alias = "DTFAULT")] +pub type Dtfault = crate::Reg; #[doc = "No Description"] pub mod dtfault; -#[doc = "DTFAULTC (w) register accessor: an alias for `Reg`"] -pub type DTFAULTC = crate::Reg; +#[doc = "DTFAULTC (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfaultc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfaultc`] +module"] +#[doc(alias = "DTFAULTC")] +pub type Dtfaultc = crate::Reg; #[doc = "No Description"] pub mod dtfaultc; -#[doc = "DTLOCK (w) register accessor: an alias for `Reg`"] -pub type DTLOCK = crate::Reg; +#[doc = "DTLOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtlock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtlock`] +module"] +#[doc(alias = "DTLOCK")] +pub type Dtlock = crate::Reg; #[doc = "No Description"] pub mod dtlock; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc0_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc0_cfg.rs index 547eeb0..b3aac62 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc0_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc0_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC0_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC0_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_cfg](index.html) module"] -pub struct CC0_CFG_SPEC; -impl crate::RegisterSpec for CC0_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0CfgSpec; +impl crate::RegisterSpec for Cc0CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_cfg::R](R) reader structure"] -impl crate::Readable for CC0_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_cfg::W](W) writer structure"] -impl crate::Writable for CC0_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_cfg::R`](R) reader structure"] +impl crate::Readable for Cc0CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_cfg::W`](W) writer structure"] +impl crate::Writable for Cc0CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_CFG to value 0"] -impl crate::Resettable for CC0_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc0_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc0_ctrl.rs index 71b40e4..1b92d0c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc0_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc0_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC0_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_ctrl](index.html) module"] -pub struct CC0_CTRL_SPEC; -impl crate::RegisterSpec for CC0_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0CtrlSpec; +impl crate::RegisterSpec for Cc0CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_ctrl::R](R) reader structure"] -impl crate::Readable for CC0_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_ctrl::W](W) writer structure"] -impl crate::Writable for CC0_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc0CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc0CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_CTRL to value 0"] -impl crate::Resettable for CC0_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc0_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc0_icf.rs index 393663e..7857cd3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc0_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc0_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC0_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new(self.bits) + pub fn icf(&self) -> IcfR { + IcfR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_icf](index.html) module"] -pub struct CC0_ICF_SPEC; -impl crate::RegisterSpec for CC0_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0IcfSpec; +impl crate::RegisterSpec for Cc0IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_icf::R](R) reader structure"] -impl crate::Readable for CC0_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc0_icf::R`](R) reader structure"] +impl crate::Readable for Cc0IcfSpec {} #[doc = "`reset()` method sets CC0_ICF to value 0"] -impl crate::Resettable for CC0_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc0_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc0_icof.rs index cded1c9..517621b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc0_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc0_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC0_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new(self.bits) + pub fn icof(&self) -> IcofR { + IcofR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_icof](index.html) module"] -pub struct CC0_ICOF_SPEC; -impl crate::RegisterSpec for CC0_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0IcofSpec; +impl crate::RegisterSpec for Cc0IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_icof::R](R) reader structure"] -impl crate::Readable for CC0_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc0_icof::R`](R) reader structure"] +impl crate::Readable for Cc0IcofSpec {} #[doc = "`reset()` method sets CC0_ICOF to value 0"] -impl crate::Resettable for CC0_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc0_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc0_oc.rs index 2606e85..daec18d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc0_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc0_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC0_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC0_OC_SPEC, u32, u32, 32, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new(self.bits) + pub fn oc(&self) -> OcR { + OcR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_oc](index.html) module"] -pub struct CC0_OC_SPEC; -impl crate::RegisterSpec for CC0_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0OcSpec; +impl crate::RegisterSpec for Cc0OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_oc::R](R) reader structure"] -impl crate::Readable for CC0_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_oc::W](W) writer structure"] -impl crate::Writable for CC0_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_oc::R`](R) reader structure"] +impl crate::Readable for Cc0OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_oc::W`](W) writer structure"] +impl crate::Writable for Cc0OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_OC to value 0"] -impl crate::Resettable for CC0_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc0_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc0_ocb.rs index e61eaac..26a4aec 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc0_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc0_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC0_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC0_OCB_SPEC, u32, u32, 32, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new(self.bits) + pub fn ocb(&self) -> OcbR { + OcbR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_ocb](index.html) module"] -pub struct CC0_OCB_SPEC; -impl crate::RegisterSpec for CC0_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0OcbSpec; +impl crate::RegisterSpec for Cc0OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_ocb::R](R) reader structure"] -impl crate::Readable for CC0_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_ocb::W](W) writer structure"] -impl crate::Writable for CC0_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_ocb::R`](R) reader structure"] +impl crate::Readable for Cc0OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_ocb::W`](W) writer structure"] +impl crate::Writable for Cc0OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_OCB to value 0"] -impl crate::Resettable for CC0_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc1_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc1_cfg.rs index b3424c2..2243932 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc1_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc1_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC1_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC1_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_cfg](index.html) module"] -pub struct CC1_CFG_SPEC; -impl crate::RegisterSpec for CC1_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1CfgSpec; +impl crate::RegisterSpec for Cc1CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_cfg::R](R) reader structure"] -impl crate::Readable for CC1_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_cfg::W](W) writer structure"] -impl crate::Writable for CC1_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_cfg::R`](R) reader structure"] +impl crate::Readable for Cc1CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_cfg::W`](W) writer structure"] +impl crate::Writable for Cc1CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_CFG to value 0"] -impl crate::Resettable for CC1_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc1_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc1_ctrl.rs index 38927de..bc41282 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc1_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc1_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC1_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_ctrl](index.html) module"] -pub struct CC1_CTRL_SPEC; -impl crate::RegisterSpec for CC1_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1CtrlSpec; +impl crate::RegisterSpec for Cc1CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_ctrl::R](R) reader structure"] -impl crate::Readable for CC1_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_ctrl::W](W) writer structure"] -impl crate::Writable for CC1_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc1CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc1CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_CTRL to value 0"] -impl crate::Resettable for CC1_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc1_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc1_icf.rs index c898364..a1eb181 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc1_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc1_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC1_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new(self.bits) + pub fn icf(&self) -> IcfR { + IcfR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_icf](index.html) module"] -pub struct CC1_ICF_SPEC; -impl crate::RegisterSpec for CC1_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1IcfSpec; +impl crate::RegisterSpec for Cc1IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_icf::R](R) reader structure"] -impl crate::Readable for CC1_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc1_icf::R`](R) reader structure"] +impl crate::Readable for Cc1IcfSpec {} #[doc = "`reset()` method sets CC1_ICF to value 0"] -impl crate::Resettable for CC1_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc1_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc1_icof.rs index bbaba90..9130067 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc1_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc1_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC1_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new(self.bits) + pub fn icof(&self) -> IcofR { + IcofR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_icof](index.html) module"] -pub struct CC1_ICOF_SPEC; -impl crate::RegisterSpec for CC1_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1IcofSpec; +impl crate::RegisterSpec for Cc1IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_icof::R](R) reader structure"] -impl crate::Readable for CC1_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc1_icof::R`](R) reader structure"] +impl crate::Readable for Cc1IcofSpec {} #[doc = "`reset()` method sets CC1_ICOF to value 0"] -impl crate::Resettable for CC1_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc1_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc1_oc.rs index bd89532..cdd33a1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc1_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc1_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC1_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC1_OC_SPEC, u32, u32, 32, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new(self.bits) + pub fn oc(&self) -> OcR { + OcR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_oc](index.html) module"] -pub struct CC1_OC_SPEC; -impl crate::RegisterSpec for CC1_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1OcSpec; +impl crate::RegisterSpec for Cc1OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_oc::R](R) reader structure"] -impl crate::Readable for CC1_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_oc::W](W) writer structure"] -impl crate::Writable for CC1_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_oc::R`](R) reader structure"] +impl crate::Readable for Cc1OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_oc::W`](W) writer structure"] +impl crate::Writable for Cc1OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_OC to value 0"] -impl crate::Resettable for CC1_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc1_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc1_ocb.rs index 06418d1..4378eff 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc1_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc1_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC1_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC1_OCB_SPEC, u32, u32, 32, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new(self.bits) + pub fn ocb(&self) -> OcbR { + OcbR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_ocb](index.html) module"] -pub struct CC1_OCB_SPEC; -impl crate::RegisterSpec for CC1_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1OcbSpec; +impl crate::RegisterSpec for Cc1OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_ocb::R](R) reader structure"] -impl crate::Readable for CC1_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_ocb::W](W) writer structure"] -impl crate::Writable for CC1_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_ocb::R`](R) reader structure"] +impl crate::Readable for Cc1OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_ocb::W`](W) writer structure"] +impl crate::Writable for Cc1OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_OCB to value 0"] -impl crate::Resettable for CC1_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc2_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc2_cfg.rs index 6b108e5..97bec45 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc2_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc2_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC2_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC2_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_cfg](index.html) module"] -pub struct CC2_CFG_SPEC; -impl crate::RegisterSpec for CC2_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2CfgSpec; +impl crate::RegisterSpec for Cc2CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_cfg::R](R) reader structure"] -impl crate::Readable for CC2_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_cfg::W](W) writer structure"] -impl crate::Writable for CC2_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_cfg::R`](R) reader structure"] +impl crate::Readable for Cc2CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_cfg::W`](W) writer structure"] +impl crate::Writable for Cc2CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_CFG to value 0"] -impl crate::Resettable for CC2_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc2_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc2_ctrl.rs index b42d120..317952a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc2_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc2_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC2_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_ctrl](index.html) module"] -pub struct CC2_CTRL_SPEC; -impl crate::RegisterSpec for CC2_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2CtrlSpec; +impl crate::RegisterSpec for Cc2CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_ctrl::R](R) reader structure"] -impl crate::Readable for CC2_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_ctrl::W](W) writer structure"] -impl crate::Writable for CC2_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc2CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc2CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_CTRL to value 0"] -impl crate::Resettable for CC2_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc2_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc2_icf.rs index c6060b6..817b4ed 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc2_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc2_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC2_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new(self.bits) + pub fn icf(&self) -> IcfR { + IcfR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_icf](index.html) module"] -pub struct CC2_ICF_SPEC; -impl crate::RegisterSpec for CC2_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2IcfSpec; +impl crate::RegisterSpec for Cc2IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_icf::R](R) reader structure"] -impl crate::Readable for CC2_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc2_icf::R`](R) reader structure"] +impl crate::Readable for Cc2IcfSpec {} #[doc = "`reset()` method sets CC2_ICF to value 0"] -impl crate::Resettable for CC2_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc2_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc2_icof.rs index 389eac4..32bce48 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc2_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc2_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC2_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new(self.bits) + pub fn icof(&self) -> IcofR { + IcofR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_icof](index.html) module"] -pub struct CC2_ICOF_SPEC; -impl crate::RegisterSpec for CC2_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2IcofSpec; +impl crate::RegisterSpec for Cc2IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_icof::R](R) reader structure"] -impl crate::Readable for CC2_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc2_icof::R`](R) reader structure"] +impl crate::Readable for Cc2IcofSpec {} #[doc = "`reset()` method sets CC2_ICOF to value 0"] -impl crate::Resettable for CC2_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc2_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc2_oc.rs index 94bc70d..3351629 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc2_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc2_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC2_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC2_OC_SPEC, u32, u32, 32, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new(self.bits) + pub fn oc(&self) -> OcR { + OcR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_oc](index.html) module"] -pub struct CC2_OC_SPEC; -impl crate::RegisterSpec for CC2_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2OcSpec; +impl crate::RegisterSpec for Cc2OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_oc::R](R) reader structure"] -impl crate::Readable for CC2_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_oc::W](W) writer structure"] -impl crate::Writable for CC2_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_oc::R`](R) reader structure"] +impl crate::Readable for Cc2OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_oc::W`](W) writer structure"] +impl crate::Writable for Cc2OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_OC to value 0"] -impl crate::Resettable for CC2_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc2_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc2_ocb.rs index f192169..49f056e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc2_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cc2_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC2_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC2_OCB_SPEC, u32, u32, 32, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new(self.bits) + pub fn ocb(&self) -> OcbR { + OcbR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_ocb](index.html) module"] -pub struct CC2_OCB_SPEC; -impl crate::RegisterSpec for CC2_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2OcbSpec; +impl crate::RegisterSpec for Cc2OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_ocb::R](R) reader structure"] -impl crate::Readable for CC2_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_ocb::W](W) writer structure"] -impl crate::Writable for CC2_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_ocb::R`](R) reader structure"] +impl crate::Readable for Cc2OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_ocb::W`](W) writer structure"] +impl crate::Writable for Cc2OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_OCB to value 0"] -impl crate::Resettable for CC2_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cfg.rs index ea2a1e1..b4cc2fd 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cfg.rs @@ -1,775 +1,774 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - Timer Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Timer Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Up-count mode"] - UP = 0, + Up = 0, #[doc = "1: Down-count mode"] - DOWN = 1, + Down = 1, #[doc = "2: Up/down-count mode"] - UPDOWN = 2, + Updown = 2, #[doc = "3: Quadrature decoder mode"] - QDEC = 3, + Qdec = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - Timer Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::UP, - 1 => MODE_A::DOWN, - 2 => MODE_A::UPDOWN, - 3 => MODE_A::QDEC, + 0 => Mode::Up, + 1 => Mode::Down, + 2 => Mode::Updown, + 3 => Mode::Qdec, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Up-count mode"] #[inline(always)] pub fn is_up(&self) -> bool { - *self == MODE_A::UP + *self == Mode::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Down-count mode"] #[inline(always)] pub fn is_down(&self) -> bool { - *self == MODE_A::DOWN + *self == Mode::Down } - #[doc = "Checks if the value of the field is `UPDOWN`"] + #[doc = "Up/down-count mode"] #[inline(always)] pub fn is_updown(&self) -> bool { - *self == MODE_A::UPDOWN + *self == Mode::Updown } - #[doc = "Checks if the value of the field is `QDEC`"] + #[doc = "Quadrature decoder mode"] #[inline(always)] pub fn is_qdec(&self) -> bool { - *self == MODE_A::QDEC + *self == Mode::Qdec } } #[doc = "Field `MODE` writer - Timer Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Up-count mode"] #[inline(always)] - pub fn up(self) -> &'a mut W { - self.variant(MODE_A::UP) + pub fn up(self) -> &'a mut crate::W { + self.variant(Mode::Up) } #[doc = "Down-count mode"] #[inline(always)] - pub fn down(self) -> &'a mut W { - self.variant(MODE_A::DOWN) + pub fn down(self) -> &'a mut crate::W { + self.variant(Mode::Down) } #[doc = "Up/down-count mode"] #[inline(always)] - pub fn updown(self) -> &'a mut W { - self.variant(MODE_A::UPDOWN) + pub fn updown(self) -> &'a mut crate::W { + self.variant(Mode::Updown) } #[doc = "Quadrature decoder mode"] #[inline(always)] - pub fn qdec(self) -> &'a mut W { - self.variant(MODE_A::QDEC) + pub fn qdec(self) -> &'a mut crate::W { + self.variant(Mode::Qdec) } } -#[doc = "Field `SYNC` reader - Timer Start/Stop/Reload Synchronization"] -pub type SYNC_R = crate::BitReader; #[doc = "Timer Start/Stop/Reload Synchronization\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYNC_A { +pub enum Sync { #[doc = "0: Timer operation is unaffected by other timers."] - DISABLE = 0, + Disable = 0, #[doc = "1: Timer may be started, stopped and re-loaded from other timer instances."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYNC_A) -> Self { + fn from(variant: Sync) -> Self { variant as u8 != 0 } } -impl SYNC_R { +#[doc = "Field `SYNC` reader - Timer Start/Stop/Reload Synchronization"] +pub type SyncR = crate::BitReader; +impl SyncR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SYNC_A { + pub const fn variant(&self) -> Sync { match self.bits { - false => SYNC_A::DISABLE, - true => SYNC_A::ENABLE, + false => Sync::Disable, + true => Sync::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Timer operation is unaffected by other timers."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == SYNC_A::DISABLE + *self == Sync::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Timer may be started, stopped and re-loaded from other timer instances."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == SYNC_A::ENABLE + *self == Sync::Enable } } #[doc = "Field `SYNC` writer - Timer Start/Stop/Reload Synchronization"] -pub type SYNC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, SYNC_A, O>; -impl<'a, const O: u8> SYNC_W<'a, O> { +pub type SyncW<'a, REG> = crate::BitWriter<'a, REG, Sync>; +impl<'a, REG> SyncW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer operation is unaffected by other timers."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(SYNC_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Sync::Disable) } #[doc = "Timer may be started, stopped and re-loaded from other timer instances."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(SYNC_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Sync::Enable) } } #[doc = "Field `OSMEN` reader - One-shot Mode Enable"] -pub type OSMEN_R = crate::BitReader; +pub type OsmenR = crate::BitReader; #[doc = "Field `OSMEN` writer - One-shot Mode Enable"] -pub type OSMEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `QDM` reader - Quadrature Decoder Mode Selection"] -pub type QDM_R = crate::BitReader; +pub type OsmenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Quadrature Decoder Mode Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum QDM_A { +pub enum Qdm { #[doc = "0: X2 mode selected"] X2 = 0, #[doc = "1: X4 mode selected"] X4 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: QDM_A) -> Self { + fn from(variant: Qdm) -> Self { variant as u8 != 0 } } -impl QDM_R { +#[doc = "Field `QDM` reader - Quadrature Decoder Mode Selection"] +pub type QdmR = crate::BitReader; +impl QdmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> QDM_A { + pub const fn variant(&self) -> Qdm { match self.bits { - false => QDM_A::X2, - true => QDM_A::X4, + false => Qdm::X2, + true => Qdm::X4, } } - #[doc = "Checks if the value of the field is `X2`"] + #[doc = "X2 mode selected"] #[inline(always)] pub fn is_x2(&self) -> bool { - *self == QDM_A::X2 + *self == Qdm::X2 } - #[doc = "Checks if the value of the field is `X4`"] + #[doc = "X4 mode selected"] #[inline(always)] pub fn is_x4(&self) -> bool { - *self == QDM_A::X4 + *self == Qdm::X4 } } #[doc = "Field `QDM` writer - Quadrature Decoder Mode Selection"] -pub type QDM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, QDM_A, O>; -impl<'a, const O: u8> QDM_W<'a, O> { +pub type QdmW<'a, REG> = crate::BitWriter<'a, REG, Qdm>; +impl<'a, REG> QdmW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "X2 mode selected"] #[inline(always)] - pub fn x2(self) -> &'a mut W { - self.variant(QDM_A::X2) + pub fn x2(self) -> &'a mut crate::W { + self.variant(Qdm::X2) } #[doc = "X4 mode selected"] #[inline(always)] - pub fn x4(self) -> &'a mut W { - self.variant(QDM_A::X4) + pub fn x4(self) -> &'a mut crate::W { + self.variant(Qdm::X4) } } -#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] -pub type DEBUGRUN_R = crate::BitReader; #[doc = "Debug Mode Run Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DEBUGRUN_A { +pub enum Debugrun { #[doc = "0: Timer is halted in debug mode"] - HALT = 0, + Halt = 0, #[doc = "1: Timer is running in debug mode"] - RUN = 1, + Run = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DEBUGRUN_A) -> Self { + fn from(variant: Debugrun) -> Self { variant as u8 != 0 } } -impl DEBUGRUN_R { +#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] +pub type DebugrunR = crate::BitReader; +impl DebugrunR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DEBUGRUN_A { + pub const fn variant(&self) -> Debugrun { match self.bits { - false => DEBUGRUN_A::HALT, - true => DEBUGRUN_A::RUN, + false => Debugrun::Halt, + true => Debugrun::Run, } } - #[doc = "Checks if the value of the field is `HALT`"] + #[doc = "Timer is halted in debug mode"] #[inline(always)] pub fn is_halt(&self) -> bool { - *self == DEBUGRUN_A::HALT + *self == Debugrun::Halt } - #[doc = "Checks if the value of the field is `RUN`"] + #[doc = "Timer is running in debug mode"] #[inline(always)] pub fn is_run(&self) -> bool { - *self == DEBUGRUN_A::RUN + *self == Debugrun::Run } } #[doc = "Field `DEBUGRUN` writer - Debug Mode Run Enable"] -pub type DEBUGRUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DEBUGRUN_A, O>; -impl<'a, const O: u8> DEBUGRUN_W<'a, O> { +pub type DebugrunW<'a, REG> = crate::BitWriter<'a, REG, Debugrun>; +impl<'a, REG> DebugrunW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer is halted in debug mode"] #[inline(always)] - pub fn halt(self) -> &'a mut W { - self.variant(DEBUGRUN_A::HALT) + pub fn halt(self) -> &'a mut crate::W { + self.variant(Debugrun::Halt) } #[doc = "Timer is running in debug mode"] #[inline(always)] - pub fn run(self) -> &'a mut W { - self.variant(DEBUGRUN_A::RUN) + pub fn run(self) -> &'a mut crate::W { + self.variant(Debugrun::Run) } } #[doc = "Field `DMACLRACT` reader - DMA Request Clear on Active"] -pub type DMACLRACT_R = crate::BitReader; +pub type DmaclractR = crate::BitReader; #[doc = "Field `DMACLRACT` writer - DMA Request Clear on Active"] -pub type DMACLRACT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `CLKSEL` reader - Clock Source Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type DmaclractW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Clock Source Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "0: Prescaled EM01GRPACLK"] - PRESCEM01GRPACLK = 0, + Prescem01grpaclk = 0, #[doc = "1: Compare/Capture Channel 1 Input"] - CC1 = 1, + Cc1 = 1, #[doc = "2: Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] - TIMEROUF = 2, + Timerouf = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Source Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKSEL_A::PRESCEM01GRPACLK), - 1 => Some(CLKSEL_A::CC1), - 2 => Some(CLKSEL_A::TIMEROUF), + 0 => Some(Clksel::Prescem01grpaclk), + 1 => Some(Clksel::Cc1), + 2 => Some(Clksel::Timerouf), _ => None, } } - #[doc = "Checks if the value of the field is `PRESCEM01GRPACLK`"] + #[doc = "Prescaled EM01GRPACLK"] #[inline(always)] pub fn is_prescem01grpaclk(&self) -> bool { - *self == CLKSEL_A::PRESCEM01GRPACLK + *self == Clksel::Prescem01grpaclk } - #[doc = "Checks if the value of the field is `CC1`"] + #[doc = "Compare/Capture Channel 1 Input"] #[inline(always)] pub fn is_cc1(&self) -> bool { - *self == CLKSEL_A::CC1 + *self == Clksel::Cc1 } - #[doc = "Checks if the value of the field is `TIMEROUF`"] + #[doc = "Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] #[inline(always)] pub fn is_timerouf(&self) -> bool { - *self == CLKSEL_A::TIMEROUF + *self == Clksel::Timerouf } } #[doc = "Field `CLKSEL` writer - Clock Source Select"] -pub type CLKSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, CLKSEL_A, 2, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Prescaled EM01GRPACLK"] #[inline(always)] - pub fn prescem01grpaclk(self) -> &'a mut W { - self.variant(CLKSEL_A::PRESCEM01GRPACLK) + pub fn prescem01grpaclk(self) -> &'a mut crate::W { + self.variant(Clksel::Prescem01grpaclk) } #[doc = "Compare/Capture Channel 1 Input"] #[inline(always)] - pub fn cc1(self) -> &'a mut W { - self.variant(CLKSEL_A::CC1) + pub fn cc1(self) -> &'a mut crate::W { + self.variant(Clksel::Cc1) } #[doc = "Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] #[inline(always)] - pub fn timerouf(self) -> &'a mut W { - self.variant(CLKSEL_A::TIMEROUF) + pub fn timerouf(self) -> &'a mut crate::W { + self.variant(Clksel::Timerouf) } } -#[doc = "Field `RETIMEEN` reader - PWM output retimed enable"] -pub type RETIMEEN_R = crate::BitReader; #[doc = "PWM output retimed enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RETIMEEN_A { +pub enum Retimeen { #[doc = "0: PWM outputs are not re-timed."] - DISABLE = 0, + Disable = 0, #[doc = "1: PWM outputs are re-timed."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RETIMEEN_A) -> Self { + fn from(variant: Retimeen) -> Self { variant as u8 != 0 } } -impl RETIMEEN_R { +#[doc = "Field `RETIMEEN` reader - PWM output retimed enable"] +pub type RetimeenR = crate::BitReader; +impl RetimeenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RETIMEEN_A { + pub const fn variant(&self) -> Retimeen { match self.bits { - false => RETIMEEN_A::DISABLE, - true => RETIMEEN_A::ENABLE, + false => Retimeen::Disable, + true => Retimeen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "PWM outputs are not re-timed."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RETIMEEN_A::DISABLE + *self == Retimeen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "PWM outputs are re-timed."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RETIMEEN_A::ENABLE + *self == Retimeen::Enable } } #[doc = "Field `RETIMEEN` writer - PWM output retimed enable"] -pub type RETIMEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, RETIMEEN_A, O>; -impl<'a, const O: u8> RETIMEEN_W<'a, O> { +pub type RetimeenW<'a, REG> = crate::BitWriter<'a, REG, Retimeen>; +impl<'a, REG> RetimeenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "PWM outputs are not re-timed."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RETIMEEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Retimeen::Disable) } #[doc = "PWM outputs are re-timed."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RETIMEEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Retimeen::Enable) } } -#[doc = "Field `DISSYNCOUT` reader - Disable Timer Start/Stop/Reload output"] -pub type DISSYNCOUT_R = crate::BitReader; #[doc = "Disable Timer Start/Stop/Reload output\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DISSYNCOUT_A { +pub enum Dissyncout { #[doc = "0: Timer can start/stop/reload other timers with SYNC bit set"] - EN = 0, + En = 0, #[doc = "1: Timer cannot start/stop/reload other timers with SYNC bit set"] - DIS = 1, + Dis = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DISSYNCOUT_A) -> Self { + fn from(variant: Dissyncout) -> Self { variant as u8 != 0 } } -impl DISSYNCOUT_R { +#[doc = "Field `DISSYNCOUT` reader - Disable Timer Start/Stop/Reload output"] +pub type DissyncoutR = crate::BitReader; +impl DissyncoutR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DISSYNCOUT_A { + pub const fn variant(&self) -> Dissyncout { match self.bits { - false => DISSYNCOUT_A::EN, - true => DISSYNCOUT_A::DIS, + false => Dissyncout::En, + true => Dissyncout::Dis, } } - #[doc = "Checks if the value of the field is `EN`"] + #[doc = "Timer can start/stop/reload other timers with SYNC bit set"] #[inline(always)] pub fn is_en(&self) -> bool { - *self == DISSYNCOUT_A::EN + *self == Dissyncout::En } - #[doc = "Checks if the value of the field is `DIS`"] + #[doc = "Timer cannot start/stop/reload other timers with SYNC bit set"] #[inline(always)] pub fn is_dis(&self) -> bool { - *self == DISSYNCOUT_A::DIS + *self == Dissyncout::Dis } } #[doc = "Field `DISSYNCOUT` writer - Disable Timer Start/Stop/Reload output"] -pub type DISSYNCOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DISSYNCOUT_A, O>; -impl<'a, const O: u8> DISSYNCOUT_W<'a, O> { +pub type DissyncoutW<'a, REG> = crate::BitWriter<'a, REG, Dissyncout>; +impl<'a, REG> DissyncoutW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer can start/stop/reload other timers with SYNC bit set"] #[inline(always)] - pub fn en(self) -> &'a mut W { - self.variant(DISSYNCOUT_A::EN) + pub fn en(self) -> &'a mut crate::W { + self.variant(Dissyncout::En) } #[doc = "Timer cannot start/stop/reload other timers with SYNC bit set"] #[inline(always)] - pub fn dis(self) -> &'a mut W { - self.variant(DISSYNCOUT_A::DIS) + pub fn dis(self) -> &'a mut crate::W { + self.variant(Dissyncout::Dis) } } #[doc = "Field `ATI` reader - Always Track Inputs"] -pub type ATI_R = crate::BitReader; +pub type AtiR = crate::BitReader; #[doc = "Field `ATI` writer - Always Track Inputs"] -pub type ATI_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type AtiW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RSSCOIST` reader - Reload-Start Sets COIST"] -pub type RSSCOIST_R = crate::BitReader; +pub type RsscoistR = crate::BitReader; #[doc = "Field `RSSCOIST` writer - Reload-Start Sets COIST"] -pub type RSSCOIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `PRESC` reader - Prescaler Setting"] -pub type PRESC_R = crate::FieldReader; +pub type RsscoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Prescaler Setting\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum PRESC_A { +pub enum Presc { #[doc = "0: No prescaling"] - DIV1 = 0, + Div1 = 0, #[doc = "1: Prescale by 2"] - DIV2 = 1, + Div2 = 1, #[doc = "3: Prescale by 4"] - DIV4 = 3, + Div4 = 3, #[doc = "7: Prescale by 8"] - DIV8 = 7, + Div8 = 7, #[doc = "15: Prescale by 16"] - DIV16 = 15, + Div16 = 15, #[doc = "31: Prescale by 32"] - DIV32 = 31, + Div32 = 31, #[doc = "63: Prescale by 64"] - DIV64 = 63, + Div64 = 63, #[doc = "127: Prescale by 128"] - DIV128 = 127, + Div128 = 127, #[doc = "255: Prescale by 256"] - DIV256 = 255, + Div256 = 255, #[doc = "511: Prescale by 512"] - DIV512 = 511, + Div512 = 511, #[doc = "1023: Prescale by 1024"] - DIV1024 = 1023, + Div1024 = 1023, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: PRESC_A) -> Self { + fn from(variant: Presc) -> Self { variant as _ } } -impl PRESC_R { +impl crate::FieldSpec for Presc { + type Ux = u16; +} +impl crate::IsEnum for Presc {} +#[doc = "Field `PRESC` reader - Prescaler Setting"] +pub type PrescR = crate::FieldReader; +impl PrescR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PRESC_A::DIV1), - 1 => Some(PRESC_A::DIV2), - 3 => Some(PRESC_A::DIV4), - 7 => Some(PRESC_A::DIV8), - 15 => Some(PRESC_A::DIV16), - 31 => Some(PRESC_A::DIV32), - 63 => Some(PRESC_A::DIV64), - 127 => Some(PRESC_A::DIV128), - 255 => Some(PRESC_A::DIV256), - 511 => Some(PRESC_A::DIV512), - 1023 => Some(PRESC_A::DIV1024), + 0 => Some(Presc::Div1), + 1 => Some(Presc::Div2), + 3 => Some(Presc::Div4), + 7 => Some(Presc::Div8), + 15 => Some(Presc::Div16), + 31 => Some(Presc::Div32), + 63 => Some(Presc::Div64), + 127 => Some(Presc::Div128), + 255 => Some(Presc::Div256), + 511 => Some(Presc::Div512), + 1023 => Some(Presc::Div1024), _ => None, } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "No prescaling"] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == PRESC_A::DIV1 + *self == Presc::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "Prescale by 2"] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == PRESC_A::DIV2 + *self == Presc::Div2 } - #[doc = "Checks if the value of the field is `DIV4`"] + #[doc = "Prescale by 4"] #[inline(always)] pub fn is_div4(&self) -> bool { - *self == PRESC_A::DIV4 + *self == Presc::Div4 } - #[doc = "Checks if the value of the field is `DIV8`"] + #[doc = "Prescale by 8"] #[inline(always)] pub fn is_div8(&self) -> bool { - *self == PRESC_A::DIV8 + *self == Presc::Div8 } - #[doc = "Checks if the value of the field is `DIV16`"] + #[doc = "Prescale by 16"] #[inline(always)] pub fn is_div16(&self) -> bool { - *self == PRESC_A::DIV16 + *self == Presc::Div16 } - #[doc = "Checks if the value of the field is `DIV32`"] + #[doc = "Prescale by 32"] #[inline(always)] pub fn is_div32(&self) -> bool { - *self == PRESC_A::DIV32 + *self == Presc::Div32 } - #[doc = "Checks if the value of the field is `DIV64`"] + #[doc = "Prescale by 64"] #[inline(always)] pub fn is_div64(&self) -> bool { - *self == PRESC_A::DIV64 + *self == Presc::Div64 } - #[doc = "Checks if the value of the field is `DIV128`"] + #[doc = "Prescale by 128"] #[inline(always)] pub fn is_div128(&self) -> bool { - *self == PRESC_A::DIV128 + *self == Presc::Div128 } - #[doc = "Checks if the value of the field is `DIV256`"] + #[doc = "Prescale by 256"] #[inline(always)] pub fn is_div256(&self) -> bool { - *self == PRESC_A::DIV256 + *self == Presc::Div256 } - #[doc = "Checks if the value of the field is `DIV512`"] + #[doc = "Prescale by 512"] #[inline(always)] pub fn is_div512(&self) -> bool { - *self == PRESC_A::DIV512 + *self == Presc::Div512 } - #[doc = "Checks if the value of the field is `DIV1024`"] + #[doc = "Prescale by 1024"] #[inline(always)] pub fn is_div1024(&self) -> bool { - *self == PRESC_A::DIV1024 + *self == Presc::Div1024 } } #[doc = "Field `PRESC` writer - Prescaler Setting"] -pub type PRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u16, PRESC_A, 10, O>; -impl<'a, const O: u8> PRESC_W<'a, O> { +pub type PrescW<'a, REG> = crate::FieldWriter<'a, REG, 10, Presc>; +impl<'a, REG> PrescW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No prescaling"] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(PRESC_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Presc::Div1) } #[doc = "Prescale by 2"] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(PRESC_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Presc::Div2) } #[doc = "Prescale by 4"] #[inline(always)] - pub fn div4(self) -> &'a mut W { - self.variant(PRESC_A::DIV4) + pub fn div4(self) -> &'a mut crate::W { + self.variant(Presc::Div4) } #[doc = "Prescale by 8"] #[inline(always)] - pub fn div8(self) -> &'a mut W { - self.variant(PRESC_A::DIV8) + pub fn div8(self) -> &'a mut crate::W { + self.variant(Presc::Div8) } #[doc = "Prescale by 16"] #[inline(always)] - pub fn div16(self) -> &'a mut W { - self.variant(PRESC_A::DIV16) + pub fn div16(self) -> &'a mut crate::W { + self.variant(Presc::Div16) } #[doc = "Prescale by 32"] #[inline(always)] - pub fn div32(self) -> &'a mut W { - self.variant(PRESC_A::DIV32) + pub fn div32(self) -> &'a mut crate::W { + self.variant(Presc::Div32) } #[doc = "Prescale by 64"] #[inline(always)] - pub fn div64(self) -> &'a mut W { - self.variant(PRESC_A::DIV64) + pub fn div64(self) -> &'a mut crate::W { + self.variant(Presc::Div64) } #[doc = "Prescale by 128"] #[inline(always)] - pub fn div128(self) -> &'a mut W { - self.variant(PRESC_A::DIV128) + pub fn div128(self) -> &'a mut crate::W { + self.variant(Presc::Div128) } #[doc = "Prescale by 256"] #[inline(always)] - pub fn div256(self) -> &'a mut W { - self.variant(PRESC_A::DIV256) + pub fn div256(self) -> &'a mut crate::W { + self.variant(Presc::Div256) } #[doc = "Prescale by 512"] #[inline(always)] - pub fn div512(self) -> &'a mut W { - self.variant(PRESC_A::DIV512) + pub fn div512(self) -> &'a mut crate::W { + self.variant(Presc::Div512) } #[doc = "Prescale by 1024"] #[inline(always)] - pub fn div1024(self) -> &'a mut W { - self.variant(PRESC_A::DIV1024) + pub fn div1024(self) -> &'a mut crate::W { + self.variant(Presc::Div1024) } } impl R { #[doc = "Bits 0:1 - Timer Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Timer Start/Stop/Reload Synchronization"] #[inline(always)] - pub fn sync(&self) -> SYNC_R { - SYNC_R::new(((self.bits >> 3) & 1) != 0) + pub fn sync(&self) -> SyncR { + SyncR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - One-shot Mode Enable"] #[inline(always)] - pub fn osmen(&self) -> OSMEN_R { - OSMEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn osmen(&self) -> OsmenR { + OsmenR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Quadrature Decoder Mode Selection"] #[inline(always)] - pub fn qdm(&self) -> QDM_R { - QDM_R::new(((self.bits >> 5) & 1) != 0) + pub fn qdm(&self) -> QdmR { + QdmR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Debug Mode Run Enable"] #[inline(always)] - pub fn debugrun(&self) -> DEBUGRUN_R { - DEBUGRUN_R::new(((self.bits >> 6) & 1) != 0) + pub fn debugrun(&self) -> DebugrunR { + DebugrunR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - DMA Request Clear on Active"] #[inline(always)] - pub fn dmaclract(&self) -> DMACLRACT_R { - DMACLRACT_R::new(((self.bits >> 7) & 1) != 0) + pub fn dmaclract(&self) -> DmaclractR { + DmaclractR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:9 - Clock Source Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 10 - PWM output retimed enable"] #[inline(always)] - pub fn retimeen(&self) -> RETIMEEN_R { - RETIMEEN_R::new(((self.bits >> 10) & 1) != 0) + pub fn retimeen(&self) -> RetimeenR { + RetimeenR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Disable Timer Start/Stop/Reload output"] #[inline(always)] - pub fn dissyncout(&self) -> DISSYNCOUT_R { - DISSYNCOUT_R::new(((self.bits >> 11) & 1) != 0) + pub fn dissyncout(&self) -> DissyncoutR { + DissyncoutR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 16 - Always Track Inputs"] #[inline(always)] - pub fn ati(&self) -> ATI_R { - ATI_R::new(((self.bits >> 16) & 1) != 0) + pub fn ati(&self) -> AtiR { + AtiR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Reload-Start Sets COIST"] #[inline(always)] - pub fn rsscoist(&self) -> RSSCOIST_R { - RSSCOIST_R::new(((self.bits >> 17) & 1) != 0) + pub fn rsscoist(&self) -> RsscoistR { + RsscoistR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:27 - Prescaler Setting"] #[inline(always)] - pub fn presc(&self) -> PRESC_R { - PRESC_R::new(((self.bits >> 18) & 0x03ff) as u16) + pub fn presc(&self) -> PrescR { + PrescR::new(((self.bits >> 18) & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:1 - Timer Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 3 - Timer Start/Stop/Reload Synchronization"] #[inline(always)] #[must_use] - pub fn sync(&mut self) -> SYNC_W<3> { - SYNC_W::new(self) + pub fn sync(&mut self) -> SyncW { + SyncW::new(self, 3) } #[doc = "Bit 4 - One-shot Mode Enable"] #[inline(always)] #[must_use] - pub fn osmen(&mut self) -> OSMEN_W<4> { - OSMEN_W::new(self) + pub fn osmen(&mut self) -> OsmenW { + OsmenW::new(self, 4) } #[doc = "Bit 5 - Quadrature Decoder Mode Selection"] #[inline(always)] #[must_use] - pub fn qdm(&mut self) -> QDM_W<5> { - QDM_W::new(self) + pub fn qdm(&mut self) -> QdmW { + QdmW::new(self, 5) } #[doc = "Bit 6 - Debug Mode Run Enable"] #[inline(always)] #[must_use] - pub fn debugrun(&mut self) -> DEBUGRUN_W<6> { - DEBUGRUN_W::new(self) + pub fn debugrun(&mut self) -> DebugrunW { + DebugrunW::new(self, 6) } #[doc = "Bit 7 - DMA Request Clear on Active"] #[inline(always)] #[must_use] - pub fn dmaclract(&mut self) -> DMACLRACT_W<7> { - DMACLRACT_W::new(self) + pub fn dmaclract(&mut self) -> DmaclractW { + DmaclractW::new(self, 7) } #[doc = "Bits 8:9 - Clock Source Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<8> { - CLKSEL_W::new(self) + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 8) } #[doc = "Bit 10 - PWM output retimed enable"] #[inline(always)] #[must_use] - pub fn retimeen(&mut self) -> RETIMEEN_W<10> { - RETIMEEN_W::new(self) + pub fn retimeen(&mut self) -> RetimeenW { + RetimeenW::new(self, 10) } #[doc = "Bit 11 - Disable Timer Start/Stop/Reload output"] #[inline(always)] #[must_use] - pub fn dissyncout(&mut self) -> DISSYNCOUT_W<11> { - DISSYNCOUT_W::new(self) + pub fn dissyncout(&mut self) -> DissyncoutW { + DissyncoutW::new(self, 11) } #[doc = "Bit 16 - Always Track Inputs"] #[inline(always)] #[must_use] - pub fn ati(&mut self) -> ATI_W<16> { - ATI_W::new(self) + pub fn ati(&mut self) -> AtiW { + AtiW::new(self, 16) } #[doc = "Bit 17 - Reload-Start Sets COIST"] #[inline(always)] #[must_use] - pub fn rsscoist(&mut self) -> RSSCOIST_W<17> { - RSSCOIST_W::new(self) + pub fn rsscoist(&mut self) -> RsscoistW { + RsscoistW::new(self, 17) } #[doc = "Bits 18:27 - Prescaler Setting"] #[inline(always)] #[must_use] - pub fn presc(&mut self) -> PRESC_W<18> { - PRESC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn presc(&mut self) -> PrescW { + PrescW::new(self, 18) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cmd.rs index ca6d3b1..bf41157 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cmd.rs @@ -1,60 +1,35 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` writer - Start Timer"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STOP` writer - Stop Timer"] -pub type STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StopW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Start Timer"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Stop Timer"] #[inline(always)] #[must_use] - pub fn stop(&mut self) -> STOP_W<1> { - STOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stop(&mut self) -> StopW { + StopW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cnt.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cnt.rs index 6e69c3d..4064743 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cnt.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/cnt.rs @@ -1,80 +1,40 @@ #[doc = "Register `CNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CNT` reader - Counter Value"] -pub type CNT_R = crate::FieldReader; +pub type CntR = crate::FieldReader; #[doc = "Field `CNT` writer - Counter Value"] -pub type CNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CNT_SPEC, u32, u32, 32, O>; +pub type CntW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Counter Value"] #[inline(always)] - pub fn cnt(&self) -> CNT_R { - CNT_R::new(self.bits) + pub fn cnt(&self) -> CntR { + CntR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Counter Value"] #[inline(always)] #[must_use] - pub fn cnt(&mut self) -> CNT_W<0> { - CNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cnt(&mut self) -> CntW { + CntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](index.html) module"] -pub struct CNT_SPEC; -impl crate::RegisterSpec for CNT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CntSpec; +impl crate::RegisterSpec for CntSpec { type Ux = u32; } -#[doc = "`read()` method returns [cnt::R](R) reader structure"] -impl crate::Readable for CNT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnt::W](W) writer structure"] -impl crate::Writable for CNT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cnt::R`](R) reader structure"] +impl crate::Readable for CntSpec {} +#[doc = "`write(|w| ..)` method takes [`cnt::W`](W) writer structure"] +impl crate::Writable for CntSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNT to value 0"] -impl crate::Resettable for CNT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CntSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/ctrl.rs index 08e646b..e2ed153 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/ctrl.rs @@ -1,258 +1,234 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `RISEA` reader - Timer Rising Input Edge Action"] -pub type RISEA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Timer Rising Input Edge Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RISEA_A { +pub enum Risea { #[doc = "0: No action"] - NONE = 0, + None = 0, #[doc = "1: Start counter without reload"] - START = 1, + Start = 1, #[doc = "2: Stop counter without reload"] - STOP = 2, + Stop = 2, #[doc = "3: Reload and start counter"] - RELOADSTART = 3, + Reloadstart = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RISEA_A) -> Self { + fn from(variant: Risea) -> Self { variant as _ } } -impl RISEA_R { +impl crate::FieldSpec for Risea { + type Ux = u8; +} +impl crate::IsEnum for Risea {} +#[doc = "Field `RISEA` reader - Timer Rising Input Edge Action"] +pub type RiseaR = crate::FieldReader; +impl RiseaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RISEA_A { + pub const fn variant(&self) -> Risea { match self.bits { - 0 => RISEA_A::NONE, - 1 => RISEA_A::START, - 2 => RISEA_A::STOP, - 3 => RISEA_A::RELOADSTART, + 0 => Risea::None, + 1 => Risea::Start, + 2 => Risea::Stop, + 3 => Risea::Reloadstart, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == RISEA_A::NONE + *self == Risea::None } - #[doc = "Checks if the value of the field is `START`"] + #[doc = "Start counter without reload"] #[inline(always)] pub fn is_start(&self) -> bool { - *self == RISEA_A::START + *self == Risea::Start } - #[doc = "Checks if the value of the field is `STOP`"] + #[doc = "Stop counter without reload"] #[inline(always)] pub fn is_stop(&self) -> bool { - *self == RISEA_A::STOP + *self == Risea::Stop } - #[doc = "Checks if the value of the field is `RELOADSTART`"] + #[doc = "Reload and start counter"] #[inline(always)] pub fn is_reloadstart(&self) -> bool { - *self == RISEA_A::RELOADSTART + *self == Risea::Reloadstart } } #[doc = "Field `RISEA` writer - Timer Rising Input Edge Action"] -pub type RISEA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, RISEA_A, 2, O>; -impl<'a, const O: u8> RISEA_W<'a, O> { +pub type RiseaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Risea, crate::Safe>; +impl<'a, REG> RiseaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(RISEA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Risea::None) } #[doc = "Start counter without reload"] #[inline(always)] - pub fn start(self) -> &'a mut W { - self.variant(RISEA_A::START) + pub fn start(self) -> &'a mut crate::W { + self.variant(Risea::Start) } #[doc = "Stop counter without reload"] #[inline(always)] - pub fn stop(self) -> &'a mut W { - self.variant(RISEA_A::STOP) + pub fn stop(self) -> &'a mut crate::W { + self.variant(Risea::Stop) } #[doc = "Reload and start counter"] #[inline(always)] - pub fn reloadstart(self) -> &'a mut W { - self.variant(RISEA_A::RELOADSTART) + pub fn reloadstart(self) -> &'a mut crate::W { + self.variant(Risea::Reloadstart) } } -#[doc = "Field `FALLA` reader - Timer Falling Input Edge Action"] -pub type FALLA_R = crate::FieldReader; #[doc = "Timer Falling Input Edge Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FALLA_A { +pub enum Falla { #[doc = "0: No action"] - NONE = 0, + None = 0, #[doc = "1: Start counter without reload"] - START = 1, + Start = 1, #[doc = "2: Stop counter without reload"] - STOP = 2, + Stop = 2, #[doc = "3: Reload and start counter"] - RELOADSTART = 3, + Reloadstart = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FALLA_A) -> Self { + fn from(variant: Falla) -> Self { variant as _ } } -impl FALLA_R { +impl crate::FieldSpec for Falla { + type Ux = u8; +} +impl crate::IsEnum for Falla {} +#[doc = "Field `FALLA` reader - Timer Falling Input Edge Action"] +pub type FallaR = crate::FieldReader; +impl FallaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FALLA_A { + pub const fn variant(&self) -> Falla { match self.bits { - 0 => FALLA_A::NONE, - 1 => FALLA_A::START, - 2 => FALLA_A::STOP, - 3 => FALLA_A::RELOADSTART, + 0 => Falla::None, + 1 => Falla::Start, + 2 => Falla::Stop, + 3 => Falla::Reloadstart, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == FALLA_A::NONE + *self == Falla::None } - #[doc = "Checks if the value of the field is `START`"] + #[doc = "Start counter without reload"] #[inline(always)] pub fn is_start(&self) -> bool { - *self == FALLA_A::START + *self == Falla::Start } - #[doc = "Checks if the value of the field is `STOP`"] + #[doc = "Stop counter without reload"] #[inline(always)] pub fn is_stop(&self) -> bool { - *self == FALLA_A::STOP + *self == Falla::Stop } - #[doc = "Checks if the value of the field is `RELOADSTART`"] + #[doc = "Reload and start counter"] #[inline(always)] pub fn is_reloadstart(&self) -> bool { - *self == FALLA_A::RELOADSTART + *self == Falla::Reloadstart } } #[doc = "Field `FALLA` writer - Timer Falling Input Edge Action"] -pub type FALLA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, FALLA_A, 2, O>; -impl<'a, const O: u8> FALLA_W<'a, O> { +pub type FallaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Falla, crate::Safe>; +impl<'a, REG> FallaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(FALLA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Falla::None) } #[doc = "Start counter without reload"] #[inline(always)] - pub fn start(self) -> &'a mut W { - self.variant(FALLA_A::START) + pub fn start(self) -> &'a mut crate::W { + self.variant(Falla::Start) } #[doc = "Stop counter without reload"] #[inline(always)] - pub fn stop(self) -> &'a mut W { - self.variant(FALLA_A::STOP) + pub fn stop(self) -> &'a mut crate::W { + self.variant(Falla::Stop) } #[doc = "Reload and start counter"] #[inline(always)] - pub fn reloadstart(self) -> &'a mut W { - self.variant(FALLA_A::RELOADSTART) + pub fn reloadstart(self) -> &'a mut crate::W { + self.variant(Falla::Reloadstart) } } #[doc = "Field `X2CNT` reader - 2x Count Mode"] -pub type X2CNT_R = crate::BitReader; +pub type X2cntR = crate::BitReader; #[doc = "Field `X2CNT` writer - 2x Count Mode"] -pub type X2CNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type X2cntW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - Timer Rising Input Edge Action"] #[inline(always)] - pub fn risea(&self) -> RISEA_R { - RISEA_R::new((self.bits & 3) as u8) + pub fn risea(&self) -> RiseaR { + RiseaR::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Timer Falling Input Edge Action"] #[inline(always)] - pub fn falla(&self) -> FALLA_R { - FALLA_R::new(((self.bits >> 2) & 3) as u8) + pub fn falla(&self) -> FallaR { + FallaR::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bit 4 - 2x Count Mode"] #[inline(always)] - pub fn x2cnt(&self) -> X2CNT_R { - X2CNT_R::new(((self.bits >> 4) & 1) != 0) + pub fn x2cnt(&self) -> X2cntR { + X2cntR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Timer Rising Input Edge Action"] #[inline(always)] #[must_use] - pub fn risea(&mut self) -> RISEA_W<0> { - RISEA_W::new(self) + pub fn risea(&mut self) -> RiseaW { + RiseaW::new(self, 0) } #[doc = "Bits 2:3 - Timer Falling Input Edge Action"] #[inline(always)] #[must_use] - pub fn falla(&mut self) -> FALLA_W<2> { - FALLA_W::new(self) + pub fn falla(&mut self) -> FallaW { + FallaW::new(self, 2) } #[doc = "Bit 4 - 2x Count Mode"] #[inline(always)] #[must_use] - pub fn x2cnt(&mut self) -> X2CNT_W<4> { - X2CNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn x2cnt(&mut self) -> X2cntW { + X2cntW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtcfg.rs index d19a9a3..82b97e1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtcfg.rs @@ -1,186 +1,149 @@ #[doc = "Register `DTCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTEN` reader - DTI Enable"] -pub type DTEN_R = crate::BitReader; +pub type DtenR = crate::BitReader; #[doc = "Field `DTEN` writer - DTI Enable"] -pub type DTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; -#[doc = "Field `DTDAS` reader - DTI Automatic Start-up Functionality"] -pub type DTDAS_R = crate::BitReader; +pub type DtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "DTI Automatic Start-up Functionality\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DTDAS_A { +pub enum Dtdas { #[doc = "0: No DTI restart on debugger exit"] - NORESTART = 0, + Norestart = 0, #[doc = "1: DTI restart on debugger exit"] - RESTART = 1, + Restart = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DTDAS_A) -> Self { + fn from(variant: Dtdas) -> Self { variant as u8 != 0 } } -impl DTDAS_R { +#[doc = "Field `DTDAS` reader - DTI Automatic Start-up Functionality"] +pub type DtdasR = crate::BitReader; +impl DtdasR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTDAS_A { + pub const fn variant(&self) -> Dtdas { match self.bits { - false => DTDAS_A::NORESTART, - true => DTDAS_A::RESTART, + false => Dtdas::Norestart, + true => Dtdas::Restart, } } - #[doc = "Checks if the value of the field is `NORESTART`"] + #[doc = "No DTI restart on debugger exit"] #[inline(always)] pub fn is_norestart(&self) -> bool { - *self == DTDAS_A::NORESTART + *self == Dtdas::Norestart } - #[doc = "Checks if the value of the field is `RESTART`"] + #[doc = "DTI restart on debugger exit"] #[inline(always)] pub fn is_restart(&self) -> bool { - *self == DTDAS_A::RESTART + *self == Dtdas::Restart } } #[doc = "Field `DTDAS` writer - DTI Automatic Start-up Functionality"] -pub type DTDAS_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, DTDAS_A, O>; -impl<'a, const O: u8> DTDAS_W<'a, O> { +pub type DtdasW<'a, REG> = crate::BitWriter<'a, REG, Dtdas>; +impl<'a, REG> DtdasW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No DTI restart on debugger exit"] #[inline(always)] - pub fn norestart(self) -> &'a mut W { - self.variant(DTDAS_A::NORESTART) + pub fn norestart(self) -> &'a mut crate::W { + self.variant(Dtdas::Norestart) } #[doc = "DTI restart on debugger exit"] #[inline(always)] - pub fn restart(self) -> &'a mut W { - self.variant(DTDAS_A::RESTART) + pub fn restart(self) -> &'a mut crate::W { + self.variant(Dtdas::Restart) } } #[doc = "Field `DTAR` reader - DTI Always Run"] -pub type DTAR_R = crate::BitReader; +pub type DtarR = crate::BitReader; #[doc = "Field `DTAR` writer - DTI Always Run"] -pub type DTAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtarW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTFATS` reader - DTI Fault Action on Timer Stop"] -pub type DTFATS_R = crate::BitReader; +pub type DtfatsR = crate::BitReader; #[doc = "Field `DTFATS` writer - DTI Fault Action on Timer Stop"] -pub type DTFATS_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtfatsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRSEN` reader - DTI PRS Source Enable"] -pub type DTPRSEN_R = crate::BitReader; +pub type DtprsenR = crate::BitReader; #[doc = "Field `DTPRSEN` writer - DTI PRS Source Enable"] -pub type DTPRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtprsenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI Enable"] #[inline(always)] - pub fn dten(&self) -> DTEN_R { - DTEN_R::new((self.bits & 1) != 0) + pub fn dten(&self) -> DtenR { + DtenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI Automatic Start-up Functionality"] #[inline(always)] - pub fn dtdas(&self) -> DTDAS_R { - DTDAS_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtdas(&self) -> DtdasR { + DtdasR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 9 - DTI Always Run"] #[inline(always)] - pub fn dtar(&self) -> DTAR_R { - DTAR_R::new(((self.bits >> 9) & 1) != 0) + pub fn dtar(&self) -> DtarR { + DtarR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - DTI Fault Action on Timer Stop"] #[inline(always)] - pub fn dtfats(&self) -> DTFATS_R { - DTFATS_R::new(((self.bits >> 10) & 1) != 0) + pub fn dtfats(&self) -> DtfatsR { + DtfatsR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - DTI PRS Source Enable"] #[inline(always)] - pub fn dtprsen(&self) -> DTPRSEN_R { - DTPRSEN_R::new(((self.bits >> 11) & 1) != 0) + pub fn dtprsen(&self) -> DtprsenR { + DtprsenR::new(((self.bits >> 11) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI Enable"] #[inline(always)] #[must_use] - pub fn dten(&mut self) -> DTEN_W<0> { - DTEN_W::new(self) + pub fn dten(&mut self) -> DtenW { + DtenW::new(self, 0) } #[doc = "Bit 1 - DTI Automatic Start-up Functionality"] #[inline(always)] #[must_use] - pub fn dtdas(&mut self) -> DTDAS_W<1> { - DTDAS_W::new(self) + pub fn dtdas(&mut self) -> DtdasW { + DtdasW::new(self, 1) } #[doc = "Bit 9 - DTI Always Run"] #[inline(always)] #[must_use] - pub fn dtar(&mut self) -> DTAR_W<9> { - DTAR_W::new(self) + pub fn dtar(&mut self) -> DtarW { + DtarW::new(self, 9) } #[doc = "Bit 10 - DTI Fault Action on Timer Stop"] #[inline(always)] #[must_use] - pub fn dtfats(&mut self) -> DTFATS_W<10> { - DTFATS_W::new(self) + pub fn dtfats(&mut self) -> DtfatsW { + DtfatsW::new(self, 10) } #[doc = "Bit 11 - DTI PRS Source Enable"] #[inline(always)] #[must_use] - pub fn dtprsen(&mut self) -> DTPRSEN_W<11> { - DTPRSEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtprsen(&mut self) -> DtprsenW { + DtprsenW::new(self, 11) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtcfg](index.html) module"] -pub struct DTCFG_SPEC; -impl crate::RegisterSpec for DTCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtcfgSpec; +impl crate::RegisterSpec for DtcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtcfg::R](R) reader structure"] -impl crate::Readable for DTCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtcfg::W](W) writer structure"] -impl crate::Writable for DTCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtcfg::R`](R) reader structure"] +impl crate::Readable for DtcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dtcfg::W`](W) writer structure"] +impl crate::Writable for DtcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTCFG to value 0"] -impl crate::Resettable for DTCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtctrl.rs index 816a05e..84f6d17 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtctrl.rs @@ -1,95 +1,55 @@ #[doc = "Register `DTCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTCINV` reader - DTI Complementary Output Invert."] -pub type DTCINV_R = crate::BitReader; +pub type DtcinvR = crate::BitReader; #[doc = "Field `DTCINV` writer - DTI Complementary Output Invert."] -pub type DTCINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, O>; +pub type DtcinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTIPOL` reader - DTI Inactive Polarity"] -pub type DTIPOL_R = crate::BitReader; +pub type DtipolR = crate::BitReader; #[doc = "Field `DTIPOL` writer - DTI Inactive Polarity"] -pub type DTIPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, O>; +pub type DtipolW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI Complementary Output Invert."] #[inline(always)] - pub fn dtcinv(&self) -> DTCINV_R { - DTCINV_R::new((self.bits & 1) != 0) + pub fn dtcinv(&self) -> DtcinvR { + DtcinvR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI Inactive Polarity"] #[inline(always)] - pub fn dtipol(&self) -> DTIPOL_R { - DTIPOL_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtipol(&self) -> DtipolR { + DtipolR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI Complementary Output Invert."] #[inline(always)] #[must_use] - pub fn dtcinv(&mut self) -> DTCINV_W<0> { - DTCINV_W::new(self) + pub fn dtcinv(&mut self) -> DtcinvW { + DtcinvW::new(self, 0) } #[doc = "Bit 1 - DTI Inactive Polarity"] #[inline(always)] #[must_use] - pub fn dtipol(&mut self) -> DTIPOL_W<1> { - DTIPOL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtipol(&mut self) -> DtipolW { + DtipolW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtctrl](index.html) module"] -pub struct DTCTRL_SPEC; -impl crate::RegisterSpec for DTCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtctrlSpec; +impl crate::RegisterSpec for DtctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtctrl::R](R) reader structure"] -impl crate::Readable for DTCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtctrl::W](W) writer structure"] -impl crate::Writable for DTCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtctrl::R`](R) reader structure"] +impl crate::Readable for DtctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`dtctrl::W`](W) writer structure"] +impl crate::Writable for DtctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTCTRL to value 0"] -impl crate::Resettable for DTCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtfault.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtfault.rs index 01a53f9..ecd21aa 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtfault.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtfault.rs @@ -1,65 +1,50 @@ #[doc = "Register `DTFAULT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DTPRS0F` reader - DTI PRS 0 Fault"] -pub type DTPRS0F_R = crate::BitReader; +pub type Dtprs0fR = crate::BitReader; #[doc = "Field `DTPRS1F` reader - DTI PRS 1 Fault"] -pub type DTPRS1F_R = crate::BitReader; +pub type Dtprs1fR = crate::BitReader; #[doc = "Field `DTDBGF` reader - DTI Debugger Fault"] -pub type DTDBGF_R = crate::BitReader; +pub type DtdbgfR = crate::BitReader; #[doc = "Field `DTLOCKUPF` reader - DTI Lockup Fault"] -pub type DTLOCKUPF_R = crate::BitReader; +pub type DtlockupfR = crate::BitReader; #[doc = "Field `DTEM23F` reader - DTI EM23 Entry Fault"] -pub type DTEM23F_R = crate::BitReader; +pub type Dtem23fR = crate::BitReader; impl R { #[doc = "Bit 0 - DTI PRS 0 Fault"] #[inline(always)] - pub fn dtprs0f(&self) -> DTPRS0F_R { - DTPRS0F_R::new((self.bits & 1) != 0) + pub fn dtprs0f(&self) -> Dtprs0fR { + Dtprs0fR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI PRS 1 Fault"] #[inline(always)] - pub fn dtprs1f(&self) -> DTPRS1F_R { - DTPRS1F_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtprs1f(&self) -> Dtprs1fR { + Dtprs1fR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DTI Debugger Fault"] #[inline(always)] - pub fn dtdbgf(&self) -> DTDBGF_R { - DTDBGF_R::new(((self.bits >> 2) & 1) != 0) + pub fn dtdbgf(&self) -> DtdbgfR { + DtdbgfR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DTI Lockup Fault"] #[inline(always)] - pub fn dtlockupf(&self) -> DTLOCKUPF_R { - DTLOCKUPF_R::new(((self.bits >> 3) & 1) != 0) + pub fn dtlockupf(&self) -> DtlockupfR { + DtlockupfR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - DTI EM23 Entry Fault"] #[inline(always)] - pub fn dtem23f(&self) -> DTEM23F_R { - DTEM23F_R::new(((self.bits >> 4) & 1) != 0) + pub fn dtem23f(&self) -> Dtem23fR { + Dtem23fR::new(((self.bits >> 4) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfault](index.html) module"] -pub struct DTFAULT_SPEC; -impl crate::RegisterSpec for DTFAULT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfault::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfaultSpec; +impl crate::RegisterSpec for DtfaultSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtfault::R](R) reader structure"] -impl crate::Readable for DTFAULT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`dtfault::R`](R) reader structure"] +impl crate::Readable for DtfaultSpec {} #[doc = "`reset()` method sets DTFAULT to value 0"] -impl crate::Resettable for DTFAULT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfaultSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtfaultc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtfaultc.rs index 1c3d1ba..bcb21e2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtfaultc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtfaultc.rs @@ -1,84 +1,59 @@ #[doc = "Register `DTFAULTC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTPRS0FC` writer - DTI PRS0 Fault Clear"] -pub type DTPRS0FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtprs0fcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRS1FC` writer - DTI PRS1 Fault Clear"] -pub type DTPRS1FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtprs1fcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTDBGFC` writer - DTI Debugger Fault Clear"] -pub type DTDBGFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type DtdbgfcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTLOCKUPFC` writer - DTI Lockup Fault Clear"] -pub type DTLOCKUPFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type DtlockupfcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTEM23FC` writer - DTI EM23 Fault Clear"] -pub type DTEM23FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtem23fcW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - DTI PRS0 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtprs0fc(&mut self) -> DTPRS0FC_W<0> { - DTPRS0FC_W::new(self) + pub fn dtprs0fc(&mut self) -> Dtprs0fcW { + Dtprs0fcW::new(self, 0) } #[doc = "Bit 1 - DTI PRS1 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtprs1fc(&mut self) -> DTPRS1FC_W<1> { - DTPRS1FC_W::new(self) + pub fn dtprs1fc(&mut self) -> Dtprs1fcW { + Dtprs1fcW::new(self, 1) } #[doc = "Bit 2 - DTI Debugger Fault Clear"] #[inline(always)] #[must_use] - pub fn dtdbgfc(&mut self) -> DTDBGFC_W<2> { - DTDBGFC_W::new(self) + pub fn dtdbgfc(&mut self) -> DtdbgfcW { + DtdbgfcW::new(self, 2) } #[doc = "Bit 3 - DTI Lockup Fault Clear"] #[inline(always)] #[must_use] - pub fn dtlockupfc(&mut self) -> DTLOCKUPFC_W<3> { - DTLOCKUPFC_W::new(self) + pub fn dtlockupfc(&mut self) -> DtlockupfcW { + DtlockupfcW::new(self, 3) } #[doc = "Bit 4 - DTI EM23 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtem23fc(&mut self) -> DTEM23FC_W<4> { - DTEM23FC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtem23fc(&mut self) -> Dtem23fcW { + Dtem23fcW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfaultc](index.html) module"] -pub struct DTFAULTC_SPEC; -impl crate::RegisterSpec for DTFAULTC_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfaultc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfaultcSpec; +impl crate::RegisterSpec for DtfaultcSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [dtfaultc::W](W) writer structure"] -impl crate::Writable for DTFAULTC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`dtfaultc::W`](W) writer structure"] +impl crate::Writable for DtfaultcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTFAULTC to value 0"] -impl crate::Resettable for DTFAULTC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfaultcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtfcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtfcfg.rs index 91dee4b..6179df8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtfcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtfcfg.rs @@ -1,229 +1,197 @@ #[doc = "Register `DTFCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTFCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DTFA` reader - DTI Fault Action"] -pub type DTFA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DTI Fault Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DTFA_A { +pub enum Dtfa { #[doc = "0: No action on fault"] - NONE = 0, + None = 0, #[doc = "1: Set outputs inactive"] - INACTIVE = 1, + Inactive = 1, #[doc = "2: Clear outputs"] - CLEAR = 2, + Clear = 2, #[doc = "3: Tristate outputs"] - TRISTATE = 3, + Tristate = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DTFA_A) -> Self { + fn from(variant: Dtfa) -> Self { variant as _ } } -impl DTFA_R { +impl crate::FieldSpec for Dtfa { + type Ux = u8; +} +impl crate::IsEnum for Dtfa {} +#[doc = "Field `DTFA` reader - DTI Fault Action"] +pub type DtfaR = crate::FieldReader; +impl DtfaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTFA_A { + pub const fn variant(&self) -> Dtfa { match self.bits { - 0 => DTFA_A::NONE, - 1 => DTFA_A::INACTIVE, - 2 => DTFA_A::CLEAR, - 3 => DTFA_A::TRISTATE, + 0 => Dtfa::None, + 1 => Dtfa::Inactive, + 2 => Dtfa::Clear, + 3 => Dtfa::Tristate, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on fault"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == DTFA_A::NONE + *self == Dtfa::None } - #[doc = "Checks if the value of the field is `INACTIVE`"] + #[doc = "Set outputs inactive"] #[inline(always)] pub fn is_inactive(&self) -> bool { - *self == DTFA_A::INACTIVE + *self == Dtfa::Inactive } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear outputs"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == DTFA_A::CLEAR + *self == Dtfa::Clear } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "Tristate outputs"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == DTFA_A::TRISTATE + *self == Dtfa::Tristate } } #[doc = "Field `DTFA` writer - DTI Fault Action"] -pub type DTFA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, DTFCFG_SPEC, u8, DTFA_A, 2, O>; -impl<'a, const O: u8> DTFA_W<'a, O> { +pub type DtfaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dtfa, crate::Safe>; +impl<'a, REG> DtfaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on fault"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(DTFA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Dtfa::None) } #[doc = "Set outputs inactive"] #[inline(always)] - pub fn inactive(self) -> &'a mut W { - self.variant(DTFA_A::INACTIVE) + pub fn inactive(self) -> &'a mut crate::W { + self.variant(Dtfa::Inactive) } #[doc = "Clear outputs"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(DTFA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Dtfa::Clear) } #[doc = "Tristate outputs"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(DTFA_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Dtfa::Tristate) } } #[doc = "Field `DTPRS0FEN` reader - DTI PRS 0 Fault Enable"] -pub type DTPRS0FEN_R = crate::BitReader; +pub type Dtprs0fenR = crate::BitReader; #[doc = "Field `DTPRS0FEN` writer - DTI PRS 0 Fault Enable"] -pub type DTPRS0FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtprs0fenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRS1FEN` reader - DTI PRS 1 Fault Enable"] -pub type DTPRS1FEN_R = crate::BitReader; +pub type Dtprs1fenR = crate::BitReader; #[doc = "Field `DTPRS1FEN` writer - DTI PRS 1 Fault Enable"] -pub type DTPRS1FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtprs1fenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTDBGFEN` reader - DTI Debugger Fault Enable"] -pub type DTDBGFEN_R = crate::BitReader; +pub type DtdbgfenR = crate::BitReader; #[doc = "Field `DTDBGFEN` writer - DTI Debugger Fault Enable"] -pub type DTDBGFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type DtdbgfenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTLOCKUPFEN` reader - DTI Lockup Fault Enable"] -pub type DTLOCKUPFEN_R = crate::BitReader; +pub type DtlockupfenR = crate::BitReader; #[doc = "Field `DTLOCKUPFEN` writer - DTI Lockup Fault Enable"] -pub type DTLOCKUPFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type DtlockupfenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTEM23FEN` reader - DTI EM23 Fault Enable"] -pub type DTEM23FEN_R = crate::BitReader; +pub type Dtem23fenR = crate::BitReader; #[doc = "Field `DTEM23FEN` writer - DTI EM23 Fault Enable"] -pub type DTEM23FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtem23fenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 16:17 - DTI Fault Action"] #[inline(always)] - pub fn dtfa(&self) -> DTFA_R { - DTFA_R::new(((self.bits >> 16) & 3) as u8) + pub fn dtfa(&self) -> DtfaR { + DtfaR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 24 - DTI PRS 0 Fault Enable"] #[inline(always)] - pub fn dtprs0fen(&self) -> DTPRS0FEN_R { - DTPRS0FEN_R::new(((self.bits >> 24) & 1) != 0) + pub fn dtprs0fen(&self) -> Dtprs0fenR { + Dtprs0fenR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - DTI PRS 1 Fault Enable"] #[inline(always)] - pub fn dtprs1fen(&self) -> DTPRS1FEN_R { - DTPRS1FEN_R::new(((self.bits >> 25) & 1) != 0) + pub fn dtprs1fen(&self) -> Dtprs1fenR { + Dtprs1fenR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - DTI Debugger Fault Enable"] #[inline(always)] - pub fn dtdbgfen(&self) -> DTDBGFEN_R { - DTDBGFEN_R::new(((self.bits >> 26) & 1) != 0) + pub fn dtdbgfen(&self) -> DtdbgfenR { + DtdbgfenR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - DTI Lockup Fault Enable"] #[inline(always)] - pub fn dtlockupfen(&self) -> DTLOCKUPFEN_R { - DTLOCKUPFEN_R::new(((self.bits >> 27) & 1) != 0) + pub fn dtlockupfen(&self) -> DtlockupfenR { + DtlockupfenR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - DTI EM23 Fault Enable"] #[inline(always)] - pub fn dtem23fen(&self) -> DTEM23FEN_R { - DTEM23FEN_R::new(((self.bits >> 28) & 1) != 0) + pub fn dtem23fen(&self) -> Dtem23fenR { + Dtem23fenR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bits 16:17 - DTI Fault Action"] #[inline(always)] #[must_use] - pub fn dtfa(&mut self) -> DTFA_W<16> { - DTFA_W::new(self) + pub fn dtfa(&mut self) -> DtfaW { + DtfaW::new(self, 16) } #[doc = "Bit 24 - DTI PRS 0 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtprs0fen(&mut self) -> DTPRS0FEN_W<24> { - DTPRS0FEN_W::new(self) + pub fn dtprs0fen(&mut self) -> Dtprs0fenW { + Dtprs0fenW::new(self, 24) } #[doc = "Bit 25 - DTI PRS 1 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtprs1fen(&mut self) -> DTPRS1FEN_W<25> { - DTPRS1FEN_W::new(self) + pub fn dtprs1fen(&mut self) -> Dtprs1fenW { + Dtprs1fenW::new(self, 25) } #[doc = "Bit 26 - DTI Debugger Fault Enable"] #[inline(always)] #[must_use] - pub fn dtdbgfen(&mut self) -> DTDBGFEN_W<26> { - DTDBGFEN_W::new(self) + pub fn dtdbgfen(&mut self) -> DtdbgfenW { + DtdbgfenW::new(self, 26) } #[doc = "Bit 27 - DTI Lockup Fault Enable"] #[inline(always)] #[must_use] - pub fn dtlockupfen(&mut self) -> DTLOCKUPFEN_W<27> { - DTLOCKUPFEN_W::new(self) + pub fn dtlockupfen(&mut self) -> DtlockupfenW { + DtlockupfenW::new(self, 27) } #[doc = "Bit 28 - DTI EM23 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtem23fen(&mut self) -> DTEM23FEN_W<28> { - DTEM23FEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtem23fen(&mut self) -> Dtem23fenW { + Dtem23fenW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfcfg](index.html) module"] -pub struct DTFCFG_SPEC; -impl crate::RegisterSpec for DTFCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfcfgSpec; +impl crate::RegisterSpec for DtfcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtfcfg::R](R) reader structure"] -impl crate::Readable for DTFCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtfcfg::W](W) writer structure"] -impl crate::Writable for DTFCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtfcfg::R`](R) reader structure"] +impl crate::Readable for DtfcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dtfcfg::W`](W) writer structure"] +impl crate::Writable for DtfcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTFCFG to value 0"] -impl crate::Resettable for DTFCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtlock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtlock.rs index 434789a..5ce63f5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtlock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtlock.rs @@ -1,73 +1,55 @@ #[doc = "Register `DTLOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "DTI Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum DTILOCKKEY_AW { +pub enum Dtilockkey { #[doc = "52864: Write to unlock TIMER DTI registers"] - UNLOCK = 52864, + Unlock = 52864, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: DTILOCKKEY_AW) -> Self { + fn from(variant: Dtilockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Dtilockkey { + type Ux = u16; +} +impl crate::IsEnum for Dtilockkey {} #[doc = "Field `DTILOCKKEY` writer - DTI Lock Key"] -pub type DTILOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, DTLOCK_SPEC, u16, DTILOCKKEY_AW, 16, O>; -impl<'a, const O: u8> DTILOCKKEY_W<'a, O> { +pub type DtilockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Dtilockkey>; +impl<'a, REG> DtilockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unlock TIMER DTI registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(DTILOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Dtilockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - DTI Lock Key"] #[inline(always)] #[must_use] - pub fn dtilockkey(&mut self) -> DTILOCKKEY_W<0> { - DTILOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtilockkey(&mut self) -> DtilockkeyW { + DtilockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtlock](index.html) module"] -pub struct DTLOCK_SPEC; -impl crate::RegisterSpec for DTLOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtlock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtlockSpec; +impl crate::RegisterSpec for DtlockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [dtlock::W](W) writer structure"] -impl crate::Writable for DTLOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`dtlock::W`](W) writer structure"] +impl crate::Writable for DtlockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTLOCK to value 0"] -impl crate::Resettable for DTLOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtlockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtogen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtogen.rs index 818b4bb..35926ca 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtogen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dtogen.rs @@ -1,155 +1,115 @@ #[doc = "Register `DTOGEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTOGEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTOGCC0EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC0EN_R = crate::BitReader; +pub type Dtogcc0enR = crate::BitReader; #[doc = "Field `DTOGCC0EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCC1EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC1EN_R = crate::BitReader; +pub type Dtogcc1enR = crate::BitReader; #[doc = "Field `DTOGCC1EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCC2EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC2EN_R = crate::BitReader; +pub type Dtogcc2enR = crate::BitReader; #[doc = "Field `DTOGCC2EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC2EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc2enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI0EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI0EN_R = crate::BitReader; +pub type Dtogcdti0enR = crate::BitReader; #[doc = "Field `DTOGCDTI0EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI1EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI1EN_R = crate::BitReader; +pub type Dtogcdti1enR = crate::BitReader; #[doc = "Field `DTOGCDTI1EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI2EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI2EN_R = crate::BitReader; +pub type Dtogcdti2enR = crate::BitReader; #[doc = "Field `DTOGCDTI2EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI2EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti2enW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc0en(&self) -> DTOGCC0EN_R { - DTOGCC0EN_R::new((self.bits & 1) != 0) + pub fn dtogcc0en(&self) -> Dtogcc0enR { + Dtogcc0enR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc1en(&self) -> DTOGCC1EN_R { - DTOGCC1EN_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtogcc1en(&self) -> Dtogcc1enR { + Dtogcc1enR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc2en(&self) -> DTOGCC2EN_R { - DTOGCC2EN_R::new(((self.bits >> 2) & 1) != 0) + pub fn dtogcc2en(&self) -> Dtogcc2enR { + Dtogcc2enR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti0en(&self) -> DTOGCDTI0EN_R { - DTOGCDTI0EN_R::new(((self.bits >> 3) & 1) != 0) + pub fn dtogcdti0en(&self) -> Dtogcdti0enR { + Dtogcdti0enR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti1en(&self) -> DTOGCDTI1EN_R { - DTOGCDTI1EN_R::new(((self.bits >> 4) & 1) != 0) + pub fn dtogcdti1en(&self) -> Dtogcdti1enR { + Dtogcdti1enR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti2en(&self) -> DTOGCDTI2EN_R { - DTOGCDTI2EN_R::new(((self.bits >> 5) & 1) != 0) + pub fn dtogcdti2en(&self) -> Dtogcdti2enR { + Dtogcdti2enR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc0en(&mut self) -> DTOGCC0EN_W<0> { - DTOGCC0EN_W::new(self) + pub fn dtogcc0en(&mut self) -> Dtogcc0enW { + Dtogcc0enW::new(self, 0) } #[doc = "Bit 1 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc1en(&mut self) -> DTOGCC1EN_W<1> { - DTOGCC1EN_W::new(self) + pub fn dtogcc1en(&mut self) -> Dtogcc1enW { + Dtogcc1enW::new(self, 1) } #[doc = "Bit 2 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc2en(&mut self) -> DTOGCC2EN_W<2> { - DTOGCC2EN_W::new(self) + pub fn dtogcc2en(&mut self) -> Dtogcc2enW { + Dtogcc2enW::new(self, 2) } #[doc = "Bit 3 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti0en(&mut self) -> DTOGCDTI0EN_W<3> { - DTOGCDTI0EN_W::new(self) + pub fn dtogcdti0en(&mut self) -> Dtogcdti0enW { + Dtogcdti0enW::new(self, 3) } #[doc = "Bit 4 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti1en(&mut self) -> DTOGCDTI1EN_W<4> { - DTOGCDTI1EN_W::new(self) + pub fn dtogcdti1en(&mut self) -> Dtogcdti1enW { + Dtogcdti1enW::new(self, 4) } #[doc = "Bit 5 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti2en(&mut self) -> DTOGCDTI2EN_W<5> { - DTOGCDTI2EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtogcdti2en(&mut self) -> Dtogcdti2enW { + Dtogcdti2enW::new(self, 5) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtogen](index.html) module"] -pub struct DTOGEN_SPEC; -impl crate::RegisterSpec for DTOGEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtogen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtogen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtogenSpec; +impl crate::RegisterSpec for DtogenSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtogen::R](R) reader structure"] -impl crate::Readable for DTOGEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtogen::W](W) writer structure"] -impl crate::Writable for DTOGEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtogen::R`](R) reader structure"] +impl crate::Readable for DtogenSpec {} +#[doc = "`write(|w| ..)` method takes [`dtogen::W`](W) writer structure"] +impl crate::Writable for DtogenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTOGEN to value 0"] -impl crate::Resettable for DTOGEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtogenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dttimecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dttimecfg.rs index 63e4c73..9577f86 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dttimecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/dttimecfg.rs @@ -1,110 +1,70 @@ #[doc = "Register `DTTIMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTTIMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTPRESC` reader - DTI Prescaler Setting"] -pub type DTPRESC_R = crate::FieldReader; +pub type DtprescR = crate::FieldReader; #[doc = "Field `DTPRESC` writer - DTI Prescaler Setting"] -pub type DTPRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u16, u16, 10, O>; +pub type DtprescW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `DTRISET` reader - DTI Rise-time"] -pub type DTRISET_R = crate::FieldReader; +pub type DtrisetR = crate::FieldReader; #[doc = "Field `DTRISET` writer - DTI Rise-time"] -pub type DTRISET_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u8, u8, 6, O>; +pub type DtrisetW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `DTFALLT` reader - DTI Fall-time"] -pub type DTFALLT_R = crate::FieldReader; +pub type DtfalltR = crate::FieldReader; #[doc = "Field `DTFALLT` writer - DTI Fall-time"] -pub type DTFALLT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u8, u8, 6, O>; +pub type DtfalltW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:9 - DTI Prescaler Setting"] #[inline(always)] - pub fn dtpresc(&self) -> DTPRESC_R { - DTPRESC_R::new((self.bits & 0x03ff) as u16) + pub fn dtpresc(&self) -> DtprescR { + DtprescR::new((self.bits & 0x03ff) as u16) } #[doc = "Bits 10:15 - DTI Rise-time"] #[inline(always)] - pub fn dtriset(&self) -> DTRISET_R { - DTRISET_R::new(((self.bits >> 10) & 0x3f) as u8) + pub fn dtriset(&self) -> DtrisetR { + DtrisetR::new(((self.bits >> 10) & 0x3f) as u8) } #[doc = "Bits 16:21 - DTI Fall-time"] #[inline(always)] - pub fn dtfallt(&self) -> DTFALLT_R { - DTFALLT_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn dtfallt(&self) -> DtfalltR { + DtfalltR::new(((self.bits >> 16) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:9 - DTI Prescaler Setting"] #[inline(always)] #[must_use] - pub fn dtpresc(&mut self) -> DTPRESC_W<0> { - DTPRESC_W::new(self) + pub fn dtpresc(&mut self) -> DtprescW { + DtprescW::new(self, 0) } #[doc = "Bits 10:15 - DTI Rise-time"] #[inline(always)] #[must_use] - pub fn dtriset(&mut self) -> DTRISET_W<10> { - DTRISET_W::new(self) + pub fn dtriset(&mut self) -> DtrisetW { + DtrisetW::new(self, 10) } #[doc = "Bits 16:21 - DTI Fall-time"] #[inline(always)] #[must_use] - pub fn dtfallt(&mut self) -> DTFALLT_W<16> { - DTFALLT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtfallt(&mut self) -> DtfalltW { + DtfalltW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dttimecfg](index.html) module"] -pub struct DTTIMECFG_SPEC; -impl crate::RegisterSpec for DTTIMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dttimecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dttimecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DttimecfgSpec; +impl crate::RegisterSpec for DttimecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dttimecfg::R](R) reader structure"] -impl crate::Readable for DTTIMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dttimecfg::W](W) writer structure"] -impl crate::Writable for DTTIMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dttimecfg::R`](R) reader structure"] +impl crate::Readable for DttimecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dttimecfg::W`](W) writer structure"] +impl crate::Writable for DttimecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTTIMECFG to value 0"] -impl crate::Resettable for DTTIMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DttimecfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/en.rs index 9392483..303507b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Timer Module Enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Timer Module Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Timer Module Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Timer Module Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/ien.rs index 66588d7..73273ef 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/ien.rs @@ -1,290 +1,250 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OF` reader - Overflow Interrupt Enable"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Enable"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UF` reader - Underflow Interrupt Enable"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Enable"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DIRCHG` reader - Direction Change Detect Interrupt Enable"] -pub type DIRCHG_R = crate::BitReader; +pub type DirchgR = crate::BitReader; #[doc = "Field `DIRCHG` writer - Direction Change Detect Interrupt Enable"] -pub type DIRCHG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type DirchgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC0` reader - CC0 Interrupt Enable"] -pub type CC0_R = crate::BitReader; +pub type Cc0R = crate::BitReader; #[doc = "Field `CC0` writer - CC0 Interrupt Enable"] -pub type CC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1` reader - CC1 Interrupt Enable"] -pub type CC1_R = crate::BitReader; +pub type Cc1R = crate::BitReader; #[doc = "Field `CC1` writer - CC1 Interrupt Enable"] -pub type CC1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2` reader - CC2 Interrupt Enable"] -pub type CC2_R = crate::BitReader; +pub type Cc2R = crate::BitReader; #[doc = "Field `CC2` writer - CC2 Interrupt Enable"] -pub type CC2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL0` reader - ICFWLFULL0 Interrupt Enable"] -pub type ICFWLFULL0_R = crate::BitReader; +pub type Icfwlfull0R = crate::BitReader; #[doc = "Field `ICFWLFULL0` writer - ICFWLFULL0 Interrupt Enable"] -pub type ICFWLFULL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL1` reader - ICFWLFULL1 Interrupt Enable"] -pub type ICFWLFULL1_R = crate::BitReader; +pub type Icfwlfull1R = crate::BitReader; #[doc = "Field `ICFWLFULL1` writer - ICFWLFULL1 Interrupt Enable"] -pub type ICFWLFULL1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL2` reader - ICFWLFULL2 Interrupt Enable"] -pub type ICFWLFULL2_R = crate::BitReader; +pub type Icfwlfull2R = crate::BitReader; #[doc = "Field `ICFWLFULL2` writer - ICFWLFULL2 Interrupt Enable"] -pub type ICFWLFULL2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF0` reader - ICFOF0 Interrupt Enable"] -pub type ICFOF0_R = crate::BitReader; +pub type Icfof0R = crate::BitReader; #[doc = "Field `ICFOF0` writer - ICFOF0 Interrupt Enable"] -pub type ICFOF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF1` reader - ICFOF1 Interrupt Enable"] -pub type ICFOF1_R = crate::BitReader; +pub type Icfof1R = crate::BitReader; #[doc = "Field `ICFOF1` writer - ICFOF1 Interrupt Enable"] -pub type ICFOF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF2` reader - ICFOF2 Interrupt Enable"] -pub type ICFOF2_R = crate::BitReader; +pub type Icfof2R = crate::BitReader; #[doc = "Field `ICFOF2` writer - ICFOF2 Interrupt Enable"] -pub type ICFOF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF0` reader - ICFUF0 Interrupt Enable"] -pub type ICFUF0_R = crate::BitReader; +pub type Icfuf0R = crate::BitReader; #[doc = "Field `ICFUF0` writer - ICFUF0 Interrupt Enable"] -pub type ICFUF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF1` reader - ICFUF1 Interrupt Enable"] -pub type ICFUF1_R = crate::BitReader; +pub type Icfuf1R = crate::BitReader; #[doc = "Field `ICFUF1` writer - ICFUF1 Interrupt Enable"] -pub type ICFUF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF2` reader - ICFUF2 Interrupt Enable"] -pub type ICFUF2_R = crate::BitReader; +pub type Icfuf2R = crate::BitReader; #[doc = "Field `ICFUF2` writer - ICFUF2 Interrupt Enable"] -pub type ICFUF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Enable"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new((self.bits & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Underflow Interrupt Enable"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new(((self.bits >> 1) & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Direction Change Detect Interrupt Enable"] #[inline(always)] - pub fn dirchg(&self) -> DIRCHG_R { - DIRCHG_R::new(((self.bits >> 2) & 1) != 0) + pub fn dirchg(&self) -> DirchgR { + DirchgR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - CC0 Interrupt Enable"] #[inline(always)] - pub fn cc0(&self) -> CC0_R { - CC0_R::new(((self.bits >> 4) & 1) != 0) + pub fn cc0(&self) -> Cc0R { + Cc0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CC1 Interrupt Enable"] #[inline(always)] - pub fn cc1(&self) -> CC1_R { - CC1_R::new(((self.bits >> 5) & 1) != 0) + pub fn cc1(&self) -> Cc1R { + Cc1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - CC2 Interrupt Enable"] #[inline(always)] - pub fn cc2(&self) -> CC2_R { - CC2_R::new(((self.bits >> 6) & 1) != 0) + pub fn cc2(&self) -> Cc2R { + Cc2R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 16 - ICFWLFULL0 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull0(&self) -> ICFWLFULL0_R { - ICFWLFULL0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfwlfull0(&self) -> Icfwlfull0R { + Icfwlfull0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - ICFWLFULL1 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull1(&self) -> ICFWLFULL1_R { - ICFWLFULL1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfwlfull1(&self) -> Icfwlfull1R { + Icfwlfull1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - ICFWLFULL2 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull2(&self) -> ICFWLFULL2_R { - ICFWLFULL2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfwlfull2(&self) -> Icfwlfull2R { + Icfwlfull2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - ICFOF0 Interrupt Enable"] #[inline(always)] - pub fn icfof0(&self) -> ICFOF0_R { - ICFOF0_R::new(((self.bits >> 20) & 1) != 0) + pub fn icfof0(&self) -> Icfof0R { + Icfof0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - ICFOF1 Interrupt Enable"] #[inline(always)] - pub fn icfof1(&self) -> ICFOF1_R { - ICFOF1_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfof1(&self) -> Icfof1R { + Icfof1R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - ICFOF2 Interrupt Enable"] #[inline(always)] - pub fn icfof2(&self) -> ICFOF2_R { - ICFOF2_R::new(((self.bits >> 22) & 1) != 0) + pub fn icfof2(&self) -> Icfof2R { + Icfof2R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 24 - ICFUF0 Interrupt Enable"] #[inline(always)] - pub fn icfuf0(&self) -> ICFUF0_R { - ICFUF0_R::new(((self.bits >> 24) & 1) != 0) + pub fn icfuf0(&self) -> Icfuf0R { + Icfuf0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - ICFUF1 Interrupt Enable"] #[inline(always)] - pub fn icfuf1(&self) -> ICFUF1_R { - ICFUF1_R::new(((self.bits >> 25) & 1) != 0) + pub fn icfuf1(&self) -> Icfuf1R { + Icfuf1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - ICFUF2 Interrupt Enable"] #[inline(always)] - pub fn icfuf2(&self) -> ICFUF2_R { - ICFUF2_R::new(((self.bits >> 26) & 1) != 0) + pub fn icfuf2(&self) -> Icfuf2R { + Icfuf2R::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<0> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 0) } #[doc = "Bit 1 - Underflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<1> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 1) } #[doc = "Bit 2 - Direction Change Detect Interrupt Enable"] #[inline(always)] #[must_use] - pub fn dirchg(&mut self) -> DIRCHG_W<2> { - DIRCHG_W::new(self) + pub fn dirchg(&mut self) -> DirchgW { + DirchgW::new(self, 2) } #[doc = "Bit 4 - CC0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc0(&mut self) -> CC0_W<4> { - CC0_W::new(self) + pub fn cc0(&mut self) -> Cc0W { + Cc0W::new(self, 4) } #[doc = "Bit 5 - CC1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc1(&mut self) -> CC1_W<5> { - CC1_W::new(self) + pub fn cc1(&mut self) -> Cc1W { + Cc1W::new(self, 5) } #[doc = "Bit 6 - CC2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc2(&mut self) -> CC2_W<6> { - CC2_W::new(self) + pub fn cc2(&mut self) -> Cc2W { + Cc2W::new(self, 6) } #[doc = "Bit 16 - ICFWLFULL0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull0(&mut self) -> ICFWLFULL0_W<16> { - ICFWLFULL0_W::new(self) + pub fn icfwlfull0(&mut self) -> Icfwlfull0W { + Icfwlfull0W::new(self, 16) } #[doc = "Bit 17 - ICFWLFULL1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull1(&mut self) -> ICFWLFULL1_W<17> { - ICFWLFULL1_W::new(self) + pub fn icfwlfull1(&mut self) -> Icfwlfull1W { + Icfwlfull1W::new(self, 17) } #[doc = "Bit 18 - ICFWLFULL2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull2(&mut self) -> ICFWLFULL2_W<18> { - ICFWLFULL2_W::new(self) + pub fn icfwlfull2(&mut self) -> Icfwlfull2W { + Icfwlfull2W::new(self, 18) } #[doc = "Bit 20 - ICFOF0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof0(&mut self) -> ICFOF0_W<20> { - ICFOF0_W::new(self) + pub fn icfof0(&mut self) -> Icfof0W { + Icfof0W::new(self, 20) } #[doc = "Bit 21 - ICFOF1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof1(&mut self) -> ICFOF1_W<21> { - ICFOF1_W::new(self) + pub fn icfof1(&mut self) -> Icfof1W { + Icfof1W::new(self, 21) } #[doc = "Bit 22 - ICFOF2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof2(&mut self) -> ICFOF2_W<22> { - ICFOF2_W::new(self) + pub fn icfof2(&mut self) -> Icfof2W { + Icfof2W::new(self, 22) } #[doc = "Bit 24 - ICFUF0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf0(&mut self) -> ICFUF0_W<24> { - ICFUF0_W::new(self) + pub fn icfuf0(&mut self) -> Icfuf0W { + Icfuf0W::new(self, 24) } #[doc = "Bit 25 - ICFUF1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf1(&mut self) -> ICFUF1_W<25> { - ICFUF1_W::new(self) + pub fn icfuf1(&mut self) -> Icfuf1W { + Icfuf1W::new(self, 25) } #[doc = "Bit 26 - ICFUF2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf2(&mut self) -> ICFUF2_W<26> { - ICFUF2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfuf2(&mut self) -> Icfuf2W { + Icfuf2W::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/if_.rs index edde0f3..fad1cd1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/if_.rs @@ -1,290 +1,250 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OF` reader - Overflow Interrupt Flag"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Flag"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UF` reader - Underflow Interrupt Flag"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Flag"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DIRCHG` reader - Direction Change Detect Interrupt Flag"] -pub type DIRCHG_R = crate::BitReader; +pub type DirchgR = crate::BitReader; #[doc = "Field `DIRCHG` writer - Direction Change Detect Interrupt Flag"] -pub type DIRCHG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type DirchgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC0` reader - Capture Compare Channel 0 Interrupt Flag"] -pub type CC0_R = crate::BitReader; +pub type Cc0R = crate::BitReader; #[doc = "Field `CC0` writer - Capture Compare Channel 0 Interrupt Flag"] -pub type CC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1` reader - Capture Compare Channel 1 Interrupt Flag"] -pub type CC1_R = crate::BitReader; +pub type Cc1R = crate::BitReader; #[doc = "Field `CC1` writer - Capture Compare Channel 1 Interrupt Flag"] -pub type CC1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2` reader - Capture Compare Channel 2 Interrupt Flag"] -pub type CC2_R = crate::BitReader; +pub type Cc2R = crate::BitReader; #[doc = "Field `CC2` writer - Capture Compare Channel 2 Interrupt Flag"] -pub type CC2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL0` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL0_R = crate::BitReader; +pub type Icfwlfull0R = crate::BitReader; #[doc = "Field `ICFWLFULL0` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL1` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL1_R = crate::BitReader; +pub type Icfwlfull1R = crate::BitReader; #[doc = "Field `ICFWLFULL1` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL2` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL2_R = crate::BitReader; +pub type Icfwlfull2R = crate::BitReader; #[doc = "Field `ICFWLFULL2` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF0` reader - Input Capture FIFO overflow"] -pub type ICFOF0_R = crate::BitReader; +pub type Icfof0R = crate::BitReader; #[doc = "Field `ICFOF0` writer - Input Capture FIFO overflow"] -pub type ICFOF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF1` reader - Input Capture FIFO overflow"] -pub type ICFOF1_R = crate::BitReader; +pub type Icfof1R = crate::BitReader; #[doc = "Field `ICFOF1` writer - Input Capture FIFO overflow"] -pub type ICFOF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF2` reader - Input Capture FIFO overflow"] -pub type ICFOF2_R = crate::BitReader; +pub type Icfof2R = crate::BitReader; #[doc = "Field `ICFOF2` writer - Input Capture FIFO overflow"] -pub type ICFOF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF0` reader - Input capture FIFO underflow"] -pub type ICFUF0_R = crate::BitReader; +pub type Icfuf0R = crate::BitReader; #[doc = "Field `ICFUF0` writer - Input capture FIFO underflow"] -pub type ICFUF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF1` reader - Input capture FIFO underflow"] -pub type ICFUF1_R = crate::BitReader; +pub type Icfuf1R = crate::BitReader; #[doc = "Field `ICFUF1` writer - Input capture FIFO underflow"] -pub type ICFUF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF2` reader - Input capture FIFO underflow"] -pub type ICFUF2_R = crate::BitReader; +pub type Icfuf2R = crate::BitReader; #[doc = "Field `ICFUF2` writer - Input capture FIFO underflow"] -pub type ICFUF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new((self.bits & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Underflow Interrupt Flag"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new(((self.bits >> 1) & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] - pub fn dirchg(&self) -> DIRCHG_R { - DIRCHG_R::new(((self.bits >> 2) & 1) != 0) + pub fn dirchg(&self) -> DirchgR { + DirchgR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Capture Compare Channel 0 Interrupt Flag"] #[inline(always)] - pub fn cc0(&self) -> CC0_R { - CC0_R::new(((self.bits >> 4) & 1) != 0) + pub fn cc0(&self) -> Cc0R { + Cc0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Capture Compare Channel 1 Interrupt Flag"] #[inline(always)] - pub fn cc1(&self) -> CC1_R { - CC1_R::new(((self.bits >> 5) & 1) != 0) + pub fn cc1(&self) -> Cc1R { + Cc1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Capture Compare Channel 2 Interrupt Flag"] #[inline(always)] - pub fn cc2(&self) -> CC2_R { - CC2_R::new(((self.bits >> 6) & 1) != 0) + pub fn cc2(&self) -> Cc2R { + Cc2R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 16 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull0(&self) -> ICFWLFULL0_R { - ICFWLFULL0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfwlfull0(&self) -> Icfwlfull0R { + Icfwlfull0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull1(&self) -> ICFWLFULL1_R { - ICFWLFULL1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfwlfull1(&self) -> Icfwlfull1R { + Icfwlfull1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull2(&self) -> ICFWLFULL2_R { - ICFWLFULL2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfwlfull2(&self) -> Icfwlfull2R { + Icfwlfull2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof0(&self) -> ICFOF0_R { - ICFOF0_R::new(((self.bits >> 20) & 1) != 0) + pub fn icfof0(&self) -> Icfof0R { + Icfof0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof1(&self) -> ICFOF1_R { - ICFOF1_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfof1(&self) -> Icfof1R { + Icfof1R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof2(&self) -> ICFOF2_R { - ICFOF2_R::new(((self.bits >> 22) & 1) != 0) + pub fn icfof2(&self) -> Icfof2R { + Icfof2R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 24 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf0(&self) -> ICFUF0_R { - ICFUF0_R::new(((self.bits >> 24) & 1) != 0) + pub fn icfuf0(&self) -> Icfuf0R { + Icfuf0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf1(&self) -> ICFUF1_R { - ICFUF1_R::new(((self.bits >> 25) & 1) != 0) + pub fn icfuf1(&self) -> Icfuf1R { + Icfuf1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf2(&self) -> ICFUF2_R { - ICFUF2_R::new(((self.bits >> 26) & 1) != 0) + pub fn icfuf2(&self) -> Icfuf2R { + Icfuf2R::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<0> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 0) } #[doc = "Bit 1 - Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<1> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 1) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] #[must_use] - pub fn dirchg(&mut self) -> DIRCHG_W<2> { - DIRCHG_W::new(self) + pub fn dirchg(&mut self) -> DirchgW { + DirchgW::new(self, 2) } #[doc = "Bit 4 - Capture Compare Channel 0 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc0(&mut self) -> CC0_W<4> { - CC0_W::new(self) + pub fn cc0(&mut self) -> Cc0W { + Cc0W::new(self, 4) } #[doc = "Bit 5 - Capture Compare Channel 1 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc1(&mut self) -> CC1_W<5> { - CC1_W::new(self) + pub fn cc1(&mut self) -> Cc1W { + Cc1W::new(self, 5) } #[doc = "Bit 6 - Capture Compare Channel 2 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc2(&mut self) -> CC2_W<6> { - CC2_W::new(self) + pub fn cc2(&mut self) -> Cc2W { + Cc2W::new(self, 6) } #[doc = "Bit 16 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull0(&mut self) -> ICFWLFULL0_W<16> { - ICFWLFULL0_W::new(self) + pub fn icfwlfull0(&mut self) -> Icfwlfull0W { + Icfwlfull0W::new(self, 16) } #[doc = "Bit 17 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull1(&mut self) -> ICFWLFULL1_W<17> { - ICFWLFULL1_W::new(self) + pub fn icfwlfull1(&mut self) -> Icfwlfull1W { + Icfwlfull1W::new(self, 17) } #[doc = "Bit 18 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull2(&mut self) -> ICFWLFULL2_W<18> { - ICFWLFULL2_W::new(self) + pub fn icfwlfull2(&mut self) -> Icfwlfull2W { + Icfwlfull2W::new(self, 18) } #[doc = "Bit 20 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof0(&mut self) -> ICFOF0_W<20> { - ICFOF0_W::new(self) + pub fn icfof0(&mut self) -> Icfof0W { + Icfof0W::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof1(&mut self) -> ICFOF1_W<21> { - ICFOF1_W::new(self) + pub fn icfof1(&mut self) -> Icfof1W { + Icfof1W::new(self, 21) } #[doc = "Bit 22 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof2(&mut self) -> ICFOF2_W<22> { - ICFOF2_W::new(self) + pub fn icfof2(&mut self) -> Icfof2W { + Icfof2W::new(self, 22) } #[doc = "Bit 24 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf0(&mut self) -> ICFUF0_W<24> { - ICFUF0_W::new(self) + pub fn icfuf0(&mut self) -> Icfuf0W { + Icfuf0W::new(self, 24) } #[doc = "Bit 25 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf1(&mut self) -> ICFUF1_W<25> { - ICFUF1_W::new(self) + pub fn icfuf1(&mut self) -> Icfuf1W { + Icfuf1W::new(self, 25) } #[doc = "Bit 26 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf2(&mut self) -> ICFUF2_W<26> { - ICFUF2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfuf2(&mut self) -> Icfuf2W { + Icfuf2W::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/ipversion.rs index fd8f758..0b161f8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/lock.rs index 4d444ca..4d6d1fe 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Timer Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "52864: Write to unlock TIMER registers"] - UNLOCK = 52864, + Unlock = 52864, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Timer Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unlock TIMER registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Timer Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/status.rs index 1a2964d..25d646e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/status.rs @@ -1,339 +1,324 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RUNNING` reader - Running"] -pub type RUNNING_R = crate::BitReader; -#[doc = "Field `DIR` reader - Direction"] -pub type DIR_R = crate::BitReader; +pub type RunningR = crate::BitReader; #[doc = "Direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DIR_A { +pub enum Dir { #[doc = "0: Counting up"] - UP = 0, + Up = 0, #[doc = "1: Counting down"] - DOWN = 1, + Down = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DIR_A) -> Self { + fn from(variant: Dir) -> Self { variant as u8 != 0 } } -impl DIR_R { +#[doc = "Field `DIR` reader - Direction"] +pub type DirR = crate::BitReader; +impl DirR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DIR_A { + pub const fn variant(&self) -> Dir { match self.bits { - false => DIR_A::UP, - true => DIR_A::DOWN, + false => Dir::Up, + true => Dir::Down, } } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Counting up"] #[inline(always)] pub fn is_up(&self) -> bool { - *self == DIR_A::UP + *self == Dir::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Counting down"] #[inline(always)] pub fn is_down(&self) -> bool { - *self == DIR_A::DOWN + *self == Dir::Down } } #[doc = "Field `TOPBV` reader - TOP Buffer Valid"] -pub type TOPBV_R = crate::BitReader; -#[doc = "Field `TIMERLOCKSTATUS` reader - Timer lock status"] -pub type TIMERLOCKSTATUS_R = crate::BitReader; +pub type TopbvR = crate::BitReader; #[doc = "Timer lock status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TIMERLOCKSTATUS_A { +pub enum Timerlockstatus { #[doc = "0: TIMER registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: TIMER registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TIMERLOCKSTATUS_A) -> Self { + fn from(variant: Timerlockstatus) -> Self { variant as u8 != 0 } } -impl TIMERLOCKSTATUS_R { +#[doc = "Field `TIMERLOCKSTATUS` reader - Timer lock status"] +pub type TimerlockstatusR = crate::BitReader; +impl TimerlockstatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TIMERLOCKSTATUS_A { + pub const fn variant(&self) -> Timerlockstatus { match self.bits { - false => TIMERLOCKSTATUS_A::UNLOCKED, - true => TIMERLOCKSTATUS_A::LOCKED, + false => Timerlockstatus::Unlocked, + true => Timerlockstatus::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "TIMER registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == TIMERLOCKSTATUS_A::UNLOCKED + *self == Timerlockstatus::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "TIMER registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == TIMERLOCKSTATUS_A::LOCKED + *self == Timerlockstatus::Locked } } -#[doc = "Field `DTILOCKSTATUS` reader - DTI lock status"] -pub type DTILOCKSTATUS_R = crate::BitReader; #[doc = "DTI lock status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DTILOCKSTATUS_A { +pub enum Dtilockstatus { #[doc = "0: DTI registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: DTI registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DTILOCKSTATUS_A) -> Self { + fn from(variant: Dtilockstatus) -> Self { variant as u8 != 0 } } -impl DTILOCKSTATUS_R { +#[doc = "Field `DTILOCKSTATUS` reader - DTI lock status"] +pub type DtilockstatusR = crate::BitReader; +impl DtilockstatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTILOCKSTATUS_A { + pub const fn variant(&self) -> Dtilockstatus { match self.bits { - false => DTILOCKSTATUS_A::UNLOCKED, - true => DTILOCKSTATUS_A::LOCKED, + false => Dtilockstatus::Unlocked, + true => Dtilockstatus::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "DTI registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == DTILOCKSTATUS_A::UNLOCKED + *self == Dtilockstatus::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "DTI registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == DTILOCKSTATUS_A::LOCKED + *self == Dtilockstatus::Locked } } #[doc = "Field `SYNCBUSY` reader - Sync Busy"] -pub type SYNCBUSY_R = crate::BitReader; +pub type SyncbusyR = crate::BitReader; #[doc = "Field `OCBV0` reader - Output Compare Buffer Valid"] -pub type OCBV0_R = crate::BitReader; +pub type Ocbv0R = crate::BitReader; #[doc = "Field `OCBV1` reader - Output Compare Buffer Valid"] -pub type OCBV1_R = crate::BitReader; +pub type Ocbv1R = crate::BitReader; #[doc = "Field `OCBV2` reader - Output Compare Buffer Valid"] -pub type OCBV2_R = crate::BitReader; +pub type Ocbv2R = crate::BitReader; #[doc = "Field `ICFEMPTY0` reader - Input capture fifo empty"] -pub type ICFEMPTY0_R = crate::BitReader; +pub type Icfempty0R = crate::BitReader; #[doc = "Field `ICFEMPTY1` reader - Input capture fifo empty"] -pub type ICFEMPTY1_R = crate::BitReader; +pub type Icfempty1R = crate::BitReader; #[doc = "Field `ICFEMPTY2` reader - Input capture fifo empty"] -pub type ICFEMPTY2_R = crate::BitReader; -#[doc = "Field `CCPOL0` reader - Compare/Capture Polarity"] -pub type CCPOL0_R = crate::BitReader; +pub type Icfempty2R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL0_A { +pub enum Ccpol0 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL0_A) -> Self { + fn from(variant: Ccpol0) -> Self { variant as u8 != 0 } } -impl CCPOL0_R { +#[doc = "Field `CCPOL0` reader - Compare/Capture Polarity"] +pub type Ccpol0R = crate::BitReader; +impl Ccpol0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL0_A { + pub const fn variant(&self) -> Ccpol0 { match self.bits { - false => CCPOL0_A::LOWRISE, - true => CCPOL0_A::HIGHFALL, + false => Ccpol0::Lowrise, + true => Ccpol0::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL0_A::LOWRISE + *self == Ccpol0::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL0_A::HIGHFALL + *self == Ccpol0::Highfall } } -#[doc = "Field `CCPOL1` reader - Compare/Capture Polarity"] -pub type CCPOL1_R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL1_A { +pub enum Ccpol1 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL1_A) -> Self { + fn from(variant: Ccpol1) -> Self { variant as u8 != 0 } } -impl CCPOL1_R { +#[doc = "Field `CCPOL1` reader - Compare/Capture Polarity"] +pub type Ccpol1R = crate::BitReader; +impl Ccpol1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL1_A { + pub const fn variant(&self) -> Ccpol1 { match self.bits { - false => CCPOL1_A::LOWRISE, - true => CCPOL1_A::HIGHFALL, + false => Ccpol1::Lowrise, + true => Ccpol1::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL1_A::LOWRISE + *self == Ccpol1::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL1_A::HIGHFALL + *self == Ccpol1::Highfall } } -#[doc = "Field `CCPOL2` reader - Compare/Capture Polarity"] -pub type CCPOL2_R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL2_A { +pub enum Ccpol2 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL2_A) -> Self { + fn from(variant: Ccpol2) -> Self { variant as u8 != 0 } } -impl CCPOL2_R { +#[doc = "Field `CCPOL2` reader - Compare/Capture Polarity"] +pub type Ccpol2R = crate::BitReader; +impl Ccpol2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL2_A { + pub const fn variant(&self) -> Ccpol2 { match self.bits { - false => CCPOL2_A::LOWRISE, - true => CCPOL2_A::HIGHFALL, + false => Ccpol2::Lowrise, + true => Ccpol2::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL2_A::LOWRISE + *self == Ccpol2::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL2_A::HIGHFALL + *self == Ccpol2::Highfall } } impl R { #[doc = "Bit 0 - Running"] #[inline(always)] - pub fn running(&self) -> RUNNING_R { - RUNNING_R::new((self.bits & 1) != 0) + pub fn running(&self) -> RunningR { + RunningR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Direction"] #[inline(always)] - pub fn dir(&self) -> DIR_R { - DIR_R::new(((self.bits >> 1) & 1) != 0) + pub fn dir(&self) -> DirR { + DirR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - TOP Buffer Valid"] #[inline(always)] - pub fn topbv(&self) -> TOPBV_R { - TOPBV_R::new(((self.bits >> 2) & 1) != 0) + pub fn topbv(&self) -> TopbvR { + TopbvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Timer lock status"] #[inline(always)] - pub fn timerlockstatus(&self) -> TIMERLOCKSTATUS_R { - TIMERLOCKSTATUS_R::new(((self.bits >> 4) & 1) != 0) + pub fn timerlockstatus(&self) -> TimerlockstatusR { + TimerlockstatusR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DTI lock status"] #[inline(always)] - pub fn dtilockstatus(&self) -> DTILOCKSTATUS_R { - DTILOCKSTATUS_R::new(((self.bits >> 5) & 1) != 0) + pub fn dtilockstatus(&self) -> DtilockstatusR { + DtilockstatusR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Sync Busy"] #[inline(always)] - pub fn syncbusy(&self) -> SYNCBUSY_R { - SYNCBUSY_R::new(((self.bits >> 6) & 1) != 0) + pub fn syncbusy(&self) -> SyncbusyR { + SyncbusyR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv0(&self) -> OCBV0_R { - OCBV0_R::new(((self.bits >> 8) & 1) != 0) + pub fn ocbv0(&self) -> Ocbv0R { + Ocbv0R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv1(&self) -> OCBV1_R { - OCBV1_R::new(((self.bits >> 9) & 1) != 0) + pub fn ocbv1(&self) -> Ocbv1R { + Ocbv1R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv2(&self) -> OCBV2_R { - OCBV2_R::new(((self.bits >> 10) & 1) != 0) + pub fn ocbv2(&self) -> Ocbv2R { + Ocbv2R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 16 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty0(&self) -> ICFEMPTY0_R { - ICFEMPTY0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfempty0(&self) -> Icfempty0R { + Icfempty0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty1(&self) -> ICFEMPTY1_R { - ICFEMPTY1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfempty1(&self) -> Icfempty1R { + Icfempty1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty2(&self) -> ICFEMPTY2_R { - ICFEMPTY2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfempty2(&self) -> Icfempty2R { + Icfempty2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 24 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol0(&self) -> CCPOL0_R { - CCPOL0_R::new(((self.bits >> 24) & 1) != 0) + pub fn ccpol0(&self) -> Ccpol0R { + Ccpol0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol1(&self) -> CCPOL1_R { - CCPOL1_R::new(((self.bits >> 25) & 1) != 0) + pub fn ccpol1(&self) -> Ccpol1R { + Ccpol1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol2(&self) -> CCPOL2_R { - CCPOL2_R::new(((self.bits >> 26) & 1) != 0) + pub fn ccpol2(&self) -> Ccpol2R { + Ccpol2R::new(((self.bits >> 26) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/top.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/top.rs index c852559..1cb3d99 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/top.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/top.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOP` reader - Counter Top Value"] -pub type TOP_R = crate::FieldReader; +pub type TopR = crate::FieldReader; #[doc = "Field `TOP` writer - Counter Top Value"] -pub type TOP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOP_SPEC, u32, u32, 32, O>; +pub type TopW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Counter Top Value"] #[inline(always)] - pub fn top(&self) -> TOP_R { - TOP_R::new(self.bits) + pub fn top(&self) -> TopR { + TopR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Counter Top Value"] #[inline(always)] #[must_use] - pub fn top(&mut self) -> TOP_W<0> { - TOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn top(&mut self) -> TopW { + TopW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [top](index.html) module"] -pub struct TOP_SPEC; -impl crate::RegisterSpec for TOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopSpec; +impl crate::RegisterSpec for TopSpec { type Ux = u32; } -#[doc = "`read()` method returns [top::R](R) reader structure"] -impl crate::Readable for TOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [top::W](W) writer structure"] -impl crate::Writable for TOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`top::R`](R) reader structure"] +impl crate::Readable for TopSpec {} +#[doc = "`write(|w| ..)` method takes [`top::W`](W) writer structure"] +impl crate::Writable for TopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOP to value 0xffff"] -impl crate::Resettable for TOP_SPEC { - const RESET_VALUE: Self::Ux = 0xffff; +impl crate::Resettable for TopSpec { + const RESET_VALUE: u32 = 0xffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/topb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/topb.rs index 4f70070..b4415f8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/topb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer0_s/topb.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOPB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOPB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOPB` reader - Counter Top Buffer Register"] -pub type TOPB_R = crate::FieldReader; +pub type TopbR = crate::FieldReader; #[doc = "Field `TOPB` writer - Counter Top Buffer Register"] -pub type TOPB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOPB_SPEC, u32, u32, 32, O>; +pub type TopbW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Counter Top Buffer Register"] #[inline(always)] - pub fn topb(&self) -> TOPB_R { - TOPB_R::new(self.bits) + pub fn topb(&self) -> TopbR { + TopbR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Counter Top Buffer Register"] #[inline(always)] #[must_use] - pub fn topb(&mut self) -> TOPB_W<0> { - TOPB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn topb(&mut self) -> TopbW { + TopbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [topb](index.html) module"] -pub struct TOPB_SPEC; -impl crate::RegisterSpec for TOPB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopbSpec; +impl crate::RegisterSpec for TopbSpec { type Ux = u32; } -#[doc = "`read()` method returns [topb::R](R) reader structure"] -impl crate::Readable for TOPB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [topb::W](W) writer structure"] -impl crate::Writable for TOPB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`topb::R`](R) reader structure"] +impl crate::Readable for TopbSpec {} +#[doc = "`write(|w| ..)` method takes [`topb::W`](W) writer structure"] +impl crate::Writable for TopbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOPB to value 0"] -impl crate::Resettable for TOPB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TopbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns.rs index 50b1dd4..e4e8a9b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns.rs @@ -1,240 +1,470 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + cfg: Cfg, + ctrl: Ctrl, + cmd: Cmd, + status: Status, + if_: If, + ien: Ien, + top: Top, + topb: Topb, + cnt: Cnt, + _reserved10: [u8; 0x04], + lock: Lock, + en: En, + _reserved12: [u8; 0x2c], + cc0_cfg: Cc0Cfg, + cc0_ctrl: Cc0Ctrl, + cc0_oc: Cc0Oc, + _reserved15: [u8; 0x04], + cc0_ocb: Cc0Ocb, + cc0_icf: Cc0Icf, + cc0_icof: Cc0Icof, + _reserved18: [u8; 0x04], + cc1_cfg: Cc1Cfg, + cc1_ctrl: Cc1Ctrl, + cc1_oc: Cc1Oc, + _reserved21: [u8; 0x04], + cc1_ocb: Cc1Ocb, + cc1_icf: Cc1Icf, + cc1_icof: Cc1Icof, + _reserved24: [u8; 0x04], + cc2_cfg: Cc2Cfg, + cc2_ctrl: Cc2Ctrl, + cc2_oc: Cc2Oc, + _reserved27: [u8; 0x04], + cc2_ocb: Cc2Ocb, + cc2_icf: Cc2Icf, + cc2_icof: Cc2Icof, + _reserved30: [u8; 0x24], + dtcfg: Dtcfg, + dttimecfg: Dttimecfg, + dtfcfg: Dtfcfg, + dtctrl: Dtctrl, + dtogen: Dtogen, + dtfault: Dtfault, + dtfaultc: Dtfaultc, + dtlock: Dtlock, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x08 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x0c - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x10 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x14 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x18 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x1c - No Description"] - pub top: TOP, + #[inline(always)] + pub const fn top(&self) -> &Top { + &self.top + } #[doc = "0x20 - No Description"] - pub topb: TOPB, + #[inline(always)] + pub const fn topb(&self) -> &Topb { + &self.topb + } #[doc = "0x24 - No Description"] - pub cnt: CNT, - _reserved10: [u8; 0x04], + #[inline(always)] + pub const fn cnt(&self) -> &Cnt { + &self.cnt + } #[doc = "0x2c - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x30 - No Description"] - pub en: EN, - _reserved12: [u8; 0x2c], + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x60 - No Description"] - pub cc0_cfg: CC0_CFG, + #[inline(always)] + pub const fn cc0_cfg(&self) -> &Cc0Cfg { + &self.cc0_cfg + } #[doc = "0x64 - No Description"] - pub cc0_ctrl: CC0_CTRL, + #[inline(always)] + pub const fn cc0_ctrl(&self) -> &Cc0Ctrl { + &self.cc0_ctrl + } #[doc = "0x68 - No Description"] - pub cc0_oc: CC0_OC, - _reserved15: [u8; 0x04], + #[inline(always)] + pub const fn cc0_oc(&self) -> &Cc0Oc { + &self.cc0_oc + } #[doc = "0x70 - No Description"] - pub cc0_ocb: CC0_OCB, + #[inline(always)] + pub const fn cc0_ocb(&self) -> &Cc0Ocb { + &self.cc0_ocb + } #[doc = "0x74 - No Description"] - pub cc0_icf: CC0_ICF, + #[inline(always)] + pub const fn cc0_icf(&self) -> &Cc0Icf { + &self.cc0_icf + } #[doc = "0x78 - No Description"] - pub cc0_icof: CC0_ICOF, - _reserved18: [u8; 0x04], + #[inline(always)] + pub const fn cc0_icof(&self) -> &Cc0Icof { + &self.cc0_icof + } #[doc = "0x80 - No Description"] - pub cc1_cfg: CC1_CFG, + #[inline(always)] + pub const fn cc1_cfg(&self) -> &Cc1Cfg { + &self.cc1_cfg + } #[doc = "0x84 - No Description"] - pub cc1_ctrl: CC1_CTRL, + #[inline(always)] + pub const fn cc1_ctrl(&self) -> &Cc1Ctrl { + &self.cc1_ctrl + } #[doc = "0x88 - No Description"] - pub cc1_oc: CC1_OC, - _reserved21: [u8; 0x04], + #[inline(always)] + pub const fn cc1_oc(&self) -> &Cc1Oc { + &self.cc1_oc + } #[doc = "0x90 - No Description"] - pub cc1_ocb: CC1_OCB, + #[inline(always)] + pub const fn cc1_ocb(&self) -> &Cc1Ocb { + &self.cc1_ocb + } #[doc = "0x94 - No Description"] - pub cc1_icf: CC1_ICF, + #[inline(always)] + pub const fn cc1_icf(&self) -> &Cc1Icf { + &self.cc1_icf + } #[doc = "0x98 - No Description"] - pub cc1_icof: CC1_ICOF, - _reserved24: [u8; 0x04], + #[inline(always)] + pub const fn cc1_icof(&self) -> &Cc1Icof { + &self.cc1_icof + } #[doc = "0xa0 - No Description"] - pub cc2_cfg: CC2_CFG, + #[inline(always)] + pub const fn cc2_cfg(&self) -> &Cc2Cfg { + &self.cc2_cfg + } #[doc = "0xa4 - No Description"] - pub cc2_ctrl: CC2_CTRL, + #[inline(always)] + pub const fn cc2_ctrl(&self) -> &Cc2Ctrl { + &self.cc2_ctrl + } #[doc = "0xa8 - No Description"] - pub cc2_oc: CC2_OC, - _reserved27: [u8; 0x04], + #[inline(always)] + pub const fn cc2_oc(&self) -> &Cc2Oc { + &self.cc2_oc + } #[doc = "0xb0 - No Description"] - pub cc2_ocb: CC2_OCB, + #[inline(always)] + pub const fn cc2_ocb(&self) -> &Cc2Ocb { + &self.cc2_ocb + } #[doc = "0xb4 - No Description"] - pub cc2_icf: CC2_ICF, + #[inline(always)] + pub const fn cc2_icf(&self) -> &Cc2Icf { + &self.cc2_icf + } #[doc = "0xb8 - No Description"] - pub cc2_icof: CC2_ICOF, - _reserved30: [u8; 0x24], + #[inline(always)] + pub const fn cc2_icof(&self) -> &Cc2Icof { + &self.cc2_icof + } #[doc = "0xe0 - No Description"] - pub dtcfg: DTCFG, + #[inline(always)] + pub const fn dtcfg(&self) -> &Dtcfg { + &self.dtcfg + } #[doc = "0xe4 - No Description"] - pub dttimecfg: DTTIMECFG, + #[inline(always)] + pub const fn dttimecfg(&self) -> &Dttimecfg { + &self.dttimecfg + } #[doc = "0xe8 - No Description"] - pub dtfcfg: DTFCFG, + #[inline(always)] + pub const fn dtfcfg(&self) -> &Dtfcfg { + &self.dtfcfg + } #[doc = "0xec - No Description"] - pub dtctrl: DTCTRL, + #[inline(always)] + pub const fn dtctrl(&self) -> &Dtctrl { + &self.dtctrl + } #[doc = "0xf0 - No Description"] - pub dtogen: DTOGEN, + #[inline(always)] + pub const fn dtogen(&self) -> &Dtogen { + &self.dtogen + } #[doc = "0xf4 - No Description"] - pub dtfault: DTFAULT, + #[inline(always)] + pub const fn dtfault(&self) -> &Dtfault { + &self.dtfault + } #[doc = "0xf8 - No Description"] - pub dtfaultc: DTFAULTC, + #[inline(always)] + pub const fn dtfaultc(&self) -> &Dtfaultc { + &self.dtfaultc + } #[doc = "0xfc - No Description"] - pub dtlock: DTLOCK, + #[inline(always)] + pub const fn dtlock(&self) -> &Dtlock { + &self.dtlock + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "TOP (rw) register accessor: an alias for `Reg`"] -pub type TOP = crate::Reg; +#[doc = "TOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@top`] +module"] +#[doc(alias = "TOP")] +pub type Top = crate::Reg; #[doc = "No Description"] pub mod top; -#[doc = "TOPB (rw) register accessor: an alias for `Reg`"] -pub type TOPB = crate::Reg; +#[doc = "TOPB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@topb`] +module"] +#[doc(alias = "TOPB")] +pub type Topb = crate::Reg; #[doc = "No Description"] pub mod topb; -#[doc = "CNT (rw) register accessor: an alias for `Reg`"] -pub type CNT = crate::Reg; +#[doc = "CNT (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnt`] +module"] +#[doc(alias = "CNT")] +pub type Cnt = crate::Reg; #[doc = "No Description"] pub mod cnt; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CC0_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC0_CFG = crate::Reg; +#[doc = "CC0_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_cfg`] +module"] +#[doc(alias = "CC0_CFG")] +pub type Cc0Cfg = crate::Reg; #[doc = "No Description"] pub mod cc0_cfg; -#[doc = "CC0_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC0_CTRL = crate::Reg; +#[doc = "CC0_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_ctrl`] +module"] +#[doc(alias = "CC0_CTRL")] +pub type Cc0Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc0_ctrl; -#[doc = "CC0_OC (rw) register accessor: an alias for `Reg`"] -pub type CC0_OC = crate::Reg; +#[doc = "CC0_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_oc`] +module"] +#[doc(alias = "CC0_OC")] +pub type Cc0Oc = crate::Reg; #[doc = "No Description"] pub mod cc0_oc; -#[doc = "CC0_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC0_OCB = crate::Reg; +#[doc = "CC0_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_ocb`] +module"] +#[doc(alias = "CC0_OCB")] +pub type Cc0Ocb = crate::Reg; #[doc = "No Description"] pub mod cc0_ocb; -#[doc = "CC0_ICF (r) register accessor: an alias for `Reg`"] -pub type CC0_ICF = crate::Reg; +#[doc = "CC0_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_icf`] +module"] +#[doc(alias = "CC0_ICF")] +pub type Cc0Icf = crate::Reg; #[doc = "No Description"] pub mod cc0_icf; -#[doc = "CC0_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC0_ICOF = crate::Reg; +#[doc = "CC0_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_icof`] +module"] +#[doc(alias = "CC0_ICOF")] +pub type Cc0Icof = crate::Reg; #[doc = "No Description"] pub mod cc0_icof; -#[doc = "CC1_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC1_CFG = crate::Reg; +#[doc = "CC1_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_cfg`] +module"] +#[doc(alias = "CC1_CFG")] +pub type Cc1Cfg = crate::Reg; #[doc = "No Description"] pub mod cc1_cfg; -#[doc = "CC1_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC1_CTRL = crate::Reg; +#[doc = "CC1_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_ctrl`] +module"] +#[doc(alias = "CC1_CTRL")] +pub type Cc1Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc1_ctrl; -#[doc = "CC1_OC (rw) register accessor: an alias for `Reg`"] -pub type CC1_OC = crate::Reg; +#[doc = "CC1_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_oc`] +module"] +#[doc(alias = "CC1_OC")] +pub type Cc1Oc = crate::Reg; #[doc = "No Description"] pub mod cc1_oc; -#[doc = "CC1_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC1_OCB = crate::Reg; +#[doc = "CC1_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_ocb`] +module"] +#[doc(alias = "CC1_OCB")] +pub type Cc1Ocb = crate::Reg; #[doc = "No Description"] pub mod cc1_ocb; -#[doc = "CC1_ICF (r) register accessor: an alias for `Reg`"] -pub type CC1_ICF = crate::Reg; +#[doc = "CC1_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_icf`] +module"] +#[doc(alias = "CC1_ICF")] +pub type Cc1Icf = crate::Reg; #[doc = "No Description"] pub mod cc1_icf; -#[doc = "CC1_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC1_ICOF = crate::Reg; +#[doc = "CC1_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_icof`] +module"] +#[doc(alias = "CC1_ICOF")] +pub type Cc1Icof = crate::Reg; #[doc = "No Description"] pub mod cc1_icof; -#[doc = "CC2_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC2_CFG = crate::Reg; +#[doc = "CC2_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_cfg`] +module"] +#[doc(alias = "CC2_CFG")] +pub type Cc2Cfg = crate::Reg; #[doc = "No Description"] pub mod cc2_cfg; -#[doc = "CC2_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC2_CTRL = crate::Reg; +#[doc = "CC2_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_ctrl`] +module"] +#[doc(alias = "CC2_CTRL")] +pub type Cc2Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc2_ctrl; -#[doc = "CC2_OC (rw) register accessor: an alias for `Reg`"] -pub type CC2_OC = crate::Reg; +#[doc = "CC2_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_oc`] +module"] +#[doc(alias = "CC2_OC")] +pub type Cc2Oc = crate::Reg; #[doc = "No Description"] pub mod cc2_oc; -#[doc = "CC2_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC2_OCB = crate::Reg; +#[doc = "CC2_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_ocb`] +module"] +#[doc(alias = "CC2_OCB")] +pub type Cc2Ocb = crate::Reg; #[doc = "No Description"] pub mod cc2_ocb; -#[doc = "CC2_ICF (r) register accessor: an alias for `Reg`"] -pub type CC2_ICF = crate::Reg; +#[doc = "CC2_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_icf`] +module"] +#[doc(alias = "CC2_ICF")] +pub type Cc2Icf = crate::Reg; #[doc = "No Description"] pub mod cc2_icf; -#[doc = "CC2_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC2_ICOF = crate::Reg; +#[doc = "CC2_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_icof`] +module"] +#[doc(alias = "CC2_ICOF")] +pub type Cc2Icof = crate::Reg; #[doc = "No Description"] pub mod cc2_icof; -#[doc = "DTCFG (rw) register accessor: an alias for `Reg`"] -pub type DTCFG = crate::Reg; +#[doc = "DTCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtcfg`] +module"] +#[doc(alias = "DTCFG")] +pub type Dtcfg = crate::Reg; #[doc = "No Description"] pub mod dtcfg; -#[doc = "DTTIMECFG (rw) register accessor: an alias for `Reg`"] -pub type DTTIMECFG = crate::Reg; +#[doc = "DTTIMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dttimecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dttimecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dttimecfg`] +module"] +#[doc(alias = "DTTIMECFG")] +pub type Dttimecfg = crate::Reg; #[doc = "No Description"] pub mod dttimecfg; -#[doc = "DTFCFG (rw) register accessor: an alias for `Reg`"] -pub type DTFCFG = crate::Reg; +#[doc = "DTFCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfcfg`] +module"] +#[doc(alias = "DTFCFG")] +pub type Dtfcfg = crate::Reg; #[doc = "No Description"] pub mod dtfcfg; -#[doc = "DTCTRL (rw) register accessor: an alias for `Reg`"] -pub type DTCTRL = crate::Reg; +#[doc = "DTCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtctrl`] +module"] +#[doc(alias = "DTCTRL")] +pub type Dtctrl = crate::Reg; #[doc = "No Description"] pub mod dtctrl; -#[doc = "DTOGEN (rw) register accessor: an alias for `Reg`"] -pub type DTOGEN = crate::Reg; +#[doc = "DTOGEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtogen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtogen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtogen`] +module"] +#[doc(alias = "DTOGEN")] +pub type Dtogen = crate::Reg; #[doc = "No Description"] pub mod dtogen; -#[doc = "DTFAULT (r) register accessor: an alias for `Reg`"] -pub type DTFAULT = crate::Reg; +#[doc = "DTFAULT (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfault::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfault`] +module"] +#[doc(alias = "DTFAULT")] +pub type Dtfault = crate::Reg; #[doc = "No Description"] pub mod dtfault; -#[doc = "DTFAULTC (w) register accessor: an alias for `Reg`"] -pub type DTFAULTC = crate::Reg; +#[doc = "DTFAULTC (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfaultc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfaultc`] +module"] +#[doc(alias = "DTFAULTC")] +pub type Dtfaultc = crate::Reg; #[doc = "No Description"] pub mod dtfaultc; -#[doc = "DTLOCK (w) register accessor: an alias for `Reg`"] -pub type DTLOCK = crate::Reg; +#[doc = "DTLOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtlock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtlock`] +module"] +#[doc(alias = "DTLOCK")] +pub type Dtlock = crate::Reg; #[doc = "No Description"] pub mod dtlock; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc0_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc0_cfg.rs index 547eeb0..b3aac62 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc0_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc0_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC0_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC0_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_cfg](index.html) module"] -pub struct CC0_CFG_SPEC; -impl crate::RegisterSpec for CC0_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0CfgSpec; +impl crate::RegisterSpec for Cc0CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_cfg::R](R) reader structure"] -impl crate::Readable for CC0_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_cfg::W](W) writer structure"] -impl crate::Writable for CC0_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_cfg::R`](R) reader structure"] +impl crate::Readable for Cc0CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_cfg::W`](W) writer structure"] +impl crate::Writable for Cc0CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_CFG to value 0"] -impl crate::Resettable for CC0_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc0_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc0_ctrl.rs index 71b40e4..1b92d0c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc0_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc0_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC0_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_ctrl](index.html) module"] -pub struct CC0_CTRL_SPEC; -impl crate::RegisterSpec for CC0_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0CtrlSpec; +impl crate::RegisterSpec for Cc0CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_ctrl::R](R) reader structure"] -impl crate::Readable for CC0_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_ctrl::W](W) writer structure"] -impl crate::Writable for CC0_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc0CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc0CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_CTRL to value 0"] -impl crate::Resettable for CC0_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc0_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc0_icf.rs index f4a2c64..6afddea 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc0_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc0_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC0_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new((self.bits & 0xffff) as u16) + pub fn icf(&self) -> IcfR { + IcfR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_icf](index.html) module"] -pub struct CC0_ICF_SPEC; -impl crate::RegisterSpec for CC0_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0IcfSpec; +impl crate::RegisterSpec for Cc0IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_icf::R](R) reader structure"] -impl crate::Readable for CC0_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc0_icf::R`](R) reader structure"] +impl crate::Readable for Cc0IcfSpec {} #[doc = "`reset()` method sets CC0_ICF to value 0"] -impl crate::Resettable for CC0_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc0_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc0_icof.rs index 1ea3983..7653eef 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc0_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc0_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC0_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new((self.bits & 0xffff) as u16) + pub fn icof(&self) -> IcofR { + IcofR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_icof](index.html) module"] -pub struct CC0_ICOF_SPEC; -impl crate::RegisterSpec for CC0_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0IcofSpec; +impl crate::RegisterSpec for Cc0IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_icof::R](R) reader structure"] -impl crate::Readable for CC0_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc0_icof::R`](R) reader structure"] +impl crate::Readable for Cc0IcofSpec {} #[doc = "`reset()` method sets CC0_ICOF to value 0"] -impl crate::Resettable for CC0_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc0_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc0_oc.rs index 97be8b2..c063d52 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc0_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc0_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC0_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC0_OC_SPEC, u16, u16, 16, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new((self.bits & 0xffff) as u16) + pub fn oc(&self) -> OcR { + OcR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_oc](index.html) module"] -pub struct CC0_OC_SPEC; -impl crate::RegisterSpec for CC0_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0OcSpec; +impl crate::RegisterSpec for Cc0OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_oc::R](R) reader structure"] -impl crate::Readable for CC0_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_oc::W](W) writer structure"] -impl crate::Writable for CC0_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_oc::R`](R) reader structure"] +impl crate::Readable for Cc0OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_oc::W`](W) writer structure"] +impl crate::Writable for Cc0OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_OC to value 0"] -impl crate::Resettable for CC0_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc0_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc0_ocb.rs index af4e401..5924ded 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc0_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc0_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC0_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC0_OCB_SPEC, u16, u16, 16, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new((self.bits & 0xffff) as u16) + pub fn ocb(&self) -> OcbR { + OcbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_ocb](index.html) module"] -pub struct CC0_OCB_SPEC; -impl crate::RegisterSpec for CC0_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0OcbSpec; +impl crate::RegisterSpec for Cc0OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_ocb::R](R) reader structure"] -impl crate::Readable for CC0_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_ocb::W](W) writer structure"] -impl crate::Writable for CC0_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_ocb::R`](R) reader structure"] +impl crate::Readable for Cc0OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_ocb::W`](W) writer structure"] +impl crate::Writable for Cc0OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_OCB to value 0"] -impl crate::Resettable for CC0_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc1_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc1_cfg.rs index b3424c2..2243932 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc1_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc1_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC1_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC1_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_cfg](index.html) module"] -pub struct CC1_CFG_SPEC; -impl crate::RegisterSpec for CC1_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1CfgSpec; +impl crate::RegisterSpec for Cc1CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_cfg::R](R) reader structure"] -impl crate::Readable for CC1_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_cfg::W](W) writer structure"] -impl crate::Writable for CC1_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_cfg::R`](R) reader structure"] +impl crate::Readable for Cc1CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_cfg::W`](W) writer structure"] +impl crate::Writable for Cc1CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_CFG to value 0"] -impl crate::Resettable for CC1_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc1_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc1_ctrl.rs index 38927de..bc41282 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc1_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc1_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC1_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_ctrl](index.html) module"] -pub struct CC1_CTRL_SPEC; -impl crate::RegisterSpec for CC1_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1CtrlSpec; +impl crate::RegisterSpec for Cc1CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_ctrl::R](R) reader structure"] -impl crate::Readable for CC1_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_ctrl::W](W) writer structure"] -impl crate::Writable for CC1_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc1CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc1CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_CTRL to value 0"] -impl crate::Resettable for CC1_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc1_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc1_icf.rs index 1a7d7e8..0211b78 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc1_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc1_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC1_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new((self.bits & 0xffff) as u16) + pub fn icf(&self) -> IcfR { + IcfR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_icf](index.html) module"] -pub struct CC1_ICF_SPEC; -impl crate::RegisterSpec for CC1_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1IcfSpec; +impl crate::RegisterSpec for Cc1IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_icf::R](R) reader structure"] -impl crate::Readable for CC1_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc1_icf::R`](R) reader structure"] +impl crate::Readable for Cc1IcfSpec {} #[doc = "`reset()` method sets CC1_ICF to value 0"] -impl crate::Resettable for CC1_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc1_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc1_icof.rs index ea46e53..3fd845d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc1_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc1_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC1_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new((self.bits & 0xffff) as u16) + pub fn icof(&self) -> IcofR { + IcofR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_icof](index.html) module"] -pub struct CC1_ICOF_SPEC; -impl crate::RegisterSpec for CC1_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1IcofSpec; +impl crate::RegisterSpec for Cc1IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_icof::R](R) reader structure"] -impl crate::Readable for CC1_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc1_icof::R`](R) reader structure"] +impl crate::Readable for Cc1IcofSpec {} #[doc = "`reset()` method sets CC1_ICOF to value 0"] -impl crate::Resettable for CC1_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc1_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc1_oc.rs index 9f40c62..5b2e10b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc1_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc1_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC1_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC1_OC_SPEC, u16, u16, 16, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new((self.bits & 0xffff) as u16) + pub fn oc(&self) -> OcR { + OcR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_oc](index.html) module"] -pub struct CC1_OC_SPEC; -impl crate::RegisterSpec for CC1_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1OcSpec; +impl crate::RegisterSpec for Cc1OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_oc::R](R) reader structure"] -impl crate::Readable for CC1_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_oc::W](W) writer structure"] -impl crate::Writable for CC1_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_oc::R`](R) reader structure"] +impl crate::Readable for Cc1OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_oc::W`](W) writer structure"] +impl crate::Writable for Cc1OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_OC to value 0"] -impl crate::Resettable for CC1_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc1_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc1_ocb.rs index d3c8d9a..7d9f88b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc1_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc1_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC1_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC1_OCB_SPEC, u16, u16, 16, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new((self.bits & 0xffff) as u16) + pub fn ocb(&self) -> OcbR { + OcbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_ocb](index.html) module"] -pub struct CC1_OCB_SPEC; -impl crate::RegisterSpec for CC1_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1OcbSpec; +impl crate::RegisterSpec for Cc1OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_ocb::R](R) reader structure"] -impl crate::Readable for CC1_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_ocb::W](W) writer structure"] -impl crate::Writable for CC1_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_ocb::R`](R) reader structure"] +impl crate::Readable for Cc1OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_ocb::W`](W) writer structure"] +impl crate::Writable for Cc1OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_OCB to value 0"] -impl crate::Resettable for CC1_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc2_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc2_cfg.rs index 6b108e5..97bec45 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc2_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc2_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC2_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC2_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_cfg](index.html) module"] -pub struct CC2_CFG_SPEC; -impl crate::RegisterSpec for CC2_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2CfgSpec; +impl crate::RegisterSpec for Cc2CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_cfg::R](R) reader structure"] -impl crate::Readable for CC2_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_cfg::W](W) writer structure"] -impl crate::Writable for CC2_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_cfg::R`](R) reader structure"] +impl crate::Readable for Cc2CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_cfg::W`](W) writer structure"] +impl crate::Writable for Cc2CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_CFG to value 0"] -impl crate::Resettable for CC2_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc2_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc2_ctrl.rs index b42d120..317952a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc2_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc2_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC2_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_ctrl](index.html) module"] -pub struct CC2_CTRL_SPEC; -impl crate::RegisterSpec for CC2_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2CtrlSpec; +impl crate::RegisterSpec for Cc2CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_ctrl::R](R) reader structure"] -impl crate::Readable for CC2_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_ctrl::W](W) writer structure"] -impl crate::Writable for CC2_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc2CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc2CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_CTRL to value 0"] -impl crate::Resettable for CC2_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc2_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc2_icf.rs index 8282700..c1a0823 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc2_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc2_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC2_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new((self.bits & 0xffff) as u16) + pub fn icf(&self) -> IcfR { + IcfR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_icf](index.html) module"] -pub struct CC2_ICF_SPEC; -impl crate::RegisterSpec for CC2_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2IcfSpec; +impl crate::RegisterSpec for Cc2IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_icf::R](R) reader structure"] -impl crate::Readable for CC2_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc2_icf::R`](R) reader structure"] +impl crate::Readable for Cc2IcfSpec {} #[doc = "`reset()` method sets CC2_ICF to value 0"] -impl crate::Resettable for CC2_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc2_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc2_icof.rs index c21d7d3..0d399d1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc2_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc2_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC2_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new((self.bits & 0xffff) as u16) + pub fn icof(&self) -> IcofR { + IcofR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_icof](index.html) module"] -pub struct CC2_ICOF_SPEC; -impl crate::RegisterSpec for CC2_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2IcofSpec; +impl crate::RegisterSpec for Cc2IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_icof::R](R) reader structure"] -impl crate::Readable for CC2_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc2_icof::R`](R) reader structure"] +impl crate::Readable for Cc2IcofSpec {} #[doc = "`reset()` method sets CC2_ICOF to value 0"] -impl crate::Resettable for CC2_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc2_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc2_oc.rs index da9cc47..935617c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc2_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc2_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC2_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC2_OC_SPEC, u16, u16, 16, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new((self.bits & 0xffff) as u16) + pub fn oc(&self) -> OcR { + OcR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_oc](index.html) module"] -pub struct CC2_OC_SPEC; -impl crate::RegisterSpec for CC2_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2OcSpec; +impl crate::RegisterSpec for Cc2OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_oc::R](R) reader structure"] -impl crate::Readable for CC2_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_oc::W](W) writer structure"] -impl crate::Writable for CC2_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_oc::R`](R) reader structure"] +impl crate::Readable for Cc2OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_oc::W`](W) writer structure"] +impl crate::Writable for Cc2OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_OC to value 0"] -impl crate::Resettable for CC2_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc2_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc2_ocb.rs index 1ab93d6..ee6c4e5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc2_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cc2_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC2_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC2_OCB_SPEC, u16, u16, 16, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new((self.bits & 0xffff) as u16) + pub fn ocb(&self) -> OcbR { + OcbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_ocb](index.html) module"] -pub struct CC2_OCB_SPEC; -impl crate::RegisterSpec for CC2_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2OcbSpec; +impl crate::RegisterSpec for Cc2OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_ocb::R](R) reader structure"] -impl crate::Readable for CC2_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_ocb::W](W) writer structure"] -impl crate::Writable for CC2_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_ocb::R`](R) reader structure"] +impl crate::Readable for Cc2OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_ocb::W`](W) writer structure"] +impl crate::Writable for Cc2OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_OCB to value 0"] -impl crate::Resettable for CC2_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cfg.rs index ea2a1e1..b4cc2fd 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cfg.rs @@ -1,775 +1,774 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - Timer Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Timer Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Up-count mode"] - UP = 0, + Up = 0, #[doc = "1: Down-count mode"] - DOWN = 1, + Down = 1, #[doc = "2: Up/down-count mode"] - UPDOWN = 2, + Updown = 2, #[doc = "3: Quadrature decoder mode"] - QDEC = 3, + Qdec = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - Timer Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::UP, - 1 => MODE_A::DOWN, - 2 => MODE_A::UPDOWN, - 3 => MODE_A::QDEC, + 0 => Mode::Up, + 1 => Mode::Down, + 2 => Mode::Updown, + 3 => Mode::Qdec, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Up-count mode"] #[inline(always)] pub fn is_up(&self) -> bool { - *self == MODE_A::UP + *self == Mode::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Down-count mode"] #[inline(always)] pub fn is_down(&self) -> bool { - *self == MODE_A::DOWN + *self == Mode::Down } - #[doc = "Checks if the value of the field is `UPDOWN`"] + #[doc = "Up/down-count mode"] #[inline(always)] pub fn is_updown(&self) -> bool { - *self == MODE_A::UPDOWN + *self == Mode::Updown } - #[doc = "Checks if the value of the field is `QDEC`"] + #[doc = "Quadrature decoder mode"] #[inline(always)] pub fn is_qdec(&self) -> bool { - *self == MODE_A::QDEC + *self == Mode::Qdec } } #[doc = "Field `MODE` writer - Timer Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Up-count mode"] #[inline(always)] - pub fn up(self) -> &'a mut W { - self.variant(MODE_A::UP) + pub fn up(self) -> &'a mut crate::W { + self.variant(Mode::Up) } #[doc = "Down-count mode"] #[inline(always)] - pub fn down(self) -> &'a mut W { - self.variant(MODE_A::DOWN) + pub fn down(self) -> &'a mut crate::W { + self.variant(Mode::Down) } #[doc = "Up/down-count mode"] #[inline(always)] - pub fn updown(self) -> &'a mut W { - self.variant(MODE_A::UPDOWN) + pub fn updown(self) -> &'a mut crate::W { + self.variant(Mode::Updown) } #[doc = "Quadrature decoder mode"] #[inline(always)] - pub fn qdec(self) -> &'a mut W { - self.variant(MODE_A::QDEC) + pub fn qdec(self) -> &'a mut crate::W { + self.variant(Mode::Qdec) } } -#[doc = "Field `SYNC` reader - Timer Start/Stop/Reload Synchronization"] -pub type SYNC_R = crate::BitReader; #[doc = "Timer Start/Stop/Reload Synchronization\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYNC_A { +pub enum Sync { #[doc = "0: Timer operation is unaffected by other timers."] - DISABLE = 0, + Disable = 0, #[doc = "1: Timer may be started, stopped and re-loaded from other timer instances."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYNC_A) -> Self { + fn from(variant: Sync) -> Self { variant as u8 != 0 } } -impl SYNC_R { +#[doc = "Field `SYNC` reader - Timer Start/Stop/Reload Synchronization"] +pub type SyncR = crate::BitReader; +impl SyncR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SYNC_A { + pub const fn variant(&self) -> Sync { match self.bits { - false => SYNC_A::DISABLE, - true => SYNC_A::ENABLE, + false => Sync::Disable, + true => Sync::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Timer operation is unaffected by other timers."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == SYNC_A::DISABLE + *self == Sync::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Timer may be started, stopped and re-loaded from other timer instances."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == SYNC_A::ENABLE + *self == Sync::Enable } } #[doc = "Field `SYNC` writer - Timer Start/Stop/Reload Synchronization"] -pub type SYNC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, SYNC_A, O>; -impl<'a, const O: u8> SYNC_W<'a, O> { +pub type SyncW<'a, REG> = crate::BitWriter<'a, REG, Sync>; +impl<'a, REG> SyncW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer operation is unaffected by other timers."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(SYNC_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Sync::Disable) } #[doc = "Timer may be started, stopped and re-loaded from other timer instances."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(SYNC_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Sync::Enable) } } #[doc = "Field `OSMEN` reader - One-shot Mode Enable"] -pub type OSMEN_R = crate::BitReader; +pub type OsmenR = crate::BitReader; #[doc = "Field `OSMEN` writer - One-shot Mode Enable"] -pub type OSMEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `QDM` reader - Quadrature Decoder Mode Selection"] -pub type QDM_R = crate::BitReader; +pub type OsmenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Quadrature Decoder Mode Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum QDM_A { +pub enum Qdm { #[doc = "0: X2 mode selected"] X2 = 0, #[doc = "1: X4 mode selected"] X4 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: QDM_A) -> Self { + fn from(variant: Qdm) -> Self { variant as u8 != 0 } } -impl QDM_R { +#[doc = "Field `QDM` reader - Quadrature Decoder Mode Selection"] +pub type QdmR = crate::BitReader; +impl QdmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> QDM_A { + pub const fn variant(&self) -> Qdm { match self.bits { - false => QDM_A::X2, - true => QDM_A::X4, + false => Qdm::X2, + true => Qdm::X4, } } - #[doc = "Checks if the value of the field is `X2`"] + #[doc = "X2 mode selected"] #[inline(always)] pub fn is_x2(&self) -> bool { - *self == QDM_A::X2 + *self == Qdm::X2 } - #[doc = "Checks if the value of the field is `X4`"] + #[doc = "X4 mode selected"] #[inline(always)] pub fn is_x4(&self) -> bool { - *self == QDM_A::X4 + *self == Qdm::X4 } } #[doc = "Field `QDM` writer - Quadrature Decoder Mode Selection"] -pub type QDM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, QDM_A, O>; -impl<'a, const O: u8> QDM_W<'a, O> { +pub type QdmW<'a, REG> = crate::BitWriter<'a, REG, Qdm>; +impl<'a, REG> QdmW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "X2 mode selected"] #[inline(always)] - pub fn x2(self) -> &'a mut W { - self.variant(QDM_A::X2) + pub fn x2(self) -> &'a mut crate::W { + self.variant(Qdm::X2) } #[doc = "X4 mode selected"] #[inline(always)] - pub fn x4(self) -> &'a mut W { - self.variant(QDM_A::X4) + pub fn x4(self) -> &'a mut crate::W { + self.variant(Qdm::X4) } } -#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] -pub type DEBUGRUN_R = crate::BitReader; #[doc = "Debug Mode Run Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DEBUGRUN_A { +pub enum Debugrun { #[doc = "0: Timer is halted in debug mode"] - HALT = 0, + Halt = 0, #[doc = "1: Timer is running in debug mode"] - RUN = 1, + Run = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DEBUGRUN_A) -> Self { + fn from(variant: Debugrun) -> Self { variant as u8 != 0 } } -impl DEBUGRUN_R { +#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] +pub type DebugrunR = crate::BitReader; +impl DebugrunR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DEBUGRUN_A { + pub const fn variant(&self) -> Debugrun { match self.bits { - false => DEBUGRUN_A::HALT, - true => DEBUGRUN_A::RUN, + false => Debugrun::Halt, + true => Debugrun::Run, } } - #[doc = "Checks if the value of the field is `HALT`"] + #[doc = "Timer is halted in debug mode"] #[inline(always)] pub fn is_halt(&self) -> bool { - *self == DEBUGRUN_A::HALT + *self == Debugrun::Halt } - #[doc = "Checks if the value of the field is `RUN`"] + #[doc = "Timer is running in debug mode"] #[inline(always)] pub fn is_run(&self) -> bool { - *self == DEBUGRUN_A::RUN + *self == Debugrun::Run } } #[doc = "Field `DEBUGRUN` writer - Debug Mode Run Enable"] -pub type DEBUGRUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DEBUGRUN_A, O>; -impl<'a, const O: u8> DEBUGRUN_W<'a, O> { +pub type DebugrunW<'a, REG> = crate::BitWriter<'a, REG, Debugrun>; +impl<'a, REG> DebugrunW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer is halted in debug mode"] #[inline(always)] - pub fn halt(self) -> &'a mut W { - self.variant(DEBUGRUN_A::HALT) + pub fn halt(self) -> &'a mut crate::W { + self.variant(Debugrun::Halt) } #[doc = "Timer is running in debug mode"] #[inline(always)] - pub fn run(self) -> &'a mut W { - self.variant(DEBUGRUN_A::RUN) + pub fn run(self) -> &'a mut crate::W { + self.variant(Debugrun::Run) } } #[doc = "Field `DMACLRACT` reader - DMA Request Clear on Active"] -pub type DMACLRACT_R = crate::BitReader; +pub type DmaclractR = crate::BitReader; #[doc = "Field `DMACLRACT` writer - DMA Request Clear on Active"] -pub type DMACLRACT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `CLKSEL` reader - Clock Source Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type DmaclractW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Clock Source Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "0: Prescaled EM01GRPACLK"] - PRESCEM01GRPACLK = 0, + Prescem01grpaclk = 0, #[doc = "1: Compare/Capture Channel 1 Input"] - CC1 = 1, + Cc1 = 1, #[doc = "2: Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] - TIMEROUF = 2, + Timerouf = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Source Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKSEL_A::PRESCEM01GRPACLK), - 1 => Some(CLKSEL_A::CC1), - 2 => Some(CLKSEL_A::TIMEROUF), + 0 => Some(Clksel::Prescem01grpaclk), + 1 => Some(Clksel::Cc1), + 2 => Some(Clksel::Timerouf), _ => None, } } - #[doc = "Checks if the value of the field is `PRESCEM01GRPACLK`"] + #[doc = "Prescaled EM01GRPACLK"] #[inline(always)] pub fn is_prescem01grpaclk(&self) -> bool { - *self == CLKSEL_A::PRESCEM01GRPACLK + *self == Clksel::Prescem01grpaclk } - #[doc = "Checks if the value of the field is `CC1`"] + #[doc = "Compare/Capture Channel 1 Input"] #[inline(always)] pub fn is_cc1(&self) -> bool { - *self == CLKSEL_A::CC1 + *self == Clksel::Cc1 } - #[doc = "Checks if the value of the field is `TIMEROUF`"] + #[doc = "Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] #[inline(always)] pub fn is_timerouf(&self) -> bool { - *self == CLKSEL_A::TIMEROUF + *self == Clksel::Timerouf } } #[doc = "Field `CLKSEL` writer - Clock Source Select"] -pub type CLKSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, CLKSEL_A, 2, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Prescaled EM01GRPACLK"] #[inline(always)] - pub fn prescem01grpaclk(self) -> &'a mut W { - self.variant(CLKSEL_A::PRESCEM01GRPACLK) + pub fn prescem01grpaclk(self) -> &'a mut crate::W { + self.variant(Clksel::Prescem01grpaclk) } #[doc = "Compare/Capture Channel 1 Input"] #[inline(always)] - pub fn cc1(self) -> &'a mut W { - self.variant(CLKSEL_A::CC1) + pub fn cc1(self) -> &'a mut crate::W { + self.variant(Clksel::Cc1) } #[doc = "Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] #[inline(always)] - pub fn timerouf(self) -> &'a mut W { - self.variant(CLKSEL_A::TIMEROUF) + pub fn timerouf(self) -> &'a mut crate::W { + self.variant(Clksel::Timerouf) } } -#[doc = "Field `RETIMEEN` reader - PWM output retimed enable"] -pub type RETIMEEN_R = crate::BitReader; #[doc = "PWM output retimed enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RETIMEEN_A { +pub enum Retimeen { #[doc = "0: PWM outputs are not re-timed."] - DISABLE = 0, + Disable = 0, #[doc = "1: PWM outputs are re-timed."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RETIMEEN_A) -> Self { + fn from(variant: Retimeen) -> Self { variant as u8 != 0 } } -impl RETIMEEN_R { +#[doc = "Field `RETIMEEN` reader - PWM output retimed enable"] +pub type RetimeenR = crate::BitReader; +impl RetimeenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RETIMEEN_A { + pub const fn variant(&self) -> Retimeen { match self.bits { - false => RETIMEEN_A::DISABLE, - true => RETIMEEN_A::ENABLE, + false => Retimeen::Disable, + true => Retimeen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "PWM outputs are not re-timed."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RETIMEEN_A::DISABLE + *self == Retimeen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "PWM outputs are re-timed."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RETIMEEN_A::ENABLE + *self == Retimeen::Enable } } #[doc = "Field `RETIMEEN` writer - PWM output retimed enable"] -pub type RETIMEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, RETIMEEN_A, O>; -impl<'a, const O: u8> RETIMEEN_W<'a, O> { +pub type RetimeenW<'a, REG> = crate::BitWriter<'a, REG, Retimeen>; +impl<'a, REG> RetimeenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "PWM outputs are not re-timed."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RETIMEEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Retimeen::Disable) } #[doc = "PWM outputs are re-timed."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RETIMEEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Retimeen::Enable) } } -#[doc = "Field `DISSYNCOUT` reader - Disable Timer Start/Stop/Reload output"] -pub type DISSYNCOUT_R = crate::BitReader; #[doc = "Disable Timer Start/Stop/Reload output\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DISSYNCOUT_A { +pub enum Dissyncout { #[doc = "0: Timer can start/stop/reload other timers with SYNC bit set"] - EN = 0, + En = 0, #[doc = "1: Timer cannot start/stop/reload other timers with SYNC bit set"] - DIS = 1, + Dis = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DISSYNCOUT_A) -> Self { + fn from(variant: Dissyncout) -> Self { variant as u8 != 0 } } -impl DISSYNCOUT_R { +#[doc = "Field `DISSYNCOUT` reader - Disable Timer Start/Stop/Reload output"] +pub type DissyncoutR = crate::BitReader; +impl DissyncoutR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DISSYNCOUT_A { + pub const fn variant(&self) -> Dissyncout { match self.bits { - false => DISSYNCOUT_A::EN, - true => DISSYNCOUT_A::DIS, + false => Dissyncout::En, + true => Dissyncout::Dis, } } - #[doc = "Checks if the value of the field is `EN`"] + #[doc = "Timer can start/stop/reload other timers with SYNC bit set"] #[inline(always)] pub fn is_en(&self) -> bool { - *self == DISSYNCOUT_A::EN + *self == Dissyncout::En } - #[doc = "Checks if the value of the field is `DIS`"] + #[doc = "Timer cannot start/stop/reload other timers with SYNC bit set"] #[inline(always)] pub fn is_dis(&self) -> bool { - *self == DISSYNCOUT_A::DIS + *self == Dissyncout::Dis } } #[doc = "Field `DISSYNCOUT` writer - Disable Timer Start/Stop/Reload output"] -pub type DISSYNCOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DISSYNCOUT_A, O>; -impl<'a, const O: u8> DISSYNCOUT_W<'a, O> { +pub type DissyncoutW<'a, REG> = crate::BitWriter<'a, REG, Dissyncout>; +impl<'a, REG> DissyncoutW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer can start/stop/reload other timers with SYNC bit set"] #[inline(always)] - pub fn en(self) -> &'a mut W { - self.variant(DISSYNCOUT_A::EN) + pub fn en(self) -> &'a mut crate::W { + self.variant(Dissyncout::En) } #[doc = "Timer cannot start/stop/reload other timers with SYNC bit set"] #[inline(always)] - pub fn dis(self) -> &'a mut W { - self.variant(DISSYNCOUT_A::DIS) + pub fn dis(self) -> &'a mut crate::W { + self.variant(Dissyncout::Dis) } } #[doc = "Field `ATI` reader - Always Track Inputs"] -pub type ATI_R = crate::BitReader; +pub type AtiR = crate::BitReader; #[doc = "Field `ATI` writer - Always Track Inputs"] -pub type ATI_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type AtiW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RSSCOIST` reader - Reload-Start Sets COIST"] -pub type RSSCOIST_R = crate::BitReader; +pub type RsscoistR = crate::BitReader; #[doc = "Field `RSSCOIST` writer - Reload-Start Sets COIST"] -pub type RSSCOIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `PRESC` reader - Prescaler Setting"] -pub type PRESC_R = crate::FieldReader; +pub type RsscoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Prescaler Setting\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum PRESC_A { +pub enum Presc { #[doc = "0: No prescaling"] - DIV1 = 0, + Div1 = 0, #[doc = "1: Prescale by 2"] - DIV2 = 1, + Div2 = 1, #[doc = "3: Prescale by 4"] - DIV4 = 3, + Div4 = 3, #[doc = "7: Prescale by 8"] - DIV8 = 7, + Div8 = 7, #[doc = "15: Prescale by 16"] - DIV16 = 15, + Div16 = 15, #[doc = "31: Prescale by 32"] - DIV32 = 31, + Div32 = 31, #[doc = "63: Prescale by 64"] - DIV64 = 63, + Div64 = 63, #[doc = "127: Prescale by 128"] - DIV128 = 127, + Div128 = 127, #[doc = "255: Prescale by 256"] - DIV256 = 255, + Div256 = 255, #[doc = "511: Prescale by 512"] - DIV512 = 511, + Div512 = 511, #[doc = "1023: Prescale by 1024"] - DIV1024 = 1023, + Div1024 = 1023, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: PRESC_A) -> Self { + fn from(variant: Presc) -> Self { variant as _ } } -impl PRESC_R { +impl crate::FieldSpec for Presc { + type Ux = u16; +} +impl crate::IsEnum for Presc {} +#[doc = "Field `PRESC` reader - Prescaler Setting"] +pub type PrescR = crate::FieldReader; +impl PrescR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PRESC_A::DIV1), - 1 => Some(PRESC_A::DIV2), - 3 => Some(PRESC_A::DIV4), - 7 => Some(PRESC_A::DIV8), - 15 => Some(PRESC_A::DIV16), - 31 => Some(PRESC_A::DIV32), - 63 => Some(PRESC_A::DIV64), - 127 => Some(PRESC_A::DIV128), - 255 => Some(PRESC_A::DIV256), - 511 => Some(PRESC_A::DIV512), - 1023 => Some(PRESC_A::DIV1024), + 0 => Some(Presc::Div1), + 1 => Some(Presc::Div2), + 3 => Some(Presc::Div4), + 7 => Some(Presc::Div8), + 15 => Some(Presc::Div16), + 31 => Some(Presc::Div32), + 63 => Some(Presc::Div64), + 127 => Some(Presc::Div128), + 255 => Some(Presc::Div256), + 511 => Some(Presc::Div512), + 1023 => Some(Presc::Div1024), _ => None, } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "No prescaling"] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == PRESC_A::DIV1 + *self == Presc::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "Prescale by 2"] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == PRESC_A::DIV2 + *self == Presc::Div2 } - #[doc = "Checks if the value of the field is `DIV4`"] + #[doc = "Prescale by 4"] #[inline(always)] pub fn is_div4(&self) -> bool { - *self == PRESC_A::DIV4 + *self == Presc::Div4 } - #[doc = "Checks if the value of the field is `DIV8`"] + #[doc = "Prescale by 8"] #[inline(always)] pub fn is_div8(&self) -> bool { - *self == PRESC_A::DIV8 + *self == Presc::Div8 } - #[doc = "Checks if the value of the field is `DIV16`"] + #[doc = "Prescale by 16"] #[inline(always)] pub fn is_div16(&self) -> bool { - *self == PRESC_A::DIV16 + *self == Presc::Div16 } - #[doc = "Checks if the value of the field is `DIV32`"] + #[doc = "Prescale by 32"] #[inline(always)] pub fn is_div32(&self) -> bool { - *self == PRESC_A::DIV32 + *self == Presc::Div32 } - #[doc = "Checks if the value of the field is `DIV64`"] + #[doc = "Prescale by 64"] #[inline(always)] pub fn is_div64(&self) -> bool { - *self == PRESC_A::DIV64 + *self == Presc::Div64 } - #[doc = "Checks if the value of the field is `DIV128`"] + #[doc = "Prescale by 128"] #[inline(always)] pub fn is_div128(&self) -> bool { - *self == PRESC_A::DIV128 + *self == Presc::Div128 } - #[doc = "Checks if the value of the field is `DIV256`"] + #[doc = "Prescale by 256"] #[inline(always)] pub fn is_div256(&self) -> bool { - *self == PRESC_A::DIV256 + *self == Presc::Div256 } - #[doc = "Checks if the value of the field is `DIV512`"] + #[doc = "Prescale by 512"] #[inline(always)] pub fn is_div512(&self) -> bool { - *self == PRESC_A::DIV512 + *self == Presc::Div512 } - #[doc = "Checks if the value of the field is `DIV1024`"] + #[doc = "Prescale by 1024"] #[inline(always)] pub fn is_div1024(&self) -> bool { - *self == PRESC_A::DIV1024 + *self == Presc::Div1024 } } #[doc = "Field `PRESC` writer - Prescaler Setting"] -pub type PRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u16, PRESC_A, 10, O>; -impl<'a, const O: u8> PRESC_W<'a, O> { +pub type PrescW<'a, REG> = crate::FieldWriter<'a, REG, 10, Presc>; +impl<'a, REG> PrescW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No prescaling"] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(PRESC_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Presc::Div1) } #[doc = "Prescale by 2"] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(PRESC_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Presc::Div2) } #[doc = "Prescale by 4"] #[inline(always)] - pub fn div4(self) -> &'a mut W { - self.variant(PRESC_A::DIV4) + pub fn div4(self) -> &'a mut crate::W { + self.variant(Presc::Div4) } #[doc = "Prescale by 8"] #[inline(always)] - pub fn div8(self) -> &'a mut W { - self.variant(PRESC_A::DIV8) + pub fn div8(self) -> &'a mut crate::W { + self.variant(Presc::Div8) } #[doc = "Prescale by 16"] #[inline(always)] - pub fn div16(self) -> &'a mut W { - self.variant(PRESC_A::DIV16) + pub fn div16(self) -> &'a mut crate::W { + self.variant(Presc::Div16) } #[doc = "Prescale by 32"] #[inline(always)] - pub fn div32(self) -> &'a mut W { - self.variant(PRESC_A::DIV32) + pub fn div32(self) -> &'a mut crate::W { + self.variant(Presc::Div32) } #[doc = "Prescale by 64"] #[inline(always)] - pub fn div64(self) -> &'a mut W { - self.variant(PRESC_A::DIV64) + pub fn div64(self) -> &'a mut crate::W { + self.variant(Presc::Div64) } #[doc = "Prescale by 128"] #[inline(always)] - pub fn div128(self) -> &'a mut W { - self.variant(PRESC_A::DIV128) + pub fn div128(self) -> &'a mut crate::W { + self.variant(Presc::Div128) } #[doc = "Prescale by 256"] #[inline(always)] - pub fn div256(self) -> &'a mut W { - self.variant(PRESC_A::DIV256) + pub fn div256(self) -> &'a mut crate::W { + self.variant(Presc::Div256) } #[doc = "Prescale by 512"] #[inline(always)] - pub fn div512(self) -> &'a mut W { - self.variant(PRESC_A::DIV512) + pub fn div512(self) -> &'a mut crate::W { + self.variant(Presc::Div512) } #[doc = "Prescale by 1024"] #[inline(always)] - pub fn div1024(self) -> &'a mut W { - self.variant(PRESC_A::DIV1024) + pub fn div1024(self) -> &'a mut crate::W { + self.variant(Presc::Div1024) } } impl R { #[doc = "Bits 0:1 - Timer Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Timer Start/Stop/Reload Synchronization"] #[inline(always)] - pub fn sync(&self) -> SYNC_R { - SYNC_R::new(((self.bits >> 3) & 1) != 0) + pub fn sync(&self) -> SyncR { + SyncR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - One-shot Mode Enable"] #[inline(always)] - pub fn osmen(&self) -> OSMEN_R { - OSMEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn osmen(&self) -> OsmenR { + OsmenR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Quadrature Decoder Mode Selection"] #[inline(always)] - pub fn qdm(&self) -> QDM_R { - QDM_R::new(((self.bits >> 5) & 1) != 0) + pub fn qdm(&self) -> QdmR { + QdmR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Debug Mode Run Enable"] #[inline(always)] - pub fn debugrun(&self) -> DEBUGRUN_R { - DEBUGRUN_R::new(((self.bits >> 6) & 1) != 0) + pub fn debugrun(&self) -> DebugrunR { + DebugrunR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - DMA Request Clear on Active"] #[inline(always)] - pub fn dmaclract(&self) -> DMACLRACT_R { - DMACLRACT_R::new(((self.bits >> 7) & 1) != 0) + pub fn dmaclract(&self) -> DmaclractR { + DmaclractR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:9 - Clock Source Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 10 - PWM output retimed enable"] #[inline(always)] - pub fn retimeen(&self) -> RETIMEEN_R { - RETIMEEN_R::new(((self.bits >> 10) & 1) != 0) + pub fn retimeen(&self) -> RetimeenR { + RetimeenR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Disable Timer Start/Stop/Reload output"] #[inline(always)] - pub fn dissyncout(&self) -> DISSYNCOUT_R { - DISSYNCOUT_R::new(((self.bits >> 11) & 1) != 0) + pub fn dissyncout(&self) -> DissyncoutR { + DissyncoutR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 16 - Always Track Inputs"] #[inline(always)] - pub fn ati(&self) -> ATI_R { - ATI_R::new(((self.bits >> 16) & 1) != 0) + pub fn ati(&self) -> AtiR { + AtiR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Reload-Start Sets COIST"] #[inline(always)] - pub fn rsscoist(&self) -> RSSCOIST_R { - RSSCOIST_R::new(((self.bits >> 17) & 1) != 0) + pub fn rsscoist(&self) -> RsscoistR { + RsscoistR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:27 - Prescaler Setting"] #[inline(always)] - pub fn presc(&self) -> PRESC_R { - PRESC_R::new(((self.bits >> 18) & 0x03ff) as u16) + pub fn presc(&self) -> PrescR { + PrescR::new(((self.bits >> 18) & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:1 - Timer Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 3 - Timer Start/Stop/Reload Synchronization"] #[inline(always)] #[must_use] - pub fn sync(&mut self) -> SYNC_W<3> { - SYNC_W::new(self) + pub fn sync(&mut self) -> SyncW { + SyncW::new(self, 3) } #[doc = "Bit 4 - One-shot Mode Enable"] #[inline(always)] #[must_use] - pub fn osmen(&mut self) -> OSMEN_W<4> { - OSMEN_W::new(self) + pub fn osmen(&mut self) -> OsmenW { + OsmenW::new(self, 4) } #[doc = "Bit 5 - Quadrature Decoder Mode Selection"] #[inline(always)] #[must_use] - pub fn qdm(&mut self) -> QDM_W<5> { - QDM_W::new(self) + pub fn qdm(&mut self) -> QdmW { + QdmW::new(self, 5) } #[doc = "Bit 6 - Debug Mode Run Enable"] #[inline(always)] #[must_use] - pub fn debugrun(&mut self) -> DEBUGRUN_W<6> { - DEBUGRUN_W::new(self) + pub fn debugrun(&mut self) -> DebugrunW { + DebugrunW::new(self, 6) } #[doc = "Bit 7 - DMA Request Clear on Active"] #[inline(always)] #[must_use] - pub fn dmaclract(&mut self) -> DMACLRACT_W<7> { - DMACLRACT_W::new(self) + pub fn dmaclract(&mut self) -> DmaclractW { + DmaclractW::new(self, 7) } #[doc = "Bits 8:9 - Clock Source Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<8> { - CLKSEL_W::new(self) + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 8) } #[doc = "Bit 10 - PWM output retimed enable"] #[inline(always)] #[must_use] - pub fn retimeen(&mut self) -> RETIMEEN_W<10> { - RETIMEEN_W::new(self) + pub fn retimeen(&mut self) -> RetimeenW { + RetimeenW::new(self, 10) } #[doc = "Bit 11 - Disable Timer Start/Stop/Reload output"] #[inline(always)] #[must_use] - pub fn dissyncout(&mut self) -> DISSYNCOUT_W<11> { - DISSYNCOUT_W::new(self) + pub fn dissyncout(&mut self) -> DissyncoutW { + DissyncoutW::new(self, 11) } #[doc = "Bit 16 - Always Track Inputs"] #[inline(always)] #[must_use] - pub fn ati(&mut self) -> ATI_W<16> { - ATI_W::new(self) + pub fn ati(&mut self) -> AtiW { + AtiW::new(self, 16) } #[doc = "Bit 17 - Reload-Start Sets COIST"] #[inline(always)] #[must_use] - pub fn rsscoist(&mut self) -> RSSCOIST_W<17> { - RSSCOIST_W::new(self) + pub fn rsscoist(&mut self) -> RsscoistW { + RsscoistW::new(self, 17) } #[doc = "Bits 18:27 - Prescaler Setting"] #[inline(always)] #[must_use] - pub fn presc(&mut self) -> PRESC_W<18> { - PRESC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn presc(&mut self) -> PrescW { + PrescW::new(self, 18) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cmd.rs index ca6d3b1..bf41157 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cmd.rs @@ -1,60 +1,35 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` writer - Start Timer"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STOP` writer - Stop Timer"] -pub type STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StopW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Start Timer"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Stop Timer"] #[inline(always)] #[must_use] - pub fn stop(&mut self) -> STOP_W<1> { - STOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stop(&mut self) -> StopW { + StopW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cnt.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cnt.rs index dd37661..c870fc9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cnt.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/cnt.rs @@ -1,80 +1,40 @@ #[doc = "Register `CNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CNT` reader - Counter Value"] -pub type CNT_R = crate::FieldReader; +pub type CntR = crate::FieldReader; #[doc = "Field `CNT` writer - Counter Value"] -pub type CNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CNT_SPEC, u16, u16, 16, O>; +pub type CntW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Value"] #[inline(always)] - pub fn cnt(&self) -> CNT_R { - CNT_R::new((self.bits & 0xffff) as u16) + pub fn cnt(&self) -> CntR { + CntR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Value"] #[inline(always)] #[must_use] - pub fn cnt(&mut self) -> CNT_W<0> { - CNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cnt(&mut self) -> CntW { + CntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](index.html) module"] -pub struct CNT_SPEC; -impl crate::RegisterSpec for CNT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CntSpec; +impl crate::RegisterSpec for CntSpec { type Ux = u32; } -#[doc = "`read()` method returns [cnt::R](R) reader structure"] -impl crate::Readable for CNT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnt::W](W) writer structure"] -impl crate::Writable for CNT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cnt::R`](R) reader structure"] +impl crate::Readable for CntSpec {} +#[doc = "`write(|w| ..)` method takes [`cnt::W`](W) writer structure"] +impl crate::Writable for CntSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNT to value 0"] -impl crate::Resettable for CNT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CntSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/ctrl.rs index 08e646b..e2ed153 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/ctrl.rs @@ -1,258 +1,234 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `RISEA` reader - Timer Rising Input Edge Action"] -pub type RISEA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Timer Rising Input Edge Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RISEA_A { +pub enum Risea { #[doc = "0: No action"] - NONE = 0, + None = 0, #[doc = "1: Start counter without reload"] - START = 1, + Start = 1, #[doc = "2: Stop counter without reload"] - STOP = 2, + Stop = 2, #[doc = "3: Reload and start counter"] - RELOADSTART = 3, + Reloadstart = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RISEA_A) -> Self { + fn from(variant: Risea) -> Self { variant as _ } } -impl RISEA_R { +impl crate::FieldSpec for Risea { + type Ux = u8; +} +impl crate::IsEnum for Risea {} +#[doc = "Field `RISEA` reader - Timer Rising Input Edge Action"] +pub type RiseaR = crate::FieldReader; +impl RiseaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RISEA_A { + pub const fn variant(&self) -> Risea { match self.bits { - 0 => RISEA_A::NONE, - 1 => RISEA_A::START, - 2 => RISEA_A::STOP, - 3 => RISEA_A::RELOADSTART, + 0 => Risea::None, + 1 => Risea::Start, + 2 => Risea::Stop, + 3 => Risea::Reloadstart, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == RISEA_A::NONE + *self == Risea::None } - #[doc = "Checks if the value of the field is `START`"] + #[doc = "Start counter without reload"] #[inline(always)] pub fn is_start(&self) -> bool { - *self == RISEA_A::START + *self == Risea::Start } - #[doc = "Checks if the value of the field is `STOP`"] + #[doc = "Stop counter without reload"] #[inline(always)] pub fn is_stop(&self) -> bool { - *self == RISEA_A::STOP + *self == Risea::Stop } - #[doc = "Checks if the value of the field is `RELOADSTART`"] + #[doc = "Reload and start counter"] #[inline(always)] pub fn is_reloadstart(&self) -> bool { - *self == RISEA_A::RELOADSTART + *self == Risea::Reloadstart } } #[doc = "Field `RISEA` writer - Timer Rising Input Edge Action"] -pub type RISEA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, RISEA_A, 2, O>; -impl<'a, const O: u8> RISEA_W<'a, O> { +pub type RiseaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Risea, crate::Safe>; +impl<'a, REG> RiseaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(RISEA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Risea::None) } #[doc = "Start counter without reload"] #[inline(always)] - pub fn start(self) -> &'a mut W { - self.variant(RISEA_A::START) + pub fn start(self) -> &'a mut crate::W { + self.variant(Risea::Start) } #[doc = "Stop counter without reload"] #[inline(always)] - pub fn stop(self) -> &'a mut W { - self.variant(RISEA_A::STOP) + pub fn stop(self) -> &'a mut crate::W { + self.variant(Risea::Stop) } #[doc = "Reload and start counter"] #[inline(always)] - pub fn reloadstart(self) -> &'a mut W { - self.variant(RISEA_A::RELOADSTART) + pub fn reloadstart(self) -> &'a mut crate::W { + self.variant(Risea::Reloadstart) } } -#[doc = "Field `FALLA` reader - Timer Falling Input Edge Action"] -pub type FALLA_R = crate::FieldReader; #[doc = "Timer Falling Input Edge Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FALLA_A { +pub enum Falla { #[doc = "0: No action"] - NONE = 0, + None = 0, #[doc = "1: Start counter without reload"] - START = 1, + Start = 1, #[doc = "2: Stop counter without reload"] - STOP = 2, + Stop = 2, #[doc = "3: Reload and start counter"] - RELOADSTART = 3, + Reloadstart = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FALLA_A) -> Self { + fn from(variant: Falla) -> Self { variant as _ } } -impl FALLA_R { +impl crate::FieldSpec for Falla { + type Ux = u8; +} +impl crate::IsEnum for Falla {} +#[doc = "Field `FALLA` reader - Timer Falling Input Edge Action"] +pub type FallaR = crate::FieldReader; +impl FallaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FALLA_A { + pub const fn variant(&self) -> Falla { match self.bits { - 0 => FALLA_A::NONE, - 1 => FALLA_A::START, - 2 => FALLA_A::STOP, - 3 => FALLA_A::RELOADSTART, + 0 => Falla::None, + 1 => Falla::Start, + 2 => Falla::Stop, + 3 => Falla::Reloadstart, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == FALLA_A::NONE + *self == Falla::None } - #[doc = "Checks if the value of the field is `START`"] + #[doc = "Start counter without reload"] #[inline(always)] pub fn is_start(&self) -> bool { - *self == FALLA_A::START + *self == Falla::Start } - #[doc = "Checks if the value of the field is `STOP`"] + #[doc = "Stop counter without reload"] #[inline(always)] pub fn is_stop(&self) -> bool { - *self == FALLA_A::STOP + *self == Falla::Stop } - #[doc = "Checks if the value of the field is `RELOADSTART`"] + #[doc = "Reload and start counter"] #[inline(always)] pub fn is_reloadstart(&self) -> bool { - *self == FALLA_A::RELOADSTART + *self == Falla::Reloadstart } } #[doc = "Field `FALLA` writer - Timer Falling Input Edge Action"] -pub type FALLA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, FALLA_A, 2, O>; -impl<'a, const O: u8> FALLA_W<'a, O> { +pub type FallaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Falla, crate::Safe>; +impl<'a, REG> FallaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(FALLA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Falla::None) } #[doc = "Start counter without reload"] #[inline(always)] - pub fn start(self) -> &'a mut W { - self.variant(FALLA_A::START) + pub fn start(self) -> &'a mut crate::W { + self.variant(Falla::Start) } #[doc = "Stop counter without reload"] #[inline(always)] - pub fn stop(self) -> &'a mut W { - self.variant(FALLA_A::STOP) + pub fn stop(self) -> &'a mut crate::W { + self.variant(Falla::Stop) } #[doc = "Reload and start counter"] #[inline(always)] - pub fn reloadstart(self) -> &'a mut W { - self.variant(FALLA_A::RELOADSTART) + pub fn reloadstart(self) -> &'a mut crate::W { + self.variant(Falla::Reloadstart) } } #[doc = "Field `X2CNT` reader - 2x Count Mode"] -pub type X2CNT_R = crate::BitReader; +pub type X2cntR = crate::BitReader; #[doc = "Field `X2CNT` writer - 2x Count Mode"] -pub type X2CNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type X2cntW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - Timer Rising Input Edge Action"] #[inline(always)] - pub fn risea(&self) -> RISEA_R { - RISEA_R::new((self.bits & 3) as u8) + pub fn risea(&self) -> RiseaR { + RiseaR::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Timer Falling Input Edge Action"] #[inline(always)] - pub fn falla(&self) -> FALLA_R { - FALLA_R::new(((self.bits >> 2) & 3) as u8) + pub fn falla(&self) -> FallaR { + FallaR::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bit 4 - 2x Count Mode"] #[inline(always)] - pub fn x2cnt(&self) -> X2CNT_R { - X2CNT_R::new(((self.bits >> 4) & 1) != 0) + pub fn x2cnt(&self) -> X2cntR { + X2cntR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Timer Rising Input Edge Action"] #[inline(always)] #[must_use] - pub fn risea(&mut self) -> RISEA_W<0> { - RISEA_W::new(self) + pub fn risea(&mut self) -> RiseaW { + RiseaW::new(self, 0) } #[doc = "Bits 2:3 - Timer Falling Input Edge Action"] #[inline(always)] #[must_use] - pub fn falla(&mut self) -> FALLA_W<2> { - FALLA_W::new(self) + pub fn falla(&mut self) -> FallaW { + FallaW::new(self, 2) } #[doc = "Bit 4 - 2x Count Mode"] #[inline(always)] #[must_use] - pub fn x2cnt(&mut self) -> X2CNT_W<4> { - X2CNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn x2cnt(&mut self) -> X2cntW { + X2cntW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtcfg.rs index d19a9a3..82b97e1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtcfg.rs @@ -1,186 +1,149 @@ #[doc = "Register `DTCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTEN` reader - DTI Enable"] -pub type DTEN_R = crate::BitReader; +pub type DtenR = crate::BitReader; #[doc = "Field `DTEN` writer - DTI Enable"] -pub type DTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; -#[doc = "Field `DTDAS` reader - DTI Automatic Start-up Functionality"] -pub type DTDAS_R = crate::BitReader; +pub type DtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "DTI Automatic Start-up Functionality\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DTDAS_A { +pub enum Dtdas { #[doc = "0: No DTI restart on debugger exit"] - NORESTART = 0, + Norestart = 0, #[doc = "1: DTI restart on debugger exit"] - RESTART = 1, + Restart = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DTDAS_A) -> Self { + fn from(variant: Dtdas) -> Self { variant as u8 != 0 } } -impl DTDAS_R { +#[doc = "Field `DTDAS` reader - DTI Automatic Start-up Functionality"] +pub type DtdasR = crate::BitReader; +impl DtdasR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTDAS_A { + pub const fn variant(&self) -> Dtdas { match self.bits { - false => DTDAS_A::NORESTART, - true => DTDAS_A::RESTART, + false => Dtdas::Norestart, + true => Dtdas::Restart, } } - #[doc = "Checks if the value of the field is `NORESTART`"] + #[doc = "No DTI restart on debugger exit"] #[inline(always)] pub fn is_norestart(&self) -> bool { - *self == DTDAS_A::NORESTART + *self == Dtdas::Norestart } - #[doc = "Checks if the value of the field is `RESTART`"] + #[doc = "DTI restart on debugger exit"] #[inline(always)] pub fn is_restart(&self) -> bool { - *self == DTDAS_A::RESTART + *self == Dtdas::Restart } } #[doc = "Field `DTDAS` writer - DTI Automatic Start-up Functionality"] -pub type DTDAS_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, DTDAS_A, O>; -impl<'a, const O: u8> DTDAS_W<'a, O> { +pub type DtdasW<'a, REG> = crate::BitWriter<'a, REG, Dtdas>; +impl<'a, REG> DtdasW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No DTI restart on debugger exit"] #[inline(always)] - pub fn norestart(self) -> &'a mut W { - self.variant(DTDAS_A::NORESTART) + pub fn norestart(self) -> &'a mut crate::W { + self.variant(Dtdas::Norestart) } #[doc = "DTI restart on debugger exit"] #[inline(always)] - pub fn restart(self) -> &'a mut W { - self.variant(DTDAS_A::RESTART) + pub fn restart(self) -> &'a mut crate::W { + self.variant(Dtdas::Restart) } } #[doc = "Field `DTAR` reader - DTI Always Run"] -pub type DTAR_R = crate::BitReader; +pub type DtarR = crate::BitReader; #[doc = "Field `DTAR` writer - DTI Always Run"] -pub type DTAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtarW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTFATS` reader - DTI Fault Action on Timer Stop"] -pub type DTFATS_R = crate::BitReader; +pub type DtfatsR = crate::BitReader; #[doc = "Field `DTFATS` writer - DTI Fault Action on Timer Stop"] -pub type DTFATS_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtfatsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRSEN` reader - DTI PRS Source Enable"] -pub type DTPRSEN_R = crate::BitReader; +pub type DtprsenR = crate::BitReader; #[doc = "Field `DTPRSEN` writer - DTI PRS Source Enable"] -pub type DTPRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtprsenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI Enable"] #[inline(always)] - pub fn dten(&self) -> DTEN_R { - DTEN_R::new((self.bits & 1) != 0) + pub fn dten(&self) -> DtenR { + DtenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI Automatic Start-up Functionality"] #[inline(always)] - pub fn dtdas(&self) -> DTDAS_R { - DTDAS_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtdas(&self) -> DtdasR { + DtdasR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 9 - DTI Always Run"] #[inline(always)] - pub fn dtar(&self) -> DTAR_R { - DTAR_R::new(((self.bits >> 9) & 1) != 0) + pub fn dtar(&self) -> DtarR { + DtarR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - DTI Fault Action on Timer Stop"] #[inline(always)] - pub fn dtfats(&self) -> DTFATS_R { - DTFATS_R::new(((self.bits >> 10) & 1) != 0) + pub fn dtfats(&self) -> DtfatsR { + DtfatsR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - DTI PRS Source Enable"] #[inline(always)] - pub fn dtprsen(&self) -> DTPRSEN_R { - DTPRSEN_R::new(((self.bits >> 11) & 1) != 0) + pub fn dtprsen(&self) -> DtprsenR { + DtprsenR::new(((self.bits >> 11) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI Enable"] #[inline(always)] #[must_use] - pub fn dten(&mut self) -> DTEN_W<0> { - DTEN_W::new(self) + pub fn dten(&mut self) -> DtenW { + DtenW::new(self, 0) } #[doc = "Bit 1 - DTI Automatic Start-up Functionality"] #[inline(always)] #[must_use] - pub fn dtdas(&mut self) -> DTDAS_W<1> { - DTDAS_W::new(self) + pub fn dtdas(&mut self) -> DtdasW { + DtdasW::new(self, 1) } #[doc = "Bit 9 - DTI Always Run"] #[inline(always)] #[must_use] - pub fn dtar(&mut self) -> DTAR_W<9> { - DTAR_W::new(self) + pub fn dtar(&mut self) -> DtarW { + DtarW::new(self, 9) } #[doc = "Bit 10 - DTI Fault Action on Timer Stop"] #[inline(always)] #[must_use] - pub fn dtfats(&mut self) -> DTFATS_W<10> { - DTFATS_W::new(self) + pub fn dtfats(&mut self) -> DtfatsW { + DtfatsW::new(self, 10) } #[doc = "Bit 11 - DTI PRS Source Enable"] #[inline(always)] #[must_use] - pub fn dtprsen(&mut self) -> DTPRSEN_W<11> { - DTPRSEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtprsen(&mut self) -> DtprsenW { + DtprsenW::new(self, 11) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtcfg](index.html) module"] -pub struct DTCFG_SPEC; -impl crate::RegisterSpec for DTCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtcfgSpec; +impl crate::RegisterSpec for DtcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtcfg::R](R) reader structure"] -impl crate::Readable for DTCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtcfg::W](W) writer structure"] -impl crate::Writable for DTCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtcfg::R`](R) reader structure"] +impl crate::Readable for DtcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dtcfg::W`](W) writer structure"] +impl crate::Writable for DtcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTCFG to value 0"] -impl crate::Resettable for DTCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtctrl.rs index 816a05e..84f6d17 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtctrl.rs @@ -1,95 +1,55 @@ #[doc = "Register `DTCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTCINV` reader - DTI Complementary Output Invert."] -pub type DTCINV_R = crate::BitReader; +pub type DtcinvR = crate::BitReader; #[doc = "Field `DTCINV` writer - DTI Complementary Output Invert."] -pub type DTCINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, O>; +pub type DtcinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTIPOL` reader - DTI Inactive Polarity"] -pub type DTIPOL_R = crate::BitReader; +pub type DtipolR = crate::BitReader; #[doc = "Field `DTIPOL` writer - DTI Inactive Polarity"] -pub type DTIPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, O>; +pub type DtipolW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI Complementary Output Invert."] #[inline(always)] - pub fn dtcinv(&self) -> DTCINV_R { - DTCINV_R::new((self.bits & 1) != 0) + pub fn dtcinv(&self) -> DtcinvR { + DtcinvR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI Inactive Polarity"] #[inline(always)] - pub fn dtipol(&self) -> DTIPOL_R { - DTIPOL_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtipol(&self) -> DtipolR { + DtipolR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI Complementary Output Invert."] #[inline(always)] #[must_use] - pub fn dtcinv(&mut self) -> DTCINV_W<0> { - DTCINV_W::new(self) + pub fn dtcinv(&mut self) -> DtcinvW { + DtcinvW::new(self, 0) } #[doc = "Bit 1 - DTI Inactive Polarity"] #[inline(always)] #[must_use] - pub fn dtipol(&mut self) -> DTIPOL_W<1> { - DTIPOL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtipol(&mut self) -> DtipolW { + DtipolW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtctrl](index.html) module"] -pub struct DTCTRL_SPEC; -impl crate::RegisterSpec for DTCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtctrlSpec; +impl crate::RegisterSpec for DtctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtctrl::R](R) reader structure"] -impl crate::Readable for DTCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtctrl::W](W) writer structure"] -impl crate::Writable for DTCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtctrl::R`](R) reader structure"] +impl crate::Readable for DtctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`dtctrl::W`](W) writer structure"] +impl crate::Writable for DtctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTCTRL to value 0"] -impl crate::Resettable for DTCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtfault.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtfault.rs index 01a53f9..ecd21aa 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtfault.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtfault.rs @@ -1,65 +1,50 @@ #[doc = "Register `DTFAULT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DTPRS0F` reader - DTI PRS 0 Fault"] -pub type DTPRS0F_R = crate::BitReader; +pub type Dtprs0fR = crate::BitReader; #[doc = "Field `DTPRS1F` reader - DTI PRS 1 Fault"] -pub type DTPRS1F_R = crate::BitReader; +pub type Dtprs1fR = crate::BitReader; #[doc = "Field `DTDBGF` reader - DTI Debugger Fault"] -pub type DTDBGF_R = crate::BitReader; +pub type DtdbgfR = crate::BitReader; #[doc = "Field `DTLOCKUPF` reader - DTI Lockup Fault"] -pub type DTLOCKUPF_R = crate::BitReader; +pub type DtlockupfR = crate::BitReader; #[doc = "Field `DTEM23F` reader - DTI EM23 Entry Fault"] -pub type DTEM23F_R = crate::BitReader; +pub type Dtem23fR = crate::BitReader; impl R { #[doc = "Bit 0 - DTI PRS 0 Fault"] #[inline(always)] - pub fn dtprs0f(&self) -> DTPRS0F_R { - DTPRS0F_R::new((self.bits & 1) != 0) + pub fn dtprs0f(&self) -> Dtprs0fR { + Dtprs0fR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI PRS 1 Fault"] #[inline(always)] - pub fn dtprs1f(&self) -> DTPRS1F_R { - DTPRS1F_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtprs1f(&self) -> Dtprs1fR { + Dtprs1fR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DTI Debugger Fault"] #[inline(always)] - pub fn dtdbgf(&self) -> DTDBGF_R { - DTDBGF_R::new(((self.bits >> 2) & 1) != 0) + pub fn dtdbgf(&self) -> DtdbgfR { + DtdbgfR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DTI Lockup Fault"] #[inline(always)] - pub fn dtlockupf(&self) -> DTLOCKUPF_R { - DTLOCKUPF_R::new(((self.bits >> 3) & 1) != 0) + pub fn dtlockupf(&self) -> DtlockupfR { + DtlockupfR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - DTI EM23 Entry Fault"] #[inline(always)] - pub fn dtem23f(&self) -> DTEM23F_R { - DTEM23F_R::new(((self.bits >> 4) & 1) != 0) + pub fn dtem23f(&self) -> Dtem23fR { + Dtem23fR::new(((self.bits >> 4) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfault](index.html) module"] -pub struct DTFAULT_SPEC; -impl crate::RegisterSpec for DTFAULT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfault::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfaultSpec; +impl crate::RegisterSpec for DtfaultSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtfault::R](R) reader structure"] -impl crate::Readable for DTFAULT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`dtfault::R`](R) reader structure"] +impl crate::Readable for DtfaultSpec {} #[doc = "`reset()` method sets DTFAULT to value 0"] -impl crate::Resettable for DTFAULT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfaultSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtfaultc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtfaultc.rs index 1c3d1ba..bcb21e2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtfaultc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtfaultc.rs @@ -1,84 +1,59 @@ #[doc = "Register `DTFAULTC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTPRS0FC` writer - DTI PRS0 Fault Clear"] -pub type DTPRS0FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtprs0fcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRS1FC` writer - DTI PRS1 Fault Clear"] -pub type DTPRS1FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtprs1fcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTDBGFC` writer - DTI Debugger Fault Clear"] -pub type DTDBGFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type DtdbgfcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTLOCKUPFC` writer - DTI Lockup Fault Clear"] -pub type DTLOCKUPFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type DtlockupfcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTEM23FC` writer - DTI EM23 Fault Clear"] -pub type DTEM23FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtem23fcW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - DTI PRS0 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtprs0fc(&mut self) -> DTPRS0FC_W<0> { - DTPRS0FC_W::new(self) + pub fn dtprs0fc(&mut self) -> Dtprs0fcW { + Dtprs0fcW::new(self, 0) } #[doc = "Bit 1 - DTI PRS1 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtprs1fc(&mut self) -> DTPRS1FC_W<1> { - DTPRS1FC_W::new(self) + pub fn dtprs1fc(&mut self) -> Dtprs1fcW { + Dtprs1fcW::new(self, 1) } #[doc = "Bit 2 - DTI Debugger Fault Clear"] #[inline(always)] #[must_use] - pub fn dtdbgfc(&mut self) -> DTDBGFC_W<2> { - DTDBGFC_W::new(self) + pub fn dtdbgfc(&mut self) -> DtdbgfcW { + DtdbgfcW::new(self, 2) } #[doc = "Bit 3 - DTI Lockup Fault Clear"] #[inline(always)] #[must_use] - pub fn dtlockupfc(&mut self) -> DTLOCKUPFC_W<3> { - DTLOCKUPFC_W::new(self) + pub fn dtlockupfc(&mut self) -> DtlockupfcW { + DtlockupfcW::new(self, 3) } #[doc = "Bit 4 - DTI EM23 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtem23fc(&mut self) -> DTEM23FC_W<4> { - DTEM23FC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtem23fc(&mut self) -> Dtem23fcW { + Dtem23fcW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfaultc](index.html) module"] -pub struct DTFAULTC_SPEC; -impl crate::RegisterSpec for DTFAULTC_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfaultc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfaultcSpec; +impl crate::RegisterSpec for DtfaultcSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [dtfaultc::W](W) writer structure"] -impl crate::Writable for DTFAULTC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`dtfaultc::W`](W) writer structure"] +impl crate::Writable for DtfaultcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTFAULTC to value 0"] -impl crate::Resettable for DTFAULTC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfaultcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtfcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtfcfg.rs index 91dee4b..6179df8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtfcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtfcfg.rs @@ -1,229 +1,197 @@ #[doc = "Register `DTFCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTFCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DTFA` reader - DTI Fault Action"] -pub type DTFA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DTI Fault Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DTFA_A { +pub enum Dtfa { #[doc = "0: No action on fault"] - NONE = 0, + None = 0, #[doc = "1: Set outputs inactive"] - INACTIVE = 1, + Inactive = 1, #[doc = "2: Clear outputs"] - CLEAR = 2, + Clear = 2, #[doc = "3: Tristate outputs"] - TRISTATE = 3, + Tristate = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DTFA_A) -> Self { + fn from(variant: Dtfa) -> Self { variant as _ } } -impl DTFA_R { +impl crate::FieldSpec for Dtfa { + type Ux = u8; +} +impl crate::IsEnum for Dtfa {} +#[doc = "Field `DTFA` reader - DTI Fault Action"] +pub type DtfaR = crate::FieldReader; +impl DtfaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTFA_A { + pub const fn variant(&self) -> Dtfa { match self.bits { - 0 => DTFA_A::NONE, - 1 => DTFA_A::INACTIVE, - 2 => DTFA_A::CLEAR, - 3 => DTFA_A::TRISTATE, + 0 => Dtfa::None, + 1 => Dtfa::Inactive, + 2 => Dtfa::Clear, + 3 => Dtfa::Tristate, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on fault"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == DTFA_A::NONE + *self == Dtfa::None } - #[doc = "Checks if the value of the field is `INACTIVE`"] + #[doc = "Set outputs inactive"] #[inline(always)] pub fn is_inactive(&self) -> bool { - *self == DTFA_A::INACTIVE + *self == Dtfa::Inactive } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear outputs"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == DTFA_A::CLEAR + *self == Dtfa::Clear } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "Tristate outputs"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == DTFA_A::TRISTATE + *self == Dtfa::Tristate } } #[doc = "Field `DTFA` writer - DTI Fault Action"] -pub type DTFA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, DTFCFG_SPEC, u8, DTFA_A, 2, O>; -impl<'a, const O: u8> DTFA_W<'a, O> { +pub type DtfaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dtfa, crate::Safe>; +impl<'a, REG> DtfaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on fault"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(DTFA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Dtfa::None) } #[doc = "Set outputs inactive"] #[inline(always)] - pub fn inactive(self) -> &'a mut W { - self.variant(DTFA_A::INACTIVE) + pub fn inactive(self) -> &'a mut crate::W { + self.variant(Dtfa::Inactive) } #[doc = "Clear outputs"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(DTFA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Dtfa::Clear) } #[doc = "Tristate outputs"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(DTFA_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Dtfa::Tristate) } } #[doc = "Field `DTPRS0FEN` reader - DTI PRS 0 Fault Enable"] -pub type DTPRS0FEN_R = crate::BitReader; +pub type Dtprs0fenR = crate::BitReader; #[doc = "Field `DTPRS0FEN` writer - DTI PRS 0 Fault Enable"] -pub type DTPRS0FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtprs0fenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRS1FEN` reader - DTI PRS 1 Fault Enable"] -pub type DTPRS1FEN_R = crate::BitReader; +pub type Dtprs1fenR = crate::BitReader; #[doc = "Field `DTPRS1FEN` writer - DTI PRS 1 Fault Enable"] -pub type DTPRS1FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtprs1fenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTDBGFEN` reader - DTI Debugger Fault Enable"] -pub type DTDBGFEN_R = crate::BitReader; +pub type DtdbgfenR = crate::BitReader; #[doc = "Field `DTDBGFEN` writer - DTI Debugger Fault Enable"] -pub type DTDBGFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type DtdbgfenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTLOCKUPFEN` reader - DTI Lockup Fault Enable"] -pub type DTLOCKUPFEN_R = crate::BitReader; +pub type DtlockupfenR = crate::BitReader; #[doc = "Field `DTLOCKUPFEN` writer - DTI Lockup Fault Enable"] -pub type DTLOCKUPFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type DtlockupfenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTEM23FEN` reader - DTI EM23 Fault Enable"] -pub type DTEM23FEN_R = crate::BitReader; +pub type Dtem23fenR = crate::BitReader; #[doc = "Field `DTEM23FEN` writer - DTI EM23 Fault Enable"] -pub type DTEM23FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtem23fenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 16:17 - DTI Fault Action"] #[inline(always)] - pub fn dtfa(&self) -> DTFA_R { - DTFA_R::new(((self.bits >> 16) & 3) as u8) + pub fn dtfa(&self) -> DtfaR { + DtfaR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 24 - DTI PRS 0 Fault Enable"] #[inline(always)] - pub fn dtprs0fen(&self) -> DTPRS0FEN_R { - DTPRS0FEN_R::new(((self.bits >> 24) & 1) != 0) + pub fn dtprs0fen(&self) -> Dtprs0fenR { + Dtprs0fenR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - DTI PRS 1 Fault Enable"] #[inline(always)] - pub fn dtprs1fen(&self) -> DTPRS1FEN_R { - DTPRS1FEN_R::new(((self.bits >> 25) & 1) != 0) + pub fn dtprs1fen(&self) -> Dtprs1fenR { + Dtprs1fenR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - DTI Debugger Fault Enable"] #[inline(always)] - pub fn dtdbgfen(&self) -> DTDBGFEN_R { - DTDBGFEN_R::new(((self.bits >> 26) & 1) != 0) + pub fn dtdbgfen(&self) -> DtdbgfenR { + DtdbgfenR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - DTI Lockup Fault Enable"] #[inline(always)] - pub fn dtlockupfen(&self) -> DTLOCKUPFEN_R { - DTLOCKUPFEN_R::new(((self.bits >> 27) & 1) != 0) + pub fn dtlockupfen(&self) -> DtlockupfenR { + DtlockupfenR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - DTI EM23 Fault Enable"] #[inline(always)] - pub fn dtem23fen(&self) -> DTEM23FEN_R { - DTEM23FEN_R::new(((self.bits >> 28) & 1) != 0) + pub fn dtem23fen(&self) -> Dtem23fenR { + Dtem23fenR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bits 16:17 - DTI Fault Action"] #[inline(always)] #[must_use] - pub fn dtfa(&mut self) -> DTFA_W<16> { - DTFA_W::new(self) + pub fn dtfa(&mut self) -> DtfaW { + DtfaW::new(self, 16) } #[doc = "Bit 24 - DTI PRS 0 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtprs0fen(&mut self) -> DTPRS0FEN_W<24> { - DTPRS0FEN_W::new(self) + pub fn dtprs0fen(&mut self) -> Dtprs0fenW { + Dtprs0fenW::new(self, 24) } #[doc = "Bit 25 - DTI PRS 1 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtprs1fen(&mut self) -> DTPRS1FEN_W<25> { - DTPRS1FEN_W::new(self) + pub fn dtprs1fen(&mut self) -> Dtprs1fenW { + Dtprs1fenW::new(self, 25) } #[doc = "Bit 26 - DTI Debugger Fault Enable"] #[inline(always)] #[must_use] - pub fn dtdbgfen(&mut self) -> DTDBGFEN_W<26> { - DTDBGFEN_W::new(self) + pub fn dtdbgfen(&mut self) -> DtdbgfenW { + DtdbgfenW::new(self, 26) } #[doc = "Bit 27 - DTI Lockup Fault Enable"] #[inline(always)] #[must_use] - pub fn dtlockupfen(&mut self) -> DTLOCKUPFEN_W<27> { - DTLOCKUPFEN_W::new(self) + pub fn dtlockupfen(&mut self) -> DtlockupfenW { + DtlockupfenW::new(self, 27) } #[doc = "Bit 28 - DTI EM23 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtem23fen(&mut self) -> DTEM23FEN_W<28> { - DTEM23FEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtem23fen(&mut self) -> Dtem23fenW { + Dtem23fenW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfcfg](index.html) module"] -pub struct DTFCFG_SPEC; -impl crate::RegisterSpec for DTFCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfcfgSpec; +impl crate::RegisterSpec for DtfcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtfcfg::R](R) reader structure"] -impl crate::Readable for DTFCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtfcfg::W](W) writer structure"] -impl crate::Writable for DTFCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtfcfg::R`](R) reader structure"] +impl crate::Readable for DtfcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dtfcfg::W`](W) writer structure"] +impl crate::Writable for DtfcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTFCFG to value 0"] -impl crate::Resettable for DTFCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtlock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtlock.rs index 434789a..5ce63f5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtlock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtlock.rs @@ -1,73 +1,55 @@ #[doc = "Register `DTLOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "DTI Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum DTILOCKKEY_AW { +pub enum Dtilockkey { #[doc = "52864: Write to unlock TIMER DTI registers"] - UNLOCK = 52864, + Unlock = 52864, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: DTILOCKKEY_AW) -> Self { + fn from(variant: Dtilockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Dtilockkey { + type Ux = u16; +} +impl crate::IsEnum for Dtilockkey {} #[doc = "Field `DTILOCKKEY` writer - DTI Lock Key"] -pub type DTILOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, DTLOCK_SPEC, u16, DTILOCKKEY_AW, 16, O>; -impl<'a, const O: u8> DTILOCKKEY_W<'a, O> { +pub type DtilockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Dtilockkey>; +impl<'a, REG> DtilockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unlock TIMER DTI registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(DTILOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Dtilockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - DTI Lock Key"] #[inline(always)] #[must_use] - pub fn dtilockkey(&mut self) -> DTILOCKKEY_W<0> { - DTILOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtilockkey(&mut self) -> DtilockkeyW { + DtilockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtlock](index.html) module"] -pub struct DTLOCK_SPEC; -impl crate::RegisterSpec for DTLOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtlock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtlockSpec; +impl crate::RegisterSpec for DtlockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [dtlock::W](W) writer structure"] -impl crate::Writable for DTLOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`dtlock::W`](W) writer structure"] +impl crate::Writable for DtlockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTLOCK to value 0"] -impl crate::Resettable for DTLOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtlockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtogen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtogen.rs index 818b4bb..35926ca 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtogen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dtogen.rs @@ -1,155 +1,115 @@ #[doc = "Register `DTOGEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTOGEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTOGCC0EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC0EN_R = crate::BitReader; +pub type Dtogcc0enR = crate::BitReader; #[doc = "Field `DTOGCC0EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCC1EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC1EN_R = crate::BitReader; +pub type Dtogcc1enR = crate::BitReader; #[doc = "Field `DTOGCC1EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCC2EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC2EN_R = crate::BitReader; +pub type Dtogcc2enR = crate::BitReader; #[doc = "Field `DTOGCC2EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC2EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc2enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI0EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI0EN_R = crate::BitReader; +pub type Dtogcdti0enR = crate::BitReader; #[doc = "Field `DTOGCDTI0EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI1EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI1EN_R = crate::BitReader; +pub type Dtogcdti1enR = crate::BitReader; #[doc = "Field `DTOGCDTI1EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI2EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI2EN_R = crate::BitReader; +pub type Dtogcdti2enR = crate::BitReader; #[doc = "Field `DTOGCDTI2EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI2EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti2enW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc0en(&self) -> DTOGCC0EN_R { - DTOGCC0EN_R::new((self.bits & 1) != 0) + pub fn dtogcc0en(&self) -> Dtogcc0enR { + Dtogcc0enR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc1en(&self) -> DTOGCC1EN_R { - DTOGCC1EN_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtogcc1en(&self) -> Dtogcc1enR { + Dtogcc1enR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc2en(&self) -> DTOGCC2EN_R { - DTOGCC2EN_R::new(((self.bits >> 2) & 1) != 0) + pub fn dtogcc2en(&self) -> Dtogcc2enR { + Dtogcc2enR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti0en(&self) -> DTOGCDTI0EN_R { - DTOGCDTI0EN_R::new(((self.bits >> 3) & 1) != 0) + pub fn dtogcdti0en(&self) -> Dtogcdti0enR { + Dtogcdti0enR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti1en(&self) -> DTOGCDTI1EN_R { - DTOGCDTI1EN_R::new(((self.bits >> 4) & 1) != 0) + pub fn dtogcdti1en(&self) -> Dtogcdti1enR { + Dtogcdti1enR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti2en(&self) -> DTOGCDTI2EN_R { - DTOGCDTI2EN_R::new(((self.bits >> 5) & 1) != 0) + pub fn dtogcdti2en(&self) -> Dtogcdti2enR { + Dtogcdti2enR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc0en(&mut self) -> DTOGCC0EN_W<0> { - DTOGCC0EN_W::new(self) + pub fn dtogcc0en(&mut self) -> Dtogcc0enW { + Dtogcc0enW::new(self, 0) } #[doc = "Bit 1 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc1en(&mut self) -> DTOGCC1EN_W<1> { - DTOGCC1EN_W::new(self) + pub fn dtogcc1en(&mut self) -> Dtogcc1enW { + Dtogcc1enW::new(self, 1) } #[doc = "Bit 2 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc2en(&mut self) -> DTOGCC2EN_W<2> { - DTOGCC2EN_W::new(self) + pub fn dtogcc2en(&mut self) -> Dtogcc2enW { + Dtogcc2enW::new(self, 2) } #[doc = "Bit 3 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti0en(&mut self) -> DTOGCDTI0EN_W<3> { - DTOGCDTI0EN_W::new(self) + pub fn dtogcdti0en(&mut self) -> Dtogcdti0enW { + Dtogcdti0enW::new(self, 3) } #[doc = "Bit 4 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti1en(&mut self) -> DTOGCDTI1EN_W<4> { - DTOGCDTI1EN_W::new(self) + pub fn dtogcdti1en(&mut self) -> Dtogcdti1enW { + Dtogcdti1enW::new(self, 4) } #[doc = "Bit 5 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti2en(&mut self) -> DTOGCDTI2EN_W<5> { - DTOGCDTI2EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtogcdti2en(&mut self) -> Dtogcdti2enW { + Dtogcdti2enW::new(self, 5) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtogen](index.html) module"] -pub struct DTOGEN_SPEC; -impl crate::RegisterSpec for DTOGEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtogen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtogen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtogenSpec; +impl crate::RegisterSpec for DtogenSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtogen::R](R) reader structure"] -impl crate::Readable for DTOGEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtogen::W](W) writer structure"] -impl crate::Writable for DTOGEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtogen::R`](R) reader structure"] +impl crate::Readable for DtogenSpec {} +#[doc = "`write(|w| ..)` method takes [`dtogen::W`](W) writer structure"] +impl crate::Writable for DtogenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTOGEN to value 0"] -impl crate::Resettable for DTOGEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtogenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dttimecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dttimecfg.rs index 63e4c73..9577f86 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dttimecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/dttimecfg.rs @@ -1,110 +1,70 @@ #[doc = "Register `DTTIMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTTIMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTPRESC` reader - DTI Prescaler Setting"] -pub type DTPRESC_R = crate::FieldReader; +pub type DtprescR = crate::FieldReader; #[doc = "Field `DTPRESC` writer - DTI Prescaler Setting"] -pub type DTPRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u16, u16, 10, O>; +pub type DtprescW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `DTRISET` reader - DTI Rise-time"] -pub type DTRISET_R = crate::FieldReader; +pub type DtrisetR = crate::FieldReader; #[doc = "Field `DTRISET` writer - DTI Rise-time"] -pub type DTRISET_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u8, u8, 6, O>; +pub type DtrisetW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `DTFALLT` reader - DTI Fall-time"] -pub type DTFALLT_R = crate::FieldReader; +pub type DtfalltR = crate::FieldReader; #[doc = "Field `DTFALLT` writer - DTI Fall-time"] -pub type DTFALLT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u8, u8, 6, O>; +pub type DtfalltW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:9 - DTI Prescaler Setting"] #[inline(always)] - pub fn dtpresc(&self) -> DTPRESC_R { - DTPRESC_R::new((self.bits & 0x03ff) as u16) + pub fn dtpresc(&self) -> DtprescR { + DtprescR::new((self.bits & 0x03ff) as u16) } #[doc = "Bits 10:15 - DTI Rise-time"] #[inline(always)] - pub fn dtriset(&self) -> DTRISET_R { - DTRISET_R::new(((self.bits >> 10) & 0x3f) as u8) + pub fn dtriset(&self) -> DtrisetR { + DtrisetR::new(((self.bits >> 10) & 0x3f) as u8) } #[doc = "Bits 16:21 - DTI Fall-time"] #[inline(always)] - pub fn dtfallt(&self) -> DTFALLT_R { - DTFALLT_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn dtfallt(&self) -> DtfalltR { + DtfalltR::new(((self.bits >> 16) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:9 - DTI Prescaler Setting"] #[inline(always)] #[must_use] - pub fn dtpresc(&mut self) -> DTPRESC_W<0> { - DTPRESC_W::new(self) + pub fn dtpresc(&mut self) -> DtprescW { + DtprescW::new(self, 0) } #[doc = "Bits 10:15 - DTI Rise-time"] #[inline(always)] #[must_use] - pub fn dtriset(&mut self) -> DTRISET_W<10> { - DTRISET_W::new(self) + pub fn dtriset(&mut self) -> DtrisetW { + DtrisetW::new(self, 10) } #[doc = "Bits 16:21 - DTI Fall-time"] #[inline(always)] #[must_use] - pub fn dtfallt(&mut self) -> DTFALLT_W<16> { - DTFALLT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtfallt(&mut self) -> DtfalltW { + DtfalltW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dttimecfg](index.html) module"] -pub struct DTTIMECFG_SPEC; -impl crate::RegisterSpec for DTTIMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dttimecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dttimecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DttimecfgSpec; +impl crate::RegisterSpec for DttimecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dttimecfg::R](R) reader structure"] -impl crate::Readable for DTTIMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dttimecfg::W](W) writer structure"] -impl crate::Writable for DTTIMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dttimecfg::R`](R) reader structure"] +impl crate::Readable for DttimecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dttimecfg::W`](W) writer structure"] +impl crate::Writable for DttimecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTTIMECFG to value 0"] -impl crate::Resettable for DTTIMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DttimecfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/en.rs index 9392483..303507b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Timer Module Enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Timer Module Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Timer Module Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Timer Module Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/ien.rs index 66588d7..73273ef 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/ien.rs @@ -1,290 +1,250 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OF` reader - Overflow Interrupt Enable"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Enable"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UF` reader - Underflow Interrupt Enable"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Enable"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DIRCHG` reader - Direction Change Detect Interrupt Enable"] -pub type DIRCHG_R = crate::BitReader; +pub type DirchgR = crate::BitReader; #[doc = "Field `DIRCHG` writer - Direction Change Detect Interrupt Enable"] -pub type DIRCHG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type DirchgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC0` reader - CC0 Interrupt Enable"] -pub type CC0_R = crate::BitReader; +pub type Cc0R = crate::BitReader; #[doc = "Field `CC0` writer - CC0 Interrupt Enable"] -pub type CC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1` reader - CC1 Interrupt Enable"] -pub type CC1_R = crate::BitReader; +pub type Cc1R = crate::BitReader; #[doc = "Field `CC1` writer - CC1 Interrupt Enable"] -pub type CC1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2` reader - CC2 Interrupt Enable"] -pub type CC2_R = crate::BitReader; +pub type Cc2R = crate::BitReader; #[doc = "Field `CC2` writer - CC2 Interrupt Enable"] -pub type CC2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL0` reader - ICFWLFULL0 Interrupt Enable"] -pub type ICFWLFULL0_R = crate::BitReader; +pub type Icfwlfull0R = crate::BitReader; #[doc = "Field `ICFWLFULL0` writer - ICFWLFULL0 Interrupt Enable"] -pub type ICFWLFULL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL1` reader - ICFWLFULL1 Interrupt Enable"] -pub type ICFWLFULL1_R = crate::BitReader; +pub type Icfwlfull1R = crate::BitReader; #[doc = "Field `ICFWLFULL1` writer - ICFWLFULL1 Interrupt Enable"] -pub type ICFWLFULL1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL2` reader - ICFWLFULL2 Interrupt Enable"] -pub type ICFWLFULL2_R = crate::BitReader; +pub type Icfwlfull2R = crate::BitReader; #[doc = "Field `ICFWLFULL2` writer - ICFWLFULL2 Interrupt Enable"] -pub type ICFWLFULL2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF0` reader - ICFOF0 Interrupt Enable"] -pub type ICFOF0_R = crate::BitReader; +pub type Icfof0R = crate::BitReader; #[doc = "Field `ICFOF0` writer - ICFOF0 Interrupt Enable"] -pub type ICFOF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF1` reader - ICFOF1 Interrupt Enable"] -pub type ICFOF1_R = crate::BitReader; +pub type Icfof1R = crate::BitReader; #[doc = "Field `ICFOF1` writer - ICFOF1 Interrupt Enable"] -pub type ICFOF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF2` reader - ICFOF2 Interrupt Enable"] -pub type ICFOF2_R = crate::BitReader; +pub type Icfof2R = crate::BitReader; #[doc = "Field `ICFOF2` writer - ICFOF2 Interrupt Enable"] -pub type ICFOF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF0` reader - ICFUF0 Interrupt Enable"] -pub type ICFUF0_R = crate::BitReader; +pub type Icfuf0R = crate::BitReader; #[doc = "Field `ICFUF0` writer - ICFUF0 Interrupt Enable"] -pub type ICFUF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF1` reader - ICFUF1 Interrupt Enable"] -pub type ICFUF1_R = crate::BitReader; +pub type Icfuf1R = crate::BitReader; #[doc = "Field `ICFUF1` writer - ICFUF1 Interrupt Enable"] -pub type ICFUF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF2` reader - ICFUF2 Interrupt Enable"] -pub type ICFUF2_R = crate::BitReader; +pub type Icfuf2R = crate::BitReader; #[doc = "Field `ICFUF2` writer - ICFUF2 Interrupt Enable"] -pub type ICFUF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Enable"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new((self.bits & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Underflow Interrupt Enable"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new(((self.bits >> 1) & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Direction Change Detect Interrupt Enable"] #[inline(always)] - pub fn dirchg(&self) -> DIRCHG_R { - DIRCHG_R::new(((self.bits >> 2) & 1) != 0) + pub fn dirchg(&self) -> DirchgR { + DirchgR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - CC0 Interrupt Enable"] #[inline(always)] - pub fn cc0(&self) -> CC0_R { - CC0_R::new(((self.bits >> 4) & 1) != 0) + pub fn cc0(&self) -> Cc0R { + Cc0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CC1 Interrupt Enable"] #[inline(always)] - pub fn cc1(&self) -> CC1_R { - CC1_R::new(((self.bits >> 5) & 1) != 0) + pub fn cc1(&self) -> Cc1R { + Cc1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - CC2 Interrupt Enable"] #[inline(always)] - pub fn cc2(&self) -> CC2_R { - CC2_R::new(((self.bits >> 6) & 1) != 0) + pub fn cc2(&self) -> Cc2R { + Cc2R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 16 - ICFWLFULL0 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull0(&self) -> ICFWLFULL0_R { - ICFWLFULL0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfwlfull0(&self) -> Icfwlfull0R { + Icfwlfull0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - ICFWLFULL1 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull1(&self) -> ICFWLFULL1_R { - ICFWLFULL1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfwlfull1(&self) -> Icfwlfull1R { + Icfwlfull1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - ICFWLFULL2 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull2(&self) -> ICFWLFULL2_R { - ICFWLFULL2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfwlfull2(&self) -> Icfwlfull2R { + Icfwlfull2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - ICFOF0 Interrupt Enable"] #[inline(always)] - pub fn icfof0(&self) -> ICFOF0_R { - ICFOF0_R::new(((self.bits >> 20) & 1) != 0) + pub fn icfof0(&self) -> Icfof0R { + Icfof0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - ICFOF1 Interrupt Enable"] #[inline(always)] - pub fn icfof1(&self) -> ICFOF1_R { - ICFOF1_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfof1(&self) -> Icfof1R { + Icfof1R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - ICFOF2 Interrupt Enable"] #[inline(always)] - pub fn icfof2(&self) -> ICFOF2_R { - ICFOF2_R::new(((self.bits >> 22) & 1) != 0) + pub fn icfof2(&self) -> Icfof2R { + Icfof2R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 24 - ICFUF0 Interrupt Enable"] #[inline(always)] - pub fn icfuf0(&self) -> ICFUF0_R { - ICFUF0_R::new(((self.bits >> 24) & 1) != 0) + pub fn icfuf0(&self) -> Icfuf0R { + Icfuf0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - ICFUF1 Interrupt Enable"] #[inline(always)] - pub fn icfuf1(&self) -> ICFUF1_R { - ICFUF1_R::new(((self.bits >> 25) & 1) != 0) + pub fn icfuf1(&self) -> Icfuf1R { + Icfuf1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - ICFUF2 Interrupt Enable"] #[inline(always)] - pub fn icfuf2(&self) -> ICFUF2_R { - ICFUF2_R::new(((self.bits >> 26) & 1) != 0) + pub fn icfuf2(&self) -> Icfuf2R { + Icfuf2R::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<0> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 0) } #[doc = "Bit 1 - Underflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<1> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 1) } #[doc = "Bit 2 - Direction Change Detect Interrupt Enable"] #[inline(always)] #[must_use] - pub fn dirchg(&mut self) -> DIRCHG_W<2> { - DIRCHG_W::new(self) + pub fn dirchg(&mut self) -> DirchgW { + DirchgW::new(self, 2) } #[doc = "Bit 4 - CC0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc0(&mut self) -> CC0_W<4> { - CC0_W::new(self) + pub fn cc0(&mut self) -> Cc0W { + Cc0W::new(self, 4) } #[doc = "Bit 5 - CC1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc1(&mut self) -> CC1_W<5> { - CC1_W::new(self) + pub fn cc1(&mut self) -> Cc1W { + Cc1W::new(self, 5) } #[doc = "Bit 6 - CC2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc2(&mut self) -> CC2_W<6> { - CC2_W::new(self) + pub fn cc2(&mut self) -> Cc2W { + Cc2W::new(self, 6) } #[doc = "Bit 16 - ICFWLFULL0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull0(&mut self) -> ICFWLFULL0_W<16> { - ICFWLFULL0_W::new(self) + pub fn icfwlfull0(&mut self) -> Icfwlfull0W { + Icfwlfull0W::new(self, 16) } #[doc = "Bit 17 - ICFWLFULL1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull1(&mut self) -> ICFWLFULL1_W<17> { - ICFWLFULL1_W::new(self) + pub fn icfwlfull1(&mut self) -> Icfwlfull1W { + Icfwlfull1W::new(self, 17) } #[doc = "Bit 18 - ICFWLFULL2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull2(&mut self) -> ICFWLFULL2_W<18> { - ICFWLFULL2_W::new(self) + pub fn icfwlfull2(&mut self) -> Icfwlfull2W { + Icfwlfull2W::new(self, 18) } #[doc = "Bit 20 - ICFOF0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof0(&mut self) -> ICFOF0_W<20> { - ICFOF0_W::new(self) + pub fn icfof0(&mut self) -> Icfof0W { + Icfof0W::new(self, 20) } #[doc = "Bit 21 - ICFOF1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof1(&mut self) -> ICFOF1_W<21> { - ICFOF1_W::new(self) + pub fn icfof1(&mut self) -> Icfof1W { + Icfof1W::new(self, 21) } #[doc = "Bit 22 - ICFOF2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof2(&mut self) -> ICFOF2_W<22> { - ICFOF2_W::new(self) + pub fn icfof2(&mut self) -> Icfof2W { + Icfof2W::new(self, 22) } #[doc = "Bit 24 - ICFUF0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf0(&mut self) -> ICFUF0_W<24> { - ICFUF0_W::new(self) + pub fn icfuf0(&mut self) -> Icfuf0W { + Icfuf0W::new(self, 24) } #[doc = "Bit 25 - ICFUF1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf1(&mut self) -> ICFUF1_W<25> { - ICFUF1_W::new(self) + pub fn icfuf1(&mut self) -> Icfuf1W { + Icfuf1W::new(self, 25) } #[doc = "Bit 26 - ICFUF2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf2(&mut self) -> ICFUF2_W<26> { - ICFUF2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfuf2(&mut self) -> Icfuf2W { + Icfuf2W::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/if_.rs index edde0f3..fad1cd1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/if_.rs @@ -1,290 +1,250 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OF` reader - Overflow Interrupt Flag"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Flag"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UF` reader - Underflow Interrupt Flag"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Flag"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DIRCHG` reader - Direction Change Detect Interrupt Flag"] -pub type DIRCHG_R = crate::BitReader; +pub type DirchgR = crate::BitReader; #[doc = "Field `DIRCHG` writer - Direction Change Detect Interrupt Flag"] -pub type DIRCHG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type DirchgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC0` reader - Capture Compare Channel 0 Interrupt Flag"] -pub type CC0_R = crate::BitReader; +pub type Cc0R = crate::BitReader; #[doc = "Field `CC0` writer - Capture Compare Channel 0 Interrupt Flag"] -pub type CC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1` reader - Capture Compare Channel 1 Interrupt Flag"] -pub type CC1_R = crate::BitReader; +pub type Cc1R = crate::BitReader; #[doc = "Field `CC1` writer - Capture Compare Channel 1 Interrupt Flag"] -pub type CC1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2` reader - Capture Compare Channel 2 Interrupt Flag"] -pub type CC2_R = crate::BitReader; +pub type Cc2R = crate::BitReader; #[doc = "Field `CC2` writer - Capture Compare Channel 2 Interrupt Flag"] -pub type CC2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL0` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL0_R = crate::BitReader; +pub type Icfwlfull0R = crate::BitReader; #[doc = "Field `ICFWLFULL0` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL1` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL1_R = crate::BitReader; +pub type Icfwlfull1R = crate::BitReader; #[doc = "Field `ICFWLFULL1` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL2` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL2_R = crate::BitReader; +pub type Icfwlfull2R = crate::BitReader; #[doc = "Field `ICFWLFULL2` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF0` reader - Input Capture FIFO overflow"] -pub type ICFOF0_R = crate::BitReader; +pub type Icfof0R = crate::BitReader; #[doc = "Field `ICFOF0` writer - Input Capture FIFO overflow"] -pub type ICFOF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF1` reader - Input Capture FIFO overflow"] -pub type ICFOF1_R = crate::BitReader; +pub type Icfof1R = crate::BitReader; #[doc = "Field `ICFOF1` writer - Input Capture FIFO overflow"] -pub type ICFOF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF2` reader - Input Capture FIFO overflow"] -pub type ICFOF2_R = crate::BitReader; +pub type Icfof2R = crate::BitReader; #[doc = "Field `ICFOF2` writer - Input Capture FIFO overflow"] -pub type ICFOF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF0` reader - Input capture FIFO underflow"] -pub type ICFUF0_R = crate::BitReader; +pub type Icfuf0R = crate::BitReader; #[doc = "Field `ICFUF0` writer - Input capture FIFO underflow"] -pub type ICFUF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF1` reader - Input capture FIFO underflow"] -pub type ICFUF1_R = crate::BitReader; +pub type Icfuf1R = crate::BitReader; #[doc = "Field `ICFUF1` writer - Input capture FIFO underflow"] -pub type ICFUF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF2` reader - Input capture FIFO underflow"] -pub type ICFUF2_R = crate::BitReader; +pub type Icfuf2R = crate::BitReader; #[doc = "Field `ICFUF2` writer - Input capture FIFO underflow"] -pub type ICFUF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new((self.bits & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Underflow Interrupt Flag"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new(((self.bits >> 1) & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] - pub fn dirchg(&self) -> DIRCHG_R { - DIRCHG_R::new(((self.bits >> 2) & 1) != 0) + pub fn dirchg(&self) -> DirchgR { + DirchgR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Capture Compare Channel 0 Interrupt Flag"] #[inline(always)] - pub fn cc0(&self) -> CC0_R { - CC0_R::new(((self.bits >> 4) & 1) != 0) + pub fn cc0(&self) -> Cc0R { + Cc0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Capture Compare Channel 1 Interrupt Flag"] #[inline(always)] - pub fn cc1(&self) -> CC1_R { - CC1_R::new(((self.bits >> 5) & 1) != 0) + pub fn cc1(&self) -> Cc1R { + Cc1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Capture Compare Channel 2 Interrupt Flag"] #[inline(always)] - pub fn cc2(&self) -> CC2_R { - CC2_R::new(((self.bits >> 6) & 1) != 0) + pub fn cc2(&self) -> Cc2R { + Cc2R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 16 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull0(&self) -> ICFWLFULL0_R { - ICFWLFULL0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfwlfull0(&self) -> Icfwlfull0R { + Icfwlfull0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull1(&self) -> ICFWLFULL1_R { - ICFWLFULL1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfwlfull1(&self) -> Icfwlfull1R { + Icfwlfull1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull2(&self) -> ICFWLFULL2_R { - ICFWLFULL2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfwlfull2(&self) -> Icfwlfull2R { + Icfwlfull2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof0(&self) -> ICFOF0_R { - ICFOF0_R::new(((self.bits >> 20) & 1) != 0) + pub fn icfof0(&self) -> Icfof0R { + Icfof0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof1(&self) -> ICFOF1_R { - ICFOF1_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfof1(&self) -> Icfof1R { + Icfof1R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof2(&self) -> ICFOF2_R { - ICFOF2_R::new(((self.bits >> 22) & 1) != 0) + pub fn icfof2(&self) -> Icfof2R { + Icfof2R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 24 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf0(&self) -> ICFUF0_R { - ICFUF0_R::new(((self.bits >> 24) & 1) != 0) + pub fn icfuf0(&self) -> Icfuf0R { + Icfuf0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf1(&self) -> ICFUF1_R { - ICFUF1_R::new(((self.bits >> 25) & 1) != 0) + pub fn icfuf1(&self) -> Icfuf1R { + Icfuf1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf2(&self) -> ICFUF2_R { - ICFUF2_R::new(((self.bits >> 26) & 1) != 0) + pub fn icfuf2(&self) -> Icfuf2R { + Icfuf2R::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<0> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 0) } #[doc = "Bit 1 - Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<1> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 1) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] #[must_use] - pub fn dirchg(&mut self) -> DIRCHG_W<2> { - DIRCHG_W::new(self) + pub fn dirchg(&mut self) -> DirchgW { + DirchgW::new(self, 2) } #[doc = "Bit 4 - Capture Compare Channel 0 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc0(&mut self) -> CC0_W<4> { - CC0_W::new(self) + pub fn cc0(&mut self) -> Cc0W { + Cc0W::new(self, 4) } #[doc = "Bit 5 - Capture Compare Channel 1 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc1(&mut self) -> CC1_W<5> { - CC1_W::new(self) + pub fn cc1(&mut self) -> Cc1W { + Cc1W::new(self, 5) } #[doc = "Bit 6 - Capture Compare Channel 2 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc2(&mut self) -> CC2_W<6> { - CC2_W::new(self) + pub fn cc2(&mut self) -> Cc2W { + Cc2W::new(self, 6) } #[doc = "Bit 16 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull0(&mut self) -> ICFWLFULL0_W<16> { - ICFWLFULL0_W::new(self) + pub fn icfwlfull0(&mut self) -> Icfwlfull0W { + Icfwlfull0W::new(self, 16) } #[doc = "Bit 17 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull1(&mut self) -> ICFWLFULL1_W<17> { - ICFWLFULL1_W::new(self) + pub fn icfwlfull1(&mut self) -> Icfwlfull1W { + Icfwlfull1W::new(self, 17) } #[doc = "Bit 18 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull2(&mut self) -> ICFWLFULL2_W<18> { - ICFWLFULL2_W::new(self) + pub fn icfwlfull2(&mut self) -> Icfwlfull2W { + Icfwlfull2W::new(self, 18) } #[doc = "Bit 20 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof0(&mut self) -> ICFOF0_W<20> { - ICFOF0_W::new(self) + pub fn icfof0(&mut self) -> Icfof0W { + Icfof0W::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof1(&mut self) -> ICFOF1_W<21> { - ICFOF1_W::new(self) + pub fn icfof1(&mut self) -> Icfof1W { + Icfof1W::new(self, 21) } #[doc = "Bit 22 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof2(&mut self) -> ICFOF2_W<22> { - ICFOF2_W::new(self) + pub fn icfof2(&mut self) -> Icfof2W { + Icfof2W::new(self, 22) } #[doc = "Bit 24 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf0(&mut self) -> ICFUF0_W<24> { - ICFUF0_W::new(self) + pub fn icfuf0(&mut self) -> Icfuf0W { + Icfuf0W::new(self, 24) } #[doc = "Bit 25 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf1(&mut self) -> ICFUF1_W<25> { - ICFUF1_W::new(self) + pub fn icfuf1(&mut self) -> Icfuf1W { + Icfuf1W::new(self, 25) } #[doc = "Bit 26 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf2(&mut self) -> ICFUF2_W<26> { - ICFUF2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfuf2(&mut self) -> Icfuf2W { + Icfuf2W::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/ipversion.rs index fd8f758..0b161f8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/lock.rs index 4d444ca..4d6d1fe 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Timer Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "52864: Write to unlock TIMER registers"] - UNLOCK = 52864, + Unlock = 52864, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Timer Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unlock TIMER registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Timer Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/status.rs index 1a2964d..25d646e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/status.rs @@ -1,339 +1,324 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RUNNING` reader - Running"] -pub type RUNNING_R = crate::BitReader; -#[doc = "Field `DIR` reader - Direction"] -pub type DIR_R = crate::BitReader; +pub type RunningR = crate::BitReader; #[doc = "Direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DIR_A { +pub enum Dir { #[doc = "0: Counting up"] - UP = 0, + Up = 0, #[doc = "1: Counting down"] - DOWN = 1, + Down = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DIR_A) -> Self { + fn from(variant: Dir) -> Self { variant as u8 != 0 } } -impl DIR_R { +#[doc = "Field `DIR` reader - Direction"] +pub type DirR = crate::BitReader; +impl DirR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DIR_A { + pub const fn variant(&self) -> Dir { match self.bits { - false => DIR_A::UP, - true => DIR_A::DOWN, + false => Dir::Up, + true => Dir::Down, } } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Counting up"] #[inline(always)] pub fn is_up(&self) -> bool { - *self == DIR_A::UP + *self == Dir::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Counting down"] #[inline(always)] pub fn is_down(&self) -> bool { - *self == DIR_A::DOWN + *self == Dir::Down } } #[doc = "Field `TOPBV` reader - TOP Buffer Valid"] -pub type TOPBV_R = crate::BitReader; -#[doc = "Field `TIMERLOCKSTATUS` reader - Timer lock status"] -pub type TIMERLOCKSTATUS_R = crate::BitReader; +pub type TopbvR = crate::BitReader; #[doc = "Timer lock status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TIMERLOCKSTATUS_A { +pub enum Timerlockstatus { #[doc = "0: TIMER registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: TIMER registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TIMERLOCKSTATUS_A) -> Self { + fn from(variant: Timerlockstatus) -> Self { variant as u8 != 0 } } -impl TIMERLOCKSTATUS_R { +#[doc = "Field `TIMERLOCKSTATUS` reader - Timer lock status"] +pub type TimerlockstatusR = crate::BitReader; +impl TimerlockstatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TIMERLOCKSTATUS_A { + pub const fn variant(&self) -> Timerlockstatus { match self.bits { - false => TIMERLOCKSTATUS_A::UNLOCKED, - true => TIMERLOCKSTATUS_A::LOCKED, + false => Timerlockstatus::Unlocked, + true => Timerlockstatus::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "TIMER registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == TIMERLOCKSTATUS_A::UNLOCKED + *self == Timerlockstatus::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "TIMER registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == TIMERLOCKSTATUS_A::LOCKED + *self == Timerlockstatus::Locked } } -#[doc = "Field `DTILOCKSTATUS` reader - DTI lock status"] -pub type DTILOCKSTATUS_R = crate::BitReader; #[doc = "DTI lock status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DTILOCKSTATUS_A { +pub enum Dtilockstatus { #[doc = "0: DTI registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: DTI registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DTILOCKSTATUS_A) -> Self { + fn from(variant: Dtilockstatus) -> Self { variant as u8 != 0 } } -impl DTILOCKSTATUS_R { +#[doc = "Field `DTILOCKSTATUS` reader - DTI lock status"] +pub type DtilockstatusR = crate::BitReader; +impl DtilockstatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTILOCKSTATUS_A { + pub const fn variant(&self) -> Dtilockstatus { match self.bits { - false => DTILOCKSTATUS_A::UNLOCKED, - true => DTILOCKSTATUS_A::LOCKED, + false => Dtilockstatus::Unlocked, + true => Dtilockstatus::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "DTI registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == DTILOCKSTATUS_A::UNLOCKED + *self == Dtilockstatus::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "DTI registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == DTILOCKSTATUS_A::LOCKED + *self == Dtilockstatus::Locked } } #[doc = "Field `SYNCBUSY` reader - Sync Busy"] -pub type SYNCBUSY_R = crate::BitReader; +pub type SyncbusyR = crate::BitReader; #[doc = "Field `OCBV0` reader - Output Compare Buffer Valid"] -pub type OCBV0_R = crate::BitReader; +pub type Ocbv0R = crate::BitReader; #[doc = "Field `OCBV1` reader - Output Compare Buffer Valid"] -pub type OCBV1_R = crate::BitReader; +pub type Ocbv1R = crate::BitReader; #[doc = "Field `OCBV2` reader - Output Compare Buffer Valid"] -pub type OCBV2_R = crate::BitReader; +pub type Ocbv2R = crate::BitReader; #[doc = "Field `ICFEMPTY0` reader - Input capture fifo empty"] -pub type ICFEMPTY0_R = crate::BitReader; +pub type Icfempty0R = crate::BitReader; #[doc = "Field `ICFEMPTY1` reader - Input capture fifo empty"] -pub type ICFEMPTY1_R = crate::BitReader; +pub type Icfempty1R = crate::BitReader; #[doc = "Field `ICFEMPTY2` reader - Input capture fifo empty"] -pub type ICFEMPTY2_R = crate::BitReader; -#[doc = "Field `CCPOL0` reader - Compare/Capture Polarity"] -pub type CCPOL0_R = crate::BitReader; +pub type Icfempty2R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL0_A { +pub enum Ccpol0 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL0_A) -> Self { + fn from(variant: Ccpol0) -> Self { variant as u8 != 0 } } -impl CCPOL0_R { +#[doc = "Field `CCPOL0` reader - Compare/Capture Polarity"] +pub type Ccpol0R = crate::BitReader; +impl Ccpol0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL0_A { + pub const fn variant(&self) -> Ccpol0 { match self.bits { - false => CCPOL0_A::LOWRISE, - true => CCPOL0_A::HIGHFALL, + false => Ccpol0::Lowrise, + true => Ccpol0::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL0_A::LOWRISE + *self == Ccpol0::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL0_A::HIGHFALL + *self == Ccpol0::Highfall } } -#[doc = "Field `CCPOL1` reader - Compare/Capture Polarity"] -pub type CCPOL1_R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL1_A { +pub enum Ccpol1 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL1_A) -> Self { + fn from(variant: Ccpol1) -> Self { variant as u8 != 0 } } -impl CCPOL1_R { +#[doc = "Field `CCPOL1` reader - Compare/Capture Polarity"] +pub type Ccpol1R = crate::BitReader; +impl Ccpol1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL1_A { + pub const fn variant(&self) -> Ccpol1 { match self.bits { - false => CCPOL1_A::LOWRISE, - true => CCPOL1_A::HIGHFALL, + false => Ccpol1::Lowrise, + true => Ccpol1::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL1_A::LOWRISE + *self == Ccpol1::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL1_A::HIGHFALL + *self == Ccpol1::Highfall } } -#[doc = "Field `CCPOL2` reader - Compare/Capture Polarity"] -pub type CCPOL2_R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL2_A { +pub enum Ccpol2 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL2_A) -> Self { + fn from(variant: Ccpol2) -> Self { variant as u8 != 0 } } -impl CCPOL2_R { +#[doc = "Field `CCPOL2` reader - Compare/Capture Polarity"] +pub type Ccpol2R = crate::BitReader; +impl Ccpol2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL2_A { + pub const fn variant(&self) -> Ccpol2 { match self.bits { - false => CCPOL2_A::LOWRISE, - true => CCPOL2_A::HIGHFALL, + false => Ccpol2::Lowrise, + true => Ccpol2::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL2_A::LOWRISE + *self == Ccpol2::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL2_A::HIGHFALL + *self == Ccpol2::Highfall } } impl R { #[doc = "Bit 0 - Running"] #[inline(always)] - pub fn running(&self) -> RUNNING_R { - RUNNING_R::new((self.bits & 1) != 0) + pub fn running(&self) -> RunningR { + RunningR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Direction"] #[inline(always)] - pub fn dir(&self) -> DIR_R { - DIR_R::new(((self.bits >> 1) & 1) != 0) + pub fn dir(&self) -> DirR { + DirR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - TOP Buffer Valid"] #[inline(always)] - pub fn topbv(&self) -> TOPBV_R { - TOPBV_R::new(((self.bits >> 2) & 1) != 0) + pub fn topbv(&self) -> TopbvR { + TopbvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Timer lock status"] #[inline(always)] - pub fn timerlockstatus(&self) -> TIMERLOCKSTATUS_R { - TIMERLOCKSTATUS_R::new(((self.bits >> 4) & 1) != 0) + pub fn timerlockstatus(&self) -> TimerlockstatusR { + TimerlockstatusR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DTI lock status"] #[inline(always)] - pub fn dtilockstatus(&self) -> DTILOCKSTATUS_R { - DTILOCKSTATUS_R::new(((self.bits >> 5) & 1) != 0) + pub fn dtilockstatus(&self) -> DtilockstatusR { + DtilockstatusR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Sync Busy"] #[inline(always)] - pub fn syncbusy(&self) -> SYNCBUSY_R { - SYNCBUSY_R::new(((self.bits >> 6) & 1) != 0) + pub fn syncbusy(&self) -> SyncbusyR { + SyncbusyR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv0(&self) -> OCBV0_R { - OCBV0_R::new(((self.bits >> 8) & 1) != 0) + pub fn ocbv0(&self) -> Ocbv0R { + Ocbv0R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv1(&self) -> OCBV1_R { - OCBV1_R::new(((self.bits >> 9) & 1) != 0) + pub fn ocbv1(&self) -> Ocbv1R { + Ocbv1R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv2(&self) -> OCBV2_R { - OCBV2_R::new(((self.bits >> 10) & 1) != 0) + pub fn ocbv2(&self) -> Ocbv2R { + Ocbv2R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 16 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty0(&self) -> ICFEMPTY0_R { - ICFEMPTY0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfempty0(&self) -> Icfempty0R { + Icfempty0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty1(&self) -> ICFEMPTY1_R { - ICFEMPTY1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfempty1(&self) -> Icfempty1R { + Icfempty1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty2(&self) -> ICFEMPTY2_R { - ICFEMPTY2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfempty2(&self) -> Icfempty2R { + Icfempty2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 24 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol0(&self) -> CCPOL0_R { - CCPOL0_R::new(((self.bits >> 24) & 1) != 0) + pub fn ccpol0(&self) -> Ccpol0R { + Ccpol0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol1(&self) -> CCPOL1_R { - CCPOL1_R::new(((self.bits >> 25) & 1) != 0) + pub fn ccpol1(&self) -> Ccpol1R { + Ccpol1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol2(&self) -> CCPOL2_R { - CCPOL2_R::new(((self.bits >> 26) & 1) != 0) + pub fn ccpol2(&self) -> Ccpol2R { + Ccpol2R::new(((self.bits >> 26) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/top.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/top.rs index 65df306..6799f48 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/top.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/top.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOP` reader - Counter Top Value"] -pub type TOP_R = crate::FieldReader; +pub type TopR = crate::FieldReader; #[doc = "Field `TOP` writer - Counter Top Value"] -pub type TOP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOP_SPEC, u16, u16, 16, O>; +pub type TopW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Top Value"] #[inline(always)] - pub fn top(&self) -> TOP_R { - TOP_R::new((self.bits & 0xffff) as u16) + pub fn top(&self) -> TopR { + TopR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Top Value"] #[inline(always)] #[must_use] - pub fn top(&mut self) -> TOP_W<0> { - TOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn top(&mut self) -> TopW { + TopW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [top](index.html) module"] -pub struct TOP_SPEC; -impl crate::RegisterSpec for TOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopSpec; +impl crate::RegisterSpec for TopSpec { type Ux = u32; } -#[doc = "`read()` method returns [top::R](R) reader structure"] -impl crate::Readable for TOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [top::W](W) writer structure"] -impl crate::Writable for TOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`top::R`](R) reader structure"] +impl crate::Readable for TopSpec {} +#[doc = "`write(|w| ..)` method takes [`top::W`](W) writer structure"] +impl crate::Writable for TopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOP to value 0xffff"] -impl crate::Resettable for TOP_SPEC { - const RESET_VALUE: Self::Ux = 0xffff; +impl crate::Resettable for TopSpec { + const RESET_VALUE: u32 = 0xffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/topb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/topb.rs index 012fd04..e6c7e8c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/topb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_ns/topb.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOPB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOPB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOPB` reader - Counter Top Buffer Register"] -pub type TOPB_R = crate::FieldReader; +pub type TopbR = crate::FieldReader; #[doc = "Field `TOPB` writer - Counter Top Buffer Register"] -pub type TOPB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOPB_SPEC, u16, u16, 16, O>; +pub type TopbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Top Buffer Register"] #[inline(always)] - pub fn topb(&self) -> TOPB_R { - TOPB_R::new((self.bits & 0xffff) as u16) + pub fn topb(&self) -> TopbR { + TopbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Top Buffer Register"] #[inline(always)] #[must_use] - pub fn topb(&mut self) -> TOPB_W<0> { - TOPB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn topb(&mut self) -> TopbW { + TopbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [topb](index.html) module"] -pub struct TOPB_SPEC; -impl crate::RegisterSpec for TOPB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopbSpec; +impl crate::RegisterSpec for TopbSpec { type Ux = u32; } -#[doc = "`read()` method returns [topb::R](R) reader structure"] -impl crate::Readable for TOPB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [topb::W](W) writer structure"] -impl crate::Writable for TOPB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`topb::R`](R) reader structure"] +impl crate::Readable for TopbSpec {} +#[doc = "`write(|w| ..)` method takes [`topb::W`](W) writer structure"] +impl crate::Writable for TopbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOPB to value 0"] -impl crate::Resettable for TOPB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TopbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s.rs index 50b1dd4..e4e8a9b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s.rs @@ -1,240 +1,470 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + cfg: Cfg, + ctrl: Ctrl, + cmd: Cmd, + status: Status, + if_: If, + ien: Ien, + top: Top, + topb: Topb, + cnt: Cnt, + _reserved10: [u8; 0x04], + lock: Lock, + en: En, + _reserved12: [u8; 0x2c], + cc0_cfg: Cc0Cfg, + cc0_ctrl: Cc0Ctrl, + cc0_oc: Cc0Oc, + _reserved15: [u8; 0x04], + cc0_ocb: Cc0Ocb, + cc0_icf: Cc0Icf, + cc0_icof: Cc0Icof, + _reserved18: [u8; 0x04], + cc1_cfg: Cc1Cfg, + cc1_ctrl: Cc1Ctrl, + cc1_oc: Cc1Oc, + _reserved21: [u8; 0x04], + cc1_ocb: Cc1Ocb, + cc1_icf: Cc1Icf, + cc1_icof: Cc1Icof, + _reserved24: [u8; 0x04], + cc2_cfg: Cc2Cfg, + cc2_ctrl: Cc2Ctrl, + cc2_oc: Cc2Oc, + _reserved27: [u8; 0x04], + cc2_ocb: Cc2Ocb, + cc2_icf: Cc2Icf, + cc2_icof: Cc2Icof, + _reserved30: [u8; 0x24], + dtcfg: Dtcfg, + dttimecfg: Dttimecfg, + dtfcfg: Dtfcfg, + dtctrl: Dtctrl, + dtogen: Dtogen, + dtfault: Dtfault, + dtfaultc: Dtfaultc, + dtlock: Dtlock, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x08 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x0c - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x10 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x14 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x18 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x1c - No Description"] - pub top: TOP, + #[inline(always)] + pub const fn top(&self) -> &Top { + &self.top + } #[doc = "0x20 - No Description"] - pub topb: TOPB, + #[inline(always)] + pub const fn topb(&self) -> &Topb { + &self.topb + } #[doc = "0x24 - No Description"] - pub cnt: CNT, - _reserved10: [u8; 0x04], + #[inline(always)] + pub const fn cnt(&self) -> &Cnt { + &self.cnt + } #[doc = "0x2c - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x30 - No Description"] - pub en: EN, - _reserved12: [u8; 0x2c], + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x60 - No Description"] - pub cc0_cfg: CC0_CFG, + #[inline(always)] + pub const fn cc0_cfg(&self) -> &Cc0Cfg { + &self.cc0_cfg + } #[doc = "0x64 - No Description"] - pub cc0_ctrl: CC0_CTRL, + #[inline(always)] + pub const fn cc0_ctrl(&self) -> &Cc0Ctrl { + &self.cc0_ctrl + } #[doc = "0x68 - No Description"] - pub cc0_oc: CC0_OC, - _reserved15: [u8; 0x04], + #[inline(always)] + pub const fn cc0_oc(&self) -> &Cc0Oc { + &self.cc0_oc + } #[doc = "0x70 - No Description"] - pub cc0_ocb: CC0_OCB, + #[inline(always)] + pub const fn cc0_ocb(&self) -> &Cc0Ocb { + &self.cc0_ocb + } #[doc = "0x74 - No Description"] - pub cc0_icf: CC0_ICF, + #[inline(always)] + pub const fn cc0_icf(&self) -> &Cc0Icf { + &self.cc0_icf + } #[doc = "0x78 - No Description"] - pub cc0_icof: CC0_ICOF, - _reserved18: [u8; 0x04], + #[inline(always)] + pub const fn cc0_icof(&self) -> &Cc0Icof { + &self.cc0_icof + } #[doc = "0x80 - No Description"] - pub cc1_cfg: CC1_CFG, + #[inline(always)] + pub const fn cc1_cfg(&self) -> &Cc1Cfg { + &self.cc1_cfg + } #[doc = "0x84 - No Description"] - pub cc1_ctrl: CC1_CTRL, + #[inline(always)] + pub const fn cc1_ctrl(&self) -> &Cc1Ctrl { + &self.cc1_ctrl + } #[doc = "0x88 - No Description"] - pub cc1_oc: CC1_OC, - _reserved21: [u8; 0x04], + #[inline(always)] + pub const fn cc1_oc(&self) -> &Cc1Oc { + &self.cc1_oc + } #[doc = "0x90 - No Description"] - pub cc1_ocb: CC1_OCB, + #[inline(always)] + pub const fn cc1_ocb(&self) -> &Cc1Ocb { + &self.cc1_ocb + } #[doc = "0x94 - No Description"] - pub cc1_icf: CC1_ICF, + #[inline(always)] + pub const fn cc1_icf(&self) -> &Cc1Icf { + &self.cc1_icf + } #[doc = "0x98 - No Description"] - pub cc1_icof: CC1_ICOF, - _reserved24: [u8; 0x04], + #[inline(always)] + pub const fn cc1_icof(&self) -> &Cc1Icof { + &self.cc1_icof + } #[doc = "0xa0 - No Description"] - pub cc2_cfg: CC2_CFG, + #[inline(always)] + pub const fn cc2_cfg(&self) -> &Cc2Cfg { + &self.cc2_cfg + } #[doc = "0xa4 - No Description"] - pub cc2_ctrl: CC2_CTRL, + #[inline(always)] + pub const fn cc2_ctrl(&self) -> &Cc2Ctrl { + &self.cc2_ctrl + } #[doc = "0xa8 - No Description"] - pub cc2_oc: CC2_OC, - _reserved27: [u8; 0x04], + #[inline(always)] + pub const fn cc2_oc(&self) -> &Cc2Oc { + &self.cc2_oc + } #[doc = "0xb0 - No Description"] - pub cc2_ocb: CC2_OCB, + #[inline(always)] + pub const fn cc2_ocb(&self) -> &Cc2Ocb { + &self.cc2_ocb + } #[doc = "0xb4 - No Description"] - pub cc2_icf: CC2_ICF, + #[inline(always)] + pub const fn cc2_icf(&self) -> &Cc2Icf { + &self.cc2_icf + } #[doc = "0xb8 - No Description"] - pub cc2_icof: CC2_ICOF, - _reserved30: [u8; 0x24], + #[inline(always)] + pub const fn cc2_icof(&self) -> &Cc2Icof { + &self.cc2_icof + } #[doc = "0xe0 - No Description"] - pub dtcfg: DTCFG, + #[inline(always)] + pub const fn dtcfg(&self) -> &Dtcfg { + &self.dtcfg + } #[doc = "0xe4 - No Description"] - pub dttimecfg: DTTIMECFG, + #[inline(always)] + pub const fn dttimecfg(&self) -> &Dttimecfg { + &self.dttimecfg + } #[doc = "0xe8 - No Description"] - pub dtfcfg: DTFCFG, + #[inline(always)] + pub const fn dtfcfg(&self) -> &Dtfcfg { + &self.dtfcfg + } #[doc = "0xec - No Description"] - pub dtctrl: DTCTRL, + #[inline(always)] + pub const fn dtctrl(&self) -> &Dtctrl { + &self.dtctrl + } #[doc = "0xf0 - No Description"] - pub dtogen: DTOGEN, + #[inline(always)] + pub const fn dtogen(&self) -> &Dtogen { + &self.dtogen + } #[doc = "0xf4 - No Description"] - pub dtfault: DTFAULT, + #[inline(always)] + pub const fn dtfault(&self) -> &Dtfault { + &self.dtfault + } #[doc = "0xf8 - No Description"] - pub dtfaultc: DTFAULTC, + #[inline(always)] + pub const fn dtfaultc(&self) -> &Dtfaultc { + &self.dtfaultc + } #[doc = "0xfc - No Description"] - pub dtlock: DTLOCK, + #[inline(always)] + pub const fn dtlock(&self) -> &Dtlock { + &self.dtlock + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "TOP (rw) register accessor: an alias for `Reg`"] -pub type TOP = crate::Reg; +#[doc = "TOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@top`] +module"] +#[doc(alias = "TOP")] +pub type Top = crate::Reg; #[doc = "No Description"] pub mod top; -#[doc = "TOPB (rw) register accessor: an alias for `Reg`"] -pub type TOPB = crate::Reg; +#[doc = "TOPB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@topb`] +module"] +#[doc(alias = "TOPB")] +pub type Topb = crate::Reg; #[doc = "No Description"] pub mod topb; -#[doc = "CNT (rw) register accessor: an alias for `Reg`"] -pub type CNT = crate::Reg; +#[doc = "CNT (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnt`] +module"] +#[doc(alias = "CNT")] +pub type Cnt = crate::Reg; #[doc = "No Description"] pub mod cnt; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CC0_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC0_CFG = crate::Reg; +#[doc = "CC0_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_cfg`] +module"] +#[doc(alias = "CC0_CFG")] +pub type Cc0Cfg = crate::Reg; #[doc = "No Description"] pub mod cc0_cfg; -#[doc = "CC0_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC0_CTRL = crate::Reg; +#[doc = "CC0_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_ctrl`] +module"] +#[doc(alias = "CC0_CTRL")] +pub type Cc0Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc0_ctrl; -#[doc = "CC0_OC (rw) register accessor: an alias for `Reg`"] -pub type CC0_OC = crate::Reg; +#[doc = "CC0_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_oc`] +module"] +#[doc(alias = "CC0_OC")] +pub type Cc0Oc = crate::Reg; #[doc = "No Description"] pub mod cc0_oc; -#[doc = "CC0_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC0_OCB = crate::Reg; +#[doc = "CC0_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_ocb`] +module"] +#[doc(alias = "CC0_OCB")] +pub type Cc0Ocb = crate::Reg; #[doc = "No Description"] pub mod cc0_ocb; -#[doc = "CC0_ICF (r) register accessor: an alias for `Reg`"] -pub type CC0_ICF = crate::Reg; +#[doc = "CC0_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_icf`] +module"] +#[doc(alias = "CC0_ICF")] +pub type Cc0Icf = crate::Reg; #[doc = "No Description"] pub mod cc0_icf; -#[doc = "CC0_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC0_ICOF = crate::Reg; +#[doc = "CC0_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_icof`] +module"] +#[doc(alias = "CC0_ICOF")] +pub type Cc0Icof = crate::Reg; #[doc = "No Description"] pub mod cc0_icof; -#[doc = "CC1_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC1_CFG = crate::Reg; +#[doc = "CC1_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_cfg`] +module"] +#[doc(alias = "CC1_CFG")] +pub type Cc1Cfg = crate::Reg; #[doc = "No Description"] pub mod cc1_cfg; -#[doc = "CC1_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC1_CTRL = crate::Reg; +#[doc = "CC1_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_ctrl`] +module"] +#[doc(alias = "CC1_CTRL")] +pub type Cc1Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc1_ctrl; -#[doc = "CC1_OC (rw) register accessor: an alias for `Reg`"] -pub type CC1_OC = crate::Reg; +#[doc = "CC1_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_oc`] +module"] +#[doc(alias = "CC1_OC")] +pub type Cc1Oc = crate::Reg; #[doc = "No Description"] pub mod cc1_oc; -#[doc = "CC1_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC1_OCB = crate::Reg; +#[doc = "CC1_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_ocb`] +module"] +#[doc(alias = "CC1_OCB")] +pub type Cc1Ocb = crate::Reg; #[doc = "No Description"] pub mod cc1_ocb; -#[doc = "CC1_ICF (r) register accessor: an alias for `Reg`"] -pub type CC1_ICF = crate::Reg; +#[doc = "CC1_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_icf`] +module"] +#[doc(alias = "CC1_ICF")] +pub type Cc1Icf = crate::Reg; #[doc = "No Description"] pub mod cc1_icf; -#[doc = "CC1_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC1_ICOF = crate::Reg; +#[doc = "CC1_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_icof`] +module"] +#[doc(alias = "CC1_ICOF")] +pub type Cc1Icof = crate::Reg; #[doc = "No Description"] pub mod cc1_icof; -#[doc = "CC2_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC2_CFG = crate::Reg; +#[doc = "CC2_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_cfg`] +module"] +#[doc(alias = "CC2_CFG")] +pub type Cc2Cfg = crate::Reg; #[doc = "No Description"] pub mod cc2_cfg; -#[doc = "CC2_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC2_CTRL = crate::Reg; +#[doc = "CC2_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_ctrl`] +module"] +#[doc(alias = "CC2_CTRL")] +pub type Cc2Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc2_ctrl; -#[doc = "CC2_OC (rw) register accessor: an alias for `Reg`"] -pub type CC2_OC = crate::Reg; +#[doc = "CC2_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_oc`] +module"] +#[doc(alias = "CC2_OC")] +pub type Cc2Oc = crate::Reg; #[doc = "No Description"] pub mod cc2_oc; -#[doc = "CC2_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC2_OCB = crate::Reg; +#[doc = "CC2_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_ocb`] +module"] +#[doc(alias = "CC2_OCB")] +pub type Cc2Ocb = crate::Reg; #[doc = "No Description"] pub mod cc2_ocb; -#[doc = "CC2_ICF (r) register accessor: an alias for `Reg`"] -pub type CC2_ICF = crate::Reg; +#[doc = "CC2_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_icf`] +module"] +#[doc(alias = "CC2_ICF")] +pub type Cc2Icf = crate::Reg; #[doc = "No Description"] pub mod cc2_icf; -#[doc = "CC2_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC2_ICOF = crate::Reg; +#[doc = "CC2_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_icof`] +module"] +#[doc(alias = "CC2_ICOF")] +pub type Cc2Icof = crate::Reg; #[doc = "No Description"] pub mod cc2_icof; -#[doc = "DTCFG (rw) register accessor: an alias for `Reg`"] -pub type DTCFG = crate::Reg; +#[doc = "DTCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtcfg`] +module"] +#[doc(alias = "DTCFG")] +pub type Dtcfg = crate::Reg; #[doc = "No Description"] pub mod dtcfg; -#[doc = "DTTIMECFG (rw) register accessor: an alias for `Reg`"] -pub type DTTIMECFG = crate::Reg; +#[doc = "DTTIMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dttimecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dttimecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dttimecfg`] +module"] +#[doc(alias = "DTTIMECFG")] +pub type Dttimecfg = crate::Reg; #[doc = "No Description"] pub mod dttimecfg; -#[doc = "DTFCFG (rw) register accessor: an alias for `Reg`"] -pub type DTFCFG = crate::Reg; +#[doc = "DTFCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfcfg`] +module"] +#[doc(alias = "DTFCFG")] +pub type Dtfcfg = crate::Reg; #[doc = "No Description"] pub mod dtfcfg; -#[doc = "DTCTRL (rw) register accessor: an alias for `Reg`"] -pub type DTCTRL = crate::Reg; +#[doc = "DTCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtctrl`] +module"] +#[doc(alias = "DTCTRL")] +pub type Dtctrl = crate::Reg; #[doc = "No Description"] pub mod dtctrl; -#[doc = "DTOGEN (rw) register accessor: an alias for `Reg`"] -pub type DTOGEN = crate::Reg; +#[doc = "DTOGEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtogen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtogen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtogen`] +module"] +#[doc(alias = "DTOGEN")] +pub type Dtogen = crate::Reg; #[doc = "No Description"] pub mod dtogen; -#[doc = "DTFAULT (r) register accessor: an alias for `Reg`"] -pub type DTFAULT = crate::Reg; +#[doc = "DTFAULT (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfault::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfault`] +module"] +#[doc(alias = "DTFAULT")] +pub type Dtfault = crate::Reg; #[doc = "No Description"] pub mod dtfault; -#[doc = "DTFAULTC (w) register accessor: an alias for `Reg`"] -pub type DTFAULTC = crate::Reg; +#[doc = "DTFAULTC (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfaultc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfaultc`] +module"] +#[doc(alias = "DTFAULTC")] +pub type Dtfaultc = crate::Reg; #[doc = "No Description"] pub mod dtfaultc; -#[doc = "DTLOCK (w) register accessor: an alias for `Reg`"] -pub type DTLOCK = crate::Reg; +#[doc = "DTLOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtlock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtlock`] +module"] +#[doc(alias = "DTLOCK")] +pub type Dtlock = crate::Reg; #[doc = "No Description"] pub mod dtlock; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc0_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc0_cfg.rs index 547eeb0..b3aac62 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc0_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc0_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC0_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC0_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_cfg](index.html) module"] -pub struct CC0_CFG_SPEC; -impl crate::RegisterSpec for CC0_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0CfgSpec; +impl crate::RegisterSpec for Cc0CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_cfg::R](R) reader structure"] -impl crate::Readable for CC0_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_cfg::W](W) writer structure"] -impl crate::Writable for CC0_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_cfg::R`](R) reader structure"] +impl crate::Readable for Cc0CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_cfg::W`](W) writer structure"] +impl crate::Writable for Cc0CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_CFG to value 0"] -impl crate::Resettable for CC0_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc0_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc0_ctrl.rs index 71b40e4..1b92d0c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc0_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc0_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC0_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_ctrl](index.html) module"] -pub struct CC0_CTRL_SPEC; -impl crate::RegisterSpec for CC0_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0CtrlSpec; +impl crate::RegisterSpec for Cc0CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_ctrl::R](R) reader structure"] -impl crate::Readable for CC0_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_ctrl::W](W) writer structure"] -impl crate::Writable for CC0_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc0CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc0CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_CTRL to value 0"] -impl crate::Resettable for CC0_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc0_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc0_icf.rs index f4a2c64..6afddea 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc0_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc0_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC0_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new((self.bits & 0xffff) as u16) + pub fn icf(&self) -> IcfR { + IcfR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_icf](index.html) module"] -pub struct CC0_ICF_SPEC; -impl crate::RegisterSpec for CC0_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0IcfSpec; +impl crate::RegisterSpec for Cc0IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_icf::R](R) reader structure"] -impl crate::Readable for CC0_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc0_icf::R`](R) reader structure"] +impl crate::Readable for Cc0IcfSpec {} #[doc = "`reset()` method sets CC0_ICF to value 0"] -impl crate::Resettable for CC0_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc0_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc0_icof.rs index 1ea3983..7653eef 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc0_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc0_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC0_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new((self.bits & 0xffff) as u16) + pub fn icof(&self) -> IcofR { + IcofR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_icof](index.html) module"] -pub struct CC0_ICOF_SPEC; -impl crate::RegisterSpec for CC0_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0IcofSpec; +impl crate::RegisterSpec for Cc0IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_icof::R](R) reader structure"] -impl crate::Readable for CC0_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc0_icof::R`](R) reader structure"] +impl crate::Readable for Cc0IcofSpec {} #[doc = "`reset()` method sets CC0_ICOF to value 0"] -impl crate::Resettable for CC0_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc0_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc0_oc.rs index 97be8b2..c063d52 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc0_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc0_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC0_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC0_OC_SPEC, u16, u16, 16, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new((self.bits & 0xffff) as u16) + pub fn oc(&self) -> OcR { + OcR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_oc](index.html) module"] -pub struct CC0_OC_SPEC; -impl crate::RegisterSpec for CC0_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0OcSpec; +impl crate::RegisterSpec for Cc0OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_oc::R](R) reader structure"] -impl crate::Readable for CC0_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_oc::W](W) writer structure"] -impl crate::Writable for CC0_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_oc::R`](R) reader structure"] +impl crate::Readable for Cc0OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_oc::W`](W) writer structure"] +impl crate::Writable for Cc0OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_OC to value 0"] -impl crate::Resettable for CC0_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc0_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc0_ocb.rs index af4e401..5924ded 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc0_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc0_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC0_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC0_OCB_SPEC, u16, u16, 16, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new((self.bits & 0xffff) as u16) + pub fn ocb(&self) -> OcbR { + OcbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_ocb](index.html) module"] -pub struct CC0_OCB_SPEC; -impl crate::RegisterSpec for CC0_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0OcbSpec; +impl crate::RegisterSpec for Cc0OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_ocb::R](R) reader structure"] -impl crate::Readable for CC0_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_ocb::W](W) writer structure"] -impl crate::Writable for CC0_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_ocb::R`](R) reader structure"] +impl crate::Readable for Cc0OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_ocb::W`](W) writer structure"] +impl crate::Writable for Cc0OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_OCB to value 0"] -impl crate::Resettable for CC0_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc1_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc1_cfg.rs index b3424c2..2243932 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc1_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc1_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC1_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC1_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_cfg](index.html) module"] -pub struct CC1_CFG_SPEC; -impl crate::RegisterSpec for CC1_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1CfgSpec; +impl crate::RegisterSpec for Cc1CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_cfg::R](R) reader structure"] -impl crate::Readable for CC1_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_cfg::W](W) writer structure"] -impl crate::Writable for CC1_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_cfg::R`](R) reader structure"] +impl crate::Readable for Cc1CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_cfg::W`](W) writer structure"] +impl crate::Writable for Cc1CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_CFG to value 0"] -impl crate::Resettable for CC1_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc1_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc1_ctrl.rs index 38927de..bc41282 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc1_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc1_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC1_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_ctrl](index.html) module"] -pub struct CC1_CTRL_SPEC; -impl crate::RegisterSpec for CC1_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1CtrlSpec; +impl crate::RegisterSpec for Cc1CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_ctrl::R](R) reader structure"] -impl crate::Readable for CC1_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_ctrl::W](W) writer structure"] -impl crate::Writable for CC1_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc1CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc1CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_CTRL to value 0"] -impl crate::Resettable for CC1_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc1_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc1_icf.rs index 1a7d7e8..0211b78 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc1_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc1_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC1_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new((self.bits & 0xffff) as u16) + pub fn icf(&self) -> IcfR { + IcfR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_icf](index.html) module"] -pub struct CC1_ICF_SPEC; -impl crate::RegisterSpec for CC1_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1IcfSpec; +impl crate::RegisterSpec for Cc1IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_icf::R](R) reader structure"] -impl crate::Readable for CC1_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc1_icf::R`](R) reader structure"] +impl crate::Readable for Cc1IcfSpec {} #[doc = "`reset()` method sets CC1_ICF to value 0"] -impl crate::Resettable for CC1_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc1_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc1_icof.rs index ea46e53..3fd845d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc1_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc1_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC1_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new((self.bits & 0xffff) as u16) + pub fn icof(&self) -> IcofR { + IcofR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_icof](index.html) module"] -pub struct CC1_ICOF_SPEC; -impl crate::RegisterSpec for CC1_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1IcofSpec; +impl crate::RegisterSpec for Cc1IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_icof::R](R) reader structure"] -impl crate::Readable for CC1_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc1_icof::R`](R) reader structure"] +impl crate::Readable for Cc1IcofSpec {} #[doc = "`reset()` method sets CC1_ICOF to value 0"] -impl crate::Resettable for CC1_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc1_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc1_oc.rs index 9f40c62..5b2e10b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc1_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc1_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC1_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC1_OC_SPEC, u16, u16, 16, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new((self.bits & 0xffff) as u16) + pub fn oc(&self) -> OcR { + OcR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_oc](index.html) module"] -pub struct CC1_OC_SPEC; -impl crate::RegisterSpec for CC1_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1OcSpec; +impl crate::RegisterSpec for Cc1OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_oc::R](R) reader structure"] -impl crate::Readable for CC1_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_oc::W](W) writer structure"] -impl crate::Writable for CC1_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_oc::R`](R) reader structure"] +impl crate::Readable for Cc1OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_oc::W`](W) writer structure"] +impl crate::Writable for Cc1OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_OC to value 0"] -impl crate::Resettable for CC1_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc1_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc1_ocb.rs index d3c8d9a..7d9f88b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc1_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc1_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC1_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC1_OCB_SPEC, u16, u16, 16, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new((self.bits & 0xffff) as u16) + pub fn ocb(&self) -> OcbR { + OcbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_ocb](index.html) module"] -pub struct CC1_OCB_SPEC; -impl crate::RegisterSpec for CC1_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1OcbSpec; +impl crate::RegisterSpec for Cc1OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_ocb::R](R) reader structure"] -impl crate::Readable for CC1_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_ocb::W](W) writer structure"] -impl crate::Writable for CC1_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_ocb::R`](R) reader structure"] +impl crate::Readable for Cc1OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_ocb::W`](W) writer structure"] +impl crate::Writable for Cc1OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_OCB to value 0"] -impl crate::Resettable for CC1_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc2_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc2_cfg.rs index 6b108e5..97bec45 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc2_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc2_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC2_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC2_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_cfg](index.html) module"] -pub struct CC2_CFG_SPEC; -impl crate::RegisterSpec for CC2_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2CfgSpec; +impl crate::RegisterSpec for Cc2CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_cfg::R](R) reader structure"] -impl crate::Readable for CC2_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_cfg::W](W) writer structure"] -impl crate::Writable for CC2_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_cfg::R`](R) reader structure"] +impl crate::Readable for Cc2CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_cfg::W`](W) writer structure"] +impl crate::Writable for Cc2CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_CFG to value 0"] -impl crate::Resettable for CC2_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc2_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc2_ctrl.rs index b42d120..317952a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc2_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc2_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC2_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_ctrl](index.html) module"] -pub struct CC2_CTRL_SPEC; -impl crate::RegisterSpec for CC2_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2CtrlSpec; +impl crate::RegisterSpec for Cc2CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_ctrl::R](R) reader structure"] -impl crate::Readable for CC2_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_ctrl::W](W) writer structure"] -impl crate::Writable for CC2_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc2CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc2CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_CTRL to value 0"] -impl crate::Resettable for CC2_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc2_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc2_icf.rs index 8282700..c1a0823 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc2_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc2_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC2_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new((self.bits & 0xffff) as u16) + pub fn icf(&self) -> IcfR { + IcfR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_icf](index.html) module"] -pub struct CC2_ICF_SPEC; -impl crate::RegisterSpec for CC2_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2IcfSpec; +impl crate::RegisterSpec for Cc2IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_icf::R](R) reader structure"] -impl crate::Readable for CC2_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc2_icf::R`](R) reader structure"] +impl crate::Readable for Cc2IcfSpec {} #[doc = "`reset()` method sets CC2_ICF to value 0"] -impl crate::Resettable for CC2_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc2_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc2_icof.rs index c21d7d3..0d399d1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc2_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc2_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC2_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new((self.bits & 0xffff) as u16) + pub fn icof(&self) -> IcofR { + IcofR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_icof](index.html) module"] -pub struct CC2_ICOF_SPEC; -impl crate::RegisterSpec for CC2_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2IcofSpec; +impl crate::RegisterSpec for Cc2IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_icof::R](R) reader structure"] -impl crate::Readable for CC2_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc2_icof::R`](R) reader structure"] +impl crate::Readable for Cc2IcofSpec {} #[doc = "`reset()` method sets CC2_ICOF to value 0"] -impl crate::Resettable for CC2_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc2_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc2_oc.rs index da9cc47..935617c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc2_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc2_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC2_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC2_OC_SPEC, u16, u16, 16, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new((self.bits & 0xffff) as u16) + pub fn oc(&self) -> OcR { + OcR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_oc](index.html) module"] -pub struct CC2_OC_SPEC; -impl crate::RegisterSpec for CC2_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2OcSpec; +impl crate::RegisterSpec for Cc2OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_oc::R](R) reader structure"] -impl crate::Readable for CC2_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_oc::W](W) writer structure"] -impl crate::Writable for CC2_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_oc::R`](R) reader structure"] +impl crate::Readable for Cc2OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_oc::W`](W) writer structure"] +impl crate::Writable for Cc2OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_OC to value 0"] -impl crate::Resettable for CC2_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc2_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc2_ocb.rs index 1ab93d6..ee6c4e5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc2_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cc2_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC2_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC2_OCB_SPEC, u16, u16, 16, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new((self.bits & 0xffff) as u16) + pub fn ocb(&self) -> OcbR { + OcbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_ocb](index.html) module"] -pub struct CC2_OCB_SPEC; -impl crate::RegisterSpec for CC2_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2OcbSpec; +impl crate::RegisterSpec for Cc2OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_ocb::R](R) reader structure"] -impl crate::Readable for CC2_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_ocb::W](W) writer structure"] -impl crate::Writable for CC2_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_ocb::R`](R) reader structure"] +impl crate::Readable for Cc2OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_ocb::W`](W) writer structure"] +impl crate::Writable for Cc2OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_OCB to value 0"] -impl crate::Resettable for CC2_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cfg.rs index ea2a1e1..b4cc2fd 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cfg.rs @@ -1,775 +1,774 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - Timer Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Timer Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Up-count mode"] - UP = 0, + Up = 0, #[doc = "1: Down-count mode"] - DOWN = 1, + Down = 1, #[doc = "2: Up/down-count mode"] - UPDOWN = 2, + Updown = 2, #[doc = "3: Quadrature decoder mode"] - QDEC = 3, + Qdec = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - Timer Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::UP, - 1 => MODE_A::DOWN, - 2 => MODE_A::UPDOWN, - 3 => MODE_A::QDEC, + 0 => Mode::Up, + 1 => Mode::Down, + 2 => Mode::Updown, + 3 => Mode::Qdec, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Up-count mode"] #[inline(always)] pub fn is_up(&self) -> bool { - *self == MODE_A::UP + *self == Mode::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Down-count mode"] #[inline(always)] pub fn is_down(&self) -> bool { - *self == MODE_A::DOWN + *self == Mode::Down } - #[doc = "Checks if the value of the field is `UPDOWN`"] + #[doc = "Up/down-count mode"] #[inline(always)] pub fn is_updown(&self) -> bool { - *self == MODE_A::UPDOWN + *self == Mode::Updown } - #[doc = "Checks if the value of the field is `QDEC`"] + #[doc = "Quadrature decoder mode"] #[inline(always)] pub fn is_qdec(&self) -> bool { - *self == MODE_A::QDEC + *self == Mode::Qdec } } #[doc = "Field `MODE` writer - Timer Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Up-count mode"] #[inline(always)] - pub fn up(self) -> &'a mut W { - self.variant(MODE_A::UP) + pub fn up(self) -> &'a mut crate::W { + self.variant(Mode::Up) } #[doc = "Down-count mode"] #[inline(always)] - pub fn down(self) -> &'a mut W { - self.variant(MODE_A::DOWN) + pub fn down(self) -> &'a mut crate::W { + self.variant(Mode::Down) } #[doc = "Up/down-count mode"] #[inline(always)] - pub fn updown(self) -> &'a mut W { - self.variant(MODE_A::UPDOWN) + pub fn updown(self) -> &'a mut crate::W { + self.variant(Mode::Updown) } #[doc = "Quadrature decoder mode"] #[inline(always)] - pub fn qdec(self) -> &'a mut W { - self.variant(MODE_A::QDEC) + pub fn qdec(self) -> &'a mut crate::W { + self.variant(Mode::Qdec) } } -#[doc = "Field `SYNC` reader - Timer Start/Stop/Reload Synchronization"] -pub type SYNC_R = crate::BitReader; #[doc = "Timer Start/Stop/Reload Synchronization\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYNC_A { +pub enum Sync { #[doc = "0: Timer operation is unaffected by other timers."] - DISABLE = 0, + Disable = 0, #[doc = "1: Timer may be started, stopped and re-loaded from other timer instances."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYNC_A) -> Self { + fn from(variant: Sync) -> Self { variant as u8 != 0 } } -impl SYNC_R { +#[doc = "Field `SYNC` reader - Timer Start/Stop/Reload Synchronization"] +pub type SyncR = crate::BitReader; +impl SyncR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SYNC_A { + pub const fn variant(&self) -> Sync { match self.bits { - false => SYNC_A::DISABLE, - true => SYNC_A::ENABLE, + false => Sync::Disable, + true => Sync::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Timer operation is unaffected by other timers."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == SYNC_A::DISABLE + *self == Sync::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Timer may be started, stopped and re-loaded from other timer instances."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == SYNC_A::ENABLE + *self == Sync::Enable } } #[doc = "Field `SYNC` writer - Timer Start/Stop/Reload Synchronization"] -pub type SYNC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, SYNC_A, O>; -impl<'a, const O: u8> SYNC_W<'a, O> { +pub type SyncW<'a, REG> = crate::BitWriter<'a, REG, Sync>; +impl<'a, REG> SyncW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer operation is unaffected by other timers."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(SYNC_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Sync::Disable) } #[doc = "Timer may be started, stopped and re-loaded from other timer instances."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(SYNC_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Sync::Enable) } } #[doc = "Field `OSMEN` reader - One-shot Mode Enable"] -pub type OSMEN_R = crate::BitReader; +pub type OsmenR = crate::BitReader; #[doc = "Field `OSMEN` writer - One-shot Mode Enable"] -pub type OSMEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `QDM` reader - Quadrature Decoder Mode Selection"] -pub type QDM_R = crate::BitReader; +pub type OsmenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Quadrature Decoder Mode Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum QDM_A { +pub enum Qdm { #[doc = "0: X2 mode selected"] X2 = 0, #[doc = "1: X4 mode selected"] X4 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: QDM_A) -> Self { + fn from(variant: Qdm) -> Self { variant as u8 != 0 } } -impl QDM_R { +#[doc = "Field `QDM` reader - Quadrature Decoder Mode Selection"] +pub type QdmR = crate::BitReader; +impl QdmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> QDM_A { + pub const fn variant(&self) -> Qdm { match self.bits { - false => QDM_A::X2, - true => QDM_A::X4, + false => Qdm::X2, + true => Qdm::X4, } } - #[doc = "Checks if the value of the field is `X2`"] + #[doc = "X2 mode selected"] #[inline(always)] pub fn is_x2(&self) -> bool { - *self == QDM_A::X2 + *self == Qdm::X2 } - #[doc = "Checks if the value of the field is `X4`"] + #[doc = "X4 mode selected"] #[inline(always)] pub fn is_x4(&self) -> bool { - *self == QDM_A::X4 + *self == Qdm::X4 } } #[doc = "Field `QDM` writer - Quadrature Decoder Mode Selection"] -pub type QDM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, QDM_A, O>; -impl<'a, const O: u8> QDM_W<'a, O> { +pub type QdmW<'a, REG> = crate::BitWriter<'a, REG, Qdm>; +impl<'a, REG> QdmW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "X2 mode selected"] #[inline(always)] - pub fn x2(self) -> &'a mut W { - self.variant(QDM_A::X2) + pub fn x2(self) -> &'a mut crate::W { + self.variant(Qdm::X2) } #[doc = "X4 mode selected"] #[inline(always)] - pub fn x4(self) -> &'a mut W { - self.variant(QDM_A::X4) + pub fn x4(self) -> &'a mut crate::W { + self.variant(Qdm::X4) } } -#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] -pub type DEBUGRUN_R = crate::BitReader; #[doc = "Debug Mode Run Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DEBUGRUN_A { +pub enum Debugrun { #[doc = "0: Timer is halted in debug mode"] - HALT = 0, + Halt = 0, #[doc = "1: Timer is running in debug mode"] - RUN = 1, + Run = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DEBUGRUN_A) -> Self { + fn from(variant: Debugrun) -> Self { variant as u8 != 0 } } -impl DEBUGRUN_R { +#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] +pub type DebugrunR = crate::BitReader; +impl DebugrunR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DEBUGRUN_A { + pub const fn variant(&self) -> Debugrun { match self.bits { - false => DEBUGRUN_A::HALT, - true => DEBUGRUN_A::RUN, + false => Debugrun::Halt, + true => Debugrun::Run, } } - #[doc = "Checks if the value of the field is `HALT`"] + #[doc = "Timer is halted in debug mode"] #[inline(always)] pub fn is_halt(&self) -> bool { - *self == DEBUGRUN_A::HALT + *self == Debugrun::Halt } - #[doc = "Checks if the value of the field is `RUN`"] + #[doc = "Timer is running in debug mode"] #[inline(always)] pub fn is_run(&self) -> bool { - *self == DEBUGRUN_A::RUN + *self == Debugrun::Run } } #[doc = "Field `DEBUGRUN` writer - Debug Mode Run Enable"] -pub type DEBUGRUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DEBUGRUN_A, O>; -impl<'a, const O: u8> DEBUGRUN_W<'a, O> { +pub type DebugrunW<'a, REG> = crate::BitWriter<'a, REG, Debugrun>; +impl<'a, REG> DebugrunW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer is halted in debug mode"] #[inline(always)] - pub fn halt(self) -> &'a mut W { - self.variant(DEBUGRUN_A::HALT) + pub fn halt(self) -> &'a mut crate::W { + self.variant(Debugrun::Halt) } #[doc = "Timer is running in debug mode"] #[inline(always)] - pub fn run(self) -> &'a mut W { - self.variant(DEBUGRUN_A::RUN) + pub fn run(self) -> &'a mut crate::W { + self.variant(Debugrun::Run) } } #[doc = "Field `DMACLRACT` reader - DMA Request Clear on Active"] -pub type DMACLRACT_R = crate::BitReader; +pub type DmaclractR = crate::BitReader; #[doc = "Field `DMACLRACT` writer - DMA Request Clear on Active"] -pub type DMACLRACT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `CLKSEL` reader - Clock Source Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type DmaclractW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Clock Source Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "0: Prescaled EM01GRPACLK"] - PRESCEM01GRPACLK = 0, + Prescem01grpaclk = 0, #[doc = "1: Compare/Capture Channel 1 Input"] - CC1 = 1, + Cc1 = 1, #[doc = "2: Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] - TIMEROUF = 2, + Timerouf = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Source Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKSEL_A::PRESCEM01GRPACLK), - 1 => Some(CLKSEL_A::CC1), - 2 => Some(CLKSEL_A::TIMEROUF), + 0 => Some(Clksel::Prescem01grpaclk), + 1 => Some(Clksel::Cc1), + 2 => Some(Clksel::Timerouf), _ => None, } } - #[doc = "Checks if the value of the field is `PRESCEM01GRPACLK`"] + #[doc = "Prescaled EM01GRPACLK"] #[inline(always)] pub fn is_prescem01grpaclk(&self) -> bool { - *self == CLKSEL_A::PRESCEM01GRPACLK + *self == Clksel::Prescem01grpaclk } - #[doc = "Checks if the value of the field is `CC1`"] + #[doc = "Compare/Capture Channel 1 Input"] #[inline(always)] pub fn is_cc1(&self) -> bool { - *self == CLKSEL_A::CC1 + *self == Clksel::Cc1 } - #[doc = "Checks if the value of the field is `TIMEROUF`"] + #[doc = "Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] #[inline(always)] pub fn is_timerouf(&self) -> bool { - *self == CLKSEL_A::TIMEROUF + *self == Clksel::Timerouf } } #[doc = "Field `CLKSEL` writer - Clock Source Select"] -pub type CLKSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, CLKSEL_A, 2, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Prescaled EM01GRPACLK"] #[inline(always)] - pub fn prescem01grpaclk(self) -> &'a mut W { - self.variant(CLKSEL_A::PRESCEM01GRPACLK) + pub fn prescem01grpaclk(self) -> &'a mut crate::W { + self.variant(Clksel::Prescem01grpaclk) } #[doc = "Compare/Capture Channel 1 Input"] #[inline(always)] - pub fn cc1(self) -> &'a mut W { - self.variant(CLKSEL_A::CC1) + pub fn cc1(self) -> &'a mut crate::W { + self.variant(Clksel::Cc1) } #[doc = "Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] #[inline(always)] - pub fn timerouf(self) -> &'a mut W { - self.variant(CLKSEL_A::TIMEROUF) + pub fn timerouf(self) -> &'a mut crate::W { + self.variant(Clksel::Timerouf) } } -#[doc = "Field `RETIMEEN` reader - PWM output retimed enable"] -pub type RETIMEEN_R = crate::BitReader; #[doc = "PWM output retimed enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RETIMEEN_A { +pub enum Retimeen { #[doc = "0: PWM outputs are not re-timed."] - DISABLE = 0, + Disable = 0, #[doc = "1: PWM outputs are re-timed."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RETIMEEN_A) -> Self { + fn from(variant: Retimeen) -> Self { variant as u8 != 0 } } -impl RETIMEEN_R { +#[doc = "Field `RETIMEEN` reader - PWM output retimed enable"] +pub type RetimeenR = crate::BitReader; +impl RetimeenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RETIMEEN_A { + pub const fn variant(&self) -> Retimeen { match self.bits { - false => RETIMEEN_A::DISABLE, - true => RETIMEEN_A::ENABLE, + false => Retimeen::Disable, + true => Retimeen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "PWM outputs are not re-timed."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RETIMEEN_A::DISABLE + *self == Retimeen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "PWM outputs are re-timed."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RETIMEEN_A::ENABLE + *self == Retimeen::Enable } } #[doc = "Field `RETIMEEN` writer - PWM output retimed enable"] -pub type RETIMEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, RETIMEEN_A, O>; -impl<'a, const O: u8> RETIMEEN_W<'a, O> { +pub type RetimeenW<'a, REG> = crate::BitWriter<'a, REG, Retimeen>; +impl<'a, REG> RetimeenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "PWM outputs are not re-timed."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RETIMEEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Retimeen::Disable) } #[doc = "PWM outputs are re-timed."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RETIMEEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Retimeen::Enable) } } -#[doc = "Field `DISSYNCOUT` reader - Disable Timer Start/Stop/Reload output"] -pub type DISSYNCOUT_R = crate::BitReader; #[doc = "Disable Timer Start/Stop/Reload output\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DISSYNCOUT_A { +pub enum Dissyncout { #[doc = "0: Timer can start/stop/reload other timers with SYNC bit set"] - EN = 0, + En = 0, #[doc = "1: Timer cannot start/stop/reload other timers with SYNC bit set"] - DIS = 1, + Dis = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DISSYNCOUT_A) -> Self { + fn from(variant: Dissyncout) -> Self { variant as u8 != 0 } } -impl DISSYNCOUT_R { +#[doc = "Field `DISSYNCOUT` reader - Disable Timer Start/Stop/Reload output"] +pub type DissyncoutR = crate::BitReader; +impl DissyncoutR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DISSYNCOUT_A { + pub const fn variant(&self) -> Dissyncout { match self.bits { - false => DISSYNCOUT_A::EN, - true => DISSYNCOUT_A::DIS, + false => Dissyncout::En, + true => Dissyncout::Dis, } } - #[doc = "Checks if the value of the field is `EN`"] + #[doc = "Timer can start/stop/reload other timers with SYNC bit set"] #[inline(always)] pub fn is_en(&self) -> bool { - *self == DISSYNCOUT_A::EN + *self == Dissyncout::En } - #[doc = "Checks if the value of the field is `DIS`"] + #[doc = "Timer cannot start/stop/reload other timers with SYNC bit set"] #[inline(always)] pub fn is_dis(&self) -> bool { - *self == DISSYNCOUT_A::DIS + *self == Dissyncout::Dis } } #[doc = "Field `DISSYNCOUT` writer - Disable Timer Start/Stop/Reload output"] -pub type DISSYNCOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DISSYNCOUT_A, O>; -impl<'a, const O: u8> DISSYNCOUT_W<'a, O> { +pub type DissyncoutW<'a, REG> = crate::BitWriter<'a, REG, Dissyncout>; +impl<'a, REG> DissyncoutW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer can start/stop/reload other timers with SYNC bit set"] #[inline(always)] - pub fn en(self) -> &'a mut W { - self.variant(DISSYNCOUT_A::EN) + pub fn en(self) -> &'a mut crate::W { + self.variant(Dissyncout::En) } #[doc = "Timer cannot start/stop/reload other timers with SYNC bit set"] #[inline(always)] - pub fn dis(self) -> &'a mut W { - self.variant(DISSYNCOUT_A::DIS) + pub fn dis(self) -> &'a mut crate::W { + self.variant(Dissyncout::Dis) } } #[doc = "Field `ATI` reader - Always Track Inputs"] -pub type ATI_R = crate::BitReader; +pub type AtiR = crate::BitReader; #[doc = "Field `ATI` writer - Always Track Inputs"] -pub type ATI_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type AtiW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RSSCOIST` reader - Reload-Start Sets COIST"] -pub type RSSCOIST_R = crate::BitReader; +pub type RsscoistR = crate::BitReader; #[doc = "Field `RSSCOIST` writer - Reload-Start Sets COIST"] -pub type RSSCOIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `PRESC` reader - Prescaler Setting"] -pub type PRESC_R = crate::FieldReader; +pub type RsscoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Prescaler Setting\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum PRESC_A { +pub enum Presc { #[doc = "0: No prescaling"] - DIV1 = 0, + Div1 = 0, #[doc = "1: Prescale by 2"] - DIV2 = 1, + Div2 = 1, #[doc = "3: Prescale by 4"] - DIV4 = 3, + Div4 = 3, #[doc = "7: Prescale by 8"] - DIV8 = 7, + Div8 = 7, #[doc = "15: Prescale by 16"] - DIV16 = 15, + Div16 = 15, #[doc = "31: Prescale by 32"] - DIV32 = 31, + Div32 = 31, #[doc = "63: Prescale by 64"] - DIV64 = 63, + Div64 = 63, #[doc = "127: Prescale by 128"] - DIV128 = 127, + Div128 = 127, #[doc = "255: Prescale by 256"] - DIV256 = 255, + Div256 = 255, #[doc = "511: Prescale by 512"] - DIV512 = 511, + Div512 = 511, #[doc = "1023: Prescale by 1024"] - DIV1024 = 1023, + Div1024 = 1023, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: PRESC_A) -> Self { + fn from(variant: Presc) -> Self { variant as _ } } -impl PRESC_R { +impl crate::FieldSpec for Presc { + type Ux = u16; +} +impl crate::IsEnum for Presc {} +#[doc = "Field `PRESC` reader - Prescaler Setting"] +pub type PrescR = crate::FieldReader; +impl PrescR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PRESC_A::DIV1), - 1 => Some(PRESC_A::DIV2), - 3 => Some(PRESC_A::DIV4), - 7 => Some(PRESC_A::DIV8), - 15 => Some(PRESC_A::DIV16), - 31 => Some(PRESC_A::DIV32), - 63 => Some(PRESC_A::DIV64), - 127 => Some(PRESC_A::DIV128), - 255 => Some(PRESC_A::DIV256), - 511 => Some(PRESC_A::DIV512), - 1023 => Some(PRESC_A::DIV1024), + 0 => Some(Presc::Div1), + 1 => Some(Presc::Div2), + 3 => Some(Presc::Div4), + 7 => Some(Presc::Div8), + 15 => Some(Presc::Div16), + 31 => Some(Presc::Div32), + 63 => Some(Presc::Div64), + 127 => Some(Presc::Div128), + 255 => Some(Presc::Div256), + 511 => Some(Presc::Div512), + 1023 => Some(Presc::Div1024), _ => None, } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "No prescaling"] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == PRESC_A::DIV1 + *self == Presc::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "Prescale by 2"] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == PRESC_A::DIV2 + *self == Presc::Div2 } - #[doc = "Checks if the value of the field is `DIV4`"] + #[doc = "Prescale by 4"] #[inline(always)] pub fn is_div4(&self) -> bool { - *self == PRESC_A::DIV4 + *self == Presc::Div4 } - #[doc = "Checks if the value of the field is `DIV8`"] + #[doc = "Prescale by 8"] #[inline(always)] pub fn is_div8(&self) -> bool { - *self == PRESC_A::DIV8 + *self == Presc::Div8 } - #[doc = "Checks if the value of the field is `DIV16`"] + #[doc = "Prescale by 16"] #[inline(always)] pub fn is_div16(&self) -> bool { - *self == PRESC_A::DIV16 + *self == Presc::Div16 } - #[doc = "Checks if the value of the field is `DIV32`"] + #[doc = "Prescale by 32"] #[inline(always)] pub fn is_div32(&self) -> bool { - *self == PRESC_A::DIV32 + *self == Presc::Div32 } - #[doc = "Checks if the value of the field is `DIV64`"] + #[doc = "Prescale by 64"] #[inline(always)] pub fn is_div64(&self) -> bool { - *self == PRESC_A::DIV64 + *self == Presc::Div64 } - #[doc = "Checks if the value of the field is `DIV128`"] + #[doc = "Prescale by 128"] #[inline(always)] pub fn is_div128(&self) -> bool { - *self == PRESC_A::DIV128 + *self == Presc::Div128 } - #[doc = "Checks if the value of the field is `DIV256`"] + #[doc = "Prescale by 256"] #[inline(always)] pub fn is_div256(&self) -> bool { - *self == PRESC_A::DIV256 + *self == Presc::Div256 } - #[doc = "Checks if the value of the field is `DIV512`"] + #[doc = "Prescale by 512"] #[inline(always)] pub fn is_div512(&self) -> bool { - *self == PRESC_A::DIV512 + *self == Presc::Div512 } - #[doc = "Checks if the value of the field is `DIV1024`"] + #[doc = "Prescale by 1024"] #[inline(always)] pub fn is_div1024(&self) -> bool { - *self == PRESC_A::DIV1024 + *self == Presc::Div1024 } } #[doc = "Field `PRESC` writer - Prescaler Setting"] -pub type PRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u16, PRESC_A, 10, O>; -impl<'a, const O: u8> PRESC_W<'a, O> { +pub type PrescW<'a, REG> = crate::FieldWriter<'a, REG, 10, Presc>; +impl<'a, REG> PrescW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No prescaling"] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(PRESC_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Presc::Div1) } #[doc = "Prescale by 2"] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(PRESC_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Presc::Div2) } #[doc = "Prescale by 4"] #[inline(always)] - pub fn div4(self) -> &'a mut W { - self.variant(PRESC_A::DIV4) + pub fn div4(self) -> &'a mut crate::W { + self.variant(Presc::Div4) } #[doc = "Prescale by 8"] #[inline(always)] - pub fn div8(self) -> &'a mut W { - self.variant(PRESC_A::DIV8) + pub fn div8(self) -> &'a mut crate::W { + self.variant(Presc::Div8) } #[doc = "Prescale by 16"] #[inline(always)] - pub fn div16(self) -> &'a mut W { - self.variant(PRESC_A::DIV16) + pub fn div16(self) -> &'a mut crate::W { + self.variant(Presc::Div16) } #[doc = "Prescale by 32"] #[inline(always)] - pub fn div32(self) -> &'a mut W { - self.variant(PRESC_A::DIV32) + pub fn div32(self) -> &'a mut crate::W { + self.variant(Presc::Div32) } #[doc = "Prescale by 64"] #[inline(always)] - pub fn div64(self) -> &'a mut W { - self.variant(PRESC_A::DIV64) + pub fn div64(self) -> &'a mut crate::W { + self.variant(Presc::Div64) } #[doc = "Prescale by 128"] #[inline(always)] - pub fn div128(self) -> &'a mut W { - self.variant(PRESC_A::DIV128) + pub fn div128(self) -> &'a mut crate::W { + self.variant(Presc::Div128) } #[doc = "Prescale by 256"] #[inline(always)] - pub fn div256(self) -> &'a mut W { - self.variant(PRESC_A::DIV256) + pub fn div256(self) -> &'a mut crate::W { + self.variant(Presc::Div256) } #[doc = "Prescale by 512"] #[inline(always)] - pub fn div512(self) -> &'a mut W { - self.variant(PRESC_A::DIV512) + pub fn div512(self) -> &'a mut crate::W { + self.variant(Presc::Div512) } #[doc = "Prescale by 1024"] #[inline(always)] - pub fn div1024(self) -> &'a mut W { - self.variant(PRESC_A::DIV1024) + pub fn div1024(self) -> &'a mut crate::W { + self.variant(Presc::Div1024) } } impl R { #[doc = "Bits 0:1 - Timer Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Timer Start/Stop/Reload Synchronization"] #[inline(always)] - pub fn sync(&self) -> SYNC_R { - SYNC_R::new(((self.bits >> 3) & 1) != 0) + pub fn sync(&self) -> SyncR { + SyncR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - One-shot Mode Enable"] #[inline(always)] - pub fn osmen(&self) -> OSMEN_R { - OSMEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn osmen(&self) -> OsmenR { + OsmenR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Quadrature Decoder Mode Selection"] #[inline(always)] - pub fn qdm(&self) -> QDM_R { - QDM_R::new(((self.bits >> 5) & 1) != 0) + pub fn qdm(&self) -> QdmR { + QdmR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Debug Mode Run Enable"] #[inline(always)] - pub fn debugrun(&self) -> DEBUGRUN_R { - DEBUGRUN_R::new(((self.bits >> 6) & 1) != 0) + pub fn debugrun(&self) -> DebugrunR { + DebugrunR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - DMA Request Clear on Active"] #[inline(always)] - pub fn dmaclract(&self) -> DMACLRACT_R { - DMACLRACT_R::new(((self.bits >> 7) & 1) != 0) + pub fn dmaclract(&self) -> DmaclractR { + DmaclractR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:9 - Clock Source Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 10 - PWM output retimed enable"] #[inline(always)] - pub fn retimeen(&self) -> RETIMEEN_R { - RETIMEEN_R::new(((self.bits >> 10) & 1) != 0) + pub fn retimeen(&self) -> RetimeenR { + RetimeenR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Disable Timer Start/Stop/Reload output"] #[inline(always)] - pub fn dissyncout(&self) -> DISSYNCOUT_R { - DISSYNCOUT_R::new(((self.bits >> 11) & 1) != 0) + pub fn dissyncout(&self) -> DissyncoutR { + DissyncoutR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 16 - Always Track Inputs"] #[inline(always)] - pub fn ati(&self) -> ATI_R { - ATI_R::new(((self.bits >> 16) & 1) != 0) + pub fn ati(&self) -> AtiR { + AtiR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Reload-Start Sets COIST"] #[inline(always)] - pub fn rsscoist(&self) -> RSSCOIST_R { - RSSCOIST_R::new(((self.bits >> 17) & 1) != 0) + pub fn rsscoist(&self) -> RsscoistR { + RsscoistR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:27 - Prescaler Setting"] #[inline(always)] - pub fn presc(&self) -> PRESC_R { - PRESC_R::new(((self.bits >> 18) & 0x03ff) as u16) + pub fn presc(&self) -> PrescR { + PrescR::new(((self.bits >> 18) & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:1 - Timer Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 3 - Timer Start/Stop/Reload Synchronization"] #[inline(always)] #[must_use] - pub fn sync(&mut self) -> SYNC_W<3> { - SYNC_W::new(self) + pub fn sync(&mut self) -> SyncW { + SyncW::new(self, 3) } #[doc = "Bit 4 - One-shot Mode Enable"] #[inline(always)] #[must_use] - pub fn osmen(&mut self) -> OSMEN_W<4> { - OSMEN_W::new(self) + pub fn osmen(&mut self) -> OsmenW { + OsmenW::new(self, 4) } #[doc = "Bit 5 - Quadrature Decoder Mode Selection"] #[inline(always)] #[must_use] - pub fn qdm(&mut self) -> QDM_W<5> { - QDM_W::new(self) + pub fn qdm(&mut self) -> QdmW { + QdmW::new(self, 5) } #[doc = "Bit 6 - Debug Mode Run Enable"] #[inline(always)] #[must_use] - pub fn debugrun(&mut self) -> DEBUGRUN_W<6> { - DEBUGRUN_W::new(self) + pub fn debugrun(&mut self) -> DebugrunW { + DebugrunW::new(self, 6) } #[doc = "Bit 7 - DMA Request Clear on Active"] #[inline(always)] #[must_use] - pub fn dmaclract(&mut self) -> DMACLRACT_W<7> { - DMACLRACT_W::new(self) + pub fn dmaclract(&mut self) -> DmaclractW { + DmaclractW::new(self, 7) } #[doc = "Bits 8:9 - Clock Source Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<8> { - CLKSEL_W::new(self) + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 8) } #[doc = "Bit 10 - PWM output retimed enable"] #[inline(always)] #[must_use] - pub fn retimeen(&mut self) -> RETIMEEN_W<10> { - RETIMEEN_W::new(self) + pub fn retimeen(&mut self) -> RetimeenW { + RetimeenW::new(self, 10) } #[doc = "Bit 11 - Disable Timer Start/Stop/Reload output"] #[inline(always)] #[must_use] - pub fn dissyncout(&mut self) -> DISSYNCOUT_W<11> { - DISSYNCOUT_W::new(self) + pub fn dissyncout(&mut self) -> DissyncoutW { + DissyncoutW::new(self, 11) } #[doc = "Bit 16 - Always Track Inputs"] #[inline(always)] #[must_use] - pub fn ati(&mut self) -> ATI_W<16> { - ATI_W::new(self) + pub fn ati(&mut self) -> AtiW { + AtiW::new(self, 16) } #[doc = "Bit 17 - Reload-Start Sets COIST"] #[inline(always)] #[must_use] - pub fn rsscoist(&mut self) -> RSSCOIST_W<17> { - RSSCOIST_W::new(self) + pub fn rsscoist(&mut self) -> RsscoistW { + RsscoistW::new(self, 17) } #[doc = "Bits 18:27 - Prescaler Setting"] #[inline(always)] #[must_use] - pub fn presc(&mut self) -> PRESC_W<18> { - PRESC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn presc(&mut self) -> PrescW { + PrescW::new(self, 18) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cmd.rs index ca6d3b1..bf41157 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cmd.rs @@ -1,60 +1,35 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` writer - Start Timer"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STOP` writer - Stop Timer"] -pub type STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StopW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Start Timer"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Stop Timer"] #[inline(always)] #[must_use] - pub fn stop(&mut self) -> STOP_W<1> { - STOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stop(&mut self) -> StopW { + StopW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cnt.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cnt.rs index dd37661..c870fc9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cnt.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/cnt.rs @@ -1,80 +1,40 @@ #[doc = "Register `CNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CNT` reader - Counter Value"] -pub type CNT_R = crate::FieldReader; +pub type CntR = crate::FieldReader; #[doc = "Field `CNT` writer - Counter Value"] -pub type CNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CNT_SPEC, u16, u16, 16, O>; +pub type CntW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Value"] #[inline(always)] - pub fn cnt(&self) -> CNT_R { - CNT_R::new((self.bits & 0xffff) as u16) + pub fn cnt(&self) -> CntR { + CntR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Value"] #[inline(always)] #[must_use] - pub fn cnt(&mut self) -> CNT_W<0> { - CNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cnt(&mut self) -> CntW { + CntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](index.html) module"] -pub struct CNT_SPEC; -impl crate::RegisterSpec for CNT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CntSpec; +impl crate::RegisterSpec for CntSpec { type Ux = u32; } -#[doc = "`read()` method returns [cnt::R](R) reader structure"] -impl crate::Readable for CNT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnt::W](W) writer structure"] -impl crate::Writable for CNT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cnt::R`](R) reader structure"] +impl crate::Readable for CntSpec {} +#[doc = "`write(|w| ..)` method takes [`cnt::W`](W) writer structure"] +impl crate::Writable for CntSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNT to value 0"] -impl crate::Resettable for CNT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CntSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/ctrl.rs index 08e646b..e2ed153 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/ctrl.rs @@ -1,258 +1,234 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `RISEA` reader - Timer Rising Input Edge Action"] -pub type RISEA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Timer Rising Input Edge Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RISEA_A { +pub enum Risea { #[doc = "0: No action"] - NONE = 0, + None = 0, #[doc = "1: Start counter without reload"] - START = 1, + Start = 1, #[doc = "2: Stop counter without reload"] - STOP = 2, + Stop = 2, #[doc = "3: Reload and start counter"] - RELOADSTART = 3, + Reloadstart = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RISEA_A) -> Self { + fn from(variant: Risea) -> Self { variant as _ } } -impl RISEA_R { +impl crate::FieldSpec for Risea { + type Ux = u8; +} +impl crate::IsEnum for Risea {} +#[doc = "Field `RISEA` reader - Timer Rising Input Edge Action"] +pub type RiseaR = crate::FieldReader; +impl RiseaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RISEA_A { + pub const fn variant(&self) -> Risea { match self.bits { - 0 => RISEA_A::NONE, - 1 => RISEA_A::START, - 2 => RISEA_A::STOP, - 3 => RISEA_A::RELOADSTART, + 0 => Risea::None, + 1 => Risea::Start, + 2 => Risea::Stop, + 3 => Risea::Reloadstart, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == RISEA_A::NONE + *self == Risea::None } - #[doc = "Checks if the value of the field is `START`"] + #[doc = "Start counter without reload"] #[inline(always)] pub fn is_start(&self) -> bool { - *self == RISEA_A::START + *self == Risea::Start } - #[doc = "Checks if the value of the field is `STOP`"] + #[doc = "Stop counter without reload"] #[inline(always)] pub fn is_stop(&self) -> bool { - *self == RISEA_A::STOP + *self == Risea::Stop } - #[doc = "Checks if the value of the field is `RELOADSTART`"] + #[doc = "Reload and start counter"] #[inline(always)] pub fn is_reloadstart(&self) -> bool { - *self == RISEA_A::RELOADSTART + *self == Risea::Reloadstart } } #[doc = "Field `RISEA` writer - Timer Rising Input Edge Action"] -pub type RISEA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, RISEA_A, 2, O>; -impl<'a, const O: u8> RISEA_W<'a, O> { +pub type RiseaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Risea, crate::Safe>; +impl<'a, REG> RiseaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(RISEA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Risea::None) } #[doc = "Start counter without reload"] #[inline(always)] - pub fn start(self) -> &'a mut W { - self.variant(RISEA_A::START) + pub fn start(self) -> &'a mut crate::W { + self.variant(Risea::Start) } #[doc = "Stop counter without reload"] #[inline(always)] - pub fn stop(self) -> &'a mut W { - self.variant(RISEA_A::STOP) + pub fn stop(self) -> &'a mut crate::W { + self.variant(Risea::Stop) } #[doc = "Reload and start counter"] #[inline(always)] - pub fn reloadstart(self) -> &'a mut W { - self.variant(RISEA_A::RELOADSTART) + pub fn reloadstart(self) -> &'a mut crate::W { + self.variant(Risea::Reloadstart) } } -#[doc = "Field `FALLA` reader - Timer Falling Input Edge Action"] -pub type FALLA_R = crate::FieldReader; #[doc = "Timer Falling Input Edge Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FALLA_A { +pub enum Falla { #[doc = "0: No action"] - NONE = 0, + None = 0, #[doc = "1: Start counter without reload"] - START = 1, + Start = 1, #[doc = "2: Stop counter without reload"] - STOP = 2, + Stop = 2, #[doc = "3: Reload and start counter"] - RELOADSTART = 3, + Reloadstart = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FALLA_A) -> Self { + fn from(variant: Falla) -> Self { variant as _ } } -impl FALLA_R { +impl crate::FieldSpec for Falla { + type Ux = u8; +} +impl crate::IsEnum for Falla {} +#[doc = "Field `FALLA` reader - Timer Falling Input Edge Action"] +pub type FallaR = crate::FieldReader; +impl FallaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FALLA_A { + pub const fn variant(&self) -> Falla { match self.bits { - 0 => FALLA_A::NONE, - 1 => FALLA_A::START, - 2 => FALLA_A::STOP, - 3 => FALLA_A::RELOADSTART, + 0 => Falla::None, + 1 => Falla::Start, + 2 => Falla::Stop, + 3 => Falla::Reloadstart, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == FALLA_A::NONE + *self == Falla::None } - #[doc = "Checks if the value of the field is `START`"] + #[doc = "Start counter without reload"] #[inline(always)] pub fn is_start(&self) -> bool { - *self == FALLA_A::START + *self == Falla::Start } - #[doc = "Checks if the value of the field is `STOP`"] + #[doc = "Stop counter without reload"] #[inline(always)] pub fn is_stop(&self) -> bool { - *self == FALLA_A::STOP + *self == Falla::Stop } - #[doc = "Checks if the value of the field is `RELOADSTART`"] + #[doc = "Reload and start counter"] #[inline(always)] pub fn is_reloadstart(&self) -> bool { - *self == FALLA_A::RELOADSTART + *self == Falla::Reloadstart } } #[doc = "Field `FALLA` writer - Timer Falling Input Edge Action"] -pub type FALLA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, FALLA_A, 2, O>; -impl<'a, const O: u8> FALLA_W<'a, O> { +pub type FallaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Falla, crate::Safe>; +impl<'a, REG> FallaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(FALLA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Falla::None) } #[doc = "Start counter without reload"] #[inline(always)] - pub fn start(self) -> &'a mut W { - self.variant(FALLA_A::START) + pub fn start(self) -> &'a mut crate::W { + self.variant(Falla::Start) } #[doc = "Stop counter without reload"] #[inline(always)] - pub fn stop(self) -> &'a mut W { - self.variant(FALLA_A::STOP) + pub fn stop(self) -> &'a mut crate::W { + self.variant(Falla::Stop) } #[doc = "Reload and start counter"] #[inline(always)] - pub fn reloadstart(self) -> &'a mut W { - self.variant(FALLA_A::RELOADSTART) + pub fn reloadstart(self) -> &'a mut crate::W { + self.variant(Falla::Reloadstart) } } #[doc = "Field `X2CNT` reader - 2x Count Mode"] -pub type X2CNT_R = crate::BitReader; +pub type X2cntR = crate::BitReader; #[doc = "Field `X2CNT` writer - 2x Count Mode"] -pub type X2CNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type X2cntW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - Timer Rising Input Edge Action"] #[inline(always)] - pub fn risea(&self) -> RISEA_R { - RISEA_R::new((self.bits & 3) as u8) + pub fn risea(&self) -> RiseaR { + RiseaR::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Timer Falling Input Edge Action"] #[inline(always)] - pub fn falla(&self) -> FALLA_R { - FALLA_R::new(((self.bits >> 2) & 3) as u8) + pub fn falla(&self) -> FallaR { + FallaR::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bit 4 - 2x Count Mode"] #[inline(always)] - pub fn x2cnt(&self) -> X2CNT_R { - X2CNT_R::new(((self.bits >> 4) & 1) != 0) + pub fn x2cnt(&self) -> X2cntR { + X2cntR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Timer Rising Input Edge Action"] #[inline(always)] #[must_use] - pub fn risea(&mut self) -> RISEA_W<0> { - RISEA_W::new(self) + pub fn risea(&mut self) -> RiseaW { + RiseaW::new(self, 0) } #[doc = "Bits 2:3 - Timer Falling Input Edge Action"] #[inline(always)] #[must_use] - pub fn falla(&mut self) -> FALLA_W<2> { - FALLA_W::new(self) + pub fn falla(&mut self) -> FallaW { + FallaW::new(self, 2) } #[doc = "Bit 4 - 2x Count Mode"] #[inline(always)] #[must_use] - pub fn x2cnt(&mut self) -> X2CNT_W<4> { - X2CNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn x2cnt(&mut self) -> X2cntW { + X2cntW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtcfg.rs index d19a9a3..82b97e1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtcfg.rs @@ -1,186 +1,149 @@ #[doc = "Register `DTCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTEN` reader - DTI Enable"] -pub type DTEN_R = crate::BitReader; +pub type DtenR = crate::BitReader; #[doc = "Field `DTEN` writer - DTI Enable"] -pub type DTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; -#[doc = "Field `DTDAS` reader - DTI Automatic Start-up Functionality"] -pub type DTDAS_R = crate::BitReader; +pub type DtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "DTI Automatic Start-up Functionality\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DTDAS_A { +pub enum Dtdas { #[doc = "0: No DTI restart on debugger exit"] - NORESTART = 0, + Norestart = 0, #[doc = "1: DTI restart on debugger exit"] - RESTART = 1, + Restart = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DTDAS_A) -> Self { + fn from(variant: Dtdas) -> Self { variant as u8 != 0 } } -impl DTDAS_R { +#[doc = "Field `DTDAS` reader - DTI Automatic Start-up Functionality"] +pub type DtdasR = crate::BitReader; +impl DtdasR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTDAS_A { + pub const fn variant(&self) -> Dtdas { match self.bits { - false => DTDAS_A::NORESTART, - true => DTDAS_A::RESTART, + false => Dtdas::Norestart, + true => Dtdas::Restart, } } - #[doc = "Checks if the value of the field is `NORESTART`"] + #[doc = "No DTI restart on debugger exit"] #[inline(always)] pub fn is_norestart(&self) -> bool { - *self == DTDAS_A::NORESTART + *self == Dtdas::Norestart } - #[doc = "Checks if the value of the field is `RESTART`"] + #[doc = "DTI restart on debugger exit"] #[inline(always)] pub fn is_restart(&self) -> bool { - *self == DTDAS_A::RESTART + *self == Dtdas::Restart } } #[doc = "Field `DTDAS` writer - DTI Automatic Start-up Functionality"] -pub type DTDAS_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, DTDAS_A, O>; -impl<'a, const O: u8> DTDAS_W<'a, O> { +pub type DtdasW<'a, REG> = crate::BitWriter<'a, REG, Dtdas>; +impl<'a, REG> DtdasW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No DTI restart on debugger exit"] #[inline(always)] - pub fn norestart(self) -> &'a mut W { - self.variant(DTDAS_A::NORESTART) + pub fn norestart(self) -> &'a mut crate::W { + self.variant(Dtdas::Norestart) } #[doc = "DTI restart on debugger exit"] #[inline(always)] - pub fn restart(self) -> &'a mut W { - self.variant(DTDAS_A::RESTART) + pub fn restart(self) -> &'a mut crate::W { + self.variant(Dtdas::Restart) } } #[doc = "Field `DTAR` reader - DTI Always Run"] -pub type DTAR_R = crate::BitReader; +pub type DtarR = crate::BitReader; #[doc = "Field `DTAR` writer - DTI Always Run"] -pub type DTAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtarW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTFATS` reader - DTI Fault Action on Timer Stop"] -pub type DTFATS_R = crate::BitReader; +pub type DtfatsR = crate::BitReader; #[doc = "Field `DTFATS` writer - DTI Fault Action on Timer Stop"] -pub type DTFATS_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtfatsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRSEN` reader - DTI PRS Source Enable"] -pub type DTPRSEN_R = crate::BitReader; +pub type DtprsenR = crate::BitReader; #[doc = "Field `DTPRSEN` writer - DTI PRS Source Enable"] -pub type DTPRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtprsenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI Enable"] #[inline(always)] - pub fn dten(&self) -> DTEN_R { - DTEN_R::new((self.bits & 1) != 0) + pub fn dten(&self) -> DtenR { + DtenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI Automatic Start-up Functionality"] #[inline(always)] - pub fn dtdas(&self) -> DTDAS_R { - DTDAS_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtdas(&self) -> DtdasR { + DtdasR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 9 - DTI Always Run"] #[inline(always)] - pub fn dtar(&self) -> DTAR_R { - DTAR_R::new(((self.bits >> 9) & 1) != 0) + pub fn dtar(&self) -> DtarR { + DtarR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - DTI Fault Action on Timer Stop"] #[inline(always)] - pub fn dtfats(&self) -> DTFATS_R { - DTFATS_R::new(((self.bits >> 10) & 1) != 0) + pub fn dtfats(&self) -> DtfatsR { + DtfatsR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - DTI PRS Source Enable"] #[inline(always)] - pub fn dtprsen(&self) -> DTPRSEN_R { - DTPRSEN_R::new(((self.bits >> 11) & 1) != 0) + pub fn dtprsen(&self) -> DtprsenR { + DtprsenR::new(((self.bits >> 11) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI Enable"] #[inline(always)] #[must_use] - pub fn dten(&mut self) -> DTEN_W<0> { - DTEN_W::new(self) + pub fn dten(&mut self) -> DtenW { + DtenW::new(self, 0) } #[doc = "Bit 1 - DTI Automatic Start-up Functionality"] #[inline(always)] #[must_use] - pub fn dtdas(&mut self) -> DTDAS_W<1> { - DTDAS_W::new(self) + pub fn dtdas(&mut self) -> DtdasW { + DtdasW::new(self, 1) } #[doc = "Bit 9 - DTI Always Run"] #[inline(always)] #[must_use] - pub fn dtar(&mut self) -> DTAR_W<9> { - DTAR_W::new(self) + pub fn dtar(&mut self) -> DtarW { + DtarW::new(self, 9) } #[doc = "Bit 10 - DTI Fault Action on Timer Stop"] #[inline(always)] #[must_use] - pub fn dtfats(&mut self) -> DTFATS_W<10> { - DTFATS_W::new(self) + pub fn dtfats(&mut self) -> DtfatsW { + DtfatsW::new(self, 10) } #[doc = "Bit 11 - DTI PRS Source Enable"] #[inline(always)] #[must_use] - pub fn dtprsen(&mut self) -> DTPRSEN_W<11> { - DTPRSEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtprsen(&mut self) -> DtprsenW { + DtprsenW::new(self, 11) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtcfg](index.html) module"] -pub struct DTCFG_SPEC; -impl crate::RegisterSpec for DTCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtcfgSpec; +impl crate::RegisterSpec for DtcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtcfg::R](R) reader structure"] -impl crate::Readable for DTCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtcfg::W](W) writer structure"] -impl crate::Writable for DTCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtcfg::R`](R) reader structure"] +impl crate::Readable for DtcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dtcfg::W`](W) writer structure"] +impl crate::Writable for DtcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTCFG to value 0"] -impl crate::Resettable for DTCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtctrl.rs index 816a05e..84f6d17 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtctrl.rs @@ -1,95 +1,55 @@ #[doc = "Register `DTCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTCINV` reader - DTI Complementary Output Invert."] -pub type DTCINV_R = crate::BitReader; +pub type DtcinvR = crate::BitReader; #[doc = "Field `DTCINV` writer - DTI Complementary Output Invert."] -pub type DTCINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, O>; +pub type DtcinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTIPOL` reader - DTI Inactive Polarity"] -pub type DTIPOL_R = crate::BitReader; +pub type DtipolR = crate::BitReader; #[doc = "Field `DTIPOL` writer - DTI Inactive Polarity"] -pub type DTIPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, O>; +pub type DtipolW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI Complementary Output Invert."] #[inline(always)] - pub fn dtcinv(&self) -> DTCINV_R { - DTCINV_R::new((self.bits & 1) != 0) + pub fn dtcinv(&self) -> DtcinvR { + DtcinvR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI Inactive Polarity"] #[inline(always)] - pub fn dtipol(&self) -> DTIPOL_R { - DTIPOL_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtipol(&self) -> DtipolR { + DtipolR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI Complementary Output Invert."] #[inline(always)] #[must_use] - pub fn dtcinv(&mut self) -> DTCINV_W<0> { - DTCINV_W::new(self) + pub fn dtcinv(&mut self) -> DtcinvW { + DtcinvW::new(self, 0) } #[doc = "Bit 1 - DTI Inactive Polarity"] #[inline(always)] #[must_use] - pub fn dtipol(&mut self) -> DTIPOL_W<1> { - DTIPOL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtipol(&mut self) -> DtipolW { + DtipolW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtctrl](index.html) module"] -pub struct DTCTRL_SPEC; -impl crate::RegisterSpec for DTCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtctrlSpec; +impl crate::RegisterSpec for DtctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtctrl::R](R) reader structure"] -impl crate::Readable for DTCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtctrl::W](W) writer structure"] -impl crate::Writable for DTCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtctrl::R`](R) reader structure"] +impl crate::Readable for DtctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`dtctrl::W`](W) writer structure"] +impl crate::Writable for DtctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTCTRL to value 0"] -impl crate::Resettable for DTCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtfault.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtfault.rs index 01a53f9..ecd21aa 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtfault.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtfault.rs @@ -1,65 +1,50 @@ #[doc = "Register `DTFAULT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DTPRS0F` reader - DTI PRS 0 Fault"] -pub type DTPRS0F_R = crate::BitReader; +pub type Dtprs0fR = crate::BitReader; #[doc = "Field `DTPRS1F` reader - DTI PRS 1 Fault"] -pub type DTPRS1F_R = crate::BitReader; +pub type Dtprs1fR = crate::BitReader; #[doc = "Field `DTDBGF` reader - DTI Debugger Fault"] -pub type DTDBGF_R = crate::BitReader; +pub type DtdbgfR = crate::BitReader; #[doc = "Field `DTLOCKUPF` reader - DTI Lockup Fault"] -pub type DTLOCKUPF_R = crate::BitReader; +pub type DtlockupfR = crate::BitReader; #[doc = "Field `DTEM23F` reader - DTI EM23 Entry Fault"] -pub type DTEM23F_R = crate::BitReader; +pub type Dtem23fR = crate::BitReader; impl R { #[doc = "Bit 0 - DTI PRS 0 Fault"] #[inline(always)] - pub fn dtprs0f(&self) -> DTPRS0F_R { - DTPRS0F_R::new((self.bits & 1) != 0) + pub fn dtprs0f(&self) -> Dtprs0fR { + Dtprs0fR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI PRS 1 Fault"] #[inline(always)] - pub fn dtprs1f(&self) -> DTPRS1F_R { - DTPRS1F_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtprs1f(&self) -> Dtprs1fR { + Dtprs1fR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DTI Debugger Fault"] #[inline(always)] - pub fn dtdbgf(&self) -> DTDBGF_R { - DTDBGF_R::new(((self.bits >> 2) & 1) != 0) + pub fn dtdbgf(&self) -> DtdbgfR { + DtdbgfR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DTI Lockup Fault"] #[inline(always)] - pub fn dtlockupf(&self) -> DTLOCKUPF_R { - DTLOCKUPF_R::new(((self.bits >> 3) & 1) != 0) + pub fn dtlockupf(&self) -> DtlockupfR { + DtlockupfR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - DTI EM23 Entry Fault"] #[inline(always)] - pub fn dtem23f(&self) -> DTEM23F_R { - DTEM23F_R::new(((self.bits >> 4) & 1) != 0) + pub fn dtem23f(&self) -> Dtem23fR { + Dtem23fR::new(((self.bits >> 4) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfault](index.html) module"] -pub struct DTFAULT_SPEC; -impl crate::RegisterSpec for DTFAULT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfault::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfaultSpec; +impl crate::RegisterSpec for DtfaultSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtfault::R](R) reader structure"] -impl crate::Readable for DTFAULT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`dtfault::R`](R) reader structure"] +impl crate::Readable for DtfaultSpec {} #[doc = "`reset()` method sets DTFAULT to value 0"] -impl crate::Resettable for DTFAULT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfaultSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtfaultc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtfaultc.rs index 1c3d1ba..bcb21e2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtfaultc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtfaultc.rs @@ -1,84 +1,59 @@ #[doc = "Register `DTFAULTC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTPRS0FC` writer - DTI PRS0 Fault Clear"] -pub type DTPRS0FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtprs0fcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRS1FC` writer - DTI PRS1 Fault Clear"] -pub type DTPRS1FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtprs1fcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTDBGFC` writer - DTI Debugger Fault Clear"] -pub type DTDBGFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type DtdbgfcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTLOCKUPFC` writer - DTI Lockup Fault Clear"] -pub type DTLOCKUPFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type DtlockupfcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTEM23FC` writer - DTI EM23 Fault Clear"] -pub type DTEM23FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtem23fcW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - DTI PRS0 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtprs0fc(&mut self) -> DTPRS0FC_W<0> { - DTPRS0FC_W::new(self) + pub fn dtprs0fc(&mut self) -> Dtprs0fcW { + Dtprs0fcW::new(self, 0) } #[doc = "Bit 1 - DTI PRS1 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtprs1fc(&mut self) -> DTPRS1FC_W<1> { - DTPRS1FC_W::new(self) + pub fn dtprs1fc(&mut self) -> Dtprs1fcW { + Dtprs1fcW::new(self, 1) } #[doc = "Bit 2 - DTI Debugger Fault Clear"] #[inline(always)] #[must_use] - pub fn dtdbgfc(&mut self) -> DTDBGFC_W<2> { - DTDBGFC_W::new(self) + pub fn dtdbgfc(&mut self) -> DtdbgfcW { + DtdbgfcW::new(self, 2) } #[doc = "Bit 3 - DTI Lockup Fault Clear"] #[inline(always)] #[must_use] - pub fn dtlockupfc(&mut self) -> DTLOCKUPFC_W<3> { - DTLOCKUPFC_W::new(self) + pub fn dtlockupfc(&mut self) -> DtlockupfcW { + DtlockupfcW::new(self, 3) } #[doc = "Bit 4 - DTI EM23 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtem23fc(&mut self) -> DTEM23FC_W<4> { - DTEM23FC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtem23fc(&mut self) -> Dtem23fcW { + Dtem23fcW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfaultc](index.html) module"] -pub struct DTFAULTC_SPEC; -impl crate::RegisterSpec for DTFAULTC_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfaultc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfaultcSpec; +impl crate::RegisterSpec for DtfaultcSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [dtfaultc::W](W) writer structure"] -impl crate::Writable for DTFAULTC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`dtfaultc::W`](W) writer structure"] +impl crate::Writable for DtfaultcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTFAULTC to value 0"] -impl crate::Resettable for DTFAULTC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfaultcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtfcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtfcfg.rs index 91dee4b..6179df8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtfcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtfcfg.rs @@ -1,229 +1,197 @@ #[doc = "Register `DTFCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTFCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DTFA` reader - DTI Fault Action"] -pub type DTFA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DTI Fault Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DTFA_A { +pub enum Dtfa { #[doc = "0: No action on fault"] - NONE = 0, + None = 0, #[doc = "1: Set outputs inactive"] - INACTIVE = 1, + Inactive = 1, #[doc = "2: Clear outputs"] - CLEAR = 2, + Clear = 2, #[doc = "3: Tristate outputs"] - TRISTATE = 3, + Tristate = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DTFA_A) -> Self { + fn from(variant: Dtfa) -> Self { variant as _ } } -impl DTFA_R { +impl crate::FieldSpec for Dtfa { + type Ux = u8; +} +impl crate::IsEnum for Dtfa {} +#[doc = "Field `DTFA` reader - DTI Fault Action"] +pub type DtfaR = crate::FieldReader; +impl DtfaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTFA_A { + pub const fn variant(&self) -> Dtfa { match self.bits { - 0 => DTFA_A::NONE, - 1 => DTFA_A::INACTIVE, - 2 => DTFA_A::CLEAR, - 3 => DTFA_A::TRISTATE, + 0 => Dtfa::None, + 1 => Dtfa::Inactive, + 2 => Dtfa::Clear, + 3 => Dtfa::Tristate, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on fault"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == DTFA_A::NONE + *self == Dtfa::None } - #[doc = "Checks if the value of the field is `INACTIVE`"] + #[doc = "Set outputs inactive"] #[inline(always)] pub fn is_inactive(&self) -> bool { - *self == DTFA_A::INACTIVE + *self == Dtfa::Inactive } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear outputs"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == DTFA_A::CLEAR + *self == Dtfa::Clear } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "Tristate outputs"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == DTFA_A::TRISTATE + *self == Dtfa::Tristate } } #[doc = "Field `DTFA` writer - DTI Fault Action"] -pub type DTFA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, DTFCFG_SPEC, u8, DTFA_A, 2, O>; -impl<'a, const O: u8> DTFA_W<'a, O> { +pub type DtfaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dtfa, crate::Safe>; +impl<'a, REG> DtfaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on fault"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(DTFA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Dtfa::None) } #[doc = "Set outputs inactive"] #[inline(always)] - pub fn inactive(self) -> &'a mut W { - self.variant(DTFA_A::INACTIVE) + pub fn inactive(self) -> &'a mut crate::W { + self.variant(Dtfa::Inactive) } #[doc = "Clear outputs"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(DTFA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Dtfa::Clear) } #[doc = "Tristate outputs"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(DTFA_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Dtfa::Tristate) } } #[doc = "Field `DTPRS0FEN` reader - DTI PRS 0 Fault Enable"] -pub type DTPRS0FEN_R = crate::BitReader; +pub type Dtprs0fenR = crate::BitReader; #[doc = "Field `DTPRS0FEN` writer - DTI PRS 0 Fault Enable"] -pub type DTPRS0FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtprs0fenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRS1FEN` reader - DTI PRS 1 Fault Enable"] -pub type DTPRS1FEN_R = crate::BitReader; +pub type Dtprs1fenR = crate::BitReader; #[doc = "Field `DTPRS1FEN` writer - DTI PRS 1 Fault Enable"] -pub type DTPRS1FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtprs1fenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTDBGFEN` reader - DTI Debugger Fault Enable"] -pub type DTDBGFEN_R = crate::BitReader; +pub type DtdbgfenR = crate::BitReader; #[doc = "Field `DTDBGFEN` writer - DTI Debugger Fault Enable"] -pub type DTDBGFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type DtdbgfenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTLOCKUPFEN` reader - DTI Lockup Fault Enable"] -pub type DTLOCKUPFEN_R = crate::BitReader; +pub type DtlockupfenR = crate::BitReader; #[doc = "Field `DTLOCKUPFEN` writer - DTI Lockup Fault Enable"] -pub type DTLOCKUPFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type DtlockupfenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTEM23FEN` reader - DTI EM23 Fault Enable"] -pub type DTEM23FEN_R = crate::BitReader; +pub type Dtem23fenR = crate::BitReader; #[doc = "Field `DTEM23FEN` writer - DTI EM23 Fault Enable"] -pub type DTEM23FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtem23fenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 16:17 - DTI Fault Action"] #[inline(always)] - pub fn dtfa(&self) -> DTFA_R { - DTFA_R::new(((self.bits >> 16) & 3) as u8) + pub fn dtfa(&self) -> DtfaR { + DtfaR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 24 - DTI PRS 0 Fault Enable"] #[inline(always)] - pub fn dtprs0fen(&self) -> DTPRS0FEN_R { - DTPRS0FEN_R::new(((self.bits >> 24) & 1) != 0) + pub fn dtprs0fen(&self) -> Dtprs0fenR { + Dtprs0fenR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - DTI PRS 1 Fault Enable"] #[inline(always)] - pub fn dtprs1fen(&self) -> DTPRS1FEN_R { - DTPRS1FEN_R::new(((self.bits >> 25) & 1) != 0) + pub fn dtprs1fen(&self) -> Dtprs1fenR { + Dtprs1fenR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - DTI Debugger Fault Enable"] #[inline(always)] - pub fn dtdbgfen(&self) -> DTDBGFEN_R { - DTDBGFEN_R::new(((self.bits >> 26) & 1) != 0) + pub fn dtdbgfen(&self) -> DtdbgfenR { + DtdbgfenR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - DTI Lockup Fault Enable"] #[inline(always)] - pub fn dtlockupfen(&self) -> DTLOCKUPFEN_R { - DTLOCKUPFEN_R::new(((self.bits >> 27) & 1) != 0) + pub fn dtlockupfen(&self) -> DtlockupfenR { + DtlockupfenR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - DTI EM23 Fault Enable"] #[inline(always)] - pub fn dtem23fen(&self) -> DTEM23FEN_R { - DTEM23FEN_R::new(((self.bits >> 28) & 1) != 0) + pub fn dtem23fen(&self) -> Dtem23fenR { + Dtem23fenR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bits 16:17 - DTI Fault Action"] #[inline(always)] #[must_use] - pub fn dtfa(&mut self) -> DTFA_W<16> { - DTFA_W::new(self) + pub fn dtfa(&mut self) -> DtfaW { + DtfaW::new(self, 16) } #[doc = "Bit 24 - DTI PRS 0 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtprs0fen(&mut self) -> DTPRS0FEN_W<24> { - DTPRS0FEN_W::new(self) + pub fn dtprs0fen(&mut self) -> Dtprs0fenW { + Dtprs0fenW::new(self, 24) } #[doc = "Bit 25 - DTI PRS 1 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtprs1fen(&mut self) -> DTPRS1FEN_W<25> { - DTPRS1FEN_W::new(self) + pub fn dtprs1fen(&mut self) -> Dtprs1fenW { + Dtprs1fenW::new(self, 25) } #[doc = "Bit 26 - DTI Debugger Fault Enable"] #[inline(always)] #[must_use] - pub fn dtdbgfen(&mut self) -> DTDBGFEN_W<26> { - DTDBGFEN_W::new(self) + pub fn dtdbgfen(&mut self) -> DtdbgfenW { + DtdbgfenW::new(self, 26) } #[doc = "Bit 27 - DTI Lockup Fault Enable"] #[inline(always)] #[must_use] - pub fn dtlockupfen(&mut self) -> DTLOCKUPFEN_W<27> { - DTLOCKUPFEN_W::new(self) + pub fn dtlockupfen(&mut self) -> DtlockupfenW { + DtlockupfenW::new(self, 27) } #[doc = "Bit 28 - DTI EM23 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtem23fen(&mut self) -> DTEM23FEN_W<28> { - DTEM23FEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtem23fen(&mut self) -> Dtem23fenW { + Dtem23fenW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfcfg](index.html) module"] -pub struct DTFCFG_SPEC; -impl crate::RegisterSpec for DTFCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfcfgSpec; +impl crate::RegisterSpec for DtfcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtfcfg::R](R) reader structure"] -impl crate::Readable for DTFCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtfcfg::W](W) writer structure"] -impl crate::Writable for DTFCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtfcfg::R`](R) reader structure"] +impl crate::Readable for DtfcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dtfcfg::W`](W) writer structure"] +impl crate::Writable for DtfcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTFCFG to value 0"] -impl crate::Resettable for DTFCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtlock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtlock.rs index 434789a..5ce63f5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtlock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtlock.rs @@ -1,73 +1,55 @@ #[doc = "Register `DTLOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "DTI Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum DTILOCKKEY_AW { +pub enum Dtilockkey { #[doc = "52864: Write to unlock TIMER DTI registers"] - UNLOCK = 52864, + Unlock = 52864, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: DTILOCKKEY_AW) -> Self { + fn from(variant: Dtilockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Dtilockkey { + type Ux = u16; +} +impl crate::IsEnum for Dtilockkey {} #[doc = "Field `DTILOCKKEY` writer - DTI Lock Key"] -pub type DTILOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, DTLOCK_SPEC, u16, DTILOCKKEY_AW, 16, O>; -impl<'a, const O: u8> DTILOCKKEY_W<'a, O> { +pub type DtilockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Dtilockkey>; +impl<'a, REG> DtilockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unlock TIMER DTI registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(DTILOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Dtilockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - DTI Lock Key"] #[inline(always)] #[must_use] - pub fn dtilockkey(&mut self) -> DTILOCKKEY_W<0> { - DTILOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtilockkey(&mut self) -> DtilockkeyW { + DtilockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtlock](index.html) module"] -pub struct DTLOCK_SPEC; -impl crate::RegisterSpec for DTLOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtlock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtlockSpec; +impl crate::RegisterSpec for DtlockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [dtlock::W](W) writer structure"] -impl crate::Writable for DTLOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`dtlock::W`](W) writer structure"] +impl crate::Writable for DtlockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTLOCK to value 0"] -impl crate::Resettable for DTLOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtlockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtogen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtogen.rs index 818b4bb..35926ca 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtogen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dtogen.rs @@ -1,155 +1,115 @@ #[doc = "Register `DTOGEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTOGEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTOGCC0EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC0EN_R = crate::BitReader; +pub type Dtogcc0enR = crate::BitReader; #[doc = "Field `DTOGCC0EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCC1EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC1EN_R = crate::BitReader; +pub type Dtogcc1enR = crate::BitReader; #[doc = "Field `DTOGCC1EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCC2EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC2EN_R = crate::BitReader; +pub type Dtogcc2enR = crate::BitReader; #[doc = "Field `DTOGCC2EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC2EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc2enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI0EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI0EN_R = crate::BitReader; +pub type Dtogcdti0enR = crate::BitReader; #[doc = "Field `DTOGCDTI0EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI1EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI1EN_R = crate::BitReader; +pub type Dtogcdti1enR = crate::BitReader; #[doc = "Field `DTOGCDTI1EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI2EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI2EN_R = crate::BitReader; +pub type Dtogcdti2enR = crate::BitReader; #[doc = "Field `DTOGCDTI2EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI2EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti2enW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc0en(&self) -> DTOGCC0EN_R { - DTOGCC0EN_R::new((self.bits & 1) != 0) + pub fn dtogcc0en(&self) -> Dtogcc0enR { + Dtogcc0enR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc1en(&self) -> DTOGCC1EN_R { - DTOGCC1EN_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtogcc1en(&self) -> Dtogcc1enR { + Dtogcc1enR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc2en(&self) -> DTOGCC2EN_R { - DTOGCC2EN_R::new(((self.bits >> 2) & 1) != 0) + pub fn dtogcc2en(&self) -> Dtogcc2enR { + Dtogcc2enR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti0en(&self) -> DTOGCDTI0EN_R { - DTOGCDTI0EN_R::new(((self.bits >> 3) & 1) != 0) + pub fn dtogcdti0en(&self) -> Dtogcdti0enR { + Dtogcdti0enR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti1en(&self) -> DTOGCDTI1EN_R { - DTOGCDTI1EN_R::new(((self.bits >> 4) & 1) != 0) + pub fn dtogcdti1en(&self) -> Dtogcdti1enR { + Dtogcdti1enR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti2en(&self) -> DTOGCDTI2EN_R { - DTOGCDTI2EN_R::new(((self.bits >> 5) & 1) != 0) + pub fn dtogcdti2en(&self) -> Dtogcdti2enR { + Dtogcdti2enR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc0en(&mut self) -> DTOGCC0EN_W<0> { - DTOGCC0EN_W::new(self) + pub fn dtogcc0en(&mut self) -> Dtogcc0enW { + Dtogcc0enW::new(self, 0) } #[doc = "Bit 1 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc1en(&mut self) -> DTOGCC1EN_W<1> { - DTOGCC1EN_W::new(self) + pub fn dtogcc1en(&mut self) -> Dtogcc1enW { + Dtogcc1enW::new(self, 1) } #[doc = "Bit 2 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc2en(&mut self) -> DTOGCC2EN_W<2> { - DTOGCC2EN_W::new(self) + pub fn dtogcc2en(&mut self) -> Dtogcc2enW { + Dtogcc2enW::new(self, 2) } #[doc = "Bit 3 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti0en(&mut self) -> DTOGCDTI0EN_W<3> { - DTOGCDTI0EN_W::new(self) + pub fn dtogcdti0en(&mut self) -> Dtogcdti0enW { + Dtogcdti0enW::new(self, 3) } #[doc = "Bit 4 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti1en(&mut self) -> DTOGCDTI1EN_W<4> { - DTOGCDTI1EN_W::new(self) + pub fn dtogcdti1en(&mut self) -> Dtogcdti1enW { + Dtogcdti1enW::new(self, 4) } #[doc = "Bit 5 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti2en(&mut self) -> DTOGCDTI2EN_W<5> { - DTOGCDTI2EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtogcdti2en(&mut self) -> Dtogcdti2enW { + Dtogcdti2enW::new(self, 5) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtogen](index.html) module"] -pub struct DTOGEN_SPEC; -impl crate::RegisterSpec for DTOGEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtogen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtogen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtogenSpec; +impl crate::RegisterSpec for DtogenSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtogen::R](R) reader structure"] -impl crate::Readable for DTOGEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtogen::W](W) writer structure"] -impl crate::Writable for DTOGEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtogen::R`](R) reader structure"] +impl crate::Readable for DtogenSpec {} +#[doc = "`write(|w| ..)` method takes [`dtogen::W`](W) writer structure"] +impl crate::Writable for DtogenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTOGEN to value 0"] -impl crate::Resettable for DTOGEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtogenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dttimecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dttimecfg.rs index 63e4c73..9577f86 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dttimecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/dttimecfg.rs @@ -1,110 +1,70 @@ #[doc = "Register `DTTIMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTTIMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTPRESC` reader - DTI Prescaler Setting"] -pub type DTPRESC_R = crate::FieldReader; +pub type DtprescR = crate::FieldReader; #[doc = "Field `DTPRESC` writer - DTI Prescaler Setting"] -pub type DTPRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u16, u16, 10, O>; +pub type DtprescW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `DTRISET` reader - DTI Rise-time"] -pub type DTRISET_R = crate::FieldReader; +pub type DtrisetR = crate::FieldReader; #[doc = "Field `DTRISET` writer - DTI Rise-time"] -pub type DTRISET_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u8, u8, 6, O>; +pub type DtrisetW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `DTFALLT` reader - DTI Fall-time"] -pub type DTFALLT_R = crate::FieldReader; +pub type DtfalltR = crate::FieldReader; #[doc = "Field `DTFALLT` writer - DTI Fall-time"] -pub type DTFALLT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u8, u8, 6, O>; +pub type DtfalltW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:9 - DTI Prescaler Setting"] #[inline(always)] - pub fn dtpresc(&self) -> DTPRESC_R { - DTPRESC_R::new((self.bits & 0x03ff) as u16) + pub fn dtpresc(&self) -> DtprescR { + DtprescR::new((self.bits & 0x03ff) as u16) } #[doc = "Bits 10:15 - DTI Rise-time"] #[inline(always)] - pub fn dtriset(&self) -> DTRISET_R { - DTRISET_R::new(((self.bits >> 10) & 0x3f) as u8) + pub fn dtriset(&self) -> DtrisetR { + DtrisetR::new(((self.bits >> 10) & 0x3f) as u8) } #[doc = "Bits 16:21 - DTI Fall-time"] #[inline(always)] - pub fn dtfallt(&self) -> DTFALLT_R { - DTFALLT_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn dtfallt(&self) -> DtfalltR { + DtfalltR::new(((self.bits >> 16) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:9 - DTI Prescaler Setting"] #[inline(always)] #[must_use] - pub fn dtpresc(&mut self) -> DTPRESC_W<0> { - DTPRESC_W::new(self) + pub fn dtpresc(&mut self) -> DtprescW { + DtprescW::new(self, 0) } #[doc = "Bits 10:15 - DTI Rise-time"] #[inline(always)] #[must_use] - pub fn dtriset(&mut self) -> DTRISET_W<10> { - DTRISET_W::new(self) + pub fn dtriset(&mut self) -> DtrisetW { + DtrisetW::new(self, 10) } #[doc = "Bits 16:21 - DTI Fall-time"] #[inline(always)] #[must_use] - pub fn dtfallt(&mut self) -> DTFALLT_W<16> { - DTFALLT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtfallt(&mut self) -> DtfalltW { + DtfalltW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dttimecfg](index.html) module"] -pub struct DTTIMECFG_SPEC; -impl crate::RegisterSpec for DTTIMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dttimecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dttimecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DttimecfgSpec; +impl crate::RegisterSpec for DttimecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dttimecfg::R](R) reader structure"] -impl crate::Readable for DTTIMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dttimecfg::W](W) writer structure"] -impl crate::Writable for DTTIMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dttimecfg::R`](R) reader structure"] +impl crate::Readable for DttimecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dttimecfg::W`](W) writer structure"] +impl crate::Writable for DttimecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTTIMECFG to value 0"] -impl crate::Resettable for DTTIMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DttimecfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/en.rs index 9392483..303507b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Timer Module Enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Timer Module Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Timer Module Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Timer Module Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/ien.rs index 66588d7..73273ef 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/ien.rs @@ -1,290 +1,250 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OF` reader - Overflow Interrupt Enable"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Enable"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UF` reader - Underflow Interrupt Enable"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Enable"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DIRCHG` reader - Direction Change Detect Interrupt Enable"] -pub type DIRCHG_R = crate::BitReader; +pub type DirchgR = crate::BitReader; #[doc = "Field `DIRCHG` writer - Direction Change Detect Interrupt Enable"] -pub type DIRCHG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type DirchgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC0` reader - CC0 Interrupt Enable"] -pub type CC0_R = crate::BitReader; +pub type Cc0R = crate::BitReader; #[doc = "Field `CC0` writer - CC0 Interrupt Enable"] -pub type CC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1` reader - CC1 Interrupt Enable"] -pub type CC1_R = crate::BitReader; +pub type Cc1R = crate::BitReader; #[doc = "Field `CC1` writer - CC1 Interrupt Enable"] -pub type CC1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2` reader - CC2 Interrupt Enable"] -pub type CC2_R = crate::BitReader; +pub type Cc2R = crate::BitReader; #[doc = "Field `CC2` writer - CC2 Interrupt Enable"] -pub type CC2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL0` reader - ICFWLFULL0 Interrupt Enable"] -pub type ICFWLFULL0_R = crate::BitReader; +pub type Icfwlfull0R = crate::BitReader; #[doc = "Field `ICFWLFULL0` writer - ICFWLFULL0 Interrupt Enable"] -pub type ICFWLFULL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL1` reader - ICFWLFULL1 Interrupt Enable"] -pub type ICFWLFULL1_R = crate::BitReader; +pub type Icfwlfull1R = crate::BitReader; #[doc = "Field `ICFWLFULL1` writer - ICFWLFULL1 Interrupt Enable"] -pub type ICFWLFULL1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL2` reader - ICFWLFULL2 Interrupt Enable"] -pub type ICFWLFULL2_R = crate::BitReader; +pub type Icfwlfull2R = crate::BitReader; #[doc = "Field `ICFWLFULL2` writer - ICFWLFULL2 Interrupt Enable"] -pub type ICFWLFULL2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF0` reader - ICFOF0 Interrupt Enable"] -pub type ICFOF0_R = crate::BitReader; +pub type Icfof0R = crate::BitReader; #[doc = "Field `ICFOF0` writer - ICFOF0 Interrupt Enable"] -pub type ICFOF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF1` reader - ICFOF1 Interrupt Enable"] -pub type ICFOF1_R = crate::BitReader; +pub type Icfof1R = crate::BitReader; #[doc = "Field `ICFOF1` writer - ICFOF1 Interrupt Enable"] -pub type ICFOF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF2` reader - ICFOF2 Interrupt Enable"] -pub type ICFOF2_R = crate::BitReader; +pub type Icfof2R = crate::BitReader; #[doc = "Field `ICFOF2` writer - ICFOF2 Interrupt Enable"] -pub type ICFOF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF0` reader - ICFUF0 Interrupt Enable"] -pub type ICFUF0_R = crate::BitReader; +pub type Icfuf0R = crate::BitReader; #[doc = "Field `ICFUF0` writer - ICFUF0 Interrupt Enable"] -pub type ICFUF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF1` reader - ICFUF1 Interrupt Enable"] -pub type ICFUF1_R = crate::BitReader; +pub type Icfuf1R = crate::BitReader; #[doc = "Field `ICFUF1` writer - ICFUF1 Interrupt Enable"] -pub type ICFUF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF2` reader - ICFUF2 Interrupt Enable"] -pub type ICFUF2_R = crate::BitReader; +pub type Icfuf2R = crate::BitReader; #[doc = "Field `ICFUF2` writer - ICFUF2 Interrupt Enable"] -pub type ICFUF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Enable"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new((self.bits & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Underflow Interrupt Enable"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new(((self.bits >> 1) & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Direction Change Detect Interrupt Enable"] #[inline(always)] - pub fn dirchg(&self) -> DIRCHG_R { - DIRCHG_R::new(((self.bits >> 2) & 1) != 0) + pub fn dirchg(&self) -> DirchgR { + DirchgR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - CC0 Interrupt Enable"] #[inline(always)] - pub fn cc0(&self) -> CC0_R { - CC0_R::new(((self.bits >> 4) & 1) != 0) + pub fn cc0(&self) -> Cc0R { + Cc0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CC1 Interrupt Enable"] #[inline(always)] - pub fn cc1(&self) -> CC1_R { - CC1_R::new(((self.bits >> 5) & 1) != 0) + pub fn cc1(&self) -> Cc1R { + Cc1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - CC2 Interrupt Enable"] #[inline(always)] - pub fn cc2(&self) -> CC2_R { - CC2_R::new(((self.bits >> 6) & 1) != 0) + pub fn cc2(&self) -> Cc2R { + Cc2R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 16 - ICFWLFULL0 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull0(&self) -> ICFWLFULL0_R { - ICFWLFULL0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfwlfull0(&self) -> Icfwlfull0R { + Icfwlfull0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - ICFWLFULL1 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull1(&self) -> ICFWLFULL1_R { - ICFWLFULL1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfwlfull1(&self) -> Icfwlfull1R { + Icfwlfull1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - ICFWLFULL2 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull2(&self) -> ICFWLFULL2_R { - ICFWLFULL2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfwlfull2(&self) -> Icfwlfull2R { + Icfwlfull2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - ICFOF0 Interrupt Enable"] #[inline(always)] - pub fn icfof0(&self) -> ICFOF0_R { - ICFOF0_R::new(((self.bits >> 20) & 1) != 0) + pub fn icfof0(&self) -> Icfof0R { + Icfof0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - ICFOF1 Interrupt Enable"] #[inline(always)] - pub fn icfof1(&self) -> ICFOF1_R { - ICFOF1_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfof1(&self) -> Icfof1R { + Icfof1R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - ICFOF2 Interrupt Enable"] #[inline(always)] - pub fn icfof2(&self) -> ICFOF2_R { - ICFOF2_R::new(((self.bits >> 22) & 1) != 0) + pub fn icfof2(&self) -> Icfof2R { + Icfof2R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 24 - ICFUF0 Interrupt Enable"] #[inline(always)] - pub fn icfuf0(&self) -> ICFUF0_R { - ICFUF0_R::new(((self.bits >> 24) & 1) != 0) + pub fn icfuf0(&self) -> Icfuf0R { + Icfuf0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - ICFUF1 Interrupt Enable"] #[inline(always)] - pub fn icfuf1(&self) -> ICFUF1_R { - ICFUF1_R::new(((self.bits >> 25) & 1) != 0) + pub fn icfuf1(&self) -> Icfuf1R { + Icfuf1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - ICFUF2 Interrupt Enable"] #[inline(always)] - pub fn icfuf2(&self) -> ICFUF2_R { - ICFUF2_R::new(((self.bits >> 26) & 1) != 0) + pub fn icfuf2(&self) -> Icfuf2R { + Icfuf2R::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<0> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 0) } #[doc = "Bit 1 - Underflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<1> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 1) } #[doc = "Bit 2 - Direction Change Detect Interrupt Enable"] #[inline(always)] #[must_use] - pub fn dirchg(&mut self) -> DIRCHG_W<2> { - DIRCHG_W::new(self) + pub fn dirchg(&mut self) -> DirchgW { + DirchgW::new(self, 2) } #[doc = "Bit 4 - CC0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc0(&mut self) -> CC0_W<4> { - CC0_W::new(self) + pub fn cc0(&mut self) -> Cc0W { + Cc0W::new(self, 4) } #[doc = "Bit 5 - CC1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc1(&mut self) -> CC1_W<5> { - CC1_W::new(self) + pub fn cc1(&mut self) -> Cc1W { + Cc1W::new(self, 5) } #[doc = "Bit 6 - CC2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc2(&mut self) -> CC2_W<6> { - CC2_W::new(self) + pub fn cc2(&mut self) -> Cc2W { + Cc2W::new(self, 6) } #[doc = "Bit 16 - ICFWLFULL0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull0(&mut self) -> ICFWLFULL0_W<16> { - ICFWLFULL0_W::new(self) + pub fn icfwlfull0(&mut self) -> Icfwlfull0W { + Icfwlfull0W::new(self, 16) } #[doc = "Bit 17 - ICFWLFULL1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull1(&mut self) -> ICFWLFULL1_W<17> { - ICFWLFULL1_W::new(self) + pub fn icfwlfull1(&mut self) -> Icfwlfull1W { + Icfwlfull1W::new(self, 17) } #[doc = "Bit 18 - ICFWLFULL2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull2(&mut self) -> ICFWLFULL2_W<18> { - ICFWLFULL2_W::new(self) + pub fn icfwlfull2(&mut self) -> Icfwlfull2W { + Icfwlfull2W::new(self, 18) } #[doc = "Bit 20 - ICFOF0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof0(&mut self) -> ICFOF0_W<20> { - ICFOF0_W::new(self) + pub fn icfof0(&mut self) -> Icfof0W { + Icfof0W::new(self, 20) } #[doc = "Bit 21 - ICFOF1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof1(&mut self) -> ICFOF1_W<21> { - ICFOF1_W::new(self) + pub fn icfof1(&mut self) -> Icfof1W { + Icfof1W::new(self, 21) } #[doc = "Bit 22 - ICFOF2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof2(&mut self) -> ICFOF2_W<22> { - ICFOF2_W::new(self) + pub fn icfof2(&mut self) -> Icfof2W { + Icfof2W::new(self, 22) } #[doc = "Bit 24 - ICFUF0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf0(&mut self) -> ICFUF0_W<24> { - ICFUF0_W::new(self) + pub fn icfuf0(&mut self) -> Icfuf0W { + Icfuf0W::new(self, 24) } #[doc = "Bit 25 - ICFUF1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf1(&mut self) -> ICFUF1_W<25> { - ICFUF1_W::new(self) + pub fn icfuf1(&mut self) -> Icfuf1W { + Icfuf1W::new(self, 25) } #[doc = "Bit 26 - ICFUF2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf2(&mut self) -> ICFUF2_W<26> { - ICFUF2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfuf2(&mut self) -> Icfuf2W { + Icfuf2W::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/if_.rs index edde0f3..fad1cd1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/if_.rs @@ -1,290 +1,250 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OF` reader - Overflow Interrupt Flag"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Flag"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UF` reader - Underflow Interrupt Flag"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Flag"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DIRCHG` reader - Direction Change Detect Interrupt Flag"] -pub type DIRCHG_R = crate::BitReader; +pub type DirchgR = crate::BitReader; #[doc = "Field `DIRCHG` writer - Direction Change Detect Interrupt Flag"] -pub type DIRCHG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type DirchgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC0` reader - Capture Compare Channel 0 Interrupt Flag"] -pub type CC0_R = crate::BitReader; +pub type Cc0R = crate::BitReader; #[doc = "Field `CC0` writer - Capture Compare Channel 0 Interrupt Flag"] -pub type CC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1` reader - Capture Compare Channel 1 Interrupt Flag"] -pub type CC1_R = crate::BitReader; +pub type Cc1R = crate::BitReader; #[doc = "Field `CC1` writer - Capture Compare Channel 1 Interrupt Flag"] -pub type CC1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2` reader - Capture Compare Channel 2 Interrupt Flag"] -pub type CC2_R = crate::BitReader; +pub type Cc2R = crate::BitReader; #[doc = "Field `CC2` writer - Capture Compare Channel 2 Interrupt Flag"] -pub type CC2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL0` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL0_R = crate::BitReader; +pub type Icfwlfull0R = crate::BitReader; #[doc = "Field `ICFWLFULL0` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL1` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL1_R = crate::BitReader; +pub type Icfwlfull1R = crate::BitReader; #[doc = "Field `ICFWLFULL1` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL2` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL2_R = crate::BitReader; +pub type Icfwlfull2R = crate::BitReader; #[doc = "Field `ICFWLFULL2` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF0` reader - Input Capture FIFO overflow"] -pub type ICFOF0_R = crate::BitReader; +pub type Icfof0R = crate::BitReader; #[doc = "Field `ICFOF0` writer - Input Capture FIFO overflow"] -pub type ICFOF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF1` reader - Input Capture FIFO overflow"] -pub type ICFOF1_R = crate::BitReader; +pub type Icfof1R = crate::BitReader; #[doc = "Field `ICFOF1` writer - Input Capture FIFO overflow"] -pub type ICFOF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF2` reader - Input Capture FIFO overflow"] -pub type ICFOF2_R = crate::BitReader; +pub type Icfof2R = crate::BitReader; #[doc = "Field `ICFOF2` writer - Input Capture FIFO overflow"] -pub type ICFOF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF0` reader - Input capture FIFO underflow"] -pub type ICFUF0_R = crate::BitReader; +pub type Icfuf0R = crate::BitReader; #[doc = "Field `ICFUF0` writer - Input capture FIFO underflow"] -pub type ICFUF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF1` reader - Input capture FIFO underflow"] -pub type ICFUF1_R = crate::BitReader; +pub type Icfuf1R = crate::BitReader; #[doc = "Field `ICFUF1` writer - Input capture FIFO underflow"] -pub type ICFUF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF2` reader - Input capture FIFO underflow"] -pub type ICFUF2_R = crate::BitReader; +pub type Icfuf2R = crate::BitReader; #[doc = "Field `ICFUF2` writer - Input capture FIFO underflow"] -pub type ICFUF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new((self.bits & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Underflow Interrupt Flag"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new(((self.bits >> 1) & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] - pub fn dirchg(&self) -> DIRCHG_R { - DIRCHG_R::new(((self.bits >> 2) & 1) != 0) + pub fn dirchg(&self) -> DirchgR { + DirchgR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Capture Compare Channel 0 Interrupt Flag"] #[inline(always)] - pub fn cc0(&self) -> CC0_R { - CC0_R::new(((self.bits >> 4) & 1) != 0) + pub fn cc0(&self) -> Cc0R { + Cc0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Capture Compare Channel 1 Interrupt Flag"] #[inline(always)] - pub fn cc1(&self) -> CC1_R { - CC1_R::new(((self.bits >> 5) & 1) != 0) + pub fn cc1(&self) -> Cc1R { + Cc1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Capture Compare Channel 2 Interrupt Flag"] #[inline(always)] - pub fn cc2(&self) -> CC2_R { - CC2_R::new(((self.bits >> 6) & 1) != 0) + pub fn cc2(&self) -> Cc2R { + Cc2R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 16 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull0(&self) -> ICFWLFULL0_R { - ICFWLFULL0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfwlfull0(&self) -> Icfwlfull0R { + Icfwlfull0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull1(&self) -> ICFWLFULL1_R { - ICFWLFULL1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfwlfull1(&self) -> Icfwlfull1R { + Icfwlfull1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull2(&self) -> ICFWLFULL2_R { - ICFWLFULL2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfwlfull2(&self) -> Icfwlfull2R { + Icfwlfull2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof0(&self) -> ICFOF0_R { - ICFOF0_R::new(((self.bits >> 20) & 1) != 0) + pub fn icfof0(&self) -> Icfof0R { + Icfof0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof1(&self) -> ICFOF1_R { - ICFOF1_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfof1(&self) -> Icfof1R { + Icfof1R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof2(&self) -> ICFOF2_R { - ICFOF2_R::new(((self.bits >> 22) & 1) != 0) + pub fn icfof2(&self) -> Icfof2R { + Icfof2R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 24 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf0(&self) -> ICFUF0_R { - ICFUF0_R::new(((self.bits >> 24) & 1) != 0) + pub fn icfuf0(&self) -> Icfuf0R { + Icfuf0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf1(&self) -> ICFUF1_R { - ICFUF1_R::new(((self.bits >> 25) & 1) != 0) + pub fn icfuf1(&self) -> Icfuf1R { + Icfuf1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf2(&self) -> ICFUF2_R { - ICFUF2_R::new(((self.bits >> 26) & 1) != 0) + pub fn icfuf2(&self) -> Icfuf2R { + Icfuf2R::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<0> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 0) } #[doc = "Bit 1 - Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<1> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 1) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] #[must_use] - pub fn dirchg(&mut self) -> DIRCHG_W<2> { - DIRCHG_W::new(self) + pub fn dirchg(&mut self) -> DirchgW { + DirchgW::new(self, 2) } #[doc = "Bit 4 - Capture Compare Channel 0 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc0(&mut self) -> CC0_W<4> { - CC0_W::new(self) + pub fn cc0(&mut self) -> Cc0W { + Cc0W::new(self, 4) } #[doc = "Bit 5 - Capture Compare Channel 1 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc1(&mut self) -> CC1_W<5> { - CC1_W::new(self) + pub fn cc1(&mut self) -> Cc1W { + Cc1W::new(self, 5) } #[doc = "Bit 6 - Capture Compare Channel 2 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc2(&mut self) -> CC2_W<6> { - CC2_W::new(self) + pub fn cc2(&mut self) -> Cc2W { + Cc2W::new(self, 6) } #[doc = "Bit 16 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull0(&mut self) -> ICFWLFULL0_W<16> { - ICFWLFULL0_W::new(self) + pub fn icfwlfull0(&mut self) -> Icfwlfull0W { + Icfwlfull0W::new(self, 16) } #[doc = "Bit 17 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull1(&mut self) -> ICFWLFULL1_W<17> { - ICFWLFULL1_W::new(self) + pub fn icfwlfull1(&mut self) -> Icfwlfull1W { + Icfwlfull1W::new(self, 17) } #[doc = "Bit 18 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull2(&mut self) -> ICFWLFULL2_W<18> { - ICFWLFULL2_W::new(self) + pub fn icfwlfull2(&mut self) -> Icfwlfull2W { + Icfwlfull2W::new(self, 18) } #[doc = "Bit 20 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof0(&mut self) -> ICFOF0_W<20> { - ICFOF0_W::new(self) + pub fn icfof0(&mut self) -> Icfof0W { + Icfof0W::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof1(&mut self) -> ICFOF1_W<21> { - ICFOF1_W::new(self) + pub fn icfof1(&mut self) -> Icfof1W { + Icfof1W::new(self, 21) } #[doc = "Bit 22 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof2(&mut self) -> ICFOF2_W<22> { - ICFOF2_W::new(self) + pub fn icfof2(&mut self) -> Icfof2W { + Icfof2W::new(self, 22) } #[doc = "Bit 24 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf0(&mut self) -> ICFUF0_W<24> { - ICFUF0_W::new(self) + pub fn icfuf0(&mut self) -> Icfuf0W { + Icfuf0W::new(self, 24) } #[doc = "Bit 25 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf1(&mut self) -> ICFUF1_W<25> { - ICFUF1_W::new(self) + pub fn icfuf1(&mut self) -> Icfuf1W { + Icfuf1W::new(self, 25) } #[doc = "Bit 26 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf2(&mut self) -> ICFUF2_W<26> { - ICFUF2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfuf2(&mut self) -> Icfuf2W { + Icfuf2W::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/ipversion.rs index fd8f758..0b161f8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/lock.rs index 4d444ca..4d6d1fe 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Timer Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "52864: Write to unlock TIMER registers"] - UNLOCK = 52864, + Unlock = 52864, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Timer Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unlock TIMER registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Timer Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/status.rs index 1a2964d..25d646e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/status.rs @@ -1,339 +1,324 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RUNNING` reader - Running"] -pub type RUNNING_R = crate::BitReader; -#[doc = "Field `DIR` reader - Direction"] -pub type DIR_R = crate::BitReader; +pub type RunningR = crate::BitReader; #[doc = "Direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DIR_A { +pub enum Dir { #[doc = "0: Counting up"] - UP = 0, + Up = 0, #[doc = "1: Counting down"] - DOWN = 1, + Down = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DIR_A) -> Self { + fn from(variant: Dir) -> Self { variant as u8 != 0 } } -impl DIR_R { +#[doc = "Field `DIR` reader - Direction"] +pub type DirR = crate::BitReader; +impl DirR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DIR_A { + pub const fn variant(&self) -> Dir { match self.bits { - false => DIR_A::UP, - true => DIR_A::DOWN, + false => Dir::Up, + true => Dir::Down, } } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Counting up"] #[inline(always)] pub fn is_up(&self) -> bool { - *self == DIR_A::UP + *self == Dir::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Counting down"] #[inline(always)] pub fn is_down(&self) -> bool { - *self == DIR_A::DOWN + *self == Dir::Down } } #[doc = "Field `TOPBV` reader - TOP Buffer Valid"] -pub type TOPBV_R = crate::BitReader; -#[doc = "Field `TIMERLOCKSTATUS` reader - Timer lock status"] -pub type TIMERLOCKSTATUS_R = crate::BitReader; +pub type TopbvR = crate::BitReader; #[doc = "Timer lock status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TIMERLOCKSTATUS_A { +pub enum Timerlockstatus { #[doc = "0: TIMER registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: TIMER registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TIMERLOCKSTATUS_A) -> Self { + fn from(variant: Timerlockstatus) -> Self { variant as u8 != 0 } } -impl TIMERLOCKSTATUS_R { +#[doc = "Field `TIMERLOCKSTATUS` reader - Timer lock status"] +pub type TimerlockstatusR = crate::BitReader; +impl TimerlockstatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TIMERLOCKSTATUS_A { + pub const fn variant(&self) -> Timerlockstatus { match self.bits { - false => TIMERLOCKSTATUS_A::UNLOCKED, - true => TIMERLOCKSTATUS_A::LOCKED, + false => Timerlockstatus::Unlocked, + true => Timerlockstatus::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "TIMER registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == TIMERLOCKSTATUS_A::UNLOCKED + *self == Timerlockstatus::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "TIMER registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == TIMERLOCKSTATUS_A::LOCKED + *self == Timerlockstatus::Locked } } -#[doc = "Field `DTILOCKSTATUS` reader - DTI lock status"] -pub type DTILOCKSTATUS_R = crate::BitReader; #[doc = "DTI lock status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DTILOCKSTATUS_A { +pub enum Dtilockstatus { #[doc = "0: DTI registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: DTI registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DTILOCKSTATUS_A) -> Self { + fn from(variant: Dtilockstatus) -> Self { variant as u8 != 0 } } -impl DTILOCKSTATUS_R { +#[doc = "Field `DTILOCKSTATUS` reader - DTI lock status"] +pub type DtilockstatusR = crate::BitReader; +impl DtilockstatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTILOCKSTATUS_A { + pub const fn variant(&self) -> Dtilockstatus { match self.bits { - false => DTILOCKSTATUS_A::UNLOCKED, - true => DTILOCKSTATUS_A::LOCKED, + false => Dtilockstatus::Unlocked, + true => Dtilockstatus::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "DTI registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == DTILOCKSTATUS_A::UNLOCKED + *self == Dtilockstatus::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "DTI registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == DTILOCKSTATUS_A::LOCKED + *self == Dtilockstatus::Locked } } #[doc = "Field `SYNCBUSY` reader - Sync Busy"] -pub type SYNCBUSY_R = crate::BitReader; +pub type SyncbusyR = crate::BitReader; #[doc = "Field `OCBV0` reader - Output Compare Buffer Valid"] -pub type OCBV0_R = crate::BitReader; +pub type Ocbv0R = crate::BitReader; #[doc = "Field `OCBV1` reader - Output Compare Buffer Valid"] -pub type OCBV1_R = crate::BitReader; +pub type Ocbv1R = crate::BitReader; #[doc = "Field `OCBV2` reader - Output Compare Buffer Valid"] -pub type OCBV2_R = crate::BitReader; +pub type Ocbv2R = crate::BitReader; #[doc = "Field `ICFEMPTY0` reader - Input capture fifo empty"] -pub type ICFEMPTY0_R = crate::BitReader; +pub type Icfempty0R = crate::BitReader; #[doc = "Field `ICFEMPTY1` reader - Input capture fifo empty"] -pub type ICFEMPTY1_R = crate::BitReader; +pub type Icfempty1R = crate::BitReader; #[doc = "Field `ICFEMPTY2` reader - Input capture fifo empty"] -pub type ICFEMPTY2_R = crate::BitReader; -#[doc = "Field `CCPOL0` reader - Compare/Capture Polarity"] -pub type CCPOL0_R = crate::BitReader; +pub type Icfempty2R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL0_A { +pub enum Ccpol0 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL0_A) -> Self { + fn from(variant: Ccpol0) -> Self { variant as u8 != 0 } } -impl CCPOL0_R { +#[doc = "Field `CCPOL0` reader - Compare/Capture Polarity"] +pub type Ccpol0R = crate::BitReader; +impl Ccpol0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL0_A { + pub const fn variant(&self) -> Ccpol0 { match self.bits { - false => CCPOL0_A::LOWRISE, - true => CCPOL0_A::HIGHFALL, + false => Ccpol0::Lowrise, + true => Ccpol0::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL0_A::LOWRISE + *self == Ccpol0::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL0_A::HIGHFALL + *self == Ccpol0::Highfall } } -#[doc = "Field `CCPOL1` reader - Compare/Capture Polarity"] -pub type CCPOL1_R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL1_A { +pub enum Ccpol1 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL1_A) -> Self { + fn from(variant: Ccpol1) -> Self { variant as u8 != 0 } } -impl CCPOL1_R { +#[doc = "Field `CCPOL1` reader - Compare/Capture Polarity"] +pub type Ccpol1R = crate::BitReader; +impl Ccpol1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL1_A { + pub const fn variant(&self) -> Ccpol1 { match self.bits { - false => CCPOL1_A::LOWRISE, - true => CCPOL1_A::HIGHFALL, + false => Ccpol1::Lowrise, + true => Ccpol1::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL1_A::LOWRISE + *self == Ccpol1::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL1_A::HIGHFALL + *self == Ccpol1::Highfall } } -#[doc = "Field `CCPOL2` reader - Compare/Capture Polarity"] -pub type CCPOL2_R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL2_A { +pub enum Ccpol2 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL2_A) -> Self { + fn from(variant: Ccpol2) -> Self { variant as u8 != 0 } } -impl CCPOL2_R { +#[doc = "Field `CCPOL2` reader - Compare/Capture Polarity"] +pub type Ccpol2R = crate::BitReader; +impl Ccpol2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL2_A { + pub const fn variant(&self) -> Ccpol2 { match self.bits { - false => CCPOL2_A::LOWRISE, - true => CCPOL2_A::HIGHFALL, + false => Ccpol2::Lowrise, + true => Ccpol2::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL2_A::LOWRISE + *self == Ccpol2::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL2_A::HIGHFALL + *self == Ccpol2::Highfall } } impl R { #[doc = "Bit 0 - Running"] #[inline(always)] - pub fn running(&self) -> RUNNING_R { - RUNNING_R::new((self.bits & 1) != 0) + pub fn running(&self) -> RunningR { + RunningR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Direction"] #[inline(always)] - pub fn dir(&self) -> DIR_R { - DIR_R::new(((self.bits >> 1) & 1) != 0) + pub fn dir(&self) -> DirR { + DirR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - TOP Buffer Valid"] #[inline(always)] - pub fn topbv(&self) -> TOPBV_R { - TOPBV_R::new(((self.bits >> 2) & 1) != 0) + pub fn topbv(&self) -> TopbvR { + TopbvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Timer lock status"] #[inline(always)] - pub fn timerlockstatus(&self) -> TIMERLOCKSTATUS_R { - TIMERLOCKSTATUS_R::new(((self.bits >> 4) & 1) != 0) + pub fn timerlockstatus(&self) -> TimerlockstatusR { + TimerlockstatusR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DTI lock status"] #[inline(always)] - pub fn dtilockstatus(&self) -> DTILOCKSTATUS_R { - DTILOCKSTATUS_R::new(((self.bits >> 5) & 1) != 0) + pub fn dtilockstatus(&self) -> DtilockstatusR { + DtilockstatusR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Sync Busy"] #[inline(always)] - pub fn syncbusy(&self) -> SYNCBUSY_R { - SYNCBUSY_R::new(((self.bits >> 6) & 1) != 0) + pub fn syncbusy(&self) -> SyncbusyR { + SyncbusyR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv0(&self) -> OCBV0_R { - OCBV0_R::new(((self.bits >> 8) & 1) != 0) + pub fn ocbv0(&self) -> Ocbv0R { + Ocbv0R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv1(&self) -> OCBV1_R { - OCBV1_R::new(((self.bits >> 9) & 1) != 0) + pub fn ocbv1(&self) -> Ocbv1R { + Ocbv1R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv2(&self) -> OCBV2_R { - OCBV2_R::new(((self.bits >> 10) & 1) != 0) + pub fn ocbv2(&self) -> Ocbv2R { + Ocbv2R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 16 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty0(&self) -> ICFEMPTY0_R { - ICFEMPTY0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfempty0(&self) -> Icfempty0R { + Icfempty0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty1(&self) -> ICFEMPTY1_R { - ICFEMPTY1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfempty1(&self) -> Icfempty1R { + Icfempty1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty2(&self) -> ICFEMPTY2_R { - ICFEMPTY2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfempty2(&self) -> Icfempty2R { + Icfempty2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 24 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol0(&self) -> CCPOL0_R { - CCPOL0_R::new(((self.bits >> 24) & 1) != 0) + pub fn ccpol0(&self) -> Ccpol0R { + Ccpol0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol1(&self) -> CCPOL1_R { - CCPOL1_R::new(((self.bits >> 25) & 1) != 0) + pub fn ccpol1(&self) -> Ccpol1R { + Ccpol1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol2(&self) -> CCPOL2_R { - CCPOL2_R::new(((self.bits >> 26) & 1) != 0) + pub fn ccpol2(&self) -> Ccpol2R { + Ccpol2R::new(((self.bits >> 26) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/top.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/top.rs index 65df306..6799f48 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/top.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/top.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOP` reader - Counter Top Value"] -pub type TOP_R = crate::FieldReader; +pub type TopR = crate::FieldReader; #[doc = "Field `TOP` writer - Counter Top Value"] -pub type TOP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOP_SPEC, u16, u16, 16, O>; +pub type TopW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Top Value"] #[inline(always)] - pub fn top(&self) -> TOP_R { - TOP_R::new((self.bits & 0xffff) as u16) + pub fn top(&self) -> TopR { + TopR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Top Value"] #[inline(always)] #[must_use] - pub fn top(&mut self) -> TOP_W<0> { - TOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn top(&mut self) -> TopW { + TopW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [top](index.html) module"] -pub struct TOP_SPEC; -impl crate::RegisterSpec for TOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopSpec; +impl crate::RegisterSpec for TopSpec { type Ux = u32; } -#[doc = "`read()` method returns [top::R](R) reader structure"] -impl crate::Readable for TOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [top::W](W) writer structure"] -impl crate::Writable for TOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`top::R`](R) reader structure"] +impl crate::Readable for TopSpec {} +#[doc = "`write(|w| ..)` method takes [`top::W`](W) writer structure"] +impl crate::Writable for TopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOP to value 0xffff"] -impl crate::Resettable for TOP_SPEC { - const RESET_VALUE: Self::Ux = 0xffff; +impl crate::Resettable for TopSpec { + const RESET_VALUE: u32 = 0xffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/topb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/topb.rs index 012fd04..e6c7e8c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/topb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer1_s/topb.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOPB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOPB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOPB` reader - Counter Top Buffer Register"] -pub type TOPB_R = crate::FieldReader; +pub type TopbR = crate::FieldReader; #[doc = "Field `TOPB` writer - Counter Top Buffer Register"] -pub type TOPB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOPB_SPEC, u16, u16, 16, O>; +pub type TopbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Top Buffer Register"] #[inline(always)] - pub fn topb(&self) -> TOPB_R { - TOPB_R::new((self.bits & 0xffff) as u16) + pub fn topb(&self) -> TopbR { + TopbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Top Buffer Register"] #[inline(always)] #[must_use] - pub fn topb(&mut self) -> TOPB_W<0> { - TOPB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn topb(&mut self) -> TopbW { + TopbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [topb](index.html) module"] -pub struct TOPB_SPEC; -impl crate::RegisterSpec for TOPB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopbSpec; +impl crate::RegisterSpec for TopbSpec { type Ux = u32; } -#[doc = "`read()` method returns [topb::R](R) reader structure"] -impl crate::Readable for TOPB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [topb::W](W) writer structure"] -impl crate::Writable for TOPB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`topb::R`](R) reader structure"] +impl crate::Readable for TopbSpec {} +#[doc = "`write(|w| ..)` method takes [`topb::W`](W) writer structure"] +impl crate::Writable for TopbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOPB to value 0"] -impl crate::Resettable for TOPB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TopbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns.rs index 50b1dd4..e4e8a9b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns.rs @@ -1,240 +1,470 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + cfg: Cfg, + ctrl: Ctrl, + cmd: Cmd, + status: Status, + if_: If, + ien: Ien, + top: Top, + topb: Topb, + cnt: Cnt, + _reserved10: [u8; 0x04], + lock: Lock, + en: En, + _reserved12: [u8; 0x2c], + cc0_cfg: Cc0Cfg, + cc0_ctrl: Cc0Ctrl, + cc0_oc: Cc0Oc, + _reserved15: [u8; 0x04], + cc0_ocb: Cc0Ocb, + cc0_icf: Cc0Icf, + cc0_icof: Cc0Icof, + _reserved18: [u8; 0x04], + cc1_cfg: Cc1Cfg, + cc1_ctrl: Cc1Ctrl, + cc1_oc: Cc1Oc, + _reserved21: [u8; 0x04], + cc1_ocb: Cc1Ocb, + cc1_icf: Cc1Icf, + cc1_icof: Cc1Icof, + _reserved24: [u8; 0x04], + cc2_cfg: Cc2Cfg, + cc2_ctrl: Cc2Ctrl, + cc2_oc: Cc2Oc, + _reserved27: [u8; 0x04], + cc2_ocb: Cc2Ocb, + cc2_icf: Cc2Icf, + cc2_icof: Cc2Icof, + _reserved30: [u8; 0x24], + dtcfg: Dtcfg, + dttimecfg: Dttimecfg, + dtfcfg: Dtfcfg, + dtctrl: Dtctrl, + dtogen: Dtogen, + dtfault: Dtfault, + dtfaultc: Dtfaultc, + dtlock: Dtlock, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x08 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x0c - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x10 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x14 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x18 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x1c - No Description"] - pub top: TOP, + #[inline(always)] + pub const fn top(&self) -> &Top { + &self.top + } #[doc = "0x20 - No Description"] - pub topb: TOPB, + #[inline(always)] + pub const fn topb(&self) -> &Topb { + &self.topb + } #[doc = "0x24 - No Description"] - pub cnt: CNT, - _reserved10: [u8; 0x04], + #[inline(always)] + pub const fn cnt(&self) -> &Cnt { + &self.cnt + } #[doc = "0x2c - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x30 - No Description"] - pub en: EN, - _reserved12: [u8; 0x2c], + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x60 - No Description"] - pub cc0_cfg: CC0_CFG, + #[inline(always)] + pub const fn cc0_cfg(&self) -> &Cc0Cfg { + &self.cc0_cfg + } #[doc = "0x64 - No Description"] - pub cc0_ctrl: CC0_CTRL, + #[inline(always)] + pub const fn cc0_ctrl(&self) -> &Cc0Ctrl { + &self.cc0_ctrl + } #[doc = "0x68 - No Description"] - pub cc0_oc: CC0_OC, - _reserved15: [u8; 0x04], + #[inline(always)] + pub const fn cc0_oc(&self) -> &Cc0Oc { + &self.cc0_oc + } #[doc = "0x70 - No Description"] - pub cc0_ocb: CC0_OCB, + #[inline(always)] + pub const fn cc0_ocb(&self) -> &Cc0Ocb { + &self.cc0_ocb + } #[doc = "0x74 - No Description"] - pub cc0_icf: CC0_ICF, + #[inline(always)] + pub const fn cc0_icf(&self) -> &Cc0Icf { + &self.cc0_icf + } #[doc = "0x78 - No Description"] - pub cc0_icof: CC0_ICOF, - _reserved18: [u8; 0x04], + #[inline(always)] + pub const fn cc0_icof(&self) -> &Cc0Icof { + &self.cc0_icof + } #[doc = "0x80 - No Description"] - pub cc1_cfg: CC1_CFG, + #[inline(always)] + pub const fn cc1_cfg(&self) -> &Cc1Cfg { + &self.cc1_cfg + } #[doc = "0x84 - No Description"] - pub cc1_ctrl: CC1_CTRL, + #[inline(always)] + pub const fn cc1_ctrl(&self) -> &Cc1Ctrl { + &self.cc1_ctrl + } #[doc = "0x88 - No Description"] - pub cc1_oc: CC1_OC, - _reserved21: [u8; 0x04], + #[inline(always)] + pub const fn cc1_oc(&self) -> &Cc1Oc { + &self.cc1_oc + } #[doc = "0x90 - No Description"] - pub cc1_ocb: CC1_OCB, + #[inline(always)] + pub const fn cc1_ocb(&self) -> &Cc1Ocb { + &self.cc1_ocb + } #[doc = "0x94 - No Description"] - pub cc1_icf: CC1_ICF, + #[inline(always)] + pub const fn cc1_icf(&self) -> &Cc1Icf { + &self.cc1_icf + } #[doc = "0x98 - No Description"] - pub cc1_icof: CC1_ICOF, - _reserved24: [u8; 0x04], + #[inline(always)] + pub const fn cc1_icof(&self) -> &Cc1Icof { + &self.cc1_icof + } #[doc = "0xa0 - No Description"] - pub cc2_cfg: CC2_CFG, + #[inline(always)] + pub const fn cc2_cfg(&self) -> &Cc2Cfg { + &self.cc2_cfg + } #[doc = "0xa4 - No Description"] - pub cc2_ctrl: CC2_CTRL, + #[inline(always)] + pub const fn cc2_ctrl(&self) -> &Cc2Ctrl { + &self.cc2_ctrl + } #[doc = "0xa8 - No Description"] - pub cc2_oc: CC2_OC, - _reserved27: [u8; 0x04], + #[inline(always)] + pub const fn cc2_oc(&self) -> &Cc2Oc { + &self.cc2_oc + } #[doc = "0xb0 - No Description"] - pub cc2_ocb: CC2_OCB, + #[inline(always)] + pub const fn cc2_ocb(&self) -> &Cc2Ocb { + &self.cc2_ocb + } #[doc = "0xb4 - No Description"] - pub cc2_icf: CC2_ICF, + #[inline(always)] + pub const fn cc2_icf(&self) -> &Cc2Icf { + &self.cc2_icf + } #[doc = "0xb8 - No Description"] - pub cc2_icof: CC2_ICOF, - _reserved30: [u8; 0x24], + #[inline(always)] + pub const fn cc2_icof(&self) -> &Cc2Icof { + &self.cc2_icof + } #[doc = "0xe0 - No Description"] - pub dtcfg: DTCFG, + #[inline(always)] + pub const fn dtcfg(&self) -> &Dtcfg { + &self.dtcfg + } #[doc = "0xe4 - No Description"] - pub dttimecfg: DTTIMECFG, + #[inline(always)] + pub const fn dttimecfg(&self) -> &Dttimecfg { + &self.dttimecfg + } #[doc = "0xe8 - No Description"] - pub dtfcfg: DTFCFG, + #[inline(always)] + pub const fn dtfcfg(&self) -> &Dtfcfg { + &self.dtfcfg + } #[doc = "0xec - No Description"] - pub dtctrl: DTCTRL, + #[inline(always)] + pub const fn dtctrl(&self) -> &Dtctrl { + &self.dtctrl + } #[doc = "0xf0 - No Description"] - pub dtogen: DTOGEN, + #[inline(always)] + pub const fn dtogen(&self) -> &Dtogen { + &self.dtogen + } #[doc = "0xf4 - No Description"] - pub dtfault: DTFAULT, + #[inline(always)] + pub const fn dtfault(&self) -> &Dtfault { + &self.dtfault + } #[doc = "0xf8 - No Description"] - pub dtfaultc: DTFAULTC, + #[inline(always)] + pub const fn dtfaultc(&self) -> &Dtfaultc { + &self.dtfaultc + } #[doc = "0xfc - No Description"] - pub dtlock: DTLOCK, + #[inline(always)] + pub const fn dtlock(&self) -> &Dtlock { + &self.dtlock + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "TOP (rw) register accessor: an alias for `Reg`"] -pub type TOP = crate::Reg; +#[doc = "TOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@top`] +module"] +#[doc(alias = "TOP")] +pub type Top = crate::Reg; #[doc = "No Description"] pub mod top; -#[doc = "TOPB (rw) register accessor: an alias for `Reg`"] -pub type TOPB = crate::Reg; +#[doc = "TOPB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@topb`] +module"] +#[doc(alias = "TOPB")] +pub type Topb = crate::Reg; #[doc = "No Description"] pub mod topb; -#[doc = "CNT (rw) register accessor: an alias for `Reg`"] -pub type CNT = crate::Reg; +#[doc = "CNT (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnt`] +module"] +#[doc(alias = "CNT")] +pub type Cnt = crate::Reg; #[doc = "No Description"] pub mod cnt; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CC0_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC0_CFG = crate::Reg; +#[doc = "CC0_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_cfg`] +module"] +#[doc(alias = "CC0_CFG")] +pub type Cc0Cfg = crate::Reg; #[doc = "No Description"] pub mod cc0_cfg; -#[doc = "CC0_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC0_CTRL = crate::Reg; +#[doc = "CC0_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_ctrl`] +module"] +#[doc(alias = "CC0_CTRL")] +pub type Cc0Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc0_ctrl; -#[doc = "CC0_OC (rw) register accessor: an alias for `Reg`"] -pub type CC0_OC = crate::Reg; +#[doc = "CC0_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_oc`] +module"] +#[doc(alias = "CC0_OC")] +pub type Cc0Oc = crate::Reg; #[doc = "No Description"] pub mod cc0_oc; -#[doc = "CC0_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC0_OCB = crate::Reg; +#[doc = "CC0_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_ocb`] +module"] +#[doc(alias = "CC0_OCB")] +pub type Cc0Ocb = crate::Reg; #[doc = "No Description"] pub mod cc0_ocb; -#[doc = "CC0_ICF (r) register accessor: an alias for `Reg`"] -pub type CC0_ICF = crate::Reg; +#[doc = "CC0_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_icf`] +module"] +#[doc(alias = "CC0_ICF")] +pub type Cc0Icf = crate::Reg; #[doc = "No Description"] pub mod cc0_icf; -#[doc = "CC0_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC0_ICOF = crate::Reg; +#[doc = "CC0_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_icof`] +module"] +#[doc(alias = "CC0_ICOF")] +pub type Cc0Icof = crate::Reg; #[doc = "No Description"] pub mod cc0_icof; -#[doc = "CC1_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC1_CFG = crate::Reg; +#[doc = "CC1_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_cfg`] +module"] +#[doc(alias = "CC1_CFG")] +pub type Cc1Cfg = crate::Reg; #[doc = "No Description"] pub mod cc1_cfg; -#[doc = "CC1_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC1_CTRL = crate::Reg; +#[doc = "CC1_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_ctrl`] +module"] +#[doc(alias = "CC1_CTRL")] +pub type Cc1Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc1_ctrl; -#[doc = "CC1_OC (rw) register accessor: an alias for `Reg`"] -pub type CC1_OC = crate::Reg; +#[doc = "CC1_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_oc`] +module"] +#[doc(alias = "CC1_OC")] +pub type Cc1Oc = crate::Reg; #[doc = "No Description"] pub mod cc1_oc; -#[doc = "CC1_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC1_OCB = crate::Reg; +#[doc = "CC1_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_ocb`] +module"] +#[doc(alias = "CC1_OCB")] +pub type Cc1Ocb = crate::Reg; #[doc = "No Description"] pub mod cc1_ocb; -#[doc = "CC1_ICF (r) register accessor: an alias for `Reg`"] -pub type CC1_ICF = crate::Reg; +#[doc = "CC1_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_icf`] +module"] +#[doc(alias = "CC1_ICF")] +pub type Cc1Icf = crate::Reg; #[doc = "No Description"] pub mod cc1_icf; -#[doc = "CC1_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC1_ICOF = crate::Reg; +#[doc = "CC1_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_icof`] +module"] +#[doc(alias = "CC1_ICOF")] +pub type Cc1Icof = crate::Reg; #[doc = "No Description"] pub mod cc1_icof; -#[doc = "CC2_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC2_CFG = crate::Reg; +#[doc = "CC2_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_cfg`] +module"] +#[doc(alias = "CC2_CFG")] +pub type Cc2Cfg = crate::Reg; #[doc = "No Description"] pub mod cc2_cfg; -#[doc = "CC2_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC2_CTRL = crate::Reg; +#[doc = "CC2_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_ctrl`] +module"] +#[doc(alias = "CC2_CTRL")] +pub type Cc2Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc2_ctrl; -#[doc = "CC2_OC (rw) register accessor: an alias for `Reg`"] -pub type CC2_OC = crate::Reg; +#[doc = "CC2_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_oc`] +module"] +#[doc(alias = "CC2_OC")] +pub type Cc2Oc = crate::Reg; #[doc = "No Description"] pub mod cc2_oc; -#[doc = "CC2_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC2_OCB = crate::Reg; +#[doc = "CC2_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_ocb`] +module"] +#[doc(alias = "CC2_OCB")] +pub type Cc2Ocb = crate::Reg; #[doc = "No Description"] pub mod cc2_ocb; -#[doc = "CC2_ICF (r) register accessor: an alias for `Reg`"] -pub type CC2_ICF = crate::Reg; +#[doc = "CC2_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_icf`] +module"] +#[doc(alias = "CC2_ICF")] +pub type Cc2Icf = crate::Reg; #[doc = "No Description"] pub mod cc2_icf; -#[doc = "CC2_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC2_ICOF = crate::Reg; +#[doc = "CC2_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_icof`] +module"] +#[doc(alias = "CC2_ICOF")] +pub type Cc2Icof = crate::Reg; #[doc = "No Description"] pub mod cc2_icof; -#[doc = "DTCFG (rw) register accessor: an alias for `Reg`"] -pub type DTCFG = crate::Reg; +#[doc = "DTCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtcfg`] +module"] +#[doc(alias = "DTCFG")] +pub type Dtcfg = crate::Reg; #[doc = "No Description"] pub mod dtcfg; -#[doc = "DTTIMECFG (rw) register accessor: an alias for `Reg`"] -pub type DTTIMECFG = crate::Reg; +#[doc = "DTTIMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dttimecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dttimecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dttimecfg`] +module"] +#[doc(alias = "DTTIMECFG")] +pub type Dttimecfg = crate::Reg; #[doc = "No Description"] pub mod dttimecfg; -#[doc = "DTFCFG (rw) register accessor: an alias for `Reg`"] -pub type DTFCFG = crate::Reg; +#[doc = "DTFCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfcfg`] +module"] +#[doc(alias = "DTFCFG")] +pub type Dtfcfg = crate::Reg; #[doc = "No Description"] pub mod dtfcfg; -#[doc = "DTCTRL (rw) register accessor: an alias for `Reg`"] -pub type DTCTRL = crate::Reg; +#[doc = "DTCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtctrl`] +module"] +#[doc(alias = "DTCTRL")] +pub type Dtctrl = crate::Reg; #[doc = "No Description"] pub mod dtctrl; -#[doc = "DTOGEN (rw) register accessor: an alias for `Reg`"] -pub type DTOGEN = crate::Reg; +#[doc = "DTOGEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtogen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtogen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtogen`] +module"] +#[doc(alias = "DTOGEN")] +pub type Dtogen = crate::Reg; #[doc = "No Description"] pub mod dtogen; -#[doc = "DTFAULT (r) register accessor: an alias for `Reg`"] -pub type DTFAULT = crate::Reg; +#[doc = "DTFAULT (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfault::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfault`] +module"] +#[doc(alias = "DTFAULT")] +pub type Dtfault = crate::Reg; #[doc = "No Description"] pub mod dtfault; -#[doc = "DTFAULTC (w) register accessor: an alias for `Reg`"] -pub type DTFAULTC = crate::Reg; +#[doc = "DTFAULTC (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfaultc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfaultc`] +module"] +#[doc(alias = "DTFAULTC")] +pub type Dtfaultc = crate::Reg; #[doc = "No Description"] pub mod dtfaultc; -#[doc = "DTLOCK (w) register accessor: an alias for `Reg`"] -pub type DTLOCK = crate::Reg; +#[doc = "DTLOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtlock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtlock`] +module"] +#[doc(alias = "DTLOCK")] +pub type Dtlock = crate::Reg; #[doc = "No Description"] pub mod dtlock; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc0_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc0_cfg.rs index 547eeb0..b3aac62 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc0_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc0_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC0_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC0_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_cfg](index.html) module"] -pub struct CC0_CFG_SPEC; -impl crate::RegisterSpec for CC0_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0CfgSpec; +impl crate::RegisterSpec for Cc0CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_cfg::R](R) reader structure"] -impl crate::Readable for CC0_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_cfg::W](W) writer structure"] -impl crate::Writable for CC0_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_cfg::R`](R) reader structure"] +impl crate::Readable for Cc0CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_cfg::W`](W) writer structure"] +impl crate::Writable for Cc0CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_CFG to value 0"] -impl crate::Resettable for CC0_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc0_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc0_ctrl.rs index 71b40e4..1b92d0c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc0_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc0_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC0_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_ctrl](index.html) module"] -pub struct CC0_CTRL_SPEC; -impl crate::RegisterSpec for CC0_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0CtrlSpec; +impl crate::RegisterSpec for Cc0CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_ctrl::R](R) reader structure"] -impl crate::Readable for CC0_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_ctrl::W](W) writer structure"] -impl crate::Writable for CC0_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc0CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc0CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_CTRL to value 0"] -impl crate::Resettable for CC0_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc0_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc0_icf.rs index f4a2c64..6afddea 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc0_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc0_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC0_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new((self.bits & 0xffff) as u16) + pub fn icf(&self) -> IcfR { + IcfR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_icf](index.html) module"] -pub struct CC0_ICF_SPEC; -impl crate::RegisterSpec for CC0_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0IcfSpec; +impl crate::RegisterSpec for Cc0IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_icf::R](R) reader structure"] -impl crate::Readable for CC0_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc0_icf::R`](R) reader structure"] +impl crate::Readable for Cc0IcfSpec {} #[doc = "`reset()` method sets CC0_ICF to value 0"] -impl crate::Resettable for CC0_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc0_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc0_icof.rs index 1ea3983..7653eef 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc0_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc0_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC0_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new((self.bits & 0xffff) as u16) + pub fn icof(&self) -> IcofR { + IcofR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_icof](index.html) module"] -pub struct CC0_ICOF_SPEC; -impl crate::RegisterSpec for CC0_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0IcofSpec; +impl crate::RegisterSpec for Cc0IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_icof::R](R) reader structure"] -impl crate::Readable for CC0_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc0_icof::R`](R) reader structure"] +impl crate::Readable for Cc0IcofSpec {} #[doc = "`reset()` method sets CC0_ICOF to value 0"] -impl crate::Resettable for CC0_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc0_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc0_oc.rs index 97be8b2..c063d52 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc0_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc0_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC0_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC0_OC_SPEC, u16, u16, 16, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new((self.bits & 0xffff) as u16) + pub fn oc(&self) -> OcR { + OcR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_oc](index.html) module"] -pub struct CC0_OC_SPEC; -impl crate::RegisterSpec for CC0_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0OcSpec; +impl crate::RegisterSpec for Cc0OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_oc::R](R) reader structure"] -impl crate::Readable for CC0_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_oc::W](W) writer structure"] -impl crate::Writable for CC0_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_oc::R`](R) reader structure"] +impl crate::Readable for Cc0OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_oc::W`](W) writer structure"] +impl crate::Writable for Cc0OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_OC to value 0"] -impl crate::Resettable for CC0_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc0_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc0_ocb.rs index af4e401..5924ded 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc0_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc0_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC0_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC0_OCB_SPEC, u16, u16, 16, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new((self.bits & 0xffff) as u16) + pub fn ocb(&self) -> OcbR { + OcbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_ocb](index.html) module"] -pub struct CC0_OCB_SPEC; -impl crate::RegisterSpec for CC0_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0OcbSpec; +impl crate::RegisterSpec for Cc0OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_ocb::R](R) reader structure"] -impl crate::Readable for CC0_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_ocb::W](W) writer structure"] -impl crate::Writable for CC0_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_ocb::R`](R) reader structure"] +impl crate::Readable for Cc0OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_ocb::W`](W) writer structure"] +impl crate::Writable for Cc0OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_OCB to value 0"] -impl crate::Resettable for CC0_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc1_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc1_cfg.rs index b3424c2..2243932 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc1_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc1_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC1_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC1_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_cfg](index.html) module"] -pub struct CC1_CFG_SPEC; -impl crate::RegisterSpec for CC1_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1CfgSpec; +impl crate::RegisterSpec for Cc1CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_cfg::R](R) reader structure"] -impl crate::Readable for CC1_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_cfg::W](W) writer structure"] -impl crate::Writable for CC1_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_cfg::R`](R) reader structure"] +impl crate::Readable for Cc1CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_cfg::W`](W) writer structure"] +impl crate::Writable for Cc1CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_CFG to value 0"] -impl crate::Resettable for CC1_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc1_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc1_ctrl.rs index 38927de..bc41282 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc1_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc1_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC1_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_ctrl](index.html) module"] -pub struct CC1_CTRL_SPEC; -impl crate::RegisterSpec for CC1_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1CtrlSpec; +impl crate::RegisterSpec for Cc1CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_ctrl::R](R) reader structure"] -impl crate::Readable for CC1_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_ctrl::W](W) writer structure"] -impl crate::Writable for CC1_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc1CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc1CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_CTRL to value 0"] -impl crate::Resettable for CC1_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc1_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc1_icf.rs index 1a7d7e8..0211b78 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc1_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc1_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC1_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new((self.bits & 0xffff) as u16) + pub fn icf(&self) -> IcfR { + IcfR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_icf](index.html) module"] -pub struct CC1_ICF_SPEC; -impl crate::RegisterSpec for CC1_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1IcfSpec; +impl crate::RegisterSpec for Cc1IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_icf::R](R) reader structure"] -impl crate::Readable for CC1_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc1_icf::R`](R) reader structure"] +impl crate::Readable for Cc1IcfSpec {} #[doc = "`reset()` method sets CC1_ICF to value 0"] -impl crate::Resettable for CC1_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc1_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc1_icof.rs index ea46e53..3fd845d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc1_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc1_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC1_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new((self.bits & 0xffff) as u16) + pub fn icof(&self) -> IcofR { + IcofR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_icof](index.html) module"] -pub struct CC1_ICOF_SPEC; -impl crate::RegisterSpec for CC1_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1IcofSpec; +impl crate::RegisterSpec for Cc1IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_icof::R](R) reader structure"] -impl crate::Readable for CC1_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc1_icof::R`](R) reader structure"] +impl crate::Readable for Cc1IcofSpec {} #[doc = "`reset()` method sets CC1_ICOF to value 0"] -impl crate::Resettable for CC1_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc1_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc1_oc.rs index 9f40c62..5b2e10b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc1_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc1_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC1_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC1_OC_SPEC, u16, u16, 16, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new((self.bits & 0xffff) as u16) + pub fn oc(&self) -> OcR { + OcR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_oc](index.html) module"] -pub struct CC1_OC_SPEC; -impl crate::RegisterSpec for CC1_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1OcSpec; +impl crate::RegisterSpec for Cc1OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_oc::R](R) reader structure"] -impl crate::Readable for CC1_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_oc::W](W) writer structure"] -impl crate::Writable for CC1_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_oc::R`](R) reader structure"] +impl crate::Readable for Cc1OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_oc::W`](W) writer structure"] +impl crate::Writable for Cc1OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_OC to value 0"] -impl crate::Resettable for CC1_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc1_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc1_ocb.rs index d3c8d9a..7d9f88b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc1_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc1_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC1_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC1_OCB_SPEC, u16, u16, 16, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new((self.bits & 0xffff) as u16) + pub fn ocb(&self) -> OcbR { + OcbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_ocb](index.html) module"] -pub struct CC1_OCB_SPEC; -impl crate::RegisterSpec for CC1_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1OcbSpec; +impl crate::RegisterSpec for Cc1OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_ocb::R](R) reader structure"] -impl crate::Readable for CC1_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_ocb::W](W) writer structure"] -impl crate::Writable for CC1_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_ocb::R`](R) reader structure"] +impl crate::Readable for Cc1OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_ocb::W`](W) writer structure"] +impl crate::Writable for Cc1OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_OCB to value 0"] -impl crate::Resettable for CC1_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc2_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc2_cfg.rs index 6b108e5..97bec45 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc2_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc2_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC2_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC2_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_cfg](index.html) module"] -pub struct CC2_CFG_SPEC; -impl crate::RegisterSpec for CC2_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2CfgSpec; +impl crate::RegisterSpec for Cc2CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_cfg::R](R) reader structure"] -impl crate::Readable for CC2_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_cfg::W](W) writer structure"] -impl crate::Writable for CC2_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_cfg::R`](R) reader structure"] +impl crate::Readable for Cc2CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_cfg::W`](W) writer structure"] +impl crate::Writable for Cc2CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_CFG to value 0"] -impl crate::Resettable for CC2_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc2_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc2_ctrl.rs index b42d120..317952a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc2_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc2_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC2_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_ctrl](index.html) module"] -pub struct CC2_CTRL_SPEC; -impl crate::RegisterSpec for CC2_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2CtrlSpec; +impl crate::RegisterSpec for Cc2CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_ctrl::R](R) reader structure"] -impl crate::Readable for CC2_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_ctrl::W](W) writer structure"] -impl crate::Writable for CC2_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc2CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc2CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_CTRL to value 0"] -impl crate::Resettable for CC2_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc2_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc2_icf.rs index 8282700..c1a0823 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc2_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc2_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC2_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new((self.bits & 0xffff) as u16) + pub fn icf(&self) -> IcfR { + IcfR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_icf](index.html) module"] -pub struct CC2_ICF_SPEC; -impl crate::RegisterSpec for CC2_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2IcfSpec; +impl crate::RegisterSpec for Cc2IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_icf::R](R) reader structure"] -impl crate::Readable for CC2_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc2_icf::R`](R) reader structure"] +impl crate::Readable for Cc2IcfSpec {} #[doc = "`reset()` method sets CC2_ICF to value 0"] -impl crate::Resettable for CC2_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc2_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc2_icof.rs index c21d7d3..0d399d1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc2_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc2_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC2_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new((self.bits & 0xffff) as u16) + pub fn icof(&self) -> IcofR { + IcofR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_icof](index.html) module"] -pub struct CC2_ICOF_SPEC; -impl crate::RegisterSpec for CC2_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2IcofSpec; +impl crate::RegisterSpec for Cc2IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_icof::R](R) reader structure"] -impl crate::Readable for CC2_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc2_icof::R`](R) reader structure"] +impl crate::Readable for Cc2IcofSpec {} #[doc = "`reset()` method sets CC2_ICOF to value 0"] -impl crate::Resettable for CC2_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc2_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc2_oc.rs index da9cc47..935617c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc2_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc2_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC2_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC2_OC_SPEC, u16, u16, 16, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new((self.bits & 0xffff) as u16) + pub fn oc(&self) -> OcR { + OcR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_oc](index.html) module"] -pub struct CC2_OC_SPEC; -impl crate::RegisterSpec for CC2_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2OcSpec; +impl crate::RegisterSpec for Cc2OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_oc::R](R) reader structure"] -impl crate::Readable for CC2_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_oc::W](W) writer structure"] -impl crate::Writable for CC2_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_oc::R`](R) reader structure"] +impl crate::Readable for Cc2OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_oc::W`](W) writer structure"] +impl crate::Writable for Cc2OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_OC to value 0"] -impl crate::Resettable for CC2_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc2_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc2_ocb.rs index 1ab93d6..ee6c4e5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc2_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cc2_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC2_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC2_OCB_SPEC, u16, u16, 16, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new((self.bits & 0xffff) as u16) + pub fn ocb(&self) -> OcbR { + OcbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_ocb](index.html) module"] -pub struct CC2_OCB_SPEC; -impl crate::RegisterSpec for CC2_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2OcbSpec; +impl crate::RegisterSpec for Cc2OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_ocb::R](R) reader structure"] -impl crate::Readable for CC2_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_ocb::W](W) writer structure"] -impl crate::Writable for CC2_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_ocb::R`](R) reader structure"] +impl crate::Readable for Cc2OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_ocb::W`](W) writer structure"] +impl crate::Writable for Cc2OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_OCB to value 0"] -impl crate::Resettable for CC2_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cfg.rs index ea2a1e1..b4cc2fd 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cfg.rs @@ -1,775 +1,774 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - Timer Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Timer Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Up-count mode"] - UP = 0, + Up = 0, #[doc = "1: Down-count mode"] - DOWN = 1, + Down = 1, #[doc = "2: Up/down-count mode"] - UPDOWN = 2, + Updown = 2, #[doc = "3: Quadrature decoder mode"] - QDEC = 3, + Qdec = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - Timer Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::UP, - 1 => MODE_A::DOWN, - 2 => MODE_A::UPDOWN, - 3 => MODE_A::QDEC, + 0 => Mode::Up, + 1 => Mode::Down, + 2 => Mode::Updown, + 3 => Mode::Qdec, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Up-count mode"] #[inline(always)] pub fn is_up(&self) -> bool { - *self == MODE_A::UP + *self == Mode::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Down-count mode"] #[inline(always)] pub fn is_down(&self) -> bool { - *self == MODE_A::DOWN + *self == Mode::Down } - #[doc = "Checks if the value of the field is `UPDOWN`"] + #[doc = "Up/down-count mode"] #[inline(always)] pub fn is_updown(&self) -> bool { - *self == MODE_A::UPDOWN + *self == Mode::Updown } - #[doc = "Checks if the value of the field is `QDEC`"] + #[doc = "Quadrature decoder mode"] #[inline(always)] pub fn is_qdec(&self) -> bool { - *self == MODE_A::QDEC + *self == Mode::Qdec } } #[doc = "Field `MODE` writer - Timer Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Up-count mode"] #[inline(always)] - pub fn up(self) -> &'a mut W { - self.variant(MODE_A::UP) + pub fn up(self) -> &'a mut crate::W { + self.variant(Mode::Up) } #[doc = "Down-count mode"] #[inline(always)] - pub fn down(self) -> &'a mut W { - self.variant(MODE_A::DOWN) + pub fn down(self) -> &'a mut crate::W { + self.variant(Mode::Down) } #[doc = "Up/down-count mode"] #[inline(always)] - pub fn updown(self) -> &'a mut W { - self.variant(MODE_A::UPDOWN) + pub fn updown(self) -> &'a mut crate::W { + self.variant(Mode::Updown) } #[doc = "Quadrature decoder mode"] #[inline(always)] - pub fn qdec(self) -> &'a mut W { - self.variant(MODE_A::QDEC) + pub fn qdec(self) -> &'a mut crate::W { + self.variant(Mode::Qdec) } } -#[doc = "Field `SYNC` reader - Timer Start/Stop/Reload Synchronization"] -pub type SYNC_R = crate::BitReader; #[doc = "Timer Start/Stop/Reload Synchronization\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYNC_A { +pub enum Sync { #[doc = "0: Timer operation is unaffected by other timers."] - DISABLE = 0, + Disable = 0, #[doc = "1: Timer may be started, stopped and re-loaded from other timer instances."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYNC_A) -> Self { + fn from(variant: Sync) -> Self { variant as u8 != 0 } } -impl SYNC_R { +#[doc = "Field `SYNC` reader - Timer Start/Stop/Reload Synchronization"] +pub type SyncR = crate::BitReader; +impl SyncR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SYNC_A { + pub const fn variant(&self) -> Sync { match self.bits { - false => SYNC_A::DISABLE, - true => SYNC_A::ENABLE, + false => Sync::Disable, + true => Sync::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Timer operation is unaffected by other timers."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == SYNC_A::DISABLE + *self == Sync::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Timer may be started, stopped and re-loaded from other timer instances."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == SYNC_A::ENABLE + *self == Sync::Enable } } #[doc = "Field `SYNC` writer - Timer Start/Stop/Reload Synchronization"] -pub type SYNC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, SYNC_A, O>; -impl<'a, const O: u8> SYNC_W<'a, O> { +pub type SyncW<'a, REG> = crate::BitWriter<'a, REG, Sync>; +impl<'a, REG> SyncW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer operation is unaffected by other timers."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(SYNC_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Sync::Disable) } #[doc = "Timer may be started, stopped and re-loaded from other timer instances."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(SYNC_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Sync::Enable) } } #[doc = "Field `OSMEN` reader - One-shot Mode Enable"] -pub type OSMEN_R = crate::BitReader; +pub type OsmenR = crate::BitReader; #[doc = "Field `OSMEN` writer - One-shot Mode Enable"] -pub type OSMEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `QDM` reader - Quadrature Decoder Mode Selection"] -pub type QDM_R = crate::BitReader; +pub type OsmenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Quadrature Decoder Mode Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum QDM_A { +pub enum Qdm { #[doc = "0: X2 mode selected"] X2 = 0, #[doc = "1: X4 mode selected"] X4 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: QDM_A) -> Self { + fn from(variant: Qdm) -> Self { variant as u8 != 0 } } -impl QDM_R { +#[doc = "Field `QDM` reader - Quadrature Decoder Mode Selection"] +pub type QdmR = crate::BitReader; +impl QdmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> QDM_A { + pub const fn variant(&self) -> Qdm { match self.bits { - false => QDM_A::X2, - true => QDM_A::X4, + false => Qdm::X2, + true => Qdm::X4, } } - #[doc = "Checks if the value of the field is `X2`"] + #[doc = "X2 mode selected"] #[inline(always)] pub fn is_x2(&self) -> bool { - *self == QDM_A::X2 + *self == Qdm::X2 } - #[doc = "Checks if the value of the field is `X4`"] + #[doc = "X4 mode selected"] #[inline(always)] pub fn is_x4(&self) -> bool { - *self == QDM_A::X4 + *self == Qdm::X4 } } #[doc = "Field `QDM` writer - Quadrature Decoder Mode Selection"] -pub type QDM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, QDM_A, O>; -impl<'a, const O: u8> QDM_W<'a, O> { +pub type QdmW<'a, REG> = crate::BitWriter<'a, REG, Qdm>; +impl<'a, REG> QdmW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "X2 mode selected"] #[inline(always)] - pub fn x2(self) -> &'a mut W { - self.variant(QDM_A::X2) + pub fn x2(self) -> &'a mut crate::W { + self.variant(Qdm::X2) } #[doc = "X4 mode selected"] #[inline(always)] - pub fn x4(self) -> &'a mut W { - self.variant(QDM_A::X4) + pub fn x4(self) -> &'a mut crate::W { + self.variant(Qdm::X4) } } -#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] -pub type DEBUGRUN_R = crate::BitReader; #[doc = "Debug Mode Run Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DEBUGRUN_A { +pub enum Debugrun { #[doc = "0: Timer is halted in debug mode"] - HALT = 0, + Halt = 0, #[doc = "1: Timer is running in debug mode"] - RUN = 1, + Run = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DEBUGRUN_A) -> Self { + fn from(variant: Debugrun) -> Self { variant as u8 != 0 } } -impl DEBUGRUN_R { +#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] +pub type DebugrunR = crate::BitReader; +impl DebugrunR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DEBUGRUN_A { + pub const fn variant(&self) -> Debugrun { match self.bits { - false => DEBUGRUN_A::HALT, - true => DEBUGRUN_A::RUN, + false => Debugrun::Halt, + true => Debugrun::Run, } } - #[doc = "Checks if the value of the field is `HALT`"] + #[doc = "Timer is halted in debug mode"] #[inline(always)] pub fn is_halt(&self) -> bool { - *self == DEBUGRUN_A::HALT + *self == Debugrun::Halt } - #[doc = "Checks if the value of the field is `RUN`"] + #[doc = "Timer is running in debug mode"] #[inline(always)] pub fn is_run(&self) -> bool { - *self == DEBUGRUN_A::RUN + *self == Debugrun::Run } } #[doc = "Field `DEBUGRUN` writer - Debug Mode Run Enable"] -pub type DEBUGRUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DEBUGRUN_A, O>; -impl<'a, const O: u8> DEBUGRUN_W<'a, O> { +pub type DebugrunW<'a, REG> = crate::BitWriter<'a, REG, Debugrun>; +impl<'a, REG> DebugrunW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer is halted in debug mode"] #[inline(always)] - pub fn halt(self) -> &'a mut W { - self.variant(DEBUGRUN_A::HALT) + pub fn halt(self) -> &'a mut crate::W { + self.variant(Debugrun::Halt) } #[doc = "Timer is running in debug mode"] #[inline(always)] - pub fn run(self) -> &'a mut W { - self.variant(DEBUGRUN_A::RUN) + pub fn run(self) -> &'a mut crate::W { + self.variant(Debugrun::Run) } } #[doc = "Field `DMACLRACT` reader - DMA Request Clear on Active"] -pub type DMACLRACT_R = crate::BitReader; +pub type DmaclractR = crate::BitReader; #[doc = "Field `DMACLRACT` writer - DMA Request Clear on Active"] -pub type DMACLRACT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `CLKSEL` reader - Clock Source Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type DmaclractW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Clock Source Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "0: Prescaled EM01GRPACLK"] - PRESCEM01GRPACLK = 0, + Prescem01grpaclk = 0, #[doc = "1: Compare/Capture Channel 1 Input"] - CC1 = 1, + Cc1 = 1, #[doc = "2: Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] - TIMEROUF = 2, + Timerouf = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Source Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKSEL_A::PRESCEM01GRPACLK), - 1 => Some(CLKSEL_A::CC1), - 2 => Some(CLKSEL_A::TIMEROUF), + 0 => Some(Clksel::Prescem01grpaclk), + 1 => Some(Clksel::Cc1), + 2 => Some(Clksel::Timerouf), _ => None, } } - #[doc = "Checks if the value of the field is `PRESCEM01GRPACLK`"] + #[doc = "Prescaled EM01GRPACLK"] #[inline(always)] pub fn is_prescem01grpaclk(&self) -> bool { - *self == CLKSEL_A::PRESCEM01GRPACLK + *self == Clksel::Prescem01grpaclk } - #[doc = "Checks if the value of the field is `CC1`"] + #[doc = "Compare/Capture Channel 1 Input"] #[inline(always)] pub fn is_cc1(&self) -> bool { - *self == CLKSEL_A::CC1 + *self == Clksel::Cc1 } - #[doc = "Checks if the value of the field is `TIMEROUF`"] + #[doc = "Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] #[inline(always)] pub fn is_timerouf(&self) -> bool { - *self == CLKSEL_A::TIMEROUF + *self == Clksel::Timerouf } } #[doc = "Field `CLKSEL` writer - Clock Source Select"] -pub type CLKSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, CLKSEL_A, 2, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Prescaled EM01GRPACLK"] #[inline(always)] - pub fn prescem01grpaclk(self) -> &'a mut W { - self.variant(CLKSEL_A::PRESCEM01GRPACLK) + pub fn prescem01grpaclk(self) -> &'a mut crate::W { + self.variant(Clksel::Prescem01grpaclk) } #[doc = "Compare/Capture Channel 1 Input"] #[inline(always)] - pub fn cc1(self) -> &'a mut W { - self.variant(CLKSEL_A::CC1) + pub fn cc1(self) -> &'a mut crate::W { + self.variant(Clksel::Cc1) } #[doc = "Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] #[inline(always)] - pub fn timerouf(self) -> &'a mut W { - self.variant(CLKSEL_A::TIMEROUF) + pub fn timerouf(self) -> &'a mut crate::W { + self.variant(Clksel::Timerouf) } } -#[doc = "Field `RETIMEEN` reader - PWM output retimed enable"] -pub type RETIMEEN_R = crate::BitReader; #[doc = "PWM output retimed enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RETIMEEN_A { +pub enum Retimeen { #[doc = "0: PWM outputs are not re-timed."] - DISABLE = 0, + Disable = 0, #[doc = "1: PWM outputs are re-timed."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RETIMEEN_A) -> Self { + fn from(variant: Retimeen) -> Self { variant as u8 != 0 } } -impl RETIMEEN_R { +#[doc = "Field `RETIMEEN` reader - PWM output retimed enable"] +pub type RetimeenR = crate::BitReader; +impl RetimeenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RETIMEEN_A { + pub const fn variant(&self) -> Retimeen { match self.bits { - false => RETIMEEN_A::DISABLE, - true => RETIMEEN_A::ENABLE, + false => Retimeen::Disable, + true => Retimeen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "PWM outputs are not re-timed."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RETIMEEN_A::DISABLE + *self == Retimeen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "PWM outputs are re-timed."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RETIMEEN_A::ENABLE + *self == Retimeen::Enable } } #[doc = "Field `RETIMEEN` writer - PWM output retimed enable"] -pub type RETIMEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, RETIMEEN_A, O>; -impl<'a, const O: u8> RETIMEEN_W<'a, O> { +pub type RetimeenW<'a, REG> = crate::BitWriter<'a, REG, Retimeen>; +impl<'a, REG> RetimeenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "PWM outputs are not re-timed."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RETIMEEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Retimeen::Disable) } #[doc = "PWM outputs are re-timed."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RETIMEEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Retimeen::Enable) } } -#[doc = "Field `DISSYNCOUT` reader - Disable Timer Start/Stop/Reload output"] -pub type DISSYNCOUT_R = crate::BitReader; #[doc = "Disable Timer Start/Stop/Reload output\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DISSYNCOUT_A { +pub enum Dissyncout { #[doc = "0: Timer can start/stop/reload other timers with SYNC bit set"] - EN = 0, + En = 0, #[doc = "1: Timer cannot start/stop/reload other timers with SYNC bit set"] - DIS = 1, + Dis = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DISSYNCOUT_A) -> Self { + fn from(variant: Dissyncout) -> Self { variant as u8 != 0 } } -impl DISSYNCOUT_R { +#[doc = "Field `DISSYNCOUT` reader - Disable Timer Start/Stop/Reload output"] +pub type DissyncoutR = crate::BitReader; +impl DissyncoutR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DISSYNCOUT_A { + pub const fn variant(&self) -> Dissyncout { match self.bits { - false => DISSYNCOUT_A::EN, - true => DISSYNCOUT_A::DIS, + false => Dissyncout::En, + true => Dissyncout::Dis, } } - #[doc = "Checks if the value of the field is `EN`"] + #[doc = "Timer can start/stop/reload other timers with SYNC bit set"] #[inline(always)] pub fn is_en(&self) -> bool { - *self == DISSYNCOUT_A::EN + *self == Dissyncout::En } - #[doc = "Checks if the value of the field is `DIS`"] + #[doc = "Timer cannot start/stop/reload other timers with SYNC bit set"] #[inline(always)] pub fn is_dis(&self) -> bool { - *self == DISSYNCOUT_A::DIS + *self == Dissyncout::Dis } } #[doc = "Field `DISSYNCOUT` writer - Disable Timer Start/Stop/Reload output"] -pub type DISSYNCOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DISSYNCOUT_A, O>; -impl<'a, const O: u8> DISSYNCOUT_W<'a, O> { +pub type DissyncoutW<'a, REG> = crate::BitWriter<'a, REG, Dissyncout>; +impl<'a, REG> DissyncoutW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer can start/stop/reload other timers with SYNC bit set"] #[inline(always)] - pub fn en(self) -> &'a mut W { - self.variant(DISSYNCOUT_A::EN) + pub fn en(self) -> &'a mut crate::W { + self.variant(Dissyncout::En) } #[doc = "Timer cannot start/stop/reload other timers with SYNC bit set"] #[inline(always)] - pub fn dis(self) -> &'a mut W { - self.variant(DISSYNCOUT_A::DIS) + pub fn dis(self) -> &'a mut crate::W { + self.variant(Dissyncout::Dis) } } #[doc = "Field `ATI` reader - Always Track Inputs"] -pub type ATI_R = crate::BitReader; +pub type AtiR = crate::BitReader; #[doc = "Field `ATI` writer - Always Track Inputs"] -pub type ATI_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type AtiW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RSSCOIST` reader - Reload-Start Sets COIST"] -pub type RSSCOIST_R = crate::BitReader; +pub type RsscoistR = crate::BitReader; #[doc = "Field `RSSCOIST` writer - Reload-Start Sets COIST"] -pub type RSSCOIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `PRESC` reader - Prescaler Setting"] -pub type PRESC_R = crate::FieldReader; +pub type RsscoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Prescaler Setting\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum PRESC_A { +pub enum Presc { #[doc = "0: No prescaling"] - DIV1 = 0, + Div1 = 0, #[doc = "1: Prescale by 2"] - DIV2 = 1, + Div2 = 1, #[doc = "3: Prescale by 4"] - DIV4 = 3, + Div4 = 3, #[doc = "7: Prescale by 8"] - DIV8 = 7, + Div8 = 7, #[doc = "15: Prescale by 16"] - DIV16 = 15, + Div16 = 15, #[doc = "31: Prescale by 32"] - DIV32 = 31, + Div32 = 31, #[doc = "63: Prescale by 64"] - DIV64 = 63, + Div64 = 63, #[doc = "127: Prescale by 128"] - DIV128 = 127, + Div128 = 127, #[doc = "255: Prescale by 256"] - DIV256 = 255, + Div256 = 255, #[doc = "511: Prescale by 512"] - DIV512 = 511, + Div512 = 511, #[doc = "1023: Prescale by 1024"] - DIV1024 = 1023, + Div1024 = 1023, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: PRESC_A) -> Self { + fn from(variant: Presc) -> Self { variant as _ } } -impl PRESC_R { +impl crate::FieldSpec for Presc { + type Ux = u16; +} +impl crate::IsEnum for Presc {} +#[doc = "Field `PRESC` reader - Prescaler Setting"] +pub type PrescR = crate::FieldReader; +impl PrescR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PRESC_A::DIV1), - 1 => Some(PRESC_A::DIV2), - 3 => Some(PRESC_A::DIV4), - 7 => Some(PRESC_A::DIV8), - 15 => Some(PRESC_A::DIV16), - 31 => Some(PRESC_A::DIV32), - 63 => Some(PRESC_A::DIV64), - 127 => Some(PRESC_A::DIV128), - 255 => Some(PRESC_A::DIV256), - 511 => Some(PRESC_A::DIV512), - 1023 => Some(PRESC_A::DIV1024), + 0 => Some(Presc::Div1), + 1 => Some(Presc::Div2), + 3 => Some(Presc::Div4), + 7 => Some(Presc::Div8), + 15 => Some(Presc::Div16), + 31 => Some(Presc::Div32), + 63 => Some(Presc::Div64), + 127 => Some(Presc::Div128), + 255 => Some(Presc::Div256), + 511 => Some(Presc::Div512), + 1023 => Some(Presc::Div1024), _ => None, } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "No prescaling"] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == PRESC_A::DIV1 + *self == Presc::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "Prescale by 2"] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == PRESC_A::DIV2 + *self == Presc::Div2 } - #[doc = "Checks if the value of the field is `DIV4`"] + #[doc = "Prescale by 4"] #[inline(always)] pub fn is_div4(&self) -> bool { - *self == PRESC_A::DIV4 + *self == Presc::Div4 } - #[doc = "Checks if the value of the field is `DIV8`"] + #[doc = "Prescale by 8"] #[inline(always)] pub fn is_div8(&self) -> bool { - *self == PRESC_A::DIV8 + *self == Presc::Div8 } - #[doc = "Checks if the value of the field is `DIV16`"] + #[doc = "Prescale by 16"] #[inline(always)] pub fn is_div16(&self) -> bool { - *self == PRESC_A::DIV16 + *self == Presc::Div16 } - #[doc = "Checks if the value of the field is `DIV32`"] + #[doc = "Prescale by 32"] #[inline(always)] pub fn is_div32(&self) -> bool { - *self == PRESC_A::DIV32 + *self == Presc::Div32 } - #[doc = "Checks if the value of the field is `DIV64`"] + #[doc = "Prescale by 64"] #[inline(always)] pub fn is_div64(&self) -> bool { - *self == PRESC_A::DIV64 + *self == Presc::Div64 } - #[doc = "Checks if the value of the field is `DIV128`"] + #[doc = "Prescale by 128"] #[inline(always)] pub fn is_div128(&self) -> bool { - *self == PRESC_A::DIV128 + *self == Presc::Div128 } - #[doc = "Checks if the value of the field is `DIV256`"] + #[doc = "Prescale by 256"] #[inline(always)] pub fn is_div256(&self) -> bool { - *self == PRESC_A::DIV256 + *self == Presc::Div256 } - #[doc = "Checks if the value of the field is `DIV512`"] + #[doc = "Prescale by 512"] #[inline(always)] pub fn is_div512(&self) -> bool { - *self == PRESC_A::DIV512 + *self == Presc::Div512 } - #[doc = "Checks if the value of the field is `DIV1024`"] + #[doc = "Prescale by 1024"] #[inline(always)] pub fn is_div1024(&self) -> bool { - *self == PRESC_A::DIV1024 + *self == Presc::Div1024 } } #[doc = "Field `PRESC` writer - Prescaler Setting"] -pub type PRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u16, PRESC_A, 10, O>; -impl<'a, const O: u8> PRESC_W<'a, O> { +pub type PrescW<'a, REG> = crate::FieldWriter<'a, REG, 10, Presc>; +impl<'a, REG> PrescW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No prescaling"] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(PRESC_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Presc::Div1) } #[doc = "Prescale by 2"] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(PRESC_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Presc::Div2) } #[doc = "Prescale by 4"] #[inline(always)] - pub fn div4(self) -> &'a mut W { - self.variant(PRESC_A::DIV4) + pub fn div4(self) -> &'a mut crate::W { + self.variant(Presc::Div4) } #[doc = "Prescale by 8"] #[inline(always)] - pub fn div8(self) -> &'a mut W { - self.variant(PRESC_A::DIV8) + pub fn div8(self) -> &'a mut crate::W { + self.variant(Presc::Div8) } #[doc = "Prescale by 16"] #[inline(always)] - pub fn div16(self) -> &'a mut W { - self.variant(PRESC_A::DIV16) + pub fn div16(self) -> &'a mut crate::W { + self.variant(Presc::Div16) } #[doc = "Prescale by 32"] #[inline(always)] - pub fn div32(self) -> &'a mut W { - self.variant(PRESC_A::DIV32) + pub fn div32(self) -> &'a mut crate::W { + self.variant(Presc::Div32) } #[doc = "Prescale by 64"] #[inline(always)] - pub fn div64(self) -> &'a mut W { - self.variant(PRESC_A::DIV64) + pub fn div64(self) -> &'a mut crate::W { + self.variant(Presc::Div64) } #[doc = "Prescale by 128"] #[inline(always)] - pub fn div128(self) -> &'a mut W { - self.variant(PRESC_A::DIV128) + pub fn div128(self) -> &'a mut crate::W { + self.variant(Presc::Div128) } #[doc = "Prescale by 256"] #[inline(always)] - pub fn div256(self) -> &'a mut W { - self.variant(PRESC_A::DIV256) + pub fn div256(self) -> &'a mut crate::W { + self.variant(Presc::Div256) } #[doc = "Prescale by 512"] #[inline(always)] - pub fn div512(self) -> &'a mut W { - self.variant(PRESC_A::DIV512) + pub fn div512(self) -> &'a mut crate::W { + self.variant(Presc::Div512) } #[doc = "Prescale by 1024"] #[inline(always)] - pub fn div1024(self) -> &'a mut W { - self.variant(PRESC_A::DIV1024) + pub fn div1024(self) -> &'a mut crate::W { + self.variant(Presc::Div1024) } } impl R { #[doc = "Bits 0:1 - Timer Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Timer Start/Stop/Reload Synchronization"] #[inline(always)] - pub fn sync(&self) -> SYNC_R { - SYNC_R::new(((self.bits >> 3) & 1) != 0) + pub fn sync(&self) -> SyncR { + SyncR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - One-shot Mode Enable"] #[inline(always)] - pub fn osmen(&self) -> OSMEN_R { - OSMEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn osmen(&self) -> OsmenR { + OsmenR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Quadrature Decoder Mode Selection"] #[inline(always)] - pub fn qdm(&self) -> QDM_R { - QDM_R::new(((self.bits >> 5) & 1) != 0) + pub fn qdm(&self) -> QdmR { + QdmR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Debug Mode Run Enable"] #[inline(always)] - pub fn debugrun(&self) -> DEBUGRUN_R { - DEBUGRUN_R::new(((self.bits >> 6) & 1) != 0) + pub fn debugrun(&self) -> DebugrunR { + DebugrunR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - DMA Request Clear on Active"] #[inline(always)] - pub fn dmaclract(&self) -> DMACLRACT_R { - DMACLRACT_R::new(((self.bits >> 7) & 1) != 0) + pub fn dmaclract(&self) -> DmaclractR { + DmaclractR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:9 - Clock Source Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 10 - PWM output retimed enable"] #[inline(always)] - pub fn retimeen(&self) -> RETIMEEN_R { - RETIMEEN_R::new(((self.bits >> 10) & 1) != 0) + pub fn retimeen(&self) -> RetimeenR { + RetimeenR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Disable Timer Start/Stop/Reload output"] #[inline(always)] - pub fn dissyncout(&self) -> DISSYNCOUT_R { - DISSYNCOUT_R::new(((self.bits >> 11) & 1) != 0) + pub fn dissyncout(&self) -> DissyncoutR { + DissyncoutR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 16 - Always Track Inputs"] #[inline(always)] - pub fn ati(&self) -> ATI_R { - ATI_R::new(((self.bits >> 16) & 1) != 0) + pub fn ati(&self) -> AtiR { + AtiR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Reload-Start Sets COIST"] #[inline(always)] - pub fn rsscoist(&self) -> RSSCOIST_R { - RSSCOIST_R::new(((self.bits >> 17) & 1) != 0) + pub fn rsscoist(&self) -> RsscoistR { + RsscoistR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:27 - Prescaler Setting"] #[inline(always)] - pub fn presc(&self) -> PRESC_R { - PRESC_R::new(((self.bits >> 18) & 0x03ff) as u16) + pub fn presc(&self) -> PrescR { + PrescR::new(((self.bits >> 18) & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:1 - Timer Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 3 - Timer Start/Stop/Reload Synchronization"] #[inline(always)] #[must_use] - pub fn sync(&mut self) -> SYNC_W<3> { - SYNC_W::new(self) + pub fn sync(&mut self) -> SyncW { + SyncW::new(self, 3) } #[doc = "Bit 4 - One-shot Mode Enable"] #[inline(always)] #[must_use] - pub fn osmen(&mut self) -> OSMEN_W<4> { - OSMEN_W::new(self) + pub fn osmen(&mut self) -> OsmenW { + OsmenW::new(self, 4) } #[doc = "Bit 5 - Quadrature Decoder Mode Selection"] #[inline(always)] #[must_use] - pub fn qdm(&mut self) -> QDM_W<5> { - QDM_W::new(self) + pub fn qdm(&mut self) -> QdmW { + QdmW::new(self, 5) } #[doc = "Bit 6 - Debug Mode Run Enable"] #[inline(always)] #[must_use] - pub fn debugrun(&mut self) -> DEBUGRUN_W<6> { - DEBUGRUN_W::new(self) + pub fn debugrun(&mut self) -> DebugrunW { + DebugrunW::new(self, 6) } #[doc = "Bit 7 - DMA Request Clear on Active"] #[inline(always)] #[must_use] - pub fn dmaclract(&mut self) -> DMACLRACT_W<7> { - DMACLRACT_W::new(self) + pub fn dmaclract(&mut self) -> DmaclractW { + DmaclractW::new(self, 7) } #[doc = "Bits 8:9 - Clock Source Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<8> { - CLKSEL_W::new(self) + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 8) } #[doc = "Bit 10 - PWM output retimed enable"] #[inline(always)] #[must_use] - pub fn retimeen(&mut self) -> RETIMEEN_W<10> { - RETIMEEN_W::new(self) + pub fn retimeen(&mut self) -> RetimeenW { + RetimeenW::new(self, 10) } #[doc = "Bit 11 - Disable Timer Start/Stop/Reload output"] #[inline(always)] #[must_use] - pub fn dissyncout(&mut self) -> DISSYNCOUT_W<11> { - DISSYNCOUT_W::new(self) + pub fn dissyncout(&mut self) -> DissyncoutW { + DissyncoutW::new(self, 11) } #[doc = "Bit 16 - Always Track Inputs"] #[inline(always)] #[must_use] - pub fn ati(&mut self) -> ATI_W<16> { - ATI_W::new(self) + pub fn ati(&mut self) -> AtiW { + AtiW::new(self, 16) } #[doc = "Bit 17 - Reload-Start Sets COIST"] #[inline(always)] #[must_use] - pub fn rsscoist(&mut self) -> RSSCOIST_W<17> { - RSSCOIST_W::new(self) + pub fn rsscoist(&mut self) -> RsscoistW { + RsscoistW::new(self, 17) } #[doc = "Bits 18:27 - Prescaler Setting"] #[inline(always)] #[must_use] - pub fn presc(&mut self) -> PRESC_W<18> { - PRESC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn presc(&mut self) -> PrescW { + PrescW::new(self, 18) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cmd.rs index ca6d3b1..bf41157 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cmd.rs @@ -1,60 +1,35 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` writer - Start Timer"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STOP` writer - Stop Timer"] -pub type STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StopW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Start Timer"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Stop Timer"] #[inline(always)] #[must_use] - pub fn stop(&mut self) -> STOP_W<1> { - STOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stop(&mut self) -> StopW { + StopW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cnt.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cnt.rs index dd37661..c870fc9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cnt.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/cnt.rs @@ -1,80 +1,40 @@ #[doc = "Register `CNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CNT` reader - Counter Value"] -pub type CNT_R = crate::FieldReader; +pub type CntR = crate::FieldReader; #[doc = "Field `CNT` writer - Counter Value"] -pub type CNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CNT_SPEC, u16, u16, 16, O>; +pub type CntW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Value"] #[inline(always)] - pub fn cnt(&self) -> CNT_R { - CNT_R::new((self.bits & 0xffff) as u16) + pub fn cnt(&self) -> CntR { + CntR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Value"] #[inline(always)] #[must_use] - pub fn cnt(&mut self) -> CNT_W<0> { - CNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cnt(&mut self) -> CntW { + CntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](index.html) module"] -pub struct CNT_SPEC; -impl crate::RegisterSpec for CNT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CntSpec; +impl crate::RegisterSpec for CntSpec { type Ux = u32; } -#[doc = "`read()` method returns [cnt::R](R) reader structure"] -impl crate::Readable for CNT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnt::W](W) writer structure"] -impl crate::Writable for CNT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cnt::R`](R) reader structure"] +impl crate::Readable for CntSpec {} +#[doc = "`write(|w| ..)` method takes [`cnt::W`](W) writer structure"] +impl crate::Writable for CntSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNT to value 0"] -impl crate::Resettable for CNT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CntSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/ctrl.rs index 08e646b..e2ed153 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/ctrl.rs @@ -1,258 +1,234 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `RISEA` reader - Timer Rising Input Edge Action"] -pub type RISEA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Timer Rising Input Edge Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RISEA_A { +pub enum Risea { #[doc = "0: No action"] - NONE = 0, + None = 0, #[doc = "1: Start counter without reload"] - START = 1, + Start = 1, #[doc = "2: Stop counter without reload"] - STOP = 2, + Stop = 2, #[doc = "3: Reload and start counter"] - RELOADSTART = 3, + Reloadstart = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RISEA_A) -> Self { + fn from(variant: Risea) -> Self { variant as _ } } -impl RISEA_R { +impl crate::FieldSpec for Risea { + type Ux = u8; +} +impl crate::IsEnum for Risea {} +#[doc = "Field `RISEA` reader - Timer Rising Input Edge Action"] +pub type RiseaR = crate::FieldReader; +impl RiseaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RISEA_A { + pub const fn variant(&self) -> Risea { match self.bits { - 0 => RISEA_A::NONE, - 1 => RISEA_A::START, - 2 => RISEA_A::STOP, - 3 => RISEA_A::RELOADSTART, + 0 => Risea::None, + 1 => Risea::Start, + 2 => Risea::Stop, + 3 => Risea::Reloadstart, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == RISEA_A::NONE + *self == Risea::None } - #[doc = "Checks if the value of the field is `START`"] + #[doc = "Start counter without reload"] #[inline(always)] pub fn is_start(&self) -> bool { - *self == RISEA_A::START + *self == Risea::Start } - #[doc = "Checks if the value of the field is `STOP`"] + #[doc = "Stop counter without reload"] #[inline(always)] pub fn is_stop(&self) -> bool { - *self == RISEA_A::STOP + *self == Risea::Stop } - #[doc = "Checks if the value of the field is `RELOADSTART`"] + #[doc = "Reload and start counter"] #[inline(always)] pub fn is_reloadstart(&self) -> bool { - *self == RISEA_A::RELOADSTART + *self == Risea::Reloadstart } } #[doc = "Field `RISEA` writer - Timer Rising Input Edge Action"] -pub type RISEA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, RISEA_A, 2, O>; -impl<'a, const O: u8> RISEA_W<'a, O> { +pub type RiseaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Risea, crate::Safe>; +impl<'a, REG> RiseaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(RISEA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Risea::None) } #[doc = "Start counter without reload"] #[inline(always)] - pub fn start(self) -> &'a mut W { - self.variant(RISEA_A::START) + pub fn start(self) -> &'a mut crate::W { + self.variant(Risea::Start) } #[doc = "Stop counter without reload"] #[inline(always)] - pub fn stop(self) -> &'a mut W { - self.variant(RISEA_A::STOP) + pub fn stop(self) -> &'a mut crate::W { + self.variant(Risea::Stop) } #[doc = "Reload and start counter"] #[inline(always)] - pub fn reloadstart(self) -> &'a mut W { - self.variant(RISEA_A::RELOADSTART) + pub fn reloadstart(self) -> &'a mut crate::W { + self.variant(Risea::Reloadstart) } } -#[doc = "Field `FALLA` reader - Timer Falling Input Edge Action"] -pub type FALLA_R = crate::FieldReader; #[doc = "Timer Falling Input Edge Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FALLA_A { +pub enum Falla { #[doc = "0: No action"] - NONE = 0, + None = 0, #[doc = "1: Start counter without reload"] - START = 1, + Start = 1, #[doc = "2: Stop counter without reload"] - STOP = 2, + Stop = 2, #[doc = "3: Reload and start counter"] - RELOADSTART = 3, + Reloadstart = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FALLA_A) -> Self { + fn from(variant: Falla) -> Self { variant as _ } } -impl FALLA_R { +impl crate::FieldSpec for Falla { + type Ux = u8; +} +impl crate::IsEnum for Falla {} +#[doc = "Field `FALLA` reader - Timer Falling Input Edge Action"] +pub type FallaR = crate::FieldReader; +impl FallaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FALLA_A { + pub const fn variant(&self) -> Falla { match self.bits { - 0 => FALLA_A::NONE, - 1 => FALLA_A::START, - 2 => FALLA_A::STOP, - 3 => FALLA_A::RELOADSTART, + 0 => Falla::None, + 1 => Falla::Start, + 2 => Falla::Stop, + 3 => Falla::Reloadstart, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == FALLA_A::NONE + *self == Falla::None } - #[doc = "Checks if the value of the field is `START`"] + #[doc = "Start counter without reload"] #[inline(always)] pub fn is_start(&self) -> bool { - *self == FALLA_A::START + *self == Falla::Start } - #[doc = "Checks if the value of the field is `STOP`"] + #[doc = "Stop counter without reload"] #[inline(always)] pub fn is_stop(&self) -> bool { - *self == FALLA_A::STOP + *self == Falla::Stop } - #[doc = "Checks if the value of the field is `RELOADSTART`"] + #[doc = "Reload and start counter"] #[inline(always)] pub fn is_reloadstart(&self) -> bool { - *self == FALLA_A::RELOADSTART + *self == Falla::Reloadstart } } #[doc = "Field `FALLA` writer - Timer Falling Input Edge Action"] -pub type FALLA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, FALLA_A, 2, O>; -impl<'a, const O: u8> FALLA_W<'a, O> { +pub type FallaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Falla, crate::Safe>; +impl<'a, REG> FallaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(FALLA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Falla::None) } #[doc = "Start counter without reload"] #[inline(always)] - pub fn start(self) -> &'a mut W { - self.variant(FALLA_A::START) + pub fn start(self) -> &'a mut crate::W { + self.variant(Falla::Start) } #[doc = "Stop counter without reload"] #[inline(always)] - pub fn stop(self) -> &'a mut W { - self.variant(FALLA_A::STOP) + pub fn stop(self) -> &'a mut crate::W { + self.variant(Falla::Stop) } #[doc = "Reload and start counter"] #[inline(always)] - pub fn reloadstart(self) -> &'a mut W { - self.variant(FALLA_A::RELOADSTART) + pub fn reloadstart(self) -> &'a mut crate::W { + self.variant(Falla::Reloadstart) } } #[doc = "Field `X2CNT` reader - 2x Count Mode"] -pub type X2CNT_R = crate::BitReader; +pub type X2cntR = crate::BitReader; #[doc = "Field `X2CNT` writer - 2x Count Mode"] -pub type X2CNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type X2cntW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - Timer Rising Input Edge Action"] #[inline(always)] - pub fn risea(&self) -> RISEA_R { - RISEA_R::new((self.bits & 3) as u8) + pub fn risea(&self) -> RiseaR { + RiseaR::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Timer Falling Input Edge Action"] #[inline(always)] - pub fn falla(&self) -> FALLA_R { - FALLA_R::new(((self.bits >> 2) & 3) as u8) + pub fn falla(&self) -> FallaR { + FallaR::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bit 4 - 2x Count Mode"] #[inline(always)] - pub fn x2cnt(&self) -> X2CNT_R { - X2CNT_R::new(((self.bits >> 4) & 1) != 0) + pub fn x2cnt(&self) -> X2cntR { + X2cntR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Timer Rising Input Edge Action"] #[inline(always)] #[must_use] - pub fn risea(&mut self) -> RISEA_W<0> { - RISEA_W::new(self) + pub fn risea(&mut self) -> RiseaW { + RiseaW::new(self, 0) } #[doc = "Bits 2:3 - Timer Falling Input Edge Action"] #[inline(always)] #[must_use] - pub fn falla(&mut self) -> FALLA_W<2> { - FALLA_W::new(self) + pub fn falla(&mut self) -> FallaW { + FallaW::new(self, 2) } #[doc = "Bit 4 - 2x Count Mode"] #[inline(always)] #[must_use] - pub fn x2cnt(&mut self) -> X2CNT_W<4> { - X2CNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn x2cnt(&mut self) -> X2cntW { + X2cntW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtcfg.rs index d19a9a3..82b97e1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtcfg.rs @@ -1,186 +1,149 @@ #[doc = "Register `DTCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTEN` reader - DTI Enable"] -pub type DTEN_R = crate::BitReader; +pub type DtenR = crate::BitReader; #[doc = "Field `DTEN` writer - DTI Enable"] -pub type DTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; -#[doc = "Field `DTDAS` reader - DTI Automatic Start-up Functionality"] -pub type DTDAS_R = crate::BitReader; +pub type DtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "DTI Automatic Start-up Functionality\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DTDAS_A { +pub enum Dtdas { #[doc = "0: No DTI restart on debugger exit"] - NORESTART = 0, + Norestart = 0, #[doc = "1: DTI restart on debugger exit"] - RESTART = 1, + Restart = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DTDAS_A) -> Self { + fn from(variant: Dtdas) -> Self { variant as u8 != 0 } } -impl DTDAS_R { +#[doc = "Field `DTDAS` reader - DTI Automatic Start-up Functionality"] +pub type DtdasR = crate::BitReader; +impl DtdasR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTDAS_A { + pub const fn variant(&self) -> Dtdas { match self.bits { - false => DTDAS_A::NORESTART, - true => DTDAS_A::RESTART, + false => Dtdas::Norestart, + true => Dtdas::Restart, } } - #[doc = "Checks if the value of the field is `NORESTART`"] + #[doc = "No DTI restart on debugger exit"] #[inline(always)] pub fn is_norestart(&self) -> bool { - *self == DTDAS_A::NORESTART + *self == Dtdas::Norestart } - #[doc = "Checks if the value of the field is `RESTART`"] + #[doc = "DTI restart on debugger exit"] #[inline(always)] pub fn is_restart(&self) -> bool { - *self == DTDAS_A::RESTART + *self == Dtdas::Restart } } #[doc = "Field `DTDAS` writer - DTI Automatic Start-up Functionality"] -pub type DTDAS_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, DTDAS_A, O>; -impl<'a, const O: u8> DTDAS_W<'a, O> { +pub type DtdasW<'a, REG> = crate::BitWriter<'a, REG, Dtdas>; +impl<'a, REG> DtdasW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No DTI restart on debugger exit"] #[inline(always)] - pub fn norestart(self) -> &'a mut W { - self.variant(DTDAS_A::NORESTART) + pub fn norestart(self) -> &'a mut crate::W { + self.variant(Dtdas::Norestart) } #[doc = "DTI restart on debugger exit"] #[inline(always)] - pub fn restart(self) -> &'a mut W { - self.variant(DTDAS_A::RESTART) + pub fn restart(self) -> &'a mut crate::W { + self.variant(Dtdas::Restart) } } #[doc = "Field `DTAR` reader - DTI Always Run"] -pub type DTAR_R = crate::BitReader; +pub type DtarR = crate::BitReader; #[doc = "Field `DTAR` writer - DTI Always Run"] -pub type DTAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtarW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTFATS` reader - DTI Fault Action on Timer Stop"] -pub type DTFATS_R = crate::BitReader; +pub type DtfatsR = crate::BitReader; #[doc = "Field `DTFATS` writer - DTI Fault Action on Timer Stop"] -pub type DTFATS_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtfatsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRSEN` reader - DTI PRS Source Enable"] -pub type DTPRSEN_R = crate::BitReader; +pub type DtprsenR = crate::BitReader; #[doc = "Field `DTPRSEN` writer - DTI PRS Source Enable"] -pub type DTPRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtprsenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI Enable"] #[inline(always)] - pub fn dten(&self) -> DTEN_R { - DTEN_R::new((self.bits & 1) != 0) + pub fn dten(&self) -> DtenR { + DtenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI Automatic Start-up Functionality"] #[inline(always)] - pub fn dtdas(&self) -> DTDAS_R { - DTDAS_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtdas(&self) -> DtdasR { + DtdasR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 9 - DTI Always Run"] #[inline(always)] - pub fn dtar(&self) -> DTAR_R { - DTAR_R::new(((self.bits >> 9) & 1) != 0) + pub fn dtar(&self) -> DtarR { + DtarR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - DTI Fault Action on Timer Stop"] #[inline(always)] - pub fn dtfats(&self) -> DTFATS_R { - DTFATS_R::new(((self.bits >> 10) & 1) != 0) + pub fn dtfats(&self) -> DtfatsR { + DtfatsR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - DTI PRS Source Enable"] #[inline(always)] - pub fn dtprsen(&self) -> DTPRSEN_R { - DTPRSEN_R::new(((self.bits >> 11) & 1) != 0) + pub fn dtprsen(&self) -> DtprsenR { + DtprsenR::new(((self.bits >> 11) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI Enable"] #[inline(always)] #[must_use] - pub fn dten(&mut self) -> DTEN_W<0> { - DTEN_W::new(self) + pub fn dten(&mut self) -> DtenW { + DtenW::new(self, 0) } #[doc = "Bit 1 - DTI Automatic Start-up Functionality"] #[inline(always)] #[must_use] - pub fn dtdas(&mut self) -> DTDAS_W<1> { - DTDAS_W::new(self) + pub fn dtdas(&mut self) -> DtdasW { + DtdasW::new(self, 1) } #[doc = "Bit 9 - DTI Always Run"] #[inline(always)] #[must_use] - pub fn dtar(&mut self) -> DTAR_W<9> { - DTAR_W::new(self) + pub fn dtar(&mut self) -> DtarW { + DtarW::new(self, 9) } #[doc = "Bit 10 - DTI Fault Action on Timer Stop"] #[inline(always)] #[must_use] - pub fn dtfats(&mut self) -> DTFATS_W<10> { - DTFATS_W::new(self) + pub fn dtfats(&mut self) -> DtfatsW { + DtfatsW::new(self, 10) } #[doc = "Bit 11 - DTI PRS Source Enable"] #[inline(always)] #[must_use] - pub fn dtprsen(&mut self) -> DTPRSEN_W<11> { - DTPRSEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtprsen(&mut self) -> DtprsenW { + DtprsenW::new(self, 11) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtcfg](index.html) module"] -pub struct DTCFG_SPEC; -impl crate::RegisterSpec for DTCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtcfgSpec; +impl crate::RegisterSpec for DtcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtcfg::R](R) reader structure"] -impl crate::Readable for DTCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtcfg::W](W) writer structure"] -impl crate::Writable for DTCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtcfg::R`](R) reader structure"] +impl crate::Readable for DtcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dtcfg::W`](W) writer structure"] +impl crate::Writable for DtcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTCFG to value 0"] -impl crate::Resettable for DTCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtctrl.rs index 816a05e..84f6d17 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtctrl.rs @@ -1,95 +1,55 @@ #[doc = "Register `DTCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTCINV` reader - DTI Complementary Output Invert."] -pub type DTCINV_R = crate::BitReader; +pub type DtcinvR = crate::BitReader; #[doc = "Field `DTCINV` writer - DTI Complementary Output Invert."] -pub type DTCINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, O>; +pub type DtcinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTIPOL` reader - DTI Inactive Polarity"] -pub type DTIPOL_R = crate::BitReader; +pub type DtipolR = crate::BitReader; #[doc = "Field `DTIPOL` writer - DTI Inactive Polarity"] -pub type DTIPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, O>; +pub type DtipolW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI Complementary Output Invert."] #[inline(always)] - pub fn dtcinv(&self) -> DTCINV_R { - DTCINV_R::new((self.bits & 1) != 0) + pub fn dtcinv(&self) -> DtcinvR { + DtcinvR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI Inactive Polarity"] #[inline(always)] - pub fn dtipol(&self) -> DTIPOL_R { - DTIPOL_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtipol(&self) -> DtipolR { + DtipolR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI Complementary Output Invert."] #[inline(always)] #[must_use] - pub fn dtcinv(&mut self) -> DTCINV_W<0> { - DTCINV_W::new(self) + pub fn dtcinv(&mut self) -> DtcinvW { + DtcinvW::new(self, 0) } #[doc = "Bit 1 - DTI Inactive Polarity"] #[inline(always)] #[must_use] - pub fn dtipol(&mut self) -> DTIPOL_W<1> { - DTIPOL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtipol(&mut self) -> DtipolW { + DtipolW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtctrl](index.html) module"] -pub struct DTCTRL_SPEC; -impl crate::RegisterSpec for DTCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtctrlSpec; +impl crate::RegisterSpec for DtctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtctrl::R](R) reader structure"] -impl crate::Readable for DTCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtctrl::W](W) writer structure"] -impl crate::Writable for DTCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtctrl::R`](R) reader structure"] +impl crate::Readable for DtctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`dtctrl::W`](W) writer structure"] +impl crate::Writable for DtctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTCTRL to value 0"] -impl crate::Resettable for DTCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtfault.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtfault.rs index 01a53f9..ecd21aa 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtfault.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtfault.rs @@ -1,65 +1,50 @@ #[doc = "Register `DTFAULT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DTPRS0F` reader - DTI PRS 0 Fault"] -pub type DTPRS0F_R = crate::BitReader; +pub type Dtprs0fR = crate::BitReader; #[doc = "Field `DTPRS1F` reader - DTI PRS 1 Fault"] -pub type DTPRS1F_R = crate::BitReader; +pub type Dtprs1fR = crate::BitReader; #[doc = "Field `DTDBGF` reader - DTI Debugger Fault"] -pub type DTDBGF_R = crate::BitReader; +pub type DtdbgfR = crate::BitReader; #[doc = "Field `DTLOCKUPF` reader - DTI Lockup Fault"] -pub type DTLOCKUPF_R = crate::BitReader; +pub type DtlockupfR = crate::BitReader; #[doc = "Field `DTEM23F` reader - DTI EM23 Entry Fault"] -pub type DTEM23F_R = crate::BitReader; +pub type Dtem23fR = crate::BitReader; impl R { #[doc = "Bit 0 - DTI PRS 0 Fault"] #[inline(always)] - pub fn dtprs0f(&self) -> DTPRS0F_R { - DTPRS0F_R::new((self.bits & 1) != 0) + pub fn dtprs0f(&self) -> Dtprs0fR { + Dtprs0fR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI PRS 1 Fault"] #[inline(always)] - pub fn dtprs1f(&self) -> DTPRS1F_R { - DTPRS1F_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtprs1f(&self) -> Dtprs1fR { + Dtprs1fR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DTI Debugger Fault"] #[inline(always)] - pub fn dtdbgf(&self) -> DTDBGF_R { - DTDBGF_R::new(((self.bits >> 2) & 1) != 0) + pub fn dtdbgf(&self) -> DtdbgfR { + DtdbgfR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DTI Lockup Fault"] #[inline(always)] - pub fn dtlockupf(&self) -> DTLOCKUPF_R { - DTLOCKUPF_R::new(((self.bits >> 3) & 1) != 0) + pub fn dtlockupf(&self) -> DtlockupfR { + DtlockupfR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - DTI EM23 Entry Fault"] #[inline(always)] - pub fn dtem23f(&self) -> DTEM23F_R { - DTEM23F_R::new(((self.bits >> 4) & 1) != 0) + pub fn dtem23f(&self) -> Dtem23fR { + Dtem23fR::new(((self.bits >> 4) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfault](index.html) module"] -pub struct DTFAULT_SPEC; -impl crate::RegisterSpec for DTFAULT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfault::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfaultSpec; +impl crate::RegisterSpec for DtfaultSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtfault::R](R) reader structure"] -impl crate::Readable for DTFAULT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`dtfault::R`](R) reader structure"] +impl crate::Readable for DtfaultSpec {} #[doc = "`reset()` method sets DTFAULT to value 0"] -impl crate::Resettable for DTFAULT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfaultSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtfaultc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtfaultc.rs index 1c3d1ba..bcb21e2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtfaultc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtfaultc.rs @@ -1,84 +1,59 @@ #[doc = "Register `DTFAULTC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTPRS0FC` writer - DTI PRS0 Fault Clear"] -pub type DTPRS0FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtprs0fcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRS1FC` writer - DTI PRS1 Fault Clear"] -pub type DTPRS1FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtprs1fcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTDBGFC` writer - DTI Debugger Fault Clear"] -pub type DTDBGFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type DtdbgfcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTLOCKUPFC` writer - DTI Lockup Fault Clear"] -pub type DTLOCKUPFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type DtlockupfcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTEM23FC` writer - DTI EM23 Fault Clear"] -pub type DTEM23FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtem23fcW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - DTI PRS0 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtprs0fc(&mut self) -> DTPRS0FC_W<0> { - DTPRS0FC_W::new(self) + pub fn dtprs0fc(&mut self) -> Dtprs0fcW { + Dtprs0fcW::new(self, 0) } #[doc = "Bit 1 - DTI PRS1 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtprs1fc(&mut self) -> DTPRS1FC_W<1> { - DTPRS1FC_W::new(self) + pub fn dtprs1fc(&mut self) -> Dtprs1fcW { + Dtprs1fcW::new(self, 1) } #[doc = "Bit 2 - DTI Debugger Fault Clear"] #[inline(always)] #[must_use] - pub fn dtdbgfc(&mut self) -> DTDBGFC_W<2> { - DTDBGFC_W::new(self) + pub fn dtdbgfc(&mut self) -> DtdbgfcW { + DtdbgfcW::new(self, 2) } #[doc = "Bit 3 - DTI Lockup Fault Clear"] #[inline(always)] #[must_use] - pub fn dtlockupfc(&mut self) -> DTLOCKUPFC_W<3> { - DTLOCKUPFC_W::new(self) + pub fn dtlockupfc(&mut self) -> DtlockupfcW { + DtlockupfcW::new(self, 3) } #[doc = "Bit 4 - DTI EM23 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtem23fc(&mut self) -> DTEM23FC_W<4> { - DTEM23FC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtem23fc(&mut self) -> Dtem23fcW { + Dtem23fcW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfaultc](index.html) module"] -pub struct DTFAULTC_SPEC; -impl crate::RegisterSpec for DTFAULTC_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfaultc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfaultcSpec; +impl crate::RegisterSpec for DtfaultcSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [dtfaultc::W](W) writer structure"] -impl crate::Writable for DTFAULTC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`dtfaultc::W`](W) writer structure"] +impl crate::Writable for DtfaultcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTFAULTC to value 0"] -impl crate::Resettable for DTFAULTC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfaultcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtfcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtfcfg.rs index 91dee4b..6179df8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtfcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtfcfg.rs @@ -1,229 +1,197 @@ #[doc = "Register `DTFCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTFCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DTFA` reader - DTI Fault Action"] -pub type DTFA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DTI Fault Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DTFA_A { +pub enum Dtfa { #[doc = "0: No action on fault"] - NONE = 0, + None = 0, #[doc = "1: Set outputs inactive"] - INACTIVE = 1, + Inactive = 1, #[doc = "2: Clear outputs"] - CLEAR = 2, + Clear = 2, #[doc = "3: Tristate outputs"] - TRISTATE = 3, + Tristate = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DTFA_A) -> Self { + fn from(variant: Dtfa) -> Self { variant as _ } } -impl DTFA_R { +impl crate::FieldSpec for Dtfa { + type Ux = u8; +} +impl crate::IsEnum for Dtfa {} +#[doc = "Field `DTFA` reader - DTI Fault Action"] +pub type DtfaR = crate::FieldReader; +impl DtfaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTFA_A { + pub const fn variant(&self) -> Dtfa { match self.bits { - 0 => DTFA_A::NONE, - 1 => DTFA_A::INACTIVE, - 2 => DTFA_A::CLEAR, - 3 => DTFA_A::TRISTATE, + 0 => Dtfa::None, + 1 => Dtfa::Inactive, + 2 => Dtfa::Clear, + 3 => Dtfa::Tristate, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on fault"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == DTFA_A::NONE + *self == Dtfa::None } - #[doc = "Checks if the value of the field is `INACTIVE`"] + #[doc = "Set outputs inactive"] #[inline(always)] pub fn is_inactive(&self) -> bool { - *self == DTFA_A::INACTIVE + *self == Dtfa::Inactive } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear outputs"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == DTFA_A::CLEAR + *self == Dtfa::Clear } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "Tristate outputs"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == DTFA_A::TRISTATE + *self == Dtfa::Tristate } } #[doc = "Field `DTFA` writer - DTI Fault Action"] -pub type DTFA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, DTFCFG_SPEC, u8, DTFA_A, 2, O>; -impl<'a, const O: u8> DTFA_W<'a, O> { +pub type DtfaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dtfa, crate::Safe>; +impl<'a, REG> DtfaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on fault"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(DTFA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Dtfa::None) } #[doc = "Set outputs inactive"] #[inline(always)] - pub fn inactive(self) -> &'a mut W { - self.variant(DTFA_A::INACTIVE) + pub fn inactive(self) -> &'a mut crate::W { + self.variant(Dtfa::Inactive) } #[doc = "Clear outputs"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(DTFA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Dtfa::Clear) } #[doc = "Tristate outputs"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(DTFA_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Dtfa::Tristate) } } #[doc = "Field `DTPRS0FEN` reader - DTI PRS 0 Fault Enable"] -pub type DTPRS0FEN_R = crate::BitReader; +pub type Dtprs0fenR = crate::BitReader; #[doc = "Field `DTPRS0FEN` writer - DTI PRS 0 Fault Enable"] -pub type DTPRS0FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtprs0fenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRS1FEN` reader - DTI PRS 1 Fault Enable"] -pub type DTPRS1FEN_R = crate::BitReader; +pub type Dtprs1fenR = crate::BitReader; #[doc = "Field `DTPRS1FEN` writer - DTI PRS 1 Fault Enable"] -pub type DTPRS1FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtprs1fenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTDBGFEN` reader - DTI Debugger Fault Enable"] -pub type DTDBGFEN_R = crate::BitReader; +pub type DtdbgfenR = crate::BitReader; #[doc = "Field `DTDBGFEN` writer - DTI Debugger Fault Enable"] -pub type DTDBGFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type DtdbgfenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTLOCKUPFEN` reader - DTI Lockup Fault Enable"] -pub type DTLOCKUPFEN_R = crate::BitReader; +pub type DtlockupfenR = crate::BitReader; #[doc = "Field `DTLOCKUPFEN` writer - DTI Lockup Fault Enable"] -pub type DTLOCKUPFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type DtlockupfenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTEM23FEN` reader - DTI EM23 Fault Enable"] -pub type DTEM23FEN_R = crate::BitReader; +pub type Dtem23fenR = crate::BitReader; #[doc = "Field `DTEM23FEN` writer - DTI EM23 Fault Enable"] -pub type DTEM23FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtem23fenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 16:17 - DTI Fault Action"] #[inline(always)] - pub fn dtfa(&self) -> DTFA_R { - DTFA_R::new(((self.bits >> 16) & 3) as u8) + pub fn dtfa(&self) -> DtfaR { + DtfaR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 24 - DTI PRS 0 Fault Enable"] #[inline(always)] - pub fn dtprs0fen(&self) -> DTPRS0FEN_R { - DTPRS0FEN_R::new(((self.bits >> 24) & 1) != 0) + pub fn dtprs0fen(&self) -> Dtprs0fenR { + Dtprs0fenR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - DTI PRS 1 Fault Enable"] #[inline(always)] - pub fn dtprs1fen(&self) -> DTPRS1FEN_R { - DTPRS1FEN_R::new(((self.bits >> 25) & 1) != 0) + pub fn dtprs1fen(&self) -> Dtprs1fenR { + Dtprs1fenR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - DTI Debugger Fault Enable"] #[inline(always)] - pub fn dtdbgfen(&self) -> DTDBGFEN_R { - DTDBGFEN_R::new(((self.bits >> 26) & 1) != 0) + pub fn dtdbgfen(&self) -> DtdbgfenR { + DtdbgfenR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - DTI Lockup Fault Enable"] #[inline(always)] - pub fn dtlockupfen(&self) -> DTLOCKUPFEN_R { - DTLOCKUPFEN_R::new(((self.bits >> 27) & 1) != 0) + pub fn dtlockupfen(&self) -> DtlockupfenR { + DtlockupfenR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - DTI EM23 Fault Enable"] #[inline(always)] - pub fn dtem23fen(&self) -> DTEM23FEN_R { - DTEM23FEN_R::new(((self.bits >> 28) & 1) != 0) + pub fn dtem23fen(&self) -> Dtem23fenR { + Dtem23fenR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bits 16:17 - DTI Fault Action"] #[inline(always)] #[must_use] - pub fn dtfa(&mut self) -> DTFA_W<16> { - DTFA_W::new(self) + pub fn dtfa(&mut self) -> DtfaW { + DtfaW::new(self, 16) } #[doc = "Bit 24 - DTI PRS 0 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtprs0fen(&mut self) -> DTPRS0FEN_W<24> { - DTPRS0FEN_W::new(self) + pub fn dtprs0fen(&mut self) -> Dtprs0fenW { + Dtprs0fenW::new(self, 24) } #[doc = "Bit 25 - DTI PRS 1 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtprs1fen(&mut self) -> DTPRS1FEN_W<25> { - DTPRS1FEN_W::new(self) + pub fn dtprs1fen(&mut self) -> Dtprs1fenW { + Dtprs1fenW::new(self, 25) } #[doc = "Bit 26 - DTI Debugger Fault Enable"] #[inline(always)] #[must_use] - pub fn dtdbgfen(&mut self) -> DTDBGFEN_W<26> { - DTDBGFEN_W::new(self) + pub fn dtdbgfen(&mut self) -> DtdbgfenW { + DtdbgfenW::new(self, 26) } #[doc = "Bit 27 - DTI Lockup Fault Enable"] #[inline(always)] #[must_use] - pub fn dtlockupfen(&mut self) -> DTLOCKUPFEN_W<27> { - DTLOCKUPFEN_W::new(self) + pub fn dtlockupfen(&mut self) -> DtlockupfenW { + DtlockupfenW::new(self, 27) } #[doc = "Bit 28 - DTI EM23 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtem23fen(&mut self) -> DTEM23FEN_W<28> { - DTEM23FEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtem23fen(&mut self) -> Dtem23fenW { + Dtem23fenW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfcfg](index.html) module"] -pub struct DTFCFG_SPEC; -impl crate::RegisterSpec for DTFCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfcfgSpec; +impl crate::RegisterSpec for DtfcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtfcfg::R](R) reader structure"] -impl crate::Readable for DTFCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtfcfg::W](W) writer structure"] -impl crate::Writable for DTFCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtfcfg::R`](R) reader structure"] +impl crate::Readable for DtfcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dtfcfg::W`](W) writer structure"] +impl crate::Writable for DtfcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTFCFG to value 0"] -impl crate::Resettable for DTFCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtlock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtlock.rs index 434789a..5ce63f5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtlock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtlock.rs @@ -1,73 +1,55 @@ #[doc = "Register `DTLOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "DTI Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum DTILOCKKEY_AW { +pub enum Dtilockkey { #[doc = "52864: Write to unlock TIMER DTI registers"] - UNLOCK = 52864, + Unlock = 52864, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: DTILOCKKEY_AW) -> Self { + fn from(variant: Dtilockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Dtilockkey { + type Ux = u16; +} +impl crate::IsEnum for Dtilockkey {} #[doc = "Field `DTILOCKKEY` writer - DTI Lock Key"] -pub type DTILOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, DTLOCK_SPEC, u16, DTILOCKKEY_AW, 16, O>; -impl<'a, const O: u8> DTILOCKKEY_W<'a, O> { +pub type DtilockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Dtilockkey>; +impl<'a, REG> DtilockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unlock TIMER DTI registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(DTILOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Dtilockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - DTI Lock Key"] #[inline(always)] #[must_use] - pub fn dtilockkey(&mut self) -> DTILOCKKEY_W<0> { - DTILOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtilockkey(&mut self) -> DtilockkeyW { + DtilockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtlock](index.html) module"] -pub struct DTLOCK_SPEC; -impl crate::RegisterSpec for DTLOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtlock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtlockSpec; +impl crate::RegisterSpec for DtlockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [dtlock::W](W) writer structure"] -impl crate::Writable for DTLOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`dtlock::W`](W) writer structure"] +impl crate::Writable for DtlockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTLOCK to value 0"] -impl crate::Resettable for DTLOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtlockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtogen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtogen.rs index 818b4bb..35926ca 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtogen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dtogen.rs @@ -1,155 +1,115 @@ #[doc = "Register `DTOGEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTOGEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTOGCC0EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC0EN_R = crate::BitReader; +pub type Dtogcc0enR = crate::BitReader; #[doc = "Field `DTOGCC0EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCC1EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC1EN_R = crate::BitReader; +pub type Dtogcc1enR = crate::BitReader; #[doc = "Field `DTOGCC1EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCC2EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC2EN_R = crate::BitReader; +pub type Dtogcc2enR = crate::BitReader; #[doc = "Field `DTOGCC2EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC2EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc2enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI0EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI0EN_R = crate::BitReader; +pub type Dtogcdti0enR = crate::BitReader; #[doc = "Field `DTOGCDTI0EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI1EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI1EN_R = crate::BitReader; +pub type Dtogcdti1enR = crate::BitReader; #[doc = "Field `DTOGCDTI1EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI2EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI2EN_R = crate::BitReader; +pub type Dtogcdti2enR = crate::BitReader; #[doc = "Field `DTOGCDTI2EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI2EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti2enW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc0en(&self) -> DTOGCC0EN_R { - DTOGCC0EN_R::new((self.bits & 1) != 0) + pub fn dtogcc0en(&self) -> Dtogcc0enR { + Dtogcc0enR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc1en(&self) -> DTOGCC1EN_R { - DTOGCC1EN_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtogcc1en(&self) -> Dtogcc1enR { + Dtogcc1enR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc2en(&self) -> DTOGCC2EN_R { - DTOGCC2EN_R::new(((self.bits >> 2) & 1) != 0) + pub fn dtogcc2en(&self) -> Dtogcc2enR { + Dtogcc2enR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti0en(&self) -> DTOGCDTI0EN_R { - DTOGCDTI0EN_R::new(((self.bits >> 3) & 1) != 0) + pub fn dtogcdti0en(&self) -> Dtogcdti0enR { + Dtogcdti0enR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti1en(&self) -> DTOGCDTI1EN_R { - DTOGCDTI1EN_R::new(((self.bits >> 4) & 1) != 0) + pub fn dtogcdti1en(&self) -> Dtogcdti1enR { + Dtogcdti1enR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti2en(&self) -> DTOGCDTI2EN_R { - DTOGCDTI2EN_R::new(((self.bits >> 5) & 1) != 0) + pub fn dtogcdti2en(&self) -> Dtogcdti2enR { + Dtogcdti2enR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc0en(&mut self) -> DTOGCC0EN_W<0> { - DTOGCC0EN_W::new(self) + pub fn dtogcc0en(&mut self) -> Dtogcc0enW { + Dtogcc0enW::new(self, 0) } #[doc = "Bit 1 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc1en(&mut self) -> DTOGCC1EN_W<1> { - DTOGCC1EN_W::new(self) + pub fn dtogcc1en(&mut self) -> Dtogcc1enW { + Dtogcc1enW::new(self, 1) } #[doc = "Bit 2 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc2en(&mut self) -> DTOGCC2EN_W<2> { - DTOGCC2EN_W::new(self) + pub fn dtogcc2en(&mut self) -> Dtogcc2enW { + Dtogcc2enW::new(self, 2) } #[doc = "Bit 3 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti0en(&mut self) -> DTOGCDTI0EN_W<3> { - DTOGCDTI0EN_W::new(self) + pub fn dtogcdti0en(&mut self) -> Dtogcdti0enW { + Dtogcdti0enW::new(self, 3) } #[doc = "Bit 4 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti1en(&mut self) -> DTOGCDTI1EN_W<4> { - DTOGCDTI1EN_W::new(self) + pub fn dtogcdti1en(&mut self) -> Dtogcdti1enW { + Dtogcdti1enW::new(self, 4) } #[doc = "Bit 5 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti2en(&mut self) -> DTOGCDTI2EN_W<5> { - DTOGCDTI2EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtogcdti2en(&mut self) -> Dtogcdti2enW { + Dtogcdti2enW::new(self, 5) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtogen](index.html) module"] -pub struct DTOGEN_SPEC; -impl crate::RegisterSpec for DTOGEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtogen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtogen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtogenSpec; +impl crate::RegisterSpec for DtogenSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtogen::R](R) reader structure"] -impl crate::Readable for DTOGEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtogen::W](W) writer structure"] -impl crate::Writable for DTOGEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtogen::R`](R) reader structure"] +impl crate::Readable for DtogenSpec {} +#[doc = "`write(|w| ..)` method takes [`dtogen::W`](W) writer structure"] +impl crate::Writable for DtogenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTOGEN to value 0"] -impl crate::Resettable for DTOGEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtogenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dttimecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dttimecfg.rs index 63e4c73..9577f86 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dttimecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/dttimecfg.rs @@ -1,110 +1,70 @@ #[doc = "Register `DTTIMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTTIMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTPRESC` reader - DTI Prescaler Setting"] -pub type DTPRESC_R = crate::FieldReader; +pub type DtprescR = crate::FieldReader; #[doc = "Field `DTPRESC` writer - DTI Prescaler Setting"] -pub type DTPRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u16, u16, 10, O>; +pub type DtprescW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `DTRISET` reader - DTI Rise-time"] -pub type DTRISET_R = crate::FieldReader; +pub type DtrisetR = crate::FieldReader; #[doc = "Field `DTRISET` writer - DTI Rise-time"] -pub type DTRISET_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u8, u8, 6, O>; +pub type DtrisetW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `DTFALLT` reader - DTI Fall-time"] -pub type DTFALLT_R = crate::FieldReader; +pub type DtfalltR = crate::FieldReader; #[doc = "Field `DTFALLT` writer - DTI Fall-time"] -pub type DTFALLT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u8, u8, 6, O>; +pub type DtfalltW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:9 - DTI Prescaler Setting"] #[inline(always)] - pub fn dtpresc(&self) -> DTPRESC_R { - DTPRESC_R::new((self.bits & 0x03ff) as u16) + pub fn dtpresc(&self) -> DtprescR { + DtprescR::new((self.bits & 0x03ff) as u16) } #[doc = "Bits 10:15 - DTI Rise-time"] #[inline(always)] - pub fn dtriset(&self) -> DTRISET_R { - DTRISET_R::new(((self.bits >> 10) & 0x3f) as u8) + pub fn dtriset(&self) -> DtrisetR { + DtrisetR::new(((self.bits >> 10) & 0x3f) as u8) } #[doc = "Bits 16:21 - DTI Fall-time"] #[inline(always)] - pub fn dtfallt(&self) -> DTFALLT_R { - DTFALLT_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn dtfallt(&self) -> DtfalltR { + DtfalltR::new(((self.bits >> 16) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:9 - DTI Prescaler Setting"] #[inline(always)] #[must_use] - pub fn dtpresc(&mut self) -> DTPRESC_W<0> { - DTPRESC_W::new(self) + pub fn dtpresc(&mut self) -> DtprescW { + DtprescW::new(self, 0) } #[doc = "Bits 10:15 - DTI Rise-time"] #[inline(always)] #[must_use] - pub fn dtriset(&mut self) -> DTRISET_W<10> { - DTRISET_W::new(self) + pub fn dtriset(&mut self) -> DtrisetW { + DtrisetW::new(self, 10) } #[doc = "Bits 16:21 - DTI Fall-time"] #[inline(always)] #[must_use] - pub fn dtfallt(&mut self) -> DTFALLT_W<16> { - DTFALLT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtfallt(&mut self) -> DtfalltW { + DtfalltW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dttimecfg](index.html) module"] -pub struct DTTIMECFG_SPEC; -impl crate::RegisterSpec for DTTIMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dttimecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dttimecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DttimecfgSpec; +impl crate::RegisterSpec for DttimecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dttimecfg::R](R) reader structure"] -impl crate::Readable for DTTIMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dttimecfg::W](W) writer structure"] -impl crate::Writable for DTTIMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dttimecfg::R`](R) reader structure"] +impl crate::Readable for DttimecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dttimecfg::W`](W) writer structure"] +impl crate::Writable for DttimecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTTIMECFG to value 0"] -impl crate::Resettable for DTTIMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DttimecfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/en.rs index 9392483..303507b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Timer Module Enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Timer Module Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Timer Module Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Timer Module Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/ien.rs index 66588d7..73273ef 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/ien.rs @@ -1,290 +1,250 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OF` reader - Overflow Interrupt Enable"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Enable"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UF` reader - Underflow Interrupt Enable"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Enable"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DIRCHG` reader - Direction Change Detect Interrupt Enable"] -pub type DIRCHG_R = crate::BitReader; +pub type DirchgR = crate::BitReader; #[doc = "Field `DIRCHG` writer - Direction Change Detect Interrupt Enable"] -pub type DIRCHG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type DirchgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC0` reader - CC0 Interrupt Enable"] -pub type CC0_R = crate::BitReader; +pub type Cc0R = crate::BitReader; #[doc = "Field `CC0` writer - CC0 Interrupt Enable"] -pub type CC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1` reader - CC1 Interrupt Enable"] -pub type CC1_R = crate::BitReader; +pub type Cc1R = crate::BitReader; #[doc = "Field `CC1` writer - CC1 Interrupt Enable"] -pub type CC1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2` reader - CC2 Interrupt Enable"] -pub type CC2_R = crate::BitReader; +pub type Cc2R = crate::BitReader; #[doc = "Field `CC2` writer - CC2 Interrupt Enable"] -pub type CC2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL0` reader - ICFWLFULL0 Interrupt Enable"] -pub type ICFWLFULL0_R = crate::BitReader; +pub type Icfwlfull0R = crate::BitReader; #[doc = "Field `ICFWLFULL0` writer - ICFWLFULL0 Interrupt Enable"] -pub type ICFWLFULL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL1` reader - ICFWLFULL1 Interrupt Enable"] -pub type ICFWLFULL1_R = crate::BitReader; +pub type Icfwlfull1R = crate::BitReader; #[doc = "Field `ICFWLFULL1` writer - ICFWLFULL1 Interrupt Enable"] -pub type ICFWLFULL1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL2` reader - ICFWLFULL2 Interrupt Enable"] -pub type ICFWLFULL2_R = crate::BitReader; +pub type Icfwlfull2R = crate::BitReader; #[doc = "Field `ICFWLFULL2` writer - ICFWLFULL2 Interrupt Enable"] -pub type ICFWLFULL2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF0` reader - ICFOF0 Interrupt Enable"] -pub type ICFOF0_R = crate::BitReader; +pub type Icfof0R = crate::BitReader; #[doc = "Field `ICFOF0` writer - ICFOF0 Interrupt Enable"] -pub type ICFOF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF1` reader - ICFOF1 Interrupt Enable"] -pub type ICFOF1_R = crate::BitReader; +pub type Icfof1R = crate::BitReader; #[doc = "Field `ICFOF1` writer - ICFOF1 Interrupt Enable"] -pub type ICFOF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF2` reader - ICFOF2 Interrupt Enable"] -pub type ICFOF2_R = crate::BitReader; +pub type Icfof2R = crate::BitReader; #[doc = "Field `ICFOF2` writer - ICFOF2 Interrupt Enable"] -pub type ICFOF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF0` reader - ICFUF0 Interrupt Enable"] -pub type ICFUF0_R = crate::BitReader; +pub type Icfuf0R = crate::BitReader; #[doc = "Field `ICFUF0` writer - ICFUF0 Interrupt Enable"] -pub type ICFUF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF1` reader - ICFUF1 Interrupt Enable"] -pub type ICFUF1_R = crate::BitReader; +pub type Icfuf1R = crate::BitReader; #[doc = "Field `ICFUF1` writer - ICFUF1 Interrupt Enable"] -pub type ICFUF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF2` reader - ICFUF2 Interrupt Enable"] -pub type ICFUF2_R = crate::BitReader; +pub type Icfuf2R = crate::BitReader; #[doc = "Field `ICFUF2` writer - ICFUF2 Interrupt Enable"] -pub type ICFUF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Enable"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new((self.bits & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Underflow Interrupt Enable"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new(((self.bits >> 1) & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Direction Change Detect Interrupt Enable"] #[inline(always)] - pub fn dirchg(&self) -> DIRCHG_R { - DIRCHG_R::new(((self.bits >> 2) & 1) != 0) + pub fn dirchg(&self) -> DirchgR { + DirchgR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - CC0 Interrupt Enable"] #[inline(always)] - pub fn cc0(&self) -> CC0_R { - CC0_R::new(((self.bits >> 4) & 1) != 0) + pub fn cc0(&self) -> Cc0R { + Cc0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CC1 Interrupt Enable"] #[inline(always)] - pub fn cc1(&self) -> CC1_R { - CC1_R::new(((self.bits >> 5) & 1) != 0) + pub fn cc1(&self) -> Cc1R { + Cc1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - CC2 Interrupt Enable"] #[inline(always)] - pub fn cc2(&self) -> CC2_R { - CC2_R::new(((self.bits >> 6) & 1) != 0) + pub fn cc2(&self) -> Cc2R { + Cc2R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 16 - ICFWLFULL0 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull0(&self) -> ICFWLFULL0_R { - ICFWLFULL0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfwlfull0(&self) -> Icfwlfull0R { + Icfwlfull0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - ICFWLFULL1 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull1(&self) -> ICFWLFULL1_R { - ICFWLFULL1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfwlfull1(&self) -> Icfwlfull1R { + Icfwlfull1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - ICFWLFULL2 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull2(&self) -> ICFWLFULL2_R { - ICFWLFULL2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfwlfull2(&self) -> Icfwlfull2R { + Icfwlfull2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - ICFOF0 Interrupt Enable"] #[inline(always)] - pub fn icfof0(&self) -> ICFOF0_R { - ICFOF0_R::new(((self.bits >> 20) & 1) != 0) + pub fn icfof0(&self) -> Icfof0R { + Icfof0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - ICFOF1 Interrupt Enable"] #[inline(always)] - pub fn icfof1(&self) -> ICFOF1_R { - ICFOF1_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfof1(&self) -> Icfof1R { + Icfof1R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - ICFOF2 Interrupt Enable"] #[inline(always)] - pub fn icfof2(&self) -> ICFOF2_R { - ICFOF2_R::new(((self.bits >> 22) & 1) != 0) + pub fn icfof2(&self) -> Icfof2R { + Icfof2R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 24 - ICFUF0 Interrupt Enable"] #[inline(always)] - pub fn icfuf0(&self) -> ICFUF0_R { - ICFUF0_R::new(((self.bits >> 24) & 1) != 0) + pub fn icfuf0(&self) -> Icfuf0R { + Icfuf0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - ICFUF1 Interrupt Enable"] #[inline(always)] - pub fn icfuf1(&self) -> ICFUF1_R { - ICFUF1_R::new(((self.bits >> 25) & 1) != 0) + pub fn icfuf1(&self) -> Icfuf1R { + Icfuf1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - ICFUF2 Interrupt Enable"] #[inline(always)] - pub fn icfuf2(&self) -> ICFUF2_R { - ICFUF2_R::new(((self.bits >> 26) & 1) != 0) + pub fn icfuf2(&self) -> Icfuf2R { + Icfuf2R::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<0> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 0) } #[doc = "Bit 1 - Underflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<1> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 1) } #[doc = "Bit 2 - Direction Change Detect Interrupt Enable"] #[inline(always)] #[must_use] - pub fn dirchg(&mut self) -> DIRCHG_W<2> { - DIRCHG_W::new(self) + pub fn dirchg(&mut self) -> DirchgW { + DirchgW::new(self, 2) } #[doc = "Bit 4 - CC0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc0(&mut self) -> CC0_W<4> { - CC0_W::new(self) + pub fn cc0(&mut self) -> Cc0W { + Cc0W::new(self, 4) } #[doc = "Bit 5 - CC1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc1(&mut self) -> CC1_W<5> { - CC1_W::new(self) + pub fn cc1(&mut self) -> Cc1W { + Cc1W::new(self, 5) } #[doc = "Bit 6 - CC2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc2(&mut self) -> CC2_W<6> { - CC2_W::new(self) + pub fn cc2(&mut self) -> Cc2W { + Cc2W::new(self, 6) } #[doc = "Bit 16 - ICFWLFULL0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull0(&mut self) -> ICFWLFULL0_W<16> { - ICFWLFULL0_W::new(self) + pub fn icfwlfull0(&mut self) -> Icfwlfull0W { + Icfwlfull0W::new(self, 16) } #[doc = "Bit 17 - ICFWLFULL1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull1(&mut self) -> ICFWLFULL1_W<17> { - ICFWLFULL1_W::new(self) + pub fn icfwlfull1(&mut self) -> Icfwlfull1W { + Icfwlfull1W::new(self, 17) } #[doc = "Bit 18 - ICFWLFULL2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull2(&mut self) -> ICFWLFULL2_W<18> { - ICFWLFULL2_W::new(self) + pub fn icfwlfull2(&mut self) -> Icfwlfull2W { + Icfwlfull2W::new(self, 18) } #[doc = "Bit 20 - ICFOF0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof0(&mut self) -> ICFOF0_W<20> { - ICFOF0_W::new(self) + pub fn icfof0(&mut self) -> Icfof0W { + Icfof0W::new(self, 20) } #[doc = "Bit 21 - ICFOF1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof1(&mut self) -> ICFOF1_W<21> { - ICFOF1_W::new(self) + pub fn icfof1(&mut self) -> Icfof1W { + Icfof1W::new(self, 21) } #[doc = "Bit 22 - ICFOF2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof2(&mut self) -> ICFOF2_W<22> { - ICFOF2_W::new(self) + pub fn icfof2(&mut self) -> Icfof2W { + Icfof2W::new(self, 22) } #[doc = "Bit 24 - ICFUF0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf0(&mut self) -> ICFUF0_W<24> { - ICFUF0_W::new(self) + pub fn icfuf0(&mut self) -> Icfuf0W { + Icfuf0W::new(self, 24) } #[doc = "Bit 25 - ICFUF1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf1(&mut self) -> ICFUF1_W<25> { - ICFUF1_W::new(self) + pub fn icfuf1(&mut self) -> Icfuf1W { + Icfuf1W::new(self, 25) } #[doc = "Bit 26 - ICFUF2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf2(&mut self) -> ICFUF2_W<26> { - ICFUF2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfuf2(&mut self) -> Icfuf2W { + Icfuf2W::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/if_.rs index edde0f3..fad1cd1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/if_.rs @@ -1,290 +1,250 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OF` reader - Overflow Interrupt Flag"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Flag"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UF` reader - Underflow Interrupt Flag"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Flag"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DIRCHG` reader - Direction Change Detect Interrupt Flag"] -pub type DIRCHG_R = crate::BitReader; +pub type DirchgR = crate::BitReader; #[doc = "Field `DIRCHG` writer - Direction Change Detect Interrupt Flag"] -pub type DIRCHG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type DirchgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC0` reader - Capture Compare Channel 0 Interrupt Flag"] -pub type CC0_R = crate::BitReader; +pub type Cc0R = crate::BitReader; #[doc = "Field `CC0` writer - Capture Compare Channel 0 Interrupt Flag"] -pub type CC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1` reader - Capture Compare Channel 1 Interrupt Flag"] -pub type CC1_R = crate::BitReader; +pub type Cc1R = crate::BitReader; #[doc = "Field `CC1` writer - Capture Compare Channel 1 Interrupt Flag"] -pub type CC1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2` reader - Capture Compare Channel 2 Interrupt Flag"] -pub type CC2_R = crate::BitReader; +pub type Cc2R = crate::BitReader; #[doc = "Field `CC2` writer - Capture Compare Channel 2 Interrupt Flag"] -pub type CC2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL0` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL0_R = crate::BitReader; +pub type Icfwlfull0R = crate::BitReader; #[doc = "Field `ICFWLFULL0` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL1` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL1_R = crate::BitReader; +pub type Icfwlfull1R = crate::BitReader; #[doc = "Field `ICFWLFULL1` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL2` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL2_R = crate::BitReader; +pub type Icfwlfull2R = crate::BitReader; #[doc = "Field `ICFWLFULL2` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF0` reader - Input Capture FIFO overflow"] -pub type ICFOF0_R = crate::BitReader; +pub type Icfof0R = crate::BitReader; #[doc = "Field `ICFOF0` writer - Input Capture FIFO overflow"] -pub type ICFOF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF1` reader - Input Capture FIFO overflow"] -pub type ICFOF1_R = crate::BitReader; +pub type Icfof1R = crate::BitReader; #[doc = "Field `ICFOF1` writer - Input Capture FIFO overflow"] -pub type ICFOF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF2` reader - Input Capture FIFO overflow"] -pub type ICFOF2_R = crate::BitReader; +pub type Icfof2R = crate::BitReader; #[doc = "Field `ICFOF2` writer - Input Capture FIFO overflow"] -pub type ICFOF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF0` reader - Input capture FIFO underflow"] -pub type ICFUF0_R = crate::BitReader; +pub type Icfuf0R = crate::BitReader; #[doc = "Field `ICFUF0` writer - Input capture FIFO underflow"] -pub type ICFUF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF1` reader - Input capture FIFO underflow"] -pub type ICFUF1_R = crate::BitReader; +pub type Icfuf1R = crate::BitReader; #[doc = "Field `ICFUF1` writer - Input capture FIFO underflow"] -pub type ICFUF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF2` reader - Input capture FIFO underflow"] -pub type ICFUF2_R = crate::BitReader; +pub type Icfuf2R = crate::BitReader; #[doc = "Field `ICFUF2` writer - Input capture FIFO underflow"] -pub type ICFUF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new((self.bits & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Underflow Interrupt Flag"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new(((self.bits >> 1) & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] - pub fn dirchg(&self) -> DIRCHG_R { - DIRCHG_R::new(((self.bits >> 2) & 1) != 0) + pub fn dirchg(&self) -> DirchgR { + DirchgR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Capture Compare Channel 0 Interrupt Flag"] #[inline(always)] - pub fn cc0(&self) -> CC0_R { - CC0_R::new(((self.bits >> 4) & 1) != 0) + pub fn cc0(&self) -> Cc0R { + Cc0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Capture Compare Channel 1 Interrupt Flag"] #[inline(always)] - pub fn cc1(&self) -> CC1_R { - CC1_R::new(((self.bits >> 5) & 1) != 0) + pub fn cc1(&self) -> Cc1R { + Cc1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Capture Compare Channel 2 Interrupt Flag"] #[inline(always)] - pub fn cc2(&self) -> CC2_R { - CC2_R::new(((self.bits >> 6) & 1) != 0) + pub fn cc2(&self) -> Cc2R { + Cc2R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 16 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull0(&self) -> ICFWLFULL0_R { - ICFWLFULL0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfwlfull0(&self) -> Icfwlfull0R { + Icfwlfull0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull1(&self) -> ICFWLFULL1_R { - ICFWLFULL1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfwlfull1(&self) -> Icfwlfull1R { + Icfwlfull1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull2(&self) -> ICFWLFULL2_R { - ICFWLFULL2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfwlfull2(&self) -> Icfwlfull2R { + Icfwlfull2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof0(&self) -> ICFOF0_R { - ICFOF0_R::new(((self.bits >> 20) & 1) != 0) + pub fn icfof0(&self) -> Icfof0R { + Icfof0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof1(&self) -> ICFOF1_R { - ICFOF1_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfof1(&self) -> Icfof1R { + Icfof1R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof2(&self) -> ICFOF2_R { - ICFOF2_R::new(((self.bits >> 22) & 1) != 0) + pub fn icfof2(&self) -> Icfof2R { + Icfof2R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 24 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf0(&self) -> ICFUF0_R { - ICFUF0_R::new(((self.bits >> 24) & 1) != 0) + pub fn icfuf0(&self) -> Icfuf0R { + Icfuf0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf1(&self) -> ICFUF1_R { - ICFUF1_R::new(((self.bits >> 25) & 1) != 0) + pub fn icfuf1(&self) -> Icfuf1R { + Icfuf1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf2(&self) -> ICFUF2_R { - ICFUF2_R::new(((self.bits >> 26) & 1) != 0) + pub fn icfuf2(&self) -> Icfuf2R { + Icfuf2R::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<0> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 0) } #[doc = "Bit 1 - Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<1> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 1) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] #[must_use] - pub fn dirchg(&mut self) -> DIRCHG_W<2> { - DIRCHG_W::new(self) + pub fn dirchg(&mut self) -> DirchgW { + DirchgW::new(self, 2) } #[doc = "Bit 4 - Capture Compare Channel 0 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc0(&mut self) -> CC0_W<4> { - CC0_W::new(self) + pub fn cc0(&mut self) -> Cc0W { + Cc0W::new(self, 4) } #[doc = "Bit 5 - Capture Compare Channel 1 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc1(&mut self) -> CC1_W<5> { - CC1_W::new(self) + pub fn cc1(&mut self) -> Cc1W { + Cc1W::new(self, 5) } #[doc = "Bit 6 - Capture Compare Channel 2 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc2(&mut self) -> CC2_W<6> { - CC2_W::new(self) + pub fn cc2(&mut self) -> Cc2W { + Cc2W::new(self, 6) } #[doc = "Bit 16 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull0(&mut self) -> ICFWLFULL0_W<16> { - ICFWLFULL0_W::new(self) + pub fn icfwlfull0(&mut self) -> Icfwlfull0W { + Icfwlfull0W::new(self, 16) } #[doc = "Bit 17 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull1(&mut self) -> ICFWLFULL1_W<17> { - ICFWLFULL1_W::new(self) + pub fn icfwlfull1(&mut self) -> Icfwlfull1W { + Icfwlfull1W::new(self, 17) } #[doc = "Bit 18 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull2(&mut self) -> ICFWLFULL2_W<18> { - ICFWLFULL2_W::new(self) + pub fn icfwlfull2(&mut self) -> Icfwlfull2W { + Icfwlfull2W::new(self, 18) } #[doc = "Bit 20 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof0(&mut self) -> ICFOF0_W<20> { - ICFOF0_W::new(self) + pub fn icfof0(&mut self) -> Icfof0W { + Icfof0W::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof1(&mut self) -> ICFOF1_W<21> { - ICFOF1_W::new(self) + pub fn icfof1(&mut self) -> Icfof1W { + Icfof1W::new(self, 21) } #[doc = "Bit 22 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof2(&mut self) -> ICFOF2_W<22> { - ICFOF2_W::new(self) + pub fn icfof2(&mut self) -> Icfof2W { + Icfof2W::new(self, 22) } #[doc = "Bit 24 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf0(&mut self) -> ICFUF0_W<24> { - ICFUF0_W::new(self) + pub fn icfuf0(&mut self) -> Icfuf0W { + Icfuf0W::new(self, 24) } #[doc = "Bit 25 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf1(&mut self) -> ICFUF1_W<25> { - ICFUF1_W::new(self) + pub fn icfuf1(&mut self) -> Icfuf1W { + Icfuf1W::new(self, 25) } #[doc = "Bit 26 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf2(&mut self) -> ICFUF2_W<26> { - ICFUF2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfuf2(&mut self) -> Icfuf2W { + Icfuf2W::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/ipversion.rs index fd8f758..0b161f8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/lock.rs index 4d444ca..4d6d1fe 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Timer Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "52864: Write to unlock TIMER registers"] - UNLOCK = 52864, + Unlock = 52864, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Timer Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unlock TIMER registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Timer Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/status.rs index 1a2964d..25d646e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/status.rs @@ -1,339 +1,324 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RUNNING` reader - Running"] -pub type RUNNING_R = crate::BitReader; -#[doc = "Field `DIR` reader - Direction"] -pub type DIR_R = crate::BitReader; +pub type RunningR = crate::BitReader; #[doc = "Direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DIR_A { +pub enum Dir { #[doc = "0: Counting up"] - UP = 0, + Up = 0, #[doc = "1: Counting down"] - DOWN = 1, + Down = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DIR_A) -> Self { + fn from(variant: Dir) -> Self { variant as u8 != 0 } } -impl DIR_R { +#[doc = "Field `DIR` reader - Direction"] +pub type DirR = crate::BitReader; +impl DirR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DIR_A { + pub const fn variant(&self) -> Dir { match self.bits { - false => DIR_A::UP, - true => DIR_A::DOWN, + false => Dir::Up, + true => Dir::Down, } } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Counting up"] #[inline(always)] pub fn is_up(&self) -> bool { - *self == DIR_A::UP + *self == Dir::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Counting down"] #[inline(always)] pub fn is_down(&self) -> bool { - *self == DIR_A::DOWN + *self == Dir::Down } } #[doc = "Field `TOPBV` reader - TOP Buffer Valid"] -pub type TOPBV_R = crate::BitReader; -#[doc = "Field `TIMERLOCKSTATUS` reader - Timer lock status"] -pub type TIMERLOCKSTATUS_R = crate::BitReader; +pub type TopbvR = crate::BitReader; #[doc = "Timer lock status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TIMERLOCKSTATUS_A { +pub enum Timerlockstatus { #[doc = "0: TIMER registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: TIMER registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TIMERLOCKSTATUS_A) -> Self { + fn from(variant: Timerlockstatus) -> Self { variant as u8 != 0 } } -impl TIMERLOCKSTATUS_R { +#[doc = "Field `TIMERLOCKSTATUS` reader - Timer lock status"] +pub type TimerlockstatusR = crate::BitReader; +impl TimerlockstatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TIMERLOCKSTATUS_A { + pub const fn variant(&self) -> Timerlockstatus { match self.bits { - false => TIMERLOCKSTATUS_A::UNLOCKED, - true => TIMERLOCKSTATUS_A::LOCKED, + false => Timerlockstatus::Unlocked, + true => Timerlockstatus::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "TIMER registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == TIMERLOCKSTATUS_A::UNLOCKED + *self == Timerlockstatus::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "TIMER registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == TIMERLOCKSTATUS_A::LOCKED + *self == Timerlockstatus::Locked } } -#[doc = "Field `DTILOCKSTATUS` reader - DTI lock status"] -pub type DTILOCKSTATUS_R = crate::BitReader; #[doc = "DTI lock status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DTILOCKSTATUS_A { +pub enum Dtilockstatus { #[doc = "0: DTI registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: DTI registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DTILOCKSTATUS_A) -> Self { + fn from(variant: Dtilockstatus) -> Self { variant as u8 != 0 } } -impl DTILOCKSTATUS_R { +#[doc = "Field `DTILOCKSTATUS` reader - DTI lock status"] +pub type DtilockstatusR = crate::BitReader; +impl DtilockstatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTILOCKSTATUS_A { + pub const fn variant(&self) -> Dtilockstatus { match self.bits { - false => DTILOCKSTATUS_A::UNLOCKED, - true => DTILOCKSTATUS_A::LOCKED, + false => Dtilockstatus::Unlocked, + true => Dtilockstatus::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "DTI registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == DTILOCKSTATUS_A::UNLOCKED + *self == Dtilockstatus::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "DTI registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == DTILOCKSTATUS_A::LOCKED + *self == Dtilockstatus::Locked } } #[doc = "Field `SYNCBUSY` reader - Sync Busy"] -pub type SYNCBUSY_R = crate::BitReader; +pub type SyncbusyR = crate::BitReader; #[doc = "Field `OCBV0` reader - Output Compare Buffer Valid"] -pub type OCBV0_R = crate::BitReader; +pub type Ocbv0R = crate::BitReader; #[doc = "Field `OCBV1` reader - Output Compare Buffer Valid"] -pub type OCBV1_R = crate::BitReader; +pub type Ocbv1R = crate::BitReader; #[doc = "Field `OCBV2` reader - Output Compare Buffer Valid"] -pub type OCBV2_R = crate::BitReader; +pub type Ocbv2R = crate::BitReader; #[doc = "Field `ICFEMPTY0` reader - Input capture fifo empty"] -pub type ICFEMPTY0_R = crate::BitReader; +pub type Icfempty0R = crate::BitReader; #[doc = "Field `ICFEMPTY1` reader - Input capture fifo empty"] -pub type ICFEMPTY1_R = crate::BitReader; +pub type Icfempty1R = crate::BitReader; #[doc = "Field `ICFEMPTY2` reader - Input capture fifo empty"] -pub type ICFEMPTY2_R = crate::BitReader; -#[doc = "Field `CCPOL0` reader - Compare/Capture Polarity"] -pub type CCPOL0_R = crate::BitReader; +pub type Icfempty2R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL0_A { +pub enum Ccpol0 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL0_A) -> Self { + fn from(variant: Ccpol0) -> Self { variant as u8 != 0 } } -impl CCPOL0_R { +#[doc = "Field `CCPOL0` reader - Compare/Capture Polarity"] +pub type Ccpol0R = crate::BitReader; +impl Ccpol0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL0_A { + pub const fn variant(&self) -> Ccpol0 { match self.bits { - false => CCPOL0_A::LOWRISE, - true => CCPOL0_A::HIGHFALL, + false => Ccpol0::Lowrise, + true => Ccpol0::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL0_A::LOWRISE + *self == Ccpol0::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL0_A::HIGHFALL + *self == Ccpol0::Highfall } } -#[doc = "Field `CCPOL1` reader - Compare/Capture Polarity"] -pub type CCPOL1_R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL1_A { +pub enum Ccpol1 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL1_A) -> Self { + fn from(variant: Ccpol1) -> Self { variant as u8 != 0 } } -impl CCPOL1_R { +#[doc = "Field `CCPOL1` reader - Compare/Capture Polarity"] +pub type Ccpol1R = crate::BitReader; +impl Ccpol1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL1_A { + pub const fn variant(&self) -> Ccpol1 { match self.bits { - false => CCPOL1_A::LOWRISE, - true => CCPOL1_A::HIGHFALL, + false => Ccpol1::Lowrise, + true => Ccpol1::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL1_A::LOWRISE + *self == Ccpol1::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL1_A::HIGHFALL + *self == Ccpol1::Highfall } } -#[doc = "Field `CCPOL2` reader - Compare/Capture Polarity"] -pub type CCPOL2_R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL2_A { +pub enum Ccpol2 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL2_A) -> Self { + fn from(variant: Ccpol2) -> Self { variant as u8 != 0 } } -impl CCPOL2_R { +#[doc = "Field `CCPOL2` reader - Compare/Capture Polarity"] +pub type Ccpol2R = crate::BitReader; +impl Ccpol2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL2_A { + pub const fn variant(&self) -> Ccpol2 { match self.bits { - false => CCPOL2_A::LOWRISE, - true => CCPOL2_A::HIGHFALL, + false => Ccpol2::Lowrise, + true => Ccpol2::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL2_A::LOWRISE + *self == Ccpol2::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL2_A::HIGHFALL + *self == Ccpol2::Highfall } } impl R { #[doc = "Bit 0 - Running"] #[inline(always)] - pub fn running(&self) -> RUNNING_R { - RUNNING_R::new((self.bits & 1) != 0) + pub fn running(&self) -> RunningR { + RunningR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Direction"] #[inline(always)] - pub fn dir(&self) -> DIR_R { - DIR_R::new(((self.bits >> 1) & 1) != 0) + pub fn dir(&self) -> DirR { + DirR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - TOP Buffer Valid"] #[inline(always)] - pub fn topbv(&self) -> TOPBV_R { - TOPBV_R::new(((self.bits >> 2) & 1) != 0) + pub fn topbv(&self) -> TopbvR { + TopbvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Timer lock status"] #[inline(always)] - pub fn timerlockstatus(&self) -> TIMERLOCKSTATUS_R { - TIMERLOCKSTATUS_R::new(((self.bits >> 4) & 1) != 0) + pub fn timerlockstatus(&self) -> TimerlockstatusR { + TimerlockstatusR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DTI lock status"] #[inline(always)] - pub fn dtilockstatus(&self) -> DTILOCKSTATUS_R { - DTILOCKSTATUS_R::new(((self.bits >> 5) & 1) != 0) + pub fn dtilockstatus(&self) -> DtilockstatusR { + DtilockstatusR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Sync Busy"] #[inline(always)] - pub fn syncbusy(&self) -> SYNCBUSY_R { - SYNCBUSY_R::new(((self.bits >> 6) & 1) != 0) + pub fn syncbusy(&self) -> SyncbusyR { + SyncbusyR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv0(&self) -> OCBV0_R { - OCBV0_R::new(((self.bits >> 8) & 1) != 0) + pub fn ocbv0(&self) -> Ocbv0R { + Ocbv0R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv1(&self) -> OCBV1_R { - OCBV1_R::new(((self.bits >> 9) & 1) != 0) + pub fn ocbv1(&self) -> Ocbv1R { + Ocbv1R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv2(&self) -> OCBV2_R { - OCBV2_R::new(((self.bits >> 10) & 1) != 0) + pub fn ocbv2(&self) -> Ocbv2R { + Ocbv2R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 16 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty0(&self) -> ICFEMPTY0_R { - ICFEMPTY0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfempty0(&self) -> Icfempty0R { + Icfempty0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty1(&self) -> ICFEMPTY1_R { - ICFEMPTY1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfempty1(&self) -> Icfempty1R { + Icfempty1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty2(&self) -> ICFEMPTY2_R { - ICFEMPTY2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfempty2(&self) -> Icfempty2R { + Icfempty2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 24 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol0(&self) -> CCPOL0_R { - CCPOL0_R::new(((self.bits >> 24) & 1) != 0) + pub fn ccpol0(&self) -> Ccpol0R { + Ccpol0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol1(&self) -> CCPOL1_R { - CCPOL1_R::new(((self.bits >> 25) & 1) != 0) + pub fn ccpol1(&self) -> Ccpol1R { + Ccpol1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol2(&self) -> CCPOL2_R { - CCPOL2_R::new(((self.bits >> 26) & 1) != 0) + pub fn ccpol2(&self) -> Ccpol2R { + Ccpol2R::new(((self.bits >> 26) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/top.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/top.rs index 65df306..6799f48 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/top.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/top.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOP` reader - Counter Top Value"] -pub type TOP_R = crate::FieldReader; +pub type TopR = crate::FieldReader; #[doc = "Field `TOP` writer - Counter Top Value"] -pub type TOP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOP_SPEC, u16, u16, 16, O>; +pub type TopW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Top Value"] #[inline(always)] - pub fn top(&self) -> TOP_R { - TOP_R::new((self.bits & 0xffff) as u16) + pub fn top(&self) -> TopR { + TopR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Top Value"] #[inline(always)] #[must_use] - pub fn top(&mut self) -> TOP_W<0> { - TOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn top(&mut self) -> TopW { + TopW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [top](index.html) module"] -pub struct TOP_SPEC; -impl crate::RegisterSpec for TOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopSpec; +impl crate::RegisterSpec for TopSpec { type Ux = u32; } -#[doc = "`read()` method returns [top::R](R) reader structure"] -impl crate::Readable for TOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [top::W](W) writer structure"] -impl crate::Writable for TOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`top::R`](R) reader structure"] +impl crate::Readable for TopSpec {} +#[doc = "`write(|w| ..)` method takes [`top::W`](W) writer structure"] +impl crate::Writable for TopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOP to value 0xffff"] -impl crate::Resettable for TOP_SPEC { - const RESET_VALUE: Self::Ux = 0xffff; +impl crate::Resettable for TopSpec { + const RESET_VALUE: u32 = 0xffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/topb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/topb.rs index 012fd04..e6c7e8c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/topb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_ns/topb.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOPB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOPB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOPB` reader - Counter Top Buffer Register"] -pub type TOPB_R = crate::FieldReader; +pub type TopbR = crate::FieldReader; #[doc = "Field `TOPB` writer - Counter Top Buffer Register"] -pub type TOPB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOPB_SPEC, u16, u16, 16, O>; +pub type TopbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Top Buffer Register"] #[inline(always)] - pub fn topb(&self) -> TOPB_R { - TOPB_R::new((self.bits & 0xffff) as u16) + pub fn topb(&self) -> TopbR { + TopbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Top Buffer Register"] #[inline(always)] #[must_use] - pub fn topb(&mut self) -> TOPB_W<0> { - TOPB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn topb(&mut self) -> TopbW { + TopbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [topb](index.html) module"] -pub struct TOPB_SPEC; -impl crate::RegisterSpec for TOPB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopbSpec; +impl crate::RegisterSpec for TopbSpec { type Ux = u32; } -#[doc = "`read()` method returns [topb::R](R) reader structure"] -impl crate::Readable for TOPB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [topb::W](W) writer structure"] -impl crate::Writable for TOPB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`topb::R`](R) reader structure"] +impl crate::Readable for TopbSpec {} +#[doc = "`write(|w| ..)` method takes [`topb::W`](W) writer structure"] +impl crate::Writable for TopbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOPB to value 0"] -impl crate::Resettable for TOPB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TopbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s.rs index 50b1dd4..e4e8a9b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s.rs @@ -1,240 +1,470 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + cfg: Cfg, + ctrl: Ctrl, + cmd: Cmd, + status: Status, + if_: If, + ien: Ien, + top: Top, + topb: Topb, + cnt: Cnt, + _reserved10: [u8; 0x04], + lock: Lock, + en: En, + _reserved12: [u8; 0x2c], + cc0_cfg: Cc0Cfg, + cc0_ctrl: Cc0Ctrl, + cc0_oc: Cc0Oc, + _reserved15: [u8; 0x04], + cc0_ocb: Cc0Ocb, + cc0_icf: Cc0Icf, + cc0_icof: Cc0Icof, + _reserved18: [u8; 0x04], + cc1_cfg: Cc1Cfg, + cc1_ctrl: Cc1Ctrl, + cc1_oc: Cc1Oc, + _reserved21: [u8; 0x04], + cc1_ocb: Cc1Ocb, + cc1_icf: Cc1Icf, + cc1_icof: Cc1Icof, + _reserved24: [u8; 0x04], + cc2_cfg: Cc2Cfg, + cc2_ctrl: Cc2Ctrl, + cc2_oc: Cc2Oc, + _reserved27: [u8; 0x04], + cc2_ocb: Cc2Ocb, + cc2_icf: Cc2Icf, + cc2_icof: Cc2Icof, + _reserved30: [u8; 0x24], + dtcfg: Dtcfg, + dttimecfg: Dttimecfg, + dtfcfg: Dtfcfg, + dtctrl: Dtctrl, + dtogen: Dtogen, + dtfault: Dtfault, + dtfaultc: Dtfaultc, + dtlock: Dtlock, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x08 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x0c - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x10 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x14 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x18 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x1c - No Description"] - pub top: TOP, + #[inline(always)] + pub const fn top(&self) -> &Top { + &self.top + } #[doc = "0x20 - No Description"] - pub topb: TOPB, + #[inline(always)] + pub const fn topb(&self) -> &Topb { + &self.topb + } #[doc = "0x24 - No Description"] - pub cnt: CNT, - _reserved10: [u8; 0x04], + #[inline(always)] + pub const fn cnt(&self) -> &Cnt { + &self.cnt + } #[doc = "0x2c - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x30 - No Description"] - pub en: EN, - _reserved12: [u8; 0x2c], + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x60 - No Description"] - pub cc0_cfg: CC0_CFG, + #[inline(always)] + pub const fn cc0_cfg(&self) -> &Cc0Cfg { + &self.cc0_cfg + } #[doc = "0x64 - No Description"] - pub cc0_ctrl: CC0_CTRL, + #[inline(always)] + pub const fn cc0_ctrl(&self) -> &Cc0Ctrl { + &self.cc0_ctrl + } #[doc = "0x68 - No Description"] - pub cc0_oc: CC0_OC, - _reserved15: [u8; 0x04], + #[inline(always)] + pub const fn cc0_oc(&self) -> &Cc0Oc { + &self.cc0_oc + } #[doc = "0x70 - No Description"] - pub cc0_ocb: CC0_OCB, + #[inline(always)] + pub const fn cc0_ocb(&self) -> &Cc0Ocb { + &self.cc0_ocb + } #[doc = "0x74 - No Description"] - pub cc0_icf: CC0_ICF, + #[inline(always)] + pub const fn cc0_icf(&self) -> &Cc0Icf { + &self.cc0_icf + } #[doc = "0x78 - No Description"] - pub cc0_icof: CC0_ICOF, - _reserved18: [u8; 0x04], + #[inline(always)] + pub const fn cc0_icof(&self) -> &Cc0Icof { + &self.cc0_icof + } #[doc = "0x80 - No Description"] - pub cc1_cfg: CC1_CFG, + #[inline(always)] + pub const fn cc1_cfg(&self) -> &Cc1Cfg { + &self.cc1_cfg + } #[doc = "0x84 - No Description"] - pub cc1_ctrl: CC1_CTRL, + #[inline(always)] + pub const fn cc1_ctrl(&self) -> &Cc1Ctrl { + &self.cc1_ctrl + } #[doc = "0x88 - No Description"] - pub cc1_oc: CC1_OC, - _reserved21: [u8; 0x04], + #[inline(always)] + pub const fn cc1_oc(&self) -> &Cc1Oc { + &self.cc1_oc + } #[doc = "0x90 - No Description"] - pub cc1_ocb: CC1_OCB, + #[inline(always)] + pub const fn cc1_ocb(&self) -> &Cc1Ocb { + &self.cc1_ocb + } #[doc = "0x94 - No Description"] - pub cc1_icf: CC1_ICF, + #[inline(always)] + pub const fn cc1_icf(&self) -> &Cc1Icf { + &self.cc1_icf + } #[doc = "0x98 - No Description"] - pub cc1_icof: CC1_ICOF, - _reserved24: [u8; 0x04], + #[inline(always)] + pub const fn cc1_icof(&self) -> &Cc1Icof { + &self.cc1_icof + } #[doc = "0xa0 - No Description"] - pub cc2_cfg: CC2_CFG, + #[inline(always)] + pub const fn cc2_cfg(&self) -> &Cc2Cfg { + &self.cc2_cfg + } #[doc = "0xa4 - No Description"] - pub cc2_ctrl: CC2_CTRL, + #[inline(always)] + pub const fn cc2_ctrl(&self) -> &Cc2Ctrl { + &self.cc2_ctrl + } #[doc = "0xa8 - No Description"] - pub cc2_oc: CC2_OC, - _reserved27: [u8; 0x04], + #[inline(always)] + pub const fn cc2_oc(&self) -> &Cc2Oc { + &self.cc2_oc + } #[doc = "0xb0 - No Description"] - pub cc2_ocb: CC2_OCB, + #[inline(always)] + pub const fn cc2_ocb(&self) -> &Cc2Ocb { + &self.cc2_ocb + } #[doc = "0xb4 - No Description"] - pub cc2_icf: CC2_ICF, + #[inline(always)] + pub const fn cc2_icf(&self) -> &Cc2Icf { + &self.cc2_icf + } #[doc = "0xb8 - No Description"] - pub cc2_icof: CC2_ICOF, - _reserved30: [u8; 0x24], + #[inline(always)] + pub const fn cc2_icof(&self) -> &Cc2Icof { + &self.cc2_icof + } #[doc = "0xe0 - No Description"] - pub dtcfg: DTCFG, + #[inline(always)] + pub const fn dtcfg(&self) -> &Dtcfg { + &self.dtcfg + } #[doc = "0xe4 - No Description"] - pub dttimecfg: DTTIMECFG, + #[inline(always)] + pub const fn dttimecfg(&self) -> &Dttimecfg { + &self.dttimecfg + } #[doc = "0xe8 - No Description"] - pub dtfcfg: DTFCFG, + #[inline(always)] + pub const fn dtfcfg(&self) -> &Dtfcfg { + &self.dtfcfg + } #[doc = "0xec - No Description"] - pub dtctrl: DTCTRL, + #[inline(always)] + pub const fn dtctrl(&self) -> &Dtctrl { + &self.dtctrl + } #[doc = "0xf0 - No Description"] - pub dtogen: DTOGEN, + #[inline(always)] + pub const fn dtogen(&self) -> &Dtogen { + &self.dtogen + } #[doc = "0xf4 - No Description"] - pub dtfault: DTFAULT, + #[inline(always)] + pub const fn dtfault(&self) -> &Dtfault { + &self.dtfault + } #[doc = "0xf8 - No Description"] - pub dtfaultc: DTFAULTC, + #[inline(always)] + pub const fn dtfaultc(&self) -> &Dtfaultc { + &self.dtfaultc + } #[doc = "0xfc - No Description"] - pub dtlock: DTLOCK, + #[inline(always)] + pub const fn dtlock(&self) -> &Dtlock { + &self.dtlock + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "TOP (rw) register accessor: an alias for `Reg`"] -pub type TOP = crate::Reg; +#[doc = "TOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@top`] +module"] +#[doc(alias = "TOP")] +pub type Top = crate::Reg; #[doc = "No Description"] pub mod top; -#[doc = "TOPB (rw) register accessor: an alias for `Reg`"] -pub type TOPB = crate::Reg; +#[doc = "TOPB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@topb`] +module"] +#[doc(alias = "TOPB")] +pub type Topb = crate::Reg; #[doc = "No Description"] pub mod topb; -#[doc = "CNT (rw) register accessor: an alias for `Reg`"] -pub type CNT = crate::Reg; +#[doc = "CNT (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnt`] +module"] +#[doc(alias = "CNT")] +pub type Cnt = crate::Reg; #[doc = "No Description"] pub mod cnt; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CC0_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC0_CFG = crate::Reg; +#[doc = "CC0_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_cfg`] +module"] +#[doc(alias = "CC0_CFG")] +pub type Cc0Cfg = crate::Reg; #[doc = "No Description"] pub mod cc0_cfg; -#[doc = "CC0_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC0_CTRL = crate::Reg; +#[doc = "CC0_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_ctrl`] +module"] +#[doc(alias = "CC0_CTRL")] +pub type Cc0Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc0_ctrl; -#[doc = "CC0_OC (rw) register accessor: an alias for `Reg`"] -pub type CC0_OC = crate::Reg; +#[doc = "CC0_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_oc`] +module"] +#[doc(alias = "CC0_OC")] +pub type Cc0Oc = crate::Reg; #[doc = "No Description"] pub mod cc0_oc; -#[doc = "CC0_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC0_OCB = crate::Reg; +#[doc = "CC0_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_ocb`] +module"] +#[doc(alias = "CC0_OCB")] +pub type Cc0Ocb = crate::Reg; #[doc = "No Description"] pub mod cc0_ocb; -#[doc = "CC0_ICF (r) register accessor: an alias for `Reg`"] -pub type CC0_ICF = crate::Reg; +#[doc = "CC0_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_icf`] +module"] +#[doc(alias = "CC0_ICF")] +pub type Cc0Icf = crate::Reg; #[doc = "No Description"] pub mod cc0_icf; -#[doc = "CC0_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC0_ICOF = crate::Reg; +#[doc = "CC0_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_icof`] +module"] +#[doc(alias = "CC0_ICOF")] +pub type Cc0Icof = crate::Reg; #[doc = "No Description"] pub mod cc0_icof; -#[doc = "CC1_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC1_CFG = crate::Reg; +#[doc = "CC1_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_cfg`] +module"] +#[doc(alias = "CC1_CFG")] +pub type Cc1Cfg = crate::Reg; #[doc = "No Description"] pub mod cc1_cfg; -#[doc = "CC1_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC1_CTRL = crate::Reg; +#[doc = "CC1_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_ctrl`] +module"] +#[doc(alias = "CC1_CTRL")] +pub type Cc1Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc1_ctrl; -#[doc = "CC1_OC (rw) register accessor: an alias for `Reg`"] -pub type CC1_OC = crate::Reg; +#[doc = "CC1_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_oc`] +module"] +#[doc(alias = "CC1_OC")] +pub type Cc1Oc = crate::Reg; #[doc = "No Description"] pub mod cc1_oc; -#[doc = "CC1_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC1_OCB = crate::Reg; +#[doc = "CC1_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_ocb`] +module"] +#[doc(alias = "CC1_OCB")] +pub type Cc1Ocb = crate::Reg; #[doc = "No Description"] pub mod cc1_ocb; -#[doc = "CC1_ICF (r) register accessor: an alias for `Reg`"] -pub type CC1_ICF = crate::Reg; +#[doc = "CC1_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_icf`] +module"] +#[doc(alias = "CC1_ICF")] +pub type Cc1Icf = crate::Reg; #[doc = "No Description"] pub mod cc1_icf; -#[doc = "CC1_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC1_ICOF = crate::Reg; +#[doc = "CC1_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_icof`] +module"] +#[doc(alias = "CC1_ICOF")] +pub type Cc1Icof = crate::Reg; #[doc = "No Description"] pub mod cc1_icof; -#[doc = "CC2_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC2_CFG = crate::Reg; +#[doc = "CC2_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_cfg`] +module"] +#[doc(alias = "CC2_CFG")] +pub type Cc2Cfg = crate::Reg; #[doc = "No Description"] pub mod cc2_cfg; -#[doc = "CC2_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC2_CTRL = crate::Reg; +#[doc = "CC2_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_ctrl`] +module"] +#[doc(alias = "CC2_CTRL")] +pub type Cc2Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc2_ctrl; -#[doc = "CC2_OC (rw) register accessor: an alias for `Reg`"] -pub type CC2_OC = crate::Reg; +#[doc = "CC2_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_oc`] +module"] +#[doc(alias = "CC2_OC")] +pub type Cc2Oc = crate::Reg; #[doc = "No Description"] pub mod cc2_oc; -#[doc = "CC2_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC2_OCB = crate::Reg; +#[doc = "CC2_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_ocb`] +module"] +#[doc(alias = "CC2_OCB")] +pub type Cc2Ocb = crate::Reg; #[doc = "No Description"] pub mod cc2_ocb; -#[doc = "CC2_ICF (r) register accessor: an alias for `Reg`"] -pub type CC2_ICF = crate::Reg; +#[doc = "CC2_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_icf`] +module"] +#[doc(alias = "CC2_ICF")] +pub type Cc2Icf = crate::Reg; #[doc = "No Description"] pub mod cc2_icf; -#[doc = "CC2_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC2_ICOF = crate::Reg; +#[doc = "CC2_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_icof`] +module"] +#[doc(alias = "CC2_ICOF")] +pub type Cc2Icof = crate::Reg; #[doc = "No Description"] pub mod cc2_icof; -#[doc = "DTCFG (rw) register accessor: an alias for `Reg`"] -pub type DTCFG = crate::Reg; +#[doc = "DTCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtcfg`] +module"] +#[doc(alias = "DTCFG")] +pub type Dtcfg = crate::Reg; #[doc = "No Description"] pub mod dtcfg; -#[doc = "DTTIMECFG (rw) register accessor: an alias for `Reg`"] -pub type DTTIMECFG = crate::Reg; +#[doc = "DTTIMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dttimecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dttimecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dttimecfg`] +module"] +#[doc(alias = "DTTIMECFG")] +pub type Dttimecfg = crate::Reg; #[doc = "No Description"] pub mod dttimecfg; -#[doc = "DTFCFG (rw) register accessor: an alias for `Reg`"] -pub type DTFCFG = crate::Reg; +#[doc = "DTFCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfcfg`] +module"] +#[doc(alias = "DTFCFG")] +pub type Dtfcfg = crate::Reg; #[doc = "No Description"] pub mod dtfcfg; -#[doc = "DTCTRL (rw) register accessor: an alias for `Reg`"] -pub type DTCTRL = crate::Reg; +#[doc = "DTCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtctrl`] +module"] +#[doc(alias = "DTCTRL")] +pub type Dtctrl = crate::Reg; #[doc = "No Description"] pub mod dtctrl; -#[doc = "DTOGEN (rw) register accessor: an alias for `Reg`"] -pub type DTOGEN = crate::Reg; +#[doc = "DTOGEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtogen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtogen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtogen`] +module"] +#[doc(alias = "DTOGEN")] +pub type Dtogen = crate::Reg; #[doc = "No Description"] pub mod dtogen; -#[doc = "DTFAULT (r) register accessor: an alias for `Reg`"] -pub type DTFAULT = crate::Reg; +#[doc = "DTFAULT (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfault::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfault`] +module"] +#[doc(alias = "DTFAULT")] +pub type Dtfault = crate::Reg; #[doc = "No Description"] pub mod dtfault; -#[doc = "DTFAULTC (w) register accessor: an alias for `Reg`"] -pub type DTFAULTC = crate::Reg; +#[doc = "DTFAULTC (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfaultc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfaultc`] +module"] +#[doc(alias = "DTFAULTC")] +pub type Dtfaultc = crate::Reg; #[doc = "No Description"] pub mod dtfaultc; -#[doc = "DTLOCK (w) register accessor: an alias for `Reg`"] -pub type DTLOCK = crate::Reg; +#[doc = "DTLOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtlock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtlock`] +module"] +#[doc(alias = "DTLOCK")] +pub type Dtlock = crate::Reg; #[doc = "No Description"] pub mod dtlock; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc0_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc0_cfg.rs index 547eeb0..b3aac62 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc0_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc0_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC0_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC0_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_cfg](index.html) module"] -pub struct CC0_CFG_SPEC; -impl crate::RegisterSpec for CC0_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0CfgSpec; +impl crate::RegisterSpec for Cc0CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_cfg::R](R) reader structure"] -impl crate::Readable for CC0_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_cfg::W](W) writer structure"] -impl crate::Writable for CC0_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_cfg::R`](R) reader structure"] +impl crate::Readable for Cc0CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_cfg::W`](W) writer structure"] +impl crate::Writable for Cc0CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_CFG to value 0"] -impl crate::Resettable for CC0_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc0_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc0_ctrl.rs index 71b40e4..1b92d0c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc0_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc0_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC0_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_ctrl](index.html) module"] -pub struct CC0_CTRL_SPEC; -impl crate::RegisterSpec for CC0_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0CtrlSpec; +impl crate::RegisterSpec for Cc0CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_ctrl::R](R) reader structure"] -impl crate::Readable for CC0_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_ctrl::W](W) writer structure"] -impl crate::Writable for CC0_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc0CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc0CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_CTRL to value 0"] -impl crate::Resettable for CC0_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc0_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc0_icf.rs index f4a2c64..6afddea 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc0_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc0_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC0_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new((self.bits & 0xffff) as u16) + pub fn icf(&self) -> IcfR { + IcfR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_icf](index.html) module"] -pub struct CC0_ICF_SPEC; -impl crate::RegisterSpec for CC0_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0IcfSpec; +impl crate::RegisterSpec for Cc0IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_icf::R](R) reader structure"] -impl crate::Readable for CC0_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc0_icf::R`](R) reader structure"] +impl crate::Readable for Cc0IcfSpec {} #[doc = "`reset()` method sets CC0_ICF to value 0"] -impl crate::Resettable for CC0_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc0_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc0_icof.rs index 1ea3983..7653eef 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc0_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc0_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC0_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new((self.bits & 0xffff) as u16) + pub fn icof(&self) -> IcofR { + IcofR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_icof](index.html) module"] -pub struct CC0_ICOF_SPEC; -impl crate::RegisterSpec for CC0_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0IcofSpec; +impl crate::RegisterSpec for Cc0IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_icof::R](R) reader structure"] -impl crate::Readable for CC0_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc0_icof::R`](R) reader structure"] +impl crate::Readable for Cc0IcofSpec {} #[doc = "`reset()` method sets CC0_ICOF to value 0"] -impl crate::Resettable for CC0_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc0_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc0_oc.rs index 97be8b2..c063d52 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc0_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc0_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC0_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC0_OC_SPEC, u16, u16, 16, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new((self.bits & 0xffff) as u16) + pub fn oc(&self) -> OcR { + OcR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_oc](index.html) module"] -pub struct CC0_OC_SPEC; -impl crate::RegisterSpec for CC0_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0OcSpec; +impl crate::RegisterSpec for Cc0OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_oc::R](R) reader structure"] -impl crate::Readable for CC0_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_oc::W](W) writer structure"] -impl crate::Writable for CC0_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_oc::R`](R) reader structure"] +impl crate::Readable for Cc0OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_oc::W`](W) writer structure"] +impl crate::Writable for Cc0OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_OC to value 0"] -impl crate::Resettable for CC0_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc0_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc0_ocb.rs index af4e401..5924ded 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc0_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc0_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC0_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC0_OCB_SPEC, u16, u16, 16, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new((self.bits & 0xffff) as u16) + pub fn ocb(&self) -> OcbR { + OcbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_ocb](index.html) module"] -pub struct CC0_OCB_SPEC; -impl crate::RegisterSpec for CC0_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0OcbSpec; +impl crate::RegisterSpec for Cc0OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_ocb::R](R) reader structure"] -impl crate::Readable for CC0_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_ocb::W](W) writer structure"] -impl crate::Writable for CC0_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_ocb::R`](R) reader structure"] +impl crate::Readable for Cc0OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_ocb::W`](W) writer structure"] +impl crate::Writable for Cc0OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_OCB to value 0"] -impl crate::Resettable for CC0_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc1_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc1_cfg.rs index b3424c2..2243932 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc1_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc1_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC1_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC1_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_cfg](index.html) module"] -pub struct CC1_CFG_SPEC; -impl crate::RegisterSpec for CC1_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1CfgSpec; +impl crate::RegisterSpec for Cc1CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_cfg::R](R) reader structure"] -impl crate::Readable for CC1_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_cfg::W](W) writer structure"] -impl crate::Writable for CC1_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_cfg::R`](R) reader structure"] +impl crate::Readable for Cc1CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_cfg::W`](W) writer structure"] +impl crate::Writable for Cc1CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_CFG to value 0"] -impl crate::Resettable for CC1_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc1_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc1_ctrl.rs index 38927de..bc41282 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc1_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc1_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC1_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_ctrl](index.html) module"] -pub struct CC1_CTRL_SPEC; -impl crate::RegisterSpec for CC1_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1CtrlSpec; +impl crate::RegisterSpec for Cc1CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_ctrl::R](R) reader structure"] -impl crate::Readable for CC1_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_ctrl::W](W) writer structure"] -impl crate::Writable for CC1_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc1CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc1CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_CTRL to value 0"] -impl crate::Resettable for CC1_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc1_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc1_icf.rs index 1a7d7e8..0211b78 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc1_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc1_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC1_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new((self.bits & 0xffff) as u16) + pub fn icf(&self) -> IcfR { + IcfR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_icf](index.html) module"] -pub struct CC1_ICF_SPEC; -impl crate::RegisterSpec for CC1_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1IcfSpec; +impl crate::RegisterSpec for Cc1IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_icf::R](R) reader structure"] -impl crate::Readable for CC1_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc1_icf::R`](R) reader structure"] +impl crate::Readable for Cc1IcfSpec {} #[doc = "`reset()` method sets CC1_ICF to value 0"] -impl crate::Resettable for CC1_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc1_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc1_icof.rs index ea46e53..3fd845d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc1_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc1_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC1_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new((self.bits & 0xffff) as u16) + pub fn icof(&self) -> IcofR { + IcofR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_icof](index.html) module"] -pub struct CC1_ICOF_SPEC; -impl crate::RegisterSpec for CC1_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1IcofSpec; +impl crate::RegisterSpec for Cc1IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_icof::R](R) reader structure"] -impl crate::Readable for CC1_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc1_icof::R`](R) reader structure"] +impl crate::Readable for Cc1IcofSpec {} #[doc = "`reset()` method sets CC1_ICOF to value 0"] -impl crate::Resettable for CC1_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc1_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc1_oc.rs index 9f40c62..5b2e10b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc1_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc1_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC1_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC1_OC_SPEC, u16, u16, 16, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new((self.bits & 0xffff) as u16) + pub fn oc(&self) -> OcR { + OcR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_oc](index.html) module"] -pub struct CC1_OC_SPEC; -impl crate::RegisterSpec for CC1_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1OcSpec; +impl crate::RegisterSpec for Cc1OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_oc::R](R) reader structure"] -impl crate::Readable for CC1_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_oc::W](W) writer structure"] -impl crate::Writable for CC1_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_oc::R`](R) reader structure"] +impl crate::Readable for Cc1OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_oc::W`](W) writer structure"] +impl crate::Writable for Cc1OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_OC to value 0"] -impl crate::Resettable for CC1_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc1_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc1_ocb.rs index d3c8d9a..7d9f88b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc1_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc1_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC1_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC1_OCB_SPEC, u16, u16, 16, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new((self.bits & 0xffff) as u16) + pub fn ocb(&self) -> OcbR { + OcbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_ocb](index.html) module"] -pub struct CC1_OCB_SPEC; -impl crate::RegisterSpec for CC1_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1OcbSpec; +impl crate::RegisterSpec for Cc1OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_ocb::R](R) reader structure"] -impl crate::Readable for CC1_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_ocb::W](W) writer structure"] -impl crate::Writable for CC1_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_ocb::R`](R) reader structure"] +impl crate::Readable for Cc1OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_ocb::W`](W) writer structure"] +impl crate::Writable for Cc1OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_OCB to value 0"] -impl crate::Resettable for CC1_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc2_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc2_cfg.rs index 6b108e5..97bec45 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc2_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc2_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC2_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC2_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_cfg](index.html) module"] -pub struct CC2_CFG_SPEC; -impl crate::RegisterSpec for CC2_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2CfgSpec; +impl crate::RegisterSpec for Cc2CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_cfg::R](R) reader structure"] -impl crate::Readable for CC2_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_cfg::W](W) writer structure"] -impl crate::Writable for CC2_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_cfg::R`](R) reader structure"] +impl crate::Readable for Cc2CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_cfg::W`](W) writer structure"] +impl crate::Writable for Cc2CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_CFG to value 0"] -impl crate::Resettable for CC2_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc2_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc2_ctrl.rs index b42d120..317952a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc2_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc2_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC2_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_ctrl](index.html) module"] -pub struct CC2_CTRL_SPEC; -impl crate::RegisterSpec for CC2_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2CtrlSpec; +impl crate::RegisterSpec for Cc2CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_ctrl::R](R) reader structure"] -impl crate::Readable for CC2_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_ctrl::W](W) writer structure"] -impl crate::Writable for CC2_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc2CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc2CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_CTRL to value 0"] -impl crate::Resettable for CC2_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc2_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc2_icf.rs index 8282700..c1a0823 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc2_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc2_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC2_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new((self.bits & 0xffff) as u16) + pub fn icf(&self) -> IcfR { + IcfR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_icf](index.html) module"] -pub struct CC2_ICF_SPEC; -impl crate::RegisterSpec for CC2_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2IcfSpec; +impl crate::RegisterSpec for Cc2IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_icf::R](R) reader structure"] -impl crate::Readable for CC2_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc2_icf::R`](R) reader structure"] +impl crate::Readable for Cc2IcfSpec {} #[doc = "`reset()` method sets CC2_ICF to value 0"] -impl crate::Resettable for CC2_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc2_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc2_icof.rs index c21d7d3..0d399d1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc2_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc2_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC2_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new((self.bits & 0xffff) as u16) + pub fn icof(&self) -> IcofR { + IcofR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_icof](index.html) module"] -pub struct CC2_ICOF_SPEC; -impl crate::RegisterSpec for CC2_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2IcofSpec; +impl crate::RegisterSpec for Cc2IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_icof::R](R) reader structure"] -impl crate::Readable for CC2_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc2_icof::R`](R) reader structure"] +impl crate::Readable for Cc2IcofSpec {} #[doc = "`reset()` method sets CC2_ICOF to value 0"] -impl crate::Resettable for CC2_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc2_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc2_oc.rs index da9cc47..935617c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc2_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc2_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC2_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC2_OC_SPEC, u16, u16, 16, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new((self.bits & 0xffff) as u16) + pub fn oc(&self) -> OcR { + OcR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_oc](index.html) module"] -pub struct CC2_OC_SPEC; -impl crate::RegisterSpec for CC2_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2OcSpec; +impl crate::RegisterSpec for Cc2OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_oc::R](R) reader structure"] -impl crate::Readable for CC2_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_oc::W](W) writer structure"] -impl crate::Writable for CC2_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_oc::R`](R) reader structure"] +impl crate::Readable for Cc2OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_oc::W`](W) writer structure"] +impl crate::Writable for Cc2OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_OC to value 0"] -impl crate::Resettable for CC2_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc2_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc2_ocb.rs index 1ab93d6..ee6c4e5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc2_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cc2_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC2_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC2_OCB_SPEC, u16, u16, 16, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new((self.bits & 0xffff) as u16) + pub fn ocb(&self) -> OcbR { + OcbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_ocb](index.html) module"] -pub struct CC2_OCB_SPEC; -impl crate::RegisterSpec for CC2_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2OcbSpec; +impl crate::RegisterSpec for Cc2OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_ocb::R](R) reader structure"] -impl crate::Readable for CC2_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_ocb::W](W) writer structure"] -impl crate::Writable for CC2_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_ocb::R`](R) reader structure"] +impl crate::Readable for Cc2OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_ocb::W`](W) writer structure"] +impl crate::Writable for Cc2OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_OCB to value 0"] -impl crate::Resettable for CC2_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cfg.rs index ea2a1e1..b4cc2fd 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cfg.rs @@ -1,775 +1,774 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - Timer Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Timer Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Up-count mode"] - UP = 0, + Up = 0, #[doc = "1: Down-count mode"] - DOWN = 1, + Down = 1, #[doc = "2: Up/down-count mode"] - UPDOWN = 2, + Updown = 2, #[doc = "3: Quadrature decoder mode"] - QDEC = 3, + Qdec = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - Timer Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::UP, - 1 => MODE_A::DOWN, - 2 => MODE_A::UPDOWN, - 3 => MODE_A::QDEC, + 0 => Mode::Up, + 1 => Mode::Down, + 2 => Mode::Updown, + 3 => Mode::Qdec, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Up-count mode"] #[inline(always)] pub fn is_up(&self) -> bool { - *self == MODE_A::UP + *self == Mode::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Down-count mode"] #[inline(always)] pub fn is_down(&self) -> bool { - *self == MODE_A::DOWN + *self == Mode::Down } - #[doc = "Checks if the value of the field is `UPDOWN`"] + #[doc = "Up/down-count mode"] #[inline(always)] pub fn is_updown(&self) -> bool { - *self == MODE_A::UPDOWN + *self == Mode::Updown } - #[doc = "Checks if the value of the field is `QDEC`"] + #[doc = "Quadrature decoder mode"] #[inline(always)] pub fn is_qdec(&self) -> bool { - *self == MODE_A::QDEC + *self == Mode::Qdec } } #[doc = "Field `MODE` writer - Timer Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Up-count mode"] #[inline(always)] - pub fn up(self) -> &'a mut W { - self.variant(MODE_A::UP) + pub fn up(self) -> &'a mut crate::W { + self.variant(Mode::Up) } #[doc = "Down-count mode"] #[inline(always)] - pub fn down(self) -> &'a mut W { - self.variant(MODE_A::DOWN) + pub fn down(self) -> &'a mut crate::W { + self.variant(Mode::Down) } #[doc = "Up/down-count mode"] #[inline(always)] - pub fn updown(self) -> &'a mut W { - self.variant(MODE_A::UPDOWN) + pub fn updown(self) -> &'a mut crate::W { + self.variant(Mode::Updown) } #[doc = "Quadrature decoder mode"] #[inline(always)] - pub fn qdec(self) -> &'a mut W { - self.variant(MODE_A::QDEC) + pub fn qdec(self) -> &'a mut crate::W { + self.variant(Mode::Qdec) } } -#[doc = "Field `SYNC` reader - Timer Start/Stop/Reload Synchronization"] -pub type SYNC_R = crate::BitReader; #[doc = "Timer Start/Stop/Reload Synchronization\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYNC_A { +pub enum Sync { #[doc = "0: Timer operation is unaffected by other timers."] - DISABLE = 0, + Disable = 0, #[doc = "1: Timer may be started, stopped and re-loaded from other timer instances."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYNC_A) -> Self { + fn from(variant: Sync) -> Self { variant as u8 != 0 } } -impl SYNC_R { +#[doc = "Field `SYNC` reader - Timer Start/Stop/Reload Synchronization"] +pub type SyncR = crate::BitReader; +impl SyncR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SYNC_A { + pub const fn variant(&self) -> Sync { match self.bits { - false => SYNC_A::DISABLE, - true => SYNC_A::ENABLE, + false => Sync::Disable, + true => Sync::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Timer operation is unaffected by other timers."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == SYNC_A::DISABLE + *self == Sync::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Timer may be started, stopped and re-loaded from other timer instances."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == SYNC_A::ENABLE + *self == Sync::Enable } } #[doc = "Field `SYNC` writer - Timer Start/Stop/Reload Synchronization"] -pub type SYNC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, SYNC_A, O>; -impl<'a, const O: u8> SYNC_W<'a, O> { +pub type SyncW<'a, REG> = crate::BitWriter<'a, REG, Sync>; +impl<'a, REG> SyncW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer operation is unaffected by other timers."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(SYNC_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Sync::Disable) } #[doc = "Timer may be started, stopped and re-loaded from other timer instances."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(SYNC_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Sync::Enable) } } #[doc = "Field `OSMEN` reader - One-shot Mode Enable"] -pub type OSMEN_R = crate::BitReader; +pub type OsmenR = crate::BitReader; #[doc = "Field `OSMEN` writer - One-shot Mode Enable"] -pub type OSMEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `QDM` reader - Quadrature Decoder Mode Selection"] -pub type QDM_R = crate::BitReader; +pub type OsmenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Quadrature Decoder Mode Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum QDM_A { +pub enum Qdm { #[doc = "0: X2 mode selected"] X2 = 0, #[doc = "1: X4 mode selected"] X4 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: QDM_A) -> Self { + fn from(variant: Qdm) -> Self { variant as u8 != 0 } } -impl QDM_R { +#[doc = "Field `QDM` reader - Quadrature Decoder Mode Selection"] +pub type QdmR = crate::BitReader; +impl QdmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> QDM_A { + pub const fn variant(&self) -> Qdm { match self.bits { - false => QDM_A::X2, - true => QDM_A::X4, + false => Qdm::X2, + true => Qdm::X4, } } - #[doc = "Checks if the value of the field is `X2`"] + #[doc = "X2 mode selected"] #[inline(always)] pub fn is_x2(&self) -> bool { - *self == QDM_A::X2 + *self == Qdm::X2 } - #[doc = "Checks if the value of the field is `X4`"] + #[doc = "X4 mode selected"] #[inline(always)] pub fn is_x4(&self) -> bool { - *self == QDM_A::X4 + *self == Qdm::X4 } } #[doc = "Field `QDM` writer - Quadrature Decoder Mode Selection"] -pub type QDM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, QDM_A, O>; -impl<'a, const O: u8> QDM_W<'a, O> { +pub type QdmW<'a, REG> = crate::BitWriter<'a, REG, Qdm>; +impl<'a, REG> QdmW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "X2 mode selected"] #[inline(always)] - pub fn x2(self) -> &'a mut W { - self.variant(QDM_A::X2) + pub fn x2(self) -> &'a mut crate::W { + self.variant(Qdm::X2) } #[doc = "X4 mode selected"] #[inline(always)] - pub fn x4(self) -> &'a mut W { - self.variant(QDM_A::X4) + pub fn x4(self) -> &'a mut crate::W { + self.variant(Qdm::X4) } } -#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] -pub type DEBUGRUN_R = crate::BitReader; #[doc = "Debug Mode Run Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DEBUGRUN_A { +pub enum Debugrun { #[doc = "0: Timer is halted in debug mode"] - HALT = 0, + Halt = 0, #[doc = "1: Timer is running in debug mode"] - RUN = 1, + Run = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DEBUGRUN_A) -> Self { + fn from(variant: Debugrun) -> Self { variant as u8 != 0 } } -impl DEBUGRUN_R { +#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] +pub type DebugrunR = crate::BitReader; +impl DebugrunR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DEBUGRUN_A { + pub const fn variant(&self) -> Debugrun { match self.bits { - false => DEBUGRUN_A::HALT, - true => DEBUGRUN_A::RUN, + false => Debugrun::Halt, + true => Debugrun::Run, } } - #[doc = "Checks if the value of the field is `HALT`"] + #[doc = "Timer is halted in debug mode"] #[inline(always)] pub fn is_halt(&self) -> bool { - *self == DEBUGRUN_A::HALT + *self == Debugrun::Halt } - #[doc = "Checks if the value of the field is `RUN`"] + #[doc = "Timer is running in debug mode"] #[inline(always)] pub fn is_run(&self) -> bool { - *self == DEBUGRUN_A::RUN + *self == Debugrun::Run } } #[doc = "Field `DEBUGRUN` writer - Debug Mode Run Enable"] -pub type DEBUGRUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DEBUGRUN_A, O>; -impl<'a, const O: u8> DEBUGRUN_W<'a, O> { +pub type DebugrunW<'a, REG> = crate::BitWriter<'a, REG, Debugrun>; +impl<'a, REG> DebugrunW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer is halted in debug mode"] #[inline(always)] - pub fn halt(self) -> &'a mut W { - self.variant(DEBUGRUN_A::HALT) + pub fn halt(self) -> &'a mut crate::W { + self.variant(Debugrun::Halt) } #[doc = "Timer is running in debug mode"] #[inline(always)] - pub fn run(self) -> &'a mut W { - self.variant(DEBUGRUN_A::RUN) + pub fn run(self) -> &'a mut crate::W { + self.variant(Debugrun::Run) } } #[doc = "Field `DMACLRACT` reader - DMA Request Clear on Active"] -pub type DMACLRACT_R = crate::BitReader; +pub type DmaclractR = crate::BitReader; #[doc = "Field `DMACLRACT` writer - DMA Request Clear on Active"] -pub type DMACLRACT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `CLKSEL` reader - Clock Source Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type DmaclractW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Clock Source Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "0: Prescaled EM01GRPACLK"] - PRESCEM01GRPACLK = 0, + Prescem01grpaclk = 0, #[doc = "1: Compare/Capture Channel 1 Input"] - CC1 = 1, + Cc1 = 1, #[doc = "2: Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] - TIMEROUF = 2, + Timerouf = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Source Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKSEL_A::PRESCEM01GRPACLK), - 1 => Some(CLKSEL_A::CC1), - 2 => Some(CLKSEL_A::TIMEROUF), + 0 => Some(Clksel::Prescem01grpaclk), + 1 => Some(Clksel::Cc1), + 2 => Some(Clksel::Timerouf), _ => None, } } - #[doc = "Checks if the value of the field is `PRESCEM01GRPACLK`"] + #[doc = "Prescaled EM01GRPACLK"] #[inline(always)] pub fn is_prescem01grpaclk(&self) -> bool { - *self == CLKSEL_A::PRESCEM01GRPACLK + *self == Clksel::Prescem01grpaclk } - #[doc = "Checks if the value of the field is `CC1`"] + #[doc = "Compare/Capture Channel 1 Input"] #[inline(always)] pub fn is_cc1(&self) -> bool { - *self == CLKSEL_A::CC1 + *self == Clksel::Cc1 } - #[doc = "Checks if the value of the field is `TIMEROUF`"] + #[doc = "Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] #[inline(always)] pub fn is_timerouf(&self) -> bool { - *self == CLKSEL_A::TIMEROUF + *self == Clksel::Timerouf } } #[doc = "Field `CLKSEL` writer - Clock Source Select"] -pub type CLKSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, CLKSEL_A, 2, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Prescaled EM01GRPACLK"] #[inline(always)] - pub fn prescem01grpaclk(self) -> &'a mut W { - self.variant(CLKSEL_A::PRESCEM01GRPACLK) + pub fn prescem01grpaclk(self) -> &'a mut crate::W { + self.variant(Clksel::Prescem01grpaclk) } #[doc = "Compare/Capture Channel 1 Input"] #[inline(always)] - pub fn cc1(self) -> &'a mut W { - self.variant(CLKSEL_A::CC1) + pub fn cc1(self) -> &'a mut crate::W { + self.variant(Clksel::Cc1) } #[doc = "Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] #[inline(always)] - pub fn timerouf(self) -> &'a mut W { - self.variant(CLKSEL_A::TIMEROUF) + pub fn timerouf(self) -> &'a mut crate::W { + self.variant(Clksel::Timerouf) } } -#[doc = "Field `RETIMEEN` reader - PWM output retimed enable"] -pub type RETIMEEN_R = crate::BitReader; #[doc = "PWM output retimed enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RETIMEEN_A { +pub enum Retimeen { #[doc = "0: PWM outputs are not re-timed."] - DISABLE = 0, + Disable = 0, #[doc = "1: PWM outputs are re-timed."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RETIMEEN_A) -> Self { + fn from(variant: Retimeen) -> Self { variant as u8 != 0 } } -impl RETIMEEN_R { +#[doc = "Field `RETIMEEN` reader - PWM output retimed enable"] +pub type RetimeenR = crate::BitReader; +impl RetimeenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RETIMEEN_A { + pub const fn variant(&self) -> Retimeen { match self.bits { - false => RETIMEEN_A::DISABLE, - true => RETIMEEN_A::ENABLE, + false => Retimeen::Disable, + true => Retimeen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "PWM outputs are not re-timed."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RETIMEEN_A::DISABLE + *self == Retimeen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "PWM outputs are re-timed."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RETIMEEN_A::ENABLE + *self == Retimeen::Enable } } #[doc = "Field `RETIMEEN` writer - PWM output retimed enable"] -pub type RETIMEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, RETIMEEN_A, O>; -impl<'a, const O: u8> RETIMEEN_W<'a, O> { +pub type RetimeenW<'a, REG> = crate::BitWriter<'a, REG, Retimeen>; +impl<'a, REG> RetimeenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "PWM outputs are not re-timed."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RETIMEEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Retimeen::Disable) } #[doc = "PWM outputs are re-timed."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RETIMEEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Retimeen::Enable) } } -#[doc = "Field `DISSYNCOUT` reader - Disable Timer Start/Stop/Reload output"] -pub type DISSYNCOUT_R = crate::BitReader; #[doc = "Disable Timer Start/Stop/Reload output\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DISSYNCOUT_A { +pub enum Dissyncout { #[doc = "0: Timer can start/stop/reload other timers with SYNC bit set"] - EN = 0, + En = 0, #[doc = "1: Timer cannot start/stop/reload other timers with SYNC bit set"] - DIS = 1, + Dis = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DISSYNCOUT_A) -> Self { + fn from(variant: Dissyncout) -> Self { variant as u8 != 0 } } -impl DISSYNCOUT_R { +#[doc = "Field `DISSYNCOUT` reader - Disable Timer Start/Stop/Reload output"] +pub type DissyncoutR = crate::BitReader; +impl DissyncoutR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DISSYNCOUT_A { + pub const fn variant(&self) -> Dissyncout { match self.bits { - false => DISSYNCOUT_A::EN, - true => DISSYNCOUT_A::DIS, + false => Dissyncout::En, + true => Dissyncout::Dis, } } - #[doc = "Checks if the value of the field is `EN`"] + #[doc = "Timer can start/stop/reload other timers with SYNC bit set"] #[inline(always)] pub fn is_en(&self) -> bool { - *self == DISSYNCOUT_A::EN + *self == Dissyncout::En } - #[doc = "Checks if the value of the field is `DIS`"] + #[doc = "Timer cannot start/stop/reload other timers with SYNC bit set"] #[inline(always)] pub fn is_dis(&self) -> bool { - *self == DISSYNCOUT_A::DIS + *self == Dissyncout::Dis } } #[doc = "Field `DISSYNCOUT` writer - Disable Timer Start/Stop/Reload output"] -pub type DISSYNCOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DISSYNCOUT_A, O>; -impl<'a, const O: u8> DISSYNCOUT_W<'a, O> { +pub type DissyncoutW<'a, REG> = crate::BitWriter<'a, REG, Dissyncout>; +impl<'a, REG> DissyncoutW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer can start/stop/reload other timers with SYNC bit set"] #[inline(always)] - pub fn en(self) -> &'a mut W { - self.variant(DISSYNCOUT_A::EN) + pub fn en(self) -> &'a mut crate::W { + self.variant(Dissyncout::En) } #[doc = "Timer cannot start/stop/reload other timers with SYNC bit set"] #[inline(always)] - pub fn dis(self) -> &'a mut W { - self.variant(DISSYNCOUT_A::DIS) + pub fn dis(self) -> &'a mut crate::W { + self.variant(Dissyncout::Dis) } } #[doc = "Field `ATI` reader - Always Track Inputs"] -pub type ATI_R = crate::BitReader; +pub type AtiR = crate::BitReader; #[doc = "Field `ATI` writer - Always Track Inputs"] -pub type ATI_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type AtiW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RSSCOIST` reader - Reload-Start Sets COIST"] -pub type RSSCOIST_R = crate::BitReader; +pub type RsscoistR = crate::BitReader; #[doc = "Field `RSSCOIST` writer - Reload-Start Sets COIST"] -pub type RSSCOIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `PRESC` reader - Prescaler Setting"] -pub type PRESC_R = crate::FieldReader; +pub type RsscoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Prescaler Setting\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum PRESC_A { +pub enum Presc { #[doc = "0: No prescaling"] - DIV1 = 0, + Div1 = 0, #[doc = "1: Prescale by 2"] - DIV2 = 1, + Div2 = 1, #[doc = "3: Prescale by 4"] - DIV4 = 3, + Div4 = 3, #[doc = "7: Prescale by 8"] - DIV8 = 7, + Div8 = 7, #[doc = "15: Prescale by 16"] - DIV16 = 15, + Div16 = 15, #[doc = "31: Prescale by 32"] - DIV32 = 31, + Div32 = 31, #[doc = "63: Prescale by 64"] - DIV64 = 63, + Div64 = 63, #[doc = "127: Prescale by 128"] - DIV128 = 127, + Div128 = 127, #[doc = "255: Prescale by 256"] - DIV256 = 255, + Div256 = 255, #[doc = "511: Prescale by 512"] - DIV512 = 511, + Div512 = 511, #[doc = "1023: Prescale by 1024"] - DIV1024 = 1023, + Div1024 = 1023, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: PRESC_A) -> Self { + fn from(variant: Presc) -> Self { variant as _ } } -impl PRESC_R { +impl crate::FieldSpec for Presc { + type Ux = u16; +} +impl crate::IsEnum for Presc {} +#[doc = "Field `PRESC` reader - Prescaler Setting"] +pub type PrescR = crate::FieldReader; +impl PrescR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PRESC_A::DIV1), - 1 => Some(PRESC_A::DIV2), - 3 => Some(PRESC_A::DIV4), - 7 => Some(PRESC_A::DIV8), - 15 => Some(PRESC_A::DIV16), - 31 => Some(PRESC_A::DIV32), - 63 => Some(PRESC_A::DIV64), - 127 => Some(PRESC_A::DIV128), - 255 => Some(PRESC_A::DIV256), - 511 => Some(PRESC_A::DIV512), - 1023 => Some(PRESC_A::DIV1024), + 0 => Some(Presc::Div1), + 1 => Some(Presc::Div2), + 3 => Some(Presc::Div4), + 7 => Some(Presc::Div8), + 15 => Some(Presc::Div16), + 31 => Some(Presc::Div32), + 63 => Some(Presc::Div64), + 127 => Some(Presc::Div128), + 255 => Some(Presc::Div256), + 511 => Some(Presc::Div512), + 1023 => Some(Presc::Div1024), _ => None, } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "No prescaling"] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == PRESC_A::DIV1 + *self == Presc::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "Prescale by 2"] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == PRESC_A::DIV2 + *self == Presc::Div2 } - #[doc = "Checks if the value of the field is `DIV4`"] + #[doc = "Prescale by 4"] #[inline(always)] pub fn is_div4(&self) -> bool { - *self == PRESC_A::DIV4 + *self == Presc::Div4 } - #[doc = "Checks if the value of the field is `DIV8`"] + #[doc = "Prescale by 8"] #[inline(always)] pub fn is_div8(&self) -> bool { - *self == PRESC_A::DIV8 + *self == Presc::Div8 } - #[doc = "Checks if the value of the field is `DIV16`"] + #[doc = "Prescale by 16"] #[inline(always)] pub fn is_div16(&self) -> bool { - *self == PRESC_A::DIV16 + *self == Presc::Div16 } - #[doc = "Checks if the value of the field is `DIV32`"] + #[doc = "Prescale by 32"] #[inline(always)] pub fn is_div32(&self) -> bool { - *self == PRESC_A::DIV32 + *self == Presc::Div32 } - #[doc = "Checks if the value of the field is `DIV64`"] + #[doc = "Prescale by 64"] #[inline(always)] pub fn is_div64(&self) -> bool { - *self == PRESC_A::DIV64 + *self == Presc::Div64 } - #[doc = "Checks if the value of the field is `DIV128`"] + #[doc = "Prescale by 128"] #[inline(always)] pub fn is_div128(&self) -> bool { - *self == PRESC_A::DIV128 + *self == Presc::Div128 } - #[doc = "Checks if the value of the field is `DIV256`"] + #[doc = "Prescale by 256"] #[inline(always)] pub fn is_div256(&self) -> bool { - *self == PRESC_A::DIV256 + *self == Presc::Div256 } - #[doc = "Checks if the value of the field is `DIV512`"] + #[doc = "Prescale by 512"] #[inline(always)] pub fn is_div512(&self) -> bool { - *self == PRESC_A::DIV512 + *self == Presc::Div512 } - #[doc = "Checks if the value of the field is `DIV1024`"] + #[doc = "Prescale by 1024"] #[inline(always)] pub fn is_div1024(&self) -> bool { - *self == PRESC_A::DIV1024 + *self == Presc::Div1024 } } #[doc = "Field `PRESC` writer - Prescaler Setting"] -pub type PRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u16, PRESC_A, 10, O>; -impl<'a, const O: u8> PRESC_W<'a, O> { +pub type PrescW<'a, REG> = crate::FieldWriter<'a, REG, 10, Presc>; +impl<'a, REG> PrescW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No prescaling"] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(PRESC_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Presc::Div1) } #[doc = "Prescale by 2"] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(PRESC_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Presc::Div2) } #[doc = "Prescale by 4"] #[inline(always)] - pub fn div4(self) -> &'a mut W { - self.variant(PRESC_A::DIV4) + pub fn div4(self) -> &'a mut crate::W { + self.variant(Presc::Div4) } #[doc = "Prescale by 8"] #[inline(always)] - pub fn div8(self) -> &'a mut W { - self.variant(PRESC_A::DIV8) + pub fn div8(self) -> &'a mut crate::W { + self.variant(Presc::Div8) } #[doc = "Prescale by 16"] #[inline(always)] - pub fn div16(self) -> &'a mut W { - self.variant(PRESC_A::DIV16) + pub fn div16(self) -> &'a mut crate::W { + self.variant(Presc::Div16) } #[doc = "Prescale by 32"] #[inline(always)] - pub fn div32(self) -> &'a mut W { - self.variant(PRESC_A::DIV32) + pub fn div32(self) -> &'a mut crate::W { + self.variant(Presc::Div32) } #[doc = "Prescale by 64"] #[inline(always)] - pub fn div64(self) -> &'a mut W { - self.variant(PRESC_A::DIV64) + pub fn div64(self) -> &'a mut crate::W { + self.variant(Presc::Div64) } #[doc = "Prescale by 128"] #[inline(always)] - pub fn div128(self) -> &'a mut W { - self.variant(PRESC_A::DIV128) + pub fn div128(self) -> &'a mut crate::W { + self.variant(Presc::Div128) } #[doc = "Prescale by 256"] #[inline(always)] - pub fn div256(self) -> &'a mut W { - self.variant(PRESC_A::DIV256) + pub fn div256(self) -> &'a mut crate::W { + self.variant(Presc::Div256) } #[doc = "Prescale by 512"] #[inline(always)] - pub fn div512(self) -> &'a mut W { - self.variant(PRESC_A::DIV512) + pub fn div512(self) -> &'a mut crate::W { + self.variant(Presc::Div512) } #[doc = "Prescale by 1024"] #[inline(always)] - pub fn div1024(self) -> &'a mut W { - self.variant(PRESC_A::DIV1024) + pub fn div1024(self) -> &'a mut crate::W { + self.variant(Presc::Div1024) } } impl R { #[doc = "Bits 0:1 - Timer Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Timer Start/Stop/Reload Synchronization"] #[inline(always)] - pub fn sync(&self) -> SYNC_R { - SYNC_R::new(((self.bits >> 3) & 1) != 0) + pub fn sync(&self) -> SyncR { + SyncR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - One-shot Mode Enable"] #[inline(always)] - pub fn osmen(&self) -> OSMEN_R { - OSMEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn osmen(&self) -> OsmenR { + OsmenR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Quadrature Decoder Mode Selection"] #[inline(always)] - pub fn qdm(&self) -> QDM_R { - QDM_R::new(((self.bits >> 5) & 1) != 0) + pub fn qdm(&self) -> QdmR { + QdmR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Debug Mode Run Enable"] #[inline(always)] - pub fn debugrun(&self) -> DEBUGRUN_R { - DEBUGRUN_R::new(((self.bits >> 6) & 1) != 0) + pub fn debugrun(&self) -> DebugrunR { + DebugrunR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - DMA Request Clear on Active"] #[inline(always)] - pub fn dmaclract(&self) -> DMACLRACT_R { - DMACLRACT_R::new(((self.bits >> 7) & 1) != 0) + pub fn dmaclract(&self) -> DmaclractR { + DmaclractR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:9 - Clock Source Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 10 - PWM output retimed enable"] #[inline(always)] - pub fn retimeen(&self) -> RETIMEEN_R { - RETIMEEN_R::new(((self.bits >> 10) & 1) != 0) + pub fn retimeen(&self) -> RetimeenR { + RetimeenR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Disable Timer Start/Stop/Reload output"] #[inline(always)] - pub fn dissyncout(&self) -> DISSYNCOUT_R { - DISSYNCOUT_R::new(((self.bits >> 11) & 1) != 0) + pub fn dissyncout(&self) -> DissyncoutR { + DissyncoutR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 16 - Always Track Inputs"] #[inline(always)] - pub fn ati(&self) -> ATI_R { - ATI_R::new(((self.bits >> 16) & 1) != 0) + pub fn ati(&self) -> AtiR { + AtiR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Reload-Start Sets COIST"] #[inline(always)] - pub fn rsscoist(&self) -> RSSCOIST_R { - RSSCOIST_R::new(((self.bits >> 17) & 1) != 0) + pub fn rsscoist(&self) -> RsscoistR { + RsscoistR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:27 - Prescaler Setting"] #[inline(always)] - pub fn presc(&self) -> PRESC_R { - PRESC_R::new(((self.bits >> 18) & 0x03ff) as u16) + pub fn presc(&self) -> PrescR { + PrescR::new(((self.bits >> 18) & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:1 - Timer Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 3 - Timer Start/Stop/Reload Synchronization"] #[inline(always)] #[must_use] - pub fn sync(&mut self) -> SYNC_W<3> { - SYNC_W::new(self) + pub fn sync(&mut self) -> SyncW { + SyncW::new(self, 3) } #[doc = "Bit 4 - One-shot Mode Enable"] #[inline(always)] #[must_use] - pub fn osmen(&mut self) -> OSMEN_W<4> { - OSMEN_W::new(self) + pub fn osmen(&mut self) -> OsmenW { + OsmenW::new(self, 4) } #[doc = "Bit 5 - Quadrature Decoder Mode Selection"] #[inline(always)] #[must_use] - pub fn qdm(&mut self) -> QDM_W<5> { - QDM_W::new(self) + pub fn qdm(&mut self) -> QdmW { + QdmW::new(self, 5) } #[doc = "Bit 6 - Debug Mode Run Enable"] #[inline(always)] #[must_use] - pub fn debugrun(&mut self) -> DEBUGRUN_W<6> { - DEBUGRUN_W::new(self) + pub fn debugrun(&mut self) -> DebugrunW { + DebugrunW::new(self, 6) } #[doc = "Bit 7 - DMA Request Clear on Active"] #[inline(always)] #[must_use] - pub fn dmaclract(&mut self) -> DMACLRACT_W<7> { - DMACLRACT_W::new(self) + pub fn dmaclract(&mut self) -> DmaclractW { + DmaclractW::new(self, 7) } #[doc = "Bits 8:9 - Clock Source Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<8> { - CLKSEL_W::new(self) + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 8) } #[doc = "Bit 10 - PWM output retimed enable"] #[inline(always)] #[must_use] - pub fn retimeen(&mut self) -> RETIMEEN_W<10> { - RETIMEEN_W::new(self) + pub fn retimeen(&mut self) -> RetimeenW { + RetimeenW::new(self, 10) } #[doc = "Bit 11 - Disable Timer Start/Stop/Reload output"] #[inline(always)] #[must_use] - pub fn dissyncout(&mut self) -> DISSYNCOUT_W<11> { - DISSYNCOUT_W::new(self) + pub fn dissyncout(&mut self) -> DissyncoutW { + DissyncoutW::new(self, 11) } #[doc = "Bit 16 - Always Track Inputs"] #[inline(always)] #[must_use] - pub fn ati(&mut self) -> ATI_W<16> { - ATI_W::new(self) + pub fn ati(&mut self) -> AtiW { + AtiW::new(self, 16) } #[doc = "Bit 17 - Reload-Start Sets COIST"] #[inline(always)] #[must_use] - pub fn rsscoist(&mut self) -> RSSCOIST_W<17> { - RSSCOIST_W::new(self) + pub fn rsscoist(&mut self) -> RsscoistW { + RsscoistW::new(self, 17) } #[doc = "Bits 18:27 - Prescaler Setting"] #[inline(always)] #[must_use] - pub fn presc(&mut self) -> PRESC_W<18> { - PRESC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn presc(&mut self) -> PrescW { + PrescW::new(self, 18) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cmd.rs index ca6d3b1..bf41157 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cmd.rs @@ -1,60 +1,35 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` writer - Start Timer"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STOP` writer - Stop Timer"] -pub type STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StopW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Start Timer"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Stop Timer"] #[inline(always)] #[must_use] - pub fn stop(&mut self) -> STOP_W<1> { - STOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stop(&mut self) -> StopW { + StopW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cnt.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cnt.rs index dd37661..c870fc9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cnt.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/cnt.rs @@ -1,80 +1,40 @@ #[doc = "Register `CNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CNT` reader - Counter Value"] -pub type CNT_R = crate::FieldReader; +pub type CntR = crate::FieldReader; #[doc = "Field `CNT` writer - Counter Value"] -pub type CNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CNT_SPEC, u16, u16, 16, O>; +pub type CntW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Value"] #[inline(always)] - pub fn cnt(&self) -> CNT_R { - CNT_R::new((self.bits & 0xffff) as u16) + pub fn cnt(&self) -> CntR { + CntR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Value"] #[inline(always)] #[must_use] - pub fn cnt(&mut self) -> CNT_W<0> { - CNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cnt(&mut self) -> CntW { + CntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](index.html) module"] -pub struct CNT_SPEC; -impl crate::RegisterSpec for CNT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CntSpec; +impl crate::RegisterSpec for CntSpec { type Ux = u32; } -#[doc = "`read()` method returns [cnt::R](R) reader structure"] -impl crate::Readable for CNT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnt::W](W) writer structure"] -impl crate::Writable for CNT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cnt::R`](R) reader structure"] +impl crate::Readable for CntSpec {} +#[doc = "`write(|w| ..)` method takes [`cnt::W`](W) writer structure"] +impl crate::Writable for CntSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNT to value 0"] -impl crate::Resettable for CNT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CntSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/ctrl.rs index 08e646b..e2ed153 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/ctrl.rs @@ -1,258 +1,234 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `RISEA` reader - Timer Rising Input Edge Action"] -pub type RISEA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Timer Rising Input Edge Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RISEA_A { +pub enum Risea { #[doc = "0: No action"] - NONE = 0, + None = 0, #[doc = "1: Start counter without reload"] - START = 1, + Start = 1, #[doc = "2: Stop counter without reload"] - STOP = 2, + Stop = 2, #[doc = "3: Reload and start counter"] - RELOADSTART = 3, + Reloadstart = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RISEA_A) -> Self { + fn from(variant: Risea) -> Self { variant as _ } } -impl RISEA_R { +impl crate::FieldSpec for Risea { + type Ux = u8; +} +impl crate::IsEnum for Risea {} +#[doc = "Field `RISEA` reader - Timer Rising Input Edge Action"] +pub type RiseaR = crate::FieldReader; +impl RiseaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RISEA_A { + pub const fn variant(&self) -> Risea { match self.bits { - 0 => RISEA_A::NONE, - 1 => RISEA_A::START, - 2 => RISEA_A::STOP, - 3 => RISEA_A::RELOADSTART, + 0 => Risea::None, + 1 => Risea::Start, + 2 => Risea::Stop, + 3 => Risea::Reloadstart, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == RISEA_A::NONE + *self == Risea::None } - #[doc = "Checks if the value of the field is `START`"] + #[doc = "Start counter without reload"] #[inline(always)] pub fn is_start(&self) -> bool { - *self == RISEA_A::START + *self == Risea::Start } - #[doc = "Checks if the value of the field is `STOP`"] + #[doc = "Stop counter without reload"] #[inline(always)] pub fn is_stop(&self) -> bool { - *self == RISEA_A::STOP + *self == Risea::Stop } - #[doc = "Checks if the value of the field is `RELOADSTART`"] + #[doc = "Reload and start counter"] #[inline(always)] pub fn is_reloadstart(&self) -> bool { - *self == RISEA_A::RELOADSTART + *self == Risea::Reloadstart } } #[doc = "Field `RISEA` writer - Timer Rising Input Edge Action"] -pub type RISEA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, RISEA_A, 2, O>; -impl<'a, const O: u8> RISEA_W<'a, O> { +pub type RiseaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Risea, crate::Safe>; +impl<'a, REG> RiseaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(RISEA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Risea::None) } #[doc = "Start counter without reload"] #[inline(always)] - pub fn start(self) -> &'a mut W { - self.variant(RISEA_A::START) + pub fn start(self) -> &'a mut crate::W { + self.variant(Risea::Start) } #[doc = "Stop counter without reload"] #[inline(always)] - pub fn stop(self) -> &'a mut W { - self.variant(RISEA_A::STOP) + pub fn stop(self) -> &'a mut crate::W { + self.variant(Risea::Stop) } #[doc = "Reload and start counter"] #[inline(always)] - pub fn reloadstart(self) -> &'a mut W { - self.variant(RISEA_A::RELOADSTART) + pub fn reloadstart(self) -> &'a mut crate::W { + self.variant(Risea::Reloadstart) } } -#[doc = "Field `FALLA` reader - Timer Falling Input Edge Action"] -pub type FALLA_R = crate::FieldReader; #[doc = "Timer Falling Input Edge Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FALLA_A { +pub enum Falla { #[doc = "0: No action"] - NONE = 0, + None = 0, #[doc = "1: Start counter without reload"] - START = 1, + Start = 1, #[doc = "2: Stop counter without reload"] - STOP = 2, + Stop = 2, #[doc = "3: Reload and start counter"] - RELOADSTART = 3, + Reloadstart = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FALLA_A) -> Self { + fn from(variant: Falla) -> Self { variant as _ } } -impl FALLA_R { +impl crate::FieldSpec for Falla { + type Ux = u8; +} +impl crate::IsEnum for Falla {} +#[doc = "Field `FALLA` reader - Timer Falling Input Edge Action"] +pub type FallaR = crate::FieldReader; +impl FallaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FALLA_A { + pub const fn variant(&self) -> Falla { match self.bits { - 0 => FALLA_A::NONE, - 1 => FALLA_A::START, - 2 => FALLA_A::STOP, - 3 => FALLA_A::RELOADSTART, + 0 => Falla::None, + 1 => Falla::Start, + 2 => Falla::Stop, + 3 => Falla::Reloadstart, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == FALLA_A::NONE + *self == Falla::None } - #[doc = "Checks if the value of the field is `START`"] + #[doc = "Start counter without reload"] #[inline(always)] pub fn is_start(&self) -> bool { - *self == FALLA_A::START + *self == Falla::Start } - #[doc = "Checks if the value of the field is `STOP`"] + #[doc = "Stop counter without reload"] #[inline(always)] pub fn is_stop(&self) -> bool { - *self == FALLA_A::STOP + *self == Falla::Stop } - #[doc = "Checks if the value of the field is `RELOADSTART`"] + #[doc = "Reload and start counter"] #[inline(always)] pub fn is_reloadstart(&self) -> bool { - *self == FALLA_A::RELOADSTART + *self == Falla::Reloadstart } } #[doc = "Field `FALLA` writer - Timer Falling Input Edge Action"] -pub type FALLA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, FALLA_A, 2, O>; -impl<'a, const O: u8> FALLA_W<'a, O> { +pub type FallaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Falla, crate::Safe>; +impl<'a, REG> FallaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(FALLA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Falla::None) } #[doc = "Start counter without reload"] #[inline(always)] - pub fn start(self) -> &'a mut W { - self.variant(FALLA_A::START) + pub fn start(self) -> &'a mut crate::W { + self.variant(Falla::Start) } #[doc = "Stop counter without reload"] #[inline(always)] - pub fn stop(self) -> &'a mut W { - self.variant(FALLA_A::STOP) + pub fn stop(self) -> &'a mut crate::W { + self.variant(Falla::Stop) } #[doc = "Reload and start counter"] #[inline(always)] - pub fn reloadstart(self) -> &'a mut W { - self.variant(FALLA_A::RELOADSTART) + pub fn reloadstart(self) -> &'a mut crate::W { + self.variant(Falla::Reloadstart) } } #[doc = "Field `X2CNT` reader - 2x Count Mode"] -pub type X2CNT_R = crate::BitReader; +pub type X2cntR = crate::BitReader; #[doc = "Field `X2CNT` writer - 2x Count Mode"] -pub type X2CNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type X2cntW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - Timer Rising Input Edge Action"] #[inline(always)] - pub fn risea(&self) -> RISEA_R { - RISEA_R::new((self.bits & 3) as u8) + pub fn risea(&self) -> RiseaR { + RiseaR::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Timer Falling Input Edge Action"] #[inline(always)] - pub fn falla(&self) -> FALLA_R { - FALLA_R::new(((self.bits >> 2) & 3) as u8) + pub fn falla(&self) -> FallaR { + FallaR::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bit 4 - 2x Count Mode"] #[inline(always)] - pub fn x2cnt(&self) -> X2CNT_R { - X2CNT_R::new(((self.bits >> 4) & 1) != 0) + pub fn x2cnt(&self) -> X2cntR { + X2cntR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Timer Rising Input Edge Action"] #[inline(always)] #[must_use] - pub fn risea(&mut self) -> RISEA_W<0> { - RISEA_W::new(self) + pub fn risea(&mut self) -> RiseaW { + RiseaW::new(self, 0) } #[doc = "Bits 2:3 - Timer Falling Input Edge Action"] #[inline(always)] #[must_use] - pub fn falla(&mut self) -> FALLA_W<2> { - FALLA_W::new(self) + pub fn falla(&mut self) -> FallaW { + FallaW::new(self, 2) } #[doc = "Bit 4 - 2x Count Mode"] #[inline(always)] #[must_use] - pub fn x2cnt(&mut self) -> X2CNT_W<4> { - X2CNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn x2cnt(&mut self) -> X2cntW { + X2cntW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtcfg.rs index d19a9a3..82b97e1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtcfg.rs @@ -1,186 +1,149 @@ #[doc = "Register `DTCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTEN` reader - DTI Enable"] -pub type DTEN_R = crate::BitReader; +pub type DtenR = crate::BitReader; #[doc = "Field `DTEN` writer - DTI Enable"] -pub type DTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; -#[doc = "Field `DTDAS` reader - DTI Automatic Start-up Functionality"] -pub type DTDAS_R = crate::BitReader; +pub type DtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "DTI Automatic Start-up Functionality\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DTDAS_A { +pub enum Dtdas { #[doc = "0: No DTI restart on debugger exit"] - NORESTART = 0, + Norestart = 0, #[doc = "1: DTI restart on debugger exit"] - RESTART = 1, + Restart = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DTDAS_A) -> Self { + fn from(variant: Dtdas) -> Self { variant as u8 != 0 } } -impl DTDAS_R { +#[doc = "Field `DTDAS` reader - DTI Automatic Start-up Functionality"] +pub type DtdasR = crate::BitReader; +impl DtdasR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTDAS_A { + pub const fn variant(&self) -> Dtdas { match self.bits { - false => DTDAS_A::NORESTART, - true => DTDAS_A::RESTART, + false => Dtdas::Norestart, + true => Dtdas::Restart, } } - #[doc = "Checks if the value of the field is `NORESTART`"] + #[doc = "No DTI restart on debugger exit"] #[inline(always)] pub fn is_norestart(&self) -> bool { - *self == DTDAS_A::NORESTART + *self == Dtdas::Norestart } - #[doc = "Checks if the value of the field is `RESTART`"] + #[doc = "DTI restart on debugger exit"] #[inline(always)] pub fn is_restart(&self) -> bool { - *self == DTDAS_A::RESTART + *self == Dtdas::Restart } } #[doc = "Field `DTDAS` writer - DTI Automatic Start-up Functionality"] -pub type DTDAS_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, DTDAS_A, O>; -impl<'a, const O: u8> DTDAS_W<'a, O> { +pub type DtdasW<'a, REG> = crate::BitWriter<'a, REG, Dtdas>; +impl<'a, REG> DtdasW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No DTI restart on debugger exit"] #[inline(always)] - pub fn norestart(self) -> &'a mut W { - self.variant(DTDAS_A::NORESTART) + pub fn norestart(self) -> &'a mut crate::W { + self.variant(Dtdas::Norestart) } #[doc = "DTI restart on debugger exit"] #[inline(always)] - pub fn restart(self) -> &'a mut W { - self.variant(DTDAS_A::RESTART) + pub fn restart(self) -> &'a mut crate::W { + self.variant(Dtdas::Restart) } } #[doc = "Field `DTAR` reader - DTI Always Run"] -pub type DTAR_R = crate::BitReader; +pub type DtarR = crate::BitReader; #[doc = "Field `DTAR` writer - DTI Always Run"] -pub type DTAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtarW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTFATS` reader - DTI Fault Action on Timer Stop"] -pub type DTFATS_R = crate::BitReader; +pub type DtfatsR = crate::BitReader; #[doc = "Field `DTFATS` writer - DTI Fault Action on Timer Stop"] -pub type DTFATS_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtfatsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRSEN` reader - DTI PRS Source Enable"] -pub type DTPRSEN_R = crate::BitReader; +pub type DtprsenR = crate::BitReader; #[doc = "Field `DTPRSEN` writer - DTI PRS Source Enable"] -pub type DTPRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtprsenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI Enable"] #[inline(always)] - pub fn dten(&self) -> DTEN_R { - DTEN_R::new((self.bits & 1) != 0) + pub fn dten(&self) -> DtenR { + DtenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI Automatic Start-up Functionality"] #[inline(always)] - pub fn dtdas(&self) -> DTDAS_R { - DTDAS_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtdas(&self) -> DtdasR { + DtdasR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 9 - DTI Always Run"] #[inline(always)] - pub fn dtar(&self) -> DTAR_R { - DTAR_R::new(((self.bits >> 9) & 1) != 0) + pub fn dtar(&self) -> DtarR { + DtarR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - DTI Fault Action on Timer Stop"] #[inline(always)] - pub fn dtfats(&self) -> DTFATS_R { - DTFATS_R::new(((self.bits >> 10) & 1) != 0) + pub fn dtfats(&self) -> DtfatsR { + DtfatsR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - DTI PRS Source Enable"] #[inline(always)] - pub fn dtprsen(&self) -> DTPRSEN_R { - DTPRSEN_R::new(((self.bits >> 11) & 1) != 0) + pub fn dtprsen(&self) -> DtprsenR { + DtprsenR::new(((self.bits >> 11) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI Enable"] #[inline(always)] #[must_use] - pub fn dten(&mut self) -> DTEN_W<0> { - DTEN_W::new(self) + pub fn dten(&mut self) -> DtenW { + DtenW::new(self, 0) } #[doc = "Bit 1 - DTI Automatic Start-up Functionality"] #[inline(always)] #[must_use] - pub fn dtdas(&mut self) -> DTDAS_W<1> { - DTDAS_W::new(self) + pub fn dtdas(&mut self) -> DtdasW { + DtdasW::new(self, 1) } #[doc = "Bit 9 - DTI Always Run"] #[inline(always)] #[must_use] - pub fn dtar(&mut self) -> DTAR_W<9> { - DTAR_W::new(self) + pub fn dtar(&mut self) -> DtarW { + DtarW::new(self, 9) } #[doc = "Bit 10 - DTI Fault Action on Timer Stop"] #[inline(always)] #[must_use] - pub fn dtfats(&mut self) -> DTFATS_W<10> { - DTFATS_W::new(self) + pub fn dtfats(&mut self) -> DtfatsW { + DtfatsW::new(self, 10) } #[doc = "Bit 11 - DTI PRS Source Enable"] #[inline(always)] #[must_use] - pub fn dtprsen(&mut self) -> DTPRSEN_W<11> { - DTPRSEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtprsen(&mut self) -> DtprsenW { + DtprsenW::new(self, 11) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtcfg](index.html) module"] -pub struct DTCFG_SPEC; -impl crate::RegisterSpec for DTCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtcfgSpec; +impl crate::RegisterSpec for DtcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtcfg::R](R) reader structure"] -impl crate::Readable for DTCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtcfg::W](W) writer structure"] -impl crate::Writable for DTCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtcfg::R`](R) reader structure"] +impl crate::Readable for DtcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dtcfg::W`](W) writer structure"] +impl crate::Writable for DtcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTCFG to value 0"] -impl crate::Resettable for DTCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtctrl.rs index 816a05e..84f6d17 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtctrl.rs @@ -1,95 +1,55 @@ #[doc = "Register `DTCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTCINV` reader - DTI Complementary Output Invert."] -pub type DTCINV_R = crate::BitReader; +pub type DtcinvR = crate::BitReader; #[doc = "Field `DTCINV` writer - DTI Complementary Output Invert."] -pub type DTCINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, O>; +pub type DtcinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTIPOL` reader - DTI Inactive Polarity"] -pub type DTIPOL_R = crate::BitReader; +pub type DtipolR = crate::BitReader; #[doc = "Field `DTIPOL` writer - DTI Inactive Polarity"] -pub type DTIPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, O>; +pub type DtipolW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI Complementary Output Invert."] #[inline(always)] - pub fn dtcinv(&self) -> DTCINV_R { - DTCINV_R::new((self.bits & 1) != 0) + pub fn dtcinv(&self) -> DtcinvR { + DtcinvR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI Inactive Polarity"] #[inline(always)] - pub fn dtipol(&self) -> DTIPOL_R { - DTIPOL_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtipol(&self) -> DtipolR { + DtipolR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI Complementary Output Invert."] #[inline(always)] #[must_use] - pub fn dtcinv(&mut self) -> DTCINV_W<0> { - DTCINV_W::new(self) + pub fn dtcinv(&mut self) -> DtcinvW { + DtcinvW::new(self, 0) } #[doc = "Bit 1 - DTI Inactive Polarity"] #[inline(always)] #[must_use] - pub fn dtipol(&mut self) -> DTIPOL_W<1> { - DTIPOL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtipol(&mut self) -> DtipolW { + DtipolW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtctrl](index.html) module"] -pub struct DTCTRL_SPEC; -impl crate::RegisterSpec for DTCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtctrlSpec; +impl crate::RegisterSpec for DtctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtctrl::R](R) reader structure"] -impl crate::Readable for DTCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtctrl::W](W) writer structure"] -impl crate::Writable for DTCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtctrl::R`](R) reader structure"] +impl crate::Readable for DtctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`dtctrl::W`](W) writer structure"] +impl crate::Writable for DtctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTCTRL to value 0"] -impl crate::Resettable for DTCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtfault.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtfault.rs index 01a53f9..ecd21aa 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtfault.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtfault.rs @@ -1,65 +1,50 @@ #[doc = "Register `DTFAULT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DTPRS0F` reader - DTI PRS 0 Fault"] -pub type DTPRS0F_R = crate::BitReader; +pub type Dtprs0fR = crate::BitReader; #[doc = "Field `DTPRS1F` reader - DTI PRS 1 Fault"] -pub type DTPRS1F_R = crate::BitReader; +pub type Dtprs1fR = crate::BitReader; #[doc = "Field `DTDBGF` reader - DTI Debugger Fault"] -pub type DTDBGF_R = crate::BitReader; +pub type DtdbgfR = crate::BitReader; #[doc = "Field `DTLOCKUPF` reader - DTI Lockup Fault"] -pub type DTLOCKUPF_R = crate::BitReader; +pub type DtlockupfR = crate::BitReader; #[doc = "Field `DTEM23F` reader - DTI EM23 Entry Fault"] -pub type DTEM23F_R = crate::BitReader; +pub type Dtem23fR = crate::BitReader; impl R { #[doc = "Bit 0 - DTI PRS 0 Fault"] #[inline(always)] - pub fn dtprs0f(&self) -> DTPRS0F_R { - DTPRS0F_R::new((self.bits & 1) != 0) + pub fn dtprs0f(&self) -> Dtprs0fR { + Dtprs0fR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI PRS 1 Fault"] #[inline(always)] - pub fn dtprs1f(&self) -> DTPRS1F_R { - DTPRS1F_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtprs1f(&self) -> Dtprs1fR { + Dtprs1fR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DTI Debugger Fault"] #[inline(always)] - pub fn dtdbgf(&self) -> DTDBGF_R { - DTDBGF_R::new(((self.bits >> 2) & 1) != 0) + pub fn dtdbgf(&self) -> DtdbgfR { + DtdbgfR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DTI Lockup Fault"] #[inline(always)] - pub fn dtlockupf(&self) -> DTLOCKUPF_R { - DTLOCKUPF_R::new(((self.bits >> 3) & 1) != 0) + pub fn dtlockupf(&self) -> DtlockupfR { + DtlockupfR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - DTI EM23 Entry Fault"] #[inline(always)] - pub fn dtem23f(&self) -> DTEM23F_R { - DTEM23F_R::new(((self.bits >> 4) & 1) != 0) + pub fn dtem23f(&self) -> Dtem23fR { + Dtem23fR::new(((self.bits >> 4) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfault](index.html) module"] -pub struct DTFAULT_SPEC; -impl crate::RegisterSpec for DTFAULT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfault::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfaultSpec; +impl crate::RegisterSpec for DtfaultSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtfault::R](R) reader structure"] -impl crate::Readable for DTFAULT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`dtfault::R`](R) reader structure"] +impl crate::Readable for DtfaultSpec {} #[doc = "`reset()` method sets DTFAULT to value 0"] -impl crate::Resettable for DTFAULT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfaultSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtfaultc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtfaultc.rs index 1c3d1ba..bcb21e2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtfaultc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtfaultc.rs @@ -1,84 +1,59 @@ #[doc = "Register `DTFAULTC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTPRS0FC` writer - DTI PRS0 Fault Clear"] -pub type DTPRS0FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtprs0fcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRS1FC` writer - DTI PRS1 Fault Clear"] -pub type DTPRS1FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtprs1fcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTDBGFC` writer - DTI Debugger Fault Clear"] -pub type DTDBGFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type DtdbgfcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTLOCKUPFC` writer - DTI Lockup Fault Clear"] -pub type DTLOCKUPFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type DtlockupfcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTEM23FC` writer - DTI EM23 Fault Clear"] -pub type DTEM23FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtem23fcW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - DTI PRS0 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtprs0fc(&mut self) -> DTPRS0FC_W<0> { - DTPRS0FC_W::new(self) + pub fn dtprs0fc(&mut self) -> Dtprs0fcW { + Dtprs0fcW::new(self, 0) } #[doc = "Bit 1 - DTI PRS1 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtprs1fc(&mut self) -> DTPRS1FC_W<1> { - DTPRS1FC_W::new(self) + pub fn dtprs1fc(&mut self) -> Dtprs1fcW { + Dtprs1fcW::new(self, 1) } #[doc = "Bit 2 - DTI Debugger Fault Clear"] #[inline(always)] #[must_use] - pub fn dtdbgfc(&mut self) -> DTDBGFC_W<2> { - DTDBGFC_W::new(self) + pub fn dtdbgfc(&mut self) -> DtdbgfcW { + DtdbgfcW::new(self, 2) } #[doc = "Bit 3 - DTI Lockup Fault Clear"] #[inline(always)] #[must_use] - pub fn dtlockupfc(&mut self) -> DTLOCKUPFC_W<3> { - DTLOCKUPFC_W::new(self) + pub fn dtlockupfc(&mut self) -> DtlockupfcW { + DtlockupfcW::new(self, 3) } #[doc = "Bit 4 - DTI EM23 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtem23fc(&mut self) -> DTEM23FC_W<4> { - DTEM23FC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtem23fc(&mut self) -> Dtem23fcW { + Dtem23fcW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfaultc](index.html) module"] -pub struct DTFAULTC_SPEC; -impl crate::RegisterSpec for DTFAULTC_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfaultc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfaultcSpec; +impl crate::RegisterSpec for DtfaultcSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [dtfaultc::W](W) writer structure"] -impl crate::Writable for DTFAULTC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`dtfaultc::W`](W) writer structure"] +impl crate::Writable for DtfaultcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTFAULTC to value 0"] -impl crate::Resettable for DTFAULTC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfaultcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtfcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtfcfg.rs index 91dee4b..6179df8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtfcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtfcfg.rs @@ -1,229 +1,197 @@ #[doc = "Register `DTFCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTFCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DTFA` reader - DTI Fault Action"] -pub type DTFA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DTI Fault Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DTFA_A { +pub enum Dtfa { #[doc = "0: No action on fault"] - NONE = 0, + None = 0, #[doc = "1: Set outputs inactive"] - INACTIVE = 1, + Inactive = 1, #[doc = "2: Clear outputs"] - CLEAR = 2, + Clear = 2, #[doc = "3: Tristate outputs"] - TRISTATE = 3, + Tristate = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DTFA_A) -> Self { + fn from(variant: Dtfa) -> Self { variant as _ } } -impl DTFA_R { +impl crate::FieldSpec for Dtfa { + type Ux = u8; +} +impl crate::IsEnum for Dtfa {} +#[doc = "Field `DTFA` reader - DTI Fault Action"] +pub type DtfaR = crate::FieldReader; +impl DtfaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTFA_A { + pub const fn variant(&self) -> Dtfa { match self.bits { - 0 => DTFA_A::NONE, - 1 => DTFA_A::INACTIVE, - 2 => DTFA_A::CLEAR, - 3 => DTFA_A::TRISTATE, + 0 => Dtfa::None, + 1 => Dtfa::Inactive, + 2 => Dtfa::Clear, + 3 => Dtfa::Tristate, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on fault"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == DTFA_A::NONE + *self == Dtfa::None } - #[doc = "Checks if the value of the field is `INACTIVE`"] + #[doc = "Set outputs inactive"] #[inline(always)] pub fn is_inactive(&self) -> bool { - *self == DTFA_A::INACTIVE + *self == Dtfa::Inactive } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear outputs"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == DTFA_A::CLEAR + *self == Dtfa::Clear } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "Tristate outputs"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == DTFA_A::TRISTATE + *self == Dtfa::Tristate } } #[doc = "Field `DTFA` writer - DTI Fault Action"] -pub type DTFA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, DTFCFG_SPEC, u8, DTFA_A, 2, O>; -impl<'a, const O: u8> DTFA_W<'a, O> { +pub type DtfaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dtfa, crate::Safe>; +impl<'a, REG> DtfaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on fault"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(DTFA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Dtfa::None) } #[doc = "Set outputs inactive"] #[inline(always)] - pub fn inactive(self) -> &'a mut W { - self.variant(DTFA_A::INACTIVE) + pub fn inactive(self) -> &'a mut crate::W { + self.variant(Dtfa::Inactive) } #[doc = "Clear outputs"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(DTFA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Dtfa::Clear) } #[doc = "Tristate outputs"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(DTFA_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Dtfa::Tristate) } } #[doc = "Field `DTPRS0FEN` reader - DTI PRS 0 Fault Enable"] -pub type DTPRS0FEN_R = crate::BitReader; +pub type Dtprs0fenR = crate::BitReader; #[doc = "Field `DTPRS0FEN` writer - DTI PRS 0 Fault Enable"] -pub type DTPRS0FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtprs0fenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRS1FEN` reader - DTI PRS 1 Fault Enable"] -pub type DTPRS1FEN_R = crate::BitReader; +pub type Dtprs1fenR = crate::BitReader; #[doc = "Field `DTPRS1FEN` writer - DTI PRS 1 Fault Enable"] -pub type DTPRS1FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtprs1fenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTDBGFEN` reader - DTI Debugger Fault Enable"] -pub type DTDBGFEN_R = crate::BitReader; +pub type DtdbgfenR = crate::BitReader; #[doc = "Field `DTDBGFEN` writer - DTI Debugger Fault Enable"] -pub type DTDBGFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type DtdbgfenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTLOCKUPFEN` reader - DTI Lockup Fault Enable"] -pub type DTLOCKUPFEN_R = crate::BitReader; +pub type DtlockupfenR = crate::BitReader; #[doc = "Field `DTLOCKUPFEN` writer - DTI Lockup Fault Enable"] -pub type DTLOCKUPFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type DtlockupfenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTEM23FEN` reader - DTI EM23 Fault Enable"] -pub type DTEM23FEN_R = crate::BitReader; +pub type Dtem23fenR = crate::BitReader; #[doc = "Field `DTEM23FEN` writer - DTI EM23 Fault Enable"] -pub type DTEM23FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtem23fenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 16:17 - DTI Fault Action"] #[inline(always)] - pub fn dtfa(&self) -> DTFA_R { - DTFA_R::new(((self.bits >> 16) & 3) as u8) + pub fn dtfa(&self) -> DtfaR { + DtfaR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 24 - DTI PRS 0 Fault Enable"] #[inline(always)] - pub fn dtprs0fen(&self) -> DTPRS0FEN_R { - DTPRS0FEN_R::new(((self.bits >> 24) & 1) != 0) + pub fn dtprs0fen(&self) -> Dtprs0fenR { + Dtprs0fenR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - DTI PRS 1 Fault Enable"] #[inline(always)] - pub fn dtprs1fen(&self) -> DTPRS1FEN_R { - DTPRS1FEN_R::new(((self.bits >> 25) & 1) != 0) + pub fn dtprs1fen(&self) -> Dtprs1fenR { + Dtprs1fenR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - DTI Debugger Fault Enable"] #[inline(always)] - pub fn dtdbgfen(&self) -> DTDBGFEN_R { - DTDBGFEN_R::new(((self.bits >> 26) & 1) != 0) + pub fn dtdbgfen(&self) -> DtdbgfenR { + DtdbgfenR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - DTI Lockup Fault Enable"] #[inline(always)] - pub fn dtlockupfen(&self) -> DTLOCKUPFEN_R { - DTLOCKUPFEN_R::new(((self.bits >> 27) & 1) != 0) + pub fn dtlockupfen(&self) -> DtlockupfenR { + DtlockupfenR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - DTI EM23 Fault Enable"] #[inline(always)] - pub fn dtem23fen(&self) -> DTEM23FEN_R { - DTEM23FEN_R::new(((self.bits >> 28) & 1) != 0) + pub fn dtem23fen(&self) -> Dtem23fenR { + Dtem23fenR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bits 16:17 - DTI Fault Action"] #[inline(always)] #[must_use] - pub fn dtfa(&mut self) -> DTFA_W<16> { - DTFA_W::new(self) + pub fn dtfa(&mut self) -> DtfaW { + DtfaW::new(self, 16) } #[doc = "Bit 24 - DTI PRS 0 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtprs0fen(&mut self) -> DTPRS0FEN_W<24> { - DTPRS0FEN_W::new(self) + pub fn dtprs0fen(&mut self) -> Dtprs0fenW { + Dtprs0fenW::new(self, 24) } #[doc = "Bit 25 - DTI PRS 1 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtprs1fen(&mut self) -> DTPRS1FEN_W<25> { - DTPRS1FEN_W::new(self) + pub fn dtprs1fen(&mut self) -> Dtprs1fenW { + Dtprs1fenW::new(self, 25) } #[doc = "Bit 26 - DTI Debugger Fault Enable"] #[inline(always)] #[must_use] - pub fn dtdbgfen(&mut self) -> DTDBGFEN_W<26> { - DTDBGFEN_W::new(self) + pub fn dtdbgfen(&mut self) -> DtdbgfenW { + DtdbgfenW::new(self, 26) } #[doc = "Bit 27 - DTI Lockup Fault Enable"] #[inline(always)] #[must_use] - pub fn dtlockupfen(&mut self) -> DTLOCKUPFEN_W<27> { - DTLOCKUPFEN_W::new(self) + pub fn dtlockupfen(&mut self) -> DtlockupfenW { + DtlockupfenW::new(self, 27) } #[doc = "Bit 28 - DTI EM23 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtem23fen(&mut self) -> DTEM23FEN_W<28> { - DTEM23FEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtem23fen(&mut self) -> Dtem23fenW { + Dtem23fenW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfcfg](index.html) module"] -pub struct DTFCFG_SPEC; -impl crate::RegisterSpec for DTFCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfcfgSpec; +impl crate::RegisterSpec for DtfcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtfcfg::R](R) reader structure"] -impl crate::Readable for DTFCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtfcfg::W](W) writer structure"] -impl crate::Writable for DTFCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtfcfg::R`](R) reader structure"] +impl crate::Readable for DtfcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dtfcfg::W`](W) writer structure"] +impl crate::Writable for DtfcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTFCFG to value 0"] -impl crate::Resettable for DTFCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtlock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtlock.rs index 434789a..5ce63f5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtlock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtlock.rs @@ -1,73 +1,55 @@ #[doc = "Register `DTLOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "DTI Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum DTILOCKKEY_AW { +pub enum Dtilockkey { #[doc = "52864: Write to unlock TIMER DTI registers"] - UNLOCK = 52864, + Unlock = 52864, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: DTILOCKKEY_AW) -> Self { + fn from(variant: Dtilockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Dtilockkey { + type Ux = u16; +} +impl crate::IsEnum for Dtilockkey {} #[doc = "Field `DTILOCKKEY` writer - DTI Lock Key"] -pub type DTILOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, DTLOCK_SPEC, u16, DTILOCKKEY_AW, 16, O>; -impl<'a, const O: u8> DTILOCKKEY_W<'a, O> { +pub type DtilockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Dtilockkey>; +impl<'a, REG> DtilockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unlock TIMER DTI registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(DTILOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Dtilockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - DTI Lock Key"] #[inline(always)] #[must_use] - pub fn dtilockkey(&mut self) -> DTILOCKKEY_W<0> { - DTILOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtilockkey(&mut self) -> DtilockkeyW { + DtilockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtlock](index.html) module"] -pub struct DTLOCK_SPEC; -impl crate::RegisterSpec for DTLOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtlock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtlockSpec; +impl crate::RegisterSpec for DtlockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [dtlock::W](W) writer structure"] -impl crate::Writable for DTLOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`dtlock::W`](W) writer structure"] +impl crate::Writable for DtlockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTLOCK to value 0"] -impl crate::Resettable for DTLOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtlockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtogen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtogen.rs index 818b4bb..35926ca 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtogen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dtogen.rs @@ -1,155 +1,115 @@ #[doc = "Register `DTOGEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTOGEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTOGCC0EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC0EN_R = crate::BitReader; +pub type Dtogcc0enR = crate::BitReader; #[doc = "Field `DTOGCC0EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCC1EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC1EN_R = crate::BitReader; +pub type Dtogcc1enR = crate::BitReader; #[doc = "Field `DTOGCC1EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCC2EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC2EN_R = crate::BitReader; +pub type Dtogcc2enR = crate::BitReader; #[doc = "Field `DTOGCC2EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC2EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc2enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI0EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI0EN_R = crate::BitReader; +pub type Dtogcdti0enR = crate::BitReader; #[doc = "Field `DTOGCDTI0EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI1EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI1EN_R = crate::BitReader; +pub type Dtogcdti1enR = crate::BitReader; #[doc = "Field `DTOGCDTI1EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI2EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI2EN_R = crate::BitReader; +pub type Dtogcdti2enR = crate::BitReader; #[doc = "Field `DTOGCDTI2EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI2EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti2enW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc0en(&self) -> DTOGCC0EN_R { - DTOGCC0EN_R::new((self.bits & 1) != 0) + pub fn dtogcc0en(&self) -> Dtogcc0enR { + Dtogcc0enR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc1en(&self) -> DTOGCC1EN_R { - DTOGCC1EN_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtogcc1en(&self) -> Dtogcc1enR { + Dtogcc1enR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc2en(&self) -> DTOGCC2EN_R { - DTOGCC2EN_R::new(((self.bits >> 2) & 1) != 0) + pub fn dtogcc2en(&self) -> Dtogcc2enR { + Dtogcc2enR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti0en(&self) -> DTOGCDTI0EN_R { - DTOGCDTI0EN_R::new(((self.bits >> 3) & 1) != 0) + pub fn dtogcdti0en(&self) -> Dtogcdti0enR { + Dtogcdti0enR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti1en(&self) -> DTOGCDTI1EN_R { - DTOGCDTI1EN_R::new(((self.bits >> 4) & 1) != 0) + pub fn dtogcdti1en(&self) -> Dtogcdti1enR { + Dtogcdti1enR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti2en(&self) -> DTOGCDTI2EN_R { - DTOGCDTI2EN_R::new(((self.bits >> 5) & 1) != 0) + pub fn dtogcdti2en(&self) -> Dtogcdti2enR { + Dtogcdti2enR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc0en(&mut self) -> DTOGCC0EN_W<0> { - DTOGCC0EN_W::new(self) + pub fn dtogcc0en(&mut self) -> Dtogcc0enW { + Dtogcc0enW::new(self, 0) } #[doc = "Bit 1 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc1en(&mut self) -> DTOGCC1EN_W<1> { - DTOGCC1EN_W::new(self) + pub fn dtogcc1en(&mut self) -> Dtogcc1enW { + Dtogcc1enW::new(self, 1) } #[doc = "Bit 2 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc2en(&mut self) -> DTOGCC2EN_W<2> { - DTOGCC2EN_W::new(self) + pub fn dtogcc2en(&mut self) -> Dtogcc2enW { + Dtogcc2enW::new(self, 2) } #[doc = "Bit 3 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti0en(&mut self) -> DTOGCDTI0EN_W<3> { - DTOGCDTI0EN_W::new(self) + pub fn dtogcdti0en(&mut self) -> Dtogcdti0enW { + Dtogcdti0enW::new(self, 3) } #[doc = "Bit 4 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti1en(&mut self) -> DTOGCDTI1EN_W<4> { - DTOGCDTI1EN_W::new(self) + pub fn dtogcdti1en(&mut self) -> Dtogcdti1enW { + Dtogcdti1enW::new(self, 4) } #[doc = "Bit 5 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti2en(&mut self) -> DTOGCDTI2EN_W<5> { - DTOGCDTI2EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtogcdti2en(&mut self) -> Dtogcdti2enW { + Dtogcdti2enW::new(self, 5) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtogen](index.html) module"] -pub struct DTOGEN_SPEC; -impl crate::RegisterSpec for DTOGEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtogen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtogen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtogenSpec; +impl crate::RegisterSpec for DtogenSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtogen::R](R) reader structure"] -impl crate::Readable for DTOGEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtogen::W](W) writer structure"] -impl crate::Writable for DTOGEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtogen::R`](R) reader structure"] +impl crate::Readable for DtogenSpec {} +#[doc = "`write(|w| ..)` method takes [`dtogen::W`](W) writer structure"] +impl crate::Writable for DtogenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTOGEN to value 0"] -impl crate::Resettable for DTOGEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtogenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dttimecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dttimecfg.rs index 63e4c73..9577f86 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dttimecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/dttimecfg.rs @@ -1,110 +1,70 @@ #[doc = "Register `DTTIMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTTIMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTPRESC` reader - DTI Prescaler Setting"] -pub type DTPRESC_R = crate::FieldReader; +pub type DtprescR = crate::FieldReader; #[doc = "Field `DTPRESC` writer - DTI Prescaler Setting"] -pub type DTPRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u16, u16, 10, O>; +pub type DtprescW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `DTRISET` reader - DTI Rise-time"] -pub type DTRISET_R = crate::FieldReader; +pub type DtrisetR = crate::FieldReader; #[doc = "Field `DTRISET` writer - DTI Rise-time"] -pub type DTRISET_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u8, u8, 6, O>; +pub type DtrisetW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `DTFALLT` reader - DTI Fall-time"] -pub type DTFALLT_R = crate::FieldReader; +pub type DtfalltR = crate::FieldReader; #[doc = "Field `DTFALLT` writer - DTI Fall-time"] -pub type DTFALLT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u8, u8, 6, O>; +pub type DtfalltW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:9 - DTI Prescaler Setting"] #[inline(always)] - pub fn dtpresc(&self) -> DTPRESC_R { - DTPRESC_R::new((self.bits & 0x03ff) as u16) + pub fn dtpresc(&self) -> DtprescR { + DtprescR::new((self.bits & 0x03ff) as u16) } #[doc = "Bits 10:15 - DTI Rise-time"] #[inline(always)] - pub fn dtriset(&self) -> DTRISET_R { - DTRISET_R::new(((self.bits >> 10) & 0x3f) as u8) + pub fn dtriset(&self) -> DtrisetR { + DtrisetR::new(((self.bits >> 10) & 0x3f) as u8) } #[doc = "Bits 16:21 - DTI Fall-time"] #[inline(always)] - pub fn dtfallt(&self) -> DTFALLT_R { - DTFALLT_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn dtfallt(&self) -> DtfalltR { + DtfalltR::new(((self.bits >> 16) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:9 - DTI Prescaler Setting"] #[inline(always)] #[must_use] - pub fn dtpresc(&mut self) -> DTPRESC_W<0> { - DTPRESC_W::new(self) + pub fn dtpresc(&mut self) -> DtprescW { + DtprescW::new(self, 0) } #[doc = "Bits 10:15 - DTI Rise-time"] #[inline(always)] #[must_use] - pub fn dtriset(&mut self) -> DTRISET_W<10> { - DTRISET_W::new(self) + pub fn dtriset(&mut self) -> DtrisetW { + DtrisetW::new(self, 10) } #[doc = "Bits 16:21 - DTI Fall-time"] #[inline(always)] #[must_use] - pub fn dtfallt(&mut self) -> DTFALLT_W<16> { - DTFALLT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtfallt(&mut self) -> DtfalltW { + DtfalltW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dttimecfg](index.html) module"] -pub struct DTTIMECFG_SPEC; -impl crate::RegisterSpec for DTTIMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dttimecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dttimecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DttimecfgSpec; +impl crate::RegisterSpec for DttimecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dttimecfg::R](R) reader structure"] -impl crate::Readable for DTTIMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dttimecfg::W](W) writer structure"] -impl crate::Writable for DTTIMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dttimecfg::R`](R) reader structure"] +impl crate::Readable for DttimecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dttimecfg::W`](W) writer structure"] +impl crate::Writable for DttimecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTTIMECFG to value 0"] -impl crate::Resettable for DTTIMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DttimecfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/en.rs index 9392483..303507b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Timer Module Enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Timer Module Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Timer Module Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Timer Module Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/ien.rs index 66588d7..73273ef 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/ien.rs @@ -1,290 +1,250 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OF` reader - Overflow Interrupt Enable"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Enable"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UF` reader - Underflow Interrupt Enable"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Enable"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DIRCHG` reader - Direction Change Detect Interrupt Enable"] -pub type DIRCHG_R = crate::BitReader; +pub type DirchgR = crate::BitReader; #[doc = "Field `DIRCHG` writer - Direction Change Detect Interrupt Enable"] -pub type DIRCHG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type DirchgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC0` reader - CC0 Interrupt Enable"] -pub type CC0_R = crate::BitReader; +pub type Cc0R = crate::BitReader; #[doc = "Field `CC0` writer - CC0 Interrupt Enable"] -pub type CC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1` reader - CC1 Interrupt Enable"] -pub type CC1_R = crate::BitReader; +pub type Cc1R = crate::BitReader; #[doc = "Field `CC1` writer - CC1 Interrupt Enable"] -pub type CC1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2` reader - CC2 Interrupt Enable"] -pub type CC2_R = crate::BitReader; +pub type Cc2R = crate::BitReader; #[doc = "Field `CC2` writer - CC2 Interrupt Enable"] -pub type CC2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL0` reader - ICFWLFULL0 Interrupt Enable"] -pub type ICFWLFULL0_R = crate::BitReader; +pub type Icfwlfull0R = crate::BitReader; #[doc = "Field `ICFWLFULL0` writer - ICFWLFULL0 Interrupt Enable"] -pub type ICFWLFULL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL1` reader - ICFWLFULL1 Interrupt Enable"] -pub type ICFWLFULL1_R = crate::BitReader; +pub type Icfwlfull1R = crate::BitReader; #[doc = "Field `ICFWLFULL1` writer - ICFWLFULL1 Interrupt Enable"] -pub type ICFWLFULL1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL2` reader - ICFWLFULL2 Interrupt Enable"] -pub type ICFWLFULL2_R = crate::BitReader; +pub type Icfwlfull2R = crate::BitReader; #[doc = "Field `ICFWLFULL2` writer - ICFWLFULL2 Interrupt Enable"] -pub type ICFWLFULL2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF0` reader - ICFOF0 Interrupt Enable"] -pub type ICFOF0_R = crate::BitReader; +pub type Icfof0R = crate::BitReader; #[doc = "Field `ICFOF0` writer - ICFOF0 Interrupt Enable"] -pub type ICFOF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF1` reader - ICFOF1 Interrupt Enable"] -pub type ICFOF1_R = crate::BitReader; +pub type Icfof1R = crate::BitReader; #[doc = "Field `ICFOF1` writer - ICFOF1 Interrupt Enable"] -pub type ICFOF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF2` reader - ICFOF2 Interrupt Enable"] -pub type ICFOF2_R = crate::BitReader; +pub type Icfof2R = crate::BitReader; #[doc = "Field `ICFOF2` writer - ICFOF2 Interrupt Enable"] -pub type ICFOF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF0` reader - ICFUF0 Interrupt Enable"] -pub type ICFUF0_R = crate::BitReader; +pub type Icfuf0R = crate::BitReader; #[doc = "Field `ICFUF0` writer - ICFUF0 Interrupt Enable"] -pub type ICFUF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF1` reader - ICFUF1 Interrupt Enable"] -pub type ICFUF1_R = crate::BitReader; +pub type Icfuf1R = crate::BitReader; #[doc = "Field `ICFUF1` writer - ICFUF1 Interrupt Enable"] -pub type ICFUF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF2` reader - ICFUF2 Interrupt Enable"] -pub type ICFUF2_R = crate::BitReader; +pub type Icfuf2R = crate::BitReader; #[doc = "Field `ICFUF2` writer - ICFUF2 Interrupt Enable"] -pub type ICFUF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Enable"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new((self.bits & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Underflow Interrupt Enable"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new(((self.bits >> 1) & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Direction Change Detect Interrupt Enable"] #[inline(always)] - pub fn dirchg(&self) -> DIRCHG_R { - DIRCHG_R::new(((self.bits >> 2) & 1) != 0) + pub fn dirchg(&self) -> DirchgR { + DirchgR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - CC0 Interrupt Enable"] #[inline(always)] - pub fn cc0(&self) -> CC0_R { - CC0_R::new(((self.bits >> 4) & 1) != 0) + pub fn cc0(&self) -> Cc0R { + Cc0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CC1 Interrupt Enable"] #[inline(always)] - pub fn cc1(&self) -> CC1_R { - CC1_R::new(((self.bits >> 5) & 1) != 0) + pub fn cc1(&self) -> Cc1R { + Cc1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - CC2 Interrupt Enable"] #[inline(always)] - pub fn cc2(&self) -> CC2_R { - CC2_R::new(((self.bits >> 6) & 1) != 0) + pub fn cc2(&self) -> Cc2R { + Cc2R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 16 - ICFWLFULL0 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull0(&self) -> ICFWLFULL0_R { - ICFWLFULL0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfwlfull0(&self) -> Icfwlfull0R { + Icfwlfull0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - ICFWLFULL1 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull1(&self) -> ICFWLFULL1_R { - ICFWLFULL1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfwlfull1(&self) -> Icfwlfull1R { + Icfwlfull1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - ICFWLFULL2 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull2(&self) -> ICFWLFULL2_R { - ICFWLFULL2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfwlfull2(&self) -> Icfwlfull2R { + Icfwlfull2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - ICFOF0 Interrupt Enable"] #[inline(always)] - pub fn icfof0(&self) -> ICFOF0_R { - ICFOF0_R::new(((self.bits >> 20) & 1) != 0) + pub fn icfof0(&self) -> Icfof0R { + Icfof0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - ICFOF1 Interrupt Enable"] #[inline(always)] - pub fn icfof1(&self) -> ICFOF1_R { - ICFOF1_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfof1(&self) -> Icfof1R { + Icfof1R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - ICFOF2 Interrupt Enable"] #[inline(always)] - pub fn icfof2(&self) -> ICFOF2_R { - ICFOF2_R::new(((self.bits >> 22) & 1) != 0) + pub fn icfof2(&self) -> Icfof2R { + Icfof2R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 24 - ICFUF0 Interrupt Enable"] #[inline(always)] - pub fn icfuf0(&self) -> ICFUF0_R { - ICFUF0_R::new(((self.bits >> 24) & 1) != 0) + pub fn icfuf0(&self) -> Icfuf0R { + Icfuf0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - ICFUF1 Interrupt Enable"] #[inline(always)] - pub fn icfuf1(&self) -> ICFUF1_R { - ICFUF1_R::new(((self.bits >> 25) & 1) != 0) + pub fn icfuf1(&self) -> Icfuf1R { + Icfuf1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - ICFUF2 Interrupt Enable"] #[inline(always)] - pub fn icfuf2(&self) -> ICFUF2_R { - ICFUF2_R::new(((self.bits >> 26) & 1) != 0) + pub fn icfuf2(&self) -> Icfuf2R { + Icfuf2R::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<0> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 0) } #[doc = "Bit 1 - Underflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<1> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 1) } #[doc = "Bit 2 - Direction Change Detect Interrupt Enable"] #[inline(always)] #[must_use] - pub fn dirchg(&mut self) -> DIRCHG_W<2> { - DIRCHG_W::new(self) + pub fn dirchg(&mut self) -> DirchgW { + DirchgW::new(self, 2) } #[doc = "Bit 4 - CC0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc0(&mut self) -> CC0_W<4> { - CC0_W::new(self) + pub fn cc0(&mut self) -> Cc0W { + Cc0W::new(self, 4) } #[doc = "Bit 5 - CC1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc1(&mut self) -> CC1_W<5> { - CC1_W::new(self) + pub fn cc1(&mut self) -> Cc1W { + Cc1W::new(self, 5) } #[doc = "Bit 6 - CC2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc2(&mut self) -> CC2_W<6> { - CC2_W::new(self) + pub fn cc2(&mut self) -> Cc2W { + Cc2W::new(self, 6) } #[doc = "Bit 16 - ICFWLFULL0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull0(&mut self) -> ICFWLFULL0_W<16> { - ICFWLFULL0_W::new(self) + pub fn icfwlfull0(&mut self) -> Icfwlfull0W { + Icfwlfull0W::new(self, 16) } #[doc = "Bit 17 - ICFWLFULL1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull1(&mut self) -> ICFWLFULL1_W<17> { - ICFWLFULL1_W::new(self) + pub fn icfwlfull1(&mut self) -> Icfwlfull1W { + Icfwlfull1W::new(self, 17) } #[doc = "Bit 18 - ICFWLFULL2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull2(&mut self) -> ICFWLFULL2_W<18> { - ICFWLFULL2_W::new(self) + pub fn icfwlfull2(&mut self) -> Icfwlfull2W { + Icfwlfull2W::new(self, 18) } #[doc = "Bit 20 - ICFOF0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof0(&mut self) -> ICFOF0_W<20> { - ICFOF0_W::new(self) + pub fn icfof0(&mut self) -> Icfof0W { + Icfof0W::new(self, 20) } #[doc = "Bit 21 - ICFOF1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof1(&mut self) -> ICFOF1_W<21> { - ICFOF1_W::new(self) + pub fn icfof1(&mut self) -> Icfof1W { + Icfof1W::new(self, 21) } #[doc = "Bit 22 - ICFOF2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof2(&mut self) -> ICFOF2_W<22> { - ICFOF2_W::new(self) + pub fn icfof2(&mut self) -> Icfof2W { + Icfof2W::new(self, 22) } #[doc = "Bit 24 - ICFUF0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf0(&mut self) -> ICFUF0_W<24> { - ICFUF0_W::new(self) + pub fn icfuf0(&mut self) -> Icfuf0W { + Icfuf0W::new(self, 24) } #[doc = "Bit 25 - ICFUF1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf1(&mut self) -> ICFUF1_W<25> { - ICFUF1_W::new(self) + pub fn icfuf1(&mut self) -> Icfuf1W { + Icfuf1W::new(self, 25) } #[doc = "Bit 26 - ICFUF2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf2(&mut self) -> ICFUF2_W<26> { - ICFUF2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfuf2(&mut self) -> Icfuf2W { + Icfuf2W::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/if_.rs index edde0f3..fad1cd1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/if_.rs @@ -1,290 +1,250 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OF` reader - Overflow Interrupt Flag"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Flag"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UF` reader - Underflow Interrupt Flag"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Flag"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DIRCHG` reader - Direction Change Detect Interrupt Flag"] -pub type DIRCHG_R = crate::BitReader; +pub type DirchgR = crate::BitReader; #[doc = "Field `DIRCHG` writer - Direction Change Detect Interrupt Flag"] -pub type DIRCHG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type DirchgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC0` reader - Capture Compare Channel 0 Interrupt Flag"] -pub type CC0_R = crate::BitReader; +pub type Cc0R = crate::BitReader; #[doc = "Field `CC0` writer - Capture Compare Channel 0 Interrupt Flag"] -pub type CC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1` reader - Capture Compare Channel 1 Interrupt Flag"] -pub type CC1_R = crate::BitReader; +pub type Cc1R = crate::BitReader; #[doc = "Field `CC1` writer - Capture Compare Channel 1 Interrupt Flag"] -pub type CC1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2` reader - Capture Compare Channel 2 Interrupt Flag"] -pub type CC2_R = crate::BitReader; +pub type Cc2R = crate::BitReader; #[doc = "Field `CC2` writer - Capture Compare Channel 2 Interrupt Flag"] -pub type CC2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL0` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL0_R = crate::BitReader; +pub type Icfwlfull0R = crate::BitReader; #[doc = "Field `ICFWLFULL0` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL1` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL1_R = crate::BitReader; +pub type Icfwlfull1R = crate::BitReader; #[doc = "Field `ICFWLFULL1` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL2` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL2_R = crate::BitReader; +pub type Icfwlfull2R = crate::BitReader; #[doc = "Field `ICFWLFULL2` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF0` reader - Input Capture FIFO overflow"] -pub type ICFOF0_R = crate::BitReader; +pub type Icfof0R = crate::BitReader; #[doc = "Field `ICFOF0` writer - Input Capture FIFO overflow"] -pub type ICFOF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF1` reader - Input Capture FIFO overflow"] -pub type ICFOF1_R = crate::BitReader; +pub type Icfof1R = crate::BitReader; #[doc = "Field `ICFOF1` writer - Input Capture FIFO overflow"] -pub type ICFOF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF2` reader - Input Capture FIFO overflow"] -pub type ICFOF2_R = crate::BitReader; +pub type Icfof2R = crate::BitReader; #[doc = "Field `ICFOF2` writer - Input Capture FIFO overflow"] -pub type ICFOF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF0` reader - Input capture FIFO underflow"] -pub type ICFUF0_R = crate::BitReader; +pub type Icfuf0R = crate::BitReader; #[doc = "Field `ICFUF0` writer - Input capture FIFO underflow"] -pub type ICFUF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF1` reader - Input capture FIFO underflow"] -pub type ICFUF1_R = crate::BitReader; +pub type Icfuf1R = crate::BitReader; #[doc = "Field `ICFUF1` writer - Input capture FIFO underflow"] -pub type ICFUF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF2` reader - Input capture FIFO underflow"] -pub type ICFUF2_R = crate::BitReader; +pub type Icfuf2R = crate::BitReader; #[doc = "Field `ICFUF2` writer - Input capture FIFO underflow"] -pub type ICFUF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new((self.bits & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Underflow Interrupt Flag"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new(((self.bits >> 1) & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] - pub fn dirchg(&self) -> DIRCHG_R { - DIRCHG_R::new(((self.bits >> 2) & 1) != 0) + pub fn dirchg(&self) -> DirchgR { + DirchgR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Capture Compare Channel 0 Interrupt Flag"] #[inline(always)] - pub fn cc0(&self) -> CC0_R { - CC0_R::new(((self.bits >> 4) & 1) != 0) + pub fn cc0(&self) -> Cc0R { + Cc0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Capture Compare Channel 1 Interrupt Flag"] #[inline(always)] - pub fn cc1(&self) -> CC1_R { - CC1_R::new(((self.bits >> 5) & 1) != 0) + pub fn cc1(&self) -> Cc1R { + Cc1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Capture Compare Channel 2 Interrupt Flag"] #[inline(always)] - pub fn cc2(&self) -> CC2_R { - CC2_R::new(((self.bits >> 6) & 1) != 0) + pub fn cc2(&self) -> Cc2R { + Cc2R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 16 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull0(&self) -> ICFWLFULL0_R { - ICFWLFULL0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfwlfull0(&self) -> Icfwlfull0R { + Icfwlfull0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull1(&self) -> ICFWLFULL1_R { - ICFWLFULL1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfwlfull1(&self) -> Icfwlfull1R { + Icfwlfull1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull2(&self) -> ICFWLFULL2_R { - ICFWLFULL2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfwlfull2(&self) -> Icfwlfull2R { + Icfwlfull2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof0(&self) -> ICFOF0_R { - ICFOF0_R::new(((self.bits >> 20) & 1) != 0) + pub fn icfof0(&self) -> Icfof0R { + Icfof0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof1(&self) -> ICFOF1_R { - ICFOF1_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfof1(&self) -> Icfof1R { + Icfof1R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof2(&self) -> ICFOF2_R { - ICFOF2_R::new(((self.bits >> 22) & 1) != 0) + pub fn icfof2(&self) -> Icfof2R { + Icfof2R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 24 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf0(&self) -> ICFUF0_R { - ICFUF0_R::new(((self.bits >> 24) & 1) != 0) + pub fn icfuf0(&self) -> Icfuf0R { + Icfuf0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf1(&self) -> ICFUF1_R { - ICFUF1_R::new(((self.bits >> 25) & 1) != 0) + pub fn icfuf1(&self) -> Icfuf1R { + Icfuf1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf2(&self) -> ICFUF2_R { - ICFUF2_R::new(((self.bits >> 26) & 1) != 0) + pub fn icfuf2(&self) -> Icfuf2R { + Icfuf2R::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<0> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 0) } #[doc = "Bit 1 - Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<1> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 1) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] #[must_use] - pub fn dirchg(&mut self) -> DIRCHG_W<2> { - DIRCHG_W::new(self) + pub fn dirchg(&mut self) -> DirchgW { + DirchgW::new(self, 2) } #[doc = "Bit 4 - Capture Compare Channel 0 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc0(&mut self) -> CC0_W<4> { - CC0_W::new(self) + pub fn cc0(&mut self) -> Cc0W { + Cc0W::new(self, 4) } #[doc = "Bit 5 - Capture Compare Channel 1 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc1(&mut self) -> CC1_W<5> { - CC1_W::new(self) + pub fn cc1(&mut self) -> Cc1W { + Cc1W::new(self, 5) } #[doc = "Bit 6 - Capture Compare Channel 2 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc2(&mut self) -> CC2_W<6> { - CC2_W::new(self) + pub fn cc2(&mut self) -> Cc2W { + Cc2W::new(self, 6) } #[doc = "Bit 16 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull0(&mut self) -> ICFWLFULL0_W<16> { - ICFWLFULL0_W::new(self) + pub fn icfwlfull0(&mut self) -> Icfwlfull0W { + Icfwlfull0W::new(self, 16) } #[doc = "Bit 17 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull1(&mut self) -> ICFWLFULL1_W<17> { - ICFWLFULL1_W::new(self) + pub fn icfwlfull1(&mut self) -> Icfwlfull1W { + Icfwlfull1W::new(self, 17) } #[doc = "Bit 18 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull2(&mut self) -> ICFWLFULL2_W<18> { - ICFWLFULL2_W::new(self) + pub fn icfwlfull2(&mut self) -> Icfwlfull2W { + Icfwlfull2W::new(self, 18) } #[doc = "Bit 20 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof0(&mut self) -> ICFOF0_W<20> { - ICFOF0_W::new(self) + pub fn icfof0(&mut self) -> Icfof0W { + Icfof0W::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof1(&mut self) -> ICFOF1_W<21> { - ICFOF1_W::new(self) + pub fn icfof1(&mut self) -> Icfof1W { + Icfof1W::new(self, 21) } #[doc = "Bit 22 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof2(&mut self) -> ICFOF2_W<22> { - ICFOF2_W::new(self) + pub fn icfof2(&mut self) -> Icfof2W { + Icfof2W::new(self, 22) } #[doc = "Bit 24 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf0(&mut self) -> ICFUF0_W<24> { - ICFUF0_W::new(self) + pub fn icfuf0(&mut self) -> Icfuf0W { + Icfuf0W::new(self, 24) } #[doc = "Bit 25 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf1(&mut self) -> ICFUF1_W<25> { - ICFUF1_W::new(self) + pub fn icfuf1(&mut self) -> Icfuf1W { + Icfuf1W::new(self, 25) } #[doc = "Bit 26 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf2(&mut self) -> ICFUF2_W<26> { - ICFUF2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfuf2(&mut self) -> Icfuf2W { + Icfuf2W::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/ipversion.rs index fd8f758..0b161f8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/lock.rs index 4d444ca..4d6d1fe 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Timer Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "52864: Write to unlock TIMER registers"] - UNLOCK = 52864, + Unlock = 52864, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Timer Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unlock TIMER registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Timer Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/status.rs index 1a2964d..25d646e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/status.rs @@ -1,339 +1,324 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RUNNING` reader - Running"] -pub type RUNNING_R = crate::BitReader; -#[doc = "Field `DIR` reader - Direction"] -pub type DIR_R = crate::BitReader; +pub type RunningR = crate::BitReader; #[doc = "Direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DIR_A { +pub enum Dir { #[doc = "0: Counting up"] - UP = 0, + Up = 0, #[doc = "1: Counting down"] - DOWN = 1, + Down = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DIR_A) -> Self { + fn from(variant: Dir) -> Self { variant as u8 != 0 } } -impl DIR_R { +#[doc = "Field `DIR` reader - Direction"] +pub type DirR = crate::BitReader; +impl DirR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DIR_A { + pub const fn variant(&self) -> Dir { match self.bits { - false => DIR_A::UP, - true => DIR_A::DOWN, + false => Dir::Up, + true => Dir::Down, } } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Counting up"] #[inline(always)] pub fn is_up(&self) -> bool { - *self == DIR_A::UP + *self == Dir::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Counting down"] #[inline(always)] pub fn is_down(&self) -> bool { - *self == DIR_A::DOWN + *self == Dir::Down } } #[doc = "Field `TOPBV` reader - TOP Buffer Valid"] -pub type TOPBV_R = crate::BitReader; -#[doc = "Field `TIMERLOCKSTATUS` reader - Timer lock status"] -pub type TIMERLOCKSTATUS_R = crate::BitReader; +pub type TopbvR = crate::BitReader; #[doc = "Timer lock status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TIMERLOCKSTATUS_A { +pub enum Timerlockstatus { #[doc = "0: TIMER registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: TIMER registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TIMERLOCKSTATUS_A) -> Self { + fn from(variant: Timerlockstatus) -> Self { variant as u8 != 0 } } -impl TIMERLOCKSTATUS_R { +#[doc = "Field `TIMERLOCKSTATUS` reader - Timer lock status"] +pub type TimerlockstatusR = crate::BitReader; +impl TimerlockstatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TIMERLOCKSTATUS_A { + pub const fn variant(&self) -> Timerlockstatus { match self.bits { - false => TIMERLOCKSTATUS_A::UNLOCKED, - true => TIMERLOCKSTATUS_A::LOCKED, + false => Timerlockstatus::Unlocked, + true => Timerlockstatus::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "TIMER registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == TIMERLOCKSTATUS_A::UNLOCKED + *self == Timerlockstatus::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "TIMER registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == TIMERLOCKSTATUS_A::LOCKED + *self == Timerlockstatus::Locked } } -#[doc = "Field `DTILOCKSTATUS` reader - DTI lock status"] -pub type DTILOCKSTATUS_R = crate::BitReader; #[doc = "DTI lock status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DTILOCKSTATUS_A { +pub enum Dtilockstatus { #[doc = "0: DTI registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: DTI registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DTILOCKSTATUS_A) -> Self { + fn from(variant: Dtilockstatus) -> Self { variant as u8 != 0 } } -impl DTILOCKSTATUS_R { +#[doc = "Field `DTILOCKSTATUS` reader - DTI lock status"] +pub type DtilockstatusR = crate::BitReader; +impl DtilockstatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTILOCKSTATUS_A { + pub const fn variant(&self) -> Dtilockstatus { match self.bits { - false => DTILOCKSTATUS_A::UNLOCKED, - true => DTILOCKSTATUS_A::LOCKED, + false => Dtilockstatus::Unlocked, + true => Dtilockstatus::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "DTI registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == DTILOCKSTATUS_A::UNLOCKED + *self == Dtilockstatus::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "DTI registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == DTILOCKSTATUS_A::LOCKED + *self == Dtilockstatus::Locked } } #[doc = "Field `SYNCBUSY` reader - Sync Busy"] -pub type SYNCBUSY_R = crate::BitReader; +pub type SyncbusyR = crate::BitReader; #[doc = "Field `OCBV0` reader - Output Compare Buffer Valid"] -pub type OCBV0_R = crate::BitReader; +pub type Ocbv0R = crate::BitReader; #[doc = "Field `OCBV1` reader - Output Compare Buffer Valid"] -pub type OCBV1_R = crate::BitReader; +pub type Ocbv1R = crate::BitReader; #[doc = "Field `OCBV2` reader - Output Compare Buffer Valid"] -pub type OCBV2_R = crate::BitReader; +pub type Ocbv2R = crate::BitReader; #[doc = "Field `ICFEMPTY0` reader - Input capture fifo empty"] -pub type ICFEMPTY0_R = crate::BitReader; +pub type Icfempty0R = crate::BitReader; #[doc = "Field `ICFEMPTY1` reader - Input capture fifo empty"] -pub type ICFEMPTY1_R = crate::BitReader; +pub type Icfempty1R = crate::BitReader; #[doc = "Field `ICFEMPTY2` reader - Input capture fifo empty"] -pub type ICFEMPTY2_R = crate::BitReader; -#[doc = "Field `CCPOL0` reader - Compare/Capture Polarity"] -pub type CCPOL0_R = crate::BitReader; +pub type Icfempty2R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL0_A { +pub enum Ccpol0 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL0_A) -> Self { + fn from(variant: Ccpol0) -> Self { variant as u8 != 0 } } -impl CCPOL0_R { +#[doc = "Field `CCPOL0` reader - Compare/Capture Polarity"] +pub type Ccpol0R = crate::BitReader; +impl Ccpol0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL0_A { + pub const fn variant(&self) -> Ccpol0 { match self.bits { - false => CCPOL0_A::LOWRISE, - true => CCPOL0_A::HIGHFALL, + false => Ccpol0::Lowrise, + true => Ccpol0::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL0_A::LOWRISE + *self == Ccpol0::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL0_A::HIGHFALL + *self == Ccpol0::Highfall } } -#[doc = "Field `CCPOL1` reader - Compare/Capture Polarity"] -pub type CCPOL1_R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL1_A { +pub enum Ccpol1 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL1_A) -> Self { + fn from(variant: Ccpol1) -> Self { variant as u8 != 0 } } -impl CCPOL1_R { +#[doc = "Field `CCPOL1` reader - Compare/Capture Polarity"] +pub type Ccpol1R = crate::BitReader; +impl Ccpol1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL1_A { + pub const fn variant(&self) -> Ccpol1 { match self.bits { - false => CCPOL1_A::LOWRISE, - true => CCPOL1_A::HIGHFALL, + false => Ccpol1::Lowrise, + true => Ccpol1::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL1_A::LOWRISE + *self == Ccpol1::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL1_A::HIGHFALL + *self == Ccpol1::Highfall } } -#[doc = "Field `CCPOL2` reader - Compare/Capture Polarity"] -pub type CCPOL2_R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL2_A { +pub enum Ccpol2 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL2_A) -> Self { + fn from(variant: Ccpol2) -> Self { variant as u8 != 0 } } -impl CCPOL2_R { +#[doc = "Field `CCPOL2` reader - Compare/Capture Polarity"] +pub type Ccpol2R = crate::BitReader; +impl Ccpol2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL2_A { + pub const fn variant(&self) -> Ccpol2 { match self.bits { - false => CCPOL2_A::LOWRISE, - true => CCPOL2_A::HIGHFALL, + false => Ccpol2::Lowrise, + true => Ccpol2::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL2_A::LOWRISE + *self == Ccpol2::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL2_A::HIGHFALL + *self == Ccpol2::Highfall } } impl R { #[doc = "Bit 0 - Running"] #[inline(always)] - pub fn running(&self) -> RUNNING_R { - RUNNING_R::new((self.bits & 1) != 0) + pub fn running(&self) -> RunningR { + RunningR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Direction"] #[inline(always)] - pub fn dir(&self) -> DIR_R { - DIR_R::new(((self.bits >> 1) & 1) != 0) + pub fn dir(&self) -> DirR { + DirR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - TOP Buffer Valid"] #[inline(always)] - pub fn topbv(&self) -> TOPBV_R { - TOPBV_R::new(((self.bits >> 2) & 1) != 0) + pub fn topbv(&self) -> TopbvR { + TopbvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Timer lock status"] #[inline(always)] - pub fn timerlockstatus(&self) -> TIMERLOCKSTATUS_R { - TIMERLOCKSTATUS_R::new(((self.bits >> 4) & 1) != 0) + pub fn timerlockstatus(&self) -> TimerlockstatusR { + TimerlockstatusR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DTI lock status"] #[inline(always)] - pub fn dtilockstatus(&self) -> DTILOCKSTATUS_R { - DTILOCKSTATUS_R::new(((self.bits >> 5) & 1) != 0) + pub fn dtilockstatus(&self) -> DtilockstatusR { + DtilockstatusR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Sync Busy"] #[inline(always)] - pub fn syncbusy(&self) -> SYNCBUSY_R { - SYNCBUSY_R::new(((self.bits >> 6) & 1) != 0) + pub fn syncbusy(&self) -> SyncbusyR { + SyncbusyR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv0(&self) -> OCBV0_R { - OCBV0_R::new(((self.bits >> 8) & 1) != 0) + pub fn ocbv0(&self) -> Ocbv0R { + Ocbv0R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv1(&self) -> OCBV1_R { - OCBV1_R::new(((self.bits >> 9) & 1) != 0) + pub fn ocbv1(&self) -> Ocbv1R { + Ocbv1R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv2(&self) -> OCBV2_R { - OCBV2_R::new(((self.bits >> 10) & 1) != 0) + pub fn ocbv2(&self) -> Ocbv2R { + Ocbv2R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 16 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty0(&self) -> ICFEMPTY0_R { - ICFEMPTY0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfempty0(&self) -> Icfempty0R { + Icfempty0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty1(&self) -> ICFEMPTY1_R { - ICFEMPTY1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfempty1(&self) -> Icfempty1R { + Icfempty1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty2(&self) -> ICFEMPTY2_R { - ICFEMPTY2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfempty2(&self) -> Icfempty2R { + Icfempty2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 24 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol0(&self) -> CCPOL0_R { - CCPOL0_R::new(((self.bits >> 24) & 1) != 0) + pub fn ccpol0(&self) -> Ccpol0R { + Ccpol0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol1(&self) -> CCPOL1_R { - CCPOL1_R::new(((self.bits >> 25) & 1) != 0) + pub fn ccpol1(&self) -> Ccpol1R { + Ccpol1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol2(&self) -> CCPOL2_R { - CCPOL2_R::new(((self.bits >> 26) & 1) != 0) + pub fn ccpol2(&self) -> Ccpol2R { + Ccpol2R::new(((self.bits >> 26) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/top.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/top.rs index 65df306..6799f48 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/top.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/top.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOP` reader - Counter Top Value"] -pub type TOP_R = crate::FieldReader; +pub type TopR = crate::FieldReader; #[doc = "Field `TOP` writer - Counter Top Value"] -pub type TOP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOP_SPEC, u16, u16, 16, O>; +pub type TopW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Top Value"] #[inline(always)] - pub fn top(&self) -> TOP_R { - TOP_R::new((self.bits & 0xffff) as u16) + pub fn top(&self) -> TopR { + TopR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Top Value"] #[inline(always)] #[must_use] - pub fn top(&mut self) -> TOP_W<0> { - TOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn top(&mut self) -> TopW { + TopW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [top](index.html) module"] -pub struct TOP_SPEC; -impl crate::RegisterSpec for TOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopSpec; +impl crate::RegisterSpec for TopSpec { type Ux = u32; } -#[doc = "`read()` method returns [top::R](R) reader structure"] -impl crate::Readable for TOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [top::W](W) writer structure"] -impl crate::Writable for TOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`top::R`](R) reader structure"] +impl crate::Readable for TopSpec {} +#[doc = "`write(|w| ..)` method takes [`top::W`](W) writer structure"] +impl crate::Writable for TopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOP to value 0xffff"] -impl crate::Resettable for TOP_SPEC { - const RESET_VALUE: Self::Ux = 0xffff; +impl crate::Resettable for TopSpec { + const RESET_VALUE: u32 = 0xffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/topb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/topb.rs index 012fd04..e6c7e8c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/topb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer2_s/topb.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOPB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOPB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOPB` reader - Counter Top Buffer Register"] -pub type TOPB_R = crate::FieldReader; +pub type TopbR = crate::FieldReader; #[doc = "Field `TOPB` writer - Counter Top Buffer Register"] -pub type TOPB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOPB_SPEC, u16, u16, 16, O>; +pub type TopbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Top Buffer Register"] #[inline(always)] - pub fn topb(&self) -> TOPB_R { - TOPB_R::new((self.bits & 0xffff) as u16) + pub fn topb(&self) -> TopbR { + TopbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Top Buffer Register"] #[inline(always)] #[must_use] - pub fn topb(&mut self) -> TOPB_W<0> { - TOPB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn topb(&mut self) -> TopbW { + TopbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [topb](index.html) module"] -pub struct TOPB_SPEC; -impl crate::RegisterSpec for TOPB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopbSpec; +impl crate::RegisterSpec for TopbSpec { type Ux = u32; } -#[doc = "`read()` method returns [topb::R](R) reader structure"] -impl crate::Readable for TOPB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [topb::W](W) writer structure"] -impl crate::Writable for TOPB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`topb::R`](R) reader structure"] +impl crate::Readable for TopbSpec {} +#[doc = "`write(|w| ..)` method takes [`topb::W`](W) writer structure"] +impl crate::Writable for TopbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOPB to value 0"] -impl crate::Resettable for TOPB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TopbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns.rs index 50b1dd4..e4e8a9b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns.rs @@ -1,240 +1,470 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + cfg: Cfg, + ctrl: Ctrl, + cmd: Cmd, + status: Status, + if_: If, + ien: Ien, + top: Top, + topb: Topb, + cnt: Cnt, + _reserved10: [u8; 0x04], + lock: Lock, + en: En, + _reserved12: [u8; 0x2c], + cc0_cfg: Cc0Cfg, + cc0_ctrl: Cc0Ctrl, + cc0_oc: Cc0Oc, + _reserved15: [u8; 0x04], + cc0_ocb: Cc0Ocb, + cc0_icf: Cc0Icf, + cc0_icof: Cc0Icof, + _reserved18: [u8; 0x04], + cc1_cfg: Cc1Cfg, + cc1_ctrl: Cc1Ctrl, + cc1_oc: Cc1Oc, + _reserved21: [u8; 0x04], + cc1_ocb: Cc1Ocb, + cc1_icf: Cc1Icf, + cc1_icof: Cc1Icof, + _reserved24: [u8; 0x04], + cc2_cfg: Cc2Cfg, + cc2_ctrl: Cc2Ctrl, + cc2_oc: Cc2Oc, + _reserved27: [u8; 0x04], + cc2_ocb: Cc2Ocb, + cc2_icf: Cc2Icf, + cc2_icof: Cc2Icof, + _reserved30: [u8; 0x24], + dtcfg: Dtcfg, + dttimecfg: Dttimecfg, + dtfcfg: Dtfcfg, + dtctrl: Dtctrl, + dtogen: Dtogen, + dtfault: Dtfault, + dtfaultc: Dtfaultc, + dtlock: Dtlock, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x08 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x0c - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x10 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x14 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x18 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x1c - No Description"] - pub top: TOP, + #[inline(always)] + pub const fn top(&self) -> &Top { + &self.top + } #[doc = "0x20 - No Description"] - pub topb: TOPB, + #[inline(always)] + pub const fn topb(&self) -> &Topb { + &self.topb + } #[doc = "0x24 - No Description"] - pub cnt: CNT, - _reserved10: [u8; 0x04], + #[inline(always)] + pub const fn cnt(&self) -> &Cnt { + &self.cnt + } #[doc = "0x2c - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x30 - No Description"] - pub en: EN, - _reserved12: [u8; 0x2c], + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x60 - No Description"] - pub cc0_cfg: CC0_CFG, + #[inline(always)] + pub const fn cc0_cfg(&self) -> &Cc0Cfg { + &self.cc0_cfg + } #[doc = "0x64 - No Description"] - pub cc0_ctrl: CC0_CTRL, + #[inline(always)] + pub const fn cc0_ctrl(&self) -> &Cc0Ctrl { + &self.cc0_ctrl + } #[doc = "0x68 - No Description"] - pub cc0_oc: CC0_OC, - _reserved15: [u8; 0x04], + #[inline(always)] + pub const fn cc0_oc(&self) -> &Cc0Oc { + &self.cc0_oc + } #[doc = "0x70 - No Description"] - pub cc0_ocb: CC0_OCB, + #[inline(always)] + pub const fn cc0_ocb(&self) -> &Cc0Ocb { + &self.cc0_ocb + } #[doc = "0x74 - No Description"] - pub cc0_icf: CC0_ICF, + #[inline(always)] + pub const fn cc0_icf(&self) -> &Cc0Icf { + &self.cc0_icf + } #[doc = "0x78 - No Description"] - pub cc0_icof: CC0_ICOF, - _reserved18: [u8; 0x04], + #[inline(always)] + pub const fn cc0_icof(&self) -> &Cc0Icof { + &self.cc0_icof + } #[doc = "0x80 - No Description"] - pub cc1_cfg: CC1_CFG, + #[inline(always)] + pub const fn cc1_cfg(&self) -> &Cc1Cfg { + &self.cc1_cfg + } #[doc = "0x84 - No Description"] - pub cc1_ctrl: CC1_CTRL, + #[inline(always)] + pub const fn cc1_ctrl(&self) -> &Cc1Ctrl { + &self.cc1_ctrl + } #[doc = "0x88 - No Description"] - pub cc1_oc: CC1_OC, - _reserved21: [u8; 0x04], + #[inline(always)] + pub const fn cc1_oc(&self) -> &Cc1Oc { + &self.cc1_oc + } #[doc = "0x90 - No Description"] - pub cc1_ocb: CC1_OCB, + #[inline(always)] + pub const fn cc1_ocb(&self) -> &Cc1Ocb { + &self.cc1_ocb + } #[doc = "0x94 - No Description"] - pub cc1_icf: CC1_ICF, + #[inline(always)] + pub const fn cc1_icf(&self) -> &Cc1Icf { + &self.cc1_icf + } #[doc = "0x98 - No Description"] - pub cc1_icof: CC1_ICOF, - _reserved24: [u8; 0x04], + #[inline(always)] + pub const fn cc1_icof(&self) -> &Cc1Icof { + &self.cc1_icof + } #[doc = "0xa0 - No Description"] - pub cc2_cfg: CC2_CFG, + #[inline(always)] + pub const fn cc2_cfg(&self) -> &Cc2Cfg { + &self.cc2_cfg + } #[doc = "0xa4 - No Description"] - pub cc2_ctrl: CC2_CTRL, + #[inline(always)] + pub const fn cc2_ctrl(&self) -> &Cc2Ctrl { + &self.cc2_ctrl + } #[doc = "0xa8 - No Description"] - pub cc2_oc: CC2_OC, - _reserved27: [u8; 0x04], + #[inline(always)] + pub const fn cc2_oc(&self) -> &Cc2Oc { + &self.cc2_oc + } #[doc = "0xb0 - No Description"] - pub cc2_ocb: CC2_OCB, + #[inline(always)] + pub const fn cc2_ocb(&self) -> &Cc2Ocb { + &self.cc2_ocb + } #[doc = "0xb4 - No Description"] - pub cc2_icf: CC2_ICF, + #[inline(always)] + pub const fn cc2_icf(&self) -> &Cc2Icf { + &self.cc2_icf + } #[doc = "0xb8 - No Description"] - pub cc2_icof: CC2_ICOF, - _reserved30: [u8; 0x24], + #[inline(always)] + pub const fn cc2_icof(&self) -> &Cc2Icof { + &self.cc2_icof + } #[doc = "0xe0 - No Description"] - pub dtcfg: DTCFG, + #[inline(always)] + pub const fn dtcfg(&self) -> &Dtcfg { + &self.dtcfg + } #[doc = "0xe4 - No Description"] - pub dttimecfg: DTTIMECFG, + #[inline(always)] + pub const fn dttimecfg(&self) -> &Dttimecfg { + &self.dttimecfg + } #[doc = "0xe8 - No Description"] - pub dtfcfg: DTFCFG, + #[inline(always)] + pub const fn dtfcfg(&self) -> &Dtfcfg { + &self.dtfcfg + } #[doc = "0xec - No Description"] - pub dtctrl: DTCTRL, + #[inline(always)] + pub const fn dtctrl(&self) -> &Dtctrl { + &self.dtctrl + } #[doc = "0xf0 - No Description"] - pub dtogen: DTOGEN, + #[inline(always)] + pub const fn dtogen(&self) -> &Dtogen { + &self.dtogen + } #[doc = "0xf4 - No Description"] - pub dtfault: DTFAULT, + #[inline(always)] + pub const fn dtfault(&self) -> &Dtfault { + &self.dtfault + } #[doc = "0xf8 - No Description"] - pub dtfaultc: DTFAULTC, + #[inline(always)] + pub const fn dtfaultc(&self) -> &Dtfaultc { + &self.dtfaultc + } #[doc = "0xfc - No Description"] - pub dtlock: DTLOCK, + #[inline(always)] + pub const fn dtlock(&self) -> &Dtlock { + &self.dtlock + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "TOP (rw) register accessor: an alias for `Reg`"] -pub type TOP = crate::Reg; +#[doc = "TOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@top`] +module"] +#[doc(alias = "TOP")] +pub type Top = crate::Reg; #[doc = "No Description"] pub mod top; -#[doc = "TOPB (rw) register accessor: an alias for `Reg`"] -pub type TOPB = crate::Reg; +#[doc = "TOPB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@topb`] +module"] +#[doc(alias = "TOPB")] +pub type Topb = crate::Reg; #[doc = "No Description"] pub mod topb; -#[doc = "CNT (rw) register accessor: an alias for `Reg`"] -pub type CNT = crate::Reg; +#[doc = "CNT (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnt`] +module"] +#[doc(alias = "CNT")] +pub type Cnt = crate::Reg; #[doc = "No Description"] pub mod cnt; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CC0_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC0_CFG = crate::Reg; +#[doc = "CC0_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_cfg`] +module"] +#[doc(alias = "CC0_CFG")] +pub type Cc0Cfg = crate::Reg; #[doc = "No Description"] pub mod cc0_cfg; -#[doc = "CC0_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC0_CTRL = crate::Reg; +#[doc = "CC0_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_ctrl`] +module"] +#[doc(alias = "CC0_CTRL")] +pub type Cc0Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc0_ctrl; -#[doc = "CC0_OC (rw) register accessor: an alias for `Reg`"] -pub type CC0_OC = crate::Reg; +#[doc = "CC0_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_oc`] +module"] +#[doc(alias = "CC0_OC")] +pub type Cc0Oc = crate::Reg; #[doc = "No Description"] pub mod cc0_oc; -#[doc = "CC0_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC0_OCB = crate::Reg; +#[doc = "CC0_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_ocb`] +module"] +#[doc(alias = "CC0_OCB")] +pub type Cc0Ocb = crate::Reg; #[doc = "No Description"] pub mod cc0_ocb; -#[doc = "CC0_ICF (r) register accessor: an alias for `Reg`"] -pub type CC0_ICF = crate::Reg; +#[doc = "CC0_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_icf`] +module"] +#[doc(alias = "CC0_ICF")] +pub type Cc0Icf = crate::Reg; #[doc = "No Description"] pub mod cc0_icf; -#[doc = "CC0_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC0_ICOF = crate::Reg; +#[doc = "CC0_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_icof`] +module"] +#[doc(alias = "CC0_ICOF")] +pub type Cc0Icof = crate::Reg; #[doc = "No Description"] pub mod cc0_icof; -#[doc = "CC1_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC1_CFG = crate::Reg; +#[doc = "CC1_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_cfg`] +module"] +#[doc(alias = "CC1_CFG")] +pub type Cc1Cfg = crate::Reg; #[doc = "No Description"] pub mod cc1_cfg; -#[doc = "CC1_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC1_CTRL = crate::Reg; +#[doc = "CC1_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_ctrl`] +module"] +#[doc(alias = "CC1_CTRL")] +pub type Cc1Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc1_ctrl; -#[doc = "CC1_OC (rw) register accessor: an alias for `Reg`"] -pub type CC1_OC = crate::Reg; +#[doc = "CC1_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_oc`] +module"] +#[doc(alias = "CC1_OC")] +pub type Cc1Oc = crate::Reg; #[doc = "No Description"] pub mod cc1_oc; -#[doc = "CC1_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC1_OCB = crate::Reg; +#[doc = "CC1_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_ocb`] +module"] +#[doc(alias = "CC1_OCB")] +pub type Cc1Ocb = crate::Reg; #[doc = "No Description"] pub mod cc1_ocb; -#[doc = "CC1_ICF (r) register accessor: an alias for `Reg`"] -pub type CC1_ICF = crate::Reg; +#[doc = "CC1_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_icf`] +module"] +#[doc(alias = "CC1_ICF")] +pub type Cc1Icf = crate::Reg; #[doc = "No Description"] pub mod cc1_icf; -#[doc = "CC1_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC1_ICOF = crate::Reg; +#[doc = "CC1_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_icof`] +module"] +#[doc(alias = "CC1_ICOF")] +pub type Cc1Icof = crate::Reg; #[doc = "No Description"] pub mod cc1_icof; -#[doc = "CC2_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC2_CFG = crate::Reg; +#[doc = "CC2_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_cfg`] +module"] +#[doc(alias = "CC2_CFG")] +pub type Cc2Cfg = crate::Reg; #[doc = "No Description"] pub mod cc2_cfg; -#[doc = "CC2_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC2_CTRL = crate::Reg; +#[doc = "CC2_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_ctrl`] +module"] +#[doc(alias = "CC2_CTRL")] +pub type Cc2Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc2_ctrl; -#[doc = "CC2_OC (rw) register accessor: an alias for `Reg`"] -pub type CC2_OC = crate::Reg; +#[doc = "CC2_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_oc`] +module"] +#[doc(alias = "CC2_OC")] +pub type Cc2Oc = crate::Reg; #[doc = "No Description"] pub mod cc2_oc; -#[doc = "CC2_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC2_OCB = crate::Reg; +#[doc = "CC2_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_ocb`] +module"] +#[doc(alias = "CC2_OCB")] +pub type Cc2Ocb = crate::Reg; #[doc = "No Description"] pub mod cc2_ocb; -#[doc = "CC2_ICF (r) register accessor: an alias for `Reg`"] -pub type CC2_ICF = crate::Reg; +#[doc = "CC2_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_icf`] +module"] +#[doc(alias = "CC2_ICF")] +pub type Cc2Icf = crate::Reg; #[doc = "No Description"] pub mod cc2_icf; -#[doc = "CC2_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC2_ICOF = crate::Reg; +#[doc = "CC2_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_icof`] +module"] +#[doc(alias = "CC2_ICOF")] +pub type Cc2Icof = crate::Reg; #[doc = "No Description"] pub mod cc2_icof; -#[doc = "DTCFG (rw) register accessor: an alias for `Reg`"] -pub type DTCFG = crate::Reg; +#[doc = "DTCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtcfg`] +module"] +#[doc(alias = "DTCFG")] +pub type Dtcfg = crate::Reg; #[doc = "No Description"] pub mod dtcfg; -#[doc = "DTTIMECFG (rw) register accessor: an alias for `Reg`"] -pub type DTTIMECFG = crate::Reg; +#[doc = "DTTIMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dttimecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dttimecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dttimecfg`] +module"] +#[doc(alias = "DTTIMECFG")] +pub type Dttimecfg = crate::Reg; #[doc = "No Description"] pub mod dttimecfg; -#[doc = "DTFCFG (rw) register accessor: an alias for `Reg`"] -pub type DTFCFG = crate::Reg; +#[doc = "DTFCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfcfg`] +module"] +#[doc(alias = "DTFCFG")] +pub type Dtfcfg = crate::Reg; #[doc = "No Description"] pub mod dtfcfg; -#[doc = "DTCTRL (rw) register accessor: an alias for `Reg`"] -pub type DTCTRL = crate::Reg; +#[doc = "DTCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtctrl`] +module"] +#[doc(alias = "DTCTRL")] +pub type Dtctrl = crate::Reg; #[doc = "No Description"] pub mod dtctrl; -#[doc = "DTOGEN (rw) register accessor: an alias for `Reg`"] -pub type DTOGEN = crate::Reg; +#[doc = "DTOGEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtogen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtogen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtogen`] +module"] +#[doc(alias = "DTOGEN")] +pub type Dtogen = crate::Reg; #[doc = "No Description"] pub mod dtogen; -#[doc = "DTFAULT (r) register accessor: an alias for `Reg`"] -pub type DTFAULT = crate::Reg; +#[doc = "DTFAULT (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfault::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfault`] +module"] +#[doc(alias = "DTFAULT")] +pub type Dtfault = crate::Reg; #[doc = "No Description"] pub mod dtfault; -#[doc = "DTFAULTC (w) register accessor: an alias for `Reg`"] -pub type DTFAULTC = crate::Reg; +#[doc = "DTFAULTC (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfaultc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfaultc`] +module"] +#[doc(alias = "DTFAULTC")] +pub type Dtfaultc = crate::Reg; #[doc = "No Description"] pub mod dtfaultc; -#[doc = "DTLOCK (w) register accessor: an alias for `Reg`"] -pub type DTLOCK = crate::Reg; +#[doc = "DTLOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtlock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtlock`] +module"] +#[doc(alias = "DTLOCK")] +pub type Dtlock = crate::Reg; #[doc = "No Description"] pub mod dtlock; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc0_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc0_cfg.rs index 547eeb0..b3aac62 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc0_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc0_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC0_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC0_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_cfg](index.html) module"] -pub struct CC0_CFG_SPEC; -impl crate::RegisterSpec for CC0_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0CfgSpec; +impl crate::RegisterSpec for Cc0CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_cfg::R](R) reader structure"] -impl crate::Readable for CC0_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_cfg::W](W) writer structure"] -impl crate::Writable for CC0_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_cfg::R`](R) reader structure"] +impl crate::Readable for Cc0CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_cfg::W`](W) writer structure"] +impl crate::Writable for Cc0CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_CFG to value 0"] -impl crate::Resettable for CC0_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc0_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc0_ctrl.rs index 71b40e4..1b92d0c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc0_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc0_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC0_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_ctrl](index.html) module"] -pub struct CC0_CTRL_SPEC; -impl crate::RegisterSpec for CC0_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0CtrlSpec; +impl crate::RegisterSpec for Cc0CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_ctrl::R](R) reader structure"] -impl crate::Readable for CC0_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_ctrl::W](W) writer structure"] -impl crate::Writable for CC0_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc0CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc0CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_CTRL to value 0"] -impl crate::Resettable for CC0_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc0_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc0_icf.rs index f4a2c64..6afddea 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc0_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc0_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC0_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new((self.bits & 0xffff) as u16) + pub fn icf(&self) -> IcfR { + IcfR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_icf](index.html) module"] -pub struct CC0_ICF_SPEC; -impl crate::RegisterSpec for CC0_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0IcfSpec; +impl crate::RegisterSpec for Cc0IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_icf::R](R) reader structure"] -impl crate::Readable for CC0_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc0_icf::R`](R) reader structure"] +impl crate::Readable for Cc0IcfSpec {} #[doc = "`reset()` method sets CC0_ICF to value 0"] -impl crate::Resettable for CC0_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc0_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc0_icof.rs index 1ea3983..7653eef 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc0_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc0_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC0_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new((self.bits & 0xffff) as u16) + pub fn icof(&self) -> IcofR { + IcofR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_icof](index.html) module"] -pub struct CC0_ICOF_SPEC; -impl crate::RegisterSpec for CC0_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0IcofSpec; +impl crate::RegisterSpec for Cc0IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_icof::R](R) reader structure"] -impl crate::Readable for CC0_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc0_icof::R`](R) reader structure"] +impl crate::Readable for Cc0IcofSpec {} #[doc = "`reset()` method sets CC0_ICOF to value 0"] -impl crate::Resettable for CC0_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc0_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc0_oc.rs index 97be8b2..c063d52 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc0_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc0_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC0_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC0_OC_SPEC, u16, u16, 16, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new((self.bits & 0xffff) as u16) + pub fn oc(&self) -> OcR { + OcR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_oc](index.html) module"] -pub struct CC0_OC_SPEC; -impl crate::RegisterSpec for CC0_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0OcSpec; +impl crate::RegisterSpec for Cc0OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_oc::R](R) reader structure"] -impl crate::Readable for CC0_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_oc::W](W) writer structure"] -impl crate::Writable for CC0_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_oc::R`](R) reader structure"] +impl crate::Readable for Cc0OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_oc::W`](W) writer structure"] +impl crate::Writable for Cc0OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_OC to value 0"] -impl crate::Resettable for CC0_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc0_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc0_ocb.rs index af4e401..5924ded 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc0_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc0_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC0_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC0_OCB_SPEC, u16, u16, 16, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new((self.bits & 0xffff) as u16) + pub fn ocb(&self) -> OcbR { + OcbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_ocb](index.html) module"] -pub struct CC0_OCB_SPEC; -impl crate::RegisterSpec for CC0_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0OcbSpec; +impl crate::RegisterSpec for Cc0OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_ocb::R](R) reader structure"] -impl crate::Readable for CC0_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_ocb::W](W) writer structure"] -impl crate::Writable for CC0_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_ocb::R`](R) reader structure"] +impl crate::Readable for Cc0OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_ocb::W`](W) writer structure"] +impl crate::Writable for Cc0OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_OCB to value 0"] -impl crate::Resettable for CC0_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc1_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc1_cfg.rs index b3424c2..2243932 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc1_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc1_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC1_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC1_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_cfg](index.html) module"] -pub struct CC1_CFG_SPEC; -impl crate::RegisterSpec for CC1_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1CfgSpec; +impl crate::RegisterSpec for Cc1CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_cfg::R](R) reader structure"] -impl crate::Readable for CC1_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_cfg::W](W) writer structure"] -impl crate::Writable for CC1_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_cfg::R`](R) reader structure"] +impl crate::Readable for Cc1CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_cfg::W`](W) writer structure"] +impl crate::Writable for Cc1CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_CFG to value 0"] -impl crate::Resettable for CC1_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc1_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc1_ctrl.rs index 38927de..bc41282 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc1_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc1_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC1_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_ctrl](index.html) module"] -pub struct CC1_CTRL_SPEC; -impl crate::RegisterSpec for CC1_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1CtrlSpec; +impl crate::RegisterSpec for Cc1CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_ctrl::R](R) reader structure"] -impl crate::Readable for CC1_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_ctrl::W](W) writer structure"] -impl crate::Writable for CC1_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc1CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc1CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_CTRL to value 0"] -impl crate::Resettable for CC1_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc1_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc1_icf.rs index 1a7d7e8..0211b78 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc1_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc1_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC1_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new((self.bits & 0xffff) as u16) + pub fn icf(&self) -> IcfR { + IcfR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_icf](index.html) module"] -pub struct CC1_ICF_SPEC; -impl crate::RegisterSpec for CC1_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1IcfSpec; +impl crate::RegisterSpec for Cc1IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_icf::R](R) reader structure"] -impl crate::Readable for CC1_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc1_icf::R`](R) reader structure"] +impl crate::Readable for Cc1IcfSpec {} #[doc = "`reset()` method sets CC1_ICF to value 0"] -impl crate::Resettable for CC1_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc1_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc1_icof.rs index ea46e53..3fd845d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc1_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc1_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC1_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new((self.bits & 0xffff) as u16) + pub fn icof(&self) -> IcofR { + IcofR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_icof](index.html) module"] -pub struct CC1_ICOF_SPEC; -impl crate::RegisterSpec for CC1_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1IcofSpec; +impl crate::RegisterSpec for Cc1IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_icof::R](R) reader structure"] -impl crate::Readable for CC1_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc1_icof::R`](R) reader structure"] +impl crate::Readable for Cc1IcofSpec {} #[doc = "`reset()` method sets CC1_ICOF to value 0"] -impl crate::Resettable for CC1_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc1_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc1_oc.rs index 9f40c62..5b2e10b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc1_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc1_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC1_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC1_OC_SPEC, u16, u16, 16, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new((self.bits & 0xffff) as u16) + pub fn oc(&self) -> OcR { + OcR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_oc](index.html) module"] -pub struct CC1_OC_SPEC; -impl crate::RegisterSpec for CC1_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1OcSpec; +impl crate::RegisterSpec for Cc1OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_oc::R](R) reader structure"] -impl crate::Readable for CC1_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_oc::W](W) writer structure"] -impl crate::Writable for CC1_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_oc::R`](R) reader structure"] +impl crate::Readable for Cc1OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_oc::W`](W) writer structure"] +impl crate::Writable for Cc1OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_OC to value 0"] -impl crate::Resettable for CC1_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc1_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc1_ocb.rs index d3c8d9a..7d9f88b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc1_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc1_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC1_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC1_OCB_SPEC, u16, u16, 16, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new((self.bits & 0xffff) as u16) + pub fn ocb(&self) -> OcbR { + OcbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_ocb](index.html) module"] -pub struct CC1_OCB_SPEC; -impl crate::RegisterSpec for CC1_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1OcbSpec; +impl crate::RegisterSpec for Cc1OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_ocb::R](R) reader structure"] -impl crate::Readable for CC1_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_ocb::W](W) writer structure"] -impl crate::Writable for CC1_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_ocb::R`](R) reader structure"] +impl crate::Readable for Cc1OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_ocb::W`](W) writer structure"] +impl crate::Writable for Cc1OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_OCB to value 0"] -impl crate::Resettable for CC1_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc2_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc2_cfg.rs index 6b108e5..97bec45 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc2_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc2_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC2_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC2_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_cfg](index.html) module"] -pub struct CC2_CFG_SPEC; -impl crate::RegisterSpec for CC2_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2CfgSpec; +impl crate::RegisterSpec for Cc2CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_cfg::R](R) reader structure"] -impl crate::Readable for CC2_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_cfg::W](W) writer structure"] -impl crate::Writable for CC2_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_cfg::R`](R) reader structure"] +impl crate::Readable for Cc2CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_cfg::W`](W) writer structure"] +impl crate::Writable for Cc2CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_CFG to value 0"] -impl crate::Resettable for CC2_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc2_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc2_ctrl.rs index b42d120..317952a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc2_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc2_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC2_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_ctrl](index.html) module"] -pub struct CC2_CTRL_SPEC; -impl crate::RegisterSpec for CC2_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2CtrlSpec; +impl crate::RegisterSpec for Cc2CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_ctrl::R](R) reader structure"] -impl crate::Readable for CC2_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_ctrl::W](W) writer structure"] -impl crate::Writable for CC2_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc2CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc2CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_CTRL to value 0"] -impl crate::Resettable for CC2_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc2_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc2_icf.rs index 8282700..c1a0823 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc2_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc2_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC2_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new((self.bits & 0xffff) as u16) + pub fn icf(&self) -> IcfR { + IcfR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_icf](index.html) module"] -pub struct CC2_ICF_SPEC; -impl crate::RegisterSpec for CC2_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2IcfSpec; +impl crate::RegisterSpec for Cc2IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_icf::R](R) reader structure"] -impl crate::Readable for CC2_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc2_icf::R`](R) reader structure"] +impl crate::Readable for Cc2IcfSpec {} #[doc = "`reset()` method sets CC2_ICF to value 0"] -impl crate::Resettable for CC2_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc2_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc2_icof.rs index c21d7d3..0d399d1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc2_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc2_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC2_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new((self.bits & 0xffff) as u16) + pub fn icof(&self) -> IcofR { + IcofR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_icof](index.html) module"] -pub struct CC2_ICOF_SPEC; -impl crate::RegisterSpec for CC2_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2IcofSpec; +impl crate::RegisterSpec for Cc2IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_icof::R](R) reader structure"] -impl crate::Readable for CC2_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc2_icof::R`](R) reader structure"] +impl crate::Readable for Cc2IcofSpec {} #[doc = "`reset()` method sets CC2_ICOF to value 0"] -impl crate::Resettable for CC2_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc2_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc2_oc.rs index da9cc47..935617c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc2_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc2_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC2_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC2_OC_SPEC, u16, u16, 16, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new((self.bits & 0xffff) as u16) + pub fn oc(&self) -> OcR { + OcR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_oc](index.html) module"] -pub struct CC2_OC_SPEC; -impl crate::RegisterSpec for CC2_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2OcSpec; +impl crate::RegisterSpec for Cc2OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_oc::R](R) reader structure"] -impl crate::Readable for CC2_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_oc::W](W) writer structure"] -impl crate::Writable for CC2_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_oc::R`](R) reader structure"] +impl crate::Readable for Cc2OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_oc::W`](W) writer structure"] +impl crate::Writable for Cc2OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_OC to value 0"] -impl crate::Resettable for CC2_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc2_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc2_ocb.rs index 1ab93d6..ee6c4e5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc2_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cc2_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC2_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC2_OCB_SPEC, u16, u16, 16, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new((self.bits & 0xffff) as u16) + pub fn ocb(&self) -> OcbR { + OcbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_ocb](index.html) module"] -pub struct CC2_OCB_SPEC; -impl crate::RegisterSpec for CC2_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2OcbSpec; +impl crate::RegisterSpec for Cc2OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_ocb::R](R) reader structure"] -impl crate::Readable for CC2_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_ocb::W](W) writer structure"] -impl crate::Writable for CC2_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_ocb::R`](R) reader structure"] +impl crate::Readable for Cc2OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_ocb::W`](W) writer structure"] +impl crate::Writable for Cc2OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_OCB to value 0"] -impl crate::Resettable for CC2_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cfg.rs index ea2a1e1..b4cc2fd 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cfg.rs @@ -1,775 +1,774 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - Timer Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Timer Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Up-count mode"] - UP = 0, + Up = 0, #[doc = "1: Down-count mode"] - DOWN = 1, + Down = 1, #[doc = "2: Up/down-count mode"] - UPDOWN = 2, + Updown = 2, #[doc = "3: Quadrature decoder mode"] - QDEC = 3, + Qdec = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - Timer Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::UP, - 1 => MODE_A::DOWN, - 2 => MODE_A::UPDOWN, - 3 => MODE_A::QDEC, + 0 => Mode::Up, + 1 => Mode::Down, + 2 => Mode::Updown, + 3 => Mode::Qdec, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Up-count mode"] #[inline(always)] pub fn is_up(&self) -> bool { - *self == MODE_A::UP + *self == Mode::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Down-count mode"] #[inline(always)] pub fn is_down(&self) -> bool { - *self == MODE_A::DOWN + *self == Mode::Down } - #[doc = "Checks if the value of the field is `UPDOWN`"] + #[doc = "Up/down-count mode"] #[inline(always)] pub fn is_updown(&self) -> bool { - *self == MODE_A::UPDOWN + *self == Mode::Updown } - #[doc = "Checks if the value of the field is `QDEC`"] + #[doc = "Quadrature decoder mode"] #[inline(always)] pub fn is_qdec(&self) -> bool { - *self == MODE_A::QDEC + *self == Mode::Qdec } } #[doc = "Field `MODE` writer - Timer Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Up-count mode"] #[inline(always)] - pub fn up(self) -> &'a mut W { - self.variant(MODE_A::UP) + pub fn up(self) -> &'a mut crate::W { + self.variant(Mode::Up) } #[doc = "Down-count mode"] #[inline(always)] - pub fn down(self) -> &'a mut W { - self.variant(MODE_A::DOWN) + pub fn down(self) -> &'a mut crate::W { + self.variant(Mode::Down) } #[doc = "Up/down-count mode"] #[inline(always)] - pub fn updown(self) -> &'a mut W { - self.variant(MODE_A::UPDOWN) + pub fn updown(self) -> &'a mut crate::W { + self.variant(Mode::Updown) } #[doc = "Quadrature decoder mode"] #[inline(always)] - pub fn qdec(self) -> &'a mut W { - self.variant(MODE_A::QDEC) + pub fn qdec(self) -> &'a mut crate::W { + self.variant(Mode::Qdec) } } -#[doc = "Field `SYNC` reader - Timer Start/Stop/Reload Synchronization"] -pub type SYNC_R = crate::BitReader; #[doc = "Timer Start/Stop/Reload Synchronization\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYNC_A { +pub enum Sync { #[doc = "0: Timer operation is unaffected by other timers."] - DISABLE = 0, + Disable = 0, #[doc = "1: Timer may be started, stopped and re-loaded from other timer instances."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYNC_A) -> Self { + fn from(variant: Sync) -> Self { variant as u8 != 0 } } -impl SYNC_R { +#[doc = "Field `SYNC` reader - Timer Start/Stop/Reload Synchronization"] +pub type SyncR = crate::BitReader; +impl SyncR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SYNC_A { + pub const fn variant(&self) -> Sync { match self.bits { - false => SYNC_A::DISABLE, - true => SYNC_A::ENABLE, + false => Sync::Disable, + true => Sync::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Timer operation is unaffected by other timers."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == SYNC_A::DISABLE + *self == Sync::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Timer may be started, stopped and re-loaded from other timer instances."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == SYNC_A::ENABLE + *self == Sync::Enable } } #[doc = "Field `SYNC` writer - Timer Start/Stop/Reload Synchronization"] -pub type SYNC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, SYNC_A, O>; -impl<'a, const O: u8> SYNC_W<'a, O> { +pub type SyncW<'a, REG> = crate::BitWriter<'a, REG, Sync>; +impl<'a, REG> SyncW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer operation is unaffected by other timers."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(SYNC_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Sync::Disable) } #[doc = "Timer may be started, stopped and re-loaded from other timer instances."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(SYNC_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Sync::Enable) } } #[doc = "Field `OSMEN` reader - One-shot Mode Enable"] -pub type OSMEN_R = crate::BitReader; +pub type OsmenR = crate::BitReader; #[doc = "Field `OSMEN` writer - One-shot Mode Enable"] -pub type OSMEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `QDM` reader - Quadrature Decoder Mode Selection"] -pub type QDM_R = crate::BitReader; +pub type OsmenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Quadrature Decoder Mode Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum QDM_A { +pub enum Qdm { #[doc = "0: X2 mode selected"] X2 = 0, #[doc = "1: X4 mode selected"] X4 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: QDM_A) -> Self { + fn from(variant: Qdm) -> Self { variant as u8 != 0 } } -impl QDM_R { +#[doc = "Field `QDM` reader - Quadrature Decoder Mode Selection"] +pub type QdmR = crate::BitReader; +impl QdmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> QDM_A { + pub const fn variant(&self) -> Qdm { match self.bits { - false => QDM_A::X2, - true => QDM_A::X4, + false => Qdm::X2, + true => Qdm::X4, } } - #[doc = "Checks if the value of the field is `X2`"] + #[doc = "X2 mode selected"] #[inline(always)] pub fn is_x2(&self) -> bool { - *self == QDM_A::X2 + *self == Qdm::X2 } - #[doc = "Checks if the value of the field is `X4`"] + #[doc = "X4 mode selected"] #[inline(always)] pub fn is_x4(&self) -> bool { - *self == QDM_A::X4 + *self == Qdm::X4 } } #[doc = "Field `QDM` writer - Quadrature Decoder Mode Selection"] -pub type QDM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, QDM_A, O>; -impl<'a, const O: u8> QDM_W<'a, O> { +pub type QdmW<'a, REG> = crate::BitWriter<'a, REG, Qdm>; +impl<'a, REG> QdmW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "X2 mode selected"] #[inline(always)] - pub fn x2(self) -> &'a mut W { - self.variant(QDM_A::X2) + pub fn x2(self) -> &'a mut crate::W { + self.variant(Qdm::X2) } #[doc = "X4 mode selected"] #[inline(always)] - pub fn x4(self) -> &'a mut W { - self.variant(QDM_A::X4) + pub fn x4(self) -> &'a mut crate::W { + self.variant(Qdm::X4) } } -#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] -pub type DEBUGRUN_R = crate::BitReader; #[doc = "Debug Mode Run Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DEBUGRUN_A { +pub enum Debugrun { #[doc = "0: Timer is halted in debug mode"] - HALT = 0, + Halt = 0, #[doc = "1: Timer is running in debug mode"] - RUN = 1, + Run = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DEBUGRUN_A) -> Self { + fn from(variant: Debugrun) -> Self { variant as u8 != 0 } } -impl DEBUGRUN_R { +#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] +pub type DebugrunR = crate::BitReader; +impl DebugrunR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DEBUGRUN_A { + pub const fn variant(&self) -> Debugrun { match self.bits { - false => DEBUGRUN_A::HALT, - true => DEBUGRUN_A::RUN, + false => Debugrun::Halt, + true => Debugrun::Run, } } - #[doc = "Checks if the value of the field is `HALT`"] + #[doc = "Timer is halted in debug mode"] #[inline(always)] pub fn is_halt(&self) -> bool { - *self == DEBUGRUN_A::HALT + *self == Debugrun::Halt } - #[doc = "Checks if the value of the field is `RUN`"] + #[doc = "Timer is running in debug mode"] #[inline(always)] pub fn is_run(&self) -> bool { - *self == DEBUGRUN_A::RUN + *self == Debugrun::Run } } #[doc = "Field `DEBUGRUN` writer - Debug Mode Run Enable"] -pub type DEBUGRUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DEBUGRUN_A, O>; -impl<'a, const O: u8> DEBUGRUN_W<'a, O> { +pub type DebugrunW<'a, REG> = crate::BitWriter<'a, REG, Debugrun>; +impl<'a, REG> DebugrunW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer is halted in debug mode"] #[inline(always)] - pub fn halt(self) -> &'a mut W { - self.variant(DEBUGRUN_A::HALT) + pub fn halt(self) -> &'a mut crate::W { + self.variant(Debugrun::Halt) } #[doc = "Timer is running in debug mode"] #[inline(always)] - pub fn run(self) -> &'a mut W { - self.variant(DEBUGRUN_A::RUN) + pub fn run(self) -> &'a mut crate::W { + self.variant(Debugrun::Run) } } #[doc = "Field `DMACLRACT` reader - DMA Request Clear on Active"] -pub type DMACLRACT_R = crate::BitReader; +pub type DmaclractR = crate::BitReader; #[doc = "Field `DMACLRACT` writer - DMA Request Clear on Active"] -pub type DMACLRACT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `CLKSEL` reader - Clock Source Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type DmaclractW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Clock Source Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "0: Prescaled EM01GRPACLK"] - PRESCEM01GRPACLK = 0, + Prescem01grpaclk = 0, #[doc = "1: Compare/Capture Channel 1 Input"] - CC1 = 1, + Cc1 = 1, #[doc = "2: Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] - TIMEROUF = 2, + Timerouf = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Source Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKSEL_A::PRESCEM01GRPACLK), - 1 => Some(CLKSEL_A::CC1), - 2 => Some(CLKSEL_A::TIMEROUF), + 0 => Some(Clksel::Prescem01grpaclk), + 1 => Some(Clksel::Cc1), + 2 => Some(Clksel::Timerouf), _ => None, } } - #[doc = "Checks if the value of the field is `PRESCEM01GRPACLK`"] + #[doc = "Prescaled EM01GRPACLK"] #[inline(always)] pub fn is_prescem01grpaclk(&self) -> bool { - *self == CLKSEL_A::PRESCEM01GRPACLK + *self == Clksel::Prescem01grpaclk } - #[doc = "Checks if the value of the field is `CC1`"] + #[doc = "Compare/Capture Channel 1 Input"] #[inline(always)] pub fn is_cc1(&self) -> bool { - *self == CLKSEL_A::CC1 + *self == Clksel::Cc1 } - #[doc = "Checks if the value of the field is `TIMEROUF`"] + #[doc = "Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] #[inline(always)] pub fn is_timerouf(&self) -> bool { - *self == CLKSEL_A::TIMEROUF + *self == Clksel::Timerouf } } #[doc = "Field `CLKSEL` writer - Clock Source Select"] -pub type CLKSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, CLKSEL_A, 2, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Prescaled EM01GRPACLK"] #[inline(always)] - pub fn prescem01grpaclk(self) -> &'a mut W { - self.variant(CLKSEL_A::PRESCEM01GRPACLK) + pub fn prescem01grpaclk(self) -> &'a mut crate::W { + self.variant(Clksel::Prescem01grpaclk) } #[doc = "Compare/Capture Channel 1 Input"] #[inline(always)] - pub fn cc1(self) -> &'a mut W { - self.variant(CLKSEL_A::CC1) + pub fn cc1(self) -> &'a mut crate::W { + self.variant(Clksel::Cc1) } #[doc = "Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] #[inline(always)] - pub fn timerouf(self) -> &'a mut W { - self.variant(CLKSEL_A::TIMEROUF) + pub fn timerouf(self) -> &'a mut crate::W { + self.variant(Clksel::Timerouf) } } -#[doc = "Field `RETIMEEN` reader - PWM output retimed enable"] -pub type RETIMEEN_R = crate::BitReader; #[doc = "PWM output retimed enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RETIMEEN_A { +pub enum Retimeen { #[doc = "0: PWM outputs are not re-timed."] - DISABLE = 0, + Disable = 0, #[doc = "1: PWM outputs are re-timed."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RETIMEEN_A) -> Self { + fn from(variant: Retimeen) -> Self { variant as u8 != 0 } } -impl RETIMEEN_R { +#[doc = "Field `RETIMEEN` reader - PWM output retimed enable"] +pub type RetimeenR = crate::BitReader; +impl RetimeenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RETIMEEN_A { + pub const fn variant(&self) -> Retimeen { match self.bits { - false => RETIMEEN_A::DISABLE, - true => RETIMEEN_A::ENABLE, + false => Retimeen::Disable, + true => Retimeen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "PWM outputs are not re-timed."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RETIMEEN_A::DISABLE + *self == Retimeen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "PWM outputs are re-timed."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RETIMEEN_A::ENABLE + *self == Retimeen::Enable } } #[doc = "Field `RETIMEEN` writer - PWM output retimed enable"] -pub type RETIMEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, RETIMEEN_A, O>; -impl<'a, const O: u8> RETIMEEN_W<'a, O> { +pub type RetimeenW<'a, REG> = crate::BitWriter<'a, REG, Retimeen>; +impl<'a, REG> RetimeenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "PWM outputs are not re-timed."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RETIMEEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Retimeen::Disable) } #[doc = "PWM outputs are re-timed."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RETIMEEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Retimeen::Enable) } } -#[doc = "Field `DISSYNCOUT` reader - Disable Timer Start/Stop/Reload output"] -pub type DISSYNCOUT_R = crate::BitReader; #[doc = "Disable Timer Start/Stop/Reload output\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DISSYNCOUT_A { +pub enum Dissyncout { #[doc = "0: Timer can start/stop/reload other timers with SYNC bit set"] - EN = 0, + En = 0, #[doc = "1: Timer cannot start/stop/reload other timers with SYNC bit set"] - DIS = 1, + Dis = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DISSYNCOUT_A) -> Self { + fn from(variant: Dissyncout) -> Self { variant as u8 != 0 } } -impl DISSYNCOUT_R { +#[doc = "Field `DISSYNCOUT` reader - Disable Timer Start/Stop/Reload output"] +pub type DissyncoutR = crate::BitReader; +impl DissyncoutR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DISSYNCOUT_A { + pub const fn variant(&self) -> Dissyncout { match self.bits { - false => DISSYNCOUT_A::EN, - true => DISSYNCOUT_A::DIS, + false => Dissyncout::En, + true => Dissyncout::Dis, } } - #[doc = "Checks if the value of the field is `EN`"] + #[doc = "Timer can start/stop/reload other timers with SYNC bit set"] #[inline(always)] pub fn is_en(&self) -> bool { - *self == DISSYNCOUT_A::EN + *self == Dissyncout::En } - #[doc = "Checks if the value of the field is `DIS`"] + #[doc = "Timer cannot start/stop/reload other timers with SYNC bit set"] #[inline(always)] pub fn is_dis(&self) -> bool { - *self == DISSYNCOUT_A::DIS + *self == Dissyncout::Dis } } #[doc = "Field `DISSYNCOUT` writer - Disable Timer Start/Stop/Reload output"] -pub type DISSYNCOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DISSYNCOUT_A, O>; -impl<'a, const O: u8> DISSYNCOUT_W<'a, O> { +pub type DissyncoutW<'a, REG> = crate::BitWriter<'a, REG, Dissyncout>; +impl<'a, REG> DissyncoutW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer can start/stop/reload other timers with SYNC bit set"] #[inline(always)] - pub fn en(self) -> &'a mut W { - self.variant(DISSYNCOUT_A::EN) + pub fn en(self) -> &'a mut crate::W { + self.variant(Dissyncout::En) } #[doc = "Timer cannot start/stop/reload other timers with SYNC bit set"] #[inline(always)] - pub fn dis(self) -> &'a mut W { - self.variant(DISSYNCOUT_A::DIS) + pub fn dis(self) -> &'a mut crate::W { + self.variant(Dissyncout::Dis) } } #[doc = "Field `ATI` reader - Always Track Inputs"] -pub type ATI_R = crate::BitReader; +pub type AtiR = crate::BitReader; #[doc = "Field `ATI` writer - Always Track Inputs"] -pub type ATI_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type AtiW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RSSCOIST` reader - Reload-Start Sets COIST"] -pub type RSSCOIST_R = crate::BitReader; +pub type RsscoistR = crate::BitReader; #[doc = "Field `RSSCOIST` writer - Reload-Start Sets COIST"] -pub type RSSCOIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `PRESC` reader - Prescaler Setting"] -pub type PRESC_R = crate::FieldReader; +pub type RsscoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Prescaler Setting\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum PRESC_A { +pub enum Presc { #[doc = "0: No prescaling"] - DIV1 = 0, + Div1 = 0, #[doc = "1: Prescale by 2"] - DIV2 = 1, + Div2 = 1, #[doc = "3: Prescale by 4"] - DIV4 = 3, + Div4 = 3, #[doc = "7: Prescale by 8"] - DIV8 = 7, + Div8 = 7, #[doc = "15: Prescale by 16"] - DIV16 = 15, + Div16 = 15, #[doc = "31: Prescale by 32"] - DIV32 = 31, + Div32 = 31, #[doc = "63: Prescale by 64"] - DIV64 = 63, + Div64 = 63, #[doc = "127: Prescale by 128"] - DIV128 = 127, + Div128 = 127, #[doc = "255: Prescale by 256"] - DIV256 = 255, + Div256 = 255, #[doc = "511: Prescale by 512"] - DIV512 = 511, + Div512 = 511, #[doc = "1023: Prescale by 1024"] - DIV1024 = 1023, + Div1024 = 1023, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: PRESC_A) -> Self { + fn from(variant: Presc) -> Self { variant as _ } } -impl PRESC_R { +impl crate::FieldSpec for Presc { + type Ux = u16; +} +impl crate::IsEnum for Presc {} +#[doc = "Field `PRESC` reader - Prescaler Setting"] +pub type PrescR = crate::FieldReader; +impl PrescR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PRESC_A::DIV1), - 1 => Some(PRESC_A::DIV2), - 3 => Some(PRESC_A::DIV4), - 7 => Some(PRESC_A::DIV8), - 15 => Some(PRESC_A::DIV16), - 31 => Some(PRESC_A::DIV32), - 63 => Some(PRESC_A::DIV64), - 127 => Some(PRESC_A::DIV128), - 255 => Some(PRESC_A::DIV256), - 511 => Some(PRESC_A::DIV512), - 1023 => Some(PRESC_A::DIV1024), + 0 => Some(Presc::Div1), + 1 => Some(Presc::Div2), + 3 => Some(Presc::Div4), + 7 => Some(Presc::Div8), + 15 => Some(Presc::Div16), + 31 => Some(Presc::Div32), + 63 => Some(Presc::Div64), + 127 => Some(Presc::Div128), + 255 => Some(Presc::Div256), + 511 => Some(Presc::Div512), + 1023 => Some(Presc::Div1024), _ => None, } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "No prescaling"] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == PRESC_A::DIV1 + *self == Presc::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "Prescale by 2"] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == PRESC_A::DIV2 + *self == Presc::Div2 } - #[doc = "Checks if the value of the field is `DIV4`"] + #[doc = "Prescale by 4"] #[inline(always)] pub fn is_div4(&self) -> bool { - *self == PRESC_A::DIV4 + *self == Presc::Div4 } - #[doc = "Checks if the value of the field is `DIV8`"] + #[doc = "Prescale by 8"] #[inline(always)] pub fn is_div8(&self) -> bool { - *self == PRESC_A::DIV8 + *self == Presc::Div8 } - #[doc = "Checks if the value of the field is `DIV16`"] + #[doc = "Prescale by 16"] #[inline(always)] pub fn is_div16(&self) -> bool { - *self == PRESC_A::DIV16 + *self == Presc::Div16 } - #[doc = "Checks if the value of the field is `DIV32`"] + #[doc = "Prescale by 32"] #[inline(always)] pub fn is_div32(&self) -> bool { - *self == PRESC_A::DIV32 + *self == Presc::Div32 } - #[doc = "Checks if the value of the field is `DIV64`"] + #[doc = "Prescale by 64"] #[inline(always)] pub fn is_div64(&self) -> bool { - *self == PRESC_A::DIV64 + *self == Presc::Div64 } - #[doc = "Checks if the value of the field is `DIV128`"] + #[doc = "Prescale by 128"] #[inline(always)] pub fn is_div128(&self) -> bool { - *self == PRESC_A::DIV128 + *self == Presc::Div128 } - #[doc = "Checks if the value of the field is `DIV256`"] + #[doc = "Prescale by 256"] #[inline(always)] pub fn is_div256(&self) -> bool { - *self == PRESC_A::DIV256 + *self == Presc::Div256 } - #[doc = "Checks if the value of the field is `DIV512`"] + #[doc = "Prescale by 512"] #[inline(always)] pub fn is_div512(&self) -> bool { - *self == PRESC_A::DIV512 + *self == Presc::Div512 } - #[doc = "Checks if the value of the field is `DIV1024`"] + #[doc = "Prescale by 1024"] #[inline(always)] pub fn is_div1024(&self) -> bool { - *self == PRESC_A::DIV1024 + *self == Presc::Div1024 } } #[doc = "Field `PRESC` writer - Prescaler Setting"] -pub type PRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u16, PRESC_A, 10, O>; -impl<'a, const O: u8> PRESC_W<'a, O> { +pub type PrescW<'a, REG> = crate::FieldWriter<'a, REG, 10, Presc>; +impl<'a, REG> PrescW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No prescaling"] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(PRESC_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Presc::Div1) } #[doc = "Prescale by 2"] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(PRESC_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Presc::Div2) } #[doc = "Prescale by 4"] #[inline(always)] - pub fn div4(self) -> &'a mut W { - self.variant(PRESC_A::DIV4) + pub fn div4(self) -> &'a mut crate::W { + self.variant(Presc::Div4) } #[doc = "Prescale by 8"] #[inline(always)] - pub fn div8(self) -> &'a mut W { - self.variant(PRESC_A::DIV8) + pub fn div8(self) -> &'a mut crate::W { + self.variant(Presc::Div8) } #[doc = "Prescale by 16"] #[inline(always)] - pub fn div16(self) -> &'a mut W { - self.variant(PRESC_A::DIV16) + pub fn div16(self) -> &'a mut crate::W { + self.variant(Presc::Div16) } #[doc = "Prescale by 32"] #[inline(always)] - pub fn div32(self) -> &'a mut W { - self.variant(PRESC_A::DIV32) + pub fn div32(self) -> &'a mut crate::W { + self.variant(Presc::Div32) } #[doc = "Prescale by 64"] #[inline(always)] - pub fn div64(self) -> &'a mut W { - self.variant(PRESC_A::DIV64) + pub fn div64(self) -> &'a mut crate::W { + self.variant(Presc::Div64) } #[doc = "Prescale by 128"] #[inline(always)] - pub fn div128(self) -> &'a mut W { - self.variant(PRESC_A::DIV128) + pub fn div128(self) -> &'a mut crate::W { + self.variant(Presc::Div128) } #[doc = "Prescale by 256"] #[inline(always)] - pub fn div256(self) -> &'a mut W { - self.variant(PRESC_A::DIV256) + pub fn div256(self) -> &'a mut crate::W { + self.variant(Presc::Div256) } #[doc = "Prescale by 512"] #[inline(always)] - pub fn div512(self) -> &'a mut W { - self.variant(PRESC_A::DIV512) + pub fn div512(self) -> &'a mut crate::W { + self.variant(Presc::Div512) } #[doc = "Prescale by 1024"] #[inline(always)] - pub fn div1024(self) -> &'a mut W { - self.variant(PRESC_A::DIV1024) + pub fn div1024(self) -> &'a mut crate::W { + self.variant(Presc::Div1024) } } impl R { #[doc = "Bits 0:1 - Timer Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Timer Start/Stop/Reload Synchronization"] #[inline(always)] - pub fn sync(&self) -> SYNC_R { - SYNC_R::new(((self.bits >> 3) & 1) != 0) + pub fn sync(&self) -> SyncR { + SyncR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - One-shot Mode Enable"] #[inline(always)] - pub fn osmen(&self) -> OSMEN_R { - OSMEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn osmen(&self) -> OsmenR { + OsmenR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Quadrature Decoder Mode Selection"] #[inline(always)] - pub fn qdm(&self) -> QDM_R { - QDM_R::new(((self.bits >> 5) & 1) != 0) + pub fn qdm(&self) -> QdmR { + QdmR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Debug Mode Run Enable"] #[inline(always)] - pub fn debugrun(&self) -> DEBUGRUN_R { - DEBUGRUN_R::new(((self.bits >> 6) & 1) != 0) + pub fn debugrun(&self) -> DebugrunR { + DebugrunR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - DMA Request Clear on Active"] #[inline(always)] - pub fn dmaclract(&self) -> DMACLRACT_R { - DMACLRACT_R::new(((self.bits >> 7) & 1) != 0) + pub fn dmaclract(&self) -> DmaclractR { + DmaclractR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:9 - Clock Source Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 10 - PWM output retimed enable"] #[inline(always)] - pub fn retimeen(&self) -> RETIMEEN_R { - RETIMEEN_R::new(((self.bits >> 10) & 1) != 0) + pub fn retimeen(&self) -> RetimeenR { + RetimeenR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Disable Timer Start/Stop/Reload output"] #[inline(always)] - pub fn dissyncout(&self) -> DISSYNCOUT_R { - DISSYNCOUT_R::new(((self.bits >> 11) & 1) != 0) + pub fn dissyncout(&self) -> DissyncoutR { + DissyncoutR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 16 - Always Track Inputs"] #[inline(always)] - pub fn ati(&self) -> ATI_R { - ATI_R::new(((self.bits >> 16) & 1) != 0) + pub fn ati(&self) -> AtiR { + AtiR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Reload-Start Sets COIST"] #[inline(always)] - pub fn rsscoist(&self) -> RSSCOIST_R { - RSSCOIST_R::new(((self.bits >> 17) & 1) != 0) + pub fn rsscoist(&self) -> RsscoistR { + RsscoistR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:27 - Prescaler Setting"] #[inline(always)] - pub fn presc(&self) -> PRESC_R { - PRESC_R::new(((self.bits >> 18) & 0x03ff) as u16) + pub fn presc(&self) -> PrescR { + PrescR::new(((self.bits >> 18) & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:1 - Timer Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 3 - Timer Start/Stop/Reload Synchronization"] #[inline(always)] #[must_use] - pub fn sync(&mut self) -> SYNC_W<3> { - SYNC_W::new(self) + pub fn sync(&mut self) -> SyncW { + SyncW::new(self, 3) } #[doc = "Bit 4 - One-shot Mode Enable"] #[inline(always)] #[must_use] - pub fn osmen(&mut self) -> OSMEN_W<4> { - OSMEN_W::new(self) + pub fn osmen(&mut self) -> OsmenW { + OsmenW::new(self, 4) } #[doc = "Bit 5 - Quadrature Decoder Mode Selection"] #[inline(always)] #[must_use] - pub fn qdm(&mut self) -> QDM_W<5> { - QDM_W::new(self) + pub fn qdm(&mut self) -> QdmW { + QdmW::new(self, 5) } #[doc = "Bit 6 - Debug Mode Run Enable"] #[inline(always)] #[must_use] - pub fn debugrun(&mut self) -> DEBUGRUN_W<6> { - DEBUGRUN_W::new(self) + pub fn debugrun(&mut self) -> DebugrunW { + DebugrunW::new(self, 6) } #[doc = "Bit 7 - DMA Request Clear on Active"] #[inline(always)] #[must_use] - pub fn dmaclract(&mut self) -> DMACLRACT_W<7> { - DMACLRACT_W::new(self) + pub fn dmaclract(&mut self) -> DmaclractW { + DmaclractW::new(self, 7) } #[doc = "Bits 8:9 - Clock Source Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<8> { - CLKSEL_W::new(self) + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 8) } #[doc = "Bit 10 - PWM output retimed enable"] #[inline(always)] #[must_use] - pub fn retimeen(&mut self) -> RETIMEEN_W<10> { - RETIMEEN_W::new(self) + pub fn retimeen(&mut self) -> RetimeenW { + RetimeenW::new(self, 10) } #[doc = "Bit 11 - Disable Timer Start/Stop/Reload output"] #[inline(always)] #[must_use] - pub fn dissyncout(&mut self) -> DISSYNCOUT_W<11> { - DISSYNCOUT_W::new(self) + pub fn dissyncout(&mut self) -> DissyncoutW { + DissyncoutW::new(self, 11) } #[doc = "Bit 16 - Always Track Inputs"] #[inline(always)] #[must_use] - pub fn ati(&mut self) -> ATI_W<16> { - ATI_W::new(self) + pub fn ati(&mut self) -> AtiW { + AtiW::new(self, 16) } #[doc = "Bit 17 - Reload-Start Sets COIST"] #[inline(always)] #[must_use] - pub fn rsscoist(&mut self) -> RSSCOIST_W<17> { - RSSCOIST_W::new(self) + pub fn rsscoist(&mut self) -> RsscoistW { + RsscoistW::new(self, 17) } #[doc = "Bits 18:27 - Prescaler Setting"] #[inline(always)] #[must_use] - pub fn presc(&mut self) -> PRESC_W<18> { - PRESC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn presc(&mut self) -> PrescW { + PrescW::new(self, 18) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cmd.rs index ca6d3b1..bf41157 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cmd.rs @@ -1,60 +1,35 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` writer - Start Timer"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STOP` writer - Stop Timer"] -pub type STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StopW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Start Timer"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Stop Timer"] #[inline(always)] #[must_use] - pub fn stop(&mut self) -> STOP_W<1> { - STOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stop(&mut self) -> StopW { + StopW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cnt.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cnt.rs index dd37661..c870fc9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cnt.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/cnt.rs @@ -1,80 +1,40 @@ #[doc = "Register `CNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CNT` reader - Counter Value"] -pub type CNT_R = crate::FieldReader; +pub type CntR = crate::FieldReader; #[doc = "Field `CNT` writer - Counter Value"] -pub type CNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CNT_SPEC, u16, u16, 16, O>; +pub type CntW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Value"] #[inline(always)] - pub fn cnt(&self) -> CNT_R { - CNT_R::new((self.bits & 0xffff) as u16) + pub fn cnt(&self) -> CntR { + CntR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Value"] #[inline(always)] #[must_use] - pub fn cnt(&mut self) -> CNT_W<0> { - CNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cnt(&mut self) -> CntW { + CntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](index.html) module"] -pub struct CNT_SPEC; -impl crate::RegisterSpec for CNT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CntSpec; +impl crate::RegisterSpec for CntSpec { type Ux = u32; } -#[doc = "`read()` method returns [cnt::R](R) reader structure"] -impl crate::Readable for CNT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnt::W](W) writer structure"] -impl crate::Writable for CNT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cnt::R`](R) reader structure"] +impl crate::Readable for CntSpec {} +#[doc = "`write(|w| ..)` method takes [`cnt::W`](W) writer structure"] +impl crate::Writable for CntSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNT to value 0"] -impl crate::Resettable for CNT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CntSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/ctrl.rs index 08e646b..e2ed153 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/ctrl.rs @@ -1,258 +1,234 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `RISEA` reader - Timer Rising Input Edge Action"] -pub type RISEA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Timer Rising Input Edge Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RISEA_A { +pub enum Risea { #[doc = "0: No action"] - NONE = 0, + None = 0, #[doc = "1: Start counter without reload"] - START = 1, + Start = 1, #[doc = "2: Stop counter without reload"] - STOP = 2, + Stop = 2, #[doc = "3: Reload and start counter"] - RELOADSTART = 3, + Reloadstart = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RISEA_A) -> Self { + fn from(variant: Risea) -> Self { variant as _ } } -impl RISEA_R { +impl crate::FieldSpec for Risea { + type Ux = u8; +} +impl crate::IsEnum for Risea {} +#[doc = "Field `RISEA` reader - Timer Rising Input Edge Action"] +pub type RiseaR = crate::FieldReader; +impl RiseaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RISEA_A { + pub const fn variant(&self) -> Risea { match self.bits { - 0 => RISEA_A::NONE, - 1 => RISEA_A::START, - 2 => RISEA_A::STOP, - 3 => RISEA_A::RELOADSTART, + 0 => Risea::None, + 1 => Risea::Start, + 2 => Risea::Stop, + 3 => Risea::Reloadstart, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == RISEA_A::NONE + *self == Risea::None } - #[doc = "Checks if the value of the field is `START`"] + #[doc = "Start counter without reload"] #[inline(always)] pub fn is_start(&self) -> bool { - *self == RISEA_A::START + *self == Risea::Start } - #[doc = "Checks if the value of the field is `STOP`"] + #[doc = "Stop counter without reload"] #[inline(always)] pub fn is_stop(&self) -> bool { - *self == RISEA_A::STOP + *self == Risea::Stop } - #[doc = "Checks if the value of the field is `RELOADSTART`"] + #[doc = "Reload and start counter"] #[inline(always)] pub fn is_reloadstart(&self) -> bool { - *self == RISEA_A::RELOADSTART + *self == Risea::Reloadstart } } #[doc = "Field `RISEA` writer - Timer Rising Input Edge Action"] -pub type RISEA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, RISEA_A, 2, O>; -impl<'a, const O: u8> RISEA_W<'a, O> { +pub type RiseaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Risea, crate::Safe>; +impl<'a, REG> RiseaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(RISEA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Risea::None) } #[doc = "Start counter without reload"] #[inline(always)] - pub fn start(self) -> &'a mut W { - self.variant(RISEA_A::START) + pub fn start(self) -> &'a mut crate::W { + self.variant(Risea::Start) } #[doc = "Stop counter without reload"] #[inline(always)] - pub fn stop(self) -> &'a mut W { - self.variant(RISEA_A::STOP) + pub fn stop(self) -> &'a mut crate::W { + self.variant(Risea::Stop) } #[doc = "Reload and start counter"] #[inline(always)] - pub fn reloadstart(self) -> &'a mut W { - self.variant(RISEA_A::RELOADSTART) + pub fn reloadstart(self) -> &'a mut crate::W { + self.variant(Risea::Reloadstart) } } -#[doc = "Field `FALLA` reader - Timer Falling Input Edge Action"] -pub type FALLA_R = crate::FieldReader; #[doc = "Timer Falling Input Edge Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FALLA_A { +pub enum Falla { #[doc = "0: No action"] - NONE = 0, + None = 0, #[doc = "1: Start counter without reload"] - START = 1, + Start = 1, #[doc = "2: Stop counter without reload"] - STOP = 2, + Stop = 2, #[doc = "3: Reload and start counter"] - RELOADSTART = 3, + Reloadstart = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FALLA_A) -> Self { + fn from(variant: Falla) -> Self { variant as _ } } -impl FALLA_R { +impl crate::FieldSpec for Falla { + type Ux = u8; +} +impl crate::IsEnum for Falla {} +#[doc = "Field `FALLA` reader - Timer Falling Input Edge Action"] +pub type FallaR = crate::FieldReader; +impl FallaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FALLA_A { + pub const fn variant(&self) -> Falla { match self.bits { - 0 => FALLA_A::NONE, - 1 => FALLA_A::START, - 2 => FALLA_A::STOP, - 3 => FALLA_A::RELOADSTART, + 0 => Falla::None, + 1 => Falla::Start, + 2 => Falla::Stop, + 3 => Falla::Reloadstart, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == FALLA_A::NONE + *self == Falla::None } - #[doc = "Checks if the value of the field is `START`"] + #[doc = "Start counter without reload"] #[inline(always)] pub fn is_start(&self) -> bool { - *self == FALLA_A::START + *self == Falla::Start } - #[doc = "Checks if the value of the field is `STOP`"] + #[doc = "Stop counter without reload"] #[inline(always)] pub fn is_stop(&self) -> bool { - *self == FALLA_A::STOP + *self == Falla::Stop } - #[doc = "Checks if the value of the field is `RELOADSTART`"] + #[doc = "Reload and start counter"] #[inline(always)] pub fn is_reloadstart(&self) -> bool { - *self == FALLA_A::RELOADSTART + *self == Falla::Reloadstart } } #[doc = "Field `FALLA` writer - Timer Falling Input Edge Action"] -pub type FALLA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, FALLA_A, 2, O>; -impl<'a, const O: u8> FALLA_W<'a, O> { +pub type FallaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Falla, crate::Safe>; +impl<'a, REG> FallaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(FALLA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Falla::None) } #[doc = "Start counter without reload"] #[inline(always)] - pub fn start(self) -> &'a mut W { - self.variant(FALLA_A::START) + pub fn start(self) -> &'a mut crate::W { + self.variant(Falla::Start) } #[doc = "Stop counter without reload"] #[inline(always)] - pub fn stop(self) -> &'a mut W { - self.variant(FALLA_A::STOP) + pub fn stop(self) -> &'a mut crate::W { + self.variant(Falla::Stop) } #[doc = "Reload and start counter"] #[inline(always)] - pub fn reloadstart(self) -> &'a mut W { - self.variant(FALLA_A::RELOADSTART) + pub fn reloadstart(self) -> &'a mut crate::W { + self.variant(Falla::Reloadstart) } } #[doc = "Field `X2CNT` reader - 2x Count Mode"] -pub type X2CNT_R = crate::BitReader; +pub type X2cntR = crate::BitReader; #[doc = "Field `X2CNT` writer - 2x Count Mode"] -pub type X2CNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type X2cntW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - Timer Rising Input Edge Action"] #[inline(always)] - pub fn risea(&self) -> RISEA_R { - RISEA_R::new((self.bits & 3) as u8) + pub fn risea(&self) -> RiseaR { + RiseaR::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Timer Falling Input Edge Action"] #[inline(always)] - pub fn falla(&self) -> FALLA_R { - FALLA_R::new(((self.bits >> 2) & 3) as u8) + pub fn falla(&self) -> FallaR { + FallaR::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bit 4 - 2x Count Mode"] #[inline(always)] - pub fn x2cnt(&self) -> X2CNT_R { - X2CNT_R::new(((self.bits >> 4) & 1) != 0) + pub fn x2cnt(&self) -> X2cntR { + X2cntR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Timer Rising Input Edge Action"] #[inline(always)] #[must_use] - pub fn risea(&mut self) -> RISEA_W<0> { - RISEA_W::new(self) + pub fn risea(&mut self) -> RiseaW { + RiseaW::new(self, 0) } #[doc = "Bits 2:3 - Timer Falling Input Edge Action"] #[inline(always)] #[must_use] - pub fn falla(&mut self) -> FALLA_W<2> { - FALLA_W::new(self) + pub fn falla(&mut self) -> FallaW { + FallaW::new(self, 2) } #[doc = "Bit 4 - 2x Count Mode"] #[inline(always)] #[must_use] - pub fn x2cnt(&mut self) -> X2CNT_W<4> { - X2CNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn x2cnt(&mut self) -> X2cntW { + X2cntW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtcfg.rs index d19a9a3..82b97e1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtcfg.rs @@ -1,186 +1,149 @@ #[doc = "Register `DTCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTEN` reader - DTI Enable"] -pub type DTEN_R = crate::BitReader; +pub type DtenR = crate::BitReader; #[doc = "Field `DTEN` writer - DTI Enable"] -pub type DTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; -#[doc = "Field `DTDAS` reader - DTI Automatic Start-up Functionality"] -pub type DTDAS_R = crate::BitReader; +pub type DtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "DTI Automatic Start-up Functionality\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DTDAS_A { +pub enum Dtdas { #[doc = "0: No DTI restart on debugger exit"] - NORESTART = 0, + Norestart = 0, #[doc = "1: DTI restart on debugger exit"] - RESTART = 1, + Restart = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DTDAS_A) -> Self { + fn from(variant: Dtdas) -> Self { variant as u8 != 0 } } -impl DTDAS_R { +#[doc = "Field `DTDAS` reader - DTI Automatic Start-up Functionality"] +pub type DtdasR = crate::BitReader; +impl DtdasR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTDAS_A { + pub const fn variant(&self) -> Dtdas { match self.bits { - false => DTDAS_A::NORESTART, - true => DTDAS_A::RESTART, + false => Dtdas::Norestart, + true => Dtdas::Restart, } } - #[doc = "Checks if the value of the field is `NORESTART`"] + #[doc = "No DTI restart on debugger exit"] #[inline(always)] pub fn is_norestart(&self) -> bool { - *self == DTDAS_A::NORESTART + *self == Dtdas::Norestart } - #[doc = "Checks if the value of the field is `RESTART`"] + #[doc = "DTI restart on debugger exit"] #[inline(always)] pub fn is_restart(&self) -> bool { - *self == DTDAS_A::RESTART + *self == Dtdas::Restart } } #[doc = "Field `DTDAS` writer - DTI Automatic Start-up Functionality"] -pub type DTDAS_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, DTDAS_A, O>; -impl<'a, const O: u8> DTDAS_W<'a, O> { +pub type DtdasW<'a, REG> = crate::BitWriter<'a, REG, Dtdas>; +impl<'a, REG> DtdasW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No DTI restart on debugger exit"] #[inline(always)] - pub fn norestart(self) -> &'a mut W { - self.variant(DTDAS_A::NORESTART) + pub fn norestart(self) -> &'a mut crate::W { + self.variant(Dtdas::Norestart) } #[doc = "DTI restart on debugger exit"] #[inline(always)] - pub fn restart(self) -> &'a mut W { - self.variant(DTDAS_A::RESTART) + pub fn restart(self) -> &'a mut crate::W { + self.variant(Dtdas::Restart) } } #[doc = "Field `DTAR` reader - DTI Always Run"] -pub type DTAR_R = crate::BitReader; +pub type DtarR = crate::BitReader; #[doc = "Field `DTAR` writer - DTI Always Run"] -pub type DTAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtarW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTFATS` reader - DTI Fault Action on Timer Stop"] -pub type DTFATS_R = crate::BitReader; +pub type DtfatsR = crate::BitReader; #[doc = "Field `DTFATS` writer - DTI Fault Action on Timer Stop"] -pub type DTFATS_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtfatsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRSEN` reader - DTI PRS Source Enable"] -pub type DTPRSEN_R = crate::BitReader; +pub type DtprsenR = crate::BitReader; #[doc = "Field `DTPRSEN` writer - DTI PRS Source Enable"] -pub type DTPRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtprsenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI Enable"] #[inline(always)] - pub fn dten(&self) -> DTEN_R { - DTEN_R::new((self.bits & 1) != 0) + pub fn dten(&self) -> DtenR { + DtenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI Automatic Start-up Functionality"] #[inline(always)] - pub fn dtdas(&self) -> DTDAS_R { - DTDAS_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtdas(&self) -> DtdasR { + DtdasR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 9 - DTI Always Run"] #[inline(always)] - pub fn dtar(&self) -> DTAR_R { - DTAR_R::new(((self.bits >> 9) & 1) != 0) + pub fn dtar(&self) -> DtarR { + DtarR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - DTI Fault Action on Timer Stop"] #[inline(always)] - pub fn dtfats(&self) -> DTFATS_R { - DTFATS_R::new(((self.bits >> 10) & 1) != 0) + pub fn dtfats(&self) -> DtfatsR { + DtfatsR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - DTI PRS Source Enable"] #[inline(always)] - pub fn dtprsen(&self) -> DTPRSEN_R { - DTPRSEN_R::new(((self.bits >> 11) & 1) != 0) + pub fn dtprsen(&self) -> DtprsenR { + DtprsenR::new(((self.bits >> 11) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI Enable"] #[inline(always)] #[must_use] - pub fn dten(&mut self) -> DTEN_W<0> { - DTEN_W::new(self) + pub fn dten(&mut self) -> DtenW { + DtenW::new(self, 0) } #[doc = "Bit 1 - DTI Automatic Start-up Functionality"] #[inline(always)] #[must_use] - pub fn dtdas(&mut self) -> DTDAS_W<1> { - DTDAS_W::new(self) + pub fn dtdas(&mut self) -> DtdasW { + DtdasW::new(self, 1) } #[doc = "Bit 9 - DTI Always Run"] #[inline(always)] #[must_use] - pub fn dtar(&mut self) -> DTAR_W<9> { - DTAR_W::new(self) + pub fn dtar(&mut self) -> DtarW { + DtarW::new(self, 9) } #[doc = "Bit 10 - DTI Fault Action on Timer Stop"] #[inline(always)] #[must_use] - pub fn dtfats(&mut self) -> DTFATS_W<10> { - DTFATS_W::new(self) + pub fn dtfats(&mut self) -> DtfatsW { + DtfatsW::new(self, 10) } #[doc = "Bit 11 - DTI PRS Source Enable"] #[inline(always)] #[must_use] - pub fn dtprsen(&mut self) -> DTPRSEN_W<11> { - DTPRSEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtprsen(&mut self) -> DtprsenW { + DtprsenW::new(self, 11) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtcfg](index.html) module"] -pub struct DTCFG_SPEC; -impl crate::RegisterSpec for DTCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtcfgSpec; +impl crate::RegisterSpec for DtcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtcfg::R](R) reader structure"] -impl crate::Readable for DTCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtcfg::W](W) writer structure"] -impl crate::Writable for DTCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtcfg::R`](R) reader structure"] +impl crate::Readable for DtcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dtcfg::W`](W) writer structure"] +impl crate::Writable for DtcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTCFG to value 0"] -impl crate::Resettable for DTCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtctrl.rs index 816a05e..84f6d17 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtctrl.rs @@ -1,95 +1,55 @@ #[doc = "Register `DTCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTCINV` reader - DTI Complementary Output Invert."] -pub type DTCINV_R = crate::BitReader; +pub type DtcinvR = crate::BitReader; #[doc = "Field `DTCINV` writer - DTI Complementary Output Invert."] -pub type DTCINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, O>; +pub type DtcinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTIPOL` reader - DTI Inactive Polarity"] -pub type DTIPOL_R = crate::BitReader; +pub type DtipolR = crate::BitReader; #[doc = "Field `DTIPOL` writer - DTI Inactive Polarity"] -pub type DTIPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, O>; +pub type DtipolW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI Complementary Output Invert."] #[inline(always)] - pub fn dtcinv(&self) -> DTCINV_R { - DTCINV_R::new((self.bits & 1) != 0) + pub fn dtcinv(&self) -> DtcinvR { + DtcinvR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI Inactive Polarity"] #[inline(always)] - pub fn dtipol(&self) -> DTIPOL_R { - DTIPOL_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtipol(&self) -> DtipolR { + DtipolR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI Complementary Output Invert."] #[inline(always)] #[must_use] - pub fn dtcinv(&mut self) -> DTCINV_W<0> { - DTCINV_W::new(self) + pub fn dtcinv(&mut self) -> DtcinvW { + DtcinvW::new(self, 0) } #[doc = "Bit 1 - DTI Inactive Polarity"] #[inline(always)] #[must_use] - pub fn dtipol(&mut self) -> DTIPOL_W<1> { - DTIPOL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtipol(&mut self) -> DtipolW { + DtipolW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtctrl](index.html) module"] -pub struct DTCTRL_SPEC; -impl crate::RegisterSpec for DTCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtctrlSpec; +impl crate::RegisterSpec for DtctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtctrl::R](R) reader structure"] -impl crate::Readable for DTCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtctrl::W](W) writer structure"] -impl crate::Writable for DTCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtctrl::R`](R) reader structure"] +impl crate::Readable for DtctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`dtctrl::W`](W) writer structure"] +impl crate::Writable for DtctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTCTRL to value 0"] -impl crate::Resettable for DTCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtfault.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtfault.rs index 01a53f9..ecd21aa 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtfault.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtfault.rs @@ -1,65 +1,50 @@ #[doc = "Register `DTFAULT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DTPRS0F` reader - DTI PRS 0 Fault"] -pub type DTPRS0F_R = crate::BitReader; +pub type Dtprs0fR = crate::BitReader; #[doc = "Field `DTPRS1F` reader - DTI PRS 1 Fault"] -pub type DTPRS1F_R = crate::BitReader; +pub type Dtprs1fR = crate::BitReader; #[doc = "Field `DTDBGF` reader - DTI Debugger Fault"] -pub type DTDBGF_R = crate::BitReader; +pub type DtdbgfR = crate::BitReader; #[doc = "Field `DTLOCKUPF` reader - DTI Lockup Fault"] -pub type DTLOCKUPF_R = crate::BitReader; +pub type DtlockupfR = crate::BitReader; #[doc = "Field `DTEM23F` reader - DTI EM23 Entry Fault"] -pub type DTEM23F_R = crate::BitReader; +pub type Dtem23fR = crate::BitReader; impl R { #[doc = "Bit 0 - DTI PRS 0 Fault"] #[inline(always)] - pub fn dtprs0f(&self) -> DTPRS0F_R { - DTPRS0F_R::new((self.bits & 1) != 0) + pub fn dtprs0f(&self) -> Dtprs0fR { + Dtprs0fR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI PRS 1 Fault"] #[inline(always)] - pub fn dtprs1f(&self) -> DTPRS1F_R { - DTPRS1F_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtprs1f(&self) -> Dtprs1fR { + Dtprs1fR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DTI Debugger Fault"] #[inline(always)] - pub fn dtdbgf(&self) -> DTDBGF_R { - DTDBGF_R::new(((self.bits >> 2) & 1) != 0) + pub fn dtdbgf(&self) -> DtdbgfR { + DtdbgfR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DTI Lockup Fault"] #[inline(always)] - pub fn dtlockupf(&self) -> DTLOCKUPF_R { - DTLOCKUPF_R::new(((self.bits >> 3) & 1) != 0) + pub fn dtlockupf(&self) -> DtlockupfR { + DtlockupfR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - DTI EM23 Entry Fault"] #[inline(always)] - pub fn dtem23f(&self) -> DTEM23F_R { - DTEM23F_R::new(((self.bits >> 4) & 1) != 0) + pub fn dtem23f(&self) -> Dtem23fR { + Dtem23fR::new(((self.bits >> 4) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfault](index.html) module"] -pub struct DTFAULT_SPEC; -impl crate::RegisterSpec for DTFAULT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfault::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfaultSpec; +impl crate::RegisterSpec for DtfaultSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtfault::R](R) reader structure"] -impl crate::Readable for DTFAULT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`dtfault::R`](R) reader structure"] +impl crate::Readable for DtfaultSpec {} #[doc = "`reset()` method sets DTFAULT to value 0"] -impl crate::Resettable for DTFAULT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfaultSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtfaultc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtfaultc.rs index 1c3d1ba..bcb21e2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtfaultc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtfaultc.rs @@ -1,84 +1,59 @@ #[doc = "Register `DTFAULTC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTPRS0FC` writer - DTI PRS0 Fault Clear"] -pub type DTPRS0FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtprs0fcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRS1FC` writer - DTI PRS1 Fault Clear"] -pub type DTPRS1FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtprs1fcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTDBGFC` writer - DTI Debugger Fault Clear"] -pub type DTDBGFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type DtdbgfcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTLOCKUPFC` writer - DTI Lockup Fault Clear"] -pub type DTLOCKUPFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type DtlockupfcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTEM23FC` writer - DTI EM23 Fault Clear"] -pub type DTEM23FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtem23fcW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - DTI PRS0 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtprs0fc(&mut self) -> DTPRS0FC_W<0> { - DTPRS0FC_W::new(self) + pub fn dtprs0fc(&mut self) -> Dtprs0fcW { + Dtprs0fcW::new(self, 0) } #[doc = "Bit 1 - DTI PRS1 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtprs1fc(&mut self) -> DTPRS1FC_W<1> { - DTPRS1FC_W::new(self) + pub fn dtprs1fc(&mut self) -> Dtprs1fcW { + Dtprs1fcW::new(self, 1) } #[doc = "Bit 2 - DTI Debugger Fault Clear"] #[inline(always)] #[must_use] - pub fn dtdbgfc(&mut self) -> DTDBGFC_W<2> { - DTDBGFC_W::new(self) + pub fn dtdbgfc(&mut self) -> DtdbgfcW { + DtdbgfcW::new(self, 2) } #[doc = "Bit 3 - DTI Lockup Fault Clear"] #[inline(always)] #[must_use] - pub fn dtlockupfc(&mut self) -> DTLOCKUPFC_W<3> { - DTLOCKUPFC_W::new(self) + pub fn dtlockupfc(&mut self) -> DtlockupfcW { + DtlockupfcW::new(self, 3) } #[doc = "Bit 4 - DTI EM23 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtem23fc(&mut self) -> DTEM23FC_W<4> { - DTEM23FC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtem23fc(&mut self) -> Dtem23fcW { + Dtem23fcW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfaultc](index.html) module"] -pub struct DTFAULTC_SPEC; -impl crate::RegisterSpec for DTFAULTC_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfaultc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfaultcSpec; +impl crate::RegisterSpec for DtfaultcSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [dtfaultc::W](W) writer structure"] -impl crate::Writable for DTFAULTC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`dtfaultc::W`](W) writer structure"] +impl crate::Writable for DtfaultcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTFAULTC to value 0"] -impl crate::Resettable for DTFAULTC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfaultcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtfcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtfcfg.rs index 91dee4b..6179df8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtfcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtfcfg.rs @@ -1,229 +1,197 @@ #[doc = "Register `DTFCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTFCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DTFA` reader - DTI Fault Action"] -pub type DTFA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DTI Fault Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DTFA_A { +pub enum Dtfa { #[doc = "0: No action on fault"] - NONE = 0, + None = 0, #[doc = "1: Set outputs inactive"] - INACTIVE = 1, + Inactive = 1, #[doc = "2: Clear outputs"] - CLEAR = 2, + Clear = 2, #[doc = "3: Tristate outputs"] - TRISTATE = 3, + Tristate = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DTFA_A) -> Self { + fn from(variant: Dtfa) -> Self { variant as _ } } -impl DTFA_R { +impl crate::FieldSpec for Dtfa { + type Ux = u8; +} +impl crate::IsEnum for Dtfa {} +#[doc = "Field `DTFA` reader - DTI Fault Action"] +pub type DtfaR = crate::FieldReader; +impl DtfaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTFA_A { + pub const fn variant(&self) -> Dtfa { match self.bits { - 0 => DTFA_A::NONE, - 1 => DTFA_A::INACTIVE, - 2 => DTFA_A::CLEAR, - 3 => DTFA_A::TRISTATE, + 0 => Dtfa::None, + 1 => Dtfa::Inactive, + 2 => Dtfa::Clear, + 3 => Dtfa::Tristate, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on fault"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == DTFA_A::NONE + *self == Dtfa::None } - #[doc = "Checks if the value of the field is `INACTIVE`"] + #[doc = "Set outputs inactive"] #[inline(always)] pub fn is_inactive(&self) -> bool { - *self == DTFA_A::INACTIVE + *self == Dtfa::Inactive } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear outputs"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == DTFA_A::CLEAR + *self == Dtfa::Clear } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "Tristate outputs"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == DTFA_A::TRISTATE + *self == Dtfa::Tristate } } #[doc = "Field `DTFA` writer - DTI Fault Action"] -pub type DTFA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, DTFCFG_SPEC, u8, DTFA_A, 2, O>; -impl<'a, const O: u8> DTFA_W<'a, O> { +pub type DtfaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dtfa, crate::Safe>; +impl<'a, REG> DtfaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on fault"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(DTFA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Dtfa::None) } #[doc = "Set outputs inactive"] #[inline(always)] - pub fn inactive(self) -> &'a mut W { - self.variant(DTFA_A::INACTIVE) + pub fn inactive(self) -> &'a mut crate::W { + self.variant(Dtfa::Inactive) } #[doc = "Clear outputs"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(DTFA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Dtfa::Clear) } #[doc = "Tristate outputs"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(DTFA_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Dtfa::Tristate) } } #[doc = "Field `DTPRS0FEN` reader - DTI PRS 0 Fault Enable"] -pub type DTPRS0FEN_R = crate::BitReader; +pub type Dtprs0fenR = crate::BitReader; #[doc = "Field `DTPRS0FEN` writer - DTI PRS 0 Fault Enable"] -pub type DTPRS0FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtprs0fenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRS1FEN` reader - DTI PRS 1 Fault Enable"] -pub type DTPRS1FEN_R = crate::BitReader; +pub type Dtprs1fenR = crate::BitReader; #[doc = "Field `DTPRS1FEN` writer - DTI PRS 1 Fault Enable"] -pub type DTPRS1FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtprs1fenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTDBGFEN` reader - DTI Debugger Fault Enable"] -pub type DTDBGFEN_R = crate::BitReader; +pub type DtdbgfenR = crate::BitReader; #[doc = "Field `DTDBGFEN` writer - DTI Debugger Fault Enable"] -pub type DTDBGFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type DtdbgfenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTLOCKUPFEN` reader - DTI Lockup Fault Enable"] -pub type DTLOCKUPFEN_R = crate::BitReader; +pub type DtlockupfenR = crate::BitReader; #[doc = "Field `DTLOCKUPFEN` writer - DTI Lockup Fault Enable"] -pub type DTLOCKUPFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type DtlockupfenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTEM23FEN` reader - DTI EM23 Fault Enable"] -pub type DTEM23FEN_R = crate::BitReader; +pub type Dtem23fenR = crate::BitReader; #[doc = "Field `DTEM23FEN` writer - DTI EM23 Fault Enable"] -pub type DTEM23FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtem23fenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 16:17 - DTI Fault Action"] #[inline(always)] - pub fn dtfa(&self) -> DTFA_R { - DTFA_R::new(((self.bits >> 16) & 3) as u8) + pub fn dtfa(&self) -> DtfaR { + DtfaR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 24 - DTI PRS 0 Fault Enable"] #[inline(always)] - pub fn dtprs0fen(&self) -> DTPRS0FEN_R { - DTPRS0FEN_R::new(((self.bits >> 24) & 1) != 0) + pub fn dtprs0fen(&self) -> Dtprs0fenR { + Dtprs0fenR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - DTI PRS 1 Fault Enable"] #[inline(always)] - pub fn dtprs1fen(&self) -> DTPRS1FEN_R { - DTPRS1FEN_R::new(((self.bits >> 25) & 1) != 0) + pub fn dtprs1fen(&self) -> Dtprs1fenR { + Dtprs1fenR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - DTI Debugger Fault Enable"] #[inline(always)] - pub fn dtdbgfen(&self) -> DTDBGFEN_R { - DTDBGFEN_R::new(((self.bits >> 26) & 1) != 0) + pub fn dtdbgfen(&self) -> DtdbgfenR { + DtdbgfenR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - DTI Lockup Fault Enable"] #[inline(always)] - pub fn dtlockupfen(&self) -> DTLOCKUPFEN_R { - DTLOCKUPFEN_R::new(((self.bits >> 27) & 1) != 0) + pub fn dtlockupfen(&self) -> DtlockupfenR { + DtlockupfenR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - DTI EM23 Fault Enable"] #[inline(always)] - pub fn dtem23fen(&self) -> DTEM23FEN_R { - DTEM23FEN_R::new(((self.bits >> 28) & 1) != 0) + pub fn dtem23fen(&self) -> Dtem23fenR { + Dtem23fenR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bits 16:17 - DTI Fault Action"] #[inline(always)] #[must_use] - pub fn dtfa(&mut self) -> DTFA_W<16> { - DTFA_W::new(self) + pub fn dtfa(&mut self) -> DtfaW { + DtfaW::new(self, 16) } #[doc = "Bit 24 - DTI PRS 0 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtprs0fen(&mut self) -> DTPRS0FEN_W<24> { - DTPRS0FEN_W::new(self) + pub fn dtprs0fen(&mut self) -> Dtprs0fenW { + Dtprs0fenW::new(self, 24) } #[doc = "Bit 25 - DTI PRS 1 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtprs1fen(&mut self) -> DTPRS1FEN_W<25> { - DTPRS1FEN_W::new(self) + pub fn dtprs1fen(&mut self) -> Dtprs1fenW { + Dtprs1fenW::new(self, 25) } #[doc = "Bit 26 - DTI Debugger Fault Enable"] #[inline(always)] #[must_use] - pub fn dtdbgfen(&mut self) -> DTDBGFEN_W<26> { - DTDBGFEN_W::new(self) + pub fn dtdbgfen(&mut self) -> DtdbgfenW { + DtdbgfenW::new(self, 26) } #[doc = "Bit 27 - DTI Lockup Fault Enable"] #[inline(always)] #[must_use] - pub fn dtlockupfen(&mut self) -> DTLOCKUPFEN_W<27> { - DTLOCKUPFEN_W::new(self) + pub fn dtlockupfen(&mut self) -> DtlockupfenW { + DtlockupfenW::new(self, 27) } #[doc = "Bit 28 - DTI EM23 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtem23fen(&mut self) -> DTEM23FEN_W<28> { - DTEM23FEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtem23fen(&mut self) -> Dtem23fenW { + Dtem23fenW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfcfg](index.html) module"] -pub struct DTFCFG_SPEC; -impl crate::RegisterSpec for DTFCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfcfgSpec; +impl crate::RegisterSpec for DtfcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtfcfg::R](R) reader structure"] -impl crate::Readable for DTFCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtfcfg::W](W) writer structure"] -impl crate::Writable for DTFCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtfcfg::R`](R) reader structure"] +impl crate::Readable for DtfcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dtfcfg::W`](W) writer structure"] +impl crate::Writable for DtfcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTFCFG to value 0"] -impl crate::Resettable for DTFCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtlock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtlock.rs index 434789a..5ce63f5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtlock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtlock.rs @@ -1,73 +1,55 @@ #[doc = "Register `DTLOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "DTI Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum DTILOCKKEY_AW { +pub enum Dtilockkey { #[doc = "52864: Write to unlock TIMER DTI registers"] - UNLOCK = 52864, + Unlock = 52864, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: DTILOCKKEY_AW) -> Self { + fn from(variant: Dtilockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Dtilockkey { + type Ux = u16; +} +impl crate::IsEnum for Dtilockkey {} #[doc = "Field `DTILOCKKEY` writer - DTI Lock Key"] -pub type DTILOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, DTLOCK_SPEC, u16, DTILOCKKEY_AW, 16, O>; -impl<'a, const O: u8> DTILOCKKEY_W<'a, O> { +pub type DtilockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Dtilockkey>; +impl<'a, REG> DtilockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unlock TIMER DTI registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(DTILOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Dtilockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - DTI Lock Key"] #[inline(always)] #[must_use] - pub fn dtilockkey(&mut self) -> DTILOCKKEY_W<0> { - DTILOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtilockkey(&mut self) -> DtilockkeyW { + DtilockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtlock](index.html) module"] -pub struct DTLOCK_SPEC; -impl crate::RegisterSpec for DTLOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtlock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtlockSpec; +impl crate::RegisterSpec for DtlockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [dtlock::W](W) writer structure"] -impl crate::Writable for DTLOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`dtlock::W`](W) writer structure"] +impl crate::Writable for DtlockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTLOCK to value 0"] -impl crate::Resettable for DTLOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtlockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtogen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtogen.rs index 818b4bb..35926ca 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtogen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dtogen.rs @@ -1,155 +1,115 @@ #[doc = "Register `DTOGEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTOGEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTOGCC0EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC0EN_R = crate::BitReader; +pub type Dtogcc0enR = crate::BitReader; #[doc = "Field `DTOGCC0EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCC1EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC1EN_R = crate::BitReader; +pub type Dtogcc1enR = crate::BitReader; #[doc = "Field `DTOGCC1EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCC2EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC2EN_R = crate::BitReader; +pub type Dtogcc2enR = crate::BitReader; #[doc = "Field `DTOGCC2EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC2EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc2enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI0EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI0EN_R = crate::BitReader; +pub type Dtogcdti0enR = crate::BitReader; #[doc = "Field `DTOGCDTI0EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI1EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI1EN_R = crate::BitReader; +pub type Dtogcdti1enR = crate::BitReader; #[doc = "Field `DTOGCDTI1EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI2EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI2EN_R = crate::BitReader; +pub type Dtogcdti2enR = crate::BitReader; #[doc = "Field `DTOGCDTI2EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI2EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti2enW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc0en(&self) -> DTOGCC0EN_R { - DTOGCC0EN_R::new((self.bits & 1) != 0) + pub fn dtogcc0en(&self) -> Dtogcc0enR { + Dtogcc0enR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc1en(&self) -> DTOGCC1EN_R { - DTOGCC1EN_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtogcc1en(&self) -> Dtogcc1enR { + Dtogcc1enR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc2en(&self) -> DTOGCC2EN_R { - DTOGCC2EN_R::new(((self.bits >> 2) & 1) != 0) + pub fn dtogcc2en(&self) -> Dtogcc2enR { + Dtogcc2enR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti0en(&self) -> DTOGCDTI0EN_R { - DTOGCDTI0EN_R::new(((self.bits >> 3) & 1) != 0) + pub fn dtogcdti0en(&self) -> Dtogcdti0enR { + Dtogcdti0enR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti1en(&self) -> DTOGCDTI1EN_R { - DTOGCDTI1EN_R::new(((self.bits >> 4) & 1) != 0) + pub fn dtogcdti1en(&self) -> Dtogcdti1enR { + Dtogcdti1enR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti2en(&self) -> DTOGCDTI2EN_R { - DTOGCDTI2EN_R::new(((self.bits >> 5) & 1) != 0) + pub fn dtogcdti2en(&self) -> Dtogcdti2enR { + Dtogcdti2enR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc0en(&mut self) -> DTOGCC0EN_W<0> { - DTOGCC0EN_W::new(self) + pub fn dtogcc0en(&mut self) -> Dtogcc0enW { + Dtogcc0enW::new(self, 0) } #[doc = "Bit 1 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc1en(&mut self) -> DTOGCC1EN_W<1> { - DTOGCC1EN_W::new(self) + pub fn dtogcc1en(&mut self) -> Dtogcc1enW { + Dtogcc1enW::new(self, 1) } #[doc = "Bit 2 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc2en(&mut self) -> DTOGCC2EN_W<2> { - DTOGCC2EN_W::new(self) + pub fn dtogcc2en(&mut self) -> Dtogcc2enW { + Dtogcc2enW::new(self, 2) } #[doc = "Bit 3 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti0en(&mut self) -> DTOGCDTI0EN_W<3> { - DTOGCDTI0EN_W::new(self) + pub fn dtogcdti0en(&mut self) -> Dtogcdti0enW { + Dtogcdti0enW::new(self, 3) } #[doc = "Bit 4 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti1en(&mut self) -> DTOGCDTI1EN_W<4> { - DTOGCDTI1EN_W::new(self) + pub fn dtogcdti1en(&mut self) -> Dtogcdti1enW { + Dtogcdti1enW::new(self, 4) } #[doc = "Bit 5 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti2en(&mut self) -> DTOGCDTI2EN_W<5> { - DTOGCDTI2EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtogcdti2en(&mut self) -> Dtogcdti2enW { + Dtogcdti2enW::new(self, 5) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtogen](index.html) module"] -pub struct DTOGEN_SPEC; -impl crate::RegisterSpec for DTOGEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtogen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtogen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtogenSpec; +impl crate::RegisterSpec for DtogenSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtogen::R](R) reader structure"] -impl crate::Readable for DTOGEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtogen::W](W) writer structure"] -impl crate::Writable for DTOGEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtogen::R`](R) reader structure"] +impl crate::Readable for DtogenSpec {} +#[doc = "`write(|w| ..)` method takes [`dtogen::W`](W) writer structure"] +impl crate::Writable for DtogenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTOGEN to value 0"] -impl crate::Resettable for DTOGEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtogenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dttimecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dttimecfg.rs index 63e4c73..9577f86 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dttimecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/dttimecfg.rs @@ -1,110 +1,70 @@ #[doc = "Register `DTTIMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTTIMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTPRESC` reader - DTI Prescaler Setting"] -pub type DTPRESC_R = crate::FieldReader; +pub type DtprescR = crate::FieldReader; #[doc = "Field `DTPRESC` writer - DTI Prescaler Setting"] -pub type DTPRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u16, u16, 10, O>; +pub type DtprescW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `DTRISET` reader - DTI Rise-time"] -pub type DTRISET_R = crate::FieldReader; +pub type DtrisetR = crate::FieldReader; #[doc = "Field `DTRISET` writer - DTI Rise-time"] -pub type DTRISET_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u8, u8, 6, O>; +pub type DtrisetW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `DTFALLT` reader - DTI Fall-time"] -pub type DTFALLT_R = crate::FieldReader; +pub type DtfalltR = crate::FieldReader; #[doc = "Field `DTFALLT` writer - DTI Fall-time"] -pub type DTFALLT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u8, u8, 6, O>; +pub type DtfalltW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:9 - DTI Prescaler Setting"] #[inline(always)] - pub fn dtpresc(&self) -> DTPRESC_R { - DTPRESC_R::new((self.bits & 0x03ff) as u16) + pub fn dtpresc(&self) -> DtprescR { + DtprescR::new((self.bits & 0x03ff) as u16) } #[doc = "Bits 10:15 - DTI Rise-time"] #[inline(always)] - pub fn dtriset(&self) -> DTRISET_R { - DTRISET_R::new(((self.bits >> 10) & 0x3f) as u8) + pub fn dtriset(&self) -> DtrisetR { + DtrisetR::new(((self.bits >> 10) & 0x3f) as u8) } #[doc = "Bits 16:21 - DTI Fall-time"] #[inline(always)] - pub fn dtfallt(&self) -> DTFALLT_R { - DTFALLT_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn dtfallt(&self) -> DtfalltR { + DtfalltR::new(((self.bits >> 16) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:9 - DTI Prescaler Setting"] #[inline(always)] #[must_use] - pub fn dtpresc(&mut self) -> DTPRESC_W<0> { - DTPRESC_W::new(self) + pub fn dtpresc(&mut self) -> DtprescW { + DtprescW::new(self, 0) } #[doc = "Bits 10:15 - DTI Rise-time"] #[inline(always)] #[must_use] - pub fn dtriset(&mut self) -> DTRISET_W<10> { - DTRISET_W::new(self) + pub fn dtriset(&mut self) -> DtrisetW { + DtrisetW::new(self, 10) } #[doc = "Bits 16:21 - DTI Fall-time"] #[inline(always)] #[must_use] - pub fn dtfallt(&mut self) -> DTFALLT_W<16> { - DTFALLT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtfallt(&mut self) -> DtfalltW { + DtfalltW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dttimecfg](index.html) module"] -pub struct DTTIMECFG_SPEC; -impl crate::RegisterSpec for DTTIMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dttimecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dttimecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DttimecfgSpec; +impl crate::RegisterSpec for DttimecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dttimecfg::R](R) reader structure"] -impl crate::Readable for DTTIMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dttimecfg::W](W) writer structure"] -impl crate::Writable for DTTIMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dttimecfg::R`](R) reader structure"] +impl crate::Readable for DttimecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dttimecfg::W`](W) writer structure"] +impl crate::Writable for DttimecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTTIMECFG to value 0"] -impl crate::Resettable for DTTIMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DttimecfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/en.rs index 9392483..303507b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Timer Module Enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Timer Module Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Timer Module Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Timer Module Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/ien.rs index 66588d7..73273ef 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/ien.rs @@ -1,290 +1,250 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OF` reader - Overflow Interrupt Enable"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Enable"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UF` reader - Underflow Interrupt Enable"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Enable"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DIRCHG` reader - Direction Change Detect Interrupt Enable"] -pub type DIRCHG_R = crate::BitReader; +pub type DirchgR = crate::BitReader; #[doc = "Field `DIRCHG` writer - Direction Change Detect Interrupt Enable"] -pub type DIRCHG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type DirchgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC0` reader - CC0 Interrupt Enable"] -pub type CC0_R = crate::BitReader; +pub type Cc0R = crate::BitReader; #[doc = "Field `CC0` writer - CC0 Interrupt Enable"] -pub type CC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1` reader - CC1 Interrupt Enable"] -pub type CC1_R = crate::BitReader; +pub type Cc1R = crate::BitReader; #[doc = "Field `CC1` writer - CC1 Interrupt Enable"] -pub type CC1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2` reader - CC2 Interrupt Enable"] -pub type CC2_R = crate::BitReader; +pub type Cc2R = crate::BitReader; #[doc = "Field `CC2` writer - CC2 Interrupt Enable"] -pub type CC2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL0` reader - ICFWLFULL0 Interrupt Enable"] -pub type ICFWLFULL0_R = crate::BitReader; +pub type Icfwlfull0R = crate::BitReader; #[doc = "Field `ICFWLFULL0` writer - ICFWLFULL0 Interrupt Enable"] -pub type ICFWLFULL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL1` reader - ICFWLFULL1 Interrupt Enable"] -pub type ICFWLFULL1_R = crate::BitReader; +pub type Icfwlfull1R = crate::BitReader; #[doc = "Field `ICFWLFULL1` writer - ICFWLFULL1 Interrupt Enable"] -pub type ICFWLFULL1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL2` reader - ICFWLFULL2 Interrupt Enable"] -pub type ICFWLFULL2_R = crate::BitReader; +pub type Icfwlfull2R = crate::BitReader; #[doc = "Field `ICFWLFULL2` writer - ICFWLFULL2 Interrupt Enable"] -pub type ICFWLFULL2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF0` reader - ICFOF0 Interrupt Enable"] -pub type ICFOF0_R = crate::BitReader; +pub type Icfof0R = crate::BitReader; #[doc = "Field `ICFOF0` writer - ICFOF0 Interrupt Enable"] -pub type ICFOF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF1` reader - ICFOF1 Interrupt Enable"] -pub type ICFOF1_R = crate::BitReader; +pub type Icfof1R = crate::BitReader; #[doc = "Field `ICFOF1` writer - ICFOF1 Interrupt Enable"] -pub type ICFOF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF2` reader - ICFOF2 Interrupt Enable"] -pub type ICFOF2_R = crate::BitReader; +pub type Icfof2R = crate::BitReader; #[doc = "Field `ICFOF2` writer - ICFOF2 Interrupt Enable"] -pub type ICFOF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF0` reader - ICFUF0 Interrupt Enable"] -pub type ICFUF0_R = crate::BitReader; +pub type Icfuf0R = crate::BitReader; #[doc = "Field `ICFUF0` writer - ICFUF0 Interrupt Enable"] -pub type ICFUF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF1` reader - ICFUF1 Interrupt Enable"] -pub type ICFUF1_R = crate::BitReader; +pub type Icfuf1R = crate::BitReader; #[doc = "Field `ICFUF1` writer - ICFUF1 Interrupt Enable"] -pub type ICFUF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF2` reader - ICFUF2 Interrupt Enable"] -pub type ICFUF2_R = crate::BitReader; +pub type Icfuf2R = crate::BitReader; #[doc = "Field `ICFUF2` writer - ICFUF2 Interrupt Enable"] -pub type ICFUF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Enable"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new((self.bits & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Underflow Interrupt Enable"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new(((self.bits >> 1) & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Direction Change Detect Interrupt Enable"] #[inline(always)] - pub fn dirchg(&self) -> DIRCHG_R { - DIRCHG_R::new(((self.bits >> 2) & 1) != 0) + pub fn dirchg(&self) -> DirchgR { + DirchgR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - CC0 Interrupt Enable"] #[inline(always)] - pub fn cc0(&self) -> CC0_R { - CC0_R::new(((self.bits >> 4) & 1) != 0) + pub fn cc0(&self) -> Cc0R { + Cc0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CC1 Interrupt Enable"] #[inline(always)] - pub fn cc1(&self) -> CC1_R { - CC1_R::new(((self.bits >> 5) & 1) != 0) + pub fn cc1(&self) -> Cc1R { + Cc1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - CC2 Interrupt Enable"] #[inline(always)] - pub fn cc2(&self) -> CC2_R { - CC2_R::new(((self.bits >> 6) & 1) != 0) + pub fn cc2(&self) -> Cc2R { + Cc2R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 16 - ICFWLFULL0 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull0(&self) -> ICFWLFULL0_R { - ICFWLFULL0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfwlfull0(&self) -> Icfwlfull0R { + Icfwlfull0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - ICFWLFULL1 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull1(&self) -> ICFWLFULL1_R { - ICFWLFULL1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfwlfull1(&self) -> Icfwlfull1R { + Icfwlfull1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - ICFWLFULL2 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull2(&self) -> ICFWLFULL2_R { - ICFWLFULL2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfwlfull2(&self) -> Icfwlfull2R { + Icfwlfull2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - ICFOF0 Interrupt Enable"] #[inline(always)] - pub fn icfof0(&self) -> ICFOF0_R { - ICFOF0_R::new(((self.bits >> 20) & 1) != 0) + pub fn icfof0(&self) -> Icfof0R { + Icfof0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - ICFOF1 Interrupt Enable"] #[inline(always)] - pub fn icfof1(&self) -> ICFOF1_R { - ICFOF1_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfof1(&self) -> Icfof1R { + Icfof1R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - ICFOF2 Interrupt Enable"] #[inline(always)] - pub fn icfof2(&self) -> ICFOF2_R { - ICFOF2_R::new(((self.bits >> 22) & 1) != 0) + pub fn icfof2(&self) -> Icfof2R { + Icfof2R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 24 - ICFUF0 Interrupt Enable"] #[inline(always)] - pub fn icfuf0(&self) -> ICFUF0_R { - ICFUF0_R::new(((self.bits >> 24) & 1) != 0) + pub fn icfuf0(&self) -> Icfuf0R { + Icfuf0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - ICFUF1 Interrupt Enable"] #[inline(always)] - pub fn icfuf1(&self) -> ICFUF1_R { - ICFUF1_R::new(((self.bits >> 25) & 1) != 0) + pub fn icfuf1(&self) -> Icfuf1R { + Icfuf1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - ICFUF2 Interrupt Enable"] #[inline(always)] - pub fn icfuf2(&self) -> ICFUF2_R { - ICFUF2_R::new(((self.bits >> 26) & 1) != 0) + pub fn icfuf2(&self) -> Icfuf2R { + Icfuf2R::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<0> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 0) } #[doc = "Bit 1 - Underflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<1> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 1) } #[doc = "Bit 2 - Direction Change Detect Interrupt Enable"] #[inline(always)] #[must_use] - pub fn dirchg(&mut self) -> DIRCHG_W<2> { - DIRCHG_W::new(self) + pub fn dirchg(&mut self) -> DirchgW { + DirchgW::new(self, 2) } #[doc = "Bit 4 - CC0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc0(&mut self) -> CC0_W<4> { - CC0_W::new(self) + pub fn cc0(&mut self) -> Cc0W { + Cc0W::new(self, 4) } #[doc = "Bit 5 - CC1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc1(&mut self) -> CC1_W<5> { - CC1_W::new(self) + pub fn cc1(&mut self) -> Cc1W { + Cc1W::new(self, 5) } #[doc = "Bit 6 - CC2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc2(&mut self) -> CC2_W<6> { - CC2_W::new(self) + pub fn cc2(&mut self) -> Cc2W { + Cc2W::new(self, 6) } #[doc = "Bit 16 - ICFWLFULL0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull0(&mut self) -> ICFWLFULL0_W<16> { - ICFWLFULL0_W::new(self) + pub fn icfwlfull0(&mut self) -> Icfwlfull0W { + Icfwlfull0W::new(self, 16) } #[doc = "Bit 17 - ICFWLFULL1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull1(&mut self) -> ICFWLFULL1_W<17> { - ICFWLFULL1_W::new(self) + pub fn icfwlfull1(&mut self) -> Icfwlfull1W { + Icfwlfull1W::new(self, 17) } #[doc = "Bit 18 - ICFWLFULL2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull2(&mut self) -> ICFWLFULL2_W<18> { - ICFWLFULL2_W::new(self) + pub fn icfwlfull2(&mut self) -> Icfwlfull2W { + Icfwlfull2W::new(self, 18) } #[doc = "Bit 20 - ICFOF0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof0(&mut self) -> ICFOF0_W<20> { - ICFOF0_W::new(self) + pub fn icfof0(&mut self) -> Icfof0W { + Icfof0W::new(self, 20) } #[doc = "Bit 21 - ICFOF1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof1(&mut self) -> ICFOF1_W<21> { - ICFOF1_W::new(self) + pub fn icfof1(&mut self) -> Icfof1W { + Icfof1W::new(self, 21) } #[doc = "Bit 22 - ICFOF2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof2(&mut self) -> ICFOF2_W<22> { - ICFOF2_W::new(self) + pub fn icfof2(&mut self) -> Icfof2W { + Icfof2W::new(self, 22) } #[doc = "Bit 24 - ICFUF0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf0(&mut self) -> ICFUF0_W<24> { - ICFUF0_W::new(self) + pub fn icfuf0(&mut self) -> Icfuf0W { + Icfuf0W::new(self, 24) } #[doc = "Bit 25 - ICFUF1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf1(&mut self) -> ICFUF1_W<25> { - ICFUF1_W::new(self) + pub fn icfuf1(&mut self) -> Icfuf1W { + Icfuf1W::new(self, 25) } #[doc = "Bit 26 - ICFUF2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf2(&mut self) -> ICFUF2_W<26> { - ICFUF2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfuf2(&mut self) -> Icfuf2W { + Icfuf2W::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/if_.rs index edde0f3..fad1cd1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/if_.rs @@ -1,290 +1,250 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OF` reader - Overflow Interrupt Flag"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Flag"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UF` reader - Underflow Interrupt Flag"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Flag"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DIRCHG` reader - Direction Change Detect Interrupt Flag"] -pub type DIRCHG_R = crate::BitReader; +pub type DirchgR = crate::BitReader; #[doc = "Field `DIRCHG` writer - Direction Change Detect Interrupt Flag"] -pub type DIRCHG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type DirchgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC0` reader - Capture Compare Channel 0 Interrupt Flag"] -pub type CC0_R = crate::BitReader; +pub type Cc0R = crate::BitReader; #[doc = "Field `CC0` writer - Capture Compare Channel 0 Interrupt Flag"] -pub type CC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1` reader - Capture Compare Channel 1 Interrupt Flag"] -pub type CC1_R = crate::BitReader; +pub type Cc1R = crate::BitReader; #[doc = "Field `CC1` writer - Capture Compare Channel 1 Interrupt Flag"] -pub type CC1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2` reader - Capture Compare Channel 2 Interrupt Flag"] -pub type CC2_R = crate::BitReader; +pub type Cc2R = crate::BitReader; #[doc = "Field `CC2` writer - Capture Compare Channel 2 Interrupt Flag"] -pub type CC2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL0` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL0_R = crate::BitReader; +pub type Icfwlfull0R = crate::BitReader; #[doc = "Field `ICFWLFULL0` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL1` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL1_R = crate::BitReader; +pub type Icfwlfull1R = crate::BitReader; #[doc = "Field `ICFWLFULL1` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL2` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL2_R = crate::BitReader; +pub type Icfwlfull2R = crate::BitReader; #[doc = "Field `ICFWLFULL2` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF0` reader - Input Capture FIFO overflow"] -pub type ICFOF0_R = crate::BitReader; +pub type Icfof0R = crate::BitReader; #[doc = "Field `ICFOF0` writer - Input Capture FIFO overflow"] -pub type ICFOF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF1` reader - Input Capture FIFO overflow"] -pub type ICFOF1_R = crate::BitReader; +pub type Icfof1R = crate::BitReader; #[doc = "Field `ICFOF1` writer - Input Capture FIFO overflow"] -pub type ICFOF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF2` reader - Input Capture FIFO overflow"] -pub type ICFOF2_R = crate::BitReader; +pub type Icfof2R = crate::BitReader; #[doc = "Field `ICFOF2` writer - Input Capture FIFO overflow"] -pub type ICFOF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF0` reader - Input capture FIFO underflow"] -pub type ICFUF0_R = crate::BitReader; +pub type Icfuf0R = crate::BitReader; #[doc = "Field `ICFUF0` writer - Input capture FIFO underflow"] -pub type ICFUF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF1` reader - Input capture FIFO underflow"] -pub type ICFUF1_R = crate::BitReader; +pub type Icfuf1R = crate::BitReader; #[doc = "Field `ICFUF1` writer - Input capture FIFO underflow"] -pub type ICFUF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF2` reader - Input capture FIFO underflow"] -pub type ICFUF2_R = crate::BitReader; +pub type Icfuf2R = crate::BitReader; #[doc = "Field `ICFUF2` writer - Input capture FIFO underflow"] -pub type ICFUF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new((self.bits & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Underflow Interrupt Flag"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new(((self.bits >> 1) & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] - pub fn dirchg(&self) -> DIRCHG_R { - DIRCHG_R::new(((self.bits >> 2) & 1) != 0) + pub fn dirchg(&self) -> DirchgR { + DirchgR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Capture Compare Channel 0 Interrupt Flag"] #[inline(always)] - pub fn cc0(&self) -> CC0_R { - CC0_R::new(((self.bits >> 4) & 1) != 0) + pub fn cc0(&self) -> Cc0R { + Cc0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Capture Compare Channel 1 Interrupt Flag"] #[inline(always)] - pub fn cc1(&self) -> CC1_R { - CC1_R::new(((self.bits >> 5) & 1) != 0) + pub fn cc1(&self) -> Cc1R { + Cc1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Capture Compare Channel 2 Interrupt Flag"] #[inline(always)] - pub fn cc2(&self) -> CC2_R { - CC2_R::new(((self.bits >> 6) & 1) != 0) + pub fn cc2(&self) -> Cc2R { + Cc2R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 16 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull0(&self) -> ICFWLFULL0_R { - ICFWLFULL0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfwlfull0(&self) -> Icfwlfull0R { + Icfwlfull0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull1(&self) -> ICFWLFULL1_R { - ICFWLFULL1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfwlfull1(&self) -> Icfwlfull1R { + Icfwlfull1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull2(&self) -> ICFWLFULL2_R { - ICFWLFULL2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfwlfull2(&self) -> Icfwlfull2R { + Icfwlfull2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof0(&self) -> ICFOF0_R { - ICFOF0_R::new(((self.bits >> 20) & 1) != 0) + pub fn icfof0(&self) -> Icfof0R { + Icfof0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof1(&self) -> ICFOF1_R { - ICFOF1_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfof1(&self) -> Icfof1R { + Icfof1R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof2(&self) -> ICFOF2_R { - ICFOF2_R::new(((self.bits >> 22) & 1) != 0) + pub fn icfof2(&self) -> Icfof2R { + Icfof2R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 24 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf0(&self) -> ICFUF0_R { - ICFUF0_R::new(((self.bits >> 24) & 1) != 0) + pub fn icfuf0(&self) -> Icfuf0R { + Icfuf0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf1(&self) -> ICFUF1_R { - ICFUF1_R::new(((self.bits >> 25) & 1) != 0) + pub fn icfuf1(&self) -> Icfuf1R { + Icfuf1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf2(&self) -> ICFUF2_R { - ICFUF2_R::new(((self.bits >> 26) & 1) != 0) + pub fn icfuf2(&self) -> Icfuf2R { + Icfuf2R::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<0> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 0) } #[doc = "Bit 1 - Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<1> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 1) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] #[must_use] - pub fn dirchg(&mut self) -> DIRCHG_W<2> { - DIRCHG_W::new(self) + pub fn dirchg(&mut self) -> DirchgW { + DirchgW::new(self, 2) } #[doc = "Bit 4 - Capture Compare Channel 0 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc0(&mut self) -> CC0_W<4> { - CC0_W::new(self) + pub fn cc0(&mut self) -> Cc0W { + Cc0W::new(self, 4) } #[doc = "Bit 5 - Capture Compare Channel 1 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc1(&mut self) -> CC1_W<5> { - CC1_W::new(self) + pub fn cc1(&mut self) -> Cc1W { + Cc1W::new(self, 5) } #[doc = "Bit 6 - Capture Compare Channel 2 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc2(&mut self) -> CC2_W<6> { - CC2_W::new(self) + pub fn cc2(&mut self) -> Cc2W { + Cc2W::new(self, 6) } #[doc = "Bit 16 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull0(&mut self) -> ICFWLFULL0_W<16> { - ICFWLFULL0_W::new(self) + pub fn icfwlfull0(&mut self) -> Icfwlfull0W { + Icfwlfull0W::new(self, 16) } #[doc = "Bit 17 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull1(&mut self) -> ICFWLFULL1_W<17> { - ICFWLFULL1_W::new(self) + pub fn icfwlfull1(&mut self) -> Icfwlfull1W { + Icfwlfull1W::new(self, 17) } #[doc = "Bit 18 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull2(&mut self) -> ICFWLFULL2_W<18> { - ICFWLFULL2_W::new(self) + pub fn icfwlfull2(&mut self) -> Icfwlfull2W { + Icfwlfull2W::new(self, 18) } #[doc = "Bit 20 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof0(&mut self) -> ICFOF0_W<20> { - ICFOF0_W::new(self) + pub fn icfof0(&mut self) -> Icfof0W { + Icfof0W::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof1(&mut self) -> ICFOF1_W<21> { - ICFOF1_W::new(self) + pub fn icfof1(&mut self) -> Icfof1W { + Icfof1W::new(self, 21) } #[doc = "Bit 22 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof2(&mut self) -> ICFOF2_W<22> { - ICFOF2_W::new(self) + pub fn icfof2(&mut self) -> Icfof2W { + Icfof2W::new(self, 22) } #[doc = "Bit 24 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf0(&mut self) -> ICFUF0_W<24> { - ICFUF0_W::new(self) + pub fn icfuf0(&mut self) -> Icfuf0W { + Icfuf0W::new(self, 24) } #[doc = "Bit 25 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf1(&mut self) -> ICFUF1_W<25> { - ICFUF1_W::new(self) + pub fn icfuf1(&mut self) -> Icfuf1W { + Icfuf1W::new(self, 25) } #[doc = "Bit 26 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf2(&mut self) -> ICFUF2_W<26> { - ICFUF2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfuf2(&mut self) -> Icfuf2W { + Icfuf2W::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/ipversion.rs index fd8f758..0b161f8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/lock.rs index 4d444ca..4d6d1fe 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Timer Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "52864: Write to unlock TIMER registers"] - UNLOCK = 52864, + Unlock = 52864, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Timer Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unlock TIMER registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Timer Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/status.rs index 1a2964d..25d646e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/status.rs @@ -1,339 +1,324 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RUNNING` reader - Running"] -pub type RUNNING_R = crate::BitReader; -#[doc = "Field `DIR` reader - Direction"] -pub type DIR_R = crate::BitReader; +pub type RunningR = crate::BitReader; #[doc = "Direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DIR_A { +pub enum Dir { #[doc = "0: Counting up"] - UP = 0, + Up = 0, #[doc = "1: Counting down"] - DOWN = 1, + Down = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DIR_A) -> Self { + fn from(variant: Dir) -> Self { variant as u8 != 0 } } -impl DIR_R { +#[doc = "Field `DIR` reader - Direction"] +pub type DirR = crate::BitReader; +impl DirR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DIR_A { + pub const fn variant(&self) -> Dir { match self.bits { - false => DIR_A::UP, - true => DIR_A::DOWN, + false => Dir::Up, + true => Dir::Down, } } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Counting up"] #[inline(always)] pub fn is_up(&self) -> bool { - *self == DIR_A::UP + *self == Dir::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Counting down"] #[inline(always)] pub fn is_down(&self) -> bool { - *self == DIR_A::DOWN + *self == Dir::Down } } #[doc = "Field `TOPBV` reader - TOP Buffer Valid"] -pub type TOPBV_R = crate::BitReader; -#[doc = "Field `TIMERLOCKSTATUS` reader - Timer lock status"] -pub type TIMERLOCKSTATUS_R = crate::BitReader; +pub type TopbvR = crate::BitReader; #[doc = "Timer lock status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TIMERLOCKSTATUS_A { +pub enum Timerlockstatus { #[doc = "0: TIMER registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: TIMER registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TIMERLOCKSTATUS_A) -> Self { + fn from(variant: Timerlockstatus) -> Self { variant as u8 != 0 } } -impl TIMERLOCKSTATUS_R { +#[doc = "Field `TIMERLOCKSTATUS` reader - Timer lock status"] +pub type TimerlockstatusR = crate::BitReader; +impl TimerlockstatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TIMERLOCKSTATUS_A { + pub const fn variant(&self) -> Timerlockstatus { match self.bits { - false => TIMERLOCKSTATUS_A::UNLOCKED, - true => TIMERLOCKSTATUS_A::LOCKED, + false => Timerlockstatus::Unlocked, + true => Timerlockstatus::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "TIMER registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == TIMERLOCKSTATUS_A::UNLOCKED + *self == Timerlockstatus::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "TIMER registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == TIMERLOCKSTATUS_A::LOCKED + *self == Timerlockstatus::Locked } } -#[doc = "Field `DTILOCKSTATUS` reader - DTI lock status"] -pub type DTILOCKSTATUS_R = crate::BitReader; #[doc = "DTI lock status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DTILOCKSTATUS_A { +pub enum Dtilockstatus { #[doc = "0: DTI registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: DTI registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DTILOCKSTATUS_A) -> Self { + fn from(variant: Dtilockstatus) -> Self { variant as u8 != 0 } } -impl DTILOCKSTATUS_R { +#[doc = "Field `DTILOCKSTATUS` reader - DTI lock status"] +pub type DtilockstatusR = crate::BitReader; +impl DtilockstatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTILOCKSTATUS_A { + pub const fn variant(&self) -> Dtilockstatus { match self.bits { - false => DTILOCKSTATUS_A::UNLOCKED, - true => DTILOCKSTATUS_A::LOCKED, + false => Dtilockstatus::Unlocked, + true => Dtilockstatus::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "DTI registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == DTILOCKSTATUS_A::UNLOCKED + *self == Dtilockstatus::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "DTI registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == DTILOCKSTATUS_A::LOCKED + *self == Dtilockstatus::Locked } } #[doc = "Field `SYNCBUSY` reader - Sync Busy"] -pub type SYNCBUSY_R = crate::BitReader; +pub type SyncbusyR = crate::BitReader; #[doc = "Field `OCBV0` reader - Output Compare Buffer Valid"] -pub type OCBV0_R = crate::BitReader; +pub type Ocbv0R = crate::BitReader; #[doc = "Field `OCBV1` reader - Output Compare Buffer Valid"] -pub type OCBV1_R = crate::BitReader; +pub type Ocbv1R = crate::BitReader; #[doc = "Field `OCBV2` reader - Output Compare Buffer Valid"] -pub type OCBV2_R = crate::BitReader; +pub type Ocbv2R = crate::BitReader; #[doc = "Field `ICFEMPTY0` reader - Input capture fifo empty"] -pub type ICFEMPTY0_R = crate::BitReader; +pub type Icfempty0R = crate::BitReader; #[doc = "Field `ICFEMPTY1` reader - Input capture fifo empty"] -pub type ICFEMPTY1_R = crate::BitReader; +pub type Icfempty1R = crate::BitReader; #[doc = "Field `ICFEMPTY2` reader - Input capture fifo empty"] -pub type ICFEMPTY2_R = crate::BitReader; -#[doc = "Field `CCPOL0` reader - Compare/Capture Polarity"] -pub type CCPOL0_R = crate::BitReader; +pub type Icfempty2R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL0_A { +pub enum Ccpol0 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL0_A) -> Self { + fn from(variant: Ccpol0) -> Self { variant as u8 != 0 } } -impl CCPOL0_R { +#[doc = "Field `CCPOL0` reader - Compare/Capture Polarity"] +pub type Ccpol0R = crate::BitReader; +impl Ccpol0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL0_A { + pub const fn variant(&self) -> Ccpol0 { match self.bits { - false => CCPOL0_A::LOWRISE, - true => CCPOL0_A::HIGHFALL, + false => Ccpol0::Lowrise, + true => Ccpol0::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL0_A::LOWRISE + *self == Ccpol0::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL0_A::HIGHFALL + *self == Ccpol0::Highfall } } -#[doc = "Field `CCPOL1` reader - Compare/Capture Polarity"] -pub type CCPOL1_R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL1_A { +pub enum Ccpol1 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL1_A) -> Self { + fn from(variant: Ccpol1) -> Self { variant as u8 != 0 } } -impl CCPOL1_R { +#[doc = "Field `CCPOL1` reader - Compare/Capture Polarity"] +pub type Ccpol1R = crate::BitReader; +impl Ccpol1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL1_A { + pub const fn variant(&self) -> Ccpol1 { match self.bits { - false => CCPOL1_A::LOWRISE, - true => CCPOL1_A::HIGHFALL, + false => Ccpol1::Lowrise, + true => Ccpol1::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL1_A::LOWRISE + *self == Ccpol1::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL1_A::HIGHFALL + *self == Ccpol1::Highfall } } -#[doc = "Field `CCPOL2` reader - Compare/Capture Polarity"] -pub type CCPOL2_R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL2_A { +pub enum Ccpol2 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL2_A) -> Self { + fn from(variant: Ccpol2) -> Self { variant as u8 != 0 } } -impl CCPOL2_R { +#[doc = "Field `CCPOL2` reader - Compare/Capture Polarity"] +pub type Ccpol2R = crate::BitReader; +impl Ccpol2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL2_A { + pub const fn variant(&self) -> Ccpol2 { match self.bits { - false => CCPOL2_A::LOWRISE, - true => CCPOL2_A::HIGHFALL, + false => Ccpol2::Lowrise, + true => Ccpol2::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL2_A::LOWRISE + *self == Ccpol2::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL2_A::HIGHFALL + *self == Ccpol2::Highfall } } impl R { #[doc = "Bit 0 - Running"] #[inline(always)] - pub fn running(&self) -> RUNNING_R { - RUNNING_R::new((self.bits & 1) != 0) + pub fn running(&self) -> RunningR { + RunningR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Direction"] #[inline(always)] - pub fn dir(&self) -> DIR_R { - DIR_R::new(((self.bits >> 1) & 1) != 0) + pub fn dir(&self) -> DirR { + DirR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - TOP Buffer Valid"] #[inline(always)] - pub fn topbv(&self) -> TOPBV_R { - TOPBV_R::new(((self.bits >> 2) & 1) != 0) + pub fn topbv(&self) -> TopbvR { + TopbvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Timer lock status"] #[inline(always)] - pub fn timerlockstatus(&self) -> TIMERLOCKSTATUS_R { - TIMERLOCKSTATUS_R::new(((self.bits >> 4) & 1) != 0) + pub fn timerlockstatus(&self) -> TimerlockstatusR { + TimerlockstatusR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DTI lock status"] #[inline(always)] - pub fn dtilockstatus(&self) -> DTILOCKSTATUS_R { - DTILOCKSTATUS_R::new(((self.bits >> 5) & 1) != 0) + pub fn dtilockstatus(&self) -> DtilockstatusR { + DtilockstatusR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Sync Busy"] #[inline(always)] - pub fn syncbusy(&self) -> SYNCBUSY_R { - SYNCBUSY_R::new(((self.bits >> 6) & 1) != 0) + pub fn syncbusy(&self) -> SyncbusyR { + SyncbusyR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv0(&self) -> OCBV0_R { - OCBV0_R::new(((self.bits >> 8) & 1) != 0) + pub fn ocbv0(&self) -> Ocbv0R { + Ocbv0R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv1(&self) -> OCBV1_R { - OCBV1_R::new(((self.bits >> 9) & 1) != 0) + pub fn ocbv1(&self) -> Ocbv1R { + Ocbv1R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv2(&self) -> OCBV2_R { - OCBV2_R::new(((self.bits >> 10) & 1) != 0) + pub fn ocbv2(&self) -> Ocbv2R { + Ocbv2R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 16 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty0(&self) -> ICFEMPTY0_R { - ICFEMPTY0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfempty0(&self) -> Icfempty0R { + Icfempty0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty1(&self) -> ICFEMPTY1_R { - ICFEMPTY1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfempty1(&self) -> Icfempty1R { + Icfempty1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty2(&self) -> ICFEMPTY2_R { - ICFEMPTY2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfempty2(&self) -> Icfempty2R { + Icfempty2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 24 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol0(&self) -> CCPOL0_R { - CCPOL0_R::new(((self.bits >> 24) & 1) != 0) + pub fn ccpol0(&self) -> Ccpol0R { + Ccpol0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol1(&self) -> CCPOL1_R { - CCPOL1_R::new(((self.bits >> 25) & 1) != 0) + pub fn ccpol1(&self) -> Ccpol1R { + Ccpol1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol2(&self) -> CCPOL2_R { - CCPOL2_R::new(((self.bits >> 26) & 1) != 0) + pub fn ccpol2(&self) -> Ccpol2R { + Ccpol2R::new(((self.bits >> 26) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/top.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/top.rs index 65df306..6799f48 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/top.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/top.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOP` reader - Counter Top Value"] -pub type TOP_R = crate::FieldReader; +pub type TopR = crate::FieldReader; #[doc = "Field `TOP` writer - Counter Top Value"] -pub type TOP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOP_SPEC, u16, u16, 16, O>; +pub type TopW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Top Value"] #[inline(always)] - pub fn top(&self) -> TOP_R { - TOP_R::new((self.bits & 0xffff) as u16) + pub fn top(&self) -> TopR { + TopR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Top Value"] #[inline(always)] #[must_use] - pub fn top(&mut self) -> TOP_W<0> { - TOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn top(&mut self) -> TopW { + TopW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [top](index.html) module"] -pub struct TOP_SPEC; -impl crate::RegisterSpec for TOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopSpec; +impl crate::RegisterSpec for TopSpec { type Ux = u32; } -#[doc = "`read()` method returns [top::R](R) reader structure"] -impl crate::Readable for TOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [top::W](W) writer structure"] -impl crate::Writable for TOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`top::R`](R) reader structure"] +impl crate::Readable for TopSpec {} +#[doc = "`write(|w| ..)` method takes [`top::W`](W) writer structure"] +impl crate::Writable for TopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOP to value 0xffff"] -impl crate::Resettable for TOP_SPEC { - const RESET_VALUE: Self::Ux = 0xffff; +impl crate::Resettable for TopSpec { + const RESET_VALUE: u32 = 0xffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/topb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/topb.rs index 012fd04..e6c7e8c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/topb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_ns/topb.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOPB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOPB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOPB` reader - Counter Top Buffer Register"] -pub type TOPB_R = crate::FieldReader; +pub type TopbR = crate::FieldReader; #[doc = "Field `TOPB` writer - Counter Top Buffer Register"] -pub type TOPB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOPB_SPEC, u16, u16, 16, O>; +pub type TopbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Top Buffer Register"] #[inline(always)] - pub fn topb(&self) -> TOPB_R { - TOPB_R::new((self.bits & 0xffff) as u16) + pub fn topb(&self) -> TopbR { + TopbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Top Buffer Register"] #[inline(always)] #[must_use] - pub fn topb(&mut self) -> TOPB_W<0> { - TOPB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn topb(&mut self) -> TopbW { + TopbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [topb](index.html) module"] -pub struct TOPB_SPEC; -impl crate::RegisterSpec for TOPB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopbSpec; +impl crate::RegisterSpec for TopbSpec { type Ux = u32; } -#[doc = "`read()` method returns [topb::R](R) reader structure"] -impl crate::Readable for TOPB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [topb::W](W) writer structure"] -impl crate::Writable for TOPB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`topb::R`](R) reader structure"] +impl crate::Readable for TopbSpec {} +#[doc = "`write(|w| ..)` method takes [`topb::W`](W) writer structure"] +impl crate::Writable for TopbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOPB to value 0"] -impl crate::Resettable for TOPB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TopbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s.rs index 50b1dd4..e4e8a9b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s.rs @@ -1,240 +1,470 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + cfg: Cfg, + ctrl: Ctrl, + cmd: Cmd, + status: Status, + if_: If, + ien: Ien, + top: Top, + topb: Topb, + cnt: Cnt, + _reserved10: [u8; 0x04], + lock: Lock, + en: En, + _reserved12: [u8; 0x2c], + cc0_cfg: Cc0Cfg, + cc0_ctrl: Cc0Ctrl, + cc0_oc: Cc0Oc, + _reserved15: [u8; 0x04], + cc0_ocb: Cc0Ocb, + cc0_icf: Cc0Icf, + cc0_icof: Cc0Icof, + _reserved18: [u8; 0x04], + cc1_cfg: Cc1Cfg, + cc1_ctrl: Cc1Ctrl, + cc1_oc: Cc1Oc, + _reserved21: [u8; 0x04], + cc1_ocb: Cc1Ocb, + cc1_icf: Cc1Icf, + cc1_icof: Cc1Icof, + _reserved24: [u8; 0x04], + cc2_cfg: Cc2Cfg, + cc2_ctrl: Cc2Ctrl, + cc2_oc: Cc2Oc, + _reserved27: [u8; 0x04], + cc2_ocb: Cc2Ocb, + cc2_icf: Cc2Icf, + cc2_icof: Cc2Icof, + _reserved30: [u8; 0x24], + dtcfg: Dtcfg, + dttimecfg: Dttimecfg, + dtfcfg: Dtfcfg, + dtctrl: Dtctrl, + dtogen: Dtogen, + dtfault: Dtfault, + dtfaultc: Dtfaultc, + dtlock: Dtlock, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x08 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x0c - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x10 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x14 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x18 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x1c - No Description"] - pub top: TOP, + #[inline(always)] + pub const fn top(&self) -> &Top { + &self.top + } #[doc = "0x20 - No Description"] - pub topb: TOPB, + #[inline(always)] + pub const fn topb(&self) -> &Topb { + &self.topb + } #[doc = "0x24 - No Description"] - pub cnt: CNT, - _reserved10: [u8; 0x04], + #[inline(always)] + pub const fn cnt(&self) -> &Cnt { + &self.cnt + } #[doc = "0x2c - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x30 - No Description"] - pub en: EN, - _reserved12: [u8; 0x2c], + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x60 - No Description"] - pub cc0_cfg: CC0_CFG, + #[inline(always)] + pub const fn cc0_cfg(&self) -> &Cc0Cfg { + &self.cc0_cfg + } #[doc = "0x64 - No Description"] - pub cc0_ctrl: CC0_CTRL, + #[inline(always)] + pub const fn cc0_ctrl(&self) -> &Cc0Ctrl { + &self.cc0_ctrl + } #[doc = "0x68 - No Description"] - pub cc0_oc: CC0_OC, - _reserved15: [u8; 0x04], + #[inline(always)] + pub const fn cc0_oc(&self) -> &Cc0Oc { + &self.cc0_oc + } #[doc = "0x70 - No Description"] - pub cc0_ocb: CC0_OCB, + #[inline(always)] + pub const fn cc0_ocb(&self) -> &Cc0Ocb { + &self.cc0_ocb + } #[doc = "0x74 - No Description"] - pub cc0_icf: CC0_ICF, + #[inline(always)] + pub const fn cc0_icf(&self) -> &Cc0Icf { + &self.cc0_icf + } #[doc = "0x78 - No Description"] - pub cc0_icof: CC0_ICOF, - _reserved18: [u8; 0x04], + #[inline(always)] + pub const fn cc0_icof(&self) -> &Cc0Icof { + &self.cc0_icof + } #[doc = "0x80 - No Description"] - pub cc1_cfg: CC1_CFG, + #[inline(always)] + pub const fn cc1_cfg(&self) -> &Cc1Cfg { + &self.cc1_cfg + } #[doc = "0x84 - No Description"] - pub cc1_ctrl: CC1_CTRL, + #[inline(always)] + pub const fn cc1_ctrl(&self) -> &Cc1Ctrl { + &self.cc1_ctrl + } #[doc = "0x88 - No Description"] - pub cc1_oc: CC1_OC, - _reserved21: [u8; 0x04], + #[inline(always)] + pub const fn cc1_oc(&self) -> &Cc1Oc { + &self.cc1_oc + } #[doc = "0x90 - No Description"] - pub cc1_ocb: CC1_OCB, + #[inline(always)] + pub const fn cc1_ocb(&self) -> &Cc1Ocb { + &self.cc1_ocb + } #[doc = "0x94 - No Description"] - pub cc1_icf: CC1_ICF, + #[inline(always)] + pub const fn cc1_icf(&self) -> &Cc1Icf { + &self.cc1_icf + } #[doc = "0x98 - No Description"] - pub cc1_icof: CC1_ICOF, - _reserved24: [u8; 0x04], + #[inline(always)] + pub const fn cc1_icof(&self) -> &Cc1Icof { + &self.cc1_icof + } #[doc = "0xa0 - No Description"] - pub cc2_cfg: CC2_CFG, + #[inline(always)] + pub const fn cc2_cfg(&self) -> &Cc2Cfg { + &self.cc2_cfg + } #[doc = "0xa4 - No Description"] - pub cc2_ctrl: CC2_CTRL, + #[inline(always)] + pub const fn cc2_ctrl(&self) -> &Cc2Ctrl { + &self.cc2_ctrl + } #[doc = "0xa8 - No Description"] - pub cc2_oc: CC2_OC, - _reserved27: [u8; 0x04], + #[inline(always)] + pub const fn cc2_oc(&self) -> &Cc2Oc { + &self.cc2_oc + } #[doc = "0xb0 - No Description"] - pub cc2_ocb: CC2_OCB, + #[inline(always)] + pub const fn cc2_ocb(&self) -> &Cc2Ocb { + &self.cc2_ocb + } #[doc = "0xb4 - No Description"] - pub cc2_icf: CC2_ICF, + #[inline(always)] + pub const fn cc2_icf(&self) -> &Cc2Icf { + &self.cc2_icf + } #[doc = "0xb8 - No Description"] - pub cc2_icof: CC2_ICOF, - _reserved30: [u8; 0x24], + #[inline(always)] + pub const fn cc2_icof(&self) -> &Cc2Icof { + &self.cc2_icof + } #[doc = "0xe0 - No Description"] - pub dtcfg: DTCFG, + #[inline(always)] + pub const fn dtcfg(&self) -> &Dtcfg { + &self.dtcfg + } #[doc = "0xe4 - No Description"] - pub dttimecfg: DTTIMECFG, + #[inline(always)] + pub const fn dttimecfg(&self) -> &Dttimecfg { + &self.dttimecfg + } #[doc = "0xe8 - No Description"] - pub dtfcfg: DTFCFG, + #[inline(always)] + pub const fn dtfcfg(&self) -> &Dtfcfg { + &self.dtfcfg + } #[doc = "0xec - No Description"] - pub dtctrl: DTCTRL, + #[inline(always)] + pub const fn dtctrl(&self) -> &Dtctrl { + &self.dtctrl + } #[doc = "0xf0 - No Description"] - pub dtogen: DTOGEN, + #[inline(always)] + pub const fn dtogen(&self) -> &Dtogen { + &self.dtogen + } #[doc = "0xf4 - No Description"] - pub dtfault: DTFAULT, + #[inline(always)] + pub const fn dtfault(&self) -> &Dtfault { + &self.dtfault + } #[doc = "0xf8 - No Description"] - pub dtfaultc: DTFAULTC, + #[inline(always)] + pub const fn dtfaultc(&self) -> &Dtfaultc { + &self.dtfaultc + } #[doc = "0xfc - No Description"] - pub dtlock: DTLOCK, + #[inline(always)] + pub const fn dtlock(&self) -> &Dtlock { + &self.dtlock + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "TOP (rw) register accessor: an alias for `Reg`"] -pub type TOP = crate::Reg; +#[doc = "TOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@top`] +module"] +#[doc(alias = "TOP")] +pub type Top = crate::Reg; #[doc = "No Description"] pub mod top; -#[doc = "TOPB (rw) register accessor: an alias for `Reg`"] -pub type TOPB = crate::Reg; +#[doc = "TOPB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@topb`] +module"] +#[doc(alias = "TOPB")] +pub type Topb = crate::Reg; #[doc = "No Description"] pub mod topb; -#[doc = "CNT (rw) register accessor: an alias for `Reg`"] -pub type CNT = crate::Reg; +#[doc = "CNT (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnt`] +module"] +#[doc(alias = "CNT")] +pub type Cnt = crate::Reg; #[doc = "No Description"] pub mod cnt; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CC0_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC0_CFG = crate::Reg; +#[doc = "CC0_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_cfg`] +module"] +#[doc(alias = "CC0_CFG")] +pub type Cc0Cfg = crate::Reg; #[doc = "No Description"] pub mod cc0_cfg; -#[doc = "CC0_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC0_CTRL = crate::Reg; +#[doc = "CC0_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_ctrl`] +module"] +#[doc(alias = "CC0_CTRL")] +pub type Cc0Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc0_ctrl; -#[doc = "CC0_OC (rw) register accessor: an alias for `Reg`"] -pub type CC0_OC = crate::Reg; +#[doc = "CC0_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_oc`] +module"] +#[doc(alias = "CC0_OC")] +pub type Cc0Oc = crate::Reg; #[doc = "No Description"] pub mod cc0_oc; -#[doc = "CC0_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC0_OCB = crate::Reg; +#[doc = "CC0_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_ocb`] +module"] +#[doc(alias = "CC0_OCB")] +pub type Cc0Ocb = crate::Reg; #[doc = "No Description"] pub mod cc0_ocb; -#[doc = "CC0_ICF (r) register accessor: an alias for `Reg`"] -pub type CC0_ICF = crate::Reg; +#[doc = "CC0_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_icf`] +module"] +#[doc(alias = "CC0_ICF")] +pub type Cc0Icf = crate::Reg; #[doc = "No Description"] pub mod cc0_icf; -#[doc = "CC0_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC0_ICOF = crate::Reg; +#[doc = "CC0_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_icof`] +module"] +#[doc(alias = "CC0_ICOF")] +pub type Cc0Icof = crate::Reg; #[doc = "No Description"] pub mod cc0_icof; -#[doc = "CC1_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC1_CFG = crate::Reg; +#[doc = "CC1_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_cfg`] +module"] +#[doc(alias = "CC1_CFG")] +pub type Cc1Cfg = crate::Reg; #[doc = "No Description"] pub mod cc1_cfg; -#[doc = "CC1_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC1_CTRL = crate::Reg; +#[doc = "CC1_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_ctrl`] +module"] +#[doc(alias = "CC1_CTRL")] +pub type Cc1Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc1_ctrl; -#[doc = "CC1_OC (rw) register accessor: an alias for `Reg`"] -pub type CC1_OC = crate::Reg; +#[doc = "CC1_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_oc`] +module"] +#[doc(alias = "CC1_OC")] +pub type Cc1Oc = crate::Reg; #[doc = "No Description"] pub mod cc1_oc; -#[doc = "CC1_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC1_OCB = crate::Reg; +#[doc = "CC1_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_ocb`] +module"] +#[doc(alias = "CC1_OCB")] +pub type Cc1Ocb = crate::Reg; #[doc = "No Description"] pub mod cc1_ocb; -#[doc = "CC1_ICF (r) register accessor: an alias for `Reg`"] -pub type CC1_ICF = crate::Reg; +#[doc = "CC1_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_icf`] +module"] +#[doc(alias = "CC1_ICF")] +pub type Cc1Icf = crate::Reg; #[doc = "No Description"] pub mod cc1_icf; -#[doc = "CC1_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC1_ICOF = crate::Reg; +#[doc = "CC1_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_icof`] +module"] +#[doc(alias = "CC1_ICOF")] +pub type Cc1Icof = crate::Reg; #[doc = "No Description"] pub mod cc1_icof; -#[doc = "CC2_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC2_CFG = crate::Reg; +#[doc = "CC2_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_cfg`] +module"] +#[doc(alias = "CC2_CFG")] +pub type Cc2Cfg = crate::Reg; #[doc = "No Description"] pub mod cc2_cfg; -#[doc = "CC2_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC2_CTRL = crate::Reg; +#[doc = "CC2_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_ctrl`] +module"] +#[doc(alias = "CC2_CTRL")] +pub type Cc2Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc2_ctrl; -#[doc = "CC2_OC (rw) register accessor: an alias for `Reg`"] -pub type CC2_OC = crate::Reg; +#[doc = "CC2_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_oc`] +module"] +#[doc(alias = "CC2_OC")] +pub type Cc2Oc = crate::Reg; #[doc = "No Description"] pub mod cc2_oc; -#[doc = "CC2_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC2_OCB = crate::Reg; +#[doc = "CC2_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_ocb`] +module"] +#[doc(alias = "CC2_OCB")] +pub type Cc2Ocb = crate::Reg; #[doc = "No Description"] pub mod cc2_ocb; -#[doc = "CC2_ICF (r) register accessor: an alias for `Reg`"] -pub type CC2_ICF = crate::Reg; +#[doc = "CC2_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_icf`] +module"] +#[doc(alias = "CC2_ICF")] +pub type Cc2Icf = crate::Reg; #[doc = "No Description"] pub mod cc2_icf; -#[doc = "CC2_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC2_ICOF = crate::Reg; +#[doc = "CC2_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_icof`] +module"] +#[doc(alias = "CC2_ICOF")] +pub type Cc2Icof = crate::Reg; #[doc = "No Description"] pub mod cc2_icof; -#[doc = "DTCFG (rw) register accessor: an alias for `Reg`"] -pub type DTCFG = crate::Reg; +#[doc = "DTCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtcfg`] +module"] +#[doc(alias = "DTCFG")] +pub type Dtcfg = crate::Reg; #[doc = "No Description"] pub mod dtcfg; -#[doc = "DTTIMECFG (rw) register accessor: an alias for `Reg`"] -pub type DTTIMECFG = crate::Reg; +#[doc = "DTTIMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dttimecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dttimecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dttimecfg`] +module"] +#[doc(alias = "DTTIMECFG")] +pub type Dttimecfg = crate::Reg; #[doc = "No Description"] pub mod dttimecfg; -#[doc = "DTFCFG (rw) register accessor: an alias for `Reg`"] -pub type DTFCFG = crate::Reg; +#[doc = "DTFCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfcfg`] +module"] +#[doc(alias = "DTFCFG")] +pub type Dtfcfg = crate::Reg; #[doc = "No Description"] pub mod dtfcfg; -#[doc = "DTCTRL (rw) register accessor: an alias for `Reg`"] -pub type DTCTRL = crate::Reg; +#[doc = "DTCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtctrl`] +module"] +#[doc(alias = "DTCTRL")] +pub type Dtctrl = crate::Reg; #[doc = "No Description"] pub mod dtctrl; -#[doc = "DTOGEN (rw) register accessor: an alias for `Reg`"] -pub type DTOGEN = crate::Reg; +#[doc = "DTOGEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtogen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtogen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtogen`] +module"] +#[doc(alias = "DTOGEN")] +pub type Dtogen = crate::Reg; #[doc = "No Description"] pub mod dtogen; -#[doc = "DTFAULT (r) register accessor: an alias for `Reg`"] -pub type DTFAULT = crate::Reg; +#[doc = "DTFAULT (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfault::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfault`] +module"] +#[doc(alias = "DTFAULT")] +pub type Dtfault = crate::Reg; #[doc = "No Description"] pub mod dtfault; -#[doc = "DTFAULTC (w) register accessor: an alias for `Reg`"] -pub type DTFAULTC = crate::Reg; +#[doc = "DTFAULTC (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfaultc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfaultc`] +module"] +#[doc(alias = "DTFAULTC")] +pub type Dtfaultc = crate::Reg; #[doc = "No Description"] pub mod dtfaultc; -#[doc = "DTLOCK (w) register accessor: an alias for `Reg`"] -pub type DTLOCK = crate::Reg; +#[doc = "DTLOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtlock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtlock`] +module"] +#[doc(alias = "DTLOCK")] +pub type Dtlock = crate::Reg; #[doc = "No Description"] pub mod dtlock; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc0_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc0_cfg.rs index 547eeb0..b3aac62 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc0_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc0_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC0_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC0_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_cfg](index.html) module"] -pub struct CC0_CFG_SPEC; -impl crate::RegisterSpec for CC0_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0CfgSpec; +impl crate::RegisterSpec for Cc0CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_cfg::R](R) reader structure"] -impl crate::Readable for CC0_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_cfg::W](W) writer structure"] -impl crate::Writable for CC0_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_cfg::R`](R) reader structure"] +impl crate::Readable for Cc0CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_cfg::W`](W) writer structure"] +impl crate::Writable for Cc0CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_CFG to value 0"] -impl crate::Resettable for CC0_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc0_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc0_ctrl.rs index 71b40e4..1b92d0c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc0_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc0_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC0_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_ctrl](index.html) module"] -pub struct CC0_CTRL_SPEC; -impl crate::RegisterSpec for CC0_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0CtrlSpec; +impl crate::RegisterSpec for Cc0CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_ctrl::R](R) reader structure"] -impl crate::Readable for CC0_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_ctrl::W](W) writer structure"] -impl crate::Writable for CC0_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc0CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc0CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_CTRL to value 0"] -impl crate::Resettable for CC0_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc0_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc0_icf.rs index f4a2c64..6afddea 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc0_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc0_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC0_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new((self.bits & 0xffff) as u16) + pub fn icf(&self) -> IcfR { + IcfR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_icf](index.html) module"] -pub struct CC0_ICF_SPEC; -impl crate::RegisterSpec for CC0_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0IcfSpec; +impl crate::RegisterSpec for Cc0IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_icf::R](R) reader structure"] -impl crate::Readable for CC0_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc0_icf::R`](R) reader structure"] +impl crate::Readable for Cc0IcfSpec {} #[doc = "`reset()` method sets CC0_ICF to value 0"] -impl crate::Resettable for CC0_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc0_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc0_icof.rs index 1ea3983..7653eef 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc0_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc0_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC0_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new((self.bits & 0xffff) as u16) + pub fn icof(&self) -> IcofR { + IcofR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_icof](index.html) module"] -pub struct CC0_ICOF_SPEC; -impl crate::RegisterSpec for CC0_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0IcofSpec; +impl crate::RegisterSpec for Cc0IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_icof::R](R) reader structure"] -impl crate::Readable for CC0_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc0_icof::R`](R) reader structure"] +impl crate::Readable for Cc0IcofSpec {} #[doc = "`reset()` method sets CC0_ICOF to value 0"] -impl crate::Resettable for CC0_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc0_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc0_oc.rs index 97be8b2..c063d52 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc0_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc0_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC0_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC0_OC_SPEC, u16, u16, 16, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new((self.bits & 0xffff) as u16) + pub fn oc(&self) -> OcR { + OcR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_oc](index.html) module"] -pub struct CC0_OC_SPEC; -impl crate::RegisterSpec for CC0_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0OcSpec; +impl crate::RegisterSpec for Cc0OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_oc::R](R) reader structure"] -impl crate::Readable for CC0_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_oc::W](W) writer structure"] -impl crate::Writable for CC0_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_oc::R`](R) reader structure"] +impl crate::Readable for Cc0OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_oc::W`](W) writer structure"] +impl crate::Writable for Cc0OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_OC to value 0"] -impl crate::Resettable for CC0_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc0_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc0_ocb.rs index af4e401..5924ded 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc0_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc0_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC0_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC0_OCB_SPEC, u16, u16, 16, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new((self.bits & 0xffff) as u16) + pub fn ocb(&self) -> OcbR { + OcbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_ocb](index.html) module"] -pub struct CC0_OCB_SPEC; -impl crate::RegisterSpec for CC0_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0OcbSpec; +impl crate::RegisterSpec for Cc0OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_ocb::R](R) reader structure"] -impl crate::Readable for CC0_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_ocb::W](W) writer structure"] -impl crate::Writable for CC0_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_ocb::R`](R) reader structure"] +impl crate::Readable for Cc0OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_ocb::W`](W) writer structure"] +impl crate::Writable for Cc0OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_OCB to value 0"] -impl crate::Resettable for CC0_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc1_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc1_cfg.rs index b3424c2..2243932 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc1_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc1_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC1_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC1_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_cfg](index.html) module"] -pub struct CC1_CFG_SPEC; -impl crate::RegisterSpec for CC1_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1CfgSpec; +impl crate::RegisterSpec for Cc1CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_cfg::R](R) reader structure"] -impl crate::Readable for CC1_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_cfg::W](W) writer structure"] -impl crate::Writable for CC1_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_cfg::R`](R) reader structure"] +impl crate::Readable for Cc1CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_cfg::W`](W) writer structure"] +impl crate::Writable for Cc1CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_CFG to value 0"] -impl crate::Resettable for CC1_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc1_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc1_ctrl.rs index 38927de..bc41282 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc1_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc1_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC1_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_ctrl](index.html) module"] -pub struct CC1_CTRL_SPEC; -impl crate::RegisterSpec for CC1_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1CtrlSpec; +impl crate::RegisterSpec for Cc1CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_ctrl::R](R) reader structure"] -impl crate::Readable for CC1_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_ctrl::W](W) writer structure"] -impl crate::Writable for CC1_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc1CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc1CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_CTRL to value 0"] -impl crate::Resettable for CC1_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc1_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc1_icf.rs index 1a7d7e8..0211b78 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc1_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc1_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC1_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new((self.bits & 0xffff) as u16) + pub fn icf(&self) -> IcfR { + IcfR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_icf](index.html) module"] -pub struct CC1_ICF_SPEC; -impl crate::RegisterSpec for CC1_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1IcfSpec; +impl crate::RegisterSpec for Cc1IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_icf::R](R) reader structure"] -impl crate::Readable for CC1_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc1_icf::R`](R) reader structure"] +impl crate::Readable for Cc1IcfSpec {} #[doc = "`reset()` method sets CC1_ICF to value 0"] -impl crate::Resettable for CC1_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc1_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc1_icof.rs index ea46e53..3fd845d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc1_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc1_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC1_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new((self.bits & 0xffff) as u16) + pub fn icof(&self) -> IcofR { + IcofR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_icof](index.html) module"] -pub struct CC1_ICOF_SPEC; -impl crate::RegisterSpec for CC1_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1IcofSpec; +impl crate::RegisterSpec for Cc1IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_icof::R](R) reader structure"] -impl crate::Readable for CC1_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc1_icof::R`](R) reader structure"] +impl crate::Readable for Cc1IcofSpec {} #[doc = "`reset()` method sets CC1_ICOF to value 0"] -impl crate::Resettable for CC1_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc1_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc1_oc.rs index 9f40c62..5b2e10b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc1_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc1_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC1_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC1_OC_SPEC, u16, u16, 16, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new((self.bits & 0xffff) as u16) + pub fn oc(&self) -> OcR { + OcR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_oc](index.html) module"] -pub struct CC1_OC_SPEC; -impl crate::RegisterSpec for CC1_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1OcSpec; +impl crate::RegisterSpec for Cc1OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_oc::R](R) reader structure"] -impl crate::Readable for CC1_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_oc::W](W) writer structure"] -impl crate::Writable for CC1_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_oc::R`](R) reader structure"] +impl crate::Readable for Cc1OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_oc::W`](W) writer structure"] +impl crate::Writable for Cc1OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_OC to value 0"] -impl crate::Resettable for CC1_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc1_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc1_ocb.rs index d3c8d9a..7d9f88b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc1_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc1_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC1_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC1_OCB_SPEC, u16, u16, 16, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new((self.bits & 0xffff) as u16) + pub fn ocb(&self) -> OcbR { + OcbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_ocb](index.html) module"] -pub struct CC1_OCB_SPEC; -impl crate::RegisterSpec for CC1_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1OcbSpec; +impl crate::RegisterSpec for Cc1OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_ocb::R](R) reader structure"] -impl crate::Readable for CC1_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_ocb::W](W) writer structure"] -impl crate::Writable for CC1_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_ocb::R`](R) reader structure"] +impl crate::Readable for Cc1OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_ocb::W`](W) writer structure"] +impl crate::Writable for Cc1OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_OCB to value 0"] -impl crate::Resettable for CC1_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc2_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc2_cfg.rs index 6b108e5..97bec45 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc2_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc2_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC2_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC2_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_cfg](index.html) module"] -pub struct CC2_CFG_SPEC; -impl crate::RegisterSpec for CC2_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2CfgSpec; +impl crate::RegisterSpec for Cc2CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_cfg::R](R) reader structure"] -impl crate::Readable for CC2_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_cfg::W](W) writer structure"] -impl crate::Writable for CC2_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_cfg::R`](R) reader structure"] +impl crate::Readable for Cc2CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_cfg::W`](W) writer structure"] +impl crate::Writable for Cc2CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_CFG to value 0"] -impl crate::Resettable for CC2_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc2_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc2_ctrl.rs index b42d120..317952a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc2_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc2_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC2_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_ctrl](index.html) module"] -pub struct CC2_CTRL_SPEC; -impl crate::RegisterSpec for CC2_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2CtrlSpec; +impl crate::RegisterSpec for Cc2CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_ctrl::R](R) reader structure"] -impl crate::Readable for CC2_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_ctrl::W](W) writer structure"] -impl crate::Writable for CC2_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc2CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc2CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_CTRL to value 0"] -impl crate::Resettable for CC2_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc2_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc2_icf.rs index 8282700..c1a0823 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc2_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc2_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC2_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new((self.bits & 0xffff) as u16) + pub fn icf(&self) -> IcfR { + IcfR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_icf](index.html) module"] -pub struct CC2_ICF_SPEC; -impl crate::RegisterSpec for CC2_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2IcfSpec; +impl crate::RegisterSpec for Cc2IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_icf::R](R) reader structure"] -impl crate::Readable for CC2_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc2_icf::R`](R) reader structure"] +impl crate::Readable for Cc2IcfSpec {} #[doc = "`reset()` method sets CC2_ICF to value 0"] -impl crate::Resettable for CC2_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc2_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc2_icof.rs index c21d7d3..0d399d1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc2_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc2_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC2_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new((self.bits & 0xffff) as u16) + pub fn icof(&self) -> IcofR { + IcofR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_icof](index.html) module"] -pub struct CC2_ICOF_SPEC; -impl crate::RegisterSpec for CC2_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2IcofSpec; +impl crate::RegisterSpec for Cc2IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_icof::R](R) reader structure"] -impl crate::Readable for CC2_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc2_icof::R`](R) reader structure"] +impl crate::Readable for Cc2IcofSpec {} #[doc = "`reset()` method sets CC2_ICOF to value 0"] -impl crate::Resettable for CC2_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc2_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc2_oc.rs index da9cc47..935617c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc2_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc2_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC2_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC2_OC_SPEC, u16, u16, 16, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new((self.bits & 0xffff) as u16) + pub fn oc(&self) -> OcR { + OcR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_oc](index.html) module"] -pub struct CC2_OC_SPEC; -impl crate::RegisterSpec for CC2_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2OcSpec; +impl crate::RegisterSpec for Cc2OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_oc::R](R) reader structure"] -impl crate::Readable for CC2_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_oc::W](W) writer structure"] -impl crate::Writable for CC2_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_oc::R`](R) reader structure"] +impl crate::Readable for Cc2OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_oc::W`](W) writer structure"] +impl crate::Writable for Cc2OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_OC to value 0"] -impl crate::Resettable for CC2_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc2_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc2_ocb.rs index 1ab93d6..ee6c4e5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc2_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cc2_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC2_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC2_OCB_SPEC, u16, u16, 16, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new((self.bits & 0xffff) as u16) + pub fn ocb(&self) -> OcbR { + OcbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_ocb](index.html) module"] -pub struct CC2_OCB_SPEC; -impl crate::RegisterSpec for CC2_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2OcbSpec; +impl crate::RegisterSpec for Cc2OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_ocb::R](R) reader structure"] -impl crate::Readable for CC2_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_ocb::W](W) writer structure"] -impl crate::Writable for CC2_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_ocb::R`](R) reader structure"] +impl crate::Readable for Cc2OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_ocb::W`](W) writer structure"] +impl crate::Writable for Cc2OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_OCB to value 0"] -impl crate::Resettable for CC2_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cfg.rs index ea2a1e1..b4cc2fd 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cfg.rs @@ -1,775 +1,774 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - Timer Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Timer Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Up-count mode"] - UP = 0, + Up = 0, #[doc = "1: Down-count mode"] - DOWN = 1, + Down = 1, #[doc = "2: Up/down-count mode"] - UPDOWN = 2, + Updown = 2, #[doc = "3: Quadrature decoder mode"] - QDEC = 3, + Qdec = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - Timer Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::UP, - 1 => MODE_A::DOWN, - 2 => MODE_A::UPDOWN, - 3 => MODE_A::QDEC, + 0 => Mode::Up, + 1 => Mode::Down, + 2 => Mode::Updown, + 3 => Mode::Qdec, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Up-count mode"] #[inline(always)] pub fn is_up(&self) -> bool { - *self == MODE_A::UP + *self == Mode::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Down-count mode"] #[inline(always)] pub fn is_down(&self) -> bool { - *self == MODE_A::DOWN + *self == Mode::Down } - #[doc = "Checks if the value of the field is `UPDOWN`"] + #[doc = "Up/down-count mode"] #[inline(always)] pub fn is_updown(&self) -> bool { - *self == MODE_A::UPDOWN + *self == Mode::Updown } - #[doc = "Checks if the value of the field is `QDEC`"] + #[doc = "Quadrature decoder mode"] #[inline(always)] pub fn is_qdec(&self) -> bool { - *self == MODE_A::QDEC + *self == Mode::Qdec } } #[doc = "Field `MODE` writer - Timer Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Up-count mode"] #[inline(always)] - pub fn up(self) -> &'a mut W { - self.variant(MODE_A::UP) + pub fn up(self) -> &'a mut crate::W { + self.variant(Mode::Up) } #[doc = "Down-count mode"] #[inline(always)] - pub fn down(self) -> &'a mut W { - self.variant(MODE_A::DOWN) + pub fn down(self) -> &'a mut crate::W { + self.variant(Mode::Down) } #[doc = "Up/down-count mode"] #[inline(always)] - pub fn updown(self) -> &'a mut W { - self.variant(MODE_A::UPDOWN) + pub fn updown(self) -> &'a mut crate::W { + self.variant(Mode::Updown) } #[doc = "Quadrature decoder mode"] #[inline(always)] - pub fn qdec(self) -> &'a mut W { - self.variant(MODE_A::QDEC) + pub fn qdec(self) -> &'a mut crate::W { + self.variant(Mode::Qdec) } } -#[doc = "Field `SYNC` reader - Timer Start/Stop/Reload Synchronization"] -pub type SYNC_R = crate::BitReader; #[doc = "Timer Start/Stop/Reload Synchronization\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYNC_A { +pub enum Sync { #[doc = "0: Timer operation is unaffected by other timers."] - DISABLE = 0, + Disable = 0, #[doc = "1: Timer may be started, stopped and re-loaded from other timer instances."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYNC_A) -> Self { + fn from(variant: Sync) -> Self { variant as u8 != 0 } } -impl SYNC_R { +#[doc = "Field `SYNC` reader - Timer Start/Stop/Reload Synchronization"] +pub type SyncR = crate::BitReader; +impl SyncR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SYNC_A { + pub const fn variant(&self) -> Sync { match self.bits { - false => SYNC_A::DISABLE, - true => SYNC_A::ENABLE, + false => Sync::Disable, + true => Sync::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Timer operation is unaffected by other timers."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == SYNC_A::DISABLE + *self == Sync::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Timer may be started, stopped and re-loaded from other timer instances."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == SYNC_A::ENABLE + *self == Sync::Enable } } #[doc = "Field `SYNC` writer - Timer Start/Stop/Reload Synchronization"] -pub type SYNC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, SYNC_A, O>; -impl<'a, const O: u8> SYNC_W<'a, O> { +pub type SyncW<'a, REG> = crate::BitWriter<'a, REG, Sync>; +impl<'a, REG> SyncW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer operation is unaffected by other timers."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(SYNC_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Sync::Disable) } #[doc = "Timer may be started, stopped and re-loaded from other timer instances."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(SYNC_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Sync::Enable) } } #[doc = "Field `OSMEN` reader - One-shot Mode Enable"] -pub type OSMEN_R = crate::BitReader; +pub type OsmenR = crate::BitReader; #[doc = "Field `OSMEN` writer - One-shot Mode Enable"] -pub type OSMEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `QDM` reader - Quadrature Decoder Mode Selection"] -pub type QDM_R = crate::BitReader; +pub type OsmenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Quadrature Decoder Mode Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum QDM_A { +pub enum Qdm { #[doc = "0: X2 mode selected"] X2 = 0, #[doc = "1: X4 mode selected"] X4 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: QDM_A) -> Self { + fn from(variant: Qdm) -> Self { variant as u8 != 0 } } -impl QDM_R { +#[doc = "Field `QDM` reader - Quadrature Decoder Mode Selection"] +pub type QdmR = crate::BitReader; +impl QdmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> QDM_A { + pub const fn variant(&self) -> Qdm { match self.bits { - false => QDM_A::X2, - true => QDM_A::X4, + false => Qdm::X2, + true => Qdm::X4, } } - #[doc = "Checks if the value of the field is `X2`"] + #[doc = "X2 mode selected"] #[inline(always)] pub fn is_x2(&self) -> bool { - *self == QDM_A::X2 + *self == Qdm::X2 } - #[doc = "Checks if the value of the field is `X4`"] + #[doc = "X4 mode selected"] #[inline(always)] pub fn is_x4(&self) -> bool { - *self == QDM_A::X4 + *self == Qdm::X4 } } #[doc = "Field `QDM` writer - Quadrature Decoder Mode Selection"] -pub type QDM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, QDM_A, O>; -impl<'a, const O: u8> QDM_W<'a, O> { +pub type QdmW<'a, REG> = crate::BitWriter<'a, REG, Qdm>; +impl<'a, REG> QdmW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "X2 mode selected"] #[inline(always)] - pub fn x2(self) -> &'a mut W { - self.variant(QDM_A::X2) + pub fn x2(self) -> &'a mut crate::W { + self.variant(Qdm::X2) } #[doc = "X4 mode selected"] #[inline(always)] - pub fn x4(self) -> &'a mut W { - self.variant(QDM_A::X4) + pub fn x4(self) -> &'a mut crate::W { + self.variant(Qdm::X4) } } -#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] -pub type DEBUGRUN_R = crate::BitReader; #[doc = "Debug Mode Run Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DEBUGRUN_A { +pub enum Debugrun { #[doc = "0: Timer is halted in debug mode"] - HALT = 0, + Halt = 0, #[doc = "1: Timer is running in debug mode"] - RUN = 1, + Run = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DEBUGRUN_A) -> Self { + fn from(variant: Debugrun) -> Self { variant as u8 != 0 } } -impl DEBUGRUN_R { +#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] +pub type DebugrunR = crate::BitReader; +impl DebugrunR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DEBUGRUN_A { + pub const fn variant(&self) -> Debugrun { match self.bits { - false => DEBUGRUN_A::HALT, - true => DEBUGRUN_A::RUN, + false => Debugrun::Halt, + true => Debugrun::Run, } } - #[doc = "Checks if the value of the field is `HALT`"] + #[doc = "Timer is halted in debug mode"] #[inline(always)] pub fn is_halt(&self) -> bool { - *self == DEBUGRUN_A::HALT + *self == Debugrun::Halt } - #[doc = "Checks if the value of the field is `RUN`"] + #[doc = "Timer is running in debug mode"] #[inline(always)] pub fn is_run(&self) -> bool { - *self == DEBUGRUN_A::RUN + *self == Debugrun::Run } } #[doc = "Field `DEBUGRUN` writer - Debug Mode Run Enable"] -pub type DEBUGRUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DEBUGRUN_A, O>; -impl<'a, const O: u8> DEBUGRUN_W<'a, O> { +pub type DebugrunW<'a, REG> = crate::BitWriter<'a, REG, Debugrun>; +impl<'a, REG> DebugrunW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer is halted in debug mode"] #[inline(always)] - pub fn halt(self) -> &'a mut W { - self.variant(DEBUGRUN_A::HALT) + pub fn halt(self) -> &'a mut crate::W { + self.variant(Debugrun::Halt) } #[doc = "Timer is running in debug mode"] #[inline(always)] - pub fn run(self) -> &'a mut W { - self.variant(DEBUGRUN_A::RUN) + pub fn run(self) -> &'a mut crate::W { + self.variant(Debugrun::Run) } } #[doc = "Field `DMACLRACT` reader - DMA Request Clear on Active"] -pub type DMACLRACT_R = crate::BitReader; +pub type DmaclractR = crate::BitReader; #[doc = "Field `DMACLRACT` writer - DMA Request Clear on Active"] -pub type DMACLRACT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `CLKSEL` reader - Clock Source Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type DmaclractW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Clock Source Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "0: Prescaled EM01GRPACLK"] - PRESCEM01GRPACLK = 0, + Prescem01grpaclk = 0, #[doc = "1: Compare/Capture Channel 1 Input"] - CC1 = 1, + Cc1 = 1, #[doc = "2: Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] - TIMEROUF = 2, + Timerouf = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Source Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKSEL_A::PRESCEM01GRPACLK), - 1 => Some(CLKSEL_A::CC1), - 2 => Some(CLKSEL_A::TIMEROUF), + 0 => Some(Clksel::Prescem01grpaclk), + 1 => Some(Clksel::Cc1), + 2 => Some(Clksel::Timerouf), _ => None, } } - #[doc = "Checks if the value of the field is `PRESCEM01GRPACLK`"] + #[doc = "Prescaled EM01GRPACLK"] #[inline(always)] pub fn is_prescem01grpaclk(&self) -> bool { - *self == CLKSEL_A::PRESCEM01GRPACLK + *self == Clksel::Prescem01grpaclk } - #[doc = "Checks if the value of the field is `CC1`"] + #[doc = "Compare/Capture Channel 1 Input"] #[inline(always)] pub fn is_cc1(&self) -> bool { - *self == CLKSEL_A::CC1 + *self == Clksel::Cc1 } - #[doc = "Checks if the value of the field is `TIMEROUF`"] + #[doc = "Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] #[inline(always)] pub fn is_timerouf(&self) -> bool { - *self == CLKSEL_A::TIMEROUF + *self == Clksel::Timerouf } } #[doc = "Field `CLKSEL` writer - Clock Source Select"] -pub type CLKSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, CLKSEL_A, 2, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Prescaled EM01GRPACLK"] #[inline(always)] - pub fn prescem01grpaclk(self) -> &'a mut W { - self.variant(CLKSEL_A::PRESCEM01GRPACLK) + pub fn prescem01grpaclk(self) -> &'a mut crate::W { + self.variant(Clksel::Prescem01grpaclk) } #[doc = "Compare/Capture Channel 1 Input"] #[inline(always)] - pub fn cc1(self) -> &'a mut W { - self.variant(CLKSEL_A::CC1) + pub fn cc1(self) -> &'a mut crate::W { + self.variant(Clksel::Cc1) } #[doc = "Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] #[inline(always)] - pub fn timerouf(self) -> &'a mut W { - self.variant(CLKSEL_A::TIMEROUF) + pub fn timerouf(self) -> &'a mut crate::W { + self.variant(Clksel::Timerouf) } } -#[doc = "Field `RETIMEEN` reader - PWM output retimed enable"] -pub type RETIMEEN_R = crate::BitReader; #[doc = "PWM output retimed enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RETIMEEN_A { +pub enum Retimeen { #[doc = "0: PWM outputs are not re-timed."] - DISABLE = 0, + Disable = 0, #[doc = "1: PWM outputs are re-timed."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RETIMEEN_A) -> Self { + fn from(variant: Retimeen) -> Self { variant as u8 != 0 } } -impl RETIMEEN_R { +#[doc = "Field `RETIMEEN` reader - PWM output retimed enable"] +pub type RetimeenR = crate::BitReader; +impl RetimeenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RETIMEEN_A { + pub const fn variant(&self) -> Retimeen { match self.bits { - false => RETIMEEN_A::DISABLE, - true => RETIMEEN_A::ENABLE, + false => Retimeen::Disable, + true => Retimeen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "PWM outputs are not re-timed."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RETIMEEN_A::DISABLE + *self == Retimeen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "PWM outputs are re-timed."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RETIMEEN_A::ENABLE + *self == Retimeen::Enable } } #[doc = "Field `RETIMEEN` writer - PWM output retimed enable"] -pub type RETIMEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, RETIMEEN_A, O>; -impl<'a, const O: u8> RETIMEEN_W<'a, O> { +pub type RetimeenW<'a, REG> = crate::BitWriter<'a, REG, Retimeen>; +impl<'a, REG> RetimeenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "PWM outputs are not re-timed."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RETIMEEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Retimeen::Disable) } #[doc = "PWM outputs are re-timed."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RETIMEEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Retimeen::Enable) } } -#[doc = "Field `DISSYNCOUT` reader - Disable Timer Start/Stop/Reload output"] -pub type DISSYNCOUT_R = crate::BitReader; #[doc = "Disable Timer Start/Stop/Reload output\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DISSYNCOUT_A { +pub enum Dissyncout { #[doc = "0: Timer can start/stop/reload other timers with SYNC bit set"] - EN = 0, + En = 0, #[doc = "1: Timer cannot start/stop/reload other timers with SYNC bit set"] - DIS = 1, + Dis = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DISSYNCOUT_A) -> Self { + fn from(variant: Dissyncout) -> Self { variant as u8 != 0 } } -impl DISSYNCOUT_R { +#[doc = "Field `DISSYNCOUT` reader - Disable Timer Start/Stop/Reload output"] +pub type DissyncoutR = crate::BitReader; +impl DissyncoutR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DISSYNCOUT_A { + pub const fn variant(&self) -> Dissyncout { match self.bits { - false => DISSYNCOUT_A::EN, - true => DISSYNCOUT_A::DIS, + false => Dissyncout::En, + true => Dissyncout::Dis, } } - #[doc = "Checks if the value of the field is `EN`"] + #[doc = "Timer can start/stop/reload other timers with SYNC bit set"] #[inline(always)] pub fn is_en(&self) -> bool { - *self == DISSYNCOUT_A::EN + *self == Dissyncout::En } - #[doc = "Checks if the value of the field is `DIS`"] + #[doc = "Timer cannot start/stop/reload other timers with SYNC bit set"] #[inline(always)] pub fn is_dis(&self) -> bool { - *self == DISSYNCOUT_A::DIS + *self == Dissyncout::Dis } } #[doc = "Field `DISSYNCOUT` writer - Disable Timer Start/Stop/Reload output"] -pub type DISSYNCOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DISSYNCOUT_A, O>; -impl<'a, const O: u8> DISSYNCOUT_W<'a, O> { +pub type DissyncoutW<'a, REG> = crate::BitWriter<'a, REG, Dissyncout>; +impl<'a, REG> DissyncoutW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer can start/stop/reload other timers with SYNC bit set"] #[inline(always)] - pub fn en(self) -> &'a mut W { - self.variant(DISSYNCOUT_A::EN) + pub fn en(self) -> &'a mut crate::W { + self.variant(Dissyncout::En) } #[doc = "Timer cannot start/stop/reload other timers with SYNC bit set"] #[inline(always)] - pub fn dis(self) -> &'a mut W { - self.variant(DISSYNCOUT_A::DIS) + pub fn dis(self) -> &'a mut crate::W { + self.variant(Dissyncout::Dis) } } #[doc = "Field `ATI` reader - Always Track Inputs"] -pub type ATI_R = crate::BitReader; +pub type AtiR = crate::BitReader; #[doc = "Field `ATI` writer - Always Track Inputs"] -pub type ATI_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type AtiW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RSSCOIST` reader - Reload-Start Sets COIST"] -pub type RSSCOIST_R = crate::BitReader; +pub type RsscoistR = crate::BitReader; #[doc = "Field `RSSCOIST` writer - Reload-Start Sets COIST"] -pub type RSSCOIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `PRESC` reader - Prescaler Setting"] -pub type PRESC_R = crate::FieldReader; +pub type RsscoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Prescaler Setting\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum PRESC_A { +pub enum Presc { #[doc = "0: No prescaling"] - DIV1 = 0, + Div1 = 0, #[doc = "1: Prescale by 2"] - DIV2 = 1, + Div2 = 1, #[doc = "3: Prescale by 4"] - DIV4 = 3, + Div4 = 3, #[doc = "7: Prescale by 8"] - DIV8 = 7, + Div8 = 7, #[doc = "15: Prescale by 16"] - DIV16 = 15, + Div16 = 15, #[doc = "31: Prescale by 32"] - DIV32 = 31, + Div32 = 31, #[doc = "63: Prescale by 64"] - DIV64 = 63, + Div64 = 63, #[doc = "127: Prescale by 128"] - DIV128 = 127, + Div128 = 127, #[doc = "255: Prescale by 256"] - DIV256 = 255, + Div256 = 255, #[doc = "511: Prescale by 512"] - DIV512 = 511, + Div512 = 511, #[doc = "1023: Prescale by 1024"] - DIV1024 = 1023, + Div1024 = 1023, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: PRESC_A) -> Self { + fn from(variant: Presc) -> Self { variant as _ } } -impl PRESC_R { +impl crate::FieldSpec for Presc { + type Ux = u16; +} +impl crate::IsEnum for Presc {} +#[doc = "Field `PRESC` reader - Prescaler Setting"] +pub type PrescR = crate::FieldReader; +impl PrescR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PRESC_A::DIV1), - 1 => Some(PRESC_A::DIV2), - 3 => Some(PRESC_A::DIV4), - 7 => Some(PRESC_A::DIV8), - 15 => Some(PRESC_A::DIV16), - 31 => Some(PRESC_A::DIV32), - 63 => Some(PRESC_A::DIV64), - 127 => Some(PRESC_A::DIV128), - 255 => Some(PRESC_A::DIV256), - 511 => Some(PRESC_A::DIV512), - 1023 => Some(PRESC_A::DIV1024), + 0 => Some(Presc::Div1), + 1 => Some(Presc::Div2), + 3 => Some(Presc::Div4), + 7 => Some(Presc::Div8), + 15 => Some(Presc::Div16), + 31 => Some(Presc::Div32), + 63 => Some(Presc::Div64), + 127 => Some(Presc::Div128), + 255 => Some(Presc::Div256), + 511 => Some(Presc::Div512), + 1023 => Some(Presc::Div1024), _ => None, } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "No prescaling"] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == PRESC_A::DIV1 + *self == Presc::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "Prescale by 2"] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == PRESC_A::DIV2 + *self == Presc::Div2 } - #[doc = "Checks if the value of the field is `DIV4`"] + #[doc = "Prescale by 4"] #[inline(always)] pub fn is_div4(&self) -> bool { - *self == PRESC_A::DIV4 + *self == Presc::Div4 } - #[doc = "Checks if the value of the field is `DIV8`"] + #[doc = "Prescale by 8"] #[inline(always)] pub fn is_div8(&self) -> bool { - *self == PRESC_A::DIV8 + *self == Presc::Div8 } - #[doc = "Checks if the value of the field is `DIV16`"] + #[doc = "Prescale by 16"] #[inline(always)] pub fn is_div16(&self) -> bool { - *self == PRESC_A::DIV16 + *self == Presc::Div16 } - #[doc = "Checks if the value of the field is `DIV32`"] + #[doc = "Prescale by 32"] #[inline(always)] pub fn is_div32(&self) -> bool { - *self == PRESC_A::DIV32 + *self == Presc::Div32 } - #[doc = "Checks if the value of the field is `DIV64`"] + #[doc = "Prescale by 64"] #[inline(always)] pub fn is_div64(&self) -> bool { - *self == PRESC_A::DIV64 + *self == Presc::Div64 } - #[doc = "Checks if the value of the field is `DIV128`"] + #[doc = "Prescale by 128"] #[inline(always)] pub fn is_div128(&self) -> bool { - *self == PRESC_A::DIV128 + *self == Presc::Div128 } - #[doc = "Checks if the value of the field is `DIV256`"] + #[doc = "Prescale by 256"] #[inline(always)] pub fn is_div256(&self) -> bool { - *self == PRESC_A::DIV256 + *self == Presc::Div256 } - #[doc = "Checks if the value of the field is `DIV512`"] + #[doc = "Prescale by 512"] #[inline(always)] pub fn is_div512(&self) -> bool { - *self == PRESC_A::DIV512 + *self == Presc::Div512 } - #[doc = "Checks if the value of the field is `DIV1024`"] + #[doc = "Prescale by 1024"] #[inline(always)] pub fn is_div1024(&self) -> bool { - *self == PRESC_A::DIV1024 + *self == Presc::Div1024 } } #[doc = "Field `PRESC` writer - Prescaler Setting"] -pub type PRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u16, PRESC_A, 10, O>; -impl<'a, const O: u8> PRESC_W<'a, O> { +pub type PrescW<'a, REG> = crate::FieldWriter<'a, REG, 10, Presc>; +impl<'a, REG> PrescW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No prescaling"] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(PRESC_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Presc::Div1) } #[doc = "Prescale by 2"] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(PRESC_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Presc::Div2) } #[doc = "Prescale by 4"] #[inline(always)] - pub fn div4(self) -> &'a mut W { - self.variant(PRESC_A::DIV4) + pub fn div4(self) -> &'a mut crate::W { + self.variant(Presc::Div4) } #[doc = "Prescale by 8"] #[inline(always)] - pub fn div8(self) -> &'a mut W { - self.variant(PRESC_A::DIV8) + pub fn div8(self) -> &'a mut crate::W { + self.variant(Presc::Div8) } #[doc = "Prescale by 16"] #[inline(always)] - pub fn div16(self) -> &'a mut W { - self.variant(PRESC_A::DIV16) + pub fn div16(self) -> &'a mut crate::W { + self.variant(Presc::Div16) } #[doc = "Prescale by 32"] #[inline(always)] - pub fn div32(self) -> &'a mut W { - self.variant(PRESC_A::DIV32) + pub fn div32(self) -> &'a mut crate::W { + self.variant(Presc::Div32) } #[doc = "Prescale by 64"] #[inline(always)] - pub fn div64(self) -> &'a mut W { - self.variant(PRESC_A::DIV64) + pub fn div64(self) -> &'a mut crate::W { + self.variant(Presc::Div64) } #[doc = "Prescale by 128"] #[inline(always)] - pub fn div128(self) -> &'a mut W { - self.variant(PRESC_A::DIV128) + pub fn div128(self) -> &'a mut crate::W { + self.variant(Presc::Div128) } #[doc = "Prescale by 256"] #[inline(always)] - pub fn div256(self) -> &'a mut W { - self.variant(PRESC_A::DIV256) + pub fn div256(self) -> &'a mut crate::W { + self.variant(Presc::Div256) } #[doc = "Prescale by 512"] #[inline(always)] - pub fn div512(self) -> &'a mut W { - self.variant(PRESC_A::DIV512) + pub fn div512(self) -> &'a mut crate::W { + self.variant(Presc::Div512) } #[doc = "Prescale by 1024"] #[inline(always)] - pub fn div1024(self) -> &'a mut W { - self.variant(PRESC_A::DIV1024) + pub fn div1024(self) -> &'a mut crate::W { + self.variant(Presc::Div1024) } } impl R { #[doc = "Bits 0:1 - Timer Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Timer Start/Stop/Reload Synchronization"] #[inline(always)] - pub fn sync(&self) -> SYNC_R { - SYNC_R::new(((self.bits >> 3) & 1) != 0) + pub fn sync(&self) -> SyncR { + SyncR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - One-shot Mode Enable"] #[inline(always)] - pub fn osmen(&self) -> OSMEN_R { - OSMEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn osmen(&self) -> OsmenR { + OsmenR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Quadrature Decoder Mode Selection"] #[inline(always)] - pub fn qdm(&self) -> QDM_R { - QDM_R::new(((self.bits >> 5) & 1) != 0) + pub fn qdm(&self) -> QdmR { + QdmR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Debug Mode Run Enable"] #[inline(always)] - pub fn debugrun(&self) -> DEBUGRUN_R { - DEBUGRUN_R::new(((self.bits >> 6) & 1) != 0) + pub fn debugrun(&self) -> DebugrunR { + DebugrunR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - DMA Request Clear on Active"] #[inline(always)] - pub fn dmaclract(&self) -> DMACLRACT_R { - DMACLRACT_R::new(((self.bits >> 7) & 1) != 0) + pub fn dmaclract(&self) -> DmaclractR { + DmaclractR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:9 - Clock Source Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 10 - PWM output retimed enable"] #[inline(always)] - pub fn retimeen(&self) -> RETIMEEN_R { - RETIMEEN_R::new(((self.bits >> 10) & 1) != 0) + pub fn retimeen(&self) -> RetimeenR { + RetimeenR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Disable Timer Start/Stop/Reload output"] #[inline(always)] - pub fn dissyncout(&self) -> DISSYNCOUT_R { - DISSYNCOUT_R::new(((self.bits >> 11) & 1) != 0) + pub fn dissyncout(&self) -> DissyncoutR { + DissyncoutR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 16 - Always Track Inputs"] #[inline(always)] - pub fn ati(&self) -> ATI_R { - ATI_R::new(((self.bits >> 16) & 1) != 0) + pub fn ati(&self) -> AtiR { + AtiR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Reload-Start Sets COIST"] #[inline(always)] - pub fn rsscoist(&self) -> RSSCOIST_R { - RSSCOIST_R::new(((self.bits >> 17) & 1) != 0) + pub fn rsscoist(&self) -> RsscoistR { + RsscoistR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:27 - Prescaler Setting"] #[inline(always)] - pub fn presc(&self) -> PRESC_R { - PRESC_R::new(((self.bits >> 18) & 0x03ff) as u16) + pub fn presc(&self) -> PrescR { + PrescR::new(((self.bits >> 18) & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:1 - Timer Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 3 - Timer Start/Stop/Reload Synchronization"] #[inline(always)] #[must_use] - pub fn sync(&mut self) -> SYNC_W<3> { - SYNC_W::new(self) + pub fn sync(&mut self) -> SyncW { + SyncW::new(self, 3) } #[doc = "Bit 4 - One-shot Mode Enable"] #[inline(always)] #[must_use] - pub fn osmen(&mut self) -> OSMEN_W<4> { - OSMEN_W::new(self) + pub fn osmen(&mut self) -> OsmenW { + OsmenW::new(self, 4) } #[doc = "Bit 5 - Quadrature Decoder Mode Selection"] #[inline(always)] #[must_use] - pub fn qdm(&mut self) -> QDM_W<5> { - QDM_W::new(self) + pub fn qdm(&mut self) -> QdmW { + QdmW::new(self, 5) } #[doc = "Bit 6 - Debug Mode Run Enable"] #[inline(always)] #[must_use] - pub fn debugrun(&mut self) -> DEBUGRUN_W<6> { - DEBUGRUN_W::new(self) + pub fn debugrun(&mut self) -> DebugrunW { + DebugrunW::new(self, 6) } #[doc = "Bit 7 - DMA Request Clear on Active"] #[inline(always)] #[must_use] - pub fn dmaclract(&mut self) -> DMACLRACT_W<7> { - DMACLRACT_W::new(self) + pub fn dmaclract(&mut self) -> DmaclractW { + DmaclractW::new(self, 7) } #[doc = "Bits 8:9 - Clock Source Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<8> { - CLKSEL_W::new(self) + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 8) } #[doc = "Bit 10 - PWM output retimed enable"] #[inline(always)] #[must_use] - pub fn retimeen(&mut self) -> RETIMEEN_W<10> { - RETIMEEN_W::new(self) + pub fn retimeen(&mut self) -> RetimeenW { + RetimeenW::new(self, 10) } #[doc = "Bit 11 - Disable Timer Start/Stop/Reload output"] #[inline(always)] #[must_use] - pub fn dissyncout(&mut self) -> DISSYNCOUT_W<11> { - DISSYNCOUT_W::new(self) + pub fn dissyncout(&mut self) -> DissyncoutW { + DissyncoutW::new(self, 11) } #[doc = "Bit 16 - Always Track Inputs"] #[inline(always)] #[must_use] - pub fn ati(&mut self) -> ATI_W<16> { - ATI_W::new(self) + pub fn ati(&mut self) -> AtiW { + AtiW::new(self, 16) } #[doc = "Bit 17 - Reload-Start Sets COIST"] #[inline(always)] #[must_use] - pub fn rsscoist(&mut self) -> RSSCOIST_W<17> { - RSSCOIST_W::new(self) + pub fn rsscoist(&mut self) -> RsscoistW { + RsscoistW::new(self, 17) } #[doc = "Bits 18:27 - Prescaler Setting"] #[inline(always)] #[must_use] - pub fn presc(&mut self) -> PRESC_W<18> { - PRESC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn presc(&mut self) -> PrescW { + PrescW::new(self, 18) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cmd.rs index ca6d3b1..bf41157 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cmd.rs @@ -1,60 +1,35 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` writer - Start Timer"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STOP` writer - Stop Timer"] -pub type STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StopW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Start Timer"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Stop Timer"] #[inline(always)] #[must_use] - pub fn stop(&mut self) -> STOP_W<1> { - STOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stop(&mut self) -> StopW { + StopW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cnt.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cnt.rs index dd37661..c870fc9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cnt.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/cnt.rs @@ -1,80 +1,40 @@ #[doc = "Register `CNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CNT` reader - Counter Value"] -pub type CNT_R = crate::FieldReader; +pub type CntR = crate::FieldReader; #[doc = "Field `CNT` writer - Counter Value"] -pub type CNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CNT_SPEC, u16, u16, 16, O>; +pub type CntW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Value"] #[inline(always)] - pub fn cnt(&self) -> CNT_R { - CNT_R::new((self.bits & 0xffff) as u16) + pub fn cnt(&self) -> CntR { + CntR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Value"] #[inline(always)] #[must_use] - pub fn cnt(&mut self) -> CNT_W<0> { - CNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cnt(&mut self) -> CntW { + CntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](index.html) module"] -pub struct CNT_SPEC; -impl crate::RegisterSpec for CNT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CntSpec; +impl crate::RegisterSpec for CntSpec { type Ux = u32; } -#[doc = "`read()` method returns [cnt::R](R) reader structure"] -impl crate::Readable for CNT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnt::W](W) writer structure"] -impl crate::Writable for CNT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cnt::R`](R) reader structure"] +impl crate::Readable for CntSpec {} +#[doc = "`write(|w| ..)` method takes [`cnt::W`](W) writer structure"] +impl crate::Writable for CntSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNT to value 0"] -impl crate::Resettable for CNT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CntSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/ctrl.rs index 08e646b..e2ed153 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/ctrl.rs @@ -1,258 +1,234 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `RISEA` reader - Timer Rising Input Edge Action"] -pub type RISEA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Timer Rising Input Edge Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RISEA_A { +pub enum Risea { #[doc = "0: No action"] - NONE = 0, + None = 0, #[doc = "1: Start counter without reload"] - START = 1, + Start = 1, #[doc = "2: Stop counter without reload"] - STOP = 2, + Stop = 2, #[doc = "3: Reload and start counter"] - RELOADSTART = 3, + Reloadstart = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RISEA_A) -> Self { + fn from(variant: Risea) -> Self { variant as _ } } -impl RISEA_R { +impl crate::FieldSpec for Risea { + type Ux = u8; +} +impl crate::IsEnum for Risea {} +#[doc = "Field `RISEA` reader - Timer Rising Input Edge Action"] +pub type RiseaR = crate::FieldReader; +impl RiseaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RISEA_A { + pub const fn variant(&self) -> Risea { match self.bits { - 0 => RISEA_A::NONE, - 1 => RISEA_A::START, - 2 => RISEA_A::STOP, - 3 => RISEA_A::RELOADSTART, + 0 => Risea::None, + 1 => Risea::Start, + 2 => Risea::Stop, + 3 => Risea::Reloadstart, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == RISEA_A::NONE + *self == Risea::None } - #[doc = "Checks if the value of the field is `START`"] + #[doc = "Start counter without reload"] #[inline(always)] pub fn is_start(&self) -> bool { - *self == RISEA_A::START + *self == Risea::Start } - #[doc = "Checks if the value of the field is `STOP`"] + #[doc = "Stop counter without reload"] #[inline(always)] pub fn is_stop(&self) -> bool { - *self == RISEA_A::STOP + *self == Risea::Stop } - #[doc = "Checks if the value of the field is `RELOADSTART`"] + #[doc = "Reload and start counter"] #[inline(always)] pub fn is_reloadstart(&self) -> bool { - *self == RISEA_A::RELOADSTART + *self == Risea::Reloadstart } } #[doc = "Field `RISEA` writer - Timer Rising Input Edge Action"] -pub type RISEA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, RISEA_A, 2, O>; -impl<'a, const O: u8> RISEA_W<'a, O> { +pub type RiseaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Risea, crate::Safe>; +impl<'a, REG> RiseaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(RISEA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Risea::None) } #[doc = "Start counter without reload"] #[inline(always)] - pub fn start(self) -> &'a mut W { - self.variant(RISEA_A::START) + pub fn start(self) -> &'a mut crate::W { + self.variant(Risea::Start) } #[doc = "Stop counter without reload"] #[inline(always)] - pub fn stop(self) -> &'a mut W { - self.variant(RISEA_A::STOP) + pub fn stop(self) -> &'a mut crate::W { + self.variant(Risea::Stop) } #[doc = "Reload and start counter"] #[inline(always)] - pub fn reloadstart(self) -> &'a mut W { - self.variant(RISEA_A::RELOADSTART) + pub fn reloadstart(self) -> &'a mut crate::W { + self.variant(Risea::Reloadstart) } } -#[doc = "Field `FALLA` reader - Timer Falling Input Edge Action"] -pub type FALLA_R = crate::FieldReader; #[doc = "Timer Falling Input Edge Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FALLA_A { +pub enum Falla { #[doc = "0: No action"] - NONE = 0, + None = 0, #[doc = "1: Start counter without reload"] - START = 1, + Start = 1, #[doc = "2: Stop counter without reload"] - STOP = 2, + Stop = 2, #[doc = "3: Reload and start counter"] - RELOADSTART = 3, + Reloadstart = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FALLA_A) -> Self { + fn from(variant: Falla) -> Self { variant as _ } } -impl FALLA_R { +impl crate::FieldSpec for Falla { + type Ux = u8; +} +impl crate::IsEnum for Falla {} +#[doc = "Field `FALLA` reader - Timer Falling Input Edge Action"] +pub type FallaR = crate::FieldReader; +impl FallaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FALLA_A { + pub const fn variant(&self) -> Falla { match self.bits { - 0 => FALLA_A::NONE, - 1 => FALLA_A::START, - 2 => FALLA_A::STOP, - 3 => FALLA_A::RELOADSTART, + 0 => Falla::None, + 1 => Falla::Start, + 2 => Falla::Stop, + 3 => Falla::Reloadstart, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == FALLA_A::NONE + *self == Falla::None } - #[doc = "Checks if the value of the field is `START`"] + #[doc = "Start counter without reload"] #[inline(always)] pub fn is_start(&self) -> bool { - *self == FALLA_A::START + *self == Falla::Start } - #[doc = "Checks if the value of the field is `STOP`"] + #[doc = "Stop counter without reload"] #[inline(always)] pub fn is_stop(&self) -> bool { - *self == FALLA_A::STOP + *self == Falla::Stop } - #[doc = "Checks if the value of the field is `RELOADSTART`"] + #[doc = "Reload and start counter"] #[inline(always)] pub fn is_reloadstart(&self) -> bool { - *self == FALLA_A::RELOADSTART + *self == Falla::Reloadstart } } #[doc = "Field `FALLA` writer - Timer Falling Input Edge Action"] -pub type FALLA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, FALLA_A, 2, O>; -impl<'a, const O: u8> FALLA_W<'a, O> { +pub type FallaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Falla, crate::Safe>; +impl<'a, REG> FallaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(FALLA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Falla::None) } #[doc = "Start counter without reload"] #[inline(always)] - pub fn start(self) -> &'a mut W { - self.variant(FALLA_A::START) + pub fn start(self) -> &'a mut crate::W { + self.variant(Falla::Start) } #[doc = "Stop counter without reload"] #[inline(always)] - pub fn stop(self) -> &'a mut W { - self.variant(FALLA_A::STOP) + pub fn stop(self) -> &'a mut crate::W { + self.variant(Falla::Stop) } #[doc = "Reload and start counter"] #[inline(always)] - pub fn reloadstart(self) -> &'a mut W { - self.variant(FALLA_A::RELOADSTART) + pub fn reloadstart(self) -> &'a mut crate::W { + self.variant(Falla::Reloadstart) } } #[doc = "Field `X2CNT` reader - 2x Count Mode"] -pub type X2CNT_R = crate::BitReader; +pub type X2cntR = crate::BitReader; #[doc = "Field `X2CNT` writer - 2x Count Mode"] -pub type X2CNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type X2cntW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - Timer Rising Input Edge Action"] #[inline(always)] - pub fn risea(&self) -> RISEA_R { - RISEA_R::new((self.bits & 3) as u8) + pub fn risea(&self) -> RiseaR { + RiseaR::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Timer Falling Input Edge Action"] #[inline(always)] - pub fn falla(&self) -> FALLA_R { - FALLA_R::new(((self.bits >> 2) & 3) as u8) + pub fn falla(&self) -> FallaR { + FallaR::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bit 4 - 2x Count Mode"] #[inline(always)] - pub fn x2cnt(&self) -> X2CNT_R { - X2CNT_R::new(((self.bits >> 4) & 1) != 0) + pub fn x2cnt(&self) -> X2cntR { + X2cntR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Timer Rising Input Edge Action"] #[inline(always)] #[must_use] - pub fn risea(&mut self) -> RISEA_W<0> { - RISEA_W::new(self) + pub fn risea(&mut self) -> RiseaW { + RiseaW::new(self, 0) } #[doc = "Bits 2:3 - Timer Falling Input Edge Action"] #[inline(always)] #[must_use] - pub fn falla(&mut self) -> FALLA_W<2> { - FALLA_W::new(self) + pub fn falla(&mut self) -> FallaW { + FallaW::new(self, 2) } #[doc = "Bit 4 - 2x Count Mode"] #[inline(always)] #[must_use] - pub fn x2cnt(&mut self) -> X2CNT_W<4> { - X2CNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn x2cnt(&mut self) -> X2cntW { + X2cntW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtcfg.rs index d19a9a3..82b97e1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtcfg.rs @@ -1,186 +1,149 @@ #[doc = "Register `DTCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTEN` reader - DTI Enable"] -pub type DTEN_R = crate::BitReader; +pub type DtenR = crate::BitReader; #[doc = "Field `DTEN` writer - DTI Enable"] -pub type DTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; -#[doc = "Field `DTDAS` reader - DTI Automatic Start-up Functionality"] -pub type DTDAS_R = crate::BitReader; +pub type DtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "DTI Automatic Start-up Functionality\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DTDAS_A { +pub enum Dtdas { #[doc = "0: No DTI restart on debugger exit"] - NORESTART = 0, + Norestart = 0, #[doc = "1: DTI restart on debugger exit"] - RESTART = 1, + Restart = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DTDAS_A) -> Self { + fn from(variant: Dtdas) -> Self { variant as u8 != 0 } } -impl DTDAS_R { +#[doc = "Field `DTDAS` reader - DTI Automatic Start-up Functionality"] +pub type DtdasR = crate::BitReader; +impl DtdasR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTDAS_A { + pub const fn variant(&self) -> Dtdas { match self.bits { - false => DTDAS_A::NORESTART, - true => DTDAS_A::RESTART, + false => Dtdas::Norestart, + true => Dtdas::Restart, } } - #[doc = "Checks if the value of the field is `NORESTART`"] + #[doc = "No DTI restart on debugger exit"] #[inline(always)] pub fn is_norestart(&self) -> bool { - *self == DTDAS_A::NORESTART + *self == Dtdas::Norestart } - #[doc = "Checks if the value of the field is `RESTART`"] + #[doc = "DTI restart on debugger exit"] #[inline(always)] pub fn is_restart(&self) -> bool { - *self == DTDAS_A::RESTART + *self == Dtdas::Restart } } #[doc = "Field `DTDAS` writer - DTI Automatic Start-up Functionality"] -pub type DTDAS_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, DTDAS_A, O>; -impl<'a, const O: u8> DTDAS_W<'a, O> { +pub type DtdasW<'a, REG> = crate::BitWriter<'a, REG, Dtdas>; +impl<'a, REG> DtdasW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No DTI restart on debugger exit"] #[inline(always)] - pub fn norestart(self) -> &'a mut W { - self.variant(DTDAS_A::NORESTART) + pub fn norestart(self) -> &'a mut crate::W { + self.variant(Dtdas::Norestart) } #[doc = "DTI restart on debugger exit"] #[inline(always)] - pub fn restart(self) -> &'a mut W { - self.variant(DTDAS_A::RESTART) + pub fn restart(self) -> &'a mut crate::W { + self.variant(Dtdas::Restart) } } #[doc = "Field `DTAR` reader - DTI Always Run"] -pub type DTAR_R = crate::BitReader; +pub type DtarR = crate::BitReader; #[doc = "Field `DTAR` writer - DTI Always Run"] -pub type DTAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtarW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTFATS` reader - DTI Fault Action on Timer Stop"] -pub type DTFATS_R = crate::BitReader; +pub type DtfatsR = crate::BitReader; #[doc = "Field `DTFATS` writer - DTI Fault Action on Timer Stop"] -pub type DTFATS_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtfatsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRSEN` reader - DTI PRS Source Enable"] -pub type DTPRSEN_R = crate::BitReader; +pub type DtprsenR = crate::BitReader; #[doc = "Field `DTPRSEN` writer - DTI PRS Source Enable"] -pub type DTPRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtprsenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI Enable"] #[inline(always)] - pub fn dten(&self) -> DTEN_R { - DTEN_R::new((self.bits & 1) != 0) + pub fn dten(&self) -> DtenR { + DtenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI Automatic Start-up Functionality"] #[inline(always)] - pub fn dtdas(&self) -> DTDAS_R { - DTDAS_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtdas(&self) -> DtdasR { + DtdasR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 9 - DTI Always Run"] #[inline(always)] - pub fn dtar(&self) -> DTAR_R { - DTAR_R::new(((self.bits >> 9) & 1) != 0) + pub fn dtar(&self) -> DtarR { + DtarR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - DTI Fault Action on Timer Stop"] #[inline(always)] - pub fn dtfats(&self) -> DTFATS_R { - DTFATS_R::new(((self.bits >> 10) & 1) != 0) + pub fn dtfats(&self) -> DtfatsR { + DtfatsR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - DTI PRS Source Enable"] #[inline(always)] - pub fn dtprsen(&self) -> DTPRSEN_R { - DTPRSEN_R::new(((self.bits >> 11) & 1) != 0) + pub fn dtprsen(&self) -> DtprsenR { + DtprsenR::new(((self.bits >> 11) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI Enable"] #[inline(always)] #[must_use] - pub fn dten(&mut self) -> DTEN_W<0> { - DTEN_W::new(self) + pub fn dten(&mut self) -> DtenW { + DtenW::new(self, 0) } #[doc = "Bit 1 - DTI Automatic Start-up Functionality"] #[inline(always)] #[must_use] - pub fn dtdas(&mut self) -> DTDAS_W<1> { - DTDAS_W::new(self) + pub fn dtdas(&mut self) -> DtdasW { + DtdasW::new(self, 1) } #[doc = "Bit 9 - DTI Always Run"] #[inline(always)] #[must_use] - pub fn dtar(&mut self) -> DTAR_W<9> { - DTAR_W::new(self) + pub fn dtar(&mut self) -> DtarW { + DtarW::new(self, 9) } #[doc = "Bit 10 - DTI Fault Action on Timer Stop"] #[inline(always)] #[must_use] - pub fn dtfats(&mut self) -> DTFATS_W<10> { - DTFATS_W::new(self) + pub fn dtfats(&mut self) -> DtfatsW { + DtfatsW::new(self, 10) } #[doc = "Bit 11 - DTI PRS Source Enable"] #[inline(always)] #[must_use] - pub fn dtprsen(&mut self) -> DTPRSEN_W<11> { - DTPRSEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtprsen(&mut self) -> DtprsenW { + DtprsenW::new(self, 11) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtcfg](index.html) module"] -pub struct DTCFG_SPEC; -impl crate::RegisterSpec for DTCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtcfgSpec; +impl crate::RegisterSpec for DtcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtcfg::R](R) reader structure"] -impl crate::Readable for DTCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtcfg::W](W) writer structure"] -impl crate::Writable for DTCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtcfg::R`](R) reader structure"] +impl crate::Readable for DtcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dtcfg::W`](W) writer structure"] +impl crate::Writable for DtcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTCFG to value 0"] -impl crate::Resettable for DTCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtctrl.rs index 816a05e..84f6d17 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtctrl.rs @@ -1,95 +1,55 @@ #[doc = "Register `DTCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTCINV` reader - DTI Complementary Output Invert."] -pub type DTCINV_R = crate::BitReader; +pub type DtcinvR = crate::BitReader; #[doc = "Field `DTCINV` writer - DTI Complementary Output Invert."] -pub type DTCINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, O>; +pub type DtcinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTIPOL` reader - DTI Inactive Polarity"] -pub type DTIPOL_R = crate::BitReader; +pub type DtipolR = crate::BitReader; #[doc = "Field `DTIPOL` writer - DTI Inactive Polarity"] -pub type DTIPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, O>; +pub type DtipolW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI Complementary Output Invert."] #[inline(always)] - pub fn dtcinv(&self) -> DTCINV_R { - DTCINV_R::new((self.bits & 1) != 0) + pub fn dtcinv(&self) -> DtcinvR { + DtcinvR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI Inactive Polarity"] #[inline(always)] - pub fn dtipol(&self) -> DTIPOL_R { - DTIPOL_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtipol(&self) -> DtipolR { + DtipolR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI Complementary Output Invert."] #[inline(always)] #[must_use] - pub fn dtcinv(&mut self) -> DTCINV_W<0> { - DTCINV_W::new(self) + pub fn dtcinv(&mut self) -> DtcinvW { + DtcinvW::new(self, 0) } #[doc = "Bit 1 - DTI Inactive Polarity"] #[inline(always)] #[must_use] - pub fn dtipol(&mut self) -> DTIPOL_W<1> { - DTIPOL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtipol(&mut self) -> DtipolW { + DtipolW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtctrl](index.html) module"] -pub struct DTCTRL_SPEC; -impl crate::RegisterSpec for DTCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtctrlSpec; +impl crate::RegisterSpec for DtctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtctrl::R](R) reader structure"] -impl crate::Readable for DTCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtctrl::W](W) writer structure"] -impl crate::Writable for DTCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtctrl::R`](R) reader structure"] +impl crate::Readable for DtctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`dtctrl::W`](W) writer structure"] +impl crate::Writable for DtctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTCTRL to value 0"] -impl crate::Resettable for DTCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtfault.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtfault.rs index 01a53f9..ecd21aa 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtfault.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtfault.rs @@ -1,65 +1,50 @@ #[doc = "Register `DTFAULT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DTPRS0F` reader - DTI PRS 0 Fault"] -pub type DTPRS0F_R = crate::BitReader; +pub type Dtprs0fR = crate::BitReader; #[doc = "Field `DTPRS1F` reader - DTI PRS 1 Fault"] -pub type DTPRS1F_R = crate::BitReader; +pub type Dtprs1fR = crate::BitReader; #[doc = "Field `DTDBGF` reader - DTI Debugger Fault"] -pub type DTDBGF_R = crate::BitReader; +pub type DtdbgfR = crate::BitReader; #[doc = "Field `DTLOCKUPF` reader - DTI Lockup Fault"] -pub type DTLOCKUPF_R = crate::BitReader; +pub type DtlockupfR = crate::BitReader; #[doc = "Field `DTEM23F` reader - DTI EM23 Entry Fault"] -pub type DTEM23F_R = crate::BitReader; +pub type Dtem23fR = crate::BitReader; impl R { #[doc = "Bit 0 - DTI PRS 0 Fault"] #[inline(always)] - pub fn dtprs0f(&self) -> DTPRS0F_R { - DTPRS0F_R::new((self.bits & 1) != 0) + pub fn dtprs0f(&self) -> Dtprs0fR { + Dtprs0fR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI PRS 1 Fault"] #[inline(always)] - pub fn dtprs1f(&self) -> DTPRS1F_R { - DTPRS1F_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtprs1f(&self) -> Dtprs1fR { + Dtprs1fR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DTI Debugger Fault"] #[inline(always)] - pub fn dtdbgf(&self) -> DTDBGF_R { - DTDBGF_R::new(((self.bits >> 2) & 1) != 0) + pub fn dtdbgf(&self) -> DtdbgfR { + DtdbgfR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DTI Lockup Fault"] #[inline(always)] - pub fn dtlockupf(&self) -> DTLOCKUPF_R { - DTLOCKUPF_R::new(((self.bits >> 3) & 1) != 0) + pub fn dtlockupf(&self) -> DtlockupfR { + DtlockupfR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - DTI EM23 Entry Fault"] #[inline(always)] - pub fn dtem23f(&self) -> DTEM23F_R { - DTEM23F_R::new(((self.bits >> 4) & 1) != 0) + pub fn dtem23f(&self) -> Dtem23fR { + Dtem23fR::new(((self.bits >> 4) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfault](index.html) module"] -pub struct DTFAULT_SPEC; -impl crate::RegisterSpec for DTFAULT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfault::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfaultSpec; +impl crate::RegisterSpec for DtfaultSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtfault::R](R) reader structure"] -impl crate::Readable for DTFAULT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`dtfault::R`](R) reader structure"] +impl crate::Readable for DtfaultSpec {} #[doc = "`reset()` method sets DTFAULT to value 0"] -impl crate::Resettable for DTFAULT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfaultSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtfaultc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtfaultc.rs index 1c3d1ba..bcb21e2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtfaultc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtfaultc.rs @@ -1,84 +1,59 @@ #[doc = "Register `DTFAULTC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTPRS0FC` writer - DTI PRS0 Fault Clear"] -pub type DTPRS0FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtprs0fcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRS1FC` writer - DTI PRS1 Fault Clear"] -pub type DTPRS1FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtprs1fcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTDBGFC` writer - DTI Debugger Fault Clear"] -pub type DTDBGFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type DtdbgfcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTLOCKUPFC` writer - DTI Lockup Fault Clear"] -pub type DTLOCKUPFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type DtlockupfcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTEM23FC` writer - DTI EM23 Fault Clear"] -pub type DTEM23FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtem23fcW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - DTI PRS0 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtprs0fc(&mut self) -> DTPRS0FC_W<0> { - DTPRS0FC_W::new(self) + pub fn dtprs0fc(&mut self) -> Dtprs0fcW { + Dtprs0fcW::new(self, 0) } #[doc = "Bit 1 - DTI PRS1 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtprs1fc(&mut self) -> DTPRS1FC_W<1> { - DTPRS1FC_W::new(self) + pub fn dtprs1fc(&mut self) -> Dtprs1fcW { + Dtprs1fcW::new(self, 1) } #[doc = "Bit 2 - DTI Debugger Fault Clear"] #[inline(always)] #[must_use] - pub fn dtdbgfc(&mut self) -> DTDBGFC_W<2> { - DTDBGFC_W::new(self) + pub fn dtdbgfc(&mut self) -> DtdbgfcW { + DtdbgfcW::new(self, 2) } #[doc = "Bit 3 - DTI Lockup Fault Clear"] #[inline(always)] #[must_use] - pub fn dtlockupfc(&mut self) -> DTLOCKUPFC_W<3> { - DTLOCKUPFC_W::new(self) + pub fn dtlockupfc(&mut self) -> DtlockupfcW { + DtlockupfcW::new(self, 3) } #[doc = "Bit 4 - DTI EM23 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtem23fc(&mut self) -> DTEM23FC_W<4> { - DTEM23FC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtem23fc(&mut self) -> Dtem23fcW { + Dtem23fcW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfaultc](index.html) module"] -pub struct DTFAULTC_SPEC; -impl crate::RegisterSpec for DTFAULTC_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfaultc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfaultcSpec; +impl crate::RegisterSpec for DtfaultcSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [dtfaultc::W](W) writer structure"] -impl crate::Writable for DTFAULTC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`dtfaultc::W`](W) writer structure"] +impl crate::Writable for DtfaultcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTFAULTC to value 0"] -impl crate::Resettable for DTFAULTC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfaultcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtfcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtfcfg.rs index 91dee4b..6179df8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtfcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtfcfg.rs @@ -1,229 +1,197 @@ #[doc = "Register `DTFCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTFCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DTFA` reader - DTI Fault Action"] -pub type DTFA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DTI Fault Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DTFA_A { +pub enum Dtfa { #[doc = "0: No action on fault"] - NONE = 0, + None = 0, #[doc = "1: Set outputs inactive"] - INACTIVE = 1, + Inactive = 1, #[doc = "2: Clear outputs"] - CLEAR = 2, + Clear = 2, #[doc = "3: Tristate outputs"] - TRISTATE = 3, + Tristate = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DTFA_A) -> Self { + fn from(variant: Dtfa) -> Self { variant as _ } } -impl DTFA_R { +impl crate::FieldSpec for Dtfa { + type Ux = u8; +} +impl crate::IsEnum for Dtfa {} +#[doc = "Field `DTFA` reader - DTI Fault Action"] +pub type DtfaR = crate::FieldReader; +impl DtfaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTFA_A { + pub const fn variant(&self) -> Dtfa { match self.bits { - 0 => DTFA_A::NONE, - 1 => DTFA_A::INACTIVE, - 2 => DTFA_A::CLEAR, - 3 => DTFA_A::TRISTATE, + 0 => Dtfa::None, + 1 => Dtfa::Inactive, + 2 => Dtfa::Clear, + 3 => Dtfa::Tristate, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on fault"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == DTFA_A::NONE + *self == Dtfa::None } - #[doc = "Checks if the value of the field is `INACTIVE`"] + #[doc = "Set outputs inactive"] #[inline(always)] pub fn is_inactive(&self) -> bool { - *self == DTFA_A::INACTIVE + *self == Dtfa::Inactive } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear outputs"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == DTFA_A::CLEAR + *self == Dtfa::Clear } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "Tristate outputs"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == DTFA_A::TRISTATE + *self == Dtfa::Tristate } } #[doc = "Field `DTFA` writer - DTI Fault Action"] -pub type DTFA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, DTFCFG_SPEC, u8, DTFA_A, 2, O>; -impl<'a, const O: u8> DTFA_W<'a, O> { +pub type DtfaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dtfa, crate::Safe>; +impl<'a, REG> DtfaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on fault"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(DTFA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Dtfa::None) } #[doc = "Set outputs inactive"] #[inline(always)] - pub fn inactive(self) -> &'a mut W { - self.variant(DTFA_A::INACTIVE) + pub fn inactive(self) -> &'a mut crate::W { + self.variant(Dtfa::Inactive) } #[doc = "Clear outputs"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(DTFA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Dtfa::Clear) } #[doc = "Tristate outputs"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(DTFA_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Dtfa::Tristate) } } #[doc = "Field `DTPRS0FEN` reader - DTI PRS 0 Fault Enable"] -pub type DTPRS0FEN_R = crate::BitReader; +pub type Dtprs0fenR = crate::BitReader; #[doc = "Field `DTPRS0FEN` writer - DTI PRS 0 Fault Enable"] -pub type DTPRS0FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtprs0fenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRS1FEN` reader - DTI PRS 1 Fault Enable"] -pub type DTPRS1FEN_R = crate::BitReader; +pub type Dtprs1fenR = crate::BitReader; #[doc = "Field `DTPRS1FEN` writer - DTI PRS 1 Fault Enable"] -pub type DTPRS1FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtprs1fenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTDBGFEN` reader - DTI Debugger Fault Enable"] -pub type DTDBGFEN_R = crate::BitReader; +pub type DtdbgfenR = crate::BitReader; #[doc = "Field `DTDBGFEN` writer - DTI Debugger Fault Enable"] -pub type DTDBGFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type DtdbgfenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTLOCKUPFEN` reader - DTI Lockup Fault Enable"] -pub type DTLOCKUPFEN_R = crate::BitReader; +pub type DtlockupfenR = crate::BitReader; #[doc = "Field `DTLOCKUPFEN` writer - DTI Lockup Fault Enable"] -pub type DTLOCKUPFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type DtlockupfenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTEM23FEN` reader - DTI EM23 Fault Enable"] -pub type DTEM23FEN_R = crate::BitReader; +pub type Dtem23fenR = crate::BitReader; #[doc = "Field `DTEM23FEN` writer - DTI EM23 Fault Enable"] -pub type DTEM23FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtem23fenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 16:17 - DTI Fault Action"] #[inline(always)] - pub fn dtfa(&self) -> DTFA_R { - DTFA_R::new(((self.bits >> 16) & 3) as u8) + pub fn dtfa(&self) -> DtfaR { + DtfaR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 24 - DTI PRS 0 Fault Enable"] #[inline(always)] - pub fn dtprs0fen(&self) -> DTPRS0FEN_R { - DTPRS0FEN_R::new(((self.bits >> 24) & 1) != 0) + pub fn dtprs0fen(&self) -> Dtprs0fenR { + Dtprs0fenR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - DTI PRS 1 Fault Enable"] #[inline(always)] - pub fn dtprs1fen(&self) -> DTPRS1FEN_R { - DTPRS1FEN_R::new(((self.bits >> 25) & 1) != 0) + pub fn dtprs1fen(&self) -> Dtprs1fenR { + Dtprs1fenR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - DTI Debugger Fault Enable"] #[inline(always)] - pub fn dtdbgfen(&self) -> DTDBGFEN_R { - DTDBGFEN_R::new(((self.bits >> 26) & 1) != 0) + pub fn dtdbgfen(&self) -> DtdbgfenR { + DtdbgfenR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - DTI Lockup Fault Enable"] #[inline(always)] - pub fn dtlockupfen(&self) -> DTLOCKUPFEN_R { - DTLOCKUPFEN_R::new(((self.bits >> 27) & 1) != 0) + pub fn dtlockupfen(&self) -> DtlockupfenR { + DtlockupfenR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - DTI EM23 Fault Enable"] #[inline(always)] - pub fn dtem23fen(&self) -> DTEM23FEN_R { - DTEM23FEN_R::new(((self.bits >> 28) & 1) != 0) + pub fn dtem23fen(&self) -> Dtem23fenR { + Dtem23fenR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bits 16:17 - DTI Fault Action"] #[inline(always)] #[must_use] - pub fn dtfa(&mut self) -> DTFA_W<16> { - DTFA_W::new(self) + pub fn dtfa(&mut self) -> DtfaW { + DtfaW::new(self, 16) } #[doc = "Bit 24 - DTI PRS 0 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtprs0fen(&mut self) -> DTPRS0FEN_W<24> { - DTPRS0FEN_W::new(self) + pub fn dtprs0fen(&mut self) -> Dtprs0fenW { + Dtprs0fenW::new(self, 24) } #[doc = "Bit 25 - DTI PRS 1 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtprs1fen(&mut self) -> DTPRS1FEN_W<25> { - DTPRS1FEN_W::new(self) + pub fn dtprs1fen(&mut self) -> Dtprs1fenW { + Dtprs1fenW::new(self, 25) } #[doc = "Bit 26 - DTI Debugger Fault Enable"] #[inline(always)] #[must_use] - pub fn dtdbgfen(&mut self) -> DTDBGFEN_W<26> { - DTDBGFEN_W::new(self) + pub fn dtdbgfen(&mut self) -> DtdbgfenW { + DtdbgfenW::new(self, 26) } #[doc = "Bit 27 - DTI Lockup Fault Enable"] #[inline(always)] #[must_use] - pub fn dtlockupfen(&mut self) -> DTLOCKUPFEN_W<27> { - DTLOCKUPFEN_W::new(self) + pub fn dtlockupfen(&mut self) -> DtlockupfenW { + DtlockupfenW::new(self, 27) } #[doc = "Bit 28 - DTI EM23 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtem23fen(&mut self) -> DTEM23FEN_W<28> { - DTEM23FEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtem23fen(&mut self) -> Dtem23fenW { + Dtem23fenW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfcfg](index.html) module"] -pub struct DTFCFG_SPEC; -impl crate::RegisterSpec for DTFCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfcfgSpec; +impl crate::RegisterSpec for DtfcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtfcfg::R](R) reader structure"] -impl crate::Readable for DTFCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtfcfg::W](W) writer structure"] -impl crate::Writable for DTFCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtfcfg::R`](R) reader structure"] +impl crate::Readable for DtfcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dtfcfg::W`](W) writer structure"] +impl crate::Writable for DtfcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTFCFG to value 0"] -impl crate::Resettable for DTFCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtlock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtlock.rs index 434789a..5ce63f5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtlock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtlock.rs @@ -1,73 +1,55 @@ #[doc = "Register `DTLOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "DTI Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum DTILOCKKEY_AW { +pub enum Dtilockkey { #[doc = "52864: Write to unlock TIMER DTI registers"] - UNLOCK = 52864, + Unlock = 52864, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: DTILOCKKEY_AW) -> Self { + fn from(variant: Dtilockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Dtilockkey { + type Ux = u16; +} +impl crate::IsEnum for Dtilockkey {} #[doc = "Field `DTILOCKKEY` writer - DTI Lock Key"] -pub type DTILOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, DTLOCK_SPEC, u16, DTILOCKKEY_AW, 16, O>; -impl<'a, const O: u8> DTILOCKKEY_W<'a, O> { +pub type DtilockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Dtilockkey>; +impl<'a, REG> DtilockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unlock TIMER DTI registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(DTILOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Dtilockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - DTI Lock Key"] #[inline(always)] #[must_use] - pub fn dtilockkey(&mut self) -> DTILOCKKEY_W<0> { - DTILOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtilockkey(&mut self) -> DtilockkeyW { + DtilockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtlock](index.html) module"] -pub struct DTLOCK_SPEC; -impl crate::RegisterSpec for DTLOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtlock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtlockSpec; +impl crate::RegisterSpec for DtlockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [dtlock::W](W) writer structure"] -impl crate::Writable for DTLOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`dtlock::W`](W) writer structure"] +impl crate::Writable for DtlockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTLOCK to value 0"] -impl crate::Resettable for DTLOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtlockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtogen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtogen.rs index 818b4bb..35926ca 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtogen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dtogen.rs @@ -1,155 +1,115 @@ #[doc = "Register `DTOGEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTOGEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTOGCC0EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC0EN_R = crate::BitReader; +pub type Dtogcc0enR = crate::BitReader; #[doc = "Field `DTOGCC0EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCC1EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC1EN_R = crate::BitReader; +pub type Dtogcc1enR = crate::BitReader; #[doc = "Field `DTOGCC1EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCC2EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC2EN_R = crate::BitReader; +pub type Dtogcc2enR = crate::BitReader; #[doc = "Field `DTOGCC2EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC2EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc2enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI0EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI0EN_R = crate::BitReader; +pub type Dtogcdti0enR = crate::BitReader; #[doc = "Field `DTOGCDTI0EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI1EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI1EN_R = crate::BitReader; +pub type Dtogcdti1enR = crate::BitReader; #[doc = "Field `DTOGCDTI1EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI2EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI2EN_R = crate::BitReader; +pub type Dtogcdti2enR = crate::BitReader; #[doc = "Field `DTOGCDTI2EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI2EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti2enW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc0en(&self) -> DTOGCC0EN_R { - DTOGCC0EN_R::new((self.bits & 1) != 0) + pub fn dtogcc0en(&self) -> Dtogcc0enR { + Dtogcc0enR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc1en(&self) -> DTOGCC1EN_R { - DTOGCC1EN_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtogcc1en(&self) -> Dtogcc1enR { + Dtogcc1enR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc2en(&self) -> DTOGCC2EN_R { - DTOGCC2EN_R::new(((self.bits >> 2) & 1) != 0) + pub fn dtogcc2en(&self) -> Dtogcc2enR { + Dtogcc2enR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti0en(&self) -> DTOGCDTI0EN_R { - DTOGCDTI0EN_R::new(((self.bits >> 3) & 1) != 0) + pub fn dtogcdti0en(&self) -> Dtogcdti0enR { + Dtogcdti0enR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti1en(&self) -> DTOGCDTI1EN_R { - DTOGCDTI1EN_R::new(((self.bits >> 4) & 1) != 0) + pub fn dtogcdti1en(&self) -> Dtogcdti1enR { + Dtogcdti1enR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti2en(&self) -> DTOGCDTI2EN_R { - DTOGCDTI2EN_R::new(((self.bits >> 5) & 1) != 0) + pub fn dtogcdti2en(&self) -> Dtogcdti2enR { + Dtogcdti2enR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc0en(&mut self) -> DTOGCC0EN_W<0> { - DTOGCC0EN_W::new(self) + pub fn dtogcc0en(&mut self) -> Dtogcc0enW { + Dtogcc0enW::new(self, 0) } #[doc = "Bit 1 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc1en(&mut self) -> DTOGCC1EN_W<1> { - DTOGCC1EN_W::new(self) + pub fn dtogcc1en(&mut self) -> Dtogcc1enW { + Dtogcc1enW::new(self, 1) } #[doc = "Bit 2 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc2en(&mut self) -> DTOGCC2EN_W<2> { - DTOGCC2EN_W::new(self) + pub fn dtogcc2en(&mut self) -> Dtogcc2enW { + Dtogcc2enW::new(self, 2) } #[doc = "Bit 3 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti0en(&mut self) -> DTOGCDTI0EN_W<3> { - DTOGCDTI0EN_W::new(self) + pub fn dtogcdti0en(&mut self) -> Dtogcdti0enW { + Dtogcdti0enW::new(self, 3) } #[doc = "Bit 4 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti1en(&mut self) -> DTOGCDTI1EN_W<4> { - DTOGCDTI1EN_W::new(self) + pub fn dtogcdti1en(&mut self) -> Dtogcdti1enW { + Dtogcdti1enW::new(self, 4) } #[doc = "Bit 5 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti2en(&mut self) -> DTOGCDTI2EN_W<5> { - DTOGCDTI2EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtogcdti2en(&mut self) -> Dtogcdti2enW { + Dtogcdti2enW::new(self, 5) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtogen](index.html) module"] -pub struct DTOGEN_SPEC; -impl crate::RegisterSpec for DTOGEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtogen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtogen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtogenSpec; +impl crate::RegisterSpec for DtogenSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtogen::R](R) reader structure"] -impl crate::Readable for DTOGEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtogen::W](W) writer structure"] -impl crate::Writable for DTOGEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtogen::R`](R) reader structure"] +impl crate::Readable for DtogenSpec {} +#[doc = "`write(|w| ..)` method takes [`dtogen::W`](W) writer structure"] +impl crate::Writable for DtogenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTOGEN to value 0"] -impl crate::Resettable for DTOGEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtogenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dttimecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dttimecfg.rs index 63e4c73..9577f86 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dttimecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/dttimecfg.rs @@ -1,110 +1,70 @@ #[doc = "Register `DTTIMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTTIMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTPRESC` reader - DTI Prescaler Setting"] -pub type DTPRESC_R = crate::FieldReader; +pub type DtprescR = crate::FieldReader; #[doc = "Field `DTPRESC` writer - DTI Prescaler Setting"] -pub type DTPRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u16, u16, 10, O>; +pub type DtprescW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `DTRISET` reader - DTI Rise-time"] -pub type DTRISET_R = crate::FieldReader; +pub type DtrisetR = crate::FieldReader; #[doc = "Field `DTRISET` writer - DTI Rise-time"] -pub type DTRISET_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u8, u8, 6, O>; +pub type DtrisetW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `DTFALLT` reader - DTI Fall-time"] -pub type DTFALLT_R = crate::FieldReader; +pub type DtfalltR = crate::FieldReader; #[doc = "Field `DTFALLT` writer - DTI Fall-time"] -pub type DTFALLT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u8, u8, 6, O>; +pub type DtfalltW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:9 - DTI Prescaler Setting"] #[inline(always)] - pub fn dtpresc(&self) -> DTPRESC_R { - DTPRESC_R::new((self.bits & 0x03ff) as u16) + pub fn dtpresc(&self) -> DtprescR { + DtprescR::new((self.bits & 0x03ff) as u16) } #[doc = "Bits 10:15 - DTI Rise-time"] #[inline(always)] - pub fn dtriset(&self) -> DTRISET_R { - DTRISET_R::new(((self.bits >> 10) & 0x3f) as u8) + pub fn dtriset(&self) -> DtrisetR { + DtrisetR::new(((self.bits >> 10) & 0x3f) as u8) } #[doc = "Bits 16:21 - DTI Fall-time"] #[inline(always)] - pub fn dtfallt(&self) -> DTFALLT_R { - DTFALLT_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn dtfallt(&self) -> DtfalltR { + DtfalltR::new(((self.bits >> 16) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:9 - DTI Prescaler Setting"] #[inline(always)] #[must_use] - pub fn dtpresc(&mut self) -> DTPRESC_W<0> { - DTPRESC_W::new(self) + pub fn dtpresc(&mut self) -> DtprescW { + DtprescW::new(self, 0) } #[doc = "Bits 10:15 - DTI Rise-time"] #[inline(always)] #[must_use] - pub fn dtriset(&mut self) -> DTRISET_W<10> { - DTRISET_W::new(self) + pub fn dtriset(&mut self) -> DtrisetW { + DtrisetW::new(self, 10) } #[doc = "Bits 16:21 - DTI Fall-time"] #[inline(always)] #[must_use] - pub fn dtfallt(&mut self) -> DTFALLT_W<16> { - DTFALLT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtfallt(&mut self) -> DtfalltW { + DtfalltW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dttimecfg](index.html) module"] -pub struct DTTIMECFG_SPEC; -impl crate::RegisterSpec for DTTIMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dttimecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dttimecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DttimecfgSpec; +impl crate::RegisterSpec for DttimecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dttimecfg::R](R) reader structure"] -impl crate::Readable for DTTIMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dttimecfg::W](W) writer structure"] -impl crate::Writable for DTTIMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dttimecfg::R`](R) reader structure"] +impl crate::Readable for DttimecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dttimecfg::W`](W) writer structure"] +impl crate::Writable for DttimecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTTIMECFG to value 0"] -impl crate::Resettable for DTTIMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DttimecfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/en.rs index 9392483..303507b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Timer Module Enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Timer Module Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Timer Module Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Timer Module Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/ien.rs index 66588d7..73273ef 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/ien.rs @@ -1,290 +1,250 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OF` reader - Overflow Interrupt Enable"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Enable"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UF` reader - Underflow Interrupt Enable"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Enable"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DIRCHG` reader - Direction Change Detect Interrupt Enable"] -pub type DIRCHG_R = crate::BitReader; +pub type DirchgR = crate::BitReader; #[doc = "Field `DIRCHG` writer - Direction Change Detect Interrupt Enable"] -pub type DIRCHG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type DirchgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC0` reader - CC0 Interrupt Enable"] -pub type CC0_R = crate::BitReader; +pub type Cc0R = crate::BitReader; #[doc = "Field `CC0` writer - CC0 Interrupt Enable"] -pub type CC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1` reader - CC1 Interrupt Enable"] -pub type CC1_R = crate::BitReader; +pub type Cc1R = crate::BitReader; #[doc = "Field `CC1` writer - CC1 Interrupt Enable"] -pub type CC1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2` reader - CC2 Interrupt Enable"] -pub type CC2_R = crate::BitReader; +pub type Cc2R = crate::BitReader; #[doc = "Field `CC2` writer - CC2 Interrupt Enable"] -pub type CC2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL0` reader - ICFWLFULL0 Interrupt Enable"] -pub type ICFWLFULL0_R = crate::BitReader; +pub type Icfwlfull0R = crate::BitReader; #[doc = "Field `ICFWLFULL0` writer - ICFWLFULL0 Interrupt Enable"] -pub type ICFWLFULL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL1` reader - ICFWLFULL1 Interrupt Enable"] -pub type ICFWLFULL1_R = crate::BitReader; +pub type Icfwlfull1R = crate::BitReader; #[doc = "Field `ICFWLFULL1` writer - ICFWLFULL1 Interrupt Enable"] -pub type ICFWLFULL1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL2` reader - ICFWLFULL2 Interrupt Enable"] -pub type ICFWLFULL2_R = crate::BitReader; +pub type Icfwlfull2R = crate::BitReader; #[doc = "Field `ICFWLFULL2` writer - ICFWLFULL2 Interrupt Enable"] -pub type ICFWLFULL2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF0` reader - ICFOF0 Interrupt Enable"] -pub type ICFOF0_R = crate::BitReader; +pub type Icfof0R = crate::BitReader; #[doc = "Field `ICFOF0` writer - ICFOF0 Interrupt Enable"] -pub type ICFOF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF1` reader - ICFOF1 Interrupt Enable"] -pub type ICFOF1_R = crate::BitReader; +pub type Icfof1R = crate::BitReader; #[doc = "Field `ICFOF1` writer - ICFOF1 Interrupt Enable"] -pub type ICFOF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF2` reader - ICFOF2 Interrupt Enable"] -pub type ICFOF2_R = crate::BitReader; +pub type Icfof2R = crate::BitReader; #[doc = "Field `ICFOF2` writer - ICFOF2 Interrupt Enable"] -pub type ICFOF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF0` reader - ICFUF0 Interrupt Enable"] -pub type ICFUF0_R = crate::BitReader; +pub type Icfuf0R = crate::BitReader; #[doc = "Field `ICFUF0` writer - ICFUF0 Interrupt Enable"] -pub type ICFUF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF1` reader - ICFUF1 Interrupt Enable"] -pub type ICFUF1_R = crate::BitReader; +pub type Icfuf1R = crate::BitReader; #[doc = "Field `ICFUF1` writer - ICFUF1 Interrupt Enable"] -pub type ICFUF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF2` reader - ICFUF2 Interrupt Enable"] -pub type ICFUF2_R = crate::BitReader; +pub type Icfuf2R = crate::BitReader; #[doc = "Field `ICFUF2` writer - ICFUF2 Interrupt Enable"] -pub type ICFUF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Enable"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new((self.bits & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Underflow Interrupt Enable"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new(((self.bits >> 1) & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Direction Change Detect Interrupt Enable"] #[inline(always)] - pub fn dirchg(&self) -> DIRCHG_R { - DIRCHG_R::new(((self.bits >> 2) & 1) != 0) + pub fn dirchg(&self) -> DirchgR { + DirchgR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - CC0 Interrupt Enable"] #[inline(always)] - pub fn cc0(&self) -> CC0_R { - CC0_R::new(((self.bits >> 4) & 1) != 0) + pub fn cc0(&self) -> Cc0R { + Cc0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CC1 Interrupt Enable"] #[inline(always)] - pub fn cc1(&self) -> CC1_R { - CC1_R::new(((self.bits >> 5) & 1) != 0) + pub fn cc1(&self) -> Cc1R { + Cc1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - CC2 Interrupt Enable"] #[inline(always)] - pub fn cc2(&self) -> CC2_R { - CC2_R::new(((self.bits >> 6) & 1) != 0) + pub fn cc2(&self) -> Cc2R { + Cc2R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 16 - ICFWLFULL0 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull0(&self) -> ICFWLFULL0_R { - ICFWLFULL0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfwlfull0(&self) -> Icfwlfull0R { + Icfwlfull0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - ICFWLFULL1 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull1(&self) -> ICFWLFULL1_R { - ICFWLFULL1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfwlfull1(&self) -> Icfwlfull1R { + Icfwlfull1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - ICFWLFULL2 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull2(&self) -> ICFWLFULL2_R { - ICFWLFULL2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfwlfull2(&self) -> Icfwlfull2R { + Icfwlfull2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - ICFOF0 Interrupt Enable"] #[inline(always)] - pub fn icfof0(&self) -> ICFOF0_R { - ICFOF0_R::new(((self.bits >> 20) & 1) != 0) + pub fn icfof0(&self) -> Icfof0R { + Icfof0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - ICFOF1 Interrupt Enable"] #[inline(always)] - pub fn icfof1(&self) -> ICFOF1_R { - ICFOF1_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfof1(&self) -> Icfof1R { + Icfof1R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - ICFOF2 Interrupt Enable"] #[inline(always)] - pub fn icfof2(&self) -> ICFOF2_R { - ICFOF2_R::new(((self.bits >> 22) & 1) != 0) + pub fn icfof2(&self) -> Icfof2R { + Icfof2R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 24 - ICFUF0 Interrupt Enable"] #[inline(always)] - pub fn icfuf0(&self) -> ICFUF0_R { - ICFUF0_R::new(((self.bits >> 24) & 1) != 0) + pub fn icfuf0(&self) -> Icfuf0R { + Icfuf0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - ICFUF1 Interrupt Enable"] #[inline(always)] - pub fn icfuf1(&self) -> ICFUF1_R { - ICFUF1_R::new(((self.bits >> 25) & 1) != 0) + pub fn icfuf1(&self) -> Icfuf1R { + Icfuf1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - ICFUF2 Interrupt Enable"] #[inline(always)] - pub fn icfuf2(&self) -> ICFUF2_R { - ICFUF2_R::new(((self.bits >> 26) & 1) != 0) + pub fn icfuf2(&self) -> Icfuf2R { + Icfuf2R::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<0> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 0) } #[doc = "Bit 1 - Underflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<1> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 1) } #[doc = "Bit 2 - Direction Change Detect Interrupt Enable"] #[inline(always)] #[must_use] - pub fn dirchg(&mut self) -> DIRCHG_W<2> { - DIRCHG_W::new(self) + pub fn dirchg(&mut self) -> DirchgW { + DirchgW::new(self, 2) } #[doc = "Bit 4 - CC0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc0(&mut self) -> CC0_W<4> { - CC0_W::new(self) + pub fn cc0(&mut self) -> Cc0W { + Cc0W::new(self, 4) } #[doc = "Bit 5 - CC1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc1(&mut self) -> CC1_W<5> { - CC1_W::new(self) + pub fn cc1(&mut self) -> Cc1W { + Cc1W::new(self, 5) } #[doc = "Bit 6 - CC2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc2(&mut self) -> CC2_W<6> { - CC2_W::new(self) + pub fn cc2(&mut self) -> Cc2W { + Cc2W::new(self, 6) } #[doc = "Bit 16 - ICFWLFULL0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull0(&mut self) -> ICFWLFULL0_W<16> { - ICFWLFULL0_W::new(self) + pub fn icfwlfull0(&mut self) -> Icfwlfull0W { + Icfwlfull0W::new(self, 16) } #[doc = "Bit 17 - ICFWLFULL1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull1(&mut self) -> ICFWLFULL1_W<17> { - ICFWLFULL1_W::new(self) + pub fn icfwlfull1(&mut self) -> Icfwlfull1W { + Icfwlfull1W::new(self, 17) } #[doc = "Bit 18 - ICFWLFULL2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull2(&mut self) -> ICFWLFULL2_W<18> { - ICFWLFULL2_W::new(self) + pub fn icfwlfull2(&mut self) -> Icfwlfull2W { + Icfwlfull2W::new(self, 18) } #[doc = "Bit 20 - ICFOF0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof0(&mut self) -> ICFOF0_W<20> { - ICFOF0_W::new(self) + pub fn icfof0(&mut self) -> Icfof0W { + Icfof0W::new(self, 20) } #[doc = "Bit 21 - ICFOF1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof1(&mut self) -> ICFOF1_W<21> { - ICFOF1_W::new(self) + pub fn icfof1(&mut self) -> Icfof1W { + Icfof1W::new(self, 21) } #[doc = "Bit 22 - ICFOF2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof2(&mut self) -> ICFOF2_W<22> { - ICFOF2_W::new(self) + pub fn icfof2(&mut self) -> Icfof2W { + Icfof2W::new(self, 22) } #[doc = "Bit 24 - ICFUF0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf0(&mut self) -> ICFUF0_W<24> { - ICFUF0_W::new(self) + pub fn icfuf0(&mut self) -> Icfuf0W { + Icfuf0W::new(self, 24) } #[doc = "Bit 25 - ICFUF1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf1(&mut self) -> ICFUF1_W<25> { - ICFUF1_W::new(self) + pub fn icfuf1(&mut self) -> Icfuf1W { + Icfuf1W::new(self, 25) } #[doc = "Bit 26 - ICFUF2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf2(&mut self) -> ICFUF2_W<26> { - ICFUF2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfuf2(&mut self) -> Icfuf2W { + Icfuf2W::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/if_.rs index edde0f3..fad1cd1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/if_.rs @@ -1,290 +1,250 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OF` reader - Overflow Interrupt Flag"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Flag"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UF` reader - Underflow Interrupt Flag"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Flag"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DIRCHG` reader - Direction Change Detect Interrupt Flag"] -pub type DIRCHG_R = crate::BitReader; +pub type DirchgR = crate::BitReader; #[doc = "Field `DIRCHG` writer - Direction Change Detect Interrupt Flag"] -pub type DIRCHG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type DirchgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC0` reader - Capture Compare Channel 0 Interrupt Flag"] -pub type CC0_R = crate::BitReader; +pub type Cc0R = crate::BitReader; #[doc = "Field `CC0` writer - Capture Compare Channel 0 Interrupt Flag"] -pub type CC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1` reader - Capture Compare Channel 1 Interrupt Flag"] -pub type CC1_R = crate::BitReader; +pub type Cc1R = crate::BitReader; #[doc = "Field `CC1` writer - Capture Compare Channel 1 Interrupt Flag"] -pub type CC1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2` reader - Capture Compare Channel 2 Interrupt Flag"] -pub type CC2_R = crate::BitReader; +pub type Cc2R = crate::BitReader; #[doc = "Field `CC2` writer - Capture Compare Channel 2 Interrupt Flag"] -pub type CC2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL0` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL0_R = crate::BitReader; +pub type Icfwlfull0R = crate::BitReader; #[doc = "Field `ICFWLFULL0` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL1` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL1_R = crate::BitReader; +pub type Icfwlfull1R = crate::BitReader; #[doc = "Field `ICFWLFULL1` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL2` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL2_R = crate::BitReader; +pub type Icfwlfull2R = crate::BitReader; #[doc = "Field `ICFWLFULL2` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF0` reader - Input Capture FIFO overflow"] -pub type ICFOF0_R = crate::BitReader; +pub type Icfof0R = crate::BitReader; #[doc = "Field `ICFOF0` writer - Input Capture FIFO overflow"] -pub type ICFOF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF1` reader - Input Capture FIFO overflow"] -pub type ICFOF1_R = crate::BitReader; +pub type Icfof1R = crate::BitReader; #[doc = "Field `ICFOF1` writer - Input Capture FIFO overflow"] -pub type ICFOF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF2` reader - Input Capture FIFO overflow"] -pub type ICFOF2_R = crate::BitReader; +pub type Icfof2R = crate::BitReader; #[doc = "Field `ICFOF2` writer - Input Capture FIFO overflow"] -pub type ICFOF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF0` reader - Input capture FIFO underflow"] -pub type ICFUF0_R = crate::BitReader; +pub type Icfuf0R = crate::BitReader; #[doc = "Field `ICFUF0` writer - Input capture FIFO underflow"] -pub type ICFUF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF1` reader - Input capture FIFO underflow"] -pub type ICFUF1_R = crate::BitReader; +pub type Icfuf1R = crate::BitReader; #[doc = "Field `ICFUF1` writer - Input capture FIFO underflow"] -pub type ICFUF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF2` reader - Input capture FIFO underflow"] -pub type ICFUF2_R = crate::BitReader; +pub type Icfuf2R = crate::BitReader; #[doc = "Field `ICFUF2` writer - Input capture FIFO underflow"] -pub type ICFUF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new((self.bits & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Underflow Interrupt Flag"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new(((self.bits >> 1) & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] - pub fn dirchg(&self) -> DIRCHG_R { - DIRCHG_R::new(((self.bits >> 2) & 1) != 0) + pub fn dirchg(&self) -> DirchgR { + DirchgR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Capture Compare Channel 0 Interrupt Flag"] #[inline(always)] - pub fn cc0(&self) -> CC0_R { - CC0_R::new(((self.bits >> 4) & 1) != 0) + pub fn cc0(&self) -> Cc0R { + Cc0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Capture Compare Channel 1 Interrupt Flag"] #[inline(always)] - pub fn cc1(&self) -> CC1_R { - CC1_R::new(((self.bits >> 5) & 1) != 0) + pub fn cc1(&self) -> Cc1R { + Cc1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Capture Compare Channel 2 Interrupt Flag"] #[inline(always)] - pub fn cc2(&self) -> CC2_R { - CC2_R::new(((self.bits >> 6) & 1) != 0) + pub fn cc2(&self) -> Cc2R { + Cc2R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 16 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull0(&self) -> ICFWLFULL0_R { - ICFWLFULL0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfwlfull0(&self) -> Icfwlfull0R { + Icfwlfull0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull1(&self) -> ICFWLFULL1_R { - ICFWLFULL1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfwlfull1(&self) -> Icfwlfull1R { + Icfwlfull1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull2(&self) -> ICFWLFULL2_R { - ICFWLFULL2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfwlfull2(&self) -> Icfwlfull2R { + Icfwlfull2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof0(&self) -> ICFOF0_R { - ICFOF0_R::new(((self.bits >> 20) & 1) != 0) + pub fn icfof0(&self) -> Icfof0R { + Icfof0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof1(&self) -> ICFOF1_R { - ICFOF1_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfof1(&self) -> Icfof1R { + Icfof1R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof2(&self) -> ICFOF2_R { - ICFOF2_R::new(((self.bits >> 22) & 1) != 0) + pub fn icfof2(&self) -> Icfof2R { + Icfof2R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 24 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf0(&self) -> ICFUF0_R { - ICFUF0_R::new(((self.bits >> 24) & 1) != 0) + pub fn icfuf0(&self) -> Icfuf0R { + Icfuf0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf1(&self) -> ICFUF1_R { - ICFUF1_R::new(((self.bits >> 25) & 1) != 0) + pub fn icfuf1(&self) -> Icfuf1R { + Icfuf1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf2(&self) -> ICFUF2_R { - ICFUF2_R::new(((self.bits >> 26) & 1) != 0) + pub fn icfuf2(&self) -> Icfuf2R { + Icfuf2R::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<0> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 0) } #[doc = "Bit 1 - Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<1> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 1) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] #[must_use] - pub fn dirchg(&mut self) -> DIRCHG_W<2> { - DIRCHG_W::new(self) + pub fn dirchg(&mut self) -> DirchgW { + DirchgW::new(self, 2) } #[doc = "Bit 4 - Capture Compare Channel 0 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc0(&mut self) -> CC0_W<4> { - CC0_W::new(self) + pub fn cc0(&mut self) -> Cc0W { + Cc0W::new(self, 4) } #[doc = "Bit 5 - Capture Compare Channel 1 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc1(&mut self) -> CC1_W<5> { - CC1_W::new(self) + pub fn cc1(&mut self) -> Cc1W { + Cc1W::new(self, 5) } #[doc = "Bit 6 - Capture Compare Channel 2 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc2(&mut self) -> CC2_W<6> { - CC2_W::new(self) + pub fn cc2(&mut self) -> Cc2W { + Cc2W::new(self, 6) } #[doc = "Bit 16 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull0(&mut self) -> ICFWLFULL0_W<16> { - ICFWLFULL0_W::new(self) + pub fn icfwlfull0(&mut self) -> Icfwlfull0W { + Icfwlfull0W::new(self, 16) } #[doc = "Bit 17 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull1(&mut self) -> ICFWLFULL1_W<17> { - ICFWLFULL1_W::new(self) + pub fn icfwlfull1(&mut self) -> Icfwlfull1W { + Icfwlfull1W::new(self, 17) } #[doc = "Bit 18 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull2(&mut self) -> ICFWLFULL2_W<18> { - ICFWLFULL2_W::new(self) + pub fn icfwlfull2(&mut self) -> Icfwlfull2W { + Icfwlfull2W::new(self, 18) } #[doc = "Bit 20 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof0(&mut self) -> ICFOF0_W<20> { - ICFOF0_W::new(self) + pub fn icfof0(&mut self) -> Icfof0W { + Icfof0W::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof1(&mut self) -> ICFOF1_W<21> { - ICFOF1_W::new(self) + pub fn icfof1(&mut self) -> Icfof1W { + Icfof1W::new(self, 21) } #[doc = "Bit 22 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof2(&mut self) -> ICFOF2_W<22> { - ICFOF2_W::new(self) + pub fn icfof2(&mut self) -> Icfof2W { + Icfof2W::new(self, 22) } #[doc = "Bit 24 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf0(&mut self) -> ICFUF0_W<24> { - ICFUF0_W::new(self) + pub fn icfuf0(&mut self) -> Icfuf0W { + Icfuf0W::new(self, 24) } #[doc = "Bit 25 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf1(&mut self) -> ICFUF1_W<25> { - ICFUF1_W::new(self) + pub fn icfuf1(&mut self) -> Icfuf1W { + Icfuf1W::new(self, 25) } #[doc = "Bit 26 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf2(&mut self) -> ICFUF2_W<26> { - ICFUF2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfuf2(&mut self) -> Icfuf2W { + Icfuf2W::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/ipversion.rs index fd8f758..0b161f8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/lock.rs index 4d444ca..4d6d1fe 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Timer Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "52864: Write to unlock TIMER registers"] - UNLOCK = 52864, + Unlock = 52864, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Timer Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unlock TIMER registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Timer Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/status.rs index 1a2964d..25d646e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/status.rs @@ -1,339 +1,324 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RUNNING` reader - Running"] -pub type RUNNING_R = crate::BitReader; -#[doc = "Field `DIR` reader - Direction"] -pub type DIR_R = crate::BitReader; +pub type RunningR = crate::BitReader; #[doc = "Direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DIR_A { +pub enum Dir { #[doc = "0: Counting up"] - UP = 0, + Up = 0, #[doc = "1: Counting down"] - DOWN = 1, + Down = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DIR_A) -> Self { + fn from(variant: Dir) -> Self { variant as u8 != 0 } } -impl DIR_R { +#[doc = "Field `DIR` reader - Direction"] +pub type DirR = crate::BitReader; +impl DirR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DIR_A { + pub const fn variant(&self) -> Dir { match self.bits { - false => DIR_A::UP, - true => DIR_A::DOWN, + false => Dir::Up, + true => Dir::Down, } } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Counting up"] #[inline(always)] pub fn is_up(&self) -> bool { - *self == DIR_A::UP + *self == Dir::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Counting down"] #[inline(always)] pub fn is_down(&self) -> bool { - *self == DIR_A::DOWN + *self == Dir::Down } } #[doc = "Field `TOPBV` reader - TOP Buffer Valid"] -pub type TOPBV_R = crate::BitReader; -#[doc = "Field `TIMERLOCKSTATUS` reader - Timer lock status"] -pub type TIMERLOCKSTATUS_R = crate::BitReader; +pub type TopbvR = crate::BitReader; #[doc = "Timer lock status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TIMERLOCKSTATUS_A { +pub enum Timerlockstatus { #[doc = "0: TIMER registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: TIMER registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TIMERLOCKSTATUS_A) -> Self { + fn from(variant: Timerlockstatus) -> Self { variant as u8 != 0 } } -impl TIMERLOCKSTATUS_R { +#[doc = "Field `TIMERLOCKSTATUS` reader - Timer lock status"] +pub type TimerlockstatusR = crate::BitReader; +impl TimerlockstatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TIMERLOCKSTATUS_A { + pub const fn variant(&self) -> Timerlockstatus { match self.bits { - false => TIMERLOCKSTATUS_A::UNLOCKED, - true => TIMERLOCKSTATUS_A::LOCKED, + false => Timerlockstatus::Unlocked, + true => Timerlockstatus::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "TIMER registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == TIMERLOCKSTATUS_A::UNLOCKED + *self == Timerlockstatus::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "TIMER registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == TIMERLOCKSTATUS_A::LOCKED + *self == Timerlockstatus::Locked } } -#[doc = "Field `DTILOCKSTATUS` reader - DTI lock status"] -pub type DTILOCKSTATUS_R = crate::BitReader; #[doc = "DTI lock status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DTILOCKSTATUS_A { +pub enum Dtilockstatus { #[doc = "0: DTI registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: DTI registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DTILOCKSTATUS_A) -> Self { + fn from(variant: Dtilockstatus) -> Self { variant as u8 != 0 } } -impl DTILOCKSTATUS_R { +#[doc = "Field `DTILOCKSTATUS` reader - DTI lock status"] +pub type DtilockstatusR = crate::BitReader; +impl DtilockstatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTILOCKSTATUS_A { + pub const fn variant(&self) -> Dtilockstatus { match self.bits { - false => DTILOCKSTATUS_A::UNLOCKED, - true => DTILOCKSTATUS_A::LOCKED, + false => Dtilockstatus::Unlocked, + true => Dtilockstatus::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "DTI registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == DTILOCKSTATUS_A::UNLOCKED + *self == Dtilockstatus::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "DTI registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == DTILOCKSTATUS_A::LOCKED + *self == Dtilockstatus::Locked } } #[doc = "Field `SYNCBUSY` reader - Sync Busy"] -pub type SYNCBUSY_R = crate::BitReader; +pub type SyncbusyR = crate::BitReader; #[doc = "Field `OCBV0` reader - Output Compare Buffer Valid"] -pub type OCBV0_R = crate::BitReader; +pub type Ocbv0R = crate::BitReader; #[doc = "Field `OCBV1` reader - Output Compare Buffer Valid"] -pub type OCBV1_R = crate::BitReader; +pub type Ocbv1R = crate::BitReader; #[doc = "Field `OCBV2` reader - Output Compare Buffer Valid"] -pub type OCBV2_R = crate::BitReader; +pub type Ocbv2R = crate::BitReader; #[doc = "Field `ICFEMPTY0` reader - Input capture fifo empty"] -pub type ICFEMPTY0_R = crate::BitReader; +pub type Icfempty0R = crate::BitReader; #[doc = "Field `ICFEMPTY1` reader - Input capture fifo empty"] -pub type ICFEMPTY1_R = crate::BitReader; +pub type Icfempty1R = crate::BitReader; #[doc = "Field `ICFEMPTY2` reader - Input capture fifo empty"] -pub type ICFEMPTY2_R = crate::BitReader; -#[doc = "Field `CCPOL0` reader - Compare/Capture Polarity"] -pub type CCPOL0_R = crate::BitReader; +pub type Icfempty2R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL0_A { +pub enum Ccpol0 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL0_A) -> Self { + fn from(variant: Ccpol0) -> Self { variant as u8 != 0 } } -impl CCPOL0_R { +#[doc = "Field `CCPOL0` reader - Compare/Capture Polarity"] +pub type Ccpol0R = crate::BitReader; +impl Ccpol0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL0_A { + pub const fn variant(&self) -> Ccpol0 { match self.bits { - false => CCPOL0_A::LOWRISE, - true => CCPOL0_A::HIGHFALL, + false => Ccpol0::Lowrise, + true => Ccpol0::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL0_A::LOWRISE + *self == Ccpol0::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL0_A::HIGHFALL + *self == Ccpol0::Highfall } } -#[doc = "Field `CCPOL1` reader - Compare/Capture Polarity"] -pub type CCPOL1_R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL1_A { +pub enum Ccpol1 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL1_A) -> Self { + fn from(variant: Ccpol1) -> Self { variant as u8 != 0 } } -impl CCPOL1_R { +#[doc = "Field `CCPOL1` reader - Compare/Capture Polarity"] +pub type Ccpol1R = crate::BitReader; +impl Ccpol1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL1_A { + pub const fn variant(&self) -> Ccpol1 { match self.bits { - false => CCPOL1_A::LOWRISE, - true => CCPOL1_A::HIGHFALL, + false => Ccpol1::Lowrise, + true => Ccpol1::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL1_A::LOWRISE + *self == Ccpol1::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL1_A::HIGHFALL + *self == Ccpol1::Highfall } } -#[doc = "Field `CCPOL2` reader - Compare/Capture Polarity"] -pub type CCPOL2_R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL2_A { +pub enum Ccpol2 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL2_A) -> Self { + fn from(variant: Ccpol2) -> Self { variant as u8 != 0 } } -impl CCPOL2_R { +#[doc = "Field `CCPOL2` reader - Compare/Capture Polarity"] +pub type Ccpol2R = crate::BitReader; +impl Ccpol2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL2_A { + pub const fn variant(&self) -> Ccpol2 { match self.bits { - false => CCPOL2_A::LOWRISE, - true => CCPOL2_A::HIGHFALL, + false => Ccpol2::Lowrise, + true => Ccpol2::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL2_A::LOWRISE + *self == Ccpol2::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL2_A::HIGHFALL + *self == Ccpol2::Highfall } } impl R { #[doc = "Bit 0 - Running"] #[inline(always)] - pub fn running(&self) -> RUNNING_R { - RUNNING_R::new((self.bits & 1) != 0) + pub fn running(&self) -> RunningR { + RunningR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Direction"] #[inline(always)] - pub fn dir(&self) -> DIR_R { - DIR_R::new(((self.bits >> 1) & 1) != 0) + pub fn dir(&self) -> DirR { + DirR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - TOP Buffer Valid"] #[inline(always)] - pub fn topbv(&self) -> TOPBV_R { - TOPBV_R::new(((self.bits >> 2) & 1) != 0) + pub fn topbv(&self) -> TopbvR { + TopbvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Timer lock status"] #[inline(always)] - pub fn timerlockstatus(&self) -> TIMERLOCKSTATUS_R { - TIMERLOCKSTATUS_R::new(((self.bits >> 4) & 1) != 0) + pub fn timerlockstatus(&self) -> TimerlockstatusR { + TimerlockstatusR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DTI lock status"] #[inline(always)] - pub fn dtilockstatus(&self) -> DTILOCKSTATUS_R { - DTILOCKSTATUS_R::new(((self.bits >> 5) & 1) != 0) + pub fn dtilockstatus(&self) -> DtilockstatusR { + DtilockstatusR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Sync Busy"] #[inline(always)] - pub fn syncbusy(&self) -> SYNCBUSY_R { - SYNCBUSY_R::new(((self.bits >> 6) & 1) != 0) + pub fn syncbusy(&self) -> SyncbusyR { + SyncbusyR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv0(&self) -> OCBV0_R { - OCBV0_R::new(((self.bits >> 8) & 1) != 0) + pub fn ocbv0(&self) -> Ocbv0R { + Ocbv0R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv1(&self) -> OCBV1_R { - OCBV1_R::new(((self.bits >> 9) & 1) != 0) + pub fn ocbv1(&self) -> Ocbv1R { + Ocbv1R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv2(&self) -> OCBV2_R { - OCBV2_R::new(((self.bits >> 10) & 1) != 0) + pub fn ocbv2(&self) -> Ocbv2R { + Ocbv2R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 16 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty0(&self) -> ICFEMPTY0_R { - ICFEMPTY0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfempty0(&self) -> Icfempty0R { + Icfempty0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty1(&self) -> ICFEMPTY1_R { - ICFEMPTY1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfempty1(&self) -> Icfempty1R { + Icfempty1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty2(&self) -> ICFEMPTY2_R { - ICFEMPTY2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfempty2(&self) -> Icfempty2R { + Icfempty2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 24 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol0(&self) -> CCPOL0_R { - CCPOL0_R::new(((self.bits >> 24) & 1) != 0) + pub fn ccpol0(&self) -> Ccpol0R { + Ccpol0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol1(&self) -> CCPOL1_R { - CCPOL1_R::new(((self.bits >> 25) & 1) != 0) + pub fn ccpol1(&self) -> Ccpol1R { + Ccpol1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol2(&self) -> CCPOL2_R { - CCPOL2_R::new(((self.bits >> 26) & 1) != 0) + pub fn ccpol2(&self) -> Ccpol2R { + Ccpol2R::new(((self.bits >> 26) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/top.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/top.rs index 65df306..6799f48 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/top.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/top.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOP` reader - Counter Top Value"] -pub type TOP_R = crate::FieldReader; +pub type TopR = crate::FieldReader; #[doc = "Field `TOP` writer - Counter Top Value"] -pub type TOP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOP_SPEC, u16, u16, 16, O>; +pub type TopW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Top Value"] #[inline(always)] - pub fn top(&self) -> TOP_R { - TOP_R::new((self.bits & 0xffff) as u16) + pub fn top(&self) -> TopR { + TopR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Top Value"] #[inline(always)] #[must_use] - pub fn top(&mut self) -> TOP_W<0> { - TOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn top(&mut self) -> TopW { + TopW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [top](index.html) module"] -pub struct TOP_SPEC; -impl crate::RegisterSpec for TOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopSpec; +impl crate::RegisterSpec for TopSpec { type Ux = u32; } -#[doc = "`read()` method returns [top::R](R) reader structure"] -impl crate::Readable for TOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [top::W](W) writer structure"] -impl crate::Writable for TOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`top::R`](R) reader structure"] +impl crate::Readable for TopSpec {} +#[doc = "`write(|w| ..)` method takes [`top::W`](W) writer structure"] +impl crate::Writable for TopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOP to value 0xffff"] -impl crate::Resettable for TOP_SPEC { - const RESET_VALUE: Self::Ux = 0xffff; +impl crate::Resettable for TopSpec { + const RESET_VALUE: u32 = 0xffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/topb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/topb.rs index 012fd04..e6c7e8c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/topb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer3_s/topb.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOPB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOPB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOPB` reader - Counter Top Buffer Register"] -pub type TOPB_R = crate::FieldReader; +pub type TopbR = crate::FieldReader; #[doc = "Field `TOPB` writer - Counter Top Buffer Register"] -pub type TOPB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOPB_SPEC, u16, u16, 16, O>; +pub type TopbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Top Buffer Register"] #[inline(always)] - pub fn topb(&self) -> TOPB_R { - TOPB_R::new((self.bits & 0xffff) as u16) + pub fn topb(&self) -> TopbR { + TopbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Top Buffer Register"] #[inline(always)] #[must_use] - pub fn topb(&mut self) -> TOPB_W<0> { - TOPB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn topb(&mut self) -> TopbW { + TopbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [topb](index.html) module"] -pub struct TOPB_SPEC; -impl crate::RegisterSpec for TOPB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopbSpec; +impl crate::RegisterSpec for TopbSpec { type Ux = u32; } -#[doc = "`read()` method returns [topb::R](R) reader structure"] -impl crate::Readable for TOPB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [topb::W](W) writer structure"] -impl crate::Writable for TOPB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`topb::R`](R) reader structure"] +impl crate::Readable for TopbSpec {} +#[doc = "`write(|w| ..)` method takes [`topb::W`](W) writer structure"] +impl crate::Writable for TopbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOPB to value 0"] -impl crate::Resettable for TOPB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TopbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns.rs index 50b1dd4..e4e8a9b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns.rs @@ -1,240 +1,470 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + cfg: Cfg, + ctrl: Ctrl, + cmd: Cmd, + status: Status, + if_: If, + ien: Ien, + top: Top, + topb: Topb, + cnt: Cnt, + _reserved10: [u8; 0x04], + lock: Lock, + en: En, + _reserved12: [u8; 0x2c], + cc0_cfg: Cc0Cfg, + cc0_ctrl: Cc0Ctrl, + cc0_oc: Cc0Oc, + _reserved15: [u8; 0x04], + cc0_ocb: Cc0Ocb, + cc0_icf: Cc0Icf, + cc0_icof: Cc0Icof, + _reserved18: [u8; 0x04], + cc1_cfg: Cc1Cfg, + cc1_ctrl: Cc1Ctrl, + cc1_oc: Cc1Oc, + _reserved21: [u8; 0x04], + cc1_ocb: Cc1Ocb, + cc1_icf: Cc1Icf, + cc1_icof: Cc1Icof, + _reserved24: [u8; 0x04], + cc2_cfg: Cc2Cfg, + cc2_ctrl: Cc2Ctrl, + cc2_oc: Cc2Oc, + _reserved27: [u8; 0x04], + cc2_ocb: Cc2Ocb, + cc2_icf: Cc2Icf, + cc2_icof: Cc2Icof, + _reserved30: [u8; 0x24], + dtcfg: Dtcfg, + dttimecfg: Dttimecfg, + dtfcfg: Dtfcfg, + dtctrl: Dtctrl, + dtogen: Dtogen, + dtfault: Dtfault, + dtfaultc: Dtfaultc, + dtlock: Dtlock, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x08 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x0c - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x10 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x14 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x18 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x1c - No Description"] - pub top: TOP, + #[inline(always)] + pub const fn top(&self) -> &Top { + &self.top + } #[doc = "0x20 - No Description"] - pub topb: TOPB, + #[inline(always)] + pub const fn topb(&self) -> &Topb { + &self.topb + } #[doc = "0x24 - No Description"] - pub cnt: CNT, - _reserved10: [u8; 0x04], + #[inline(always)] + pub const fn cnt(&self) -> &Cnt { + &self.cnt + } #[doc = "0x2c - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x30 - No Description"] - pub en: EN, - _reserved12: [u8; 0x2c], + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x60 - No Description"] - pub cc0_cfg: CC0_CFG, + #[inline(always)] + pub const fn cc0_cfg(&self) -> &Cc0Cfg { + &self.cc0_cfg + } #[doc = "0x64 - No Description"] - pub cc0_ctrl: CC0_CTRL, + #[inline(always)] + pub const fn cc0_ctrl(&self) -> &Cc0Ctrl { + &self.cc0_ctrl + } #[doc = "0x68 - No Description"] - pub cc0_oc: CC0_OC, - _reserved15: [u8; 0x04], + #[inline(always)] + pub const fn cc0_oc(&self) -> &Cc0Oc { + &self.cc0_oc + } #[doc = "0x70 - No Description"] - pub cc0_ocb: CC0_OCB, + #[inline(always)] + pub const fn cc0_ocb(&self) -> &Cc0Ocb { + &self.cc0_ocb + } #[doc = "0x74 - No Description"] - pub cc0_icf: CC0_ICF, + #[inline(always)] + pub const fn cc0_icf(&self) -> &Cc0Icf { + &self.cc0_icf + } #[doc = "0x78 - No Description"] - pub cc0_icof: CC0_ICOF, - _reserved18: [u8; 0x04], + #[inline(always)] + pub const fn cc0_icof(&self) -> &Cc0Icof { + &self.cc0_icof + } #[doc = "0x80 - No Description"] - pub cc1_cfg: CC1_CFG, + #[inline(always)] + pub const fn cc1_cfg(&self) -> &Cc1Cfg { + &self.cc1_cfg + } #[doc = "0x84 - No Description"] - pub cc1_ctrl: CC1_CTRL, + #[inline(always)] + pub const fn cc1_ctrl(&self) -> &Cc1Ctrl { + &self.cc1_ctrl + } #[doc = "0x88 - No Description"] - pub cc1_oc: CC1_OC, - _reserved21: [u8; 0x04], + #[inline(always)] + pub const fn cc1_oc(&self) -> &Cc1Oc { + &self.cc1_oc + } #[doc = "0x90 - No Description"] - pub cc1_ocb: CC1_OCB, + #[inline(always)] + pub const fn cc1_ocb(&self) -> &Cc1Ocb { + &self.cc1_ocb + } #[doc = "0x94 - No Description"] - pub cc1_icf: CC1_ICF, + #[inline(always)] + pub const fn cc1_icf(&self) -> &Cc1Icf { + &self.cc1_icf + } #[doc = "0x98 - No Description"] - pub cc1_icof: CC1_ICOF, - _reserved24: [u8; 0x04], + #[inline(always)] + pub const fn cc1_icof(&self) -> &Cc1Icof { + &self.cc1_icof + } #[doc = "0xa0 - No Description"] - pub cc2_cfg: CC2_CFG, + #[inline(always)] + pub const fn cc2_cfg(&self) -> &Cc2Cfg { + &self.cc2_cfg + } #[doc = "0xa4 - No Description"] - pub cc2_ctrl: CC2_CTRL, + #[inline(always)] + pub const fn cc2_ctrl(&self) -> &Cc2Ctrl { + &self.cc2_ctrl + } #[doc = "0xa8 - No Description"] - pub cc2_oc: CC2_OC, - _reserved27: [u8; 0x04], + #[inline(always)] + pub const fn cc2_oc(&self) -> &Cc2Oc { + &self.cc2_oc + } #[doc = "0xb0 - No Description"] - pub cc2_ocb: CC2_OCB, + #[inline(always)] + pub const fn cc2_ocb(&self) -> &Cc2Ocb { + &self.cc2_ocb + } #[doc = "0xb4 - No Description"] - pub cc2_icf: CC2_ICF, + #[inline(always)] + pub const fn cc2_icf(&self) -> &Cc2Icf { + &self.cc2_icf + } #[doc = "0xb8 - No Description"] - pub cc2_icof: CC2_ICOF, - _reserved30: [u8; 0x24], + #[inline(always)] + pub const fn cc2_icof(&self) -> &Cc2Icof { + &self.cc2_icof + } #[doc = "0xe0 - No Description"] - pub dtcfg: DTCFG, + #[inline(always)] + pub const fn dtcfg(&self) -> &Dtcfg { + &self.dtcfg + } #[doc = "0xe4 - No Description"] - pub dttimecfg: DTTIMECFG, + #[inline(always)] + pub const fn dttimecfg(&self) -> &Dttimecfg { + &self.dttimecfg + } #[doc = "0xe8 - No Description"] - pub dtfcfg: DTFCFG, + #[inline(always)] + pub const fn dtfcfg(&self) -> &Dtfcfg { + &self.dtfcfg + } #[doc = "0xec - No Description"] - pub dtctrl: DTCTRL, + #[inline(always)] + pub const fn dtctrl(&self) -> &Dtctrl { + &self.dtctrl + } #[doc = "0xf0 - No Description"] - pub dtogen: DTOGEN, + #[inline(always)] + pub const fn dtogen(&self) -> &Dtogen { + &self.dtogen + } #[doc = "0xf4 - No Description"] - pub dtfault: DTFAULT, + #[inline(always)] + pub const fn dtfault(&self) -> &Dtfault { + &self.dtfault + } #[doc = "0xf8 - No Description"] - pub dtfaultc: DTFAULTC, + #[inline(always)] + pub const fn dtfaultc(&self) -> &Dtfaultc { + &self.dtfaultc + } #[doc = "0xfc - No Description"] - pub dtlock: DTLOCK, + #[inline(always)] + pub const fn dtlock(&self) -> &Dtlock { + &self.dtlock + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "TOP (rw) register accessor: an alias for `Reg`"] -pub type TOP = crate::Reg; +#[doc = "TOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@top`] +module"] +#[doc(alias = "TOP")] +pub type Top = crate::Reg; #[doc = "No Description"] pub mod top; -#[doc = "TOPB (rw) register accessor: an alias for `Reg`"] -pub type TOPB = crate::Reg; +#[doc = "TOPB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@topb`] +module"] +#[doc(alias = "TOPB")] +pub type Topb = crate::Reg; #[doc = "No Description"] pub mod topb; -#[doc = "CNT (rw) register accessor: an alias for `Reg`"] -pub type CNT = crate::Reg; +#[doc = "CNT (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnt`] +module"] +#[doc(alias = "CNT")] +pub type Cnt = crate::Reg; #[doc = "No Description"] pub mod cnt; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CC0_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC0_CFG = crate::Reg; +#[doc = "CC0_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_cfg`] +module"] +#[doc(alias = "CC0_CFG")] +pub type Cc0Cfg = crate::Reg; #[doc = "No Description"] pub mod cc0_cfg; -#[doc = "CC0_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC0_CTRL = crate::Reg; +#[doc = "CC0_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_ctrl`] +module"] +#[doc(alias = "CC0_CTRL")] +pub type Cc0Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc0_ctrl; -#[doc = "CC0_OC (rw) register accessor: an alias for `Reg`"] -pub type CC0_OC = crate::Reg; +#[doc = "CC0_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_oc`] +module"] +#[doc(alias = "CC0_OC")] +pub type Cc0Oc = crate::Reg; #[doc = "No Description"] pub mod cc0_oc; -#[doc = "CC0_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC0_OCB = crate::Reg; +#[doc = "CC0_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_ocb`] +module"] +#[doc(alias = "CC0_OCB")] +pub type Cc0Ocb = crate::Reg; #[doc = "No Description"] pub mod cc0_ocb; -#[doc = "CC0_ICF (r) register accessor: an alias for `Reg`"] -pub type CC0_ICF = crate::Reg; +#[doc = "CC0_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_icf`] +module"] +#[doc(alias = "CC0_ICF")] +pub type Cc0Icf = crate::Reg; #[doc = "No Description"] pub mod cc0_icf; -#[doc = "CC0_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC0_ICOF = crate::Reg; +#[doc = "CC0_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_icof`] +module"] +#[doc(alias = "CC0_ICOF")] +pub type Cc0Icof = crate::Reg; #[doc = "No Description"] pub mod cc0_icof; -#[doc = "CC1_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC1_CFG = crate::Reg; +#[doc = "CC1_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_cfg`] +module"] +#[doc(alias = "CC1_CFG")] +pub type Cc1Cfg = crate::Reg; #[doc = "No Description"] pub mod cc1_cfg; -#[doc = "CC1_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC1_CTRL = crate::Reg; +#[doc = "CC1_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_ctrl`] +module"] +#[doc(alias = "CC1_CTRL")] +pub type Cc1Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc1_ctrl; -#[doc = "CC1_OC (rw) register accessor: an alias for `Reg`"] -pub type CC1_OC = crate::Reg; +#[doc = "CC1_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_oc`] +module"] +#[doc(alias = "CC1_OC")] +pub type Cc1Oc = crate::Reg; #[doc = "No Description"] pub mod cc1_oc; -#[doc = "CC1_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC1_OCB = crate::Reg; +#[doc = "CC1_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_ocb`] +module"] +#[doc(alias = "CC1_OCB")] +pub type Cc1Ocb = crate::Reg; #[doc = "No Description"] pub mod cc1_ocb; -#[doc = "CC1_ICF (r) register accessor: an alias for `Reg`"] -pub type CC1_ICF = crate::Reg; +#[doc = "CC1_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_icf`] +module"] +#[doc(alias = "CC1_ICF")] +pub type Cc1Icf = crate::Reg; #[doc = "No Description"] pub mod cc1_icf; -#[doc = "CC1_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC1_ICOF = crate::Reg; +#[doc = "CC1_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_icof`] +module"] +#[doc(alias = "CC1_ICOF")] +pub type Cc1Icof = crate::Reg; #[doc = "No Description"] pub mod cc1_icof; -#[doc = "CC2_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC2_CFG = crate::Reg; +#[doc = "CC2_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_cfg`] +module"] +#[doc(alias = "CC2_CFG")] +pub type Cc2Cfg = crate::Reg; #[doc = "No Description"] pub mod cc2_cfg; -#[doc = "CC2_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC2_CTRL = crate::Reg; +#[doc = "CC2_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_ctrl`] +module"] +#[doc(alias = "CC2_CTRL")] +pub type Cc2Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc2_ctrl; -#[doc = "CC2_OC (rw) register accessor: an alias for `Reg`"] -pub type CC2_OC = crate::Reg; +#[doc = "CC2_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_oc`] +module"] +#[doc(alias = "CC2_OC")] +pub type Cc2Oc = crate::Reg; #[doc = "No Description"] pub mod cc2_oc; -#[doc = "CC2_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC2_OCB = crate::Reg; +#[doc = "CC2_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_ocb`] +module"] +#[doc(alias = "CC2_OCB")] +pub type Cc2Ocb = crate::Reg; #[doc = "No Description"] pub mod cc2_ocb; -#[doc = "CC2_ICF (r) register accessor: an alias for `Reg`"] -pub type CC2_ICF = crate::Reg; +#[doc = "CC2_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_icf`] +module"] +#[doc(alias = "CC2_ICF")] +pub type Cc2Icf = crate::Reg; #[doc = "No Description"] pub mod cc2_icf; -#[doc = "CC2_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC2_ICOF = crate::Reg; +#[doc = "CC2_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_icof`] +module"] +#[doc(alias = "CC2_ICOF")] +pub type Cc2Icof = crate::Reg; #[doc = "No Description"] pub mod cc2_icof; -#[doc = "DTCFG (rw) register accessor: an alias for `Reg`"] -pub type DTCFG = crate::Reg; +#[doc = "DTCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtcfg`] +module"] +#[doc(alias = "DTCFG")] +pub type Dtcfg = crate::Reg; #[doc = "No Description"] pub mod dtcfg; -#[doc = "DTTIMECFG (rw) register accessor: an alias for `Reg`"] -pub type DTTIMECFG = crate::Reg; +#[doc = "DTTIMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dttimecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dttimecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dttimecfg`] +module"] +#[doc(alias = "DTTIMECFG")] +pub type Dttimecfg = crate::Reg; #[doc = "No Description"] pub mod dttimecfg; -#[doc = "DTFCFG (rw) register accessor: an alias for `Reg`"] -pub type DTFCFG = crate::Reg; +#[doc = "DTFCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfcfg`] +module"] +#[doc(alias = "DTFCFG")] +pub type Dtfcfg = crate::Reg; #[doc = "No Description"] pub mod dtfcfg; -#[doc = "DTCTRL (rw) register accessor: an alias for `Reg`"] -pub type DTCTRL = crate::Reg; +#[doc = "DTCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtctrl`] +module"] +#[doc(alias = "DTCTRL")] +pub type Dtctrl = crate::Reg; #[doc = "No Description"] pub mod dtctrl; -#[doc = "DTOGEN (rw) register accessor: an alias for `Reg`"] -pub type DTOGEN = crate::Reg; +#[doc = "DTOGEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtogen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtogen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtogen`] +module"] +#[doc(alias = "DTOGEN")] +pub type Dtogen = crate::Reg; #[doc = "No Description"] pub mod dtogen; -#[doc = "DTFAULT (r) register accessor: an alias for `Reg`"] -pub type DTFAULT = crate::Reg; +#[doc = "DTFAULT (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfault::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfault`] +module"] +#[doc(alias = "DTFAULT")] +pub type Dtfault = crate::Reg; #[doc = "No Description"] pub mod dtfault; -#[doc = "DTFAULTC (w) register accessor: an alias for `Reg`"] -pub type DTFAULTC = crate::Reg; +#[doc = "DTFAULTC (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfaultc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfaultc`] +module"] +#[doc(alias = "DTFAULTC")] +pub type Dtfaultc = crate::Reg; #[doc = "No Description"] pub mod dtfaultc; -#[doc = "DTLOCK (w) register accessor: an alias for `Reg`"] -pub type DTLOCK = crate::Reg; +#[doc = "DTLOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtlock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtlock`] +module"] +#[doc(alias = "DTLOCK")] +pub type Dtlock = crate::Reg; #[doc = "No Description"] pub mod dtlock; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc0_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc0_cfg.rs index 547eeb0..b3aac62 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc0_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc0_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC0_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC0_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_cfg](index.html) module"] -pub struct CC0_CFG_SPEC; -impl crate::RegisterSpec for CC0_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0CfgSpec; +impl crate::RegisterSpec for Cc0CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_cfg::R](R) reader structure"] -impl crate::Readable for CC0_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_cfg::W](W) writer structure"] -impl crate::Writable for CC0_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_cfg::R`](R) reader structure"] +impl crate::Readable for Cc0CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_cfg::W`](W) writer structure"] +impl crate::Writable for Cc0CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_CFG to value 0"] -impl crate::Resettable for CC0_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc0_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc0_ctrl.rs index 71b40e4..1b92d0c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc0_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc0_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC0_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_ctrl](index.html) module"] -pub struct CC0_CTRL_SPEC; -impl crate::RegisterSpec for CC0_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0CtrlSpec; +impl crate::RegisterSpec for Cc0CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_ctrl::R](R) reader structure"] -impl crate::Readable for CC0_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_ctrl::W](W) writer structure"] -impl crate::Writable for CC0_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc0CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc0CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_CTRL to value 0"] -impl crate::Resettable for CC0_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc0_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc0_icf.rs index f4a2c64..6afddea 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc0_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc0_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC0_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new((self.bits & 0xffff) as u16) + pub fn icf(&self) -> IcfR { + IcfR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_icf](index.html) module"] -pub struct CC0_ICF_SPEC; -impl crate::RegisterSpec for CC0_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0IcfSpec; +impl crate::RegisterSpec for Cc0IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_icf::R](R) reader structure"] -impl crate::Readable for CC0_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc0_icf::R`](R) reader structure"] +impl crate::Readable for Cc0IcfSpec {} #[doc = "`reset()` method sets CC0_ICF to value 0"] -impl crate::Resettable for CC0_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc0_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc0_icof.rs index 1ea3983..7653eef 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc0_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc0_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC0_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new((self.bits & 0xffff) as u16) + pub fn icof(&self) -> IcofR { + IcofR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_icof](index.html) module"] -pub struct CC0_ICOF_SPEC; -impl crate::RegisterSpec for CC0_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0IcofSpec; +impl crate::RegisterSpec for Cc0IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_icof::R](R) reader structure"] -impl crate::Readable for CC0_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc0_icof::R`](R) reader structure"] +impl crate::Readable for Cc0IcofSpec {} #[doc = "`reset()` method sets CC0_ICOF to value 0"] -impl crate::Resettable for CC0_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc0_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc0_oc.rs index 97be8b2..c063d52 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc0_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc0_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC0_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC0_OC_SPEC, u16, u16, 16, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new((self.bits & 0xffff) as u16) + pub fn oc(&self) -> OcR { + OcR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_oc](index.html) module"] -pub struct CC0_OC_SPEC; -impl crate::RegisterSpec for CC0_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0OcSpec; +impl crate::RegisterSpec for Cc0OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_oc::R](R) reader structure"] -impl crate::Readable for CC0_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_oc::W](W) writer structure"] -impl crate::Writable for CC0_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_oc::R`](R) reader structure"] +impl crate::Readable for Cc0OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_oc::W`](W) writer structure"] +impl crate::Writable for Cc0OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_OC to value 0"] -impl crate::Resettable for CC0_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc0_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc0_ocb.rs index af4e401..5924ded 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc0_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc0_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC0_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC0_OCB_SPEC, u16, u16, 16, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new((self.bits & 0xffff) as u16) + pub fn ocb(&self) -> OcbR { + OcbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_ocb](index.html) module"] -pub struct CC0_OCB_SPEC; -impl crate::RegisterSpec for CC0_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0OcbSpec; +impl crate::RegisterSpec for Cc0OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_ocb::R](R) reader structure"] -impl crate::Readable for CC0_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_ocb::W](W) writer structure"] -impl crate::Writable for CC0_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_ocb::R`](R) reader structure"] +impl crate::Readable for Cc0OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_ocb::W`](W) writer structure"] +impl crate::Writable for Cc0OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_OCB to value 0"] -impl crate::Resettable for CC0_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc1_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc1_cfg.rs index b3424c2..2243932 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc1_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc1_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC1_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC1_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_cfg](index.html) module"] -pub struct CC1_CFG_SPEC; -impl crate::RegisterSpec for CC1_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1CfgSpec; +impl crate::RegisterSpec for Cc1CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_cfg::R](R) reader structure"] -impl crate::Readable for CC1_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_cfg::W](W) writer structure"] -impl crate::Writable for CC1_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_cfg::R`](R) reader structure"] +impl crate::Readable for Cc1CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_cfg::W`](W) writer structure"] +impl crate::Writable for Cc1CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_CFG to value 0"] -impl crate::Resettable for CC1_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc1_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc1_ctrl.rs index 38927de..bc41282 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc1_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc1_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC1_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_ctrl](index.html) module"] -pub struct CC1_CTRL_SPEC; -impl crate::RegisterSpec for CC1_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1CtrlSpec; +impl crate::RegisterSpec for Cc1CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_ctrl::R](R) reader structure"] -impl crate::Readable for CC1_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_ctrl::W](W) writer structure"] -impl crate::Writable for CC1_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc1CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc1CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_CTRL to value 0"] -impl crate::Resettable for CC1_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc1_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc1_icf.rs index 1a7d7e8..0211b78 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc1_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc1_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC1_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new((self.bits & 0xffff) as u16) + pub fn icf(&self) -> IcfR { + IcfR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_icf](index.html) module"] -pub struct CC1_ICF_SPEC; -impl crate::RegisterSpec for CC1_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1IcfSpec; +impl crate::RegisterSpec for Cc1IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_icf::R](R) reader structure"] -impl crate::Readable for CC1_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc1_icf::R`](R) reader structure"] +impl crate::Readable for Cc1IcfSpec {} #[doc = "`reset()` method sets CC1_ICF to value 0"] -impl crate::Resettable for CC1_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc1_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc1_icof.rs index ea46e53..3fd845d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc1_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc1_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC1_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new((self.bits & 0xffff) as u16) + pub fn icof(&self) -> IcofR { + IcofR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_icof](index.html) module"] -pub struct CC1_ICOF_SPEC; -impl crate::RegisterSpec for CC1_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1IcofSpec; +impl crate::RegisterSpec for Cc1IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_icof::R](R) reader structure"] -impl crate::Readable for CC1_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc1_icof::R`](R) reader structure"] +impl crate::Readable for Cc1IcofSpec {} #[doc = "`reset()` method sets CC1_ICOF to value 0"] -impl crate::Resettable for CC1_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc1_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc1_oc.rs index 9f40c62..5b2e10b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc1_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc1_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC1_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC1_OC_SPEC, u16, u16, 16, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new((self.bits & 0xffff) as u16) + pub fn oc(&self) -> OcR { + OcR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_oc](index.html) module"] -pub struct CC1_OC_SPEC; -impl crate::RegisterSpec for CC1_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1OcSpec; +impl crate::RegisterSpec for Cc1OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_oc::R](R) reader structure"] -impl crate::Readable for CC1_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_oc::W](W) writer structure"] -impl crate::Writable for CC1_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_oc::R`](R) reader structure"] +impl crate::Readable for Cc1OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_oc::W`](W) writer structure"] +impl crate::Writable for Cc1OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_OC to value 0"] -impl crate::Resettable for CC1_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc1_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc1_ocb.rs index d3c8d9a..7d9f88b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc1_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc1_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC1_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC1_OCB_SPEC, u16, u16, 16, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new((self.bits & 0xffff) as u16) + pub fn ocb(&self) -> OcbR { + OcbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_ocb](index.html) module"] -pub struct CC1_OCB_SPEC; -impl crate::RegisterSpec for CC1_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1OcbSpec; +impl crate::RegisterSpec for Cc1OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_ocb::R](R) reader structure"] -impl crate::Readable for CC1_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_ocb::W](W) writer structure"] -impl crate::Writable for CC1_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_ocb::R`](R) reader structure"] +impl crate::Readable for Cc1OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_ocb::W`](W) writer structure"] +impl crate::Writable for Cc1OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_OCB to value 0"] -impl crate::Resettable for CC1_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc2_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc2_cfg.rs index 6b108e5..97bec45 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc2_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc2_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC2_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC2_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_cfg](index.html) module"] -pub struct CC2_CFG_SPEC; -impl crate::RegisterSpec for CC2_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2CfgSpec; +impl crate::RegisterSpec for Cc2CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_cfg::R](R) reader structure"] -impl crate::Readable for CC2_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_cfg::W](W) writer structure"] -impl crate::Writable for CC2_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_cfg::R`](R) reader structure"] +impl crate::Readable for Cc2CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_cfg::W`](W) writer structure"] +impl crate::Writable for Cc2CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_CFG to value 0"] -impl crate::Resettable for CC2_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc2_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc2_ctrl.rs index b42d120..317952a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc2_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc2_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC2_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_ctrl](index.html) module"] -pub struct CC2_CTRL_SPEC; -impl crate::RegisterSpec for CC2_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2CtrlSpec; +impl crate::RegisterSpec for Cc2CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_ctrl::R](R) reader structure"] -impl crate::Readable for CC2_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_ctrl::W](W) writer structure"] -impl crate::Writable for CC2_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc2CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc2CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_CTRL to value 0"] -impl crate::Resettable for CC2_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc2_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc2_icf.rs index 8282700..c1a0823 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc2_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc2_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC2_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new((self.bits & 0xffff) as u16) + pub fn icf(&self) -> IcfR { + IcfR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_icf](index.html) module"] -pub struct CC2_ICF_SPEC; -impl crate::RegisterSpec for CC2_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2IcfSpec; +impl crate::RegisterSpec for Cc2IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_icf::R](R) reader structure"] -impl crate::Readable for CC2_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc2_icf::R`](R) reader structure"] +impl crate::Readable for Cc2IcfSpec {} #[doc = "`reset()` method sets CC2_ICF to value 0"] -impl crate::Resettable for CC2_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc2_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc2_icof.rs index c21d7d3..0d399d1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc2_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc2_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC2_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new((self.bits & 0xffff) as u16) + pub fn icof(&self) -> IcofR { + IcofR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_icof](index.html) module"] -pub struct CC2_ICOF_SPEC; -impl crate::RegisterSpec for CC2_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2IcofSpec; +impl crate::RegisterSpec for Cc2IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_icof::R](R) reader structure"] -impl crate::Readable for CC2_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc2_icof::R`](R) reader structure"] +impl crate::Readable for Cc2IcofSpec {} #[doc = "`reset()` method sets CC2_ICOF to value 0"] -impl crate::Resettable for CC2_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc2_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc2_oc.rs index da9cc47..935617c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc2_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc2_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC2_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC2_OC_SPEC, u16, u16, 16, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new((self.bits & 0xffff) as u16) + pub fn oc(&self) -> OcR { + OcR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_oc](index.html) module"] -pub struct CC2_OC_SPEC; -impl crate::RegisterSpec for CC2_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2OcSpec; +impl crate::RegisterSpec for Cc2OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_oc::R](R) reader structure"] -impl crate::Readable for CC2_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_oc::W](W) writer structure"] -impl crate::Writable for CC2_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_oc::R`](R) reader structure"] +impl crate::Readable for Cc2OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_oc::W`](W) writer structure"] +impl crate::Writable for Cc2OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_OC to value 0"] -impl crate::Resettable for CC2_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc2_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc2_ocb.rs index 1ab93d6..ee6c4e5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc2_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cc2_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC2_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC2_OCB_SPEC, u16, u16, 16, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new((self.bits & 0xffff) as u16) + pub fn ocb(&self) -> OcbR { + OcbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_ocb](index.html) module"] -pub struct CC2_OCB_SPEC; -impl crate::RegisterSpec for CC2_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2OcbSpec; +impl crate::RegisterSpec for Cc2OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_ocb::R](R) reader structure"] -impl crate::Readable for CC2_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_ocb::W](W) writer structure"] -impl crate::Writable for CC2_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_ocb::R`](R) reader structure"] +impl crate::Readable for Cc2OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_ocb::W`](W) writer structure"] +impl crate::Writable for Cc2OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_OCB to value 0"] -impl crate::Resettable for CC2_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cfg.rs index ea2a1e1..b4cc2fd 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cfg.rs @@ -1,775 +1,774 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - Timer Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Timer Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Up-count mode"] - UP = 0, + Up = 0, #[doc = "1: Down-count mode"] - DOWN = 1, + Down = 1, #[doc = "2: Up/down-count mode"] - UPDOWN = 2, + Updown = 2, #[doc = "3: Quadrature decoder mode"] - QDEC = 3, + Qdec = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - Timer Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::UP, - 1 => MODE_A::DOWN, - 2 => MODE_A::UPDOWN, - 3 => MODE_A::QDEC, + 0 => Mode::Up, + 1 => Mode::Down, + 2 => Mode::Updown, + 3 => Mode::Qdec, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Up-count mode"] #[inline(always)] pub fn is_up(&self) -> bool { - *self == MODE_A::UP + *self == Mode::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Down-count mode"] #[inline(always)] pub fn is_down(&self) -> bool { - *self == MODE_A::DOWN + *self == Mode::Down } - #[doc = "Checks if the value of the field is `UPDOWN`"] + #[doc = "Up/down-count mode"] #[inline(always)] pub fn is_updown(&self) -> bool { - *self == MODE_A::UPDOWN + *self == Mode::Updown } - #[doc = "Checks if the value of the field is `QDEC`"] + #[doc = "Quadrature decoder mode"] #[inline(always)] pub fn is_qdec(&self) -> bool { - *self == MODE_A::QDEC + *self == Mode::Qdec } } #[doc = "Field `MODE` writer - Timer Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Up-count mode"] #[inline(always)] - pub fn up(self) -> &'a mut W { - self.variant(MODE_A::UP) + pub fn up(self) -> &'a mut crate::W { + self.variant(Mode::Up) } #[doc = "Down-count mode"] #[inline(always)] - pub fn down(self) -> &'a mut W { - self.variant(MODE_A::DOWN) + pub fn down(self) -> &'a mut crate::W { + self.variant(Mode::Down) } #[doc = "Up/down-count mode"] #[inline(always)] - pub fn updown(self) -> &'a mut W { - self.variant(MODE_A::UPDOWN) + pub fn updown(self) -> &'a mut crate::W { + self.variant(Mode::Updown) } #[doc = "Quadrature decoder mode"] #[inline(always)] - pub fn qdec(self) -> &'a mut W { - self.variant(MODE_A::QDEC) + pub fn qdec(self) -> &'a mut crate::W { + self.variant(Mode::Qdec) } } -#[doc = "Field `SYNC` reader - Timer Start/Stop/Reload Synchronization"] -pub type SYNC_R = crate::BitReader; #[doc = "Timer Start/Stop/Reload Synchronization\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYNC_A { +pub enum Sync { #[doc = "0: Timer operation is unaffected by other timers."] - DISABLE = 0, + Disable = 0, #[doc = "1: Timer may be started, stopped and re-loaded from other timer instances."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYNC_A) -> Self { + fn from(variant: Sync) -> Self { variant as u8 != 0 } } -impl SYNC_R { +#[doc = "Field `SYNC` reader - Timer Start/Stop/Reload Synchronization"] +pub type SyncR = crate::BitReader; +impl SyncR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SYNC_A { + pub const fn variant(&self) -> Sync { match self.bits { - false => SYNC_A::DISABLE, - true => SYNC_A::ENABLE, + false => Sync::Disable, + true => Sync::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Timer operation is unaffected by other timers."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == SYNC_A::DISABLE + *self == Sync::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Timer may be started, stopped and re-loaded from other timer instances."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == SYNC_A::ENABLE + *self == Sync::Enable } } #[doc = "Field `SYNC` writer - Timer Start/Stop/Reload Synchronization"] -pub type SYNC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, SYNC_A, O>; -impl<'a, const O: u8> SYNC_W<'a, O> { +pub type SyncW<'a, REG> = crate::BitWriter<'a, REG, Sync>; +impl<'a, REG> SyncW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer operation is unaffected by other timers."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(SYNC_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Sync::Disable) } #[doc = "Timer may be started, stopped and re-loaded from other timer instances."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(SYNC_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Sync::Enable) } } #[doc = "Field `OSMEN` reader - One-shot Mode Enable"] -pub type OSMEN_R = crate::BitReader; +pub type OsmenR = crate::BitReader; #[doc = "Field `OSMEN` writer - One-shot Mode Enable"] -pub type OSMEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `QDM` reader - Quadrature Decoder Mode Selection"] -pub type QDM_R = crate::BitReader; +pub type OsmenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Quadrature Decoder Mode Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum QDM_A { +pub enum Qdm { #[doc = "0: X2 mode selected"] X2 = 0, #[doc = "1: X4 mode selected"] X4 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: QDM_A) -> Self { + fn from(variant: Qdm) -> Self { variant as u8 != 0 } } -impl QDM_R { +#[doc = "Field `QDM` reader - Quadrature Decoder Mode Selection"] +pub type QdmR = crate::BitReader; +impl QdmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> QDM_A { + pub const fn variant(&self) -> Qdm { match self.bits { - false => QDM_A::X2, - true => QDM_A::X4, + false => Qdm::X2, + true => Qdm::X4, } } - #[doc = "Checks if the value of the field is `X2`"] + #[doc = "X2 mode selected"] #[inline(always)] pub fn is_x2(&self) -> bool { - *self == QDM_A::X2 + *self == Qdm::X2 } - #[doc = "Checks if the value of the field is `X4`"] + #[doc = "X4 mode selected"] #[inline(always)] pub fn is_x4(&self) -> bool { - *self == QDM_A::X4 + *self == Qdm::X4 } } #[doc = "Field `QDM` writer - Quadrature Decoder Mode Selection"] -pub type QDM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, QDM_A, O>; -impl<'a, const O: u8> QDM_W<'a, O> { +pub type QdmW<'a, REG> = crate::BitWriter<'a, REG, Qdm>; +impl<'a, REG> QdmW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "X2 mode selected"] #[inline(always)] - pub fn x2(self) -> &'a mut W { - self.variant(QDM_A::X2) + pub fn x2(self) -> &'a mut crate::W { + self.variant(Qdm::X2) } #[doc = "X4 mode selected"] #[inline(always)] - pub fn x4(self) -> &'a mut W { - self.variant(QDM_A::X4) + pub fn x4(self) -> &'a mut crate::W { + self.variant(Qdm::X4) } } -#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] -pub type DEBUGRUN_R = crate::BitReader; #[doc = "Debug Mode Run Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DEBUGRUN_A { +pub enum Debugrun { #[doc = "0: Timer is halted in debug mode"] - HALT = 0, + Halt = 0, #[doc = "1: Timer is running in debug mode"] - RUN = 1, + Run = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DEBUGRUN_A) -> Self { + fn from(variant: Debugrun) -> Self { variant as u8 != 0 } } -impl DEBUGRUN_R { +#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] +pub type DebugrunR = crate::BitReader; +impl DebugrunR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DEBUGRUN_A { + pub const fn variant(&self) -> Debugrun { match self.bits { - false => DEBUGRUN_A::HALT, - true => DEBUGRUN_A::RUN, + false => Debugrun::Halt, + true => Debugrun::Run, } } - #[doc = "Checks if the value of the field is `HALT`"] + #[doc = "Timer is halted in debug mode"] #[inline(always)] pub fn is_halt(&self) -> bool { - *self == DEBUGRUN_A::HALT + *self == Debugrun::Halt } - #[doc = "Checks if the value of the field is `RUN`"] + #[doc = "Timer is running in debug mode"] #[inline(always)] pub fn is_run(&self) -> bool { - *self == DEBUGRUN_A::RUN + *self == Debugrun::Run } } #[doc = "Field `DEBUGRUN` writer - Debug Mode Run Enable"] -pub type DEBUGRUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DEBUGRUN_A, O>; -impl<'a, const O: u8> DEBUGRUN_W<'a, O> { +pub type DebugrunW<'a, REG> = crate::BitWriter<'a, REG, Debugrun>; +impl<'a, REG> DebugrunW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer is halted in debug mode"] #[inline(always)] - pub fn halt(self) -> &'a mut W { - self.variant(DEBUGRUN_A::HALT) + pub fn halt(self) -> &'a mut crate::W { + self.variant(Debugrun::Halt) } #[doc = "Timer is running in debug mode"] #[inline(always)] - pub fn run(self) -> &'a mut W { - self.variant(DEBUGRUN_A::RUN) + pub fn run(self) -> &'a mut crate::W { + self.variant(Debugrun::Run) } } #[doc = "Field `DMACLRACT` reader - DMA Request Clear on Active"] -pub type DMACLRACT_R = crate::BitReader; +pub type DmaclractR = crate::BitReader; #[doc = "Field `DMACLRACT` writer - DMA Request Clear on Active"] -pub type DMACLRACT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `CLKSEL` reader - Clock Source Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type DmaclractW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Clock Source Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "0: Prescaled EM01GRPACLK"] - PRESCEM01GRPACLK = 0, + Prescem01grpaclk = 0, #[doc = "1: Compare/Capture Channel 1 Input"] - CC1 = 1, + Cc1 = 1, #[doc = "2: Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] - TIMEROUF = 2, + Timerouf = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Source Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKSEL_A::PRESCEM01GRPACLK), - 1 => Some(CLKSEL_A::CC1), - 2 => Some(CLKSEL_A::TIMEROUF), + 0 => Some(Clksel::Prescem01grpaclk), + 1 => Some(Clksel::Cc1), + 2 => Some(Clksel::Timerouf), _ => None, } } - #[doc = "Checks if the value of the field is `PRESCEM01GRPACLK`"] + #[doc = "Prescaled EM01GRPACLK"] #[inline(always)] pub fn is_prescem01grpaclk(&self) -> bool { - *self == CLKSEL_A::PRESCEM01GRPACLK + *self == Clksel::Prescem01grpaclk } - #[doc = "Checks if the value of the field is `CC1`"] + #[doc = "Compare/Capture Channel 1 Input"] #[inline(always)] pub fn is_cc1(&self) -> bool { - *self == CLKSEL_A::CC1 + *self == Clksel::Cc1 } - #[doc = "Checks if the value of the field is `TIMEROUF`"] + #[doc = "Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] #[inline(always)] pub fn is_timerouf(&self) -> bool { - *self == CLKSEL_A::TIMEROUF + *self == Clksel::Timerouf } } #[doc = "Field `CLKSEL` writer - Clock Source Select"] -pub type CLKSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, CLKSEL_A, 2, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Prescaled EM01GRPACLK"] #[inline(always)] - pub fn prescem01grpaclk(self) -> &'a mut W { - self.variant(CLKSEL_A::PRESCEM01GRPACLK) + pub fn prescem01grpaclk(self) -> &'a mut crate::W { + self.variant(Clksel::Prescem01grpaclk) } #[doc = "Compare/Capture Channel 1 Input"] #[inline(always)] - pub fn cc1(self) -> &'a mut W { - self.variant(CLKSEL_A::CC1) + pub fn cc1(self) -> &'a mut crate::W { + self.variant(Clksel::Cc1) } #[doc = "Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] #[inline(always)] - pub fn timerouf(self) -> &'a mut W { - self.variant(CLKSEL_A::TIMEROUF) + pub fn timerouf(self) -> &'a mut crate::W { + self.variant(Clksel::Timerouf) } } -#[doc = "Field `RETIMEEN` reader - PWM output retimed enable"] -pub type RETIMEEN_R = crate::BitReader; #[doc = "PWM output retimed enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RETIMEEN_A { +pub enum Retimeen { #[doc = "0: PWM outputs are not re-timed."] - DISABLE = 0, + Disable = 0, #[doc = "1: PWM outputs are re-timed."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RETIMEEN_A) -> Self { + fn from(variant: Retimeen) -> Self { variant as u8 != 0 } } -impl RETIMEEN_R { +#[doc = "Field `RETIMEEN` reader - PWM output retimed enable"] +pub type RetimeenR = crate::BitReader; +impl RetimeenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RETIMEEN_A { + pub const fn variant(&self) -> Retimeen { match self.bits { - false => RETIMEEN_A::DISABLE, - true => RETIMEEN_A::ENABLE, + false => Retimeen::Disable, + true => Retimeen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "PWM outputs are not re-timed."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RETIMEEN_A::DISABLE + *self == Retimeen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "PWM outputs are re-timed."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RETIMEEN_A::ENABLE + *self == Retimeen::Enable } } #[doc = "Field `RETIMEEN` writer - PWM output retimed enable"] -pub type RETIMEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, RETIMEEN_A, O>; -impl<'a, const O: u8> RETIMEEN_W<'a, O> { +pub type RetimeenW<'a, REG> = crate::BitWriter<'a, REG, Retimeen>; +impl<'a, REG> RetimeenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "PWM outputs are not re-timed."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RETIMEEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Retimeen::Disable) } #[doc = "PWM outputs are re-timed."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RETIMEEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Retimeen::Enable) } } -#[doc = "Field `DISSYNCOUT` reader - Disable Timer Start/Stop/Reload output"] -pub type DISSYNCOUT_R = crate::BitReader; #[doc = "Disable Timer Start/Stop/Reload output\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DISSYNCOUT_A { +pub enum Dissyncout { #[doc = "0: Timer can start/stop/reload other timers with SYNC bit set"] - EN = 0, + En = 0, #[doc = "1: Timer cannot start/stop/reload other timers with SYNC bit set"] - DIS = 1, + Dis = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DISSYNCOUT_A) -> Self { + fn from(variant: Dissyncout) -> Self { variant as u8 != 0 } } -impl DISSYNCOUT_R { +#[doc = "Field `DISSYNCOUT` reader - Disable Timer Start/Stop/Reload output"] +pub type DissyncoutR = crate::BitReader; +impl DissyncoutR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DISSYNCOUT_A { + pub const fn variant(&self) -> Dissyncout { match self.bits { - false => DISSYNCOUT_A::EN, - true => DISSYNCOUT_A::DIS, + false => Dissyncout::En, + true => Dissyncout::Dis, } } - #[doc = "Checks if the value of the field is `EN`"] + #[doc = "Timer can start/stop/reload other timers with SYNC bit set"] #[inline(always)] pub fn is_en(&self) -> bool { - *self == DISSYNCOUT_A::EN + *self == Dissyncout::En } - #[doc = "Checks if the value of the field is `DIS`"] + #[doc = "Timer cannot start/stop/reload other timers with SYNC bit set"] #[inline(always)] pub fn is_dis(&self) -> bool { - *self == DISSYNCOUT_A::DIS + *self == Dissyncout::Dis } } #[doc = "Field `DISSYNCOUT` writer - Disable Timer Start/Stop/Reload output"] -pub type DISSYNCOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DISSYNCOUT_A, O>; -impl<'a, const O: u8> DISSYNCOUT_W<'a, O> { +pub type DissyncoutW<'a, REG> = crate::BitWriter<'a, REG, Dissyncout>; +impl<'a, REG> DissyncoutW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer can start/stop/reload other timers with SYNC bit set"] #[inline(always)] - pub fn en(self) -> &'a mut W { - self.variant(DISSYNCOUT_A::EN) + pub fn en(self) -> &'a mut crate::W { + self.variant(Dissyncout::En) } #[doc = "Timer cannot start/stop/reload other timers with SYNC bit set"] #[inline(always)] - pub fn dis(self) -> &'a mut W { - self.variant(DISSYNCOUT_A::DIS) + pub fn dis(self) -> &'a mut crate::W { + self.variant(Dissyncout::Dis) } } #[doc = "Field `ATI` reader - Always Track Inputs"] -pub type ATI_R = crate::BitReader; +pub type AtiR = crate::BitReader; #[doc = "Field `ATI` writer - Always Track Inputs"] -pub type ATI_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type AtiW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RSSCOIST` reader - Reload-Start Sets COIST"] -pub type RSSCOIST_R = crate::BitReader; +pub type RsscoistR = crate::BitReader; #[doc = "Field `RSSCOIST` writer - Reload-Start Sets COIST"] -pub type RSSCOIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `PRESC` reader - Prescaler Setting"] -pub type PRESC_R = crate::FieldReader; +pub type RsscoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Prescaler Setting\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum PRESC_A { +pub enum Presc { #[doc = "0: No prescaling"] - DIV1 = 0, + Div1 = 0, #[doc = "1: Prescale by 2"] - DIV2 = 1, + Div2 = 1, #[doc = "3: Prescale by 4"] - DIV4 = 3, + Div4 = 3, #[doc = "7: Prescale by 8"] - DIV8 = 7, + Div8 = 7, #[doc = "15: Prescale by 16"] - DIV16 = 15, + Div16 = 15, #[doc = "31: Prescale by 32"] - DIV32 = 31, + Div32 = 31, #[doc = "63: Prescale by 64"] - DIV64 = 63, + Div64 = 63, #[doc = "127: Prescale by 128"] - DIV128 = 127, + Div128 = 127, #[doc = "255: Prescale by 256"] - DIV256 = 255, + Div256 = 255, #[doc = "511: Prescale by 512"] - DIV512 = 511, + Div512 = 511, #[doc = "1023: Prescale by 1024"] - DIV1024 = 1023, + Div1024 = 1023, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: PRESC_A) -> Self { + fn from(variant: Presc) -> Self { variant as _ } } -impl PRESC_R { +impl crate::FieldSpec for Presc { + type Ux = u16; +} +impl crate::IsEnum for Presc {} +#[doc = "Field `PRESC` reader - Prescaler Setting"] +pub type PrescR = crate::FieldReader; +impl PrescR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PRESC_A::DIV1), - 1 => Some(PRESC_A::DIV2), - 3 => Some(PRESC_A::DIV4), - 7 => Some(PRESC_A::DIV8), - 15 => Some(PRESC_A::DIV16), - 31 => Some(PRESC_A::DIV32), - 63 => Some(PRESC_A::DIV64), - 127 => Some(PRESC_A::DIV128), - 255 => Some(PRESC_A::DIV256), - 511 => Some(PRESC_A::DIV512), - 1023 => Some(PRESC_A::DIV1024), + 0 => Some(Presc::Div1), + 1 => Some(Presc::Div2), + 3 => Some(Presc::Div4), + 7 => Some(Presc::Div8), + 15 => Some(Presc::Div16), + 31 => Some(Presc::Div32), + 63 => Some(Presc::Div64), + 127 => Some(Presc::Div128), + 255 => Some(Presc::Div256), + 511 => Some(Presc::Div512), + 1023 => Some(Presc::Div1024), _ => None, } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "No prescaling"] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == PRESC_A::DIV1 + *self == Presc::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "Prescale by 2"] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == PRESC_A::DIV2 + *self == Presc::Div2 } - #[doc = "Checks if the value of the field is `DIV4`"] + #[doc = "Prescale by 4"] #[inline(always)] pub fn is_div4(&self) -> bool { - *self == PRESC_A::DIV4 + *self == Presc::Div4 } - #[doc = "Checks if the value of the field is `DIV8`"] + #[doc = "Prescale by 8"] #[inline(always)] pub fn is_div8(&self) -> bool { - *self == PRESC_A::DIV8 + *self == Presc::Div8 } - #[doc = "Checks if the value of the field is `DIV16`"] + #[doc = "Prescale by 16"] #[inline(always)] pub fn is_div16(&self) -> bool { - *self == PRESC_A::DIV16 + *self == Presc::Div16 } - #[doc = "Checks if the value of the field is `DIV32`"] + #[doc = "Prescale by 32"] #[inline(always)] pub fn is_div32(&self) -> bool { - *self == PRESC_A::DIV32 + *self == Presc::Div32 } - #[doc = "Checks if the value of the field is `DIV64`"] + #[doc = "Prescale by 64"] #[inline(always)] pub fn is_div64(&self) -> bool { - *self == PRESC_A::DIV64 + *self == Presc::Div64 } - #[doc = "Checks if the value of the field is `DIV128`"] + #[doc = "Prescale by 128"] #[inline(always)] pub fn is_div128(&self) -> bool { - *self == PRESC_A::DIV128 + *self == Presc::Div128 } - #[doc = "Checks if the value of the field is `DIV256`"] + #[doc = "Prescale by 256"] #[inline(always)] pub fn is_div256(&self) -> bool { - *self == PRESC_A::DIV256 + *self == Presc::Div256 } - #[doc = "Checks if the value of the field is `DIV512`"] + #[doc = "Prescale by 512"] #[inline(always)] pub fn is_div512(&self) -> bool { - *self == PRESC_A::DIV512 + *self == Presc::Div512 } - #[doc = "Checks if the value of the field is `DIV1024`"] + #[doc = "Prescale by 1024"] #[inline(always)] pub fn is_div1024(&self) -> bool { - *self == PRESC_A::DIV1024 + *self == Presc::Div1024 } } #[doc = "Field `PRESC` writer - Prescaler Setting"] -pub type PRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u16, PRESC_A, 10, O>; -impl<'a, const O: u8> PRESC_W<'a, O> { +pub type PrescW<'a, REG> = crate::FieldWriter<'a, REG, 10, Presc>; +impl<'a, REG> PrescW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No prescaling"] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(PRESC_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Presc::Div1) } #[doc = "Prescale by 2"] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(PRESC_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Presc::Div2) } #[doc = "Prescale by 4"] #[inline(always)] - pub fn div4(self) -> &'a mut W { - self.variant(PRESC_A::DIV4) + pub fn div4(self) -> &'a mut crate::W { + self.variant(Presc::Div4) } #[doc = "Prescale by 8"] #[inline(always)] - pub fn div8(self) -> &'a mut W { - self.variant(PRESC_A::DIV8) + pub fn div8(self) -> &'a mut crate::W { + self.variant(Presc::Div8) } #[doc = "Prescale by 16"] #[inline(always)] - pub fn div16(self) -> &'a mut W { - self.variant(PRESC_A::DIV16) + pub fn div16(self) -> &'a mut crate::W { + self.variant(Presc::Div16) } #[doc = "Prescale by 32"] #[inline(always)] - pub fn div32(self) -> &'a mut W { - self.variant(PRESC_A::DIV32) + pub fn div32(self) -> &'a mut crate::W { + self.variant(Presc::Div32) } #[doc = "Prescale by 64"] #[inline(always)] - pub fn div64(self) -> &'a mut W { - self.variant(PRESC_A::DIV64) + pub fn div64(self) -> &'a mut crate::W { + self.variant(Presc::Div64) } #[doc = "Prescale by 128"] #[inline(always)] - pub fn div128(self) -> &'a mut W { - self.variant(PRESC_A::DIV128) + pub fn div128(self) -> &'a mut crate::W { + self.variant(Presc::Div128) } #[doc = "Prescale by 256"] #[inline(always)] - pub fn div256(self) -> &'a mut W { - self.variant(PRESC_A::DIV256) + pub fn div256(self) -> &'a mut crate::W { + self.variant(Presc::Div256) } #[doc = "Prescale by 512"] #[inline(always)] - pub fn div512(self) -> &'a mut W { - self.variant(PRESC_A::DIV512) + pub fn div512(self) -> &'a mut crate::W { + self.variant(Presc::Div512) } #[doc = "Prescale by 1024"] #[inline(always)] - pub fn div1024(self) -> &'a mut W { - self.variant(PRESC_A::DIV1024) + pub fn div1024(self) -> &'a mut crate::W { + self.variant(Presc::Div1024) } } impl R { #[doc = "Bits 0:1 - Timer Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Timer Start/Stop/Reload Synchronization"] #[inline(always)] - pub fn sync(&self) -> SYNC_R { - SYNC_R::new(((self.bits >> 3) & 1) != 0) + pub fn sync(&self) -> SyncR { + SyncR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - One-shot Mode Enable"] #[inline(always)] - pub fn osmen(&self) -> OSMEN_R { - OSMEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn osmen(&self) -> OsmenR { + OsmenR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Quadrature Decoder Mode Selection"] #[inline(always)] - pub fn qdm(&self) -> QDM_R { - QDM_R::new(((self.bits >> 5) & 1) != 0) + pub fn qdm(&self) -> QdmR { + QdmR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Debug Mode Run Enable"] #[inline(always)] - pub fn debugrun(&self) -> DEBUGRUN_R { - DEBUGRUN_R::new(((self.bits >> 6) & 1) != 0) + pub fn debugrun(&self) -> DebugrunR { + DebugrunR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - DMA Request Clear on Active"] #[inline(always)] - pub fn dmaclract(&self) -> DMACLRACT_R { - DMACLRACT_R::new(((self.bits >> 7) & 1) != 0) + pub fn dmaclract(&self) -> DmaclractR { + DmaclractR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:9 - Clock Source Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 10 - PWM output retimed enable"] #[inline(always)] - pub fn retimeen(&self) -> RETIMEEN_R { - RETIMEEN_R::new(((self.bits >> 10) & 1) != 0) + pub fn retimeen(&self) -> RetimeenR { + RetimeenR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Disable Timer Start/Stop/Reload output"] #[inline(always)] - pub fn dissyncout(&self) -> DISSYNCOUT_R { - DISSYNCOUT_R::new(((self.bits >> 11) & 1) != 0) + pub fn dissyncout(&self) -> DissyncoutR { + DissyncoutR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 16 - Always Track Inputs"] #[inline(always)] - pub fn ati(&self) -> ATI_R { - ATI_R::new(((self.bits >> 16) & 1) != 0) + pub fn ati(&self) -> AtiR { + AtiR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Reload-Start Sets COIST"] #[inline(always)] - pub fn rsscoist(&self) -> RSSCOIST_R { - RSSCOIST_R::new(((self.bits >> 17) & 1) != 0) + pub fn rsscoist(&self) -> RsscoistR { + RsscoistR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:27 - Prescaler Setting"] #[inline(always)] - pub fn presc(&self) -> PRESC_R { - PRESC_R::new(((self.bits >> 18) & 0x03ff) as u16) + pub fn presc(&self) -> PrescR { + PrescR::new(((self.bits >> 18) & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:1 - Timer Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 3 - Timer Start/Stop/Reload Synchronization"] #[inline(always)] #[must_use] - pub fn sync(&mut self) -> SYNC_W<3> { - SYNC_W::new(self) + pub fn sync(&mut self) -> SyncW { + SyncW::new(self, 3) } #[doc = "Bit 4 - One-shot Mode Enable"] #[inline(always)] #[must_use] - pub fn osmen(&mut self) -> OSMEN_W<4> { - OSMEN_W::new(self) + pub fn osmen(&mut self) -> OsmenW { + OsmenW::new(self, 4) } #[doc = "Bit 5 - Quadrature Decoder Mode Selection"] #[inline(always)] #[must_use] - pub fn qdm(&mut self) -> QDM_W<5> { - QDM_W::new(self) + pub fn qdm(&mut self) -> QdmW { + QdmW::new(self, 5) } #[doc = "Bit 6 - Debug Mode Run Enable"] #[inline(always)] #[must_use] - pub fn debugrun(&mut self) -> DEBUGRUN_W<6> { - DEBUGRUN_W::new(self) + pub fn debugrun(&mut self) -> DebugrunW { + DebugrunW::new(self, 6) } #[doc = "Bit 7 - DMA Request Clear on Active"] #[inline(always)] #[must_use] - pub fn dmaclract(&mut self) -> DMACLRACT_W<7> { - DMACLRACT_W::new(self) + pub fn dmaclract(&mut self) -> DmaclractW { + DmaclractW::new(self, 7) } #[doc = "Bits 8:9 - Clock Source Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<8> { - CLKSEL_W::new(self) + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 8) } #[doc = "Bit 10 - PWM output retimed enable"] #[inline(always)] #[must_use] - pub fn retimeen(&mut self) -> RETIMEEN_W<10> { - RETIMEEN_W::new(self) + pub fn retimeen(&mut self) -> RetimeenW { + RetimeenW::new(self, 10) } #[doc = "Bit 11 - Disable Timer Start/Stop/Reload output"] #[inline(always)] #[must_use] - pub fn dissyncout(&mut self) -> DISSYNCOUT_W<11> { - DISSYNCOUT_W::new(self) + pub fn dissyncout(&mut self) -> DissyncoutW { + DissyncoutW::new(self, 11) } #[doc = "Bit 16 - Always Track Inputs"] #[inline(always)] #[must_use] - pub fn ati(&mut self) -> ATI_W<16> { - ATI_W::new(self) + pub fn ati(&mut self) -> AtiW { + AtiW::new(self, 16) } #[doc = "Bit 17 - Reload-Start Sets COIST"] #[inline(always)] #[must_use] - pub fn rsscoist(&mut self) -> RSSCOIST_W<17> { - RSSCOIST_W::new(self) + pub fn rsscoist(&mut self) -> RsscoistW { + RsscoistW::new(self, 17) } #[doc = "Bits 18:27 - Prescaler Setting"] #[inline(always)] #[must_use] - pub fn presc(&mut self) -> PRESC_W<18> { - PRESC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn presc(&mut self) -> PrescW { + PrescW::new(self, 18) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cmd.rs index ca6d3b1..bf41157 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cmd.rs @@ -1,60 +1,35 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` writer - Start Timer"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STOP` writer - Stop Timer"] -pub type STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StopW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Start Timer"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Stop Timer"] #[inline(always)] #[must_use] - pub fn stop(&mut self) -> STOP_W<1> { - STOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stop(&mut self) -> StopW { + StopW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cnt.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cnt.rs index dd37661..c870fc9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cnt.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/cnt.rs @@ -1,80 +1,40 @@ #[doc = "Register `CNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CNT` reader - Counter Value"] -pub type CNT_R = crate::FieldReader; +pub type CntR = crate::FieldReader; #[doc = "Field `CNT` writer - Counter Value"] -pub type CNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CNT_SPEC, u16, u16, 16, O>; +pub type CntW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Value"] #[inline(always)] - pub fn cnt(&self) -> CNT_R { - CNT_R::new((self.bits & 0xffff) as u16) + pub fn cnt(&self) -> CntR { + CntR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Value"] #[inline(always)] #[must_use] - pub fn cnt(&mut self) -> CNT_W<0> { - CNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cnt(&mut self) -> CntW { + CntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](index.html) module"] -pub struct CNT_SPEC; -impl crate::RegisterSpec for CNT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CntSpec; +impl crate::RegisterSpec for CntSpec { type Ux = u32; } -#[doc = "`read()` method returns [cnt::R](R) reader structure"] -impl crate::Readable for CNT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnt::W](W) writer structure"] -impl crate::Writable for CNT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cnt::R`](R) reader structure"] +impl crate::Readable for CntSpec {} +#[doc = "`write(|w| ..)` method takes [`cnt::W`](W) writer structure"] +impl crate::Writable for CntSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNT to value 0"] -impl crate::Resettable for CNT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CntSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/ctrl.rs index 08e646b..e2ed153 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/ctrl.rs @@ -1,258 +1,234 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `RISEA` reader - Timer Rising Input Edge Action"] -pub type RISEA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Timer Rising Input Edge Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RISEA_A { +pub enum Risea { #[doc = "0: No action"] - NONE = 0, + None = 0, #[doc = "1: Start counter without reload"] - START = 1, + Start = 1, #[doc = "2: Stop counter without reload"] - STOP = 2, + Stop = 2, #[doc = "3: Reload and start counter"] - RELOADSTART = 3, + Reloadstart = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RISEA_A) -> Self { + fn from(variant: Risea) -> Self { variant as _ } } -impl RISEA_R { +impl crate::FieldSpec for Risea { + type Ux = u8; +} +impl crate::IsEnum for Risea {} +#[doc = "Field `RISEA` reader - Timer Rising Input Edge Action"] +pub type RiseaR = crate::FieldReader; +impl RiseaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RISEA_A { + pub const fn variant(&self) -> Risea { match self.bits { - 0 => RISEA_A::NONE, - 1 => RISEA_A::START, - 2 => RISEA_A::STOP, - 3 => RISEA_A::RELOADSTART, + 0 => Risea::None, + 1 => Risea::Start, + 2 => Risea::Stop, + 3 => Risea::Reloadstart, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == RISEA_A::NONE + *self == Risea::None } - #[doc = "Checks if the value of the field is `START`"] + #[doc = "Start counter without reload"] #[inline(always)] pub fn is_start(&self) -> bool { - *self == RISEA_A::START + *self == Risea::Start } - #[doc = "Checks if the value of the field is `STOP`"] + #[doc = "Stop counter without reload"] #[inline(always)] pub fn is_stop(&self) -> bool { - *self == RISEA_A::STOP + *self == Risea::Stop } - #[doc = "Checks if the value of the field is `RELOADSTART`"] + #[doc = "Reload and start counter"] #[inline(always)] pub fn is_reloadstart(&self) -> bool { - *self == RISEA_A::RELOADSTART + *self == Risea::Reloadstart } } #[doc = "Field `RISEA` writer - Timer Rising Input Edge Action"] -pub type RISEA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, RISEA_A, 2, O>; -impl<'a, const O: u8> RISEA_W<'a, O> { +pub type RiseaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Risea, crate::Safe>; +impl<'a, REG> RiseaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(RISEA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Risea::None) } #[doc = "Start counter without reload"] #[inline(always)] - pub fn start(self) -> &'a mut W { - self.variant(RISEA_A::START) + pub fn start(self) -> &'a mut crate::W { + self.variant(Risea::Start) } #[doc = "Stop counter without reload"] #[inline(always)] - pub fn stop(self) -> &'a mut W { - self.variant(RISEA_A::STOP) + pub fn stop(self) -> &'a mut crate::W { + self.variant(Risea::Stop) } #[doc = "Reload and start counter"] #[inline(always)] - pub fn reloadstart(self) -> &'a mut W { - self.variant(RISEA_A::RELOADSTART) + pub fn reloadstart(self) -> &'a mut crate::W { + self.variant(Risea::Reloadstart) } } -#[doc = "Field `FALLA` reader - Timer Falling Input Edge Action"] -pub type FALLA_R = crate::FieldReader; #[doc = "Timer Falling Input Edge Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FALLA_A { +pub enum Falla { #[doc = "0: No action"] - NONE = 0, + None = 0, #[doc = "1: Start counter without reload"] - START = 1, + Start = 1, #[doc = "2: Stop counter without reload"] - STOP = 2, + Stop = 2, #[doc = "3: Reload and start counter"] - RELOADSTART = 3, + Reloadstart = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FALLA_A) -> Self { + fn from(variant: Falla) -> Self { variant as _ } } -impl FALLA_R { +impl crate::FieldSpec for Falla { + type Ux = u8; +} +impl crate::IsEnum for Falla {} +#[doc = "Field `FALLA` reader - Timer Falling Input Edge Action"] +pub type FallaR = crate::FieldReader; +impl FallaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FALLA_A { + pub const fn variant(&self) -> Falla { match self.bits { - 0 => FALLA_A::NONE, - 1 => FALLA_A::START, - 2 => FALLA_A::STOP, - 3 => FALLA_A::RELOADSTART, + 0 => Falla::None, + 1 => Falla::Start, + 2 => Falla::Stop, + 3 => Falla::Reloadstart, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == FALLA_A::NONE + *self == Falla::None } - #[doc = "Checks if the value of the field is `START`"] + #[doc = "Start counter without reload"] #[inline(always)] pub fn is_start(&self) -> bool { - *self == FALLA_A::START + *self == Falla::Start } - #[doc = "Checks if the value of the field is `STOP`"] + #[doc = "Stop counter without reload"] #[inline(always)] pub fn is_stop(&self) -> bool { - *self == FALLA_A::STOP + *self == Falla::Stop } - #[doc = "Checks if the value of the field is `RELOADSTART`"] + #[doc = "Reload and start counter"] #[inline(always)] pub fn is_reloadstart(&self) -> bool { - *self == FALLA_A::RELOADSTART + *self == Falla::Reloadstart } } #[doc = "Field `FALLA` writer - Timer Falling Input Edge Action"] -pub type FALLA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, FALLA_A, 2, O>; -impl<'a, const O: u8> FALLA_W<'a, O> { +pub type FallaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Falla, crate::Safe>; +impl<'a, REG> FallaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(FALLA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Falla::None) } #[doc = "Start counter without reload"] #[inline(always)] - pub fn start(self) -> &'a mut W { - self.variant(FALLA_A::START) + pub fn start(self) -> &'a mut crate::W { + self.variant(Falla::Start) } #[doc = "Stop counter without reload"] #[inline(always)] - pub fn stop(self) -> &'a mut W { - self.variant(FALLA_A::STOP) + pub fn stop(self) -> &'a mut crate::W { + self.variant(Falla::Stop) } #[doc = "Reload and start counter"] #[inline(always)] - pub fn reloadstart(self) -> &'a mut W { - self.variant(FALLA_A::RELOADSTART) + pub fn reloadstart(self) -> &'a mut crate::W { + self.variant(Falla::Reloadstart) } } #[doc = "Field `X2CNT` reader - 2x Count Mode"] -pub type X2CNT_R = crate::BitReader; +pub type X2cntR = crate::BitReader; #[doc = "Field `X2CNT` writer - 2x Count Mode"] -pub type X2CNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type X2cntW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - Timer Rising Input Edge Action"] #[inline(always)] - pub fn risea(&self) -> RISEA_R { - RISEA_R::new((self.bits & 3) as u8) + pub fn risea(&self) -> RiseaR { + RiseaR::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Timer Falling Input Edge Action"] #[inline(always)] - pub fn falla(&self) -> FALLA_R { - FALLA_R::new(((self.bits >> 2) & 3) as u8) + pub fn falla(&self) -> FallaR { + FallaR::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bit 4 - 2x Count Mode"] #[inline(always)] - pub fn x2cnt(&self) -> X2CNT_R { - X2CNT_R::new(((self.bits >> 4) & 1) != 0) + pub fn x2cnt(&self) -> X2cntR { + X2cntR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Timer Rising Input Edge Action"] #[inline(always)] #[must_use] - pub fn risea(&mut self) -> RISEA_W<0> { - RISEA_W::new(self) + pub fn risea(&mut self) -> RiseaW { + RiseaW::new(self, 0) } #[doc = "Bits 2:3 - Timer Falling Input Edge Action"] #[inline(always)] #[must_use] - pub fn falla(&mut self) -> FALLA_W<2> { - FALLA_W::new(self) + pub fn falla(&mut self) -> FallaW { + FallaW::new(self, 2) } #[doc = "Bit 4 - 2x Count Mode"] #[inline(always)] #[must_use] - pub fn x2cnt(&mut self) -> X2CNT_W<4> { - X2CNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn x2cnt(&mut self) -> X2cntW { + X2cntW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtcfg.rs index d19a9a3..82b97e1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtcfg.rs @@ -1,186 +1,149 @@ #[doc = "Register `DTCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTEN` reader - DTI Enable"] -pub type DTEN_R = crate::BitReader; +pub type DtenR = crate::BitReader; #[doc = "Field `DTEN` writer - DTI Enable"] -pub type DTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; -#[doc = "Field `DTDAS` reader - DTI Automatic Start-up Functionality"] -pub type DTDAS_R = crate::BitReader; +pub type DtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "DTI Automatic Start-up Functionality\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DTDAS_A { +pub enum Dtdas { #[doc = "0: No DTI restart on debugger exit"] - NORESTART = 0, + Norestart = 0, #[doc = "1: DTI restart on debugger exit"] - RESTART = 1, + Restart = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DTDAS_A) -> Self { + fn from(variant: Dtdas) -> Self { variant as u8 != 0 } } -impl DTDAS_R { +#[doc = "Field `DTDAS` reader - DTI Automatic Start-up Functionality"] +pub type DtdasR = crate::BitReader; +impl DtdasR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTDAS_A { + pub const fn variant(&self) -> Dtdas { match self.bits { - false => DTDAS_A::NORESTART, - true => DTDAS_A::RESTART, + false => Dtdas::Norestart, + true => Dtdas::Restart, } } - #[doc = "Checks if the value of the field is `NORESTART`"] + #[doc = "No DTI restart on debugger exit"] #[inline(always)] pub fn is_norestart(&self) -> bool { - *self == DTDAS_A::NORESTART + *self == Dtdas::Norestart } - #[doc = "Checks if the value of the field is `RESTART`"] + #[doc = "DTI restart on debugger exit"] #[inline(always)] pub fn is_restart(&self) -> bool { - *self == DTDAS_A::RESTART + *self == Dtdas::Restart } } #[doc = "Field `DTDAS` writer - DTI Automatic Start-up Functionality"] -pub type DTDAS_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, DTDAS_A, O>; -impl<'a, const O: u8> DTDAS_W<'a, O> { +pub type DtdasW<'a, REG> = crate::BitWriter<'a, REG, Dtdas>; +impl<'a, REG> DtdasW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No DTI restart on debugger exit"] #[inline(always)] - pub fn norestart(self) -> &'a mut W { - self.variant(DTDAS_A::NORESTART) + pub fn norestart(self) -> &'a mut crate::W { + self.variant(Dtdas::Norestart) } #[doc = "DTI restart on debugger exit"] #[inline(always)] - pub fn restart(self) -> &'a mut W { - self.variant(DTDAS_A::RESTART) + pub fn restart(self) -> &'a mut crate::W { + self.variant(Dtdas::Restart) } } #[doc = "Field `DTAR` reader - DTI Always Run"] -pub type DTAR_R = crate::BitReader; +pub type DtarR = crate::BitReader; #[doc = "Field `DTAR` writer - DTI Always Run"] -pub type DTAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtarW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTFATS` reader - DTI Fault Action on Timer Stop"] -pub type DTFATS_R = crate::BitReader; +pub type DtfatsR = crate::BitReader; #[doc = "Field `DTFATS` writer - DTI Fault Action on Timer Stop"] -pub type DTFATS_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtfatsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRSEN` reader - DTI PRS Source Enable"] -pub type DTPRSEN_R = crate::BitReader; +pub type DtprsenR = crate::BitReader; #[doc = "Field `DTPRSEN` writer - DTI PRS Source Enable"] -pub type DTPRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtprsenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI Enable"] #[inline(always)] - pub fn dten(&self) -> DTEN_R { - DTEN_R::new((self.bits & 1) != 0) + pub fn dten(&self) -> DtenR { + DtenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI Automatic Start-up Functionality"] #[inline(always)] - pub fn dtdas(&self) -> DTDAS_R { - DTDAS_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtdas(&self) -> DtdasR { + DtdasR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 9 - DTI Always Run"] #[inline(always)] - pub fn dtar(&self) -> DTAR_R { - DTAR_R::new(((self.bits >> 9) & 1) != 0) + pub fn dtar(&self) -> DtarR { + DtarR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - DTI Fault Action on Timer Stop"] #[inline(always)] - pub fn dtfats(&self) -> DTFATS_R { - DTFATS_R::new(((self.bits >> 10) & 1) != 0) + pub fn dtfats(&self) -> DtfatsR { + DtfatsR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - DTI PRS Source Enable"] #[inline(always)] - pub fn dtprsen(&self) -> DTPRSEN_R { - DTPRSEN_R::new(((self.bits >> 11) & 1) != 0) + pub fn dtprsen(&self) -> DtprsenR { + DtprsenR::new(((self.bits >> 11) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI Enable"] #[inline(always)] #[must_use] - pub fn dten(&mut self) -> DTEN_W<0> { - DTEN_W::new(self) + pub fn dten(&mut self) -> DtenW { + DtenW::new(self, 0) } #[doc = "Bit 1 - DTI Automatic Start-up Functionality"] #[inline(always)] #[must_use] - pub fn dtdas(&mut self) -> DTDAS_W<1> { - DTDAS_W::new(self) + pub fn dtdas(&mut self) -> DtdasW { + DtdasW::new(self, 1) } #[doc = "Bit 9 - DTI Always Run"] #[inline(always)] #[must_use] - pub fn dtar(&mut self) -> DTAR_W<9> { - DTAR_W::new(self) + pub fn dtar(&mut self) -> DtarW { + DtarW::new(self, 9) } #[doc = "Bit 10 - DTI Fault Action on Timer Stop"] #[inline(always)] #[must_use] - pub fn dtfats(&mut self) -> DTFATS_W<10> { - DTFATS_W::new(self) + pub fn dtfats(&mut self) -> DtfatsW { + DtfatsW::new(self, 10) } #[doc = "Bit 11 - DTI PRS Source Enable"] #[inline(always)] #[must_use] - pub fn dtprsen(&mut self) -> DTPRSEN_W<11> { - DTPRSEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtprsen(&mut self) -> DtprsenW { + DtprsenW::new(self, 11) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtcfg](index.html) module"] -pub struct DTCFG_SPEC; -impl crate::RegisterSpec for DTCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtcfgSpec; +impl crate::RegisterSpec for DtcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtcfg::R](R) reader structure"] -impl crate::Readable for DTCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtcfg::W](W) writer structure"] -impl crate::Writable for DTCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtcfg::R`](R) reader structure"] +impl crate::Readable for DtcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dtcfg::W`](W) writer structure"] +impl crate::Writable for DtcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTCFG to value 0"] -impl crate::Resettable for DTCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtctrl.rs index 816a05e..84f6d17 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtctrl.rs @@ -1,95 +1,55 @@ #[doc = "Register `DTCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTCINV` reader - DTI Complementary Output Invert."] -pub type DTCINV_R = crate::BitReader; +pub type DtcinvR = crate::BitReader; #[doc = "Field `DTCINV` writer - DTI Complementary Output Invert."] -pub type DTCINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, O>; +pub type DtcinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTIPOL` reader - DTI Inactive Polarity"] -pub type DTIPOL_R = crate::BitReader; +pub type DtipolR = crate::BitReader; #[doc = "Field `DTIPOL` writer - DTI Inactive Polarity"] -pub type DTIPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, O>; +pub type DtipolW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI Complementary Output Invert."] #[inline(always)] - pub fn dtcinv(&self) -> DTCINV_R { - DTCINV_R::new((self.bits & 1) != 0) + pub fn dtcinv(&self) -> DtcinvR { + DtcinvR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI Inactive Polarity"] #[inline(always)] - pub fn dtipol(&self) -> DTIPOL_R { - DTIPOL_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtipol(&self) -> DtipolR { + DtipolR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI Complementary Output Invert."] #[inline(always)] #[must_use] - pub fn dtcinv(&mut self) -> DTCINV_W<0> { - DTCINV_W::new(self) + pub fn dtcinv(&mut self) -> DtcinvW { + DtcinvW::new(self, 0) } #[doc = "Bit 1 - DTI Inactive Polarity"] #[inline(always)] #[must_use] - pub fn dtipol(&mut self) -> DTIPOL_W<1> { - DTIPOL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtipol(&mut self) -> DtipolW { + DtipolW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtctrl](index.html) module"] -pub struct DTCTRL_SPEC; -impl crate::RegisterSpec for DTCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtctrlSpec; +impl crate::RegisterSpec for DtctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtctrl::R](R) reader structure"] -impl crate::Readable for DTCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtctrl::W](W) writer structure"] -impl crate::Writable for DTCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtctrl::R`](R) reader structure"] +impl crate::Readable for DtctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`dtctrl::W`](W) writer structure"] +impl crate::Writable for DtctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTCTRL to value 0"] -impl crate::Resettable for DTCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtfault.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtfault.rs index 01a53f9..ecd21aa 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtfault.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtfault.rs @@ -1,65 +1,50 @@ #[doc = "Register `DTFAULT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DTPRS0F` reader - DTI PRS 0 Fault"] -pub type DTPRS0F_R = crate::BitReader; +pub type Dtprs0fR = crate::BitReader; #[doc = "Field `DTPRS1F` reader - DTI PRS 1 Fault"] -pub type DTPRS1F_R = crate::BitReader; +pub type Dtprs1fR = crate::BitReader; #[doc = "Field `DTDBGF` reader - DTI Debugger Fault"] -pub type DTDBGF_R = crate::BitReader; +pub type DtdbgfR = crate::BitReader; #[doc = "Field `DTLOCKUPF` reader - DTI Lockup Fault"] -pub type DTLOCKUPF_R = crate::BitReader; +pub type DtlockupfR = crate::BitReader; #[doc = "Field `DTEM23F` reader - DTI EM23 Entry Fault"] -pub type DTEM23F_R = crate::BitReader; +pub type Dtem23fR = crate::BitReader; impl R { #[doc = "Bit 0 - DTI PRS 0 Fault"] #[inline(always)] - pub fn dtprs0f(&self) -> DTPRS0F_R { - DTPRS0F_R::new((self.bits & 1) != 0) + pub fn dtprs0f(&self) -> Dtprs0fR { + Dtprs0fR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI PRS 1 Fault"] #[inline(always)] - pub fn dtprs1f(&self) -> DTPRS1F_R { - DTPRS1F_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtprs1f(&self) -> Dtprs1fR { + Dtprs1fR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DTI Debugger Fault"] #[inline(always)] - pub fn dtdbgf(&self) -> DTDBGF_R { - DTDBGF_R::new(((self.bits >> 2) & 1) != 0) + pub fn dtdbgf(&self) -> DtdbgfR { + DtdbgfR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DTI Lockup Fault"] #[inline(always)] - pub fn dtlockupf(&self) -> DTLOCKUPF_R { - DTLOCKUPF_R::new(((self.bits >> 3) & 1) != 0) + pub fn dtlockupf(&self) -> DtlockupfR { + DtlockupfR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - DTI EM23 Entry Fault"] #[inline(always)] - pub fn dtem23f(&self) -> DTEM23F_R { - DTEM23F_R::new(((self.bits >> 4) & 1) != 0) + pub fn dtem23f(&self) -> Dtem23fR { + Dtem23fR::new(((self.bits >> 4) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfault](index.html) module"] -pub struct DTFAULT_SPEC; -impl crate::RegisterSpec for DTFAULT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfault::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfaultSpec; +impl crate::RegisterSpec for DtfaultSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtfault::R](R) reader structure"] -impl crate::Readable for DTFAULT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`dtfault::R`](R) reader structure"] +impl crate::Readable for DtfaultSpec {} #[doc = "`reset()` method sets DTFAULT to value 0"] -impl crate::Resettable for DTFAULT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfaultSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtfaultc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtfaultc.rs index 1c3d1ba..bcb21e2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtfaultc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtfaultc.rs @@ -1,84 +1,59 @@ #[doc = "Register `DTFAULTC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTPRS0FC` writer - DTI PRS0 Fault Clear"] -pub type DTPRS0FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtprs0fcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRS1FC` writer - DTI PRS1 Fault Clear"] -pub type DTPRS1FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtprs1fcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTDBGFC` writer - DTI Debugger Fault Clear"] -pub type DTDBGFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type DtdbgfcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTLOCKUPFC` writer - DTI Lockup Fault Clear"] -pub type DTLOCKUPFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type DtlockupfcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTEM23FC` writer - DTI EM23 Fault Clear"] -pub type DTEM23FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtem23fcW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - DTI PRS0 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtprs0fc(&mut self) -> DTPRS0FC_W<0> { - DTPRS0FC_W::new(self) + pub fn dtprs0fc(&mut self) -> Dtprs0fcW { + Dtprs0fcW::new(self, 0) } #[doc = "Bit 1 - DTI PRS1 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtprs1fc(&mut self) -> DTPRS1FC_W<1> { - DTPRS1FC_W::new(self) + pub fn dtprs1fc(&mut self) -> Dtprs1fcW { + Dtprs1fcW::new(self, 1) } #[doc = "Bit 2 - DTI Debugger Fault Clear"] #[inline(always)] #[must_use] - pub fn dtdbgfc(&mut self) -> DTDBGFC_W<2> { - DTDBGFC_W::new(self) + pub fn dtdbgfc(&mut self) -> DtdbgfcW { + DtdbgfcW::new(self, 2) } #[doc = "Bit 3 - DTI Lockup Fault Clear"] #[inline(always)] #[must_use] - pub fn dtlockupfc(&mut self) -> DTLOCKUPFC_W<3> { - DTLOCKUPFC_W::new(self) + pub fn dtlockupfc(&mut self) -> DtlockupfcW { + DtlockupfcW::new(self, 3) } #[doc = "Bit 4 - DTI EM23 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtem23fc(&mut self) -> DTEM23FC_W<4> { - DTEM23FC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtem23fc(&mut self) -> Dtem23fcW { + Dtem23fcW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfaultc](index.html) module"] -pub struct DTFAULTC_SPEC; -impl crate::RegisterSpec for DTFAULTC_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfaultc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfaultcSpec; +impl crate::RegisterSpec for DtfaultcSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [dtfaultc::W](W) writer structure"] -impl crate::Writable for DTFAULTC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`dtfaultc::W`](W) writer structure"] +impl crate::Writable for DtfaultcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTFAULTC to value 0"] -impl crate::Resettable for DTFAULTC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfaultcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtfcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtfcfg.rs index 91dee4b..6179df8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtfcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtfcfg.rs @@ -1,229 +1,197 @@ #[doc = "Register `DTFCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTFCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DTFA` reader - DTI Fault Action"] -pub type DTFA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DTI Fault Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DTFA_A { +pub enum Dtfa { #[doc = "0: No action on fault"] - NONE = 0, + None = 0, #[doc = "1: Set outputs inactive"] - INACTIVE = 1, + Inactive = 1, #[doc = "2: Clear outputs"] - CLEAR = 2, + Clear = 2, #[doc = "3: Tristate outputs"] - TRISTATE = 3, + Tristate = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DTFA_A) -> Self { + fn from(variant: Dtfa) -> Self { variant as _ } } -impl DTFA_R { +impl crate::FieldSpec for Dtfa { + type Ux = u8; +} +impl crate::IsEnum for Dtfa {} +#[doc = "Field `DTFA` reader - DTI Fault Action"] +pub type DtfaR = crate::FieldReader; +impl DtfaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTFA_A { + pub const fn variant(&self) -> Dtfa { match self.bits { - 0 => DTFA_A::NONE, - 1 => DTFA_A::INACTIVE, - 2 => DTFA_A::CLEAR, - 3 => DTFA_A::TRISTATE, + 0 => Dtfa::None, + 1 => Dtfa::Inactive, + 2 => Dtfa::Clear, + 3 => Dtfa::Tristate, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on fault"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == DTFA_A::NONE + *self == Dtfa::None } - #[doc = "Checks if the value of the field is `INACTIVE`"] + #[doc = "Set outputs inactive"] #[inline(always)] pub fn is_inactive(&self) -> bool { - *self == DTFA_A::INACTIVE + *self == Dtfa::Inactive } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear outputs"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == DTFA_A::CLEAR + *self == Dtfa::Clear } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "Tristate outputs"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == DTFA_A::TRISTATE + *self == Dtfa::Tristate } } #[doc = "Field `DTFA` writer - DTI Fault Action"] -pub type DTFA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, DTFCFG_SPEC, u8, DTFA_A, 2, O>; -impl<'a, const O: u8> DTFA_W<'a, O> { +pub type DtfaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dtfa, crate::Safe>; +impl<'a, REG> DtfaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on fault"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(DTFA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Dtfa::None) } #[doc = "Set outputs inactive"] #[inline(always)] - pub fn inactive(self) -> &'a mut W { - self.variant(DTFA_A::INACTIVE) + pub fn inactive(self) -> &'a mut crate::W { + self.variant(Dtfa::Inactive) } #[doc = "Clear outputs"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(DTFA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Dtfa::Clear) } #[doc = "Tristate outputs"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(DTFA_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Dtfa::Tristate) } } #[doc = "Field `DTPRS0FEN` reader - DTI PRS 0 Fault Enable"] -pub type DTPRS0FEN_R = crate::BitReader; +pub type Dtprs0fenR = crate::BitReader; #[doc = "Field `DTPRS0FEN` writer - DTI PRS 0 Fault Enable"] -pub type DTPRS0FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtprs0fenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRS1FEN` reader - DTI PRS 1 Fault Enable"] -pub type DTPRS1FEN_R = crate::BitReader; +pub type Dtprs1fenR = crate::BitReader; #[doc = "Field `DTPRS1FEN` writer - DTI PRS 1 Fault Enable"] -pub type DTPRS1FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtprs1fenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTDBGFEN` reader - DTI Debugger Fault Enable"] -pub type DTDBGFEN_R = crate::BitReader; +pub type DtdbgfenR = crate::BitReader; #[doc = "Field `DTDBGFEN` writer - DTI Debugger Fault Enable"] -pub type DTDBGFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type DtdbgfenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTLOCKUPFEN` reader - DTI Lockup Fault Enable"] -pub type DTLOCKUPFEN_R = crate::BitReader; +pub type DtlockupfenR = crate::BitReader; #[doc = "Field `DTLOCKUPFEN` writer - DTI Lockup Fault Enable"] -pub type DTLOCKUPFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type DtlockupfenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTEM23FEN` reader - DTI EM23 Fault Enable"] -pub type DTEM23FEN_R = crate::BitReader; +pub type Dtem23fenR = crate::BitReader; #[doc = "Field `DTEM23FEN` writer - DTI EM23 Fault Enable"] -pub type DTEM23FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtem23fenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 16:17 - DTI Fault Action"] #[inline(always)] - pub fn dtfa(&self) -> DTFA_R { - DTFA_R::new(((self.bits >> 16) & 3) as u8) + pub fn dtfa(&self) -> DtfaR { + DtfaR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 24 - DTI PRS 0 Fault Enable"] #[inline(always)] - pub fn dtprs0fen(&self) -> DTPRS0FEN_R { - DTPRS0FEN_R::new(((self.bits >> 24) & 1) != 0) + pub fn dtprs0fen(&self) -> Dtprs0fenR { + Dtprs0fenR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - DTI PRS 1 Fault Enable"] #[inline(always)] - pub fn dtprs1fen(&self) -> DTPRS1FEN_R { - DTPRS1FEN_R::new(((self.bits >> 25) & 1) != 0) + pub fn dtprs1fen(&self) -> Dtprs1fenR { + Dtprs1fenR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - DTI Debugger Fault Enable"] #[inline(always)] - pub fn dtdbgfen(&self) -> DTDBGFEN_R { - DTDBGFEN_R::new(((self.bits >> 26) & 1) != 0) + pub fn dtdbgfen(&self) -> DtdbgfenR { + DtdbgfenR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - DTI Lockup Fault Enable"] #[inline(always)] - pub fn dtlockupfen(&self) -> DTLOCKUPFEN_R { - DTLOCKUPFEN_R::new(((self.bits >> 27) & 1) != 0) + pub fn dtlockupfen(&self) -> DtlockupfenR { + DtlockupfenR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - DTI EM23 Fault Enable"] #[inline(always)] - pub fn dtem23fen(&self) -> DTEM23FEN_R { - DTEM23FEN_R::new(((self.bits >> 28) & 1) != 0) + pub fn dtem23fen(&self) -> Dtem23fenR { + Dtem23fenR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bits 16:17 - DTI Fault Action"] #[inline(always)] #[must_use] - pub fn dtfa(&mut self) -> DTFA_W<16> { - DTFA_W::new(self) + pub fn dtfa(&mut self) -> DtfaW { + DtfaW::new(self, 16) } #[doc = "Bit 24 - DTI PRS 0 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtprs0fen(&mut self) -> DTPRS0FEN_W<24> { - DTPRS0FEN_W::new(self) + pub fn dtprs0fen(&mut self) -> Dtprs0fenW { + Dtprs0fenW::new(self, 24) } #[doc = "Bit 25 - DTI PRS 1 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtprs1fen(&mut self) -> DTPRS1FEN_W<25> { - DTPRS1FEN_W::new(self) + pub fn dtprs1fen(&mut self) -> Dtprs1fenW { + Dtprs1fenW::new(self, 25) } #[doc = "Bit 26 - DTI Debugger Fault Enable"] #[inline(always)] #[must_use] - pub fn dtdbgfen(&mut self) -> DTDBGFEN_W<26> { - DTDBGFEN_W::new(self) + pub fn dtdbgfen(&mut self) -> DtdbgfenW { + DtdbgfenW::new(self, 26) } #[doc = "Bit 27 - DTI Lockup Fault Enable"] #[inline(always)] #[must_use] - pub fn dtlockupfen(&mut self) -> DTLOCKUPFEN_W<27> { - DTLOCKUPFEN_W::new(self) + pub fn dtlockupfen(&mut self) -> DtlockupfenW { + DtlockupfenW::new(self, 27) } #[doc = "Bit 28 - DTI EM23 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtem23fen(&mut self) -> DTEM23FEN_W<28> { - DTEM23FEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtem23fen(&mut self) -> Dtem23fenW { + Dtem23fenW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfcfg](index.html) module"] -pub struct DTFCFG_SPEC; -impl crate::RegisterSpec for DTFCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfcfgSpec; +impl crate::RegisterSpec for DtfcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtfcfg::R](R) reader structure"] -impl crate::Readable for DTFCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtfcfg::W](W) writer structure"] -impl crate::Writable for DTFCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtfcfg::R`](R) reader structure"] +impl crate::Readable for DtfcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dtfcfg::W`](W) writer structure"] +impl crate::Writable for DtfcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTFCFG to value 0"] -impl crate::Resettable for DTFCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtlock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtlock.rs index 434789a..5ce63f5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtlock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtlock.rs @@ -1,73 +1,55 @@ #[doc = "Register `DTLOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "DTI Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum DTILOCKKEY_AW { +pub enum Dtilockkey { #[doc = "52864: Write to unlock TIMER DTI registers"] - UNLOCK = 52864, + Unlock = 52864, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: DTILOCKKEY_AW) -> Self { + fn from(variant: Dtilockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Dtilockkey { + type Ux = u16; +} +impl crate::IsEnum for Dtilockkey {} #[doc = "Field `DTILOCKKEY` writer - DTI Lock Key"] -pub type DTILOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, DTLOCK_SPEC, u16, DTILOCKKEY_AW, 16, O>; -impl<'a, const O: u8> DTILOCKKEY_W<'a, O> { +pub type DtilockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Dtilockkey>; +impl<'a, REG> DtilockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unlock TIMER DTI registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(DTILOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Dtilockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - DTI Lock Key"] #[inline(always)] #[must_use] - pub fn dtilockkey(&mut self) -> DTILOCKKEY_W<0> { - DTILOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtilockkey(&mut self) -> DtilockkeyW { + DtilockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtlock](index.html) module"] -pub struct DTLOCK_SPEC; -impl crate::RegisterSpec for DTLOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtlock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtlockSpec; +impl crate::RegisterSpec for DtlockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [dtlock::W](W) writer structure"] -impl crate::Writable for DTLOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`dtlock::W`](W) writer structure"] +impl crate::Writable for DtlockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTLOCK to value 0"] -impl crate::Resettable for DTLOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtlockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtogen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtogen.rs index 818b4bb..35926ca 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtogen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dtogen.rs @@ -1,155 +1,115 @@ #[doc = "Register `DTOGEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTOGEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTOGCC0EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC0EN_R = crate::BitReader; +pub type Dtogcc0enR = crate::BitReader; #[doc = "Field `DTOGCC0EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCC1EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC1EN_R = crate::BitReader; +pub type Dtogcc1enR = crate::BitReader; #[doc = "Field `DTOGCC1EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCC2EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC2EN_R = crate::BitReader; +pub type Dtogcc2enR = crate::BitReader; #[doc = "Field `DTOGCC2EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC2EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc2enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI0EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI0EN_R = crate::BitReader; +pub type Dtogcdti0enR = crate::BitReader; #[doc = "Field `DTOGCDTI0EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI1EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI1EN_R = crate::BitReader; +pub type Dtogcdti1enR = crate::BitReader; #[doc = "Field `DTOGCDTI1EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI2EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI2EN_R = crate::BitReader; +pub type Dtogcdti2enR = crate::BitReader; #[doc = "Field `DTOGCDTI2EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI2EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti2enW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc0en(&self) -> DTOGCC0EN_R { - DTOGCC0EN_R::new((self.bits & 1) != 0) + pub fn dtogcc0en(&self) -> Dtogcc0enR { + Dtogcc0enR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc1en(&self) -> DTOGCC1EN_R { - DTOGCC1EN_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtogcc1en(&self) -> Dtogcc1enR { + Dtogcc1enR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc2en(&self) -> DTOGCC2EN_R { - DTOGCC2EN_R::new(((self.bits >> 2) & 1) != 0) + pub fn dtogcc2en(&self) -> Dtogcc2enR { + Dtogcc2enR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti0en(&self) -> DTOGCDTI0EN_R { - DTOGCDTI0EN_R::new(((self.bits >> 3) & 1) != 0) + pub fn dtogcdti0en(&self) -> Dtogcdti0enR { + Dtogcdti0enR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti1en(&self) -> DTOGCDTI1EN_R { - DTOGCDTI1EN_R::new(((self.bits >> 4) & 1) != 0) + pub fn dtogcdti1en(&self) -> Dtogcdti1enR { + Dtogcdti1enR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti2en(&self) -> DTOGCDTI2EN_R { - DTOGCDTI2EN_R::new(((self.bits >> 5) & 1) != 0) + pub fn dtogcdti2en(&self) -> Dtogcdti2enR { + Dtogcdti2enR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc0en(&mut self) -> DTOGCC0EN_W<0> { - DTOGCC0EN_W::new(self) + pub fn dtogcc0en(&mut self) -> Dtogcc0enW { + Dtogcc0enW::new(self, 0) } #[doc = "Bit 1 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc1en(&mut self) -> DTOGCC1EN_W<1> { - DTOGCC1EN_W::new(self) + pub fn dtogcc1en(&mut self) -> Dtogcc1enW { + Dtogcc1enW::new(self, 1) } #[doc = "Bit 2 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc2en(&mut self) -> DTOGCC2EN_W<2> { - DTOGCC2EN_W::new(self) + pub fn dtogcc2en(&mut self) -> Dtogcc2enW { + Dtogcc2enW::new(self, 2) } #[doc = "Bit 3 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti0en(&mut self) -> DTOGCDTI0EN_W<3> { - DTOGCDTI0EN_W::new(self) + pub fn dtogcdti0en(&mut self) -> Dtogcdti0enW { + Dtogcdti0enW::new(self, 3) } #[doc = "Bit 4 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti1en(&mut self) -> DTOGCDTI1EN_W<4> { - DTOGCDTI1EN_W::new(self) + pub fn dtogcdti1en(&mut self) -> Dtogcdti1enW { + Dtogcdti1enW::new(self, 4) } #[doc = "Bit 5 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti2en(&mut self) -> DTOGCDTI2EN_W<5> { - DTOGCDTI2EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtogcdti2en(&mut self) -> Dtogcdti2enW { + Dtogcdti2enW::new(self, 5) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtogen](index.html) module"] -pub struct DTOGEN_SPEC; -impl crate::RegisterSpec for DTOGEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtogen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtogen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtogenSpec; +impl crate::RegisterSpec for DtogenSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtogen::R](R) reader structure"] -impl crate::Readable for DTOGEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtogen::W](W) writer structure"] -impl crate::Writable for DTOGEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtogen::R`](R) reader structure"] +impl crate::Readable for DtogenSpec {} +#[doc = "`write(|w| ..)` method takes [`dtogen::W`](W) writer structure"] +impl crate::Writable for DtogenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTOGEN to value 0"] -impl crate::Resettable for DTOGEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtogenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dttimecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dttimecfg.rs index 63e4c73..9577f86 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dttimecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/dttimecfg.rs @@ -1,110 +1,70 @@ #[doc = "Register `DTTIMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTTIMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTPRESC` reader - DTI Prescaler Setting"] -pub type DTPRESC_R = crate::FieldReader; +pub type DtprescR = crate::FieldReader; #[doc = "Field `DTPRESC` writer - DTI Prescaler Setting"] -pub type DTPRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u16, u16, 10, O>; +pub type DtprescW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `DTRISET` reader - DTI Rise-time"] -pub type DTRISET_R = crate::FieldReader; +pub type DtrisetR = crate::FieldReader; #[doc = "Field `DTRISET` writer - DTI Rise-time"] -pub type DTRISET_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u8, u8, 6, O>; +pub type DtrisetW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `DTFALLT` reader - DTI Fall-time"] -pub type DTFALLT_R = crate::FieldReader; +pub type DtfalltR = crate::FieldReader; #[doc = "Field `DTFALLT` writer - DTI Fall-time"] -pub type DTFALLT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u8, u8, 6, O>; +pub type DtfalltW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:9 - DTI Prescaler Setting"] #[inline(always)] - pub fn dtpresc(&self) -> DTPRESC_R { - DTPRESC_R::new((self.bits & 0x03ff) as u16) + pub fn dtpresc(&self) -> DtprescR { + DtprescR::new((self.bits & 0x03ff) as u16) } #[doc = "Bits 10:15 - DTI Rise-time"] #[inline(always)] - pub fn dtriset(&self) -> DTRISET_R { - DTRISET_R::new(((self.bits >> 10) & 0x3f) as u8) + pub fn dtriset(&self) -> DtrisetR { + DtrisetR::new(((self.bits >> 10) & 0x3f) as u8) } #[doc = "Bits 16:21 - DTI Fall-time"] #[inline(always)] - pub fn dtfallt(&self) -> DTFALLT_R { - DTFALLT_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn dtfallt(&self) -> DtfalltR { + DtfalltR::new(((self.bits >> 16) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:9 - DTI Prescaler Setting"] #[inline(always)] #[must_use] - pub fn dtpresc(&mut self) -> DTPRESC_W<0> { - DTPRESC_W::new(self) + pub fn dtpresc(&mut self) -> DtprescW { + DtprescW::new(self, 0) } #[doc = "Bits 10:15 - DTI Rise-time"] #[inline(always)] #[must_use] - pub fn dtriset(&mut self) -> DTRISET_W<10> { - DTRISET_W::new(self) + pub fn dtriset(&mut self) -> DtrisetW { + DtrisetW::new(self, 10) } #[doc = "Bits 16:21 - DTI Fall-time"] #[inline(always)] #[must_use] - pub fn dtfallt(&mut self) -> DTFALLT_W<16> { - DTFALLT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtfallt(&mut self) -> DtfalltW { + DtfalltW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dttimecfg](index.html) module"] -pub struct DTTIMECFG_SPEC; -impl crate::RegisterSpec for DTTIMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dttimecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dttimecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DttimecfgSpec; +impl crate::RegisterSpec for DttimecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dttimecfg::R](R) reader structure"] -impl crate::Readable for DTTIMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dttimecfg::W](W) writer structure"] -impl crate::Writable for DTTIMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dttimecfg::R`](R) reader structure"] +impl crate::Readable for DttimecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dttimecfg::W`](W) writer structure"] +impl crate::Writable for DttimecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTTIMECFG to value 0"] -impl crate::Resettable for DTTIMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DttimecfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/en.rs index 9392483..303507b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Timer Module Enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Timer Module Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Timer Module Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Timer Module Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/ien.rs index 66588d7..73273ef 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/ien.rs @@ -1,290 +1,250 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OF` reader - Overflow Interrupt Enable"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Enable"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UF` reader - Underflow Interrupt Enable"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Enable"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DIRCHG` reader - Direction Change Detect Interrupt Enable"] -pub type DIRCHG_R = crate::BitReader; +pub type DirchgR = crate::BitReader; #[doc = "Field `DIRCHG` writer - Direction Change Detect Interrupt Enable"] -pub type DIRCHG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type DirchgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC0` reader - CC0 Interrupt Enable"] -pub type CC0_R = crate::BitReader; +pub type Cc0R = crate::BitReader; #[doc = "Field `CC0` writer - CC0 Interrupt Enable"] -pub type CC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1` reader - CC1 Interrupt Enable"] -pub type CC1_R = crate::BitReader; +pub type Cc1R = crate::BitReader; #[doc = "Field `CC1` writer - CC1 Interrupt Enable"] -pub type CC1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2` reader - CC2 Interrupt Enable"] -pub type CC2_R = crate::BitReader; +pub type Cc2R = crate::BitReader; #[doc = "Field `CC2` writer - CC2 Interrupt Enable"] -pub type CC2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL0` reader - ICFWLFULL0 Interrupt Enable"] -pub type ICFWLFULL0_R = crate::BitReader; +pub type Icfwlfull0R = crate::BitReader; #[doc = "Field `ICFWLFULL0` writer - ICFWLFULL0 Interrupt Enable"] -pub type ICFWLFULL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL1` reader - ICFWLFULL1 Interrupt Enable"] -pub type ICFWLFULL1_R = crate::BitReader; +pub type Icfwlfull1R = crate::BitReader; #[doc = "Field `ICFWLFULL1` writer - ICFWLFULL1 Interrupt Enable"] -pub type ICFWLFULL1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL2` reader - ICFWLFULL2 Interrupt Enable"] -pub type ICFWLFULL2_R = crate::BitReader; +pub type Icfwlfull2R = crate::BitReader; #[doc = "Field `ICFWLFULL2` writer - ICFWLFULL2 Interrupt Enable"] -pub type ICFWLFULL2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF0` reader - ICFOF0 Interrupt Enable"] -pub type ICFOF0_R = crate::BitReader; +pub type Icfof0R = crate::BitReader; #[doc = "Field `ICFOF0` writer - ICFOF0 Interrupt Enable"] -pub type ICFOF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF1` reader - ICFOF1 Interrupt Enable"] -pub type ICFOF1_R = crate::BitReader; +pub type Icfof1R = crate::BitReader; #[doc = "Field `ICFOF1` writer - ICFOF1 Interrupt Enable"] -pub type ICFOF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF2` reader - ICFOF2 Interrupt Enable"] -pub type ICFOF2_R = crate::BitReader; +pub type Icfof2R = crate::BitReader; #[doc = "Field `ICFOF2` writer - ICFOF2 Interrupt Enable"] -pub type ICFOF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF0` reader - ICFUF0 Interrupt Enable"] -pub type ICFUF0_R = crate::BitReader; +pub type Icfuf0R = crate::BitReader; #[doc = "Field `ICFUF0` writer - ICFUF0 Interrupt Enable"] -pub type ICFUF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF1` reader - ICFUF1 Interrupt Enable"] -pub type ICFUF1_R = crate::BitReader; +pub type Icfuf1R = crate::BitReader; #[doc = "Field `ICFUF1` writer - ICFUF1 Interrupt Enable"] -pub type ICFUF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF2` reader - ICFUF2 Interrupt Enable"] -pub type ICFUF2_R = crate::BitReader; +pub type Icfuf2R = crate::BitReader; #[doc = "Field `ICFUF2` writer - ICFUF2 Interrupt Enable"] -pub type ICFUF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Enable"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new((self.bits & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Underflow Interrupt Enable"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new(((self.bits >> 1) & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Direction Change Detect Interrupt Enable"] #[inline(always)] - pub fn dirchg(&self) -> DIRCHG_R { - DIRCHG_R::new(((self.bits >> 2) & 1) != 0) + pub fn dirchg(&self) -> DirchgR { + DirchgR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - CC0 Interrupt Enable"] #[inline(always)] - pub fn cc0(&self) -> CC0_R { - CC0_R::new(((self.bits >> 4) & 1) != 0) + pub fn cc0(&self) -> Cc0R { + Cc0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CC1 Interrupt Enable"] #[inline(always)] - pub fn cc1(&self) -> CC1_R { - CC1_R::new(((self.bits >> 5) & 1) != 0) + pub fn cc1(&self) -> Cc1R { + Cc1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - CC2 Interrupt Enable"] #[inline(always)] - pub fn cc2(&self) -> CC2_R { - CC2_R::new(((self.bits >> 6) & 1) != 0) + pub fn cc2(&self) -> Cc2R { + Cc2R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 16 - ICFWLFULL0 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull0(&self) -> ICFWLFULL0_R { - ICFWLFULL0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfwlfull0(&self) -> Icfwlfull0R { + Icfwlfull0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - ICFWLFULL1 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull1(&self) -> ICFWLFULL1_R { - ICFWLFULL1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfwlfull1(&self) -> Icfwlfull1R { + Icfwlfull1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - ICFWLFULL2 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull2(&self) -> ICFWLFULL2_R { - ICFWLFULL2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfwlfull2(&self) -> Icfwlfull2R { + Icfwlfull2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - ICFOF0 Interrupt Enable"] #[inline(always)] - pub fn icfof0(&self) -> ICFOF0_R { - ICFOF0_R::new(((self.bits >> 20) & 1) != 0) + pub fn icfof0(&self) -> Icfof0R { + Icfof0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - ICFOF1 Interrupt Enable"] #[inline(always)] - pub fn icfof1(&self) -> ICFOF1_R { - ICFOF1_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfof1(&self) -> Icfof1R { + Icfof1R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - ICFOF2 Interrupt Enable"] #[inline(always)] - pub fn icfof2(&self) -> ICFOF2_R { - ICFOF2_R::new(((self.bits >> 22) & 1) != 0) + pub fn icfof2(&self) -> Icfof2R { + Icfof2R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 24 - ICFUF0 Interrupt Enable"] #[inline(always)] - pub fn icfuf0(&self) -> ICFUF0_R { - ICFUF0_R::new(((self.bits >> 24) & 1) != 0) + pub fn icfuf0(&self) -> Icfuf0R { + Icfuf0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - ICFUF1 Interrupt Enable"] #[inline(always)] - pub fn icfuf1(&self) -> ICFUF1_R { - ICFUF1_R::new(((self.bits >> 25) & 1) != 0) + pub fn icfuf1(&self) -> Icfuf1R { + Icfuf1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - ICFUF2 Interrupt Enable"] #[inline(always)] - pub fn icfuf2(&self) -> ICFUF2_R { - ICFUF2_R::new(((self.bits >> 26) & 1) != 0) + pub fn icfuf2(&self) -> Icfuf2R { + Icfuf2R::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<0> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 0) } #[doc = "Bit 1 - Underflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<1> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 1) } #[doc = "Bit 2 - Direction Change Detect Interrupt Enable"] #[inline(always)] #[must_use] - pub fn dirchg(&mut self) -> DIRCHG_W<2> { - DIRCHG_W::new(self) + pub fn dirchg(&mut self) -> DirchgW { + DirchgW::new(self, 2) } #[doc = "Bit 4 - CC0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc0(&mut self) -> CC0_W<4> { - CC0_W::new(self) + pub fn cc0(&mut self) -> Cc0W { + Cc0W::new(self, 4) } #[doc = "Bit 5 - CC1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc1(&mut self) -> CC1_W<5> { - CC1_W::new(self) + pub fn cc1(&mut self) -> Cc1W { + Cc1W::new(self, 5) } #[doc = "Bit 6 - CC2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc2(&mut self) -> CC2_W<6> { - CC2_W::new(self) + pub fn cc2(&mut self) -> Cc2W { + Cc2W::new(self, 6) } #[doc = "Bit 16 - ICFWLFULL0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull0(&mut self) -> ICFWLFULL0_W<16> { - ICFWLFULL0_W::new(self) + pub fn icfwlfull0(&mut self) -> Icfwlfull0W { + Icfwlfull0W::new(self, 16) } #[doc = "Bit 17 - ICFWLFULL1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull1(&mut self) -> ICFWLFULL1_W<17> { - ICFWLFULL1_W::new(self) + pub fn icfwlfull1(&mut self) -> Icfwlfull1W { + Icfwlfull1W::new(self, 17) } #[doc = "Bit 18 - ICFWLFULL2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull2(&mut self) -> ICFWLFULL2_W<18> { - ICFWLFULL2_W::new(self) + pub fn icfwlfull2(&mut self) -> Icfwlfull2W { + Icfwlfull2W::new(self, 18) } #[doc = "Bit 20 - ICFOF0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof0(&mut self) -> ICFOF0_W<20> { - ICFOF0_W::new(self) + pub fn icfof0(&mut self) -> Icfof0W { + Icfof0W::new(self, 20) } #[doc = "Bit 21 - ICFOF1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof1(&mut self) -> ICFOF1_W<21> { - ICFOF1_W::new(self) + pub fn icfof1(&mut self) -> Icfof1W { + Icfof1W::new(self, 21) } #[doc = "Bit 22 - ICFOF2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof2(&mut self) -> ICFOF2_W<22> { - ICFOF2_W::new(self) + pub fn icfof2(&mut self) -> Icfof2W { + Icfof2W::new(self, 22) } #[doc = "Bit 24 - ICFUF0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf0(&mut self) -> ICFUF0_W<24> { - ICFUF0_W::new(self) + pub fn icfuf0(&mut self) -> Icfuf0W { + Icfuf0W::new(self, 24) } #[doc = "Bit 25 - ICFUF1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf1(&mut self) -> ICFUF1_W<25> { - ICFUF1_W::new(self) + pub fn icfuf1(&mut self) -> Icfuf1W { + Icfuf1W::new(self, 25) } #[doc = "Bit 26 - ICFUF2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf2(&mut self) -> ICFUF2_W<26> { - ICFUF2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfuf2(&mut self) -> Icfuf2W { + Icfuf2W::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/if_.rs index edde0f3..fad1cd1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/if_.rs @@ -1,290 +1,250 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OF` reader - Overflow Interrupt Flag"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Flag"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UF` reader - Underflow Interrupt Flag"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Flag"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DIRCHG` reader - Direction Change Detect Interrupt Flag"] -pub type DIRCHG_R = crate::BitReader; +pub type DirchgR = crate::BitReader; #[doc = "Field `DIRCHG` writer - Direction Change Detect Interrupt Flag"] -pub type DIRCHG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type DirchgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC0` reader - Capture Compare Channel 0 Interrupt Flag"] -pub type CC0_R = crate::BitReader; +pub type Cc0R = crate::BitReader; #[doc = "Field `CC0` writer - Capture Compare Channel 0 Interrupt Flag"] -pub type CC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1` reader - Capture Compare Channel 1 Interrupt Flag"] -pub type CC1_R = crate::BitReader; +pub type Cc1R = crate::BitReader; #[doc = "Field `CC1` writer - Capture Compare Channel 1 Interrupt Flag"] -pub type CC1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2` reader - Capture Compare Channel 2 Interrupt Flag"] -pub type CC2_R = crate::BitReader; +pub type Cc2R = crate::BitReader; #[doc = "Field `CC2` writer - Capture Compare Channel 2 Interrupt Flag"] -pub type CC2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL0` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL0_R = crate::BitReader; +pub type Icfwlfull0R = crate::BitReader; #[doc = "Field `ICFWLFULL0` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL1` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL1_R = crate::BitReader; +pub type Icfwlfull1R = crate::BitReader; #[doc = "Field `ICFWLFULL1` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL2` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL2_R = crate::BitReader; +pub type Icfwlfull2R = crate::BitReader; #[doc = "Field `ICFWLFULL2` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF0` reader - Input Capture FIFO overflow"] -pub type ICFOF0_R = crate::BitReader; +pub type Icfof0R = crate::BitReader; #[doc = "Field `ICFOF0` writer - Input Capture FIFO overflow"] -pub type ICFOF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF1` reader - Input Capture FIFO overflow"] -pub type ICFOF1_R = crate::BitReader; +pub type Icfof1R = crate::BitReader; #[doc = "Field `ICFOF1` writer - Input Capture FIFO overflow"] -pub type ICFOF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF2` reader - Input Capture FIFO overflow"] -pub type ICFOF2_R = crate::BitReader; +pub type Icfof2R = crate::BitReader; #[doc = "Field `ICFOF2` writer - Input Capture FIFO overflow"] -pub type ICFOF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF0` reader - Input capture FIFO underflow"] -pub type ICFUF0_R = crate::BitReader; +pub type Icfuf0R = crate::BitReader; #[doc = "Field `ICFUF0` writer - Input capture FIFO underflow"] -pub type ICFUF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF1` reader - Input capture FIFO underflow"] -pub type ICFUF1_R = crate::BitReader; +pub type Icfuf1R = crate::BitReader; #[doc = "Field `ICFUF1` writer - Input capture FIFO underflow"] -pub type ICFUF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF2` reader - Input capture FIFO underflow"] -pub type ICFUF2_R = crate::BitReader; +pub type Icfuf2R = crate::BitReader; #[doc = "Field `ICFUF2` writer - Input capture FIFO underflow"] -pub type ICFUF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new((self.bits & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Underflow Interrupt Flag"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new(((self.bits >> 1) & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] - pub fn dirchg(&self) -> DIRCHG_R { - DIRCHG_R::new(((self.bits >> 2) & 1) != 0) + pub fn dirchg(&self) -> DirchgR { + DirchgR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Capture Compare Channel 0 Interrupt Flag"] #[inline(always)] - pub fn cc0(&self) -> CC0_R { - CC0_R::new(((self.bits >> 4) & 1) != 0) + pub fn cc0(&self) -> Cc0R { + Cc0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Capture Compare Channel 1 Interrupt Flag"] #[inline(always)] - pub fn cc1(&self) -> CC1_R { - CC1_R::new(((self.bits >> 5) & 1) != 0) + pub fn cc1(&self) -> Cc1R { + Cc1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Capture Compare Channel 2 Interrupt Flag"] #[inline(always)] - pub fn cc2(&self) -> CC2_R { - CC2_R::new(((self.bits >> 6) & 1) != 0) + pub fn cc2(&self) -> Cc2R { + Cc2R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 16 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull0(&self) -> ICFWLFULL0_R { - ICFWLFULL0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfwlfull0(&self) -> Icfwlfull0R { + Icfwlfull0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull1(&self) -> ICFWLFULL1_R { - ICFWLFULL1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfwlfull1(&self) -> Icfwlfull1R { + Icfwlfull1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull2(&self) -> ICFWLFULL2_R { - ICFWLFULL2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfwlfull2(&self) -> Icfwlfull2R { + Icfwlfull2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof0(&self) -> ICFOF0_R { - ICFOF0_R::new(((self.bits >> 20) & 1) != 0) + pub fn icfof0(&self) -> Icfof0R { + Icfof0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof1(&self) -> ICFOF1_R { - ICFOF1_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfof1(&self) -> Icfof1R { + Icfof1R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof2(&self) -> ICFOF2_R { - ICFOF2_R::new(((self.bits >> 22) & 1) != 0) + pub fn icfof2(&self) -> Icfof2R { + Icfof2R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 24 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf0(&self) -> ICFUF0_R { - ICFUF0_R::new(((self.bits >> 24) & 1) != 0) + pub fn icfuf0(&self) -> Icfuf0R { + Icfuf0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf1(&self) -> ICFUF1_R { - ICFUF1_R::new(((self.bits >> 25) & 1) != 0) + pub fn icfuf1(&self) -> Icfuf1R { + Icfuf1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf2(&self) -> ICFUF2_R { - ICFUF2_R::new(((self.bits >> 26) & 1) != 0) + pub fn icfuf2(&self) -> Icfuf2R { + Icfuf2R::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<0> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 0) } #[doc = "Bit 1 - Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<1> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 1) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] #[must_use] - pub fn dirchg(&mut self) -> DIRCHG_W<2> { - DIRCHG_W::new(self) + pub fn dirchg(&mut self) -> DirchgW { + DirchgW::new(self, 2) } #[doc = "Bit 4 - Capture Compare Channel 0 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc0(&mut self) -> CC0_W<4> { - CC0_W::new(self) + pub fn cc0(&mut self) -> Cc0W { + Cc0W::new(self, 4) } #[doc = "Bit 5 - Capture Compare Channel 1 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc1(&mut self) -> CC1_W<5> { - CC1_W::new(self) + pub fn cc1(&mut self) -> Cc1W { + Cc1W::new(self, 5) } #[doc = "Bit 6 - Capture Compare Channel 2 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc2(&mut self) -> CC2_W<6> { - CC2_W::new(self) + pub fn cc2(&mut self) -> Cc2W { + Cc2W::new(self, 6) } #[doc = "Bit 16 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull0(&mut self) -> ICFWLFULL0_W<16> { - ICFWLFULL0_W::new(self) + pub fn icfwlfull0(&mut self) -> Icfwlfull0W { + Icfwlfull0W::new(self, 16) } #[doc = "Bit 17 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull1(&mut self) -> ICFWLFULL1_W<17> { - ICFWLFULL1_W::new(self) + pub fn icfwlfull1(&mut self) -> Icfwlfull1W { + Icfwlfull1W::new(self, 17) } #[doc = "Bit 18 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull2(&mut self) -> ICFWLFULL2_W<18> { - ICFWLFULL2_W::new(self) + pub fn icfwlfull2(&mut self) -> Icfwlfull2W { + Icfwlfull2W::new(self, 18) } #[doc = "Bit 20 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof0(&mut self) -> ICFOF0_W<20> { - ICFOF0_W::new(self) + pub fn icfof0(&mut self) -> Icfof0W { + Icfof0W::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof1(&mut self) -> ICFOF1_W<21> { - ICFOF1_W::new(self) + pub fn icfof1(&mut self) -> Icfof1W { + Icfof1W::new(self, 21) } #[doc = "Bit 22 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof2(&mut self) -> ICFOF2_W<22> { - ICFOF2_W::new(self) + pub fn icfof2(&mut self) -> Icfof2W { + Icfof2W::new(self, 22) } #[doc = "Bit 24 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf0(&mut self) -> ICFUF0_W<24> { - ICFUF0_W::new(self) + pub fn icfuf0(&mut self) -> Icfuf0W { + Icfuf0W::new(self, 24) } #[doc = "Bit 25 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf1(&mut self) -> ICFUF1_W<25> { - ICFUF1_W::new(self) + pub fn icfuf1(&mut self) -> Icfuf1W { + Icfuf1W::new(self, 25) } #[doc = "Bit 26 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf2(&mut self) -> ICFUF2_W<26> { - ICFUF2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfuf2(&mut self) -> Icfuf2W { + Icfuf2W::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/ipversion.rs index fd8f758..0b161f8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/lock.rs index 4d444ca..4d6d1fe 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Timer Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "52864: Write to unlock TIMER registers"] - UNLOCK = 52864, + Unlock = 52864, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Timer Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unlock TIMER registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Timer Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/status.rs index 1a2964d..25d646e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/status.rs @@ -1,339 +1,324 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RUNNING` reader - Running"] -pub type RUNNING_R = crate::BitReader; -#[doc = "Field `DIR` reader - Direction"] -pub type DIR_R = crate::BitReader; +pub type RunningR = crate::BitReader; #[doc = "Direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DIR_A { +pub enum Dir { #[doc = "0: Counting up"] - UP = 0, + Up = 0, #[doc = "1: Counting down"] - DOWN = 1, + Down = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DIR_A) -> Self { + fn from(variant: Dir) -> Self { variant as u8 != 0 } } -impl DIR_R { +#[doc = "Field `DIR` reader - Direction"] +pub type DirR = crate::BitReader; +impl DirR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DIR_A { + pub const fn variant(&self) -> Dir { match self.bits { - false => DIR_A::UP, - true => DIR_A::DOWN, + false => Dir::Up, + true => Dir::Down, } } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Counting up"] #[inline(always)] pub fn is_up(&self) -> bool { - *self == DIR_A::UP + *self == Dir::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Counting down"] #[inline(always)] pub fn is_down(&self) -> bool { - *self == DIR_A::DOWN + *self == Dir::Down } } #[doc = "Field `TOPBV` reader - TOP Buffer Valid"] -pub type TOPBV_R = crate::BitReader; -#[doc = "Field `TIMERLOCKSTATUS` reader - Timer lock status"] -pub type TIMERLOCKSTATUS_R = crate::BitReader; +pub type TopbvR = crate::BitReader; #[doc = "Timer lock status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TIMERLOCKSTATUS_A { +pub enum Timerlockstatus { #[doc = "0: TIMER registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: TIMER registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TIMERLOCKSTATUS_A) -> Self { + fn from(variant: Timerlockstatus) -> Self { variant as u8 != 0 } } -impl TIMERLOCKSTATUS_R { +#[doc = "Field `TIMERLOCKSTATUS` reader - Timer lock status"] +pub type TimerlockstatusR = crate::BitReader; +impl TimerlockstatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TIMERLOCKSTATUS_A { + pub const fn variant(&self) -> Timerlockstatus { match self.bits { - false => TIMERLOCKSTATUS_A::UNLOCKED, - true => TIMERLOCKSTATUS_A::LOCKED, + false => Timerlockstatus::Unlocked, + true => Timerlockstatus::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "TIMER registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == TIMERLOCKSTATUS_A::UNLOCKED + *self == Timerlockstatus::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "TIMER registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == TIMERLOCKSTATUS_A::LOCKED + *self == Timerlockstatus::Locked } } -#[doc = "Field `DTILOCKSTATUS` reader - DTI lock status"] -pub type DTILOCKSTATUS_R = crate::BitReader; #[doc = "DTI lock status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DTILOCKSTATUS_A { +pub enum Dtilockstatus { #[doc = "0: DTI registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: DTI registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DTILOCKSTATUS_A) -> Self { + fn from(variant: Dtilockstatus) -> Self { variant as u8 != 0 } } -impl DTILOCKSTATUS_R { +#[doc = "Field `DTILOCKSTATUS` reader - DTI lock status"] +pub type DtilockstatusR = crate::BitReader; +impl DtilockstatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTILOCKSTATUS_A { + pub const fn variant(&self) -> Dtilockstatus { match self.bits { - false => DTILOCKSTATUS_A::UNLOCKED, - true => DTILOCKSTATUS_A::LOCKED, + false => Dtilockstatus::Unlocked, + true => Dtilockstatus::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "DTI registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == DTILOCKSTATUS_A::UNLOCKED + *self == Dtilockstatus::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "DTI registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == DTILOCKSTATUS_A::LOCKED + *self == Dtilockstatus::Locked } } #[doc = "Field `SYNCBUSY` reader - Sync Busy"] -pub type SYNCBUSY_R = crate::BitReader; +pub type SyncbusyR = crate::BitReader; #[doc = "Field `OCBV0` reader - Output Compare Buffer Valid"] -pub type OCBV0_R = crate::BitReader; +pub type Ocbv0R = crate::BitReader; #[doc = "Field `OCBV1` reader - Output Compare Buffer Valid"] -pub type OCBV1_R = crate::BitReader; +pub type Ocbv1R = crate::BitReader; #[doc = "Field `OCBV2` reader - Output Compare Buffer Valid"] -pub type OCBV2_R = crate::BitReader; +pub type Ocbv2R = crate::BitReader; #[doc = "Field `ICFEMPTY0` reader - Input capture fifo empty"] -pub type ICFEMPTY0_R = crate::BitReader; +pub type Icfempty0R = crate::BitReader; #[doc = "Field `ICFEMPTY1` reader - Input capture fifo empty"] -pub type ICFEMPTY1_R = crate::BitReader; +pub type Icfempty1R = crate::BitReader; #[doc = "Field `ICFEMPTY2` reader - Input capture fifo empty"] -pub type ICFEMPTY2_R = crate::BitReader; -#[doc = "Field `CCPOL0` reader - Compare/Capture Polarity"] -pub type CCPOL0_R = crate::BitReader; +pub type Icfempty2R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL0_A { +pub enum Ccpol0 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL0_A) -> Self { + fn from(variant: Ccpol0) -> Self { variant as u8 != 0 } } -impl CCPOL0_R { +#[doc = "Field `CCPOL0` reader - Compare/Capture Polarity"] +pub type Ccpol0R = crate::BitReader; +impl Ccpol0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL0_A { + pub const fn variant(&self) -> Ccpol0 { match self.bits { - false => CCPOL0_A::LOWRISE, - true => CCPOL0_A::HIGHFALL, + false => Ccpol0::Lowrise, + true => Ccpol0::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL0_A::LOWRISE + *self == Ccpol0::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL0_A::HIGHFALL + *self == Ccpol0::Highfall } } -#[doc = "Field `CCPOL1` reader - Compare/Capture Polarity"] -pub type CCPOL1_R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL1_A { +pub enum Ccpol1 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL1_A) -> Self { + fn from(variant: Ccpol1) -> Self { variant as u8 != 0 } } -impl CCPOL1_R { +#[doc = "Field `CCPOL1` reader - Compare/Capture Polarity"] +pub type Ccpol1R = crate::BitReader; +impl Ccpol1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL1_A { + pub const fn variant(&self) -> Ccpol1 { match self.bits { - false => CCPOL1_A::LOWRISE, - true => CCPOL1_A::HIGHFALL, + false => Ccpol1::Lowrise, + true => Ccpol1::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL1_A::LOWRISE + *self == Ccpol1::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL1_A::HIGHFALL + *self == Ccpol1::Highfall } } -#[doc = "Field `CCPOL2` reader - Compare/Capture Polarity"] -pub type CCPOL2_R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL2_A { +pub enum Ccpol2 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL2_A) -> Self { + fn from(variant: Ccpol2) -> Self { variant as u8 != 0 } } -impl CCPOL2_R { +#[doc = "Field `CCPOL2` reader - Compare/Capture Polarity"] +pub type Ccpol2R = crate::BitReader; +impl Ccpol2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL2_A { + pub const fn variant(&self) -> Ccpol2 { match self.bits { - false => CCPOL2_A::LOWRISE, - true => CCPOL2_A::HIGHFALL, + false => Ccpol2::Lowrise, + true => Ccpol2::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL2_A::LOWRISE + *self == Ccpol2::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL2_A::HIGHFALL + *self == Ccpol2::Highfall } } impl R { #[doc = "Bit 0 - Running"] #[inline(always)] - pub fn running(&self) -> RUNNING_R { - RUNNING_R::new((self.bits & 1) != 0) + pub fn running(&self) -> RunningR { + RunningR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Direction"] #[inline(always)] - pub fn dir(&self) -> DIR_R { - DIR_R::new(((self.bits >> 1) & 1) != 0) + pub fn dir(&self) -> DirR { + DirR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - TOP Buffer Valid"] #[inline(always)] - pub fn topbv(&self) -> TOPBV_R { - TOPBV_R::new(((self.bits >> 2) & 1) != 0) + pub fn topbv(&self) -> TopbvR { + TopbvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Timer lock status"] #[inline(always)] - pub fn timerlockstatus(&self) -> TIMERLOCKSTATUS_R { - TIMERLOCKSTATUS_R::new(((self.bits >> 4) & 1) != 0) + pub fn timerlockstatus(&self) -> TimerlockstatusR { + TimerlockstatusR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DTI lock status"] #[inline(always)] - pub fn dtilockstatus(&self) -> DTILOCKSTATUS_R { - DTILOCKSTATUS_R::new(((self.bits >> 5) & 1) != 0) + pub fn dtilockstatus(&self) -> DtilockstatusR { + DtilockstatusR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Sync Busy"] #[inline(always)] - pub fn syncbusy(&self) -> SYNCBUSY_R { - SYNCBUSY_R::new(((self.bits >> 6) & 1) != 0) + pub fn syncbusy(&self) -> SyncbusyR { + SyncbusyR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv0(&self) -> OCBV0_R { - OCBV0_R::new(((self.bits >> 8) & 1) != 0) + pub fn ocbv0(&self) -> Ocbv0R { + Ocbv0R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv1(&self) -> OCBV1_R { - OCBV1_R::new(((self.bits >> 9) & 1) != 0) + pub fn ocbv1(&self) -> Ocbv1R { + Ocbv1R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv2(&self) -> OCBV2_R { - OCBV2_R::new(((self.bits >> 10) & 1) != 0) + pub fn ocbv2(&self) -> Ocbv2R { + Ocbv2R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 16 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty0(&self) -> ICFEMPTY0_R { - ICFEMPTY0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfempty0(&self) -> Icfempty0R { + Icfempty0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty1(&self) -> ICFEMPTY1_R { - ICFEMPTY1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfempty1(&self) -> Icfempty1R { + Icfempty1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty2(&self) -> ICFEMPTY2_R { - ICFEMPTY2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfempty2(&self) -> Icfempty2R { + Icfempty2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 24 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol0(&self) -> CCPOL0_R { - CCPOL0_R::new(((self.bits >> 24) & 1) != 0) + pub fn ccpol0(&self) -> Ccpol0R { + Ccpol0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol1(&self) -> CCPOL1_R { - CCPOL1_R::new(((self.bits >> 25) & 1) != 0) + pub fn ccpol1(&self) -> Ccpol1R { + Ccpol1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol2(&self) -> CCPOL2_R { - CCPOL2_R::new(((self.bits >> 26) & 1) != 0) + pub fn ccpol2(&self) -> Ccpol2R { + Ccpol2R::new(((self.bits >> 26) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/top.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/top.rs index 65df306..6799f48 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/top.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/top.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOP` reader - Counter Top Value"] -pub type TOP_R = crate::FieldReader; +pub type TopR = crate::FieldReader; #[doc = "Field `TOP` writer - Counter Top Value"] -pub type TOP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOP_SPEC, u16, u16, 16, O>; +pub type TopW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Top Value"] #[inline(always)] - pub fn top(&self) -> TOP_R { - TOP_R::new((self.bits & 0xffff) as u16) + pub fn top(&self) -> TopR { + TopR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Top Value"] #[inline(always)] #[must_use] - pub fn top(&mut self) -> TOP_W<0> { - TOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn top(&mut self) -> TopW { + TopW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [top](index.html) module"] -pub struct TOP_SPEC; -impl crate::RegisterSpec for TOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopSpec; +impl crate::RegisterSpec for TopSpec { type Ux = u32; } -#[doc = "`read()` method returns [top::R](R) reader structure"] -impl crate::Readable for TOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [top::W](W) writer structure"] -impl crate::Writable for TOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`top::R`](R) reader structure"] +impl crate::Readable for TopSpec {} +#[doc = "`write(|w| ..)` method takes [`top::W`](W) writer structure"] +impl crate::Writable for TopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOP to value 0xffff"] -impl crate::Resettable for TOP_SPEC { - const RESET_VALUE: Self::Ux = 0xffff; +impl crate::Resettable for TopSpec { + const RESET_VALUE: u32 = 0xffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/topb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/topb.rs index 012fd04..e6c7e8c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/topb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_ns/topb.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOPB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOPB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOPB` reader - Counter Top Buffer Register"] -pub type TOPB_R = crate::FieldReader; +pub type TopbR = crate::FieldReader; #[doc = "Field `TOPB` writer - Counter Top Buffer Register"] -pub type TOPB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOPB_SPEC, u16, u16, 16, O>; +pub type TopbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Top Buffer Register"] #[inline(always)] - pub fn topb(&self) -> TOPB_R { - TOPB_R::new((self.bits & 0xffff) as u16) + pub fn topb(&self) -> TopbR { + TopbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Top Buffer Register"] #[inline(always)] #[must_use] - pub fn topb(&mut self) -> TOPB_W<0> { - TOPB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn topb(&mut self) -> TopbW { + TopbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [topb](index.html) module"] -pub struct TOPB_SPEC; -impl crate::RegisterSpec for TOPB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopbSpec; +impl crate::RegisterSpec for TopbSpec { type Ux = u32; } -#[doc = "`read()` method returns [topb::R](R) reader structure"] -impl crate::Readable for TOPB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [topb::W](W) writer structure"] -impl crate::Writable for TOPB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`topb::R`](R) reader structure"] +impl crate::Readable for TopbSpec {} +#[doc = "`write(|w| ..)` method takes [`topb::W`](W) writer structure"] +impl crate::Writable for TopbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOPB to value 0"] -impl crate::Resettable for TOPB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TopbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s.rs index 50b1dd4..e4e8a9b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s.rs @@ -1,240 +1,470 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + cfg: Cfg, + ctrl: Ctrl, + cmd: Cmd, + status: Status, + if_: If, + ien: Ien, + top: Top, + topb: Topb, + cnt: Cnt, + _reserved10: [u8; 0x04], + lock: Lock, + en: En, + _reserved12: [u8; 0x2c], + cc0_cfg: Cc0Cfg, + cc0_ctrl: Cc0Ctrl, + cc0_oc: Cc0Oc, + _reserved15: [u8; 0x04], + cc0_ocb: Cc0Ocb, + cc0_icf: Cc0Icf, + cc0_icof: Cc0Icof, + _reserved18: [u8; 0x04], + cc1_cfg: Cc1Cfg, + cc1_ctrl: Cc1Ctrl, + cc1_oc: Cc1Oc, + _reserved21: [u8; 0x04], + cc1_ocb: Cc1Ocb, + cc1_icf: Cc1Icf, + cc1_icof: Cc1Icof, + _reserved24: [u8; 0x04], + cc2_cfg: Cc2Cfg, + cc2_ctrl: Cc2Ctrl, + cc2_oc: Cc2Oc, + _reserved27: [u8; 0x04], + cc2_ocb: Cc2Ocb, + cc2_icf: Cc2Icf, + cc2_icof: Cc2Icof, + _reserved30: [u8; 0x24], + dtcfg: Dtcfg, + dttimecfg: Dttimecfg, + dtfcfg: Dtfcfg, + dtctrl: Dtctrl, + dtogen: Dtogen, + dtfault: Dtfault, + dtfaultc: Dtfaultc, + dtlock: Dtlock, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x08 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x0c - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x10 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x14 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x18 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x1c - No Description"] - pub top: TOP, + #[inline(always)] + pub const fn top(&self) -> &Top { + &self.top + } #[doc = "0x20 - No Description"] - pub topb: TOPB, + #[inline(always)] + pub const fn topb(&self) -> &Topb { + &self.topb + } #[doc = "0x24 - No Description"] - pub cnt: CNT, - _reserved10: [u8; 0x04], + #[inline(always)] + pub const fn cnt(&self) -> &Cnt { + &self.cnt + } #[doc = "0x2c - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x30 - No Description"] - pub en: EN, - _reserved12: [u8; 0x2c], + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x60 - No Description"] - pub cc0_cfg: CC0_CFG, + #[inline(always)] + pub const fn cc0_cfg(&self) -> &Cc0Cfg { + &self.cc0_cfg + } #[doc = "0x64 - No Description"] - pub cc0_ctrl: CC0_CTRL, + #[inline(always)] + pub const fn cc0_ctrl(&self) -> &Cc0Ctrl { + &self.cc0_ctrl + } #[doc = "0x68 - No Description"] - pub cc0_oc: CC0_OC, - _reserved15: [u8; 0x04], + #[inline(always)] + pub const fn cc0_oc(&self) -> &Cc0Oc { + &self.cc0_oc + } #[doc = "0x70 - No Description"] - pub cc0_ocb: CC0_OCB, + #[inline(always)] + pub const fn cc0_ocb(&self) -> &Cc0Ocb { + &self.cc0_ocb + } #[doc = "0x74 - No Description"] - pub cc0_icf: CC0_ICF, + #[inline(always)] + pub const fn cc0_icf(&self) -> &Cc0Icf { + &self.cc0_icf + } #[doc = "0x78 - No Description"] - pub cc0_icof: CC0_ICOF, - _reserved18: [u8; 0x04], + #[inline(always)] + pub const fn cc0_icof(&self) -> &Cc0Icof { + &self.cc0_icof + } #[doc = "0x80 - No Description"] - pub cc1_cfg: CC1_CFG, + #[inline(always)] + pub const fn cc1_cfg(&self) -> &Cc1Cfg { + &self.cc1_cfg + } #[doc = "0x84 - No Description"] - pub cc1_ctrl: CC1_CTRL, + #[inline(always)] + pub const fn cc1_ctrl(&self) -> &Cc1Ctrl { + &self.cc1_ctrl + } #[doc = "0x88 - No Description"] - pub cc1_oc: CC1_OC, - _reserved21: [u8; 0x04], + #[inline(always)] + pub const fn cc1_oc(&self) -> &Cc1Oc { + &self.cc1_oc + } #[doc = "0x90 - No Description"] - pub cc1_ocb: CC1_OCB, + #[inline(always)] + pub const fn cc1_ocb(&self) -> &Cc1Ocb { + &self.cc1_ocb + } #[doc = "0x94 - No Description"] - pub cc1_icf: CC1_ICF, + #[inline(always)] + pub const fn cc1_icf(&self) -> &Cc1Icf { + &self.cc1_icf + } #[doc = "0x98 - No Description"] - pub cc1_icof: CC1_ICOF, - _reserved24: [u8; 0x04], + #[inline(always)] + pub const fn cc1_icof(&self) -> &Cc1Icof { + &self.cc1_icof + } #[doc = "0xa0 - No Description"] - pub cc2_cfg: CC2_CFG, + #[inline(always)] + pub const fn cc2_cfg(&self) -> &Cc2Cfg { + &self.cc2_cfg + } #[doc = "0xa4 - No Description"] - pub cc2_ctrl: CC2_CTRL, + #[inline(always)] + pub const fn cc2_ctrl(&self) -> &Cc2Ctrl { + &self.cc2_ctrl + } #[doc = "0xa8 - No Description"] - pub cc2_oc: CC2_OC, - _reserved27: [u8; 0x04], + #[inline(always)] + pub const fn cc2_oc(&self) -> &Cc2Oc { + &self.cc2_oc + } #[doc = "0xb0 - No Description"] - pub cc2_ocb: CC2_OCB, + #[inline(always)] + pub const fn cc2_ocb(&self) -> &Cc2Ocb { + &self.cc2_ocb + } #[doc = "0xb4 - No Description"] - pub cc2_icf: CC2_ICF, + #[inline(always)] + pub const fn cc2_icf(&self) -> &Cc2Icf { + &self.cc2_icf + } #[doc = "0xb8 - No Description"] - pub cc2_icof: CC2_ICOF, - _reserved30: [u8; 0x24], + #[inline(always)] + pub const fn cc2_icof(&self) -> &Cc2Icof { + &self.cc2_icof + } #[doc = "0xe0 - No Description"] - pub dtcfg: DTCFG, + #[inline(always)] + pub const fn dtcfg(&self) -> &Dtcfg { + &self.dtcfg + } #[doc = "0xe4 - No Description"] - pub dttimecfg: DTTIMECFG, + #[inline(always)] + pub const fn dttimecfg(&self) -> &Dttimecfg { + &self.dttimecfg + } #[doc = "0xe8 - No Description"] - pub dtfcfg: DTFCFG, + #[inline(always)] + pub const fn dtfcfg(&self) -> &Dtfcfg { + &self.dtfcfg + } #[doc = "0xec - No Description"] - pub dtctrl: DTCTRL, + #[inline(always)] + pub const fn dtctrl(&self) -> &Dtctrl { + &self.dtctrl + } #[doc = "0xf0 - No Description"] - pub dtogen: DTOGEN, + #[inline(always)] + pub const fn dtogen(&self) -> &Dtogen { + &self.dtogen + } #[doc = "0xf4 - No Description"] - pub dtfault: DTFAULT, + #[inline(always)] + pub const fn dtfault(&self) -> &Dtfault { + &self.dtfault + } #[doc = "0xf8 - No Description"] - pub dtfaultc: DTFAULTC, + #[inline(always)] + pub const fn dtfaultc(&self) -> &Dtfaultc { + &self.dtfaultc + } #[doc = "0xfc - No Description"] - pub dtlock: DTLOCK, + #[inline(always)] + pub const fn dtlock(&self) -> &Dtlock { + &self.dtlock + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "TOP (rw) register accessor: an alias for `Reg`"] -pub type TOP = crate::Reg; +#[doc = "TOP (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@top`] +module"] +#[doc(alias = "TOP")] +pub type Top = crate::Reg; #[doc = "No Description"] pub mod top; -#[doc = "TOPB (rw) register accessor: an alias for `Reg`"] -pub type TOPB = crate::Reg; +#[doc = "TOPB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@topb`] +module"] +#[doc(alias = "TOPB")] +pub type Topb = crate::Reg; #[doc = "No Description"] pub mod topb; -#[doc = "CNT (rw) register accessor: an alias for `Reg`"] -pub type CNT = crate::Reg; +#[doc = "CNT (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnt`] +module"] +#[doc(alias = "CNT")] +pub type Cnt = crate::Reg; #[doc = "No Description"] pub mod cnt; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CC0_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC0_CFG = crate::Reg; +#[doc = "CC0_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_cfg`] +module"] +#[doc(alias = "CC0_CFG")] +pub type Cc0Cfg = crate::Reg; #[doc = "No Description"] pub mod cc0_cfg; -#[doc = "CC0_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC0_CTRL = crate::Reg; +#[doc = "CC0_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_ctrl`] +module"] +#[doc(alias = "CC0_CTRL")] +pub type Cc0Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc0_ctrl; -#[doc = "CC0_OC (rw) register accessor: an alias for `Reg`"] -pub type CC0_OC = crate::Reg; +#[doc = "CC0_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_oc`] +module"] +#[doc(alias = "CC0_OC")] +pub type Cc0Oc = crate::Reg; #[doc = "No Description"] pub mod cc0_oc; -#[doc = "CC0_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC0_OCB = crate::Reg; +#[doc = "CC0_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_ocb`] +module"] +#[doc(alias = "CC0_OCB")] +pub type Cc0Ocb = crate::Reg; #[doc = "No Description"] pub mod cc0_ocb; -#[doc = "CC0_ICF (r) register accessor: an alias for `Reg`"] -pub type CC0_ICF = crate::Reg; +#[doc = "CC0_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_icf`] +module"] +#[doc(alias = "CC0_ICF")] +pub type Cc0Icf = crate::Reg; #[doc = "No Description"] pub mod cc0_icf; -#[doc = "CC0_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC0_ICOF = crate::Reg; +#[doc = "CC0_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc0_icof`] +module"] +#[doc(alias = "CC0_ICOF")] +pub type Cc0Icof = crate::Reg; #[doc = "No Description"] pub mod cc0_icof; -#[doc = "CC1_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC1_CFG = crate::Reg; +#[doc = "CC1_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_cfg`] +module"] +#[doc(alias = "CC1_CFG")] +pub type Cc1Cfg = crate::Reg; #[doc = "No Description"] pub mod cc1_cfg; -#[doc = "CC1_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC1_CTRL = crate::Reg; +#[doc = "CC1_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_ctrl`] +module"] +#[doc(alias = "CC1_CTRL")] +pub type Cc1Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc1_ctrl; -#[doc = "CC1_OC (rw) register accessor: an alias for `Reg`"] -pub type CC1_OC = crate::Reg; +#[doc = "CC1_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_oc`] +module"] +#[doc(alias = "CC1_OC")] +pub type Cc1Oc = crate::Reg; #[doc = "No Description"] pub mod cc1_oc; -#[doc = "CC1_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC1_OCB = crate::Reg; +#[doc = "CC1_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_ocb`] +module"] +#[doc(alias = "CC1_OCB")] +pub type Cc1Ocb = crate::Reg; #[doc = "No Description"] pub mod cc1_ocb; -#[doc = "CC1_ICF (r) register accessor: an alias for `Reg`"] -pub type CC1_ICF = crate::Reg; +#[doc = "CC1_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_icf`] +module"] +#[doc(alias = "CC1_ICF")] +pub type Cc1Icf = crate::Reg; #[doc = "No Description"] pub mod cc1_icf; -#[doc = "CC1_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC1_ICOF = crate::Reg; +#[doc = "CC1_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc1_icof`] +module"] +#[doc(alias = "CC1_ICOF")] +pub type Cc1Icof = crate::Reg; #[doc = "No Description"] pub mod cc1_icof; -#[doc = "CC2_CFG (rw) register accessor: an alias for `Reg`"] -pub type CC2_CFG = crate::Reg; +#[doc = "CC2_CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_cfg`] +module"] +#[doc(alias = "CC2_CFG")] +pub type Cc2Cfg = crate::Reg; #[doc = "No Description"] pub mod cc2_cfg; -#[doc = "CC2_CTRL (rw) register accessor: an alias for `Reg`"] -pub type CC2_CTRL = crate::Reg; +#[doc = "CC2_CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_ctrl`] +module"] +#[doc(alias = "CC2_CTRL")] +pub type Cc2Ctrl = crate::Reg; #[doc = "No Description"] pub mod cc2_ctrl; -#[doc = "CC2_OC (rw) register accessor: an alias for `Reg`"] -pub type CC2_OC = crate::Reg; +#[doc = "CC2_OC (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_oc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_oc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_oc`] +module"] +#[doc(alias = "CC2_OC")] +pub type Cc2Oc = crate::Reg; #[doc = "No Description"] pub mod cc2_oc; -#[doc = "CC2_OCB (rw) register accessor: an alias for `Reg`"] -pub type CC2_OCB = crate::Reg; +#[doc = "CC2_OCB (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ocb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ocb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_ocb`] +module"] +#[doc(alias = "CC2_OCB")] +pub type Cc2Ocb = crate::Reg; #[doc = "No Description"] pub mod cc2_ocb; -#[doc = "CC2_ICF (r) register accessor: an alias for `Reg`"] -pub type CC2_ICF = crate::Reg; +#[doc = "CC2_ICF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_icf`] +module"] +#[doc(alias = "CC2_ICF")] +pub type Cc2Icf = crate::Reg; #[doc = "No Description"] pub mod cc2_icf; -#[doc = "CC2_ICOF (r) register accessor: an alias for `Reg`"] -pub type CC2_ICOF = crate::Reg; +#[doc = "CC2_ICOF (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icof::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc2_icof`] +module"] +#[doc(alias = "CC2_ICOF")] +pub type Cc2Icof = crate::Reg; #[doc = "No Description"] pub mod cc2_icof; -#[doc = "DTCFG (rw) register accessor: an alias for `Reg`"] -pub type DTCFG = crate::Reg; +#[doc = "DTCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtcfg`] +module"] +#[doc(alias = "DTCFG")] +pub type Dtcfg = crate::Reg; #[doc = "No Description"] pub mod dtcfg; -#[doc = "DTTIMECFG (rw) register accessor: an alias for `Reg`"] -pub type DTTIMECFG = crate::Reg; +#[doc = "DTTIMECFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dttimecfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dttimecfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dttimecfg`] +module"] +#[doc(alias = "DTTIMECFG")] +pub type Dttimecfg = crate::Reg; #[doc = "No Description"] pub mod dttimecfg; -#[doc = "DTFCFG (rw) register accessor: an alias for `Reg`"] -pub type DTFCFG = crate::Reg; +#[doc = "DTFCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfcfg`] +module"] +#[doc(alias = "DTFCFG")] +pub type Dtfcfg = crate::Reg; #[doc = "No Description"] pub mod dtfcfg; -#[doc = "DTCTRL (rw) register accessor: an alias for `Reg`"] -pub type DTCTRL = crate::Reg; +#[doc = "DTCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtctrl`] +module"] +#[doc(alias = "DTCTRL")] +pub type Dtctrl = crate::Reg; #[doc = "No Description"] pub mod dtctrl; -#[doc = "DTOGEN (rw) register accessor: an alias for `Reg`"] -pub type DTOGEN = crate::Reg; +#[doc = "DTOGEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtogen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtogen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtogen`] +module"] +#[doc(alias = "DTOGEN")] +pub type Dtogen = crate::Reg; #[doc = "No Description"] pub mod dtogen; -#[doc = "DTFAULT (r) register accessor: an alias for `Reg`"] -pub type DTFAULT = crate::Reg; +#[doc = "DTFAULT (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfault::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfault`] +module"] +#[doc(alias = "DTFAULT")] +pub type Dtfault = crate::Reg; #[doc = "No Description"] pub mod dtfault; -#[doc = "DTFAULTC (w) register accessor: an alias for `Reg`"] -pub type DTFAULTC = crate::Reg; +#[doc = "DTFAULTC (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfaultc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtfaultc`] +module"] +#[doc(alias = "DTFAULTC")] +pub type Dtfaultc = crate::Reg; #[doc = "No Description"] pub mod dtfaultc; -#[doc = "DTLOCK (w) register accessor: an alias for `Reg`"] -pub type DTLOCK = crate::Reg; +#[doc = "DTLOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtlock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtlock`] +module"] +#[doc(alias = "DTLOCK")] +pub type Dtlock = crate::Reg; #[doc = "No Description"] pub mod dtlock; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc0_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc0_cfg.rs index 547eeb0..b3aac62 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc0_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc0_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC0_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC0_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_cfg](index.html) module"] -pub struct CC0_CFG_SPEC; -impl crate::RegisterSpec for CC0_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0CfgSpec; +impl crate::RegisterSpec for Cc0CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_cfg::R](R) reader structure"] -impl crate::Readable for CC0_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_cfg::W](W) writer structure"] -impl crate::Writable for CC0_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_cfg::R`](R) reader structure"] +impl crate::Readable for Cc0CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_cfg::W`](W) writer structure"] +impl crate::Writable for Cc0CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_CFG to value 0"] -impl crate::Resettable for CC0_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc0_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc0_ctrl.rs index 71b40e4..1b92d0c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc0_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc0_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC0_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC0_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC0_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_ctrl](index.html) module"] -pub struct CC0_CTRL_SPEC; -impl crate::RegisterSpec for CC0_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0CtrlSpec; +impl crate::RegisterSpec for Cc0CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_ctrl::R](R) reader structure"] -impl crate::Readable for CC0_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_ctrl::W](W) writer structure"] -impl crate::Writable for CC0_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc0CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc0CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_CTRL to value 0"] -impl crate::Resettable for CC0_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc0_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc0_icf.rs index f4a2c64..6afddea 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc0_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc0_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC0_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new((self.bits & 0xffff) as u16) + pub fn icf(&self) -> IcfR { + IcfR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_icf](index.html) module"] -pub struct CC0_ICF_SPEC; -impl crate::RegisterSpec for CC0_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0IcfSpec; +impl crate::RegisterSpec for Cc0IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_icf::R](R) reader structure"] -impl crate::Readable for CC0_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc0_icf::R`](R) reader structure"] +impl crate::Readable for Cc0IcfSpec {} #[doc = "`reset()` method sets CC0_ICF to value 0"] -impl crate::Resettable for CC0_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc0_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc0_icof.rs index 1ea3983..7653eef 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc0_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc0_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC0_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new((self.bits & 0xffff) as u16) + pub fn icof(&self) -> IcofR { + IcofR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_icof](index.html) module"] -pub struct CC0_ICOF_SPEC; -impl crate::RegisterSpec for CC0_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0IcofSpec; +impl crate::RegisterSpec for Cc0IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_icof::R](R) reader structure"] -impl crate::Readable for CC0_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc0_icof::R`](R) reader structure"] +impl crate::Readable for Cc0IcofSpec {} #[doc = "`reset()` method sets CC0_ICOF to value 0"] -impl crate::Resettable for CC0_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc0_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc0_oc.rs index 97be8b2..c063d52 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc0_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc0_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC0_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC0_OC_SPEC, u16, u16, 16, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new((self.bits & 0xffff) as u16) + pub fn oc(&self) -> OcR { + OcR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_oc](index.html) module"] -pub struct CC0_OC_SPEC; -impl crate::RegisterSpec for CC0_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0OcSpec; +impl crate::RegisterSpec for Cc0OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_oc::R](R) reader structure"] -impl crate::Readable for CC0_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_oc::W](W) writer structure"] -impl crate::Writable for CC0_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_oc::R`](R) reader structure"] +impl crate::Readable for Cc0OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_oc::W`](W) writer structure"] +impl crate::Writable for Cc0OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_OC to value 0"] -impl crate::Resettable for CC0_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc0_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc0_ocb.rs index af4e401..5924ded 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc0_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc0_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC0_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC0_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC0_OCB_SPEC, u16, u16, 16, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new((self.bits & 0xffff) as u16) + pub fn ocb(&self) -> OcbR { + OcbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc0_ocb](index.html) module"] -pub struct CC0_OCB_SPEC; -impl crate::RegisterSpec for CC0_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc0_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc0OcbSpec; +impl crate::RegisterSpec for Cc0OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc0_ocb::R](R) reader structure"] -impl crate::Readable for CC0_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc0_ocb::W](W) writer structure"] -impl crate::Writable for CC0_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc0_ocb::R`](R) reader structure"] +impl crate::Readable for Cc0OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc0_ocb::W`](W) writer structure"] +impl crate::Writable for Cc0OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC0_OCB to value 0"] -impl crate::Resettable for CC0_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc0OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc1_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc1_cfg.rs index b3424c2..2243932 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc1_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc1_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC1_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC1_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_cfg](index.html) module"] -pub struct CC1_CFG_SPEC; -impl crate::RegisterSpec for CC1_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1CfgSpec; +impl crate::RegisterSpec for Cc1CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_cfg::R](R) reader structure"] -impl crate::Readable for CC1_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_cfg::W](W) writer structure"] -impl crate::Writable for CC1_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_cfg::R`](R) reader structure"] +impl crate::Readable for Cc1CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_cfg::W`](W) writer structure"] +impl crate::Writable for Cc1CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_CFG to value 0"] -impl crate::Resettable for CC1_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc1_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc1_ctrl.rs index 38927de..bc41282 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc1_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc1_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC1_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_ctrl](index.html) module"] -pub struct CC1_CTRL_SPEC; -impl crate::RegisterSpec for CC1_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1CtrlSpec; +impl crate::RegisterSpec for Cc1CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_ctrl::R](R) reader structure"] -impl crate::Readable for CC1_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_ctrl::W](W) writer structure"] -impl crate::Writable for CC1_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc1CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc1CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_CTRL to value 0"] -impl crate::Resettable for CC1_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc1_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc1_icf.rs index 1a7d7e8..0211b78 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc1_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc1_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC1_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new((self.bits & 0xffff) as u16) + pub fn icf(&self) -> IcfR { + IcfR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_icf](index.html) module"] -pub struct CC1_ICF_SPEC; -impl crate::RegisterSpec for CC1_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1IcfSpec; +impl crate::RegisterSpec for Cc1IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_icf::R](R) reader structure"] -impl crate::Readable for CC1_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc1_icf::R`](R) reader structure"] +impl crate::Readable for Cc1IcfSpec {} #[doc = "`reset()` method sets CC1_ICF to value 0"] -impl crate::Resettable for CC1_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc1_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc1_icof.rs index ea46e53..3fd845d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc1_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc1_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC1_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new((self.bits & 0xffff) as u16) + pub fn icof(&self) -> IcofR { + IcofR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_icof](index.html) module"] -pub struct CC1_ICOF_SPEC; -impl crate::RegisterSpec for CC1_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1IcofSpec; +impl crate::RegisterSpec for Cc1IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_icof::R](R) reader structure"] -impl crate::Readable for CC1_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc1_icof::R`](R) reader structure"] +impl crate::Readable for Cc1IcofSpec {} #[doc = "`reset()` method sets CC1_ICOF to value 0"] -impl crate::Resettable for CC1_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc1_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc1_oc.rs index 9f40c62..5b2e10b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc1_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc1_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC1_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC1_OC_SPEC, u16, u16, 16, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new((self.bits & 0xffff) as u16) + pub fn oc(&self) -> OcR { + OcR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_oc](index.html) module"] -pub struct CC1_OC_SPEC; -impl crate::RegisterSpec for CC1_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1OcSpec; +impl crate::RegisterSpec for Cc1OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_oc::R](R) reader structure"] -impl crate::Readable for CC1_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_oc::W](W) writer structure"] -impl crate::Writable for CC1_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_oc::R`](R) reader structure"] +impl crate::Readable for Cc1OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_oc::W`](W) writer structure"] +impl crate::Writable for Cc1OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_OC to value 0"] -impl crate::Resettable for CC1_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc1_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc1_ocb.rs index d3c8d9a..7d9f88b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc1_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc1_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC1_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC1_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC1_OCB_SPEC, u16, u16, 16, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new((self.bits & 0xffff) as u16) + pub fn ocb(&self) -> OcbR { + OcbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_ocb](index.html) module"] -pub struct CC1_OCB_SPEC; -impl crate::RegisterSpec for CC1_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc1_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc1OcbSpec; +impl crate::RegisterSpec for Cc1OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc1_ocb::R](R) reader structure"] -impl crate::Readable for CC1_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc1_ocb::W](W) writer structure"] -impl crate::Writable for CC1_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc1_ocb::R`](R) reader structure"] +impl crate::Readable for Cc1OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc1_ocb::W`](W) writer structure"] +impl crate::Writable for Cc1OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC1_OCB to value 0"] -impl crate::Resettable for CC1_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc1OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc2_cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc2_cfg.rs index 6b108e5..97bec45 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc2_cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc2_cfg.rs @@ -1,396 +1,377 @@ #[doc = "Register `CC2_CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - CC Channel Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "CC Channel Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Compare/Capture channel turned off"] - OFF = 0, + Off = 0, #[doc = "1: Input Capture"] - INPUTCAPTURE = 1, + Inputcapture = 1, #[doc = "2: Output Compare"] - OUTPUTCOMPARE = 2, + Outputcompare = 2, #[doc = "3: Pulse-Width Modulation"] - PWM = 3, + Pwm = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - CC Channel Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::OFF, - 1 => MODE_A::INPUTCAPTURE, - 2 => MODE_A::OUTPUTCOMPARE, - 3 => MODE_A::PWM, + 0 => Mode::Off, + 1 => Mode::Inputcapture, + 2 => Mode::Outputcompare, + 3 => Mode::Pwm, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `OFF`"] + #[doc = "Compare/Capture channel turned off"] #[inline(always)] pub fn is_off(&self) -> bool { - *self == MODE_A::OFF + *self == Mode::Off } - #[doc = "Checks if the value of the field is `INPUTCAPTURE`"] + #[doc = "Input Capture"] #[inline(always)] pub fn is_inputcapture(&self) -> bool { - *self == MODE_A::INPUTCAPTURE + *self == Mode::Inputcapture } - #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"] + #[doc = "Output Compare"] #[inline(always)] pub fn is_outputcompare(&self) -> bool { - *self == MODE_A::OUTPUTCOMPARE + *self == Mode::Outputcompare } - #[doc = "Checks if the value of the field is `PWM`"] + #[doc = "Pulse-Width Modulation"] #[inline(always)] pub fn is_pwm(&self) -> bool { - *self == MODE_A::PWM + *self == Mode::Pwm } } #[doc = "Field `MODE` writer - CC Channel Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC2_CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Compare/Capture channel turned off"] #[inline(always)] - pub fn off(self) -> &'a mut W { - self.variant(MODE_A::OFF) + pub fn off(self) -> &'a mut crate::W { + self.variant(Mode::Off) } #[doc = "Input Capture"] #[inline(always)] - pub fn inputcapture(self) -> &'a mut W { - self.variant(MODE_A::INPUTCAPTURE) + pub fn inputcapture(self) -> &'a mut crate::W { + self.variant(Mode::Inputcapture) } #[doc = "Output Compare"] #[inline(always)] - pub fn outputcompare(self) -> &'a mut W { - self.variant(MODE_A::OUTPUTCOMPARE) + pub fn outputcompare(self) -> &'a mut crate::W { + self.variant(Mode::Outputcompare) } #[doc = "Pulse-Width Modulation"] #[inline(always)] - pub fn pwm(self) -> &'a mut W { - self.variant(MODE_A::PWM) + pub fn pwm(self) -> &'a mut crate::W { + self.variant(Mode::Pwm) } } #[doc = "Field `COIST` reader - Compare Output Initial State"] -pub type COIST_R = crate::BitReader; +pub type CoistR = crate::BitReader; #[doc = "Field `COIST` writer - Compare Output Initial State"] -pub type COIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, bool, O>; -#[doc = "Field `INSEL` reader - Input Selection"] -pub type INSEL_R = crate::FieldReader; +pub type CoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL_A { +pub enum Insel { #[doc = "0: TIMERnCCx pin is selected"] - PIN = 0, + Pin = 0, #[doc = "1: Synchornous PRS selected"] - PRSSYNC = 1, + Prssync = 1, #[doc = "2: Asynchronous Level PRS selected"] - PRSASYNCLEVEL = 2, + Prsasynclevel = 2, #[doc = "3: Asynchronous Pulse PRS selected"] - PRSASYNCPULSE = 3, + Prsasyncpulse = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL_A) -> Self { + fn from(variant: Insel) -> Self { variant as _ } } -impl INSEL_R { +impl crate::FieldSpec for Insel { + type Ux = u8; +} +impl crate::IsEnum for Insel {} +#[doc = "Field `INSEL` reader - Input Selection"] +pub type InselR = crate::FieldReader; +impl InselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> INSEL_A { + pub const fn variant(&self) -> Insel { match self.bits { - 0 => INSEL_A::PIN, - 1 => INSEL_A::PRSSYNC, - 2 => INSEL_A::PRSASYNCLEVEL, - 3 => INSEL_A::PRSASYNCPULSE, + 0 => Insel::Pin, + 1 => Insel::Prssync, + 2 => Insel::Prsasynclevel, + 3 => Insel::Prsasyncpulse, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `PIN`"] + #[doc = "TIMERnCCx pin is selected"] #[inline(always)] pub fn is_pin(&self) -> bool { - *self == INSEL_A::PIN + *self == Insel::Pin } - #[doc = "Checks if the value of the field is `PRSSYNC`"] + #[doc = "Synchornous PRS selected"] #[inline(always)] pub fn is_prssync(&self) -> bool { - *self == INSEL_A::PRSSYNC + *self == Insel::Prssync } - #[doc = "Checks if the value of the field is `PRSASYNCLEVEL`"] + #[doc = "Asynchronous Level PRS selected"] #[inline(always)] pub fn is_prsasynclevel(&self) -> bool { - *self == INSEL_A::PRSASYNCLEVEL + *self == Insel::Prsasynclevel } - #[doc = "Checks if the value of the field is `PRSASYNCPULSE`"] + #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] pub fn is_prsasyncpulse(&self) -> bool { - *self == INSEL_A::PRSASYNCPULSE + *self == Insel::Prsasyncpulse } } #[doc = "Field `INSEL` writer - Input Selection"] -pub type INSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CFG_SPEC, u8, INSEL_A, 2, O>; -impl<'a, const O: u8> INSEL_W<'a, O> { +pub type InselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel, crate::Safe>; +impl<'a, REG> InselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "TIMERnCCx pin is selected"] #[inline(always)] - pub fn pin(self) -> &'a mut W { - self.variant(INSEL_A::PIN) + pub fn pin(self) -> &'a mut crate::W { + self.variant(Insel::Pin) } #[doc = "Synchornous PRS selected"] #[inline(always)] - pub fn prssync(self) -> &'a mut W { - self.variant(INSEL_A::PRSSYNC) + pub fn prssync(self) -> &'a mut crate::W { + self.variant(Insel::Prssync) } #[doc = "Asynchronous Level PRS selected"] #[inline(always)] - pub fn prsasynclevel(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCLEVEL) + pub fn prsasynclevel(self) -> &'a mut crate::W { + self.variant(Insel::Prsasynclevel) } #[doc = "Asynchronous Pulse PRS selected"] #[inline(always)] - pub fn prsasyncpulse(self) -> &'a mut W { - self.variant(INSEL_A::PRSASYNCPULSE) + pub fn prsasyncpulse(self) -> &'a mut crate::W { + self.variant(Insel::Prsasyncpulse) } } -#[doc = "Field `PRSCONF` reader - PRS Configuration"] -pub type PRSCONF_R = crate::BitReader; #[doc = "PRS Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRSCONF_A { +pub enum Prsconf { #[doc = "0: Each CC event will generate a one EM01GRPACLK cycle high pulse"] - PULSE = 0, + Pulse = 0, #[doc = "1: The PRS channel will follow CC out"] - LEVEL = 1, + Level = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRSCONF_A) -> Self { + fn from(variant: Prsconf) -> Self { variant as u8 != 0 } } -impl PRSCONF_R { +#[doc = "Field `PRSCONF` reader - PRS Configuration"] +pub type PrsconfR = crate::BitReader; +impl PrsconfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PRSCONF_A { + pub const fn variant(&self) -> Prsconf { match self.bits { - false => PRSCONF_A::PULSE, - true => PRSCONF_A::LEVEL, + false => Prsconf::Pulse, + true => Prsconf::Level, } } - #[doc = "Checks if the value of the field is `PULSE`"] + #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] pub fn is_pulse(&self) -> bool { - *self == PRSCONF_A::PULSE + *self == Prsconf::Pulse } - #[doc = "Checks if the value of the field is `LEVEL`"] + #[doc = "The PRS channel will follow CC out"] #[inline(always)] pub fn is_level(&self) -> bool { - *self == PRSCONF_A::LEVEL + *self == Prsconf::Level } } #[doc = "Field `PRSCONF` writer - PRS Configuration"] -pub type PRSCONF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, PRSCONF_A, O>; -impl<'a, const O: u8> PRSCONF_W<'a, O> { +pub type PrsconfW<'a, REG> = crate::BitWriter<'a, REG, Prsconf>; +impl<'a, REG> PrsconfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Each CC event will generate a one EM01GRPACLK cycle high pulse"] #[inline(always)] - pub fn pulse(self) -> &'a mut W { - self.variant(PRSCONF_A::PULSE) + pub fn pulse(self) -> &'a mut crate::W { + self.variant(Prsconf::Pulse) } #[doc = "The PRS channel will follow CC out"] #[inline(always)] - pub fn level(self) -> &'a mut W { - self.variant(PRSCONF_A::LEVEL) + pub fn level(self) -> &'a mut crate::W { + self.variant(Prsconf::Level) } } -#[doc = "Field `FILT` reader - Digital Filter"] -pub type FILT_R = crate::BitReader; #[doc = "Digital Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FILT_A { +pub enum Filt { #[doc = "0: Digital Filter Disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Digital Filter Enabled"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FILT_A) -> Self { + fn from(variant: Filt) -> Self { variant as u8 != 0 } } -impl FILT_R { +#[doc = "Field `FILT` reader - Digital Filter"] +pub type FiltR = crate::BitReader; +impl FiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FILT_A { + pub const fn variant(&self) -> Filt { match self.bits { - false => FILT_A::DISABLE, - true => FILT_A::ENABLE, + false => Filt::Disable, + true => Filt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Digital Filter Disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == FILT_A::DISABLE + *self == Filt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Digital Filter Enabled"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == FILT_A::ENABLE + *self == Filt::Enable } } #[doc = "Field `FILT` writer - Digital Filter"] -pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, FILT_A, O>; -impl<'a, const O: u8> FILT_W<'a, O> { +pub type FiltW<'a, REG> = crate::BitWriter<'a, REG, Filt>; +impl<'a, REG> FiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Digital Filter Disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(FILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Filt::Disable) } #[doc = "Digital Filter Enabled"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(FILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Filt::Enable) } } #[doc = "Field `ICFWL` reader - Input Capture FIFO watermark level"] -pub type ICFWL_R = crate::BitReader; +pub type IcfwlR = crate::BitReader; #[doc = "Field `ICFWL` writer - Input Capture FIFO watermark level"] -pub type ICFWL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CFG_SPEC, bool, O>; +pub type IcfwlW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] - pub fn coist(&self) -> COIST_R { - COIST_R::new(((self.bits >> 4) & 1) != 0) + pub fn coist(&self) -> CoistR { + CoistR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] - pub fn insel(&self) -> INSEL_R { - INSEL_R::new(((self.bits >> 17) & 3) as u8) + pub fn insel(&self) -> InselR { + InselR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] - pub fn prsconf(&self) -> PRSCONF_R { - PRSCONF_R::new(((self.bits >> 19) & 1) != 0) + pub fn prsconf(&self) -> PrsconfR { + PrsconfR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] - pub fn filt(&self) -> FILT_R { - FILT_R::new(((self.bits >> 20) & 1) != 0) + pub fn filt(&self) -> FiltR { + FiltR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] - pub fn icfwl(&self) -> ICFWL_R { - ICFWL_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfwl(&self) -> IcfwlR { + IcfwlR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CC Channel Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 4 - Compare Output Initial State"] #[inline(always)] #[must_use] - pub fn coist(&mut self) -> COIST_W<4> { - COIST_W::new(self) + pub fn coist(&mut self) -> CoistW { + CoistW::new(self, 4) } #[doc = "Bits 17:18 - Input Selection"] #[inline(always)] #[must_use] - pub fn insel(&mut self) -> INSEL_W<17> { - INSEL_W::new(self) + pub fn insel(&mut self) -> InselW { + InselW::new(self, 17) } #[doc = "Bit 19 - PRS Configuration"] #[inline(always)] #[must_use] - pub fn prsconf(&mut self) -> PRSCONF_W<19> { - PRSCONF_W::new(self) + pub fn prsconf(&mut self) -> PrsconfW { + PrsconfW::new(self, 19) } #[doc = "Bit 20 - Digital Filter"] #[inline(always)] #[must_use] - pub fn filt(&mut self) -> FILT_W<20> { - FILT_W::new(self) + pub fn filt(&mut self) -> FiltW { + FiltW::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO watermark level"] #[inline(always)] #[must_use] - pub fn icfwl(&mut self) -> ICFWL_W<21> { - ICFWL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfwl(&mut self) -> IcfwlW { + IcfwlW::new(self, 21) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_cfg](index.html) module"] -pub struct CC2_CFG_SPEC; -impl crate::RegisterSpec for CC2_CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2CfgSpec; +impl crate::RegisterSpec for Cc2CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_cfg::R](R) reader structure"] -impl crate::Readable for CC2_CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_cfg::W](W) writer structure"] -impl crate::Writable for CC2_CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_cfg::R`](R) reader structure"] +impl crate::Readable for Cc2CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_cfg::W`](W) writer structure"] +impl crate::Writable for Cc2CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_CFG to value 0"] -impl crate::Resettable for CC2_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc2_ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc2_ctrl.rs index b42d120..317952a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc2_ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc2_ctrl.rs @@ -1,529 +1,525 @@ #[doc = "Register `CC2_CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OUTINV` reader - Output Invert"] -pub type OUTINV_R = crate::BitReader; +pub type OutinvR = crate::BitReader; #[doc = "Field `OUTINV` writer - Output Invert"] -pub type OUTINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC2_CTRL_SPEC, bool, O>; -#[doc = "Field `CMOA` reader - Compare Match Output Action"] -pub type CMOA_R = crate::FieldReader; +pub type OutinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Compare Match Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMOA_A { +pub enum Cmoa { #[doc = "0: No action on compare match"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on compare match"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on compare match"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on compare match"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMOA_A) -> Self { + fn from(variant: Cmoa) -> Self { variant as _ } } -impl CMOA_R { +impl crate::FieldSpec for Cmoa { + type Ux = u8; +} +impl crate::IsEnum for Cmoa {} +#[doc = "Field `CMOA` reader - Compare Match Output Action"] +pub type CmoaR = crate::FieldReader; +impl CmoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CMOA_A { + pub const fn variant(&self) -> Cmoa { match self.bits { - 0 => CMOA_A::NONE, - 1 => CMOA_A::TOGGLE, - 2 => CMOA_A::CLEAR, - 3 => CMOA_A::SET, + 0 => Cmoa::None, + 1 => Cmoa::Toggle, + 2 => Cmoa::Clear, + 3 => Cmoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on compare match"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CMOA_A::NONE + *self == Cmoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on compare match"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CMOA_A::TOGGLE + *self == Cmoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on compare match"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CMOA_A::CLEAR + *self == Cmoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on compare match"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CMOA_A::SET + *self == Cmoa::Set } } #[doc = "Field `CMOA` writer - Compare Match Output Action"] -pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, CMOA_A, 2, O>; -impl<'a, const O: u8> CMOA_W<'a, O> { +pub type CmoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmoa, crate::Safe>; +impl<'a, REG> CmoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on compare match"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CMOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cmoa::None) } #[doc = "Toggle output on compare match"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CMOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cmoa::Toggle) } #[doc = "Clear output on compare match"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CMOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cmoa::Clear) } #[doc = "Set output on compare match"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CMOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cmoa::Set) } } -#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] -pub type COFOA_R = crate::FieldReader; #[doc = "Counter Overflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COFOA_A { +pub enum Cofoa { #[doc = "0: No action on counter overflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter overflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter overflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter overflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COFOA_A) -> Self { + fn from(variant: Cofoa) -> Self { variant as _ } } -impl COFOA_R { +impl crate::FieldSpec for Cofoa { + type Ux = u8; +} +impl crate::IsEnum for Cofoa {} +#[doc = "Field `COFOA` reader - Counter Overflow Output Action"] +pub type CofoaR = crate::FieldReader; +impl CofoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> COFOA_A { + pub const fn variant(&self) -> Cofoa { match self.bits { - 0 => COFOA_A::NONE, - 1 => COFOA_A::TOGGLE, - 2 => COFOA_A::CLEAR, - 3 => COFOA_A::SET, + 0 => Cofoa::None, + 1 => Cofoa::Toggle, + 2 => Cofoa::Clear, + 3 => Cofoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter overflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == COFOA_A::NONE + *self == Cofoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter overflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == COFOA_A::TOGGLE + *self == Cofoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter overflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == COFOA_A::CLEAR + *self == Cofoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter overflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == COFOA_A::SET + *self == Cofoa::Set } } #[doc = "Field `COFOA` writer - Counter Overflow Output Action"] -pub type COFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, COFOA_A, 2, O>; -impl<'a, const O: u8> COFOA_W<'a, O> { +pub type CofoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofoa, crate::Safe>; +impl<'a, REG> CofoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter overflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(COFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cofoa::None) } #[doc = "Toggle output on counter overflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(COFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cofoa::Toggle) } #[doc = "Clear output on counter overflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(COFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cofoa::Clear) } #[doc = "Set output on counter overflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(COFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cofoa::Set) } } -#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] -pub type CUFOA_R = crate::FieldReader; #[doc = "Counter Underflow Output Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CUFOA_A { +pub enum Cufoa { #[doc = "0: No action on counter underflow"] - NONE = 0, + None = 0, #[doc = "1: Toggle output on counter underflow"] - TOGGLE = 1, + Toggle = 1, #[doc = "2: Clear output on counter underflow"] - CLEAR = 2, + Clear = 2, #[doc = "3: Set output on counter underflow"] - SET = 3, + Set = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CUFOA_A) -> Self { + fn from(variant: Cufoa) -> Self { variant as _ } } -impl CUFOA_R { +impl crate::FieldSpec for Cufoa { + type Ux = u8; +} +impl crate::IsEnum for Cufoa {} +#[doc = "Field `CUFOA` reader - Counter Underflow Output Action"] +pub type CufoaR = crate::FieldReader; +impl CufoaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CUFOA_A { + pub const fn variant(&self) -> Cufoa { match self.bits { - 0 => CUFOA_A::NONE, - 1 => CUFOA_A::TOGGLE, - 2 => CUFOA_A::CLEAR, - 3 => CUFOA_A::SET, + 0 => Cufoa::None, + 1 => Cufoa::Toggle, + 2 => Cufoa::Clear, + 3 => Cufoa::Set, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on counter underflow"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == CUFOA_A::NONE + *self == Cufoa::None } - #[doc = "Checks if the value of the field is `TOGGLE`"] + #[doc = "Toggle output on counter underflow"] #[inline(always)] pub fn is_toggle(&self) -> bool { - *self == CUFOA_A::TOGGLE + *self == Cufoa::Toggle } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear output on counter underflow"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == CUFOA_A::CLEAR + *self == Cufoa::Clear } - #[doc = "Checks if the value of the field is `SET`"] + #[doc = "Set output on counter underflow"] #[inline(always)] pub fn is_set(&self) -> bool { - *self == CUFOA_A::SET + *self == Cufoa::Set } } #[doc = "Field `CUFOA` writer - Counter Underflow Output Action"] -pub type CUFOA_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, CUFOA_A, 2, O>; -impl<'a, const O: u8> CUFOA_W<'a, O> { +pub type CufoaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cufoa, crate::Safe>; +impl<'a, REG> CufoaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on counter underflow"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(CUFOA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Cufoa::None) } #[doc = "Toggle output on counter underflow"] #[inline(always)] - pub fn toggle(self) -> &'a mut W { - self.variant(CUFOA_A::TOGGLE) + pub fn toggle(self) -> &'a mut crate::W { + self.variant(Cufoa::Toggle) } #[doc = "Clear output on counter underflow"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(CUFOA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Cufoa::Clear) } #[doc = "Set output on counter underflow"] #[inline(always)] - pub fn set(self) -> &'a mut W { - self.variant(CUFOA_A::SET) + pub fn set_(self) -> &'a mut crate::W { + self.variant(Cufoa::Set) } } -#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] -pub type ICEDGE_R = crate::FieldReader; #[doc = "Input Capture Edge Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEDGE_A { +pub enum Icedge { #[doc = "0: Rising edges detected"] - RISING = 0, + Rising = 0, #[doc = "1: Falling edges detected"] - FALLING = 1, + Falling = 1, #[doc = "2: Both edges detected"] - BOTH = 2, + Both = 2, #[doc = "3: No edge detection, signal is left as it is"] - NONE = 3, + None = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEDGE_A) -> Self { + fn from(variant: Icedge) -> Self { variant as _ } } -impl ICEDGE_R { +impl crate::FieldSpec for Icedge { + type Ux = u8; +} +impl crate::IsEnum for Icedge {} +#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"] +pub type IcedgeR = crate::FieldReader; +impl IcedgeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEDGE_A { + pub const fn variant(&self) -> Icedge { match self.bits { - 0 => ICEDGE_A::RISING, - 1 => ICEDGE_A::FALLING, - 2 => ICEDGE_A::BOTH, - 3 => ICEDGE_A::NONE, + 0 => Icedge::Rising, + 1 => Icedge::Falling, + 2 => Icedge::Both, + 3 => Icedge::None, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "Rising edges detected"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEDGE_A::RISING + *self == Icedge::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "Falling edges detected"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEDGE_A::FALLING + *self == Icedge::Falling } - #[doc = "Checks if the value of the field is `BOTH`"] + #[doc = "Both edges detected"] #[inline(always)] pub fn is_both(&self) -> bool { - *self == ICEDGE_A::BOTH + *self == Icedge::Both } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No edge detection, signal is left as it is"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ICEDGE_A::NONE + *self == Icedge::None } } #[doc = "Field `ICEDGE` writer - Input Capture Edge Select"] -pub type ICEDGE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, ICEDGE_A, 2, O>; -impl<'a, const O: u8> ICEDGE_W<'a, O> { +pub type IcedgeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icedge, crate::Safe>; +impl<'a, REG> IcedgeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Rising edges detected"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEDGE_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icedge::Rising) } #[doc = "Falling edges detected"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEDGE_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icedge::Falling) } #[doc = "Both edges detected"] #[inline(always)] - pub fn both(self) -> &'a mut W { - self.variant(ICEDGE_A::BOTH) + pub fn both(self) -> &'a mut crate::W { + self.variant(Icedge::Both) } #[doc = "No edge detection, signal is left as it is"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ICEDGE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Icedge::None) } } -#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] -pub type ICEVCTRL_R = crate::FieldReader; #[doc = "Input Capture Event Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICEVCTRL_A { +pub enum Icevctrl { #[doc = "0: PRS output pulse and interrupt flag set on every capture"] - EVERYEDGE = 0, + Everyedge = 0, #[doc = "1: PRS output pulse and interrupt flag set on every second capture"] - EVERYSECONDEDGE = 1, + Everysecondedge = 1, #[doc = "2: PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] - RISING = 2, + Rising = 2, #[doc = "3: PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] - FALLING = 3, + Falling = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICEVCTRL_A) -> Self { + fn from(variant: Icevctrl) -> Self { variant as _ } } -impl ICEVCTRL_R { +impl crate::FieldSpec for Icevctrl { + type Ux = u8; +} +impl crate::IsEnum for Icevctrl {} +#[doc = "Field `ICEVCTRL` reader - Input Capture Event Control"] +pub type IcevctrlR = crate::FieldReader; +impl IcevctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICEVCTRL_A { + pub const fn variant(&self) -> Icevctrl { match self.bits { - 0 => ICEVCTRL_A::EVERYEDGE, - 1 => ICEVCTRL_A::EVERYSECONDEDGE, - 2 => ICEVCTRL_A::RISING, - 3 => ICEVCTRL_A::FALLING, + 0 => Icevctrl::Everyedge, + 1 => Icevctrl::Everysecondedge, + 2 => Icevctrl::Rising, + 3 => Icevctrl::Falling, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `EVERYEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] pub fn is_everyedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYEDGE + *self == Icevctrl::Everyedge } - #[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"] + #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] pub fn is_everysecondedge(&self) -> bool { - *self == ICEVCTRL_A::EVERYSECONDEDGE + *self == Icevctrl::Everysecondedge } - #[doc = "Checks if the value of the field is `RISING`"] + #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_rising(&self) -> bool { - *self == ICEVCTRL_A::RISING + *self == Icevctrl::Rising } - #[doc = "Checks if the value of the field is `FALLING`"] + #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] pub fn is_falling(&self) -> bool { - *self == ICEVCTRL_A::FALLING + *self == Icevctrl::Falling } } #[doc = "Field `ICEVCTRL` writer - Input Capture Event Control"] -pub type ICEVCTRL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CC2_CTRL_SPEC, u8, ICEVCTRL_A, 2, O>; -impl<'a, const O: u8> ICEVCTRL_W<'a, O> { +pub type IcevctrlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icevctrl, crate::Safe>; +impl<'a, REG> IcevctrlW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "PRS output pulse and interrupt flag set on every capture"] #[inline(always)] - pub fn everyedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYEDGE) + pub fn everyedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everyedge) } #[doc = "PRS output pulse and interrupt flag set on every second capture"] #[inline(always)] - pub fn everysecondedge(self) -> &'a mut W { - self.variant(ICEVCTRL_A::EVERYSECONDEDGE) + pub fn everysecondedge(self) -> &'a mut crate::W { + self.variant(Icevctrl::Everysecondedge) } #[doc = "PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn rising(self) -> &'a mut W { - self.variant(ICEVCTRL_A::RISING) + pub fn rising(self) -> &'a mut crate::W { + self.variant(Icevctrl::Rising) } #[doc = "PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)"] #[inline(always)] - pub fn falling(self) -> &'a mut W { - self.variant(ICEVCTRL_A::FALLING) + pub fn falling(self) -> &'a mut crate::W { + self.variant(Icevctrl::Falling) } } impl R { #[doc = "Bit 2 - Output Invert"] #[inline(always)] - pub fn outinv(&self) -> OUTINV_R { - OUTINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn outinv(&self) -> OutinvR { + OutinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] - pub fn cmoa(&self) -> CMOA_R { - CMOA_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmoa(&self) -> CmoaR { + CmoaR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] - pub fn cofoa(&self) -> COFOA_R { - COFOA_R::new(((self.bits >> 10) & 3) as u8) + pub fn cofoa(&self) -> CofoaR { + CofoaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] - pub fn cufoa(&self) -> CUFOA_R { - CUFOA_R::new(((self.bits >> 12) & 3) as u8) + pub fn cufoa(&self) -> CufoaR { + CufoaR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] - pub fn icedge(&self) -> ICEDGE_R { - ICEDGE_R::new(((self.bits >> 24) & 3) as u8) + pub fn icedge(&self) -> IcedgeR { + IcedgeR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] - pub fn icevctrl(&self) -> ICEVCTRL_R { - ICEVCTRL_R::new(((self.bits >> 26) & 3) as u8) + pub fn icevctrl(&self) -> IcevctrlR { + IcevctrlR::new(((self.bits >> 26) & 3) as u8) } } impl W { #[doc = "Bit 2 - Output Invert"] #[inline(always)] #[must_use] - pub fn outinv(&mut self) -> OUTINV_W<2> { - OUTINV_W::new(self) + pub fn outinv(&mut self) -> OutinvW { + OutinvW::new(self, 2) } #[doc = "Bits 8:9 - Compare Match Output Action"] #[inline(always)] #[must_use] - pub fn cmoa(&mut self) -> CMOA_W<8> { - CMOA_W::new(self) + pub fn cmoa(&mut self) -> CmoaW { + CmoaW::new(self, 8) } #[doc = "Bits 10:11 - Counter Overflow Output Action"] #[inline(always)] #[must_use] - pub fn cofoa(&mut self) -> COFOA_W<10> { - COFOA_W::new(self) + pub fn cofoa(&mut self) -> CofoaW { + CofoaW::new(self, 10) } #[doc = "Bits 12:13 - Counter Underflow Output Action"] #[inline(always)] #[must_use] - pub fn cufoa(&mut self) -> CUFOA_W<12> { - CUFOA_W::new(self) + pub fn cufoa(&mut self) -> CufoaW { + CufoaW::new(self, 12) } #[doc = "Bits 24:25 - Input Capture Edge Select"] #[inline(always)] #[must_use] - pub fn icedge(&mut self) -> ICEDGE_W<24> { - ICEDGE_W::new(self) + pub fn icedge(&mut self) -> IcedgeW { + IcedgeW::new(self, 24) } #[doc = "Bits 26:27 - Input Capture Event Control"] #[inline(always)] #[must_use] - pub fn icevctrl(&mut self) -> ICEVCTRL_W<26> { - ICEVCTRL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icevctrl(&mut self) -> IcevctrlW { + IcevctrlW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_ctrl](index.html) module"] -pub struct CC2_CTRL_SPEC; -impl crate::RegisterSpec for CC2_CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2CtrlSpec; +impl crate::RegisterSpec for Cc2CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_ctrl::R](R) reader structure"] -impl crate::Readable for CC2_CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_ctrl::W](W) writer structure"] -impl crate::Writable for CC2_CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_ctrl::R`](R) reader structure"] +impl crate::Readable for Cc2CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_ctrl::W`](W) writer structure"] +impl crate::Writable for Cc2CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_CTRL to value 0"] -impl crate::Resettable for CC2_CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc2_icf.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc2_icf.rs index 8282700..c1a0823 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc2_icf.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc2_icf.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC2_ICF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICF` reader - Input Capture FIFO"] -pub type ICF_R = crate::FieldReader; +pub type IcfR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO"] #[inline(always)] - pub fn icf(&self) -> ICF_R { - ICF_R::new((self.bits & 0xffff) as u16) + pub fn icf(&self) -> IcfR { + IcfR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_icf](index.html) module"] -pub struct CC2_ICF_SPEC; -impl crate::RegisterSpec for CC2_ICF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2IcfSpec; +impl crate::RegisterSpec for Cc2IcfSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_icf::R](R) reader structure"] -impl crate::Readable for CC2_ICF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc2_icf::R`](R) reader structure"] +impl crate::Readable for Cc2IcfSpec {} #[doc = "`reset()` method sets CC2_ICF to value 0"] -impl crate::Resettable for CC2_ICF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2IcfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc2_icof.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc2_icof.rs index c21d7d3..0d399d1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc2_icof.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc2_icof.rs @@ -1,37 +1,22 @@ #[doc = "Register `CC2_ICOF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `ICOF` reader - Input Capture FIFO Overflow"] -pub type ICOF_R = crate::FieldReader; +pub type IcofR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Input Capture FIFO Overflow"] #[inline(always)] - pub fn icof(&self) -> ICOF_R { - ICOF_R::new((self.bits & 0xffff) as u16) + pub fn icof(&self) -> IcofR { + IcofR::new((self.bits & 0xffff) as u16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_icof](index.html) module"] -pub struct CC2_ICOF_SPEC; -impl crate::RegisterSpec for CC2_ICOF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_icof::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2IcofSpec; +impl crate::RegisterSpec for Cc2IcofSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_icof::R](R) reader structure"] -impl crate::Readable for CC2_ICOF_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`cc2_icof::R`](R) reader structure"] +impl crate::Readable for Cc2IcofSpec {} #[doc = "`reset()` method sets CC2_ICOF to value 0"] -impl crate::Resettable for CC2_ICOF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2IcofSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc2_oc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc2_oc.rs index da9cc47..935617c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc2_oc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc2_oc.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC2_OC` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_OC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OC` reader - Output Compare Value"] -pub type OC_R = crate::FieldReader; +pub type OcR = crate::FieldReader; #[doc = "Field `OC` writer - Output Compare Value"] -pub type OC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC2_OC_SPEC, u16, u16, 16, O>; +pub type OcW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] - pub fn oc(&self) -> OC_R { - OC_R::new((self.bits & 0xffff) as u16) + pub fn oc(&self) -> OcR { + OcR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value"] #[inline(always)] #[must_use] - pub fn oc(&mut self) -> OC_W<0> { - OC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn oc(&mut self) -> OcW { + OcW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_oc](index.html) module"] -pub struct CC2_OC_SPEC; -impl crate::RegisterSpec for CC2_OC_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_oc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_oc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2OcSpec; +impl crate::RegisterSpec for Cc2OcSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_oc::R](R) reader structure"] -impl crate::Readable for CC2_OC_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_oc::W](W) writer structure"] -impl crate::Writable for CC2_OC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_oc::R`](R) reader structure"] +impl crate::Readable for Cc2OcSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_oc::W`](W) writer structure"] +impl crate::Writable for Cc2OcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_OC to value 0"] -impl crate::Resettable for CC2_OC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2OcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc2_ocb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc2_ocb.rs index 1ab93d6..ee6c4e5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc2_ocb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cc2_ocb.rs @@ -1,80 +1,40 @@ #[doc = "Register `CC2_OCB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CC2_OCB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OCB` reader - Output Compare Value Buffer"] -pub type OCB_R = crate::FieldReader; +pub type OcbR = crate::FieldReader; #[doc = "Field `OCB` writer - Output Compare Value Buffer"] -pub type OCB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC2_OCB_SPEC, u16, u16, 16, O>; +pub type OcbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] - pub fn ocb(&self) -> OCB_R { - OCB_R::new((self.bits & 0xffff) as u16) + pub fn ocb(&self) -> OcbR { + OcbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Output Compare Value Buffer"] #[inline(always)] #[must_use] - pub fn ocb(&mut self) -> OCB_W<0> { - OCB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ocb(&mut self) -> OcbW { + OcbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc2_ocb](index.html) module"] -pub struct CC2_OCB_SPEC; -impl crate::RegisterSpec for CC2_OCB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cc2_ocb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ocb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Cc2OcbSpec; +impl crate::RegisterSpec for Cc2OcbSpec { type Ux = u32; } -#[doc = "`read()` method returns [cc2_ocb::R](R) reader structure"] -impl crate::Readable for CC2_OCB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cc2_ocb::W](W) writer structure"] -impl crate::Writable for CC2_OCB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cc2_ocb::R`](R) reader structure"] +impl crate::Readable for Cc2OcbSpec {} +#[doc = "`write(|w| ..)` method takes [`cc2_ocb::W`](W) writer structure"] +impl crate::Writable for Cc2OcbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC2_OCB to value 0"] -impl crate::Resettable for CC2_OCB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Cc2OcbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cfg.rs index ea2a1e1..b4cc2fd 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cfg.rs @@ -1,775 +1,774 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `MODE` reader - Timer Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Timer Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Up-count mode"] - UP = 0, + Up = 0, #[doc = "1: Down-count mode"] - DOWN = 1, + Down = 1, #[doc = "2: Up/down-count mode"] - UPDOWN = 2, + Updown = 2, #[doc = "3: Quadrature decoder mode"] - QDEC = 3, + Qdec = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl MODE_R { +impl crate::FieldSpec for Mode { + type Ux = u8; +} +impl crate::IsEnum for Mode {} +#[doc = "Field `MODE` reader - Timer Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::UP, - 1 => MODE_A::DOWN, - 2 => MODE_A::UPDOWN, - 3 => MODE_A::QDEC, + 0 => Mode::Up, + 1 => Mode::Down, + 2 => Mode::Updown, + 3 => Mode::Qdec, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Up-count mode"] #[inline(always)] pub fn is_up(&self) -> bool { - *self == MODE_A::UP + *self == Mode::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Down-count mode"] #[inline(always)] pub fn is_down(&self) -> bool { - *self == MODE_A::DOWN + *self == Mode::Down } - #[doc = "Checks if the value of the field is `UPDOWN`"] + #[doc = "Up/down-count mode"] #[inline(always)] pub fn is_updown(&self) -> bool { - *self == MODE_A::UPDOWN + *self == Mode::Updown } - #[doc = "Checks if the value of the field is `QDEC`"] + #[doc = "Quadrature decoder mode"] #[inline(always)] pub fn is_qdec(&self) -> bool { - *self == MODE_A::QDEC + *self == Mode::Qdec } } #[doc = "Field `MODE` writer - Timer Mode"] -pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, MODE_A, 2, O>; -impl<'a, const O: u8> MODE_W<'a, O> { +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; +impl<'a, REG> ModeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Up-count mode"] #[inline(always)] - pub fn up(self) -> &'a mut W { - self.variant(MODE_A::UP) + pub fn up(self) -> &'a mut crate::W { + self.variant(Mode::Up) } #[doc = "Down-count mode"] #[inline(always)] - pub fn down(self) -> &'a mut W { - self.variant(MODE_A::DOWN) + pub fn down(self) -> &'a mut crate::W { + self.variant(Mode::Down) } #[doc = "Up/down-count mode"] #[inline(always)] - pub fn updown(self) -> &'a mut W { - self.variant(MODE_A::UPDOWN) + pub fn updown(self) -> &'a mut crate::W { + self.variant(Mode::Updown) } #[doc = "Quadrature decoder mode"] #[inline(always)] - pub fn qdec(self) -> &'a mut W { - self.variant(MODE_A::QDEC) + pub fn qdec(self) -> &'a mut crate::W { + self.variant(Mode::Qdec) } } -#[doc = "Field `SYNC` reader - Timer Start/Stop/Reload Synchronization"] -pub type SYNC_R = crate::BitReader; #[doc = "Timer Start/Stop/Reload Synchronization\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYNC_A { +pub enum Sync { #[doc = "0: Timer operation is unaffected by other timers."] - DISABLE = 0, + Disable = 0, #[doc = "1: Timer may be started, stopped and re-loaded from other timer instances."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYNC_A) -> Self { + fn from(variant: Sync) -> Self { variant as u8 != 0 } } -impl SYNC_R { +#[doc = "Field `SYNC` reader - Timer Start/Stop/Reload Synchronization"] +pub type SyncR = crate::BitReader; +impl SyncR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SYNC_A { + pub const fn variant(&self) -> Sync { match self.bits { - false => SYNC_A::DISABLE, - true => SYNC_A::ENABLE, + false => Sync::Disable, + true => Sync::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Timer operation is unaffected by other timers."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == SYNC_A::DISABLE + *self == Sync::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Timer may be started, stopped and re-loaded from other timer instances."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == SYNC_A::ENABLE + *self == Sync::Enable } } #[doc = "Field `SYNC` writer - Timer Start/Stop/Reload Synchronization"] -pub type SYNC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, SYNC_A, O>; -impl<'a, const O: u8> SYNC_W<'a, O> { +pub type SyncW<'a, REG> = crate::BitWriter<'a, REG, Sync>; +impl<'a, REG> SyncW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer operation is unaffected by other timers."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(SYNC_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Sync::Disable) } #[doc = "Timer may be started, stopped and re-loaded from other timer instances."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(SYNC_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Sync::Enable) } } #[doc = "Field `OSMEN` reader - One-shot Mode Enable"] -pub type OSMEN_R = crate::BitReader; +pub type OsmenR = crate::BitReader; #[doc = "Field `OSMEN` writer - One-shot Mode Enable"] -pub type OSMEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `QDM` reader - Quadrature Decoder Mode Selection"] -pub type QDM_R = crate::BitReader; +pub type OsmenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Quadrature Decoder Mode Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum QDM_A { +pub enum Qdm { #[doc = "0: X2 mode selected"] X2 = 0, #[doc = "1: X4 mode selected"] X4 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: QDM_A) -> Self { + fn from(variant: Qdm) -> Self { variant as u8 != 0 } } -impl QDM_R { +#[doc = "Field `QDM` reader - Quadrature Decoder Mode Selection"] +pub type QdmR = crate::BitReader; +impl QdmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> QDM_A { + pub const fn variant(&self) -> Qdm { match self.bits { - false => QDM_A::X2, - true => QDM_A::X4, + false => Qdm::X2, + true => Qdm::X4, } } - #[doc = "Checks if the value of the field is `X2`"] + #[doc = "X2 mode selected"] #[inline(always)] pub fn is_x2(&self) -> bool { - *self == QDM_A::X2 + *self == Qdm::X2 } - #[doc = "Checks if the value of the field is `X4`"] + #[doc = "X4 mode selected"] #[inline(always)] pub fn is_x4(&self) -> bool { - *self == QDM_A::X4 + *self == Qdm::X4 } } #[doc = "Field `QDM` writer - Quadrature Decoder Mode Selection"] -pub type QDM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, QDM_A, O>; -impl<'a, const O: u8> QDM_W<'a, O> { +pub type QdmW<'a, REG> = crate::BitWriter<'a, REG, Qdm>; +impl<'a, REG> QdmW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "X2 mode selected"] #[inline(always)] - pub fn x2(self) -> &'a mut W { - self.variant(QDM_A::X2) + pub fn x2(self) -> &'a mut crate::W { + self.variant(Qdm::X2) } #[doc = "X4 mode selected"] #[inline(always)] - pub fn x4(self) -> &'a mut W { - self.variant(QDM_A::X4) + pub fn x4(self) -> &'a mut crate::W { + self.variant(Qdm::X4) } } -#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] -pub type DEBUGRUN_R = crate::BitReader; #[doc = "Debug Mode Run Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DEBUGRUN_A { +pub enum Debugrun { #[doc = "0: Timer is halted in debug mode"] - HALT = 0, + Halt = 0, #[doc = "1: Timer is running in debug mode"] - RUN = 1, + Run = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DEBUGRUN_A) -> Self { + fn from(variant: Debugrun) -> Self { variant as u8 != 0 } } -impl DEBUGRUN_R { +#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"] +pub type DebugrunR = crate::BitReader; +impl DebugrunR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DEBUGRUN_A { + pub const fn variant(&self) -> Debugrun { match self.bits { - false => DEBUGRUN_A::HALT, - true => DEBUGRUN_A::RUN, + false => Debugrun::Halt, + true => Debugrun::Run, } } - #[doc = "Checks if the value of the field is `HALT`"] + #[doc = "Timer is halted in debug mode"] #[inline(always)] pub fn is_halt(&self) -> bool { - *self == DEBUGRUN_A::HALT + *self == Debugrun::Halt } - #[doc = "Checks if the value of the field is `RUN`"] + #[doc = "Timer is running in debug mode"] #[inline(always)] pub fn is_run(&self) -> bool { - *self == DEBUGRUN_A::RUN + *self == Debugrun::Run } } #[doc = "Field `DEBUGRUN` writer - Debug Mode Run Enable"] -pub type DEBUGRUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DEBUGRUN_A, O>; -impl<'a, const O: u8> DEBUGRUN_W<'a, O> { +pub type DebugrunW<'a, REG> = crate::BitWriter<'a, REG, Debugrun>; +impl<'a, REG> DebugrunW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer is halted in debug mode"] #[inline(always)] - pub fn halt(self) -> &'a mut W { - self.variant(DEBUGRUN_A::HALT) + pub fn halt(self) -> &'a mut crate::W { + self.variant(Debugrun::Halt) } #[doc = "Timer is running in debug mode"] #[inline(always)] - pub fn run(self) -> &'a mut W { - self.variant(DEBUGRUN_A::RUN) + pub fn run(self) -> &'a mut crate::W { + self.variant(Debugrun::Run) } } #[doc = "Field `DMACLRACT` reader - DMA Request Clear on Active"] -pub type DMACLRACT_R = crate::BitReader; +pub type DmaclractR = crate::BitReader; #[doc = "Field `DMACLRACT` writer - DMA Request Clear on Active"] -pub type DMACLRACT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `CLKSEL` reader - Clock Source Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type DmaclractW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Clock Source Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "0: Prescaled EM01GRPACLK"] - PRESCEM01GRPACLK = 0, + Prescem01grpaclk = 0, #[doc = "1: Compare/Capture Channel 1 Input"] - CC1 = 1, + Cc1 = 1, #[doc = "2: Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] - TIMEROUF = 2, + Timerouf = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl CLKSEL_R { +impl crate::FieldSpec for Clksel { + type Ux = u8; +} +impl crate::IsEnum for Clksel {} +#[doc = "Field `CLKSEL` reader - Clock Source Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKSEL_A::PRESCEM01GRPACLK), - 1 => Some(CLKSEL_A::CC1), - 2 => Some(CLKSEL_A::TIMEROUF), + 0 => Some(Clksel::Prescem01grpaclk), + 1 => Some(Clksel::Cc1), + 2 => Some(Clksel::Timerouf), _ => None, } } - #[doc = "Checks if the value of the field is `PRESCEM01GRPACLK`"] + #[doc = "Prescaled EM01GRPACLK"] #[inline(always)] pub fn is_prescem01grpaclk(&self) -> bool { - *self == CLKSEL_A::PRESCEM01GRPACLK + *self == Clksel::Prescem01grpaclk } - #[doc = "Checks if the value of the field is `CC1`"] + #[doc = "Compare/Capture Channel 1 Input"] #[inline(always)] pub fn is_cc1(&self) -> bool { - *self == CLKSEL_A::CC1 + *self == Clksel::Cc1 } - #[doc = "Checks if the value of the field is `TIMEROUF`"] + #[doc = "Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] #[inline(always)] pub fn is_timerouf(&self) -> bool { - *self == CLKSEL_A::TIMEROUF + *self == Clksel::Timerouf } } #[doc = "Field `CLKSEL` writer - Clock Source Select"] -pub type CLKSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, CLKSEL_A, 2, O>; -impl<'a, const O: u8> CLKSEL_W<'a, O> { +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel>; +impl<'a, REG> ClkselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Prescaled EM01GRPACLK"] #[inline(always)] - pub fn prescem01grpaclk(self) -> &'a mut W { - self.variant(CLKSEL_A::PRESCEM01GRPACLK) + pub fn prescem01grpaclk(self) -> &'a mut crate::W { + self.variant(Clksel::Prescem01grpaclk) } #[doc = "Compare/Capture Channel 1 Input"] #[inline(always)] - pub fn cc1(self) -> &'a mut W { - self.variant(CLKSEL_A::CC1) + pub fn cc1(self) -> &'a mut crate::W { + self.variant(Clksel::Cc1) } #[doc = "Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer"] #[inline(always)] - pub fn timerouf(self) -> &'a mut W { - self.variant(CLKSEL_A::TIMEROUF) + pub fn timerouf(self) -> &'a mut crate::W { + self.variant(Clksel::Timerouf) } } -#[doc = "Field `RETIMEEN` reader - PWM output retimed enable"] -pub type RETIMEEN_R = crate::BitReader; #[doc = "PWM output retimed enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RETIMEEN_A { +pub enum Retimeen { #[doc = "0: PWM outputs are not re-timed."] - DISABLE = 0, + Disable = 0, #[doc = "1: PWM outputs are re-timed."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RETIMEEN_A) -> Self { + fn from(variant: Retimeen) -> Self { variant as u8 != 0 } } -impl RETIMEEN_R { +#[doc = "Field `RETIMEEN` reader - PWM output retimed enable"] +pub type RetimeenR = crate::BitReader; +impl RetimeenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RETIMEEN_A { + pub const fn variant(&self) -> Retimeen { match self.bits { - false => RETIMEEN_A::DISABLE, - true => RETIMEEN_A::ENABLE, + false => Retimeen::Disable, + true => Retimeen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "PWM outputs are not re-timed."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RETIMEEN_A::DISABLE + *self == Retimeen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "PWM outputs are re-timed."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RETIMEEN_A::ENABLE + *self == Retimeen::Enable } } #[doc = "Field `RETIMEEN` writer - PWM output retimed enable"] -pub type RETIMEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, RETIMEEN_A, O>; -impl<'a, const O: u8> RETIMEEN_W<'a, O> { +pub type RetimeenW<'a, REG> = crate::BitWriter<'a, REG, Retimeen>; +impl<'a, REG> RetimeenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "PWM outputs are not re-timed."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RETIMEEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Retimeen::Disable) } #[doc = "PWM outputs are re-timed."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RETIMEEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Retimeen::Enable) } } -#[doc = "Field `DISSYNCOUT` reader - Disable Timer Start/Stop/Reload output"] -pub type DISSYNCOUT_R = crate::BitReader; #[doc = "Disable Timer Start/Stop/Reload output\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DISSYNCOUT_A { +pub enum Dissyncout { #[doc = "0: Timer can start/stop/reload other timers with SYNC bit set"] - EN = 0, + En = 0, #[doc = "1: Timer cannot start/stop/reload other timers with SYNC bit set"] - DIS = 1, + Dis = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DISSYNCOUT_A) -> Self { + fn from(variant: Dissyncout) -> Self { variant as u8 != 0 } } -impl DISSYNCOUT_R { +#[doc = "Field `DISSYNCOUT` reader - Disable Timer Start/Stop/Reload output"] +pub type DissyncoutR = crate::BitReader; +impl DissyncoutR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DISSYNCOUT_A { + pub const fn variant(&self) -> Dissyncout { match self.bits { - false => DISSYNCOUT_A::EN, - true => DISSYNCOUT_A::DIS, + false => Dissyncout::En, + true => Dissyncout::Dis, } } - #[doc = "Checks if the value of the field is `EN`"] + #[doc = "Timer can start/stop/reload other timers with SYNC bit set"] #[inline(always)] pub fn is_en(&self) -> bool { - *self == DISSYNCOUT_A::EN + *self == Dissyncout::En } - #[doc = "Checks if the value of the field is `DIS`"] + #[doc = "Timer cannot start/stop/reload other timers with SYNC bit set"] #[inline(always)] pub fn is_dis(&self) -> bool { - *self == DISSYNCOUT_A::DIS + *self == Dissyncout::Dis } } #[doc = "Field `DISSYNCOUT` writer - Disable Timer Start/Stop/Reload output"] -pub type DISSYNCOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DISSYNCOUT_A, O>; -impl<'a, const O: u8> DISSYNCOUT_W<'a, O> { +pub type DissyncoutW<'a, REG> = crate::BitWriter<'a, REG, Dissyncout>; +impl<'a, REG> DissyncoutW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Timer can start/stop/reload other timers with SYNC bit set"] #[inline(always)] - pub fn en(self) -> &'a mut W { - self.variant(DISSYNCOUT_A::EN) + pub fn en(self) -> &'a mut crate::W { + self.variant(Dissyncout::En) } #[doc = "Timer cannot start/stop/reload other timers with SYNC bit set"] #[inline(always)] - pub fn dis(self) -> &'a mut W { - self.variant(DISSYNCOUT_A::DIS) + pub fn dis(self) -> &'a mut crate::W { + self.variant(Dissyncout::Dis) } } #[doc = "Field `ATI` reader - Always Track Inputs"] -pub type ATI_R = crate::BitReader; +pub type AtiR = crate::BitReader; #[doc = "Field `ATI` writer - Always Track Inputs"] -pub type ATI_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type AtiW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RSSCOIST` reader - Reload-Start Sets COIST"] -pub type RSSCOIST_R = crate::BitReader; +pub type RsscoistR = crate::BitReader; #[doc = "Field `RSSCOIST` writer - Reload-Start Sets COIST"] -pub type RSSCOIST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `PRESC` reader - Prescaler Setting"] -pub type PRESC_R = crate::FieldReader; +pub type RsscoistW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Prescaler Setting\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum PRESC_A { +pub enum Presc { #[doc = "0: No prescaling"] - DIV1 = 0, + Div1 = 0, #[doc = "1: Prescale by 2"] - DIV2 = 1, + Div2 = 1, #[doc = "3: Prescale by 4"] - DIV4 = 3, + Div4 = 3, #[doc = "7: Prescale by 8"] - DIV8 = 7, + Div8 = 7, #[doc = "15: Prescale by 16"] - DIV16 = 15, + Div16 = 15, #[doc = "31: Prescale by 32"] - DIV32 = 31, + Div32 = 31, #[doc = "63: Prescale by 64"] - DIV64 = 63, + Div64 = 63, #[doc = "127: Prescale by 128"] - DIV128 = 127, + Div128 = 127, #[doc = "255: Prescale by 256"] - DIV256 = 255, + Div256 = 255, #[doc = "511: Prescale by 512"] - DIV512 = 511, + Div512 = 511, #[doc = "1023: Prescale by 1024"] - DIV1024 = 1023, + Div1024 = 1023, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: PRESC_A) -> Self { + fn from(variant: Presc) -> Self { variant as _ } } -impl PRESC_R { +impl crate::FieldSpec for Presc { + type Ux = u16; +} +impl crate::IsEnum for Presc {} +#[doc = "Field `PRESC` reader - Prescaler Setting"] +pub type PrescR = crate::FieldReader; +impl PrescR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PRESC_A::DIV1), - 1 => Some(PRESC_A::DIV2), - 3 => Some(PRESC_A::DIV4), - 7 => Some(PRESC_A::DIV8), - 15 => Some(PRESC_A::DIV16), - 31 => Some(PRESC_A::DIV32), - 63 => Some(PRESC_A::DIV64), - 127 => Some(PRESC_A::DIV128), - 255 => Some(PRESC_A::DIV256), - 511 => Some(PRESC_A::DIV512), - 1023 => Some(PRESC_A::DIV1024), + 0 => Some(Presc::Div1), + 1 => Some(Presc::Div2), + 3 => Some(Presc::Div4), + 7 => Some(Presc::Div8), + 15 => Some(Presc::Div16), + 31 => Some(Presc::Div32), + 63 => Some(Presc::Div64), + 127 => Some(Presc::Div128), + 255 => Some(Presc::Div256), + 511 => Some(Presc::Div512), + 1023 => Some(Presc::Div1024), _ => None, } } - #[doc = "Checks if the value of the field is `DIV1`"] + #[doc = "No prescaling"] #[inline(always)] pub fn is_div1(&self) -> bool { - *self == PRESC_A::DIV1 + *self == Presc::Div1 } - #[doc = "Checks if the value of the field is `DIV2`"] + #[doc = "Prescale by 2"] #[inline(always)] pub fn is_div2(&self) -> bool { - *self == PRESC_A::DIV2 + *self == Presc::Div2 } - #[doc = "Checks if the value of the field is `DIV4`"] + #[doc = "Prescale by 4"] #[inline(always)] pub fn is_div4(&self) -> bool { - *self == PRESC_A::DIV4 + *self == Presc::Div4 } - #[doc = "Checks if the value of the field is `DIV8`"] + #[doc = "Prescale by 8"] #[inline(always)] pub fn is_div8(&self) -> bool { - *self == PRESC_A::DIV8 + *self == Presc::Div8 } - #[doc = "Checks if the value of the field is `DIV16`"] + #[doc = "Prescale by 16"] #[inline(always)] pub fn is_div16(&self) -> bool { - *self == PRESC_A::DIV16 + *self == Presc::Div16 } - #[doc = "Checks if the value of the field is `DIV32`"] + #[doc = "Prescale by 32"] #[inline(always)] pub fn is_div32(&self) -> bool { - *self == PRESC_A::DIV32 + *self == Presc::Div32 } - #[doc = "Checks if the value of the field is `DIV64`"] + #[doc = "Prescale by 64"] #[inline(always)] pub fn is_div64(&self) -> bool { - *self == PRESC_A::DIV64 + *self == Presc::Div64 } - #[doc = "Checks if the value of the field is `DIV128`"] + #[doc = "Prescale by 128"] #[inline(always)] pub fn is_div128(&self) -> bool { - *self == PRESC_A::DIV128 + *self == Presc::Div128 } - #[doc = "Checks if the value of the field is `DIV256`"] + #[doc = "Prescale by 256"] #[inline(always)] pub fn is_div256(&self) -> bool { - *self == PRESC_A::DIV256 + *self == Presc::Div256 } - #[doc = "Checks if the value of the field is `DIV512`"] + #[doc = "Prescale by 512"] #[inline(always)] pub fn is_div512(&self) -> bool { - *self == PRESC_A::DIV512 + *self == Presc::Div512 } - #[doc = "Checks if the value of the field is `DIV1024`"] + #[doc = "Prescale by 1024"] #[inline(always)] pub fn is_div1024(&self) -> bool { - *self == PRESC_A::DIV1024 + *self == Presc::Div1024 } } #[doc = "Field `PRESC` writer - Prescaler Setting"] -pub type PRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u16, PRESC_A, 10, O>; -impl<'a, const O: u8> PRESC_W<'a, O> { +pub type PrescW<'a, REG> = crate::FieldWriter<'a, REG, 10, Presc>; +impl<'a, REG> PrescW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No prescaling"] #[inline(always)] - pub fn div1(self) -> &'a mut W { - self.variant(PRESC_A::DIV1) + pub fn div1(self) -> &'a mut crate::W { + self.variant(Presc::Div1) } #[doc = "Prescale by 2"] #[inline(always)] - pub fn div2(self) -> &'a mut W { - self.variant(PRESC_A::DIV2) + pub fn div2(self) -> &'a mut crate::W { + self.variant(Presc::Div2) } #[doc = "Prescale by 4"] #[inline(always)] - pub fn div4(self) -> &'a mut W { - self.variant(PRESC_A::DIV4) + pub fn div4(self) -> &'a mut crate::W { + self.variant(Presc::Div4) } #[doc = "Prescale by 8"] #[inline(always)] - pub fn div8(self) -> &'a mut W { - self.variant(PRESC_A::DIV8) + pub fn div8(self) -> &'a mut crate::W { + self.variant(Presc::Div8) } #[doc = "Prescale by 16"] #[inline(always)] - pub fn div16(self) -> &'a mut W { - self.variant(PRESC_A::DIV16) + pub fn div16(self) -> &'a mut crate::W { + self.variant(Presc::Div16) } #[doc = "Prescale by 32"] #[inline(always)] - pub fn div32(self) -> &'a mut W { - self.variant(PRESC_A::DIV32) + pub fn div32(self) -> &'a mut crate::W { + self.variant(Presc::Div32) } #[doc = "Prescale by 64"] #[inline(always)] - pub fn div64(self) -> &'a mut W { - self.variant(PRESC_A::DIV64) + pub fn div64(self) -> &'a mut crate::W { + self.variant(Presc::Div64) } #[doc = "Prescale by 128"] #[inline(always)] - pub fn div128(self) -> &'a mut W { - self.variant(PRESC_A::DIV128) + pub fn div128(self) -> &'a mut crate::W { + self.variant(Presc::Div128) } #[doc = "Prescale by 256"] #[inline(always)] - pub fn div256(self) -> &'a mut W { - self.variant(PRESC_A::DIV256) + pub fn div256(self) -> &'a mut crate::W { + self.variant(Presc::Div256) } #[doc = "Prescale by 512"] #[inline(always)] - pub fn div512(self) -> &'a mut W { - self.variant(PRESC_A::DIV512) + pub fn div512(self) -> &'a mut crate::W { + self.variant(Presc::Div512) } #[doc = "Prescale by 1024"] #[inline(always)] - pub fn div1024(self) -> &'a mut W { - self.variant(PRESC_A::DIV1024) + pub fn div1024(self) -> &'a mut crate::W { + self.variant(Presc::Div1024) } } impl R { #[doc = "Bits 0:1 - Timer Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Timer Start/Stop/Reload Synchronization"] #[inline(always)] - pub fn sync(&self) -> SYNC_R { - SYNC_R::new(((self.bits >> 3) & 1) != 0) + pub fn sync(&self) -> SyncR { + SyncR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - One-shot Mode Enable"] #[inline(always)] - pub fn osmen(&self) -> OSMEN_R { - OSMEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn osmen(&self) -> OsmenR { + OsmenR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Quadrature Decoder Mode Selection"] #[inline(always)] - pub fn qdm(&self) -> QDM_R { - QDM_R::new(((self.bits >> 5) & 1) != 0) + pub fn qdm(&self) -> QdmR { + QdmR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Debug Mode Run Enable"] #[inline(always)] - pub fn debugrun(&self) -> DEBUGRUN_R { - DEBUGRUN_R::new(((self.bits >> 6) & 1) != 0) + pub fn debugrun(&self) -> DebugrunR { + DebugrunR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - DMA Request Clear on Active"] #[inline(always)] - pub fn dmaclract(&self) -> DMACLRACT_R { - DMACLRACT_R::new(((self.bits >> 7) & 1) != 0) + pub fn dmaclract(&self) -> DmaclractR { + DmaclractR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:9 - Clock Source Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 10 - PWM output retimed enable"] #[inline(always)] - pub fn retimeen(&self) -> RETIMEEN_R { - RETIMEEN_R::new(((self.bits >> 10) & 1) != 0) + pub fn retimeen(&self) -> RetimeenR { + RetimeenR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Disable Timer Start/Stop/Reload output"] #[inline(always)] - pub fn dissyncout(&self) -> DISSYNCOUT_R { - DISSYNCOUT_R::new(((self.bits >> 11) & 1) != 0) + pub fn dissyncout(&self) -> DissyncoutR { + DissyncoutR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 16 - Always Track Inputs"] #[inline(always)] - pub fn ati(&self) -> ATI_R { - ATI_R::new(((self.bits >> 16) & 1) != 0) + pub fn ati(&self) -> AtiR { + AtiR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Reload-Start Sets COIST"] #[inline(always)] - pub fn rsscoist(&self) -> RSSCOIST_R { - RSSCOIST_R::new(((self.bits >> 17) & 1) != 0) + pub fn rsscoist(&self) -> RsscoistR { + RsscoistR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:27 - Prescaler Setting"] #[inline(always)] - pub fn presc(&self) -> PRESC_R { - PRESC_R::new(((self.bits >> 18) & 0x03ff) as u16) + pub fn presc(&self) -> PrescR { + PrescR::new(((self.bits >> 18) & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:1 - Timer Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W<0> { - MODE_W::new(self) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bit 3 - Timer Start/Stop/Reload Synchronization"] #[inline(always)] #[must_use] - pub fn sync(&mut self) -> SYNC_W<3> { - SYNC_W::new(self) + pub fn sync(&mut self) -> SyncW { + SyncW::new(self, 3) } #[doc = "Bit 4 - One-shot Mode Enable"] #[inline(always)] #[must_use] - pub fn osmen(&mut self) -> OSMEN_W<4> { - OSMEN_W::new(self) + pub fn osmen(&mut self) -> OsmenW { + OsmenW::new(self, 4) } #[doc = "Bit 5 - Quadrature Decoder Mode Selection"] #[inline(always)] #[must_use] - pub fn qdm(&mut self) -> QDM_W<5> { - QDM_W::new(self) + pub fn qdm(&mut self) -> QdmW { + QdmW::new(self, 5) } #[doc = "Bit 6 - Debug Mode Run Enable"] #[inline(always)] #[must_use] - pub fn debugrun(&mut self) -> DEBUGRUN_W<6> { - DEBUGRUN_W::new(self) + pub fn debugrun(&mut self) -> DebugrunW { + DebugrunW::new(self, 6) } #[doc = "Bit 7 - DMA Request Clear on Active"] #[inline(always)] #[must_use] - pub fn dmaclract(&mut self) -> DMACLRACT_W<7> { - DMACLRACT_W::new(self) + pub fn dmaclract(&mut self) -> DmaclractW { + DmaclractW::new(self, 7) } #[doc = "Bits 8:9 - Clock Source Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W<8> { - CLKSEL_W::new(self) + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 8) } #[doc = "Bit 10 - PWM output retimed enable"] #[inline(always)] #[must_use] - pub fn retimeen(&mut self) -> RETIMEEN_W<10> { - RETIMEEN_W::new(self) + pub fn retimeen(&mut self) -> RetimeenW { + RetimeenW::new(self, 10) } #[doc = "Bit 11 - Disable Timer Start/Stop/Reload output"] #[inline(always)] #[must_use] - pub fn dissyncout(&mut self) -> DISSYNCOUT_W<11> { - DISSYNCOUT_W::new(self) + pub fn dissyncout(&mut self) -> DissyncoutW { + DissyncoutW::new(self, 11) } #[doc = "Bit 16 - Always Track Inputs"] #[inline(always)] #[must_use] - pub fn ati(&mut self) -> ATI_W<16> { - ATI_W::new(self) + pub fn ati(&mut self) -> AtiW { + AtiW::new(self, 16) } #[doc = "Bit 17 - Reload-Start Sets COIST"] #[inline(always)] #[must_use] - pub fn rsscoist(&mut self) -> RSSCOIST_W<17> { - RSSCOIST_W::new(self) + pub fn rsscoist(&mut self) -> RsscoistW { + RsscoistW::new(self, 17) } #[doc = "Bits 18:27 - Prescaler Setting"] #[inline(always)] #[must_use] - pub fn presc(&mut self) -> PRESC_W<18> { - PRESC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn presc(&mut self) -> PrescW { + PrescW::new(self, 18) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cmd.rs index ca6d3b1..bf41157 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cmd.rs @@ -1,60 +1,35 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `START` writer - Start Timer"] -pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STOP` writer - Stop Timer"] -pub type STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type StopW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Start Timer"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W<0> { - START_W::new(self) + pub fn start(&mut self) -> StartW { + StartW::new(self, 0) } #[doc = "Bit 1 - Stop Timer"] #[inline(always)] #[must_use] - pub fn stop(&mut self) -> STOP_W<1> { - STOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stop(&mut self) -> StopW { + StopW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cnt.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cnt.rs index dd37661..c870fc9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cnt.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/cnt.rs @@ -1,80 +1,40 @@ #[doc = "Register `CNT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CNT` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CNT` reader - Counter Value"] -pub type CNT_R = crate::FieldReader; +pub type CntR = crate::FieldReader; #[doc = "Field `CNT` writer - Counter Value"] -pub type CNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CNT_SPEC, u16, u16, 16, O>; +pub type CntW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Value"] #[inline(always)] - pub fn cnt(&self) -> CNT_R { - CNT_R::new((self.bits & 0xffff) as u16) + pub fn cnt(&self) -> CntR { + CntR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Value"] #[inline(always)] #[must_use] - pub fn cnt(&mut self) -> CNT_W<0> { - CNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cnt(&mut self) -> CntW { + CntW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](index.html) module"] -pub struct CNT_SPEC; -impl crate::RegisterSpec for CNT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CntSpec; +impl crate::RegisterSpec for CntSpec { type Ux = u32; } -#[doc = "`read()` method returns [cnt::R](R) reader structure"] -impl crate::Readable for CNT_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cnt::W](W) writer structure"] -impl crate::Writable for CNT_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cnt::R`](R) reader structure"] +impl crate::Readable for CntSpec {} +#[doc = "`write(|w| ..)` method takes [`cnt::W`](W) writer structure"] +impl crate::Writable for CntSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CNT to value 0"] -impl crate::Resettable for CNT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CntSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/ctrl.rs index 08e646b..e2ed153 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/ctrl.rs @@ -1,258 +1,234 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `RISEA` reader - Timer Rising Input Edge Action"] -pub type RISEA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Timer Rising Input Edge Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RISEA_A { +pub enum Risea { #[doc = "0: No action"] - NONE = 0, + None = 0, #[doc = "1: Start counter without reload"] - START = 1, + Start = 1, #[doc = "2: Stop counter without reload"] - STOP = 2, + Stop = 2, #[doc = "3: Reload and start counter"] - RELOADSTART = 3, + Reloadstart = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RISEA_A) -> Self { + fn from(variant: Risea) -> Self { variant as _ } } -impl RISEA_R { +impl crate::FieldSpec for Risea { + type Ux = u8; +} +impl crate::IsEnum for Risea {} +#[doc = "Field `RISEA` reader - Timer Rising Input Edge Action"] +pub type RiseaR = crate::FieldReader; +impl RiseaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RISEA_A { + pub const fn variant(&self) -> Risea { match self.bits { - 0 => RISEA_A::NONE, - 1 => RISEA_A::START, - 2 => RISEA_A::STOP, - 3 => RISEA_A::RELOADSTART, + 0 => Risea::None, + 1 => Risea::Start, + 2 => Risea::Stop, + 3 => Risea::Reloadstart, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == RISEA_A::NONE + *self == Risea::None } - #[doc = "Checks if the value of the field is `START`"] + #[doc = "Start counter without reload"] #[inline(always)] pub fn is_start(&self) -> bool { - *self == RISEA_A::START + *self == Risea::Start } - #[doc = "Checks if the value of the field is `STOP`"] + #[doc = "Stop counter without reload"] #[inline(always)] pub fn is_stop(&self) -> bool { - *self == RISEA_A::STOP + *self == Risea::Stop } - #[doc = "Checks if the value of the field is `RELOADSTART`"] + #[doc = "Reload and start counter"] #[inline(always)] pub fn is_reloadstart(&self) -> bool { - *self == RISEA_A::RELOADSTART + *self == Risea::Reloadstart } } #[doc = "Field `RISEA` writer - Timer Rising Input Edge Action"] -pub type RISEA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, RISEA_A, 2, O>; -impl<'a, const O: u8> RISEA_W<'a, O> { +pub type RiseaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Risea, crate::Safe>; +impl<'a, REG> RiseaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(RISEA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Risea::None) } #[doc = "Start counter without reload"] #[inline(always)] - pub fn start(self) -> &'a mut W { - self.variant(RISEA_A::START) + pub fn start(self) -> &'a mut crate::W { + self.variant(Risea::Start) } #[doc = "Stop counter without reload"] #[inline(always)] - pub fn stop(self) -> &'a mut W { - self.variant(RISEA_A::STOP) + pub fn stop(self) -> &'a mut crate::W { + self.variant(Risea::Stop) } #[doc = "Reload and start counter"] #[inline(always)] - pub fn reloadstart(self) -> &'a mut W { - self.variant(RISEA_A::RELOADSTART) + pub fn reloadstart(self) -> &'a mut crate::W { + self.variant(Risea::Reloadstart) } } -#[doc = "Field `FALLA` reader - Timer Falling Input Edge Action"] -pub type FALLA_R = crate::FieldReader; #[doc = "Timer Falling Input Edge Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FALLA_A { +pub enum Falla { #[doc = "0: No action"] - NONE = 0, + None = 0, #[doc = "1: Start counter without reload"] - START = 1, + Start = 1, #[doc = "2: Stop counter without reload"] - STOP = 2, + Stop = 2, #[doc = "3: Reload and start counter"] - RELOADSTART = 3, + Reloadstart = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FALLA_A) -> Self { + fn from(variant: Falla) -> Self { variant as _ } } -impl FALLA_R { +impl crate::FieldSpec for Falla { + type Ux = u8; +} +impl crate::IsEnum for Falla {} +#[doc = "Field `FALLA` reader - Timer Falling Input Edge Action"] +pub type FallaR = crate::FieldReader; +impl FallaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FALLA_A { + pub const fn variant(&self) -> Falla { match self.bits { - 0 => FALLA_A::NONE, - 1 => FALLA_A::START, - 2 => FALLA_A::STOP, - 3 => FALLA_A::RELOADSTART, + 0 => Falla::None, + 1 => Falla::Start, + 2 => Falla::Stop, + 3 => Falla::Reloadstart, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == FALLA_A::NONE + *self == Falla::None } - #[doc = "Checks if the value of the field is `START`"] + #[doc = "Start counter without reload"] #[inline(always)] pub fn is_start(&self) -> bool { - *self == FALLA_A::START + *self == Falla::Start } - #[doc = "Checks if the value of the field is `STOP`"] + #[doc = "Stop counter without reload"] #[inline(always)] pub fn is_stop(&self) -> bool { - *self == FALLA_A::STOP + *self == Falla::Stop } - #[doc = "Checks if the value of the field is `RELOADSTART`"] + #[doc = "Reload and start counter"] #[inline(always)] pub fn is_reloadstart(&self) -> bool { - *self == FALLA_A::RELOADSTART + *self == Falla::Reloadstart } } #[doc = "Field `FALLA` writer - Timer Falling Input Edge Action"] -pub type FALLA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, FALLA_A, 2, O>; -impl<'a, const O: u8> FALLA_W<'a, O> { +pub type FallaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Falla, crate::Safe>; +impl<'a, REG> FallaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(FALLA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Falla::None) } #[doc = "Start counter without reload"] #[inline(always)] - pub fn start(self) -> &'a mut W { - self.variant(FALLA_A::START) + pub fn start(self) -> &'a mut crate::W { + self.variant(Falla::Start) } #[doc = "Stop counter without reload"] #[inline(always)] - pub fn stop(self) -> &'a mut W { - self.variant(FALLA_A::STOP) + pub fn stop(self) -> &'a mut crate::W { + self.variant(Falla::Stop) } #[doc = "Reload and start counter"] #[inline(always)] - pub fn reloadstart(self) -> &'a mut W { - self.variant(FALLA_A::RELOADSTART) + pub fn reloadstart(self) -> &'a mut crate::W { + self.variant(Falla::Reloadstart) } } #[doc = "Field `X2CNT` reader - 2x Count Mode"] -pub type X2CNT_R = crate::BitReader; +pub type X2cntR = crate::BitReader; #[doc = "Field `X2CNT` writer - 2x Count Mode"] -pub type X2CNT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type X2cntW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - Timer Rising Input Edge Action"] #[inline(always)] - pub fn risea(&self) -> RISEA_R { - RISEA_R::new((self.bits & 3) as u8) + pub fn risea(&self) -> RiseaR { + RiseaR::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Timer Falling Input Edge Action"] #[inline(always)] - pub fn falla(&self) -> FALLA_R { - FALLA_R::new(((self.bits >> 2) & 3) as u8) + pub fn falla(&self) -> FallaR { + FallaR::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bit 4 - 2x Count Mode"] #[inline(always)] - pub fn x2cnt(&self) -> X2CNT_R { - X2CNT_R::new(((self.bits >> 4) & 1) != 0) + pub fn x2cnt(&self) -> X2cntR { + X2cntR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Timer Rising Input Edge Action"] #[inline(always)] #[must_use] - pub fn risea(&mut self) -> RISEA_W<0> { - RISEA_W::new(self) + pub fn risea(&mut self) -> RiseaW { + RiseaW::new(self, 0) } #[doc = "Bits 2:3 - Timer Falling Input Edge Action"] #[inline(always)] #[must_use] - pub fn falla(&mut self) -> FALLA_W<2> { - FALLA_W::new(self) + pub fn falla(&mut self) -> FallaW { + FallaW::new(self, 2) } #[doc = "Bit 4 - 2x Count Mode"] #[inline(always)] #[must_use] - pub fn x2cnt(&mut self) -> X2CNT_W<4> { - X2CNT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn x2cnt(&mut self) -> X2cntW { + X2cntW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtcfg.rs index d19a9a3..82b97e1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtcfg.rs @@ -1,186 +1,149 @@ #[doc = "Register `DTCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTEN` reader - DTI Enable"] -pub type DTEN_R = crate::BitReader; +pub type DtenR = crate::BitReader; #[doc = "Field `DTEN` writer - DTI Enable"] -pub type DTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; -#[doc = "Field `DTDAS` reader - DTI Automatic Start-up Functionality"] -pub type DTDAS_R = crate::BitReader; +pub type DtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "DTI Automatic Start-up Functionality\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DTDAS_A { +pub enum Dtdas { #[doc = "0: No DTI restart on debugger exit"] - NORESTART = 0, + Norestart = 0, #[doc = "1: DTI restart on debugger exit"] - RESTART = 1, + Restart = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DTDAS_A) -> Self { + fn from(variant: Dtdas) -> Self { variant as u8 != 0 } } -impl DTDAS_R { +#[doc = "Field `DTDAS` reader - DTI Automatic Start-up Functionality"] +pub type DtdasR = crate::BitReader; +impl DtdasR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTDAS_A { + pub const fn variant(&self) -> Dtdas { match self.bits { - false => DTDAS_A::NORESTART, - true => DTDAS_A::RESTART, + false => Dtdas::Norestart, + true => Dtdas::Restart, } } - #[doc = "Checks if the value of the field is `NORESTART`"] + #[doc = "No DTI restart on debugger exit"] #[inline(always)] pub fn is_norestart(&self) -> bool { - *self == DTDAS_A::NORESTART + *self == Dtdas::Norestart } - #[doc = "Checks if the value of the field is `RESTART`"] + #[doc = "DTI restart on debugger exit"] #[inline(always)] pub fn is_restart(&self) -> bool { - *self == DTDAS_A::RESTART + *self == Dtdas::Restart } } #[doc = "Field `DTDAS` writer - DTI Automatic Start-up Functionality"] -pub type DTDAS_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, DTDAS_A, O>; -impl<'a, const O: u8> DTDAS_W<'a, O> { +pub type DtdasW<'a, REG> = crate::BitWriter<'a, REG, Dtdas>; +impl<'a, REG> DtdasW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No DTI restart on debugger exit"] #[inline(always)] - pub fn norestart(self) -> &'a mut W { - self.variant(DTDAS_A::NORESTART) + pub fn norestart(self) -> &'a mut crate::W { + self.variant(Dtdas::Norestart) } #[doc = "DTI restart on debugger exit"] #[inline(always)] - pub fn restart(self) -> &'a mut W { - self.variant(DTDAS_A::RESTART) + pub fn restart(self) -> &'a mut crate::W { + self.variant(Dtdas::Restart) } } #[doc = "Field `DTAR` reader - DTI Always Run"] -pub type DTAR_R = crate::BitReader; +pub type DtarR = crate::BitReader; #[doc = "Field `DTAR` writer - DTI Always Run"] -pub type DTAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtarW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTFATS` reader - DTI Fault Action on Timer Stop"] -pub type DTFATS_R = crate::BitReader; +pub type DtfatsR = crate::BitReader; #[doc = "Field `DTFATS` writer - DTI Fault Action on Timer Stop"] -pub type DTFATS_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtfatsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRSEN` reader - DTI PRS Source Enable"] -pub type DTPRSEN_R = crate::BitReader; +pub type DtprsenR = crate::BitReader; #[doc = "Field `DTPRSEN` writer - DTI PRS Source Enable"] -pub type DTPRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCFG_SPEC, bool, O>; +pub type DtprsenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI Enable"] #[inline(always)] - pub fn dten(&self) -> DTEN_R { - DTEN_R::new((self.bits & 1) != 0) + pub fn dten(&self) -> DtenR { + DtenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI Automatic Start-up Functionality"] #[inline(always)] - pub fn dtdas(&self) -> DTDAS_R { - DTDAS_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtdas(&self) -> DtdasR { + DtdasR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 9 - DTI Always Run"] #[inline(always)] - pub fn dtar(&self) -> DTAR_R { - DTAR_R::new(((self.bits >> 9) & 1) != 0) + pub fn dtar(&self) -> DtarR { + DtarR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - DTI Fault Action on Timer Stop"] #[inline(always)] - pub fn dtfats(&self) -> DTFATS_R { - DTFATS_R::new(((self.bits >> 10) & 1) != 0) + pub fn dtfats(&self) -> DtfatsR { + DtfatsR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - DTI PRS Source Enable"] #[inline(always)] - pub fn dtprsen(&self) -> DTPRSEN_R { - DTPRSEN_R::new(((self.bits >> 11) & 1) != 0) + pub fn dtprsen(&self) -> DtprsenR { + DtprsenR::new(((self.bits >> 11) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI Enable"] #[inline(always)] #[must_use] - pub fn dten(&mut self) -> DTEN_W<0> { - DTEN_W::new(self) + pub fn dten(&mut self) -> DtenW { + DtenW::new(self, 0) } #[doc = "Bit 1 - DTI Automatic Start-up Functionality"] #[inline(always)] #[must_use] - pub fn dtdas(&mut self) -> DTDAS_W<1> { - DTDAS_W::new(self) + pub fn dtdas(&mut self) -> DtdasW { + DtdasW::new(self, 1) } #[doc = "Bit 9 - DTI Always Run"] #[inline(always)] #[must_use] - pub fn dtar(&mut self) -> DTAR_W<9> { - DTAR_W::new(self) + pub fn dtar(&mut self) -> DtarW { + DtarW::new(self, 9) } #[doc = "Bit 10 - DTI Fault Action on Timer Stop"] #[inline(always)] #[must_use] - pub fn dtfats(&mut self) -> DTFATS_W<10> { - DTFATS_W::new(self) + pub fn dtfats(&mut self) -> DtfatsW { + DtfatsW::new(self, 10) } #[doc = "Bit 11 - DTI PRS Source Enable"] #[inline(always)] #[must_use] - pub fn dtprsen(&mut self) -> DTPRSEN_W<11> { - DTPRSEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtprsen(&mut self) -> DtprsenW { + DtprsenW::new(self, 11) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtcfg](index.html) module"] -pub struct DTCFG_SPEC; -impl crate::RegisterSpec for DTCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtcfgSpec; +impl crate::RegisterSpec for DtcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtcfg::R](R) reader structure"] -impl crate::Readable for DTCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtcfg::W](W) writer structure"] -impl crate::Writable for DTCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtcfg::R`](R) reader structure"] +impl crate::Readable for DtcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dtcfg::W`](W) writer structure"] +impl crate::Writable for DtcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTCFG to value 0"] -impl crate::Resettable for DTCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtctrl.rs index 816a05e..84f6d17 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtctrl.rs @@ -1,95 +1,55 @@ #[doc = "Register `DTCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTCINV` reader - DTI Complementary Output Invert."] -pub type DTCINV_R = crate::BitReader; +pub type DtcinvR = crate::BitReader; #[doc = "Field `DTCINV` writer - DTI Complementary Output Invert."] -pub type DTCINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, O>; +pub type DtcinvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTIPOL` reader - DTI Inactive Polarity"] -pub type DTIPOL_R = crate::BitReader; +pub type DtipolR = crate::BitReader; #[doc = "Field `DTIPOL` writer - DTI Inactive Polarity"] -pub type DTIPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, O>; +pub type DtipolW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI Complementary Output Invert."] #[inline(always)] - pub fn dtcinv(&self) -> DTCINV_R { - DTCINV_R::new((self.bits & 1) != 0) + pub fn dtcinv(&self) -> DtcinvR { + DtcinvR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI Inactive Polarity"] #[inline(always)] - pub fn dtipol(&self) -> DTIPOL_R { - DTIPOL_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtipol(&self) -> DtipolR { + DtipolR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI Complementary Output Invert."] #[inline(always)] #[must_use] - pub fn dtcinv(&mut self) -> DTCINV_W<0> { - DTCINV_W::new(self) + pub fn dtcinv(&mut self) -> DtcinvW { + DtcinvW::new(self, 0) } #[doc = "Bit 1 - DTI Inactive Polarity"] #[inline(always)] #[must_use] - pub fn dtipol(&mut self) -> DTIPOL_W<1> { - DTIPOL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtipol(&mut self) -> DtipolW { + DtipolW::new(self, 1) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtctrl](index.html) module"] -pub struct DTCTRL_SPEC; -impl crate::RegisterSpec for DTCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtctrlSpec; +impl crate::RegisterSpec for DtctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtctrl::R](R) reader structure"] -impl crate::Readable for DTCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtctrl::W](W) writer structure"] -impl crate::Writable for DTCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtctrl::R`](R) reader structure"] +impl crate::Readable for DtctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`dtctrl::W`](W) writer structure"] +impl crate::Writable for DtctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTCTRL to value 0"] -impl crate::Resettable for DTCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtfault.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtfault.rs index 01a53f9..ecd21aa 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtfault.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtfault.rs @@ -1,65 +1,50 @@ #[doc = "Register `DTFAULT` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `DTPRS0F` reader - DTI PRS 0 Fault"] -pub type DTPRS0F_R = crate::BitReader; +pub type Dtprs0fR = crate::BitReader; #[doc = "Field `DTPRS1F` reader - DTI PRS 1 Fault"] -pub type DTPRS1F_R = crate::BitReader; +pub type Dtprs1fR = crate::BitReader; #[doc = "Field `DTDBGF` reader - DTI Debugger Fault"] -pub type DTDBGF_R = crate::BitReader; +pub type DtdbgfR = crate::BitReader; #[doc = "Field `DTLOCKUPF` reader - DTI Lockup Fault"] -pub type DTLOCKUPF_R = crate::BitReader; +pub type DtlockupfR = crate::BitReader; #[doc = "Field `DTEM23F` reader - DTI EM23 Entry Fault"] -pub type DTEM23F_R = crate::BitReader; +pub type Dtem23fR = crate::BitReader; impl R { #[doc = "Bit 0 - DTI PRS 0 Fault"] #[inline(always)] - pub fn dtprs0f(&self) -> DTPRS0F_R { - DTPRS0F_R::new((self.bits & 1) != 0) + pub fn dtprs0f(&self) -> Dtprs0fR { + Dtprs0fR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI PRS 1 Fault"] #[inline(always)] - pub fn dtprs1f(&self) -> DTPRS1F_R { - DTPRS1F_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtprs1f(&self) -> Dtprs1fR { + Dtprs1fR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DTI Debugger Fault"] #[inline(always)] - pub fn dtdbgf(&self) -> DTDBGF_R { - DTDBGF_R::new(((self.bits >> 2) & 1) != 0) + pub fn dtdbgf(&self) -> DtdbgfR { + DtdbgfR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DTI Lockup Fault"] #[inline(always)] - pub fn dtlockupf(&self) -> DTLOCKUPF_R { - DTLOCKUPF_R::new(((self.bits >> 3) & 1) != 0) + pub fn dtlockupf(&self) -> DtlockupfR { + DtlockupfR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - DTI EM23 Entry Fault"] #[inline(always)] - pub fn dtem23f(&self) -> DTEM23F_R { - DTEM23F_R::new(((self.bits >> 4) & 1) != 0) + pub fn dtem23f(&self) -> Dtem23fR { + Dtem23fR::new(((self.bits >> 4) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfault](index.html) module"] -pub struct DTFAULT_SPEC; -impl crate::RegisterSpec for DTFAULT_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfault::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfaultSpec; +impl crate::RegisterSpec for DtfaultSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtfault::R](R) reader structure"] -impl crate::Readable for DTFAULT_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`dtfault::R`](R) reader structure"] +impl crate::Readable for DtfaultSpec {} #[doc = "`reset()` method sets DTFAULT to value 0"] -impl crate::Resettable for DTFAULT_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfaultSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtfaultc.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtfaultc.rs index 1c3d1ba..bcb21e2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtfaultc.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtfaultc.rs @@ -1,84 +1,59 @@ #[doc = "Register `DTFAULTC` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTPRS0FC` writer - DTI PRS0 Fault Clear"] -pub type DTPRS0FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtprs0fcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRS1FC` writer - DTI PRS1 Fault Clear"] -pub type DTPRS1FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtprs1fcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTDBGFC` writer - DTI Debugger Fault Clear"] -pub type DTDBGFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type DtdbgfcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTLOCKUPFC` writer - DTI Lockup Fault Clear"] -pub type DTLOCKUPFC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type DtlockupfcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTEM23FC` writer - DTI EM23 Fault Clear"] -pub type DTEM23FC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFAULTC_SPEC, bool, O>; +pub type Dtem23fcW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - DTI PRS0 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtprs0fc(&mut self) -> DTPRS0FC_W<0> { - DTPRS0FC_W::new(self) + pub fn dtprs0fc(&mut self) -> Dtprs0fcW { + Dtprs0fcW::new(self, 0) } #[doc = "Bit 1 - DTI PRS1 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtprs1fc(&mut self) -> DTPRS1FC_W<1> { - DTPRS1FC_W::new(self) + pub fn dtprs1fc(&mut self) -> Dtprs1fcW { + Dtprs1fcW::new(self, 1) } #[doc = "Bit 2 - DTI Debugger Fault Clear"] #[inline(always)] #[must_use] - pub fn dtdbgfc(&mut self) -> DTDBGFC_W<2> { - DTDBGFC_W::new(self) + pub fn dtdbgfc(&mut self) -> DtdbgfcW { + DtdbgfcW::new(self, 2) } #[doc = "Bit 3 - DTI Lockup Fault Clear"] #[inline(always)] #[must_use] - pub fn dtlockupfc(&mut self) -> DTLOCKUPFC_W<3> { - DTLOCKUPFC_W::new(self) + pub fn dtlockupfc(&mut self) -> DtlockupfcW { + DtlockupfcW::new(self, 3) } #[doc = "Bit 4 - DTI EM23 Fault Clear"] #[inline(always)] #[must_use] - pub fn dtem23fc(&mut self) -> DTEM23FC_W<4> { - DTEM23FC_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtem23fc(&mut self) -> Dtem23fcW { + Dtem23fcW::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfaultc](index.html) module"] -pub struct DTFAULTC_SPEC; -impl crate::RegisterSpec for DTFAULTC_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfaultc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfaultcSpec; +impl crate::RegisterSpec for DtfaultcSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [dtfaultc::W](W) writer structure"] -impl crate::Writable for DTFAULTC_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`dtfaultc::W`](W) writer structure"] +impl crate::Writable for DtfaultcSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTFAULTC to value 0"] -impl crate::Resettable for DTFAULTC_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfaultcSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtfcfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtfcfg.rs index 91dee4b..6179df8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtfcfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtfcfg.rs @@ -1,229 +1,197 @@ #[doc = "Register `DTFCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTFCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DTFA` reader - DTI Fault Action"] -pub type DTFA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "DTI Fault Action\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DTFA_A { +pub enum Dtfa { #[doc = "0: No action on fault"] - NONE = 0, + None = 0, #[doc = "1: Set outputs inactive"] - INACTIVE = 1, + Inactive = 1, #[doc = "2: Clear outputs"] - CLEAR = 2, + Clear = 2, #[doc = "3: Tristate outputs"] - TRISTATE = 3, + Tristate = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DTFA_A) -> Self { + fn from(variant: Dtfa) -> Self { variant as _ } } -impl DTFA_R { +impl crate::FieldSpec for Dtfa { + type Ux = u8; +} +impl crate::IsEnum for Dtfa {} +#[doc = "Field `DTFA` reader - DTI Fault Action"] +pub type DtfaR = crate::FieldReader; +impl DtfaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTFA_A { + pub const fn variant(&self) -> Dtfa { match self.bits { - 0 => DTFA_A::NONE, - 1 => DTFA_A::INACTIVE, - 2 => DTFA_A::CLEAR, - 3 => DTFA_A::TRISTATE, + 0 => Dtfa::None, + 1 => Dtfa::Inactive, + 2 => Dtfa::Clear, + 3 => Dtfa::Tristate, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No action on fault"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == DTFA_A::NONE + *self == Dtfa::None } - #[doc = "Checks if the value of the field is `INACTIVE`"] + #[doc = "Set outputs inactive"] #[inline(always)] pub fn is_inactive(&self) -> bool { - *self == DTFA_A::INACTIVE + *self == Dtfa::Inactive } - #[doc = "Checks if the value of the field is `CLEAR`"] + #[doc = "Clear outputs"] #[inline(always)] pub fn is_clear(&self) -> bool { - *self == DTFA_A::CLEAR + *self == Dtfa::Clear } - #[doc = "Checks if the value of the field is `TRISTATE`"] + #[doc = "Tristate outputs"] #[inline(always)] pub fn is_tristate(&self) -> bool { - *self == DTFA_A::TRISTATE + *self == Dtfa::Tristate } } #[doc = "Field `DTFA` writer - DTI Fault Action"] -pub type DTFA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, DTFCFG_SPEC, u8, DTFA_A, 2, O>; -impl<'a, const O: u8> DTFA_W<'a, O> { +pub type DtfaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dtfa, crate::Safe>; +impl<'a, REG> DtfaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No action on fault"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(DTFA_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Dtfa::None) } #[doc = "Set outputs inactive"] #[inline(always)] - pub fn inactive(self) -> &'a mut W { - self.variant(DTFA_A::INACTIVE) + pub fn inactive(self) -> &'a mut crate::W { + self.variant(Dtfa::Inactive) } #[doc = "Clear outputs"] #[inline(always)] - pub fn clear(self) -> &'a mut W { - self.variant(DTFA_A::CLEAR) + pub fn clear(self) -> &'a mut crate::W { + self.variant(Dtfa::Clear) } #[doc = "Tristate outputs"] #[inline(always)] - pub fn tristate(self) -> &'a mut W { - self.variant(DTFA_A::TRISTATE) + pub fn tristate(self) -> &'a mut crate::W { + self.variant(Dtfa::Tristate) } } #[doc = "Field `DTPRS0FEN` reader - DTI PRS 0 Fault Enable"] -pub type DTPRS0FEN_R = crate::BitReader; +pub type Dtprs0fenR = crate::BitReader; #[doc = "Field `DTPRS0FEN` writer - DTI PRS 0 Fault Enable"] -pub type DTPRS0FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtprs0fenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTPRS1FEN` reader - DTI PRS 1 Fault Enable"] -pub type DTPRS1FEN_R = crate::BitReader; +pub type Dtprs1fenR = crate::BitReader; #[doc = "Field `DTPRS1FEN` writer - DTI PRS 1 Fault Enable"] -pub type DTPRS1FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtprs1fenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTDBGFEN` reader - DTI Debugger Fault Enable"] -pub type DTDBGFEN_R = crate::BitReader; +pub type DtdbgfenR = crate::BitReader; #[doc = "Field `DTDBGFEN` writer - DTI Debugger Fault Enable"] -pub type DTDBGFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type DtdbgfenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTLOCKUPFEN` reader - DTI Lockup Fault Enable"] -pub type DTLOCKUPFEN_R = crate::BitReader; +pub type DtlockupfenR = crate::BitReader; #[doc = "Field `DTLOCKUPFEN` writer - DTI Lockup Fault Enable"] -pub type DTLOCKUPFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type DtlockupfenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTEM23FEN` reader - DTI EM23 Fault Enable"] -pub type DTEM23FEN_R = crate::BitReader; +pub type Dtem23fenR = crate::BitReader; #[doc = "Field `DTEM23FEN` writer - DTI EM23 Fault Enable"] -pub type DTEM23FEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTFCFG_SPEC, bool, O>; +pub type Dtem23fenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 16:17 - DTI Fault Action"] #[inline(always)] - pub fn dtfa(&self) -> DTFA_R { - DTFA_R::new(((self.bits >> 16) & 3) as u8) + pub fn dtfa(&self) -> DtfaR { + DtfaR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 24 - DTI PRS 0 Fault Enable"] #[inline(always)] - pub fn dtprs0fen(&self) -> DTPRS0FEN_R { - DTPRS0FEN_R::new(((self.bits >> 24) & 1) != 0) + pub fn dtprs0fen(&self) -> Dtprs0fenR { + Dtprs0fenR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - DTI PRS 1 Fault Enable"] #[inline(always)] - pub fn dtprs1fen(&self) -> DTPRS1FEN_R { - DTPRS1FEN_R::new(((self.bits >> 25) & 1) != 0) + pub fn dtprs1fen(&self) -> Dtprs1fenR { + Dtprs1fenR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - DTI Debugger Fault Enable"] #[inline(always)] - pub fn dtdbgfen(&self) -> DTDBGFEN_R { - DTDBGFEN_R::new(((self.bits >> 26) & 1) != 0) + pub fn dtdbgfen(&self) -> DtdbgfenR { + DtdbgfenR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - DTI Lockup Fault Enable"] #[inline(always)] - pub fn dtlockupfen(&self) -> DTLOCKUPFEN_R { - DTLOCKUPFEN_R::new(((self.bits >> 27) & 1) != 0) + pub fn dtlockupfen(&self) -> DtlockupfenR { + DtlockupfenR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - DTI EM23 Fault Enable"] #[inline(always)] - pub fn dtem23fen(&self) -> DTEM23FEN_R { - DTEM23FEN_R::new(((self.bits >> 28) & 1) != 0) + pub fn dtem23fen(&self) -> Dtem23fenR { + Dtem23fenR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bits 16:17 - DTI Fault Action"] #[inline(always)] #[must_use] - pub fn dtfa(&mut self) -> DTFA_W<16> { - DTFA_W::new(self) + pub fn dtfa(&mut self) -> DtfaW { + DtfaW::new(self, 16) } #[doc = "Bit 24 - DTI PRS 0 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtprs0fen(&mut self) -> DTPRS0FEN_W<24> { - DTPRS0FEN_W::new(self) + pub fn dtprs0fen(&mut self) -> Dtprs0fenW { + Dtprs0fenW::new(self, 24) } #[doc = "Bit 25 - DTI PRS 1 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtprs1fen(&mut self) -> DTPRS1FEN_W<25> { - DTPRS1FEN_W::new(self) + pub fn dtprs1fen(&mut self) -> Dtprs1fenW { + Dtprs1fenW::new(self, 25) } #[doc = "Bit 26 - DTI Debugger Fault Enable"] #[inline(always)] #[must_use] - pub fn dtdbgfen(&mut self) -> DTDBGFEN_W<26> { - DTDBGFEN_W::new(self) + pub fn dtdbgfen(&mut self) -> DtdbgfenW { + DtdbgfenW::new(self, 26) } #[doc = "Bit 27 - DTI Lockup Fault Enable"] #[inline(always)] #[must_use] - pub fn dtlockupfen(&mut self) -> DTLOCKUPFEN_W<27> { - DTLOCKUPFEN_W::new(self) + pub fn dtlockupfen(&mut self) -> DtlockupfenW { + DtlockupfenW::new(self, 27) } #[doc = "Bit 28 - DTI EM23 Fault Enable"] #[inline(always)] #[must_use] - pub fn dtem23fen(&mut self) -> DTEM23FEN_W<28> { - DTEM23FEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtem23fen(&mut self) -> Dtem23fenW { + Dtem23fenW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtfcfg](index.html) module"] -pub struct DTFCFG_SPEC; -impl crate::RegisterSpec for DTFCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtfcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtfcfgSpec; +impl crate::RegisterSpec for DtfcfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtfcfg::R](R) reader structure"] -impl crate::Readable for DTFCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtfcfg::W](W) writer structure"] -impl crate::Writable for DTFCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtfcfg::R`](R) reader structure"] +impl crate::Readable for DtfcfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dtfcfg::W`](W) writer structure"] +impl crate::Writable for DtfcfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTFCFG to value 0"] -impl crate::Resettable for DTFCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtfcfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtlock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtlock.rs index 434789a..5ce63f5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtlock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtlock.rs @@ -1,73 +1,55 @@ #[doc = "Register `DTLOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "DTI Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum DTILOCKKEY_AW { +pub enum Dtilockkey { #[doc = "52864: Write to unlock TIMER DTI registers"] - UNLOCK = 52864, + Unlock = 52864, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: DTILOCKKEY_AW) -> Self { + fn from(variant: Dtilockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Dtilockkey { + type Ux = u16; +} +impl crate::IsEnum for Dtilockkey {} #[doc = "Field `DTILOCKKEY` writer - DTI Lock Key"] -pub type DTILOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, DTLOCK_SPEC, u16, DTILOCKKEY_AW, 16, O>; -impl<'a, const O: u8> DTILOCKKEY_W<'a, O> { +pub type DtilockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Dtilockkey>; +impl<'a, REG> DtilockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unlock TIMER DTI registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(DTILOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Dtilockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - DTI Lock Key"] #[inline(always)] #[must_use] - pub fn dtilockkey(&mut self) -> DTILOCKKEY_W<0> { - DTILOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtilockkey(&mut self) -> DtilockkeyW { + DtilockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtlock](index.html) module"] -pub struct DTLOCK_SPEC; -impl crate::RegisterSpec for DTLOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtlock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtlockSpec; +impl crate::RegisterSpec for DtlockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [dtlock::W](W) writer structure"] -impl crate::Writable for DTLOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`dtlock::W`](W) writer structure"] +impl crate::Writable for DtlockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTLOCK to value 0"] -impl crate::Resettable for DTLOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtlockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtogen.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtogen.rs index 818b4bb..35926ca 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtogen.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dtogen.rs @@ -1,155 +1,115 @@ #[doc = "Register `DTOGEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTOGEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTOGCC0EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC0EN_R = crate::BitReader; +pub type Dtogcc0enR = crate::BitReader; #[doc = "Field `DTOGCC0EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCC1EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC1EN_R = crate::BitReader; +pub type Dtogcc1enR = crate::BitReader; #[doc = "Field `DTOGCC1EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCC2EN` reader - DTI CCn Output Generation Enable"] -pub type DTOGCC2EN_R = crate::BitReader; +pub type Dtogcc2enR = crate::BitReader; #[doc = "Field `DTOGCC2EN` writer - DTI CCn Output Generation Enable"] -pub type DTOGCC2EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcc2enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI0EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI0EN_R = crate::BitReader; +pub type Dtogcdti0enR = crate::BitReader; #[doc = "Field `DTOGCDTI0EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI1EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI1EN_R = crate::BitReader; +pub type Dtogcdti1enR = crate::BitReader; #[doc = "Field `DTOGCDTI1EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTOGCDTI2EN` reader - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI2EN_R = crate::BitReader; +pub type Dtogcdti2enR = crate::BitReader; #[doc = "Field `DTOGCDTI2EN` writer - DTI CDTIn Output Generation Enable"] -pub type DTOGCDTI2EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTOGEN_SPEC, bool, O>; +pub type Dtogcdti2enW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc0en(&self) -> DTOGCC0EN_R { - DTOGCC0EN_R::new((self.bits & 1) != 0) + pub fn dtogcc0en(&self) -> Dtogcc0enR { + Dtogcc0enR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc1en(&self) -> DTOGCC1EN_R { - DTOGCC1EN_R::new(((self.bits >> 1) & 1) != 0) + pub fn dtogcc1en(&self) -> Dtogcc1enR { + Dtogcc1enR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DTI CCn Output Generation Enable"] #[inline(always)] - pub fn dtogcc2en(&self) -> DTOGCC2EN_R { - DTOGCC2EN_R::new(((self.bits >> 2) & 1) != 0) + pub fn dtogcc2en(&self) -> Dtogcc2enR { + Dtogcc2enR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti0en(&self) -> DTOGCDTI0EN_R { - DTOGCDTI0EN_R::new(((self.bits >> 3) & 1) != 0) + pub fn dtogcdti0en(&self) -> Dtogcdti0enR { + Dtogcdti0enR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti1en(&self) -> DTOGCDTI1EN_R { - DTOGCDTI1EN_R::new(((self.bits >> 4) & 1) != 0) + pub fn dtogcdti1en(&self) -> Dtogcdti1enR { + Dtogcdti1enR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DTI CDTIn Output Generation Enable"] #[inline(always)] - pub fn dtogcdti2en(&self) -> DTOGCDTI2EN_R { - DTOGCDTI2EN_R::new(((self.bits >> 5) & 1) != 0) + pub fn dtogcdti2en(&self) -> Dtogcdti2enR { + Dtogcdti2enR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bit 0 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc0en(&mut self) -> DTOGCC0EN_W<0> { - DTOGCC0EN_W::new(self) + pub fn dtogcc0en(&mut self) -> Dtogcc0enW { + Dtogcc0enW::new(self, 0) } #[doc = "Bit 1 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc1en(&mut self) -> DTOGCC1EN_W<1> { - DTOGCC1EN_W::new(self) + pub fn dtogcc1en(&mut self) -> Dtogcc1enW { + Dtogcc1enW::new(self, 1) } #[doc = "Bit 2 - DTI CCn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcc2en(&mut self) -> DTOGCC2EN_W<2> { - DTOGCC2EN_W::new(self) + pub fn dtogcc2en(&mut self) -> Dtogcc2enW { + Dtogcc2enW::new(self, 2) } #[doc = "Bit 3 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti0en(&mut self) -> DTOGCDTI0EN_W<3> { - DTOGCDTI0EN_W::new(self) + pub fn dtogcdti0en(&mut self) -> Dtogcdti0enW { + Dtogcdti0enW::new(self, 3) } #[doc = "Bit 4 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti1en(&mut self) -> DTOGCDTI1EN_W<4> { - DTOGCDTI1EN_W::new(self) + pub fn dtogcdti1en(&mut self) -> Dtogcdti1enW { + Dtogcdti1enW::new(self, 4) } #[doc = "Bit 5 - DTI CDTIn Output Generation Enable"] #[inline(always)] #[must_use] - pub fn dtogcdti2en(&mut self) -> DTOGCDTI2EN_W<5> { - DTOGCDTI2EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtogcdti2en(&mut self) -> Dtogcdti2enW { + Dtogcdti2enW::new(self, 5) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtogen](index.html) module"] -pub struct DTOGEN_SPEC; -impl crate::RegisterSpec for DTOGEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dtogen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtogen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DtogenSpec; +impl crate::RegisterSpec for DtogenSpec { type Ux = u32; } -#[doc = "`read()` method returns [dtogen::R](R) reader structure"] -impl crate::Readable for DTOGEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dtogen::W](W) writer structure"] -impl crate::Writable for DTOGEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dtogen::R`](R) reader structure"] +impl crate::Readable for DtogenSpec {} +#[doc = "`write(|w| ..)` method takes [`dtogen::W`](W) writer structure"] +impl crate::Writable for DtogenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTOGEN to value 0"] -impl crate::Resettable for DTOGEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DtogenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dttimecfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dttimecfg.rs index 63e4c73..9577f86 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dttimecfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/dttimecfg.rs @@ -1,110 +1,70 @@ #[doc = "Register `DTTIMECFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `DTTIMECFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DTPRESC` reader - DTI Prescaler Setting"] -pub type DTPRESC_R = crate::FieldReader; +pub type DtprescR = crate::FieldReader; #[doc = "Field `DTPRESC` writer - DTI Prescaler Setting"] -pub type DTPRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u16, u16, 10, O>; +pub type DtprescW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `DTRISET` reader - DTI Rise-time"] -pub type DTRISET_R = crate::FieldReader; +pub type DtrisetR = crate::FieldReader; #[doc = "Field `DTRISET` writer - DTI Rise-time"] -pub type DTRISET_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u8, u8, 6, O>; +pub type DtrisetW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `DTFALLT` reader - DTI Fall-time"] -pub type DTFALLT_R = crate::FieldReader; +pub type DtfalltR = crate::FieldReader; #[doc = "Field `DTFALLT` writer - DTI Fall-time"] -pub type DTFALLT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DTTIMECFG_SPEC, u8, u8, 6, O>; +pub type DtfalltW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:9 - DTI Prescaler Setting"] #[inline(always)] - pub fn dtpresc(&self) -> DTPRESC_R { - DTPRESC_R::new((self.bits & 0x03ff) as u16) + pub fn dtpresc(&self) -> DtprescR { + DtprescR::new((self.bits & 0x03ff) as u16) } #[doc = "Bits 10:15 - DTI Rise-time"] #[inline(always)] - pub fn dtriset(&self) -> DTRISET_R { - DTRISET_R::new(((self.bits >> 10) & 0x3f) as u8) + pub fn dtriset(&self) -> DtrisetR { + DtrisetR::new(((self.bits >> 10) & 0x3f) as u8) } #[doc = "Bits 16:21 - DTI Fall-time"] #[inline(always)] - pub fn dtfallt(&self) -> DTFALLT_R { - DTFALLT_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn dtfallt(&self) -> DtfalltR { + DtfalltR::new(((self.bits >> 16) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:9 - DTI Prescaler Setting"] #[inline(always)] #[must_use] - pub fn dtpresc(&mut self) -> DTPRESC_W<0> { - DTPRESC_W::new(self) + pub fn dtpresc(&mut self) -> DtprescW { + DtprescW::new(self, 0) } #[doc = "Bits 10:15 - DTI Rise-time"] #[inline(always)] #[must_use] - pub fn dtriset(&mut self) -> DTRISET_W<10> { - DTRISET_W::new(self) + pub fn dtriset(&mut self) -> DtrisetW { + DtrisetW::new(self, 10) } #[doc = "Bits 16:21 - DTI Fall-time"] #[inline(always)] #[must_use] - pub fn dtfallt(&mut self) -> DTFALLT_W<16> { - DTFALLT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn dtfallt(&mut self) -> DtfalltW { + DtfalltW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dttimecfg](index.html) module"] -pub struct DTTIMECFG_SPEC; -impl crate::RegisterSpec for DTTIMECFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`dttimecfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dttimecfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DttimecfgSpec; +impl crate::RegisterSpec for DttimecfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [dttimecfg::R](R) reader structure"] -impl crate::Readable for DTTIMECFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [dttimecfg::W](W) writer structure"] -impl crate::Writable for DTTIMECFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`dttimecfg::R`](R) reader structure"] +impl crate::Readable for DttimecfgSpec {} +#[doc = "`write(|w| ..)` method takes [`dttimecfg::W`](W) writer structure"] +impl crate::Writable for DttimecfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTTIMECFG to value 0"] -impl crate::Resettable for DTTIMECFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for DttimecfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/en.rs index 9392483..303507b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Timer Module Enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Timer Module Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Timer Module Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Timer Module Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/ien.rs index 66588d7..73273ef 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/ien.rs @@ -1,290 +1,250 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OF` reader - Overflow Interrupt Enable"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Enable"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UF` reader - Underflow Interrupt Enable"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Enable"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DIRCHG` reader - Direction Change Detect Interrupt Enable"] -pub type DIRCHG_R = crate::BitReader; +pub type DirchgR = crate::BitReader; #[doc = "Field `DIRCHG` writer - Direction Change Detect Interrupt Enable"] -pub type DIRCHG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type DirchgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC0` reader - CC0 Interrupt Enable"] -pub type CC0_R = crate::BitReader; +pub type Cc0R = crate::BitReader; #[doc = "Field `CC0` writer - CC0 Interrupt Enable"] -pub type CC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1` reader - CC1 Interrupt Enable"] -pub type CC1_R = crate::BitReader; +pub type Cc1R = crate::BitReader; #[doc = "Field `CC1` writer - CC1 Interrupt Enable"] -pub type CC1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2` reader - CC2 Interrupt Enable"] -pub type CC2_R = crate::BitReader; +pub type Cc2R = crate::BitReader; #[doc = "Field `CC2` writer - CC2 Interrupt Enable"] -pub type CC2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Cc2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL0` reader - ICFWLFULL0 Interrupt Enable"] -pub type ICFWLFULL0_R = crate::BitReader; +pub type Icfwlfull0R = crate::BitReader; #[doc = "Field `ICFWLFULL0` writer - ICFWLFULL0 Interrupt Enable"] -pub type ICFWLFULL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL1` reader - ICFWLFULL1 Interrupt Enable"] -pub type ICFWLFULL1_R = crate::BitReader; +pub type Icfwlfull1R = crate::BitReader; #[doc = "Field `ICFWLFULL1` writer - ICFWLFULL1 Interrupt Enable"] -pub type ICFWLFULL1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL2` reader - ICFWLFULL2 Interrupt Enable"] -pub type ICFWLFULL2_R = crate::BitReader; +pub type Icfwlfull2R = crate::BitReader; #[doc = "Field `ICFWLFULL2` writer - ICFWLFULL2 Interrupt Enable"] -pub type ICFWLFULL2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfwlfull2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF0` reader - ICFOF0 Interrupt Enable"] -pub type ICFOF0_R = crate::BitReader; +pub type Icfof0R = crate::BitReader; #[doc = "Field `ICFOF0` writer - ICFOF0 Interrupt Enable"] -pub type ICFOF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF1` reader - ICFOF1 Interrupt Enable"] -pub type ICFOF1_R = crate::BitReader; +pub type Icfof1R = crate::BitReader; #[doc = "Field `ICFOF1` writer - ICFOF1 Interrupt Enable"] -pub type ICFOF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF2` reader - ICFOF2 Interrupt Enable"] -pub type ICFOF2_R = crate::BitReader; +pub type Icfof2R = crate::BitReader; #[doc = "Field `ICFOF2` writer - ICFOF2 Interrupt Enable"] -pub type ICFOF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfof2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF0` reader - ICFUF0 Interrupt Enable"] -pub type ICFUF0_R = crate::BitReader; +pub type Icfuf0R = crate::BitReader; #[doc = "Field `ICFUF0` writer - ICFUF0 Interrupt Enable"] -pub type ICFUF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF1` reader - ICFUF1 Interrupt Enable"] -pub type ICFUF1_R = crate::BitReader; +pub type Icfuf1R = crate::BitReader; #[doc = "Field `ICFUF1` writer - ICFUF1 Interrupt Enable"] -pub type ICFUF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF2` reader - ICFUF2 Interrupt Enable"] -pub type ICFUF2_R = crate::BitReader; +pub type Icfuf2R = crate::BitReader; #[doc = "Field `ICFUF2` writer - ICFUF2 Interrupt Enable"] -pub type ICFUF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Icfuf2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Enable"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new((self.bits & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Underflow Interrupt Enable"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new(((self.bits >> 1) & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Direction Change Detect Interrupt Enable"] #[inline(always)] - pub fn dirchg(&self) -> DIRCHG_R { - DIRCHG_R::new(((self.bits >> 2) & 1) != 0) + pub fn dirchg(&self) -> DirchgR { + DirchgR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - CC0 Interrupt Enable"] #[inline(always)] - pub fn cc0(&self) -> CC0_R { - CC0_R::new(((self.bits >> 4) & 1) != 0) + pub fn cc0(&self) -> Cc0R { + Cc0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CC1 Interrupt Enable"] #[inline(always)] - pub fn cc1(&self) -> CC1_R { - CC1_R::new(((self.bits >> 5) & 1) != 0) + pub fn cc1(&self) -> Cc1R { + Cc1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - CC2 Interrupt Enable"] #[inline(always)] - pub fn cc2(&self) -> CC2_R { - CC2_R::new(((self.bits >> 6) & 1) != 0) + pub fn cc2(&self) -> Cc2R { + Cc2R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 16 - ICFWLFULL0 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull0(&self) -> ICFWLFULL0_R { - ICFWLFULL0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfwlfull0(&self) -> Icfwlfull0R { + Icfwlfull0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - ICFWLFULL1 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull1(&self) -> ICFWLFULL1_R { - ICFWLFULL1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfwlfull1(&self) -> Icfwlfull1R { + Icfwlfull1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - ICFWLFULL2 Interrupt Enable"] #[inline(always)] - pub fn icfwlfull2(&self) -> ICFWLFULL2_R { - ICFWLFULL2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfwlfull2(&self) -> Icfwlfull2R { + Icfwlfull2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - ICFOF0 Interrupt Enable"] #[inline(always)] - pub fn icfof0(&self) -> ICFOF0_R { - ICFOF0_R::new(((self.bits >> 20) & 1) != 0) + pub fn icfof0(&self) -> Icfof0R { + Icfof0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - ICFOF1 Interrupt Enable"] #[inline(always)] - pub fn icfof1(&self) -> ICFOF1_R { - ICFOF1_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfof1(&self) -> Icfof1R { + Icfof1R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - ICFOF2 Interrupt Enable"] #[inline(always)] - pub fn icfof2(&self) -> ICFOF2_R { - ICFOF2_R::new(((self.bits >> 22) & 1) != 0) + pub fn icfof2(&self) -> Icfof2R { + Icfof2R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 24 - ICFUF0 Interrupt Enable"] #[inline(always)] - pub fn icfuf0(&self) -> ICFUF0_R { - ICFUF0_R::new(((self.bits >> 24) & 1) != 0) + pub fn icfuf0(&self) -> Icfuf0R { + Icfuf0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - ICFUF1 Interrupt Enable"] #[inline(always)] - pub fn icfuf1(&self) -> ICFUF1_R { - ICFUF1_R::new(((self.bits >> 25) & 1) != 0) + pub fn icfuf1(&self) -> Icfuf1R { + Icfuf1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - ICFUF2 Interrupt Enable"] #[inline(always)] - pub fn icfuf2(&self) -> ICFUF2_R { - ICFUF2_R::new(((self.bits >> 26) & 1) != 0) + pub fn icfuf2(&self) -> Icfuf2R { + Icfuf2R::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<0> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 0) } #[doc = "Bit 1 - Underflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<1> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 1) } #[doc = "Bit 2 - Direction Change Detect Interrupt Enable"] #[inline(always)] #[must_use] - pub fn dirchg(&mut self) -> DIRCHG_W<2> { - DIRCHG_W::new(self) + pub fn dirchg(&mut self) -> DirchgW { + DirchgW::new(self, 2) } #[doc = "Bit 4 - CC0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc0(&mut self) -> CC0_W<4> { - CC0_W::new(self) + pub fn cc0(&mut self) -> Cc0W { + Cc0W::new(self, 4) } #[doc = "Bit 5 - CC1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc1(&mut self) -> CC1_W<5> { - CC1_W::new(self) + pub fn cc1(&mut self) -> Cc1W { + Cc1W::new(self, 5) } #[doc = "Bit 6 - CC2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cc2(&mut self) -> CC2_W<6> { - CC2_W::new(self) + pub fn cc2(&mut self) -> Cc2W { + Cc2W::new(self, 6) } #[doc = "Bit 16 - ICFWLFULL0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull0(&mut self) -> ICFWLFULL0_W<16> { - ICFWLFULL0_W::new(self) + pub fn icfwlfull0(&mut self) -> Icfwlfull0W { + Icfwlfull0W::new(self, 16) } #[doc = "Bit 17 - ICFWLFULL1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull1(&mut self) -> ICFWLFULL1_W<17> { - ICFWLFULL1_W::new(self) + pub fn icfwlfull1(&mut self) -> Icfwlfull1W { + Icfwlfull1W::new(self, 17) } #[doc = "Bit 18 - ICFWLFULL2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfwlfull2(&mut self) -> ICFWLFULL2_W<18> { - ICFWLFULL2_W::new(self) + pub fn icfwlfull2(&mut self) -> Icfwlfull2W { + Icfwlfull2W::new(self, 18) } #[doc = "Bit 20 - ICFOF0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof0(&mut self) -> ICFOF0_W<20> { - ICFOF0_W::new(self) + pub fn icfof0(&mut self) -> Icfof0W { + Icfof0W::new(self, 20) } #[doc = "Bit 21 - ICFOF1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof1(&mut self) -> ICFOF1_W<21> { - ICFOF1_W::new(self) + pub fn icfof1(&mut self) -> Icfof1W { + Icfof1W::new(self, 21) } #[doc = "Bit 22 - ICFOF2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfof2(&mut self) -> ICFOF2_W<22> { - ICFOF2_W::new(self) + pub fn icfof2(&mut self) -> Icfof2W { + Icfof2W::new(self, 22) } #[doc = "Bit 24 - ICFUF0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf0(&mut self) -> ICFUF0_W<24> { - ICFUF0_W::new(self) + pub fn icfuf0(&mut self) -> Icfuf0W { + Icfuf0W::new(self, 24) } #[doc = "Bit 25 - ICFUF1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf1(&mut self) -> ICFUF1_W<25> { - ICFUF1_W::new(self) + pub fn icfuf1(&mut self) -> Icfuf1W { + Icfuf1W::new(self, 25) } #[doc = "Bit 26 - ICFUF2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn icfuf2(&mut self) -> ICFUF2_W<26> { - ICFUF2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfuf2(&mut self) -> Icfuf2W { + Icfuf2W::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/if_.rs index edde0f3..fad1cd1 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/if_.rs @@ -1,290 +1,250 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `OF` reader - Overflow Interrupt Flag"] -pub type OF_R = crate::BitReader; +pub type OfR = crate::BitReader; #[doc = "Field `OF` writer - Overflow Interrupt Flag"] -pub type OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type OfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UF` reader - Underflow Interrupt Flag"] -pub type UF_R = crate::BitReader; +pub type UfR = crate::BitReader; #[doc = "Field `UF` writer - Underflow Interrupt Flag"] -pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type UfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DIRCHG` reader - Direction Change Detect Interrupt Flag"] -pub type DIRCHG_R = crate::BitReader; +pub type DirchgR = crate::BitReader; #[doc = "Field `DIRCHG` writer - Direction Change Detect Interrupt Flag"] -pub type DIRCHG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type DirchgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC0` reader - Capture Compare Channel 0 Interrupt Flag"] -pub type CC0_R = crate::BitReader; +pub type Cc0R = crate::BitReader; #[doc = "Field `CC0` writer - Capture Compare Channel 0 Interrupt Flag"] -pub type CC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1` reader - Capture Compare Channel 1 Interrupt Flag"] -pub type CC1_R = crate::BitReader; +pub type Cc1R = crate::BitReader; #[doc = "Field `CC1` writer - Capture Compare Channel 1 Interrupt Flag"] -pub type CC1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2` reader - Capture Compare Channel 2 Interrupt Flag"] -pub type CC2_R = crate::BitReader; +pub type Cc2R = crate::BitReader; #[doc = "Field `CC2` writer - Capture Compare Channel 2 Interrupt Flag"] -pub type CC2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Cc2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL0` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL0_R = crate::BitReader; +pub type Icfwlfull0R = crate::BitReader; #[doc = "Field `ICFWLFULL0` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL1` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL1_R = crate::BitReader; +pub type Icfwlfull1R = crate::BitReader; #[doc = "Field `ICFWLFULL1` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFWLFULL2` reader - Input Capture Watermark Level Full"] -pub type ICFWLFULL2_R = crate::BitReader; +pub type Icfwlfull2R = crate::BitReader; #[doc = "Field `ICFWLFULL2` writer - Input Capture Watermark Level Full"] -pub type ICFWLFULL2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfwlfull2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF0` reader - Input Capture FIFO overflow"] -pub type ICFOF0_R = crate::BitReader; +pub type Icfof0R = crate::BitReader; #[doc = "Field `ICFOF0` writer - Input Capture FIFO overflow"] -pub type ICFOF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF1` reader - Input Capture FIFO overflow"] -pub type ICFOF1_R = crate::BitReader; +pub type Icfof1R = crate::BitReader; #[doc = "Field `ICFOF1` writer - Input Capture FIFO overflow"] -pub type ICFOF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFOF2` reader - Input Capture FIFO overflow"] -pub type ICFOF2_R = crate::BitReader; +pub type Icfof2R = crate::BitReader; #[doc = "Field `ICFOF2` writer - Input Capture FIFO overflow"] -pub type ICFOF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfof2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF0` reader - Input capture FIFO underflow"] -pub type ICFUF0_R = crate::BitReader; +pub type Icfuf0R = crate::BitReader; #[doc = "Field `ICFUF0` writer - Input capture FIFO underflow"] -pub type ICFUF0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF1` reader - Input capture FIFO underflow"] -pub type ICFUF1_R = crate::BitReader; +pub type Icfuf1R = crate::BitReader; #[doc = "Field `ICFUF1` writer - Input capture FIFO underflow"] -pub type ICFUF1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ICFUF2` reader - Input capture FIFO underflow"] -pub type ICFUF2_R = crate::BitReader; +pub type Icfuf2R = crate::BitReader; #[doc = "Field `ICFUF2` writer - Input capture FIFO underflow"] -pub type ICFUF2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Icfuf2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] - pub fn of(&self) -> OF_R { - OF_R::new((self.bits & 1) != 0) + pub fn of(&self) -> OfR { + OfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Underflow Interrupt Flag"] #[inline(always)] - pub fn uf(&self) -> UF_R { - UF_R::new(((self.bits >> 1) & 1) != 0) + pub fn uf(&self) -> UfR { + UfR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] - pub fn dirchg(&self) -> DIRCHG_R { - DIRCHG_R::new(((self.bits >> 2) & 1) != 0) + pub fn dirchg(&self) -> DirchgR { + DirchgR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Capture Compare Channel 0 Interrupt Flag"] #[inline(always)] - pub fn cc0(&self) -> CC0_R { - CC0_R::new(((self.bits >> 4) & 1) != 0) + pub fn cc0(&self) -> Cc0R { + Cc0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Capture Compare Channel 1 Interrupt Flag"] #[inline(always)] - pub fn cc1(&self) -> CC1_R { - CC1_R::new(((self.bits >> 5) & 1) != 0) + pub fn cc1(&self) -> Cc1R { + Cc1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Capture Compare Channel 2 Interrupt Flag"] #[inline(always)] - pub fn cc2(&self) -> CC2_R { - CC2_R::new(((self.bits >> 6) & 1) != 0) + pub fn cc2(&self) -> Cc2R { + Cc2R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 16 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull0(&self) -> ICFWLFULL0_R { - ICFWLFULL0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfwlfull0(&self) -> Icfwlfull0R { + Icfwlfull0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull1(&self) -> ICFWLFULL1_R { - ICFWLFULL1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfwlfull1(&self) -> Icfwlfull1R { + Icfwlfull1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Input Capture Watermark Level Full"] #[inline(always)] - pub fn icfwlfull2(&self) -> ICFWLFULL2_R { - ICFWLFULL2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfwlfull2(&self) -> Icfwlfull2R { + Icfwlfull2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof0(&self) -> ICFOF0_R { - ICFOF0_R::new(((self.bits >> 20) & 1) != 0) + pub fn icfof0(&self) -> Icfof0R { + Icfof0R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof1(&self) -> ICFOF1_R { - ICFOF1_R::new(((self.bits >> 21) & 1) != 0) + pub fn icfof1(&self) -> Icfof1R { + Icfof1R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Input Capture FIFO overflow"] #[inline(always)] - pub fn icfof2(&self) -> ICFOF2_R { - ICFOF2_R::new(((self.bits >> 22) & 1) != 0) + pub fn icfof2(&self) -> Icfof2R { + Icfof2R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 24 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf0(&self) -> ICFUF0_R { - ICFUF0_R::new(((self.bits >> 24) & 1) != 0) + pub fn icfuf0(&self) -> Icfuf0R { + Icfuf0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf1(&self) -> ICFUF1_R { - ICFUF1_R::new(((self.bits >> 25) & 1) != 0) + pub fn icfuf1(&self) -> Icfuf1R { + Icfuf1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Input capture FIFO underflow"] #[inline(always)] - pub fn icfuf2(&self) -> ICFUF2_R { - ICFUF2_R::new(((self.bits >> 26) & 1) != 0) + pub fn icfuf2(&self) -> Icfuf2R { + Icfuf2R::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bit 0 - Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn of(&mut self) -> OF_W<0> { - OF_W::new(self) + pub fn of(&mut self) -> OfW { + OfW::new(self, 0) } #[doc = "Bit 1 - Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn uf(&mut self) -> UF_W<1> { - UF_W::new(self) + pub fn uf(&mut self) -> UfW { + UfW::new(self, 1) } #[doc = "Bit 2 - Direction Change Detect Interrupt Flag"] #[inline(always)] #[must_use] - pub fn dirchg(&mut self) -> DIRCHG_W<2> { - DIRCHG_W::new(self) + pub fn dirchg(&mut self) -> DirchgW { + DirchgW::new(self, 2) } #[doc = "Bit 4 - Capture Compare Channel 0 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc0(&mut self) -> CC0_W<4> { - CC0_W::new(self) + pub fn cc0(&mut self) -> Cc0W { + Cc0W::new(self, 4) } #[doc = "Bit 5 - Capture Compare Channel 1 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc1(&mut self) -> CC1_W<5> { - CC1_W::new(self) + pub fn cc1(&mut self) -> Cc1W { + Cc1W::new(self, 5) } #[doc = "Bit 6 - Capture Compare Channel 2 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn cc2(&mut self) -> CC2_W<6> { - CC2_W::new(self) + pub fn cc2(&mut self) -> Cc2W { + Cc2W::new(self, 6) } #[doc = "Bit 16 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull0(&mut self) -> ICFWLFULL0_W<16> { - ICFWLFULL0_W::new(self) + pub fn icfwlfull0(&mut self) -> Icfwlfull0W { + Icfwlfull0W::new(self, 16) } #[doc = "Bit 17 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull1(&mut self) -> ICFWLFULL1_W<17> { - ICFWLFULL1_W::new(self) + pub fn icfwlfull1(&mut self) -> Icfwlfull1W { + Icfwlfull1W::new(self, 17) } #[doc = "Bit 18 - Input Capture Watermark Level Full"] #[inline(always)] #[must_use] - pub fn icfwlfull2(&mut self) -> ICFWLFULL2_W<18> { - ICFWLFULL2_W::new(self) + pub fn icfwlfull2(&mut self) -> Icfwlfull2W { + Icfwlfull2W::new(self, 18) } #[doc = "Bit 20 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof0(&mut self) -> ICFOF0_W<20> { - ICFOF0_W::new(self) + pub fn icfof0(&mut self) -> Icfof0W { + Icfof0W::new(self, 20) } #[doc = "Bit 21 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof1(&mut self) -> ICFOF1_W<21> { - ICFOF1_W::new(self) + pub fn icfof1(&mut self) -> Icfof1W { + Icfof1W::new(self, 21) } #[doc = "Bit 22 - Input Capture FIFO overflow"] #[inline(always)] #[must_use] - pub fn icfof2(&mut self) -> ICFOF2_W<22> { - ICFOF2_W::new(self) + pub fn icfof2(&mut self) -> Icfof2W { + Icfof2W::new(self, 22) } #[doc = "Bit 24 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf0(&mut self) -> ICFUF0_W<24> { - ICFUF0_W::new(self) + pub fn icfuf0(&mut self) -> Icfuf0W { + Icfuf0W::new(self, 24) } #[doc = "Bit 25 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf1(&mut self) -> ICFUF1_W<25> { - ICFUF1_W::new(self) + pub fn icfuf1(&mut self) -> Icfuf1W { + Icfuf1W::new(self, 25) } #[doc = "Bit 26 - Input capture FIFO underflow"] #[inline(always)] #[must_use] - pub fn icfuf2(&mut self) -> ICFUF2_W<26> { - ICFUF2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn icfuf2(&mut self) -> Icfuf2W { + Icfuf2W::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/ipversion.rs index fd8f758..0b161f8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version ID"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version ID"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/lock.rs index 4d444ca..4d6d1fe 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/lock.rs @@ -1,73 +1,55 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Timer Lock Key\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "52864: Write to unlock TIMER registers"] - UNLOCK = 52864, + Unlock = 52864, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - Timer Lock Key"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Write to unlock TIMER registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - Timer Lock Key"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/status.rs index 1a2964d..25d646e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/status.rs @@ -1,339 +1,324 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RUNNING` reader - Running"] -pub type RUNNING_R = crate::BitReader; -#[doc = "Field `DIR` reader - Direction"] -pub type DIR_R = crate::BitReader; +pub type RunningR = crate::BitReader; #[doc = "Direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DIR_A { +pub enum Dir { #[doc = "0: Counting up"] - UP = 0, + Up = 0, #[doc = "1: Counting down"] - DOWN = 1, + Down = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DIR_A) -> Self { + fn from(variant: Dir) -> Self { variant as u8 != 0 } } -impl DIR_R { +#[doc = "Field `DIR` reader - Direction"] +pub type DirR = crate::BitReader; +impl DirR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DIR_A { + pub const fn variant(&self) -> Dir { match self.bits { - false => DIR_A::UP, - true => DIR_A::DOWN, + false => Dir::Up, + true => Dir::Down, } } - #[doc = "Checks if the value of the field is `UP`"] + #[doc = "Counting up"] #[inline(always)] pub fn is_up(&self) -> bool { - *self == DIR_A::UP + *self == Dir::Up } - #[doc = "Checks if the value of the field is `DOWN`"] + #[doc = "Counting down"] #[inline(always)] pub fn is_down(&self) -> bool { - *self == DIR_A::DOWN + *self == Dir::Down } } #[doc = "Field `TOPBV` reader - TOP Buffer Valid"] -pub type TOPBV_R = crate::BitReader; -#[doc = "Field `TIMERLOCKSTATUS` reader - Timer lock status"] -pub type TIMERLOCKSTATUS_R = crate::BitReader; +pub type TopbvR = crate::BitReader; #[doc = "Timer lock status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TIMERLOCKSTATUS_A { +pub enum Timerlockstatus { #[doc = "0: TIMER registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: TIMER registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TIMERLOCKSTATUS_A) -> Self { + fn from(variant: Timerlockstatus) -> Self { variant as u8 != 0 } } -impl TIMERLOCKSTATUS_R { +#[doc = "Field `TIMERLOCKSTATUS` reader - Timer lock status"] +pub type TimerlockstatusR = crate::BitReader; +impl TimerlockstatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TIMERLOCKSTATUS_A { + pub const fn variant(&self) -> Timerlockstatus { match self.bits { - false => TIMERLOCKSTATUS_A::UNLOCKED, - true => TIMERLOCKSTATUS_A::LOCKED, + false => Timerlockstatus::Unlocked, + true => Timerlockstatus::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "TIMER registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == TIMERLOCKSTATUS_A::UNLOCKED + *self == Timerlockstatus::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "TIMER registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == TIMERLOCKSTATUS_A::LOCKED + *self == Timerlockstatus::Locked } } -#[doc = "Field `DTILOCKSTATUS` reader - DTI lock status"] -pub type DTILOCKSTATUS_R = crate::BitReader; #[doc = "DTI lock status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DTILOCKSTATUS_A { +pub enum Dtilockstatus { #[doc = "0: DTI registers are unlocked"] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: DTI registers are locked"] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DTILOCKSTATUS_A) -> Self { + fn from(variant: Dtilockstatus) -> Self { variant as u8 != 0 } } -impl DTILOCKSTATUS_R { +#[doc = "Field `DTILOCKSTATUS` reader - DTI lock status"] +pub type DtilockstatusR = crate::BitReader; +impl DtilockstatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DTILOCKSTATUS_A { + pub const fn variant(&self) -> Dtilockstatus { match self.bits { - false => DTILOCKSTATUS_A::UNLOCKED, - true => DTILOCKSTATUS_A::LOCKED, + false => Dtilockstatus::Unlocked, + true => Dtilockstatus::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "DTI registers are unlocked"] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == DTILOCKSTATUS_A::UNLOCKED + *self == Dtilockstatus::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "DTI registers are locked"] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == DTILOCKSTATUS_A::LOCKED + *self == Dtilockstatus::Locked } } #[doc = "Field `SYNCBUSY` reader - Sync Busy"] -pub type SYNCBUSY_R = crate::BitReader; +pub type SyncbusyR = crate::BitReader; #[doc = "Field `OCBV0` reader - Output Compare Buffer Valid"] -pub type OCBV0_R = crate::BitReader; +pub type Ocbv0R = crate::BitReader; #[doc = "Field `OCBV1` reader - Output Compare Buffer Valid"] -pub type OCBV1_R = crate::BitReader; +pub type Ocbv1R = crate::BitReader; #[doc = "Field `OCBV2` reader - Output Compare Buffer Valid"] -pub type OCBV2_R = crate::BitReader; +pub type Ocbv2R = crate::BitReader; #[doc = "Field `ICFEMPTY0` reader - Input capture fifo empty"] -pub type ICFEMPTY0_R = crate::BitReader; +pub type Icfempty0R = crate::BitReader; #[doc = "Field `ICFEMPTY1` reader - Input capture fifo empty"] -pub type ICFEMPTY1_R = crate::BitReader; +pub type Icfempty1R = crate::BitReader; #[doc = "Field `ICFEMPTY2` reader - Input capture fifo empty"] -pub type ICFEMPTY2_R = crate::BitReader; -#[doc = "Field `CCPOL0` reader - Compare/Capture Polarity"] -pub type CCPOL0_R = crate::BitReader; +pub type Icfempty2R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL0_A { +pub enum Ccpol0 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL0_A) -> Self { + fn from(variant: Ccpol0) -> Self { variant as u8 != 0 } } -impl CCPOL0_R { +#[doc = "Field `CCPOL0` reader - Compare/Capture Polarity"] +pub type Ccpol0R = crate::BitReader; +impl Ccpol0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL0_A { + pub const fn variant(&self) -> Ccpol0 { match self.bits { - false => CCPOL0_A::LOWRISE, - true => CCPOL0_A::HIGHFALL, + false => Ccpol0::Lowrise, + true => Ccpol0::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL0_A::LOWRISE + *self == Ccpol0::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL0_A::HIGHFALL + *self == Ccpol0::Highfall } } -#[doc = "Field `CCPOL1` reader - Compare/Capture Polarity"] -pub type CCPOL1_R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL1_A { +pub enum Ccpol1 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL1_A) -> Self { + fn from(variant: Ccpol1) -> Self { variant as u8 != 0 } } -impl CCPOL1_R { +#[doc = "Field `CCPOL1` reader - Compare/Capture Polarity"] +pub type Ccpol1R = crate::BitReader; +impl Ccpol1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL1_A { + pub const fn variant(&self) -> Ccpol1 { match self.bits { - false => CCPOL1_A::LOWRISE, - true => CCPOL1_A::HIGHFALL, + false => Ccpol1::Lowrise, + true => Ccpol1::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL1_A::LOWRISE + *self == Ccpol1::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL1_A::HIGHFALL + *self == Ccpol1::Highfall } } -#[doc = "Field `CCPOL2` reader - Compare/Capture Polarity"] -pub type CCPOL2_R = crate::BitReader; #[doc = "Compare/Capture Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCPOL2_A { +pub enum Ccpol2 { #[doc = "0: CCx polarity low level/rising edge"] - LOWRISE = 0, + Lowrise = 0, #[doc = "1: CCx polarity high level/falling edge"] - HIGHFALL = 1, + Highfall = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCPOL2_A) -> Self { + fn from(variant: Ccpol2) -> Self { variant as u8 != 0 } } -impl CCPOL2_R { +#[doc = "Field `CCPOL2` reader - Compare/Capture Polarity"] +pub type Ccpol2R = crate::BitReader; +impl Ccpol2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCPOL2_A { + pub const fn variant(&self) -> Ccpol2 { match self.bits { - false => CCPOL2_A::LOWRISE, - true => CCPOL2_A::HIGHFALL, + false => Ccpol2::Lowrise, + true => Ccpol2::Highfall, } } - #[doc = "Checks if the value of the field is `LOWRISE`"] + #[doc = "CCx polarity low level/rising edge"] #[inline(always)] pub fn is_lowrise(&self) -> bool { - *self == CCPOL2_A::LOWRISE + *self == Ccpol2::Lowrise } - #[doc = "Checks if the value of the field is `HIGHFALL`"] + #[doc = "CCx polarity high level/falling edge"] #[inline(always)] pub fn is_highfall(&self) -> bool { - *self == CCPOL2_A::HIGHFALL + *self == Ccpol2::Highfall } } impl R { #[doc = "Bit 0 - Running"] #[inline(always)] - pub fn running(&self) -> RUNNING_R { - RUNNING_R::new((self.bits & 1) != 0) + pub fn running(&self) -> RunningR { + RunningR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Direction"] #[inline(always)] - pub fn dir(&self) -> DIR_R { - DIR_R::new(((self.bits >> 1) & 1) != 0) + pub fn dir(&self) -> DirR { + DirR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - TOP Buffer Valid"] #[inline(always)] - pub fn topbv(&self) -> TOPBV_R { - TOPBV_R::new(((self.bits >> 2) & 1) != 0) + pub fn topbv(&self) -> TopbvR { + TopbvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Timer lock status"] #[inline(always)] - pub fn timerlockstatus(&self) -> TIMERLOCKSTATUS_R { - TIMERLOCKSTATUS_R::new(((self.bits >> 4) & 1) != 0) + pub fn timerlockstatus(&self) -> TimerlockstatusR { + TimerlockstatusR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DTI lock status"] #[inline(always)] - pub fn dtilockstatus(&self) -> DTILOCKSTATUS_R { - DTILOCKSTATUS_R::new(((self.bits >> 5) & 1) != 0) + pub fn dtilockstatus(&self) -> DtilockstatusR { + DtilockstatusR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Sync Busy"] #[inline(always)] - pub fn syncbusy(&self) -> SYNCBUSY_R { - SYNCBUSY_R::new(((self.bits >> 6) & 1) != 0) + pub fn syncbusy(&self) -> SyncbusyR { + SyncbusyR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv0(&self) -> OCBV0_R { - OCBV0_R::new(((self.bits >> 8) & 1) != 0) + pub fn ocbv0(&self) -> Ocbv0R { + Ocbv0R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv1(&self) -> OCBV1_R { - OCBV1_R::new(((self.bits >> 9) & 1) != 0) + pub fn ocbv1(&self) -> Ocbv1R { + Ocbv1R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Output Compare Buffer Valid"] #[inline(always)] - pub fn ocbv2(&self) -> OCBV2_R { - OCBV2_R::new(((self.bits >> 10) & 1) != 0) + pub fn ocbv2(&self) -> Ocbv2R { + Ocbv2R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 16 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty0(&self) -> ICFEMPTY0_R { - ICFEMPTY0_R::new(((self.bits >> 16) & 1) != 0) + pub fn icfempty0(&self) -> Icfempty0R { + Icfempty0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty1(&self) -> ICFEMPTY1_R { - ICFEMPTY1_R::new(((self.bits >> 17) & 1) != 0) + pub fn icfempty1(&self) -> Icfempty1R { + Icfempty1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Input capture fifo empty"] #[inline(always)] - pub fn icfempty2(&self) -> ICFEMPTY2_R { - ICFEMPTY2_R::new(((self.bits >> 18) & 1) != 0) + pub fn icfempty2(&self) -> Icfempty2R { + Icfempty2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 24 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol0(&self) -> CCPOL0_R { - CCPOL0_R::new(((self.bits >> 24) & 1) != 0) + pub fn ccpol0(&self) -> Ccpol0R { + Ccpol0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol1(&self) -> CCPOL1_R { - CCPOL1_R::new(((self.bits >> 25) & 1) != 0) + pub fn ccpol1(&self) -> Ccpol1R { + Ccpol1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Compare/Capture Polarity"] #[inline(always)] - pub fn ccpol2(&self) -> CCPOL2_R { - CCPOL2_R::new(((self.bits >> 26) & 1) != 0) + pub fn ccpol2(&self) -> Ccpol2R { + Ccpol2R::new(((self.bits >> 26) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/top.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/top.rs index 65df306..6799f48 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/top.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/top.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOP` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOP` reader - Counter Top Value"] -pub type TOP_R = crate::FieldReader; +pub type TopR = crate::FieldReader; #[doc = "Field `TOP` writer - Counter Top Value"] -pub type TOP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOP_SPEC, u16, u16, 16, O>; +pub type TopW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Top Value"] #[inline(always)] - pub fn top(&self) -> TOP_R { - TOP_R::new((self.bits & 0xffff) as u16) + pub fn top(&self) -> TopR { + TopR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Top Value"] #[inline(always)] #[must_use] - pub fn top(&mut self) -> TOP_W<0> { - TOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn top(&mut self) -> TopW { + TopW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [top](index.html) module"] -pub struct TOP_SPEC; -impl crate::RegisterSpec for TOP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`top::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopSpec; +impl crate::RegisterSpec for TopSpec { type Ux = u32; } -#[doc = "`read()` method returns [top::R](R) reader structure"] -impl crate::Readable for TOP_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [top::W](W) writer structure"] -impl crate::Writable for TOP_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`top::R`](R) reader structure"] +impl crate::Readable for TopSpec {} +#[doc = "`write(|w| ..)` method takes [`top::W`](W) writer structure"] +impl crate::Writable for TopSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOP to value 0xffff"] -impl crate::Resettable for TOP_SPEC { - const RESET_VALUE: Self::Ux = 0xffff; +impl crate::Resettable for TopSpec { + const RESET_VALUE: u32 = 0xffff; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/topb.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/topb.rs index 012fd04..e6c7e8c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/topb.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/timer4_s/topb.rs @@ -1,80 +1,40 @@ #[doc = "Register `TOPB` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TOPB` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOPB` reader - Counter Top Buffer Register"] -pub type TOPB_R = crate::FieldReader; +pub type TopbR = crate::FieldReader; #[doc = "Field `TOPB` writer - Counter Top Buffer Register"] -pub type TOPB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TOPB_SPEC, u16, u16, 16, O>; +pub type TopbW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Counter Top Buffer Register"] #[inline(always)] - pub fn topb(&self) -> TOPB_R { - TOPB_R::new((self.bits & 0xffff) as u16) + pub fn topb(&self) -> TopbR { + TopbR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter Top Buffer Register"] #[inline(always)] #[must_use] - pub fn topb(&mut self) -> TOPB_W<0> { - TOPB_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn topb(&mut self) -> TopbW { + TopbW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [topb](index.html) module"] -pub struct TOPB_SPEC; -impl crate::RegisterSpec for TOPB_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`topb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TopbSpec; +impl crate::RegisterSpec for TopbSpec { type Ux = u32; } -#[doc = "`read()` method returns [topb::R](R) reader structure"] -impl crate::Readable for TOPB_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [topb::W](W) writer structure"] -impl crate::Writable for TOPB_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`topb::R`](R) reader structure"] +impl crate::Readable for TopbSpec {} +#[doc = "`write(|w| ..)` method takes [`topb::W`](W) writer structure"] +impl crate::Writable for TopbSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TOPB to value 0"] -impl crate::Resettable for TOPB_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TopbSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_ns.rs index 5c942c1..f8e02f9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_ns.rs @@ -1,30 +1,56 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + ipversion: Ipversion, _reserved1: [u8; 0x04], - #[doc = "0x08 - No Description"] - pub status: STATUS, + status: Status, _reserved2: [u8; 0x08], + if_: If, + ien: Ien, +} +impl RegisterBlock { + #[doc = "0x00 - No Description"] + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } + #[doc = "0x08 - No Description"] + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x14 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x18 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_ns/ien.rs index c304bed..1975225 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_ns/ien.rs @@ -1,110 +1,70 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RDY` reader - Enable Ready Interrupt"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `RDY` writer - Enable Ready Interrupt"] -pub type RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POSEDGE` reader - Enable Positive Edge Interrupt"] -pub type POSEDGE_R = crate::BitReader; +pub type PosedgeR = crate::BitReader; #[doc = "Field `POSEDGE` writer - Enable Positive Edge Interrupt"] -pub type POSEDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PosedgeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NEGEDGE` reader - Enable Negative Edge Interrupt"] -pub type NEGEDGE_R = crate::BitReader; +pub type NegedgeR = crate::BitReader; #[doc = "Field `NEGEDGE` writer - Enable Negative Edge Interrupt"] -pub type NEGEDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type NegedgeW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Enable Ready Interrupt"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Enable Positive Edge Interrupt"] #[inline(always)] - pub fn posedge(&self) -> POSEDGE_R { - POSEDGE_R::new(((self.bits >> 1) & 1) != 0) + pub fn posedge(&self) -> PosedgeR { + PosedgeR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Enable Negative Edge Interrupt"] #[inline(always)] - pub fn negedge(&self) -> NEGEDGE_R { - NEGEDGE_R::new(((self.bits >> 2) & 1) != 0) + pub fn negedge(&self) -> NegedgeR { + NegedgeR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable Ready Interrupt"] #[inline(always)] #[must_use] - pub fn rdy(&mut self) -> RDY_W<0> { - RDY_W::new(self) + pub fn rdy(&mut self) -> RdyW { + RdyW::new(self, 0) } #[doc = "Bit 1 - Enable Positive Edge Interrupt"] #[inline(always)] #[must_use] - pub fn posedge(&mut self) -> POSEDGE_W<1> { - POSEDGE_W::new(self) + pub fn posedge(&mut self) -> PosedgeW { + PosedgeW::new(self, 1) } #[doc = "Bit 2 - Enable Negative Edge Interrupt"] #[inline(always)] #[must_use] - pub fn negedge(&mut self) -> NEGEDGE_W<2> { - NEGEDGE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn negedge(&mut self) -> NegedgeW { + NegedgeW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_ns/if_.rs index b02b32d..a598417 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_ns/if_.rs @@ -1,110 +1,70 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RDY` reader - Ready Interrupt Flag"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `RDY` writer - Ready Interrupt Flag"] -pub type RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POSEDGE` reader - Positive Edge Interrupt Flag"] -pub type POSEDGE_R = crate::BitReader; +pub type PosedgeR = crate::BitReader; #[doc = "Field `POSEDGE` writer - Positive Edge Interrupt Flag"] -pub type POSEDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PosedgeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NEGEDGE` reader - Negative Edge Interrupt Flag"] -pub type NEGEDGE_R = crate::BitReader; +pub type NegedgeR = crate::BitReader; #[doc = "Field `NEGEDGE` writer - Negative Edge Interrupt Flag"] -pub type NEGEDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type NegedgeW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Ready Interrupt Flag"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Positive Edge Interrupt Flag"] #[inline(always)] - pub fn posedge(&self) -> POSEDGE_R { - POSEDGE_R::new(((self.bits >> 1) & 1) != 0) + pub fn posedge(&self) -> PosedgeR { + PosedgeR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Negative Edge Interrupt Flag"] #[inline(always)] - pub fn negedge(&self) -> NEGEDGE_R { - NEGEDGE_R::new(((self.bits >> 2) & 1) != 0) + pub fn negedge(&self) -> NegedgeR { + NegedgeR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Ready Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rdy(&mut self) -> RDY_W<0> { - RDY_W::new(self) + pub fn rdy(&mut self) -> RdyW { + RdyW::new(self, 0) } #[doc = "Bit 1 - Positive Edge Interrupt Flag"] #[inline(always)] #[must_use] - pub fn posedge(&mut self) -> POSEDGE_W<1> { - POSEDGE_W::new(self) + pub fn posedge(&mut self) -> PosedgeW { + PosedgeW::new(self, 1) } #[doc = "Bit 2 - Negative Edge Interrupt Flag"] #[inline(always)] #[must_use] - pub fn negedge(&mut self) -> NEGEDGE_W<2> { - NEGEDGE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn negedge(&mut self) -> NegedgeW { + NegedgeW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_ns/ipversion.rs index e614b37..cbe6369 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - ULFRCO IP version"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - ULFRCO IP version"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_ns/status.rs index 3636c50..4bedd57 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_ns/status.rs @@ -1,44 +1,29 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RDY` reader - Ready Status"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `ENS` reader - Enable Status"] -pub type ENS_R = crate::BitReader; +pub type EnsR = crate::BitReader; impl R { #[doc = "Bit 0 - Ready Status"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 16 - Enable Status"] #[inline(always)] - pub fn ens(&self) -> ENS_R { - ENS_R::new(((self.bits >> 16) & 1) != 0) + pub fn ens(&self) -> EnsR { + EnsR::new(((self.bits >> 16) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_s.rs index 5c942c1..f8e02f9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_s.rs @@ -1,30 +1,56 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + ipversion: Ipversion, _reserved1: [u8; 0x04], - #[doc = "0x08 - No Description"] - pub status: STATUS, + status: Status, _reserved2: [u8; 0x08], + if_: If, + ien: Ien, +} +impl RegisterBlock { + #[doc = "0x00 - No Description"] + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } + #[doc = "0x08 - No Description"] + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x14 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x18 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_s/ien.rs index c304bed..1975225 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_s/ien.rs @@ -1,110 +1,70 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RDY` reader - Enable Ready Interrupt"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `RDY` writer - Enable Ready Interrupt"] -pub type RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POSEDGE` reader - Enable Positive Edge Interrupt"] -pub type POSEDGE_R = crate::BitReader; +pub type PosedgeR = crate::BitReader; #[doc = "Field `POSEDGE` writer - Enable Positive Edge Interrupt"] -pub type POSEDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PosedgeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NEGEDGE` reader - Enable Negative Edge Interrupt"] -pub type NEGEDGE_R = crate::BitReader; +pub type NegedgeR = crate::BitReader; #[doc = "Field `NEGEDGE` writer - Enable Negative Edge Interrupt"] -pub type NEGEDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type NegedgeW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Enable Ready Interrupt"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Enable Positive Edge Interrupt"] #[inline(always)] - pub fn posedge(&self) -> POSEDGE_R { - POSEDGE_R::new(((self.bits >> 1) & 1) != 0) + pub fn posedge(&self) -> PosedgeR { + PosedgeR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Enable Negative Edge Interrupt"] #[inline(always)] - pub fn negedge(&self) -> NEGEDGE_R { - NEGEDGE_R::new(((self.bits >> 2) & 1) != 0) + pub fn negedge(&self) -> NegedgeR { + NegedgeR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable Ready Interrupt"] #[inline(always)] #[must_use] - pub fn rdy(&mut self) -> RDY_W<0> { - RDY_W::new(self) + pub fn rdy(&mut self) -> RdyW { + RdyW::new(self, 0) } #[doc = "Bit 1 - Enable Positive Edge Interrupt"] #[inline(always)] #[must_use] - pub fn posedge(&mut self) -> POSEDGE_W<1> { - POSEDGE_W::new(self) + pub fn posedge(&mut self) -> PosedgeW { + PosedgeW::new(self, 1) } #[doc = "Bit 2 - Enable Negative Edge Interrupt"] #[inline(always)] #[must_use] - pub fn negedge(&mut self) -> NEGEDGE_W<2> { - NEGEDGE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn negedge(&mut self) -> NegedgeW { + NegedgeW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_s/if_.rs index b02b32d..a598417 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_s/if_.rs @@ -1,110 +1,70 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RDY` reader - Ready Interrupt Flag"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `RDY` writer - Ready Interrupt Flag"] -pub type RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RdyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `POSEDGE` reader - Positive Edge Interrupt Flag"] -pub type POSEDGE_R = crate::BitReader; +pub type PosedgeR = crate::BitReader; #[doc = "Field `POSEDGE` writer - Positive Edge Interrupt Flag"] -pub type POSEDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PosedgeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NEGEDGE` reader - Negative Edge Interrupt Flag"] -pub type NEGEDGE_R = crate::BitReader; +pub type NegedgeR = crate::BitReader; #[doc = "Field `NEGEDGE` writer - Negative Edge Interrupt Flag"] -pub type NEGEDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type NegedgeW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Ready Interrupt Flag"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Positive Edge Interrupt Flag"] #[inline(always)] - pub fn posedge(&self) -> POSEDGE_R { - POSEDGE_R::new(((self.bits >> 1) & 1) != 0) + pub fn posedge(&self) -> PosedgeR { + PosedgeR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Negative Edge Interrupt Flag"] #[inline(always)] - pub fn negedge(&self) -> NEGEDGE_R { - NEGEDGE_R::new(((self.bits >> 2) & 1) != 0) + pub fn negedge(&self) -> NegedgeR { + NegedgeR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Ready Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rdy(&mut self) -> RDY_W<0> { - RDY_W::new(self) + pub fn rdy(&mut self) -> RdyW { + RdyW::new(self, 0) } #[doc = "Bit 1 - Positive Edge Interrupt Flag"] #[inline(always)] #[must_use] - pub fn posedge(&mut self) -> POSEDGE_W<1> { - POSEDGE_W::new(self) + pub fn posedge(&mut self) -> PosedgeW { + PosedgeW::new(self, 1) } #[doc = "Bit 2 - Negative Edge Interrupt Flag"] #[inline(always)] #[must_use] - pub fn negedge(&mut self) -> NEGEDGE_W<2> { - NEGEDGE_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn negedge(&mut self) -> NegedgeW { + NegedgeW::new(self, 2) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_s/ipversion.rs index e614b37..cbe6369 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - ULFRCO IP version"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - ULFRCO IP version"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_s/status.rs index 3636c50..4bedd57 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/ulfrco_s/status.rs @@ -1,44 +1,29 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RDY` reader - Ready Status"] -pub type RDY_R = crate::BitReader; +pub type RdyR = crate::BitReader; #[doc = "Field `ENS` reader - Enable Status"] -pub type ENS_R = crate::BitReader; +pub type EnsR = crate::BitReader; impl R { #[doc = "Bit 0 - Ready Status"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new((self.bits & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new((self.bits & 1) != 0) } #[doc = "Bit 16 - Enable Status"] #[inline(always)] - pub fn ens(&self) -> ENS_R { - ENS_R::new(((self.bits >> 16) & 1) != 0) + pub fn ens(&self) -> EnsR { + EnsR::new(((self.bits >> 16) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns.rs index 618abe7..348d869 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns.rs @@ -1,166 +1,330 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + ctrl: Ctrl, + frame: Frame, + trigctrl: Trigctrl, + cmd: Cmd, + status: Status, + clkdiv: Clkdiv, + rxdatax: Rxdatax, + rxdata: Rxdata, + rxdoublex: Rxdoublex, + rxdouble: Rxdouble, + rxdataxp: Rxdataxp, + rxdoublexp: Rxdoublexp, + txdatax: Txdatax, + txdata: Txdata, + txdoublex: Txdoublex, + txdouble: Txdouble, + if_: If, + ien: Ien, + irctrl: Irctrl, + i2sctrl: I2sctrl, + timing: Timing, + ctrlx: Ctrlx, + timecmp0: Timecmp0, + timecmp1: Timecmp1, + timecmp2: Timecmp2, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x0c - No Description"] - pub frame: FRAME, + #[inline(always)] + pub const fn frame(&self) -> &Frame { + &self.frame + } #[doc = "0x10 - No Description"] - pub trigctrl: TRIGCTRL, + #[inline(always)] + pub const fn trigctrl(&self) -> &Trigctrl { + &self.trigctrl + } #[doc = "0x14 - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x18 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x1c - No Description"] - pub clkdiv: CLKDIV, + #[inline(always)] + pub const fn clkdiv(&self) -> &Clkdiv { + &self.clkdiv + } #[doc = "0x20 - No Description"] - pub rxdatax: RXDATAX, + #[inline(always)] + pub const fn rxdatax(&self) -> &Rxdatax { + &self.rxdatax + } #[doc = "0x24 - No Description"] - pub rxdata: RXDATA, + #[inline(always)] + pub const fn rxdata(&self) -> &Rxdata { + &self.rxdata + } #[doc = "0x28 - No Description"] - pub rxdoublex: RXDOUBLEX, + #[inline(always)] + pub const fn rxdoublex(&self) -> &Rxdoublex { + &self.rxdoublex + } #[doc = "0x2c - No Description"] - pub rxdouble: RXDOUBLE, + #[inline(always)] + pub const fn rxdouble(&self) -> &Rxdouble { + &self.rxdouble + } #[doc = "0x30 - No Description"] - pub rxdataxp: RXDATAXP, + #[inline(always)] + pub const fn rxdataxp(&self) -> &Rxdataxp { + &self.rxdataxp + } #[doc = "0x34 - No Description"] - pub rxdoublexp: RXDOUBLEXP, + #[inline(always)] + pub const fn rxdoublexp(&self) -> &Rxdoublexp { + &self.rxdoublexp + } #[doc = "0x38 - No Description"] - pub txdatax: TXDATAX, + #[inline(always)] + pub const fn txdatax(&self) -> &Txdatax { + &self.txdatax + } #[doc = "0x3c - No Description"] - pub txdata: TXDATA, + #[inline(always)] + pub const fn txdata(&self) -> &Txdata { + &self.txdata + } #[doc = "0x40 - No Description"] - pub txdoublex: TXDOUBLEX, + #[inline(always)] + pub const fn txdoublex(&self) -> &Txdoublex { + &self.txdoublex + } #[doc = "0x44 - No Description"] - pub txdouble: TXDOUBLE, + #[inline(always)] + pub const fn txdouble(&self) -> &Txdouble { + &self.txdouble + } #[doc = "0x48 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x4c - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x50 - No Description"] - pub irctrl: IRCTRL, + #[inline(always)] + pub const fn irctrl(&self) -> &Irctrl { + &self.irctrl + } #[doc = "0x54 - No Description"] - pub i2sctrl: I2SCTRL, + #[inline(always)] + pub const fn i2sctrl(&self) -> &I2sctrl { + &self.i2sctrl + } #[doc = "0x58 - No Description"] - pub timing: TIMING, + #[inline(always)] + pub const fn timing(&self) -> &Timing { + &self.timing + } #[doc = "0x5c - No Description"] - pub ctrlx: CTRLX, + #[inline(always)] + pub const fn ctrlx(&self) -> &Ctrlx { + &self.ctrlx + } #[doc = "0x60 - No Description"] - pub timecmp0: TIMECMP0, + #[inline(always)] + pub const fn timecmp0(&self) -> &Timecmp0 { + &self.timecmp0 + } #[doc = "0x64 - No Description"] - pub timecmp1: TIMECMP1, + #[inline(always)] + pub const fn timecmp1(&self) -> &Timecmp1 { + &self.timecmp1 + } #[doc = "0x68 - No Description"] - pub timecmp2: TIMECMP2, + #[inline(always)] + pub const fn timecmp2(&self) -> &Timecmp2 { + &self.timecmp2 + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "FRAME (rw) register accessor: an alias for `Reg`"] -pub type FRAME = crate::Reg; +#[doc = "FRAME (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`frame::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`frame::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@frame`] +module"] +#[doc(alias = "FRAME")] +pub type Frame = crate::Reg; #[doc = "No Description"] pub mod frame; -#[doc = "TRIGCTRL (rw) register accessor: an alias for `Reg`"] -pub type TRIGCTRL = crate::Reg; +#[doc = "TRIGCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`trigctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trigctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trigctrl`] +module"] +#[doc(alias = "TRIGCTRL")] +pub type Trigctrl = crate::Reg; #[doc = "No Description"] pub mod trigctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "CLKDIV (rw) register accessor: an alias for `Reg`"] -pub type CLKDIV = crate::Reg; +#[doc = "CLKDIV (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv`] +module"] +#[doc(alias = "CLKDIV")] +pub type Clkdiv = crate::Reg; #[doc = "No Description"] pub mod clkdiv; -#[doc = "RXDATAX (r) register accessor: an alias for `Reg`"] -pub type RXDATAX = crate::Reg; +#[doc = "RXDATAX (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdatax::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdatax`] +module"] +#[doc(alias = "RXDATAX")] +pub type Rxdatax = crate::Reg; #[doc = "No Description"] pub mod rxdatax; -#[doc = "RXDATA (r) register accessor: an alias for `Reg`"] -pub type RXDATA = crate::Reg; +#[doc = "RXDATA (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdata::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdata`] +module"] +#[doc(alias = "RXDATA")] +pub type Rxdata = crate::Reg; #[doc = "No Description"] pub mod rxdata; -#[doc = "RXDOUBLEX (r) register accessor: an alias for `Reg`"] -pub type RXDOUBLEX = crate::Reg; +#[doc = "RXDOUBLEX (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdoublex::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdoublex`] +module"] +#[doc(alias = "RXDOUBLEX")] +pub type Rxdoublex = crate::Reg; #[doc = "No Description"] pub mod rxdoublex; -#[doc = "RXDOUBLE (r) register accessor: an alias for `Reg`"] -pub type RXDOUBLE = crate::Reg; +#[doc = "RXDOUBLE (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdouble::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdouble`] +module"] +#[doc(alias = "RXDOUBLE")] +pub type Rxdouble = crate::Reg; #[doc = "No Description"] pub mod rxdouble; -#[doc = "RXDATAXP (r) register accessor: an alias for `Reg`"] -pub type RXDATAXP = crate::Reg; +#[doc = "RXDATAXP (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdataxp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdataxp`] +module"] +#[doc(alias = "RXDATAXP")] +pub type Rxdataxp = crate::Reg; #[doc = "No Description"] pub mod rxdataxp; -#[doc = "RXDOUBLEXP (r) register accessor: an alias for `Reg`"] -pub type RXDOUBLEXP = crate::Reg; +#[doc = "RXDOUBLEXP (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdoublexp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdoublexp`] +module"] +#[doc(alias = "RXDOUBLEXP")] +pub type Rxdoublexp = crate::Reg; #[doc = "No Description"] pub mod rxdoublexp; -#[doc = "TXDATAX (w) register accessor: an alias for `Reg`"] -pub type TXDATAX = crate::Reg; +#[doc = "TXDATAX (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdatax::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txdatax`] +module"] +#[doc(alias = "TXDATAX")] +pub type Txdatax = crate::Reg; #[doc = "No Description"] pub mod txdatax; -#[doc = "TXDATA (w) register accessor: an alias for `Reg`"] -pub type TXDATA = crate::Reg; +#[doc = "TXDATA (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdata::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txdata`] +module"] +#[doc(alias = "TXDATA")] +pub type Txdata = crate::Reg; #[doc = "No Description"] pub mod txdata; -#[doc = "TXDOUBLEX (w) register accessor: an alias for `Reg`"] -pub type TXDOUBLEX = crate::Reg; +#[doc = "TXDOUBLEX (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdoublex::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txdoublex`] +module"] +#[doc(alias = "TXDOUBLEX")] +pub type Txdoublex = crate::Reg; #[doc = "No Description"] pub mod txdoublex; -#[doc = "TXDOUBLE (w) register accessor: an alias for `Reg`"] -pub type TXDOUBLE = crate::Reg; +#[doc = "TXDOUBLE (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdouble::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txdouble`] +module"] +#[doc(alias = "TXDOUBLE")] +pub type Txdouble = crate::Reg; #[doc = "No Description"] pub mod txdouble; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "IRCTRL (rw) register accessor: an alias for `Reg`"] -pub type IRCTRL = crate::Reg; +#[doc = "IRCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`irctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irctrl`] +module"] +#[doc(alias = "IRCTRL")] +pub type Irctrl = crate::Reg; #[doc = "No Description"] pub mod irctrl; -#[doc = "I2SCTRL (rw) register accessor: an alias for `Reg`"] -pub type I2SCTRL = crate::Reg; +#[doc = "I2SCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`i2sctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2sctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2sctrl`] +module"] +#[doc(alias = "I2SCTRL")] +pub type I2sctrl = crate::Reg; #[doc = "No Description"] pub mod i2sctrl; -#[doc = "TIMING (rw) register accessor: an alias for `Reg`"] -pub type TIMING = crate::Reg; +#[doc = "TIMING (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timing::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timing::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timing`] +module"] +#[doc(alias = "TIMING")] +pub type Timing = crate::Reg; #[doc = "No Description"] pub mod timing; -#[doc = "CTRLX (rw) register accessor: an alias for `Reg`"] -pub type CTRLX = crate::Reg; +#[doc = "CTRLX (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrlx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrlx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrlx`] +module"] +#[doc(alias = "CTRLX")] +pub type Ctrlx = crate::Reg; #[doc = "No Description"] pub mod ctrlx; -#[doc = "TIMECMP0 (rw) register accessor: an alias for `Reg`"] -pub type TIMECMP0 = crate::Reg; +#[doc = "TIMECMP0 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timecmp0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timecmp0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timecmp0`] +module"] +#[doc(alias = "TIMECMP0")] +pub type Timecmp0 = crate::Reg; #[doc = "No Description"] pub mod timecmp0; -#[doc = "TIMECMP1 (rw) register accessor: an alias for `Reg`"] -pub type TIMECMP1 = crate::Reg; +#[doc = "TIMECMP1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timecmp1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timecmp1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timecmp1`] +module"] +#[doc(alias = "TIMECMP1")] +pub type Timecmp1 = crate::Reg; #[doc = "No Description"] pub mod timecmp1; -#[doc = "TIMECMP2 (rw) register accessor: an alias for `Reg`"] -pub type TIMECMP2 = crate::Reg; +#[doc = "TIMECMP2 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timecmp2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timecmp2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timecmp2`] +module"] +#[doc(alias = "TIMECMP2")] +pub type Timecmp2 = crate::Reg; #[doc = "No Description"] pub mod timecmp2; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/clkdiv.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/clkdiv.rs index ea76849..bfec119 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/clkdiv.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/clkdiv.rs @@ -1,95 +1,55 @@ #[doc = "Register `CLKDIV` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKDIV` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DIV` reader - Fractional Clock Divider"] -pub type DIV_R = crate::FieldReader; +pub type DivR = crate::FieldReader; #[doc = "Field `DIV` writer - Fractional Clock Divider"] -pub type DIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CLKDIV_SPEC, u32, u32, 20, O>; +pub type DivW<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; #[doc = "Field `AUTOBAUDEN` reader - AUTOBAUD detection enable"] -pub type AUTOBAUDEN_R = crate::BitReader; +pub type AutobaudenR = crate::BitReader; #[doc = "Field `AUTOBAUDEN` writer - AUTOBAUD detection enable"] -pub type AUTOBAUDEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKDIV_SPEC, bool, O>; +pub type AutobaudenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 3:22 - Fractional Clock Divider"] #[inline(always)] - pub fn div(&self) -> DIV_R { - DIV_R::new((self.bits >> 3) & 0x000f_ffff) + pub fn div(&self) -> DivR { + DivR::new((self.bits >> 3) & 0x000f_ffff) } #[doc = "Bit 31 - AUTOBAUD detection enable"] #[inline(always)] - pub fn autobauden(&self) -> AUTOBAUDEN_R { - AUTOBAUDEN_R::new(((self.bits >> 31) & 1) != 0) + pub fn autobauden(&self) -> AutobaudenR { + AutobaudenR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 3:22 - Fractional Clock Divider"] #[inline(always)] #[must_use] - pub fn div(&mut self) -> DIV_W<3> { - DIV_W::new(self) + pub fn div(&mut self) -> DivW { + DivW::new(self, 3) } #[doc = "Bit 31 - AUTOBAUD detection enable"] #[inline(always)] #[must_use] - pub fn autobauden(&mut self) -> AUTOBAUDEN_W<31> { - AUTOBAUDEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn autobauden(&mut self) -> AutobaudenW { + AutobaudenW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clkdiv](index.html) module"] -pub struct CLKDIV_SPEC; -impl crate::RegisterSpec for CLKDIV_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ClkdivSpec; +impl crate::RegisterSpec for ClkdivSpec { type Ux = u32; } -#[doc = "`read()` method returns [clkdiv::R](R) reader structure"] -impl crate::Readable for CLKDIV_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clkdiv::W](W) writer structure"] -impl crate::Writable for CLKDIV_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`clkdiv::R`](R) reader structure"] +impl crate::Readable for ClkdivSpec {} +#[doc = "`write(|w| ..)` method takes [`clkdiv::W`](W) writer structure"] +impl crate::Writable for ClkdivSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV to value 0"] -impl crate::Resettable for CLKDIV_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ClkdivSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/cmd.rs index a3cf7e7..a8bb92d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/cmd.rs @@ -1,140 +1,115 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RXEN` writer - Receiver Enable"] -pub type RXEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXDIS` writer - Receiver Disable"] -pub type RXDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXEN` writer - Transmitter Enable"] -pub type TXEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXDIS` writer - Transmitter Disable"] -pub type TXDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MASTEREN` writer - Main Mode Enable"] -pub type MASTEREN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type MasterenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MASTERDIS` writer - Main Mode Disable"] -pub type MASTERDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type MasterdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXBLOCKEN` writer - Receiver Block Enable"] -pub type RXBLOCKEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxblockenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXBLOCKDIS` writer - Receiver Block Disable"] -pub type RXBLOCKDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxblockdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTRIEN` writer - Transmitter Tristate Enable"] -pub type TXTRIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxtrienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTRIDIS` writer - Transmitter Tristate Disable"] -pub type TXTRIDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxtridisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEARTX` writer - Clear TX"] -pub type CLEARTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type CleartxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEARRX` writer - Clear RX"] -pub type CLEARRX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type ClearrxW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Receiver Enable"] #[inline(always)] #[must_use] - pub fn rxen(&mut self) -> RXEN_W<0> { - RXEN_W::new(self) + pub fn rxen(&mut self) -> RxenW { + RxenW::new(self, 0) } #[doc = "Bit 1 - Receiver Disable"] #[inline(always)] #[must_use] - pub fn rxdis(&mut self) -> RXDIS_W<1> { - RXDIS_W::new(self) + pub fn rxdis(&mut self) -> RxdisW { + RxdisW::new(self, 1) } #[doc = "Bit 2 - Transmitter Enable"] #[inline(always)] #[must_use] - pub fn txen(&mut self) -> TXEN_W<2> { - TXEN_W::new(self) + pub fn txen(&mut self) -> TxenW { + TxenW::new(self, 2) } #[doc = "Bit 3 - Transmitter Disable"] #[inline(always)] #[must_use] - pub fn txdis(&mut self) -> TXDIS_W<3> { - TXDIS_W::new(self) + pub fn txdis(&mut self) -> TxdisW { + TxdisW::new(self, 3) } #[doc = "Bit 4 - Main Mode Enable"] #[inline(always)] #[must_use] - pub fn masteren(&mut self) -> MASTEREN_W<4> { - MASTEREN_W::new(self) + pub fn masteren(&mut self) -> MasterenW { + MasterenW::new(self, 4) } #[doc = "Bit 5 - Main Mode Disable"] #[inline(always)] #[must_use] - pub fn masterdis(&mut self) -> MASTERDIS_W<5> { - MASTERDIS_W::new(self) + pub fn masterdis(&mut self) -> MasterdisW { + MasterdisW::new(self, 5) } #[doc = "Bit 6 - Receiver Block Enable"] #[inline(always)] #[must_use] - pub fn rxblocken(&mut self) -> RXBLOCKEN_W<6> { - RXBLOCKEN_W::new(self) + pub fn rxblocken(&mut self) -> RxblockenW { + RxblockenW::new(self, 6) } #[doc = "Bit 7 - Receiver Block Disable"] #[inline(always)] #[must_use] - pub fn rxblockdis(&mut self) -> RXBLOCKDIS_W<7> { - RXBLOCKDIS_W::new(self) + pub fn rxblockdis(&mut self) -> RxblockdisW { + RxblockdisW::new(self, 7) } #[doc = "Bit 8 - Transmitter Tristate Enable"] #[inline(always)] #[must_use] - pub fn txtrien(&mut self) -> TXTRIEN_W<8> { - TXTRIEN_W::new(self) + pub fn txtrien(&mut self) -> TxtrienW { + TxtrienW::new(self, 8) } #[doc = "Bit 9 - Transmitter Tristate Disable"] #[inline(always)] #[must_use] - pub fn txtridis(&mut self) -> TXTRIDIS_W<9> { - TXTRIDIS_W::new(self) + pub fn txtridis(&mut self) -> TxtridisW { + TxtridisW::new(self, 9) } #[doc = "Bit 10 - Clear TX"] #[inline(always)] #[must_use] - pub fn cleartx(&mut self) -> CLEARTX_W<10> { - CLEARTX_W::new(self) + pub fn cleartx(&mut self) -> CleartxW { + CleartxW::new(self, 10) } #[doc = "Bit 11 - Clear RX"] #[inline(always)] #[must_use] - pub fn clearrx(&mut self) -> CLEARRX_W<11> { - CLEARRX_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clearrx(&mut self) -> ClearrxW { + ClearrxW::new(self, 11) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/ctrl.rs index 895cb48..8a0ac96 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/ctrl.rs @@ -1,249 +1,227 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SYNC` reader - USART Synchronous Mode"] -pub type SYNC_R = crate::BitReader; +pub type W = crate::W; #[doc = "USART Synchronous Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYNC_A { +pub enum Sync { #[doc = "0: The USART operates in asynchronous mode"] - DISABLE = 0, + Disable = 0, #[doc = "1: The USART operates in synchronous mode"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYNC_A) -> Self { + fn from(variant: Sync) -> Self { variant as u8 != 0 } } -impl SYNC_R { +#[doc = "Field `SYNC` reader - USART Synchronous Mode"] +pub type SyncR = crate::BitReader; +impl SyncR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SYNC_A { + pub const fn variant(&self) -> Sync { match self.bits { - false => SYNC_A::DISABLE, - true => SYNC_A::ENABLE, + false => Sync::Disable, + true => Sync::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The USART operates in asynchronous mode"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == SYNC_A::DISABLE + *self == Sync::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The USART operates in synchronous mode"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == SYNC_A::ENABLE + *self == Sync::Enable } } #[doc = "Field `SYNC` writer - USART Synchronous Mode"] -pub type SYNC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, SYNC_A, O>; -impl<'a, const O: u8> SYNC_W<'a, O> { +pub type SyncW<'a, REG> = crate::BitWriter<'a, REG, Sync>; +impl<'a, REG> SyncW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The USART operates in asynchronous mode"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(SYNC_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Sync::Disable) } #[doc = "The USART operates in synchronous mode"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(SYNC_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Sync::Enable) } } -#[doc = "Field `LOOPBK` reader - Loopback Enable"] -pub type LOOPBK_R = crate::BitReader; #[doc = "Loopback Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOOPBK_A { +pub enum Loopbk { #[doc = "0: The receiver is connected to and receives data from U(S)n_RX"] - DISABLE = 0, + Disable = 0, #[doc = "1: The receiver is connected to and receives data from U(S)n_TX"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOOPBK_A) -> Self { + fn from(variant: Loopbk) -> Self { variant as u8 != 0 } } -impl LOOPBK_R { +#[doc = "Field `LOOPBK` reader - Loopback Enable"] +pub type LoopbkR = crate::BitReader; +impl LoopbkR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOOPBK_A { + pub const fn variant(&self) -> Loopbk { match self.bits { - false => LOOPBK_A::DISABLE, - true => LOOPBK_A::ENABLE, + false => Loopbk::Disable, + true => Loopbk::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The receiver is connected to and receives data from U(S)n_RX"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == LOOPBK_A::DISABLE + *self == Loopbk::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The receiver is connected to and receives data from U(S)n_TX"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == LOOPBK_A::ENABLE + *self == Loopbk::Enable } } #[doc = "Field `LOOPBK` writer - Loopback Enable"] -pub type LOOPBK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, LOOPBK_A, O>; -impl<'a, const O: u8> LOOPBK_W<'a, O> { +pub type LoopbkW<'a, REG> = crate::BitWriter<'a, REG, Loopbk>; +impl<'a, REG> LoopbkW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The receiver is connected to and receives data from U(S)n_RX"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(LOOPBK_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Loopbk::Disable) } #[doc = "The receiver is connected to and receives data from U(S)n_TX"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(LOOPBK_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Loopbk::Enable) } } -#[doc = "Field `CCEN` reader - Collision Check Enable"] -pub type CCEN_R = crate::BitReader; #[doc = "Collision Check Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCEN_A { +pub enum Ccen { #[doc = "0: Collision check is disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Collision check is enabled. The receiver must be enabled for the check to be performed"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCEN_A) -> Self { + fn from(variant: Ccen) -> Self { variant as u8 != 0 } } -impl CCEN_R { +#[doc = "Field `CCEN` reader - Collision Check Enable"] +pub type CcenR = crate::BitReader; +impl CcenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCEN_A { + pub const fn variant(&self) -> Ccen { match self.bits { - false => CCEN_A::DISABLE, - true => CCEN_A::ENABLE, + false => Ccen::Disable, + true => Ccen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Collision check is disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CCEN_A::DISABLE + *self == Ccen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Collision check is enabled. The receiver must be enabled for the check to be performed"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CCEN_A::ENABLE + *self == Ccen::Enable } } #[doc = "Field `CCEN` writer - Collision Check Enable"] -pub type CCEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, CCEN_A, O>; -impl<'a, const O: u8> CCEN_W<'a, O> { +pub type CcenW<'a, REG> = crate::BitWriter<'a, REG, Ccen>; +impl<'a, REG> CcenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Collision check is disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CCEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ccen::Disable) } #[doc = "Collision check is enabled. The receiver must be enabled for the check to be performed"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CCEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Ccen::Enable) } } -#[doc = "Field `MPM` reader - Multi-Processor Mode"] -pub type MPM_R = crate::BitReader; #[doc = "Multi-Processor Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MPM_A { +pub enum Mpm { #[doc = "0: The 9th bit of incoming frames has no special function"] - DISABLE = 0, + Disable = 0, #[doc = "1: An incoming frame with the 9th bit equal to MPAB will be loaded into the receive buffer regardless of RXBLOCK and will result in the MPAB interrupt flag being set"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MPM_A) -> Self { + fn from(variant: Mpm) -> Self { variant as u8 != 0 } } -impl MPM_R { +#[doc = "Field `MPM` reader - Multi-Processor Mode"] +pub type MpmR = crate::BitReader; +impl MpmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MPM_A { + pub const fn variant(&self) -> Mpm { match self.bits { - false => MPM_A::DISABLE, - true => MPM_A::ENABLE, + false => Mpm::Disable, + true => Mpm::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The 9th bit of incoming frames has no special function"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == MPM_A::DISABLE + *self == Mpm::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "An incoming frame with the 9th bit equal to MPAB will be loaded into the receive buffer regardless of RXBLOCK and will result in the MPAB interrupt flag being set"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == MPM_A::ENABLE + *self == Mpm::Enable } } #[doc = "Field `MPM` writer - Multi-Processor Mode"] -pub type MPM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, MPM_A, O>; -impl<'a, const O: u8> MPM_W<'a, O> { +pub type MpmW<'a, REG> = crate::BitWriter<'a, REG, Mpm>; +impl<'a, REG> MpmW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The 9th bit of incoming frames has no special function"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(MPM_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Mpm::Disable) } #[doc = "An incoming frame with the 9th bit equal to MPAB will be loaded into the receive buffer regardless of RXBLOCK and will result in the MPAB interrupt flag being set"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(MPM_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Mpm::Enable) } } #[doc = "Field `MPAB` reader - Multi-Processor Address-Bit"] -pub type MPAB_R = crate::BitReader; +pub type MpabR = crate::BitReader; #[doc = "Field `MPAB` writer - Multi-Processor Address-Bit"] -pub type MPAB_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; -#[doc = "Field `OVS` reader - Oversampling"] -pub type OVS_R = crate::FieldReader; +pub type MpabW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Oversampling\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum OVS_A { +pub enum Ovs { #[doc = "0: Regular UART mode with 16X oversampling in asynchronous mode"] X16 = 0, #[doc = "1: Double speed with 8X oversampling in asynchronous mode"] @@ -253,1089 +231,1130 @@ pub enum OVS_A { #[doc = "3: Quadruple speed with 4X oversampling in asynchronous mode"] X4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: OVS_A) -> Self { + fn from(variant: Ovs) -> Self { variant as _ } } -impl OVS_R { +impl crate::FieldSpec for Ovs { + type Ux = u8; +} +impl crate::IsEnum for Ovs {} +#[doc = "Field `OVS` reader - Oversampling"] +pub type OvsR = crate::FieldReader; +impl OvsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> OVS_A { + pub const fn variant(&self) -> Ovs { match self.bits { - 0 => OVS_A::X16, - 1 => OVS_A::X8, - 2 => OVS_A::X6, - 3 => OVS_A::X4, + 0 => Ovs::X16, + 1 => Ovs::X8, + 2 => Ovs::X6, + 3 => Ovs::X4, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `X16`"] + #[doc = "Regular UART mode with 16X oversampling in asynchronous mode"] #[inline(always)] pub fn is_x16(&self) -> bool { - *self == OVS_A::X16 + *self == Ovs::X16 } - #[doc = "Checks if the value of the field is `X8`"] + #[doc = "Double speed with 8X oversampling in asynchronous mode"] #[inline(always)] pub fn is_x8(&self) -> bool { - *self == OVS_A::X8 + *self == Ovs::X8 } - #[doc = "Checks if the value of the field is `X6`"] + #[doc = "6X oversampling in asynchronous mode"] #[inline(always)] pub fn is_x6(&self) -> bool { - *self == OVS_A::X6 + *self == Ovs::X6 } - #[doc = "Checks if the value of the field is `X4`"] + #[doc = "Quadruple speed with 4X oversampling in asynchronous mode"] #[inline(always)] pub fn is_x4(&self) -> bool { - *self == OVS_A::X4 + *self == Ovs::X4 } } #[doc = "Field `OVS` writer - Oversampling"] -pub type OVS_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, OVS_A, 2, O>; -impl<'a, const O: u8> OVS_W<'a, O> { +pub type OvsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Ovs, crate::Safe>; +impl<'a, REG> OvsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Regular UART mode with 16X oversampling in asynchronous mode"] #[inline(always)] - pub fn x16(self) -> &'a mut W { - self.variant(OVS_A::X16) + pub fn x16(self) -> &'a mut crate::W { + self.variant(Ovs::X16) } #[doc = "Double speed with 8X oversampling in asynchronous mode"] #[inline(always)] - pub fn x8(self) -> &'a mut W { - self.variant(OVS_A::X8) + pub fn x8(self) -> &'a mut crate::W { + self.variant(Ovs::X8) } #[doc = "6X oversampling in asynchronous mode"] #[inline(always)] - pub fn x6(self) -> &'a mut W { - self.variant(OVS_A::X6) + pub fn x6(self) -> &'a mut crate::W { + self.variant(Ovs::X6) } #[doc = "Quadruple speed with 4X oversampling in asynchronous mode"] #[inline(always)] - pub fn x4(self) -> &'a mut W { - self.variant(OVS_A::X4) + pub fn x4(self) -> &'a mut crate::W { + self.variant(Ovs::X4) } } -#[doc = "Field `CLKPOL` reader - Clock Polarity"] -pub type CLKPOL_R = crate::BitReader; #[doc = "Clock Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLKPOL_A { +pub enum Clkpol { #[doc = "0: The bus clock used in synchronous mode has a low base value"] - IDLELOW = 0, + Idlelow = 0, #[doc = "1: The bus clock used in synchronous mode has a high base value"] - IDLEHIGH = 1, + Idlehigh = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLKPOL_A) -> Self { + fn from(variant: Clkpol) -> Self { variant as u8 != 0 } } -impl CLKPOL_R { +#[doc = "Field `CLKPOL` reader - Clock Polarity"] +pub type ClkpolR = crate::BitReader; +impl ClkpolR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CLKPOL_A { + pub const fn variant(&self) -> Clkpol { match self.bits { - false => CLKPOL_A::IDLELOW, - true => CLKPOL_A::IDLEHIGH, + false => Clkpol::Idlelow, + true => Clkpol::Idlehigh, } } - #[doc = "Checks if the value of the field is `IDLELOW`"] + #[doc = "The bus clock used in synchronous mode has a low base value"] #[inline(always)] pub fn is_idlelow(&self) -> bool { - *self == CLKPOL_A::IDLELOW + *self == Clkpol::Idlelow } - #[doc = "Checks if the value of the field is `IDLEHIGH`"] + #[doc = "The bus clock used in synchronous mode has a high base value"] #[inline(always)] pub fn is_idlehigh(&self) -> bool { - *self == CLKPOL_A::IDLEHIGH + *self == Clkpol::Idlehigh } } #[doc = "Field `CLKPOL` writer - Clock Polarity"] -pub type CLKPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, CLKPOL_A, O>; -impl<'a, const O: u8> CLKPOL_W<'a, O> { +pub type ClkpolW<'a, REG> = crate::BitWriter<'a, REG, Clkpol>; +impl<'a, REG> ClkpolW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The bus clock used in synchronous mode has a low base value"] #[inline(always)] - pub fn idlelow(self) -> &'a mut W { - self.variant(CLKPOL_A::IDLELOW) + pub fn idlelow(self) -> &'a mut crate::W { + self.variant(Clkpol::Idlelow) } #[doc = "The bus clock used in synchronous mode has a high base value"] #[inline(always)] - pub fn idlehigh(self) -> &'a mut W { - self.variant(CLKPOL_A::IDLEHIGH) + pub fn idlehigh(self) -> &'a mut crate::W { + self.variant(Clkpol::Idlehigh) } } -#[doc = "Field `CLKPHA` reader - Clock Edge For Setup/Sample"] -pub type CLKPHA_R = crate::BitReader; #[doc = "Clock Edge For Setup/Sample\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLKPHA_A { +pub enum Clkpha { #[doc = "0: Data is sampled on the leading edge and set-up on the trailing edge of the bus clock in synchronous mode"] - SAMPLELEADING = 0, + Sampleleading = 0, #[doc = "1: Data is set-up on the leading edge and sampled on the trailing edge of the bus clock in synchronous mode"] - SAMPLETRAILING = 1, + Sampletrailing = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLKPHA_A) -> Self { + fn from(variant: Clkpha) -> Self { variant as u8 != 0 } } -impl CLKPHA_R { +#[doc = "Field `CLKPHA` reader - Clock Edge For Setup/Sample"] +pub type ClkphaR = crate::BitReader; +impl ClkphaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CLKPHA_A { + pub const fn variant(&self) -> Clkpha { match self.bits { - false => CLKPHA_A::SAMPLELEADING, - true => CLKPHA_A::SAMPLETRAILING, + false => Clkpha::Sampleleading, + true => Clkpha::Sampletrailing, } } - #[doc = "Checks if the value of the field is `SAMPLELEADING`"] + #[doc = "Data is sampled on the leading edge and set-up on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] pub fn is_sampleleading(&self) -> bool { - *self == CLKPHA_A::SAMPLELEADING + *self == Clkpha::Sampleleading } - #[doc = "Checks if the value of the field is `SAMPLETRAILING`"] + #[doc = "Data is set-up on the leading edge and sampled on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] pub fn is_sampletrailing(&self) -> bool { - *self == CLKPHA_A::SAMPLETRAILING + *self == Clkpha::Sampletrailing } } #[doc = "Field `CLKPHA` writer - Clock Edge For Setup/Sample"] -pub type CLKPHA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, CLKPHA_A, O>; -impl<'a, const O: u8> CLKPHA_W<'a, O> { +pub type ClkphaW<'a, REG> = crate::BitWriter<'a, REG, Clkpha>; +impl<'a, REG> ClkphaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Data is sampled on the leading edge and set-up on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] - pub fn sampleleading(self) -> &'a mut W { - self.variant(CLKPHA_A::SAMPLELEADING) + pub fn sampleleading(self) -> &'a mut crate::W { + self.variant(Clkpha::Sampleleading) } #[doc = "Data is set-up on the leading edge and sampled on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] - pub fn sampletrailing(self) -> &'a mut W { - self.variant(CLKPHA_A::SAMPLETRAILING) + pub fn sampletrailing(self) -> &'a mut crate::W { + self.variant(Clkpha::Sampletrailing) } } -#[doc = "Field `MSBF` reader - Most Significant Bit First"] -pub type MSBF_R = crate::BitReader; #[doc = "Most Significant Bit First\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MSBF_A { +pub enum Msbf { #[doc = "0: Data is sent with the least significant bit first"] - DISABLE = 0, + Disable = 0, #[doc = "1: Data is sent with the most significant bit first"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MSBF_A) -> Self { + fn from(variant: Msbf) -> Self { variant as u8 != 0 } } -impl MSBF_R { +#[doc = "Field `MSBF` reader - Most Significant Bit First"] +pub type MsbfR = crate::BitReader; +impl MsbfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MSBF_A { + pub const fn variant(&self) -> Msbf { match self.bits { - false => MSBF_A::DISABLE, - true => MSBF_A::ENABLE, + false => Msbf::Disable, + true => Msbf::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Data is sent with the least significant bit first"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == MSBF_A::DISABLE + *self == Msbf::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Data is sent with the most significant bit first"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == MSBF_A::ENABLE + *self == Msbf::Enable } } #[doc = "Field `MSBF` writer - Most Significant Bit First"] -pub type MSBF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, MSBF_A, O>; -impl<'a, const O: u8> MSBF_W<'a, O> { +pub type MsbfW<'a, REG> = crate::BitWriter<'a, REG, Msbf>; +impl<'a, REG> MsbfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Data is sent with the least significant bit first"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(MSBF_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Msbf::Disable) } #[doc = "Data is sent with the most significant bit first"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(MSBF_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Msbf::Enable) } } -#[doc = "Field `CSMA` reader - Action On Chip Select In Main Mode"] -pub type CSMA_R = crate::BitReader; #[doc = "Action On Chip Select In Main Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CSMA_A { +pub enum Csma { #[doc = "0: No action taken"] - NOACTION = 0, + Noaction = 0, #[doc = "1: Go to secondary mode"] - GOTOSLAVEMODE = 1, + Gotoslavemode = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CSMA_A) -> Self { + fn from(variant: Csma) -> Self { variant as u8 != 0 } } -impl CSMA_R { +#[doc = "Field `CSMA` reader - Action On Chip Select In Main Mode"] +pub type CsmaR = crate::BitReader; +impl CsmaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CSMA_A { + pub const fn variant(&self) -> Csma { match self.bits { - false => CSMA_A::NOACTION, - true => CSMA_A::GOTOSLAVEMODE, + false => Csma::Noaction, + true => Csma::Gotoslavemode, } } - #[doc = "Checks if the value of the field is `NOACTION`"] + #[doc = "No action taken"] #[inline(always)] pub fn is_noaction(&self) -> bool { - *self == CSMA_A::NOACTION + *self == Csma::Noaction } - #[doc = "Checks if the value of the field is `GOTOSLAVEMODE`"] + #[doc = "Go to secondary mode"] #[inline(always)] pub fn is_gotoslavemode(&self) -> bool { - *self == CSMA_A::GOTOSLAVEMODE + *self == Csma::Gotoslavemode } } #[doc = "Field `CSMA` writer - Action On Chip Select In Main Mode"] -pub type CSMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, CSMA_A, O>; -impl<'a, const O: u8> CSMA_W<'a, O> { +pub type CsmaW<'a, REG> = crate::BitWriter<'a, REG, Csma>; +impl<'a, REG> CsmaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No action taken"] #[inline(always)] - pub fn noaction(self) -> &'a mut W { - self.variant(CSMA_A::NOACTION) + pub fn noaction(self) -> &'a mut crate::W { + self.variant(Csma::Noaction) } #[doc = "Go to secondary mode"] #[inline(always)] - pub fn gotoslavemode(self) -> &'a mut W { - self.variant(CSMA_A::GOTOSLAVEMODE) + pub fn gotoslavemode(self) -> &'a mut crate::W { + self.variant(Csma::Gotoslavemode) } } -#[doc = "Field `TXBIL` reader - TX Buffer Interrupt Level"] -pub type TXBIL_R = crate::BitReader; #[doc = "TX Buffer Interrupt Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TXBIL_A { +pub enum Txbil { #[doc = "0: TXBL and the TXBL interrupt flag are set when the transmit buffer becomes empty. TXBL is cleared when the buffer becomes nonempty."] - EMPTY = 0, + Empty = 0, #[doc = "1: TXBL and TXBLIF are set when the transmit buffer goes from full to half-full or empty. TXBL is cleared when the buffer becomes full."] - HALFFULL = 1, + Halffull = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TXBIL_A) -> Self { + fn from(variant: Txbil) -> Self { variant as u8 != 0 } } -impl TXBIL_R { +#[doc = "Field `TXBIL` reader - TX Buffer Interrupt Level"] +pub type TxbilR = crate::BitReader; +impl TxbilR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXBIL_A { + pub const fn variant(&self) -> Txbil { match self.bits { - false => TXBIL_A::EMPTY, - true => TXBIL_A::HALFFULL, + false => Txbil::Empty, + true => Txbil::Halffull, } } - #[doc = "Checks if the value of the field is `EMPTY`"] + #[doc = "TXBL and the TXBL interrupt flag are set when the transmit buffer becomes empty. TXBL is cleared when the buffer becomes nonempty."] #[inline(always)] pub fn is_empty(&self) -> bool { - *self == TXBIL_A::EMPTY + *self == Txbil::Empty } - #[doc = "Checks if the value of the field is `HALFFULL`"] + #[doc = "TXBL and TXBLIF are set when the transmit buffer goes from full to half-full or empty. TXBL is cleared when the buffer becomes full."] #[inline(always)] pub fn is_halffull(&self) -> bool { - *self == TXBIL_A::HALFFULL + *self == Txbil::Halffull } } #[doc = "Field `TXBIL` writer - TX Buffer Interrupt Level"] -pub type TXBIL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, TXBIL_A, O>; -impl<'a, const O: u8> TXBIL_W<'a, O> { +pub type TxbilW<'a, REG> = crate::BitWriter<'a, REG, Txbil>; +impl<'a, REG> TxbilW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "TXBL and the TXBL interrupt flag are set when the transmit buffer becomes empty. TXBL is cleared when the buffer becomes nonempty."] #[inline(always)] - pub fn empty(self) -> &'a mut W { - self.variant(TXBIL_A::EMPTY) + pub fn empty(self) -> &'a mut crate::W { + self.variant(Txbil::Empty) } #[doc = "TXBL and TXBLIF are set when the transmit buffer goes from full to half-full or empty. TXBL is cleared when the buffer becomes full."] #[inline(always)] - pub fn halffull(self) -> &'a mut W { - self.variant(TXBIL_A::HALFFULL) + pub fn halffull(self) -> &'a mut crate::W { + self.variant(Txbil::Halffull) } } -#[doc = "Field `RXINV` reader - Receiver Input Invert"] -pub type RXINV_R = crate::BitReader; #[doc = "Receiver Input Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RXINV_A { +pub enum Rxinv { #[doc = "0: Input is passed directly to the receiver"] - DISABLE = 0, + Disable = 0, #[doc = "1: Input is inverted before it is passed to the receiver"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RXINV_A) -> Self { + fn from(variant: Rxinv) -> Self { variant as u8 != 0 } } -impl RXINV_R { +#[doc = "Field `RXINV` reader - Receiver Input Invert"] +pub type RxinvR = crate::BitReader; +impl RxinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RXINV_A { + pub const fn variant(&self) -> Rxinv { match self.bits { - false => RXINV_A::DISABLE, - true => RXINV_A::ENABLE, + false => Rxinv::Disable, + true => Rxinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Input is passed directly to the receiver"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RXINV_A::DISABLE + *self == Rxinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Input is inverted before it is passed to the receiver"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RXINV_A::ENABLE + *self == Rxinv::Enable } } #[doc = "Field `RXINV` writer - Receiver Input Invert"] -pub type RXINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, RXINV_A, O>; -impl<'a, const O: u8> RXINV_W<'a, O> { +pub type RxinvW<'a, REG> = crate::BitWriter<'a, REG, Rxinv>; +impl<'a, REG> RxinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Input is passed directly to the receiver"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RXINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Rxinv::Disable) } #[doc = "Input is inverted before it is passed to the receiver"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RXINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Rxinv::Enable) } } -#[doc = "Field `TXINV` reader - Transmitter output Invert"] -pub type TXINV_R = crate::BitReader; #[doc = "Transmitter output Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TXINV_A { +pub enum Txinv { #[doc = "0: Output from the transmitter is passed unchanged to U(S)n_TX"] - DISABLE = 0, + Disable = 0, #[doc = "1: Output from the transmitter is inverted before it is passed to U(S)n_TX"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TXINV_A) -> Self { + fn from(variant: Txinv) -> Self { variant as u8 != 0 } } -impl TXINV_R { +#[doc = "Field `TXINV` reader - Transmitter output Invert"] +pub type TxinvR = crate::BitReader; +impl TxinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXINV_A { + pub const fn variant(&self) -> Txinv { match self.bits { - false => TXINV_A::DISABLE, - true => TXINV_A::ENABLE, + false => Txinv::Disable, + true => Txinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Output from the transmitter is passed unchanged to U(S)n_TX"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == TXINV_A::DISABLE + *self == Txinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Output from the transmitter is inverted before it is passed to U(S)n_TX"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == TXINV_A::ENABLE + *self == Txinv::Enable } } #[doc = "Field `TXINV` writer - Transmitter output Invert"] -pub type TXINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, TXINV_A, O>; -impl<'a, const O: u8> TXINV_W<'a, O> { +pub type TxinvW<'a, REG> = crate::BitWriter<'a, REG, Txinv>; +impl<'a, REG> TxinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Output from the transmitter is passed unchanged to U(S)n_TX"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(TXINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Txinv::Disable) } #[doc = "Output from the transmitter is inverted before it is passed to U(S)n_TX"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(TXINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Txinv::Enable) } } -#[doc = "Field `CSINV` reader - Chip Select Invert"] -pub type CSINV_R = crate::BitReader; #[doc = "Chip Select Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CSINV_A { +pub enum Csinv { #[doc = "0: Chip select is active low"] - DISABLE = 0, + Disable = 0, #[doc = "1: Chip select is active high"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CSINV_A) -> Self { + fn from(variant: Csinv) -> Self { variant as u8 != 0 } } -impl CSINV_R { +#[doc = "Field `CSINV` reader - Chip Select Invert"] +pub type CsinvR = crate::BitReader; +impl CsinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CSINV_A { + pub const fn variant(&self) -> Csinv { match self.bits { - false => CSINV_A::DISABLE, - true => CSINV_A::ENABLE, + false => Csinv::Disable, + true => Csinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Chip select is active low"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CSINV_A::DISABLE + *self == Csinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Chip select is active high"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CSINV_A::ENABLE + *self == Csinv::Enable } } #[doc = "Field `CSINV` writer - Chip Select Invert"] -pub type CSINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, CSINV_A, O>; -impl<'a, const O: u8> CSINV_W<'a, O> { +pub type CsinvW<'a, REG> = crate::BitWriter<'a, REG, Csinv>; +impl<'a, REG> CsinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Chip select is active low"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CSINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Csinv::Disable) } #[doc = "Chip select is active high"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CSINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Csinv::Enable) } } #[doc = "Field `AUTOCS` reader - Automatic Chip Select"] -pub type AUTOCS_R = crate::BitReader; +pub type AutocsR = crate::BitReader; #[doc = "Field `AUTOCS` writer - Automatic Chip Select"] -pub type AUTOCS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; -#[doc = "Field `AUTOTRI` reader - Automatic TX Tristate"] -pub type AUTOTRI_R = crate::BitReader; +pub type AutocsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Automatic TX Tristate\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AUTOTRI_A { +pub enum Autotri { #[doc = "0: The output on U(S)n_TX when the transmitter is idle is defined by TXINV"] - DISABLE = 0, + Disable = 0, #[doc = "1: U(S)n_TX is tristated whenever the transmitter is idle"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AUTOTRI_A) -> Self { + fn from(variant: Autotri) -> Self { variant as u8 != 0 } } -impl AUTOTRI_R { +#[doc = "Field `AUTOTRI` reader - Automatic TX Tristate"] +pub type AutotriR = crate::BitReader; +impl AutotriR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> AUTOTRI_A { + pub const fn variant(&self) -> Autotri { match self.bits { - false => AUTOTRI_A::DISABLE, - true => AUTOTRI_A::ENABLE, + false => Autotri::Disable, + true => Autotri::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The output on U(S)n_TX when the transmitter is idle is defined by TXINV"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == AUTOTRI_A::DISABLE + *self == Autotri::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "U(S)n_TX is tristated whenever the transmitter is idle"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == AUTOTRI_A::ENABLE + *self == Autotri::Enable } } #[doc = "Field `AUTOTRI` writer - Automatic TX Tristate"] -pub type AUTOTRI_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, AUTOTRI_A, O>; -impl<'a, const O: u8> AUTOTRI_W<'a, O> { +pub type AutotriW<'a, REG> = crate::BitWriter<'a, REG, Autotri>; +impl<'a, REG> AutotriW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The output on U(S)n_TX when the transmitter is idle is defined by TXINV"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(AUTOTRI_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Autotri::Disable) } #[doc = "U(S)n_TX is tristated whenever the transmitter is idle"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(AUTOTRI_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Autotri::Enable) } } #[doc = "Field `SCMODE` reader - SmartCard Mode"] -pub type SCMODE_R = crate::BitReader; +pub type ScmodeR = crate::BitReader; #[doc = "Field `SCMODE` writer - SmartCard Mode"] -pub type SCMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type ScmodeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCRETRANS` reader - SmartCard Retransmit"] -pub type SCRETRANS_R = crate::BitReader; +pub type ScretransR = crate::BitReader; #[doc = "Field `SCRETRANS` writer - SmartCard Retransmit"] -pub type SCRETRANS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type ScretransW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SKIPPERRF` reader - Skip Parity Error Frames"] -pub type SKIPPERRF_R = crate::BitReader; +pub type SkipperrfR = crate::BitReader; #[doc = "Field `SKIPPERRF` writer - Skip Parity Error Frames"] -pub type SKIPPERRF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type SkipperrfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BIT8DV` reader - Bit 8 Default Value"] -pub type BIT8DV_R = crate::BitReader; +pub type Bit8dvR = crate::BitReader; #[doc = "Field `BIT8DV` writer - Bit 8 Default Value"] -pub type BIT8DV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; -#[doc = "Field `ERRSDMA` reader - Halt DMA On Error"] -pub type ERRSDMA_R = crate::BitReader; +pub type Bit8dvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Halt DMA On Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRSDMA_A { +pub enum Errsdma { #[doc = "0: Framing and parity errors have no effect on DMA requests from the USART"] - DISABLE = 0, + Disable = 0, #[doc = "1: DMA requests from the USART are blocked while the PERR or FERR interrupt flags are set"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRSDMA_A) -> Self { + fn from(variant: Errsdma) -> Self { variant as u8 != 0 } } -impl ERRSDMA_R { +#[doc = "Field `ERRSDMA` reader - Halt DMA On Error"] +pub type ErrsdmaR = crate::BitReader; +impl ErrsdmaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ERRSDMA_A { + pub const fn variant(&self) -> Errsdma { match self.bits { - false => ERRSDMA_A::DISABLE, - true => ERRSDMA_A::ENABLE, + false => Errsdma::Disable, + true => Errsdma::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Framing and parity errors have no effect on DMA requests from the USART"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ERRSDMA_A::DISABLE + *self == Errsdma::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "DMA requests from the USART are blocked while the PERR or FERR interrupt flags are set"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ERRSDMA_A::ENABLE + *self == Errsdma::Enable } } #[doc = "Field `ERRSDMA` writer - Halt DMA On Error"] -pub type ERRSDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, ERRSDMA_A, O>; -impl<'a, const O: u8> ERRSDMA_W<'a, O> { +pub type ErrsdmaW<'a, REG> = crate::BitWriter<'a, REG, Errsdma>; +impl<'a, REG> ErrsdmaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Framing and parity errors have no effect on DMA requests from the USART"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ERRSDMA_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Errsdma::Disable) } #[doc = "DMA requests from the USART are blocked while the PERR or FERR interrupt flags are set"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ERRSDMA_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Errsdma::Enable) } } -#[doc = "Field `ERRSRX` reader - Disable RX On Error"] -pub type ERRSRX_R = crate::BitReader; #[doc = "Disable RX On Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRSRX_A { +pub enum Errsrx { #[doc = "0: Framing and parity errors have no effect on receiver"] - DISABLE = 0, + Disable = 0, #[doc = "1: Framing and parity errors disable the receiver"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRSRX_A) -> Self { + fn from(variant: Errsrx) -> Self { variant as u8 != 0 } } -impl ERRSRX_R { +#[doc = "Field `ERRSRX` reader - Disable RX On Error"] +pub type ErrsrxR = crate::BitReader; +impl ErrsrxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ERRSRX_A { + pub const fn variant(&self) -> Errsrx { match self.bits { - false => ERRSRX_A::DISABLE, - true => ERRSRX_A::ENABLE, + false => Errsrx::Disable, + true => Errsrx::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Framing and parity errors have no effect on receiver"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ERRSRX_A::DISABLE + *self == Errsrx::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Framing and parity errors disable the receiver"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ERRSRX_A::ENABLE + *self == Errsrx::Enable } } #[doc = "Field `ERRSRX` writer - Disable RX On Error"] -pub type ERRSRX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, ERRSRX_A, O>; -impl<'a, const O: u8> ERRSRX_W<'a, O> { +pub type ErrsrxW<'a, REG> = crate::BitWriter<'a, REG, Errsrx>; +impl<'a, REG> ErrsrxW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Framing and parity errors have no effect on receiver"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ERRSRX_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Errsrx::Disable) } #[doc = "Framing and parity errors disable the receiver"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ERRSRX_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Errsrx::Enable) } } -#[doc = "Field `ERRSTX` reader - Disable TX On Error"] -pub type ERRSTX_R = crate::BitReader; #[doc = "Disable TX On Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRSTX_A { +pub enum Errstx { #[doc = "0: Received framing and parity errors have no effect on transmitter"] - DISABLE = 0, + Disable = 0, #[doc = "1: Received framing and parity errors disable the transmitter"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRSTX_A) -> Self { + fn from(variant: Errstx) -> Self { variant as u8 != 0 } } -impl ERRSTX_R { +#[doc = "Field `ERRSTX` reader - Disable TX On Error"] +pub type ErrstxR = crate::BitReader; +impl ErrstxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ERRSTX_A { + pub const fn variant(&self) -> Errstx { match self.bits { - false => ERRSTX_A::DISABLE, - true => ERRSTX_A::ENABLE, + false => Errstx::Disable, + true => Errstx::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Received framing and parity errors have no effect on transmitter"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ERRSTX_A::DISABLE + *self == Errstx::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Received framing and parity errors disable the transmitter"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ERRSTX_A::ENABLE + *self == Errstx::Enable } } #[doc = "Field `ERRSTX` writer - Disable TX On Error"] -pub type ERRSTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, ERRSTX_A, O>; -impl<'a, const O: u8> ERRSTX_W<'a, O> { +pub type ErrstxW<'a, REG> = crate::BitWriter<'a, REG, Errstx>; +impl<'a, REG> ErrstxW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Received framing and parity errors have no effect on transmitter"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ERRSTX_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Errstx::Disable) } #[doc = "Received framing and parity errors disable the transmitter"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ERRSTX_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Errstx::Enable) } } #[doc = "Field `SSSEARLY` reader - Synchronous Secondary Setup Early"] -pub type SSSEARLY_R = crate::BitReader; +pub type SssearlyR = crate::BitReader; #[doc = "Field `SSSEARLY` writer - Synchronous Secondary Setup Early"] -pub type SSSEARLY_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; -#[doc = "Field `BYTESWAP` reader - Byteswap In Double Accesses"] -pub type BYTESWAP_R = crate::BitReader; +pub type SssearlyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Byteswap In Double Accesses\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BYTESWAP_A { +pub enum Byteswap { #[doc = "0: Normal byte order"] - DISABLE = 0, + Disable = 0, #[doc = "1: Byte order swapped"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BYTESWAP_A) -> Self { + fn from(variant: Byteswap) -> Self { variant as u8 != 0 } } -impl BYTESWAP_R { +#[doc = "Field `BYTESWAP` reader - Byteswap In Double Accesses"] +pub type ByteswapR = crate::BitReader; +impl ByteswapR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> BYTESWAP_A { + pub const fn variant(&self) -> Byteswap { match self.bits { - false => BYTESWAP_A::DISABLE, - true => BYTESWAP_A::ENABLE, + false => Byteswap::Disable, + true => Byteswap::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Normal byte order"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == BYTESWAP_A::DISABLE + *self == Byteswap::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Byte order swapped"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == BYTESWAP_A::ENABLE + *self == Byteswap::Enable } } #[doc = "Field `BYTESWAP` writer - Byteswap In Double Accesses"] -pub type BYTESWAP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, BYTESWAP_A, O>; -impl<'a, const O: u8> BYTESWAP_W<'a, O> { +pub type ByteswapW<'a, REG> = crate::BitWriter<'a, REG, Byteswap>; +impl<'a, REG> ByteswapW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Normal byte order"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(BYTESWAP_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Byteswap::Disable) } #[doc = "Byte order swapped"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(BYTESWAP_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Byteswap::Enable) } } #[doc = "Field `AUTOTX` reader - Always Transmit When RX Not Full"] -pub type AUTOTX_R = crate::BitReader; +pub type AutotxR = crate::BitReader; #[doc = "Field `AUTOTX` writer - Always Transmit When RX Not Full"] -pub type AUTOTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type AutotxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MVDIS` reader - Majority Vote Disable"] -pub type MVDIS_R = crate::BitReader; +pub type MvdisR = crate::BitReader; #[doc = "Field `MVDIS` writer - Majority Vote Disable"] -pub type MVDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type MvdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SMSDELAY` reader - Synchronous Main Sample Delay"] -pub type SMSDELAY_R = crate::BitReader; +pub type SmsdelayR = crate::BitReader; #[doc = "Field `SMSDELAY` writer - Synchronous Main Sample Delay"] -pub type SMSDELAY_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type SmsdelayW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - USART Synchronous Mode"] #[inline(always)] - pub fn sync(&self) -> SYNC_R { - SYNC_R::new((self.bits & 1) != 0) + pub fn sync(&self) -> SyncR { + SyncR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Loopback Enable"] #[inline(always)] - pub fn loopbk(&self) -> LOOPBK_R { - LOOPBK_R::new(((self.bits >> 1) & 1) != 0) + pub fn loopbk(&self) -> LoopbkR { + LoopbkR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Collision Check Enable"] #[inline(always)] - pub fn ccen(&self) -> CCEN_R { - CCEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn ccen(&self) -> CcenR { + CcenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Multi-Processor Mode"] #[inline(always)] - pub fn mpm(&self) -> MPM_R { - MPM_R::new(((self.bits >> 3) & 1) != 0) + pub fn mpm(&self) -> MpmR { + MpmR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Multi-Processor Address-Bit"] #[inline(always)] - pub fn mpab(&self) -> MPAB_R { - MPAB_R::new(((self.bits >> 4) & 1) != 0) + pub fn mpab(&self) -> MpabR { + MpabR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 5:6 - Oversampling"] #[inline(always)] - pub fn ovs(&self) -> OVS_R { - OVS_R::new(((self.bits >> 5) & 3) as u8) + pub fn ovs(&self) -> OvsR { + OvsR::new(((self.bits >> 5) & 3) as u8) } #[doc = "Bit 8 - Clock Polarity"] #[inline(always)] - pub fn clkpol(&self) -> CLKPOL_R { - CLKPOL_R::new(((self.bits >> 8) & 1) != 0) + pub fn clkpol(&self) -> ClkpolR { + ClkpolR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Clock Edge For Setup/Sample"] #[inline(always)] - pub fn clkpha(&self) -> CLKPHA_R { - CLKPHA_R::new(((self.bits >> 9) & 1) != 0) + pub fn clkpha(&self) -> ClkphaR { + ClkphaR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Most Significant Bit First"] #[inline(always)] - pub fn msbf(&self) -> MSBF_R { - MSBF_R::new(((self.bits >> 10) & 1) != 0) + pub fn msbf(&self) -> MsbfR { + MsbfR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Action On Chip Select In Main Mode"] #[inline(always)] - pub fn csma(&self) -> CSMA_R { - CSMA_R::new(((self.bits >> 11) & 1) != 0) + pub fn csma(&self) -> CsmaR { + CsmaR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - TX Buffer Interrupt Level"] #[inline(always)] - pub fn txbil(&self) -> TXBIL_R { - TXBIL_R::new(((self.bits >> 12) & 1) != 0) + pub fn txbil(&self) -> TxbilR { + TxbilR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Receiver Input Invert"] #[inline(always)] - pub fn rxinv(&self) -> RXINV_R { - RXINV_R::new(((self.bits >> 13) & 1) != 0) + pub fn rxinv(&self) -> RxinvR { + RxinvR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Transmitter output Invert"] #[inline(always)] - pub fn txinv(&self) -> TXINV_R { - TXINV_R::new(((self.bits >> 14) & 1) != 0) + pub fn txinv(&self) -> TxinvR { + TxinvR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Chip Select Invert"] #[inline(always)] - pub fn csinv(&self) -> CSINV_R { - CSINV_R::new(((self.bits >> 15) & 1) != 0) + pub fn csinv(&self) -> CsinvR { + CsinvR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Automatic Chip Select"] #[inline(always)] - pub fn autocs(&self) -> AUTOCS_R { - AUTOCS_R::new(((self.bits >> 16) & 1) != 0) + pub fn autocs(&self) -> AutocsR { + AutocsR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Automatic TX Tristate"] #[inline(always)] - pub fn autotri(&self) -> AUTOTRI_R { - AUTOTRI_R::new(((self.bits >> 17) & 1) != 0) + pub fn autotri(&self) -> AutotriR { + AutotriR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - SmartCard Mode"] #[inline(always)] - pub fn scmode(&self) -> SCMODE_R { - SCMODE_R::new(((self.bits >> 18) & 1) != 0) + pub fn scmode(&self) -> ScmodeR { + ScmodeR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - SmartCard Retransmit"] #[inline(always)] - pub fn scretrans(&self) -> SCRETRANS_R { - SCRETRANS_R::new(((self.bits >> 19) & 1) != 0) + pub fn scretrans(&self) -> ScretransR { + ScretransR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Skip Parity Error Frames"] #[inline(always)] - pub fn skipperrf(&self) -> SKIPPERRF_R { - SKIPPERRF_R::new(((self.bits >> 20) & 1) != 0) + pub fn skipperrf(&self) -> SkipperrfR { + SkipperrfR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Bit 8 Default Value"] #[inline(always)] - pub fn bit8dv(&self) -> BIT8DV_R { - BIT8DV_R::new(((self.bits >> 21) & 1) != 0) + pub fn bit8dv(&self) -> Bit8dvR { + Bit8dvR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Halt DMA On Error"] #[inline(always)] - pub fn errsdma(&self) -> ERRSDMA_R { - ERRSDMA_R::new(((self.bits >> 22) & 1) != 0) + pub fn errsdma(&self) -> ErrsdmaR { + ErrsdmaR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Disable RX On Error"] #[inline(always)] - pub fn errsrx(&self) -> ERRSRX_R { - ERRSRX_R::new(((self.bits >> 23) & 1) != 0) + pub fn errsrx(&self) -> ErrsrxR { + ErrsrxR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - Disable TX On Error"] #[inline(always)] - pub fn errstx(&self) -> ERRSTX_R { - ERRSTX_R::new(((self.bits >> 24) & 1) != 0) + pub fn errstx(&self) -> ErrstxR { + ErrstxR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Synchronous Secondary Setup Early"] #[inline(always)] - pub fn sssearly(&self) -> SSSEARLY_R { - SSSEARLY_R::new(((self.bits >> 25) & 1) != 0) + pub fn sssearly(&self) -> SssearlyR { + SssearlyR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 28 - Byteswap In Double Accesses"] #[inline(always)] - pub fn byteswap(&self) -> BYTESWAP_R { - BYTESWAP_R::new(((self.bits >> 28) & 1) != 0) + pub fn byteswap(&self) -> ByteswapR { + ByteswapR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Always Transmit When RX Not Full"] #[inline(always)] - pub fn autotx(&self) -> AUTOTX_R { - AUTOTX_R::new(((self.bits >> 29) & 1) != 0) + pub fn autotx(&self) -> AutotxR { + AutotxR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Majority Vote Disable"] #[inline(always)] - pub fn mvdis(&self) -> MVDIS_R { - MVDIS_R::new(((self.bits >> 30) & 1) != 0) + pub fn mvdis(&self) -> MvdisR { + MvdisR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Synchronous Main Sample Delay"] #[inline(always)] - pub fn smsdelay(&self) -> SMSDELAY_R { - SMSDELAY_R::new(((self.bits >> 31) & 1) != 0) + pub fn smsdelay(&self) -> SmsdelayR { + SmsdelayR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - USART Synchronous Mode"] #[inline(always)] #[must_use] - pub fn sync(&mut self) -> SYNC_W<0> { - SYNC_W::new(self) + pub fn sync(&mut self) -> SyncW { + SyncW::new(self, 0) } #[doc = "Bit 1 - Loopback Enable"] #[inline(always)] #[must_use] - pub fn loopbk(&mut self) -> LOOPBK_W<1> { - LOOPBK_W::new(self) + pub fn loopbk(&mut self) -> LoopbkW { + LoopbkW::new(self, 1) } #[doc = "Bit 2 - Collision Check Enable"] #[inline(always)] #[must_use] - pub fn ccen(&mut self) -> CCEN_W<2> { - CCEN_W::new(self) + pub fn ccen(&mut self) -> CcenW { + CcenW::new(self, 2) } #[doc = "Bit 3 - Multi-Processor Mode"] #[inline(always)] #[must_use] - pub fn mpm(&mut self) -> MPM_W<3> { - MPM_W::new(self) + pub fn mpm(&mut self) -> MpmW { + MpmW::new(self, 3) } #[doc = "Bit 4 - Multi-Processor Address-Bit"] #[inline(always)] #[must_use] - pub fn mpab(&mut self) -> MPAB_W<4> { - MPAB_W::new(self) + pub fn mpab(&mut self) -> MpabW { + MpabW::new(self, 4) } #[doc = "Bits 5:6 - Oversampling"] #[inline(always)] #[must_use] - pub fn ovs(&mut self) -> OVS_W<5> { - OVS_W::new(self) + pub fn ovs(&mut self) -> OvsW { + OvsW::new(self, 5) } #[doc = "Bit 8 - Clock Polarity"] #[inline(always)] #[must_use] - pub fn clkpol(&mut self) -> CLKPOL_W<8> { - CLKPOL_W::new(self) + pub fn clkpol(&mut self) -> ClkpolW { + ClkpolW::new(self, 8) } #[doc = "Bit 9 - Clock Edge For Setup/Sample"] #[inline(always)] #[must_use] - pub fn clkpha(&mut self) -> CLKPHA_W<9> { - CLKPHA_W::new(self) + pub fn clkpha(&mut self) -> ClkphaW { + ClkphaW::new(self, 9) } #[doc = "Bit 10 - Most Significant Bit First"] #[inline(always)] #[must_use] - pub fn msbf(&mut self) -> MSBF_W<10> { - MSBF_W::new(self) + pub fn msbf(&mut self) -> MsbfW { + MsbfW::new(self, 10) } #[doc = "Bit 11 - Action On Chip Select In Main Mode"] #[inline(always)] #[must_use] - pub fn csma(&mut self) -> CSMA_W<11> { - CSMA_W::new(self) + pub fn csma(&mut self) -> CsmaW { + CsmaW::new(self, 11) } #[doc = "Bit 12 - TX Buffer Interrupt Level"] #[inline(always)] #[must_use] - pub fn txbil(&mut self) -> TXBIL_W<12> { - TXBIL_W::new(self) + pub fn txbil(&mut self) -> TxbilW { + TxbilW::new(self, 12) } #[doc = "Bit 13 - Receiver Input Invert"] #[inline(always)] #[must_use] - pub fn rxinv(&mut self) -> RXINV_W<13> { - RXINV_W::new(self) + pub fn rxinv(&mut self) -> RxinvW { + RxinvW::new(self, 13) } #[doc = "Bit 14 - Transmitter output Invert"] #[inline(always)] #[must_use] - pub fn txinv(&mut self) -> TXINV_W<14> { - TXINV_W::new(self) + pub fn txinv(&mut self) -> TxinvW { + TxinvW::new(self, 14) } #[doc = "Bit 15 - Chip Select Invert"] #[inline(always)] #[must_use] - pub fn csinv(&mut self) -> CSINV_W<15> { - CSINV_W::new(self) + pub fn csinv(&mut self) -> CsinvW { + CsinvW::new(self, 15) } #[doc = "Bit 16 - Automatic Chip Select"] #[inline(always)] #[must_use] - pub fn autocs(&mut self) -> AUTOCS_W<16> { - AUTOCS_W::new(self) + pub fn autocs(&mut self) -> AutocsW { + AutocsW::new(self, 16) } #[doc = "Bit 17 - Automatic TX Tristate"] #[inline(always)] #[must_use] - pub fn autotri(&mut self) -> AUTOTRI_W<17> { - AUTOTRI_W::new(self) + pub fn autotri(&mut self) -> AutotriW { + AutotriW::new(self, 17) } #[doc = "Bit 18 - SmartCard Mode"] #[inline(always)] #[must_use] - pub fn scmode(&mut self) -> SCMODE_W<18> { - SCMODE_W::new(self) + pub fn scmode(&mut self) -> ScmodeW { + ScmodeW::new(self, 18) } #[doc = "Bit 19 - SmartCard Retransmit"] #[inline(always)] #[must_use] - pub fn scretrans(&mut self) -> SCRETRANS_W<19> { - SCRETRANS_W::new(self) + pub fn scretrans(&mut self) -> ScretransW { + ScretransW::new(self, 19) } #[doc = "Bit 20 - Skip Parity Error Frames"] #[inline(always)] #[must_use] - pub fn skipperrf(&mut self) -> SKIPPERRF_W<20> { - SKIPPERRF_W::new(self) + pub fn skipperrf(&mut self) -> SkipperrfW { + SkipperrfW::new(self, 20) } #[doc = "Bit 21 - Bit 8 Default Value"] #[inline(always)] #[must_use] - pub fn bit8dv(&mut self) -> BIT8DV_W<21> { - BIT8DV_W::new(self) + pub fn bit8dv(&mut self) -> Bit8dvW { + Bit8dvW::new(self, 21) } #[doc = "Bit 22 - Halt DMA On Error"] #[inline(always)] #[must_use] - pub fn errsdma(&mut self) -> ERRSDMA_W<22> { - ERRSDMA_W::new(self) + pub fn errsdma(&mut self) -> ErrsdmaW { + ErrsdmaW::new(self, 22) } #[doc = "Bit 23 - Disable RX On Error"] #[inline(always)] #[must_use] - pub fn errsrx(&mut self) -> ERRSRX_W<23> { - ERRSRX_W::new(self) + pub fn errsrx(&mut self) -> ErrsrxW { + ErrsrxW::new(self, 23) } #[doc = "Bit 24 - Disable TX On Error"] #[inline(always)] #[must_use] - pub fn errstx(&mut self) -> ERRSTX_W<24> { - ERRSTX_W::new(self) + pub fn errstx(&mut self) -> ErrstxW { + ErrstxW::new(self, 24) } #[doc = "Bit 25 - Synchronous Secondary Setup Early"] #[inline(always)] #[must_use] - pub fn sssearly(&mut self) -> SSSEARLY_W<25> { - SSSEARLY_W::new(self) + pub fn sssearly(&mut self) -> SssearlyW { + SssearlyW::new(self, 25) } #[doc = "Bit 28 - Byteswap In Double Accesses"] #[inline(always)] #[must_use] - pub fn byteswap(&mut self) -> BYTESWAP_W<28> { - BYTESWAP_W::new(self) + pub fn byteswap(&mut self) -> ByteswapW { + ByteswapW::new(self, 28) } #[doc = "Bit 29 - Always Transmit When RX Not Full"] #[inline(always)] #[must_use] - pub fn autotx(&mut self) -> AUTOTX_W<29> { - AUTOTX_W::new(self) + pub fn autotx(&mut self) -> AutotxW { + AutotxW::new(self, 29) } #[doc = "Bit 30 - Majority Vote Disable"] #[inline(always)] #[must_use] - pub fn mvdis(&mut self) -> MVDIS_W<30> { - MVDIS_W::new(self) + pub fn mvdis(&mut self) -> MvdisW { + MvdisW::new(self, 30) } #[doc = "Bit 31 - Synchronous Main Sample Delay"] #[inline(always)] #[must_use] - pub fn smsdelay(&mut self) -> SMSDELAY_W<31> { - SMSDELAY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn smsdelay(&mut self) -> SmsdelayW { + SmsdelayW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/ctrlx.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/ctrlx.rs index ddc1730..c7b4735 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/ctrlx.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/ctrlx.rs @@ -1,339 +1,311 @@ #[doc = "Register `CTRLX` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRLX` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DBGHALT` reader - Debug halt"] -pub type DBGHALT_R = crate::BitReader; +pub type W = crate::W; #[doc = "Debug halt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DBGHALT_A { +pub enum Dbghalt { #[doc = "0: Continue to transmit until TX buffer is empty"] - DISABLE = 0, + Disable = 0, #[doc = "1: Negate RTS to stop link partner's transmission during debug HALT. NOTE** The core clock should be equal to or faster than the peripheral clock; otherwise, each single step could transmit multiple frames instead of just transmitting one frame."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DBGHALT_A) -> Self { + fn from(variant: Dbghalt) -> Self { variant as u8 != 0 } } -impl DBGHALT_R { +#[doc = "Field `DBGHALT` reader - Debug halt"] +pub type DbghaltR = crate::BitReader; +impl DbghaltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DBGHALT_A { + pub const fn variant(&self) -> Dbghalt { match self.bits { - false => DBGHALT_A::DISABLE, - true => DBGHALT_A::ENABLE, + false => Dbghalt::Disable, + true => Dbghalt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Continue to transmit until TX buffer is empty"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == DBGHALT_A::DISABLE + *self == Dbghalt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Negate RTS to stop link partner's transmission during debug HALT. NOTE** The core clock should be equal to or faster than the peripheral clock; otherwise, each single step could transmit multiple frames instead of just transmitting one frame."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == DBGHALT_A::ENABLE + *self == Dbghalt::Enable } } #[doc = "Field `DBGHALT` writer - Debug halt"] -pub type DBGHALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLX_SPEC, DBGHALT_A, O>; -impl<'a, const O: u8> DBGHALT_W<'a, O> { +pub type DbghaltW<'a, REG> = crate::BitWriter<'a, REG, Dbghalt>; +impl<'a, REG> DbghaltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Continue to transmit until TX buffer is empty"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(DBGHALT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Dbghalt::Disable) } #[doc = "Negate RTS to stop link partner's transmission during debug HALT. NOTE** The core clock should be equal to or faster than the peripheral clock; otherwise, each single step could transmit multiple frames instead of just transmitting one frame."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(DBGHALT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Dbghalt::Enable) } } -#[doc = "Field `CTSINV` reader - CTS Pin Inversion"] -pub type CTSINV_R = crate::BitReader; #[doc = "CTS Pin Inversion\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CTSINV_A { +pub enum Ctsinv { #[doc = "0: The USn_CTS pin is low true"] - DISABLE = 0, + Disable = 0, #[doc = "1: The USn_CTS pin is high true"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CTSINV_A) -> Self { + fn from(variant: Ctsinv) -> Self { variant as u8 != 0 } } -impl CTSINV_R { +#[doc = "Field `CTSINV` reader - CTS Pin Inversion"] +pub type CtsinvR = crate::BitReader; +impl CtsinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CTSINV_A { + pub const fn variant(&self) -> Ctsinv { match self.bits { - false => CTSINV_A::DISABLE, - true => CTSINV_A::ENABLE, + false => Ctsinv::Disable, + true => Ctsinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The USn_CTS pin is low true"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CTSINV_A::DISABLE + *self == Ctsinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The USn_CTS pin is high true"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CTSINV_A::ENABLE + *self == Ctsinv::Enable } } #[doc = "Field `CTSINV` writer - CTS Pin Inversion"] -pub type CTSINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLX_SPEC, CTSINV_A, O>; -impl<'a, const O: u8> CTSINV_W<'a, O> { +pub type CtsinvW<'a, REG> = crate::BitWriter<'a, REG, Ctsinv>; +impl<'a, REG> CtsinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The USn_CTS pin is low true"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CTSINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ctsinv::Disable) } #[doc = "The USn_CTS pin is high true"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CTSINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Ctsinv::Enable) } } -#[doc = "Field `CTSEN` reader - CTS Function enabled"] -pub type CTSEN_R = crate::BitReader; #[doc = "CTS Function enabled\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CTSEN_A { +pub enum Ctsen { #[doc = "0: Ingore CTS"] - DISABLE = 0, + Disable = 0, #[doc = "1: Stop transmitting when CTS is negated"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CTSEN_A) -> Self { + fn from(variant: Ctsen) -> Self { variant as u8 != 0 } } -impl CTSEN_R { +#[doc = "Field `CTSEN` reader - CTS Function enabled"] +pub type CtsenR = crate::BitReader; +impl CtsenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CTSEN_A { + pub const fn variant(&self) -> Ctsen { match self.bits { - false => CTSEN_A::DISABLE, - true => CTSEN_A::ENABLE, + false => Ctsen::Disable, + true => Ctsen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Ingore CTS"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CTSEN_A::DISABLE + *self == Ctsen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Stop transmitting when CTS is negated"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CTSEN_A::ENABLE + *self == Ctsen::Enable } } #[doc = "Field `CTSEN` writer - CTS Function enabled"] -pub type CTSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLX_SPEC, CTSEN_A, O>; -impl<'a, const O: u8> CTSEN_W<'a, O> { +pub type CtsenW<'a, REG> = crate::BitWriter<'a, REG, Ctsen>; +impl<'a, REG> CtsenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Ingore CTS"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CTSEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ctsen::Disable) } #[doc = "Stop transmitting when CTS is negated"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CTSEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Ctsen::Enable) } } -#[doc = "Field `RTSINV` reader - RTS Pin Inversion"] -pub type RTSINV_R = crate::BitReader; #[doc = "RTS Pin Inversion\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTSINV_A { +pub enum Rtsinv { #[doc = "0: The USn_RTS pin is low true"] - DISABLE = 0, + Disable = 0, #[doc = "1: The USn_RTS pin is high true"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTSINV_A) -> Self { + fn from(variant: Rtsinv) -> Self { variant as u8 != 0 } } -impl RTSINV_R { +#[doc = "Field `RTSINV` reader - RTS Pin Inversion"] +pub type RtsinvR = crate::BitReader; +impl RtsinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RTSINV_A { + pub const fn variant(&self) -> Rtsinv { match self.bits { - false => RTSINV_A::DISABLE, - true => RTSINV_A::ENABLE, + false => Rtsinv::Disable, + true => Rtsinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The USn_RTS pin is low true"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RTSINV_A::DISABLE + *self == Rtsinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The USn_RTS pin is high true"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RTSINV_A::ENABLE + *self == Rtsinv::Enable } } #[doc = "Field `RTSINV` writer - RTS Pin Inversion"] -pub type RTSINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLX_SPEC, RTSINV_A, O>; -impl<'a, const O: u8> RTSINV_W<'a, O> { +pub type RtsinvW<'a, REG> = crate::BitWriter<'a, REG, Rtsinv>; +impl<'a, REG> RtsinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The USn_RTS pin is low true"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RTSINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Rtsinv::Disable) } #[doc = "The USn_RTS pin is high true"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RTSINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Rtsinv::Enable) } } #[doc = "Field `RXPRSEN` reader - PRS RX Enable"] -pub type RXPRSEN_R = crate::BitReader; +pub type RxprsenR = crate::BitReader; #[doc = "Field `RXPRSEN` writer - PRS RX Enable"] -pub type RXPRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLX_SPEC, bool, O>; +pub type RxprsenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLKPRSEN` reader - PRS CLK Enable"] -pub type CLKPRSEN_R = crate::BitReader; +pub type ClkprsenR = crate::BitReader; #[doc = "Field `CLKPRSEN` writer - PRS CLK Enable"] -pub type CLKPRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLX_SPEC, bool, O>; +pub type ClkprsenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Debug halt"] #[inline(always)] - pub fn dbghalt(&self) -> DBGHALT_R { - DBGHALT_R::new((self.bits & 1) != 0) + pub fn dbghalt(&self) -> DbghaltR { + DbghaltR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CTS Pin Inversion"] #[inline(always)] - pub fn ctsinv(&self) -> CTSINV_R { - CTSINV_R::new(((self.bits >> 1) & 1) != 0) + pub fn ctsinv(&self) -> CtsinvR { + CtsinvR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CTS Function enabled"] #[inline(always)] - pub fn ctsen(&self) -> CTSEN_R { - CTSEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn ctsen(&self) -> CtsenR { + CtsenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - RTS Pin Inversion"] #[inline(always)] - pub fn rtsinv(&self) -> RTSINV_R { - RTSINV_R::new(((self.bits >> 3) & 1) != 0) + pub fn rtsinv(&self) -> RtsinvR { + RtsinvR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 7 - PRS RX Enable"] #[inline(always)] - pub fn rxprsen(&self) -> RXPRSEN_R { - RXPRSEN_R::new(((self.bits >> 7) & 1) != 0) + pub fn rxprsen(&self) -> RxprsenR { + RxprsenR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 15 - PRS CLK Enable"] #[inline(always)] - pub fn clkprsen(&self) -> CLKPRSEN_R { - CLKPRSEN_R::new(((self.bits >> 15) & 1) != 0) + pub fn clkprsen(&self) -> ClkprsenR { + ClkprsenR::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Debug halt"] #[inline(always)] #[must_use] - pub fn dbghalt(&mut self) -> DBGHALT_W<0> { - DBGHALT_W::new(self) + pub fn dbghalt(&mut self) -> DbghaltW { + DbghaltW::new(self, 0) } #[doc = "Bit 1 - CTS Pin Inversion"] #[inline(always)] #[must_use] - pub fn ctsinv(&mut self) -> CTSINV_W<1> { - CTSINV_W::new(self) + pub fn ctsinv(&mut self) -> CtsinvW { + CtsinvW::new(self, 1) } #[doc = "Bit 2 - CTS Function enabled"] #[inline(always)] #[must_use] - pub fn ctsen(&mut self) -> CTSEN_W<2> { - CTSEN_W::new(self) + pub fn ctsen(&mut self) -> CtsenW { + CtsenW::new(self, 2) } #[doc = "Bit 3 - RTS Pin Inversion"] #[inline(always)] #[must_use] - pub fn rtsinv(&mut self) -> RTSINV_W<3> { - RTSINV_W::new(self) + pub fn rtsinv(&mut self) -> RtsinvW { + RtsinvW::new(self, 3) } #[doc = "Bit 7 - PRS RX Enable"] #[inline(always)] #[must_use] - pub fn rxprsen(&mut self) -> RXPRSEN_W<7> { - RXPRSEN_W::new(self) + pub fn rxprsen(&mut self) -> RxprsenW { + RxprsenW::new(self, 7) } #[doc = "Bit 15 - PRS CLK Enable"] #[inline(always)] #[must_use] - pub fn clkprsen(&mut self) -> CLKPRSEN_W<15> { - CLKPRSEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clkprsen(&mut self) -> ClkprsenW { + ClkprsenW::new(self, 15) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlx](index.html) module"] -pub struct CTRLX_SPEC; -impl crate::RegisterSpec for CTRLX_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrlx::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrlx::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlxSpec; +impl crate::RegisterSpec for CtrlxSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrlx::R](R) reader structure"] -impl crate::Readable for CTRLX_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrlx::W](W) writer structure"] -impl crate::Writable for CTRLX_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrlx::R`](R) reader structure"] +impl crate::Readable for CtrlxSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrlx::W`](W) writer structure"] +impl crate::Writable for CtrlxSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRLX to value 0"] -impl crate::Resettable for CTRLX_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlxSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/en.rs index bf56633..500998c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/en.rs @@ -1,80 +1,40 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - USART Enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - USART Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - USART Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - USART Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/frame.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/frame.rs index 8af53f7..7ed3fd3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/frame.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/frame.rs @@ -1,438 +1,420 @@ #[doc = "Register `FRAME` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `FRAME` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DATABITS` reader - Data-Bit Mode"] -pub type DATABITS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Data-Bit Mode\n\nValue on reset: 5"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DATABITS_A { +pub enum Databits { #[doc = "1: Each frame contains 4 data bits"] - FOUR = 1, + Four = 1, #[doc = "2: Each frame contains 5 data bits"] - FIVE = 2, + Five = 2, #[doc = "3: Each frame contains 6 data bits"] - SIX = 3, + Six = 3, #[doc = "4: Each frame contains 7 data bits"] - SEVEN = 4, + Seven = 4, #[doc = "5: Each frame contains 8 data bits"] - EIGHT = 5, + Eight = 5, #[doc = "6: Each frame contains 9 data bits"] - NINE = 6, + Nine = 6, #[doc = "7: Each frame contains 10 data bits"] - TEN = 7, + Ten = 7, #[doc = "8: Each frame contains 11 data bits"] - ELEVEN = 8, + Eleven = 8, #[doc = "9: Each frame contains 12 data bits"] - TWELVE = 9, + Twelve = 9, #[doc = "10: Each frame contains 13 data bits"] - THIRTEEN = 10, + Thirteen = 10, #[doc = "11: Each frame contains 14 data bits"] - FOURTEEN = 11, + Fourteen = 11, #[doc = "12: Each frame contains 15 data bits"] - FIFTEEN = 12, + Fifteen = 12, #[doc = "13: Each frame contains 16 data bits"] - SIXTEEN = 13, + Sixteen = 13, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DATABITS_A) -> Self { + fn from(variant: Databits) -> Self { variant as _ } } -impl DATABITS_R { +impl crate::FieldSpec for Databits { + type Ux = u8; +} +impl crate::IsEnum for Databits {} +#[doc = "Field `DATABITS` reader - Data-Bit Mode"] +pub type DatabitsR = crate::FieldReader; +impl DatabitsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(DATABITS_A::FOUR), - 2 => Some(DATABITS_A::FIVE), - 3 => Some(DATABITS_A::SIX), - 4 => Some(DATABITS_A::SEVEN), - 5 => Some(DATABITS_A::EIGHT), - 6 => Some(DATABITS_A::NINE), - 7 => Some(DATABITS_A::TEN), - 8 => Some(DATABITS_A::ELEVEN), - 9 => Some(DATABITS_A::TWELVE), - 10 => Some(DATABITS_A::THIRTEEN), - 11 => Some(DATABITS_A::FOURTEEN), - 12 => Some(DATABITS_A::FIFTEEN), - 13 => Some(DATABITS_A::SIXTEEN), + 1 => Some(Databits::Four), + 2 => Some(Databits::Five), + 3 => Some(Databits::Six), + 4 => Some(Databits::Seven), + 5 => Some(Databits::Eight), + 6 => Some(Databits::Nine), + 7 => Some(Databits::Ten), + 8 => Some(Databits::Eleven), + 9 => Some(Databits::Twelve), + 10 => Some(Databits::Thirteen), + 11 => Some(Databits::Fourteen), + 12 => Some(Databits::Fifteen), + 13 => Some(Databits::Sixteen), _ => None, } } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Each frame contains 4 data bits"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == DATABITS_A::FOUR + *self == Databits::Four } - #[doc = "Checks if the value of the field is `FIVE`"] + #[doc = "Each frame contains 5 data bits"] #[inline(always)] pub fn is_five(&self) -> bool { - *self == DATABITS_A::FIVE + *self == Databits::Five } - #[doc = "Checks if the value of the field is `SIX`"] + #[doc = "Each frame contains 6 data bits"] #[inline(always)] pub fn is_six(&self) -> bool { - *self == DATABITS_A::SIX + *self == Databits::Six } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "Each frame contains 7 data bits"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == DATABITS_A::SEVEN + *self == Databits::Seven } - #[doc = "Checks if the value of the field is `EIGHT`"] + #[doc = "Each frame contains 8 data bits"] #[inline(always)] pub fn is_eight(&self) -> bool { - *self == DATABITS_A::EIGHT + *self == Databits::Eight } - #[doc = "Checks if the value of the field is `NINE`"] + #[doc = "Each frame contains 9 data bits"] #[inline(always)] pub fn is_nine(&self) -> bool { - *self == DATABITS_A::NINE + *self == Databits::Nine } - #[doc = "Checks if the value of the field is `TEN`"] + #[doc = "Each frame contains 10 data bits"] #[inline(always)] pub fn is_ten(&self) -> bool { - *self == DATABITS_A::TEN + *self == Databits::Ten } - #[doc = "Checks if the value of the field is `ELEVEN`"] + #[doc = "Each frame contains 11 data bits"] #[inline(always)] pub fn is_eleven(&self) -> bool { - *self == DATABITS_A::ELEVEN + *self == Databits::Eleven } - #[doc = "Checks if the value of the field is `TWELVE`"] + #[doc = "Each frame contains 12 data bits"] #[inline(always)] pub fn is_twelve(&self) -> bool { - *self == DATABITS_A::TWELVE + *self == Databits::Twelve } - #[doc = "Checks if the value of the field is `THIRTEEN`"] + #[doc = "Each frame contains 13 data bits"] #[inline(always)] pub fn is_thirteen(&self) -> bool { - *self == DATABITS_A::THIRTEEN + *self == Databits::Thirteen } - #[doc = "Checks if the value of the field is `FOURTEEN`"] + #[doc = "Each frame contains 14 data bits"] #[inline(always)] pub fn is_fourteen(&self) -> bool { - *self == DATABITS_A::FOURTEEN + *self == Databits::Fourteen } - #[doc = "Checks if the value of the field is `FIFTEEN`"] + #[doc = "Each frame contains 15 data bits"] #[inline(always)] pub fn is_fifteen(&self) -> bool { - *self == DATABITS_A::FIFTEEN + *self == Databits::Fifteen } - #[doc = "Checks if the value of the field is `SIXTEEN`"] + #[doc = "Each frame contains 16 data bits"] #[inline(always)] pub fn is_sixteen(&self) -> bool { - *self == DATABITS_A::SIXTEEN + *self == Databits::Sixteen } } #[doc = "Field `DATABITS` writer - Data-Bit Mode"] -pub type DATABITS_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, FRAME_SPEC, u8, DATABITS_A, 4, O>; -impl<'a, const O: u8> DATABITS_W<'a, O> { +pub type DatabitsW<'a, REG> = crate::FieldWriter<'a, REG, 4, Databits>; +impl<'a, REG> DatabitsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Each frame contains 4 data bits"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(DATABITS_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Databits::Four) } #[doc = "Each frame contains 5 data bits"] #[inline(always)] - pub fn five(self) -> &'a mut W { - self.variant(DATABITS_A::FIVE) + pub fn five(self) -> &'a mut crate::W { + self.variant(Databits::Five) } #[doc = "Each frame contains 6 data bits"] #[inline(always)] - pub fn six(self) -> &'a mut W { - self.variant(DATABITS_A::SIX) + pub fn six(self) -> &'a mut crate::W { + self.variant(Databits::Six) } #[doc = "Each frame contains 7 data bits"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(DATABITS_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Databits::Seven) } #[doc = "Each frame contains 8 data bits"] #[inline(always)] - pub fn eight(self) -> &'a mut W { - self.variant(DATABITS_A::EIGHT) + pub fn eight(self) -> &'a mut crate::W { + self.variant(Databits::Eight) } #[doc = "Each frame contains 9 data bits"] #[inline(always)] - pub fn nine(self) -> &'a mut W { - self.variant(DATABITS_A::NINE) + pub fn nine(self) -> &'a mut crate::W { + self.variant(Databits::Nine) } #[doc = "Each frame contains 10 data bits"] #[inline(always)] - pub fn ten(self) -> &'a mut W { - self.variant(DATABITS_A::TEN) + pub fn ten(self) -> &'a mut crate::W { + self.variant(Databits::Ten) } #[doc = "Each frame contains 11 data bits"] #[inline(always)] - pub fn eleven(self) -> &'a mut W { - self.variant(DATABITS_A::ELEVEN) + pub fn eleven(self) -> &'a mut crate::W { + self.variant(Databits::Eleven) } #[doc = "Each frame contains 12 data bits"] #[inline(always)] - pub fn twelve(self) -> &'a mut W { - self.variant(DATABITS_A::TWELVE) + pub fn twelve(self) -> &'a mut crate::W { + self.variant(Databits::Twelve) } #[doc = "Each frame contains 13 data bits"] #[inline(always)] - pub fn thirteen(self) -> &'a mut W { - self.variant(DATABITS_A::THIRTEEN) + pub fn thirteen(self) -> &'a mut crate::W { + self.variant(Databits::Thirteen) } #[doc = "Each frame contains 14 data bits"] #[inline(always)] - pub fn fourteen(self) -> &'a mut W { - self.variant(DATABITS_A::FOURTEEN) + pub fn fourteen(self) -> &'a mut crate::W { + self.variant(Databits::Fourteen) } #[doc = "Each frame contains 15 data bits"] #[inline(always)] - pub fn fifteen(self) -> &'a mut W { - self.variant(DATABITS_A::FIFTEEN) + pub fn fifteen(self) -> &'a mut crate::W { + self.variant(Databits::Fifteen) } #[doc = "Each frame contains 16 data bits"] #[inline(always)] - pub fn sixteen(self) -> &'a mut W { - self.variant(DATABITS_A::SIXTEEN) + pub fn sixteen(self) -> &'a mut crate::W { + self.variant(Databits::Sixteen) } } -#[doc = "Field `PARITY` reader - Parity-Bit Mode"] -pub type PARITY_R = crate::FieldReader; #[doc = "Parity-Bit Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PARITY_A { +pub enum Parity { #[doc = "0: Parity bits are not used"] - NONE = 0, + None = 0, #[doc = "2: Even parity are used. Parity bits are automatically generated and checked by hardware."] - EVEN = 2, + Even = 2, #[doc = "3: Odd parity is used. Parity bits are automatically generated and checked by hardware."] - ODD = 3, + Odd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PARITY_A) -> Self { + fn from(variant: Parity) -> Self { variant as _ } } -impl PARITY_R { +impl crate::FieldSpec for Parity { + type Ux = u8; +} +impl crate::IsEnum for Parity {} +#[doc = "Field `PARITY` reader - Parity-Bit Mode"] +pub type ParityR = crate::FieldReader; +impl ParityR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PARITY_A::NONE), - 2 => Some(PARITY_A::EVEN), - 3 => Some(PARITY_A::ODD), + 0 => Some(Parity::None), + 2 => Some(Parity::Even), + 3 => Some(Parity::Odd), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Parity bits are not used"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == PARITY_A::NONE + *self == Parity::None } - #[doc = "Checks if the value of the field is `EVEN`"] + #[doc = "Even parity are used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] pub fn is_even(&self) -> bool { - *self == PARITY_A::EVEN + *self == Parity::Even } - #[doc = "Checks if the value of the field is `ODD`"] + #[doc = "Odd parity is used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] pub fn is_odd(&self) -> bool { - *self == PARITY_A::ODD + *self == Parity::Odd } } #[doc = "Field `PARITY` writer - Parity-Bit Mode"] -pub type PARITY_W<'a, const O: u8> = crate::FieldWriter<'a, u32, FRAME_SPEC, u8, PARITY_A, 2, O>; -impl<'a, const O: u8> PARITY_W<'a, O> { +pub type ParityW<'a, REG> = crate::FieldWriter<'a, REG, 2, Parity>; +impl<'a, REG> ParityW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Parity bits are not used"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(PARITY_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Parity::None) } #[doc = "Even parity are used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] - pub fn even(self) -> &'a mut W { - self.variant(PARITY_A::EVEN) + pub fn even(self) -> &'a mut crate::W { + self.variant(Parity::Even) } #[doc = "Odd parity is used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] - pub fn odd(self) -> &'a mut W { - self.variant(PARITY_A::ODD) + pub fn odd(self) -> &'a mut crate::W { + self.variant(Parity::Odd) } } -#[doc = "Field `STOPBITS` reader - Stop-Bit Mode"] -pub type STOPBITS_R = crate::FieldReader; #[doc = "Stop-Bit Mode\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STOPBITS_A { +pub enum Stopbits { #[doc = "0: The transmitter generates a half stop bit. Stop-bits are not verified by receiver"] - HALF = 0, + Half = 0, #[doc = "1: One stop bit is generated and verified"] - ONE = 1, + One = 1, #[doc = "2: The transmitter generates one and a half stop bit. The receiver verifies the first stop bit"] - ONEANDAHALF = 2, + Oneandahalf = 2, #[doc = "3: The transmitter generates two stop bits. The receiver checks the first stop-bit only"] - TWO = 3, + Two = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STOPBITS_A) -> Self { + fn from(variant: Stopbits) -> Self { variant as _ } } -impl STOPBITS_R { +impl crate::FieldSpec for Stopbits { + type Ux = u8; +} +impl crate::IsEnum for Stopbits {} +#[doc = "Field `STOPBITS` reader - Stop-Bit Mode"] +pub type StopbitsR = crate::FieldReader; +impl StopbitsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> STOPBITS_A { + pub const fn variant(&self) -> Stopbits { match self.bits { - 0 => STOPBITS_A::HALF, - 1 => STOPBITS_A::ONE, - 2 => STOPBITS_A::ONEANDAHALF, - 3 => STOPBITS_A::TWO, + 0 => Stopbits::Half, + 1 => Stopbits::One, + 2 => Stopbits::Oneandahalf, + 3 => Stopbits::Two, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `HALF`"] + #[doc = "The transmitter generates a half stop bit. Stop-bits are not verified by receiver"] #[inline(always)] pub fn is_half(&self) -> bool { - *self == STOPBITS_A::HALF + *self == Stopbits::Half } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "One stop bit is generated and verified"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == STOPBITS_A::ONE + *self == Stopbits::One } - #[doc = "Checks if the value of the field is `ONEANDAHALF`"] + #[doc = "The transmitter generates one and a half stop bit. The receiver verifies the first stop bit"] #[inline(always)] pub fn is_oneandahalf(&self) -> bool { - *self == STOPBITS_A::ONEANDAHALF + *self == Stopbits::Oneandahalf } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "The transmitter generates two stop bits. The receiver checks the first stop-bit only"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == STOPBITS_A::TWO + *self == Stopbits::Two } } #[doc = "Field `STOPBITS` writer - Stop-Bit Mode"] -pub type STOPBITS_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, FRAME_SPEC, u8, STOPBITS_A, 2, O>; -impl<'a, const O: u8> STOPBITS_W<'a, O> { +pub type StopbitsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Stopbits, crate::Safe>; +impl<'a, REG> StopbitsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The transmitter generates a half stop bit. Stop-bits are not verified by receiver"] #[inline(always)] - pub fn half(self) -> &'a mut W { - self.variant(STOPBITS_A::HALF) + pub fn half(self) -> &'a mut crate::W { + self.variant(Stopbits::Half) } #[doc = "One stop bit is generated and verified"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(STOPBITS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Stopbits::One) } #[doc = "The transmitter generates one and a half stop bit. The receiver verifies the first stop bit"] #[inline(always)] - pub fn oneandahalf(self) -> &'a mut W { - self.variant(STOPBITS_A::ONEANDAHALF) + pub fn oneandahalf(self) -> &'a mut crate::W { + self.variant(Stopbits::Oneandahalf) } #[doc = "The transmitter generates two stop bits. The receiver checks the first stop-bit only"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(STOPBITS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Stopbits::Two) } } impl R { #[doc = "Bits 0:3 - Data-Bit Mode"] #[inline(always)] - pub fn databits(&self) -> DATABITS_R { - DATABITS_R::new((self.bits & 0x0f) as u8) + pub fn databits(&self) -> DatabitsR { + DatabitsR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - Parity-Bit Mode"] #[inline(always)] - pub fn parity(&self) -> PARITY_R { - PARITY_R::new(((self.bits >> 8) & 3) as u8) + pub fn parity(&self) -> ParityR { + ParityR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 12:13 - Stop-Bit Mode"] #[inline(always)] - pub fn stopbits(&self) -> STOPBITS_R { - STOPBITS_R::new(((self.bits >> 12) & 3) as u8) + pub fn stopbits(&self) -> StopbitsR { + StopbitsR::new(((self.bits >> 12) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - Data-Bit Mode"] #[inline(always)] #[must_use] - pub fn databits(&mut self) -> DATABITS_W<0> { - DATABITS_W::new(self) + pub fn databits(&mut self) -> DatabitsW { + DatabitsW::new(self, 0) } #[doc = "Bits 8:9 - Parity-Bit Mode"] #[inline(always)] #[must_use] - pub fn parity(&mut self) -> PARITY_W<8> { - PARITY_W::new(self) + pub fn parity(&mut self) -> ParityW { + ParityW::new(self, 8) } #[doc = "Bits 12:13 - Stop-Bit Mode"] #[inline(always)] #[must_use] - pub fn stopbits(&mut self) -> STOPBITS_W<12> { - STOPBITS_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stopbits(&mut self) -> StopbitsW { + StopbitsW::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [frame](index.html) module"] -pub struct FRAME_SPEC; -impl crate::RegisterSpec for FRAME_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`frame::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`frame::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct FrameSpec; +impl crate::RegisterSpec for FrameSpec { type Ux = u32; } -#[doc = "`read()` method returns [frame::R](R) reader structure"] -impl crate::Readable for FRAME_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [frame::W](W) writer structure"] -impl crate::Writable for FRAME_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`frame::R`](R) reader structure"] +impl crate::Readable for FrameSpec {} +#[doc = "`write(|w| ..)` method takes [`frame::W`](W) writer structure"] +impl crate::Writable for FrameSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FRAME to value 0x1005"] -impl crate::Resettable for FRAME_SPEC { - const RESET_VALUE: Self::Ux = 0x1005; +impl crate::Resettable for FrameSpec { + const RESET_VALUE: u32 = 0x1005; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/i2sctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/i2sctrl.rs index da11729..e06032c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/i2sctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/i2sctrl.rs @@ -1,328 +1,298 @@ #[doc = "Register `I2SCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `I2SCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Enable I2S Mode"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Enable I2S Mode"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2SCTRL_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MONO` reader - Stero or Mono"] -pub type MONO_R = crate::BitReader; +pub type MonoR = crate::BitReader; #[doc = "Field `MONO` writer - Stero or Mono"] -pub type MONO_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2SCTRL_SPEC, bool, O>; -#[doc = "Field `JUSTIFY` reader - Justification of I2S Data"] -pub type JUSTIFY_R = crate::BitReader; +pub type MonoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Justification of I2S Data\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum JUSTIFY_A { +pub enum Justify { #[doc = "0: Data is left-justified"] - LEFT = 0, + Left = 0, #[doc = "1: Data is right-justified"] - RIGHT = 1, + Right = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: JUSTIFY_A) -> Self { + fn from(variant: Justify) -> Self { variant as u8 != 0 } } -impl JUSTIFY_R { +#[doc = "Field `JUSTIFY` reader - Justification of I2S Data"] +pub type JustifyR = crate::BitReader; +impl JustifyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> JUSTIFY_A { + pub const fn variant(&self) -> Justify { match self.bits { - false => JUSTIFY_A::LEFT, - true => JUSTIFY_A::RIGHT, + false => Justify::Left, + true => Justify::Right, } } - #[doc = "Checks if the value of the field is `LEFT`"] + #[doc = "Data is left-justified"] #[inline(always)] pub fn is_left(&self) -> bool { - *self == JUSTIFY_A::LEFT + *self == Justify::Left } - #[doc = "Checks if the value of the field is `RIGHT`"] + #[doc = "Data is right-justified"] #[inline(always)] pub fn is_right(&self) -> bool { - *self == JUSTIFY_A::RIGHT + *self == Justify::Right } } #[doc = "Field `JUSTIFY` writer - Justification of I2S Data"] -pub type JUSTIFY_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2SCTRL_SPEC, JUSTIFY_A, O>; -impl<'a, const O: u8> JUSTIFY_W<'a, O> { +pub type JustifyW<'a, REG> = crate::BitWriter<'a, REG, Justify>; +impl<'a, REG> JustifyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Data is left-justified"] #[inline(always)] - pub fn left(self) -> &'a mut W { - self.variant(JUSTIFY_A::LEFT) + pub fn left(self) -> &'a mut crate::W { + self.variant(Justify::Left) } #[doc = "Data is right-justified"] #[inline(always)] - pub fn right(self) -> &'a mut W { - self.variant(JUSTIFY_A::RIGHT) + pub fn right(self) -> &'a mut crate::W { + self.variant(Justify::Right) } } #[doc = "Field `DMASPLIT` reader - Separate DMA Request For Left/Right Data"] -pub type DMASPLIT_R = crate::BitReader; +pub type DmasplitR = crate::BitReader; #[doc = "Field `DMASPLIT` writer - Separate DMA Request For Left/Right Data"] -pub type DMASPLIT_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2SCTRL_SPEC, bool, O>; +pub type DmasplitW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DELAY` reader - Delay on I2S data"] -pub type DELAY_R = crate::BitReader; +pub type DelayR = crate::BitReader; #[doc = "Field `DELAY` writer - Delay on I2S data"] -pub type DELAY_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2SCTRL_SPEC, bool, O>; -#[doc = "Field `FORMAT` reader - I2S Word Format"] -pub type FORMAT_R = crate::FieldReader; +pub type DelayW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "I2S Word Format\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FORMAT_A { +pub enum Format { #[doc = "0: 32-bit word, 32-bit data"] - W32D32 = 0, + W32d32 = 0, #[doc = "1: 32-bit word, 32-bit data with 8 lsb masked"] - W32D24M = 1, + W32d24m = 1, #[doc = "2: 32-bit word, 24-bit data"] - W32D24 = 2, + W32d24 = 2, #[doc = "3: 32-bit word, 16-bit data"] - W32D16 = 3, + W32d16 = 3, #[doc = "4: 32-bit word, 8-bit data"] - W32D8 = 4, + W32d8 = 4, #[doc = "5: 16-bit word, 16-bit data"] - W16D16 = 5, + W16d16 = 5, #[doc = "6: 16-bit word, 8-bit data"] - W16D8 = 6, + W16d8 = 6, #[doc = "7: 8-bit word, 8-bit data"] - W8D8 = 7, + W8d8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FORMAT_A) -> Self { + fn from(variant: Format) -> Self { variant as _ } } -impl FORMAT_R { +impl crate::FieldSpec for Format { + type Ux = u8; +} +impl crate::IsEnum for Format {} +#[doc = "Field `FORMAT` reader - I2S Word Format"] +pub type FormatR = crate::FieldReader; +impl FormatR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FORMAT_A { + pub const fn variant(&self) -> Format { match self.bits { - 0 => FORMAT_A::W32D32, - 1 => FORMAT_A::W32D24M, - 2 => FORMAT_A::W32D24, - 3 => FORMAT_A::W32D16, - 4 => FORMAT_A::W32D8, - 5 => FORMAT_A::W16D16, - 6 => FORMAT_A::W16D8, - 7 => FORMAT_A::W8D8, + 0 => Format::W32d32, + 1 => Format::W32d24m, + 2 => Format::W32d24, + 3 => Format::W32d16, + 4 => Format::W32d8, + 5 => Format::W16d16, + 6 => Format::W16d8, + 7 => Format::W8d8, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `W32D32`"] + #[doc = "32-bit word, 32-bit data"] #[inline(always)] pub fn is_w32d32(&self) -> bool { - *self == FORMAT_A::W32D32 + *self == Format::W32d32 } - #[doc = "Checks if the value of the field is `W32D24M`"] + #[doc = "32-bit word, 32-bit data with 8 lsb masked"] #[inline(always)] pub fn is_w32d24m(&self) -> bool { - *self == FORMAT_A::W32D24M + *self == Format::W32d24m } - #[doc = "Checks if the value of the field is `W32D24`"] + #[doc = "32-bit word, 24-bit data"] #[inline(always)] pub fn is_w32d24(&self) -> bool { - *self == FORMAT_A::W32D24 + *self == Format::W32d24 } - #[doc = "Checks if the value of the field is `W32D16`"] + #[doc = "32-bit word, 16-bit data"] #[inline(always)] pub fn is_w32d16(&self) -> bool { - *self == FORMAT_A::W32D16 + *self == Format::W32d16 } - #[doc = "Checks if the value of the field is `W32D8`"] + #[doc = "32-bit word, 8-bit data"] #[inline(always)] pub fn is_w32d8(&self) -> bool { - *self == FORMAT_A::W32D8 + *self == Format::W32d8 } - #[doc = "Checks if the value of the field is `W16D16`"] + #[doc = "16-bit word, 16-bit data"] #[inline(always)] pub fn is_w16d16(&self) -> bool { - *self == FORMAT_A::W16D16 + *self == Format::W16d16 } - #[doc = "Checks if the value of the field is `W16D8`"] + #[doc = "16-bit word, 8-bit data"] #[inline(always)] pub fn is_w16d8(&self) -> bool { - *self == FORMAT_A::W16D8 + *self == Format::W16d8 } - #[doc = "Checks if the value of the field is `W8D8`"] + #[doc = "8-bit word, 8-bit data"] #[inline(always)] pub fn is_w8d8(&self) -> bool { - *self == FORMAT_A::W8D8 + *self == Format::W8d8 } } #[doc = "Field `FORMAT` writer - I2S Word Format"] -pub type FORMAT_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, I2SCTRL_SPEC, u8, FORMAT_A, 3, O>; -impl<'a, const O: u8> FORMAT_W<'a, O> { +pub type FormatW<'a, REG> = crate::FieldWriter<'a, REG, 3, Format, crate::Safe>; +impl<'a, REG> FormatW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "32-bit word, 32-bit data"] #[inline(always)] - pub fn w32d32(self) -> &'a mut W { - self.variant(FORMAT_A::W32D32) + pub fn w32d32(self) -> &'a mut crate::W { + self.variant(Format::W32d32) } #[doc = "32-bit word, 32-bit data with 8 lsb masked"] #[inline(always)] - pub fn w32d24m(self) -> &'a mut W { - self.variant(FORMAT_A::W32D24M) + pub fn w32d24m(self) -> &'a mut crate::W { + self.variant(Format::W32d24m) } #[doc = "32-bit word, 24-bit data"] #[inline(always)] - pub fn w32d24(self) -> &'a mut W { - self.variant(FORMAT_A::W32D24) + pub fn w32d24(self) -> &'a mut crate::W { + self.variant(Format::W32d24) } #[doc = "32-bit word, 16-bit data"] #[inline(always)] - pub fn w32d16(self) -> &'a mut W { - self.variant(FORMAT_A::W32D16) + pub fn w32d16(self) -> &'a mut crate::W { + self.variant(Format::W32d16) } #[doc = "32-bit word, 8-bit data"] #[inline(always)] - pub fn w32d8(self) -> &'a mut W { - self.variant(FORMAT_A::W32D8) + pub fn w32d8(self) -> &'a mut crate::W { + self.variant(Format::W32d8) } #[doc = "16-bit word, 16-bit data"] #[inline(always)] - pub fn w16d16(self) -> &'a mut W { - self.variant(FORMAT_A::W16D16) + pub fn w16d16(self) -> &'a mut crate::W { + self.variant(Format::W16d16) } #[doc = "16-bit word, 8-bit data"] #[inline(always)] - pub fn w16d8(self) -> &'a mut W { - self.variant(FORMAT_A::W16D8) + pub fn w16d8(self) -> &'a mut crate::W { + self.variant(Format::W16d8) } #[doc = "8-bit word, 8-bit data"] #[inline(always)] - pub fn w8d8(self) -> &'a mut W { - self.variant(FORMAT_A::W8D8) + pub fn w8d8(self) -> &'a mut crate::W { + self.variant(Format::W8d8) } } impl R { #[doc = "Bit 0 - Enable I2S Mode"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Stero or Mono"] #[inline(always)] - pub fn mono(&self) -> MONO_R { - MONO_R::new(((self.bits >> 1) & 1) != 0) + pub fn mono(&self) -> MonoR { + MonoR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Justification of I2S Data"] #[inline(always)] - pub fn justify(&self) -> JUSTIFY_R { - JUSTIFY_R::new(((self.bits >> 2) & 1) != 0) + pub fn justify(&self) -> JustifyR { + JustifyR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Separate DMA Request For Left/Right Data"] #[inline(always)] - pub fn dmasplit(&self) -> DMASPLIT_R { - DMASPLIT_R::new(((self.bits >> 3) & 1) != 0) + pub fn dmasplit(&self) -> DmasplitR { + DmasplitR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Delay on I2S data"] #[inline(always)] - pub fn delay(&self) -> DELAY_R { - DELAY_R::new(((self.bits >> 4) & 1) != 0) + pub fn delay(&self) -> DelayR { + DelayR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 8:10 - I2S Word Format"] #[inline(always)] - pub fn format(&self) -> FORMAT_R { - FORMAT_R::new(((self.bits >> 8) & 7) as u8) + pub fn format(&self) -> FormatR { + FormatR::new(((self.bits >> 8) & 7) as u8) } } impl W { #[doc = "Bit 0 - Enable I2S Mode"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } #[doc = "Bit 1 - Stero or Mono"] #[inline(always)] #[must_use] - pub fn mono(&mut self) -> MONO_W<1> { - MONO_W::new(self) + pub fn mono(&mut self) -> MonoW { + MonoW::new(self, 1) } #[doc = "Bit 2 - Justification of I2S Data"] #[inline(always)] #[must_use] - pub fn justify(&mut self) -> JUSTIFY_W<2> { - JUSTIFY_W::new(self) + pub fn justify(&mut self) -> JustifyW { + JustifyW::new(self, 2) } #[doc = "Bit 3 - Separate DMA Request For Left/Right Data"] #[inline(always)] #[must_use] - pub fn dmasplit(&mut self) -> DMASPLIT_W<3> { - DMASPLIT_W::new(self) + pub fn dmasplit(&mut self) -> DmasplitW { + DmasplitW::new(self, 3) } #[doc = "Bit 4 - Delay on I2S data"] #[inline(always)] #[must_use] - pub fn delay(&mut self) -> DELAY_W<4> { - DELAY_W::new(self) + pub fn delay(&mut self) -> DelayW { + DelayW::new(self, 4) } #[doc = "Bits 8:10 - I2S Word Format"] #[inline(always)] #[must_use] - pub fn format(&mut self) -> FORMAT_W<8> { - FORMAT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn format(&mut self) -> FormatW { + FormatW::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [i2sctrl](index.html) module"] -pub struct I2SCTRL_SPEC; -impl crate::RegisterSpec for I2SCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`i2sctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2sctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct I2sctrlSpec; +impl crate::RegisterSpec for I2sctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [i2sctrl::R](R) reader structure"] -impl crate::Readable for I2SCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [i2sctrl::W](W) writer structure"] -impl crate::Writable for I2SCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`i2sctrl::R`](R) reader structure"] +impl crate::Readable for I2sctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`i2sctrl::W`](W) writer structure"] +impl crate::Writable for I2sctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets I2SCTRL to value 0"] -impl crate::Resettable for I2SCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for I2sctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/ien.rs index af43b83..1abac51 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/ien.rs @@ -1,320 +1,280 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXC` reader - TX Complete Interrupt Enable"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXC` writer - TX Complete Interrupt Enable"] -pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXBL` reader - TX Buffer Level Interrupt Enable"] -pub type TXBL_R = crate::BitReader; +pub type TxblR = crate::BitReader; #[doc = "Field `TXBL` writer - TX Buffer Level Interrupt Enable"] -pub type TXBL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxblW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXDATAV` reader - RX Data Valid Interrupt Enable"] -pub type RXDATAV_R = crate::BitReader; +pub type RxdatavR = crate::BitReader; #[doc = "Field `RXDATAV` writer - RX Data Valid Interrupt Enable"] -pub type RXDATAV_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxdatavW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFULL` reader - RX Buffer Full Interrupt Enable"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXFULL` writer - RX Buffer Full Interrupt Enable"] -pub type RXFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxfullW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXOF` reader - RX Overflow Interrupt Enable"] -pub type RXOF_R = crate::BitReader; +pub type RxofR = crate::BitReader; #[doc = "Field `RXOF` writer - RX Overflow Interrupt Enable"] -pub type RXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUF` reader - RX Underflow Interrupt Enable"] -pub type RXUF_R = crate::BitReader; +pub type RxufR = crate::BitReader; #[doc = "Field `RXUF` writer - RX Underflow Interrupt Enable"] -pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXOF` reader - TX Overflow Interrupt Enable"] -pub type TXOF_R = crate::BitReader; +pub type TxofR = crate::BitReader; #[doc = "Field `TXOF` writer - TX Overflow Interrupt Enable"] -pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXUF` reader - TX Underflow Interrupt Enable"] -pub type TXUF_R = crate::BitReader; +pub type TxufR = crate::BitReader; #[doc = "Field `TXUF` writer - TX Underflow Interrupt Enable"] -pub type TXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PERR` reader - Parity Error Interrupt Enable"] -pub type PERR_R = crate::BitReader; +pub type PerrR = crate::BitReader; #[doc = "Field `PERR` writer - Parity Error Interrupt Enable"] -pub type PERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FERR` reader - Framing Error Interrupt Enable"] -pub type FERR_R = crate::BitReader; +pub type FerrR = crate::BitReader; #[doc = "Field `FERR` writer - Framing Error Interrupt Enable"] -pub type FERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPAF` reader - Multi-Processor Address Frame Interrupt"] -pub type MPAF_R = crate::BitReader; +pub type MpafR = crate::BitReader; #[doc = "Field `MPAF` writer - Multi-Processor Address Frame Interrupt"] -pub type MPAF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type MpafW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SSM` reader - Chip-Select In Main Mode Interrupt Flag"] -pub type SSM_R = crate::BitReader; +pub type SsmR = crate::BitReader; #[doc = "Field `SSM` writer - Chip-Select In Main Mode Interrupt Flag"] -pub type SSM_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SsmW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCF` reader - Collision Check Fail Interrupt Enable"] -pub type CCF_R = crate::BitReader; +pub type CcfR = crate::BitReader; #[doc = "Field `CCF` writer - Collision Check Fail Interrupt Enable"] -pub type CCF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type CcfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXIDLE` reader - TX Idle Interrupt Enable"] -pub type TXIDLE_R = crate::BitReader; +pub type TxidleR = crate::BitReader; #[doc = "Field `TXIDLE` writer - TX Idle Interrupt Enable"] -pub type TXIDLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxidleW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TCMP0` reader - Timer comparator 0 Interrupt Enable"] -pub type TCMP0_R = crate::BitReader; +pub type Tcmp0R = crate::BitReader; #[doc = "Field `TCMP0` writer - Timer comparator 0 Interrupt Enable"] -pub type TCMP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Tcmp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TCMP1` reader - Timer comparator 1 Interrupt Enable"] -pub type TCMP1_R = crate::BitReader; +pub type Tcmp1R = crate::BitReader; #[doc = "Field `TCMP1` writer - Timer comparator 1 Interrupt Enable"] -pub type TCMP1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Tcmp1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TCMP2` reader - Timer comparator 2 Interrupt Enable"] -pub type TCMP2_R = crate::BitReader; +pub type Tcmp2R = crate::BitReader; #[doc = "Field `TCMP2` writer - Timer comparator 2 Interrupt Enable"] -pub type TCMP2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Tcmp2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - TX Complete Interrupt Enable"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new((self.bits & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - TX Buffer Level Interrupt Enable"] #[inline(always)] - pub fn txbl(&self) -> TXBL_R { - TXBL_R::new(((self.bits >> 1) & 1) != 0) + pub fn txbl(&self) -> TxblR { + TxblR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RX Data Valid Interrupt Enable"] #[inline(always)] - pub fn rxdatav(&self) -> RXDATAV_R { - RXDATAV_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxdatav(&self) -> RxdatavR { + RxdatavR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - RX Buffer Full Interrupt Enable"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - RX Overflow Interrupt Enable"] #[inline(always)] - pub fn rxof(&self) -> RXOF_R { - RXOF_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxof(&self) -> RxofR { + RxofR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - RX Underflow Interrupt Enable"] #[inline(always)] - pub fn rxuf(&self) -> RXUF_R { - RXUF_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxuf(&self) -> RxufR { + RxufR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX Overflow Interrupt Enable"] #[inline(always)] - pub fn txof(&self) -> TXOF_R { - TXOF_R::new(((self.bits >> 6) & 1) != 0) + pub fn txof(&self) -> TxofR { + TxofR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - TX Underflow Interrupt Enable"] #[inline(always)] - pub fn txuf(&self) -> TXUF_R { - TXUF_R::new(((self.bits >> 7) & 1) != 0) + pub fn txuf(&self) -> TxufR { + TxufR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Parity Error Interrupt Enable"] #[inline(always)] - pub fn perr(&self) -> PERR_R { - PERR_R::new(((self.bits >> 8) & 1) != 0) + pub fn perr(&self) -> PerrR { + PerrR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Framing Error Interrupt Enable"] #[inline(always)] - pub fn ferr(&self) -> FERR_R { - FERR_R::new(((self.bits >> 9) & 1) != 0) + pub fn ferr(&self) -> FerrR { + FerrR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Multi-Processor Address Frame Interrupt"] #[inline(always)] - pub fn mpaf(&self) -> MPAF_R { - MPAF_R::new(((self.bits >> 10) & 1) != 0) + pub fn mpaf(&self) -> MpafR { + MpafR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Chip-Select In Main Mode Interrupt Flag"] #[inline(always)] - pub fn ssm(&self) -> SSM_R { - SSM_R::new(((self.bits >> 11) & 1) != 0) + pub fn ssm(&self) -> SsmR { + SsmR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Collision Check Fail Interrupt Enable"] #[inline(always)] - pub fn ccf(&self) -> CCF_R { - CCF_R::new(((self.bits >> 12) & 1) != 0) + pub fn ccf(&self) -> CcfR { + CcfR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - TX Idle Interrupt Enable"] #[inline(always)] - pub fn txidle(&self) -> TXIDLE_R { - TXIDLE_R::new(((self.bits >> 13) & 1) != 0) + pub fn txidle(&self) -> TxidleR { + TxidleR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Timer comparator 0 Interrupt Enable"] #[inline(always)] - pub fn tcmp0(&self) -> TCMP0_R { - TCMP0_R::new(((self.bits >> 14) & 1) != 0) + pub fn tcmp0(&self) -> Tcmp0R { + Tcmp0R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Timer comparator 1 Interrupt Enable"] #[inline(always)] - pub fn tcmp1(&self) -> TCMP1_R { - TCMP1_R::new(((self.bits >> 15) & 1) != 0) + pub fn tcmp1(&self) -> Tcmp1R { + Tcmp1R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Timer comparator 2 Interrupt Enable"] #[inline(always)] - pub fn tcmp2(&self) -> TCMP2_R { - TCMP2_R::new(((self.bits >> 16) & 1) != 0) + pub fn tcmp2(&self) -> Tcmp2R { + Tcmp2R::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bit 0 - TX Complete Interrupt Enable"] #[inline(always)] #[must_use] - pub fn txc(&mut self) -> TXC_W<0> { - TXC_W::new(self) + pub fn txc(&mut self) -> TxcW { + TxcW::new(self, 0) } #[doc = "Bit 1 - TX Buffer Level Interrupt Enable"] #[inline(always)] #[must_use] - pub fn txbl(&mut self) -> TXBL_W<1> { - TXBL_W::new(self) + pub fn txbl(&mut self) -> TxblW { + TxblW::new(self, 1) } #[doc = "Bit 2 - RX Data Valid Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rxdatav(&mut self) -> RXDATAV_W<2> { - RXDATAV_W::new(self) + pub fn rxdatav(&mut self) -> RxdatavW { + RxdatavW::new(self, 2) } #[doc = "Bit 3 - RX Buffer Full Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rxfull(&mut self) -> RXFULL_W<3> { - RXFULL_W::new(self) + pub fn rxfull(&mut self) -> RxfullW { + RxfullW::new(self, 3) } #[doc = "Bit 4 - RX Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rxof(&mut self) -> RXOF_W<4> { - RXOF_W::new(self) + pub fn rxof(&mut self) -> RxofW { + RxofW::new(self, 4) } #[doc = "Bit 5 - RX Underflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rxuf(&mut self) -> RXUF_W<5> { - RXUF_W::new(self) + pub fn rxuf(&mut self) -> RxufW { + RxufW::new(self, 5) } #[doc = "Bit 6 - TX Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn txof(&mut self) -> TXOF_W<6> { - TXOF_W::new(self) + pub fn txof(&mut self) -> TxofW { + TxofW::new(self, 6) } #[doc = "Bit 7 - TX Underflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn txuf(&mut self) -> TXUF_W<7> { - TXUF_W::new(self) + pub fn txuf(&mut self) -> TxufW { + TxufW::new(self, 7) } #[doc = "Bit 8 - Parity Error Interrupt Enable"] #[inline(always)] #[must_use] - pub fn perr(&mut self) -> PERR_W<8> { - PERR_W::new(self) + pub fn perr(&mut self) -> PerrW { + PerrW::new(self, 8) } #[doc = "Bit 9 - Framing Error Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ferr(&mut self) -> FERR_W<9> { - FERR_W::new(self) + pub fn ferr(&mut self) -> FerrW { + FerrW::new(self, 9) } #[doc = "Bit 10 - Multi-Processor Address Frame Interrupt"] #[inline(always)] #[must_use] - pub fn mpaf(&mut self) -> MPAF_W<10> { - MPAF_W::new(self) + pub fn mpaf(&mut self) -> MpafW { + MpafW::new(self, 10) } #[doc = "Bit 11 - Chip-Select In Main Mode Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ssm(&mut self) -> SSM_W<11> { - SSM_W::new(self) + pub fn ssm(&mut self) -> SsmW { + SsmW::new(self, 11) } #[doc = "Bit 12 - Collision Check Fail Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ccf(&mut self) -> CCF_W<12> { - CCF_W::new(self) + pub fn ccf(&mut self) -> CcfW { + CcfW::new(self, 12) } #[doc = "Bit 13 - TX Idle Interrupt Enable"] #[inline(always)] #[must_use] - pub fn txidle(&mut self) -> TXIDLE_W<13> { - TXIDLE_W::new(self) + pub fn txidle(&mut self) -> TxidleW { + TxidleW::new(self, 13) } #[doc = "Bit 14 - Timer comparator 0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn tcmp0(&mut self) -> TCMP0_W<14> { - TCMP0_W::new(self) + pub fn tcmp0(&mut self) -> Tcmp0W { + Tcmp0W::new(self, 14) } #[doc = "Bit 15 - Timer comparator 1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn tcmp1(&mut self) -> TCMP1_W<15> { - TCMP1_W::new(self) + pub fn tcmp1(&mut self) -> Tcmp1W { + Tcmp1W::new(self, 15) } #[doc = "Bit 16 - Timer comparator 2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn tcmp2(&mut self) -> TCMP2_W<16> { - TCMP2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn tcmp2(&mut self) -> Tcmp2W { + Tcmp2W::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/if_.rs index 3350320..0c26ff8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/if_.rs @@ -1,320 +1,280 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXC` reader - TX Complete Interrupt Flag"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXC` writer - TX Complete Interrupt Flag"] -pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXBL` reader - TX Buffer Level Interrupt Flag"] -pub type TXBL_R = crate::BitReader; +pub type TxblR = crate::BitReader; #[doc = "Field `TXBL` writer - TX Buffer Level Interrupt Flag"] -pub type TXBL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxblW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXDATAV` reader - RX Data Valid Interrupt Flag"] -pub type RXDATAV_R = crate::BitReader; +pub type RxdatavR = crate::BitReader; #[doc = "Field `RXDATAV` writer - RX Data Valid Interrupt Flag"] -pub type RXDATAV_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxdatavW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFULL` reader - RX Buffer Full Interrupt Flag"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXFULL` writer - RX Buffer Full Interrupt Flag"] -pub type RXFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxfullW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXOF` reader - RX Overflow Interrupt Flag"] -pub type RXOF_R = crate::BitReader; +pub type RxofR = crate::BitReader; #[doc = "Field `RXOF` writer - RX Overflow Interrupt Flag"] -pub type RXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUF` reader - RX Underflow Interrupt Flag"] -pub type RXUF_R = crate::BitReader; +pub type RxufR = crate::BitReader; #[doc = "Field `RXUF` writer - RX Underflow Interrupt Flag"] -pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXOF` reader - TX Overflow Interrupt Flag"] -pub type TXOF_R = crate::BitReader; +pub type TxofR = crate::BitReader; #[doc = "Field `TXOF` writer - TX Overflow Interrupt Flag"] -pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXUF` reader - TX Underflow Interrupt Flag"] -pub type TXUF_R = crate::BitReader; +pub type TxufR = crate::BitReader; #[doc = "Field `TXUF` writer - TX Underflow Interrupt Flag"] -pub type TXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PERR` reader - Parity Error Interrupt Flag"] -pub type PERR_R = crate::BitReader; +pub type PerrR = crate::BitReader; #[doc = "Field `PERR` writer - Parity Error Interrupt Flag"] -pub type PERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FERR` reader - Framing Error Interrupt Flag"] -pub type FERR_R = crate::BitReader; +pub type FerrR = crate::BitReader; #[doc = "Field `FERR` writer - Framing Error Interrupt Flag"] -pub type FERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPAF` reader - Multi-Processor Address Frame Interrupt"] -pub type MPAF_R = crate::BitReader; +pub type MpafR = crate::BitReader; #[doc = "Field `MPAF` writer - Multi-Processor Address Frame Interrupt"] -pub type MPAF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type MpafW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SSM` reader - Chip-Select In Main Mode Interrupt Flag"] -pub type SSM_R = crate::BitReader; +pub type SsmR = crate::BitReader; #[doc = "Field `SSM` writer - Chip-Select In Main Mode Interrupt Flag"] -pub type SSM_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SsmW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCF` reader - Collision Check Fail Interrupt Flag"] -pub type CCF_R = crate::BitReader; +pub type CcfR = crate::BitReader; #[doc = "Field `CCF` writer - Collision Check Fail Interrupt Flag"] -pub type CCF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type CcfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXIDLE` reader - TX Idle Interrupt Flag"] -pub type TXIDLE_R = crate::BitReader; +pub type TxidleR = crate::BitReader; #[doc = "Field `TXIDLE` writer - TX Idle Interrupt Flag"] -pub type TXIDLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxidleW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TCMP0` reader - Timer comparator 0 Interrupt Flag"] -pub type TCMP0_R = crate::BitReader; +pub type Tcmp0R = crate::BitReader; #[doc = "Field `TCMP0` writer - Timer comparator 0 Interrupt Flag"] -pub type TCMP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Tcmp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TCMP1` reader - Timer comparator 1 Interrupt Flag"] -pub type TCMP1_R = crate::BitReader; +pub type Tcmp1R = crate::BitReader; #[doc = "Field `TCMP1` writer - Timer comparator 1 Interrupt Flag"] -pub type TCMP1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Tcmp1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TCMP2` reader - Timer comparator 2 Interrupt Flag"] -pub type TCMP2_R = crate::BitReader; +pub type Tcmp2R = crate::BitReader; #[doc = "Field `TCMP2` writer - Timer comparator 2 Interrupt Flag"] -pub type TCMP2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Tcmp2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - TX Complete Interrupt Flag"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new((self.bits & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - TX Buffer Level Interrupt Flag"] #[inline(always)] - pub fn txbl(&self) -> TXBL_R { - TXBL_R::new(((self.bits >> 1) & 1) != 0) + pub fn txbl(&self) -> TxblR { + TxblR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RX Data Valid Interrupt Flag"] #[inline(always)] - pub fn rxdatav(&self) -> RXDATAV_R { - RXDATAV_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxdatav(&self) -> RxdatavR { + RxdatavR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - RX Buffer Full Interrupt Flag"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - RX Overflow Interrupt Flag"] #[inline(always)] - pub fn rxof(&self) -> RXOF_R { - RXOF_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxof(&self) -> RxofR { + RxofR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - RX Underflow Interrupt Flag"] #[inline(always)] - pub fn rxuf(&self) -> RXUF_R { - RXUF_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxuf(&self) -> RxufR { + RxufR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX Overflow Interrupt Flag"] #[inline(always)] - pub fn txof(&self) -> TXOF_R { - TXOF_R::new(((self.bits >> 6) & 1) != 0) + pub fn txof(&self) -> TxofR { + TxofR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - TX Underflow Interrupt Flag"] #[inline(always)] - pub fn txuf(&self) -> TXUF_R { - TXUF_R::new(((self.bits >> 7) & 1) != 0) + pub fn txuf(&self) -> TxufR { + TxufR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Parity Error Interrupt Flag"] #[inline(always)] - pub fn perr(&self) -> PERR_R { - PERR_R::new(((self.bits >> 8) & 1) != 0) + pub fn perr(&self) -> PerrR { + PerrR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Framing Error Interrupt Flag"] #[inline(always)] - pub fn ferr(&self) -> FERR_R { - FERR_R::new(((self.bits >> 9) & 1) != 0) + pub fn ferr(&self) -> FerrR { + FerrR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Multi-Processor Address Frame Interrupt"] #[inline(always)] - pub fn mpaf(&self) -> MPAF_R { - MPAF_R::new(((self.bits >> 10) & 1) != 0) + pub fn mpaf(&self) -> MpafR { + MpafR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Chip-Select In Main Mode Interrupt Flag"] #[inline(always)] - pub fn ssm(&self) -> SSM_R { - SSM_R::new(((self.bits >> 11) & 1) != 0) + pub fn ssm(&self) -> SsmR { + SsmR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Collision Check Fail Interrupt Flag"] #[inline(always)] - pub fn ccf(&self) -> CCF_R { - CCF_R::new(((self.bits >> 12) & 1) != 0) + pub fn ccf(&self) -> CcfR { + CcfR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - TX Idle Interrupt Flag"] #[inline(always)] - pub fn txidle(&self) -> TXIDLE_R { - TXIDLE_R::new(((self.bits >> 13) & 1) != 0) + pub fn txidle(&self) -> TxidleR { + TxidleR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Timer comparator 0 Interrupt Flag"] #[inline(always)] - pub fn tcmp0(&self) -> TCMP0_R { - TCMP0_R::new(((self.bits >> 14) & 1) != 0) + pub fn tcmp0(&self) -> Tcmp0R { + Tcmp0R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Timer comparator 1 Interrupt Flag"] #[inline(always)] - pub fn tcmp1(&self) -> TCMP1_R { - TCMP1_R::new(((self.bits >> 15) & 1) != 0) + pub fn tcmp1(&self) -> Tcmp1R { + Tcmp1R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Timer comparator 2 Interrupt Flag"] #[inline(always)] - pub fn tcmp2(&self) -> TCMP2_R { - TCMP2_R::new(((self.bits >> 16) & 1) != 0) + pub fn tcmp2(&self) -> Tcmp2R { + Tcmp2R::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bit 0 - TX Complete Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txc(&mut self) -> TXC_W<0> { - TXC_W::new(self) + pub fn txc(&mut self) -> TxcW { + TxcW::new(self, 0) } #[doc = "Bit 1 - TX Buffer Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txbl(&mut self) -> TXBL_W<1> { - TXBL_W::new(self) + pub fn txbl(&mut self) -> TxblW { + TxblW::new(self, 1) } #[doc = "Bit 2 - RX Data Valid Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxdatav(&mut self) -> RXDATAV_W<2> { - RXDATAV_W::new(self) + pub fn rxdatav(&mut self) -> RxdatavW { + RxdatavW::new(self, 2) } #[doc = "Bit 3 - RX Buffer Full Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxfull(&mut self) -> RXFULL_W<3> { - RXFULL_W::new(self) + pub fn rxfull(&mut self) -> RxfullW { + RxfullW::new(self, 3) } #[doc = "Bit 4 - RX Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxof(&mut self) -> RXOF_W<4> { - RXOF_W::new(self) + pub fn rxof(&mut self) -> RxofW { + RxofW::new(self, 4) } #[doc = "Bit 5 - RX Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxuf(&mut self) -> RXUF_W<5> { - RXUF_W::new(self) + pub fn rxuf(&mut self) -> RxufW { + RxufW::new(self, 5) } #[doc = "Bit 6 - TX Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txof(&mut self) -> TXOF_W<6> { - TXOF_W::new(self) + pub fn txof(&mut self) -> TxofW { + TxofW::new(self, 6) } #[doc = "Bit 7 - TX Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txuf(&mut self) -> TXUF_W<7> { - TXUF_W::new(self) + pub fn txuf(&mut self) -> TxufW { + TxufW::new(self, 7) } #[doc = "Bit 8 - Parity Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn perr(&mut self) -> PERR_W<8> { - PERR_W::new(self) + pub fn perr(&mut self) -> PerrW { + PerrW::new(self, 8) } #[doc = "Bit 9 - Framing Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ferr(&mut self) -> FERR_W<9> { - FERR_W::new(self) + pub fn ferr(&mut self) -> FerrW { + FerrW::new(self, 9) } #[doc = "Bit 10 - Multi-Processor Address Frame Interrupt"] #[inline(always)] #[must_use] - pub fn mpaf(&mut self) -> MPAF_W<10> { - MPAF_W::new(self) + pub fn mpaf(&mut self) -> MpafW { + MpafW::new(self, 10) } #[doc = "Bit 11 - Chip-Select In Main Mode Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ssm(&mut self) -> SSM_W<11> { - SSM_W::new(self) + pub fn ssm(&mut self) -> SsmW { + SsmW::new(self, 11) } #[doc = "Bit 12 - Collision Check Fail Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ccf(&mut self) -> CCF_W<12> { - CCF_W::new(self) + pub fn ccf(&mut self) -> CcfW { + CcfW::new(self, 12) } #[doc = "Bit 13 - TX Idle Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txidle(&mut self) -> TXIDLE_W<13> { - TXIDLE_W::new(self) + pub fn txidle(&mut self) -> TxidleW { + TxidleW::new(self, 13) } #[doc = "Bit 14 - Timer comparator 0 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn tcmp0(&mut self) -> TCMP0_W<14> { - TCMP0_W::new(self) + pub fn tcmp0(&mut self) -> Tcmp0W { + Tcmp0W::new(self, 14) } #[doc = "Bit 15 - Timer comparator 1 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn tcmp1(&mut self) -> TCMP1_W<15> { - TCMP1_W::new(self) + pub fn tcmp1(&mut self) -> Tcmp1W { + Tcmp1W::new(self, 15) } #[doc = "Bit 16 - Timer comparator 2 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn tcmp2(&mut self) -> TCMP2_W<16> { - TCMP2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn tcmp2(&mut self) -> Tcmp2W { + Tcmp2W::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0x02"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/ipversion.rs index 7b81f0e..0452bc5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IPVERSION"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IPVERSION"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/irctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/irctrl.rs index 2bed1a6..3ec2811 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/irctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/irctrl.rs @@ -1,230 +1,201 @@ #[doc = "Register `IRCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IRCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `IREN` reader - Enable IrDA Module"] -pub type IREN_R = crate::BitReader; +pub type IrenR = crate::BitReader; #[doc = "Field `IREN` writer - Enable IrDA Module"] -pub type IREN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRCTRL_SPEC, bool, O>; -#[doc = "Field `IRPW` reader - IrDA TX Pulse Width"] -pub type IRPW_R = crate::FieldReader; +pub type IrenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "IrDA TX Pulse Width\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum IRPW_A { +pub enum Irpw { #[doc = "0: IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1"] - ONE = 0, + One = 0, #[doc = "1: IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1"] - TWO = 1, + Two = 1, #[doc = "2: IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1"] - THREE = 2, + Three = 2, #[doc = "3: IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1"] - FOUR = 3, + Four = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: IRPW_A) -> Self { + fn from(variant: Irpw) -> Self { variant as _ } } -impl IRPW_R { +impl crate::FieldSpec for Irpw { + type Ux = u8; +} +impl crate::IsEnum for Irpw {} +#[doc = "Field `IRPW` reader - IrDA TX Pulse Width"] +pub type IrpwR = crate::FieldReader; +impl IrpwR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> IRPW_A { + pub const fn variant(&self) -> Irpw { match self.bits { - 0 => IRPW_A::ONE, - 1 => IRPW_A::TWO, - 2 => IRPW_A::THREE, - 3 => IRPW_A::FOUR, + 0 => Irpw::One, + 1 => Irpw::Two, + 2 => Irpw::Three, + 3 => Irpw::Four, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == IRPW_A::ONE + *self == Irpw::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == IRPW_A::TWO + *self == Irpw::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == IRPW_A::THREE + *self == Irpw::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == IRPW_A::FOUR + *self == Irpw::Four } } #[doc = "Field `IRPW` writer - IrDA TX Pulse Width"] -pub type IRPW_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, IRCTRL_SPEC, u8, IRPW_A, 2, O>; -impl<'a, const O: u8> IRPW_W<'a, O> { +pub type IrpwW<'a, REG> = crate::FieldWriter<'a, REG, 2, Irpw, crate::Safe>; +impl<'a, REG> IrpwW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(IRPW_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Irpw::One) } #[doc = "IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(IRPW_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Irpw::Two) } #[doc = "IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(IRPW_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Irpw::Three) } #[doc = "IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(IRPW_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Irpw::Four) } } -#[doc = "Field `IRFILT` reader - IrDA RX Filter"] -pub type IRFILT_R = crate::BitReader; #[doc = "IrDA RX Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IRFILT_A { +pub enum Irfilt { #[doc = "0: No filter enabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Filter enabled. IrDA pulse must be high for at least 5 consecutive clock cycles to be detected"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IRFILT_A) -> Self { + fn from(variant: Irfilt) -> Self { variant as u8 != 0 } } -impl IRFILT_R { +#[doc = "Field `IRFILT` reader - IrDA RX Filter"] +pub type IrfiltR = crate::BitReader; +impl IrfiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> IRFILT_A { + pub const fn variant(&self) -> Irfilt { match self.bits { - false => IRFILT_A::DISABLE, - true => IRFILT_A::ENABLE, + false => Irfilt::Disable, + true => Irfilt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "No filter enabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == IRFILT_A::DISABLE + *self == Irfilt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Filter enabled. IrDA pulse must be high for at least 5 consecutive clock cycles to be detected"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == IRFILT_A::ENABLE + *self == Irfilt::Enable } } #[doc = "Field `IRFILT` writer - IrDA RX Filter"] -pub type IRFILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRCTRL_SPEC, IRFILT_A, O>; -impl<'a, const O: u8> IRFILT_W<'a, O> { +pub type IrfiltW<'a, REG> = crate::BitWriter<'a, REG, Irfilt>; +impl<'a, REG> IrfiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No filter enabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(IRFILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Irfilt::Disable) } #[doc = "Filter enabled. IrDA pulse must be high for at least 5 consecutive clock cycles to be detected"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(IRFILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Irfilt::Enable) } } impl R { #[doc = "Bit 0 - Enable IrDA Module"] #[inline(always)] - pub fn iren(&self) -> IREN_R { - IREN_R::new((self.bits & 1) != 0) + pub fn iren(&self) -> IrenR { + IrenR::new((self.bits & 1) != 0) } #[doc = "Bits 1:2 - IrDA TX Pulse Width"] #[inline(always)] - pub fn irpw(&self) -> IRPW_R { - IRPW_R::new(((self.bits >> 1) & 3) as u8) + pub fn irpw(&self) -> IrpwR { + IrpwR::new(((self.bits >> 1) & 3) as u8) } #[doc = "Bit 3 - IrDA RX Filter"] #[inline(always)] - pub fn irfilt(&self) -> IRFILT_R { - IRFILT_R::new(((self.bits >> 3) & 1) != 0) + pub fn irfilt(&self) -> IrfiltR { + IrfiltR::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable IrDA Module"] #[inline(always)] #[must_use] - pub fn iren(&mut self) -> IREN_W<0> { - IREN_W::new(self) + pub fn iren(&mut self) -> IrenW { + IrenW::new(self, 0) } #[doc = "Bits 1:2 - IrDA TX Pulse Width"] #[inline(always)] #[must_use] - pub fn irpw(&mut self) -> IRPW_W<1> { - IRPW_W::new(self) + pub fn irpw(&mut self) -> IrpwW { + IrpwW::new(self, 1) } #[doc = "Bit 3 - IrDA RX Filter"] #[inline(always)] #[must_use] - pub fn irfilt(&mut self) -> IRFILT_W<3> { - IRFILT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn irfilt(&mut self) -> IrfiltW { + IrfiltW::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irctrl](index.html) module"] -pub struct IRCTRL_SPEC; -impl crate::RegisterSpec for IRCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`irctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrctrlSpec; +impl crate::RegisterSpec for IrctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [irctrl::R](R) reader structure"] -impl crate::Readable for IRCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [irctrl::W](W) writer structure"] -impl crate::Writable for IRCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`irctrl::R`](R) reader structure"] +impl crate::Readable for IrctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`irctrl::W`](W) writer structure"] +impl crate::Writable for IrctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRCTRL to value 0"] -impl crate::Resettable for IRCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IrctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/rxdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/rxdata.rs index 6197259..b8a3ba6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/rxdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/rxdata.rs @@ -1,37 +1,22 @@ #[doc = "Register `RXDATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATA` reader - RX Data"] -pub type RXDATA_R = crate::FieldReader; +pub type RxdataR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - RX Data"] #[inline(always)] - pub fn rxdata(&self) -> RXDATA_R { - RXDATA_R::new((self.bits & 0xff) as u8) + pub fn rxdata(&self) -> RxdataR { + RxdataR::new((self.bits & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdata](index.html) module"] -pub struct RXDATA_SPEC; -impl crate::RegisterSpec for RXDATA_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdata::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdataSpec; +impl crate::RegisterSpec for RxdataSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdata::R](R) reader structure"] -impl crate::Readable for RXDATA_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdata::R`](R) reader structure"] +impl crate::Readable for RxdataSpec {} #[doc = "`reset()` method sets RXDATA to value 0"] -impl crate::Resettable for RXDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/rxdatax.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/rxdatax.rs index 4e61376..5ed9484 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/rxdatax.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/rxdatax.rs @@ -1,51 +1,36 @@ #[doc = "Register `RXDATAX` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATA` reader - RX Data"] -pub type RXDATA_R = crate::FieldReader; +pub type RxdataR = crate::FieldReader; #[doc = "Field `PERR` reader - Data Parity Error"] -pub type PERR_R = crate::BitReader; +pub type PerrR = crate::BitReader; #[doc = "Field `FERR` reader - Data Framing Error"] -pub type FERR_R = crate::BitReader; +pub type FerrR = crate::BitReader; impl R { #[doc = "Bits 0:8 - RX Data"] #[inline(always)] - pub fn rxdata(&self) -> RXDATA_R { - RXDATA_R::new((self.bits & 0x01ff) as u16) + pub fn rxdata(&self) -> RxdataR { + RxdataR::new((self.bits & 0x01ff) as u16) } #[doc = "Bit 14 - Data Parity Error"] #[inline(always)] - pub fn perr(&self) -> PERR_R { - PERR_R::new(((self.bits >> 14) & 1) != 0) + pub fn perr(&self) -> PerrR { + PerrR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Data Framing Error"] #[inline(always)] - pub fn ferr(&self) -> FERR_R { - FERR_R::new(((self.bits >> 15) & 1) != 0) + pub fn ferr(&self) -> FerrR { + FerrR::new(((self.bits >> 15) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdatax](index.html) module"] -pub struct RXDATAX_SPEC; -impl crate::RegisterSpec for RXDATAX_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdatax::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdataxSpec; +impl crate::RegisterSpec for RxdataxSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdatax::R](R) reader structure"] -impl crate::Readable for RXDATAX_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdatax::R`](R) reader structure"] +impl crate::Readable for RxdataxSpec {} #[doc = "`reset()` method sets RXDATAX to value 0"] -impl crate::Resettable for RXDATAX_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdataxSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/rxdataxp.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/rxdataxp.rs index c9f077a..d8b4b08 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/rxdataxp.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/rxdataxp.rs @@ -1,51 +1,36 @@ #[doc = "Register `RXDATAXP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATAP` reader - RX Data Peek"] -pub type RXDATAP_R = crate::FieldReader; +pub type RxdatapR = crate::FieldReader; #[doc = "Field `PERRP` reader - Data Parity Error Peek"] -pub type PERRP_R = crate::BitReader; +pub type PerrpR = crate::BitReader; #[doc = "Field `FERRP` reader - Data Framing Error Peek"] -pub type FERRP_R = crate::BitReader; +pub type FerrpR = crate::BitReader; impl R { #[doc = "Bits 0:8 - RX Data Peek"] #[inline(always)] - pub fn rxdatap(&self) -> RXDATAP_R { - RXDATAP_R::new((self.bits & 0x01ff) as u16) + pub fn rxdatap(&self) -> RxdatapR { + RxdatapR::new((self.bits & 0x01ff) as u16) } #[doc = "Bit 14 - Data Parity Error Peek"] #[inline(always)] - pub fn perrp(&self) -> PERRP_R { - PERRP_R::new(((self.bits >> 14) & 1) != 0) + pub fn perrp(&self) -> PerrpR { + PerrpR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Data Framing Error Peek"] #[inline(always)] - pub fn ferrp(&self) -> FERRP_R { - FERRP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ferrp(&self) -> FerrpR { + FerrpR::new(((self.bits >> 15) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdataxp](index.html) module"] -pub struct RXDATAXP_SPEC; -impl crate::RegisterSpec for RXDATAXP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdataxp::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdataxpSpec; +impl crate::RegisterSpec for RxdataxpSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdataxp::R](R) reader structure"] -impl crate::Readable for RXDATAXP_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdataxp::R`](R) reader structure"] +impl crate::Readable for RxdataxpSpec {} #[doc = "`reset()` method sets RXDATAXP to value 0"] -impl crate::Resettable for RXDATAXP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdataxpSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/rxdouble.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/rxdouble.rs index d739f89..dcc567b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/rxdouble.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/rxdouble.rs @@ -1,44 +1,29 @@ #[doc = "Register `RXDOUBLE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATA0` reader - RX Data 0"] -pub type RXDATA0_R = crate::FieldReader; +pub type Rxdata0R = crate::FieldReader; #[doc = "Field `RXDATA1` reader - RX Data 1"] -pub type RXDATA1_R = crate::FieldReader; +pub type Rxdata1R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - RX Data 0"] #[inline(always)] - pub fn rxdata0(&self) -> RXDATA0_R { - RXDATA0_R::new((self.bits & 0xff) as u8) + pub fn rxdata0(&self) -> Rxdata0R { + Rxdata0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - RX Data 1"] #[inline(always)] - pub fn rxdata1(&self) -> RXDATA1_R { - RXDATA1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn rxdata1(&self) -> Rxdata1R { + Rxdata1R::new(((self.bits >> 8) & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdouble](index.html) module"] -pub struct RXDOUBLE_SPEC; -impl crate::RegisterSpec for RXDOUBLE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdouble::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdoubleSpec; +impl crate::RegisterSpec for RxdoubleSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdouble::R](R) reader structure"] -impl crate::Readable for RXDOUBLE_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdouble::R`](R) reader structure"] +impl crate::Readable for RxdoubleSpec {} #[doc = "`reset()` method sets RXDOUBLE to value 0"] -impl crate::Resettable for RXDOUBLE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdoubleSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/rxdoublex.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/rxdoublex.rs index 9a22010..2459281 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/rxdoublex.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/rxdoublex.rs @@ -1,72 +1,57 @@ #[doc = "Register `RXDOUBLEX` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATA0` reader - RX Data 0"] -pub type RXDATA0_R = crate::FieldReader; +pub type Rxdata0R = crate::FieldReader; #[doc = "Field `PERR0` reader - Data Parity Error 0"] -pub type PERR0_R = crate::BitReader; +pub type Perr0R = crate::BitReader; #[doc = "Field `FERR0` reader - Data Framing Error 0"] -pub type FERR0_R = crate::BitReader; +pub type Ferr0R = crate::BitReader; #[doc = "Field `RXDATA1` reader - RX Data 1"] -pub type RXDATA1_R = crate::FieldReader; +pub type Rxdata1R = crate::FieldReader; #[doc = "Field `PERR1` reader - Data Parity Error 1"] -pub type PERR1_R = crate::BitReader; +pub type Perr1R = crate::BitReader; #[doc = "Field `FERR1` reader - Data Framing Error 1"] -pub type FERR1_R = crate::BitReader; +pub type Ferr1R = crate::BitReader; impl R { #[doc = "Bits 0:8 - RX Data 0"] #[inline(always)] - pub fn rxdata0(&self) -> RXDATA0_R { - RXDATA0_R::new((self.bits & 0x01ff) as u16) + pub fn rxdata0(&self) -> Rxdata0R { + Rxdata0R::new((self.bits & 0x01ff) as u16) } #[doc = "Bit 14 - Data Parity Error 0"] #[inline(always)] - pub fn perr0(&self) -> PERR0_R { - PERR0_R::new(((self.bits >> 14) & 1) != 0) + pub fn perr0(&self) -> Perr0R { + Perr0R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Data Framing Error 0"] #[inline(always)] - pub fn ferr0(&self) -> FERR0_R { - FERR0_R::new(((self.bits >> 15) & 1) != 0) + pub fn ferr0(&self) -> Ferr0R { + Ferr0R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:24 - RX Data 1"] #[inline(always)] - pub fn rxdata1(&self) -> RXDATA1_R { - RXDATA1_R::new(((self.bits >> 16) & 0x01ff) as u16) + pub fn rxdata1(&self) -> Rxdata1R { + Rxdata1R::new(((self.bits >> 16) & 0x01ff) as u16) } #[doc = "Bit 30 - Data Parity Error 1"] #[inline(always)] - pub fn perr1(&self) -> PERR1_R { - PERR1_R::new(((self.bits >> 30) & 1) != 0) + pub fn perr1(&self) -> Perr1R { + Perr1R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Data Framing Error 1"] #[inline(always)] - pub fn ferr1(&self) -> FERR1_R { - FERR1_R::new(((self.bits >> 31) & 1) != 0) + pub fn ferr1(&self) -> Ferr1R { + Ferr1R::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdoublex](index.html) module"] -pub struct RXDOUBLEX_SPEC; -impl crate::RegisterSpec for RXDOUBLEX_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdoublex::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdoublexSpec; +impl crate::RegisterSpec for RxdoublexSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdoublex::R](R) reader structure"] -impl crate::Readable for RXDOUBLEX_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdoublex::R`](R) reader structure"] +impl crate::Readable for RxdoublexSpec {} #[doc = "`reset()` method sets RXDOUBLEX to value 0"] -impl crate::Resettable for RXDOUBLEX_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdoublexSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/rxdoublexp.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/rxdoublexp.rs index f83f335..d084e17 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/rxdoublexp.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/rxdoublexp.rs @@ -1,72 +1,57 @@ #[doc = "Register `RXDOUBLEXP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATAP0` reader - RX Data 0 Peek"] -pub type RXDATAP0_R = crate::FieldReader; +pub type Rxdatap0R = crate::FieldReader; #[doc = "Field `PERRP0` reader - Data Parity Error 0 Peek"] -pub type PERRP0_R = crate::BitReader; +pub type Perrp0R = crate::BitReader; #[doc = "Field `FERRP0` reader - Data Framing Error 0 Peek"] -pub type FERRP0_R = crate::BitReader; +pub type Ferrp0R = crate::BitReader; #[doc = "Field `RXDATAP1` reader - RX Data 1 Peek"] -pub type RXDATAP1_R = crate::FieldReader; +pub type Rxdatap1R = crate::FieldReader; #[doc = "Field `PERRP1` reader - Data Parity Error 1 Peek"] -pub type PERRP1_R = crate::BitReader; +pub type Perrp1R = crate::BitReader; #[doc = "Field `FERRP1` reader - Data Framing Error 1 Peek"] -pub type FERRP1_R = crate::BitReader; +pub type Ferrp1R = crate::BitReader; impl R { #[doc = "Bits 0:8 - RX Data 0 Peek"] #[inline(always)] - pub fn rxdatap0(&self) -> RXDATAP0_R { - RXDATAP0_R::new((self.bits & 0x01ff) as u16) + pub fn rxdatap0(&self) -> Rxdatap0R { + Rxdatap0R::new((self.bits & 0x01ff) as u16) } #[doc = "Bit 14 - Data Parity Error 0 Peek"] #[inline(always)] - pub fn perrp0(&self) -> PERRP0_R { - PERRP0_R::new(((self.bits >> 14) & 1) != 0) + pub fn perrp0(&self) -> Perrp0R { + Perrp0R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Data Framing Error 0 Peek"] #[inline(always)] - pub fn ferrp0(&self) -> FERRP0_R { - FERRP0_R::new(((self.bits >> 15) & 1) != 0) + pub fn ferrp0(&self) -> Ferrp0R { + Ferrp0R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:24 - RX Data 1 Peek"] #[inline(always)] - pub fn rxdatap1(&self) -> RXDATAP1_R { - RXDATAP1_R::new(((self.bits >> 16) & 0x01ff) as u16) + pub fn rxdatap1(&self) -> Rxdatap1R { + Rxdatap1R::new(((self.bits >> 16) & 0x01ff) as u16) } #[doc = "Bit 30 - Data Parity Error 1 Peek"] #[inline(always)] - pub fn perrp1(&self) -> PERRP1_R { - PERRP1_R::new(((self.bits >> 30) & 1) != 0) + pub fn perrp1(&self) -> Perrp1R { + Perrp1R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Data Framing Error 1 Peek"] #[inline(always)] - pub fn ferrp1(&self) -> FERRP1_R { - FERRP1_R::new(((self.bits >> 31) & 1) != 0) + pub fn ferrp1(&self) -> Ferrp1R { + Ferrp1R::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdoublexp](index.html) module"] -pub struct RXDOUBLEXP_SPEC; -impl crate::RegisterSpec for RXDOUBLEXP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdoublexp::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdoublexpSpec; +impl crate::RegisterSpec for RxdoublexpSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdoublexp::R](R) reader structure"] -impl crate::Readable for RXDOUBLEXP_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdoublexp::R`](R) reader structure"] +impl crate::Readable for RxdoublexpSpec {} #[doc = "`reset()` method sets RXDOUBLEXP to value 0"] -impl crate::Resettable for RXDOUBLEXP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdoublexpSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/status.rs index 891a183..406fae2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/status.rs @@ -1,142 +1,127 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXENS` reader - Receiver Enable Status"] -pub type RXENS_R = crate::BitReader; +pub type RxensR = crate::BitReader; #[doc = "Field `TXENS` reader - Transmitter Enable Status"] -pub type TXENS_R = crate::BitReader; +pub type TxensR = crate::BitReader; #[doc = "Field `MASTER` reader - SPI Main Mode"] -pub type MASTER_R = crate::BitReader; +pub type MasterR = crate::BitReader; #[doc = "Field `RXBLOCK` reader - Block Incoming Data"] -pub type RXBLOCK_R = crate::BitReader; +pub type RxblockR = crate::BitReader; #[doc = "Field `TXTRI` reader - Transmitter Tristated"] -pub type TXTRI_R = crate::BitReader; +pub type TxtriR = crate::BitReader; #[doc = "Field `TXC` reader - TX Complete"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXBL` reader - TX Buffer Level"] -pub type TXBL_R = crate::BitReader; +pub type TxblR = crate::BitReader; #[doc = "Field `RXDATAV` reader - RX Data Valid"] -pub type RXDATAV_R = crate::BitReader; +pub type RxdatavR = crate::BitReader; #[doc = "Field `RXFULL` reader - RX FIFO Full"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `TXBDRIGHT` reader - TX Buffer Expects Double Right Data"] -pub type TXBDRIGHT_R = crate::BitReader; +pub type TxbdrightR = crate::BitReader; #[doc = "Field `TXBSRIGHT` reader - TX Buffer Expects Single Right Data"] -pub type TXBSRIGHT_R = crate::BitReader; +pub type TxbsrightR = crate::BitReader; #[doc = "Field `RXDATAVRIGHT` reader - RX Data Right"] -pub type RXDATAVRIGHT_R = crate::BitReader; +pub type RxdatavrightR = crate::BitReader; #[doc = "Field `RXFULLRIGHT` reader - RX Full of Right Data"] -pub type RXFULLRIGHT_R = crate::BitReader; +pub type RxfullrightR = crate::BitReader; #[doc = "Field `TXIDLE` reader - TX Idle"] -pub type TXIDLE_R = crate::BitReader; +pub type TxidleR = crate::BitReader; #[doc = "Field `TIMERRESTARTED` reader - The USART Timer restarted itself"] -pub type TIMERRESTARTED_R = crate::BitReader; +pub type TimerrestartedR = crate::BitReader; #[doc = "Field `TXBUFCNT` reader - TX Buffer Count"] -pub type TXBUFCNT_R = crate::FieldReader; +pub type TxbufcntR = crate::FieldReader; impl R { #[doc = "Bit 0 - Receiver Enable Status"] #[inline(always)] - pub fn rxens(&self) -> RXENS_R { - RXENS_R::new((self.bits & 1) != 0) + pub fn rxens(&self) -> RxensR { + RxensR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transmitter Enable Status"] #[inline(always)] - pub fn txens(&self) -> TXENS_R { - TXENS_R::new(((self.bits >> 1) & 1) != 0) + pub fn txens(&self) -> TxensR { + TxensR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - SPI Main Mode"] #[inline(always)] - pub fn master(&self) -> MASTER_R { - MASTER_R::new(((self.bits >> 2) & 1) != 0) + pub fn master(&self) -> MasterR { + MasterR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Block Incoming Data"] #[inline(always)] - pub fn rxblock(&self) -> RXBLOCK_R { - RXBLOCK_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxblock(&self) -> RxblockR { + RxblockR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Transmitter Tristated"] #[inline(always)] - pub fn txtri(&self) -> TXTRI_R { - TXTRI_R::new(((self.bits >> 4) & 1) != 0) + pub fn txtri(&self) -> TxtriR { + TxtriR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - TX Complete"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new(((self.bits >> 5) & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX Buffer Level"] #[inline(always)] - pub fn txbl(&self) -> TXBL_R { - TXBL_R::new(((self.bits >> 6) & 1) != 0) + pub fn txbl(&self) -> TxblR { + TxblR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - RX Data Valid"] #[inline(always)] - pub fn rxdatav(&self) -> RXDATAV_R { - RXDATAV_R::new(((self.bits >> 7) & 1) != 0) + pub fn rxdatav(&self) -> RxdatavR { + RxdatavR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - RX FIFO Full"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 8) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - TX Buffer Expects Double Right Data"] #[inline(always)] - pub fn txbdright(&self) -> TXBDRIGHT_R { - TXBDRIGHT_R::new(((self.bits >> 9) & 1) != 0) + pub fn txbdright(&self) -> TxbdrightR { + TxbdrightR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - TX Buffer Expects Single Right Data"] #[inline(always)] - pub fn txbsright(&self) -> TXBSRIGHT_R { - TXBSRIGHT_R::new(((self.bits >> 10) & 1) != 0) + pub fn txbsright(&self) -> TxbsrightR { + TxbsrightR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - RX Data Right"] #[inline(always)] - pub fn rxdatavright(&self) -> RXDATAVRIGHT_R { - RXDATAVRIGHT_R::new(((self.bits >> 11) & 1) != 0) + pub fn rxdatavright(&self) -> RxdatavrightR { + RxdatavrightR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - RX Full of Right Data"] #[inline(always)] - pub fn rxfullright(&self) -> RXFULLRIGHT_R { - RXFULLRIGHT_R::new(((self.bits >> 12) & 1) != 0) + pub fn rxfullright(&self) -> RxfullrightR { + RxfullrightR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - TX Idle"] #[inline(always)] - pub fn txidle(&self) -> TXIDLE_R { - TXIDLE_R::new(((self.bits >> 13) & 1) != 0) + pub fn txidle(&self) -> TxidleR { + TxidleR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - The USART Timer restarted itself"] #[inline(always)] - pub fn timerrestarted(&self) -> TIMERRESTARTED_R { - TIMERRESTARTED_R::new(((self.bits >> 14) & 1) != 0) + pub fn timerrestarted(&self) -> TimerrestartedR { + TimerrestartedR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bits 16:17 - TX Buffer Count"] #[inline(always)] - pub fn txbufcnt(&self) -> TXBUFCNT_R { - TXBUFCNT_R::new(((self.bits >> 16) & 3) as u8) + pub fn txbufcnt(&self) -> TxbufcntR { + TxbufcntR::new(((self.bits >> 16) & 3) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0x2040"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0x2040; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0x2040; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/timecmp0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/timecmp0.rs index e24a642..6b3491a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/timecmp0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/timecmp0.rs @@ -1,332 +1,311 @@ #[doc = "Register `TIMECMP0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMECMP0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TCMPVAL` reader - Timer comparator 0."] -pub type TCMPVAL_R = crate::FieldReader; +pub type TcmpvalR = crate::FieldReader; #[doc = "Field `TCMPVAL` writer - Timer comparator 0."] -pub type TCMPVAL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMECMP0_SPEC, u8, u8, 8, O>; -#[doc = "Field `TSTART` reader - Timer start source"] -pub type TSTART_R = crate::FieldReader; +pub type TcmpvalW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Timer start source\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TSTART_A { +pub enum Tstart { #[doc = "0: Comparator 0 is disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Comparator 0 and timer are started at TX end of frame"] - TXEOF = 1, + Txeof = 1, #[doc = "2: Comparator 0 and timer are started at TX Complete"] - TXC = 2, + Txc = 2, #[doc = "3: Comparator 0 and timer are started at RX going going Active (default: low)"] - RXACT = 3, + Rxact = 3, #[doc = "4: Comparator 0 and timer are started at RX end of frame"] - RXEOF = 4, + Rxeof = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TSTART_A) -> Self { + fn from(variant: Tstart) -> Self { variant as _ } } -impl TSTART_R { +impl crate::FieldSpec for Tstart { + type Ux = u8; +} +impl crate::IsEnum for Tstart {} +#[doc = "Field `TSTART` reader - Timer start source"] +pub type TstartR = crate::FieldReader; +impl TstartR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TSTART_A::DISABLE), - 1 => Some(TSTART_A::TXEOF), - 2 => Some(TSTART_A::TXC), - 3 => Some(TSTART_A::RXACT), - 4 => Some(TSTART_A::RXEOF), + 0 => Some(Tstart::Disable), + 1 => Some(Tstart::Txeof), + 2 => Some(Tstart::Txc), + 3 => Some(Tstart::Rxact), + 4 => Some(Tstart::Rxeof), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Comparator 0 is disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == TSTART_A::DISABLE + *self == Tstart::Disable } - #[doc = "Checks if the value of the field is `TXEOF`"] + #[doc = "Comparator 0 and timer are started at TX end of frame"] #[inline(always)] pub fn is_txeof(&self) -> bool { - *self == TSTART_A::TXEOF + *self == Tstart::Txeof } - #[doc = "Checks if the value of the field is `TXC`"] + #[doc = "Comparator 0 and timer are started at TX Complete"] #[inline(always)] pub fn is_txc(&self) -> bool { - *self == TSTART_A::TXC + *self == Tstart::Txc } - #[doc = "Checks if the value of the field is `RXACT`"] + #[doc = "Comparator 0 and timer are started at RX going going Active (default: low)"] #[inline(always)] pub fn is_rxact(&self) -> bool { - *self == TSTART_A::RXACT + *self == Tstart::Rxact } - #[doc = "Checks if the value of the field is `RXEOF`"] + #[doc = "Comparator 0 and timer are started at RX end of frame"] #[inline(always)] pub fn is_rxeof(&self) -> bool { - *self == TSTART_A::RXEOF + *self == Tstart::Rxeof } } #[doc = "Field `TSTART` writer - Timer start source"] -pub type TSTART_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMECMP0_SPEC, u8, TSTART_A, 3, O>; -impl<'a, const O: u8> TSTART_W<'a, O> { +pub type TstartW<'a, REG> = crate::FieldWriter<'a, REG, 3, Tstart>; +impl<'a, REG> TstartW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Comparator 0 is disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(TSTART_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Tstart::Disable) } #[doc = "Comparator 0 and timer are started at TX end of frame"] #[inline(always)] - pub fn txeof(self) -> &'a mut W { - self.variant(TSTART_A::TXEOF) + pub fn txeof(self) -> &'a mut crate::W { + self.variant(Tstart::Txeof) } #[doc = "Comparator 0 and timer are started at TX Complete"] #[inline(always)] - pub fn txc(self) -> &'a mut W { - self.variant(TSTART_A::TXC) + pub fn txc(self) -> &'a mut crate::W { + self.variant(Tstart::Txc) } #[doc = "Comparator 0 and timer are started at RX going going Active (default: low)"] #[inline(always)] - pub fn rxact(self) -> &'a mut W { - self.variant(TSTART_A::RXACT) + pub fn rxact(self) -> &'a mut crate::W { + self.variant(Tstart::Rxact) } #[doc = "Comparator 0 and timer are started at RX end of frame"] #[inline(always)] - pub fn rxeof(self) -> &'a mut W { - self.variant(TSTART_A::RXEOF) + pub fn rxeof(self) -> &'a mut crate::W { + self.variant(Tstart::Rxeof) } } -#[doc = "Field `TSTOP` reader - Source used to disable comparator 0"] -pub type TSTOP_R = crate::FieldReader; #[doc = "Source used to disable comparator 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TSTOP_A { +pub enum Tstop { #[doc = "0: Comparator 0 is disabled when the counter equals TCMPVAL and triggers a TCMP0 event"] - TCMP0 = 0, + Tcmp0 = 0, #[doc = "1: Comparator 0 is disabled at TX start TX Engine"] - TXST = 1, + Txst = 1, #[doc = "2: Comparator 0 is disabled on RX going going Active (default: low)"] - RXACT = 2, + Rxact = 2, #[doc = "3: Comparator 0 is disabled on RX going Inactive"] - RXACTN = 3, + Rxactn = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TSTOP_A) -> Self { + fn from(variant: Tstop) -> Self { variant as _ } } -impl TSTOP_R { +impl crate::FieldSpec for Tstop { + type Ux = u8; +} +impl crate::IsEnum for Tstop {} +#[doc = "Field `TSTOP` reader - Source used to disable comparator 0"] +pub type TstopR = crate::FieldReader; +impl TstopR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TSTOP_A::TCMP0), - 1 => Some(TSTOP_A::TXST), - 2 => Some(TSTOP_A::RXACT), - 3 => Some(TSTOP_A::RXACTN), + 0 => Some(Tstop::Tcmp0), + 1 => Some(Tstop::Txst), + 2 => Some(Tstop::Rxact), + 3 => Some(Tstop::Rxactn), _ => None, } } - #[doc = "Checks if the value of the field is `TCMP0`"] + #[doc = "Comparator 0 is disabled when the counter equals TCMPVAL and triggers a TCMP0 event"] #[inline(always)] pub fn is_tcmp0(&self) -> bool { - *self == TSTOP_A::TCMP0 + *self == Tstop::Tcmp0 } - #[doc = "Checks if the value of the field is `TXST`"] + #[doc = "Comparator 0 is disabled at TX start TX Engine"] #[inline(always)] pub fn is_txst(&self) -> bool { - *self == TSTOP_A::TXST + *self == Tstop::Txst } - #[doc = "Checks if the value of the field is `RXACT`"] + #[doc = "Comparator 0 is disabled on RX going going Active (default: low)"] #[inline(always)] pub fn is_rxact(&self) -> bool { - *self == TSTOP_A::RXACT + *self == Tstop::Rxact } - #[doc = "Checks if the value of the field is `RXACTN`"] + #[doc = "Comparator 0 is disabled on RX going Inactive"] #[inline(always)] pub fn is_rxactn(&self) -> bool { - *self == TSTOP_A::RXACTN + *self == Tstop::Rxactn } } #[doc = "Field `TSTOP` writer - Source used to disable comparator 0"] -pub type TSTOP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMECMP0_SPEC, u8, TSTOP_A, 3, O>; -impl<'a, const O: u8> TSTOP_W<'a, O> { +pub type TstopW<'a, REG> = crate::FieldWriter<'a, REG, 3, Tstop>; +impl<'a, REG> TstopW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Comparator 0 is disabled when the counter equals TCMPVAL and triggers a TCMP0 event"] #[inline(always)] - pub fn tcmp0(self) -> &'a mut W { - self.variant(TSTOP_A::TCMP0) + pub fn tcmp0(self) -> &'a mut crate::W { + self.variant(Tstop::Tcmp0) } #[doc = "Comparator 0 is disabled at TX start TX Engine"] #[inline(always)] - pub fn txst(self) -> &'a mut W { - self.variant(TSTOP_A::TXST) + pub fn txst(self) -> &'a mut crate::W { + self.variant(Tstop::Txst) } #[doc = "Comparator 0 is disabled on RX going going Active (default: low)"] #[inline(always)] - pub fn rxact(self) -> &'a mut W { - self.variant(TSTOP_A::RXACT) + pub fn rxact(self) -> &'a mut crate::W { + self.variant(Tstop::Rxact) } #[doc = "Comparator 0 is disabled on RX going Inactive"] #[inline(always)] - pub fn rxactn(self) -> &'a mut W { - self.variant(TSTOP_A::RXACTN) + pub fn rxactn(self) -> &'a mut crate::W { + self.variant(Tstop::Rxactn) } } -#[doc = "Field `RESTARTEN` reader - Restart Timer on TCMP0"] -pub type RESTARTEN_R = crate::BitReader; #[doc = "Restart Timer on TCMP0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RESTARTEN_A { +pub enum Restarten { #[doc = "0: Disable the timer restarting on TCMP0"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enable the timer restarting on TCMP0"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RESTARTEN_A) -> Self { + fn from(variant: Restarten) -> Self { variant as u8 != 0 } } -impl RESTARTEN_R { +#[doc = "Field `RESTARTEN` reader - Restart Timer on TCMP0"] +pub type RestartenR = crate::BitReader; +impl RestartenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RESTARTEN_A { + pub const fn variant(&self) -> Restarten { match self.bits { - false => RESTARTEN_A::DISABLE, - true => RESTARTEN_A::ENABLE, + false => Restarten::Disable, + true => Restarten::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable the timer restarting on TCMP0"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RESTARTEN_A::DISABLE + *self == Restarten::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enable the timer restarting on TCMP0"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RESTARTEN_A::ENABLE + *self == Restarten::Enable } } #[doc = "Field `RESTARTEN` writer - Restart Timer on TCMP0"] -pub type RESTARTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMECMP0_SPEC, RESTARTEN_A, O>; -impl<'a, const O: u8> RESTARTEN_W<'a, O> { +pub type RestartenW<'a, REG> = crate::BitWriter<'a, REG, Restarten>; +impl<'a, REG> RestartenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable the timer restarting on TCMP0"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RESTARTEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Restarten::Disable) } #[doc = "Enable the timer restarting on TCMP0"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RESTARTEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Restarten::Enable) } } impl R { #[doc = "Bits 0:7 - Timer comparator 0."] #[inline(always)] - pub fn tcmpval(&self) -> TCMPVAL_R { - TCMPVAL_R::new((self.bits & 0xff) as u8) + pub fn tcmpval(&self) -> TcmpvalR { + TcmpvalR::new((self.bits & 0xff) as u8) } #[doc = "Bits 16:18 - Timer start source"] #[inline(always)] - pub fn tstart(&self) -> TSTART_R { - TSTART_R::new(((self.bits >> 16) & 7) as u8) + pub fn tstart(&self) -> TstartR { + TstartR::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Source used to disable comparator 0"] #[inline(always)] - pub fn tstop(&self) -> TSTOP_R { - TSTOP_R::new(((self.bits >> 20) & 7) as u8) + pub fn tstop(&self) -> TstopR { + TstopR::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bit 24 - Restart Timer on TCMP0"] #[inline(always)] - pub fn restarten(&self) -> RESTARTEN_R { - RESTARTEN_R::new(((self.bits >> 24) & 1) != 0) + pub fn restarten(&self) -> RestartenR { + RestartenR::new(((self.bits >> 24) & 1) != 0) } } impl W { #[doc = "Bits 0:7 - Timer comparator 0."] #[inline(always)] #[must_use] - pub fn tcmpval(&mut self) -> TCMPVAL_W<0> { - TCMPVAL_W::new(self) + pub fn tcmpval(&mut self) -> TcmpvalW { + TcmpvalW::new(self, 0) } #[doc = "Bits 16:18 - Timer start source"] #[inline(always)] #[must_use] - pub fn tstart(&mut self) -> TSTART_W<16> { - TSTART_W::new(self) + pub fn tstart(&mut self) -> TstartW { + TstartW::new(self, 16) } #[doc = "Bits 20:22 - Source used to disable comparator 0"] #[inline(always)] #[must_use] - pub fn tstop(&mut self) -> TSTOP_W<20> { - TSTOP_W::new(self) + pub fn tstop(&mut self) -> TstopW { + TstopW::new(self, 20) } #[doc = "Bit 24 - Restart Timer on TCMP0"] #[inline(always)] #[must_use] - pub fn restarten(&mut self) -> RESTARTEN_W<24> { - RESTARTEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn restarten(&mut self) -> RestartenW { + RestartenW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timecmp0](index.html) module"] -pub struct TIMECMP0_SPEC; -impl crate::RegisterSpec for TIMECMP0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timecmp0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timecmp0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timecmp0Spec; +impl crate::RegisterSpec for Timecmp0Spec { type Ux = u32; } -#[doc = "`read()` method returns [timecmp0::R](R) reader structure"] -impl crate::Readable for TIMECMP0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timecmp0::W](W) writer structure"] -impl crate::Writable for TIMECMP0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timecmp0::R`](R) reader structure"] +impl crate::Readable for Timecmp0Spec {} +#[doc = "`write(|w| ..)` method takes [`timecmp0::W`](W) writer structure"] +impl crate::Writable for Timecmp0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMECMP0 to value 0"] -impl crate::Resettable for TIMECMP0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timecmp0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/timecmp1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/timecmp1.rs index 8ac8214..7d651ff 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/timecmp1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/timecmp1.rs @@ -1,332 +1,311 @@ #[doc = "Register `TIMECMP1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMECMP1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TCMPVAL` reader - Timer comparator 1."] -pub type TCMPVAL_R = crate::FieldReader; +pub type TcmpvalR = crate::FieldReader; #[doc = "Field `TCMPVAL` writer - Timer comparator 1."] -pub type TCMPVAL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMECMP1_SPEC, u8, u8, 8, O>; -#[doc = "Field `TSTART` reader - Timer start source"] -pub type TSTART_R = crate::FieldReader; +pub type TcmpvalW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Timer start source\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TSTART_A { +pub enum Tstart { #[doc = "0: Comparator 1 is disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Comparator 1 and timer are started at TX end of frame"] - TXEOF = 1, + Txeof = 1, #[doc = "2: Comparator 1 and timer are started at TX Complete"] - TXC = 2, + Txc = 2, #[doc = "3: Comparator 1 and timer are started at RX going going Active (default: low)"] - RXACT = 3, + Rxact = 3, #[doc = "4: Comparator 1 and timer are started at RX end of frame"] - RXEOF = 4, + Rxeof = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TSTART_A) -> Self { + fn from(variant: Tstart) -> Self { variant as _ } } -impl TSTART_R { +impl crate::FieldSpec for Tstart { + type Ux = u8; +} +impl crate::IsEnum for Tstart {} +#[doc = "Field `TSTART` reader - Timer start source"] +pub type TstartR = crate::FieldReader; +impl TstartR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TSTART_A::DISABLE), - 1 => Some(TSTART_A::TXEOF), - 2 => Some(TSTART_A::TXC), - 3 => Some(TSTART_A::RXACT), - 4 => Some(TSTART_A::RXEOF), + 0 => Some(Tstart::Disable), + 1 => Some(Tstart::Txeof), + 2 => Some(Tstart::Txc), + 3 => Some(Tstart::Rxact), + 4 => Some(Tstart::Rxeof), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Comparator 1 is disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == TSTART_A::DISABLE + *self == Tstart::Disable } - #[doc = "Checks if the value of the field is `TXEOF`"] + #[doc = "Comparator 1 and timer are started at TX end of frame"] #[inline(always)] pub fn is_txeof(&self) -> bool { - *self == TSTART_A::TXEOF + *self == Tstart::Txeof } - #[doc = "Checks if the value of the field is `TXC`"] + #[doc = "Comparator 1 and timer are started at TX Complete"] #[inline(always)] pub fn is_txc(&self) -> bool { - *self == TSTART_A::TXC + *self == Tstart::Txc } - #[doc = "Checks if the value of the field is `RXACT`"] + #[doc = "Comparator 1 and timer are started at RX going going Active (default: low)"] #[inline(always)] pub fn is_rxact(&self) -> bool { - *self == TSTART_A::RXACT + *self == Tstart::Rxact } - #[doc = "Checks if the value of the field is `RXEOF`"] + #[doc = "Comparator 1 and timer are started at RX end of frame"] #[inline(always)] pub fn is_rxeof(&self) -> bool { - *self == TSTART_A::RXEOF + *self == Tstart::Rxeof } } #[doc = "Field `TSTART` writer - Timer start source"] -pub type TSTART_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMECMP1_SPEC, u8, TSTART_A, 3, O>; -impl<'a, const O: u8> TSTART_W<'a, O> { +pub type TstartW<'a, REG> = crate::FieldWriter<'a, REG, 3, Tstart>; +impl<'a, REG> TstartW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Comparator 1 is disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(TSTART_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Tstart::Disable) } #[doc = "Comparator 1 and timer are started at TX end of frame"] #[inline(always)] - pub fn txeof(self) -> &'a mut W { - self.variant(TSTART_A::TXEOF) + pub fn txeof(self) -> &'a mut crate::W { + self.variant(Tstart::Txeof) } #[doc = "Comparator 1 and timer are started at TX Complete"] #[inline(always)] - pub fn txc(self) -> &'a mut W { - self.variant(TSTART_A::TXC) + pub fn txc(self) -> &'a mut crate::W { + self.variant(Tstart::Txc) } #[doc = "Comparator 1 and timer are started at RX going going Active (default: low)"] #[inline(always)] - pub fn rxact(self) -> &'a mut W { - self.variant(TSTART_A::RXACT) + pub fn rxact(self) -> &'a mut crate::W { + self.variant(Tstart::Rxact) } #[doc = "Comparator 1 and timer are started at RX end of frame"] #[inline(always)] - pub fn rxeof(self) -> &'a mut W { - self.variant(TSTART_A::RXEOF) + pub fn rxeof(self) -> &'a mut crate::W { + self.variant(Tstart::Rxeof) } } -#[doc = "Field `TSTOP` reader - Source used to disable comparator 1"] -pub type TSTOP_R = crate::FieldReader; #[doc = "Source used to disable comparator 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TSTOP_A { +pub enum Tstop { #[doc = "0: Comparator 1 is disabled when the counter equals TCMPVAL and triggers a TCMP1 event"] - TCMP1 = 0, + Tcmp1 = 0, #[doc = "1: Comparator 1 is disabled at TX start TX Engine"] - TXST = 1, + Txst = 1, #[doc = "2: Comparator 1 is disabled on RX going going Active (default: low)"] - RXACT = 2, + Rxact = 2, #[doc = "3: Comparator 1 is disabled on RX going Inactive"] - RXACTN = 3, + Rxactn = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TSTOP_A) -> Self { + fn from(variant: Tstop) -> Self { variant as _ } } -impl TSTOP_R { +impl crate::FieldSpec for Tstop { + type Ux = u8; +} +impl crate::IsEnum for Tstop {} +#[doc = "Field `TSTOP` reader - Source used to disable comparator 1"] +pub type TstopR = crate::FieldReader; +impl TstopR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TSTOP_A::TCMP1), - 1 => Some(TSTOP_A::TXST), - 2 => Some(TSTOP_A::RXACT), - 3 => Some(TSTOP_A::RXACTN), + 0 => Some(Tstop::Tcmp1), + 1 => Some(Tstop::Txst), + 2 => Some(Tstop::Rxact), + 3 => Some(Tstop::Rxactn), _ => None, } } - #[doc = "Checks if the value of the field is `TCMP1`"] + #[doc = "Comparator 1 is disabled when the counter equals TCMPVAL and triggers a TCMP1 event"] #[inline(always)] pub fn is_tcmp1(&self) -> bool { - *self == TSTOP_A::TCMP1 + *self == Tstop::Tcmp1 } - #[doc = "Checks if the value of the field is `TXST`"] + #[doc = "Comparator 1 is disabled at TX start TX Engine"] #[inline(always)] pub fn is_txst(&self) -> bool { - *self == TSTOP_A::TXST + *self == Tstop::Txst } - #[doc = "Checks if the value of the field is `RXACT`"] + #[doc = "Comparator 1 is disabled on RX going going Active (default: low)"] #[inline(always)] pub fn is_rxact(&self) -> bool { - *self == TSTOP_A::RXACT + *self == Tstop::Rxact } - #[doc = "Checks if the value of the field is `RXACTN`"] + #[doc = "Comparator 1 is disabled on RX going Inactive"] #[inline(always)] pub fn is_rxactn(&self) -> bool { - *self == TSTOP_A::RXACTN + *self == Tstop::Rxactn } } #[doc = "Field `TSTOP` writer - Source used to disable comparator 1"] -pub type TSTOP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMECMP1_SPEC, u8, TSTOP_A, 3, O>; -impl<'a, const O: u8> TSTOP_W<'a, O> { +pub type TstopW<'a, REG> = crate::FieldWriter<'a, REG, 3, Tstop>; +impl<'a, REG> TstopW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Comparator 1 is disabled when the counter equals TCMPVAL and triggers a TCMP1 event"] #[inline(always)] - pub fn tcmp1(self) -> &'a mut W { - self.variant(TSTOP_A::TCMP1) + pub fn tcmp1(self) -> &'a mut crate::W { + self.variant(Tstop::Tcmp1) } #[doc = "Comparator 1 is disabled at TX start TX Engine"] #[inline(always)] - pub fn txst(self) -> &'a mut W { - self.variant(TSTOP_A::TXST) + pub fn txst(self) -> &'a mut crate::W { + self.variant(Tstop::Txst) } #[doc = "Comparator 1 is disabled on RX going going Active (default: low)"] #[inline(always)] - pub fn rxact(self) -> &'a mut W { - self.variant(TSTOP_A::RXACT) + pub fn rxact(self) -> &'a mut crate::W { + self.variant(Tstop::Rxact) } #[doc = "Comparator 1 is disabled on RX going Inactive"] #[inline(always)] - pub fn rxactn(self) -> &'a mut W { - self.variant(TSTOP_A::RXACTN) + pub fn rxactn(self) -> &'a mut crate::W { + self.variant(Tstop::Rxactn) } } -#[doc = "Field `RESTARTEN` reader - Restart Timer on TCMP1"] -pub type RESTARTEN_R = crate::BitReader; #[doc = "Restart Timer on TCMP1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RESTARTEN_A { +pub enum Restarten { #[doc = "0: Disable the timer restarting on TCMP1"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enable the timer restarting on TCMP1"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RESTARTEN_A) -> Self { + fn from(variant: Restarten) -> Self { variant as u8 != 0 } } -impl RESTARTEN_R { +#[doc = "Field `RESTARTEN` reader - Restart Timer on TCMP1"] +pub type RestartenR = crate::BitReader; +impl RestartenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RESTARTEN_A { + pub const fn variant(&self) -> Restarten { match self.bits { - false => RESTARTEN_A::DISABLE, - true => RESTARTEN_A::ENABLE, + false => Restarten::Disable, + true => Restarten::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable the timer restarting on TCMP1"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RESTARTEN_A::DISABLE + *self == Restarten::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enable the timer restarting on TCMP1"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RESTARTEN_A::ENABLE + *self == Restarten::Enable } } #[doc = "Field `RESTARTEN` writer - Restart Timer on TCMP1"] -pub type RESTARTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMECMP1_SPEC, RESTARTEN_A, O>; -impl<'a, const O: u8> RESTARTEN_W<'a, O> { +pub type RestartenW<'a, REG> = crate::BitWriter<'a, REG, Restarten>; +impl<'a, REG> RestartenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable the timer restarting on TCMP1"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RESTARTEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Restarten::Disable) } #[doc = "Enable the timer restarting on TCMP1"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RESTARTEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Restarten::Enable) } } impl R { #[doc = "Bits 0:7 - Timer comparator 1."] #[inline(always)] - pub fn tcmpval(&self) -> TCMPVAL_R { - TCMPVAL_R::new((self.bits & 0xff) as u8) + pub fn tcmpval(&self) -> TcmpvalR { + TcmpvalR::new((self.bits & 0xff) as u8) } #[doc = "Bits 16:18 - Timer start source"] #[inline(always)] - pub fn tstart(&self) -> TSTART_R { - TSTART_R::new(((self.bits >> 16) & 7) as u8) + pub fn tstart(&self) -> TstartR { + TstartR::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Source used to disable comparator 1"] #[inline(always)] - pub fn tstop(&self) -> TSTOP_R { - TSTOP_R::new(((self.bits >> 20) & 7) as u8) + pub fn tstop(&self) -> TstopR { + TstopR::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bit 24 - Restart Timer on TCMP1"] #[inline(always)] - pub fn restarten(&self) -> RESTARTEN_R { - RESTARTEN_R::new(((self.bits >> 24) & 1) != 0) + pub fn restarten(&self) -> RestartenR { + RestartenR::new(((self.bits >> 24) & 1) != 0) } } impl W { #[doc = "Bits 0:7 - Timer comparator 1."] #[inline(always)] #[must_use] - pub fn tcmpval(&mut self) -> TCMPVAL_W<0> { - TCMPVAL_W::new(self) + pub fn tcmpval(&mut self) -> TcmpvalW { + TcmpvalW::new(self, 0) } #[doc = "Bits 16:18 - Timer start source"] #[inline(always)] #[must_use] - pub fn tstart(&mut self) -> TSTART_W<16> { - TSTART_W::new(self) + pub fn tstart(&mut self) -> TstartW { + TstartW::new(self, 16) } #[doc = "Bits 20:22 - Source used to disable comparator 1"] #[inline(always)] #[must_use] - pub fn tstop(&mut self) -> TSTOP_W<20> { - TSTOP_W::new(self) + pub fn tstop(&mut self) -> TstopW { + TstopW::new(self, 20) } #[doc = "Bit 24 - Restart Timer on TCMP1"] #[inline(always)] #[must_use] - pub fn restarten(&mut self) -> RESTARTEN_W<24> { - RESTARTEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn restarten(&mut self) -> RestartenW { + RestartenW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timecmp1](index.html) module"] -pub struct TIMECMP1_SPEC; -impl crate::RegisterSpec for TIMECMP1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timecmp1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timecmp1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timecmp1Spec; +impl crate::RegisterSpec for Timecmp1Spec { type Ux = u32; } -#[doc = "`read()` method returns [timecmp1::R](R) reader structure"] -impl crate::Readable for TIMECMP1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timecmp1::W](W) writer structure"] -impl crate::Writable for TIMECMP1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timecmp1::R`](R) reader structure"] +impl crate::Readable for Timecmp1Spec {} +#[doc = "`write(|w| ..)` method takes [`timecmp1::W`](W) writer structure"] +impl crate::Writable for Timecmp1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMECMP1 to value 0"] -impl crate::Resettable for TIMECMP1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timecmp1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/timecmp2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/timecmp2.rs index 542bc31..f917c92 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/timecmp2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/timecmp2.rs @@ -1,332 +1,311 @@ #[doc = "Register `TIMECMP2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMECMP2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TCMPVAL` reader - Timer comparator 2."] -pub type TCMPVAL_R = crate::FieldReader; +pub type TcmpvalR = crate::FieldReader; #[doc = "Field `TCMPVAL` writer - Timer comparator 2."] -pub type TCMPVAL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMECMP2_SPEC, u8, u8, 8, O>; -#[doc = "Field `TSTART` reader - Timer start source"] -pub type TSTART_R = crate::FieldReader; +pub type TcmpvalW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Timer start source\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TSTART_A { +pub enum Tstart { #[doc = "0: Comparator 2 is disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Comparator 2 and timer are started at TX end of frame"] - TXEOF = 1, + Txeof = 1, #[doc = "2: Comparator 2 and timer are started at TX Complete"] - TXC = 2, + Txc = 2, #[doc = "3: Comparator 2 and timer are started at RX going going Active (default: low)"] - RXACT = 3, + Rxact = 3, #[doc = "4: Comparator 2 and timer are started at RX end of frame"] - RXEOF = 4, + Rxeof = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TSTART_A) -> Self { + fn from(variant: Tstart) -> Self { variant as _ } } -impl TSTART_R { +impl crate::FieldSpec for Tstart { + type Ux = u8; +} +impl crate::IsEnum for Tstart {} +#[doc = "Field `TSTART` reader - Timer start source"] +pub type TstartR = crate::FieldReader; +impl TstartR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TSTART_A::DISABLE), - 1 => Some(TSTART_A::TXEOF), - 2 => Some(TSTART_A::TXC), - 3 => Some(TSTART_A::RXACT), - 4 => Some(TSTART_A::RXEOF), + 0 => Some(Tstart::Disable), + 1 => Some(Tstart::Txeof), + 2 => Some(Tstart::Txc), + 3 => Some(Tstart::Rxact), + 4 => Some(Tstart::Rxeof), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Comparator 2 is disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == TSTART_A::DISABLE + *self == Tstart::Disable } - #[doc = "Checks if the value of the field is `TXEOF`"] + #[doc = "Comparator 2 and timer are started at TX end of frame"] #[inline(always)] pub fn is_txeof(&self) -> bool { - *self == TSTART_A::TXEOF + *self == Tstart::Txeof } - #[doc = "Checks if the value of the field is `TXC`"] + #[doc = "Comparator 2 and timer are started at TX Complete"] #[inline(always)] pub fn is_txc(&self) -> bool { - *self == TSTART_A::TXC + *self == Tstart::Txc } - #[doc = "Checks if the value of the field is `RXACT`"] + #[doc = "Comparator 2 and timer are started at RX going going Active (default: low)"] #[inline(always)] pub fn is_rxact(&self) -> bool { - *self == TSTART_A::RXACT + *self == Tstart::Rxact } - #[doc = "Checks if the value of the field is `RXEOF`"] + #[doc = "Comparator 2 and timer are started at RX end of frame"] #[inline(always)] pub fn is_rxeof(&self) -> bool { - *self == TSTART_A::RXEOF + *self == Tstart::Rxeof } } #[doc = "Field `TSTART` writer - Timer start source"] -pub type TSTART_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMECMP2_SPEC, u8, TSTART_A, 3, O>; -impl<'a, const O: u8> TSTART_W<'a, O> { +pub type TstartW<'a, REG> = crate::FieldWriter<'a, REG, 3, Tstart>; +impl<'a, REG> TstartW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Comparator 2 is disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(TSTART_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Tstart::Disable) } #[doc = "Comparator 2 and timer are started at TX end of frame"] #[inline(always)] - pub fn txeof(self) -> &'a mut W { - self.variant(TSTART_A::TXEOF) + pub fn txeof(self) -> &'a mut crate::W { + self.variant(Tstart::Txeof) } #[doc = "Comparator 2 and timer are started at TX Complete"] #[inline(always)] - pub fn txc(self) -> &'a mut W { - self.variant(TSTART_A::TXC) + pub fn txc(self) -> &'a mut crate::W { + self.variant(Tstart::Txc) } #[doc = "Comparator 2 and timer are started at RX going going Active (default: low)"] #[inline(always)] - pub fn rxact(self) -> &'a mut W { - self.variant(TSTART_A::RXACT) + pub fn rxact(self) -> &'a mut crate::W { + self.variant(Tstart::Rxact) } #[doc = "Comparator 2 and timer are started at RX end of frame"] #[inline(always)] - pub fn rxeof(self) -> &'a mut W { - self.variant(TSTART_A::RXEOF) + pub fn rxeof(self) -> &'a mut crate::W { + self.variant(Tstart::Rxeof) } } -#[doc = "Field `TSTOP` reader - Source used to disable comparator 2"] -pub type TSTOP_R = crate::FieldReader; #[doc = "Source used to disable comparator 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TSTOP_A { +pub enum Tstop { #[doc = "0: Comparator 2 is disabled when the counter equals TCMPVAL and triggers a TCMP2 event"] - TCMP2 = 0, + Tcmp2 = 0, #[doc = "1: Comparator 2 is disabled at TX start TX Engine"] - TXST = 1, + Txst = 1, #[doc = "2: Comparator 2 is disabled on RX going going Active (default: low)"] - RXACT = 2, + Rxact = 2, #[doc = "3: Comparator 2 is disabled on RX going Inactive"] - RXACTN = 3, + Rxactn = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TSTOP_A) -> Self { + fn from(variant: Tstop) -> Self { variant as _ } } -impl TSTOP_R { +impl crate::FieldSpec for Tstop { + type Ux = u8; +} +impl crate::IsEnum for Tstop {} +#[doc = "Field `TSTOP` reader - Source used to disable comparator 2"] +pub type TstopR = crate::FieldReader; +impl TstopR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TSTOP_A::TCMP2), - 1 => Some(TSTOP_A::TXST), - 2 => Some(TSTOP_A::RXACT), - 3 => Some(TSTOP_A::RXACTN), + 0 => Some(Tstop::Tcmp2), + 1 => Some(Tstop::Txst), + 2 => Some(Tstop::Rxact), + 3 => Some(Tstop::Rxactn), _ => None, } } - #[doc = "Checks if the value of the field is `TCMP2`"] + #[doc = "Comparator 2 is disabled when the counter equals TCMPVAL and triggers a TCMP2 event"] #[inline(always)] pub fn is_tcmp2(&self) -> bool { - *self == TSTOP_A::TCMP2 + *self == Tstop::Tcmp2 } - #[doc = "Checks if the value of the field is `TXST`"] + #[doc = "Comparator 2 is disabled at TX start TX Engine"] #[inline(always)] pub fn is_txst(&self) -> bool { - *self == TSTOP_A::TXST + *self == Tstop::Txst } - #[doc = "Checks if the value of the field is `RXACT`"] + #[doc = "Comparator 2 is disabled on RX going going Active (default: low)"] #[inline(always)] pub fn is_rxact(&self) -> bool { - *self == TSTOP_A::RXACT + *self == Tstop::Rxact } - #[doc = "Checks if the value of the field is `RXACTN`"] + #[doc = "Comparator 2 is disabled on RX going Inactive"] #[inline(always)] pub fn is_rxactn(&self) -> bool { - *self == TSTOP_A::RXACTN + *self == Tstop::Rxactn } } #[doc = "Field `TSTOP` writer - Source used to disable comparator 2"] -pub type TSTOP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMECMP2_SPEC, u8, TSTOP_A, 3, O>; -impl<'a, const O: u8> TSTOP_W<'a, O> { +pub type TstopW<'a, REG> = crate::FieldWriter<'a, REG, 3, Tstop>; +impl<'a, REG> TstopW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Comparator 2 is disabled when the counter equals TCMPVAL and triggers a TCMP2 event"] #[inline(always)] - pub fn tcmp2(self) -> &'a mut W { - self.variant(TSTOP_A::TCMP2) + pub fn tcmp2(self) -> &'a mut crate::W { + self.variant(Tstop::Tcmp2) } #[doc = "Comparator 2 is disabled at TX start TX Engine"] #[inline(always)] - pub fn txst(self) -> &'a mut W { - self.variant(TSTOP_A::TXST) + pub fn txst(self) -> &'a mut crate::W { + self.variant(Tstop::Txst) } #[doc = "Comparator 2 is disabled on RX going going Active (default: low)"] #[inline(always)] - pub fn rxact(self) -> &'a mut W { - self.variant(TSTOP_A::RXACT) + pub fn rxact(self) -> &'a mut crate::W { + self.variant(Tstop::Rxact) } #[doc = "Comparator 2 is disabled on RX going Inactive"] #[inline(always)] - pub fn rxactn(self) -> &'a mut W { - self.variant(TSTOP_A::RXACTN) + pub fn rxactn(self) -> &'a mut crate::W { + self.variant(Tstop::Rxactn) } } -#[doc = "Field `RESTARTEN` reader - Restart Timer on TCMP2"] -pub type RESTARTEN_R = crate::BitReader; #[doc = "Restart Timer on TCMP2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RESTARTEN_A { +pub enum Restarten { #[doc = "0: Disable the timer restarting on TCMP2"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enable the timer restarting on TCMP2"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RESTARTEN_A) -> Self { + fn from(variant: Restarten) -> Self { variant as u8 != 0 } } -impl RESTARTEN_R { +#[doc = "Field `RESTARTEN` reader - Restart Timer on TCMP2"] +pub type RestartenR = crate::BitReader; +impl RestartenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RESTARTEN_A { + pub const fn variant(&self) -> Restarten { match self.bits { - false => RESTARTEN_A::DISABLE, - true => RESTARTEN_A::ENABLE, + false => Restarten::Disable, + true => Restarten::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable the timer restarting on TCMP2"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RESTARTEN_A::DISABLE + *self == Restarten::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enable the timer restarting on TCMP2"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RESTARTEN_A::ENABLE + *self == Restarten::Enable } } #[doc = "Field `RESTARTEN` writer - Restart Timer on TCMP2"] -pub type RESTARTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMECMP2_SPEC, RESTARTEN_A, O>; -impl<'a, const O: u8> RESTARTEN_W<'a, O> { +pub type RestartenW<'a, REG> = crate::BitWriter<'a, REG, Restarten>; +impl<'a, REG> RestartenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable the timer restarting on TCMP2"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RESTARTEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Restarten::Disable) } #[doc = "Enable the timer restarting on TCMP2"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RESTARTEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Restarten::Enable) } } impl R { #[doc = "Bits 0:7 - Timer comparator 2."] #[inline(always)] - pub fn tcmpval(&self) -> TCMPVAL_R { - TCMPVAL_R::new((self.bits & 0xff) as u8) + pub fn tcmpval(&self) -> TcmpvalR { + TcmpvalR::new((self.bits & 0xff) as u8) } #[doc = "Bits 16:18 - Timer start source"] #[inline(always)] - pub fn tstart(&self) -> TSTART_R { - TSTART_R::new(((self.bits >> 16) & 7) as u8) + pub fn tstart(&self) -> TstartR { + TstartR::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Source used to disable comparator 2"] #[inline(always)] - pub fn tstop(&self) -> TSTOP_R { - TSTOP_R::new(((self.bits >> 20) & 7) as u8) + pub fn tstop(&self) -> TstopR { + TstopR::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bit 24 - Restart Timer on TCMP2"] #[inline(always)] - pub fn restarten(&self) -> RESTARTEN_R { - RESTARTEN_R::new(((self.bits >> 24) & 1) != 0) + pub fn restarten(&self) -> RestartenR { + RestartenR::new(((self.bits >> 24) & 1) != 0) } } impl W { #[doc = "Bits 0:7 - Timer comparator 2."] #[inline(always)] #[must_use] - pub fn tcmpval(&mut self) -> TCMPVAL_W<0> { - TCMPVAL_W::new(self) + pub fn tcmpval(&mut self) -> TcmpvalW { + TcmpvalW::new(self, 0) } #[doc = "Bits 16:18 - Timer start source"] #[inline(always)] #[must_use] - pub fn tstart(&mut self) -> TSTART_W<16> { - TSTART_W::new(self) + pub fn tstart(&mut self) -> TstartW { + TstartW::new(self, 16) } #[doc = "Bits 20:22 - Source used to disable comparator 2"] #[inline(always)] #[must_use] - pub fn tstop(&mut self) -> TSTOP_W<20> { - TSTOP_W::new(self) + pub fn tstop(&mut self) -> TstopW { + TstopW::new(self, 20) } #[doc = "Bit 24 - Restart Timer on TCMP2"] #[inline(always)] #[must_use] - pub fn restarten(&mut self) -> RESTARTEN_W<24> { - RESTARTEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn restarten(&mut self) -> RestartenW { + RestartenW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timecmp2](index.html) module"] -pub struct TIMECMP2_SPEC; -impl crate::RegisterSpec for TIMECMP2_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timecmp2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timecmp2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timecmp2Spec; +impl crate::RegisterSpec for Timecmp2Spec { type Ux = u32; } -#[doc = "`read()` method returns [timecmp2::R](R) reader structure"] -impl crate::Readable for TIMECMP2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timecmp2::W](W) writer structure"] -impl crate::Writable for TIMECMP2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timecmp2::R`](R) reader structure"] +impl crate::Readable for Timecmp2Spec {} +#[doc = "`write(|w| ..)` method takes [`timecmp2::W`](W) writer structure"] +impl crate::Writable for Timecmp2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMECMP2 to value 0"] -impl crate::Resettable for TIMECMP2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timecmp2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/timing.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/timing.rs index dfdca17..079e420 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/timing.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/timing.rs @@ -1,632 +1,621 @@ #[doc = "Register `TIMING` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMING` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `TXDELAY` reader - TX frame start delay"] -pub type TXDELAY_R = crate::FieldReader; +pub type W = crate::W; #[doc = "TX frame start delay\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TXDELAY_A { +pub enum Txdelay { #[doc = "0: Disable - TXDELAY in USARTn_CTRL can be used for legacy"] - DISABLE = 0, + Disable = 0, #[doc = "1: Start of transmission is delayed for 1 baud-times"] - ONE = 1, + One = 1, #[doc = "2: Start of transmission is delayed for 2 baud-times"] - TWO = 2, + Two = 2, #[doc = "3: Start of transmission is delayed for 3 baud-times"] - THREE = 3, + Three = 3, #[doc = "4: Start of transmission is delayed for 7 baud-times"] - SEVEN = 4, + Seven = 4, #[doc = "5: Start of transmission is delayed for TCMPVAL0 baud-times"] - TCMP0 = 5, + Tcmp0 = 5, #[doc = "6: Start of transmission is delayed for TCMPVAL1 baud-times"] - TCMP1 = 6, + Tcmp1 = 6, #[doc = "7: Start of transmission is delayed for TCMPVAL2 baud-times"] - TCMP2 = 7, + Tcmp2 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TXDELAY_A) -> Self { + fn from(variant: Txdelay) -> Self { variant as _ } } -impl TXDELAY_R { +impl crate::FieldSpec for Txdelay { + type Ux = u8; +} +impl crate::IsEnum for Txdelay {} +#[doc = "Field `TXDELAY` reader - TX frame start delay"] +pub type TxdelayR = crate::FieldReader; +impl TxdelayR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXDELAY_A { + pub const fn variant(&self) -> Txdelay { match self.bits { - 0 => TXDELAY_A::DISABLE, - 1 => TXDELAY_A::ONE, - 2 => TXDELAY_A::TWO, - 3 => TXDELAY_A::THREE, - 4 => TXDELAY_A::SEVEN, - 5 => TXDELAY_A::TCMP0, - 6 => TXDELAY_A::TCMP1, - 7 => TXDELAY_A::TCMP2, + 0 => Txdelay::Disable, + 1 => Txdelay::One, + 2 => Txdelay::Two, + 3 => Txdelay::Three, + 4 => Txdelay::Seven, + 5 => Txdelay::Tcmp0, + 6 => Txdelay::Tcmp1, + 7 => Txdelay::Tcmp2, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable - TXDELAY in USARTn_CTRL can be used for legacy"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == TXDELAY_A::DISABLE + *self == Txdelay::Disable } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Start of transmission is delayed for 1 baud-times"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == TXDELAY_A::ONE + *self == Txdelay::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Start of transmission is delayed for 2 baud-times"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == TXDELAY_A::TWO + *self == Txdelay::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "Start of transmission is delayed for 3 baud-times"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == TXDELAY_A::THREE + *self == Txdelay::Three } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "Start of transmission is delayed for 7 baud-times"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == TXDELAY_A::SEVEN + *self == Txdelay::Seven } - #[doc = "Checks if the value of the field is `TCMP0`"] + #[doc = "Start of transmission is delayed for TCMPVAL0 baud-times"] #[inline(always)] pub fn is_tcmp0(&self) -> bool { - *self == TXDELAY_A::TCMP0 + *self == Txdelay::Tcmp0 } - #[doc = "Checks if the value of the field is `TCMP1`"] + #[doc = "Start of transmission is delayed for TCMPVAL1 baud-times"] #[inline(always)] pub fn is_tcmp1(&self) -> bool { - *self == TXDELAY_A::TCMP1 + *self == Txdelay::Tcmp1 } - #[doc = "Checks if the value of the field is `TCMP2`"] + #[doc = "Start of transmission is delayed for TCMPVAL2 baud-times"] #[inline(always)] pub fn is_tcmp2(&self) -> bool { - *self == TXDELAY_A::TCMP2 + *self == Txdelay::Tcmp2 } } #[doc = "Field `TXDELAY` writer - TX frame start delay"] -pub type TXDELAY_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, TIMING_SPEC, u8, TXDELAY_A, 3, O>; -impl<'a, const O: u8> TXDELAY_W<'a, O> { +pub type TxdelayW<'a, REG> = crate::FieldWriter<'a, REG, 3, Txdelay, crate::Safe>; +impl<'a, REG> TxdelayW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Disable - TXDELAY in USARTn_CTRL can be used for legacy"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(TXDELAY_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Txdelay::Disable) } #[doc = "Start of transmission is delayed for 1 baud-times"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(TXDELAY_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Txdelay::One) } #[doc = "Start of transmission is delayed for 2 baud-times"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(TXDELAY_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Txdelay::Two) } #[doc = "Start of transmission is delayed for 3 baud-times"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(TXDELAY_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Txdelay::Three) } #[doc = "Start of transmission is delayed for 7 baud-times"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(TXDELAY_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Txdelay::Seven) } #[doc = "Start of transmission is delayed for TCMPVAL0 baud-times"] #[inline(always)] - pub fn tcmp0(self) -> &'a mut W { - self.variant(TXDELAY_A::TCMP0) + pub fn tcmp0(self) -> &'a mut crate::W { + self.variant(Txdelay::Tcmp0) } #[doc = "Start of transmission is delayed for TCMPVAL1 baud-times"] #[inline(always)] - pub fn tcmp1(self) -> &'a mut W { - self.variant(TXDELAY_A::TCMP1) + pub fn tcmp1(self) -> &'a mut crate::W { + self.variant(Txdelay::Tcmp1) } #[doc = "Start of transmission is delayed for TCMPVAL2 baud-times"] #[inline(always)] - pub fn tcmp2(self) -> &'a mut W { - self.variant(TXDELAY_A::TCMP2) + pub fn tcmp2(self) -> &'a mut crate::W { + self.variant(Txdelay::Tcmp2) } } -#[doc = "Field `CSSETUP` reader - Chip Select Setup"] -pub type CSSETUP_R = crate::FieldReader; #[doc = "Chip Select Setup\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CSSETUP_A { +pub enum Cssetup { #[doc = "0: CS is not asserted before start of transmission"] - ZERO = 0, + Zero = 0, #[doc = "1: CS is asserted for 1 baud-times before start of transmission"] - ONE = 1, + One = 1, #[doc = "2: CS is asserted for 2 baud-times before start of transmission"] - TWO = 2, + Two = 2, #[doc = "3: CS is asserted for 3 baud-times before start of transmission"] - THREE = 3, + Three = 3, #[doc = "4: CS is asserted for 7 baud-times before start of transmission"] - SEVEN = 4, + Seven = 4, #[doc = "5: CS is asserted before the start of transmission for TCMPVAL0 baud-times"] - TCMP0 = 5, + Tcmp0 = 5, #[doc = "6: CS is asserted before the start of transmission for TCMPVAL1 baud-times"] - TCMP1 = 6, + Tcmp1 = 6, #[doc = "7: CS is asserted before the start of transmission for TCMPVAL2 baud-times"] - TCMP2 = 7, + Tcmp2 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CSSETUP_A) -> Self { + fn from(variant: Cssetup) -> Self { variant as _ } } -impl CSSETUP_R { +impl crate::FieldSpec for Cssetup { + type Ux = u8; +} +impl crate::IsEnum for Cssetup {} +#[doc = "Field `CSSETUP` reader - Chip Select Setup"] +pub type CssetupR = crate::FieldReader; +impl CssetupR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CSSETUP_A { + pub const fn variant(&self) -> Cssetup { match self.bits { - 0 => CSSETUP_A::ZERO, - 1 => CSSETUP_A::ONE, - 2 => CSSETUP_A::TWO, - 3 => CSSETUP_A::THREE, - 4 => CSSETUP_A::SEVEN, - 5 => CSSETUP_A::TCMP0, - 6 => CSSETUP_A::TCMP1, - 7 => CSSETUP_A::TCMP2, + 0 => Cssetup::Zero, + 1 => Cssetup::One, + 2 => Cssetup::Two, + 3 => Cssetup::Three, + 4 => Cssetup::Seven, + 5 => Cssetup::Tcmp0, + 6 => Cssetup::Tcmp1, + 7 => Cssetup::Tcmp2, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ZERO`"] + #[doc = "CS is not asserted before start of transmission"] #[inline(always)] pub fn is_zero(&self) -> bool { - *self == CSSETUP_A::ZERO + *self == Cssetup::Zero } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "CS is asserted for 1 baud-times before start of transmission"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == CSSETUP_A::ONE + *self == Cssetup::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "CS is asserted for 2 baud-times before start of transmission"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == CSSETUP_A::TWO + *self == Cssetup::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "CS is asserted for 3 baud-times before start of transmission"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == CSSETUP_A::THREE + *self == Cssetup::Three } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "CS is asserted for 7 baud-times before start of transmission"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == CSSETUP_A::SEVEN + *self == Cssetup::Seven } - #[doc = "Checks if the value of the field is `TCMP0`"] + #[doc = "CS is asserted before the start of transmission for TCMPVAL0 baud-times"] #[inline(always)] pub fn is_tcmp0(&self) -> bool { - *self == CSSETUP_A::TCMP0 + *self == Cssetup::Tcmp0 } - #[doc = "Checks if the value of the field is `TCMP1`"] + #[doc = "CS is asserted before the start of transmission for TCMPVAL1 baud-times"] #[inline(always)] pub fn is_tcmp1(&self) -> bool { - *self == CSSETUP_A::TCMP1 + *self == Cssetup::Tcmp1 } - #[doc = "Checks if the value of the field is `TCMP2`"] + #[doc = "CS is asserted before the start of transmission for TCMPVAL2 baud-times"] #[inline(always)] pub fn is_tcmp2(&self) -> bool { - *self == CSSETUP_A::TCMP2 + *self == Cssetup::Tcmp2 } } #[doc = "Field `CSSETUP` writer - Chip Select Setup"] -pub type CSSETUP_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, TIMING_SPEC, u8, CSSETUP_A, 3, O>; -impl<'a, const O: u8> CSSETUP_W<'a, O> { +pub type CssetupW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cssetup, crate::Safe>; +impl<'a, REG> CssetupW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "CS is not asserted before start of transmission"] #[inline(always)] - pub fn zero(self) -> &'a mut W { - self.variant(CSSETUP_A::ZERO) + pub fn zero(self) -> &'a mut crate::W { + self.variant(Cssetup::Zero) } #[doc = "CS is asserted for 1 baud-times before start of transmission"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(CSSETUP_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Cssetup::One) } #[doc = "CS is asserted for 2 baud-times before start of transmission"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(CSSETUP_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Cssetup::Two) } #[doc = "CS is asserted for 3 baud-times before start of transmission"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(CSSETUP_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Cssetup::Three) } #[doc = "CS is asserted for 7 baud-times before start of transmission"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(CSSETUP_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Cssetup::Seven) } #[doc = "CS is asserted before the start of transmission for TCMPVAL0 baud-times"] #[inline(always)] - pub fn tcmp0(self) -> &'a mut W { - self.variant(CSSETUP_A::TCMP0) + pub fn tcmp0(self) -> &'a mut crate::W { + self.variant(Cssetup::Tcmp0) } #[doc = "CS is asserted before the start of transmission for TCMPVAL1 baud-times"] #[inline(always)] - pub fn tcmp1(self) -> &'a mut W { - self.variant(CSSETUP_A::TCMP1) + pub fn tcmp1(self) -> &'a mut crate::W { + self.variant(Cssetup::Tcmp1) } #[doc = "CS is asserted before the start of transmission for TCMPVAL2 baud-times"] #[inline(always)] - pub fn tcmp2(self) -> &'a mut W { - self.variant(CSSETUP_A::TCMP2) + pub fn tcmp2(self) -> &'a mut crate::W { + self.variant(Cssetup::Tcmp2) } } -#[doc = "Field `ICS` reader - Inter-character spacing"] -pub type ICS_R = crate::FieldReader; #[doc = "Inter-character spacing\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICS_A { +pub enum Ics { #[doc = "0: There is no space between charcters"] - ZERO = 0, + Zero = 0, #[doc = "1: Create a space of 1 baud-times before start of transmission"] - ONE = 1, + One = 1, #[doc = "2: Create a space of 2 baud-times before start of transmission"] - TWO = 2, + Two = 2, #[doc = "3: Create a space of 3 baud-times before start of transmission"] - THREE = 3, + Three = 3, #[doc = "4: Create a space of 7 baud-times before start of transmission"] - SEVEN = 4, + Seven = 4, #[doc = "5: Create a space of before the start of transmission for TCMPVAL0 baud-times"] - TCMP0 = 5, + Tcmp0 = 5, #[doc = "6: Create a space of before the start of transmission for TCMPVAL1 baud-times"] - TCMP1 = 6, + Tcmp1 = 6, #[doc = "7: Create a space of before the start of transmission for TCMPVAL2 baud-times"] - TCMP2 = 7, + Tcmp2 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICS_A) -> Self { + fn from(variant: Ics) -> Self { variant as _ } } -impl ICS_R { +impl crate::FieldSpec for Ics { + type Ux = u8; +} +impl crate::IsEnum for Ics {} +#[doc = "Field `ICS` reader - Inter-character spacing"] +pub type IcsR = crate::FieldReader; +impl IcsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICS_A { + pub const fn variant(&self) -> Ics { match self.bits { - 0 => ICS_A::ZERO, - 1 => ICS_A::ONE, - 2 => ICS_A::TWO, - 3 => ICS_A::THREE, - 4 => ICS_A::SEVEN, - 5 => ICS_A::TCMP0, - 6 => ICS_A::TCMP1, - 7 => ICS_A::TCMP2, + 0 => Ics::Zero, + 1 => Ics::One, + 2 => Ics::Two, + 3 => Ics::Three, + 4 => Ics::Seven, + 5 => Ics::Tcmp0, + 6 => Ics::Tcmp1, + 7 => Ics::Tcmp2, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ZERO`"] + #[doc = "There is no space between charcters"] #[inline(always)] pub fn is_zero(&self) -> bool { - *self == ICS_A::ZERO + *self == Ics::Zero } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Create a space of 1 baud-times before start of transmission"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == ICS_A::ONE + *self == Ics::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Create a space of 2 baud-times before start of transmission"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == ICS_A::TWO + *self == Ics::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "Create a space of 3 baud-times before start of transmission"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == ICS_A::THREE + *self == Ics::Three } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "Create a space of 7 baud-times before start of transmission"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == ICS_A::SEVEN + *self == Ics::Seven } - #[doc = "Checks if the value of the field is `TCMP0`"] + #[doc = "Create a space of before the start of transmission for TCMPVAL0 baud-times"] #[inline(always)] pub fn is_tcmp0(&self) -> bool { - *self == ICS_A::TCMP0 + *self == Ics::Tcmp0 } - #[doc = "Checks if the value of the field is `TCMP1`"] + #[doc = "Create a space of before the start of transmission for TCMPVAL1 baud-times"] #[inline(always)] pub fn is_tcmp1(&self) -> bool { - *self == ICS_A::TCMP1 + *self == Ics::Tcmp1 } - #[doc = "Checks if the value of the field is `TCMP2`"] + #[doc = "Create a space of before the start of transmission for TCMPVAL2 baud-times"] #[inline(always)] pub fn is_tcmp2(&self) -> bool { - *self == ICS_A::TCMP2 + *self == Ics::Tcmp2 } } #[doc = "Field `ICS` writer - Inter-character spacing"] -pub type ICS_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, TIMING_SPEC, u8, ICS_A, 3, O>; -impl<'a, const O: u8> ICS_W<'a, O> { +pub type IcsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Ics, crate::Safe>; +impl<'a, REG> IcsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "There is no space between charcters"] #[inline(always)] - pub fn zero(self) -> &'a mut W { - self.variant(ICS_A::ZERO) + pub fn zero(self) -> &'a mut crate::W { + self.variant(Ics::Zero) } #[doc = "Create a space of 1 baud-times before start of transmission"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(ICS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Ics::One) } #[doc = "Create a space of 2 baud-times before start of transmission"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(ICS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Ics::Two) } #[doc = "Create a space of 3 baud-times before start of transmission"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(ICS_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Ics::Three) } #[doc = "Create a space of 7 baud-times before start of transmission"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(ICS_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Ics::Seven) } #[doc = "Create a space of before the start of transmission for TCMPVAL0 baud-times"] #[inline(always)] - pub fn tcmp0(self) -> &'a mut W { - self.variant(ICS_A::TCMP0) + pub fn tcmp0(self) -> &'a mut crate::W { + self.variant(Ics::Tcmp0) } #[doc = "Create a space of before the start of transmission for TCMPVAL1 baud-times"] #[inline(always)] - pub fn tcmp1(self) -> &'a mut W { - self.variant(ICS_A::TCMP1) + pub fn tcmp1(self) -> &'a mut crate::W { + self.variant(Ics::Tcmp1) } #[doc = "Create a space of before the start of transmission for TCMPVAL2 baud-times"] #[inline(always)] - pub fn tcmp2(self) -> &'a mut W { - self.variant(ICS_A::TCMP2) + pub fn tcmp2(self) -> &'a mut crate::W { + self.variant(Ics::Tcmp2) } } -#[doc = "Field `CSHOLD` reader - Chip Select Hold"] -pub type CSHOLD_R = crate::FieldReader; #[doc = "Chip Select Hold\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CSHOLD_A { +pub enum Cshold { #[doc = "0: Disable CS being asserted after the end of transmission"] - ZERO = 0, + Zero = 0, #[doc = "1: CS is asserted for 1 baud-times after the end of transmission"] - ONE = 1, + One = 1, #[doc = "2: CS is asserted for 2 baud-times after the end of transmission"] - TWO = 2, + Two = 2, #[doc = "3: CS is asserted for 3 baud-times after the end of transmission"] - THREE = 3, + Three = 3, #[doc = "4: CS is asserted for 7 baud-times after the end of transmission"] - SEVEN = 4, + Seven = 4, #[doc = "5: CS is asserted after the end of transmission for TCMPVAL0 baud-times"] - TCMP0 = 5, + Tcmp0 = 5, #[doc = "6: CS is asserted after the end of transmission for TCMPVAL1 baud-times"] - TCMP1 = 6, + Tcmp1 = 6, #[doc = "7: CS is asserted after the end of transmission for TCMPVAL2 baud-times"] - TCMP2 = 7, + Tcmp2 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CSHOLD_A) -> Self { + fn from(variant: Cshold) -> Self { variant as _ } } -impl CSHOLD_R { +impl crate::FieldSpec for Cshold { + type Ux = u8; +} +impl crate::IsEnum for Cshold {} +#[doc = "Field `CSHOLD` reader - Chip Select Hold"] +pub type CsholdR = crate::FieldReader; +impl CsholdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CSHOLD_A { + pub const fn variant(&self) -> Cshold { match self.bits { - 0 => CSHOLD_A::ZERO, - 1 => CSHOLD_A::ONE, - 2 => CSHOLD_A::TWO, - 3 => CSHOLD_A::THREE, - 4 => CSHOLD_A::SEVEN, - 5 => CSHOLD_A::TCMP0, - 6 => CSHOLD_A::TCMP1, - 7 => CSHOLD_A::TCMP2, + 0 => Cshold::Zero, + 1 => Cshold::One, + 2 => Cshold::Two, + 3 => Cshold::Three, + 4 => Cshold::Seven, + 5 => Cshold::Tcmp0, + 6 => Cshold::Tcmp1, + 7 => Cshold::Tcmp2, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ZERO`"] + #[doc = "Disable CS being asserted after the end of transmission"] #[inline(always)] pub fn is_zero(&self) -> bool { - *self == CSHOLD_A::ZERO + *self == Cshold::Zero } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "CS is asserted for 1 baud-times after the end of transmission"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == CSHOLD_A::ONE + *self == Cshold::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "CS is asserted for 2 baud-times after the end of transmission"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == CSHOLD_A::TWO + *self == Cshold::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "CS is asserted for 3 baud-times after the end of transmission"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == CSHOLD_A::THREE + *self == Cshold::Three } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "CS is asserted for 7 baud-times after the end of transmission"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == CSHOLD_A::SEVEN + *self == Cshold::Seven } - #[doc = "Checks if the value of the field is `TCMP0`"] + #[doc = "CS is asserted after the end of transmission for TCMPVAL0 baud-times"] #[inline(always)] pub fn is_tcmp0(&self) -> bool { - *self == CSHOLD_A::TCMP0 + *self == Cshold::Tcmp0 } - #[doc = "Checks if the value of the field is `TCMP1`"] + #[doc = "CS is asserted after the end of transmission for TCMPVAL1 baud-times"] #[inline(always)] pub fn is_tcmp1(&self) -> bool { - *self == CSHOLD_A::TCMP1 + *self == Cshold::Tcmp1 } - #[doc = "Checks if the value of the field is `TCMP2`"] + #[doc = "CS is asserted after the end of transmission for TCMPVAL2 baud-times"] #[inline(always)] pub fn is_tcmp2(&self) -> bool { - *self == CSHOLD_A::TCMP2 + *self == Cshold::Tcmp2 } } #[doc = "Field `CSHOLD` writer - Chip Select Hold"] -pub type CSHOLD_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, TIMING_SPEC, u8, CSHOLD_A, 3, O>; -impl<'a, const O: u8> CSHOLD_W<'a, O> { +pub type CsholdW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cshold, crate::Safe>; +impl<'a, REG> CsholdW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Disable CS being asserted after the end of transmission"] #[inline(always)] - pub fn zero(self) -> &'a mut W { - self.variant(CSHOLD_A::ZERO) + pub fn zero(self) -> &'a mut crate::W { + self.variant(Cshold::Zero) } #[doc = "CS is asserted for 1 baud-times after the end of transmission"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(CSHOLD_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Cshold::One) } #[doc = "CS is asserted for 2 baud-times after the end of transmission"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(CSHOLD_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Cshold::Two) } #[doc = "CS is asserted for 3 baud-times after the end of transmission"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(CSHOLD_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Cshold::Three) } #[doc = "CS is asserted for 7 baud-times after the end of transmission"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(CSHOLD_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Cshold::Seven) } #[doc = "CS is asserted after the end of transmission for TCMPVAL0 baud-times"] #[inline(always)] - pub fn tcmp0(self) -> &'a mut W { - self.variant(CSHOLD_A::TCMP0) + pub fn tcmp0(self) -> &'a mut crate::W { + self.variant(Cshold::Tcmp0) } #[doc = "CS is asserted after the end of transmission for TCMPVAL1 baud-times"] #[inline(always)] - pub fn tcmp1(self) -> &'a mut W { - self.variant(CSHOLD_A::TCMP1) + pub fn tcmp1(self) -> &'a mut crate::W { + self.variant(Cshold::Tcmp1) } #[doc = "CS is asserted after the end of transmission for TCMPVAL2 baud-times"] #[inline(always)] - pub fn tcmp2(self) -> &'a mut W { - self.variant(CSHOLD_A::TCMP2) + pub fn tcmp2(self) -> &'a mut crate::W { + self.variant(Cshold::Tcmp2) } } impl R { #[doc = "Bits 16:18 - TX frame start delay"] #[inline(always)] - pub fn txdelay(&self) -> TXDELAY_R { - TXDELAY_R::new(((self.bits >> 16) & 7) as u8) + pub fn txdelay(&self) -> TxdelayR { + TxdelayR::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Chip Select Setup"] #[inline(always)] - pub fn cssetup(&self) -> CSSETUP_R { - CSSETUP_R::new(((self.bits >> 20) & 7) as u8) + pub fn cssetup(&self) -> CssetupR { + CssetupR::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:26 - Inter-character spacing"] #[inline(always)] - pub fn ics(&self) -> ICS_R { - ICS_R::new(((self.bits >> 24) & 7) as u8) + pub fn ics(&self) -> IcsR { + IcsR::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Chip Select Hold"] #[inline(always)] - pub fn cshold(&self) -> CSHOLD_R { - CSHOLD_R::new(((self.bits >> 28) & 7) as u8) + pub fn cshold(&self) -> CsholdR { + CsholdR::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 16:18 - TX frame start delay"] #[inline(always)] #[must_use] - pub fn txdelay(&mut self) -> TXDELAY_W<16> { - TXDELAY_W::new(self) + pub fn txdelay(&mut self) -> TxdelayW { + TxdelayW::new(self, 16) } #[doc = "Bits 20:22 - Chip Select Setup"] #[inline(always)] #[must_use] - pub fn cssetup(&mut self) -> CSSETUP_W<20> { - CSSETUP_W::new(self) + pub fn cssetup(&mut self) -> CssetupW { + CssetupW::new(self, 20) } #[doc = "Bits 24:26 - Inter-character spacing"] #[inline(always)] #[must_use] - pub fn ics(&mut self) -> ICS_W<24> { - ICS_W::new(self) + pub fn ics(&mut self) -> IcsW { + IcsW::new(self, 24) } #[doc = "Bits 28:30 - Chip Select Hold"] #[inline(always)] #[must_use] - pub fn cshold(&mut self) -> CSHOLD_W<28> { - CSHOLD_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cshold(&mut self) -> CsholdW { + CsholdW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timing](index.html) module"] -pub struct TIMING_SPEC; -impl crate::RegisterSpec for TIMING_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timing::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timing::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TimingSpec; +impl crate::RegisterSpec for TimingSpec { type Ux = u32; } -#[doc = "`read()` method returns [timing::R](R) reader structure"] -impl crate::Readable for TIMING_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timing::W](W) writer structure"] -impl crate::Writable for TIMING_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timing::R`](R) reader structure"] +impl crate::Readable for TimingSpec {} +#[doc = "`write(|w| ..)` method takes [`timing::W`](W) writer structure"] +impl crate::Writable for TimingSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMING to value 0"] -impl crate::Resettable for TIMING_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TimingSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/trigctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/trigctrl.rs index 73fdda1..94be6a3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/trigctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/trigctrl.rs @@ -1,200 +1,160 @@ #[doc = "Register `TRIGCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TRIGCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RXTEN` reader - Receive Trigger Enable"] -pub type RXTEN_R = crate::BitReader; +pub type RxtenR = crate::BitReader; #[doc = "Field `RXTEN` writer - Receive Trigger Enable"] -pub type RXTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type RxtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTEN` reader - Transmit Trigger Enable"] -pub type TXTEN_R = crate::BitReader; +pub type TxtenR = crate::BitReader; #[doc = "Field `TXTEN` writer - Transmit Trigger Enable"] -pub type TXTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type TxtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOTXTEN` reader - AUTOTX Trigger Enable"] -pub type AUTOTXTEN_R = crate::BitReader; +pub type AutotxtenR = crate::BitReader; #[doc = "Field `AUTOTXTEN` writer - AUTOTX Trigger Enable"] -pub type AUTOTXTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type AutotxtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXARX0EN` reader - Enable Transmit Trigger after RX End of"] -pub type TXARX0EN_R = crate::BitReader; +pub type Txarx0enR = crate::BitReader; #[doc = "Field `TXARX0EN` writer - Enable Transmit Trigger after RX End of"] -pub type TXARX0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type Txarx0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXARX1EN` reader - Enable Transmit Trigger after RX End of"] -pub type TXARX1EN_R = crate::BitReader; +pub type Txarx1enR = crate::BitReader; #[doc = "Field `TXARX1EN` writer - Enable Transmit Trigger after RX End of"] -pub type TXARX1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type Txarx1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXARX2EN` reader - Enable Transmit Trigger after RX End of"] -pub type TXARX2EN_R = crate::BitReader; +pub type Txarx2enR = crate::BitReader; #[doc = "Field `TXARX2EN` writer - Enable Transmit Trigger after RX End of"] -pub type TXARX2EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type Txarx2enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXATX0EN` reader - Enable Receive Trigger after TX end of f"] -pub type RXATX0EN_R = crate::BitReader; +pub type Rxatx0enR = crate::BitReader; #[doc = "Field `RXATX0EN` writer - Enable Receive Trigger after TX end of f"] -pub type RXATX0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type Rxatx0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXATX1EN` reader - Enable Receive Trigger after TX end of f"] -pub type RXATX1EN_R = crate::BitReader; +pub type Rxatx1enR = crate::BitReader; #[doc = "Field `RXATX1EN` writer - Enable Receive Trigger after TX end of f"] -pub type RXATX1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type Rxatx1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXATX2EN` reader - Enable Receive Trigger after TX end of f"] -pub type RXATX2EN_R = crate::BitReader; +pub type Rxatx2enR = crate::BitReader; #[doc = "Field `RXATX2EN` writer - Enable Receive Trigger after TX end of f"] -pub type RXATX2EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type Rxatx2enW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 4 - Receive Trigger Enable"] #[inline(always)] - pub fn rxten(&self) -> RXTEN_R { - RXTEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxten(&self) -> RxtenR { + RxtenR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Transmit Trigger Enable"] #[inline(always)] - pub fn txten(&self) -> TXTEN_R { - TXTEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn txten(&self) -> TxtenR { + TxtenR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - AUTOTX Trigger Enable"] #[inline(always)] - pub fn autotxten(&self) -> AUTOTXTEN_R { - AUTOTXTEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn autotxten(&self) -> AutotxtenR { + AutotxtenR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Enable Transmit Trigger after RX End of"] #[inline(always)] - pub fn txarx0en(&self) -> TXARX0EN_R { - TXARX0EN_R::new(((self.bits >> 7) & 1) != 0) + pub fn txarx0en(&self) -> Txarx0enR { + Txarx0enR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Enable Transmit Trigger after RX End of"] #[inline(always)] - pub fn txarx1en(&self) -> TXARX1EN_R { - TXARX1EN_R::new(((self.bits >> 8) & 1) != 0) + pub fn txarx1en(&self) -> Txarx1enR { + Txarx1enR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Enable Transmit Trigger after RX End of"] #[inline(always)] - pub fn txarx2en(&self) -> TXARX2EN_R { - TXARX2EN_R::new(((self.bits >> 9) & 1) != 0) + pub fn txarx2en(&self) -> Txarx2enR { + Txarx2enR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Enable Receive Trigger after TX end of f"] #[inline(always)] - pub fn rxatx0en(&self) -> RXATX0EN_R { - RXATX0EN_R::new(((self.bits >> 10) & 1) != 0) + pub fn rxatx0en(&self) -> Rxatx0enR { + Rxatx0enR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Enable Receive Trigger after TX end of f"] #[inline(always)] - pub fn rxatx1en(&self) -> RXATX1EN_R { - RXATX1EN_R::new(((self.bits >> 11) & 1) != 0) + pub fn rxatx1en(&self) -> Rxatx1enR { + Rxatx1enR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Enable Receive Trigger after TX end of f"] #[inline(always)] - pub fn rxatx2en(&self) -> RXATX2EN_R { - RXATX2EN_R::new(((self.bits >> 12) & 1) != 0) + pub fn rxatx2en(&self) -> Rxatx2enR { + Rxatx2enR::new(((self.bits >> 12) & 1) != 0) } } impl W { #[doc = "Bit 4 - Receive Trigger Enable"] #[inline(always)] #[must_use] - pub fn rxten(&mut self) -> RXTEN_W<4> { - RXTEN_W::new(self) + pub fn rxten(&mut self) -> RxtenW { + RxtenW::new(self, 4) } #[doc = "Bit 5 - Transmit Trigger Enable"] #[inline(always)] #[must_use] - pub fn txten(&mut self) -> TXTEN_W<5> { - TXTEN_W::new(self) + pub fn txten(&mut self) -> TxtenW { + TxtenW::new(self, 5) } #[doc = "Bit 6 - AUTOTX Trigger Enable"] #[inline(always)] #[must_use] - pub fn autotxten(&mut self) -> AUTOTXTEN_W<6> { - AUTOTXTEN_W::new(self) + pub fn autotxten(&mut self) -> AutotxtenW { + AutotxtenW::new(self, 6) } #[doc = "Bit 7 - Enable Transmit Trigger after RX End of"] #[inline(always)] #[must_use] - pub fn txarx0en(&mut self) -> TXARX0EN_W<7> { - TXARX0EN_W::new(self) + pub fn txarx0en(&mut self) -> Txarx0enW { + Txarx0enW::new(self, 7) } #[doc = "Bit 8 - Enable Transmit Trigger after RX End of"] #[inline(always)] #[must_use] - pub fn txarx1en(&mut self) -> TXARX1EN_W<8> { - TXARX1EN_W::new(self) + pub fn txarx1en(&mut self) -> Txarx1enW { + Txarx1enW::new(self, 8) } #[doc = "Bit 9 - Enable Transmit Trigger after RX End of"] #[inline(always)] #[must_use] - pub fn txarx2en(&mut self) -> TXARX2EN_W<9> { - TXARX2EN_W::new(self) + pub fn txarx2en(&mut self) -> Txarx2enW { + Txarx2enW::new(self, 9) } #[doc = "Bit 10 - Enable Receive Trigger after TX end of f"] #[inline(always)] #[must_use] - pub fn rxatx0en(&mut self) -> RXATX0EN_W<10> { - RXATX0EN_W::new(self) + pub fn rxatx0en(&mut self) -> Rxatx0enW { + Rxatx0enW::new(self, 10) } #[doc = "Bit 11 - Enable Receive Trigger after TX end of f"] #[inline(always)] #[must_use] - pub fn rxatx1en(&mut self) -> RXATX1EN_W<11> { - RXATX1EN_W::new(self) + pub fn rxatx1en(&mut self) -> Rxatx1enW { + Rxatx1enW::new(self, 11) } #[doc = "Bit 12 - Enable Receive Trigger after TX end of f"] #[inline(always)] #[must_use] - pub fn rxatx2en(&mut self) -> RXATX2EN_W<12> { - RXATX2EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rxatx2en(&mut self) -> Rxatx2enW { + Rxatx2enW::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [trigctrl](index.html) module"] -pub struct TRIGCTRL_SPEC; -impl crate::RegisterSpec for TRIGCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`trigctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trigctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TrigctrlSpec; +impl crate::RegisterSpec for TrigctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [trigctrl::R](R) reader structure"] -impl crate::Readable for TRIGCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [trigctrl::W](W) writer structure"] -impl crate::Writable for TRIGCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`trigctrl::R`](R) reader structure"] +impl crate::Readable for TrigctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`trigctrl::W`](W) writer structure"] +impl crate::Writable for TrigctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TRIGCTRL to value 0"] -impl crate::Resettable for TRIGCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TrigctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/txdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/txdata.rs index e3980b6..61643d3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/txdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/txdata.rs @@ -1,52 +1,27 @@ #[doc = "Register `TXDATA` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXDATA` writer - TX Data"] -pub type TXDATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDATA_SPEC, u8, u8, 8, O>; +pub type TxdataW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - TX Data"] #[inline(always)] #[must_use] - pub fn txdata(&mut self) -> TXDATA_W<0> { - TXDATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txdata(&mut self) -> TxdataW { + TxdataW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdata](index.html) module"] -pub struct TXDATA_SPEC; -impl crate::RegisterSpec for TXDATA_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdata::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxdataSpec; +impl crate::RegisterSpec for TxdataSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [txdata::W](W) writer structure"] -impl crate::Writable for TXDATA_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`txdata::W`](W) writer structure"] +impl crate::Writable for TxdataSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXDATA to value 0"] -impl crate::Resettable for TXDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/txdatax.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/txdatax.rs index 9462e58..14f17f0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/txdatax.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/txdatax.rs @@ -1,92 +1,67 @@ #[doc = "Register `TXDATAX` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXDATAX` writer - TX Data"] -pub type TXDATAX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDATAX_SPEC, u16, u16, 9, O>; +pub type TxdataxW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; #[doc = "Field `UBRXAT` writer - Unblock RX After Transmission"] -pub type UBRXAT_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDATAX_SPEC, bool, O>; +pub type UbrxatW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTRIAT` writer - Set TXTRI After Transmission"] -pub type TXTRIAT_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDATAX_SPEC, bool, O>; +pub type TxtriatW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXBREAK` writer - Transmit Data As Break"] -pub type TXBREAK_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDATAX_SPEC, bool, O>; +pub type TxbreakW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXDISAT` writer - Clear TXEN After Transmission"] -pub type TXDISAT_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDATAX_SPEC, bool, O>; +pub type TxdisatW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXENAT` writer - Enable RX After Transmission"] -pub type RXENAT_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDATAX_SPEC, bool, O>; +pub type RxenatW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bits 0:8 - TX Data"] #[inline(always)] #[must_use] - pub fn txdatax(&mut self) -> TXDATAX_W<0> { - TXDATAX_W::new(self) + pub fn txdatax(&mut self) -> TxdataxW { + TxdataxW::new(self, 0) } #[doc = "Bit 11 - Unblock RX After Transmission"] #[inline(always)] #[must_use] - pub fn ubrxat(&mut self) -> UBRXAT_W<11> { - UBRXAT_W::new(self) + pub fn ubrxat(&mut self) -> UbrxatW { + UbrxatW::new(self, 11) } #[doc = "Bit 12 - Set TXTRI After Transmission"] #[inline(always)] #[must_use] - pub fn txtriat(&mut self) -> TXTRIAT_W<12> { - TXTRIAT_W::new(self) + pub fn txtriat(&mut self) -> TxtriatW { + TxtriatW::new(self, 12) } #[doc = "Bit 13 - Transmit Data As Break"] #[inline(always)] #[must_use] - pub fn txbreak(&mut self) -> TXBREAK_W<13> { - TXBREAK_W::new(self) + pub fn txbreak(&mut self) -> TxbreakW { + TxbreakW::new(self, 13) } #[doc = "Bit 14 - Clear TXEN After Transmission"] #[inline(always)] #[must_use] - pub fn txdisat(&mut self) -> TXDISAT_W<14> { - TXDISAT_W::new(self) + pub fn txdisat(&mut self) -> TxdisatW { + TxdisatW::new(self, 14) } #[doc = "Bit 15 - Enable RX After Transmission"] #[inline(always)] #[must_use] - pub fn rxenat(&mut self) -> RXENAT_W<15> { - RXENAT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rxenat(&mut self) -> RxenatW { + RxenatW::new(self, 15) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdatax](index.html) module"] -pub struct TXDATAX_SPEC; -impl crate::RegisterSpec for TXDATAX_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdatax::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxdataxSpec; +impl crate::RegisterSpec for TxdataxSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [txdatax::W](W) writer structure"] -impl crate::Writable for TXDATAX_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`txdatax::W`](W) writer structure"] +impl crate::Writable for TxdataxSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXDATAX to value 0"] -impl crate::Resettable for TXDATAX_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxdataxSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/txdouble.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/txdouble.rs index 320dad9..9cb5990 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/txdouble.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/txdouble.rs @@ -1,60 +1,35 @@ #[doc = "Register `TXDOUBLE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXDATA0` writer - TX Data"] -pub type TXDATA0_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDOUBLE_SPEC, u8, u8, 8, O>; +pub type Txdata0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `TXDATA1` writer - TX Data"] -pub type TXDATA1_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDOUBLE_SPEC, u8, u8, 8, O>; +pub type Txdata1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - TX Data"] #[inline(always)] #[must_use] - pub fn txdata0(&mut self) -> TXDATA0_W<0> { - TXDATA0_W::new(self) + pub fn txdata0(&mut self) -> Txdata0W { + Txdata0W::new(self, 0) } #[doc = "Bits 8:15 - TX Data"] #[inline(always)] #[must_use] - pub fn txdata1(&mut self) -> TXDATA1_W<8> { - TXDATA1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txdata1(&mut self) -> Txdata1W { + Txdata1W::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdouble](index.html) module"] -pub struct TXDOUBLE_SPEC; -impl crate::RegisterSpec for TXDOUBLE_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdouble::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxdoubleSpec; +impl crate::RegisterSpec for TxdoubleSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [txdouble::W](W) writer structure"] -impl crate::Writable for TXDOUBLE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`txdouble::W`](W) writer structure"] +impl crate::Writable for TxdoubleSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXDOUBLE to value 0"] -impl crate::Resettable for TXDOUBLE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxdoubleSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/txdoublex.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/txdoublex.rs index 0f47c31..a43ee56 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/txdoublex.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_ns/txdoublex.rs @@ -1,140 +1,115 @@ #[doc = "Register `TXDOUBLEX` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXDATA0` writer - TX Data"] -pub type TXDATA0_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDOUBLEX_SPEC, u16, u16, 9, O>; +pub type Txdata0W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; #[doc = "Field `UBRXAT0` writer - Unblock RX After Transmission"] -pub type UBRXAT0_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, O>; +pub type Ubrxat0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTRIAT0` writer - Set TXTRI After Transmission"] -pub type TXTRIAT0_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, O>; +pub type Txtriat0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXBREAK0` writer - Transmit Data As Break"] -pub type TXBREAK0_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, O>; +pub type Txbreak0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXDISAT0` writer - Clear TXEN After Transmission"] -pub type TXDISAT0_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, O>; +pub type Txdisat0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXENAT0` writer - Enable RX After Transmission"] -pub type RXENAT0_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, O>; +pub type Rxenat0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXDATA1` writer - TX Data"] -pub type TXDATA1_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDOUBLEX_SPEC, u16, u16, 9, O>; +pub type Txdata1W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; #[doc = "Field `UBRXAT1` writer - Unblock RX After Transmission"] -pub type UBRXAT1_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, O>; +pub type Ubrxat1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTRIAT1` writer - Set TXTRI After Transmission"] -pub type TXTRIAT1_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, O>; +pub type Txtriat1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXBREAK1` writer - Transmit Data As Break"] -pub type TXBREAK1_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, O>; +pub type Txbreak1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXDISAT1` writer - Clear TXEN After Transmission"] -pub type TXDISAT1_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, O>; +pub type Txdisat1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXENAT1` writer - Enable RX After Transmission"] -pub type RXENAT1_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, O>; +pub type Rxenat1W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bits 0:8 - TX Data"] #[inline(always)] #[must_use] - pub fn txdata0(&mut self) -> TXDATA0_W<0> { - TXDATA0_W::new(self) + pub fn txdata0(&mut self) -> Txdata0W { + Txdata0W::new(self, 0) } #[doc = "Bit 11 - Unblock RX After Transmission"] #[inline(always)] #[must_use] - pub fn ubrxat0(&mut self) -> UBRXAT0_W<11> { - UBRXAT0_W::new(self) + pub fn ubrxat0(&mut self) -> Ubrxat0W { + Ubrxat0W::new(self, 11) } #[doc = "Bit 12 - Set TXTRI After Transmission"] #[inline(always)] #[must_use] - pub fn txtriat0(&mut self) -> TXTRIAT0_W<12> { - TXTRIAT0_W::new(self) + pub fn txtriat0(&mut self) -> Txtriat0W { + Txtriat0W::new(self, 12) } #[doc = "Bit 13 - Transmit Data As Break"] #[inline(always)] #[must_use] - pub fn txbreak0(&mut self) -> TXBREAK0_W<13> { - TXBREAK0_W::new(self) + pub fn txbreak0(&mut self) -> Txbreak0W { + Txbreak0W::new(self, 13) } #[doc = "Bit 14 - Clear TXEN After Transmission"] #[inline(always)] #[must_use] - pub fn txdisat0(&mut self) -> TXDISAT0_W<14> { - TXDISAT0_W::new(self) + pub fn txdisat0(&mut self) -> Txdisat0W { + Txdisat0W::new(self, 14) } #[doc = "Bit 15 - Enable RX After Transmission"] #[inline(always)] #[must_use] - pub fn rxenat0(&mut self) -> RXENAT0_W<15> { - RXENAT0_W::new(self) + pub fn rxenat0(&mut self) -> Rxenat0W { + Rxenat0W::new(self, 15) } #[doc = "Bits 16:24 - TX Data"] #[inline(always)] #[must_use] - pub fn txdata1(&mut self) -> TXDATA1_W<16> { - TXDATA1_W::new(self) + pub fn txdata1(&mut self) -> Txdata1W { + Txdata1W::new(self, 16) } #[doc = "Bit 27 - Unblock RX After Transmission"] #[inline(always)] #[must_use] - pub fn ubrxat1(&mut self) -> UBRXAT1_W<27> { - UBRXAT1_W::new(self) + pub fn ubrxat1(&mut self) -> Ubrxat1W { + Ubrxat1W::new(self, 27) } #[doc = "Bit 28 - Set TXTRI After Transmission"] #[inline(always)] #[must_use] - pub fn txtriat1(&mut self) -> TXTRIAT1_W<28> { - TXTRIAT1_W::new(self) + pub fn txtriat1(&mut self) -> Txtriat1W { + Txtriat1W::new(self, 28) } #[doc = "Bit 29 - Transmit Data As Break"] #[inline(always)] #[must_use] - pub fn txbreak1(&mut self) -> TXBREAK1_W<29> { - TXBREAK1_W::new(self) + pub fn txbreak1(&mut self) -> Txbreak1W { + Txbreak1W::new(self, 29) } #[doc = "Bit 30 - Clear TXEN After Transmission"] #[inline(always)] #[must_use] - pub fn txdisat1(&mut self) -> TXDISAT1_W<30> { - TXDISAT1_W::new(self) + pub fn txdisat1(&mut self) -> Txdisat1W { + Txdisat1W::new(self, 30) } #[doc = "Bit 31 - Enable RX After Transmission"] #[inline(always)] #[must_use] - pub fn rxenat1(&mut self) -> RXENAT1_W<31> { - RXENAT1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rxenat1(&mut self) -> Rxenat1W { + Rxenat1W::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdoublex](index.html) module"] -pub struct TXDOUBLEX_SPEC; -impl crate::RegisterSpec for TXDOUBLEX_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdoublex::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxdoublexSpec; +impl crate::RegisterSpec for TxdoublexSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [txdoublex::W](W) writer structure"] -impl crate::Writable for TXDOUBLEX_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`txdoublex::W`](W) writer structure"] +impl crate::Writable for TxdoublexSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXDOUBLEX to value 0"] -impl crate::Resettable for TXDOUBLEX_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxdoublexSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s.rs index 618abe7..348d869 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s.rs @@ -1,166 +1,330 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + ctrl: Ctrl, + frame: Frame, + trigctrl: Trigctrl, + cmd: Cmd, + status: Status, + clkdiv: Clkdiv, + rxdatax: Rxdatax, + rxdata: Rxdata, + rxdoublex: Rxdoublex, + rxdouble: Rxdouble, + rxdataxp: Rxdataxp, + rxdoublexp: Rxdoublexp, + txdatax: Txdatax, + txdata: Txdata, + txdoublex: Txdoublex, + txdouble: Txdouble, + if_: If, + ien: Ien, + irctrl: Irctrl, + i2sctrl: I2sctrl, + timing: Timing, + ctrlx: Ctrlx, + timecmp0: Timecmp0, + timecmp1: Timecmp1, + timecmp2: Timecmp2, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub ctrl: CTRL, + #[inline(always)] + pub const fn ctrl(&self) -> &Ctrl { + &self.ctrl + } #[doc = "0x0c - No Description"] - pub frame: FRAME, + #[inline(always)] + pub const fn frame(&self) -> &Frame { + &self.frame + } #[doc = "0x10 - No Description"] - pub trigctrl: TRIGCTRL, + #[inline(always)] + pub const fn trigctrl(&self) -> &Trigctrl { + &self.trigctrl + } #[doc = "0x14 - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x18 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x1c - No Description"] - pub clkdiv: CLKDIV, + #[inline(always)] + pub const fn clkdiv(&self) -> &Clkdiv { + &self.clkdiv + } #[doc = "0x20 - No Description"] - pub rxdatax: RXDATAX, + #[inline(always)] + pub const fn rxdatax(&self) -> &Rxdatax { + &self.rxdatax + } #[doc = "0x24 - No Description"] - pub rxdata: RXDATA, + #[inline(always)] + pub const fn rxdata(&self) -> &Rxdata { + &self.rxdata + } #[doc = "0x28 - No Description"] - pub rxdoublex: RXDOUBLEX, + #[inline(always)] + pub const fn rxdoublex(&self) -> &Rxdoublex { + &self.rxdoublex + } #[doc = "0x2c - No Description"] - pub rxdouble: RXDOUBLE, + #[inline(always)] + pub const fn rxdouble(&self) -> &Rxdouble { + &self.rxdouble + } #[doc = "0x30 - No Description"] - pub rxdataxp: RXDATAXP, + #[inline(always)] + pub const fn rxdataxp(&self) -> &Rxdataxp { + &self.rxdataxp + } #[doc = "0x34 - No Description"] - pub rxdoublexp: RXDOUBLEXP, + #[inline(always)] + pub const fn rxdoublexp(&self) -> &Rxdoublexp { + &self.rxdoublexp + } #[doc = "0x38 - No Description"] - pub txdatax: TXDATAX, + #[inline(always)] + pub const fn txdatax(&self) -> &Txdatax { + &self.txdatax + } #[doc = "0x3c - No Description"] - pub txdata: TXDATA, + #[inline(always)] + pub const fn txdata(&self) -> &Txdata { + &self.txdata + } #[doc = "0x40 - No Description"] - pub txdoublex: TXDOUBLEX, + #[inline(always)] + pub const fn txdoublex(&self) -> &Txdoublex { + &self.txdoublex + } #[doc = "0x44 - No Description"] - pub txdouble: TXDOUBLE, + #[inline(always)] + pub const fn txdouble(&self) -> &Txdouble { + &self.txdouble + } #[doc = "0x48 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x4c - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x50 - No Description"] - pub irctrl: IRCTRL, + #[inline(always)] + pub const fn irctrl(&self) -> &Irctrl { + &self.irctrl + } #[doc = "0x54 - No Description"] - pub i2sctrl: I2SCTRL, + #[inline(always)] + pub const fn i2sctrl(&self) -> &I2sctrl { + &self.i2sctrl + } #[doc = "0x58 - No Description"] - pub timing: TIMING, + #[inline(always)] + pub const fn timing(&self) -> &Timing { + &self.timing + } #[doc = "0x5c - No Description"] - pub ctrlx: CTRLX, + #[inline(always)] + pub const fn ctrlx(&self) -> &Ctrlx { + &self.ctrlx + } #[doc = "0x60 - No Description"] - pub timecmp0: TIMECMP0, + #[inline(always)] + pub const fn timecmp0(&self) -> &Timecmp0 { + &self.timecmp0 + } #[doc = "0x64 - No Description"] - pub timecmp1: TIMECMP1, + #[inline(always)] + pub const fn timecmp1(&self) -> &Timecmp1 { + &self.timecmp1 + } #[doc = "0x68 - No Description"] - pub timecmp2: TIMECMP2, + #[inline(always)] + pub const fn timecmp2(&self) -> &Timecmp2 { + &self.timecmp2 + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CTRL (rw) register accessor: an alias for `Reg`"] -pub type CTRL = crate::Reg; +#[doc = "CTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] +module"] +#[doc(alias = "CTRL")] +pub type Ctrl = crate::Reg; #[doc = "No Description"] pub mod ctrl; -#[doc = "FRAME (rw) register accessor: an alias for `Reg`"] -pub type FRAME = crate::Reg; +#[doc = "FRAME (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`frame::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`frame::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@frame`] +module"] +#[doc(alias = "FRAME")] +pub type Frame = crate::Reg; #[doc = "No Description"] pub mod frame; -#[doc = "TRIGCTRL (rw) register accessor: an alias for `Reg`"] -pub type TRIGCTRL = crate::Reg; +#[doc = "TRIGCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`trigctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trigctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trigctrl`] +module"] +#[doc(alias = "TRIGCTRL")] +pub type Trigctrl = crate::Reg; #[doc = "No Description"] pub mod trigctrl; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "CLKDIV (rw) register accessor: an alias for `Reg`"] -pub type CLKDIV = crate::Reg; +#[doc = "CLKDIV (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv`] +module"] +#[doc(alias = "CLKDIV")] +pub type Clkdiv = crate::Reg; #[doc = "No Description"] pub mod clkdiv; -#[doc = "RXDATAX (r) register accessor: an alias for `Reg`"] -pub type RXDATAX = crate::Reg; +#[doc = "RXDATAX (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdatax::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdatax`] +module"] +#[doc(alias = "RXDATAX")] +pub type Rxdatax = crate::Reg; #[doc = "No Description"] pub mod rxdatax; -#[doc = "RXDATA (r) register accessor: an alias for `Reg`"] -pub type RXDATA = crate::Reg; +#[doc = "RXDATA (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdata::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdata`] +module"] +#[doc(alias = "RXDATA")] +pub type Rxdata = crate::Reg; #[doc = "No Description"] pub mod rxdata; -#[doc = "RXDOUBLEX (r) register accessor: an alias for `Reg`"] -pub type RXDOUBLEX = crate::Reg; +#[doc = "RXDOUBLEX (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdoublex::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdoublex`] +module"] +#[doc(alias = "RXDOUBLEX")] +pub type Rxdoublex = crate::Reg; #[doc = "No Description"] pub mod rxdoublex; -#[doc = "RXDOUBLE (r) register accessor: an alias for `Reg`"] -pub type RXDOUBLE = crate::Reg; +#[doc = "RXDOUBLE (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdouble::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdouble`] +module"] +#[doc(alias = "RXDOUBLE")] +pub type Rxdouble = crate::Reg; #[doc = "No Description"] pub mod rxdouble; -#[doc = "RXDATAXP (r) register accessor: an alias for `Reg`"] -pub type RXDATAXP = crate::Reg; +#[doc = "RXDATAXP (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdataxp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdataxp`] +module"] +#[doc(alias = "RXDATAXP")] +pub type Rxdataxp = crate::Reg; #[doc = "No Description"] pub mod rxdataxp; -#[doc = "RXDOUBLEXP (r) register accessor: an alias for `Reg`"] -pub type RXDOUBLEXP = crate::Reg; +#[doc = "RXDOUBLEXP (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdoublexp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxdoublexp`] +module"] +#[doc(alias = "RXDOUBLEXP")] +pub type Rxdoublexp = crate::Reg; #[doc = "No Description"] pub mod rxdoublexp; -#[doc = "TXDATAX (w) register accessor: an alias for `Reg`"] -pub type TXDATAX = crate::Reg; +#[doc = "TXDATAX (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdatax::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txdatax`] +module"] +#[doc(alias = "TXDATAX")] +pub type Txdatax = crate::Reg; #[doc = "No Description"] pub mod txdatax; -#[doc = "TXDATA (w) register accessor: an alias for `Reg`"] -pub type TXDATA = crate::Reg; +#[doc = "TXDATA (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdata::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txdata`] +module"] +#[doc(alias = "TXDATA")] +pub type Txdata = crate::Reg; #[doc = "No Description"] pub mod txdata; -#[doc = "TXDOUBLEX (w) register accessor: an alias for `Reg`"] -pub type TXDOUBLEX = crate::Reg; +#[doc = "TXDOUBLEX (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdoublex::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txdoublex`] +module"] +#[doc(alias = "TXDOUBLEX")] +pub type Txdoublex = crate::Reg; #[doc = "No Description"] pub mod txdoublex; -#[doc = "TXDOUBLE (w) register accessor: an alias for `Reg`"] -pub type TXDOUBLE = crate::Reg; +#[doc = "TXDOUBLE (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdouble::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txdouble`] +module"] +#[doc(alias = "TXDOUBLE")] +pub type Txdouble = crate::Reg; #[doc = "No Description"] pub mod txdouble; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "IRCTRL (rw) register accessor: an alias for `Reg`"] -pub type IRCTRL = crate::Reg; +#[doc = "IRCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`irctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irctrl`] +module"] +#[doc(alias = "IRCTRL")] +pub type Irctrl = crate::Reg; #[doc = "No Description"] pub mod irctrl; -#[doc = "I2SCTRL (rw) register accessor: an alias for `Reg`"] -pub type I2SCTRL = crate::Reg; +#[doc = "I2SCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`i2sctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2sctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2sctrl`] +module"] +#[doc(alias = "I2SCTRL")] +pub type I2sctrl = crate::Reg; #[doc = "No Description"] pub mod i2sctrl; -#[doc = "TIMING (rw) register accessor: an alias for `Reg`"] -pub type TIMING = crate::Reg; +#[doc = "TIMING (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timing::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timing::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timing`] +module"] +#[doc(alias = "TIMING")] +pub type Timing = crate::Reg; #[doc = "No Description"] pub mod timing; -#[doc = "CTRLX (rw) register accessor: an alias for `Reg`"] -pub type CTRLX = crate::Reg; +#[doc = "CTRLX (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrlx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrlx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrlx`] +module"] +#[doc(alias = "CTRLX")] +pub type Ctrlx = crate::Reg; #[doc = "No Description"] pub mod ctrlx; -#[doc = "TIMECMP0 (rw) register accessor: an alias for `Reg`"] -pub type TIMECMP0 = crate::Reg; +#[doc = "TIMECMP0 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timecmp0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timecmp0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timecmp0`] +module"] +#[doc(alias = "TIMECMP0")] +pub type Timecmp0 = crate::Reg; #[doc = "No Description"] pub mod timecmp0; -#[doc = "TIMECMP1 (rw) register accessor: an alias for `Reg`"] -pub type TIMECMP1 = crate::Reg; +#[doc = "TIMECMP1 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timecmp1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timecmp1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timecmp1`] +module"] +#[doc(alias = "TIMECMP1")] +pub type Timecmp1 = crate::Reg; #[doc = "No Description"] pub mod timecmp1; -#[doc = "TIMECMP2 (rw) register accessor: an alias for `Reg`"] -pub type TIMECMP2 = crate::Reg; +#[doc = "TIMECMP2 (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timecmp2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timecmp2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timecmp2`] +module"] +#[doc(alias = "TIMECMP2")] +pub type Timecmp2 = crate::Reg; #[doc = "No Description"] pub mod timecmp2; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/clkdiv.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/clkdiv.rs index ea76849..bfec119 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/clkdiv.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/clkdiv.rs @@ -1,95 +1,55 @@ #[doc = "Register `CLKDIV` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CLKDIV` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DIV` reader - Fractional Clock Divider"] -pub type DIV_R = crate::FieldReader; +pub type DivR = crate::FieldReader; #[doc = "Field `DIV` writer - Fractional Clock Divider"] -pub type DIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CLKDIV_SPEC, u32, u32, 20, O>; +pub type DivW<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; #[doc = "Field `AUTOBAUDEN` reader - AUTOBAUD detection enable"] -pub type AUTOBAUDEN_R = crate::BitReader; +pub type AutobaudenR = crate::BitReader; #[doc = "Field `AUTOBAUDEN` writer - AUTOBAUD detection enable"] -pub type AUTOBAUDEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLKDIV_SPEC, bool, O>; +pub type AutobaudenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 3:22 - Fractional Clock Divider"] #[inline(always)] - pub fn div(&self) -> DIV_R { - DIV_R::new((self.bits >> 3) & 0x000f_ffff) + pub fn div(&self) -> DivR { + DivR::new((self.bits >> 3) & 0x000f_ffff) } #[doc = "Bit 31 - AUTOBAUD detection enable"] #[inline(always)] - pub fn autobauden(&self) -> AUTOBAUDEN_R { - AUTOBAUDEN_R::new(((self.bits >> 31) & 1) != 0) + pub fn autobauden(&self) -> AutobaudenR { + AutobaudenR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 3:22 - Fractional Clock Divider"] #[inline(always)] #[must_use] - pub fn div(&mut self) -> DIV_W<3> { - DIV_W::new(self) + pub fn div(&mut self) -> DivW { + DivW::new(self, 3) } #[doc = "Bit 31 - AUTOBAUD detection enable"] #[inline(always)] #[must_use] - pub fn autobauden(&mut self) -> AUTOBAUDEN_W<31> { - AUTOBAUDEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn autobauden(&mut self) -> AutobaudenW { + AutobaudenW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clkdiv](index.html) module"] -pub struct CLKDIV_SPEC; -impl crate::RegisterSpec for CLKDIV_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ClkdivSpec; +impl crate::RegisterSpec for ClkdivSpec { type Ux = u32; } -#[doc = "`read()` method returns [clkdiv::R](R) reader structure"] -impl crate::Readable for CLKDIV_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [clkdiv::W](W) writer structure"] -impl crate::Writable for CLKDIV_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`clkdiv::R`](R) reader structure"] +impl crate::Readable for ClkdivSpec {} +#[doc = "`write(|w| ..)` method takes [`clkdiv::W`](W) writer structure"] +impl crate::Writable for ClkdivSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKDIV to value 0"] -impl crate::Resettable for CLKDIV_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for ClkdivSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/cmd.rs index a3cf7e7..a8bb92d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/cmd.rs @@ -1,140 +1,115 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RXEN` writer - Receiver Enable"] -pub type RXEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXDIS` writer - Receiver Disable"] -pub type RXDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXEN` writer - Transmitter Enable"] -pub type TXEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXDIS` writer - Transmitter Disable"] -pub type TXDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MASTEREN` writer - Main Mode Enable"] -pub type MASTEREN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type MasterenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MASTERDIS` writer - Main Mode Disable"] -pub type MASTERDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type MasterdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXBLOCKEN` writer - Receiver Block Enable"] -pub type RXBLOCKEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxblockenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXBLOCKDIS` writer - Receiver Block Disable"] -pub type RXBLOCKDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type RxblockdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTRIEN` writer - Transmitter Tristate Enable"] -pub type TXTRIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxtrienW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTRIDIS` writer - Transmitter Tristate Disable"] -pub type TXTRIDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type TxtridisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEARTX` writer - Clear TX"] -pub type CLEARTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type CleartxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLEARRX` writer - Clear RX"] -pub type CLEARRX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type ClearrxW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Receiver Enable"] #[inline(always)] #[must_use] - pub fn rxen(&mut self) -> RXEN_W<0> { - RXEN_W::new(self) + pub fn rxen(&mut self) -> RxenW { + RxenW::new(self, 0) } #[doc = "Bit 1 - Receiver Disable"] #[inline(always)] #[must_use] - pub fn rxdis(&mut self) -> RXDIS_W<1> { - RXDIS_W::new(self) + pub fn rxdis(&mut self) -> RxdisW { + RxdisW::new(self, 1) } #[doc = "Bit 2 - Transmitter Enable"] #[inline(always)] #[must_use] - pub fn txen(&mut self) -> TXEN_W<2> { - TXEN_W::new(self) + pub fn txen(&mut self) -> TxenW { + TxenW::new(self, 2) } #[doc = "Bit 3 - Transmitter Disable"] #[inline(always)] #[must_use] - pub fn txdis(&mut self) -> TXDIS_W<3> { - TXDIS_W::new(self) + pub fn txdis(&mut self) -> TxdisW { + TxdisW::new(self, 3) } #[doc = "Bit 4 - Main Mode Enable"] #[inline(always)] #[must_use] - pub fn masteren(&mut self) -> MASTEREN_W<4> { - MASTEREN_W::new(self) + pub fn masteren(&mut self) -> MasterenW { + MasterenW::new(self, 4) } #[doc = "Bit 5 - Main Mode Disable"] #[inline(always)] #[must_use] - pub fn masterdis(&mut self) -> MASTERDIS_W<5> { - MASTERDIS_W::new(self) + pub fn masterdis(&mut self) -> MasterdisW { + MasterdisW::new(self, 5) } #[doc = "Bit 6 - Receiver Block Enable"] #[inline(always)] #[must_use] - pub fn rxblocken(&mut self) -> RXBLOCKEN_W<6> { - RXBLOCKEN_W::new(self) + pub fn rxblocken(&mut self) -> RxblockenW { + RxblockenW::new(self, 6) } #[doc = "Bit 7 - Receiver Block Disable"] #[inline(always)] #[must_use] - pub fn rxblockdis(&mut self) -> RXBLOCKDIS_W<7> { - RXBLOCKDIS_W::new(self) + pub fn rxblockdis(&mut self) -> RxblockdisW { + RxblockdisW::new(self, 7) } #[doc = "Bit 8 - Transmitter Tristate Enable"] #[inline(always)] #[must_use] - pub fn txtrien(&mut self) -> TXTRIEN_W<8> { - TXTRIEN_W::new(self) + pub fn txtrien(&mut self) -> TxtrienW { + TxtrienW::new(self, 8) } #[doc = "Bit 9 - Transmitter Tristate Disable"] #[inline(always)] #[must_use] - pub fn txtridis(&mut self) -> TXTRIDIS_W<9> { - TXTRIDIS_W::new(self) + pub fn txtridis(&mut self) -> TxtridisW { + TxtridisW::new(self, 9) } #[doc = "Bit 10 - Clear TX"] #[inline(always)] #[must_use] - pub fn cleartx(&mut self) -> CLEARTX_W<10> { - CLEARTX_W::new(self) + pub fn cleartx(&mut self) -> CleartxW { + CleartxW::new(self, 10) } #[doc = "Bit 11 - Clear RX"] #[inline(always)] #[must_use] - pub fn clearrx(&mut self) -> CLEARRX_W<11> { - CLEARRX_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clearrx(&mut self) -> ClearrxW { + ClearrxW::new(self, 11) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/ctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/ctrl.rs index 895cb48..8a0ac96 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/ctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/ctrl.rs @@ -1,249 +1,227 @@ #[doc = "Register `CTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `SYNC` reader - USART Synchronous Mode"] -pub type SYNC_R = crate::BitReader; +pub type W = crate::W; #[doc = "USART Synchronous Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYNC_A { +pub enum Sync { #[doc = "0: The USART operates in asynchronous mode"] - DISABLE = 0, + Disable = 0, #[doc = "1: The USART operates in synchronous mode"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYNC_A) -> Self { + fn from(variant: Sync) -> Self { variant as u8 != 0 } } -impl SYNC_R { +#[doc = "Field `SYNC` reader - USART Synchronous Mode"] +pub type SyncR = crate::BitReader; +impl SyncR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SYNC_A { + pub const fn variant(&self) -> Sync { match self.bits { - false => SYNC_A::DISABLE, - true => SYNC_A::ENABLE, + false => Sync::Disable, + true => Sync::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The USART operates in asynchronous mode"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == SYNC_A::DISABLE + *self == Sync::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The USART operates in synchronous mode"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == SYNC_A::ENABLE + *self == Sync::Enable } } #[doc = "Field `SYNC` writer - USART Synchronous Mode"] -pub type SYNC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, SYNC_A, O>; -impl<'a, const O: u8> SYNC_W<'a, O> { +pub type SyncW<'a, REG> = crate::BitWriter<'a, REG, Sync>; +impl<'a, REG> SyncW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The USART operates in asynchronous mode"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(SYNC_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Sync::Disable) } #[doc = "The USART operates in synchronous mode"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(SYNC_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Sync::Enable) } } -#[doc = "Field `LOOPBK` reader - Loopback Enable"] -pub type LOOPBK_R = crate::BitReader; #[doc = "Loopback Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOOPBK_A { +pub enum Loopbk { #[doc = "0: The receiver is connected to and receives data from U(S)n_RX"] - DISABLE = 0, + Disable = 0, #[doc = "1: The receiver is connected to and receives data from U(S)n_TX"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOOPBK_A) -> Self { + fn from(variant: Loopbk) -> Self { variant as u8 != 0 } } -impl LOOPBK_R { +#[doc = "Field `LOOPBK` reader - Loopback Enable"] +pub type LoopbkR = crate::BitReader; +impl LoopbkR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOOPBK_A { + pub const fn variant(&self) -> Loopbk { match self.bits { - false => LOOPBK_A::DISABLE, - true => LOOPBK_A::ENABLE, + false => Loopbk::Disable, + true => Loopbk::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The receiver is connected to and receives data from U(S)n_RX"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == LOOPBK_A::DISABLE + *self == Loopbk::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The receiver is connected to and receives data from U(S)n_TX"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == LOOPBK_A::ENABLE + *self == Loopbk::Enable } } #[doc = "Field `LOOPBK` writer - Loopback Enable"] -pub type LOOPBK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, LOOPBK_A, O>; -impl<'a, const O: u8> LOOPBK_W<'a, O> { +pub type LoopbkW<'a, REG> = crate::BitWriter<'a, REG, Loopbk>; +impl<'a, REG> LoopbkW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The receiver is connected to and receives data from U(S)n_RX"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(LOOPBK_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Loopbk::Disable) } #[doc = "The receiver is connected to and receives data from U(S)n_TX"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(LOOPBK_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Loopbk::Enable) } } -#[doc = "Field `CCEN` reader - Collision Check Enable"] -pub type CCEN_R = crate::BitReader; #[doc = "Collision Check Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCEN_A { +pub enum Ccen { #[doc = "0: Collision check is disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Collision check is enabled. The receiver must be enabled for the check to be performed"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCEN_A) -> Self { + fn from(variant: Ccen) -> Self { variant as u8 != 0 } } -impl CCEN_R { +#[doc = "Field `CCEN` reader - Collision Check Enable"] +pub type CcenR = crate::BitReader; +impl CcenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CCEN_A { + pub const fn variant(&self) -> Ccen { match self.bits { - false => CCEN_A::DISABLE, - true => CCEN_A::ENABLE, + false => Ccen::Disable, + true => Ccen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Collision check is disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CCEN_A::DISABLE + *self == Ccen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Collision check is enabled. The receiver must be enabled for the check to be performed"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CCEN_A::ENABLE + *self == Ccen::Enable } } #[doc = "Field `CCEN` writer - Collision Check Enable"] -pub type CCEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, CCEN_A, O>; -impl<'a, const O: u8> CCEN_W<'a, O> { +pub type CcenW<'a, REG> = crate::BitWriter<'a, REG, Ccen>; +impl<'a, REG> CcenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Collision check is disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CCEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ccen::Disable) } #[doc = "Collision check is enabled. The receiver must be enabled for the check to be performed"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CCEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Ccen::Enable) } } -#[doc = "Field `MPM` reader - Multi-Processor Mode"] -pub type MPM_R = crate::BitReader; #[doc = "Multi-Processor Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MPM_A { +pub enum Mpm { #[doc = "0: The 9th bit of incoming frames has no special function"] - DISABLE = 0, + Disable = 0, #[doc = "1: An incoming frame with the 9th bit equal to MPAB will be loaded into the receive buffer regardless of RXBLOCK and will result in the MPAB interrupt flag being set"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MPM_A) -> Self { + fn from(variant: Mpm) -> Self { variant as u8 != 0 } } -impl MPM_R { +#[doc = "Field `MPM` reader - Multi-Processor Mode"] +pub type MpmR = crate::BitReader; +impl MpmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MPM_A { + pub const fn variant(&self) -> Mpm { match self.bits { - false => MPM_A::DISABLE, - true => MPM_A::ENABLE, + false => Mpm::Disable, + true => Mpm::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The 9th bit of incoming frames has no special function"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == MPM_A::DISABLE + *self == Mpm::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "An incoming frame with the 9th bit equal to MPAB will be loaded into the receive buffer regardless of RXBLOCK and will result in the MPAB interrupt flag being set"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == MPM_A::ENABLE + *self == Mpm::Enable } } #[doc = "Field `MPM` writer - Multi-Processor Mode"] -pub type MPM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, MPM_A, O>; -impl<'a, const O: u8> MPM_W<'a, O> { +pub type MpmW<'a, REG> = crate::BitWriter<'a, REG, Mpm>; +impl<'a, REG> MpmW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The 9th bit of incoming frames has no special function"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(MPM_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Mpm::Disable) } #[doc = "An incoming frame with the 9th bit equal to MPAB will be loaded into the receive buffer regardless of RXBLOCK and will result in the MPAB interrupt flag being set"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(MPM_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Mpm::Enable) } } #[doc = "Field `MPAB` reader - Multi-Processor Address-Bit"] -pub type MPAB_R = crate::BitReader; +pub type MpabR = crate::BitReader; #[doc = "Field `MPAB` writer - Multi-Processor Address-Bit"] -pub type MPAB_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; -#[doc = "Field `OVS` reader - Oversampling"] -pub type OVS_R = crate::FieldReader; +pub type MpabW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Oversampling\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum OVS_A { +pub enum Ovs { #[doc = "0: Regular UART mode with 16X oversampling in asynchronous mode"] X16 = 0, #[doc = "1: Double speed with 8X oversampling in asynchronous mode"] @@ -253,1089 +231,1130 @@ pub enum OVS_A { #[doc = "3: Quadruple speed with 4X oversampling in asynchronous mode"] X4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: OVS_A) -> Self { + fn from(variant: Ovs) -> Self { variant as _ } } -impl OVS_R { +impl crate::FieldSpec for Ovs { + type Ux = u8; +} +impl crate::IsEnum for Ovs {} +#[doc = "Field `OVS` reader - Oversampling"] +pub type OvsR = crate::FieldReader; +impl OvsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> OVS_A { + pub const fn variant(&self) -> Ovs { match self.bits { - 0 => OVS_A::X16, - 1 => OVS_A::X8, - 2 => OVS_A::X6, - 3 => OVS_A::X4, + 0 => Ovs::X16, + 1 => Ovs::X8, + 2 => Ovs::X6, + 3 => Ovs::X4, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `X16`"] + #[doc = "Regular UART mode with 16X oversampling in asynchronous mode"] #[inline(always)] pub fn is_x16(&self) -> bool { - *self == OVS_A::X16 + *self == Ovs::X16 } - #[doc = "Checks if the value of the field is `X8`"] + #[doc = "Double speed with 8X oversampling in asynchronous mode"] #[inline(always)] pub fn is_x8(&self) -> bool { - *self == OVS_A::X8 + *self == Ovs::X8 } - #[doc = "Checks if the value of the field is `X6`"] + #[doc = "6X oversampling in asynchronous mode"] #[inline(always)] pub fn is_x6(&self) -> bool { - *self == OVS_A::X6 + *self == Ovs::X6 } - #[doc = "Checks if the value of the field is `X4`"] + #[doc = "Quadruple speed with 4X oversampling in asynchronous mode"] #[inline(always)] pub fn is_x4(&self) -> bool { - *self == OVS_A::X4 + *self == Ovs::X4 } } #[doc = "Field `OVS` writer - Oversampling"] -pub type OVS_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, OVS_A, 2, O>; -impl<'a, const O: u8> OVS_W<'a, O> { +pub type OvsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Ovs, crate::Safe>; +impl<'a, REG> OvsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Regular UART mode with 16X oversampling in asynchronous mode"] #[inline(always)] - pub fn x16(self) -> &'a mut W { - self.variant(OVS_A::X16) + pub fn x16(self) -> &'a mut crate::W { + self.variant(Ovs::X16) } #[doc = "Double speed with 8X oversampling in asynchronous mode"] #[inline(always)] - pub fn x8(self) -> &'a mut W { - self.variant(OVS_A::X8) + pub fn x8(self) -> &'a mut crate::W { + self.variant(Ovs::X8) } #[doc = "6X oversampling in asynchronous mode"] #[inline(always)] - pub fn x6(self) -> &'a mut W { - self.variant(OVS_A::X6) + pub fn x6(self) -> &'a mut crate::W { + self.variant(Ovs::X6) } #[doc = "Quadruple speed with 4X oversampling in asynchronous mode"] #[inline(always)] - pub fn x4(self) -> &'a mut W { - self.variant(OVS_A::X4) + pub fn x4(self) -> &'a mut crate::W { + self.variant(Ovs::X4) } } -#[doc = "Field `CLKPOL` reader - Clock Polarity"] -pub type CLKPOL_R = crate::BitReader; #[doc = "Clock Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLKPOL_A { +pub enum Clkpol { #[doc = "0: The bus clock used in synchronous mode has a low base value"] - IDLELOW = 0, + Idlelow = 0, #[doc = "1: The bus clock used in synchronous mode has a high base value"] - IDLEHIGH = 1, + Idlehigh = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLKPOL_A) -> Self { + fn from(variant: Clkpol) -> Self { variant as u8 != 0 } } -impl CLKPOL_R { +#[doc = "Field `CLKPOL` reader - Clock Polarity"] +pub type ClkpolR = crate::BitReader; +impl ClkpolR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CLKPOL_A { + pub const fn variant(&self) -> Clkpol { match self.bits { - false => CLKPOL_A::IDLELOW, - true => CLKPOL_A::IDLEHIGH, + false => Clkpol::Idlelow, + true => Clkpol::Idlehigh, } } - #[doc = "Checks if the value of the field is `IDLELOW`"] + #[doc = "The bus clock used in synchronous mode has a low base value"] #[inline(always)] pub fn is_idlelow(&self) -> bool { - *self == CLKPOL_A::IDLELOW + *self == Clkpol::Idlelow } - #[doc = "Checks if the value of the field is `IDLEHIGH`"] + #[doc = "The bus clock used in synchronous mode has a high base value"] #[inline(always)] pub fn is_idlehigh(&self) -> bool { - *self == CLKPOL_A::IDLEHIGH + *self == Clkpol::Idlehigh } } #[doc = "Field `CLKPOL` writer - Clock Polarity"] -pub type CLKPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, CLKPOL_A, O>; -impl<'a, const O: u8> CLKPOL_W<'a, O> { +pub type ClkpolW<'a, REG> = crate::BitWriter<'a, REG, Clkpol>; +impl<'a, REG> ClkpolW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The bus clock used in synchronous mode has a low base value"] #[inline(always)] - pub fn idlelow(self) -> &'a mut W { - self.variant(CLKPOL_A::IDLELOW) + pub fn idlelow(self) -> &'a mut crate::W { + self.variant(Clkpol::Idlelow) } #[doc = "The bus clock used in synchronous mode has a high base value"] #[inline(always)] - pub fn idlehigh(self) -> &'a mut W { - self.variant(CLKPOL_A::IDLEHIGH) + pub fn idlehigh(self) -> &'a mut crate::W { + self.variant(Clkpol::Idlehigh) } } -#[doc = "Field `CLKPHA` reader - Clock Edge For Setup/Sample"] -pub type CLKPHA_R = crate::BitReader; #[doc = "Clock Edge For Setup/Sample\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLKPHA_A { +pub enum Clkpha { #[doc = "0: Data is sampled on the leading edge and set-up on the trailing edge of the bus clock in synchronous mode"] - SAMPLELEADING = 0, + Sampleleading = 0, #[doc = "1: Data is set-up on the leading edge and sampled on the trailing edge of the bus clock in synchronous mode"] - SAMPLETRAILING = 1, + Sampletrailing = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLKPHA_A) -> Self { + fn from(variant: Clkpha) -> Self { variant as u8 != 0 } } -impl CLKPHA_R { +#[doc = "Field `CLKPHA` reader - Clock Edge For Setup/Sample"] +pub type ClkphaR = crate::BitReader; +impl ClkphaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CLKPHA_A { + pub const fn variant(&self) -> Clkpha { match self.bits { - false => CLKPHA_A::SAMPLELEADING, - true => CLKPHA_A::SAMPLETRAILING, + false => Clkpha::Sampleleading, + true => Clkpha::Sampletrailing, } } - #[doc = "Checks if the value of the field is `SAMPLELEADING`"] + #[doc = "Data is sampled on the leading edge and set-up on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] pub fn is_sampleleading(&self) -> bool { - *self == CLKPHA_A::SAMPLELEADING + *self == Clkpha::Sampleleading } - #[doc = "Checks if the value of the field is `SAMPLETRAILING`"] + #[doc = "Data is set-up on the leading edge and sampled on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] pub fn is_sampletrailing(&self) -> bool { - *self == CLKPHA_A::SAMPLETRAILING + *self == Clkpha::Sampletrailing } } #[doc = "Field `CLKPHA` writer - Clock Edge For Setup/Sample"] -pub type CLKPHA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, CLKPHA_A, O>; -impl<'a, const O: u8> CLKPHA_W<'a, O> { +pub type ClkphaW<'a, REG> = crate::BitWriter<'a, REG, Clkpha>; +impl<'a, REG> ClkphaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Data is sampled on the leading edge and set-up on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] - pub fn sampleleading(self) -> &'a mut W { - self.variant(CLKPHA_A::SAMPLELEADING) + pub fn sampleleading(self) -> &'a mut crate::W { + self.variant(Clkpha::Sampleleading) } #[doc = "Data is set-up on the leading edge and sampled on the trailing edge of the bus clock in synchronous mode"] #[inline(always)] - pub fn sampletrailing(self) -> &'a mut W { - self.variant(CLKPHA_A::SAMPLETRAILING) + pub fn sampletrailing(self) -> &'a mut crate::W { + self.variant(Clkpha::Sampletrailing) } } -#[doc = "Field `MSBF` reader - Most Significant Bit First"] -pub type MSBF_R = crate::BitReader; #[doc = "Most Significant Bit First\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MSBF_A { +pub enum Msbf { #[doc = "0: Data is sent with the least significant bit first"] - DISABLE = 0, + Disable = 0, #[doc = "1: Data is sent with the most significant bit first"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MSBF_A) -> Self { + fn from(variant: Msbf) -> Self { variant as u8 != 0 } } -impl MSBF_R { +#[doc = "Field `MSBF` reader - Most Significant Bit First"] +pub type MsbfR = crate::BitReader; +impl MsbfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> MSBF_A { + pub const fn variant(&self) -> Msbf { match self.bits { - false => MSBF_A::DISABLE, - true => MSBF_A::ENABLE, + false => Msbf::Disable, + true => Msbf::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Data is sent with the least significant bit first"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == MSBF_A::DISABLE + *self == Msbf::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Data is sent with the most significant bit first"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == MSBF_A::ENABLE + *self == Msbf::Enable } } #[doc = "Field `MSBF` writer - Most Significant Bit First"] -pub type MSBF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, MSBF_A, O>; -impl<'a, const O: u8> MSBF_W<'a, O> { +pub type MsbfW<'a, REG> = crate::BitWriter<'a, REG, Msbf>; +impl<'a, REG> MsbfW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Data is sent with the least significant bit first"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(MSBF_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Msbf::Disable) } #[doc = "Data is sent with the most significant bit first"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(MSBF_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Msbf::Enable) } } -#[doc = "Field `CSMA` reader - Action On Chip Select In Main Mode"] -pub type CSMA_R = crate::BitReader; #[doc = "Action On Chip Select In Main Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CSMA_A { +pub enum Csma { #[doc = "0: No action taken"] - NOACTION = 0, + Noaction = 0, #[doc = "1: Go to secondary mode"] - GOTOSLAVEMODE = 1, + Gotoslavemode = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CSMA_A) -> Self { + fn from(variant: Csma) -> Self { variant as u8 != 0 } } -impl CSMA_R { +#[doc = "Field `CSMA` reader - Action On Chip Select In Main Mode"] +pub type CsmaR = crate::BitReader; +impl CsmaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CSMA_A { + pub const fn variant(&self) -> Csma { match self.bits { - false => CSMA_A::NOACTION, - true => CSMA_A::GOTOSLAVEMODE, + false => Csma::Noaction, + true => Csma::Gotoslavemode, } } - #[doc = "Checks if the value of the field is `NOACTION`"] + #[doc = "No action taken"] #[inline(always)] pub fn is_noaction(&self) -> bool { - *self == CSMA_A::NOACTION + *self == Csma::Noaction } - #[doc = "Checks if the value of the field is `GOTOSLAVEMODE`"] + #[doc = "Go to secondary mode"] #[inline(always)] pub fn is_gotoslavemode(&self) -> bool { - *self == CSMA_A::GOTOSLAVEMODE + *self == Csma::Gotoslavemode } } #[doc = "Field `CSMA` writer - Action On Chip Select In Main Mode"] -pub type CSMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, CSMA_A, O>; -impl<'a, const O: u8> CSMA_W<'a, O> { +pub type CsmaW<'a, REG> = crate::BitWriter<'a, REG, Csma>; +impl<'a, REG> CsmaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No action taken"] #[inline(always)] - pub fn noaction(self) -> &'a mut W { - self.variant(CSMA_A::NOACTION) + pub fn noaction(self) -> &'a mut crate::W { + self.variant(Csma::Noaction) } #[doc = "Go to secondary mode"] #[inline(always)] - pub fn gotoslavemode(self) -> &'a mut W { - self.variant(CSMA_A::GOTOSLAVEMODE) + pub fn gotoslavemode(self) -> &'a mut crate::W { + self.variant(Csma::Gotoslavemode) } } -#[doc = "Field `TXBIL` reader - TX Buffer Interrupt Level"] -pub type TXBIL_R = crate::BitReader; #[doc = "TX Buffer Interrupt Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TXBIL_A { +pub enum Txbil { #[doc = "0: TXBL and the TXBL interrupt flag are set when the transmit buffer becomes empty. TXBL is cleared when the buffer becomes nonempty."] - EMPTY = 0, + Empty = 0, #[doc = "1: TXBL and TXBLIF are set when the transmit buffer goes from full to half-full or empty. TXBL is cleared when the buffer becomes full."] - HALFFULL = 1, + Halffull = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TXBIL_A) -> Self { + fn from(variant: Txbil) -> Self { variant as u8 != 0 } } -impl TXBIL_R { +#[doc = "Field `TXBIL` reader - TX Buffer Interrupt Level"] +pub type TxbilR = crate::BitReader; +impl TxbilR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXBIL_A { + pub const fn variant(&self) -> Txbil { match self.bits { - false => TXBIL_A::EMPTY, - true => TXBIL_A::HALFFULL, + false => Txbil::Empty, + true => Txbil::Halffull, } } - #[doc = "Checks if the value of the field is `EMPTY`"] + #[doc = "TXBL and the TXBL interrupt flag are set when the transmit buffer becomes empty. TXBL is cleared when the buffer becomes nonempty."] #[inline(always)] pub fn is_empty(&self) -> bool { - *self == TXBIL_A::EMPTY + *self == Txbil::Empty } - #[doc = "Checks if the value of the field is `HALFFULL`"] + #[doc = "TXBL and TXBLIF are set when the transmit buffer goes from full to half-full or empty. TXBL is cleared when the buffer becomes full."] #[inline(always)] pub fn is_halffull(&self) -> bool { - *self == TXBIL_A::HALFFULL + *self == Txbil::Halffull } } #[doc = "Field `TXBIL` writer - TX Buffer Interrupt Level"] -pub type TXBIL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, TXBIL_A, O>; -impl<'a, const O: u8> TXBIL_W<'a, O> { +pub type TxbilW<'a, REG> = crate::BitWriter<'a, REG, Txbil>; +impl<'a, REG> TxbilW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "TXBL and the TXBL interrupt flag are set when the transmit buffer becomes empty. TXBL is cleared when the buffer becomes nonempty."] #[inline(always)] - pub fn empty(self) -> &'a mut W { - self.variant(TXBIL_A::EMPTY) + pub fn empty(self) -> &'a mut crate::W { + self.variant(Txbil::Empty) } #[doc = "TXBL and TXBLIF are set when the transmit buffer goes from full to half-full or empty. TXBL is cleared when the buffer becomes full."] #[inline(always)] - pub fn halffull(self) -> &'a mut W { - self.variant(TXBIL_A::HALFFULL) + pub fn halffull(self) -> &'a mut crate::W { + self.variant(Txbil::Halffull) } } -#[doc = "Field `RXINV` reader - Receiver Input Invert"] -pub type RXINV_R = crate::BitReader; #[doc = "Receiver Input Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RXINV_A { +pub enum Rxinv { #[doc = "0: Input is passed directly to the receiver"] - DISABLE = 0, + Disable = 0, #[doc = "1: Input is inverted before it is passed to the receiver"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RXINV_A) -> Self { + fn from(variant: Rxinv) -> Self { variant as u8 != 0 } } -impl RXINV_R { +#[doc = "Field `RXINV` reader - Receiver Input Invert"] +pub type RxinvR = crate::BitReader; +impl RxinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RXINV_A { + pub const fn variant(&self) -> Rxinv { match self.bits { - false => RXINV_A::DISABLE, - true => RXINV_A::ENABLE, + false => Rxinv::Disable, + true => Rxinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Input is passed directly to the receiver"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RXINV_A::DISABLE + *self == Rxinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Input is inverted before it is passed to the receiver"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RXINV_A::ENABLE + *self == Rxinv::Enable } } #[doc = "Field `RXINV` writer - Receiver Input Invert"] -pub type RXINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, RXINV_A, O>; -impl<'a, const O: u8> RXINV_W<'a, O> { +pub type RxinvW<'a, REG> = crate::BitWriter<'a, REG, Rxinv>; +impl<'a, REG> RxinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Input is passed directly to the receiver"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RXINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Rxinv::Disable) } #[doc = "Input is inverted before it is passed to the receiver"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RXINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Rxinv::Enable) } } -#[doc = "Field `TXINV` reader - Transmitter output Invert"] -pub type TXINV_R = crate::BitReader; #[doc = "Transmitter output Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TXINV_A { +pub enum Txinv { #[doc = "0: Output from the transmitter is passed unchanged to U(S)n_TX"] - DISABLE = 0, + Disable = 0, #[doc = "1: Output from the transmitter is inverted before it is passed to U(S)n_TX"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TXINV_A) -> Self { + fn from(variant: Txinv) -> Self { variant as u8 != 0 } } -impl TXINV_R { +#[doc = "Field `TXINV` reader - Transmitter output Invert"] +pub type TxinvR = crate::BitReader; +impl TxinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXINV_A { + pub const fn variant(&self) -> Txinv { match self.bits { - false => TXINV_A::DISABLE, - true => TXINV_A::ENABLE, + false => Txinv::Disable, + true => Txinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Output from the transmitter is passed unchanged to U(S)n_TX"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == TXINV_A::DISABLE + *self == Txinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Output from the transmitter is inverted before it is passed to U(S)n_TX"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == TXINV_A::ENABLE + *self == Txinv::Enable } } #[doc = "Field `TXINV` writer - Transmitter output Invert"] -pub type TXINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, TXINV_A, O>; -impl<'a, const O: u8> TXINV_W<'a, O> { +pub type TxinvW<'a, REG> = crate::BitWriter<'a, REG, Txinv>; +impl<'a, REG> TxinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Output from the transmitter is passed unchanged to U(S)n_TX"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(TXINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Txinv::Disable) } #[doc = "Output from the transmitter is inverted before it is passed to U(S)n_TX"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(TXINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Txinv::Enable) } } -#[doc = "Field `CSINV` reader - Chip Select Invert"] -pub type CSINV_R = crate::BitReader; #[doc = "Chip Select Invert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CSINV_A { +pub enum Csinv { #[doc = "0: Chip select is active low"] - DISABLE = 0, + Disable = 0, #[doc = "1: Chip select is active high"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CSINV_A) -> Self { + fn from(variant: Csinv) -> Self { variant as u8 != 0 } } -impl CSINV_R { +#[doc = "Field `CSINV` reader - Chip Select Invert"] +pub type CsinvR = crate::BitReader; +impl CsinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CSINV_A { + pub const fn variant(&self) -> Csinv { match self.bits { - false => CSINV_A::DISABLE, - true => CSINV_A::ENABLE, + false => Csinv::Disable, + true => Csinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Chip select is active low"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CSINV_A::DISABLE + *self == Csinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Chip select is active high"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CSINV_A::ENABLE + *self == Csinv::Enable } } #[doc = "Field `CSINV` writer - Chip Select Invert"] -pub type CSINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, CSINV_A, O>; -impl<'a, const O: u8> CSINV_W<'a, O> { +pub type CsinvW<'a, REG> = crate::BitWriter<'a, REG, Csinv>; +impl<'a, REG> CsinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Chip select is active low"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CSINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Csinv::Disable) } #[doc = "Chip select is active high"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CSINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Csinv::Enable) } } #[doc = "Field `AUTOCS` reader - Automatic Chip Select"] -pub type AUTOCS_R = crate::BitReader; +pub type AutocsR = crate::BitReader; #[doc = "Field `AUTOCS` writer - Automatic Chip Select"] -pub type AUTOCS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; -#[doc = "Field `AUTOTRI` reader - Automatic TX Tristate"] -pub type AUTOTRI_R = crate::BitReader; +pub type AutocsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Automatic TX Tristate\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AUTOTRI_A { +pub enum Autotri { #[doc = "0: The output on U(S)n_TX when the transmitter is idle is defined by TXINV"] - DISABLE = 0, + Disable = 0, #[doc = "1: U(S)n_TX is tristated whenever the transmitter is idle"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AUTOTRI_A) -> Self { + fn from(variant: Autotri) -> Self { variant as u8 != 0 } } -impl AUTOTRI_R { +#[doc = "Field `AUTOTRI` reader - Automatic TX Tristate"] +pub type AutotriR = crate::BitReader; +impl AutotriR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> AUTOTRI_A { + pub const fn variant(&self) -> Autotri { match self.bits { - false => AUTOTRI_A::DISABLE, - true => AUTOTRI_A::ENABLE, + false => Autotri::Disable, + true => Autotri::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The output on U(S)n_TX when the transmitter is idle is defined by TXINV"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == AUTOTRI_A::DISABLE + *self == Autotri::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "U(S)n_TX is tristated whenever the transmitter is idle"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == AUTOTRI_A::ENABLE + *self == Autotri::Enable } } #[doc = "Field `AUTOTRI` writer - Automatic TX Tristate"] -pub type AUTOTRI_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, AUTOTRI_A, O>; -impl<'a, const O: u8> AUTOTRI_W<'a, O> { +pub type AutotriW<'a, REG> = crate::BitWriter<'a, REG, Autotri>; +impl<'a, REG> AutotriW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The output on U(S)n_TX when the transmitter is idle is defined by TXINV"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(AUTOTRI_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Autotri::Disable) } #[doc = "U(S)n_TX is tristated whenever the transmitter is idle"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(AUTOTRI_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Autotri::Enable) } } #[doc = "Field `SCMODE` reader - SmartCard Mode"] -pub type SCMODE_R = crate::BitReader; +pub type ScmodeR = crate::BitReader; #[doc = "Field `SCMODE` writer - SmartCard Mode"] -pub type SCMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type ScmodeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCRETRANS` reader - SmartCard Retransmit"] -pub type SCRETRANS_R = crate::BitReader; +pub type ScretransR = crate::BitReader; #[doc = "Field `SCRETRANS` writer - SmartCard Retransmit"] -pub type SCRETRANS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type ScretransW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SKIPPERRF` reader - Skip Parity Error Frames"] -pub type SKIPPERRF_R = crate::BitReader; +pub type SkipperrfR = crate::BitReader; #[doc = "Field `SKIPPERRF` writer - Skip Parity Error Frames"] -pub type SKIPPERRF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type SkipperrfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BIT8DV` reader - Bit 8 Default Value"] -pub type BIT8DV_R = crate::BitReader; +pub type Bit8dvR = crate::BitReader; #[doc = "Field `BIT8DV` writer - Bit 8 Default Value"] -pub type BIT8DV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; -#[doc = "Field `ERRSDMA` reader - Halt DMA On Error"] -pub type ERRSDMA_R = crate::BitReader; +pub type Bit8dvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Halt DMA On Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRSDMA_A { +pub enum Errsdma { #[doc = "0: Framing and parity errors have no effect on DMA requests from the USART"] - DISABLE = 0, + Disable = 0, #[doc = "1: DMA requests from the USART are blocked while the PERR or FERR interrupt flags are set"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRSDMA_A) -> Self { + fn from(variant: Errsdma) -> Self { variant as u8 != 0 } } -impl ERRSDMA_R { +#[doc = "Field `ERRSDMA` reader - Halt DMA On Error"] +pub type ErrsdmaR = crate::BitReader; +impl ErrsdmaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ERRSDMA_A { + pub const fn variant(&self) -> Errsdma { match self.bits { - false => ERRSDMA_A::DISABLE, - true => ERRSDMA_A::ENABLE, + false => Errsdma::Disable, + true => Errsdma::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Framing and parity errors have no effect on DMA requests from the USART"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ERRSDMA_A::DISABLE + *self == Errsdma::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "DMA requests from the USART are blocked while the PERR or FERR interrupt flags are set"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ERRSDMA_A::ENABLE + *self == Errsdma::Enable } } #[doc = "Field `ERRSDMA` writer - Halt DMA On Error"] -pub type ERRSDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, ERRSDMA_A, O>; -impl<'a, const O: u8> ERRSDMA_W<'a, O> { +pub type ErrsdmaW<'a, REG> = crate::BitWriter<'a, REG, Errsdma>; +impl<'a, REG> ErrsdmaW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Framing and parity errors have no effect on DMA requests from the USART"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ERRSDMA_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Errsdma::Disable) } #[doc = "DMA requests from the USART are blocked while the PERR or FERR interrupt flags are set"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ERRSDMA_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Errsdma::Enable) } } -#[doc = "Field `ERRSRX` reader - Disable RX On Error"] -pub type ERRSRX_R = crate::BitReader; #[doc = "Disable RX On Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRSRX_A { +pub enum Errsrx { #[doc = "0: Framing and parity errors have no effect on receiver"] - DISABLE = 0, + Disable = 0, #[doc = "1: Framing and parity errors disable the receiver"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRSRX_A) -> Self { + fn from(variant: Errsrx) -> Self { variant as u8 != 0 } } -impl ERRSRX_R { +#[doc = "Field `ERRSRX` reader - Disable RX On Error"] +pub type ErrsrxR = crate::BitReader; +impl ErrsrxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ERRSRX_A { + pub const fn variant(&self) -> Errsrx { match self.bits { - false => ERRSRX_A::DISABLE, - true => ERRSRX_A::ENABLE, + false => Errsrx::Disable, + true => Errsrx::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Framing and parity errors have no effect on receiver"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ERRSRX_A::DISABLE + *self == Errsrx::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Framing and parity errors disable the receiver"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ERRSRX_A::ENABLE + *self == Errsrx::Enable } } #[doc = "Field `ERRSRX` writer - Disable RX On Error"] -pub type ERRSRX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, ERRSRX_A, O>; -impl<'a, const O: u8> ERRSRX_W<'a, O> { +pub type ErrsrxW<'a, REG> = crate::BitWriter<'a, REG, Errsrx>; +impl<'a, REG> ErrsrxW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Framing and parity errors have no effect on receiver"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ERRSRX_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Errsrx::Disable) } #[doc = "Framing and parity errors disable the receiver"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ERRSRX_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Errsrx::Enable) } } -#[doc = "Field `ERRSTX` reader - Disable TX On Error"] -pub type ERRSTX_R = crate::BitReader; #[doc = "Disable TX On Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRSTX_A { +pub enum Errstx { #[doc = "0: Received framing and parity errors have no effect on transmitter"] - DISABLE = 0, + Disable = 0, #[doc = "1: Received framing and parity errors disable the transmitter"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRSTX_A) -> Self { + fn from(variant: Errstx) -> Self { variant as u8 != 0 } } -impl ERRSTX_R { +#[doc = "Field `ERRSTX` reader - Disable TX On Error"] +pub type ErrstxR = crate::BitReader; +impl ErrstxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ERRSTX_A { + pub const fn variant(&self) -> Errstx { match self.bits { - false => ERRSTX_A::DISABLE, - true => ERRSTX_A::ENABLE, + false => Errstx::Disable, + true => Errstx::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Received framing and parity errors have no effect on transmitter"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == ERRSTX_A::DISABLE + *self == Errstx::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Received framing and parity errors disable the transmitter"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == ERRSTX_A::ENABLE + *self == Errstx::Enable } } #[doc = "Field `ERRSTX` writer - Disable TX On Error"] -pub type ERRSTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, ERRSTX_A, O>; -impl<'a, const O: u8> ERRSTX_W<'a, O> { +pub type ErrstxW<'a, REG> = crate::BitWriter<'a, REG, Errstx>; +impl<'a, REG> ErrstxW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Received framing and parity errors have no effect on transmitter"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(ERRSTX_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Errstx::Disable) } #[doc = "Received framing and parity errors disable the transmitter"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(ERRSTX_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Errstx::Enable) } } #[doc = "Field `SSSEARLY` reader - Synchronous Secondary Setup Early"] -pub type SSSEARLY_R = crate::BitReader; +pub type SssearlyR = crate::BitReader; #[doc = "Field `SSSEARLY` writer - Synchronous Secondary Setup Early"] -pub type SSSEARLY_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; -#[doc = "Field `BYTESWAP` reader - Byteswap In Double Accesses"] -pub type BYTESWAP_R = crate::BitReader; +pub type SssearlyW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Byteswap In Double Accesses\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BYTESWAP_A { +pub enum Byteswap { #[doc = "0: Normal byte order"] - DISABLE = 0, + Disable = 0, #[doc = "1: Byte order swapped"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BYTESWAP_A) -> Self { + fn from(variant: Byteswap) -> Self { variant as u8 != 0 } } -impl BYTESWAP_R { +#[doc = "Field `BYTESWAP` reader - Byteswap In Double Accesses"] +pub type ByteswapR = crate::BitReader; +impl ByteswapR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> BYTESWAP_A { + pub const fn variant(&self) -> Byteswap { match self.bits { - false => BYTESWAP_A::DISABLE, - true => BYTESWAP_A::ENABLE, + false => Byteswap::Disable, + true => Byteswap::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Normal byte order"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == BYTESWAP_A::DISABLE + *self == Byteswap::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Byte order swapped"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == BYTESWAP_A::ENABLE + *self == Byteswap::Enable } } #[doc = "Field `BYTESWAP` writer - Byteswap In Double Accesses"] -pub type BYTESWAP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, BYTESWAP_A, O>; -impl<'a, const O: u8> BYTESWAP_W<'a, O> { +pub type ByteswapW<'a, REG> = crate::BitWriter<'a, REG, Byteswap>; +impl<'a, REG> ByteswapW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Normal byte order"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(BYTESWAP_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Byteswap::Disable) } #[doc = "Byte order swapped"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(BYTESWAP_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Byteswap::Enable) } } #[doc = "Field `AUTOTX` reader - Always Transmit When RX Not Full"] -pub type AUTOTX_R = crate::BitReader; +pub type AutotxR = crate::BitReader; #[doc = "Field `AUTOTX` writer - Always Transmit When RX Not Full"] -pub type AUTOTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type AutotxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MVDIS` reader - Majority Vote Disable"] -pub type MVDIS_R = crate::BitReader; +pub type MvdisR = crate::BitReader; #[doc = "Field `MVDIS` writer - Majority Vote Disable"] -pub type MVDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type MvdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SMSDELAY` reader - Synchronous Main Sample Delay"] -pub type SMSDELAY_R = crate::BitReader; +pub type SmsdelayR = crate::BitReader; #[doc = "Field `SMSDELAY` writer - Synchronous Main Sample Delay"] -pub type SMSDELAY_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>; +pub type SmsdelayW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - USART Synchronous Mode"] #[inline(always)] - pub fn sync(&self) -> SYNC_R { - SYNC_R::new((self.bits & 1) != 0) + pub fn sync(&self) -> SyncR { + SyncR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Loopback Enable"] #[inline(always)] - pub fn loopbk(&self) -> LOOPBK_R { - LOOPBK_R::new(((self.bits >> 1) & 1) != 0) + pub fn loopbk(&self) -> LoopbkR { + LoopbkR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Collision Check Enable"] #[inline(always)] - pub fn ccen(&self) -> CCEN_R { - CCEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn ccen(&self) -> CcenR { + CcenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Multi-Processor Mode"] #[inline(always)] - pub fn mpm(&self) -> MPM_R { - MPM_R::new(((self.bits >> 3) & 1) != 0) + pub fn mpm(&self) -> MpmR { + MpmR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Multi-Processor Address-Bit"] #[inline(always)] - pub fn mpab(&self) -> MPAB_R { - MPAB_R::new(((self.bits >> 4) & 1) != 0) + pub fn mpab(&self) -> MpabR { + MpabR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 5:6 - Oversampling"] #[inline(always)] - pub fn ovs(&self) -> OVS_R { - OVS_R::new(((self.bits >> 5) & 3) as u8) + pub fn ovs(&self) -> OvsR { + OvsR::new(((self.bits >> 5) & 3) as u8) } #[doc = "Bit 8 - Clock Polarity"] #[inline(always)] - pub fn clkpol(&self) -> CLKPOL_R { - CLKPOL_R::new(((self.bits >> 8) & 1) != 0) + pub fn clkpol(&self) -> ClkpolR { + ClkpolR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Clock Edge For Setup/Sample"] #[inline(always)] - pub fn clkpha(&self) -> CLKPHA_R { - CLKPHA_R::new(((self.bits >> 9) & 1) != 0) + pub fn clkpha(&self) -> ClkphaR { + ClkphaR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Most Significant Bit First"] #[inline(always)] - pub fn msbf(&self) -> MSBF_R { - MSBF_R::new(((self.bits >> 10) & 1) != 0) + pub fn msbf(&self) -> MsbfR { + MsbfR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Action On Chip Select In Main Mode"] #[inline(always)] - pub fn csma(&self) -> CSMA_R { - CSMA_R::new(((self.bits >> 11) & 1) != 0) + pub fn csma(&self) -> CsmaR { + CsmaR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - TX Buffer Interrupt Level"] #[inline(always)] - pub fn txbil(&self) -> TXBIL_R { - TXBIL_R::new(((self.bits >> 12) & 1) != 0) + pub fn txbil(&self) -> TxbilR { + TxbilR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Receiver Input Invert"] #[inline(always)] - pub fn rxinv(&self) -> RXINV_R { - RXINV_R::new(((self.bits >> 13) & 1) != 0) + pub fn rxinv(&self) -> RxinvR { + RxinvR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Transmitter output Invert"] #[inline(always)] - pub fn txinv(&self) -> TXINV_R { - TXINV_R::new(((self.bits >> 14) & 1) != 0) + pub fn txinv(&self) -> TxinvR { + TxinvR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Chip Select Invert"] #[inline(always)] - pub fn csinv(&self) -> CSINV_R { - CSINV_R::new(((self.bits >> 15) & 1) != 0) + pub fn csinv(&self) -> CsinvR { + CsinvR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Automatic Chip Select"] #[inline(always)] - pub fn autocs(&self) -> AUTOCS_R { - AUTOCS_R::new(((self.bits >> 16) & 1) != 0) + pub fn autocs(&self) -> AutocsR { + AutocsR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Automatic TX Tristate"] #[inline(always)] - pub fn autotri(&self) -> AUTOTRI_R { - AUTOTRI_R::new(((self.bits >> 17) & 1) != 0) + pub fn autotri(&self) -> AutotriR { + AutotriR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - SmartCard Mode"] #[inline(always)] - pub fn scmode(&self) -> SCMODE_R { - SCMODE_R::new(((self.bits >> 18) & 1) != 0) + pub fn scmode(&self) -> ScmodeR { + ScmodeR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - SmartCard Retransmit"] #[inline(always)] - pub fn scretrans(&self) -> SCRETRANS_R { - SCRETRANS_R::new(((self.bits >> 19) & 1) != 0) + pub fn scretrans(&self) -> ScretransR { + ScretransR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Skip Parity Error Frames"] #[inline(always)] - pub fn skipperrf(&self) -> SKIPPERRF_R { - SKIPPERRF_R::new(((self.bits >> 20) & 1) != 0) + pub fn skipperrf(&self) -> SkipperrfR { + SkipperrfR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Bit 8 Default Value"] #[inline(always)] - pub fn bit8dv(&self) -> BIT8DV_R { - BIT8DV_R::new(((self.bits >> 21) & 1) != 0) + pub fn bit8dv(&self) -> Bit8dvR { + Bit8dvR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Halt DMA On Error"] #[inline(always)] - pub fn errsdma(&self) -> ERRSDMA_R { - ERRSDMA_R::new(((self.bits >> 22) & 1) != 0) + pub fn errsdma(&self) -> ErrsdmaR { + ErrsdmaR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Disable RX On Error"] #[inline(always)] - pub fn errsrx(&self) -> ERRSRX_R { - ERRSRX_R::new(((self.bits >> 23) & 1) != 0) + pub fn errsrx(&self) -> ErrsrxR { + ErrsrxR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - Disable TX On Error"] #[inline(always)] - pub fn errstx(&self) -> ERRSTX_R { - ERRSTX_R::new(((self.bits >> 24) & 1) != 0) + pub fn errstx(&self) -> ErrstxR { + ErrstxR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Synchronous Secondary Setup Early"] #[inline(always)] - pub fn sssearly(&self) -> SSSEARLY_R { - SSSEARLY_R::new(((self.bits >> 25) & 1) != 0) + pub fn sssearly(&self) -> SssearlyR { + SssearlyR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 28 - Byteswap In Double Accesses"] #[inline(always)] - pub fn byteswap(&self) -> BYTESWAP_R { - BYTESWAP_R::new(((self.bits >> 28) & 1) != 0) + pub fn byteswap(&self) -> ByteswapR { + ByteswapR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Always Transmit When RX Not Full"] #[inline(always)] - pub fn autotx(&self) -> AUTOTX_R { - AUTOTX_R::new(((self.bits >> 29) & 1) != 0) + pub fn autotx(&self) -> AutotxR { + AutotxR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Majority Vote Disable"] #[inline(always)] - pub fn mvdis(&self) -> MVDIS_R { - MVDIS_R::new(((self.bits >> 30) & 1) != 0) + pub fn mvdis(&self) -> MvdisR { + MvdisR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Synchronous Main Sample Delay"] #[inline(always)] - pub fn smsdelay(&self) -> SMSDELAY_R { - SMSDELAY_R::new(((self.bits >> 31) & 1) != 0) + pub fn smsdelay(&self) -> SmsdelayR { + SmsdelayR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - USART Synchronous Mode"] #[inline(always)] #[must_use] - pub fn sync(&mut self) -> SYNC_W<0> { - SYNC_W::new(self) + pub fn sync(&mut self) -> SyncW { + SyncW::new(self, 0) } #[doc = "Bit 1 - Loopback Enable"] #[inline(always)] #[must_use] - pub fn loopbk(&mut self) -> LOOPBK_W<1> { - LOOPBK_W::new(self) + pub fn loopbk(&mut self) -> LoopbkW { + LoopbkW::new(self, 1) } #[doc = "Bit 2 - Collision Check Enable"] #[inline(always)] #[must_use] - pub fn ccen(&mut self) -> CCEN_W<2> { - CCEN_W::new(self) + pub fn ccen(&mut self) -> CcenW { + CcenW::new(self, 2) } #[doc = "Bit 3 - Multi-Processor Mode"] #[inline(always)] #[must_use] - pub fn mpm(&mut self) -> MPM_W<3> { - MPM_W::new(self) + pub fn mpm(&mut self) -> MpmW { + MpmW::new(self, 3) } #[doc = "Bit 4 - Multi-Processor Address-Bit"] #[inline(always)] #[must_use] - pub fn mpab(&mut self) -> MPAB_W<4> { - MPAB_W::new(self) + pub fn mpab(&mut self) -> MpabW { + MpabW::new(self, 4) } #[doc = "Bits 5:6 - Oversampling"] #[inline(always)] #[must_use] - pub fn ovs(&mut self) -> OVS_W<5> { - OVS_W::new(self) + pub fn ovs(&mut self) -> OvsW { + OvsW::new(self, 5) } #[doc = "Bit 8 - Clock Polarity"] #[inline(always)] #[must_use] - pub fn clkpol(&mut self) -> CLKPOL_W<8> { - CLKPOL_W::new(self) + pub fn clkpol(&mut self) -> ClkpolW { + ClkpolW::new(self, 8) } #[doc = "Bit 9 - Clock Edge For Setup/Sample"] #[inline(always)] #[must_use] - pub fn clkpha(&mut self) -> CLKPHA_W<9> { - CLKPHA_W::new(self) + pub fn clkpha(&mut self) -> ClkphaW { + ClkphaW::new(self, 9) } #[doc = "Bit 10 - Most Significant Bit First"] #[inline(always)] #[must_use] - pub fn msbf(&mut self) -> MSBF_W<10> { - MSBF_W::new(self) + pub fn msbf(&mut self) -> MsbfW { + MsbfW::new(self, 10) } #[doc = "Bit 11 - Action On Chip Select In Main Mode"] #[inline(always)] #[must_use] - pub fn csma(&mut self) -> CSMA_W<11> { - CSMA_W::new(self) + pub fn csma(&mut self) -> CsmaW { + CsmaW::new(self, 11) } #[doc = "Bit 12 - TX Buffer Interrupt Level"] #[inline(always)] #[must_use] - pub fn txbil(&mut self) -> TXBIL_W<12> { - TXBIL_W::new(self) + pub fn txbil(&mut self) -> TxbilW { + TxbilW::new(self, 12) } #[doc = "Bit 13 - Receiver Input Invert"] #[inline(always)] #[must_use] - pub fn rxinv(&mut self) -> RXINV_W<13> { - RXINV_W::new(self) + pub fn rxinv(&mut self) -> RxinvW { + RxinvW::new(self, 13) } #[doc = "Bit 14 - Transmitter output Invert"] #[inline(always)] #[must_use] - pub fn txinv(&mut self) -> TXINV_W<14> { - TXINV_W::new(self) + pub fn txinv(&mut self) -> TxinvW { + TxinvW::new(self, 14) } #[doc = "Bit 15 - Chip Select Invert"] #[inline(always)] #[must_use] - pub fn csinv(&mut self) -> CSINV_W<15> { - CSINV_W::new(self) + pub fn csinv(&mut self) -> CsinvW { + CsinvW::new(self, 15) } #[doc = "Bit 16 - Automatic Chip Select"] #[inline(always)] #[must_use] - pub fn autocs(&mut self) -> AUTOCS_W<16> { - AUTOCS_W::new(self) + pub fn autocs(&mut self) -> AutocsW { + AutocsW::new(self, 16) } #[doc = "Bit 17 - Automatic TX Tristate"] #[inline(always)] #[must_use] - pub fn autotri(&mut self) -> AUTOTRI_W<17> { - AUTOTRI_W::new(self) + pub fn autotri(&mut self) -> AutotriW { + AutotriW::new(self, 17) } #[doc = "Bit 18 - SmartCard Mode"] #[inline(always)] #[must_use] - pub fn scmode(&mut self) -> SCMODE_W<18> { - SCMODE_W::new(self) + pub fn scmode(&mut self) -> ScmodeW { + ScmodeW::new(self, 18) } #[doc = "Bit 19 - SmartCard Retransmit"] #[inline(always)] #[must_use] - pub fn scretrans(&mut self) -> SCRETRANS_W<19> { - SCRETRANS_W::new(self) + pub fn scretrans(&mut self) -> ScretransW { + ScretransW::new(self, 19) } #[doc = "Bit 20 - Skip Parity Error Frames"] #[inline(always)] #[must_use] - pub fn skipperrf(&mut self) -> SKIPPERRF_W<20> { - SKIPPERRF_W::new(self) + pub fn skipperrf(&mut self) -> SkipperrfW { + SkipperrfW::new(self, 20) } #[doc = "Bit 21 - Bit 8 Default Value"] #[inline(always)] #[must_use] - pub fn bit8dv(&mut self) -> BIT8DV_W<21> { - BIT8DV_W::new(self) + pub fn bit8dv(&mut self) -> Bit8dvW { + Bit8dvW::new(self, 21) } #[doc = "Bit 22 - Halt DMA On Error"] #[inline(always)] #[must_use] - pub fn errsdma(&mut self) -> ERRSDMA_W<22> { - ERRSDMA_W::new(self) + pub fn errsdma(&mut self) -> ErrsdmaW { + ErrsdmaW::new(self, 22) } #[doc = "Bit 23 - Disable RX On Error"] #[inline(always)] #[must_use] - pub fn errsrx(&mut self) -> ERRSRX_W<23> { - ERRSRX_W::new(self) + pub fn errsrx(&mut self) -> ErrsrxW { + ErrsrxW::new(self, 23) } #[doc = "Bit 24 - Disable TX On Error"] #[inline(always)] #[must_use] - pub fn errstx(&mut self) -> ERRSTX_W<24> { - ERRSTX_W::new(self) + pub fn errstx(&mut self) -> ErrstxW { + ErrstxW::new(self, 24) } #[doc = "Bit 25 - Synchronous Secondary Setup Early"] #[inline(always)] #[must_use] - pub fn sssearly(&mut self) -> SSSEARLY_W<25> { - SSSEARLY_W::new(self) + pub fn sssearly(&mut self) -> SssearlyW { + SssearlyW::new(self, 25) } #[doc = "Bit 28 - Byteswap In Double Accesses"] #[inline(always)] #[must_use] - pub fn byteswap(&mut self) -> BYTESWAP_W<28> { - BYTESWAP_W::new(self) + pub fn byteswap(&mut self) -> ByteswapW { + ByteswapW::new(self, 28) } #[doc = "Bit 29 - Always Transmit When RX Not Full"] #[inline(always)] #[must_use] - pub fn autotx(&mut self) -> AUTOTX_W<29> { - AUTOTX_W::new(self) + pub fn autotx(&mut self) -> AutotxW { + AutotxW::new(self, 29) } #[doc = "Bit 30 - Majority Vote Disable"] #[inline(always)] #[must_use] - pub fn mvdis(&mut self) -> MVDIS_W<30> { - MVDIS_W::new(self) + pub fn mvdis(&mut self) -> MvdisW { + MvdisW::new(self, 30) } #[doc = "Bit 31 - Synchronous Main Sample Delay"] #[inline(always)] #[must_use] - pub fn smsdelay(&mut self) -> SMSDELAY_W<31> { - SMSDELAY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn smsdelay(&mut self) -> SmsdelayW { + SmsdelayW::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] -pub struct CTRL_SPEC; -impl crate::RegisterSpec for CTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlSpec; +impl crate::RegisterSpec for CtrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrl::R](R) reader structure"] -impl crate::Readable for CTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] -impl crate::Writable for CTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CtrlSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CtrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRL to value 0"] -impl crate::Resettable for CTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/ctrlx.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/ctrlx.rs index ddc1730..c7b4735 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/ctrlx.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/ctrlx.rs @@ -1,339 +1,311 @@ #[doc = "Register `CTRLX` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CTRLX` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DBGHALT` reader - Debug halt"] -pub type DBGHALT_R = crate::BitReader; +pub type W = crate::W; #[doc = "Debug halt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DBGHALT_A { +pub enum Dbghalt { #[doc = "0: Continue to transmit until TX buffer is empty"] - DISABLE = 0, + Disable = 0, #[doc = "1: Negate RTS to stop link partner's transmission during debug HALT. NOTE** The core clock should be equal to or faster than the peripheral clock; otherwise, each single step could transmit multiple frames instead of just transmitting one frame."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DBGHALT_A) -> Self { + fn from(variant: Dbghalt) -> Self { variant as u8 != 0 } } -impl DBGHALT_R { +#[doc = "Field `DBGHALT` reader - Debug halt"] +pub type DbghaltR = crate::BitReader; +impl DbghaltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DBGHALT_A { + pub const fn variant(&self) -> Dbghalt { match self.bits { - false => DBGHALT_A::DISABLE, - true => DBGHALT_A::ENABLE, + false => Dbghalt::Disable, + true => Dbghalt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Continue to transmit until TX buffer is empty"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == DBGHALT_A::DISABLE + *self == Dbghalt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Negate RTS to stop link partner's transmission during debug HALT. NOTE** The core clock should be equal to or faster than the peripheral clock; otherwise, each single step could transmit multiple frames instead of just transmitting one frame."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == DBGHALT_A::ENABLE + *self == Dbghalt::Enable } } #[doc = "Field `DBGHALT` writer - Debug halt"] -pub type DBGHALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLX_SPEC, DBGHALT_A, O>; -impl<'a, const O: u8> DBGHALT_W<'a, O> { +pub type DbghaltW<'a, REG> = crate::BitWriter<'a, REG, Dbghalt>; +impl<'a, REG> DbghaltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Continue to transmit until TX buffer is empty"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(DBGHALT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Dbghalt::Disable) } #[doc = "Negate RTS to stop link partner's transmission during debug HALT. NOTE** The core clock should be equal to or faster than the peripheral clock; otherwise, each single step could transmit multiple frames instead of just transmitting one frame."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(DBGHALT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Dbghalt::Enable) } } -#[doc = "Field `CTSINV` reader - CTS Pin Inversion"] -pub type CTSINV_R = crate::BitReader; #[doc = "CTS Pin Inversion\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CTSINV_A { +pub enum Ctsinv { #[doc = "0: The USn_CTS pin is low true"] - DISABLE = 0, + Disable = 0, #[doc = "1: The USn_CTS pin is high true"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CTSINV_A) -> Self { + fn from(variant: Ctsinv) -> Self { variant as u8 != 0 } } -impl CTSINV_R { +#[doc = "Field `CTSINV` reader - CTS Pin Inversion"] +pub type CtsinvR = crate::BitReader; +impl CtsinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CTSINV_A { + pub const fn variant(&self) -> Ctsinv { match self.bits { - false => CTSINV_A::DISABLE, - true => CTSINV_A::ENABLE, + false => Ctsinv::Disable, + true => Ctsinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The USn_CTS pin is low true"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CTSINV_A::DISABLE + *self == Ctsinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The USn_CTS pin is high true"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CTSINV_A::ENABLE + *self == Ctsinv::Enable } } #[doc = "Field `CTSINV` writer - CTS Pin Inversion"] -pub type CTSINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLX_SPEC, CTSINV_A, O>; -impl<'a, const O: u8> CTSINV_W<'a, O> { +pub type CtsinvW<'a, REG> = crate::BitWriter<'a, REG, Ctsinv>; +impl<'a, REG> CtsinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The USn_CTS pin is low true"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CTSINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ctsinv::Disable) } #[doc = "The USn_CTS pin is high true"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CTSINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Ctsinv::Enable) } } -#[doc = "Field `CTSEN` reader - CTS Function enabled"] -pub type CTSEN_R = crate::BitReader; #[doc = "CTS Function enabled\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CTSEN_A { +pub enum Ctsen { #[doc = "0: Ingore CTS"] - DISABLE = 0, + Disable = 0, #[doc = "1: Stop transmitting when CTS is negated"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CTSEN_A) -> Self { + fn from(variant: Ctsen) -> Self { variant as u8 != 0 } } -impl CTSEN_R { +#[doc = "Field `CTSEN` reader - CTS Function enabled"] +pub type CtsenR = crate::BitReader; +impl CtsenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CTSEN_A { + pub const fn variant(&self) -> Ctsen { match self.bits { - false => CTSEN_A::DISABLE, - true => CTSEN_A::ENABLE, + false => Ctsen::Disable, + true => Ctsen::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Ingore CTS"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == CTSEN_A::DISABLE + *self == Ctsen::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Stop transmitting when CTS is negated"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == CTSEN_A::ENABLE + *self == Ctsen::Enable } } #[doc = "Field `CTSEN` writer - CTS Function enabled"] -pub type CTSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLX_SPEC, CTSEN_A, O>; -impl<'a, const O: u8> CTSEN_W<'a, O> { +pub type CtsenW<'a, REG> = crate::BitWriter<'a, REG, Ctsen>; +impl<'a, REG> CtsenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Ingore CTS"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(CTSEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Ctsen::Disable) } #[doc = "Stop transmitting when CTS is negated"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(CTSEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Ctsen::Enable) } } -#[doc = "Field `RTSINV` reader - RTS Pin Inversion"] -pub type RTSINV_R = crate::BitReader; #[doc = "RTS Pin Inversion\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTSINV_A { +pub enum Rtsinv { #[doc = "0: The USn_RTS pin is low true"] - DISABLE = 0, + Disable = 0, #[doc = "1: The USn_RTS pin is high true"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTSINV_A) -> Self { + fn from(variant: Rtsinv) -> Self { variant as u8 != 0 } } -impl RTSINV_R { +#[doc = "Field `RTSINV` reader - RTS Pin Inversion"] +pub type RtsinvR = crate::BitReader; +impl RtsinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RTSINV_A { + pub const fn variant(&self) -> Rtsinv { match self.bits { - false => RTSINV_A::DISABLE, - true => RTSINV_A::ENABLE, + false => Rtsinv::Disable, + true => Rtsinv::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "The USn_RTS pin is low true"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RTSINV_A::DISABLE + *self == Rtsinv::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "The USn_RTS pin is high true"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RTSINV_A::ENABLE + *self == Rtsinv::Enable } } #[doc = "Field `RTSINV` writer - RTS Pin Inversion"] -pub type RTSINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLX_SPEC, RTSINV_A, O>; -impl<'a, const O: u8> RTSINV_W<'a, O> { +pub type RtsinvW<'a, REG> = crate::BitWriter<'a, REG, Rtsinv>; +impl<'a, REG> RtsinvW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "The USn_RTS pin is low true"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RTSINV_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Rtsinv::Disable) } #[doc = "The USn_RTS pin is high true"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RTSINV_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Rtsinv::Enable) } } #[doc = "Field `RXPRSEN` reader - PRS RX Enable"] -pub type RXPRSEN_R = crate::BitReader; +pub type RxprsenR = crate::BitReader; #[doc = "Field `RXPRSEN` writer - PRS RX Enable"] -pub type RXPRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLX_SPEC, bool, O>; +pub type RxprsenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CLKPRSEN` reader - PRS CLK Enable"] -pub type CLKPRSEN_R = crate::BitReader; +pub type ClkprsenR = crate::BitReader; #[doc = "Field `CLKPRSEN` writer - PRS CLK Enable"] -pub type CLKPRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLX_SPEC, bool, O>; +pub type ClkprsenW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Debug halt"] #[inline(always)] - pub fn dbghalt(&self) -> DBGHALT_R { - DBGHALT_R::new((self.bits & 1) != 0) + pub fn dbghalt(&self) -> DbghaltR { + DbghaltR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CTS Pin Inversion"] #[inline(always)] - pub fn ctsinv(&self) -> CTSINV_R { - CTSINV_R::new(((self.bits >> 1) & 1) != 0) + pub fn ctsinv(&self) -> CtsinvR { + CtsinvR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CTS Function enabled"] #[inline(always)] - pub fn ctsen(&self) -> CTSEN_R { - CTSEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn ctsen(&self) -> CtsenR { + CtsenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - RTS Pin Inversion"] #[inline(always)] - pub fn rtsinv(&self) -> RTSINV_R { - RTSINV_R::new(((self.bits >> 3) & 1) != 0) + pub fn rtsinv(&self) -> RtsinvR { + RtsinvR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 7 - PRS RX Enable"] #[inline(always)] - pub fn rxprsen(&self) -> RXPRSEN_R { - RXPRSEN_R::new(((self.bits >> 7) & 1) != 0) + pub fn rxprsen(&self) -> RxprsenR { + RxprsenR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 15 - PRS CLK Enable"] #[inline(always)] - pub fn clkprsen(&self) -> CLKPRSEN_R { - CLKPRSEN_R::new(((self.bits >> 15) & 1) != 0) + pub fn clkprsen(&self) -> ClkprsenR { + ClkprsenR::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Debug halt"] #[inline(always)] #[must_use] - pub fn dbghalt(&mut self) -> DBGHALT_W<0> { - DBGHALT_W::new(self) + pub fn dbghalt(&mut self) -> DbghaltW { + DbghaltW::new(self, 0) } #[doc = "Bit 1 - CTS Pin Inversion"] #[inline(always)] #[must_use] - pub fn ctsinv(&mut self) -> CTSINV_W<1> { - CTSINV_W::new(self) + pub fn ctsinv(&mut self) -> CtsinvW { + CtsinvW::new(self, 1) } #[doc = "Bit 2 - CTS Function enabled"] #[inline(always)] #[must_use] - pub fn ctsen(&mut self) -> CTSEN_W<2> { - CTSEN_W::new(self) + pub fn ctsen(&mut self) -> CtsenW { + CtsenW::new(self, 2) } #[doc = "Bit 3 - RTS Pin Inversion"] #[inline(always)] #[must_use] - pub fn rtsinv(&mut self) -> RTSINV_W<3> { - RTSINV_W::new(self) + pub fn rtsinv(&mut self) -> RtsinvW { + RtsinvW::new(self, 3) } #[doc = "Bit 7 - PRS RX Enable"] #[inline(always)] #[must_use] - pub fn rxprsen(&mut self) -> RXPRSEN_W<7> { - RXPRSEN_W::new(self) + pub fn rxprsen(&mut self) -> RxprsenW { + RxprsenW::new(self, 7) } #[doc = "Bit 15 - PRS CLK Enable"] #[inline(always)] #[must_use] - pub fn clkprsen(&mut self) -> CLKPRSEN_W<15> { - CLKPRSEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clkprsen(&mut self) -> ClkprsenW { + ClkprsenW::new(self, 15) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlx](index.html) module"] -pub struct CTRLX_SPEC; -impl crate::RegisterSpec for CTRLX_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrlx::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrlx::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CtrlxSpec; +impl crate::RegisterSpec for CtrlxSpec { type Ux = u32; } -#[doc = "`read()` method returns [ctrlx::R](R) reader structure"] -impl crate::Readable for CTRLX_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ctrlx::W](W) writer structure"] -impl crate::Writable for CTRLX_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ctrlx::R`](R) reader structure"] +impl crate::Readable for CtrlxSpec {} +#[doc = "`write(|w| ..)` method takes [`ctrlx::W`](W) writer structure"] +impl crate::Writable for CtrlxSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTRLX to value 0"] -impl crate::Resettable for CTRLX_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CtrlxSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/en.rs index bf56633..500998c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/en.rs @@ -1,80 +1,40 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - USART Enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - USART Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - USART Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - USART Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/frame.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/frame.rs index 8af53f7..7ed3fd3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/frame.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/frame.rs @@ -1,438 +1,420 @@ #[doc = "Register `FRAME` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `FRAME` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DATABITS` reader - Data-Bit Mode"] -pub type DATABITS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Data-Bit Mode\n\nValue on reset: 5"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DATABITS_A { +pub enum Databits { #[doc = "1: Each frame contains 4 data bits"] - FOUR = 1, + Four = 1, #[doc = "2: Each frame contains 5 data bits"] - FIVE = 2, + Five = 2, #[doc = "3: Each frame contains 6 data bits"] - SIX = 3, + Six = 3, #[doc = "4: Each frame contains 7 data bits"] - SEVEN = 4, + Seven = 4, #[doc = "5: Each frame contains 8 data bits"] - EIGHT = 5, + Eight = 5, #[doc = "6: Each frame contains 9 data bits"] - NINE = 6, + Nine = 6, #[doc = "7: Each frame contains 10 data bits"] - TEN = 7, + Ten = 7, #[doc = "8: Each frame contains 11 data bits"] - ELEVEN = 8, + Eleven = 8, #[doc = "9: Each frame contains 12 data bits"] - TWELVE = 9, + Twelve = 9, #[doc = "10: Each frame contains 13 data bits"] - THIRTEEN = 10, + Thirteen = 10, #[doc = "11: Each frame contains 14 data bits"] - FOURTEEN = 11, + Fourteen = 11, #[doc = "12: Each frame contains 15 data bits"] - FIFTEEN = 12, + Fifteen = 12, #[doc = "13: Each frame contains 16 data bits"] - SIXTEEN = 13, + Sixteen = 13, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DATABITS_A) -> Self { + fn from(variant: Databits) -> Self { variant as _ } } -impl DATABITS_R { +impl crate::FieldSpec for Databits { + type Ux = u8; +} +impl crate::IsEnum for Databits {} +#[doc = "Field `DATABITS` reader - Data-Bit Mode"] +pub type DatabitsR = crate::FieldReader; +impl DatabitsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(DATABITS_A::FOUR), - 2 => Some(DATABITS_A::FIVE), - 3 => Some(DATABITS_A::SIX), - 4 => Some(DATABITS_A::SEVEN), - 5 => Some(DATABITS_A::EIGHT), - 6 => Some(DATABITS_A::NINE), - 7 => Some(DATABITS_A::TEN), - 8 => Some(DATABITS_A::ELEVEN), - 9 => Some(DATABITS_A::TWELVE), - 10 => Some(DATABITS_A::THIRTEEN), - 11 => Some(DATABITS_A::FOURTEEN), - 12 => Some(DATABITS_A::FIFTEEN), - 13 => Some(DATABITS_A::SIXTEEN), + 1 => Some(Databits::Four), + 2 => Some(Databits::Five), + 3 => Some(Databits::Six), + 4 => Some(Databits::Seven), + 5 => Some(Databits::Eight), + 6 => Some(Databits::Nine), + 7 => Some(Databits::Ten), + 8 => Some(Databits::Eleven), + 9 => Some(Databits::Twelve), + 10 => Some(Databits::Thirteen), + 11 => Some(Databits::Fourteen), + 12 => Some(Databits::Fifteen), + 13 => Some(Databits::Sixteen), _ => None, } } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "Each frame contains 4 data bits"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == DATABITS_A::FOUR + *self == Databits::Four } - #[doc = "Checks if the value of the field is `FIVE`"] + #[doc = "Each frame contains 5 data bits"] #[inline(always)] pub fn is_five(&self) -> bool { - *self == DATABITS_A::FIVE + *self == Databits::Five } - #[doc = "Checks if the value of the field is `SIX`"] + #[doc = "Each frame contains 6 data bits"] #[inline(always)] pub fn is_six(&self) -> bool { - *self == DATABITS_A::SIX + *self == Databits::Six } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "Each frame contains 7 data bits"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == DATABITS_A::SEVEN + *self == Databits::Seven } - #[doc = "Checks if the value of the field is `EIGHT`"] + #[doc = "Each frame contains 8 data bits"] #[inline(always)] pub fn is_eight(&self) -> bool { - *self == DATABITS_A::EIGHT + *self == Databits::Eight } - #[doc = "Checks if the value of the field is `NINE`"] + #[doc = "Each frame contains 9 data bits"] #[inline(always)] pub fn is_nine(&self) -> bool { - *self == DATABITS_A::NINE + *self == Databits::Nine } - #[doc = "Checks if the value of the field is `TEN`"] + #[doc = "Each frame contains 10 data bits"] #[inline(always)] pub fn is_ten(&self) -> bool { - *self == DATABITS_A::TEN + *self == Databits::Ten } - #[doc = "Checks if the value of the field is `ELEVEN`"] + #[doc = "Each frame contains 11 data bits"] #[inline(always)] pub fn is_eleven(&self) -> bool { - *self == DATABITS_A::ELEVEN + *self == Databits::Eleven } - #[doc = "Checks if the value of the field is `TWELVE`"] + #[doc = "Each frame contains 12 data bits"] #[inline(always)] pub fn is_twelve(&self) -> bool { - *self == DATABITS_A::TWELVE + *self == Databits::Twelve } - #[doc = "Checks if the value of the field is `THIRTEEN`"] + #[doc = "Each frame contains 13 data bits"] #[inline(always)] pub fn is_thirteen(&self) -> bool { - *self == DATABITS_A::THIRTEEN + *self == Databits::Thirteen } - #[doc = "Checks if the value of the field is `FOURTEEN`"] + #[doc = "Each frame contains 14 data bits"] #[inline(always)] pub fn is_fourteen(&self) -> bool { - *self == DATABITS_A::FOURTEEN + *self == Databits::Fourteen } - #[doc = "Checks if the value of the field is `FIFTEEN`"] + #[doc = "Each frame contains 15 data bits"] #[inline(always)] pub fn is_fifteen(&self) -> bool { - *self == DATABITS_A::FIFTEEN + *self == Databits::Fifteen } - #[doc = "Checks if the value of the field is `SIXTEEN`"] + #[doc = "Each frame contains 16 data bits"] #[inline(always)] pub fn is_sixteen(&self) -> bool { - *self == DATABITS_A::SIXTEEN + *self == Databits::Sixteen } } #[doc = "Field `DATABITS` writer - Data-Bit Mode"] -pub type DATABITS_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, FRAME_SPEC, u8, DATABITS_A, 4, O>; -impl<'a, const O: u8> DATABITS_W<'a, O> { +pub type DatabitsW<'a, REG> = crate::FieldWriter<'a, REG, 4, Databits>; +impl<'a, REG> DatabitsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Each frame contains 4 data bits"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(DATABITS_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Databits::Four) } #[doc = "Each frame contains 5 data bits"] #[inline(always)] - pub fn five(self) -> &'a mut W { - self.variant(DATABITS_A::FIVE) + pub fn five(self) -> &'a mut crate::W { + self.variant(Databits::Five) } #[doc = "Each frame contains 6 data bits"] #[inline(always)] - pub fn six(self) -> &'a mut W { - self.variant(DATABITS_A::SIX) + pub fn six(self) -> &'a mut crate::W { + self.variant(Databits::Six) } #[doc = "Each frame contains 7 data bits"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(DATABITS_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Databits::Seven) } #[doc = "Each frame contains 8 data bits"] #[inline(always)] - pub fn eight(self) -> &'a mut W { - self.variant(DATABITS_A::EIGHT) + pub fn eight(self) -> &'a mut crate::W { + self.variant(Databits::Eight) } #[doc = "Each frame contains 9 data bits"] #[inline(always)] - pub fn nine(self) -> &'a mut W { - self.variant(DATABITS_A::NINE) + pub fn nine(self) -> &'a mut crate::W { + self.variant(Databits::Nine) } #[doc = "Each frame contains 10 data bits"] #[inline(always)] - pub fn ten(self) -> &'a mut W { - self.variant(DATABITS_A::TEN) + pub fn ten(self) -> &'a mut crate::W { + self.variant(Databits::Ten) } #[doc = "Each frame contains 11 data bits"] #[inline(always)] - pub fn eleven(self) -> &'a mut W { - self.variant(DATABITS_A::ELEVEN) + pub fn eleven(self) -> &'a mut crate::W { + self.variant(Databits::Eleven) } #[doc = "Each frame contains 12 data bits"] #[inline(always)] - pub fn twelve(self) -> &'a mut W { - self.variant(DATABITS_A::TWELVE) + pub fn twelve(self) -> &'a mut crate::W { + self.variant(Databits::Twelve) } #[doc = "Each frame contains 13 data bits"] #[inline(always)] - pub fn thirteen(self) -> &'a mut W { - self.variant(DATABITS_A::THIRTEEN) + pub fn thirteen(self) -> &'a mut crate::W { + self.variant(Databits::Thirteen) } #[doc = "Each frame contains 14 data bits"] #[inline(always)] - pub fn fourteen(self) -> &'a mut W { - self.variant(DATABITS_A::FOURTEEN) + pub fn fourteen(self) -> &'a mut crate::W { + self.variant(Databits::Fourteen) } #[doc = "Each frame contains 15 data bits"] #[inline(always)] - pub fn fifteen(self) -> &'a mut W { - self.variant(DATABITS_A::FIFTEEN) + pub fn fifteen(self) -> &'a mut crate::W { + self.variant(Databits::Fifteen) } #[doc = "Each frame contains 16 data bits"] #[inline(always)] - pub fn sixteen(self) -> &'a mut W { - self.variant(DATABITS_A::SIXTEEN) + pub fn sixteen(self) -> &'a mut crate::W { + self.variant(Databits::Sixteen) } } -#[doc = "Field `PARITY` reader - Parity-Bit Mode"] -pub type PARITY_R = crate::FieldReader; #[doc = "Parity-Bit Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PARITY_A { +pub enum Parity { #[doc = "0: Parity bits are not used"] - NONE = 0, + None = 0, #[doc = "2: Even parity are used. Parity bits are automatically generated and checked by hardware."] - EVEN = 2, + Even = 2, #[doc = "3: Odd parity is used. Parity bits are automatically generated and checked by hardware."] - ODD = 3, + Odd = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PARITY_A) -> Self { + fn from(variant: Parity) -> Self { variant as _ } } -impl PARITY_R { +impl crate::FieldSpec for Parity { + type Ux = u8; +} +impl crate::IsEnum for Parity {} +#[doc = "Field `PARITY` reader - Parity-Bit Mode"] +pub type ParityR = crate::FieldReader; +impl ParityR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PARITY_A::NONE), - 2 => Some(PARITY_A::EVEN), - 3 => Some(PARITY_A::ODD), + 0 => Some(Parity::None), + 2 => Some(Parity::Even), + 3 => Some(Parity::Odd), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "Parity bits are not used"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == PARITY_A::NONE + *self == Parity::None } - #[doc = "Checks if the value of the field is `EVEN`"] + #[doc = "Even parity are used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] pub fn is_even(&self) -> bool { - *self == PARITY_A::EVEN + *self == Parity::Even } - #[doc = "Checks if the value of the field is `ODD`"] + #[doc = "Odd parity is used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] pub fn is_odd(&self) -> bool { - *self == PARITY_A::ODD + *self == Parity::Odd } } #[doc = "Field `PARITY` writer - Parity-Bit Mode"] -pub type PARITY_W<'a, const O: u8> = crate::FieldWriter<'a, u32, FRAME_SPEC, u8, PARITY_A, 2, O>; -impl<'a, const O: u8> PARITY_W<'a, O> { +pub type ParityW<'a, REG> = crate::FieldWriter<'a, REG, 2, Parity>; +impl<'a, REG> ParityW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Parity bits are not used"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(PARITY_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Parity::None) } #[doc = "Even parity are used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] - pub fn even(self) -> &'a mut W { - self.variant(PARITY_A::EVEN) + pub fn even(self) -> &'a mut crate::W { + self.variant(Parity::Even) } #[doc = "Odd parity is used. Parity bits are automatically generated and checked by hardware."] #[inline(always)] - pub fn odd(self) -> &'a mut W { - self.variant(PARITY_A::ODD) + pub fn odd(self) -> &'a mut crate::W { + self.variant(Parity::Odd) } } -#[doc = "Field `STOPBITS` reader - Stop-Bit Mode"] -pub type STOPBITS_R = crate::FieldReader; #[doc = "Stop-Bit Mode\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STOPBITS_A { +pub enum Stopbits { #[doc = "0: The transmitter generates a half stop bit. Stop-bits are not verified by receiver"] - HALF = 0, + Half = 0, #[doc = "1: One stop bit is generated and verified"] - ONE = 1, + One = 1, #[doc = "2: The transmitter generates one and a half stop bit. The receiver verifies the first stop bit"] - ONEANDAHALF = 2, + Oneandahalf = 2, #[doc = "3: The transmitter generates two stop bits. The receiver checks the first stop-bit only"] - TWO = 3, + Two = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STOPBITS_A) -> Self { + fn from(variant: Stopbits) -> Self { variant as _ } } -impl STOPBITS_R { +impl crate::FieldSpec for Stopbits { + type Ux = u8; +} +impl crate::IsEnum for Stopbits {} +#[doc = "Field `STOPBITS` reader - Stop-Bit Mode"] +pub type StopbitsR = crate::FieldReader; +impl StopbitsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> STOPBITS_A { + pub const fn variant(&self) -> Stopbits { match self.bits { - 0 => STOPBITS_A::HALF, - 1 => STOPBITS_A::ONE, - 2 => STOPBITS_A::ONEANDAHALF, - 3 => STOPBITS_A::TWO, + 0 => Stopbits::Half, + 1 => Stopbits::One, + 2 => Stopbits::Oneandahalf, + 3 => Stopbits::Two, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `HALF`"] + #[doc = "The transmitter generates a half stop bit. Stop-bits are not verified by receiver"] #[inline(always)] pub fn is_half(&self) -> bool { - *self == STOPBITS_A::HALF + *self == Stopbits::Half } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "One stop bit is generated and verified"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == STOPBITS_A::ONE + *self == Stopbits::One } - #[doc = "Checks if the value of the field is `ONEANDAHALF`"] + #[doc = "The transmitter generates one and a half stop bit. The receiver verifies the first stop bit"] #[inline(always)] pub fn is_oneandahalf(&self) -> bool { - *self == STOPBITS_A::ONEANDAHALF + *self == Stopbits::Oneandahalf } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "The transmitter generates two stop bits. The receiver checks the first stop-bit only"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == STOPBITS_A::TWO + *self == Stopbits::Two } } #[doc = "Field `STOPBITS` writer - Stop-Bit Mode"] -pub type STOPBITS_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, FRAME_SPEC, u8, STOPBITS_A, 2, O>; -impl<'a, const O: u8> STOPBITS_W<'a, O> { +pub type StopbitsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Stopbits, crate::Safe>; +impl<'a, REG> StopbitsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The transmitter generates a half stop bit. Stop-bits are not verified by receiver"] #[inline(always)] - pub fn half(self) -> &'a mut W { - self.variant(STOPBITS_A::HALF) + pub fn half(self) -> &'a mut crate::W { + self.variant(Stopbits::Half) } #[doc = "One stop bit is generated and verified"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(STOPBITS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Stopbits::One) } #[doc = "The transmitter generates one and a half stop bit. The receiver verifies the first stop bit"] #[inline(always)] - pub fn oneandahalf(self) -> &'a mut W { - self.variant(STOPBITS_A::ONEANDAHALF) + pub fn oneandahalf(self) -> &'a mut crate::W { + self.variant(Stopbits::Oneandahalf) } #[doc = "The transmitter generates two stop bits. The receiver checks the first stop-bit only"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(STOPBITS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Stopbits::Two) } } impl R { #[doc = "Bits 0:3 - Data-Bit Mode"] #[inline(always)] - pub fn databits(&self) -> DATABITS_R { - DATABITS_R::new((self.bits & 0x0f) as u8) + pub fn databits(&self) -> DatabitsR { + DatabitsR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - Parity-Bit Mode"] #[inline(always)] - pub fn parity(&self) -> PARITY_R { - PARITY_R::new(((self.bits >> 8) & 3) as u8) + pub fn parity(&self) -> ParityR { + ParityR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 12:13 - Stop-Bit Mode"] #[inline(always)] - pub fn stopbits(&self) -> STOPBITS_R { - STOPBITS_R::new(((self.bits >> 12) & 3) as u8) + pub fn stopbits(&self) -> StopbitsR { + StopbitsR::new(((self.bits >> 12) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - Data-Bit Mode"] #[inline(always)] #[must_use] - pub fn databits(&mut self) -> DATABITS_W<0> { - DATABITS_W::new(self) + pub fn databits(&mut self) -> DatabitsW { + DatabitsW::new(self, 0) } #[doc = "Bits 8:9 - Parity-Bit Mode"] #[inline(always)] #[must_use] - pub fn parity(&mut self) -> PARITY_W<8> { - PARITY_W::new(self) + pub fn parity(&mut self) -> ParityW { + ParityW::new(self, 8) } #[doc = "Bits 12:13 - Stop-Bit Mode"] #[inline(always)] #[must_use] - pub fn stopbits(&mut self) -> STOPBITS_W<12> { - STOPBITS_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn stopbits(&mut self) -> StopbitsW { + StopbitsW::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [frame](index.html) module"] -pub struct FRAME_SPEC; -impl crate::RegisterSpec for FRAME_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`frame::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`frame::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct FrameSpec; +impl crate::RegisterSpec for FrameSpec { type Ux = u32; } -#[doc = "`read()` method returns [frame::R](R) reader structure"] -impl crate::Readable for FRAME_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [frame::W](W) writer structure"] -impl crate::Writable for FRAME_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`frame::R`](R) reader structure"] +impl crate::Readable for FrameSpec {} +#[doc = "`write(|w| ..)` method takes [`frame::W`](W) writer structure"] +impl crate::Writable for FrameSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FRAME to value 0x1005"] -impl crate::Resettable for FRAME_SPEC { - const RESET_VALUE: Self::Ux = 0x1005; +impl crate::Resettable for FrameSpec { + const RESET_VALUE: u32 = 0x1005; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/i2sctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/i2sctrl.rs index da11729..e06032c 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/i2sctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/i2sctrl.rs @@ -1,328 +1,298 @@ #[doc = "Register `I2SCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `I2SCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Enable I2S Mode"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Enable I2S Mode"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2SCTRL_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MONO` reader - Stero or Mono"] -pub type MONO_R = crate::BitReader; +pub type MonoR = crate::BitReader; #[doc = "Field `MONO` writer - Stero or Mono"] -pub type MONO_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2SCTRL_SPEC, bool, O>; -#[doc = "Field `JUSTIFY` reader - Justification of I2S Data"] -pub type JUSTIFY_R = crate::BitReader; +pub type MonoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Justification of I2S Data\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum JUSTIFY_A { +pub enum Justify { #[doc = "0: Data is left-justified"] - LEFT = 0, + Left = 0, #[doc = "1: Data is right-justified"] - RIGHT = 1, + Right = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: JUSTIFY_A) -> Self { + fn from(variant: Justify) -> Self { variant as u8 != 0 } } -impl JUSTIFY_R { +#[doc = "Field `JUSTIFY` reader - Justification of I2S Data"] +pub type JustifyR = crate::BitReader; +impl JustifyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> JUSTIFY_A { + pub const fn variant(&self) -> Justify { match self.bits { - false => JUSTIFY_A::LEFT, - true => JUSTIFY_A::RIGHT, + false => Justify::Left, + true => Justify::Right, } } - #[doc = "Checks if the value of the field is `LEFT`"] + #[doc = "Data is left-justified"] #[inline(always)] pub fn is_left(&self) -> bool { - *self == JUSTIFY_A::LEFT + *self == Justify::Left } - #[doc = "Checks if the value of the field is `RIGHT`"] + #[doc = "Data is right-justified"] #[inline(always)] pub fn is_right(&self) -> bool { - *self == JUSTIFY_A::RIGHT + *self == Justify::Right } } #[doc = "Field `JUSTIFY` writer - Justification of I2S Data"] -pub type JUSTIFY_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2SCTRL_SPEC, JUSTIFY_A, O>; -impl<'a, const O: u8> JUSTIFY_W<'a, O> { +pub type JustifyW<'a, REG> = crate::BitWriter<'a, REG, Justify>; +impl<'a, REG> JustifyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Data is left-justified"] #[inline(always)] - pub fn left(self) -> &'a mut W { - self.variant(JUSTIFY_A::LEFT) + pub fn left(self) -> &'a mut crate::W { + self.variant(Justify::Left) } #[doc = "Data is right-justified"] #[inline(always)] - pub fn right(self) -> &'a mut W { - self.variant(JUSTIFY_A::RIGHT) + pub fn right(self) -> &'a mut crate::W { + self.variant(Justify::Right) } } #[doc = "Field `DMASPLIT` reader - Separate DMA Request For Left/Right Data"] -pub type DMASPLIT_R = crate::BitReader; +pub type DmasplitR = crate::BitReader; #[doc = "Field `DMASPLIT` writer - Separate DMA Request For Left/Right Data"] -pub type DMASPLIT_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2SCTRL_SPEC, bool, O>; +pub type DmasplitW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DELAY` reader - Delay on I2S data"] -pub type DELAY_R = crate::BitReader; +pub type DelayR = crate::BitReader; #[doc = "Field `DELAY` writer - Delay on I2S data"] -pub type DELAY_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2SCTRL_SPEC, bool, O>; -#[doc = "Field `FORMAT` reader - I2S Word Format"] -pub type FORMAT_R = crate::FieldReader; +pub type DelayW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "I2S Word Format\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FORMAT_A { +pub enum Format { #[doc = "0: 32-bit word, 32-bit data"] - W32D32 = 0, + W32d32 = 0, #[doc = "1: 32-bit word, 32-bit data with 8 lsb masked"] - W32D24M = 1, + W32d24m = 1, #[doc = "2: 32-bit word, 24-bit data"] - W32D24 = 2, + W32d24 = 2, #[doc = "3: 32-bit word, 16-bit data"] - W32D16 = 3, + W32d16 = 3, #[doc = "4: 32-bit word, 8-bit data"] - W32D8 = 4, + W32d8 = 4, #[doc = "5: 16-bit word, 16-bit data"] - W16D16 = 5, + W16d16 = 5, #[doc = "6: 16-bit word, 8-bit data"] - W16D8 = 6, + W16d8 = 6, #[doc = "7: 8-bit word, 8-bit data"] - W8D8 = 7, + W8d8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FORMAT_A) -> Self { + fn from(variant: Format) -> Self { variant as _ } } -impl FORMAT_R { +impl crate::FieldSpec for Format { + type Ux = u8; +} +impl crate::IsEnum for Format {} +#[doc = "Field `FORMAT` reader - I2S Word Format"] +pub type FormatR = crate::FieldReader; +impl FormatR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> FORMAT_A { + pub const fn variant(&self) -> Format { match self.bits { - 0 => FORMAT_A::W32D32, - 1 => FORMAT_A::W32D24M, - 2 => FORMAT_A::W32D24, - 3 => FORMAT_A::W32D16, - 4 => FORMAT_A::W32D8, - 5 => FORMAT_A::W16D16, - 6 => FORMAT_A::W16D8, - 7 => FORMAT_A::W8D8, + 0 => Format::W32d32, + 1 => Format::W32d24m, + 2 => Format::W32d24, + 3 => Format::W32d16, + 4 => Format::W32d8, + 5 => Format::W16d16, + 6 => Format::W16d8, + 7 => Format::W8d8, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `W32D32`"] + #[doc = "32-bit word, 32-bit data"] #[inline(always)] pub fn is_w32d32(&self) -> bool { - *self == FORMAT_A::W32D32 + *self == Format::W32d32 } - #[doc = "Checks if the value of the field is `W32D24M`"] + #[doc = "32-bit word, 32-bit data with 8 lsb masked"] #[inline(always)] pub fn is_w32d24m(&self) -> bool { - *self == FORMAT_A::W32D24M + *self == Format::W32d24m } - #[doc = "Checks if the value of the field is `W32D24`"] + #[doc = "32-bit word, 24-bit data"] #[inline(always)] pub fn is_w32d24(&self) -> bool { - *self == FORMAT_A::W32D24 + *self == Format::W32d24 } - #[doc = "Checks if the value of the field is `W32D16`"] + #[doc = "32-bit word, 16-bit data"] #[inline(always)] pub fn is_w32d16(&self) -> bool { - *self == FORMAT_A::W32D16 + *self == Format::W32d16 } - #[doc = "Checks if the value of the field is `W32D8`"] + #[doc = "32-bit word, 8-bit data"] #[inline(always)] pub fn is_w32d8(&self) -> bool { - *self == FORMAT_A::W32D8 + *self == Format::W32d8 } - #[doc = "Checks if the value of the field is `W16D16`"] + #[doc = "16-bit word, 16-bit data"] #[inline(always)] pub fn is_w16d16(&self) -> bool { - *self == FORMAT_A::W16D16 + *self == Format::W16d16 } - #[doc = "Checks if the value of the field is `W16D8`"] + #[doc = "16-bit word, 8-bit data"] #[inline(always)] pub fn is_w16d8(&self) -> bool { - *self == FORMAT_A::W16D8 + *self == Format::W16d8 } - #[doc = "Checks if the value of the field is `W8D8`"] + #[doc = "8-bit word, 8-bit data"] #[inline(always)] pub fn is_w8d8(&self) -> bool { - *self == FORMAT_A::W8D8 + *self == Format::W8d8 } } #[doc = "Field `FORMAT` writer - I2S Word Format"] -pub type FORMAT_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, I2SCTRL_SPEC, u8, FORMAT_A, 3, O>; -impl<'a, const O: u8> FORMAT_W<'a, O> { +pub type FormatW<'a, REG> = crate::FieldWriter<'a, REG, 3, Format, crate::Safe>; +impl<'a, REG> FormatW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "32-bit word, 32-bit data"] #[inline(always)] - pub fn w32d32(self) -> &'a mut W { - self.variant(FORMAT_A::W32D32) + pub fn w32d32(self) -> &'a mut crate::W { + self.variant(Format::W32d32) } #[doc = "32-bit word, 32-bit data with 8 lsb masked"] #[inline(always)] - pub fn w32d24m(self) -> &'a mut W { - self.variant(FORMAT_A::W32D24M) + pub fn w32d24m(self) -> &'a mut crate::W { + self.variant(Format::W32d24m) } #[doc = "32-bit word, 24-bit data"] #[inline(always)] - pub fn w32d24(self) -> &'a mut W { - self.variant(FORMAT_A::W32D24) + pub fn w32d24(self) -> &'a mut crate::W { + self.variant(Format::W32d24) } #[doc = "32-bit word, 16-bit data"] #[inline(always)] - pub fn w32d16(self) -> &'a mut W { - self.variant(FORMAT_A::W32D16) + pub fn w32d16(self) -> &'a mut crate::W { + self.variant(Format::W32d16) } #[doc = "32-bit word, 8-bit data"] #[inline(always)] - pub fn w32d8(self) -> &'a mut W { - self.variant(FORMAT_A::W32D8) + pub fn w32d8(self) -> &'a mut crate::W { + self.variant(Format::W32d8) } #[doc = "16-bit word, 16-bit data"] #[inline(always)] - pub fn w16d16(self) -> &'a mut W { - self.variant(FORMAT_A::W16D16) + pub fn w16d16(self) -> &'a mut crate::W { + self.variant(Format::W16d16) } #[doc = "16-bit word, 8-bit data"] #[inline(always)] - pub fn w16d8(self) -> &'a mut W { - self.variant(FORMAT_A::W16D8) + pub fn w16d8(self) -> &'a mut crate::W { + self.variant(Format::W16d8) } #[doc = "8-bit word, 8-bit data"] #[inline(always)] - pub fn w8d8(self) -> &'a mut W { - self.variant(FORMAT_A::W8D8) + pub fn w8d8(self) -> &'a mut crate::W { + self.variant(Format::W8d8) } } impl R { #[doc = "Bit 0 - Enable I2S Mode"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Stero or Mono"] #[inline(always)] - pub fn mono(&self) -> MONO_R { - MONO_R::new(((self.bits >> 1) & 1) != 0) + pub fn mono(&self) -> MonoR { + MonoR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Justification of I2S Data"] #[inline(always)] - pub fn justify(&self) -> JUSTIFY_R { - JUSTIFY_R::new(((self.bits >> 2) & 1) != 0) + pub fn justify(&self) -> JustifyR { + JustifyR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Separate DMA Request For Left/Right Data"] #[inline(always)] - pub fn dmasplit(&self) -> DMASPLIT_R { - DMASPLIT_R::new(((self.bits >> 3) & 1) != 0) + pub fn dmasplit(&self) -> DmasplitR { + DmasplitR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Delay on I2S data"] #[inline(always)] - pub fn delay(&self) -> DELAY_R { - DELAY_R::new(((self.bits >> 4) & 1) != 0) + pub fn delay(&self) -> DelayR { + DelayR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 8:10 - I2S Word Format"] #[inline(always)] - pub fn format(&self) -> FORMAT_R { - FORMAT_R::new(((self.bits >> 8) & 7) as u8) + pub fn format(&self) -> FormatR { + FormatR::new(((self.bits >> 8) & 7) as u8) } } impl W { #[doc = "Bit 0 - Enable I2S Mode"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } #[doc = "Bit 1 - Stero or Mono"] #[inline(always)] #[must_use] - pub fn mono(&mut self) -> MONO_W<1> { - MONO_W::new(self) + pub fn mono(&mut self) -> MonoW { + MonoW::new(self, 1) } #[doc = "Bit 2 - Justification of I2S Data"] #[inline(always)] #[must_use] - pub fn justify(&mut self) -> JUSTIFY_W<2> { - JUSTIFY_W::new(self) + pub fn justify(&mut self) -> JustifyW { + JustifyW::new(self, 2) } #[doc = "Bit 3 - Separate DMA Request For Left/Right Data"] #[inline(always)] #[must_use] - pub fn dmasplit(&mut self) -> DMASPLIT_W<3> { - DMASPLIT_W::new(self) + pub fn dmasplit(&mut self) -> DmasplitW { + DmasplitW::new(self, 3) } #[doc = "Bit 4 - Delay on I2S data"] #[inline(always)] #[must_use] - pub fn delay(&mut self) -> DELAY_W<4> { - DELAY_W::new(self) + pub fn delay(&mut self) -> DelayW { + DelayW::new(self, 4) } #[doc = "Bits 8:10 - I2S Word Format"] #[inline(always)] #[must_use] - pub fn format(&mut self) -> FORMAT_W<8> { - FORMAT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn format(&mut self) -> FormatW { + FormatW::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [i2sctrl](index.html) module"] -pub struct I2SCTRL_SPEC; -impl crate::RegisterSpec for I2SCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`i2sctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2sctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct I2sctrlSpec; +impl crate::RegisterSpec for I2sctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [i2sctrl::R](R) reader structure"] -impl crate::Readable for I2SCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [i2sctrl::W](W) writer structure"] -impl crate::Writable for I2SCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`i2sctrl::R`](R) reader structure"] +impl crate::Readable for I2sctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`i2sctrl::W`](W) writer structure"] +impl crate::Writable for I2sctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets I2SCTRL to value 0"] -impl crate::Resettable for I2SCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for I2sctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/ien.rs index af43b83..1abac51 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/ien.rs @@ -1,320 +1,280 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXC` reader - TX Complete Interrupt Enable"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXC` writer - TX Complete Interrupt Enable"] -pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXBL` reader - TX Buffer Level Interrupt Enable"] -pub type TXBL_R = crate::BitReader; +pub type TxblR = crate::BitReader; #[doc = "Field `TXBL` writer - TX Buffer Level Interrupt Enable"] -pub type TXBL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxblW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXDATAV` reader - RX Data Valid Interrupt Enable"] -pub type RXDATAV_R = crate::BitReader; +pub type RxdatavR = crate::BitReader; #[doc = "Field `RXDATAV` writer - RX Data Valid Interrupt Enable"] -pub type RXDATAV_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxdatavW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFULL` reader - RX Buffer Full Interrupt Enable"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXFULL` writer - RX Buffer Full Interrupt Enable"] -pub type RXFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxfullW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXOF` reader - RX Overflow Interrupt Enable"] -pub type RXOF_R = crate::BitReader; +pub type RxofR = crate::BitReader; #[doc = "Field `RXOF` writer - RX Overflow Interrupt Enable"] -pub type RXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUF` reader - RX Underflow Interrupt Enable"] -pub type RXUF_R = crate::BitReader; +pub type RxufR = crate::BitReader; #[doc = "Field `RXUF` writer - RX Underflow Interrupt Enable"] -pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type RxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXOF` reader - TX Overflow Interrupt Enable"] -pub type TXOF_R = crate::BitReader; +pub type TxofR = crate::BitReader; #[doc = "Field `TXOF` writer - TX Overflow Interrupt Enable"] -pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXUF` reader - TX Underflow Interrupt Enable"] -pub type TXUF_R = crate::BitReader; +pub type TxufR = crate::BitReader; #[doc = "Field `TXUF` writer - TX Underflow Interrupt Enable"] -pub type TXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PERR` reader - Parity Error Interrupt Enable"] -pub type PERR_R = crate::BitReader; +pub type PerrR = crate::BitReader; #[doc = "Field `PERR` writer - Parity Error Interrupt Enable"] -pub type PERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type PerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FERR` reader - Framing Error Interrupt Enable"] -pub type FERR_R = crate::BitReader; +pub type FerrR = crate::BitReader; #[doc = "Field `FERR` writer - Framing Error Interrupt Enable"] -pub type FERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type FerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPAF` reader - Multi-Processor Address Frame Interrupt"] -pub type MPAF_R = crate::BitReader; +pub type MpafR = crate::BitReader; #[doc = "Field `MPAF` writer - Multi-Processor Address Frame Interrupt"] -pub type MPAF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type MpafW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SSM` reader - Chip-Select In Main Mode Interrupt Flag"] -pub type SSM_R = crate::BitReader; +pub type SsmR = crate::BitReader; #[doc = "Field `SSM` writer - Chip-Select In Main Mode Interrupt Flag"] -pub type SSM_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type SsmW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCF` reader - Collision Check Fail Interrupt Enable"] -pub type CCF_R = crate::BitReader; +pub type CcfR = crate::BitReader; #[doc = "Field `CCF` writer - Collision Check Fail Interrupt Enable"] -pub type CCF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type CcfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXIDLE` reader - TX Idle Interrupt Enable"] -pub type TXIDLE_R = crate::BitReader; +pub type TxidleR = crate::BitReader; #[doc = "Field `TXIDLE` writer - TX Idle Interrupt Enable"] -pub type TXIDLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type TxidleW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TCMP0` reader - Timer comparator 0 Interrupt Enable"] -pub type TCMP0_R = crate::BitReader; +pub type Tcmp0R = crate::BitReader; #[doc = "Field `TCMP0` writer - Timer comparator 0 Interrupt Enable"] -pub type TCMP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Tcmp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TCMP1` reader - Timer comparator 1 Interrupt Enable"] -pub type TCMP1_R = crate::BitReader; +pub type Tcmp1R = crate::BitReader; #[doc = "Field `TCMP1` writer - Timer comparator 1 Interrupt Enable"] -pub type TCMP1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Tcmp1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TCMP2` reader - Timer comparator 2 Interrupt Enable"] -pub type TCMP2_R = crate::BitReader; +pub type Tcmp2R = crate::BitReader; #[doc = "Field `TCMP2` writer - Timer comparator 2 Interrupt Enable"] -pub type TCMP2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Tcmp2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - TX Complete Interrupt Enable"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new((self.bits & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - TX Buffer Level Interrupt Enable"] #[inline(always)] - pub fn txbl(&self) -> TXBL_R { - TXBL_R::new(((self.bits >> 1) & 1) != 0) + pub fn txbl(&self) -> TxblR { + TxblR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RX Data Valid Interrupt Enable"] #[inline(always)] - pub fn rxdatav(&self) -> RXDATAV_R { - RXDATAV_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxdatav(&self) -> RxdatavR { + RxdatavR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - RX Buffer Full Interrupt Enable"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - RX Overflow Interrupt Enable"] #[inline(always)] - pub fn rxof(&self) -> RXOF_R { - RXOF_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxof(&self) -> RxofR { + RxofR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - RX Underflow Interrupt Enable"] #[inline(always)] - pub fn rxuf(&self) -> RXUF_R { - RXUF_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxuf(&self) -> RxufR { + RxufR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX Overflow Interrupt Enable"] #[inline(always)] - pub fn txof(&self) -> TXOF_R { - TXOF_R::new(((self.bits >> 6) & 1) != 0) + pub fn txof(&self) -> TxofR { + TxofR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - TX Underflow Interrupt Enable"] #[inline(always)] - pub fn txuf(&self) -> TXUF_R { - TXUF_R::new(((self.bits >> 7) & 1) != 0) + pub fn txuf(&self) -> TxufR { + TxufR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Parity Error Interrupt Enable"] #[inline(always)] - pub fn perr(&self) -> PERR_R { - PERR_R::new(((self.bits >> 8) & 1) != 0) + pub fn perr(&self) -> PerrR { + PerrR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Framing Error Interrupt Enable"] #[inline(always)] - pub fn ferr(&self) -> FERR_R { - FERR_R::new(((self.bits >> 9) & 1) != 0) + pub fn ferr(&self) -> FerrR { + FerrR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Multi-Processor Address Frame Interrupt"] #[inline(always)] - pub fn mpaf(&self) -> MPAF_R { - MPAF_R::new(((self.bits >> 10) & 1) != 0) + pub fn mpaf(&self) -> MpafR { + MpafR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Chip-Select In Main Mode Interrupt Flag"] #[inline(always)] - pub fn ssm(&self) -> SSM_R { - SSM_R::new(((self.bits >> 11) & 1) != 0) + pub fn ssm(&self) -> SsmR { + SsmR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Collision Check Fail Interrupt Enable"] #[inline(always)] - pub fn ccf(&self) -> CCF_R { - CCF_R::new(((self.bits >> 12) & 1) != 0) + pub fn ccf(&self) -> CcfR { + CcfR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - TX Idle Interrupt Enable"] #[inline(always)] - pub fn txidle(&self) -> TXIDLE_R { - TXIDLE_R::new(((self.bits >> 13) & 1) != 0) + pub fn txidle(&self) -> TxidleR { + TxidleR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Timer comparator 0 Interrupt Enable"] #[inline(always)] - pub fn tcmp0(&self) -> TCMP0_R { - TCMP0_R::new(((self.bits >> 14) & 1) != 0) + pub fn tcmp0(&self) -> Tcmp0R { + Tcmp0R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Timer comparator 1 Interrupt Enable"] #[inline(always)] - pub fn tcmp1(&self) -> TCMP1_R { - TCMP1_R::new(((self.bits >> 15) & 1) != 0) + pub fn tcmp1(&self) -> Tcmp1R { + Tcmp1R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Timer comparator 2 Interrupt Enable"] #[inline(always)] - pub fn tcmp2(&self) -> TCMP2_R { - TCMP2_R::new(((self.bits >> 16) & 1) != 0) + pub fn tcmp2(&self) -> Tcmp2R { + Tcmp2R::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bit 0 - TX Complete Interrupt Enable"] #[inline(always)] #[must_use] - pub fn txc(&mut self) -> TXC_W<0> { - TXC_W::new(self) + pub fn txc(&mut self) -> TxcW { + TxcW::new(self, 0) } #[doc = "Bit 1 - TX Buffer Level Interrupt Enable"] #[inline(always)] #[must_use] - pub fn txbl(&mut self) -> TXBL_W<1> { - TXBL_W::new(self) + pub fn txbl(&mut self) -> TxblW { + TxblW::new(self, 1) } #[doc = "Bit 2 - RX Data Valid Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rxdatav(&mut self) -> RXDATAV_W<2> { - RXDATAV_W::new(self) + pub fn rxdatav(&mut self) -> RxdatavW { + RxdatavW::new(self, 2) } #[doc = "Bit 3 - RX Buffer Full Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rxfull(&mut self) -> RXFULL_W<3> { - RXFULL_W::new(self) + pub fn rxfull(&mut self) -> RxfullW { + RxfullW::new(self, 3) } #[doc = "Bit 4 - RX Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rxof(&mut self) -> RXOF_W<4> { - RXOF_W::new(self) + pub fn rxof(&mut self) -> RxofW { + RxofW::new(self, 4) } #[doc = "Bit 5 - RX Underflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rxuf(&mut self) -> RXUF_W<5> { - RXUF_W::new(self) + pub fn rxuf(&mut self) -> RxufW { + RxufW::new(self, 5) } #[doc = "Bit 6 - TX Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn txof(&mut self) -> TXOF_W<6> { - TXOF_W::new(self) + pub fn txof(&mut self) -> TxofW { + TxofW::new(self, 6) } #[doc = "Bit 7 - TX Underflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn txuf(&mut self) -> TXUF_W<7> { - TXUF_W::new(self) + pub fn txuf(&mut self) -> TxufW { + TxufW::new(self, 7) } #[doc = "Bit 8 - Parity Error Interrupt Enable"] #[inline(always)] #[must_use] - pub fn perr(&mut self) -> PERR_W<8> { - PERR_W::new(self) + pub fn perr(&mut self) -> PerrW { + PerrW::new(self, 8) } #[doc = "Bit 9 - Framing Error Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ferr(&mut self) -> FERR_W<9> { - FERR_W::new(self) + pub fn ferr(&mut self) -> FerrW { + FerrW::new(self, 9) } #[doc = "Bit 10 - Multi-Processor Address Frame Interrupt"] #[inline(always)] #[must_use] - pub fn mpaf(&mut self) -> MPAF_W<10> { - MPAF_W::new(self) + pub fn mpaf(&mut self) -> MpafW { + MpafW::new(self, 10) } #[doc = "Bit 11 - Chip-Select In Main Mode Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ssm(&mut self) -> SSM_W<11> { - SSM_W::new(self) + pub fn ssm(&mut self) -> SsmW { + SsmW::new(self, 11) } #[doc = "Bit 12 - Collision Check Fail Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ccf(&mut self) -> CCF_W<12> { - CCF_W::new(self) + pub fn ccf(&mut self) -> CcfW { + CcfW::new(self, 12) } #[doc = "Bit 13 - TX Idle Interrupt Enable"] #[inline(always)] #[must_use] - pub fn txidle(&mut self) -> TXIDLE_W<13> { - TXIDLE_W::new(self) + pub fn txidle(&mut self) -> TxidleW { + TxidleW::new(self, 13) } #[doc = "Bit 14 - Timer comparator 0 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn tcmp0(&mut self) -> TCMP0_W<14> { - TCMP0_W::new(self) + pub fn tcmp0(&mut self) -> Tcmp0W { + Tcmp0W::new(self, 14) } #[doc = "Bit 15 - Timer comparator 1 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn tcmp1(&mut self) -> TCMP1_W<15> { - TCMP1_W::new(self) + pub fn tcmp1(&mut self) -> Tcmp1W { + Tcmp1W::new(self, 15) } #[doc = "Bit 16 - Timer comparator 2 Interrupt Enable"] #[inline(always)] #[must_use] - pub fn tcmp2(&mut self) -> TCMP2_W<16> { - TCMP2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn tcmp2(&mut self) -> Tcmp2W { + Tcmp2W::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/if_.rs index 3350320..0c26ff8 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/if_.rs @@ -1,320 +1,280 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXC` reader - TX Complete Interrupt Flag"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXC` writer - TX Complete Interrupt Flag"] -pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXBL` reader - TX Buffer Level Interrupt Flag"] -pub type TXBL_R = crate::BitReader; +pub type TxblR = crate::BitReader; #[doc = "Field `TXBL` writer - TX Buffer Level Interrupt Flag"] -pub type TXBL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxblW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXDATAV` reader - RX Data Valid Interrupt Flag"] -pub type RXDATAV_R = crate::BitReader; +pub type RxdatavR = crate::BitReader; #[doc = "Field `RXDATAV` writer - RX Data Valid Interrupt Flag"] -pub type RXDATAV_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxdatavW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFULL` reader - RX Buffer Full Interrupt Flag"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `RXFULL` writer - RX Buffer Full Interrupt Flag"] -pub type RXFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxfullW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXOF` reader - RX Overflow Interrupt Flag"] -pub type RXOF_R = crate::BitReader; +pub type RxofR = crate::BitReader; #[doc = "Field `RXOF` writer - RX Overflow Interrupt Flag"] -pub type RXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUF` reader - RX Underflow Interrupt Flag"] -pub type RXUF_R = crate::BitReader; +pub type RxufR = crate::BitReader; #[doc = "Field `RXUF` writer - RX Underflow Interrupt Flag"] -pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type RxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXOF` reader - TX Overflow Interrupt Flag"] -pub type TXOF_R = crate::BitReader; +pub type TxofR = crate::BitReader; #[doc = "Field `TXOF` writer - TX Overflow Interrupt Flag"] -pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXUF` reader - TX Underflow Interrupt Flag"] -pub type TXUF_R = crate::BitReader; +pub type TxufR = crate::BitReader; #[doc = "Field `TXUF` writer - TX Underflow Interrupt Flag"] -pub type TXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PERR` reader - Parity Error Interrupt Flag"] -pub type PERR_R = crate::BitReader; +pub type PerrR = crate::BitReader; #[doc = "Field `PERR` writer - Parity Error Interrupt Flag"] -pub type PERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type PerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FERR` reader - Framing Error Interrupt Flag"] -pub type FERR_R = crate::BitReader; +pub type FerrR = crate::BitReader; #[doc = "Field `FERR` writer - Framing Error Interrupt Flag"] -pub type FERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type FerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPAF` reader - Multi-Processor Address Frame Interrupt"] -pub type MPAF_R = crate::BitReader; +pub type MpafR = crate::BitReader; #[doc = "Field `MPAF` writer - Multi-Processor Address Frame Interrupt"] -pub type MPAF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type MpafW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SSM` reader - Chip-Select In Main Mode Interrupt Flag"] -pub type SSM_R = crate::BitReader; +pub type SsmR = crate::BitReader; #[doc = "Field `SSM` writer - Chip-Select In Main Mode Interrupt Flag"] -pub type SSM_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type SsmW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCF` reader - Collision Check Fail Interrupt Flag"] -pub type CCF_R = crate::BitReader; +pub type CcfR = crate::BitReader; #[doc = "Field `CCF` writer - Collision Check Fail Interrupt Flag"] -pub type CCF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type CcfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXIDLE` reader - TX Idle Interrupt Flag"] -pub type TXIDLE_R = crate::BitReader; +pub type TxidleR = crate::BitReader; #[doc = "Field `TXIDLE` writer - TX Idle Interrupt Flag"] -pub type TXIDLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type TxidleW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TCMP0` reader - Timer comparator 0 Interrupt Flag"] -pub type TCMP0_R = crate::BitReader; +pub type Tcmp0R = crate::BitReader; #[doc = "Field `TCMP0` writer - Timer comparator 0 Interrupt Flag"] -pub type TCMP0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Tcmp0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TCMP1` reader - Timer comparator 1 Interrupt Flag"] -pub type TCMP1_R = crate::BitReader; +pub type Tcmp1R = crate::BitReader; #[doc = "Field `TCMP1` writer - Timer comparator 1 Interrupt Flag"] -pub type TCMP1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Tcmp1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TCMP2` reader - Timer comparator 2 Interrupt Flag"] -pub type TCMP2_R = crate::BitReader; +pub type Tcmp2R = crate::BitReader; #[doc = "Field `TCMP2` writer - Timer comparator 2 Interrupt Flag"] -pub type TCMP2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Tcmp2W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - TX Complete Interrupt Flag"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new((self.bits & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - TX Buffer Level Interrupt Flag"] #[inline(always)] - pub fn txbl(&self) -> TXBL_R { - TXBL_R::new(((self.bits >> 1) & 1) != 0) + pub fn txbl(&self) -> TxblR { + TxblR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RX Data Valid Interrupt Flag"] #[inline(always)] - pub fn rxdatav(&self) -> RXDATAV_R { - RXDATAV_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxdatav(&self) -> RxdatavR { + RxdatavR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - RX Buffer Full Interrupt Flag"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - RX Overflow Interrupt Flag"] #[inline(always)] - pub fn rxof(&self) -> RXOF_R { - RXOF_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxof(&self) -> RxofR { + RxofR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - RX Underflow Interrupt Flag"] #[inline(always)] - pub fn rxuf(&self) -> RXUF_R { - RXUF_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxuf(&self) -> RxufR { + RxufR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX Overflow Interrupt Flag"] #[inline(always)] - pub fn txof(&self) -> TXOF_R { - TXOF_R::new(((self.bits >> 6) & 1) != 0) + pub fn txof(&self) -> TxofR { + TxofR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - TX Underflow Interrupt Flag"] #[inline(always)] - pub fn txuf(&self) -> TXUF_R { - TXUF_R::new(((self.bits >> 7) & 1) != 0) + pub fn txuf(&self) -> TxufR { + TxufR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Parity Error Interrupt Flag"] #[inline(always)] - pub fn perr(&self) -> PERR_R { - PERR_R::new(((self.bits >> 8) & 1) != 0) + pub fn perr(&self) -> PerrR { + PerrR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Framing Error Interrupt Flag"] #[inline(always)] - pub fn ferr(&self) -> FERR_R { - FERR_R::new(((self.bits >> 9) & 1) != 0) + pub fn ferr(&self) -> FerrR { + FerrR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Multi-Processor Address Frame Interrupt"] #[inline(always)] - pub fn mpaf(&self) -> MPAF_R { - MPAF_R::new(((self.bits >> 10) & 1) != 0) + pub fn mpaf(&self) -> MpafR { + MpafR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Chip-Select In Main Mode Interrupt Flag"] #[inline(always)] - pub fn ssm(&self) -> SSM_R { - SSM_R::new(((self.bits >> 11) & 1) != 0) + pub fn ssm(&self) -> SsmR { + SsmR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Collision Check Fail Interrupt Flag"] #[inline(always)] - pub fn ccf(&self) -> CCF_R { - CCF_R::new(((self.bits >> 12) & 1) != 0) + pub fn ccf(&self) -> CcfR { + CcfR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - TX Idle Interrupt Flag"] #[inline(always)] - pub fn txidle(&self) -> TXIDLE_R { - TXIDLE_R::new(((self.bits >> 13) & 1) != 0) + pub fn txidle(&self) -> TxidleR { + TxidleR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Timer comparator 0 Interrupt Flag"] #[inline(always)] - pub fn tcmp0(&self) -> TCMP0_R { - TCMP0_R::new(((self.bits >> 14) & 1) != 0) + pub fn tcmp0(&self) -> Tcmp0R { + Tcmp0R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Timer comparator 1 Interrupt Flag"] #[inline(always)] - pub fn tcmp1(&self) -> TCMP1_R { - TCMP1_R::new(((self.bits >> 15) & 1) != 0) + pub fn tcmp1(&self) -> Tcmp1R { + Tcmp1R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Timer comparator 2 Interrupt Flag"] #[inline(always)] - pub fn tcmp2(&self) -> TCMP2_R { - TCMP2_R::new(((self.bits >> 16) & 1) != 0) + pub fn tcmp2(&self) -> Tcmp2R { + Tcmp2R::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bit 0 - TX Complete Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txc(&mut self) -> TXC_W<0> { - TXC_W::new(self) + pub fn txc(&mut self) -> TxcW { + TxcW::new(self, 0) } #[doc = "Bit 1 - TX Buffer Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txbl(&mut self) -> TXBL_W<1> { - TXBL_W::new(self) + pub fn txbl(&mut self) -> TxblW { + TxblW::new(self, 1) } #[doc = "Bit 2 - RX Data Valid Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxdatav(&mut self) -> RXDATAV_W<2> { - RXDATAV_W::new(self) + pub fn rxdatav(&mut self) -> RxdatavW { + RxdatavW::new(self, 2) } #[doc = "Bit 3 - RX Buffer Full Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxfull(&mut self) -> RXFULL_W<3> { - RXFULL_W::new(self) + pub fn rxfull(&mut self) -> RxfullW { + RxfullW::new(self, 3) } #[doc = "Bit 4 - RX Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxof(&mut self) -> RXOF_W<4> { - RXOF_W::new(self) + pub fn rxof(&mut self) -> RxofW { + RxofW::new(self, 4) } #[doc = "Bit 5 - RX Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn rxuf(&mut self) -> RXUF_W<5> { - RXUF_W::new(self) + pub fn rxuf(&mut self) -> RxufW { + RxufW::new(self, 5) } #[doc = "Bit 6 - TX Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txof(&mut self) -> TXOF_W<6> { - TXOF_W::new(self) + pub fn txof(&mut self) -> TxofW { + TxofW::new(self, 6) } #[doc = "Bit 7 - TX Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txuf(&mut self) -> TXUF_W<7> { - TXUF_W::new(self) + pub fn txuf(&mut self) -> TxufW { + TxufW::new(self, 7) } #[doc = "Bit 8 - Parity Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn perr(&mut self) -> PERR_W<8> { - PERR_W::new(self) + pub fn perr(&mut self) -> PerrW { + PerrW::new(self, 8) } #[doc = "Bit 9 - Framing Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ferr(&mut self) -> FERR_W<9> { - FERR_W::new(self) + pub fn ferr(&mut self) -> FerrW { + FerrW::new(self, 9) } #[doc = "Bit 10 - Multi-Processor Address Frame Interrupt"] #[inline(always)] #[must_use] - pub fn mpaf(&mut self) -> MPAF_W<10> { - MPAF_W::new(self) + pub fn mpaf(&mut self) -> MpafW { + MpafW::new(self, 10) } #[doc = "Bit 11 - Chip-Select In Main Mode Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ssm(&mut self) -> SSM_W<11> { - SSM_W::new(self) + pub fn ssm(&mut self) -> SsmW { + SsmW::new(self, 11) } #[doc = "Bit 12 - Collision Check Fail Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ccf(&mut self) -> CCF_W<12> { - CCF_W::new(self) + pub fn ccf(&mut self) -> CcfW { + CcfW::new(self, 12) } #[doc = "Bit 13 - TX Idle Interrupt Flag"] #[inline(always)] #[must_use] - pub fn txidle(&mut self) -> TXIDLE_W<13> { - TXIDLE_W::new(self) + pub fn txidle(&mut self) -> TxidleW { + TxidleW::new(self, 13) } #[doc = "Bit 14 - Timer comparator 0 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn tcmp0(&mut self) -> TCMP0_W<14> { - TCMP0_W::new(self) + pub fn tcmp0(&mut self) -> Tcmp0W { + Tcmp0W::new(self, 14) } #[doc = "Bit 15 - Timer comparator 1 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn tcmp1(&mut self) -> TCMP1_W<15> { - TCMP1_W::new(self) + pub fn tcmp1(&mut self) -> Tcmp1W { + Tcmp1W::new(self, 15) } #[doc = "Bit 16 - Timer comparator 2 Interrupt Flag"] #[inline(always)] #[must_use] - pub fn tcmp2(&mut self) -> TCMP2_W<16> { - TCMP2_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn tcmp2(&mut self) -> Tcmp2W { + Tcmp2W::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0x02"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0x02; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0x02; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/ipversion.rs index 7b81f0e..0452bc5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IPVERSION"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IPVERSION"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/irctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/irctrl.rs index 2bed1a6..3ec2811 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/irctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/irctrl.rs @@ -1,230 +1,201 @@ #[doc = "Register `IRCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IRCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `IREN` reader - Enable IrDA Module"] -pub type IREN_R = crate::BitReader; +pub type IrenR = crate::BitReader; #[doc = "Field `IREN` writer - Enable IrDA Module"] -pub type IREN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRCTRL_SPEC, bool, O>; -#[doc = "Field `IRPW` reader - IrDA TX Pulse Width"] -pub type IRPW_R = crate::FieldReader; +pub type IrenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "IrDA TX Pulse Width\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum IRPW_A { +pub enum Irpw { #[doc = "0: IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1"] - ONE = 0, + One = 0, #[doc = "1: IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1"] - TWO = 1, + Two = 1, #[doc = "2: IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1"] - THREE = 2, + Three = 2, #[doc = "3: IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1"] - FOUR = 3, + Four = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: IRPW_A) -> Self { + fn from(variant: Irpw) -> Self { variant as _ } } -impl IRPW_R { +impl crate::FieldSpec for Irpw { + type Ux = u8; +} +impl crate::IsEnum for Irpw {} +#[doc = "Field `IRPW` reader - IrDA TX Pulse Width"] +pub type IrpwR = crate::FieldReader; +impl IrpwR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> IRPW_A { + pub const fn variant(&self) -> Irpw { match self.bits { - 0 => IRPW_A::ONE, - 1 => IRPW_A::TWO, - 2 => IRPW_A::THREE, - 3 => IRPW_A::FOUR, + 0 => Irpw::One, + 1 => Irpw::Two, + 2 => Irpw::Three, + 3 => Irpw::Four, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == IRPW_A::ONE + *self == Irpw::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == IRPW_A::TWO + *self == Irpw::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == IRPW_A::THREE + *self == Irpw::Three } - #[doc = "Checks if the value of the field is `FOUR`"] + #[doc = "IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1"] #[inline(always)] pub fn is_four(&self) -> bool { - *self == IRPW_A::FOUR + *self == Irpw::Four } } #[doc = "Field `IRPW` writer - IrDA TX Pulse Width"] -pub type IRPW_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, IRCTRL_SPEC, u8, IRPW_A, 2, O>; -impl<'a, const O: u8> IRPW_W<'a, O> { +pub type IrpwW<'a, REG> = crate::FieldWriter<'a, REG, 2, Irpw, crate::Safe>; +impl<'a, REG> IrpwW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(IRPW_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Irpw::One) } #[doc = "IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(IRPW_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Irpw::Two) } #[doc = "IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(IRPW_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Irpw::Three) } #[doc = "IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1"] #[inline(always)] - pub fn four(self) -> &'a mut W { - self.variant(IRPW_A::FOUR) + pub fn four(self) -> &'a mut crate::W { + self.variant(Irpw::Four) } } -#[doc = "Field `IRFILT` reader - IrDA RX Filter"] -pub type IRFILT_R = crate::BitReader; #[doc = "IrDA RX Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IRFILT_A { +pub enum Irfilt { #[doc = "0: No filter enabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Filter enabled. IrDA pulse must be high for at least 5 consecutive clock cycles to be detected"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IRFILT_A) -> Self { + fn from(variant: Irfilt) -> Self { variant as u8 != 0 } } -impl IRFILT_R { +#[doc = "Field `IRFILT` reader - IrDA RX Filter"] +pub type IrfiltR = crate::BitReader; +impl IrfiltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> IRFILT_A { + pub const fn variant(&self) -> Irfilt { match self.bits { - false => IRFILT_A::DISABLE, - true => IRFILT_A::ENABLE, + false => Irfilt::Disable, + true => Irfilt::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "No filter enabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == IRFILT_A::DISABLE + *self == Irfilt::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Filter enabled. IrDA pulse must be high for at least 5 consecutive clock cycles to be detected"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == IRFILT_A::ENABLE + *self == Irfilt::Enable } } #[doc = "Field `IRFILT` writer - IrDA RX Filter"] -pub type IRFILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRCTRL_SPEC, IRFILT_A, O>; -impl<'a, const O: u8> IRFILT_W<'a, O> { +pub type IrfiltW<'a, REG> = crate::BitWriter<'a, REG, Irfilt>; +impl<'a, REG> IrfiltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "No filter enabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(IRFILT_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Irfilt::Disable) } #[doc = "Filter enabled. IrDA pulse must be high for at least 5 consecutive clock cycles to be detected"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(IRFILT_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Irfilt::Enable) } } impl R { #[doc = "Bit 0 - Enable IrDA Module"] #[inline(always)] - pub fn iren(&self) -> IREN_R { - IREN_R::new((self.bits & 1) != 0) + pub fn iren(&self) -> IrenR { + IrenR::new((self.bits & 1) != 0) } #[doc = "Bits 1:2 - IrDA TX Pulse Width"] #[inline(always)] - pub fn irpw(&self) -> IRPW_R { - IRPW_R::new(((self.bits >> 1) & 3) as u8) + pub fn irpw(&self) -> IrpwR { + IrpwR::new(((self.bits >> 1) & 3) as u8) } #[doc = "Bit 3 - IrDA RX Filter"] #[inline(always)] - pub fn irfilt(&self) -> IRFILT_R { - IRFILT_R::new(((self.bits >> 3) & 1) != 0) + pub fn irfilt(&self) -> IrfiltR { + IrfiltR::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable IrDA Module"] #[inline(always)] #[must_use] - pub fn iren(&mut self) -> IREN_W<0> { - IREN_W::new(self) + pub fn iren(&mut self) -> IrenW { + IrenW::new(self, 0) } #[doc = "Bits 1:2 - IrDA TX Pulse Width"] #[inline(always)] #[must_use] - pub fn irpw(&mut self) -> IRPW_W<1> { - IRPW_W::new(self) + pub fn irpw(&mut self) -> IrpwW { + IrpwW::new(self, 1) } #[doc = "Bit 3 - IrDA RX Filter"] #[inline(always)] #[must_use] - pub fn irfilt(&mut self) -> IRFILT_W<3> { - IRFILT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn irfilt(&mut self) -> IrfiltW { + IrfiltW::new(self, 3) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irctrl](index.html) module"] -pub struct IRCTRL_SPEC; -impl crate::RegisterSpec for IRCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`irctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`irctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IrctrlSpec; +impl crate::RegisterSpec for IrctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [irctrl::R](R) reader structure"] -impl crate::Readable for IRCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [irctrl::W](W) writer structure"] -impl crate::Writable for IRCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`irctrl::R`](R) reader structure"] +impl crate::Readable for IrctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`irctrl::W`](W) writer structure"] +impl crate::Writable for IrctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IRCTRL to value 0"] -impl crate::Resettable for IRCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IrctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/rxdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/rxdata.rs index 6197259..b8a3ba6 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/rxdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/rxdata.rs @@ -1,37 +1,22 @@ #[doc = "Register `RXDATA` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATA` reader - RX Data"] -pub type RXDATA_R = crate::FieldReader; +pub type RxdataR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - RX Data"] #[inline(always)] - pub fn rxdata(&self) -> RXDATA_R { - RXDATA_R::new((self.bits & 0xff) as u8) + pub fn rxdata(&self) -> RxdataR { + RxdataR::new((self.bits & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdata](index.html) module"] -pub struct RXDATA_SPEC; -impl crate::RegisterSpec for RXDATA_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdata::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdataSpec; +impl crate::RegisterSpec for RxdataSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdata::R](R) reader structure"] -impl crate::Readable for RXDATA_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdata::R`](R) reader structure"] +impl crate::Readable for RxdataSpec {} #[doc = "`reset()` method sets RXDATA to value 0"] -impl crate::Resettable for RXDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/rxdatax.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/rxdatax.rs index 4e61376..5ed9484 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/rxdatax.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/rxdatax.rs @@ -1,51 +1,36 @@ #[doc = "Register `RXDATAX` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATA` reader - RX Data"] -pub type RXDATA_R = crate::FieldReader; +pub type RxdataR = crate::FieldReader; #[doc = "Field `PERR` reader - Data Parity Error"] -pub type PERR_R = crate::BitReader; +pub type PerrR = crate::BitReader; #[doc = "Field `FERR` reader - Data Framing Error"] -pub type FERR_R = crate::BitReader; +pub type FerrR = crate::BitReader; impl R { #[doc = "Bits 0:8 - RX Data"] #[inline(always)] - pub fn rxdata(&self) -> RXDATA_R { - RXDATA_R::new((self.bits & 0x01ff) as u16) + pub fn rxdata(&self) -> RxdataR { + RxdataR::new((self.bits & 0x01ff) as u16) } #[doc = "Bit 14 - Data Parity Error"] #[inline(always)] - pub fn perr(&self) -> PERR_R { - PERR_R::new(((self.bits >> 14) & 1) != 0) + pub fn perr(&self) -> PerrR { + PerrR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Data Framing Error"] #[inline(always)] - pub fn ferr(&self) -> FERR_R { - FERR_R::new(((self.bits >> 15) & 1) != 0) + pub fn ferr(&self) -> FerrR { + FerrR::new(((self.bits >> 15) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdatax](index.html) module"] -pub struct RXDATAX_SPEC; -impl crate::RegisterSpec for RXDATAX_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdatax::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdataxSpec; +impl crate::RegisterSpec for RxdataxSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdatax::R](R) reader structure"] -impl crate::Readable for RXDATAX_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdatax::R`](R) reader structure"] +impl crate::Readable for RxdataxSpec {} #[doc = "`reset()` method sets RXDATAX to value 0"] -impl crate::Resettable for RXDATAX_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdataxSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/rxdataxp.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/rxdataxp.rs index c9f077a..d8b4b08 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/rxdataxp.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/rxdataxp.rs @@ -1,51 +1,36 @@ #[doc = "Register `RXDATAXP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATAP` reader - RX Data Peek"] -pub type RXDATAP_R = crate::FieldReader; +pub type RxdatapR = crate::FieldReader; #[doc = "Field `PERRP` reader - Data Parity Error Peek"] -pub type PERRP_R = crate::BitReader; +pub type PerrpR = crate::BitReader; #[doc = "Field `FERRP` reader - Data Framing Error Peek"] -pub type FERRP_R = crate::BitReader; +pub type FerrpR = crate::BitReader; impl R { #[doc = "Bits 0:8 - RX Data Peek"] #[inline(always)] - pub fn rxdatap(&self) -> RXDATAP_R { - RXDATAP_R::new((self.bits & 0x01ff) as u16) + pub fn rxdatap(&self) -> RxdatapR { + RxdatapR::new((self.bits & 0x01ff) as u16) } #[doc = "Bit 14 - Data Parity Error Peek"] #[inline(always)] - pub fn perrp(&self) -> PERRP_R { - PERRP_R::new(((self.bits >> 14) & 1) != 0) + pub fn perrp(&self) -> PerrpR { + PerrpR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Data Framing Error Peek"] #[inline(always)] - pub fn ferrp(&self) -> FERRP_R { - FERRP_R::new(((self.bits >> 15) & 1) != 0) + pub fn ferrp(&self) -> FerrpR { + FerrpR::new(((self.bits >> 15) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdataxp](index.html) module"] -pub struct RXDATAXP_SPEC; -impl crate::RegisterSpec for RXDATAXP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdataxp::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdataxpSpec; +impl crate::RegisterSpec for RxdataxpSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdataxp::R](R) reader structure"] -impl crate::Readable for RXDATAXP_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdataxp::R`](R) reader structure"] +impl crate::Readable for RxdataxpSpec {} #[doc = "`reset()` method sets RXDATAXP to value 0"] -impl crate::Resettable for RXDATAXP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdataxpSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/rxdouble.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/rxdouble.rs index d739f89..dcc567b 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/rxdouble.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/rxdouble.rs @@ -1,44 +1,29 @@ #[doc = "Register `RXDOUBLE` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATA0` reader - RX Data 0"] -pub type RXDATA0_R = crate::FieldReader; +pub type Rxdata0R = crate::FieldReader; #[doc = "Field `RXDATA1` reader - RX Data 1"] -pub type RXDATA1_R = crate::FieldReader; +pub type Rxdata1R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - RX Data 0"] #[inline(always)] - pub fn rxdata0(&self) -> RXDATA0_R { - RXDATA0_R::new((self.bits & 0xff) as u8) + pub fn rxdata0(&self) -> Rxdata0R { + Rxdata0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - RX Data 1"] #[inline(always)] - pub fn rxdata1(&self) -> RXDATA1_R { - RXDATA1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn rxdata1(&self) -> Rxdata1R { + Rxdata1R::new(((self.bits >> 8) & 0xff) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdouble](index.html) module"] -pub struct RXDOUBLE_SPEC; -impl crate::RegisterSpec for RXDOUBLE_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdouble::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdoubleSpec; +impl crate::RegisterSpec for RxdoubleSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdouble::R](R) reader structure"] -impl crate::Readable for RXDOUBLE_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdouble::R`](R) reader structure"] +impl crate::Readable for RxdoubleSpec {} #[doc = "`reset()` method sets RXDOUBLE to value 0"] -impl crate::Resettable for RXDOUBLE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdoubleSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/rxdoublex.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/rxdoublex.rs index 9a22010..2459281 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/rxdoublex.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/rxdoublex.rs @@ -1,72 +1,57 @@ #[doc = "Register `RXDOUBLEX` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATA0` reader - RX Data 0"] -pub type RXDATA0_R = crate::FieldReader; +pub type Rxdata0R = crate::FieldReader; #[doc = "Field `PERR0` reader - Data Parity Error 0"] -pub type PERR0_R = crate::BitReader; +pub type Perr0R = crate::BitReader; #[doc = "Field `FERR0` reader - Data Framing Error 0"] -pub type FERR0_R = crate::BitReader; +pub type Ferr0R = crate::BitReader; #[doc = "Field `RXDATA1` reader - RX Data 1"] -pub type RXDATA1_R = crate::FieldReader; +pub type Rxdata1R = crate::FieldReader; #[doc = "Field `PERR1` reader - Data Parity Error 1"] -pub type PERR1_R = crate::BitReader; +pub type Perr1R = crate::BitReader; #[doc = "Field `FERR1` reader - Data Framing Error 1"] -pub type FERR1_R = crate::BitReader; +pub type Ferr1R = crate::BitReader; impl R { #[doc = "Bits 0:8 - RX Data 0"] #[inline(always)] - pub fn rxdata0(&self) -> RXDATA0_R { - RXDATA0_R::new((self.bits & 0x01ff) as u16) + pub fn rxdata0(&self) -> Rxdata0R { + Rxdata0R::new((self.bits & 0x01ff) as u16) } #[doc = "Bit 14 - Data Parity Error 0"] #[inline(always)] - pub fn perr0(&self) -> PERR0_R { - PERR0_R::new(((self.bits >> 14) & 1) != 0) + pub fn perr0(&self) -> Perr0R { + Perr0R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Data Framing Error 0"] #[inline(always)] - pub fn ferr0(&self) -> FERR0_R { - FERR0_R::new(((self.bits >> 15) & 1) != 0) + pub fn ferr0(&self) -> Ferr0R { + Ferr0R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:24 - RX Data 1"] #[inline(always)] - pub fn rxdata1(&self) -> RXDATA1_R { - RXDATA1_R::new(((self.bits >> 16) & 0x01ff) as u16) + pub fn rxdata1(&self) -> Rxdata1R { + Rxdata1R::new(((self.bits >> 16) & 0x01ff) as u16) } #[doc = "Bit 30 - Data Parity Error 1"] #[inline(always)] - pub fn perr1(&self) -> PERR1_R { - PERR1_R::new(((self.bits >> 30) & 1) != 0) + pub fn perr1(&self) -> Perr1R { + Perr1R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Data Framing Error 1"] #[inline(always)] - pub fn ferr1(&self) -> FERR1_R { - FERR1_R::new(((self.bits >> 31) & 1) != 0) + pub fn ferr1(&self) -> Ferr1R { + Ferr1R::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdoublex](index.html) module"] -pub struct RXDOUBLEX_SPEC; -impl crate::RegisterSpec for RXDOUBLEX_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdoublex::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdoublexSpec; +impl crate::RegisterSpec for RxdoublexSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdoublex::R](R) reader structure"] -impl crate::Readable for RXDOUBLEX_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdoublex::R`](R) reader structure"] +impl crate::Readable for RxdoublexSpec {} #[doc = "`reset()` method sets RXDOUBLEX to value 0"] -impl crate::Resettable for RXDOUBLEX_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdoublexSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/rxdoublexp.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/rxdoublexp.rs index f83f335..d084e17 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/rxdoublexp.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/rxdoublexp.rs @@ -1,72 +1,57 @@ #[doc = "Register `RXDOUBLEXP` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXDATAP0` reader - RX Data 0 Peek"] -pub type RXDATAP0_R = crate::FieldReader; +pub type Rxdatap0R = crate::FieldReader; #[doc = "Field `PERRP0` reader - Data Parity Error 0 Peek"] -pub type PERRP0_R = crate::BitReader; +pub type Perrp0R = crate::BitReader; #[doc = "Field `FERRP0` reader - Data Framing Error 0 Peek"] -pub type FERRP0_R = crate::BitReader; +pub type Ferrp0R = crate::BitReader; #[doc = "Field `RXDATAP1` reader - RX Data 1 Peek"] -pub type RXDATAP1_R = crate::FieldReader; +pub type Rxdatap1R = crate::FieldReader; #[doc = "Field `PERRP1` reader - Data Parity Error 1 Peek"] -pub type PERRP1_R = crate::BitReader; +pub type Perrp1R = crate::BitReader; #[doc = "Field `FERRP1` reader - Data Framing Error 1 Peek"] -pub type FERRP1_R = crate::BitReader; +pub type Ferrp1R = crate::BitReader; impl R { #[doc = "Bits 0:8 - RX Data 0 Peek"] #[inline(always)] - pub fn rxdatap0(&self) -> RXDATAP0_R { - RXDATAP0_R::new((self.bits & 0x01ff) as u16) + pub fn rxdatap0(&self) -> Rxdatap0R { + Rxdatap0R::new((self.bits & 0x01ff) as u16) } #[doc = "Bit 14 - Data Parity Error 0 Peek"] #[inline(always)] - pub fn perrp0(&self) -> PERRP0_R { - PERRP0_R::new(((self.bits >> 14) & 1) != 0) + pub fn perrp0(&self) -> Perrp0R { + Perrp0R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Data Framing Error 0 Peek"] #[inline(always)] - pub fn ferrp0(&self) -> FERRP0_R { - FERRP0_R::new(((self.bits >> 15) & 1) != 0) + pub fn ferrp0(&self) -> Ferrp0R { + Ferrp0R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:24 - RX Data 1 Peek"] #[inline(always)] - pub fn rxdatap1(&self) -> RXDATAP1_R { - RXDATAP1_R::new(((self.bits >> 16) & 0x01ff) as u16) + pub fn rxdatap1(&self) -> Rxdatap1R { + Rxdatap1R::new(((self.bits >> 16) & 0x01ff) as u16) } #[doc = "Bit 30 - Data Parity Error 1 Peek"] #[inline(always)] - pub fn perrp1(&self) -> PERRP1_R { - PERRP1_R::new(((self.bits >> 30) & 1) != 0) + pub fn perrp1(&self) -> Perrp1R { + Perrp1R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Data Framing Error 1 Peek"] #[inline(always)] - pub fn ferrp1(&self) -> FERRP1_R { - FERRP1_R::new(((self.bits >> 31) & 1) != 0) + pub fn ferrp1(&self) -> Ferrp1R { + Ferrp1R::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdoublexp](index.html) module"] -pub struct RXDOUBLEXP_SPEC; -impl crate::RegisterSpec for RXDOUBLEXP_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`rxdoublexp::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RxdoublexpSpec; +impl crate::RegisterSpec for RxdoublexpSpec { type Ux = u32; } -#[doc = "`read()` method returns [rxdoublexp::R](R) reader structure"] -impl crate::Readable for RXDOUBLEXP_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`rxdoublexp::R`](R) reader structure"] +impl crate::Readable for RxdoublexpSpec {} #[doc = "`reset()` method sets RXDOUBLEXP to value 0"] -impl crate::Resettable for RXDOUBLEXP_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for RxdoublexpSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/status.rs index 891a183..406fae2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/status.rs @@ -1,142 +1,127 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `RXENS` reader - Receiver Enable Status"] -pub type RXENS_R = crate::BitReader; +pub type RxensR = crate::BitReader; #[doc = "Field `TXENS` reader - Transmitter Enable Status"] -pub type TXENS_R = crate::BitReader; +pub type TxensR = crate::BitReader; #[doc = "Field `MASTER` reader - SPI Main Mode"] -pub type MASTER_R = crate::BitReader; +pub type MasterR = crate::BitReader; #[doc = "Field `RXBLOCK` reader - Block Incoming Data"] -pub type RXBLOCK_R = crate::BitReader; +pub type RxblockR = crate::BitReader; #[doc = "Field `TXTRI` reader - Transmitter Tristated"] -pub type TXTRI_R = crate::BitReader; +pub type TxtriR = crate::BitReader; #[doc = "Field `TXC` reader - TX Complete"] -pub type TXC_R = crate::BitReader; +pub type TxcR = crate::BitReader; #[doc = "Field `TXBL` reader - TX Buffer Level"] -pub type TXBL_R = crate::BitReader; +pub type TxblR = crate::BitReader; #[doc = "Field `RXDATAV` reader - RX Data Valid"] -pub type RXDATAV_R = crate::BitReader; +pub type RxdatavR = crate::BitReader; #[doc = "Field `RXFULL` reader - RX FIFO Full"] -pub type RXFULL_R = crate::BitReader; +pub type RxfullR = crate::BitReader; #[doc = "Field `TXBDRIGHT` reader - TX Buffer Expects Double Right Data"] -pub type TXBDRIGHT_R = crate::BitReader; +pub type TxbdrightR = crate::BitReader; #[doc = "Field `TXBSRIGHT` reader - TX Buffer Expects Single Right Data"] -pub type TXBSRIGHT_R = crate::BitReader; +pub type TxbsrightR = crate::BitReader; #[doc = "Field `RXDATAVRIGHT` reader - RX Data Right"] -pub type RXDATAVRIGHT_R = crate::BitReader; +pub type RxdatavrightR = crate::BitReader; #[doc = "Field `RXFULLRIGHT` reader - RX Full of Right Data"] -pub type RXFULLRIGHT_R = crate::BitReader; +pub type RxfullrightR = crate::BitReader; #[doc = "Field `TXIDLE` reader - TX Idle"] -pub type TXIDLE_R = crate::BitReader; +pub type TxidleR = crate::BitReader; #[doc = "Field `TIMERRESTARTED` reader - The USART Timer restarted itself"] -pub type TIMERRESTARTED_R = crate::BitReader; +pub type TimerrestartedR = crate::BitReader; #[doc = "Field `TXBUFCNT` reader - TX Buffer Count"] -pub type TXBUFCNT_R = crate::FieldReader; +pub type TxbufcntR = crate::FieldReader; impl R { #[doc = "Bit 0 - Receiver Enable Status"] #[inline(always)] - pub fn rxens(&self) -> RXENS_R { - RXENS_R::new((self.bits & 1) != 0) + pub fn rxens(&self) -> RxensR { + RxensR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transmitter Enable Status"] #[inline(always)] - pub fn txens(&self) -> TXENS_R { - TXENS_R::new(((self.bits >> 1) & 1) != 0) + pub fn txens(&self) -> TxensR { + TxensR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - SPI Main Mode"] #[inline(always)] - pub fn master(&self) -> MASTER_R { - MASTER_R::new(((self.bits >> 2) & 1) != 0) + pub fn master(&self) -> MasterR { + MasterR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Block Incoming Data"] #[inline(always)] - pub fn rxblock(&self) -> RXBLOCK_R { - RXBLOCK_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxblock(&self) -> RxblockR { + RxblockR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Transmitter Tristated"] #[inline(always)] - pub fn txtri(&self) -> TXTRI_R { - TXTRI_R::new(((self.bits >> 4) & 1) != 0) + pub fn txtri(&self) -> TxtriR { + TxtriR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - TX Complete"] #[inline(always)] - pub fn txc(&self) -> TXC_R { - TXC_R::new(((self.bits >> 5) & 1) != 0) + pub fn txc(&self) -> TxcR { + TxcR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - TX Buffer Level"] #[inline(always)] - pub fn txbl(&self) -> TXBL_R { - TXBL_R::new(((self.bits >> 6) & 1) != 0) + pub fn txbl(&self) -> TxblR { + TxblR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - RX Data Valid"] #[inline(always)] - pub fn rxdatav(&self) -> RXDATAV_R { - RXDATAV_R::new(((self.bits >> 7) & 1) != 0) + pub fn rxdatav(&self) -> RxdatavR { + RxdatavR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - RX FIFO Full"] #[inline(always)] - pub fn rxfull(&self) -> RXFULL_R { - RXFULL_R::new(((self.bits >> 8) & 1) != 0) + pub fn rxfull(&self) -> RxfullR { + RxfullR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - TX Buffer Expects Double Right Data"] #[inline(always)] - pub fn txbdright(&self) -> TXBDRIGHT_R { - TXBDRIGHT_R::new(((self.bits >> 9) & 1) != 0) + pub fn txbdright(&self) -> TxbdrightR { + TxbdrightR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - TX Buffer Expects Single Right Data"] #[inline(always)] - pub fn txbsright(&self) -> TXBSRIGHT_R { - TXBSRIGHT_R::new(((self.bits >> 10) & 1) != 0) + pub fn txbsright(&self) -> TxbsrightR { + TxbsrightR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - RX Data Right"] #[inline(always)] - pub fn rxdatavright(&self) -> RXDATAVRIGHT_R { - RXDATAVRIGHT_R::new(((self.bits >> 11) & 1) != 0) + pub fn rxdatavright(&self) -> RxdatavrightR { + RxdatavrightR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - RX Full of Right Data"] #[inline(always)] - pub fn rxfullright(&self) -> RXFULLRIGHT_R { - RXFULLRIGHT_R::new(((self.bits >> 12) & 1) != 0) + pub fn rxfullright(&self) -> RxfullrightR { + RxfullrightR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - TX Idle"] #[inline(always)] - pub fn txidle(&self) -> TXIDLE_R { - TXIDLE_R::new(((self.bits >> 13) & 1) != 0) + pub fn txidle(&self) -> TxidleR { + TxidleR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - The USART Timer restarted itself"] #[inline(always)] - pub fn timerrestarted(&self) -> TIMERRESTARTED_R { - TIMERRESTARTED_R::new(((self.bits >> 14) & 1) != 0) + pub fn timerrestarted(&self) -> TimerrestartedR { + TimerrestartedR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bits 16:17 - TX Buffer Count"] #[inline(always)] - pub fn txbufcnt(&self) -> TXBUFCNT_R { - TXBUFCNT_R::new(((self.bits >> 16) & 3) as u8) + pub fn txbufcnt(&self) -> TxbufcntR { + TxbufcntR::new(((self.bits >> 16) & 3) as u8) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0x2040"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0x2040; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0x2040; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/timecmp0.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/timecmp0.rs index e24a642..6b3491a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/timecmp0.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/timecmp0.rs @@ -1,332 +1,311 @@ #[doc = "Register `TIMECMP0` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMECMP0` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TCMPVAL` reader - Timer comparator 0."] -pub type TCMPVAL_R = crate::FieldReader; +pub type TcmpvalR = crate::FieldReader; #[doc = "Field `TCMPVAL` writer - Timer comparator 0."] -pub type TCMPVAL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMECMP0_SPEC, u8, u8, 8, O>; -#[doc = "Field `TSTART` reader - Timer start source"] -pub type TSTART_R = crate::FieldReader; +pub type TcmpvalW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Timer start source\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TSTART_A { +pub enum Tstart { #[doc = "0: Comparator 0 is disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Comparator 0 and timer are started at TX end of frame"] - TXEOF = 1, + Txeof = 1, #[doc = "2: Comparator 0 and timer are started at TX Complete"] - TXC = 2, + Txc = 2, #[doc = "3: Comparator 0 and timer are started at RX going going Active (default: low)"] - RXACT = 3, + Rxact = 3, #[doc = "4: Comparator 0 and timer are started at RX end of frame"] - RXEOF = 4, + Rxeof = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TSTART_A) -> Self { + fn from(variant: Tstart) -> Self { variant as _ } } -impl TSTART_R { +impl crate::FieldSpec for Tstart { + type Ux = u8; +} +impl crate::IsEnum for Tstart {} +#[doc = "Field `TSTART` reader - Timer start source"] +pub type TstartR = crate::FieldReader; +impl TstartR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TSTART_A::DISABLE), - 1 => Some(TSTART_A::TXEOF), - 2 => Some(TSTART_A::TXC), - 3 => Some(TSTART_A::RXACT), - 4 => Some(TSTART_A::RXEOF), + 0 => Some(Tstart::Disable), + 1 => Some(Tstart::Txeof), + 2 => Some(Tstart::Txc), + 3 => Some(Tstart::Rxact), + 4 => Some(Tstart::Rxeof), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Comparator 0 is disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == TSTART_A::DISABLE + *self == Tstart::Disable } - #[doc = "Checks if the value of the field is `TXEOF`"] + #[doc = "Comparator 0 and timer are started at TX end of frame"] #[inline(always)] pub fn is_txeof(&self) -> bool { - *self == TSTART_A::TXEOF + *self == Tstart::Txeof } - #[doc = "Checks if the value of the field is `TXC`"] + #[doc = "Comparator 0 and timer are started at TX Complete"] #[inline(always)] pub fn is_txc(&self) -> bool { - *self == TSTART_A::TXC + *self == Tstart::Txc } - #[doc = "Checks if the value of the field is `RXACT`"] + #[doc = "Comparator 0 and timer are started at RX going going Active (default: low)"] #[inline(always)] pub fn is_rxact(&self) -> bool { - *self == TSTART_A::RXACT + *self == Tstart::Rxact } - #[doc = "Checks if the value of the field is `RXEOF`"] + #[doc = "Comparator 0 and timer are started at RX end of frame"] #[inline(always)] pub fn is_rxeof(&self) -> bool { - *self == TSTART_A::RXEOF + *self == Tstart::Rxeof } } #[doc = "Field `TSTART` writer - Timer start source"] -pub type TSTART_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMECMP0_SPEC, u8, TSTART_A, 3, O>; -impl<'a, const O: u8> TSTART_W<'a, O> { +pub type TstartW<'a, REG> = crate::FieldWriter<'a, REG, 3, Tstart>; +impl<'a, REG> TstartW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Comparator 0 is disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(TSTART_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Tstart::Disable) } #[doc = "Comparator 0 and timer are started at TX end of frame"] #[inline(always)] - pub fn txeof(self) -> &'a mut W { - self.variant(TSTART_A::TXEOF) + pub fn txeof(self) -> &'a mut crate::W { + self.variant(Tstart::Txeof) } #[doc = "Comparator 0 and timer are started at TX Complete"] #[inline(always)] - pub fn txc(self) -> &'a mut W { - self.variant(TSTART_A::TXC) + pub fn txc(self) -> &'a mut crate::W { + self.variant(Tstart::Txc) } #[doc = "Comparator 0 and timer are started at RX going going Active (default: low)"] #[inline(always)] - pub fn rxact(self) -> &'a mut W { - self.variant(TSTART_A::RXACT) + pub fn rxact(self) -> &'a mut crate::W { + self.variant(Tstart::Rxact) } #[doc = "Comparator 0 and timer are started at RX end of frame"] #[inline(always)] - pub fn rxeof(self) -> &'a mut W { - self.variant(TSTART_A::RXEOF) + pub fn rxeof(self) -> &'a mut crate::W { + self.variant(Tstart::Rxeof) } } -#[doc = "Field `TSTOP` reader - Source used to disable comparator 0"] -pub type TSTOP_R = crate::FieldReader; #[doc = "Source used to disable comparator 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TSTOP_A { +pub enum Tstop { #[doc = "0: Comparator 0 is disabled when the counter equals TCMPVAL and triggers a TCMP0 event"] - TCMP0 = 0, + Tcmp0 = 0, #[doc = "1: Comparator 0 is disabled at TX start TX Engine"] - TXST = 1, + Txst = 1, #[doc = "2: Comparator 0 is disabled on RX going going Active (default: low)"] - RXACT = 2, + Rxact = 2, #[doc = "3: Comparator 0 is disabled on RX going Inactive"] - RXACTN = 3, + Rxactn = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TSTOP_A) -> Self { + fn from(variant: Tstop) -> Self { variant as _ } } -impl TSTOP_R { +impl crate::FieldSpec for Tstop { + type Ux = u8; +} +impl crate::IsEnum for Tstop {} +#[doc = "Field `TSTOP` reader - Source used to disable comparator 0"] +pub type TstopR = crate::FieldReader; +impl TstopR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TSTOP_A::TCMP0), - 1 => Some(TSTOP_A::TXST), - 2 => Some(TSTOP_A::RXACT), - 3 => Some(TSTOP_A::RXACTN), + 0 => Some(Tstop::Tcmp0), + 1 => Some(Tstop::Txst), + 2 => Some(Tstop::Rxact), + 3 => Some(Tstop::Rxactn), _ => None, } } - #[doc = "Checks if the value of the field is `TCMP0`"] + #[doc = "Comparator 0 is disabled when the counter equals TCMPVAL and triggers a TCMP0 event"] #[inline(always)] pub fn is_tcmp0(&self) -> bool { - *self == TSTOP_A::TCMP0 + *self == Tstop::Tcmp0 } - #[doc = "Checks if the value of the field is `TXST`"] + #[doc = "Comparator 0 is disabled at TX start TX Engine"] #[inline(always)] pub fn is_txst(&self) -> bool { - *self == TSTOP_A::TXST + *self == Tstop::Txst } - #[doc = "Checks if the value of the field is `RXACT`"] + #[doc = "Comparator 0 is disabled on RX going going Active (default: low)"] #[inline(always)] pub fn is_rxact(&self) -> bool { - *self == TSTOP_A::RXACT + *self == Tstop::Rxact } - #[doc = "Checks if the value of the field is `RXACTN`"] + #[doc = "Comparator 0 is disabled on RX going Inactive"] #[inline(always)] pub fn is_rxactn(&self) -> bool { - *self == TSTOP_A::RXACTN + *self == Tstop::Rxactn } } #[doc = "Field `TSTOP` writer - Source used to disable comparator 0"] -pub type TSTOP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMECMP0_SPEC, u8, TSTOP_A, 3, O>; -impl<'a, const O: u8> TSTOP_W<'a, O> { +pub type TstopW<'a, REG> = crate::FieldWriter<'a, REG, 3, Tstop>; +impl<'a, REG> TstopW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Comparator 0 is disabled when the counter equals TCMPVAL and triggers a TCMP0 event"] #[inline(always)] - pub fn tcmp0(self) -> &'a mut W { - self.variant(TSTOP_A::TCMP0) + pub fn tcmp0(self) -> &'a mut crate::W { + self.variant(Tstop::Tcmp0) } #[doc = "Comparator 0 is disabled at TX start TX Engine"] #[inline(always)] - pub fn txst(self) -> &'a mut W { - self.variant(TSTOP_A::TXST) + pub fn txst(self) -> &'a mut crate::W { + self.variant(Tstop::Txst) } #[doc = "Comparator 0 is disabled on RX going going Active (default: low)"] #[inline(always)] - pub fn rxact(self) -> &'a mut W { - self.variant(TSTOP_A::RXACT) + pub fn rxact(self) -> &'a mut crate::W { + self.variant(Tstop::Rxact) } #[doc = "Comparator 0 is disabled on RX going Inactive"] #[inline(always)] - pub fn rxactn(self) -> &'a mut W { - self.variant(TSTOP_A::RXACTN) + pub fn rxactn(self) -> &'a mut crate::W { + self.variant(Tstop::Rxactn) } } -#[doc = "Field `RESTARTEN` reader - Restart Timer on TCMP0"] -pub type RESTARTEN_R = crate::BitReader; #[doc = "Restart Timer on TCMP0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RESTARTEN_A { +pub enum Restarten { #[doc = "0: Disable the timer restarting on TCMP0"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enable the timer restarting on TCMP0"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RESTARTEN_A) -> Self { + fn from(variant: Restarten) -> Self { variant as u8 != 0 } } -impl RESTARTEN_R { +#[doc = "Field `RESTARTEN` reader - Restart Timer on TCMP0"] +pub type RestartenR = crate::BitReader; +impl RestartenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RESTARTEN_A { + pub const fn variant(&self) -> Restarten { match self.bits { - false => RESTARTEN_A::DISABLE, - true => RESTARTEN_A::ENABLE, + false => Restarten::Disable, + true => Restarten::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable the timer restarting on TCMP0"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RESTARTEN_A::DISABLE + *self == Restarten::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enable the timer restarting on TCMP0"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RESTARTEN_A::ENABLE + *self == Restarten::Enable } } #[doc = "Field `RESTARTEN` writer - Restart Timer on TCMP0"] -pub type RESTARTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMECMP0_SPEC, RESTARTEN_A, O>; -impl<'a, const O: u8> RESTARTEN_W<'a, O> { +pub type RestartenW<'a, REG> = crate::BitWriter<'a, REG, Restarten>; +impl<'a, REG> RestartenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable the timer restarting on TCMP0"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RESTARTEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Restarten::Disable) } #[doc = "Enable the timer restarting on TCMP0"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RESTARTEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Restarten::Enable) } } impl R { #[doc = "Bits 0:7 - Timer comparator 0."] #[inline(always)] - pub fn tcmpval(&self) -> TCMPVAL_R { - TCMPVAL_R::new((self.bits & 0xff) as u8) + pub fn tcmpval(&self) -> TcmpvalR { + TcmpvalR::new((self.bits & 0xff) as u8) } #[doc = "Bits 16:18 - Timer start source"] #[inline(always)] - pub fn tstart(&self) -> TSTART_R { - TSTART_R::new(((self.bits >> 16) & 7) as u8) + pub fn tstart(&self) -> TstartR { + TstartR::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Source used to disable comparator 0"] #[inline(always)] - pub fn tstop(&self) -> TSTOP_R { - TSTOP_R::new(((self.bits >> 20) & 7) as u8) + pub fn tstop(&self) -> TstopR { + TstopR::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bit 24 - Restart Timer on TCMP0"] #[inline(always)] - pub fn restarten(&self) -> RESTARTEN_R { - RESTARTEN_R::new(((self.bits >> 24) & 1) != 0) + pub fn restarten(&self) -> RestartenR { + RestartenR::new(((self.bits >> 24) & 1) != 0) } } impl W { #[doc = "Bits 0:7 - Timer comparator 0."] #[inline(always)] #[must_use] - pub fn tcmpval(&mut self) -> TCMPVAL_W<0> { - TCMPVAL_W::new(self) + pub fn tcmpval(&mut self) -> TcmpvalW { + TcmpvalW::new(self, 0) } #[doc = "Bits 16:18 - Timer start source"] #[inline(always)] #[must_use] - pub fn tstart(&mut self) -> TSTART_W<16> { - TSTART_W::new(self) + pub fn tstart(&mut self) -> TstartW { + TstartW::new(self, 16) } #[doc = "Bits 20:22 - Source used to disable comparator 0"] #[inline(always)] #[must_use] - pub fn tstop(&mut self) -> TSTOP_W<20> { - TSTOP_W::new(self) + pub fn tstop(&mut self) -> TstopW { + TstopW::new(self, 20) } #[doc = "Bit 24 - Restart Timer on TCMP0"] #[inline(always)] #[must_use] - pub fn restarten(&mut self) -> RESTARTEN_W<24> { - RESTARTEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn restarten(&mut self) -> RestartenW { + RestartenW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timecmp0](index.html) module"] -pub struct TIMECMP0_SPEC; -impl crate::RegisterSpec for TIMECMP0_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timecmp0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timecmp0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timecmp0Spec; +impl crate::RegisterSpec for Timecmp0Spec { type Ux = u32; } -#[doc = "`read()` method returns [timecmp0::R](R) reader structure"] -impl crate::Readable for TIMECMP0_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timecmp0::W](W) writer structure"] -impl crate::Writable for TIMECMP0_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timecmp0::R`](R) reader structure"] +impl crate::Readable for Timecmp0Spec {} +#[doc = "`write(|w| ..)` method takes [`timecmp0::W`](W) writer structure"] +impl crate::Writable for Timecmp0Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMECMP0 to value 0"] -impl crate::Resettable for TIMECMP0_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timecmp0Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/timecmp1.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/timecmp1.rs index 8ac8214..7d651ff 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/timecmp1.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/timecmp1.rs @@ -1,332 +1,311 @@ #[doc = "Register `TIMECMP1` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMECMP1` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TCMPVAL` reader - Timer comparator 1."] -pub type TCMPVAL_R = crate::FieldReader; +pub type TcmpvalR = crate::FieldReader; #[doc = "Field `TCMPVAL` writer - Timer comparator 1."] -pub type TCMPVAL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMECMP1_SPEC, u8, u8, 8, O>; -#[doc = "Field `TSTART` reader - Timer start source"] -pub type TSTART_R = crate::FieldReader; +pub type TcmpvalW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Timer start source\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TSTART_A { +pub enum Tstart { #[doc = "0: Comparator 1 is disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Comparator 1 and timer are started at TX end of frame"] - TXEOF = 1, + Txeof = 1, #[doc = "2: Comparator 1 and timer are started at TX Complete"] - TXC = 2, + Txc = 2, #[doc = "3: Comparator 1 and timer are started at RX going going Active (default: low)"] - RXACT = 3, + Rxact = 3, #[doc = "4: Comparator 1 and timer are started at RX end of frame"] - RXEOF = 4, + Rxeof = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TSTART_A) -> Self { + fn from(variant: Tstart) -> Self { variant as _ } } -impl TSTART_R { +impl crate::FieldSpec for Tstart { + type Ux = u8; +} +impl crate::IsEnum for Tstart {} +#[doc = "Field `TSTART` reader - Timer start source"] +pub type TstartR = crate::FieldReader; +impl TstartR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TSTART_A::DISABLE), - 1 => Some(TSTART_A::TXEOF), - 2 => Some(TSTART_A::TXC), - 3 => Some(TSTART_A::RXACT), - 4 => Some(TSTART_A::RXEOF), + 0 => Some(Tstart::Disable), + 1 => Some(Tstart::Txeof), + 2 => Some(Tstart::Txc), + 3 => Some(Tstart::Rxact), + 4 => Some(Tstart::Rxeof), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Comparator 1 is disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == TSTART_A::DISABLE + *self == Tstart::Disable } - #[doc = "Checks if the value of the field is `TXEOF`"] + #[doc = "Comparator 1 and timer are started at TX end of frame"] #[inline(always)] pub fn is_txeof(&self) -> bool { - *self == TSTART_A::TXEOF + *self == Tstart::Txeof } - #[doc = "Checks if the value of the field is `TXC`"] + #[doc = "Comparator 1 and timer are started at TX Complete"] #[inline(always)] pub fn is_txc(&self) -> bool { - *self == TSTART_A::TXC + *self == Tstart::Txc } - #[doc = "Checks if the value of the field is `RXACT`"] + #[doc = "Comparator 1 and timer are started at RX going going Active (default: low)"] #[inline(always)] pub fn is_rxact(&self) -> bool { - *self == TSTART_A::RXACT + *self == Tstart::Rxact } - #[doc = "Checks if the value of the field is `RXEOF`"] + #[doc = "Comparator 1 and timer are started at RX end of frame"] #[inline(always)] pub fn is_rxeof(&self) -> bool { - *self == TSTART_A::RXEOF + *self == Tstart::Rxeof } } #[doc = "Field `TSTART` writer - Timer start source"] -pub type TSTART_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMECMP1_SPEC, u8, TSTART_A, 3, O>; -impl<'a, const O: u8> TSTART_W<'a, O> { +pub type TstartW<'a, REG> = crate::FieldWriter<'a, REG, 3, Tstart>; +impl<'a, REG> TstartW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Comparator 1 is disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(TSTART_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Tstart::Disable) } #[doc = "Comparator 1 and timer are started at TX end of frame"] #[inline(always)] - pub fn txeof(self) -> &'a mut W { - self.variant(TSTART_A::TXEOF) + pub fn txeof(self) -> &'a mut crate::W { + self.variant(Tstart::Txeof) } #[doc = "Comparator 1 and timer are started at TX Complete"] #[inline(always)] - pub fn txc(self) -> &'a mut W { - self.variant(TSTART_A::TXC) + pub fn txc(self) -> &'a mut crate::W { + self.variant(Tstart::Txc) } #[doc = "Comparator 1 and timer are started at RX going going Active (default: low)"] #[inline(always)] - pub fn rxact(self) -> &'a mut W { - self.variant(TSTART_A::RXACT) + pub fn rxact(self) -> &'a mut crate::W { + self.variant(Tstart::Rxact) } #[doc = "Comparator 1 and timer are started at RX end of frame"] #[inline(always)] - pub fn rxeof(self) -> &'a mut W { - self.variant(TSTART_A::RXEOF) + pub fn rxeof(self) -> &'a mut crate::W { + self.variant(Tstart::Rxeof) } } -#[doc = "Field `TSTOP` reader - Source used to disable comparator 1"] -pub type TSTOP_R = crate::FieldReader; #[doc = "Source used to disable comparator 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TSTOP_A { +pub enum Tstop { #[doc = "0: Comparator 1 is disabled when the counter equals TCMPVAL and triggers a TCMP1 event"] - TCMP1 = 0, + Tcmp1 = 0, #[doc = "1: Comparator 1 is disabled at TX start TX Engine"] - TXST = 1, + Txst = 1, #[doc = "2: Comparator 1 is disabled on RX going going Active (default: low)"] - RXACT = 2, + Rxact = 2, #[doc = "3: Comparator 1 is disabled on RX going Inactive"] - RXACTN = 3, + Rxactn = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TSTOP_A) -> Self { + fn from(variant: Tstop) -> Self { variant as _ } } -impl TSTOP_R { +impl crate::FieldSpec for Tstop { + type Ux = u8; +} +impl crate::IsEnum for Tstop {} +#[doc = "Field `TSTOP` reader - Source used to disable comparator 1"] +pub type TstopR = crate::FieldReader; +impl TstopR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TSTOP_A::TCMP1), - 1 => Some(TSTOP_A::TXST), - 2 => Some(TSTOP_A::RXACT), - 3 => Some(TSTOP_A::RXACTN), + 0 => Some(Tstop::Tcmp1), + 1 => Some(Tstop::Txst), + 2 => Some(Tstop::Rxact), + 3 => Some(Tstop::Rxactn), _ => None, } } - #[doc = "Checks if the value of the field is `TCMP1`"] + #[doc = "Comparator 1 is disabled when the counter equals TCMPVAL and triggers a TCMP1 event"] #[inline(always)] pub fn is_tcmp1(&self) -> bool { - *self == TSTOP_A::TCMP1 + *self == Tstop::Tcmp1 } - #[doc = "Checks if the value of the field is `TXST`"] + #[doc = "Comparator 1 is disabled at TX start TX Engine"] #[inline(always)] pub fn is_txst(&self) -> bool { - *self == TSTOP_A::TXST + *self == Tstop::Txst } - #[doc = "Checks if the value of the field is `RXACT`"] + #[doc = "Comparator 1 is disabled on RX going going Active (default: low)"] #[inline(always)] pub fn is_rxact(&self) -> bool { - *self == TSTOP_A::RXACT + *self == Tstop::Rxact } - #[doc = "Checks if the value of the field is `RXACTN`"] + #[doc = "Comparator 1 is disabled on RX going Inactive"] #[inline(always)] pub fn is_rxactn(&self) -> bool { - *self == TSTOP_A::RXACTN + *self == Tstop::Rxactn } } #[doc = "Field `TSTOP` writer - Source used to disable comparator 1"] -pub type TSTOP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMECMP1_SPEC, u8, TSTOP_A, 3, O>; -impl<'a, const O: u8> TSTOP_W<'a, O> { +pub type TstopW<'a, REG> = crate::FieldWriter<'a, REG, 3, Tstop>; +impl<'a, REG> TstopW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Comparator 1 is disabled when the counter equals TCMPVAL and triggers a TCMP1 event"] #[inline(always)] - pub fn tcmp1(self) -> &'a mut W { - self.variant(TSTOP_A::TCMP1) + pub fn tcmp1(self) -> &'a mut crate::W { + self.variant(Tstop::Tcmp1) } #[doc = "Comparator 1 is disabled at TX start TX Engine"] #[inline(always)] - pub fn txst(self) -> &'a mut W { - self.variant(TSTOP_A::TXST) + pub fn txst(self) -> &'a mut crate::W { + self.variant(Tstop::Txst) } #[doc = "Comparator 1 is disabled on RX going going Active (default: low)"] #[inline(always)] - pub fn rxact(self) -> &'a mut W { - self.variant(TSTOP_A::RXACT) + pub fn rxact(self) -> &'a mut crate::W { + self.variant(Tstop::Rxact) } #[doc = "Comparator 1 is disabled on RX going Inactive"] #[inline(always)] - pub fn rxactn(self) -> &'a mut W { - self.variant(TSTOP_A::RXACTN) + pub fn rxactn(self) -> &'a mut crate::W { + self.variant(Tstop::Rxactn) } } -#[doc = "Field `RESTARTEN` reader - Restart Timer on TCMP1"] -pub type RESTARTEN_R = crate::BitReader; #[doc = "Restart Timer on TCMP1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RESTARTEN_A { +pub enum Restarten { #[doc = "0: Disable the timer restarting on TCMP1"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enable the timer restarting on TCMP1"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RESTARTEN_A) -> Self { + fn from(variant: Restarten) -> Self { variant as u8 != 0 } } -impl RESTARTEN_R { +#[doc = "Field `RESTARTEN` reader - Restart Timer on TCMP1"] +pub type RestartenR = crate::BitReader; +impl RestartenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RESTARTEN_A { + pub const fn variant(&self) -> Restarten { match self.bits { - false => RESTARTEN_A::DISABLE, - true => RESTARTEN_A::ENABLE, + false => Restarten::Disable, + true => Restarten::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable the timer restarting on TCMP1"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RESTARTEN_A::DISABLE + *self == Restarten::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enable the timer restarting on TCMP1"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RESTARTEN_A::ENABLE + *self == Restarten::Enable } } #[doc = "Field `RESTARTEN` writer - Restart Timer on TCMP1"] -pub type RESTARTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMECMP1_SPEC, RESTARTEN_A, O>; -impl<'a, const O: u8> RESTARTEN_W<'a, O> { +pub type RestartenW<'a, REG> = crate::BitWriter<'a, REG, Restarten>; +impl<'a, REG> RestartenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable the timer restarting on TCMP1"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RESTARTEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Restarten::Disable) } #[doc = "Enable the timer restarting on TCMP1"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RESTARTEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Restarten::Enable) } } impl R { #[doc = "Bits 0:7 - Timer comparator 1."] #[inline(always)] - pub fn tcmpval(&self) -> TCMPVAL_R { - TCMPVAL_R::new((self.bits & 0xff) as u8) + pub fn tcmpval(&self) -> TcmpvalR { + TcmpvalR::new((self.bits & 0xff) as u8) } #[doc = "Bits 16:18 - Timer start source"] #[inline(always)] - pub fn tstart(&self) -> TSTART_R { - TSTART_R::new(((self.bits >> 16) & 7) as u8) + pub fn tstart(&self) -> TstartR { + TstartR::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Source used to disable comparator 1"] #[inline(always)] - pub fn tstop(&self) -> TSTOP_R { - TSTOP_R::new(((self.bits >> 20) & 7) as u8) + pub fn tstop(&self) -> TstopR { + TstopR::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bit 24 - Restart Timer on TCMP1"] #[inline(always)] - pub fn restarten(&self) -> RESTARTEN_R { - RESTARTEN_R::new(((self.bits >> 24) & 1) != 0) + pub fn restarten(&self) -> RestartenR { + RestartenR::new(((self.bits >> 24) & 1) != 0) } } impl W { #[doc = "Bits 0:7 - Timer comparator 1."] #[inline(always)] #[must_use] - pub fn tcmpval(&mut self) -> TCMPVAL_W<0> { - TCMPVAL_W::new(self) + pub fn tcmpval(&mut self) -> TcmpvalW { + TcmpvalW::new(self, 0) } #[doc = "Bits 16:18 - Timer start source"] #[inline(always)] #[must_use] - pub fn tstart(&mut self) -> TSTART_W<16> { - TSTART_W::new(self) + pub fn tstart(&mut self) -> TstartW { + TstartW::new(self, 16) } #[doc = "Bits 20:22 - Source used to disable comparator 1"] #[inline(always)] #[must_use] - pub fn tstop(&mut self) -> TSTOP_W<20> { - TSTOP_W::new(self) + pub fn tstop(&mut self) -> TstopW { + TstopW::new(self, 20) } #[doc = "Bit 24 - Restart Timer on TCMP1"] #[inline(always)] #[must_use] - pub fn restarten(&mut self) -> RESTARTEN_W<24> { - RESTARTEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn restarten(&mut self) -> RestartenW { + RestartenW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timecmp1](index.html) module"] -pub struct TIMECMP1_SPEC; -impl crate::RegisterSpec for TIMECMP1_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timecmp1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timecmp1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timecmp1Spec; +impl crate::RegisterSpec for Timecmp1Spec { type Ux = u32; } -#[doc = "`read()` method returns [timecmp1::R](R) reader structure"] -impl crate::Readable for TIMECMP1_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timecmp1::W](W) writer structure"] -impl crate::Writable for TIMECMP1_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timecmp1::R`](R) reader structure"] +impl crate::Readable for Timecmp1Spec {} +#[doc = "`write(|w| ..)` method takes [`timecmp1::W`](W) writer structure"] +impl crate::Writable for Timecmp1Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMECMP1 to value 0"] -impl crate::Resettable for TIMECMP1_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timecmp1Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/timecmp2.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/timecmp2.rs index 542bc31..f917c92 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/timecmp2.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/timecmp2.rs @@ -1,332 +1,311 @@ #[doc = "Register `TIMECMP2` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMECMP2` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TCMPVAL` reader - Timer comparator 2."] -pub type TCMPVAL_R = crate::FieldReader; +pub type TcmpvalR = crate::FieldReader; #[doc = "Field `TCMPVAL` writer - Timer comparator 2."] -pub type TCMPVAL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMECMP2_SPEC, u8, u8, 8, O>; -#[doc = "Field `TSTART` reader - Timer start source"] -pub type TSTART_R = crate::FieldReader; +pub type TcmpvalW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Timer start source\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TSTART_A { +pub enum Tstart { #[doc = "0: Comparator 2 is disabled"] - DISABLE = 0, + Disable = 0, #[doc = "1: Comparator 2 and timer are started at TX end of frame"] - TXEOF = 1, + Txeof = 1, #[doc = "2: Comparator 2 and timer are started at TX Complete"] - TXC = 2, + Txc = 2, #[doc = "3: Comparator 2 and timer are started at RX going going Active (default: low)"] - RXACT = 3, + Rxact = 3, #[doc = "4: Comparator 2 and timer are started at RX end of frame"] - RXEOF = 4, + Rxeof = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TSTART_A) -> Self { + fn from(variant: Tstart) -> Self { variant as _ } } -impl TSTART_R { +impl crate::FieldSpec for Tstart { + type Ux = u8; +} +impl crate::IsEnum for Tstart {} +#[doc = "Field `TSTART` reader - Timer start source"] +pub type TstartR = crate::FieldReader; +impl TstartR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TSTART_A::DISABLE), - 1 => Some(TSTART_A::TXEOF), - 2 => Some(TSTART_A::TXC), - 3 => Some(TSTART_A::RXACT), - 4 => Some(TSTART_A::RXEOF), + 0 => Some(Tstart::Disable), + 1 => Some(Tstart::Txeof), + 2 => Some(Tstart::Txc), + 3 => Some(Tstart::Rxact), + 4 => Some(Tstart::Rxeof), _ => None, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Comparator 2 is disabled"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == TSTART_A::DISABLE + *self == Tstart::Disable } - #[doc = "Checks if the value of the field is `TXEOF`"] + #[doc = "Comparator 2 and timer are started at TX end of frame"] #[inline(always)] pub fn is_txeof(&self) -> bool { - *self == TSTART_A::TXEOF + *self == Tstart::Txeof } - #[doc = "Checks if the value of the field is `TXC`"] + #[doc = "Comparator 2 and timer are started at TX Complete"] #[inline(always)] pub fn is_txc(&self) -> bool { - *self == TSTART_A::TXC + *self == Tstart::Txc } - #[doc = "Checks if the value of the field is `RXACT`"] + #[doc = "Comparator 2 and timer are started at RX going going Active (default: low)"] #[inline(always)] pub fn is_rxact(&self) -> bool { - *self == TSTART_A::RXACT + *self == Tstart::Rxact } - #[doc = "Checks if the value of the field is `RXEOF`"] + #[doc = "Comparator 2 and timer are started at RX end of frame"] #[inline(always)] pub fn is_rxeof(&self) -> bool { - *self == TSTART_A::RXEOF + *self == Tstart::Rxeof } } #[doc = "Field `TSTART` writer - Timer start source"] -pub type TSTART_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMECMP2_SPEC, u8, TSTART_A, 3, O>; -impl<'a, const O: u8> TSTART_W<'a, O> { +pub type TstartW<'a, REG> = crate::FieldWriter<'a, REG, 3, Tstart>; +impl<'a, REG> TstartW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Comparator 2 is disabled"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(TSTART_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Tstart::Disable) } #[doc = "Comparator 2 and timer are started at TX end of frame"] #[inline(always)] - pub fn txeof(self) -> &'a mut W { - self.variant(TSTART_A::TXEOF) + pub fn txeof(self) -> &'a mut crate::W { + self.variant(Tstart::Txeof) } #[doc = "Comparator 2 and timer are started at TX Complete"] #[inline(always)] - pub fn txc(self) -> &'a mut W { - self.variant(TSTART_A::TXC) + pub fn txc(self) -> &'a mut crate::W { + self.variant(Tstart::Txc) } #[doc = "Comparator 2 and timer are started at RX going going Active (default: low)"] #[inline(always)] - pub fn rxact(self) -> &'a mut W { - self.variant(TSTART_A::RXACT) + pub fn rxact(self) -> &'a mut crate::W { + self.variant(Tstart::Rxact) } #[doc = "Comparator 2 and timer are started at RX end of frame"] #[inline(always)] - pub fn rxeof(self) -> &'a mut W { - self.variant(TSTART_A::RXEOF) + pub fn rxeof(self) -> &'a mut crate::W { + self.variant(Tstart::Rxeof) } } -#[doc = "Field `TSTOP` reader - Source used to disable comparator 2"] -pub type TSTOP_R = crate::FieldReader; #[doc = "Source used to disable comparator 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TSTOP_A { +pub enum Tstop { #[doc = "0: Comparator 2 is disabled when the counter equals TCMPVAL and triggers a TCMP2 event"] - TCMP2 = 0, + Tcmp2 = 0, #[doc = "1: Comparator 2 is disabled at TX start TX Engine"] - TXST = 1, + Txst = 1, #[doc = "2: Comparator 2 is disabled on RX going going Active (default: low)"] - RXACT = 2, + Rxact = 2, #[doc = "3: Comparator 2 is disabled on RX going Inactive"] - RXACTN = 3, + Rxactn = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TSTOP_A) -> Self { + fn from(variant: Tstop) -> Self { variant as _ } } -impl TSTOP_R { +impl crate::FieldSpec for Tstop { + type Ux = u8; +} +impl crate::IsEnum for Tstop {} +#[doc = "Field `TSTOP` reader - Source used to disable comparator 2"] +pub type TstopR = crate::FieldReader; +impl TstopR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TSTOP_A::TCMP2), - 1 => Some(TSTOP_A::TXST), - 2 => Some(TSTOP_A::RXACT), - 3 => Some(TSTOP_A::RXACTN), + 0 => Some(Tstop::Tcmp2), + 1 => Some(Tstop::Txst), + 2 => Some(Tstop::Rxact), + 3 => Some(Tstop::Rxactn), _ => None, } } - #[doc = "Checks if the value of the field is `TCMP2`"] + #[doc = "Comparator 2 is disabled when the counter equals TCMPVAL and triggers a TCMP2 event"] #[inline(always)] pub fn is_tcmp2(&self) -> bool { - *self == TSTOP_A::TCMP2 + *self == Tstop::Tcmp2 } - #[doc = "Checks if the value of the field is `TXST`"] + #[doc = "Comparator 2 is disabled at TX start TX Engine"] #[inline(always)] pub fn is_txst(&self) -> bool { - *self == TSTOP_A::TXST + *self == Tstop::Txst } - #[doc = "Checks if the value of the field is `RXACT`"] + #[doc = "Comparator 2 is disabled on RX going going Active (default: low)"] #[inline(always)] pub fn is_rxact(&self) -> bool { - *self == TSTOP_A::RXACT + *self == Tstop::Rxact } - #[doc = "Checks if the value of the field is `RXACTN`"] + #[doc = "Comparator 2 is disabled on RX going Inactive"] #[inline(always)] pub fn is_rxactn(&self) -> bool { - *self == TSTOP_A::RXACTN + *self == Tstop::Rxactn } } #[doc = "Field `TSTOP` writer - Source used to disable comparator 2"] -pub type TSTOP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMECMP2_SPEC, u8, TSTOP_A, 3, O>; -impl<'a, const O: u8> TSTOP_W<'a, O> { +pub type TstopW<'a, REG> = crate::FieldWriter<'a, REG, 3, Tstop>; +impl<'a, REG> TstopW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Comparator 2 is disabled when the counter equals TCMPVAL and triggers a TCMP2 event"] #[inline(always)] - pub fn tcmp2(self) -> &'a mut W { - self.variant(TSTOP_A::TCMP2) + pub fn tcmp2(self) -> &'a mut crate::W { + self.variant(Tstop::Tcmp2) } #[doc = "Comparator 2 is disabled at TX start TX Engine"] #[inline(always)] - pub fn txst(self) -> &'a mut W { - self.variant(TSTOP_A::TXST) + pub fn txst(self) -> &'a mut crate::W { + self.variant(Tstop::Txst) } #[doc = "Comparator 2 is disabled on RX going going Active (default: low)"] #[inline(always)] - pub fn rxact(self) -> &'a mut W { - self.variant(TSTOP_A::RXACT) + pub fn rxact(self) -> &'a mut crate::W { + self.variant(Tstop::Rxact) } #[doc = "Comparator 2 is disabled on RX going Inactive"] #[inline(always)] - pub fn rxactn(self) -> &'a mut W { - self.variant(TSTOP_A::RXACTN) + pub fn rxactn(self) -> &'a mut crate::W { + self.variant(Tstop::Rxactn) } } -#[doc = "Field `RESTARTEN` reader - Restart Timer on TCMP2"] -pub type RESTARTEN_R = crate::BitReader; #[doc = "Restart Timer on TCMP2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RESTARTEN_A { +pub enum Restarten { #[doc = "0: Disable the timer restarting on TCMP2"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enable the timer restarting on TCMP2"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RESTARTEN_A) -> Self { + fn from(variant: Restarten) -> Self { variant as u8 != 0 } } -impl RESTARTEN_R { +#[doc = "Field `RESTARTEN` reader - Restart Timer on TCMP2"] +pub type RestartenR = crate::BitReader; +impl RestartenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> RESTARTEN_A { + pub const fn variant(&self) -> Restarten { match self.bits { - false => RESTARTEN_A::DISABLE, - true => RESTARTEN_A::ENABLE, + false => Restarten::Disable, + true => Restarten::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable the timer restarting on TCMP2"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == RESTARTEN_A::DISABLE + *self == Restarten::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enable the timer restarting on TCMP2"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == RESTARTEN_A::ENABLE + *self == Restarten::Enable } } #[doc = "Field `RESTARTEN` writer - Restart Timer on TCMP2"] -pub type RESTARTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMECMP2_SPEC, RESTARTEN_A, O>; -impl<'a, const O: u8> RESTARTEN_W<'a, O> { +pub type RestartenW<'a, REG> = crate::BitWriter<'a, REG, Restarten>; +impl<'a, REG> RestartenW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable the timer restarting on TCMP2"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(RESTARTEN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Restarten::Disable) } #[doc = "Enable the timer restarting on TCMP2"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(RESTARTEN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Restarten::Enable) } } impl R { #[doc = "Bits 0:7 - Timer comparator 2."] #[inline(always)] - pub fn tcmpval(&self) -> TCMPVAL_R { - TCMPVAL_R::new((self.bits & 0xff) as u8) + pub fn tcmpval(&self) -> TcmpvalR { + TcmpvalR::new((self.bits & 0xff) as u8) } #[doc = "Bits 16:18 - Timer start source"] #[inline(always)] - pub fn tstart(&self) -> TSTART_R { - TSTART_R::new(((self.bits >> 16) & 7) as u8) + pub fn tstart(&self) -> TstartR { + TstartR::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Source used to disable comparator 2"] #[inline(always)] - pub fn tstop(&self) -> TSTOP_R { - TSTOP_R::new(((self.bits >> 20) & 7) as u8) + pub fn tstop(&self) -> TstopR { + TstopR::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bit 24 - Restart Timer on TCMP2"] #[inline(always)] - pub fn restarten(&self) -> RESTARTEN_R { - RESTARTEN_R::new(((self.bits >> 24) & 1) != 0) + pub fn restarten(&self) -> RestartenR { + RestartenR::new(((self.bits >> 24) & 1) != 0) } } impl W { #[doc = "Bits 0:7 - Timer comparator 2."] #[inline(always)] #[must_use] - pub fn tcmpval(&mut self) -> TCMPVAL_W<0> { - TCMPVAL_W::new(self) + pub fn tcmpval(&mut self) -> TcmpvalW { + TcmpvalW::new(self, 0) } #[doc = "Bits 16:18 - Timer start source"] #[inline(always)] #[must_use] - pub fn tstart(&mut self) -> TSTART_W<16> { - TSTART_W::new(self) + pub fn tstart(&mut self) -> TstartW { + TstartW::new(self, 16) } #[doc = "Bits 20:22 - Source used to disable comparator 2"] #[inline(always)] #[must_use] - pub fn tstop(&mut self) -> TSTOP_W<20> { - TSTOP_W::new(self) + pub fn tstop(&mut self) -> TstopW { + TstopW::new(self, 20) } #[doc = "Bit 24 - Restart Timer on TCMP2"] #[inline(always)] #[must_use] - pub fn restarten(&mut self) -> RESTARTEN_W<24> { - RESTARTEN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn restarten(&mut self) -> RestartenW { + RestartenW::new(self, 24) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timecmp2](index.html) module"] -pub struct TIMECMP2_SPEC; -impl crate::RegisterSpec for TIMECMP2_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timecmp2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timecmp2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Timecmp2Spec; +impl crate::RegisterSpec for Timecmp2Spec { type Ux = u32; } -#[doc = "`read()` method returns [timecmp2::R](R) reader structure"] -impl crate::Readable for TIMECMP2_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timecmp2::W](W) writer structure"] -impl crate::Writable for TIMECMP2_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timecmp2::R`](R) reader structure"] +impl crate::Readable for Timecmp2Spec {} +#[doc = "`write(|w| ..)` method takes [`timecmp2::W`](W) writer structure"] +impl crate::Writable for Timecmp2Spec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMECMP2 to value 0"] -impl crate::Resettable for TIMECMP2_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Timecmp2Spec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/timing.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/timing.rs index dfdca17..079e420 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/timing.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/timing.rs @@ -1,632 +1,621 @@ #[doc = "Register `TIMING` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TIMING` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `TXDELAY` reader - TX frame start delay"] -pub type TXDELAY_R = crate::FieldReader; +pub type W = crate::W; #[doc = "TX frame start delay\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TXDELAY_A { +pub enum Txdelay { #[doc = "0: Disable - TXDELAY in USARTn_CTRL can be used for legacy"] - DISABLE = 0, + Disable = 0, #[doc = "1: Start of transmission is delayed for 1 baud-times"] - ONE = 1, + One = 1, #[doc = "2: Start of transmission is delayed for 2 baud-times"] - TWO = 2, + Two = 2, #[doc = "3: Start of transmission is delayed for 3 baud-times"] - THREE = 3, + Three = 3, #[doc = "4: Start of transmission is delayed for 7 baud-times"] - SEVEN = 4, + Seven = 4, #[doc = "5: Start of transmission is delayed for TCMPVAL0 baud-times"] - TCMP0 = 5, + Tcmp0 = 5, #[doc = "6: Start of transmission is delayed for TCMPVAL1 baud-times"] - TCMP1 = 6, + Tcmp1 = 6, #[doc = "7: Start of transmission is delayed for TCMPVAL2 baud-times"] - TCMP2 = 7, + Tcmp2 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TXDELAY_A) -> Self { + fn from(variant: Txdelay) -> Self { variant as _ } } -impl TXDELAY_R { +impl crate::FieldSpec for Txdelay { + type Ux = u8; +} +impl crate::IsEnum for Txdelay {} +#[doc = "Field `TXDELAY` reader - TX frame start delay"] +pub type TxdelayR = crate::FieldReader; +impl TxdelayR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> TXDELAY_A { + pub const fn variant(&self) -> Txdelay { match self.bits { - 0 => TXDELAY_A::DISABLE, - 1 => TXDELAY_A::ONE, - 2 => TXDELAY_A::TWO, - 3 => TXDELAY_A::THREE, - 4 => TXDELAY_A::SEVEN, - 5 => TXDELAY_A::TCMP0, - 6 => TXDELAY_A::TCMP1, - 7 => TXDELAY_A::TCMP2, + 0 => Txdelay::Disable, + 1 => Txdelay::One, + 2 => Txdelay::Two, + 3 => Txdelay::Three, + 4 => Txdelay::Seven, + 5 => Txdelay::Tcmp0, + 6 => Txdelay::Tcmp1, + 7 => Txdelay::Tcmp2, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable - TXDELAY in USARTn_CTRL can be used for legacy"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == TXDELAY_A::DISABLE + *self == Txdelay::Disable } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Start of transmission is delayed for 1 baud-times"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == TXDELAY_A::ONE + *self == Txdelay::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Start of transmission is delayed for 2 baud-times"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == TXDELAY_A::TWO + *self == Txdelay::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "Start of transmission is delayed for 3 baud-times"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == TXDELAY_A::THREE + *self == Txdelay::Three } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "Start of transmission is delayed for 7 baud-times"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == TXDELAY_A::SEVEN + *self == Txdelay::Seven } - #[doc = "Checks if the value of the field is `TCMP0`"] + #[doc = "Start of transmission is delayed for TCMPVAL0 baud-times"] #[inline(always)] pub fn is_tcmp0(&self) -> bool { - *self == TXDELAY_A::TCMP0 + *self == Txdelay::Tcmp0 } - #[doc = "Checks if the value of the field is `TCMP1`"] + #[doc = "Start of transmission is delayed for TCMPVAL1 baud-times"] #[inline(always)] pub fn is_tcmp1(&self) -> bool { - *self == TXDELAY_A::TCMP1 + *self == Txdelay::Tcmp1 } - #[doc = "Checks if the value of the field is `TCMP2`"] + #[doc = "Start of transmission is delayed for TCMPVAL2 baud-times"] #[inline(always)] pub fn is_tcmp2(&self) -> bool { - *self == TXDELAY_A::TCMP2 + *self == Txdelay::Tcmp2 } } #[doc = "Field `TXDELAY` writer - TX frame start delay"] -pub type TXDELAY_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, TIMING_SPEC, u8, TXDELAY_A, 3, O>; -impl<'a, const O: u8> TXDELAY_W<'a, O> { +pub type TxdelayW<'a, REG> = crate::FieldWriter<'a, REG, 3, Txdelay, crate::Safe>; +impl<'a, REG> TxdelayW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Disable - TXDELAY in USARTn_CTRL can be used for legacy"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(TXDELAY_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Txdelay::Disable) } #[doc = "Start of transmission is delayed for 1 baud-times"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(TXDELAY_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Txdelay::One) } #[doc = "Start of transmission is delayed for 2 baud-times"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(TXDELAY_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Txdelay::Two) } #[doc = "Start of transmission is delayed for 3 baud-times"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(TXDELAY_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Txdelay::Three) } #[doc = "Start of transmission is delayed for 7 baud-times"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(TXDELAY_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Txdelay::Seven) } #[doc = "Start of transmission is delayed for TCMPVAL0 baud-times"] #[inline(always)] - pub fn tcmp0(self) -> &'a mut W { - self.variant(TXDELAY_A::TCMP0) + pub fn tcmp0(self) -> &'a mut crate::W { + self.variant(Txdelay::Tcmp0) } #[doc = "Start of transmission is delayed for TCMPVAL1 baud-times"] #[inline(always)] - pub fn tcmp1(self) -> &'a mut W { - self.variant(TXDELAY_A::TCMP1) + pub fn tcmp1(self) -> &'a mut crate::W { + self.variant(Txdelay::Tcmp1) } #[doc = "Start of transmission is delayed for TCMPVAL2 baud-times"] #[inline(always)] - pub fn tcmp2(self) -> &'a mut W { - self.variant(TXDELAY_A::TCMP2) + pub fn tcmp2(self) -> &'a mut crate::W { + self.variant(Txdelay::Tcmp2) } } -#[doc = "Field `CSSETUP` reader - Chip Select Setup"] -pub type CSSETUP_R = crate::FieldReader; #[doc = "Chip Select Setup\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CSSETUP_A { +pub enum Cssetup { #[doc = "0: CS is not asserted before start of transmission"] - ZERO = 0, + Zero = 0, #[doc = "1: CS is asserted for 1 baud-times before start of transmission"] - ONE = 1, + One = 1, #[doc = "2: CS is asserted for 2 baud-times before start of transmission"] - TWO = 2, + Two = 2, #[doc = "3: CS is asserted for 3 baud-times before start of transmission"] - THREE = 3, + Three = 3, #[doc = "4: CS is asserted for 7 baud-times before start of transmission"] - SEVEN = 4, + Seven = 4, #[doc = "5: CS is asserted before the start of transmission for TCMPVAL0 baud-times"] - TCMP0 = 5, + Tcmp0 = 5, #[doc = "6: CS is asserted before the start of transmission for TCMPVAL1 baud-times"] - TCMP1 = 6, + Tcmp1 = 6, #[doc = "7: CS is asserted before the start of transmission for TCMPVAL2 baud-times"] - TCMP2 = 7, + Tcmp2 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CSSETUP_A) -> Self { + fn from(variant: Cssetup) -> Self { variant as _ } } -impl CSSETUP_R { +impl crate::FieldSpec for Cssetup { + type Ux = u8; +} +impl crate::IsEnum for Cssetup {} +#[doc = "Field `CSSETUP` reader - Chip Select Setup"] +pub type CssetupR = crate::FieldReader; +impl CssetupR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CSSETUP_A { + pub const fn variant(&self) -> Cssetup { match self.bits { - 0 => CSSETUP_A::ZERO, - 1 => CSSETUP_A::ONE, - 2 => CSSETUP_A::TWO, - 3 => CSSETUP_A::THREE, - 4 => CSSETUP_A::SEVEN, - 5 => CSSETUP_A::TCMP0, - 6 => CSSETUP_A::TCMP1, - 7 => CSSETUP_A::TCMP2, + 0 => Cssetup::Zero, + 1 => Cssetup::One, + 2 => Cssetup::Two, + 3 => Cssetup::Three, + 4 => Cssetup::Seven, + 5 => Cssetup::Tcmp0, + 6 => Cssetup::Tcmp1, + 7 => Cssetup::Tcmp2, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ZERO`"] + #[doc = "CS is not asserted before start of transmission"] #[inline(always)] pub fn is_zero(&self) -> bool { - *self == CSSETUP_A::ZERO + *self == Cssetup::Zero } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "CS is asserted for 1 baud-times before start of transmission"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == CSSETUP_A::ONE + *self == Cssetup::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "CS is asserted for 2 baud-times before start of transmission"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == CSSETUP_A::TWO + *self == Cssetup::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "CS is asserted for 3 baud-times before start of transmission"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == CSSETUP_A::THREE + *self == Cssetup::Three } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "CS is asserted for 7 baud-times before start of transmission"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == CSSETUP_A::SEVEN + *self == Cssetup::Seven } - #[doc = "Checks if the value of the field is `TCMP0`"] + #[doc = "CS is asserted before the start of transmission for TCMPVAL0 baud-times"] #[inline(always)] pub fn is_tcmp0(&self) -> bool { - *self == CSSETUP_A::TCMP0 + *self == Cssetup::Tcmp0 } - #[doc = "Checks if the value of the field is `TCMP1`"] + #[doc = "CS is asserted before the start of transmission for TCMPVAL1 baud-times"] #[inline(always)] pub fn is_tcmp1(&self) -> bool { - *self == CSSETUP_A::TCMP1 + *self == Cssetup::Tcmp1 } - #[doc = "Checks if the value of the field is `TCMP2`"] + #[doc = "CS is asserted before the start of transmission for TCMPVAL2 baud-times"] #[inline(always)] pub fn is_tcmp2(&self) -> bool { - *self == CSSETUP_A::TCMP2 + *self == Cssetup::Tcmp2 } } #[doc = "Field `CSSETUP` writer - Chip Select Setup"] -pub type CSSETUP_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, TIMING_SPEC, u8, CSSETUP_A, 3, O>; -impl<'a, const O: u8> CSSETUP_W<'a, O> { +pub type CssetupW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cssetup, crate::Safe>; +impl<'a, REG> CssetupW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "CS is not asserted before start of transmission"] #[inline(always)] - pub fn zero(self) -> &'a mut W { - self.variant(CSSETUP_A::ZERO) + pub fn zero(self) -> &'a mut crate::W { + self.variant(Cssetup::Zero) } #[doc = "CS is asserted for 1 baud-times before start of transmission"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(CSSETUP_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Cssetup::One) } #[doc = "CS is asserted for 2 baud-times before start of transmission"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(CSSETUP_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Cssetup::Two) } #[doc = "CS is asserted for 3 baud-times before start of transmission"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(CSSETUP_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Cssetup::Three) } #[doc = "CS is asserted for 7 baud-times before start of transmission"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(CSSETUP_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Cssetup::Seven) } #[doc = "CS is asserted before the start of transmission for TCMPVAL0 baud-times"] #[inline(always)] - pub fn tcmp0(self) -> &'a mut W { - self.variant(CSSETUP_A::TCMP0) + pub fn tcmp0(self) -> &'a mut crate::W { + self.variant(Cssetup::Tcmp0) } #[doc = "CS is asserted before the start of transmission for TCMPVAL1 baud-times"] #[inline(always)] - pub fn tcmp1(self) -> &'a mut W { - self.variant(CSSETUP_A::TCMP1) + pub fn tcmp1(self) -> &'a mut crate::W { + self.variant(Cssetup::Tcmp1) } #[doc = "CS is asserted before the start of transmission for TCMPVAL2 baud-times"] #[inline(always)] - pub fn tcmp2(self) -> &'a mut W { - self.variant(CSSETUP_A::TCMP2) + pub fn tcmp2(self) -> &'a mut crate::W { + self.variant(Cssetup::Tcmp2) } } -#[doc = "Field `ICS` reader - Inter-character spacing"] -pub type ICS_R = crate::FieldReader; #[doc = "Inter-character spacing\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICS_A { +pub enum Ics { #[doc = "0: There is no space between charcters"] - ZERO = 0, + Zero = 0, #[doc = "1: Create a space of 1 baud-times before start of transmission"] - ONE = 1, + One = 1, #[doc = "2: Create a space of 2 baud-times before start of transmission"] - TWO = 2, + Two = 2, #[doc = "3: Create a space of 3 baud-times before start of transmission"] - THREE = 3, + Three = 3, #[doc = "4: Create a space of 7 baud-times before start of transmission"] - SEVEN = 4, + Seven = 4, #[doc = "5: Create a space of before the start of transmission for TCMPVAL0 baud-times"] - TCMP0 = 5, + Tcmp0 = 5, #[doc = "6: Create a space of before the start of transmission for TCMPVAL1 baud-times"] - TCMP1 = 6, + Tcmp1 = 6, #[doc = "7: Create a space of before the start of transmission for TCMPVAL2 baud-times"] - TCMP2 = 7, + Tcmp2 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICS_A) -> Self { + fn from(variant: Ics) -> Self { variant as _ } } -impl ICS_R { +impl crate::FieldSpec for Ics { + type Ux = u8; +} +impl crate::IsEnum for Ics {} +#[doc = "Field `ICS` reader - Inter-character spacing"] +pub type IcsR = crate::FieldReader; +impl IcsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> ICS_A { + pub const fn variant(&self) -> Ics { match self.bits { - 0 => ICS_A::ZERO, - 1 => ICS_A::ONE, - 2 => ICS_A::TWO, - 3 => ICS_A::THREE, - 4 => ICS_A::SEVEN, - 5 => ICS_A::TCMP0, - 6 => ICS_A::TCMP1, - 7 => ICS_A::TCMP2, + 0 => Ics::Zero, + 1 => Ics::One, + 2 => Ics::Two, + 3 => Ics::Three, + 4 => Ics::Seven, + 5 => Ics::Tcmp0, + 6 => Ics::Tcmp1, + 7 => Ics::Tcmp2, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ZERO`"] + #[doc = "There is no space between charcters"] #[inline(always)] pub fn is_zero(&self) -> bool { - *self == ICS_A::ZERO + *self == Ics::Zero } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "Create a space of 1 baud-times before start of transmission"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == ICS_A::ONE + *self == Ics::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "Create a space of 2 baud-times before start of transmission"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == ICS_A::TWO + *self == Ics::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "Create a space of 3 baud-times before start of transmission"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == ICS_A::THREE + *self == Ics::Three } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "Create a space of 7 baud-times before start of transmission"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == ICS_A::SEVEN + *self == Ics::Seven } - #[doc = "Checks if the value of the field is `TCMP0`"] + #[doc = "Create a space of before the start of transmission for TCMPVAL0 baud-times"] #[inline(always)] pub fn is_tcmp0(&self) -> bool { - *self == ICS_A::TCMP0 + *self == Ics::Tcmp0 } - #[doc = "Checks if the value of the field is `TCMP1`"] + #[doc = "Create a space of before the start of transmission for TCMPVAL1 baud-times"] #[inline(always)] pub fn is_tcmp1(&self) -> bool { - *self == ICS_A::TCMP1 + *self == Ics::Tcmp1 } - #[doc = "Checks if the value of the field is `TCMP2`"] + #[doc = "Create a space of before the start of transmission for TCMPVAL2 baud-times"] #[inline(always)] pub fn is_tcmp2(&self) -> bool { - *self == ICS_A::TCMP2 + *self == Ics::Tcmp2 } } #[doc = "Field `ICS` writer - Inter-character spacing"] -pub type ICS_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, TIMING_SPEC, u8, ICS_A, 3, O>; -impl<'a, const O: u8> ICS_W<'a, O> { +pub type IcsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Ics, crate::Safe>; +impl<'a, REG> IcsW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "There is no space between charcters"] #[inline(always)] - pub fn zero(self) -> &'a mut W { - self.variant(ICS_A::ZERO) + pub fn zero(self) -> &'a mut crate::W { + self.variant(Ics::Zero) } #[doc = "Create a space of 1 baud-times before start of transmission"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(ICS_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Ics::One) } #[doc = "Create a space of 2 baud-times before start of transmission"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(ICS_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Ics::Two) } #[doc = "Create a space of 3 baud-times before start of transmission"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(ICS_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Ics::Three) } #[doc = "Create a space of 7 baud-times before start of transmission"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(ICS_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Ics::Seven) } #[doc = "Create a space of before the start of transmission for TCMPVAL0 baud-times"] #[inline(always)] - pub fn tcmp0(self) -> &'a mut W { - self.variant(ICS_A::TCMP0) + pub fn tcmp0(self) -> &'a mut crate::W { + self.variant(Ics::Tcmp0) } #[doc = "Create a space of before the start of transmission for TCMPVAL1 baud-times"] #[inline(always)] - pub fn tcmp1(self) -> &'a mut W { - self.variant(ICS_A::TCMP1) + pub fn tcmp1(self) -> &'a mut crate::W { + self.variant(Ics::Tcmp1) } #[doc = "Create a space of before the start of transmission for TCMPVAL2 baud-times"] #[inline(always)] - pub fn tcmp2(self) -> &'a mut W { - self.variant(ICS_A::TCMP2) + pub fn tcmp2(self) -> &'a mut crate::W { + self.variant(Ics::Tcmp2) } } -#[doc = "Field `CSHOLD` reader - Chip Select Hold"] -pub type CSHOLD_R = crate::FieldReader; #[doc = "Chip Select Hold\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CSHOLD_A { +pub enum Cshold { #[doc = "0: Disable CS being asserted after the end of transmission"] - ZERO = 0, + Zero = 0, #[doc = "1: CS is asserted for 1 baud-times after the end of transmission"] - ONE = 1, + One = 1, #[doc = "2: CS is asserted for 2 baud-times after the end of transmission"] - TWO = 2, + Two = 2, #[doc = "3: CS is asserted for 3 baud-times after the end of transmission"] - THREE = 3, + Three = 3, #[doc = "4: CS is asserted for 7 baud-times after the end of transmission"] - SEVEN = 4, + Seven = 4, #[doc = "5: CS is asserted after the end of transmission for TCMPVAL0 baud-times"] - TCMP0 = 5, + Tcmp0 = 5, #[doc = "6: CS is asserted after the end of transmission for TCMPVAL1 baud-times"] - TCMP1 = 6, + Tcmp1 = 6, #[doc = "7: CS is asserted after the end of transmission for TCMPVAL2 baud-times"] - TCMP2 = 7, + Tcmp2 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CSHOLD_A) -> Self { + fn from(variant: Cshold) -> Self { variant as _ } } -impl CSHOLD_R { +impl crate::FieldSpec for Cshold { + type Ux = u8; +} +impl crate::IsEnum for Cshold {} +#[doc = "Field `CSHOLD` reader - Chip Select Hold"] +pub type CsholdR = crate::FieldReader; +impl CsholdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CSHOLD_A { + pub const fn variant(&self) -> Cshold { match self.bits { - 0 => CSHOLD_A::ZERO, - 1 => CSHOLD_A::ONE, - 2 => CSHOLD_A::TWO, - 3 => CSHOLD_A::THREE, - 4 => CSHOLD_A::SEVEN, - 5 => CSHOLD_A::TCMP0, - 6 => CSHOLD_A::TCMP1, - 7 => CSHOLD_A::TCMP2, + 0 => Cshold::Zero, + 1 => Cshold::One, + 2 => Cshold::Two, + 3 => Cshold::Three, + 4 => Cshold::Seven, + 5 => Cshold::Tcmp0, + 6 => Cshold::Tcmp1, + 7 => Cshold::Tcmp2, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `ZERO`"] + #[doc = "Disable CS being asserted after the end of transmission"] #[inline(always)] pub fn is_zero(&self) -> bool { - *self == CSHOLD_A::ZERO + *self == Cshold::Zero } - #[doc = "Checks if the value of the field is `ONE`"] + #[doc = "CS is asserted for 1 baud-times after the end of transmission"] #[inline(always)] pub fn is_one(&self) -> bool { - *self == CSHOLD_A::ONE + *self == Cshold::One } - #[doc = "Checks if the value of the field is `TWO`"] + #[doc = "CS is asserted for 2 baud-times after the end of transmission"] #[inline(always)] pub fn is_two(&self) -> bool { - *self == CSHOLD_A::TWO + *self == Cshold::Two } - #[doc = "Checks if the value of the field is `THREE`"] + #[doc = "CS is asserted for 3 baud-times after the end of transmission"] #[inline(always)] pub fn is_three(&self) -> bool { - *self == CSHOLD_A::THREE + *self == Cshold::Three } - #[doc = "Checks if the value of the field is `SEVEN`"] + #[doc = "CS is asserted for 7 baud-times after the end of transmission"] #[inline(always)] pub fn is_seven(&self) -> bool { - *self == CSHOLD_A::SEVEN + *self == Cshold::Seven } - #[doc = "Checks if the value of the field is `TCMP0`"] + #[doc = "CS is asserted after the end of transmission for TCMPVAL0 baud-times"] #[inline(always)] pub fn is_tcmp0(&self) -> bool { - *self == CSHOLD_A::TCMP0 + *self == Cshold::Tcmp0 } - #[doc = "Checks if the value of the field is `TCMP1`"] + #[doc = "CS is asserted after the end of transmission for TCMPVAL1 baud-times"] #[inline(always)] pub fn is_tcmp1(&self) -> bool { - *self == CSHOLD_A::TCMP1 + *self == Cshold::Tcmp1 } - #[doc = "Checks if the value of the field is `TCMP2`"] + #[doc = "CS is asserted after the end of transmission for TCMPVAL2 baud-times"] #[inline(always)] pub fn is_tcmp2(&self) -> bool { - *self == CSHOLD_A::TCMP2 + *self == Cshold::Tcmp2 } } #[doc = "Field `CSHOLD` writer - Chip Select Hold"] -pub type CSHOLD_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, TIMING_SPEC, u8, CSHOLD_A, 3, O>; -impl<'a, const O: u8> CSHOLD_W<'a, O> { +pub type CsholdW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cshold, crate::Safe>; +impl<'a, REG> CsholdW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Disable CS being asserted after the end of transmission"] #[inline(always)] - pub fn zero(self) -> &'a mut W { - self.variant(CSHOLD_A::ZERO) + pub fn zero(self) -> &'a mut crate::W { + self.variant(Cshold::Zero) } #[doc = "CS is asserted for 1 baud-times after the end of transmission"] #[inline(always)] - pub fn one(self) -> &'a mut W { - self.variant(CSHOLD_A::ONE) + pub fn one(self) -> &'a mut crate::W { + self.variant(Cshold::One) } #[doc = "CS is asserted for 2 baud-times after the end of transmission"] #[inline(always)] - pub fn two(self) -> &'a mut W { - self.variant(CSHOLD_A::TWO) + pub fn two(self) -> &'a mut crate::W { + self.variant(Cshold::Two) } #[doc = "CS is asserted for 3 baud-times after the end of transmission"] #[inline(always)] - pub fn three(self) -> &'a mut W { - self.variant(CSHOLD_A::THREE) + pub fn three(self) -> &'a mut crate::W { + self.variant(Cshold::Three) } #[doc = "CS is asserted for 7 baud-times after the end of transmission"] #[inline(always)] - pub fn seven(self) -> &'a mut W { - self.variant(CSHOLD_A::SEVEN) + pub fn seven(self) -> &'a mut crate::W { + self.variant(Cshold::Seven) } #[doc = "CS is asserted after the end of transmission for TCMPVAL0 baud-times"] #[inline(always)] - pub fn tcmp0(self) -> &'a mut W { - self.variant(CSHOLD_A::TCMP0) + pub fn tcmp0(self) -> &'a mut crate::W { + self.variant(Cshold::Tcmp0) } #[doc = "CS is asserted after the end of transmission for TCMPVAL1 baud-times"] #[inline(always)] - pub fn tcmp1(self) -> &'a mut W { - self.variant(CSHOLD_A::TCMP1) + pub fn tcmp1(self) -> &'a mut crate::W { + self.variant(Cshold::Tcmp1) } #[doc = "CS is asserted after the end of transmission for TCMPVAL2 baud-times"] #[inline(always)] - pub fn tcmp2(self) -> &'a mut W { - self.variant(CSHOLD_A::TCMP2) + pub fn tcmp2(self) -> &'a mut crate::W { + self.variant(Cshold::Tcmp2) } } impl R { #[doc = "Bits 16:18 - TX frame start delay"] #[inline(always)] - pub fn txdelay(&self) -> TXDELAY_R { - TXDELAY_R::new(((self.bits >> 16) & 7) as u8) + pub fn txdelay(&self) -> TxdelayR { + TxdelayR::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Chip Select Setup"] #[inline(always)] - pub fn cssetup(&self) -> CSSETUP_R { - CSSETUP_R::new(((self.bits >> 20) & 7) as u8) + pub fn cssetup(&self) -> CssetupR { + CssetupR::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:26 - Inter-character spacing"] #[inline(always)] - pub fn ics(&self) -> ICS_R { - ICS_R::new(((self.bits >> 24) & 7) as u8) + pub fn ics(&self) -> IcsR { + IcsR::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Chip Select Hold"] #[inline(always)] - pub fn cshold(&self) -> CSHOLD_R { - CSHOLD_R::new(((self.bits >> 28) & 7) as u8) + pub fn cshold(&self) -> CsholdR { + CsholdR::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 16:18 - TX frame start delay"] #[inline(always)] #[must_use] - pub fn txdelay(&mut self) -> TXDELAY_W<16> { - TXDELAY_W::new(self) + pub fn txdelay(&mut self) -> TxdelayW { + TxdelayW::new(self, 16) } #[doc = "Bits 20:22 - Chip Select Setup"] #[inline(always)] #[must_use] - pub fn cssetup(&mut self) -> CSSETUP_W<20> { - CSSETUP_W::new(self) + pub fn cssetup(&mut self) -> CssetupW { + CssetupW::new(self, 20) } #[doc = "Bits 24:26 - Inter-character spacing"] #[inline(always)] #[must_use] - pub fn ics(&mut self) -> ICS_W<24> { - ICS_W::new(self) + pub fn ics(&mut self) -> IcsW { + IcsW::new(self, 24) } #[doc = "Bits 28:30 - Chip Select Hold"] #[inline(always)] #[must_use] - pub fn cshold(&mut self) -> CSHOLD_W<28> { - CSHOLD_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn cshold(&mut self) -> CsholdW { + CsholdW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timing](index.html) module"] -pub struct TIMING_SPEC; -impl crate::RegisterSpec for TIMING_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`timing::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timing::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TimingSpec; +impl crate::RegisterSpec for TimingSpec { type Ux = u32; } -#[doc = "`read()` method returns [timing::R](R) reader structure"] -impl crate::Readable for TIMING_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [timing::W](W) writer structure"] -impl crate::Writable for TIMING_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`timing::R`](R) reader structure"] +impl crate::Readable for TimingSpec {} +#[doc = "`write(|w| ..)` method takes [`timing::W`](W) writer structure"] +impl crate::Writable for TimingSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMING to value 0"] -impl crate::Resettable for TIMING_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TimingSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/trigctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/trigctrl.rs index 73fdda1..94be6a3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/trigctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/trigctrl.rs @@ -1,200 +1,160 @@ #[doc = "Register `TRIGCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `TRIGCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `RXTEN` reader - Receive Trigger Enable"] -pub type RXTEN_R = crate::BitReader; +pub type RxtenR = crate::BitReader; #[doc = "Field `RXTEN` writer - Receive Trigger Enable"] -pub type RXTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type RxtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTEN` reader - Transmit Trigger Enable"] -pub type TXTEN_R = crate::BitReader; +pub type TxtenR = crate::BitReader; #[doc = "Field `TXTEN` writer - Transmit Trigger Enable"] -pub type TXTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type TxtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOTXTEN` reader - AUTOTX Trigger Enable"] -pub type AUTOTXTEN_R = crate::BitReader; +pub type AutotxtenR = crate::BitReader; #[doc = "Field `AUTOTXTEN` writer - AUTOTX Trigger Enable"] -pub type AUTOTXTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type AutotxtenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXARX0EN` reader - Enable Transmit Trigger after RX End of"] -pub type TXARX0EN_R = crate::BitReader; +pub type Txarx0enR = crate::BitReader; #[doc = "Field `TXARX0EN` writer - Enable Transmit Trigger after RX End of"] -pub type TXARX0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type Txarx0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXARX1EN` reader - Enable Transmit Trigger after RX End of"] -pub type TXARX1EN_R = crate::BitReader; +pub type Txarx1enR = crate::BitReader; #[doc = "Field `TXARX1EN` writer - Enable Transmit Trigger after RX End of"] -pub type TXARX1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type Txarx1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXARX2EN` reader - Enable Transmit Trigger after RX End of"] -pub type TXARX2EN_R = crate::BitReader; +pub type Txarx2enR = crate::BitReader; #[doc = "Field `TXARX2EN` writer - Enable Transmit Trigger after RX End of"] -pub type TXARX2EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type Txarx2enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXATX0EN` reader - Enable Receive Trigger after TX end of f"] -pub type RXATX0EN_R = crate::BitReader; +pub type Rxatx0enR = crate::BitReader; #[doc = "Field `RXATX0EN` writer - Enable Receive Trigger after TX end of f"] -pub type RXATX0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type Rxatx0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXATX1EN` reader - Enable Receive Trigger after TX end of f"] -pub type RXATX1EN_R = crate::BitReader; +pub type Rxatx1enR = crate::BitReader; #[doc = "Field `RXATX1EN` writer - Enable Receive Trigger after TX end of f"] -pub type RXATX1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type Rxatx1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXATX2EN` reader - Enable Receive Trigger after TX end of f"] -pub type RXATX2EN_R = crate::BitReader; +pub type Rxatx2enR = crate::BitReader; #[doc = "Field `RXATX2EN` writer - Enable Receive Trigger after TX end of f"] -pub type RXATX2EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRIGCTRL_SPEC, bool, O>; +pub type Rxatx2enW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 4 - Receive Trigger Enable"] #[inline(always)] - pub fn rxten(&self) -> RXTEN_R { - RXTEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxten(&self) -> RxtenR { + RxtenR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Transmit Trigger Enable"] #[inline(always)] - pub fn txten(&self) -> TXTEN_R { - TXTEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn txten(&self) -> TxtenR { + TxtenR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - AUTOTX Trigger Enable"] #[inline(always)] - pub fn autotxten(&self) -> AUTOTXTEN_R { - AUTOTXTEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn autotxten(&self) -> AutotxtenR { + AutotxtenR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Enable Transmit Trigger after RX End of"] #[inline(always)] - pub fn txarx0en(&self) -> TXARX0EN_R { - TXARX0EN_R::new(((self.bits >> 7) & 1) != 0) + pub fn txarx0en(&self) -> Txarx0enR { + Txarx0enR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Enable Transmit Trigger after RX End of"] #[inline(always)] - pub fn txarx1en(&self) -> TXARX1EN_R { - TXARX1EN_R::new(((self.bits >> 8) & 1) != 0) + pub fn txarx1en(&self) -> Txarx1enR { + Txarx1enR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Enable Transmit Trigger after RX End of"] #[inline(always)] - pub fn txarx2en(&self) -> TXARX2EN_R { - TXARX2EN_R::new(((self.bits >> 9) & 1) != 0) + pub fn txarx2en(&self) -> Txarx2enR { + Txarx2enR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Enable Receive Trigger after TX end of f"] #[inline(always)] - pub fn rxatx0en(&self) -> RXATX0EN_R { - RXATX0EN_R::new(((self.bits >> 10) & 1) != 0) + pub fn rxatx0en(&self) -> Rxatx0enR { + Rxatx0enR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Enable Receive Trigger after TX end of f"] #[inline(always)] - pub fn rxatx1en(&self) -> RXATX1EN_R { - RXATX1EN_R::new(((self.bits >> 11) & 1) != 0) + pub fn rxatx1en(&self) -> Rxatx1enR { + Rxatx1enR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Enable Receive Trigger after TX end of f"] #[inline(always)] - pub fn rxatx2en(&self) -> RXATX2EN_R { - RXATX2EN_R::new(((self.bits >> 12) & 1) != 0) + pub fn rxatx2en(&self) -> Rxatx2enR { + Rxatx2enR::new(((self.bits >> 12) & 1) != 0) } } impl W { #[doc = "Bit 4 - Receive Trigger Enable"] #[inline(always)] #[must_use] - pub fn rxten(&mut self) -> RXTEN_W<4> { - RXTEN_W::new(self) + pub fn rxten(&mut self) -> RxtenW { + RxtenW::new(self, 4) } #[doc = "Bit 5 - Transmit Trigger Enable"] #[inline(always)] #[must_use] - pub fn txten(&mut self) -> TXTEN_W<5> { - TXTEN_W::new(self) + pub fn txten(&mut self) -> TxtenW { + TxtenW::new(self, 5) } #[doc = "Bit 6 - AUTOTX Trigger Enable"] #[inline(always)] #[must_use] - pub fn autotxten(&mut self) -> AUTOTXTEN_W<6> { - AUTOTXTEN_W::new(self) + pub fn autotxten(&mut self) -> AutotxtenW { + AutotxtenW::new(self, 6) } #[doc = "Bit 7 - Enable Transmit Trigger after RX End of"] #[inline(always)] #[must_use] - pub fn txarx0en(&mut self) -> TXARX0EN_W<7> { - TXARX0EN_W::new(self) + pub fn txarx0en(&mut self) -> Txarx0enW { + Txarx0enW::new(self, 7) } #[doc = "Bit 8 - Enable Transmit Trigger after RX End of"] #[inline(always)] #[must_use] - pub fn txarx1en(&mut self) -> TXARX1EN_W<8> { - TXARX1EN_W::new(self) + pub fn txarx1en(&mut self) -> Txarx1enW { + Txarx1enW::new(self, 8) } #[doc = "Bit 9 - Enable Transmit Trigger after RX End of"] #[inline(always)] #[must_use] - pub fn txarx2en(&mut self) -> TXARX2EN_W<9> { - TXARX2EN_W::new(self) + pub fn txarx2en(&mut self) -> Txarx2enW { + Txarx2enW::new(self, 9) } #[doc = "Bit 10 - Enable Receive Trigger after TX end of f"] #[inline(always)] #[must_use] - pub fn rxatx0en(&mut self) -> RXATX0EN_W<10> { - RXATX0EN_W::new(self) + pub fn rxatx0en(&mut self) -> Rxatx0enW { + Rxatx0enW::new(self, 10) } #[doc = "Bit 11 - Enable Receive Trigger after TX end of f"] #[inline(always)] #[must_use] - pub fn rxatx1en(&mut self) -> RXATX1EN_W<11> { - RXATX1EN_W::new(self) + pub fn rxatx1en(&mut self) -> Rxatx1enW { + Rxatx1enW::new(self, 11) } #[doc = "Bit 12 - Enable Receive Trigger after TX end of f"] #[inline(always)] #[must_use] - pub fn rxatx2en(&mut self) -> RXATX2EN_W<12> { - RXATX2EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rxatx2en(&mut self) -> Rxatx2enW { + Rxatx2enW::new(self, 12) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [trigctrl](index.html) module"] -pub struct TRIGCTRL_SPEC; -impl crate::RegisterSpec for TRIGCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`trigctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trigctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TrigctrlSpec; +impl crate::RegisterSpec for TrigctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [trigctrl::R](R) reader structure"] -impl crate::Readable for TRIGCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [trigctrl::W](W) writer structure"] -impl crate::Writable for TRIGCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`trigctrl::R`](R) reader structure"] +impl crate::Readable for TrigctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`trigctrl::W`](W) writer structure"] +impl crate::Writable for TrigctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TRIGCTRL to value 0"] -impl crate::Resettable for TRIGCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TrigctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/txdata.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/txdata.rs index e3980b6..61643d3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/txdata.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/txdata.rs @@ -1,52 +1,27 @@ #[doc = "Register `TXDATA` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXDATA` writer - TX Data"] -pub type TXDATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDATA_SPEC, u8, u8, 8, O>; +pub type TxdataW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - TX Data"] #[inline(always)] #[must_use] - pub fn txdata(&mut self) -> TXDATA_W<0> { - TXDATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txdata(&mut self) -> TxdataW { + TxdataW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdata](index.html) module"] -pub struct TXDATA_SPEC; -impl crate::RegisterSpec for TXDATA_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdata::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxdataSpec; +impl crate::RegisterSpec for TxdataSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [txdata::W](W) writer structure"] -impl crate::Writable for TXDATA_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`txdata::W`](W) writer structure"] +impl crate::Writable for TxdataSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXDATA to value 0"] -impl crate::Resettable for TXDATA_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxdataSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/txdatax.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/txdatax.rs index 9462e58..14f17f0 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/txdatax.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/txdatax.rs @@ -1,92 +1,67 @@ #[doc = "Register `TXDATAX` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXDATAX` writer - TX Data"] -pub type TXDATAX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDATAX_SPEC, u16, u16, 9, O>; +pub type TxdataxW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; #[doc = "Field `UBRXAT` writer - Unblock RX After Transmission"] -pub type UBRXAT_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDATAX_SPEC, bool, O>; +pub type UbrxatW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTRIAT` writer - Set TXTRI After Transmission"] -pub type TXTRIAT_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDATAX_SPEC, bool, O>; +pub type TxtriatW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXBREAK` writer - Transmit Data As Break"] -pub type TXBREAK_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDATAX_SPEC, bool, O>; +pub type TxbreakW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXDISAT` writer - Clear TXEN After Transmission"] -pub type TXDISAT_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDATAX_SPEC, bool, O>; +pub type TxdisatW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXENAT` writer - Enable RX After Transmission"] -pub type RXENAT_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDATAX_SPEC, bool, O>; +pub type RxenatW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bits 0:8 - TX Data"] #[inline(always)] #[must_use] - pub fn txdatax(&mut self) -> TXDATAX_W<0> { - TXDATAX_W::new(self) + pub fn txdatax(&mut self) -> TxdataxW { + TxdataxW::new(self, 0) } #[doc = "Bit 11 - Unblock RX After Transmission"] #[inline(always)] #[must_use] - pub fn ubrxat(&mut self) -> UBRXAT_W<11> { - UBRXAT_W::new(self) + pub fn ubrxat(&mut self) -> UbrxatW { + UbrxatW::new(self, 11) } #[doc = "Bit 12 - Set TXTRI After Transmission"] #[inline(always)] #[must_use] - pub fn txtriat(&mut self) -> TXTRIAT_W<12> { - TXTRIAT_W::new(self) + pub fn txtriat(&mut self) -> TxtriatW { + TxtriatW::new(self, 12) } #[doc = "Bit 13 - Transmit Data As Break"] #[inline(always)] #[must_use] - pub fn txbreak(&mut self) -> TXBREAK_W<13> { - TXBREAK_W::new(self) + pub fn txbreak(&mut self) -> TxbreakW { + TxbreakW::new(self, 13) } #[doc = "Bit 14 - Clear TXEN After Transmission"] #[inline(always)] #[must_use] - pub fn txdisat(&mut self) -> TXDISAT_W<14> { - TXDISAT_W::new(self) + pub fn txdisat(&mut self) -> TxdisatW { + TxdisatW::new(self, 14) } #[doc = "Bit 15 - Enable RX After Transmission"] #[inline(always)] #[must_use] - pub fn rxenat(&mut self) -> RXENAT_W<15> { - RXENAT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rxenat(&mut self) -> RxenatW { + RxenatW::new(self, 15) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdatax](index.html) module"] -pub struct TXDATAX_SPEC; -impl crate::RegisterSpec for TXDATAX_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdatax::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxdataxSpec; +impl crate::RegisterSpec for TxdataxSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [txdatax::W](W) writer structure"] -impl crate::Writable for TXDATAX_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`txdatax::W`](W) writer structure"] +impl crate::Writable for TxdataxSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXDATAX to value 0"] -impl crate::Resettable for TXDATAX_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxdataxSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/txdouble.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/txdouble.rs index 320dad9..9cb5990 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/txdouble.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/txdouble.rs @@ -1,60 +1,35 @@ #[doc = "Register `TXDOUBLE` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXDATA0` writer - TX Data"] -pub type TXDATA0_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDOUBLE_SPEC, u8, u8, 8, O>; +pub type Txdata0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `TXDATA1` writer - TX Data"] -pub type TXDATA1_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDOUBLE_SPEC, u8, u8, 8, O>; +pub type Txdata1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - TX Data"] #[inline(always)] #[must_use] - pub fn txdata0(&mut self) -> TXDATA0_W<0> { - TXDATA0_W::new(self) + pub fn txdata0(&mut self) -> Txdata0W { + Txdata0W::new(self, 0) } #[doc = "Bits 8:15 - TX Data"] #[inline(always)] #[must_use] - pub fn txdata1(&mut self) -> TXDATA1_W<8> { - TXDATA1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn txdata1(&mut self) -> Txdata1W { + Txdata1W::new(self, 8) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdouble](index.html) module"] -pub struct TXDOUBLE_SPEC; -impl crate::RegisterSpec for TXDOUBLE_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdouble::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxdoubleSpec; +impl crate::RegisterSpec for TxdoubleSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [txdouble::W](W) writer structure"] -impl crate::Writable for TXDOUBLE_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`txdouble::W`](W) writer structure"] +impl crate::Writable for TxdoubleSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXDOUBLE to value 0"] -impl crate::Resettable for TXDOUBLE_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxdoubleSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/txdoublex.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/txdoublex.rs index 0f47c31..a43ee56 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/txdoublex.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/usart0_s/txdoublex.rs @@ -1,140 +1,115 @@ #[doc = "Register `TXDOUBLEX` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TXDATA0` writer - TX Data"] -pub type TXDATA0_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDOUBLEX_SPEC, u16, u16, 9, O>; +pub type Txdata0W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; #[doc = "Field `UBRXAT0` writer - Unblock RX After Transmission"] -pub type UBRXAT0_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, O>; +pub type Ubrxat0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTRIAT0` writer - Set TXTRI After Transmission"] -pub type TXTRIAT0_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, O>; +pub type Txtriat0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXBREAK0` writer - Transmit Data As Break"] -pub type TXBREAK0_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, O>; +pub type Txbreak0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXDISAT0` writer - Clear TXEN After Transmission"] -pub type TXDISAT0_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, O>; +pub type Txdisat0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXENAT0` writer - Enable RX After Transmission"] -pub type RXENAT0_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, O>; +pub type Rxenat0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXDATA1` writer - TX Data"] -pub type TXDATA1_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TXDOUBLEX_SPEC, u16, u16, 9, O>; +pub type Txdata1W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; #[doc = "Field `UBRXAT1` writer - Unblock RX After Transmission"] -pub type UBRXAT1_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, O>; +pub type Ubrxat1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXTRIAT1` writer - Set TXTRI After Transmission"] -pub type TXTRIAT1_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, O>; +pub type Txtriat1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXBREAK1` writer - Transmit Data As Break"] -pub type TXBREAK1_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, O>; +pub type Txbreak1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXDISAT1` writer - Clear TXEN After Transmission"] -pub type TXDISAT1_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, O>; +pub type Txdisat1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXENAT1` writer - Enable RX After Transmission"] -pub type RXENAT1_W<'a, const O: u8> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, O>; +pub type Rxenat1W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bits 0:8 - TX Data"] #[inline(always)] #[must_use] - pub fn txdata0(&mut self) -> TXDATA0_W<0> { - TXDATA0_W::new(self) + pub fn txdata0(&mut self) -> Txdata0W { + Txdata0W::new(self, 0) } #[doc = "Bit 11 - Unblock RX After Transmission"] #[inline(always)] #[must_use] - pub fn ubrxat0(&mut self) -> UBRXAT0_W<11> { - UBRXAT0_W::new(self) + pub fn ubrxat0(&mut self) -> Ubrxat0W { + Ubrxat0W::new(self, 11) } #[doc = "Bit 12 - Set TXTRI After Transmission"] #[inline(always)] #[must_use] - pub fn txtriat0(&mut self) -> TXTRIAT0_W<12> { - TXTRIAT0_W::new(self) + pub fn txtriat0(&mut self) -> Txtriat0W { + Txtriat0W::new(self, 12) } #[doc = "Bit 13 - Transmit Data As Break"] #[inline(always)] #[must_use] - pub fn txbreak0(&mut self) -> TXBREAK0_W<13> { - TXBREAK0_W::new(self) + pub fn txbreak0(&mut self) -> Txbreak0W { + Txbreak0W::new(self, 13) } #[doc = "Bit 14 - Clear TXEN After Transmission"] #[inline(always)] #[must_use] - pub fn txdisat0(&mut self) -> TXDISAT0_W<14> { - TXDISAT0_W::new(self) + pub fn txdisat0(&mut self) -> Txdisat0W { + Txdisat0W::new(self, 14) } #[doc = "Bit 15 - Enable RX After Transmission"] #[inline(always)] #[must_use] - pub fn rxenat0(&mut self) -> RXENAT0_W<15> { - RXENAT0_W::new(self) + pub fn rxenat0(&mut self) -> Rxenat0W { + Rxenat0W::new(self, 15) } #[doc = "Bits 16:24 - TX Data"] #[inline(always)] #[must_use] - pub fn txdata1(&mut self) -> TXDATA1_W<16> { - TXDATA1_W::new(self) + pub fn txdata1(&mut self) -> Txdata1W { + Txdata1W::new(self, 16) } #[doc = "Bit 27 - Unblock RX After Transmission"] #[inline(always)] #[must_use] - pub fn ubrxat1(&mut self) -> UBRXAT1_W<27> { - UBRXAT1_W::new(self) + pub fn ubrxat1(&mut self) -> Ubrxat1W { + Ubrxat1W::new(self, 27) } #[doc = "Bit 28 - Set TXTRI After Transmission"] #[inline(always)] #[must_use] - pub fn txtriat1(&mut self) -> TXTRIAT1_W<28> { - TXTRIAT1_W::new(self) + pub fn txtriat1(&mut self) -> Txtriat1W { + Txtriat1W::new(self, 28) } #[doc = "Bit 29 - Transmit Data As Break"] #[inline(always)] #[must_use] - pub fn txbreak1(&mut self) -> TXBREAK1_W<29> { - TXBREAK1_W::new(self) + pub fn txbreak1(&mut self) -> Txbreak1W { + Txbreak1W::new(self, 29) } #[doc = "Bit 30 - Clear TXEN After Transmission"] #[inline(always)] #[must_use] - pub fn txdisat1(&mut self) -> TXDISAT1_W<30> { - TXDISAT1_W::new(self) + pub fn txdisat1(&mut self) -> Txdisat1W { + Txdisat1W::new(self, 30) } #[doc = "Bit 31 - Enable RX After Transmission"] #[inline(always)] #[must_use] - pub fn rxenat1(&mut self) -> RXENAT1_W<31> { - RXENAT1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn rxenat1(&mut self) -> Rxenat1W { + Rxenat1W::new(self, 31) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdoublex](index.html) module"] -pub struct TXDOUBLEX_SPEC; -impl crate::RegisterSpec for TXDOUBLEX_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdoublex::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TxdoublexSpec; +impl crate::RegisterSpec for TxdoublexSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [txdoublex::W](W) writer structure"] -impl crate::Writable for TXDOUBLEX_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`txdoublex::W`](W) writer structure"] +impl crate::Writable for TxdoublexSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TXDOUBLEX to value 0"] -impl crate::Resettable for TXDOUBLEX_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for TxdoublexSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns.rs index 94f9bd3..db09122 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns.rs @@ -1,88 +1,174 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + swrst: Swrst, + cfg: Cfg, + status: Status, + ch0cfg: Ch0cfg, + ch1cfg: Ch1cfg, + cmd: Cmd, + if_: If, + ien: Ien, + ch0f: Ch0f, + ch1f: Ch1f, + outctrl: Outctrl, + outtimercfg: Outtimercfg, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub swrst: SWRST, + #[inline(always)] + pub const fn swrst(&self) -> &Swrst { + &self.swrst + } #[doc = "0x0c - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x10 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x14 - No Description"] - pub ch0cfg: CH0CFG, + #[inline(always)] + pub const fn ch0cfg(&self) -> &Ch0cfg { + &self.ch0cfg + } #[doc = "0x18 - No Description"] - pub ch1cfg: CH1CFG, + #[inline(always)] + pub const fn ch1cfg(&self) -> &Ch1cfg { + &self.ch1cfg + } #[doc = "0x1c - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x20 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x24 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x28 - No Description"] - pub ch0f: CH0F, + #[inline(always)] + pub const fn ch0f(&self) -> &Ch0f { + &self.ch0f + } #[doc = "0x2c - No Description"] - pub ch1f: CH1F, + #[inline(always)] + pub const fn ch1f(&self) -> &Ch1f { + &self.ch1f + } #[doc = "0x30 - No Description"] - pub outctrl: OUTCTRL, + #[inline(always)] + pub const fn outctrl(&self) -> &Outctrl { + &self.outctrl + } #[doc = "0x34 - No Description"] - pub outtimercfg: OUTTIMERCFG, + #[inline(always)] + pub const fn outtimercfg(&self) -> &Outtimercfg { + &self.outtimercfg + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "SWRST (rw) register accessor: an alias for `Reg`"] -pub type SWRST = crate::Reg; +#[doc = "SWRST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swrst`] +module"] +#[doc(alias = "SWRST")] +pub type Swrst = crate::Reg; #[doc = "No Description"] pub mod swrst; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "CH0CFG (rw) register accessor: an alias for `Reg`"] -pub type CH0CFG = crate::Reg; +#[doc = "CH0CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch0cfg`] +module"] +#[doc(alias = "CH0CFG")] +pub type Ch0cfg = crate::Reg; #[doc = "No Description"] pub mod ch0cfg; -#[doc = "CH1CFG (rw) register accessor: an alias for `Reg`"] -pub type CH1CFG = crate::Reg; +#[doc = "CH1CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch1cfg`] +module"] +#[doc(alias = "CH1CFG")] +pub type Ch1cfg = crate::Reg; #[doc = "No Description"] pub mod ch1cfg; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "CH0F (w) register accessor: an alias for `Reg`"] -pub type CH0F = crate::Reg; +#[doc = "CH0F (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0f::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch0f`] +module"] +#[doc(alias = "CH0F")] +pub type Ch0f = crate::Reg; #[doc = "No Description"] pub mod ch0f; -#[doc = "CH1F (w) register accessor: an alias for `Reg`"] -pub type CH1F = crate::Reg; +#[doc = "CH1F (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1f::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch1f`] +module"] +#[doc(alias = "CH1F")] +pub type Ch1f = crate::Reg; #[doc = "No Description"] pub mod ch1f; -#[doc = "OUTCTRL (rw) register accessor: an alias for `Reg`"] -pub type OUTCTRL = crate::Reg; +#[doc = "OUTCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`outctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`outctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@outctrl`] +module"] +#[doc(alias = "OUTCTRL")] +pub type Outctrl = crate::Reg; #[doc = "No Description"] pub mod outctrl; -#[doc = "OUTTIMERCFG (rw) register accessor: an alias for `Reg`"] -pub type OUTTIMERCFG = crate::Reg; +#[doc = "OUTTIMERCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`outtimercfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`outtimercfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@outtimercfg`] +module"] +#[doc(alias = "OUTTIMERCFG")] +pub type Outtimercfg = crate::Reg; #[doc = "No Description"] pub mod outtimercfg; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/cfg.rs index 14b58d6..bbdb31a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/cfg.rs @@ -1,747 +1,740 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DIFF` reader - Differential Mode"] -pub type DIFF_R = crate::BitReader; +pub type W = crate::W; #[doc = "Differential Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DIFF_A { +pub enum Diff { #[doc = "0: Single ended output"] - SINGLEENDED = 0, + Singleended = 0, #[doc = "1: Differential output"] - DIFFERENTIAL = 1, + Differential = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DIFF_A) -> Self { + fn from(variant: Diff) -> Self { variant as u8 != 0 } } -impl DIFF_R { +#[doc = "Field `DIFF` reader - Differential Mode"] +pub type DiffR = crate::BitReader; +impl DiffR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DIFF_A { + pub const fn variant(&self) -> Diff { match self.bits { - false => DIFF_A::SINGLEENDED, - true => DIFF_A::DIFFERENTIAL, + false => Diff::Singleended, + true => Diff::Differential, } } - #[doc = "Checks if the value of the field is `SINGLEENDED`"] + #[doc = "Single ended output"] #[inline(always)] pub fn is_singleended(&self) -> bool { - *self == DIFF_A::SINGLEENDED + *self == Diff::Singleended } - #[doc = "Checks if the value of the field is `DIFFERENTIAL`"] + #[doc = "Differential output"] #[inline(always)] pub fn is_differential(&self) -> bool { - *self == DIFF_A::DIFFERENTIAL + *self == Diff::Differential } } #[doc = "Field `DIFF` writer - Differential Mode"] -pub type DIFF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DIFF_A, O>; -impl<'a, const O: u8> DIFF_W<'a, O> { +pub type DiffW<'a, REG> = crate::BitWriter<'a, REG, Diff>; +impl<'a, REG> DiffW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Single ended output"] #[inline(always)] - pub fn singleended(self) -> &'a mut W { - self.variant(DIFF_A::SINGLEENDED) + pub fn singleended(self) -> &'a mut crate::W { + self.variant(Diff::Singleended) } #[doc = "Differential output"] #[inline(always)] - pub fn differential(self) -> &'a mut W { - self.variant(DIFF_A::DIFFERENTIAL) + pub fn differential(self) -> &'a mut crate::W { + self.variant(Diff::Differential) } } -#[doc = "Field `SINEMODE` reader - Sine Mode"] -pub type SINEMODE_R = crate::BitReader; #[doc = "Sine Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SINEMODE_A { +pub enum Sinemode { #[doc = "0: Sine mode disabled. Sine reset to 0 degrees"] - DISSINEMODE = 0, + Dissinemode = 0, #[doc = "1: Sine mode enabled"] - ENSINEMODE = 1, + Ensinemode = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SINEMODE_A) -> Self { + fn from(variant: Sinemode) -> Self { variant as u8 != 0 } } -impl SINEMODE_R { +#[doc = "Field `SINEMODE` reader - Sine Mode"] +pub type SinemodeR = crate::BitReader; +impl SinemodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SINEMODE_A { + pub const fn variant(&self) -> Sinemode { match self.bits { - false => SINEMODE_A::DISSINEMODE, - true => SINEMODE_A::ENSINEMODE, + false => Sinemode::Dissinemode, + true => Sinemode::Ensinemode, } } - #[doc = "Checks if the value of the field is `DISSINEMODE`"] + #[doc = "Sine mode disabled. Sine reset to 0 degrees"] #[inline(always)] pub fn is_dissinemode(&self) -> bool { - *self == SINEMODE_A::DISSINEMODE + *self == Sinemode::Dissinemode } - #[doc = "Checks if the value of the field is `ENSINEMODE`"] + #[doc = "Sine mode enabled"] #[inline(always)] pub fn is_ensinemode(&self) -> bool { - *self == SINEMODE_A::ENSINEMODE + *self == Sinemode::Ensinemode } } #[doc = "Field `SINEMODE` writer - Sine Mode"] -pub type SINEMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, SINEMODE_A, O>; -impl<'a, const O: u8> SINEMODE_W<'a, O> { +pub type SinemodeW<'a, REG> = crate::BitWriter<'a, REG, Sinemode>; +impl<'a, REG> SinemodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Sine mode disabled. Sine reset to 0 degrees"] #[inline(always)] - pub fn dissinemode(self) -> &'a mut W { - self.variant(SINEMODE_A::DISSINEMODE) + pub fn dissinemode(self) -> &'a mut crate::W { + self.variant(Sinemode::Dissinemode) } #[doc = "Sine mode enabled"] #[inline(always)] - pub fn ensinemode(self) -> &'a mut W { - self.variant(SINEMODE_A::ENSINEMODE) + pub fn ensinemode(self) -> &'a mut crate::W { + self.variant(Sinemode::Ensinemode) } } #[doc = "Field `SINERESET` reader - Sine Wave Reset When inactive"] -pub type SINERESET_R = crate::BitReader; +pub type SineresetR = crate::BitReader; #[doc = "Field `SINERESET` writer - Sine Wave Reset When inactive"] -pub type SINERESET_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `CH0PRESCRST` reader - Channel 0 Start Reset Prescaler"] -pub type CH0PRESCRST_R = crate::BitReader; +pub type SineresetW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Channel 0 Start Reset Prescaler\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH0PRESCRST_A { +pub enum Ch0prescrst { #[doc = "0: Prescaler not reset on channel 0 start"] - NORESETPRESC = 0, + Noresetpresc = 0, #[doc = "1: Prescaler reset on channel 0 start"] - RESETPRESC = 1, + Resetpresc = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH0PRESCRST_A) -> Self { + fn from(variant: Ch0prescrst) -> Self { variant as u8 != 0 } } -impl CH0PRESCRST_R { +#[doc = "Field `CH0PRESCRST` reader - Channel 0 Start Reset Prescaler"] +pub type Ch0prescrstR = crate::BitReader; +impl Ch0prescrstR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CH0PRESCRST_A { + pub const fn variant(&self) -> Ch0prescrst { match self.bits { - false => CH0PRESCRST_A::NORESETPRESC, - true => CH0PRESCRST_A::RESETPRESC, + false => Ch0prescrst::Noresetpresc, + true => Ch0prescrst::Resetpresc, } } - #[doc = "Checks if the value of the field is `NORESETPRESC`"] + #[doc = "Prescaler not reset on channel 0 start"] #[inline(always)] pub fn is_noresetpresc(&self) -> bool { - *self == CH0PRESCRST_A::NORESETPRESC + *self == Ch0prescrst::Noresetpresc } - #[doc = "Checks if the value of the field is `RESETPRESC`"] + #[doc = "Prescaler reset on channel 0 start"] #[inline(always)] pub fn is_resetpresc(&self) -> bool { - *self == CH0PRESCRST_A::RESETPRESC + *self == Ch0prescrst::Resetpresc } } #[doc = "Field `CH0PRESCRST` writer - Channel 0 Start Reset Prescaler"] -pub type CH0PRESCRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, CH0PRESCRST_A, O>; -impl<'a, const O: u8> CH0PRESCRST_W<'a, O> { +pub type Ch0prescrstW<'a, REG> = crate::BitWriter<'a, REG, Ch0prescrst>; +impl<'a, REG> Ch0prescrstW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Prescaler not reset on channel 0 start"] #[inline(always)] - pub fn noresetpresc(self) -> &'a mut W { - self.variant(CH0PRESCRST_A::NORESETPRESC) + pub fn noresetpresc(self) -> &'a mut crate::W { + self.variant(Ch0prescrst::Noresetpresc) } #[doc = "Prescaler reset on channel 0 start"] #[inline(always)] - pub fn resetpresc(self) -> &'a mut W { - self.variant(CH0PRESCRST_A::RESETPRESC) + pub fn resetpresc(self) -> &'a mut crate::W { + self.variant(Ch0prescrst::Resetpresc) } } -#[doc = "Field `REFRSEL` reader - Reference Selection"] -pub type REFRSEL_R = crate::FieldReader; #[doc = "Reference Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REFRSEL_A { +pub enum Refrsel { #[doc = "0: Internal 1.25 V bandgap reference"] V125 = 0, #[doc = "1: Internal 2.5 V bandgap reference"] V25 = 1, #[doc = "2: AVDD reference"] - VDD = 2, + Vdd = 2, #[doc = "3: External pin reference"] - EXT = 3, + Ext = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REFRSEL_A) -> Self { + fn from(variant: Refrsel) -> Self { variant as _ } } -impl REFRSEL_R { +impl crate::FieldSpec for Refrsel { + type Ux = u8; +} +impl crate::IsEnum for Refrsel {} +#[doc = "Field `REFRSEL` reader - Reference Selection"] +pub type RefrselR = crate::FieldReader; +impl RefrselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REFRSEL_A { + pub const fn variant(&self) -> Refrsel { match self.bits { - 0 => REFRSEL_A::V125, - 1 => REFRSEL_A::V25, - 2 => REFRSEL_A::VDD, - 3 => REFRSEL_A::EXT, + 0 => Refrsel::V125, + 1 => Refrsel::V25, + 2 => Refrsel::Vdd, + 3 => Refrsel::Ext, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `V125`"] + #[doc = "Internal 1.25 V bandgap reference"] #[inline(always)] pub fn is_v125(&self) -> bool { - *self == REFRSEL_A::V125 + *self == Refrsel::V125 } - #[doc = "Checks if the value of the field is `V25`"] + #[doc = "Internal 2.5 V bandgap reference"] #[inline(always)] pub fn is_v25(&self) -> bool { - *self == REFRSEL_A::V25 + *self == Refrsel::V25 } - #[doc = "Checks if the value of the field is `VDD`"] + #[doc = "AVDD reference"] #[inline(always)] pub fn is_vdd(&self) -> bool { - *self == REFRSEL_A::VDD + *self == Refrsel::Vdd } - #[doc = "Checks if the value of the field is `EXT`"] + #[doc = "External pin reference"] #[inline(always)] pub fn is_ext(&self) -> bool { - *self == REFRSEL_A::EXT + *self == Refrsel::Ext } } #[doc = "Field `REFRSEL` writer - Reference Selection"] -pub type REFRSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, REFRSEL_A, 2, O>; -impl<'a, const O: u8> REFRSEL_W<'a, O> { +pub type RefrselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Refrsel, crate::Safe>; +impl<'a, REG> RefrselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Internal 1.25 V bandgap reference"] #[inline(always)] - pub fn v125(self) -> &'a mut W { - self.variant(REFRSEL_A::V125) + pub fn v125(self) -> &'a mut crate::W { + self.variant(Refrsel::V125) } #[doc = "Internal 2.5 V bandgap reference"] #[inline(always)] - pub fn v25(self) -> &'a mut W { - self.variant(REFRSEL_A::V25) + pub fn v25(self) -> &'a mut crate::W { + self.variant(Refrsel::V25) } #[doc = "AVDD reference"] #[inline(always)] - pub fn vdd(self) -> &'a mut W { - self.variant(REFRSEL_A::VDD) + pub fn vdd(self) -> &'a mut crate::W { + self.variant(Refrsel::Vdd) } #[doc = "External pin reference"] #[inline(always)] - pub fn ext(self) -> &'a mut W { - self.variant(REFRSEL_A::EXT) + pub fn ext(self) -> &'a mut crate::W { + self.variant(Refrsel::Ext) } } #[doc = "Field `PRESC` reader - Prescaler Setting for DAC clock"] -pub type PRESC_R = crate::FieldReader; +pub type PrescR = crate::FieldReader; #[doc = "Field `PRESC` writer - Prescaler Setting for DAC clock"] -pub type PRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, u8, 7, O>; -#[doc = "Field `TIMEROVRFLOWPERIOD` reader - Internal Timer Overflow Period"] -pub type TIMEROVRFLOWPERIOD_R = crate::FieldReader; +pub type PrescW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Internal Timer Overflow Period\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TIMEROVRFLOWPERIOD_A { +pub enum Timerovrflowperiod { #[doc = "0: The Timer overflows every 2 Prescaled CLK_DAC cycles"] - CYCLES2 = 0, + Cycles2 = 0, #[doc = "1: The Timer overflows every 4 Prescaled CLK_DAC cycles"] - CYCLES4 = 1, + Cycles4 = 1, #[doc = "2: The Timer overflows every 8 Prescaled CLK_DAC cycles"] - CYCLES8 = 2, + Cycles8 = 2, #[doc = "3: The Timer overflows every 16 Prescaled CLK_DAC cycles"] - CYCLES16 = 3, + Cycles16 = 3, #[doc = "4: The Timer overflows every 32 Prescaled CLK_DAC cycles"] - CYCLES32 = 4, + Cycles32 = 4, #[doc = "5: The Timer overflows every 64 Prescaled CLK_DAC cycles"] - CYCLES64 = 5, + Cycles64 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TIMEROVRFLOWPERIOD_A) -> Self { + fn from(variant: Timerovrflowperiod) -> Self { variant as _ } } -impl TIMEROVRFLOWPERIOD_R { +impl crate::FieldSpec for Timerovrflowperiod { + type Ux = u8; +} +impl crate::IsEnum for Timerovrflowperiod {} +#[doc = "Field `TIMEROVRFLOWPERIOD` reader - Internal Timer Overflow Period"] +pub type TimerovrflowperiodR = crate::FieldReader; +impl TimerovrflowperiodR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TIMEROVRFLOWPERIOD_A::CYCLES2), - 1 => Some(TIMEROVRFLOWPERIOD_A::CYCLES4), - 2 => Some(TIMEROVRFLOWPERIOD_A::CYCLES8), - 3 => Some(TIMEROVRFLOWPERIOD_A::CYCLES16), - 4 => Some(TIMEROVRFLOWPERIOD_A::CYCLES32), - 5 => Some(TIMEROVRFLOWPERIOD_A::CYCLES64), + 0 => Some(Timerovrflowperiod::Cycles2), + 1 => Some(Timerovrflowperiod::Cycles4), + 2 => Some(Timerovrflowperiod::Cycles8), + 3 => Some(Timerovrflowperiod::Cycles16), + 4 => Some(Timerovrflowperiod::Cycles32), + 5 => Some(Timerovrflowperiod::Cycles64), _ => None, } } - #[doc = "Checks if the value of the field is `CYCLES2`"] + #[doc = "The Timer overflows every 2 Prescaled CLK_DAC cycles"] #[inline(always)] pub fn is_cycles2(&self) -> bool { - *self == TIMEROVRFLOWPERIOD_A::CYCLES2 + *self == Timerovrflowperiod::Cycles2 } - #[doc = "Checks if the value of the field is `CYCLES4`"] + #[doc = "The Timer overflows every 4 Prescaled CLK_DAC cycles"] #[inline(always)] pub fn is_cycles4(&self) -> bool { - *self == TIMEROVRFLOWPERIOD_A::CYCLES4 + *self == Timerovrflowperiod::Cycles4 } - #[doc = "Checks if the value of the field is `CYCLES8`"] + #[doc = "The Timer overflows every 8 Prescaled CLK_DAC cycles"] #[inline(always)] pub fn is_cycles8(&self) -> bool { - *self == TIMEROVRFLOWPERIOD_A::CYCLES8 + *self == Timerovrflowperiod::Cycles8 } - #[doc = "Checks if the value of the field is `CYCLES16`"] + #[doc = "The Timer overflows every 16 Prescaled CLK_DAC cycles"] #[inline(always)] pub fn is_cycles16(&self) -> bool { - *self == TIMEROVRFLOWPERIOD_A::CYCLES16 + *self == Timerovrflowperiod::Cycles16 } - #[doc = "Checks if the value of the field is `CYCLES32`"] + #[doc = "The Timer overflows every 32 Prescaled CLK_DAC cycles"] #[inline(always)] pub fn is_cycles32(&self) -> bool { - *self == TIMEROVRFLOWPERIOD_A::CYCLES32 + *self == Timerovrflowperiod::Cycles32 } - #[doc = "Checks if the value of the field is `CYCLES64`"] + #[doc = "The Timer overflows every 64 Prescaled CLK_DAC cycles"] #[inline(always)] pub fn is_cycles64(&self) -> bool { - *self == TIMEROVRFLOWPERIOD_A::CYCLES64 + *self == Timerovrflowperiod::Cycles64 } } #[doc = "Field `TIMEROVRFLOWPERIOD` writer - Internal Timer Overflow Period"] -pub type TIMEROVRFLOWPERIOD_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CFG_SPEC, u8, TIMEROVRFLOWPERIOD_A, 3, O>; -impl<'a, const O: u8> TIMEROVRFLOWPERIOD_W<'a, O> { +pub type TimerovrflowperiodW<'a, REG> = crate::FieldWriter<'a, REG, 3, Timerovrflowperiod>; +impl<'a, REG> TimerovrflowperiodW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The Timer overflows every 2 Prescaled CLK_DAC cycles"] #[inline(always)] - pub fn cycles2(self) -> &'a mut W { - self.variant(TIMEROVRFLOWPERIOD_A::CYCLES2) + pub fn cycles2(self) -> &'a mut crate::W { + self.variant(Timerovrflowperiod::Cycles2) } #[doc = "The Timer overflows every 4 Prescaled CLK_DAC cycles"] #[inline(always)] - pub fn cycles4(self) -> &'a mut W { - self.variant(TIMEROVRFLOWPERIOD_A::CYCLES4) + pub fn cycles4(self) -> &'a mut crate::W { + self.variant(Timerovrflowperiod::Cycles4) } #[doc = "The Timer overflows every 8 Prescaled CLK_DAC cycles"] #[inline(always)] - pub fn cycles8(self) -> &'a mut W { - self.variant(TIMEROVRFLOWPERIOD_A::CYCLES8) + pub fn cycles8(self) -> &'a mut crate::W { + self.variant(Timerovrflowperiod::Cycles8) } #[doc = "The Timer overflows every 16 Prescaled CLK_DAC cycles"] #[inline(always)] - pub fn cycles16(self) -> &'a mut W { - self.variant(TIMEROVRFLOWPERIOD_A::CYCLES16) + pub fn cycles16(self) -> &'a mut crate::W { + self.variant(Timerovrflowperiod::Cycles16) } #[doc = "The Timer overflows every 32 Prescaled CLK_DAC cycles"] #[inline(always)] - pub fn cycles32(self) -> &'a mut W { - self.variant(TIMEROVRFLOWPERIOD_A::CYCLES32) + pub fn cycles32(self) -> &'a mut crate::W { + self.variant(Timerovrflowperiod::Cycles32) } #[doc = "The Timer overflows every 64 Prescaled CLK_DAC cycles"] #[inline(always)] - pub fn cycles64(self) -> &'a mut W { - self.variant(TIMEROVRFLOWPERIOD_A::CYCLES64) + pub fn cycles64(self) -> &'a mut crate::W { + self.variant(Timerovrflowperiod::Cycles64) } } -#[doc = "Field `REFRESHPERIOD` reader - Refresh Timer Overflow Period"] -pub type REFRESHPERIOD_R = crate::FieldReader; #[doc = "Refresh Timer Overflow Period\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REFRESHPERIOD_A { +pub enum Refreshperiod { #[doc = "0: All channels with enabled refresh are refreshed every 2 CLK_REFRESH cycles"] - CYCLES2 = 0, + Cycles2 = 0, #[doc = "1: All channels with enabled refresh are refreshed every 4 CLK_REFRESH cycles"] - CYCLES4 = 1, + Cycles4 = 1, #[doc = "2: All channels with enabled refresh are refreshed every 8 CLK_REFRESH cycles"] - CYCLES8 = 2, + Cycles8 = 2, #[doc = "3: All channels with enabled refresh are refreshed every 16 CLK_REFRESH cycles"] - CYCLES16 = 3, + Cycles16 = 3, #[doc = "4: All channels with enabled refresh are refreshed every 32 CLK_REFRESH cycles"] - CYCLES32 = 4, + Cycles32 = 4, #[doc = "5: All channels with enabled refresh are refreshed every 64 CLK_REFRESH cycles"] - CYCLES64 = 5, + Cycles64 = 5, #[doc = "6: All channels with enabled refresh are refreshed every 128 CLK_REFRESH cycles"] - CYCLES128 = 6, + Cycles128 = 6, #[doc = "7: All channels with enabled refresh are refreshed every 256 CLK_REFRESH cycles"] - CYCLES256 = 7, + Cycles256 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REFRESHPERIOD_A) -> Self { + fn from(variant: Refreshperiod) -> Self { variant as _ } } -impl REFRESHPERIOD_R { +impl crate::FieldSpec for Refreshperiod { + type Ux = u8; +} +impl crate::IsEnum for Refreshperiod {} +#[doc = "Field `REFRESHPERIOD` reader - Refresh Timer Overflow Period"] +pub type RefreshperiodR = crate::FieldReader; +impl RefreshperiodR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REFRESHPERIOD_A { + pub const fn variant(&self) -> Refreshperiod { match self.bits { - 0 => REFRESHPERIOD_A::CYCLES2, - 1 => REFRESHPERIOD_A::CYCLES4, - 2 => REFRESHPERIOD_A::CYCLES8, - 3 => REFRESHPERIOD_A::CYCLES16, - 4 => REFRESHPERIOD_A::CYCLES32, - 5 => REFRESHPERIOD_A::CYCLES64, - 6 => REFRESHPERIOD_A::CYCLES128, - 7 => REFRESHPERIOD_A::CYCLES256, + 0 => Refreshperiod::Cycles2, + 1 => Refreshperiod::Cycles4, + 2 => Refreshperiod::Cycles8, + 3 => Refreshperiod::Cycles16, + 4 => Refreshperiod::Cycles32, + 5 => Refreshperiod::Cycles64, + 6 => Refreshperiod::Cycles128, + 7 => Refreshperiod::Cycles256, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `CYCLES2`"] + #[doc = "All channels with enabled refresh are refreshed every 2 CLK_REFRESH cycles"] #[inline(always)] pub fn is_cycles2(&self) -> bool { - *self == REFRESHPERIOD_A::CYCLES2 + *self == Refreshperiod::Cycles2 } - #[doc = "Checks if the value of the field is `CYCLES4`"] + #[doc = "All channels with enabled refresh are refreshed every 4 CLK_REFRESH cycles"] #[inline(always)] pub fn is_cycles4(&self) -> bool { - *self == REFRESHPERIOD_A::CYCLES4 + *self == Refreshperiod::Cycles4 } - #[doc = "Checks if the value of the field is `CYCLES8`"] + #[doc = "All channels with enabled refresh are refreshed every 8 CLK_REFRESH cycles"] #[inline(always)] pub fn is_cycles8(&self) -> bool { - *self == REFRESHPERIOD_A::CYCLES8 + *self == Refreshperiod::Cycles8 } - #[doc = "Checks if the value of the field is `CYCLES16`"] + #[doc = "All channels with enabled refresh are refreshed every 16 CLK_REFRESH cycles"] #[inline(always)] pub fn is_cycles16(&self) -> bool { - *self == REFRESHPERIOD_A::CYCLES16 + *self == Refreshperiod::Cycles16 } - #[doc = "Checks if the value of the field is `CYCLES32`"] + #[doc = "All channels with enabled refresh are refreshed every 32 CLK_REFRESH cycles"] #[inline(always)] pub fn is_cycles32(&self) -> bool { - *self == REFRESHPERIOD_A::CYCLES32 + *self == Refreshperiod::Cycles32 } - #[doc = "Checks if the value of the field is `CYCLES64`"] + #[doc = "All channels with enabled refresh are refreshed every 64 CLK_REFRESH cycles"] #[inline(always)] pub fn is_cycles64(&self) -> bool { - *self == REFRESHPERIOD_A::CYCLES64 + *self == Refreshperiod::Cycles64 } - #[doc = "Checks if the value of the field is `CYCLES128`"] + #[doc = "All channels with enabled refresh are refreshed every 128 CLK_REFRESH cycles"] #[inline(always)] pub fn is_cycles128(&self) -> bool { - *self == REFRESHPERIOD_A::CYCLES128 + *self == Refreshperiod::Cycles128 } - #[doc = "Checks if the value of the field is `CYCLES256`"] + #[doc = "All channels with enabled refresh are refreshed every 256 CLK_REFRESH cycles"] #[inline(always)] pub fn is_cycles256(&self) -> bool { - *self == REFRESHPERIOD_A::CYCLES256 + *self == Refreshperiod::Cycles256 } } #[doc = "Field `REFRESHPERIOD` writer - Refresh Timer Overflow Period"] -pub type REFRESHPERIOD_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, REFRESHPERIOD_A, 3, O>; -impl<'a, const O: u8> REFRESHPERIOD_W<'a, O> { +pub type RefreshperiodW<'a, REG> = crate::FieldWriter<'a, REG, 3, Refreshperiod, crate::Safe>; +impl<'a, REG> RefreshperiodW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "All channels with enabled refresh are refreshed every 2 CLK_REFRESH cycles"] #[inline(always)] - pub fn cycles2(self) -> &'a mut W { - self.variant(REFRESHPERIOD_A::CYCLES2) + pub fn cycles2(self) -> &'a mut crate::W { + self.variant(Refreshperiod::Cycles2) } #[doc = "All channels with enabled refresh are refreshed every 4 CLK_REFRESH cycles"] #[inline(always)] - pub fn cycles4(self) -> &'a mut W { - self.variant(REFRESHPERIOD_A::CYCLES4) + pub fn cycles4(self) -> &'a mut crate::W { + self.variant(Refreshperiod::Cycles4) } #[doc = "All channels with enabled refresh are refreshed every 8 CLK_REFRESH cycles"] #[inline(always)] - pub fn cycles8(self) -> &'a mut W { - self.variant(REFRESHPERIOD_A::CYCLES8) + pub fn cycles8(self) -> &'a mut crate::W { + self.variant(Refreshperiod::Cycles8) } #[doc = "All channels with enabled refresh are refreshed every 16 CLK_REFRESH cycles"] #[inline(always)] - pub fn cycles16(self) -> &'a mut W { - self.variant(REFRESHPERIOD_A::CYCLES16) + pub fn cycles16(self) -> &'a mut crate::W { + self.variant(Refreshperiod::Cycles16) } #[doc = "All channels with enabled refresh are refreshed every 32 CLK_REFRESH cycles"] #[inline(always)] - pub fn cycles32(self) -> &'a mut W { - self.variant(REFRESHPERIOD_A::CYCLES32) + pub fn cycles32(self) -> &'a mut crate::W { + self.variant(Refreshperiod::Cycles32) } #[doc = "All channels with enabled refresh are refreshed every 64 CLK_REFRESH cycles"] #[inline(always)] - pub fn cycles64(self) -> &'a mut W { - self.variant(REFRESHPERIOD_A::CYCLES64) + pub fn cycles64(self) -> &'a mut crate::W { + self.variant(Refreshperiod::Cycles64) } #[doc = "All channels with enabled refresh are refreshed every 128 CLK_REFRESH cycles"] #[inline(always)] - pub fn cycles128(self) -> &'a mut W { - self.variant(REFRESHPERIOD_A::CYCLES128) + pub fn cycles128(self) -> &'a mut crate::W { + self.variant(Refreshperiod::Cycles128) } #[doc = "All channels with enabled refresh are refreshed every 256 CLK_REFRESH cycles"] #[inline(always)] - pub fn cycles256(self) -> &'a mut W { - self.variant(REFRESHPERIOD_A::CYCLES256) + pub fn cycles256(self) -> &'a mut crate::W { + self.variant(Refreshperiod::Cycles256) } } #[doc = "Field `BIASKEEPWARM` reader - Bias Keepwarm Mode Enable"] -pub type BIASKEEPWARM_R = crate::BitReader; +pub type BiaskeepwarmR = crate::BitReader; #[doc = "Field `BIASKEEPWARM` writer - Bias Keepwarm Mode Enable"] -pub type BIASKEEPWARM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type BiaskeepwarmW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMAWU` reader - VDAC DMA Wakeup"] -pub type DMAWU_R = crate::BitReader; +pub type DmawuR = crate::BitReader; #[doc = "Field `DMAWU` writer - VDAC DMA Wakeup"] -pub type DMAWU_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type DmawuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ONDEMANDCLK` reader - Always allow clk_dac"] -pub type ONDEMANDCLK_R = crate::BitReader; +pub type OndemandclkR = crate::BitReader; #[doc = "Field `ONDEMANDCLK` writer - Always allow clk_dac"] -pub type ONDEMANDCLK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `DBGHALT` reader - Debug Halt"] -pub type DBGHALT_R = crate::BitReader; +pub type OndemandclkW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Debug Halt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DBGHALT_A { +pub enum Dbghalt { #[doc = "0: Continue operation as normal during debug mode"] - NORMAL = 0, + Normal = 0, #[doc = "1: Complete the current conversion and then halt during debug mode"] - HALT = 1, + Halt = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DBGHALT_A) -> Self { + fn from(variant: Dbghalt) -> Self { variant as u8 != 0 } } -impl DBGHALT_R { +#[doc = "Field `DBGHALT` reader - Debug Halt"] +pub type DbghaltR = crate::BitReader; +impl DbghaltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DBGHALT_A { + pub const fn variant(&self) -> Dbghalt { match self.bits { - false => DBGHALT_A::NORMAL, - true => DBGHALT_A::HALT, + false => Dbghalt::Normal, + true => Dbghalt::Halt, } } - #[doc = "Checks if the value of the field is `NORMAL`"] + #[doc = "Continue operation as normal during debug mode"] #[inline(always)] pub fn is_normal(&self) -> bool { - *self == DBGHALT_A::NORMAL + *self == Dbghalt::Normal } - #[doc = "Checks if the value of the field is `HALT`"] + #[doc = "Complete the current conversion and then halt during debug mode"] #[inline(always)] pub fn is_halt(&self) -> bool { - *self == DBGHALT_A::HALT + *self == Dbghalt::Halt } } #[doc = "Field `DBGHALT` writer - Debug Halt"] -pub type DBGHALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DBGHALT_A, O>; -impl<'a, const O: u8> DBGHALT_W<'a, O> { +pub type DbghaltW<'a, REG> = crate::BitWriter<'a, REG, Dbghalt>; +impl<'a, REG> DbghaltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Continue operation as normal during debug mode"] #[inline(always)] - pub fn normal(self) -> &'a mut W { - self.variant(DBGHALT_A::NORMAL) + pub fn normal(self) -> &'a mut crate::W { + self.variant(Dbghalt::Normal) } #[doc = "Complete the current conversion and then halt during debug mode"] #[inline(always)] - pub fn halt(self) -> &'a mut W { - self.variant(DBGHALT_A::HALT) + pub fn halt(self) -> &'a mut crate::W { + self.variant(Dbghalt::Halt) } } #[doc = "Field `WARMUPTIME` reader - DAC Warmup Time"] -pub type WARMUPTIME_R = crate::FieldReader; +pub type WarmuptimeR = crate::FieldReader; #[doc = "Field `WARMUPTIME` writer - DAC Warmup Time"] -pub type WARMUPTIME_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, u8, 3, O>; +pub type WarmuptimeW<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bit 0 - Differential Mode"] #[inline(always)] - pub fn diff(&self) -> DIFF_R { - DIFF_R::new((self.bits & 1) != 0) + pub fn diff(&self) -> DiffR { + DiffR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Sine Mode"] #[inline(always)] - pub fn sinemode(&self) -> SINEMODE_R { - SINEMODE_R::new(((self.bits >> 1) & 1) != 0) + pub fn sinemode(&self) -> SinemodeR { + SinemodeR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Sine Wave Reset When inactive"] #[inline(always)] - pub fn sinereset(&self) -> SINERESET_R { - SINERESET_R::new(((self.bits >> 2) & 1) != 0) + pub fn sinereset(&self) -> SineresetR { + SineresetR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Channel 0 Start Reset Prescaler"] #[inline(always)] - pub fn ch0prescrst(&self) -> CH0PRESCRST_R { - CH0PRESCRST_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch0prescrst(&self) -> Ch0prescrstR { + Ch0prescrstR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:5 - Reference Selection"] #[inline(always)] - pub fn refrsel(&self) -> REFRSEL_R { - REFRSEL_R::new(((self.bits >> 4) & 3) as u8) + pub fn refrsel(&self) -> RefrselR { + RefrselR::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 7:13 - Prescaler Setting for DAC clock"] #[inline(always)] - pub fn presc(&self) -> PRESC_R { - PRESC_R::new(((self.bits >> 7) & 0x7f) as u8) + pub fn presc(&self) -> PrescR { + PrescR::new(((self.bits >> 7) & 0x7f) as u8) } #[doc = "Bits 16:18 - Internal Timer Overflow Period"] #[inline(always)] - pub fn timerovrflowperiod(&self) -> TIMEROVRFLOWPERIOD_R { - TIMEROVRFLOWPERIOD_R::new(((self.bits >> 16) & 7) as u8) + pub fn timerovrflowperiod(&self) -> TimerovrflowperiodR { + TimerovrflowperiodR::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Refresh Timer Overflow Period"] #[inline(always)] - pub fn refreshperiod(&self) -> REFRESHPERIOD_R { - REFRESHPERIOD_R::new(((self.bits >> 20) & 7) as u8) + pub fn refreshperiod(&self) -> RefreshperiodR { + RefreshperiodR::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bit 24 - Bias Keepwarm Mode Enable"] #[inline(always)] - pub fn biaskeepwarm(&self) -> BIASKEEPWARM_R { - BIASKEEPWARM_R::new(((self.bits >> 24) & 1) != 0) + pub fn biaskeepwarm(&self) -> BiaskeepwarmR { + BiaskeepwarmR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - VDAC DMA Wakeup"] #[inline(always)] - pub fn dmawu(&self) -> DMAWU_R { - DMAWU_R::new(((self.bits >> 25) & 1) != 0) + pub fn dmawu(&self) -> DmawuR { + DmawuR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Always allow clk_dac"] #[inline(always)] - pub fn ondemandclk(&self) -> ONDEMANDCLK_R { - ONDEMANDCLK_R::new(((self.bits >> 26) & 1) != 0) + pub fn ondemandclk(&self) -> OndemandclkR { + OndemandclkR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - Debug Halt"] #[inline(always)] - pub fn dbghalt(&self) -> DBGHALT_R { - DBGHALT_R::new(((self.bits >> 27) & 1) != 0) + pub fn dbghalt(&self) -> DbghaltR { + DbghaltR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bits 28:30 - DAC Warmup Time"] #[inline(always)] - pub fn warmuptime(&self) -> WARMUPTIME_R { - WARMUPTIME_R::new(((self.bits >> 28) & 7) as u8) + pub fn warmuptime(&self) -> WarmuptimeR { + WarmuptimeR::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bit 0 - Differential Mode"] #[inline(always)] #[must_use] - pub fn diff(&mut self) -> DIFF_W<0> { - DIFF_W::new(self) + pub fn diff(&mut self) -> DiffW { + DiffW::new(self, 0) } #[doc = "Bit 1 - Sine Mode"] #[inline(always)] #[must_use] - pub fn sinemode(&mut self) -> SINEMODE_W<1> { - SINEMODE_W::new(self) + pub fn sinemode(&mut self) -> SinemodeW { + SinemodeW::new(self, 1) } #[doc = "Bit 2 - Sine Wave Reset When inactive"] #[inline(always)] #[must_use] - pub fn sinereset(&mut self) -> SINERESET_W<2> { - SINERESET_W::new(self) + pub fn sinereset(&mut self) -> SineresetW { + SineresetW::new(self, 2) } #[doc = "Bit 3 - Channel 0 Start Reset Prescaler"] #[inline(always)] #[must_use] - pub fn ch0prescrst(&mut self) -> CH0PRESCRST_W<3> { - CH0PRESCRST_W::new(self) + pub fn ch0prescrst(&mut self) -> Ch0prescrstW { + Ch0prescrstW::new(self, 3) } #[doc = "Bits 4:5 - Reference Selection"] #[inline(always)] #[must_use] - pub fn refrsel(&mut self) -> REFRSEL_W<4> { - REFRSEL_W::new(self) + pub fn refrsel(&mut self) -> RefrselW { + RefrselW::new(self, 4) } #[doc = "Bits 7:13 - Prescaler Setting for DAC clock"] #[inline(always)] #[must_use] - pub fn presc(&mut self) -> PRESC_W<7> { - PRESC_W::new(self) + pub fn presc(&mut self) -> PrescW { + PrescW::new(self, 7) } #[doc = "Bits 16:18 - Internal Timer Overflow Period"] #[inline(always)] #[must_use] - pub fn timerovrflowperiod(&mut self) -> TIMEROVRFLOWPERIOD_W<16> { - TIMEROVRFLOWPERIOD_W::new(self) + pub fn timerovrflowperiod(&mut self) -> TimerovrflowperiodW { + TimerovrflowperiodW::new(self, 16) } #[doc = "Bits 20:22 - Refresh Timer Overflow Period"] #[inline(always)] #[must_use] - pub fn refreshperiod(&mut self) -> REFRESHPERIOD_W<20> { - REFRESHPERIOD_W::new(self) + pub fn refreshperiod(&mut self) -> RefreshperiodW { + RefreshperiodW::new(self, 20) } #[doc = "Bit 24 - Bias Keepwarm Mode Enable"] #[inline(always)] #[must_use] - pub fn biaskeepwarm(&mut self) -> BIASKEEPWARM_W<24> { - BIASKEEPWARM_W::new(self) + pub fn biaskeepwarm(&mut self) -> BiaskeepwarmW { + BiaskeepwarmW::new(self, 24) } #[doc = "Bit 25 - VDAC DMA Wakeup"] #[inline(always)] #[must_use] - pub fn dmawu(&mut self) -> DMAWU_W<25> { - DMAWU_W::new(self) + pub fn dmawu(&mut self) -> DmawuW { + DmawuW::new(self, 25) } #[doc = "Bit 26 - Always allow clk_dac"] #[inline(always)] #[must_use] - pub fn ondemandclk(&mut self) -> ONDEMANDCLK_W<26> { - ONDEMANDCLK_W::new(self) + pub fn ondemandclk(&mut self) -> OndemandclkW { + OndemandclkW::new(self, 26) } #[doc = "Bit 27 - Debug Halt"] #[inline(always)] #[must_use] - pub fn dbghalt(&mut self) -> DBGHALT_W<27> { - DBGHALT_W::new(self) + pub fn dbghalt(&mut self) -> DbghaltW { + DbghaltW::new(self, 27) } #[doc = "Bits 28:30 - DAC Warmup Time"] #[inline(always)] #[must_use] - pub fn warmuptime(&mut self) -> WARMUPTIME_W<28> { - WARMUPTIME_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn warmuptime(&mut self) -> WarmuptimeW { + WarmuptimeW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0x2000_0000"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x2000_0000; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0x2000_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/ch0cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/ch0cfg.rs index 7c36a66..94cf159 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/ch0cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/ch0cfg.rs @@ -1,438 +1,418 @@ #[doc = "Register `CH0CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH0CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CONVMODE` reader - Channel 0 Conversion Mode"] -pub type CONVMODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Channel 0 Conversion Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CONVMODE_A { +pub enum Convmode { #[doc = "0: DAC channel 0 is set in continuous mode"] - CONTINUOUS = 0, + Continuous = 0, #[doc = "1: DAC channel 0 is set in sample/shut off mode"] - SAMPLEOFF = 1, + Sampleoff = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CONVMODE_A) -> Self { + fn from(variant: Convmode) -> Self { variant as u8 != 0 } } -impl CONVMODE_R { +#[doc = "Field `CONVMODE` reader - Channel 0 Conversion Mode"] +pub type ConvmodeR = crate::BitReader; +impl ConvmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CONVMODE_A { + pub const fn variant(&self) -> Convmode { match self.bits { - false => CONVMODE_A::CONTINUOUS, - true => CONVMODE_A::SAMPLEOFF, + false => Convmode::Continuous, + true => Convmode::Sampleoff, } } - #[doc = "Checks if the value of the field is `CONTINUOUS`"] + #[doc = "DAC channel 0 is set in continuous mode"] #[inline(always)] pub fn is_continuous(&self) -> bool { - *self == CONVMODE_A::CONTINUOUS + *self == Convmode::Continuous } - #[doc = "Checks if the value of the field is `SAMPLEOFF`"] + #[doc = "DAC channel 0 is set in sample/shut off mode"] #[inline(always)] pub fn is_sampleoff(&self) -> bool { - *self == CONVMODE_A::SAMPLEOFF + *self == Convmode::Sampleoff } } #[doc = "Field `CONVMODE` writer - Channel 0 Conversion Mode"] -pub type CONVMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH0CFG_SPEC, CONVMODE_A, O>; -impl<'a, const O: u8> CONVMODE_W<'a, O> { +pub type ConvmodeW<'a, REG> = crate::BitWriter<'a, REG, Convmode>; +impl<'a, REG> ConvmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "DAC channel 0 is set in continuous mode"] #[inline(always)] - pub fn continuous(self) -> &'a mut W { - self.variant(CONVMODE_A::CONTINUOUS) + pub fn continuous(self) -> &'a mut crate::W { + self.variant(Convmode::Continuous) } #[doc = "DAC channel 0 is set in sample/shut off mode"] #[inline(always)] - pub fn sampleoff(self) -> &'a mut W { - self.variant(CONVMODE_A::SAMPLEOFF) + pub fn sampleoff(self) -> &'a mut crate::W { + self.variant(Convmode::Sampleoff) } } -#[doc = "Field `POWERMODE` reader - Channel 0 Power Mode"] -pub type POWERMODE_R = crate::BitReader; #[doc = "Channel 0 Power Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum POWERMODE_A { +pub enum Powermode { #[doc = "0: Default is High Power Mode"] - HIGHPOWER = 0, + Highpower = 0, #[doc = "1: Set this bit for Low Power Mode"] - LOWPOWER = 1, + Lowpower = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: POWERMODE_A) -> Self { + fn from(variant: Powermode) -> Self { variant as u8 != 0 } } -impl POWERMODE_R { +#[doc = "Field `POWERMODE` reader - Channel 0 Power Mode"] +pub type PowermodeR = crate::BitReader; +impl PowermodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> POWERMODE_A { + pub const fn variant(&self) -> Powermode { match self.bits { - false => POWERMODE_A::HIGHPOWER, - true => POWERMODE_A::LOWPOWER, + false => Powermode::Highpower, + true => Powermode::Lowpower, } } - #[doc = "Checks if the value of the field is `HIGHPOWER`"] + #[doc = "Default is High Power Mode"] #[inline(always)] pub fn is_highpower(&self) -> bool { - *self == POWERMODE_A::HIGHPOWER + *self == Powermode::Highpower } - #[doc = "Checks if the value of the field is `LOWPOWER`"] + #[doc = "Set this bit for Low Power Mode"] #[inline(always)] pub fn is_lowpower(&self) -> bool { - *self == POWERMODE_A::LOWPOWER + *self == Powermode::Lowpower } } #[doc = "Field `POWERMODE` writer - Channel 0 Power Mode"] -pub type POWERMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH0CFG_SPEC, POWERMODE_A, O>; -impl<'a, const O: u8> POWERMODE_W<'a, O> { +pub type PowermodeW<'a, REG> = crate::BitWriter<'a, REG, Powermode>; +impl<'a, REG> PowermodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Default is High Power Mode"] #[inline(always)] - pub fn highpower(self) -> &'a mut W { - self.variant(POWERMODE_A::HIGHPOWER) + pub fn highpower(self) -> &'a mut crate::W { + self.variant(Powermode::Highpower) } #[doc = "Set this bit for Low Power Mode"] #[inline(always)] - pub fn lowpower(self) -> &'a mut W { - self.variant(POWERMODE_A::LOWPOWER) + pub fn lowpower(self) -> &'a mut crate::W { + self.variant(Powermode::Lowpower) } } -#[doc = "Field `TRIGMODE` reader - Channel 0 Trigger Mode"] -pub type TRIGMODE_R = crate::FieldReader; #[doc = "Channel 0 Trigger Mode\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TRIGMODE_A { +pub enum Trigmode { #[doc = "0: No Conversion Trigger Source Selected for Channel 0"] - NONE = 0, + None = 0, #[doc = "1: Channel 0 is triggered by Channel 0 FIFO (CH0F) write"] - SW = 1, + Sw = 1, #[doc = "2: Channel 0 is triggered by Sync PRS input. PRS Trigger should have the same clock group as VDAC."] - SYNCPRS = 2, + Syncprs = 2, #[doc = "3: Channel 0 is triggered by LESENSE"] - LESENSE = 3, + Lesense = 3, #[doc = "4: Channel 0 is triggered by Internal Timer Overflow"] - INTERNALTIMER = 4, + Internaltimer = 4, #[doc = "5: Channel 0 is triggered by Async PRS input"] - ASYNCPRS = 5, + Asyncprs = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TRIGMODE_A) -> Self { + fn from(variant: Trigmode) -> Self { variant as _ } } -impl TRIGMODE_R { +impl crate::FieldSpec for Trigmode { + type Ux = u8; +} +impl crate::IsEnum for Trigmode {} +#[doc = "Field `TRIGMODE` reader - Channel 0 Trigger Mode"] +pub type TrigmodeR = crate::FieldReader; +impl TrigmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TRIGMODE_A::NONE), - 1 => Some(TRIGMODE_A::SW), - 2 => Some(TRIGMODE_A::SYNCPRS), - 3 => Some(TRIGMODE_A::LESENSE), - 4 => Some(TRIGMODE_A::INTERNALTIMER), - 5 => Some(TRIGMODE_A::ASYNCPRS), + 0 => Some(Trigmode::None), + 1 => Some(Trigmode::Sw), + 2 => Some(Trigmode::Syncprs), + 3 => Some(Trigmode::Lesense), + 4 => Some(Trigmode::Internaltimer), + 5 => Some(Trigmode::Asyncprs), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No Conversion Trigger Source Selected for Channel 0"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == TRIGMODE_A::NONE + *self == Trigmode::None } - #[doc = "Checks if the value of the field is `SW`"] + #[doc = "Channel 0 is triggered by Channel 0 FIFO (CH0F) write"] #[inline(always)] pub fn is_sw(&self) -> bool { - *self == TRIGMODE_A::SW + *self == Trigmode::Sw } - #[doc = "Checks if the value of the field is `SYNCPRS`"] + #[doc = "Channel 0 is triggered by Sync PRS input. PRS Trigger should have the same clock group as VDAC."] #[inline(always)] pub fn is_syncprs(&self) -> bool { - *self == TRIGMODE_A::SYNCPRS + *self == Trigmode::Syncprs } - #[doc = "Checks if the value of the field is `LESENSE`"] + #[doc = "Channel 0 is triggered by LESENSE"] #[inline(always)] pub fn is_lesense(&self) -> bool { - *self == TRIGMODE_A::LESENSE + *self == Trigmode::Lesense } - #[doc = "Checks if the value of the field is `INTERNALTIMER`"] + #[doc = "Channel 0 is triggered by Internal Timer Overflow"] #[inline(always)] pub fn is_internaltimer(&self) -> bool { - *self == TRIGMODE_A::INTERNALTIMER + *self == Trigmode::Internaltimer } - #[doc = "Checks if the value of the field is `ASYNCPRS`"] + #[doc = "Channel 0 is triggered by Async PRS input"] #[inline(always)] pub fn is_asyncprs(&self) -> bool { - *self == TRIGMODE_A::ASYNCPRS + *self == Trigmode::Asyncprs } } #[doc = "Field `TRIGMODE` writer - Channel 0 Trigger Mode"] -pub type TRIGMODE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH0CFG_SPEC, u8, TRIGMODE_A, 3, O>; -impl<'a, const O: u8> TRIGMODE_W<'a, O> { +pub type TrigmodeW<'a, REG> = crate::FieldWriter<'a, REG, 3, Trigmode>; +impl<'a, REG> TrigmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No Conversion Trigger Source Selected for Channel 0"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(TRIGMODE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Trigmode::None) } #[doc = "Channel 0 is triggered by Channel 0 FIFO (CH0F) write"] #[inline(always)] - pub fn sw(self) -> &'a mut W { - self.variant(TRIGMODE_A::SW) + pub fn sw(self) -> &'a mut crate::W { + self.variant(Trigmode::Sw) } #[doc = "Channel 0 is triggered by Sync PRS input. PRS Trigger should have the same clock group as VDAC."] #[inline(always)] - pub fn syncprs(self) -> &'a mut W { - self.variant(TRIGMODE_A::SYNCPRS) + pub fn syncprs(self) -> &'a mut crate::W { + self.variant(Trigmode::Syncprs) } #[doc = "Channel 0 is triggered by LESENSE"] #[inline(always)] - pub fn lesense(self) -> &'a mut W { - self.variant(TRIGMODE_A::LESENSE) + pub fn lesense(self) -> &'a mut crate::W { + self.variant(Trigmode::Lesense) } #[doc = "Channel 0 is triggered by Internal Timer Overflow"] #[inline(always)] - pub fn internaltimer(self) -> &'a mut W { - self.variant(TRIGMODE_A::INTERNALTIMER) + pub fn internaltimer(self) -> &'a mut crate::W { + self.variant(Trigmode::Internaltimer) } #[doc = "Channel 0 is triggered by Async PRS input"] #[inline(always)] - pub fn asyncprs(self) -> &'a mut W { - self.variant(TRIGMODE_A::ASYNCPRS) + pub fn asyncprs(self) -> &'a mut crate::W { + self.variant(Trigmode::Asyncprs) } } -#[doc = "Field `REFRESHSOURCE` reader - Channel 0 Refresh Source"] -pub type REFRESHSOURCE_R = crate::FieldReader; #[doc = "Channel 0 Refresh Source\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REFRESHSOURCE_A { +pub enum Refreshsource { #[doc = "0: No Refresh Source Selected for Channel 0."] - NONE = 0, + None = 0, #[doc = "1: Channel 0 Refresh triggered by Refresh Timer Overflow"] - REFRESHTIMER = 1, + Refreshtimer = 1, #[doc = "2: Channel 0 Refresh triggered by Sync PRS. PRS Trigger should have the same clock group as VDAC."] - SYNCPRS = 2, + Syncprs = 2, #[doc = "3: Channel 0 Refresh triggered by Async PRS"] - ASYNCPRS = 3, + Asyncprs = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REFRESHSOURCE_A) -> Self { + fn from(variant: Refreshsource) -> Self { variant as _ } } -impl REFRESHSOURCE_R { +impl crate::FieldSpec for Refreshsource { + type Ux = u8; +} +impl crate::IsEnum for Refreshsource {} +#[doc = "Field `REFRESHSOURCE` reader - Channel 0 Refresh Source"] +pub type RefreshsourceR = crate::FieldReader; +impl RefreshsourceR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REFRESHSOURCE_A { + pub const fn variant(&self) -> Refreshsource { match self.bits { - 0 => REFRESHSOURCE_A::NONE, - 1 => REFRESHSOURCE_A::REFRESHTIMER, - 2 => REFRESHSOURCE_A::SYNCPRS, - 3 => REFRESHSOURCE_A::ASYNCPRS, + 0 => Refreshsource::None, + 1 => Refreshsource::Refreshtimer, + 2 => Refreshsource::Syncprs, + 3 => Refreshsource::Asyncprs, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No Refresh Source Selected for Channel 0."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == REFRESHSOURCE_A::NONE + *self == Refreshsource::None } - #[doc = "Checks if the value of the field is `REFRESHTIMER`"] + #[doc = "Channel 0 Refresh triggered by Refresh Timer Overflow"] #[inline(always)] pub fn is_refreshtimer(&self) -> bool { - *self == REFRESHSOURCE_A::REFRESHTIMER + *self == Refreshsource::Refreshtimer } - #[doc = "Checks if the value of the field is `SYNCPRS`"] + #[doc = "Channel 0 Refresh triggered by Sync PRS. PRS Trigger should have the same clock group as VDAC."] #[inline(always)] pub fn is_syncprs(&self) -> bool { - *self == REFRESHSOURCE_A::SYNCPRS + *self == Refreshsource::Syncprs } - #[doc = "Checks if the value of the field is `ASYNCPRS`"] + #[doc = "Channel 0 Refresh triggered by Async PRS"] #[inline(always)] pub fn is_asyncprs(&self) -> bool { - *self == REFRESHSOURCE_A::ASYNCPRS + *self == Refreshsource::Asyncprs } } #[doc = "Field `REFRESHSOURCE` writer - Channel 0 Refresh Source"] -pub type REFRESHSOURCE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH0CFG_SPEC, u8, REFRESHSOURCE_A, 2, O>; -impl<'a, const O: u8> REFRESHSOURCE_W<'a, O> { +pub type RefreshsourceW<'a, REG> = crate::FieldWriter<'a, REG, 2, Refreshsource, crate::Safe>; +impl<'a, REG> RefreshsourceW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No Refresh Source Selected for Channel 0."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(REFRESHSOURCE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Refreshsource::None) } #[doc = "Channel 0 Refresh triggered by Refresh Timer Overflow"] #[inline(always)] - pub fn refreshtimer(self) -> &'a mut W { - self.variant(REFRESHSOURCE_A::REFRESHTIMER) + pub fn refreshtimer(self) -> &'a mut crate::W { + self.variant(Refreshsource::Refreshtimer) } #[doc = "Channel 0 Refresh triggered by Sync PRS. PRS Trigger should have the same clock group as VDAC."] #[inline(always)] - pub fn syncprs(self) -> &'a mut W { - self.variant(REFRESHSOURCE_A::SYNCPRS) + pub fn syncprs(self) -> &'a mut crate::W { + self.variant(Refreshsource::Syncprs) } #[doc = "Channel 0 Refresh triggered by Async PRS"] #[inline(always)] - pub fn asyncprs(self) -> &'a mut W { - self.variant(REFRESHSOURCE_A::ASYNCPRS) + pub fn asyncprs(self) -> &'a mut crate::W { + self.variant(Refreshsource::Asyncprs) } } #[doc = "Field `FIFODVL` reader - Channel 0 FIFO Low Watermark"] -pub type FIFODVL_R = crate::FieldReader; +pub type FifodvlR = crate::FieldReader; #[doc = "Field `FIFODVL` writer - Channel 0 FIFO Low Watermark"] -pub type FIFODVL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH0CFG_SPEC, u8, u8, 2, O>; +pub type FifodvlW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `HIGHCAPLOADEN` reader - Channel 0 High Cap Load Mode Enable"] -pub type HIGHCAPLOADEN_R = crate::BitReader; +pub type HighcaploadenR = crate::BitReader; #[doc = "Field `HIGHCAPLOADEN` writer - Channel 0 High Cap Load Mode Enable"] -pub type HIGHCAPLOADEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH0CFG_SPEC, bool, O>; +pub type HighcaploadenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `KEEPWARM` reader - Channel 0 Keepwarm Mode Enable"] -pub type KEEPWARM_R = crate::BitReader; +pub type KeepwarmR = crate::BitReader; #[doc = "Field `KEEPWARM` writer - Channel 0 Keepwarm Mode Enable"] -pub type KEEPWARM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH0CFG_SPEC, bool, O>; +pub type KeepwarmW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Channel 0 Conversion Mode"] #[inline(always)] - pub fn convmode(&self) -> CONVMODE_R { - CONVMODE_R::new((self.bits & 1) != 0) + pub fn convmode(&self) -> ConvmodeR { + ConvmodeR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - Channel 0 Power Mode"] #[inline(always)] - pub fn powermode(&self) -> POWERMODE_R { - POWERMODE_R::new(((self.bits >> 2) & 1) != 0) + pub fn powermode(&self) -> PowermodeR { + PowermodeR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 4:6 - Channel 0 Trigger Mode"] #[inline(always)] - pub fn trigmode(&self) -> TRIGMODE_R { - TRIGMODE_R::new(((self.bits >> 4) & 7) as u8) + pub fn trigmode(&self) -> TrigmodeR { + TrigmodeR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:9 - Channel 0 Refresh Source"] #[inline(always)] - pub fn refreshsource(&self) -> REFRESHSOURCE_R { - REFRESHSOURCE_R::new(((self.bits >> 8) & 3) as u8) + pub fn refreshsource(&self) -> RefreshsourceR { + RefreshsourceR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 11:12 - Channel 0 FIFO Low Watermark"] #[inline(always)] - pub fn fifodvl(&self) -> FIFODVL_R { - FIFODVL_R::new(((self.bits >> 11) & 3) as u8) + pub fn fifodvl(&self) -> FifodvlR { + FifodvlR::new(((self.bits >> 11) & 3) as u8) } #[doc = "Bit 14 - Channel 0 High Cap Load Mode Enable"] #[inline(always)] - pub fn highcaploaden(&self) -> HIGHCAPLOADEN_R { - HIGHCAPLOADEN_R::new(((self.bits >> 14) & 1) != 0) + pub fn highcaploaden(&self) -> HighcaploadenR { + HighcaploadenR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 16 - Channel 0 Keepwarm Mode Enable"] #[inline(always)] - pub fn keepwarm(&self) -> KEEPWARM_R { - KEEPWARM_R::new(((self.bits >> 16) & 1) != 0) + pub fn keepwarm(&self) -> KeepwarmR { + KeepwarmR::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bit 0 - Channel 0 Conversion Mode"] #[inline(always)] #[must_use] - pub fn convmode(&mut self) -> CONVMODE_W<0> { - CONVMODE_W::new(self) + pub fn convmode(&mut self) -> ConvmodeW { + ConvmodeW::new(self, 0) } #[doc = "Bit 2 - Channel 0 Power Mode"] #[inline(always)] #[must_use] - pub fn powermode(&mut self) -> POWERMODE_W<2> { - POWERMODE_W::new(self) + pub fn powermode(&mut self) -> PowermodeW { + PowermodeW::new(self, 2) } #[doc = "Bits 4:6 - Channel 0 Trigger Mode"] #[inline(always)] #[must_use] - pub fn trigmode(&mut self) -> TRIGMODE_W<4> { - TRIGMODE_W::new(self) + pub fn trigmode(&mut self) -> TrigmodeW { + TrigmodeW::new(self, 4) } #[doc = "Bits 8:9 - Channel 0 Refresh Source"] #[inline(always)] #[must_use] - pub fn refreshsource(&mut self) -> REFRESHSOURCE_W<8> { - REFRESHSOURCE_W::new(self) + pub fn refreshsource(&mut self) -> RefreshsourceW { + RefreshsourceW::new(self, 8) } #[doc = "Bits 11:12 - Channel 0 FIFO Low Watermark"] #[inline(always)] #[must_use] - pub fn fifodvl(&mut self) -> FIFODVL_W<11> { - FIFODVL_W::new(self) + pub fn fifodvl(&mut self) -> FifodvlW { + FifodvlW::new(self, 11) } #[doc = "Bit 14 - Channel 0 High Cap Load Mode Enable"] #[inline(always)] #[must_use] - pub fn highcaploaden(&mut self) -> HIGHCAPLOADEN_W<14> { - HIGHCAPLOADEN_W::new(self) + pub fn highcaploaden(&mut self) -> HighcaploadenW { + HighcaploadenW::new(self, 14) } #[doc = "Bit 16 - Channel 0 Keepwarm Mode Enable"] #[inline(always)] #[must_use] - pub fn keepwarm(&mut self) -> KEEPWARM_W<16> { - KEEPWARM_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn keepwarm(&mut self) -> KeepwarmW { + KeepwarmW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0cfg](index.html) module"] -pub struct CH0CFG_SPEC; -impl crate::RegisterSpec for CH0CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch0cfgSpec; +impl crate::RegisterSpec for Ch0cfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch0cfg::R](R) reader structure"] -impl crate::Readable for CH0CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch0cfg::W](W) writer structure"] -impl crate::Writable for CH0CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch0cfg::R`](R) reader structure"] +impl crate::Readable for Ch0cfgSpec {} +#[doc = "`write(|w| ..)` method takes [`ch0cfg::W`](W) writer structure"] +impl crate::Writable for Ch0cfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH0CFG to value 0x10"] -impl crate::Resettable for CH0CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x10; +impl crate::Resettable for Ch0cfgSpec { + const RESET_VALUE: u32 = 0x10; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/ch0f.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/ch0f.rs index 7cb921a..8387dd9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/ch0f.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/ch0f.rs @@ -1,52 +1,27 @@ #[doc = "Register `CH0F` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DATA` writer - Channel 0 Data"] -pub type DATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH0F_SPEC, u16, u16, 12, O>; +pub type DataW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl W { #[doc = "Bits 0:11 - Channel 0 Data"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W<0> { - DATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn data(&mut self) -> DataW { + DataW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0f](index.html) module"] -pub struct CH0F_SPEC; -impl crate::RegisterSpec for CH0F_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0f::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch0fSpec; +impl crate::RegisterSpec for Ch0fSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [ch0f::W](W) writer structure"] -impl crate::Writable for CH0F_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`ch0f::W`](W) writer structure"] +impl crate::Writable for Ch0fSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH0F to value 0"] -impl crate::Resettable for CH0F_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch0fSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/ch1cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/ch1cfg.rs index 34c7bc4..1bd4cc3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/ch1cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/ch1cfg.rs @@ -1,425 +1,405 @@ #[doc = "Register `CH1CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH1CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CONVMODE` reader - Channel 1 Conversion Mode"] -pub type CONVMODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Channel 1 Conversion Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CONVMODE_A { +pub enum Convmode { #[doc = "0: DAC channel 1 is set in continuous mode"] - CONTINUOUS = 0, + Continuous = 0, #[doc = "1: DAC channel 1 is set in sample/shut off mode"] - SAMPLEOFF = 1, + Sampleoff = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CONVMODE_A) -> Self { + fn from(variant: Convmode) -> Self { variant as u8 != 0 } } -impl CONVMODE_R { +#[doc = "Field `CONVMODE` reader - Channel 1 Conversion Mode"] +pub type ConvmodeR = crate::BitReader; +impl ConvmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CONVMODE_A { + pub const fn variant(&self) -> Convmode { match self.bits { - false => CONVMODE_A::CONTINUOUS, - true => CONVMODE_A::SAMPLEOFF, + false => Convmode::Continuous, + true => Convmode::Sampleoff, } } - #[doc = "Checks if the value of the field is `CONTINUOUS`"] + #[doc = "DAC channel 1 is set in continuous mode"] #[inline(always)] pub fn is_continuous(&self) -> bool { - *self == CONVMODE_A::CONTINUOUS + *self == Convmode::Continuous } - #[doc = "Checks if the value of the field is `SAMPLEOFF`"] + #[doc = "DAC channel 1 is set in sample/shut off mode"] #[inline(always)] pub fn is_sampleoff(&self) -> bool { - *self == CONVMODE_A::SAMPLEOFF + *self == Convmode::Sampleoff } } #[doc = "Field `CONVMODE` writer - Channel 1 Conversion Mode"] -pub type CONVMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH1CFG_SPEC, CONVMODE_A, O>; -impl<'a, const O: u8> CONVMODE_W<'a, O> { +pub type ConvmodeW<'a, REG> = crate::BitWriter<'a, REG, Convmode>; +impl<'a, REG> ConvmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "DAC channel 1 is set in continuous mode"] #[inline(always)] - pub fn continuous(self) -> &'a mut W { - self.variant(CONVMODE_A::CONTINUOUS) + pub fn continuous(self) -> &'a mut crate::W { + self.variant(Convmode::Continuous) } #[doc = "DAC channel 1 is set in sample/shut off mode"] #[inline(always)] - pub fn sampleoff(self) -> &'a mut W { - self.variant(CONVMODE_A::SAMPLEOFF) + pub fn sampleoff(self) -> &'a mut crate::W { + self.variant(Convmode::Sampleoff) } } -#[doc = "Field `POWERMODE` reader - Channel 1 Power Mode"] -pub type POWERMODE_R = crate::BitReader; #[doc = "Channel 1 Power Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum POWERMODE_A { +pub enum Powermode { #[doc = "0: Default is High Power Mode"] - HIGHPOWER = 0, + Highpower = 0, #[doc = "1: Set this bit for Low Power Mode"] - LOWPOWER = 1, + Lowpower = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: POWERMODE_A) -> Self { + fn from(variant: Powermode) -> Self { variant as u8 != 0 } } -impl POWERMODE_R { +#[doc = "Field `POWERMODE` reader - Channel 1 Power Mode"] +pub type PowermodeR = crate::BitReader; +impl PowermodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> POWERMODE_A { + pub const fn variant(&self) -> Powermode { match self.bits { - false => POWERMODE_A::HIGHPOWER, - true => POWERMODE_A::LOWPOWER, + false => Powermode::Highpower, + true => Powermode::Lowpower, } } - #[doc = "Checks if the value of the field is `HIGHPOWER`"] + #[doc = "Default is High Power Mode"] #[inline(always)] pub fn is_highpower(&self) -> bool { - *self == POWERMODE_A::HIGHPOWER + *self == Powermode::Highpower } - #[doc = "Checks if the value of the field is `LOWPOWER`"] + #[doc = "Set this bit for Low Power Mode"] #[inline(always)] pub fn is_lowpower(&self) -> bool { - *self == POWERMODE_A::LOWPOWER + *self == Powermode::Lowpower } } #[doc = "Field `POWERMODE` writer - Channel 1 Power Mode"] -pub type POWERMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH1CFG_SPEC, POWERMODE_A, O>; -impl<'a, const O: u8> POWERMODE_W<'a, O> { +pub type PowermodeW<'a, REG> = crate::BitWriter<'a, REG, Powermode>; +impl<'a, REG> PowermodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Default is High Power Mode"] #[inline(always)] - pub fn highpower(self) -> &'a mut W { - self.variant(POWERMODE_A::HIGHPOWER) + pub fn highpower(self) -> &'a mut crate::W { + self.variant(Powermode::Highpower) } #[doc = "Set this bit for Low Power Mode"] #[inline(always)] - pub fn lowpower(self) -> &'a mut W { - self.variant(POWERMODE_A::LOWPOWER) + pub fn lowpower(self) -> &'a mut crate::W { + self.variant(Powermode::Lowpower) } } -#[doc = "Field `TRIGMODE` reader - Channel 1 Trigger Mode"] -pub type TRIGMODE_R = crate::FieldReader; #[doc = "Channel 1 Trigger Mode\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TRIGMODE_A { +pub enum Trigmode { #[doc = "0: No Conversion Trigger Source Selected for Channel 1"] - NONE = 0, + None = 0, #[doc = "1: Channel 1 is triggered by Channel 1 FIFO (CH1F) write"] - SW = 1, + Sw = 1, #[doc = "2: Channel 1 is triggered by Sync PRS input.PRS Trigger should have the same clock group as VDAC."] - SYNCPRS = 2, + Syncprs = 2, #[doc = "4: Channel 1 is triggered by Internal Timer Overflow"] - INTERNALTIMER = 4, + Internaltimer = 4, #[doc = "5: Channel 1 is triggered by Async PRS input"] - ASYNCPRS = 5, + Asyncprs = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TRIGMODE_A) -> Self { + fn from(variant: Trigmode) -> Self { variant as _ } } -impl TRIGMODE_R { +impl crate::FieldSpec for Trigmode { + type Ux = u8; +} +impl crate::IsEnum for Trigmode {} +#[doc = "Field `TRIGMODE` reader - Channel 1 Trigger Mode"] +pub type TrigmodeR = crate::FieldReader; +impl TrigmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TRIGMODE_A::NONE), - 1 => Some(TRIGMODE_A::SW), - 2 => Some(TRIGMODE_A::SYNCPRS), - 4 => Some(TRIGMODE_A::INTERNALTIMER), - 5 => Some(TRIGMODE_A::ASYNCPRS), + 0 => Some(Trigmode::None), + 1 => Some(Trigmode::Sw), + 2 => Some(Trigmode::Syncprs), + 4 => Some(Trigmode::Internaltimer), + 5 => Some(Trigmode::Asyncprs), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No Conversion Trigger Source Selected for Channel 1"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == TRIGMODE_A::NONE + *self == Trigmode::None } - #[doc = "Checks if the value of the field is `SW`"] + #[doc = "Channel 1 is triggered by Channel 1 FIFO (CH1F) write"] #[inline(always)] pub fn is_sw(&self) -> bool { - *self == TRIGMODE_A::SW + *self == Trigmode::Sw } - #[doc = "Checks if the value of the field is `SYNCPRS`"] + #[doc = "Channel 1 is triggered by Sync PRS input.PRS Trigger should have the same clock group as VDAC."] #[inline(always)] pub fn is_syncprs(&self) -> bool { - *self == TRIGMODE_A::SYNCPRS + *self == Trigmode::Syncprs } - #[doc = "Checks if the value of the field is `INTERNALTIMER`"] + #[doc = "Channel 1 is triggered by Internal Timer Overflow"] #[inline(always)] pub fn is_internaltimer(&self) -> bool { - *self == TRIGMODE_A::INTERNALTIMER + *self == Trigmode::Internaltimer } - #[doc = "Checks if the value of the field is `ASYNCPRS`"] + #[doc = "Channel 1 is triggered by Async PRS input"] #[inline(always)] pub fn is_asyncprs(&self) -> bool { - *self == TRIGMODE_A::ASYNCPRS + *self == Trigmode::Asyncprs } } #[doc = "Field `TRIGMODE` writer - Channel 1 Trigger Mode"] -pub type TRIGMODE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH1CFG_SPEC, u8, TRIGMODE_A, 3, O>; -impl<'a, const O: u8> TRIGMODE_W<'a, O> { +pub type TrigmodeW<'a, REG> = crate::FieldWriter<'a, REG, 3, Trigmode>; +impl<'a, REG> TrigmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No Conversion Trigger Source Selected for Channel 1"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(TRIGMODE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Trigmode::None) } #[doc = "Channel 1 is triggered by Channel 1 FIFO (CH1F) write"] #[inline(always)] - pub fn sw(self) -> &'a mut W { - self.variant(TRIGMODE_A::SW) + pub fn sw(self) -> &'a mut crate::W { + self.variant(Trigmode::Sw) } #[doc = "Channel 1 is triggered by Sync PRS input.PRS Trigger should have the same clock group as VDAC."] #[inline(always)] - pub fn syncprs(self) -> &'a mut W { - self.variant(TRIGMODE_A::SYNCPRS) + pub fn syncprs(self) -> &'a mut crate::W { + self.variant(Trigmode::Syncprs) } #[doc = "Channel 1 is triggered by Internal Timer Overflow"] #[inline(always)] - pub fn internaltimer(self) -> &'a mut W { - self.variant(TRIGMODE_A::INTERNALTIMER) + pub fn internaltimer(self) -> &'a mut crate::W { + self.variant(Trigmode::Internaltimer) } #[doc = "Channel 1 is triggered by Async PRS input"] #[inline(always)] - pub fn asyncprs(self) -> &'a mut W { - self.variant(TRIGMODE_A::ASYNCPRS) + pub fn asyncprs(self) -> &'a mut crate::W { + self.variant(Trigmode::Asyncprs) } } -#[doc = "Field `REFRESHSOURCE` reader - Channel 1 Refresh Source"] -pub type REFRESHSOURCE_R = crate::FieldReader; #[doc = "Channel 1 Refresh Source\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REFRESHSOURCE_A { +pub enum Refreshsource { #[doc = "0: No Refresh Source Selected"] - NONE = 0, + None = 0, #[doc = "1: CH1 Refresh Triggered by Refresh Timer Overflow"] - REFRESHTIMER = 1, + Refreshtimer = 1, #[doc = "2: CH1 Refresh Triggered by Sync PRS. PRS Trigger should have the same clock group as VDAC."] - SYNCPRS = 2, + Syncprs = 2, #[doc = "3: CH1 Refresh Triggered by Async PRS"] - ASYNCPRS = 3, + Asyncprs = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REFRESHSOURCE_A) -> Self { + fn from(variant: Refreshsource) -> Self { variant as _ } } -impl REFRESHSOURCE_R { +impl crate::FieldSpec for Refreshsource { + type Ux = u8; +} +impl crate::IsEnum for Refreshsource {} +#[doc = "Field `REFRESHSOURCE` reader - Channel 1 Refresh Source"] +pub type RefreshsourceR = crate::FieldReader; +impl RefreshsourceR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REFRESHSOURCE_A { + pub const fn variant(&self) -> Refreshsource { match self.bits { - 0 => REFRESHSOURCE_A::NONE, - 1 => REFRESHSOURCE_A::REFRESHTIMER, - 2 => REFRESHSOURCE_A::SYNCPRS, - 3 => REFRESHSOURCE_A::ASYNCPRS, + 0 => Refreshsource::None, + 1 => Refreshsource::Refreshtimer, + 2 => Refreshsource::Syncprs, + 3 => Refreshsource::Asyncprs, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No Refresh Source Selected"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == REFRESHSOURCE_A::NONE + *self == Refreshsource::None } - #[doc = "Checks if the value of the field is `REFRESHTIMER`"] + #[doc = "CH1 Refresh Triggered by Refresh Timer Overflow"] #[inline(always)] pub fn is_refreshtimer(&self) -> bool { - *self == REFRESHSOURCE_A::REFRESHTIMER + *self == Refreshsource::Refreshtimer } - #[doc = "Checks if the value of the field is `SYNCPRS`"] + #[doc = "CH1 Refresh Triggered by Sync PRS. PRS Trigger should have the same clock group as VDAC."] #[inline(always)] pub fn is_syncprs(&self) -> bool { - *self == REFRESHSOURCE_A::SYNCPRS + *self == Refreshsource::Syncprs } - #[doc = "Checks if the value of the field is `ASYNCPRS`"] + #[doc = "CH1 Refresh Triggered by Async PRS"] #[inline(always)] pub fn is_asyncprs(&self) -> bool { - *self == REFRESHSOURCE_A::ASYNCPRS + *self == Refreshsource::Asyncprs } } #[doc = "Field `REFRESHSOURCE` writer - Channel 1 Refresh Source"] -pub type REFRESHSOURCE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH1CFG_SPEC, u8, REFRESHSOURCE_A, 2, O>; -impl<'a, const O: u8> REFRESHSOURCE_W<'a, O> { +pub type RefreshsourceW<'a, REG> = crate::FieldWriter<'a, REG, 2, Refreshsource, crate::Safe>; +impl<'a, REG> RefreshsourceW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No Refresh Source Selected"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(REFRESHSOURCE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Refreshsource::None) } #[doc = "CH1 Refresh Triggered by Refresh Timer Overflow"] #[inline(always)] - pub fn refreshtimer(self) -> &'a mut W { - self.variant(REFRESHSOURCE_A::REFRESHTIMER) + pub fn refreshtimer(self) -> &'a mut crate::W { + self.variant(Refreshsource::Refreshtimer) } #[doc = "CH1 Refresh Triggered by Sync PRS. PRS Trigger should have the same clock group as VDAC."] #[inline(always)] - pub fn syncprs(self) -> &'a mut W { - self.variant(REFRESHSOURCE_A::SYNCPRS) + pub fn syncprs(self) -> &'a mut crate::W { + self.variant(Refreshsource::Syncprs) } #[doc = "CH1 Refresh Triggered by Async PRS"] #[inline(always)] - pub fn asyncprs(self) -> &'a mut W { - self.variant(REFRESHSOURCE_A::ASYNCPRS) + pub fn asyncprs(self) -> &'a mut crate::W { + self.variant(Refreshsource::Asyncprs) } } #[doc = "Field `FIFODVL` reader - Channel 1 FIFO Low Watermark"] -pub type FIFODVL_R = crate::FieldReader; +pub type FifodvlR = crate::FieldReader; #[doc = "Field `FIFODVL` writer - Channel 1 FIFO Low Watermark"] -pub type FIFODVL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH1CFG_SPEC, u8, u8, 2, O>; +pub type FifodvlW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `HIGHCAPLOADEN` reader - Channel 1 High Cap Load Mode Enable"] -pub type HIGHCAPLOADEN_R = crate::BitReader; +pub type HighcaploadenR = crate::BitReader; #[doc = "Field `HIGHCAPLOADEN` writer - Channel 1 High Cap Load Mode Enable"] -pub type HIGHCAPLOADEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH1CFG_SPEC, bool, O>; +pub type HighcaploadenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `KEEPWARM` reader - Channel 1 Keepwarm Mode Enable"] -pub type KEEPWARM_R = crate::BitReader; +pub type KeepwarmR = crate::BitReader; #[doc = "Field `KEEPWARM` writer - Channel 1 Keepwarm Mode Enable"] -pub type KEEPWARM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH1CFG_SPEC, bool, O>; +pub type KeepwarmW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Channel 1 Conversion Mode"] #[inline(always)] - pub fn convmode(&self) -> CONVMODE_R { - CONVMODE_R::new((self.bits & 1) != 0) + pub fn convmode(&self) -> ConvmodeR { + ConvmodeR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - Channel 1 Power Mode"] #[inline(always)] - pub fn powermode(&self) -> POWERMODE_R { - POWERMODE_R::new(((self.bits >> 2) & 1) != 0) + pub fn powermode(&self) -> PowermodeR { + PowermodeR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 4:6 - Channel 1 Trigger Mode"] #[inline(always)] - pub fn trigmode(&self) -> TRIGMODE_R { - TRIGMODE_R::new(((self.bits >> 4) & 7) as u8) + pub fn trigmode(&self) -> TrigmodeR { + TrigmodeR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:9 - Channel 1 Refresh Source"] #[inline(always)] - pub fn refreshsource(&self) -> REFRESHSOURCE_R { - REFRESHSOURCE_R::new(((self.bits >> 8) & 3) as u8) + pub fn refreshsource(&self) -> RefreshsourceR { + RefreshsourceR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 11:12 - Channel 1 FIFO Low Watermark"] #[inline(always)] - pub fn fifodvl(&self) -> FIFODVL_R { - FIFODVL_R::new(((self.bits >> 11) & 3) as u8) + pub fn fifodvl(&self) -> FifodvlR { + FifodvlR::new(((self.bits >> 11) & 3) as u8) } #[doc = "Bit 14 - Channel 1 High Cap Load Mode Enable"] #[inline(always)] - pub fn highcaploaden(&self) -> HIGHCAPLOADEN_R { - HIGHCAPLOADEN_R::new(((self.bits >> 14) & 1) != 0) + pub fn highcaploaden(&self) -> HighcaploadenR { + HighcaploadenR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 16 - Channel 1 Keepwarm Mode Enable"] #[inline(always)] - pub fn keepwarm(&self) -> KEEPWARM_R { - KEEPWARM_R::new(((self.bits >> 16) & 1) != 0) + pub fn keepwarm(&self) -> KeepwarmR { + KeepwarmR::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bit 0 - Channel 1 Conversion Mode"] #[inline(always)] #[must_use] - pub fn convmode(&mut self) -> CONVMODE_W<0> { - CONVMODE_W::new(self) + pub fn convmode(&mut self) -> ConvmodeW { + ConvmodeW::new(self, 0) } #[doc = "Bit 2 - Channel 1 Power Mode"] #[inline(always)] #[must_use] - pub fn powermode(&mut self) -> POWERMODE_W<2> { - POWERMODE_W::new(self) + pub fn powermode(&mut self) -> PowermodeW { + PowermodeW::new(self, 2) } #[doc = "Bits 4:6 - Channel 1 Trigger Mode"] #[inline(always)] #[must_use] - pub fn trigmode(&mut self) -> TRIGMODE_W<4> { - TRIGMODE_W::new(self) + pub fn trigmode(&mut self) -> TrigmodeW { + TrigmodeW::new(self, 4) } #[doc = "Bits 8:9 - Channel 1 Refresh Source"] #[inline(always)] #[must_use] - pub fn refreshsource(&mut self) -> REFRESHSOURCE_W<8> { - REFRESHSOURCE_W::new(self) + pub fn refreshsource(&mut self) -> RefreshsourceW { + RefreshsourceW::new(self, 8) } #[doc = "Bits 11:12 - Channel 1 FIFO Low Watermark"] #[inline(always)] #[must_use] - pub fn fifodvl(&mut self) -> FIFODVL_W<11> { - FIFODVL_W::new(self) + pub fn fifodvl(&mut self) -> FifodvlW { + FifodvlW::new(self, 11) } #[doc = "Bit 14 - Channel 1 High Cap Load Mode Enable"] #[inline(always)] #[must_use] - pub fn highcaploaden(&mut self) -> HIGHCAPLOADEN_W<14> { - HIGHCAPLOADEN_W::new(self) + pub fn highcaploaden(&mut self) -> HighcaploadenW { + HighcaploadenW::new(self, 14) } #[doc = "Bit 16 - Channel 1 Keepwarm Mode Enable"] #[inline(always)] #[must_use] - pub fn keepwarm(&mut self) -> KEEPWARM_W<16> { - KEEPWARM_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn keepwarm(&mut self) -> KeepwarmW { + KeepwarmW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch1cfg](index.html) module"] -pub struct CH1CFG_SPEC; -impl crate::RegisterSpec for CH1CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch1cfgSpec; +impl crate::RegisterSpec for Ch1cfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch1cfg::R](R) reader structure"] -impl crate::Readable for CH1CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch1cfg::W](W) writer structure"] -impl crate::Writable for CH1CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch1cfg::R`](R) reader structure"] +impl crate::Readable for Ch1cfgSpec {} +#[doc = "`write(|w| ..)` method takes [`ch1cfg::W`](W) writer structure"] +impl crate::Writable for Ch1cfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH1CFG to value 0x10"] -impl crate::Resettable for CH1CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x10; +impl crate::Resettable for Ch1cfgSpec { + const RESET_VALUE: u32 = 0x10; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/ch1f.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/ch1f.rs index 51f1de0..1d8ce5d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/ch1f.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/ch1f.rs @@ -1,52 +1,27 @@ #[doc = "Register `CH1F` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DATA` writer - Channel 1 Data"] -pub type DATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH1F_SPEC, u16, u16, 12, O>; +pub type DataW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl W { #[doc = "Bits 0:11 - Channel 1 Data"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W<0> { - DATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn data(&mut self) -> DataW { + DataW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch1f](index.html) module"] -pub struct CH1F_SPEC; -impl crate::RegisterSpec for CH1F_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1f::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch1fSpec; +impl crate::RegisterSpec for Ch1fSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [ch1f::W](W) writer structure"] -impl crate::Writable for CH1F_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`ch1f::W`](W) writer structure"] +impl crate::Writable for Ch1fSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH1F to value 0"] -impl crate::Resettable for CH1F_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch1fSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/cmd.rs index e3f745e..4093cb3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/cmd.rs @@ -1,108 +1,83 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CH0EN` writer - DAC Channel 0 Enable"] -pub type CH0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type Ch0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH0DIS` writer - DAC Channel 0 Disable"] -pub type CH0DIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type Ch0disW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1EN` writer - DAC Channel 1 Enable"] -pub type CH1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type Ch1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1DIS` writer - DAC Channel 1 Disable"] -pub type CH1DIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type Ch1disW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH0FIFOFLUSH` writer - CH0 WFIFO Flush"] -pub type CH0FIFOFLUSH_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type Ch0fifoflushW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1FIFOFLUSH` writer - CH1 WFIFO Flush"] -pub type CH1FIFOFLUSH_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type Ch1fifoflushW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SINEMODESTART` writer - Start Sine Wave Generation"] -pub type SINEMODESTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type SinemodestartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SINEMODESTOP` writer - Stop Sine Wave Generation"] -pub type SINEMODESTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type SinemodestopW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - DAC Channel 0 Enable"] #[inline(always)] #[must_use] - pub fn ch0en(&mut self) -> CH0EN_W<0> { - CH0EN_W::new(self) + pub fn ch0en(&mut self) -> Ch0enW { + Ch0enW::new(self, 0) } #[doc = "Bit 1 - DAC Channel 0 Disable"] #[inline(always)] #[must_use] - pub fn ch0dis(&mut self) -> CH0DIS_W<1> { - CH0DIS_W::new(self) + pub fn ch0dis(&mut self) -> Ch0disW { + Ch0disW::new(self, 1) } #[doc = "Bit 4 - DAC Channel 1 Enable"] #[inline(always)] #[must_use] - pub fn ch1en(&mut self) -> CH1EN_W<4> { - CH1EN_W::new(self) + pub fn ch1en(&mut self) -> Ch1enW { + Ch1enW::new(self, 4) } #[doc = "Bit 5 - DAC Channel 1 Disable"] #[inline(always)] #[must_use] - pub fn ch1dis(&mut self) -> CH1DIS_W<5> { - CH1DIS_W::new(self) + pub fn ch1dis(&mut self) -> Ch1disW { + Ch1disW::new(self, 5) } #[doc = "Bit 8 - CH0 WFIFO Flush"] #[inline(always)] #[must_use] - pub fn ch0fifoflush(&mut self) -> CH0FIFOFLUSH_W<8> { - CH0FIFOFLUSH_W::new(self) + pub fn ch0fifoflush(&mut self) -> Ch0fifoflushW { + Ch0fifoflushW::new(self, 8) } #[doc = "Bit 9 - CH1 WFIFO Flush"] #[inline(always)] #[must_use] - pub fn ch1fifoflush(&mut self) -> CH1FIFOFLUSH_W<9> { - CH1FIFOFLUSH_W::new(self) + pub fn ch1fifoflush(&mut self) -> Ch1fifoflushW { + Ch1fifoflushW::new(self, 9) } #[doc = "Bit 10 - Start Sine Wave Generation"] #[inline(always)] #[must_use] - pub fn sinemodestart(&mut self) -> SINEMODESTART_W<10> { - SINEMODESTART_W::new(self) + pub fn sinemodestart(&mut self) -> SinemodestartW { + SinemodestartW::new(self, 10) } #[doc = "Bit 11 - Stop Sine Wave Generation"] #[inline(always)] #[must_use] - pub fn sinemodestop(&mut self) -> SINEMODESTOP_W<11> { - SINEMODESTOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sinemodestop(&mut self) -> SinemodestopW { + SinemodestopW::new(self, 11) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/en.rs index 91c685f..d148a35 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/en.rs @@ -1,133 +1,96 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EN` reader - VDAC Module Enable"] -pub type EN_R = crate::BitReader; +pub type W = crate::W; #[doc = "VDAC Module Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EN_A { +pub enum En { #[doc = "0: Disable"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enable"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EN_A) -> Self { + fn from(variant: En) -> Self { variant as u8 != 0 } } -impl EN_R { +#[doc = "Field `EN` reader - VDAC Module Enable"] +pub type EnR = crate::BitReader; +impl EnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EN_A { + pub const fn variant(&self) -> En { match self.bits { - false => EN_A::DISABLE, - true => EN_A::ENABLE, + false => En::Disable, + true => En::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EN_A::DISABLE + *self == En::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enable"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EN_A::ENABLE + *self == En::Enable } } #[doc = "Field `EN` writer - VDAC Module Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, EN_A, O>; -impl<'a, const O: u8> EN_W<'a, O> { +pub type EnW<'a, REG> = crate::BitWriter<'a, REG, En>; +impl<'a, REG> EnW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(En::Disable) } #[doc = "Enable"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(En::Enable) } } #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - VDAC Module Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - VDAC Module Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/ien.rs index 3f313c3..aba21d4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/ien.rs @@ -1,215 +1,175 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CH0CD` reader - CH0 Conversion Done Interrupt Flag"] -pub type CH0CD_R = crate::BitReader; +pub type Ch0cdR = crate::BitReader; #[doc = "Field `CH0CD` writer - CH0 Conversion Done Interrupt Flag"] -pub type CH0CD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Ch0cdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1CD` reader - CH1 Conversion Done Interrupt Flag"] -pub type CH1CD_R = crate::BitReader; +pub type Ch1cdR = crate::BitReader; #[doc = "Field `CH1CD` writer - CH1 Conversion Done Interrupt Flag"] -pub type CH1CD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Ch1cdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH0OF` reader - CH0 Data Overflow Interrupt Flag"] -pub type CH0OF_R = crate::BitReader; +pub type Ch0ofR = crate::BitReader; #[doc = "Field `CH0OF` writer - CH0 Data Overflow Interrupt Flag"] -pub type CH0OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Ch0ofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1OF` reader - CH1 Data Overflow Interrupt Flag"] -pub type CH1OF_R = crate::BitReader; +pub type Ch1ofR = crate::BitReader; #[doc = "Field `CH1OF` writer - CH1 Data Overflow Interrupt Flag"] -pub type CH1OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Ch1ofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH0UF` reader - CH0 Data Underflow Interrupt Flag"] -pub type CH0UF_R = crate::BitReader; +pub type Ch0ufR = crate::BitReader; #[doc = "Field `CH0UF` writer - CH0 Data Underflow Interrupt Flag"] -pub type CH0UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Ch0ufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1UF` reader - CH1 Data Underflow Interrupt Flag"] -pub type CH1UF_R = crate::BitReader; +pub type Ch1ufR = crate::BitReader; #[doc = "Field `CH1UF` writer - CH1 Data Underflow Interrupt Flag"] -pub type CH1UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Ch1ufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ABUSALLOCERR` reader - ABUS Allocation Error Interrupt Flag"] -pub type ABUSALLOCERR_R = crate::BitReader; +pub type AbusallocerrR = crate::BitReader; #[doc = "Field `ABUSALLOCERR` writer - ABUS Allocation Error Interrupt Flag"] -pub type ABUSALLOCERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AbusallocerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH0DVL` reader - CH0 Data Valid Level Interrupt Flag"] -pub type CH0DVL_R = crate::BitReader; +pub type Ch0dvlR = crate::BitReader; #[doc = "Field `CH0DVL` writer - CH0 Data Valid Level Interrupt Flag"] -pub type CH0DVL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Ch0dvlW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1DVL` reader - CH1 Data Valid Level Interrupt Flag"] -pub type CH1DVL_R = crate::BitReader; +pub type Ch1dvlR = crate::BitReader; #[doc = "Field `CH1DVL` writer - CH1 Data Valid Level Interrupt Flag"] -pub type CH1DVL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Ch1dvlW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ABUSINPUTCONFLICT` reader - ABUS Input Conflict Interrupt Flag"] -pub type ABUSINPUTCONFLICT_R = crate::BitReader; +pub type AbusinputconflictR = crate::BitReader; #[doc = "Field `ABUSINPUTCONFLICT` writer - ABUS Input Conflict Interrupt Flag"] -pub type ABUSINPUTCONFLICT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AbusinputconflictW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CH0 Conversion Done Interrupt Flag"] #[inline(always)] - pub fn ch0cd(&self) -> CH0CD_R { - CH0CD_R::new((self.bits & 1) != 0) + pub fn ch0cd(&self) -> Ch0cdR { + Ch0cdR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CH1 Conversion Done Interrupt Flag"] #[inline(always)] - pub fn ch1cd(&self) -> CH1CD_R { - CH1CD_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1cd(&self) -> Ch1cdR { + Ch1cdR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 4 - CH0 Data Overflow Interrupt Flag"] #[inline(always)] - pub fn ch0of(&self) -> CH0OF_R { - CH0OF_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch0of(&self) -> Ch0ofR { + Ch0ofR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CH1 Data Overflow Interrupt Flag"] #[inline(always)] - pub fn ch1of(&self) -> CH1OF_R { - CH1OF_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch1of(&self) -> Ch1ofR { + Ch1ofR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 8 - CH0 Data Underflow Interrupt Flag"] #[inline(always)] - pub fn ch0uf(&self) -> CH0UF_R { - CH0UF_R::new(((self.bits >> 8) & 1) != 0) + pub fn ch0uf(&self) -> Ch0ufR { + Ch0ufR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - CH1 Data Underflow Interrupt Flag"] #[inline(always)] - pub fn ch1uf(&self) -> CH1UF_R { - CH1UF_R::new(((self.bits >> 9) & 1) != 0) + pub fn ch1uf(&self) -> Ch1ufR { + Ch1ufR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 18 - ABUS Allocation Error Interrupt Flag"] #[inline(always)] - pub fn abusallocerr(&self) -> ABUSALLOCERR_R { - ABUSALLOCERR_R::new(((self.bits >> 18) & 1) != 0) + pub fn abusallocerr(&self) -> AbusallocerrR { + AbusallocerrR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - CH0 Data Valid Level Interrupt Flag"] #[inline(always)] - pub fn ch0dvl(&self) -> CH0DVL_R { - CH0DVL_R::new(((self.bits >> 20) & 1) != 0) + pub fn ch0dvl(&self) -> Ch0dvlR { + Ch0dvlR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - CH1 Data Valid Level Interrupt Flag"] #[inline(always)] - pub fn ch1dvl(&self) -> CH1DVL_R { - CH1DVL_R::new(((self.bits >> 21) & 1) != 0) + pub fn ch1dvl(&self) -> Ch1dvlR { + Ch1dvlR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 26 - ABUS Input Conflict Interrupt Flag"] #[inline(always)] - pub fn abusinputconflict(&self) -> ABUSINPUTCONFLICT_R { - ABUSINPUTCONFLICT_R::new(((self.bits >> 26) & 1) != 0) + pub fn abusinputconflict(&self) -> AbusinputconflictR { + AbusinputconflictR::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bit 0 - CH0 Conversion Done Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch0cd(&mut self) -> CH0CD_W<0> { - CH0CD_W::new(self) + pub fn ch0cd(&mut self) -> Ch0cdW { + Ch0cdW::new(self, 0) } #[doc = "Bit 1 - CH1 Conversion Done Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch1cd(&mut self) -> CH1CD_W<1> { - CH1CD_W::new(self) + pub fn ch1cd(&mut self) -> Ch1cdW { + Ch1cdW::new(self, 1) } #[doc = "Bit 4 - CH0 Data Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch0of(&mut self) -> CH0OF_W<4> { - CH0OF_W::new(self) + pub fn ch0of(&mut self) -> Ch0ofW { + Ch0ofW::new(self, 4) } #[doc = "Bit 5 - CH1 Data Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch1of(&mut self) -> CH1OF_W<5> { - CH1OF_W::new(self) + pub fn ch1of(&mut self) -> Ch1ofW { + Ch1ofW::new(self, 5) } #[doc = "Bit 8 - CH0 Data Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch0uf(&mut self) -> CH0UF_W<8> { - CH0UF_W::new(self) + pub fn ch0uf(&mut self) -> Ch0ufW { + Ch0ufW::new(self, 8) } #[doc = "Bit 9 - CH1 Data Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch1uf(&mut self) -> CH1UF_W<9> { - CH1UF_W::new(self) + pub fn ch1uf(&mut self) -> Ch1ufW { + Ch1ufW::new(self, 9) } #[doc = "Bit 18 - ABUS Allocation Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn abusallocerr(&mut self) -> ABUSALLOCERR_W<18> { - ABUSALLOCERR_W::new(self) + pub fn abusallocerr(&mut self) -> AbusallocerrW { + AbusallocerrW::new(self, 18) } #[doc = "Bit 20 - CH0 Data Valid Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch0dvl(&mut self) -> CH0DVL_W<20> { - CH0DVL_W::new(self) + pub fn ch0dvl(&mut self) -> Ch0dvlW { + Ch0dvlW::new(self, 20) } #[doc = "Bit 21 - CH1 Data Valid Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch1dvl(&mut self) -> CH1DVL_W<21> { - CH1DVL_W::new(self) + pub fn ch1dvl(&mut self) -> Ch1dvlW { + Ch1dvlW::new(self, 21) } #[doc = "Bit 26 - ABUS Input Conflict Interrupt Flag"] #[inline(always)] #[must_use] - pub fn abusinputconflict(&mut self) -> ABUSINPUTCONFLICT_W<26> { - ABUSINPUTCONFLICT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn abusinputconflict(&mut self) -> AbusinputconflictW { + AbusinputconflictW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/if_.rs index 963fd21..5e584cf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/if_.rs @@ -1,215 +1,175 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CH0CD` reader - CH0 Conversion Done Interrupt Flag"] -pub type CH0CD_R = crate::BitReader; +pub type Ch0cdR = crate::BitReader; #[doc = "Field `CH0CD` writer - CH0 Conversion Done Interrupt Flag"] -pub type CH0CD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Ch0cdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1CD` reader - CH1 Conversion Done Interrupt Flag"] -pub type CH1CD_R = crate::BitReader; +pub type Ch1cdR = crate::BitReader; #[doc = "Field `CH1CD` writer - CH1 Conversion Done Interrupt Flag"] -pub type CH1CD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Ch1cdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH0OF` reader - CH0 Data Overflow Interrupt Flag"] -pub type CH0OF_R = crate::BitReader; +pub type Ch0ofR = crate::BitReader; #[doc = "Field `CH0OF` writer - CH0 Data Overflow Interrupt Flag"] -pub type CH0OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Ch0ofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1OF` reader - CH1 Data Overflow Interrupt Flag"] -pub type CH1OF_R = crate::BitReader; +pub type Ch1ofR = crate::BitReader; #[doc = "Field `CH1OF` writer - CH1 Data Overflow Interrupt Flag"] -pub type CH1OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Ch1ofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH0UF` reader - CH0 Data Underflow Interrupt Flag"] -pub type CH0UF_R = crate::BitReader; +pub type Ch0ufR = crate::BitReader; #[doc = "Field `CH0UF` writer - CH0 Data Underflow Interrupt Flag"] -pub type CH0UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Ch0ufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1UF` reader - CH1 Data Underflow Interrupt Flag"] -pub type CH1UF_R = crate::BitReader; +pub type Ch1ufR = crate::BitReader; #[doc = "Field `CH1UF` writer - CH1 Data Underflow Interrupt Flag"] -pub type CH1UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Ch1ufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ABUSALLOCERR` reader - ABUS Port Allocation Error Flag"] -pub type ABUSALLOCERR_R = crate::BitReader; +pub type AbusallocerrR = crate::BitReader; #[doc = "Field `ABUSALLOCERR` writer - ABUS Port Allocation Error Flag"] -pub type ABUSALLOCERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AbusallocerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH0DVL` reader - CH0 Data Valid Level Interrupt Flag"] -pub type CH0DVL_R = crate::BitReader; +pub type Ch0dvlR = crate::BitReader; #[doc = "Field `CH0DVL` writer - CH0 Data Valid Level Interrupt Flag"] -pub type CH0DVL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Ch0dvlW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1DVL` reader - CH1 Data Valid Level Interrupt Flag"] -pub type CH1DVL_R = crate::BitReader; +pub type Ch1dvlR = crate::BitReader; #[doc = "Field `CH1DVL` writer - CH1 Data Valid Level Interrupt Flag"] -pub type CH1DVL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Ch1dvlW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ABUSINPUTCONFLICT` reader - ABUS Input Conflict Error Flag"] -pub type ABUSINPUTCONFLICT_R = crate::BitReader; +pub type AbusinputconflictR = crate::BitReader; #[doc = "Field `ABUSINPUTCONFLICT` writer - ABUS Input Conflict Error Flag"] -pub type ABUSINPUTCONFLICT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AbusinputconflictW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CH0 Conversion Done Interrupt Flag"] #[inline(always)] - pub fn ch0cd(&self) -> CH0CD_R { - CH0CD_R::new((self.bits & 1) != 0) + pub fn ch0cd(&self) -> Ch0cdR { + Ch0cdR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CH1 Conversion Done Interrupt Flag"] #[inline(always)] - pub fn ch1cd(&self) -> CH1CD_R { - CH1CD_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1cd(&self) -> Ch1cdR { + Ch1cdR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 4 - CH0 Data Overflow Interrupt Flag"] #[inline(always)] - pub fn ch0of(&self) -> CH0OF_R { - CH0OF_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch0of(&self) -> Ch0ofR { + Ch0ofR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CH1 Data Overflow Interrupt Flag"] #[inline(always)] - pub fn ch1of(&self) -> CH1OF_R { - CH1OF_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch1of(&self) -> Ch1ofR { + Ch1ofR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 8 - CH0 Data Underflow Interrupt Flag"] #[inline(always)] - pub fn ch0uf(&self) -> CH0UF_R { - CH0UF_R::new(((self.bits >> 8) & 1) != 0) + pub fn ch0uf(&self) -> Ch0ufR { + Ch0ufR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - CH1 Data Underflow Interrupt Flag"] #[inline(always)] - pub fn ch1uf(&self) -> CH1UF_R { - CH1UF_R::new(((self.bits >> 9) & 1) != 0) + pub fn ch1uf(&self) -> Ch1ufR { + Ch1ufR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 18 - ABUS Port Allocation Error Flag"] #[inline(always)] - pub fn abusallocerr(&self) -> ABUSALLOCERR_R { - ABUSALLOCERR_R::new(((self.bits >> 18) & 1) != 0) + pub fn abusallocerr(&self) -> AbusallocerrR { + AbusallocerrR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - CH0 Data Valid Level Interrupt Flag"] #[inline(always)] - pub fn ch0dvl(&self) -> CH0DVL_R { - CH0DVL_R::new(((self.bits >> 20) & 1) != 0) + pub fn ch0dvl(&self) -> Ch0dvlR { + Ch0dvlR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - CH1 Data Valid Level Interrupt Flag"] #[inline(always)] - pub fn ch1dvl(&self) -> CH1DVL_R { - CH1DVL_R::new(((self.bits >> 21) & 1) != 0) + pub fn ch1dvl(&self) -> Ch1dvlR { + Ch1dvlR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 26 - ABUS Input Conflict Error Flag"] #[inline(always)] - pub fn abusinputconflict(&self) -> ABUSINPUTCONFLICT_R { - ABUSINPUTCONFLICT_R::new(((self.bits >> 26) & 1) != 0) + pub fn abusinputconflict(&self) -> AbusinputconflictR { + AbusinputconflictR::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bit 0 - CH0 Conversion Done Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch0cd(&mut self) -> CH0CD_W<0> { - CH0CD_W::new(self) + pub fn ch0cd(&mut self) -> Ch0cdW { + Ch0cdW::new(self, 0) } #[doc = "Bit 1 - CH1 Conversion Done Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch1cd(&mut self) -> CH1CD_W<1> { - CH1CD_W::new(self) + pub fn ch1cd(&mut self) -> Ch1cdW { + Ch1cdW::new(self, 1) } #[doc = "Bit 4 - CH0 Data Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch0of(&mut self) -> CH0OF_W<4> { - CH0OF_W::new(self) + pub fn ch0of(&mut self) -> Ch0ofW { + Ch0ofW::new(self, 4) } #[doc = "Bit 5 - CH1 Data Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch1of(&mut self) -> CH1OF_W<5> { - CH1OF_W::new(self) + pub fn ch1of(&mut self) -> Ch1ofW { + Ch1ofW::new(self, 5) } #[doc = "Bit 8 - CH0 Data Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch0uf(&mut self) -> CH0UF_W<8> { - CH0UF_W::new(self) + pub fn ch0uf(&mut self) -> Ch0ufW { + Ch0ufW::new(self, 8) } #[doc = "Bit 9 - CH1 Data Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch1uf(&mut self) -> CH1UF_W<9> { - CH1UF_W::new(self) + pub fn ch1uf(&mut self) -> Ch1ufW { + Ch1ufW::new(self, 9) } #[doc = "Bit 18 - ABUS Port Allocation Error Flag"] #[inline(always)] #[must_use] - pub fn abusallocerr(&mut self) -> ABUSALLOCERR_W<18> { - ABUSALLOCERR_W::new(self) + pub fn abusallocerr(&mut self) -> AbusallocerrW { + AbusallocerrW::new(self, 18) } #[doc = "Bit 20 - CH0 Data Valid Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch0dvl(&mut self) -> CH0DVL_W<20> { - CH0DVL_W::new(self) + pub fn ch0dvl(&mut self) -> Ch0dvlW { + Ch0dvlW::new(self, 20) } #[doc = "Bit 21 - CH1 Data Valid Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch1dvl(&mut self) -> CH1DVL_W<21> { - CH1DVL_W::new(self) + pub fn ch1dvl(&mut self) -> Ch1dvlW { + Ch1dvlW::new(self, 21) } #[doc = "Bit 26 - ABUS Input Conflict Error Flag"] #[inline(always)] #[must_use] - pub fn abusinputconflict(&mut self) -> ABUSINPUTCONFLICT_W<26> { - ABUSINPUTCONFLICT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn abusinputconflict(&mut self) -> AbusinputconflictW { + AbusinputconflictW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/ipversion.rs index 84368b2..1f3dd4e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IPVERSION"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IPVERSION"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/outctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/outctrl.rs index a2573d7..ec20a11 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/outctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/outctrl.rs @@ -1,391 +1,365 @@ #[doc = "Register `OUTCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `OUTCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `MAINOUTENCH0` reader - CH0 Main Output Enable"] -pub type MAINOUTENCH0_R = crate::BitReader; +pub type Mainoutench0R = crate::BitReader; #[doc = "Field `MAINOUTENCH0` writer - CH0 Main Output Enable"] -pub type MAINOUTENCH0_W<'a, const O: u8> = crate::BitWriter<'a, u32, OUTCTRL_SPEC, bool, O>; +pub type Mainoutench0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MAINOUTENCH1` reader - CH1 Main Output Enable"] -pub type MAINOUTENCH1_R = crate::BitReader; +pub type Mainoutench1R = crate::BitReader; #[doc = "Field `MAINOUTENCH1` writer - CH1 Main Output Enable"] -pub type MAINOUTENCH1_W<'a, const O: u8> = crate::BitWriter<'a, u32, OUTCTRL_SPEC, bool, O>; +pub type Mainoutench1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUXOUTENCH0` reader - CH0 Alternative Output Enable"] -pub type AUXOUTENCH0_R = crate::BitReader; +pub type Auxoutench0R = crate::BitReader; #[doc = "Field `AUXOUTENCH0` writer - CH0 Alternative Output Enable"] -pub type AUXOUTENCH0_W<'a, const O: u8> = crate::BitWriter<'a, u32, OUTCTRL_SPEC, bool, O>; +pub type Auxoutench0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUXOUTENCH1` reader - CH1 Alternative Output Enable"] -pub type AUXOUTENCH1_R = crate::BitReader; +pub type Auxoutench1R = crate::BitReader; #[doc = "Field `AUXOUTENCH1` writer - CH1 Alternative Output Enable"] -pub type AUXOUTENCH1_W<'a, const O: u8> = crate::BitWriter<'a, u32, OUTCTRL_SPEC, bool, O>; +pub type Auxoutench1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SHORTCH0` reader - CH1 Main and Alternative Output Short"] -pub type SHORTCH0_R = crate::BitReader; +pub type Shortch0R = crate::BitReader; #[doc = "Field `SHORTCH0` writer - CH1 Main and Alternative Output Short"] -pub type SHORTCH0_W<'a, const O: u8> = crate::BitWriter<'a, u32, OUTCTRL_SPEC, bool, O>; +pub type Shortch0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SHORTCH1` reader - CH0 Main and Alternative Output Short"] -pub type SHORTCH1_R = crate::BitReader; +pub type Shortch1R = crate::BitReader; #[doc = "Field `SHORTCH1` writer - CH0 Main and Alternative Output Short"] -pub type SHORTCH1_W<'a, const O: u8> = crate::BitWriter<'a, u32, OUTCTRL_SPEC, bool, O>; -#[doc = "Field `ABUSPORTSELCH0` reader - CH0 ABUS Port Select"] -pub type ABUSPORTSELCH0_R = crate::FieldReader; +pub type Shortch1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "CH0 ABUS Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ABUSPORTSELCH0_A { +pub enum Abusportselch0 { #[doc = "0: No GPIO Selected for CH0 ABUS Output"] - NONE = 0, + None = 0, #[doc = "1: Port A Selected"] - PORTA = 1, + Porta = 1, #[doc = "2: Port B Selected"] - PORTB = 2, + Portb = 2, #[doc = "3: Port C Selected"] - PORTC = 3, + Portc = 3, #[doc = "4: Port D Selected"] - PORTD = 4, + Portd = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ABUSPORTSELCH0_A) -> Self { + fn from(variant: Abusportselch0) -> Self { variant as _ } } -impl ABUSPORTSELCH0_R { +impl crate::FieldSpec for Abusportselch0 { + type Ux = u8; +} +impl crate::IsEnum for Abusportselch0 {} +#[doc = "Field `ABUSPORTSELCH0` reader - CH0 ABUS Port Select"] +pub type Abusportselch0R = crate::FieldReader; +impl Abusportselch0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ABUSPORTSELCH0_A::NONE), - 1 => Some(ABUSPORTSELCH0_A::PORTA), - 2 => Some(ABUSPORTSELCH0_A::PORTB), - 3 => Some(ABUSPORTSELCH0_A::PORTC), - 4 => Some(ABUSPORTSELCH0_A::PORTD), + 0 => Some(Abusportselch0::None), + 1 => Some(Abusportselch0::Porta), + 2 => Some(Abusportselch0::Portb), + 3 => Some(Abusportselch0::Portc), + 4 => Some(Abusportselch0::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No GPIO Selected for CH0 ABUS Output"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ABUSPORTSELCH0_A::NONE + *self == Abusportselch0::None } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A Selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == ABUSPORTSELCH0_A::PORTA + *self == Abusportselch0::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B Selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == ABUSPORTSELCH0_A::PORTB + *self == Abusportselch0::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C Selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == ABUSPORTSELCH0_A::PORTC + *self == Abusportselch0::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D Selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == ABUSPORTSELCH0_A::PORTD + *self == Abusportselch0::Portd } } #[doc = "Field `ABUSPORTSELCH0` writer - CH0 ABUS Port Select"] -pub type ABUSPORTSELCH0_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, OUTCTRL_SPEC, u8, ABUSPORTSELCH0_A, 3, O>; -impl<'a, const O: u8> ABUSPORTSELCH0_W<'a, O> { +pub type Abusportselch0W<'a, REG> = crate::FieldWriter<'a, REG, 3, Abusportselch0>; +impl<'a, REG> Abusportselch0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No GPIO Selected for CH0 ABUS Output"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ABUSPORTSELCH0_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Abusportselch0::None) } #[doc = "Port A Selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(ABUSPORTSELCH0_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Abusportselch0::Porta) } #[doc = "Port B Selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(ABUSPORTSELCH0_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Abusportselch0::Portb) } #[doc = "Port C Selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(ABUSPORTSELCH0_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Abusportselch0::Portc) } #[doc = "Port D Selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(ABUSPORTSELCH0_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Abusportselch0::Portd) } } #[doc = "Field `ABUSPINSELCH0` reader - CH0 ABUS Pin Select"] -pub type ABUSPINSELCH0_R = crate::FieldReader; +pub type Abuspinselch0R = crate::FieldReader; #[doc = "Field `ABUSPINSELCH0` writer - CH0 ABUS Pin Select"] -pub type ABUSPINSELCH0_W<'a, const O: u8> = crate::FieldWriter<'a, u32, OUTCTRL_SPEC, u8, u8, 6, O>; -#[doc = "Field `ABUSPORTSELCH1` reader - CH1 ABUS Port Select"] -pub type ABUSPORTSELCH1_R = crate::FieldReader; +pub type Abuspinselch0W<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "CH1 ABUS Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ABUSPORTSELCH1_A { +pub enum Abusportselch1 { #[doc = "0: No GPIO Selected for CH1 ABUS Output"] - NONE = 0, + None = 0, #[doc = "1: Port A Selected"] - PORTA = 1, + Porta = 1, #[doc = "2: Port B Selected"] - PORTB = 2, + Portb = 2, #[doc = "3: Port C Selected"] - PORTC = 3, + Portc = 3, #[doc = "4: Port D Selected"] - PORTD = 4, + Portd = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ABUSPORTSELCH1_A) -> Self { + fn from(variant: Abusportselch1) -> Self { variant as _ } } -impl ABUSPORTSELCH1_R { +impl crate::FieldSpec for Abusportselch1 { + type Ux = u8; +} +impl crate::IsEnum for Abusportselch1 {} +#[doc = "Field `ABUSPORTSELCH1` reader - CH1 ABUS Port Select"] +pub type Abusportselch1R = crate::FieldReader; +impl Abusportselch1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ABUSPORTSELCH1_A::NONE), - 1 => Some(ABUSPORTSELCH1_A::PORTA), - 2 => Some(ABUSPORTSELCH1_A::PORTB), - 3 => Some(ABUSPORTSELCH1_A::PORTC), - 4 => Some(ABUSPORTSELCH1_A::PORTD), + 0 => Some(Abusportselch1::None), + 1 => Some(Abusportselch1::Porta), + 2 => Some(Abusportselch1::Portb), + 3 => Some(Abusportselch1::Portc), + 4 => Some(Abusportselch1::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No GPIO Selected for CH1 ABUS Output"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ABUSPORTSELCH1_A::NONE + *self == Abusportselch1::None } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A Selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == ABUSPORTSELCH1_A::PORTA + *self == Abusportselch1::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B Selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == ABUSPORTSELCH1_A::PORTB + *self == Abusportselch1::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C Selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == ABUSPORTSELCH1_A::PORTC + *self == Abusportselch1::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D Selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == ABUSPORTSELCH1_A::PORTD + *self == Abusportselch1::Portd } } #[doc = "Field `ABUSPORTSELCH1` writer - CH1 ABUS Port Select"] -pub type ABUSPORTSELCH1_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, OUTCTRL_SPEC, u8, ABUSPORTSELCH1_A, 3, O>; -impl<'a, const O: u8> ABUSPORTSELCH1_W<'a, O> { +pub type Abusportselch1W<'a, REG> = crate::FieldWriter<'a, REG, 3, Abusportselch1>; +impl<'a, REG> Abusportselch1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No GPIO Selected for CH1 ABUS Output"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ABUSPORTSELCH1_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Abusportselch1::None) } #[doc = "Port A Selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(ABUSPORTSELCH1_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Abusportselch1::Porta) } #[doc = "Port B Selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(ABUSPORTSELCH1_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Abusportselch1::Portb) } #[doc = "Port C Selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(ABUSPORTSELCH1_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Abusportselch1::Portc) } #[doc = "Port D Selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(ABUSPORTSELCH1_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Abusportselch1::Portd) } } #[doc = "Field `ABUSPINSELCH1` reader - CH1 ABUS Pin Select"] -pub type ABUSPINSELCH1_R = crate::FieldReader; +pub type Abuspinselch1R = crate::FieldReader; #[doc = "Field `ABUSPINSELCH1` writer - CH1 ABUS Pin Select"] -pub type ABUSPINSELCH1_W<'a, const O: u8> = crate::FieldWriter<'a, u32, OUTCTRL_SPEC, u8, u8, 6, O>; +pub type Abuspinselch1W<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bit 0 - CH0 Main Output Enable"] #[inline(always)] - pub fn mainoutench0(&self) -> MAINOUTENCH0_R { - MAINOUTENCH0_R::new((self.bits & 1) != 0) + pub fn mainoutench0(&self) -> Mainoutench0R { + Mainoutench0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CH1 Main Output Enable"] #[inline(always)] - pub fn mainoutench1(&self) -> MAINOUTENCH1_R { - MAINOUTENCH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn mainoutench1(&self) -> Mainoutench1R { + Mainoutench1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 4 - CH0 Alternative Output Enable"] #[inline(always)] - pub fn auxoutench0(&self) -> AUXOUTENCH0_R { - AUXOUTENCH0_R::new(((self.bits >> 4) & 1) != 0) + pub fn auxoutench0(&self) -> Auxoutench0R { + Auxoutench0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CH1 Alternative Output Enable"] #[inline(always)] - pub fn auxoutench1(&self) -> AUXOUTENCH1_R { - AUXOUTENCH1_R::new(((self.bits >> 5) & 1) != 0) + pub fn auxoutench1(&self) -> Auxoutench1R { + Auxoutench1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 8 - CH1 Main and Alternative Output Short"] #[inline(always)] - pub fn shortch0(&self) -> SHORTCH0_R { - SHORTCH0_R::new(((self.bits >> 8) & 1) != 0) + pub fn shortch0(&self) -> Shortch0R { + Shortch0R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - CH0 Main and Alternative Output Short"] #[inline(always)] - pub fn shortch1(&self) -> SHORTCH1_R { - SHORTCH1_R::new(((self.bits >> 9) & 1) != 0) + pub fn shortch1(&self) -> Shortch1R { + Shortch1R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bits 12:14 - CH0 ABUS Port Select"] #[inline(always)] - pub fn abusportselch0(&self) -> ABUSPORTSELCH0_R { - ABUSPORTSELCH0_R::new(((self.bits >> 12) & 7) as u8) + pub fn abusportselch0(&self) -> Abusportselch0R { + Abusportselch0R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 15:20 - CH0 ABUS Pin Select"] #[inline(always)] - pub fn abuspinselch0(&self) -> ABUSPINSELCH0_R { - ABUSPINSELCH0_R::new(((self.bits >> 15) & 0x3f) as u8) + pub fn abuspinselch0(&self) -> Abuspinselch0R { + Abuspinselch0R::new(((self.bits >> 15) & 0x3f) as u8) } #[doc = "Bits 22:24 - CH1 ABUS Port Select"] #[inline(always)] - pub fn abusportselch1(&self) -> ABUSPORTSELCH1_R { - ABUSPORTSELCH1_R::new(((self.bits >> 22) & 7) as u8) + pub fn abusportselch1(&self) -> Abusportselch1R { + Abusportselch1R::new(((self.bits >> 22) & 7) as u8) } #[doc = "Bits 25:30 - CH1 ABUS Pin Select"] #[inline(always)] - pub fn abuspinselch1(&self) -> ABUSPINSELCH1_R { - ABUSPINSELCH1_R::new(((self.bits >> 25) & 0x3f) as u8) + pub fn abuspinselch1(&self) -> Abuspinselch1R { + Abuspinselch1R::new(((self.bits >> 25) & 0x3f) as u8) } } impl W { #[doc = "Bit 0 - CH0 Main Output Enable"] #[inline(always)] #[must_use] - pub fn mainoutench0(&mut self) -> MAINOUTENCH0_W<0> { - MAINOUTENCH0_W::new(self) + pub fn mainoutench0(&mut self) -> Mainoutench0W { + Mainoutench0W::new(self, 0) } #[doc = "Bit 1 - CH1 Main Output Enable"] #[inline(always)] #[must_use] - pub fn mainoutench1(&mut self) -> MAINOUTENCH1_W<1> { - MAINOUTENCH1_W::new(self) + pub fn mainoutench1(&mut self) -> Mainoutench1W { + Mainoutench1W::new(self, 1) } #[doc = "Bit 4 - CH0 Alternative Output Enable"] #[inline(always)] #[must_use] - pub fn auxoutench0(&mut self) -> AUXOUTENCH0_W<4> { - AUXOUTENCH0_W::new(self) + pub fn auxoutench0(&mut self) -> Auxoutench0W { + Auxoutench0W::new(self, 4) } #[doc = "Bit 5 - CH1 Alternative Output Enable"] #[inline(always)] #[must_use] - pub fn auxoutench1(&mut self) -> AUXOUTENCH1_W<5> { - AUXOUTENCH1_W::new(self) + pub fn auxoutench1(&mut self) -> Auxoutench1W { + Auxoutench1W::new(self, 5) } #[doc = "Bit 8 - CH1 Main and Alternative Output Short"] #[inline(always)] #[must_use] - pub fn shortch0(&mut self) -> SHORTCH0_W<8> { - SHORTCH0_W::new(self) + pub fn shortch0(&mut self) -> Shortch0W { + Shortch0W::new(self, 8) } #[doc = "Bit 9 - CH0 Main and Alternative Output Short"] #[inline(always)] #[must_use] - pub fn shortch1(&mut self) -> SHORTCH1_W<9> { - SHORTCH1_W::new(self) + pub fn shortch1(&mut self) -> Shortch1W { + Shortch1W::new(self, 9) } #[doc = "Bits 12:14 - CH0 ABUS Port Select"] #[inline(always)] #[must_use] - pub fn abusportselch0(&mut self) -> ABUSPORTSELCH0_W<12> { - ABUSPORTSELCH0_W::new(self) + pub fn abusportselch0(&mut self) -> Abusportselch0W { + Abusportselch0W::new(self, 12) } #[doc = "Bits 15:20 - CH0 ABUS Pin Select"] #[inline(always)] #[must_use] - pub fn abuspinselch0(&mut self) -> ABUSPINSELCH0_W<15> { - ABUSPINSELCH0_W::new(self) + pub fn abuspinselch0(&mut self) -> Abuspinselch0W { + Abuspinselch0W::new(self, 15) } #[doc = "Bits 22:24 - CH1 ABUS Port Select"] #[inline(always)] #[must_use] - pub fn abusportselch1(&mut self) -> ABUSPORTSELCH1_W<22> { - ABUSPORTSELCH1_W::new(self) + pub fn abusportselch1(&mut self) -> Abusportselch1W { + Abusportselch1W::new(self, 22) } #[doc = "Bits 25:30 - CH1 ABUS Pin Select"] #[inline(always)] #[must_use] - pub fn abuspinselch1(&mut self) -> ABUSPINSELCH1_W<25> { - ABUSPINSELCH1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn abuspinselch1(&mut self) -> Abuspinselch1W { + Abuspinselch1W::new(self, 25) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [outctrl](index.html) module"] -pub struct OUTCTRL_SPEC; -impl crate::RegisterSpec for OUTCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`outctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`outctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct OutctrlSpec; +impl crate::RegisterSpec for OutctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [outctrl::R](R) reader structure"] -impl crate::Readable for OUTCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [outctrl::W](W) writer structure"] -impl crate::Writable for OUTCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`outctrl::R`](R) reader structure"] +impl crate::Readable for OutctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`outctrl::W`](W) writer structure"] +impl crate::Writable for OutctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OUTCTRL to value 0"] -impl crate::Resettable for OUTCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for OutctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/outtimercfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/outtimercfg.rs index 041d129..8cffa64 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/outtimercfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/outtimercfg.rs @@ -1,97 +1,55 @@ #[doc = "Register `OUTTIMERCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `OUTTIMERCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CH0OUTHOLDTIME` reader - CH0 Output Hold Time"] -pub type CH0OUTHOLDTIME_R = crate::FieldReader; +pub type Ch0outholdtimeR = crate::FieldReader; #[doc = "Field `CH0OUTHOLDTIME` writer - CH0 Output Hold Time"] -pub type CH0OUTHOLDTIME_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, OUTTIMERCFG_SPEC, u16, u16, 10, O>; +pub type Ch0outholdtimeW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `CH1OUTHOLDTIME` reader - CH1 Output Hold Time"] -pub type CH1OUTHOLDTIME_R = crate::FieldReader; +pub type Ch1outholdtimeR = crate::FieldReader; #[doc = "Field `CH1OUTHOLDTIME` writer - CH1 Output Hold Time"] -pub type CH1OUTHOLDTIME_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, OUTTIMERCFG_SPEC, u16, u16, 10, O>; +pub type Ch1outholdtimeW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; impl R { #[doc = "Bits 0:9 - CH0 Output Hold Time"] #[inline(always)] - pub fn ch0outholdtime(&self) -> CH0OUTHOLDTIME_R { - CH0OUTHOLDTIME_R::new((self.bits & 0x03ff) as u16) + pub fn ch0outholdtime(&self) -> Ch0outholdtimeR { + Ch0outholdtimeR::new((self.bits & 0x03ff) as u16) } #[doc = "Bits 15:24 - CH1 Output Hold Time"] #[inline(always)] - pub fn ch1outholdtime(&self) -> CH1OUTHOLDTIME_R { - CH1OUTHOLDTIME_R::new(((self.bits >> 15) & 0x03ff) as u16) + pub fn ch1outholdtime(&self) -> Ch1outholdtimeR { + Ch1outholdtimeR::new(((self.bits >> 15) & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:9 - CH0 Output Hold Time"] #[inline(always)] #[must_use] - pub fn ch0outholdtime(&mut self) -> CH0OUTHOLDTIME_W<0> { - CH0OUTHOLDTIME_W::new(self) + pub fn ch0outholdtime(&mut self) -> Ch0outholdtimeW { + Ch0outholdtimeW::new(self, 0) } #[doc = "Bits 15:24 - CH1 Output Hold Time"] #[inline(always)] #[must_use] - pub fn ch1outholdtime(&mut self) -> CH1OUTHOLDTIME_W<15> { - CH1OUTHOLDTIME_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ch1outholdtime(&mut self) -> Ch1outholdtimeW { + Ch1outholdtimeW::new(self, 15) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [outtimercfg](index.html) module"] -pub struct OUTTIMERCFG_SPEC; -impl crate::RegisterSpec for OUTTIMERCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`outtimercfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`outtimercfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct OuttimercfgSpec; +impl crate::RegisterSpec for OuttimercfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [outtimercfg::R](R) reader structure"] -impl crate::Readable for OUTTIMERCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [outtimercfg::W](W) writer structure"] -impl crate::Writable for OUTTIMERCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`outtimercfg::R`](R) reader structure"] +impl crate::Readable for OuttimercfgSpec {} +#[doc = "`write(|w| ..)` method takes [`outtimercfg::W`](W) writer structure"] +impl crate::Writable for OuttimercfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OUTTIMERCFG to value 0"] -impl crate::Resettable for OUTTIMERCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for OuttimercfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/status.rs index 26b8c0c..3a17a08 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/status.rs @@ -1,156 +1,141 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CH0ENS` reader - Channel 0 Enabled Status"] -pub type CH0ENS_R = crate::BitReader; +pub type Ch0ensR = crate::BitReader; #[doc = "Field `CH1ENS` reader - Channel 1 Enabled Status"] -pub type CH1ENS_R = crate::BitReader; +pub type Ch1ensR = crate::BitReader; #[doc = "Field `CH0WARM` reader - Channel 0 Warmed Status"] -pub type CH0WARM_R = crate::BitReader; +pub type Ch0warmR = crate::BitReader; #[doc = "Field `CH1WARM` reader - Channel 1 Warmed Status"] -pub type CH1WARM_R = crate::BitReader; +pub type Ch1warmR = crate::BitReader; #[doc = "Field `CH0FIFOFULL` reader - Channel 0 FIFO Full Status"] -pub type CH0FIFOFULL_R = crate::BitReader; +pub type Ch0fifofullR = crate::BitReader; #[doc = "Field `CH1FIFOFULL` reader - Channel 1 FIFO Full Status"] -pub type CH1FIFOFULL_R = crate::BitReader; +pub type Ch1fifofullR = crate::BitReader; #[doc = "Field `CH0FIFOCNT` reader - Channel 0 FIFO Valid Count"] -pub type CH0FIFOCNT_R = crate::FieldReader; +pub type Ch0fifocntR = crate::FieldReader; #[doc = "Field `CH1FIFOCNT` reader - Channel 1 FIFO Valid Count"] -pub type CH1FIFOCNT_R = crate::FieldReader; +pub type Ch1fifocntR = crate::FieldReader; #[doc = "Field `CH0CURRENTSTATE` reader - Channel 0 Current Status"] -pub type CH0CURRENTSTATE_R = crate::BitReader; +pub type Ch0currentstateR = crate::BitReader; #[doc = "Field `CH1CURRENTSTATE` reader - Channel 1 Current Status"] -pub type CH1CURRENTSTATE_R = crate::BitReader; +pub type Ch1currentstateR = crate::BitReader; #[doc = "Field `CH0FIFOEMPTY` reader - Channel 0 FIFO Empty Status"] -pub type CH0FIFOEMPTY_R = crate::BitReader; +pub type Ch0fifoemptyR = crate::BitReader; #[doc = "Field `CH1FIFOEMPTY` reader - Channel 1 FIFO Empty Status"] -pub type CH1FIFOEMPTY_R = crate::BitReader; +pub type Ch1fifoemptyR = crate::BitReader; #[doc = "Field `CH0FIFOFLBUSY` reader - CH0 FIFO Flush Sync Busy"] -pub type CH0FIFOFLBUSY_R = crate::BitReader; +pub type Ch0fifoflbusyR = crate::BitReader; #[doc = "Field `CH1FIFOFLBUSY` reader - CH1 FIFO Flush Sync Busy"] -pub type CH1FIFOFLBUSY_R = crate::BitReader; +pub type Ch1fifoflbusyR = crate::BitReader; #[doc = "Field `ABUSINPUTCONFLICT` reader - ABUS Input Conflict Status"] -pub type ABUSINPUTCONFLICT_R = crate::BitReader; +pub type AbusinputconflictR = crate::BitReader; #[doc = "Field `SINEACTIVE` reader - Sine Wave Output Status on Channel"] -pub type SINEACTIVE_R = crate::BitReader; +pub type SineactiveR = crate::BitReader; #[doc = "Field `ABUSALLOCERR` reader - ABUS Allocation Error Status"] -pub type ABUSALLOCERR_R = crate::BitReader; +pub type AbusallocerrR = crate::BitReader; #[doc = "Field `SYNCBUSY` reader - Sync Busy Combined"] -pub type SYNCBUSY_R = crate::BitReader; +pub type SyncbusyR = crate::BitReader; impl R { #[doc = "Bit 0 - Channel 0 Enabled Status"] #[inline(always)] - pub fn ch0ens(&self) -> CH0ENS_R { - CH0ENS_R::new((self.bits & 1) != 0) + pub fn ch0ens(&self) -> Ch0ensR { + Ch0ensR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channel 1 Enabled Status"] #[inline(always)] - pub fn ch1ens(&self) -> CH1ENS_R { - CH1ENS_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1ens(&self) -> Ch1ensR { + Ch1ensR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 4 - Channel 0 Warmed Status"] #[inline(always)] - pub fn ch0warm(&self) -> CH0WARM_R { - CH0WARM_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch0warm(&self) -> Ch0warmR { + Ch0warmR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Channel 1 Warmed Status"] #[inline(always)] - pub fn ch1warm(&self) -> CH1WARM_R { - CH1WARM_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch1warm(&self) -> Ch1warmR { + Ch1warmR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 8 - Channel 0 FIFO Full Status"] #[inline(always)] - pub fn ch0fifofull(&self) -> CH0FIFOFULL_R { - CH0FIFOFULL_R::new(((self.bits >> 8) & 1) != 0) + pub fn ch0fifofull(&self) -> Ch0fifofullR { + Ch0fifofullR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Channel 1 FIFO Full Status"] #[inline(always)] - pub fn ch1fifofull(&self) -> CH1FIFOFULL_R { - CH1FIFOFULL_R::new(((self.bits >> 9) & 1) != 0) + pub fn ch1fifofull(&self) -> Ch1fifofullR { + Ch1fifofullR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bits 12:14 - Channel 0 FIFO Valid Count"] #[inline(always)] - pub fn ch0fifocnt(&self) -> CH0FIFOCNT_R { - CH0FIFOCNT_R::new(((self.bits >> 12) & 7) as u8) + pub fn ch0fifocnt(&self) -> Ch0fifocntR { + Ch0fifocntR::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 15:17 - Channel 1 FIFO Valid Count"] #[inline(always)] - pub fn ch1fifocnt(&self) -> CH1FIFOCNT_R { - CH1FIFOCNT_R::new(((self.bits >> 15) & 7) as u8) + pub fn ch1fifocnt(&self) -> Ch1fifocntR { + Ch1fifocntR::new(((self.bits >> 15) & 7) as u8) } #[doc = "Bit 19 - Channel 0 Current Status"] #[inline(always)] - pub fn ch0currentstate(&self) -> CH0CURRENTSTATE_R { - CH0CURRENTSTATE_R::new(((self.bits >> 19) & 1) != 0) + pub fn ch0currentstate(&self) -> Ch0currentstateR { + Ch0currentstateR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Channel 1 Current Status"] #[inline(always)] - pub fn ch1currentstate(&self) -> CH1CURRENTSTATE_R { - CH1CURRENTSTATE_R::new(((self.bits >> 20) & 1) != 0) + pub fn ch1currentstate(&self) -> Ch1currentstateR { + Ch1currentstateR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 22 - Channel 0 FIFO Empty Status"] #[inline(always)] - pub fn ch0fifoempty(&self) -> CH0FIFOEMPTY_R { - CH0FIFOEMPTY_R::new(((self.bits >> 22) & 1) != 0) + pub fn ch0fifoempty(&self) -> Ch0fifoemptyR { + Ch0fifoemptyR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Channel 1 FIFO Empty Status"] #[inline(always)] - pub fn ch1fifoempty(&self) -> CH1FIFOEMPTY_R { - CH1FIFOEMPTY_R::new(((self.bits >> 23) & 1) != 0) + pub fn ch1fifoempty(&self) -> Ch1fifoemptyR { + Ch1fifoemptyR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 26 - CH0 FIFO Flush Sync Busy"] #[inline(always)] - pub fn ch0fifoflbusy(&self) -> CH0FIFOFLBUSY_R { - CH0FIFOFLBUSY_R::new(((self.bits >> 26) & 1) != 0) + pub fn ch0fifoflbusy(&self) -> Ch0fifoflbusyR { + Ch0fifoflbusyR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - CH1 FIFO Flush Sync Busy"] #[inline(always)] - pub fn ch1fifoflbusy(&self) -> CH1FIFOFLBUSY_R { - CH1FIFOFLBUSY_R::new(((self.bits >> 27) & 1) != 0) + pub fn ch1fifoflbusy(&self) -> Ch1fifoflbusyR { + Ch1fifoflbusyR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - ABUS Input Conflict Status"] #[inline(always)] - pub fn abusinputconflict(&self) -> ABUSINPUTCONFLICT_R { - ABUSINPUTCONFLICT_R::new(((self.bits >> 28) & 1) != 0) + pub fn abusinputconflict(&self) -> AbusinputconflictR { + AbusinputconflictR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Sine Wave Output Status on Channel"] #[inline(always)] - pub fn sineactive(&self) -> SINEACTIVE_R { - SINEACTIVE_R::new(((self.bits >> 29) & 1) != 0) + pub fn sineactive(&self) -> SineactiveR { + SineactiveR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - ABUS Allocation Error Status"] #[inline(always)] - pub fn abusallocerr(&self) -> ABUSALLOCERR_R { - ABUSALLOCERR_R::new(((self.bits >> 30) & 1) != 0) + pub fn abusallocerr(&self) -> AbusallocerrR { + AbusallocerrR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Sync Busy Combined"] #[inline(always)] - pub fn syncbusy(&self) -> SYNCBUSY_R { - SYNCBUSY_R::new(((self.bits >> 31) & 1) != 0) + pub fn syncbusy(&self) -> SyncbusyR { + SyncbusyR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/swrst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/swrst.rs index afd978e..804eaff 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/swrst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_ns/swrst.rs @@ -1,80 +1,40 @@ #[doc = "Register `SWRST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SWRST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SWRST` writer - Software reset command"] -pub type SWRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, SWRST_SPEC, bool, O>; +pub type SwrstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESETTING` reader - Software reset busy status"] -pub type RESETTING_R = crate::BitReader; +pub type ResettingR = crate::BitReader; impl R { #[doc = "Bit 1 - Software reset busy status"] #[inline(always)] - pub fn resetting(&self) -> RESETTING_R { - RESETTING_R::new(((self.bits >> 1) & 1) != 0) + pub fn resetting(&self) -> ResettingR { + ResettingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Software reset command"] #[inline(always)] #[must_use] - pub fn swrst(&mut self) -> SWRST_W<0> { - SWRST_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn swrst(&mut self) -> SwrstW { + SwrstW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swrst](index.html) module"] -pub struct SWRST_SPEC; -impl crate::RegisterSpec for SWRST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SwrstSpec; +impl crate::RegisterSpec for SwrstSpec { type Ux = u32; } -#[doc = "`read()` method returns [swrst::R](R) reader structure"] -impl crate::Readable for SWRST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [swrst::W](W) writer structure"] -impl crate::Writable for SWRST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`swrst::R`](R) reader structure"] +impl crate::Readable for SwrstSpec {} +#[doc = "`write(|w| ..)` method takes [`swrst::W`](W) writer structure"] +impl crate::Writable for SwrstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWRST to value 0"] -impl crate::Resettable for SWRST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SwrstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s.rs index 94f9bd3..db09122 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s.rs @@ -1,88 +1,174 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + swrst: Swrst, + cfg: Cfg, + status: Status, + ch0cfg: Ch0cfg, + ch1cfg: Ch1cfg, + cmd: Cmd, + if_: If, + ien: Ien, + ch0f: Ch0f, + ch1f: Ch1f, + outctrl: Outctrl, + outtimercfg: Outtimercfg, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub swrst: SWRST, + #[inline(always)] + pub const fn swrst(&self) -> &Swrst { + &self.swrst + } #[doc = "0x0c - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x10 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x14 - No Description"] - pub ch0cfg: CH0CFG, + #[inline(always)] + pub const fn ch0cfg(&self) -> &Ch0cfg { + &self.ch0cfg + } #[doc = "0x18 - No Description"] - pub ch1cfg: CH1CFG, + #[inline(always)] + pub const fn ch1cfg(&self) -> &Ch1cfg { + &self.ch1cfg + } #[doc = "0x1c - No Description"] - pub cmd: CMD, + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x20 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x24 - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x28 - No Description"] - pub ch0f: CH0F, + #[inline(always)] + pub const fn ch0f(&self) -> &Ch0f { + &self.ch0f + } #[doc = "0x2c - No Description"] - pub ch1f: CH1F, + #[inline(always)] + pub const fn ch1f(&self) -> &Ch1f { + &self.ch1f + } #[doc = "0x30 - No Description"] - pub outctrl: OUTCTRL, + #[inline(always)] + pub const fn outctrl(&self) -> &Outctrl { + &self.outctrl + } #[doc = "0x34 - No Description"] - pub outtimercfg: OUTTIMERCFG, + #[inline(always)] + pub const fn outtimercfg(&self) -> &Outtimercfg { + &self.outtimercfg + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "SWRST (rw) register accessor: an alias for `Reg`"] -pub type SWRST = crate::Reg; +#[doc = "SWRST (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swrst`] +module"] +#[doc(alias = "SWRST")] +pub type Swrst = crate::Reg; #[doc = "No Description"] pub mod swrst; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "CH0CFG (rw) register accessor: an alias for `Reg`"] -pub type CH0CFG = crate::Reg; +#[doc = "CH0CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch0cfg`] +module"] +#[doc(alias = "CH0CFG")] +pub type Ch0cfg = crate::Reg; #[doc = "No Description"] pub mod ch0cfg; -#[doc = "CH1CFG (rw) register accessor: an alias for `Reg`"] -pub type CH1CFG = crate::Reg; +#[doc = "CH1CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch1cfg`] +module"] +#[doc(alias = "CH1CFG")] +pub type Ch1cfg = crate::Reg; #[doc = "No Description"] pub mod ch1cfg; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "CH0F (w) register accessor: an alias for `Reg`"] -pub type CH0F = crate::Reg; +#[doc = "CH0F (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0f::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch0f`] +module"] +#[doc(alias = "CH0F")] +pub type Ch0f = crate::Reg; #[doc = "No Description"] pub mod ch0f; -#[doc = "CH1F (w) register accessor: an alias for `Reg`"] -pub type CH1F = crate::Reg; +#[doc = "CH1F (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1f::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ch1f`] +module"] +#[doc(alias = "CH1F")] +pub type Ch1f = crate::Reg; #[doc = "No Description"] pub mod ch1f; -#[doc = "OUTCTRL (rw) register accessor: an alias for `Reg`"] -pub type OUTCTRL = crate::Reg; +#[doc = "OUTCTRL (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`outctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`outctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@outctrl`] +module"] +#[doc(alias = "OUTCTRL")] +pub type Outctrl = crate::Reg; #[doc = "No Description"] pub mod outctrl; -#[doc = "OUTTIMERCFG (rw) register accessor: an alias for `Reg`"] -pub type OUTTIMERCFG = crate::Reg; +#[doc = "OUTTIMERCFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`outtimercfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`outtimercfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@outtimercfg`] +module"] +#[doc(alias = "OUTTIMERCFG")] +pub type Outtimercfg = crate::Reg; #[doc = "No Description"] pub mod outtimercfg; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/cfg.rs index 14b58d6..bbdb31a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/cfg.rs @@ -1,747 +1,740 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `DIFF` reader - Differential Mode"] -pub type DIFF_R = crate::BitReader; +pub type W = crate::W; #[doc = "Differential Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DIFF_A { +pub enum Diff { #[doc = "0: Single ended output"] - SINGLEENDED = 0, + Singleended = 0, #[doc = "1: Differential output"] - DIFFERENTIAL = 1, + Differential = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DIFF_A) -> Self { + fn from(variant: Diff) -> Self { variant as u8 != 0 } } -impl DIFF_R { +#[doc = "Field `DIFF` reader - Differential Mode"] +pub type DiffR = crate::BitReader; +impl DiffR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DIFF_A { + pub const fn variant(&self) -> Diff { match self.bits { - false => DIFF_A::SINGLEENDED, - true => DIFF_A::DIFFERENTIAL, + false => Diff::Singleended, + true => Diff::Differential, } } - #[doc = "Checks if the value of the field is `SINGLEENDED`"] + #[doc = "Single ended output"] #[inline(always)] pub fn is_singleended(&self) -> bool { - *self == DIFF_A::SINGLEENDED + *self == Diff::Singleended } - #[doc = "Checks if the value of the field is `DIFFERENTIAL`"] + #[doc = "Differential output"] #[inline(always)] pub fn is_differential(&self) -> bool { - *self == DIFF_A::DIFFERENTIAL + *self == Diff::Differential } } #[doc = "Field `DIFF` writer - Differential Mode"] -pub type DIFF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DIFF_A, O>; -impl<'a, const O: u8> DIFF_W<'a, O> { +pub type DiffW<'a, REG> = crate::BitWriter<'a, REG, Diff>; +impl<'a, REG> DiffW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Single ended output"] #[inline(always)] - pub fn singleended(self) -> &'a mut W { - self.variant(DIFF_A::SINGLEENDED) + pub fn singleended(self) -> &'a mut crate::W { + self.variant(Diff::Singleended) } #[doc = "Differential output"] #[inline(always)] - pub fn differential(self) -> &'a mut W { - self.variant(DIFF_A::DIFFERENTIAL) + pub fn differential(self) -> &'a mut crate::W { + self.variant(Diff::Differential) } } -#[doc = "Field `SINEMODE` reader - Sine Mode"] -pub type SINEMODE_R = crate::BitReader; #[doc = "Sine Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SINEMODE_A { +pub enum Sinemode { #[doc = "0: Sine mode disabled. Sine reset to 0 degrees"] - DISSINEMODE = 0, + Dissinemode = 0, #[doc = "1: Sine mode enabled"] - ENSINEMODE = 1, + Ensinemode = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SINEMODE_A) -> Self { + fn from(variant: Sinemode) -> Self { variant as u8 != 0 } } -impl SINEMODE_R { +#[doc = "Field `SINEMODE` reader - Sine Mode"] +pub type SinemodeR = crate::BitReader; +impl SinemodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SINEMODE_A { + pub const fn variant(&self) -> Sinemode { match self.bits { - false => SINEMODE_A::DISSINEMODE, - true => SINEMODE_A::ENSINEMODE, + false => Sinemode::Dissinemode, + true => Sinemode::Ensinemode, } } - #[doc = "Checks if the value of the field is `DISSINEMODE`"] + #[doc = "Sine mode disabled. Sine reset to 0 degrees"] #[inline(always)] pub fn is_dissinemode(&self) -> bool { - *self == SINEMODE_A::DISSINEMODE + *self == Sinemode::Dissinemode } - #[doc = "Checks if the value of the field is `ENSINEMODE`"] + #[doc = "Sine mode enabled"] #[inline(always)] pub fn is_ensinemode(&self) -> bool { - *self == SINEMODE_A::ENSINEMODE + *self == Sinemode::Ensinemode } } #[doc = "Field `SINEMODE` writer - Sine Mode"] -pub type SINEMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, SINEMODE_A, O>; -impl<'a, const O: u8> SINEMODE_W<'a, O> { +pub type SinemodeW<'a, REG> = crate::BitWriter<'a, REG, Sinemode>; +impl<'a, REG> SinemodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Sine mode disabled. Sine reset to 0 degrees"] #[inline(always)] - pub fn dissinemode(self) -> &'a mut W { - self.variant(SINEMODE_A::DISSINEMODE) + pub fn dissinemode(self) -> &'a mut crate::W { + self.variant(Sinemode::Dissinemode) } #[doc = "Sine mode enabled"] #[inline(always)] - pub fn ensinemode(self) -> &'a mut W { - self.variant(SINEMODE_A::ENSINEMODE) + pub fn ensinemode(self) -> &'a mut crate::W { + self.variant(Sinemode::Ensinemode) } } #[doc = "Field `SINERESET` reader - Sine Wave Reset When inactive"] -pub type SINERESET_R = crate::BitReader; +pub type SineresetR = crate::BitReader; #[doc = "Field `SINERESET` writer - Sine Wave Reset When inactive"] -pub type SINERESET_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `CH0PRESCRST` reader - Channel 0 Start Reset Prescaler"] -pub type CH0PRESCRST_R = crate::BitReader; +pub type SineresetW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Channel 0 Start Reset Prescaler\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH0PRESCRST_A { +pub enum Ch0prescrst { #[doc = "0: Prescaler not reset on channel 0 start"] - NORESETPRESC = 0, + Noresetpresc = 0, #[doc = "1: Prescaler reset on channel 0 start"] - RESETPRESC = 1, + Resetpresc = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH0PRESCRST_A) -> Self { + fn from(variant: Ch0prescrst) -> Self { variant as u8 != 0 } } -impl CH0PRESCRST_R { +#[doc = "Field `CH0PRESCRST` reader - Channel 0 Start Reset Prescaler"] +pub type Ch0prescrstR = crate::BitReader; +impl Ch0prescrstR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CH0PRESCRST_A { + pub const fn variant(&self) -> Ch0prescrst { match self.bits { - false => CH0PRESCRST_A::NORESETPRESC, - true => CH0PRESCRST_A::RESETPRESC, + false => Ch0prescrst::Noresetpresc, + true => Ch0prescrst::Resetpresc, } } - #[doc = "Checks if the value of the field is `NORESETPRESC`"] + #[doc = "Prescaler not reset on channel 0 start"] #[inline(always)] pub fn is_noresetpresc(&self) -> bool { - *self == CH0PRESCRST_A::NORESETPRESC + *self == Ch0prescrst::Noresetpresc } - #[doc = "Checks if the value of the field is `RESETPRESC`"] + #[doc = "Prescaler reset on channel 0 start"] #[inline(always)] pub fn is_resetpresc(&self) -> bool { - *self == CH0PRESCRST_A::RESETPRESC + *self == Ch0prescrst::Resetpresc } } #[doc = "Field `CH0PRESCRST` writer - Channel 0 Start Reset Prescaler"] -pub type CH0PRESCRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, CH0PRESCRST_A, O>; -impl<'a, const O: u8> CH0PRESCRST_W<'a, O> { +pub type Ch0prescrstW<'a, REG> = crate::BitWriter<'a, REG, Ch0prescrst>; +impl<'a, REG> Ch0prescrstW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Prescaler not reset on channel 0 start"] #[inline(always)] - pub fn noresetpresc(self) -> &'a mut W { - self.variant(CH0PRESCRST_A::NORESETPRESC) + pub fn noresetpresc(self) -> &'a mut crate::W { + self.variant(Ch0prescrst::Noresetpresc) } #[doc = "Prescaler reset on channel 0 start"] #[inline(always)] - pub fn resetpresc(self) -> &'a mut W { - self.variant(CH0PRESCRST_A::RESETPRESC) + pub fn resetpresc(self) -> &'a mut crate::W { + self.variant(Ch0prescrst::Resetpresc) } } -#[doc = "Field `REFRSEL` reader - Reference Selection"] -pub type REFRSEL_R = crate::FieldReader; #[doc = "Reference Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REFRSEL_A { +pub enum Refrsel { #[doc = "0: Internal 1.25 V bandgap reference"] V125 = 0, #[doc = "1: Internal 2.5 V bandgap reference"] V25 = 1, #[doc = "2: AVDD reference"] - VDD = 2, + Vdd = 2, #[doc = "3: External pin reference"] - EXT = 3, + Ext = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REFRSEL_A) -> Self { + fn from(variant: Refrsel) -> Self { variant as _ } } -impl REFRSEL_R { +impl crate::FieldSpec for Refrsel { + type Ux = u8; +} +impl crate::IsEnum for Refrsel {} +#[doc = "Field `REFRSEL` reader - Reference Selection"] +pub type RefrselR = crate::FieldReader; +impl RefrselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REFRSEL_A { + pub const fn variant(&self) -> Refrsel { match self.bits { - 0 => REFRSEL_A::V125, - 1 => REFRSEL_A::V25, - 2 => REFRSEL_A::VDD, - 3 => REFRSEL_A::EXT, + 0 => Refrsel::V125, + 1 => Refrsel::V25, + 2 => Refrsel::Vdd, + 3 => Refrsel::Ext, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `V125`"] + #[doc = "Internal 1.25 V bandgap reference"] #[inline(always)] pub fn is_v125(&self) -> bool { - *self == REFRSEL_A::V125 + *self == Refrsel::V125 } - #[doc = "Checks if the value of the field is `V25`"] + #[doc = "Internal 2.5 V bandgap reference"] #[inline(always)] pub fn is_v25(&self) -> bool { - *self == REFRSEL_A::V25 + *self == Refrsel::V25 } - #[doc = "Checks if the value of the field is `VDD`"] + #[doc = "AVDD reference"] #[inline(always)] pub fn is_vdd(&self) -> bool { - *self == REFRSEL_A::VDD + *self == Refrsel::Vdd } - #[doc = "Checks if the value of the field is `EXT`"] + #[doc = "External pin reference"] #[inline(always)] pub fn is_ext(&self) -> bool { - *self == REFRSEL_A::EXT + *self == Refrsel::Ext } } #[doc = "Field `REFRSEL` writer - Reference Selection"] -pub type REFRSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, REFRSEL_A, 2, O>; -impl<'a, const O: u8> REFRSEL_W<'a, O> { +pub type RefrselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Refrsel, crate::Safe>; +impl<'a, REG> RefrselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Internal 1.25 V bandgap reference"] #[inline(always)] - pub fn v125(self) -> &'a mut W { - self.variant(REFRSEL_A::V125) + pub fn v125(self) -> &'a mut crate::W { + self.variant(Refrsel::V125) } #[doc = "Internal 2.5 V bandgap reference"] #[inline(always)] - pub fn v25(self) -> &'a mut W { - self.variant(REFRSEL_A::V25) + pub fn v25(self) -> &'a mut crate::W { + self.variant(Refrsel::V25) } #[doc = "AVDD reference"] #[inline(always)] - pub fn vdd(self) -> &'a mut W { - self.variant(REFRSEL_A::VDD) + pub fn vdd(self) -> &'a mut crate::W { + self.variant(Refrsel::Vdd) } #[doc = "External pin reference"] #[inline(always)] - pub fn ext(self) -> &'a mut W { - self.variant(REFRSEL_A::EXT) + pub fn ext(self) -> &'a mut crate::W { + self.variant(Refrsel::Ext) } } #[doc = "Field `PRESC` reader - Prescaler Setting for DAC clock"] -pub type PRESC_R = crate::FieldReader; +pub type PrescR = crate::FieldReader; #[doc = "Field `PRESC` writer - Prescaler Setting for DAC clock"] -pub type PRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, u8, 7, O>; -#[doc = "Field `TIMEROVRFLOWPERIOD` reader - Internal Timer Overflow Period"] -pub type TIMEROVRFLOWPERIOD_R = crate::FieldReader; +pub type PrescW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Internal Timer Overflow Period\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TIMEROVRFLOWPERIOD_A { +pub enum Timerovrflowperiod { #[doc = "0: The Timer overflows every 2 Prescaled CLK_DAC cycles"] - CYCLES2 = 0, + Cycles2 = 0, #[doc = "1: The Timer overflows every 4 Prescaled CLK_DAC cycles"] - CYCLES4 = 1, + Cycles4 = 1, #[doc = "2: The Timer overflows every 8 Prescaled CLK_DAC cycles"] - CYCLES8 = 2, + Cycles8 = 2, #[doc = "3: The Timer overflows every 16 Prescaled CLK_DAC cycles"] - CYCLES16 = 3, + Cycles16 = 3, #[doc = "4: The Timer overflows every 32 Prescaled CLK_DAC cycles"] - CYCLES32 = 4, + Cycles32 = 4, #[doc = "5: The Timer overflows every 64 Prescaled CLK_DAC cycles"] - CYCLES64 = 5, + Cycles64 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TIMEROVRFLOWPERIOD_A) -> Self { + fn from(variant: Timerovrflowperiod) -> Self { variant as _ } } -impl TIMEROVRFLOWPERIOD_R { +impl crate::FieldSpec for Timerovrflowperiod { + type Ux = u8; +} +impl crate::IsEnum for Timerovrflowperiod {} +#[doc = "Field `TIMEROVRFLOWPERIOD` reader - Internal Timer Overflow Period"] +pub type TimerovrflowperiodR = crate::FieldReader; +impl TimerovrflowperiodR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TIMEROVRFLOWPERIOD_A::CYCLES2), - 1 => Some(TIMEROVRFLOWPERIOD_A::CYCLES4), - 2 => Some(TIMEROVRFLOWPERIOD_A::CYCLES8), - 3 => Some(TIMEROVRFLOWPERIOD_A::CYCLES16), - 4 => Some(TIMEROVRFLOWPERIOD_A::CYCLES32), - 5 => Some(TIMEROVRFLOWPERIOD_A::CYCLES64), + 0 => Some(Timerovrflowperiod::Cycles2), + 1 => Some(Timerovrflowperiod::Cycles4), + 2 => Some(Timerovrflowperiod::Cycles8), + 3 => Some(Timerovrflowperiod::Cycles16), + 4 => Some(Timerovrflowperiod::Cycles32), + 5 => Some(Timerovrflowperiod::Cycles64), _ => None, } } - #[doc = "Checks if the value of the field is `CYCLES2`"] + #[doc = "The Timer overflows every 2 Prescaled CLK_DAC cycles"] #[inline(always)] pub fn is_cycles2(&self) -> bool { - *self == TIMEROVRFLOWPERIOD_A::CYCLES2 + *self == Timerovrflowperiod::Cycles2 } - #[doc = "Checks if the value of the field is `CYCLES4`"] + #[doc = "The Timer overflows every 4 Prescaled CLK_DAC cycles"] #[inline(always)] pub fn is_cycles4(&self) -> bool { - *self == TIMEROVRFLOWPERIOD_A::CYCLES4 + *self == Timerovrflowperiod::Cycles4 } - #[doc = "Checks if the value of the field is `CYCLES8`"] + #[doc = "The Timer overflows every 8 Prescaled CLK_DAC cycles"] #[inline(always)] pub fn is_cycles8(&self) -> bool { - *self == TIMEROVRFLOWPERIOD_A::CYCLES8 + *self == Timerovrflowperiod::Cycles8 } - #[doc = "Checks if the value of the field is `CYCLES16`"] + #[doc = "The Timer overflows every 16 Prescaled CLK_DAC cycles"] #[inline(always)] pub fn is_cycles16(&self) -> bool { - *self == TIMEROVRFLOWPERIOD_A::CYCLES16 + *self == Timerovrflowperiod::Cycles16 } - #[doc = "Checks if the value of the field is `CYCLES32`"] + #[doc = "The Timer overflows every 32 Prescaled CLK_DAC cycles"] #[inline(always)] pub fn is_cycles32(&self) -> bool { - *self == TIMEROVRFLOWPERIOD_A::CYCLES32 + *self == Timerovrflowperiod::Cycles32 } - #[doc = "Checks if the value of the field is `CYCLES64`"] + #[doc = "The Timer overflows every 64 Prescaled CLK_DAC cycles"] #[inline(always)] pub fn is_cycles64(&self) -> bool { - *self == TIMEROVRFLOWPERIOD_A::CYCLES64 + *self == Timerovrflowperiod::Cycles64 } } #[doc = "Field `TIMEROVRFLOWPERIOD` writer - Internal Timer Overflow Period"] -pub type TIMEROVRFLOWPERIOD_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CFG_SPEC, u8, TIMEROVRFLOWPERIOD_A, 3, O>; -impl<'a, const O: u8> TIMEROVRFLOWPERIOD_W<'a, O> { +pub type TimerovrflowperiodW<'a, REG> = crate::FieldWriter<'a, REG, 3, Timerovrflowperiod>; +impl<'a, REG> TimerovrflowperiodW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "The Timer overflows every 2 Prescaled CLK_DAC cycles"] #[inline(always)] - pub fn cycles2(self) -> &'a mut W { - self.variant(TIMEROVRFLOWPERIOD_A::CYCLES2) + pub fn cycles2(self) -> &'a mut crate::W { + self.variant(Timerovrflowperiod::Cycles2) } #[doc = "The Timer overflows every 4 Prescaled CLK_DAC cycles"] #[inline(always)] - pub fn cycles4(self) -> &'a mut W { - self.variant(TIMEROVRFLOWPERIOD_A::CYCLES4) + pub fn cycles4(self) -> &'a mut crate::W { + self.variant(Timerovrflowperiod::Cycles4) } #[doc = "The Timer overflows every 8 Prescaled CLK_DAC cycles"] #[inline(always)] - pub fn cycles8(self) -> &'a mut W { - self.variant(TIMEROVRFLOWPERIOD_A::CYCLES8) + pub fn cycles8(self) -> &'a mut crate::W { + self.variant(Timerovrflowperiod::Cycles8) } #[doc = "The Timer overflows every 16 Prescaled CLK_DAC cycles"] #[inline(always)] - pub fn cycles16(self) -> &'a mut W { - self.variant(TIMEROVRFLOWPERIOD_A::CYCLES16) + pub fn cycles16(self) -> &'a mut crate::W { + self.variant(Timerovrflowperiod::Cycles16) } #[doc = "The Timer overflows every 32 Prescaled CLK_DAC cycles"] #[inline(always)] - pub fn cycles32(self) -> &'a mut W { - self.variant(TIMEROVRFLOWPERIOD_A::CYCLES32) + pub fn cycles32(self) -> &'a mut crate::W { + self.variant(Timerovrflowperiod::Cycles32) } #[doc = "The Timer overflows every 64 Prescaled CLK_DAC cycles"] #[inline(always)] - pub fn cycles64(self) -> &'a mut W { - self.variant(TIMEROVRFLOWPERIOD_A::CYCLES64) + pub fn cycles64(self) -> &'a mut crate::W { + self.variant(Timerovrflowperiod::Cycles64) } } -#[doc = "Field `REFRESHPERIOD` reader - Refresh Timer Overflow Period"] -pub type REFRESHPERIOD_R = crate::FieldReader; #[doc = "Refresh Timer Overflow Period\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REFRESHPERIOD_A { +pub enum Refreshperiod { #[doc = "0: All channels with enabled refresh are refreshed every 2 CLK_REFRESH cycles"] - CYCLES2 = 0, + Cycles2 = 0, #[doc = "1: All channels with enabled refresh are refreshed every 4 CLK_REFRESH cycles"] - CYCLES4 = 1, + Cycles4 = 1, #[doc = "2: All channels with enabled refresh are refreshed every 8 CLK_REFRESH cycles"] - CYCLES8 = 2, + Cycles8 = 2, #[doc = "3: All channels with enabled refresh are refreshed every 16 CLK_REFRESH cycles"] - CYCLES16 = 3, + Cycles16 = 3, #[doc = "4: All channels with enabled refresh are refreshed every 32 CLK_REFRESH cycles"] - CYCLES32 = 4, + Cycles32 = 4, #[doc = "5: All channels with enabled refresh are refreshed every 64 CLK_REFRESH cycles"] - CYCLES64 = 5, + Cycles64 = 5, #[doc = "6: All channels with enabled refresh are refreshed every 128 CLK_REFRESH cycles"] - CYCLES128 = 6, + Cycles128 = 6, #[doc = "7: All channels with enabled refresh are refreshed every 256 CLK_REFRESH cycles"] - CYCLES256 = 7, + Cycles256 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REFRESHPERIOD_A) -> Self { + fn from(variant: Refreshperiod) -> Self { variant as _ } } -impl REFRESHPERIOD_R { +impl crate::FieldSpec for Refreshperiod { + type Ux = u8; +} +impl crate::IsEnum for Refreshperiod {} +#[doc = "Field `REFRESHPERIOD` reader - Refresh Timer Overflow Period"] +pub type RefreshperiodR = crate::FieldReader; +impl RefreshperiodR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REFRESHPERIOD_A { + pub const fn variant(&self) -> Refreshperiod { match self.bits { - 0 => REFRESHPERIOD_A::CYCLES2, - 1 => REFRESHPERIOD_A::CYCLES4, - 2 => REFRESHPERIOD_A::CYCLES8, - 3 => REFRESHPERIOD_A::CYCLES16, - 4 => REFRESHPERIOD_A::CYCLES32, - 5 => REFRESHPERIOD_A::CYCLES64, - 6 => REFRESHPERIOD_A::CYCLES128, - 7 => REFRESHPERIOD_A::CYCLES256, + 0 => Refreshperiod::Cycles2, + 1 => Refreshperiod::Cycles4, + 2 => Refreshperiod::Cycles8, + 3 => Refreshperiod::Cycles16, + 4 => Refreshperiod::Cycles32, + 5 => Refreshperiod::Cycles64, + 6 => Refreshperiod::Cycles128, + 7 => Refreshperiod::Cycles256, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `CYCLES2`"] + #[doc = "All channels with enabled refresh are refreshed every 2 CLK_REFRESH cycles"] #[inline(always)] pub fn is_cycles2(&self) -> bool { - *self == REFRESHPERIOD_A::CYCLES2 + *self == Refreshperiod::Cycles2 } - #[doc = "Checks if the value of the field is `CYCLES4`"] + #[doc = "All channels with enabled refresh are refreshed every 4 CLK_REFRESH cycles"] #[inline(always)] pub fn is_cycles4(&self) -> bool { - *self == REFRESHPERIOD_A::CYCLES4 + *self == Refreshperiod::Cycles4 } - #[doc = "Checks if the value of the field is `CYCLES8`"] + #[doc = "All channels with enabled refresh are refreshed every 8 CLK_REFRESH cycles"] #[inline(always)] pub fn is_cycles8(&self) -> bool { - *self == REFRESHPERIOD_A::CYCLES8 + *self == Refreshperiod::Cycles8 } - #[doc = "Checks if the value of the field is `CYCLES16`"] + #[doc = "All channels with enabled refresh are refreshed every 16 CLK_REFRESH cycles"] #[inline(always)] pub fn is_cycles16(&self) -> bool { - *self == REFRESHPERIOD_A::CYCLES16 + *self == Refreshperiod::Cycles16 } - #[doc = "Checks if the value of the field is `CYCLES32`"] + #[doc = "All channels with enabled refresh are refreshed every 32 CLK_REFRESH cycles"] #[inline(always)] pub fn is_cycles32(&self) -> bool { - *self == REFRESHPERIOD_A::CYCLES32 + *self == Refreshperiod::Cycles32 } - #[doc = "Checks if the value of the field is `CYCLES64`"] + #[doc = "All channels with enabled refresh are refreshed every 64 CLK_REFRESH cycles"] #[inline(always)] pub fn is_cycles64(&self) -> bool { - *self == REFRESHPERIOD_A::CYCLES64 + *self == Refreshperiod::Cycles64 } - #[doc = "Checks if the value of the field is `CYCLES128`"] + #[doc = "All channels with enabled refresh are refreshed every 128 CLK_REFRESH cycles"] #[inline(always)] pub fn is_cycles128(&self) -> bool { - *self == REFRESHPERIOD_A::CYCLES128 + *self == Refreshperiod::Cycles128 } - #[doc = "Checks if the value of the field is `CYCLES256`"] + #[doc = "All channels with enabled refresh are refreshed every 256 CLK_REFRESH cycles"] #[inline(always)] pub fn is_cycles256(&self) -> bool { - *self == REFRESHPERIOD_A::CYCLES256 + *self == Refreshperiod::Cycles256 } } #[doc = "Field `REFRESHPERIOD` writer - Refresh Timer Overflow Period"] -pub type REFRESHPERIOD_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, REFRESHPERIOD_A, 3, O>; -impl<'a, const O: u8> REFRESHPERIOD_W<'a, O> { +pub type RefreshperiodW<'a, REG> = crate::FieldWriter<'a, REG, 3, Refreshperiod, crate::Safe>; +impl<'a, REG> RefreshperiodW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "All channels with enabled refresh are refreshed every 2 CLK_REFRESH cycles"] #[inline(always)] - pub fn cycles2(self) -> &'a mut W { - self.variant(REFRESHPERIOD_A::CYCLES2) + pub fn cycles2(self) -> &'a mut crate::W { + self.variant(Refreshperiod::Cycles2) } #[doc = "All channels with enabled refresh are refreshed every 4 CLK_REFRESH cycles"] #[inline(always)] - pub fn cycles4(self) -> &'a mut W { - self.variant(REFRESHPERIOD_A::CYCLES4) + pub fn cycles4(self) -> &'a mut crate::W { + self.variant(Refreshperiod::Cycles4) } #[doc = "All channels with enabled refresh are refreshed every 8 CLK_REFRESH cycles"] #[inline(always)] - pub fn cycles8(self) -> &'a mut W { - self.variant(REFRESHPERIOD_A::CYCLES8) + pub fn cycles8(self) -> &'a mut crate::W { + self.variant(Refreshperiod::Cycles8) } #[doc = "All channels with enabled refresh are refreshed every 16 CLK_REFRESH cycles"] #[inline(always)] - pub fn cycles16(self) -> &'a mut W { - self.variant(REFRESHPERIOD_A::CYCLES16) + pub fn cycles16(self) -> &'a mut crate::W { + self.variant(Refreshperiod::Cycles16) } #[doc = "All channels with enabled refresh are refreshed every 32 CLK_REFRESH cycles"] #[inline(always)] - pub fn cycles32(self) -> &'a mut W { - self.variant(REFRESHPERIOD_A::CYCLES32) + pub fn cycles32(self) -> &'a mut crate::W { + self.variant(Refreshperiod::Cycles32) } #[doc = "All channels with enabled refresh are refreshed every 64 CLK_REFRESH cycles"] #[inline(always)] - pub fn cycles64(self) -> &'a mut W { - self.variant(REFRESHPERIOD_A::CYCLES64) + pub fn cycles64(self) -> &'a mut crate::W { + self.variant(Refreshperiod::Cycles64) } #[doc = "All channels with enabled refresh are refreshed every 128 CLK_REFRESH cycles"] #[inline(always)] - pub fn cycles128(self) -> &'a mut W { - self.variant(REFRESHPERIOD_A::CYCLES128) + pub fn cycles128(self) -> &'a mut crate::W { + self.variant(Refreshperiod::Cycles128) } #[doc = "All channels with enabled refresh are refreshed every 256 CLK_REFRESH cycles"] #[inline(always)] - pub fn cycles256(self) -> &'a mut W { - self.variant(REFRESHPERIOD_A::CYCLES256) + pub fn cycles256(self) -> &'a mut crate::W { + self.variant(Refreshperiod::Cycles256) } } #[doc = "Field `BIASKEEPWARM` reader - Bias Keepwarm Mode Enable"] -pub type BIASKEEPWARM_R = crate::BitReader; +pub type BiaskeepwarmR = crate::BitReader; #[doc = "Field `BIASKEEPWARM` writer - Bias Keepwarm Mode Enable"] -pub type BIASKEEPWARM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type BiaskeepwarmW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DMAWU` reader - VDAC DMA Wakeup"] -pub type DMAWU_R = crate::BitReader; +pub type DmawuR = crate::BitReader; #[doc = "Field `DMAWU` writer - VDAC DMA Wakeup"] -pub type DMAWU_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type DmawuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ONDEMANDCLK` reader - Always allow clk_dac"] -pub type ONDEMANDCLK_R = crate::BitReader; +pub type OndemandclkR = crate::BitReader; #[doc = "Field `ONDEMANDCLK` writer - Always allow clk_dac"] -pub type ONDEMANDCLK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `DBGHALT` reader - Debug Halt"] -pub type DBGHALT_R = crate::BitReader; +pub type OndemandclkW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Debug Halt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DBGHALT_A { +pub enum Dbghalt { #[doc = "0: Continue operation as normal during debug mode"] - NORMAL = 0, + Normal = 0, #[doc = "1: Complete the current conversion and then halt during debug mode"] - HALT = 1, + Halt = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DBGHALT_A) -> Self { + fn from(variant: Dbghalt) -> Self { variant as u8 != 0 } } -impl DBGHALT_R { +#[doc = "Field `DBGHALT` reader - Debug Halt"] +pub type DbghaltR = crate::BitReader; +impl DbghaltR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DBGHALT_A { + pub const fn variant(&self) -> Dbghalt { match self.bits { - false => DBGHALT_A::NORMAL, - true => DBGHALT_A::HALT, + false => Dbghalt::Normal, + true => Dbghalt::Halt, } } - #[doc = "Checks if the value of the field is `NORMAL`"] + #[doc = "Continue operation as normal during debug mode"] #[inline(always)] pub fn is_normal(&self) -> bool { - *self == DBGHALT_A::NORMAL + *self == Dbghalt::Normal } - #[doc = "Checks if the value of the field is `HALT`"] + #[doc = "Complete the current conversion and then halt during debug mode"] #[inline(always)] pub fn is_halt(&self) -> bool { - *self == DBGHALT_A::HALT + *self == Dbghalt::Halt } } #[doc = "Field `DBGHALT` writer - Debug Halt"] -pub type DBGHALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DBGHALT_A, O>; -impl<'a, const O: u8> DBGHALT_W<'a, O> { +pub type DbghaltW<'a, REG> = crate::BitWriter<'a, REG, Dbghalt>; +impl<'a, REG> DbghaltW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Continue operation as normal during debug mode"] #[inline(always)] - pub fn normal(self) -> &'a mut W { - self.variant(DBGHALT_A::NORMAL) + pub fn normal(self) -> &'a mut crate::W { + self.variant(Dbghalt::Normal) } #[doc = "Complete the current conversion and then halt during debug mode"] #[inline(always)] - pub fn halt(self) -> &'a mut W { - self.variant(DBGHALT_A::HALT) + pub fn halt(self) -> &'a mut crate::W { + self.variant(Dbghalt::Halt) } } #[doc = "Field `WARMUPTIME` reader - DAC Warmup Time"] -pub type WARMUPTIME_R = crate::FieldReader; +pub type WarmuptimeR = crate::FieldReader; #[doc = "Field `WARMUPTIME` writer - DAC Warmup Time"] -pub type WARMUPTIME_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, u8, 3, O>; +pub type WarmuptimeW<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bit 0 - Differential Mode"] #[inline(always)] - pub fn diff(&self) -> DIFF_R { - DIFF_R::new((self.bits & 1) != 0) + pub fn diff(&self) -> DiffR { + DiffR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Sine Mode"] #[inline(always)] - pub fn sinemode(&self) -> SINEMODE_R { - SINEMODE_R::new(((self.bits >> 1) & 1) != 0) + pub fn sinemode(&self) -> SinemodeR { + SinemodeR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Sine Wave Reset When inactive"] #[inline(always)] - pub fn sinereset(&self) -> SINERESET_R { - SINERESET_R::new(((self.bits >> 2) & 1) != 0) + pub fn sinereset(&self) -> SineresetR { + SineresetR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Channel 0 Start Reset Prescaler"] #[inline(always)] - pub fn ch0prescrst(&self) -> CH0PRESCRST_R { - CH0PRESCRST_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch0prescrst(&self) -> Ch0prescrstR { + Ch0prescrstR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:5 - Reference Selection"] #[inline(always)] - pub fn refrsel(&self) -> REFRSEL_R { - REFRSEL_R::new(((self.bits >> 4) & 3) as u8) + pub fn refrsel(&self) -> RefrselR { + RefrselR::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 7:13 - Prescaler Setting for DAC clock"] #[inline(always)] - pub fn presc(&self) -> PRESC_R { - PRESC_R::new(((self.bits >> 7) & 0x7f) as u8) + pub fn presc(&self) -> PrescR { + PrescR::new(((self.bits >> 7) & 0x7f) as u8) } #[doc = "Bits 16:18 - Internal Timer Overflow Period"] #[inline(always)] - pub fn timerovrflowperiod(&self) -> TIMEROVRFLOWPERIOD_R { - TIMEROVRFLOWPERIOD_R::new(((self.bits >> 16) & 7) as u8) + pub fn timerovrflowperiod(&self) -> TimerovrflowperiodR { + TimerovrflowperiodR::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Refresh Timer Overflow Period"] #[inline(always)] - pub fn refreshperiod(&self) -> REFRESHPERIOD_R { - REFRESHPERIOD_R::new(((self.bits >> 20) & 7) as u8) + pub fn refreshperiod(&self) -> RefreshperiodR { + RefreshperiodR::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bit 24 - Bias Keepwarm Mode Enable"] #[inline(always)] - pub fn biaskeepwarm(&self) -> BIASKEEPWARM_R { - BIASKEEPWARM_R::new(((self.bits >> 24) & 1) != 0) + pub fn biaskeepwarm(&self) -> BiaskeepwarmR { + BiaskeepwarmR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - VDAC DMA Wakeup"] #[inline(always)] - pub fn dmawu(&self) -> DMAWU_R { - DMAWU_R::new(((self.bits >> 25) & 1) != 0) + pub fn dmawu(&self) -> DmawuR { + DmawuR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Always allow clk_dac"] #[inline(always)] - pub fn ondemandclk(&self) -> ONDEMANDCLK_R { - ONDEMANDCLK_R::new(((self.bits >> 26) & 1) != 0) + pub fn ondemandclk(&self) -> OndemandclkR { + OndemandclkR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - Debug Halt"] #[inline(always)] - pub fn dbghalt(&self) -> DBGHALT_R { - DBGHALT_R::new(((self.bits >> 27) & 1) != 0) + pub fn dbghalt(&self) -> DbghaltR { + DbghaltR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bits 28:30 - DAC Warmup Time"] #[inline(always)] - pub fn warmuptime(&self) -> WARMUPTIME_R { - WARMUPTIME_R::new(((self.bits >> 28) & 7) as u8) + pub fn warmuptime(&self) -> WarmuptimeR { + WarmuptimeR::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bit 0 - Differential Mode"] #[inline(always)] #[must_use] - pub fn diff(&mut self) -> DIFF_W<0> { - DIFF_W::new(self) + pub fn diff(&mut self) -> DiffW { + DiffW::new(self, 0) } #[doc = "Bit 1 - Sine Mode"] #[inline(always)] #[must_use] - pub fn sinemode(&mut self) -> SINEMODE_W<1> { - SINEMODE_W::new(self) + pub fn sinemode(&mut self) -> SinemodeW { + SinemodeW::new(self, 1) } #[doc = "Bit 2 - Sine Wave Reset When inactive"] #[inline(always)] #[must_use] - pub fn sinereset(&mut self) -> SINERESET_W<2> { - SINERESET_W::new(self) + pub fn sinereset(&mut self) -> SineresetW { + SineresetW::new(self, 2) } #[doc = "Bit 3 - Channel 0 Start Reset Prescaler"] #[inline(always)] #[must_use] - pub fn ch0prescrst(&mut self) -> CH0PRESCRST_W<3> { - CH0PRESCRST_W::new(self) + pub fn ch0prescrst(&mut self) -> Ch0prescrstW { + Ch0prescrstW::new(self, 3) } #[doc = "Bits 4:5 - Reference Selection"] #[inline(always)] #[must_use] - pub fn refrsel(&mut self) -> REFRSEL_W<4> { - REFRSEL_W::new(self) + pub fn refrsel(&mut self) -> RefrselW { + RefrselW::new(self, 4) } #[doc = "Bits 7:13 - Prescaler Setting for DAC clock"] #[inline(always)] #[must_use] - pub fn presc(&mut self) -> PRESC_W<7> { - PRESC_W::new(self) + pub fn presc(&mut self) -> PrescW { + PrescW::new(self, 7) } #[doc = "Bits 16:18 - Internal Timer Overflow Period"] #[inline(always)] #[must_use] - pub fn timerovrflowperiod(&mut self) -> TIMEROVRFLOWPERIOD_W<16> { - TIMEROVRFLOWPERIOD_W::new(self) + pub fn timerovrflowperiod(&mut self) -> TimerovrflowperiodW { + TimerovrflowperiodW::new(self, 16) } #[doc = "Bits 20:22 - Refresh Timer Overflow Period"] #[inline(always)] #[must_use] - pub fn refreshperiod(&mut self) -> REFRESHPERIOD_W<20> { - REFRESHPERIOD_W::new(self) + pub fn refreshperiod(&mut self) -> RefreshperiodW { + RefreshperiodW::new(self, 20) } #[doc = "Bit 24 - Bias Keepwarm Mode Enable"] #[inline(always)] #[must_use] - pub fn biaskeepwarm(&mut self) -> BIASKEEPWARM_W<24> { - BIASKEEPWARM_W::new(self) + pub fn biaskeepwarm(&mut self) -> BiaskeepwarmW { + BiaskeepwarmW::new(self, 24) } #[doc = "Bit 25 - VDAC DMA Wakeup"] #[inline(always)] #[must_use] - pub fn dmawu(&mut self) -> DMAWU_W<25> { - DMAWU_W::new(self) + pub fn dmawu(&mut self) -> DmawuW { + DmawuW::new(self, 25) } #[doc = "Bit 26 - Always allow clk_dac"] #[inline(always)] #[must_use] - pub fn ondemandclk(&mut self) -> ONDEMANDCLK_W<26> { - ONDEMANDCLK_W::new(self) + pub fn ondemandclk(&mut self) -> OndemandclkW { + OndemandclkW::new(self, 26) } #[doc = "Bit 27 - Debug Halt"] #[inline(always)] #[must_use] - pub fn dbghalt(&mut self) -> DBGHALT_W<27> { - DBGHALT_W::new(self) + pub fn dbghalt(&mut self) -> DbghaltW { + DbghaltW::new(self, 27) } #[doc = "Bits 28:30 - DAC Warmup Time"] #[inline(always)] #[must_use] - pub fn warmuptime(&mut self) -> WARMUPTIME_W<28> { - WARMUPTIME_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn warmuptime(&mut self) -> WarmuptimeW { + WarmuptimeW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0x2000_0000"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x2000_0000; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0x2000_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/ch0cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/ch0cfg.rs index 7c36a66..94cf159 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/ch0cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/ch0cfg.rs @@ -1,438 +1,418 @@ #[doc = "Register `CH0CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH0CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CONVMODE` reader - Channel 0 Conversion Mode"] -pub type CONVMODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Channel 0 Conversion Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CONVMODE_A { +pub enum Convmode { #[doc = "0: DAC channel 0 is set in continuous mode"] - CONTINUOUS = 0, + Continuous = 0, #[doc = "1: DAC channel 0 is set in sample/shut off mode"] - SAMPLEOFF = 1, + Sampleoff = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CONVMODE_A) -> Self { + fn from(variant: Convmode) -> Self { variant as u8 != 0 } } -impl CONVMODE_R { +#[doc = "Field `CONVMODE` reader - Channel 0 Conversion Mode"] +pub type ConvmodeR = crate::BitReader; +impl ConvmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CONVMODE_A { + pub const fn variant(&self) -> Convmode { match self.bits { - false => CONVMODE_A::CONTINUOUS, - true => CONVMODE_A::SAMPLEOFF, + false => Convmode::Continuous, + true => Convmode::Sampleoff, } } - #[doc = "Checks if the value of the field is `CONTINUOUS`"] + #[doc = "DAC channel 0 is set in continuous mode"] #[inline(always)] pub fn is_continuous(&self) -> bool { - *self == CONVMODE_A::CONTINUOUS + *self == Convmode::Continuous } - #[doc = "Checks if the value of the field is `SAMPLEOFF`"] + #[doc = "DAC channel 0 is set in sample/shut off mode"] #[inline(always)] pub fn is_sampleoff(&self) -> bool { - *self == CONVMODE_A::SAMPLEOFF + *self == Convmode::Sampleoff } } #[doc = "Field `CONVMODE` writer - Channel 0 Conversion Mode"] -pub type CONVMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH0CFG_SPEC, CONVMODE_A, O>; -impl<'a, const O: u8> CONVMODE_W<'a, O> { +pub type ConvmodeW<'a, REG> = crate::BitWriter<'a, REG, Convmode>; +impl<'a, REG> ConvmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "DAC channel 0 is set in continuous mode"] #[inline(always)] - pub fn continuous(self) -> &'a mut W { - self.variant(CONVMODE_A::CONTINUOUS) + pub fn continuous(self) -> &'a mut crate::W { + self.variant(Convmode::Continuous) } #[doc = "DAC channel 0 is set in sample/shut off mode"] #[inline(always)] - pub fn sampleoff(self) -> &'a mut W { - self.variant(CONVMODE_A::SAMPLEOFF) + pub fn sampleoff(self) -> &'a mut crate::W { + self.variant(Convmode::Sampleoff) } } -#[doc = "Field `POWERMODE` reader - Channel 0 Power Mode"] -pub type POWERMODE_R = crate::BitReader; #[doc = "Channel 0 Power Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum POWERMODE_A { +pub enum Powermode { #[doc = "0: Default is High Power Mode"] - HIGHPOWER = 0, + Highpower = 0, #[doc = "1: Set this bit for Low Power Mode"] - LOWPOWER = 1, + Lowpower = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: POWERMODE_A) -> Self { + fn from(variant: Powermode) -> Self { variant as u8 != 0 } } -impl POWERMODE_R { +#[doc = "Field `POWERMODE` reader - Channel 0 Power Mode"] +pub type PowermodeR = crate::BitReader; +impl PowermodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> POWERMODE_A { + pub const fn variant(&self) -> Powermode { match self.bits { - false => POWERMODE_A::HIGHPOWER, - true => POWERMODE_A::LOWPOWER, + false => Powermode::Highpower, + true => Powermode::Lowpower, } } - #[doc = "Checks if the value of the field is `HIGHPOWER`"] + #[doc = "Default is High Power Mode"] #[inline(always)] pub fn is_highpower(&self) -> bool { - *self == POWERMODE_A::HIGHPOWER + *self == Powermode::Highpower } - #[doc = "Checks if the value of the field is `LOWPOWER`"] + #[doc = "Set this bit for Low Power Mode"] #[inline(always)] pub fn is_lowpower(&self) -> bool { - *self == POWERMODE_A::LOWPOWER + *self == Powermode::Lowpower } } #[doc = "Field `POWERMODE` writer - Channel 0 Power Mode"] -pub type POWERMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH0CFG_SPEC, POWERMODE_A, O>; -impl<'a, const O: u8> POWERMODE_W<'a, O> { +pub type PowermodeW<'a, REG> = crate::BitWriter<'a, REG, Powermode>; +impl<'a, REG> PowermodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Default is High Power Mode"] #[inline(always)] - pub fn highpower(self) -> &'a mut W { - self.variant(POWERMODE_A::HIGHPOWER) + pub fn highpower(self) -> &'a mut crate::W { + self.variant(Powermode::Highpower) } #[doc = "Set this bit for Low Power Mode"] #[inline(always)] - pub fn lowpower(self) -> &'a mut W { - self.variant(POWERMODE_A::LOWPOWER) + pub fn lowpower(self) -> &'a mut crate::W { + self.variant(Powermode::Lowpower) } } -#[doc = "Field `TRIGMODE` reader - Channel 0 Trigger Mode"] -pub type TRIGMODE_R = crate::FieldReader; #[doc = "Channel 0 Trigger Mode\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TRIGMODE_A { +pub enum Trigmode { #[doc = "0: No Conversion Trigger Source Selected for Channel 0"] - NONE = 0, + None = 0, #[doc = "1: Channel 0 is triggered by Channel 0 FIFO (CH0F) write"] - SW = 1, + Sw = 1, #[doc = "2: Channel 0 is triggered by Sync PRS input. PRS Trigger should have the same clock group as VDAC."] - SYNCPRS = 2, + Syncprs = 2, #[doc = "3: Channel 0 is triggered by LESENSE"] - LESENSE = 3, + Lesense = 3, #[doc = "4: Channel 0 is triggered by Internal Timer Overflow"] - INTERNALTIMER = 4, + Internaltimer = 4, #[doc = "5: Channel 0 is triggered by Async PRS input"] - ASYNCPRS = 5, + Asyncprs = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TRIGMODE_A) -> Self { + fn from(variant: Trigmode) -> Self { variant as _ } } -impl TRIGMODE_R { +impl crate::FieldSpec for Trigmode { + type Ux = u8; +} +impl crate::IsEnum for Trigmode {} +#[doc = "Field `TRIGMODE` reader - Channel 0 Trigger Mode"] +pub type TrigmodeR = crate::FieldReader; +impl TrigmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TRIGMODE_A::NONE), - 1 => Some(TRIGMODE_A::SW), - 2 => Some(TRIGMODE_A::SYNCPRS), - 3 => Some(TRIGMODE_A::LESENSE), - 4 => Some(TRIGMODE_A::INTERNALTIMER), - 5 => Some(TRIGMODE_A::ASYNCPRS), + 0 => Some(Trigmode::None), + 1 => Some(Trigmode::Sw), + 2 => Some(Trigmode::Syncprs), + 3 => Some(Trigmode::Lesense), + 4 => Some(Trigmode::Internaltimer), + 5 => Some(Trigmode::Asyncprs), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No Conversion Trigger Source Selected for Channel 0"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == TRIGMODE_A::NONE + *self == Trigmode::None } - #[doc = "Checks if the value of the field is `SW`"] + #[doc = "Channel 0 is triggered by Channel 0 FIFO (CH0F) write"] #[inline(always)] pub fn is_sw(&self) -> bool { - *self == TRIGMODE_A::SW + *self == Trigmode::Sw } - #[doc = "Checks if the value of the field is `SYNCPRS`"] + #[doc = "Channel 0 is triggered by Sync PRS input. PRS Trigger should have the same clock group as VDAC."] #[inline(always)] pub fn is_syncprs(&self) -> bool { - *self == TRIGMODE_A::SYNCPRS + *self == Trigmode::Syncprs } - #[doc = "Checks if the value of the field is `LESENSE`"] + #[doc = "Channel 0 is triggered by LESENSE"] #[inline(always)] pub fn is_lesense(&self) -> bool { - *self == TRIGMODE_A::LESENSE + *self == Trigmode::Lesense } - #[doc = "Checks if the value of the field is `INTERNALTIMER`"] + #[doc = "Channel 0 is triggered by Internal Timer Overflow"] #[inline(always)] pub fn is_internaltimer(&self) -> bool { - *self == TRIGMODE_A::INTERNALTIMER + *self == Trigmode::Internaltimer } - #[doc = "Checks if the value of the field is `ASYNCPRS`"] + #[doc = "Channel 0 is triggered by Async PRS input"] #[inline(always)] pub fn is_asyncprs(&self) -> bool { - *self == TRIGMODE_A::ASYNCPRS + *self == Trigmode::Asyncprs } } #[doc = "Field `TRIGMODE` writer - Channel 0 Trigger Mode"] -pub type TRIGMODE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH0CFG_SPEC, u8, TRIGMODE_A, 3, O>; -impl<'a, const O: u8> TRIGMODE_W<'a, O> { +pub type TrigmodeW<'a, REG> = crate::FieldWriter<'a, REG, 3, Trigmode>; +impl<'a, REG> TrigmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No Conversion Trigger Source Selected for Channel 0"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(TRIGMODE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Trigmode::None) } #[doc = "Channel 0 is triggered by Channel 0 FIFO (CH0F) write"] #[inline(always)] - pub fn sw(self) -> &'a mut W { - self.variant(TRIGMODE_A::SW) + pub fn sw(self) -> &'a mut crate::W { + self.variant(Trigmode::Sw) } #[doc = "Channel 0 is triggered by Sync PRS input. PRS Trigger should have the same clock group as VDAC."] #[inline(always)] - pub fn syncprs(self) -> &'a mut W { - self.variant(TRIGMODE_A::SYNCPRS) + pub fn syncprs(self) -> &'a mut crate::W { + self.variant(Trigmode::Syncprs) } #[doc = "Channel 0 is triggered by LESENSE"] #[inline(always)] - pub fn lesense(self) -> &'a mut W { - self.variant(TRIGMODE_A::LESENSE) + pub fn lesense(self) -> &'a mut crate::W { + self.variant(Trigmode::Lesense) } #[doc = "Channel 0 is triggered by Internal Timer Overflow"] #[inline(always)] - pub fn internaltimer(self) -> &'a mut W { - self.variant(TRIGMODE_A::INTERNALTIMER) + pub fn internaltimer(self) -> &'a mut crate::W { + self.variant(Trigmode::Internaltimer) } #[doc = "Channel 0 is triggered by Async PRS input"] #[inline(always)] - pub fn asyncprs(self) -> &'a mut W { - self.variant(TRIGMODE_A::ASYNCPRS) + pub fn asyncprs(self) -> &'a mut crate::W { + self.variant(Trigmode::Asyncprs) } } -#[doc = "Field `REFRESHSOURCE` reader - Channel 0 Refresh Source"] -pub type REFRESHSOURCE_R = crate::FieldReader; #[doc = "Channel 0 Refresh Source\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REFRESHSOURCE_A { +pub enum Refreshsource { #[doc = "0: No Refresh Source Selected for Channel 0."] - NONE = 0, + None = 0, #[doc = "1: Channel 0 Refresh triggered by Refresh Timer Overflow"] - REFRESHTIMER = 1, + Refreshtimer = 1, #[doc = "2: Channel 0 Refresh triggered by Sync PRS. PRS Trigger should have the same clock group as VDAC."] - SYNCPRS = 2, + Syncprs = 2, #[doc = "3: Channel 0 Refresh triggered by Async PRS"] - ASYNCPRS = 3, + Asyncprs = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REFRESHSOURCE_A) -> Self { + fn from(variant: Refreshsource) -> Self { variant as _ } } -impl REFRESHSOURCE_R { +impl crate::FieldSpec for Refreshsource { + type Ux = u8; +} +impl crate::IsEnum for Refreshsource {} +#[doc = "Field `REFRESHSOURCE` reader - Channel 0 Refresh Source"] +pub type RefreshsourceR = crate::FieldReader; +impl RefreshsourceR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REFRESHSOURCE_A { + pub const fn variant(&self) -> Refreshsource { match self.bits { - 0 => REFRESHSOURCE_A::NONE, - 1 => REFRESHSOURCE_A::REFRESHTIMER, - 2 => REFRESHSOURCE_A::SYNCPRS, - 3 => REFRESHSOURCE_A::ASYNCPRS, + 0 => Refreshsource::None, + 1 => Refreshsource::Refreshtimer, + 2 => Refreshsource::Syncprs, + 3 => Refreshsource::Asyncprs, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No Refresh Source Selected for Channel 0."] #[inline(always)] pub fn is_none(&self) -> bool { - *self == REFRESHSOURCE_A::NONE + *self == Refreshsource::None } - #[doc = "Checks if the value of the field is `REFRESHTIMER`"] + #[doc = "Channel 0 Refresh triggered by Refresh Timer Overflow"] #[inline(always)] pub fn is_refreshtimer(&self) -> bool { - *self == REFRESHSOURCE_A::REFRESHTIMER + *self == Refreshsource::Refreshtimer } - #[doc = "Checks if the value of the field is `SYNCPRS`"] + #[doc = "Channel 0 Refresh triggered by Sync PRS. PRS Trigger should have the same clock group as VDAC."] #[inline(always)] pub fn is_syncprs(&self) -> bool { - *self == REFRESHSOURCE_A::SYNCPRS + *self == Refreshsource::Syncprs } - #[doc = "Checks if the value of the field is `ASYNCPRS`"] + #[doc = "Channel 0 Refresh triggered by Async PRS"] #[inline(always)] pub fn is_asyncprs(&self) -> bool { - *self == REFRESHSOURCE_A::ASYNCPRS + *self == Refreshsource::Asyncprs } } #[doc = "Field `REFRESHSOURCE` writer - Channel 0 Refresh Source"] -pub type REFRESHSOURCE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH0CFG_SPEC, u8, REFRESHSOURCE_A, 2, O>; -impl<'a, const O: u8> REFRESHSOURCE_W<'a, O> { +pub type RefreshsourceW<'a, REG> = crate::FieldWriter<'a, REG, 2, Refreshsource, crate::Safe>; +impl<'a, REG> RefreshsourceW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No Refresh Source Selected for Channel 0."] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(REFRESHSOURCE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Refreshsource::None) } #[doc = "Channel 0 Refresh triggered by Refresh Timer Overflow"] #[inline(always)] - pub fn refreshtimer(self) -> &'a mut W { - self.variant(REFRESHSOURCE_A::REFRESHTIMER) + pub fn refreshtimer(self) -> &'a mut crate::W { + self.variant(Refreshsource::Refreshtimer) } #[doc = "Channel 0 Refresh triggered by Sync PRS. PRS Trigger should have the same clock group as VDAC."] #[inline(always)] - pub fn syncprs(self) -> &'a mut W { - self.variant(REFRESHSOURCE_A::SYNCPRS) + pub fn syncprs(self) -> &'a mut crate::W { + self.variant(Refreshsource::Syncprs) } #[doc = "Channel 0 Refresh triggered by Async PRS"] #[inline(always)] - pub fn asyncprs(self) -> &'a mut W { - self.variant(REFRESHSOURCE_A::ASYNCPRS) + pub fn asyncprs(self) -> &'a mut crate::W { + self.variant(Refreshsource::Asyncprs) } } #[doc = "Field `FIFODVL` reader - Channel 0 FIFO Low Watermark"] -pub type FIFODVL_R = crate::FieldReader; +pub type FifodvlR = crate::FieldReader; #[doc = "Field `FIFODVL` writer - Channel 0 FIFO Low Watermark"] -pub type FIFODVL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH0CFG_SPEC, u8, u8, 2, O>; +pub type FifodvlW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `HIGHCAPLOADEN` reader - Channel 0 High Cap Load Mode Enable"] -pub type HIGHCAPLOADEN_R = crate::BitReader; +pub type HighcaploadenR = crate::BitReader; #[doc = "Field `HIGHCAPLOADEN` writer - Channel 0 High Cap Load Mode Enable"] -pub type HIGHCAPLOADEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH0CFG_SPEC, bool, O>; +pub type HighcaploadenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `KEEPWARM` reader - Channel 0 Keepwarm Mode Enable"] -pub type KEEPWARM_R = crate::BitReader; +pub type KeepwarmR = crate::BitReader; #[doc = "Field `KEEPWARM` writer - Channel 0 Keepwarm Mode Enable"] -pub type KEEPWARM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH0CFG_SPEC, bool, O>; +pub type KeepwarmW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Channel 0 Conversion Mode"] #[inline(always)] - pub fn convmode(&self) -> CONVMODE_R { - CONVMODE_R::new((self.bits & 1) != 0) + pub fn convmode(&self) -> ConvmodeR { + ConvmodeR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - Channel 0 Power Mode"] #[inline(always)] - pub fn powermode(&self) -> POWERMODE_R { - POWERMODE_R::new(((self.bits >> 2) & 1) != 0) + pub fn powermode(&self) -> PowermodeR { + PowermodeR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 4:6 - Channel 0 Trigger Mode"] #[inline(always)] - pub fn trigmode(&self) -> TRIGMODE_R { - TRIGMODE_R::new(((self.bits >> 4) & 7) as u8) + pub fn trigmode(&self) -> TrigmodeR { + TrigmodeR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:9 - Channel 0 Refresh Source"] #[inline(always)] - pub fn refreshsource(&self) -> REFRESHSOURCE_R { - REFRESHSOURCE_R::new(((self.bits >> 8) & 3) as u8) + pub fn refreshsource(&self) -> RefreshsourceR { + RefreshsourceR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 11:12 - Channel 0 FIFO Low Watermark"] #[inline(always)] - pub fn fifodvl(&self) -> FIFODVL_R { - FIFODVL_R::new(((self.bits >> 11) & 3) as u8) + pub fn fifodvl(&self) -> FifodvlR { + FifodvlR::new(((self.bits >> 11) & 3) as u8) } #[doc = "Bit 14 - Channel 0 High Cap Load Mode Enable"] #[inline(always)] - pub fn highcaploaden(&self) -> HIGHCAPLOADEN_R { - HIGHCAPLOADEN_R::new(((self.bits >> 14) & 1) != 0) + pub fn highcaploaden(&self) -> HighcaploadenR { + HighcaploadenR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 16 - Channel 0 Keepwarm Mode Enable"] #[inline(always)] - pub fn keepwarm(&self) -> KEEPWARM_R { - KEEPWARM_R::new(((self.bits >> 16) & 1) != 0) + pub fn keepwarm(&self) -> KeepwarmR { + KeepwarmR::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bit 0 - Channel 0 Conversion Mode"] #[inline(always)] #[must_use] - pub fn convmode(&mut self) -> CONVMODE_W<0> { - CONVMODE_W::new(self) + pub fn convmode(&mut self) -> ConvmodeW { + ConvmodeW::new(self, 0) } #[doc = "Bit 2 - Channel 0 Power Mode"] #[inline(always)] #[must_use] - pub fn powermode(&mut self) -> POWERMODE_W<2> { - POWERMODE_W::new(self) + pub fn powermode(&mut self) -> PowermodeW { + PowermodeW::new(self, 2) } #[doc = "Bits 4:6 - Channel 0 Trigger Mode"] #[inline(always)] #[must_use] - pub fn trigmode(&mut self) -> TRIGMODE_W<4> { - TRIGMODE_W::new(self) + pub fn trigmode(&mut self) -> TrigmodeW { + TrigmodeW::new(self, 4) } #[doc = "Bits 8:9 - Channel 0 Refresh Source"] #[inline(always)] #[must_use] - pub fn refreshsource(&mut self) -> REFRESHSOURCE_W<8> { - REFRESHSOURCE_W::new(self) + pub fn refreshsource(&mut self) -> RefreshsourceW { + RefreshsourceW::new(self, 8) } #[doc = "Bits 11:12 - Channel 0 FIFO Low Watermark"] #[inline(always)] #[must_use] - pub fn fifodvl(&mut self) -> FIFODVL_W<11> { - FIFODVL_W::new(self) + pub fn fifodvl(&mut self) -> FifodvlW { + FifodvlW::new(self, 11) } #[doc = "Bit 14 - Channel 0 High Cap Load Mode Enable"] #[inline(always)] #[must_use] - pub fn highcaploaden(&mut self) -> HIGHCAPLOADEN_W<14> { - HIGHCAPLOADEN_W::new(self) + pub fn highcaploaden(&mut self) -> HighcaploadenW { + HighcaploadenW::new(self, 14) } #[doc = "Bit 16 - Channel 0 Keepwarm Mode Enable"] #[inline(always)] #[must_use] - pub fn keepwarm(&mut self) -> KEEPWARM_W<16> { - KEEPWARM_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn keepwarm(&mut self) -> KeepwarmW { + KeepwarmW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0cfg](index.html) module"] -pub struct CH0CFG_SPEC; -impl crate::RegisterSpec for CH0CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch0cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch0cfgSpec; +impl crate::RegisterSpec for Ch0cfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch0cfg::R](R) reader structure"] -impl crate::Readable for CH0CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch0cfg::W](W) writer structure"] -impl crate::Writable for CH0CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch0cfg::R`](R) reader structure"] +impl crate::Readable for Ch0cfgSpec {} +#[doc = "`write(|w| ..)` method takes [`ch0cfg::W`](W) writer structure"] +impl crate::Writable for Ch0cfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH0CFG to value 0x10"] -impl crate::Resettable for CH0CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x10; +impl crate::Resettable for Ch0cfgSpec { + const RESET_VALUE: u32 = 0x10; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/ch0f.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/ch0f.rs index 7cb921a..8387dd9 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/ch0f.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/ch0f.rs @@ -1,52 +1,27 @@ #[doc = "Register `CH0F` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DATA` writer - Channel 0 Data"] -pub type DATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH0F_SPEC, u16, u16, 12, O>; +pub type DataW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl W { #[doc = "Bits 0:11 - Channel 0 Data"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W<0> { - DATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn data(&mut self) -> DataW { + DataW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0f](index.html) module"] -pub struct CH0F_SPEC; -impl crate::RegisterSpec for CH0F_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0f::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch0fSpec; +impl crate::RegisterSpec for Ch0fSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [ch0f::W](W) writer structure"] -impl crate::Writable for CH0F_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`ch0f::W`](W) writer structure"] +impl crate::Writable for Ch0fSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH0F to value 0"] -impl crate::Resettable for CH0F_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch0fSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/ch1cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/ch1cfg.rs index 34c7bc4..1bd4cc3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/ch1cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/ch1cfg.rs @@ -1,425 +1,405 @@ #[doc = "Register `CH1CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CH1CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CONVMODE` reader - Channel 1 Conversion Mode"] -pub type CONVMODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Channel 1 Conversion Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CONVMODE_A { +pub enum Convmode { #[doc = "0: DAC channel 1 is set in continuous mode"] - CONTINUOUS = 0, + Continuous = 0, #[doc = "1: DAC channel 1 is set in sample/shut off mode"] - SAMPLEOFF = 1, + Sampleoff = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CONVMODE_A) -> Self { + fn from(variant: Convmode) -> Self { variant as u8 != 0 } } -impl CONVMODE_R { +#[doc = "Field `CONVMODE` reader - Channel 1 Conversion Mode"] +pub type ConvmodeR = crate::BitReader; +impl ConvmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CONVMODE_A { + pub const fn variant(&self) -> Convmode { match self.bits { - false => CONVMODE_A::CONTINUOUS, - true => CONVMODE_A::SAMPLEOFF, + false => Convmode::Continuous, + true => Convmode::Sampleoff, } } - #[doc = "Checks if the value of the field is `CONTINUOUS`"] + #[doc = "DAC channel 1 is set in continuous mode"] #[inline(always)] pub fn is_continuous(&self) -> bool { - *self == CONVMODE_A::CONTINUOUS + *self == Convmode::Continuous } - #[doc = "Checks if the value of the field is `SAMPLEOFF`"] + #[doc = "DAC channel 1 is set in sample/shut off mode"] #[inline(always)] pub fn is_sampleoff(&self) -> bool { - *self == CONVMODE_A::SAMPLEOFF + *self == Convmode::Sampleoff } } #[doc = "Field `CONVMODE` writer - Channel 1 Conversion Mode"] -pub type CONVMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH1CFG_SPEC, CONVMODE_A, O>; -impl<'a, const O: u8> CONVMODE_W<'a, O> { +pub type ConvmodeW<'a, REG> = crate::BitWriter<'a, REG, Convmode>; +impl<'a, REG> ConvmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "DAC channel 1 is set in continuous mode"] #[inline(always)] - pub fn continuous(self) -> &'a mut W { - self.variant(CONVMODE_A::CONTINUOUS) + pub fn continuous(self) -> &'a mut crate::W { + self.variant(Convmode::Continuous) } #[doc = "DAC channel 1 is set in sample/shut off mode"] #[inline(always)] - pub fn sampleoff(self) -> &'a mut W { - self.variant(CONVMODE_A::SAMPLEOFF) + pub fn sampleoff(self) -> &'a mut crate::W { + self.variant(Convmode::Sampleoff) } } -#[doc = "Field `POWERMODE` reader - Channel 1 Power Mode"] -pub type POWERMODE_R = crate::BitReader; #[doc = "Channel 1 Power Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum POWERMODE_A { +pub enum Powermode { #[doc = "0: Default is High Power Mode"] - HIGHPOWER = 0, + Highpower = 0, #[doc = "1: Set this bit for Low Power Mode"] - LOWPOWER = 1, + Lowpower = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: POWERMODE_A) -> Self { + fn from(variant: Powermode) -> Self { variant as u8 != 0 } } -impl POWERMODE_R { +#[doc = "Field `POWERMODE` reader - Channel 1 Power Mode"] +pub type PowermodeR = crate::BitReader; +impl PowermodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> POWERMODE_A { + pub const fn variant(&self) -> Powermode { match self.bits { - false => POWERMODE_A::HIGHPOWER, - true => POWERMODE_A::LOWPOWER, + false => Powermode::Highpower, + true => Powermode::Lowpower, } } - #[doc = "Checks if the value of the field is `HIGHPOWER`"] + #[doc = "Default is High Power Mode"] #[inline(always)] pub fn is_highpower(&self) -> bool { - *self == POWERMODE_A::HIGHPOWER + *self == Powermode::Highpower } - #[doc = "Checks if the value of the field is `LOWPOWER`"] + #[doc = "Set this bit for Low Power Mode"] #[inline(always)] pub fn is_lowpower(&self) -> bool { - *self == POWERMODE_A::LOWPOWER + *self == Powermode::Lowpower } } #[doc = "Field `POWERMODE` writer - Channel 1 Power Mode"] -pub type POWERMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH1CFG_SPEC, POWERMODE_A, O>; -impl<'a, const O: u8> POWERMODE_W<'a, O> { +pub type PowermodeW<'a, REG> = crate::BitWriter<'a, REG, Powermode>; +impl<'a, REG> PowermodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Default is High Power Mode"] #[inline(always)] - pub fn highpower(self) -> &'a mut W { - self.variant(POWERMODE_A::HIGHPOWER) + pub fn highpower(self) -> &'a mut crate::W { + self.variant(Powermode::Highpower) } #[doc = "Set this bit for Low Power Mode"] #[inline(always)] - pub fn lowpower(self) -> &'a mut W { - self.variant(POWERMODE_A::LOWPOWER) + pub fn lowpower(self) -> &'a mut crate::W { + self.variant(Powermode::Lowpower) } } -#[doc = "Field `TRIGMODE` reader - Channel 1 Trigger Mode"] -pub type TRIGMODE_R = crate::FieldReader; #[doc = "Channel 1 Trigger Mode\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TRIGMODE_A { +pub enum Trigmode { #[doc = "0: No Conversion Trigger Source Selected for Channel 1"] - NONE = 0, + None = 0, #[doc = "1: Channel 1 is triggered by Channel 1 FIFO (CH1F) write"] - SW = 1, + Sw = 1, #[doc = "2: Channel 1 is triggered by Sync PRS input.PRS Trigger should have the same clock group as VDAC."] - SYNCPRS = 2, + Syncprs = 2, #[doc = "4: Channel 1 is triggered by Internal Timer Overflow"] - INTERNALTIMER = 4, + Internaltimer = 4, #[doc = "5: Channel 1 is triggered by Async PRS input"] - ASYNCPRS = 5, + Asyncprs = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TRIGMODE_A) -> Self { + fn from(variant: Trigmode) -> Self { variant as _ } } -impl TRIGMODE_R { +impl crate::FieldSpec for Trigmode { + type Ux = u8; +} +impl crate::IsEnum for Trigmode {} +#[doc = "Field `TRIGMODE` reader - Channel 1 Trigger Mode"] +pub type TrigmodeR = crate::FieldReader; +impl TrigmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TRIGMODE_A::NONE), - 1 => Some(TRIGMODE_A::SW), - 2 => Some(TRIGMODE_A::SYNCPRS), - 4 => Some(TRIGMODE_A::INTERNALTIMER), - 5 => Some(TRIGMODE_A::ASYNCPRS), + 0 => Some(Trigmode::None), + 1 => Some(Trigmode::Sw), + 2 => Some(Trigmode::Syncprs), + 4 => Some(Trigmode::Internaltimer), + 5 => Some(Trigmode::Asyncprs), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No Conversion Trigger Source Selected for Channel 1"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == TRIGMODE_A::NONE + *self == Trigmode::None } - #[doc = "Checks if the value of the field is `SW`"] + #[doc = "Channel 1 is triggered by Channel 1 FIFO (CH1F) write"] #[inline(always)] pub fn is_sw(&self) -> bool { - *self == TRIGMODE_A::SW + *self == Trigmode::Sw } - #[doc = "Checks if the value of the field is `SYNCPRS`"] + #[doc = "Channel 1 is triggered by Sync PRS input.PRS Trigger should have the same clock group as VDAC."] #[inline(always)] pub fn is_syncprs(&self) -> bool { - *self == TRIGMODE_A::SYNCPRS + *self == Trigmode::Syncprs } - #[doc = "Checks if the value of the field is `INTERNALTIMER`"] + #[doc = "Channel 1 is triggered by Internal Timer Overflow"] #[inline(always)] pub fn is_internaltimer(&self) -> bool { - *self == TRIGMODE_A::INTERNALTIMER + *self == Trigmode::Internaltimer } - #[doc = "Checks if the value of the field is `ASYNCPRS`"] + #[doc = "Channel 1 is triggered by Async PRS input"] #[inline(always)] pub fn is_asyncprs(&self) -> bool { - *self == TRIGMODE_A::ASYNCPRS + *self == Trigmode::Asyncprs } } #[doc = "Field `TRIGMODE` writer - Channel 1 Trigger Mode"] -pub type TRIGMODE_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, CH1CFG_SPEC, u8, TRIGMODE_A, 3, O>; -impl<'a, const O: u8> TRIGMODE_W<'a, O> { +pub type TrigmodeW<'a, REG> = crate::FieldWriter<'a, REG, 3, Trigmode>; +impl<'a, REG> TrigmodeW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No Conversion Trigger Source Selected for Channel 1"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(TRIGMODE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Trigmode::None) } #[doc = "Channel 1 is triggered by Channel 1 FIFO (CH1F) write"] #[inline(always)] - pub fn sw(self) -> &'a mut W { - self.variant(TRIGMODE_A::SW) + pub fn sw(self) -> &'a mut crate::W { + self.variant(Trigmode::Sw) } #[doc = "Channel 1 is triggered by Sync PRS input.PRS Trigger should have the same clock group as VDAC."] #[inline(always)] - pub fn syncprs(self) -> &'a mut W { - self.variant(TRIGMODE_A::SYNCPRS) + pub fn syncprs(self) -> &'a mut crate::W { + self.variant(Trigmode::Syncprs) } #[doc = "Channel 1 is triggered by Internal Timer Overflow"] #[inline(always)] - pub fn internaltimer(self) -> &'a mut W { - self.variant(TRIGMODE_A::INTERNALTIMER) + pub fn internaltimer(self) -> &'a mut crate::W { + self.variant(Trigmode::Internaltimer) } #[doc = "Channel 1 is triggered by Async PRS input"] #[inline(always)] - pub fn asyncprs(self) -> &'a mut W { - self.variant(TRIGMODE_A::ASYNCPRS) + pub fn asyncprs(self) -> &'a mut crate::W { + self.variant(Trigmode::Asyncprs) } } -#[doc = "Field `REFRESHSOURCE` reader - Channel 1 Refresh Source"] -pub type REFRESHSOURCE_R = crate::FieldReader; #[doc = "Channel 1 Refresh Source\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REFRESHSOURCE_A { +pub enum Refreshsource { #[doc = "0: No Refresh Source Selected"] - NONE = 0, + None = 0, #[doc = "1: CH1 Refresh Triggered by Refresh Timer Overflow"] - REFRESHTIMER = 1, + Refreshtimer = 1, #[doc = "2: CH1 Refresh Triggered by Sync PRS. PRS Trigger should have the same clock group as VDAC."] - SYNCPRS = 2, + Syncprs = 2, #[doc = "3: CH1 Refresh Triggered by Async PRS"] - ASYNCPRS = 3, + Asyncprs = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REFRESHSOURCE_A) -> Self { + fn from(variant: Refreshsource) -> Self { variant as _ } } -impl REFRESHSOURCE_R { +impl crate::FieldSpec for Refreshsource { + type Ux = u8; +} +impl crate::IsEnum for Refreshsource {} +#[doc = "Field `REFRESHSOURCE` reader - Channel 1 Refresh Source"] +pub type RefreshsourceR = crate::FieldReader; +impl RefreshsourceR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> REFRESHSOURCE_A { + pub const fn variant(&self) -> Refreshsource { match self.bits { - 0 => REFRESHSOURCE_A::NONE, - 1 => REFRESHSOURCE_A::REFRESHTIMER, - 2 => REFRESHSOURCE_A::SYNCPRS, - 3 => REFRESHSOURCE_A::ASYNCPRS, + 0 => Refreshsource::None, + 1 => Refreshsource::Refreshtimer, + 2 => Refreshsource::Syncprs, + 3 => Refreshsource::Asyncprs, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No Refresh Source Selected"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == REFRESHSOURCE_A::NONE + *self == Refreshsource::None } - #[doc = "Checks if the value of the field is `REFRESHTIMER`"] + #[doc = "CH1 Refresh Triggered by Refresh Timer Overflow"] #[inline(always)] pub fn is_refreshtimer(&self) -> bool { - *self == REFRESHSOURCE_A::REFRESHTIMER + *self == Refreshsource::Refreshtimer } - #[doc = "Checks if the value of the field is `SYNCPRS`"] + #[doc = "CH1 Refresh Triggered by Sync PRS. PRS Trigger should have the same clock group as VDAC."] #[inline(always)] pub fn is_syncprs(&self) -> bool { - *self == REFRESHSOURCE_A::SYNCPRS + *self == Refreshsource::Syncprs } - #[doc = "Checks if the value of the field is `ASYNCPRS`"] + #[doc = "CH1 Refresh Triggered by Async PRS"] #[inline(always)] pub fn is_asyncprs(&self) -> bool { - *self == REFRESHSOURCE_A::ASYNCPRS + *self == Refreshsource::Asyncprs } } #[doc = "Field `REFRESHSOURCE` writer - Channel 1 Refresh Source"] -pub type REFRESHSOURCE_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CH1CFG_SPEC, u8, REFRESHSOURCE_A, 2, O>; -impl<'a, const O: u8> REFRESHSOURCE_W<'a, O> { +pub type RefreshsourceW<'a, REG> = crate::FieldWriter<'a, REG, 2, Refreshsource, crate::Safe>; +impl<'a, REG> RefreshsourceW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No Refresh Source Selected"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(REFRESHSOURCE_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Refreshsource::None) } #[doc = "CH1 Refresh Triggered by Refresh Timer Overflow"] #[inline(always)] - pub fn refreshtimer(self) -> &'a mut W { - self.variant(REFRESHSOURCE_A::REFRESHTIMER) + pub fn refreshtimer(self) -> &'a mut crate::W { + self.variant(Refreshsource::Refreshtimer) } #[doc = "CH1 Refresh Triggered by Sync PRS. PRS Trigger should have the same clock group as VDAC."] #[inline(always)] - pub fn syncprs(self) -> &'a mut W { - self.variant(REFRESHSOURCE_A::SYNCPRS) + pub fn syncprs(self) -> &'a mut crate::W { + self.variant(Refreshsource::Syncprs) } #[doc = "CH1 Refresh Triggered by Async PRS"] #[inline(always)] - pub fn asyncprs(self) -> &'a mut W { - self.variant(REFRESHSOURCE_A::ASYNCPRS) + pub fn asyncprs(self) -> &'a mut crate::W { + self.variant(Refreshsource::Asyncprs) } } #[doc = "Field `FIFODVL` reader - Channel 1 FIFO Low Watermark"] -pub type FIFODVL_R = crate::FieldReader; +pub type FifodvlR = crate::FieldReader; #[doc = "Field `FIFODVL` writer - Channel 1 FIFO Low Watermark"] -pub type FIFODVL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH1CFG_SPEC, u8, u8, 2, O>; +pub type FifodvlW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `HIGHCAPLOADEN` reader - Channel 1 High Cap Load Mode Enable"] -pub type HIGHCAPLOADEN_R = crate::BitReader; +pub type HighcaploadenR = crate::BitReader; #[doc = "Field `HIGHCAPLOADEN` writer - Channel 1 High Cap Load Mode Enable"] -pub type HIGHCAPLOADEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH1CFG_SPEC, bool, O>; +pub type HighcaploadenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `KEEPWARM` reader - Channel 1 Keepwarm Mode Enable"] -pub type KEEPWARM_R = crate::BitReader; +pub type KeepwarmR = crate::BitReader; #[doc = "Field `KEEPWARM` writer - Channel 1 Keepwarm Mode Enable"] -pub type KEEPWARM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH1CFG_SPEC, bool, O>; +pub type KeepwarmW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Channel 1 Conversion Mode"] #[inline(always)] - pub fn convmode(&self) -> CONVMODE_R { - CONVMODE_R::new((self.bits & 1) != 0) + pub fn convmode(&self) -> ConvmodeR { + ConvmodeR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - Channel 1 Power Mode"] #[inline(always)] - pub fn powermode(&self) -> POWERMODE_R { - POWERMODE_R::new(((self.bits >> 2) & 1) != 0) + pub fn powermode(&self) -> PowermodeR { + PowermodeR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 4:6 - Channel 1 Trigger Mode"] #[inline(always)] - pub fn trigmode(&self) -> TRIGMODE_R { - TRIGMODE_R::new(((self.bits >> 4) & 7) as u8) + pub fn trigmode(&self) -> TrigmodeR { + TrigmodeR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:9 - Channel 1 Refresh Source"] #[inline(always)] - pub fn refreshsource(&self) -> REFRESHSOURCE_R { - REFRESHSOURCE_R::new(((self.bits >> 8) & 3) as u8) + pub fn refreshsource(&self) -> RefreshsourceR { + RefreshsourceR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 11:12 - Channel 1 FIFO Low Watermark"] #[inline(always)] - pub fn fifodvl(&self) -> FIFODVL_R { - FIFODVL_R::new(((self.bits >> 11) & 3) as u8) + pub fn fifodvl(&self) -> FifodvlR { + FifodvlR::new(((self.bits >> 11) & 3) as u8) } #[doc = "Bit 14 - Channel 1 High Cap Load Mode Enable"] #[inline(always)] - pub fn highcaploaden(&self) -> HIGHCAPLOADEN_R { - HIGHCAPLOADEN_R::new(((self.bits >> 14) & 1) != 0) + pub fn highcaploaden(&self) -> HighcaploadenR { + HighcaploadenR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 16 - Channel 1 Keepwarm Mode Enable"] #[inline(always)] - pub fn keepwarm(&self) -> KEEPWARM_R { - KEEPWARM_R::new(((self.bits >> 16) & 1) != 0) + pub fn keepwarm(&self) -> KeepwarmR { + KeepwarmR::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bit 0 - Channel 1 Conversion Mode"] #[inline(always)] #[must_use] - pub fn convmode(&mut self) -> CONVMODE_W<0> { - CONVMODE_W::new(self) + pub fn convmode(&mut self) -> ConvmodeW { + ConvmodeW::new(self, 0) } #[doc = "Bit 2 - Channel 1 Power Mode"] #[inline(always)] #[must_use] - pub fn powermode(&mut self) -> POWERMODE_W<2> { - POWERMODE_W::new(self) + pub fn powermode(&mut self) -> PowermodeW { + PowermodeW::new(self, 2) } #[doc = "Bits 4:6 - Channel 1 Trigger Mode"] #[inline(always)] #[must_use] - pub fn trigmode(&mut self) -> TRIGMODE_W<4> { - TRIGMODE_W::new(self) + pub fn trigmode(&mut self) -> TrigmodeW { + TrigmodeW::new(self, 4) } #[doc = "Bits 8:9 - Channel 1 Refresh Source"] #[inline(always)] #[must_use] - pub fn refreshsource(&mut self) -> REFRESHSOURCE_W<8> { - REFRESHSOURCE_W::new(self) + pub fn refreshsource(&mut self) -> RefreshsourceW { + RefreshsourceW::new(self, 8) } #[doc = "Bits 11:12 - Channel 1 FIFO Low Watermark"] #[inline(always)] #[must_use] - pub fn fifodvl(&mut self) -> FIFODVL_W<11> { - FIFODVL_W::new(self) + pub fn fifodvl(&mut self) -> FifodvlW { + FifodvlW::new(self, 11) } #[doc = "Bit 14 - Channel 1 High Cap Load Mode Enable"] #[inline(always)] #[must_use] - pub fn highcaploaden(&mut self) -> HIGHCAPLOADEN_W<14> { - HIGHCAPLOADEN_W::new(self) + pub fn highcaploaden(&mut self) -> HighcaploadenW { + HighcaploadenW::new(self, 14) } #[doc = "Bit 16 - Channel 1 Keepwarm Mode Enable"] #[inline(always)] #[must_use] - pub fn keepwarm(&mut self) -> KEEPWARM_W<16> { - KEEPWARM_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn keepwarm(&mut self) -> KeepwarmW { + KeepwarmW::new(self, 16) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch1cfg](index.html) module"] -pub struct CH1CFG_SPEC; -impl crate::RegisterSpec for CH1CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ch1cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch1cfgSpec; +impl crate::RegisterSpec for Ch1cfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [ch1cfg::R](R) reader structure"] -impl crate::Readable for CH1CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ch1cfg::W](W) writer structure"] -impl crate::Writable for CH1CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ch1cfg::R`](R) reader structure"] +impl crate::Readable for Ch1cfgSpec {} +#[doc = "`write(|w| ..)` method takes [`ch1cfg::W`](W) writer structure"] +impl crate::Writable for Ch1cfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH1CFG to value 0x10"] -impl crate::Resettable for CH1CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x10; +impl crate::Resettable for Ch1cfgSpec { + const RESET_VALUE: u32 = 0x10; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/ch1f.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/ch1f.rs index 51f1de0..1d8ce5d 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/ch1f.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/ch1f.rs @@ -1,52 +1,27 @@ #[doc = "Register `CH1F` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `DATA` writer - Channel 1 Data"] -pub type DATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH1F_SPEC, u16, u16, 12, O>; +pub type DataW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl W { #[doc = "Bits 0:11 - Channel 1 Data"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W<0> { - DATA_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn data(&mut self) -> DataW { + DataW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch1f](index.html) module"] -pub struct CH1F_SPEC; -impl crate::RegisterSpec for CH1F_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch1f::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct Ch1fSpec; +impl crate::RegisterSpec for Ch1fSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [ch1f::W](W) writer structure"] -impl crate::Writable for CH1F_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`ch1f::W`](W) writer structure"] +impl crate::Writable for Ch1fSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CH1F to value 0"] -impl crate::Resettable for CH1F_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for Ch1fSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/cmd.rs index e3f745e..4093cb3 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/cmd.rs @@ -1,108 +1,83 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CH0EN` writer - DAC Channel 0 Enable"] -pub type CH0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type Ch0enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH0DIS` writer - DAC Channel 0 Disable"] -pub type CH0DIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type Ch0disW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1EN` writer - DAC Channel 1 Enable"] -pub type CH1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type Ch1enW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1DIS` writer - DAC Channel 1 Disable"] -pub type CH1DIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type Ch1disW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH0FIFOFLUSH` writer - CH0 WFIFO Flush"] -pub type CH0FIFOFLUSH_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type Ch0fifoflushW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1FIFOFLUSH` writer - CH1 WFIFO Flush"] -pub type CH1FIFOFLUSH_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type Ch1fifoflushW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SINEMODESTART` writer - Start Sine Wave Generation"] -pub type SINEMODESTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type SinemodestartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SINEMODESTOP` writer - Stop Sine Wave Generation"] -pub type SINEMODESTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>; +pub type SinemodestopW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - DAC Channel 0 Enable"] #[inline(always)] #[must_use] - pub fn ch0en(&mut self) -> CH0EN_W<0> { - CH0EN_W::new(self) + pub fn ch0en(&mut self) -> Ch0enW { + Ch0enW::new(self, 0) } #[doc = "Bit 1 - DAC Channel 0 Disable"] #[inline(always)] #[must_use] - pub fn ch0dis(&mut self) -> CH0DIS_W<1> { - CH0DIS_W::new(self) + pub fn ch0dis(&mut self) -> Ch0disW { + Ch0disW::new(self, 1) } #[doc = "Bit 4 - DAC Channel 1 Enable"] #[inline(always)] #[must_use] - pub fn ch1en(&mut self) -> CH1EN_W<4> { - CH1EN_W::new(self) + pub fn ch1en(&mut self) -> Ch1enW { + Ch1enW::new(self, 4) } #[doc = "Bit 5 - DAC Channel 1 Disable"] #[inline(always)] #[must_use] - pub fn ch1dis(&mut self) -> CH1DIS_W<5> { - CH1DIS_W::new(self) + pub fn ch1dis(&mut self) -> Ch1disW { + Ch1disW::new(self, 5) } #[doc = "Bit 8 - CH0 WFIFO Flush"] #[inline(always)] #[must_use] - pub fn ch0fifoflush(&mut self) -> CH0FIFOFLUSH_W<8> { - CH0FIFOFLUSH_W::new(self) + pub fn ch0fifoflush(&mut self) -> Ch0fifoflushW { + Ch0fifoflushW::new(self, 8) } #[doc = "Bit 9 - CH1 WFIFO Flush"] #[inline(always)] #[must_use] - pub fn ch1fifoflush(&mut self) -> CH1FIFOFLUSH_W<9> { - CH1FIFOFLUSH_W::new(self) + pub fn ch1fifoflush(&mut self) -> Ch1fifoflushW { + Ch1fifoflushW::new(self, 9) } #[doc = "Bit 10 - Start Sine Wave Generation"] #[inline(always)] #[must_use] - pub fn sinemodestart(&mut self) -> SINEMODESTART_W<10> { - SINEMODESTART_W::new(self) + pub fn sinemodestart(&mut self) -> SinemodestartW { + SinemodestartW::new(self, 10) } #[doc = "Bit 11 - Stop Sine Wave Generation"] #[inline(always)] #[must_use] - pub fn sinemodestop(&mut self) -> SINEMODESTOP_W<11> { - SINEMODESTOP_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn sinemodestop(&mut self) -> SinemodestopW { + SinemodestopW::new(self, 11) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/en.rs index 91c685f..d148a35 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/en.rs @@ -1,133 +1,96 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `EN` reader - VDAC Module Enable"] -pub type EN_R = crate::BitReader; +pub type W = crate::W; #[doc = "VDAC Module Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EN_A { +pub enum En { #[doc = "0: Disable"] - DISABLE = 0, + Disable = 0, #[doc = "1: Enable"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EN_A) -> Self { + fn from(variant: En) -> Self { variant as u8 != 0 } } -impl EN_R { +#[doc = "Field `EN` reader - VDAC Module Enable"] +pub type EnR = crate::BitReader; +impl EnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EN_A { + pub const fn variant(&self) -> En { match self.bits { - false => EN_A::DISABLE, - true => EN_A::ENABLE, + false => En::Disable, + true => En::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "Disable"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EN_A::DISABLE + *self == En::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "Enable"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EN_A::ENABLE + *self == En::Enable } } #[doc = "Field `EN` writer - VDAC Module Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, EN_A, O>; -impl<'a, const O: u8> EN_W<'a, O> { +pub type EnW<'a, REG> = crate::BitWriter<'a, REG, En>; +impl<'a, REG> EnW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "Disable"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(En::Disable) } #[doc = "Enable"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(En::Enable) } } #[doc = "Field `DISABLING` reader - Disablement busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - VDAC Module Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disablement busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - VDAC Module Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/ien.rs index 3f313c3..aba21d4 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/ien.rs @@ -1,215 +1,175 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CH0CD` reader - CH0 Conversion Done Interrupt Flag"] -pub type CH0CD_R = crate::BitReader; +pub type Ch0cdR = crate::BitReader; #[doc = "Field `CH0CD` writer - CH0 Conversion Done Interrupt Flag"] -pub type CH0CD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Ch0cdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1CD` reader - CH1 Conversion Done Interrupt Flag"] -pub type CH1CD_R = crate::BitReader; +pub type Ch1cdR = crate::BitReader; #[doc = "Field `CH1CD` writer - CH1 Conversion Done Interrupt Flag"] -pub type CH1CD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Ch1cdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH0OF` reader - CH0 Data Overflow Interrupt Flag"] -pub type CH0OF_R = crate::BitReader; +pub type Ch0ofR = crate::BitReader; #[doc = "Field `CH0OF` writer - CH0 Data Overflow Interrupt Flag"] -pub type CH0OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Ch0ofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1OF` reader - CH1 Data Overflow Interrupt Flag"] -pub type CH1OF_R = crate::BitReader; +pub type Ch1ofR = crate::BitReader; #[doc = "Field `CH1OF` writer - CH1 Data Overflow Interrupt Flag"] -pub type CH1OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Ch1ofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH0UF` reader - CH0 Data Underflow Interrupt Flag"] -pub type CH0UF_R = crate::BitReader; +pub type Ch0ufR = crate::BitReader; #[doc = "Field `CH0UF` writer - CH0 Data Underflow Interrupt Flag"] -pub type CH0UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Ch0ufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1UF` reader - CH1 Data Underflow Interrupt Flag"] -pub type CH1UF_R = crate::BitReader; +pub type Ch1ufR = crate::BitReader; #[doc = "Field `CH1UF` writer - CH1 Data Underflow Interrupt Flag"] -pub type CH1UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Ch1ufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ABUSALLOCERR` reader - ABUS Allocation Error Interrupt Flag"] -pub type ABUSALLOCERR_R = crate::BitReader; +pub type AbusallocerrR = crate::BitReader; #[doc = "Field `ABUSALLOCERR` writer - ABUS Allocation Error Interrupt Flag"] -pub type ABUSALLOCERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AbusallocerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH0DVL` reader - CH0 Data Valid Level Interrupt Flag"] -pub type CH0DVL_R = crate::BitReader; +pub type Ch0dvlR = crate::BitReader; #[doc = "Field `CH0DVL` writer - CH0 Data Valid Level Interrupt Flag"] -pub type CH0DVL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Ch0dvlW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1DVL` reader - CH1 Data Valid Level Interrupt Flag"] -pub type CH1DVL_R = crate::BitReader; +pub type Ch1dvlR = crate::BitReader; #[doc = "Field `CH1DVL` writer - CH1 Data Valid Level Interrupt Flag"] -pub type CH1DVL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Ch1dvlW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ABUSINPUTCONFLICT` reader - ABUS Input Conflict Interrupt Flag"] -pub type ABUSINPUTCONFLICT_R = crate::BitReader; +pub type AbusinputconflictR = crate::BitReader; #[doc = "Field `ABUSINPUTCONFLICT` writer - ABUS Input Conflict Interrupt Flag"] -pub type ABUSINPUTCONFLICT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type AbusinputconflictW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CH0 Conversion Done Interrupt Flag"] #[inline(always)] - pub fn ch0cd(&self) -> CH0CD_R { - CH0CD_R::new((self.bits & 1) != 0) + pub fn ch0cd(&self) -> Ch0cdR { + Ch0cdR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CH1 Conversion Done Interrupt Flag"] #[inline(always)] - pub fn ch1cd(&self) -> CH1CD_R { - CH1CD_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1cd(&self) -> Ch1cdR { + Ch1cdR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 4 - CH0 Data Overflow Interrupt Flag"] #[inline(always)] - pub fn ch0of(&self) -> CH0OF_R { - CH0OF_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch0of(&self) -> Ch0ofR { + Ch0ofR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CH1 Data Overflow Interrupt Flag"] #[inline(always)] - pub fn ch1of(&self) -> CH1OF_R { - CH1OF_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch1of(&self) -> Ch1ofR { + Ch1ofR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 8 - CH0 Data Underflow Interrupt Flag"] #[inline(always)] - pub fn ch0uf(&self) -> CH0UF_R { - CH0UF_R::new(((self.bits >> 8) & 1) != 0) + pub fn ch0uf(&self) -> Ch0ufR { + Ch0ufR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - CH1 Data Underflow Interrupt Flag"] #[inline(always)] - pub fn ch1uf(&self) -> CH1UF_R { - CH1UF_R::new(((self.bits >> 9) & 1) != 0) + pub fn ch1uf(&self) -> Ch1ufR { + Ch1ufR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 18 - ABUS Allocation Error Interrupt Flag"] #[inline(always)] - pub fn abusallocerr(&self) -> ABUSALLOCERR_R { - ABUSALLOCERR_R::new(((self.bits >> 18) & 1) != 0) + pub fn abusallocerr(&self) -> AbusallocerrR { + AbusallocerrR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - CH0 Data Valid Level Interrupt Flag"] #[inline(always)] - pub fn ch0dvl(&self) -> CH0DVL_R { - CH0DVL_R::new(((self.bits >> 20) & 1) != 0) + pub fn ch0dvl(&self) -> Ch0dvlR { + Ch0dvlR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - CH1 Data Valid Level Interrupt Flag"] #[inline(always)] - pub fn ch1dvl(&self) -> CH1DVL_R { - CH1DVL_R::new(((self.bits >> 21) & 1) != 0) + pub fn ch1dvl(&self) -> Ch1dvlR { + Ch1dvlR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 26 - ABUS Input Conflict Interrupt Flag"] #[inline(always)] - pub fn abusinputconflict(&self) -> ABUSINPUTCONFLICT_R { - ABUSINPUTCONFLICT_R::new(((self.bits >> 26) & 1) != 0) + pub fn abusinputconflict(&self) -> AbusinputconflictR { + AbusinputconflictR::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bit 0 - CH0 Conversion Done Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch0cd(&mut self) -> CH0CD_W<0> { - CH0CD_W::new(self) + pub fn ch0cd(&mut self) -> Ch0cdW { + Ch0cdW::new(self, 0) } #[doc = "Bit 1 - CH1 Conversion Done Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch1cd(&mut self) -> CH1CD_W<1> { - CH1CD_W::new(self) + pub fn ch1cd(&mut self) -> Ch1cdW { + Ch1cdW::new(self, 1) } #[doc = "Bit 4 - CH0 Data Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch0of(&mut self) -> CH0OF_W<4> { - CH0OF_W::new(self) + pub fn ch0of(&mut self) -> Ch0ofW { + Ch0ofW::new(self, 4) } #[doc = "Bit 5 - CH1 Data Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch1of(&mut self) -> CH1OF_W<5> { - CH1OF_W::new(self) + pub fn ch1of(&mut self) -> Ch1ofW { + Ch1ofW::new(self, 5) } #[doc = "Bit 8 - CH0 Data Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch0uf(&mut self) -> CH0UF_W<8> { - CH0UF_W::new(self) + pub fn ch0uf(&mut self) -> Ch0ufW { + Ch0ufW::new(self, 8) } #[doc = "Bit 9 - CH1 Data Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch1uf(&mut self) -> CH1UF_W<9> { - CH1UF_W::new(self) + pub fn ch1uf(&mut self) -> Ch1ufW { + Ch1ufW::new(self, 9) } #[doc = "Bit 18 - ABUS Allocation Error Interrupt Flag"] #[inline(always)] #[must_use] - pub fn abusallocerr(&mut self) -> ABUSALLOCERR_W<18> { - ABUSALLOCERR_W::new(self) + pub fn abusallocerr(&mut self) -> AbusallocerrW { + AbusallocerrW::new(self, 18) } #[doc = "Bit 20 - CH0 Data Valid Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch0dvl(&mut self) -> CH0DVL_W<20> { - CH0DVL_W::new(self) + pub fn ch0dvl(&mut self) -> Ch0dvlW { + Ch0dvlW::new(self, 20) } #[doc = "Bit 21 - CH1 Data Valid Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch1dvl(&mut self) -> CH1DVL_W<21> { - CH1DVL_W::new(self) + pub fn ch1dvl(&mut self) -> Ch1dvlW { + Ch1dvlW::new(self, 21) } #[doc = "Bit 26 - ABUS Input Conflict Interrupt Flag"] #[inline(always)] #[must_use] - pub fn abusinputconflict(&mut self) -> ABUSINPUTCONFLICT_W<26> { - ABUSINPUTCONFLICT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn abusinputconflict(&mut self) -> AbusinputconflictW { + AbusinputconflictW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/if_.rs index 963fd21..5e584cf 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/if_.rs @@ -1,215 +1,175 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CH0CD` reader - CH0 Conversion Done Interrupt Flag"] -pub type CH0CD_R = crate::BitReader; +pub type Ch0cdR = crate::BitReader; #[doc = "Field `CH0CD` writer - CH0 Conversion Done Interrupt Flag"] -pub type CH0CD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Ch0cdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1CD` reader - CH1 Conversion Done Interrupt Flag"] -pub type CH1CD_R = crate::BitReader; +pub type Ch1cdR = crate::BitReader; #[doc = "Field `CH1CD` writer - CH1 Conversion Done Interrupt Flag"] -pub type CH1CD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Ch1cdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH0OF` reader - CH0 Data Overflow Interrupt Flag"] -pub type CH0OF_R = crate::BitReader; +pub type Ch0ofR = crate::BitReader; #[doc = "Field `CH0OF` writer - CH0 Data Overflow Interrupt Flag"] -pub type CH0OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Ch0ofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1OF` reader - CH1 Data Overflow Interrupt Flag"] -pub type CH1OF_R = crate::BitReader; +pub type Ch1ofR = crate::BitReader; #[doc = "Field `CH1OF` writer - CH1 Data Overflow Interrupt Flag"] -pub type CH1OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Ch1ofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH0UF` reader - CH0 Data Underflow Interrupt Flag"] -pub type CH0UF_R = crate::BitReader; +pub type Ch0ufR = crate::BitReader; #[doc = "Field `CH0UF` writer - CH0 Data Underflow Interrupt Flag"] -pub type CH0UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Ch0ufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1UF` reader - CH1 Data Underflow Interrupt Flag"] -pub type CH1UF_R = crate::BitReader; +pub type Ch1ufR = crate::BitReader; #[doc = "Field `CH1UF` writer - CH1 Data Underflow Interrupt Flag"] -pub type CH1UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Ch1ufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ABUSALLOCERR` reader - ABUS Port Allocation Error Flag"] -pub type ABUSALLOCERR_R = crate::BitReader; +pub type AbusallocerrR = crate::BitReader; #[doc = "Field `ABUSALLOCERR` writer - ABUS Port Allocation Error Flag"] -pub type ABUSALLOCERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AbusallocerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH0DVL` reader - CH0 Data Valid Level Interrupt Flag"] -pub type CH0DVL_R = crate::BitReader; +pub type Ch0dvlR = crate::BitReader; #[doc = "Field `CH0DVL` writer - CH0 Data Valid Level Interrupt Flag"] -pub type CH0DVL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Ch0dvlW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1DVL` reader - CH1 Data Valid Level Interrupt Flag"] -pub type CH1DVL_R = crate::BitReader; +pub type Ch1dvlR = crate::BitReader; #[doc = "Field `CH1DVL` writer - CH1 Data Valid Level Interrupt Flag"] -pub type CH1DVL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Ch1dvlW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ABUSINPUTCONFLICT` reader - ABUS Input Conflict Error Flag"] -pub type ABUSINPUTCONFLICT_R = crate::BitReader; +pub type AbusinputconflictR = crate::BitReader; #[doc = "Field `ABUSINPUTCONFLICT` writer - ABUS Input Conflict Error Flag"] -pub type ABUSINPUTCONFLICT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type AbusinputconflictW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CH0 Conversion Done Interrupt Flag"] #[inline(always)] - pub fn ch0cd(&self) -> CH0CD_R { - CH0CD_R::new((self.bits & 1) != 0) + pub fn ch0cd(&self) -> Ch0cdR { + Ch0cdR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CH1 Conversion Done Interrupt Flag"] #[inline(always)] - pub fn ch1cd(&self) -> CH1CD_R { - CH1CD_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1cd(&self) -> Ch1cdR { + Ch1cdR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 4 - CH0 Data Overflow Interrupt Flag"] #[inline(always)] - pub fn ch0of(&self) -> CH0OF_R { - CH0OF_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch0of(&self) -> Ch0ofR { + Ch0ofR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CH1 Data Overflow Interrupt Flag"] #[inline(always)] - pub fn ch1of(&self) -> CH1OF_R { - CH1OF_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch1of(&self) -> Ch1ofR { + Ch1ofR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 8 - CH0 Data Underflow Interrupt Flag"] #[inline(always)] - pub fn ch0uf(&self) -> CH0UF_R { - CH0UF_R::new(((self.bits >> 8) & 1) != 0) + pub fn ch0uf(&self) -> Ch0ufR { + Ch0ufR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - CH1 Data Underflow Interrupt Flag"] #[inline(always)] - pub fn ch1uf(&self) -> CH1UF_R { - CH1UF_R::new(((self.bits >> 9) & 1) != 0) + pub fn ch1uf(&self) -> Ch1ufR { + Ch1ufR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 18 - ABUS Port Allocation Error Flag"] #[inline(always)] - pub fn abusallocerr(&self) -> ABUSALLOCERR_R { - ABUSALLOCERR_R::new(((self.bits >> 18) & 1) != 0) + pub fn abusallocerr(&self) -> AbusallocerrR { + AbusallocerrR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - CH0 Data Valid Level Interrupt Flag"] #[inline(always)] - pub fn ch0dvl(&self) -> CH0DVL_R { - CH0DVL_R::new(((self.bits >> 20) & 1) != 0) + pub fn ch0dvl(&self) -> Ch0dvlR { + Ch0dvlR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - CH1 Data Valid Level Interrupt Flag"] #[inline(always)] - pub fn ch1dvl(&self) -> CH1DVL_R { - CH1DVL_R::new(((self.bits >> 21) & 1) != 0) + pub fn ch1dvl(&self) -> Ch1dvlR { + Ch1dvlR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 26 - ABUS Input Conflict Error Flag"] #[inline(always)] - pub fn abusinputconflict(&self) -> ABUSINPUTCONFLICT_R { - ABUSINPUTCONFLICT_R::new(((self.bits >> 26) & 1) != 0) + pub fn abusinputconflict(&self) -> AbusinputconflictR { + AbusinputconflictR::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bit 0 - CH0 Conversion Done Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch0cd(&mut self) -> CH0CD_W<0> { - CH0CD_W::new(self) + pub fn ch0cd(&mut self) -> Ch0cdW { + Ch0cdW::new(self, 0) } #[doc = "Bit 1 - CH1 Conversion Done Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch1cd(&mut self) -> CH1CD_W<1> { - CH1CD_W::new(self) + pub fn ch1cd(&mut self) -> Ch1cdW { + Ch1cdW::new(self, 1) } #[doc = "Bit 4 - CH0 Data Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch0of(&mut self) -> CH0OF_W<4> { - CH0OF_W::new(self) + pub fn ch0of(&mut self) -> Ch0ofW { + Ch0ofW::new(self, 4) } #[doc = "Bit 5 - CH1 Data Overflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch1of(&mut self) -> CH1OF_W<5> { - CH1OF_W::new(self) + pub fn ch1of(&mut self) -> Ch1ofW { + Ch1ofW::new(self, 5) } #[doc = "Bit 8 - CH0 Data Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch0uf(&mut self) -> CH0UF_W<8> { - CH0UF_W::new(self) + pub fn ch0uf(&mut self) -> Ch0ufW { + Ch0ufW::new(self, 8) } #[doc = "Bit 9 - CH1 Data Underflow Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch1uf(&mut self) -> CH1UF_W<9> { - CH1UF_W::new(self) + pub fn ch1uf(&mut self) -> Ch1ufW { + Ch1ufW::new(self, 9) } #[doc = "Bit 18 - ABUS Port Allocation Error Flag"] #[inline(always)] #[must_use] - pub fn abusallocerr(&mut self) -> ABUSALLOCERR_W<18> { - ABUSALLOCERR_W::new(self) + pub fn abusallocerr(&mut self) -> AbusallocerrW { + AbusallocerrW::new(self, 18) } #[doc = "Bit 20 - CH0 Data Valid Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch0dvl(&mut self) -> CH0DVL_W<20> { - CH0DVL_W::new(self) + pub fn ch0dvl(&mut self) -> Ch0dvlW { + Ch0dvlW::new(self, 20) } #[doc = "Bit 21 - CH1 Data Valid Level Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ch1dvl(&mut self) -> CH1DVL_W<21> { - CH1DVL_W::new(self) + pub fn ch1dvl(&mut self) -> Ch1dvlW { + Ch1dvlW::new(self, 21) } #[doc = "Bit 26 - ABUS Input Conflict Error Flag"] #[inline(always)] #[must_use] - pub fn abusinputconflict(&mut self) -> ABUSINPUTCONFLICT_W<26> { - ABUSINPUTCONFLICT_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn abusinputconflict(&mut self) -> AbusinputconflictW { + AbusinputconflictW::new(self, 26) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/ipversion.rs index 84368b2..1f3dd4e 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IPVERSION"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IPVERSION"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/outctrl.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/outctrl.rs index a2573d7..ec20a11 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/outctrl.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/outctrl.rs @@ -1,391 +1,365 @@ #[doc = "Register `OUTCTRL` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `OUTCTRL` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `MAINOUTENCH0` reader - CH0 Main Output Enable"] -pub type MAINOUTENCH0_R = crate::BitReader; +pub type Mainoutench0R = crate::BitReader; #[doc = "Field `MAINOUTENCH0` writer - CH0 Main Output Enable"] -pub type MAINOUTENCH0_W<'a, const O: u8> = crate::BitWriter<'a, u32, OUTCTRL_SPEC, bool, O>; +pub type Mainoutench0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MAINOUTENCH1` reader - CH1 Main Output Enable"] -pub type MAINOUTENCH1_R = crate::BitReader; +pub type Mainoutench1R = crate::BitReader; #[doc = "Field `MAINOUTENCH1` writer - CH1 Main Output Enable"] -pub type MAINOUTENCH1_W<'a, const O: u8> = crate::BitWriter<'a, u32, OUTCTRL_SPEC, bool, O>; +pub type Mainoutench1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUXOUTENCH0` reader - CH0 Alternative Output Enable"] -pub type AUXOUTENCH0_R = crate::BitReader; +pub type Auxoutench0R = crate::BitReader; #[doc = "Field `AUXOUTENCH0` writer - CH0 Alternative Output Enable"] -pub type AUXOUTENCH0_W<'a, const O: u8> = crate::BitWriter<'a, u32, OUTCTRL_SPEC, bool, O>; +pub type Auxoutench0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUXOUTENCH1` reader - CH1 Alternative Output Enable"] -pub type AUXOUTENCH1_R = crate::BitReader; +pub type Auxoutench1R = crate::BitReader; #[doc = "Field `AUXOUTENCH1` writer - CH1 Alternative Output Enable"] -pub type AUXOUTENCH1_W<'a, const O: u8> = crate::BitWriter<'a, u32, OUTCTRL_SPEC, bool, O>; +pub type Auxoutench1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SHORTCH0` reader - CH1 Main and Alternative Output Short"] -pub type SHORTCH0_R = crate::BitReader; +pub type Shortch0R = crate::BitReader; #[doc = "Field `SHORTCH0` writer - CH1 Main and Alternative Output Short"] -pub type SHORTCH0_W<'a, const O: u8> = crate::BitWriter<'a, u32, OUTCTRL_SPEC, bool, O>; +pub type Shortch0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SHORTCH1` reader - CH0 Main and Alternative Output Short"] -pub type SHORTCH1_R = crate::BitReader; +pub type Shortch1R = crate::BitReader; #[doc = "Field `SHORTCH1` writer - CH0 Main and Alternative Output Short"] -pub type SHORTCH1_W<'a, const O: u8> = crate::BitWriter<'a, u32, OUTCTRL_SPEC, bool, O>; -#[doc = "Field `ABUSPORTSELCH0` reader - CH0 ABUS Port Select"] -pub type ABUSPORTSELCH0_R = crate::FieldReader; +pub type Shortch1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "CH0 ABUS Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ABUSPORTSELCH0_A { +pub enum Abusportselch0 { #[doc = "0: No GPIO Selected for CH0 ABUS Output"] - NONE = 0, + None = 0, #[doc = "1: Port A Selected"] - PORTA = 1, + Porta = 1, #[doc = "2: Port B Selected"] - PORTB = 2, + Portb = 2, #[doc = "3: Port C Selected"] - PORTC = 3, + Portc = 3, #[doc = "4: Port D Selected"] - PORTD = 4, + Portd = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ABUSPORTSELCH0_A) -> Self { + fn from(variant: Abusportselch0) -> Self { variant as _ } } -impl ABUSPORTSELCH0_R { +impl crate::FieldSpec for Abusportselch0 { + type Ux = u8; +} +impl crate::IsEnum for Abusportselch0 {} +#[doc = "Field `ABUSPORTSELCH0` reader - CH0 ABUS Port Select"] +pub type Abusportselch0R = crate::FieldReader; +impl Abusportselch0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ABUSPORTSELCH0_A::NONE), - 1 => Some(ABUSPORTSELCH0_A::PORTA), - 2 => Some(ABUSPORTSELCH0_A::PORTB), - 3 => Some(ABUSPORTSELCH0_A::PORTC), - 4 => Some(ABUSPORTSELCH0_A::PORTD), + 0 => Some(Abusportselch0::None), + 1 => Some(Abusportselch0::Porta), + 2 => Some(Abusportselch0::Portb), + 3 => Some(Abusportselch0::Portc), + 4 => Some(Abusportselch0::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No GPIO Selected for CH0 ABUS Output"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ABUSPORTSELCH0_A::NONE + *self == Abusportselch0::None } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A Selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == ABUSPORTSELCH0_A::PORTA + *self == Abusportselch0::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B Selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == ABUSPORTSELCH0_A::PORTB + *self == Abusportselch0::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C Selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == ABUSPORTSELCH0_A::PORTC + *self == Abusportselch0::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D Selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == ABUSPORTSELCH0_A::PORTD + *self == Abusportselch0::Portd } } #[doc = "Field `ABUSPORTSELCH0` writer - CH0 ABUS Port Select"] -pub type ABUSPORTSELCH0_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, OUTCTRL_SPEC, u8, ABUSPORTSELCH0_A, 3, O>; -impl<'a, const O: u8> ABUSPORTSELCH0_W<'a, O> { +pub type Abusportselch0W<'a, REG> = crate::FieldWriter<'a, REG, 3, Abusportselch0>; +impl<'a, REG> Abusportselch0W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No GPIO Selected for CH0 ABUS Output"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ABUSPORTSELCH0_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Abusportselch0::None) } #[doc = "Port A Selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(ABUSPORTSELCH0_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Abusportselch0::Porta) } #[doc = "Port B Selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(ABUSPORTSELCH0_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Abusportselch0::Portb) } #[doc = "Port C Selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(ABUSPORTSELCH0_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Abusportselch0::Portc) } #[doc = "Port D Selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(ABUSPORTSELCH0_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Abusportselch0::Portd) } } #[doc = "Field `ABUSPINSELCH0` reader - CH0 ABUS Pin Select"] -pub type ABUSPINSELCH0_R = crate::FieldReader; +pub type Abuspinselch0R = crate::FieldReader; #[doc = "Field `ABUSPINSELCH0` writer - CH0 ABUS Pin Select"] -pub type ABUSPINSELCH0_W<'a, const O: u8> = crate::FieldWriter<'a, u32, OUTCTRL_SPEC, u8, u8, 6, O>; -#[doc = "Field `ABUSPORTSELCH1` reader - CH1 ABUS Port Select"] -pub type ABUSPORTSELCH1_R = crate::FieldReader; +pub type Abuspinselch0W<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "CH1 ABUS Port Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ABUSPORTSELCH1_A { +pub enum Abusportselch1 { #[doc = "0: No GPIO Selected for CH1 ABUS Output"] - NONE = 0, + None = 0, #[doc = "1: Port A Selected"] - PORTA = 1, + Porta = 1, #[doc = "2: Port B Selected"] - PORTB = 2, + Portb = 2, #[doc = "3: Port C Selected"] - PORTC = 3, + Portc = 3, #[doc = "4: Port D Selected"] - PORTD = 4, + Portd = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ABUSPORTSELCH1_A) -> Self { + fn from(variant: Abusportselch1) -> Self { variant as _ } } -impl ABUSPORTSELCH1_R { +impl crate::FieldSpec for Abusportselch1 { + type Ux = u8; +} +impl crate::IsEnum for Abusportselch1 {} +#[doc = "Field `ABUSPORTSELCH1` reader - CH1 ABUS Port Select"] +pub type Abusportselch1R = crate::FieldReader; +impl Abusportselch1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ABUSPORTSELCH1_A::NONE), - 1 => Some(ABUSPORTSELCH1_A::PORTA), - 2 => Some(ABUSPORTSELCH1_A::PORTB), - 3 => Some(ABUSPORTSELCH1_A::PORTC), - 4 => Some(ABUSPORTSELCH1_A::PORTD), + 0 => Some(Abusportselch1::None), + 1 => Some(Abusportselch1::Porta), + 2 => Some(Abusportselch1::Portb), + 3 => Some(Abusportselch1::Portc), + 4 => Some(Abusportselch1::Portd), _ => None, } } - #[doc = "Checks if the value of the field is `NONE`"] + #[doc = "No GPIO Selected for CH1 ABUS Output"] #[inline(always)] pub fn is_none(&self) -> bool { - *self == ABUSPORTSELCH1_A::NONE + *self == Abusportselch1::None } - #[doc = "Checks if the value of the field is `PORTA`"] + #[doc = "Port A Selected"] #[inline(always)] pub fn is_porta(&self) -> bool { - *self == ABUSPORTSELCH1_A::PORTA + *self == Abusportselch1::Porta } - #[doc = "Checks if the value of the field is `PORTB`"] + #[doc = "Port B Selected"] #[inline(always)] pub fn is_portb(&self) -> bool { - *self == ABUSPORTSELCH1_A::PORTB + *self == Abusportselch1::Portb } - #[doc = "Checks if the value of the field is `PORTC`"] + #[doc = "Port C Selected"] #[inline(always)] pub fn is_portc(&self) -> bool { - *self == ABUSPORTSELCH1_A::PORTC + *self == Abusportselch1::Portc } - #[doc = "Checks if the value of the field is `PORTD`"] + #[doc = "Port D Selected"] #[inline(always)] pub fn is_portd(&self) -> bool { - *self == ABUSPORTSELCH1_A::PORTD + *self == Abusportselch1::Portd } } #[doc = "Field `ABUSPORTSELCH1` writer - CH1 ABUS Port Select"] -pub type ABUSPORTSELCH1_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, OUTCTRL_SPEC, u8, ABUSPORTSELCH1_A, 3, O>; -impl<'a, const O: u8> ABUSPORTSELCH1_W<'a, O> { +pub type Abusportselch1W<'a, REG> = crate::FieldWriter<'a, REG, 3, Abusportselch1>; +impl<'a, REG> Abusportselch1W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "No GPIO Selected for CH1 ABUS Output"] #[inline(always)] - pub fn none(self) -> &'a mut W { - self.variant(ABUSPORTSELCH1_A::NONE) + pub fn none(self) -> &'a mut crate::W { + self.variant(Abusportselch1::None) } #[doc = "Port A Selected"] #[inline(always)] - pub fn porta(self) -> &'a mut W { - self.variant(ABUSPORTSELCH1_A::PORTA) + pub fn porta(self) -> &'a mut crate::W { + self.variant(Abusportselch1::Porta) } #[doc = "Port B Selected"] #[inline(always)] - pub fn portb(self) -> &'a mut W { - self.variant(ABUSPORTSELCH1_A::PORTB) + pub fn portb(self) -> &'a mut crate::W { + self.variant(Abusportselch1::Portb) } #[doc = "Port C Selected"] #[inline(always)] - pub fn portc(self) -> &'a mut W { - self.variant(ABUSPORTSELCH1_A::PORTC) + pub fn portc(self) -> &'a mut crate::W { + self.variant(Abusportselch1::Portc) } #[doc = "Port D Selected"] #[inline(always)] - pub fn portd(self) -> &'a mut W { - self.variant(ABUSPORTSELCH1_A::PORTD) + pub fn portd(self) -> &'a mut crate::W { + self.variant(Abusportselch1::Portd) } } #[doc = "Field `ABUSPINSELCH1` reader - CH1 ABUS Pin Select"] -pub type ABUSPINSELCH1_R = crate::FieldReader; +pub type Abuspinselch1R = crate::FieldReader; #[doc = "Field `ABUSPINSELCH1` writer - CH1 ABUS Pin Select"] -pub type ABUSPINSELCH1_W<'a, const O: u8> = crate::FieldWriter<'a, u32, OUTCTRL_SPEC, u8, u8, 6, O>; +pub type Abuspinselch1W<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bit 0 - CH0 Main Output Enable"] #[inline(always)] - pub fn mainoutench0(&self) -> MAINOUTENCH0_R { - MAINOUTENCH0_R::new((self.bits & 1) != 0) + pub fn mainoutench0(&self) -> Mainoutench0R { + Mainoutench0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CH1 Main Output Enable"] #[inline(always)] - pub fn mainoutench1(&self) -> MAINOUTENCH1_R { - MAINOUTENCH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn mainoutench1(&self) -> Mainoutench1R { + Mainoutench1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 4 - CH0 Alternative Output Enable"] #[inline(always)] - pub fn auxoutench0(&self) -> AUXOUTENCH0_R { - AUXOUTENCH0_R::new(((self.bits >> 4) & 1) != 0) + pub fn auxoutench0(&self) -> Auxoutench0R { + Auxoutench0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CH1 Alternative Output Enable"] #[inline(always)] - pub fn auxoutench1(&self) -> AUXOUTENCH1_R { - AUXOUTENCH1_R::new(((self.bits >> 5) & 1) != 0) + pub fn auxoutench1(&self) -> Auxoutench1R { + Auxoutench1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 8 - CH1 Main and Alternative Output Short"] #[inline(always)] - pub fn shortch0(&self) -> SHORTCH0_R { - SHORTCH0_R::new(((self.bits >> 8) & 1) != 0) + pub fn shortch0(&self) -> Shortch0R { + Shortch0R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - CH0 Main and Alternative Output Short"] #[inline(always)] - pub fn shortch1(&self) -> SHORTCH1_R { - SHORTCH1_R::new(((self.bits >> 9) & 1) != 0) + pub fn shortch1(&self) -> Shortch1R { + Shortch1R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bits 12:14 - CH0 ABUS Port Select"] #[inline(always)] - pub fn abusportselch0(&self) -> ABUSPORTSELCH0_R { - ABUSPORTSELCH0_R::new(((self.bits >> 12) & 7) as u8) + pub fn abusportselch0(&self) -> Abusportselch0R { + Abusportselch0R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 15:20 - CH0 ABUS Pin Select"] #[inline(always)] - pub fn abuspinselch0(&self) -> ABUSPINSELCH0_R { - ABUSPINSELCH0_R::new(((self.bits >> 15) & 0x3f) as u8) + pub fn abuspinselch0(&self) -> Abuspinselch0R { + Abuspinselch0R::new(((self.bits >> 15) & 0x3f) as u8) } #[doc = "Bits 22:24 - CH1 ABUS Port Select"] #[inline(always)] - pub fn abusportselch1(&self) -> ABUSPORTSELCH1_R { - ABUSPORTSELCH1_R::new(((self.bits >> 22) & 7) as u8) + pub fn abusportselch1(&self) -> Abusportselch1R { + Abusportselch1R::new(((self.bits >> 22) & 7) as u8) } #[doc = "Bits 25:30 - CH1 ABUS Pin Select"] #[inline(always)] - pub fn abuspinselch1(&self) -> ABUSPINSELCH1_R { - ABUSPINSELCH1_R::new(((self.bits >> 25) & 0x3f) as u8) + pub fn abuspinselch1(&self) -> Abuspinselch1R { + Abuspinselch1R::new(((self.bits >> 25) & 0x3f) as u8) } } impl W { #[doc = "Bit 0 - CH0 Main Output Enable"] #[inline(always)] #[must_use] - pub fn mainoutench0(&mut self) -> MAINOUTENCH0_W<0> { - MAINOUTENCH0_W::new(self) + pub fn mainoutench0(&mut self) -> Mainoutench0W { + Mainoutench0W::new(self, 0) } #[doc = "Bit 1 - CH1 Main Output Enable"] #[inline(always)] #[must_use] - pub fn mainoutench1(&mut self) -> MAINOUTENCH1_W<1> { - MAINOUTENCH1_W::new(self) + pub fn mainoutench1(&mut self) -> Mainoutench1W { + Mainoutench1W::new(self, 1) } #[doc = "Bit 4 - CH0 Alternative Output Enable"] #[inline(always)] #[must_use] - pub fn auxoutench0(&mut self) -> AUXOUTENCH0_W<4> { - AUXOUTENCH0_W::new(self) + pub fn auxoutench0(&mut self) -> Auxoutench0W { + Auxoutench0W::new(self, 4) } #[doc = "Bit 5 - CH1 Alternative Output Enable"] #[inline(always)] #[must_use] - pub fn auxoutench1(&mut self) -> AUXOUTENCH1_W<5> { - AUXOUTENCH1_W::new(self) + pub fn auxoutench1(&mut self) -> Auxoutench1W { + Auxoutench1W::new(self, 5) } #[doc = "Bit 8 - CH1 Main and Alternative Output Short"] #[inline(always)] #[must_use] - pub fn shortch0(&mut self) -> SHORTCH0_W<8> { - SHORTCH0_W::new(self) + pub fn shortch0(&mut self) -> Shortch0W { + Shortch0W::new(self, 8) } #[doc = "Bit 9 - CH0 Main and Alternative Output Short"] #[inline(always)] #[must_use] - pub fn shortch1(&mut self) -> SHORTCH1_W<9> { - SHORTCH1_W::new(self) + pub fn shortch1(&mut self) -> Shortch1W { + Shortch1W::new(self, 9) } #[doc = "Bits 12:14 - CH0 ABUS Port Select"] #[inline(always)] #[must_use] - pub fn abusportselch0(&mut self) -> ABUSPORTSELCH0_W<12> { - ABUSPORTSELCH0_W::new(self) + pub fn abusportselch0(&mut self) -> Abusportselch0W { + Abusportselch0W::new(self, 12) } #[doc = "Bits 15:20 - CH0 ABUS Pin Select"] #[inline(always)] #[must_use] - pub fn abuspinselch0(&mut self) -> ABUSPINSELCH0_W<15> { - ABUSPINSELCH0_W::new(self) + pub fn abuspinselch0(&mut self) -> Abuspinselch0W { + Abuspinselch0W::new(self, 15) } #[doc = "Bits 22:24 - CH1 ABUS Port Select"] #[inline(always)] #[must_use] - pub fn abusportselch1(&mut self) -> ABUSPORTSELCH1_W<22> { - ABUSPORTSELCH1_W::new(self) + pub fn abusportselch1(&mut self) -> Abusportselch1W { + Abusportselch1W::new(self, 22) } #[doc = "Bits 25:30 - CH1 ABUS Pin Select"] #[inline(always)] #[must_use] - pub fn abuspinselch1(&mut self) -> ABUSPINSELCH1_W<25> { - ABUSPINSELCH1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn abuspinselch1(&mut self) -> Abuspinselch1W { + Abuspinselch1W::new(self, 25) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [outctrl](index.html) module"] -pub struct OUTCTRL_SPEC; -impl crate::RegisterSpec for OUTCTRL_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`outctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`outctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct OutctrlSpec; +impl crate::RegisterSpec for OutctrlSpec { type Ux = u32; } -#[doc = "`read()` method returns [outctrl::R](R) reader structure"] -impl crate::Readable for OUTCTRL_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [outctrl::W](W) writer structure"] -impl crate::Writable for OUTCTRL_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`outctrl::R`](R) reader structure"] +impl crate::Readable for OutctrlSpec {} +#[doc = "`write(|w| ..)` method takes [`outctrl::W`](W) writer structure"] +impl crate::Writable for OutctrlSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OUTCTRL to value 0"] -impl crate::Resettable for OUTCTRL_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for OutctrlSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/outtimercfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/outtimercfg.rs index 041d129..8cffa64 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/outtimercfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/outtimercfg.rs @@ -1,97 +1,55 @@ #[doc = "Register `OUTTIMERCFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `OUTTIMERCFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `CH0OUTHOLDTIME` reader - CH0 Output Hold Time"] -pub type CH0OUTHOLDTIME_R = crate::FieldReader; +pub type Ch0outholdtimeR = crate::FieldReader; #[doc = "Field `CH0OUTHOLDTIME` writer - CH0 Output Hold Time"] -pub type CH0OUTHOLDTIME_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, OUTTIMERCFG_SPEC, u16, u16, 10, O>; +pub type Ch0outholdtimeW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `CH1OUTHOLDTIME` reader - CH1 Output Hold Time"] -pub type CH1OUTHOLDTIME_R = crate::FieldReader; +pub type Ch1outholdtimeR = crate::FieldReader; #[doc = "Field `CH1OUTHOLDTIME` writer - CH1 Output Hold Time"] -pub type CH1OUTHOLDTIME_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, OUTTIMERCFG_SPEC, u16, u16, 10, O>; +pub type Ch1outholdtimeW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; impl R { #[doc = "Bits 0:9 - CH0 Output Hold Time"] #[inline(always)] - pub fn ch0outholdtime(&self) -> CH0OUTHOLDTIME_R { - CH0OUTHOLDTIME_R::new((self.bits & 0x03ff) as u16) + pub fn ch0outholdtime(&self) -> Ch0outholdtimeR { + Ch0outholdtimeR::new((self.bits & 0x03ff) as u16) } #[doc = "Bits 15:24 - CH1 Output Hold Time"] #[inline(always)] - pub fn ch1outholdtime(&self) -> CH1OUTHOLDTIME_R { - CH1OUTHOLDTIME_R::new(((self.bits >> 15) & 0x03ff) as u16) + pub fn ch1outholdtime(&self) -> Ch1outholdtimeR { + Ch1outholdtimeR::new(((self.bits >> 15) & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:9 - CH0 Output Hold Time"] #[inline(always)] #[must_use] - pub fn ch0outholdtime(&mut self) -> CH0OUTHOLDTIME_W<0> { - CH0OUTHOLDTIME_W::new(self) + pub fn ch0outholdtime(&mut self) -> Ch0outholdtimeW { + Ch0outholdtimeW::new(self, 0) } #[doc = "Bits 15:24 - CH1 Output Hold Time"] #[inline(always)] #[must_use] - pub fn ch1outholdtime(&mut self) -> CH1OUTHOLDTIME_W<15> { - CH1OUTHOLDTIME_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn ch1outholdtime(&mut self) -> Ch1outholdtimeW { + Ch1outholdtimeW::new(self, 15) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [outtimercfg](index.html) module"] -pub struct OUTTIMERCFG_SPEC; -impl crate::RegisterSpec for OUTTIMERCFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`outtimercfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`outtimercfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct OuttimercfgSpec; +impl crate::RegisterSpec for OuttimercfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [outtimercfg::R](R) reader structure"] -impl crate::Readable for OUTTIMERCFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [outtimercfg::W](W) writer structure"] -impl crate::Writable for OUTTIMERCFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`outtimercfg::R`](R) reader structure"] +impl crate::Readable for OuttimercfgSpec {} +#[doc = "`write(|w| ..)` method takes [`outtimercfg::W`](W) writer structure"] +impl crate::Writable for OuttimercfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OUTTIMERCFG to value 0"] -impl crate::Resettable for OUTTIMERCFG_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for OuttimercfgSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/status.rs index 26b8c0c..3a17a08 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/status.rs @@ -1,156 +1,141 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CH0ENS` reader - Channel 0 Enabled Status"] -pub type CH0ENS_R = crate::BitReader; +pub type Ch0ensR = crate::BitReader; #[doc = "Field `CH1ENS` reader - Channel 1 Enabled Status"] -pub type CH1ENS_R = crate::BitReader; +pub type Ch1ensR = crate::BitReader; #[doc = "Field `CH0WARM` reader - Channel 0 Warmed Status"] -pub type CH0WARM_R = crate::BitReader; +pub type Ch0warmR = crate::BitReader; #[doc = "Field `CH1WARM` reader - Channel 1 Warmed Status"] -pub type CH1WARM_R = crate::BitReader; +pub type Ch1warmR = crate::BitReader; #[doc = "Field `CH0FIFOFULL` reader - Channel 0 FIFO Full Status"] -pub type CH0FIFOFULL_R = crate::BitReader; +pub type Ch0fifofullR = crate::BitReader; #[doc = "Field `CH1FIFOFULL` reader - Channel 1 FIFO Full Status"] -pub type CH1FIFOFULL_R = crate::BitReader; +pub type Ch1fifofullR = crate::BitReader; #[doc = "Field `CH0FIFOCNT` reader - Channel 0 FIFO Valid Count"] -pub type CH0FIFOCNT_R = crate::FieldReader; +pub type Ch0fifocntR = crate::FieldReader; #[doc = "Field `CH1FIFOCNT` reader - Channel 1 FIFO Valid Count"] -pub type CH1FIFOCNT_R = crate::FieldReader; +pub type Ch1fifocntR = crate::FieldReader; #[doc = "Field `CH0CURRENTSTATE` reader - Channel 0 Current Status"] -pub type CH0CURRENTSTATE_R = crate::BitReader; +pub type Ch0currentstateR = crate::BitReader; #[doc = "Field `CH1CURRENTSTATE` reader - Channel 1 Current Status"] -pub type CH1CURRENTSTATE_R = crate::BitReader; +pub type Ch1currentstateR = crate::BitReader; #[doc = "Field `CH0FIFOEMPTY` reader - Channel 0 FIFO Empty Status"] -pub type CH0FIFOEMPTY_R = crate::BitReader; +pub type Ch0fifoemptyR = crate::BitReader; #[doc = "Field `CH1FIFOEMPTY` reader - Channel 1 FIFO Empty Status"] -pub type CH1FIFOEMPTY_R = crate::BitReader; +pub type Ch1fifoemptyR = crate::BitReader; #[doc = "Field `CH0FIFOFLBUSY` reader - CH0 FIFO Flush Sync Busy"] -pub type CH0FIFOFLBUSY_R = crate::BitReader; +pub type Ch0fifoflbusyR = crate::BitReader; #[doc = "Field `CH1FIFOFLBUSY` reader - CH1 FIFO Flush Sync Busy"] -pub type CH1FIFOFLBUSY_R = crate::BitReader; +pub type Ch1fifoflbusyR = crate::BitReader; #[doc = "Field `ABUSINPUTCONFLICT` reader - ABUS Input Conflict Status"] -pub type ABUSINPUTCONFLICT_R = crate::BitReader; +pub type AbusinputconflictR = crate::BitReader; #[doc = "Field `SINEACTIVE` reader - Sine Wave Output Status on Channel"] -pub type SINEACTIVE_R = crate::BitReader; +pub type SineactiveR = crate::BitReader; #[doc = "Field `ABUSALLOCERR` reader - ABUS Allocation Error Status"] -pub type ABUSALLOCERR_R = crate::BitReader; +pub type AbusallocerrR = crate::BitReader; #[doc = "Field `SYNCBUSY` reader - Sync Busy Combined"] -pub type SYNCBUSY_R = crate::BitReader; +pub type SyncbusyR = crate::BitReader; impl R { #[doc = "Bit 0 - Channel 0 Enabled Status"] #[inline(always)] - pub fn ch0ens(&self) -> CH0ENS_R { - CH0ENS_R::new((self.bits & 1) != 0) + pub fn ch0ens(&self) -> Ch0ensR { + Ch0ensR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channel 1 Enabled Status"] #[inline(always)] - pub fn ch1ens(&self) -> CH1ENS_R { - CH1ENS_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1ens(&self) -> Ch1ensR { + Ch1ensR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 4 - Channel 0 Warmed Status"] #[inline(always)] - pub fn ch0warm(&self) -> CH0WARM_R { - CH0WARM_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch0warm(&self) -> Ch0warmR { + Ch0warmR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Channel 1 Warmed Status"] #[inline(always)] - pub fn ch1warm(&self) -> CH1WARM_R { - CH1WARM_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch1warm(&self) -> Ch1warmR { + Ch1warmR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 8 - Channel 0 FIFO Full Status"] #[inline(always)] - pub fn ch0fifofull(&self) -> CH0FIFOFULL_R { - CH0FIFOFULL_R::new(((self.bits >> 8) & 1) != 0) + pub fn ch0fifofull(&self) -> Ch0fifofullR { + Ch0fifofullR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Channel 1 FIFO Full Status"] #[inline(always)] - pub fn ch1fifofull(&self) -> CH1FIFOFULL_R { - CH1FIFOFULL_R::new(((self.bits >> 9) & 1) != 0) + pub fn ch1fifofull(&self) -> Ch1fifofullR { + Ch1fifofullR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bits 12:14 - Channel 0 FIFO Valid Count"] #[inline(always)] - pub fn ch0fifocnt(&self) -> CH0FIFOCNT_R { - CH0FIFOCNT_R::new(((self.bits >> 12) & 7) as u8) + pub fn ch0fifocnt(&self) -> Ch0fifocntR { + Ch0fifocntR::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 15:17 - Channel 1 FIFO Valid Count"] #[inline(always)] - pub fn ch1fifocnt(&self) -> CH1FIFOCNT_R { - CH1FIFOCNT_R::new(((self.bits >> 15) & 7) as u8) + pub fn ch1fifocnt(&self) -> Ch1fifocntR { + Ch1fifocntR::new(((self.bits >> 15) & 7) as u8) } #[doc = "Bit 19 - Channel 0 Current Status"] #[inline(always)] - pub fn ch0currentstate(&self) -> CH0CURRENTSTATE_R { - CH0CURRENTSTATE_R::new(((self.bits >> 19) & 1) != 0) + pub fn ch0currentstate(&self) -> Ch0currentstateR { + Ch0currentstateR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Channel 1 Current Status"] #[inline(always)] - pub fn ch1currentstate(&self) -> CH1CURRENTSTATE_R { - CH1CURRENTSTATE_R::new(((self.bits >> 20) & 1) != 0) + pub fn ch1currentstate(&self) -> Ch1currentstateR { + Ch1currentstateR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 22 - Channel 0 FIFO Empty Status"] #[inline(always)] - pub fn ch0fifoempty(&self) -> CH0FIFOEMPTY_R { - CH0FIFOEMPTY_R::new(((self.bits >> 22) & 1) != 0) + pub fn ch0fifoempty(&self) -> Ch0fifoemptyR { + Ch0fifoemptyR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Channel 1 FIFO Empty Status"] #[inline(always)] - pub fn ch1fifoempty(&self) -> CH1FIFOEMPTY_R { - CH1FIFOEMPTY_R::new(((self.bits >> 23) & 1) != 0) + pub fn ch1fifoempty(&self) -> Ch1fifoemptyR { + Ch1fifoemptyR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 26 - CH0 FIFO Flush Sync Busy"] #[inline(always)] - pub fn ch0fifoflbusy(&self) -> CH0FIFOFLBUSY_R { - CH0FIFOFLBUSY_R::new(((self.bits >> 26) & 1) != 0) + pub fn ch0fifoflbusy(&self) -> Ch0fifoflbusyR { + Ch0fifoflbusyR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - CH1 FIFO Flush Sync Busy"] #[inline(always)] - pub fn ch1fifoflbusy(&self) -> CH1FIFOFLBUSY_R { - CH1FIFOFLBUSY_R::new(((self.bits >> 27) & 1) != 0) + pub fn ch1fifoflbusy(&self) -> Ch1fifoflbusyR { + Ch1fifoflbusyR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - ABUS Input Conflict Status"] #[inline(always)] - pub fn abusinputconflict(&self) -> ABUSINPUTCONFLICT_R { - ABUSINPUTCONFLICT_R::new(((self.bits >> 28) & 1) != 0) + pub fn abusinputconflict(&self) -> AbusinputconflictR { + AbusinputconflictR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Sine Wave Output Status on Channel"] #[inline(always)] - pub fn sineactive(&self) -> SINEACTIVE_R { - SINEACTIVE_R::new(((self.bits >> 29) & 1) != 0) + pub fn sineactive(&self) -> SineactiveR { + SineactiveR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - ABUS Allocation Error Status"] #[inline(always)] - pub fn abusallocerr(&self) -> ABUSALLOCERR_R { - ABUSALLOCERR_R::new(((self.bits >> 30) & 1) != 0) + pub fn abusallocerr(&self) -> AbusallocerrR { + AbusallocerrR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Sync Busy Combined"] #[inline(always)] - pub fn syncbusy(&self) -> SYNCBUSY_R { - SYNCBUSY_R::new(((self.bits >> 31) & 1) != 0) + pub fn syncbusy(&self) -> SyncbusyR { + SyncbusyR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/swrst.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/swrst.rs index afd978e..804eaff 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/swrst.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/vdac0_s/swrst.rs @@ -1,80 +1,40 @@ #[doc = "Register `SWRST` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `SWRST` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `SWRST` writer - Software reset command"] -pub type SWRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, SWRST_SPEC, bool, O>; +pub type SwrstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESETTING` reader - Software reset busy status"] -pub type RESETTING_R = crate::BitReader; +pub type ResettingR = crate::BitReader; impl R { #[doc = "Bit 1 - Software reset busy status"] #[inline(always)] - pub fn resetting(&self) -> RESETTING_R { - RESETTING_R::new(((self.bits >> 1) & 1) != 0) + pub fn resetting(&self) -> ResettingR { + ResettingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Software reset command"] #[inline(always)] #[must_use] - pub fn swrst(&mut self) -> SWRST_W<0> { - SWRST_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn swrst(&mut self) -> SwrstW { + SwrstW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swrst](index.html) module"] -pub struct SWRST_SPEC; -impl crate::RegisterSpec for SWRST_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`swrst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swrst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SwrstSpec; +impl crate::RegisterSpec for SwrstSpec { type Ux = u32; } -#[doc = "`read()` method returns [swrst::R](R) reader structure"] -impl crate::Readable for SWRST_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [swrst::W](W) writer structure"] -impl crate::Writable for SWRST_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`swrst::R`](R) reader structure"] +impl crate::Readable for SwrstSpec {} +#[doc = "`write(|w| ..)` method takes [`swrst::W`](W) writer structure"] +impl crate::Writable for SwrstSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWRST to value 0"] -impl crate::Resettable for SWRST_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SwrstSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns.rs index 1d2afc0..c0e8de2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns.rs @@ -1,59 +1,115 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + cfg: Cfg, + cmd: Cmd, + _reserved4: [u8; 0x04], + status: Status, + if_: If, + ien: Ien, + lock: Lock, + syncbusy: Syncbusy, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x0c - No Description"] - pub cmd: CMD, - _reserved4: [u8; 0x04], + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x14 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x18 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x1c - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x20 - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x24 - No Description"] - pub syncbusy: SYNCBUSY, + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "No Description"] pub mod syncbusy; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/cfg.rs index fe30338..365ffd5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/cfg.rs @@ -1,998 +1,1002 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLRSRC` reader - WDOG Clear Source"] -pub type CLRSRC_R = crate::BitReader; +pub type W = crate::W; #[doc = "WDOG Clear Source\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLRSRC_A { +pub enum Clrsrc { #[doc = "0: A write to the clear bit will clear the WDOG counter"] - SW = 0, + Sw = 0, #[doc = "1: A rising edge on the PRS Source 0 will clear the WDOG counter"] - PRSSRC0 = 1, + Prssrc0 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLRSRC_A) -> Self { + fn from(variant: Clrsrc) -> Self { variant as u8 != 0 } } -impl CLRSRC_R { +#[doc = "Field `CLRSRC` reader - WDOG Clear Source"] +pub type ClrsrcR = crate::BitReader; +impl ClrsrcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CLRSRC_A { + pub const fn variant(&self) -> Clrsrc { match self.bits { - false => CLRSRC_A::SW, - true => CLRSRC_A::PRSSRC0, + false => Clrsrc::Sw, + true => Clrsrc::Prssrc0, } } - #[doc = "Checks if the value of the field is `SW`"] + #[doc = "A write to the clear bit will clear the WDOG counter"] #[inline(always)] pub fn is_sw(&self) -> bool { - *self == CLRSRC_A::SW + *self == Clrsrc::Sw } - #[doc = "Checks if the value of the field is `PRSSRC0`"] + #[doc = "A rising edge on the PRS Source 0 will clear the WDOG counter"] #[inline(always)] pub fn is_prssrc0(&self) -> bool { - *self == CLRSRC_A::PRSSRC0 + *self == Clrsrc::Prssrc0 } } #[doc = "Field `CLRSRC` writer - WDOG Clear Source"] -pub type CLRSRC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, CLRSRC_A, O>; -impl<'a, const O: u8> CLRSRC_W<'a, O> { +pub type ClrsrcW<'a, REG> = crate::BitWriter<'a, REG, Clrsrc>; +impl<'a, REG> ClrsrcW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "A write to the clear bit will clear the WDOG counter"] #[inline(always)] - pub fn sw(self) -> &'a mut W { - self.variant(CLRSRC_A::SW) + pub fn sw(self) -> &'a mut crate::W { + self.variant(Clrsrc::Sw) } #[doc = "A rising edge on the PRS Source 0 will clear the WDOG counter"] #[inline(always)] - pub fn prssrc0(self) -> &'a mut W { - self.variant(CLRSRC_A::PRSSRC0) + pub fn prssrc0(self) -> &'a mut crate::W { + self.variant(Clrsrc::Prssrc0) } } -#[doc = "Field `EM1RUN` reader - EM1 Run"] -pub type EM1RUN_R = crate::BitReader; #[doc = "EM1 Run\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EM1RUN_A { +pub enum Em1run { #[doc = "0: WDOG timer is frozen in EM1."] - DISABLE = 0, + Disable = 0, #[doc = "1: WDOG timer is running in EM1."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EM1RUN_A) -> Self { + fn from(variant: Em1run) -> Self { variant as u8 != 0 } } -impl EM1RUN_R { +#[doc = "Field `EM1RUN` reader - EM1 Run"] +pub type Em1runR = crate::BitReader; +impl Em1runR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EM1RUN_A { + pub const fn variant(&self) -> Em1run { match self.bits { - false => EM1RUN_A::DISABLE, - true => EM1RUN_A::ENABLE, + false => Em1run::Disable, + true => Em1run::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "WDOG timer is frozen in EM1."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EM1RUN_A::DISABLE + *self == Em1run::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "WDOG timer is running in EM1."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EM1RUN_A::ENABLE + *self == Em1run::Enable } } #[doc = "Field `EM1RUN` writer - EM1 Run"] -pub type EM1RUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, EM1RUN_A, O>; -impl<'a, const O: u8> EM1RUN_W<'a, O> { +pub type Em1runW<'a, REG> = crate::BitWriter<'a, REG, Em1run>; +impl<'a, REG> Em1runW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "WDOG timer is frozen in EM1."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EM1RUN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Em1run::Disable) } #[doc = "WDOG timer is running in EM1."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EM1RUN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Em1run::Enable) } } -#[doc = "Field `EM2RUN` reader - EM2 Run"] -pub type EM2RUN_R = crate::BitReader; #[doc = "EM2 Run\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EM2RUN_A { +pub enum Em2run { #[doc = "0: WDOG timer is frozen in EM2."] - DISABLE = 0, + Disable = 0, #[doc = "1: WDOG timer is running in EM2."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EM2RUN_A) -> Self { + fn from(variant: Em2run) -> Self { variant as u8 != 0 } } -impl EM2RUN_R { +#[doc = "Field `EM2RUN` reader - EM2 Run"] +pub type Em2runR = crate::BitReader; +impl Em2runR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EM2RUN_A { + pub const fn variant(&self) -> Em2run { match self.bits { - false => EM2RUN_A::DISABLE, - true => EM2RUN_A::ENABLE, + false => Em2run::Disable, + true => Em2run::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "WDOG timer is frozen in EM2."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EM2RUN_A::DISABLE + *self == Em2run::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "WDOG timer is running in EM2."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EM2RUN_A::ENABLE + *self == Em2run::Enable } } #[doc = "Field `EM2RUN` writer - EM2 Run"] -pub type EM2RUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, EM2RUN_A, O>; -impl<'a, const O: u8> EM2RUN_W<'a, O> { +pub type Em2runW<'a, REG> = crate::BitWriter<'a, REG, Em2run>; +impl<'a, REG> Em2runW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "WDOG timer is frozen in EM2."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EM2RUN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Em2run::Disable) } #[doc = "WDOG timer is running in EM2."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EM2RUN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Em2run::Enable) } } -#[doc = "Field `EM3RUN` reader - EM3 Run"] -pub type EM3RUN_R = crate::BitReader; #[doc = "EM3 Run\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EM3RUN_A { +pub enum Em3run { #[doc = "0: WDOG timer is frozen in EM3."] - DISABLE = 0, + Disable = 0, #[doc = "1: WDOG timer is running in EM3."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EM3RUN_A) -> Self { + fn from(variant: Em3run) -> Self { variant as u8 != 0 } } -impl EM3RUN_R { +#[doc = "Field `EM3RUN` reader - EM3 Run"] +pub type Em3runR = crate::BitReader; +impl Em3runR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EM3RUN_A { + pub const fn variant(&self) -> Em3run { match self.bits { - false => EM3RUN_A::DISABLE, - true => EM3RUN_A::ENABLE, + false => Em3run::Disable, + true => Em3run::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "WDOG timer is frozen in EM3."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EM3RUN_A::DISABLE + *self == Em3run::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "WDOG timer is running in EM3."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EM3RUN_A::ENABLE + *self == Em3run::Enable } } #[doc = "Field `EM3RUN` writer - EM3 Run"] -pub type EM3RUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, EM3RUN_A, O>; -impl<'a, const O: u8> EM3RUN_W<'a, O> { +pub type Em3runW<'a, REG> = crate::BitWriter<'a, REG, Em3run>; +impl<'a, REG> Em3runW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "WDOG timer is frozen in EM3."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EM3RUN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Em3run::Disable) } #[doc = "WDOG timer is running in EM3."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EM3RUN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Em3run::Enable) } } -#[doc = "Field `EM4BLOCK` reader - EM4 Block"] -pub type EM4BLOCK_R = crate::BitReader; #[doc = "EM4 Block\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EM4BLOCK_A { +pub enum Em4block { #[doc = "0: EM4 can be entered by software. See EMU for detailed description."] - DISABLE = 0, + Disable = 0, #[doc = "1: EM4 cannot be entered by software."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EM4BLOCK_A) -> Self { + fn from(variant: Em4block) -> Self { variant as u8 != 0 } } -impl EM4BLOCK_R { +#[doc = "Field `EM4BLOCK` reader - EM4 Block"] +pub type Em4blockR = crate::BitReader; +impl Em4blockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EM4BLOCK_A { + pub const fn variant(&self) -> Em4block { match self.bits { - false => EM4BLOCK_A::DISABLE, - true => EM4BLOCK_A::ENABLE, + false => Em4block::Disable, + true => Em4block::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "EM4 can be entered by software. See EMU for detailed description."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EM4BLOCK_A::DISABLE + *self == Em4block::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "EM4 cannot be entered by software."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EM4BLOCK_A::ENABLE + *self == Em4block::Enable } } #[doc = "Field `EM4BLOCK` writer - EM4 Block"] -pub type EM4BLOCK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, EM4BLOCK_A, O>; -impl<'a, const O: u8> EM4BLOCK_W<'a, O> { +pub type Em4blockW<'a, REG> = crate::BitWriter<'a, REG, Em4block>; +impl<'a, REG> Em4blockW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "EM4 can be entered by software. See EMU for detailed description."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EM4BLOCK_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Em4block::Disable) } #[doc = "EM4 cannot be entered by software."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EM4BLOCK_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Em4block::Enable) } } -#[doc = "Field `DEBUGRUN` reader - Debug Mode Run"] -pub type DEBUGRUN_R = crate::BitReader; #[doc = "Debug Mode Run\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DEBUGRUN_A { +pub enum Debugrun { #[doc = "0: WDOG timer is frozen in debug mode"] - DISABLE = 0, + Disable = 0, #[doc = "1: WDOG timer is running in debug mode"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DEBUGRUN_A) -> Self { + fn from(variant: Debugrun) -> Self { variant as u8 != 0 } } -impl DEBUGRUN_R { +#[doc = "Field `DEBUGRUN` reader - Debug Mode Run"] +pub type DebugrunR = crate::BitReader; +impl DebugrunR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DEBUGRUN_A { + pub const fn variant(&self) -> Debugrun { match self.bits { - false => DEBUGRUN_A::DISABLE, - true => DEBUGRUN_A::ENABLE, + false => Debugrun::Disable, + true => Debugrun::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "WDOG timer is frozen in debug mode"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == DEBUGRUN_A::DISABLE + *self == Debugrun::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "WDOG timer is running in debug mode"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == DEBUGRUN_A::ENABLE + *self == Debugrun::Enable } } #[doc = "Field `DEBUGRUN` writer - Debug Mode Run"] -pub type DEBUGRUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DEBUGRUN_A, O>; -impl<'a, const O: u8> DEBUGRUN_W<'a, O> { +pub type DebugrunW<'a, REG> = crate::BitWriter<'a, REG, Debugrun>; +impl<'a, REG> DebugrunW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "WDOG timer is frozen in debug mode"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(DEBUGRUN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Debugrun::Disable) } #[doc = "WDOG timer is running in debug mode"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(DEBUGRUN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Debugrun::Enable) } } -#[doc = "Field `WDOGRSTDIS` reader - WDOG Reset Disable"] -pub type WDOGRSTDIS_R = crate::BitReader; #[doc = "WDOG Reset Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WDOGRSTDIS_A { +pub enum Wdogrstdis { #[doc = "0: A timeout will cause a WDOG reset"] - EN = 0, + En = 0, #[doc = "1: A timeout will not cause a WDOG reset"] - DIS = 1, + Dis = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WDOGRSTDIS_A) -> Self { + fn from(variant: Wdogrstdis) -> Self { variant as u8 != 0 } } -impl WDOGRSTDIS_R { +#[doc = "Field `WDOGRSTDIS` reader - WDOG Reset Disable"] +pub type WdogrstdisR = crate::BitReader; +impl WdogrstdisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> WDOGRSTDIS_A { + pub const fn variant(&self) -> Wdogrstdis { match self.bits { - false => WDOGRSTDIS_A::EN, - true => WDOGRSTDIS_A::DIS, + false => Wdogrstdis::En, + true => Wdogrstdis::Dis, } } - #[doc = "Checks if the value of the field is `EN`"] + #[doc = "A timeout will cause a WDOG reset"] #[inline(always)] pub fn is_en(&self) -> bool { - *self == WDOGRSTDIS_A::EN + *self == Wdogrstdis::En } - #[doc = "Checks if the value of the field is `DIS`"] + #[doc = "A timeout will not cause a WDOG reset"] #[inline(always)] pub fn is_dis(&self) -> bool { - *self == WDOGRSTDIS_A::DIS + *self == Wdogrstdis::Dis } } #[doc = "Field `WDOGRSTDIS` writer - WDOG Reset Disable"] -pub type WDOGRSTDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, WDOGRSTDIS_A, O>; -impl<'a, const O: u8> WDOGRSTDIS_W<'a, O> { +pub type WdogrstdisW<'a, REG> = crate::BitWriter<'a, REG, Wdogrstdis>; +impl<'a, REG> WdogrstdisW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "A timeout will cause a WDOG reset"] #[inline(always)] - pub fn en(self) -> &'a mut W { - self.variant(WDOGRSTDIS_A::EN) + pub fn en(self) -> &'a mut crate::W { + self.variant(Wdogrstdis::En) } #[doc = "A timeout will not cause a WDOG reset"] #[inline(always)] - pub fn dis(self) -> &'a mut W { - self.variant(WDOGRSTDIS_A::DIS) + pub fn dis(self) -> &'a mut crate::W { + self.variant(Wdogrstdis::Dis) } } #[doc = "Field `PRS0MISSRSTEN` reader - PRS Src0 Missing Event WDOG Reset"] -pub type PRS0MISSRSTEN_R = crate::BitReader; +pub type Prs0missrstenR = crate::BitReader; #[doc = "Field `PRS0MISSRSTEN` writer - PRS Src0 Missing Event WDOG Reset"] -pub type PRS0MISSRSTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type Prs0missrstenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRS1MISSRSTEN` reader - PRS Src1 Missing Event WDOG Reset"] -pub type PRS1MISSRSTEN_R = crate::BitReader; +pub type Prs1missrstenR = crate::BitReader; #[doc = "Field `PRS1MISSRSTEN` writer - PRS Src1 Missing Event WDOG Reset"] -pub type PRS1MISSRSTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `PERSEL` reader - WDOG Timeout Period Select"] -pub type PERSEL_R = crate::FieldReader; +pub type Prs1missrstenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "WDOG Timeout Period Select\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PERSEL_A { +pub enum Persel { #[doc = "0: Timeout period of 9 wdog cycles"] - SEL0 = 0, + Sel0 = 0, #[doc = "1: Timeout period of 17 wdog cycles"] - SEL1 = 1, + Sel1 = 1, #[doc = "2: Timeout period of 33 wdog cycles"] - SEL2 = 2, + Sel2 = 2, #[doc = "3: Timeout period of 65 wdog cycles"] - SEL3 = 3, + Sel3 = 3, #[doc = "4: Timeout period of 129 wdog cycles"] - SEL4 = 4, + Sel4 = 4, #[doc = "5: Timeout period of 257 wdog cycles"] - SEL5 = 5, + Sel5 = 5, #[doc = "6: Timeout period of 513 wdog cycles"] - SEL6 = 6, + Sel6 = 6, #[doc = "7: Timeout period of 1k wdog cycles"] - SEL7 = 7, + Sel7 = 7, #[doc = "8: Timeout period of 2k wdog cycles"] - SEL8 = 8, + Sel8 = 8, #[doc = "9: Timeout period of 4k wdog cycles"] - SEL9 = 9, + Sel9 = 9, #[doc = "10: Timeout period of 8k wdog cycles"] - SEL10 = 10, + Sel10 = 10, #[doc = "11: Timeout period of 16k wdog cycles"] - SEL11 = 11, + Sel11 = 11, #[doc = "12: Timeout period of 32k wdog cycles"] - SEL12 = 12, + Sel12 = 12, #[doc = "13: Timeout period of 64k wdog cycles"] - SEL13 = 13, + Sel13 = 13, #[doc = "14: Timeout period of 128k wdog cycles"] - SEL14 = 14, + Sel14 = 14, #[doc = "15: Timeout period of 256k wdog cycles"] - SEL15 = 15, + Sel15 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PERSEL_A) -> Self { + fn from(variant: Persel) -> Self { variant as _ } } -impl PERSEL_R { +impl crate::FieldSpec for Persel { + type Ux = u8; +} +impl crate::IsEnum for Persel {} +#[doc = "Field `PERSEL` reader - WDOG Timeout Period Select"] +pub type PerselR = crate::FieldReader; +impl PerselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PERSEL_A { + pub const fn variant(&self) -> Persel { match self.bits { - 0 => PERSEL_A::SEL0, - 1 => PERSEL_A::SEL1, - 2 => PERSEL_A::SEL2, - 3 => PERSEL_A::SEL3, - 4 => PERSEL_A::SEL4, - 5 => PERSEL_A::SEL5, - 6 => PERSEL_A::SEL6, - 7 => PERSEL_A::SEL7, - 8 => PERSEL_A::SEL8, - 9 => PERSEL_A::SEL9, - 10 => PERSEL_A::SEL10, - 11 => PERSEL_A::SEL11, - 12 => PERSEL_A::SEL12, - 13 => PERSEL_A::SEL13, - 14 => PERSEL_A::SEL14, - 15 => PERSEL_A::SEL15, + 0 => Persel::Sel0, + 1 => Persel::Sel1, + 2 => Persel::Sel2, + 3 => Persel::Sel3, + 4 => Persel::Sel4, + 5 => Persel::Sel5, + 6 => Persel::Sel6, + 7 => Persel::Sel7, + 8 => Persel::Sel8, + 9 => Persel::Sel9, + 10 => Persel::Sel10, + 11 => Persel::Sel11, + 12 => Persel::Sel12, + 13 => Persel::Sel13, + 14 => Persel::Sel14, + 15 => Persel::Sel15, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `SEL0`"] + #[doc = "Timeout period of 9 wdog cycles"] #[inline(always)] pub fn is_sel0(&self) -> bool { - *self == PERSEL_A::SEL0 + *self == Persel::Sel0 } - #[doc = "Checks if the value of the field is `SEL1`"] + #[doc = "Timeout period of 17 wdog cycles"] #[inline(always)] pub fn is_sel1(&self) -> bool { - *self == PERSEL_A::SEL1 + *self == Persel::Sel1 } - #[doc = "Checks if the value of the field is `SEL2`"] + #[doc = "Timeout period of 33 wdog cycles"] #[inline(always)] pub fn is_sel2(&self) -> bool { - *self == PERSEL_A::SEL2 + *self == Persel::Sel2 } - #[doc = "Checks if the value of the field is `SEL3`"] + #[doc = "Timeout period of 65 wdog cycles"] #[inline(always)] pub fn is_sel3(&self) -> bool { - *self == PERSEL_A::SEL3 + *self == Persel::Sel3 } - #[doc = "Checks if the value of the field is `SEL4`"] + #[doc = "Timeout period of 129 wdog cycles"] #[inline(always)] pub fn is_sel4(&self) -> bool { - *self == PERSEL_A::SEL4 + *self == Persel::Sel4 } - #[doc = "Checks if the value of the field is `SEL5`"] + #[doc = "Timeout period of 257 wdog cycles"] #[inline(always)] pub fn is_sel5(&self) -> bool { - *self == PERSEL_A::SEL5 + *self == Persel::Sel5 } - #[doc = "Checks if the value of the field is `SEL6`"] + #[doc = "Timeout period of 513 wdog cycles"] #[inline(always)] pub fn is_sel6(&self) -> bool { - *self == PERSEL_A::SEL6 + *self == Persel::Sel6 } - #[doc = "Checks if the value of the field is `SEL7`"] + #[doc = "Timeout period of 1k wdog cycles"] #[inline(always)] pub fn is_sel7(&self) -> bool { - *self == PERSEL_A::SEL7 + *self == Persel::Sel7 } - #[doc = "Checks if the value of the field is `SEL8`"] + #[doc = "Timeout period of 2k wdog cycles"] #[inline(always)] pub fn is_sel8(&self) -> bool { - *self == PERSEL_A::SEL8 + *self == Persel::Sel8 } - #[doc = "Checks if the value of the field is `SEL9`"] + #[doc = "Timeout period of 4k wdog cycles"] #[inline(always)] pub fn is_sel9(&self) -> bool { - *self == PERSEL_A::SEL9 + *self == Persel::Sel9 } - #[doc = "Checks if the value of the field is `SEL10`"] + #[doc = "Timeout period of 8k wdog cycles"] #[inline(always)] pub fn is_sel10(&self) -> bool { - *self == PERSEL_A::SEL10 + *self == Persel::Sel10 } - #[doc = "Checks if the value of the field is `SEL11`"] + #[doc = "Timeout period of 16k wdog cycles"] #[inline(always)] pub fn is_sel11(&self) -> bool { - *self == PERSEL_A::SEL11 + *self == Persel::Sel11 } - #[doc = "Checks if the value of the field is `SEL12`"] + #[doc = "Timeout period of 32k wdog cycles"] #[inline(always)] pub fn is_sel12(&self) -> bool { - *self == PERSEL_A::SEL12 + *self == Persel::Sel12 } - #[doc = "Checks if the value of the field is `SEL13`"] + #[doc = "Timeout period of 64k wdog cycles"] #[inline(always)] pub fn is_sel13(&self) -> bool { - *self == PERSEL_A::SEL13 + *self == Persel::Sel13 } - #[doc = "Checks if the value of the field is `SEL14`"] + #[doc = "Timeout period of 128k wdog cycles"] #[inline(always)] pub fn is_sel14(&self) -> bool { - *self == PERSEL_A::SEL14 + *self == Persel::Sel14 } - #[doc = "Checks if the value of the field is `SEL15`"] + #[doc = "Timeout period of 256k wdog cycles"] #[inline(always)] pub fn is_sel15(&self) -> bool { - *self == PERSEL_A::SEL15 + *self == Persel::Sel15 } } #[doc = "Field `PERSEL` writer - WDOG Timeout Period Select"] -pub type PERSEL_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, PERSEL_A, 4, O>; -impl<'a, const O: u8> PERSEL_W<'a, O> { +pub type PerselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Persel, crate::Safe>; +impl<'a, REG> PerselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Timeout period of 9 wdog cycles"] #[inline(always)] - pub fn sel0(self) -> &'a mut W { - self.variant(PERSEL_A::SEL0) + pub fn sel0(self) -> &'a mut crate::W { + self.variant(Persel::Sel0) } #[doc = "Timeout period of 17 wdog cycles"] #[inline(always)] - pub fn sel1(self) -> &'a mut W { - self.variant(PERSEL_A::SEL1) + pub fn sel1(self) -> &'a mut crate::W { + self.variant(Persel::Sel1) } #[doc = "Timeout period of 33 wdog cycles"] #[inline(always)] - pub fn sel2(self) -> &'a mut W { - self.variant(PERSEL_A::SEL2) + pub fn sel2(self) -> &'a mut crate::W { + self.variant(Persel::Sel2) } #[doc = "Timeout period of 65 wdog cycles"] #[inline(always)] - pub fn sel3(self) -> &'a mut W { - self.variant(PERSEL_A::SEL3) + pub fn sel3(self) -> &'a mut crate::W { + self.variant(Persel::Sel3) } #[doc = "Timeout period of 129 wdog cycles"] #[inline(always)] - pub fn sel4(self) -> &'a mut W { - self.variant(PERSEL_A::SEL4) + pub fn sel4(self) -> &'a mut crate::W { + self.variant(Persel::Sel4) } #[doc = "Timeout period of 257 wdog cycles"] #[inline(always)] - pub fn sel5(self) -> &'a mut W { - self.variant(PERSEL_A::SEL5) + pub fn sel5(self) -> &'a mut crate::W { + self.variant(Persel::Sel5) } #[doc = "Timeout period of 513 wdog cycles"] #[inline(always)] - pub fn sel6(self) -> &'a mut W { - self.variant(PERSEL_A::SEL6) + pub fn sel6(self) -> &'a mut crate::W { + self.variant(Persel::Sel6) } #[doc = "Timeout period of 1k wdog cycles"] #[inline(always)] - pub fn sel7(self) -> &'a mut W { - self.variant(PERSEL_A::SEL7) + pub fn sel7(self) -> &'a mut crate::W { + self.variant(Persel::Sel7) } #[doc = "Timeout period of 2k wdog cycles"] #[inline(always)] - pub fn sel8(self) -> &'a mut W { - self.variant(PERSEL_A::SEL8) + pub fn sel8(self) -> &'a mut crate::W { + self.variant(Persel::Sel8) } #[doc = "Timeout period of 4k wdog cycles"] #[inline(always)] - pub fn sel9(self) -> &'a mut W { - self.variant(PERSEL_A::SEL9) + pub fn sel9(self) -> &'a mut crate::W { + self.variant(Persel::Sel9) } #[doc = "Timeout period of 8k wdog cycles"] #[inline(always)] - pub fn sel10(self) -> &'a mut W { - self.variant(PERSEL_A::SEL10) + pub fn sel10(self) -> &'a mut crate::W { + self.variant(Persel::Sel10) } #[doc = "Timeout period of 16k wdog cycles"] #[inline(always)] - pub fn sel11(self) -> &'a mut W { - self.variant(PERSEL_A::SEL11) + pub fn sel11(self) -> &'a mut crate::W { + self.variant(Persel::Sel11) } #[doc = "Timeout period of 32k wdog cycles"] #[inline(always)] - pub fn sel12(self) -> &'a mut W { - self.variant(PERSEL_A::SEL12) + pub fn sel12(self) -> &'a mut crate::W { + self.variant(Persel::Sel12) } #[doc = "Timeout period of 64k wdog cycles"] #[inline(always)] - pub fn sel13(self) -> &'a mut W { - self.variant(PERSEL_A::SEL13) + pub fn sel13(self) -> &'a mut crate::W { + self.variant(Persel::Sel13) } #[doc = "Timeout period of 128k wdog cycles"] #[inline(always)] - pub fn sel14(self) -> &'a mut W { - self.variant(PERSEL_A::SEL14) + pub fn sel14(self) -> &'a mut crate::W { + self.variant(Persel::Sel14) } #[doc = "Timeout period of 256k wdog cycles"] #[inline(always)] - pub fn sel15(self) -> &'a mut W { - self.variant(PERSEL_A::SEL15) + pub fn sel15(self) -> &'a mut crate::W { + self.variant(Persel::Sel15) } } -#[doc = "Field `WARNSEL` reader - WDOG Warning Period Select"] -pub type WARNSEL_R = crate::FieldReader; #[doc = "WDOG Warning Period Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WARNSEL_A { +pub enum Warnsel { #[doc = "0: Disable"] - DIS = 0, + Dis = 0, #[doc = "1: Warning timeout is 25% of the Timeout."] - SEL1 = 1, + Sel1 = 1, #[doc = "2: Warning timeout is 50% of the Timeout."] - SEL2 = 2, + Sel2 = 2, #[doc = "3: Warning timeout is 75% of the Timeout."] - SEL3 = 3, + Sel3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WARNSEL_A) -> Self { + fn from(variant: Warnsel) -> Self { variant as _ } } -impl WARNSEL_R { +impl crate::FieldSpec for Warnsel { + type Ux = u8; +} +impl crate::IsEnum for Warnsel {} +#[doc = "Field `WARNSEL` reader - WDOG Warning Period Select"] +pub type WarnselR = crate::FieldReader; +impl WarnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> WARNSEL_A { + pub const fn variant(&self) -> Warnsel { match self.bits { - 0 => WARNSEL_A::DIS, - 1 => WARNSEL_A::SEL1, - 2 => WARNSEL_A::SEL2, - 3 => WARNSEL_A::SEL3, + 0 => Warnsel::Dis, + 1 => Warnsel::Sel1, + 2 => Warnsel::Sel2, + 3 => Warnsel::Sel3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DIS`"] + #[doc = "Disable"] #[inline(always)] pub fn is_dis(&self) -> bool { - *self == WARNSEL_A::DIS + *self == Warnsel::Dis } - #[doc = "Checks if the value of the field is `SEL1`"] + #[doc = "Warning timeout is 25% of the Timeout."] #[inline(always)] pub fn is_sel1(&self) -> bool { - *self == WARNSEL_A::SEL1 + *self == Warnsel::Sel1 } - #[doc = "Checks if the value of the field is `SEL2`"] + #[doc = "Warning timeout is 50% of the Timeout."] #[inline(always)] pub fn is_sel2(&self) -> bool { - *self == WARNSEL_A::SEL2 + *self == Warnsel::Sel2 } - #[doc = "Checks if the value of the field is `SEL3`"] + #[doc = "Warning timeout is 75% of the Timeout."] #[inline(always)] pub fn is_sel3(&self) -> bool { - *self == WARNSEL_A::SEL3 + *self == Warnsel::Sel3 } } #[doc = "Field `WARNSEL` writer - WDOG Warning Period Select"] -pub type WARNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, WARNSEL_A, 2, O>; -impl<'a, const O: u8> WARNSEL_W<'a, O> { +pub type WarnselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Warnsel, crate::Safe>; +impl<'a, REG> WarnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Disable"] #[inline(always)] - pub fn dis(self) -> &'a mut W { - self.variant(WARNSEL_A::DIS) + pub fn dis(self) -> &'a mut crate::W { + self.variant(Warnsel::Dis) } #[doc = "Warning timeout is 25% of the Timeout."] #[inline(always)] - pub fn sel1(self) -> &'a mut W { - self.variant(WARNSEL_A::SEL1) + pub fn sel1(self) -> &'a mut crate::W { + self.variant(Warnsel::Sel1) } #[doc = "Warning timeout is 50% of the Timeout."] #[inline(always)] - pub fn sel2(self) -> &'a mut W { - self.variant(WARNSEL_A::SEL2) + pub fn sel2(self) -> &'a mut crate::W { + self.variant(Warnsel::Sel2) } #[doc = "Warning timeout is 75% of the Timeout."] #[inline(always)] - pub fn sel3(self) -> &'a mut W { - self.variant(WARNSEL_A::SEL3) + pub fn sel3(self) -> &'a mut crate::W { + self.variant(Warnsel::Sel3) } } -#[doc = "Field `WINSEL` reader - WDOG Illegal Window Select"] -pub type WINSEL_R = crate::FieldReader; #[doc = "WDOG Illegal Window Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WINSEL_A { +pub enum Winsel { #[doc = "0: Disabled."] - DIS = 0, + Dis = 0, #[doc = "1: Window timeout is 12.5% of the Timeout."] - SEL1 = 1, + Sel1 = 1, #[doc = "2: Window timeout is 25% of the Timeout."] - SEL2 = 2, + Sel2 = 2, #[doc = "3: Window timeout is 37.5% of the Timeout."] - SEL3 = 3, + Sel3 = 3, #[doc = "4: Window timeout is 50% of the Timeout."] - SEL4 = 4, + Sel4 = 4, #[doc = "5: Window timeout is 62.5% of the Timeout."] - SEL5 = 5, + Sel5 = 5, #[doc = "6: Window timeout is 75.5% of the Timeout."] - SEL6 = 6, + Sel6 = 6, #[doc = "7: Window timeout is 87.5% of the Timeout."] - SEL7 = 7, + Sel7 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WINSEL_A) -> Self { + fn from(variant: Winsel) -> Self { variant as _ } } -impl WINSEL_R { +impl crate::FieldSpec for Winsel { + type Ux = u8; +} +impl crate::IsEnum for Winsel {} +#[doc = "Field `WINSEL` reader - WDOG Illegal Window Select"] +pub type WinselR = crate::FieldReader; +impl WinselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> WINSEL_A { + pub const fn variant(&self) -> Winsel { match self.bits { - 0 => WINSEL_A::DIS, - 1 => WINSEL_A::SEL1, - 2 => WINSEL_A::SEL2, - 3 => WINSEL_A::SEL3, - 4 => WINSEL_A::SEL4, - 5 => WINSEL_A::SEL5, - 6 => WINSEL_A::SEL6, - 7 => WINSEL_A::SEL7, + 0 => Winsel::Dis, + 1 => Winsel::Sel1, + 2 => Winsel::Sel2, + 3 => Winsel::Sel3, + 4 => Winsel::Sel4, + 5 => Winsel::Sel5, + 6 => Winsel::Sel6, + 7 => Winsel::Sel7, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DIS`"] + #[doc = "Disabled."] #[inline(always)] pub fn is_dis(&self) -> bool { - *self == WINSEL_A::DIS + *self == Winsel::Dis } - #[doc = "Checks if the value of the field is `SEL1`"] + #[doc = "Window timeout is 12.5% of the Timeout."] #[inline(always)] pub fn is_sel1(&self) -> bool { - *self == WINSEL_A::SEL1 + *self == Winsel::Sel1 } - #[doc = "Checks if the value of the field is `SEL2`"] + #[doc = "Window timeout is 25% of the Timeout."] #[inline(always)] pub fn is_sel2(&self) -> bool { - *self == WINSEL_A::SEL2 + *self == Winsel::Sel2 } - #[doc = "Checks if the value of the field is `SEL3`"] + #[doc = "Window timeout is 37.5% of the Timeout."] #[inline(always)] pub fn is_sel3(&self) -> bool { - *self == WINSEL_A::SEL3 + *self == Winsel::Sel3 } - #[doc = "Checks if the value of the field is `SEL4`"] + #[doc = "Window timeout is 50% of the Timeout."] #[inline(always)] pub fn is_sel4(&self) -> bool { - *self == WINSEL_A::SEL4 + *self == Winsel::Sel4 } - #[doc = "Checks if the value of the field is `SEL5`"] + #[doc = "Window timeout is 62.5% of the Timeout."] #[inline(always)] pub fn is_sel5(&self) -> bool { - *self == WINSEL_A::SEL5 + *self == Winsel::Sel5 } - #[doc = "Checks if the value of the field is `SEL6`"] + #[doc = "Window timeout is 75.5% of the Timeout."] #[inline(always)] pub fn is_sel6(&self) -> bool { - *self == WINSEL_A::SEL6 + *self == Winsel::Sel6 } - #[doc = "Checks if the value of the field is `SEL7`"] + #[doc = "Window timeout is 87.5% of the Timeout."] #[inline(always)] pub fn is_sel7(&self) -> bool { - *self == WINSEL_A::SEL7 + *self == Winsel::Sel7 } } #[doc = "Field `WINSEL` writer - WDOG Illegal Window Select"] -pub type WINSEL_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, WINSEL_A, 3, O>; -impl<'a, const O: u8> WINSEL_W<'a, O> { +pub type WinselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Winsel, crate::Safe>; +impl<'a, REG> WinselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Disabled."] #[inline(always)] - pub fn dis(self) -> &'a mut W { - self.variant(WINSEL_A::DIS) + pub fn dis(self) -> &'a mut crate::W { + self.variant(Winsel::Dis) } #[doc = "Window timeout is 12.5% of the Timeout."] #[inline(always)] - pub fn sel1(self) -> &'a mut W { - self.variant(WINSEL_A::SEL1) + pub fn sel1(self) -> &'a mut crate::W { + self.variant(Winsel::Sel1) } #[doc = "Window timeout is 25% of the Timeout."] #[inline(always)] - pub fn sel2(self) -> &'a mut W { - self.variant(WINSEL_A::SEL2) + pub fn sel2(self) -> &'a mut crate::W { + self.variant(Winsel::Sel2) } #[doc = "Window timeout is 37.5% of the Timeout."] #[inline(always)] - pub fn sel3(self) -> &'a mut W { - self.variant(WINSEL_A::SEL3) + pub fn sel3(self) -> &'a mut crate::W { + self.variant(Winsel::Sel3) } #[doc = "Window timeout is 50% of the Timeout."] #[inline(always)] - pub fn sel4(self) -> &'a mut W { - self.variant(WINSEL_A::SEL4) + pub fn sel4(self) -> &'a mut crate::W { + self.variant(Winsel::Sel4) } #[doc = "Window timeout is 62.5% of the Timeout."] #[inline(always)] - pub fn sel5(self) -> &'a mut W { - self.variant(WINSEL_A::SEL5) + pub fn sel5(self) -> &'a mut crate::W { + self.variant(Winsel::Sel5) } #[doc = "Window timeout is 75.5% of the Timeout."] #[inline(always)] - pub fn sel6(self) -> &'a mut W { - self.variant(WINSEL_A::SEL6) + pub fn sel6(self) -> &'a mut crate::W { + self.variant(Winsel::Sel6) } #[doc = "Window timeout is 87.5% of the Timeout."] #[inline(always)] - pub fn sel7(self) -> &'a mut W { - self.variant(WINSEL_A::SEL7) + pub fn sel7(self) -> &'a mut crate::W { + self.variant(Winsel::Sel7) } } impl R { #[doc = "Bit 0 - WDOG Clear Source"] #[inline(always)] - pub fn clrsrc(&self) -> CLRSRC_R { - CLRSRC_R::new((self.bits & 1) != 0) + pub fn clrsrc(&self) -> ClrsrcR { + ClrsrcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - EM1 Run"] #[inline(always)] - pub fn em1run(&self) -> EM1RUN_R { - EM1RUN_R::new(((self.bits >> 1) & 1) != 0) + pub fn em1run(&self) -> Em1runR { + Em1runR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - EM2 Run"] #[inline(always)] - pub fn em2run(&self) -> EM2RUN_R { - EM2RUN_R::new(((self.bits >> 2) & 1) != 0) + pub fn em2run(&self) -> Em2runR { + Em2runR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - EM3 Run"] #[inline(always)] - pub fn em3run(&self) -> EM3RUN_R { - EM3RUN_R::new(((self.bits >> 3) & 1) != 0) + pub fn em3run(&self) -> Em3runR { + Em3runR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - EM4 Block"] #[inline(always)] - pub fn em4block(&self) -> EM4BLOCK_R { - EM4BLOCK_R::new(((self.bits >> 4) & 1) != 0) + pub fn em4block(&self) -> Em4blockR { + Em4blockR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Debug Mode Run"] #[inline(always)] - pub fn debugrun(&self) -> DEBUGRUN_R { - DEBUGRUN_R::new(((self.bits >> 5) & 1) != 0) + pub fn debugrun(&self) -> DebugrunR { + DebugrunR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 8 - WDOG Reset Disable"] #[inline(always)] - pub fn wdogrstdis(&self) -> WDOGRSTDIS_R { - WDOGRSTDIS_R::new(((self.bits >> 8) & 1) != 0) + pub fn wdogrstdis(&self) -> WdogrstdisR { + WdogrstdisR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - PRS Src0 Missing Event WDOG Reset"] #[inline(always)] - pub fn prs0missrsten(&self) -> PRS0MISSRSTEN_R { - PRS0MISSRSTEN_R::new(((self.bits >> 9) & 1) != 0) + pub fn prs0missrsten(&self) -> Prs0missrstenR { + Prs0missrstenR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - PRS Src1 Missing Event WDOG Reset"] #[inline(always)] - pub fn prs1missrsten(&self) -> PRS1MISSRSTEN_R { - PRS1MISSRSTEN_R::new(((self.bits >> 10) & 1) != 0) + pub fn prs1missrsten(&self) -> Prs1missrstenR { + Prs1missrstenR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bits 16:19 - WDOG Timeout Period Select"] #[inline(always)] - pub fn persel(&self) -> PERSEL_R { - PERSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn persel(&self) -> PerselR { + PerselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:25 - WDOG Warning Period Select"] #[inline(always)] - pub fn warnsel(&self) -> WARNSEL_R { - WARNSEL_R::new(((self.bits >> 24) & 3) as u8) + pub fn warnsel(&self) -> WarnselR { + WarnselR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 28:30 - WDOG Illegal Window Select"] #[inline(always)] - pub fn winsel(&self) -> WINSEL_R { - WINSEL_R::new(((self.bits >> 28) & 7) as u8) + pub fn winsel(&self) -> WinselR { + WinselR::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bit 0 - WDOG Clear Source"] #[inline(always)] #[must_use] - pub fn clrsrc(&mut self) -> CLRSRC_W<0> { - CLRSRC_W::new(self) + pub fn clrsrc(&mut self) -> ClrsrcW { + ClrsrcW::new(self, 0) } #[doc = "Bit 1 - EM1 Run"] #[inline(always)] #[must_use] - pub fn em1run(&mut self) -> EM1RUN_W<1> { - EM1RUN_W::new(self) + pub fn em1run(&mut self) -> Em1runW { + Em1runW::new(self, 1) } #[doc = "Bit 2 - EM2 Run"] #[inline(always)] #[must_use] - pub fn em2run(&mut self) -> EM2RUN_W<2> { - EM2RUN_W::new(self) + pub fn em2run(&mut self) -> Em2runW { + Em2runW::new(self, 2) } #[doc = "Bit 3 - EM3 Run"] #[inline(always)] #[must_use] - pub fn em3run(&mut self) -> EM3RUN_W<3> { - EM3RUN_W::new(self) + pub fn em3run(&mut self) -> Em3runW { + Em3runW::new(self, 3) } #[doc = "Bit 4 - EM4 Block"] #[inline(always)] #[must_use] - pub fn em4block(&mut self) -> EM4BLOCK_W<4> { - EM4BLOCK_W::new(self) + pub fn em4block(&mut self) -> Em4blockW { + Em4blockW::new(self, 4) } #[doc = "Bit 5 - Debug Mode Run"] #[inline(always)] #[must_use] - pub fn debugrun(&mut self) -> DEBUGRUN_W<5> { - DEBUGRUN_W::new(self) + pub fn debugrun(&mut self) -> DebugrunW { + DebugrunW::new(self, 5) } #[doc = "Bit 8 - WDOG Reset Disable"] #[inline(always)] #[must_use] - pub fn wdogrstdis(&mut self) -> WDOGRSTDIS_W<8> { - WDOGRSTDIS_W::new(self) + pub fn wdogrstdis(&mut self) -> WdogrstdisW { + WdogrstdisW::new(self, 8) } #[doc = "Bit 9 - PRS Src0 Missing Event WDOG Reset"] #[inline(always)] #[must_use] - pub fn prs0missrsten(&mut self) -> PRS0MISSRSTEN_W<9> { - PRS0MISSRSTEN_W::new(self) + pub fn prs0missrsten(&mut self) -> Prs0missrstenW { + Prs0missrstenW::new(self, 9) } #[doc = "Bit 10 - PRS Src1 Missing Event WDOG Reset"] #[inline(always)] #[must_use] - pub fn prs1missrsten(&mut self) -> PRS1MISSRSTEN_W<10> { - PRS1MISSRSTEN_W::new(self) + pub fn prs1missrsten(&mut self) -> Prs1missrstenW { + Prs1missrstenW::new(self, 10) } #[doc = "Bits 16:19 - WDOG Timeout Period Select"] #[inline(always)] #[must_use] - pub fn persel(&mut self) -> PERSEL_W<16> { - PERSEL_W::new(self) + pub fn persel(&mut self) -> PerselW { + PerselW::new(self, 16) } #[doc = "Bits 24:25 - WDOG Warning Period Select"] #[inline(always)] #[must_use] - pub fn warnsel(&mut self) -> WARNSEL_W<24> { - WARNSEL_W::new(self) + pub fn warnsel(&mut self) -> WarnselW { + WarnselW::new(self, 24) } #[doc = "Bits 28:30 - WDOG Illegal Window Select"] #[inline(always)] #[must_use] - pub fn winsel(&mut self) -> WINSEL_W<28> { - WINSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn winsel(&mut self) -> WinselW { + WinselW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0x000f_0000"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x000f_0000; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0x000f_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/cmd.rs index bcf759a..925f1fc 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/cmd.rs @@ -1,78 +1,56 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "WDOG Timer Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLEAR_AW { +pub enum Clear { #[doc = "0: WDOG timer is unchanged."] - UNCHANGED = 0, + Unchanged = 0, #[doc = "1: WDOG timer is cleared to 0."] - CLEARED = 1, + Cleared = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLEAR_AW) -> Self { + fn from(variant: Clear) -> Self { variant as u8 != 0 } } #[doc = "Field `CLEAR` writer - WDOG Timer Clear"] -pub type CLEAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, CLEAR_AW, O>; -impl<'a, const O: u8> CLEAR_W<'a, O> { +pub type ClearW<'a, REG> = crate::BitWriter<'a, REG, Clear>; +impl<'a, REG> ClearW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "WDOG timer is unchanged."] #[inline(always)] - pub fn unchanged(self) -> &'a mut W { - self.variant(CLEAR_AW::UNCHANGED) + pub fn unchanged(self) -> &'a mut crate::W { + self.variant(Clear::Unchanged) } #[doc = "WDOG timer is cleared to 0."] #[inline(always)] - pub fn cleared(self) -> &'a mut W { - self.variant(CLEAR_AW::CLEARED) + pub fn cleared(self) -> &'a mut crate::W { + self.variant(Clear::Cleared) } } impl W { #[doc = "Bit 0 - WDOG Timer Clear"] #[inline(always)] #[must_use] - pub fn clear(&mut self) -> CLEAR_W<0> { - CLEAR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clear(&mut self) -> ClearW { + ClearW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/en.rs index bd67dfd..d831021 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Module Enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Module Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disabling busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Module Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disabling busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Module Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/ien.rs index f30100e..98d5e03 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/ien.rs @@ -1,140 +1,100 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOUT` reader - WDOG Timeout Interrupt Enable"] -pub type TOUT_R = crate::BitReader; +pub type ToutR = crate::BitReader; #[doc = "Field `TOUT` writer - WDOG Timeout Interrupt Enable"] -pub type TOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ToutW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WARN` reader - WDOG Warning Timeout Interrupt Enable"] -pub type WARN_R = crate::BitReader; +pub type WarnR = crate::BitReader; #[doc = "Field `WARN` writer - WDOG Warning Timeout Interrupt Enable"] -pub type WARN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type WarnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WIN` reader - WDOG Window Interrupt Enable"] -pub type WIN_R = crate::BitReader; +pub type WinR = crate::BitReader; #[doc = "Field `WIN` writer - WDOG Window Interrupt Enable"] -pub type WIN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type WinW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PEM0` reader - PRS Src0 Event Missing Interrupt Enable"] -pub type PEM0_R = crate::BitReader; +pub type Pem0R = crate::BitReader; #[doc = "Field `PEM0` writer - PRS Src0 Event Missing Interrupt Enable"] -pub type PEM0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Pem0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PEM1` reader - PRS Src1 Event Missing Interrupt Enable"] -pub type PEM1_R = crate::BitReader; +pub type Pem1R = crate::BitReader; #[doc = "Field `PEM1` writer - PRS Src1 Event Missing Interrupt Enable"] -pub type PEM1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Pem1W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - WDOG Timeout Interrupt Enable"] #[inline(always)] - pub fn tout(&self) -> TOUT_R { - TOUT_R::new((self.bits & 1) != 0) + pub fn tout(&self) -> ToutR { + ToutR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - WDOG Warning Timeout Interrupt Enable"] #[inline(always)] - pub fn warn(&self) -> WARN_R { - WARN_R::new(((self.bits >> 1) & 1) != 0) + pub fn warn(&self) -> WarnR { + WarnR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - WDOG Window Interrupt Enable"] #[inline(always)] - pub fn win(&self) -> WIN_R { - WIN_R::new(((self.bits >> 2) & 1) != 0) + pub fn win(&self) -> WinR { + WinR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - PRS Src0 Event Missing Interrupt Enable"] #[inline(always)] - pub fn pem0(&self) -> PEM0_R { - PEM0_R::new(((self.bits >> 3) & 1) != 0) + pub fn pem0(&self) -> Pem0R { + Pem0R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - PRS Src1 Event Missing Interrupt Enable"] #[inline(always)] - pub fn pem1(&self) -> PEM1_R { - PEM1_R::new(((self.bits >> 4) & 1) != 0) + pub fn pem1(&self) -> Pem1R { + Pem1R::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - WDOG Timeout Interrupt Enable"] #[inline(always)] #[must_use] - pub fn tout(&mut self) -> TOUT_W<0> { - TOUT_W::new(self) + pub fn tout(&mut self) -> ToutW { + ToutW::new(self, 0) } #[doc = "Bit 1 - WDOG Warning Timeout Interrupt Enable"] #[inline(always)] #[must_use] - pub fn warn(&mut self) -> WARN_W<1> { - WARN_W::new(self) + pub fn warn(&mut self) -> WarnW { + WarnW::new(self, 1) } #[doc = "Bit 2 - WDOG Window Interrupt Enable"] #[inline(always)] #[must_use] - pub fn win(&mut self) -> WIN_W<2> { - WIN_W::new(self) + pub fn win(&mut self) -> WinW { + WinW::new(self, 2) } #[doc = "Bit 3 - PRS Src0 Event Missing Interrupt Enable"] #[inline(always)] #[must_use] - pub fn pem0(&mut self) -> PEM0_W<3> { - PEM0_W::new(self) + pub fn pem0(&mut self) -> Pem0W { + Pem0W::new(self, 3) } #[doc = "Bit 4 - PRS Src1 Event Missing Interrupt Enable"] #[inline(always)] #[must_use] - pub fn pem1(&mut self) -> PEM1_W<4> { - PEM1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pem1(&mut self) -> Pem1W { + Pem1W::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/if_.rs index 3c5ca4c..30a8c97 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/if_.rs @@ -1,140 +1,100 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOUT` reader - WDOG Timeout Interrupt Flag"] -pub type TOUT_R = crate::BitReader; +pub type ToutR = crate::BitReader; #[doc = "Field `TOUT` writer - WDOG Timeout Interrupt Flag"] -pub type TOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ToutW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WARN` reader - WDOG Warning Timeout Interrupt Flag"] -pub type WARN_R = crate::BitReader; +pub type WarnR = crate::BitReader; #[doc = "Field `WARN` writer - WDOG Warning Timeout Interrupt Flag"] -pub type WARN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type WarnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WIN` reader - WDOG Window Interrupt Flag"] -pub type WIN_R = crate::BitReader; +pub type WinR = crate::BitReader; #[doc = "Field `WIN` writer - WDOG Window Interrupt Flag"] -pub type WIN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type WinW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PEM0` reader - PRS Src0 Event Missing Interrupt Flag"] -pub type PEM0_R = crate::BitReader; +pub type Pem0R = crate::BitReader; #[doc = "Field `PEM0` writer - PRS Src0 Event Missing Interrupt Flag"] -pub type PEM0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Pem0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PEM1` reader - PRS Src1 Event Missing Interrupt Flag"] -pub type PEM1_R = crate::BitReader; +pub type Pem1R = crate::BitReader; #[doc = "Field `PEM1` writer - PRS Src1 Event Missing Interrupt Flag"] -pub type PEM1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Pem1W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - WDOG Timeout Interrupt Flag"] #[inline(always)] - pub fn tout(&self) -> TOUT_R { - TOUT_R::new((self.bits & 1) != 0) + pub fn tout(&self) -> ToutR { + ToutR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - WDOG Warning Timeout Interrupt Flag"] #[inline(always)] - pub fn warn(&self) -> WARN_R { - WARN_R::new(((self.bits >> 1) & 1) != 0) + pub fn warn(&self) -> WarnR { + WarnR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - WDOG Window Interrupt Flag"] #[inline(always)] - pub fn win(&self) -> WIN_R { - WIN_R::new(((self.bits >> 2) & 1) != 0) + pub fn win(&self) -> WinR { + WinR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - PRS Src0 Event Missing Interrupt Flag"] #[inline(always)] - pub fn pem0(&self) -> PEM0_R { - PEM0_R::new(((self.bits >> 3) & 1) != 0) + pub fn pem0(&self) -> Pem0R { + Pem0R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - PRS Src1 Event Missing Interrupt Flag"] #[inline(always)] - pub fn pem1(&self) -> PEM1_R { - PEM1_R::new(((self.bits >> 4) & 1) != 0) + pub fn pem1(&self) -> Pem1R { + Pem1R::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - WDOG Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn tout(&mut self) -> TOUT_W<0> { - TOUT_W::new(self) + pub fn tout(&mut self) -> ToutW { + ToutW::new(self, 0) } #[doc = "Bit 1 - WDOG Warning Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn warn(&mut self) -> WARN_W<1> { - WARN_W::new(self) + pub fn warn(&mut self) -> WarnW { + WarnW::new(self, 1) } #[doc = "Bit 2 - WDOG Window Interrupt Flag"] #[inline(always)] #[must_use] - pub fn win(&mut self) -> WIN_W<2> { - WIN_W::new(self) + pub fn win(&mut self) -> WinW { + WinW::new(self, 2) } #[doc = "Bit 3 - PRS Src0 Event Missing Interrupt Flag"] #[inline(always)] #[must_use] - pub fn pem0(&mut self) -> PEM0_W<3> { - PEM0_W::new(self) + pub fn pem0(&mut self) -> Pem0W { + Pem0W::new(self, 3) } #[doc = "Bit 4 - PRS Src1 Event Missing Interrupt Flag"] #[inline(always)] #[must_use] - pub fn pem1(&mut self) -> PEM1_W<4> { - PEM1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pem1(&mut self) -> Pem1W { + Pem1W::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/ipversion.rs index ad2c166..23b42d5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/lock.rs index b24c0b5..748fd84 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/lock.rs @@ -1,80 +1,62 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "WDOG Configuration Lock\n\nValue on reset: 44008"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "0: Lock WDOG lockable registers"] - LOCK = 0, + Lock = 0, #[doc = "44008: Unlock WDOG lockable registers"] - UNLOCK = 44008, + Unlock = 44008, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - WDOG Configuration Lock"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Lock WDOG lockable registers"] #[inline(always)] - pub fn lock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::LOCK) + pub fn lock(self) -> &'a mut crate::W { + self.variant(Lockkey::Lock) } #[doc = "Unlock WDOG lockable registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - WDOG Configuration Lock"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0xabe8"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0xabe8; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0xabe8; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/status.rs index 15e4f04..1c88571 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/status.rs @@ -1,71 +1,56 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `LOCK` reader - WDOG Configuration Lock Status"] -pub type LOCK_R = crate::BitReader; +pub type R = crate::R; #[doc = "WDOG Configuration Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCK_A { +pub enum Lock { #[doc = "0: All WDOG lockable registers are unlocked."] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: All WDOG lockable registers are locked."] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCK_A) -> Self { + fn from(variant: Lock) -> Self { variant as u8 != 0 } } -impl LOCK_R { +#[doc = "Field `LOCK` reader - WDOG Configuration Lock Status"] +pub type LockR = crate::BitReader; +impl LockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCK_A { + pub const fn variant(&self) -> Lock { match self.bits { - false => LOCK_A::UNLOCKED, - true => LOCK_A::LOCKED, + false => Lock::Unlocked, + true => Lock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "All WDOG lockable registers are unlocked."] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCK_A::UNLOCKED + *self == Lock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "All WDOG lockable registers are locked."] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCK_A::LOCKED + *self == Lock::Locked } } impl R { #[doc = "Bit 31 - WDOG Configuration Lock Status"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new(((self.bits >> 31) & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/syncbusy.rs index dfc12b2..a25871a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_ns/syncbusy.rs @@ -1,37 +1,22 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CMD` reader - Sync Busy for Cmd Register"] -pub type CMD_R = crate::BitReader; +pub type CmdR = crate::BitReader; impl R { #[doc = "Bit 0 - Sync Busy for Cmd Register"] #[inline(always)] - pub fn cmd(&self) -> CMD_R { - CMD_R::new((self.bits & 1) != 0) + pub fn cmd(&self) -> CmdR { + CmdR::new((self.bits & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s.rs index 1d2afc0..c0e8de2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s.rs @@ -1,59 +1,115 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + cfg: Cfg, + cmd: Cmd, + _reserved4: [u8; 0x04], + status: Status, + if_: If, + ien: Ien, + lock: Lock, + syncbusy: Syncbusy, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x0c - No Description"] - pub cmd: CMD, - _reserved4: [u8; 0x04], + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x14 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x18 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x1c - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x20 - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x24 - No Description"] - pub syncbusy: SYNCBUSY, + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "No Description"] pub mod syncbusy; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/cfg.rs index fe30338..365ffd5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/cfg.rs @@ -1,998 +1,1002 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLRSRC` reader - WDOG Clear Source"] -pub type CLRSRC_R = crate::BitReader; +pub type W = crate::W; #[doc = "WDOG Clear Source\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLRSRC_A { +pub enum Clrsrc { #[doc = "0: A write to the clear bit will clear the WDOG counter"] - SW = 0, + Sw = 0, #[doc = "1: A rising edge on the PRS Source 0 will clear the WDOG counter"] - PRSSRC0 = 1, + Prssrc0 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLRSRC_A) -> Self { + fn from(variant: Clrsrc) -> Self { variant as u8 != 0 } } -impl CLRSRC_R { +#[doc = "Field `CLRSRC` reader - WDOG Clear Source"] +pub type ClrsrcR = crate::BitReader; +impl ClrsrcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CLRSRC_A { + pub const fn variant(&self) -> Clrsrc { match self.bits { - false => CLRSRC_A::SW, - true => CLRSRC_A::PRSSRC0, + false => Clrsrc::Sw, + true => Clrsrc::Prssrc0, } } - #[doc = "Checks if the value of the field is `SW`"] + #[doc = "A write to the clear bit will clear the WDOG counter"] #[inline(always)] pub fn is_sw(&self) -> bool { - *self == CLRSRC_A::SW + *self == Clrsrc::Sw } - #[doc = "Checks if the value of the field is `PRSSRC0`"] + #[doc = "A rising edge on the PRS Source 0 will clear the WDOG counter"] #[inline(always)] pub fn is_prssrc0(&self) -> bool { - *self == CLRSRC_A::PRSSRC0 + *self == Clrsrc::Prssrc0 } } #[doc = "Field `CLRSRC` writer - WDOG Clear Source"] -pub type CLRSRC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, CLRSRC_A, O>; -impl<'a, const O: u8> CLRSRC_W<'a, O> { +pub type ClrsrcW<'a, REG> = crate::BitWriter<'a, REG, Clrsrc>; +impl<'a, REG> ClrsrcW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "A write to the clear bit will clear the WDOG counter"] #[inline(always)] - pub fn sw(self) -> &'a mut W { - self.variant(CLRSRC_A::SW) + pub fn sw(self) -> &'a mut crate::W { + self.variant(Clrsrc::Sw) } #[doc = "A rising edge on the PRS Source 0 will clear the WDOG counter"] #[inline(always)] - pub fn prssrc0(self) -> &'a mut W { - self.variant(CLRSRC_A::PRSSRC0) + pub fn prssrc0(self) -> &'a mut crate::W { + self.variant(Clrsrc::Prssrc0) } } -#[doc = "Field `EM1RUN` reader - EM1 Run"] -pub type EM1RUN_R = crate::BitReader; #[doc = "EM1 Run\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EM1RUN_A { +pub enum Em1run { #[doc = "0: WDOG timer is frozen in EM1."] - DISABLE = 0, + Disable = 0, #[doc = "1: WDOG timer is running in EM1."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EM1RUN_A) -> Self { + fn from(variant: Em1run) -> Self { variant as u8 != 0 } } -impl EM1RUN_R { +#[doc = "Field `EM1RUN` reader - EM1 Run"] +pub type Em1runR = crate::BitReader; +impl Em1runR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EM1RUN_A { + pub const fn variant(&self) -> Em1run { match self.bits { - false => EM1RUN_A::DISABLE, - true => EM1RUN_A::ENABLE, + false => Em1run::Disable, + true => Em1run::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "WDOG timer is frozen in EM1."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EM1RUN_A::DISABLE + *self == Em1run::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "WDOG timer is running in EM1."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EM1RUN_A::ENABLE + *self == Em1run::Enable } } #[doc = "Field `EM1RUN` writer - EM1 Run"] -pub type EM1RUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, EM1RUN_A, O>; -impl<'a, const O: u8> EM1RUN_W<'a, O> { +pub type Em1runW<'a, REG> = crate::BitWriter<'a, REG, Em1run>; +impl<'a, REG> Em1runW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "WDOG timer is frozen in EM1."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EM1RUN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Em1run::Disable) } #[doc = "WDOG timer is running in EM1."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EM1RUN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Em1run::Enable) } } -#[doc = "Field `EM2RUN` reader - EM2 Run"] -pub type EM2RUN_R = crate::BitReader; #[doc = "EM2 Run\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EM2RUN_A { +pub enum Em2run { #[doc = "0: WDOG timer is frozen in EM2."] - DISABLE = 0, + Disable = 0, #[doc = "1: WDOG timer is running in EM2."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EM2RUN_A) -> Self { + fn from(variant: Em2run) -> Self { variant as u8 != 0 } } -impl EM2RUN_R { +#[doc = "Field `EM2RUN` reader - EM2 Run"] +pub type Em2runR = crate::BitReader; +impl Em2runR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EM2RUN_A { + pub const fn variant(&self) -> Em2run { match self.bits { - false => EM2RUN_A::DISABLE, - true => EM2RUN_A::ENABLE, + false => Em2run::Disable, + true => Em2run::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "WDOG timer is frozen in EM2."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EM2RUN_A::DISABLE + *self == Em2run::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "WDOG timer is running in EM2."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EM2RUN_A::ENABLE + *self == Em2run::Enable } } #[doc = "Field `EM2RUN` writer - EM2 Run"] -pub type EM2RUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, EM2RUN_A, O>; -impl<'a, const O: u8> EM2RUN_W<'a, O> { +pub type Em2runW<'a, REG> = crate::BitWriter<'a, REG, Em2run>; +impl<'a, REG> Em2runW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "WDOG timer is frozen in EM2."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EM2RUN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Em2run::Disable) } #[doc = "WDOG timer is running in EM2."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EM2RUN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Em2run::Enable) } } -#[doc = "Field `EM3RUN` reader - EM3 Run"] -pub type EM3RUN_R = crate::BitReader; #[doc = "EM3 Run\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EM3RUN_A { +pub enum Em3run { #[doc = "0: WDOG timer is frozen in EM3."] - DISABLE = 0, + Disable = 0, #[doc = "1: WDOG timer is running in EM3."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EM3RUN_A) -> Self { + fn from(variant: Em3run) -> Self { variant as u8 != 0 } } -impl EM3RUN_R { +#[doc = "Field `EM3RUN` reader - EM3 Run"] +pub type Em3runR = crate::BitReader; +impl Em3runR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EM3RUN_A { + pub const fn variant(&self) -> Em3run { match self.bits { - false => EM3RUN_A::DISABLE, - true => EM3RUN_A::ENABLE, + false => Em3run::Disable, + true => Em3run::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "WDOG timer is frozen in EM3."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EM3RUN_A::DISABLE + *self == Em3run::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "WDOG timer is running in EM3."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EM3RUN_A::ENABLE + *self == Em3run::Enable } } #[doc = "Field `EM3RUN` writer - EM3 Run"] -pub type EM3RUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, EM3RUN_A, O>; -impl<'a, const O: u8> EM3RUN_W<'a, O> { +pub type Em3runW<'a, REG> = crate::BitWriter<'a, REG, Em3run>; +impl<'a, REG> Em3runW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "WDOG timer is frozen in EM3."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EM3RUN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Em3run::Disable) } #[doc = "WDOG timer is running in EM3."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EM3RUN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Em3run::Enable) } } -#[doc = "Field `EM4BLOCK` reader - EM4 Block"] -pub type EM4BLOCK_R = crate::BitReader; #[doc = "EM4 Block\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EM4BLOCK_A { +pub enum Em4block { #[doc = "0: EM4 can be entered by software. See EMU for detailed description."] - DISABLE = 0, + Disable = 0, #[doc = "1: EM4 cannot be entered by software."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EM4BLOCK_A) -> Self { + fn from(variant: Em4block) -> Self { variant as u8 != 0 } } -impl EM4BLOCK_R { +#[doc = "Field `EM4BLOCK` reader - EM4 Block"] +pub type Em4blockR = crate::BitReader; +impl Em4blockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EM4BLOCK_A { + pub const fn variant(&self) -> Em4block { match self.bits { - false => EM4BLOCK_A::DISABLE, - true => EM4BLOCK_A::ENABLE, + false => Em4block::Disable, + true => Em4block::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "EM4 can be entered by software. See EMU for detailed description."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EM4BLOCK_A::DISABLE + *self == Em4block::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "EM4 cannot be entered by software."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EM4BLOCK_A::ENABLE + *self == Em4block::Enable } } #[doc = "Field `EM4BLOCK` writer - EM4 Block"] -pub type EM4BLOCK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, EM4BLOCK_A, O>; -impl<'a, const O: u8> EM4BLOCK_W<'a, O> { +pub type Em4blockW<'a, REG> = crate::BitWriter<'a, REG, Em4block>; +impl<'a, REG> Em4blockW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "EM4 can be entered by software. See EMU for detailed description."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EM4BLOCK_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Em4block::Disable) } #[doc = "EM4 cannot be entered by software."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EM4BLOCK_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Em4block::Enable) } } -#[doc = "Field `DEBUGRUN` reader - Debug Mode Run"] -pub type DEBUGRUN_R = crate::BitReader; #[doc = "Debug Mode Run\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DEBUGRUN_A { +pub enum Debugrun { #[doc = "0: WDOG timer is frozen in debug mode"] - DISABLE = 0, + Disable = 0, #[doc = "1: WDOG timer is running in debug mode"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DEBUGRUN_A) -> Self { + fn from(variant: Debugrun) -> Self { variant as u8 != 0 } } -impl DEBUGRUN_R { +#[doc = "Field `DEBUGRUN` reader - Debug Mode Run"] +pub type DebugrunR = crate::BitReader; +impl DebugrunR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DEBUGRUN_A { + pub const fn variant(&self) -> Debugrun { match self.bits { - false => DEBUGRUN_A::DISABLE, - true => DEBUGRUN_A::ENABLE, + false => Debugrun::Disable, + true => Debugrun::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "WDOG timer is frozen in debug mode"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == DEBUGRUN_A::DISABLE + *self == Debugrun::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "WDOG timer is running in debug mode"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == DEBUGRUN_A::ENABLE + *self == Debugrun::Enable } } #[doc = "Field `DEBUGRUN` writer - Debug Mode Run"] -pub type DEBUGRUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DEBUGRUN_A, O>; -impl<'a, const O: u8> DEBUGRUN_W<'a, O> { +pub type DebugrunW<'a, REG> = crate::BitWriter<'a, REG, Debugrun>; +impl<'a, REG> DebugrunW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "WDOG timer is frozen in debug mode"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(DEBUGRUN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Debugrun::Disable) } #[doc = "WDOG timer is running in debug mode"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(DEBUGRUN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Debugrun::Enable) } } -#[doc = "Field `WDOGRSTDIS` reader - WDOG Reset Disable"] -pub type WDOGRSTDIS_R = crate::BitReader; #[doc = "WDOG Reset Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WDOGRSTDIS_A { +pub enum Wdogrstdis { #[doc = "0: A timeout will cause a WDOG reset"] - EN = 0, + En = 0, #[doc = "1: A timeout will not cause a WDOG reset"] - DIS = 1, + Dis = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WDOGRSTDIS_A) -> Self { + fn from(variant: Wdogrstdis) -> Self { variant as u8 != 0 } } -impl WDOGRSTDIS_R { +#[doc = "Field `WDOGRSTDIS` reader - WDOG Reset Disable"] +pub type WdogrstdisR = crate::BitReader; +impl WdogrstdisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> WDOGRSTDIS_A { + pub const fn variant(&self) -> Wdogrstdis { match self.bits { - false => WDOGRSTDIS_A::EN, - true => WDOGRSTDIS_A::DIS, + false => Wdogrstdis::En, + true => Wdogrstdis::Dis, } } - #[doc = "Checks if the value of the field is `EN`"] + #[doc = "A timeout will cause a WDOG reset"] #[inline(always)] pub fn is_en(&self) -> bool { - *self == WDOGRSTDIS_A::EN + *self == Wdogrstdis::En } - #[doc = "Checks if the value of the field is `DIS`"] + #[doc = "A timeout will not cause a WDOG reset"] #[inline(always)] pub fn is_dis(&self) -> bool { - *self == WDOGRSTDIS_A::DIS + *self == Wdogrstdis::Dis } } #[doc = "Field `WDOGRSTDIS` writer - WDOG Reset Disable"] -pub type WDOGRSTDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, WDOGRSTDIS_A, O>; -impl<'a, const O: u8> WDOGRSTDIS_W<'a, O> { +pub type WdogrstdisW<'a, REG> = crate::BitWriter<'a, REG, Wdogrstdis>; +impl<'a, REG> WdogrstdisW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "A timeout will cause a WDOG reset"] #[inline(always)] - pub fn en(self) -> &'a mut W { - self.variant(WDOGRSTDIS_A::EN) + pub fn en(self) -> &'a mut crate::W { + self.variant(Wdogrstdis::En) } #[doc = "A timeout will not cause a WDOG reset"] #[inline(always)] - pub fn dis(self) -> &'a mut W { - self.variant(WDOGRSTDIS_A::DIS) + pub fn dis(self) -> &'a mut crate::W { + self.variant(Wdogrstdis::Dis) } } #[doc = "Field `PRS0MISSRSTEN` reader - PRS Src0 Missing Event WDOG Reset"] -pub type PRS0MISSRSTEN_R = crate::BitReader; +pub type Prs0missrstenR = crate::BitReader; #[doc = "Field `PRS0MISSRSTEN` writer - PRS Src0 Missing Event WDOG Reset"] -pub type PRS0MISSRSTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type Prs0missrstenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRS1MISSRSTEN` reader - PRS Src1 Missing Event WDOG Reset"] -pub type PRS1MISSRSTEN_R = crate::BitReader; +pub type Prs1missrstenR = crate::BitReader; #[doc = "Field `PRS1MISSRSTEN` writer - PRS Src1 Missing Event WDOG Reset"] -pub type PRS1MISSRSTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `PERSEL` reader - WDOG Timeout Period Select"] -pub type PERSEL_R = crate::FieldReader; +pub type Prs1missrstenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "WDOG Timeout Period Select\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PERSEL_A { +pub enum Persel { #[doc = "0: Timeout period of 9 wdog cycles"] - SEL0 = 0, + Sel0 = 0, #[doc = "1: Timeout period of 17 wdog cycles"] - SEL1 = 1, + Sel1 = 1, #[doc = "2: Timeout period of 33 wdog cycles"] - SEL2 = 2, + Sel2 = 2, #[doc = "3: Timeout period of 65 wdog cycles"] - SEL3 = 3, + Sel3 = 3, #[doc = "4: Timeout period of 129 wdog cycles"] - SEL4 = 4, + Sel4 = 4, #[doc = "5: Timeout period of 257 wdog cycles"] - SEL5 = 5, + Sel5 = 5, #[doc = "6: Timeout period of 513 wdog cycles"] - SEL6 = 6, + Sel6 = 6, #[doc = "7: Timeout period of 1k wdog cycles"] - SEL7 = 7, + Sel7 = 7, #[doc = "8: Timeout period of 2k wdog cycles"] - SEL8 = 8, + Sel8 = 8, #[doc = "9: Timeout period of 4k wdog cycles"] - SEL9 = 9, + Sel9 = 9, #[doc = "10: Timeout period of 8k wdog cycles"] - SEL10 = 10, + Sel10 = 10, #[doc = "11: Timeout period of 16k wdog cycles"] - SEL11 = 11, + Sel11 = 11, #[doc = "12: Timeout period of 32k wdog cycles"] - SEL12 = 12, + Sel12 = 12, #[doc = "13: Timeout period of 64k wdog cycles"] - SEL13 = 13, + Sel13 = 13, #[doc = "14: Timeout period of 128k wdog cycles"] - SEL14 = 14, + Sel14 = 14, #[doc = "15: Timeout period of 256k wdog cycles"] - SEL15 = 15, + Sel15 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PERSEL_A) -> Self { + fn from(variant: Persel) -> Self { variant as _ } } -impl PERSEL_R { +impl crate::FieldSpec for Persel { + type Ux = u8; +} +impl crate::IsEnum for Persel {} +#[doc = "Field `PERSEL` reader - WDOG Timeout Period Select"] +pub type PerselR = crate::FieldReader; +impl PerselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PERSEL_A { + pub const fn variant(&self) -> Persel { match self.bits { - 0 => PERSEL_A::SEL0, - 1 => PERSEL_A::SEL1, - 2 => PERSEL_A::SEL2, - 3 => PERSEL_A::SEL3, - 4 => PERSEL_A::SEL4, - 5 => PERSEL_A::SEL5, - 6 => PERSEL_A::SEL6, - 7 => PERSEL_A::SEL7, - 8 => PERSEL_A::SEL8, - 9 => PERSEL_A::SEL9, - 10 => PERSEL_A::SEL10, - 11 => PERSEL_A::SEL11, - 12 => PERSEL_A::SEL12, - 13 => PERSEL_A::SEL13, - 14 => PERSEL_A::SEL14, - 15 => PERSEL_A::SEL15, + 0 => Persel::Sel0, + 1 => Persel::Sel1, + 2 => Persel::Sel2, + 3 => Persel::Sel3, + 4 => Persel::Sel4, + 5 => Persel::Sel5, + 6 => Persel::Sel6, + 7 => Persel::Sel7, + 8 => Persel::Sel8, + 9 => Persel::Sel9, + 10 => Persel::Sel10, + 11 => Persel::Sel11, + 12 => Persel::Sel12, + 13 => Persel::Sel13, + 14 => Persel::Sel14, + 15 => Persel::Sel15, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `SEL0`"] + #[doc = "Timeout period of 9 wdog cycles"] #[inline(always)] pub fn is_sel0(&self) -> bool { - *self == PERSEL_A::SEL0 + *self == Persel::Sel0 } - #[doc = "Checks if the value of the field is `SEL1`"] + #[doc = "Timeout period of 17 wdog cycles"] #[inline(always)] pub fn is_sel1(&self) -> bool { - *self == PERSEL_A::SEL1 + *self == Persel::Sel1 } - #[doc = "Checks if the value of the field is `SEL2`"] + #[doc = "Timeout period of 33 wdog cycles"] #[inline(always)] pub fn is_sel2(&self) -> bool { - *self == PERSEL_A::SEL2 + *self == Persel::Sel2 } - #[doc = "Checks if the value of the field is `SEL3`"] + #[doc = "Timeout period of 65 wdog cycles"] #[inline(always)] pub fn is_sel3(&self) -> bool { - *self == PERSEL_A::SEL3 + *self == Persel::Sel3 } - #[doc = "Checks if the value of the field is `SEL4`"] + #[doc = "Timeout period of 129 wdog cycles"] #[inline(always)] pub fn is_sel4(&self) -> bool { - *self == PERSEL_A::SEL4 + *self == Persel::Sel4 } - #[doc = "Checks if the value of the field is `SEL5`"] + #[doc = "Timeout period of 257 wdog cycles"] #[inline(always)] pub fn is_sel5(&self) -> bool { - *self == PERSEL_A::SEL5 + *self == Persel::Sel5 } - #[doc = "Checks if the value of the field is `SEL6`"] + #[doc = "Timeout period of 513 wdog cycles"] #[inline(always)] pub fn is_sel6(&self) -> bool { - *self == PERSEL_A::SEL6 + *self == Persel::Sel6 } - #[doc = "Checks if the value of the field is `SEL7`"] + #[doc = "Timeout period of 1k wdog cycles"] #[inline(always)] pub fn is_sel7(&self) -> bool { - *self == PERSEL_A::SEL7 + *self == Persel::Sel7 } - #[doc = "Checks if the value of the field is `SEL8`"] + #[doc = "Timeout period of 2k wdog cycles"] #[inline(always)] pub fn is_sel8(&self) -> bool { - *self == PERSEL_A::SEL8 + *self == Persel::Sel8 } - #[doc = "Checks if the value of the field is `SEL9`"] + #[doc = "Timeout period of 4k wdog cycles"] #[inline(always)] pub fn is_sel9(&self) -> bool { - *self == PERSEL_A::SEL9 + *self == Persel::Sel9 } - #[doc = "Checks if the value of the field is `SEL10`"] + #[doc = "Timeout period of 8k wdog cycles"] #[inline(always)] pub fn is_sel10(&self) -> bool { - *self == PERSEL_A::SEL10 + *self == Persel::Sel10 } - #[doc = "Checks if the value of the field is `SEL11`"] + #[doc = "Timeout period of 16k wdog cycles"] #[inline(always)] pub fn is_sel11(&self) -> bool { - *self == PERSEL_A::SEL11 + *self == Persel::Sel11 } - #[doc = "Checks if the value of the field is `SEL12`"] + #[doc = "Timeout period of 32k wdog cycles"] #[inline(always)] pub fn is_sel12(&self) -> bool { - *self == PERSEL_A::SEL12 + *self == Persel::Sel12 } - #[doc = "Checks if the value of the field is `SEL13`"] + #[doc = "Timeout period of 64k wdog cycles"] #[inline(always)] pub fn is_sel13(&self) -> bool { - *self == PERSEL_A::SEL13 + *self == Persel::Sel13 } - #[doc = "Checks if the value of the field is `SEL14`"] + #[doc = "Timeout period of 128k wdog cycles"] #[inline(always)] pub fn is_sel14(&self) -> bool { - *self == PERSEL_A::SEL14 + *self == Persel::Sel14 } - #[doc = "Checks if the value of the field is `SEL15`"] + #[doc = "Timeout period of 256k wdog cycles"] #[inline(always)] pub fn is_sel15(&self) -> bool { - *self == PERSEL_A::SEL15 + *self == Persel::Sel15 } } #[doc = "Field `PERSEL` writer - WDOG Timeout Period Select"] -pub type PERSEL_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, PERSEL_A, 4, O>; -impl<'a, const O: u8> PERSEL_W<'a, O> { +pub type PerselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Persel, crate::Safe>; +impl<'a, REG> PerselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Timeout period of 9 wdog cycles"] #[inline(always)] - pub fn sel0(self) -> &'a mut W { - self.variant(PERSEL_A::SEL0) + pub fn sel0(self) -> &'a mut crate::W { + self.variant(Persel::Sel0) } #[doc = "Timeout period of 17 wdog cycles"] #[inline(always)] - pub fn sel1(self) -> &'a mut W { - self.variant(PERSEL_A::SEL1) + pub fn sel1(self) -> &'a mut crate::W { + self.variant(Persel::Sel1) } #[doc = "Timeout period of 33 wdog cycles"] #[inline(always)] - pub fn sel2(self) -> &'a mut W { - self.variant(PERSEL_A::SEL2) + pub fn sel2(self) -> &'a mut crate::W { + self.variant(Persel::Sel2) } #[doc = "Timeout period of 65 wdog cycles"] #[inline(always)] - pub fn sel3(self) -> &'a mut W { - self.variant(PERSEL_A::SEL3) + pub fn sel3(self) -> &'a mut crate::W { + self.variant(Persel::Sel3) } #[doc = "Timeout period of 129 wdog cycles"] #[inline(always)] - pub fn sel4(self) -> &'a mut W { - self.variant(PERSEL_A::SEL4) + pub fn sel4(self) -> &'a mut crate::W { + self.variant(Persel::Sel4) } #[doc = "Timeout period of 257 wdog cycles"] #[inline(always)] - pub fn sel5(self) -> &'a mut W { - self.variant(PERSEL_A::SEL5) + pub fn sel5(self) -> &'a mut crate::W { + self.variant(Persel::Sel5) } #[doc = "Timeout period of 513 wdog cycles"] #[inline(always)] - pub fn sel6(self) -> &'a mut W { - self.variant(PERSEL_A::SEL6) + pub fn sel6(self) -> &'a mut crate::W { + self.variant(Persel::Sel6) } #[doc = "Timeout period of 1k wdog cycles"] #[inline(always)] - pub fn sel7(self) -> &'a mut W { - self.variant(PERSEL_A::SEL7) + pub fn sel7(self) -> &'a mut crate::W { + self.variant(Persel::Sel7) } #[doc = "Timeout period of 2k wdog cycles"] #[inline(always)] - pub fn sel8(self) -> &'a mut W { - self.variant(PERSEL_A::SEL8) + pub fn sel8(self) -> &'a mut crate::W { + self.variant(Persel::Sel8) } #[doc = "Timeout period of 4k wdog cycles"] #[inline(always)] - pub fn sel9(self) -> &'a mut W { - self.variant(PERSEL_A::SEL9) + pub fn sel9(self) -> &'a mut crate::W { + self.variant(Persel::Sel9) } #[doc = "Timeout period of 8k wdog cycles"] #[inline(always)] - pub fn sel10(self) -> &'a mut W { - self.variant(PERSEL_A::SEL10) + pub fn sel10(self) -> &'a mut crate::W { + self.variant(Persel::Sel10) } #[doc = "Timeout period of 16k wdog cycles"] #[inline(always)] - pub fn sel11(self) -> &'a mut W { - self.variant(PERSEL_A::SEL11) + pub fn sel11(self) -> &'a mut crate::W { + self.variant(Persel::Sel11) } #[doc = "Timeout period of 32k wdog cycles"] #[inline(always)] - pub fn sel12(self) -> &'a mut W { - self.variant(PERSEL_A::SEL12) + pub fn sel12(self) -> &'a mut crate::W { + self.variant(Persel::Sel12) } #[doc = "Timeout period of 64k wdog cycles"] #[inline(always)] - pub fn sel13(self) -> &'a mut W { - self.variant(PERSEL_A::SEL13) + pub fn sel13(self) -> &'a mut crate::W { + self.variant(Persel::Sel13) } #[doc = "Timeout period of 128k wdog cycles"] #[inline(always)] - pub fn sel14(self) -> &'a mut W { - self.variant(PERSEL_A::SEL14) + pub fn sel14(self) -> &'a mut crate::W { + self.variant(Persel::Sel14) } #[doc = "Timeout period of 256k wdog cycles"] #[inline(always)] - pub fn sel15(self) -> &'a mut W { - self.variant(PERSEL_A::SEL15) + pub fn sel15(self) -> &'a mut crate::W { + self.variant(Persel::Sel15) } } -#[doc = "Field `WARNSEL` reader - WDOG Warning Period Select"] -pub type WARNSEL_R = crate::FieldReader; #[doc = "WDOG Warning Period Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WARNSEL_A { +pub enum Warnsel { #[doc = "0: Disable"] - DIS = 0, + Dis = 0, #[doc = "1: Warning timeout is 25% of the Timeout."] - SEL1 = 1, + Sel1 = 1, #[doc = "2: Warning timeout is 50% of the Timeout."] - SEL2 = 2, + Sel2 = 2, #[doc = "3: Warning timeout is 75% of the Timeout."] - SEL3 = 3, + Sel3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WARNSEL_A) -> Self { + fn from(variant: Warnsel) -> Self { variant as _ } } -impl WARNSEL_R { +impl crate::FieldSpec for Warnsel { + type Ux = u8; +} +impl crate::IsEnum for Warnsel {} +#[doc = "Field `WARNSEL` reader - WDOG Warning Period Select"] +pub type WarnselR = crate::FieldReader; +impl WarnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> WARNSEL_A { + pub const fn variant(&self) -> Warnsel { match self.bits { - 0 => WARNSEL_A::DIS, - 1 => WARNSEL_A::SEL1, - 2 => WARNSEL_A::SEL2, - 3 => WARNSEL_A::SEL3, + 0 => Warnsel::Dis, + 1 => Warnsel::Sel1, + 2 => Warnsel::Sel2, + 3 => Warnsel::Sel3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DIS`"] + #[doc = "Disable"] #[inline(always)] pub fn is_dis(&self) -> bool { - *self == WARNSEL_A::DIS + *self == Warnsel::Dis } - #[doc = "Checks if the value of the field is `SEL1`"] + #[doc = "Warning timeout is 25% of the Timeout."] #[inline(always)] pub fn is_sel1(&self) -> bool { - *self == WARNSEL_A::SEL1 + *self == Warnsel::Sel1 } - #[doc = "Checks if the value of the field is `SEL2`"] + #[doc = "Warning timeout is 50% of the Timeout."] #[inline(always)] pub fn is_sel2(&self) -> bool { - *self == WARNSEL_A::SEL2 + *self == Warnsel::Sel2 } - #[doc = "Checks if the value of the field is `SEL3`"] + #[doc = "Warning timeout is 75% of the Timeout."] #[inline(always)] pub fn is_sel3(&self) -> bool { - *self == WARNSEL_A::SEL3 + *self == Warnsel::Sel3 } } #[doc = "Field `WARNSEL` writer - WDOG Warning Period Select"] -pub type WARNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, WARNSEL_A, 2, O>; -impl<'a, const O: u8> WARNSEL_W<'a, O> { +pub type WarnselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Warnsel, crate::Safe>; +impl<'a, REG> WarnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Disable"] #[inline(always)] - pub fn dis(self) -> &'a mut W { - self.variant(WARNSEL_A::DIS) + pub fn dis(self) -> &'a mut crate::W { + self.variant(Warnsel::Dis) } #[doc = "Warning timeout is 25% of the Timeout."] #[inline(always)] - pub fn sel1(self) -> &'a mut W { - self.variant(WARNSEL_A::SEL1) + pub fn sel1(self) -> &'a mut crate::W { + self.variant(Warnsel::Sel1) } #[doc = "Warning timeout is 50% of the Timeout."] #[inline(always)] - pub fn sel2(self) -> &'a mut W { - self.variant(WARNSEL_A::SEL2) + pub fn sel2(self) -> &'a mut crate::W { + self.variant(Warnsel::Sel2) } #[doc = "Warning timeout is 75% of the Timeout."] #[inline(always)] - pub fn sel3(self) -> &'a mut W { - self.variant(WARNSEL_A::SEL3) + pub fn sel3(self) -> &'a mut crate::W { + self.variant(Warnsel::Sel3) } } -#[doc = "Field `WINSEL` reader - WDOG Illegal Window Select"] -pub type WINSEL_R = crate::FieldReader; #[doc = "WDOG Illegal Window Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WINSEL_A { +pub enum Winsel { #[doc = "0: Disabled."] - DIS = 0, + Dis = 0, #[doc = "1: Window timeout is 12.5% of the Timeout."] - SEL1 = 1, + Sel1 = 1, #[doc = "2: Window timeout is 25% of the Timeout."] - SEL2 = 2, + Sel2 = 2, #[doc = "3: Window timeout is 37.5% of the Timeout."] - SEL3 = 3, + Sel3 = 3, #[doc = "4: Window timeout is 50% of the Timeout."] - SEL4 = 4, + Sel4 = 4, #[doc = "5: Window timeout is 62.5% of the Timeout."] - SEL5 = 5, + Sel5 = 5, #[doc = "6: Window timeout is 75.5% of the Timeout."] - SEL6 = 6, + Sel6 = 6, #[doc = "7: Window timeout is 87.5% of the Timeout."] - SEL7 = 7, + Sel7 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WINSEL_A) -> Self { + fn from(variant: Winsel) -> Self { variant as _ } } -impl WINSEL_R { +impl crate::FieldSpec for Winsel { + type Ux = u8; +} +impl crate::IsEnum for Winsel {} +#[doc = "Field `WINSEL` reader - WDOG Illegal Window Select"] +pub type WinselR = crate::FieldReader; +impl WinselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> WINSEL_A { + pub const fn variant(&self) -> Winsel { match self.bits { - 0 => WINSEL_A::DIS, - 1 => WINSEL_A::SEL1, - 2 => WINSEL_A::SEL2, - 3 => WINSEL_A::SEL3, - 4 => WINSEL_A::SEL4, - 5 => WINSEL_A::SEL5, - 6 => WINSEL_A::SEL6, - 7 => WINSEL_A::SEL7, + 0 => Winsel::Dis, + 1 => Winsel::Sel1, + 2 => Winsel::Sel2, + 3 => Winsel::Sel3, + 4 => Winsel::Sel4, + 5 => Winsel::Sel5, + 6 => Winsel::Sel6, + 7 => Winsel::Sel7, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DIS`"] + #[doc = "Disabled."] #[inline(always)] pub fn is_dis(&self) -> bool { - *self == WINSEL_A::DIS + *self == Winsel::Dis } - #[doc = "Checks if the value of the field is `SEL1`"] + #[doc = "Window timeout is 12.5% of the Timeout."] #[inline(always)] pub fn is_sel1(&self) -> bool { - *self == WINSEL_A::SEL1 + *self == Winsel::Sel1 } - #[doc = "Checks if the value of the field is `SEL2`"] + #[doc = "Window timeout is 25% of the Timeout."] #[inline(always)] pub fn is_sel2(&self) -> bool { - *self == WINSEL_A::SEL2 + *self == Winsel::Sel2 } - #[doc = "Checks if the value of the field is `SEL3`"] + #[doc = "Window timeout is 37.5% of the Timeout."] #[inline(always)] pub fn is_sel3(&self) -> bool { - *self == WINSEL_A::SEL3 + *self == Winsel::Sel3 } - #[doc = "Checks if the value of the field is `SEL4`"] + #[doc = "Window timeout is 50% of the Timeout."] #[inline(always)] pub fn is_sel4(&self) -> bool { - *self == WINSEL_A::SEL4 + *self == Winsel::Sel4 } - #[doc = "Checks if the value of the field is `SEL5`"] + #[doc = "Window timeout is 62.5% of the Timeout."] #[inline(always)] pub fn is_sel5(&self) -> bool { - *self == WINSEL_A::SEL5 + *self == Winsel::Sel5 } - #[doc = "Checks if the value of the field is `SEL6`"] + #[doc = "Window timeout is 75.5% of the Timeout."] #[inline(always)] pub fn is_sel6(&self) -> bool { - *self == WINSEL_A::SEL6 + *self == Winsel::Sel6 } - #[doc = "Checks if the value of the field is `SEL7`"] + #[doc = "Window timeout is 87.5% of the Timeout."] #[inline(always)] pub fn is_sel7(&self) -> bool { - *self == WINSEL_A::SEL7 + *self == Winsel::Sel7 } } #[doc = "Field `WINSEL` writer - WDOG Illegal Window Select"] -pub type WINSEL_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, WINSEL_A, 3, O>; -impl<'a, const O: u8> WINSEL_W<'a, O> { +pub type WinselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Winsel, crate::Safe>; +impl<'a, REG> WinselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Disabled."] #[inline(always)] - pub fn dis(self) -> &'a mut W { - self.variant(WINSEL_A::DIS) + pub fn dis(self) -> &'a mut crate::W { + self.variant(Winsel::Dis) } #[doc = "Window timeout is 12.5% of the Timeout."] #[inline(always)] - pub fn sel1(self) -> &'a mut W { - self.variant(WINSEL_A::SEL1) + pub fn sel1(self) -> &'a mut crate::W { + self.variant(Winsel::Sel1) } #[doc = "Window timeout is 25% of the Timeout."] #[inline(always)] - pub fn sel2(self) -> &'a mut W { - self.variant(WINSEL_A::SEL2) + pub fn sel2(self) -> &'a mut crate::W { + self.variant(Winsel::Sel2) } #[doc = "Window timeout is 37.5% of the Timeout."] #[inline(always)] - pub fn sel3(self) -> &'a mut W { - self.variant(WINSEL_A::SEL3) + pub fn sel3(self) -> &'a mut crate::W { + self.variant(Winsel::Sel3) } #[doc = "Window timeout is 50% of the Timeout."] #[inline(always)] - pub fn sel4(self) -> &'a mut W { - self.variant(WINSEL_A::SEL4) + pub fn sel4(self) -> &'a mut crate::W { + self.variant(Winsel::Sel4) } #[doc = "Window timeout is 62.5% of the Timeout."] #[inline(always)] - pub fn sel5(self) -> &'a mut W { - self.variant(WINSEL_A::SEL5) + pub fn sel5(self) -> &'a mut crate::W { + self.variant(Winsel::Sel5) } #[doc = "Window timeout is 75.5% of the Timeout."] #[inline(always)] - pub fn sel6(self) -> &'a mut W { - self.variant(WINSEL_A::SEL6) + pub fn sel6(self) -> &'a mut crate::W { + self.variant(Winsel::Sel6) } #[doc = "Window timeout is 87.5% of the Timeout."] #[inline(always)] - pub fn sel7(self) -> &'a mut W { - self.variant(WINSEL_A::SEL7) + pub fn sel7(self) -> &'a mut crate::W { + self.variant(Winsel::Sel7) } } impl R { #[doc = "Bit 0 - WDOG Clear Source"] #[inline(always)] - pub fn clrsrc(&self) -> CLRSRC_R { - CLRSRC_R::new((self.bits & 1) != 0) + pub fn clrsrc(&self) -> ClrsrcR { + ClrsrcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - EM1 Run"] #[inline(always)] - pub fn em1run(&self) -> EM1RUN_R { - EM1RUN_R::new(((self.bits >> 1) & 1) != 0) + pub fn em1run(&self) -> Em1runR { + Em1runR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - EM2 Run"] #[inline(always)] - pub fn em2run(&self) -> EM2RUN_R { - EM2RUN_R::new(((self.bits >> 2) & 1) != 0) + pub fn em2run(&self) -> Em2runR { + Em2runR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - EM3 Run"] #[inline(always)] - pub fn em3run(&self) -> EM3RUN_R { - EM3RUN_R::new(((self.bits >> 3) & 1) != 0) + pub fn em3run(&self) -> Em3runR { + Em3runR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - EM4 Block"] #[inline(always)] - pub fn em4block(&self) -> EM4BLOCK_R { - EM4BLOCK_R::new(((self.bits >> 4) & 1) != 0) + pub fn em4block(&self) -> Em4blockR { + Em4blockR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Debug Mode Run"] #[inline(always)] - pub fn debugrun(&self) -> DEBUGRUN_R { - DEBUGRUN_R::new(((self.bits >> 5) & 1) != 0) + pub fn debugrun(&self) -> DebugrunR { + DebugrunR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 8 - WDOG Reset Disable"] #[inline(always)] - pub fn wdogrstdis(&self) -> WDOGRSTDIS_R { - WDOGRSTDIS_R::new(((self.bits >> 8) & 1) != 0) + pub fn wdogrstdis(&self) -> WdogrstdisR { + WdogrstdisR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - PRS Src0 Missing Event WDOG Reset"] #[inline(always)] - pub fn prs0missrsten(&self) -> PRS0MISSRSTEN_R { - PRS0MISSRSTEN_R::new(((self.bits >> 9) & 1) != 0) + pub fn prs0missrsten(&self) -> Prs0missrstenR { + Prs0missrstenR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - PRS Src1 Missing Event WDOG Reset"] #[inline(always)] - pub fn prs1missrsten(&self) -> PRS1MISSRSTEN_R { - PRS1MISSRSTEN_R::new(((self.bits >> 10) & 1) != 0) + pub fn prs1missrsten(&self) -> Prs1missrstenR { + Prs1missrstenR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bits 16:19 - WDOG Timeout Period Select"] #[inline(always)] - pub fn persel(&self) -> PERSEL_R { - PERSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn persel(&self) -> PerselR { + PerselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:25 - WDOG Warning Period Select"] #[inline(always)] - pub fn warnsel(&self) -> WARNSEL_R { - WARNSEL_R::new(((self.bits >> 24) & 3) as u8) + pub fn warnsel(&self) -> WarnselR { + WarnselR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 28:30 - WDOG Illegal Window Select"] #[inline(always)] - pub fn winsel(&self) -> WINSEL_R { - WINSEL_R::new(((self.bits >> 28) & 7) as u8) + pub fn winsel(&self) -> WinselR { + WinselR::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bit 0 - WDOG Clear Source"] #[inline(always)] #[must_use] - pub fn clrsrc(&mut self) -> CLRSRC_W<0> { - CLRSRC_W::new(self) + pub fn clrsrc(&mut self) -> ClrsrcW { + ClrsrcW::new(self, 0) } #[doc = "Bit 1 - EM1 Run"] #[inline(always)] #[must_use] - pub fn em1run(&mut self) -> EM1RUN_W<1> { - EM1RUN_W::new(self) + pub fn em1run(&mut self) -> Em1runW { + Em1runW::new(self, 1) } #[doc = "Bit 2 - EM2 Run"] #[inline(always)] #[must_use] - pub fn em2run(&mut self) -> EM2RUN_W<2> { - EM2RUN_W::new(self) + pub fn em2run(&mut self) -> Em2runW { + Em2runW::new(self, 2) } #[doc = "Bit 3 - EM3 Run"] #[inline(always)] #[must_use] - pub fn em3run(&mut self) -> EM3RUN_W<3> { - EM3RUN_W::new(self) + pub fn em3run(&mut self) -> Em3runW { + Em3runW::new(self, 3) } #[doc = "Bit 4 - EM4 Block"] #[inline(always)] #[must_use] - pub fn em4block(&mut self) -> EM4BLOCK_W<4> { - EM4BLOCK_W::new(self) + pub fn em4block(&mut self) -> Em4blockW { + Em4blockW::new(self, 4) } #[doc = "Bit 5 - Debug Mode Run"] #[inline(always)] #[must_use] - pub fn debugrun(&mut self) -> DEBUGRUN_W<5> { - DEBUGRUN_W::new(self) + pub fn debugrun(&mut self) -> DebugrunW { + DebugrunW::new(self, 5) } #[doc = "Bit 8 - WDOG Reset Disable"] #[inline(always)] #[must_use] - pub fn wdogrstdis(&mut self) -> WDOGRSTDIS_W<8> { - WDOGRSTDIS_W::new(self) + pub fn wdogrstdis(&mut self) -> WdogrstdisW { + WdogrstdisW::new(self, 8) } #[doc = "Bit 9 - PRS Src0 Missing Event WDOG Reset"] #[inline(always)] #[must_use] - pub fn prs0missrsten(&mut self) -> PRS0MISSRSTEN_W<9> { - PRS0MISSRSTEN_W::new(self) + pub fn prs0missrsten(&mut self) -> Prs0missrstenW { + Prs0missrstenW::new(self, 9) } #[doc = "Bit 10 - PRS Src1 Missing Event WDOG Reset"] #[inline(always)] #[must_use] - pub fn prs1missrsten(&mut self) -> PRS1MISSRSTEN_W<10> { - PRS1MISSRSTEN_W::new(self) + pub fn prs1missrsten(&mut self) -> Prs1missrstenW { + Prs1missrstenW::new(self, 10) } #[doc = "Bits 16:19 - WDOG Timeout Period Select"] #[inline(always)] #[must_use] - pub fn persel(&mut self) -> PERSEL_W<16> { - PERSEL_W::new(self) + pub fn persel(&mut self) -> PerselW { + PerselW::new(self, 16) } #[doc = "Bits 24:25 - WDOG Warning Period Select"] #[inline(always)] #[must_use] - pub fn warnsel(&mut self) -> WARNSEL_W<24> { - WARNSEL_W::new(self) + pub fn warnsel(&mut self) -> WarnselW { + WarnselW::new(self, 24) } #[doc = "Bits 28:30 - WDOG Illegal Window Select"] #[inline(always)] #[must_use] - pub fn winsel(&mut self) -> WINSEL_W<28> { - WINSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn winsel(&mut self) -> WinselW { + WinselW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0x000f_0000"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x000f_0000; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0x000f_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/cmd.rs index bcf759a..925f1fc 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/cmd.rs @@ -1,78 +1,56 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "WDOG Timer Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLEAR_AW { +pub enum Clear { #[doc = "0: WDOG timer is unchanged."] - UNCHANGED = 0, + Unchanged = 0, #[doc = "1: WDOG timer is cleared to 0."] - CLEARED = 1, + Cleared = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLEAR_AW) -> Self { + fn from(variant: Clear) -> Self { variant as u8 != 0 } } #[doc = "Field `CLEAR` writer - WDOG Timer Clear"] -pub type CLEAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, CLEAR_AW, O>; -impl<'a, const O: u8> CLEAR_W<'a, O> { +pub type ClearW<'a, REG> = crate::BitWriter<'a, REG, Clear>; +impl<'a, REG> ClearW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "WDOG timer is unchanged."] #[inline(always)] - pub fn unchanged(self) -> &'a mut W { - self.variant(CLEAR_AW::UNCHANGED) + pub fn unchanged(self) -> &'a mut crate::W { + self.variant(Clear::Unchanged) } #[doc = "WDOG timer is cleared to 0."] #[inline(always)] - pub fn cleared(self) -> &'a mut W { - self.variant(CLEAR_AW::CLEARED) + pub fn cleared(self) -> &'a mut crate::W { + self.variant(Clear::Cleared) } } impl W { #[doc = "Bit 0 - WDOG Timer Clear"] #[inline(always)] #[must_use] - pub fn clear(&mut self) -> CLEAR_W<0> { - CLEAR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clear(&mut self) -> ClearW { + ClearW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/en.rs index bd67dfd..d831021 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Module Enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Module Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disabling busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Module Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disabling busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Module Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/ien.rs index f30100e..98d5e03 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/ien.rs @@ -1,140 +1,100 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOUT` reader - WDOG Timeout Interrupt Enable"] -pub type TOUT_R = crate::BitReader; +pub type ToutR = crate::BitReader; #[doc = "Field `TOUT` writer - WDOG Timeout Interrupt Enable"] -pub type TOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ToutW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WARN` reader - WDOG Warning Timeout Interrupt Enable"] -pub type WARN_R = crate::BitReader; +pub type WarnR = crate::BitReader; #[doc = "Field `WARN` writer - WDOG Warning Timeout Interrupt Enable"] -pub type WARN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type WarnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WIN` reader - WDOG Window Interrupt Enable"] -pub type WIN_R = crate::BitReader; +pub type WinR = crate::BitReader; #[doc = "Field `WIN` writer - WDOG Window Interrupt Enable"] -pub type WIN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type WinW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PEM0` reader - PRS Src0 Event Missing Interrupt Enable"] -pub type PEM0_R = crate::BitReader; +pub type Pem0R = crate::BitReader; #[doc = "Field `PEM0` writer - PRS Src0 Event Missing Interrupt Enable"] -pub type PEM0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Pem0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PEM1` reader - PRS Src1 Event Missing Interrupt Enable"] -pub type PEM1_R = crate::BitReader; +pub type Pem1R = crate::BitReader; #[doc = "Field `PEM1` writer - PRS Src1 Event Missing Interrupt Enable"] -pub type PEM1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Pem1W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - WDOG Timeout Interrupt Enable"] #[inline(always)] - pub fn tout(&self) -> TOUT_R { - TOUT_R::new((self.bits & 1) != 0) + pub fn tout(&self) -> ToutR { + ToutR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - WDOG Warning Timeout Interrupt Enable"] #[inline(always)] - pub fn warn(&self) -> WARN_R { - WARN_R::new(((self.bits >> 1) & 1) != 0) + pub fn warn(&self) -> WarnR { + WarnR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - WDOG Window Interrupt Enable"] #[inline(always)] - pub fn win(&self) -> WIN_R { - WIN_R::new(((self.bits >> 2) & 1) != 0) + pub fn win(&self) -> WinR { + WinR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - PRS Src0 Event Missing Interrupt Enable"] #[inline(always)] - pub fn pem0(&self) -> PEM0_R { - PEM0_R::new(((self.bits >> 3) & 1) != 0) + pub fn pem0(&self) -> Pem0R { + Pem0R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - PRS Src1 Event Missing Interrupt Enable"] #[inline(always)] - pub fn pem1(&self) -> PEM1_R { - PEM1_R::new(((self.bits >> 4) & 1) != 0) + pub fn pem1(&self) -> Pem1R { + Pem1R::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - WDOG Timeout Interrupt Enable"] #[inline(always)] #[must_use] - pub fn tout(&mut self) -> TOUT_W<0> { - TOUT_W::new(self) + pub fn tout(&mut self) -> ToutW { + ToutW::new(self, 0) } #[doc = "Bit 1 - WDOG Warning Timeout Interrupt Enable"] #[inline(always)] #[must_use] - pub fn warn(&mut self) -> WARN_W<1> { - WARN_W::new(self) + pub fn warn(&mut self) -> WarnW { + WarnW::new(self, 1) } #[doc = "Bit 2 - WDOG Window Interrupt Enable"] #[inline(always)] #[must_use] - pub fn win(&mut self) -> WIN_W<2> { - WIN_W::new(self) + pub fn win(&mut self) -> WinW { + WinW::new(self, 2) } #[doc = "Bit 3 - PRS Src0 Event Missing Interrupt Enable"] #[inline(always)] #[must_use] - pub fn pem0(&mut self) -> PEM0_W<3> { - PEM0_W::new(self) + pub fn pem0(&mut self) -> Pem0W { + Pem0W::new(self, 3) } #[doc = "Bit 4 - PRS Src1 Event Missing Interrupt Enable"] #[inline(always)] #[must_use] - pub fn pem1(&mut self) -> PEM1_W<4> { - PEM1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pem1(&mut self) -> Pem1W { + Pem1W::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/if_.rs index 3c5ca4c..30a8c97 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/if_.rs @@ -1,140 +1,100 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOUT` reader - WDOG Timeout Interrupt Flag"] -pub type TOUT_R = crate::BitReader; +pub type ToutR = crate::BitReader; #[doc = "Field `TOUT` writer - WDOG Timeout Interrupt Flag"] -pub type TOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ToutW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WARN` reader - WDOG Warning Timeout Interrupt Flag"] -pub type WARN_R = crate::BitReader; +pub type WarnR = crate::BitReader; #[doc = "Field `WARN` writer - WDOG Warning Timeout Interrupt Flag"] -pub type WARN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type WarnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WIN` reader - WDOG Window Interrupt Flag"] -pub type WIN_R = crate::BitReader; +pub type WinR = crate::BitReader; #[doc = "Field `WIN` writer - WDOG Window Interrupt Flag"] -pub type WIN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type WinW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PEM0` reader - PRS Src0 Event Missing Interrupt Flag"] -pub type PEM0_R = crate::BitReader; +pub type Pem0R = crate::BitReader; #[doc = "Field `PEM0` writer - PRS Src0 Event Missing Interrupt Flag"] -pub type PEM0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Pem0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PEM1` reader - PRS Src1 Event Missing Interrupt Flag"] -pub type PEM1_R = crate::BitReader; +pub type Pem1R = crate::BitReader; #[doc = "Field `PEM1` writer - PRS Src1 Event Missing Interrupt Flag"] -pub type PEM1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Pem1W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - WDOG Timeout Interrupt Flag"] #[inline(always)] - pub fn tout(&self) -> TOUT_R { - TOUT_R::new((self.bits & 1) != 0) + pub fn tout(&self) -> ToutR { + ToutR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - WDOG Warning Timeout Interrupt Flag"] #[inline(always)] - pub fn warn(&self) -> WARN_R { - WARN_R::new(((self.bits >> 1) & 1) != 0) + pub fn warn(&self) -> WarnR { + WarnR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - WDOG Window Interrupt Flag"] #[inline(always)] - pub fn win(&self) -> WIN_R { - WIN_R::new(((self.bits >> 2) & 1) != 0) + pub fn win(&self) -> WinR { + WinR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - PRS Src0 Event Missing Interrupt Flag"] #[inline(always)] - pub fn pem0(&self) -> PEM0_R { - PEM0_R::new(((self.bits >> 3) & 1) != 0) + pub fn pem0(&self) -> Pem0R { + Pem0R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - PRS Src1 Event Missing Interrupt Flag"] #[inline(always)] - pub fn pem1(&self) -> PEM1_R { - PEM1_R::new(((self.bits >> 4) & 1) != 0) + pub fn pem1(&self) -> Pem1R { + Pem1R::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - WDOG Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn tout(&mut self) -> TOUT_W<0> { - TOUT_W::new(self) + pub fn tout(&mut self) -> ToutW { + ToutW::new(self, 0) } #[doc = "Bit 1 - WDOG Warning Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn warn(&mut self) -> WARN_W<1> { - WARN_W::new(self) + pub fn warn(&mut self) -> WarnW { + WarnW::new(self, 1) } #[doc = "Bit 2 - WDOG Window Interrupt Flag"] #[inline(always)] #[must_use] - pub fn win(&mut self) -> WIN_W<2> { - WIN_W::new(self) + pub fn win(&mut self) -> WinW { + WinW::new(self, 2) } #[doc = "Bit 3 - PRS Src0 Event Missing Interrupt Flag"] #[inline(always)] #[must_use] - pub fn pem0(&mut self) -> PEM0_W<3> { - PEM0_W::new(self) + pub fn pem0(&mut self) -> Pem0W { + Pem0W::new(self, 3) } #[doc = "Bit 4 - PRS Src1 Event Missing Interrupt Flag"] #[inline(always)] #[must_use] - pub fn pem1(&mut self) -> PEM1_W<4> { - PEM1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pem1(&mut self) -> Pem1W { + Pem1W::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/ipversion.rs index ad2c166..23b42d5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/lock.rs index b24c0b5..748fd84 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/lock.rs @@ -1,80 +1,62 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "WDOG Configuration Lock\n\nValue on reset: 44008"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "0: Lock WDOG lockable registers"] - LOCK = 0, + Lock = 0, #[doc = "44008: Unlock WDOG lockable registers"] - UNLOCK = 44008, + Unlock = 44008, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - WDOG Configuration Lock"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Lock WDOG lockable registers"] #[inline(always)] - pub fn lock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::LOCK) + pub fn lock(self) -> &'a mut crate::W { + self.variant(Lockkey::Lock) } #[doc = "Unlock WDOG lockable registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - WDOG Configuration Lock"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0xabe8"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0xabe8; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0xabe8; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/status.rs index 15e4f04..1c88571 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/status.rs @@ -1,71 +1,56 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `LOCK` reader - WDOG Configuration Lock Status"] -pub type LOCK_R = crate::BitReader; +pub type R = crate::R; #[doc = "WDOG Configuration Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCK_A { +pub enum Lock { #[doc = "0: All WDOG lockable registers are unlocked."] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: All WDOG lockable registers are locked."] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCK_A) -> Self { + fn from(variant: Lock) -> Self { variant as u8 != 0 } } -impl LOCK_R { +#[doc = "Field `LOCK` reader - WDOG Configuration Lock Status"] +pub type LockR = crate::BitReader; +impl LockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCK_A { + pub const fn variant(&self) -> Lock { match self.bits { - false => LOCK_A::UNLOCKED, - true => LOCK_A::LOCKED, + false => Lock::Unlocked, + true => Lock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "All WDOG lockable registers are unlocked."] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCK_A::UNLOCKED + *self == Lock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "All WDOG lockable registers are locked."] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCK_A::LOCKED + *self == Lock::Locked } } impl R { #[doc = "Bit 31 - WDOG Configuration Lock Status"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new(((self.bits >> 31) & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/syncbusy.rs index dfc12b2..a25871a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog0_s/syncbusy.rs @@ -1,37 +1,22 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CMD` reader - Sync Busy for Cmd Register"] -pub type CMD_R = crate::BitReader; +pub type CmdR = crate::BitReader; impl R { #[doc = "Bit 0 - Sync Busy for Cmd Register"] #[inline(always)] - pub fn cmd(&self) -> CMD_R { - CMD_R::new((self.bits & 1) != 0) + pub fn cmd(&self) -> CmdR { + CmdR::new((self.bits & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns.rs index 1d2afc0..c0e8de2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns.rs @@ -1,59 +1,115 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + cfg: Cfg, + cmd: Cmd, + _reserved4: [u8; 0x04], + status: Status, + if_: If, + ien: Ien, + lock: Lock, + syncbusy: Syncbusy, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x0c - No Description"] - pub cmd: CMD, - _reserved4: [u8; 0x04], + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x14 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x18 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x1c - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x20 - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x24 - No Description"] - pub syncbusy: SYNCBUSY, + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "No Description"] pub mod syncbusy; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/cfg.rs index fe30338..365ffd5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/cfg.rs @@ -1,998 +1,1002 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLRSRC` reader - WDOG Clear Source"] -pub type CLRSRC_R = crate::BitReader; +pub type W = crate::W; #[doc = "WDOG Clear Source\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLRSRC_A { +pub enum Clrsrc { #[doc = "0: A write to the clear bit will clear the WDOG counter"] - SW = 0, + Sw = 0, #[doc = "1: A rising edge on the PRS Source 0 will clear the WDOG counter"] - PRSSRC0 = 1, + Prssrc0 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLRSRC_A) -> Self { + fn from(variant: Clrsrc) -> Self { variant as u8 != 0 } } -impl CLRSRC_R { +#[doc = "Field `CLRSRC` reader - WDOG Clear Source"] +pub type ClrsrcR = crate::BitReader; +impl ClrsrcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CLRSRC_A { + pub const fn variant(&self) -> Clrsrc { match self.bits { - false => CLRSRC_A::SW, - true => CLRSRC_A::PRSSRC0, + false => Clrsrc::Sw, + true => Clrsrc::Prssrc0, } } - #[doc = "Checks if the value of the field is `SW`"] + #[doc = "A write to the clear bit will clear the WDOG counter"] #[inline(always)] pub fn is_sw(&self) -> bool { - *self == CLRSRC_A::SW + *self == Clrsrc::Sw } - #[doc = "Checks if the value of the field is `PRSSRC0`"] + #[doc = "A rising edge on the PRS Source 0 will clear the WDOG counter"] #[inline(always)] pub fn is_prssrc0(&self) -> bool { - *self == CLRSRC_A::PRSSRC0 + *self == Clrsrc::Prssrc0 } } #[doc = "Field `CLRSRC` writer - WDOG Clear Source"] -pub type CLRSRC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, CLRSRC_A, O>; -impl<'a, const O: u8> CLRSRC_W<'a, O> { +pub type ClrsrcW<'a, REG> = crate::BitWriter<'a, REG, Clrsrc>; +impl<'a, REG> ClrsrcW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "A write to the clear bit will clear the WDOG counter"] #[inline(always)] - pub fn sw(self) -> &'a mut W { - self.variant(CLRSRC_A::SW) + pub fn sw(self) -> &'a mut crate::W { + self.variant(Clrsrc::Sw) } #[doc = "A rising edge on the PRS Source 0 will clear the WDOG counter"] #[inline(always)] - pub fn prssrc0(self) -> &'a mut W { - self.variant(CLRSRC_A::PRSSRC0) + pub fn prssrc0(self) -> &'a mut crate::W { + self.variant(Clrsrc::Prssrc0) } } -#[doc = "Field `EM1RUN` reader - EM1 Run"] -pub type EM1RUN_R = crate::BitReader; #[doc = "EM1 Run\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EM1RUN_A { +pub enum Em1run { #[doc = "0: WDOG timer is frozen in EM1."] - DISABLE = 0, + Disable = 0, #[doc = "1: WDOG timer is running in EM1."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EM1RUN_A) -> Self { + fn from(variant: Em1run) -> Self { variant as u8 != 0 } } -impl EM1RUN_R { +#[doc = "Field `EM1RUN` reader - EM1 Run"] +pub type Em1runR = crate::BitReader; +impl Em1runR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EM1RUN_A { + pub const fn variant(&self) -> Em1run { match self.bits { - false => EM1RUN_A::DISABLE, - true => EM1RUN_A::ENABLE, + false => Em1run::Disable, + true => Em1run::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "WDOG timer is frozen in EM1."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EM1RUN_A::DISABLE + *self == Em1run::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "WDOG timer is running in EM1."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EM1RUN_A::ENABLE + *self == Em1run::Enable } } #[doc = "Field `EM1RUN` writer - EM1 Run"] -pub type EM1RUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, EM1RUN_A, O>; -impl<'a, const O: u8> EM1RUN_W<'a, O> { +pub type Em1runW<'a, REG> = crate::BitWriter<'a, REG, Em1run>; +impl<'a, REG> Em1runW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "WDOG timer is frozen in EM1."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EM1RUN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Em1run::Disable) } #[doc = "WDOG timer is running in EM1."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EM1RUN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Em1run::Enable) } } -#[doc = "Field `EM2RUN` reader - EM2 Run"] -pub type EM2RUN_R = crate::BitReader; #[doc = "EM2 Run\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EM2RUN_A { +pub enum Em2run { #[doc = "0: WDOG timer is frozen in EM2."] - DISABLE = 0, + Disable = 0, #[doc = "1: WDOG timer is running in EM2."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EM2RUN_A) -> Self { + fn from(variant: Em2run) -> Self { variant as u8 != 0 } } -impl EM2RUN_R { +#[doc = "Field `EM2RUN` reader - EM2 Run"] +pub type Em2runR = crate::BitReader; +impl Em2runR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EM2RUN_A { + pub const fn variant(&self) -> Em2run { match self.bits { - false => EM2RUN_A::DISABLE, - true => EM2RUN_A::ENABLE, + false => Em2run::Disable, + true => Em2run::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "WDOG timer is frozen in EM2."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EM2RUN_A::DISABLE + *self == Em2run::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "WDOG timer is running in EM2."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EM2RUN_A::ENABLE + *self == Em2run::Enable } } #[doc = "Field `EM2RUN` writer - EM2 Run"] -pub type EM2RUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, EM2RUN_A, O>; -impl<'a, const O: u8> EM2RUN_W<'a, O> { +pub type Em2runW<'a, REG> = crate::BitWriter<'a, REG, Em2run>; +impl<'a, REG> Em2runW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "WDOG timer is frozen in EM2."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EM2RUN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Em2run::Disable) } #[doc = "WDOG timer is running in EM2."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EM2RUN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Em2run::Enable) } } -#[doc = "Field `EM3RUN` reader - EM3 Run"] -pub type EM3RUN_R = crate::BitReader; #[doc = "EM3 Run\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EM3RUN_A { +pub enum Em3run { #[doc = "0: WDOG timer is frozen in EM3."] - DISABLE = 0, + Disable = 0, #[doc = "1: WDOG timer is running in EM3."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EM3RUN_A) -> Self { + fn from(variant: Em3run) -> Self { variant as u8 != 0 } } -impl EM3RUN_R { +#[doc = "Field `EM3RUN` reader - EM3 Run"] +pub type Em3runR = crate::BitReader; +impl Em3runR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EM3RUN_A { + pub const fn variant(&self) -> Em3run { match self.bits { - false => EM3RUN_A::DISABLE, - true => EM3RUN_A::ENABLE, + false => Em3run::Disable, + true => Em3run::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "WDOG timer is frozen in EM3."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EM3RUN_A::DISABLE + *self == Em3run::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "WDOG timer is running in EM3."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EM3RUN_A::ENABLE + *self == Em3run::Enable } } #[doc = "Field `EM3RUN` writer - EM3 Run"] -pub type EM3RUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, EM3RUN_A, O>; -impl<'a, const O: u8> EM3RUN_W<'a, O> { +pub type Em3runW<'a, REG> = crate::BitWriter<'a, REG, Em3run>; +impl<'a, REG> Em3runW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "WDOG timer is frozen in EM3."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EM3RUN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Em3run::Disable) } #[doc = "WDOG timer is running in EM3."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EM3RUN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Em3run::Enable) } } -#[doc = "Field `EM4BLOCK` reader - EM4 Block"] -pub type EM4BLOCK_R = crate::BitReader; #[doc = "EM4 Block\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EM4BLOCK_A { +pub enum Em4block { #[doc = "0: EM4 can be entered by software. See EMU for detailed description."] - DISABLE = 0, + Disable = 0, #[doc = "1: EM4 cannot be entered by software."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EM4BLOCK_A) -> Self { + fn from(variant: Em4block) -> Self { variant as u8 != 0 } } -impl EM4BLOCK_R { +#[doc = "Field `EM4BLOCK` reader - EM4 Block"] +pub type Em4blockR = crate::BitReader; +impl Em4blockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EM4BLOCK_A { + pub const fn variant(&self) -> Em4block { match self.bits { - false => EM4BLOCK_A::DISABLE, - true => EM4BLOCK_A::ENABLE, + false => Em4block::Disable, + true => Em4block::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "EM4 can be entered by software. See EMU for detailed description."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EM4BLOCK_A::DISABLE + *self == Em4block::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "EM4 cannot be entered by software."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EM4BLOCK_A::ENABLE + *self == Em4block::Enable } } #[doc = "Field `EM4BLOCK` writer - EM4 Block"] -pub type EM4BLOCK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, EM4BLOCK_A, O>; -impl<'a, const O: u8> EM4BLOCK_W<'a, O> { +pub type Em4blockW<'a, REG> = crate::BitWriter<'a, REG, Em4block>; +impl<'a, REG> Em4blockW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "EM4 can be entered by software. See EMU for detailed description."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EM4BLOCK_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Em4block::Disable) } #[doc = "EM4 cannot be entered by software."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EM4BLOCK_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Em4block::Enable) } } -#[doc = "Field `DEBUGRUN` reader - Debug Mode Run"] -pub type DEBUGRUN_R = crate::BitReader; #[doc = "Debug Mode Run\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DEBUGRUN_A { +pub enum Debugrun { #[doc = "0: WDOG timer is frozen in debug mode"] - DISABLE = 0, + Disable = 0, #[doc = "1: WDOG timer is running in debug mode"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DEBUGRUN_A) -> Self { + fn from(variant: Debugrun) -> Self { variant as u8 != 0 } } -impl DEBUGRUN_R { +#[doc = "Field `DEBUGRUN` reader - Debug Mode Run"] +pub type DebugrunR = crate::BitReader; +impl DebugrunR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DEBUGRUN_A { + pub const fn variant(&self) -> Debugrun { match self.bits { - false => DEBUGRUN_A::DISABLE, - true => DEBUGRUN_A::ENABLE, + false => Debugrun::Disable, + true => Debugrun::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "WDOG timer is frozen in debug mode"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == DEBUGRUN_A::DISABLE + *self == Debugrun::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "WDOG timer is running in debug mode"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == DEBUGRUN_A::ENABLE + *self == Debugrun::Enable } } #[doc = "Field `DEBUGRUN` writer - Debug Mode Run"] -pub type DEBUGRUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DEBUGRUN_A, O>; -impl<'a, const O: u8> DEBUGRUN_W<'a, O> { +pub type DebugrunW<'a, REG> = crate::BitWriter<'a, REG, Debugrun>; +impl<'a, REG> DebugrunW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "WDOG timer is frozen in debug mode"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(DEBUGRUN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Debugrun::Disable) } #[doc = "WDOG timer is running in debug mode"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(DEBUGRUN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Debugrun::Enable) } } -#[doc = "Field `WDOGRSTDIS` reader - WDOG Reset Disable"] -pub type WDOGRSTDIS_R = crate::BitReader; #[doc = "WDOG Reset Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WDOGRSTDIS_A { +pub enum Wdogrstdis { #[doc = "0: A timeout will cause a WDOG reset"] - EN = 0, + En = 0, #[doc = "1: A timeout will not cause a WDOG reset"] - DIS = 1, + Dis = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WDOGRSTDIS_A) -> Self { + fn from(variant: Wdogrstdis) -> Self { variant as u8 != 0 } } -impl WDOGRSTDIS_R { +#[doc = "Field `WDOGRSTDIS` reader - WDOG Reset Disable"] +pub type WdogrstdisR = crate::BitReader; +impl WdogrstdisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> WDOGRSTDIS_A { + pub const fn variant(&self) -> Wdogrstdis { match self.bits { - false => WDOGRSTDIS_A::EN, - true => WDOGRSTDIS_A::DIS, + false => Wdogrstdis::En, + true => Wdogrstdis::Dis, } } - #[doc = "Checks if the value of the field is `EN`"] + #[doc = "A timeout will cause a WDOG reset"] #[inline(always)] pub fn is_en(&self) -> bool { - *self == WDOGRSTDIS_A::EN + *self == Wdogrstdis::En } - #[doc = "Checks if the value of the field is `DIS`"] + #[doc = "A timeout will not cause a WDOG reset"] #[inline(always)] pub fn is_dis(&self) -> bool { - *self == WDOGRSTDIS_A::DIS + *self == Wdogrstdis::Dis } } #[doc = "Field `WDOGRSTDIS` writer - WDOG Reset Disable"] -pub type WDOGRSTDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, WDOGRSTDIS_A, O>; -impl<'a, const O: u8> WDOGRSTDIS_W<'a, O> { +pub type WdogrstdisW<'a, REG> = crate::BitWriter<'a, REG, Wdogrstdis>; +impl<'a, REG> WdogrstdisW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "A timeout will cause a WDOG reset"] #[inline(always)] - pub fn en(self) -> &'a mut W { - self.variant(WDOGRSTDIS_A::EN) + pub fn en(self) -> &'a mut crate::W { + self.variant(Wdogrstdis::En) } #[doc = "A timeout will not cause a WDOG reset"] #[inline(always)] - pub fn dis(self) -> &'a mut W { - self.variant(WDOGRSTDIS_A::DIS) + pub fn dis(self) -> &'a mut crate::W { + self.variant(Wdogrstdis::Dis) } } #[doc = "Field `PRS0MISSRSTEN` reader - PRS Src0 Missing Event WDOG Reset"] -pub type PRS0MISSRSTEN_R = crate::BitReader; +pub type Prs0missrstenR = crate::BitReader; #[doc = "Field `PRS0MISSRSTEN` writer - PRS Src0 Missing Event WDOG Reset"] -pub type PRS0MISSRSTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type Prs0missrstenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRS1MISSRSTEN` reader - PRS Src1 Missing Event WDOG Reset"] -pub type PRS1MISSRSTEN_R = crate::BitReader; +pub type Prs1missrstenR = crate::BitReader; #[doc = "Field `PRS1MISSRSTEN` writer - PRS Src1 Missing Event WDOG Reset"] -pub type PRS1MISSRSTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `PERSEL` reader - WDOG Timeout Period Select"] -pub type PERSEL_R = crate::FieldReader; +pub type Prs1missrstenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "WDOG Timeout Period Select\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PERSEL_A { +pub enum Persel { #[doc = "0: Timeout period of 9 wdog cycles"] - SEL0 = 0, + Sel0 = 0, #[doc = "1: Timeout period of 17 wdog cycles"] - SEL1 = 1, + Sel1 = 1, #[doc = "2: Timeout period of 33 wdog cycles"] - SEL2 = 2, + Sel2 = 2, #[doc = "3: Timeout period of 65 wdog cycles"] - SEL3 = 3, + Sel3 = 3, #[doc = "4: Timeout period of 129 wdog cycles"] - SEL4 = 4, + Sel4 = 4, #[doc = "5: Timeout period of 257 wdog cycles"] - SEL5 = 5, + Sel5 = 5, #[doc = "6: Timeout period of 513 wdog cycles"] - SEL6 = 6, + Sel6 = 6, #[doc = "7: Timeout period of 1k wdog cycles"] - SEL7 = 7, + Sel7 = 7, #[doc = "8: Timeout period of 2k wdog cycles"] - SEL8 = 8, + Sel8 = 8, #[doc = "9: Timeout period of 4k wdog cycles"] - SEL9 = 9, + Sel9 = 9, #[doc = "10: Timeout period of 8k wdog cycles"] - SEL10 = 10, + Sel10 = 10, #[doc = "11: Timeout period of 16k wdog cycles"] - SEL11 = 11, + Sel11 = 11, #[doc = "12: Timeout period of 32k wdog cycles"] - SEL12 = 12, + Sel12 = 12, #[doc = "13: Timeout period of 64k wdog cycles"] - SEL13 = 13, + Sel13 = 13, #[doc = "14: Timeout period of 128k wdog cycles"] - SEL14 = 14, + Sel14 = 14, #[doc = "15: Timeout period of 256k wdog cycles"] - SEL15 = 15, + Sel15 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PERSEL_A) -> Self { + fn from(variant: Persel) -> Self { variant as _ } } -impl PERSEL_R { +impl crate::FieldSpec for Persel { + type Ux = u8; +} +impl crate::IsEnum for Persel {} +#[doc = "Field `PERSEL` reader - WDOG Timeout Period Select"] +pub type PerselR = crate::FieldReader; +impl PerselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PERSEL_A { + pub const fn variant(&self) -> Persel { match self.bits { - 0 => PERSEL_A::SEL0, - 1 => PERSEL_A::SEL1, - 2 => PERSEL_A::SEL2, - 3 => PERSEL_A::SEL3, - 4 => PERSEL_A::SEL4, - 5 => PERSEL_A::SEL5, - 6 => PERSEL_A::SEL6, - 7 => PERSEL_A::SEL7, - 8 => PERSEL_A::SEL8, - 9 => PERSEL_A::SEL9, - 10 => PERSEL_A::SEL10, - 11 => PERSEL_A::SEL11, - 12 => PERSEL_A::SEL12, - 13 => PERSEL_A::SEL13, - 14 => PERSEL_A::SEL14, - 15 => PERSEL_A::SEL15, + 0 => Persel::Sel0, + 1 => Persel::Sel1, + 2 => Persel::Sel2, + 3 => Persel::Sel3, + 4 => Persel::Sel4, + 5 => Persel::Sel5, + 6 => Persel::Sel6, + 7 => Persel::Sel7, + 8 => Persel::Sel8, + 9 => Persel::Sel9, + 10 => Persel::Sel10, + 11 => Persel::Sel11, + 12 => Persel::Sel12, + 13 => Persel::Sel13, + 14 => Persel::Sel14, + 15 => Persel::Sel15, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `SEL0`"] + #[doc = "Timeout period of 9 wdog cycles"] #[inline(always)] pub fn is_sel0(&self) -> bool { - *self == PERSEL_A::SEL0 + *self == Persel::Sel0 } - #[doc = "Checks if the value of the field is `SEL1`"] + #[doc = "Timeout period of 17 wdog cycles"] #[inline(always)] pub fn is_sel1(&self) -> bool { - *self == PERSEL_A::SEL1 + *self == Persel::Sel1 } - #[doc = "Checks if the value of the field is `SEL2`"] + #[doc = "Timeout period of 33 wdog cycles"] #[inline(always)] pub fn is_sel2(&self) -> bool { - *self == PERSEL_A::SEL2 + *self == Persel::Sel2 } - #[doc = "Checks if the value of the field is `SEL3`"] + #[doc = "Timeout period of 65 wdog cycles"] #[inline(always)] pub fn is_sel3(&self) -> bool { - *self == PERSEL_A::SEL3 + *self == Persel::Sel3 } - #[doc = "Checks if the value of the field is `SEL4`"] + #[doc = "Timeout period of 129 wdog cycles"] #[inline(always)] pub fn is_sel4(&self) -> bool { - *self == PERSEL_A::SEL4 + *self == Persel::Sel4 } - #[doc = "Checks if the value of the field is `SEL5`"] + #[doc = "Timeout period of 257 wdog cycles"] #[inline(always)] pub fn is_sel5(&self) -> bool { - *self == PERSEL_A::SEL5 + *self == Persel::Sel5 } - #[doc = "Checks if the value of the field is `SEL6`"] + #[doc = "Timeout period of 513 wdog cycles"] #[inline(always)] pub fn is_sel6(&self) -> bool { - *self == PERSEL_A::SEL6 + *self == Persel::Sel6 } - #[doc = "Checks if the value of the field is `SEL7`"] + #[doc = "Timeout period of 1k wdog cycles"] #[inline(always)] pub fn is_sel7(&self) -> bool { - *self == PERSEL_A::SEL7 + *self == Persel::Sel7 } - #[doc = "Checks if the value of the field is `SEL8`"] + #[doc = "Timeout period of 2k wdog cycles"] #[inline(always)] pub fn is_sel8(&self) -> bool { - *self == PERSEL_A::SEL8 + *self == Persel::Sel8 } - #[doc = "Checks if the value of the field is `SEL9`"] + #[doc = "Timeout period of 4k wdog cycles"] #[inline(always)] pub fn is_sel9(&self) -> bool { - *self == PERSEL_A::SEL9 + *self == Persel::Sel9 } - #[doc = "Checks if the value of the field is `SEL10`"] + #[doc = "Timeout period of 8k wdog cycles"] #[inline(always)] pub fn is_sel10(&self) -> bool { - *self == PERSEL_A::SEL10 + *self == Persel::Sel10 } - #[doc = "Checks if the value of the field is `SEL11`"] + #[doc = "Timeout period of 16k wdog cycles"] #[inline(always)] pub fn is_sel11(&self) -> bool { - *self == PERSEL_A::SEL11 + *self == Persel::Sel11 } - #[doc = "Checks if the value of the field is `SEL12`"] + #[doc = "Timeout period of 32k wdog cycles"] #[inline(always)] pub fn is_sel12(&self) -> bool { - *self == PERSEL_A::SEL12 + *self == Persel::Sel12 } - #[doc = "Checks if the value of the field is `SEL13`"] + #[doc = "Timeout period of 64k wdog cycles"] #[inline(always)] pub fn is_sel13(&self) -> bool { - *self == PERSEL_A::SEL13 + *self == Persel::Sel13 } - #[doc = "Checks if the value of the field is `SEL14`"] + #[doc = "Timeout period of 128k wdog cycles"] #[inline(always)] pub fn is_sel14(&self) -> bool { - *self == PERSEL_A::SEL14 + *self == Persel::Sel14 } - #[doc = "Checks if the value of the field is `SEL15`"] + #[doc = "Timeout period of 256k wdog cycles"] #[inline(always)] pub fn is_sel15(&self) -> bool { - *self == PERSEL_A::SEL15 + *self == Persel::Sel15 } } #[doc = "Field `PERSEL` writer - WDOG Timeout Period Select"] -pub type PERSEL_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, PERSEL_A, 4, O>; -impl<'a, const O: u8> PERSEL_W<'a, O> { +pub type PerselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Persel, crate::Safe>; +impl<'a, REG> PerselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Timeout period of 9 wdog cycles"] #[inline(always)] - pub fn sel0(self) -> &'a mut W { - self.variant(PERSEL_A::SEL0) + pub fn sel0(self) -> &'a mut crate::W { + self.variant(Persel::Sel0) } #[doc = "Timeout period of 17 wdog cycles"] #[inline(always)] - pub fn sel1(self) -> &'a mut W { - self.variant(PERSEL_A::SEL1) + pub fn sel1(self) -> &'a mut crate::W { + self.variant(Persel::Sel1) } #[doc = "Timeout period of 33 wdog cycles"] #[inline(always)] - pub fn sel2(self) -> &'a mut W { - self.variant(PERSEL_A::SEL2) + pub fn sel2(self) -> &'a mut crate::W { + self.variant(Persel::Sel2) } #[doc = "Timeout period of 65 wdog cycles"] #[inline(always)] - pub fn sel3(self) -> &'a mut W { - self.variant(PERSEL_A::SEL3) + pub fn sel3(self) -> &'a mut crate::W { + self.variant(Persel::Sel3) } #[doc = "Timeout period of 129 wdog cycles"] #[inline(always)] - pub fn sel4(self) -> &'a mut W { - self.variant(PERSEL_A::SEL4) + pub fn sel4(self) -> &'a mut crate::W { + self.variant(Persel::Sel4) } #[doc = "Timeout period of 257 wdog cycles"] #[inline(always)] - pub fn sel5(self) -> &'a mut W { - self.variant(PERSEL_A::SEL5) + pub fn sel5(self) -> &'a mut crate::W { + self.variant(Persel::Sel5) } #[doc = "Timeout period of 513 wdog cycles"] #[inline(always)] - pub fn sel6(self) -> &'a mut W { - self.variant(PERSEL_A::SEL6) + pub fn sel6(self) -> &'a mut crate::W { + self.variant(Persel::Sel6) } #[doc = "Timeout period of 1k wdog cycles"] #[inline(always)] - pub fn sel7(self) -> &'a mut W { - self.variant(PERSEL_A::SEL7) + pub fn sel7(self) -> &'a mut crate::W { + self.variant(Persel::Sel7) } #[doc = "Timeout period of 2k wdog cycles"] #[inline(always)] - pub fn sel8(self) -> &'a mut W { - self.variant(PERSEL_A::SEL8) + pub fn sel8(self) -> &'a mut crate::W { + self.variant(Persel::Sel8) } #[doc = "Timeout period of 4k wdog cycles"] #[inline(always)] - pub fn sel9(self) -> &'a mut W { - self.variant(PERSEL_A::SEL9) + pub fn sel9(self) -> &'a mut crate::W { + self.variant(Persel::Sel9) } #[doc = "Timeout period of 8k wdog cycles"] #[inline(always)] - pub fn sel10(self) -> &'a mut W { - self.variant(PERSEL_A::SEL10) + pub fn sel10(self) -> &'a mut crate::W { + self.variant(Persel::Sel10) } #[doc = "Timeout period of 16k wdog cycles"] #[inline(always)] - pub fn sel11(self) -> &'a mut W { - self.variant(PERSEL_A::SEL11) + pub fn sel11(self) -> &'a mut crate::W { + self.variant(Persel::Sel11) } #[doc = "Timeout period of 32k wdog cycles"] #[inline(always)] - pub fn sel12(self) -> &'a mut W { - self.variant(PERSEL_A::SEL12) + pub fn sel12(self) -> &'a mut crate::W { + self.variant(Persel::Sel12) } #[doc = "Timeout period of 64k wdog cycles"] #[inline(always)] - pub fn sel13(self) -> &'a mut W { - self.variant(PERSEL_A::SEL13) + pub fn sel13(self) -> &'a mut crate::W { + self.variant(Persel::Sel13) } #[doc = "Timeout period of 128k wdog cycles"] #[inline(always)] - pub fn sel14(self) -> &'a mut W { - self.variant(PERSEL_A::SEL14) + pub fn sel14(self) -> &'a mut crate::W { + self.variant(Persel::Sel14) } #[doc = "Timeout period of 256k wdog cycles"] #[inline(always)] - pub fn sel15(self) -> &'a mut W { - self.variant(PERSEL_A::SEL15) + pub fn sel15(self) -> &'a mut crate::W { + self.variant(Persel::Sel15) } } -#[doc = "Field `WARNSEL` reader - WDOG Warning Period Select"] -pub type WARNSEL_R = crate::FieldReader; #[doc = "WDOG Warning Period Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WARNSEL_A { +pub enum Warnsel { #[doc = "0: Disable"] - DIS = 0, + Dis = 0, #[doc = "1: Warning timeout is 25% of the Timeout."] - SEL1 = 1, + Sel1 = 1, #[doc = "2: Warning timeout is 50% of the Timeout."] - SEL2 = 2, + Sel2 = 2, #[doc = "3: Warning timeout is 75% of the Timeout."] - SEL3 = 3, + Sel3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WARNSEL_A) -> Self { + fn from(variant: Warnsel) -> Self { variant as _ } } -impl WARNSEL_R { +impl crate::FieldSpec for Warnsel { + type Ux = u8; +} +impl crate::IsEnum for Warnsel {} +#[doc = "Field `WARNSEL` reader - WDOG Warning Period Select"] +pub type WarnselR = crate::FieldReader; +impl WarnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> WARNSEL_A { + pub const fn variant(&self) -> Warnsel { match self.bits { - 0 => WARNSEL_A::DIS, - 1 => WARNSEL_A::SEL1, - 2 => WARNSEL_A::SEL2, - 3 => WARNSEL_A::SEL3, + 0 => Warnsel::Dis, + 1 => Warnsel::Sel1, + 2 => Warnsel::Sel2, + 3 => Warnsel::Sel3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DIS`"] + #[doc = "Disable"] #[inline(always)] pub fn is_dis(&self) -> bool { - *self == WARNSEL_A::DIS + *self == Warnsel::Dis } - #[doc = "Checks if the value of the field is `SEL1`"] + #[doc = "Warning timeout is 25% of the Timeout."] #[inline(always)] pub fn is_sel1(&self) -> bool { - *self == WARNSEL_A::SEL1 + *self == Warnsel::Sel1 } - #[doc = "Checks if the value of the field is `SEL2`"] + #[doc = "Warning timeout is 50% of the Timeout."] #[inline(always)] pub fn is_sel2(&self) -> bool { - *self == WARNSEL_A::SEL2 + *self == Warnsel::Sel2 } - #[doc = "Checks if the value of the field is `SEL3`"] + #[doc = "Warning timeout is 75% of the Timeout."] #[inline(always)] pub fn is_sel3(&self) -> bool { - *self == WARNSEL_A::SEL3 + *self == Warnsel::Sel3 } } #[doc = "Field `WARNSEL` writer - WDOG Warning Period Select"] -pub type WARNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, WARNSEL_A, 2, O>; -impl<'a, const O: u8> WARNSEL_W<'a, O> { +pub type WarnselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Warnsel, crate::Safe>; +impl<'a, REG> WarnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Disable"] #[inline(always)] - pub fn dis(self) -> &'a mut W { - self.variant(WARNSEL_A::DIS) + pub fn dis(self) -> &'a mut crate::W { + self.variant(Warnsel::Dis) } #[doc = "Warning timeout is 25% of the Timeout."] #[inline(always)] - pub fn sel1(self) -> &'a mut W { - self.variant(WARNSEL_A::SEL1) + pub fn sel1(self) -> &'a mut crate::W { + self.variant(Warnsel::Sel1) } #[doc = "Warning timeout is 50% of the Timeout."] #[inline(always)] - pub fn sel2(self) -> &'a mut W { - self.variant(WARNSEL_A::SEL2) + pub fn sel2(self) -> &'a mut crate::W { + self.variant(Warnsel::Sel2) } #[doc = "Warning timeout is 75% of the Timeout."] #[inline(always)] - pub fn sel3(self) -> &'a mut W { - self.variant(WARNSEL_A::SEL3) + pub fn sel3(self) -> &'a mut crate::W { + self.variant(Warnsel::Sel3) } } -#[doc = "Field `WINSEL` reader - WDOG Illegal Window Select"] -pub type WINSEL_R = crate::FieldReader; #[doc = "WDOG Illegal Window Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WINSEL_A { +pub enum Winsel { #[doc = "0: Disabled."] - DIS = 0, + Dis = 0, #[doc = "1: Window timeout is 12.5% of the Timeout."] - SEL1 = 1, + Sel1 = 1, #[doc = "2: Window timeout is 25% of the Timeout."] - SEL2 = 2, + Sel2 = 2, #[doc = "3: Window timeout is 37.5% of the Timeout."] - SEL3 = 3, + Sel3 = 3, #[doc = "4: Window timeout is 50% of the Timeout."] - SEL4 = 4, + Sel4 = 4, #[doc = "5: Window timeout is 62.5% of the Timeout."] - SEL5 = 5, + Sel5 = 5, #[doc = "6: Window timeout is 75.5% of the Timeout."] - SEL6 = 6, + Sel6 = 6, #[doc = "7: Window timeout is 87.5% of the Timeout."] - SEL7 = 7, + Sel7 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WINSEL_A) -> Self { + fn from(variant: Winsel) -> Self { variant as _ } } -impl WINSEL_R { +impl crate::FieldSpec for Winsel { + type Ux = u8; +} +impl crate::IsEnum for Winsel {} +#[doc = "Field `WINSEL` reader - WDOG Illegal Window Select"] +pub type WinselR = crate::FieldReader; +impl WinselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> WINSEL_A { + pub const fn variant(&self) -> Winsel { match self.bits { - 0 => WINSEL_A::DIS, - 1 => WINSEL_A::SEL1, - 2 => WINSEL_A::SEL2, - 3 => WINSEL_A::SEL3, - 4 => WINSEL_A::SEL4, - 5 => WINSEL_A::SEL5, - 6 => WINSEL_A::SEL6, - 7 => WINSEL_A::SEL7, + 0 => Winsel::Dis, + 1 => Winsel::Sel1, + 2 => Winsel::Sel2, + 3 => Winsel::Sel3, + 4 => Winsel::Sel4, + 5 => Winsel::Sel5, + 6 => Winsel::Sel6, + 7 => Winsel::Sel7, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DIS`"] + #[doc = "Disabled."] #[inline(always)] pub fn is_dis(&self) -> bool { - *self == WINSEL_A::DIS + *self == Winsel::Dis } - #[doc = "Checks if the value of the field is `SEL1`"] + #[doc = "Window timeout is 12.5% of the Timeout."] #[inline(always)] pub fn is_sel1(&self) -> bool { - *self == WINSEL_A::SEL1 + *self == Winsel::Sel1 } - #[doc = "Checks if the value of the field is `SEL2`"] + #[doc = "Window timeout is 25% of the Timeout."] #[inline(always)] pub fn is_sel2(&self) -> bool { - *self == WINSEL_A::SEL2 + *self == Winsel::Sel2 } - #[doc = "Checks if the value of the field is `SEL3`"] + #[doc = "Window timeout is 37.5% of the Timeout."] #[inline(always)] pub fn is_sel3(&self) -> bool { - *self == WINSEL_A::SEL3 + *self == Winsel::Sel3 } - #[doc = "Checks if the value of the field is `SEL4`"] + #[doc = "Window timeout is 50% of the Timeout."] #[inline(always)] pub fn is_sel4(&self) -> bool { - *self == WINSEL_A::SEL4 + *self == Winsel::Sel4 } - #[doc = "Checks if the value of the field is `SEL5`"] + #[doc = "Window timeout is 62.5% of the Timeout."] #[inline(always)] pub fn is_sel5(&self) -> bool { - *self == WINSEL_A::SEL5 + *self == Winsel::Sel5 } - #[doc = "Checks if the value of the field is `SEL6`"] + #[doc = "Window timeout is 75.5% of the Timeout."] #[inline(always)] pub fn is_sel6(&self) -> bool { - *self == WINSEL_A::SEL6 + *self == Winsel::Sel6 } - #[doc = "Checks if the value of the field is `SEL7`"] + #[doc = "Window timeout is 87.5% of the Timeout."] #[inline(always)] pub fn is_sel7(&self) -> bool { - *self == WINSEL_A::SEL7 + *self == Winsel::Sel7 } } #[doc = "Field `WINSEL` writer - WDOG Illegal Window Select"] -pub type WINSEL_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, WINSEL_A, 3, O>; -impl<'a, const O: u8> WINSEL_W<'a, O> { +pub type WinselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Winsel, crate::Safe>; +impl<'a, REG> WinselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Disabled."] #[inline(always)] - pub fn dis(self) -> &'a mut W { - self.variant(WINSEL_A::DIS) + pub fn dis(self) -> &'a mut crate::W { + self.variant(Winsel::Dis) } #[doc = "Window timeout is 12.5% of the Timeout."] #[inline(always)] - pub fn sel1(self) -> &'a mut W { - self.variant(WINSEL_A::SEL1) + pub fn sel1(self) -> &'a mut crate::W { + self.variant(Winsel::Sel1) } #[doc = "Window timeout is 25% of the Timeout."] #[inline(always)] - pub fn sel2(self) -> &'a mut W { - self.variant(WINSEL_A::SEL2) + pub fn sel2(self) -> &'a mut crate::W { + self.variant(Winsel::Sel2) } #[doc = "Window timeout is 37.5% of the Timeout."] #[inline(always)] - pub fn sel3(self) -> &'a mut W { - self.variant(WINSEL_A::SEL3) + pub fn sel3(self) -> &'a mut crate::W { + self.variant(Winsel::Sel3) } #[doc = "Window timeout is 50% of the Timeout."] #[inline(always)] - pub fn sel4(self) -> &'a mut W { - self.variant(WINSEL_A::SEL4) + pub fn sel4(self) -> &'a mut crate::W { + self.variant(Winsel::Sel4) } #[doc = "Window timeout is 62.5% of the Timeout."] #[inline(always)] - pub fn sel5(self) -> &'a mut W { - self.variant(WINSEL_A::SEL5) + pub fn sel5(self) -> &'a mut crate::W { + self.variant(Winsel::Sel5) } #[doc = "Window timeout is 75.5% of the Timeout."] #[inline(always)] - pub fn sel6(self) -> &'a mut W { - self.variant(WINSEL_A::SEL6) + pub fn sel6(self) -> &'a mut crate::W { + self.variant(Winsel::Sel6) } #[doc = "Window timeout is 87.5% of the Timeout."] #[inline(always)] - pub fn sel7(self) -> &'a mut W { - self.variant(WINSEL_A::SEL7) + pub fn sel7(self) -> &'a mut crate::W { + self.variant(Winsel::Sel7) } } impl R { #[doc = "Bit 0 - WDOG Clear Source"] #[inline(always)] - pub fn clrsrc(&self) -> CLRSRC_R { - CLRSRC_R::new((self.bits & 1) != 0) + pub fn clrsrc(&self) -> ClrsrcR { + ClrsrcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - EM1 Run"] #[inline(always)] - pub fn em1run(&self) -> EM1RUN_R { - EM1RUN_R::new(((self.bits >> 1) & 1) != 0) + pub fn em1run(&self) -> Em1runR { + Em1runR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - EM2 Run"] #[inline(always)] - pub fn em2run(&self) -> EM2RUN_R { - EM2RUN_R::new(((self.bits >> 2) & 1) != 0) + pub fn em2run(&self) -> Em2runR { + Em2runR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - EM3 Run"] #[inline(always)] - pub fn em3run(&self) -> EM3RUN_R { - EM3RUN_R::new(((self.bits >> 3) & 1) != 0) + pub fn em3run(&self) -> Em3runR { + Em3runR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - EM4 Block"] #[inline(always)] - pub fn em4block(&self) -> EM4BLOCK_R { - EM4BLOCK_R::new(((self.bits >> 4) & 1) != 0) + pub fn em4block(&self) -> Em4blockR { + Em4blockR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Debug Mode Run"] #[inline(always)] - pub fn debugrun(&self) -> DEBUGRUN_R { - DEBUGRUN_R::new(((self.bits >> 5) & 1) != 0) + pub fn debugrun(&self) -> DebugrunR { + DebugrunR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 8 - WDOG Reset Disable"] #[inline(always)] - pub fn wdogrstdis(&self) -> WDOGRSTDIS_R { - WDOGRSTDIS_R::new(((self.bits >> 8) & 1) != 0) + pub fn wdogrstdis(&self) -> WdogrstdisR { + WdogrstdisR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - PRS Src0 Missing Event WDOG Reset"] #[inline(always)] - pub fn prs0missrsten(&self) -> PRS0MISSRSTEN_R { - PRS0MISSRSTEN_R::new(((self.bits >> 9) & 1) != 0) + pub fn prs0missrsten(&self) -> Prs0missrstenR { + Prs0missrstenR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - PRS Src1 Missing Event WDOG Reset"] #[inline(always)] - pub fn prs1missrsten(&self) -> PRS1MISSRSTEN_R { - PRS1MISSRSTEN_R::new(((self.bits >> 10) & 1) != 0) + pub fn prs1missrsten(&self) -> Prs1missrstenR { + Prs1missrstenR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bits 16:19 - WDOG Timeout Period Select"] #[inline(always)] - pub fn persel(&self) -> PERSEL_R { - PERSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn persel(&self) -> PerselR { + PerselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:25 - WDOG Warning Period Select"] #[inline(always)] - pub fn warnsel(&self) -> WARNSEL_R { - WARNSEL_R::new(((self.bits >> 24) & 3) as u8) + pub fn warnsel(&self) -> WarnselR { + WarnselR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 28:30 - WDOG Illegal Window Select"] #[inline(always)] - pub fn winsel(&self) -> WINSEL_R { - WINSEL_R::new(((self.bits >> 28) & 7) as u8) + pub fn winsel(&self) -> WinselR { + WinselR::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bit 0 - WDOG Clear Source"] #[inline(always)] #[must_use] - pub fn clrsrc(&mut self) -> CLRSRC_W<0> { - CLRSRC_W::new(self) + pub fn clrsrc(&mut self) -> ClrsrcW { + ClrsrcW::new(self, 0) } #[doc = "Bit 1 - EM1 Run"] #[inline(always)] #[must_use] - pub fn em1run(&mut self) -> EM1RUN_W<1> { - EM1RUN_W::new(self) + pub fn em1run(&mut self) -> Em1runW { + Em1runW::new(self, 1) } #[doc = "Bit 2 - EM2 Run"] #[inline(always)] #[must_use] - pub fn em2run(&mut self) -> EM2RUN_W<2> { - EM2RUN_W::new(self) + pub fn em2run(&mut self) -> Em2runW { + Em2runW::new(self, 2) } #[doc = "Bit 3 - EM3 Run"] #[inline(always)] #[must_use] - pub fn em3run(&mut self) -> EM3RUN_W<3> { - EM3RUN_W::new(self) + pub fn em3run(&mut self) -> Em3runW { + Em3runW::new(self, 3) } #[doc = "Bit 4 - EM4 Block"] #[inline(always)] #[must_use] - pub fn em4block(&mut self) -> EM4BLOCK_W<4> { - EM4BLOCK_W::new(self) + pub fn em4block(&mut self) -> Em4blockW { + Em4blockW::new(self, 4) } #[doc = "Bit 5 - Debug Mode Run"] #[inline(always)] #[must_use] - pub fn debugrun(&mut self) -> DEBUGRUN_W<5> { - DEBUGRUN_W::new(self) + pub fn debugrun(&mut self) -> DebugrunW { + DebugrunW::new(self, 5) } #[doc = "Bit 8 - WDOG Reset Disable"] #[inline(always)] #[must_use] - pub fn wdogrstdis(&mut self) -> WDOGRSTDIS_W<8> { - WDOGRSTDIS_W::new(self) + pub fn wdogrstdis(&mut self) -> WdogrstdisW { + WdogrstdisW::new(self, 8) } #[doc = "Bit 9 - PRS Src0 Missing Event WDOG Reset"] #[inline(always)] #[must_use] - pub fn prs0missrsten(&mut self) -> PRS0MISSRSTEN_W<9> { - PRS0MISSRSTEN_W::new(self) + pub fn prs0missrsten(&mut self) -> Prs0missrstenW { + Prs0missrstenW::new(self, 9) } #[doc = "Bit 10 - PRS Src1 Missing Event WDOG Reset"] #[inline(always)] #[must_use] - pub fn prs1missrsten(&mut self) -> PRS1MISSRSTEN_W<10> { - PRS1MISSRSTEN_W::new(self) + pub fn prs1missrsten(&mut self) -> Prs1missrstenW { + Prs1missrstenW::new(self, 10) } #[doc = "Bits 16:19 - WDOG Timeout Period Select"] #[inline(always)] #[must_use] - pub fn persel(&mut self) -> PERSEL_W<16> { - PERSEL_W::new(self) + pub fn persel(&mut self) -> PerselW { + PerselW::new(self, 16) } #[doc = "Bits 24:25 - WDOG Warning Period Select"] #[inline(always)] #[must_use] - pub fn warnsel(&mut self) -> WARNSEL_W<24> { - WARNSEL_W::new(self) + pub fn warnsel(&mut self) -> WarnselW { + WarnselW::new(self, 24) } #[doc = "Bits 28:30 - WDOG Illegal Window Select"] #[inline(always)] #[must_use] - pub fn winsel(&mut self) -> WINSEL_W<28> { - WINSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn winsel(&mut self) -> WinselW { + WinselW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0x000f_0000"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x000f_0000; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0x000f_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/cmd.rs index bcf759a..925f1fc 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/cmd.rs @@ -1,78 +1,56 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "WDOG Timer Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLEAR_AW { +pub enum Clear { #[doc = "0: WDOG timer is unchanged."] - UNCHANGED = 0, + Unchanged = 0, #[doc = "1: WDOG timer is cleared to 0."] - CLEARED = 1, + Cleared = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLEAR_AW) -> Self { + fn from(variant: Clear) -> Self { variant as u8 != 0 } } #[doc = "Field `CLEAR` writer - WDOG Timer Clear"] -pub type CLEAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, CLEAR_AW, O>; -impl<'a, const O: u8> CLEAR_W<'a, O> { +pub type ClearW<'a, REG> = crate::BitWriter<'a, REG, Clear>; +impl<'a, REG> ClearW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "WDOG timer is unchanged."] #[inline(always)] - pub fn unchanged(self) -> &'a mut W { - self.variant(CLEAR_AW::UNCHANGED) + pub fn unchanged(self) -> &'a mut crate::W { + self.variant(Clear::Unchanged) } #[doc = "WDOG timer is cleared to 0."] #[inline(always)] - pub fn cleared(self) -> &'a mut W { - self.variant(CLEAR_AW::CLEARED) + pub fn cleared(self) -> &'a mut crate::W { + self.variant(Clear::Cleared) } } impl W { #[doc = "Bit 0 - WDOG Timer Clear"] #[inline(always)] #[must_use] - pub fn clear(&mut self) -> CLEAR_W<0> { - CLEAR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clear(&mut self) -> ClearW { + ClearW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/en.rs index bd67dfd..d831021 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Module Enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Module Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disabling busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Module Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disabling busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Module Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/ien.rs index f30100e..98d5e03 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/ien.rs @@ -1,140 +1,100 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOUT` reader - WDOG Timeout Interrupt Enable"] -pub type TOUT_R = crate::BitReader; +pub type ToutR = crate::BitReader; #[doc = "Field `TOUT` writer - WDOG Timeout Interrupt Enable"] -pub type TOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ToutW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WARN` reader - WDOG Warning Timeout Interrupt Enable"] -pub type WARN_R = crate::BitReader; +pub type WarnR = crate::BitReader; #[doc = "Field `WARN` writer - WDOG Warning Timeout Interrupt Enable"] -pub type WARN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type WarnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WIN` reader - WDOG Window Interrupt Enable"] -pub type WIN_R = crate::BitReader; +pub type WinR = crate::BitReader; #[doc = "Field `WIN` writer - WDOG Window Interrupt Enable"] -pub type WIN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type WinW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PEM0` reader - PRS Src0 Event Missing Interrupt Enable"] -pub type PEM0_R = crate::BitReader; +pub type Pem0R = crate::BitReader; #[doc = "Field `PEM0` writer - PRS Src0 Event Missing Interrupt Enable"] -pub type PEM0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Pem0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PEM1` reader - PRS Src1 Event Missing Interrupt Enable"] -pub type PEM1_R = crate::BitReader; +pub type Pem1R = crate::BitReader; #[doc = "Field `PEM1` writer - PRS Src1 Event Missing Interrupt Enable"] -pub type PEM1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Pem1W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - WDOG Timeout Interrupt Enable"] #[inline(always)] - pub fn tout(&self) -> TOUT_R { - TOUT_R::new((self.bits & 1) != 0) + pub fn tout(&self) -> ToutR { + ToutR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - WDOG Warning Timeout Interrupt Enable"] #[inline(always)] - pub fn warn(&self) -> WARN_R { - WARN_R::new(((self.bits >> 1) & 1) != 0) + pub fn warn(&self) -> WarnR { + WarnR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - WDOG Window Interrupt Enable"] #[inline(always)] - pub fn win(&self) -> WIN_R { - WIN_R::new(((self.bits >> 2) & 1) != 0) + pub fn win(&self) -> WinR { + WinR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - PRS Src0 Event Missing Interrupt Enable"] #[inline(always)] - pub fn pem0(&self) -> PEM0_R { - PEM0_R::new(((self.bits >> 3) & 1) != 0) + pub fn pem0(&self) -> Pem0R { + Pem0R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - PRS Src1 Event Missing Interrupt Enable"] #[inline(always)] - pub fn pem1(&self) -> PEM1_R { - PEM1_R::new(((self.bits >> 4) & 1) != 0) + pub fn pem1(&self) -> Pem1R { + Pem1R::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - WDOG Timeout Interrupt Enable"] #[inline(always)] #[must_use] - pub fn tout(&mut self) -> TOUT_W<0> { - TOUT_W::new(self) + pub fn tout(&mut self) -> ToutW { + ToutW::new(self, 0) } #[doc = "Bit 1 - WDOG Warning Timeout Interrupt Enable"] #[inline(always)] #[must_use] - pub fn warn(&mut self) -> WARN_W<1> { - WARN_W::new(self) + pub fn warn(&mut self) -> WarnW { + WarnW::new(self, 1) } #[doc = "Bit 2 - WDOG Window Interrupt Enable"] #[inline(always)] #[must_use] - pub fn win(&mut self) -> WIN_W<2> { - WIN_W::new(self) + pub fn win(&mut self) -> WinW { + WinW::new(self, 2) } #[doc = "Bit 3 - PRS Src0 Event Missing Interrupt Enable"] #[inline(always)] #[must_use] - pub fn pem0(&mut self) -> PEM0_W<3> { - PEM0_W::new(self) + pub fn pem0(&mut self) -> Pem0W { + Pem0W::new(self, 3) } #[doc = "Bit 4 - PRS Src1 Event Missing Interrupt Enable"] #[inline(always)] #[must_use] - pub fn pem1(&mut self) -> PEM1_W<4> { - PEM1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pem1(&mut self) -> Pem1W { + Pem1W::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/if_.rs index 3c5ca4c..30a8c97 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/if_.rs @@ -1,140 +1,100 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOUT` reader - WDOG Timeout Interrupt Flag"] -pub type TOUT_R = crate::BitReader; +pub type ToutR = crate::BitReader; #[doc = "Field `TOUT` writer - WDOG Timeout Interrupt Flag"] -pub type TOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ToutW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WARN` reader - WDOG Warning Timeout Interrupt Flag"] -pub type WARN_R = crate::BitReader; +pub type WarnR = crate::BitReader; #[doc = "Field `WARN` writer - WDOG Warning Timeout Interrupt Flag"] -pub type WARN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type WarnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WIN` reader - WDOG Window Interrupt Flag"] -pub type WIN_R = crate::BitReader; +pub type WinR = crate::BitReader; #[doc = "Field `WIN` writer - WDOG Window Interrupt Flag"] -pub type WIN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type WinW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PEM0` reader - PRS Src0 Event Missing Interrupt Flag"] -pub type PEM0_R = crate::BitReader; +pub type Pem0R = crate::BitReader; #[doc = "Field `PEM0` writer - PRS Src0 Event Missing Interrupt Flag"] -pub type PEM0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Pem0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PEM1` reader - PRS Src1 Event Missing Interrupt Flag"] -pub type PEM1_R = crate::BitReader; +pub type Pem1R = crate::BitReader; #[doc = "Field `PEM1` writer - PRS Src1 Event Missing Interrupt Flag"] -pub type PEM1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Pem1W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - WDOG Timeout Interrupt Flag"] #[inline(always)] - pub fn tout(&self) -> TOUT_R { - TOUT_R::new((self.bits & 1) != 0) + pub fn tout(&self) -> ToutR { + ToutR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - WDOG Warning Timeout Interrupt Flag"] #[inline(always)] - pub fn warn(&self) -> WARN_R { - WARN_R::new(((self.bits >> 1) & 1) != 0) + pub fn warn(&self) -> WarnR { + WarnR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - WDOG Window Interrupt Flag"] #[inline(always)] - pub fn win(&self) -> WIN_R { - WIN_R::new(((self.bits >> 2) & 1) != 0) + pub fn win(&self) -> WinR { + WinR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - PRS Src0 Event Missing Interrupt Flag"] #[inline(always)] - pub fn pem0(&self) -> PEM0_R { - PEM0_R::new(((self.bits >> 3) & 1) != 0) + pub fn pem0(&self) -> Pem0R { + Pem0R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - PRS Src1 Event Missing Interrupt Flag"] #[inline(always)] - pub fn pem1(&self) -> PEM1_R { - PEM1_R::new(((self.bits >> 4) & 1) != 0) + pub fn pem1(&self) -> Pem1R { + Pem1R::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - WDOG Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn tout(&mut self) -> TOUT_W<0> { - TOUT_W::new(self) + pub fn tout(&mut self) -> ToutW { + ToutW::new(self, 0) } #[doc = "Bit 1 - WDOG Warning Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn warn(&mut self) -> WARN_W<1> { - WARN_W::new(self) + pub fn warn(&mut self) -> WarnW { + WarnW::new(self, 1) } #[doc = "Bit 2 - WDOG Window Interrupt Flag"] #[inline(always)] #[must_use] - pub fn win(&mut self) -> WIN_W<2> { - WIN_W::new(self) + pub fn win(&mut self) -> WinW { + WinW::new(self, 2) } #[doc = "Bit 3 - PRS Src0 Event Missing Interrupt Flag"] #[inline(always)] #[must_use] - pub fn pem0(&mut self) -> PEM0_W<3> { - PEM0_W::new(self) + pub fn pem0(&mut self) -> Pem0W { + Pem0W::new(self, 3) } #[doc = "Bit 4 - PRS Src1 Event Missing Interrupt Flag"] #[inline(always)] #[must_use] - pub fn pem1(&mut self) -> PEM1_W<4> { - PEM1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pem1(&mut self) -> Pem1W { + Pem1W::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/ipversion.rs index ad2c166..23b42d5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/lock.rs index b24c0b5..748fd84 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/lock.rs @@ -1,80 +1,62 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "WDOG Configuration Lock\n\nValue on reset: 44008"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "0: Lock WDOG lockable registers"] - LOCK = 0, + Lock = 0, #[doc = "44008: Unlock WDOG lockable registers"] - UNLOCK = 44008, + Unlock = 44008, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - WDOG Configuration Lock"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Lock WDOG lockable registers"] #[inline(always)] - pub fn lock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::LOCK) + pub fn lock(self) -> &'a mut crate::W { + self.variant(Lockkey::Lock) } #[doc = "Unlock WDOG lockable registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - WDOG Configuration Lock"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0xabe8"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0xabe8; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0xabe8; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/status.rs index 15e4f04..1c88571 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/status.rs @@ -1,71 +1,56 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `LOCK` reader - WDOG Configuration Lock Status"] -pub type LOCK_R = crate::BitReader; +pub type R = crate::R; #[doc = "WDOG Configuration Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCK_A { +pub enum Lock { #[doc = "0: All WDOG lockable registers are unlocked."] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: All WDOG lockable registers are locked."] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCK_A) -> Self { + fn from(variant: Lock) -> Self { variant as u8 != 0 } } -impl LOCK_R { +#[doc = "Field `LOCK` reader - WDOG Configuration Lock Status"] +pub type LockR = crate::BitReader; +impl LockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCK_A { + pub const fn variant(&self) -> Lock { match self.bits { - false => LOCK_A::UNLOCKED, - true => LOCK_A::LOCKED, + false => Lock::Unlocked, + true => Lock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "All WDOG lockable registers are unlocked."] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCK_A::UNLOCKED + *self == Lock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "All WDOG lockable registers are locked."] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCK_A::LOCKED + *self == Lock::Locked } } impl R { #[doc = "Bit 31 - WDOG Configuration Lock Status"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new(((self.bits >> 31) & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/syncbusy.rs index dfc12b2..a25871a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_ns/syncbusy.rs @@ -1,37 +1,22 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CMD` reader - Sync Busy for Cmd Register"] -pub type CMD_R = crate::BitReader; +pub type CmdR = crate::BitReader; impl R { #[doc = "Bit 0 - Sync Busy for Cmd Register"] #[inline(always)] - pub fn cmd(&self) -> CMD_R { - CMD_R::new((self.bits & 1) != 0) + pub fn cmd(&self) -> CmdR { + CmdR::new((self.bits & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s.rs index 1d2afc0..c0e8de2 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s.rs @@ -1,59 +1,115 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { + ipversion: Ipversion, + en: En, + cfg: Cfg, + cmd: Cmd, + _reserved4: [u8; 0x04], + status: Status, + if_: If, + ien: Ien, + lock: Lock, + syncbusy: Syncbusy, +} +impl RegisterBlock { #[doc = "0x00 - No Description"] - pub ipversion: IPVERSION, + #[inline(always)] + pub const fn ipversion(&self) -> &Ipversion { + &self.ipversion + } #[doc = "0x04 - No Description"] - pub en: EN, + #[inline(always)] + pub const fn en(&self) -> &En { + &self.en + } #[doc = "0x08 - No Description"] - pub cfg: CFG, + #[inline(always)] + pub const fn cfg(&self) -> &Cfg { + &self.cfg + } #[doc = "0x0c - No Description"] - pub cmd: CMD, - _reserved4: [u8; 0x04], + #[inline(always)] + pub const fn cmd(&self) -> &Cmd { + &self.cmd + } #[doc = "0x14 - No Description"] - pub status: STATUS, + #[inline(always)] + pub const fn status(&self) -> &Status { + &self.status + } #[doc = "0x18 - No Description"] - pub if_: IF, + #[inline(always)] + pub const fn if_(&self) -> &If { + &self.if_ + } #[doc = "0x1c - No Description"] - pub ien: IEN, + #[inline(always)] + pub const fn ien(&self) -> &Ien { + &self.ien + } #[doc = "0x20 - No Description"] - pub lock: LOCK, + #[inline(always)] + pub const fn lock(&self) -> &Lock { + &self.lock + } #[doc = "0x24 - No Description"] - pub syncbusy: SYNCBUSY, + #[inline(always)] + pub const fn syncbusy(&self) -> &Syncbusy { + &self.syncbusy + } } -#[doc = "IPVERSION (r) register accessor: an alias for `Reg`"] -pub type IPVERSION = crate::Reg; +#[doc = "IPVERSION (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ipversion`] +module"] +#[doc(alias = "IPVERSION")] +pub type Ipversion = crate::Reg; #[doc = "No Description"] pub mod ipversion; -#[doc = "EN (rw) register accessor: an alias for `Reg`"] -pub type EN = crate::Reg; +#[doc = "EN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en`] +module"] +#[doc(alias = "EN")] +pub type En = crate::Reg; #[doc = "No Description"] pub mod en; -#[doc = "CFG (rw) register accessor: an alias for `Reg`"] -pub type CFG = crate::Reg; +#[doc = "CFG (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "No Description"] pub mod cfg; -#[doc = "CMD (w) register accessor: an alias for `Reg`"] -pub type CMD = crate::Reg; +#[doc = "CMD (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] +module"] +#[doc(alias = "CMD")] +pub type Cmd = crate::Reg; #[doc = "No Description"] pub mod cmd; -#[doc = "STATUS (r) register accessor: an alias for `Reg`"] -pub type STATUS = crate::Reg; +#[doc = "STATUS (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +module"] +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "No Description"] pub mod status; -#[doc = "IF (rw) register accessor: an alias for `Reg`"] -pub type IF = crate::Reg; +#[doc = "IF (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@if_`] +module"] +#[doc(alias = "IF")] +pub type If = crate::Reg; #[doc = "No Description"] pub mod if_; -#[doc = "IEN (rw) register accessor: an alias for `Reg`"] -pub type IEN = crate::Reg; +#[doc = "IEN (rw) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ien`] +module"] +#[doc(alias = "IEN")] +pub type Ien = crate::Reg; #[doc = "No Description"] pub mod ien; -#[doc = "LOCK (w) register accessor: an alias for `Reg`"] -pub type LOCK = crate::Reg; +#[doc = "LOCK (w) register accessor: No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lock`] +module"] +#[doc(alias = "LOCK")] +pub type Lock = crate::Reg; #[doc = "No Description"] pub mod lock; -#[doc = "SYNCBUSY (r) register accessor: an alias for `Reg`"] -pub type SYNCBUSY = crate::Reg; +#[doc = "SYNCBUSY (r) register accessor: No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`] +module"] +#[doc(alias = "SYNCBUSY")] +pub type Syncbusy = crate::Reg; #[doc = "No Description"] pub mod syncbusy; diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/cfg.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/cfg.rs index fe30338..365ffd5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/cfg.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/cfg.rs @@ -1,998 +1,1002 @@ #[doc = "Register `CFG` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} -#[doc = "Field `CLRSRC` reader - WDOG Clear Source"] -pub type CLRSRC_R = crate::BitReader; +pub type W = crate::W; #[doc = "WDOG Clear Source\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLRSRC_A { +pub enum Clrsrc { #[doc = "0: A write to the clear bit will clear the WDOG counter"] - SW = 0, + Sw = 0, #[doc = "1: A rising edge on the PRS Source 0 will clear the WDOG counter"] - PRSSRC0 = 1, + Prssrc0 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLRSRC_A) -> Self { + fn from(variant: Clrsrc) -> Self { variant as u8 != 0 } } -impl CLRSRC_R { +#[doc = "Field `CLRSRC` reader - WDOG Clear Source"] +pub type ClrsrcR = crate::BitReader; +impl ClrsrcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> CLRSRC_A { + pub const fn variant(&self) -> Clrsrc { match self.bits { - false => CLRSRC_A::SW, - true => CLRSRC_A::PRSSRC0, + false => Clrsrc::Sw, + true => Clrsrc::Prssrc0, } } - #[doc = "Checks if the value of the field is `SW`"] + #[doc = "A write to the clear bit will clear the WDOG counter"] #[inline(always)] pub fn is_sw(&self) -> bool { - *self == CLRSRC_A::SW + *self == Clrsrc::Sw } - #[doc = "Checks if the value of the field is `PRSSRC0`"] + #[doc = "A rising edge on the PRS Source 0 will clear the WDOG counter"] #[inline(always)] pub fn is_prssrc0(&self) -> bool { - *self == CLRSRC_A::PRSSRC0 + *self == Clrsrc::Prssrc0 } } #[doc = "Field `CLRSRC` writer - WDOG Clear Source"] -pub type CLRSRC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, CLRSRC_A, O>; -impl<'a, const O: u8> CLRSRC_W<'a, O> { +pub type ClrsrcW<'a, REG> = crate::BitWriter<'a, REG, Clrsrc>; +impl<'a, REG> ClrsrcW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "A write to the clear bit will clear the WDOG counter"] #[inline(always)] - pub fn sw(self) -> &'a mut W { - self.variant(CLRSRC_A::SW) + pub fn sw(self) -> &'a mut crate::W { + self.variant(Clrsrc::Sw) } #[doc = "A rising edge on the PRS Source 0 will clear the WDOG counter"] #[inline(always)] - pub fn prssrc0(self) -> &'a mut W { - self.variant(CLRSRC_A::PRSSRC0) + pub fn prssrc0(self) -> &'a mut crate::W { + self.variant(Clrsrc::Prssrc0) } } -#[doc = "Field `EM1RUN` reader - EM1 Run"] -pub type EM1RUN_R = crate::BitReader; #[doc = "EM1 Run\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EM1RUN_A { +pub enum Em1run { #[doc = "0: WDOG timer is frozen in EM1."] - DISABLE = 0, + Disable = 0, #[doc = "1: WDOG timer is running in EM1."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EM1RUN_A) -> Self { + fn from(variant: Em1run) -> Self { variant as u8 != 0 } } -impl EM1RUN_R { +#[doc = "Field `EM1RUN` reader - EM1 Run"] +pub type Em1runR = crate::BitReader; +impl Em1runR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EM1RUN_A { + pub const fn variant(&self) -> Em1run { match self.bits { - false => EM1RUN_A::DISABLE, - true => EM1RUN_A::ENABLE, + false => Em1run::Disable, + true => Em1run::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "WDOG timer is frozen in EM1."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EM1RUN_A::DISABLE + *self == Em1run::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "WDOG timer is running in EM1."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EM1RUN_A::ENABLE + *self == Em1run::Enable } } #[doc = "Field `EM1RUN` writer - EM1 Run"] -pub type EM1RUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, EM1RUN_A, O>; -impl<'a, const O: u8> EM1RUN_W<'a, O> { +pub type Em1runW<'a, REG> = crate::BitWriter<'a, REG, Em1run>; +impl<'a, REG> Em1runW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "WDOG timer is frozen in EM1."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EM1RUN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Em1run::Disable) } #[doc = "WDOG timer is running in EM1."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EM1RUN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Em1run::Enable) } } -#[doc = "Field `EM2RUN` reader - EM2 Run"] -pub type EM2RUN_R = crate::BitReader; #[doc = "EM2 Run\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EM2RUN_A { +pub enum Em2run { #[doc = "0: WDOG timer is frozen in EM2."] - DISABLE = 0, + Disable = 0, #[doc = "1: WDOG timer is running in EM2."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EM2RUN_A) -> Self { + fn from(variant: Em2run) -> Self { variant as u8 != 0 } } -impl EM2RUN_R { +#[doc = "Field `EM2RUN` reader - EM2 Run"] +pub type Em2runR = crate::BitReader; +impl Em2runR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EM2RUN_A { + pub const fn variant(&self) -> Em2run { match self.bits { - false => EM2RUN_A::DISABLE, - true => EM2RUN_A::ENABLE, + false => Em2run::Disable, + true => Em2run::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "WDOG timer is frozen in EM2."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EM2RUN_A::DISABLE + *self == Em2run::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "WDOG timer is running in EM2."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EM2RUN_A::ENABLE + *self == Em2run::Enable } } #[doc = "Field `EM2RUN` writer - EM2 Run"] -pub type EM2RUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, EM2RUN_A, O>; -impl<'a, const O: u8> EM2RUN_W<'a, O> { +pub type Em2runW<'a, REG> = crate::BitWriter<'a, REG, Em2run>; +impl<'a, REG> Em2runW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "WDOG timer is frozen in EM2."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EM2RUN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Em2run::Disable) } #[doc = "WDOG timer is running in EM2."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EM2RUN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Em2run::Enable) } } -#[doc = "Field `EM3RUN` reader - EM3 Run"] -pub type EM3RUN_R = crate::BitReader; #[doc = "EM3 Run\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EM3RUN_A { +pub enum Em3run { #[doc = "0: WDOG timer is frozen in EM3."] - DISABLE = 0, + Disable = 0, #[doc = "1: WDOG timer is running in EM3."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EM3RUN_A) -> Self { + fn from(variant: Em3run) -> Self { variant as u8 != 0 } } -impl EM3RUN_R { +#[doc = "Field `EM3RUN` reader - EM3 Run"] +pub type Em3runR = crate::BitReader; +impl Em3runR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EM3RUN_A { + pub const fn variant(&self) -> Em3run { match self.bits { - false => EM3RUN_A::DISABLE, - true => EM3RUN_A::ENABLE, + false => Em3run::Disable, + true => Em3run::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "WDOG timer is frozen in EM3."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EM3RUN_A::DISABLE + *self == Em3run::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "WDOG timer is running in EM3."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EM3RUN_A::ENABLE + *self == Em3run::Enable } } #[doc = "Field `EM3RUN` writer - EM3 Run"] -pub type EM3RUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, EM3RUN_A, O>; -impl<'a, const O: u8> EM3RUN_W<'a, O> { +pub type Em3runW<'a, REG> = crate::BitWriter<'a, REG, Em3run>; +impl<'a, REG> Em3runW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "WDOG timer is frozen in EM3."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EM3RUN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Em3run::Disable) } #[doc = "WDOG timer is running in EM3."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EM3RUN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Em3run::Enable) } } -#[doc = "Field `EM4BLOCK` reader - EM4 Block"] -pub type EM4BLOCK_R = crate::BitReader; #[doc = "EM4 Block\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EM4BLOCK_A { +pub enum Em4block { #[doc = "0: EM4 can be entered by software. See EMU for detailed description."] - DISABLE = 0, + Disable = 0, #[doc = "1: EM4 cannot be entered by software."] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EM4BLOCK_A) -> Self { + fn from(variant: Em4block) -> Self { variant as u8 != 0 } } -impl EM4BLOCK_R { +#[doc = "Field `EM4BLOCK` reader - EM4 Block"] +pub type Em4blockR = crate::BitReader; +impl Em4blockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> EM4BLOCK_A { + pub const fn variant(&self) -> Em4block { match self.bits { - false => EM4BLOCK_A::DISABLE, - true => EM4BLOCK_A::ENABLE, + false => Em4block::Disable, + true => Em4block::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "EM4 can be entered by software. See EMU for detailed description."] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == EM4BLOCK_A::DISABLE + *self == Em4block::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "EM4 cannot be entered by software."] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == EM4BLOCK_A::ENABLE + *self == Em4block::Enable } } #[doc = "Field `EM4BLOCK` writer - EM4 Block"] -pub type EM4BLOCK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, EM4BLOCK_A, O>; -impl<'a, const O: u8> EM4BLOCK_W<'a, O> { +pub type Em4blockW<'a, REG> = crate::BitWriter<'a, REG, Em4block>; +impl<'a, REG> Em4blockW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "EM4 can be entered by software. See EMU for detailed description."] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(EM4BLOCK_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Em4block::Disable) } #[doc = "EM4 cannot be entered by software."] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(EM4BLOCK_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Em4block::Enable) } } -#[doc = "Field `DEBUGRUN` reader - Debug Mode Run"] -pub type DEBUGRUN_R = crate::BitReader; #[doc = "Debug Mode Run\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DEBUGRUN_A { +pub enum Debugrun { #[doc = "0: WDOG timer is frozen in debug mode"] - DISABLE = 0, + Disable = 0, #[doc = "1: WDOG timer is running in debug mode"] - ENABLE = 1, + Enable = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DEBUGRUN_A) -> Self { + fn from(variant: Debugrun) -> Self { variant as u8 != 0 } } -impl DEBUGRUN_R { +#[doc = "Field `DEBUGRUN` reader - Debug Mode Run"] +pub type DebugrunR = crate::BitReader; +impl DebugrunR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> DEBUGRUN_A { + pub const fn variant(&self) -> Debugrun { match self.bits { - false => DEBUGRUN_A::DISABLE, - true => DEBUGRUN_A::ENABLE, + false => Debugrun::Disable, + true => Debugrun::Enable, } } - #[doc = "Checks if the value of the field is `DISABLE`"] + #[doc = "WDOG timer is frozen in debug mode"] #[inline(always)] pub fn is_disable(&self) -> bool { - *self == DEBUGRUN_A::DISABLE + *self == Debugrun::Disable } - #[doc = "Checks if the value of the field is `ENABLE`"] + #[doc = "WDOG timer is running in debug mode"] #[inline(always)] pub fn is_enable(&self) -> bool { - *self == DEBUGRUN_A::ENABLE + *self == Debugrun::Enable } } #[doc = "Field `DEBUGRUN` writer - Debug Mode Run"] -pub type DEBUGRUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DEBUGRUN_A, O>; -impl<'a, const O: u8> DEBUGRUN_W<'a, O> { +pub type DebugrunW<'a, REG> = crate::BitWriter<'a, REG, Debugrun>; +impl<'a, REG> DebugrunW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "WDOG timer is frozen in debug mode"] #[inline(always)] - pub fn disable(self) -> &'a mut W { - self.variant(DEBUGRUN_A::DISABLE) + pub fn disable(self) -> &'a mut crate::W { + self.variant(Debugrun::Disable) } #[doc = "WDOG timer is running in debug mode"] #[inline(always)] - pub fn enable(self) -> &'a mut W { - self.variant(DEBUGRUN_A::ENABLE) + pub fn enable(self) -> &'a mut crate::W { + self.variant(Debugrun::Enable) } } -#[doc = "Field `WDOGRSTDIS` reader - WDOG Reset Disable"] -pub type WDOGRSTDIS_R = crate::BitReader; #[doc = "WDOG Reset Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WDOGRSTDIS_A { +pub enum Wdogrstdis { #[doc = "0: A timeout will cause a WDOG reset"] - EN = 0, + En = 0, #[doc = "1: A timeout will not cause a WDOG reset"] - DIS = 1, + Dis = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WDOGRSTDIS_A) -> Self { + fn from(variant: Wdogrstdis) -> Self { variant as u8 != 0 } } -impl WDOGRSTDIS_R { +#[doc = "Field `WDOGRSTDIS` reader - WDOG Reset Disable"] +pub type WdogrstdisR = crate::BitReader; +impl WdogrstdisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> WDOGRSTDIS_A { + pub const fn variant(&self) -> Wdogrstdis { match self.bits { - false => WDOGRSTDIS_A::EN, - true => WDOGRSTDIS_A::DIS, + false => Wdogrstdis::En, + true => Wdogrstdis::Dis, } } - #[doc = "Checks if the value of the field is `EN`"] + #[doc = "A timeout will cause a WDOG reset"] #[inline(always)] pub fn is_en(&self) -> bool { - *self == WDOGRSTDIS_A::EN + *self == Wdogrstdis::En } - #[doc = "Checks if the value of the field is `DIS`"] + #[doc = "A timeout will not cause a WDOG reset"] #[inline(always)] pub fn is_dis(&self) -> bool { - *self == WDOGRSTDIS_A::DIS + *self == Wdogrstdis::Dis } } #[doc = "Field `WDOGRSTDIS` writer - WDOG Reset Disable"] -pub type WDOGRSTDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, WDOGRSTDIS_A, O>; -impl<'a, const O: u8> WDOGRSTDIS_W<'a, O> { +pub type WdogrstdisW<'a, REG> = crate::BitWriter<'a, REG, Wdogrstdis>; +impl<'a, REG> WdogrstdisW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "A timeout will cause a WDOG reset"] #[inline(always)] - pub fn en(self) -> &'a mut W { - self.variant(WDOGRSTDIS_A::EN) + pub fn en(self) -> &'a mut crate::W { + self.variant(Wdogrstdis::En) } #[doc = "A timeout will not cause a WDOG reset"] #[inline(always)] - pub fn dis(self) -> &'a mut W { - self.variant(WDOGRSTDIS_A::DIS) + pub fn dis(self) -> &'a mut crate::W { + self.variant(Wdogrstdis::Dis) } } #[doc = "Field `PRS0MISSRSTEN` reader - PRS Src0 Missing Event WDOG Reset"] -pub type PRS0MISSRSTEN_R = crate::BitReader; +pub type Prs0missrstenR = crate::BitReader; #[doc = "Field `PRS0MISSRSTEN` writer - PRS Src0 Missing Event WDOG Reset"] -pub type PRS0MISSRSTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; +pub type Prs0missrstenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRS1MISSRSTEN` reader - PRS Src1 Missing Event WDOG Reset"] -pub type PRS1MISSRSTEN_R = crate::BitReader; +pub type Prs1missrstenR = crate::BitReader; #[doc = "Field `PRS1MISSRSTEN` writer - PRS Src1 Missing Event WDOG Reset"] -pub type PRS1MISSRSTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>; -#[doc = "Field `PERSEL` reader - WDOG Timeout Period Select"] -pub type PERSEL_R = crate::FieldReader; +pub type Prs1missrstenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "WDOG Timeout Period Select\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PERSEL_A { +pub enum Persel { #[doc = "0: Timeout period of 9 wdog cycles"] - SEL0 = 0, + Sel0 = 0, #[doc = "1: Timeout period of 17 wdog cycles"] - SEL1 = 1, + Sel1 = 1, #[doc = "2: Timeout period of 33 wdog cycles"] - SEL2 = 2, + Sel2 = 2, #[doc = "3: Timeout period of 65 wdog cycles"] - SEL3 = 3, + Sel3 = 3, #[doc = "4: Timeout period of 129 wdog cycles"] - SEL4 = 4, + Sel4 = 4, #[doc = "5: Timeout period of 257 wdog cycles"] - SEL5 = 5, + Sel5 = 5, #[doc = "6: Timeout period of 513 wdog cycles"] - SEL6 = 6, + Sel6 = 6, #[doc = "7: Timeout period of 1k wdog cycles"] - SEL7 = 7, + Sel7 = 7, #[doc = "8: Timeout period of 2k wdog cycles"] - SEL8 = 8, + Sel8 = 8, #[doc = "9: Timeout period of 4k wdog cycles"] - SEL9 = 9, + Sel9 = 9, #[doc = "10: Timeout period of 8k wdog cycles"] - SEL10 = 10, + Sel10 = 10, #[doc = "11: Timeout period of 16k wdog cycles"] - SEL11 = 11, + Sel11 = 11, #[doc = "12: Timeout period of 32k wdog cycles"] - SEL12 = 12, + Sel12 = 12, #[doc = "13: Timeout period of 64k wdog cycles"] - SEL13 = 13, + Sel13 = 13, #[doc = "14: Timeout period of 128k wdog cycles"] - SEL14 = 14, + Sel14 = 14, #[doc = "15: Timeout period of 256k wdog cycles"] - SEL15 = 15, + Sel15 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PERSEL_A) -> Self { + fn from(variant: Persel) -> Self { variant as _ } } -impl PERSEL_R { +impl crate::FieldSpec for Persel { + type Ux = u8; +} +impl crate::IsEnum for Persel {} +#[doc = "Field `PERSEL` reader - WDOG Timeout Period Select"] +pub type PerselR = crate::FieldReader; +impl PerselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PERSEL_A { + pub const fn variant(&self) -> Persel { match self.bits { - 0 => PERSEL_A::SEL0, - 1 => PERSEL_A::SEL1, - 2 => PERSEL_A::SEL2, - 3 => PERSEL_A::SEL3, - 4 => PERSEL_A::SEL4, - 5 => PERSEL_A::SEL5, - 6 => PERSEL_A::SEL6, - 7 => PERSEL_A::SEL7, - 8 => PERSEL_A::SEL8, - 9 => PERSEL_A::SEL9, - 10 => PERSEL_A::SEL10, - 11 => PERSEL_A::SEL11, - 12 => PERSEL_A::SEL12, - 13 => PERSEL_A::SEL13, - 14 => PERSEL_A::SEL14, - 15 => PERSEL_A::SEL15, + 0 => Persel::Sel0, + 1 => Persel::Sel1, + 2 => Persel::Sel2, + 3 => Persel::Sel3, + 4 => Persel::Sel4, + 5 => Persel::Sel5, + 6 => Persel::Sel6, + 7 => Persel::Sel7, + 8 => Persel::Sel8, + 9 => Persel::Sel9, + 10 => Persel::Sel10, + 11 => Persel::Sel11, + 12 => Persel::Sel12, + 13 => Persel::Sel13, + 14 => Persel::Sel14, + 15 => Persel::Sel15, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `SEL0`"] + #[doc = "Timeout period of 9 wdog cycles"] #[inline(always)] pub fn is_sel0(&self) -> bool { - *self == PERSEL_A::SEL0 + *self == Persel::Sel0 } - #[doc = "Checks if the value of the field is `SEL1`"] + #[doc = "Timeout period of 17 wdog cycles"] #[inline(always)] pub fn is_sel1(&self) -> bool { - *self == PERSEL_A::SEL1 + *self == Persel::Sel1 } - #[doc = "Checks if the value of the field is `SEL2`"] + #[doc = "Timeout period of 33 wdog cycles"] #[inline(always)] pub fn is_sel2(&self) -> bool { - *self == PERSEL_A::SEL2 + *self == Persel::Sel2 } - #[doc = "Checks if the value of the field is `SEL3`"] + #[doc = "Timeout period of 65 wdog cycles"] #[inline(always)] pub fn is_sel3(&self) -> bool { - *self == PERSEL_A::SEL3 + *self == Persel::Sel3 } - #[doc = "Checks if the value of the field is `SEL4`"] + #[doc = "Timeout period of 129 wdog cycles"] #[inline(always)] pub fn is_sel4(&self) -> bool { - *self == PERSEL_A::SEL4 + *self == Persel::Sel4 } - #[doc = "Checks if the value of the field is `SEL5`"] + #[doc = "Timeout period of 257 wdog cycles"] #[inline(always)] pub fn is_sel5(&self) -> bool { - *self == PERSEL_A::SEL5 + *self == Persel::Sel5 } - #[doc = "Checks if the value of the field is `SEL6`"] + #[doc = "Timeout period of 513 wdog cycles"] #[inline(always)] pub fn is_sel6(&self) -> bool { - *self == PERSEL_A::SEL6 + *self == Persel::Sel6 } - #[doc = "Checks if the value of the field is `SEL7`"] + #[doc = "Timeout period of 1k wdog cycles"] #[inline(always)] pub fn is_sel7(&self) -> bool { - *self == PERSEL_A::SEL7 + *self == Persel::Sel7 } - #[doc = "Checks if the value of the field is `SEL8`"] + #[doc = "Timeout period of 2k wdog cycles"] #[inline(always)] pub fn is_sel8(&self) -> bool { - *self == PERSEL_A::SEL8 + *self == Persel::Sel8 } - #[doc = "Checks if the value of the field is `SEL9`"] + #[doc = "Timeout period of 4k wdog cycles"] #[inline(always)] pub fn is_sel9(&self) -> bool { - *self == PERSEL_A::SEL9 + *self == Persel::Sel9 } - #[doc = "Checks if the value of the field is `SEL10`"] + #[doc = "Timeout period of 8k wdog cycles"] #[inline(always)] pub fn is_sel10(&self) -> bool { - *self == PERSEL_A::SEL10 + *self == Persel::Sel10 } - #[doc = "Checks if the value of the field is `SEL11`"] + #[doc = "Timeout period of 16k wdog cycles"] #[inline(always)] pub fn is_sel11(&self) -> bool { - *self == PERSEL_A::SEL11 + *self == Persel::Sel11 } - #[doc = "Checks if the value of the field is `SEL12`"] + #[doc = "Timeout period of 32k wdog cycles"] #[inline(always)] pub fn is_sel12(&self) -> bool { - *self == PERSEL_A::SEL12 + *self == Persel::Sel12 } - #[doc = "Checks if the value of the field is `SEL13`"] + #[doc = "Timeout period of 64k wdog cycles"] #[inline(always)] pub fn is_sel13(&self) -> bool { - *self == PERSEL_A::SEL13 + *self == Persel::Sel13 } - #[doc = "Checks if the value of the field is `SEL14`"] + #[doc = "Timeout period of 128k wdog cycles"] #[inline(always)] pub fn is_sel14(&self) -> bool { - *self == PERSEL_A::SEL14 + *self == Persel::Sel14 } - #[doc = "Checks if the value of the field is `SEL15`"] + #[doc = "Timeout period of 256k wdog cycles"] #[inline(always)] pub fn is_sel15(&self) -> bool { - *self == PERSEL_A::SEL15 + *self == Persel::Sel15 } } #[doc = "Field `PERSEL` writer - WDOG Timeout Period Select"] -pub type PERSEL_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, PERSEL_A, 4, O>; -impl<'a, const O: u8> PERSEL_W<'a, O> { +pub type PerselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Persel, crate::Safe>; +impl<'a, REG> PerselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Timeout period of 9 wdog cycles"] #[inline(always)] - pub fn sel0(self) -> &'a mut W { - self.variant(PERSEL_A::SEL0) + pub fn sel0(self) -> &'a mut crate::W { + self.variant(Persel::Sel0) } #[doc = "Timeout period of 17 wdog cycles"] #[inline(always)] - pub fn sel1(self) -> &'a mut W { - self.variant(PERSEL_A::SEL1) + pub fn sel1(self) -> &'a mut crate::W { + self.variant(Persel::Sel1) } #[doc = "Timeout period of 33 wdog cycles"] #[inline(always)] - pub fn sel2(self) -> &'a mut W { - self.variant(PERSEL_A::SEL2) + pub fn sel2(self) -> &'a mut crate::W { + self.variant(Persel::Sel2) } #[doc = "Timeout period of 65 wdog cycles"] #[inline(always)] - pub fn sel3(self) -> &'a mut W { - self.variant(PERSEL_A::SEL3) + pub fn sel3(self) -> &'a mut crate::W { + self.variant(Persel::Sel3) } #[doc = "Timeout period of 129 wdog cycles"] #[inline(always)] - pub fn sel4(self) -> &'a mut W { - self.variant(PERSEL_A::SEL4) + pub fn sel4(self) -> &'a mut crate::W { + self.variant(Persel::Sel4) } #[doc = "Timeout period of 257 wdog cycles"] #[inline(always)] - pub fn sel5(self) -> &'a mut W { - self.variant(PERSEL_A::SEL5) + pub fn sel5(self) -> &'a mut crate::W { + self.variant(Persel::Sel5) } #[doc = "Timeout period of 513 wdog cycles"] #[inline(always)] - pub fn sel6(self) -> &'a mut W { - self.variant(PERSEL_A::SEL6) + pub fn sel6(self) -> &'a mut crate::W { + self.variant(Persel::Sel6) } #[doc = "Timeout period of 1k wdog cycles"] #[inline(always)] - pub fn sel7(self) -> &'a mut W { - self.variant(PERSEL_A::SEL7) + pub fn sel7(self) -> &'a mut crate::W { + self.variant(Persel::Sel7) } #[doc = "Timeout period of 2k wdog cycles"] #[inline(always)] - pub fn sel8(self) -> &'a mut W { - self.variant(PERSEL_A::SEL8) + pub fn sel8(self) -> &'a mut crate::W { + self.variant(Persel::Sel8) } #[doc = "Timeout period of 4k wdog cycles"] #[inline(always)] - pub fn sel9(self) -> &'a mut W { - self.variant(PERSEL_A::SEL9) + pub fn sel9(self) -> &'a mut crate::W { + self.variant(Persel::Sel9) } #[doc = "Timeout period of 8k wdog cycles"] #[inline(always)] - pub fn sel10(self) -> &'a mut W { - self.variant(PERSEL_A::SEL10) + pub fn sel10(self) -> &'a mut crate::W { + self.variant(Persel::Sel10) } #[doc = "Timeout period of 16k wdog cycles"] #[inline(always)] - pub fn sel11(self) -> &'a mut W { - self.variant(PERSEL_A::SEL11) + pub fn sel11(self) -> &'a mut crate::W { + self.variant(Persel::Sel11) } #[doc = "Timeout period of 32k wdog cycles"] #[inline(always)] - pub fn sel12(self) -> &'a mut W { - self.variant(PERSEL_A::SEL12) + pub fn sel12(self) -> &'a mut crate::W { + self.variant(Persel::Sel12) } #[doc = "Timeout period of 64k wdog cycles"] #[inline(always)] - pub fn sel13(self) -> &'a mut W { - self.variant(PERSEL_A::SEL13) + pub fn sel13(self) -> &'a mut crate::W { + self.variant(Persel::Sel13) } #[doc = "Timeout period of 128k wdog cycles"] #[inline(always)] - pub fn sel14(self) -> &'a mut W { - self.variant(PERSEL_A::SEL14) + pub fn sel14(self) -> &'a mut crate::W { + self.variant(Persel::Sel14) } #[doc = "Timeout period of 256k wdog cycles"] #[inline(always)] - pub fn sel15(self) -> &'a mut W { - self.variant(PERSEL_A::SEL15) + pub fn sel15(self) -> &'a mut crate::W { + self.variant(Persel::Sel15) } } -#[doc = "Field `WARNSEL` reader - WDOG Warning Period Select"] -pub type WARNSEL_R = crate::FieldReader; #[doc = "WDOG Warning Period Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WARNSEL_A { +pub enum Warnsel { #[doc = "0: Disable"] - DIS = 0, + Dis = 0, #[doc = "1: Warning timeout is 25% of the Timeout."] - SEL1 = 1, + Sel1 = 1, #[doc = "2: Warning timeout is 50% of the Timeout."] - SEL2 = 2, + Sel2 = 2, #[doc = "3: Warning timeout is 75% of the Timeout."] - SEL3 = 3, + Sel3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WARNSEL_A) -> Self { + fn from(variant: Warnsel) -> Self { variant as _ } } -impl WARNSEL_R { +impl crate::FieldSpec for Warnsel { + type Ux = u8; +} +impl crate::IsEnum for Warnsel {} +#[doc = "Field `WARNSEL` reader - WDOG Warning Period Select"] +pub type WarnselR = crate::FieldReader; +impl WarnselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> WARNSEL_A { + pub const fn variant(&self) -> Warnsel { match self.bits { - 0 => WARNSEL_A::DIS, - 1 => WARNSEL_A::SEL1, - 2 => WARNSEL_A::SEL2, - 3 => WARNSEL_A::SEL3, + 0 => Warnsel::Dis, + 1 => Warnsel::Sel1, + 2 => Warnsel::Sel2, + 3 => Warnsel::Sel3, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DIS`"] + #[doc = "Disable"] #[inline(always)] pub fn is_dis(&self) -> bool { - *self == WARNSEL_A::DIS + *self == Warnsel::Dis } - #[doc = "Checks if the value of the field is `SEL1`"] + #[doc = "Warning timeout is 25% of the Timeout."] #[inline(always)] pub fn is_sel1(&self) -> bool { - *self == WARNSEL_A::SEL1 + *self == Warnsel::Sel1 } - #[doc = "Checks if the value of the field is `SEL2`"] + #[doc = "Warning timeout is 50% of the Timeout."] #[inline(always)] pub fn is_sel2(&self) -> bool { - *self == WARNSEL_A::SEL2 + *self == Warnsel::Sel2 } - #[doc = "Checks if the value of the field is `SEL3`"] + #[doc = "Warning timeout is 75% of the Timeout."] #[inline(always)] pub fn is_sel3(&self) -> bool { - *self == WARNSEL_A::SEL3 + *self == Warnsel::Sel3 } } #[doc = "Field `WARNSEL` writer - WDOG Warning Period Select"] -pub type WARNSEL_W<'a, const O: u8> = - crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, WARNSEL_A, 2, O>; -impl<'a, const O: u8> WARNSEL_W<'a, O> { +pub type WarnselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Warnsel, crate::Safe>; +impl<'a, REG> WarnselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Disable"] #[inline(always)] - pub fn dis(self) -> &'a mut W { - self.variant(WARNSEL_A::DIS) + pub fn dis(self) -> &'a mut crate::W { + self.variant(Warnsel::Dis) } #[doc = "Warning timeout is 25% of the Timeout."] #[inline(always)] - pub fn sel1(self) -> &'a mut W { - self.variant(WARNSEL_A::SEL1) + pub fn sel1(self) -> &'a mut crate::W { + self.variant(Warnsel::Sel1) } #[doc = "Warning timeout is 50% of the Timeout."] #[inline(always)] - pub fn sel2(self) -> &'a mut W { - self.variant(WARNSEL_A::SEL2) + pub fn sel2(self) -> &'a mut crate::W { + self.variant(Warnsel::Sel2) } #[doc = "Warning timeout is 75% of the Timeout."] #[inline(always)] - pub fn sel3(self) -> &'a mut W { - self.variant(WARNSEL_A::SEL3) + pub fn sel3(self) -> &'a mut crate::W { + self.variant(Warnsel::Sel3) } } -#[doc = "Field `WINSEL` reader - WDOG Illegal Window Select"] -pub type WINSEL_R = crate::FieldReader; #[doc = "WDOG Illegal Window Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WINSEL_A { +pub enum Winsel { #[doc = "0: Disabled."] - DIS = 0, + Dis = 0, #[doc = "1: Window timeout is 12.5% of the Timeout."] - SEL1 = 1, + Sel1 = 1, #[doc = "2: Window timeout is 25% of the Timeout."] - SEL2 = 2, + Sel2 = 2, #[doc = "3: Window timeout is 37.5% of the Timeout."] - SEL3 = 3, + Sel3 = 3, #[doc = "4: Window timeout is 50% of the Timeout."] - SEL4 = 4, + Sel4 = 4, #[doc = "5: Window timeout is 62.5% of the Timeout."] - SEL5 = 5, + Sel5 = 5, #[doc = "6: Window timeout is 75.5% of the Timeout."] - SEL6 = 6, + Sel6 = 6, #[doc = "7: Window timeout is 87.5% of the Timeout."] - SEL7 = 7, + Sel7 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WINSEL_A) -> Self { + fn from(variant: Winsel) -> Self { variant as _ } } -impl WINSEL_R { +impl crate::FieldSpec for Winsel { + type Ux = u8; +} +impl crate::IsEnum for Winsel {} +#[doc = "Field `WINSEL` reader - WDOG Illegal Window Select"] +pub type WinselR = crate::FieldReader; +impl WinselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> WINSEL_A { + pub const fn variant(&self) -> Winsel { match self.bits { - 0 => WINSEL_A::DIS, - 1 => WINSEL_A::SEL1, - 2 => WINSEL_A::SEL2, - 3 => WINSEL_A::SEL3, - 4 => WINSEL_A::SEL4, - 5 => WINSEL_A::SEL5, - 6 => WINSEL_A::SEL6, - 7 => WINSEL_A::SEL7, + 0 => Winsel::Dis, + 1 => Winsel::Sel1, + 2 => Winsel::Sel2, + 3 => Winsel::Sel3, + 4 => Winsel::Sel4, + 5 => Winsel::Sel5, + 6 => Winsel::Sel6, + 7 => Winsel::Sel7, _ => unreachable!(), } } - #[doc = "Checks if the value of the field is `DIS`"] + #[doc = "Disabled."] #[inline(always)] pub fn is_dis(&self) -> bool { - *self == WINSEL_A::DIS + *self == Winsel::Dis } - #[doc = "Checks if the value of the field is `SEL1`"] + #[doc = "Window timeout is 12.5% of the Timeout."] #[inline(always)] pub fn is_sel1(&self) -> bool { - *self == WINSEL_A::SEL1 + *self == Winsel::Sel1 } - #[doc = "Checks if the value of the field is `SEL2`"] + #[doc = "Window timeout is 25% of the Timeout."] #[inline(always)] pub fn is_sel2(&self) -> bool { - *self == WINSEL_A::SEL2 + *self == Winsel::Sel2 } - #[doc = "Checks if the value of the field is `SEL3`"] + #[doc = "Window timeout is 37.5% of the Timeout."] #[inline(always)] pub fn is_sel3(&self) -> bool { - *self == WINSEL_A::SEL3 + *self == Winsel::Sel3 } - #[doc = "Checks if the value of the field is `SEL4`"] + #[doc = "Window timeout is 50% of the Timeout."] #[inline(always)] pub fn is_sel4(&self) -> bool { - *self == WINSEL_A::SEL4 + *self == Winsel::Sel4 } - #[doc = "Checks if the value of the field is `SEL5`"] + #[doc = "Window timeout is 62.5% of the Timeout."] #[inline(always)] pub fn is_sel5(&self) -> bool { - *self == WINSEL_A::SEL5 + *self == Winsel::Sel5 } - #[doc = "Checks if the value of the field is `SEL6`"] + #[doc = "Window timeout is 75.5% of the Timeout."] #[inline(always)] pub fn is_sel6(&self) -> bool { - *self == WINSEL_A::SEL6 + *self == Winsel::Sel6 } - #[doc = "Checks if the value of the field is `SEL7`"] + #[doc = "Window timeout is 87.5% of the Timeout."] #[inline(always)] pub fn is_sel7(&self) -> bool { - *self == WINSEL_A::SEL7 + *self == Winsel::Sel7 } } #[doc = "Field `WINSEL` writer - WDOG Illegal Window Select"] -pub type WINSEL_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, WINSEL_A, 3, O>; -impl<'a, const O: u8> WINSEL_W<'a, O> { +pub type WinselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Winsel, crate::Safe>; +impl<'a, REG> WinselW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Disabled."] #[inline(always)] - pub fn dis(self) -> &'a mut W { - self.variant(WINSEL_A::DIS) + pub fn dis(self) -> &'a mut crate::W { + self.variant(Winsel::Dis) } #[doc = "Window timeout is 12.5% of the Timeout."] #[inline(always)] - pub fn sel1(self) -> &'a mut W { - self.variant(WINSEL_A::SEL1) + pub fn sel1(self) -> &'a mut crate::W { + self.variant(Winsel::Sel1) } #[doc = "Window timeout is 25% of the Timeout."] #[inline(always)] - pub fn sel2(self) -> &'a mut W { - self.variant(WINSEL_A::SEL2) + pub fn sel2(self) -> &'a mut crate::W { + self.variant(Winsel::Sel2) } #[doc = "Window timeout is 37.5% of the Timeout."] #[inline(always)] - pub fn sel3(self) -> &'a mut W { - self.variant(WINSEL_A::SEL3) + pub fn sel3(self) -> &'a mut crate::W { + self.variant(Winsel::Sel3) } #[doc = "Window timeout is 50% of the Timeout."] #[inline(always)] - pub fn sel4(self) -> &'a mut W { - self.variant(WINSEL_A::SEL4) + pub fn sel4(self) -> &'a mut crate::W { + self.variant(Winsel::Sel4) } #[doc = "Window timeout is 62.5% of the Timeout."] #[inline(always)] - pub fn sel5(self) -> &'a mut W { - self.variant(WINSEL_A::SEL5) + pub fn sel5(self) -> &'a mut crate::W { + self.variant(Winsel::Sel5) } #[doc = "Window timeout is 75.5% of the Timeout."] #[inline(always)] - pub fn sel6(self) -> &'a mut W { - self.variant(WINSEL_A::SEL6) + pub fn sel6(self) -> &'a mut crate::W { + self.variant(Winsel::Sel6) } #[doc = "Window timeout is 87.5% of the Timeout."] #[inline(always)] - pub fn sel7(self) -> &'a mut W { - self.variant(WINSEL_A::SEL7) + pub fn sel7(self) -> &'a mut crate::W { + self.variant(Winsel::Sel7) } } impl R { #[doc = "Bit 0 - WDOG Clear Source"] #[inline(always)] - pub fn clrsrc(&self) -> CLRSRC_R { - CLRSRC_R::new((self.bits & 1) != 0) + pub fn clrsrc(&self) -> ClrsrcR { + ClrsrcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - EM1 Run"] #[inline(always)] - pub fn em1run(&self) -> EM1RUN_R { - EM1RUN_R::new(((self.bits >> 1) & 1) != 0) + pub fn em1run(&self) -> Em1runR { + Em1runR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - EM2 Run"] #[inline(always)] - pub fn em2run(&self) -> EM2RUN_R { - EM2RUN_R::new(((self.bits >> 2) & 1) != 0) + pub fn em2run(&self) -> Em2runR { + Em2runR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - EM3 Run"] #[inline(always)] - pub fn em3run(&self) -> EM3RUN_R { - EM3RUN_R::new(((self.bits >> 3) & 1) != 0) + pub fn em3run(&self) -> Em3runR { + Em3runR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - EM4 Block"] #[inline(always)] - pub fn em4block(&self) -> EM4BLOCK_R { - EM4BLOCK_R::new(((self.bits >> 4) & 1) != 0) + pub fn em4block(&self) -> Em4blockR { + Em4blockR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Debug Mode Run"] #[inline(always)] - pub fn debugrun(&self) -> DEBUGRUN_R { - DEBUGRUN_R::new(((self.bits >> 5) & 1) != 0) + pub fn debugrun(&self) -> DebugrunR { + DebugrunR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 8 - WDOG Reset Disable"] #[inline(always)] - pub fn wdogrstdis(&self) -> WDOGRSTDIS_R { - WDOGRSTDIS_R::new(((self.bits >> 8) & 1) != 0) + pub fn wdogrstdis(&self) -> WdogrstdisR { + WdogrstdisR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - PRS Src0 Missing Event WDOG Reset"] #[inline(always)] - pub fn prs0missrsten(&self) -> PRS0MISSRSTEN_R { - PRS0MISSRSTEN_R::new(((self.bits >> 9) & 1) != 0) + pub fn prs0missrsten(&self) -> Prs0missrstenR { + Prs0missrstenR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - PRS Src1 Missing Event WDOG Reset"] #[inline(always)] - pub fn prs1missrsten(&self) -> PRS1MISSRSTEN_R { - PRS1MISSRSTEN_R::new(((self.bits >> 10) & 1) != 0) + pub fn prs1missrsten(&self) -> Prs1missrstenR { + Prs1missrstenR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bits 16:19 - WDOG Timeout Period Select"] #[inline(always)] - pub fn persel(&self) -> PERSEL_R { - PERSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn persel(&self) -> PerselR { + PerselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 24:25 - WDOG Warning Period Select"] #[inline(always)] - pub fn warnsel(&self) -> WARNSEL_R { - WARNSEL_R::new(((self.bits >> 24) & 3) as u8) + pub fn warnsel(&self) -> WarnselR { + WarnselR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 28:30 - WDOG Illegal Window Select"] #[inline(always)] - pub fn winsel(&self) -> WINSEL_R { - WINSEL_R::new(((self.bits >> 28) & 7) as u8) + pub fn winsel(&self) -> WinselR { + WinselR::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bit 0 - WDOG Clear Source"] #[inline(always)] #[must_use] - pub fn clrsrc(&mut self) -> CLRSRC_W<0> { - CLRSRC_W::new(self) + pub fn clrsrc(&mut self) -> ClrsrcW { + ClrsrcW::new(self, 0) } #[doc = "Bit 1 - EM1 Run"] #[inline(always)] #[must_use] - pub fn em1run(&mut self) -> EM1RUN_W<1> { - EM1RUN_W::new(self) + pub fn em1run(&mut self) -> Em1runW { + Em1runW::new(self, 1) } #[doc = "Bit 2 - EM2 Run"] #[inline(always)] #[must_use] - pub fn em2run(&mut self) -> EM2RUN_W<2> { - EM2RUN_W::new(self) + pub fn em2run(&mut self) -> Em2runW { + Em2runW::new(self, 2) } #[doc = "Bit 3 - EM3 Run"] #[inline(always)] #[must_use] - pub fn em3run(&mut self) -> EM3RUN_W<3> { - EM3RUN_W::new(self) + pub fn em3run(&mut self) -> Em3runW { + Em3runW::new(self, 3) } #[doc = "Bit 4 - EM4 Block"] #[inline(always)] #[must_use] - pub fn em4block(&mut self) -> EM4BLOCK_W<4> { - EM4BLOCK_W::new(self) + pub fn em4block(&mut self) -> Em4blockW { + Em4blockW::new(self, 4) } #[doc = "Bit 5 - Debug Mode Run"] #[inline(always)] #[must_use] - pub fn debugrun(&mut self) -> DEBUGRUN_W<5> { - DEBUGRUN_W::new(self) + pub fn debugrun(&mut self) -> DebugrunW { + DebugrunW::new(self, 5) } #[doc = "Bit 8 - WDOG Reset Disable"] #[inline(always)] #[must_use] - pub fn wdogrstdis(&mut self) -> WDOGRSTDIS_W<8> { - WDOGRSTDIS_W::new(self) + pub fn wdogrstdis(&mut self) -> WdogrstdisW { + WdogrstdisW::new(self, 8) } #[doc = "Bit 9 - PRS Src0 Missing Event WDOG Reset"] #[inline(always)] #[must_use] - pub fn prs0missrsten(&mut self) -> PRS0MISSRSTEN_W<9> { - PRS0MISSRSTEN_W::new(self) + pub fn prs0missrsten(&mut self) -> Prs0missrstenW { + Prs0missrstenW::new(self, 9) } #[doc = "Bit 10 - PRS Src1 Missing Event WDOG Reset"] #[inline(always)] #[must_use] - pub fn prs1missrsten(&mut self) -> PRS1MISSRSTEN_W<10> { - PRS1MISSRSTEN_W::new(self) + pub fn prs1missrsten(&mut self) -> Prs1missrstenW { + Prs1missrstenW::new(self, 10) } #[doc = "Bits 16:19 - WDOG Timeout Period Select"] #[inline(always)] #[must_use] - pub fn persel(&mut self) -> PERSEL_W<16> { - PERSEL_W::new(self) + pub fn persel(&mut self) -> PerselW { + PerselW::new(self, 16) } #[doc = "Bits 24:25 - WDOG Warning Period Select"] #[inline(always)] #[must_use] - pub fn warnsel(&mut self) -> WARNSEL_W<24> { - WARNSEL_W::new(self) + pub fn warnsel(&mut self) -> WarnselW { + WarnselW::new(self, 24) } #[doc = "Bits 28:30 - WDOG Illegal Window Select"] #[inline(always)] #[must_use] - pub fn winsel(&mut self) -> WINSEL_W<28> { - WINSEL_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn winsel(&mut self) -> WinselW { + WinselW::new(self, 28) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } -#[doc = "`read()` method returns [cfg::R](R) reader structure"] -impl crate::Readable for CFG_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] -impl crate::Writable for CFG_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`cfg::R`](R) reader structure"] +impl crate::Readable for CfgSpec {} +#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0x000f_0000"] -impl crate::Resettable for CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x000f_0000; +impl crate::Resettable for CfgSpec { + const RESET_VALUE: u32 = 0x000f_0000; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/cmd.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/cmd.rs index bcf759a..925f1fc 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/cmd.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/cmd.rs @@ -1,78 +1,56 @@ #[doc = "Register `CMD` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "WDOG Timer Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLEAR_AW { +pub enum Clear { #[doc = "0: WDOG timer is unchanged."] - UNCHANGED = 0, + Unchanged = 0, #[doc = "1: WDOG timer is cleared to 0."] - CLEARED = 1, + Cleared = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLEAR_AW) -> Self { + fn from(variant: Clear) -> Self { variant as u8 != 0 } } #[doc = "Field `CLEAR` writer - WDOG Timer Clear"] -pub type CLEAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, CLEAR_AW, O>; -impl<'a, const O: u8> CLEAR_W<'a, O> { +pub type ClearW<'a, REG> = crate::BitWriter<'a, REG, Clear>; +impl<'a, REG> ClearW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ #[doc = "WDOG timer is unchanged."] #[inline(always)] - pub fn unchanged(self) -> &'a mut W { - self.variant(CLEAR_AW::UNCHANGED) + pub fn unchanged(self) -> &'a mut crate::W { + self.variant(Clear::Unchanged) } #[doc = "WDOG timer is cleared to 0."] #[inline(always)] - pub fn cleared(self) -> &'a mut W { - self.variant(CLEAR_AW::CLEARED) + pub fn cleared(self) -> &'a mut crate::W { + self.variant(Clear::Cleared) } } impl W { #[doc = "Bit 0 - WDOG Timer Clear"] #[inline(always)] #[must_use] - pub fn clear(&mut self) -> CLEAR_W<0> { - CLEAR_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn clear(&mut self) -> ClearW { + ClearW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] -pub struct CMD_SPEC; -impl crate::RegisterSpec for CMD_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CmdSpec; +impl crate::RegisterSpec for CmdSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] -impl crate::Writable for CMD_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"] +impl crate::Writable for CmdSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMD to value 0"] -impl crate::Resettable for CMD_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for CmdSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/en.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/en.rs index bd67dfd..d831021 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/en.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/en.rs @@ -1,87 +1,47 @@ #[doc = "Register `EN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `EN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `EN` reader - Module Enable"] -pub type EN_R = crate::BitReader; +pub type EnR = crate::BitReader; #[doc = "Field `EN` writer - Module Enable"] -pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EN_SPEC, bool, O>; +pub type EnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISABLING` reader - Disabling busy status"] -pub type DISABLING_R = crate::BitReader; +pub type DisablingR = crate::BitReader; impl R { #[doc = "Bit 0 - Module Enable"] #[inline(always)] - pub fn en(&self) -> EN_R { - EN_R::new((self.bits & 1) != 0) + pub fn en(&self) -> EnR { + EnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disabling busy status"] #[inline(always)] - pub fn disabling(&self) -> DISABLING_R { - DISABLING_R::new(((self.bits >> 1) & 1) != 0) + pub fn disabling(&self) -> DisablingR { + DisablingR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Module Enable"] #[inline(always)] #[must_use] - pub fn en(&mut self) -> EN_W<0> { - EN_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn en(&mut self) -> EnW { + EnW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"] -pub struct EN_SPEC; -impl crate::RegisterSpec for EN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct EnSpec; +impl crate::RegisterSpec for EnSpec { type Ux = u32; } -#[doc = "`read()` method returns [en::R](R) reader structure"] -impl crate::Readable for EN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"] -impl crate::Writable for EN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`en::R`](R) reader structure"] +impl crate::Readable for EnSpec {} +#[doc = "`write(|w| ..)` method takes [`en::W`](W) writer structure"] +impl crate::Writable for EnSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EN to value 0"] -impl crate::Resettable for EN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for EnSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/ien.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/ien.rs index f30100e..98d5e03 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/ien.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/ien.rs @@ -1,140 +1,100 @@ #[doc = "Register `IEN` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IEN` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOUT` reader - WDOG Timeout Interrupt Enable"] -pub type TOUT_R = crate::BitReader; +pub type ToutR = crate::BitReader; #[doc = "Field `TOUT` writer - WDOG Timeout Interrupt Enable"] -pub type TOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type ToutW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WARN` reader - WDOG Warning Timeout Interrupt Enable"] -pub type WARN_R = crate::BitReader; +pub type WarnR = crate::BitReader; #[doc = "Field `WARN` writer - WDOG Warning Timeout Interrupt Enable"] -pub type WARN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type WarnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WIN` reader - WDOG Window Interrupt Enable"] -pub type WIN_R = crate::BitReader; +pub type WinR = crate::BitReader; #[doc = "Field `WIN` writer - WDOG Window Interrupt Enable"] -pub type WIN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type WinW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PEM0` reader - PRS Src0 Event Missing Interrupt Enable"] -pub type PEM0_R = crate::BitReader; +pub type Pem0R = crate::BitReader; #[doc = "Field `PEM0` writer - PRS Src0 Event Missing Interrupt Enable"] -pub type PEM0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Pem0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PEM1` reader - PRS Src1 Event Missing Interrupt Enable"] -pub type PEM1_R = crate::BitReader; +pub type Pem1R = crate::BitReader; #[doc = "Field `PEM1` writer - PRS Src1 Event Missing Interrupt Enable"] -pub type PEM1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>; +pub type Pem1W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - WDOG Timeout Interrupt Enable"] #[inline(always)] - pub fn tout(&self) -> TOUT_R { - TOUT_R::new((self.bits & 1) != 0) + pub fn tout(&self) -> ToutR { + ToutR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - WDOG Warning Timeout Interrupt Enable"] #[inline(always)] - pub fn warn(&self) -> WARN_R { - WARN_R::new(((self.bits >> 1) & 1) != 0) + pub fn warn(&self) -> WarnR { + WarnR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - WDOG Window Interrupt Enable"] #[inline(always)] - pub fn win(&self) -> WIN_R { - WIN_R::new(((self.bits >> 2) & 1) != 0) + pub fn win(&self) -> WinR { + WinR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - PRS Src0 Event Missing Interrupt Enable"] #[inline(always)] - pub fn pem0(&self) -> PEM0_R { - PEM0_R::new(((self.bits >> 3) & 1) != 0) + pub fn pem0(&self) -> Pem0R { + Pem0R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - PRS Src1 Event Missing Interrupt Enable"] #[inline(always)] - pub fn pem1(&self) -> PEM1_R { - PEM1_R::new(((self.bits >> 4) & 1) != 0) + pub fn pem1(&self) -> Pem1R { + Pem1R::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - WDOG Timeout Interrupt Enable"] #[inline(always)] #[must_use] - pub fn tout(&mut self) -> TOUT_W<0> { - TOUT_W::new(self) + pub fn tout(&mut self) -> ToutW { + ToutW::new(self, 0) } #[doc = "Bit 1 - WDOG Warning Timeout Interrupt Enable"] #[inline(always)] #[must_use] - pub fn warn(&mut self) -> WARN_W<1> { - WARN_W::new(self) + pub fn warn(&mut self) -> WarnW { + WarnW::new(self, 1) } #[doc = "Bit 2 - WDOG Window Interrupt Enable"] #[inline(always)] #[must_use] - pub fn win(&mut self) -> WIN_W<2> { - WIN_W::new(self) + pub fn win(&mut self) -> WinW { + WinW::new(self, 2) } #[doc = "Bit 3 - PRS Src0 Event Missing Interrupt Enable"] #[inline(always)] #[must_use] - pub fn pem0(&mut self) -> PEM0_W<3> { - PEM0_W::new(self) + pub fn pem0(&mut self) -> Pem0W { + Pem0W::new(self, 3) } #[doc = "Bit 4 - PRS Src1 Event Missing Interrupt Enable"] #[inline(always)] #[must_use] - pub fn pem1(&mut self) -> PEM1_W<4> { - PEM1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pem1(&mut self) -> Pem1W { + Pem1W::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"] -pub struct IEN_SPEC; -impl crate::RegisterSpec for IEN_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ien::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IenSpec; +impl crate::RegisterSpec for IenSpec { type Ux = u32; } -#[doc = "`read()` method returns [ien::R](R) reader structure"] -impl crate::Readable for IEN_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"] -impl crate::Writable for IEN_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`ien::R`](R) reader structure"] +impl crate::Readable for IenSpec {} +#[doc = "`write(|w| ..)` method takes [`ien::W`](W) writer structure"] +impl crate::Writable for IenSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IEN to value 0"] -impl crate::Resettable for IEN_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IenSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/if_.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/if_.rs index 3c5ca4c..30a8c97 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/if_.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/if_.rs @@ -1,140 +1,100 @@ #[doc = "Register `IF` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Register `IF` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "Field `TOUT` reader - WDOG Timeout Interrupt Flag"] -pub type TOUT_R = crate::BitReader; +pub type ToutR = crate::BitReader; #[doc = "Field `TOUT` writer - WDOG Timeout Interrupt Flag"] -pub type TOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type ToutW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WARN` reader - WDOG Warning Timeout Interrupt Flag"] -pub type WARN_R = crate::BitReader; +pub type WarnR = crate::BitReader; #[doc = "Field `WARN` writer - WDOG Warning Timeout Interrupt Flag"] -pub type WARN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type WarnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WIN` reader - WDOG Window Interrupt Flag"] -pub type WIN_R = crate::BitReader; +pub type WinR = crate::BitReader; #[doc = "Field `WIN` writer - WDOG Window Interrupt Flag"] -pub type WIN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type WinW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PEM0` reader - PRS Src0 Event Missing Interrupt Flag"] -pub type PEM0_R = crate::BitReader; +pub type Pem0R = crate::BitReader; #[doc = "Field `PEM0` writer - PRS Src0 Event Missing Interrupt Flag"] -pub type PEM0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Pem0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PEM1` reader - PRS Src1 Event Missing Interrupt Flag"] -pub type PEM1_R = crate::BitReader; +pub type Pem1R = crate::BitReader; #[doc = "Field `PEM1` writer - PRS Src1 Event Missing Interrupt Flag"] -pub type PEM1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IF_SPEC, bool, O>; +pub type Pem1W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - WDOG Timeout Interrupt Flag"] #[inline(always)] - pub fn tout(&self) -> TOUT_R { - TOUT_R::new((self.bits & 1) != 0) + pub fn tout(&self) -> ToutR { + ToutR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - WDOG Warning Timeout Interrupt Flag"] #[inline(always)] - pub fn warn(&self) -> WARN_R { - WARN_R::new(((self.bits >> 1) & 1) != 0) + pub fn warn(&self) -> WarnR { + WarnR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - WDOG Window Interrupt Flag"] #[inline(always)] - pub fn win(&self) -> WIN_R { - WIN_R::new(((self.bits >> 2) & 1) != 0) + pub fn win(&self) -> WinR { + WinR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - PRS Src0 Event Missing Interrupt Flag"] #[inline(always)] - pub fn pem0(&self) -> PEM0_R { - PEM0_R::new(((self.bits >> 3) & 1) != 0) + pub fn pem0(&self) -> Pem0R { + Pem0R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - PRS Src1 Event Missing Interrupt Flag"] #[inline(always)] - pub fn pem1(&self) -> PEM1_R { - PEM1_R::new(((self.bits >> 4) & 1) != 0) + pub fn pem1(&self) -> Pem1R { + Pem1R::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - WDOG Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn tout(&mut self) -> TOUT_W<0> { - TOUT_W::new(self) + pub fn tout(&mut self) -> ToutW { + ToutW::new(self, 0) } #[doc = "Bit 1 - WDOG Warning Timeout Interrupt Flag"] #[inline(always)] #[must_use] - pub fn warn(&mut self) -> WARN_W<1> { - WARN_W::new(self) + pub fn warn(&mut self) -> WarnW { + WarnW::new(self, 1) } #[doc = "Bit 2 - WDOG Window Interrupt Flag"] #[inline(always)] #[must_use] - pub fn win(&mut self) -> WIN_W<2> { - WIN_W::new(self) + pub fn win(&mut self) -> WinW { + WinW::new(self, 2) } #[doc = "Bit 3 - PRS Src0 Event Missing Interrupt Flag"] #[inline(always)] #[must_use] - pub fn pem0(&mut self) -> PEM0_W<3> { - PEM0_W::new(self) + pub fn pem0(&mut self) -> Pem0W { + Pem0W::new(self, 3) } #[doc = "Bit 4 - PRS Src1 Event Missing Interrupt Flag"] #[inline(always)] #[must_use] - pub fn pem1(&mut self) -> PEM1_W<4> { - PEM1_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn pem1(&mut self) -> Pem1W { + Pem1W::new(self, 4) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"] -pub struct IF_SPEC; -impl crate::RegisterSpec for IF_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`if_::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`if_::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IfSpec; +impl crate::RegisterSpec for IfSpec { type Ux = u32; } -#[doc = "`read()` method returns [if_::R](R) reader structure"] -impl crate::Readable for IF_SPEC { - type Reader = R; -} -#[doc = "`write(|w| ..)` method takes [if_::W](W) writer structure"] -impl crate::Writable for IF_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`read()` method returns [`if_::R`](R) reader structure"] +impl crate::Readable for IfSpec {} +#[doc = "`write(|w| ..)` method takes [`if_::W`](W) writer structure"] +impl crate::Writable for IfSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IF to value 0"] -impl crate::Resettable for IF_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for IfSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/ipversion.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/ipversion.rs index ad2c166..23b42d5 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/ipversion.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/ipversion.rs @@ -1,37 +1,22 @@ #[doc = "Register `IPVERSION` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `IPVERSION` reader - IP Version"] -pub type IPVERSION_R = crate::FieldReader; +pub type IpversionR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - IP Version"] #[inline(always)] - pub fn ipversion(&self) -> IPVERSION_R { - IPVERSION_R::new(self.bits) + pub fn ipversion(&self) -> IpversionR { + IpversionR::new(self.bits) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipversion](index.html) module"] -pub struct IPVERSION_SPEC; -impl crate::RegisterSpec for IPVERSION_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`ipversion::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IpversionSpec; +impl crate::RegisterSpec for IpversionSpec { type Ux = u32; } -#[doc = "`read()` method returns [ipversion::R](R) reader structure"] -impl crate::Readable for IPVERSION_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`ipversion::R`](R) reader structure"] +impl crate::Readable for IpversionSpec {} #[doc = "`reset()` method sets IPVERSION to value 0x01"] -impl crate::Resettable for IPVERSION_SPEC { - const RESET_VALUE: Self::Ux = 0x01; +impl crate::Resettable for IpversionSpec { + const RESET_VALUE: u32 = 0x01; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/lock.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/lock.rs index b24c0b5..748fd84 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/lock.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/lock.rs @@ -1,80 +1,62 @@ #[doc = "Register `LOCK` writer"] -pub struct W(crate::W); -impl core::ops::Deref for W { - type Target = crate::W; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } -} -impl From> for W { - #[inline(always)] - fn from(writer: crate::W) -> Self { - W(writer) - } -} +pub type W = crate::W; #[doc = "WDOG Configuration Lock\n\nValue on reset: 44008"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum LOCKKEY_AW { +pub enum Lockkey { #[doc = "0: Lock WDOG lockable registers"] - LOCK = 0, + Lock = 0, #[doc = "44008: Unlock WDOG lockable registers"] - UNLOCK = 44008, + Unlock = 44008, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: LOCKKEY_AW) -> Self { + fn from(variant: Lockkey) -> Self { variant as _ } } +impl crate::FieldSpec for Lockkey { + type Ux = u16; +} +impl crate::IsEnum for Lockkey {} #[doc = "Field `LOCKKEY` writer - WDOG Configuration Lock"] -pub type LOCKKEY_W<'a, const O: u8> = - crate::FieldWriter<'a, u32, LOCK_SPEC, u16, LOCKKEY_AW, 16, O>; -impl<'a, const O: u8> LOCKKEY_W<'a, O> { +pub type LockkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, Lockkey>; +impl<'a, REG> LockkeyW<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From, +{ #[doc = "Lock WDOG lockable registers"] #[inline(always)] - pub fn lock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::LOCK) + pub fn lock(self) -> &'a mut crate::W { + self.variant(Lockkey::Lock) } #[doc = "Unlock WDOG lockable registers"] #[inline(always)] - pub fn unlock(self) -> &'a mut W { - self.variant(LOCKKEY_AW::UNLOCK) + pub fn unlock(self) -> &'a mut crate::W { + self.variant(Lockkey::Unlock) } } impl W { #[doc = "Bits 0:15 - WDOG Configuration Lock"] #[inline(always)] #[must_use] - pub fn lockkey(&mut self) -> LOCKKEY_W<0> { - LOCKKEY_W::new(self) - } - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.0.bits(bits); - self + pub fn lockkey(&mut self) -> LockkeyW { + LockkeyW::new(self, 0) } } -#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] -pub struct LOCK_SPEC; -impl crate::RegisterSpec for LOCK_SPEC { +#[doc = "No Description\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct LockSpec; +impl crate::RegisterSpec for LockSpec { type Ux = u32; } -#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] -impl crate::Writable for LOCK_SPEC { - type Writer = W; - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +#[doc = "`write(|w| ..)` method takes [`lock::W`](W) writer structure"] +impl crate::Writable for LockSpec { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LOCK to value 0xabe8"] -impl crate::Resettable for LOCK_SPEC { - const RESET_VALUE: Self::Ux = 0xabe8; +impl crate::Resettable for LockSpec { + const RESET_VALUE: u32 = 0xabe8; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/status.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/status.rs index 15e4f04..1c88571 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/status.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/status.rs @@ -1,71 +1,56 @@ #[doc = "Register `STATUS` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} -#[doc = "Field `LOCK` reader - WDOG Configuration Lock Status"] -pub type LOCK_R = crate::BitReader; +pub type R = crate::R; #[doc = "WDOG Configuration Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCK_A { +pub enum Lock { #[doc = "0: All WDOG lockable registers are unlocked."] - UNLOCKED = 0, + Unlocked = 0, #[doc = "1: All WDOG lockable registers are locked."] - LOCKED = 1, + Locked = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCK_A) -> Self { + fn from(variant: Lock) -> Self { variant as u8 != 0 } } -impl LOCK_R { +#[doc = "Field `LOCK` reader - WDOG Configuration Lock Status"] +pub type LockR = crate::BitReader; +impl LockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> LOCK_A { + pub const fn variant(&self) -> Lock { match self.bits { - false => LOCK_A::UNLOCKED, - true => LOCK_A::LOCKED, + false => Lock::Unlocked, + true => Lock::Locked, } } - #[doc = "Checks if the value of the field is `UNLOCKED`"] + #[doc = "All WDOG lockable registers are unlocked."] #[inline(always)] pub fn is_unlocked(&self) -> bool { - *self == LOCK_A::UNLOCKED + *self == Lock::Unlocked } - #[doc = "Checks if the value of the field is `LOCKED`"] + #[doc = "All WDOG lockable registers are locked."] #[inline(always)] pub fn is_locked(&self) -> bool { - *self == LOCK_A::LOCKED + *self == Lock::Locked } } impl R { #[doc = "Bit 31 - WDOG Configuration Lock Status"] #[inline(always)] - pub fn lock(&self) -> LOCK_R { - LOCK_R::new(((self.bits >> 31) & 1) != 0) + pub fn lock(&self) -> LockR { + LockR::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } -#[doc = "`read()` method returns [status::R](R) reader structure"] -impl crate::Readable for STATUS_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`status::R`](R) reader structure"] +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for StatusSpec { + const RESET_VALUE: u32 = 0; } diff --git a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/syncbusy.rs b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/syncbusy.rs index dfc12b2..a25871a 100644 --- a/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/syncbusy.rs +++ b/kampela_experiments_efm32pg23/efm32pg23_fix/src/wdog1_s/syncbusy.rs @@ -1,37 +1,22 @@ #[doc = "Register `SYNCBUSY` reader"] -pub struct R(crate::R); -impl core::ops::Deref for R { - type Target = crate::R; - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } -} -impl From> for R { - #[inline(always)] - fn from(reader: crate::R) -> Self { - R(reader) - } -} +pub type R = crate::R; #[doc = "Field `CMD` reader - Sync Busy for Cmd Register"] -pub type CMD_R = crate::BitReader; +pub type CmdR = crate::BitReader; impl R { #[doc = "Bit 0 - Sync Busy for Cmd Register"] #[inline(always)] - pub fn cmd(&self) -> CMD_R { - CMD_R::new((self.bits & 1) != 0) + pub fn cmd(&self) -> CmdR { + CmdR::new((self.bits & 1) != 0) } } -#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] -pub struct SYNCBUSY_SPEC; -impl crate::RegisterSpec for SYNCBUSY_SPEC { +#[doc = "No Description\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SyncbusySpec; +impl crate::RegisterSpec for SyncbusySpec { type Ux = u32; } -#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] -impl crate::Readable for SYNCBUSY_SPEC { - type Reader = R; -} +#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"] +impl crate::Readable for SyncbusySpec {} #[doc = "`reset()` method sets SYNCBUSY to value 0"] -impl crate::Resettable for SYNCBUSY_SPEC { - const RESET_VALUE: Self::Ux = 0; +impl crate::Resettable for SyncbusySpec { + const RESET_VALUE: u32 = 0; }